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authorWaldemar Brodkorb <wbx@openadk.org>2017-03-05 09:42:27 +0100
committerWaldemar Brodkorb <wbx@openadk.org>2017-03-05 09:42:36 +0100
commitdd7f6076476db449f510a90a1e4d2285dd971204 (patch)
tree6489fa6dc8ce736bf048b97a10ba987bc66eaf07 /toolchain/binutils/patches/2.24/binutils.nds32
parent235ad0e8e1b1bd4552451def05ec9f435f0c1eb7 (diff)
binutils: add 2.28, default to 2.28
Diffstat (limited to 'toolchain/binutils/patches/2.24/binutils.nds32')
-rw-r--r--toolchain/binutils/patches/2.24/binutils.nds32409190
1 files changed, 0 insertions, 409190 deletions
diff --git a/toolchain/binutils/patches/2.24/binutils.nds32 b/toolchain/binutils/patches/2.24/binutils.nds32
deleted file mode 100644
index 1573f2c4d..000000000
--- a/toolchain/binutils/patches/2.24/binutils.nds32
+++ /dev/null
@@ -1,409190 +0,0 @@
-diff -Nur binutils-2.24.orig/bfd/archures.c binutils-2.24/bfd/archures.c
---- binutils-2.24.orig/bfd/archures.c 2013-11-08 11:02:26.000000000 +0100
-+++ binutils-2.24/bfd/archures.c 2016-06-30 21:26:12.537888600 +0200
-@@ -316,6 +316,12 @@
- .#define bfd_mach_arm_ep9312 11
- .#define bfd_mach_arm_iWMMXt 12
- .#define bfd_mach_arm_iWMMXt2 13
-+. bfd_arch_nds32, {* Andes NDS32 *}
-+.#define bfd_mach_n1 1
-+.#define bfd_mach_n1h 2
-+.#define bfd_mach_n1h_v2 3
-+.#define bfd_mach_n1h_v3 4
-+.#define bfd_mach_n1h_v3m 5
- . bfd_arch_ns32k, {* National Semiconductors ns32000 *}
- . bfd_arch_w65, {* WDC 65816 *}
- . bfd_arch_tic30, {* Texas Instruments TMS320C30 *}
-@@ -574,6 +580,7 @@
- extern const bfd_arch_info_type bfd_moxie_arch;
- extern const bfd_arch_info_type bfd_msp430_arch;
- extern const bfd_arch_info_type bfd_mt_arch;
-+extern const bfd_arch_info_type bfd_nds32_arch;
- extern const bfd_arch_info_type bfd_nios2_arch;
- extern const bfd_arch_info_type bfd_ns32k_arch;
- extern const bfd_arch_info_type bfd_openrisc_arch;
-@@ -663,6 +670,7 @@
- &bfd_moxie_arch,
- &bfd_msp430_arch,
- &bfd_mt_arch,
-+ &bfd_nds32_arch,
- &bfd_nios2_arch,
- &bfd_ns32k_arch,
- &bfd_openrisc_arch,
-diff -Nur binutils-2.24.orig/bfd/bfd.c binutils-2.24/bfd/bfd.c
---- binutils-2.24.orig/bfd/bfd.c 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/bfd/bfd.c 2016-06-30 21:26:12.537888600 +0200
-@@ -311,6 +311,14 @@
- . unsigned int selective_search : 1;
- .};
- .
-+.{* See note beside bfd_set_section_userdata. *}
-+.static inline bfd_boolean
-+.bfd_set_cacheable (bfd * abfd, bfd_boolean val)
-+.{
-+. abfd->cacheable = val;
-+. return TRUE;
-+.}
-+.
- */
-
- #include "sysdep.h"
-diff -Nur binutils-2.24.orig/bfd/bfd-in2.h binutils-2.24/bfd/bfd-in2.h
---- binutils-2.24.orig/bfd/bfd-in2.h 2013-11-18 09:40:15.000000000 +0100
-+++ binutils-2.24/bfd/bfd-in2.h 2016-06-30 21:26:12.541888755 +0200
-@@ -299,9 +299,6 @@
-
- #define bfd_is_com_section(ptr) (((ptr)->flags & SEC_IS_COMMON) != 0)
-
--#define bfd_set_section_vma(bfd, ptr, val) (((ptr)->vma = (ptr)->lma = (val)), ((ptr)->user_set_vma = TRUE), TRUE)
--#define bfd_set_section_alignment(bfd, ptr, val) (((ptr)->alignment_power = (val)),TRUE)
--#define bfd_set_section_userdata(bfd, ptr, val) (((ptr)->userdata = (val)),TRUE)
- /* Find the address one past the end of SEC. */
- #define bfd_get_section_limit(bfd, sec) \
- (((bfd)->direction != write_direction && (sec)->rawsize != 0 \
-@@ -524,8 +521,6 @@
-
- #define bfd_get_symbol_leading_char(abfd) ((abfd)->xvec->symbol_leading_char)
-
--#define bfd_set_cacheable(abfd,bool) (((abfd)->cacheable = bool), TRUE)
--
- extern bfd_boolean bfd_cache_close
- (bfd *abfd);
- /* NB: This declaration should match the autogenerated one in libbfd.h. */
-@@ -1594,6 +1589,32 @@
- int size;
- };
-
-+/* Note: the following are provided as inline functions rather than macros
-+ because not all callers use the return value. A macro implementation
-+ would use a comma expression, eg: "((ptr)->foo = val, TRUE)" and some
-+ compilers will complain about comma expressions that have no effect. */
-+static inline bfd_boolean
-+bfd_set_section_userdata (bfd * abfd ATTRIBUTE_UNUSED, asection * ptr, void * val)
-+{
-+ ptr->userdata = val;
-+ return TRUE;
-+}
-+
-+static inline bfd_boolean
-+bfd_set_section_vma (bfd * abfd ATTRIBUTE_UNUSED, asection * ptr, bfd_vma val)
-+{
-+ ptr->vma = ptr->lma = val;
-+ ptr->user_set_vma = TRUE;
-+ return TRUE;
-+}
-+
-+static inline bfd_boolean
-+bfd_set_section_alignment (bfd * abfd ATTRIBUTE_UNUSED, asection * ptr, unsigned int val)
-+{
-+ ptr->alignment_power = val;
-+ return TRUE;
-+}
-+
- /* These sections are global, and are managed by BFD. The application
- and target back end are not permitted to change the values in
- these sections. */
-@@ -2071,6 +2092,12 @@
- #define bfd_mach_arm_ep9312 11
- #define bfd_mach_arm_iWMMXt 12
- #define bfd_mach_arm_iWMMXt2 13
-+ bfd_arch_nds32, /* Andes NDS32 */
-+#define bfd_mach_n1 1
-+#define bfd_mach_n1h 2
-+#define bfd_mach_n1h_v2 3
-+#define bfd_mach_n1h_v3 4
-+#define bfd_mach_n1h_v3m 5
- bfd_arch_ns32k, /* National Semiconductors ns32000 */
- bfd_arch_w65, /* WDC 65816 */
- bfd_arch_tic30, /* Texas Instruments TMS320C30 */
-@@ -3794,6 +3821,229 @@
- BFD_RELOC_M32R_GOTPC_HI_SLO,
- BFD_RELOC_M32R_GOTPC_LO,
-
-+/* NDS32 relocs.
-+This is a 20 bit absolute address. */
-+ BFD_RELOC_NDS32_20,
-+
-+/* This is a 9-bit pc-relative reloc with the right 1 bit assumed to be 0. */
-+ BFD_RELOC_NDS32_9_PCREL,
-+
-+/* This is a 9-bit pc-relative reloc with the right 1 bit assumed to be 0. */
-+ BFD_RELOC_NDS32_WORD_9_PCREL,
-+
-+/* This is an 15-bit reloc with the right 1 bit assumed to be 0. */
-+ BFD_RELOC_NDS32_15_PCREL,
-+
-+/* This is an 17-bit reloc with the right 1 bit assumed to be 0. */
-+ BFD_RELOC_NDS32_17_PCREL,
-+
-+/* This is a 25-bit reloc with the right 1 bit assumed to be 0. */
-+ BFD_RELOC_NDS32_25_PCREL,
-+
-+/* This is a 20-bit reloc containing the high 20 bits of an address
-+used with the lower 12 bits */
-+ BFD_RELOC_NDS32_HI20,
-+
-+/* This is a 12-bit reloc containing the lower 12 bits of an address
-+then shift right by 3. This is used with ldi,sdi... */
-+ BFD_RELOC_NDS32_LO12S3,
-+
-+/* This is a 12-bit reloc containing the lower 12 bits of an address
-+then shift left by 2. This is used with lwi,swi... */
-+ BFD_RELOC_NDS32_LO12S2,
-+
-+/* This is a 12-bit reloc containing the lower 12 bits of an address
-+then shift left by 1. This is used with lhi,shi... */
-+ BFD_RELOC_NDS32_LO12S1,
-+
-+/* This is a 12-bit reloc containing the lower 12 bits of an address
-+then shift left by 0. This is used with lbisbi... */
-+ BFD_RELOC_NDS32_LO12S0,
-+
-+/* This is a 12-bit reloc containing the lower 12 bits of an address
-+then shift left by 0. This is only used with branch relaxations */
-+ BFD_RELOC_NDS32_LO12S0_ORI,
-+
-+/* This is a 15-bit reloc containing the small data area 18-bit signed offset
-+and shift left by 3 for use in ldi, sdi... */
-+ BFD_RELOC_NDS32_SDA15S3,
-+
-+/* This is a 15-bit reloc containing the small data area 17-bit signed offset
-+and shift left by 2 for use in lwi, swi... */
-+ BFD_RELOC_NDS32_SDA15S2,
-+
-+/* This is a 15-bit reloc containing the small data area 16-bit signed offset
-+and shift left by 1 for use in lhi, shi... */
-+ BFD_RELOC_NDS32_SDA15S1,
-+
-+/* This is a 15-bit reloc containing the small data area 15-bit signed offset
-+and shift left by 0 for use in lbi, sbi... */
-+ BFD_RELOC_NDS32_SDA15S0,
-+
-+/* This is a 16-bit reloc containing the small data area 16-bit signed offset
-+and shift left by 3 */
-+ BFD_RELOC_NDS32_SDA16S3,
-+
-+/* This is a 17-bit reloc containing the small data area 17-bit signed offset
-+and shift left by 2 for use in lwi.gp, swi.gp... */
-+ BFD_RELOC_NDS32_SDA17S2,
-+
-+/* This is a 18-bit reloc containing the small data area 18-bit signed offset
-+and shift left by 1 for use in lhi.gp, shi.gp... */
-+ BFD_RELOC_NDS32_SDA18S1,
-+
-+/* This is a 19-bit reloc containing the small data area 19-bit signed offset
-+and shift left by 0 for use in lbi.gp, sbi.gp... */
-+ BFD_RELOC_NDS32_SDA19S0,
-+
-+/* This is a 24-bit reloc for security check sum. */
-+ BFD_RELOC_NDS32_SECURITY_16,
-+
-+/* for PIC */
-+ BFD_RELOC_NDS32_GOT20,
-+ BFD_RELOC_NDS32_9_PLTREL,
-+ BFD_RELOC_NDS32_25_PLTREL,
-+ BFD_RELOC_NDS32_COPY,
-+ BFD_RELOC_NDS32_GLOB_DAT,
-+ BFD_RELOC_NDS32_JMP_SLOT,
-+ BFD_RELOC_NDS32_RELATIVE,
-+ BFD_RELOC_NDS32_GOTOFF,
-+ BFD_RELOC_NDS32_GOTOFF_HI20,
-+ BFD_RELOC_NDS32_GOTOFF_LO12,
-+ BFD_RELOC_NDS32_GOTPC20,
-+ BFD_RELOC_NDS32_GOT_HI20,
-+ BFD_RELOC_NDS32_GOT_LO12,
-+ BFD_RELOC_NDS32_GOTPC_HI20,
-+ BFD_RELOC_NDS32_GOTPC_LO12,
-+
-+/* for relax */
-+ BFD_RELOC_NDS32_INSN16,
-+ BFD_RELOC_NDS32_LABEL,
-+ BFD_RELOC_NDS32_LONGCALL1,
-+ BFD_RELOC_NDS32_LONGCALL2,
-+ BFD_RELOC_NDS32_LONGCALL3,
-+ BFD_RELOC_NDS32_LONGJUMP1,
-+ BFD_RELOC_NDS32_LONGJUMP2,
-+ BFD_RELOC_NDS32_LONGJUMP3,
-+ BFD_RELOC_NDS32_LOADSTORE,
-+ BFD_RELOC_NDS32_9_FIXED,
-+ BFD_RELOC_NDS32_15_FIXED,
-+ BFD_RELOC_NDS32_17_FIXED,
-+ BFD_RELOC_NDS32_25_FIXED,
-+ BFD_RELOC_NDS32_LONGCALL4,
-+ BFD_RELOC_NDS32_LONGCALL5,
-+ BFD_RELOC_NDS32_LONGCALL6,
-+ BFD_RELOC_NDS32_LONGJUMP4,
-+ BFD_RELOC_NDS32_LONGJUMP5,
-+ BFD_RELOC_NDS32_LONGJUMP6,
-+ BFD_RELOC_NDS32_LONGJUMP7,
-+
-+/* for PIC */
-+ BFD_RELOC_NDS32_PLTREL_HI20,
-+ BFD_RELOC_NDS32_PLTREL_LO12,
-+ BFD_RELOC_NDS32_PLT_GOTREL_HI20,
-+ BFD_RELOC_NDS32_PLT_GOTREL_LO12,
-+
-+/* for floating point */
-+ BFD_RELOC_NDS32_SDA12S2_DP,
-+ BFD_RELOC_NDS32_SDA12S2_SP,
-+ BFD_RELOC_NDS32_LO12S2_DP,
-+ BFD_RELOC_NDS32_LO12S2_SP,
-+
-+/* for dwarf2 debug_line. */
-+ BFD_RELOC_NDS32_DWARF2_OP1,
-+ BFD_RELOC_NDS32_DWARF2_OP2,
-+ BFD_RELOC_NDS32_DWARF2_LEB,
-+
-+/* for eliminate 16-bit instructions */
-+ BFD_RELOC_NDS32_UPDATE_TA,
-+
-+/* for PIC object relaxation */
-+ BFD_RELOC_NDS32_PLT_GOTREL_LO20,
-+ BFD_RELOC_NDS32_PLT_GOTREL_LO15,
-+ BFD_RELOC_NDS32_PLT_GOTREL_LO19,
-+ BFD_RELOC_NDS32_GOT_LO15,
-+ BFD_RELOC_NDS32_GOT_LO19,
-+ BFD_RELOC_NDS32_GOTOFF_LO15,
-+ BFD_RELOC_NDS32_GOTOFF_LO19,
-+ BFD_RELOC_NDS32_GOT15S2,
-+ BFD_RELOC_NDS32_GOT17S2,
-+
-+/* NDS32 relocs.
-+This is a 5 bit absolute address. */
-+ BFD_RELOC_NDS32_5,
-+
-+/* This is a 10-bit unsigned pc-relative reloc with the right 1 bit assumed to be 0. */
-+ BFD_RELOC_NDS32_10_UPCREL,
-+
-+/* If fp were omitted, fp can used as another gp. */
-+ BFD_RELOC_NDS32_SDA_FP7U2_RELA,
-+
-+/* relaxation relative relocation types */
-+ BFD_RELOC_NDS32_RELAX_ENTRY,
-+ BFD_RELOC_NDS32_GOT_SUFF,
-+ BFD_RELOC_NDS32_GOTOFF_SUFF,
-+ BFD_RELOC_NDS32_PLT_GOT_SUFF,
-+ BFD_RELOC_NDS32_MULCALL_SUFF,
-+ BFD_RELOC_NDS32_PTR,
-+ BFD_RELOC_NDS32_PTR_COUNT,
-+ BFD_RELOC_NDS32_PTR_RESOLVED,
-+ BFD_RELOC_NDS32_PLTBLOCK,
-+ BFD_RELOC_NDS32_RELAX_REGION_BEGIN,
-+ BFD_RELOC_NDS32_RELAX_REGION_END,
-+ BFD_RELOC_NDS32_MINUEND,
-+ BFD_RELOC_NDS32_SUBTRAHEND,
-+ BFD_RELOC_NDS32_DIFF8,
-+ BFD_RELOC_NDS32_DIFF16,
-+ BFD_RELOC_NDS32_DIFF32,
-+ BFD_RELOC_NDS32_DIFF_ULEB128,
-+ BFD_RELOC_NDS32_EMPTY,
-+
-+/* This is a 25 bit absolute address. */
-+ BFD_RELOC_NDS32_25_ABS,
-+
-+/* For ex9 and ifc using. */
-+ BFD_RELOC_NDS32_DATA,
-+ BFD_RELOC_NDS32_TRAN,
-+ BFD_RELOC_NDS32_17IFC_PCREL,
-+ BFD_RELOC_NDS32_10IFCU_PCREL,
-+
-+/* For TLS. */
-+ BFD_RELOC_NDS32_TPOFF,
-+ BFD_RELOC_NDS32_GOTTPOFF,
-+ BFD_RELOC_NDS32_TLS_LE_HI20,
-+ BFD_RELOC_NDS32_TLS_LE_LO12,
-+ BFD_RELOC_NDS32_TLS_LE_20,
-+ BFD_RELOC_NDS32_TLS_LE_15S0,
-+ BFD_RELOC_NDS32_TLS_LE_15S1,
-+ BFD_RELOC_NDS32_TLS_LE_15S2,
-+ BFD_RELOC_NDS32_TLS_LE_ADD,
-+ BFD_RELOC_NDS32_TLS_LE_LS,
-+ BFD_RELOC_NDS32_TLS_IE_HI20,
-+ BFD_RELOC_NDS32_TLS_IE_LO12,
-+ BFD_RELOC_NDS32_TLS_IE_LO12S2,
-+ BFD_RELOC_NDS32_TLS_IEGP_HI20,
-+ BFD_RELOC_NDS32_TLS_IEGP_LO12,
-+ BFD_RELOC_NDS32_TLS_IEGP_LO12S2,
-+ BFD_RELOC_NDS32_TLS_IEGP_LW,
-+ BFD_RELOC_NDS32_TLS_DESC,
-+ BFD_RELOC_NDS32_TLS_DESC_HI20,
-+ BFD_RELOC_NDS32_TLS_DESC_LO12,
-+ BFD_RELOC_NDS32_TLS_DESC_20,
-+ BFD_RELOC_NDS32_TLS_DESC_SDA17S2,
-+ BFD_RELOC_NDS32_TLS_DESC_ADD,
-+ BFD_RELOC_NDS32_TLS_DESC_FUNC,
-+ BFD_RELOC_NDS32_TLS_DESC_CALL,
-+ BFD_RELOC_NDS32_TLS_DESC_MEM,
-+ BFD_RELOC_NDS32_REMOVE,
-+ BFD_RELOC_NDS32_GROUP,
-+
-+/* Jump-patch table relative relocations. */
-+ BFD_RELOC_NDS32_ICT,
-+ BFD_RELOC_NDS32_ICT_HI20,
-+ BFD_RELOC_NDS32_ICT_LO12,
-+ BFD_RELOC_NDS32_ICT_25PC,
-+
- /* This is a 9-bit reloc */
- BFD_RELOC_V850_9_PCREL,
-
-@@ -6235,6 +6485,14 @@
- unsigned int selective_search : 1;
- };
-
-+/* See note beside bfd_set_section_userdata. */
-+static inline bfd_boolean
-+bfd_set_cacheable (bfd * abfd, bfd_boolean val)
-+{
-+ abfd->cacheable = val;
-+ return TRUE;
-+}
-+
- typedef enum bfd_error
- {
- bfd_error_no_error = 0,
-diff -Nur binutils-2.24.orig/bfd/bfd-in.h binutils-2.24/bfd/bfd-in.h
---- binutils-2.24.orig/bfd/bfd-in.h 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/bfd/bfd-in.h 2016-06-30 21:26:12.541888755 +0200
-@@ -292,9 +292,6 @@
-
- #define bfd_is_com_section(ptr) (((ptr)->flags & SEC_IS_COMMON) != 0)
-
--#define bfd_set_section_vma(bfd, ptr, val) (((ptr)->vma = (ptr)->lma = (val)), ((ptr)->user_set_vma = TRUE), TRUE)
--#define bfd_set_section_alignment(bfd, ptr, val) (((ptr)->alignment_power = (val)),TRUE)
--#define bfd_set_section_userdata(bfd, ptr, val) (((ptr)->userdata = (val)),TRUE)
- /* Find the address one past the end of SEC. */
- #define bfd_get_section_limit(bfd, sec) \
- (((bfd)->direction != write_direction && (sec)->rawsize != 0 \
-@@ -517,8 +514,6 @@
-
- #define bfd_get_symbol_leading_char(abfd) ((abfd)->xvec->symbol_leading_char)
-
--#define bfd_set_cacheable(abfd,bool) (((abfd)->cacheable = bool), TRUE)
--
- extern bfd_boolean bfd_cache_close
- (bfd *abfd);
- /* NB: This declaration should match the autogenerated one in libbfd.h. */
-diff -Nur binutils-2.24.orig/bfd/config.bfd binutils-2.24/bfd/config.bfd
---- binutils-2.24.orig/bfd/config.bfd 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/bfd/config.bfd 2016-06-30 21:26:12.541888755 +0200
-@@ -6,12 +6,12 @@
- # it under the terms of the GNU General Public License as published by
- # the Free Software Foundation; either version 3 of the License, or
- # (at your option) any later version.
--#
-+#
- # This program is distributed in the hope that it will be useful,
- # but WITHOUT ANY WARRANTY; without even the implied warranty of
- # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- # GNU General Public License for more details.
--#
-+#
- # You should have received a copy of the GNU General Public License
- # along with this program; see the file COPYING3. If not see
- # <http://www.gnu.org/licenses/>.
-@@ -109,6 +109,7 @@
- m88*) targ_archs=bfd_m88k_arch ;;
- microblaze*) targ_archs=bfd_microblaze_arch ;;
- mips*) targ_archs=bfd_mips_arch ;;
-+nds32*) targ_archs=bfd_nds32_arch ;;
- nios2*) targ_archs=bfd_nios2_arch ;;
- or32*) targ_archs=bfd_or32_arch ;;
- pdp11*) targ_archs=bfd_pdp11_arch ;;
-@@ -1120,6 +1121,28 @@
- targ_selvecs=bfd_elf32_msp430_ti_vec
- ;;
-
-+ nds32*le-*-linux*)
-+ targ_defvec=bfd_elf32_nds32lelin_vec
-+ targ_selvecs=bfd_elf32_nds32belin_vec
-+ targ_cflags=-DNDS32_LINUX_TOOLCHAIN
-+ ;;
-+
-+ nds32*be-*-linux*)
-+ targ_defvec=bfd_elf32_nds32belin_vec
-+ targ_selvecs=bfd_elf32_nds32lelin_vec
-+ targ_cflags=-DNDS32_LINUX_TOOLCHAIN
-+ ;;
-+
-+ nds32*le-*-*)
-+ targ_defvec=bfd_elf32_nds32le_vec
-+ targ_selvecs=bfd_elf32_nds32be_vec
-+ ;;
-+
-+ nds32*be-*-*)
-+ targ_defvec=bfd_elf32_nds32be_vec
-+ targ_selvecs=bfd_elf32_nds32le_vec
-+ ;;
-+
- ns32k-pc532-mach* | ns32k-pc532-ux*)
- targ_defvec=pc532machaout_vec
- targ_underscore=yes
-@@ -1640,12 +1663,12 @@
- w65-*-*)
- targ_defvec=w65_vec
- ;;
--
-+
- xgate-*-*)
- targ_defvec=bfd_elf32_xgate_vec
- targ_selvecs="bfd_elf32_xgate_vec"
- ;;
--
-+
- xstormy16-*-elf)
- targ_defvec=bfd_elf32_xstormy16_vec
- ;;
-diff -Nur binutils-2.24.orig/bfd/configure binutils-2.24/bfd/configure
---- binutils-2.24.orig/bfd/configure 2013-12-02 10:30:30.000000000 +0100
-+++ binutils-2.24/bfd/configure 2016-06-30 21:26:12.545888911 +0200
-@@ -15307,6 +15307,10 @@
- tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
- bfd_elf32_ntradlittlemips_vec | bfd_elf32_ntradlittlemips_freebsd_vec)
- tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
-+ bfd_elf32_nds32le_vec) tb="$tb elf32-nds32.lo elf32.lo $elf" ;;
-+ bfd_elf32_nds32be_vec) tb="$tb elf32-nds32.lo elf32.lo $elf" ;;
-+ bfd_elf32_nds32lelin_vec) tb="$tb elf32-nds32.lo elf32.lo $elf" ;;
-+ bfd_elf32_nds32belin_vec) tb="$tb elf32-nds32.lo elf32.lo $elf" ;;
- bfd_elf32_openrisc_vec) tb="$tb elf32-openrisc.lo elf32.lo $elf" ;;
- bfd_elf32_or32_big_vec) tb="$tb elf32-or32.lo elf32.lo $elf" ;;
- bfd_elf32_pj_vec) tb="$tb elf32-pj.lo elf32.lo $elf";;
-diff -Nur binutils-2.24.orig/bfd/configure.in binutils-2.24/bfd/configure.in
---- binutils-2.24.orig/bfd/configure.in 2013-12-02 10:30:28.000000000 +0100
-+++ binutils-2.24/bfd/configure.in 2016-06-30 21:26:12.545888911 +0200
-@@ -796,6 +796,10 @@
- tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
- bfd_elf32_ntradlittlemips_vec | bfd_elf32_ntradlittlemips_freebsd_vec)
- tb="$tb elfn32-mips.lo elfxx-mips.lo elf-vxworks.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
-+ bfd_elf32_nds32be_vec) tb="$tb elf32-nds32.lo elf32.lo $elf" ;;
-+ bfd_elf32_nds32le_vec) tb="$tb elf32-nds32.lo elf32.lo $elf" ;;
-+ bfd_elf32_nds32belin_vec) tb="$tb elf32-nds32.lo elf32.lo $elf" ;;
-+ bfd_elf32_nds32lelin_vec) tb="$tb elf32-nds32.lo elf32.lo $elf" ;;
- bfd_elf32_openrisc_vec) tb="$tb elf32-openrisc.lo elf32.lo $elf" ;;
- bfd_elf32_or32_big_vec) tb="$tb elf32-or32.lo elf32.lo $elf" ;;
- bfd_elf32_pj_vec) tb="$tb elf32-pj.lo elf32.lo $elf";;
-diff -Nur binutils-2.24.orig/bfd/cpu-nds32.c binutils-2.24/bfd/cpu-nds32.c
---- binutils-2.24.orig/bfd/cpu-nds32.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/bfd/cpu-nds32.c 2016-06-30 21:26:12.545888911 +0200
-@@ -0,0 +1,44 @@
-+/* BFD support for the NDS32 processor
-+ Copyright (C) 2012-2013 Free Software Foundation, Inc.
-+ Contributed by Andes Technology Corporation.
-+
-+ This file is part of BFD, the Binary File Descriptor library.
-+
-+ This program is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 3 of the License, or
-+ (at your option) any later version.
-+
-+ This program is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ You should have received a copy of the GNU General Public License
-+ along with this program; if not, write to the Free Software
-+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-+ 02110-1301, USA. */
-+
-+#include "sysdep.h"
-+#include "bfd.h"
-+#include "libbfd.h"
-+#include "elf-bfd.h"
-+
-+#define N(number, print, default, next) \
-+ {32, 32, 8, bfd_arch_nds32, number, "nds32", print, 4, default, \
-+ bfd_default_compatible, bfd_default_scan, bfd_arch_default_fill, next }
-+
-+#define NEXT &arch_info_struct[0]
-+#define NDS32V2_NEXT &arch_info_struct[1]
-+#define NDS32V3_NEXT &arch_info_struct[2]
-+#define NDS32V3M_NEXT &arch_info_struct[3]
-+
-+static const bfd_arch_info_type arch_info_struct[] = {
-+ N (bfd_mach_n1h, "n1h", FALSE, NDS32V2_NEXT),
-+ N (bfd_mach_n1h_v2, "n1h_v2", FALSE, NDS32V3_NEXT),
-+ N (bfd_mach_n1h_v3, "n1h_v3", FALSE, NDS32V3M_NEXT),
-+ N (bfd_mach_n1h_v3m, "n1h_v3m", FALSE, NULL),
-+};
-+
-+const bfd_arch_info_type bfd_nds32_arch =
-+ N (bfd_mach_n1, "n1h", TRUE, NEXT);
-diff -Nur binutils-2.24.orig/bfd/doc/aoutx.texi binutils-2.24/bfd/doc/aoutx.texi
---- binutils-2.24.orig/bfd/doc/aoutx.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/aoutx.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,213 +0,0 @@
--@section a.out backends
--
--
--@strong{Description}@*
--BFD supports a number of different flavours of a.out format,
--though the major differences are only the sizes of the
--structures on disk, and the shape of the relocation
--information.
--
--The support is split into a basic support file @file{aoutx.h}
--and other files which derive functions from the base. One
--derivation file is @file{aoutf1.h} (for a.out flavour 1), and
--adds to the basic a.out functions support for sun3, sun4, 386
--and 29k a.out files, to create a target jump vector for a
--specific target.
--
--This information is further split out into more specific files
--for each machine, including @file{sunos.c} for sun3 and sun4,
--@file{newsos3.c} for the Sony NEWS, and @file{demo64.c} for a
--demonstration of a 64 bit a.out format.
--
--The base file @file{aoutx.h} defines general mechanisms for
--reading and writing records to and from disk and various
--other methods which BFD requires. It is included by
--@file{aout32.c} and @file{aout64.c} to form the names
--@code{aout_32_swap_exec_header_in}, @code{aout_64_swap_exec_header_in}, etc.
--
--As an example, this is what goes on to make the back end for a
--sun4, from @file{aout32.c}:
--
--@example
-- #define ARCH_SIZE 32
-- #include "aoutx.h"
--@end example
--
--Which exports names:
--
--@example
-- ...
-- aout_32_canonicalize_reloc
-- aout_32_find_nearest_line
-- aout_32_get_lineno
-- aout_32_get_reloc_upper_bound
-- ...
--@end example
--
--from @file{sunos.c}:
--
--@example
-- #define TARGET_NAME "a.out-sunos-big"
-- #define VECNAME sunos_big_vec
-- #include "aoutf1.h"
--@end example
--
--requires all the names from @file{aout32.c}, and produces the jump vector
--
--@example
-- sunos_big_vec
--@end example
--
--The file @file{host-aout.c} is a special case. It is for a large set
--of hosts that use ``more or less standard'' a.out files, and
--for which cross-debugging is not interesting. It uses the
--standard 32-bit a.out support routines, but determines the
--file offsets and addresses of the text, data, and BSS
--sections, the machine architecture and machine type, and the
--entry point address, in a host-dependent manner. Once these
--values have been determined, generic code is used to handle
--the object file.
--
--When porting it to run on a new system, you must supply:
--
--@example
-- HOST_PAGE_SIZE
-- HOST_SEGMENT_SIZE
-- HOST_MACHINE_ARCH (optional)
-- HOST_MACHINE_MACHINE (optional)
-- HOST_TEXT_START_ADDR
-- HOST_STACK_END_ADDR
--@end example
--
--in the file @file{../include/sys/h-@var{XXX}.h} (for your host). These
--values, plus the structures and macros defined in @file{a.out.h} on
--your host system, will produce a BFD target that will access
--ordinary a.out files on your host. To configure a new machine
--to use @file{host-aout.c}, specify:
--
--@example
-- TDEFAULTS = -DDEFAULT_VECTOR=host_aout_big_vec
-- TDEPFILES= host-aout.o trad-core.o
--@end example
--
--in the @file{config/@var{XXX}.mt} file, and modify @file{configure.in}
--to use the
--@file{@var{XXX}.mt} file (by setting "@code{bfd_target=XXX}") when your
--configuration is selected.
--
--@subsection Relocations
--
--
--@strong{Description}@*
--The file @file{aoutx.h} provides for both the @emph{standard}
--and @emph{extended} forms of a.out relocation records.
--
--The standard records contain only an
--address, a symbol index, and a type field. The extended records
--(used on 29ks and sparcs) also have a full integer for an
--addend.
--
--@subsection Internal entry points
--
--
--@strong{Description}@*
--@file{aoutx.h} exports several routines for accessing the
--contents of an a.out file, which are gathered and exported in
--turn by various format specific files (eg sunos.c).
--
--@findex aout_@var{size}_swap_exec_header_in
--@subsubsection @code{aout_@var{size}_swap_exec_header_in}
--@strong{Synopsis}
--@example
--void aout_@var{size}_swap_exec_header_in,
-- (bfd *abfd,
-- struct external_exec *bytes,
-- struct internal_exec *execp);
--@end example
--@strong{Description}@*
--Swap the information in an executable header @var{raw_bytes} taken
--from a raw byte stream memory image into the internal exec header
--structure @var{execp}.
--
--@findex aout_@var{size}_swap_exec_header_out
--@subsubsection @code{aout_@var{size}_swap_exec_header_out}
--@strong{Synopsis}
--@example
--void aout_@var{size}_swap_exec_header_out
-- (bfd *abfd,
-- struct internal_exec *execp,
-- struct external_exec *raw_bytes);
--@end example
--@strong{Description}@*
--Swap the information in an internal exec header structure
--@var{execp} into the buffer @var{raw_bytes} ready for writing to disk.
--
--@findex aout_@var{size}_some_aout_object_p
--@subsubsection @code{aout_@var{size}_some_aout_object_p}
--@strong{Synopsis}
--@example
--const bfd_target *aout_@var{size}_some_aout_object_p
-- (bfd *abfd,
-- struct internal_exec *execp,
-- const bfd_target *(*callback_to_real_object_p) (bfd *));
--@end example
--@strong{Description}@*
--Some a.out variant thinks that the file open in @var{abfd}
--checking is an a.out file. Do some more checking, and set up
--for access if it really is. Call back to the calling
--environment's "finish up" function just before returning, to
--handle any last-minute setup.
--
--@findex aout_@var{size}_mkobject
--@subsubsection @code{aout_@var{size}_mkobject}
--@strong{Synopsis}
--@example
--bfd_boolean aout_@var{size}_mkobject, (bfd *abfd);
--@end example
--@strong{Description}@*
--Initialize BFD @var{abfd} for use with a.out files.
--
--@findex aout_@var{size}_machine_type
--@subsubsection @code{aout_@var{size}_machine_type}
--@strong{Synopsis}
--@example
--enum machine_type aout_@var{size}_machine_type
-- (enum bfd_architecture arch,
-- unsigned long machine,
-- bfd_boolean *unknown);
--@end example
--@strong{Description}@*
--Keep track of machine architecture and machine type for
--a.out's. Return the @code{machine_type} for a particular
--architecture and machine, or @code{M_UNKNOWN} if that exact architecture
--and machine can't be represented in a.out format.
--
--If the architecture is understood, machine type 0 (default)
--is always understood.
--
--@findex aout_@var{size}_set_arch_mach
--@subsubsection @code{aout_@var{size}_set_arch_mach}
--@strong{Synopsis}
--@example
--bfd_boolean aout_@var{size}_set_arch_mach,
-- (bfd *,
-- enum bfd_architecture arch,
-- unsigned long machine);
--@end example
--@strong{Description}@*
--Set the architecture and the machine of the BFD @var{abfd} to the
--values @var{arch} and @var{machine}. Verify that @var{abfd}'s format
--can support the architecture required.
--
--@findex aout_@var{size}_new_section_hook
--@subsubsection @code{aout_@var{size}_new_section_hook}
--@strong{Synopsis}
--@example
--bfd_boolean aout_@var{size}_new_section_hook,
-- (bfd *abfd,
-- asection *newsect);
--@end example
--@strong{Description}@*
--Called by the BFD in response to a @code{bfd_make_section}
--request.
--
-diff -Nur binutils-2.24.orig/bfd/doc/archive.texi binutils-2.24/bfd/doc/archive.texi
---- binutils-2.24.orig/bfd/doc/archive.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/archive.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,105 +0,0 @@
--@section Archives
--
--
--@strong{Description}@*
--An archive (or library) is just another BFD. It has a symbol
--table, although there's not much a user program will do with it.
--
--The big difference between an archive BFD and an ordinary BFD
--is that the archive doesn't have sections. Instead it has a
--chain of BFDs that are considered its contents. These BFDs can
--be manipulated like any other. The BFDs contained in an
--archive opened for reading will all be opened for reading. You
--may put either input or output BFDs into an archive opened for
--output; they will be handled correctly when the archive is closed.
--
--Use @code{bfd_openr_next_archived_file} to step through
--the contents of an archive opened for input. You don't
--have to read the entire archive if you don't want
--to! Read it until you find what you want.
--
--A BFD returned by @code{bfd_openr_next_archived_file} can be
--closed manually with @code{bfd_close}. If you do not close it,
--then a second iteration through the members of an archive may
--return the same BFD. If you close the archive BFD, then all
--the member BFDs will automatically be closed as well.
--
--Archive contents of output BFDs are chained through the
--@code{archive_next} pointer in a BFD. The first one is findable
--through the @code{archive_head} slot of the archive. Set it with
--@code{bfd_set_archive_head} (q.v.). A given BFD may be in only
--one open output archive at a time.
--
--As expected, the BFD archive code is more general than the
--archive code of any given environment. BFD archives may
--contain files of different formats (e.g., a.out and coff) and
--even different architectures. You may even place archives
--recursively into archives!
--
--This can cause unexpected confusion, since some archive
--formats are more expressive than others. For instance, Intel
--COFF archives can preserve long filenames; SunOS a.out archives
--cannot. If you move a file from the first to the second
--format and back again, the filename may be truncated.
--Likewise, different a.out environments have different
--conventions as to how they truncate filenames, whether they
--preserve directory names in filenames, etc. When
--interoperating with native tools, be sure your files are
--homogeneous.
--
--Beware: most of these formats do not react well to the
--presence of spaces in filenames. We do the best we can, but
--can't always handle this case due to restrictions in the format of
--archives. Many Unix utilities are braindead in regards to
--spaces and such in filenames anyway, so this shouldn't be much
--of a restriction.
--
--Archives are supported in BFD in @code{archive.c}.
--
--@subsection Archive functions
--
--
--@findex bfd_get_next_mapent
--@subsubsection @code{bfd_get_next_mapent}
--@strong{Synopsis}
--@example
--symindex bfd_get_next_mapent
-- (bfd *abfd, symindex previous, carsym **sym);
--@end example
--@strong{Description}@*
--Step through archive @var{abfd}'s symbol table (if it
--has one). Successively update @var{sym} with the next symbol's
--information, returning that symbol's (internal) index into the
--symbol table.
--
--Supply @code{BFD_NO_MORE_SYMBOLS} as the @var{previous} entry to get
--the first one; returns @code{BFD_NO_MORE_SYMBOLS} when you've already
--got the last one.
--
--A @code{carsym} is a canonical archive symbol. The only
--user-visible element is its name, a null-terminated string.
--
--@findex bfd_set_archive_head
--@subsubsection @code{bfd_set_archive_head}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_set_archive_head (bfd *output, bfd *new_head);
--@end example
--@strong{Description}@*
--Set the head of the chain of
--BFDs contained in the archive @var{output} to @var{new_head}.
--
--@findex bfd_openr_next_archived_file
--@subsubsection @code{bfd_openr_next_archived_file}
--@strong{Synopsis}
--@example
--bfd *bfd_openr_next_archived_file (bfd *archive, bfd *previous);
--@end example
--@strong{Description}@*
--Provided a BFD, @var{archive}, containing an archive and NULL, open
--an input BFD on the first contained element and returns that.
--Subsequent calls should pass
--the archive and the previous return value to return a created
--BFD to the next contained element. NULL is returned when there
--are no more.
--
-diff -Nur binutils-2.24.orig/bfd/doc/archures.texi binutils-2.24/bfd/doc/archures.texi
---- binutils-2.24.orig/bfd/doc/archures.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/archures.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,706 +0,0 @@
--@section Architectures
--BFD keeps one atom in a BFD describing the
--architecture of the data attached to the BFD: a pointer to a
--@code{bfd_arch_info_type}.
--
--Pointers to structures can be requested independently of a BFD
--so that an architecture's information can be interrogated
--without access to an open BFD.
--
--The architecture information is provided by each architecture package.
--The set of default architectures is selected by the macro
--@code{SELECT_ARCHITECTURES}. This is normally set up in the
--@file{config/@var{target}.mt} file of your choice. If the name is not
--defined, then all the architectures supported are included.
--
--When BFD starts up, all the architectures are called with an
--initialize method. It is up to the architecture back end to
--insert as many items into the list of architectures as it wants to;
--generally this would be one for each machine and one for the
--default case (an item with a machine field of 0).
--
--BFD's idea of an architecture is implemented in @file{archures.c}.
--
--@subsection bfd_architecture
--
--
--@strong{Description}@*
--This enum gives the object file's CPU architecture, in a
--global sense---i.e., what processor family does it belong to?
--Another field indicates which processor within
--the family is in use. The machine gives a number which
--distinguishes different versions of the architecture,
--containing, for example, 2 and 3 for Intel i960 KA and i960 KB,
--and 68020 and 68030 for Motorola 68020 and 68030.
--@example
--enum bfd_architecture
--@{
-- bfd_arch_unknown, /* File arch not known. */
-- bfd_arch_obscure, /* Arch known, not one of these. */
-- bfd_arch_m68k, /* Motorola 68xxx */
--#define bfd_mach_m68000 1
--#define bfd_mach_m68008 2
--#define bfd_mach_m68010 3
--#define bfd_mach_m68020 4
--#define bfd_mach_m68030 5
--#define bfd_mach_m68040 6
--#define bfd_mach_m68060 7
--#define bfd_mach_cpu32 8
--#define bfd_mach_fido 9
--#define bfd_mach_mcf_isa_a_nodiv 10
--#define bfd_mach_mcf_isa_a 11
--#define bfd_mach_mcf_isa_a_mac 12
--#define bfd_mach_mcf_isa_a_emac 13
--#define bfd_mach_mcf_isa_aplus 14
--#define bfd_mach_mcf_isa_aplus_mac 15
--#define bfd_mach_mcf_isa_aplus_emac 16
--#define bfd_mach_mcf_isa_b_nousp 17
--#define bfd_mach_mcf_isa_b_nousp_mac 18
--#define bfd_mach_mcf_isa_b_nousp_emac 19
--#define bfd_mach_mcf_isa_b 20
--#define bfd_mach_mcf_isa_b_mac 21
--#define bfd_mach_mcf_isa_b_emac 22
--#define bfd_mach_mcf_isa_b_float 23
--#define bfd_mach_mcf_isa_b_float_mac 24
--#define bfd_mach_mcf_isa_b_float_emac 25
--#define bfd_mach_mcf_isa_c 26
--#define bfd_mach_mcf_isa_c_mac 27
--#define bfd_mach_mcf_isa_c_emac 28
--#define bfd_mach_mcf_isa_c_nodiv 29
--#define bfd_mach_mcf_isa_c_nodiv_mac 30
--#define bfd_mach_mcf_isa_c_nodiv_emac 31
-- bfd_arch_vax, /* DEC Vax */
-- bfd_arch_i960, /* Intel 960 */
-- /* The order of the following is important.
-- lower number indicates a machine type that
-- only accepts a subset of the instructions
-- available to machines with higher numbers.
-- The exception is the "ca", which is
-- incompatible with all other machines except
-- "core". */
--
--#define bfd_mach_i960_core 1
--#define bfd_mach_i960_ka_sa 2
--#define bfd_mach_i960_kb_sb 3
--#define bfd_mach_i960_mc 4
--#define bfd_mach_i960_xa 5
--#define bfd_mach_i960_ca 6
--#define bfd_mach_i960_jx 7
--#define bfd_mach_i960_hx 8
--
-- bfd_arch_or32, /* OpenRISC 32 */
--
-- bfd_arch_sparc, /* SPARC */
--#define bfd_mach_sparc 1
--/* The difference between v8plus and v9 is that v9 is a true 64 bit env. */
--#define bfd_mach_sparc_sparclet 2
--#define bfd_mach_sparc_sparclite 3
--#define bfd_mach_sparc_v8plus 4
--#define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */
--#define bfd_mach_sparc_sparclite_le 6
--#define bfd_mach_sparc_v9 7
--#define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */
--#define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */
--#define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */
--/* Nonzero if MACH has the v9 instruction set. */
--#define bfd_mach_sparc_v9_p(mach) \
-- ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
-- && (mach) != bfd_mach_sparc_sparclite_le)
--/* Nonzero if MACH is a 64 bit sparc architecture. */
--#define bfd_mach_sparc_64bit_p(mach) \
-- ((mach) >= bfd_mach_sparc_v9 && (mach) != bfd_mach_sparc_v8plusb)
-- bfd_arch_spu, /* PowerPC SPU */
--#define bfd_mach_spu 256
-- bfd_arch_mips, /* MIPS Rxxxx */
--#define bfd_mach_mips3000 3000
--#define bfd_mach_mips3900 3900
--#define bfd_mach_mips4000 4000
--#define bfd_mach_mips4010 4010
--#define bfd_mach_mips4100 4100
--#define bfd_mach_mips4111 4111
--#define bfd_mach_mips4120 4120
--#define bfd_mach_mips4300 4300
--#define bfd_mach_mips4400 4400
--#define bfd_mach_mips4600 4600
--#define bfd_mach_mips4650 4650
--#define bfd_mach_mips5000 5000
--#define bfd_mach_mips5400 5400
--#define bfd_mach_mips5500 5500
--#define bfd_mach_mips5900 5900
--#define bfd_mach_mips6000 6000
--#define bfd_mach_mips7000 7000
--#define bfd_mach_mips8000 8000
--#define bfd_mach_mips9000 9000
--#define bfd_mach_mips10000 10000
--#define bfd_mach_mips12000 12000
--#define bfd_mach_mips14000 14000
--#define bfd_mach_mips16000 16000
--#define bfd_mach_mips16 16
--#define bfd_mach_mips5 5
--#define bfd_mach_mips_loongson_2e 3001
--#define bfd_mach_mips_loongson_2f 3002
--#define bfd_mach_mips_loongson_3a 3003
--#define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01 */
--#define bfd_mach_mips_octeon 6501
--#define bfd_mach_mips_octeonp 6601
--#define bfd_mach_mips_octeon2 6502
--#define bfd_mach_mips_xlr 887682 /* decimal 'XLR' */
--#define bfd_mach_mipsisa32 32
--#define bfd_mach_mipsisa32r2 33
--#define bfd_mach_mipsisa64 64
--#define bfd_mach_mipsisa64r2 65
--#define bfd_mach_mips_micromips 96
-- bfd_arch_i386, /* Intel 386 */
--#define bfd_mach_i386_intel_syntax (1 << 0)
--#define bfd_mach_i386_i8086 (1 << 1)
--#define bfd_mach_i386_i386 (1 << 2)
--#define bfd_mach_x86_64 (1 << 3)
--#define bfd_mach_x64_32 (1 << 4)
--#define bfd_mach_i386_i386_intel_syntax (bfd_mach_i386_i386 | bfd_mach_i386_intel_syntax)
--#define bfd_mach_x86_64_intel_syntax (bfd_mach_x86_64 | bfd_mach_i386_intel_syntax)
--#define bfd_mach_x64_32_intel_syntax (bfd_mach_x64_32 | bfd_mach_i386_intel_syntax)
-- bfd_arch_l1om, /* Intel L1OM */
--#define bfd_mach_l1om (1 << 5)
--#define bfd_mach_l1om_intel_syntax (bfd_mach_l1om | bfd_mach_i386_intel_syntax)
-- bfd_arch_k1om, /* Intel K1OM */
--#define bfd_mach_k1om (1 << 6)
--#define bfd_mach_k1om_intel_syntax (bfd_mach_k1om | bfd_mach_i386_intel_syntax)
--#define bfd_mach_i386_nacl (1 << 7)
--#define bfd_mach_i386_i386_nacl (bfd_mach_i386_i386 | bfd_mach_i386_nacl)
--#define bfd_mach_x86_64_nacl (bfd_mach_x86_64 | bfd_mach_i386_nacl)
--#define bfd_mach_x64_32_nacl (bfd_mach_x64_32 | bfd_mach_i386_nacl)
-- bfd_arch_we32k, /* AT&T WE32xxx */
-- bfd_arch_tahoe, /* CCI/Harris Tahoe */
-- bfd_arch_i860, /* Intel 860 */
-- bfd_arch_i370, /* IBM 360/370 Mainframes */
-- bfd_arch_romp, /* IBM ROMP PC/RT */
-- bfd_arch_convex, /* Convex */
-- bfd_arch_m88k, /* Motorola 88xxx */
-- bfd_arch_m98k, /* Motorola 98xxx */
-- bfd_arch_pyramid, /* Pyramid Technology */
-- bfd_arch_h8300, /* Renesas H8/300 (formerly Hitachi H8/300) */
--#define bfd_mach_h8300 1
--#define bfd_mach_h8300h 2
--#define bfd_mach_h8300s 3
--#define bfd_mach_h8300hn 4
--#define bfd_mach_h8300sn 5
--#define bfd_mach_h8300sx 6
--#define bfd_mach_h8300sxn 7
-- bfd_arch_pdp11, /* DEC PDP-11 */
-- bfd_arch_plugin,
-- bfd_arch_powerpc, /* PowerPC */
--#define bfd_mach_ppc 32
--#define bfd_mach_ppc64 64
--#define bfd_mach_ppc_403 403
--#define bfd_mach_ppc_403gc 4030
--#define bfd_mach_ppc_405 405
--#define bfd_mach_ppc_505 505
--#define bfd_mach_ppc_601 601
--#define bfd_mach_ppc_602 602
--#define bfd_mach_ppc_603 603
--#define bfd_mach_ppc_ec603e 6031
--#define bfd_mach_ppc_604 604
--#define bfd_mach_ppc_620 620
--#define bfd_mach_ppc_630 630
--#define bfd_mach_ppc_750 750
--#define bfd_mach_ppc_860 860
--#define bfd_mach_ppc_a35 35
--#define bfd_mach_ppc_rs64ii 642
--#define bfd_mach_ppc_rs64iii 643
--#define bfd_mach_ppc_7400 7400
--#define bfd_mach_ppc_e500 500
--#define bfd_mach_ppc_e500mc 5001
--#define bfd_mach_ppc_e500mc64 5005
--#define bfd_mach_ppc_e5500 5006
--#define bfd_mach_ppc_e6500 5007
--#define bfd_mach_ppc_titan 83
--#define bfd_mach_ppc_vle 84
-- bfd_arch_rs6000, /* IBM RS/6000 */
--#define bfd_mach_rs6k 6000
--#define bfd_mach_rs6k_rs1 6001
--#define bfd_mach_rs6k_rsc 6003
--#define bfd_mach_rs6k_rs2 6002
-- bfd_arch_hppa, /* HP PA RISC */
--#define bfd_mach_hppa10 10
--#define bfd_mach_hppa11 11
--#define bfd_mach_hppa20 20
--#define bfd_mach_hppa20w 25
-- bfd_arch_d10v, /* Mitsubishi D10V */
--#define bfd_mach_d10v 1
--#define bfd_mach_d10v_ts2 2
--#define bfd_mach_d10v_ts3 3
-- bfd_arch_d30v, /* Mitsubishi D30V */
-- bfd_arch_dlx, /* DLX */
-- bfd_arch_m68hc11, /* Motorola 68HC11 */
-- bfd_arch_m68hc12, /* Motorola 68HC12 */
--#define bfd_mach_m6812_default 0
--#define bfd_mach_m6812 1
--#define bfd_mach_m6812s 2
-- bfd_arch_m9s12x, /* Freescale S12X */
-- bfd_arch_m9s12xg, /* Freescale XGATE */
-- bfd_arch_z8k, /* Zilog Z8000 */
--#define bfd_mach_z8001 1
--#define bfd_mach_z8002 2
-- bfd_arch_h8500, /* Renesas H8/500 (formerly Hitachi H8/500) */
-- bfd_arch_sh, /* Renesas / SuperH SH (formerly Hitachi SH) */
--#define bfd_mach_sh 1
--#define bfd_mach_sh2 0x20
--#define bfd_mach_sh_dsp 0x2d
--#define bfd_mach_sh2a 0x2a
--#define bfd_mach_sh2a_nofpu 0x2b
--#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1
--#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2
--#define bfd_mach_sh2a_or_sh4 0x2a3
--#define bfd_mach_sh2a_or_sh3e 0x2a4
--#define bfd_mach_sh2e 0x2e
--#define bfd_mach_sh3 0x30
--#define bfd_mach_sh3_nommu 0x31
--#define bfd_mach_sh3_dsp 0x3d
--#define bfd_mach_sh3e 0x3e
--#define bfd_mach_sh4 0x40
--#define bfd_mach_sh4_nofpu 0x41
--#define bfd_mach_sh4_nommu_nofpu 0x42
--#define bfd_mach_sh4a 0x4a
--#define bfd_mach_sh4a_nofpu 0x4b
--#define bfd_mach_sh4al_dsp 0x4d
--#define bfd_mach_sh5 0x50
-- bfd_arch_alpha, /* Dec Alpha */
--#define bfd_mach_alpha_ev4 0x10
--#define bfd_mach_alpha_ev5 0x20
--#define bfd_mach_alpha_ev6 0x30
-- bfd_arch_arm, /* Advanced Risc Machines ARM. */
--#define bfd_mach_arm_unknown 0
--#define bfd_mach_arm_2 1
--#define bfd_mach_arm_2a 2
--#define bfd_mach_arm_3 3
--#define bfd_mach_arm_3M 4
--#define bfd_mach_arm_4 5
--#define bfd_mach_arm_4T 6
--#define bfd_mach_arm_5 7
--#define bfd_mach_arm_5T 8
--#define bfd_mach_arm_5TE 9
--#define bfd_mach_arm_XScale 10
--#define bfd_mach_arm_ep9312 11
--#define bfd_mach_arm_iWMMXt 12
--#define bfd_mach_arm_iWMMXt2 13
-- bfd_arch_ns32k, /* National Semiconductors ns32000 */
-- bfd_arch_w65, /* WDC 65816 */
-- bfd_arch_tic30, /* Texas Instruments TMS320C30 */
-- bfd_arch_tic4x, /* Texas Instruments TMS320C3X/4X */
--#define bfd_mach_tic3x 30
--#define bfd_mach_tic4x 40
-- bfd_arch_tic54x, /* Texas Instruments TMS320C54X */
-- bfd_arch_tic6x, /* Texas Instruments TMS320C6X */
-- bfd_arch_tic80, /* TI TMS320c80 (MVP) */
-- bfd_arch_v850, /* NEC V850 */
-- bfd_arch_v850_rh850,/* NEC V850 (using RH850 ABI) */
--#define bfd_mach_v850 1
--#define bfd_mach_v850e 'E'
--#define bfd_mach_v850e1 '1'
--#define bfd_mach_v850e2 0x4532
--#define bfd_mach_v850e2v3 0x45325633
--#define bfd_mach_v850e3v5 0x45335635 /* ('E'|'3'|'V'|'5') */
-- bfd_arch_arc, /* ARC Cores */
--#define bfd_mach_arc_5 5
--#define bfd_mach_arc_6 6
--#define bfd_mach_arc_7 7
--#define bfd_mach_arc_8 8
-- bfd_arch_m32c, /* Renesas M16C/M32C. */
--#define bfd_mach_m16c 0x75
--#define bfd_mach_m32c 0x78
-- bfd_arch_m32r, /* Renesas M32R (formerly Mitsubishi M32R/D) */
--#define bfd_mach_m32r 1 /* For backwards compatibility. */
--#define bfd_mach_m32rx 'x'
--#define bfd_mach_m32r2 '2'
-- bfd_arch_mn10200, /* Matsushita MN10200 */
-- bfd_arch_mn10300, /* Matsushita MN10300 */
--#define bfd_mach_mn10300 300
--#define bfd_mach_am33 330
--#define bfd_mach_am33_2 332
-- bfd_arch_fr30,
--#define bfd_mach_fr30 0x46523330
-- bfd_arch_frv,
--#define bfd_mach_frv 1
--#define bfd_mach_frvsimple 2
--#define bfd_mach_fr300 300
--#define bfd_mach_fr400 400
--#define bfd_mach_fr450 450
--#define bfd_mach_frvtomcat 499 /* fr500 prototype */
--#define bfd_mach_fr500 500
--#define bfd_mach_fr550 550
-- bfd_arch_moxie, /* The moxie processor */
--#define bfd_mach_moxie 1
-- bfd_arch_mcore,
-- bfd_arch_mep,
--#define bfd_mach_mep 1
--#define bfd_mach_mep_h1 0x6831
--#define bfd_mach_mep_c5 0x6335
-- bfd_arch_metag,
--#define bfd_mach_metag 1
-- bfd_arch_ia64, /* HP/Intel ia64 */
--#define bfd_mach_ia64_elf64 64
--#define bfd_mach_ia64_elf32 32
-- bfd_arch_ip2k, /* Ubicom IP2K microcontrollers. */
--#define bfd_mach_ip2022 1
--#define bfd_mach_ip2022ext 2
-- bfd_arch_iq2000, /* Vitesse IQ2000. */
--#define bfd_mach_iq2000 1
--#define bfd_mach_iq10 2
-- bfd_arch_epiphany, /* Adapteva EPIPHANY */
--#define bfd_mach_epiphany16 1
--#define bfd_mach_epiphany32 2
-- bfd_arch_mt,
--#define bfd_mach_ms1 1
--#define bfd_mach_mrisc2 2
--#define bfd_mach_ms2 3
-- bfd_arch_pj,
-- bfd_arch_avr, /* Atmel AVR microcontrollers. */
--#define bfd_mach_avr1 1
--#define bfd_mach_avr2 2
--#define bfd_mach_avr25 25
--#define bfd_mach_avr3 3
--#define bfd_mach_avr31 31
--#define bfd_mach_avr35 35
--#define bfd_mach_avr4 4
--#define bfd_mach_avr5 5
--#define bfd_mach_avr51 51
--#define bfd_mach_avr6 6
--#define bfd_mach_avrxmega1 101
--#define bfd_mach_avrxmega2 102
--#define bfd_mach_avrxmega3 103
--#define bfd_mach_avrxmega4 104
--#define bfd_mach_avrxmega5 105
--#define bfd_mach_avrxmega6 106
--#define bfd_mach_avrxmega7 107
-- bfd_arch_bfin, /* ADI Blackfin */
--#define bfd_mach_bfin 1
-- bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */
--#define bfd_mach_cr16 1
-- bfd_arch_cr16c, /* National Semiconductor CompactRISC. */
--#define bfd_mach_cr16c 1
-- bfd_arch_crx, /* National Semiconductor CRX. */
--#define bfd_mach_crx 1
-- bfd_arch_cris, /* Axis CRIS */
--#define bfd_mach_cris_v0_v10 255
--#define bfd_mach_cris_v32 32
--#define bfd_mach_cris_v10_v32 1032
-- bfd_arch_rl78,
--#define bfd_mach_rl78 0x75
-- bfd_arch_rx, /* Renesas RX. */
--#define bfd_mach_rx 0x75
-- bfd_arch_s390, /* IBM s390 */
--#define bfd_mach_s390_31 31
--#define bfd_mach_s390_64 64
-- bfd_arch_score, /* Sunplus score */
--#define bfd_mach_score3 3
--#define bfd_mach_score7 7
-- bfd_arch_openrisc, /* OpenRISC */
-- bfd_arch_mmix, /* Donald Knuth's educational processor. */
-- bfd_arch_xstormy16,
--#define bfd_mach_xstormy16 1
-- bfd_arch_msp430, /* Texas Instruments MSP430 architecture. */
--#define bfd_mach_msp11 11
--#define bfd_mach_msp110 110
--#define bfd_mach_msp12 12
--#define bfd_mach_msp13 13
--#define bfd_mach_msp14 14
--#define bfd_mach_msp15 15
--#define bfd_mach_msp16 16
--#define bfd_mach_msp20 20
--#define bfd_mach_msp21 21
--#define bfd_mach_msp22 22
--#define bfd_mach_msp23 23
--#define bfd_mach_msp24 24
--#define bfd_mach_msp26 26
--#define bfd_mach_msp31 31
--#define bfd_mach_msp32 32
--#define bfd_mach_msp33 33
--#define bfd_mach_msp41 41
--#define bfd_mach_msp42 42
--#define bfd_mach_msp43 43
--#define bfd_mach_msp44 44
--#define bfd_mach_msp430x 45
--#define bfd_mach_msp46 46
--#define bfd_mach_msp47 47
--#define bfd_mach_msp54 54
-- bfd_arch_xc16x, /* Infineon's XC16X Series. */
--#define bfd_mach_xc16x 1
--#define bfd_mach_xc16xl 2
--#define bfd_mach_xc16xs 3
-- bfd_arch_xgate, /* Freescale XGATE */
--#define bfd_mach_xgate 1
-- bfd_arch_xtensa, /* Tensilica's Xtensa cores. */
--#define bfd_mach_xtensa 1
-- bfd_arch_z80,
--#define bfd_mach_z80strict 1 /* No undocumented opcodes. */
--#define bfd_mach_z80 3 /* With ixl, ixh, iyl, and iyh. */
--#define bfd_mach_z80full 7 /* All undocumented instructions. */
--#define bfd_mach_r800 11 /* R800: successor with multiplication. */
-- bfd_arch_lm32, /* Lattice Mico32 */
--#define bfd_mach_lm32 1
-- bfd_arch_microblaze,/* Xilinx MicroBlaze. */
-- bfd_arch_tilepro, /* Tilera TILEPro */
-- bfd_arch_tilegx, /* Tilera TILE-Gx */
--#define bfd_mach_tilepro 1
--#define bfd_mach_tilegx 1
--#define bfd_mach_tilegx32 2
-- bfd_arch_aarch64, /* AArch64 */
--#define bfd_mach_aarch64 0
--#define bfd_mach_aarch64_ilp32 32
-- bfd_arch_nios2,
--#define bfd_mach_nios2 0
-- bfd_arch_last
-- @};
--@end example
--
--@subsection bfd_arch_info
--
--
--@strong{Description}@*
--This structure contains information on architectures for use
--within BFD.
--@example
--
--typedef struct bfd_arch_info
--@{
-- int bits_per_word;
-- int bits_per_address;
-- int bits_per_byte;
-- enum bfd_architecture arch;
-- unsigned long mach;
-- const char *arch_name;
-- const char *printable_name;
-- unsigned int section_align_power;
-- /* TRUE if this is the default machine for the architecture.
-- The default arch should be the first entry for an arch so that
-- all the entries for that arch can be accessed via @code{next}. */
-- bfd_boolean the_default;
-- const struct bfd_arch_info * (*compatible)
-- (const struct bfd_arch_info *a, const struct bfd_arch_info *b);
--
-- bfd_boolean (*scan) (const struct bfd_arch_info *, const char *);
--
-- /* Allocate via bfd_malloc and return a fill buffer of size COUNT. If
-- IS_BIGENDIAN is TRUE, the order of bytes is big endian. If CODE is
-- TRUE, the buffer contains code. */
-- void *(*fill) (bfd_size_type count, bfd_boolean is_bigendian,
-- bfd_boolean code);
--
-- const struct bfd_arch_info *next;
--@}
--bfd_arch_info_type;
--
--@end example
--
--@findex bfd_printable_name
--@subsubsection @code{bfd_printable_name}
--@strong{Synopsis}
--@example
--const char *bfd_printable_name (bfd *abfd);
--@end example
--@strong{Description}@*
--Return a printable string representing the architecture and machine
--from the pointer to the architecture info structure.
--
--@findex bfd_scan_arch
--@subsubsection @code{bfd_scan_arch}
--@strong{Synopsis}
--@example
--const bfd_arch_info_type *bfd_scan_arch (const char *string);
--@end example
--@strong{Description}@*
--Figure out if BFD supports any cpu which could be described with
--the name @var{string}. Return a pointer to an @code{arch_info}
--structure if a machine is found, otherwise NULL.
--
--@findex bfd_arch_list
--@subsubsection @code{bfd_arch_list}
--@strong{Synopsis}
--@example
--const char **bfd_arch_list (void);
--@end example
--@strong{Description}@*
--Return a freshly malloced NULL-terminated vector of the names
--of all the valid BFD architectures. Do not modify the names.
--
--@findex bfd_arch_get_compatible
--@subsubsection @code{bfd_arch_get_compatible}
--@strong{Synopsis}
--@example
--const bfd_arch_info_type *bfd_arch_get_compatible
-- (const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns);
--@end example
--@strong{Description}@*
--Determine whether two BFDs' architectures and machine types
--are compatible. Calculates the lowest common denominator
--between the two architectures and machine types implied by
--the BFDs and returns a pointer to an @code{arch_info} structure
--describing the compatible machine.
--
--@findex bfd_default_arch_struct
--@subsubsection @code{bfd_default_arch_struct}
--@strong{Description}@*
--The @code{bfd_default_arch_struct} is an item of
--@code{bfd_arch_info_type} which has been initialized to a fairly
--generic state. A BFD starts life by pointing to this
--structure, until the correct back end has determined the real
--architecture of the file.
--@example
--extern const bfd_arch_info_type bfd_default_arch_struct;
--@end example
--
--@findex bfd_set_arch_info
--@subsubsection @code{bfd_set_arch_info}
--@strong{Synopsis}
--@example
--void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg);
--@end example
--@strong{Description}@*
--Set the architecture info of @var{abfd} to @var{arg}.
--
--@findex bfd_default_set_arch_mach
--@subsubsection @code{bfd_default_set_arch_mach}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_default_set_arch_mach
-- (bfd *abfd, enum bfd_architecture arch, unsigned long mach);
--@end example
--@strong{Description}@*
--Set the architecture and machine type in BFD @var{abfd}
--to @var{arch} and @var{mach}. Find the correct
--pointer to a structure and insert it into the @code{arch_info}
--pointer.
--
--@findex bfd_get_arch
--@subsubsection @code{bfd_get_arch}
--@strong{Synopsis}
--@example
--enum bfd_architecture bfd_get_arch (bfd *abfd);
--@end example
--@strong{Description}@*
--Return the enumerated type which describes the BFD @var{abfd}'s
--architecture.
--
--@findex bfd_get_mach
--@subsubsection @code{bfd_get_mach}
--@strong{Synopsis}
--@example
--unsigned long bfd_get_mach (bfd *abfd);
--@end example
--@strong{Description}@*
--Return the long type which describes the BFD @var{abfd}'s
--machine.
--
--@findex bfd_arch_bits_per_byte
--@subsubsection @code{bfd_arch_bits_per_byte}
--@strong{Synopsis}
--@example
--unsigned int bfd_arch_bits_per_byte (bfd *abfd);
--@end example
--@strong{Description}@*
--Return the number of bits in one of the BFD @var{abfd}'s
--architecture's bytes.
--
--@findex bfd_arch_bits_per_address
--@subsubsection @code{bfd_arch_bits_per_address}
--@strong{Synopsis}
--@example
--unsigned int bfd_arch_bits_per_address (bfd *abfd);
--@end example
--@strong{Description}@*
--Return the number of bits in one of the BFD @var{abfd}'s
--architecture's addresses.
--
--@findex bfd_default_compatible
--@subsubsection @code{bfd_default_compatible}
--@strong{Synopsis}
--@example
--const bfd_arch_info_type *bfd_default_compatible
-- (const bfd_arch_info_type *a, const bfd_arch_info_type *b);
--@end example
--@strong{Description}@*
--The default function for testing for compatibility.
--
--@findex bfd_default_scan
--@subsubsection @code{bfd_default_scan}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_default_scan
-- (const struct bfd_arch_info *info, const char *string);
--@end example
--@strong{Description}@*
--The default function for working out whether this is an
--architecture hit and a machine hit.
--
--@findex bfd_get_arch_info
--@subsubsection @code{bfd_get_arch_info}
--@strong{Synopsis}
--@example
--const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd);
--@end example
--@strong{Description}@*
--Return the architecture info struct in @var{abfd}.
--
--@findex bfd_lookup_arch
--@subsubsection @code{bfd_lookup_arch}
--@strong{Synopsis}
--@example
--const bfd_arch_info_type *bfd_lookup_arch
-- (enum bfd_architecture arch, unsigned long machine);
--@end example
--@strong{Description}@*
--Look for the architecture info structure which matches the
--arguments @var{arch} and @var{machine}. A machine of 0 matches the
--machine/architecture structure which marks itself as the
--default.
--
--@findex bfd_printable_arch_mach
--@subsubsection @code{bfd_printable_arch_mach}
--@strong{Synopsis}
--@example
--const char *bfd_printable_arch_mach
-- (enum bfd_architecture arch, unsigned long machine);
--@end example
--@strong{Description}@*
--Return a printable string representing the architecture and
--machine type.
--
--This routine is depreciated.
--
--@findex bfd_octets_per_byte
--@subsubsection @code{bfd_octets_per_byte}
--@strong{Synopsis}
--@example
--unsigned int bfd_octets_per_byte (bfd *abfd);
--@end example
--@strong{Description}@*
--Return the number of octets (8-bit quantities) per target byte
--(minimum addressable unit). In most cases, this will be one, but some
--DSP targets have 16, 32, or even 48 bits per byte.
--
--@findex bfd_arch_mach_octets_per_byte
--@subsubsection @code{bfd_arch_mach_octets_per_byte}
--@strong{Synopsis}
--@example
--unsigned int bfd_arch_mach_octets_per_byte
-- (enum bfd_architecture arch, unsigned long machine);
--@end example
--@strong{Description}@*
--See bfd_octets_per_byte.
--
--This routine is provided for those cases where a bfd * is not
--available
--
--@findex bfd_arch_default_fill
--@subsubsection @code{bfd_arch_default_fill}
--@strong{Synopsis}
--@example
--void *bfd_arch_default_fill (bfd_size_type count,
-- bfd_boolean is_bigendian,
-- bfd_boolean code);
--@end example
--@strong{Description}@*
--Allocate via bfd_malloc and return a fill buffer of size COUNT.
--If IS_BIGENDIAN is TRUE, the order of bytes is big endian. If
--CODE is TRUE, the buffer contains code.
--
-diff -Nur binutils-2.24.orig/bfd/doc/bfd.info binutils-2.24/bfd/doc/bfd.info
---- binutils-2.24.orig/bfd/doc/bfd.info 2013-12-02 10:32:19.000000000 +0100
-+++ binutils-2.24/bfd/doc/bfd.info 1970-01-01 01:00:00.000000000 +0100
-@@ -1,13242 +0,0 @@
--This is bfd.info, produced by makeinfo version 4.8 from bfd.texinfo.
--
--INFO-DIR-SECTION Software development
--START-INFO-DIR-ENTRY
--* Bfd: (bfd). The Binary File Descriptor library.
--END-INFO-DIR-ENTRY
--
-- This file documents the BFD library.
--
-- Copyright (C) 1991 - 2013 Free Software Foundation, Inc.
--
-- Permission is granted to copy, distribute and/or modify this document
--under the terms of the GNU Free Documentation License, Version 1.3 or
--any later version published by the Free Software Foundation; with the
--Invariant Sections being "GNU General Public License" and "Funding Free
--Software", the Front-Cover texts being (a) (see below), and with the
--Back-Cover Texts being (b) (see below). A copy of the license is
--included in the section entitled "GNU Free Documentation License".
--
-- (a) The FSF's Front-Cover Text is:
--
-- A GNU Manual
--
-- (b) The FSF's Back-Cover Text is:
--
-- You have freedom to copy and modify this GNU Manual, like GNU
--software. Copies published by the Free Software Foundation raise
--funds for GNU development.
--
--
--File: bfd.info, Node: Top, Next: Overview, Prev: (dir), Up: (dir)
--
-- This file documents the binary file descriptor library libbfd.
--
--* Menu:
--
--* Overview:: Overview of BFD
--* BFD front end:: BFD front end
--* BFD back ends:: BFD back ends
--* GNU Free Documentation License:: GNU Free Documentation License
--* BFD Index:: BFD Index
--
--
--File: bfd.info, Node: Overview, Next: BFD front end, Prev: Top, Up: Top
--
--1 Introduction
--**************
--
--BFD is a package which allows applications to use the same routines to
--operate on object files whatever the object file format. A new object
--file format can be supported simply by creating a new BFD back end and
--adding it to the library.
--
-- BFD is split into two parts: the front end, and the back ends (one
--for each object file format).
-- * The front end of BFD provides the interface to the user. It manages
-- memory and various canonical data structures. The front end also
-- decides which back end to use and when to call back end routines.
--
-- * The back ends provide BFD its view of the real world. Each back
-- end provides a set of calls which the BFD front end can use to
-- maintain its canonical form. The back ends also may keep around
-- information for their own use, for greater efficiency.
--
--* Menu:
--
--* History:: History
--* How It Works:: How It Works
--* What BFD Version 2 Can Do:: What BFD Version 2 Can Do
--
--
--File: bfd.info, Node: History, Next: How It Works, Prev: Overview, Up: Overview
--
--1.1 History
--===========
--
--One spur behind BFD was the desire, on the part of the GNU 960 team at
--Intel Oregon, for interoperability of applications on their COFF and
--b.out file formats. Cygnus was providing GNU support for the team, and
--was contracted to provide the required functionality.
--
-- The name came from a conversation David Wallace was having with
--Richard Stallman about the library: RMS said that it would be quite
--hard--David said "BFD". Stallman was right, but the name stuck.
--
-- At the same time, Ready Systems wanted much the same thing, but for
--different object file formats: IEEE-695, Oasys, Srecords, a.out and 68k
--coff.
--
-- BFD was first implemented by members of Cygnus Support; Steve
--Chamberlain (`sac@cygnus.com'), John Gilmore (`gnu@cygnus.com'), K.
--Richard Pixley (`rich@cygnus.com') and David Henkel-Wallace
--(`gumby@cygnus.com').
--
--
--File: bfd.info, Node: How It Works, Next: What BFD Version 2 Can Do, Prev: History, Up: Overview
--
--1.2 How To Use BFD
--==================
--
--To use the library, include `bfd.h' and link with `libbfd.a'.
--
-- BFD provides a common interface to the parts of an object file for a
--calling application.
--
-- When an application successfully opens a target file (object,
--archive, or whatever), a pointer to an internal structure is returned.
--This pointer points to a structure called `bfd', described in `bfd.h'.
--Our convention is to call this pointer a BFD, and instances of it
--within code `abfd'. All operations on the target object file are
--applied as methods to the BFD. The mapping is defined within `bfd.h'
--in a set of macros, all beginning with `bfd_' to reduce namespace
--pollution.
--
-- For example, this sequence does what you would probably expect:
--return the number of sections in an object file attached to a BFD
--`abfd'.
--
-- #include "bfd.h"
--
-- unsigned int number_of_sections (abfd)
-- bfd *abfd;
-- {
-- return bfd_count_sections (abfd);
-- }
--
-- The abstraction used within BFD is that an object file has:
--
-- * a header,
--
-- * a number of sections containing raw data (*note Sections::),
--
-- * a set of relocations (*note Relocations::), and
--
-- * some symbol information (*note Symbols::).
-- Also, BFDs opened for archives have the additional attribute of an
--index and contain subordinate BFDs. This approach is fine for a.out and
--coff, but loses efficiency when applied to formats such as S-records and
--IEEE-695.
--
--
--File: bfd.info, Node: What BFD Version 2 Can Do, Prev: How It Works, Up: Overview
--
--1.3 What BFD Version 2 Can Do
--=============================
--
--When an object file is opened, BFD subroutines automatically determine
--the format of the input object file. They then build a descriptor in
--memory with pointers to routines that will be used to access elements of
--the object file's data structures.
--
-- As different information from the object files is required, BFD
--reads from different sections of the file and processes them. For
--example, a very common operation for the linker is processing symbol
--tables. Each BFD back end provides a routine for converting between
--the object file's representation of symbols and an internal canonical
--format. When the linker asks for the symbol table of an object file, it
--calls through a memory pointer to the routine from the relevant BFD
--back end which reads and converts the table into a canonical form. The
--linker then operates upon the canonical form. When the link is finished
--and the linker writes the output file's symbol table, another BFD back
--end routine is called to take the newly created symbol table and
--convert it into the chosen output format.
--
--* Menu:
--
--* BFD information loss:: Information Loss
--* Canonical format:: The BFD canonical object-file format
--
--
--File: bfd.info, Node: BFD information loss, Next: Canonical format, Up: What BFD Version 2 Can Do
--
--1.3.1 Information Loss
------------------------
--
--_Information can be lost during output._ The output formats supported
--by BFD do not provide identical facilities, and information which can
--be described in one form has nowhere to go in another format. One
--example of this is alignment information in `b.out'. There is nowhere
--in an `a.out' format file to store alignment information on the
--contained data, so when a file is linked from `b.out' and an `a.out'
--image is produced, alignment information will not propagate to the
--output file. (The linker will still use the alignment information
--internally, so the link is performed correctly).
--
-- Another example is COFF section names. COFF files may contain an
--unlimited number of sections, each one with a textual section name. If
--the target of the link is a format which does not have many sections
--(e.g., `a.out') or has sections without names (e.g., the Oasys format),
--the link cannot be done simply. You can circumvent this problem by
--describing the desired input-to-output section mapping with the linker
--command language.
--
-- _Information can be lost during canonicalization._ The BFD internal
--canonical form of the external formats is not exhaustive; there are
--structures in input formats for which there is no direct representation
--internally. This means that the BFD back ends cannot maintain all
--possible data richness through the transformation between external to
--internal and back to external formats.
--
-- This limitation is only a problem when an application reads one
--format and writes another. Each BFD back end is responsible for
--maintaining as much data as possible, and the internal BFD canonical
--form has structures which are opaque to the BFD core, and exported only
--to the back ends. When a file is read in one format, the canonical form
--is generated for BFD and the application. At the same time, the back
--end saves away any information which may otherwise be lost. If the data
--is then written back in the same format, the back end routine will be
--able to use the canonical form provided by the BFD core as well as the
--information it prepared earlier. Since there is a great deal of
--commonality between back ends, there is no information lost when
--linking or copying big endian COFF to little endian COFF, or `a.out' to
--`b.out'. When a mixture of formats is linked, the information is only
--lost from the files whose format differs from the destination.
--
--
--File: bfd.info, Node: Canonical format, Prev: BFD information loss, Up: What BFD Version 2 Can Do
--
--1.3.2 The BFD canonical object-file format
--------------------------------------------
--
--The greatest potential for loss of information occurs when there is the
--least overlap between the information provided by the source format,
--that stored by the canonical format, and that needed by the destination
--format. A brief description of the canonical form may help you
--understand which kinds of data you can count on preserving across
--conversions.
--
--_files_
-- Information stored on a per-file basis includes target machine
-- architecture, particular implementation format type, a demand
-- pageable bit, and a write protected bit. Information like Unix
-- magic numbers is not stored here--only the magic numbers' meaning,
-- so a `ZMAGIC' file would have both the demand pageable bit and the
-- write protected text bit set. The byte order of the target is
-- stored on a per-file basis, so that big- and little-endian object
-- files may be used with one another.
--
--_sections_
-- Each section in the input file contains the name of the section,
-- the section's original address in the object file, size and
-- alignment information, various flags, and pointers into other BFD
-- data structures.
--
--_symbols_
-- Each symbol contains a pointer to the information for the object
-- file which originally defined it, its name, its value, and various
-- flag bits. When a BFD back end reads in a symbol table, it
-- relocates all symbols to make them relative to the base of the
-- section where they were defined. Doing this ensures that each
-- symbol points to its containing section. Each symbol also has a
-- varying amount of hidden private data for the BFD back end. Since
-- the symbol points to the original file, the private data format
-- for that symbol is accessible. `ld' can operate on a collection
-- of symbols of wildly different formats without problems.
--
-- Normal global and simple local symbols are maintained on output,
-- so an output file (no matter its format) will retain symbols
-- pointing to functions and to global, static, and common variables.
-- Some symbol information is not worth retaining; in `a.out', type
-- information is stored in the symbol table as long symbol names.
-- This information would be useless to most COFF debuggers; the
-- linker has command line switches to allow users to throw it away.
--
-- There is one word of type information within the symbol, so if the
-- format supports symbol type information within symbols (for
-- example, COFF, IEEE, Oasys) and the type is simple enough to fit
-- within one word (nearly everything but aggregates), the
-- information will be preserved.
--
--_relocation level_
-- Each canonical BFD relocation record contains a pointer to the
-- symbol to relocate to, the offset of the data to relocate, the
-- section the data is in, and a pointer to a relocation type
-- descriptor. Relocation is performed by passing messages through
-- the relocation type descriptor and the symbol pointer. Therefore,
-- relocations can be performed on output data using a relocation
-- method that is only available in one of the input formats. For
-- instance, Oasys provides a byte relocation format. A relocation
-- record requesting this relocation type would point indirectly to a
-- routine to perform this, so the relocation may be performed on a
-- byte being written to a 68k COFF file, even though 68k COFF has no
-- such relocation type.
--
--_line numbers_
-- Object formats can contain, for debugging purposes, some form of
-- mapping between symbols, source line numbers, and addresses in the
-- output file. These addresses have to be relocated along with the
-- symbol information. Each symbol with an associated list of line
-- number records points to the first record of the list. The head
-- of a line number list consists of a pointer to the symbol, which
-- allows finding out the address of the function whose line number
-- is being described. The rest of the list is made up of pairs:
-- offsets into the section and line numbers. Any format which can
-- simply derive this information can pass it successfully between
-- formats (COFF, IEEE and Oasys).
--
--
--File: bfd.info, Node: BFD front end, Next: BFD back ends, Prev: Overview, Up: Top
--
--2 BFD Front End
--***************
--
--* Menu:
--
--* typedef bfd::
--* Error reporting::
--* Miscellaneous::
--* Memory Usage::
--* Initialization::
--* Sections::
--* Symbols::
--* Archives::
--* Formats::
--* Relocations::
--* Core Files::
--* Targets::
--* Architectures::
--* Opening and Closing::
--* Internal::
--* File Caching::
--* Linker Functions::
--* Hash Tables::
--
--
--File: bfd.info, Node: typedef bfd, Next: Error reporting, Prev: BFD front end, Up: BFD front end
--
--2.1 `typedef bfd'
--=================
--
--A BFD has type `bfd'; objects of this type are the cornerstone of any
--application using BFD. Using BFD consists of making references though
--the BFD and to data in the BFD.
--
-- Here is the structure that defines the type `bfd'. It contains the
--major data about the file and pointers to the rest of the data.
--
--
-- enum bfd_direction
-- {
-- no_direction = 0,
-- read_direction = 1,
-- write_direction = 2,
-- both_direction = 3
-- };
--
-- struct bfd
-- {
-- /* A unique identifier of the BFD */
-- unsigned int id;
--
-- /* The filename the application opened the BFD with. */
-- const char *filename;
--
-- /* A pointer to the target jump table. */
-- const struct bfd_target *xvec;
--
-- /* The IOSTREAM, and corresponding IO vector that provide access
-- to the file backing the BFD. */
-- void *iostream;
-- const struct bfd_iovec *iovec;
--
-- /* The caching routines use these to maintain a
-- least-recently-used list of BFDs. */
-- struct bfd *lru_prev, *lru_next;
--
-- /* When a file is closed by the caching routines, BFD retains
-- state information on the file here... */
-- ufile_ptr where;
--
-- /* File modified time, if mtime_set is TRUE. */
-- long mtime;
--
-- /* Reserved for an unimplemented file locking extension. */
-- int ifd;
--
-- /* The format which belongs to the BFD. (object, core, etc.) */
-- bfd_format format;
--
-- /* The direction with which the BFD was opened. */
-- enum bfd_direction direction;
--
-- /* Format_specific flags. */
-- flagword flags;
--
-- /* Values that may appear in the flags field of a BFD. These also
-- appear in the object_flags field of the bfd_target structure, where
-- they indicate the set of flags used by that backend (not all flags
-- are meaningful for all object file formats) (FIXME: at the moment,
-- the object_flags values have mostly just been copied from backend
-- to another, and are not necessarily correct). */
--
-- #define BFD_NO_FLAGS 0x00
--
-- /* BFD contains relocation entries. */
-- #define HAS_RELOC 0x01
--
-- /* BFD is directly executable. */
-- #define EXEC_P 0x02
--
-- /* BFD has line number information (basically used for F_LNNO in a
-- COFF header). */
-- #define HAS_LINENO 0x04
--
-- /* BFD has debugging information. */
-- #define HAS_DEBUG 0x08
--
-- /* BFD has symbols. */
-- #define HAS_SYMS 0x10
--
-- /* BFD has local symbols (basically used for F_LSYMS in a COFF
-- header). */
-- #define HAS_LOCALS 0x20
--
-- /* BFD is a dynamic object. */
-- #define DYNAMIC 0x40
--
-- /* Text section is write protected (if D_PAGED is not set, this is
-- like an a.out NMAGIC file) (the linker sets this by default, but
-- clears it for -r or -N). */
-- #define WP_TEXT 0x80
--
-- /* BFD is dynamically paged (this is like an a.out ZMAGIC file) (the
-- linker sets this by default, but clears it for -r or -n or -N). */
-- #define D_PAGED 0x100
--
-- /* BFD is relaxable (this means that bfd_relax_section may be able to
-- do something) (sometimes bfd_relax_section can do something even if
-- this is not set). */
-- #define BFD_IS_RELAXABLE 0x200
--
-- /* This may be set before writing out a BFD to request using a
-- traditional format. For example, this is used to request that when
-- writing out an a.out object the symbols not be hashed to eliminate
-- duplicates. */
-- #define BFD_TRADITIONAL_FORMAT 0x400
--
-- /* This flag indicates that the BFD contents are actually cached
-- in memory. If this is set, iostream points to a bfd_in_memory
-- struct. */
-- #define BFD_IN_MEMORY 0x800
--
-- /* The sections in this BFD specify a memory page. */
-- #define HAS_LOAD_PAGE 0x1000
--
-- /* This BFD has been created by the linker and doesn't correspond
-- to any input file. */
-- #define BFD_LINKER_CREATED 0x2000
--
-- /* This may be set before writing out a BFD to request that it
-- be written using values for UIDs, GIDs, timestamps, etc. that
-- will be consistent from run to run. */
-- #define BFD_DETERMINISTIC_OUTPUT 0x4000
--
-- /* Compress sections in this BFD. */
-- #define BFD_COMPRESS 0x8000
--
-- /* Decompress sections in this BFD. */
-- #define BFD_DECOMPRESS 0x10000
--
-- /* BFD is a dummy, for plugins. */
-- #define BFD_PLUGIN 0x20000
--
-- /* Flags bits to be saved in bfd_preserve_save. */
-- #define BFD_FLAGS_SAVED \
-- (BFD_IN_MEMORY | BFD_COMPRESS | BFD_DECOMPRESS | BFD_PLUGIN)
--
-- /* Flags bits which are for BFD use only. */
-- #define BFD_FLAGS_FOR_BFD_USE_MASK \
-- (BFD_IN_MEMORY | BFD_COMPRESS | BFD_DECOMPRESS | BFD_LINKER_CREATED \
-- | BFD_PLUGIN | BFD_TRADITIONAL_FORMAT | BFD_DETERMINISTIC_OUTPUT)
--
-- /* Currently my_archive is tested before adding origin to
-- anything. I believe that this can become always an add of
-- origin, with origin set to 0 for non archive files. */
-- ufile_ptr origin;
--
-- /* The origin in the archive of the proxy entry. This will
-- normally be the same as origin, except for thin archives,
-- when it will contain the current offset of the proxy in the
-- thin archive rather than the offset of the bfd in its actual
-- container. */
-- ufile_ptr proxy_origin;
--
-- /* A hash table for section names. */
-- struct bfd_hash_table section_htab;
--
-- /* Pointer to linked list of sections. */
-- struct bfd_section *sections;
--
-- /* The last section on the section list. */
-- struct bfd_section *section_last;
--
-- /* The number of sections. */
-- unsigned int section_count;
--
-- /* Stuff only useful for object files:
-- The start address. */
-- bfd_vma start_address;
--
-- /* Used for input and output. */
-- unsigned int symcount;
--
-- /* Symbol table for output BFD (with symcount entries).
-- Also used by the linker to cache input BFD symbols. */
-- struct bfd_symbol **outsymbols;
--
-- /* Used for slurped dynamic symbol tables. */
-- unsigned int dynsymcount;
--
-- /* Pointer to structure which contains architecture information. */
-- const struct bfd_arch_info *arch_info;
--
-- /* Stuff only useful for archives. */
-- void *arelt_data;
-- struct bfd *my_archive; /* The containing archive BFD. */
-- struct bfd *archive_next; /* The next BFD in the archive. */
-- struct bfd *archive_head; /* The first BFD in the archive. */
-- struct bfd *nested_archives; /* List of nested archive in a flattened
-- thin archive. */
--
-- /* A chain of BFD structures involved in a link. */
-- struct bfd *link_next;
--
-- /* A field used by _bfd_generic_link_add_archive_symbols. This will
-- be used only for archive elements. */
-- int archive_pass;
--
-- /* Used by the back end to hold private data. */
-- union
-- {
-- struct aout_data_struct *aout_data;
-- struct artdata *aout_ar_data;
-- struct _oasys_data *oasys_obj_data;
-- struct _oasys_ar_data *oasys_ar_data;
-- struct coff_tdata *coff_obj_data;
-- struct pe_tdata *pe_obj_data;
-- struct xcoff_tdata *xcoff_obj_data;
-- struct ecoff_tdata *ecoff_obj_data;
-- struct ieee_data_struct *ieee_data;
-- struct ieee_ar_data_struct *ieee_ar_data;
-- struct srec_data_struct *srec_data;
-- struct verilog_data_struct *verilog_data;
-- struct ihex_data_struct *ihex_data;
-- struct tekhex_data_struct *tekhex_data;
-- struct elf_obj_tdata *elf_obj_data;
-- struct nlm_obj_tdata *nlm_obj_data;
-- struct bout_data_struct *bout_data;
-- struct mmo_data_struct *mmo_data;
-- struct sun_core_struct *sun_core_data;
-- struct sco5_core_struct *sco5_core_data;
-- struct trad_core_struct *trad_core_data;
-- struct som_data_struct *som_data;
-- struct hpux_core_struct *hpux_core_data;
-- struct hppabsd_core_struct *hppabsd_core_data;
-- struct sgi_core_struct *sgi_core_data;
-- struct lynx_core_struct *lynx_core_data;
-- struct osf_core_struct *osf_core_data;
-- struct cisco_core_struct *cisco_core_data;
-- struct versados_data_struct *versados_data;
-- struct netbsd_core_struct *netbsd_core_data;
-- struct mach_o_data_struct *mach_o_data;
-- struct mach_o_fat_data_struct *mach_o_fat_data;
-- struct plugin_data_struct *plugin_data;
-- struct bfd_pef_data_struct *pef_data;
-- struct bfd_pef_xlib_data_struct *pef_xlib_data;
-- struct bfd_sym_data_struct *sym_data;
-- void *any;
-- }
-- tdata;
--
-- /* Used by the application to hold private data. */
-- void *usrdata;
--
-- /* Where all the allocated stuff under this BFD goes. This is a
-- struct objalloc *, but we use void * to avoid requiring the inclusion
-- of objalloc.h. */
-- void *memory;
--
-- /* Is the file descriptor being cached? That is, can it be closed as
-- needed, and re-opened when accessed later? */
-- unsigned int cacheable : 1;
--
-- /* Marks whether there was a default target specified when the
-- BFD was opened. This is used to select which matching algorithm
-- to use to choose the back end. */
-- unsigned int target_defaulted : 1;
--
-- /* ... and here: (``once'' means at least once). */
-- unsigned int opened_once : 1;
--
-- /* Set if we have a locally maintained mtime value, rather than
-- getting it from the file each time. */
-- unsigned int mtime_set : 1;
--
-- /* Flag set if symbols from this BFD should not be exported. */
-- unsigned int no_export : 1;
--
-- /* Remember when output has begun, to stop strange things
-- from happening. */
-- unsigned int output_has_begun : 1;
--
-- /* Have archive map. */
-- unsigned int has_armap : 1;
--
-- /* Set if this is a thin archive. */
-- unsigned int is_thin_archive : 1;
--
-- /* Set if only required symbols should be added in the link hash table for
-- this object. Used by VMS linkers. */
-- unsigned int selective_search : 1;
-- };
--
--
--File: bfd.info, Node: Error reporting, Next: Miscellaneous, Prev: typedef bfd, Up: BFD front end
--
--2.2 Error reporting
--===================
--
--Most BFD functions return nonzero on success (check their individual
--documentation for precise semantics). On an error, they call
--`bfd_set_error' to set an error condition that callers can check by
--calling `bfd_get_error'. If that returns `bfd_error_system_call', then
--check `errno'.
--
-- The easiest way to report a BFD error to the user is to use
--`bfd_perror'.
--
--2.2.1 Type `bfd_error_type'
-----------------------------
--
--The values returned by `bfd_get_error' are defined by the enumerated
--type `bfd_error_type'.
--
--
-- typedef enum bfd_error
-- {
-- bfd_error_no_error = 0,
-- bfd_error_system_call,
-- bfd_error_invalid_target,
-- bfd_error_wrong_format,
-- bfd_error_wrong_object_format,
-- bfd_error_invalid_operation,
-- bfd_error_no_memory,
-- bfd_error_no_symbols,
-- bfd_error_no_armap,
-- bfd_error_no_more_archived_files,
-- bfd_error_malformed_archive,
-- bfd_error_missing_dso,
-- bfd_error_file_not_recognized,
-- bfd_error_file_ambiguously_recognized,
-- bfd_error_no_contents,
-- bfd_error_nonrepresentable_section,
-- bfd_error_no_debug_section,
-- bfd_error_bad_value,
-- bfd_error_file_truncated,
-- bfd_error_file_too_big,
-- bfd_error_on_input,
-- bfd_error_invalid_error_code
-- }
-- bfd_error_type;
--
--2.2.1.1 `bfd_get_error'
--.......................
--
--*Synopsis*
-- bfd_error_type bfd_get_error (void);
-- *Description*
--Return the current BFD error condition.
--
--2.2.1.2 `bfd_set_error'
--.......................
--
--*Synopsis*
-- void bfd_set_error (bfd_error_type error_tag, ...);
-- *Description*
--Set the BFD error condition to be ERROR_TAG. If ERROR_TAG is
--bfd_error_on_input, then this function takes two more parameters, the
--input bfd where the error occurred, and the bfd_error_type error.
--
--2.2.1.3 `bfd_errmsg'
--....................
--
--*Synopsis*
-- const char *bfd_errmsg (bfd_error_type error_tag);
-- *Description*
--Return a string describing the error ERROR_TAG, or the system error if
--ERROR_TAG is `bfd_error_system_call'.
--
--2.2.1.4 `bfd_perror'
--....................
--
--*Synopsis*
-- void bfd_perror (const char *message);
-- *Description*
--Print to the standard error stream a string describing the last BFD
--error that occurred, or the last system error if the last BFD error was
--a system call failure. If MESSAGE is non-NULL and non-empty, the error
--string printed is preceded by MESSAGE, a colon, and a space. It is
--followed by a newline.
--
--2.2.2 BFD error handler
-------------------------
--
--Some BFD functions want to print messages describing the problem. They
--call a BFD error handler function. This function may be overridden by
--the program.
--
-- The BFD error handler acts like printf.
--
--
-- typedef void (*bfd_error_handler_type) (const char *, ...);
--
--2.2.2.1 `bfd_set_error_handler'
--...............................
--
--*Synopsis*
-- bfd_error_handler_type bfd_set_error_handler (bfd_error_handler_type);
-- *Description*
--Set the BFD error handler function. Returns the previous function.
--
--2.2.2.2 `bfd_set_error_program_name'
--....................................
--
--*Synopsis*
-- void bfd_set_error_program_name (const char *);
-- *Description*
--Set the program name to use when printing a BFD error. This is printed
--before the error message followed by a colon and space. The string
--must not be changed after it is passed to this function.
--
--2.2.2.3 `bfd_get_error_handler'
--...............................
--
--*Synopsis*
-- bfd_error_handler_type bfd_get_error_handler (void);
-- *Description*
--Return the BFD error handler function.
--
--2.2.3 BFD assert handler
--------------------------
--
--If BFD finds an internal inconsistency, the bfd assert handler is
--called with information on the BFD version, BFD source file and line.
--If this happens, most programs linked against BFD are expected to want
--to exit with an error, or mark the current BFD operation as failed, so
--it is recommended to override the default handler, which just calls
--_bfd_error_handler and continues.
--
--
-- typedef void (*bfd_assert_handler_type) (const char *bfd_formatmsg,
-- const char *bfd_version,
-- const char *bfd_file,
-- int bfd_line);
--
--2.2.3.1 `bfd_set_assert_handler'
--................................
--
--*Synopsis*
-- bfd_assert_handler_type bfd_set_assert_handler (bfd_assert_handler_type);
-- *Description*
--Set the BFD assert handler function. Returns the previous function.
--
--2.2.3.2 `bfd_get_assert_handler'
--................................
--
--*Synopsis*
-- bfd_assert_handler_type bfd_get_assert_handler (void);
-- *Description*
--Return the BFD assert handler function.
--
--
--File: bfd.info, Node: Miscellaneous, Next: Memory Usage, Prev: Error reporting, Up: BFD front end
--
--2.3 Miscellaneous
--=================
--
--2.3.1 Miscellaneous functions
-------------------------------
--
--2.3.1.1 `bfd_get_reloc_upper_bound'
--...................................
--
--*Synopsis*
-- long bfd_get_reloc_upper_bound (bfd *abfd, asection *sect);
-- *Description*
--Return the number of bytes required to store the relocation information
--associated with section SECT attached to bfd ABFD. If an error occurs,
--return -1.
--
--2.3.1.2 `bfd_canonicalize_reloc'
--................................
--
--*Synopsis*
-- long bfd_canonicalize_reloc
-- (bfd *abfd, asection *sec, arelent **loc, asymbol **syms);
-- *Description*
--Call the back end associated with the open BFD ABFD and translate the
--external form of the relocation information attached to SEC into the
--internal canonical form. Place the table into memory at LOC, which has
--been preallocated, usually by a call to `bfd_get_reloc_upper_bound'.
--Returns the number of relocs, or -1 on error.
--
-- The SYMS table is also needed for horrible internal magic reasons.
--
--2.3.1.3 `bfd_set_reloc'
--.......................
--
--*Synopsis*
-- void bfd_set_reloc
-- (bfd *abfd, asection *sec, arelent **rel, unsigned int count);
-- *Description*
--Set the relocation pointer and count within section SEC to the values
--REL and COUNT. The argument ABFD is ignored.
--
--2.3.1.4 `bfd_set_file_flags'
--............................
--
--*Synopsis*
-- bfd_boolean bfd_set_file_flags (bfd *abfd, flagword flags);
-- *Description*
--Set the flag word in the BFD ABFD to the value FLAGS.
--
-- Possible errors are:
-- * `bfd_error_wrong_format' - The target bfd was not of object format.
--
-- * `bfd_error_invalid_operation' - The target bfd was open for
-- reading.
--
-- * `bfd_error_invalid_operation' - The flag word contained a bit
-- which was not applicable to the type of file. E.g., an attempt
-- was made to set the `D_PAGED' bit on a BFD format which does not
-- support demand paging.
--
--2.3.1.5 `bfd_get_arch_size'
--...........................
--
--*Synopsis*
-- int bfd_get_arch_size (bfd *abfd);
-- *Description*
--Returns the architecture address size, in bits, as determined by the
--object file's format. For ELF, this information is included in the
--header.
--
-- *Returns*
--Returns the arch size in bits if known, `-1' otherwise.
--
--2.3.1.6 `bfd_get_sign_extend_vma'
--.................................
--
--*Synopsis*
-- int bfd_get_sign_extend_vma (bfd *abfd);
-- *Description*
--Indicates if the target architecture "naturally" sign extends an
--address. Some architectures implicitly sign extend address values when
--they are converted to types larger than the size of an address. For
--instance, bfd_get_start_address() will return an address sign extended
--to fill a bfd_vma when this is the case.
--
-- *Returns*
--Returns `1' if the target architecture is known to sign extend
--addresses, `0' if the target architecture is known to not sign extend
--addresses, and `-1' otherwise.
--
--2.3.1.7 `bfd_set_start_address'
--...............................
--
--*Synopsis*
-- bfd_boolean bfd_set_start_address (bfd *abfd, bfd_vma vma);
-- *Description*
--Make VMA the entry point of output BFD ABFD.
--
-- *Returns*
--Returns `TRUE' on success, `FALSE' otherwise.
--
--2.3.1.8 `bfd_get_gp_size'
--.........................
--
--*Synopsis*
-- unsigned int bfd_get_gp_size (bfd *abfd);
-- *Description*
--Return the maximum size of objects to be optimized using the GP
--register under MIPS ECOFF. This is typically set by the `-G' argument
--to the compiler, assembler or linker.
--
--2.3.1.9 `bfd_set_gp_size'
--.........................
--
--*Synopsis*
-- void bfd_set_gp_size (bfd *abfd, unsigned int i);
-- *Description*
--Set the maximum size of objects to be optimized using the GP register
--under ECOFF or MIPS ELF. This is typically set by the `-G' argument to
--the compiler, assembler or linker.
--
--2.3.1.10 `bfd_scan_vma'
--.......................
--
--*Synopsis*
-- bfd_vma bfd_scan_vma (const char *string, const char **end, int base);
-- *Description*
--Convert, like `strtoul', a numerical expression STRING into a `bfd_vma'
--integer, and return that integer. (Though without as many bells and
--whistles as `strtoul'.) The expression is assumed to be unsigned
--(i.e., positive). If given a BASE, it is used as the base for
--conversion. A base of 0 causes the function to interpret the string in
--hex if a leading "0x" or "0X" is found, otherwise in octal if a leading
--zero is found, otherwise in decimal.
--
-- If the value would overflow, the maximum `bfd_vma' value is returned.
--
--2.3.1.11 `bfd_copy_private_header_data'
--.......................................
--
--*Synopsis*
-- bfd_boolean bfd_copy_private_header_data (bfd *ibfd, bfd *obfd);
-- *Description*
--Copy private BFD header information from the BFD IBFD to the the BFD
--OBFD. This copies information that may require sections to exist, but
--does not require symbol tables. Return `true' on success, `false' on
--error. Possible error returns are:
--
-- * `bfd_error_no_memory' - Not enough memory exists to create private
-- data for OBFD.
--
-- #define bfd_copy_private_header_data(ibfd, obfd) \
-- BFD_SEND (obfd, _bfd_copy_private_header_data, \
-- (ibfd, obfd))
--
--2.3.1.12 `bfd_copy_private_bfd_data'
--....................................
--
--*Synopsis*
-- bfd_boolean bfd_copy_private_bfd_data (bfd *ibfd, bfd *obfd);
-- *Description*
--Copy private BFD information from the BFD IBFD to the the BFD OBFD.
--Return `TRUE' on success, `FALSE' on error. Possible error returns are:
--
-- * `bfd_error_no_memory' - Not enough memory exists to create private
-- data for OBFD.
--
-- #define bfd_copy_private_bfd_data(ibfd, obfd) \
-- BFD_SEND (obfd, _bfd_copy_private_bfd_data, \
-- (ibfd, obfd))
--
--2.3.1.13 `bfd_merge_private_bfd_data'
--.....................................
--
--*Synopsis*
-- bfd_boolean bfd_merge_private_bfd_data (bfd *ibfd, bfd *obfd);
-- *Description*
--Merge private BFD information from the BFD IBFD to the the output file
--BFD OBFD when linking. Return `TRUE' on success, `FALSE' on error.
--Possible error returns are:
--
-- * `bfd_error_no_memory' - Not enough memory exists to create private
-- data for OBFD.
--
-- #define bfd_merge_private_bfd_data(ibfd, obfd) \
-- BFD_SEND (obfd, _bfd_merge_private_bfd_data, \
-- (ibfd, obfd))
--
--2.3.1.14 `bfd_set_private_flags'
--................................
--
--*Synopsis*
-- bfd_boolean bfd_set_private_flags (bfd *abfd, flagword flags);
-- *Description*
--Set private BFD flag information in the BFD ABFD. Return `TRUE' on
--success, `FALSE' on error. Possible error returns are:
--
-- * `bfd_error_no_memory' - Not enough memory exists to create private
-- data for OBFD.
--
-- #define bfd_set_private_flags(abfd, flags) \
-- BFD_SEND (abfd, _bfd_set_private_flags, (abfd, flags))
--
--2.3.1.15 `Other functions'
--..........................
--
--*Description*
--The following functions exist but have not yet been documented.
-- #define bfd_sizeof_headers(abfd, info) \
-- BFD_SEND (abfd, _bfd_sizeof_headers, (abfd, info))
--
-- #define bfd_find_nearest_line(abfd, sec, syms, off, file, func, line) \
-- BFD_SEND (abfd, _bfd_find_nearest_line, \
-- (abfd, sec, syms, off, file, func, line))
--
-- #define bfd_find_nearest_line_discriminator(abfd, sec, syms, off, file, func, \
-- line, disc) \
-- BFD_SEND (abfd, _bfd_find_nearest_line_discriminator, \
-- (abfd, sec, syms, off, file, func, line, disc))
--
-- #define bfd_find_line(abfd, syms, sym, file, line) \
-- BFD_SEND (abfd, _bfd_find_line, \
-- (abfd, syms, sym, file, line))
--
-- #define bfd_find_inliner_info(abfd, file, func, line) \
-- BFD_SEND (abfd, _bfd_find_inliner_info, \
-- (abfd, file, func, line))
--
-- #define bfd_debug_info_start(abfd) \
-- BFD_SEND (abfd, _bfd_debug_info_start, (abfd))
--
-- #define bfd_debug_info_end(abfd) \
-- BFD_SEND (abfd, _bfd_debug_info_end, (abfd))
--
-- #define bfd_debug_info_accumulate(abfd, section) \
-- BFD_SEND (abfd, _bfd_debug_info_accumulate, (abfd, section))
--
-- #define bfd_stat_arch_elt(abfd, stat) \
-- BFD_SEND (abfd, _bfd_stat_arch_elt,(abfd, stat))
--
-- #define bfd_update_armap_timestamp(abfd) \
-- BFD_SEND (abfd, _bfd_update_armap_timestamp, (abfd))
--
-- #define bfd_set_arch_mach(abfd, arch, mach)\
-- BFD_SEND ( abfd, _bfd_set_arch_mach, (abfd, arch, mach))
--
-- #define bfd_relax_section(abfd, section, link_info, again) \
-- BFD_SEND (abfd, _bfd_relax_section, (abfd, section, link_info, again))
--
-- #define bfd_gc_sections(abfd, link_info) \
-- BFD_SEND (abfd, _bfd_gc_sections, (abfd, link_info))
--
-- #define bfd_lookup_section_flags(link_info, flag_info, section) \
-- BFD_SEND (abfd, _bfd_lookup_section_flags, (link_info, flag_info, section))
--
-- #define bfd_merge_sections(abfd, link_info) \
-- BFD_SEND (abfd, _bfd_merge_sections, (abfd, link_info))
--
-- #define bfd_is_group_section(abfd, sec) \
-- BFD_SEND (abfd, _bfd_is_group_section, (abfd, sec))
--
-- #define bfd_discard_group(abfd, sec) \
-- BFD_SEND (abfd, _bfd_discard_group, (abfd, sec))
--
-- #define bfd_link_hash_table_create(abfd) \
-- BFD_SEND (abfd, _bfd_link_hash_table_create, (abfd))
--
-- #define bfd_link_hash_table_free(abfd, hash) \
-- BFD_SEND (abfd, _bfd_link_hash_table_free, (hash))
--
-- #define bfd_link_add_symbols(abfd, info) \
-- BFD_SEND (abfd, _bfd_link_add_symbols, (abfd, info))
--
-- #define bfd_link_just_syms(abfd, sec, info) \
-- BFD_SEND (abfd, _bfd_link_just_syms, (sec, info))
--
-- #define bfd_final_link(abfd, info) \
-- BFD_SEND (abfd, _bfd_final_link, (abfd, info))
--
-- #define bfd_free_cached_info(abfd) \
-- BFD_SEND (abfd, _bfd_free_cached_info, (abfd))
--
-- #define bfd_get_dynamic_symtab_upper_bound(abfd) \
-- BFD_SEND (abfd, _bfd_get_dynamic_symtab_upper_bound, (abfd))
--
-- #define bfd_print_private_bfd_data(abfd, file)\
-- BFD_SEND (abfd, _bfd_print_private_bfd_data, (abfd, file))
--
-- #define bfd_canonicalize_dynamic_symtab(abfd, asymbols) \
-- BFD_SEND (abfd, _bfd_canonicalize_dynamic_symtab, (abfd, asymbols))
--
-- #define bfd_get_synthetic_symtab(abfd, count, syms, dyncount, dynsyms, ret) \
-- BFD_SEND (abfd, _bfd_get_synthetic_symtab, (abfd, count, syms, \
-- dyncount, dynsyms, ret))
--
-- #define bfd_get_dynamic_reloc_upper_bound(abfd) \
-- BFD_SEND (abfd, _bfd_get_dynamic_reloc_upper_bound, (abfd))
--
-- #define bfd_canonicalize_dynamic_reloc(abfd, arels, asyms) \
-- BFD_SEND (abfd, _bfd_canonicalize_dynamic_reloc, (abfd, arels, asyms))
--
-- extern bfd_byte *bfd_get_relocated_section_contents
-- (bfd *, struct bfd_link_info *, struct bfd_link_order *, bfd_byte *,
-- bfd_boolean, asymbol **);
--
--2.3.1.16 `bfd_alt_mach_code'
--............................
--
--*Synopsis*
-- bfd_boolean bfd_alt_mach_code (bfd *abfd, int alternative);
-- *Description*
--When more than one machine code number is available for the same
--machine type, this function can be used to switch between the preferred
--one (alternative == 0) and any others. Currently, only ELF supports
--this feature, with up to two alternate machine codes.
--
--2.3.1.17 `bfd_emul_get_maxpagesize'
--...................................
--
--*Synopsis*
-- bfd_vma bfd_emul_get_maxpagesize (const char *);
-- *Description*
--Returns the maximum page size, in bytes, as determined by emulation.
--
-- *Returns*
--Returns the maximum page size in bytes for ELF, 0 otherwise.
--
--2.3.1.18 `bfd_emul_set_maxpagesize'
--...................................
--
--*Synopsis*
-- void bfd_emul_set_maxpagesize (const char *, bfd_vma);
-- *Description*
--For ELF, set the maximum page size for the emulation. It is a no-op
--for other formats.
--
--2.3.1.19 `bfd_emul_get_commonpagesize'
--......................................
--
--*Synopsis*
-- bfd_vma bfd_emul_get_commonpagesize (const char *);
-- *Description*
--Returns the common page size, in bytes, as determined by emulation.
--
-- *Returns*
--Returns the common page size in bytes for ELF, 0 otherwise.
--
--2.3.1.20 `bfd_emul_set_commonpagesize'
--......................................
--
--*Synopsis*
-- void bfd_emul_set_commonpagesize (const char *, bfd_vma);
-- *Description*
--For ELF, set the common page size for the emulation. It is a no-op for
--other formats.
--
--2.3.1.21 `bfd_demangle'
--.......................
--
--*Synopsis*
-- char *bfd_demangle (bfd *, const char *, int);
-- *Description*
--Wrapper around cplus_demangle. Strips leading underscores and other
--such chars that would otherwise confuse the demangler. If passed a g++
--v3 ABI mangled name, returns a buffer allocated with malloc holding the
--demangled name. Returns NULL otherwise and on memory alloc failure.
--
--2.3.1.22 `struct bfd_iovec'
--...........................
--
--*Description*
--The `struct bfd_iovec' contains the internal file I/O class. Each
--`BFD' has an instance of this class and all file I/O is routed through
--it (it is assumed that the instance implements all methods listed
--below).
-- struct bfd_iovec
-- {
-- /* To avoid problems with macros, a "b" rather than "f"
-- prefix is prepended to each method name. */
-- /* Attempt to read/write NBYTES on ABFD's IOSTREAM storing/fetching
-- bytes starting at PTR. Return the number of bytes actually
-- transfered (a read past end-of-file returns less than NBYTES),
-- or -1 (setting `bfd_error') if an error occurs. */
-- file_ptr (*bread) (struct bfd *abfd, void *ptr, file_ptr nbytes);
-- file_ptr (*bwrite) (struct bfd *abfd, const void *ptr,
-- file_ptr nbytes);
-- /* Return the current IOSTREAM file offset, or -1 (setting `bfd_error'
-- if an error occurs. */
-- file_ptr (*btell) (struct bfd *abfd);
-- /* For the following, on successful completion a value of 0 is returned.
-- Otherwise, a value of -1 is returned (and `bfd_error' is set). */
-- int (*bseek) (struct bfd *abfd, file_ptr offset, int whence);
-- int (*bclose) (struct bfd *abfd);
-- int (*bflush) (struct bfd *abfd);
-- int (*bstat) (struct bfd *abfd, struct stat *sb);
-- /* Mmap a part of the files. ADDR, LEN, PROT, FLAGS and OFFSET are the usual
-- mmap parameter, except that LEN and OFFSET do not need to be page
-- aligned. Returns (void *)-1 on failure, mmapped address on success.
-- Also write in MAP_ADDR the address of the page aligned buffer and in
-- MAP_LEN the size mapped (a page multiple). Use unmap with MAP_ADDR and
-- MAP_LEN to unmap. */
-- void *(*bmmap) (struct bfd *abfd, void *addr, bfd_size_type len,
-- int prot, int flags, file_ptr offset,
-- void **map_addr, bfd_size_type *map_len);
-- };
-- extern const struct bfd_iovec _bfd_memory_iovec;
--
--2.3.1.23 `bfd_get_mtime'
--........................
--
--*Synopsis*
-- long bfd_get_mtime (bfd *abfd);
-- *Description*
--Return the file modification time (as read from the file system, or
--from the archive header for archive members).
--
--2.3.1.24 `bfd_get_size'
--.......................
--
--*Synopsis*
-- file_ptr bfd_get_size (bfd *abfd);
-- *Description*
--Return the file size (as read from file system) for the file associated
--with BFD ABFD.
--
-- The initial motivation for, and use of, this routine is not so we
--can get the exact size of the object the BFD applies to, since that
--might not be generally possible (archive members for example). It
--would be ideal if someone could eventually modify it so that such
--results were guaranteed.
--
-- Instead, we want to ask questions like "is this NNN byte sized
--object I'm about to try read from file offset YYY reasonable?" As as
--example of where we might do this, some object formats use string
--tables for which the first `sizeof (long)' bytes of the table contain
--the size of the table itself, including the size bytes. If an
--application tries to read what it thinks is one of these string tables,
--without some way to validate the size, and for some reason the size is
--wrong (byte swapping error, wrong location for the string table, etc.),
--the only clue is likely to be a read error when it tries to read the
--table, or a "virtual memory exhausted" error when it tries to allocate
--15 bazillon bytes of space for the 15 bazillon byte table it is about
--to read. This function at least allows us to answer the question, "is
--the size reasonable?".
--
--2.3.1.25 `bfd_mmap'
--...................
--
--*Synopsis*
-- void *bfd_mmap (bfd *abfd, void *addr, bfd_size_type len,
-- int prot, int flags, file_ptr offset,
-- void **map_addr, bfd_size_type *map_len);
-- *Description*
--Return mmap()ed region of the file, if possible and implemented. LEN
--and OFFSET do not need to be page aligned. The page aligned address
--and length are written to MAP_ADDR and MAP_LEN.
--
--
--File: bfd.info, Node: Memory Usage, Next: Initialization, Prev: Miscellaneous, Up: BFD front end
--
--2.4 Memory Usage
--================
--
--BFD keeps all of its internal structures in obstacks. There is one
--obstack per open BFD file, into which the current state is stored. When
--a BFD is closed, the obstack is deleted, and so everything which has
--been allocated by BFD for the closing file is thrown away.
--
-- BFD does not free anything created by an application, but pointers
--into `bfd' structures become invalid on a `bfd_close'; for example,
--after a `bfd_close' the vector passed to `bfd_canonicalize_symtab' is
--still around, since it has been allocated by the application, but the
--data that it pointed to are lost.
--
-- The general rule is to not close a BFD until all operations dependent
--upon data from the BFD have been completed, or all the data from within
--the file has been copied. To help with the management of memory, there
--is a function (`bfd_alloc_size') which returns the number of bytes in
--obstacks associated with the supplied BFD. This could be used to select
--the greediest open BFD, close it to reclaim the memory, perform some
--operation and reopen the BFD again, to get a fresh copy of the data
--structures.
--
--
--File: bfd.info, Node: Initialization, Next: Sections, Prev: Memory Usage, Up: BFD front end
--
--2.5 Initialization
--==================
--
--2.5.1 Initialization functions
--------------------------------
--
--These are the functions that handle initializing a BFD.
--
--2.5.1.1 `bfd_init'
--..................
--
--*Synopsis*
-- void bfd_init (void);
-- *Description*
--This routine must be called before any other BFD function to initialize
--magical internal data structures.
--
--
--File: bfd.info, Node: Sections, Next: Symbols, Prev: Initialization, Up: BFD front end
--
--2.6 Sections
--============
--
--The raw data contained within a BFD is maintained through the section
--abstraction. A single BFD may have any number of sections. It keeps
--hold of them by pointing to the first; each one points to the next in
--the list.
--
-- Sections are supported in BFD in `section.c'.
--
--* Menu:
--
--* Section Input::
--* Section Output::
--* typedef asection::
--* section prototypes::
--
--
--File: bfd.info, Node: Section Input, Next: Section Output, Prev: Sections, Up: Sections
--
--2.6.1 Section input
---------------------
--
--When a BFD is opened for reading, the section structures are created
--and attached to the BFD.
--
-- Each section has a name which describes the section in the outside
--world--for example, `a.out' would contain at least three sections,
--called `.text', `.data' and `.bss'.
--
-- Names need not be unique; for example a COFF file may have several
--sections named `.data'.
--
-- Sometimes a BFD will contain more than the "natural" number of
--sections. A back end may attach other sections containing constructor
--data, or an application may add a section (using `bfd_make_section') to
--the sections attached to an already open BFD. For example, the linker
--creates an extra section `COMMON' for each input file's BFD to hold
--information about common storage.
--
-- The raw data is not necessarily read in when the section descriptor
--is created. Some targets may leave the data in place until a
--`bfd_get_section_contents' call is made. Other back ends may read in
--all the data at once. For example, an S-record file has to be read
--once to determine the size of the data. An IEEE-695 file doesn't
--contain raw data in sections, but data and relocation expressions
--intermixed, so the data area has to be parsed to get out the data and
--relocations.
--
--
--File: bfd.info, Node: Section Output, Next: typedef asection, Prev: Section Input, Up: Sections
--
--2.6.2 Section output
----------------------
--
--To write a new object style BFD, the various sections to be written
--have to be created. They are attached to the BFD in the same way as
--input sections; data is written to the sections using
--`bfd_set_section_contents'.
--
-- Any program that creates or combines sections (e.g., the assembler
--and linker) must use the `asection' fields `output_section' and
--`output_offset' to indicate the file sections to which each section
--must be written. (If the section is being created from scratch,
--`output_section' should probably point to the section itself and
--`output_offset' should probably be zero.)
--
-- The data to be written comes from input sections attached (via
--`output_section' pointers) to the output sections. The output section
--structure can be considered a filter for the input section: the output
--section determines the vma of the output data and the name, but the
--input section determines the offset into the output section of the data
--to be written.
--
-- E.g., to create a section "O", starting at 0x100, 0x123 long,
--containing two subsections, "A" at offset 0x0 (i.e., at vma 0x100) and
--"B" at offset 0x20 (i.e., at vma 0x120) the `asection' structures would
--look like:
--
-- section name "A"
-- output_offset 0x00
-- size 0x20
-- output_section -----------> section name "O"
-- | vma 0x100
-- section name "B" | size 0x123
-- output_offset 0x20 |
-- size 0x103 |
-- output_section --------|
--
--2.6.3 Link orders
-------------------
--
--The data within a section is stored in a "link_order". These are much
--like the fixups in `gas'. The link_order abstraction allows a section
--to grow and shrink within itself.
--
-- A link_order knows how big it is, and which is the next link_order
--and where the raw data for it is; it also points to a list of
--relocations which apply to it.
--
-- The link_order is used by the linker to perform relaxing on final
--code. The compiler creates code which is as big as necessary to make
--it work without relaxing, and the user can select whether to relax.
--Sometimes relaxing takes a lot of time. The linker runs around the
--relocations to see if any are attached to data which can be shrunk, if
--so it does it on a link_order by link_order basis.
--
--
--File: bfd.info, Node: typedef asection, Next: section prototypes, Prev: Section Output, Up: Sections
--
--2.6.4 typedef asection
------------------------
--
--Here is the section structure:
--
--
-- typedef struct bfd_section
-- {
-- /* The name of the section; the name isn't a copy, the pointer is
-- the same as that passed to bfd_make_section. */
-- const char *name;
--
-- /* A unique sequence number. */
-- int id;
--
-- /* Which section in the bfd; 0..n-1 as sections are created in a bfd. */
-- int index;
--
-- /* The next section in the list belonging to the BFD, or NULL. */
-- struct bfd_section *next;
--
-- /* The previous section in the list belonging to the BFD, or NULL. */
-- struct bfd_section *prev;
--
-- /* The field flags contains attributes of the section. Some
-- flags are read in from the object file, and some are
-- synthesized from other information. */
-- flagword flags;
--
-- #define SEC_NO_FLAGS 0x000
--
-- /* Tells the OS to allocate space for this section when loading.
-- This is clear for a section containing debug information only. */
-- #define SEC_ALLOC 0x001
--
-- /* Tells the OS to load the section from the file when loading.
-- This is clear for a .bss section. */
-- #define SEC_LOAD 0x002
--
-- /* The section contains data still to be relocated, so there is
-- some relocation information too. */
-- #define SEC_RELOC 0x004
--
-- /* A signal to the OS that the section contains read only data. */
-- #define SEC_READONLY 0x008
--
-- /* The section contains code only. */
-- #define SEC_CODE 0x010
--
-- /* The section contains data only. */
-- #define SEC_DATA 0x020
--
-- /* The section will reside in ROM. */
-- #define SEC_ROM 0x040
--
-- /* The section contains constructor information. This section
-- type is used by the linker to create lists of constructors and
-- destructors used by `g++'. When a back end sees a symbol
-- which should be used in a constructor list, it creates a new
-- section for the type of name (e.g., `__CTOR_LIST__'), attaches
-- the symbol to it, and builds a relocation. To build the lists
-- of constructors, all the linker has to do is catenate all the
-- sections called `__CTOR_LIST__' and relocate the data
-- contained within - exactly the operations it would peform on
-- standard data. */
-- #define SEC_CONSTRUCTOR 0x080
--
-- /* The section has contents - a data section could be
-- `SEC_ALLOC' | `SEC_HAS_CONTENTS'; a debug section could be
-- `SEC_HAS_CONTENTS' */
-- #define SEC_HAS_CONTENTS 0x100
--
-- /* An instruction to the linker to not output the section
-- even if it has information which would normally be written. */
-- #define SEC_NEVER_LOAD 0x200
--
-- /* The section contains thread local data. */
-- #define SEC_THREAD_LOCAL 0x400
--
-- /* The section has GOT references. This flag is only for the
-- linker, and is currently only used by the elf32-hppa back end.
-- It will be set if global offset table references were detected
-- in this section, which indicate to the linker that the section
-- contains PIC code, and must be handled specially when doing a
-- static link. */
-- #define SEC_HAS_GOT_REF 0x800
--
-- /* The section contains common symbols (symbols may be defined
-- multiple times, the value of a symbol is the amount of
-- space it requires, and the largest symbol value is the one
-- used). Most targets have exactly one of these (which we
-- translate to bfd_com_section_ptr), but ECOFF has two. */
-- #define SEC_IS_COMMON 0x1000
--
-- /* The section contains only debugging information. For
-- example, this is set for ELF .debug and .stab sections.
-- strip tests this flag to see if a section can be
-- discarded. */
-- #define SEC_DEBUGGING 0x2000
--
-- /* The contents of this section are held in memory pointed to
-- by the contents field. This is checked by bfd_get_section_contents,
-- and the data is retrieved from memory if appropriate. */
-- #define SEC_IN_MEMORY 0x4000
--
-- /* The contents of this section are to be excluded by the
-- linker for executable and shared objects unless those
-- objects are to be further relocated. */
-- #define SEC_EXCLUDE 0x8000
--
-- /* The contents of this section are to be sorted based on the sum of
-- the symbol and addend values specified by the associated relocation
-- entries. Entries without associated relocation entries will be
-- appended to the end of the section in an unspecified order. */
-- #define SEC_SORT_ENTRIES 0x10000
--
-- /* When linking, duplicate sections of the same name should be
-- discarded, rather than being combined into a single section as
-- is usually done. This is similar to how common symbols are
-- handled. See SEC_LINK_DUPLICATES below. */
-- #define SEC_LINK_ONCE 0x20000
--
-- /* If SEC_LINK_ONCE is set, this bitfield describes how the linker
-- should handle duplicate sections. */
-- #define SEC_LINK_DUPLICATES 0xc0000
--
-- /* This value for SEC_LINK_DUPLICATES means that duplicate
-- sections with the same name should simply be discarded. */
-- #define SEC_LINK_DUPLICATES_DISCARD 0x0
--
-- /* This value for SEC_LINK_DUPLICATES means that the linker
-- should warn if there are any duplicate sections, although
-- it should still only link one copy. */
-- #define SEC_LINK_DUPLICATES_ONE_ONLY 0x40000
--
-- /* This value for SEC_LINK_DUPLICATES means that the linker
-- should warn if any duplicate sections are a different size. */
-- #define SEC_LINK_DUPLICATES_SAME_SIZE 0x80000
--
-- /* This value for SEC_LINK_DUPLICATES means that the linker
-- should warn if any duplicate sections contain different
-- contents. */
-- #define SEC_LINK_DUPLICATES_SAME_CONTENTS \
-- (SEC_LINK_DUPLICATES_ONE_ONLY | SEC_LINK_DUPLICATES_SAME_SIZE)
--
-- /* This section was created by the linker as part of dynamic
-- relocation or other arcane processing. It is skipped when
-- going through the first-pass output, trusting that someone
-- else up the line will take care of it later. */
-- #define SEC_LINKER_CREATED 0x100000
--
-- /* This section should not be subject to garbage collection.
-- Also set to inform the linker that this section should not be
-- listed in the link map as discarded. */
-- #define SEC_KEEP 0x200000
--
-- /* This section contains "short" data, and should be placed
-- "near" the GP. */
-- #define SEC_SMALL_DATA 0x400000
--
-- /* Attempt to merge identical entities in the section.
-- Entity size is given in the entsize field. */
-- #define SEC_MERGE 0x800000
--
-- /* If given with SEC_MERGE, entities to merge are zero terminated
-- strings where entsize specifies character size instead of fixed
-- size entries. */
-- #define SEC_STRINGS 0x1000000
--
-- /* This section contains data about section groups. */
-- #define SEC_GROUP 0x2000000
--
-- /* The section is a COFF shared library section. This flag is
-- only for the linker. If this type of section appears in
-- the input file, the linker must copy it to the output file
-- without changing the vma or size. FIXME: Although this
-- was originally intended to be general, it really is COFF
-- specific (and the flag was renamed to indicate this). It
-- might be cleaner to have some more general mechanism to
-- allow the back end to control what the linker does with
-- sections. */
-- #define SEC_COFF_SHARED_LIBRARY 0x4000000
--
-- /* This input section should be copied to output in reverse order
-- as an array of pointers. This is for ELF linker internal use
-- only. */
-- #define SEC_ELF_REVERSE_COPY 0x4000000
--
-- /* This section contains data which may be shared with other
-- executables or shared objects. This is for COFF only. */
-- #define SEC_COFF_SHARED 0x8000000
--
-- /* When a section with this flag is being linked, then if the size of
-- the input section is less than a page, it should not cross a page
-- boundary. If the size of the input section is one page or more,
-- it should be aligned on a page boundary. This is for TI
-- TMS320C54X only. */
-- #define SEC_TIC54X_BLOCK 0x10000000
--
-- /* Conditionally link this section; do not link if there are no
-- references found to any symbol in the section. This is for TI
-- TMS320C54X only. */
-- #define SEC_TIC54X_CLINK 0x20000000
--
-- /* Indicate that section has the no read flag set. This happens
-- when memory read flag isn't set. */
-- #define SEC_COFF_NOREAD 0x40000000
--
-- /* End of section flags. */
--
-- /* Some internal packed boolean fields. */
--
-- /* See the vma field. */
-- unsigned int user_set_vma : 1;
--
-- /* A mark flag used by some of the linker backends. */
-- unsigned int linker_mark : 1;
--
-- /* Another mark flag used by some of the linker backends. Set for
-- output sections that have an input section. */
-- unsigned int linker_has_input : 1;
--
-- /* Mark flag used by some linker backends for garbage collection. */
-- unsigned int gc_mark : 1;
--
-- /* Section compression status. */
-- unsigned int compress_status : 2;
-- #define COMPRESS_SECTION_NONE 0
-- #define COMPRESS_SECTION_DONE 1
-- #define DECOMPRESS_SECTION_SIZED 2
--
-- /* The following flags are used by the ELF linker. */
--
-- /* Mark sections which have been allocated to segments. */
-- unsigned int segment_mark : 1;
--
-- /* Type of sec_info information. */
-- unsigned int sec_info_type:3;
-- #define SEC_INFO_TYPE_NONE 0
-- #define SEC_INFO_TYPE_STABS 1
-- #define SEC_INFO_TYPE_MERGE 2
-- #define SEC_INFO_TYPE_EH_FRAME 3
-- #define SEC_INFO_TYPE_JUST_SYMS 4
--
-- /* Nonzero if this section uses RELA relocations, rather than REL. */
-- unsigned int use_rela_p:1;
--
-- /* Bits used by various backends. The generic code doesn't touch
-- these fields. */
--
-- unsigned int sec_flg0:1;
-- unsigned int sec_flg1:1;
-- unsigned int sec_flg2:1;
-- unsigned int sec_flg3:1;
-- unsigned int sec_flg4:1;
-- unsigned int sec_flg5:1;
--
-- /* End of internal packed boolean fields. */
--
-- /* The virtual memory address of the section - where it will be
-- at run time. The symbols are relocated against this. The
-- user_set_vma flag is maintained by bfd; if it's not set, the
-- backend can assign addresses (for example, in `a.out', where
-- the default address for `.data' is dependent on the specific
-- target and various flags). */
-- bfd_vma vma;
--
-- /* The load address of the section - where it would be in a
-- rom image; really only used for writing section header
-- information. */
-- bfd_vma lma;
--
-- /* The size of the section in octets, as it will be output.
-- Contains a value even if the section has no contents (e.g., the
-- size of `.bss'). */
-- bfd_size_type size;
--
-- /* For input sections, the original size on disk of the section, in
-- octets. This field should be set for any section whose size is
-- changed by linker relaxation. It is required for sections where
-- the linker relaxation scheme doesn't cache altered section and
-- reloc contents (stabs, eh_frame, SEC_MERGE, some coff relaxing
-- targets), and thus the original size needs to be kept to read the
-- section multiple times. For output sections, rawsize holds the
-- section size calculated on a previous linker relaxation pass. */
-- bfd_size_type rawsize;
--
-- /* The compressed size of the section in octets. */
-- bfd_size_type compressed_size;
--
-- /* Relaxation table. */
-- struct relax_table *relax;
--
-- /* Count of used relaxation table entries. */
-- int relax_count;
--
--
-- /* If this section is going to be output, then this value is the
-- offset in *bytes* into the output section of the first byte in the
-- input section (byte ==> smallest addressable unit on the
-- target). In most cases, if this was going to start at the
-- 100th octet (8-bit quantity) in the output section, this value
-- would be 100. However, if the target byte size is 16 bits
-- (bfd_octets_per_byte is "2"), this value would be 50. */
-- bfd_vma output_offset;
--
-- /* The output section through which to map on output. */
-- struct bfd_section *output_section;
--
-- /* The alignment requirement of the section, as an exponent of 2 -
-- e.g., 3 aligns to 2^3 (or 8). */
-- unsigned int alignment_power;
--
-- /* If an input section, a pointer to a vector of relocation
-- records for the data in this section. */
-- struct reloc_cache_entry *relocation;
--
-- /* If an output section, a pointer to a vector of pointers to
-- relocation records for the data in this section. */
-- struct reloc_cache_entry **orelocation;
--
-- /* The number of relocation records in one of the above. */
-- unsigned reloc_count;
--
-- /* Information below is back end specific - and not always used
-- or updated. */
--
-- /* File position of section data. */
-- file_ptr filepos;
--
-- /* File position of relocation info. */
-- file_ptr rel_filepos;
--
-- /* File position of line data. */
-- file_ptr line_filepos;
--
-- /* Pointer to data for applications. */
-- void *userdata;
--
-- /* If the SEC_IN_MEMORY flag is set, this points to the actual
-- contents. */
-- unsigned char *contents;
--
-- /* Attached line number information. */
-- alent *lineno;
--
-- /* Number of line number records. */
-- unsigned int lineno_count;
--
-- /* Entity size for merging purposes. */
-- unsigned int entsize;
--
-- /* Points to the kept section if this section is a link-once section,
-- and is discarded. */
-- struct bfd_section *kept_section;
--
-- /* When a section is being output, this value changes as more
-- linenumbers are written out. */
-- file_ptr moving_line_filepos;
--
-- /* What the section number is in the target world. */
-- int target_index;
--
-- void *used_by_bfd;
--
-- /* If this is a constructor section then here is a list of the
-- relocations created to relocate items within it. */
-- struct relent_chain *constructor_chain;
--
-- /* The BFD which owns the section. */
-- bfd *owner;
--
-- /* A symbol which points at this section only. */
-- struct bfd_symbol *symbol;
-- struct bfd_symbol **symbol_ptr_ptr;
--
-- /* Early in the link process, map_head and map_tail are used to build
-- a list of input sections attached to an output section. Later,
-- output sections use these fields for a list of bfd_link_order
-- structs. */
-- union {
-- struct bfd_link_order *link_order;
-- struct bfd_section *s;
-- } map_head, map_tail;
-- } asection;
--
-- /* Relax table contains information about instructions which can
-- be removed by relaxation -- replacing a long address with a
-- short address. */
-- struct relax_table {
-- /* Address where bytes may be deleted. */
-- bfd_vma addr;
--
-- /* Number of bytes to be deleted. */
-- int size;
-- };
--
-- /* These sections are global, and are managed by BFD. The application
-- and target back end are not permitted to change the values in
-- these sections. */
-- extern asection _bfd_std_section[4];
--
-- #define BFD_ABS_SECTION_NAME "*ABS*"
-- #define BFD_UND_SECTION_NAME "*UND*"
-- #define BFD_COM_SECTION_NAME "*COM*"
-- #define BFD_IND_SECTION_NAME "*IND*"
--
-- /* Pointer to the common section. */
-- #define bfd_com_section_ptr (&_bfd_std_section[0])
-- /* Pointer to the undefined section. */
-- #define bfd_und_section_ptr (&_bfd_std_section[1])
-- /* Pointer to the absolute section. */
-- #define bfd_abs_section_ptr (&_bfd_std_section[2])
-- /* Pointer to the indirect section. */
-- #define bfd_ind_section_ptr (&_bfd_std_section[3])
--
-- #define bfd_is_und_section(sec) ((sec) == bfd_und_section_ptr)
-- #define bfd_is_abs_section(sec) ((sec) == bfd_abs_section_ptr)
-- #define bfd_is_ind_section(sec) ((sec) == bfd_ind_section_ptr)
--
-- #define bfd_is_const_section(SEC) \
-- ( ((SEC) == bfd_abs_section_ptr) \
-- || ((SEC) == bfd_und_section_ptr) \
-- || ((SEC) == bfd_com_section_ptr) \
-- || ((SEC) == bfd_ind_section_ptr))
--
-- /* Macros to handle insertion and deletion of a bfd's sections. These
-- only handle the list pointers, ie. do not adjust section_count,
-- target_index etc. */
-- #define bfd_section_list_remove(ABFD, S) \
-- do \
-- { \
-- asection *_s = S; \
-- asection *_next = _s->next; \
-- asection *_prev = _s->prev; \
-- if (_prev) \
-- _prev->next = _next; \
-- else \
-- (ABFD)->sections = _next; \
-- if (_next) \
-- _next->prev = _prev; \
-- else \
-- (ABFD)->section_last = _prev; \
-- } \
-- while (0)
-- #define bfd_section_list_append(ABFD, S) \
-- do \
-- { \
-- asection *_s = S; \
-- bfd *_abfd = ABFD; \
-- _s->next = NULL; \
-- if (_abfd->section_last) \
-- { \
-- _s->prev = _abfd->section_last; \
-- _abfd->section_last->next = _s; \
-- } \
-- else \
-- { \
-- _s->prev = NULL; \
-- _abfd->sections = _s; \
-- } \
-- _abfd->section_last = _s; \
-- } \
-- while (0)
-- #define bfd_section_list_prepend(ABFD, S) \
-- do \
-- { \
-- asection *_s = S; \
-- bfd *_abfd = ABFD; \
-- _s->prev = NULL; \
-- if (_abfd->sections) \
-- { \
-- _s->next = _abfd->sections; \
-- _abfd->sections->prev = _s; \
-- } \
-- else \
-- { \
-- _s->next = NULL; \
-- _abfd->section_last = _s; \
-- } \
-- _abfd->sections = _s; \
-- } \
-- while (0)
-- #define bfd_section_list_insert_after(ABFD, A, S) \
-- do \
-- { \
-- asection *_a = A; \
-- asection *_s = S; \
-- asection *_next = _a->next; \
-- _s->next = _next; \
-- _s->prev = _a; \
-- _a->next = _s; \
-- if (_next) \
-- _next->prev = _s; \
-- else \
-- (ABFD)->section_last = _s; \
-- } \
-- while (0)
-- #define bfd_section_list_insert_before(ABFD, B, S) \
-- do \
-- { \
-- asection *_b = B; \
-- asection *_s = S; \
-- asection *_prev = _b->prev; \
-- _s->prev = _prev; \
-- _s->next = _b; \
-- _b->prev = _s; \
-- if (_prev) \
-- _prev->next = _s; \
-- else \
-- (ABFD)->sections = _s; \
-- } \
-- while (0)
-- #define bfd_section_removed_from_list(ABFD, S) \
-- ((S)->next == NULL ? (ABFD)->section_last != (S) : (S)->next->prev != (S))
--
-- #define BFD_FAKE_SECTION(SEC, FLAGS, SYM, NAME, IDX) \
-- /* name, id, index, next, prev, flags, user_set_vma, */ \
-- { NAME, IDX, 0, NULL, NULL, FLAGS, 0, \
-- \
-- /* linker_mark, linker_has_input, gc_mark, decompress_status, */ \
-- 0, 0, 1, 0, \
-- \
-- /* segment_mark, sec_info_type, use_rela_p, */ \
-- 0, 0, 0, \
-- \
-- /* sec_flg0, sec_flg1, sec_flg2, sec_flg3, sec_flg4, sec_flg5, */ \
-- 0, 0, 0, 0, 0, 0, \
-- \
-- /* vma, lma, size, rawsize, compressed_size, relax, relax_count, */ \
-- 0, 0, 0, 0, 0, 0, 0, \
-- \
-- /* output_offset, output_section, alignment_power, */ \
-- 0, &SEC, 0, \
-- \
-- /* relocation, orelocation, reloc_count, filepos, rel_filepos, */ \
-- NULL, NULL, 0, 0, 0, \
-- \
-- /* line_filepos, userdata, contents, lineno, lineno_count, */ \
-- 0, NULL, NULL, NULL, 0, \
-- \
-- /* entsize, kept_section, moving_line_filepos, */ \
-- 0, NULL, 0, \
-- \
-- /* target_index, used_by_bfd, constructor_chain, owner, */ \
-- 0, NULL, NULL, NULL, \
-- \
-- /* symbol, symbol_ptr_ptr, */ \
-- (struct bfd_symbol *) SYM, &SEC.symbol, \
-- \
-- /* map_head, map_tail */ \
-- { NULL }, { NULL } \
-- }
--
--
--File: bfd.info, Node: section prototypes, Prev: typedef asection, Up: Sections
--
--2.6.5 Section prototypes
--------------------------
--
--These are the functions exported by the section handling part of BFD.
--
--2.6.5.1 `bfd_section_list_clear'
--................................
--
--*Synopsis*
-- void bfd_section_list_clear (bfd *);
-- *Description*
--Clears the section list, and also resets the section count and hash
--table entries.
--
--2.6.5.2 `bfd_get_section_by_name'
--.................................
--
--*Synopsis*
-- asection *bfd_get_section_by_name (bfd *abfd, const char *name);
-- *Description*
--Return the most recently created section attached to ABFD named NAME.
--Return NULL if no such section exists.
--
--2.6.5.3 `bfd_get_next_section_by_name'
--......................................
--
--*Synopsis*
-- asection *bfd_get_next_section_by_name (asection *sec);
-- *Description*
--Given SEC is a section returned by `bfd_get_section_by_name', return
--the next most recently created section attached to the same BFD with
--the same name. Return NULL if no such section exists.
--
--2.6.5.4 `bfd_get_linker_section'
--................................
--
--*Synopsis*
-- asection *bfd_get_linker_section (bfd *abfd, const char *name);
-- *Description*
--Return the linker created section attached to ABFD named NAME. Return
--NULL if no such section exists.
--
--2.6.5.5 `bfd_get_section_by_name_if'
--....................................
--
--*Synopsis*
-- asection *bfd_get_section_by_name_if
-- (bfd *abfd,
-- const char *name,
-- bfd_boolean (*func) (bfd *abfd, asection *sect, void *obj),
-- void *obj);
-- *Description*
--Call the provided function FUNC for each section attached to the BFD
--ABFD whose name matches NAME, passing OBJ as an argument. The function
--will be called as if by
--
-- func (abfd, the_section, obj);
--
-- It returns the first section for which FUNC returns true, otherwise
--`NULL'.
--
--2.6.5.6 `bfd_get_unique_section_name'
--.....................................
--
--*Synopsis*
-- char *bfd_get_unique_section_name
-- (bfd *abfd, const char *templat, int *count);
-- *Description*
--Invent a section name that is unique in ABFD by tacking a dot and a
--digit suffix onto the original TEMPLAT. If COUNT is non-NULL, then it
--specifies the first number tried as a suffix to generate a unique name.
--The value pointed to by COUNT will be incremented in this case.
--
--2.6.5.7 `bfd_make_section_old_way'
--..................................
--
--*Synopsis*
-- asection *bfd_make_section_old_way (bfd *abfd, const char *name);
-- *Description*
--Create a new empty section called NAME and attach it to the end of the
--chain of sections for the BFD ABFD. An attempt to create a section with
--a name which is already in use returns its pointer without changing the
--section chain.
--
-- It has the funny name since this is the way it used to be before it
--was rewritten....
--
-- Possible errors are:
-- * `bfd_error_invalid_operation' - If output has already started for
-- this BFD.
--
-- * `bfd_error_no_memory' - If memory allocation fails.
--
--2.6.5.8 `bfd_make_section_anyway_with_flags'
--............................................
--
--*Synopsis*
-- asection *bfd_make_section_anyway_with_flags
-- (bfd *abfd, const char *name, flagword flags);
-- *Description*
--Create a new empty section called NAME and attach it to the end of the
--chain of sections for ABFD. Create a new section even if there is
--already a section with that name. Also set the attributes of the new
--section to the value FLAGS.
--
-- Return `NULL' and set `bfd_error' on error; possible errors are:
-- * `bfd_error_invalid_operation' - If output has already started for
-- ABFD.
--
-- * `bfd_error_no_memory' - If memory allocation fails.
--
--2.6.5.9 `bfd_make_section_anyway'
--.................................
--
--*Synopsis*
-- asection *bfd_make_section_anyway (bfd *abfd, const char *name);
-- *Description*
--Create a new empty section called NAME and attach it to the end of the
--chain of sections for ABFD. Create a new section even if there is
--already a section with that name.
--
-- Return `NULL' and set `bfd_error' on error; possible errors are:
-- * `bfd_error_invalid_operation' - If output has already started for
-- ABFD.
--
-- * `bfd_error_no_memory' - If memory allocation fails.
--
--2.6.5.10 `bfd_make_section_with_flags'
--......................................
--
--*Synopsis*
-- asection *bfd_make_section_with_flags
-- (bfd *, const char *name, flagword flags);
-- *Description*
--Like `bfd_make_section_anyway', but return `NULL' (without calling
--bfd_set_error ()) without changing the section chain if there is
--already a section named NAME. Also set the attributes of the new
--section to the value FLAGS. If there is an error, return `NULL' and set
--`bfd_error'.
--
--2.6.5.11 `bfd_make_section'
--...........................
--
--*Synopsis*
-- asection *bfd_make_section (bfd *, const char *name);
-- *Description*
--Like `bfd_make_section_anyway', but return `NULL' (without calling
--bfd_set_error ()) without changing the section chain if there is
--already a section named NAME. If there is an error, return `NULL' and
--set `bfd_error'.
--
--2.6.5.12 `bfd_set_section_flags'
--................................
--
--*Synopsis*
-- bfd_boolean bfd_set_section_flags
-- (bfd *abfd, asection *sec, flagword flags);
-- *Description*
--Set the attributes of the section SEC in the BFD ABFD to the value
--FLAGS. Return `TRUE' on success, `FALSE' on error. Possible error
--returns are:
--
-- * `bfd_error_invalid_operation' - The section cannot have one or
-- more of the attributes requested. For example, a .bss section in
-- `a.out' may not have the `SEC_HAS_CONTENTS' field set.
--
--2.6.5.13 `bfd_rename_section'
--.............................
--
--*Synopsis*
-- void bfd_rename_section
-- (bfd *abfd, asection *sec, const char *newname);
-- *Description*
--Rename section SEC in ABFD to NEWNAME.
--
--2.6.5.14 `bfd_map_over_sections'
--................................
--
--*Synopsis*
-- void bfd_map_over_sections
-- (bfd *abfd,
-- void (*func) (bfd *abfd, asection *sect, void *obj),
-- void *obj);
-- *Description*
--Call the provided function FUNC for each section attached to the BFD
--ABFD, passing OBJ as an argument. The function will be called as if by
--
-- func (abfd, the_section, obj);
--
-- This is the preferred method for iterating over sections; an
--alternative would be to use a loop:
--
-- asection *p;
-- for (p = abfd->sections; p != NULL; p = p->next)
-- func (abfd, p, ...)
--
--2.6.5.15 `bfd_sections_find_if'
--...............................
--
--*Synopsis*
-- asection *bfd_sections_find_if
-- (bfd *abfd,
-- bfd_boolean (*operation) (bfd *abfd, asection *sect, void *obj),
-- void *obj);
-- *Description*
--Call the provided function OPERATION for each section attached to the
--BFD ABFD, passing OBJ as an argument. The function will be called as if
--by
--
-- operation (abfd, the_section, obj);
--
-- It returns the first section for which OPERATION returns true.
--
--2.6.5.16 `bfd_set_section_size'
--...............................
--
--*Synopsis*
-- bfd_boolean bfd_set_section_size
-- (bfd *abfd, asection *sec, bfd_size_type val);
-- *Description*
--Set SEC to the size VAL. If the operation is ok, then `TRUE' is
--returned, else `FALSE'.
--
-- Possible error returns:
-- * `bfd_error_invalid_operation' - Writing has started to the BFD, so
-- setting the size is invalid.
--
--2.6.5.17 `bfd_set_section_contents'
--...................................
--
--*Synopsis*
-- bfd_boolean bfd_set_section_contents
-- (bfd *abfd, asection *section, const void *data,
-- file_ptr offset, bfd_size_type count);
-- *Description*
--Sets the contents of the section SECTION in BFD ABFD to the data
--starting in memory at DATA. The data is written to the output section
--starting at offset OFFSET for COUNT octets.
--
-- Normally `TRUE' is returned, else `FALSE'. Possible error returns
--are:
-- * `bfd_error_no_contents' - The output section does not have the
-- `SEC_HAS_CONTENTS' attribute, so nothing can be written to it.
--
-- * and some more too
-- This routine is front end to the back end function
--`_bfd_set_section_contents'.
--
--2.6.5.18 `bfd_get_section_contents'
--...................................
--
--*Synopsis*
-- bfd_boolean bfd_get_section_contents
-- (bfd *abfd, asection *section, void *location, file_ptr offset,
-- bfd_size_type count);
-- *Description*
--Read data from SECTION in BFD ABFD into memory starting at LOCATION.
--The data is read at an offset of OFFSET from the start of the input
--section, and is read for COUNT bytes.
--
-- If the contents of a constructor with the `SEC_CONSTRUCTOR' flag set
--are requested or if the section does not have the `SEC_HAS_CONTENTS'
--flag set, then the LOCATION is filled with zeroes. If no errors occur,
--`TRUE' is returned, else `FALSE'.
--
--2.6.5.19 `bfd_malloc_and_get_section'
--.....................................
--
--*Synopsis*
-- bfd_boolean bfd_malloc_and_get_section
-- (bfd *abfd, asection *section, bfd_byte **buf);
-- *Description*
--Read all data from SECTION in BFD ABFD into a buffer, *BUF, malloc'd by
--this function.
--
--2.6.5.20 `bfd_copy_private_section_data'
--........................................
--
--*Synopsis*
-- bfd_boolean bfd_copy_private_section_data
-- (bfd *ibfd, asection *isec, bfd *obfd, asection *osec);
-- *Description*
--Copy private section information from ISEC in the BFD IBFD to the
--section OSEC in the BFD OBFD. Return `TRUE' on success, `FALSE' on
--error. Possible error returns are:
--
-- * `bfd_error_no_memory' - Not enough memory exists to create private
-- data for OSEC.
--
-- #define bfd_copy_private_section_data(ibfd, isection, obfd, osection) \
-- BFD_SEND (obfd, _bfd_copy_private_section_data, \
-- (ibfd, isection, obfd, osection))
--
--2.6.5.21 `bfd_generic_is_group_section'
--.......................................
--
--*Synopsis*
-- bfd_boolean bfd_generic_is_group_section (bfd *, const asection *sec);
-- *Description*
--Returns TRUE if SEC is a member of a group.
--
--2.6.5.22 `bfd_generic_discard_group'
--....................................
--
--*Synopsis*
-- bfd_boolean bfd_generic_discard_group (bfd *abfd, asection *group);
-- *Description*
--Remove all members of GROUP from the output.
--
--
--File: bfd.info, Node: Symbols, Next: Archives, Prev: Sections, Up: BFD front end
--
--2.7 Symbols
--===========
--
--BFD tries to maintain as much symbol information as it can when it
--moves information from file to file. BFD passes information to
--applications though the `asymbol' structure. When the application
--requests the symbol table, BFD reads the table in the native form and
--translates parts of it into the internal format. To maintain more than
--the information passed to applications, some targets keep some
--information "behind the scenes" in a structure only the particular back
--end knows about. For example, the coff back end keeps the original
--symbol table structure as well as the canonical structure when a BFD is
--read in. On output, the coff back end can reconstruct the output symbol
--table so that no information is lost, even information unique to coff
--which BFD doesn't know or understand. If a coff symbol table were read,
--but were written through an a.out back end, all the coff specific
--information would be lost. The symbol table of a BFD is not necessarily
--read in until a canonicalize request is made. Then the BFD back end
--fills in a table provided by the application with pointers to the
--canonical information. To output symbols, the application provides BFD
--with a table of pointers to pointers to `asymbol's. This allows
--applications like the linker to output a symbol as it was read, since
--the "behind the scenes" information will be still available.
--
--* Menu:
--
--* Reading Symbols::
--* Writing Symbols::
--* Mini Symbols::
--* typedef asymbol::
--* symbol handling functions::
--
--
--File: bfd.info, Node: Reading Symbols, Next: Writing Symbols, Prev: Symbols, Up: Symbols
--
--2.7.1 Reading symbols
-----------------------
--
--There are two stages to reading a symbol table from a BFD: allocating
--storage, and the actual reading process. This is an excerpt from an
--application which reads the symbol table:
--
-- long storage_needed;
-- asymbol **symbol_table;
-- long number_of_symbols;
-- long i;
--
-- storage_needed = bfd_get_symtab_upper_bound (abfd);
--
-- if (storage_needed < 0)
-- FAIL
--
-- if (storage_needed == 0)
-- return;
--
-- symbol_table = xmalloc (storage_needed);
-- ...
-- number_of_symbols =
-- bfd_canonicalize_symtab (abfd, symbol_table);
--
-- if (number_of_symbols < 0)
-- FAIL
--
-- for (i = 0; i < number_of_symbols; i++)
-- process_symbol (symbol_table[i]);
--
-- All storage for the symbols themselves is in an objalloc connected
--to the BFD; it is freed when the BFD is closed.
--
--
--File: bfd.info, Node: Writing Symbols, Next: Mini Symbols, Prev: Reading Symbols, Up: Symbols
--
--2.7.2 Writing symbols
-----------------------
--
--Writing of a symbol table is automatic when a BFD open for writing is
--closed. The application attaches a vector of pointers to pointers to
--symbols to the BFD being written, and fills in the symbol count. The
--close and cleanup code reads through the table provided and performs
--all the necessary operations. The BFD output code must always be
--provided with an "owned" symbol: one which has come from another BFD,
--or one which has been created using `bfd_make_empty_symbol'. Here is an
--example showing the creation of a symbol table with only one element:
--
-- #include "sysdep.h"
-- #include "bfd.h"
-- int main (void)
-- {
-- bfd *abfd;
-- asymbol *ptrs[2];
-- asymbol *new;
--
-- abfd = bfd_openw ("foo","a.out-sunos-big");
-- bfd_set_format (abfd, bfd_object);
-- new = bfd_make_empty_symbol (abfd);
-- new->name = "dummy_symbol";
-- new->section = bfd_make_section_old_way (abfd, ".text");
-- new->flags = BSF_GLOBAL;
-- new->value = 0x12345;
--
-- ptrs[0] = new;
-- ptrs[1] = 0;
--
-- bfd_set_symtab (abfd, ptrs, 1);
-- bfd_close (abfd);
-- return 0;
-- }
--
-- ./makesym
-- nm foo
-- 00012345 A dummy_symbol
--
-- Many formats cannot represent arbitrary symbol information; for
--instance, the `a.out' object format does not allow an arbitrary number
--of sections. A symbol pointing to a section which is not one of
--`.text', `.data' or `.bss' cannot be described.
--
--
--File: bfd.info, Node: Mini Symbols, Next: typedef asymbol, Prev: Writing Symbols, Up: Symbols
--
--2.7.3 Mini Symbols
--------------------
--
--Mini symbols provide read-only access to the symbol table. They use
--less memory space, but require more time to access. They can be useful
--for tools like nm or objdump, which may have to handle symbol tables of
--extremely large executables.
--
-- The `bfd_read_minisymbols' function will read the symbols into
--memory in an internal form. It will return a `void *' pointer to a
--block of memory, a symbol count, and the size of each symbol. The
--pointer is allocated using `malloc', and should be freed by the caller
--when it is no longer needed.
--
-- The function `bfd_minisymbol_to_symbol' will take a pointer to a
--minisymbol, and a pointer to a structure returned by
--`bfd_make_empty_symbol', and return a `asymbol' structure. The return
--value may or may not be the same as the value from
--`bfd_make_empty_symbol' which was passed in.
--
--
--File: bfd.info, Node: typedef asymbol, Next: symbol handling functions, Prev: Mini Symbols, Up: Symbols
--
--2.7.4 typedef asymbol
-----------------------
--
--An `asymbol' has the form:
--
--
-- typedef struct bfd_symbol
-- {
-- /* A pointer to the BFD which owns the symbol. This information
-- is necessary so that a back end can work out what additional
-- information (invisible to the application writer) is carried
-- with the symbol.
--
-- This field is *almost* redundant, since you can use section->owner
-- instead, except that some symbols point to the global sections
-- bfd_{abs,com,und}_section. This could be fixed by making
-- these globals be per-bfd (or per-target-flavor). FIXME. */
-- struct bfd *the_bfd; /* Use bfd_asymbol_bfd(sym) to access this field. */
--
-- /* The text of the symbol. The name is left alone, and not copied; the
-- application may not alter it. */
-- const char *name;
--
-- /* The value of the symbol. This really should be a union of a
-- numeric value with a pointer, since some flags indicate that
-- a pointer to another symbol is stored here. */
-- symvalue value;
--
-- /* Attributes of a symbol. */
-- #define BSF_NO_FLAGS 0x00
--
-- /* The symbol has local scope; `static' in `C'. The value
-- is the offset into the section of the data. */
-- #define BSF_LOCAL (1 << 0)
--
-- /* The symbol has global scope; initialized data in `C'. The
-- value is the offset into the section of the data. */
-- #define BSF_GLOBAL (1 << 1)
--
-- /* The symbol has global scope and is exported. The value is
-- the offset into the section of the data. */
-- #define BSF_EXPORT BSF_GLOBAL /* No real difference. */
--
-- /* A normal C symbol would be one of:
-- `BSF_LOCAL', `BSF_COMMON', `BSF_UNDEFINED' or
-- `BSF_GLOBAL'. */
--
-- /* The symbol is a debugging record. The value has an arbitrary
-- meaning, unless BSF_DEBUGGING_RELOC is also set. */
-- #define BSF_DEBUGGING (1 << 2)
--
-- /* The symbol denotes a function entry point. Used in ELF,
-- perhaps others someday. */
-- #define BSF_FUNCTION (1 << 3)
--
-- /* Used by the linker. */
-- #define BSF_KEEP (1 << 5)
-- #define BSF_KEEP_G (1 << 6)
--
-- /* A weak global symbol, overridable without warnings by
-- a regular global symbol of the same name. */
-- #define BSF_WEAK (1 << 7)
--
-- /* This symbol was created to point to a section, e.g. ELF's
-- STT_SECTION symbols. */
-- #define BSF_SECTION_SYM (1 << 8)
--
-- /* The symbol used to be a common symbol, but now it is
-- allocated. */
-- #define BSF_OLD_COMMON (1 << 9)
--
-- /* In some files the type of a symbol sometimes alters its
-- location in an output file - ie in coff a `ISFCN' symbol
-- which is also `C_EXT' symbol appears where it was
-- declared and not at the end of a section. This bit is set
-- by the target BFD part to convey this information. */
-- #define BSF_NOT_AT_END (1 << 10)
--
-- /* Signal that the symbol is the label of constructor section. */
-- #define BSF_CONSTRUCTOR (1 << 11)
--
-- /* Signal that the symbol is a warning symbol. The name is a
-- warning. The name of the next symbol is the one to warn about;
-- if a reference is made to a symbol with the same name as the next
-- symbol, a warning is issued by the linker. */
-- #define BSF_WARNING (1 << 12)
--
-- /* Signal that the symbol is indirect. This symbol is an indirect
-- pointer to the symbol with the same name as the next symbol. */
-- #define BSF_INDIRECT (1 << 13)
--
-- /* BSF_FILE marks symbols that contain a file name. This is used
-- for ELF STT_FILE symbols. */
-- #define BSF_FILE (1 << 14)
--
-- /* Symbol is from dynamic linking information. */
-- #define BSF_DYNAMIC (1 << 15)
--
-- /* The symbol denotes a data object. Used in ELF, and perhaps
-- others someday. */
-- #define BSF_OBJECT (1 << 16)
--
-- /* This symbol is a debugging symbol. The value is the offset
-- into the section of the data. BSF_DEBUGGING should be set
-- as well. */
-- #define BSF_DEBUGGING_RELOC (1 << 17)
--
-- /* This symbol is thread local. Used in ELF. */
-- #define BSF_THREAD_LOCAL (1 << 18)
--
-- /* This symbol represents a complex relocation expression,
-- with the expression tree serialized in the symbol name. */
-- #define BSF_RELC (1 << 19)
--
-- /* This symbol represents a signed complex relocation expression,
-- with the expression tree serialized in the symbol name. */
-- #define BSF_SRELC (1 << 20)
--
-- /* This symbol was created by bfd_get_synthetic_symtab. */
-- #define BSF_SYNTHETIC (1 << 21)
--
-- /* This symbol is an indirect code object. Unrelated to BSF_INDIRECT.
-- The dynamic linker will compute the value of this symbol by
-- calling the function that it points to. BSF_FUNCTION must
-- also be also set. */
-- #define BSF_GNU_INDIRECT_FUNCTION (1 << 22)
-- /* This symbol is a globally unique data object. The dynamic linker
-- will make sure that in the entire process there is just one symbol
-- with this name and type in use. BSF_OBJECT must also be set. */
-- #define BSF_GNU_UNIQUE (1 << 23)
--
-- flagword flags;
--
-- /* A pointer to the section to which this symbol is
-- relative. This will always be non NULL, there are special
-- sections for undefined and absolute symbols. */
-- struct bfd_section *section;
--
-- /* Back end special data. */
-- union
-- {
-- void *p;
-- bfd_vma i;
-- }
-- udata;
-- }
-- asymbol;
--
--
--File: bfd.info, Node: symbol handling functions, Prev: typedef asymbol, Up: Symbols
--
--2.7.5 Symbol handling functions
---------------------------------
--
--2.7.5.1 `bfd_get_symtab_upper_bound'
--....................................
--
--*Description*
--Return the number of bytes required to store a vector of pointers to
--`asymbols' for all the symbols in the BFD ABFD, including a terminal
--NULL pointer. If there are no symbols in the BFD, then return 0. If an
--error occurs, return -1.
-- #define bfd_get_symtab_upper_bound(abfd) \
-- BFD_SEND (abfd, _bfd_get_symtab_upper_bound, (abfd))
--
--2.7.5.2 `bfd_is_local_label'
--............................
--
--*Synopsis*
-- bfd_boolean bfd_is_local_label (bfd *abfd, asymbol *sym);
-- *Description*
--Return TRUE if the given symbol SYM in the BFD ABFD is a compiler
--generated local label, else return FALSE.
--
--2.7.5.3 `bfd_is_local_label_name'
--.................................
--
--*Synopsis*
-- bfd_boolean bfd_is_local_label_name (bfd *abfd, const char *name);
-- *Description*
--Return TRUE if a symbol with the name NAME in the BFD ABFD is a
--compiler generated local label, else return FALSE. This just checks
--whether the name has the form of a local label.
-- #define bfd_is_local_label_name(abfd, name) \
-- BFD_SEND (abfd, _bfd_is_local_label_name, (abfd, name))
--
--2.7.5.4 `bfd_is_target_special_symbol'
--......................................
--
--*Synopsis*
-- bfd_boolean bfd_is_target_special_symbol (bfd *abfd, asymbol *sym);
-- *Description*
--Return TRUE iff a symbol SYM in the BFD ABFD is something special to
--the particular target represented by the BFD. Such symbols should
--normally not be mentioned to the user.
-- #define bfd_is_target_special_symbol(abfd, sym) \
-- BFD_SEND (abfd, _bfd_is_target_special_symbol, (abfd, sym))
--
--2.7.5.5 `bfd_canonicalize_symtab'
--.................................
--
--*Description*
--Read the symbols from the BFD ABFD, and fills in the vector LOCATION
--with pointers to the symbols and a trailing NULL. Return the actual
--number of symbol pointers, not including the NULL.
-- #define bfd_canonicalize_symtab(abfd, location) \
-- BFD_SEND (abfd, _bfd_canonicalize_symtab, (abfd, location))
--
--2.7.5.6 `bfd_set_symtab'
--........................
--
--*Synopsis*
-- bfd_boolean bfd_set_symtab
-- (bfd *abfd, asymbol **location, unsigned int count);
-- *Description*
--Arrange that when the output BFD ABFD is closed, the table LOCATION of
--COUNT pointers to symbols will be written.
--
--2.7.5.7 `bfd_print_symbol_vandf'
--................................
--
--*Synopsis*
-- void bfd_print_symbol_vandf (bfd *abfd, void *file, asymbol *symbol);
-- *Description*
--Print the value and flags of the SYMBOL supplied to the stream FILE.
--
--2.7.5.8 `bfd_make_empty_symbol'
--...............................
--
--*Description*
--Create a new `asymbol' structure for the BFD ABFD and return a pointer
--to it.
--
-- This routine is necessary because each back end has private
--information surrounding the `asymbol'. Building your own `asymbol' and
--pointing to it will not create the private information, and will cause
--problems later on.
-- #define bfd_make_empty_symbol(abfd) \
-- BFD_SEND (abfd, _bfd_make_empty_symbol, (abfd))
--
--2.7.5.9 `_bfd_generic_make_empty_symbol'
--........................................
--
--*Synopsis*
-- asymbol *_bfd_generic_make_empty_symbol (bfd *);
-- *Description*
--Create a new `asymbol' structure for the BFD ABFD and return a pointer
--to it. Used by core file routines, binary back-end and anywhere else
--where no private info is needed.
--
--2.7.5.10 `bfd_make_debug_symbol'
--................................
--
--*Description*
--Create a new `asymbol' structure for the BFD ABFD, to be used as a
--debugging symbol. Further details of its use have yet to be worked out.
-- #define bfd_make_debug_symbol(abfd,ptr,size) \
-- BFD_SEND (abfd, _bfd_make_debug_symbol, (abfd, ptr, size))
--
--2.7.5.11 `bfd_decode_symclass'
--..............................
--
--*Description*
--Return a character corresponding to the symbol class of SYMBOL, or '?'
--for an unknown class.
--
-- *Synopsis*
-- int bfd_decode_symclass (asymbol *symbol);
--
--2.7.5.12 `bfd_is_undefined_symclass'
--....................................
--
--*Description*
--Returns non-zero if the class symbol returned by bfd_decode_symclass
--represents an undefined symbol. Returns zero otherwise.
--
-- *Synopsis*
-- bfd_boolean bfd_is_undefined_symclass (int symclass);
--
--2.7.5.13 `bfd_symbol_info'
--..........................
--
--*Description*
--Fill in the basic info about symbol that nm needs. Additional info may
--be added by the back-ends after calling this function.
--
-- *Synopsis*
-- void bfd_symbol_info (asymbol *symbol, symbol_info *ret);
--
--2.7.5.14 `bfd_copy_private_symbol_data'
--.......................................
--
--*Synopsis*
-- bfd_boolean bfd_copy_private_symbol_data
-- (bfd *ibfd, asymbol *isym, bfd *obfd, asymbol *osym);
-- *Description*
--Copy private symbol information from ISYM in the BFD IBFD to the symbol
--OSYM in the BFD OBFD. Return `TRUE' on success, `FALSE' on error.
--Possible error returns are:
--
-- * `bfd_error_no_memory' - Not enough memory exists to create private
-- data for OSEC.
--
-- #define bfd_copy_private_symbol_data(ibfd, isymbol, obfd, osymbol) \
-- BFD_SEND (obfd, _bfd_copy_private_symbol_data, \
-- (ibfd, isymbol, obfd, osymbol))
--
--
--File: bfd.info, Node: Archives, Next: Formats, Prev: Symbols, Up: BFD front end
--
--2.8 Archives
--============
--
--*Description*
--An archive (or library) is just another BFD. It has a symbol table,
--although there's not much a user program will do with it.
--
-- The big difference between an archive BFD and an ordinary BFD is
--that the archive doesn't have sections. Instead it has a chain of BFDs
--that are considered its contents. These BFDs can be manipulated like
--any other. The BFDs contained in an archive opened for reading will
--all be opened for reading. You may put either input or output BFDs
--into an archive opened for output; they will be handled correctly when
--the archive is closed.
--
-- Use `bfd_openr_next_archived_file' to step through the contents of
--an archive opened for input. You don't have to read the entire archive
--if you don't want to! Read it until you find what you want.
--
-- A BFD returned by `bfd_openr_next_archived_file' can be closed
--manually with `bfd_close'. If you do not close it, then a second
--iteration through the members of an archive may return the same BFD.
--If you close the archive BFD, then all the member BFDs will
--automatically be closed as well.
--
-- Archive contents of output BFDs are chained through the
--`archive_next' pointer in a BFD. The first one is findable through the
--`archive_head' slot of the archive. Set it with `bfd_set_archive_head'
--(q.v.). A given BFD may be in only one open output archive at a time.
--
-- As expected, the BFD archive code is more general than the archive
--code of any given environment. BFD archives may contain files of
--different formats (e.g., a.out and coff) and even different
--architectures. You may even place archives recursively into archives!
--
-- This can cause unexpected confusion, since some archive formats are
--more expressive than others. For instance, Intel COFF archives can
--preserve long filenames; SunOS a.out archives cannot. If you move a
--file from the first to the second format and back again, the filename
--may be truncated. Likewise, different a.out environments have different
--conventions as to how they truncate filenames, whether they preserve
--directory names in filenames, etc. When interoperating with native
--tools, be sure your files are homogeneous.
--
-- Beware: most of these formats do not react well to the presence of
--spaces in filenames. We do the best we can, but can't always handle
--this case due to restrictions in the format of archives. Many Unix
--utilities are braindead in regards to spaces and such in filenames
--anyway, so this shouldn't be much of a restriction.
--
-- Archives are supported in BFD in `archive.c'.
--
--2.8.1 Archive functions
-------------------------
--
--2.8.1.1 `bfd_get_next_mapent'
--.............................
--
--*Synopsis*
-- symindex bfd_get_next_mapent
-- (bfd *abfd, symindex previous, carsym **sym);
-- *Description*
--Step through archive ABFD's symbol table (if it has one). Successively
--update SYM with the next symbol's information, returning that symbol's
--(internal) index into the symbol table.
--
-- Supply `BFD_NO_MORE_SYMBOLS' as the PREVIOUS entry to get the first
--one; returns `BFD_NO_MORE_SYMBOLS' when you've already got the last one.
--
-- A `carsym' is a canonical archive symbol. The only user-visible
--element is its name, a null-terminated string.
--
--2.8.1.2 `bfd_set_archive_head'
--..............................
--
--*Synopsis*
-- bfd_boolean bfd_set_archive_head (bfd *output, bfd *new_head);
-- *Description*
--Set the head of the chain of BFDs contained in the archive OUTPUT to
--NEW_HEAD.
--
--2.8.1.3 `bfd_openr_next_archived_file'
--......................................
--
--*Synopsis*
-- bfd *bfd_openr_next_archived_file (bfd *archive, bfd *previous);
-- *Description*
--Provided a BFD, ARCHIVE, containing an archive and NULL, open an input
--BFD on the first contained element and returns that. Subsequent calls
--should pass the archive and the previous return value to return a
--created BFD to the next contained element. NULL is returned when there
--are no more.
--
--
--File: bfd.info, Node: Formats, Next: Relocations, Prev: Archives, Up: BFD front end
--
--2.9 File formats
--================
--
--A format is a BFD concept of high level file contents type. The formats
--supported by BFD are:
--
-- * `bfd_object'
-- The BFD may contain data, symbols, relocations and debug info.
--
-- * `bfd_archive'
-- The BFD contains other BFDs and an optional index.
--
-- * `bfd_core'
-- The BFD contains the result of an executable core dump.
--
--2.9.1 File format functions
-----------------------------
--
--2.9.1.1 `bfd_check_format'
--..........................
--
--*Synopsis*
-- bfd_boolean bfd_check_format (bfd *abfd, bfd_format format);
-- *Description*
--Verify if the file attached to the BFD ABFD is compatible with the
--format FORMAT (i.e., one of `bfd_object', `bfd_archive' or `bfd_core').
--
-- If the BFD has been set to a specific target before the call, only
--the named target and format combination is checked. If the target has
--not been set, or has been set to `default', then all the known target
--backends is interrogated to determine a match. If the default target
--matches, it is used. If not, exactly one target must recognize the
--file, or an error results.
--
-- The function returns `TRUE' on success, otherwise `FALSE' with one
--of the following error codes:
--
-- * `bfd_error_invalid_operation' - if `format' is not one of
-- `bfd_object', `bfd_archive' or `bfd_core'.
--
-- * `bfd_error_system_call' - if an error occured during a read - even
-- some file mismatches can cause bfd_error_system_calls.
--
-- * `file_not_recognised' - none of the backends recognised the file
-- format.
--
-- * `bfd_error_file_ambiguously_recognized' - more than one backend
-- recognised the file format.
--
--2.9.1.2 `bfd_check_format_matches'
--..................................
--
--*Synopsis*
-- bfd_boolean bfd_check_format_matches
-- (bfd *abfd, bfd_format format, char ***matching);
-- *Description*
--Like `bfd_check_format', except when it returns FALSE with `bfd_errno'
--set to `bfd_error_file_ambiguously_recognized'. In that case, if
--MATCHING is not NULL, it will be filled in with a NULL-terminated list
--of the names of the formats that matched, allocated with `malloc'.
--Then the user may choose a format and try again.
--
-- When done with the list that MATCHING points to, the caller should
--free it.
--
--2.9.1.3 `bfd_set_format'
--........................
--
--*Synopsis*
-- bfd_boolean bfd_set_format (bfd *abfd, bfd_format format);
-- *Description*
--This function sets the file format of the BFD ABFD to the format
--FORMAT. If the target set in the BFD does not support the format
--requested, the format is invalid, or the BFD is not open for writing,
--then an error occurs.
--
--2.9.1.4 `bfd_format_string'
--...........................
--
--*Synopsis*
-- const char *bfd_format_string (bfd_format format);
-- *Description*
--Return a pointer to a const string `invalid', `object', `archive',
--`core', or `unknown', depending upon the value of FORMAT.
--
--
--File: bfd.info, Node: Relocations, Next: Core Files, Prev: Formats, Up: BFD front end
--
--2.10 Relocations
--================
--
--BFD maintains relocations in much the same way it maintains symbols:
--they are left alone until required, then read in en-masse and
--translated into an internal form. A common routine
--`bfd_perform_relocation' acts upon the canonical form to do the fixup.
--
-- Relocations are maintained on a per section basis, while symbols are
--maintained on a per BFD basis.
--
-- All that a back end has to do to fit the BFD interface is to create
--a `struct reloc_cache_entry' for each relocation in a particular
--section, and fill in the right bits of the structures.
--
--* Menu:
--
--* typedef arelent::
--* howto manager::
--
--
--File: bfd.info, Node: typedef arelent, Next: howto manager, Prev: Relocations, Up: Relocations
--
--2.10.1 typedef arelent
------------------------
--
--This is the structure of a relocation entry:
--
--
-- typedef enum bfd_reloc_status
-- {
-- /* No errors detected. */
-- bfd_reloc_ok,
--
-- /* The relocation was performed, but there was an overflow. */
-- bfd_reloc_overflow,
--
-- /* The address to relocate was not within the section supplied. */
-- bfd_reloc_outofrange,
--
-- /* Used by special functions. */
-- bfd_reloc_continue,
--
-- /* Unsupported relocation size requested. */
-- bfd_reloc_notsupported,
--
-- /* Unused. */
-- bfd_reloc_other,
--
-- /* The symbol to relocate against was undefined. */
-- bfd_reloc_undefined,
--
-- /* The relocation was performed, but may not be ok - presently
-- generated only when linking i960 coff files with i960 b.out
-- symbols. If this type is returned, the error_message argument
-- to bfd_perform_relocation will be set. */
-- bfd_reloc_dangerous
-- }
-- bfd_reloc_status_type;
--
--
-- typedef struct reloc_cache_entry
-- {
-- /* A pointer into the canonical table of pointers. */
-- struct bfd_symbol **sym_ptr_ptr;
--
-- /* offset in section. */
-- bfd_size_type address;
--
-- /* addend for relocation value. */
-- bfd_vma addend;
--
-- /* Pointer to how to perform the required relocation. */
-- reloc_howto_type *howto;
--
-- }
-- arelent;
-- *Description*
--Here is a description of each of the fields within an `arelent':
--
-- * `sym_ptr_ptr'
-- The symbol table pointer points to a pointer to the symbol
--associated with the relocation request. It is the pointer into the
--table returned by the back end's `canonicalize_symtab' action. *Note
--Symbols::. The symbol is referenced through a pointer to a pointer so
--that tools like the linker can fix up all the symbols of the same name
--by modifying only one pointer. The relocation routine looks in the
--symbol and uses the base of the section the symbol is attached to and
--the value of the symbol as the initial relocation offset. If the symbol
--pointer is zero, then the section provided is looked up.
--
-- * `address'
-- The `address' field gives the offset in bytes from the base of the
--section data which owns the relocation record to the first byte of
--relocatable information. The actual data relocated will be relative to
--this point; for example, a relocation type which modifies the bottom
--two bytes of a four byte word would not touch the first byte pointed to
--in a big endian world.
--
-- * `addend'
-- The `addend' is a value provided by the back end to be added (!) to
--the relocation offset. Its interpretation is dependent upon the howto.
--For example, on the 68k the code:
--
-- char foo[];
-- main()
-- {
-- return foo[0x12345678];
-- }
--
-- Could be compiled into:
--
-- linkw fp,#-4
-- moveb @#12345678,d0
-- extbl d0
-- unlk fp
-- rts
--
-- This could create a reloc pointing to `foo', but leave the offset in
--the data, something like:
--
-- RELOCATION RECORDS FOR [.text]:
-- offset type value
-- 00000006 32 _foo
--
-- 00000000 4e56 fffc ; linkw fp,#-4
-- 00000004 1039 1234 5678 ; moveb @#12345678,d0
-- 0000000a 49c0 ; extbl d0
-- 0000000c 4e5e ; unlk fp
-- 0000000e 4e75 ; rts
--
-- Using coff and an 88k, some instructions don't have enough space in
--them to represent the full address range, and pointers have to be
--loaded in two parts. So you'd get something like:
--
-- or.u r13,r0,hi16(_foo+0x12345678)
-- ld.b r2,r13,lo16(_foo+0x12345678)
-- jmp r1
--
-- This should create two relocs, both pointing to `_foo', and with
--0x12340000 in their addend field. The data would consist of:
--
-- RELOCATION RECORDS FOR [.text]:
-- offset type value
-- 00000002 HVRT16 _foo+0x12340000
-- 00000006 LVRT16 _foo+0x12340000
--
-- 00000000 5da05678 ; or.u r13,r0,0x5678
-- 00000004 1c4d5678 ; ld.b r2,r13,0x5678
-- 00000008 f400c001 ; jmp r1
--
-- The relocation routine digs out the value from the data, adds it to
--the addend to get the original offset, and then adds the value of
--`_foo'. Note that all 32 bits have to be kept around somewhere, to cope
--with carry from bit 15 to bit 16.
--
-- One further example is the sparc and the a.out format. The sparc has
--a similar problem to the 88k, in that some instructions don't have room
--for an entire offset, but on the sparc the parts are created in odd
--sized lumps. The designers of the a.out format chose to not use the
--data within the section for storing part of the offset; all the offset
--is kept within the reloc. Anything in the data should be ignored.
--
-- save %sp,-112,%sp
-- sethi %hi(_foo+0x12345678),%g2
-- ldsb [%g2+%lo(_foo+0x12345678)],%i0
-- ret
-- restore
--
-- Both relocs contain a pointer to `foo', and the offsets contain junk.
--
-- RELOCATION RECORDS FOR [.text]:
-- offset type value
-- 00000004 HI22 _foo+0x12345678
-- 00000008 LO10 _foo+0x12345678
--
-- 00000000 9de3bf90 ; save %sp,-112,%sp
-- 00000004 05000000 ; sethi %hi(_foo+0),%g2
-- 00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
-- 0000000c 81c7e008 ; ret
-- 00000010 81e80000 ; restore
--
-- * `howto'
-- The `howto' field can be imagined as a relocation instruction. It is
--a pointer to a structure which contains information on what to do with
--all of the other information in the reloc record and data section. A
--back end would normally have a relocation instruction set and turn
--relocations into pointers to the correct structure on input - but it
--would be possible to create each howto field on demand.
--
--2.10.1.1 `enum complain_overflow'
--.................................
--
--Indicates what sort of overflow checking should be done when performing
--a relocation.
--
--
-- enum complain_overflow
-- {
-- /* Do not complain on overflow. */
-- complain_overflow_dont,
--
-- /* Complain if the value overflows when considered as a signed
-- number one bit larger than the field. ie. A bitfield of N bits
-- is allowed to represent -2**n to 2**n-1. */
-- complain_overflow_bitfield,
--
-- /* Complain if the value overflows when considered as a signed
-- number. */
-- complain_overflow_signed,
--
-- /* Complain if the value overflows when considered as an
-- unsigned number. */
-- complain_overflow_unsigned
-- };
--
--2.10.1.2 `reloc_howto_type'
--...........................
--
--The `reloc_howto_type' is a structure which contains all the
--information that libbfd needs to know to tie up a back end's data.
--
-- struct bfd_symbol; /* Forward declaration. */
--
-- struct reloc_howto_struct
-- {
-- /* The type field has mainly a documentary use - the back end can
-- do what it wants with it, though normally the back end's
-- external idea of what a reloc number is stored
-- in this field. For example, a PC relative word relocation
-- in a coff environment has the type 023 - because that's
-- what the outside world calls a R_PCRWORD reloc. */
-- unsigned int type;
--
-- /* The value the final relocation is shifted right by. This drops
-- unwanted data from the relocation. */
-- unsigned int rightshift;
--
-- /* The size of the item to be relocated. This is *not* a
-- power-of-two measure. To get the number of bytes operated
-- on by a type of relocation, use bfd_get_reloc_size. */
-- int size;
--
-- /* The number of bits in the item to be relocated. This is used
-- when doing overflow checking. */
-- unsigned int bitsize;
--
-- /* The relocation is relative to the field being relocated. */
-- bfd_boolean pc_relative;
--
-- /* The bit position of the reloc value in the destination.
-- The relocated value is left shifted by this amount. */
-- unsigned int bitpos;
--
-- /* What type of overflow error should be checked for when
-- relocating. */
-- enum complain_overflow complain_on_overflow;
--
-- /* If this field is non null, then the supplied function is
-- called rather than the normal function. This allows really
-- strange relocation methods to be accommodated (e.g., i960 callj
-- instructions). */
-- bfd_reloc_status_type (*special_function)
-- (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
-- bfd *, char **);
--
-- /* The textual name of the relocation type. */
-- char *name;
--
-- /* Some formats record a relocation addend in the section contents
-- rather than with the relocation. For ELF formats this is the
-- distinction between USE_REL and USE_RELA (though the code checks
-- for USE_REL == 1/0). The value of this field is TRUE if the
-- addend is recorded with the section contents; when performing a
-- partial link (ld -r) the section contents (the data) will be
-- modified. The value of this field is FALSE if addends are
-- recorded with the relocation (in arelent.addend); when performing
-- a partial link the relocation will be modified.
-- All relocations for all ELF USE_RELA targets should set this field
-- to FALSE (values of TRUE should be looked on with suspicion).
-- However, the converse is not true: not all relocations of all ELF
-- USE_REL targets set this field to TRUE. Why this is so is peculiar
-- to each particular target. For relocs that aren't used in partial
-- links (e.g. GOT stuff) it doesn't matter what this is set to. */
-- bfd_boolean partial_inplace;
--
-- /* src_mask selects the part of the instruction (or data) to be used
-- in the relocation sum. If the target relocations don't have an
-- addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
-- dst_mask to extract the addend from the section contents. If
-- relocations do have an addend in the reloc, eg. ELF USE_RELA, this
-- field should be zero. Non-zero values for ELF USE_RELA targets are
-- bogus as in those cases the value in the dst_mask part of the
-- section contents should be treated as garbage. */
-- bfd_vma src_mask;
--
-- /* dst_mask selects which parts of the instruction (or data) are
-- replaced with a relocated value. */
-- bfd_vma dst_mask;
--
-- /* When some formats create PC relative instructions, they leave
-- the value of the pc of the place being relocated in the offset
-- slot of the instruction, so that a PC relative relocation can
-- be made just by adding in an ordinary offset (e.g., sun3 a.out).
-- Some formats leave the displacement part of an instruction
-- empty (e.g., m88k bcs); this flag signals the fact. */
-- bfd_boolean pcrel_offset;
-- };
--
--2.10.1.3 `The HOWTO Macro'
--..........................
--
--*Description*
--The HOWTO define is horrible and will go away.
-- #define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
-- { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
--
-- *Description*
--And will be replaced with the totally magic way. But for the moment, we
--are compatible, so do it this way.
-- #define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
-- HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
-- NAME, FALSE, 0, 0, IN)
--
-- *Description*
--This is used to fill in an empty howto entry in an array.
-- #define EMPTY_HOWTO(C) \
-- HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
-- NULL, FALSE, 0, 0, FALSE)
--
-- *Description*
--Helper routine to turn a symbol into a relocation value.
-- #define HOWTO_PREPARE(relocation, symbol) \
-- { \
-- if (symbol != NULL) \
-- { \
-- if (bfd_is_com_section (symbol->section)) \
-- { \
-- relocation = 0; \
-- } \
-- else \
-- { \
-- relocation = symbol->value; \
-- } \
-- } \
-- }
--
--2.10.1.4 `bfd_get_reloc_size'
--.............................
--
--*Synopsis*
-- unsigned int bfd_get_reloc_size (reloc_howto_type *);
-- *Description*
--For a reloc_howto_type that operates on a fixed number of bytes, this
--returns the number of bytes operated on.
--
--2.10.1.5 `arelent_chain'
--........................
--
--*Description*
--How relocs are tied together in an `asection':
-- typedef struct relent_chain
-- {
-- arelent relent;
-- struct relent_chain *next;
-- }
-- arelent_chain;
--
--2.10.1.6 `bfd_check_overflow'
--.............................
--
--*Synopsis*
-- bfd_reloc_status_type bfd_check_overflow
-- (enum complain_overflow how,
-- unsigned int bitsize,
-- unsigned int rightshift,
-- unsigned int addrsize,
-- bfd_vma relocation);
-- *Description*
--Perform overflow checking on RELOCATION which has BITSIZE significant
--bits and will be shifted right by RIGHTSHIFT bits, on a machine with
--addresses containing ADDRSIZE significant bits. The result is either of
--`bfd_reloc_ok' or `bfd_reloc_overflow'.
--
--2.10.1.7 `bfd_perform_relocation'
--.................................
--
--*Synopsis*
-- bfd_reloc_status_type bfd_perform_relocation
-- (bfd *abfd,
-- arelent *reloc_entry,
-- void *data,
-- asection *input_section,
-- bfd *output_bfd,
-- char **error_message);
-- *Description*
--If OUTPUT_BFD is supplied to this function, the generated image will be
--relocatable; the relocations are copied to the output file after they
--have been changed to reflect the new state of the world. There are two
--ways of reflecting the results of partial linkage in an output file: by
--modifying the output data in place, and by modifying the relocation
--record. Some native formats (e.g., basic a.out and basic coff) have no
--way of specifying an addend in the relocation type, so the addend has
--to go in the output data. This is no big deal since in these formats
--the output data slot will always be big enough for the addend. Complex
--reloc types with addends were invented to solve just this problem. The
--ERROR_MESSAGE argument is set to an error message if this return
--`bfd_reloc_dangerous'.
--
--2.10.1.8 `bfd_install_relocation'
--.................................
--
--*Synopsis*
-- bfd_reloc_status_type bfd_install_relocation
-- (bfd *abfd,
-- arelent *reloc_entry,
-- void *data, bfd_vma data_start,
-- asection *input_section,
-- char **error_message);
-- *Description*
--This looks remarkably like `bfd_perform_relocation', except it does not
--expect that the section contents have been filled in. I.e., it's
--suitable for use when creating, rather than applying a relocation.
--
-- For now, this function should be considered reserved for the
--assembler.
--
--
--File: bfd.info, Node: howto manager, Prev: typedef arelent, Up: Relocations
--
--2.10.2 The howto manager
--------------------------
--
--When an application wants to create a relocation, but doesn't know what
--the target machine might call it, it can find out by using this bit of
--code.
--
--2.10.2.1 `bfd_reloc_code_type'
--..............................
--
--*Description*
--The insides of a reloc code. The idea is that, eventually, there will
--be one enumerator for every type of relocation we ever do. Pass one of
--these values to `bfd_reloc_type_lookup', and it'll return a howto
--pointer.
--
-- This does mean that the application must determine the correct
--enumerator value; you can't get a howto pointer from a random set of
--attributes.
--
-- Here are the possible values for `enum bfd_reloc_code_real':
--
-- -- : BFD_RELOC_64
-- -- : BFD_RELOC_32
-- -- : BFD_RELOC_26
-- -- : BFD_RELOC_24
-- -- : BFD_RELOC_16
-- -- : BFD_RELOC_14
-- -- : BFD_RELOC_8
-- Basic absolute relocations of N bits.
--
-- -- : BFD_RELOC_64_PCREL
-- -- : BFD_RELOC_32_PCREL
-- -- : BFD_RELOC_24_PCREL
-- -- : BFD_RELOC_16_PCREL
-- -- : BFD_RELOC_12_PCREL
-- -- : BFD_RELOC_8_PCREL
-- PC-relative relocations. Sometimes these are relative to the
-- address of the relocation itself; sometimes they are relative to
-- the start of the section containing the relocation. It depends on
-- the specific target.
--
-- The 24-bit relocation is used in some Intel 960 configurations.
--
-- -- : BFD_RELOC_32_SECREL
-- Section relative relocations. Some targets need this for DWARF2.
--
-- -- : BFD_RELOC_32_GOT_PCREL
-- -- : BFD_RELOC_16_GOT_PCREL
-- -- : BFD_RELOC_8_GOT_PCREL
-- -- : BFD_RELOC_32_GOTOFF
-- -- : BFD_RELOC_16_GOTOFF
-- -- : BFD_RELOC_LO16_GOTOFF
-- -- : BFD_RELOC_HI16_GOTOFF
-- -- : BFD_RELOC_HI16_S_GOTOFF
-- -- : BFD_RELOC_8_GOTOFF
-- -- : BFD_RELOC_64_PLT_PCREL
-- -- : BFD_RELOC_32_PLT_PCREL
-- -- : BFD_RELOC_24_PLT_PCREL
-- -- : BFD_RELOC_16_PLT_PCREL
-- -- : BFD_RELOC_8_PLT_PCREL
-- -- : BFD_RELOC_64_PLTOFF
-- -- : BFD_RELOC_32_PLTOFF
-- -- : BFD_RELOC_16_PLTOFF
-- -- : BFD_RELOC_LO16_PLTOFF
-- -- : BFD_RELOC_HI16_PLTOFF
-- -- : BFD_RELOC_HI16_S_PLTOFF
-- -- : BFD_RELOC_8_PLTOFF
-- For ELF.
--
-- -- : BFD_RELOC_SIZE32
-- -- : BFD_RELOC_SIZE64
-- Size relocations.
--
-- -- : BFD_RELOC_68K_GLOB_DAT
-- -- : BFD_RELOC_68K_JMP_SLOT
-- -- : BFD_RELOC_68K_RELATIVE
-- -- : BFD_RELOC_68K_TLS_GD32
-- -- : BFD_RELOC_68K_TLS_GD16
-- -- : BFD_RELOC_68K_TLS_GD8
-- -- : BFD_RELOC_68K_TLS_LDM32
-- -- : BFD_RELOC_68K_TLS_LDM16
-- -- : BFD_RELOC_68K_TLS_LDM8
-- -- : BFD_RELOC_68K_TLS_LDO32
-- -- : BFD_RELOC_68K_TLS_LDO16
-- -- : BFD_RELOC_68K_TLS_LDO8
-- -- : BFD_RELOC_68K_TLS_IE32
-- -- : BFD_RELOC_68K_TLS_IE16
-- -- : BFD_RELOC_68K_TLS_IE8
-- -- : BFD_RELOC_68K_TLS_LE32
-- -- : BFD_RELOC_68K_TLS_LE16
-- -- : BFD_RELOC_68K_TLS_LE8
-- Relocations used by 68K ELF.
--
-- -- : BFD_RELOC_32_BASEREL
-- -- : BFD_RELOC_16_BASEREL
-- -- : BFD_RELOC_LO16_BASEREL
-- -- : BFD_RELOC_HI16_BASEREL
-- -- : BFD_RELOC_HI16_S_BASEREL
-- -- : BFD_RELOC_8_BASEREL
-- -- : BFD_RELOC_RVA
-- Linkage-table relative.
--
-- -- : BFD_RELOC_8_FFnn
-- Absolute 8-bit relocation, but used to form an address like 0xFFnn.
--
-- -- : BFD_RELOC_32_PCREL_S2
-- -- : BFD_RELOC_16_PCREL_S2
-- -- : BFD_RELOC_23_PCREL_S2
-- These PC-relative relocations are stored as word displacements -
-- i.e., byte displacements shifted right two bits. The 30-bit word
-- displacement (<<32_PCREL_S2>> - 32 bits, shifted 2) is used on the
-- SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
-- signed 16-bit displacement is used on the MIPS, and the 23-bit
-- displacement is used on the Alpha.
--
-- -- : BFD_RELOC_HI22
-- -- : BFD_RELOC_LO10
-- High 22 bits and low 10 bits of 32-bit value, placed into lower
-- bits of the target word. These are used on the SPARC.
--
-- -- : BFD_RELOC_GPREL16
-- -- : BFD_RELOC_GPREL32
-- For systems that allocate a Global Pointer register, these are
-- displacements off that register. These relocation types are
-- handled specially, because the value the register will have is
-- decided relatively late.
--
-- -- : BFD_RELOC_I960_CALLJ
-- Reloc types used for i960/b.out.
--
-- -- : BFD_RELOC_NONE
-- -- : BFD_RELOC_SPARC_WDISP22
-- -- : BFD_RELOC_SPARC22
-- -- : BFD_RELOC_SPARC13
-- -- : BFD_RELOC_SPARC_GOT10
-- -- : BFD_RELOC_SPARC_GOT13
-- -- : BFD_RELOC_SPARC_GOT22
-- -- : BFD_RELOC_SPARC_PC10
-- -- : BFD_RELOC_SPARC_PC22
-- -- : BFD_RELOC_SPARC_WPLT30
-- -- : BFD_RELOC_SPARC_COPY
-- -- : BFD_RELOC_SPARC_GLOB_DAT
-- -- : BFD_RELOC_SPARC_JMP_SLOT
-- -- : BFD_RELOC_SPARC_RELATIVE
-- -- : BFD_RELOC_SPARC_UA16
-- -- : BFD_RELOC_SPARC_UA32
-- -- : BFD_RELOC_SPARC_UA64
-- -- : BFD_RELOC_SPARC_GOTDATA_HIX22
-- -- : BFD_RELOC_SPARC_GOTDATA_LOX10
-- -- : BFD_RELOC_SPARC_GOTDATA_OP_HIX22
-- -- : BFD_RELOC_SPARC_GOTDATA_OP_LOX10
-- -- : BFD_RELOC_SPARC_GOTDATA_OP
-- -- : BFD_RELOC_SPARC_JMP_IREL
-- -- : BFD_RELOC_SPARC_IRELATIVE
-- SPARC ELF relocations. There is probably some overlap with other
-- relocation types already defined.
--
-- -- : BFD_RELOC_SPARC_BASE13
-- -- : BFD_RELOC_SPARC_BASE22
-- I think these are specific to SPARC a.out (e.g., Sun 4).
--
-- -- : BFD_RELOC_SPARC_64
-- -- : BFD_RELOC_SPARC_10
-- -- : BFD_RELOC_SPARC_11
-- -- : BFD_RELOC_SPARC_OLO10
-- -- : BFD_RELOC_SPARC_HH22
-- -- : BFD_RELOC_SPARC_HM10
-- -- : BFD_RELOC_SPARC_LM22
-- -- : BFD_RELOC_SPARC_PC_HH22
-- -- : BFD_RELOC_SPARC_PC_HM10
-- -- : BFD_RELOC_SPARC_PC_LM22
-- -- : BFD_RELOC_SPARC_WDISP16
-- -- : BFD_RELOC_SPARC_WDISP19
-- -- : BFD_RELOC_SPARC_7
-- -- : BFD_RELOC_SPARC_6
-- -- : BFD_RELOC_SPARC_5
-- -- : BFD_RELOC_SPARC_DISP64
-- -- : BFD_RELOC_SPARC_PLT32
-- -- : BFD_RELOC_SPARC_PLT64
-- -- : BFD_RELOC_SPARC_HIX22
-- -- : BFD_RELOC_SPARC_LOX10
-- -- : BFD_RELOC_SPARC_H44
-- -- : BFD_RELOC_SPARC_M44
-- -- : BFD_RELOC_SPARC_L44
-- -- : BFD_RELOC_SPARC_REGISTER
-- -- : BFD_RELOC_SPARC_H34
-- -- : BFD_RELOC_SPARC_SIZE32
-- -- : BFD_RELOC_SPARC_SIZE64
-- -- : BFD_RELOC_SPARC_WDISP10
-- SPARC64 relocations
--
-- -- : BFD_RELOC_SPARC_REV32
-- SPARC little endian relocation
--
-- -- : BFD_RELOC_SPARC_TLS_GD_HI22
-- -- : BFD_RELOC_SPARC_TLS_GD_LO10
-- -- : BFD_RELOC_SPARC_TLS_GD_ADD
-- -- : BFD_RELOC_SPARC_TLS_GD_CALL
-- -- : BFD_RELOC_SPARC_TLS_LDM_HI22
-- -- : BFD_RELOC_SPARC_TLS_LDM_LO10
-- -- : BFD_RELOC_SPARC_TLS_LDM_ADD
-- -- : BFD_RELOC_SPARC_TLS_LDM_CALL
-- -- : BFD_RELOC_SPARC_TLS_LDO_HIX22
-- -- : BFD_RELOC_SPARC_TLS_LDO_LOX10
-- -- : BFD_RELOC_SPARC_TLS_LDO_ADD
-- -- : BFD_RELOC_SPARC_TLS_IE_HI22
-- -- : BFD_RELOC_SPARC_TLS_IE_LO10
-- -- : BFD_RELOC_SPARC_TLS_IE_LD
-- -- : BFD_RELOC_SPARC_TLS_IE_LDX
-- -- : BFD_RELOC_SPARC_TLS_IE_ADD
-- -- : BFD_RELOC_SPARC_TLS_LE_HIX22
-- -- : BFD_RELOC_SPARC_TLS_LE_LOX10
-- -- : BFD_RELOC_SPARC_TLS_DTPMOD32
-- -- : BFD_RELOC_SPARC_TLS_DTPMOD64
-- -- : BFD_RELOC_SPARC_TLS_DTPOFF32
-- -- : BFD_RELOC_SPARC_TLS_DTPOFF64
-- -- : BFD_RELOC_SPARC_TLS_TPOFF32
-- -- : BFD_RELOC_SPARC_TLS_TPOFF64
-- SPARC TLS relocations
--
-- -- : BFD_RELOC_SPU_IMM7
-- -- : BFD_RELOC_SPU_IMM8
-- -- : BFD_RELOC_SPU_IMM10
-- -- : BFD_RELOC_SPU_IMM10W
-- -- : BFD_RELOC_SPU_IMM16
-- -- : BFD_RELOC_SPU_IMM16W
-- -- : BFD_RELOC_SPU_IMM18
-- -- : BFD_RELOC_SPU_PCREL9a
-- -- : BFD_RELOC_SPU_PCREL9b
-- -- : BFD_RELOC_SPU_PCREL16
-- -- : BFD_RELOC_SPU_LO16
-- -- : BFD_RELOC_SPU_HI16
-- -- : BFD_RELOC_SPU_PPU32
-- -- : BFD_RELOC_SPU_PPU64
-- -- : BFD_RELOC_SPU_ADD_PIC
-- SPU Relocations.
--
-- -- : BFD_RELOC_ALPHA_GPDISP_HI16
-- Alpha ECOFF and ELF relocations. Some of these treat the symbol or
-- "addend" in some special way. For GPDISP_HI16 ("gpdisp")
-- relocations, the symbol is ignored when writing; when reading, it
-- will be the absolute section symbol. The addend is the
-- displacement in bytes of the "lda" instruction from the "ldah"
-- instruction (which is at the address of this reloc).
--
-- -- : BFD_RELOC_ALPHA_GPDISP_LO16
-- For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
-- with GPDISP_HI16 relocs. The addend is ignored when writing the
-- relocations out, and is filled in with the file's GP value on
-- reading, for convenience.
--
-- -- : BFD_RELOC_ALPHA_GPDISP
-- The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
-- relocation except that there is no accompanying GPDISP_LO16
-- relocation.
--
-- -- : BFD_RELOC_ALPHA_LITERAL
-- -- : BFD_RELOC_ALPHA_ELF_LITERAL
-- -- : BFD_RELOC_ALPHA_LITUSE
-- The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
-- the assembler turns it into a LDQ instruction to load the address
-- of the symbol, and then fills in a register in the real
-- instruction.
--
-- The LITERAL reloc, at the LDQ instruction, refers to the .lita
-- section symbol. The addend is ignored when writing, but is filled
-- in with the file's GP value on reading, for convenience, as with
-- the GPDISP_LO16 reloc.
--
-- The ELF_LITERAL reloc is somewhere between 16_GOTOFF and
-- GPDISP_LO16. It should refer to the symbol to be referenced, as
-- with 16_GOTOFF, but it generates output not based on the position
-- within the .got section, but relative to the GP value chosen for
-- the file during the final link stage.
--
-- The LITUSE reloc, on the instruction using the loaded address,
-- gives information to the linker that it might be able to use to
-- optimize away some literal section references. The symbol is
-- ignored (read as the absolute section symbol), and the "addend"
-- indicates the type of instruction using the register: 1 - "memory"
-- fmt insn 2 - byte-manipulation (byte offset reg) 3 - jsr (target
-- of branch)
--
-- -- : BFD_RELOC_ALPHA_HINT
-- The HINT relocation indicates a value that should be filled into
-- the "hint" field of a jmp/jsr/ret instruction, for possible branch-
-- prediction logic which may be provided on some processors.
--
-- -- : BFD_RELOC_ALPHA_LINKAGE
-- The LINKAGE relocation outputs a linkage pair in the object file,
-- which is filled by the linker.
--
-- -- : BFD_RELOC_ALPHA_CODEADDR
-- The CODEADDR relocation outputs a STO_CA in the object file, which
-- is filled by the linker.
--
-- -- : BFD_RELOC_ALPHA_GPREL_HI16
-- -- : BFD_RELOC_ALPHA_GPREL_LO16
-- The GPREL_HI/LO relocations together form a 32-bit offset from the
-- GP register.
--
-- -- : BFD_RELOC_ALPHA_BRSGP
-- Like BFD_RELOC_23_PCREL_S2, except that the source and target must
-- share a common GP, and the target address is adjusted for
-- STO_ALPHA_STD_GPLOAD.
--
-- -- : BFD_RELOC_ALPHA_NOP
-- The NOP relocation outputs a NOP if the longword displacement
-- between two procedure entry points is < 2^21.
--
-- -- : BFD_RELOC_ALPHA_BSR
-- The BSR relocation outputs a BSR if the longword displacement
-- between two procedure entry points is < 2^21.
--
-- -- : BFD_RELOC_ALPHA_LDA
-- The LDA relocation outputs a LDA if the longword displacement
-- between two procedure entry points is < 2^16.
--
-- -- : BFD_RELOC_ALPHA_BOH
-- The BOH relocation outputs a BSR if the longword displacement
-- between two procedure entry points is < 2^21, or else a hint.
--
-- -- : BFD_RELOC_ALPHA_TLSGD
-- -- : BFD_RELOC_ALPHA_TLSLDM
-- -- : BFD_RELOC_ALPHA_DTPMOD64
-- -- : BFD_RELOC_ALPHA_GOTDTPREL16
-- -- : BFD_RELOC_ALPHA_DTPREL64
-- -- : BFD_RELOC_ALPHA_DTPREL_HI16
-- -- : BFD_RELOC_ALPHA_DTPREL_LO16
-- -- : BFD_RELOC_ALPHA_DTPREL16
-- -- : BFD_RELOC_ALPHA_GOTTPREL16
-- -- : BFD_RELOC_ALPHA_TPREL64
-- -- : BFD_RELOC_ALPHA_TPREL_HI16
-- -- : BFD_RELOC_ALPHA_TPREL_LO16
-- -- : BFD_RELOC_ALPHA_TPREL16
-- Alpha thread-local storage relocations.
--
-- -- : BFD_RELOC_MIPS_JMP
-- -- : BFD_RELOC_MICROMIPS_JMP
-- The MIPS jump instruction.
--
-- -- : BFD_RELOC_MIPS16_JMP
-- The MIPS16 jump instruction.
--
-- -- : BFD_RELOC_MIPS16_GPREL
-- MIPS16 GP relative reloc.
--
-- -- : BFD_RELOC_HI16
-- High 16 bits of 32-bit value; simple reloc.
--
-- -- : BFD_RELOC_HI16_S
-- High 16 bits of 32-bit value but the low 16 bits will be sign
-- extended and added to form the final result. If the low 16 bits
-- form a negative number, we need to add one to the high value to
-- compensate for the borrow when the low bits are added.
--
-- -- : BFD_RELOC_LO16
-- Low 16 bits.
--
-- -- : BFD_RELOC_HI16_PCREL
-- High 16 bits of 32-bit pc-relative value
--
-- -- : BFD_RELOC_HI16_S_PCREL
-- High 16 bits of 32-bit pc-relative value, adjusted
--
-- -- : BFD_RELOC_LO16_PCREL
-- Low 16 bits of pc-relative value
--
-- -- : BFD_RELOC_MIPS16_GOT16
-- -- : BFD_RELOC_MIPS16_CALL16
-- Equivalent of BFD_RELOC_MIPS_*, but with the MIPS16 layout of
-- 16-bit immediate fields
--
-- -- : BFD_RELOC_MIPS16_HI16
-- MIPS16 high 16 bits of 32-bit value.
--
-- -- : BFD_RELOC_MIPS16_HI16_S
-- MIPS16 high 16 bits of 32-bit value but the low 16 bits will be
-- sign extended and added to form the final result. If the low 16
-- bits form a negative number, we need to add one to the high value
-- to compensate for the borrow when the low bits are added.
--
-- -- : BFD_RELOC_MIPS16_LO16
-- MIPS16 low 16 bits.
--
-- -- : BFD_RELOC_MIPS16_TLS_GD
-- -- : BFD_RELOC_MIPS16_TLS_LDM
-- -- : BFD_RELOC_MIPS16_TLS_DTPREL_HI16
-- -- : BFD_RELOC_MIPS16_TLS_DTPREL_LO16
-- -- : BFD_RELOC_MIPS16_TLS_GOTTPREL
-- -- : BFD_RELOC_MIPS16_TLS_TPREL_HI16
-- -- : BFD_RELOC_MIPS16_TLS_TPREL_LO16
-- MIPS16 TLS relocations
--
-- -- : BFD_RELOC_MIPS_LITERAL
-- -- : BFD_RELOC_MICROMIPS_LITERAL
-- Relocation against a MIPS literal section.
--
-- -- : BFD_RELOC_MICROMIPS_7_PCREL_S1
-- -- : BFD_RELOC_MICROMIPS_10_PCREL_S1
-- -- : BFD_RELOC_MICROMIPS_16_PCREL_S1
-- microMIPS PC-relative relocations.
--
-- -- : BFD_RELOC_MICROMIPS_GPREL16
-- -- : BFD_RELOC_MICROMIPS_HI16
-- -- : BFD_RELOC_MICROMIPS_HI16_S
-- -- : BFD_RELOC_MICROMIPS_LO16
-- microMIPS versions of generic BFD relocs.
--
-- -- : BFD_RELOC_MIPS_GOT16
-- -- : BFD_RELOC_MICROMIPS_GOT16
-- -- : BFD_RELOC_MIPS_CALL16
-- -- : BFD_RELOC_MICROMIPS_CALL16
-- -- : BFD_RELOC_MIPS_GOT_HI16
-- -- : BFD_RELOC_MICROMIPS_GOT_HI16
-- -- : BFD_RELOC_MIPS_GOT_LO16
-- -- : BFD_RELOC_MICROMIPS_GOT_LO16
-- -- : BFD_RELOC_MIPS_CALL_HI16
-- -- : BFD_RELOC_MICROMIPS_CALL_HI16
-- -- : BFD_RELOC_MIPS_CALL_LO16
-- -- : BFD_RELOC_MICROMIPS_CALL_LO16
-- -- : BFD_RELOC_MIPS_SUB
-- -- : BFD_RELOC_MICROMIPS_SUB
-- -- : BFD_RELOC_MIPS_GOT_PAGE
-- -- : BFD_RELOC_MICROMIPS_GOT_PAGE
-- -- : BFD_RELOC_MIPS_GOT_OFST
-- -- : BFD_RELOC_MICROMIPS_GOT_OFST
-- -- : BFD_RELOC_MIPS_GOT_DISP
-- -- : BFD_RELOC_MICROMIPS_GOT_DISP
-- -- : BFD_RELOC_MIPS_SHIFT5
-- -- : BFD_RELOC_MIPS_SHIFT6
-- -- : BFD_RELOC_MIPS_INSERT_A
-- -- : BFD_RELOC_MIPS_INSERT_B
-- -- : BFD_RELOC_MIPS_DELETE
-- -- : BFD_RELOC_MIPS_HIGHEST
-- -- : BFD_RELOC_MICROMIPS_HIGHEST
-- -- : BFD_RELOC_MIPS_HIGHER
-- -- : BFD_RELOC_MICROMIPS_HIGHER
-- -- : BFD_RELOC_MIPS_SCN_DISP
-- -- : BFD_RELOC_MICROMIPS_SCN_DISP
-- -- : BFD_RELOC_MIPS_REL16
-- -- : BFD_RELOC_MIPS_RELGOT
-- -- : BFD_RELOC_MIPS_JALR
-- -- : BFD_RELOC_MICROMIPS_JALR
-- -- : BFD_RELOC_MIPS_TLS_DTPMOD32
-- -- : BFD_RELOC_MIPS_TLS_DTPREL32
-- -- : BFD_RELOC_MIPS_TLS_DTPMOD64
-- -- : BFD_RELOC_MIPS_TLS_DTPREL64
-- -- : BFD_RELOC_MIPS_TLS_GD
-- -- : BFD_RELOC_MICROMIPS_TLS_GD
-- -- : BFD_RELOC_MIPS_TLS_LDM
-- -- : BFD_RELOC_MICROMIPS_TLS_LDM
-- -- : BFD_RELOC_MIPS_TLS_DTPREL_HI16
-- -- : BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16
-- -- : BFD_RELOC_MIPS_TLS_DTPREL_LO16
-- -- : BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16
-- -- : BFD_RELOC_MIPS_TLS_GOTTPREL
-- -- : BFD_RELOC_MICROMIPS_TLS_GOTTPREL
-- -- : BFD_RELOC_MIPS_TLS_TPREL32
-- -- : BFD_RELOC_MIPS_TLS_TPREL64
-- -- : BFD_RELOC_MIPS_TLS_TPREL_HI16
-- -- : BFD_RELOC_MICROMIPS_TLS_TPREL_HI16
-- -- : BFD_RELOC_MIPS_TLS_TPREL_LO16
-- -- : BFD_RELOC_MICROMIPS_TLS_TPREL_LO16
-- -- : BFD_RELOC_MIPS_EH
-- MIPS ELF relocations.
--
-- -- : BFD_RELOC_MIPS_COPY
-- -- : BFD_RELOC_MIPS_JUMP_SLOT
-- MIPS ELF relocations (VxWorks and PLT extensions).
--
-- -- : BFD_RELOC_MOXIE_10_PCREL
-- Moxie ELF relocations.
--
-- -- : BFD_RELOC_FRV_LABEL16
-- -- : BFD_RELOC_FRV_LABEL24
-- -- : BFD_RELOC_FRV_LO16
-- -- : BFD_RELOC_FRV_HI16
-- -- : BFD_RELOC_FRV_GPREL12
-- -- : BFD_RELOC_FRV_GPRELU12
-- -- : BFD_RELOC_FRV_GPREL32
-- -- : BFD_RELOC_FRV_GPRELHI
-- -- : BFD_RELOC_FRV_GPRELLO
-- -- : BFD_RELOC_FRV_GOT12
-- -- : BFD_RELOC_FRV_GOTHI
-- -- : BFD_RELOC_FRV_GOTLO
-- -- : BFD_RELOC_FRV_FUNCDESC
-- -- : BFD_RELOC_FRV_FUNCDESC_GOT12
-- -- : BFD_RELOC_FRV_FUNCDESC_GOTHI
-- -- : BFD_RELOC_FRV_FUNCDESC_GOTLO
-- -- : BFD_RELOC_FRV_FUNCDESC_VALUE
-- -- : BFD_RELOC_FRV_FUNCDESC_GOTOFF12
-- -- : BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
-- -- : BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
-- -- : BFD_RELOC_FRV_GOTOFF12
-- -- : BFD_RELOC_FRV_GOTOFFHI
-- -- : BFD_RELOC_FRV_GOTOFFLO
-- -- : BFD_RELOC_FRV_GETTLSOFF
-- -- : BFD_RELOC_FRV_TLSDESC_VALUE
-- -- : BFD_RELOC_FRV_GOTTLSDESC12
-- -- : BFD_RELOC_FRV_GOTTLSDESCHI
-- -- : BFD_RELOC_FRV_GOTTLSDESCLO
-- -- : BFD_RELOC_FRV_TLSMOFF12
-- -- : BFD_RELOC_FRV_TLSMOFFHI
-- -- : BFD_RELOC_FRV_TLSMOFFLO
-- -- : BFD_RELOC_FRV_GOTTLSOFF12
-- -- : BFD_RELOC_FRV_GOTTLSOFFHI
-- -- : BFD_RELOC_FRV_GOTTLSOFFLO
-- -- : BFD_RELOC_FRV_TLSOFF
-- -- : BFD_RELOC_FRV_TLSDESC_RELAX
-- -- : BFD_RELOC_FRV_GETTLSOFF_RELAX
-- -- : BFD_RELOC_FRV_TLSOFF_RELAX
-- -- : BFD_RELOC_FRV_TLSMOFF
-- Fujitsu Frv Relocations.
--
-- -- : BFD_RELOC_MN10300_GOTOFF24
-- This is a 24bit GOT-relative reloc for the mn10300.
--
-- -- : BFD_RELOC_MN10300_GOT32
-- This is a 32bit GOT-relative reloc for the mn10300, offset by two
-- bytes in the instruction.
--
-- -- : BFD_RELOC_MN10300_GOT24
-- This is a 24bit GOT-relative reloc for the mn10300, offset by two
-- bytes in the instruction.
--
-- -- : BFD_RELOC_MN10300_GOT16
-- This is a 16bit GOT-relative reloc for the mn10300, offset by two
-- bytes in the instruction.
--
-- -- : BFD_RELOC_MN10300_COPY
-- Copy symbol at runtime.
--
-- -- : BFD_RELOC_MN10300_GLOB_DAT
-- Create GOT entry.
--
-- -- : BFD_RELOC_MN10300_JMP_SLOT
-- Create PLT entry.
--
-- -- : BFD_RELOC_MN10300_RELATIVE
-- Adjust by program base.
--
-- -- : BFD_RELOC_MN10300_SYM_DIFF
-- Together with another reloc targeted at the same location, allows
-- for a value that is the difference of two symbols in the same
-- section.
--
-- -- : BFD_RELOC_MN10300_ALIGN
-- The addend of this reloc is an alignment power that must be
-- honoured at the offset's location, regardless of linker relaxation.
--
-- -- : BFD_RELOC_MN10300_TLS_GD
-- -- : BFD_RELOC_MN10300_TLS_LD
-- -- : BFD_RELOC_MN10300_TLS_LDO
-- -- : BFD_RELOC_MN10300_TLS_GOTIE
-- -- : BFD_RELOC_MN10300_TLS_IE
-- -- : BFD_RELOC_MN10300_TLS_LE
-- -- : BFD_RELOC_MN10300_TLS_DTPMOD
-- -- : BFD_RELOC_MN10300_TLS_DTPOFF
-- -- : BFD_RELOC_MN10300_TLS_TPOFF
-- Various TLS-related relocations.
--
-- -- : BFD_RELOC_MN10300_32_PCREL
-- This is a 32bit pcrel reloc for the mn10300, offset by two bytes
-- in the instruction.
--
-- -- : BFD_RELOC_MN10300_16_PCREL
-- This is a 16bit pcrel reloc for the mn10300, offset by two bytes
-- in the instruction.
--
-- -- : BFD_RELOC_386_GOT32
-- -- : BFD_RELOC_386_PLT32
-- -- : BFD_RELOC_386_COPY
-- -- : BFD_RELOC_386_GLOB_DAT
-- -- : BFD_RELOC_386_JUMP_SLOT
-- -- : BFD_RELOC_386_RELATIVE
-- -- : BFD_RELOC_386_GOTOFF
-- -- : BFD_RELOC_386_GOTPC
-- -- : BFD_RELOC_386_TLS_TPOFF
-- -- : BFD_RELOC_386_TLS_IE
-- -- : BFD_RELOC_386_TLS_GOTIE
-- -- : BFD_RELOC_386_TLS_LE
-- -- : BFD_RELOC_386_TLS_GD
-- -- : BFD_RELOC_386_TLS_LDM
-- -- : BFD_RELOC_386_TLS_LDO_32
-- -- : BFD_RELOC_386_TLS_IE_32
-- -- : BFD_RELOC_386_TLS_LE_32
-- -- : BFD_RELOC_386_TLS_DTPMOD32
-- -- : BFD_RELOC_386_TLS_DTPOFF32
-- -- : BFD_RELOC_386_TLS_TPOFF32
-- -- : BFD_RELOC_386_TLS_GOTDESC
-- -- : BFD_RELOC_386_TLS_DESC_CALL
-- -- : BFD_RELOC_386_TLS_DESC
-- -- : BFD_RELOC_386_IRELATIVE
-- i386/elf relocations
--
-- -- : BFD_RELOC_X86_64_GOT32
-- -- : BFD_RELOC_X86_64_PLT32
-- -- : BFD_RELOC_X86_64_COPY
-- -- : BFD_RELOC_X86_64_GLOB_DAT
-- -- : BFD_RELOC_X86_64_JUMP_SLOT
-- -- : BFD_RELOC_X86_64_RELATIVE
-- -- : BFD_RELOC_X86_64_GOTPCREL
-- -- : BFD_RELOC_X86_64_32S
-- -- : BFD_RELOC_X86_64_DTPMOD64
-- -- : BFD_RELOC_X86_64_DTPOFF64
-- -- : BFD_RELOC_X86_64_TPOFF64
-- -- : BFD_RELOC_X86_64_TLSGD
-- -- : BFD_RELOC_X86_64_TLSLD
-- -- : BFD_RELOC_X86_64_DTPOFF32
-- -- : BFD_RELOC_X86_64_GOTTPOFF
-- -- : BFD_RELOC_X86_64_TPOFF32
-- -- : BFD_RELOC_X86_64_GOTOFF64
-- -- : BFD_RELOC_X86_64_GOTPC32
-- -- : BFD_RELOC_X86_64_GOT64
-- -- : BFD_RELOC_X86_64_GOTPCREL64
-- -- : BFD_RELOC_X86_64_GOTPC64
-- -- : BFD_RELOC_X86_64_GOTPLT64
-- -- : BFD_RELOC_X86_64_PLTOFF64
-- -- : BFD_RELOC_X86_64_GOTPC32_TLSDESC
-- -- : BFD_RELOC_X86_64_TLSDESC_CALL
-- -- : BFD_RELOC_X86_64_TLSDESC
-- -- : BFD_RELOC_X86_64_IRELATIVE
-- -- : BFD_RELOC_X86_64_PC32_BND
-- -- : BFD_RELOC_X86_64_PLT32_BND
-- x86-64/elf relocations
--
-- -- : BFD_RELOC_NS32K_IMM_8
-- -- : BFD_RELOC_NS32K_IMM_16
-- -- : BFD_RELOC_NS32K_IMM_32
-- -- : BFD_RELOC_NS32K_IMM_8_PCREL
-- -- : BFD_RELOC_NS32K_IMM_16_PCREL
-- -- : BFD_RELOC_NS32K_IMM_32_PCREL
-- -- : BFD_RELOC_NS32K_DISP_8
-- -- : BFD_RELOC_NS32K_DISP_16
-- -- : BFD_RELOC_NS32K_DISP_32
-- -- : BFD_RELOC_NS32K_DISP_8_PCREL
-- -- : BFD_RELOC_NS32K_DISP_16_PCREL
-- -- : BFD_RELOC_NS32K_DISP_32_PCREL
-- ns32k relocations
--
-- -- : BFD_RELOC_PDP11_DISP_8_PCREL
-- -- : BFD_RELOC_PDP11_DISP_6_PCREL
-- PDP11 relocations
--
-- -- : BFD_RELOC_PJ_CODE_HI16
-- -- : BFD_RELOC_PJ_CODE_LO16
-- -- : BFD_RELOC_PJ_CODE_DIR16
-- -- : BFD_RELOC_PJ_CODE_DIR32
-- -- : BFD_RELOC_PJ_CODE_REL16
-- -- : BFD_RELOC_PJ_CODE_REL32
-- Picojava relocs. Not all of these appear in object files.
--
-- -- : BFD_RELOC_PPC_B26
-- -- : BFD_RELOC_PPC_BA26
-- -- : BFD_RELOC_PPC_TOC16
-- -- : BFD_RELOC_PPC_B16
-- -- : BFD_RELOC_PPC_B16_BRTAKEN
-- -- : BFD_RELOC_PPC_B16_BRNTAKEN
-- -- : BFD_RELOC_PPC_BA16
-- -- : BFD_RELOC_PPC_BA16_BRTAKEN
-- -- : BFD_RELOC_PPC_BA16_BRNTAKEN
-- -- : BFD_RELOC_PPC_COPY
-- -- : BFD_RELOC_PPC_GLOB_DAT
-- -- : BFD_RELOC_PPC_JMP_SLOT
-- -- : BFD_RELOC_PPC_RELATIVE
-- -- : BFD_RELOC_PPC_LOCAL24PC
-- -- : BFD_RELOC_PPC_EMB_NADDR32
-- -- : BFD_RELOC_PPC_EMB_NADDR16
-- -- : BFD_RELOC_PPC_EMB_NADDR16_LO
-- -- : BFD_RELOC_PPC_EMB_NADDR16_HI
-- -- : BFD_RELOC_PPC_EMB_NADDR16_HA
-- -- : BFD_RELOC_PPC_EMB_SDAI16
-- -- : BFD_RELOC_PPC_EMB_SDA2I16
-- -- : BFD_RELOC_PPC_EMB_SDA2REL
-- -- : BFD_RELOC_PPC_EMB_SDA21
-- -- : BFD_RELOC_PPC_EMB_MRKREF
-- -- : BFD_RELOC_PPC_EMB_RELSEC16
-- -- : BFD_RELOC_PPC_EMB_RELST_LO
-- -- : BFD_RELOC_PPC_EMB_RELST_HI
-- -- : BFD_RELOC_PPC_EMB_RELST_HA
-- -- : BFD_RELOC_PPC_EMB_BIT_FLD
-- -- : BFD_RELOC_PPC_EMB_RELSDA
-- -- : BFD_RELOC_PPC_VLE_REL8
-- -- : BFD_RELOC_PPC_VLE_REL15
-- -- : BFD_RELOC_PPC_VLE_REL24
-- -- : BFD_RELOC_PPC_VLE_LO16A
-- -- : BFD_RELOC_PPC_VLE_LO16D
-- -- : BFD_RELOC_PPC_VLE_HI16A
-- -- : BFD_RELOC_PPC_VLE_HI16D
-- -- : BFD_RELOC_PPC_VLE_HA16A
-- -- : BFD_RELOC_PPC_VLE_HA16D
-- -- : BFD_RELOC_PPC_VLE_SDA21
-- -- : BFD_RELOC_PPC_VLE_SDA21_LO
-- -- : BFD_RELOC_PPC_VLE_SDAREL_LO16A
-- -- : BFD_RELOC_PPC_VLE_SDAREL_LO16D
-- -- : BFD_RELOC_PPC_VLE_SDAREL_HI16A
-- -- : BFD_RELOC_PPC_VLE_SDAREL_HI16D
-- -- : BFD_RELOC_PPC_VLE_SDAREL_HA16A
-- -- : BFD_RELOC_PPC_VLE_SDAREL_HA16D
-- -- : BFD_RELOC_PPC64_HIGHER
-- -- : BFD_RELOC_PPC64_HIGHER_S
-- -- : BFD_RELOC_PPC64_HIGHEST
-- -- : BFD_RELOC_PPC64_HIGHEST_S
-- -- : BFD_RELOC_PPC64_TOC16_LO
-- -- : BFD_RELOC_PPC64_TOC16_HI
-- -- : BFD_RELOC_PPC64_TOC16_HA
-- -- : BFD_RELOC_PPC64_TOC
-- -- : BFD_RELOC_PPC64_PLTGOT16
-- -- : BFD_RELOC_PPC64_PLTGOT16_LO
-- -- : BFD_RELOC_PPC64_PLTGOT16_HI
-- -- : BFD_RELOC_PPC64_PLTGOT16_HA
-- -- : BFD_RELOC_PPC64_ADDR16_DS
-- -- : BFD_RELOC_PPC64_ADDR16_LO_DS
-- -- : BFD_RELOC_PPC64_GOT16_DS
-- -- : BFD_RELOC_PPC64_GOT16_LO_DS
-- -- : BFD_RELOC_PPC64_PLT16_LO_DS
-- -- : BFD_RELOC_PPC64_SECTOFF_DS
-- -- : BFD_RELOC_PPC64_SECTOFF_LO_DS
-- -- : BFD_RELOC_PPC64_TOC16_DS
-- -- : BFD_RELOC_PPC64_TOC16_LO_DS
-- -- : BFD_RELOC_PPC64_PLTGOT16_DS
-- -- : BFD_RELOC_PPC64_PLTGOT16_LO_DS
-- -- : BFD_RELOC_PPC64_ADDR16_HIGH
-- -- : BFD_RELOC_PPC64_ADDR16_HIGHA
-- Power(rs6000) and PowerPC relocations.
--
-- -- : BFD_RELOC_PPC_TLS
-- -- : BFD_RELOC_PPC_TLSGD
-- -- : BFD_RELOC_PPC_TLSLD
-- -- : BFD_RELOC_PPC_DTPMOD
-- -- : BFD_RELOC_PPC_TPREL16
-- -- : BFD_RELOC_PPC_TPREL16_LO
-- -- : BFD_RELOC_PPC_TPREL16_HI
-- -- : BFD_RELOC_PPC_TPREL16_HA
-- -- : BFD_RELOC_PPC_TPREL
-- -- : BFD_RELOC_PPC_DTPREL16
-- -- : BFD_RELOC_PPC_DTPREL16_LO
-- -- : BFD_RELOC_PPC_DTPREL16_HI
-- -- : BFD_RELOC_PPC_DTPREL16_HA
-- -- : BFD_RELOC_PPC_DTPREL
-- -- : BFD_RELOC_PPC_GOT_TLSGD16
-- -- : BFD_RELOC_PPC_GOT_TLSGD16_LO
-- -- : BFD_RELOC_PPC_GOT_TLSGD16_HI
-- -- : BFD_RELOC_PPC_GOT_TLSGD16_HA
-- -- : BFD_RELOC_PPC_GOT_TLSLD16
-- -- : BFD_RELOC_PPC_GOT_TLSLD16_LO
-- -- : BFD_RELOC_PPC_GOT_TLSLD16_HI
-- -- : BFD_RELOC_PPC_GOT_TLSLD16_HA
-- -- : BFD_RELOC_PPC_GOT_TPREL16
-- -- : BFD_RELOC_PPC_GOT_TPREL16_LO
-- -- : BFD_RELOC_PPC_GOT_TPREL16_HI
-- -- : BFD_RELOC_PPC_GOT_TPREL16_HA
-- -- : BFD_RELOC_PPC_GOT_DTPREL16
-- -- : BFD_RELOC_PPC_GOT_DTPREL16_LO
-- -- : BFD_RELOC_PPC_GOT_DTPREL16_HI
-- -- : BFD_RELOC_PPC_GOT_DTPREL16_HA
-- -- : BFD_RELOC_PPC64_TPREL16_DS
-- -- : BFD_RELOC_PPC64_TPREL16_LO_DS
-- -- : BFD_RELOC_PPC64_TPREL16_HIGHER
-- -- : BFD_RELOC_PPC64_TPREL16_HIGHERA
-- -- : BFD_RELOC_PPC64_TPREL16_HIGHEST
-- -- : BFD_RELOC_PPC64_TPREL16_HIGHESTA
-- -- : BFD_RELOC_PPC64_DTPREL16_DS
-- -- : BFD_RELOC_PPC64_DTPREL16_LO_DS
-- -- : BFD_RELOC_PPC64_DTPREL16_HIGHER
-- -- : BFD_RELOC_PPC64_DTPREL16_HIGHERA
-- -- : BFD_RELOC_PPC64_DTPREL16_HIGHEST
-- -- : BFD_RELOC_PPC64_DTPREL16_HIGHESTA
-- -- : BFD_RELOC_PPC64_TPREL16_HIGH
-- -- : BFD_RELOC_PPC64_TPREL16_HIGHA
-- -- : BFD_RELOC_PPC64_DTPREL16_HIGH
-- -- : BFD_RELOC_PPC64_DTPREL16_HIGHA
-- PowerPC and PowerPC64 thread-local storage relocations.
--
-- -- : BFD_RELOC_I370_D12
-- IBM 370/390 relocations
--
-- -- : BFD_RELOC_CTOR
-- The type of reloc used to build a constructor table - at the moment
-- probably a 32 bit wide absolute relocation, but the target can
-- choose. It generally does map to one of the other relocation
-- types.
--
-- -- : BFD_RELOC_ARM_PCREL_BRANCH
-- ARM 26 bit pc-relative branch. The lowest two bits must be zero
-- and are not stored in the instruction.
--
-- -- : BFD_RELOC_ARM_PCREL_BLX
-- ARM 26 bit pc-relative branch. The lowest bit must be zero and is
-- not stored in the instruction. The 2nd lowest bit comes from a 1
-- bit field in the instruction.
--
-- -- : BFD_RELOC_THUMB_PCREL_BLX
-- Thumb 22 bit pc-relative branch. The lowest bit must be zero and
-- is not stored in the instruction. The 2nd lowest bit comes from a
-- 1 bit field in the instruction.
--
-- -- : BFD_RELOC_ARM_PCREL_CALL
-- ARM 26-bit pc-relative branch for an unconditional BL or BLX
-- instruction.
--
-- -- : BFD_RELOC_ARM_PCREL_JUMP
-- ARM 26-bit pc-relative branch for B or conditional BL instruction.
--
-- -- : BFD_RELOC_THUMB_PCREL_BRANCH7
-- -- : BFD_RELOC_THUMB_PCREL_BRANCH9
-- -- : BFD_RELOC_THUMB_PCREL_BRANCH12
-- -- : BFD_RELOC_THUMB_PCREL_BRANCH20
-- -- : BFD_RELOC_THUMB_PCREL_BRANCH23
-- -- : BFD_RELOC_THUMB_PCREL_BRANCH25
-- Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches. The
-- lowest bit must be zero and is not stored in the instruction.
-- Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
-- "nn" one smaller in all cases. Note further that BRANCH23
-- corresponds to R_ARM_THM_CALL.
--
-- -- : BFD_RELOC_ARM_OFFSET_IMM
-- 12-bit immediate offset, used in ARM-format ldr and str
-- instructions.
--
-- -- : BFD_RELOC_ARM_THUMB_OFFSET
-- 5-bit immediate offset, used in Thumb-format ldr and str
-- instructions.
--
-- -- : BFD_RELOC_ARM_TARGET1
-- Pc-relative or absolute relocation depending on target. Used for
-- entries in .init_array sections.
--
-- -- : BFD_RELOC_ARM_ROSEGREL32
-- Read-only segment base relative address.
--
-- -- : BFD_RELOC_ARM_SBREL32
-- Data segment base relative address.
--
-- -- : BFD_RELOC_ARM_TARGET2
-- This reloc is used for references to RTTI data from exception
-- handling tables. The actual definition depends on the target. It
-- may be a pc-relative or some form of GOT-indirect relocation.
--
-- -- : BFD_RELOC_ARM_PREL31
-- 31-bit PC relative address.
--
-- -- : BFD_RELOC_ARM_MOVW
-- -- : BFD_RELOC_ARM_MOVT
-- -- : BFD_RELOC_ARM_MOVW_PCREL
-- -- : BFD_RELOC_ARM_MOVT_PCREL
-- -- : BFD_RELOC_ARM_THUMB_MOVW
-- -- : BFD_RELOC_ARM_THUMB_MOVT
-- -- : BFD_RELOC_ARM_THUMB_MOVW_PCREL
-- -- : BFD_RELOC_ARM_THUMB_MOVT_PCREL
-- Low and High halfword relocations for MOVW and MOVT instructions.
--
-- -- : BFD_RELOC_ARM_JUMP_SLOT
-- -- : BFD_RELOC_ARM_GLOB_DAT
-- -- : BFD_RELOC_ARM_GOT32
-- -- : BFD_RELOC_ARM_PLT32
-- -- : BFD_RELOC_ARM_RELATIVE
-- -- : BFD_RELOC_ARM_GOTOFF
-- -- : BFD_RELOC_ARM_GOTPC
-- -- : BFD_RELOC_ARM_GOT_PREL
-- Relocations for setting up GOTs and PLTs for shared libraries.
--
-- -- : BFD_RELOC_ARM_TLS_GD32
-- -- : BFD_RELOC_ARM_TLS_LDO32
-- -- : BFD_RELOC_ARM_TLS_LDM32
-- -- : BFD_RELOC_ARM_TLS_DTPOFF32
-- -- : BFD_RELOC_ARM_TLS_DTPMOD32
-- -- : BFD_RELOC_ARM_TLS_TPOFF32
-- -- : BFD_RELOC_ARM_TLS_IE32
-- -- : BFD_RELOC_ARM_TLS_LE32
-- -- : BFD_RELOC_ARM_TLS_GOTDESC
-- -- : BFD_RELOC_ARM_TLS_CALL
-- -- : BFD_RELOC_ARM_THM_TLS_CALL
-- -- : BFD_RELOC_ARM_TLS_DESCSEQ
-- -- : BFD_RELOC_ARM_THM_TLS_DESCSEQ
-- -- : BFD_RELOC_ARM_TLS_DESC
-- ARM thread-local storage relocations.
--
-- -- : BFD_RELOC_ARM_ALU_PC_G0_NC
-- -- : BFD_RELOC_ARM_ALU_PC_G0
-- -- : BFD_RELOC_ARM_ALU_PC_G1_NC
-- -- : BFD_RELOC_ARM_ALU_PC_G1
-- -- : BFD_RELOC_ARM_ALU_PC_G2
-- -- : BFD_RELOC_ARM_LDR_PC_G0
-- -- : BFD_RELOC_ARM_LDR_PC_G1
-- -- : BFD_RELOC_ARM_LDR_PC_G2
-- -- : BFD_RELOC_ARM_LDRS_PC_G0
-- -- : BFD_RELOC_ARM_LDRS_PC_G1
-- -- : BFD_RELOC_ARM_LDRS_PC_G2
-- -- : BFD_RELOC_ARM_LDC_PC_G0
-- -- : BFD_RELOC_ARM_LDC_PC_G1
-- -- : BFD_RELOC_ARM_LDC_PC_G2
-- -- : BFD_RELOC_ARM_ALU_SB_G0_NC
-- -- : BFD_RELOC_ARM_ALU_SB_G0
-- -- : BFD_RELOC_ARM_ALU_SB_G1_NC
-- -- : BFD_RELOC_ARM_ALU_SB_G1
-- -- : BFD_RELOC_ARM_ALU_SB_G2
-- -- : BFD_RELOC_ARM_LDR_SB_G0
-- -- : BFD_RELOC_ARM_LDR_SB_G1
-- -- : BFD_RELOC_ARM_LDR_SB_G2
-- -- : BFD_RELOC_ARM_LDRS_SB_G0
-- -- : BFD_RELOC_ARM_LDRS_SB_G1
-- -- : BFD_RELOC_ARM_LDRS_SB_G2
-- -- : BFD_RELOC_ARM_LDC_SB_G0
-- -- : BFD_RELOC_ARM_LDC_SB_G1
-- -- : BFD_RELOC_ARM_LDC_SB_G2
-- ARM group relocations.
--
-- -- : BFD_RELOC_ARM_V4BX
-- Annotation of BX instructions.
--
-- -- : BFD_RELOC_ARM_IRELATIVE
-- ARM support for STT_GNU_IFUNC.
--
-- -- : BFD_RELOC_ARM_IMMEDIATE
-- -- : BFD_RELOC_ARM_ADRL_IMMEDIATE
-- -- : BFD_RELOC_ARM_T32_IMMEDIATE
-- -- : BFD_RELOC_ARM_T32_ADD_IMM
-- -- : BFD_RELOC_ARM_T32_IMM12
-- -- : BFD_RELOC_ARM_T32_ADD_PC12
-- -- : BFD_RELOC_ARM_SHIFT_IMM
-- -- : BFD_RELOC_ARM_SMC
-- -- : BFD_RELOC_ARM_HVC
-- -- : BFD_RELOC_ARM_SWI
-- -- : BFD_RELOC_ARM_MULTI
-- -- : BFD_RELOC_ARM_CP_OFF_IMM
-- -- : BFD_RELOC_ARM_CP_OFF_IMM_S2
-- -- : BFD_RELOC_ARM_T32_CP_OFF_IMM
-- -- : BFD_RELOC_ARM_T32_CP_OFF_IMM_S2
-- -- : BFD_RELOC_ARM_ADR_IMM
-- -- : BFD_RELOC_ARM_LDR_IMM
-- -- : BFD_RELOC_ARM_LITERAL
-- -- : BFD_RELOC_ARM_IN_POOL
-- -- : BFD_RELOC_ARM_OFFSET_IMM8
-- -- : BFD_RELOC_ARM_T32_OFFSET_U8
-- -- : BFD_RELOC_ARM_T32_OFFSET_IMM
-- -- : BFD_RELOC_ARM_HWLITERAL
-- -- : BFD_RELOC_ARM_THUMB_ADD
-- -- : BFD_RELOC_ARM_THUMB_IMM
-- -- : BFD_RELOC_ARM_THUMB_SHIFT
-- These relocs are only used within the ARM assembler. They are not
-- (at present) written to any object files.
--
-- -- : BFD_RELOC_SH_PCDISP8BY2
-- -- : BFD_RELOC_SH_PCDISP12BY2
-- -- : BFD_RELOC_SH_IMM3
-- -- : BFD_RELOC_SH_IMM3U
-- -- : BFD_RELOC_SH_DISP12
-- -- : BFD_RELOC_SH_DISP12BY2
-- -- : BFD_RELOC_SH_DISP12BY4
-- -- : BFD_RELOC_SH_DISP12BY8
-- -- : BFD_RELOC_SH_DISP20
-- -- : BFD_RELOC_SH_DISP20BY8
-- -- : BFD_RELOC_SH_IMM4
-- -- : BFD_RELOC_SH_IMM4BY2
-- -- : BFD_RELOC_SH_IMM4BY4
-- -- : BFD_RELOC_SH_IMM8
-- -- : BFD_RELOC_SH_IMM8BY2
-- -- : BFD_RELOC_SH_IMM8BY4
-- -- : BFD_RELOC_SH_PCRELIMM8BY2
-- -- : BFD_RELOC_SH_PCRELIMM8BY4
-- -- : BFD_RELOC_SH_SWITCH16
-- -- : BFD_RELOC_SH_SWITCH32
-- -- : BFD_RELOC_SH_USES
-- -- : BFD_RELOC_SH_COUNT
-- -- : BFD_RELOC_SH_ALIGN
-- -- : BFD_RELOC_SH_CODE
-- -- : BFD_RELOC_SH_DATA
-- -- : BFD_RELOC_SH_LABEL
-- -- : BFD_RELOC_SH_LOOP_START
-- -- : BFD_RELOC_SH_LOOP_END
-- -- : BFD_RELOC_SH_COPY
-- -- : BFD_RELOC_SH_GLOB_DAT
-- -- : BFD_RELOC_SH_JMP_SLOT
-- -- : BFD_RELOC_SH_RELATIVE
-- -- : BFD_RELOC_SH_GOTPC
-- -- : BFD_RELOC_SH_GOT_LOW16
-- -- : BFD_RELOC_SH_GOT_MEDLOW16
-- -- : BFD_RELOC_SH_GOT_MEDHI16
-- -- : BFD_RELOC_SH_GOT_HI16
-- -- : BFD_RELOC_SH_GOTPLT_LOW16
-- -- : BFD_RELOC_SH_GOTPLT_MEDLOW16
-- -- : BFD_RELOC_SH_GOTPLT_MEDHI16
-- -- : BFD_RELOC_SH_GOTPLT_HI16
-- -- : BFD_RELOC_SH_PLT_LOW16
-- -- : BFD_RELOC_SH_PLT_MEDLOW16
-- -- : BFD_RELOC_SH_PLT_MEDHI16
-- -- : BFD_RELOC_SH_PLT_HI16
-- -- : BFD_RELOC_SH_GOTOFF_LOW16
-- -- : BFD_RELOC_SH_GOTOFF_MEDLOW16
-- -- : BFD_RELOC_SH_GOTOFF_MEDHI16
-- -- : BFD_RELOC_SH_GOTOFF_HI16
-- -- : BFD_RELOC_SH_GOTPC_LOW16
-- -- : BFD_RELOC_SH_GOTPC_MEDLOW16
-- -- : BFD_RELOC_SH_GOTPC_MEDHI16
-- -- : BFD_RELOC_SH_GOTPC_HI16
-- -- : BFD_RELOC_SH_COPY64
-- -- : BFD_RELOC_SH_GLOB_DAT64
-- -- : BFD_RELOC_SH_JMP_SLOT64
-- -- : BFD_RELOC_SH_RELATIVE64
-- -- : BFD_RELOC_SH_GOT10BY4
-- -- : BFD_RELOC_SH_GOT10BY8
-- -- : BFD_RELOC_SH_GOTPLT10BY4
-- -- : BFD_RELOC_SH_GOTPLT10BY8
-- -- : BFD_RELOC_SH_GOTPLT32
-- -- : BFD_RELOC_SH_SHMEDIA_CODE
-- -- : BFD_RELOC_SH_IMMU5
-- -- : BFD_RELOC_SH_IMMS6
-- -- : BFD_RELOC_SH_IMMS6BY32
-- -- : BFD_RELOC_SH_IMMU6
-- -- : BFD_RELOC_SH_IMMS10
-- -- : BFD_RELOC_SH_IMMS10BY2
-- -- : BFD_RELOC_SH_IMMS10BY4
-- -- : BFD_RELOC_SH_IMMS10BY8
-- -- : BFD_RELOC_SH_IMMS16
-- -- : BFD_RELOC_SH_IMMU16
-- -- : BFD_RELOC_SH_IMM_LOW16
-- -- : BFD_RELOC_SH_IMM_LOW16_PCREL
-- -- : BFD_RELOC_SH_IMM_MEDLOW16
-- -- : BFD_RELOC_SH_IMM_MEDLOW16_PCREL
-- -- : BFD_RELOC_SH_IMM_MEDHI16
-- -- : BFD_RELOC_SH_IMM_MEDHI16_PCREL
-- -- : BFD_RELOC_SH_IMM_HI16
-- -- : BFD_RELOC_SH_IMM_HI16_PCREL
-- -- : BFD_RELOC_SH_PT_16
-- -- : BFD_RELOC_SH_TLS_GD_32
-- -- : BFD_RELOC_SH_TLS_LD_32
-- -- : BFD_RELOC_SH_TLS_LDO_32
-- -- : BFD_RELOC_SH_TLS_IE_32
-- -- : BFD_RELOC_SH_TLS_LE_32
-- -- : BFD_RELOC_SH_TLS_DTPMOD32
-- -- : BFD_RELOC_SH_TLS_DTPOFF32
-- -- : BFD_RELOC_SH_TLS_TPOFF32
-- -- : BFD_RELOC_SH_GOT20
-- -- : BFD_RELOC_SH_GOTOFF20
-- -- : BFD_RELOC_SH_GOTFUNCDESC
-- -- : BFD_RELOC_SH_GOTFUNCDESC20
-- -- : BFD_RELOC_SH_GOTOFFFUNCDESC
-- -- : BFD_RELOC_SH_GOTOFFFUNCDESC20
-- -- : BFD_RELOC_SH_FUNCDESC
-- Renesas / SuperH SH relocs. Not all of these appear in object
-- files.
--
-- -- : BFD_RELOC_ARC_B22_PCREL
-- ARC Cores relocs. ARC 22 bit pc-relative branch. The lowest two
-- bits must be zero and are not stored in the instruction. The high
-- 20 bits are installed in bits 26 through 7 of the instruction.
--
-- -- : BFD_RELOC_ARC_B26
-- ARC 26 bit absolute branch. The lowest two bits must be zero and
-- are not stored in the instruction. The high 24 bits are installed
-- in bits 23 through 0.
--
-- -- : BFD_RELOC_BFIN_16_IMM
-- ADI Blackfin 16 bit immediate absolute reloc.
--
-- -- : BFD_RELOC_BFIN_16_HIGH
-- ADI Blackfin 16 bit immediate absolute reloc higher 16 bits.
--
-- -- : BFD_RELOC_BFIN_4_PCREL
-- ADI Blackfin 'a' part of LSETUP.
--
-- -- : BFD_RELOC_BFIN_5_PCREL
-- ADI Blackfin.
--
-- -- : BFD_RELOC_BFIN_16_LOW
-- ADI Blackfin 16 bit immediate absolute reloc lower 16 bits.
--
-- -- : BFD_RELOC_BFIN_10_PCREL
-- ADI Blackfin.
--
-- -- : BFD_RELOC_BFIN_11_PCREL
-- ADI Blackfin 'b' part of LSETUP.
--
-- -- : BFD_RELOC_BFIN_12_PCREL_JUMP
-- ADI Blackfin.
--
-- -- : BFD_RELOC_BFIN_12_PCREL_JUMP_S
-- ADI Blackfin Short jump, pcrel.
--
-- -- : BFD_RELOC_BFIN_24_PCREL_CALL_X
-- ADI Blackfin Call.x not implemented.
--
-- -- : BFD_RELOC_BFIN_24_PCREL_JUMP_L
-- ADI Blackfin Long Jump pcrel.
--
-- -- : BFD_RELOC_BFIN_GOT17M4
-- -- : BFD_RELOC_BFIN_GOTHI
-- -- : BFD_RELOC_BFIN_GOTLO
-- -- : BFD_RELOC_BFIN_FUNCDESC
-- -- : BFD_RELOC_BFIN_FUNCDESC_GOT17M4
-- -- : BFD_RELOC_BFIN_FUNCDESC_GOTHI
-- -- : BFD_RELOC_BFIN_FUNCDESC_GOTLO
-- -- : BFD_RELOC_BFIN_FUNCDESC_VALUE
-- -- : BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4
-- -- : BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI
-- -- : BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO
-- -- : BFD_RELOC_BFIN_GOTOFF17M4
-- -- : BFD_RELOC_BFIN_GOTOFFHI
-- -- : BFD_RELOC_BFIN_GOTOFFLO
-- ADI Blackfin FD-PIC relocations.
--
-- -- : BFD_RELOC_BFIN_GOT
-- ADI Blackfin GOT relocation.
--
-- -- : BFD_RELOC_BFIN_PLTPC
-- ADI Blackfin PLTPC relocation.
--
-- -- : BFD_ARELOC_BFIN_PUSH
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_CONST
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_ADD
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_SUB
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_MULT
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_DIV
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_MOD
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_LSHIFT
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_RSHIFT
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_AND
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_OR
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_XOR
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_LAND
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_LOR
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_LEN
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_NEG
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_COMP
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_PAGE
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_HWPAGE
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_ARELOC_BFIN_ADDR
-- ADI Blackfin arithmetic relocation.
--
-- -- : BFD_RELOC_D10V_10_PCREL_R
-- Mitsubishi D10V relocs. This is a 10-bit reloc with the right 2
-- bits assumed to be 0.
--
-- -- : BFD_RELOC_D10V_10_PCREL_L
-- Mitsubishi D10V relocs. This is a 10-bit reloc with the right 2
-- bits assumed to be 0. This is the same as the previous reloc
-- except it is in the left container, i.e., shifted left 15 bits.
--
-- -- : BFD_RELOC_D10V_18
-- This is an 18-bit reloc with the right 2 bits assumed to be 0.
--
-- -- : BFD_RELOC_D10V_18_PCREL
-- This is an 18-bit reloc with the right 2 bits assumed to be 0.
--
-- -- : BFD_RELOC_D30V_6
-- Mitsubishi D30V relocs. This is a 6-bit absolute reloc.
--
-- -- : BFD_RELOC_D30V_9_PCREL
-- This is a 6-bit pc-relative reloc with the right 3 bits assumed to
-- be 0.
--
-- -- : BFD_RELOC_D30V_9_PCREL_R
-- This is a 6-bit pc-relative reloc with the right 3 bits assumed to
-- be 0. Same as the previous reloc but on the right side of the
-- container.
--
-- -- : BFD_RELOC_D30V_15
-- This is a 12-bit absolute reloc with the right 3 bitsassumed to be
-- 0.
--
-- -- : BFD_RELOC_D30V_15_PCREL
-- This is a 12-bit pc-relative reloc with the right 3 bits assumed
-- to be 0.
--
-- -- : BFD_RELOC_D30V_15_PCREL_R
-- This is a 12-bit pc-relative reloc with the right 3 bits assumed
-- to be 0. Same as the previous reloc but on the right side of the
-- container.
--
-- -- : BFD_RELOC_D30V_21
-- This is an 18-bit absolute reloc with the right 3 bits assumed to
-- be 0.
--
-- -- : BFD_RELOC_D30V_21_PCREL
-- This is an 18-bit pc-relative reloc with the right 3 bits assumed
-- to be 0.
--
-- -- : BFD_RELOC_D30V_21_PCREL_R
-- This is an 18-bit pc-relative reloc with the right 3 bits assumed
-- to be 0. Same as the previous reloc but on the right side of the
-- container.
--
-- -- : BFD_RELOC_D30V_32
-- This is a 32-bit absolute reloc.
--
-- -- : BFD_RELOC_D30V_32_PCREL
-- This is a 32-bit pc-relative reloc.
--
-- -- : BFD_RELOC_DLX_HI16_S
-- DLX relocs
--
-- -- : BFD_RELOC_DLX_LO16
-- DLX relocs
--
-- -- : BFD_RELOC_DLX_JMP26
-- DLX relocs
--
-- -- : BFD_RELOC_M32C_HI8
-- -- : BFD_RELOC_M32C_RL_JUMP
-- -- : BFD_RELOC_M32C_RL_1ADDR
-- -- : BFD_RELOC_M32C_RL_2ADDR
-- Renesas M16C/M32C Relocations.
--
-- -- : BFD_RELOC_M32R_24
-- Renesas M32R (formerly Mitsubishi M32R) relocs. This is a 24 bit
-- absolute address.
--
-- -- : BFD_RELOC_M32R_10_PCREL
-- This is a 10-bit pc-relative reloc with the right 2 bits assumed
-- to be 0.
--
-- -- : BFD_RELOC_M32R_18_PCREL
-- This is an 18-bit reloc with the right 2 bits assumed to be 0.
--
-- -- : BFD_RELOC_M32R_26_PCREL
-- This is a 26-bit reloc with the right 2 bits assumed to be 0.
--
-- -- : BFD_RELOC_M32R_HI16_ULO
-- This is a 16-bit reloc containing the high 16 bits of an address
-- used when the lower 16 bits are treated as unsigned.
--
-- -- : BFD_RELOC_M32R_HI16_SLO
-- This is a 16-bit reloc containing the high 16 bits of an address
-- used when the lower 16 bits are treated as signed.
--
-- -- : BFD_RELOC_M32R_LO16
-- This is a 16-bit reloc containing the lower 16 bits of an address.
--
-- -- : BFD_RELOC_M32R_SDA16
-- This is a 16-bit reloc containing the small data area offset for
-- use in add3, load, and store instructions.
--
-- -- : BFD_RELOC_M32R_GOT24
-- -- : BFD_RELOC_M32R_26_PLTREL
-- -- : BFD_RELOC_M32R_COPY
-- -- : BFD_RELOC_M32R_GLOB_DAT
-- -- : BFD_RELOC_M32R_JMP_SLOT
-- -- : BFD_RELOC_M32R_RELATIVE
-- -- : BFD_RELOC_M32R_GOTOFF
-- -- : BFD_RELOC_M32R_GOTOFF_HI_ULO
-- -- : BFD_RELOC_M32R_GOTOFF_HI_SLO
-- -- : BFD_RELOC_M32R_GOTOFF_LO
-- -- : BFD_RELOC_M32R_GOTPC24
-- -- : BFD_RELOC_M32R_GOT16_HI_ULO
-- -- : BFD_RELOC_M32R_GOT16_HI_SLO
-- -- : BFD_RELOC_M32R_GOT16_LO
-- -- : BFD_RELOC_M32R_GOTPC_HI_ULO
-- -- : BFD_RELOC_M32R_GOTPC_HI_SLO
-- -- : BFD_RELOC_M32R_GOTPC_LO
-- For PIC.
--
-- -- : BFD_RELOC_V850_9_PCREL
-- This is a 9-bit reloc
--
-- -- : BFD_RELOC_V850_22_PCREL
-- This is a 22-bit reloc
--
-- -- : BFD_RELOC_V850_SDA_16_16_OFFSET
-- This is a 16 bit offset from the short data area pointer.
--
-- -- : BFD_RELOC_V850_SDA_15_16_OFFSET
-- This is a 16 bit offset (of which only 15 bits are used) from the
-- short data area pointer.
--
-- -- : BFD_RELOC_V850_ZDA_16_16_OFFSET
-- This is a 16 bit offset from the zero data area pointer.
--
-- -- : BFD_RELOC_V850_ZDA_15_16_OFFSET
-- This is a 16 bit offset (of which only 15 bits are used) from the
-- zero data area pointer.
--
-- -- : BFD_RELOC_V850_TDA_6_8_OFFSET
-- This is an 8 bit offset (of which only 6 bits are used) from the
-- tiny data area pointer.
--
-- -- : BFD_RELOC_V850_TDA_7_8_OFFSET
-- This is an 8bit offset (of which only 7 bits are used) from the
-- tiny data area pointer.
--
-- -- : BFD_RELOC_V850_TDA_7_7_OFFSET
-- This is a 7 bit offset from the tiny data area pointer.
--
-- -- : BFD_RELOC_V850_TDA_16_16_OFFSET
-- This is a 16 bit offset from the tiny data area pointer.
--
-- -- : BFD_RELOC_V850_TDA_4_5_OFFSET
-- This is a 5 bit offset (of which only 4 bits are used) from the
-- tiny data area pointer.
--
-- -- : BFD_RELOC_V850_TDA_4_4_OFFSET
-- This is a 4 bit offset from the tiny data area pointer.
--
-- -- : BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
-- This is a 16 bit offset from the short data area pointer, with the
-- bits placed non-contiguously in the instruction.
--
-- -- : BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
-- This is a 16 bit offset from the zero data area pointer, with the
-- bits placed non-contiguously in the instruction.
--
-- -- : BFD_RELOC_V850_CALLT_6_7_OFFSET
-- This is a 6 bit offset from the call table base pointer.
--
-- -- : BFD_RELOC_V850_CALLT_16_16_OFFSET
-- This is a 16 bit offset from the call table base pointer.
--
-- -- : BFD_RELOC_V850_LONGCALL
-- Used for relaxing indirect function calls.
--
-- -- : BFD_RELOC_V850_LONGJUMP
-- Used for relaxing indirect jumps.
--
-- -- : BFD_RELOC_V850_ALIGN
-- Used to maintain alignment whilst relaxing.
--
-- -- : BFD_RELOC_V850_LO16_SPLIT_OFFSET
-- This is a variation of BFD_RELOC_LO16 that can be used in v850e
-- ld.bu instructions.
--
-- -- : BFD_RELOC_V850_16_PCREL
-- This is a 16-bit reloc.
--
-- -- : BFD_RELOC_V850_17_PCREL
-- This is a 17-bit reloc.
--
-- -- : BFD_RELOC_V850_23
-- This is a 23-bit reloc.
--
-- -- : BFD_RELOC_V850_32_PCREL
-- This is a 32-bit reloc.
--
-- -- : BFD_RELOC_V850_32_ABS
-- This is a 32-bit reloc.
--
-- -- : BFD_RELOC_V850_16_SPLIT_OFFSET
-- This is a 16-bit reloc.
--
-- -- : BFD_RELOC_V850_16_S1
-- This is a 16-bit reloc.
--
-- -- : BFD_RELOC_V850_LO16_S1
-- Low 16 bits. 16 bit shifted by 1.
--
-- -- : BFD_RELOC_V850_CALLT_15_16_OFFSET
-- This is a 16 bit offset from the call table base pointer.
--
-- -- : BFD_RELOC_V850_32_GOTPCREL
-- DSO relocations.
--
-- -- : BFD_RELOC_V850_16_GOT
-- DSO relocations.
--
-- -- : BFD_RELOC_V850_32_GOT
-- DSO relocations.
--
-- -- : BFD_RELOC_V850_22_PLT_PCREL
-- DSO relocations.
--
-- -- : BFD_RELOC_V850_32_PLT_PCREL
-- DSO relocations.
--
-- -- : BFD_RELOC_V850_COPY
-- DSO relocations.
--
-- -- : BFD_RELOC_V850_GLOB_DAT
-- DSO relocations.
--
-- -- : BFD_RELOC_V850_JMP_SLOT
-- DSO relocations.
--
-- -- : BFD_RELOC_V850_RELATIVE
-- DSO relocations.
--
-- -- : BFD_RELOC_V850_16_GOTOFF
-- DSO relocations.
--
-- -- : BFD_RELOC_V850_32_GOTOFF
-- DSO relocations.
--
-- -- : BFD_RELOC_V850_CODE
-- start code.
--
-- -- : BFD_RELOC_V850_DATA
-- start data in text.
--
-- -- : BFD_RELOC_TIC30_LDP
-- This is a 8bit DP reloc for the tms320c30, where the most
-- significant 8 bits of a 24 bit word are placed into the least
-- significant 8 bits of the opcode.
--
-- -- : BFD_RELOC_TIC54X_PARTLS7
-- This is a 7bit reloc for the tms320c54x, where the least
-- significant 7 bits of a 16 bit word are placed into the least
-- significant 7 bits of the opcode.
--
-- -- : BFD_RELOC_TIC54X_PARTMS9
-- This is a 9bit DP reloc for the tms320c54x, where the most
-- significant 9 bits of a 16 bit word are placed into the least
-- significant 9 bits of the opcode.
--
-- -- : BFD_RELOC_TIC54X_23
-- This is an extended address 23-bit reloc for the tms320c54x.
--
-- -- : BFD_RELOC_TIC54X_16_OF_23
-- This is a 16-bit reloc for the tms320c54x, where the least
-- significant 16 bits of a 23-bit extended address are placed into
-- the opcode.
--
-- -- : BFD_RELOC_TIC54X_MS7_OF_23
-- This is a reloc for the tms320c54x, where the most significant 7
-- bits of a 23-bit extended address are placed into the opcode.
--
-- -- : BFD_RELOC_C6000_PCR_S21
-- -- : BFD_RELOC_C6000_PCR_S12
-- -- : BFD_RELOC_C6000_PCR_S10
-- -- : BFD_RELOC_C6000_PCR_S7
-- -- : BFD_RELOC_C6000_ABS_S16
-- -- : BFD_RELOC_C6000_ABS_L16
-- -- : BFD_RELOC_C6000_ABS_H16
-- -- : BFD_RELOC_C6000_SBR_U15_B
-- -- : BFD_RELOC_C6000_SBR_U15_H
-- -- : BFD_RELOC_C6000_SBR_U15_W
-- -- : BFD_RELOC_C6000_SBR_S16
-- -- : BFD_RELOC_C6000_SBR_L16_B
-- -- : BFD_RELOC_C6000_SBR_L16_H
-- -- : BFD_RELOC_C6000_SBR_L16_W
-- -- : BFD_RELOC_C6000_SBR_H16_B
-- -- : BFD_RELOC_C6000_SBR_H16_H
-- -- : BFD_RELOC_C6000_SBR_H16_W
-- -- : BFD_RELOC_C6000_SBR_GOT_U15_W
-- -- : BFD_RELOC_C6000_SBR_GOT_L16_W
-- -- : BFD_RELOC_C6000_SBR_GOT_H16_W
-- -- : BFD_RELOC_C6000_DSBT_INDEX
-- -- : BFD_RELOC_C6000_PREL31
-- -- : BFD_RELOC_C6000_COPY
-- -- : BFD_RELOC_C6000_JUMP_SLOT
-- -- : BFD_RELOC_C6000_EHTYPE
-- -- : BFD_RELOC_C6000_PCR_H16
-- -- : BFD_RELOC_C6000_PCR_L16
-- -- : BFD_RELOC_C6000_ALIGN
-- -- : BFD_RELOC_C6000_FPHEAD
-- -- : BFD_RELOC_C6000_NOCMP
-- TMS320C6000 relocations.
--
-- -- : BFD_RELOC_FR30_48
-- This is a 48 bit reloc for the FR30 that stores 32 bits.
--
-- -- : BFD_RELOC_FR30_20
-- This is a 32 bit reloc for the FR30 that stores 20 bits split up
-- into two sections.
--
-- -- : BFD_RELOC_FR30_6_IN_4
-- This is a 16 bit reloc for the FR30 that stores a 6 bit word
-- offset in 4 bits.
--
-- -- : BFD_RELOC_FR30_8_IN_8
-- This is a 16 bit reloc for the FR30 that stores an 8 bit byte
-- offset into 8 bits.
--
-- -- : BFD_RELOC_FR30_9_IN_8
-- This is a 16 bit reloc for the FR30 that stores a 9 bit short
-- offset into 8 bits.
--
-- -- : BFD_RELOC_FR30_10_IN_8
-- This is a 16 bit reloc for the FR30 that stores a 10 bit word
-- offset into 8 bits.
--
-- -- : BFD_RELOC_FR30_9_PCREL
-- This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
-- short offset into 8 bits.
--
-- -- : BFD_RELOC_FR30_12_PCREL
-- This is a 16 bit reloc for the FR30 that stores a 12 bit pc
-- relative short offset into 11 bits.
--
-- -- : BFD_RELOC_MCORE_PCREL_IMM8BY4
-- -- : BFD_RELOC_MCORE_PCREL_IMM11BY2
-- -- : BFD_RELOC_MCORE_PCREL_IMM4BY2
-- -- : BFD_RELOC_MCORE_PCREL_32
-- -- : BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
-- -- : BFD_RELOC_MCORE_RVA
-- Motorola Mcore relocations.
--
-- -- : BFD_RELOC_MEP_8
-- -- : BFD_RELOC_MEP_16
-- -- : BFD_RELOC_MEP_32
-- -- : BFD_RELOC_MEP_PCREL8A2
-- -- : BFD_RELOC_MEP_PCREL12A2
-- -- : BFD_RELOC_MEP_PCREL17A2
-- -- : BFD_RELOC_MEP_PCREL24A2
-- -- : BFD_RELOC_MEP_PCABS24A2
-- -- : BFD_RELOC_MEP_LOW16
-- -- : BFD_RELOC_MEP_HI16U
-- -- : BFD_RELOC_MEP_HI16S
-- -- : BFD_RELOC_MEP_GPREL
-- -- : BFD_RELOC_MEP_TPREL
-- -- : BFD_RELOC_MEP_TPREL7
-- -- : BFD_RELOC_MEP_TPREL7A2
-- -- : BFD_RELOC_MEP_TPREL7A4
-- -- : BFD_RELOC_MEP_UIMM24
-- -- : BFD_RELOC_MEP_ADDR24A4
-- -- : BFD_RELOC_MEP_GNU_VTINHERIT
-- -- : BFD_RELOC_MEP_GNU_VTENTRY
-- Toshiba Media Processor Relocations.
--
-- -- : BFD_RELOC_METAG_HIADDR16
-- -- : BFD_RELOC_METAG_LOADDR16
-- -- : BFD_RELOC_METAG_RELBRANCH
-- -- : BFD_RELOC_METAG_GETSETOFF
-- -- : BFD_RELOC_METAG_HIOG
-- -- : BFD_RELOC_METAG_LOOG
-- -- : BFD_RELOC_METAG_REL8
-- -- : BFD_RELOC_METAG_REL16
-- -- : BFD_RELOC_METAG_HI16_GOTOFF
-- -- : BFD_RELOC_METAG_LO16_GOTOFF
-- -- : BFD_RELOC_METAG_GETSET_GOTOFF
-- -- : BFD_RELOC_METAG_GETSET_GOT
-- -- : BFD_RELOC_METAG_HI16_GOTPC
-- -- : BFD_RELOC_METAG_LO16_GOTPC
-- -- : BFD_RELOC_METAG_HI16_PLT
-- -- : BFD_RELOC_METAG_LO16_PLT
-- -- : BFD_RELOC_METAG_RELBRANCH_PLT
-- -- : BFD_RELOC_METAG_GOTOFF
-- -- : BFD_RELOC_METAG_PLT
-- -- : BFD_RELOC_METAG_COPY
-- -- : BFD_RELOC_METAG_JMP_SLOT
-- -- : BFD_RELOC_METAG_RELATIVE
-- -- : BFD_RELOC_METAG_GLOB_DAT
-- -- : BFD_RELOC_METAG_TLS_GD
-- -- : BFD_RELOC_METAG_TLS_LDM
-- -- : BFD_RELOC_METAG_TLS_LDO_HI16
-- -- : BFD_RELOC_METAG_TLS_LDO_LO16
-- -- : BFD_RELOC_METAG_TLS_LDO
-- -- : BFD_RELOC_METAG_TLS_IE
-- -- : BFD_RELOC_METAG_TLS_IENONPIC
-- -- : BFD_RELOC_METAG_TLS_IENONPIC_HI16
-- -- : BFD_RELOC_METAG_TLS_IENONPIC_LO16
-- -- : BFD_RELOC_METAG_TLS_TPOFF
-- -- : BFD_RELOC_METAG_TLS_DTPMOD
-- -- : BFD_RELOC_METAG_TLS_DTPOFF
-- -- : BFD_RELOC_METAG_TLS_LE
-- -- : BFD_RELOC_METAG_TLS_LE_HI16
-- -- : BFD_RELOC_METAG_TLS_LE_LO16
-- Imagination Technologies Meta relocations.
--
-- -- : BFD_RELOC_MMIX_GETA
-- -- : BFD_RELOC_MMIX_GETA_1
-- -- : BFD_RELOC_MMIX_GETA_2
-- -- : BFD_RELOC_MMIX_GETA_3
-- These are relocations for the GETA instruction.
--
-- -- : BFD_RELOC_MMIX_CBRANCH
-- -- : BFD_RELOC_MMIX_CBRANCH_J
-- -- : BFD_RELOC_MMIX_CBRANCH_1
-- -- : BFD_RELOC_MMIX_CBRANCH_2
-- -- : BFD_RELOC_MMIX_CBRANCH_3
-- These are relocations for a conditional branch instruction.
--
-- -- : BFD_RELOC_MMIX_PUSHJ
-- -- : BFD_RELOC_MMIX_PUSHJ_1
-- -- : BFD_RELOC_MMIX_PUSHJ_2
-- -- : BFD_RELOC_MMIX_PUSHJ_3
-- -- : BFD_RELOC_MMIX_PUSHJ_STUBBABLE
-- These are relocations for the PUSHJ instruction.
--
-- -- : BFD_RELOC_MMIX_JMP
-- -- : BFD_RELOC_MMIX_JMP_1
-- -- : BFD_RELOC_MMIX_JMP_2
-- -- : BFD_RELOC_MMIX_JMP_3
-- These are relocations for the JMP instruction.
--
-- -- : BFD_RELOC_MMIX_ADDR19
-- This is a relocation for a relative address as in a GETA
-- instruction or a branch.
--
-- -- : BFD_RELOC_MMIX_ADDR27
-- This is a relocation for a relative address as in a JMP
-- instruction.
--
-- -- : BFD_RELOC_MMIX_REG_OR_BYTE
-- This is a relocation for an instruction field that may be a general
-- register or a value 0..255.
--
-- -- : BFD_RELOC_MMIX_REG
-- This is a relocation for an instruction field that may be a general
-- register.
--
-- -- : BFD_RELOC_MMIX_BASE_PLUS_OFFSET
-- This is a relocation for two instruction fields holding a register
-- and an offset, the equivalent of the relocation.
--
-- -- : BFD_RELOC_MMIX_LOCAL
-- This relocation is an assertion that the expression is not
-- allocated as a global register. It does not modify contents.
--
-- -- : BFD_RELOC_AVR_7_PCREL
-- This is a 16 bit reloc for the AVR that stores 8 bit pc relative
-- short offset into 7 bits.
--
-- -- : BFD_RELOC_AVR_13_PCREL
-- This is a 16 bit reloc for the AVR that stores 13 bit pc relative
-- short offset into 12 bits.
--
-- -- : BFD_RELOC_AVR_16_PM
-- This is a 16 bit reloc for the AVR that stores 17 bit value
-- (usually program memory address) into 16 bits.
--
-- -- : BFD_RELOC_AVR_LO8_LDI
-- This is a 16 bit reloc for the AVR that stores 8 bit value (usually
-- data memory address) into 8 bit immediate value of LDI insn.
--
-- -- : BFD_RELOC_AVR_HI8_LDI
-- This is a 16 bit reloc for the AVR that stores 8 bit value (high 8
-- bit of data memory address) into 8 bit immediate value of LDI insn.
--
-- -- : BFD_RELOC_AVR_HH8_LDI
-- This is a 16 bit reloc for the AVR that stores 8 bit value (most
-- high 8 bit of program memory address) into 8 bit immediate value
-- of LDI insn.
--
-- -- : BFD_RELOC_AVR_MS8_LDI
-- This is a 16 bit reloc for the AVR that stores 8 bit value (most
-- high 8 bit of 32 bit value) into 8 bit immediate value of LDI insn.
--
-- -- : BFD_RELOC_AVR_LO8_LDI_NEG
-- This is a 16 bit reloc for the AVR that stores negated 8 bit value
-- (usually data memory address) into 8 bit immediate value of SUBI
-- insn.
--
-- -- : BFD_RELOC_AVR_HI8_LDI_NEG
-- This is a 16 bit reloc for the AVR that stores negated 8 bit value
-- (high 8 bit of data memory address) into 8 bit immediate value of
-- SUBI insn.
--
-- -- : BFD_RELOC_AVR_HH8_LDI_NEG
-- This is a 16 bit reloc for the AVR that stores negated 8 bit value
-- (most high 8 bit of program memory address) into 8 bit immediate
-- value of LDI or SUBI insn.
--
-- -- : BFD_RELOC_AVR_MS8_LDI_NEG
-- This is a 16 bit reloc for the AVR that stores negated 8 bit value
-- (msb of 32 bit value) into 8 bit immediate value of LDI insn.
--
-- -- : BFD_RELOC_AVR_LO8_LDI_PM
-- This is a 16 bit reloc for the AVR that stores 8 bit value (usually
-- command address) into 8 bit immediate value of LDI insn.
--
-- -- : BFD_RELOC_AVR_LO8_LDI_GS
-- This is a 16 bit reloc for the AVR that stores 8 bit value
-- (command address) into 8 bit immediate value of LDI insn. If the
-- address is beyond the 128k boundary, the linker inserts a jump
-- stub for this reloc in the lower 128k.
--
-- -- : BFD_RELOC_AVR_HI8_LDI_PM
-- This is a 16 bit reloc for the AVR that stores 8 bit value (high 8
-- bit of command address) into 8 bit immediate value of LDI insn.
--
-- -- : BFD_RELOC_AVR_HI8_LDI_GS
-- This is a 16 bit reloc for the AVR that stores 8 bit value (high 8
-- bit of command address) into 8 bit immediate value of LDI insn.
-- If the address is beyond the 128k boundary, the linker inserts a
-- jump stub for this reloc below 128k.
--
-- -- : BFD_RELOC_AVR_HH8_LDI_PM
-- This is a 16 bit reloc for the AVR that stores 8 bit value (most
-- high 8 bit of command address) into 8 bit immediate value of LDI
-- insn.
--
-- -- : BFD_RELOC_AVR_LO8_LDI_PM_NEG
-- This is a 16 bit reloc for the AVR that stores negated 8 bit value
-- (usually command address) into 8 bit immediate value of SUBI insn.
--
-- -- : BFD_RELOC_AVR_HI8_LDI_PM_NEG
-- This is a 16 bit reloc for the AVR that stores negated 8 bit value
-- (high 8 bit of 16 bit command address) into 8 bit immediate value
-- of SUBI insn.
--
-- -- : BFD_RELOC_AVR_HH8_LDI_PM_NEG
-- This is a 16 bit reloc for the AVR that stores negated 8 bit value
-- (high 6 bit of 22 bit command address) into 8 bit immediate value
-- of SUBI insn.
--
-- -- : BFD_RELOC_AVR_CALL
-- This is a 32 bit reloc for the AVR that stores 23 bit value into
-- 22 bits.
--
-- -- : BFD_RELOC_AVR_LDI
-- This is a 16 bit reloc for the AVR that stores all needed bits for
-- absolute addressing with ldi with overflow check to linktime
--
-- -- : BFD_RELOC_AVR_6
-- This is a 6 bit reloc for the AVR that stores offset for ldd/std
-- instructions
--
-- -- : BFD_RELOC_AVR_6_ADIW
-- This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
-- instructions
--
-- -- : BFD_RELOC_AVR_8_LO
-- This is a 8 bit reloc for the AVR that stores bits 0..7 of a symbol
-- in .byte lo8(symbol)
--
-- -- : BFD_RELOC_AVR_8_HI
-- This is a 8 bit reloc for the AVR that stores bits 8..15 of a
-- symbol in .byte hi8(symbol)
--
-- -- : BFD_RELOC_AVR_8_HLO
-- This is a 8 bit reloc for the AVR that stores bits 16..23 of a
-- symbol in .byte hlo8(symbol)
--
-- -- : BFD_RELOC_RL78_NEG8
-- -- : BFD_RELOC_RL78_NEG16
-- -- : BFD_RELOC_RL78_NEG24
-- -- : BFD_RELOC_RL78_NEG32
-- -- : BFD_RELOC_RL78_16_OP
-- -- : BFD_RELOC_RL78_24_OP
-- -- : BFD_RELOC_RL78_32_OP
-- -- : BFD_RELOC_RL78_8U
-- -- : BFD_RELOC_RL78_16U
-- -- : BFD_RELOC_RL78_24U
-- -- : BFD_RELOC_RL78_DIR3U_PCREL
-- -- : BFD_RELOC_RL78_DIFF
-- -- : BFD_RELOC_RL78_GPRELB
-- -- : BFD_RELOC_RL78_GPRELW
-- -- : BFD_RELOC_RL78_GPRELL
-- -- : BFD_RELOC_RL78_SYM
-- -- : BFD_RELOC_RL78_OP_SUBTRACT
-- -- : BFD_RELOC_RL78_OP_NEG
-- -- : BFD_RELOC_RL78_OP_AND
-- -- : BFD_RELOC_RL78_OP_SHRA
-- -- : BFD_RELOC_RL78_ABS8
-- -- : BFD_RELOC_RL78_ABS16
-- -- : BFD_RELOC_RL78_ABS16_REV
-- -- : BFD_RELOC_RL78_ABS32
-- -- : BFD_RELOC_RL78_ABS32_REV
-- -- : BFD_RELOC_RL78_ABS16U
-- -- : BFD_RELOC_RL78_ABS16UW
-- -- : BFD_RELOC_RL78_ABS16UL
-- -- : BFD_RELOC_RL78_RELAX
-- -- : BFD_RELOC_RL78_HI16
-- -- : BFD_RELOC_RL78_HI8
-- -- : BFD_RELOC_RL78_LO16
-- -- : BFD_RELOC_RL78_CODE
-- Renesas RL78 Relocations.
--
-- -- : BFD_RELOC_RX_NEG8
-- -- : BFD_RELOC_RX_NEG16
-- -- : BFD_RELOC_RX_NEG24
-- -- : BFD_RELOC_RX_NEG32
-- -- : BFD_RELOC_RX_16_OP
-- -- : BFD_RELOC_RX_24_OP
-- -- : BFD_RELOC_RX_32_OP
-- -- : BFD_RELOC_RX_8U
-- -- : BFD_RELOC_RX_16U
-- -- : BFD_RELOC_RX_24U
-- -- : BFD_RELOC_RX_DIR3U_PCREL
-- -- : BFD_RELOC_RX_DIFF
-- -- : BFD_RELOC_RX_GPRELB
-- -- : BFD_RELOC_RX_GPRELW
-- -- : BFD_RELOC_RX_GPRELL
-- -- : BFD_RELOC_RX_SYM
-- -- : BFD_RELOC_RX_OP_SUBTRACT
-- -- : BFD_RELOC_RX_OP_NEG
-- -- : BFD_RELOC_RX_ABS8
-- -- : BFD_RELOC_RX_ABS16
-- -- : BFD_RELOC_RX_ABS16_REV
-- -- : BFD_RELOC_RX_ABS32
-- -- : BFD_RELOC_RX_ABS32_REV
-- -- : BFD_RELOC_RX_ABS16U
-- -- : BFD_RELOC_RX_ABS16UW
-- -- : BFD_RELOC_RX_ABS16UL
-- -- : BFD_RELOC_RX_RELAX
-- Renesas RX Relocations.
--
-- -- : BFD_RELOC_390_12
-- Direct 12 bit.
--
-- -- : BFD_RELOC_390_GOT12
-- 12 bit GOT offset.
--
-- -- : BFD_RELOC_390_PLT32
-- 32 bit PC relative PLT address.
--
-- -- : BFD_RELOC_390_COPY
-- Copy symbol at runtime.
--
-- -- : BFD_RELOC_390_GLOB_DAT
-- Create GOT entry.
--
-- -- : BFD_RELOC_390_JMP_SLOT
-- Create PLT entry.
--
-- -- : BFD_RELOC_390_RELATIVE
-- Adjust by program base.
--
-- -- : BFD_RELOC_390_GOTPC
-- 32 bit PC relative offset to GOT.
--
-- -- : BFD_RELOC_390_GOT16
-- 16 bit GOT offset.
--
-- -- : BFD_RELOC_390_PC12DBL
-- PC relative 12 bit shifted by 1.
--
-- -- : BFD_RELOC_390_PLT12DBL
-- 12 bit PC rel. PLT shifted by 1.
--
-- -- : BFD_RELOC_390_PC16DBL
-- PC relative 16 bit shifted by 1.
--
-- -- : BFD_RELOC_390_PLT16DBL
-- 16 bit PC rel. PLT shifted by 1.
--
-- -- : BFD_RELOC_390_PC24DBL
-- PC relative 24 bit shifted by 1.
--
-- -- : BFD_RELOC_390_PLT24DBL
-- 24 bit PC rel. PLT shifted by 1.
--
-- -- : BFD_RELOC_390_PC32DBL
-- PC relative 32 bit shifted by 1.
--
-- -- : BFD_RELOC_390_PLT32DBL
-- 32 bit PC rel. PLT shifted by 1.
--
-- -- : BFD_RELOC_390_GOTPCDBL
-- 32 bit PC rel. GOT shifted by 1.
--
-- -- : BFD_RELOC_390_GOT64
-- 64 bit GOT offset.
--
-- -- : BFD_RELOC_390_PLT64
-- 64 bit PC relative PLT address.
--
-- -- : BFD_RELOC_390_GOTENT
-- 32 bit rel. offset to GOT entry.
--
-- -- : BFD_RELOC_390_GOTOFF64
-- 64 bit offset to GOT.
--
-- -- : BFD_RELOC_390_GOTPLT12
-- 12-bit offset to symbol-entry within GOT, with PLT handling.
--
-- -- : BFD_RELOC_390_GOTPLT16
-- 16-bit offset to symbol-entry within GOT, with PLT handling.
--
-- -- : BFD_RELOC_390_GOTPLT32
-- 32-bit offset to symbol-entry within GOT, with PLT handling.
--
-- -- : BFD_RELOC_390_GOTPLT64
-- 64-bit offset to symbol-entry within GOT, with PLT handling.
--
-- -- : BFD_RELOC_390_GOTPLTENT
-- 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
--
-- -- : BFD_RELOC_390_PLTOFF16
-- 16-bit rel. offset from the GOT to a PLT entry.
--
-- -- : BFD_RELOC_390_PLTOFF32
-- 32-bit rel. offset from the GOT to a PLT entry.
--
-- -- : BFD_RELOC_390_PLTOFF64
-- 64-bit rel. offset from the GOT to a PLT entry.
--
-- -- : BFD_RELOC_390_TLS_LOAD
-- -- : BFD_RELOC_390_TLS_GDCALL
-- -- : BFD_RELOC_390_TLS_LDCALL
-- -- : BFD_RELOC_390_TLS_GD32
-- -- : BFD_RELOC_390_TLS_GD64
-- -- : BFD_RELOC_390_TLS_GOTIE12
-- -- : BFD_RELOC_390_TLS_GOTIE32
-- -- : BFD_RELOC_390_TLS_GOTIE64
-- -- : BFD_RELOC_390_TLS_LDM32
-- -- : BFD_RELOC_390_TLS_LDM64
-- -- : BFD_RELOC_390_TLS_IE32
-- -- : BFD_RELOC_390_TLS_IE64
-- -- : BFD_RELOC_390_TLS_IEENT
-- -- : BFD_RELOC_390_TLS_LE32
-- -- : BFD_RELOC_390_TLS_LE64
-- -- : BFD_RELOC_390_TLS_LDO32
-- -- : BFD_RELOC_390_TLS_LDO64
-- -- : BFD_RELOC_390_TLS_DTPMOD
-- -- : BFD_RELOC_390_TLS_DTPOFF
-- -- : BFD_RELOC_390_TLS_TPOFF
-- s390 tls relocations.
--
-- -- : BFD_RELOC_390_20
-- -- : BFD_RELOC_390_GOT20
-- -- : BFD_RELOC_390_GOTPLT20
-- -- : BFD_RELOC_390_TLS_GOTIE20
-- Long displacement extension.
--
-- -- : BFD_RELOC_390_IRELATIVE
-- STT_GNU_IFUNC relocation.
--
-- -- : BFD_RELOC_SCORE_GPREL15
-- Score relocations Low 16 bit for load/store
--
-- -- : BFD_RELOC_SCORE_DUMMY2
-- -- : BFD_RELOC_SCORE_JMP
-- This is a 24-bit reloc with the right 1 bit assumed to be 0
--
-- -- : BFD_RELOC_SCORE_BRANCH
-- This is a 19-bit reloc with the right 1 bit assumed to be 0
--
-- -- : BFD_RELOC_SCORE_IMM30
-- This is a 32-bit reloc for 48-bit instructions.
--
-- -- : BFD_RELOC_SCORE_IMM32
-- This is a 32-bit reloc for 48-bit instructions.
--
-- -- : BFD_RELOC_SCORE16_JMP
-- This is a 11-bit reloc with the right 1 bit assumed to be 0
--
-- -- : BFD_RELOC_SCORE16_BRANCH
-- This is a 8-bit reloc with the right 1 bit assumed to be 0
--
-- -- : BFD_RELOC_SCORE_BCMP
-- This is a 9-bit reloc with the right 1 bit assumed to be 0
--
-- -- : BFD_RELOC_SCORE_GOT15
-- -- : BFD_RELOC_SCORE_GOT_LO16
-- -- : BFD_RELOC_SCORE_CALL15
-- -- : BFD_RELOC_SCORE_DUMMY_HI16
-- Undocumented Score relocs
--
-- -- : BFD_RELOC_IP2K_FR9
-- Scenix IP2K - 9-bit register number / data address
--
-- -- : BFD_RELOC_IP2K_BANK
-- Scenix IP2K - 4-bit register/data bank number
--
-- -- : BFD_RELOC_IP2K_ADDR16CJP
-- Scenix IP2K - low 13 bits of instruction word address
--
-- -- : BFD_RELOC_IP2K_PAGE3
-- Scenix IP2K - high 3 bits of instruction word address
--
-- -- : BFD_RELOC_IP2K_LO8DATA
-- -- : BFD_RELOC_IP2K_HI8DATA
-- -- : BFD_RELOC_IP2K_EX8DATA
-- Scenix IP2K - ext/low/high 8 bits of data address
--
-- -- : BFD_RELOC_IP2K_LO8INSN
-- -- : BFD_RELOC_IP2K_HI8INSN
-- Scenix IP2K - low/high 8 bits of instruction word address
--
-- -- : BFD_RELOC_IP2K_PC_SKIP
-- Scenix IP2K - even/odd PC modifier to modify snb pcl.0
--
-- -- : BFD_RELOC_IP2K_TEXT
-- Scenix IP2K - 16 bit word address in text section.
--
-- -- : BFD_RELOC_IP2K_FR_OFFSET
-- Scenix IP2K - 7-bit sp or dp offset
--
-- -- : BFD_RELOC_VPE4KMATH_DATA
-- -- : BFD_RELOC_VPE4KMATH_INSN
-- Scenix VPE4K coprocessor - data/insn-space addressing
--
-- -- : BFD_RELOC_VTABLE_INHERIT
-- -- : BFD_RELOC_VTABLE_ENTRY
-- These two relocations are used by the linker to determine which of
-- the entries in a C++ virtual function table are actually used.
-- When the -gc-sections option is given, the linker will zero out
-- the entries that are not used, so that the code for those
-- functions need not be included in the output.
--
-- VTABLE_INHERIT is a zero-space relocation used to describe to the
-- linker the inheritance tree of a C++ virtual function table. The
-- relocation's symbol should be the parent class' vtable, and the
-- relocation should be located at the child vtable.
--
-- VTABLE_ENTRY is a zero-space relocation that describes the use of a
-- virtual function table entry. The reloc's symbol should refer to
-- the table of the class mentioned in the code. Off of that base,
-- an offset describes the entry that is being used. For Rela hosts,
-- this offset is stored in the reloc's addend. For Rel hosts, we
-- are forced to put this offset in the reloc's section offset.
--
-- -- : BFD_RELOC_IA64_IMM14
-- -- : BFD_RELOC_IA64_IMM22
-- -- : BFD_RELOC_IA64_IMM64
-- -- : BFD_RELOC_IA64_DIR32MSB
-- -- : BFD_RELOC_IA64_DIR32LSB
-- -- : BFD_RELOC_IA64_DIR64MSB
-- -- : BFD_RELOC_IA64_DIR64LSB
-- -- : BFD_RELOC_IA64_GPREL22
-- -- : BFD_RELOC_IA64_GPREL64I
-- -- : BFD_RELOC_IA64_GPREL32MSB
-- -- : BFD_RELOC_IA64_GPREL32LSB
-- -- : BFD_RELOC_IA64_GPREL64MSB
-- -- : BFD_RELOC_IA64_GPREL64LSB
-- -- : BFD_RELOC_IA64_LTOFF22
-- -- : BFD_RELOC_IA64_LTOFF64I
-- -- : BFD_RELOC_IA64_PLTOFF22
-- -- : BFD_RELOC_IA64_PLTOFF64I
-- -- : BFD_RELOC_IA64_PLTOFF64MSB
-- -- : BFD_RELOC_IA64_PLTOFF64LSB
-- -- : BFD_RELOC_IA64_FPTR64I
-- -- : BFD_RELOC_IA64_FPTR32MSB
-- -- : BFD_RELOC_IA64_FPTR32LSB
-- -- : BFD_RELOC_IA64_FPTR64MSB
-- -- : BFD_RELOC_IA64_FPTR64LSB
-- -- : BFD_RELOC_IA64_PCREL21B
-- -- : BFD_RELOC_IA64_PCREL21BI
-- -- : BFD_RELOC_IA64_PCREL21M
-- -- : BFD_RELOC_IA64_PCREL21F
-- -- : BFD_RELOC_IA64_PCREL22
-- -- : BFD_RELOC_IA64_PCREL60B
-- -- : BFD_RELOC_IA64_PCREL64I
-- -- : BFD_RELOC_IA64_PCREL32MSB
-- -- : BFD_RELOC_IA64_PCREL32LSB
-- -- : BFD_RELOC_IA64_PCREL64MSB
-- -- : BFD_RELOC_IA64_PCREL64LSB
-- -- : BFD_RELOC_IA64_LTOFF_FPTR22
-- -- : BFD_RELOC_IA64_LTOFF_FPTR64I
-- -- : BFD_RELOC_IA64_LTOFF_FPTR32MSB
-- -- : BFD_RELOC_IA64_LTOFF_FPTR32LSB
-- -- : BFD_RELOC_IA64_LTOFF_FPTR64MSB
-- -- : BFD_RELOC_IA64_LTOFF_FPTR64LSB
-- -- : BFD_RELOC_IA64_SEGREL32MSB
-- -- : BFD_RELOC_IA64_SEGREL32LSB
-- -- : BFD_RELOC_IA64_SEGREL64MSB
-- -- : BFD_RELOC_IA64_SEGREL64LSB
-- -- : BFD_RELOC_IA64_SECREL32MSB
-- -- : BFD_RELOC_IA64_SECREL32LSB
-- -- : BFD_RELOC_IA64_SECREL64MSB
-- -- : BFD_RELOC_IA64_SECREL64LSB
-- -- : BFD_RELOC_IA64_REL32MSB
-- -- : BFD_RELOC_IA64_REL32LSB
-- -- : BFD_RELOC_IA64_REL64MSB
-- -- : BFD_RELOC_IA64_REL64LSB
-- -- : BFD_RELOC_IA64_LTV32MSB
-- -- : BFD_RELOC_IA64_LTV32LSB
-- -- : BFD_RELOC_IA64_LTV64MSB
-- -- : BFD_RELOC_IA64_LTV64LSB
-- -- : BFD_RELOC_IA64_IPLTMSB
-- -- : BFD_RELOC_IA64_IPLTLSB
-- -- : BFD_RELOC_IA64_COPY
-- -- : BFD_RELOC_IA64_LTOFF22X
-- -- : BFD_RELOC_IA64_LDXMOV
-- -- : BFD_RELOC_IA64_TPREL14
-- -- : BFD_RELOC_IA64_TPREL22
-- -- : BFD_RELOC_IA64_TPREL64I
-- -- : BFD_RELOC_IA64_TPREL64MSB
-- -- : BFD_RELOC_IA64_TPREL64LSB
-- -- : BFD_RELOC_IA64_LTOFF_TPREL22
-- -- : BFD_RELOC_IA64_DTPMOD64MSB
-- -- : BFD_RELOC_IA64_DTPMOD64LSB
-- -- : BFD_RELOC_IA64_LTOFF_DTPMOD22
-- -- : BFD_RELOC_IA64_DTPREL14
-- -- : BFD_RELOC_IA64_DTPREL22
-- -- : BFD_RELOC_IA64_DTPREL64I
-- -- : BFD_RELOC_IA64_DTPREL32MSB
-- -- : BFD_RELOC_IA64_DTPREL32LSB
-- -- : BFD_RELOC_IA64_DTPREL64MSB
-- -- : BFD_RELOC_IA64_DTPREL64LSB
-- -- : BFD_RELOC_IA64_LTOFF_DTPREL22
-- Intel IA64 Relocations.
--
-- -- : BFD_RELOC_M68HC11_HI8
-- Motorola 68HC11 reloc. This is the 8 bit high part of an absolute
-- address.
--
-- -- : BFD_RELOC_M68HC11_LO8
-- Motorola 68HC11 reloc. This is the 8 bit low part of an absolute
-- address.
--
-- -- : BFD_RELOC_M68HC11_3B
-- Motorola 68HC11 reloc. This is the 3 bit of a value.
--
-- -- : BFD_RELOC_M68HC11_RL_JUMP
-- Motorola 68HC11 reloc. This reloc marks the beginning of a
-- jump/call instruction. It is used for linker relaxation to
-- correctly identify beginning of instruction and change some
-- branches to use PC-relative addressing mode.
--
-- -- : BFD_RELOC_M68HC11_RL_GROUP
-- Motorola 68HC11 reloc. This reloc marks a group of several
-- instructions that gcc generates and for which the linker
-- relaxation pass can modify and/or remove some of them.
--
-- -- : BFD_RELOC_M68HC11_LO16
-- Motorola 68HC11 reloc. This is the 16-bit lower part of an
-- address. It is used for 'call' instruction to specify the symbol
-- address without any special transformation (due to memory bank
-- window).
--
-- -- : BFD_RELOC_M68HC11_PAGE
-- Motorola 68HC11 reloc. This is a 8-bit reloc that specifies the
-- page number of an address. It is used by 'call' instruction to
-- specify the page number of the symbol.
--
-- -- : BFD_RELOC_M68HC11_24
-- Motorola 68HC11 reloc. This is a 24-bit reloc that represents the
-- address with a 16-bit value and a 8-bit page number. The symbol
-- address is transformed to follow the 16K memory bank of 68HC12
-- (seen as mapped in the window).
--
-- -- : BFD_RELOC_M68HC12_5B
-- Motorola 68HC12 reloc. This is the 5 bits of a value.
--
-- -- : BFD_RELOC_XGATE_RL_JUMP
-- Freescale XGATE reloc. This reloc marks the beginning of a
-- bra/jal instruction.
--
-- -- : BFD_RELOC_XGATE_RL_GROUP
-- Freescale XGATE reloc. This reloc marks a group of several
-- instructions that gcc generates and for which the linker
-- relaxation pass can modify and/or remove some of them.
--
-- -- : BFD_RELOC_XGATE_LO16
-- Freescale XGATE reloc. This is the 16-bit lower part of an
-- address. It is used for the '16-bit' instructions.
--
-- -- : BFD_RELOC_XGATE_GPAGE
-- Freescale XGATE reloc.
--
-- -- : BFD_RELOC_XGATE_24
-- Freescale XGATE reloc.
--
-- -- : BFD_RELOC_XGATE_PCREL_9
-- Freescale XGATE reloc. This is a 9-bit pc-relative reloc.
--
-- -- : BFD_RELOC_XGATE_PCREL_10
-- Freescale XGATE reloc. This is a 10-bit pc-relative reloc.
--
-- -- : BFD_RELOC_XGATE_IMM8_LO
-- Freescale XGATE reloc. This is the 16-bit lower part of an
-- address. It is used for the '16-bit' instructions.
--
-- -- : BFD_RELOC_XGATE_IMM8_HI
-- Freescale XGATE reloc. This is the 16-bit higher part of an
-- address. It is used for the '16-bit' instructions.
--
-- -- : BFD_RELOC_XGATE_IMM3
-- Freescale XGATE reloc. This is a 3-bit pc-relative reloc.
--
-- -- : BFD_RELOC_XGATE_IMM4
-- Freescale XGATE reloc. This is a 4-bit pc-relative reloc.
--
-- -- : BFD_RELOC_XGATE_IMM5
-- Freescale XGATE reloc. This is a 5-bit pc-relative reloc.
--
-- -- : BFD_RELOC_M68HC12_9B
-- Motorola 68HC12 reloc. This is the 9 bits of a value.
--
-- -- : BFD_RELOC_M68HC12_16B
-- Motorola 68HC12 reloc. This is the 16 bits of a value.
--
-- -- : BFD_RELOC_M68HC12_9_PCREL
-- Motorola 68HC12/XGATE reloc. This is a PCREL9 branch.
--
-- -- : BFD_RELOC_M68HC12_10_PCREL
-- Motorola 68HC12/XGATE reloc. This is a PCREL10 branch.
--
-- -- : BFD_RELOC_M68HC12_LO8XG
-- Motorola 68HC12/XGATE reloc. This is the 8 bit low part of an
-- absolute address and immediately precedes a matching HI8XG part.
--
-- -- : BFD_RELOC_M68HC12_HI8XG
-- Motorola 68HC12/XGATE reloc. This is the 8 bit high part of an
-- absolute address and immediately follows a matching LO8XG part.
--
-- -- : BFD_RELOC_16C_NUM08
-- -- : BFD_RELOC_16C_NUM08_C
-- -- : BFD_RELOC_16C_NUM16
-- -- : BFD_RELOC_16C_NUM16_C
-- -- : BFD_RELOC_16C_NUM32
-- -- : BFD_RELOC_16C_NUM32_C
-- -- : BFD_RELOC_16C_DISP04
-- -- : BFD_RELOC_16C_DISP04_C
-- -- : BFD_RELOC_16C_DISP08
-- -- : BFD_RELOC_16C_DISP08_C
-- -- : BFD_RELOC_16C_DISP16
-- -- : BFD_RELOC_16C_DISP16_C
-- -- : BFD_RELOC_16C_DISP24
-- -- : BFD_RELOC_16C_DISP24_C
-- -- : BFD_RELOC_16C_DISP24a
-- -- : BFD_RELOC_16C_DISP24a_C
-- -- : BFD_RELOC_16C_REG04
-- -- : BFD_RELOC_16C_REG04_C
-- -- : BFD_RELOC_16C_REG04a
-- -- : BFD_RELOC_16C_REG04a_C
-- -- : BFD_RELOC_16C_REG14
-- -- : BFD_RELOC_16C_REG14_C
-- -- : BFD_RELOC_16C_REG16
-- -- : BFD_RELOC_16C_REG16_C
-- -- : BFD_RELOC_16C_REG20
-- -- : BFD_RELOC_16C_REG20_C
-- -- : BFD_RELOC_16C_ABS20
-- -- : BFD_RELOC_16C_ABS20_C
-- -- : BFD_RELOC_16C_ABS24
-- -- : BFD_RELOC_16C_ABS24_C
-- -- : BFD_RELOC_16C_IMM04
-- -- : BFD_RELOC_16C_IMM04_C
-- -- : BFD_RELOC_16C_IMM16
-- -- : BFD_RELOC_16C_IMM16_C
-- -- : BFD_RELOC_16C_IMM20
-- -- : BFD_RELOC_16C_IMM20_C
-- -- : BFD_RELOC_16C_IMM24
-- -- : BFD_RELOC_16C_IMM24_C
-- -- : BFD_RELOC_16C_IMM32
-- -- : BFD_RELOC_16C_IMM32_C
-- NS CR16C Relocations.
--
-- -- : BFD_RELOC_CR16_NUM8
-- -- : BFD_RELOC_CR16_NUM16
-- -- : BFD_RELOC_CR16_NUM32
-- -- : BFD_RELOC_CR16_NUM32a
-- -- : BFD_RELOC_CR16_REGREL0
-- -- : BFD_RELOC_CR16_REGREL4
-- -- : BFD_RELOC_CR16_REGREL4a
-- -- : BFD_RELOC_CR16_REGREL14
-- -- : BFD_RELOC_CR16_REGREL14a
-- -- : BFD_RELOC_CR16_REGREL16
-- -- : BFD_RELOC_CR16_REGREL20
-- -- : BFD_RELOC_CR16_REGREL20a
-- -- : BFD_RELOC_CR16_ABS20
-- -- : BFD_RELOC_CR16_ABS24
-- -- : BFD_RELOC_CR16_IMM4
-- -- : BFD_RELOC_CR16_IMM8
-- -- : BFD_RELOC_CR16_IMM16
-- -- : BFD_RELOC_CR16_IMM20
-- -- : BFD_RELOC_CR16_IMM24
-- -- : BFD_RELOC_CR16_IMM32
-- -- : BFD_RELOC_CR16_IMM32a
-- -- : BFD_RELOC_CR16_DISP4
-- -- : BFD_RELOC_CR16_DISP8
-- -- : BFD_RELOC_CR16_DISP16
-- -- : BFD_RELOC_CR16_DISP20
-- -- : BFD_RELOC_CR16_DISP24
-- -- : BFD_RELOC_CR16_DISP24a
-- -- : BFD_RELOC_CR16_SWITCH8
-- -- : BFD_RELOC_CR16_SWITCH16
-- -- : BFD_RELOC_CR16_SWITCH32
-- -- : BFD_RELOC_CR16_GOT_REGREL20
-- -- : BFD_RELOC_CR16_GOTC_REGREL20
-- -- : BFD_RELOC_CR16_GLOB_DAT
-- NS CR16 Relocations.
--
-- -- : BFD_RELOC_CRX_REL4
-- -- : BFD_RELOC_CRX_REL8
-- -- : BFD_RELOC_CRX_REL8_CMP
-- -- : BFD_RELOC_CRX_REL16
-- -- : BFD_RELOC_CRX_REL24
-- -- : BFD_RELOC_CRX_REL32
-- -- : BFD_RELOC_CRX_REGREL12
-- -- : BFD_RELOC_CRX_REGREL22
-- -- : BFD_RELOC_CRX_REGREL28
-- -- : BFD_RELOC_CRX_REGREL32
-- -- : BFD_RELOC_CRX_ABS16
-- -- : BFD_RELOC_CRX_ABS32
-- -- : BFD_RELOC_CRX_NUM8
-- -- : BFD_RELOC_CRX_NUM16
-- -- : BFD_RELOC_CRX_NUM32
-- -- : BFD_RELOC_CRX_IMM16
-- -- : BFD_RELOC_CRX_IMM32
-- -- : BFD_RELOC_CRX_SWITCH8
-- -- : BFD_RELOC_CRX_SWITCH16
-- -- : BFD_RELOC_CRX_SWITCH32
-- NS CRX Relocations.
--
-- -- : BFD_RELOC_CRIS_BDISP8
-- -- : BFD_RELOC_CRIS_UNSIGNED_5
-- -- : BFD_RELOC_CRIS_SIGNED_6
-- -- : BFD_RELOC_CRIS_UNSIGNED_6
-- -- : BFD_RELOC_CRIS_SIGNED_8
-- -- : BFD_RELOC_CRIS_UNSIGNED_8
-- -- : BFD_RELOC_CRIS_SIGNED_16
-- -- : BFD_RELOC_CRIS_UNSIGNED_16
-- -- : BFD_RELOC_CRIS_LAPCQ_OFFSET
-- -- : BFD_RELOC_CRIS_UNSIGNED_4
-- These relocs are only used within the CRIS assembler. They are not
-- (at present) written to any object files.
--
-- -- : BFD_RELOC_CRIS_COPY
-- -- : BFD_RELOC_CRIS_GLOB_DAT
-- -- : BFD_RELOC_CRIS_JUMP_SLOT
-- -- : BFD_RELOC_CRIS_RELATIVE
-- Relocs used in ELF shared libraries for CRIS.
--
-- -- : BFD_RELOC_CRIS_32_GOT
-- 32-bit offset to symbol-entry within GOT.
--
-- -- : BFD_RELOC_CRIS_16_GOT
-- 16-bit offset to symbol-entry within GOT.
--
-- -- : BFD_RELOC_CRIS_32_GOTPLT
-- 32-bit offset to symbol-entry within GOT, with PLT handling.
--
-- -- : BFD_RELOC_CRIS_16_GOTPLT
-- 16-bit offset to symbol-entry within GOT, with PLT handling.
--
-- -- : BFD_RELOC_CRIS_32_GOTREL
-- 32-bit offset to symbol, relative to GOT.
--
-- -- : BFD_RELOC_CRIS_32_PLT_GOTREL
-- 32-bit offset to symbol with PLT entry, relative to GOT.
--
-- -- : BFD_RELOC_CRIS_32_PLT_PCREL
-- 32-bit offset to symbol with PLT entry, relative to this
-- relocation.
--
-- -- : BFD_RELOC_CRIS_32_GOT_GD
-- -- : BFD_RELOC_CRIS_16_GOT_GD
-- -- : BFD_RELOC_CRIS_32_GD
-- -- : BFD_RELOC_CRIS_DTP
-- -- : BFD_RELOC_CRIS_32_DTPREL
-- -- : BFD_RELOC_CRIS_16_DTPREL
-- -- : BFD_RELOC_CRIS_32_GOT_TPREL
-- -- : BFD_RELOC_CRIS_16_GOT_TPREL
-- -- : BFD_RELOC_CRIS_32_TPREL
-- -- : BFD_RELOC_CRIS_16_TPREL
-- -- : BFD_RELOC_CRIS_DTPMOD
-- -- : BFD_RELOC_CRIS_32_IE
-- Relocs used in TLS code for CRIS.
--
-- -- : BFD_RELOC_860_COPY
-- -- : BFD_RELOC_860_GLOB_DAT
-- -- : BFD_RELOC_860_JUMP_SLOT
-- -- : BFD_RELOC_860_RELATIVE
-- -- : BFD_RELOC_860_PC26
-- -- : BFD_RELOC_860_PLT26
-- -- : BFD_RELOC_860_PC16
-- -- : BFD_RELOC_860_LOW0
-- -- : BFD_RELOC_860_SPLIT0
-- -- : BFD_RELOC_860_LOW1
-- -- : BFD_RELOC_860_SPLIT1
-- -- : BFD_RELOC_860_LOW2
-- -- : BFD_RELOC_860_SPLIT2
-- -- : BFD_RELOC_860_LOW3
-- -- : BFD_RELOC_860_LOGOT0
-- -- : BFD_RELOC_860_SPGOT0
-- -- : BFD_RELOC_860_LOGOT1
-- -- : BFD_RELOC_860_SPGOT1
-- -- : BFD_RELOC_860_LOGOTOFF0
-- -- : BFD_RELOC_860_SPGOTOFF0
-- -- : BFD_RELOC_860_LOGOTOFF1
-- -- : BFD_RELOC_860_SPGOTOFF1
-- -- : BFD_RELOC_860_LOGOTOFF2
-- -- : BFD_RELOC_860_LOGOTOFF3
-- -- : BFD_RELOC_860_LOPC
-- -- : BFD_RELOC_860_HIGHADJ
-- -- : BFD_RELOC_860_HAGOT
-- -- : BFD_RELOC_860_HAGOTOFF
-- -- : BFD_RELOC_860_HAPC
-- -- : BFD_RELOC_860_HIGH
-- -- : BFD_RELOC_860_HIGOT
-- -- : BFD_RELOC_860_HIGOTOFF
-- Intel i860 Relocations.
--
-- -- : BFD_RELOC_OPENRISC_ABS_26
-- -- : BFD_RELOC_OPENRISC_REL_26
-- OpenRISC Relocations.
--
-- -- : BFD_RELOC_H8_DIR16A8
-- -- : BFD_RELOC_H8_DIR16R8
-- -- : BFD_RELOC_H8_DIR24A8
-- -- : BFD_RELOC_H8_DIR24R8
-- -- : BFD_RELOC_H8_DIR32A16
-- -- : BFD_RELOC_H8_DISP32A16
-- H8 elf Relocations.
--
-- -- : BFD_RELOC_XSTORMY16_REL_12
-- -- : BFD_RELOC_XSTORMY16_12
-- -- : BFD_RELOC_XSTORMY16_24
-- -- : BFD_RELOC_XSTORMY16_FPTR16
-- Sony Xstormy16 Relocations.
--
-- -- : BFD_RELOC_RELC
-- Self-describing complex relocations.
--
-- -- : BFD_RELOC_XC16X_PAG
-- -- : BFD_RELOC_XC16X_POF
-- -- : BFD_RELOC_XC16X_SEG
-- -- : BFD_RELOC_XC16X_SOF
-- Infineon Relocations.
--
-- -- : BFD_RELOC_VAX_GLOB_DAT
-- -- : BFD_RELOC_VAX_JMP_SLOT
-- -- : BFD_RELOC_VAX_RELATIVE
-- Relocations used by VAX ELF.
--
-- -- : BFD_RELOC_MT_PC16
-- Morpho MT - 16 bit immediate relocation.
--
-- -- : BFD_RELOC_MT_HI16
-- Morpho MT - Hi 16 bits of an address.
--
-- -- : BFD_RELOC_MT_LO16
-- Morpho MT - Low 16 bits of an address.
--
-- -- : BFD_RELOC_MT_GNU_VTINHERIT
-- Morpho MT - Used to tell the linker which vtable entries are used.
--
-- -- : BFD_RELOC_MT_GNU_VTENTRY
-- Morpho MT - Used to tell the linker which vtable entries are used.
--
-- -- : BFD_RELOC_MT_PCINSN8
-- Morpho MT - 8 bit immediate relocation.
--
-- -- : BFD_RELOC_MSP430_10_PCREL
-- -- : BFD_RELOC_MSP430_16_PCREL
-- -- : BFD_RELOC_MSP430_16
-- -- : BFD_RELOC_MSP430_16_PCREL_BYTE
-- -- : BFD_RELOC_MSP430_16_BYTE
-- -- : BFD_RELOC_MSP430_2X_PCREL
-- -- : BFD_RELOC_MSP430_RL_PCREL
-- -- : BFD_RELOC_MSP430_ABS8
-- -- : BFD_RELOC_MSP430X_PCR20_EXT_SRC
-- -- : BFD_RELOC_MSP430X_PCR20_EXT_DST
-- -- : BFD_RELOC_MSP430X_PCR20_EXT_ODST
-- -- : BFD_RELOC_MSP430X_ABS20_EXT_SRC
-- -- : BFD_RELOC_MSP430X_ABS20_EXT_DST
-- -- : BFD_RELOC_MSP430X_ABS20_EXT_ODST
-- -- : BFD_RELOC_MSP430X_ABS20_ADR_SRC
-- -- : BFD_RELOC_MSP430X_ABS20_ADR_DST
-- -- : BFD_RELOC_MSP430X_PCR16
-- -- : BFD_RELOC_MSP430X_PCR20_CALL
-- -- : BFD_RELOC_MSP430X_ABS16
-- -- : BFD_RELOC_MSP430_ABS_HI16
-- -- : BFD_RELOC_MSP430_PREL31
-- -- : BFD_RELOC_MSP430_SYM_DIFF
-- msp430 specific relocation codes
--
-- -- : BFD_RELOC_NIOS2_S16
-- -- : BFD_RELOC_NIOS2_U16
-- -- : BFD_RELOC_NIOS2_CALL26
-- -- : BFD_RELOC_NIOS2_IMM5
-- -- : BFD_RELOC_NIOS2_CACHE_OPX
-- -- : BFD_RELOC_NIOS2_IMM6
-- -- : BFD_RELOC_NIOS2_IMM8
-- -- : BFD_RELOC_NIOS2_HI16
-- -- : BFD_RELOC_NIOS2_LO16
-- -- : BFD_RELOC_NIOS2_HIADJ16
-- -- : BFD_RELOC_NIOS2_GPREL
-- -- : BFD_RELOC_NIOS2_UJMP
-- -- : BFD_RELOC_NIOS2_CJMP
-- -- : BFD_RELOC_NIOS2_CALLR
-- -- : BFD_RELOC_NIOS2_ALIGN
-- -- : BFD_RELOC_NIOS2_GOT16
-- -- : BFD_RELOC_NIOS2_CALL16
-- -- : BFD_RELOC_NIOS2_GOTOFF_LO
-- -- : BFD_RELOC_NIOS2_GOTOFF_HA
-- -- : BFD_RELOC_NIOS2_PCREL_LO
-- -- : BFD_RELOC_NIOS2_PCREL_HA
-- -- : BFD_RELOC_NIOS2_TLS_GD16
-- -- : BFD_RELOC_NIOS2_TLS_LDM16
-- -- : BFD_RELOC_NIOS2_TLS_LDO16
-- -- : BFD_RELOC_NIOS2_TLS_IE16
-- -- : BFD_RELOC_NIOS2_TLS_LE16
-- -- : BFD_RELOC_NIOS2_TLS_DTPMOD
-- -- : BFD_RELOC_NIOS2_TLS_DTPREL
-- -- : BFD_RELOC_NIOS2_TLS_TPREL
-- -- : BFD_RELOC_NIOS2_COPY
-- -- : BFD_RELOC_NIOS2_GLOB_DAT
-- -- : BFD_RELOC_NIOS2_JUMP_SLOT
-- -- : BFD_RELOC_NIOS2_RELATIVE
-- -- : BFD_RELOC_NIOS2_GOTOFF
-- Relocations used by the Altera Nios II core.
--
-- -- : BFD_RELOC_IQ2000_OFFSET_16
-- -- : BFD_RELOC_IQ2000_OFFSET_21
-- -- : BFD_RELOC_IQ2000_UHI16
-- IQ2000 Relocations.
--
-- -- : BFD_RELOC_XTENSA_RTLD
-- Special Xtensa relocation used only by PLT entries in ELF shared
-- objects to indicate that the runtime linker should set the value
-- to one of its own internal functions or data structures.
--
-- -- : BFD_RELOC_XTENSA_GLOB_DAT
-- -- : BFD_RELOC_XTENSA_JMP_SLOT
-- -- : BFD_RELOC_XTENSA_RELATIVE
-- Xtensa relocations for ELF shared objects.
--
-- -- : BFD_RELOC_XTENSA_PLT
-- Xtensa relocation used in ELF object files for symbols that may
-- require PLT entries. Otherwise, this is just a generic 32-bit
-- relocation.
--
-- -- : BFD_RELOC_XTENSA_DIFF8
-- -- : BFD_RELOC_XTENSA_DIFF16
-- -- : BFD_RELOC_XTENSA_DIFF32
-- Xtensa relocations to mark the difference of two local symbols.
-- These are only needed to support linker relaxation and can be
-- ignored when not relaxing. The field is set to the value of the
-- difference assuming no relaxation. The relocation encodes the
-- position of the first symbol so the linker can determine whether
-- to adjust the field value.
--
-- -- : BFD_RELOC_XTENSA_SLOT0_OP
-- -- : BFD_RELOC_XTENSA_SLOT1_OP
-- -- : BFD_RELOC_XTENSA_SLOT2_OP
-- -- : BFD_RELOC_XTENSA_SLOT3_OP
-- -- : BFD_RELOC_XTENSA_SLOT4_OP
-- -- : BFD_RELOC_XTENSA_SLOT5_OP
-- -- : BFD_RELOC_XTENSA_SLOT6_OP
-- -- : BFD_RELOC_XTENSA_SLOT7_OP
-- -- : BFD_RELOC_XTENSA_SLOT8_OP
-- -- : BFD_RELOC_XTENSA_SLOT9_OP
-- -- : BFD_RELOC_XTENSA_SLOT10_OP
-- -- : BFD_RELOC_XTENSA_SLOT11_OP
-- -- : BFD_RELOC_XTENSA_SLOT12_OP
-- -- : BFD_RELOC_XTENSA_SLOT13_OP
-- -- : BFD_RELOC_XTENSA_SLOT14_OP
-- Generic Xtensa relocations for instruction operands. Only the slot
-- number is encoded in the relocation. The relocation applies to the
-- last PC-relative immediate operand, or if there are no PC-relative
-- immediates, to the last immediate operand.
--
-- -- : BFD_RELOC_XTENSA_SLOT0_ALT
-- -- : BFD_RELOC_XTENSA_SLOT1_ALT
-- -- : BFD_RELOC_XTENSA_SLOT2_ALT
-- -- : BFD_RELOC_XTENSA_SLOT3_ALT
-- -- : BFD_RELOC_XTENSA_SLOT4_ALT
-- -- : BFD_RELOC_XTENSA_SLOT5_ALT
-- -- : BFD_RELOC_XTENSA_SLOT6_ALT
-- -- : BFD_RELOC_XTENSA_SLOT7_ALT
-- -- : BFD_RELOC_XTENSA_SLOT8_ALT
-- -- : BFD_RELOC_XTENSA_SLOT9_ALT
-- -- : BFD_RELOC_XTENSA_SLOT10_ALT
-- -- : BFD_RELOC_XTENSA_SLOT11_ALT
-- -- : BFD_RELOC_XTENSA_SLOT12_ALT
-- -- : BFD_RELOC_XTENSA_SLOT13_ALT
-- -- : BFD_RELOC_XTENSA_SLOT14_ALT
-- Alternate Xtensa relocations. Only the slot is encoded in the
-- relocation. The meaning of these relocations is opcode-specific.
--
-- -- : BFD_RELOC_XTENSA_OP0
-- -- : BFD_RELOC_XTENSA_OP1
-- -- : BFD_RELOC_XTENSA_OP2
-- Xtensa relocations for backward compatibility. These have all been
-- replaced by BFD_RELOC_XTENSA_SLOT0_OP.
--
-- -- : BFD_RELOC_XTENSA_ASM_EXPAND
-- Xtensa relocation to mark that the assembler expanded the
-- instructions from an original target. The expansion size is
-- encoded in the reloc size.
--
-- -- : BFD_RELOC_XTENSA_ASM_SIMPLIFY
-- Xtensa relocation to mark that the linker should simplify
-- assembler-expanded instructions. This is commonly used internally
-- by the linker after analysis of a BFD_RELOC_XTENSA_ASM_EXPAND.
--
-- -- : BFD_RELOC_XTENSA_TLSDESC_FN
-- -- : BFD_RELOC_XTENSA_TLSDESC_ARG
-- -- : BFD_RELOC_XTENSA_TLS_DTPOFF
-- -- : BFD_RELOC_XTENSA_TLS_TPOFF
-- -- : BFD_RELOC_XTENSA_TLS_FUNC
-- -- : BFD_RELOC_XTENSA_TLS_ARG
-- -- : BFD_RELOC_XTENSA_TLS_CALL
-- Xtensa TLS relocations.
--
-- -- : BFD_RELOC_Z80_DISP8
-- 8 bit signed offset in (ix+d) or (iy+d).
--
-- -- : BFD_RELOC_Z8K_DISP7
-- DJNZ offset.
--
-- -- : BFD_RELOC_Z8K_CALLR
-- CALR offset.
--
-- -- : BFD_RELOC_Z8K_IMM4L
-- 4 bit value.
--
-- -- : BFD_RELOC_LM32_CALL
-- -- : BFD_RELOC_LM32_BRANCH
-- -- : BFD_RELOC_LM32_16_GOT
-- -- : BFD_RELOC_LM32_GOTOFF_HI16
-- -- : BFD_RELOC_LM32_GOTOFF_LO16
-- -- : BFD_RELOC_LM32_COPY
-- -- : BFD_RELOC_LM32_GLOB_DAT
-- -- : BFD_RELOC_LM32_JMP_SLOT
-- -- : BFD_RELOC_LM32_RELATIVE
-- Lattice Mico32 relocations.
--
-- -- : BFD_RELOC_MACH_O_SECTDIFF
-- Difference between two section addreses. Must be followed by a
-- BFD_RELOC_MACH_O_PAIR.
--
-- -- : BFD_RELOC_MACH_O_LOCAL_SECTDIFF
-- Like BFD_RELOC_MACH_O_SECTDIFF but with a local symbol.
--
-- -- : BFD_RELOC_MACH_O_PAIR
-- Pair of relocation. Contains the first symbol.
--
-- -- : BFD_RELOC_MACH_O_X86_64_BRANCH32
-- -- : BFD_RELOC_MACH_O_X86_64_BRANCH8
-- PCREL relocations. They are marked as branch to create PLT entry
-- if required.
--
-- -- : BFD_RELOC_MACH_O_X86_64_GOT
-- Used when referencing a GOT entry.
--
-- -- : BFD_RELOC_MACH_O_X86_64_GOT_LOAD
-- Used when loading a GOT entry with movq. It is specially marked
-- so that the linker could optimize the movq to a leaq if possible.
--
-- -- : BFD_RELOC_MACH_O_X86_64_SUBTRACTOR32
-- Symbol will be substracted. Must be followed by a BFD_RELOC_64.
--
-- -- : BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64
-- Symbol will be substracted. Must be followed by a BFD_RELOC_64.
--
-- -- : BFD_RELOC_MACH_O_X86_64_PCREL32_1
-- Same as BFD_RELOC_32_PCREL but with an implicit -1 addend.
--
-- -- : BFD_RELOC_MACH_O_X86_64_PCREL32_2
-- Same as BFD_RELOC_32_PCREL but with an implicit -2 addend.
--
-- -- : BFD_RELOC_MACH_O_X86_64_PCREL32_4
-- Same as BFD_RELOC_32_PCREL but with an implicit -4 addend.
--
-- -- : BFD_RELOC_MICROBLAZE_32_LO
-- This is a 32 bit reloc for the microblaze that stores the low 16
-- bits of a value
--
-- -- : BFD_RELOC_MICROBLAZE_32_LO_PCREL
-- This is a 32 bit pc-relative reloc for the microblaze that stores
-- the low 16 bits of a value
--
-- -- : BFD_RELOC_MICROBLAZE_32_ROSDA
-- This is a 32 bit reloc for the microblaze that stores a value
-- relative to the read-only small data area anchor
--
-- -- : BFD_RELOC_MICROBLAZE_32_RWSDA
-- This is a 32 bit reloc for the microblaze that stores a value
-- relative to the read-write small data area anchor
--
-- -- : BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM
-- This is a 32 bit reloc for the microblaze to handle expressions of
-- the form "Symbol Op Symbol"
--
-- -- : BFD_RELOC_MICROBLAZE_64_NONE
-- This is a 64 bit reloc that stores the 32 bit pc relative value in
-- two words (with an imm instruction). No relocation is done here -
-- only used for relaxing
--
-- -- : BFD_RELOC_MICROBLAZE_64_GOTPC
-- This is a 64 bit reloc that stores the 32 bit pc relative value in
-- two words (with an imm instruction). The relocation is
-- PC-relative GOT offset
--
-- -- : BFD_RELOC_MICROBLAZE_64_GOT
-- This is a 64 bit reloc that stores the 32 bit pc relative value in
-- two words (with an imm instruction). The relocation is GOT offset
--
-- -- : BFD_RELOC_MICROBLAZE_64_PLT
-- This is a 64 bit reloc that stores the 32 bit pc relative value in
-- two words (with an imm instruction). The relocation is
-- PC-relative offset into PLT
--
-- -- : BFD_RELOC_MICROBLAZE_64_GOTOFF
-- This is a 64 bit reloc that stores the 32 bit GOT relative value
-- in two words (with an imm instruction). The relocation is
-- relative offset from _GLOBAL_OFFSET_TABLE_
--
-- -- : BFD_RELOC_MICROBLAZE_32_GOTOFF
-- This is a 32 bit reloc that stores the 32 bit GOT relative value
-- in a word. The relocation is relative offset from
--
-- -- : BFD_RELOC_MICROBLAZE_COPY
-- This is used to tell the dynamic linker to copy the value out of
-- the dynamic object into the runtime process image.
--
-- -- : BFD_RELOC_MICROBLAZE_64_TLS
-- Unused Reloc
--
-- -- : BFD_RELOC_MICROBLAZE_64_TLSGD
-- This is a 64 bit reloc that stores the 32 bit GOT relative value
-- of the GOT TLS GD info entry in two words (with an imm
-- instruction). The relocation is GOT offset.
--
-- -- : BFD_RELOC_MICROBLAZE_64_TLSLD
-- This is a 64 bit reloc that stores the 32 bit GOT relative value
-- of the GOT TLS LD info entry in two words (with an imm
-- instruction). The relocation is GOT offset.
--
-- -- : BFD_RELOC_MICROBLAZE_32_TLSDTPMOD
-- This is a 32 bit reloc that stores the Module ID to GOT(n).
--
-- -- : BFD_RELOC_MICROBLAZE_32_TLSDTPREL
-- This is a 32 bit reloc that stores TLS offset to GOT(n+1).
--
-- -- : BFD_RELOC_MICROBLAZE_64_TLSDTPREL
-- This is a 32 bit reloc for storing TLS offset to two words (uses
-- imm instruction)
--
-- -- : BFD_RELOC_MICROBLAZE_64_TLSGOTTPREL
-- This is a 64 bit reloc that stores 32-bit thread pointer relative
-- offset to two words (uses imm instruction).
--
-- -- : BFD_RELOC_MICROBLAZE_64_TLSTPREL
-- This is a 64 bit reloc that stores 32-bit thread pointer relative
-- offset to two words (uses imm instruction).
--
-- -- : BFD_RELOC_AARCH64_RELOC_START
-- AArch64 pseudo relocation code to mark the start of the AArch64
-- relocation enumerators. N.B. the order of the enumerators is
-- important as several tables in the AArch64 bfd backend are indexed
-- by these enumerators; make sure they are all synced.
--
-- -- : BFD_RELOC_AARCH64_NONE
-- AArch64 null relocation code.
--
-- -- : BFD_RELOC_AARCH64_64
-- -- : BFD_RELOC_AARCH64_32
-- -- : BFD_RELOC_AARCH64_16
-- Basic absolute relocations of N bits. These are equivalent to
-- BFD_RELOC_N and they were added to assist the indexing of the howto
-- table.
--
-- -- : BFD_RELOC_AARCH64_64_PCREL
-- -- : BFD_RELOC_AARCH64_32_PCREL
-- -- : BFD_RELOC_AARCH64_16_PCREL
-- PC-relative relocations. These are equivalent to BFD_RELOC_N_PCREL
-- and they were added to assist the indexing of the howto table.
--
-- -- : BFD_RELOC_AARCH64_MOVW_G0
-- AArch64 MOV[NZK] instruction with most significant bits 0 to 15 of
-- an unsigned address/value.
--
-- -- : BFD_RELOC_AARCH64_MOVW_G0_NC
-- AArch64 MOV[NZK] instruction with less significant bits 0 to 15 of
-- an address/value. No overflow checking.
--
-- -- : BFD_RELOC_AARCH64_MOVW_G1
-- AArch64 MOV[NZK] instruction with most significant bits 16 to 31
-- of an unsigned address/value.
--
-- -- : BFD_RELOC_AARCH64_MOVW_G1_NC
-- AArch64 MOV[NZK] instruction with less significant bits 16 to 31
-- of an address/value. No overflow checking.
--
-- -- : BFD_RELOC_AARCH64_MOVW_G2
-- AArch64 MOV[NZK] instruction with most significant bits 32 to 47
-- of an unsigned address/value.
--
-- -- : BFD_RELOC_AARCH64_MOVW_G2_NC
-- AArch64 MOV[NZK] instruction with less significant bits 32 to 47
-- of an address/value. No overflow checking.
--
-- -- : BFD_RELOC_AARCH64_MOVW_G3
-- AArch64 MOV[NZK] instruction with most signficant bits 48 to 64 of
-- a signed or unsigned address/value.
--
-- -- : BFD_RELOC_AARCH64_MOVW_G0_S
-- AArch64 MOV[NZ] instruction with most significant bits 0 to 15 of
-- a signed value. Changes instruction to MOVZ or MOVN depending on
-- the value's sign.
--
-- -- : BFD_RELOC_AARCH64_MOVW_G1_S
-- AArch64 MOV[NZ] instruction with most significant bits 16 to 31 of
-- a signed value. Changes instruction to MOVZ or MOVN depending on
-- the value's sign.
--
-- -- : BFD_RELOC_AARCH64_MOVW_G2_S
-- AArch64 MOV[NZ] instruction with most significant bits 32 to 47 of
-- a signed value. Changes instruction to MOVZ or MOVN depending on
-- the value's sign.
--
-- -- : BFD_RELOC_AARCH64_LD_LO19_PCREL
-- AArch64 Load Literal instruction, holding a 19 bit pc-relative word
-- offset. The lowest two bits must be zero and are not stored in the
-- instruction, giving a 21 bit signed byte offset.
--
-- -- : BFD_RELOC_AARCH64_ADR_LO21_PCREL
-- AArch64 ADR instruction, holding a simple 21 bit pc-relative byte
-- offset.
--
-- -- : BFD_RELOC_AARCH64_ADR_HI21_PCREL
-- AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
-- offset, giving a 4KB aligned page base address.
--
-- -- : BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL
-- AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
-- offset, giving a 4KB aligned page base address, but with no
-- overflow checking.
--
-- -- : BFD_RELOC_AARCH64_ADD_LO12
-- AArch64 ADD immediate instruction, holding bits 0 to 11 of the
-- address. Used in conjunction with
-- BFD_RELOC_AARCH64_ADR_HI21_PCREL.
--
-- -- : BFD_RELOC_AARCH64_LDST8_LO12
-- AArch64 8-bit load/store instruction, holding bits 0 to 11 of the
-- address. Used in conjunction with
-- BFD_RELOC_AARCH64_ADR_HI21_PCREL.
--
-- -- : BFD_RELOC_AARCH64_TSTBR14
-- AArch64 14 bit pc-relative test bit and branch. The lowest two
-- bits must be zero and are not stored in the instruction, giving a
-- 16 bit signed byte offset.
--
-- -- : BFD_RELOC_AARCH64_BRANCH19
-- AArch64 19 bit pc-relative conditional branch and compare & branch.
-- The lowest two bits must be zero and are not stored in the
-- instruction, giving a 21 bit signed byte offset.
--
-- -- : BFD_RELOC_AARCH64_JUMP26
-- AArch64 26 bit pc-relative unconditional branch. The lowest two
-- bits must be zero and are not stored in the instruction, giving a
-- 28 bit signed byte offset.
--
-- -- : BFD_RELOC_AARCH64_CALL26
-- AArch64 26 bit pc-relative unconditional branch and link. The
-- lowest two bits must be zero and are not stored in the instruction,
-- giving a 28 bit signed byte offset.
--
-- -- : BFD_RELOC_AARCH64_LDST16_LO12
-- AArch64 16-bit load/store instruction, holding bits 0 to 11 of the
-- address. Used in conjunction with
-- BFD_RELOC_AARCH64_ADR_HI21_PCREL.
--
-- -- : BFD_RELOC_AARCH64_LDST32_LO12
-- AArch64 32-bit load/store instruction, holding bits 0 to 11 of the
-- address. Used in conjunction with
-- BFD_RELOC_AARCH64_ADR_HI21_PCREL.
--
-- -- : BFD_RELOC_AARCH64_LDST64_LO12
-- AArch64 64-bit load/store instruction, holding bits 0 to 11 of the
-- address. Used in conjunction with
-- BFD_RELOC_AARCH64_ADR_HI21_PCREL.
--
-- -- : BFD_RELOC_AARCH64_LDST128_LO12
-- AArch64 128-bit load/store instruction, holding bits 0 to 11 of the
-- address. Used in conjunction with
-- BFD_RELOC_AARCH64_ADR_HI21_PCREL.
--
-- -- : BFD_RELOC_AARCH64_GOT_LD_PREL19
-- AArch64 Load Literal instruction, holding a 19 bit PC relative word
-- offset of the global offset table entry for a symbol. The lowest
-- two bits must be zero and are not stored in the instruction,
-- giving a 21 bit signed byte offset. This relocation type requires
-- signed overflow checking.
--
-- -- : BFD_RELOC_AARCH64_ADR_GOT_PAGE
-- Get to the page base of the global offset table entry for a symbol
-- as part of an ADRP instruction using a 21 bit PC relative
-- value.Used in conjunction with BFD_RELOC_AARCH64_LD64_GOT_LO12_NC.
--
-- -- : BFD_RELOC_AARCH64_LD64_GOT_LO12_NC
-- Unsigned 12 bit byte offset for 64 bit load/store from the page of
-- the GOT entry for this symbol. Used in conjunction with
-- BFD_RELOC_AARCH64_ADR_GOTPAGE. Valid in LP64 ABI only.
--
-- -- : BFD_RELOC_AARCH64_LD32_GOT_LO12_NC
-- Unsigned 12 bit byte offset for 32 bit load/store from the page of
-- the GOT entry for this symbol. Used in conjunction with
-- BFD_RELOC_AARCH64_ADR_GOTPAGE. Valid in ILP32 ABI only.
--
-- -- : BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21
-- Get to the page base of the global offset table entry for a symbols
-- tls_index structure as part of an adrp instruction using a 21 bit
-- PC relative value. Used in conjunction with
-- BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC.
--
-- -- : BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC
-- Unsigned 12 bit byte offset to global offset table entry for a
-- symbols tls_index structure. Used in conjunction with
-- BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.
--
-- -- : BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1
-- AArch64 TLS INITIAL EXEC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC
-- AArch64 TLS INITIAL EXEC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
-- AArch64 TLS INITIAL EXEC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC
-- AArch64 TLS INITIAL EXEC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC
-- AArch64 TLS INITIAL EXEC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19
-- AArch64 TLS INITIAL EXEC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
-- AArch64 TLS LOCAL EXEC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
-- AArch64 TLS LOCAL EXEC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
-- AArch64 TLS LOCAL EXEC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0
-- AArch64 TLS LOCAL EXEC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
-- AArch64 TLS LOCAL EXEC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
-- AArch64 TLS LOCAL EXEC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12
-- AArch64 TLS LOCAL EXEC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC
-- AArch64 TLS LOCAL EXEC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSDESC_LD_PREL19
-- AArch64 TLS DESC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21
-- AArch64 TLS DESC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21
-- AArch64 TLS DESC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC
-- AArch64 TLS DESC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
-- AArch64 TLS DESC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC
-- AArch64 TLS DESC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSDESC_OFF_G1
-- AArch64 TLS DESC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC
-- AArch64 TLS DESC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSDESC_LDR
-- AArch64 TLS DESC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSDESC_ADD
-- AArch64 TLS DESC relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSDESC_CALL
-- AArch64 TLS DESC relocation.
--
-- -- : BFD_RELOC_AARCH64_COPY
-- AArch64 TLS relocation.
--
-- -- : BFD_RELOC_AARCH64_GLOB_DAT
-- AArch64 TLS relocation.
--
-- -- : BFD_RELOC_AARCH64_JUMP_SLOT
-- AArch64 TLS relocation.
--
-- -- : BFD_RELOC_AARCH64_RELATIVE
-- AArch64 TLS relocation.
--
-- -- : BFD_RELOC_AARCH64_TLS_DTPMOD
-- AArch64 TLS relocation.
--
-- -- : BFD_RELOC_AARCH64_TLS_DTPREL
-- AArch64 TLS relocation.
--
-- -- : BFD_RELOC_AARCH64_TLS_TPREL
-- AArch64 TLS relocation.
--
-- -- : BFD_RELOC_AARCH64_TLSDESC
-- AArch64 TLS relocation.
--
-- -- : BFD_RELOC_AARCH64_IRELATIVE
-- AArch64 support for STT_GNU_IFUNC.
--
-- -- : BFD_RELOC_AARCH64_RELOC_END
-- AArch64 pseudo relocation code to mark the end of the AArch64
-- relocation enumerators that have direct mapping to ELF reloc codes.
-- There are a few more enumerators after this one; those are mainly
-- used by the AArch64 assembler for the internal fixup or to select
-- one of the above enumerators.
--
-- -- : BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP
-- AArch64 pseudo relocation code to be used internally by the AArch64
-- assembler and not (currently) written to any object files.
--
-- -- : BFD_RELOC_AARCH64_LDST_LO12
-- AArch64 unspecified load/store instruction, holding bits 0 to 11
-- of the address. Used in conjunction with
-- BFD_RELOC_AARCH64_ADR_HI21_PCREL.
--
-- -- : BFD_RELOC_AARCH64_LD_GOT_LO12_NC
-- AArch64 pseudo relocation code to be used internally by the AArch64
-- assembler and not (currently) written to any object files.
--
-- -- : BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC
-- AArch64 pseudo relocation code to be used internally by the AArch64
-- assembler and not (currently) written to any object files.
--
-- -- : BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC
-- AArch64 pseudo relocation code to be used internally by the AArch64
-- assembler and not (currently) written to any object files.
--
-- -- : BFD_RELOC_TILEPRO_COPY
-- -- : BFD_RELOC_TILEPRO_GLOB_DAT
-- -- : BFD_RELOC_TILEPRO_JMP_SLOT
-- -- : BFD_RELOC_TILEPRO_RELATIVE
-- -- : BFD_RELOC_TILEPRO_BROFF_X1
-- -- : BFD_RELOC_TILEPRO_JOFFLONG_X1
-- -- : BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT
-- -- : BFD_RELOC_TILEPRO_IMM8_X0
-- -- : BFD_RELOC_TILEPRO_IMM8_Y0
-- -- : BFD_RELOC_TILEPRO_IMM8_X1
-- -- : BFD_RELOC_TILEPRO_IMM8_Y1
-- -- : BFD_RELOC_TILEPRO_DEST_IMM8_X1
-- -- : BFD_RELOC_TILEPRO_MT_IMM15_X1
-- -- : BFD_RELOC_TILEPRO_MF_IMM15_X1
-- -- : BFD_RELOC_TILEPRO_IMM16_X0
-- -- : BFD_RELOC_TILEPRO_IMM16_X1
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_LO
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_LO
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_HI
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_HI
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_HA
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_HA
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_PCREL
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_PCREL
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_GOT
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_GOT
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA
-- -- : BFD_RELOC_TILEPRO_MMSTART_X0
-- -- : BFD_RELOC_TILEPRO_MMEND_X0
-- -- : BFD_RELOC_TILEPRO_MMSTART_X1
-- -- : BFD_RELOC_TILEPRO_MMEND_X1
-- -- : BFD_RELOC_TILEPRO_SHAMT_X0
-- -- : BFD_RELOC_TILEPRO_SHAMT_X1
-- -- : BFD_RELOC_TILEPRO_SHAMT_Y0
-- -- : BFD_RELOC_TILEPRO_SHAMT_Y1
-- -- : BFD_RELOC_TILEPRO_TLS_GD_CALL
-- -- : BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD
-- -- : BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD
-- -- : BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD
-- -- : BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD
-- -- : BFD_RELOC_TILEPRO_TLS_IE_LOAD
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA
-- -- : BFD_RELOC_TILEPRO_TLS_DTPMOD32
-- -- : BFD_RELOC_TILEPRO_TLS_DTPOFF32
-- -- : BFD_RELOC_TILEPRO_TLS_TPOFF32
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI
-- -- : BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA
-- -- : BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA
-- Tilera TILEPro Relocations.
--
-- -- : BFD_RELOC_TILEGX_HW0
-- -- : BFD_RELOC_TILEGX_HW1
-- -- : BFD_RELOC_TILEGX_HW2
-- -- : BFD_RELOC_TILEGX_HW3
-- -- : BFD_RELOC_TILEGX_HW0_LAST
-- -- : BFD_RELOC_TILEGX_HW1_LAST
-- -- : BFD_RELOC_TILEGX_HW2_LAST
-- -- : BFD_RELOC_TILEGX_COPY
-- -- : BFD_RELOC_TILEGX_GLOB_DAT
-- -- : BFD_RELOC_TILEGX_JMP_SLOT
-- -- : BFD_RELOC_TILEGX_RELATIVE
-- -- : BFD_RELOC_TILEGX_BROFF_X1
-- -- : BFD_RELOC_TILEGX_JUMPOFF_X1
-- -- : BFD_RELOC_TILEGX_JUMPOFF_X1_PLT
-- -- : BFD_RELOC_TILEGX_IMM8_X0
-- -- : BFD_RELOC_TILEGX_IMM8_Y0
-- -- : BFD_RELOC_TILEGX_IMM8_X1
-- -- : BFD_RELOC_TILEGX_IMM8_Y1
-- -- : BFD_RELOC_TILEGX_DEST_IMM8_X1
-- -- : BFD_RELOC_TILEGX_MT_IMM14_X1
-- -- : BFD_RELOC_TILEGX_MF_IMM14_X1
-- -- : BFD_RELOC_TILEGX_MMSTART_X0
-- -- : BFD_RELOC_TILEGX_MMEND_X0
-- -- : BFD_RELOC_TILEGX_SHAMT_X0
-- -- : BFD_RELOC_TILEGX_SHAMT_X1
-- -- : BFD_RELOC_TILEGX_SHAMT_Y0
-- -- : BFD_RELOC_TILEGX_SHAMT_Y1
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW0
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW0
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW1
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW1
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW2
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW2
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW3
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW3
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE
-- -- : BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE
-- -- : BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE
-- -- : BFD_RELOC_TILEGX_TLS_DTPMOD64
-- -- : BFD_RELOC_TILEGX_TLS_DTPOFF64
-- -- : BFD_RELOC_TILEGX_TLS_TPOFF64
-- -- : BFD_RELOC_TILEGX_TLS_DTPMOD32
-- -- : BFD_RELOC_TILEGX_TLS_DTPOFF32
-- -- : BFD_RELOC_TILEGX_TLS_TPOFF32
-- -- : BFD_RELOC_TILEGX_TLS_GD_CALL
-- -- : BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD
-- -- : BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD
-- -- : BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD
-- -- : BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD
-- -- : BFD_RELOC_TILEGX_TLS_IE_LOAD
-- -- : BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD
-- -- : BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD
-- -- : BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD
-- -- : BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD
-- Tilera TILE-Gx Relocations.
--
-- -- : BFD_RELOC_EPIPHANY_SIMM8
-- Adapteva EPIPHANY - 8 bit signed pc-relative displacement
--
-- -- : BFD_RELOC_EPIPHANY_SIMM24
-- Adapteva EPIPHANY - 24 bit signed pc-relative displacement
--
-- -- : BFD_RELOC_EPIPHANY_HIGH
-- Adapteva EPIPHANY - 16 most-significant bits of absolute address
--
-- -- : BFD_RELOC_EPIPHANY_LOW
-- Adapteva EPIPHANY - 16 least-significant bits of absolute address
--
-- -- : BFD_RELOC_EPIPHANY_SIMM11
-- Adapteva EPIPHANY - 11 bit signed number - add/sub immediate
--
-- -- : BFD_RELOC_EPIPHANY_IMM11
-- Adapteva EPIPHANY - 11 bit sign-magnitude number (ld/st
-- displacement)
--
-- -- : BFD_RELOC_EPIPHANY_IMM8
-- Adapteva EPIPHANY - 8 bit immediate for 16 bit mov instruction.
--
--
-- typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
--
--2.10.2.2 `bfd_reloc_type_lookup'
--................................
--
--*Synopsis*
-- reloc_howto_type *bfd_reloc_type_lookup
-- (bfd *abfd, bfd_reloc_code_real_type code);
-- reloc_howto_type *bfd_reloc_name_lookup
-- (bfd *abfd, const char *reloc_name);
-- *Description*
--Return a pointer to a howto structure which, when invoked, will perform
--the relocation CODE on data from the architecture noted.
--
--2.10.2.3 `bfd_default_reloc_type_lookup'
--........................................
--
--*Synopsis*
-- reloc_howto_type *bfd_default_reloc_type_lookup
-- (bfd *abfd, bfd_reloc_code_real_type code);
-- *Description*
--Provides a default relocation lookup routine for any architecture.
--
--2.10.2.4 `bfd_get_reloc_code_name'
--..................................
--
--*Synopsis*
-- const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
-- *Description*
--Provides a printable name for the supplied relocation code. Useful
--mainly for printing error messages.
--
--2.10.2.5 `bfd_generic_relax_section'
--....................................
--
--*Synopsis*
-- bfd_boolean bfd_generic_relax_section
-- (bfd *abfd,
-- asection *section,
-- struct bfd_link_info *,
-- bfd_boolean *);
-- *Description*
--Provides default handling for relaxing for back ends which don't do
--relaxing.
--
--2.10.2.6 `bfd_generic_gc_sections'
--..................................
--
--*Synopsis*
-- bfd_boolean bfd_generic_gc_sections
-- (bfd *, struct bfd_link_info *);
-- *Description*
--Provides default handling for relaxing for back ends which don't do
--section gc - i.e., does nothing.
--
--2.10.2.7 `bfd_generic_lookup_section_flags'
--...........................................
--
--*Synopsis*
-- bfd_boolean bfd_generic_lookup_section_flags
-- (struct bfd_link_info *, struct flag_info *, asection *);
-- *Description*
--Provides default handling for section flags lookup - i.e., does nothing.
--Returns FALSE if the section should be omitted, otherwise TRUE.
--
--2.10.2.8 `bfd_generic_merge_sections'
--.....................................
--
--*Synopsis*
-- bfd_boolean bfd_generic_merge_sections
-- (bfd *, struct bfd_link_info *);
-- *Description*
--Provides default handling for SEC_MERGE section merging for back ends
--which don't have SEC_MERGE support - i.e., does nothing.
--
--2.10.2.9 `bfd_generic_get_relocated_section_contents'
--.....................................................
--
--*Synopsis*
-- bfd_byte *bfd_generic_get_relocated_section_contents
-- (bfd *abfd,
-- struct bfd_link_info *link_info,
-- struct bfd_link_order *link_order,
-- bfd_byte *data,
-- bfd_boolean relocatable,
-- asymbol **symbols);
-- *Description*
--Provides default handling of relocation effort for back ends which
--can't be bothered to do it efficiently.
--
--
--File: bfd.info, Node: Core Files, Next: Targets, Prev: Relocations, Up: BFD front end
--
--2.11 Core files
--===============
--
--2.11.1 Core file functions
----------------------------
--
--*Description*
--These are functions pertaining to core files.
--
--2.11.1.1 `bfd_core_file_failing_command'
--........................................
--
--*Synopsis*
-- const char *bfd_core_file_failing_command (bfd *abfd);
-- *Description*
--Return a read-only string explaining which program was running when it
--failed and produced the core file ABFD.
--
--2.11.1.2 `bfd_core_file_failing_signal'
--.......................................
--
--*Synopsis*
-- int bfd_core_file_failing_signal (bfd *abfd);
-- *Description*
--Returns the signal number which caused the core dump which generated
--the file the BFD ABFD is attached to.
--
--2.11.1.3 `bfd_core_file_pid'
--............................
--
--*Synopsis*
-- int bfd_core_file_pid (bfd *abfd);
-- *Description*
--Returns the PID of the process the core dump the BFD ABFD is attached
--to was generated from.
--
--2.11.1.4 `core_file_matches_executable_p'
--.........................................
--
--*Synopsis*
-- bfd_boolean core_file_matches_executable_p
-- (bfd *core_bfd, bfd *exec_bfd);
-- *Description*
--Return `TRUE' if the core file attached to CORE_BFD was generated by a
--run of the executable file attached to EXEC_BFD, `FALSE' otherwise.
--
--2.11.1.5 `generic_core_file_matches_executable_p'
--.................................................
--
--*Synopsis*
-- bfd_boolean generic_core_file_matches_executable_p
-- (bfd *core_bfd, bfd *exec_bfd);
-- *Description*
--Return TRUE if the core file attached to CORE_BFD was generated by a
--run of the executable file attached to EXEC_BFD. The match is based on
--executable basenames only.
--
-- Note: When not able to determine the core file failing command or
--the executable name, we still return TRUE even though we're not sure
--that core file and executable match. This is to avoid generating a
--false warning in situations where we really don't know whether they
--match or not.
--
--
--File: bfd.info, Node: Targets, Next: Architectures, Prev: Core Files, Up: BFD front end
--
--2.12 Targets
--============
--
--*Description*
--Each port of BFD to a different machine requires the creation of a
--target back end. All the back end provides to the root part of BFD is a
--structure containing pointers to functions which perform certain low
--level operations on files. BFD translates the applications's requests
--through a pointer into calls to the back end routines.
--
-- When a file is opened with `bfd_openr', its format and target are
--unknown. BFD uses various mechanisms to determine how to interpret the
--file. The operations performed are:
--
-- * Create a BFD by calling the internal routine `_bfd_new_bfd', then
-- call `bfd_find_target' with the target string supplied to
-- `bfd_openr' and the new BFD pointer.
--
-- * If a null target string was provided to `bfd_find_target', look up
-- the environment variable `GNUTARGET' and use that as the target
-- string.
--
-- * If the target string is still `NULL', or the target string is
-- `default', then use the first item in the target vector as the
-- target type, and set `target_defaulted' in the BFD to cause
-- `bfd_check_format' to loop through all the targets. *Note
-- bfd_target::. *Note Formats::.
--
-- * Otherwise, inspect the elements in the target vector one by one,
-- until a match on target name is found. When found, use it.
--
-- * Otherwise return the error `bfd_error_invalid_target' to
-- `bfd_openr'.
--
-- * `bfd_openr' attempts to open the file using `bfd_open_file', and
-- returns the BFD.
-- Once the BFD has been opened and the target selected, the file
--format may be determined. This is done by calling `bfd_check_format' on
--the BFD with a suggested format. If `target_defaulted' has been set,
--each possible target type is tried to see if it recognizes the
--specified format. `bfd_check_format' returns `TRUE' when the caller
--guesses right.
--
--* Menu:
--
--* bfd_target::
--
--
--File: bfd.info, Node: bfd_target, Prev: Targets, Up: Targets
--
--2.12.1 bfd_target
-------------------
--
--*Description*
--This structure contains everything that BFD knows about a target. It
--includes things like its byte order, name, and which routines to call
--to do various operations.
--
-- Every BFD points to a target structure with its `xvec' member.
--
-- The macros below are used to dispatch to functions through the
--`bfd_target' vector. They are used in a number of macros further down
--in `bfd.h', and are also used when calling various routines by hand
--inside the BFD implementation. The ARGLIST argument must be
--parenthesized; it contains all the arguments to the called function.
--
-- They make the documentation (more) unpleasant to read, so if someone
--wants to fix this and not break the above, please do.
-- #define BFD_SEND(bfd, message, arglist) \
-- ((*((bfd)->xvec->message)) arglist)
--
-- #ifdef DEBUG_BFD_SEND
-- #undef BFD_SEND
-- #define BFD_SEND(bfd, message, arglist) \
-- (((bfd) && (bfd)->xvec && (bfd)->xvec->message) ? \
-- ((*((bfd)->xvec->message)) arglist) : \
-- (bfd_assert (__FILE__,__LINE__), NULL))
-- #endif
-- For operations which index on the BFD format:
-- #define BFD_SEND_FMT(bfd, message, arglist) \
-- (((bfd)->xvec->message[(int) ((bfd)->format)]) arglist)
--
-- #ifdef DEBUG_BFD_SEND
-- #undef BFD_SEND_FMT
-- #define BFD_SEND_FMT(bfd, message, arglist) \
-- (((bfd) && (bfd)->xvec && (bfd)->xvec->message) ? \
-- (((bfd)->xvec->message[(int) ((bfd)->format)]) arglist) : \
-- (bfd_assert (__FILE__,__LINE__), NULL))
-- #endif
-- This is the structure which defines the type of BFD this is. The
--`xvec' member of the struct `bfd' itself points here. Each module that
--implements access to a different target under BFD, defines one of these.
--
-- FIXME, these names should be rationalised with the names of the
--entry points which call them. Too bad we can't have one macro to define
--them both!
-- enum bfd_flavour
-- {
-- bfd_target_unknown_flavour,
-- bfd_target_aout_flavour,
-- bfd_target_coff_flavour,
-- bfd_target_ecoff_flavour,
-- bfd_target_xcoff_flavour,
-- bfd_target_elf_flavour,
-- bfd_target_ieee_flavour,
-- bfd_target_nlm_flavour,
-- bfd_target_oasys_flavour,
-- bfd_target_tekhex_flavour,
-- bfd_target_srec_flavour,
-- bfd_target_verilog_flavour,
-- bfd_target_ihex_flavour,
-- bfd_target_som_flavour,
-- bfd_target_os9k_flavour,
-- bfd_target_versados_flavour,
-- bfd_target_msdos_flavour,
-- bfd_target_ovax_flavour,
-- bfd_target_evax_flavour,
-- bfd_target_mmo_flavour,
-- bfd_target_mach_o_flavour,
-- bfd_target_pef_flavour,
-- bfd_target_pef_xlib_flavour,
-- bfd_target_sym_flavour
-- };
--
-- enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN };
--
-- /* Forward declaration. */
-- typedef struct bfd_link_info _bfd_link_info;
--
-- /* Forward declaration. */
-- typedef struct flag_info flag_info;
--
-- typedef struct bfd_target
-- {
-- /* Identifies the kind of target, e.g., SunOS4, Ultrix, etc. */
-- char *name;
--
-- /* The "flavour" of a back end is a general indication about
-- the contents of a file. */
-- enum bfd_flavour flavour;
--
-- /* The order of bytes within the data area of a file. */
-- enum bfd_endian byteorder;
--
-- /* The order of bytes within the header parts of a file. */
-- enum bfd_endian header_byteorder;
--
-- /* A mask of all the flags which an executable may have set -
-- from the set `BFD_NO_FLAGS', `HAS_RELOC', ...`D_PAGED'. */
-- flagword object_flags;
--
-- /* A mask of all the flags which a section may have set - from
-- the set `SEC_NO_FLAGS', `SEC_ALLOC', ...`SET_NEVER_LOAD'. */
-- flagword section_flags;
--
-- /* The character normally found at the front of a symbol.
-- (if any), perhaps `_'. */
-- char symbol_leading_char;
--
-- /* The pad character for file names within an archive header. */
-- char ar_pad_char;
--
-- /* The maximum number of characters in an archive header. */
-- unsigned char ar_max_namelen;
--
-- /* How well this target matches, used to select between various
-- possible targets when more than one target matches. */
-- unsigned char match_priority;
--
-- /* Entries for byte swapping for data. These are different from the
-- other entry points, since they don't take a BFD as the first argument.
-- Certain other handlers could do the same. */
-- bfd_uint64_t (*bfd_getx64) (const void *);
-- bfd_int64_t (*bfd_getx_signed_64) (const void *);
-- void (*bfd_putx64) (bfd_uint64_t, void *);
-- bfd_vma (*bfd_getx32) (const void *);
-- bfd_signed_vma (*bfd_getx_signed_32) (const void *);
-- void (*bfd_putx32) (bfd_vma, void *);
-- bfd_vma (*bfd_getx16) (const void *);
-- bfd_signed_vma (*bfd_getx_signed_16) (const void *);
-- void (*bfd_putx16) (bfd_vma, void *);
--
-- /* Byte swapping for the headers. */
-- bfd_uint64_t (*bfd_h_getx64) (const void *);
-- bfd_int64_t (*bfd_h_getx_signed_64) (const void *);
-- void (*bfd_h_putx64) (bfd_uint64_t, void *);
-- bfd_vma (*bfd_h_getx32) (const void *);
-- bfd_signed_vma (*bfd_h_getx_signed_32) (const void *);
-- void (*bfd_h_putx32) (bfd_vma, void *);
-- bfd_vma (*bfd_h_getx16) (const void *);
-- bfd_signed_vma (*bfd_h_getx_signed_16) (const void *);
-- void (*bfd_h_putx16) (bfd_vma, void *);
--
-- /* Format dependent routines: these are vectors of entry points
-- within the target vector structure, one for each format to check. */
--
-- /* Check the format of a file being read. Return a `bfd_target *' or zero. */
-- const struct bfd_target *(*_bfd_check_format[bfd_type_end]) (bfd *);
--
-- /* Set the format of a file being written. */
-- bfd_boolean (*_bfd_set_format[bfd_type_end]) (bfd *);
--
-- /* Write cached information into a file being written, at `bfd_close'. */
-- bfd_boolean (*_bfd_write_contents[bfd_type_end]) (bfd *);
-- The general target vector. These vectors are initialized using the
--BFD_JUMP_TABLE macros.
--
-- /* Generic entry points. */
-- #define BFD_JUMP_TABLE_GENERIC(NAME) \
-- NAME##_close_and_cleanup, \
-- NAME##_bfd_free_cached_info, \
-- NAME##_new_section_hook, \
-- NAME##_get_section_contents, \
-- NAME##_get_section_contents_in_window
--
-- /* Called when the BFD is being closed to do any necessary cleanup. */
-- bfd_boolean (*_close_and_cleanup) (bfd *);
-- /* Ask the BFD to free all cached information. */
-- bfd_boolean (*_bfd_free_cached_info) (bfd *);
-- /* Called when a new section is created. */
-- bfd_boolean (*_new_section_hook) (bfd *, sec_ptr);
-- /* Read the contents of a section. */
-- bfd_boolean (*_bfd_get_section_contents)
-- (bfd *, sec_ptr, void *, file_ptr, bfd_size_type);
-- bfd_boolean (*_bfd_get_section_contents_in_window)
-- (bfd *, sec_ptr, bfd_window *, file_ptr, bfd_size_type);
--
-- /* Entry points to copy private data. */
-- #define BFD_JUMP_TABLE_COPY(NAME) \
-- NAME##_bfd_copy_private_bfd_data, \
-- NAME##_bfd_merge_private_bfd_data, \
-- _bfd_generic_init_private_section_data, \
-- NAME##_bfd_copy_private_section_data, \
-- NAME##_bfd_copy_private_symbol_data, \
-- NAME##_bfd_copy_private_header_data, \
-- NAME##_bfd_set_private_flags, \
-- NAME##_bfd_print_private_bfd_data
--
-- /* Called to copy BFD general private data from one object file
-- to another. */
-- bfd_boolean (*_bfd_copy_private_bfd_data) (bfd *, bfd *);
-- /* Called to merge BFD general private data from one object file
-- to a common output file when linking. */
-- bfd_boolean (*_bfd_merge_private_bfd_data) (bfd *, bfd *);
-- /* Called to initialize BFD private section data from one object file
-- to another. */
-- #define bfd_init_private_section_data(ibfd, isec, obfd, osec, link_info) \
-- BFD_SEND (obfd, _bfd_init_private_section_data, (ibfd, isec, obfd, osec, link_info))
-- bfd_boolean (*_bfd_init_private_section_data)
-- (bfd *, sec_ptr, bfd *, sec_ptr, struct bfd_link_info *);
-- /* Called to copy BFD private section data from one object file
-- to another. */
-- bfd_boolean (*_bfd_copy_private_section_data)
-- (bfd *, sec_ptr, bfd *, sec_ptr);
-- /* Called to copy BFD private symbol data from one symbol
-- to another. */
-- bfd_boolean (*_bfd_copy_private_symbol_data)
-- (bfd *, asymbol *, bfd *, asymbol *);
-- /* Called to copy BFD private header data from one object file
-- to another. */
-- bfd_boolean (*_bfd_copy_private_header_data)
-- (bfd *, bfd *);
-- /* Called to set private backend flags. */
-- bfd_boolean (*_bfd_set_private_flags) (bfd *, flagword);
--
-- /* Called to print private BFD data. */
-- bfd_boolean (*_bfd_print_private_bfd_data) (bfd *, void *);
--
-- /* Core file entry points. */
-- #define BFD_JUMP_TABLE_CORE(NAME) \
-- NAME##_core_file_failing_command, \
-- NAME##_core_file_failing_signal, \
-- NAME##_core_file_matches_executable_p, \
-- NAME##_core_file_pid
--
-- char * (*_core_file_failing_command) (bfd *);
-- int (*_core_file_failing_signal) (bfd *);
-- bfd_boolean (*_core_file_matches_executable_p) (bfd *, bfd *);
-- int (*_core_file_pid) (bfd *);
--
-- /* Archive entry points. */
-- #define BFD_JUMP_TABLE_ARCHIVE(NAME) \
-- NAME##_slurp_armap, \
-- NAME##_slurp_extended_name_table, \
-- NAME##_construct_extended_name_table, \
-- NAME##_truncate_arname, \
-- NAME##_write_armap, \
-- NAME##_read_ar_hdr, \
-- NAME##_write_ar_hdr, \
-- NAME##_openr_next_archived_file, \
-- NAME##_get_elt_at_index, \
-- NAME##_generic_stat_arch_elt, \
-- NAME##_update_armap_timestamp
--
-- bfd_boolean (*_bfd_slurp_armap) (bfd *);
-- bfd_boolean (*_bfd_slurp_extended_name_table) (bfd *);
-- bfd_boolean (*_bfd_construct_extended_name_table)
-- (bfd *, char **, bfd_size_type *, const char **);
-- void (*_bfd_truncate_arname) (bfd *, const char *, char *);
-- bfd_boolean (*write_armap)
-- (bfd *, unsigned int, struct orl *, unsigned int, int);
-- void * (*_bfd_read_ar_hdr_fn) (bfd *);
-- bfd_boolean (*_bfd_write_ar_hdr_fn) (bfd *, bfd *);
-- bfd * (*openr_next_archived_file) (bfd *, bfd *);
-- #define bfd_get_elt_at_index(b,i) BFD_SEND (b, _bfd_get_elt_at_index, (b,i))
-- bfd * (*_bfd_get_elt_at_index) (bfd *, symindex);
-- int (*_bfd_stat_arch_elt) (bfd *, struct stat *);
-- bfd_boolean (*_bfd_update_armap_timestamp) (bfd *);
--
-- /* Entry points used for symbols. */
-- #define BFD_JUMP_TABLE_SYMBOLS(NAME) \
-- NAME##_get_symtab_upper_bound, \
-- NAME##_canonicalize_symtab, \
-- NAME##_make_empty_symbol, \
-- NAME##_print_symbol, \
-- NAME##_get_symbol_info, \
-- NAME##_bfd_is_local_label_name, \
-- NAME##_bfd_is_target_special_symbol, \
-- NAME##_get_lineno, \
-- NAME##_find_nearest_line, \
-- _bfd_generic_find_nearest_line_discriminator, \
-- _bfd_generic_find_line, \
-- NAME##_find_inliner_info, \
-- NAME##_bfd_make_debug_symbol, \
-- NAME##_read_minisymbols, \
-- NAME##_minisymbol_to_symbol
--
-- long (*_bfd_get_symtab_upper_bound) (bfd *);
-- long (*_bfd_canonicalize_symtab)
-- (bfd *, struct bfd_symbol **);
-- struct bfd_symbol *
-- (*_bfd_make_empty_symbol) (bfd *);
-- void (*_bfd_print_symbol)
-- (bfd *, void *, struct bfd_symbol *, bfd_print_symbol_type);
-- #define bfd_print_symbol(b,p,s,e) BFD_SEND (b, _bfd_print_symbol, (b,p,s,e))
-- void (*_bfd_get_symbol_info)
-- (bfd *, struct bfd_symbol *, symbol_info *);
-- #define bfd_get_symbol_info(b,p,e) BFD_SEND (b, _bfd_get_symbol_info, (b,p,e))
-- bfd_boolean (*_bfd_is_local_label_name) (bfd *, const char *);
-- bfd_boolean (*_bfd_is_target_special_symbol) (bfd *, asymbol *);
-- alent * (*_get_lineno) (bfd *, struct bfd_symbol *);
-- bfd_boolean (*_bfd_find_nearest_line)
-- (bfd *, struct bfd_section *, struct bfd_symbol **, bfd_vma,
-- const char **, const char **, unsigned int *);
-- bfd_boolean (*_bfd_find_nearest_line_discriminator)
-- (bfd *, struct bfd_section *, struct bfd_symbol **, bfd_vma,
-- const char **, const char **, unsigned int *, unsigned int *);
-- bfd_boolean (*_bfd_find_line)
-- (bfd *, struct bfd_symbol **, struct bfd_symbol *,
-- const char **, unsigned int *);
-- bfd_boolean (*_bfd_find_inliner_info)
-- (bfd *, const char **, const char **, unsigned int *);
-- /* Back-door to allow format-aware applications to create debug symbols
-- while using BFD for everything else. Currently used by the assembler
-- when creating COFF files. */
-- asymbol * (*_bfd_make_debug_symbol)
-- (bfd *, void *, unsigned long size);
-- #define bfd_read_minisymbols(b, d, m, s) \
-- BFD_SEND (b, _read_minisymbols, (b, d, m, s))
-- long (*_read_minisymbols)
-- (bfd *, bfd_boolean, void **, unsigned int *);
-- #define bfd_minisymbol_to_symbol(b, d, m, f) \
-- BFD_SEND (b, _minisymbol_to_symbol, (b, d, m, f))
-- asymbol * (*_minisymbol_to_symbol)
-- (bfd *, bfd_boolean, const void *, asymbol *);
--
-- /* Routines for relocs. */
-- #define BFD_JUMP_TABLE_RELOCS(NAME) \
-- NAME##_get_reloc_upper_bound, \
-- NAME##_canonicalize_reloc, \
-- NAME##_bfd_reloc_type_lookup, \
-- NAME##_bfd_reloc_name_lookup
--
-- long (*_get_reloc_upper_bound) (bfd *, sec_ptr);
-- long (*_bfd_canonicalize_reloc)
-- (bfd *, sec_ptr, arelent **, struct bfd_symbol **);
-- /* See documentation on reloc types. */
-- reloc_howto_type *
-- (*reloc_type_lookup) (bfd *, bfd_reloc_code_real_type);
-- reloc_howto_type *
-- (*reloc_name_lookup) (bfd *, const char *);
--
--
-- /* Routines used when writing an object file. */
-- #define BFD_JUMP_TABLE_WRITE(NAME) \
-- NAME##_set_arch_mach, \
-- NAME##_set_section_contents
--
-- bfd_boolean (*_bfd_set_arch_mach)
-- (bfd *, enum bfd_architecture, unsigned long);
-- bfd_boolean (*_bfd_set_section_contents)
-- (bfd *, sec_ptr, const void *, file_ptr, bfd_size_type);
--
-- /* Routines used by the linker. */
-- #define BFD_JUMP_TABLE_LINK(NAME) \
-- NAME##_sizeof_headers, \
-- NAME##_bfd_get_relocated_section_contents, \
-- NAME##_bfd_relax_section, \
-- NAME##_bfd_link_hash_table_create, \
-- NAME##_bfd_link_hash_table_free, \
-- NAME##_bfd_link_add_symbols, \
-- NAME##_bfd_link_just_syms, \
-- NAME##_bfd_copy_link_hash_symbol_type, \
-- NAME##_bfd_final_link, \
-- NAME##_bfd_link_split_section, \
-- NAME##_bfd_gc_sections, \
-- NAME##_bfd_lookup_section_flags, \
-- NAME##_bfd_merge_sections, \
-- NAME##_bfd_is_group_section, \
-- NAME##_bfd_discard_group, \
-- NAME##_section_already_linked, \
-- NAME##_bfd_define_common_symbol
--
-- int (*_bfd_sizeof_headers) (bfd *, struct bfd_link_info *);
-- bfd_byte * (*_bfd_get_relocated_section_contents)
-- (bfd *, struct bfd_link_info *, struct bfd_link_order *,
-- bfd_byte *, bfd_boolean, struct bfd_symbol **);
--
-- bfd_boolean (*_bfd_relax_section)
-- (bfd *, struct bfd_section *, struct bfd_link_info *, bfd_boolean *);
--
-- /* Create a hash table for the linker. Different backends store
-- different information in this table. */
-- struct bfd_link_hash_table *
-- (*_bfd_link_hash_table_create) (bfd *);
--
-- /* Release the memory associated with the linker hash table. */
-- void (*_bfd_link_hash_table_free) (struct bfd_link_hash_table *);
--
-- /* Add symbols from this object file into the hash table. */
-- bfd_boolean (*_bfd_link_add_symbols) (bfd *, struct bfd_link_info *);
--
-- /* Indicate that we are only retrieving symbol values from this section. */
-- void (*_bfd_link_just_syms) (asection *, struct bfd_link_info *);
--
-- /* Copy the symbol type of a linker hash table entry. */
-- #define bfd_copy_link_hash_symbol_type(b, t, f) \
-- BFD_SEND (b, _bfd_copy_link_hash_symbol_type, (b, t, f))
-- void (*_bfd_copy_link_hash_symbol_type)
-- (bfd *, struct bfd_link_hash_entry *, struct bfd_link_hash_entry *);
--
-- /* Do a link based on the link_order structures attached to each
-- section of the BFD. */
-- bfd_boolean (*_bfd_final_link) (bfd *, struct bfd_link_info *);
--
-- /* Should this section be split up into smaller pieces during linking. */
-- bfd_boolean (*_bfd_link_split_section) (bfd *, struct bfd_section *);
--
-- /* Remove sections that are not referenced from the output. */
-- bfd_boolean (*_bfd_gc_sections) (bfd *, struct bfd_link_info *);
--
-- /* Sets the bitmask of allowed and disallowed section flags. */
-- bfd_boolean (*_bfd_lookup_section_flags) (struct bfd_link_info *,
-- struct flag_info *,
-- asection *);
--
-- /* Attempt to merge SEC_MERGE sections. */
-- bfd_boolean (*_bfd_merge_sections) (bfd *, struct bfd_link_info *);
--
-- /* Is this section a member of a group? */
-- bfd_boolean (*_bfd_is_group_section) (bfd *, const struct bfd_section *);
--
-- /* Discard members of a group. */
-- bfd_boolean (*_bfd_discard_group) (bfd *, struct bfd_section *);
--
-- /* Check if SEC has been already linked during a reloceatable or
-- final link. */
-- bfd_boolean (*_section_already_linked) (bfd *, asection *,
-- struct bfd_link_info *);
--
-- /* Define a common symbol. */
-- bfd_boolean (*_bfd_define_common_symbol) (bfd *, struct bfd_link_info *,
-- struct bfd_link_hash_entry *);
--
-- /* Routines to handle dynamic symbols and relocs. */
-- #define BFD_JUMP_TABLE_DYNAMIC(NAME) \
-- NAME##_get_dynamic_symtab_upper_bound, \
-- NAME##_canonicalize_dynamic_symtab, \
-- NAME##_get_synthetic_symtab, \
-- NAME##_get_dynamic_reloc_upper_bound, \
-- NAME##_canonicalize_dynamic_reloc
--
-- /* Get the amount of memory required to hold the dynamic symbols. */
-- long (*_bfd_get_dynamic_symtab_upper_bound) (bfd *);
-- /* Read in the dynamic symbols. */
-- long (*_bfd_canonicalize_dynamic_symtab)
-- (bfd *, struct bfd_symbol **);
-- /* Create synthetized symbols. */
-- long (*_bfd_get_synthetic_symtab)
-- (bfd *, long, struct bfd_symbol **, long, struct bfd_symbol **,
-- struct bfd_symbol **);
-- /* Get the amount of memory required to hold the dynamic relocs. */
-- long (*_bfd_get_dynamic_reloc_upper_bound) (bfd *);
-- /* Read in the dynamic relocs. */
-- long (*_bfd_canonicalize_dynamic_reloc)
-- (bfd *, arelent **, struct bfd_symbol **);
-- A pointer to an alternative bfd_target in case the current one is not
--satisfactory. This can happen when the target cpu supports both big
--and little endian code, and target chosen by the linker has the wrong
--endianness. The function open_output() in ld/ldlang.c uses this field
--to find an alternative output format that is suitable.
-- /* Opposite endian version of this target. */
-- const struct bfd_target * alternative_target;
--
-- /* Data for use by back-end routines, which isn't
-- generic enough to belong in this structure. */
-- const void *backend_data;
--
-- } bfd_target;
--
--2.12.1.1 `bfd_set_default_target'
--.................................
--
--*Synopsis*
-- bfd_boolean bfd_set_default_target (const char *name);
-- *Description*
--Set the default target vector to use when recognizing a BFD. This
--takes the name of the target, which may be a BFD target name or a
--configuration triplet.
--
--2.12.1.2 `bfd_find_target'
--..........................
--
--*Synopsis*
-- const bfd_target *bfd_find_target (const char *target_name, bfd *abfd);
-- *Description*
--Return a pointer to the transfer vector for the object target named
--TARGET_NAME. If TARGET_NAME is `NULL', choose the one in the
--environment variable `GNUTARGET'; if that is null or not defined, then
--choose the first entry in the target list. Passing in the string
--"default" or setting the environment variable to "default" will cause
--the first entry in the target list to be returned, and
--"target_defaulted" will be set in the BFD if ABFD isn't `NULL'. This
--causes `bfd_check_format' to loop over all the targets to find the one
--that matches the file being read.
--
--2.12.1.3 `bfd_get_target_info'
--..............................
--
--*Synopsis*
-- const bfd_target *bfd_get_target_info (const char *target_name,
-- bfd *abfd,
-- bfd_boolean *is_bigendian,
-- int *underscoring,
-- const char **def_target_arch);
-- *Description*
--Return a pointer to the transfer vector for the object target named
--TARGET_NAME. If TARGET_NAME is `NULL', choose the one in the
--environment variable `GNUTARGET'; if that is null or not defined, then
--choose the first entry in the target list. Passing in the string
--"default" or setting the environment variable to "default" will cause
--the first entry in the target list to be returned, and
--"target_defaulted" will be set in the BFD if ABFD isn't `NULL'. This
--causes `bfd_check_format' to loop over all the targets to find the one
--that matches the file being read. If IS_BIGENDIAN is not `NULL', then
--set this value to target's endian mode. True for big-endian, FALSE for
--little-endian or for invalid target. If UNDERSCORING is not `NULL',
--then set this value to target's underscoring mode. Zero for
--none-underscoring, -1 for invalid target, else the value of target
--vector's symbol underscoring. If DEF_TARGET_ARCH is not `NULL', then
--set it to the architecture string specified by the target_name.
--
--2.12.1.4 `bfd_target_list'
--..........................
--
--*Synopsis*
-- const char ** bfd_target_list (void);
-- *Description*
--Return a freshly malloced NULL-terminated vector of the names of all
--the valid BFD targets. Do not modify the names.
--
--2.12.1.5 `bfd_seach_for_target'
--...............................
--
--*Synopsis*
-- const bfd_target *bfd_search_for_target
-- (int (*search_func) (const bfd_target *, void *),
-- void *);
-- *Description*
--Return a pointer to the first transfer vector in the list of transfer
--vectors maintained by BFD that produces a non-zero result when passed
--to the function SEARCH_FUNC. The parameter DATA is passed, unexamined,
--to the search function.
--
--
--File: bfd.info, Node: Architectures, Next: Opening and Closing, Prev: Targets, Up: BFD front end
--
--2.13 Architectures
--==================
--
--BFD keeps one atom in a BFD describing the architecture of the data
--attached to the BFD: a pointer to a `bfd_arch_info_type'.
--
-- Pointers to structures can be requested independently of a BFD so
--that an architecture's information can be interrogated without access
--to an open BFD.
--
-- The architecture information is provided by each architecture
--package. The set of default architectures is selected by the macro
--`SELECT_ARCHITECTURES'. This is normally set up in the
--`config/TARGET.mt' file of your choice. If the name is not defined,
--then all the architectures supported are included.
--
-- When BFD starts up, all the architectures are called with an
--initialize method. It is up to the architecture back end to insert as
--many items into the list of architectures as it wants to; generally
--this would be one for each machine and one for the default case (an
--item with a machine field of 0).
--
-- BFD's idea of an architecture is implemented in `archures.c'.
--
--2.13.1 bfd_architecture
-------------------------
--
--*Description*
--This enum gives the object file's CPU architecture, in a global
--sense--i.e., what processor family does it belong to? Another field
--indicates which processor within the family is in use. The machine
--gives a number which distinguishes different versions of the
--architecture, containing, for example, 2 and 3 for Intel i960 KA and
--i960 KB, and 68020 and 68030 for Motorola 68020 and 68030.
-- enum bfd_architecture
-- {
-- bfd_arch_unknown, /* File arch not known. */
-- bfd_arch_obscure, /* Arch known, not one of these. */
-- bfd_arch_m68k, /* Motorola 68xxx */
-- #define bfd_mach_m68000 1
-- #define bfd_mach_m68008 2
-- #define bfd_mach_m68010 3
-- #define bfd_mach_m68020 4
-- #define bfd_mach_m68030 5
-- #define bfd_mach_m68040 6
-- #define bfd_mach_m68060 7
-- #define bfd_mach_cpu32 8
-- #define bfd_mach_fido 9
-- #define bfd_mach_mcf_isa_a_nodiv 10
-- #define bfd_mach_mcf_isa_a 11
-- #define bfd_mach_mcf_isa_a_mac 12
-- #define bfd_mach_mcf_isa_a_emac 13
-- #define bfd_mach_mcf_isa_aplus 14
-- #define bfd_mach_mcf_isa_aplus_mac 15
-- #define bfd_mach_mcf_isa_aplus_emac 16
-- #define bfd_mach_mcf_isa_b_nousp 17
-- #define bfd_mach_mcf_isa_b_nousp_mac 18
-- #define bfd_mach_mcf_isa_b_nousp_emac 19
-- #define bfd_mach_mcf_isa_b 20
-- #define bfd_mach_mcf_isa_b_mac 21
-- #define bfd_mach_mcf_isa_b_emac 22
-- #define bfd_mach_mcf_isa_b_float 23
-- #define bfd_mach_mcf_isa_b_float_mac 24
-- #define bfd_mach_mcf_isa_b_float_emac 25
-- #define bfd_mach_mcf_isa_c 26
-- #define bfd_mach_mcf_isa_c_mac 27
-- #define bfd_mach_mcf_isa_c_emac 28
-- #define bfd_mach_mcf_isa_c_nodiv 29
-- #define bfd_mach_mcf_isa_c_nodiv_mac 30
-- #define bfd_mach_mcf_isa_c_nodiv_emac 31
-- bfd_arch_vax, /* DEC Vax */
-- bfd_arch_i960, /* Intel 960 */
-- /* The order of the following is important.
-- lower number indicates a machine type that
-- only accepts a subset of the instructions
-- available to machines with higher numbers.
-- The exception is the "ca", which is
-- incompatible with all other machines except
-- "core". */
--
-- #define bfd_mach_i960_core 1
-- #define bfd_mach_i960_ka_sa 2
-- #define bfd_mach_i960_kb_sb 3
-- #define bfd_mach_i960_mc 4
-- #define bfd_mach_i960_xa 5
-- #define bfd_mach_i960_ca 6
-- #define bfd_mach_i960_jx 7
-- #define bfd_mach_i960_hx 8
--
-- bfd_arch_or32, /* OpenRISC 32 */
--
-- bfd_arch_sparc, /* SPARC */
-- #define bfd_mach_sparc 1
-- /* The difference between v8plus and v9 is that v9 is a true 64 bit env. */
-- #define bfd_mach_sparc_sparclet 2
-- #define bfd_mach_sparc_sparclite 3
-- #define bfd_mach_sparc_v8plus 4
-- #define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */
-- #define bfd_mach_sparc_sparclite_le 6
-- #define bfd_mach_sparc_v9 7
-- #define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */
-- #define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */
-- #define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */
-- /* Nonzero if MACH has the v9 instruction set. */
-- #define bfd_mach_sparc_v9_p(mach) \
-- ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
-- && (mach) != bfd_mach_sparc_sparclite_le)
-- /* Nonzero if MACH is a 64 bit sparc architecture. */
-- #define bfd_mach_sparc_64bit_p(mach) \
-- ((mach) >= bfd_mach_sparc_v9 && (mach) != bfd_mach_sparc_v8plusb)
-- bfd_arch_spu, /* PowerPC SPU */
-- #define bfd_mach_spu 256
-- bfd_arch_mips, /* MIPS Rxxxx */
-- #define bfd_mach_mips3000 3000
-- #define bfd_mach_mips3900 3900
-- #define bfd_mach_mips4000 4000
-- #define bfd_mach_mips4010 4010
-- #define bfd_mach_mips4100 4100
-- #define bfd_mach_mips4111 4111
-- #define bfd_mach_mips4120 4120
-- #define bfd_mach_mips4300 4300
-- #define bfd_mach_mips4400 4400
-- #define bfd_mach_mips4600 4600
-- #define bfd_mach_mips4650 4650
-- #define bfd_mach_mips5000 5000
-- #define bfd_mach_mips5400 5400
-- #define bfd_mach_mips5500 5500
-- #define bfd_mach_mips5900 5900
-- #define bfd_mach_mips6000 6000
-- #define bfd_mach_mips7000 7000
-- #define bfd_mach_mips8000 8000
-- #define bfd_mach_mips9000 9000
-- #define bfd_mach_mips10000 10000
-- #define bfd_mach_mips12000 12000
-- #define bfd_mach_mips14000 14000
-- #define bfd_mach_mips16000 16000
-- #define bfd_mach_mips16 16
-- #define bfd_mach_mips5 5
-- #define bfd_mach_mips_loongson_2e 3001
-- #define bfd_mach_mips_loongson_2f 3002
-- #define bfd_mach_mips_loongson_3a 3003
-- #define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01 */
-- #define bfd_mach_mips_octeon 6501
-- #define bfd_mach_mips_octeonp 6601
-- #define bfd_mach_mips_octeon2 6502
-- #define bfd_mach_mips_xlr 887682 /* decimal 'XLR' */
-- #define bfd_mach_mipsisa32 32
-- #define bfd_mach_mipsisa32r2 33
-- #define bfd_mach_mipsisa64 64
-- #define bfd_mach_mipsisa64r2 65
-- #define bfd_mach_mips_micromips 96
-- bfd_arch_i386, /* Intel 386 */
-- #define bfd_mach_i386_intel_syntax (1 << 0)
-- #define bfd_mach_i386_i8086 (1 << 1)
-- #define bfd_mach_i386_i386 (1 << 2)
-- #define bfd_mach_x86_64 (1 << 3)
-- #define bfd_mach_x64_32 (1 << 4)
-- #define bfd_mach_i386_i386_intel_syntax (bfd_mach_i386_i386 | bfd_mach_i386_intel_syntax)
-- #define bfd_mach_x86_64_intel_syntax (bfd_mach_x86_64 | bfd_mach_i386_intel_syntax)
-- #define bfd_mach_x64_32_intel_syntax (bfd_mach_x64_32 | bfd_mach_i386_intel_syntax)
-- bfd_arch_l1om, /* Intel L1OM */
-- #define bfd_mach_l1om (1 << 5)
-- #define bfd_mach_l1om_intel_syntax (bfd_mach_l1om | bfd_mach_i386_intel_syntax)
-- bfd_arch_k1om, /* Intel K1OM */
-- #define bfd_mach_k1om (1 << 6)
-- #define bfd_mach_k1om_intel_syntax (bfd_mach_k1om | bfd_mach_i386_intel_syntax)
-- #define bfd_mach_i386_nacl (1 << 7)
-- #define bfd_mach_i386_i386_nacl (bfd_mach_i386_i386 | bfd_mach_i386_nacl)
-- #define bfd_mach_x86_64_nacl (bfd_mach_x86_64 | bfd_mach_i386_nacl)
-- #define bfd_mach_x64_32_nacl (bfd_mach_x64_32 | bfd_mach_i386_nacl)
-- bfd_arch_we32k, /* AT&T WE32xxx */
-- bfd_arch_tahoe, /* CCI/Harris Tahoe */
-- bfd_arch_i860, /* Intel 860 */
-- bfd_arch_i370, /* IBM 360/370 Mainframes */
-- bfd_arch_romp, /* IBM ROMP PC/RT */
-- bfd_arch_convex, /* Convex */
-- bfd_arch_m88k, /* Motorola 88xxx */
-- bfd_arch_m98k, /* Motorola 98xxx */
-- bfd_arch_pyramid, /* Pyramid Technology */
-- bfd_arch_h8300, /* Renesas H8/300 (formerly Hitachi H8/300) */
-- #define bfd_mach_h8300 1
-- #define bfd_mach_h8300h 2
-- #define bfd_mach_h8300s 3
-- #define bfd_mach_h8300hn 4
-- #define bfd_mach_h8300sn 5
-- #define bfd_mach_h8300sx 6
-- #define bfd_mach_h8300sxn 7
-- bfd_arch_pdp11, /* DEC PDP-11 */
-- bfd_arch_plugin,
-- bfd_arch_powerpc, /* PowerPC */
-- #define bfd_mach_ppc 32
-- #define bfd_mach_ppc64 64
-- #define bfd_mach_ppc_403 403
-- #define bfd_mach_ppc_403gc 4030
-- #define bfd_mach_ppc_405 405
-- #define bfd_mach_ppc_505 505
-- #define bfd_mach_ppc_601 601
-- #define bfd_mach_ppc_602 602
-- #define bfd_mach_ppc_603 603
-- #define bfd_mach_ppc_ec603e 6031
-- #define bfd_mach_ppc_604 604
-- #define bfd_mach_ppc_620 620
-- #define bfd_mach_ppc_630 630
-- #define bfd_mach_ppc_750 750
-- #define bfd_mach_ppc_860 860
-- #define bfd_mach_ppc_a35 35
-- #define bfd_mach_ppc_rs64ii 642
-- #define bfd_mach_ppc_rs64iii 643
-- #define bfd_mach_ppc_7400 7400
-- #define bfd_mach_ppc_e500 500
-- #define bfd_mach_ppc_e500mc 5001
-- #define bfd_mach_ppc_e500mc64 5005
-- #define bfd_mach_ppc_e5500 5006
-- #define bfd_mach_ppc_e6500 5007
-- #define bfd_mach_ppc_titan 83
-- #define bfd_mach_ppc_vle 84
-- bfd_arch_rs6000, /* IBM RS/6000 */
-- #define bfd_mach_rs6k 6000
-- #define bfd_mach_rs6k_rs1 6001
-- #define bfd_mach_rs6k_rsc 6003
-- #define bfd_mach_rs6k_rs2 6002
-- bfd_arch_hppa, /* HP PA RISC */
-- #define bfd_mach_hppa10 10
-- #define bfd_mach_hppa11 11
-- #define bfd_mach_hppa20 20
-- #define bfd_mach_hppa20w 25
-- bfd_arch_d10v, /* Mitsubishi D10V */
-- #define bfd_mach_d10v 1
-- #define bfd_mach_d10v_ts2 2
-- #define bfd_mach_d10v_ts3 3
-- bfd_arch_d30v, /* Mitsubishi D30V */
-- bfd_arch_dlx, /* DLX */
-- bfd_arch_m68hc11, /* Motorola 68HC11 */
-- bfd_arch_m68hc12, /* Motorola 68HC12 */
-- #define bfd_mach_m6812_default 0
-- #define bfd_mach_m6812 1
-- #define bfd_mach_m6812s 2
-- bfd_arch_m9s12x, /* Freescale S12X */
-- bfd_arch_m9s12xg, /* Freescale XGATE */
-- bfd_arch_z8k, /* Zilog Z8000 */
-- #define bfd_mach_z8001 1
-- #define bfd_mach_z8002 2
-- bfd_arch_h8500, /* Renesas H8/500 (formerly Hitachi H8/500) */
-- bfd_arch_sh, /* Renesas / SuperH SH (formerly Hitachi SH) */
-- #define bfd_mach_sh 1
-- #define bfd_mach_sh2 0x20
-- #define bfd_mach_sh_dsp 0x2d
-- #define bfd_mach_sh2a 0x2a
-- #define bfd_mach_sh2a_nofpu 0x2b
-- #define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1
-- #define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2
-- #define bfd_mach_sh2a_or_sh4 0x2a3
-- #define bfd_mach_sh2a_or_sh3e 0x2a4
-- #define bfd_mach_sh2e 0x2e
-- #define bfd_mach_sh3 0x30
-- #define bfd_mach_sh3_nommu 0x31
-- #define bfd_mach_sh3_dsp 0x3d
-- #define bfd_mach_sh3e 0x3e
-- #define bfd_mach_sh4 0x40
-- #define bfd_mach_sh4_nofpu 0x41
-- #define bfd_mach_sh4_nommu_nofpu 0x42
-- #define bfd_mach_sh4a 0x4a
-- #define bfd_mach_sh4a_nofpu 0x4b
-- #define bfd_mach_sh4al_dsp 0x4d
-- #define bfd_mach_sh5 0x50
-- bfd_arch_alpha, /* Dec Alpha */
-- #define bfd_mach_alpha_ev4 0x10
-- #define bfd_mach_alpha_ev5 0x20
-- #define bfd_mach_alpha_ev6 0x30
-- bfd_arch_arm, /* Advanced Risc Machines ARM. */
-- #define bfd_mach_arm_unknown 0
-- #define bfd_mach_arm_2 1
-- #define bfd_mach_arm_2a 2
-- #define bfd_mach_arm_3 3
-- #define bfd_mach_arm_3M 4
-- #define bfd_mach_arm_4 5
-- #define bfd_mach_arm_4T 6
-- #define bfd_mach_arm_5 7
-- #define bfd_mach_arm_5T 8
-- #define bfd_mach_arm_5TE 9
-- #define bfd_mach_arm_XScale 10
-- #define bfd_mach_arm_ep9312 11
-- #define bfd_mach_arm_iWMMXt 12
-- #define bfd_mach_arm_iWMMXt2 13
-- bfd_arch_ns32k, /* National Semiconductors ns32000 */
-- bfd_arch_w65, /* WDC 65816 */
-- bfd_arch_tic30, /* Texas Instruments TMS320C30 */
-- bfd_arch_tic4x, /* Texas Instruments TMS320C3X/4X */
-- #define bfd_mach_tic3x 30
-- #define bfd_mach_tic4x 40
-- bfd_arch_tic54x, /* Texas Instruments TMS320C54X */
-- bfd_arch_tic6x, /* Texas Instruments TMS320C6X */
-- bfd_arch_tic80, /* TI TMS320c80 (MVP) */
-- bfd_arch_v850, /* NEC V850 */
-- bfd_arch_v850_rh850,/* NEC V850 (using RH850 ABI) */
-- #define bfd_mach_v850 1
-- #define bfd_mach_v850e 'E'
-- #define bfd_mach_v850e1 '1'
-- #define bfd_mach_v850e2 0x4532
-- #define bfd_mach_v850e2v3 0x45325633
-- #define bfd_mach_v850e3v5 0x45335635 /* ('E'|'3'|'V'|'5') */
-- bfd_arch_arc, /* ARC Cores */
-- #define bfd_mach_arc_5 5
-- #define bfd_mach_arc_6 6
-- #define bfd_mach_arc_7 7
-- #define bfd_mach_arc_8 8
-- bfd_arch_m32c, /* Renesas M16C/M32C. */
-- #define bfd_mach_m16c 0x75
-- #define bfd_mach_m32c 0x78
-- bfd_arch_m32r, /* Renesas M32R (formerly Mitsubishi M32R/D) */
-- #define bfd_mach_m32r 1 /* For backwards compatibility. */
-- #define bfd_mach_m32rx 'x'
-- #define bfd_mach_m32r2 '2'
-- bfd_arch_mn10200, /* Matsushita MN10200 */
-- bfd_arch_mn10300, /* Matsushita MN10300 */
-- #define bfd_mach_mn10300 300
-- #define bfd_mach_am33 330
-- #define bfd_mach_am33_2 332
-- bfd_arch_fr30,
-- #define bfd_mach_fr30 0x46523330
-- bfd_arch_frv,
-- #define bfd_mach_frv 1
-- #define bfd_mach_frvsimple 2
-- #define bfd_mach_fr300 300
-- #define bfd_mach_fr400 400
-- #define bfd_mach_fr450 450
-- #define bfd_mach_frvtomcat 499 /* fr500 prototype */
-- #define bfd_mach_fr500 500
-- #define bfd_mach_fr550 550
-- bfd_arch_moxie, /* The moxie processor */
-- #define bfd_mach_moxie 1
-- bfd_arch_mcore,
-- bfd_arch_mep,
-- #define bfd_mach_mep 1
-- #define bfd_mach_mep_h1 0x6831
-- #define bfd_mach_mep_c5 0x6335
-- bfd_arch_metag,
-- #define bfd_mach_metag 1
-- bfd_arch_ia64, /* HP/Intel ia64 */
-- #define bfd_mach_ia64_elf64 64
-- #define bfd_mach_ia64_elf32 32
-- bfd_arch_ip2k, /* Ubicom IP2K microcontrollers. */
-- #define bfd_mach_ip2022 1
-- #define bfd_mach_ip2022ext 2
-- bfd_arch_iq2000, /* Vitesse IQ2000. */
-- #define bfd_mach_iq2000 1
-- #define bfd_mach_iq10 2
-- bfd_arch_epiphany, /* Adapteva EPIPHANY */
-- #define bfd_mach_epiphany16 1
-- #define bfd_mach_epiphany32 2
-- bfd_arch_mt,
-- #define bfd_mach_ms1 1
-- #define bfd_mach_mrisc2 2
-- #define bfd_mach_ms2 3
-- bfd_arch_pj,
-- bfd_arch_avr, /* Atmel AVR microcontrollers. */
-- #define bfd_mach_avr1 1
-- #define bfd_mach_avr2 2
-- #define bfd_mach_avr25 25
-- #define bfd_mach_avr3 3
-- #define bfd_mach_avr31 31
-- #define bfd_mach_avr35 35
-- #define bfd_mach_avr4 4
-- #define bfd_mach_avr5 5
-- #define bfd_mach_avr51 51
-- #define bfd_mach_avr6 6
-- #define bfd_mach_avrxmega1 101
-- #define bfd_mach_avrxmega2 102
-- #define bfd_mach_avrxmega3 103
-- #define bfd_mach_avrxmega4 104
-- #define bfd_mach_avrxmega5 105
-- #define bfd_mach_avrxmega6 106
-- #define bfd_mach_avrxmega7 107
-- bfd_arch_bfin, /* ADI Blackfin */
-- #define bfd_mach_bfin 1
-- bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */
-- #define bfd_mach_cr16 1
-- bfd_arch_cr16c, /* National Semiconductor CompactRISC. */
-- #define bfd_mach_cr16c 1
-- bfd_arch_crx, /* National Semiconductor CRX. */
-- #define bfd_mach_crx 1
-- bfd_arch_cris, /* Axis CRIS */
-- #define bfd_mach_cris_v0_v10 255
-- #define bfd_mach_cris_v32 32
-- #define bfd_mach_cris_v10_v32 1032
-- bfd_arch_rl78,
-- #define bfd_mach_rl78 0x75
-- bfd_arch_rx, /* Renesas RX. */
-- #define bfd_mach_rx 0x75
-- bfd_arch_s390, /* IBM s390 */
-- #define bfd_mach_s390_31 31
-- #define bfd_mach_s390_64 64
-- bfd_arch_score, /* Sunplus score */
-- #define bfd_mach_score3 3
-- #define bfd_mach_score7 7
-- bfd_arch_openrisc, /* OpenRISC */
-- bfd_arch_mmix, /* Donald Knuth's educational processor. */
-- bfd_arch_xstormy16,
-- #define bfd_mach_xstormy16 1
-- bfd_arch_msp430, /* Texas Instruments MSP430 architecture. */
-- #define bfd_mach_msp11 11
-- #define bfd_mach_msp110 110
-- #define bfd_mach_msp12 12
-- #define bfd_mach_msp13 13
-- #define bfd_mach_msp14 14
-- #define bfd_mach_msp15 15
-- #define bfd_mach_msp16 16
-- #define bfd_mach_msp20 20
-- #define bfd_mach_msp21 21
-- #define bfd_mach_msp22 22
-- #define bfd_mach_msp23 23
-- #define bfd_mach_msp24 24
-- #define bfd_mach_msp26 26
-- #define bfd_mach_msp31 31
-- #define bfd_mach_msp32 32
-- #define bfd_mach_msp33 33
-- #define bfd_mach_msp41 41
-- #define bfd_mach_msp42 42
-- #define bfd_mach_msp43 43
-- #define bfd_mach_msp44 44
-- #define bfd_mach_msp430x 45
-- #define bfd_mach_msp46 46
-- #define bfd_mach_msp47 47
-- #define bfd_mach_msp54 54
-- bfd_arch_xc16x, /* Infineon's XC16X Series. */
-- #define bfd_mach_xc16x 1
-- #define bfd_mach_xc16xl 2
-- #define bfd_mach_xc16xs 3
-- bfd_arch_xgate, /* Freescale XGATE */
-- #define bfd_mach_xgate 1
-- bfd_arch_xtensa, /* Tensilica's Xtensa cores. */
-- #define bfd_mach_xtensa 1
-- bfd_arch_z80,
-- #define bfd_mach_z80strict 1 /* No undocumented opcodes. */
-- #define bfd_mach_z80 3 /* With ixl, ixh, iyl, and iyh. */
-- #define bfd_mach_z80full 7 /* All undocumented instructions. */
-- #define bfd_mach_r800 11 /* R800: successor with multiplication. */
-- bfd_arch_lm32, /* Lattice Mico32 */
-- #define bfd_mach_lm32 1
-- bfd_arch_microblaze,/* Xilinx MicroBlaze. */
-- bfd_arch_tilepro, /* Tilera TILEPro */
-- bfd_arch_tilegx, /* Tilera TILE-Gx */
-- #define bfd_mach_tilepro 1
-- #define bfd_mach_tilegx 1
-- #define bfd_mach_tilegx32 2
-- bfd_arch_aarch64, /* AArch64 */
-- #define bfd_mach_aarch64 0
-- #define bfd_mach_aarch64_ilp32 32
-- bfd_arch_nios2,
-- #define bfd_mach_nios2 0
-- bfd_arch_last
-- };
--
--2.13.2 bfd_arch_info
----------------------
--
--*Description*
--This structure contains information on architectures for use within BFD.
--
-- typedef struct bfd_arch_info
-- {
-- int bits_per_word;
-- int bits_per_address;
-- int bits_per_byte;
-- enum bfd_architecture arch;
-- unsigned long mach;
-- const char *arch_name;
-- const char *printable_name;
-- unsigned int section_align_power;
-- /* TRUE if this is the default machine for the architecture.
-- The default arch should be the first entry for an arch so that
-- all the entries for that arch can be accessed via `next'. */
-- bfd_boolean the_default;
-- const struct bfd_arch_info * (*compatible)
-- (const struct bfd_arch_info *a, const struct bfd_arch_info *b);
--
-- bfd_boolean (*scan) (const struct bfd_arch_info *, const char *);
--
-- /* Allocate via bfd_malloc and return a fill buffer of size COUNT. If
-- IS_BIGENDIAN is TRUE, the order of bytes is big endian. If CODE is
-- TRUE, the buffer contains code. */
-- void *(*fill) (bfd_size_type count, bfd_boolean is_bigendian,
-- bfd_boolean code);
--
-- const struct bfd_arch_info *next;
-- }
-- bfd_arch_info_type;
--
--2.13.2.1 `bfd_printable_name'
--.............................
--
--*Synopsis*
-- const char *bfd_printable_name (bfd *abfd);
-- *Description*
--Return a printable string representing the architecture and machine
--from the pointer to the architecture info structure.
--
--2.13.2.2 `bfd_scan_arch'
--........................
--
--*Synopsis*
-- const bfd_arch_info_type *bfd_scan_arch (const char *string);
-- *Description*
--Figure out if BFD supports any cpu which could be described with the
--name STRING. Return a pointer to an `arch_info' structure if a machine
--is found, otherwise NULL.
--
--2.13.2.3 `bfd_arch_list'
--........................
--
--*Synopsis*
-- const char **bfd_arch_list (void);
-- *Description*
--Return a freshly malloced NULL-terminated vector of the names of all
--the valid BFD architectures. Do not modify the names.
--
--2.13.2.4 `bfd_arch_get_compatible'
--..................................
--
--*Synopsis*
-- const bfd_arch_info_type *bfd_arch_get_compatible
-- (const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns);
-- *Description*
--Determine whether two BFDs' architectures and machine types are
--compatible. Calculates the lowest common denominator between the two
--architectures and machine types implied by the BFDs and returns a
--pointer to an `arch_info' structure describing the compatible machine.
--
--2.13.2.5 `bfd_default_arch_struct'
--..................................
--
--*Description*
--The `bfd_default_arch_struct' is an item of `bfd_arch_info_type' which
--has been initialized to a fairly generic state. A BFD starts life by
--pointing to this structure, until the correct back end has determined
--the real architecture of the file.
-- extern const bfd_arch_info_type bfd_default_arch_struct;
--
--2.13.2.6 `bfd_set_arch_info'
--............................
--
--*Synopsis*
-- void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg);
-- *Description*
--Set the architecture info of ABFD to ARG.
--
--2.13.2.7 `bfd_default_set_arch_mach'
--....................................
--
--*Synopsis*
-- bfd_boolean bfd_default_set_arch_mach
-- (bfd *abfd, enum bfd_architecture arch, unsigned long mach);
-- *Description*
--Set the architecture and machine type in BFD ABFD to ARCH and MACH.
--Find the correct pointer to a structure and insert it into the
--`arch_info' pointer.
--
--2.13.2.8 `bfd_get_arch'
--.......................
--
--*Synopsis*
-- enum bfd_architecture bfd_get_arch (bfd *abfd);
-- *Description*
--Return the enumerated type which describes the BFD ABFD's architecture.
--
--2.13.2.9 `bfd_get_mach'
--.......................
--
--*Synopsis*
-- unsigned long bfd_get_mach (bfd *abfd);
-- *Description*
--Return the long type which describes the BFD ABFD's machine.
--
--2.13.2.10 `bfd_arch_bits_per_byte'
--..................................
--
--*Synopsis*
-- unsigned int bfd_arch_bits_per_byte (bfd *abfd);
-- *Description*
--Return the number of bits in one of the BFD ABFD's architecture's bytes.
--
--2.13.2.11 `bfd_arch_bits_per_address'
--.....................................
--
--*Synopsis*
-- unsigned int bfd_arch_bits_per_address (bfd *abfd);
-- *Description*
--Return the number of bits in one of the BFD ABFD's architecture's
--addresses.
--
--2.13.2.12 `bfd_default_compatible'
--..................................
--
--*Synopsis*
-- const bfd_arch_info_type *bfd_default_compatible
-- (const bfd_arch_info_type *a, const bfd_arch_info_type *b);
-- *Description*
--The default function for testing for compatibility.
--
--2.13.2.13 `bfd_default_scan'
--............................
--
--*Synopsis*
-- bfd_boolean bfd_default_scan
-- (const struct bfd_arch_info *info, const char *string);
-- *Description*
--The default function for working out whether this is an architecture
--hit and a machine hit.
--
--2.13.2.14 `bfd_get_arch_info'
--.............................
--
--*Synopsis*
-- const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd);
-- *Description*
--Return the architecture info struct in ABFD.
--
--2.13.2.15 `bfd_lookup_arch'
--...........................
--
--*Synopsis*
-- const bfd_arch_info_type *bfd_lookup_arch
-- (enum bfd_architecture arch, unsigned long machine);
-- *Description*
--Look for the architecture info structure which matches the arguments
--ARCH and MACHINE. A machine of 0 matches the machine/architecture
--structure which marks itself as the default.
--
--2.13.2.16 `bfd_printable_arch_mach'
--...................................
--
--*Synopsis*
-- const char *bfd_printable_arch_mach
-- (enum bfd_architecture arch, unsigned long machine);
-- *Description*
--Return a printable string representing the architecture and machine
--type.
--
-- This routine is depreciated.
--
--2.13.2.17 `bfd_octets_per_byte'
--...............................
--
--*Synopsis*
-- unsigned int bfd_octets_per_byte (bfd *abfd);
-- *Description*
--Return the number of octets (8-bit quantities) per target byte (minimum
--addressable unit). In most cases, this will be one, but some DSP
--targets have 16, 32, or even 48 bits per byte.
--
--2.13.2.18 `bfd_arch_mach_octets_per_byte'
--.........................................
--
--*Synopsis*
-- unsigned int bfd_arch_mach_octets_per_byte
-- (enum bfd_architecture arch, unsigned long machine);
-- *Description*
--See bfd_octets_per_byte.
--
-- This routine is provided for those cases where a bfd * is not
--available
--
--2.13.2.19 `bfd_arch_default_fill'
--.................................
--
--*Synopsis*
-- void *bfd_arch_default_fill (bfd_size_type count,
-- bfd_boolean is_bigendian,
-- bfd_boolean code);
-- *Description*
--Allocate via bfd_malloc and return a fill buffer of size COUNT. If
--IS_BIGENDIAN is TRUE, the order of bytes is big endian. If CODE is
--TRUE, the buffer contains code.
--
--
--File: bfd.info, Node: Opening and Closing, Next: Internal, Prev: Architectures, Up: BFD front end
--
-- /* Set to N to open the next N BFDs using an alternate id space. */
-- extern unsigned int bfd_use_reserved_id;
--
--2.14 Opening and closing BFDs
--=============================
--
--2.14.1 Functions for opening and closing
------------------------------------------
--
--2.14.1.1 `bfd_fopen'
--....................
--
--*Synopsis*
-- bfd *bfd_fopen (const char *filename, const char *target,
-- const char *mode, int fd);
-- *Description*
--Open the file FILENAME with the target TARGET. Return a pointer to the
--created BFD. If FD is not -1, then `fdopen' is used to open the file;
--otherwise, `fopen' is used. MODE is passed directly to `fopen' or
--`fdopen'.
--
-- Calls `bfd_find_target', so TARGET is interpreted as by that
--function.
--
-- The new BFD is marked as cacheable iff FD is -1.
--
-- If `NULL' is returned then an error has occured. Possible errors
--are `bfd_error_no_memory', `bfd_error_invalid_target' or `system_call'
--error.
--
-- On error, FD is always closed.
--
--2.14.1.2 `bfd_openr'
--....................
--
--*Synopsis*
-- bfd *bfd_openr (const char *filename, const char *target);
-- *Description*
--Open the file FILENAME (using `fopen') with the target TARGET. Return
--a pointer to the created BFD.
--
-- Calls `bfd_find_target', so TARGET is interpreted as by that
--function.
--
-- If `NULL' is returned then an error has occured. Possible errors
--are `bfd_error_no_memory', `bfd_error_invalid_target' or `system_call'
--error.
--
--2.14.1.3 `bfd_fdopenr'
--......................
--
--*Synopsis*
-- bfd *bfd_fdopenr (const char *filename, const char *target, int fd);
-- *Description*
--`bfd_fdopenr' is to `bfd_fopenr' much like `fdopen' is to `fopen'. It
--opens a BFD on a file already described by the FD supplied.
--
-- When the file is later `bfd_close'd, the file descriptor will be
--closed. If the caller desires that this file descriptor be cached by
--BFD (opened as needed, closed as needed to free descriptors for other
--opens), with the supplied FD used as an initial file descriptor (but
--subject to closure at any time), call bfd_set_cacheable(bfd, 1) on the
--returned BFD. The default is to assume no caching; the file descriptor
--will remain open until `bfd_close', and will not be affected by BFD
--operations on other files.
--
-- Possible errors are `bfd_error_no_memory',
--`bfd_error_invalid_target' and `bfd_error_system_call'.
--
-- On error, FD is closed.
--
--2.14.1.4 `bfd_openstreamr'
--..........................
--
--*Synopsis*
-- bfd *bfd_openstreamr (const char *, const char *, void *);
-- *Description*
--Open a BFD for read access on an existing stdio stream. When the BFD
--is passed to `bfd_close', the stream will be closed.
--
--2.14.1.5 `bfd_openr_iovec'
--..........................
--
--*Synopsis*
-- bfd *bfd_openr_iovec (const char *filename, const char *target,
-- void *(*open_func) (struct bfd *nbfd,
-- void *open_closure),
-- void *open_closure,
-- file_ptr (*pread_func) (struct bfd *nbfd,
-- void *stream,
-- void *buf,
-- file_ptr nbytes,
-- file_ptr offset),
-- int (*close_func) (struct bfd *nbfd,
-- void *stream),
-- int (*stat_func) (struct bfd *abfd,
-- void *stream,
-- struct stat *sb));
-- *Description*
--Create and return a BFD backed by a read-only STREAM. The STREAM is
--created using OPEN_FUNC, accessed using PREAD_FUNC and destroyed using
--CLOSE_FUNC.
--
-- Calls `bfd_find_target', so TARGET is interpreted as by that
--function.
--
-- Calls OPEN_FUNC (which can call `bfd_zalloc' and `bfd_get_filename')
--to obtain the read-only stream backing the BFD. OPEN_FUNC either
--succeeds returning the non-`NULL' STREAM, or fails returning `NULL'
--(setting `bfd_error').
--
-- Calls PREAD_FUNC to request NBYTES of data from STREAM starting at
--OFFSET (e.g., via a call to `bfd_read'). PREAD_FUNC either succeeds
--returning the number of bytes read (which can be less than NBYTES when
--end-of-file), or fails returning -1 (setting `bfd_error').
--
-- Calls CLOSE_FUNC when the BFD is later closed using `bfd_close'.
--CLOSE_FUNC either succeeds returning 0, or fails returning -1 (setting
--`bfd_error').
--
-- Calls STAT_FUNC to fill in a stat structure for bfd_stat,
--bfd_get_size, and bfd_get_mtime calls. STAT_FUNC returns 0 on success,
--or returns -1 on failure (setting `bfd_error').
--
-- If `bfd_openr_iovec' returns `NULL' then an error has occurred.
--Possible errors are `bfd_error_no_memory', `bfd_error_invalid_target'
--and `bfd_error_system_call'.
--
--2.14.1.6 `bfd_openw'
--....................
--
--*Synopsis*
-- bfd *bfd_openw (const char *filename, const char *target);
-- *Description*
--Create a BFD, associated with file FILENAME, using the file format
--TARGET, and return a pointer to it.
--
-- Possible errors are `bfd_error_system_call', `bfd_error_no_memory',
--`bfd_error_invalid_target'.
--
--2.14.1.7 `bfd_close'
--....................
--
--*Synopsis*
-- bfd_boolean bfd_close (bfd *abfd);
-- *Description*
--Close a BFD. If the BFD was open for writing, then pending operations
--are completed and the file written out and closed. If the created file
--is executable, then `chmod' is called to mark it as such.
--
-- All memory attached to the BFD is released.
--
-- The file descriptor associated with the BFD is closed (even if it
--was passed in to BFD by `bfd_fdopenr').
--
-- *Returns*
--`TRUE' is returned if all is ok, otherwise `FALSE'.
--
--2.14.1.8 `bfd_close_all_done'
--.............................
--
--*Synopsis*
-- bfd_boolean bfd_close_all_done (bfd *);
-- *Description*
--Close a BFD. Differs from `bfd_close' since it does not complete any
--pending operations. This routine would be used if the application had
--just used BFD for swapping and didn't want to use any of the writing
--code.
--
-- If the created file is executable, then `chmod' is called to mark it
--as such.
--
-- All memory attached to the BFD is released.
--
-- *Returns*
--`TRUE' is returned if all is ok, otherwise `FALSE'.
--
--2.14.1.9 `bfd_create'
--.....................
--
--*Synopsis*
-- bfd *bfd_create (const char *filename, bfd *templ);
-- *Description*
--Create a new BFD in the manner of `bfd_openw', but without opening a
--file. The new BFD takes the target from the target used by TEMPL. The
--format is always set to `bfd_object'.
--
--2.14.1.10 `bfd_make_writable'
--.............................
--
--*Synopsis*
-- bfd_boolean bfd_make_writable (bfd *abfd);
-- *Description*
--Takes a BFD as created by `bfd_create' and converts it into one like as
--returned by `bfd_openw'. It does this by converting the BFD to
--BFD_IN_MEMORY. It's assumed that you will call `bfd_make_readable' on
--this bfd later.
--
-- *Returns*
--`TRUE' is returned if all is ok, otherwise `FALSE'.
--
--2.14.1.11 `bfd_make_readable'
--.............................
--
--*Synopsis*
-- bfd_boolean bfd_make_readable (bfd *abfd);
-- *Description*
--Takes a BFD as created by `bfd_create' and `bfd_make_writable' and
--converts it into one like as returned by `bfd_openr'. It does this by
--writing the contents out to the memory buffer, then reversing the
--direction.
--
-- *Returns*
--`TRUE' is returned if all is ok, otherwise `FALSE'.
--
--2.14.1.12 `bfd_alloc'
--.....................
--
--*Synopsis*
-- void *bfd_alloc (bfd *abfd, bfd_size_type wanted);
-- *Description*
--Allocate a block of WANTED bytes of memory attached to `abfd' and
--return a pointer to it.
--
--2.14.1.13 `bfd_alloc2'
--......................
--
--*Synopsis*
-- void *bfd_alloc2 (bfd *abfd, bfd_size_type nmemb, bfd_size_type size);
-- *Description*
--Allocate a block of NMEMB elements of SIZE bytes each of memory
--attached to `abfd' and return a pointer to it.
--
--2.14.1.14 `bfd_zalloc'
--......................
--
--*Synopsis*
-- void *bfd_zalloc (bfd *abfd, bfd_size_type wanted);
-- *Description*
--Allocate a block of WANTED bytes of zeroed memory attached to `abfd'
--and return a pointer to it.
--
--2.14.1.15 `bfd_zalloc2'
--.......................
--
--*Synopsis*
-- void *bfd_zalloc2 (bfd *abfd, bfd_size_type nmemb, bfd_size_type size);
-- *Description*
--Allocate a block of NMEMB elements of SIZE bytes each of zeroed memory
--attached to `abfd' and return a pointer to it.
--
--2.14.1.16 `bfd_calc_gnu_debuglink_crc32'
--........................................
--
--*Synopsis*
-- unsigned long bfd_calc_gnu_debuglink_crc32
-- (unsigned long crc, const unsigned char *buf, bfd_size_type len);
-- *Description*
--Computes a CRC value as used in the .gnu_debuglink section. Advances
--the previously computed CRC value by computing and adding in the crc32
--for LEN bytes of BUF.
--
-- *Returns*
--Return the updated CRC32 value.
--
--2.14.1.17 `bfd_get_debug_link_info'
--...................................
--
--*Synopsis*
-- char *bfd_get_debug_link_info (bfd *abfd, unsigned long *crc32_out);
-- *Description*
--fetch the filename and CRC32 value for any separate debuginfo
--associated with ABFD. Return NULL if no such info found, otherwise
--return filename and update CRC32_OUT. The returned filename is
--allocated with `malloc'; freeing it is the responsibility of the caller.
--
--2.14.1.18 `bfd_get_alt_debug_link_info'
--.......................................
--
--*Synopsis*
-- char *bfd_get_alt_debug_link_info (bfd *abfd, unsigned long *crc32_out);
-- *Description*
--Fetch the filename and BuildID value for any alternate debuginfo
--associated with ABFD. Return NULL if no such info found, otherwise
--return filename and update BUILDID_OUT. The returned filename is
--allocated with `malloc'; freeing it is the responsibility of the caller.
--
--2.14.1.19 `separate_debug_file_exists'
--......................................
--
--*Synopsis*
-- bfd_boolean separate_debug_file_exists
-- (char *name, unsigned long crc32);
-- *Description*
--Checks to see if NAME is a file and if its contents match CRC32.
--
--2.14.1.20 `separate_alt_debug_file_exists'
--..........................................
--
--*Synopsis*
-- bfd_boolean separate_alt_debug_file_exists
-- (char *name, unsigned long crc32);
-- *Description*
--Checks to see if NAME is a file and if its BuildID matches BUILDID.
--
--2.14.1.21 `find_separate_debug_file'
--....................................
--
--*Synopsis*
-- char *find_separate_debug_file (bfd *abfd);
-- *Description*
--Searches ABFD for a section called SECTION_NAME which is expected to
--contain a reference to a file containing separate debugging
--information. The function scans various locations in the filesystem,
--including the file tree rooted at DEBUG_FILE_DIRECTORY, and returns the
--first matching filename that it finds. If CHECK_CRC is TRUE then the
--contents of the file must also match the CRC value contained in
--SECTION_NAME. Returns NULL if no valid file could be found.
--
--2.14.1.22 `bfd_follow_gnu_debuglink'
--....................................
--
--*Synopsis*
-- char *bfd_follow_gnu_debuglink (bfd *abfd, const char *dir);
-- *Description*
--Takes a BFD and searches it for a .gnu_debuglink section. If this
--section is found, it examines the section for the name and checksum of
--a '.debug' file containing auxiliary debugging information. It then
--searches the filesystem for this .debug file in some standard
--locations, including the directory tree rooted at DIR, and if found
--returns the full filename.
--
-- If DIR is NULL, it will search a default path configured into libbfd
--at build time. [XXX this feature is not currently implemented].
--
-- *Returns*
--`NULL' on any errors or failure to locate the .debug file, otherwise a
--pointer to a heap-allocated string containing the filename. The caller
--is responsible for freeing this string.
--
--2.14.1.23 `bfd_follow_gnu_debugaltlink'
--.......................................
--
--*Synopsis*
-- char *bfd_follow_gnu_debugaltlink (bfd *abfd, const char *dir);
-- *Description*
--Takes a BFD and searches it for a .gnu_debugaltlink section. If this
--section is found, it examines the section for the name of a file
--containing auxiliary debugging information. It then searches the
--filesystem for this file in a set of standard locations, including the
--directory tree rooted at DIR, and if found returns the full filename.
--
-- If DIR is NULL, it will search a default path configured into libbfd
--at build time. [FIXME: This feature is not currently implemented].
--
-- *Returns*
--`NULL' on any errors or failure to locate the debug file, otherwise a
--pointer to a heap-allocated string containing the filename. The caller
--is responsible for freeing this string.
--
--2.14.1.24 `bfd_create_gnu_debuglink_section'
--............................................
--
--*Synopsis*
-- struct bfd_section *bfd_create_gnu_debuglink_section
-- (bfd *abfd, const char *filename);
-- *Description*
--Takes a BFD and adds a .gnu_debuglink section to it. The section is
--sized to be big enough to contain a link to the specified FILENAME.
--
-- *Returns*
--A pointer to the new section is returned if all is ok. Otherwise
--`NULL' is returned and bfd_error is set.
--
--2.14.1.25 `bfd_fill_in_gnu_debuglink_section'
--.............................................
--
--*Synopsis*
-- bfd_boolean bfd_fill_in_gnu_debuglink_section
-- (bfd *abfd, struct bfd_section *sect, const char *filename);
-- *Description*
--Takes a BFD and containing a .gnu_debuglink section SECT and fills in
--the contents of the section to contain a link to the specified
--FILENAME. The filename should be relative to the current directory.
--
-- *Returns*
--`TRUE' is returned if all is ok. Otherwise `FALSE' is returned and
--bfd_error is set.
--
--
--File: bfd.info, Node: Internal, Next: File Caching, Prev: Opening and Closing, Up: BFD front end
--
--2.15 Implementation details
--===========================
--
--2.15.1 Internal functions
---------------------------
--
--*Description*
--These routines are used within BFD. They are not intended for export,
--but are documented here for completeness.
--
--2.15.1.1 `bfd_write_bigendian_4byte_int'
--........................................
--
--*Synopsis*
-- bfd_boolean bfd_write_bigendian_4byte_int (bfd *, unsigned int);
-- *Description*
--Write a 4 byte integer I to the output BFD ABFD, in big endian order
--regardless of what else is going on. This is useful in archives.
--
--2.15.1.2 `bfd_put_size'
--.......................
--
--2.15.1.3 `bfd_get_size'
--.......................
--
--*Description*
--These macros as used for reading and writing raw data in sections; each
--access (except for bytes) is vectored through the target format of the
--BFD and mangled accordingly. The mangling performs any necessary endian
--translations and removes alignment restrictions. Note that types
--accepted and returned by these macros are identical so they can be
--swapped around in macros--for example, `libaout.h' defines `GET_WORD'
--to either `bfd_get_32' or `bfd_get_64'.
--
-- In the put routines, VAL must be a `bfd_vma'. If we are on a system
--without prototypes, the caller is responsible for making sure that is
--true, with a cast if necessary. We don't cast them in the macro
--definitions because that would prevent `lint' or `gcc -Wall' from
--detecting sins such as passing a pointer. To detect calling these with
--less than a `bfd_vma', use `gcc -Wconversion' on a host with 64 bit
--`bfd_vma''s.
--
-- /* Byte swapping macros for user section data. */
--
-- #define bfd_put_8(abfd, val, ptr) \
-- ((void) (*((unsigned char *) (ptr)) = (val) & 0xff))
-- #define bfd_put_signed_8 \
-- bfd_put_8
-- #define bfd_get_8(abfd, ptr) \
-- (*(const unsigned char *) (ptr) & 0xff)
-- #define bfd_get_signed_8(abfd, ptr) \
-- (((*(const unsigned char *) (ptr) & 0xff) ^ 0x80) - 0x80)
--
-- #define bfd_put_16(abfd, val, ptr) \
-- BFD_SEND (abfd, bfd_putx16, ((val),(ptr)))
-- #define bfd_put_signed_16 \
-- bfd_put_16
-- #define bfd_get_16(abfd, ptr) \
-- BFD_SEND (abfd, bfd_getx16, (ptr))
-- #define bfd_get_signed_16(abfd, ptr) \
-- BFD_SEND (abfd, bfd_getx_signed_16, (ptr))
--
-- #define bfd_put_32(abfd, val, ptr) \
-- BFD_SEND (abfd, bfd_putx32, ((val),(ptr)))
-- #define bfd_put_signed_32 \
-- bfd_put_32
-- #define bfd_get_32(abfd, ptr) \
-- BFD_SEND (abfd, bfd_getx32, (ptr))
-- #define bfd_get_signed_32(abfd, ptr) \
-- BFD_SEND (abfd, bfd_getx_signed_32, (ptr))
--
-- #define bfd_put_64(abfd, val, ptr) \
-- BFD_SEND (abfd, bfd_putx64, ((val), (ptr)))
-- #define bfd_put_signed_64 \
-- bfd_put_64
-- #define bfd_get_64(abfd, ptr) \
-- BFD_SEND (abfd, bfd_getx64, (ptr))
-- #define bfd_get_signed_64(abfd, ptr) \
-- BFD_SEND (abfd, bfd_getx_signed_64, (ptr))
--
-- #define bfd_get(bits, abfd, ptr) \
-- ((bits) == 8 ? (bfd_vma) bfd_get_8 (abfd, ptr) \
-- : (bits) == 16 ? bfd_get_16 (abfd, ptr) \
-- : (bits) == 32 ? bfd_get_32 (abfd, ptr) \
-- : (bits) == 64 ? bfd_get_64 (abfd, ptr) \
-- : (abort (), (bfd_vma) - 1))
--
-- #define bfd_put(bits, abfd, val, ptr) \
-- ((bits) == 8 ? bfd_put_8 (abfd, val, ptr) \
-- : (bits) == 16 ? bfd_put_16 (abfd, val, ptr) \
-- : (bits) == 32 ? bfd_put_32 (abfd, val, ptr) \
-- : (bits) == 64 ? bfd_put_64 (abfd, val, ptr) \
-- : (abort (), (void) 0))
--
--2.15.1.4 `bfd_h_put_size'
--.........................
--
--*Description*
--These macros have the same function as their `bfd_get_x' brethren,
--except that they are used for removing information for the header
--records of object files. Believe it or not, some object files keep
--their header records in big endian order and their data in little
--endian order.
--
-- /* Byte swapping macros for file header data. */
--
-- #define bfd_h_put_8(abfd, val, ptr) \
-- bfd_put_8 (abfd, val, ptr)
-- #define bfd_h_put_signed_8(abfd, val, ptr) \
-- bfd_put_8 (abfd, val, ptr)
-- #define bfd_h_get_8(abfd, ptr) \
-- bfd_get_8 (abfd, ptr)
-- #define bfd_h_get_signed_8(abfd, ptr) \
-- bfd_get_signed_8 (abfd, ptr)
--
-- #define bfd_h_put_16(abfd, val, ptr) \
-- BFD_SEND (abfd, bfd_h_putx16, (val, ptr))
-- #define bfd_h_put_signed_16 \
-- bfd_h_put_16
-- #define bfd_h_get_16(abfd, ptr) \
-- BFD_SEND (abfd, bfd_h_getx16, (ptr))
-- #define bfd_h_get_signed_16(abfd, ptr) \
-- BFD_SEND (abfd, bfd_h_getx_signed_16, (ptr))
--
-- #define bfd_h_put_32(abfd, val, ptr) \
-- BFD_SEND (abfd, bfd_h_putx32, (val, ptr))
-- #define bfd_h_put_signed_32 \
-- bfd_h_put_32
-- #define bfd_h_get_32(abfd, ptr) \
-- BFD_SEND (abfd, bfd_h_getx32, (ptr))
-- #define bfd_h_get_signed_32(abfd, ptr) \
-- BFD_SEND (abfd, bfd_h_getx_signed_32, (ptr))
--
-- #define bfd_h_put_64(abfd, val, ptr) \
-- BFD_SEND (abfd, bfd_h_putx64, (val, ptr))
-- #define bfd_h_put_signed_64 \
-- bfd_h_put_64
-- #define bfd_h_get_64(abfd, ptr) \
-- BFD_SEND (abfd, bfd_h_getx64, (ptr))
-- #define bfd_h_get_signed_64(abfd, ptr) \
-- BFD_SEND (abfd, bfd_h_getx_signed_64, (ptr))
--
-- /* Aliases for the above, which should eventually go away. */
--
-- #define H_PUT_64 bfd_h_put_64
-- #define H_PUT_32 bfd_h_put_32
-- #define H_PUT_16 bfd_h_put_16
-- #define H_PUT_8 bfd_h_put_8
-- #define H_PUT_S64 bfd_h_put_signed_64
-- #define H_PUT_S32 bfd_h_put_signed_32
-- #define H_PUT_S16 bfd_h_put_signed_16
-- #define H_PUT_S8 bfd_h_put_signed_8
-- #define H_GET_64 bfd_h_get_64
-- #define H_GET_32 bfd_h_get_32
-- #define H_GET_16 bfd_h_get_16
-- #define H_GET_8 bfd_h_get_8
-- #define H_GET_S64 bfd_h_get_signed_64
-- #define H_GET_S32 bfd_h_get_signed_32
-- #define H_GET_S16 bfd_h_get_signed_16
-- #define H_GET_S8 bfd_h_get_signed_8
--
--2.15.1.5 `bfd_log2'
--...................
--
--*Synopsis*
-- unsigned int bfd_log2 (bfd_vma x);
-- *Description*
--Return the log base 2 of the value supplied, rounded up. E.g., an X of
--1025 returns 11. A X of 0 returns 0.
--
--
--File: bfd.info, Node: File Caching, Next: Linker Functions, Prev: Internal, Up: BFD front end
--
--2.16 File caching
--=================
--
--The file caching mechanism is embedded within BFD and allows the
--application to open as many BFDs as it wants without regard to the
--underlying operating system's file descriptor limit (often as low as 20
--open files). The module in `cache.c' maintains a least recently used
--list of `bfd_cache_max_open' files, and exports the name
--`bfd_cache_lookup', which runs around and makes sure that the required
--BFD is open. If not, then it chooses a file to close, closes it and
--opens the one wanted, returning its file handle.
--
--2.16.1 Caching functions
--------------------------
--
--2.16.1.1 `bfd_cache_init'
--.........................
--
--*Synopsis*
-- bfd_boolean bfd_cache_init (bfd *abfd);
-- *Description*
--Add a newly opened BFD to the cache.
--
--2.16.1.2 `bfd_cache_close'
--..........................
--
--*Synopsis*
-- bfd_boolean bfd_cache_close (bfd *abfd);
-- *Description*
--Remove the BFD ABFD from the cache. If the attached file is open, then
--close it too.
--
-- *Returns*
--`FALSE' is returned if closing the file fails, `TRUE' is returned if
--all is well.
--
--2.16.1.3 `bfd_cache_close_all'
--..............................
--
--*Synopsis*
-- bfd_boolean bfd_cache_close_all (void);
-- *Description*
--Remove all BFDs from the cache. If the attached file is open, then
--close it too.
--
-- *Returns*
--`FALSE' is returned if closing one of the file fails, `TRUE' is
--returned if all is well.
--
--2.16.1.4 `bfd_open_file'
--........................
--
--*Synopsis*
-- FILE* bfd_open_file (bfd *abfd);
-- *Description*
--Call the OS to open a file for ABFD. Return the `FILE *' (possibly
--`NULL') that results from this operation. Set up the BFD so that
--future accesses know the file is open. If the `FILE *' returned is
--`NULL', then it won't have been put in the cache, so it won't have to
--be removed from it.
--
--
--File: bfd.info, Node: Linker Functions, Next: Hash Tables, Prev: File Caching, Up: BFD front end
--
--2.17 Linker Functions
--=====================
--
--The linker uses three special entry points in the BFD target vector.
--It is not necessary to write special routines for these entry points
--when creating a new BFD back end, since generic versions are provided.
--However, writing them can speed up linking and make it use
--significantly less runtime memory.
--
-- The first routine creates a hash table used by the other routines.
--The second routine adds the symbols from an object file to the hash
--table. The third routine takes all the object files and links them
--together to create the output file. These routines are designed so
--that the linker proper does not need to know anything about the symbols
--in the object files that it is linking. The linker merely arranges the
--sections as directed by the linker script and lets BFD handle the
--details of symbols and relocs.
--
-- The second routine and third routines are passed a pointer to a
--`struct bfd_link_info' structure (defined in `bfdlink.h') which holds
--information relevant to the link, including the linker hash table
--(which was created by the first routine) and a set of callback
--functions to the linker proper.
--
-- The generic linker routines are in `linker.c', and use the header
--file `genlink.h'. As of this writing, the only back ends which have
--implemented versions of these routines are a.out (in `aoutx.h') and
--ECOFF (in `ecoff.c'). The a.out routines are used as examples
--throughout this section.
--
--* Menu:
--
--* Creating a Linker Hash Table::
--* Adding Symbols to the Hash Table::
--* Performing the Final Link::
--
--
--File: bfd.info, Node: Creating a Linker Hash Table, Next: Adding Symbols to the Hash Table, Prev: Linker Functions, Up: Linker Functions
--
--2.17.1 Creating a linker hash table
-------------------------------------
--
--The linker routines must create a hash table, which must be derived
--from `struct bfd_link_hash_table' described in `bfdlink.c'. *Note Hash
--Tables::, for information on how to create a derived hash table. This
--entry point is called using the target vector of the linker output file.
--
-- The `_bfd_link_hash_table_create' entry point must allocate and
--initialize an instance of the desired hash table. If the back end does
--not require any additional information to be stored with the entries in
--the hash table, the entry point may simply create a `struct
--bfd_link_hash_table'. Most likely, however, some additional
--information will be needed.
--
-- For example, with each entry in the hash table the a.out linker
--keeps the index the symbol has in the final output file (this index
--number is used so that when doing a relocatable link the symbol index
--used in the output file can be quickly filled in when copying over a
--reloc). The a.out linker code defines the required structures and
--functions for a hash table derived from `struct bfd_link_hash_table'.
--The a.out linker hash table is created by the function
--`NAME(aout,link_hash_table_create)'; it simply allocates space for the
--hash table, initializes it, and returns a pointer to it.
--
-- When writing the linker routines for a new back end, you will
--generally not know exactly which fields will be required until you have
--finished. You should simply create a new hash table which defines no
--additional fields, and then simply add fields as they become necessary.
--
--
--File: bfd.info, Node: Adding Symbols to the Hash Table, Next: Performing the Final Link, Prev: Creating a Linker Hash Table, Up: Linker Functions
--
--2.17.2 Adding symbols to the hash table
-----------------------------------------
--
--The linker proper will call the `_bfd_link_add_symbols' entry point for
--each object file or archive which is to be linked (typically these are
--the files named on the command line, but some may also come from the
--linker script). The entry point is responsible for examining the file.
--For an object file, BFD must add any relevant symbol information to
--the hash table. For an archive, BFD must determine which elements of
--the archive should be used and adding them to the link.
--
-- The a.out version of this entry point is
--`NAME(aout,link_add_symbols)'.
--
--* Menu:
--
--* Differing file formats::
--* Adding symbols from an object file::
--* Adding symbols from an archive::
--
--
--File: bfd.info, Node: Differing file formats, Next: Adding symbols from an object file, Prev: Adding Symbols to the Hash Table, Up: Adding Symbols to the Hash Table
--
--2.17.2.1 Differing file formats
--...............................
--
--Normally all the files involved in a link will be of the same format,
--but it is also possible to link together different format object files,
--and the back end must support that. The `_bfd_link_add_symbols' entry
--point is called via the target vector of the file to be added. This
--has an important consequence: the function may not assume that the hash
--table is the type created by the corresponding
--`_bfd_link_hash_table_create' vector. All the `_bfd_link_add_symbols'
--function can assume about the hash table is that it is derived from
--`struct bfd_link_hash_table'.
--
-- Sometimes the `_bfd_link_add_symbols' function must store some
--information in the hash table entry to be used by the `_bfd_final_link'
--function. In such a case the output bfd xvec must be checked to make
--sure that the hash table was created by an object file of the same
--format.
--
-- The `_bfd_final_link' routine must be prepared to handle a hash
--entry without any extra information added by the
--`_bfd_link_add_symbols' function. A hash entry without extra
--information will also occur when the linker script directs the linker
--to create a symbol. Note that, regardless of how a hash table entry is
--added, all the fields will be initialized to some sort of null value by
--the hash table entry initialization function.
--
-- See `ecoff_link_add_externals' for an example of how to check the
--output bfd before saving information (in this case, the ECOFF external
--symbol debugging information) in a hash table entry.
--
--
--File: bfd.info, Node: Adding symbols from an object file, Next: Adding symbols from an archive, Prev: Differing file formats, Up: Adding Symbols to the Hash Table
--
--2.17.2.2 Adding symbols from an object file
--...........................................
--
--When the `_bfd_link_add_symbols' routine is passed an object file, it
--must add all externally visible symbols in that object file to the hash
--table. The actual work of adding the symbol to the hash table is
--normally handled by the function `_bfd_generic_link_add_one_symbol'.
--The `_bfd_link_add_symbols' routine is responsible for reading all the
--symbols from the object file and passing the correct information to
--`_bfd_generic_link_add_one_symbol'.
--
-- The `_bfd_link_add_symbols' routine should not use
--`bfd_canonicalize_symtab' to read the symbols. The point of providing
--this routine is to avoid the overhead of converting the symbols into
--generic `asymbol' structures.
--
-- `_bfd_generic_link_add_one_symbol' handles the details of combining
--common symbols, warning about multiple definitions, and so forth. It
--takes arguments which describe the symbol to add, notably symbol flags,
--a section, and an offset. The symbol flags include such things as
--`BSF_WEAK' or `BSF_INDIRECT'. The section is a section in the object
--file, or something like `bfd_und_section_ptr' for an undefined symbol
--or `bfd_com_section_ptr' for a common symbol.
--
-- If the `_bfd_final_link' routine is also going to need to read the
--symbol information, the `_bfd_link_add_symbols' routine should save it
--somewhere attached to the object file BFD. However, the information
--should only be saved if the `keep_memory' field of the `info' argument
--is TRUE, so that the `-no-keep-memory' linker switch is effective.
--
-- The a.out function which adds symbols from an object file is
--`aout_link_add_object_symbols', and most of the interesting work is in
--`aout_link_add_symbols'. The latter saves pointers to the hash tables
--entries created by `_bfd_generic_link_add_one_symbol' indexed by symbol
--number, so that the `_bfd_final_link' routine does not have to call the
--hash table lookup routine to locate the entry.
--
--
--File: bfd.info, Node: Adding symbols from an archive, Prev: Adding symbols from an object file, Up: Adding Symbols to the Hash Table
--
--2.17.2.3 Adding symbols from an archive
--.......................................
--
--When the `_bfd_link_add_symbols' routine is passed an archive, it must
--look through the symbols defined by the archive and decide which
--elements of the archive should be included in the link. For each such
--element it must call the `add_archive_element' linker callback, and it
--must add the symbols from the object file to the linker hash table.
--(The callback may in fact indicate that a replacement BFD should be
--used, in which case the symbols from that BFD should be added to the
--linker hash table instead.)
--
-- In most cases the work of looking through the symbols in the archive
--should be done by the `_bfd_generic_link_add_archive_symbols' function.
--This function builds a hash table from the archive symbol table and
--looks through the list of undefined symbols to see which elements
--should be included. `_bfd_generic_link_add_archive_symbols' is passed
--a function to call to make the final decision about adding an archive
--element to the link and to do the actual work of adding the symbols to
--the linker hash table.
--
-- The function passed to `_bfd_generic_link_add_archive_symbols' must
--read the symbols of the archive element and decide whether the archive
--element should be included in the link. If the element is to be
--included, the `add_archive_element' linker callback routine must be
--called with the element as an argument, and the element's symbols must
--be added to the linker hash table just as though the element had itself
--been passed to the `_bfd_link_add_symbols' function. The
--`add_archive_element' callback has the option to indicate that it would
--like to replace the element archive with a substitute BFD, in which
--case it is the symbols of that substitute BFD that must be added to the
--linker hash table instead.
--
-- When the a.out `_bfd_link_add_symbols' function receives an archive,
--it calls `_bfd_generic_link_add_archive_symbols' passing
--`aout_link_check_archive_element' as the function argument.
--`aout_link_check_archive_element' calls `aout_link_check_ar_symbols'.
--If the latter decides to add the element (an element is only added if
--it provides a real, non-common, definition for a previously undefined
--or common symbol) it calls the `add_archive_element' callback and then
--`aout_link_check_archive_element' calls `aout_link_add_symbols' to
--actually add the symbols to the linker hash table - possibly those of a
--substitute BFD, if the `add_archive_element' callback avails itself of
--that option.
--
-- The ECOFF back end is unusual in that it does not normally call
--`_bfd_generic_link_add_archive_symbols', because ECOFF archives already
--contain a hash table of symbols. The ECOFF back end searches the
--archive itself to avoid the overhead of creating a new hash table.
--
--
--File: bfd.info, Node: Performing the Final Link, Prev: Adding Symbols to the Hash Table, Up: Linker Functions
--
--2.17.3 Performing the final link
----------------------------------
--
--When all the input files have been processed, the linker calls the
--`_bfd_final_link' entry point of the output BFD. This routine is
--responsible for producing the final output file, which has several
--aspects. It must relocate the contents of the input sections and copy
--the data into the output sections. It must build an output symbol
--table including any local symbols from the input files and the global
--symbols from the hash table. When producing relocatable output, it must
--modify the input relocs and write them into the output file. There may
--also be object format dependent work to be done.
--
-- The linker will also call the `write_object_contents' entry point
--when the BFD is closed. The two entry points must work together in
--order to produce the correct output file.
--
-- The details of how this works are inevitably dependent upon the
--specific object file format. The a.out `_bfd_final_link' routine is
--`NAME(aout,final_link)'.
--
--* Menu:
--
--* Information provided by the linker::
--* Relocating the section contents::
--* Writing the symbol table::
--
--
--File: bfd.info, Node: Information provided by the linker, Next: Relocating the section contents, Prev: Performing the Final Link, Up: Performing the Final Link
--
--2.17.3.1 Information provided by the linker
--...........................................
--
--Before the linker calls the `_bfd_final_link' entry point, it sets up
--some data structures for the function to use.
--
-- The `input_bfds' field of the `bfd_link_info' structure will point
--to a list of all the input files included in the link. These files are
--linked through the `link_next' field of the `bfd' structure.
--
-- Each section in the output file will have a list of `link_order'
--structures attached to the `map_head.link_order' field (the
--`link_order' structure is defined in `bfdlink.h'). These structures
--describe how to create the contents of the output section in terms of
--the contents of various input sections, fill constants, and,
--eventually, other types of information. They also describe relocs that
--must be created by the BFD backend, but do not correspond to any input
--file; this is used to support -Ur, which builds constructors while
--generating a relocatable object file.
--
--
--File: bfd.info, Node: Relocating the section contents, Next: Writing the symbol table, Prev: Information provided by the linker, Up: Performing the Final Link
--
--2.17.3.2 Relocating the section contents
--........................................
--
--The `_bfd_final_link' function should look through the `link_order'
--structures attached to each section of the output file. Each
--`link_order' structure should either be handled specially, or it should
--be passed to the function `_bfd_default_link_order' which will do the
--right thing (`_bfd_default_link_order' is defined in `linker.c').
--
-- For efficiency, a `link_order' of type `bfd_indirect_link_order'
--whose associated section belongs to a BFD of the same format as the
--output BFD must be handled specially. This type of `link_order'
--describes part of an output section in terms of a section belonging to
--one of the input files. The `_bfd_final_link' function should read the
--contents of the section and any associated relocs, apply the relocs to
--the section contents, and write out the modified section contents. If
--performing a relocatable link, the relocs themselves must also be
--modified and written out.
--
-- The functions `_bfd_relocate_contents' and
--`_bfd_final_link_relocate' provide some general support for performing
--the actual relocations, notably overflow checking. Their arguments
--include information about the symbol the relocation is against and a
--`reloc_howto_type' argument which describes the relocation to perform.
--These functions are defined in `reloc.c'.
--
-- The a.out function which handles reading, relocating, and writing
--section contents is `aout_link_input_section'. The actual relocation
--is done in `aout_link_input_section_std' and
--`aout_link_input_section_ext'.
--
--
--File: bfd.info, Node: Writing the symbol table, Prev: Relocating the section contents, Up: Performing the Final Link
--
--2.17.3.3 Writing the symbol table
--.................................
--
--The `_bfd_final_link' function must gather all the symbols in the input
--files and write them out. It must also write out all the symbols in
--the global hash table. This must be controlled by the `strip' and
--`discard' fields of the `bfd_link_info' structure.
--
-- The local symbols of the input files will not have been entered into
--the linker hash table. The `_bfd_final_link' routine must consider
--each input file and include the symbols in the output file. It may be
--convenient to do this when looking through the `link_order' structures,
--or it may be done by stepping through the `input_bfds' list.
--
-- The `_bfd_final_link' routine must also traverse the global hash
--table to gather all the externally visible symbols. It is possible
--that most of the externally visible symbols may be written out when
--considering the symbols of each input file, but it is still necessary
--to traverse the hash table since the linker script may have defined
--some symbols that are not in any of the input files.
--
-- The `strip' field of the `bfd_link_info' structure controls which
--symbols are written out. The possible values are listed in
--`bfdlink.h'. If the value is `strip_some', then the `keep_hash' field
--of the `bfd_link_info' structure is a hash table of symbols to keep;
--each symbol should be looked up in this hash table, and only symbols
--which are present should be included in the output file.
--
-- If the `strip' field of the `bfd_link_info' structure permits local
--symbols to be written out, the `discard' field is used to further
--controls which local symbols are included in the output file. If the
--value is `discard_l', then all local symbols which begin with a certain
--prefix are discarded; this is controlled by the
--`bfd_is_local_label_name' entry point.
--
-- The a.out backend handles symbols by calling
--`aout_link_write_symbols' on each input BFD and then traversing the
--global hash table with the function `aout_link_write_other_symbol'. It
--builds a string table while writing out the symbols, which is written
--to the output file at the end of `NAME(aout,final_link)'.
--
--2.17.3.4 `bfd_link_split_section'
--.................................
--
--*Synopsis*
-- bfd_boolean bfd_link_split_section (bfd *abfd, asection *sec);
-- *Description*
--Return nonzero if SEC should be split during a reloceatable or final
--link.
-- #define bfd_link_split_section(abfd, sec) \
-- BFD_SEND (abfd, _bfd_link_split_section, (abfd, sec))
--
--2.17.3.5 `bfd_section_already_linked'
--.....................................
--
--*Synopsis*
-- bfd_boolean bfd_section_already_linked (bfd *abfd,
-- asection *sec,
-- struct bfd_link_info *info);
-- *Description*
--Check if DATA has been already linked during a reloceatable or final
--link. Return TRUE if it has.
-- #define bfd_section_already_linked(abfd, sec, info) \
-- BFD_SEND (abfd, _section_already_linked, (abfd, sec, info))
--
--2.17.3.6 `bfd_generic_define_common_symbol'
--...........................................
--
--*Synopsis*
-- bfd_boolean bfd_generic_define_common_symbol
-- (bfd *output_bfd, struct bfd_link_info *info,
-- struct bfd_link_hash_entry *h);
-- *Description*
--Convert common symbol H into a defined symbol. Return TRUE on success
--and FALSE on failure.
-- #define bfd_define_common_symbol(output_bfd, info, h) \
-- BFD_SEND (output_bfd, _bfd_define_common_symbol, (output_bfd, info, h))
--
--2.17.3.7 `bfd_find_version_for_sym'
--...................................
--
--*Synopsis*
-- struct bfd_elf_version_tree * bfd_find_version_for_sym
-- (struct bfd_elf_version_tree *verdefs,
-- const char *sym_name, bfd_boolean *hide);
-- *Description*
--Search an elf version script tree for symbol versioning info and export
--/ don't-export status for a given symbol. Return non-NULL on success
--and NULL on failure; also sets the output `hide' boolean parameter.
--
--2.17.3.8 `bfd_hide_sym_by_version'
--..................................
--
--*Synopsis*
-- bfd_boolean bfd_hide_sym_by_version
-- (struct bfd_elf_version_tree *verdefs, const char *sym_name);
-- *Description*
--Search an elf version script tree for symbol versioning info for a
--given symbol. Return TRUE if the symbol is hidden.
--
--
--File: bfd.info, Node: Hash Tables, Prev: Linker Functions, Up: BFD front end
--
--2.18 Hash Tables
--================
--
--BFD provides a simple set of hash table functions. Routines are
--provided to initialize a hash table, to free a hash table, to look up a
--string in a hash table and optionally create an entry for it, and to
--traverse a hash table. There is currently no routine to delete an
--string from a hash table.
--
-- The basic hash table does not permit any data to be stored with a
--string. However, a hash table is designed to present a base class from
--which other types of hash tables may be derived. These derived types
--may store additional information with the string. Hash tables were
--implemented in this way, rather than simply providing a data pointer in
--a hash table entry, because they were designed for use by the linker
--back ends. The linker may create thousands of hash table entries, and
--the overhead of allocating private data and storing and following
--pointers becomes noticeable.
--
-- The basic hash table code is in `hash.c'.
--
--* Menu:
--
--* Creating and Freeing a Hash Table::
--* Looking Up or Entering a String::
--* Traversing a Hash Table::
--* Deriving a New Hash Table Type::
--
--
--File: bfd.info, Node: Creating and Freeing a Hash Table, Next: Looking Up or Entering a String, Prev: Hash Tables, Up: Hash Tables
--
--2.18.1 Creating and freeing a hash table
------------------------------------------
--
--To create a hash table, create an instance of a `struct bfd_hash_table'
--(defined in `bfd.h') and call `bfd_hash_table_init' (if you know
--approximately how many entries you will need, the function
--`bfd_hash_table_init_n', which takes a SIZE argument, may be used).
--`bfd_hash_table_init' returns `FALSE' if some sort of error occurs.
--
-- The function `bfd_hash_table_init' take as an argument a function to
--use to create new entries. For a basic hash table, use the function
--`bfd_hash_newfunc'. *Note Deriving a New Hash Table Type::, for why
--you would want to use a different value for this argument.
--
-- `bfd_hash_table_init' will create an objalloc which will be used to
--allocate new entries. You may allocate memory on this objalloc using
--`bfd_hash_allocate'.
--
-- Use `bfd_hash_table_free' to free up all the memory that has been
--allocated for a hash table. This will not free up the `struct
--bfd_hash_table' itself, which you must provide.
--
-- Use `bfd_hash_set_default_size' to set the default size of hash
--table to use.
--
--
--File: bfd.info, Node: Looking Up or Entering a String, Next: Traversing a Hash Table, Prev: Creating and Freeing a Hash Table, Up: Hash Tables
--
--2.18.2 Looking up or entering a string
----------------------------------------
--
--The function `bfd_hash_lookup' is used both to look up a string in the
--hash table and to create a new entry.
--
-- If the CREATE argument is `FALSE', `bfd_hash_lookup' will look up a
--string. If the string is found, it will returns a pointer to a `struct
--bfd_hash_entry'. If the string is not found in the table
--`bfd_hash_lookup' will return `NULL'. You should not modify any of the
--fields in the returns `struct bfd_hash_entry'.
--
-- If the CREATE argument is `TRUE', the string will be entered into
--the hash table if it is not already there. Either way a pointer to a
--`struct bfd_hash_entry' will be returned, either to the existing
--structure or to a newly created one. In this case, a `NULL' return
--means that an error occurred.
--
-- If the CREATE argument is `TRUE', and a new entry is created, the
--COPY argument is used to decide whether to copy the string onto the
--hash table objalloc or not. If COPY is passed as `FALSE', you must be
--careful not to deallocate or modify the string as long as the hash table
--exists.
--
--
--File: bfd.info, Node: Traversing a Hash Table, Next: Deriving a New Hash Table Type, Prev: Looking Up or Entering a String, Up: Hash Tables
--
--2.18.3 Traversing a hash table
--------------------------------
--
--The function `bfd_hash_traverse' may be used to traverse a hash table,
--calling a function on each element. The traversal is done in a random
--order.
--
-- `bfd_hash_traverse' takes as arguments a function and a generic
--`void *' pointer. The function is called with a hash table entry (a
--`struct bfd_hash_entry *') and the generic pointer passed to
--`bfd_hash_traverse'. The function must return a `boolean' value, which
--indicates whether to continue traversing the hash table. If the
--function returns `FALSE', `bfd_hash_traverse' will stop the traversal
--and return immediately.
--
--
--File: bfd.info, Node: Deriving a New Hash Table Type, Prev: Traversing a Hash Table, Up: Hash Tables
--
--2.18.4 Deriving a new hash table type
---------------------------------------
--
--Many uses of hash tables want to store additional information which
--each entry in the hash table. Some also find it convenient to store
--additional information with the hash table itself. This may be done
--using a derived hash table.
--
-- Since C is not an object oriented language, creating a derived hash
--table requires sticking together some boilerplate routines with a few
--differences specific to the type of hash table you want to create.
--
-- An example of a derived hash table is the linker hash table. The
--structures for this are defined in `bfdlink.h'. The functions are in
--`linker.c'.
--
-- You may also derive a hash table from an already derived hash table.
--For example, the a.out linker backend code uses a hash table derived
--from the linker hash table.
--
--* Menu:
--
--* Define the Derived Structures::
--* Write the Derived Creation Routine::
--* Write Other Derived Routines::
--
--
--File: bfd.info, Node: Define the Derived Structures, Next: Write the Derived Creation Routine, Prev: Deriving a New Hash Table Type, Up: Deriving a New Hash Table Type
--
--2.18.4.1 Define the derived structures
--......................................
--
--You must define a structure for an entry in the hash table, and a
--structure for the hash table itself.
--
-- The first field in the structure for an entry in the hash table must
--be of the type used for an entry in the hash table you are deriving
--from. If you are deriving from a basic hash table this is `struct
--bfd_hash_entry', which is defined in `bfd.h'. The first field in the
--structure for the hash table itself must be of the type of the hash
--table you are deriving from itself. If you are deriving from a basic
--hash table, this is `struct bfd_hash_table'.
--
-- For example, the linker hash table defines `struct
--bfd_link_hash_entry' (in `bfdlink.h'). The first field, `root', is of
--type `struct bfd_hash_entry'. Similarly, the first field in `struct
--bfd_link_hash_table', `table', is of type `struct bfd_hash_table'.
--
--
--File: bfd.info, Node: Write the Derived Creation Routine, Next: Write Other Derived Routines, Prev: Define the Derived Structures, Up: Deriving a New Hash Table Type
--
--2.18.4.2 Write the derived creation routine
--...........................................
--
--You must write a routine which will create and initialize an entry in
--the hash table. This routine is passed as the function argument to
--`bfd_hash_table_init'.
--
-- In order to permit other hash tables to be derived from the hash
--table you are creating, this routine must be written in a standard way.
--
-- The first argument to the creation routine is a pointer to a hash
--table entry. This may be `NULL', in which case the routine should
--allocate the right amount of space. Otherwise the space has already
--been allocated by a hash table type derived from this one.
--
-- After allocating space, the creation routine must call the creation
--routine of the hash table type it is derived from, passing in a pointer
--to the space it just allocated. This will initialize any fields used
--by the base hash table.
--
-- Finally the creation routine must initialize any local fields for
--the new hash table type.
--
-- Here is a boilerplate example of a creation routine. FUNCTION_NAME
--is the name of the routine. ENTRY_TYPE is the type of an entry in the
--hash table you are creating. BASE_NEWFUNC is the name of the creation
--routine of the hash table type your hash table is derived from.
--
-- struct bfd_hash_entry *
-- FUNCTION_NAME (struct bfd_hash_entry *entry,
-- struct bfd_hash_table *table,
-- const char *string)
-- {
-- struct ENTRY_TYPE *ret = (ENTRY_TYPE *) entry;
--
-- /* Allocate the structure if it has not already been allocated by a
-- derived class. */
-- if (ret == NULL)
-- {
-- ret = bfd_hash_allocate (table, sizeof (* ret));
-- if (ret == NULL)
-- return NULL;
-- }
--
-- /* Call the allocation method of the base class. */
-- ret = ((ENTRY_TYPE *)
-- BASE_NEWFUNC ((struct bfd_hash_entry *) ret, table, string));
--
-- /* Initialize the local fields here. */
--
-- return (struct bfd_hash_entry *) ret;
-- }
-- *Description*
--The creation routine for the linker hash table, which is in `linker.c',
--looks just like this example. FUNCTION_NAME is
--`_bfd_link_hash_newfunc'. ENTRY_TYPE is `struct bfd_link_hash_entry'.
--BASE_NEWFUNC is `bfd_hash_newfunc', the creation routine for a basic
--hash table.
--
-- `_bfd_link_hash_newfunc' also initializes the local fields in a
--linker hash table entry: `type', `written' and `next'.
--
--
--File: bfd.info, Node: Write Other Derived Routines, Prev: Write the Derived Creation Routine, Up: Deriving a New Hash Table Type
--
--2.18.4.3 Write other derived routines
--.....................................
--
--You will want to write other routines for your new hash table, as well.
--
-- You will want an initialization routine which calls the
--initialization routine of the hash table you are deriving from and
--initializes any other local fields. For the linker hash table, this is
--`_bfd_link_hash_table_init' in `linker.c'.
--
-- You will want a lookup routine which calls the lookup routine of the
--hash table you are deriving from and casts the result. The linker hash
--table uses `bfd_link_hash_lookup' in `linker.c' (this actually takes an
--additional argument which it uses to decide how to return the looked up
--value).
--
-- You may want a traversal routine. This should just call the
--traversal routine of the hash table you are deriving from with
--appropriate casts. The linker hash table uses `bfd_link_hash_traverse'
--in `linker.c'.
--
-- These routines may simply be defined as macros. For example, the
--a.out backend linker hash table, which is derived from the linker hash
--table, uses macros for the lookup and traversal routines. These are
--`aout_link_hash_lookup' and `aout_link_hash_traverse' in aoutx.h.
--
--
--File: bfd.info, Node: BFD back ends, Next: GNU Free Documentation License, Prev: BFD front end, Up: Top
--
--3 BFD back ends
--***************
--
--* Menu:
--
--* What to Put Where::
--* aout :: a.out backends
--* coff :: coff backends
--* elf :: elf backends
--* mmo :: mmo backend
--
--
--File: bfd.info, Node: What to Put Where, Next: aout, Prev: BFD back ends, Up: BFD back ends
--
--3.1 What to Put Where
--=====================
--
--All of BFD lives in one directory.
--
--
--File: bfd.info, Node: aout, Next: coff, Prev: What to Put Where, Up: BFD back ends
--
--3.2 a.out backends
--==================
--
--*Description*
--BFD supports a number of different flavours of a.out format, though the
--major differences are only the sizes of the structures on disk, and the
--shape of the relocation information.
--
-- The support is split into a basic support file `aoutx.h' and other
--files which derive functions from the base. One derivation file is
--`aoutf1.h' (for a.out flavour 1), and adds to the basic a.out functions
--support for sun3, sun4, 386 and 29k a.out files, to create a target
--jump vector for a specific target.
--
-- This information is further split out into more specific files for
--each machine, including `sunos.c' for sun3 and sun4, `newsos3.c' for
--the Sony NEWS, and `demo64.c' for a demonstration of a 64 bit a.out
--format.
--
-- The base file `aoutx.h' defines general mechanisms for reading and
--writing records to and from disk and various other methods which BFD
--requires. It is included by `aout32.c' and `aout64.c' to form the names
--`aout_32_swap_exec_header_in', `aout_64_swap_exec_header_in', etc.
--
-- As an example, this is what goes on to make the back end for a sun4,
--from `aout32.c':
--
-- #define ARCH_SIZE 32
-- #include "aoutx.h"
--
-- Which exports names:
--
-- ...
-- aout_32_canonicalize_reloc
-- aout_32_find_nearest_line
-- aout_32_get_lineno
-- aout_32_get_reloc_upper_bound
-- ...
--
-- from `sunos.c':
--
-- #define TARGET_NAME "a.out-sunos-big"
-- #define VECNAME sunos_big_vec
-- #include "aoutf1.h"
--
-- requires all the names from `aout32.c', and produces the jump vector
--
-- sunos_big_vec
--
-- The file `host-aout.c' is a special case. It is for a large set of
--hosts that use "more or less standard" a.out files, and for which
--cross-debugging is not interesting. It uses the standard 32-bit a.out
--support routines, but determines the file offsets and addresses of the
--text, data, and BSS sections, the machine architecture and machine
--type, and the entry point address, in a host-dependent manner. Once
--these values have been determined, generic code is used to handle the
--object file.
--
-- When porting it to run on a new system, you must supply:
--
-- HOST_PAGE_SIZE
-- HOST_SEGMENT_SIZE
-- HOST_MACHINE_ARCH (optional)
-- HOST_MACHINE_MACHINE (optional)
-- HOST_TEXT_START_ADDR
-- HOST_STACK_END_ADDR
--
-- in the file `../include/sys/h-XXX.h' (for your host). These values,
--plus the structures and macros defined in `a.out.h' on your host
--system, will produce a BFD target that will access ordinary a.out files
--on your host. To configure a new machine to use `host-aout.c', specify:
--
-- TDEFAULTS = -DDEFAULT_VECTOR=host_aout_big_vec
-- TDEPFILES= host-aout.o trad-core.o
--
-- in the `config/XXX.mt' file, and modify `configure.in' to use the
--`XXX.mt' file (by setting "`bfd_target=XXX'") when your configuration
--is selected.
--
--3.2.1 Relocations
-------------------
--
--*Description*
--The file `aoutx.h' provides for both the _standard_ and _extended_
--forms of a.out relocation records.
--
-- The standard records contain only an address, a symbol index, and a
--type field. The extended records (used on 29ks and sparcs) also have a
--full integer for an addend.
--
--3.2.2 Internal entry points
-----------------------------
--
--*Description*
--`aoutx.h' exports several routines for accessing the contents of an
--a.out file, which are gathered and exported in turn by various format
--specific files (eg sunos.c).
--
--3.2.2.1 `aout_SIZE_swap_exec_header_in'
--.......................................
--
--*Synopsis*
-- void aout_SIZE_swap_exec_header_in,
-- (bfd *abfd,
-- struct external_exec *bytes,
-- struct internal_exec *execp);
-- *Description*
--Swap the information in an executable header RAW_BYTES taken from a raw
--byte stream memory image into the internal exec header structure EXECP.
--
--3.2.2.2 `aout_SIZE_swap_exec_header_out'
--........................................
--
--*Synopsis*
-- void aout_SIZE_swap_exec_header_out
-- (bfd *abfd,
-- struct internal_exec *execp,
-- struct external_exec *raw_bytes);
-- *Description*
--Swap the information in an internal exec header structure EXECP into
--the buffer RAW_BYTES ready for writing to disk.
--
--3.2.2.3 `aout_SIZE_some_aout_object_p'
--......................................
--
--*Synopsis*
-- const bfd_target *aout_SIZE_some_aout_object_p
-- (bfd *abfd,
-- struct internal_exec *execp,
-- const bfd_target *(*callback_to_real_object_p) (bfd *));
-- *Description*
--Some a.out variant thinks that the file open in ABFD checking is an
--a.out file. Do some more checking, and set up for access if it really
--is. Call back to the calling environment's "finish up" function just
--before returning, to handle any last-minute setup.
--
--3.2.2.4 `aout_SIZE_mkobject'
--............................
--
--*Synopsis*
-- bfd_boolean aout_SIZE_mkobject, (bfd *abfd);
-- *Description*
--Initialize BFD ABFD for use with a.out files.
--
--3.2.2.5 `aout_SIZE_machine_type'
--................................
--
--*Synopsis*
-- enum machine_type aout_SIZE_machine_type
-- (enum bfd_architecture arch,
-- unsigned long machine,
-- bfd_boolean *unknown);
-- *Description*
--Keep track of machine architecture and machine type for a.out's. Return
--the `machine_type' for a particular architecture and machine, or
--`M_UNKNOWN' if that exact architecture and machine can't be represented
--in a.out format.
--
-- If the architecture is understood, machine type 0 (default) is
--always understood.
--
--3.2.2.6 `aout_SIZE_set_arch_mach'
--.................................
--
--*Synopsis*
-- bfd_boolean aout_SIZE_set_arch_mach,
-- (bfd *,
-- enum bfd_architecture arch,
-- unsigned long machine);
-- *Description*
--Set the architecture and the machine of the BFD ABFD to the values ARCH
--and MACHINE. Verify that ABFD's format can support the architecture
--required.
--
--3.2.2.7 `aout_SIZE_new_section_hook'
--....................................
--
--*Synopsis*
-- bfd_boolean aout_SIZE_new_section_hook,
-- (bfd *abfd,
-- asection *newsect);
-- *Description*
--Called by the BFD in response to a `bfd_make_section' request.
--
--
--File: bfd.info, Node: coff, Next: elf, Prev: aout, Up: BFD back ends
--
--3.3 coff backends
--=================
--
--BFD supports a number of different flavours of coff format. The major
--differences between formats are the sizes and alignments of fields in
--structures on disk, and the occasional extra field.
--
-- Coff in all its varieties is implemented with a few common files and
--a number of implementation specific files. For example, The 88k bcs
--coff format is implemented in the file `coff-m88k.c'. This file
--`#include's `coff/m88k.h' which defines the external structure of the
--coff format for the 88k, and `coff/internal.h' which defines the
--internal structure. `coff-m88k.c' also defines the relocations used by
--the 88k format *Note Relocations::.
--
-- The Intel i960 processor version of coff is implemented in
--`coff-i960.c'. This file has the same structure as `coff-m88k.c',
--except that it includes `coff/i960.h' rather than `coff-m88k.h'.
--
--3.3.1 Porting to a new version of coff
----------------------------------------
--
--The recommended method is to select from the existing implementations
--the version of coff which is most like the one you want to use. For
--example, we'll say that i386 coff is the one you select, and that your
--coff flavour is called foo. Copy `i386coff.c' to `foocoff.c', copy
--`../include/coff/i386.h' to `../include/coff/foo.h', and add the lines
--to `targets.c' and `Makefile.in' so that your new back end is used.
--Alter the shapes of the structures in `../include/coff/foo.h' so that
--they match what you need. You will probably also have to add `#ifdef's
--to the code in `coff/internal.h' and `coffcode.h' if your version of
--coff is too wild.
--
-- You can verify that your new BFD backend works quite simply by
--building `objdump' from the `binutils' directory, and making sure that
--its version of what's going on and your host system's idea (assuming it
--has the pretty standard coff dump utility, usually called `att-dump' or
--just `dump') are the same. Then clean up your code, and send what
--you've done to Cygnus. Then your stuff will be in the next release, and
--you won't have to keep integrating it.
--
--3.3.2 How the coff backend works
----------------------------------
--
--3.3.2.1 File layout
--...................
--
--The Coff backend is split into generic routines that are applicable to
--any Coff target and routines that are specific to a particular target.
--The target-specific routines are further split into ones which are
--basically the same for all Coff targets except that they use the
--external symbol format or use different values for certain constants.
--
-- The generic routines are in `coffgen.c'. These routines work for
--any Coff target. They use some hooks into the target specific code;
--the hooks are in a `bfd_coff_backend_data' structure, one of which
--exists for each target.
--
-- The essentially similar target-specific routines are in
--`coffcode.h'. This header file includes executable C code. The
--various Coff targets first include the appropriate Coff header file,
--make any special defines that are needed, and then include `coffcode.h'.
--
-- Some of the Coff targets then also have additional routines in the
--target source file itself.
--
-- For example, `coff-i960.c' includes `coff/internal.h' and
--`coff/i960.h'. It then defines a few constants, such as `I960', and
--includes `coffcode.h'. Since the i960 has complex relocation types,
--`coff-i960.c' also includes some code to manipulate the i960 relocs.
--This code is not in `coffcode.h' because it would not be used by any
--other target.
--
--3.3.2.2 Coff long section names
--...............................
--
--In the standard Coff object format, section names are limited to the
--eight bytes available in the `s_name' field of the `SCNHDR' section
--header structure. The format requires the field to be NUL-padded, but
--not necessarily NUL-terminated, so the longest section names permitted
--are a full eight characters.
--
-- The Microsoft PE variants of the Coff object file format add an
--extension to support the use of long section names. This extension is
--defined in section 4 of the Microsoft PE/COFF specification (rev 8.1).
--If a section name is too long to fit into the section header's `s_name'
--field, it is instead placed into the string table, and the `s_name'
--field is filled with a slash ("/") followed by the ASCII decimal
--representation of the offset of the full name relative to the string
--table base.
--
-- Note that this implies that the extension can only be used in object
--files, as executables do not contain a string table. The standard
--specifies that long section names from objects emitted into executable
--images are to be truncated.
--
-- However, as a GNU extension, BFD can generate executable images that
--contain a string table and long section names. This would appear to be
--technically valid, as the standard only says that Coff debugging
--information is deprecated, not forbidden, and in practice it works,
--although some tools that parse PE files expecting the MS standard
--format may become confused; `PEview' is one known example.
--
-- The functionality is supported in BFD by code implemented under the
--control of the macro `COFF_LONG_SECTION_NAMES'. If not defined, the
--format does not support long section names in any way. If defined, it
--is used to initialise a flag, `_bfd_coff_long_section_names', and a
--hook function pointer, `_bfd_coff_set_long_section_names', in the Coff
--backend data structure. The flag controls the generation of long
--section names in output BFDs at runtime; if it is false, as it will be
--by default when generating an executable image, long section names are
--truncated; if true, the long section names extension is employed. The
--hook points to a function that allows the value of the flag to be
--altered at runtime, on formats that support long section names at all;
--on other formats it points to a stub that returns an error indication.
--
-- With input BFDs, the flag is set according to whether any long
--section names are detected while reading the section headers. For a
--completely new BFD, the flag is set to the default for the target
--format. This information can be used by a client of the BFD library
--when deciding what output format to generate, and means that a BFD that
--is opened for read and subsequently converted to a writeable BFD and
--modified in-place will retain whatever format it had on input.
--
-- If `COFF_LONG_SECTION_NAMES' is simply defined (blank), or is
--defined to the value "1", then long section names are enabled by
--default; if it is defined to the value zero, they are disabled by
--default (but still accepted in input BFDs). The header `coffcode.h'
--defines a macro, `COFF_DEFAULT_LONG_SECTION_NAMES', which is used in
--the backends to initialise the backend data structure fields
--appropriately; see the comments for further detail.
--
--3.3.2.3 Bit twiddling
--.....................
--
--Each flavour of coff supported in BFD has its own header file
--describing the external layout of the structures. There is also an
--internal description of the coff layout, in `coff/internal.h'. A major
--function of the coff backend is swapping the bytes and twiddling the
--bits to translate the external form of the structures into the normal
--internal form. This is all performed in the `bfd_swap'_thing_direction
--routines. Some elements are different sizes between different versions
--of coff; it is the duty of the coff version specific include file to
--override the definitions of various packing routines in `coffcode.h'.
--E.g., the size of line number entry in coff is sometimes 16 bits, and
--sometimes 32 bits. `#define'ing `PUT_LNSZ_LNNO' and `GET_LNSZ_LNNO'
--will select the correct one. No doubt, some day someone will find a
--version of coff which has a varying field size not catered to at the
--moment. To port BFD, that person will have to add more `#defines'.
--Three of the bit twiddling routines are exported to `gdb';
--`coff_swap_aux_in', `coff_swap_sym_in' and `coff_swap_lineno_in'. `GDB'
--reads the symbol table on its own, but uses BFD to fix things up. More
--of the bit twiddlers are exported for `gas'; `coff_swap_aux_out',
--`coff_swap_sym_out', `coff_swap_lineno_out', `coff_swap_reloc_out',
--`coff_swap_filehdr_out', `coff_swap_aouthdr_out',
--`coff_swap_scnhdr_out'. `Gas' currently keeps track of all the symbol
--table and reloc drudgery itself, thereby saving the internal BFD
--overhead, but uses BFD to swap things on the way out, making cross
--ports much safer. Doing so also allows BFD (and thus the linker) to
--use the same header files as `gas', which makes one avenue to disaster
--disappear.
--
--3.3.2.4 Symbol reading
--......................
--
--The simple canonical form for symbols used by BFD is not rich enough to
--keep all the information available in a coff symbol table. The back end
--gets around this problem by keeping the original symbol table around,
--"behind the scenes".
--
-- When a symbol table is requested (through a call to
--`bfd_canonicalize_symtab'), a request gets through to
--`coff_get_normalized_symtab'. This reads the symbol table from the coff
--file and swaps all the structures inside into the internal form. It
--also fixes up all the pointers in the table (represented in the file by
--offsets from the first symbol in the table) into physical pointers to
--elements in the new internal table. This involves some work since the
--meanings of fields change depending upon context: a field that is a
--pointer to another structure in the symbol table at one moment may be
--the size in bytes of a structure at the next. Another pass is made
--over the table. All symbols which mark file names (`C_FILE' symbols)
--are modified so that the internal string points to the value in the
--auxent (the real filename) rather than the normal text associated with
--the symbol (`".file"').
--
-- At this time the symbol names are moved around. Coff stores all
--symbols less than nine characters long physically within the symbol
--table; longer strings are kept at the end of the file in the string
--table. This pass moves all strings into memory and replaces them with
--pointers to the strings.
--
-- The symbol table is massaged once again, this time to create the
--canonical table used by the BFD application. Each symbol is inspected
--in turn, and a decision made (using the `sclass' field) about the
--various flags to set in the `asymbol'. *Note Symbols::. The generated
--canonical table shares strings with the hidden internal symbol table.
--
-- Any linenumbers are read from the coff file too, and attached to the
--symbols which own the functions the linenumbers belong to.
--
--3.3.2.5 Symbol writing
--......................
--
--Writing a symbol to a coff file which didn't come from a coff file will
--lose any debugging information. The `asymbol' structure remembers the
--BFD from which the symbol was taken, and on output the back end makes
--sure that the same destination target as source target is present.
--
-- When the symbols have come from a coff file then all the debugging
--information is preserved.
--
-- Symbol tables are provided for writing to the back end in a vector
--of pointers to pointers. This allows applications like the linker to
--accumulate and output large symbol tables without having to do too much
--byte copying.
--
-- This function runs through the provided symbol table and patches
--each symbol marked as a file place holder (`C_FILE') to point to the
--next file place holder in the list. It also marks each `offset' field
--in the list with the offset from the first symbol of the current symbol.
--
-- Another function of this procedure is to turn the canonical value
--form of BFD into the form used by coff. Internally, BFD expects symbol
--values to be offsets from a section base; so a symbol physically at
--0x120, but in a section starting at 0x100, would have the value 0x20.
--Coff expects symbols to contain their final value, so symbols have
--their values changed at this point to reflect their sum with their
--owning section. This transformation uses the `output_section' field of
--the `asymbol''s `asection' *Note Sections::.
--
-- * `coff_mangle_symbols'
-- This routine runs though the provided symbol table and uses the
--offsets generated by the previous pass and the pointers generated when
--the symbol table was read in to create the structured hierarchy
--required by coff. It changes each pointer to a symbol into the index
--into the symbol table of the asymbol.
--
-- * `coff_write_symbols'
-- This routine runs through the symbol table and patches up the
--symbols from their internal form into the coff way, calls the bit
--twiddlers, and writes out the table to the file.
--
--3.3.2.6 `coff_symbol_type'
--..........................
--
--*Description*
--The hidden information for an `asymbol' is described in a
--`combined_entry_type':
--
--
-- typedef struct coff_ptr_struct
-- {
-- /* Remembers the offset from the first symbol in the file for
-- this symbol. Generated by coff_renumber_symbols. */
-- unsigned int offset;
--
-- /* Should the value of this symbol be renumbered. Used for
-- XCOFF C_BSTAT symbols. Set by coff_slurp_symbol_table. */
-- unsigned int fix_value : 1;
--
-- /* Should the tag field of this symbol be renumbered.
-- Created by coff_pointerize_aux. */
-- unsigned int fix_tag : 1;
--
-- /* Should the endidx field of this symbol be renumbered.
-- Created by coff_pointerize_aux. */
-- unsigned int fix_end : 1;
--
-- /* Should the x_csect.x_scnlen field be renumbered.
-- Created by coff_pointerize_aux. */
-- unsigned int fix_scnlen : 1;
--
-- /* Fix up an XCOFF C_BINCL/C_EINCL symbol. The value is the
-- index into the line number entries. Set by coff_slurp_symbol_table. */
-- unsigned int fix_line : 1;
--
-- /* The container for the symbol structure as read and translated
-- from the file. */
-- union
-- {
-- union internal_auxent auxent;
-- struct internal_syment syment;
-- } u;
-- } combined_entry_type;
--
--
-- /* Each canonical asymbol really looks like this: */
--
-- typedef struct coff_symbol_struct
-- {
-- /* The actual symbol which the rest of BFD works with */
-- asymbol symbol;
--
-- /* A pointer to the hidden information for this symbol */
-- combined_entry_type *native;
--
-- /* A pointer to the linenumber information for this symbol */
-- struct lineno_cache_entry *lineno;
--
-- /* Have the line numbers been relocated yet ? */
-- bfd_boolean done_lineno;
-- } coff_symbol_type;
--
--3.3.2.7 `bfd_coff_backend_data'
--...............................
--
-- /* COFF symbol classifications. */
--
-- enum coff_symbol_classification
-- {
-- /* Global symbol. */
-- COFF_SYMBOL_GLOBAL,
-- /* Common symbol. */
-- COFF_SYMBOL_COMMON,
-- /* Undefined symbol. */
-- COFF_SYMBOL_UNDEFINED,
-- /* Local symbol. */
-- COFF_SYMBOL_LOCAL,
-- /* PE section symbol. */
-- COFF_SYMBOL_PE_SECTION
-- };
--Special entry points for gdb to swap in coff symbol table parts:
-- typedef struct
-- {
-- void (*_bfd_coff_swap_aux_in)
-- (bfd *, void *, int, int, int, int, void *);
--
-- void (*_bfd_coff_swap_sym_in)
-- (bfd *, void *, void *);
--
-- void (*_bfd_coff_swap_lineno_in)
-- (bfd *, void *, void *);
--
-- unsigned int (*_bfd_coff_swap_aux_out)
-- (bfd *, void *, int, int, int, int, void *);
--
-- unsigned int (*_bfd_coff_swap_sym_out)
-- (bfd *, void *, void *);
--
-- unsigned int (*_bfd_coff_swap_lineno_out)
-- (bfd *, void *, void *);
--
-- unsigned int (*_bfd_coff_swap_reloc_out)
-- (bfd *, void *, void *);
--
-- unsigned int (*_bfd_coff_swap_filehdr_out)
-- (bfd *, void *, void *);
--
-- unsigned int (*_bfd_coff_swap_aouthdr_out)
-- (bfd *, void *, void *);
--
-- unsigned int (*_bfd_coff_swap_scnhdr_out)
-- (bfd *, void *, void *);
--
-- unsigned int _bfd_filhsz;
-- unsigned int _bfd_aoutsz;
-- unsigned int _bfd_scnhsz;
-- unsigned int _bfd_symesz;
-- unsigned int _bfd_auxesz;
-- unsigned int _bfd_relsz;
-- unsigned int _bfd_linesz;
-- unsigned int _bfd_filnmlen;
-- bfd_boolean _bfd_coff_long_filenames;
--
-- bfd_boolean _bfd_coff_long_section_names;
-- bfd_boolean (*_bfd_coff_set_long_section_names)
-- (bfd *, int);
--
-- unsigned int _bfd_coff_default_section_alignment_power;
-- bfd_boolean _bfd_coff_force_symnames_in_strings;
-- unsigned int _bfd_coff_debug_string_prefix_length;
--
-- void (*_bfd_coff_swap_filehdr_in)
-- (bfd *, void *, void *);
--
-- void (*_bfd_coff_swap_aouthdr_in)
-- (bfd *, void *, void *);
--
-- void (*_bfd_coff_swap_scnhdr_in)
-- (bfd *, void *, void *);
--
-- void (*_bfd_coff_swap_reloc_in)
-- (bfd *abfd, void *, void *);
--
-- bfd_boolean (*_bfd_coff_bad_format_hook)
-- (bfd *, void *);
--
-- bfd_boolean (*_bfd_coff_set_arch_mach_hook)
-- (bfd *, void *);
--
-- void * (*_bfd_coff_mkobject_hook)
-- (bfd *, void *, void *);
--
-- bfd_boolean (*_bfd_styp_to_sec_flags_hook)
-- (bfd *, void *, const char *, asection *, flagword *);
--
-- void (*_bfd_set_alignment_hook)
-- (bfd *, asection *, void *);
--
-- bfd_boolean (*_bfd_coff_slurp_symbol_table)
-- (bfd *);
--
-- bfd_boolean (*_bfd_coff_symname_in_debug)
-- (bfd *, struct internal_syment *);
--
-- bfd_boolean (*_bfd_coff_pointerize_aux_hook)
-- (bfd *, combined_entry_type *, combined_entry_type *,
-- unsigned int, combined_entry_type *);
--
-- bfd_boolean (*_bfd_coff_print_aux)
-- (bfd *, FILE *, combined_entry_type *, combined_entry_type *,
-- combined_entry_type *, unsigned int);
--
-- void (*_bfd_coff_reloc16_extra_cases)
-- (bfd *, struct bfd_link_info *, struct bfd_link_order *, arelent *,
-- bfd_byte *, unsigned int *, unsigned int *);
--
-- int (*_bfd_coff_reloc16_estimate)
-- (bfd *, asection *, arelent *, unsigned int,
-- struct bfd_link_info *);
--
-- enum coff_symbol_classification (*_bfd_coff_classify_symbol)
-- (bfd *, struct internal_syment *);
--
-- bfd_boolean (*_bfd_coff_compute_section_file_positions)
-- (bfd *);
--
-- bfd_boolean (*_bfd_coff_start_final_link)
-- (bfd *, struct bfd_link_info *);
--
-- bfd_boolean (*_bfd_coff_relocate_section)
-- (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
-- struct internal_reloc *, struct internal_syment *, asection **);
--
-- reloc_howto_type *(*_bfd_coff_rtype_to_howto)
-- (bfd *, asection *, struct internal_reloc *,
-- struct coff_link_hash_entry *, struct internal_syment *,
-- bfd_vma *);
--
-- bfd_boolean (*_bfd_coff_adjust_symndx)
-- (bfd *, struct bfd_link_info *, bfd *, asection *,
-- struct internal_reloc *, bfd_boolean *);
--
-- bfd_boolean (*_bfd_coff_link_add_one_symbol)
-- (struct bfd_link_info *, bfd *, const char *, flagword,
-- asection *, bfd_vma, const char *, bfd_boolean, bfd_boolean,
-- struct bfd_link_hash_entry **);
--
-- bfd_boolean (*_bfd_coff_link_output_has_begun)
-- (bfd *, struct coff_final_link_info *);
--
-- bfd_boolean (*_bfd_coff_final_link_postscript)
-- (bfd *, struct coff_final_link_info *);
--
-- bfd_boolean (*_bfd_coff_print_pdata)
-- (bfd *, void *);
--
-- } bfd_coff_backend_data;
--
-- #define coff_backend_info(abfd) \
-- ((bfd_coff_backend_data *) (abfd)->xvec->backend_data)
--
-- #define bfd_coff_swap_aux_in(a,e,t,c,ind,num,i) \
-- ((coff_backend_info (a)->_bfd_coff_swap_aux_in) (a,e,t,c,ind,num,i))
--
-- #define bfd_coff_swap_sym_in(a,e,i) \
-- ((coff_backend_info (a)->_bfd_coff_swap_sym_in) (a,e,i))
--
-- #define bfd_coff_swap_lineno_in(a,e,i) \
-- ((coff_backend_info ( a)->_bfd_coff_swap_lineno_in) (a,e,i))
--
-- #define bfd_coff_swap_reloc_out(abfd, i, o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_reloc_out) (abfd, i, o))
--
-- #define bfd_coff_swap_lineno_out(abfd, i, o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_lineno_out) (abfd, i, o))
--
-- #define bfd_coff_swap_aux_out(a,i,t,c,ind,num,o) \
-- ((coff_backend_info (a)->_bfd_coff_swap_aux_out) (a,i,t,c,ind,num,o))
--
-- #define bfd_coff_swap_sym_out(abfd, i,o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_sym_out) (abfd, i, o))
--
-- #define bfd_coff_swap_scnhdr_out(abfd, i,o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_scnhdr_out) (abfd, i, o))
--
-- #define bfd_coff_swap_filehdr_out(abfd, i,o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_filehdr_out) (abfd, i, o))
--
-- #define bfd_coff_swap_aouthdr_out(abfd, i,o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_aouthdr_out) (abfd, i, o))
--
-- #define bfd_coff_filhsz(abfd) (coff_backend_info (abfd)->_bfd_filhsz)
-- #define bfd_coff_aoutsz(abfd) (coff_backend_info (abfd)->_bfd_aoutsz)
-- #define bfd_coff_scnhsz(abfd) (coff_backend_info (abfd)->_bfd_scnhsz)
-- #define bfd_coff_symesz(abfd) (coff_backend_info (abfd)->_bfd_symesz)
-- #define bfd_coff_auxesz(abfd) (coff_backend_info (abfd)->_bfd_auxesz)
-- #define bfd_coff_relsz(abfd) (coff_backend_info (abfd)->_bfd_relsz)
-- #define bfd_coff_linesz(abfd) (coff_backend_info (abfd)->_bfd_linesz)
-- #define bfd_coff_filnmlen(abfd) (coff_backend_info (abfd)->_bfd_filnmlen)
-- #define bfd_coff_long_filenames(abfd) \
-- (coff_backend_info (abfd)->_bfd_coff_long_filenames)
-- #define bfd_coff_long_section_names(abfd) \
-- (coff_backend_info (abfd)->_bfd_coff_long_section_names)
-- #define bfd_coff_set_long_section_names(abfd, enable) \
-- ((coff_backend_info (abfd)->_bfd_coff_set_long_section_names) (abfd, enable))
-- #define bfd_coff_default_section_alignment_power(abfd) \
-- (coff_backend_info (abfd)->_bfd_coff_default_section_alignment_power)
-- #define bfd_coff_swap_filehdr_in(abfd, i,o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_filehdr_in) (abfd, i, o))
--
-- #define bfd_coff_swap_aouthdr_in(abfd, i,o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_aouthdr_in) (abfd, i, o))
--
-- #define bfd_coff_swap_scnhdr_in(abfd, i,o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_scnhdr_in) (abfd, i, o))
--
-- #define bfd_coff_swap_reloc_in(abfd, i, o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_reloc_in) (abfd, i, o))
--
-- #define bfd_coff_bad_format_hook(abfd, filehdr) \
-- ((coff_backend_info (abfd)->_bfd_coff_bad_format_hook) (abfd, filehdr))
--
-- #define bfd_coff_set_arch_mach_hook(abfd, filehdr)\
-- ((coff_backend_info (abfd)->_bfd_coff_set_arch_mach_hook) (abfd, filehdr))
-- #define bfd_coff_mkobject_hook(abfd, filehdr, aouthdr)\
-- ((coff_backend_info (abfd)->_bfd_coff_mkobject_hook)\
-- (abfd, filehdr, aouthdr))
--
-- #define bfd_coff_styp_to_sec_flags_hook(abfd, scnhdr, name, section, flags_ptr)\
-- ((coff_backend_info (abfd)->_bfd_styp_to_sec_flags_hook)\
-- (abfd, scnhdr, name, section, flags_ptr))
--
-- #define bfd_coff_set_alignment_hook(abfd, sec, scnhdr)\
-- ((coff_backend_info (abfd)->_bfd_set_alignment_hook) (abfd, sec, scnhdr))
--
-- #define bfd_coff_slurp_symbol_table(abfd)\
-- ((coff_backend_info (abfd)->_bfd_coff_slurp_symbol_table) (abfd))
--
-- #define bfd_coff_symname_in_debug(abfd, sym)\
-- ((coff_backend_info (abfd)->_bfd_coff_symname_in_debug) (abfd, sym))
--
-- #define bfd_coff_force_symnames_in_strings(abfd)\
-- (coff_backend_info (abfd)->_bfd_coff_force_symnames_in_strings)
--
-- #define bfd_coff_debug_string_prefix_length(abfd)\
-- (coff_backend_info (abfd)->_bfd_coff_debug_string_prefix_length)
--
-- #define bfd_coff_print_aux(abfd, file, base, symbol, aux, indaux)\
-- ((coff_backend_info (abfd)->_bfd_coff_print_aux)\
-- (abfd, file, base, symbol, aux, indaux))
--
-- #define bfd_coff_reloc16_extra_cases(abfd, link_info, link_order,\
-- reloc, data, src_ptr, dst_ptr)\
-- ((coff_backend_info (abfd)->_bfd_coff_reloc16_extra_cases)\
-- (abfd, link_info, link_order, reloc, data, src_ptr, dst_ptr))
--
-- #define bfd_coff_reloc16_estimate(abfd, section, reloc, shrink, link_info)\
-- ((coff_backend_info (abfd)->_bfd_coff_reloc16_estimate)\
-- (abfd, section, reloc, shrink, link_info))
--
-- #define bfd_coff_classify_symbol(abfd, sym)\
-- ((coff_backend_info (abfd)->_bfd_coff_classify_symbol)\
-- (abfd, sym))
--
-- #define bfd_coff_compute_section_file_positions(abfd)\
-- ((coff_backend_info (abfd)->_bfd_coff_compute_section_file_positions)\
-- (abfd))
--
-- #define bfd_coff_start_final_link(obfd, info)\
-- ((coff_backend_info (obfd)->_bfd_coff_start_final_link)\
-- (obfd, info))
-- #define bfd_coff_relocate_section(obfd,info,ibfd,o,con,rel,isyms,secs)\
-- ((coff_backend_info (ibfd)->_bfd_coff_relocate_section)\
-- (obfd, info, ibfd, o, con, rel, isyms, secs))
-- #define bfd_coff_rtype_to_howto(abfd, sec, rel, h, sym, addendp)\
-- ((coff_backend_info (abfd)->_bfd_coff_rtype_to_howto)\
-- (abfd, sec, rel, h, sym, addendp))
-- #define bfd_coff_adjust_symndx(obfd, info, ibfd, sec, rel, adjustedp)\
-- ((coff_backend_info (abfd)->_bfd_coff_adjust_symndx)\
-- (obfd, info, ibfd, sec, rel, adjustedp))
-- #define bfd_coff_link_add_one_symbol(info, abfd, name, flags, section,\
-- value, string, cp, coll, hashp)\
-- ((coff_backend_info (abfd)->_bfd_coff_link_add_one_symbol)\
-- (info, abfd, name, flags, section, value, string, cp, coll, hashp))
--
-- #define bfd_coff_link_output_has_begun(a,p) \
-- ((coff_backend_info (a)->_bfd_coff_link_output_has_begun) (a, p))
-- #define bfd_coff_final_link_postscript(a,p) \
-- ((coff_backend_info (a)->_bfd_coff_final_link_postscript) (a, p))
--
-- #define bfd_coff_have_print_pdata(a) \
-- (coff_backend_info (a)->_bfd_coff_print_pdata)
-- #define bfd_coff_print_pdata(a,p) \
-- ((coff_backend_info (a)->_bfd_coff_print_pdata) (a, p))
--
-- /* Macro: Returns true if the bfd is a PE executable as opposed to a
-- PE object file. */
-- #define bfd_pei_p(abfd) \
-- (CONST_STRNEQ ((abfd)->xvec->name, "pei-"))
--
--3.3.2.8 Writing relocations
--...........................
--
--To write relocations, the back end steps though the canonical
--relocation table and create an `internal_reloc'. The symbol index to
--use is removed from the `offset' field in the symbol table supplied.
--The address comes directly from the sum of the section base address and
--the relocation offset; the type is dug directly from the howto field.
--Then the `internal_reloc' is swapped into the shape of an
--`external_reloc' and written out to disk.
--
--3.3.2.9 Reading linenumbers
--...........................
--
--Creating the linenumber table is done by reading in the entire coff
--linenumber table, and creating another table for internal use.
--
-- A coff linenumber table is structured so that each function is
--marked as having a line number of 0. Each line within the function is
--an offset from the first line in the function. The base of the line
--number information for the table is stored in the symbol associated
--with the function.
--
-- Note: The PE format uses line number 0 for a flag indicating a new
--source file.
--
-- The information is copied from the external to the internal table,
--and each symbol which marks a function is marked by pointing its...
--
-- How does this work ?
--
--3.3.2.10 Reading relocations
--............................
--
--Coff relocations are easily transformed into the internal BFD form
--(`arelent').
--
-- Reading a coff relocation table is done in the following stages:
--
-- * Read the entire coff relocation table into memory.
--
-- * Process each relocation in turn; first swap it from the external
-- to the internal form.
--
-- * Turn the symbol referenced in the relocation's symbol index into a
-- pointer into the canonical symbol table. This table is the same
-- as the one returned by a call to `bfd_canonicalize_symtab'. The
-- back end will call that routine and save the result if a
-- canonicalization hasn't been done.
--
-- * The reloc index is turned into a pointer to a howto structure, in
-- a back end specific way. For instance, the 386 and 960 use the
-- `r_type' to directly produce an index into a howto table vector;
-- the 88k subtracts a number from the `r_type' field and creates an
-- addend field.
--
--
--File: bfd.info, Node: elf, Next: mmo, Prev: coff, Up: BFD back ends
--
--3.4 ELF backends
--================
--
--BFD support for ELF formats is being worked on. Currently, the best
--supported back ends are for sparc and i386 (running svr4 or Solaris 2).
--
-- Documentation of the internals of the support code still needs to be
--written. The code is changing quickly enough that we haven't bothered
--yet.
--
--
--File: bfd.info, Node: mmo, Prev: elf, Up: BFD back ends
--
--3.5 mmo backend
--===============
--
--The mmo object format is used exclusively together with Professor
--Donald E. Knuth's educational 64-bit processor MMIX. The simulator
--`mmix' which is available at
--`http://www-cs-faculty.stanford.edu/~knuth/programs/mmix.tar.gz'
--understands this format. That package also includes a combined
--assembler and linker called `mmixal'. The mmo format has no advantages
--feature-wise compared to e.g. ELF. It is a simple non-relocatable
--object format with no support for archives or debugging information,
--except for symbol value information and line numbers (which is not yet
--implemented in BFD). See
--`http://www-cs-faculty.stanford.edu/~knuth/mmix.html' for more
--information about MMIX. The ELF format is used for intermediate object
--files in the BFD implementation.
--
--* Menu:
--
--* File layout::
--* Symbol-table::
--* mmo section mapping::
--
--
--File: bfd.info, Node: File layout, Next: Symbol-table, Prev: mmo, Up: mmo
--
--3.5.1 File layout
-------------------
--
--The mmo file contents is not partitioned into named sections as with
--e.g. ELF. Memory areas is formed by specifying the location of the
--data that follows. Only the memory area `0x0000...00' to `0x01ff...ff'
--is executable, so it is used for code (and constants) and the area
--`0x2000...00' to `0x20ff...ff' is used for writable data. *Note mmo
--section mapping::.
--
-- There is provision for specifying "special data" of 65536 different
--types. We use type 80 (decimal), arbitrarily chosen the same as the
--ELF `e_machine' number for MMIX, filling it with section information
--normally found in ELF objects. *Note mmo section mapping::.
--
-- Contents is entered as 32-bit words, xor:ed over previous contents,
--always zero-initialized. A word that starts with the byte `0x98' forms
--a command called a `lopcode', where the next byte distinguished between
--the thirteen lopcodes. The two remaining bytes, called the `Y' and `Z'
--fields, or the `YZ' field (a 16-bit big-endian number), are used for
--various purposes different for each lopcode. As documented in
--`http://www-cs-faculty.stanford.edu/~knuth/mmixal-intro.ps.gz', the
--lopcodes are:
--
--`lop_quote'
-- 0x98000001. The next word is contents, regardless of whether it
-- starts with 0x98 or not.
--
--`lop_loc'
-- 0x9801YYZZ, where `Z' is 1 or 2. This is a location directive,
-- setting the location for the next data to the next 32-bit word
-- (for Z = 1) or 64-bit word (for Z = 2), plus Y * 2^56. Normally
-- `Y' is 0 for the text segment and 2 for the data segment.
--
--`lop_skip'
-- 0x9802YYZZ. Increase the current location by `YZ' bytes.
--
--`lop_fixo'
-- 0x9803YYZZ, where `Z' is 1 or 2. Store the current location as 64
-- bits into the location pointed to by the next 32-bit (Z = 1) or
-- 64-bit (Z = 2) word, plus Y * 2^56.
--
--`lop_fixr'
-- 0x9804YYZZ. `YZ' is stored into the current location plus 2 - 4 *
-- YZ.
--
--`lop_fixrx'
-- 0x980500ZZ. `Z' is 16 or 24. A value `L' derived from the
-- following 32-bit word are used in a manner similar to `YZ' in
-- lop_fixr: it is xor:ed into the current location minus 4 * L. The
-- first byte of the word is 0 or 1. If it is 1, then L = (LOWEST 24
-- BITS OF WORD) - 2^Z, if 0, then L = (LOWEST 24 BITS OF WORD).
--
--`lop_file'
-- 0x9806YYZZ. `Y' is the file number, `Z' is count of 32-bit words.
-- Set the file number to `Y' and the line counter to 0. The next Z
-- * 4 bytes contain the file name, padded with zeros if the count is
-- not a multiple of four. The same `Y' may occur multiple times,
-- but `Z' must be 0 for all but the first occurrence.
--
--`lop_line'
-- 0x9807YYZZ. `YZ' is the line number. Together with lop_file, it
-- forms the source location for the next 32-bit word. Note that for
-- each non-lopcode 32-bit word, line numbers are assumed incremented
-- by one.
--
--`lop_spec'
-- 0x9808YYZZ. `YZ' is the type number. Data until the next lopcode
-- other than lop_quote forms special data of type `YZ'. *Note mmo
-- section mapping::.
--
-- Other types than 80, (or type 80 with a content that does not
-- parse) is stored in sections named `.MMIX.spec_data.N' where N is
-- the `YZ'-type. The flags for such a sections say not to allocate
-- or load the data. The vma is 0. Contents of multiple occurrences
-- of special data N is concatenated to the data of the previous
-- lop_spec Ns. The location in data or code at which the lop_spec
-- occurred is lost.
--
--`lop_pre'
-- 0x980901ZZ. The first lopcode in a file. The `Z' field forms the
-- length of header information in 32-bit words, where the first word
-- tells the time in seconds since `00:00:00 GMT Jan 1 1970'.
--
--`lop_post'
-- 0x980a00ZZ. Z > 32. This lopcode follows after all
-- content-generating lopcodes in a program. The `Z' field denotes
-- the value of `rG' at the beginning of the program. The following
-- 256 - Z big-endian 64-bit words are loaded into global registers
-- `$G' ... `$255'.
--
--`lop_stab'
-- 0x980b0000. The next-to-last lopcode in a program. Must follow
-- immediately after the lop_post lopcode and its data. After this
-- lopcode follows all symbols in a compressed format (*note
-- Symbol-table::).
--
--`lop_end'
-- 0x980cYYZZ. The last lopcode in a program. It must follow the
-- lop_stab lopcode and its data. The `YZ' field contains the number
-- of 32-bit words of symbol table information after the preceding
-- lop_stab lopcode.
--
-- Note that the lopcode "fixups"; `lop_fixr', `lop_fixrx' and
--`lop_fixo' are not generated by BFD, but are handled. They are
--generated by `mmixal'.
--
-- This trivial one-label, one-instruction file:
--
-- :Main TRAP 1,2,3
--
-- can be represented this way in mmo:
--
-- 0x98090101 - lop_pre, one 32-bit word with timestamp.
-- <timestamp>
-- 0x98010002 - lop_loc, text segment, using a 64-bit address.
-- Note that mmixal does not emit this for the file above.
-- 0x00000000 - Address, high 32 bits.
-- 0x00000000 - Address, low 32 bits.
-- 0x98060002 - lop_file, 2 32-bit words for file-name.
-- 0x74657374 - "test"
-- 0x2e730000 - ".s\0\0"
-- 0x98070001 - lop_line, line 1.
-- 0x00010203 - TRAP 1,2,3
-- 0x980a00ff - lop_post, setting $255 to 0.
-- 0x00000000
-- 0x00000000
-- 0x980b0000 - lop_stab for ":Main" = 0, serial 1.
-- 0x203a4040 *Note Symbol-table::.
-- 0x10404020
-- 0x4d206120
-- 0x69016e00
-- 0x81000000
-- 0x980c0005 - lop_end; symbol table contained five 32-bit words.
--
--
--File: bfd.info, Node: Symbol-table, Next: mmo section mapping, Prev: File layout, Up: mmo
--
--3.5.2 Symbol table format
---------------------------
--
--From mmixal.w (or really, the generated mmixal.tex) in
--`http://www-cs-faculty.stanford.edu/~knuth/programs/mmix.tar.gz'):
--"Symbols are stored and retrieved by means of a `ternary search trie',
--following ideas of Bentley and Sedgewick. (See ACM-SIAM Symp. on
--Discrete Algorithms `8' (1997), 360-369; R.Sedgewick, `Algorithms in C'
--(Reading, Mass. Addison-Wesley, 1998), `15.4'.) Each trie node stores
--a character, and there are branches to subtries for the cases where a
--given character is less than, equal to, or greater than the character
--in the trie. There also is a pointer to a symbol table entry if a
--symbol ends at the current node."
--
-- So it's a tree encoded as a stream of bytes. The stream of bytes
--acts on a single virtual global symbol, adding and removing characters
--and signalling complete symbol points. Here, we read the stream and
--create symbols at the completion points.
--
-- First, there's a control byte `m'. If any of the listed bits in `m'
--is nonzero, we execute what stands at the right, in the listed order:
--
-- (MMO3_LEFT)
-- 0x40 - Traverse left trie.
-- (Read a new command byte and recurse.)
--
-- (MMO3_SYMBITS)
-- 0x2f - Read the next byte as a character and store it in the
-- current character position; increment character position.
-- Test the bits of `m':
--
-- (MMO3_WCHAR)
-- 0x80 - The character is 16-bit (so read another byte,
-- merge into current character.
--
-- (MMO3_TYPEBITS)
-- 0xf - We have a complete symbol; parse the type, value
-- and serial number and do what should be done
-- with a symbol. The type and length information
-- is in j = (m & 0xf).
--
-- (MMO3_REGQUAL_BITS)
-- j == 0xf: A register variable. The following
-- byte tells which register.
-- j <= 8: An absolute symbol. Read j bytes as the
-- big-endian number the symbol equals.
-- A j = 2 with two zero bytes denotes an
-- unknown symbol.
-- j > 8: As with j <= 8, but add (0x20 << 56)
-- to the value in the following j - 8
-- bytes.
--
-- Then comes the serial number, as a variant of
-- uleb128, but better named ubeb128:
-- Read bytes and shift the previous value left 7
-- (multiply by 128). Add in the new byte, repeat
-- until a byte has bit 7 set. The serial number
-- is the computed value minus 128.
--
-- (MMO3_MIDDLE)
-- 0x20 - Traverse middle trie. (Read a new command byte
-- and recurse.) Decrement character position.
--
-- (MMO3_RIGHT)
-- 0x10 - Traverse right trie. (Read a new command byte and
-- recurse.)
--
-- Let's look again at the `lop_stab' for the trivial file (*note File
--layout::).
--
-- 0x980b0000 - lop_stab for ":Main" = 0, serial 1.
-- 0x203a4040
-- 0x10404020
-- 0x4d206120
-- 0x69016e00
-- 0x81000000
--
-- This forms the trivial trie (note that the path between ":" and "M"
--is redundant):
--
-- 203a ":"
-- 40 /
-- 40 /
-- 10 \
-- 40 /
-- 40 /
-- 204d "M"
-- 2061 "a"
-- 2069 "i"
-- 016e "n" is the last character in a full symbol, and
-- with a value represented in one byte.
-- 00 The value is 0.
-- 81 The serial number is 1.
--
--
--File: bfd.info, Node: mmo section mapping, Prev: Symbol-table, Up: mmo
--
--3.5.3 mmo section mapping
---------------------------
--
--The implementation in BFD uses special data type 80 (decimal) to
--encapsulate and describe named sections, containing e.g. debug
--information. If needed, any datum in the encapsulation will be quoted
--using lop_quote. First comes a 32-bit word holding the number of
--32-bit words containing the zero-terminated zero-padded segment name.
--After the name there's a 32-bit word holding flags describing the
--section type. Then comes a 64-bit big-endian word with the section
--length (in bytes), then another with the section start address.
--Depending on the type of section, the contents might follow,
--zero-padded to 32-bit boundary. For a loadable section (such as data
--or code), the contents might follow at some later point, not
--necessarily immediately, as a lop_loc with the same start address as in
--the section description, followed by the contents. This in effect
--forms a descriptor that must be emitted before the actual contents.
--Sections described this way must not overlap.
--
-- For areas that don't have such descriptors, synthetic sections are
--formed by BFD. Consecutive contents in the two memory areas
--`0x0000...00' to `0x01ff...ff' and `0x2000...00' to `0x20ff...ff' are
--entered in sections named `.text' and `.data' respectively. If an area
--is not otherwise described, but would together with a neighboring lower
--area be less than `0x40000000' bytes long, it is joined with the lower
--area and the gap is zero-filled. For other cases, a new section is
--formed, named `.MMIX.sec.N'. Here, N is a number, a running count
--through the mmo file, starting at 0.
--
-- A loadable section specified as:
--
-- .section secname,"ax"
-- TETRA 1,2,3,4,-1,-2009
-- BYTE 80
--
-- and linked to address `0x4', is represented by the sequence:
--
-- 0x98080050 - lop_spec 80
-- 0x00000002 - two 32-bit words for the section name
-- 0x7365636e - "secn"
-- 0x616d6500 - "ame\0"
-- 0x00000033 - flags CODE, READONLY, LOAD, ALLOC
-- 0x00000000 - high 32 bits of section length
-- 0x0000001c - section length is 28 bytes; 6 * 4 + 1 + alignment to 32 bits
-- 0x00000000 - high 32 bits of section address
-- 0x00000004 - section address is 4
-- 0x98010002 - 64 bits with address of following data
-- 0x00000000 - high 32 bits of address
-- 0x00000004 - low 32 bits: data starts at address 4
-- 0x00000001 - 1
-- 0x00000002 - 2
-- 0x00000003 - 3
-- 0x00000004 - 4
-- 0xffffffff - -1
-- 0xfffff827 - -2009
-- 0x50000000 - 80 as a byte, padded with zeros.
--
-- Note that the lop_spec wrapping does not include the section
--contents. Compare this to a non-loaded section specified as:
--
-- .section thirdsec
-- TETRA 200001,100002
-- BYTE 38,40
--
-- This, when linked to address `0x200000000000001c', is represented by:
--
-- 0x98080050 - lop_spec 80
-- 0x00000002 - two 32-bit words for the section name
-- 0x7365636e - "thir"
-- 0x616d6500 - "dsec"
-- 0x00000010 - flag READONLY
-- 0x00000000 - high 32 bits of section length
-- 0x0000000c - section length is 12 bytes; 2 * 4 + 2 + alignment to 32 bits
-- 0x20000000 - high 32 bits of address
-- 0x0000001c - low 32 bits of address 0x200000000000001c
-- 0x00030d41 - 200001
-- 0x000186a2 - 100002
-- 0x26280000 - 38, 40 as bytes, padded with zeros
--
-- For the latter example, the section contents must not be loaded in
--memory, and is therefore specified as part of the special data. The
--address is usually unimportant but might provide information for e.g.
--the DWARF 2 debugging format.
--
--
--File: bfd.info, Node: GNU Free Documentation License, Next: BFD Index, Prev: BFD back ends, Up: Top
--
-- Version 1.3, 3 November 2008
--
-- Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
-- `http://fsf.org/'
--
-- Everyone is permitted to copy and distribute verbatim copies
-- of this license document, but changing it is not allowed.
--
-- 0. PREAMBLE
--
-- The purpose of this License is to make a manual, textbook, or other
-- functional and useful document "free" in the sense of freedom: to
-- assure everyone the effective freedom to copy and redistribute it,
-- with or without modifying it, either commercially or
-- noncommercially. Secondarily, this License preserves for the
-- author and publisher a way to get credit for their work, while not
-- being considered responsible for modifications made by others.
--
-- This License is a kind of "copyleft", which means that derivative
-- works of the document must themselves be free in the same sense.
-- It complements the GNU General Public License, which is a copyleft
-- license designed for free software.
--
-- We have designed this License in order to use it for manuals for
-- free software, because free software needs free documentation: a
-- free program should come with manuals providing the same freedoms
-- that the software does. But this License is not limited to
-- software manuals; it can be used for any textual work, regardless
-- of subject matter or whether it is published as a printed book.
-- We recommend this License principally for works whose purpose is
-- instruction or reference.
--
-- 1. APPLICABILITY AND DEFINITIONS
--
-- This License applies to any manual or other work, in any medium,
-- that contains a notice placed by the copyright holder saying it
-- can be distributed under the terms of this License. Such a notice
-- grants a world-wide, royalty-free license, unlimited in duration,
-- to use that work under the conditions stated herein. The
-- "Document", below, refers to any such manual or work. Any member
-- of the public is a licensee, and is addressed as "you". You
-- accept the license if you copy, modify or distribute the work in a
-- way requiring permission under copyright law.
--
-- A "Modified Version" of the Document means any work containing the
-- Document or a portion of it, either copied verbatim, or with
-- modifications and/or translated into another language.
--
-- A "Secondary Section" is a named appendix or a front-matter section
-- of the Document that deals exclusively with the relationship of the
-- publishers or authors of the Document to the Document's overall
-- subject (or to related matters) and contains nothing that could
-- fall directly within that overall subject. (Thus, if the Document
-- is in part a textbook of mathematics, a Secondary Section may not
-- explain any mathematics.) The relationship could be a matter of
-- historical connection with the subject or with related matters, or
-- of legal, commercial, philosophical, ethical or political position
-- regarding them.
--
-- The "Invariant Sections" are certain Secondary Sections whose
-- titles are designated, as being those of Invariant Sections, in
-- the notice that says that the Document is released under this
-- License. If a section does not fit the above definition of
-- Secondary then it is not allowed to be designated as Invariant.
-- The Document may contain zero Invariant Sections. If the Document
-- does not identify any Invariant Sections then there are none.
--
-- The "Cover Texts" are certain short passages of text that are
-- listed, as Front-Cover Texts or Back-Cover Texts, in the notice
-- that says that the Document is released under this License. A
-- Front-Cover Text may be at most 5 words, and a Back-Cover Text may
-- be at most 25 words.
--
-- A "Transparent" copy of the Document means a machine-readable copy,
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-- straightforwardly with generic text editors or (for images
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-- widely available drawing editor, and that is suitable for input to
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-- formats suitable for input to text formatters. A copy made in an
-- otherwise Transparent file format whose markup, or absence of
-- markup, has been arranged to thwart or discourage subsequent
-- modification by readers is not Transparent. An image format is
-- not Transparent if used for any substantial amount of text. A
-- copy that is not "Transparent" is called "Opaque".
--
-- Examples of suitable formats for Transparent copies include plain
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-- standard-conforming simple HTML, PostScript or PDF designed for
-- human modification. Examples of transparent image formats include
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-- can be read and edited only by proprietary word processors, SGML or
-- XML for which the DTD and/or processing tools are not generally
-- available, and the machine-generated HTML, PostScript or PDF
-- produced by some word processors for output purposes only.
--
-- The "Title Page" means, for a printed book, the title page itself,
-- plus such following pages as are needed to hold, legibly, the
-- material this License requires to appear in the title page. For
-- works in formats which do not have any title page as such, "Title
-- Page" means the text near the most prominent appearance of the
-- work's title, preceding the beginning of the body of the text.
--
-- The "publisher" means any person or entity that distributes copies
-- of the Document to the public.
--
-- A section "Entitled XYZ" means a named subunit of the Document
-- whose title either is precisely XYZ or contains XYZ in parentheses
-- following text that translates XYZ in another language. (Here XYZ
-- stands for a specific section name mentioned below, such as
-- "Acknowledgements", "Dedications", "Endorsements", or "History".)
-- To "Preserve the Title" of such a section when you modify the
-- Document means that it remains a section "Entitled XYZ" according
-- to this definition.
--
-- The Document may include Warranty Disclaimers next to the notice
-- which states that this License applies to the Document. These
-- Warranty Disclaimers are considered to be included by reference in
-- this License, but only as regards disclaiming warranties: any other
-- implication that these Warranty Disclaimers may have is void and
-- has no effect on the meaning of this License.
--
-- 2. VERBATIM COPYING
--
-- You may copy and distribute the Document in any medium, either
-- commercially or noncommercially, provided that this License, the
-- copyright notices, and the license notice saying this License
-- applies to the Document are reproduced in all copies, and that you
-- add no other conditions whatsoever to those of this License. You
-- may not use technical measures to obstruct or control the reading
-- or further copying of the copies you make or distribute. However,
-- you may accept compensation in exchange for copies. If you
-- distribute a large enough number of copies you must also follow
-- the conditions in section 3.
--
-- You may also lend copies, under the same conditions stated above,
-- and you may publicly display copies.
--
-- 3. COPYING IN QUANTITY
--
-- If you publish printed copies (or copies in media that commonly
-- have printed covers) of the Document, numbering more than 100, and
-- the Document's license notice requires Cover Texts, you must
-- enclose the copies in covers that carry, clearly and legibly, all
-- these Cover Texts: Front-Cover Texts on the front cover, and
-- Back-Cover Texts on the back cover. Both covers must also clearly
-- and legibly identify you as the publisher of these copies. The
-- front cover must present the full title with all words of the
-- title equally prominent and visible. You may add other material
-- on the covers in addition. Copying with changes limited to the
-- covers, as long as they preserve the title of the Document and
-- satisfy these conditions, can be treated as verbatim copying in
-- other respects.
--
-- If the required texts for either cover are too voluminous to fit
-- legibly, you should put the first ones listed (as many as fit
-- reasonably) on the actual cover, and continue the rest onto
-- adjacent pages.
--
-- If you publish or distribute Opaque copies of the Document
-- numbering more than 100, you must either include a
-- machine-readable Transparent copy along with each Opaque copy, or
-- state in or with each Opaque copy a computer-network location from
-- which the general network-using public has access to download
-- using public-standard network protocols a complete Transparent
-- copy of the Document, free of added material. If you use the
-- latter option, you must take reasonably prudent steps, when you
-- begin distribution of Opaque copies in quantity, to ensure that
-- this Transparent copy will remain thus accessible at the stated
-- location until at least one year after the last time you
-- distribute an Opaque copy (directly or through your agents or
-- retailers) of that edition to the public.
--
-- It is requested, but not required, that you contact the authors of
-- the Document well before redistributing any large number of
-- copies, to give them a chance to provide you with an updated
-- version of the Document.
--
-- 4. MODIFICATIONS
--
-- You may copy and distribute a Modified Version of the Document
-- under the conditions of sections 2 and 3 above, provided that you
-- release the Modified Version under precisely this License, with
-- the Modified Version filling the role of the Document, thus
-- licensing distribution and modification of the Modified Version to
-- whoever possesses a copy of it. In addition, you must do these
-- things in the Modified Version:
--
-- A. Use in the Title Page (and on the covers, if any) a title
-- distinct from that of the Document, and from those of
-- previous versions (which should, if there were any, be listed
-- in the History section of the Document). You may use the
-- same title as a previous version if the original publisher of
-- that version gives permission.
--
-- B. List on the Title Page, as authors, one or more persons or
-- entities responsible for authorship of the modifications in
-- the Modified Version, together with at least five of the
-- principal authors of the Document (all of its principal
-- authors, if it has fewer than five), unless they release you
-- from this requirement.
--
-- C. State on the Title page the name of the publisher of the
-- Modified Version, as the publisher.
--
-- D. Preserve all the copyright notices of the Document.
--
-- E. Add an appropriate copyright notice for your modifications
-- adjacent to the other copyright notices.
--
-- F. Include, immediately after the copyright notices, a license
-- notice giving the public permission to use the Modified
-- Version under the terms of this License, in the form shown in
-- the Addendum below.
--
-- G. Preserve in that license notice the full lists of Invariant
-- Sections and required Cover Texts given in the Document's
-- license notice.
--
-- H. Include an unaltered copy of this License.
--
-- I. Preserve the section Entitled "History", Preserve its Title,
-- and add to it an item stating at least the title, year, new
-- authors, and publisher of the Modified Version as given on
-- the Title Page. If there is no section Entitled "History" in
-- the Document, create one stating the title, year, authors,
-- and publisher of the Document as given on its Title Page,
-- then add an item describing the Modified Version as stated in
-- the previous sentence.
--
-- J. Preserve the network location, if any, given in the Document
-- for public access to a Transparent copy of the Document, and
-- likewise the network locations given in the Document for
-- previous versions it was based on. These may be placed in
-- the "History" section. You may omit a network location for a
-- work that was published at least four years before the
-- Document itself, or if the original publisher of the version
-- it refers to gives permission.
--
-- K. For any section Entitled "Acknowledgements" or "Dedications",
-- Preserve the Title of the section, and preserve in the
-- section all the substance and tone of each of the contributor
-- acknowledgements and/or dedications given therein.
--
-- L. Preserve all the Invariant Sections of the Document,
-- unaltered in their text and in their titles. Section numbers
-- or the equivalent are not considered part of the section
-- titles.
--
-- M. Delete any section Entitled "Endorsements". Such a section
-- may not be included in the Modified Version.
--
-- N. Do not retitle any existing section to be Entitled
-- "Endorsements" or to conflict in title with any Invariant
-- Section.
--
-- O. Preserve any Warranty Disclaimers.
--
-- If the Modified Version includes new front-matter sections or
-- appendices that qualify as Secondary Sections and contain no
-- material copied from the Document, you may at your option
-- designate some or all of these sections as invariant. To do this,
-- add their titles to the list of Invariant Sections in the Modified
-- Version's license notice. These titles must be distinct from any
-- other section titles.
--
-- You may add a section Entitled "Endorsements", provided it contains
-- nothing but endorsements of your Modified Version by various
-- parties--for example, statements of peer review or that the text
-- has been approved by an organization as the authoritative
-- definition of a standard.
--
-- You may add a passage of up to five words as a Front-Cover Text,
-- and a passage of up to 25 words as a Back-Cover Text, to the end
-- of the list of Cover Texts in the Modified Version. Only one
-- passage of Front-Cover Text and one of Back-Cover Text may be
-- added by (or through arrangements made by) any one entity. If the
-- Document already includes a cover text for the same cover,
-- previously added by you or by arrangement made by the same entity
-- you are acting on behalf of, you may not add another; but you may
-- replace the old one, on explicit permission from the previous
-- publisher that added the old one.
--
-- The author(s) and publisher(s) of the Document do not by this
-- License give permission to use their names for publicity for or to
-- assert or imply endorsement of any Modified Version.
--
-- 5. COMBINING DOCUMENTS
--
-- You may combine the Document with other documents released under
-- this License, under the terms defined in section 4 above for
-- modified versions, provided that you include in the combination
-- all of the Invariant Sections of all of the original documents,
-- unmodified, and list them all as Invariant Sections of your
-- combined work in its license notice, and that you preserve all
-- their Warranty Disclaimers.
--
-- The combined work need only contain one copy of this License, and
-- multiple identical Invariant Sections may be replaced with a single
-- copy. If there are multiple Invariant Sections with the same name
-- but different contents, make the title of each such section unique
-- by adding at the end of it, in parentheses, the name of the
-- original author or publisher of that section if known, or else a
-- unique number. Make the same adjustment to the section titles in
-- the list of Invariant Sections in the license notice of the
-- combined work.
--
-- In the combination, you must combine any sections Entitled
-- "History" in the various original documents, forming one section
-- Entitled "History"; likewise combine any sections Entitled
-- "Acknowledgements", and any sections Entitled "Dedications". You
-- must delete all sections Entitled "Endorsements."
--
-- 6. COLLECTIONS OF DOCUMENTS
--
-- You may make a collection consisting of the Document and other
-- documents released under this License, and replace the individual
-- copies of this License in the various documents with a single copy
-- that is included in the collection, provided that you follow the
-- rules of this License for verbatim copying of each of the
-- documents in all other respects.
--
-- You may extract a single document from such a collection, and
-- distribute it individually under this License, provided you insert
-- a copy of this License into the extracted document, and follow
-- this License in all other respects regarding verbatim copying of
-- that document.
--
-- 7. AGGREGATION WITH INDEPENDENT WORKS
--
-- A compilation of the Document or its derivatives with other
-- separate and independent documents or works, in or on a volume of
-- a storage or distribution medium, is called an "aggregate" if the
-- copyright resulting from the compilation is not used to limit the
-- legal rights of the compilation's users beyond what the individual
-- works permit. When the Document is included in an aggregate, this
-- License does not apply to the other works in the aggregate which
-- are not themselves derivative works of the Document.
--
-- If the Cover Text requirement of section 3 is applicable to these
-- copies of the Document, then if the Document is less than one half
-- of the entire aggregate, the Document's Cover Texts may be placed
-- on covers that bracket the Document within the aggregate, or the
-- electronic equivalent of covers if the Document is in electronic
-- form. Otherwise they must appear on printed covers that bracket
-- the whole aggregate.
--
-- 8. TRANSLATION
--
-- Translation is considered a kind of modification, so you may
-- distribute translations of the Document under the terms of section
-- 4. Replacing Invariant Sections with translations requires special
-- permission from their copyright holders, but you may include
-- translations of some or all Invariant Sections in addition to the
-- original versions of these Invariant Sections. You may include a
-- translation of this License, and all the license notices in the
-- Document, and any Warranty Disclaimers, provided that you also
-- include the original English version of this License and the
-- original versions of those notices and disclaimers. In case of a
-- disagreement between the translation and the original version of
-- this License or a notice or disclaimer, the original version will
-- prevail.
--
-- If a section in the Document is Entitled "Acknowledgements",
-- "Dedications", or "History", the requirement (section 4) to
-- Preserve its Title (section 1) will typically require changing the
-- actual title.
--
-- 9. TERMINATION
--
-- You may not copy, modify, sublicense, or distribute the Document
-- except as expressly provided under this License. Any attempt
-- otherwise to copy, modify, sublicense, or distribute it is void,
-- and will automatically terminate your rights under this License.
--
-- However, if you cease all violation of this License, then your
-- license from a particular copyright holder is reinstated (a)
-- provisionally, unless and until the copyright holder explicitly
-- and finally terminates your license, and (b) permanently, if the
-- copyright holder fails to notify you of the violation by some
-- reasonable means prior to 60 days after the cessation.
--
-- Moreover, your license from a particular copyright holder is
-- reinstated permanently if the copyright holder notifies you of the
-- violation by some reasonable means, this is the first time you have
-- received notice of violation of this License (for any work) from
-- that copyright holder, and you cure the violation prior to 30 days
-- after your receipt of the notice.
--
-- Termination of your rights under this section does not terminate
-- the licenses of parties who have received copies or rights from
-- you under this License. If your rights have been terminated and
-- not permanently reinstated, receipt of a copy of some or all of
-- the same material does not give you any rights to use it.
--
-- 10. FUTURE REVISIONS OF THIS LICENSE
--
-- The Free Software Foundation may publish new, revised versions of
-- the GNU Free Documentation License from time to time. Such new
-- versions will be similar in spirit to the present version, but may
-- differ in detail to address new problems or concerns. See
-- `http://www.gnu.org/copyleft/'.
--
-- Each version of the License is given a distinguishing version
-- number. If the Document specifies that a particular numbered
-- version of this License "or any later version" applies to it, you
-- have the option of following the terms and conditions either of
-- that specified version or of any later version that has been
-- published (not as a draft) by the Free Software Foundation. If
-- the Document does not specify a version number of this License,
-- you may choose any version ever published (not as a draft) by the
-- Free Software Foundation. If the Document specifies that a proxy
-- can decide which future versions of this License can be used, that
-- proxy's public statement of acceptance of a version permanently
-- authorizes you to choose that version for the Document.
--
-- 11. RELICENSING
--
-- "Massive Multiauthor Collaboration Site" (or "MMC Site") means any
-- World Wide Web server that publishes copyrightable works and also
-- provides prominent facilities for anybody to edit those works. A
-- public wiki that anybody can edit is an example of such a server.
-- A "Massive Multiauthor Collaboration" (or "MMC") contained in the
-- site means any set of copyrightable works thus published on the MMC
-- site.
--
-- "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0
-- license published by Creative Commons Corporation, a not-for-profit
-- corporation with a principal place of business in San Francisco,
-- California, as well as future copyleft versions of that license
-- published by that same organization.
--
-- "Incorporate" means to publish or republish a Document, in whole or
-- in part, as part of another Document.
--
-- An MMC is "eligible for relicensing" if it is licensed under this
-- License, and if all works that were first published under this
-- License somewhere other than this MMC, and subsequently
-- incorporated in whole or in part into the MMC, (1) had no cover
-- texts or invariant sections, and (2) were thus incorporated prior
-- to November 1, 2008.
--
-- The operator of an MMC Site may republish an MMC contained in the
-- site under CC-BY-SA on the same site at any time before August 1,
-- 2009, provided the MMC is eligible for relicensing.
--
--
--ADDENDUM: How to use this License for your documents
--====================================================
--
--To use this License in a document you have written, include a copy of
--the License in the document and put the following copyright and license
--notices just after the title page:
--
-- Copyright (C) YEAR YOUR NAME.
-- Permission is granted to copy, distribute and/or modify this document
-- under the terms of the GNU Free Documentation License, Version 1.3
-- or any later version published by the Free Software Foundation;
-- with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
-- Texts. A copy of the license is included in the section entitled ``GNU
-- Free Documentation License''.
--
-- If you have Invariant Sections, Front-Cover Texts and Back-Cover
--Texts, replace the "with...Texts." line with this:
--
-- with the Invariant Sections being LIST THEIR TITLES, with
-- the Front-Cover Texts being LIST, and with the Back-Cover Texts
-- being LIST.
--
-- If you have Invariant Sections without Cover Texts, or some other
--combination of the three, merge those two alternatives to suit the
--situation.
--
-- If your document contains nontrivial examples of program code, we
--recommend releasing these examples in parallel under your choice of
--free software license, such as the GNU General Public License, to
--permit their use in free software.
--
--
--File: bfd.info, Node: BFD Index, Prev: GNU Free Documentation License, Up: Top
--
--BFD Index
--*********
--
--
--* Menu:
--
--* _bfd_final_link_relocate: Relocating the section contents.
-- (line 22)
--* _bfd_generic_link_add_archive_symbols: Adding symbols from an archive.
-- (line 15)
--* _bfd_generic_link_add_one_symbol: Adding symbols from an object file.
-- (line 19)
--* _bfd_generic_make_empty_symbol: symbol handling functions.
-- (line 92)
--* _bfd_link_add_symbols in target vector: Adding Symbols to the Hash Table.
-- (line 6)
--* _bfd_link_final_link in target vector: Performing the Final Link.
-- (line 6)
--* _bfd_link_hash_table_create in target vector: Creating a Linker Hash Table.
-- (line 6)
--* _bfd_relocate_contents: Relocating the section contents.
-- (line 22)
--* aout_SIZE_machine_type: aout. (line 147)
--* aout_SIZE_mkobject: aout. (line 139)
--* aout_SIZE_new_section_hook: aout. (line 177)
--* aout_SIZE_set_arch_mach: aout. (line 164)
--* aout_SIZE_some_aout_object_p: aout. (line 125)
--* aout_SIZE_swap_exec_header_in: aout. (line 101)
--* aout_SIZE_swap_exec_header_out: aout. (line 113)
--* arelent_chain: typedef arelent. (line 336)
--* BFD: Overview. (line 6)
--* BFD canonical format: Canonical format. (line 11)
--* bfd_alloc: Opening and Closing.
-- (line 218)
--* bfd_alloc2: Opening and Closing.
-- (line 227)
--* bfd_alt_mach_code: Miscellaneous. (line 308)
--* bfd_arch_bits_per_address: Architectures. (line 584)
--* bfd_arch_bits_per_byte: Architectures. (line 576)
--* bfd_arch_default_fill: Architectures. (line 665)
--* bfd_arch_get_compatible: Architectures. (line 519)
--* bfd_arch_list: Architectures. (line 510)
--* bfd_arch_mach_octets_per_byte: Architectures. (line 653)
--* BFD_ARELOC_BFIN_ADD: howto manager. (line 1120)
--* BFD_ARELOC_BFIN_ADDR: howto manager. (line 1171)
--* BFD_ARELOC_BFIN_AND: howto manager. (line 1141)
--* BFD_ARELOC_BFIN_COMP: howto manager. (line 1162)
--* BFD_ARELOC_BFIN_CONST: howto manager. (line 1117)
--* BFD_ARELOC_BFIN_DIV: howto manager. (line 1129)
--* BFD_ARELOC_BFIN_HWPAGE: howto manager. (line 1168)
--* BFD_ARELOC_BFIN_LAND: howto manager. (line 1150)
--* BFD_ARELOC_BFIN_LEN: howto manager. (line 1156)
--* BFD_ARELOC_BFIN_LOR: howto manager. (line 1153)
--* BFD_ARELOC_BFIN_LSHIFT: howto manager. (line 1135)
--* BFD_ARELOC_BFIN_MOD: howto manager. (line 1132)
--* BFD_ARELOC_BFIN_MULT: howto manager. (line 1126)
--* BFD_ARELOC_BFIN_NEG: howto manager. (line 1159)
--* BFD_ARELOC_BFIN_OR: howto manager. (line 1144)
--* BFD_ARELOC_BFIN_PAGE: howto manager. (line 1165)
--* BFD_ARELOC_BFIN_PUSH: howto manager. (line 1114)
--* BFD_ARELOC_BFIN_RSHIFT: howto manager. (line 1138)
--* BFD_ARELOC_BFIN_SUB: howto manager. (line 1123)
--* BFD_ARELOC_BFIN_XOR: howto manager. (line 1147)
--* bfd_cache_close: File Caching. (line 26)
--* bfd_cache_close_all: File Caching. (line 39)
--* bfd_cache_init: File Caching. (line 18)
--* bfd_calc_gnu_debuglink_crc32: Opening and Closing.
-- (line 254)
--* bfd_canonicalize_reloc: Miscellaneous. (line 19)
--* bfd_canonicalize_symtab: symbol handling functions.
-- (line 50)
--* bfd_check_format: Formats. (line 21)
--* bfd_check_format_matches: Formats. (line 52)
--* bfd_check_overflow: typedef arelent. (line 348)
--* bfd_close: Opening and Closing.
-- (line 143)
--* bfd_close_all_done: Opening and Closing.
-- (line 161)
--* bfd_coff_backend_data: coff. (line 305)
--* bfd_copy_private_bfd_data: Miscellaneous. (line 158)
--* bfd_copy_private_header_data: Miscellaneous. (line 140)
--* bfd_copy_private_section_data: section prototypes. (line 278)
--* bfd_copy_private_symbol_data: symbol handling functions.
-- (line 140)
--* bfd_core_file_failing_command: Core Files. (line 12)
--* bfd_core_file_failing_signal: Core Files. (line 21)
--* bfd_core_file_pid: Core Files. (line 30)
--* bfd_create: Opening and Closing.
-- (line 180)
--* bfd_create_gnu_debuglink_section: Opening and Closing.
-- (line 363)
--* bfd_decode_symclass: symbol handling functions.
-- (line 111)
--* bfd_default_arch_struct: Architectures. (line 531)
--* bfd_default_compatible: Architectures. (line 593)
--* bfd_default_reloc_type_lookup: howto manager. (line 3268)
--* bfd_default_scan: Architectures. (line 602)
--* bfd_default_set_arch_mach: Architectures. (line 549)
--* bfd_demangle: Miscellaneous. (line 359)
--* bfd_emul_get_commonpagesize: Miscellaneous. (line 339)
--* bfd_emul_get_maxpagesize: Miscellaneous. (line 319)
--* bfd_emul_set_commonpagesize: Miscellaneous. (line 350)
--* bfd_emul_set_maxpagesize: Miscellaneous. (line 330)
--* bfd_errmsg: Error reporting. (line 67)
--* bfd_fdopenr: Opening and Closing.
-- (line 51)
--* bfd_fill_in_gnu_debuglink_section: Opening and Closing.
-- (line 377)
--* bfd_find_target: bfd_target. (line 473)
--* bfd_find_version_for_sym: Writing the symbol table.
-- (line 81)
--* bfd_follow_gnu_debugaltlink: Opening and Closing.
-- (line 343)
--* bfd_follow_gnu_debuglink: Opening and Closing.
-- (line 322)
--* bfd_fopen: Opening and Closing.
-- (line 12)
--* bfd_format_string: Formats. (line 79)
--* bfd_generic_define_common_symbol: Writing the symbol table.
-- (line 68)
--* bfd_generic_discard_group: section prototypes. (line 304)
--* bfd_generic_gc_sections: howto manager. (line 3299)
--* bfd_generic_get_relocated_section_contents: howto manager. (line 3329)
--* bfd_generic_is_group_section: section prototypes. (line 296)
--* bfd_generic_lookup_section_flags: howto manager. (line 3309)
--* bfd_generic_merge_sections: howto manager. (line 3319)
--* bfd_generic_relax_section: howto manager. (line 3286)
--* bfd_get_alt_debug_link_info: Opening and Closing.
-- (line 279)
--* bfd_get_arch: Architectures. (line 560)
--* bfd_get_arch_info: Architectures. (line 612)
--* bfd_get_arch_size: Miscellaneous. (line 63)
--* bfd_get_assert_handler: Error reporting. (line 150)
--* bfd_get_debug_link_info: Opening and Closing.
-- (line 268)
--* bfd_get_error: Error reporting. (line 48)
--* bfd_get_error_handler: Error reporting. (line 118)
--* bfd_get_gp_size: Miscellaneous. (line 104)
--* bfd_get_linker_section: section prototypes. (line 36)
--* bfd_get_mach: Architectures. (line 568)
--* bfd_get_mtime: Miscellaneous. (line 410)
--* bfd_get_next_mapent: Archives. (line 58)
--* bfd_get_next_section_by_name: section prototypes. (line 26)
--* bfd_get_reloc_code_name: howto manager. (line 3277)
--* bfd_get_reloc_size: typedef arelent. (line 327)
--* bfd_get_reloc_upper_bound: Miscellaneous. (line 9)
--* bfd_get_section_by_name: section prototypes. (line 17)
--* bfd_get_section_by_name_if: section prototypes. (line 45)
--* bfd_get_section_contents: section prototypes. (line 251)
--* bfd_get_sign_extend_vma: Miscellaneous. (line 76)
--* bfd_get_size <1>: Miscellaneous. (line 419)
--* bfd_get_size: Internal. (line 25)
--* bfd_get_symtab_upper_bound: symbol handling functions.
-- (line 6)
--* bfd_get_target_info: bfd_target. (line 489)
--* bfd_get_unique_section_name: section prototypes. (line 64)
--* bfd_h_put_size: Internal. (line 97)
--* bfd_hash_allocate: Creating and Freeing a Hash Table.
-- (line 17)
--* bfd_hash_lookup: Looking Up or Entering a String.
-- (line 6)
--* bfd_hash_newfunc: Creating and Freeing a Hash Table.
-- (line 12)
--* bfd_hash_set_default_size: Creating and Freeing a Hash Table.
-- (line 25)
--* bfd_hash_table_free: Creating and Freeing a Hash Table.
-- (line 21)
--* bfd_hash_table_init: Creating and Freeing a Hash Table.
-- (line 6)
--* bfd_hash_table_init_n: Creating and Freeing a Hash Table.
-- (line 6)
--* bfd_hash_traverse: Traversing a Hash Table.
-- (line 6)
--* bfd_hide_sym_by_version: Writing the symbol table.
-- (line 93)
--* bfd_init: Initialization. (line 11)
--* bfd_install_relocation: typedef arelent. (line 389)
--* bfd_is_local_label: symbol handling functions.
-- (line 17)
--* bfd_is_local_label_name: symbol handling functions.
-- (line 26)
--* bfd_is_target_special_symbol: symbol handling functions.
-- (line 38)
--* bfd_is_undefined_symclass: symbol handling functions.
-- (line 120)
--* bfd_link_split_section: Writing the symbol table.
-- (line 44)
--* bfd_log2: Internal. (line 164)
--* bfd_lookup_arch: Architectures. (line 620)
--* bfd_make_debug_symbol: symbol handling functions.
-- (line 102)
--* bfd_make_empty_symbol: symbol handling functions.
-- (line 78)
--* bfd_make_readable: Opening and Closing.
-- (line 204)
--* bfd_make_section: section prototypes. (line 143)
--* bfd_make_section_anyway: section prototypes. (line 114)
--* bfd_make_section_anyway_with_flags: section prototypes. (line 96)
--* bfd_make_section_old_way: section prototypes. (line 76)
--* bfd_make_section_with_flags: section prototypes. (line 130)
--* bfd_make_writable: Opening and Closing.
-- (line 190)
--* bfd_malloc_and_get_section: section prototypes. (line 268)
--* bfd_map_over_sections: section prototypes. (line 178)
--* bfd_merge_private_bfd_data: Miscellaneous. (line 174)
--* bfd_mmap: Miscellaneous. (line 448)
--* bfd_octets_per_byte: Architectures. (line 643)
--* bfd_open_file: File Caching. (line 52)
--* bfd_openr: Opening and Closing.
-- (line 35)
--* bfd_openr_iovec: Opening and Closing.
-- (line 83)
--* bfd_openr_next_archived_file: Archives. (line 84)
--* bfd_openstreamr: Opening and Closing.
-- (line 74)
--* bfd_openw: Opening and Closing.
-- (line 131)
--* bfd_perform_relocation: typedef arelent. (line 364)
--* bfd_perror: Error reporting. (line 76)
--* bfd_print_symbol_vandf: symbol handling functions.
-- (line 70)
--* bfd_printable_arch_mach: Architectures. (line 631)
--* bfd_printable_name: Architectures. (line 491)
--* bfd_put_size: Internal. (line 22)
--* BFD_RELOC_12_PCREL: howto manager. (line 39)
--* BFD_RELOC_14: howto manager. (line 31)
--* BFD_RELOC_16: howto manager. (line 30)
--* BFD_RELOC_16_BASEREL: howto manager. (line 99)
--* BFD_RELOC_16_GOT_PCREL: howto manager. (line 52)
--* BFD_RELOC_16_GOTOFF: howto manager. (line 55)
--* BFD_RELOC_16_PCREL: howto manager. (line 38)
--* BFD_RELOC_16_PCREL_S2: howto manager. (line 111)
--* BFD_RELOC_16_PLT_PCREL: howto manager. (line 63)
--* BFD_RELOC_16_PLTOFF: howto manager. (line 67)
--* BFD_RELOC_16C_ABS20: howto manager. (line 2236)
--* BFD_RELOC_16C_ABS20_C: howto manager. (line 2237)
--* BFD_RELOC_16C_ABS24: howto manager. (line 2238)
--* BFD_RELOC_16C_ABS24_C: howto manager. (line 2239)
--* BFD_RELOC_16C_DISP04: howto manager. (line 2216)
--* BFD_RELOC_16C_DISP04_C: howto manager. (line 2217)
--* BFD_RELOC_16C_DISP08: howto manager. (line 2218)
--* BFD_RELOC_16C_DISP08_C: howto manager. (line 2219)
--* BFD_RELOC_16C_DISP16: howto manager. (line 2220)
--* BFD_RELOC_16C_DISP16_C: howto manager. (line 2221)
--* BFD_RELOC_16C_DISP24: howto manager. (line 2222)
--* BFD_RELOC_16C_DISP24_C: howto manager. (line 2223)
--* BFD_RELOC_16C_DISP24a: howto manager. (line 2224)
--* BFD_RELOC_16C_DISP24a_C: howto manager. (line 2225)
--* BFD_RELOC_16C_IMM04: howto manager. (line 2240)
--* BFD_RELOC_16C_IMM04_C: howto manager. (line 2241)
--* BFD_RELOC_16C_IMM16: howto manager. (line 2242)
--* BFD_RELOC_16C_IMM16_C: howto manager. (line 2243)
--* BFD_RELOC_16C_IMM20: howto manager. (line 2244)
--* BFD_RELOC_16C_IMM20_C: howto manager. (line 2245)
--* BFD_RELOC_16C_IMM24: howto manager. (line 2246)
--* BFD_RELOC_16C_IMM24_C: howto manager. (line 2247)
--* BFD_RELOC_16C_IMM32: howto manager. (line 2248)
--* BFD_RELOC_16C_IMM32_C: howto manager. (line 2249)
--* BFD_RELOC_16C_NUM08: howto manager. (line 2210)
--* BFD_RELOC_16C_NUM08_C: howto manager. (line 2211)
--* BFD_RELOC_16C_NUM16: howto manager. (line 2212)
--* BFD_RELOC_16C_NUM16_C: howto manager. (line 2213)
--* BFD_RELOC_16C_NUM32: howto manager. (line 2214)
--* BFD_RELOC_16C_NUM32_C: howto manager. (line 2215)
--* BFD_RELOC_16C_REG04: howto manager. (line 2226)
--* BFD_RELOC_16C_REG04_C: howto manager. (line 2227)
--* BFD_RELOC_16C_REG04a: howto manager. (line 2228)
--* BFD_RELOC_16C_REG04a_C: howto manager. (line 2229)
--* BFD_RELOC_16C_REG14: howto manager. (line 2230)
--* BFD_RELOC_16C_REG14_C: howto manager. (line 2231)
--* BFD_RELOC_16C_REG16: howto manager. (line 2232)
--* BFD_RELOC_16C_REG16_C: howto manager. (line 2233)
--* BFD_RELOC_16C_REG20: howto manager. (line 2234)
--* BFD_RELOC_16C_REG20_C: howto manager. (line 2235)
--* BFD_RELOC_23_PCREL_S2: howto manager. (line 112)
--* BFD_RELOC_24: howto manager. (line 29)
--* BFD_RELOC_24_PCREL: howto manager. (line 37)
--* BFD_RELOC_24_PLT_PCREL: howto manager. (line 62)
--* BFD_RELOC_26: howto manager. (line 28)
--* BFD_RELOC_32: howto manager. (line 27)
--* BFD_RELOC_32_BASEREL: howto manager. (line 98)
--* BFD_RELOC_32_GOT_PCREL: howto manager. (line 51)
--* BFD_RELOC_32_GOTOFF: howto manager. (line 54)
--* BFD_RELOC_32_PCREL: howto manager. (line 36)
--* BFD_RELOC_32_PCREL_S2: howto manager. (line 110)
--* BFD_RELOC_32_PLT_PCREL: howto manager. (line 61)
--* BFD_RELOC_32_PLTOFF: howto manager. (line 66)
--* BFD_RELOC_32_SECREL: howto manager. (line 48)
--* BFD_RELOC_386_COPY: howto manager. (line 577)
--* BFD_RELOC_386_GLOB_DAT: howto manager. (line 578)
--* BFD_RELOC_386_GOT32: howto manager. (line 575)
--* BFD_RELOC_386_GOTOFF: howto manager. (line 581)
--* BFD_RELOC_386_GOTPC: howto manager. (line 582)
--* BFD_RELOC_386_IRELATIVE: howto manager. (line 598)
--* BFD_RELOC_386_JUMP_SLOT: howto manager. (line 579)
--* BFD_RELOC_386_PLT32: howto manager. (line 576)
--* BFD_RELOC_386_RELATIVE: howto manager. (line 580)
--* BFD_RELOC_386_TLS_DESC: howto manager. (line 597)
--* BFD_RELOC_386_TLS_DESC_CALL: howto manager. (line 596)
--* BFD_RELOC_386_TLS_DTPMOD32: howto manager. (line 592)
--* BFD_RELOC_386_TLS_DTPOFF32: howto manager. (line 593)
--* BFD_RELOC_386_TLS_GD: howto manager. (line 587)
--* BFD_RELOC_386_TLS_GOTDESC: howto manager. (line 595)
--* BFD_RELOC_386_TLS_GOTIE: howto manager. (line 585)
--* BFD_RELOC_386_TLS_IE: howto manager. (line 584)
--* BFD_RELOC_386_TLS_IE_32: howto manager. (line 590)
--* BFD_RELOC_386_TLS_LDM: howto manager. (line 588)
--* BFD_RELOC_386_TLS_LDO_32: howto manager. (line 589)
--* BFD_RELOC_386_TLS_LE: howto manager. (line 586)
--* BFD_RELOC_386_TLS_LE_32: howto manager. (line 591)
--* BFD_RELOC_386_TLS_TPOFF: howto manager. (line 583)
--* BFD_RELOC_386_TLS_TPOFF32: howto manager. (line 594)
--* BFD_RELOC_390_12: howto manager. (line 1819)
--* BFD_RELOC_390_20: howto manager. (line 1931)
--* BFD_RELOC_390_COPY: howto manager. (line 1828)
--* BFD_RELOC_390_GLOB_DAT: howto manager. (line 1831)
--* BFD_RELOC_390_GOT12: howto manager. (line 1822)
--* BFD_RELOC_390_GOT16: howto manager. (line 1843)
--* BFD_RELOC_390_GOT20: howto manager. (line 1932)
--* BFD_RELOC_390_GOT64: howto manager. (line 1873)
--* BFD_RELOC_390_GOTENT: howto manager. (line 1879)
--* BFD_RELOC_390_GOTOFF64: howto manager. (line 1882)
--* BFD_RELOC_390_GOTPC: howto manager. (line 1840)
--* BFD_RELOC_390_GOTPCDBL: howto manager. (line 1870)
--* BFD_RELOC_390_GOTPLT12: howto manager. (line 1885)
--* BFD_RELOC_390_GOTPLT16: howto manager. (line 1888)
--* BFD_RELOC_390_GOTPLT20: howto manager. (line 1933)
--* BFD_RELOC_390_GOTPLT32: howto manager. (line 1891)
--* BFD_RELOC_390_GOTPLT64: howto manager. (line 1894)
--* BFD_RELOC_390_GOTPLTENT: howto manager. (line 1897)
--* BFD_RELOC_390_IRELATIVE: howto manager. (line 1937)
--* BFD_RELOC_390_JMP_SLOT: howto manager. (line 1834)
--* BFD_RELOC_390_PC12DBL: howto manager. (line 1846)
--* BFD_RELOC_390_PC16DBL: howto manager. (line 1852)
--* BFD_RELOC_390_PC24DBL: howto manager. (line 1858)
--* BFD_RELOC_390_PC32DBL: howto manager. (line 1864)
--* BFD_RELOC_390_PLT12DBL: howto manager. (line 1849)
--* BFD_RELOC_390_PLT16DBL: howto manager. (line 1855)
--* BFD_RELOC_390_PLT24DBL: howto manager. (line 1861)
--* BFD_RELOC_390_PLT32: howto manager. (line 1825)
--* BFD_RELOC_390_PLT32DBL: howto manager. (line 1867)
--* BFD_RELOC_390_PLT64: howto manager. (line 1876)
--* BFD_RELOC_390_PLTOFF16: howto manager. (line 1900)
--* BFD_RELOC_390_PLTOFF32: howto manager. (line 1903)
--* BFD_RELOC_390_PLTOFF64: howto manager. (line 1906)
--* BFD_RELOC_390_RELATIVE: howto manager. (line 1837)
--* BFD_RELOC_390_TLS_DTPMOD: howto manager. (line 1926)
--* BFD_RELOC_390_TLS_DTPOFF: howto manager. (line 1927)
--* BFD_RELOC_390_TLS_GD32: howto manager. (line 1912)
--* BFD_RELOC_390_TLS_GD64: howto manager. (line 1913)
--* BFD_RELOC_390_TLS_GDCALL: howto manager. (line 1910)
--* BFD_RELOC_390_TLS_GOTIE12: howto manager. (line 1914)
--* BFD_RELOC_390_TLS_GOTIE20: howto manager. (line 1934)
--* BFD_RELOC_390_TLS_GOTIE32: howto manager. (line 1915)
--* BFD_RELOC_390_TLS_GOTIE64: howto manager. (line 1916)
--* BFD_RELOC_390_TLS_IE32: howto manager. (line 1919)
--* BFD_RELOC_390_TLS_IE64: howto manager. (line 1920)
--* BFD_RELOC_390_TLS_IEENT: howto manager. (line 1921)
--* BFD_RELOC_390_TLS_LDCALL: howto manager. (line 1911)
--* BFD_RELOC_390_TLS_LDM32: howto manager. (line 1917)
--* BFD_RELOC_390_TLS_LDM64: howto manager. (line 1918)
--* BFD_RELOC_390_TLS_LDO32: howto manager. (line 1924)
--* BFD_RELOC_390_TLS_LDO64: howto manager. (line 1925)
--* BFD_RELOC_390_TLS_LE32: howto manager. (line 1922)
--* BFD_RELOC_390_TLS_LE64: howto manager. (line 1923)
--* BFD_RELOC_390_TLS_LOAD: howto manager. (line 1909)
--* BFD_RELOC_390_TLS_TPOFF: howto manager. (line 1928)
--* BFD_RELOC_64: howto manager. (line 26)
--* BFD_RELOC_64_PCREL: howto manager. (line 35)
--* BFD_RELOC_64_PLT_PCREL: howto manager. (line 60)
--* BFD_RELOC_64_PLTOFF: howto manager. (line 65)
--* BFD_RELOC_68K_GLOB_DAT: howto manager. (line 78)
--* BFD_RELOC_68K_JMP_SLOT: howto manager. (line 79)
--* BFD_RELOC_68K_RELATIVE: howto manager. (line 80)
--* BFD_RELOC_68K_TLS_GD16: howto manager. (line 82)
--* BFD_RELOC_68K_TLS_GD32: howto manager. (line 81)
--* BFD_RELOC_68K_TLS_GD8: howto manager. (line 83)
--* BFD_RELOC_68K_TLS_IE16: howto manager. (line 91)
--* BFD_RELOC_68K_TLS_IE32: howto manager. (line 90)
--* BFD_RELOC_68K_TLS_IE8: howto manager. (line 92)
--* BFD_RELOC_68K_TLS_LDM16: howto manager. (line 85)
--* BFD_RELOC_68K_TLS_LDM32: howto manager. (line 84)
--* BFD_RELOC_68K_TLS_LDM8: howto manager. (line 86)
--* BFD_RELOC_68K_TLS_LDO16: howto manager. (line 88)
--* BFD_RELOC_68K_TLS_LDO32: howto manager. (line 87)
--* BFD_RELOC_68K_TLS_LDO8: howto manager. (line 89)
--* BFD_RELOC_68K_TLS_LE16: howto manager. (line 94)
--* BFD_RELOC_68K_TLS_LE32: howto manager. (line 93)
--* BFD_RELOC_68K_TLS_LE8: howto manager. (line 95)
--* BFD_RELOC_8: howto manager. (line 32)
--* BFD_RELOC_860_COPY: howto manager. (line 2364)
--* BFD_RELOC_860_GLOB_DAT: howto manager. (line 2365)
--* BFD_RELOC_860_HAGOT: howto manager. (line 2390)
--* BFD_RELOC_860_HAGOTOFF: howto manager. (line 2391)
--* BFD_RELOC_860_HAPC: howto manager. (line 2392)
--* BFD_RELOC_860_HIGH: howto manager. (line 2393)
--* BFD_RELOC_860_HIGHADJ: howto manager. (line 2389)
--* BFD_RELOC_860_HIGOT: howto manager. (line 2394)
--* BFD_RELOC_860_HIGOTOFF: howto manager. (line 2395)
--* BFD_RELOC_860_JUMP_SLOT: howto manager. (line 2366)
--* BFD_RELOC_860_LOGOT0: howto manager. (line 2378)
--* BFD_RELOC_860_LOGOT1: howto manager. (line 2380)
--* BFD_RELOC_860_LOGOTOFF0: howto manager. (line 2382)
--* BFD_RELOC_860_LOGOTOFF1: howto manager. (line 2384)
--* BFD_RELOC_860_LOGOTOFF2: howto manager. (line 2386)
--* BFD_RELOC_860_LOGOTOFF3: howto manager. (line 2387)
--* BFD_RELOC_860_LOPC: howto manager. (line 2388)
--* BFD_RELOC_860_LOW0: howto manager. (line 2371)
--* BFD_RELOC_860_LOW1: howto manager. (line 2373)
--* BFD_RELOC_860_LOW2: howto manager. (line 2375)
--* BFD_RELOC_860_LOW3: howto manager. (line 2377)
--* BFD_RELOC_860_PC16: howto manager. (line 2370)
--* BFD_RELOC_860_PC26: howto manager. (line 2368)
--* BFD_RELOC_860_PLT26: howto manager. (line 2369)
--* BFD_RELOC_860_RELATIVE: howto manager. (line 2367)
--* BFD_RELOC_860_SPGOT0: howto manager. (line 2379)
--* BFD_RELOC_860_SPGOT1: howto manager. (line 2381)
--* BFD_RELOC_860_SPGOTOFF0: howto manager. (line 2383)
--* BFD_RELOC_860_SPGOTOFF1: howto manager. (line 2385)
--* BFD_RELOC_860_SPLIT0: howto manager. (line 2372)
--* BFD_RELOC_860_SPLIT1: howto manager. (line 2374)
--* BFD_RELOC_860_SPLIT2: howto manager. (line 2376)
--* BFD_RELOC_8_BASEREL: howto manager. (line 103)
--* BFD_RELOC_8_FFnn: howto manager. (line 107)
--* BFD_RELOC_8_GOT_PCREL: howto manager. (line 53)
--* BFD_RELOC_8_GOTOFF: howto manager. (line 59)
--* BFD_RELOC_8_PCREL: howto manager. (line 40)
--* BFD_RELOC_8_PLT_PCREL: howto manager. (line 64)
--* BFD_RELOC_8_PLTOFF: howto manager. (line 71)
--* BFD_RELOC_AARCH64_16: howto manager. (line 2755)
--* BFD_RELOC_AARCH64_16_PCREL: howto manager. (line 2762)
--* BFD_RELOC_AARCH64_32: howto manager. (line 2754)
--* BFD_RELOC_AARCH64_32_PCREL: howto manager. (line 2761)
--* BFD_RELOC_AARCH64_64: howto manager. (line 2753)
--* BFD_RELOC_AARCH64_64_PCREL: howto manager. (line 2760)
--* BFD_RELOC_AARCH64_ADD_LO12: howto manager. (line 2827)
--* BFD_RELOC_AARCH64_ADR_GOT_PAGE: howto manager. (line 2884)
--* BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL: howto manager. (line 2822)
--* BFD_RELOC_AARCH64_ADR_HI21_PCREL: howto manager. (line 2818)
--* BFD_RELOC_AARCH64_ADR_LO21_PCREL: howto manager. (line 2814)
--* BFD_RELOC_AARCH64_BRANCH19: howto manager. (line 2842)
--* BFD_RELOC_AARCH64_CALL26: howto manager. (line 2852)
--* BFD_RELOC_AARCH64_COPY: howto manager. (line 2985)
--* BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP: howto manager. (line 3019)
--* BFD_RELOC_AARCH64_GLOB_DAT: howto manager. (line 2988)
--* BFD_RELOC_AARCH64_GOT_LD_PREL19: howto manager. (line 2877)
--* BFD_RELOC_AARCH64_IRELATIVE: howto manager. (line 3009)
--* BFD_RELOC_AARCH64_JUMP26: howto manager. (line 2847)
--* BFD_RELOC_AARCH64_JUMP_SLOT: howto manager. (line 2991)
--* BFD_RELOC_AARCH64_LD32_GOT_LO12_NC: howto manager. (line 2894)
--* BFD_RELOC_AARCH64_LD64_GOT_LO12_NC: howto manager. (line 2889)
--* BFD_RELOC_AARCH64_LD_GOT_LO12_NC: howto manager. (line 3028)
--* BFD_RELOC_AARCH64_LD_LO19_PCREL: howto manager. (line 2809)
--* BFD_RELOC_AARCH64_LDST128_LO12: howto manager. (line 2872)
--* BFD_RELOC_AARCH64_LDST16_LO12: howto manager. (line 2857)
--* BFD_RELOC_AARCH64_LDST32_LO12: howto manager. (line 2862)
--* BFD_RELOC_AARCH64_LDST64_LO12: howto manager. (line 2867)
--* BFD_RELOC_AARCH64_LDST8_LO12: howto manager. (line 2832)
--* BFD_RELOC_AARCH64_LDST_LO12: howto manager. (line 3023)
--* BFD_RELOC_AARCH64_MOVW_G0: howto manager. (line 2766)
--* BFD_RELOC_AARCH64_MOVW_G0_NC: howto manager. (line 2770)
--* BFD_RELOC_AARCH64_MOVW_G0_S: howto manager. (line 2794)
--* BFD_RELOC_AARCH64_MOVW_G1: howto manager. (line 2774)
--* BFD_RELOC_AARCH64_MOVW_G1_NC: howto manager. (line 2778)
--* BFD_RELOC_AARCH64_MOVW_G1_S: howto manager. (line 2799)
--* BFD_RELOC_AARCH64_MOVW_G2: howto manager. (line 2782)
--* BFD_RELOC_AARCH64_MOVW_G2_NC: howto manager. (line 2786)
--* BFD_RELOC_AARCH64_MOVW_G2_S: howto manager. (line 2804)
--* BFD_RELOC_AARCH64_MOVW_G3: howto manager. (line 2790)
--* BFD_RELOC_AARCH64_NONE: howto manager. (line 2750)
--* BFD_RELOC_AARCH64_RELATIVE: howto manager. (line 2994)
--* BFD_RELOC_AARCH64_RELOC_END: howto manager. (line 3012)
--* BFD_RELOC_AARCH64_RELOC_START: howto manager. (line 2744)
--* BFD_RELOC_AARCH64_TLS_DTPMOD: howto manager. (line 2997)
--* BFD_RELOC_AARCH64_TLS_DTPREL: howto manager. (line 3000)
--* BFD_RELOC_AARCH64_TLS_TPREL: howto manager. (line 3003)
--* BFD_RELOC_AARCH64_TLSDESC: howto manager. (line 3006)
--* BFD_RELOC_AARCH64_TLSDESC_ADD: howto manager. (line 2979)
--* BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC: howto manager. (line 2967)
--* BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21: howto manager. (line 2958)
--* BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21: howto manager. (line 2955)
--* BFD_RELOC_AARCH64_TLSDESC_CALL: howto manager. (line 2982)
--* BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC: howto manager. (line 2964)
--* BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC: howto manager. (line 2961)
--* BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC: howto manager. (line 3036)
--* BFD_RELOC_AARCH64_TLSDESC_LD_PREL19: howto manager. (line 2952)
--* BFD_RELOC_AARCH64_TLSDESC_LDR: howto manager. (line 2976)
--* BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC: howto manager. (line 2973)
--* BFD_RELOC_AARCH64_TLSDESC_OFF_G1: howto manager. (line 2970)
--* BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC: howto manager. (line 2905)
--* BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21: howto manager. (line 2899)
--* BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21: howto manager.
-- (line 2916)
--* BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC: howto manager.
-- (line 2922)
--* BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: howto manager.
-- (line 2919)
--* BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC: howto manager.
-- (line 3032)
--* BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19: howto manager. (line 2925)
--* BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC: howto manager.
-- (line 2913)
--* BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1: howto manager. (line 2910)
--* BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12: howto manager. (line 2943)
--* BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12: howto manager. (line 2946)
--* BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC: howto manager. (line 2949)
--* BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0: howto manager. (line 2937)
--* BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC: howto manager. (line 2940)
--* BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1: howto manager. (line 2931)
--* BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC: howto manager. (line 2934)
--* BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2: howto manager. (line 2928)
--* BFD_RELOC_AARCH64_TSTBR14: howto manager. (line 2837)
--* BFD_RELOC_ALPHA_BOH: howto manager. (line 323)
--* BFD_RELOC_ALPHA_BRSGP: howto manager. (line 306)
--* BFD_RELOC_ALPHA_BSR: howto manager. (line 315)
--* BFD_RELOC_ALPHA_CODEADDR: howto manager. (line 297)
--* BFD_RELOC_ALPHA_DTPMOD64: howto manager. (line 329)
--* BFD_RELOC_ALPHA_DTPREL16: howto manager. (line 334)
--* BFD_RELOC_ALPHA_DTPREL64: howto manager. (line 331)
--* BFD_RELOC_ALPHA_DTPREL_HI16: howto manager. (line 332)
--* BFD_RELOC_ALPHA_DTPREL_LO16: howto manager. (line 333)
--* BFD_RELOC_ALPHA_ELF_LITERAL: howto manager. (line 262)
--* BFD_RELOC_ALPHA_GOTDTPREL16: howto manager. (line 330)
--* BFD_RELOC_ALPHA_GOTTPREL16: howto manager. (line 335)
--* BFD_RELOC_ALPHA_GPDISP: howto manager. (line 256)
--* BFD_RELOC_ALPHA_GPDISP_HI16: howto manager. (line 242)
--* BFD_RELOC_ALPHA_GPDISP_LO16: howto manager. (line 250)
--* BFD_RELOC_ALPHA_GPREL_HI16: howto manager. (line 301)
--* BFD_RELOC_ALPHA_GPREL_LO16: howto manager. (line 302)
--* BFD_RELOC_ALPHA_HINT: howto manager. (line 288)
--* BFD_RELOC_ALPHA_LDA: howto manager. (line 319)
--* BFD_RELOC_ALPHA_LINKAGE: howto manager. (line 293)
--* BFD_RELOC_ALPHA_LITERAL: howto manager. (line 261)
--* BFD_RELOC_ALPHA_LITUSE: howto manager. (line 263)
--* BFD_RELOC_ALPHA_NOP: howto manager. (line 311)
--* BFD_RELOC_ALPHA_TLSGD: howto manager. (line 327)
--* BFD_RELOC_ALPHA_TLSLDM: howto manager. (line 328)
--* BFD_RELOC_ALPHA_TPREL16: howto manager. (line 339)
--* BFD_RELOC_ALPHA_TPREL64: howto manager. (line 336)
--* BFD_RELOC_ALPHA_TPREL_HI16: howto manager. (line 337)
--* BFD_RELOC_ALPHA_TPREL_LO16: howto manager. (line 338)
--* BFD_RELOC_ARC_B22_PCREL: howto manager. (line 1049)
--* BFD_RELOC_ARC_B26: howto manager. (line 1054)
--* BFD_RELOC_ARM_ADR_IMM: howto manager. (line 935)
--* BFD_RELOC_ARM_ADRL_IMMEDIATE: howto manager. (line 921)
--* BFD_RELOC_ARM_ALU_PC_G0: howto manager. (line 885)
--* BFD_RELOC_ARM_ALU_PC_G0_NC: howto manager. (line 884)
--* BFD_RELOC_ARM_ALU_PC_G1: howto manager. (line 887)
--* BFD_RELOC_ARM_ALU_PC_G1_NC: howto manager. (line 886)
--* BFD_RELOC_ARM_ALU_PC_G2: howto manager. (line 888)
--* BFD_RELOC_ARM_ALU_SB_G0: howto manager. (line 899)
--* BFD_RELOC_ARM_ALU_SB_G0_NC: howto manager. (line 898)
--* BFD_RELOC_ARM_ALU_SB_G1: howto manager. (line 901)
--* BFD_RELOC_ARM_ALU_SB_G1_NC: howto manager. (line 900)
--* BFD_RELOC_ARM_ALU_SB_G2: howto manager. (line 902)
--* BFD_RELOC_ARM_CP_OFF_IMM: howto manager. (line 931)
--* BFD_RELOC_ARM_CP_OFF_IMM_S2: howto manager. (line 932)
--* BFD_RELOC_ARM_GLOB_DAT: howto manager. (line 859)
--* BFD_RELOC_ARM_GOT32: howto manager. (line 860)
--* BFD_RELOC_ARM_GOT_PREL: howto manager. (line 865)
--* BFD_RELOC_ARM_GOTOFF: howto manager. (line 863)
--* BFD_RELOC_ARM_GOTPC: howto manager. (line 864)
--* BFD_RELOC_ARM_HVC: howto manager. (line 928)
--* BFD_RELOC_ARM_HWLITERAL: howto manager. (line 942)
--* BFD_RELOC_ARM_IMMEDIATE: howto manager. (line 920)
--* BFD_RELOC_ARM_IN_POOL: howto manager. (line 938)
--* BFD_RELOC_ARM_IRELATIVE: howto manager. (line 917)
--* BFD_RELOC_ARM_JUMP_SLOT: howto manager. (line 858)
--* BFD_RELOC_ARM_LDC_PC_G0: howto manager. (line 895)
--* BFD_RELOC_ARM_LDC_PC_G1: howto manager. (line 896)
--* BFD_RELOC_ARM_LDC_PC_G2: howto manager. (line 897)
--* BFD_RELOC_ARM_LDC_SB_G0: howto manager. (line 909)
--* BFD_RELOC_ARM_LDC_SB_G1: howto manager. (line 910)
--* BFD_RELOC_ARM_LDC_SB_G2: howto manager. (line 911)
--* BFD_RELOC_ARM_LDR_IMM: howto manager. (line 936)
--* BFD_RELOC_ARM_LDR_PC_G0: howto manager. (line 889)
--* BFD_RELOC_ARM_LDR_PC_G1: howto manager. (line 890)
--* BFD_RELOC_ARM_LDR_PC_G2: howto manager. (line 891)
--* BFD_RELOC_ARM_LDR_SB_G0: howto manager. (line 903)
--* BFD_RELOC_ARM_LDR_SB_G1: howto manager. (line 904)
--* BFD_RELOC_ARM_LDR_SB_G2: howto manager. (line 905)
--* BFD_RELOC_ARM_LDRS_PC_G0: howto manager. (line 892)
--* BFD_RELOC_ARM_LDRS_PC_G1: howto manager. (line 893)
--* BFD_RELOC_ARM_LDRS_PC_G2: howto manager. (line 894)
--* BFD_RELOC_ARM_LDRS_SB_G0: howto manager. (line 906)
--* BFD_RELOC_ARM_LDRS_SB_G1: howto manager. (line 907)
--* BFD_RELOC_ARM_LDRS_SB_G2: howto manager. (line 908)
--* BFD_RELOC_ARM_LITERAL: howto manager. (line 937)
--* BFD_RELOC_ARM_MOVT: howto manager. (line 849)
--* BFD_RELOC_ARM_MOVT_PCREL: howto manager. (line 851)
--* BFD_RELOC_ARM_MOVW: howto manager. (line 848)
--* BFD_RELOC_ARM_MOVW_PCREL: howto manager. (line 850)
--* BFD_RELOC_ARM_MULTI: howto manager. (line 930)
--* BFD_RELOC_ARM_OFFSET_IMM: howto manager. (line 822)
--* BFD_RELOC_ARM_OFFSET_IMM8: howto manager. (line 939)
--* BFD_RELOC_ARM_PCREL_BLX: howto manager. (line 793)
--* BFD_RELOC_ARM_PCREL_BRANCH: howto manager. (line 789)
--* BFD_RELOC_ARM_PCREL_CALL: howto manager. (line 803)
--* BFD_RELOC_ARM_PCREL_JUMP: howto manager. (line 807)
--* BFD_RELOC_ARM_PLT32: howto manager. (line 861)
--* BFD_RELOC_ARM_PREL31: howto manager. (line 845)
--* BFD_RELOC_ARM_RELATIVE: howto manager. (line 862)
--* BFD_RELOC_ARM_ROSEGREL32: howto manager. (line 834)
--* BFD_RELOC_ARM_SBREL32: howto manager. (line 837)
--* BFD_RELOC_ARM_SHIFT_IMM: howto manager. (line 926)
--* BFD_RELOC_ARM_SMC: howto manager. (line 927)
--* BFD_RELOC_ARM_SWI: howto manager. (line 929)
--* BFD_RELOC_ARM_T32_ADD_IMM: howto manager. (line 923)
--* BFD_RELOC_ARM_T32_ADD_PC12: howto manager. (line 925)
--* BFD_RELOC_ARM_T32_CP_OFF_IMM: howto manager. (line 933)
--* BFD_RELOC_ARM_T32_CP_OFF_IMM_S2: howto manager. (line 934)
--* BFD_RELOC_ARM_T32_IMM12: howto manager. (line 924)
--* BFD_RELOC_ARM_T32_IMMEDIATE: howto manager. (line 922)
--* BFD_RELOC_ARM_T32_OFFSET_IMM: howto manager. (line 941)
--* BFD_RELOC_ARM_T32_OFFSET_U8: howto manager. (line 940)
--* BFD_RELOC_ARM_TARGET1: howto manager. (line 830)
--* BFD_RELOC_ARM_TARGET2: howto manager. (line 840)
--* BFD_RELOC_ARM_THM_TLS_CALL: howto manager. (line 878)
--* BFD_RELOC_ARM_THM_TLS_DESCSEQ: howto manager. (line 880)
--* BFD_RELOC_ARM_THUMB_ADD: howto manager. (line 943)
--* BFD_RELOC_ARM_THUMB_IMM: howto manager. (line 944)
--* BFD_RELOC_ARM_THUMB_MOVT: howto manager. (line 853)
--* BFD_RELOC_ARM_THUMB_MOVT_PCREL: howto manager. (line 855)
--* BFD_RELOC_ARM_THUMB_MOVW: howto manager. (line 852)
--* BFD_RELOC_ARM_THUMB_MOVW_PCREL: howto manager. (line 854)
--* BFD_RELOC_ARM_THUMB_OFFSET: howto manager. (line 826)
--* BFD_RELOC_ARM_THUMB_SHIFT: howto manager. (line 945)
--* BFD_RELOC_ARM_TLS_CALL: howto manager. (line 877)
--* BFD_RELOC_ARM_TLS_DESC: howto manager. (line 881)
--* BFD_RELOC_ARM_TLS_DESCSEQ: howto manager. (line 879)
--* BFD_RELOC_ARM_TLS_DTPMOD32: howto manager. (line 872)
--* BFD_RELOC_ARM_TLS_DTPOFF32: howto manager. (line 871)
--* BFD_RELOC_ARM_TLS_GD32: howto manager. (line 868)
--* BFD_RELOC_ARM_TLS_GOTDESC: howto manager. (line 876)
--* BFD_RELOC_ARM_TLS_IE32: howto manager. (line 874)
--* BFD_RELOC_ARM_TLS_LDM32: howto manager. (line 870)
--* BFD_RELOC_ARM_TLS_LDO32: howto manager. (line 869)
--* BFD_RELOC_ARM_TLS_LE32: howto manager. (line 875)
--* BFD_RELOC_ARM_TLS_TPOFF32: howto manager. (line 873)
--* BFD_RELOC_ARM_V4BX: howto manager. (line 914)
--* BFD_RELOC_AVR_13_PCREL: howto manager. (line 1644)
--* BFD_RELOC_AVR_16_PM: howto manager. (line 1648)
--* BFD_RELOC_AVR_6: howto manager. (line 1735)
--* BFD_RELOC_AVR_6_ADIW: howto manager. (line 1739)
--* BFD_RELOC_AVR_7_PCREL: howto manager. (line 1640)
--* BFD_RELOC_AVR_8_HI: howto manager. (line 1747)
--* BFD_RELOC_AVR_8_HLO: howto manager. (line 1751)
--* BFD_RELOC_AVR_8_LO: howto manager. (line 1743)
--* BFD_RELOC_AVR_CALL: howto manager. (line 1727)
--* BFD_RELOC_AVR_HH8_LDI: howto manager. (line 1660)
--* BFD_RELOC_AVR_HH8_LDI_NEG: howto manager. (line 1679)
--* BFD_RELOC_AVR_HH8_LDI_PM: howto manager. (line 1708)
--* BFD_RELOC_AVR_HH8_LDI_PM_NEG: howto manager. (line 1722)
--* BFD_RELOC_AVR_HI8_LDI: howto manager. (line 1656)
--* BFD_RELOC_AVR_HI8_LDI_GS: howto manager. (line 1702)
--* BFD_RELOC_AVR_HI8_LDI_NEG: howto manager. (line 1674)
--* BFD_RELOC_AVR_HI8_LDI_PM: howto manager. (line 1698)
--* BFD_RELOC_AVR_HI8_LDI_PM_NEG: howto manager. (line 1717)
--* BFD_RELOC_AVR_LDI: howto manager. (line 1731)
--* BFD_RELOC_AVR_LO8_LDI: howto manager. (line 1652)
--* BFD_RELOC_AVR_LO8_LDI_GS: howto manager. (line 1692)
--* BFD_RELOC_AVR_LO8_LDI_NEG: howto manager. (line 1669)
--* BFD_RELOC_AVR_LO8_LDI_PM: howto manager. (line 1688)
--* BFD_RELOC_AVR_LO8_LDI_PM_NEG: howto manager. (line 1713)
--* BFD_RELOC_AVR_MS8_LDI: howto manager. (line 1665)
--* BFD_RELOC_AVR_MS8_LDI_NEG: howto manager. (line 1684)
--* BFD_RELOC_BFIN_10_PCREL: howto manager. (line 1074)
--* BFD_RELOC_BFIN_11_PCREL: howto manager. (line 1077)
--* BFD_RELOC_BFIN_12_PCREL_JUMP: howto manager. (line 1080)
--* BFD_RELOC_BFIN_12_PCREL_JUMP_S: howto manager. (line 1083)
--* BFD_RELOC_BFIN_16_HIGH: howto manager. (line 1062)
--* BFD_RELOC_BFIN_16_IMM: howto manager. (line 1059)
--* BFD_RELOC_BFIN_16_LOW: howto manager. (line 1071)
--* BFD_RELOC_BFIN_24_PCREL_CALL_X: howto manager. (line 1086)
--* BFD_RELOC_BFIN_24_PCREL_JUMP_L: howto manager. (line 1089)
--* BFD_RELOC_BFIN_4_PCREL: howto manager. (line 1065)
--* BFD_RELOC_BFIN_5_PCREL: howto manager. (line 1068)
--* BFD_RELOC_BFIN_FUNCDESC: howto manager. (line 1095)
--* BFD_RELOC_BFIN_FUNCDESC_GOT17M4: howto manager. (line 1096)
--* BFD_RELOC_BFIN_FUNCDESC_GOTHI: howto manager. (line 1097)
--* BFD_RELOC_BFIN_FUNCDESC_GOTLO: howto manager. (line 1098)
--* BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4: howto manager. (line 1100)
--* BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI: howto manager. (line 1101)
--* BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO: howto manager. (line 1102)
--* BFD_RELOC_BFIN_FUNCDESC_VALUE: howto manager. (line 1099)
--* BFD_RELOC_BFIN_GOT: howto manager. (line 1108)
--* BFD_RELOC_BFIN_GOT17M4: howto manager. (line 1092)
--* BFD_RELOC_BFIN_GOTHI: howto manager. (line 1093)
--* BFD_RELOC_BFIN_GOTLO: howto manager. (line 1094)
--* BFD_RELOC_BFIN_GOTOFF17M4: howto manager. (line 1103)
--* BFD_RELOC_BFIN_GOTOFFHI: howto manager. (line 1104)
--* BFD_RELOC_BFIN_GOTOFFLO: howto manager. (line 1105)
--* BFD_RELOC_BFIN_PLTPC: howto manager. (line 1111)
--* BFD_RELOC_C6000_ABS_H16: howto manager. (line 1463)
--* BFD_RELOC_C6000_ABS_L16: howto manager. (line 1462)
--* BFD_RELOC_C6000_ABS_S16: howto manager. (line 1461)
--* BFD_RELOC_C6000_ALIGN: howto manager. (line 1484)
--* BFD_RELOC_C6000_COPY: howto manager. (line 1479)
--* BFD_RELOC_C6000_DSBT_INDEX: howto manager. (line 1477)
--* BFD_RELOC_C6000_EHTYPE: howto manager. (line 1481)
--* BFD_RELOC_C6000_FPHEAD: howto manager. (line 1485)
--* BFD_RELOC_C6000_JUMP_SLOT: howto manager. (line 1480)
--* BFD_RELOC_C6000_NOCMP: howto manager. (line 1486)
--* BFD_RELOC_C6000_PCR_H16: howto manager. (line 1482)
--* BFD_RELOC_C6000_PCR_L16: howto manager. (line 1483)
--* BFD_RELOC_C6000_PCR_S10: howto manager. (line 1459)
--* BFD_RELOC_C6000_PCR_S12: howto manager. (line 1458)
--* BFD_RELOC_C6000_PCR_S21: howto manager. (line 1457)
--* BFD_RELOC_C6000_PCR_S7: howto manager. (line 1460)
--* BFD_RELOC_C6000_PREL31: howto manager. (line 1478)
--* BFD_RELOC_C6000_SBR_GOT_H16_W: howto manager. (line 1476)
--* BFD_RELOC_C6000_SBR_GOT_L16_W: howto manager. (line 1475)
--* BFD_RELOC_C6000_SBR_GOT_U15_W: howto manager. (line 1474)
--* BFD_RELOC_C6000_SBR_H16_B: howto manager. (line 1471)
--* BFD_RELOC_C6000_SBR_H16_H: howto manager. (line 1472)
--* BFD_RELOC_C6000_SBR_H16_W: howto manager. (line 1473)
--* BFD_RELOC_C6000_SBR_L16_B: howto manager. (line 1468)
--* BFD_RELOC_C6000_SBR_L16_H: howto manager. (line 1469)
--* BFD_RELOC_C6000_SBR_L16_W: howto manager. (line 1470)
--* BFD_RELOC_C6000_SBR_S16: howto manager. (line 1467)
--* BFD_RELOC_C6000_SBR_U15_B: howto manager. (line 1464)
--* BFD_RELOC_C6000_SBR_U15_H: howto manager. (line 1465)
--* BFD_RELOC_C6000_SBR_U15_W: howto manager. (line 1466)
--* bfd_reloc_code_type: howto manager. (line 10)
--* BFD_RELOC_CR16_ABS20: howto manager. (line 2264)
--* BFD_RELOC_CR16_ABS24: howto manager. (line 2265)
--* BFD_RELOC_CR16_DISP16: howto manager. (line 2275)
--* BFD_RELOC_CR16_DISP20: howto manager. (line 2276)
--* BFD_RELOC_CR16_DISP24: howto manager. (line 2277)
--* BFD_RELOC_CR16_DISP24a: howto manager. (line 2278)
--* BFD_RELOC_CR16_DISP4: howto manager. (line 2273)
--* BFD_RELOC_CR16_DISP8: howto manager. (line 2274)
--* BFD_RELOC_CR16_GLOB_DAT: howto manager. (line 2284)
--* BFD_RELOC_CR16_GOT_REGREL20: howto manager. (line 2282)
--* BFD_RELOC_CR16_GOTC_REGREL20: howto manager. (line 2283)
--* BFD_RELOC_CR16_IMM16: howto manager. (line 2268)
--* BFD_RELOC_CR16_IMM20: howto manager. (line 2269)
--* BFD_RELOC_CR16_IMM24: howto manager. (line 2270)
--* BFD_RELOC_CR16_IMM32: howto manager. (line 2271)
--* BFD_RELOC_CR16_IMM32a: howto manager. (line 2272)
--* BFD_RELOC_CR16_IMM4: howto manager. (line 2266)
--* BFD_RELOC_CR16_IMM8: howto manager. (line 2267)
--* BFD_RELOC_CR16_NUM16: howto manager. (line 2253)
--* BFD_RELOC_CR16_NUM32: howto manager. (line 2254)
--* BFD_RELOC_CR16_NUM32a: howto manager. (line 2255)
--* BFD_RELOC_CR16_NUM8: howto manager. (line 2252)
--* BFD_RELOC_CR16_REGREL0: howto manager. (line 2256)
--* BFD_RELOC_CR16_REGREL14: howto manager. (line 2259)
--* BFD_RELOC_CR16_REGREL14a: howto manager. (line 2260)
--* BFD_RELOC_CR16_REGREL16: howto manager. (line 2261)
--* BFD_RELOC_CR16_REGREL20: howto manager. (line 2262)
--* BFD_RELOC_CR16_REGREL20a: howto manager. (line 2263)
--* BFD_RELOC_CR16_REGREL4: howto manager. (line 2257)
--* BFD_RELOC_CR16_REGREL4a: howto manager. (line 2258)
--* BFD_RELOC_CR16_SWITCH16: howto manager. (line 2280)
--* BFD_RELOC_CR16_SWITCH32: howto manager. (line 2281)
--* BFD_RELOC_CR16_SWITCH8: howto manager. (line 2279)
--* BFD_RELOC_CRIS_16_DTPREL: howto manager. (line 2355)
--* BFD_RELOC_CRIS_16_GOT: howto manager. (line 2331)
--* BFD_RELOC_CRIS_16_GOT_GD: howto manager. (line 2351)
--* BFD_RELOC_CRIS_16_GOT_TPREL: howto manager. (line 2357)
--* BFD_RELOC_CRIS_16_GOTPLT: howto manager. (line 2337)
--* BFD_RELOC_CRIS_16_TPREL: howto manager. (line 2359)
--* BFD_RELOC_CRIS_32_DTPREL: howto manager. (line 2354)
--* BFD_RELOC_CRIS_32_GD: howto manager. (line 2352)
--* BFD_RELOC_CRIS_32_GOT: howto manager. (line 2328)
--* BFD_RELOC_CRIS_32_GOT_GD: howto manager. (line 2350)
--* BFD_RELOC_CRIS_32_GOT_TPREL: howto manager. (line 2356)
--* BFD_RELOC_CRIS_32_GOTPLT: howto manager. (line 2334)
--* BFD_RELOC_CRIS_32_GOTREL: howto manager. (line 2340)
--* BFD_RELOC_CRIS_32_IE: howto manager. (line 2361)
--* BFD_RELOC_CRIS_32_PLT_GOTREL: howto manager. (line 2343)
--* BFD_RELOC_CRIS_32_PLT_PCREL: howto manager. (line 2346)
--* BFD_RELOC_CRIS_32_TPREL: howto manager. (line 2358)
--* BFD_RELOC_CRIS_BDISP8: howto manager. (line 2309)
--* BFD_RELOC_CRIS_COPY: howto manager. (line 2322)
--* BFD_RELOC_CRIS_DTP: howto manager. (line 2353)
--* BFD_RELOC_CRIS_DTPMOD: howto manager. (line 2360)
--* BFD_RELOC_CRIS_GLOB_DAT: howto manager. (line 2323)
--* BFD_RELOC_CRIS_JUMP_SLOT: howto manager. (line 2324)
--* BFD_RELOC_CRIS_LAPCQ_OFFSET: howto manager. (line 2317)
--* BFD_RELOC_CRIS_RELATIVE: howto manager. (line 2325)
--* BFD_RELOC_CRIS_SIGNED_16: howto manager. (line 2315)
--* BFD_RELOC_CRIS_SIGNED_6: howto manager. (line 2311)
--* BFD_RELOC_CRIS_SIGNED_8: howto manager. (line 2313)
--* BFD_RELOC_CRIS_UNSIGNED_16: howto manager. (line 2316)
--* BFD_RELOC_CRIS_UNSIGNED_4: howto manager. (line 2318)
--* BFD_RELOC_CRIS_UNSIGNED_5: howto manager. (line 2310)
--* BFD_RELOC_CRIS_UNSIGNED_6: howto manager. (line 2312)
--* BFD_RELOC_CRIS_UNSIGNED_8: howto manager. (line 2314)
--* BFD_RELOC_CRX_ABS16: howto manager. (line 2297)
--* BFD_RELOC_CRX_ABS32: howto manager. (line 2298)
--* BFD_RELOC_CRX_IMM16: howto manager. (line 2302)
--* BFD_RELOC_CRX_IMM32: howto manager. (line 2303)
--* BFD_RELOC_CRX_NUM16: howto manager. (line 2300)
--* BFD_RELOC_CRX_NUM32: howto manager. (line 2301)
--* BFD_RELOC_CRX_NUM8: howto manager. (line 2299)
--* BFD_RELOC_CRX_REGREL12: howto manager. (line 2293)
--* BFD_RELOC_CRX_REGREL22: howto manager. (line 2294)
--* BFD_RELOC_CRX_REGREL28: howto manager. (line 2295)
--* BFD_RELOC_CRX_REGREL32: howto manager. (line 2296)
--* BFD_RELOC_CRX_REL16: howto manager. (line 2290)
--* BFD_RELOC_CRX_REL24: howto manager. (line 2291)
--* BFD_RELOC_CRX_REL32: howto manager. (line 2292)
--* BFD_RELOC_CRX_REL4: howto manager. (line 2287)
--* BFD_RELOC_CRX_REL8: howto manager. (line 2288)
--* BFD_RELOC_CRX_REL8_CMP: howto manager. (line 2289)
--* BFD_RELOC_CRX_SWITCH16: howto manager. (line 2305)
--* BFD_RELOC_CRX_SWITCH32: howto manager. (line 2306)
--* BFD_RELOC_CRX_SWITCH8: howto manager. (line 2304)
--* BFD_RELOC_CTOR: howto manager. (line 783)
--* BFD_RELOC_D10V_10_PCREL_L: howto manager. (line 1178)
--* BFD_RELOC_D10V_10_PCREL_R: howto manager. (line 1174)
--* BFD_RELOC_D10V_18: howto manager. (line 1183)
--* BFD_RELOC_D10V_18_PCREL: howto manager. (line 1186)
--* BFD_RELOC_D30V_15: howto manager. (line 1201)
--* BFD_RELOC_D30V_15_PCREL: howto manager. (line 1205)
--* BFD_RELOC_D30V_15_PCREL_R: howto manager. (line 1209)
--* BFD_RELOC_D30V_21: howto manager. (line 1214)
--* BFD_RELOC_D30V_21_PCREL: howto manager. (line 1218)
--* BFD_RELOC_D30V_21_PCREL_R: howto manager. (line 1222)
--* BFD_RELOC_D30V_32: howto manager. (line 1227)
--* BFD_RELOC_D30V_32_PCREL: howto manager. (line 1230)
--* BFD_RELOC_D30V_6: howto manager. (line 1189)
--* BFD_RELOC_D30V_9_PCREL: howto manager. (line 1192)
--* BFD_RELOC_D30V_9_PCREL_R: howto manager. (line 1196)
--* BFD_RELOC_DLX_HI16_S: howto manager. (line 1233)
--* BFD_RELOC_DLX_JMP26: howto manager. (line 1239)
--* BFD_RELOC_DLX_LO16: howto manager. (line 1236)
--* BFD_RELOC_EPIPHANY_HIGH: howto manager. (line 3238)
--* BFD_RELOC_EPIPHANY_IMM11: howto manager. (line 3247)
--* BFD_RELOC_EPIPHANY_IMM8: howto manager. (line 3251)
--* BFD_RELOC_EPIPHANY_LOW: howto manager. (line 3241)
--* BFD_RELOC_EPIPHANY_SIMM11: howto manager. (line 3244)
--* BFD_RELOC_EPIPHANY_SIMM24: howto manager. (line 3235)
--* BFD_RELOC_EPIPHANY_SIMM8: howto manager. (line 3232)
--* BFD_RELOC_FR30_10_IN_8: howto manager. (line 1508)
--* BFD_RELOC_FR30_12_PCREL: howto manager. (line 1516)
--* BFD_RELOC_FR30_20: howto manager. (line 1492)
--* BFD_RELOC_FR30_48: howto manager. (line 1489)
--* BFD_RELOC_FR30_6_IN_4: howto manager. (line 1496)
--* BFD_RELOC_FR30_8_IN_8: howto manager. (line 1500)
--* BFD_RELOC_FR30_9_IN_8: howto manager. (line 1504)
--* BFD_RELOC_FR30_9_PCREL: howto manager. (line 1512)
--* BFD_RELOC_FRV_FUNCDESC: howto manager. (line 491)
--* BFD_RELOC_FRV_FUNCDESC_GOT12: howto manager. (line 492)
--* BFD_RELOC_FRV_FUNCDESC_GOTHI: howto manager. (line 493)
--* BFD_RELOC_FRV_FUNCDESC_GOTLO: howto manager. (line 494)
--* BFD_RELOC_FRV_FUNCDESC_GOTOFF12: howto manager. (line 496)
--* BFD_RELOC_FRV_FUNCDESC_GOTOFFHI: howto manager. (line 497)
--* BFD_RELOC_FRV_FUNCDESC_GOTOFFLO: howto manager. (line 498)
--* BFD_RELOC_FRV_FUNCDESC_VALUE: howto manager. (line 495)
--* BFD_RELOC_FRV_GETTLSOFF: howto manager. (line 502)
--* BFD_RELOC_FRV_GETTLSOFF_RELAX: howto manager. (line 515)
--* BFD_RELOC_FRV_GOT12: howto manager. (line 488)
--* BFD_RELOC_FRV_GOTHI: howto manager. (line 489)
--* BFD_RELOC_FRV_GOTLO: howto manager. (line 490)
--* BFD_RELOC_FRV_GOTOFF12: howto manager. (line 499)
--* BFD_RELOC_FRV_GOTOFFHI: howto manager. (line 500)
--* BFD_RELOC_FRV_GOTOFFLO: howto manager. (line 501)
--* BFD_RELOC_FRV_GOTTLSDESC12: howto manager. (line 504)
--* BFD_RELOC_FRV_GOTTLSDESCHI: howto manager. (line 505)
--* BFD_RELOC_FRV_GOTTLSDESCLO: howto manager. (line 506)
--* BFD_RELOC_FRV_GOTTLSOFF12: howto manager. (line 510)
--* BFD_RELOC_FRV_GOTTLSOFFHI: howto manager. (line 511)
--* BFD_RELOC_FRV_GOTTLSOFFLO: howto manager. (line 512)
--* BFD_RELOC_FRV_GPREL12: howto manager. (line 483)
--* BFD_RELOC_FRV_GPREL32: howto manager. (line 485)
--* BFD_RELOC_FRV_GPRELHI: howto manager. (line 486)
--* BFD_RELOC_FRV_GPRELLO: howto manager. (line 487)
--* BFD_RELOC_FRV_GPRELU12: howto manager. (line 484)
--* BFD_RELOC_FRV_HI16: howto manager. (line 482)
--* BFD_RELOC_FRV_LABEL16: howto manager. (line 479)
--* BFD_RELOC_FRV_LABEL24: howto manager. (line 480)
--* BFD_RELOC_FRV_LO16: howto manager. (line 481)
--* BFD_RELOC_FRV_TLSDESC_RELAX: howto manager. (line 514)
--* BFD_RELOC_FRV_TLSDESC_VALUE: howto manager. (line 503)
--* BFD_RELOC_FRV_TLSMOFF: howto manager. (line 517)
--* BFD_RELOC_FRV_TLSMOFF12: howto manager. (line 507)
--* BFD_RELOC_FRV_TLSMOFFHI: howto manager. (line 508)
--* BFD_RELOC_FRV_TLSMOFFLO: howto manager. (line 509)
--* BFD_RELOC_FRV_TLSOFF: howto manager. (line 513)
--* BFD_RELOC_FRV_TLSOFF_RELAX: howto manager. (line 516)
--* BFD_RELOC_GPREL16: howto manager. (line 125)
--* BFD_RELOC_GPREL32: howto manager. (line 126)
--* BFD_RELOC_H8_DIR16A8: howto manager. (line 2402)
--* BFD_RELOC_H8_DIR16R8: howto manager. (line 2403)
--* BFD_RELOC_H8_DIR24A8: howto manager. (line 2404)
--* BFD_RELOC_H8_DIR24R8: howto manager. (line 2405)
--* BFD_RELOC_H8_DIR32A16: howto manager. (line 2406)
--* BFD_RELOC_H8_DISP32A16: howto manager. (line 2407)
--* BFD_RELOC_HI16: howto manager. (line 352)
--* BFD_RELOC_HI16_BASEREL: howto manager. (line 101)
--* BFD_RELOC_HI16_GOTOFF: howto manager. (line 57)
--* BFD_RELOC_HI16_PCREL: howto manager. (line 364)
--* BFD_RELOC_HI16_PLTOFF: howto manager. (line 69)
--* BFD_RELOC_HI16_S: howto manager. (line 355)
--* BFD_RELOC_HI16_S_BASEREL: howto manager. (line 102)
--* BFD_RELOC_HI16_S_GOTOFF: howto manager. (line 58)
--* BFD_RELOC_HI16_S_PCREL: howto manager. (line 367)
--* BFD_RELOC_HI16_S_PLTOFF: howto manager. (line 70)
--* BFD_RELOC_HI22: howto manager. (line 120)
--* BFD_RELOC_I370_D12: howto manager. (line 780)
--* BFD_RELOC_I960_CALLJ: howto manager. (line 132)
--* BFD_RELOC_IA64_COPY: howto manager. (line 2084)
--* BFD_RELOC_IA64_DIR32LSB: howto manager. (line 2029)
--* BFD_RELOC_IA64_DIR32MSB: howto manager. (line 2028)
--* BFD_RELOC_IA64_DIR64LSB: howto manager. (line 2031)
--* BFD_RELOC_IA64_DIR64MSB: howto manager. (line 2030)
--* BFD_RELOC_IA64_DTPMOD64LSB: howto manager. (line 2094)
--* BFD_RELOC_IA64_DTPMOD64MSB: howto manager. (line 2093)
--* BFD_RELOC_IA64_DTPREL14: howto manager. (line 2096)
--* BFD_RELOC_IA64_DTPREL22: howto manager. (line 2097)
--* BFD_RELOC_IA64_DTPREL32LSB: howto manager. (line 2100)
--* BFD_RELOC_IA64_DTPREL32MSB: howto manager. (line 2099)
--* BFD_RELOC_IA64_DTPREL64I: howto manager. (line 2098)
--* BFD_RELOC_IA64_DTPREL64LSB: howto manager. (line 2102)
--* BFD_RELOC_IA64_DTPREL64MSB: howto manager. (line 2101)
--* BFD_RELOC_IA64_FPTR32LSB: howto manager. (line 2046)
--* BFD_RELOC_IA64_FPTR32MSB: howto manager. (line 2045)
--* BFD_RELOC_IA64_FPTR64I: howto manager. (line 2044)
--* BFD_RELOC_IA64_FPTR64LSB: howto manager. (line 2048)
--* BFD_RELOC_IA64_FPTR64MSB: howto manager. (line 2047)
--* BFD_RELOC_IA64_GPREL22: howto manager. (line 2032)
--* BFD_RELOC_IA64_GPREL32LSB: howto manager. (line 2035)
--* BFD_RELOC_IA64_GPREL32MSB: howto manager. (line 2034)
--* BFD_RELOC_IA64_GPREL64I: howto manager. (line 2033)
--* BFD_RELOC_IA64_GPREL64LSB: howto manager. (line 2037)
--* BFD_RELOC_IA64_GPREL64MSB: howto manager. (line 2036)
--* BFD_RELOC_IA64_IMM14: howto manager. (line 2025)
--* BFD_RELOC_IA64_IMM22: howto manager. (line 2026)
--* BFD_RELOC_IA64_IMM64: howto manager. (line 2027)
--* BFD_RELOC_IA64_IPLTLSB: howto manager. (line 2083)
--* BFD_RELOC_IA64_IPLTMSB: howto manager. (line 2082)
--* BFD_RELOC_IA64_LDXMOV: howto manager. (line 2086)
--* BFD_RELOC_IA64_LTOFF22: howto manager. (line 2038)
--* BFD_RELOC_IA64_LTOFF22X: howto manager. (line 2085)
--* BFD_RELOC_IA64_LTOFF64I: howto manager. (line 2039)
--* BFD_RELOC_IA64_LTOFF_DTPMOD22: howto manager. (line 2095)
--* BFD_RELOC_IA64_LTOFF_DTPREL22: howto manager. (line 2103)
--* BFD_RELOC_IA64_LTOFF_FPTR22: howto manager. (line 2060)
--* BFD_RELOC_IA64_LTOFF_FPTR32LSB: howto manager. (line 2063)
--* BFD_RELOC_IA64_LTOFF_FPTR32MSB: howto manager. (line 2062)
--* BFD_RELOC_IA64_LTOFF_FPTR64I: howto manager. (line 2061)
--* BFD_RELOC_IA64_LTOFF_FPTR64LSB: howto manager. (line 2065)
--* BFD_RELOC_IA64_LTOFF_FPTR64MSB: howto manager. (line 2064)
--* BFD_RELOC_IA64_LTOFF_TPREL22: howto manager. (line 2092)
--* BFD_RELOC_IA64_LTV32LSB: howto manager. (line 2079)
--* BFD_RELOC_IA64_LTV32MSB: howto manager. (line 2078)
--* BFD_RELOC_IA64_LTV64LSB: howto manager. (line 2081)
--* BFD_RELOC_IA64_LTV64MSB: howto manager. (line 2080)
--* BFD_RELOC_IA64_PCREL21B: howto manager. (line 2049)
--* BFD_RELOC_IA64_PCREL21BI: howto manager. (line 2050)
--* BFD_RELOC_IA64_PCREL21F: howto manager. (line 2052)
--* BFD_RELOC_IA64_PCREL21M: howto manager. (line 2051)
--* BFD_RELOC_IA64_PCREL22: howto manager. (line 2053)
--* BFD_RELOC_IA64_PCREL32LSB: howto manager. (line 2057)
--* BFD_RELOC_IA64_PCREL32MSB: howto manager. (line 2056)
--* BFD_RELOC_IA64_PCREL60B: howto manager. (line 2054)
--* BFD_RELOC_IA64_PCREL64I: howto manager. (line 2055)
--* BFD_RELOC_IA64_PCREL64LSB: howto manager. (line 2059)
--* BFD_RELOC_IA64_PCREL64MSB: howto manager. (line 2058)
--* BFD_RELOC_IA64_PLTOFF22: howto manager. (line 2040)
--* BFD_RELOC_IA64_PLTOFF64I: howto manager. (line 2041)
--* BFD_RELOC_IA64_PLTOFF64LSB: howto manager. (line 2043)
--* BFD_RELOC_IA64_PLTOFF64MSB: howto manager. (line 2042)
--* BFD_RELOC_IA64_REL32LSB: howto manager. (line 2075)
--* BFD_RELOC_IA64_REL32MSB: howto manager. (line 2074)
--* BFD_RELOC_IA64_REL64LSB: howto manager. (line 2077)
--* BFD_RELOC_IA64_REL64MSB: howto manager. (line 2076)
--* BFD_RELOC_IA64_SECREL32LSB: howto manager. (line 2071)
--* BFD_RELOC_IA64_SECREL32MSB: howto manager. (line 2070)
--* BFD_RELOC_IA64_SECREL64LSB: howto manager. (line 2073)
--* BFD_RELOC_IA64_SECREL64MSB: howto manager. (line 2072)
--* BFD_RELOC_IA64_SEGREL32LSB: howto manager. (line 2067)
--* BFD_RELOC_IA64_SEGREL32MSB: howto manager. (line 2066)
--* BFD_RELOC_IA64_SEGREL64LSB: howto manager. (line 2069)
--* BFD_RELOC_IA64_SEGREL64MSB: howto manager. (line 2068)
--* BFD_RELOC_IA64_TPREL14: howto manager. (line 2087)
--* BFD_RELOC_IA64_TPREL22: howto manager. (line 2088)
--* BFD_RELOC_IA64_TPREL64I: howto manager. (line 2089)
--* BFD_RELOC_IA64_TPREL64LSB: howto manager. (line 2091)
--* BFD_RELOC_IA64_TPREL64MSB: howto manager. (line 2090)
--* BFD_RELOC_IP2K_ADDR16CJP: howto manager. (line 1977)
--* BFD_RELOC_IP2K_BANK: howto manager. (line 1974)
--* BFD_RELOC_IP2K_EX8DATA: howto manager. (line 1985)
--* BFD_RELOC_IP2K_FR9: howto manager. (line 1971)
--* BFD_RELOC_IP2K_FR_OFFSET: howto manager. (line 1998)
--* BFD_RELOC_IP2K_HI8DATA: howto manager. (line 1984)
--* BFD_RELOC_IP2K_HI8INSN: howto manager. (line 1989)
--* BFD_RELOC_IP2K_LO8DATA: howto manager. (line 1983)
--* BFD_RELOC_IP2K_LO8INSN: howto manager. (line 1988)
--* BFD_RELOC_IP2K_PAGE3: howto manager. (line 1980)
--* BFD_RELOC_IP2K_PC_SKIP: howto manager. (line 1992)
--* BFD_RELOC_IP2K_TEXT: howto manager. (line 1995)
--* BFD_RELOC_IQ2000_OFFSET_16: howto manager. (line 2508)
--* BFD_RELOC_IQ2000_OFFSET_21: howto manager. (line 2509)
--* BFD_RELOC_IQ2000_UHI16: howto manager. (line 2510)
--* BFD_RELOC_LM32_16_GOT: howto manager. (line 2615)
--* BFD_RELOC_LM32_BRANCH: howto manager. (line 2614)
--* BFD_RELOC_LM32_CALL: howto manager. (line 2613)
--* BFD_RELOC_LM32_COPY: howto manager. (line 2618)
--* BFD_RELOC_LM32_GLOB_DAT: howto manager. (line 2619)
--* BFD_RELOC_LM32_GOTOFF_HI16: howto manager. (line 2616)
--* BFD_RELOC_LM32_GOTOFF_LO16: howto manager. (line 2617)
--* BFD_RELOC_LM32_JMP_SLOT: howto manager. (line 2620)
--* BFD_RELOC_LM32_RELATIVE: howto manager. (line 2621)
--* BFD_RELOC_LO10: howto manager. (line 121)
--* BFD_RELOC_LO16: howto manager. (line 361)
--* BFD_RELOC_LO16_BASEREL: howto manager. (line 100)
--* BFD_RELOC_LO16_GOTOFF: howto manager. (line 56)
--* BFD_RELOC_LO16_PCREL: howto manager. (line 370)
--* BFD_RELOC_LO16_PLTOFF: howto manager. (line 68)
--* BFD_RELOC_M32C_HI8: howto manager. (line 1242)
--* BFD_RELOC_M32C_RL_1ADDR: howto manager. (line 1244)
--* BFD_RELOC_M32C_RL_2ADDR: howto manager. (line 1245)
--* BFD_RELOC_M32C_RL_JUMP: howto manager. (line 1243)
--* BFD_RELOC_M32R_10_PCREL: howto manager. (line 1252)
--* BFD_RELOC_M32R_18_PCREL: howto manager. (line 1256)
--* BFD_RELOC_M32R_24: howto manager. (line 1248)
--* BFD_RELOC_M32R_26_PCREL: howto manager. (line 1259)
--* BFD_RELOC_M32R_26_PLTREL: howto manager. (line 1278)
--* BFD_RELOC_M32R_COPY: howto manager. (line 1279)
--* BFD_RELOC_M32R_GLOB_DAT: howto manager. (line 1280)
--* BFD_RELOC_M32R_GOT16_HI_SLO: howto manager. (line 1289)
--* BFD_RELOC_M32R_GOT16_HI_ULO: howto manager. (line 1288)
--* BFD_RELOC_M32R_GOT16_LO: howto manager. (line 1290)
--* BFD_RELOC_M32R_GOT24: howto manager. (line 1277)
--* BFD_RELOC_M32R_GOTOFF: howto manager. (line 1283)
--* BFD_RELOC_M32R_GOTOFF_HI_SLO: howto manager. (line 1285)
--* BFD_RELOC_M32R_GOTOFF_HI_ULO: howto manager. (line 1284)
--* BFD_RELOC_M32R_GOTOFF_LO: howto manager. (line 1286)
--* BFD_RELOC_M32R_GOTPC24: howto manager. (line 1287)
--* BFD_RELOC_M32R_GOTPC_HI_SLO: howto manager. (line 1292)
--* BFD_RELOC_M32R_GOTPC_HI_ULO: howto manager. (line 1291)
--* BFD_RELOC_M32R_GOTPC_LO: howto manager. (line 1293)
--* BFD_RELOC_M32R_HI16_SLO: howto manager. (line 1266)
--* BFD_RELOC_M32R_HI16_ULO: howto manager. (line 1262)
--* BFD_RELOC_M32R_JMP_SLOT: howto manager. (line 1281)
--* BFD_RELOC_M32R_LO16: howto manager. (line 1270)
--* BFD_RELOC_M32R_RELATIVE: howto manager. (line 1282)
--* BFD_RELOC_M32R_SDA16: howto manager. (line 1273)
--* BFD_RELOC_M68HC11_24: howto manager. (line 2139)
--* BFD_RELOC_M68HC11_3B: howto manager. (line 2114)
--* BFD_RELOC_M68HC11_HI8: howto manager. (line 2106)
--* BFD_RELOC_M68HC11_LO16: howto manager. (line 2128)
--* BFD_RELOC_M68HC11_LO8: howto manager. (line 2110)
--* BFD_RELOC_M68HC11_PAGE: howto manager. (line 2134)
--* BFD_RELOC_M68HC11_RL_GROUP: howto manager. (line 2123)
--* BFD_RELOC_M68HC11_RL_JUMP: howto manager. (line 2117)
--* BFD_RELOC_M68HC12_10_PCREL: howto manager. (line 2199)
--* BFD_RELOC_M68HC12_16B: howto manager. (line 2193)
--* BFD_RELOC_M68HC12_5B: howto manager. (line 2145)
--* BFD_RELOC_M68HC12_9_PCREL: howto manager. (line 2196)
--* BFD_RELOC_M68HC12_9B: howto manager. (line 2190)
--* BFD_RELOC_M68HC12_HI8XG: howto manager. (line 2206)
--* BFD_RELOC_M68HC12_LO8XG: howto manager. (line 2202)
--* BFD_RELOC_MACH_O_LOCAL_SECTDIFF: howto manager. (line 2628)
--* BFD_RELOC_MACH_O_PAIR: howto manager. (line 2631)
--* BFD_RELOC_MACH_O_SECTDIFF: howto manager. (line 2624)
--* BFD_RELOC_MACH_O_X86_64_BRANCH32: howto manager. (line 2634)
--* BFD_RELOC_MACH_O_X86_64_BRANCH8: howto manager. (line 2635)
--* BFD_RELOC_MACH_O_X86_64_GOT: howto manager. (line 2639)
--* BFD_RELOC_MACH_O_X86_64_GOT_LOAD: howto manager. (line 2642)
--* BFD_RELOC_MACH_O_X86_64_PCREL32_1: howto manager. (line 2652)
--* BFD_RELOC_MACH_O_X86_64_PCREL32_2: howto manager. (line 2655)
--* BFD_RELOC_MACH_O_X86_64_PCREL32_4: howto manager. (line 2658)
--* BFD_RELOC_MACH_O_X86_64_SUBTRACTOR32: howto manager. (line 2646)
--* BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64: howto manager. (line 2649)
--* BFD_RELOC_MCORE_PCREL_32: howto manager. (line 1523)
--* BFD_RELOC_MCORE_PCREL_IMM11BY2: howto manager. (line 1521)
--* BFD_RELOC_MCORE_PCREL_IMM4BY2: howto manager. (line 1522)
--* BFD_RELOC_MCORE_PCREL_IMM8BY4: howto manager. (line 1520)
--* BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2: howto manager. (line 1524)
--* BFD_RELOC_MCORE_RVA: howto manager. (line 1525)
--* BFD_RELOC_MEP_16: howto manager. (line 1529)
--* BFD_RELOC_MEP_32: howto manager. (line 1530)
--* BFD_RELOC_MEP_8: howto manager. (line 1528)
--* BFD_RELOC_MEP_ADDR24A4: howto manager. (line 1545)
--* BFD_RELOC_MEP_GNU_VTENTRY: howto manager. (line 1547)
--* BFD_RELOC_MEP_GNU_VTINHERIT: howto manager. (line 1546)
--* BFD_RELOC_MEP_GPREL: howto manager. (line 1539)
--* BFD_RELOC_MEP_HI16S: howto manager. (line 1538)
--* BFD_RELOC_MEP_HI16U: howto manager. (line 1537)
--* BFD_RELOC_MEP_LOW16: howto manager. (line 1536)
--* BFD_RELOC_MEP_PCABS24A2: howto manager. (line 1535)
--* BFD_RELOC_MEP_PCREL12A2: howto manager. (line 1532)
--* BFD_RELOC_MEP_PCREL17A2: howto manager. (line 1533)
--* BFD_RELOC_MEP_PCREL24A2: howto manager. (line 1534)
--* BFD_RELOC_MEP_PCREL8A2: howto manager. (line 1531)
--* BFD_RELOC_MEP_TPREL: howto manager. (line 1540)
--* BFD_RELOC_MEP_TPREL7: howto manager. (line 1541)
--* BFD_RELOC_MEP_TPREL7A2: howto manager. (line 1542)
--* BFD_RELOC_MEP_TPREL7A4: howto manager. (line 1543)
--* BFD_RELOC_MEP_UIMM24: howto manager. (line 1544)
--* BFD_RELOC_METAG_COPY: howto manager. (line 1569)
--* BFD_RELOC_METAG_GETSET_GOT: howto manager. (line 1561)
--* BFD_RELOC_METAG_GETSET_GOTOFF: howto manager. (line 1560)
--* BFD_RELOC_METAG_GETSETOFF: howto manager. (line 1553)
--* BFD_RELOC_METAG_GLOB_DAT: howto manager. (line 1572)
--* BFD_RELOC_METAG_GOTOFF: howto manager. (line 1567)
--* BFD_RELOC_METAG_HI16_GOTOFF: howto manager. (line 1558)
--* BFD_RELOC_METAG_HI16_GOTPC: howto manager. (line 1562)
--* BFD_RELOC_METAG_HI16_PLT: howto manager. (line 1564)
--* BFD_RELOC_METAG_HIADDR16: howto manager. (line 1550)
--* BFD_RELOC_METAG_HIOG: howto manager. (line 1554)
--* BFD_RELOC_METAG_JMP_SLOT: howto manager. (line 1570)
--* BFD_RELOC_METAG_LO16_GOTOFF: howto manager. (line 1559)
--* BFD_RELOC_METAG_LO16_GOTPC: howto manager. (line 1563)
--* BFD_RELOC_METAG_LO16_PLT: howto manager. (line 1565)
--* BFD_RELOC_METAG_LOADDR16: howto manager. (line 1551)
--* BFD_RELOC_METAG_LOOG: howto manager. (line 1555)
--* BFD_RELOC_METAG_PLT: howto manager. (line 1568)
--* BFD_RELOC_METAG_REL16: howto manager. (line 1557)
--* BFD_RELOC_METAG_REL8: howto manager. (line 1556)
--* BFD_RELOC_METAG_RELATIVE: howto manager. (line 1571)
--* BFD_RELOC_METAG_RELBRANCH: howto manager. (line 1552)
--* BFD_RELOC_METAG_RELBRANCH_PLT: howto manager. (line 1566)
--* BFD_RELOC_METAG_TLS_DTPMOD: howto manager. (line 1583)
--* BFD_RELOC_METAG_TLS_DTPOFF: howto manager. (line 1584)
--* BFD_RELOC_METAG_TLS_GD: howto manager. (line 1573)
--* BFD_RELOC_METAG_TLS_IE: howto manager. (line 1578)
--* BFD_RELOC_METAG_TLS_IENONPIC: howto manager. (line 1579)
--* BFD_RELOC_METAG_TLS_IENONPIC_HI16: howto manager. (line 1580)
--* BFD_RELOC_METAG_TLS_IENONPIC_LO16: howto manager. (line 1581)
--* BFD_RELOC_METAG_TLS_LDM: howto manager. (line 1574)
--* BFD_RELOC_METAG_TLS_LDO: howto manager. (line 1577)
--* BFD_RELOC_METAG_TLS_LDO_HI16: howto manager. (line 1575)
--* BFD_RELOC_METAG_TLS_LDO_LO16: howto manager. (line 1576)
--* BFD_RELOC_METAG_TLS_LE: howto manager. (line 1585)
--* BFD_RELOC_METAG_TLS_LE_HI16: howto manager. (line 1586)
--* BFD_RELOC_METAG_TLS_LE_LO16: howto manager. (line 1587)
--* BFD_RELOC_METAG_TLS_TPOFF: howto manager. (line 1582)
--* BFD_RELOC_MICROBLAZE_32_GOTOFF: howto manager. (line 2705)
--* BFD_RELOC_MICROBLAZE_32_LO: howto manager. (line 2661)
--* BFD_RELOC_MICROBLAZE_32_LO_PCREL: howto manager. (line 2665)
--* BFD_RELOC_MICROBLAZE_32_ROSDA: howto manager. (line 2669)
--* BFD_RELOC_MICROBLAZE_32_RWSDA: howto manager. (line 2673)
--* BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM: howto manager. (line 2677)
--* BFD_RELOC_MICROBLAZE_32_TLSDTPMOD: howto manager. (line 2726)
--* BFD_RELOC_MICROBLAZE_32_TLSDTPREL: howto manager. (line 2729)
--* BFD_RELOC_MICROBLAZE_64_GOT: howto manager. (line 2691)
--* BFD_RELOC_MICROBLAZE_64_GOTOFF: howto manager. (line 2700)
--* BFD_RELOC_MICROBLAZE_64_GOTPC: howto manager. (line 2686)
--* BFD_RELOC_MICROBLAZE_64_NONE: howto manager. (line 2681)
--* BFD_RELOC_MICROBLAZE_64_PLT: howto manager. (line 2695)
--* BFD_RELOC_MICROBLAZE_64_TLS: howto manager. (line 2713)
--* BFD_RELOC_MICROBLAZE_64_TLSDTPREL: howto manager. (line 2732)
--* BFD_RELOC_MICROBLAZE_64_TLSGD: howto manager. (line 2716)
--* BFD_RELOC_MICROBLAZE_64_TLSGOTTPREL: howto manager. (line 2736)
--* BFD_RELOC_MICROBLAZE_64_TLSLD: howto manager. (line 2721)
--* BFD_RELOC_MICROBLAZE_64_TLSTPREL: howto manager. (line 2740)
--* BFD_RELOC_MICROBLAZE_COPY: howto manager. (line 2709)
--* BFD_RELOC_MICROMIPS_10_PCREL_S1: howto manager. (line 404)
--* BFD_RELOC_MICROMIPS_16_PCREL_S1: howto manager. (line 405)
--* BFD_RELOC_MICROMIPS_7_PCREL_S1: howto manager. (line 403)
--* BFD_RELOC_MICROMIPS_CALL16: howto manager. (line 417)
--* BFD_RELOC_MICROMIPS_CALL_HI16: howto manager. (line 423)
--* BFD_RELOC_MICROMIPS_CALL_LO16: howto manager. (line 425)
--* BFD_RELOC_MICROMIPS_GOT16: howto manager. (line 415)
--* BFD_RELOC_MICROMIPS_GOT_DISP: howto manager. (line 433)
--* BFD_RELOC_MICROMIPS_GOT_HI16: howto manager. (line 419)
--* BFD_RELOC_MICROMIPS_GOT_LO16: howto manager. (line 421)
--* BFD_RELOC_MICROMIPS_GOT_OFST: howto manager. (line 431)
--* BFD_RELOC_MICROMIPS_GOT_PAGE: howto manager. (line 429)
--* BFD_RELOC_MICROMIPS_GPREL16: howto manager. (line 408)
--* BFD_RELOC_MICROMIPS_HI16: howto manager. (line 409)
--* BFD_RELOC_MICROMIPS_HI16_S: howto manager. (line 410)
--* BFD_RELOC_MICROMIPS_HIGHER: howto manager. (line 442)
--* BFD_RELOC_MICROMIPS_HIGHEST: howto manager. (line 440)
--* BFD_RELOC_MICROMIPS_JALR: howto manager. (line 448)
--* BFD_RELOC_MICROMIPS_JMP: howto manager. (line 343)
--* BFD_RELOC_MICROMIPS_LITERAL: howto manager. (line 400)
--* BFD_RELOC_MICROMIPS_LO16: howto manager. (line 411)
--* BFD_RELOC_MICROMIPS_SCN_DISP: howto manager. (line 444)
--* BFD_RELOC_MICROMIPS_SUB: howto manager. (line 427)
--* BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16: howto manager. (line 458)
--* BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16: howto manager. (line 460)
--* BFD_RELOC_MICROMIPS_TLS_GD: howto manager. (line 454)
--* BFD_RELOC_MICROMIPS_TLS_GOTTPREL: howto manager. (line 462)
--* BFD_RELOC_MICROMIPS_TLS_LDM: howto manager. (line 456)
--* BFD_RELOC_MICROMIPS_TLS_TPREL_HI16: howto manager. (line 466)
--* BFD_RELOC_MICROMIPS_TLS_TPREL_LO16: howto manager. (line 468)
--* BFD_RELOC_MIPS16_CALL16: howto manager. (line 374)
--* BFD_RELOC_MIPS16_GOT16: howto manager. (line 373)
--* BFD_RELOC_MIPS16_GPREL: howto manager. (line 349)
--* BFD_RELOC_MIPS16_HI16: howto manager. (line 378)
--* BFD_RELOC_MIPS16_HI16_S: howto manager. (line 381)
--* BFD_RELOC_MIPS16_JMP: howto manager. (line 346)
--* BFD_RELOC_MIPS16_LO16: howto manager. (line 387)
--* BFD_RELOC_MIPS16_TLS_DTPREL_HI16: howto manager. (line 392)
--* BFD_RELOC_MIPS16_TLS_DTPREL_LO16: howto manager. (line 393)
--* BFD_RELOC_MIPS16_TLS_GD: howto manager. (line 390)
--* BFD_RELOC_MIPS16_TLS_GOTTPREL: howto manager. (line 394)
--* BFD_RELOC_MIPS16_TLS_LDM: howto manager. (line 391)
--* BFD_RELOC_MIPS16_TLS_TPREL_HI16: howto manager. (line 395)
--* BFD_RELOC_MIPS16_TLS_TPREL_LO16: howto manager. (line 396)
--* BFD_RELOC_MIPS_CALL16: howto manager. (line 416)
--* BFD_RELOC_MIPS_CALL_HI16: howto manager. (line 422)
--* BFD_RELOC_MIPS_CALL_LO16: howto manager. (line 424)
--* BFD_RELOC_MIPS_COPY: howto manager. (line 472)
--* BFD_RELOC_MIPS_DELETE: howto manager. (line 438)
--* BFD_RELOC_MIPS_EH: howto manager. (line 469)
--* BFD_RELOC_MIPS_GOT16: howto manager. (line 414)
--* BFD_RELOC_MIPS_GOT_DISP: howto manager. (line 432)
--* BFD_RELOC_MIPS_GOT_HI16: howto manager. (line 418)
--* BFD_RELOC_MIPS_GOT_LO16: howto manager. (line 420)
--* BFD_RELOC_MIPS_GOT_OFST: howto manager. (line 430)
--* BFD_RELOC_MIPS_GOT_PAGE: howto manager. (line 428)
--* BFD_RELOC_MIPS_HIGHER: howto manager. (line 441)
--* BFD_RELOC_MIPS_HIGHEST: howto manager. (line 439)
--* BFD_RELOC_MIPS_INSERT_A: howto manager. (line 436)
--* BFD_RELOC_MIPS_INSERT_B: howto manager. (line 437)
--* BFD_RELOC_MIPS_JALR: howto manager. (line 447)
--* BFD_RELOC_MIPS_JMP: howto manager. (line 342)
--* BFD_RELOC_MIPS_JUMP_SLOT: howto manager. (line 473)
--* BFD_RELOC_MIPS_LITERAL: howto manager. (line 399)
--* BFD_RELOC_MIPS_REL16: howto manager. (line 445)
--* BFD_RELOC_MIPS_RELGOT: howto manager. (line 446)
--* BFD_RELOC_MIPS_SCN_DISP: howto manager. (line 443)
--* BFD_RELOC_MIPS_SHIFT5: howto manager. (line 434)
--* BFD_RELOC_MIPS_SHIFT6: howto manager. (line 435)
--* BFD_RELOC_MIPS_SUB: howto manager. (line 426)
--* BFD_RELOC_MIPS_TLS_DTPMOD32: howto manager. (line 449)
--* BFD_RELOC_MIPS_TLS_DTPMOD64: howto manager. (line 451)
--* BFD_RELOC_MIPS_TLS_DTPREL32: howto manager. (line 450)
--* BFD_RELOC_MIPS_TLS_DTPREL64: howto manager. (line 452)
--* BFD_RELOC_MIPS_TLS_DTPREL_HI16: howto manager. (line 457)
--* BFD_RELOC_MIPS_TLS_DTPREL_LO16: howto manager. (line 459)
--* BFD_RELOC_MIPS_TLS_GD: howto manager. (line 453)
--* BFD_RELOC_MIPS_TLS_GOTTPREL: howto manager. (line 461)
--* BFD_RELOC_MIPS_TLS_LDM: howto manager. (line 455)
--* BFD_RELOC_MIPS_TLS_TPREL32: howto manager. (line 463)
--* BFD_RELOC_MIPS_TLS_TPREL64: howto manager. (line 464)
--* BFD_RELOC_MIPS_TLS_TPREL_HI16: howto manager. (line 465)
--* BFD_RELOC_MIPS_TLS_TPREL_LO16: howto manager. (line 467)
--* BFD_RELOC_MMIX_ADDR19: howto manager. (line 1616)
--* BFD_RELOC_MMIX_ADDR27: howto manager. (line 1620)
--* BFD_RELOC_MMIX_BASE_PLUS_OFFSET: howto manager. (line 1632)
--* BFD_RELOC_MMIX_CBRANCH: howto manager. (line 1596)
--* BFD_RELOC_MMIX_CBRANCH_1: howto manager. (line 1598)
--* BFD_RELOC_MMIX_CBRANCH_2: howto manager. (line 1599)
--* BFD_RELOC_MMIX_CBRANCH_3: howto manager. (line 1600)
--* BFD_RELOC_MMIX_CBRANCH_J: howto manager. (line 1597)
--* BFD_RELOC_MMIX_GETA: howto manager. (line 1590)
--* BFD_RELOC_MMIX_GETA_1: howto manager. (line 1591)
--* BFD_RELOC_MMIX_GETA_2: howto manager. (line 1592)
--* BFD_RELOC_MMIX_GETA_3: howto manager. (line 1593)
--* BFD_RELOC_MMIX_JMP: howto manager. (line 1610)
--* BFD_RELOC_MMIX_JMP_1: howto manager. (line 1611)
--* BFD_RELOC_MMIX_JMP_2: howto manager. (line 1612)
--* BFD_RELOC_MMIX_JMP_3: howto manager. (line 1613)
--* BFD_RELOC_MMIX_LOCAL: howto manager. (line 1636)
--* BFD_RELOC_MMIX_PUSHJ: howto manager. (line 1603)
--* BFD_RELOC_MMIX_PUSHJ_1: howto manager. (line 1604)
--* BFD_RELOC_MMIX_PUSHJ_2: howto manager. (line 1605)
--* BFD_RELOC_MMIX_PUSHJ_3: howto manager. (line 1606)
--* BFD_RELOC_MMIX_PUSHJ_STUBBABLE: howto manager. (line 1607)
--* BFD_RELOC_MMIX_REG: howto manager. (line 1628)
--* BFD_RELOC_MMIX_REG_OR_BYTE: howto manager. (line 1624)
--* BFD_RELOC_MN10300_16_PCREL: howto manager. (line 571)
--* BFD_RELOC_MN10300_32_PCREL: howto manager. (line 567)
--* BFD_RELOC_MN10300_ALIGN: howto manager. (line 552)
--* BFD_RELOC_MN10300_COPY: howto manager. (line 535)
--* BFD_RELOC_MN10300_GLOB_DAT: howto manager. (line 538)
--* BFD_RELOC_MN10300_GOT16: howto manager. (line 531)
--* BFD_RELOC_MN10300_GOT24: howto manager. (line 527)
--* BFD_RELOC_MN10300_GOT32: howto manager. (line 523)
--* BFD_RELOC_MN10300_GOTOFF24: howto manager. (line 520)
--* BFD_RELOC_MN10300_JMP_SLOT: howto manager. (line 541)
--* BFD_RELOC_MN10300_RELATIVE: howto manager. (line 544)
--* BFD_RELOC_MN10300_SYM_DIFF: howto manager. (line 547)
--* BFD_RELOC_MN10300_TLS_DTPMOD: howto manager. (line 562)
--* BFD_RELOC_MN10300_TLS_DTPOFF: howto manager. (line 563)
--* BFD_RELOC_MN10300_TLS_GD: howto manager. (line 556)
--* BFD_RELOC_MN10300_TLS_GOTIE: howto manager. (line 559)
--* BFD_RELOC_MN10300_TLS_IE: howto manager. (line 560)
--* BFD_RELOC_MN10300_TLS_LD: howto manager. (line 557)
--* BFD_RELOC_MN10300_TLS_LDO: howto manager. (line 558)
--* BFD_RELOC_MN10300_TLS_LE: howto manager. (line 561)
--* BFD_RELOC_MN10300_TLS_TPOFF: howto manager. (line 564)
--* BFD_RELOC_MOXIE_10_PCREL: howto manager. (line 476)
--* BFD_RELOC_MSP430_10_PCREL: howto manager. (line 2448)
--* BFD_RELOC_MSP430_16: howto manager. (line 2450)
--* BFD_RELOC_MSP430_16_BYTE: howto manager. (line 2452)
--* BFD_RELOC_MSP430_16_PCREL: howto manager. (line 2449)
--* BFD_RELOC_MSP430_16_PCREL_BYTE: howto manager. (line 2451)
--* BFD_RELOC_MSP430_2X_PCREL: howto manager. (line 2453)
--* BFD_RELOC_MSP430_ABS8: howto manager. (line 2455)
--* BFD_RELOC_MSP430_ABS_HI16: howto manager. (line 2467)
--* BFD_RELOC_MSP430_PREL31: howto manager. (line 2468)
--* BFD_RELOC_MSP430_RL_PCREL: howto manager. (line 2454)
--* BFD_RELOC_MSP430_SYM_DIFF: howto manager. (line 2469)
--* BFD_RELOC_MSP430X_ABS16: howto manager. (line 2466)
--* BFD_RELOC_MSP430X_ABS20_ADR_DST: howto manager. (line 2463)
--* BFD_RELOC_MSP430X_ABS20_ADR_SRC: howto manager. (line 2462)
--* BFD_RELOC_MSP430X_ABS20_EXT_DST: howto manager. (line 2460)
--* BFD_RELOC_MSP430X_ABS20_EXT_ODST: howto manager. (line 2461)
--* BFD_RELOC_MSP430X_ABS20_EXT_SRC: howto manager. (line 2459)
--* BFD_RELOC_MSP430X_PCR16: howto manager. (line 2464)
--* BFD_RELOC_MSP430X_PCR20_CALL: howto manager. (line 2465)
--* BFD_RELOC_MSP430X_PCR20_EXT_DST: howto manager. (line 2457)
--* BFD_RELOC_MSP430X_PCR20_EXT_ODST: howto manager. (line 2458)
--* BFD_RELOC_MSP430X_PCR20_EXT_SRC: howto manager. (line 2456)
--* BFD_RELOC_MT_GNU_VTENTRY: howto manager. (line 2442)
--* BFD_RELOC_MT_GNU_VTINHERIT: howto manager. (line 2439)
--* BFD_RELOC_MT_HI16: howto manager. (line 2433)
--* BFD_RELOC_MT_LO16: howto manager. (line 2436)
--* BFD_RELOC_MT_PC16: howto manager. (line 2430)
--* BFD_RELOC_MT_PCINSN8: howto manager. (line 2445)
--* BFD_RELOC_NIOS2_ALIGN: howto manager. (line 2486)
--* BFD_RELOC_NIOS2_CACHE_OPX: howto manager. (line 2476)
--* BFD_RELOC_NIOS2_CALL16: howto manager. (line 2488)
--* BFD_RELOC_NIOS2_CALL26: howto manager. (line 2474)
--* BFD_RELOC_NIOS2_CALLR: howto manager. (line 2485)
--* BFD_RELOC_NIOS2_CJMP: howto manager. (line 2484)
--* BFD_RELOC_NIOS2_COPY: howto manager. (line 2501)
--* BFD_RELOC_NIOS2_GLOB_DAT: howto manager. (line 2502)
--* BFD_RELOC_NIOS2_GOT16: howto manager. (line 2487)
--* BFD_RELOC_NIOS2_GOTOFF: howto manager. (line 2505)
--* BFD_RELOC_NIOS2_GOTOFF_HA: howto manager. (line 2490)
--* BFD_RELOC_NIOS2_GOTOFF_LO: howto manager. (line 2489)
--* BFD_RELOC_NIOS2_GPREL: howto manager. (line 2482)
--* BFD_RELOC_NIOS2_HI16: howto manager. (line 2479)
--* BFD_RELOC_NIOS2_HIADJ16: howto manager. (line 2481)
--* BFD_RELOC_NIOS2_IMM5: howto manager. (line 2475)
--* BFD_RELOC_NIOS2_IMM6: howto manager. (line 2477)
--* BFD_RELOC_NIOS2_IMM8: howto manager. (line 2478)
--* BFD_RELOC_NIOS2_JUMP_SLOT: howto manager. (line 2503)
--* BFD_RELOC_NIOS2_LO16: howto manager. (line 2480)
--* BFD_RELOC_NIOS2_PCREL_HA: howto manager. (line 2492)
--* BFD_RELOC_NIOS2_PCREL_LO: howto manager. (line 2491)
--* BFD_RELOC_NIOS2_RELATIVE: howto manager. (line 2504)
--* BFD_RELOC_NIOS2_S16: howto manager. (line 2472)
--* BFD_RELOC_NIOS2_TLS_DTPMOD: howto manager. (line 2498)
--* BFD_RELOC_NIOS2_TLS_DTPREL: howto manager. (line 2499)
--* BFD_RELOC_NIOS2_TLS_GD16: howto manager. (line 2493)
--* BFD_RELOC_NIOS2_TLS_IE16: howto manager. (line 2496)
--* BFD_RELOC_NIOS2_TLS_LDM16: howto manager. (line 2494)
--* BFD_RELOC_NIOS2_TLS_LDO16: howto manager. (line 2495)
--* BFD_RELOC_NIOS2_TLS_LE16: howto manager. (line 2497)
--* BFD_RELOC_NIOS2_TLS_TPREL: howto manager. (line 2500)
--* BFD_RELOC_NIOS2_U16: howto manager. (line 2473)
--* BFD_RELOC_NIOS2_UJMP: howto manager. (line 2483)
--* BFD_RELOC_NONE: howto manager. (line 135)
--* BFD_RELOC_NS32K_DISP_16: howto manager. (line 639)
--* BFD_RELOC_NS32K_DISP_16_PCREL: howto manager. (line 642)
--* BFD_RELOC_NS32K_DISP_32: howto manager. (line 640)
--* BFD_RELOC_NS32K_DISP_32_PCREL: howto manager. (line 643)
--* BFD_RELOC_NS32K_DISP_8: howto manager. (line 638)
--* BFD_RELOC_NS32K_DISP_8_PCREL: howto manager. (line 641)
--* BFD_RELOC_NS32K_IMM_16: howto manager. (line 633)
--* BFD_RELOC_NS32K_IMM_16_PCREL: howto manager. (line 636)
--* BFD_RELOC_NS32K_IMM_32: howto manager. (line 634)
--* BFD_RELOC_NS32K_IMM_32_PCREL: howto manager. (line 637)
--* BFD_RELOC_NS32K_IMM_8: howto manager. (line 632)
--* BFD_RELOC_NS32K_IMM_8_PCREL: howto manager. (line 635)
--* BFD_RELOC_OPENRISC_ABS_26: howto manager. (line 2398)
--* BFD_RELOC_OPENRISC_REL_26: howto manager. (line 2399)
--* BFD_RELOC_PDP11_DISP_6_PCREL: howto manager. (line 647)
--* BFD_RELOC_PDP11_DISP_8_PCREL: howto manager. (line 646)
--* BFD_RELOC_PJ_CODE_DIR16: howto manager. (line 652)
--* BFD_RELOC_PJ_CODE_DIR32: howto manager. (line 653)
--* BFD_RELOC_PJ_CODE_HI16: howto manager. (line 650)
--* BFD_RELOC_PJ_CODE_LO16: howto manager. (line 651)
--* BFD_RELOC_PJ_CODE_REL16: howto manager. (line 654)
--* BFD_RELOC_PJ_CODE_REL32: howto manager. (line 655)
--* BFD_RELOC_PPC64_ADDR16_DS: howto manager. (line 717)
--* BFD_RELOC_PPC64_ADDR16_HIGH: howto manager. (line 728)
--* BFD_RELOC_PPC64_ADDR16_HIGHA: howto manager. (line 729)
--* BFD_RELOC_PPC64_ADDR16_LO_DS: howto manager. (line 718)
--* BFD_RELOC_PPC64_DTPREL16_DS: howto manager. (line 768)
--* BFD_RELOC_PPC64_DTPREL16_HIGH: howto manager. (line 776)
--* BFD_RELOC_PPC64_DTPREL16_HIGHA: howto manager. (line 777)
--* BFD_RELOC_PPC64_DTPREL16_HIGHER: howto manager. (line 770)
--* BFD_RELOC_PPC64_DTPREL16_HIGHERA: howto manager. (line 771)
--* BFD_RELOC_PPC64_DTPREL16_HIGHEST: howto manager. (line 772)
--* BFD_RELOC_PPC64_DTPREL16_HIGHESTA: howto manager. (line 773)
--* BFD_RELOC_PPC64_DTPREL16_LO_DS: howto manager. (line 769)
--* BFD_RELOC_PPC64_GOT16_DS: howto manager. (line 719)
--* BFD_RELOC_PPC64_GOT16_LO_DS: howto manager. (line 720)
--* BFD_RELOC_PPC64_HIGHER: howto manager. (line 705)
--* BFD_RELOC_PPC64_HIGHER_S: howto manager. (line 706)
--* BFD_RELOC_PPC64_HIGHEST: howto manager. (line 707)
--* BFD_RELOC_PPC64_HIGHEST_S: howto manager. (line 708)
--* BFD_RELOC_PPC64_PLT16_LO_DS: howto manager. (line 721)
--* BFD_RELOC_PPC64_PLTGOT16: howto manager. (line 713)
--* BFD_RELOC_PPC64_PLTGOT16_DS: howto manager. (line 726)
--* BFD_RELOC_PPC64_PLTGOT16_HA: howto manager. (line 716)
--* BFD_RELOC_PPC64_PLTGOT16_HI: howto manager. (line 715)
--* BFD_RELOC_PPC64_PLTGOT16_LO: howto manager. (line 714)
--* BFD_RELOC_PPC64_PLTGOT16_LO_DS: howto manager. (line 727)
--* BFD_RELOC_PPC64_SECTOFF_DS: howto manager. (line 722)
--* BFD_RELOC_PPC64_SECTOFF_LO_DS: howto manager. (line 723)
--* BFD_RELOC_PPC64_TOC: howto manager. (line 712)
--* BFD_RELOC_PPC64_TOC16_DS: howto manager. (line 724)
--* BFD_RELOC_PPC64_TOC16_HA: howto manager. (line 711)
--* BFD_RELOC_PPC64_TOC16_HI: howto manager. (line 710)
--* BFD_RELOC_PPC64_TOC16_LO: howto manager. (line 709)
--* BFD_RELOC_PPC64_TOC16_LO_DS: howto manager. (line 725)
--* BFD_RELOC_PPC64_TPREL16_DS: howto manager. (line 762)
--* BFD_RELOC_PPC64_TPREL16_HIGH: howto manager. (line 774)
--* BFD_RELOC_PPC64_TPREL16_HIGHA: howto manager. (line 775)
--* BFD_RELOC_PPC64_TPREL16_HIGHER: howto manager. (line 764)
--* BFD_RELOC_PPC64_TPREL16_HIGHERA: howto manager. (line 765)
--* BFD_RELOC_PPC64_TPREL16_HIGHEST: howto manager. (line 766)
--* BFD_RELOC_PPC64_TPREL16_HIGHESTA: howto manager. (line 767)
--* BFD_RELOC_PPC64_TPREL16_LO_DS: howto manager. (line 763)
--* BFD_RELOC_PPC_B16: howto manager. (line 661)
--* BFD_RELOC_PPC_B16_BRNTAKEN: howto manager. (line 663)
--* BFD_RELOC_PPC_B16_BRTAKEN: howto manager. (line 662)
--* BFD_RELOC_PPC_B26: howto manager. (line 658)
--* BFD_RELOC_PPC_BA16: howto manager. (line 664)
--* BFD_RELOC_PPC_BA16_BRNTAKEN: howto manager. (line 666)
--* BFD_RELOC_PPC_BA16_BRTAKEN: howto manager. (line 665)
--* BFD_RELOC_PPC_BA26: howto manager. (line 659)
--* BFD_RELOC_PPC_COPY: howto manager. (line 667)
--* BFD_RELOC_PPC_DTPMOD: howto manager. (line 735)
--* BFD_RELOC_PPC_DTPREL: howto manager. (line 745)
--* BFD_RELOC_PPC_DTPREL16: howto manager. (line 741)
--* BFD_RELOC_PPC_DTPREL16_HA: howto manager. (line 744)
--* BFD_RELOC_PPC_DTPREL16_HI: howto manager. (line 743)
--* BFD_RELOC_PPC_DTPREL16_LO: howto manager. (line 742)
--* BFD_RELOC_PPC_EMB_BIT_FLD: howto manager. (line 686)
--* BFD_RELOC_PPC_EMB_MRKREF: howto manager. (line 681)
--* BFD_RELOC_PPC_EMB_NADDR16: howto manager. (line 673)
--* BFD_RELOC_PPC_EMB_NADDR16_HA: howto manager. (line 676)
--* BFD_RELOC_PPC_EMB_NADDR16_HI: howto manager. (line 675)
--* BFD_RELOC_PPC_EMB_NADDR16_LO: howto manager. (line 674)
--* BFD_RELOC_PPC_EMB_NADDR32: howto manager. (line 672)
--* BFD_RELOC_PPC_EMB_RELSDA: howto manager. (line 687)
--* BFD_RELOC_PPC_EMB_RELSEC16: howto manager. (line 682)
--* BFD_RELOC_PPC_EMB_RELST_HA: howto manager. (line 685)
--* BFD_RELOC_PPC_EMB_RELST_HI: howto manager. (line 684)
--* BFD_RELOC_PPC_EMB_RELST_LO: howto manager. (line 683)
--* BFD_RELOC_PPC_EMB_SDA21: howto manager. (line 680)
--* BFD_RELOC_PPC_EMB_SDA2I16: howto manager. (line 678)
--* BFD_RELOC_PPC_EMB_SDA2REL: howto manager. (line 679)
--* BFD_RELOC_PPC_EMB_SDAI16: howto manager. (line 677)
--* BFD_RELOC_PPC_GLOB_DAT: howto manager. (line 668)
--* BFD_RELOC_PPC_GOT_DTPREL16: howto manager. (line 758)
--* BFD_RELOC_PPC_GOT_DTPREL16_HA: howto manager. (line 761)
--* BFD_RELOC_PPC_GOT_DTPREL16_HI: howto manager. (line 760)
--* BFD_RELOC_PPC_GOT_DTPREL16_LO: howto manager. (line 759)
--* BFD_RELOC_PPC_GOT_TLSGD16: howto manager. (line 746)
--* BFD_RELOC_PPC_GOT_TLSGD16_HA: howto manager. (line 749)
--* BFD_RELOC_PPC_GOT_TLSGD16_HI: howto manager. (line 748)
--* BFD_RELOC_PPC_GOT_TLSGD16_LO: howto manager. (line 747)
--* BFD_RELOC_PPC_GOT_TLSLD16: howto manager. (line 750)
--* BFD_RELOC_PPC_GOT_TLSLD16_HA: howto manager. (line 753)
--* BFD_RELOC_PPC_GOT_TLSLD16_HI: howto manager. (line 752)
--* BFD_RELOC_PPC_GOT_TLSLD16_LO: howto manager. (line 751)
--* BFD_RELOC_PPC_GOT_TPREL16: howto manager. (line 754)
--* BFD_RELOC_PPC_GOT_TPREL16_HA: howto manager. (line 757)
--* BFD_RELOC_PPC_GOT_TPREL16_HI: howto manager. (line 756)
--* BFD_RELOC_PPC_GOT_TPREL16_LO: howto manager. (line 755)
--* BFD_RELOC_PPC_JMP_SLOT: howto manager. (line 669)
--* BFD_RELOC_PPC_LOCAL24PC: howto manager. (line 671)
--* BFD_RELOC_PPC_RELATIVE: howto manager. (line 670)
--* BFD_RELOC_PPC_TLS: howto manager. (line 732)
--* BFD_RELOC_PPC_TLSGD: howto manager. (line 733)
--* BFD_RELOC_PPC_TLSLD: howto manager. (line 734)
--* BFD_RELOC_PPC_TOC16: howto manager. (line 660)
--* BFD_RELOC_PPC_TPREL: howto manager. (line 740)
--* BFD_RELOC_PPC_TPREL16: howto manager. (line 736)
--* BFD_RELOC_PPC_TPREL16_HA: howto manager. (line 739)
--* BFD_RELOC_PPC_TPREL16_HI: howto manager. (line 738)
--* BFD_RELOC_PPC_TPREL16_LO: howto manager. (line 737)
--* BFD_RELOC_PPC_VLE_HA16A: howto manager. (line 695)
--* BFD_RELOC_PPC_VLE_HA16D: howto manager. (line 696)
--* BFD_RELOC_PPC_VLE_HI16A: howto manager. (line 693)
--* BFD_RELOC_PPC_VLE_HI16D: howto manager. (line 694)
--* BFD_RELOC_PPC_VLE_LO16A: howto manager. (line 691)
--* BFD_RELOC_PPC_VLE_LO16D: howto manager. (line 692)
--* BFD_RELOC_PPC_VLE_REL15: howto manager. (line 689)
--* BFD_RELOC_PPC_VLE_REL24: howto manager. (line 690)
--* BFD_RELOC_PPC_VLE_REL8: howto manager. (line 688)
--* BFD_RELOC_PPC_VLE_SDA21: howto manager. (line 697)
--* BFD_RELOC_PPC_VLE_SDA21_LO: howto manager. (line 698)
--* BFD_RELOC_PPC_VLE_SDAREL_HA16A: howto manager. (line 703)
--* BFD_RELOC_PPC_VLE_SDAREL_HA16D: howto manager. (line 704)
--* BFD_RELOC_PPC_VLE_SDAREL_HI16A: howto manager. (line 701)
--* BFD_RELOC_PPC_VLE_SDAREL_HI16D: howto manager. (line 702)
--* BFD_RELOC_PPC_VLE_SDAREL_LO16A: howto manager. (line 699)
--* BFD_RELOC_PPC_VLE_SDAREL_LO16D: howto manager. (line 700)
--* BFD_RELOC_RELC: howto manager. (line 2416)
--* BFD_RELOC_RL78_16_OP: howto manager. (line 1759)
--* BFD_RELOC_RL78_16U: howto manager. (line 1763)
--* BFD_RELOC_RL78_24_OP: howto manager. (line 1760)
--* BFD_RELOC_RL78_24U: howto manager. (line 1764)
--* BFD_RELOC_RL78_32_OP: howto manager. (line 1761)
--* BFD_RELOC_RL78_8U: howto manager. (line 1762)
--* BFD_RELOC_RL78_ABS16: howto manager. (line 1776)
--* BFD_RELOC_RL78_ABS16_REV: howto manager. (line 1777)
--* BFD_RELOC_RL78_ABS16U: howto manager. (line 1780)
--* BFD_RELOC_RL78_ABS16UL: howto manager. (line 1782)
--* BFD_RELOC_RL78_ABS16UW: howto manager. (line 1781)
--* BFD_RELOC_RL78_ABS32: howto manager. (line 1778)
--* BFD_RELOC_RL78_ABS32_REV: howto manager. (line 1779)
--* BFD_RELOC_RL78_ABS8: howto manager. (line 1775)
--* BFD_RELOC_RL78_CODE: howto manager. (line 1787)
--* BFD_RELOC_RL78_DIFF: howto manager. (line 1766)
--* BFD_RELOC_RL78_DIR3U_PCREL: howto manager. (line 1765)
--* BFD_RELOC_RL78_GPRELB: howto manager. (line 1767)
--* BFD_RELOC_RL78_GPRELL: howto manager. (line 1769)
--* BFD_RELOC_RL78_GPRELW: howto manager. (line 1768)
--* BFD_RELOC_RL78_HI16: howto manager. (line 1784)
--* BFD_RELOC_RL78_HI8: howto manager. (line 1785)
--* BFD_RELOC_RL78_LO16: howto manager. (line 1786)
--* BFD_RELOC_RL78_NEG16: howto manager. (line 1756)
--* BFD_RELOC_RL78_NEG24: howto manager. (line 1757)
--* BFD_RELOC_RL78_NEG32: howto manager. (line 1758)
--* BFD_RELOC_RL78_NEG8: howto manager. (line 1755)
--* BFD_RELOC_RL78_OP_AND: howto manager. (line 1773)
--* BFD_RELOC_RL78_OP_NEG: howto manager. (line 1772)
--* BFD_RELOC_RL78_OP_SHRA: howto manager. (line 1774)
--* BFD_RELOC_RL78_OP_SUBTRACT: howto manager. (line 1771)
--* BFD_RELOC_RL78_RELAX: howto manager. (line 1783)
--* BFD_RELOC_RL78_SYM: howto manager. (line 1770)
--* BFD_RELOC_RVA: howto manager. (line 104)
--* BFD_RELOC_RX_16_OP: howto manager. (line 1794)
--* BFD_RELOC_RX_16U: howto manager. (line 1798)
--* BFD_RELOC_RX_24_OP: howto manager. (line 1795)
--* BFD_RELOC_RX_24U: howto manager. (line 1799)
--* BFD_RELOC_RX_32_OP: howto manager. (line 1796)
--* BFD_RELOC_RX_8U: howto manager. (line 1797)
--* BFD_RELOC_RX_ABS16: howto manager. (line 1809)
--* BFD_RELOC_RX_ABS16_REV: howto manager. (line 1810)
--* BFD_RELOC_RX_ABS16U: howto manager. (line 1813)
--* BFD_RELOC_RX_ABS16UL: howto manager. (line 1815)
--* BFD_RELOC_RX_ABS16UW: howto manager. (line 1814)
--* BFD_RELOC_RX_ABS32: howto manager. (line 1811)
--* BFD_RELOC_RX_ABS32_REV: howto manager. (line 1812)
--* BFD_RELOC_RX_ABS8: howto manager. (line 1808)
--* BFD_RELOC_RX_DIFF: howto manager. (line 1801)
--* BFD_RELOC_RX_DIR3U_PCREL: howto manager. (line 1800)
--* BFD_RELOC_RX_GPRELB: howto manager. (line 1802)
--* BFD_RELOC_RX_GPRELL: howto manager. (line 1804)
--* BFD_RELOC_RX_GPRELW: howto manager. (line 1803)
--* BFD_RELOC_RX_NEG16: howto manager. (line 1791)
--* BFD_RELOC_RX_NEG24: howto manager. (line 1792)
--* BFD_RELOC_RX_NEG32: howto manager. (line 1793)
--* BFD_RELOC_RX_NEG8: howto manager. (line 1790)
--* BFD_RELOC_RX_OP_NEG: howto manager. (line 1807)
--* BFD_RELOC_RX_OP_SUBTRACT: howto manager. (line 1806)
--* BFD_RELOC_RX_RELAX: howto manager. (line 1816)
--* BFD_RELOC_RX_SYM: howto manager. (line 1805)
--* BFD_RELOC_SCORE16_BRANCH: howto manager. (line 1959)
--* BFD_RELOC_SCORE16_JMP: howto manager. (line 1956)
--* BFD_RELOC_SCORE_BCMP: howto manager. (line 1962)
--* BFD_RELOC_SCORE_BRANCH: howto manager. (line 1947)
--* BFD_RELOC_SCORE_CALL15: howto manager. (line 1967)
--* BFD_RELOC_SCORE_DUMMY2: howto manager. (line 1943)
--* BFD_RELOC_SCORE_DUMMY_HI16: howto manager. (line 1968)
--* BFD_RELOC_SCORE_GOT15: howto manager. (line 1965)
--* BFD_RELOC_SCORE_GOT_LO16: howto manager. (line 1966)
--* BFD_RELOC_SCORE_GPREL15: howto manager. (line 1940)
--* BFD_RELOC_SCORE_IMM30: howto manager. (line 1950)
--* BFD_RELOC_SCORE_IMM32: howto manager. (line 1953)
--* BFD_RELOC_SCORE_JMP: howto manager. (line 1944)
--* BFD_RELOC_SH_ALIGN: howto manager. (line 971)
--* BFD_RELOC_SH_CODE: howto manager. (line 972)
--* BFD_RELOC_SH_COPY: howto manager. (line 977)
--* BFD_RELOC_SH_COPY64: howto manager. (line 1002)
--* BFD_RELOC_SH_COUNT: howto manager. (line 970)
--* BFD_RELOC_SH_DATA: howto manager. (line 973)
--* BFD_RELOC_SH_DISP12: howto manager. (line 953)
--* BFD_RELOC_SH_DISP12BY2: howto manager. (line 954)
--* BFD_RELOC_SH_DISP12BY4: howto manager. (line 955)
--* BFD_RELOC_SH_DISP12BY8: howto manager. (line 956)
--* BFD_RELOC_SH_DISP20: howto manager. (line 957)
--* BFD_RELOC_SH_DISP20BY8: howto manager. (line 958)
--* BFD_RELOC_SH_FUNCDESC: howto manager. (line 1045)
--* BFD_RELOC_SH_GLOB_DAT: howto manager. (line 978)
--* BFD_RELOC_SH_GLOB_DAT64: howto manager. (line 1003)
--* BFD_RELOC_SH_GOT10BY4: howto manager. (line 1006)
--* BFD_RELOC_SH_GOT10BY8: howto manager. (line 1007)
--* BFD_RELOC_SH_GOT20: howto manager. (line 1039)
--* BFD_RELOC_SH_GOT_HI16: howto manager. (line 985)
--* BFD_RELOC_SH_GOT_LOW16: howto manager. (line 982)
--* BFD_RELOC_SH_GOT_MEDHI16: howto manager. (line 984)
--* BFD_RELOC_SH_GOT_MEDLOW16: howto manager. (line 983)
--* BFD_RELOC_SH_GOTFUNCDESC: howto manager. (line 1041)
--* BFD_RELOC_SH_GOTFUNCDESC20: howto manager. (line 1042)
--* BFD_RELOC_SH_GOTOFF20: howto manager. (line 1040)
--* BFD_RELOC_SH_GOTOFF_HI16: howto manager. (line 997)
--* BFD_RELOC_SH_GOTOFF_LOW16: howto manager. (line 994)
--* BFD_RELOC_SH_GOTOFF_MEDHI16: howto manager. (line 996)
--* BFD_RELOC_SH_GOTOFF_MEDLOW16: howto manager. (line 995)
--* BFD_RELOC_SH_GOTOFFFUNCDESC: howto manager. (line 1043)
--* BFD_RELOC_SH_GOTOFFFUNCDESC20: howto manager. (line 1044)
--* BFD_RELOC_SH_GOTPC: howto manager. (line 981)
--* BFD_RELOC_SH_GOTPC_HI16: howto manager. (line 1001)
--* BFD_RELOC_SH_GOTPC_LOW16: howto manager. (line 998)
--* BFD_RELOC_SH_GOTPC_MEDHI16: howto manager. (line 1000)
--* BFD_RELOC_SH_GOTPC_MEDLOW16: howto manager. (line 999)
--* BFD_RELOC_SH_GOTPLT10BY4: howto manager. (line 1008)
--* BFD_RELOC_SH_GOTPLT10BY8: howto manager. (line 1009)
--* BFD_RELOC_SH_GOTPLT32: howto manager. (line 1010)
--* BFD_RELOC_SH_GOTPLT_HI16: howto manager. (line 989)
--* BFD_RELOC_SH_GOTPLT_LOW16: howto manager. (line 986)
--* BFD_RELOC_SH_GOTPLT_MEDHI16: howto manager. (line 988)
--* BFD_RELOC_SH_GOTPLT_MEDLOW16: howto manager. (line 987)
--* BFD_RELOC_SH_IMM3: howto manager. (line 951)
--* BFD_RELOC_SH_IMM3U: howto manager. (line 952)
--* BFD_RELOC_SH_IMM4: howto manager. (line 959)
--* BFD_RELOC_SH_IMM4BY2: howto manager. (line 960)
--* BFD_RELOC_SH_IMM4BY4: howto manager. (line 961)
--* BFD_RELOC_SH_IMM8: howto manager. (line 962)
--* BFD_RELOC_SH_IMM8BY2: howto manager. (line 963)
--* BFD_RELOC_SH_IMM8BY4: howto manager. (line 964)
--* BFD_RELOC_SH_IMM_HI16: howto manager. (line 1028)
--* BFD_RELOC_SH_IMM_HI16_PCREL: howto manager. (line 1029)
--* BFD_RELOC_SH_IMM_LOW16: howto manager. (line 1022)
--* BFD_RELOC_SH_IMM_LOW16_PCREL: howto manager. (line 1023)
--* BFD_RELOC_SH_IMM_MEDHI16: howto manager. (line 1026)
--* BFD_RELOC_SH_IMM_MEDHI16_PCREL: howto manager. (line 1027)
--* BFD_RELOC_SH_IMM_MEDLOW16: howto manager. (line 1024)
--* BFD_RELOC_SH_IMM_MEDLOW16_PCREL: howto manager. (line 1025)
--* BFD_RELOC_SH_IMMS10: howto manager. (line 1016)
--* BFD_RELOC_SH_IMMS10BY2: howto manager. (line 1017)
--* BFD_RELOC_SH_IMMS10BY4: howto manager. (line 1018)
--* BFD_RELOC_SH_IMMS10BY8: howto manager. (line 1019)
--* BFD_RELOC_SH_IMMS16: howto manager. (line 1020)
--* BFD_RELOC_SH_IMMS6: howto manager. (line 1013)
--* BFD_RELOC_SH_IMMS6BY32: howto manager. (line 1014)
--* BFD_RELOC_SH_IMMU16: howto manager. (line 1021)
--* BFD_RELOC_SH_IMMU5: howto manager. (line 1012)
--* BFD_RELOC_SH_IMMU6: howto manager. (line 1015)
--* BFD_RELOC_SH_JMP_SLOT: howto manager. (line 979)
--* BFD_RELOC_SH_JMP_SLOT64: howto manager. (line 1004)
--* BFD_RELOC_SH_LABEL: howto manager. (line 974)
--* BFD_RELOC_SH_LOOP_END: howto manager. (line 976)
--* BFD_RELOC_SH_LOOP_START: howto manager. (line 975)
--* BFD_RELOC_SH_PCDISP12BY2: howto manager. (line 950)
--* BFD_RELOC_SH_PCDISP8BY2: howto manager. (line 949)
--* BFD_RELOC_SH_PCRELIMM8BY2: howto manager. (line 965)
--* BFD_RELOC_SH_PCRELIMM8BY4: howto manager. (line 966)
--* BFD_RELOC_SH_PLT_HI16: howto manager. (line 993)
--* BFD_RELOC_SH_PLT_LOW16: howto manager. (line 990)
--* BFD_RELOC_SH_PLT_MEDHI16: howto manager. (line 992)
--* BFD_RELOC_SH_PLT_MEDLOW16: howto manager. (line 991)
--* BFD_RELOC_SH_PT_16: howto manager. (line 1030)
--* BFD_RELOC_SH_RELATIVE: howto manager. (line 980)
--* BFD_RELOC_SH_RELATIVE64: howto manager. (line 1005)
--* BFD_RELOC_SH_SHMEDIA_CODE: howto manager. (line 1011)
--* BFD_RELOC_SH_SWITCH16: howto manager. (line 967)
--* BFD_RELOC_SH_SWITCH32: howto manager. (line 968)
--* BFD_RELOC_SH_TLS_DTPMOD32: howto manager. (line 1036)
--* BFD_RELOC_SH_TLS_DTPOFF32: howto manager. (line 1037)
--* BFD_RELOC_SH_TLS_GD_32: howto manager. (line 1031)
--* BFD_RELOC_SH_TLS_IE_32: howto manager. (line 1034)
--* BFD_RELOC_SH_TLS_LD_32: howto manager. (line 1032)
--* BFD_RELOC_SH_TLS_LDO_32: howto manager. (line 1033)
--* BFD_RELOC_SH_TLS_LE_32: howto manager. (line 1035)
--* BFD_RELOC_SH_TLS_TPOFF32: howto manager. (line 1038)
--* BFD_RELOC_SH_USES: howto manager. (line 969)
--* BFD_RELOC_SIZE32: howto manager. (line 74)
--* BFD_RELOC_SIZE64: howto manager. (line 75)
--* BFD_RELOC_SPARC13: howto manager. (line 138)
--* BFD_RELOC_SPARC22: howto manager. (line 137)
--* BFD_RELOC_SPARC_10: howto manager. (line 167)
--* BFD_RELOC_SPARC_11: howto manager. (line 168)
--* BFD_RELOC_SPARC_5: howto manager. (line 180)
--* BFD_RELOC_SPARC_6: howto manager. (line 179)
--* BFD_RELOC_SPARC_64: howto manager. (line 166)
--* BFD_RELOC_SPARC_7: howto manager. (line 178)
--* BFD_RELOC_SPARC_BASE13: howto manager. (line 162)
--* BFD_RELOC_SPARC_BASE22: howto manager. (line 163)
--* BFD_RELOC_SPARC_COPY: howto manager. (line 145)
--* BFD_RELOC_SPARC_DISP64: howto manager. (line 181)
--* BFD_RELOC_SPARC_GLOB_DAT: howto manager. (line 146)
--* BFD_RELOC_SPARC_GOT10: howto manager. (line 139)
--* BFD_RELOC_SPARC_GOT13: howto manager. (line 140)
--* BFD_RELOC_SPARC_GOT22: howto manager. (line 141)
--* BFD_RELOC_SPARC_GOTDATA_HIX22: howto manager. (line 152)
--* BFD_RELOC_SPARC_GOTDATA_LOX10: howto manager. (line 153)
--* BFD_RELOC_SPARC_GOTDATA_OP: howto manager. (line 156)
--* BFD_RELOC_SPARC_GOTDATA_OP_HIX22: howto manager. (line 154)
--* BFD_RELOC_SPARC_GOTDATA_OP_LOX10: howto manager. (line 155)
--* BFD_RELOC_SPARC_H34: howto manager. (line 190)
--* BFD_RELOC_SPARC_H44: howto manager. (line 186)
--* BFD_RELOC_SPARC_HH22: howto manager. (line 170)
--* BFD_RELOC_SPARC_HIX22: howto manager. (line 184)
--* BFD_RELOC_SPARC_HM10: howto manager. (line 171)
--* BFD_RELOC_SPARC_IRELATIVE: howto manager. (line 158)
--* BFD_RELOC_SPARC_JMP_IREL: howto manager. (line 157)
--* BFD_RELOC_SPARC_JMP_SLOT: howto manager. (line 147)
--* BFD_RELOC_SPARC_L44: howto manager. (line 188)
--* BFD_RELOC_SPARC_LM22: howto manager. (line 172)
--* BFD_RELOC_SPARC_LOX10: howto manager. (line 185)
--* BFD_RELOC_SPARC_M44: howto manager. (line 187)
--* BFD_RELOC_SPARC_OLO10: howto manager. (line 169)
--* BFD_RELOC_SPARC_PC10: howto manager. (line 142)
--* BFD_RELOC_SPARC_PC22: howto manager. (line 143)
--* BFD_RELOC_SPARC_PC_HH22: howto manager. (line 173)
--* BFD_RELOC_SPARC_PC_HM10: howto manager. (line 174)
--* BFD_RELOC_SPARC_PC_LM22: howto manager. (line 175)
--* BFD_RELOC_SPARC_PLT32: howto manager. (line 182)
--* BFD_RELOC_SPARC_PLT64: howto manager. (line 183)
--* BFD_RELOC_SPARC_REGISTER: howto manager. (line 189)
--* BFD_RELOC_SPARC_RELATIVE: howto manager. (line 148)
--* BFD_RELOC_SPARC_REV32: howto manager. (line 196)
--* BFD_RELOC_SPARC_SIZE32: howto manager. (line 191)
--* BFD_RELOC_SPARC_SIZE64: howto manager. (line 192)
--* BFD_RELOC_SPARC_TLS_DTPMOD32: howto manager. (line 217)
--* BFD_RELOC_SPARC_TLS_DTPMOD64: howto manager. (line 218)
--* BFD_RELOC_SPARC_TLS_DTPOFF32: howto manager. (line 219)
--* BFD_RELOC_SPARC_TLS_DTPOFF64: howto manager. (line 220)
--* BFD_RELOC_SPARC_TLS_GD_ADD: howto manager. (line 201)
--* BFD_RELOC_SPARC_TLS_GD_CALL: howto manager. (line 202)
--* BFD_RELOC_SPARC_TLS_GD_HI22: howto manager. (line 199)
--* BFD_RELOC_SPARC_TLS_GD_LO10: howto manager. (line 200)
--* BFD_RELOC_SPARC_TLS_IE_ADD: howto manager. (line 214)
--* BFD_RELOC_SPARC_TLS_IE_HI22: howto manager. (line 210)
--* BFD_RELOC_SPARC_TLS_IE_LD: howto manager. (line 212)
--* BFD_RELOC_SPARC_TLS_IE_LDX: howto manager. (line 213)
--* BFD_RELOC_SPARC_TLS_IE_LO10: howto manager. (line 211)
--* BFD_RELOC_SPARC_TLS_LDM_ADD: howto manager. (line 205)
--* BFD_RELOC_SPARC_TLS_LDM_CALL: howto manager. (line 206)
--* BFD_RELOC_SPARC_TLS_LDM_HI22: howto manager. (line 203)
--* BFD_RELOC_SPARC_TLS_LDM_LO10: howto manager. (line 204)
--* BFD_RELOC_SPARC_TLS_LDO_ADD: howto manager. (line 209)
--* BFD_RELOC_SPARC_TLS_LDO_HIX22: howto manager. (line 207)
--* BFD_RELOC_SPARC_TLS_LDO_LOX10: howto manager. (line 208)
--* BFD_RELOC_SPARC_TLS_LE_HIX22: howto manager. (line 215)
--* BFD_RELOC_SPARC_TLS_LE_LOX10: howto manager. (line 216)
--* BFD_RELOC_SPARC_TLS_TPOFF32: howto manager. (line 221)
--* BFD_RELOC_SPARC_TLS_TPOFF64: howto manager. (line 222)
--* BFD_RELOC_SPARC_UA16: howto manager. (line 149)
--* BFD_RELOC_SPARC_UA32: howto manager. (line 150)
--* BFD_RELOC_SPARC_UA64: howto manager. (line 151)
--* BFD_RELOC_SPARC_WDISP10: howto manager. (line 193)
--* BFD_RELOC_SPARC_WDISP16: howto manager. (line 176)
--* BFD_RELOC_SPARC_WDISP19: howto manager. (line 177)
--* BFD_RELOC_SPARC_WDISP22: howto manager. (line 136)
--* BFD_RELOC_SPARC_WPLT30: howto manager. (line 144)
--* BFD_RELOC_SPU_ADD_PIC: howto manager. (line 239)
--* BFD_RELOC_SPU_HI16: howto manager. (line 236)
--* BFD_RELOC_SPU_IMM10: howto manager. (line 227)
--* BFD_RELOC_SPU_IMM10W: howto manager. (line 228)
--* BFD_RELOC_SPU_IMM16: howto manager. (line 229)
--* BFD_RELOC_SPU_IMM16W: howto manager. (line 230)
--* BFD_RELOC_SPU_IMM18: howto manager. (line 231)
--* BFD_RELOC_SPU_IMM7: howto manager. (line 225)
--* BFD_RELOC_SPU_IMM8: howto manager. (line 226)
--* BFD_RELOC_SPU_LO16: howto manager. (line 235)
--* BFD_RELOC_SPU_PCREL16: howto manager. (line 234)
--* BFD_RELOC_SPU_PCREL9a: howto manager. (line 232)
--* BFD_RELOC_SPU_PCREL9b: howto manager. (line 233)
--* BFD_RELOC_SPU_PPU32: howto manager. (line 237)
--* BFD_RELOC_SPU_PPU64: howto manager. (line 238)
--* BFD_RELOC_THUMB_PCREL_BLX: howto manager. (line 798)
--* BFD_RELOC_THUMB_PCREL_BRANCH12: howto manager. (line 812)
--* BFD_RELOC_THUMB_PCREL_BRANCH20: howto manager. (line 813)
--* BFD_RELOC_THUMB_PCREL_BRANCH23: howto manager. (line 814)
--* BFD_RELOC_THUMB_PCREL_BRANCH25: howto manager. (line 815)
--* BFD_RELOC_THUMB_PCREL_BRANCH7: howto manager. (line 810)
--* BFD_RELOC_THUMB_PCREL_BRANCH9: howto manager. (line 811)
--* BFD_RELOC_TIC30_LDP: howto manager. (line 1430)
--* BFD_RELOC_TIC54X_16_OF_23: howto manager. (line 1448)
--* BFD_RELOC_TIC54X_23: howto manager. (line 1445)
--* BFD_RELOC_TIC54X_MS7_OF_23: howto manager. (line 1453)
--* BFD_RELOC_TIC54X_PARTLS7: howto manager. (line 1435)
--* BFD_RELOC_TIC54X_PARTMS9: howto manager. (line 1440)
--* BFD_RELOC_TILEGX_BROFF_X1: howto manager. (line 3132)
--* BFD_RELOC_TILEGX_COPY: howto manager. (line 3128)
--* BFD_RELOC_TILEGX_DEST_IMM8_X1: howto manager. (line 3139)
--* BFD_RELOC_TILEGX_GLOB_DAT: howto manager. (line 3129)
--* BFD_RELOC_TILEGX_HW0: howto manager. (line 3121)
--* BFD_RELOC_TILEGX_HW0_LAST: howto manager. (line 3125)
--* BFD_RELOC_TILEGX_HW1: howto manager. (line 3122)
--* BFD_RELOC_TILEGX_HW1_LAST: howto manager. (line 3126)
--* BFD_RELOC_TILEGX_HW2: howto manager. (line 3123)
--* BFD_RELOC_TILEGX_HW2_LAST: howto manager. (line 3127)
--* BFD_RELOC_TILEGX_HW3: howto manager. (line 3124)
--* BFD_RELOC_TILEGX_IMM16_X0_HW0: howto manager. (line 3148)
--* BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT: howto manager. (line 3176)
--* BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST: howto manager. (line 3156)
--* BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT: howto manager. (line 3184)
--* BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL: howto manager. (line 3170)
--* BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL: howto manager.
-- (line 3204)
--* BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD: howto manager. (line 3198)
--* BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE: howto manager. (line 3210)
--* BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE: howto manager. (line 3194)
--* BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL: howto manager. (line 3162)
--* BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL: howto manager. (line 3178)
--* BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD: howto manager. (line 3190)
--* BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE: howto manager. (line 3202)
--* BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE: howto manager. (line 3192)
--* BFD_RELOC_TILEGX_IMM16_X0_HW1: howto manager. (line 3150)
--* BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST: howto manager. (line 3158)
--* BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT: howto manager. (line 3186)
--* BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL: howto manager. (line 3172)
--* BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL: howto manager.
-- (line 3206)
--* BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD: howto manager. (line 3200)
--* BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE: howto manager. (line 3212)
--* BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE: howto manager. (line 3196)
--* BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL: howto manager. (line 3164)
--* BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL: howto manager. (line 3180)
--* BFD_RELOC_TILEGX_IMM16_X0_HW2: howto manager. (line 3152)
--* BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST: howto manager. (line 3160)
--* BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL: howto manager. (line 3174)
--* BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL: howto manager.
-- (line 3208)
--* BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL: howto manager. (line 3166)
--* BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL: howto manager. (line 3182)
--* BFD_RELOC_TILEGX_IMM16_X0_HW3: howto manager. (line 3154)
--* BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL: howto manager. (line 3168)
--* BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL: howto manager. (line 3188)
--* BFD_RELOC_TILEGX_IMM16_X1_HW0: howto manager. (line 3149)
--* BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT: howto manager. (line 3177)
--* BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST: howto manager. (line 3157)
--* BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT: howto manager. (line 3185)
--* BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL: howto manager. (line 3171)
--* BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL: howto manager.
-- (line 3205)
--* BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD: howto manager. (line 3199)
--* BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE: howto manager. (line 3211)
--* BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE: howto manager. (line 3195)
--* BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL: howto manager. (line 3163)
--* BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL: howto manager. (line 3179)
--* BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD: howto manager. (line 3191)
--* BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE: howto manager. (line 3203)
--* BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE: howto manager. (line 3193)
--* BFD_RELOC_TILEGX_IMM16_X1_HW1: howto manager. (line 3151)
--* BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST: howto manager. (line 3159)
--* BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT: howto manager. (line 3187)
--* BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL: howto manager. (line 3173)
--* BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL: howto manager.
-- (line 3207)
--* BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD: howto manager. (line 3201)
--* BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE: howto manager. (line 3213)
--* BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE: howto manager. (line 3197)
--* BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL: howto manager. (line 3165)
--* BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL: howto manager. (line 3181)
--* BFD_RELOC_TILEGX_IMM16_X1_HW2: howto manager. (line 3153)
--* BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST: howto manager. (line 3161)
--* BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL: howto manager. (line 3175)
--* BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL: howto manager.
-- (line 3209)
--* BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL: howto manager. (line 3167)
--* BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL: howto manager. (line 3183)
--* BFD_RELOC_TILEGX_IMM16_X1_HW3: howto manager. (line 3155)
--* BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL: howto manager. (line 3169)
--* BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL: howto manager. (line 3189)
--* BFD_RELOC_TILEGX_IMM8_X0: howto manager. (line 3135)
--* BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD: howto manager. (line 3226)
--* BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD: howto manager. (line 3221)
--* BFD_RELOC_TILEGX_IMM8_X1: howto manager. (line 3137)
--* BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD: howto manager. (line 3227)
--* BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD: howto manager. (line 3222)
--* BFD_RELOC_TILEGX_IMM8_Y0: howto manager. (line 3136)
--* BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD: howto manager. (line 3228)
--* BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD: howto manager. (line 3223)
--* BFD_RELOC_TILEGX_IMM8_Y1: howto manager. (line 3138)
--* BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD: howto manager. (line 3229)
--* BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD: howto manager. (line 3224)
--* BFD_RELOC_TILEGX_JMP_SLOT: howto manager. (line 3130)
--* BFD_RELOC_TILEGX_JUMPOFF_X1: howto manager. (line 3133)
--* BFD_RELOC_TILEGX_JUMPOFF_X1_PLT: howto manager. (line 3134)
--* BFD_RELOC_TILEGX_MF_IMM14_X1: howto manager. (line 3141)
--* BFD_RELOC_TILEGX_MMEND_X0: howto manager. (line 3143)
--* BFD_RELOC_TILEGX_MMSTART_X0: howto manager. (line 3142)
--* BFD_RELOC_TILEGX_MT_IMM14_X1: howto manager. (line 3140)
--* BFD_RELOC_TILEGX_RELATIVE: howto manager. (line 3131)
--* BFD_RELOC_TILEGX_SHAMT_X0: howto manager. (line 3144)
--* BFD_RELOC_TILEGX_SHAMT_X1: howto manager. (line 3145)
--* BFD_RELOC_TILEGX_SHAMT_Y0: howto manager. (line 3146)
--* BFD_RELOC_TILEGX_SHAMT_Y1: howto manager. (line 3147)
--* BFD_RELOC_TILEGX_TLS_DTPMOD32: howto manager. (line 3217)
--* BFD_RELOC_TILEGX_TLS_DTPMOD64: howto manager. (line 3214)
--* BFD_RELOC_TILEGX_TLS_DTPOFF32: howto manager. (line 3218)
--* BFD_RELOC_TILEGX_TLS_DTPOFF64: howto manager. (line 3215)
--* BFD_RELOC_TILEGX_TLS_GD_CALL: howto manager. (line 3220)
--* BFD_RELOC_TILEGX_TLS_IE_LOAD: howto manager. (line 3225)
--* BFD_RELOC_TILEGX_TLS_TPOFF32: howto manager. (line 3219)
--* BFD_RELOC_TILEGX_TLS_TPOFF64: howto manager. (line 3216)
--* BFD_RELOC_TILEPRO_BROFF_X1: howto manager. (line 3044)
--* BFD_RELOC_TILEPRO_COPY: howto manager. (line 3040)
--* BFD_RELOC_TILEPRO_DEST_IMM8_X1: howto manager. (line 3051)
--* BFD_RELOC_TILEPRO_GLOB_DAT: howto manager. (line 3041)
--* BFD_RELOC_TILEPRO_IMM16_X0: howto manager. (line 3054)
--* BFD_RELOC_TILEPRO_IMM16_X0_GOT: howto manager. (line 3070)
--* BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA: howto manager. (line 3076)
--* BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI: howto manager. (line 3074)
--* BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO: howto manager. (line 3072)
--* BFD_RELOC_TILEPRO_IMM16_X0_HA: howto manager. (line 3060)
--* BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL: howto manager. (line 3068)
--* BFD_RELOC_TILEPRO_IMM16_X0_HI: howto manager. (line 3058)
--* BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL: howto manager. (line 3066)
--* BFD_RELOC_TILEPRO_IMM16_X0_LO: howto manager. (line 3056)
--* BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL: howto manager. (line 3064)
--* BFD_RELOC_TILEPRO_IMM16_X0_PCREL: howto manager. (line 3062)
--* BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD: howto manager. (line 3092)
--* BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA: howto manager. (line 3098)
--* BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI: howto manager. (line 3096)
--* BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO: howto manager. (line 3094)
--* BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE: howto manager. (line 3100)
--* BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA: howto manager. (line 3106)
--* BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI: howto manager. (line 3104)
--* BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO: howto manager. (line 3102)
--* BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE: howto manager. (line 3111)
--* BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA: howto manager. (line 3117)
--* BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI: howto manager. (line 3115)
--* BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO: howto manager. (line 3113)
--* BFD_RELOC_TILEPRO_IMM16_X1: howto manager. (line 3055)
--* BFD_RELOC_TILEPRO_IMM16_X1_GOT: howto manager. (line 3071)
--* BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA: howto manager. (line 3077)
--* BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI: howto manager. (line 3075)
--* BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO: howto manager. (line 3073)
--* BFD_RELOC_TILEPRO_IMM16_X1_HA: howto manager. (line 3061)
--* BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL: howto manager. (line 3069)
--* BFD_RELOC_TILEPRO_IMM16_X1_HI: howto manager. (line 3059)
--* BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL: howto manager. (line 3067)
--* BFD_RELOC_TILEPRO_IMM16_X1_LO: howto manager. (line 3057)
--* BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL: howto manager. (line 3065)
--* BFD_RELOC_TILEPRO_IMM16_X1_PCREL: howto manager. (line 3063)
--* BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD: howto manager. (line 3093)
--* BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA: howto manager. (line 3099)
--* BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI: howto manager. (line 3097)
--* BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO: howto manager. (line 3095)
--* BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE: howto manager. (line 3101)
--* BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA: howto manager. (line 3107)
--* BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI: howto manager. (line 3105)
--* BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO: howto manager. (line 3103)
--* BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE: howto manager. (line 3112)
--* BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA: howto manager. (line 3118)
--* BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI: howto manager. (line 3116)
--* BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO: howto manager. (line 3114)
--* BFD_RELOC_TILEPRO_IMM8_X0: howto manager. (line 3047)
--* BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD: howto manager. (line 3087)
--* BFD_RELOC_TILEPRO_IMM8_X1: howto manager. (line 3049)
--* BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD: howto manager. (line 3088)
--* BFD_RELOC_TILEPRO_IMM8_Y0: howto manager. (line 3048)
--* BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD: howto manager. (line 3089)
--* BFD_RELOC_TILEPRO_IMM8_Y1: howto manager. (line 3050)
--* BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD: howto manager. (line 3090)
--* BFD_RELOC_TILEPRO_JMP_SLOT: howto manager. (line 3042)
--* BFD_RELOC_TILEPRO_JOFFLONG_X1: howto manager. (line 3045)
--* BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT: howto manager. (line 3046)
--* BFD_RELOC_TILEPRO_MF_IMM15_X1: howto manager. (line 3053)
--* BFD_RELOC_TILEPRO_MMEND_X0: howto manager. (line 3079)
--* BFD_RELOC_TILEPRO_MMEND_X1: howto manager. (line 3081)
--* BFD_RELOC_TILEPRO_MMSTART_X0: howto manager. (line 3078)
--* BFD_RELOC_TILEPRO_MMSTART_X1: howto manager. (line 3080)
--* BFD_RELOC_TILEPRO_MT_IMM15_X1: howto manager. (line 3052)
--* BFD_RELOC_TILEPRO_RELATIVE: howto manager. (line 3043)
--* BFD_RELOC_TILEPRO_SHAMT_X0: howto manager. (line 3082)
--* BFD_RELOC_TILEPRO_SHAMT_X1: howto manager. (line 3083)
--* BFD_RELOC_TILEPRO_SHAMT_Y0: howto manager. (line 3084)
--* BFD_RELOC_TILEPRO_SHAMT_Y1: howto manager. (line 3085)
--* BFD_RELOC_TILEPRO_TLS_DTPMOD32: howto manager. (line 3108)
--* BFD_RELOC_TILEPRO_TLS_DTPOFF32: howto manager. (line 3109)
--* BFD_RELOC_TILEPRO_TLS_GD_CALL: howto manager. (line 3086)
--* BFD_RELOC_TILEPRO_TLS_IE_LOAD: howto manager. (line 3091)
--* BFD_RELOC_TILEPRO_TLS_TPOFF32: howto manager. (line 3110)
--* bfd_reloc_type_lookup: howto manager. (line 3255)
--* BFD_RELOC_V850_16_GOT: howto manager. (line 1394)
--* BFD_RELOC_V850_16_GOTOFF: howto manager. (line 1418)
--* BFD_RELOC_V850_16_PCREL: howto manager. (line 1364)
--* BFD_RELOC_V850_16_S1: howto manager. (line 1382)
--* BFD_RELOC_V850_16_SPLIT_OFFSET: howto manager. (line 1379)
--* BFD_RELOC_V850_17_PCREL: howto manager. (line 1367)
--* BFD_RELOC_V850_22_PCREL: howto manager. (line 1299)
--* BFD_RELOC_V850_22_PLT_PCREL: howto manager. (line 1400)
--* BFD_RELOC_V850_23: howto manager. (line 1370)
--* BFD_RELOC_V850_32_ABS: howto manager. (line 1376)
--* BFD_RELOC_V850_32_GOT: howto manager. (line 1397)
--* BFD_RELOC_V850_32_GOTOFF: howto manager. (line 1421)
--* BFD_RELOC_V850_32_GOTPCREL: howto manager. (line 1391)
--* BFD_RELOC_V850_32_PCREL: howto manager. (line 1373)
--* BFD_RELOC_V850_32_PLT_PCREL: howto manager. (line 1403)
--* BFD_RELOC_V850_9_PCREL: howto manager. (line 1296)
--* BFD_RELOC_V850_ALIGN: howto manager. (line 1357)
--* BFD_RELOC_V850_CALLT_15_16_OFFSET: howto manager. (line 1388)
--* BFD_RELOC_V850_CALLT_16_16_OFFSET: howto manager. (line 1348)
--* BFD_RELOC_V850_CALLT_6_7_OFFSET: howto manager. (line 1345)
--* BFD_RELOC_V850_CODE: howto manager. (line 1424)
--* BFD_RELOC_V850_COPY: howto manager. (line 1406)
--* BFD_RELOC_V850_DATA: howto manager. (line 1427)
--* BFD_RELOC_V850_GLOB_DAT: howto manager. (line 1409)
--* BFD_RELOC_V850_JMP_SLOT: howto manager. (line 1412)
--* BFD_RELOC_V850_LO16_S1: howto manager. (line 1385)
--* BFD_RELOC_V850_LO16_SPLIT_OFFSET: howto manager. (line 1360)
--* BFD_RELOC_V850_LONGCALL: howto manager. (line 1351)
--* BFD_RELOC_V850_LONGJUMP: howto manager. (line 1354)
--* BFD_RELOC_V850_RELATIVE: howto manager. (line 1415)
--* BFD_RELOC_V850_SDA_15_16_OFFSET: howto manager. (line 1305)
--* BFD_RELOC_V850_SDA_16_16_OFFSET: howto manager. (line 1302)
--* BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET: howto manager. (line 1337)
--* BFD_RELOC_V850_TDA_16_16_OFFSET: howto manager. (line 1327)
--* BFD_RELOC_V850_TDA_4_4_OFFSET: howto manager. (line 1334)
--* BFD_RELOC_V850_TDA_4_5_OFFSET: howto manager. (line 1330)
--* BFD_RELOC_V850_TDA_6_8_OFFSET: howto manager. (line 1316)
--* BFD_RELOC_V850_TDA_7_7_OFFSET: howto manager. (line 1324)
--* BFD_RELOC_V850_TDA_7_8_OFFSET: howto manager. (line 1320)
--* BFD_RELOC_V850_ZDA_15_16_OFFSET: howto manager. (line 1312)
--* BFD_RELOC_V850_ZDA_16_16_OFFSET: howto manager. (line 1309)
--* BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET: howto manager. (line 1341)
--* BFD_RELOC_VAX_GLOB_DAT: howto manager. (line 2425)
--* BFD_RELOC_VAX_JMP_SLOT: howto manager. (line 2426)
--* BFD_RELOC_VAX_RELATIVE: howto manager. (line 2427)
--* BFD_RELOC_VPE4KMATH_DATA: howto manager. (line 2001)
--* BFD_RELOC_VPE4KMATH_INSN: howto manager. (line 2002)
--* BFD_RELOC_VTABLE_ENTRY: howto manager. (line 2006)
--* BFD_RELOC_VTABLE_INHERIT: howto manager. (line 2005)
--* BFD_RELOC_X86_64_32S: howto manager. (line 608)
--* BFD_RELOC_X86_64_COPY: howto manager. (line 603)
--* BFD_RELOC_X86_64_DTPMOD64: howto manager. (line 609)
--* BFD_RELOC_X86_64_DTPOFF32: howto manager. (line 614)
--* BFD_RELOC_X86_64_DTPOFF64: howto manager. (line 610)
--* BFD_RELOC_X86_64_GLOB_DAT: howto manager. (line 604)
--* BFD_RELOC_X86_64_GOT32: howto manager. (line 601)
--* BFD_RELOC_X86_64_GOT64: howto manager. (line 619)
--* BFD_RELOC_X86_64_GOTOFF64: howto manager. (line 617)
--* BFD_RELOC_X86_64_GOTPC32: howto manager. (line 618)
--* BFD_RELOC_X86_64_GOTPC32_TLSDESC: howto manager. (line 624)
--* BFD_RELOC_X86_64_GOTPC64: howto manager. (line 621)
--* BFD_RELOC_X86_64_GOTPCREL: howto manager. (line 607)
--* BFD_RELOC_X86_64_GOTPCREL64: howto manager. (line 620)
--* BFD_RELOC_X86_64_GOTPLT64: howto manager. (line 622)
--* BFD_RELOC_X86_64_GOTTPOFF: howto manager. (line 615)
--* BFD_RELOC_X86_64_IRELATIVE: howto manager. (line 627)
--* BFD_RELOC_X86_64_JUMP_SLOT: howto manager. (line 605)
--* BFD_RELOC_X86_64_PC32_BND: howto manager. (line 628)
--* BFD_RELOC_X86_64_PLT32: howto manager. (line 602)
--* BFD_RELOC_X86_64_PLT32_BND: howto manager. (line 629)
--* BFD_RELOC_X86_64_PLTOFF64: howto manager. (line 623)
--* BFD_RELOC_X86_64_RELATIVE: howto manager. (line 606)
--* BFD_RELOC_X86_64_TLSDESC: howto manager. (line 626)
--* BFD_RELOC_X86_64_TLSDESC_CALL: howto manager. (line 625)
--* BFD_RELOC_X86_64_TLSGD: howto manager. (line 612)
--* BFD_RELOC_X86_64_TLSLD: howto manager. (line 613)
--* BFD_RELOC_X86_64_TPOFF32: howto manager. (line 616)
--* BFD_RELOC_X86_64_TPOFF64: howto manager. (line 611)
--* BFD_RELOC_XC16X_PAG: howto manager. (line 2419)
--* BFD_RELOC_XC16X_POF: howto manager. (line 2420)
--* BFD_RELOC_XC16X_SEG: howto manager. (line 2421)
--* BFD_RELOC_XC16X_SOF: howto manager. (line 2422)
--* BFD_RELOC_XGATE_24: howto manager. (line 2164)
--* BFD_RELOC_XGATE_GPAGE: howto manager. (line 2161)
--* BFD_RELOC_XGATE_IMM3: howto manager. (line 2181)
--* BFD_RELOC_XGATE_IMM4: howto manager. (line 2184)
--* BFD_RELOC_XGATE_IMM5: howto manager. (line 2187)
--* BFD_RELOC_XGATE_IMM8_HI: howto manager. (line 2177)
--* BFD_RELOC_XGATE_IMM8_LO: howto manager. (line 2173)
--* BFD_RELOC_XGATE_LO16: howto manager. (line 2157)
--* BFD_RELOC_XGATE_PCREL_10: howto manager. (line 2170)
--* BFD_RELOC_XGATE_PCREL_9: howto manager. (line 2167)
--* BFD_RELOC_XGATE_RL_GROUP: howto manager. (line 2152)
--* BFD_RELOC_XGATE_RL_JUMP: howto manager. (line 2148)
--* BFD_RELOC_XSTORMY16_12: howto manager. (line 2411)
--* BFD_RELOC_XSTORMY16_24: howto manager. (line 2412)
--* BFD_RELOC_XSTORMY16_FPTR16: howto manager. (line 2413)
--* BFD_RELOC_XSTORMY16_REL_12: howto manager. (line 2410)
--* BFD_RELOC_XTENSA_ASM_EXPAND: howto manager. (line 2582)
--* BFD_RELOC_XTENSA_ASM_SIMPLIFY: howto manager. (line 2587)
--* BFD_RELOC_XTENSA_DIFF16: howto manager. (line 2529)
--* BFD_RELOC_XTENSA_DIFF32: howto manager. (line 2530)
--* BFD_RELOC_XTENSA_DIFF8: howto manager. (line 2528)
--* BFD_RELOC_XTENSA_GLOB_DAT: howto manager. (line 2518)
--* BFD_RELOC_XTENSA_JMP_SLOT: howto manager. (line 2519)
--* BFD_RELOC_XTENSA_OP0: howto manager. (line 2576)
--* BFD_RELOC_XTENSA_OP1: howto manager. (line 2577)
--* BFD_RELOC_XTENSA_OP2: howto manager. (line 2578)
--* BFD_RELOC_XTENSA_PLT: howto manager. (line 2523)
--* BFD_RELOC_XTENSA_RELATIVE: howto manager. (line 2520)
--* BFD_RELOC_XTENSA_RTLD: howto manager. (line 2513)
--* BFD_RELOC_XTENSA_SLOT0_ALT: howto manager. (line 2558)
--* BFD_RELOC_XTENSA_SLOT0_OP: howto manager. (line 2538)
--* BFD_RELOC_XTENSA_SLOT10_ALT: howto manager. (line 2568)
--* BFD_RELOC_XTENSA_SLOT10_OP: howto manager. (line 2548)
--* BFD_RELOC_XTENSA_SLOT11_ALT: howto manager. (line 2569)
--* BFD_RELOC_XTENSA_SLOT11_OP: howto manager. (line 2549)
--* BFD_RELOC_XTENSA_SLOT12_ALT: howto manager. (line 2570)
--* BFD_RELOC_XTENSA_SLOT12_OP: howto manager. (line 2550)
--* BFD_RELOC_XTENSA_SLOT13_ALT: howto manager. (line 2571)
--* BFD_RELOC_XTENSA_SLOT13_OP: howto manager. (line 2551)
--* BFD_RELOC_XTENSA_SLOT14_ALT: howto manager. (line 2572)
--* BFD_RELOC_XTENSA_SLOT14_OP: howto manager. (line 2552)
--* BFD_RELOC_XTENSA_SLOT1_ALT: howto manager. (line 2559)
--* BFD_RELOC_XTENSA_SLOT1_OP: howto manager. (line 2539)
--* BFD_RELOC_XTENSA_SLOT2_ALT: howto manager. (line 2560)
--* BFD_RELOC_XTENSA_SLOT2_OP: howto manager. (line 2540)
--* BFD_RELOC_XTENSA_SLOT3_ALT: howto manager. (line 2561)
--* BFD_RELOC_XTENSA_SLOT3_OP: howto manager. (line 2541)
--* BFD_RELOC_XTENSA_SLOT4_ALT: howto manager. (line 2562)
--* BFD_RELOC_XTENSA_SLOT4_OP: howto manager. (line 2542)
--* BFD_RELOC_XTENSA_SLOT5_ALT: howto manager. (line 2563)
--* BFD_RELOC_XTENSA_SLOT5_OP: howto manager. (line 2543)
--* BFD_RELOC_XTENSA_SLOT6_ALT: howto manager. (line 2564)
--* BFD_RELOC_XTENSA_SLOT6_OP: howto manager. (line 2544)
--* BFD_RELOC_XTENSA_SLOT7_ALT: howto manager. (line 2565)
--* BFD_RELOC_XTENSA_SLOT7_OP: howto manager. (line 2545)
--* BFD_RELOC_XTENSA_SLOT8_ALT: howto manager. (line 2566)
--* BFD_RELOC_XTENSA_SLOT8_OP: howto manager. (line 2546)
--* BFD_RELOC_XTENSA_SLOT9_ALT: howto manager. (line 2567)
--* BFD_RELOC_XTENSA_SLOT9_OP: howto manager. (line 2547)
--* BFD_RELOC_XTENSA_TLS_ARG: howto manager. (line 2597)
--* BFD_RELOC_XTENSA_TLS_CALL: howto manager. (line 2598)
--* BFD_RELOC_XTENSA_TLS_DTPOFF: howto manager. (line 2594)
--* BFD_RELOC_XTENSA_TLS_FUNC: howto manager. (line 2596)
--* BFD_RELOC_XTENSA_TLS_TPOFF: howto manager. (line 2595)
--* BFD_RELOC_XTENSA_TLSDESC_ARG: howto manager. (line 2593)
--* BFD_RELOC_XTENSA_TLSDESC_FN: howto manager. (line 2592)
--* BFD_RELOC_Z80_DISP8: howto manager. (line 2601)
--* BFD_RELOC_Z8K_CALLR: howto manager. (line 2607)
--* BFD_RELOC_Z8K_DISP7: howto manager. (line 2604)
--* BFD_RELOC_Z8K_IMM4L: howto manager. (line 2610)
--* bfd_rename_section: section prototypes. (line 169)
--* bfd_scan_arch: Architectures. (line 500)
--* bfd_scan_vma: Miscellaneous. (line 124)
--* bfd_seach_for_target: bfd_target. (line 524)
--* bfd_section_already_linked: Writing the symbol table.
-- (line 55)
--* bfd_section_list_clear: section prototypes. (line 8)
--* bfd_sections_find_if: section prototypes. (line 199)
--* bfd_set_arch_info: Architectures. (line 541)
--* bfd_set_archive_head: Archives. (line 75)
--* bfd_set_assert_handler: Error reporting. (line 141)
--* bfd_set_default_target: bfd_target. (line 463)
--* bfd_set_error: Error reporting. (line 57)
--* bfd_set_error_handler: Error reporting. (line 99)
--* bfd_set_error_program_name: Error reporting. (line 108)
--* bfd_set_file_flags: Miscellaneous. (line 44)
--* bfd_set_format: Formats. (line 68)
--* bfd_set_gp_size: Miscellaneous. (line 114)
--* bfd_set_private_flags: Miscellaneous. (line 191)
--* bfd_set_reloc: Miscellaneous. (line 34)
--* bfd_set_section_contents: section prototypes. (line 230)
--* bfd_set_section_flags: section prototypes. (line 154)
--* bfd_set_section_size: section prototypes. (line 216)
--* bfd_set_start_address: Miscellaneous. (line 93)
--* bfd_set_symtab: symbol handling functions.
-- (line 60)
--* bfd_symbol_info: symbol handling functions.
-- (line 130)
--* bfd_target_list: bfd_target. (line 515)
--* bfd_write_bigendian_4byte_int: Internal. (line 13)
--* bfd_zalloc: Opening and Closing.
-- (line 236)
--* bfd_zalloc2: Opening and Closing.
-- (line 245)
--* coff_symbol_type: coff. (line 245)
--* core_file_matches_executable_p: Core Files. (line 39)
--* find_separate_debug_file: Opening and Closing.
-- (line 308)
--* generic_core_file_matches_executable_p: Core Files. (line 49)
--* Hash tables: Hash Tables. (line 6)
--* internal object-file format: Canonical format. (line 11)
--* Linker: Linker Functions. (line 6)
--* Other functions: Miscellaneous. (line 206)
--* separate_alt_debug_file_exists: Opening and Closing.
-- (line 299)
--* separate_debug_file_exists: Opening and Closing.
-- (line 290)
--* struct bfd_iovec: Miscellaneous. (line 370)
--* target vector (_bfd_final_link): Performing the Final Link.
-- (line 6)
--* target vector (_bfd_link_add_symbols): Adding Symbols to the Hash Table.
-- (line 6)
--* target vector (_bfd_link_hash_table_create): Creating a Linker Hash Table.
-- (line 6)
--* The HOWTO Macro: typedef arelent. (line 288)
--* what is it?: Overview. (line 6)
--
--
--
--Tag Table:
--Node: Top1060
--Node: Overview1399
--Node: History2450
--Node: How It Works3396
--Node: What BFD Version 2 Can Do4939
--Node: BFD information loss6254
--Node: Canonical format8786
--Node: BFD front end13158
--Node: typedef bfd13582
--Node: Error reporting24300
--Node: Miscellaneous29167
--Node: Memory Usage46310
--Node: Initialization47538
--Node: Sections47997
--Node: Section Input48480
--Node: Section Output49845
--Node: typedef asection52331
--Node: section prototypes77563
--Node: Symbols87820
--Node: Reading Symbols89415
--Node: Writing Symbols90522
--Node: Mini Symbols92263
--Node: typedef asymbol93237
--Node: symbol handling functions99296
--Node: Archives104638
--Node: Formats108667
--Node: Relocations111615
--Node: typedef arelent112342
--Node: howto manager127978
--Node: Core Files234626
--Node: Targets236664
--Node: bfd_target238634
--Node: Architectures261856
--Node: Opening and Closing288730
--Node: Internal302076
--Node: File Caching308421
--Node: Linker Functions310335
--Node: Creating a Linker Hash Table312008
--Node: Adding Symbols to the Hash Table313746
--Node: Differing file formats314646
--Node: Adding symbols from an object file316371
--Node: Adding symbols from an archive318522
--Node: Performing the Final Link321451
--Node: Information provided by the linker322693
--Node: Relocating the section contents323847
--Node: Writing the symbol table325598
--Node: Hash Tables329982
--Node: Creating and Freeing a Hash Table331180
--Node: Looking Up or Entering a String332430
--Node: Traversing a Hash Table333683
--Node: Deriving a New Hash Table Type334472
--Node: Define the Derived Structures335538
--Node: Write the Derived Creation Routine336619
--Node: Write Other Derived Routines339243
--Node: BFD back ends340558
--Node: What to Put Where340828
--Node: aout341008
--Node: coff347326
--Node: elf375763
--Node: mmo376164
--Node: File layout377092
--Node: Symbol-table382739
--Node: mmo section mapping386508
--Node: GNU Free Documentation License390160
--Node: BFD Index415243
--
--End Tag Table
-diff -Nur binutils-2.24.orig/bfd/doc/bfdio.texi binutils-2.24/bfd/doc/bfdio.texi
---- binutils-2.24.orig/bfd/doc/bfdio.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/bfdio.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,95 +0,0 @@
--@findex struct bfd_iovec
--@subsubsection @code{struct bfd_iovec}
--@strong{Description}@*
--The @code{struct bfd_iovec} contains the internal file I/O class.
--Each @code{BFD} has an instance of this class and all file I/O is
--routed through it (it is assumed that the instance implements
--all methods listed below).
--@example
--struct bfd_iovec
--@{
-- /* To avoid problems with macros, a "b" rather than "f"
-- prefix is prepended to each method name. */
-- /* Attempt to read/write NBYTES on ABFD's IOSTREAM storing/fetching
-- bytes starting at PTR. Return the number of bytes actually
-- transfered (a read past end-of-file returns less than NBYTES),
-- or -1 (setting @code{bfd_error}) if an error occurs. */
-- file_ptr (*bread) (struct bfd *abfd, void *ptr, file_ptr nbytes);
-- file_ptr (*bwrite) (struct bfd *abfd, const void *ptr,
-- file_ptr nbytes);
-- /* Return the current IOSTREAM file offset, or -1 (setting @code{bfd_error}
-- if an error occurs. */
-- file_ptr (*btell) (struct bfd *abfd);
-- /* For the following, on successful completion a value of 0 is returned.
-- Otherwise, a value of -1 is returned (and @code{bfd_error} is set). */
-- int (*bseek) (struct bfd *abfd, file_ptr offset, int whence);
-- int (*bclose) (struct bfd *abfd);
-- int (*bflush) (struct bfd *abfd);
-- int (*bstat) (struct bfd *abfd, struct stat *sb);
-- /* Mmap a part of the files. ADDR, LEN, PROT, FLAGS and OFFSET are the usual
-- mmap parameter, except that LEN and OFFSET do not need to be page
-- aligned. Returns (void *)-1 on failure, mmapped address on success.
-- Also write in MAP_ADDR the address of the page aligned buffer and in
-- MAP_LEN the size mapped (a page multiple). Use unmap with MAP_ADDR and
-- MAP_LEN to unmap. */
-- void *(*bmmap) (struct bfd *abfd, void *addr, bfd_size_type len,
-- int prot, int flags, file_ptr offset,
-- void **map_addr, bfd_size_type *map_len);
--@};
--extern const struct bfd_iovec _bfd_memory_iovec;
--@end example
--
--@findex bfd_get_mtime
--@subsubsection @code{bfd_get_mtime}
--@strong{Synopsis}
--@example
--long bfd_get_mtime (bfd *abfd);
--@end example
--@strong{Description}@*
--Return the file modification time (as read from the file system, or
--from the archive header for archive members).
--
--@findex bfd_get_size
--@subsubsection @code{bfd_get_size}
--@strong{Synopsis}
--@example
--file_ptr bfd_get_size (bfd *abfd);
--@end example
--@strong{Description}@*
--Return the file size (as read from file system) for the file
--associated with BFD @var{abfd}.
--
--The initial motivation for, and use of, this routine is not
--so we can get the exact size of the object the BFD applies to, since
--that might not be generally possible (archive members for example).
--It would be ideal if someone could eventually modify
--it so that such results were guaranteed.
--
--Instead, we want to ask questions like "is this NNN byte sized
--object I'm about to try read from file offset YYY reasonable?"
--As as example of where we might do this, some object formats
--use string tables for which the first @code{sizeof (long)} bytes of the
--table contain the size of the table itself, including the size bytes.
--If an application tries to read what it thinks is one of these
--string tables, without some way to validate the size, and for
--some reason the size is wrong (byte swapping error, wrong location
--for the string table, etc.), the only clue is likely to be a read
--error when it tries to read the table, or a "virtual memory
--exhausted" error when it tries to allocate 15 bazillon bytes
--of space for the 15 bazillon byte table it is about to read.
--This function at least allows us to answer the question, "is the
--size reasonable?".
--
--@findex bfd_mmap
--@subsubsection @code{bfd_mmap}
--@strong{Synopsis}
--@example
--void *bfd_mmap (bfd *abfd, void *addr, bfd_size_type len,
-- int prot, int flags, file_ptr offset,
-- void **map_addr, bfd_size_type *map_len);
--@end example
--@strong{Description}@*
--Return mmap()ed region of the file, if possible and implemented.
--LEN and OFFSET do not need to be page aligned. The page aligned
--address and length are written to MAP_ADDR and MAP_LEN.
--
-diff -Nur binutils-2.24.orig/bfd/doc/bfdt.texi binutils-2.24/bfd/doc/bfdt.texi
---- binutils-2.24.orig/bfd/doc/bfdt.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/bfdt.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,888 +0,0 @@
--@node typedef bfd, Error reporting, BFD front end, BFD front end
--@section @code{typedef bfd}
--A BFD has type @code{bfd}; objects of this type are the
--cornerstone of any application using BFD. Using BFD
--consists of making references though the BFD and to data in the BFD.
--
--Here is the structure that defines the type @code{bfd}. It
--contains the major data about the file and pointers
--to the rest of the data.
--
--
--@example
--
--enum bfd_direction
-- @{
-- no_direction = 0,
-- read_direction = 1,
-- write_direction = 2,
-- both_direction = 3
-- @};
--
--struct bfd
--@{
-- /* A unique identifier of the BFD */
-- unsigned int id;
--
-- /* The filename the application opened the BFD with. */
-- const char *filename;
--
-- /* A pointer to the target jump table. */
-- const struct bfd_target *xvec;
--
-- /* The IOSTREAM, and corresponding IO vector that provide access
-- to the file backing the BFD. */
-- void *iostream;
-- const struct bfd_iovec *iovec;
--
-- /* The caching routines use these to maintain a
-- least-recently-used list of BFDs. */
-- struct bfd *lru_prev, *lru_next;
--
-- /* When a file is closed by the caching routines, BFD retains
-- state information on the file here... */
-- ufile_ptr where;
--
-- /* File modified time, if mtime_set is TRUE. */
-- long mtime;
--
-- /* Reserved for an unimplemented file locking extension. */
-- int ifd;
--
-- /* The format which belongs to the BFD. (object, core, etc.) */
-- bfd_format format;
--
-- /* The direction with which the BFD was opened. */
-- enum bfd_direction direction;
--
-- /* Format_specific flags. */
-- flagword flags;
--
-- /* Values that may appear in the flags field of a BFD. These also
-- appear in the object_flags field of the bfd_target structure, where
-- they indicate the set of flags used by that backend (not all flags
-- are meaningful for all object file formats) (FIXME: at the moment,
-- the object_flags values have mostly just been copied from backend
-- to another, and are not necessarily correct). */
--
--#define BFD_NO_FLAGS 0x00
--
-- /* BFD contains relocation entries. */
--#define HAS_RELOC 0x01
--
-- /* BFD is directly executable. */
--#define EXEC_P 0x02
--
-- /* BFD has line number information (basically used for F_LNNO in a
-- COFF header). */
--#define HAS_LINENO 0x04
--
-- /* BFD has debugging information. */
--#define HAS_DEBUG 0x08
--
-- /* BFD has symbols. */
--#define HAS_SYMS 0x10
--
-- /* BFD has local symbols (basically used for F_LSYMS in a COFF
-- header). */
--#define HAS_LOCALS 0x20
--
-- /* BFD is a dynamic object. */
--#define DYNAMIC 0x40
--
-- /* Text section is write protected (if D_PAGED is not set, this is
-- like an a.out NMAGIC file) (the linker sets this by default, but
-- clears it for -r or -N). */
--#define WP_TEXT 0x80
--
-- /* BFD is dynamically paged (this is like an a.out ZMAGIC file) (the
-- linker sets this by default, but clears it for -r or -n or -N). */
--#define D_PAGED 0x100
--
-- /* BFD is relaxable (this means that bfd_relax_section may be able to
-- do something) (sometimes bfd_relax_section can do something even if
-- this is not set). */
--#define BFD_IS_RELAXABLE 0x200
--
-- /* This may be set before writing out a BFD to request using a
-- traditional format. For example, this is used to request that when
-- writing out an a.out object the symbols not be hashed to eliminate
-- duplicates. */
--#define BFD_TRADITIONAL_FORMAT 0x400
--
-- /* This flag indicates that the BFD contents are actually cached
-- in memory. If this is set, iostream points to a bfd_in_memory
-- struct. */
--#define BFD_IN_MEMORY 0x800
--
-- /* The sections in this BFD specify a memory page. */
--#define HAS_LOAD_PAGE 0x1000
--
-- /* This BFD has been created by the linker and doesn't correspond
-- to any input file. */
--#define BFD_LINKER_CREATED 0x2000
--
-- /* This may be set before writing out a BFD to request that it
-- be written using values for UIDs, GIDs, timestamps, etc. that
-- will be consistent from run to run. */
--#define BFD_DETERMINISTIC_OUTPUT 0x4000
--
-- /* Compress sections in this BFD. */
--#define BFD_COMPRESS 0x8000
--
-- /* Decompress sections in this BFD. */
--#define BFD_DECOMPRESS 0x10000
--
-- /* BFD is a dummy, for plugins. */
--#define BFD_PLUGIN 0x20000
--
-- /* Flags bits to be saved in bfd_preserve_save. */
--#define BFD_FLAGS_SAVED \
-- (BFD_IN_MEMORY | BFD_COMPRESS | BFD_DECOMPRESS | BFD_PLUGIN)
--
-- /* Flags bits which are for BFD use only. */
--#define BFD_FLAGS_FOR_BFD_USE_MASK \
-- (BFD_IN_MEMORY | BFD_COMPRESS | BFD_DECOMPRESS | BFD_LINKER_CREATED \
-- | BFD_PLUGIN | BFD_TRADITIONAL_FORMAT | BFD_DETERMINISTIC_OUTPUT)
--
-- /* Currently my_archive is tested before adding origin to
-- anything. I believe that this can become always an add of
-- origin, with origin set to 0 for non archive files. */
-- ufile_ptr origin;
--
-- /* The origin in the archive of the proxy entry. This will
-- normally be the same as origin, except for thin archives,
-- when it will contain the current offset of the proxy in the
-- thin archive rather than the offset of the bfd in its actual
-- container. */
-- ufile_ptr proxy_origin;
--
-- /* A hash table for section names. */
-- struct bfd_hash_table section_htab;
--
-- /* Pointer to linked list of sections. */
-- struct bfd_section *sections;
--
-- /* The last section on the section list. */
-- struct bfd_section *section_last;
--
-- /* The number of sections. */
-- unsigned int section_count;
--
-- /* Stuff only useful for object files:
-- The start address. */
-- bfd_vma start_address;
--
-- /* Used for input and output. */
-- unsigned int symcount;
--
-- /* Symbol table for output BFD (with symcount entries).
-- Also used by the linker to cache input BFD symbols. */
-- struct bfd_symbol **outsymbols;
--
-- /* Used for slurped dynamic symbol tables. */
-- unsigned int dynsymcount;
--
-- /* Pointer to structure which contains architecture information. */
-- const struct bfd_arch_info *arch_info;
--
-- /* Stuff only useful for archives. */
-- void *arelt_data;
-- struct bfd *my_archive; /* The containing archive BFD. */
-- struct bfd *archive_next; /* The next BFD in the archive. */
-- struct bfd *archive_head; /* The first BFD in the archive. */
-- struct bfd *nested_archives; /* List of nested archive in a flattened
-- thin archive. */
--
-- /* A chain of BFD structures involved in a link. */
-- struct bfd *link_next;
--
-- /* A field used by _bfd_generic_link_add_archive_symbols. This will
-- be used only for archive elements. */
-- int archive_pass;
--
-- /* Used by the back end to hold private data. */
-- union
-- @{
-- struct aout_data_struct *aout_data;
-- struct artdata *aout_ar_data;
-- struct _oasys_data *oasys_obj_data;
-- struct _oasys_ar_data *oasys_ar_data;
-- struct coff_tdata *coff_obj_data;
-- struct pe_tdata *pe_obj_data;
-- struct xcoff_tdata *xcoff_obj_data;
-- struct ecoff_tdata *ecoff_obj_data;
-- struct ieee_data_struct *ieee_data;
-- struct ieee_ar_data_struct *ieee_ar_data;
-- struct srec_data_struct *srec_data;
-- struct verilog_data_struct *verilog_data;
-- struct ihex_data_struct *ihex_data;
-- struct tekhex_data_struct *tekhex_data;
-- struct elf_obj_tdata *elf_obj_data;
-- struct nlm_obj_tdata *nlm_obj_data;
-- struct bout_data_struct *bout_data;
-- struct mmo_data_struct *mmo_data;
-- struct sun_core_struct *sun_core_data;
-- struct sco5_core_struct *sco5_core_data;
-- struct trad_core_struct *trad_core_data;
-- struct som_data_struct *som_data;
-- struct hpux_core_struct *hpux_core_data;
-- struct hppabsd_core_struct *hppabsd_core_data;
-- struct sgi_core_struct *sgi_core_data;
-- struct lynx_core_struct *lynx_core_data;
-- struct osf_core_struct *osf_core_data;
-- struct cisco_core_struct *cisco_core_data;
-- struct versados_data_struct *versados_data;
-- struct netbsd_core_struct *netbsd_core_data;
-- struct mach_o_data_struct *mach_o_data;
-- struct mach_o_fat_data_struct *mach_o_fat_data;
-- struct plugin_data_struct *plugin_data;
-- struct bfd_pef_data_struct *pef_data;
-- struct bfd_pef_xlib_data_struct *pef_xlib_data;
-- struct bfd_sym_data_struct *sym_data;
-- void *any;
-- @}
-- tdata;
--
-- /* Used by the application to hold private data. */
-- void *usrdata;
--
-- /* Where all the allocated stuff under this BFD goes. This is a
-- struct objalloc *, but we use void * to avoid requiring the inclusion
-- of objalloc.h. */
-- void *memory;
--
-- /* Is the file descriptor being cached? That is, can it be closed as
-- needed, and re-opened when accessed later? */
-- unsigned int cacheable : 1;
--
-- /* Marks whether there was a default target specified when the
-- BFD was opened. This is used to select which matching algorithm
-- to use to choose the back end. */
-- unsigned int target_defaulted : 1;
--
-- /* ... and here: (``once'' means at least once). */
-- unsigned int opened_once : 1;
--
-- /* Set if we have a locally maintained mtime value, rather than
-- getting it from the file each time. */
-- unsigned int mtime_set : 1;
--
-- /* Flag set if symbols from this BFD should not be exported. */
-- unsigned int no_export : 1;
--
-- /* Remember when output has begun, to stop strange things
-- from happening. */
-- unsigned int output_has_begun : 1;
--
-- /* Have archive map. */
-- unsigned int has_armap : 1;
--
-- /* Set if this is a thin archive. */
-- unsigned int is_thin_archive : 1;
--
-- /* Set if only required symbols should be added in the link hash table for
-- this object. Used by VMS linkers. */
-- unsigned int selective_search : 1;
--@};
--
--@end example
--@node Error reporting, Miscellaneous, typedef bfd, BFD front end
--@section Error reporting
--Most BFD functions return nonzero on success (check their
--individual documentation for precise semantics). On an error,
--they call @code{bfd_set_error} to set an error condition that callers
--can check by calling @code{bfd_get_error}.
--If that returns @code{bfd_error_system_call}, then check
--@code{errno}.
--
--The easiest way to report a BFD error to the user is to
--use @code{bfd_perror}.
--
--@subsection Type @code{bfd_error_type}
--The values returned by @code{bfd_get_error} are defined by the
--enumerated type @code{bfd_error_type}.
--
--
--@example
--
--typedef enum bfd_error
--@{
-- bfd_error_no_error = 0,
-- bfd_error_system_call,
-- bfd_error_invalid_target,
-- bfd_error_wrong_format,
-- bfd_error_wrong_object_format,
-- bfd_error_invalid_operation,
-- bfd_error_no_memory,
-- bfd_error_no_symbols,
-- bfd_error_no_armap,
-- bfd_error_no_more_archived_files,
-- bfd_error_malformed_archive,
-- bfd_error_missing_dso,
-- bfd_error_file_not_recognized,
-- bfd_error_file_ambiguously_recognized,
-- bfd_error_no_contents,
-- bfd_error_nonrepresentable_section,
-- bfd_error_no_debug_section,
-- bfd_error_bad_value,
-- bfd_error_file_truncated,
-- bfd_error_file_too_big,
-- bfd_error_on_input,
-- bfd_error_invalid_error_code
--@}
--bfd_error_type;
--
--@end example
--@findex bfd_get_error
--@subsubsection @code{bfd_get_error}
--@strong{Synopsis}
--@example
--bfd_error_type bfd_get_error (void);
--@end example
--@strong{Description}@*
--Return the current BFD error condition.
--
--@findex bfd_set_error
--@subsubsection @code{bfd_set_error}
--@strong{Synopsis}
--@example
--void bfd_set_error (bfd_error_type error_tag, ...);
--@end example
--@strong{Description}@*
--Set the BFD error condition to be @var{error_tag}.
--If @var{error_tag} is bfd_error_on_input, then this function
--takes two more parameters, the input bfd where the error
--occurred, and the bfd_error_type error.
--
--@findex bfd_errmsg
--@subsubsection @code{bfd_errmsg}
--@strong{Synopsis}
--@example
--const char *bfd_errmsg (bfd_error_type error_tag);
--@end example
--@strong{Description}@*
--Return a string describing the error @var{error_tag}, or
--the system error if @var{error_tag} is @code{bfd_error_system_call}.
--
--@findex bfd_perror
--@subsubsection @code{bfd_perror}
--@strong{Synopsis}
--@example
--void bfd_perror (const char *message);
--@end example
--@strong{Description}@*
--Print to the standard error stream a string describing the
--last BFD error that occurred, or the last system error if
--the last BFD error was a system call failure. If @var{message}
--is non-NULL and non-empty, the error string printed is preceded
--by @var{message}, a colon, and a space. It is followed by a newline.
--
--@subsection BFD error handler
--Some BFD functions want to print messages describing the
--problem. They call a BFD error handler function. This
--function may be overridden by the program.
--
--The BFD error handler acts like printf.
--
--
--@example
--
--typedef void (*bfd_error_handler_type) (const char *, ...);
--
--@end example
--@findex bfd_set_error_handler
--@subsubsection @code{bfd_set_error_handler}
--@strong{Synopsis}
--@example
--bfd_error_handler_type bfd_set_error_handler (bfd_error_handler_type);
--@end example
--@strong{Description}@*
--Set the BFD error handler function. Returns the previous
--function.
--
--@findex bfd_set_error_program_name
--@subsubsection @code{bfd_set_error_program_name}
--@strong{Synopsis}
--@example
--void bfd_set_error_program_name (const char *);
--@end example
--@strong{Description}@*
--Set the program name to use when printing a BFD error. This
--is printed before the error message followed by a colon and
--space. The string must not be changed after it is passed to
--this function.
--
--@findex bfd_get_error_handler
--@subsubsection @code{bfd_get_error_handler}
--@strong{Synopsis}
--@example
--bfd_error_handler_type bfd_get_error_handler (void);
--@end example
--@strong{Description}@*
--Return the BFD error handler function.
--
--@subsection BFD assert handler
--If BFD finds an internal inconsistency, the bfd assert
--handler is called with information on the BFD version, BFD
--source file and line. If this happens, most programs linked
--against BFD are expected to want to exit with an error, or mark
--the current BFD operation as failed, so it is recommended to
--override the default handler, which just calls
--_bfd_error_handler and continues.
--
--
--@example
--
--typedef void (*bfd_assert_handler_type) (const char *bfd_formatmsg,
-- const char *bfd_version,
-- const char *bfd_file,
-- int bfd_line);
--
--@end example
--@findex bfd_set_assert_handler
--@subsubsection @code{bfd_set_assert_handler}
--@strong{Synopsis}
--@example
--bfd_assert_handler_type bfd_set_assert_handler (bfd_assert_handler_type);
--@end example
--@strong{Description}@*
--Set the BFD assert handler function. Returns the previous
--function.
--
--@findex bfd_get_assert_handler
--@subsubsection @code{bfd_get_assert_handler}
--@strong{Synopsis}
--@example
--bfd_assert_handler_type bfd_get_assert_handler (void);
--@end example
--@strong{Description}@*
--Return the BFD assert handler function.
--
--@node Miscellaneous, Memory Usage, Error reporting, BFD front end
--@section Miscellaneous
--
--
--@subsection Miscellaneous functions
--
--
--@findex bfd_get_reloc_upper_bound
--@subsubsection @code{bfd_get_reloc_upper_bound}
--@strong{Synopsis}
--@example
--long bfd_get_reloc_upper_bound (bfd *abfd, asection *sect);
--@end example
--@strong{Description}@*
--Return the number of bytes required to store the
--relocation information associated with section @var{sect}
--attached to bfd @var{abfd}. If an error occurs, return -1.
--
--@findex bfd_canonicalize_reloc
--@subsubsection @code{bfd_canonicalize_reloc}
--@strong{Synopsis}
--@example
--long bfd_canonicalize_reloc
-- (bfd *abfd, asection *sec, arelent **loc, asymbol **syms);
--@end example
--@strong{Description}@*
--Call the back end associated with the open BFD
--@var{abfd} and translate the external form of the relocation
--information attached to @var{sec} into the internal canonical
--form. Place the table into memory at @var{loc}, which has
--been preallocated, usually by a call to
--@code{bfd_get_reloc_upper_bound}. Returns the number of relocs, or
---1 on error.
--
--The @var{syms} table is also needed for horrible internal magic
--reasons.
--
--@findex bfd_set_reloc
--@subsubsection @code{bfd_set_reloc}
--@strong{Synopsis}
--@example
--void bfd_set_reloc
-- (bfd *abfd, asection *sec, arelent **rel, unsigned int count);
--@end example
--@strong{Description}@*
--Set the relocation pointer and count within
--section @var{sec} to the values @var{rel} and @var{count}.
--The argument @var{abfd} is ignored.
--
--@findex bfd_set_file_flags
--@subsubsection @code{bfd_set_file_flags}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_set_file_flags (bfd *abfd, flagword flags);
--@end example
--@strong{Description}@*
--Set the flag word in the BFD @var{abfd} to the value @var{flags}.
--
--Possible errors are:
--@itemize @bullet
--
--@item
--@code{bfd_error_wrong_format} - The target bfd was not of object format.
--@item
--@code{bfd_error_invalid_operation} - The target bfd was open for reading.
--@item
--@code{bfd_error_invalid_operation} -
--The flag word contained a bit which was not applicable to the
--type of file. E.g., an attempt was made to set the @code{D_PAGED} bit
--on a BFD format which does not support demand paging.
--@end itemize
--
--@findex bfd_get_arch_size
--@subsubsection @code{bfd_get_arch_size}
--@strong{Synopsis}
--@example
--int bfd_get_arch_size (bfd *abfd);
--@end example
--@strong{Description}@*
--Returns the architecture address size, in bits, as determined
--by the object file's format. For ELF, this information is
--included in the header.
--
--@strong{Returns}@*
--Returns the arch size in bits if known, @code{-1} otherwise.
--
--@findex bfd_get_sign_extend_vma
--@subsubsection @code{bfd_get_sign_extend_vma}
--@strong{Synopsis}
--@example
--int bfd_get_sign_extend_vma (bfd *abfd);
--@end example
--@strong{Description}@*
--Indicates if the target architecture "naturally" sign extends
--an address. Some architectures implicitly sign extend address
--values when they are converted to types larger than the size
--of an address. For instance, bfd_get_start_address() will
--return an address sign extended to fill a bfd_vma when this is
--the case.
--
--@strong{Returns}@*
--Returns @code{1} if the target architecture is known to sign
--extend addresses, @code{0} if the target architecture is known to
--not sign extend addresses, and @code{-1} otherwise.
--
--@findex bfd_set_start_address
--@subsubsection @code{bfd_set_start_address}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_set_start_address (bfd *abfd, bfd_vma vma);
--@end example
--@strong{Description}@*
--Make @var{vma} the entry point of output BFD @var{abfd}.
--
--@strong{Returns}@*
--Returns @code{TRUE} on success, @code{FALSE} otherwise.
--
--@findex bfd_get_gp_size
--@subsubsection @code{bfd_get_gp_size}
--@strong{Synopsis}
--@example
--unsigned int bfd_get_gp_size (bfd *abfd);
--@end example
--@strong{Description}@*
--Return the maximum size of objects to be optimized using the GP
--register under MIPS ECOFF. This is typically set by the @code{-G}
--argument to the compiler, assembler or linker.
--
--@findex bfd_set_gp_size
--@subsubsection @code{bfd_set_gp_size}
--@strong{Synopsis}
--@example
--void bfd_set_gp_size (bfd *abfd, unsigned int i);
--@end example
--@strong{Description}@*
--Set the maximum size of objects to be optimized using the GP
--register under ECOFF or MIPS ELF. This is typically set by
--the @code{-G} argument to the compiler, assembler or linker.
--
--@findex bfd_scan_vma
--@subsubsection @code{bfd_scan_vma}
--@strong{Synopsis}
--@example
--bfd_vma bfd_scan_vma (const char *string, const char **end, int base);
--@end example
--@strong{Description}@*
--Convert, like @code{strtoul}, a numerical expression
--@var{string} into a @code{bfd_vma} integer, and return that integer.
--(Though without as many bells and whistles as @code{strtoul}.)
--The expression is assumed to be unsigned (i.e., positive).
--If given a @var{base}, it is used as the base for conversion.
--A base of 0 causes the function to interpret the string
--in hex if a leading "0x" or "0X" is found, otherwise
--in octal if a leading zero is found, otherwise in decimal.
--
--If the value would overflow, the maximum @code{bfd_vma} value is
--returned.
--
--@findex bfd_copy_private_header_data
--@subsubsection @code{bfd_copy_private_header_data}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_copy_private_header_data (bfd *ibfd, bfd *obfd);
--@end example
--@strong{Description}@*
--Copy private BFD header information from the BFD @var{ibfd} to the
--the BFD @var{obfd}. This copies information that may require
--sections to exist, but does not require symbol tables. Return
--@code{true} on success, @code{false} on error.
--Possible error returns are:
--
--@itemize @bullet
--
--@item
--@code{bfd_error_no_memory} -
--Not enough memory exists to create private data for @var{obfd}.
--@end itemize
--@example
--#define bfd_copy_private_header_data(ibfd, obfd) \
-- BFD_SEND (obfd, _bfd_copy_private_header_data, \
-- (ibfd, obfd))
--@end example
--
--@findex bfd_copy_private_bfd_data
--@subsubsection @code{bfd_copy_private_bfd_data}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_copy_private_bfd_data (bfd *ibfd, bfd *obfd);
--@end example
--@strong{Description}@*
--Copy private BFD information from the BFD @var{ibfd} to the
--the BFD @var{obfd}. Return @code{TRUE} on success, @code{FALSE} on error.
--Possible error returns are:
--
--@itemize @bullet
--
--@item
--@code{bfd_error_no_memory} -
--Not enough memory exists to create private data for @var{obfd}.
--@end itemize
--@example
--#define bfd_copy_private_bfd_data(ibfd, obfd) \
-- BFD_SEND (obfd, _bfd_copy_private_bfd_data, \
-- (ibfd, obfd))
--@end example
--
--@findex bfd_merge_private_bfd_data
--@subsubsection @code{bfd_merge_private_bfd_data}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_merge_private_bfd_data (bfd *ibfd, bfd *obfd);
--@end example
--@strong{Description}@*
--Merge private BFD information from the BFD @var{ibfd} to the
--the output file BFD @var{obfd} when linking. Return @code{TRUE}
--on success, @code{FALSE} on error. Possible error returns are:
--
--@itemize @bullet
--
--@item
--@code{bfd_error_no_memory} -
--Not enough memory exists to create private data for @var{obfd}.
--@end itemize
--@example
--#define bfd_merge_private_bfd_data(ibfd, obfd) \
-- BFD_SEND (obfd, _bfd_merge_private_bfd_data, \
-- (ibfd, obfd))
--@end example
--
--@findex bfd_set_private_flags
--@subsubsection @code{bfd_set_private_flags}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_set_private_flags (bfd *abfd, flagword flags);
--@end example
--@strong{Description}@*
--Set private BFD flag information in the BFD @var{abfd}.
--Return @code{TRUE} on success, @code{FALSE} on error. Possible error
--returns are:
--
--@itemize @bullet
--
--@item
--@code{bfd_error_no_memory} -
--Not enough memory exists to create private data for @var{obfd}.
--@end itemize
--@example
--#define bfd_set_private_flags(abfd, flags) \
-- BFD_SEND (abfd, _bfd_set_private_flags, (abfd, flags))
--@end example
--
--@findex Other functions
--@subsubsection @code{Other functions}
--@strong{Description}@*
--The following functions exist but have not yet been documented.
--@example
--#define bfd_sizeof_headers(abfd, info) \
-- BFD_SEND (abfd, _bfd_sizeof_headers, (abfd, info))
--
--#define bfd_find_nearest_line(abfd, sec, syms, off, file, func, line) \
-- BFD_SEND (abfd, _bfd_find_nearest_line, \
-- (abfd, sec, syms, off, file, func, line))
--
--#define bfd_find_nearest_line_discriminator(abfd, sec, syms, off, file, func, \
-- line, disc) \
-- BFD_SEND (abfd, _bfd_find_nearest_line_discriminator, \
-- (abfd, sec, syms, off, file, func, line, disc))
--
--#define bfd_find_line(abfd, syms, sym, file, line) \
-- BFD_SEND (abfd, _bfd_find_line, \
-- (abfd, syms, sym, file, line))
--
--#define bfd_find_inliner_info(abfd, file, func, line) \
-- BFD_SEND (abfd, _bfd_find_inliner_info, \
-- (abfd, file, func, line))
--
--#define bfd_debug_info_start(abfd) \
-- BFD_SEND (abfd, _bfd_debug_info_start, (abfd))
--
--#define bfd_debug_info_end(abfd) \
-- BFD_SEND (abfd, _bfd_debug_info_end, (abfd))
--
--#define bfd_debug_info_accumulate(abfd, section) \
-- BFD_SEND (abfd, _bfd_debug_info_accumulate, (abfd, section))
--
--#define bfd_stat_arch_elt(abfd, stat) \
-- BFD_SEND (abfd, _bfd_stat_arch_elt,(abfd, stat))
--
--#define bfd_update_armap_timestamp(abfd) \
-- BFD_SEND (abfd, _bfd_update_armap_timestamp, (abfd))
--
--#define bfd_set_arch_mach(abfd, arch, mach)\
-- BFD_SEND ( abfd, _bfd_set_arch_mach, (abfd, arch, mach))
--
--#define bfd_relax_section(abfd, section, link_info, again) \
-- BFD_SEND (abfd, _bfd_relax_section, (abfd, section, link_info, again))
--
--#define bfd_gc_sections(abfd, link_info) \
-- BFD_SEND (abfd, _bfd_gc_sections, (abfd, link_info))
--
--#define bfd_lookup_section_flags(link_info, flag_info, section) \
-- BFD_SEND (abfd, _bfd_lookup_section_flags, (link_info, flag_info, section))
--
--#define bfd_merge_sections(abfd, link_info) \
-- BFD_SEND (abfd, _bfd_merge_sections, (abfd, link_info))
--
--#define bfd_is_group_section(abfd, sec) \
-- BFD_SEND (abfd, _bfd_is_group_section, (abfd, sec))
--
--#define bfd_discard_group(abfd, sec) \
-- BFD_SEND (abfd, _bfd_discard_group, (abfd, sec))
--
--#define bfd_link_hash_table_create(abfd) \
-- BFD_SEND (abfd, _bfd_link_hash_table_create, (abfd))
--
--#define bfd_link_hash_table_free(abfd, hash) \
-- BFD_SEND (abfd, _bfd_link_hash_table_free, (hash))
--
--#define bfd_link_add_symbols(abfd, info) \
-- BFD_SEND (abfd, _bfd_link_add_symbols, (abfd, info))
--
--#define bfd_link_just_syms(abfd, sec, info) \
-- BFD_SEND (abfd, _bfd_link_just_syms, (sec, info))
--
--#define bfd_final_link(abfd, info) \
-- BFD_SEND (abfd, _bfd_final_link, (abfd, info))
--
--#define bfd_free_cached_info(abfd) \
-- BFD_SEND (abfd, _bfd_free_cached_info, (abfd))
--
--#define bfd_get_dynamic_symtab_upper_bound(abfd) \
-- BFD_SEND (abfd, _bfd_get_dynamic_symtab_upper_bound, (abfd))
--
--#define bfd_print_private_bfd_data(abfd, file)\
-- BFD_SEND (abfd, _bfd_print_private_bfd_data, (abfd, file))
--
--#define bfd_canonicalize_dynamic_symtab(abfd, asymbols) \
-- BFD_SEND (abfd, _bfd_canonicalize_dynamic_symtab, (abfd, asymbols))
--
--#define bfd_get_synthetic_symtab(abfd, count, syms, dyncount, dynsyms, ret) \
-- BFD_SEND (abfd, _bfd_get_synthetic_symtab, (abfd, count, syms, \
-- dyncount, dynsyms, ret))
--
--#define bfd_get_dynamic_reloc_upper_bound(abfd) \
-- BFD_SEND (abfd, _bfd_get_dynamic_reloc_upper_bound, (abfd))
--
--#define bfd_canonicalize_dynamic_reloc(abfd, arels, asyms) \
-- BFD_SEND (abfd, _bfd_canonicalize_dynamic_reloc, (abfd, arels, asyms))
--
--extern bfd_byte *bfd_get_relocated_section_contents
-- (bfd *, struct bfd_link_info *, struct bfd_link_order *, bfd_byte *,
-- bfd_boolean, asymbol **);
--
--@end example
--
--@findex bfd_alt_mach_code
--@subsubsection @code{bfd_alt_mach_code}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_alt_mach_code (bfd *abfd, int alternative);
--@end example
--@strong{Description}@*
--When more than one machine code number is available for the
--same machine type, this function can be used to switch between
--the preferred one (alternative == 0) and any others. Currently,
--only ELF supports this feature, with up to two alternate
--machine codes.
--
--@findex bfd_emul_get_maxpagesize
--@subsubsection @code{bfd_emul_get_maxpagesize}
--@strong{Synopsis}
--@example
--bfd_vma bfd_emul_get_maxpagesize (const char *);
--@end example
--@strong{Description}@*
--Returns the maximum page size, in bytes, as determined by
--emulation.
--
--@strong{Returns}@*
--Returns the maximum page size in bytes for ELF, 0 otherwise.
--
--@findex bfd_emul_set_maxpagesize
--@subsubsection @code{bfd_emul_set_maxpagesize}
--@strong{Synopsis}
--@example
--void bfd_emul_set_maxpagesize (const char *, bfd_vma);
--@end example
--@strong{Description}@*
--For ELF, set the maximum page size for the emulation. It is
--a no-op for other formats.
--
--@findex bfd_emul_get_commonpagesize
--@subsubsection @code{bfd_emul_get_commonpagesize}
--@strong{Synopsis}
--@example
--bfd_vma bfd_emul_get_commonpagesize (const char *);
--@end example
--@strong{Description}@*
--Returns the common page size, in bytes, as determined by
--emulation.
--
--@strong{Returns}@*
--Returns the common page size in bytes for ELF, 0 otherwise.
--
--@findex bfd_emul_set_commonpagesize
--@subsubsection @code{bfd_emul_set_commonpagesize}
--@strong{Synopsis}
--@example
--void bfd_emul_set_commonpagesize (const char *, bfd_vma);
--@end example
--@strong{Description}@*
--For ELF, set the common page size for the emulation. It is
--a no-op for other formats.
--
--@findex bfd_demangle
--@subsubsection @code{bfd_demangle}
--@strong{Synopsis}
--@example
--char *bfd_demangle (bfd *, const char *, int);
--@end example
--@strong{Description}@*
--Wrapper around cplus_demangle. Strips leading underscores and
--other such chars that would otherwise confuse the demangler.
--If passed a g++ v3 ABI mangled name, returns a buffer allocated
--with malloc holding the demangled name. Returns NULL otherwise
--and on memory alloc failure.
--
-diff -Nur binutils-2.24.orig/bfd/doc/bfdver.texi binutils-2.24/bfd/doc/bfdver.texi
---- binutils-2.24.orig/bfd/doc/bfdver.texi 2013-12-02 10:32:19.000000000 +0100
-+++ binutils-2.24/bfd/doc/bfdver.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,4 +0,0 @@
--@set VERSION 2.24
--@set VERSION_PACKAGE (GNU Binutils)
--@set UPDATED December 2013
--@set BUGURL @uref{http://www.sourceware.org/bugzilla/}
-diff -Nur binutils-2.24.orig/bfd/doc/bfdwin.texi binutils-2.24/bfd/doc/bfdwin.texi
---- binutils-2.24.orig/bfd/doc/bfdwin.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/bfdwin.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,2 +0,0 @@
--@findex
--@subsubsection @code{}
-diff -Nur binutils-2.24.orig/bfd/doc/cache.texi binutils-2.24/bfd/doc/cache.texi
---- binutils-2.24.orig/bfd/doc/cache.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/cache.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,65 +0,0 @@
--@section File caching
--The file caching mechanism is embedded within BFD and allows
--the application to open as many BFDs as it wants without
--regard to the underlying operating system's file descriptor
--limit (often as low as 20 open files). The module in
--@code{cache.c} maintains a least recently used list of
--@code{bfd_cache_max_open} files, and exports the name
--@code{bfd_cache_lookup}, which runs around and makes sure that
--the required BFD is open. If not, then it chooses a file to
--close, closes it and opens the one wanted, returning its file
--handle.
--
--@subsection Caching functions
--
--
--@findex bfd_cache_init
--@subsubsection @code{bfd_cache_init}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_cache_init (bfd *abfd);
--@end example
--@strong{Description}@*
--Add a newly opened BFD to the cache.
--
--@findex bfd_cache_close
--@subsubsection @code{bfd_cache_close}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_cache_close (bfd *abfd);
--@end example
--@strong{Description}@*
--Remove the BFD @var{abfd} from the cache. If the attached file is open,
--then close it too.
--
--@strong{Returns}@*
--@code{FALSE} is returned if closing the file fails, @code{TRUE} is
--returned if all is well.
--
--@findex bfd_cache_close_all
--@subsubsection @code{bfd_cache_close_all}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_cache_close_all (void);
--@end example
--@strong{Description}@*
--Remove all BFDs from the cache. If the attached file is open,
--then close it too.
--
--@strong{Returns}@*
--@code{FALSE} is returned if closing one of the file fails, @code{TRUE} is
--returned if all is well.
--
--@findex bfd_open_file
--@subsubsection @code{bfd_open_file}
--@strong{Synopsis}
--@example
--FILE* bfd_open_file (bfd *abfd);
--@end example
--@strong{Description}@*
--Call the OS to open a file for @var{abfd}. Return the @code{FILE *}
--(possibly @code{NULL}) that results from this operation. Set up the
--BFD so that future accesses know the file is open. If the @code{FILE *}
--returned is @code{NULL}, then it won't have been put in the
--cache, so it won't have to be removed from it.
--
-diff -Nur binutils-2.24.orig/bfd/doc/coffcode.texi binutils-2.24/bfd/doc/coffcode.texi
---- binutils-2.24.orig/bfd/doc/coffcode.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/coffcode.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,686 +0,0 @@
--@section coff backends
--BFD supports a number of different flavours of coff format.
--The major differences between formats are the sizes and
--alignments of fields in structures on disk, and the occasional
--extra field.
--
--Coff in all its varieties is implemented with a few common
--files and a number of implementation specific files. For
--example, The 88k bcs coff format is implemented in the file
--@file{coff-m88k.c}. This file @code{#include}s
--@file{coff/m88k.h} which defines the external structure of the
--coff format for the 88k, and @file{coff/internal.h} which
--defines the internal structure. @file{coff-m88k.c} also
--defines the relocations used by the 88k format
--@xref{Relocations}.
--
--The Intel i960 processor version of coff is implemented in
--@file{coff-i960.c}. This file has the same structure as
--@file{coff-m88k.c}, except that it includes @file{coff/i960.h}
--rather than @file{coff-m88k.h}.
--
--@subsection Porting to a new version of coff
--The recommended method is to select from the existing
--implementations the version of coff which is most like the one
--you want to use. For example, we'll say that i386 coff is
--the one you select, and that your coff flavour is called foo.
--Copy @file{i386coff.c} to @file{foocoff.c}, copy
--@file{../include/coff/i386.h} to @file{../include/coff/foo.h},
--and add the lines to @file{targets.c} and @file{Makefile.in}
--so that your new back end is used. Alter the shapes of the
--structures in @file{../include/coff/foo.h} so that they match
--what you need. You will probably also have to add
--@code{#ifdef}s to the code in @file{coff/internal.h} and
--@file{coffcode.h} if your version of coff is too wild.
--
--You can verify that your new BFD backend works quite simply by
--building @file{objdump} from the @file{binutils} directory,
--and making sure that its version of what's going on and your
--host system's idea (assuming it has the pretty standard coff
--dump utility, usually called @code{att-dump} or just
--@code{dump}) are the same. Then clean up your code, and send
--what you've done to Cygnus. Then your stuff will be in the
--next release, and you won't have to keep integrating it.
--
--@subsection How the coff backend works
--
--
--@subsubsection File layout
--The Coff backend is split into generic routines that are
--applicable to any Coff target and routines that are specific
--to a particular target. The target-specific routines are
--further split into ones which are basically the same for all
--Coff targets except that they use the external symbol format
--or use different values for certain constants.
--
--The generic routines are in @file{coffgen.c}. These routines
--work for any Coff target. They use some hooks into the target
--specific code; the hooks are in a @code{bfd_coff_backend_data}
--structure, one of which exists for each target.
--
--The essentially similar target-specific routines are in
--@file{coffcode.h}. This header file includes executable C code.
--The various Coff targets first include the appropriate Coff
--header file, make any special defines that are needed, and
--then include @file{coffcode.h}.
--
--Some of the Coff targets then also have additional routines in
--the target source file itself.
--
--For example, @file{coff-i960.c} includes
--@file{coff/internal.h} and @file{coff/i960.h}. It then
--defines a few constants, such as @code{I960}, and includes
--@file{coffcode.h}. Since the i960 has complex relocation
--types, @file{coff-i960.c} also includes some code to
--manipulate the i960 relocs. This code is not in
--@file{coffcode.h} because it would not be used by any other
--target.
--
--@subsubsection Coff long section names
--In the standard Coff object format, section names are limited to
--the eight bytes available in the @code{s_name} field of the
--@code{SCNHDR} section header structure. The format requires the
--field to be NUL-padded, but not necessarily NUL-terminated, so
--the longest section names permitted are a full eight characters.
--
--The Microsoft PE variants of the Coff object file format add
--an extension to support the use of long section names. This
--extension is defined in section 4 of the Microsoft PE/COFF
--specification (rev 8.1). If a section name is too long to fit
--into the section header's @code{s_name} field, it is instead
--placed into the string table, and the @code{s_name} field is
--filled with a slash ("/") followed by the ASCII decimal
--representation of the offset of the full name relative to the
--string table base.
--
--Note that this implies that the extension can only be used in object
--files, as executables do not contain a string table. The standard
--specifies that long section names from objects emitted into executable
--images are to be truncated.
--
--However, as a GNU extension, BFD can generate executable images
--that contain a string table and long section names. This
--would appear to be technically valid, as the standard only says
--that Coff debugging information is deprecated, not forbidden,
--and in practice it works, although some tools that parse PE files
--expecting the MS standard format may become confused; @file{PEview} is
--one known example.
--
--The functionality is supported in BFD by code implemented under
--the control of the macro @code{COFF_LONG_SECTION_NAMES}. If not
--defined, the format does not support long section names in any way.
--If defined, it is used to initialise a flag,
--@code{_bfd_coff_long_section_names}, and a hook function pointer,
--@code{_bfd_coff_set_long_section_names}, in the Coff backend data
--structure. The flag controls the generation of long section names
--in output BFDs at runtime; if it is false, as it will be by default
--when generating an executable image, long section names are truncated;
--if true, the long section names extension is employed. The hook
--points to a function that allows the value of the flag to be altered
--at runtime, on formats that support long section names at all; on
--other formats it points to a stub that returns an error indication.
--
--With input BFDs, the flag is set according to whether any long section
--names are detected while reading the section headers. For a completely
--new BFD, the flag is set to the default for the target format. This
--information can be used by a client of the BFD library when deciding
--what output format to generate, and means that a BFD that is opened
--for read and subsequently converted to a writeable BFD and modified
--in-place will retain whatever format it had on input.
--
--If @code{COFF_LONG_SECTION_NAMES} is simply defined (blank), or is
--defined to the value "1", then long section names are enabled by
--default; if it is defined to the value zero, they are disabled by
--default (but still accepted in input BFDs). The header @file{coffcode.h}
--defines a macro, @code{COFF_DEFAULT_LONG_SECTION_NAMES}, which is
--used in the backends to initialise the backend data structure fields
--appropriately; see the comments for further detail.
--
--@subsubsection Bit twiddling
--Each flavour of coff supported in BFD has its own header file
--describing the external layout of the structures. There is also
--an internal description of the coff layout, in
--@file{coff/internal.h}. A major function of the
--coff backend is swapping the bytes and twiddling the bits to
--translate the external form of the structures into the normal
--internal form. This is all performed in the
--@code{bfd_swap}_@i{thing}_@i{direction} routines. Some
--elements are different sizes between different versions of
--coff; it is the duty of the coff version specific include file
--to override the definitions of various packing routines in
--@file{coffcode.h}. E.g., the size of line number entry in coff is
--sometimes 16 bits, and sometimes 32 bits. @code{#define}ing
--@code{PUT_LNSZ_LNNO} and @code{GET_LNSZ_LNNO} will select the
--correct one. No doubt, some day someone will find a version of
--coff which has a varying field size not catered to at the
--moment. To port BFD, that person will have to add more @code{#defines}.
--Three of the bit twiddling routines are exported to
--@code{gdb}; @code{coff_swap_aux_in}, @code{coff_swap_sym_in}
--and @code{coff_swap_lineno_in}. @code{GDB} reads the symbol
--table on its own, but uses BFD to fix things up. More of the
--bit twiddlers are exported for @code{gas};
--@code{coff_swap_aux_out}, @code{coff_swap_sym_out},
--@code{coff_swap_lineno_out}, @code{coff_swap_reloc_out},
--@code{coff_swap_filehdr_out}, @code{coff_swap_aouthdr_out},
--@code{coff_swap_scnhdr_out}. @code{Gas} currently keeps track
--of all the symbol table and reloc drudgery itself, thereby
--saving the internal BFD overhead, but uses BFD to swap things
--on the way out, making cross ports much safer. Doing so also
--allows BFD (and thus the linker) to use the same header files
--as @code{gas}, which makes one avenue to disaster disappear.
--
--@subsubsection Symbol reading
--The simple canonical form for symbols used by BFD is not rich
--enough to keep all the information available in a coff symbol
--table. The back end gets around this problem by keeping the original
--symbol table around, "behind the scenes".
--
--When a symbol table is requested (through a call to
--@code{bfd_canonicalize_symtab}), a request gets through to
--@code{coff_get_normalized_symtab}. This reads the symbol table from
--the coff file and swaps all the structures inside into the
--internal form. It also fixes up all the pointers in the table
--(represented in the file by offsets from the first symbol in
--the table) into physical pointers to elements in the new
--internal table. This involves some work since the meanings of
--fields change depending upon context: a field that is a
--pointer to another structure in the symbol table at one moment
--may be the size in bytes of a structure at the next. Another
--pass is made over the table. All symbols which mark file names
--(@code{C_FILE} symbols) are modified so that the internal
--string points to the value in the auxent (the real filename)
--rather than the normal text associated with the symbol
--(@code{".file"}).
--
--At this time the symbol names are moved around. Coff stores
--all symbols less than nine characters long physically
--within the symbol table; longer strings are kept at the end of
--the file in the string table. This pass moves all strings
--into memory and replaces them with pointers to the strings.
--
--The symbol table is massaged once again, this time to create
--the canonical table used by the BFD application. Each symbol
--is inspected in turn, and a decision made (using the
--@code{sclass} field) about the various flags to set in the
--@code{asymbol}. @xref{Symbols}. The generated canonical table
--shares strings with the hidden internal symbol table.
--
--Any linenumbers are read from the coff file too, and attached
--to the symbols which own the functions the linenumbers belong to.
--
--@subsubsection Symbol writing
--Writing a symbol to a coff file which didn't come from a coff
--file will lose any debugging information. The @code{asymbol}
--structure remembers the BFD from which the symbol was taken, and on
--output the back end makes sure that the same destination target as
--source target is present.
--
--When the symbols have come from a coff file then all the
--debugging information is preserved.
--
--Symbol tables are provided for writing to the back end in a
--vector of pointers to pointers. This allows applications like
--the linker to accumulate and output large symbol tables
--without having to do too much byte copying.
--
--This function runs through the provided symbol table and
--patches each symbol marked as a file place holder
--(@code{C_FILE}) to point to the next file place holder in the
--list. It also marks each @code{offset} field in the list with
--the offset from the first symbol of the current symbol.
--
--Another function of this procedure is to turn the canonical
--value form of BFD into the form used by coff. Internally, BFD
--expects symbol values to be offsets from a section base; so a
--symbol physically at 0x120, but in a section starting at
--0x100, would have the value 0x20. Coff expects symbols to
--contain their final value, so symbols have their values
--changed at this point to reflect their sum with their owning
--section. This transformation uses the
--@code{output_section} field of the @code{asymbol}'s
--@code{asection} @xref{Sections}.
--
--@itemize @bullet
--
--@item
--@code{coff_mangle_symbols}
--@end itemize
--This routine runs though the provided symbol table and uses
--the offsets generated by the previous pass and the pointers
--generated when the symbol table was read in to create the
--structured hierarchy required by coff. It changes each pointer
--to a symbol into the index into the symbol table of the asymbol.
--
--@itemize @bullet
--
--@item
--@code{coff_write_symbols}
--@end itemize
--This routine runs through the symbol table and patches up the
--symbols from their internal form into the coff way, calls the
--bit twiddlers, and writes out the table to the file.
--
--@findex coff_symbol_type
--@subsubsection @code{coff_symbol_type}
--@strong{Description}@*
--The hidden information for an @code{asymbol} is described in a
--@code{combined_entry_type}:
--
--
--@example
--
--typedef struct coff_ptr_struct
--@{
-- /* Remembers the offset from the first symbol in the file for
-- this symbol. Generated by coff_renumber_symbols. */
-- unsigned int offset;
--
-- /* Should the value of this symbol be renumbered. Used for
-- XCOFF C_BSTAT symbols. Set by coff_slurp_symbol_table. */
-- unsigned int fix_value : 1;
--
-- /* Should the tag field of this symbol be renumbered.
-- Created by coff_pointerize_aux. */
-- unsigned int fix_tag : 1;
--
-- /* Should the endidx field of this symbol be renumbered.
-- Created by coff_pointerize_aux. */
-- unsigned int fix_end : 1;
--
-- /* Should the x_csect.x_scnlen field be renumbered.
-- Created by coff_pointerize_aux. */
-- unsigned int fix_scnlen : 1;
--
-- /* Fix up an XCOFF C_BINCL/C_EINCL symbol. The value is the
-- index into the line number entries. Set by coff_slurp_symbol_table. */
-- unsigned int fix_line : 1;
--
-- /* The container for the symbol structure as read and translated
-- from the file. */
-- union
-- @{
-- union internal_auxent auxent;
-- struct internal_syment syment;
-- @} u;
--@} combined_entry_type;
--
--
--/* Each canonical asymbol really looks like this: */
--
--typedef struct coff_symbol_struct
--@{
-- /* The actual symbol which the rest of BFD works with */
-- asymbol symbol;
--
-- /* A pointer to the hidden information for this symbol */
-- combined_entry_type *native;
--
-- /* A pointer to the linenumber information for this symbol */
-- struct lineno_cache_entry *lineno;
--
-- /* Have the line numbers been relocated yet ? */
-- bfd_boolean done_lineno;
--@} coff_symbol_type;
--@end example
--@findex bfd_coff_backend_data
--@subsubsection @code{bfd_coff_backend_data}
--
--@example
--/* COFF symbol classifications. */
--
--enum coff_symbol_classification
--@{
-- /* Global symbol. */
-- COFF_SYMBOL_GLOBAL,
-- /* Common symbol. */
-- COFF_SYMBOL_COMMON,
-- /* Undefined symbol. */
-- COFF_SYMBOL_UNDEFINED,
-- /* Local symbol. */
-- COFF_SYMBOL_LOCAL,
-- /* PE section symbol. */
-- COFF_SYMBOL_PE_SECTION
--@};
--
--@end example
--Special entry points for gdb to swap in coff symbol table parts:
--@example
--typedef struct
--@{
-- void (*_bfd_coff_swap_aux_in)
-- (bfd *, void *, int, int, int, int, void *);
--
-- void (*_bfd_coff_swap_sym_in)
-- (bfd *, void *, void *);
--
-- void (*_bfd_coff_swap_lineno_in)
-- (bfd *, void *, void *);
--
-- unsigned int (*_bfd_coff_swap_aux_out)
-- (bfd *, void *, int, int, int, int, void *);
--
-- unsigned int (*_bfd_coff_swap_sym_out)
-- (bfd *, void *, void *);
--
-- unsigned int (*_bfd_coff_swap_lineno_out)
-- (bfd *, void *, void *);
--
-- unsigned int (*_bfd_coff_swap_reloc_out)
-- (bfd *, void *, void *);
--
-- unsigned int (*_bfd_coff_swap_filehdr_out)
-- (bfd *, void *, void *);
--
-- unsigned int (*_bfd_coff_swap_aouthdr_out)
-- (bfd *, void *, void *);
--
-- unsigned int (*_bfd_coff_swap_scnhdr_out)
-- (bfd *, void *, void *);
--
-- unsigned int _bfd_filhsz;
-- unsigned int _bfd_aoutsz;
-- unsigned int _bfd_scnhsz;
-- unsigned int _bfd_symesz;
-- unsigned int _bfd_auxesz;
-- unsigned int _bfd_relsz;
-- unsigned int _bfd_linesz;
-- unsigned int _bfd_filnmlen;
-- bfd_boolean _bfd_coff_long_filenames;
--
-- bfd_boolean _bfd_coff_long_section_names;
-- bfd_boolean (*_bfd_coff_set_long_section_names)
-- (bfd *, int);
--
-- unsigned int _bfd_coff_default_section_alignment_power;
-- bfd_boolean _bfd_coff_force_symnames_in_strings;
-- unsigned int _bfd_coff_debug_string_prefix_length;
--
-- void (*_bfd_coff_swap_filehdr_in)
-- (bfd *, void *, void *);
--
-- void (*_bfd_coff_swap_aouthdr_in)
-- (bfd *, void *, void *);
--
-- void (*_bfd_coff_swap_scnhdr_in)
-- (bfd *, void *, void *);
--
-- void (*_bfd_coff_swap_reloc_in)
-- (bfd *abfd, void *, void *);
--
-- bfd_boolean (*_bfd_coff_bad_format_hook)
-- (bfd *, void *);
--
-- bfd_boolean (*_bfd_coff_set_arch_mach_hook)
-- (bfd *, void *);
--
-- void * (*_bfd_coff_mkobject_hook)
-- (bfd *, void *, void *);
--
-- bfd_boolean (*_bfd_styp_to_sec_flags_hook)
-- (bfd *, void *, const char *, asection *, flagword *);
--
-- void (*_bfd_set_alignment_hook)
-- (bfd *, asection *, void *);
--
-- bfd_boolean (*_bfd_coff_slurp_symbol_table)
-- (bfd *);
--
-- bfd_boolean (*_bfd_coff_symname_in_debug)
-- (bfd *, struct internal_syment *);
--
-- bfd_boolean (*_bfd_coff_pointerize_aux_hook)
-- (bfd *, combined_entry_type *, combined_entry_type *,
-- unsigned int, combined_entry_type *);
--
-- bfd_boolean (*_bfd_coff_print_aux)
-- (bfd *, FILE *, combined_entry_type *, combined_entry_type *,
-- combined_entry_type *, unsigned int);
--
-- void (*_bfd_coff_reloc16_extra_cases)
-- (bfd *, struct bfd_link_info *, struct bfd_link_order *, arelent *,
-- bfd_byte *, unsigned int *, unsigned int *);
--
-- int (*_bfd_coff_reloc16_estimate)
-- (bfd *, asection *, arelent *, unsigned int,
-- struct bfd_link_info *);
--
-- enum coff_symbol_classification (*_bfd_coff_classify_symbol)
-- (bfd *, struct internal_syment *);
--
-- bfd_boolean (*_bfd_coff_compute_section_file_positions)
-- (bfd *);
--
-- bfd_boolean (*_bfd_coff_start_final_link)
-- (bfd *, struct bfd_link_info *);
--
-- bfd_boolean (*_bfd_coff_relocate_section)
-- (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
-- struct internal_reloc *, struct internal_syment *, asection **);
--
-- reloc_howto_type *(*_bfd_coff_rtype_to_howto)
-- (bfd *, asection *, struct internal_reloc *,
-- struct coff_link_hash_entry *, struct internal_syment *,
-- bfd_vma *);
--
-- bfd_boolean (*_bfd_coff_adjust_symndx)
-- (bfd *, struct bfd_link_info *, bfd *, asection *,
-- struct internal_reloc *, bfd_boolean *);
--
-- bfd_boolean (*_bfd_coff_link_add_one_symbol)
-- (struct bfd_link_info *, bfd *, const char *, flagword,
-- asection *, bfd_vma, const char *, bfd_boolean, bfd_boolean,
-- struct bfd_link_hash_entry **);
--
-- bfd_boolean (*_bfd_coff_link_output_has_begun)
-- (bfd *, struct coff_final_link_info *);
--
-- bfd_boolean (*_bfd_coff_final_link_postscript)
-- (bfd *, struct coff_final_link_info *);
--
-- bfd_boolean (*_bfd_coff_print_pdata)
-- (bfd *, void *);
--
--@} bfd_coff_backend_data;
--
--#define coff_backend_info(abfd) \
-- ((bfd_coff_backend_data *) (abfd)->xvec->backend_data)
--
--#define bfd_coff_swap_aux_in(a,e,t,c,ind,num,i) \
-- ((coff_backend_info (a)->_bfd_coff_swap_aux_in) (a,e,t,c,ind,num,i))
--
--#define bfd_coff_swap_sym_in(a,e,i) \
-- ((coff_backend_info (a)->_bfd_coff_swap_sym_in) (a,e,i))
--
--#define bfd_coff_swap_lineno_in(a,e,i) \
-- ((coff_backend_info ( a)->_bfd_coff_swap_lineno_in) (a,e,i))
--
--#define bfd_coff_swap_reloc_out(abfd, i, o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_reloc_out) (abfd, i, o))
--
--#define bfd_coff_swap_lineno_out(abfd, i, o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_lineno_out) (abfd, i, o))
--
--#define bfd_coff_swap_aux_out(a,i,t,c,ind,num,o) \
-- ((coff_backend_info (a)->_bfd_coff_swap_aux_out) (a,i,t,c,ind,num,o))
--
--#define bfd_coff_swap_sym_out(abfd, i,o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_sym_out) (abfd, i, o))
--
--#define bfd_coff_swap_scnhdr_out(abfd, i,o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_scnhdr_out) (abfd, i, o))
--
--#define bfd_coff_swap_filehdr_out(abfd, i,o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_filehdr_out) (abfd, i, o))
--
--#define bfd_coff_swap_aouthdr_out(abfd, i,o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_aouthdr_out) (abfd, i, o))
--
--#define bfd_coff_filhsz(abfd) (coff_backend_info (abfd)->_bfd_filhsz)
--#define bfd_coff_aoutsz(abfd) (coff_backend_info (abfd)->_bfd_aoutsz)
--#define bfd_coff_scnhsz(abfd) (coff_backend_info (abfd)->_bfd_scnhsz)
--#define bfd_coff_symesz(abfd) (coff_backend_info (abfd)->_bfd_symesz)
--#define bfd_coff_auxesz(abfd) (coff_backend_info (abfd)->_bfd_auxesz)
--#define bfd_coff_relsz(abfd) (coff_backend_info (abfd)->_bfd_relsz)
--#define bfd_coff_linesz(abfd) (coff_backend_info (abfd)->_bfd_linesz)
--#define bfd_coff_filnmlen(abfd) (coff_backend_info (abfd)->_bfd_filnmlen)
--#define bfd_coff_long_filenames(abfd) \
-- (coff_backend_info (abfd)->_bfd_coff_long_filenames)
--#define bfd_coff_long_section_names(abfd) \
-- (coff_backend_info (abfd)->_bfd_coff_long_section_names)
--#define bfd_coff_set_long_section_names(abfd, enable) \
-- ((coff_backend_info (abfd)->_bfd_coff_set_long_section_names) (abfd, enable))
--#define bfd_coff_default_section_alignment_power(abfd) \
-- (coff_backend_info (abfd)->_bfd_coff_default_section_alignment_power)
--#define bfd_coff_swap_filehdr_in(abfd, i,o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_filehdr_in) (abfd, i, o))
--
--#define bfd_coff_swap_aouthdr_in(abfd, i,o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_aouthdr_in) (abfd, i, o))
--
--#define bfd_coff_swap_scnhdr_in(abfd, i,o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_scnhdr_in) (abfd, i, o))
--
--#define bfd_coff_swap_reloc_in(abfd, i, o) \
-- ((coff_backend_info (abfd)->_bfd_coff_swap_reloc_in) (abfd, i, o))
--
--#define bfd_coff_bad_format_hook(abfd, filehdr) \
-- ((coff_backend_info (abfd)->_bfd_coff_bad_format_hook) (abfd, filehdr))
--
--#define bfd_coff_set_arch_mach_hook(abfd, filehdr)\
-- ((coff_backend_info (abfd)->_bfd_coff_set_arch_mach_hook) (abfd, filehdr))
--#define bfd_coff_mkobject_hook(abfd, filehdr, aouthdr)\
-- ((coff_backend_info (abfd)->_bfd_coff_mkobject_hook)\
-- (abfd, filehdr, aouthdr))
--
--#define bfd_coff_styp_to_sec_flags_hook(abfd, scnhdr, name, section, flags_ptr)\
-- ((coff_backend_info (abfd)->_bfd_styp_to_sec_flags_hook)\
-- (abfd, scnhdr, name, section, flags_ptr))
--
--#define bfd_coff_set_alignment_hook(abfd, sec, scnhdr)\
-- ((coff_backend_info (abfd)->_bfd_set_alignment_hook) (abfd, sec, scnhdr))
--
--#define bfd_coff_slurp_symbol_table(abfd)\
-- ((coff_backend_info (abfd)->_bfd_coff_slurp_symbol_table) (abfd))
--
--#define bfd_coff_symname_in_debug(abfd, sym)\
-- ((coff_backend_info (abfd)->_bfd_coff_symname_in_debug) (abfd, sym))
--
--#define bfd_coff_force_symnames_in_strings(abfd)\
-- (coff_backend_info (abfd)->_bfd_coff_force_symnames_in_strings)
--
--#define bfd_coff_debug_string_prefix_length(abfd)\
-- (coff_backend_info (abfd)->_bfd_coff_debug_string_prefix_length)
--
--#define bfd_coff_print_aux(abfd, file, base, symbol, aux, indaux)\
-- ((coff_backend_info (abfd)->_bfd_coff_print_aux)\
-- (abfd, file, base, symbol, aux, indaux))
--
--#define bfd_coff_reloc16_extra_cases(abfd, link_info, link_order,\
-- reloc, data, src_ptr, dst_ptr)\
-- ((coff_backend_info (abfd)->_bfd_coff_reloc16_extra_cases)\
-- (abfd, link_info, link_order, reloc, data, src_ptr, dst_ptr))
--
--#define bfd_coff_reloc16_estimate(abfd, section, reloc, shrink, link_info)\
-- ((coff_backend_info (abfd)->_bfd_coff_reloc16_estimate)\
-- (abfd, section, reloc, shrink, link_info))
--
--#define bfd_coff_classify_symbol(abfd, sym)\
-- ((coff_backend_info (abfd)->_bfd_coff_classify_symbol)\
-- (abfd, sym))
--
--#define bfd_coff_compute_section_file_positions(abfd)\
-- ((coff_backend_info (abfd)->_bfd_coff_compute_section_file_positions)\
-- (abfd))
--
--#define bfd_coff_start_final_link(obfd, info)\
-- ((coff_backend_info (obfd)->_bfd_coff_start_final_link)\
-- (obfd, info))
--#define bfd_coff_relocate_section(obfd,info,ibfd,o,con,rel,isyms,secs)\
-- ((coff_backend_info (ibfd)->_bfd_coff_relocate_section)\
-- (obfd, info, ibfd, o, con, rel, isyms, secs))
--#define bfd_coff_rtype_to_howto(abfd, sec, rel, h, sym, addendp)\
-- ((coff_backend_info (abfd)->_bfd_coff_rtype_to_howto)\
-- (abfd, sec, rel, h, sym, addendp))
--#define bfd_coff_adjust_symndx(obfd, info, ibfd, sec, rel, adjustedp)\
-- ((coff_backend_info (abfd)->_bfd_coff_adjust_symndx)\
-- (obfd, info, ibfd, sec, rel, adjustedp))
--#define bfd_coff_link_add_one_symbol(info, abfd, name, flags, section,\
-- value, string, cp, coll, hashp)\
-- ((coff_backend_info (abfd)->_bfd_coff_link_add_one_symbol)\
-- (info, abfd, name, flags, section, value, string, cp, coll, hashp))
--
--#define bfd_coff_link_output_has_begun(a,p) \
-- ((coff_backend_info (a)->_bfd_coff_link_output_has_begun) (a, p))
--#define bfd_coff_final_link_postscript(a,p) \
-- ((coff_backend_info (a)->_bfd_coff_final_link_postscript) (a, p))
--
--#define bfd_coff_have_print_pdata(a) \
-- (coff_backend_info (a)->_bfd_coff_print_pdata)
--#define bfd_coff_print_pdata(a,p) \
-- ((coff_backend_info (a)->_bfd_coff_print_pdata) (a, p))
--
--/* Macro: Returns true if the bfd is a PE executable as opposed to a
-- PE object file. */
--#define bfd_pei_p(abfd) \
-- (CONST_STRNEQ ((abfd)->xvec->name, "pei-"))
--@end example
--@subsubsection Writing relocations
--To write relocations, the back end steps though the
--canonical relocation table and create an
--@code{internal_reloc}. The symbol index to use is removed from
--the @code{offset} field in the symbol table supplied. The
--address comes directly from the sum of the section base
--address and the relocation offset; the type is dug directly
--from the howto field. Then the @code{internal_reloc} is
--swapped into the shape of an @code{external_reloc} and written
--out to disk.
--
--@subsubsection Reading linenumbers
--Creating the linenumber table is done by reading in the entire
--coff linenumber table, and creating another table for internal use.
--
--A coff linenumber table is structured so that each function
--is marked as having a line number of 0. Each line within the
--function is an offset from the first line in the function. The
--base of the line number information for the table is stored in
--the symbol associated with the function.
--
--Note: The PE format uses line number 0 for a flag indicating a
--new source file.
--
--The information is copied from the external to the internal
--table, and each symbol which marks a function is marked by
--pointing its...
--
--How does this work ?
--
--@subsubsection Reading relocations
--Coff relocations are easily transformed into the internal BFD form
--(@code{arelent}).
--
--Reading a coff relocation table is done in the following stages:
--
--@itemize @bullet
--
--@item
--Read the entire coff relocation table into memory.
--
--@item
--Process each relocation in turn; first swap it from the
--external to the internal form.
--
--@item
--Turn the symbol referenced in the relocation's symbol index
--into a pointer into the canonical symbol table.
--This table is the same as the one returned by a call to
--@code{bfd_canonicalize_symtab}. The back end will call that
--routine and save the result if a canonicalization hasn't been done.
--
--@item
--The reloc index is turned into a pointer to a howto
--structure, in a back end specific way. For instance, the 386
--and 960 use the @code{r_type} to directly produce an index
--into a howto table vector; the 88k subtracts a number from the
--@code{r_type} field and creates an addend field.
--@end itemize
--
-diff -Nur binutils-2.24.orig/bfd/doc/core.texi binutils-2.24/bfd/doc/core.texi
---- binutils-2.24.orig/bfd/doc/core.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/core.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,70 +0,0 @@
--@section Core files
--
--
--@subsection Core file functions
--
--
--@strong{Description}@*
--These are functions pertaining to core files.
--
--@findex bfd_core_file_failing_command
--@subsubsection @code{bfd_core_file_failing_command}
--@strong{Synopsis}
--@example
--const char *bfd_core_file_failing_command (bfd *abfd);
--@end example
--@strong{Description}@*
--Return a read-only string explaining which program was running
--when it failed and produced the core file @var{abfd}.
--
--@findex bfd_core_file_failing_signal
--@subsubsection @code{bfd_core_file_failing_signal}
--@strong{Synopsis}
--@example
--int bfd_core_file_failing_signal (bfd *abfd);
--@end example
--@strong{Description}@*
--Returns the signal number which caused the core dump which
--generated the file the BFD @var{abfd} is attached to.
--
--@findex bfd_core_file_pid
--@subsubsection @code{bfd_core_file_pid}
--@strong{Synopsis}
--@example
--int bfd_core_file_pid (bfd *abfd);
--@end example
--@strong{Description}@*
--Returns the PID of the process the core dump the BFD
--@var{abfd} is attached to was generated from.
--
--@findex core_file_matches_executable_p
--@subsubsection @code{core_file_matches_executable_p}
--@strong{Synopsis}
--@example
--bfd_boolean core_file_matches_executable_p
-- (bfd *core_bfd, bfd *exec_bfd);
--@end example
--@strong{Description}@*
--Return @code{TRUE} if the core file attached to @var{core_bfd}
--was generated by a run of the executable file attached to
--@var{exec_bfd}, @code{FALSE} otherwise.
--
--@findex generic_core_file_matches_executable_p
--@subsubsection @code{generic_core_file_matches_executable_p}
--@strong{Synopsis}
--@example
--bfd_boolean generic_core_file_matches_executable_p
-- (bfd *core_bfd, bfd *exec_bfd);
--@end example
--@strong{Description}@*
--Return TRUE if the core file attached to @var{core_bfd}
--was generated by a run of the executable file attached
--to @var{exec_bfd}. The match is based on executable
--basenames only.
--
--Note: When not able to determine the core file failing
--command or the executable name, we still return TRUE even
--though we're not sure that core file and executable match.
--This is to avoid generating a false warning in situations
--where we really don't know whether they match or not.
--
-diff -Nur binutils-2.24.orig/bfd/doc/elf.texi binutils-2.24/bfd/doc/elf.texi
---- binutils-2.24.orig/bfd/doc/elf.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/elf.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,9 +0,0 @@
--@section ELF backends
--BFD support for ELF formats is being worked on.
--Currently, the best supported back ends are for sparc and i386
--(running svr4 or Solaris 2).
--
--Documentation of the internals of the support code still needs
--to be written. The code is changing quickly enough that we
--haven't bothered yet.
--
-diff -Nur binutils-2.24.orig/bfd/doc/format.texi binutils-2.24/bfd/doc/format.texi
---- binutils-2.24.orig/bfd/doc/format.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/format.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,112 +0,0 @@
--@section File formats
--A format is a BFD concept of high level file contents type. The
--formats supported by BFD are:
--
--@itemize @bullet
--
--@item
--@code{bfd_object}
--@end itemize
--The BFD may contain data, symbols, relocations and debug info.
--
--@itemize @bullet
--
--@item
--@code{bfd_archive}
--@end itemize
--The BFD contains other BFDs and an optional index.
--
--@itemize @bullet
--
--@item
--@code{bfd_core}
--@end itemize
--The BFD contains the result of an executable core dump.
--
--@subsection File format functions
--
--
--@findex bfd_check_format
--@subsubsection @code{bfd_check_format}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_check_format (bfd *abfd, bfd_format format);
--@end example
--@strong{Description}@*
--Verify if the file attached to the BFD @var{abfd} is compatible
--with the format @var{format} (i.e., one of @code{bfd_object},
--@code{bfd_archive} or @code{bfd_core}).
--
--If the BFD has been set to a specific target before the
--call, only the named target and format combination is
--checked. If the target has not been set, or has been set to
--@code{default}, then all the known target backends is
--interrogated to determine a match. If the default target
--matches, it is used. If not, exactly one target must recognize
--the file, or an error results.
--
--The function returns @code{TRUE} on success, otherwise @code{FALSE}
--with one of the following error codes:
--
--@itemize @bullet
--
--@item
--@code{bfd_error_invalid_operation} -
--if @code{format} is not one of @code{bfd_object}, @code{bfd_archive} or
--@code{bfd_core}.
--
--@item
--@code{bfd_error_system_call} -
--if an error occured during a read - even some file mismatches
--can cause bfd_error_system_calls.
--
--@item
--@code{file_not_recognised} -
--none of the backends recognised the file format.
--
--@item
--@code{bfd_error_file_ambiguously_recognized} -
--more than one backend recognised the file format.
--@end itemize
--
--@findex bfd_check_format_matches
--@subsubsection @code{bfd_check_format_matches}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_check_format_matches
-- (bfd *abfd, bfd_format format, char ***matching);
--@end example
--@strong{Description}@*
--Like @code{bfd_check_format}, except when it returns FALSE with
--@code{bfd_errno} set to @code{bfd_error_file_ambiguously_recognized}. In that
--case, if @var{matching} is not NULL, it will be filled in with
--a NULL-terminated list of the names of the formats that matched,
--allocated with @code{malloc}.
--Then the user may choose a format and try again.
--
--When done with the list that @var{matching} points to, the caller
--should free it.
--
--@findex bfd_set_format
--@subsubsection @code{bfd_set_format}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_set_format (bfd *abfd, bfd_format format);
--@end example
--@strong{Description}@*
--This function sets the file format of the BFD @var{abfd} to the
--format @var{format}. If the target set in the BFD does not
--support the format requested, the format is invalid, or the BFD
--is not open for writing, then an error occurs.
--
--@findex bfd_format_string
--@subsubsection @code{bfd_format_string}
--@strong{Synopsis}
--@example
--const char *bfd_format_string (bfd_format format);
--@end example
--@strong{Description}@*
--Return a pointer to a const string
--@code{invalid}, @code{object}, @code{archive}, @code{core}, or @code{unknown},
--depending upon the value of @var{format}.
--
-diff -Nur binutils-2.24.orig/bfd/doc/hash.texi binutils-2.24/bfd/doc/hash.texi
---- binutils-2.24.orig/bfd/doc/hash.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/hash.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,247 +0,0 @@
--@section Hash Tables
--@cindex Hash tables
--BFD provides a simple set of hash table functions. Routines
--are provided to initialize a hash table, to free a hash table,
--to look up a string in a hash table and optionally create an
--entry for it, and to traverse a hash table. There is
--currently no routine to delete an string from a hash table.
--
--The basic hash table does not permit any data to be stored
--with a string. However, a hash table is designed to present a
--base class from which other types of hash tables may be
--derived. These derived types may store additional information
--with the string. Hash tables were implemented in this way,
--rather than simply providing a data pointer in a hash table
--entry, because they were designed for use by the linker back
--ends. The linker may create thousands of hash table entries,
--and the overhead of allocating private data and storing and
--following pointers becomes noticeable.
--
--The basic hash table code is in @code{hash.c}.
--
--@menu
--* Creating and Freeing a Hash Table::
--* Looking Up or Entering a String::
--* Traversing a Hash Table::
--* Deriving a New Hash Table Type::
--@end menu
--
--@node Creating and Freeing a Hash Table, Looking Up or Entering a String, Hash Tables, Hash Tables
--@subsection Creating and freeing a hash table
--@findex bfd_hash_table_init
--@findex bfd_hash_table_init_n
--To create a hash table, create an instance of a @code{struct
--bfd_hash_table} (defined in @code{bfd.h}) and call
--@code{bfd_hash_table_init} (if you know approximately how many
--entries you will need, the function @code{bfd_hash_table_init_n},
--which takes a @var{size} argument, may be used).
--@code{bfd_hash_table_init} returns @code{FALSE} if some sort of
--error occurs.
--
--@findex bfd_hash_newfunc
--The function @code{bfd_hash_table_init} take as an argument a
--function to use to create new entries. For a basic hash
--table, use the function @code{bfd_hash_newfunc}. @xref{Deriving
--a New Hash Table Type}, for why you would want to use a
--different value for this argument.
--
--@findex bfd_hash_allocate
--@code{bfd_hash_table_init} will create an objalloc which will be
--used to allocate new entries. You may allocate memory on this
--objalloc using @code{bfd_hash_allocate}.
--
--@findex bfd_hash_table_free
--Use @code{bfd_hash_table_free} to free up all the memory that has
--been allocated for a hash table. This will not free up the
--@code{struct bfd_hash_table} itself, which you must provide.
--
--@findex bfd_hash_set_default_size
--Use @code{bfd_hash_set_default_size} to set the default size of
--hash table to use.
--
--@node Looking Up or Entering a String, Traversing a Hash Table, Creating and Freeing a Hash Table, Hash Tables
--@subsection Looking up or entering a string
--@findex bfd_hash_lookup
--The function @code{bfd_hash_lookup} is used both to look up a
--string in the hash table and to create a new entry.
--
--If the @var{create} argument is @code{FALSE}, @code{bfd_hash_lookup}
--will look up a string. If the string is found, it will
--returns a pointer to a @code{struct bfd_hash_entry}. If the
--string is not found in the table @code{bfd_hash_lookup} will
--return @code{NULL}. You should not modify any of the fields in
--the returns @code{struct bfd_hash_entry}.
--
--If the @var{create} argument is @code{TRUE}, the string will be
--entered into the hash table if it is not already there.
--Either way a pointer to a @code{struct bfd_hash_entry} will be
--returned, either to the existing structure or to a newly
--created one. In this case, a @code{NULL} return means that an
--error occurred.
--
--If the @var{create} argument is @code{TRUE}, and a new entry is
--created, the @var{copy} argument is used to decide whether to
--copy the string onto the hash table objalloc or not. If
--@var{copy} is passed as @code{FALSE}, you must be careful not to
--deallocate or modify the string as long as the hash table
--exists.
--
--@node Traversing a Hash Table, Deriving a New Hash Table Type, Looking Up or Entering a String, Hash Tables
--@subsection Traversing a hash table
--@findex bfd_hash_traverse
--The function @code{bfd_hash_traverse} may be used to traverse a
--hash table, calling a function on each element. The traversal
--is done in a random order.
--
--@code{bfd_hash_traverse} takes as arguments a function and a
--generic @code{void *} pointer. The function is called with a
--hash table entry (a @code{struct bfd_hash_entry *}) and the
--generic pointer passed to @code{bfd_hash_traverse}. The function
--must return a @code{boolean} value, which indicates whether to
--continue traversing the hash table. If the function returns
--@code{FALSE}, @code{bfd_hash_traverse} will stop the traversal and
--return immediately.
--
--@node Deriving a New Hash Table Type, , Traversing a Hash Table, Hash Tables
--@subsection Deriving a new hash table type
--Many uses of hash tables want to store additional information
--which each entry in the hash table. Some also find it
--convenient to store additional information with the hash table
--itself. This may be done using a derived hash table.
--
--Since C is not an object oriented language, creating a derived
--hash table requires sticking together some boilerplate
--routines with a few differences specific to the type of hash
--table you want to create.
--
--An example of a derived hash table is the linker hash table.
--The structures for this are defined in @code{bfdlink.h}. The
--functions are in @code{linker.c}.
--
--You may also derive a hash table from an already derived hash
--table. For example, the a.out linker backend code uses a hash
--table derived from the linker hash table.
--
--@menu
--* Define the Derived Structures::
--* Write the Derived Creation Routine::
--* Write Other Derived Routines::
--@end menu
--
--@node Define the Derived Structures, Write the Derived Creation Routine, Deriving a New Hash Table Type, Deriving a New Hash Table Type
--@subsubsection Define the derived structures
--You must define a structure for an entry in the hash table,
--and a structure for the hash table itself.
--
--The first field in the structure for an entry in the hash
--table must be of the type used for an entry in the hash table
--you are deriving from. If you are deriving from a basic hash
--table this is @code{struct bfd_hash_entry}, which is defined in
--@code{bfd.h}. The first field in the structure for the hash
--table itself must be of the type of the hash table you are
--deriving from itself. If you are deriving from a basic hash
--table, this is @code{struct bfd_hash_table}.
--
--For example, the linker hash table defines @code{struct
--bfd_link_hash_entry} (in @code{bfdlink.h}). The first field,
--@code{root}, is of type @code{struct bfd_hash_entry}. Similarly,
--the first field in @code{struct bfd_link_hash_table}, @code{table},
--is of type @code{struct bfd_hash_table}.
--
--@node Write the Derived Creation Routine, Write Other Derived Routines, Define the Derived Structures, Deriving a New Hash Table Type
--@subsubsection Write the derived creation routine
--You must write a routine which will create and initialize an
--entry in the hash table. This routine is passed as the
--function argument to @code{bfd_hash_table_init}.
--
--In order to permit other hash tables to be derived from the
--hash table you are creating, this routine must be written in a
--standard way.
--
--The first argument to the creation routine is a pointer to a
--hash table entry. This may be @code{NULL}, in which case the
--routine should allocate the right amount of space. Otherwise
--the space has already been allocated by a hash table type
--derived from this one.
--
--After allocating space, the creation routine must call the
--creation routine of the hash table type it is derived from,
--passing in a pointer to the space it just allocated. This
--will initialize any fields used by the base hash table.
--
--Finally the creation routine must initialize any local fields
--for the new hash table type.
--
--Here is a boilerplate example of a creation routine.
--@var{function_name} is the name of the routine.
--@var{entry_type} is the type of an entry in the hash table you
--are creating. @var{base_newfunc} is the name of the creation
--routine of the hash table type your hash table is derived
--from.
--
--
--@example
--struct bfd_hash_entry *
--@var{function_name} (struct bfd_hash_entry *entry,
-- struct bfd_hash_table *table,
-- const char *string)
--@{
-- struct @var{entry_type} *ret = (@var{entry_type} *) entry;
--
-- /* Allocate the structure if it has not already been allocated by a
-- derived class. */
-- if (ret == NULL)
-- @{
-- ret = bfd_hash_allocate (table, sizeof (* ret));
-- if (ret == NULL)
-- return NULL;
-- @}
--
-- /* Call the allocation method of the base class. */
-- ret = ((@var{entry_type} *)
-- @var{base_newfunc} ((struct bfd_hash_entry *) ret, table, string));
--
-- /* Initialize the local fields here. */
--
-- return (struct bfd_hash_entry *) ret;
--@}
--@end example
--@strong{Description}@*
--The creation routine for the linker hash table, which is in
--@code{linker.c}, looks just like this example.
--@var{function_name} is @code{_bfd_link_hash_newfunc}.
--@var{entry_type} is @code{struct bfd_link_hash_entry}.
--@var{base_newfunc} is @code{bfd_hash_newfunc}, the creation
--routine for a basic hash table.
--
--@code{_bfd_link_hash_newfunc} also initializes the local fields
--in a linker hash table entry: @code{type}, @code{written} and
--@code{next}.
--
--@node Write Other Derived Routines, , Write the Derived Creation Routine, Deriving a New Hash Table Type
--@subsubsection Write other derived routines
--You will want to write other routines for your new hash table,
--as well.
--
--You will want an initialization routine which calls the
--initialization routine of the hash table you are deriving from
--and initializes any other local fields. For the linker hash
--table, this is @code{_bfd_link_hash_table_init} in @code{linker.c}.
--
--You will want a lookup routine which calls the lookup routine
--of the hash table you are deriving from and casts the result.
--The linker hash table uses @code{bfd_link_hash_lookup} in
--@code{linker.c} (this actually takes an additional argument which
--it uses to decide how to return the looked up value).
--
--You may want a traversal routine. This should just call the
--traversal routine of the hash table you are deriving from with
--appropriate casts. The linker hash table uses
--@code{bfd_link_hash_traverse} in @code{linker.c}.
--
--These routines may simply be defined as macros. For example,
--the a.out backend linker hash table, which is derived from the
--linker hash table, uses macros for the lookup and traversal
--routines. These are @code{aout_link_hash_lookup} and
--@code{aout_link_hash_traverse} in aoutx.h.
--
-diff -Nur binutils-2.24.orig/bfd/doc/init.texi binutils-2.24/bfd/doc/init.texi
---- binutils-2.24.orig/bfd/doc/init.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/init.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,16 +0,0 @@
--@section Initialization
--
--
--@subsection Initialization functions
--These are the functions that handle initializing a BFD.
--
--@findex bfd_init
--@subsubsection @code{bfd_init}
--@strong{Synopsis}
--@example
--void bfd_init (void);
--@end example
--@strong{Description}@*
--This routine must be called before any other BFD function to
--initialize magical internal data structures.
--
-diff -Nur binutils-2.24.orig/bfd/doc/libbfd.texi binutils-2.24/bfd/doc/libbfd.texi
---- binutils-2.24.orig/bfd/doc/libbfd.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/libbfd.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,179 +0,0 @@
--@section Implementation details
--
--
--@subsection Internal functions
--
--
--@strong{Description}@*
--These routines are used within BFD.
--They are not intended for export, but are documented here for
--completeness.
--
--@findex bfd_write_bigendian_4byte_int
--@subsubsection @code{bfd_write_bigendian_4byte_int}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_write_bigendian_4byte_int (bfd *, unsigned int);
--@end example
--@strong{Description}@*
--Write a 4 byte integer @var{i} to the output BFD @var{abfd}, in big
--endian order regardless of what else is going on. This is useful in
--archives.
--
--@findex bfd_put_size
--@subsubsection @code{bfd_put_size}
--@findex bfd_get_size
--@subsubsection @code{bfd_get_size}
--@strong{Description}@*
--These macros as used for reading and writing raw data in
--sections; each access (except for bytes) is vectored through
--the target format of the BFD and mangled accordingly. The
--mangling performs any necessary endian translations and
--removes alignment restrictions. Note that types accepted and
--returned by these macros are identical so they can be swapped
--around in macros---for example, @file{libaout.h} defines @code{GET_WORD}
--to either @code{bfd_get_32} or @code{bfd_get_64}.
--
--In the put routines, @var{val} must be a @code{bfd_vma}. If we are on a
--system without prototypes, the caller is responsible for making
--sure that is true, with a cast if necessary. We don't cast
--them in the macro definitions because that would prevent @code{lint}
--or @code{gcc -Wall} from detecting sins such as passing a pointer.
--To detect calling these with less than a @code{bfd_vma}, use
--@code{gcc -Wconversion} on a host with 64 bit @code{bfd_vma}'s.
--@example
--
--/* Byte swapping macros for user section data. */
--
--#define bfd_put_8(abfd, val, ptr) \
-- ((void) (*((unsigned char *) (ptr)) = (val) & 0xff))
--#define bfd_put_signed_8 \
-- bfd_put_8
--#define bfd_get_8(abfd, ptr) \
-- (*(const unsigned char *) (ptr) & 0xff)
--#define bfd_get_signed_8(abfd, ptr) \
-- (((*(const unsigned char *) (ptr) & 0xff) ^ 0x80) - 0x80)
--
--#define bfd_put_16(abfd, val, ptr) \
-- BFD_SEND (abfd, bfd_putx16, ((val),(ptr)))
--#define bfd_put_signed_16 \
-- bfd_put_16
--#define bfd_get_16(abfd, ptr) \
-- BFD_SEND (abfd, bfd_getx16, (ptr))
--#define bfd_get_signed_16(abfd, ptr) \
-- BFD_SEND (abfd, bfd_getx_signed_16, (ptr))
--
--#define bfd_put_32(abfd, val, ptr) \
-- BFD_SEND (abfd, bfd_putx32, ((val),(ptr)))
--#define bfd_put_signed_32 \
-- bfd_put_32
--#define bfd_get_32(abfd, ptr) \
-- BFD_SEND (abfd, bfd_getx32, (ptr))
--#define bfd_get_signed_32(abfd, ptr) \
-- BFD_SEND (abfd, bfd_getx_signed_32, (ptr))
--
--#define bfd_put_64(abfd, val, ptr) \
-- BFD_SEND (abfd, bfd_putx64, ((val), (ptr)))
--#define bfd_put_signed_64 \
-- bfd_put_64
--#define bfd_get_64(abfd, ptr) \
-- BFD_SEND (abfd, bfd_getx64, (ptr))
--#define bfd_get_signed_64(abfd, ptr) \
-- BFD_SEND (abfd, bfd_getx_signed_64, (ptr))
--
--#define bfd_get(bits, abfd, ptr) \
-- ((bits) == 8 ? (bfd_vma) bfd_get_8 (abfd, ptr) \
-- : (bits) == 16 ? bfd_get_16 (abfd, ptr) \
-- : (bits) == 32 ? bfd_get_32 (abfd, ptr) \
-- : (bits) == 64 ? bfd_get_64 (abfd, ptr) \
-- : (abort (), (bfd_vma) - 1))
--
--#define bfd_put(bits, abfd, val, ptr) \
-- ((bits) == 8 ? bfd_put_8 (abfd, val, ptr) \
-- : (bits) == 16 ? bfd_put_16 (abfd, val, ptr) \
-- : (bits) == 32 ? bfd_put_32 (abfd, val, ptr) \
-- : (bits) == 64 ? bfd_put_64 (abfd, val, ptr) \
-- : (abort (), (void) 0))
--
--@end example
--
--@findex bfd_h_put_size
--@subsubsection @code{bfd_h_put_size}
--@strong{Description}@*
--These macros have the same function as their @code{bfd_get_x}
--brethren, except that they are used for removing information
--for the header records of object files. Believe it or not,
--some object files keep their header records in big endian
--order and their data in little endian order.
--@example
--
--/* Byte swapping macros for file header data. */
--
--#define bfd_h_put_8(abfd, val, ptr) \
-- bfd_put_8 (abfd, val, ptr)
--#define bfd_h_put_signed_8(abfd, val, ptr) \
-- bfd_put_8 (abfd, val, ptr)
--#define bfd_h_get_8(abfd, ptr) \
-- bfd_get_8 (abfd, ptr)
--#define bfd_h_get_signed_8(abfd, ptr) \
-- bfd_get_signed_8 (abfd, ptr)
--
--#define bfd_h_put_16(abfd, val, ptr) \
-- BFD_SEND (abfd, bfd_h_putx16, (val, ptr))
--#define bfd_h_put_signed_16 \
-- bfd_h_put_16
--#define bfd_h_get_16(abfd, ptr) \
-- BFD_SEND (abfd, bfd_h_getx16, (ptr))
--#define bfd_h_get_signed_16(abfd, ptr) \
-- BFD_SEND (abfd, bfd_h_getx_signed_16, (ptr))
--
--#define bfd_h_put_32(abfd, val, ptr) \
-- BFD_SEND (abfd, bfd_h_putx32, (val, ptr))
--#define bfd_h_put_signed_32 \
-- bfd_h_put_32
--#define bfd_h_get_32(abfd, ptr) \
-- BFD_SEND (abfd, bfd_h_getx32, (ptr))
--#define bfd_h_get_signed_32(abfd, ptr) \
-- BFD_SEND (abfd, bfd_h_getx_signed_32, (ptr))
--
--#define bfd_h_put_64(abfd, val, ptr) \
-- BFD_SEND (abfd, bfd_h_putx64, (val, ptr))
--#define bfd_h_put_signed_64 \
-- bfd_h_put_64
--#define bfd_h_get_64(abfd, ptr) \
-- BFD_SEND (abfd, bfd_h_getx64, (ptr))
--#define bfd_h_get_signed_64(abfd, ptr) \
-- BFD_SEND (abfd, bfd_h_getx_signed_64, (ptr))
--
--/* Aliases for the above, which should eventually go away. */
--
--#define H_PUT_64 bfd_h_put_64
--#define H_PUT_32 bfd_h_put_32
--#define H_PUT_16 bfd_h_put_16
--#define H_PUT_8 bfd_h_put_8
--#define H_PUT_S64 bfd_h_put_signed_64
--#define H_PUT_S32 bfd_h_put_signed_32
--#define H_PUT_S16 bfd_h_put_signed_16
--#define H_PUT_S8 bfd_h_put_signed_8
--#define H_GET_64 bfd_h_get_64
--#define H_GET_32 bfd_h_get_32
--#define H_GET_16 bfd_h_get_16
--#define H_GET_8 bfd_h_get_8
--#define H_GET_S64 bfd_h_get_signed_64
--#define H_GET_S32 bfd_h_get_signed_32
--#define H_GET_S16 bfd_h_get_signed_16
--#define H_GET_S8 bfd_h_get_signed_8
--
--
--@end example
--
--@findex bfd_log2
--@subsubsection @code{bfd_log2}
--@strong{Synopsis}
--@example
--unsigned int bfd_log2 (bfd_vma x);
--@end example
--@strong{Description}@*
--Return the log base 2 of the value supplied, rounded up. E.g., an
--@var{x} of 1025 returns 11. A @var{x} of 0 returns 0.
--
-diff -Nur binutils-2.24.orig/bfd/doc/linker.texi binutils-2.24/bfd/doc/linker.texi
---- binutils-2.24.orig/bfd/doc/linker.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/linker.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,432 +0,0 @@
--@section Linker Functions
--@cindex Linker
--The linker uses three special entry points in the BFD target
--vector. It is not necessary to write special routines for
--these entry points when creating a new BFD back end, since
--generic versions are provided. However, writing them can
--speed up linking and make it use significantly less runtime
--memory.
--
--The first routine creates a hash table used by the other
--routines. The second routine adds the symbols from an object
--file to the hash table. The third routine takes all the
--object files and links them together to create the output
--file. These routines are designed so that the linker proper
--does not need to know anything about the symbols in the object
--files that it is linking. The linker merely arranges the
--sections as directed by the linker script and lets BFD handle
--the details of symbols and relocs.
--
--The second routine and third routines are passed a pointer to
--a @code{struct bfd_link_info} structure (defined in
--@code{bfdlink.h}) which holds information relevant to the link,
--including the linker hash table (which was created by the
--first routine) and a set of callback functions to the linker
--proper.
--
--The generic linker routines are in @code{linker.c}, and use the
--header file @code{genlink.h}. As of this writing, the only back
--ends which have implemented versions of these routines are
--a.out (in @code{aoutx.h}) and ECOFF (in @code{ecoff.c}). The a.out
--routines are used as examples throughout this section.
--
--@menu
--* Creating a Linker Hash Table::
--* Adding Symbols to the Hash Table::
--* Performing the Final Link::
--@end menu
--
--@node Creating a Linker Hash Table, Adding Symbols to the Hash Table, Linker Functions, Linker Functions
--@subsection Creating a linker hash table
--@cindex _bfd_link_hash_table_create in target vector
--@cindex target vector (_bfd_link_hash_table_create)
--The linker routines must create a hash table, which must be
--derived from @code{struct bfd_link_hash_table} described in
--@code{bfdlink.c}. @xref{Hash Tables}, for information on how to
--create a derived hash table. This entry point is called using
--the target vector of the linker output file.
--
--The @code{_bfd_link_hash_table_create} entry point must allocate
--and initialize an instance of the desired hash table. If the
--back end does not require any additional information to be
--stored with the entries in the hash table, the entry point may
--simply create a @code{struct bfd_link_hash_table}. Most likely,
--however, some additional information will be needed.
--
--For example, with each entry in the hash table the a.out
--linker keeps the index the symbol has in the final output file
--(this index number is used so that when doing a relocatable
--link the symbol index used in the output file can be quickly
--filled in when copying over a reloc). The a.out linker code
--defines the required structures and functions for a hash table
--derived from @code{struct bfd_link_hash_table}. The a.out linker
--hash table is created by the function
--@code{NAME(aout,link_hash_table_create)}; it simply allocates
--space for the hash table, initializes it, and returns a
--pointer to it.
--
--When writing the linker routines for a new back end, you will
--generally not know exactly which fields will be required until
--you have finished. You should simply create a new hash table
--which defines no additional fields, and then simply add fields
--as they become necessary.
--
--@node Adding Symbols to the Hash Table, Performing the Final Link, Creating a Linker Hash Table, Linker Functions
--@subsection Adding symbols to the hash table
--@cindex _bfd_link_add_symbols in target vector
--@cindex target vector (_bfd_link_add_symbols)
--The linker proper will call the @code{_bfd_link_add_symbols}
--entry point for each object file or archive which is to be
--linked (typically these are the files named on the command
--line, but some may also come from the linker script). The
--entry point is responsible for examining the file. For an
--object file, BFD must add any relevant symbol information to
--the hash table. For an archive, BFD must determine which
--elements of the archive should be used and adding them to the
--link.
--
--The a.out version of this entry point is
--@code{NAME(aout,link_add_symbols)}.
--
--@menu
--* Differing file formats::
--* Adding symbols from an object file::
--* Adding symbols from an archive::
--@end menu
--
--@node Differing file formats, Adding symbols from an object file, Adding Symbols to the Hash Table, Adding Symbols to the Hash Table
--@subsubsection Differing file formats
--Normally all the files involved in a link will be of the same
--format, but it is also possible to link together different
--format object files, and the back end must support that. The
--@code{_bfd_link_add_symbols} entry point is called via the target
--vector of the file to be added. This has an important
--consequence: the function may not assume that the hash table
--is the type created by the corresponding
--@code{_bfd_link_hash_table_create} vector. All the
--@code{_bfd_link_add_symbols} function can assume about the hash
--table is that it is derived from @code{struct
--bfd_link_hash_table}.
--
--Sometimes the @code{_bfd_link_add_symbols} function must store
--some information in the hash table entry to be used by the
--@code{_bfd_final_link} function. In such a case the output bfd
--xvec must be checked to make sure that the hash table was
--created by an object file of the same format.
--
--The @code{_bfd_final_link} routine must be prepared to handle a
--hash entry without any extra information added by the
--@code{_bfd_link_add_symbols} function. A hash entry without
--extra information will also occur when the linker script
--directs the linker to create a symbol. Note that, regardless
--of how a hash table entry is added, all the fields will be
--initialized to some sort of null value by the hash table entry
--initialization function.
--
--See @code{ecoff_link_add_externals} for an example of how to
--check the output bfd before saving information (in this
--case, the ECOFF external symbol debugging information) in a
--hash table entry.
--
--@node Adding symbols from an object file, Adding symbols from an archive, Differing file formats, Adding Symbols to the Hash Table
--@subsubsection Adding symbols from an object file
--When the @code{_bfd_link_add_symbols} routine is passed an object
--file, it must add all externally visible symbols in that
--object file to the hash table. The actual work of adding the
--symbol to the hash table is normally handled by the function
--@code{_bfd_generic_link_add_one_symbol}. The
--@code{_bfd_link_add_symbols} routine is responsible for reading
--all the symbols from the object file and passing the correct
--information to @code{_bfd_generic_link_add_one_symbol}.
--
--The @code{_bfd_link_add_symbols} routine should not use
--@code{bfd_canonicalize_symtab} to read the symbols. The point of
--providing this routine is to avoid the overhead of converting
--the symbols into generic @code{asymbol} structures.
--
--@findex _bfd_generic_link_add_one_symbol
--@code{_bfd_generic_link_add_one_symbol} handles the details of
--combining common symbols, warning about multiple definitions,
--and so forth. It takes arguments which describe the symbol to
--add, notably symbol flags, a section, and an offset. The
--symbol flags include such things as @code{BSF_WEAK} or
--@code{BSF_INDIRECT}. The section is a section in the object
--file, or something like @code{bfd_und_section_ptr} for an undefined
--symbol or @code{bfd_com_section_ptr} for a common symbol.
--
--If the @code{_bfd_final_link} routine is also going to need to
--read the symbol information, the @code{_bfd_link_add_symbols}
--routine should save it somewhere attached to the object file
--BFD. However, the information should only be saved if the
--@code{keep_memory} field of the @code{info} argument is TRUE, so
--that the @code{-no-keep-memory} linker switch is effective.
--
--The a.out function which adds symbols from an object file is
--@code{aout_link_add_object_symbols}, and most of the interesting
--work is in @code{aout_link_add_symbols}. The latter saves
--pointers to the hash tables entries created by
--@code{_bfd_generic_link_add_one_symbol} indexed by symbol number,
--so that the @code{_bfd_final_link} routine does not have to call
--the hash table lookup routine to locate the entry.
--
--@node Adding symbols from an archive, , Adding symbols from an object file, Adding Symbols to the Hash Table
--@subsubsection Adding symbols from an archive
--When the @code{_bfd_link_add_symbols} routine is passed an
--archive, it must look through the symbols defined by the
--archive and decide which elements of the archive should be
--included in the link. For each such element it must call the
--@code{add_archive_element} linker callback, and it must add the
--symbols from the object file to the linker hash table. (The
--callback may in fact indicate that a replacement BFD should be
--used, in which case the symbols from that BFD should be added
--to the linker hash table instead.)
--
--@findex _bfd_generic_link_add_archive_symbols
--In most cases the work of looking through the symbols in the
--archive should be done by the
--@code{_bfd_generic_link_add_archive_symbols} function. This
--function builds a hash table from the archive symbol table and
--looks through the list of undefined symbols to see which
--elements should be included.
--@code{_bfd_generic_link_add_archive_symbols} is passed a function
--to call to make the final decision about adding an archive
--element to the link and to do the actual work of adding the
--symbols to the linker hash table.
--
--The function passed to
--@code{_bfd_generic_link_add_archive_symbols} must read the
--symbols of the archive element and decide whether the archive
--element should be included in the link. If the element is to
--be included, the @code{add_archive_element} linker callback
--routine must be called with the element as an argument, and
--the element's symbols must be added to the linker hash table
--just as though the element had itself been passed to the
--@code{_bfd_link_add_symbols} function. The @code{add_archive_element}
--callback has the option to indicate that it would like to
--replace the element archive with a substitute BFD, in which
--case it is the symbols of that substitute BFD that must be
--added to the linker hash table instead.
--
--When the a.out @code{_bfd_link_add_symbols} function receives an
--archive, it calls @code{_bfd_generic_link_add_archive_symbols}
--passing @code{aout_link_check_archive_element} as the function
--argument. @code{aout_link_check_archive_element} calls
--@code{aout_link_check_ar_symbols}. If the latter decides to add
--the element (an element is only added if it provides a real,
--non-common, definition for a previously undefined or common
--symbol) it calls the @code{add_archive_element} callback and then
--@code{aout_link_check_archive_element} calls
--@code{aout_link_add_symbols} to actually add the symbols to the
--linker hash table - possibly those of a substitute BFD, if the
--@code{add_archive_element} callback avails itself of that option.
--
--The ECOFF back end is unusual in that it does not normally
--call @code{_bfd_generic_link_add_archive_symbols}, because ECOFF
--archives already contain a hash table of symbols. The ECOFF
--back end searches the archive itself to avoid the overhead of
--creating a new hash table.
--
--@node Performing the Final Link, , Adding Symbols to the Hash Table, Linker Functions
--@subsection Performing the final link
--@cindex _bfd_link_final_link in target vector
--@cindex target vector (_bfd_final_link)
--When all the input files have been processed, the linker calls
--the @code{_bfd_final_link} entry point of the output BFD. This
--routine is responsible for producing the final output file,
--which has several aspects. It must relocate the contents of
--the input sections and copy the data into the output sections.
--It must build an output symbol table including any local
--symbols from the input files and the global symbols from the
--hash table. When producing relocatable output, it must
--modify the input relocs and write them into the output file.
--There may also be object format dependent work to be done.
--
--The linker will also call the @code{write_object_contents} entry
--point when the BFD is closed. The two entry points must work
--together in order to produce the correct output file.
--
--The details of how this works are inevitably dependent upon
--the specific object file format. The a.out
--@code{_bfd_final_link} routine is @code{NAME(aout,final_link)}.
--
--@menu
--* Information provided by the linker::
--* Relocating the section contents::
--* Writing the symbol table::
--@end menu
--
--@node Information provided by the linker, Relocating the section contents, Performing the Final Link, Performing the Final Link
--@subsubsection Information provided by the linker
--Before the linker calls the @code{_bfd_final_link} entry point,
--it sets up some data structures for the function to use.
--
--The @code{input_bfds} field of the @code{bfd_link_info} structure
--will point to a list of all the input files included in the
--link. These files are linked through the @code{link_next} field
--of the @code{bfd} structure.
--
--Each section in the output file will have a list of
--@code{link_order} structures attached to the @code{map_head.link_order}
--field (the @code{link_order} structure is defined in
--@code{bfdlink.h}). These structures describe how to create the
--contents of the output section in terms of the contents of
--various input sections, fill constants, and, eventually, other
--types of information. They also describe relocs that must be
--created by the BFD backend, but do not correspond to any input
--file; this is used to support -Ur, which builds constructors
--while generating a relocatable object file.
--
--@node Relocating the section contents, Writing the symbol table, Information provided by the linker, Performing the Final Link
--@subsubsection Relocating the section contents
--The @code{_bfd_final_link} function should look through the
--@code{link_order} structures attached to each section of the
--output file. Each @code{link_order} structure should either be
--handled specially, or it should be passed to the function
--@code{_bfd_default_link_order} which will do the right thing
--(@code{_bfd_default_link_order} is defined in @code{linker.c}).
--
--For efficiency, a @code{link_order} of type
--@code{bfd_indirect_link_order} whose associated section belongs
--to a BFD of the same format as the output BFD must be handled
--specially. This type of @code{link_order} describes part of an
--output section in terms of a section belonging to one of the
--input files. The @code{_bfd_final_link} function should read the
--contents of the section and any associated relocs, apply the
--relocs to the section contents, and write out the modified
--section contents. If performing a relocatable link, the
--relocs themselves must also be modified and written out.
--
--@findex _bfd_relocate_contents
--@findex _bfd_final_link_relocate
--The functions @code{_bfd_relocate_contents} and
--@code{_bfd_final_link_relocate} provide some general support for
--performing the actual relocations, notably overflow checking.
--Their arguments include information about the symbol the
--relocation is against and a @code{reloc_howto_type} argument
--which describes the relocation to perform. These functions
--are defined in @code{reloc.c}.
--
--The a.out function which handles reading, relocating, and
--writing section contents is @code{aout_link_input_section}. The
--actual relocation is done in @code{aout_link_input_section_std}
--and @code{aout_link_input_section_ext}.
--
--@node Writing the symbol table, , Relocating the section contents, Performing the Final Link
--@subsubsection Writing the symbol table
--The @code{_bfd_final_link} function must gather all the symbols
--in the input files and write them out. It must also write out
--all the symbols in the global hash table. This must be
--controlled by the @code{strip} and @code{discard} fields of the
--@code{bfd_link_info} structure.
--
--The local symbols of the input files will not have been
--entered into the linker hash table. The @code{_bfd_final_link}
--routine must consider each input file and include the symbols
--in the output file. It may be convenient to do this when
--looking through the @code{link_order} structures, or it may be
--done by stepping through the @code{input_bfds} list.
--
--The @code{_bfd_final_link} routine must also traverse the global
--hash table to gather all the externally visible symbols. It
--is possible that most of the externally visible symbols may be
--written out when considering the symbols of each input file,
--but it is still necessary to traverse the hash table since the
--linker script may have defined some symbols that are not in
--any of the input files.
--
--The @code{strip} field of the @code{bfd_link_info} structure
--controls which symbols are written out. The possible values
--are listed in @code{bfdlink.h}. If the value is @code{strip_some},
--then the @code{keep_hash} field of the @code{bfd_link_info}
--structure is a hash table of symbols to keep; each symbol
--should be looked up in this hash table, and only symbols which
--are present should be included in the output file.
--
--If the @code{strip} field of the @code{bfd_link_info} structure
--permits local symbols to be written out, the @code{discard} field
--is used to further controls which local symbols are included
--in the output file. If the value is @code{discard_l}, then all
--local symbols which begin with a certain prefix are discarded;
--this is controlled by the @code{bfd_is_local_label_name} entry point.
--
--The a.out backend handles symbols by calling
--@code{aout_link_write_symbols} on each input BFD and then
--traversing the global hash table with the function
--@code{aout_link_write_other_symbol}. It builds a string table
--while writing out the symbols, which is written to the output
--file at the end of @code{NAME(aout,final_link)}.
--
--@findex bfd_link_split_section
--@subsubsection @code{bfd_link_split_section}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_link_split_section (bfd *abfd, asection *sec);
--@end example
--@strong{Description}@*
--Return nonzero if @var{sec} should be split during a
--reloceatable or final link.
--@example
--#define bfd_link_split_section(abfd, sec) \
-- BFD_SEND (abfd, _bfd_link_split_section, (abfd, sec))
--
--@end example
--
--@findex bfd_section_already_linked
--@subsubsection @code{bfd_section_already_linked}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_section_already_linked (bfd *abfd,
-- asection *sec,
-- struct bfd_link_info *info);
--@end example
--@strong{Description}@*
--Check if @var{data} has been already linked during a reloceatable
--or final link. Return TRUE if it has.
--@example
--#define bfd_section_already_linked(abfd, sec, info) \
-- BFD_SEND (abfd, _section_already_linked, (abfd, sec, info))
--
--@end example
--
--@findex bfd_generic_define_common_symbol
--@subsubsection @code{bfd_generic_define_common_symbol}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_generic_define_common_symbol
-- (bfd *output_bfd, struct bfd_link_info *info,
-- struct bfd_link_hash_entry *h);
--@end example
--@strong{Description}@*
--Convert common symbol @var{h} into a defined symbol.
--Return TRUE on success and FALSE on failure.
--@example
--#define bfd_define_common_symbol(output_bfd, info, h) \
-- BFD_SEND (output_bfd, _bfd_define_common_symbol, (output_bfd, info, h))
--
--@end example
--
--@findex bfd_find_version_for_sym
--@subsubsection @code{bfd_find_version_for_sym}
--@strong{Synopsis}
--@example
--struct bfd_elf_version_tree * bfd_find_version_for_sym
-- (struct bfd_elf_version_tree *verdefs,
-- const char *sym_name, bfd_boolean *hide);
--@end example
--@strong{Description}@*
--Search an elf version script tree for symbol versioning
--info and export / don't-export status for a given symbol.
--Return non-NULL on success and NULL on failure; also sets
--the output @samp{hide} boolean parameter.
--
--@findex bfd_hide_sym_by_version
--@subsubsection @code{bfd_hide_sym_by_version}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_hide_sym_by_version
-- (struct bfd_elf_version_tree *verdefs, const char *sym_name);
--@end example
--@strong{Description}@*
--Search an elf version script tree for symbol versioning
--info for a given symbol. Return TRUE if the symbol is hidden.
--
-diff -Nur binutils-2.24.orig/bfd/doc/mmo.texi binutils-2.24/bfd/doc/mmo.texi
---- binutils-2.24.orig/bfd/doc/mmo.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/mmo.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,365 +0,0 @@
--@section mmo backend
--The mmo object format is used exclusively together with Professor
--Donald E.@: Knuth's educational 64-bit processor MMIX. The simulator
--@command{mmix} which is available at
--@url{http://www-cs-faculty.stanford.edu/~knuth/programs/mmix.tar.gz}
--understands this format. That package also includes a combined
--assembler and linker called @command{mmixal}. The mmo format has
--no advantages feature-wise compared to e.g. ELF. It is a simple
--non-relocatable object format with no support for archives or
--debugging information, except for symbol value information and
--line numbers (which is not yet implemented in BFD). See
--@url{http://www-cs-faculty.stanford.edu/~knuth/mmix.html} for more
--information about MMIX. The ELF format is used for intermediate
--object files in the BFD implementation.
--
--@c We want to xref the symbol table node. A feature in "chew"
--@c requires that "commands" do not contain spaces in the
--@c arguments. Hence the hyphen in "Symbol-table".
--@menu
--* File layout::
--* Symbol-table::
--* mmo section mapping::
--@end menu
--
--@node File layout, Symbol-table, mmo, mmo
--@subsection File layout
--The mmo file contents is not partitioned into named sections as
--with e.g.@: ELF. Memory areas is formed by specifying the
--location of the data that follows. Only the memory area
--@samp{0x0000@dots{}00} to @samp{0x01ff@dots{}ff} is executable, so
--it is used for code (and constants) and the area
--@samp{0x2000@dots{}00} to @samp{0x20ff@dots{}ff} is used for
--writable data. @xref{mmo section mapping}.
--
--There is provision for specifying ``special data'' of 65536
--different types. We use type 80 (decimal), arbitrarily chosen the
--same as the ELF @code{e_machine} number for MMIX, filling it with
--section information normally found in ELF objects. @xref{mmo
--section mapping}.
--
--Contents is entered as 32-bit words, xor:ed over previous
--contents, always zero-initialized. A word that starts with the
--byte @samp{0x98} forms a command called a @samp{lopcode}, where
--the next byte distinguished between the thirteen lopcodes. The
--two remaining bytes, called the @samp{Y} and @samp{Z} fields, or
--the @samp{YZ} field (a 16-bit big-endian number), are used for
--various purposes different for each lopcode. As documented in
--@url{http://www-cs-faculty.stanford.edu/~knuth/mmixal-intro.ps.gz},
--the lopcodes are:
--
--@table @code
--@item lop_quote
--0x98000001. The next word is contents, regardless of whether it
--starts with 0x98 or not.
--
--@item lop_loc
--0x9801YYZZ, where @samp{Z} is 1 or 2. This is a location
--directive, setting the location for the next data to the next
--32-bit word (for @math{Z = 1}) or 64-bit word (for @math{Z = 2}),
--plus @math{Y * 2^56}. Normally @samp{Y} is 0 for the text segment
--and 2 for the data segment.
--
--@item lop_skip
--0x9802YYZZ. Increase the current location by @samp{YZ} bytes.
--
--@item lop_fixo
--0x9803YYZZ, where @samp{Z} is 1 or 2. Store the current location
--as 64 bits into the location pointed to by the next 32-bit
--(@math{Z = 1}) or 64-bit (@math{Z = 2}) word, plus @math{Y *
--2^56}.
--
--@item lop_fixr
--0x9804YYZZ. @samp{YZ} is stored into the current location plus
--@math{2 - 4 * YZ}.
--
--@item lop_fixrx
--0x980500ZZ. @samp{Z} is 16 or 24. A value @samp{L} derived from
--the following 32-bit word are used in a manner similar to
--@samp{YZ} in lop_fixr: it is xor:ed into the current location
--minus @math{4 * L}. The first byte of the word is 0 or 1. If it
--is 1, then @math{L = (@var{lowest 24 bits of word}) - 2^Z}, if 0,
--then @math{L = (@var{lowest 24 bits of word})}.
--
--@item lop_file
--0x9806YYZZ. @samp{Y} is the file number, @samp{Z} is count of
--32-bit words. Set the file number to @samp{Y} and the line
--counter to 0. The next @math{Z * 4} bytes contain the file name,
--padded with zeros if the count is not a multiple of four. The
--same @samp{Y} may occur multiple times, but @samp{Z} must be 0 for
--all but the first occurrence.
--
--@item lop_line
--0x9807YYZZ. @samp{YZ} is the line number. Together with
--lop_file, it forms the source location for the next 32-bit word.
--Note that for each non-lopcode 32-bit word, line numbers are
--assumed incremented by one.
--
--@item lop_spec
--0x9808YYZZ. @samp{YZ} is the type number. Data until the next
--lopcode other than lop_quote forms special data of type @samp{YZ}.
--@xref{mmo section mapping}.
--
--Other types than 80, (or type 80 with a content that does not
--parse) is stored in sections named @code{.MMIX.spec_data.@var{n}}
--where @var{n} is the @samp{YZ}-type. The flags for such a
--sections say not to allocate or load the data. The vma is 0.
--Contents of multiple occurrences of special data @var{n} is
--concatenated to the data of the previous lop_spec @var{n}s. The
--location in data or code at which the lop_spec occurred is lost.
--
--@item lop_pre
--0x980901ZZ. The first lopcode in a file. The @samp{Z} field forms the
--length of header information in 32-bit words, where the first word
--tells the time in seconds since @samp{00:00:00 GMT Jan 1 1970}.
--
--@item lop_post
--0x980a00ZZ. @math{Z > 32}. This lopcode follows after all
--content-generating lopcodes in a program. The @samp{Z} field
--denotes the value of @samp{rG} at the beginning of the program.
--The following @math{256 - Z} big-endian 64-bit words are loaded
--into global registers @samp{$G} @dots{} @samp{$255}.
--
--@item lop_stab
--0x980b0000. The next-to-last lopcode in a program. Must follow
--immediately after the lop_post lopcode and its data. After this
--lopcode follows all symbols in a compressed format
--(@pxref{Symbol-table}).
--
--@item lop_end
--0x980cYYZZ. The last lopcode in a program. It must follow the
--lop_stab lopcode and its data. The @samp{YZ} field contains the
--number of 32-bit words of symbol table information after the
--preceding lop_stab lopcode.
--@end table
--
--Note that the lopcode "fixups"; @code{lop_fixr}, @code{lop_fixrx} and
--@code{lop_fixo} are not generated by BFD, but are handled. They are
--generated by @code{mmixal}.
--
--This trivial one-label, one-instruction file:
--
--@example
-- :Main TRAP 1,2,3
--@end example
--
--can be represented this way in mmo:
--
--@example
-- 0x98090101 - lop_pre, one 32-bit word with timestamp.
-- <timestamp>
-- 0x98010002 - lop_loc, text segment, using a 64-bit address.
-- Note that mmixal does not emit this for the file above.
-- 0x00000000 - Address, high 32 bits.
-- 0x00000000 - Address, low 32 bits.
-- 0x98060002 - lop_file, 2 32-bit words for file-name.
-- 0x74657374 - "test"
-- 0x2e730000 - ".s\0\0"
-- 0x98070001 - lop_line, line 1.
-- 0x00010203 - TRAP 1,2,3
-- 0x980a00ff - lop_post, setting $255 to 0.
-- 0x00000000
-- 0x00000000
-- 0x980b0000 - lop_stab for ":Main" = 0, serial 1.
-- 0x203a4040 @xref{Symbol-table}.
-- 0x10404020
-- 0x4d206120
-- 0x69016e00
-- 0x81000000
-- 0x980c0005 - lop_end; symbol table contained five 32-bit words.
--@end example
--@node Symbol-table, mmo section mapping, File layout, mmo
--@subsection Symbol table format
--From mmixal.w (or really, the generated mmixal.tex) in
--@url{http://www-cs-faculty.stanford.edu/~knuth/programs/mmix.tar.gz}):
--``Symbols are stored and retrieved by means of a @samp{ternary
--search trie}, following ideas of Bentley and Sedgewick. (See
--ACM--SIAM Symp.@: on Discrete Algorithms @samp{8} (1997), 360--369;
--R.@:Sedgewick, @samp{Algorithms in C} (Reading, Mass.@:
--Addison--Wesley, 1998), @samp{15.4}.) Each trie node stores a
--character, and there are branches to subtries for the cases where
--a given character is less than, equal to, or greater than the
--character in the trie. There also is a pointer to a symbol table
--entry if a symbol ends at the current node.''
--
--So it's a tree encoded as a stream of bytes. The stream of bytes
--acts on a single virtual global symbol, adding and removing
--characters and signalling complete symbol points. Here, we read
--the stream and create symbols at the completion points.
--
--First, there's a control byte @code{m}. If any of the listed bits
--in @code{m} is nonzero, we execute what stands at the right, in
--the listed order:
--
--@example
-- (MMO3_LEFT)
-- 0x40 - Traverse left trie.
-- (Read a new command byte and recurse.)
--
-- (MMO3_SYMBITS)
-- 0x2f - Read the next byte as a character and store it in the
-- current character position; increment character position.
-- Test the bits of @code{m}:
--
-- (MMO3_WCHAR)
-- 0x80 - The character is 16-bit (so read another byte,
-- merge into current character.
--
-- (MMO3_TYPEBITS)
-- 0xf - We have a complete symbol; parse the type, value
-- and serial number and do what should be done
-- with a symbol. The type and length information
-- is in j = (m & 0xf).
--
-- (MMO3_REGQUAL_BITS)
-- j == 0xf: A register variable. The following
-- byte tells which register.
-- j <= 8: An absolute symbol. Read j bytes as the
-- big-endian number the symbol equals.
-- A j = 2 with two zero bytes denotes an
-- unknown symbol.
-- j > 8: As with j <= 8, but add (0x20 << 56)
-- to the value in the following j - 8
-- bytes.
--
-- Then comes the serial number, as a variant of
-- uleb128, but better named ubeb128:
-- Read bytes and shift the previous value left 7
-- (multiply by 128). Add in the new byte, repeat
-- until a byte has bit 7 set. The serial number
-- is the computed value minus 128.
--
-- (MMO3_MIDDLE)
-- 0x20 - Traverse middle trie. (Read a new command byte
-- and recurse.) Decrement character position.
--
-- (MMO3_RIGHT)
-- 0x10 - Traverse right trie. (Read a new command byte and
-- recurse.)
--@end example
--
--Let's look again at the @code{lop_stab} for the trivial file
--(@pxref{File layout}).
--
--@example
-- 0x980b0000 - lop_stab for ":Main" = 0, serial 1.
-- 0x203a4040
-- 0x10404020
-- 0x4d206120
-- 0x69016e00
-- 0x81000000
--@end example
--
--This forms the trivial trie (note that the path between ``:'' and
--``M'' is redundant):
--
--@example
-- 203a ":"
-- 40 /
-- 40 /
-- 10 \
-- 40 /
-- 40 /
-- 204d "M"
-- 2061 "a"
-- 2069 "i"
-- 016e "n" is the last character in a full symbol, and
-- with a value represented in one byte.
-- 00 The value is 0.
-- 81 The serial number is 1.
--@end example
--
--@node mmo section mapping, , Symbol-table, mmo
--@subsection mmo section mapping
--The implementation in BFD uses special data type 80 (decimal) to
--encapsulate and describe named sections, containing e.g.@: debug
--information. If needed, any datum in the encapsulation will be
--quoted using lop_quote. First comes a 32-bit word holding the
--number of 32-bit words containing the zero-terminated zero-padded
--segment name. After the name there's a 32-bit word holding flags
--describing the section type. Then comes a 64-bit big-endian word
--with the section length (in bytes), then another with the section
--start address. Depending on the type of section, the contents
--might follow, zero-padded to 32-bit boundary. For a loadable
--section (such as data or code), the contents might follow at some
--later point, not necessarily immediately, as a lop_loc with the
--same start address as in the section description, followed by the
--contents. This in effect forms a descriptor that must be emitted
--before the actual contents. Sections described this way must not
--overlap.
--
--For areas that don't have such descriptors, synthetic sections are
--formed by BFD. Consecutive contents in the two memory areas
--@samp{0x0000@dots{}00} to @samp{0x01ff@dots{}ff} and
--@samp{0x2000@dots{}00} to @samp{0x20ff@dots{}ff} are entered in
--sections named @code{.text} and @code{.data} respectively. If an area
--is not otherwise described, but would together with a neighboring
--lower area be less than @samp{0x40000000} bytes long, it is joined
--with the lower area and the gap is zero-filled. For other cases,
--a new section is formed, named @code{.MMIX.sec.@var{n}}. Here,
--@var{n} is a number, a running count through the mmo file,
--starting at 0.
--
--A loadable section specified as:
--
--@example
-- .section secname,"ax"
-- TETRA 1,2,3,4,-1,-2009
-- BYTE 80
--@end example
--
--and linked to address @samp{0x4}, is represented by the sequence:
--
--@example
-- 0x98080050 - lop_spec 80
-- 0x00000002 - two 32-bit words for the section name
-- 0x7365636e - "secn"
-- 0x616d6500 - "ame\0"
-- 0x00000033 - flags CODE, READONLY, LOAD, ALLOC
-- 0x00000000 - high 32 bits of section length
-- 0x0000001c - section length is 28 bytes; 6 * 4 + 1 + alignment to 32 bits
-- 0x00000000 - high 32 bits of section address
-- 0x00000004 - section address is 4
-- 0x98010002 - 64 bits with address of following data
-- 0x00000000 - high 32 bits of address
-- 0x00000004 - low 32 bits: data starts at address 4
-- 0x00000001 - 1
-- 0x00000002 - 2
-- 0x00000003 - 3
-- 0x00000004 - 4
-- 0xffffffff - -1
-- 0xfffff827 - -2009
-- 0x50000000 - 80 as a byte, padded with zeros.
--@end example
--
--Note that the lop_spec wrapping does not include the section
--contents. Compare this to a non-loaded section specified as:
--
--@example
-- .section thirdsec
-- TETRA 200001,100002
-- BYTE 38,40
--@end example
--
--This, when linked to address @samp{0x200000000000001c}, is
--represented by:
--
--@example
-- 0x98080050 - lop_spec 80
-- 0x00000002 - two 32-bit words for the section name
-- 0x7365636e - "thir"
-- 0x616d6500 - "dsec"
-- 0x00000010 - flag READONLY
-- 0x00000000 - high 32 bits of section length
-- 0x0000000c - section length is 12 bytes; 2 * 4 + 2 + alignment to 32 bits
-- 0x20000000 - high 32 bits of address
-- 0x0000001c - low 32 bits of address 0x200000000000001c
-- 0x00030d41 - 200001
-- 0x000186a2 - 100002
-- 0x26280000 - 38, 40 as bytes, padded with zeros
--@end example
--
--For the latter example, the section contents must not be
--loaded in memory, and is therefore specified as part of the
--special data. The address is usually unimportant but might
--provide information for e.g.@: the DWARF 2 debugging format.
-diff -Nur binutils-2.24.orig/bfd/doc/opncls.texi binutils-2.24/bfd/doc/opncls.texi
---- binutils-2.24.orig/bfd/doc/opncls.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/opncls.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,432 +0,0 @@
--
--@example
--/* Set to N to open the next N BFDs using an alternate id space. */
--extern unsigned int bfd_use_reserved_id;
--@end example
--@section Opening and closing BFDs
--
--
--@subsection Functions for opening and closing
--
--
--@findex bfd_fopen
--@subsubsection @code{bfd_fopen}
--@strong{Synopsis}
--@example
--bfd *bfd_fopen (const char *filename, const char *target,
-- const char *mode, int fd);
--@end example
--@strong{Description}@*
--Open the file @var{filename} with the target @var{target}.
--Return a pointer to the created BFD. If @var{fd} is not -1,
--then @code{fdopen} is used to open the file; otherwise, @code{fopen}
--is used. @var{mode} is passed directly to @code{fopen} or
--@code{fdopen}.
--
--Calls @code{bfd_find_target}, so @var{target} is interpreted as by
--that function.
--
--The new BFD is marked as cacheable iff @var{fd} is -1.
--
--If @code{NULL} is returned then an error has occured. Possible errors
--are @code{bfd_error_no_memory}, @code{bfd_error_invalid_target} or
--@code{system_call} error.
--
--On error, @var{fd} is always closed.
--
--@findex bfd_openr
--@subsubsection @code{bfd_openr}
--@strong{Synopsis}
--@example
--bfd *bfd_openr (const char *filename, const char *target);
--@end example
--@strong{Description}@*
--Open the file @var{filename} (using @code{fopen}) with the target
--@var{target}. Return a pointer to the created BFD.
--
--Calls @code{bfd_find_target}, so @var{target} is interpreted as by
--that function.
--
--If @code{NULL} is returned then an error has occured. Possible errors
--are @code{bfd_error_no_memory}, @code{bfd_error_invalid_target} or
--@code{system_call} error.
--
--@findex bfd_fdopenr
--@subsubsection @code{bfd_fdopenr}
--@strong{Synopsis}
--@example
--bfd *bfd_fdopenr (const char *filename, const char *target, int fd);
--@end example
--@strong{Description}@*
--@code{bfd_fdopenr} is to @code{bfd_fopenr} much like @code{fdopen} is to
--@code{fopen}. It opens a BFD on a file already described by the
--@var{fd} supplied.
--
--When the file is later @code{bfd_close}d, the file descriptor will
--be closed. If the caller desires that this file descriptor be
--cached by BFD (opened as needed, closed as needed to free
--descriptors for other opens), with the supplied @var{fd} used as
--an initial file descriptor (but subject to closure at any time),
--call bfd_set_cacheable(bfd, 1) on the returned BFD. The default
--is to assume no caching; the file descriptor will remain open
--until @code{bfd_close}, and will not be affected by BFD operations
--on other files.
--
--Possible errors are @code{bfd_error_no_memory},
--@code{bfd_error_invalid_target} and @code{bfd_error_system_call}.
--
--On error, @var{fd} is closed.
--
--@findex bfd_openstreamr
--@subsubsection @code{bfd_openstreamr}
--@strong{Synopsis}
--@example
--bfd *bfd_openstreamr (const char *, const char *, void *);
--@end example
--@strong{Description}@*
--Open a BFD for read access on an existing stdio stream. When
--the BFD is passed to @code{bfd_close}, the stream will be closed.
--
--@findex bfd_openr_iovec
--@subsubsection @code{bfd_openr_iovec}
--@strong{Synopsis}
--@example
--bfd *bfd_openr_iovec (const char *filename, const char *target,
-- void *(*open_func) (struct bfd *nbfd,
-- void *open_closure),
-- void *open_closure,
-- file_ptr (*pread_func) (struct bfd *nbfd,
-- void *stream,
-- void *buf,
-- file_ptr nbytes,
-- file_ptr offset),
-- int (*close_func) (struct bfd *nbfd,
-- void *stream),
-- int (*stat_func) (struct bfd *abfd,
-- void *stream,
-- struct stat *sb));
--@end example
--@strong{Description}@*
--Create and return a BFD backed by a read-only @var{stream}.
--The @var{stream} is created using @var{open_func}, accessed using
--@var{pread_func} and destroyed using @var{close_func}.
--
--Calls @code{bfd_find_target}, so @var{target} is interpreted as by
--that function.
--
--Calls @var{open_func} (which can call @code{bfd_zalloc} and
--@code{bfd_get_filename}) to obtain the read-only stream backing
--the BFD. @var{open_func} either succeeds returning the
--non-@code{NULL} @var{stream}, or fails returning @code{NULL}
--(setting @code{bfd_error}).
--
--Calls @var{pread_func} to request @var{nbytes} of data from
--@var{stream} starting at @var{offset} (e.g., via a call to
--@code{bfd_read}). @var{pread_func} either succeeds returning the
--number of bytes read (which can be less than @var{nbytes} when
--end-of-file), or fails returning -1 (setting @code{bfd_error}).
--
--Calls @var{close_func} when the BFD is later closed using
--@code{bfd_close}. @var{close_func} either succeeds returning 0, or
--fails returning -1 (setting @code{bfd_error}).
--
--Calls @var{stat_func} to fill in a stat structure for bfd_stat,
--bfd_get_size, and bfd_get_mtime calls. @var{stat_func} returns 0
--on success, or returns -1 on failure (setting @code{bfd_error}).
--
--If @code{bfd_openr_iovec} returns @code{NULL} then an error has
--occurred. Possible errors are @code{bfd_error_no_memory},
--@code{bfd_error_invalid_target} and @code{bfd_error_system_call}.
--
--@findex bfd_openw
--@subsubsection @code{bfd_openw}
--@strong{Synopsis}
--@example
--bfd *bfd_openw (const char *filename, const char *target);
--@end example
--@strong{Description}@*
--Create a BFD, associated with file @var{filename}, using the
--file format @var{target}, and return a pointer to it.
--
--Possible errors are @code{bfd_error_system_call}, @code{bfd_error_no_memory},
--@code{bfd_error_invalid_target}.
--
--@findex bfd_close
--@subsubsection @code{bfd_close}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_close (bfd *abfd);
--@end example
--@strong{Description}@*
--Close a BFD. If the BFD was open for writing, then pending
--operations are completed and the file written out and closed.
--If the created file is executable, then @code{chmod} is called
--to mark it as such.
--
--All memory attached to the BFD is released.
--
--The file descriptor associated with the BFD is closed (even
--if it was passed in to BFD by @code{bfd_fdopenr}).
--
--@strong{Returns}@*
--@code{TRUE} is returned if all is ok, otherwise @code{FALSE}.
--
--@findex bfd_close_all_done
--@subsubsection @code{bfd_close_all_done}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_close_all_done (bfd *);
--@end example
--@strong{Description}@*
--Close a BFD. Differs from @code{bfd_close} since it does not
--complete any pending operations. This routine would be used
--if the application had just used BFD for swapping and didn't
--want to use any of the writing code.
--
--If the created file is executable, then @code{chmod} is called
--to mark it as such.
--
--All memory attached to the BFD is released.
--
--@strong{Returns}@*
--@code{TRUE} is returned if all is ok, otherwise @code{FALSE}.
--
--@findex bfd_create
--@subsubsection @code{bfd_create}
--@strong{Synopsis}
--@example
--bfd *bfd_create (const char *filename, bfd *templ);
--@end example
--@strong{Description}@*
--Create a new BFD in the manner of @code{bfd_openw}, but without
--opening a file. The new BFD takes the target from the target
--used by @var{templ}. The format is always set to @code{bfd_object}.
--
--@findex bfd_make_writable
--@subsubsection @code{bfd_make_writable}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_make_writable (bfd *abfd);
--@end example
--@strong{Description}@*
--Takes a BFD as created by @code{bfd_create} and converts it
--into one like as returned by @code{bfd_openw}. It does this
--by converting the BFD to BFD_IN_MEMORY. It's assumed that
--you will call @code{bfd_make_readable} on this bfd later.
--
--@strong{Returns}@*
--@code{TRUE} is returned if all is ok, otherwise @code{FALSE}.
--
--@findex bfd_make_readable
--@subsubsection @code{bfd_make_readable}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_make_readable (bfd *abfd);
--@end example
--@strong{Description}@*
--Takes a BFD as created by @code{bfd_create} and
--@code{bfd_make_writable} and converts it into one like as
--returned by @code{bfd_openr}. It does this by writing the
--contents out to the memory buffer, then reversing the
--direction.
--
--@strong{Returns}@*
--@code{TRUE} is returned if all is ok, otherwise @code{FALSE}.
--
--@findex bfd_alloc
--@subsubsection @code{bfd_alloc}
--@strong{Synopsis}
--@example
--void *bfd_alloc (bfd *abfd, bfd_size_type wanted);
--@end example
--@strong{Description}@*
--Allocate a block of @var{wanted} bytes of memory attached to
--@code{abfd} and return a pointer to it.
--
--@findex bfd_alloc2
--@subsubsection @code{bfd_alloc2}
--@strong{Synopsis}
--@example
--void *bfd_alloc2 (bfd *abfd, bfd_size_type nmemb, bfd_size_type size);
--@end example
--@strong{Description}@*
--Allocate a block of @var{nmemb} elements of @var{size} bytes each
--of memory attached to @code{abfd} and return a pointer to it.
--
--@findex bfd_zalloc
--@subsubsection @code{bfd_zalloc}
--@strong{Synopsis}
--@example
--void *bfd_zalloc (bfd *abfd, bfd_size_type wanted);
--@end example
--@strong{Description}@*
--Allocate a block of @var{wanted} bytes of zeroed memory
--attached to @code{abfd} and return a pointer to it.
--
--@findex bfd_zalloc2
--@subsubsection @code{bfd_zalloc2}
--@strong{Synopsis}
--@example
--void *bfd_zalloc2 (bfd *abfd, bfd_size_type nmemb, bfd_size_type size);
--@end example
--@strong{Description}@*
--Allocate a block of @var{nmemb} elements of @var{size} bytes each
--of zeroed memory attached to @code{abfd} and return a pointer to it.
--
--@findex bfd_calc_gnu_debuglink_crc32
--@subsubsection @code{bfd_calc_gnu_debuglink_crc32}
--@strong{Synopsis}
--@example
--unsigned long bfd_calc_gnu_debuglink_crc32
-- (unsigned long crc, const unsigned char *buf, bfd_size_type len);
--@end example
--@strong{Description}@*
--Computes a CRC value as used in the .gnu_debuglink section.
--Advances the previously computed @var{crc} value by computing
--and adding in the crc32 for @var{len} bytes of @var{buf}.
--
--@strong{Returns}@*
--Return the updated CRC32 value.
--
--@findex bfd_get_debug_link_info
--@subsubsection @code{bfd_get_debug_link_info}
--@strong{Synopsis}
--@example
--char *bfd_get_debug_link_info (bfd *abfd, unsigned long *crc32_out);
--@end example
--@strong{Description}@*
--fetch the filename and CRC32 value for any separate debuginfo
--associated with @var{abfd}. Return NULL if no such info found,
--otherwise return filename and update @var{crc32_out}. The
--returned filename is allocated with @code{malloc}; freeing it
--is the responsibility of the caller.
--
--@findex bfd_get_alt_debug_link_info
--@subsubsection @code{bfd_get_alt_debug_link_info}
--@strong{Synopsis}
--@example
--char *bfd_get_alt_debug_link_info (bfd *abfd, unsigned long *crc32_out);
--@end example
--@strong{Description}@*
--Fetch the filename and BuildID value for any alternate debuginfo
--associated with @var{abfd}. Return NULL if no such info found,
--otherwise return filename and update @var{buildid_out}. The
--returned filename is allocated with @code{malloc}; freeing it
--is the responsibility of the caller.
--
--@findex separate_debug_file_exists
--@subsubsection @code{separate_debug_file_exists}
--@strong{Synopsis}
--@example
--bfd_boolean separate_debug_file_exists
-- (char *name, unsigned long crc32);
--@end example
--@strong{Description}@*
--Checks to see if @var{name} is a file and if its contents
--match @var{crc32}.
--
--@findex separate_alt_debug_file_exists
--@subsubsection @code{separate_alt_debug_file_exists}
--@strong{Synopsis}
--@example
--bfd_boolean separate_alt_debug_file_exists
-- (char *name, unsigned long crc32);
--@end example
--@strong{Description}@*
--Checks to see if @var{name} is a file and if its BuildID
--matches @var{buildid}.
--
--@findex find_separate_debug_file
--@subsubsection @code{find_separate_debug_file}
--@strong{Synopsis}
--@example
--char *find_separate_debug_file (bfd *abfd);
--@end example
--@strong{Description}@*
--Searches @var{abfd} for a section called @var{section_name} which
--is expected to contain a reference to a file containing separate
--debugging information. The function scans various locations in
--the filesystem, including the file tree rooted at
--@var{debug_file_directory}, and returns the first matching
--filename that it finds. If @var{check_crc} is TRUE then the
--contents of the file must also match the CRC value contained in
--@var{section_name}. Returns NULL if no valid file could be found.
--
--@findex bfd_follow_gnu_debuglink
--@subsubsection @code{bfd_follow_gnu_debuglink}
--@strong{Synopsis}
--@example
--char *bfd_follow_gnu_debuglink (bfd *abfd, const char *dir);
--@end example
--@strong{Description}@*
--Takes a BFD and searches it for a .gnu_debuglink section. If this
--section is found, it examines the section for the name and checksum
--of a '.debug' file containing auxiliary debugging information. It
--then searches the filesystem for this .debug file in some standard
--locations, including the directory tree rooted at @var{dir}, and if
--found returns the full filename.
--
--If @var{dir} is NULL, it will search a default path configured into
--libbfd at build time. [XXX this feature is not currently
--implemented].
--
--@strong{Returns}@*
--@code{NULL} on any errors or failure to locate the .debug file,
--otherwise a pointer to a heap-allocated string containing the
--filename. The caller is responsible for freeing this string.
--
--@findex bfd_follow_gnu_debugaltlink
--@subsubsection @code{bfd_follow_gnu_debugaltlink}
--@strong{Synopsis}
--@example
--char *bfd_follow_gnu_debugaltlink (bfd *abfd, const char *dir);
--@end example
--@strong{Description}@*
--Takes a BFD and searches it for a .gnu_debugaltlink section. If this
--section is found, it examines the section for the name of a file
--containing auxiliary debugging information. It then searches the
--filesystem for this file in a set of standard locations, including
--the directory tree rooted at @var{dir}, and if found returns the
--full filename.
--
--If @var{dir} is NULL, it will search a default path configured into
--libbfd at build time. [FIXME: This feature is not currently
--implemented].
--
--@strong{Returns}@*
--@code{NULL} on any errors or failure to locate the debug file,
--otherwise a pointer to a heap-allocated string containing the
--filename. The caller is responsible for freeing this string.
--
--@findex bfd_create_gnu_debuglink_section
--@subsubsection @code{bfd_create_gnu_debuglink_section}
--@strong{Synopsis}
--@example
--struct bfd_section *bfd_create_gnu_debuglink_section
-- (bfd *abfd, const char *filename);
--@end example
--@strong{Description}@*
--Takes a @var{BFD} and adds a .gnu_debuglink section to it. The section is sized
--to be big enough to contain a link to the specified @var{filename}.
--
--@strong{Returns}@*
--A pointer to the new section is returned if all is ok. Otherwise @code{NULL} is
--returned and bfd_error is set.
--
--@findex bfd_fill_in_gnu_debuglink_section
--@subsubsection @code{bfd_fill_in_gnu_debuglink_section}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_fill_in_gnu_debuglink_section
-- (bfd *abfd, struct bfd_section *sect, const char *filename);
--@end example
--@strong{Description}@*
--Takes a @var{BFD} and containing a .gnu_debuglink section @var{SECT}
--and fills in the contents of the section to contain a link to the
--specified @var{filename}. The filename should be relative to the
--current directory.
--
--@strong{Returns}@*
--@code{TRUE} is returned if all is ok. Otherwise @code{FALSE} is returned
--and bfd_error is set.
--
-diff -Nur binutils-2.24.orig/bfd/doc/reloc.texi binutils-2.24/bfd/doc/reloc.texi
---- binutils-2.24.orig/bfd/doc/reloc.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/reloc.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,3849 +0,0 @@
--@section Relocations
--BFD maintains relocations in much the same way it maintains
--symbols: they are left alone until required, then read in
--en-masse and translated into an internal form. A common
--routine @code{bfd_perform_relocation} acts upon the
--canonical form to do the fixup.
--
--Relocations are maintained on a per section basis,
--while symbols are maintained on a per BFD basis.
--
--All that a back end has to do to fit the BFD interface is to create
--a @code{struct reloc_cache_entry} for each relocation
--in a particular section, and fill in the right bits of the structures.
--
--@menu
--* typedef arelent::
--* howto manager::
--@end menu
--
--
--@node typedef arelent, howto manager, Relocations, Relocations
--@subsection typedef arelent
--This is the structure of a relocation entry:
--
--
--@example
--
--typedef enum bfd_reloc_status
--@{
-- /* No errors detected. */
-- bfd_reloc_ok,
--
-- /* The relocation was performed, but there was an overflow. */
-- bfd_reloc_overflow,
--
-- /* The address to relocate was not within the section supplied. */
-- bfd_reloc_outofrange,
--
-- /* Used by special functions. */
-- bfd_reloc_continue,
--
-- /* Unsupported relocation size requested. */
-- bfd_reloc_notsupported,
--
-- /* Unused. */
-- bfd_reloc_other,
--
-- /* The symbol to relocate against was undefined. */
-- bfd_reloc_undefined,
--
-- /* The relocation was performed, but may not be ok - presently
-- generated only when linking i960 coff files with i960 b.out
-- symbols. If this type is returned, the error_message argument
-- to bfd_perform_relocation will be set. */
-- bfd_reloc_dangerous
-- @}
-- bfd_reloc_status_type;
--
--
--typedef struct reloc_cache_entry
--@{
-- /* A pointer into the canonical table of pointers. */
-- struct bfd_symbol **sym_ptr_ptr;
--
-- /* offset in section. */
-- bfd_size_type address;
--
-- /* addend for relocation value. */
-- bfd_vma addend;
--
-- /* Pointer to how to perform the required relocation. */
-- reloc_howto_type *howto;
--
--@}
--arelent;
--
--@end example
--@strong{Description}@*
--Here is a description of each of the fields within an @code{arelent}:
--
--@itemize @bullet
--
--@item
--@code{sym_ptr_ptr}
--@end itemize
--The symbol table pointer points to a pointer to the symbol
--associated with the relocation request. It is the pointer
--into the table returned by the back end's
--@code{canonicalize_symtab} action. @xref{Symbols}. The symbol is
--referenced through a pointer to a pointer so that tools like
--the linker can fix up all the symbols of the same name by
--modifying only one pointer. The relocation routine looks in
--the symbol and uses the base of the section the symbol is
--attached to and the value of the symbol as the initial
--relocation offset. If the symbol pointer is zero, then the
--section provided is looked up.
--
--@itemize @bullet
--
--@item
--@code{address}
--@end itemize
--The @code{address} field gives the offset in bytes from the base of
--the section data which owns the relocation record to the first
--byte of relocatable information. The actual data relocated
--will be relative to this point; for example, a relocation
--type which modifies the bottom two bytes of a four byte word
--would not touch the first byte pointed to in a big endian
--world.
--
--@itemize @bullet
--
--@item
--@code{addend}
--@end itemize
--The @code{addend} is a value provided by the back end to be added (!)
--to the relocation offset. Its interpretation is dependent upon
--the howto. For example, on the 68k the code:
--
--@example
-- char foo[];
-- main()
-- @{
-- return foo[0x12345678];
-- @}
--@end example
--
--Could be compiled into:
--
--@example
-- linkw fp,#-4
-- moveb @@#12345678,d0
-- extbl d0
-- unlk fp
-- rts
--@end example
--
--This could create a reloc pointing to @code{foo}, but leave the
--offset in the data, something like:
--
--@example
--RELOCATION RECORDS FOR [.text]:
--offset type value
--00000006 32 _foo
--
--00000000 4e56 fffc ; linkw fp,#-4
--00000004 1039 1234 5678 ; moveb @@#12345678,d0
--0000000a 49c0 ; extbl d0
--0000000c 4e5e ; unlk fp
--0000000e 4e75 ; rts
--@end example
--
--Using coff and an 88k, some instructions don't have enough
--space in them to represent the full address range, and
--pointers have to be loaded in two parts. So you'd get something like:
--
--@example
-- or.u r13,r0,hi16(_foo+0x12345678)
-- ld.b r2,r13,lo16(_foo+0x12345678)
-- jmp r1
--@end example
--
--This should create two relocs, both pointing to @code{_foo}, and with
--0x12340000 in their addend field. The data would consist of:
--
--@example
--RELOCATION RECORDS FOR [.text]:
--offset type value
--00000002 HVRT16 _foo+0x12340000
--00000006 LVRT16 _foo+0x12340000
--
--00000000 5da05678 ; or.u r13,r0,0x5678
--00000004 1c4d5678 ; ld.b r2,r13,0x5678
--00000008 f400c001 ; jmp r1
--@end example
--
--The relocation routine digs out the value from the data, adds
--it to the addend to get the original offset, and then adds the
--value of @code{_foo}. Note that all 32 bits have to be kept around
--somewhere, to cope with carry from bit 15 to bit 16.
--
--One further example is the sparc and the a.out format. The
--sparc has a similar problem to the 88k, in that some
--instructions don't have room for an entire offset, but on the
--sparc the parts are created in odd sized lumps. The designers of
--the a.out format chose to not use the data within the section
--for storing part of the offset; all the offset is kept within
--the reloc. Anything in the data should be ignored.
--
--@example
-- save %sp,-112,%sp
-- sethi %hi(_foo+0x12345678),%g2
-- ldsb [%g2+%lo(_foo+0x12345678)],%i0
-- ret
-- restore
--@end example
--
--Both relocs contain a pointer to @code{foo}, and the offsets
--contain junk.
--
--@example
--RELOCATION RECORDS FOR [.text]:
--offset type value
--00000004 HI22 _foo+0x12345678
--00000008 LO10 _foo+0x12345678
--
--00000000 9de3bf90 ; save %sp,-112,%sp
--00000004 05000000 ; sethi %hi(_foo+0),%g2
--00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
--0000000c 81c7e008 ; ret
--00000010 81e80000 ; restore
--@end example
--
--@itemize @bullet
--
--@item
--@code{howto}
--@end itemize
--The @code{howto} field can be imagined as a
--relocation instruction. It is a pointer to a structure which
--contains information on what to do with all of the other
--information in the reloc record and data section. A back end
--would normally have a relocation instruction set and turn
--relocations into pointers to the correct structure on input -
--but it would be possible to create each howto field on demand.
--
--@subsubsection @code{enum complain_overflow}
--Indicates what sort of overflow checking should be done when
--performing a relocation.
--
--
--@example
--
--enum complain_overflow
--@{
-- /* Do not complain on overflow. */
-- complain_overflow_dont,
--
-- /* Complain if the value overflows when considered as a signed
-- number one bit larger than the field. ie. A bitfield of N bits
-- is allowed to represent -2**n to 2**n-1. */
-- complain_overflow_bitfield,
--
-- /* Complain if the value overflows when considered as a signed
-- number. */
-- complain_overflow_signed,
--
-- /* Complain if the value overflows when considered as an
-- unsigned number. */
-- complain_overflow_unsigned
--@};
--@end example
--@subsubsection @code{reloc_howto_type}
--The @code{reloc_howto_type} is a structure which contains all the
--information that libbfd needs to know to tie up a back end's data.
--
--
--@example
--struct bfd_symbol; /* Forward declaration. */
--
--struct reloc_howto_struct
--@{
-- /* The type field has mainly a documentary use - the back end can
-- do what it wants with it, though normally the back end's
-- external idea of what a reloc number is stored
-- in this field. For example, a PC relative word relocation
-- in a coff environment has the type 023 - because that's
-- what the outside world calls a R_PCRWORD reloc. */
-- unsigned int type;
--
-- /* The value the final relocation is shifted right by. This drops
-- unwanted data from the relocation. */
-- unsigned int rightshift;
--
-- /* The size of the item to be relocated. This is *not* a
-- power-of-two measure. To get the number of bytes operated
-- on by a type of relocation, use bfd_get_reloc_size. */
-- int size;
--
-- /* The number of bits in the item to be relocated. This is used
-- when doing overflow checking. */
-- unsigned int bitsize;
--
-- /* The relocation is relative to the field being relocated. */
-- bfd_boolean pc_relative;
--
-- /* The bit position of the reloc value in the destination.
-- The relocated value is left shifted by this amount. */
-- unsigned int bitpos;
--
-- /* What type of overflow error should be checked for when
-- relocating. */
-- enum complain_overflow complain_on_overflow;
--
-- /* If this field is non null, then the supplied function is
-- called rather than the normal function. This allows really
-- strange relocation methods to be accommodated (e.g., i960 callj
-- instructions). */
-- bfd_reloc_status_type (*special_function)
-- (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
-- bfd *, char **);
--
-- /* The textual name of the relocation type. */
-- char *name;
--
-- /* Some formats record a relocation addend in the section contents
-- rather than with the relocation. For ELF formats this is the
-- distinction between USE_REL and USE_RELA (though the code checks
-- for USE_REL == 1/0). The value of this field is TRUE if the
-- addend is recorded with the section contents; when performing a
-- partial link (ld -r) the section contents (the data) will be
-- modified. The value of this field is FALSE if addends are
-- recorded with the relocation (in arelent.addend); when performing
-- a partial link the relocation will be modified.
-- All relocations for all ELF USE_RELA targets should set this field
-- to FALSE (values of TRUE should be looked on with suspicion).
-- However, the converse is not true: not all relocations of all ELF
-- USE_REL targets set this field to TRUE. Why this is so is peculiar
-- to each particular target. For relocs that aren't used in partial
-- links (e.g. GOT stuff) it doesn't matter what this is set to. */
-- bfd_boolean partial_inplace;
--
-- /* src_mask selects the part of the instruction (or data) to be used
-- in the relocation sum. If the target relocations don't have an
-- addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
-- dst_mask to extract the addend from the section contents. If
-- relocations do have an addend in the reloc, eg. ELF USE_RELA, this
-- field should be zero. Non-zero values for ELF USE_RELA targets are
-- bogus as in those cases the value in the dst_mask part of the
-- section contents should be treated as garbage. */
-- bfd_vma src_mask;
--
-- /* dst_mask selects which parts of the instruction (or data) are
-- replaced with a relocated value. */
-- bfd_vma dst_mask;
--
-- /* When some formats create PC relative instructions, they leave
-- the value of the pc of the place being relocated in the offset
-- slot of the instruction, so that a PC relative relocation can
-- be made just by adding in an ordinary offset (e.g., sun3 a.out).
-- Some formats leave the displacement part of an instruction
-- empty (e.g., m88k bcs); this flag signals the fact. */
-- bfd_boolean pcrel_offset;
--@};
--
--@end example
--@findex The HOWTO Macro
--@subsubsection @code{The HOWTO Macro}
--@strong{Description}@*
--The HOWTO define is horrible and will go away.
--@example
--#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
-- @{ (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC @}
--@end example
--
--@strong{Description}@*
--And will be replaced with the totally magic way. But for the
--moment, we are compatible, so do it this way.
--@example
--#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
-- HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
-- NAME, FALSE, 0, 0, IN)
--
--@end example
--
--@strong{Description}@*
--This is used to fill in an empty howto entry in an array.
--@example
--#define EMPTY_HOWTO(C) \
-- HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
-- NULL, FALSE, 0, 0, FALSE)
--
--@end example
--
--@strong{Description}@*
--Helper routine to turn a symbol into a relocation value.
--@example
--#define HOWTO_PREPARE(relocation, symbol) \
-- @{ \
-- if (symbol != NULL) \
-- @{ \
-- if (bfd_is_com_section (symbol->section)) \
-- @{ \
-- relocation = 0; \
-- @} \
-- else \
-- @{ \
-- relocation = symbol->value; \
-- @} \
-- @} \
-- @}
--
--@end example
--
--@findex bfd_get_reloc_size
--@subsubsection @code{bfd_get_reloc_size}
--@strong{Synopsis}
--@example
--unsigned int bfd_get_reloc_size (reloc_howto_type *);
--@end example
--@strong{Description}@*
--For a reloc_howto_type that operates on a fixed number of bytes,
--this returns the number of bytes operated on.
--
--@findex arelent_chain
--@subsubsection @code{arelent_chain}
--@strong{Description}@*
--How relocs are tied together in an @code{asection}:
--@example
--typedef struct relent_chain
--@{
-- arelent relent;
-- struct relent_chain *next;
--@}
--arelent_chain;
--
--@end example
--
--@findex bfd_check_overflow
--@subsubsection @code{bfd_check_overflow}
--@strong{Synopsis}
--@example
--bfd_reloc_status_type bfd_check_overflow
-- (enum complain_overflow how,
-- unsigned int bitsize,
-- unsigned int rightshift,
-- unsigned int addrsize,
-- bfd_vma relocation);
--@end example
--@strong{Description}@*
--Perform overflow checking on @var{relocation} which has
--@var{bitsize} significant bits and will be shifted right by
--@var{rightshift} bits, on a machine with addresses containing
--@var{addrsize} significant bits. The result is either of
--@code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
--
--@findex bfd_perform_relocation
--@subsubsection @code{bfd_perform_relocation}
--@strong{Synopsis}
--@example
--bfd_reloc_status_type bfd_perform_relocation
-- (bfd *abfd,
-- arelent *reloc_entry,
-- void *data,
-- asection *input_section,
-- bfd *output_bfd,
-- char **error_message);
--@end example
--@strong{Description}@*
--If @var{output_bfd} is supplied to this function, the
--generated image will be relocatable; the relocations are
--copied to the output file after they have been changed to
--reflect the new state of the world. There are two ways of
--reflecting the results of partial linkage in an output file:
--by modifying the output data in place, and by modifying the
--relocation record. Some native formats (e.g., basic a.out and
--basic coff) have no way of specifying an addend in the
--relocation type, so the addend has to go in the output data.
--This is no big deal since in these formats the output data
--slot will always be big enough for the addend. Complex reloc
--types with addends were invented to solve just this problem.
--The @var{error_message} argument is set to an error message if
--this return @code{bfd_reloc_dangerous}.
--
--@findex bfd_install_relocation
--@subsubsection @code{bfd_install_relocation}
--@strong{Synopsis}
--@example
--bfd_reloc_status_type bfd_install_relocation
-- (bfd *abfd,
-- arelent *reloc_entry,
-- void *data, bfd_vma data_start,
-- asection *input_section,
-- char **error_message);
--@end example
--@strong{Description}@*
--This looks remarkably like @code{bfd_perform_relocation}, except it
--does not expect that the section contents have been filled in.
--I.e., it's suitable for use when creating, rather than applying
--a relocation.
--
--For now, this function should be considered reserved for the
--assembler.
--
--
--@node howto manager, , typedef arelent, Relocations
--@subsection The howto manager
--When an application wants to create a relocation, but doesn't
--know what the target machine might call it, it can find out by
--using this bit of code.
--
--@findex bfd_reloc_code_type
--@subsubsection @code{bfd_reloc_code_type}
--@strong{Description}@*
--The insides of a reloc code. The idea is that, eventually, there
--will be one enumerator for every type of relocation we ever do.
--Pass one of these values to @code{bfd_reloc_type_lookup}, and it'll
--return a howto pointer.
--
--This does mean that the application must determine the correct
--enumerator value; you can't get a howto pointer from a random set
--of attributes.
--
--Here are the possible values for @code{enum bfd_reloc_code_real}:
--
--@deffn {} BFD_RELOC_64
--@deffnx {} BFD_RELOC_32
--@deffnx {} BFD_RELOC_26
--@deffnx {} BFD_RELOC_24
--@deffnx {} BFD_RELOC_16
--@deffnx {} BFD_RELOC_14
--@deffnx {} BFD_RELOC_8
--Basic absolute relocations of N bits.
--@end deffn
--@deffn {} BFD_RELOC_64_PCREL
--@deffnx {} BFD_RELOC_32_PCREL
--@deffnx {} BFD_RELOC_24_PCREL
--@deffnx {} BFD_RELOC_16_PCREL
--@deffnx {} BFD_RELOC_12_PCREL
--@deffnx {} BFD_RELOC_8_PCREL
--PC-relative relocations. Sometimes these are relative to the address
--of the relocation itself; sometimes they are relative to the start of
--the section containing the relocation. It depends on the specific target.
--
--The 24-bit relocation is used in some Intel 960 configurations.
--@end deffn
--@deffn {} BFD_RELOC_32_SECREL
--Section relative relocations. Some targets need this for DWARF2.
--@end deffn
--@deffn {} BFD_RELOC_32_GOT_PCREL
--@deffnx {} BFD_RELOC_16_GOT_PCREL
--@deffnx {} BFD_RELOC_8_GOT_PCREL
--@deffnx {} BFD_RELOC_32_GOTOFF
--@deffnx {} BFD_RELOC_16_GOTOFF
--@deffnx {} BFD_RELOC_LO16_GOTOFF
--@deffnx {} BFD_RELOC_HI16_GOTOFF
--@deffnx {} BFD_RELOC_HI16_S_GOTOFF
--@deffnx {} BFD_RELOC_8_GOTOFF
--@deffnx {} BFD_RELOC_64_PLT_PCREL
--@deffnx {} BFD_RELOC_32_PLT_PCREL
--@deffnx {} BFD_RELOC_24_PLT_PCREL
--@deffnx {} BFD_RELOC_16_PLT_PCREL
--@deffnx {} BFD_RELOC_8_PLT_PCREL
--@deffnx {} BFD_RELOC_64_PLTOFF
--@deffnx {} BFD_RELOC_32_PLTOFF
--@deffnx {} BFD_RELOC_16_PLTOFF
--@deffnx {} BFD_RELOC_LO16_PLTOFF
--@deffnx {} BFD_RELOC_HI16_PLTOFF
--@deffnx {} BFD_RELOC_HI16_S_PLTOFF
--@deffnx {} BFD_RELOC_8_PLTOFF
--For ELF.
--@end deffn
--@deffn {} BFD_RELOC_SIZE32
--@deffnx {} BFD_RELOC_SIZE64
--Size relocations.
--@end deffn
--@deffn {} BFD_RELOC_68K_GLOB_DAT
--@deffnx {} BFD_RELOC_68K_JMP_SLOT
--@deffnx {} BFD_RELOC_68K_RELATIVE
--@deffnx {} BFD_RELOC_68K_TLS_GD32
--@deffnx {} BFD_RELOC_68K_TLS_GD16
--@deffnx {} BFD_RELOC_68K_TLS_GD8
--@deffnx {} BFD_RELOC_68K_TLS_LDM32
--@deffnx {} BFD_RELOC_68K_TLS_LDM16
--@deffnx {} BFD_RELOC_68K_TLS_LDM8
--@deffnx {} BFD_RELOC_68K_TLS_LDO32
--@deffnx {} BFD_RELOC_68K_TLS_LDO16
--@deffnx {} BFD_RELOC_68K_TLS_LDO8
--@deffnx {} BFD_RELOC_68K_TLS_IE32
--@deffnx {} BFD_RELOC_68K_TLS_IE16
--@deffnx {} BFD_RELOC_68K_TLS_IE8
--@deffnx {} BFD_RELOC_68K_TLS_LE32
--@deffnx {} BFD_RELOC_68K_TLS_LE16
--@deffnx {} BFD_RELOC_68K_TLS_LE8
--Relocations used by 68K ELF.
--@end deffn
--@deffn {} BFD_RELOC_32_BASEREL
--@deffnx {} BFD_RELOC_16_BASEREL
--@deffnx {} BFD_RELOC_LO16_BASEREL
--@deffnx {} BFD_RELOC_HI16_BASEREL
--@deffnx {} BFD_RELOC_HI16_S_BASEREL
--@deffnx {} BFD_RELOC_8_BASEREL
--@deffnx {} BFD_RELOC_RVA
--Linkage-table relative.
--@end deffn
--@deffn {} BFD_RELOC_8_FFnn
--Absolute 8-bit relocation, but used to form an address like 0xFFnn.
--@end deffn
--@deffn {} BFD_RELOC_32_PCREL_S2
--@deffnx {} BFD_RELOC_16_PCREL_S2
--@deffnx {} BFD_RELOC_23_PCREL_S2
--These PC-relative relocations are stored as word displacements --
--i.e., byte displacements shifted right two bits. The 30-bit word
--displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
--SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
--signed 16-bit displacement is used on the MIPS, and the 23-bit
--displacement is used on the Alpha.
--@end deffn
--@deffn {} BFD_RELOC_HI22
--@deffnx {} BFD_RELOC_LO10
--High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
--the target word. These are used on the SPARC.
--@end deffn
--@deffn {} BFD_RELOC_GPREL16
--@deffnx {} BFD_RELOC_GPREL32
--For systems that allocate a Global Pointer register, these are
--displacements off that register. These relocation types are
--handled specially, because the value the register will have is
--decided relatively late.
--@end deffn
--@deffn {} BFD_RELOC_I960_CALLJ
--Reloc types used for i960/b.out.
--@end deffn
--@deffn {} BFD_RELOC_NONE
--@deffnx {} BFD_RELOC_SPARC_WDISP22
--@deffnx {} BFD_RELOC_SPARC22
--@deffnx {} BFD_RELOC_SPARC13
--@deffnx {} BFD_RELOC_SPARC_GOT10
--@deffnx {} BFD_RELOC_SPARC_GOT13
--@deffnx {} BFD_RELOC_SPARC_GOT22
--@deffnx {} BFD_RELOC_SPARC_PC10
--@deffnx {} BFD_RELOC_SPARC_PC22
--@deffnx {} BFD_RELOC_SPARC_WPLT30
--@deffnx {} BFD_RELOC_SPARC_COPY
--@deffnx {} BFD_RELOC_SPARC_GLOB_DAT
--@deffnx {} BFD_RELOC_SPARC_JMP_SLOT
--@deffnx {} BFD_RELOC_SPARC_RELATIVE
--@deffnx {} BFD_RELOC_SPARC_UA16
--@deffnx {} BFD_RELOC_SPARC_UA32
--@deffnx {} BFD_RELOC_SPARC_UA64
--@deffnx {} BFD_RELOC_SPARC_GOTDATA_HIX22
--@deffnx {} BFD_RELOC_SPARC_GOTDATA_LOX10
--@deffnx {} BFD_RELOC_SPARC_GOTDATA_OP_HIX22
--@deffnx {} BFD_RELOC_SPARC_GOTDATA_OP_LOX10
--@deffnx {} BFD_RELOC_SPARC_GOTDATA_OP
--@deffnx {} BFD_RELOC_SPARC_JMP_IREL
--@deffnx {} BFD_RELOC_SPARC_IRELATIVE
--SPARC ELF relocations. There is probably some overlap with other
--relocation types already defined.
--@end deffn
--@deffn {} BFD_RELOC_SPARC_BASE13
--@deffnx {} BFD_RELOC_SPARC_BASE22
--I think these are specific to SPARC a.out (e.g., Sun 4).
--@end deffn
--@deffn {} BFD_RELOC_SPARC_64
--@deffnx {} BFD_RELOC_SPARC_10
--@deffnx {} BFD_RELOC_SPARC_11
--@deffnx {} BFD_RELOC_SPARC_OLO10
--@deffnx {} BFD_RELOC_SPARC_HH22
--@deffnx {} BFD_RELOC_SPARC_HM10
--@deffnx {} BFD_RELOC_SPARC_LM22
--@deffnx {} BFD_RELOC_SPARC_PC_HH22
--@deffnx {} BFD_RELOC_SPARC_PC_HM10
--@deffnx {} BFD_RELOC_SPARC_PC_LM22
--@deffnx {} BFD_RELOC_SPARC_WDISP16
--@deffnx {} BFD_RELOC_SPARC_WDISP19
--@deffnx {} BFD_RELOC_SPARC_7
--@deffnx {} BFD_RELOC_SPARC_6
--@deffnx {} BFD_RELOC_SPARC_5
--@deffnx {} BFD_RELOC_SPARC_DISP64
--@deffnx {} BFD_RELOC_SPARC_PLT32
--@deffnx {} BFD_RELOC_SPARC_PLT64
--@deffnx {} BFD_RELOC_SPARC_HIX22
--@deffnx {} BFD_RELOC_SPARC_LOX10
--@deffnx {} BFD_RELOC_SPARC_H44
--@deffnx {} BFD_RELOC_SPARC_M44
--@deffnx {} BFD_RELOC_SPARC_L44
--@deffnx {} BFD_RELOC_SPARC_REGISTER
--@deffnx {} BFD_RELOC_SPARC_H34
--@deffnx {} BFD_RELOC_SPARC_SIZE32
--@deffnx {} BFD_RELOC_SPARC_SIZE64
--@deffnx {} BFD_RELOC_SPARC_WDISP10
--SPARC64 relocations
--@end deffn
--@deffn {} BFD_RELOC_SPARC_REV32
--SPARC little endian relocation
--@end deffn
--@deffn {} BFD_RELOC_SPARC_TLS_GD_HI22
--@deffnx {} BFD_RELOC_SPARC_TLS_GD_LO10
--@deffnx {} BFD_RELOC_SPARC_TLS_GD_ADD
--@deffnx {} BFD_RELOC_SPARC_TLS_GD_CALL
--@deffnx {} BFD_RELOC_SPARC_TLS_LDM_HI22
--@deffnx {} BFD_RELOC_SPARC_TLS_LDM_LO10
--@deffnx {} BFD_RELOC_SPARC_TLS_LDM_ADD
--@deffnx {} BFD_RELOC_SPARC_TLS_LDM_CALL
--@deffnx {} BFD_RELOC_SPARC_TLS_LDO_HIX22
--@deffnx {} BFD_RELOC_SPARC_TLS_LDO_LOX10
--@deffnx {} BFD_RELOC_SPARC_TLS_LDO_ADD
--@deffnx {} BFD_RELOC_SPARC_TLS_IE_HI22
--@deffnx {} BFD_RELOC_SPARC_TLS_IE_LO10
--@deffnx {} BFD_RELOC_SPARC_TLS_IE_LD
--@deffnx {} BFD_RELOC_SPARC_TLS_IE_LDX
--@deffnx {} BFD_RELOC_SPARC_TLS_IE_ADD
--@deffnx {} BFD_RELOC_SPARC_TLS_LE_HIX22
--@deffnx {} BFD_RELOC_SPARC_TLS_LE_LOX10
--@deffnx {} BFD_RELOC_SPARC_TLS_DTPMOD32
--@deffnx {} BFD_RELOC_SPARC_TLS_DTPMOD64
--@deffnx {} BFD_RELOC_SPARC_TLS_DTPOFF32
--@deffnx {} BFD_RELOC_SPARC_TLS_DTPOFF64
--@deffnx {} BFD_RELOC_SPARC_TLS_TPOFF32
--@deffnx {} BFD_RELOC_SPARC_TLS_TPOFF64
--SPARC TLS relocations
--@end deffn
--@deffn {} BFD_RELOC_SPU_IMM7
--@deffnx {} BFD_RELOC_SPU_IMM8
--@deffnx {} BFD_RELOC_SPU_IMM10
--@deffnx {} BFD_RELOC_SPU_IMM10W
--@deffnx {} BFD_RELOC_SPU_IMM16
--@deffnx {} BFD_RELOC_SPU_IMM16W
--@deffnx {} BFD_RELOC_SPU_IMM18
--@deffnx {} BFD_RELOC_SPU_PCREL9a
--@deffnx {} BFD_RELOC_SPU_PCREL9b
--@deffnx {} BFD_RELOC_SPU_PCREL16
--@deffnx {} BFD_RELOC_SPU_LO16
--@deffnx {} BFD_RELOC_SPU_HI16
--@deffnx {} BFD_RELOC_SPU_PPU32
--@deffnx {} BFD_RELOC_SPU_PPU64
--@deffnx {} BFD_RELOC_SPU_ADD_PIC
--SPU Relocations.
--@end deffn
--@deffn {} BFD_RELOC_ALPHA_GPDISP_HI16
--Alpha ECOFF and ELF relocations. Some of these treat the symbol or
--"addend" in some special way.
--For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
--writing; when reading, it will be the absolute section symbol. The
--addend is the displacement in bytes of the "lda" instruction from
--the "ldah" instruction (which is at the address of this reloc).
--@end deffn
--@deffn {} BFD_RELOC_ALPHA_GPDISP_LO16
--For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
--with GPDISP_HI16 relocs. The addend is ignored when writing the
--relocations out, and is filled in with the file's GP value on
--reading, for convenience.
--@end deffn
--@deffn {} BFD_RELOC_ALPHA_GPDISP
--The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
--relocation except that there is no accompanying GPDISP_LO16
--relocation.
--@end deffn
--@deffn {} BFD_RELOC_ALPHA_LITERAL
--@deffnx {} BFD_RELOC_ALPHA_ELF_LITERAL
--@deffnx {} BFD_RELOC_ALPHA_LITUSE
--The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
--the assembler turns it into a LDQ instruction to load the address of
--the symbol, and then fills in a register in the real instruction.
--
--The LITERAL reloc, at the LDQ instruction, refers to the .lita
--section symbol. The addend is ignored when writing, but is filled
--in with the file's GP value on reading, for convenience, as with the
--GPDISP_LO16 reloc.
--
--The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
--It should refer to the symbol to be referenced, as with 16_GOTOFF,
--but it generates output not based on the position within the .got
--section, but relative to the GP value chosen for the file during the
--final link stage.
--
--The LITUSE reloc, on the instruction using the loaded address, gives
--information to the linker that it might be able to use to optimize
--away some literal section references. The symbol is ignored (read
--as the absolute section symbol), and the "addend" indicates the type
--of instruction using the register:
--1 - "memory" fmt insn
--2 - byte-manipulation (byte offset reg)
--3 - jsr (target of branch)
--@end deffn
--@deffn {} BFD_RELOC_ALPHA_HINT
--The HINT relocation indicates a value that should be filled into the
--"hint" field of a jmp/jsr/ret instruction, for possible branch-
--prediction logic which may be provided on some processors.
--@end deffn
--@deffn {} BFD_RELOC_ALPHA_LINKAGE
--The LINKAGE relocation outputs a linkage pair in the object file,
--which is filled by the linker.
--@end deffn
--@deffn {} BFD_RELOC_ALPHA_CODEADDR
--The CODEADDR relocation outputs a STO_CA in the object file,
--which is filled by the linker.
--@end deffn
--@deffn {} BFD_RELOC_ALPHA_GPREL_HI16
--@deffnx {} BFD_RELOC_ALPHA_GPREL_LO16
--The GPREL_HI/LO relocations together form a 32-bit offset from the
--GP register.
--@end deffn
--@deffn {} BFD_RELOC_ALPHA_BRSGP
--Like BFD_RELOC_23_PCREL_S2, except that the source and target must
--share a common GP, and the target address is adjusted for
--STO_ALPHA_STD_GPLOAD.
--@end deffn
--@deffn {} BFD_RELOC_ALPHA_NOP
--The NOP relocation outputs a NOP if the longword displacement
--between two procedure entry points is < 2^21.
--@end deffn
--@deffn {} BFD_RELOC_ALPHA_BSR
--The BSR relocation outputs a BSR if the longword displacement
--between two procedure entry points is < 2^21.
--@end deffn
--@deffn {} BFD_RELOC_ALPHA_LDA
--The LDA relocation outputs a LDA if the longword displacement
--between two procedure entry points is < 2^16.
--@end deffn
--@deffn {} BFD_RELOC_ALPHA_BOH
--The BOH relocation outputs a BSR if the longword displacement
--between two procedure entry points is < 2^21, or else a hint.
--@end deffn
--@deffn {} BFD_RELOC_ALPHA_TLSGD
--@deffnx {} BFD_RELOC_ALPHA_TLSLDM
--@deffnx {} BFD_RELOC_ALPHA_DTPMOD64
--@deffnx {} BFD_RELOC_ALPHA_GOTDTPREL16
--@deffnx {} BFD_RELOC_ALPHA_DTPREL64
--@deffnx {} BFD_RELOC_ALPHA_DTPREL_HI16
--@deffnx {} BFD_RELOC_ALPHA_DTPREL_LO16
--@deffnx {} BFD_RELOC_ALPHA_DTPREL16
--@deffnx {} BFD_RELOC_ALPHA_GOTTPREL16
--@deffnx {} BFD_RELOC_ALPHA_TPREL64
--@deffnx {} BFD_RELOC_ALPHA_TPREL_HI16
--@deffnx {} BFD_RELOC_ALPHA_TPREL_LO16
--@deffnx {} BFD_RELOC_ALPHA_TPREL16
--Alpha thread-local storage relocations.
--@end deffn
--@deffn {} BFD_RELOC_MIPS_JMP
--@deffnx {} BFD_RELOC_MICROMIPS_JMP
--The MIPS jump instruction.
--@end deffn
--@deffn {} BFD_RELOC_MIPS16_JMP
--The MIPS16 jump instruction.
--@end deffn
--@deffn {} BFD_RELOC_MIPS16_GPREL
--MIPS16 GP relative reloc.
--@end deffn
--@deffn {} BFD_RELOC_HI16
--High 16 bits of 32-bit value; simple reloc.
--@end deffn
--@deffn {} BFD_RELOC_HI16_S
--High 16 bits of 32-bit value but the low 16 bits will be sign
--extended and added to form the final result. If the low 16
--bits form a negative number, we need to add one to the high value
--to compensate for the borrow when the low bits are added.
--@end deffn
--@deffn {} BFD_RELOC_LO16
--Low 16 bits.
--@end deffn
--@deffn {} BFD_RELOC_HI16_PCREL
--High 16 bits of 32-bit pc-relative value
--@end deffn
--@deffn {} BFD_RELOC_HI16_S_PCREL
--High 16 bits of 32-bit pc-relative value, adjusted
--@end deffn
--@deffn {} BFD_RELOC_LO16_PCREL
--Low 16 bits of pc-relative value
--@end deffn
--@deffn {} BFD_RELOC_MIPS16_GOT16
--@deffnx {} BFD_RELOC_MIPS16_CALL16
--Equivalent of BFD_RELOC_MIPS_*, but with the MIPS16 layout of
--16-bit immediate fields
--@end deffn
--@deffn {} BFD_RELOC_MIPS16_HI16
--MIPS16 high 16 bits of 32-bit value.
--@end deffn
--@deffn {} BFD_RELOC_MIPS16_HI16_S
--MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
--extended and added to form the final result. If the low 16
--bits form a negative number, we need to add one to the high value
--to compensate for the borrow when the low bits are added.
--@end deffn
--@deffn {} BFD_RELOC_MIPS16_LO16
--MIPS16 low 16 bits.
--@end deffn
--@deffn {} BFD_RELOC_MIPS16_TLS_GD
--@deffnx {} BFD_RELOC_MIPS16_TLS_LDM
--@deffnx {} BFD_RELOC_MIPS16_TLS_DTPREL_HI16
--@deffnx {} BFD_RELOC_MIPS16_TLS_DTPREL_LO16
--@deffnx {} BFD_RELOC_MIPS16_TLS_GOTTPREL
--@deffnx {} BFD_RELOC_MIPS16_TLS_TPREL_HI16
--@deffnx {} BFD_RELOC_MIPS16_TLS_TPREL_LO16
--MIPS16 TLS relocations
--@end deffn
--@deffn {} BFD_RELOC_MIPS_LITERAL
--@deffnx {} BFD_RELOC_MICROMIPS_LITERAL
--Relocation against a MIPS literal section.
--@end deffn
--@deffn {} BFD_RELOC_MICROMIPS_7_PCREL_S1
--@deffnx {} BFD_RELOC_MICROMIPS_10_PCREL_S1
--@deffnx {} BFD_RELOC_MICROMIPS_16_PCREL_S1
--microMIPS PC-relative relocations.
--@end deffn
--@deffn {} BFD_RELOC_MICROMIPS_GPREL16
--@deffnx {} BFD_RELOC_MICROMIPS_HI16
--@deffnx {} BFD_RELOC_MICROMIPS_HI16_S
--@deffnx {} BFD_RELOC_MICROMIPS_LO16
--microMIPS versions of generic BFD relocs.
--@end deffn
--@deffn {} BFD_RELOC_MIPS_GOT16
--@deffnx {} BFD_RELOC_MICROMIPS_GOT16
--@deffnx {} BFD_RELOC_MIPS_CALL16
--@deffnx {} BFD_RELOC_MICROMIPS_CALL16
--@deffnx {} BFD_RELOC_MIPS_GOT_HI16
--@deffnx {} BFD_RELOC_MICROMIPS_GOT_HI16
--@deffnx {} BFD_RELOC_MIPS_GOT_LO16
--@deffnx {} BFD_RELOC_MICROMIPS_GOT_LO16
--@deffnx {} BFD_RELOC_MIPS_CALL_HI16
--@deffnx {} BFD_RELOC_MICROMIPS_CALL_HI16
--@deffnx {} BFD_RELOC_MIPS_CALL_LO16
--@deffnx {} BFD_RELOC_MICROMIPS_CALL_LO16
--@deffnx {} BFD_RELOC_MIPS_SUB
--@deffnx {} BFD_RELOC_MICROMIPS_SUB
--@deffnx {} BFD_RELOC_MIPS_GOT_PAGE
--@deffnx {} BFD_RELOC_MICROMIPS_GOT_PAGE
--@deffnx {} BFD_RELOC_MIPS_GOT_OFST
--@deffnx {} BFD_RELOC_MICROMIPS_GOT_OFST
--@deffnx {} BFD_RELOC_MIPS_GOT_DISP
--@deffnx {} BFD_RELOC_MICROMIPS_GOT_DISP
--@deffnx {} BFD_RELOC_MIPS_SHIFT5
--@deffnx {} BFD_RELOC_MIPS_SHIFT6
--@deffnx {} BFD_RELOC_MIPS_INSERT_A
--@deffnx {} BFD_RELOC_MIPS_INSERT_B
--@deffnx {} BFD_RELOC_MIPS_DELETE
--@deffnx {} BFD_RELOC_MIPS_HIGHEST
--@deffnx {} BFD_RELOC_MICROMIPS_HIGHEST
--@deffnx {} BFD_RELOC_MIPS_HIGHER
--@deffnx {} BFD_RELOC_MICROMIPS_HIGHER
--@deffnx {} BFD_RELOC_MIPS_SCN_DISP
--@deffnx {} BFD_RELOC_MICROMIPS_SCN_DISP
--@deffnx {} BFD_RELOC_MIPS_REL16
--@deffnx {} BFD_RELOC_MIPS_RELGOT
--@deffnx {} BFD_RELOC_MIPS_JALR
--@deffnx {} BFD_RELOC_MICROMIPS_JALR
--@deffnx {} BFD_RELOC_MIPS_TLS_DTPMOD32
--@deffnx {} BFD_RELOC_MIPS_TLS_DTPREL32
--@deffnx {} BFD_RELOC_MIPS_TLS_DTPMOD64
--@deffnx {} BFD_RELOC_MIPS_TLS_DTPREL64
--@deffnx {} BFD_RELOC_MIPS_TLS_GD
--@deffnx {} BFD_RELOC_MICROMIPS_TLS_GD
--@deffnx {} BFD_RELOC_MIPS_TLS_LDM
--@deffnx {} BFD_RELOC_MICROMIPS_TLS_LDM
--@deffnx {} BFD_RELOC_MIPS_TLS_DTPREL_HI16
--@deffnx {} BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16
--@deffnx {} BFD_RELOC_MIPS_TLS_DTPREL_LO16
--@deffnx {} BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16
--@deffnx {} BFD_RELOC_MIPS_TLS_GOTTPREL
--@deffnx {} BFD_RELOC_MICROMIPS_TLS_GOTTPREL
--@deffnx {} BFD_RELOC_MIPS_TLS_TPREL32
--@deffnx {} BFD_RELOC_MIPS_TLS_TPREL64
--@deffnx {} BFD_RELOC_MIPS_TLS_TPREL_HI16
--@deffnx {} BFD_RELOC_MICROMIPS_TLS_TPREL_HI16
--@deffnx {} BFD_RELOC_MIPS_TLS_TPREL_LO16
--@deffnx {} BFD_RELOC_MICROMIPS_TLS_TPREL_LO16
--@deffnx {} BFD_RELOC_MIPS_EH
--MIPS ELF relocations.
--@end deffn
--@deffn {} BFD_RELOC_MIPS_COPY
--@deffnx {} BFD_RELOC_MIPS_JUMP_SLOT
--MIPS ELF relocations (VxWorks and PLT extensions).
--@end deffn
--@deffn {} BFD_RELOC_MOXIE_10_PCREL
--Moxie ELF relocations.
--@end deffn
--@deffn {} BFD_RELOC_FRV_LABEL16
--@deffnx {} BFD_RELOC_FRV_LABEL24
--@deffnx {} BFD_RELOC_FRV_LO16
--@deffnx {} BFD_RELOC_FRV_HI16
--@deffnx {} BFD_RELOC_FRV_GPREL12
--@deffnx {} BFD_RELOC_FRV_GPRELU12
--@deffnx {} BFD_RELOC_FRV_GPREL32
--@deffnx {} BFD_RELOC_FRV_GPRELHI
--@deffnx {} BFD_RELOC_FRV_GPRELLO
--@deffnx {} BFD_RELOC_FRV_GOT12
--@deffnx {} BFD_RELOC_FRV_GOTHI
--@deffnx {} BFD_RELOC_FRV_GOTLO
--@deffnx {} BFD_RELOC_FRV_FUNCDESC
--@deffnx {} BFD_RELOC_FRV_FUNCDESC_GOT12
--@deffnx {} BFD_RELOC_FRV_FUNCDESC_GOTHI
--@deffnx {} BFD_RELOC_FRV_FUNCDESC_GOTLO
--@deffnx {} BFD_RELOC_FRV_FUNCDESC_VALUE
--@deffnx {} BFD_RELOC_FRV_FUNCDESC_GOTOFF12
--@deffnx {} BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
--@deffnx {} BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
--@deffnx {} BFD_RELOC_FRV_GOTOFF12
--@deffnx {} BFD_RELOC_FRV_GOTOFFHI
--@deffnx {} BFD_RELOC_FRV_GOTOFFLO
--@deffnx {} BFD_RELOC_FRV_GETTLSOFF
--@deffnx {} BFD_RELOC_FRV_TLSDESC_VALUE
--@deffnx {} BFD_RELOC_FRV_GOTTLSDESC12
--@deffnx {} BFD_RELOC_FRV_GOTTLSDESCHI
--@deffnx {} BFD_RELOC_FRV_GOTTLSDESCLO
--@deffnx {} BFD_RELOC_FRV_TLSMOFF12
--@deffnx {} BFD_RELOC_FRV_TLSMOFFHI
--@deffnx {} BFD_RELOC_FRV_TLSMOFFLO
--@deffnx {} BFD_RELOC_FRV_GOTTLSOFF12
--@deffnx {} BFD_RELOC_FRV_GOTTLSOFFHI
--@deffnx {} BFD_RELOC_FRV_GOTTLSOFFLO
--@deffnx {} BFD_RELOC_FRV_TLSOFF
--@deffnx {} BFD_RELOC_FRV_TLSDESC_RELAX
--@deffnx {} BFD_RELOC_FRV_GETTLSOFF_RELAX
--@deffnx {} BFD_RELOC_FRV_TLSOFF_RELAX
--@deffnx {} BFD_RELOC_FRV_TLSMOFF
--Fujitsu Frv Relocations.
--@end deffn
--@deffn {} BFD_RELOC_MN10300_GOTOFF24
--This is a 24bit GOT-relative reloc for the mn10300.
--@end deffn
--@deffn {} BFD_RELOC_MN10300_GOT32
--This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
--in the instruction.
--@end deffn
--@deffn {} BFD_RELOC_MN10300_GOT24
--This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
--in the instruction.
--@end deffn
--@deffn {} BFD_RELOC_MN10300_GOT16
--This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
--in the instruction.
--@end deffn
--@deffn {} BFD_RELOC_MN10300_COPY
--Copy symbol at runtime.
--@end deffn
--@deffn {} BFD_RELOC_MN10300_GLOB_DAT
--Create GOT entry.
--@end deffn
--@deffn {} BFD_RELOC_MN10300_JMP_SLOT
--Create PLT entry.
--@end deffn
--@deffn {} BFD_RELOC_MN10300_RELATIVE
--Adjust by program base.
--@end deffn
--@deffn {} BFD_RELOC_MN10300_SYM_DIFF
--Together with another reloc targeted at the same location,
--allows for a value that is the difference of two symbols
--in the same section.
--@end deffn
--@deffn {} BFD_RELOC_MN10300_ALIGN
--The addend of this reloc is an alignment power that must
--be honoured at the offset's location, regardless of linker
--relaxation.
--@end deffn
--@deffn {} BFD_RELOC_MN10300_TLS_GD
--@deffnx {} BFD_RELOC_MN10300_TLS_LD
--@deffnx {} BFD_RELOC_MN10300_TLS_LDO
--@deffnx {} BFD_RELOC_MN10300_TLS_GOTIE
--@deffnx {} BFD_RELOC_MN10300_TLS_IE
--@deffnx {} BFD_RELOC_MN10300_TLS_LE
--@deffnx {} BFD_RELOC_MN10300_TLS_DTPMOD
--@deffnx {} BFD_RELOC_MN10300_TLS_DTPOFF
--@deffnx {} BFD_RELOC_MN10300_TLS_TPOFF
--Various TLS-related relocations.
--@end deffn
--@deffn {} BFD_RELOC_MN10300_32_PCREL
--This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
--instruction.
--@end deffn
--@deffn {} BFD_RELOC_MN10300_16_PCREL
--This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
--instruction.
--@end deffn
--@deffn {} BFD_RELOC_386_GOT32
--@deffnx {} BFD_RELOC_386_PLT32
--@deffnx {} BFD_RELOC_386_COPY
--@deffnx {} BFD_RELOC_386_GLOB_DAT
--@deffnx {} BFD_RELOC_386_JUMP_SLOT
--@deffnx {} BFD_RELOC_386_RELATIVE
--@deffnx {} BFD_RELOC_386_GOTOFF
--@deffnx {} BFD_RELOC_386_GOTPC
--@deffnx {} BFD_RELOC_386_TLS_TPOFF
--@deffnx {} BFD_RELOC_386_TLS_IE
--@deffnx {} BFD_RELOC_386_TLS_GOTIE
--@deffnx {} BFD_RELOC_386_TLS_LE
--@deffnx {} BFD_RELOC_386_TLS_GD
--@deffnx {} BFD_RELOC_386_TLS_LDM
--@deffnx {} BFD_RELOC_386_TLS_LDO_32
--@deffnx {} BFD_RELOC_386_TLS_IE_32
--@deffnx {} BFD_RELOC_386_TLS_LE_32
--@deffnx {} BFD_RELOC_386_TLS_DTPMOD32
--@deffnx {} BFD_RELOC_386_TLS_DTPOFF32
--@deffnx {} BFD_RELOC_386_TLS_TPOFF32
--@deffnx {} BFD_RELOC_386_TLS_GOTDESC
--@deffnx {} BFD_RELOC_386_TLS_DESC_CALL
--@deffnx {} BFD_RELOC_386_TLS_DESC
--@deffnx {} BFD_RELOC_386_IRELATIVE
--i386/elf relocations
--@end deffn
--@deffn {} BFD_RELOC_X86_64_GOT32
--@deffnx {} BFD_RELOC_X86_64_PLT32
--@deffnx {} BFD_RELOC_X86_64_COPY
--@deffnx {} BFD_RELOC_X86_64_GLOB_DAT
--@deffnx {} BFD_RELOC_X86_64_JUMP_SLOT
--@deffnx {} BFD_RELOC_X86_64_RELATIVE
--@deffnx {} BFD_RELOC_X86_64_GOTPCREL
--@deffnx {} BFD_RELOC_X86_64_32S
--@deffnx {} BFD_RELOC_X86_64_DTPMOD64
--@deffnx {} BFD_RELOC_X86_64_DTPOFF64
--@deffnx {} BFD_RELOC_X86_64_TPOFF64
--@deffnx {} BFD_RELOC_X86_64_TLSGD
--@deffnx {} BFD_RELOC_X86_64_TLSLD
--@deffnx {} BFD_RELOC_X86_64_DTPOFF32
--@deffnx {} BFD_RELOC_X86_64_GOTTPOFF
--@deffnx {} BFD_RELOC_X86_64_TPOFF32
--@deffnx {} BFD_RELOC_X86_64_GOTOFF64
--@deffnx {} BFD_RELOC_X86_64_GOTPC32
--@deffnx {} BFD_RELOC_X86_64_GOT64
--@deffnx {} BFD_RELOC_X86_64_GOTPCREL64
--@deffnx {} BFD_RELOC_X86_64_GOTPC64
--@deffnx {} BFD_RELOC_X86_64_GOTPLT64
--@deffnx {} BFD_RELOC_X86_64_PLTOFF64
--@deffnx {} BFD_RELOC_X86_64_GOTPC32_TLSDESC
--@deffnx {} BFD_RELOC_X86_64_TLSDESC_CALL
--@deffnx {} BFD_RELOC_X86_64_TLSDESC
--@deffnx {} BFD_RELOC_X86_64_IRELATIVE
--@deffnx {} BFD_RELOC_X86_64_PC32_BND
--@deffnx {} BFD_RELOC_X86_64_PLT32_BND
--x86-64/elf relocations
--@end deffn
--@deffn {} BFD_RELOC_NS32K_IMM_8
--@deffnx {} BFD_RELOC_NS32K_IMM_16
--@deffnx {} BFD_RELOC_NS32K_IMM_32
--@deffnx {} BFD_RELOC_NS32K_IMM_8_PCREL
--@deffnx {} BFD_RELOC_NS32K_IMM_16_PCREL
--@deffnx {} BFD_RELOC_NS32K_IMM_32_PCREL
--@deffnx {} BFD_RELOC_NS32K_DISP_8
--@deffnx {} BFD_RELOC_NS32K_DISP_16
--@deffnx {} BFD_RELOC_NS32K_DISP_32
--@deffnx {} BFD_RELOC_NS32K_DISP_8_PCREL
--@deffnx {} BFD_RELOC_NS32K_DISP_16_PCREL
--@deffnx {} BFD_RELOC_NS32K_DISP_32_PCREL
--ns32k relocations
--@end deffn
--@deffn {} BFD_RELOC_PDP11_DISP_8_PCREL
--@deffnx {} BFD_RELOC_PDP11_DISP_6_PCREL
--PDP11 relocations
--@end deffn
--@deffn {} BFD_RELOC_PJ_CODE_HI16
--@deffnx {} BFD_RELOC_PJ_CODE_LO16
--@deffnx {} BFD_RELOC_PJ_CODE_DIR16
--@deffnx {} BFD_RELOC_PJ_CODE_DIR32
--@deffnx {} BFD_RELOC_PJ_CODE_REL16
--@deffnx {} BFD_RELOC_PJ_CODE_REL32
--Picojava relocs. Not all of these appear in object files.
--@end deffn
--@deffn {} BFD_RELOC_PPC_B26
--@deffnx {} BFD_RELOC_PPC_BA26
--@deffnx {} BFD_RELOC_PPC_TOC16
--@deffnx {} BFD_RELOC_PPC_B16
--@deffnx {} BFD_RELOC_PPC_B16_BRTAKEN
--@deffnx {} BFD_RELOC_PPC_B16_BRNTAKEN
--@deffnx {} BFD_RELOC_PPC_BA16
--@deffnx {} BFD_RELOC_PPC_BA16_BRTAKEN
--@deffnx {} BFD_RELOC_PPC_BA16_BRNTAKEN
--@deffnx {} BFD_RELOC_PPC_COPY
--@deffnx {} BFD_RELOC_PPC_GLOB_DAT
--@deffnx {} BFD_RELOC_PPC_JMP_SLOT
--@deffnx {} BFD_RELOC_PPC_RELATIVE
--@deffnx {} BFD_RELOC_PPC_LOCAL24PC
--@deffnx {} BFD_RELOC_PPC_EMB_NADDR32
--@deffnx {} BFD_RELOC_PPC_EMB_NADDR16
--@deffnx {} BFD_RELOC_PPC_EMB_NADDR16_LO
--@deffnx {} BFD_RELOC_PPC_EMB_NADDR16_HI
--@deffnx {} BFD_RELOC_PPC_EMB_NADDR16_HA
--@deffnx {} BFD_RELOC_PPC_EMB_SDAI16
--@deffnx {} BFD_RELOC_PPC_EMB_SDA2I16
--@deffnx {} BFD_RELOC_PPC_EMB_SDA2REL
--@deffnx {} BFD_RELOC_PPC_EMB_SDA21
--@deffnx {} BFD_RELOC_PPC_EMB_MRKREF
--@deffnx {} BFD_RELOC_PPC_EMB_RELSEC16
--@deffnx {} BFD_RELOC_PPC_EMB_RELST_LO
--@deffnx {} BFD_RELOC_PPC_EMB_RELST_HI
--@deffnx {} BFD_RELOC_PPC_EMB_RELST_HA
--@deffnx {} BFD_RELOC_PPC_EMB_BIT_FLD
--@deffnx {} BFD_RELOC_PPC_EMB_RELSDA
--@deffnx {} BFD_RELOC_PPC_VLE_REL8
--@deffnx {} BFD_RELOC_PPC_VLE_REL15
--@deffnx {} BFD_RELOC_PPC_VLE_REL24
--@deffnx {} BFD_RELOC_PPC_VLE_LO16A
--@deffnx {} BFD_RELOC_PPC_VLE_LO16D
--@deffnx {} BFD_RELOC_PPC_VLE_HI16A
--@deffnx {} BFD_RELOC_PPC_VLE_HI16D
--@deffnx {} BFD_RELOC_PPC_VLE_HA16A
--@deffnx {} BFD_RELOC_PPC_VLE_HA16D
--@deffnx {} BFD_RELOC_PPC_VLE_SDA21
--@deffnx {} BFD_RELOC_PPC_VLE_SDA21_LO
--@deffnx {} BFD_RELOC_PPC_VLE_SDAREL_LO16A
--@deffnx {} BFD_RELOC_PPC_VLE_SDAREL_LO16D
--@deffnx {} BFD_RELOC_PPC_VLE_SDAREL_HI16A
--@deffnx {} BFD_RELOC_PPC_VLE_SDAREL_HI16D
--@deffnx {} BFD_RELOC_PPC_VLE_SDAREL_HA16A
--@deffnx {} BFD_RELOC_PPC_VLE_SDAREL_HA16D
--@deffnx {} BFD_RELOC_PPC64_HIGHER
--@deffnx {} BFD_RELOC_PPC64_HIGHER_S
--@deffnx {} BFD_RELOC_PPC64_HIGHEST
--@deffnx {} BFD_RELOC_PPC64_HIGHEST_S
--@deffnx {} BFD_RELOC_PPC64_TOC16_LO
--@deffnx {} BFD_RELOC_PPC64_TOC16_HI
--@deffnx {} BFD_RELOC_PPC64_TOC16_HA
--@deffnx {} BFD_RELOC_PPC64_TOC
--@deffnx {} BFD_RELOC_PPC64_PLTGOT16
--@deffnx {} BFD_RELOC_PPC64_PLTGOT16_LO
--@deffnx {} BFD_RELOC_PPC64_PLTGOT16_HI
--@deffnx {} BFD_RELOC_PPC64_PLTGOT16_HA
--@deffnx {} BFD_RELOC_PPC64_ADDR16_DS
--@deffnx {} BFD_RELOC_PPC64_ADDR16_LO_DS
--@deffnx {} BFD_RELOC_PPC64_GOT16_DS
--@deffnx {} BFD_RELOC_PPC64_GOT16_LO_DS
--@deffnx {} BFD_RELOC_PPC64_PLT16_LO_DS
--@deffnx {} BFD_RELOC_PPC64_SECTOFF_DS
--@deffnx {} BFD_RELOC_PPC64_SECTOFF_LO_DS
--@deffnx {} BFD_RELOC_PPC64_TOC16_DS
--@deffnx {} BFD_RELOC_PPC64_TOC16_LO_DS
--@deffnx {} BFD_RELOC_PPC64_PLTGOT16_DS
--@deffnx {} BFD_RELOC_PPC64_PLTGOT16_LO_DS
--@deffnx {} BFD_RELOC_PPC64_ADDR16_HIGH
--@deffnx {} BFD_RELOC_PPC64_ADDR16_HIGHA
--Power(rs6000) and PowerPC relocations.
--@end deffn
--@deffn {} BFD_RELOC_PPC_TLS
--@deffnx {} BFD_RELOC_PPC_TLSGD
--@deffnx {} BFD_RELOC_PPC_TLSLD
--@deffnx {} BFD_RELOC_PPC_DTPMOD
--@deffnx {} BFD_RELOC_PPC_TPREL16
--@deffnx {} BFD_RELOC_PPC_TPREL16_LO
--@deffnx {} BFD_RELOC_PPC_TPREL16_HI
--@deffnx {} BFD_RELOC_PPC_TPREL16_HA
--@deffnx {} BFD_RELOC_PPC_TPREL
--@deffnx {} BFD_RELOC_PPC_DTPREL16
--@deffnx {} BFD_RELOC_PPC_DTPREL16_LO
--@deffnx {} BFD_RELOC_PPC_DTPREL16_HI
--@deffnx {} BFD_RELOC_PPC_DTPREL16_HA
--@deffnx {} BFD_RELOC_PPC_DTPREL
--@deffnx {} BFD_RELOC_PPC_GOT_TLSGD16
--@deffnx {} BFD_RELOC_PPC_GOT_TLSGD16_LO
--@deffnx {} BFD_RELOC_PPC_GOT_TLSGD16_HI
--@deffnx {} BFD_RELOC_PPC_GOT_TLSGD16_HA
--@deffnx {} BFD_RELOC_PPC_GOT_TLSLD16
--@deffnx {} BFD_RELOC_PPC_GOT_TLSLD16_LO
--@deffnx {} BFD_RELOC_PPC_GOT_TLSLD16_HI
--@deffnx {} BFD_RELOC_PPC_GOT_TLSLD16_HA
--@deffnx {} BFD_RELOC_PPC_GOT_TPREL16
--@deffnx {} BFD_RELOC_PPC_GOT_TPREL16_LO
--@deffnx {} BFD_RELOC_PPC_GOT_TPREL16_HI
--@deffnx {} BFD_RELOC_PPC_GOT_TPREL16_HA
--@deffnx {} BFD_RELOC_PPC_GOT_DTPREL16
--@deffnx {} BFD_RELOC_PPC_GOT_DTPREL16_LO
--@deffnx {} BFD_RELOC_PPC_GOT_DTPREL16_HI
--@deffnx {} BFD_RELOC_PPC_GOT_DTPREL16_HA
--@deffnx {} BFD_RELOC_PPC64_TPREL16_DS
--@deffnx {} BFD_RELOC_PPC64_TPREL16_LO_DS
--@deffnx {} BFD_RELOC_PPC64_TPREL16_HIGHER
--@deffnx {} BFD_RELOC_PPC64_TPREL16_HIGHERA
--@deffnx {} BFD_RELOC_PPC64_TPREL16_HIGHEST
--@deffnx {} BFD_RELOC_PPC64_TPREL16_HIGHESTA
--@deffnx {} BFD_RELOC_PPC64_DTPREL16_DS
--@deffnx {} BFD_RELOC_PPC64_DTPREL16_LO_DS
--@deffnx {} BFD_RELOC_PPC64_DTPREL16_HIGHER
--@deffnx {} BFD_RELOC_PPC64_DTPREL16_HIGHERA
--@deffnx {} BFD_RELOC_PPC64_DTPREL16_HIGHEST
--@deffnx {} BFD_RELOC_PPC64_DTPREL16_HIGHESTA
--@deffnx {} BFD_RELOC_PPC64_TPREL16_HIGH
--@deffnx {} BFD_RELOC_PPC64_TPREL16_HIGHA
--@deffnx {} BFD_RELOC_PPC64_DTPREL16_HIGH
--@deffnx {} BFD_RELOC_PPC64_DTPREL16_HIGHA
--PowerPC and PowerPC64 thread-local storage relocations.
--@end deffn
--@deffn {} BFD_RELOC_I370_D12
--IBM 370/390 relocations
--@end deffn
--@deffn {} BFD_RELOC_CTOR
--The type of reloc used to build a constructor table - at the moment
--probably a 32 bit wide absolute relocation, but the target can choose.
--It generally does map to one of the other relocation types.
--@end deffn
--@deffn {} BFD_RELOC_ARM_PCREL_BRANCH
--ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
--not stored in the instruction.
--@end deffn
--@deffn {} BFD_RELOC_ARM_PCREL_BLX
--ARM 26 bit pc-relative branch. The lowest bit must be zero and is
--not stored in the instruction. The 2nd lowest bit comes from a 1 bit
--field in the instruction.
--@end deffn
--@deffn {} BFD_RELOC_THUMB_PCREL_BLX
--Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
--not stored in the instruction. The 2nd lowest bit comes from a 1 bit
--field in the instruction.
--@end deffn
--@deffn {} BFD_RELOC_ARM_PCREL_CALL
--ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction.
--@end deffn
--@deffn {} BFD_RELOC_ARM_PCREL_JUMP
--ARM 26-bit pc-relative branch for B or conditional BL instruction.
--@end deffn
--@deffn {} BFD_RELOC_THUMB_PCREL_BRANCH7
--@deffnx {} BFD_RELOC_THUMB_PCREL_BRANCH9
--@deffnx {} BFD_RELOC_THUMB_PCREL_BRANCH12
--@deffnx {} BFD_RELOC_THUMB_PCREL_BRANCH20
--@deffnx {} BFD_RELOC_THUMB_PCREL_BRANCH23
--@deffnx {} BFD_RELOC_THUMB_PCREL_BRANCH25
--Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
--The lowest bit must be zero and is not stored in the instruction.
--Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
--"nn" one smaller in all cases. Note further that BRANCH23
--corresponds to R_ARM_THM_CALL.
--@end deffn
--@deffn {} BFD_RELOC_ARM_OFFSET_IMM
--12-bit immediate offset, used in ARM-format ldr and str instructions.
--@end deffn
--@deffn {} BFD_RELOC_ARM_THUMB_OFFSET
--5-bit immediate offset, used in Thumb-format ldr and str instructions.
--@end deffn
--@deffn {} BFD_RELOC_ARM_TARGET1
--Pc-relative or absolute relocation depending on target. Used for
--entries in .init_array sections.
--@end deffn
--@deffn {} BFD_RELOC_ARM_ROSEGREL32
--Read-only segment base relative address.
--@end deffn
--@deffn {} BFD_RELOC_ARM_SBREL32
--Data segment base relative address.
--@end deffn
--@deffn {} BFD_RELOC_ARM_TARGET2
--This reloc is used for references to RTTI data from exception handling
--tables. The actual definition depends on the target. It may be a
--pc-relative or some form of GOT-indirect relocation.
--@end deffn
--@deffn {} BFD_RELOC_ARM_PREL31
--31-bit PC relative address.
--@end deffn
--@deffn {} BFD_RELOC_ARM_MOVW
--@deffnx {} BFD_RELOC_ARM_MOVT
--@deffnx {} BFD_RELOC_ARM_MOVW_PCREL
--@deffnx {} BFD_RELOC_ARM_MOVT_PCREL
--@deffnx {} BFD_RELOC_ARM_THUMB_MOVW
--@deffnx {} BFD_RELOC_ARM_THUMB_MOVT
--@deffnx {} BFD_RELOC_ARM_THUMB_MOVW_PCREL
--@deffnx {} BFD_RELOC_ARM_THUMB_MOVT_PCREL
--Low and High halfword relocations for MOVW and MOVT instructions.
--@end deffn
--@deffn {} BFD_RELOC_ARM_JUMP_SLOT
--@deffnx {} BFD_RELOC_ARM_GLOB_DAT
--@deffnx {} BFD_RELOC_ARM_GOT32
--@deffnx {} BFD_RELOC_ARM_PLT32
--@deffnx {} BFD_RELOC_ARM_RELATIVE
--@deffnx {} BFD_RELOC_ARM_GOTOFF
--@deffnx {} BFD_RELOC_ARM_GOTPC
--@deffnx {} BFD_RELOC_ARM_GOT_PREL
--Relocations for setting up GOTs and PLTs for shared libraries.
--@end deffn
--@deffn {} BFD_RELOC_ARM_TLS_GD32
--@deffnx {} BFD_RELOC_ARM_TLS_LDO32
--@deffnx {} BFD_RELOC_ARM_TLS_LDM32
--@deffnx {} BFD_RELOC_ARM_TLS_DTPOFF32
--@deffnx {} BFD_RELOC_ARM_TLS_DTPMOD32
--@deffnx {} BFD_RELOC_ARM_TLS_TPOFF32
--@deffnx {} BFD_RELOC_ARM_TLS_IE32
--@deffnx {} BFD_RELOC_ARM_TLS_LE32
--@deffnx {} BFD_RELOC_ARM_TLS_GOTDESC
--@deffnx {} BFD_RELOC_ARM_TLS_CALL
--@deffnx {} BFD_RELOC_ARM_THM_TLS_CALL
--@deffnx {} BFD_RELOC_ARM_TLS_DESCSEQ
--@deffnx {} BFD_RELOC_ARM_THM_TLS_DESCSEQ
--@deffnx {} BFD_RELOC_ARM_TLS_DESC
--ARM thread-local storage relocations.
--@end deffn
--@deffn {} BFD_RELOC_ARM_ALU_PC_G0_NC
--@deffnx {} BFD_RELOC_ARM_ALU_PC_G0
--@deffnx {} BFD_RELOC_ARM_ALU_PC_G1_NC
--@deffnx {} BFD_RELOC_ARM_ALU_PC_G1
--@deffnx {} BFD_RELOC_ARM_ALU_PC_G2
--@deffnx {} BFD_RELOC_ARM_LDR_PC_G0
--@deffnx {} BFD_RELOC_ARM_LDR_PC_G1
--@deffnx {} BFD_RELOC_ARM_LDR_PC_G2
--@deffnx {} BFD_RELOC_ARM_LDRS_PC_G0
--@deffnx {} BFD_RELOC_ARM_LDRS_PC_G1
--@deffnx {} BFD_RELOC_ARM_LDRS_PC_G2
--@deffnx {} BFD_RELOC_ARM_LDC_PC_G0
--@deffnx {} BFD_RELOC_ARM_LDC_PC_G1
--@deffnx {} BFD_RELOC_ARM_LDC_PC_G2
--@deffnx {} BFD_RELOC_ARM_ALU_SB_G0_NC
--@deffnx {} BFD_RELOC_ARM_ALU_SB_G0
--@deffnx {} BFD_RELOC_ARM_ALU_SB_G1_NC
--@deffnx {} BFD_RELOC_ARM_ALU_SB_G1
--@deffnx {} BFD_RELOC_ARM_ALU_SB_G2
--@deffnx {} BFD_RELOC_ARM_LDR_SB_G0
--@deffnx {} BFD_RELOC_ARM_LDR_SB_G1
--@deffnx {} BFD_RELOC_ARM_LDR_SB_G2
--@deffnx {} BFD_RELOC_ARM_LDRS_SB_G0
--@deffnx {} BFD_RELOC_ARM_LDRS_SB_G1
--@deffnx {} BFD_RELOC_ARM_LDRS_SB_G2
--@deffnx {} BFD_RELOC_ARM_LDC_SB_G0
--@deffnx {} BFD_RELOC_ARM_LDC_SB_G1
--@deffnx {} BFD_RELOC_ARM_LDC_SB_G2
--ARM group relocations.
--@end deffn
--@deffn {} BFD_RELOC_ARM_V4BX
--Annotation of BX instructions.
--@end deffn
--@deffn {} BFD_RELOC_ARM_IRELATIVE
--ARM support for STT_GNU_IFUNC.
--@end deffn
--@deffn {} BFD_RELOC_ARM_IMMEDIATE
--@deffnx {} BFD_RELOC_ARM_ADRL_IMMEDIATE
--@deffnx {} BFD_RELOC_ARM_T32_IMMEDIATE
--@deffnx {} BFD_RELOC_ARM_T32_ADD_IMM
--@deffnx {} BFD_RELOC_ARM_T32_IMM12
--@deffnx {} BFD_RELOC_ARM_T32_ADD_PC12
--@deffnx {} BFD_RELOC_ARM_SHIFT_IMM
--@deffnx {} BFD_RELOC_ARM_SMC
--@deffnx {} BFD_RELOC_ARM_HVC
--@deffnx {} BFD_RELOC_ARM_SWI
--@deffnx {} BFD_RELOC_ARM_MULTI
--@deffnx {} BFD_RELOC_ARM_CP_OFF_IMM
--@deffnx {} BFD_RELOC_ARM_CP_OFF_IMM_S2
--@deffnx {} BFD_RELOC_ARM_T32_CP_OFF_IMM
--@deffnx {} BFD_RELOC_ARM_T32_CP_OFF_IMM_S2
--@deffnx {} BFD_RELOC_ARM_ADR_IMM
--@deffnx {} BFD_RELOC_ARM_LDR_IMM
--@deffnx {} BFD_RELOC_ARM_LITERAL
--@deffnx {} BFD_RELOC_ARM_IN_POOL
--@deffnx {} BFD_RELOC_ARM_OFFSET_IMM8
--@deffnx {} BFD_RELOC_ARM_T32_OFFSET_U8
--@deffnx {} BFD_RELOC_ARM_T32_OFFSET_IMM
--@deffnx {} BFD_RELOC_ARM_HWLITERAL
--@deffnx {} BFD_RELOC_ARM_THUMB_ADD
--@deffnx {} BFD_RELOC_ARM_THUMB_IMM
--@deffnx {} BFD_RELOC_ARM_THUMB_SHIFT
--These relocs are only used within the ARM assembler. They are not
--(at present) written to any object files.
--@end deffn
--@deffn {} BFD_RELOC_SH_PCDISP8BY2
--@deffnx {} BFD_RELOC_SH_PCDISP12BY2
--@deffnx {} BFD_RELOC_SH_IMM3
--@deffnx {} BFD_RELOC_SH_IMM3U
--@deffnx {} BFD_RELOC_SH_DISP12
--@deffnx {} BFD_RELOC_SH_DISP12BY2
--@deffnx {} BFD_RELOC_SH_DISP12BY4
--@deffnx {} BFD_RELOC_SH_DISP12BY8
--@deffnx {} BFD_RELOC_SH_DISP20
--@deffnx {} BFD_RELOC_SH_DISP20BY8
--@deffnx {} BFD_RELOC_SH_IMM4
--@deffnx {} BFD_RELOC_SH_IMM4BY2
--@deffnx {} BFD_RELOC_SH_IMM4BY4
--@deffnx {} BFD_RELOC_SH_IMM8
--@deffnx {} BFD_RELOC_SH_IMM8BY2
--@deffnx {} BFD_RELOC_SH_IMM8BY4
--@deffnx {} BFD_RELOC_SH_PCRELIMM8BY2
--@deffnx {} BFD_RELOC_SH_PCRELIMM8BY4
--@deffnx {} BFD_RELOC_SH_SWITCH16
--@deffnx {} BFD_RELOC_SH_SWITCH32
--@deffnx {} BFD_RELOC_SH_USES
--@deffnx {} BFD_RELOC_SH_COUNT
--@deffnx {} BFD_RELOC_SH_ALIGN
--@deffnx {} BFD_RELOC_SH_CODE
--@deffnx {} BFD_RELOC_SH_DATA
--@deffnx {} BFD_RELOC_SH_LABEL
--@deffnx {} BFD_RELOC_SH_LOOP_START
--@deffnx {} BFD_RELOC_SH_LOOP_END
--@deffnx {} BFD_RELOC_SH_COPY
--@deffnx {} BFD_RELOC_SH_GLOB_DAT
--@deffnx {} BFD_RELOC_SH_JMP_SLOT
--@deffnx {} BFD_RELOC_SH_RELATIVE
--@deffnx {} BFD_RELOC_SH_GOTPC
--@deffnx {} BFD_RELOC_SH_GOT_LOW16
--@deffnx {} BFD_RELOC_SH_GOT_MEDLOW16
--@deffnx {} BFD_RELOC_SH_GOT_MEDHI16
--@deffnx {} BFD_RELOC_SH_GOT_HI16
--@deffnx {} BFD_RELOC_SH_GOTPLT_LOW16
--@deffnx {} BFD_RELOC_SH_GOTPLT_MEDLOW16
--@deffnx {} BFD_RELOC_SH_GOTPLT_MEDHI16
--@deffnx {} BFD_RELOC_SH_GOTPLT_HI16
--@deffnx {} BFD_RELOC_SH_PLT_LOW16
--@deffnx {} BFD_RELOC_SH_PLT_MEDLOW16
--@deffnx {} BFD_RELOC_SH_PLT_MEDHI16
--@deffnx {} BFD_RELOC_SH_PLT_HI16
--@deffnx {} BFD_RELOC_SH_GOTOFF_LOW16
--@deffnx {} BFD_RELOC_SH_GOTOFF_MEDLOW16
--@deffnx {} BFD_RELOC_SH_GOTOFF_MEDHI16
--@deffnx {} BFD_RELOC_SH_GOTOFF_HI16
--@deffnx {} BFD_RELOC_SH_GOTPC_LOW16
--@deffnx {} BFD_RELOC_SH_GOTPC_MEDLOW16
--@deffnx {} BFD_RELOC_SH_GOTPC_MEDHI16
--@deffnx {} BFD_RELOC_SH_GOTPC_HI16
--@deffnx {} BFD_RELOC_SH_COPY64
--@deffnx {} BFD_RELOC_SH_GLOB_DAT64
--@deffnx {} BFD_RELOC_SH_JMP_SLOT64
--@deffnx {} BFD_RELOC_SH_RELATIVE64
--@deffnx {} BFD_RELOC_SH_GOT10BY4
--@deffnx {} BFD_RELOC_SH_GOT10BY8
--@deffnx {} BFD_RELOC_SH_GOTPLT10BY4
--@deffnx {} BFD_RELOC_SH_GOTPLT10BY8
--@deffnx {} BFD_RELOC_SH_GOTPLT32
--@deffnx {} BFD_RELOC_SH_SHMEDIA_CODE
--@deffnx {} BFD_RELOC_SH_IMMU5
--@deffnx {} BFD_RELOC_SH_IMMS6
--@deffnx {} BFD_RELOC_SH_IMMS6BY32
--@deffnx {} BFD_RELOC_SH_IMMU6
--@deffnx {} BFD_RELOC_SH_IMMS10
--@deffnx {} BFD_RELOC_SH_IMMS10BY2
--@deffnx {} BFD_RELOC_SH_IMMS10BY4
--@deffnx {} BFD_RELOC_SH_IMMS10BY8
--@deffnx {} BFD_RELOC_SH_IMMS16
--@deffnx {} BFD_RELOC_SH_IMMU16
--@deffnx {} BFD_RELOC_SH_IMM_LOW16
--@deffnx {} BFD_RELOC_SH_IMM_LOW16_PCREL
--@deffnx {} BFD_RELOC_SH_IMM_MEDLOW16
--@deffnx {} BFD_RELOC_SH_IMM_MEDLOW16_PCREL
--@deffnx {} BFD_RELOC_SH_IMM_MEDHI16
--@deffnx {} BFD_RELOC_SH_IMM_MEDHI16_PCREL
--@deffnx {} BFD_RELOC_SH_IMM_HI16
--@deffnx {} BFD_RELOC_SH_IMM_HI16_PCREL
--@deffnx {} BFD_RELOC_SH_PT_16
--@deffnx {} BFD_RELOC_SH_TLS_GD_32
--@deffnx {} BFD_RELOC_SH_TLS_LD_32
--@deffnx {} BFD_RELOC_SH_TLS_LDO_32
--@deffnx {} BFD_RELOC_SH_TLS_IE_32
--@deffnx {} BFD_RELOC_SH_TLS_LE_32
--@deffnx {} BFD_RELOC_SH_TLS_DTPMOD32
--@deffnx {} BFD_RELOC_SH_TLS_DTPOFF32
--@deffnx {} BFD_RELOC_SH_TLS_TPOFF32
--@deffnx {} BFD_RELOC_SH_GOT20
--@deffnx {} BFD_RELOC_SH_GOTOFF20
--@deffnx {} BFD_RELOC_SH_GOTFUNCDESC
--@deffnx {} BFD_RELOC_SH_GOTFUNCDESC20
--@deffnx {} BFD_RELOC_SH_GOTOFFFUNCDESC
--@deffnx {} BFD_RELOC_SH_GOTOFFFUNCDESC20
--@deffnx {} BFD_RELOC_SH_FUNCDESC
--Renesas / SuperH SH relocs. Not all of these appear in object files.
--@end deffn
--@deffn {} BFD_RELOC_ARC_B22_PCREL
--ARC Cores relocs.
--ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
--not stored in the instruction. The high 20 bits are installed in bits 26
--through 7 of the instruction.
--@end deffn
--@deffn {} BFD_RELOC_ARC_B26
--ARC 26 bit absolute branch. The lowest two bits must be zero and are not
--stored in the instruction. The high 24 bits are installed in bits 23
--through 0.
--@end deffn
--@deffn {} BFD_RELOC_BFIN_16_IMM
--ADI Blackfin 16 bit immediate absolute reloc.
--@end deffn
--@deffn {} BFD_RELOC_BFIN_16_HIGH
--ADI Blackfin 16 bit immediate absolute reloc higher 16 bits.
--@end deffn
--@deffn {} BFD_RELOC_BFIN_4_PCREL
--ADI Blackfin 'a' part of LSETUP.
--@end deffn
--@deffn {} BFD_RELOC_BFIN_5_PCREL
--ADI Blackfin.
--@end deffn
--@deffn {} BFD_RELOC_BFIN_16_LOW
--ADI Blackfin 16 bit immediate absolute reloc lower 16 bits.
--@end deffn
--@deffn {} BFD_RELOC_BFIN_10_PCREL
--ADI Blackfin.
--@end deffn
--@deffn {} BFD_RELOC_BFIN_11_PCREL
--ADI Blackfin 'b' part of LSETUP.
--@end deffn
--@deffn {} BFD_RELOC_BFIN_12_PCREL_JUMP
--ADI Blackfin.
--@end deffn
--@deffn {} BFD_RELOC_BFIN_12_PCREL_JUMP_S
--ADI Blackfin Short jump, pcrel.
--@end deffn
--@deffn {} BFD_RELOC_BFIN_24_PCREL_CALL_X
--ADI Blackfin Call.x not implemented.
--@end deffn
--@deffn {} BFD_RELOC_BFIN_24_PCREL_JUMP_L
--ADI Blackfin Long Jump pcrel.
--@end deffn
--@deffn {} BFD_RELOC_BFIN_GOT17M4
--@deffnx {} BFD_RELOC_BFIN_GOTHI
--@deffnx {} BFD_RELOC_BFIN_GOTLO
--@deffnx {} BFD_RELOC_BFIN_FUNCDESC
--@deffnx {} BFD_RELOC_BFIN_FUNCDESC_GOT17M4
--@deffnx {} BFD_RELOC_BFIN_FUNCDESC_GOTHI
--@deffnx {} BFD_RELOC_BFIN_FUNCDESC_GOTLO
--@deffnx {} BFD_RELOC_BFIN_FUNCDESC_VALUE
--@deffnx {} BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4
--@deffnx {} BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI
--@deffnx {} BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO
--@deffnx {} BFD_RELOC_BFIN_GOTOFF17M4
--@deffnx {} BFD_RELOC_BFIN_GOTOFFHI
--@deffnx {} BFD_RELOC_BFIN_GOTOFFLO
--ADI Blackfin FD-PIC relocations.
--@end deffn
--@deffn {} BFD_RELOC_BFIN_GOT
--ADI Blackfin GOT relocation.
--@end deffn
--@deffn {} BFD_RELOC_BFIN_PLTPC
--ADI Blackfin PLTPC relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_PUSH
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_CONST
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_ADD
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_SUB
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_MULT
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_DIV
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_MOD
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_LSHIFT
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_RSHIFT
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_AND
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_OR
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_XOR
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_LAND
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_LOR
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_LEN
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_NEG
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_COMP
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_PAGE
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_HWPAGE
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_ARELOC_BFIN_ADDR
--ADI Blackfin arithmetic relocation.
--@end deffn
--@deffn {} BFD_RELOC_D10V_10_PCREL_R
--Mitsubishi D10V relocs.
--This is a 10-bit reloc with the right 2 bits
--assumed to be 0.
--@end deffn
--@deffn {} BFD_RELOC_D10V_10_PCREL_L
--Mitsubishi D10V relocs.
--This is a 10-bit reloc with the right 2 bits
--assumed to be 0. This is the same as the previous reloc
--except it is in the left container, i.e.,
--shifted left 15 bits.
--@end deffn
--@deffn {} BFD_RELOC_D10V_18
--This is an 18-bit reloc with the right 2 bits
--assumed to be 0.
--@end deffn
--@deffn {} BFD_RELOC_D10V_18_PCREL
--This is an 18-bit reloc with the right 2 bits
--assumed to be 0.
--@end deffn
--@deffn {} BFD_RELOC_D30V_6
--Mitsubishi D30V relocs.
--This is a 6-bit absolute reloc.
--@end deffn
--@deffn {} BFD_RELOC_D30V_9_PCREL
--This is a 6-bit pc-relative reloc with
--the right 3 bits assumed to be 0.
--@end deffn
--@deffn {} BFD_RELOC_D30V_9_PCREL_R
--This is a 6-bit pc-relative reloc with
--the right 3 bits assumed to be 0. Same
--as the previous reloc but on the right side
--of the container.
--@end deffn
--@deffn {} BFD_RELOC_D30V_15
--This is a 12-bit absolute reloc with the
--right 3 bitsassumed to be 0.
--@end deffn
--@deffn {} BFD_RELOC_D30V_15_PCREL
--This is a 12-bit pc-relative reloc with
--the right 3 bits assumed to be 0.
--@end deffn
--@deffn {} BFD_RELOC_D30V_15_PCREL_R
--This is a 12-bit pc-relative reloc with
--the right 3 bits assumed to be 0. Same
--as the previous reloc but on the right side
--of the container.
--@end deffn
--@deffn {} BFD_RELOC_D30V_21
--This is an 18-bit absolute reloc with
--the right 3 bits assumed to be 0.
--@end deffn
--@deffn {} BFD_RELOC_D30V_21_PCREL
--This is an 18-bit pc-relative reloc with
--the right 3 bits assumed to be 0.
--@end deffn
--@deffn {} BFD_RELOC_D30V_21_PCREL_R
--This is an 18-bit pc-relative reloc with
--the right 3 bits assumed to be 0. Same
--as the previous reloc but on the right side
--of the container.
--@end deffn
--@deffn {} BFD_RELOC_D30V_32
--This is a 32-bit absolute reloc.
--@end deffn
--@deffn {} BFD_RELOC_D30V_32_PCREL
--This is a 32-bit pc-relative reloc.
--@end deffn
--@deffn {} BFD_RELOC_DLX_HI16_S
--DLX relocs
--@end deffn
--@deffn {} BFD_RELOC_DLX_LO16
--DLX relocs
--@end deffn
--@deffn {} BFD_RELOC_DLX_JMP26
--DLX relocs
--@end deffn
--@deffn {} BFD_RELOC_M32C_HI8
--@deffnx {} BFD_RELOC_M32C_RL_JUMP
--@deffnx {} BFD_RELOC_M32C_RL_1ADDR
--@deffnx {} BFD_RELOC_M32C_RL_2ADDR
--Renesas M16C/M32C Relocations.
--@end deffn
--@deffn {} BFD_RELOC_M32R_24
--Renesas M32R (formerly Mitsubishi M32R) relocs.
--This is a 24 bit absolute address.
--@end deffn
--@deffn {} BFD_RELOC_M32R_10_PCREL
--This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
--@end deffn
--@deffn {} BFD_RELOC_M32R_18_PCREL
--This is an 18-bit reloc with the right 2 bits assumed to be 0.
--@end deffn
--@deffn {} BFD_RELOC_M32R_26_PCREL
--This is a 26-bit reloc with the right 2 bits assumed to be 0.
--@end deffn
--@deffn {} BFD_RELOC_M32R_HI16_ULO
--This is a 16-bit reloc containing the high 16 bits of an address
--used when the lower 16 bits are treated as unsigned.
--@end deffn
--@deffn {} BFD_RELOC_M32R_HI16_SLO
--This is a 16-bit reloc containing the high 16 bits of an address
--used when the lower 16 bits are treated as signed.
--@end deffn
--@deffn {} BFD_RELOC_M32R_LO16
--This is a 16-bit reloc containing the lower 16 bits of an address.
--@end deffn
--@deffn {} BFD_RELOC_M32R_SDA16
--This is a 16-bit reloc containing the small data area offset for use in
--add3, load, and store instructions.
--@end deffn
--@deffn {} BFD_RELOC_M32R_GOT24
--@deffnx {} BFD_RELOC_M32R_26_PLTREL
--@deffnx {} BFD_RELOC_M32R_COPY
--@deffnx {} BFD_RELOC_M32R_GLOB_DAT
--@deffnx {} BFD_RELOC_M32R_JMP_SLOT
--@deffnx {} BFD_RELOC_M32R_RELATIVE
--@deffnx {} BFD_RELOC_M32R_GOTOFF
--@deffnx {} BFD_RELOC_M32R_GOTOFF_HI_ULO
--@deffnx {} BFD_RELOC_M32R_GOTOFF_HI_SLO
--@deffnx {} BFD_RELOC_M32R_GOTOFF_LO
--@deffnx {} BFD_RELOC_M32R_GOTPC24
--@deffnx {} BFD_RELOC_M32R_GOT16_HI_ULO
--@deffnx {} BFD_RELOC_M32R_GOT16_HI_SLO
--@deffnx {} BFD_RELOC_M32R_GOT16_LO
--@deffnx {} BFD_RELOC_M32R_GOTPC_HI_ULO
--@deffnx {} BFD_RELOC_M32R_GOTPC_HI_SLO
--@deffnx {} BFD_RELOC_M32R_GOTPC_LO
--For PIC.
--@end deffn
--@deffn {} BFD_RELOC_V850_9_PCREL
--This is a 9-bit reloc
--@end deffn
--@deffn {} BFD_RELOC_V850_22_PCREL
--This is a 22-bit reloc
--@end deffn
--@deffn {} BFD_RELOC_V850_SDA_16_16_OFFSET
--This is a 16 bit offset from the short data area pointer.
--@end deffn
--@deffn {} BFD_RELOC_V850_SDA_15_16_OFFSET
--This is a 16 bit offset (of which only 15 bits are used) from the
--short data area pointer.
--@end deffn
--@deffn {} BFD_RELOC_V850_ZDA_16_16_OFFSET
--This is a 16 bit offset from the zero data area pointer.
--@end deffn
--@deffn {} BFD_RELOC_V850_ZDA_15_16_OFFSET
--This is a 16 bit offset (of which only 15 bits are used) from the
--zero data area pointer.
--@end deffn
--@deffn {} BFD_RELOC_V850_TDA_6_8_OFFSET
--This is an 8 bit offset (of which only 6 bits are used) from the
--tiny data area pointer.
--@end deffn
--@deffn {} BFD_RELOC_V850_TDA_7_8_OFFSET
--This is an 8bit offset (of which only 7 bits are used) from the tiny
--data area pointer.
--@end deffn
--@deffn {} BFD_RELOC_V850_TDA_7_7_OFFSET
--This is a 7 bit offset from the tiny data area pointer.
--@end deffn
--@deffn {} BFD_RELOC_V850_TDA_16_16_OFFSET
--This is a 16 bit offset from the tiny data area pointer.
--@end deffn
--@deffn {} BFD_RELOC_V850_TDA_4_5_OFFSET
--This is a 5 bit offset (of which only 4 bits are used) from the tiny
--data area pointer.
--@end deffn
--@deffn {} BFD_RELOC_V850_TDA_4_4_OFFSET
--This is a 4 bit offset from the tiny data area pointer.
--@end deffn
--@deffn {} BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
--This is a 16 bit offset from the short data area pointer, with the
--bits placed non-contiguously in the instruction.
--@end deffn
--@deffn {} BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
--This is a 16 bit offset from the zero data area pointer, with the
--bits placed non-contiguously in the instruction.
--@end deffn
--@deffn {} BFD_RELOC_V850_CALLT_6_7_OFFSET
--This is a 6 bit offset from the call table base pointer.
--@end deffn
--@deffn {} BFD_RELOC_V850_CALLT_16_16_OFFSET
--This is a 16 bit offset from the call table base pointer.
--@end deffn
--@deffn {} BFD_RELOC_V850_LONGCALL
--Used for relaxing indirect function calls.
--@end deffn
--@deffn {} BFD_RELOC_V850_LONGJUMP
--Used for relaxing indirect jumps.
--@end deffn
--@deffn {} BFD_RELOC_V850_ALIGN
--Used to maintain alignment whilst relaxing.
--@end deffn
--@deffn {} BFD_RELOC_V850_LO16_SPLIT_OFFSET
--This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu
--instructions.
--@end deffn
--@deffn {} BFD_RELOC_V850_16_PCREL
--This is a 16-bit reloc.
--@end deffn
--@deffn {} BFD_RELOC_V850_17_PCREL
--This is a 17-bit reloc.
--@end deffn
--@deffn {} BFD_RELOC_V850_23
--This is a 23-bit reloc.
--@end deffn
--@deffn {} BFD_RELOC_V850_32_PCREL
--This is a 32-bit reloc.
--@end deffn
--@deffn {} BFD_RELOC_V850_32_ABS
--This is a 32-bit reloc.
--@end deffn
--@deffn {} BFD_RELOC_V850_16_SPLIT_OFFSET
--This is a 16-bit reloc.
--@end deffn
--@deffn {} BFD_RELOC_V850_16_S1
--This is a 16-bit reloc.
--@end deffn
--@deffn {} BFD_RELOC_V850_LO16_S1
--Low 16 bits. 16 bit shifted by 1.
--@end deffn
--@deffn {} BFD_RELOC_V850_CALLT_15_16_OFFSET
--This is a 16 bit offset from the call table base pointer.
--@end deffn
--@deffn {} BFD_RELOC_V850_32_GOTPCREL
--DSO relocations.
--@end deffn
--@deffn {} BFD_RELOC_V850_16_GOT
--DSO relocations.
--@end deffn
--@deffn {} BFD_RELOC_V850_32_GOT
--DSO relocations.
--@end deffn
--@deffn {} BFD_RELOC_V850_22_PLT_PCREL
--DSO relocations.
--@end deffn
--@deffn {} BFD_RELOC_V850_32_PLT_PCREL
--DSO relocations.
--@end deffn
--@deffn {} BFD_RELOC_V850_COPY
--DSO relocations.
--@end deffn
--@deffn {} BFD_RELOC_V850_GLOB_DAT
--DSO relocations.
--@end deffn
--@deffn {} BFD_RELOC_V850_JMP_SLOT
--DSO relocations.
--@end deffn
--@deffn {} BFD_RELOC_V850_RELATIVE
--DSO relocations.
--@end deffn
--@deffn {} BFD_RELOC_V850_16_GOTOFF
--DSO relocations.
--@end deffn
--@deffn {} BFD_RELOC_V850_32_GOTOFF
--DSO relocations.
--@end deffn
--@deffn {} BFD_RELOC_V850_CODE
--start code.
--@end deffn
--@deffn {} BFD_RELOC_V850_DATA
--start data in text.
--@end deffn
--@deffn {} BFD_RELOC_TIC30_LDP
--This is a 8bit DP reloc for the tms320c30, where the most
--significant 8 bits of a 24 bit word are placed into the least
--significant 8 bits of the opcode.
--@end deffn
--@deffn {} BFD_RELOC_TIC54X_PARTLS7
--This is a 7bit reloc for the tms320c54x, where the least
--significant 7 bits of a 16 bit word are placed into the least
--significant 7 bits of the opcode.
--@end deffn
--@deffn {} BFD_RELOC_TIC54X_PARTMS9
--This is a 9bit DP reloc for the tms320c54x, where the most
--significant 9 bits of a 16 bit word are placed into the least
--significant 9 bits of the opcode.
--@end deffn
--@deffn {} BFD_RELOC_TIC54X_23
--This is an extended address 23-bit reloc for the tms320c54x.
--@end deffn
--@deffn {} BFD_RELOC_TIC54X_16_OF_23
--This is a 16-bit reloc for the tms320c54x, where the least
--significant 16 bits of a 23-bit extended address are placed into
--the opcode.
--@end deffn
--@deffn {} BFD_RELOC_TIC54X_MS7_OF_23
--This is a reloc for the tms320c54x, where the most
--significant 7 bits of a 23-bit extended address are placed into
--the opcode.
--@end deffn
--@deffn {} BFD_RELOC_C6000_PCR_S21
--@deffnx {} BFD_RELOC_C6000_PCR_S12
--@deffnx {} BFD_RELOC_C6000_PCR_S10
--@deffnx {} BFD_RELOC_C6000_PCR_S7
--@deffnx {} BFD_RELOC_C6000_ABS_S16
--@deffnx {} BFD_RELOC_C6000_ABS_L16
--@deffnx {} BFD_RELOC_C6000_ABS_H16
--@deffnx {} BFD_RELOC_C6000_SBR_U15_B
--@deffnx {} BFD_RELOC_C6000_SBR_U15_H
--@deffnx {} BFD_RELOC_C6000_SBR_U15_W
--@deffnx {} BFD_RELOC_C6000_SBR_S16
--@deffnx {} BFD_RELOC_C6000_SBR_L16_B
--@deffnx {} BFD_RELOC_C6000_SBR_L16_H
--@deffnx {} BFD_RELOC_C6000_SBR_L16_W
--@deffnx {} BFD_RELOC_C6000_SBR_H16_B
--@deffnx {} BFD_RELOC_C6000_SBR_H16_H
--@deffnx {} BFD_RELOC_C6000_SBR_H16_W
--@deffnx {} BFD_RELOC_C6000_SBR_GOT_U15_W
--@deffnx {} BFD_RELOC_C6000_SBR_GOT_L16_W
--@deffnx {} BFD_RELOC_C6000_SBR_GOT_H16_W
--@deffnx {} BFD_RELOC_C6000_DSBT_INDEX
--@deffnx {} BFD_RELOC_C6000_PREL31
--@deffnx {} BFD_RELOC_C6000_COPY
--@deffnx {} BFD_RELOC_C6000_JUMP_SLOT
--@deffnx {} BFD_RELOC_C6000_EHTYPE
--@deffnx {} BFD_RELOC_C6000_PCR_H16
--@deffnx {} BFD_RELOC_C6000_PCR_L16
--@deffnx {} BFD_RELOC_C6000_ALIGN
--@deffnx {} BFD_RELOC_C6000_FPHEAD
--@deffnx {} BFD_RELOC_C6000_NOCMP
--TMS320C6000 relocations.
--@end deffn
--@deffn {} BFD_RELOC_FR30_48
--This is a 48 bit reloc for the FR30 that stores 32 bits.
--@end deffn
--@deffn {} BFD_RELOC_FR30_20
--This is a 32 bit reloc for the FR30 that stores 20 bits split up into
--two sections.
--@end deffn
--@deffn {} BFD_RELOC_FR30_6_IN_4
--This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
--4 bits.
--@end deffn
--@deffn {} BFD_RELOC_FR30_8_IN_8
--This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
--into 8 bits.
--@end deffn
--@deffn {} BFD_RELOC_FR30_9_IN_8
--This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
--into 8 bits.
--@end deffn
--@deffn {} BFD_RELOC_FR30_10_IN_8
--This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
--into 8 bits.
--@end deffn
--@deffn {} BFD_RELOC_FR30_9_PCREL
--This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
--short offset into 8 bits.
--@end deffn
--@deffn {} BFD_RELOC_FR30_12_PCREL
--This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
--short offset into 11 bits.
--@end deffn
--@deffn {} BFD_RELOC_MCORE_PCREL_IMM8BY4
--@deffnx {} BFD_RELOC_MCORE_PCREL_IMM11BY2
--@deffnx {} BFD_RELOC_MCORE_PCREL_IMM4BY2
--@deffnx {} BFD_RELOC_MCORE_PCREL_32
--@deffnx {} BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
--@deffnx {} BFD_RELOC_MCORE_RVA
--Motorola Mcore relocations.
--@end deffn
--@deffn {} BFD_RELOC_MEP_8
--@deffnx {} BFD_RELOC_MEP_16
--@deffnx {} BFD_RELOC_MEP_32
--@deffnx {} BFD_RELOC_MEP_PCREL8A2
--@deffnx {} BFD_RELOC_MEP_PCREL12A2
--@deffnx {} BFD_RELOC_MEP_PCREL17A2
--@deffnx {} BFD_RELOC_MEP_PCREL24A2
--@deffnx {} BFD_RELOC_MEP_PCABS24A2
--@deffnx {} BFD_RELOC_MEP_LOW16
--@deffnx {} BFD_RELOC_MEP_HI16U
--@deffnx {} BFD_RELOC_MEP_HI16S
--@deffnx {} BFD_RELOC_MEP_GPREL
--@deffnx {} BFD_RELOC_MEP_TPREL
--@deffnx {} BFD_RELOC_MEP_TPREL7
--@deffnx {} BFD_RELOC_MEP_TPREL7A2
--@deffnx {} BFD_RELOC_MEP_TPREL7A4
--@deffnx {} BFD_RELOC_MEP_UIMM24
--@deffnx {} BFD_RELOC_MEP_ADDR24A4
--@deffnx {} BFD_RELOC_MEP_GNU_VTINHERIT
--@deffnx {} BFD_RELOC_MEP_GNU_VTENTRY
--Toshiba Media Processor Relocations.
--@end deffn
--@deffn {} BFD_RELOC_METAG_HIADDR16
--@deffnx {} BFD_RELOC_METAG_LOADDR16
--@deffnx {} BFD_RELOC_METAG_RELBRANCH
--@deffnx {} BFD_RELOC_METAG_GETSETOFF
--@deffnx {} BFD_RELOC_METAG_HIOG
--@deffnx {} BFD_RELOC_METAG_LOOG
--@deffnx {} BFD_RELOC_METAG_REL8
--@deffnx {} BFD_RELOC_METAG_REL16
--@deffnx {} BFD_RELOC_METAG_HI16_GOTOFF
--@deffnx {} BFD_RELOC_METAG_LO16_GOTOFF
--@deffnx {} BFD_RELOC_METAG_GETSET_GOTOFF
--@deffnx {} BFD_RELOC_METAG_GETSET_GOT
--@deffnx {} BFD_RELOC_METAG_HI16_GOTPC
--@deffnx {} BFD_RELOC_METAG_LO16_GOTPC
--@deffnx {} BFD_RELOC_METAG_HI16_PLT
--@deffnx {} BFD_RELOC_METAG_LO16_PLT
--@deffnx {} BFD_RELOC_METAG_RELBRANCH_PLT
--@deffnx {} BFD_RELOC_METAG_GOTOFF
--@deffnx {} BFD_RELOC_METAG_PLT
--@deffnx {} BFD_RELOC_METAG_COPY
--@deffnx {} BFD_RELOC_METAG_JMP_SLOT
--@deffnx {} BFD_RELOC_METAG_RELATIVE
--@deffnx {} BFD_RELOC_METAG_GLOB_DAT
--@deffnx {} BFD_RELOC_METAG_TLS_GD
--@deffnx {} BFD_RELOC_METAG_TLS_LDM
--@deffnx {} BFD_RELOC_METAG_TLS_LDO_HI16
--@deffnx {} BFD_RELOC_METAG_TLS_LDO_LO16
--@deffnx {} BFD_RELOC_METAG_TLS_LDO
--@deffnx {} BFD_RELOC_METAG_TLS_IE
--@deffnx {} BFD_RELOC_METAG_TLS_IENONPIC
--@deffnx {} BFD_RELOC_METAG_TLS_IENONPIC_HI16
--@deffnx {} BFD_RELOC_METAG_TLS_IENONPIC_LO16
--@deffnx {} BFD_RELOC_METAG_TLS_TPOFF
--@deffnx {} BFD_RELOC_METAG_TLS_DTPMOD
--@deffnx {} BFD_RELOC_METAG_TLS_DTPOFF
--@deffnx {} BFD_RELOC_METAG_TLS_LE
--@deffnx {} BFD_RELOC_METAG_TLS_LE_HI16
--@deffnx {} BFD_RELOC_METAG_TLS_LE_LO16
--Imagination Technologies Meta relocations.
--@end deffn
--@deffn {} BFD_RELOC_MMIX_GETA
--@deffnx {} BFD_RELOC_MMIX_GETA_1
--@deffnx {} BFD_RELOC_MMIX_GETA_2
--@deffnx {} BFD_RELOC_MMIX_GETA_3
--These are relocations for the GETA instruction.
--@end deffn
--@deffn {} BFD_RELOC_MMIX_CBRANCH
--@deffnx {} BFD_RELOC_MMIX_CBRANCH_J
--@deffnx {} BFD_RELOC_MMIX_CBRANCH_1
--@deffnx {} BFD_RELOC_MMIX_CBRANCH_2
--@deffnx {} BFD_RELOC_MMIX_CBRANCH_3
--These are relocations for a conditional branch instruction.
--@end deffn
--@deffn {} BFD_RELOC_MMIX_PUSHJ
--@deffnx {} BFD_RELOC_MMIX_PUSHJ_1
--@deffnx {} BFD_RELOC_MMIX_PUSHJ_2
--@deffnx {} BFD_RELOC_MMIX_PUSHJ_3
--@deffnx {} BFD_RELOC_MMIX_PUSHJ_STUBBABLE
--These are relocations for the PUSHJ instruction.
--@end deffn
--@deffn {} BFD_RELOC_MMIX_JMP
--@deffnx {} BFD_RELOC_MMIX_JMP_1
--@deffnx {} BFD_RELOC_MMIX_JMP_2
--@deffnx {} BFD_RELOC_MMIX_JMP_3
--These are relocations for the JMP instruction.
--@end deffn
--@deffn {} BFD_RELOC_MMIX_ADDR19
--This is a relocation for a relative address as in a GETA instruction or
--a branch.
--@end deffn
--@deffn {} BFD_RELOC_MMIX_ADDR27
--This is a relocation for a relative address as in a JMP instruction.
--@end deffn
--@deffn {} BFD_RELOC_MMIX_REG_OR_BYTE
--This is a relocation for an instruction field that may be a general
--register or a value 0..255.
--@end deffn
--@deffn {} BFD_RELOC_MMIX_REG
--This is a relocation for an instruction field that may be a general
--register.
--@end deffn
--@deffn {} BFD_RELOC_MMIX_BASE_PLUS_OFFSET
--This is a relocation for two instruction fields holding a register and
--an offset, the equivalent of the relocation.
--@end deffn
--@deffn {} BFD_RELOC_MMIX_LOCAL
--This relocation is an assertion that the expression is not allocated as
--a global register. It does not modify contents.
--@end deffn
--@deffn {} BFD_RELOC_AVR_7_PCREL
--This is a 16 bit reloc for the AVR that stores 8 bit pc relative
--short offset into 7 bits.
--@end deffn
--@deffn {} BFD_RELOC_AVR_13_PCREL
--This is a 16 bit reloc for the AVR that stores 13 bit pc relative
--short offset into 12 bits.
--@end deffn
--@deffn {} BFD_RELOC_AVR_16_PM
--This is a 16 bit reloc for the AVR that stores 17 bit value (usually
--program memory address) into 16 bits.
--@end deffn
--@deffn {} BFD_RELOC_AVR_LO8_LDI
--This is a 16 bit reloc for the AVR that stores 8 bit value (usually
--data memory address) into 8 bit immediate value of LDI insn.
--@end deffn
--@deffn {} BFD_RELOC_AVR_HI8_LDI
--This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
--of data memory address) into 8 bit immediate value of LDI insn.
--@end deffn
--@deffn {} BFD_RELOC_AVR_HH8_LDI
--This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
--of program memory address) into 8 bit immediate value of LDI insn.
--@end deffn
--@deffn {} BFD_RELOC_AVR_MS8_LDI
--This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
--of 32 bit value) into 8 bit immediate value of LDI insn.
--@end deffn
--@deffn {} BFD_RELOC_AVR_LO8_LDI_NEG
--This is a 16 bit reloc for the AVR that stores negated 8 bit value
--(usually data memory address) into 8 bit immediate value of SUBI insn.
--@end deffn
--@deffn {} BFD_RELOC_AVR_HI8_LDI_NEG
--This is a 16 bit reloc for the AVR that stores negated 8 bit value
--(high 8 bit of data memory address) into 8 bit immediate value of
--SUBI insn.
--@end deffn
--@deffn {} BFD_RELOC_AVR_HH8_LDI_NEG
--This is a 16 bit reloc for the AVR that stores negated 8 bit value
--(most high 8 bit of program memory address) into 8 bit immediate value
--of LDI or SUBI insn.
--@end deffn
--@deffn {} BFD_RELOC_AVR_MS8_LDI_NEG
--This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb
--of 32 bit value) into 8 bit immediate value of LDI insn.
--@end deffn
--@deffn {} BFD_RELOC_AVR_LO8_LDI_PM
--This is a 16 bit reloc for the AVR that stores 8 bit value (usually
--command address) into 8 bit immediate value of LDI insn.
--@end deffn
--@deffn {} BFD_RELOC_AVR_LO8_LDI_GS
--This is a 16 bit reloc for the AVR that stores 8 bit value
--(command address) into 8 bit immediate value of LDI insn. If the address
--is beyond the 128k boundary, the linker inserts a jump stub for this reloc
--in the lower 128k.
--@end deffn
--@deffn {} BFD_RELOC_AVR_HI8_LDI_PM
--This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
--of command address) into 8 bit immediate value of LDI insn.
--@end deffn
--@deffn {} BFD_RELOC_AVR_HI8_LDI_GS
--This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
--of command address) into 8 bit immediate value of LDI insn. If the address
--is beyond the 128k boundary, the linker inserts a jump stub for this reloc
--below 128k.
--@end deffn
--@deffn {} BFD_RELOC_AVR_HH8_LDI_PM
--This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
--of command address) into 8 bit immediate value of LDI insn.
--@end deffn
--@deffn {} BFD_RELOC_AVR_LO8_LDI_PM_NEG
--This is a 16 bit reloc for the AVR that stores negated 8 bit value
--(usually command address) into 8 bit immediate value of SUBI insn.
--@end deffn
--@deffn {} BFD_RELOC_AVR_HI8_LDI_PM_NEG
--This is a 16 bit reloc for the AVR that stores negated 8 bit value
--(high 8 bit of 16 bit command address) into 8 bit immediate value
--of SUBI insn.
--@end deffn
--@deffn {} BFD_RELOC_AVR_HH8_LDI_PM_NEG
--This is a 16 bit reloc for the AVR that stores negated 8 bit value
--(high 6 bit of 22 bit command address) into 8 bit immediate
--value of SUBI insn.
--@end deffn
--@deffn {} BFD_RELOC_AVR_CALL
--This is a 32 bit reloc for the AVR that stores 23 bit value
--into 22 bits.
--@end deffn
--@deffn {} BFD_RELOC_AVR_LDI
--This is a 16 bit reloc for the AVR that stores all needed bits
--for absolute addressing with ldi with overflow check to linktime
--@end deffn
--@deffn {} BFD_RELOC_AVR_6
--This is a 6 bit reloc for the AVR that stores offset for ldd/std
--instructions
--@end deffn
--@deffn {} BFD_RELOC_AVR_6_ADIW
--This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
--instructions
--@end deffn
--@deffn {} BFD_RELOC_AVR_8_LO
--This is a 8 bit reloc for the AVR that stores bits 0..7 of a symbol
--in .byte lo8(symbol)
--@end deffn
--@deffn {} BFD_RELOC_AVR_8_HI
--This is a 8 bit reloc for the AVR that stores bits 8..15 of a symbol
--in .byte hi8(symbol)
--@end deffn
--@deffn {} BFD_RELOC_AVR_8_HLO
--This is a 8 bit reloc for the AVR that stores bits 16..23 of a symbol
--in .byte hlo8(symbol)
--@end deffn
--@deffn {} BFD_RELOC_RL78_NEG8
--@deffnx {} BFD_RELOC_RL78_NEG16
--@deffnx {} BFD_RELOC_RL78_NEG24
--@deffnx {} BFD_RELOC_RL78_NEG32
--@deffnx {} BFD_RELOC_RL78_16_OP
--@deffnx {} BFD_RELOC_RL78_24_OP
--@deffnx {} BFD_RELOC_RL78_32_OP
--@deffnx {} BFD_RELOC_RL78_8U
--@deffnx {} BFD_RELOC_RL78_16U
--@deffnx {} BFD_RELOC_RL78_24U
--@deffnx {} BFD_RELOC_RL78_DIR3U_PCREL
--@deffnx {} BFD_RELOC_RL78_DIFF
--@deffnx {} BFD_RELOC_RL78_GPRELB
--@deffnx {} BFD_RELOC_RL78_GPRELW
--@deffnx {} BFD_RELOC_RL78_GPRELL
--@deffnx {} BFD_RELOC_RL78_SYM
--@deffnx {} BFD_RELOC_RL78_OP_SUBTRACT
--@deffnx {} BFD_RELOC_RL78_OP_NEG
--@deffnx {} BFD_RELOC_RL78_OP_AND
--@deffnx {} BFD_RELOC_RL78_OP_SHRA
--@deffnx {} BFD_RELOC_RL78_ABS8
--@deffnx {} BFD_RELOC_RL78_ABS16
--@deffnx {} BFD_RELOC_RL78_ABS16_REV
--@deffnx {} BFD_RELOC_RL78_ABS32
--@deffnx {} BFD_RELOC_RL78_ABS32_REV
--@deffnx {} BFD_RELOC_RL78_ABS16U
--@deffnx {} BFD_RELOC_RL78_ABS16UW
--@deffnx {} BFD_RELOC_RL78_ABS16UL
--@deffnx {} BFD_RELOC_RL78_RELAX
--@deffnx {} BFD_RELOC_RL78_HI16
--@deffnx {} BFD_RELOC_RL78_HI8
--@deffnx {} BFD_RELOC_RL78_LO16
--@deffnx {} BFD_RELOC_RL78_CODE
--Renesas RL78 Relocations.
--@end deffn
--@deffn {} BFD_RELOC_RX_NEG8
--@deffnx {} BFD_RELOC_RX_NEG16
--@deffnx {} BFD_RELOC_RX_NEG24
--@deffnx {} BFD_RELOC_RX_NEG32
--@deffnx {} BFD_RELOC_RX_16_OP
--@deffnx {} BFD_RELOC_RX_24_OP
--@deffnx {} BFD_RELOC_RX_32_OP
--@deffnx {} BFD_RELOC_RX_8U
--@deffnx {} BFD_RELOC_RX_16U
--@deffnx {} BFD_RELOC_RX_24U
--@deffnx {} BFD_RELOC_RX_DIR3U_PCREL
--@deffnx {} BFD_RELOC_RX_DIFF
--@deffnx {} BFD_RELOC_RX_GPRELB
--@deffnx {} BFD_RELOC_RX_GPRELW
--@deffnx {} BFD_RELOC_RX_GPRELL
--@deffnx {} BFD_RELOC_RX_SYM
--@deffnx {} BFD_RELOC_RX_OP_SUBTRACT
--@deffnx {} BFD_RELOC_RX_OP_NEG
--@deffnx {} BFD_RELOC_RX_ABS8
--@deffnx {} BFD_RELOC_RX_ABS16
--@deffnx {} BFD_RELOC_RX_ABS16_REV
--@deffnx {} BFD_RELOC_RX_ABS32
--@deffnx {} BFD_RELOC_RX_ABS32_REV
--@deffnx {} BFD_RELOC_RX_ABS16U
--@deffnx {} BFD_RELOC_RX_ABS16UW
--@deffnx {} BFD_RELOC_RX_ABS16UL
--@deffnx {} BFD_RELOC_RX_RELAX
--Renesas RX Relocations.
--@end deffn
--@deffn {} BFD_RELOC_390_12
--Direct 12 bit.
--@end deffn
--@deffn {} BFD_RELOC_390_GOT12
--12 bit GOT offset.
--@end deffn
--@deffn {} BFD_RELOC_390_PLT32
--32 bit PC relative PLT address.
--@end deffn
--@deffn {} BFD_RELOC_390_COPY
--Copy symbol at runtime.
--@end deffn
--@deffn {} BFD_RELOC_390_GLOB_DAT
--Create GOT entry.
--@end deffn
--@deffn {} BFD_RELOC_390_JMP_SLOT
--Create PLT entry.
--@end deffn
--@deffn {} BFD_RELOC_390_RELATIVE
--Adjust by program base.
--@end deffn
--@deffn {} BFD_RELOC_390_GOTPC
--32 bit PC relative offset to GOT.
--@end deffn
--@deffn {} BFD_RELOC_390_GOT16
--16 bit GOT offset.
--@end deffn
--@deffn {} BFD_RELOC_390_PC12DBL
--PC relative 12 bit shifted by 1.
--@end deffn
--@deffn {} BFD_RELOC_390_PLT12DBL
--12 bit PC rel. PLT shifted by 1.
--@end deffn
--@deffn {} BFD_RELOC_390_PC16DBL
--PC relative 16 bit shifted by 1.
--@end deffn
--@deffn {} BFD_RELOC_390_PLT16DBL
--16 bit PC rel. PLT shifted by 1.
--@end deffn
--@deffn {} BFD_RELOC_390_PC24DBL
--PC relative 24 bit shifted by 1.
--@end deffn
--@deffn {} BFD_RELOC_390_PLT24DBL
--24 bit PC rel. PLT shifted by 1.
--@end deffn
--@deffn {} BFD_RELOC_390_PC32DBL
--PC relative 32 bit shifted by 1.
--@end deffn
--@deffn {} BFD_RELOC_390_PLT32DBL
--32 bit PC rel. PLT shifted by 1.
--@end deffn
--@deffn {} BFD_RELOC_390_GOTPCDBL
--32 bit PC rel. GOT shifted by 1.
--@end deffn
--@deffn {} BFD_RELOC_390_GOT64
--64 bit GOT offset.
--@end deffn
--@deffn {} BFD_RELOC_390_PLT64
--64 bit PC relative PLT address.
--@end deffn
--@deffn {} BFD_RELOC_390_GOTENT
--32 bit rel. offset to GOT entry.
--@end deffn
--@deffn {} BFD_RELOC_390_GOTOFF64
--64 bit offset to GOT.
--@end deffn
--@deffn {} BFD_RELOC_390_GOTPLT12
--12-bit offset to symbol-entry within GOT, with PLT handling.
--@end deffn
--@deffn {} BFD_RELOC_390_GOTPLT16
--16-bit offset to symbol-entry within GOT, with PLT handling.
--@end deffn
--@deffn {} BFD_RELOC_390_GOTPLT32
--32-bit offset to symbol-entry within GOT, with PLT handling.
--@end deffn
--@deffn {} BFD_RELOC_390_GOTPLT64
--64-bit offset to symbol-entry within GOT, with PLT handling.
--@end deffn
--@deffn {} BFD_RELOC_390_GOTPLTENT
--32-bit rel. offset to symbol-entry within GOT, with PLT handling.
--@end deffn
--@deffn {} BFD_RELOC_390_PLTOFF16
--16-bit rel. offset from the GOT to a PLT entry.
--@end deffn
--@deffn {} BFD_RELOC_390_PLTOFF32
--32-bit rel. offset from the GOT to a PLT entry.
--@end deffn
--@deffn {} BFD_RELOC_390_PLTOFF64
--64-bit rel. offset from the GOT to a PLT entry.
--@end deffn
--@deffn {} BFD_RELOC_390_TLS_LOAD
--@deffnx {} BFD_RELOC_390_TLS_GDCALL
--@deffnx {} BFD_RELOC_390_TLS_LDCALL
--@deffnx {} BFD_RELOC_390_TLS_GD32
--@deffnx {} BFD_RELOC_390_TLS_GD64
--@deffnx {} BFD_RELOC_390_TLS_GOTIE12
--@deffnx {} BFD_RELOC_390_TLS_GOTIE32
--@deffnx {} BFD_RELOC_390_TLS_GOTIE64
--@deffnx {} BFD_RELOC_390_TLS_LDM32
--@deffnx {} BFD_RELOC_390_TLS_LDM64
--@deffnx {} BFD_RELOC_390_TLS_IE32
--@deffnx {} BFD_RELOC_390_TLS_IE64
--@deffnx {} BFD_RELOC_390_TLS_IEENT
--@deffnx {} BFD_RELOC_390_TLS_LE32
--@deffnx {} BFD_RELOC_390_TLS_LE64
--@deffnx {} BFD_RELOC_390_TLS_LDO32
--@deffnx {} BFD_RELOC_390_TLS_LDO64
--@deffnx {} BFD_RELOC_390_TLS_DTPMOD
--@deffnx {} BFD_RELOC_390_TLS_DTPOFF
--@deffnx {} BFD_RELOC_390_TLS_TPOFF
--s390 tls relocations.
--@end deffn
--@deffn {} BFD_RELOC_390_20
--@deffnx {} BFD_RELOC_390_GOT20
--@deffnx {} BFD_RELOC_390_GOTPLT20
--@deffnx {} BFD_RELOC_390_TLS_GOTIE20
--Long displacement extension.
--@end deffn
--@deffn {} BFD_RELOC_390_IRELATIVE
--STT_GNU_IFUNC relocation.
--@end deffn
--@deffn {} BFD_RELOC_SCORE_GPREL15
--Score relocations
--Low 16 bit for load/store
--@end deffn
--@deffn {} BFD_RELOC_SCORE_DUMMY2
--@deffnx {} BFD_RELOC_SCORE_JMP
--This is a 24-bit reloc with the right 1 bit assumed to be 0
--@end deffn
--@deffn {} BFD_RELOC_SCORE_BRANCH
--This is a 19-bit reloc with the right 1 bit assumed to be 0
--@end deffn
--@deffn {} BFD_RELOC_SCORE_IMM30
--This is a 32-bit reloc for 48-bit instructions.
--@end deffn
--@deffn {} BFD_RELOC_SCORE_IMM32
--This is a 32-bit reloc for 48-bit instructions.
--@end deffn
--@deffn {} BFD_RELOC_SCORE16_JMP
--This is a 11-bit reloc with the right 1 bit assumed to be 0
--@end deffn
--@deffn {} BFD_RELOC_SCORE16_BRANCH
--This is a 8-bit reloc with the right 1 bit assumed to be 0
--@end deffn
--@deffn {} BFD_RELOC_SCORE_BCMP
--This is a 9-bit reloc with the right 1 bit assumed to be 0
--@end deffn
--@deffn {} BFD_RELOC_SCORE_GOT15
--@deffnx {} BFD_RELOC_SCORE_GOT_LO16
--@deffnx {} BFD_RELOC_SCORE_CALL15
--@deffnx {} BFD_RELOC_SCORE_DUMMY_HI16
--Undocumented Score relocs
--@end deffn
--@deffn {} BFD_RELOC_IP2K_FR9
--Scenix IP2K - 9-bit register number / data address
--@end deffn
--@deffn {} BFD_RELOC_IP2K_BANK
--Scenix IP2K - 4-bit register/data bank number
--@end deffn
--@deffn {} BFD_RELOC_IP2K_ADDR16CJP
--Scenix IP2K - low 13 bits of instruction word address
--@end deffn
--@deffn {} BFD_RELOC_IP2K_PAGE3
--Scenix IP2K - high 3 bits of instruction word address
--@end deffn
--@deffn {} BFD_RELOC_IP2K_LO8DATA
--@deffnx {} BFD_RELOC_IP2K_HI8DATA
--@deffnx {} BFD_RELOC_IP2K_EX8DATA
--Scenix IP2K - ext/low/high 8 bits of data address
--@end deffn
--@deffn {} BFD_RELOC_IP2K_LO8INSN
--@deffnx {} BFD_RELOC_IP2K_HI8INSN
--Scenix IP2K - low/high 8 bits of instruction word address
--@end deffn
--@deffn {} BFD_RELOC_IP2K_PC_SKIP
--Scenix IP2K - even/odd PC modifier to modify snb pcl.0
--@end deffn
--@deffn {} BFD_RELOC_IP2K_TEXT
--Scenix IP2K - 16 bit word address in text section.
--@end deffn
--@deffn {} BFD_RELOC_IP2K_FR_OFFSET
--Scenix IP2K - 7-bit sp or dp offset
--@end deffn
--@deffn {} BFD_RELOC_VPE4KMATH_DATA
--@deffnx {} BFD_RELOC_VPE4KMATH_INSN
--Scenix VPE4K coprocessor - data/insn-space addressing
--@end deffn
--@deffn {} BFD_RELOC_VTABLE_INHERIT
--@deffnx {} BFD_RELOC_VTABLE_ENTRY
--These two relocations are used by the linker to determine which of
--the entries in a C++ virtual function table are actually used. When
--the --gc-sections option is given, the linker will zero out the entries
--that are not used, so that the code for those functions need not be
--included in the output.
--
--VTABLE_INHERIT is a zero-space relocation used to describe to the
--linker the inheritance tree of a C++ virtual function table. The
--relocation's symbol should be the parent class' vtable, and the
--relocation should be located at the child vtable.
--
--VTABLE_ENTRY is a zero-space relocation that describes the use of a
--virtual function table entry. The reloc's symbol should refer to the
--table of the class mentioned in the code. Off of that base, an offset
--describes the entry that is being used. For Rela hosts, this offset
--is stored in the reloc's addend. For Rel hosts, we are forced to put
--this offset in the reloc's section offset.
--@end deffn
--@deffn {} BFD_RELOC_IA64_IMM14
--@deffnx {} BFD_RELOC_IA64_IMM22
--@deffnx {} BFD_RELOC_IA64_IMM64
--@deffnx {} BFD_RELOC_IA64_DIR32MSB
--@deffnx {} BFD_RELOC_IA64_DIR32LSB
--@deffnx {} BFD_RELOC_IA64_DIR64MSB
--@deffnx {} BFD_RELOC_IA64_DIR64LSB
--@deffnx {} BFD_RELOC_IA64_GPREL22
--@deffnx {} BFD_RELOC_IA64_GPREL64I
--@deffnx {} BFD_RELOC_IA64_GPREL32MSB
--@deffnx {} BFD_RELOC_IA64_GPREL32LSB
--@deffnx {} BFD_RELOC_IA64_GPREL64MSB
--@deffnx {} BFD_RELOC_IA64_GPREL64LSB
--@deffnx {} BFD_RELOC_IA64_LTOFF22
--@deffnx {} BFD_RELOC_IA64_LTOFF64I
--@deffnx {} BFD_RELOC_IA64_PLTOFF22
--@deffnx {} BFD_RELOC_IA64_PLTOFF64I
--@deffnx {} BFD_RELOC_IA64_PLTOFF64MSB
--@deffnx {} BFD_RELOC_IA64_PLTOFF64LSB
--@deffnx {} BFD_RELOC_IA64_FPTR64I
--@deffnx {} BFD_RELOC_IA64_FPTR32MSB
--@deffnx {} BFD_RELOC_IA64_FPTR32LSB
--@deffnx {} BFD_RELOC_IA64_FPTR64MSB
--@deffnx {} BFD_RELOC_IA64_FPTR64LSB
--@deffnx {} BFD_RELOC_IA64_PCREL21B
--@deffnx {} BFD_RELOC_IA64_PCREL21BI
--@deffnx {} BFD_RELOC_IA64_PCREL21M
--@deffnx {} BFD_RELOC_IA64_PCREL21F
--@deffnx {} BFD_RELOC_IA64_PCREL22
--@deffnx {} BFD_RELOC_IA64_PCREL60B
--@deffnx {} BFD_RELOC_IA64_PCREL64I
--@deffnx {} BFD_RELOC_IA64_PCREL32MSB
--@deffnx {} BFD_RELOC_IA64_PCREL32LSB
--@deffnx {} BFD_RELOC_IA64_PCREL64MSB
--@deffnx {} BFD_RELOC_IA64_PCREL64LSB
--@deffnx {} BFD_RELOC_IA64_LTOFF_FPTR22
--@deffnx {} BFD_RELOC_IA64_LTOFF_FPTR64I
--@deffnx {} BFD_RELOC_IA64_LTOFF_FPTR32MSB
--@deffnx {} BFD_RELOC_IA64_LTOFF_FPTR32LSB
--@deffnx {} BFD_RELOC_IA64_LTOFF_FPTR64MSB
--@deffnx {} BFD_RELOC_IA64_LTOFF_FPTR64LSB
--@deffnx {} BFD_RELOC_IA64_SEGREL32MSB
--@deffnx {} BFD_RELOC_IA64_SEGREL32LSB
--@deffnx {} BFD_RELOC_IA64_SEGREL64MSB
--@deffnx {} BFD_RELOC_IA64_SEGREL64LSB
--@deffnx {} BFD_RELOC_IA64_SECREL32MSB
--@deffnx {} BFD_RELOC_IA64_SECREL32LSB
--@deffnx {} BFD_RELOC_IA64_SECREL64MSB
--@deffnx {} BFD_RELOC_IA64_SECREL64LSB
--@deffnx {} BFD_RELOC_IA64_REL32MSB
--@deffnx {} BFD_RELOC_IA64_REL32LSB
--@deffnx {} BFD_RELOC_IA64_REL64MSB
--@deffnx {} BFD_RELOC_IA64_REL64LSB
--@deffnx {} BFD_RELOC_IA64_LTV32MSB
--@deffnx {} BFD_RELOC_IA64_LTV32LSB
--@deffnx {} BFD_RELOC_IA64_LTV64MSB
--@deffnx {} BFD_RELOC_IA64_LTV64LSB
--@deffnx {} BFD_RELOC_IA64_IPLTMSB
--@deffnx {} BFD_RELOC_IA64_IPLTLSB
--@deffnx {} BFD_RELOC_IA64_COPY
--@deffnx {} BFD_RELOC_IA64_LTOFF22X
--@deffnx {} BFD_RELOC_IA64_LDXMOV
--@deffnx {} BFD_RELOC_IA64_TPREL14
--@deffnx {} BFD_RELOC_IA64_TPREL22
--@deffnx {} BFD_RELOC_IA64_TPREL64I
--@deffnx {} BFD_RELOC_IA64_TPREL64MSB
--@deffnx {} BFD_RELOC_IA64_TPREL64LSB
--@deffnx {} BFD_RELOC_IA64_LTOFF_TPREL22
--@deffnx {} BFD_RELOC_IA64_DTPMOD64MSB
--@deffnx {} BFD_RELOC_IA64_DTPMOD64LSB
--@deffnx {} BFD_RELOC_IA64_LTOFF_DTPMOD22
--@deffnx {} BFD_RELOC_IA64_DTPREL14
--@deffnx {} BFD_RELOC_IA64_DTPREL22
--@deffnx {} BFD_RELOC_IA64_DTPREL64I
--@deffnx {} BFD_RELOC_IA64_DTPREL32MSB
--@deffnx {} BFD_RELOC_IA64_DTPREL32LSB
--@deffnx {} BFD_RELOC_IA64_DTPREL64MSB
--@deffnx {} BFD_RELOC_IA64_DTPREL64LSB
--@deffnx {} BFD_RELOC_IA64_LTOFF_DTPREL22
--Intel IA64 Relocations.
--@end deffn
--@deffn {} BFD_RELOC_M68HC11_HI8
--Motorola 68HC11 reloc.
--This is the 8 bit high part of an absolute address.
--@end deffn
--@deffn {} BFD_RELOC_M68HC11_LO8
--Motorola 68HC11 reloc.
--This is the 8 bit low part of an absolute address.
--@end deffn
--@deffn {} BFD_RELOC_M68HC11_3B
--Motorola 68HC11 reloc.
--This is the 3 bit of a value.
--@end deffn
--@deffn {} BFD_RELOC_M68HC11_RL_JUMP
--Motorola 68HC11 reloc.
--This reloc marks the beginning of a jump/call instruction.
--It is used for linker relaxation to correctly identify beginning
--of instruction and change some branches to use PC-relative
--addressing mode.
--@end deffn
--@deffn {} BFD_RELOC_M68HC11_RL_GROUP
--Motorola 68HC11 reloc.
--This reloc marks a group of several instructions that gcc generates
--and for which the linker relaxation pass can modify and/or remove
--some of them.
--@end deffn
--@deffn {} BFD_RELOC_M68HC11_LO16
--Motorola 68HC11 reloc.
--This is the 16-bit lower part of an address. It is used for 'call'
--instruction to specify the symbol address without any special
--transformation (due to memory bank window).
--@end deffn
--@deffn {} BFD_RELOC_M68HC11_PAGE
--Motorola 68HC11 reloc.
--This is a 8-bit reloc that specifies the page number of an address.
--It is used by 'call' instruction to specify the page number of
--the symbol.
--@end deffn
--@deffn {} BFD_RELOC_M68HC11_24
--Motorola 68HC11 reloc.
--This is a 24-bit reloc that represents the address with a 16-bit
--value and a 8-bit page number. The symbol address is transformed
--to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
--@end deffn
--@deffn {} BFD_RELOC_M68HC12_5B
--Motorola 68HC12 reloc.
--This is the 5 bits of a value.
--@end deffn
--@deffn {} BFD_RELOC_XGATE_RL_JUMP
--Freescale XGATE reloc.
--This reloc marks the beginning of a bra/jal instruction.
--@end deffn
--@deffn {} BFD_RELOC_XGATE_RL_GROUP
--Freescale XGATE reloc.
--This reloc marks a group of several instructions that gcc generates
--and for which the linker relaxation pass can modify and/or remove
--some of them.
--@end deffn
--@deffn {} BFD_RELOC_XGATE_LO16
--Freescale XGATE reloc.
--This is the 16-bit lower part of an address. It is used for the '16-bit'
--instructions.
--@end deffn
--@deffn {} BFD_RELOC_XGATE_GPAGE
--Freescale XGATE reloc.
--@end deffn
--@deffn {} BFD_RELOC_XGATE_24
--Freescale XGATE reloc.
--@end deffn
--@deffn {} BFD_RELOC_XGATE_PCREL_9
--Freescale XGATE reloc.
--This is a 9-bit pc-relative reloc.
--@end deffn
--@deffn {} BFD_RELOC_XGATE_PCREL_10
--Freescale XGATE reloc.
--This is a 10-bit pc-relative reloc.
--@end deffn
--@deffn {} BFD_RELOC_XGATE_IMM8_LO
--Freescale XGATE reloc.
--This is the 16-bit lower part of an address. It is used for the '16-bit'
--instructions.
--@end deffn
--@deffn {} BFD_RELOC_XGATE_IMM8_HI
--Freescale XGATE reloc.
--This is the 16-bit higher part of an address. It is used for the '16-bit'
--instructions.
--@end deffn
--@deffn {} BFD_RELOC_XGATE_IMM3
--Freescale XGATE reloc.
--This is a 3-bit pc-relative reloc.
--@end deffn
--@deffn {} BFD_RELOC_XGATE_IMM4
--Freescale XGATE reloc.
--This is a 4-bit pc-relative reloc.
--@end deffn
--@deffn {} BFD_RELOC_XGATE_IMM5
--Freescale XGATE reloc.
--This is a 5-bit pc-relative reloc.
--@end deffn
--@deffn {} BFD_RELOC_M68HC12_9B
--Motorola 68HC12 reloc.
--This is the 9 bits of a value.
--@end deffn
--@deffn {} BFD_RELOC_M68HC12_16B
--Motorola 68HC12 reloc.
--This is the 16 bits of a value.
--@end deffn
--@deffn {} BFD_RELOC_M68HC12_9_PCREL
--Motorola 68HC12/XGATE reloc.
--This is a PCREL9 branch.
--@end deffn
--@deffn {} BFD_RELOC_M68HC12_10_PCREL
--Motorola 68HC12/XGATE reloc.
--This is a PCREL10 branch.
--@end deffn
--@deffn {} BFD_RELOC_M68HC12_LO8XG
--Motorola 68HC12/XGATE reloc.
--This is the 8 bit low part of an absolute address and immediately precedes
--a matching HI8XG part.
--@end deffn
--@deffn {} BFD_RELOC_M68HC12_HI8XG
--Motorola 68HC12/XGATE reloc.
--This is the 8 bit high part of an absolute address and immediately follows
--a matching LO8XG part.
--@end deffn
--@deffn {} BFD_RELOC_16C_NUM08
--@deffnx {} BFD_RELOC_16C_NUM08_C
--@deffnx {} BFD_RELOC_16C_NUM16
--@deffnx {} BFD_RELOC_16C_NUM16_C
--@deffnx {} BFD_RELOC_16C_NUM32
--@deffnx {} BFD_RELOC_16C_NUM32_C
--@deffnx {} BFD_RELOC_16C_DISP04
--@deffnx {} BFD_RELOC_16C_DISP04_C
--@deffnx {} BFD_RELOC_16C_DISP08
--@deffnx {} BFD_RELOC_16C_DISP08_C
--@deffnx {} BFD_RELOC_16C_DISP16
--@deffnx {} BFD_RELOC_16C_DISP16_C
--@deffnx {} BFD_RELOC_16C_DISP24
--@deffnx {} BFD_RELOC_16C_DISP24_C
--@deffnx {} BFD_RELOC_16C_DISP24a
--@deffnx {} BFD_RELOC_16C_DISP24a_C
--@deffnx {} BFD_RELOC_16C_REG04
--@deffnx {} BFD_RELOC_16C_REG04_C
--@deffnx {} BFD_RELOC_16C_REG04a
--@deffnx {} BFD_RELOC_16C_REG04a_C
--@deffnx {} BFD_RELOC_16C_REG14
--@deffnx {} BFD_RELOC_16C_REG14_C
--@deffnx {} BFD_RELOC_16C_REG16
--@deffnx {} BFD_RELOC_16C_REG16_C
--@deffnx {} BFD_RELOC_16C_REG20
--@deffnx {} BFD_RELOC_16C_REG20_C
--@deffnx {} BFD_RELOC_16C_ABS20
--@deffnx {} BFD_RELOC_16C_ABS20_C
--@deffnx {} BFD_RELOC_16C_ABS24
--@deffnx {} BFD_RELOC_16C_ABS24_C
--@deffnx {} BFD_RELOC_16C_IMM04
--@deffnx {} BFD_RELOC_16C_IMM04_C
--@deffnx {} BFD_RELOC_16C_IMM16
--@deffnx {} BFD_RELOC_16C_IMM16_C
--@deffnx {} BFD_RELOC_16C_IMM20
--@deffnx {} BFD_RELOC_16C_IMM20_C
--@deffnx {} BFD_RELOC_16C_IMM24
--@deffnx {} BFD_RELOC_16C_IMM24_C
--@deffnx {} BFD_RELOC_16C_IMM32
--@deffnx {} BFD_RELOC_16C_IMM32_C
--NS CR16C Relocations.
--@end deffn
--@deffn {} BFD_RELOC_CR16_NUM8
--@deffnx {} BFD_RELOC_CR16_NUM16
--@deffnx {} BFD_RELOC_CR16_NUM32
--@deffnx {} BFD_RELOC_CR16_NUM32a
--@deffnx {} BFD_RELOC_CR16_REGREL0
--@deffnx {} BFD_RELOC_CR16_REGREL4
--@deffnx {} BFD_RELOC_CR16_REGREL4a
--@deffnx {} BFD_RELOC_CR16_REGREL14
--@deffnx {} BFD_RELOC_CR16_REGREL14a
--@deffnx {} BFD_RELOC_CR16_REGREL16
--@deffnx {} BFD_RELOC_CR16_REGREL20
--@deffnx {} BFD_RELOC_CR16_REGREL20a
--@deffnx {} BFD_RELOC_CR16_ABS20
--@deffnx {} BFD_RELOC_CR16_ABS24
--@deffnx {} BFD_RELOC_CR16_IMM4
--@deffnx {} BFD_RELOC_CR16_IMM8
--@deffnx {} BFD_RELOC_CR16_IMM16
--@deffnx {} BFD_RELOC_CR16_IMM20
--@deffnx {} BFD_RELOC_CR16_IMM24
--@deffnx {} BFD_RELOC_CR16_IMM32
--@deffnx {} BFD_RELOC_CR16_IMM32a
--@deffnx {} BFD_RELOC_CR16_DISP4
--@deffnx {} BFD_RELOC_CR16_DISP8
--@deffnx {} BFD_RELOC_CR16_DISP16
--@deffnx {} BFD_RELOC_CR16_DISP20
--@deffnx {} BFD_RELOC_CR16_DISP24
--@deffnx {} BFD_RELOC_CR16_DISP24a
--@deffnx {} BFD_RELOC_CR16_SWITCH8
--@deffnx {} BFD_RELOC_CR16_SWITCH16
--@deffnx {} BFD_RELOC_CR16_SWITCH32
--@deffnx {} BFD_RELOC_CR16_GOT_REGREL20
--@deffnx {} BFD_RELOC_CR16_GOTC_REGREL20
--@deffnx {} BFD_RELOC_CR16_GLOB_DAT
--NS CR16 Relocations.
--@end deffn
--@deffn {} BFD_RELOC_CRX_REL4
--@deffnx {} BFD_RELOC_CRX_REL8
--@deffnx {} BFD_RELOC_CRX_REL8_CMP
--@deffnx {} BFD_RELOC_CRX_REL16
--@deffnx {} BFD_RELOC_CRX_REL24
--@deffnx {} BFD_RELOC_CRX_REL32
--@deffnx {} BFD_RELOC_CRX_REGREL12
--@deffnx {} BFD_RELOC_CRX_REGREL22
--@deffnx {} BFD_RELOC_CRX_REGREL28
--@deffnx {} BFD_RELOC_CRX_REGREL32
--@deffnx {} BFD_RELOC_CRX_ABS16
--@deffnx {} BFD_RELOC_CRX_ABS32
--@deffnx {} BFD_RELOC_CRX_NUM8
--@deffnx {} BFD_RELOC_CRX_NUM16
--@deffnx {} BFD_RELOC_CRX_NUM32
--@deffnx {} BFD_RELOC_CRX_IMM16
--@deffnx {} BFD_RELOC_CRX_IMM32
--@deffnx {} BFD_RELOC_CRX_SWITCH8
--@deffnx {} BFD_RELOC_CRX_SWITCH16
--@deffnx {} BFD_RELOC_CRX_SWITCH32
--NS CRX Relocations.
--@end deffn
--@deffn {} BFD_RELOC_CRIS_BDISP8
--@deffnx {} BFD_RELOC_CRIS_UNSIGNED_5
--@deffnx {} BFD_RELOC_CRIS_SIGNED_6
--@deffnx {} BFD_RELOC_CRIS_UNSIGNED_6
--@deffnx {} BFD_RELOC_CRIS_SIGNED_8
--@deffnx {} BFD_RELOC_CRIS_UNSIGNED_8
--@deffnx {} BFD_RELOC_CRIS_SIGNED_16
--@deffnx {} BFD_RELOC_CRIS_UNSIGNED_16
--@deffnx {} BFD_RELOC_CRIS_LAPCQ_OFFSET
--@deffnx {} BFD_RELOC_CRIS_UNSIGNED_4
--These relocs are only used within the CRIS assembler. They are not
--(at present) written to any object files.
--@end deffn
--@deffn {} BFD_RELOC_CRIS_COPY
--@deffnx {} BFD_RELOC_CRIS_GLOB_DAT
--@deffnx {} BFD_RELOC_CRIS_JUMP_SLOT
--@deffnx {} BFD_RELOC_CRIS_RELATIVE
--Relocs used in ELF shared libraries for CRIS.
--@end deffn
--@deffn {} BFD_RELOC_CRIS_32_GOT
--32-bit offset to symbol-entry within GOT.
--@end deffn
--@deffn {} BFD_RELOC_CRIS_16_GOT
--16-bit offset to symbol-entry within GOT.
--@end deffn
--@deffn {} BFD_RELOC_CRIS_32_GOTPLT
--32-bit offset to symbol-entry within GOT, with PLT handling.
--@end deffn
--@deffn {} BFD_RELOC_CRIS_16_GOTPLT
--16-bit offset to symbol-entry within GOT, with PLT handling.
--@end deffn
--@deffn {} BFD_RELOC_CRIS_32_GOTREL
--32-bit offset to symbol, relative to GOT.
--@end deffn
--@deffn {} BFD_RELOC_CRIS_32_PLT_GOTREL
--32-bit offset to symbol with PLT entry, relative to GOT.
--@end deffn
--@deffn {} BFD_RELOC_CRIS_32_PLT_PCREL
--32-bit offset to symbol with PLT entry, relative to this relocation.
--@end deffn
--@deffn {} BFD_RELOC_CRIS_32_GOT_GD
--@deffnx {} BFD_RELOC_CRIS_16_GOT_GD
--@deffnx {} BFD_RELOC_CRIS_32_GD
--@deffnx {} BFD_RELOC_CRIS_DTP
--@deffnx {} BFD_RELOC_CRIS_32_DTPREL
--@deffnx {} BFD_RELOC_CRIS_16_DTPREL
--@deffnx {} BFD_RELOC_CRIS_32_GOT_TPREL
--@deffnx {} BFD_RELOC_CRIS_16_GOT_TPREL
--@deffnx {} BFD_RELOC_CRIS_32_TPREL
--@deffnx {} BFD_RELOC_CRIS_16_TPREL
--@deffnx {} BFD_RELOC_CRIS_DTPMOD
--@deffnx {} BFD_RELOC_CRIS_32_IE
--Relocs used in TLS code for CRIS.
--@end deffn
--@deffn {} BFD_RELOC_860_COPY
--@deffnx {} BFD_RELOC_860_GLOB_DAT
--@deffnx {} BFD_RELOC_860_JUMP_SLOT
--@deffnx {} BFD_RELOC_860_RELATIVE
--@deffnx {} BFD_RELOC_860_PC26
--@deffnx {} BFD_RELOC_860_PLT26
--@deffnx {} BFD_RELOC_860_PC16
--@deffnx {} BFD_RELOC_860_LOW0
--@deffnx {} BFD_RELOC_860_SPLIT0
--@deffnx {} BFD_RELOC_860_LOW1
--@deffnx {} BFD_RELOC_860_SPLIT1
--@deffnx {} BFD_RELOC_860_LOW2
--@deffnx {} BFD_RELOC_860_SPLIT2
--@deffnx {} BFD_RELOC_860_LOW3
--@deffnx {} BFD_RELOC_860_LOGOT0
--@deffnx {} BFD_RELOC_860_SPGOT0
--@deffnx {} BFD_RELOC_860_LOGOT1
--@deffnx {} BFD_RELOC_860_SPGOT1
--@deffnx {} BFD_RELOC_860_LOGOTOFF0
--@deffnx {} BFD_RELOC_860_SPGOTOFF0
--@deffnx {} BFD_RELOC_860_LOGOTOFF1
--@deffnx {} BFD_RELOC_860_SPGOTOFF1
--@deffnx {} BFD_RELOC_860_LOGOTOFF2
--@deffnx {} BFD_RELOC_860_LOGOTOFF3
--@deffnx {} BFD_RELOC_860_LOPC
--@deffnx {} BFD_RELOC_860_HIGHADJ
--@deffnx {} BFD_RELOC_860_HAGOT
--@deffnx {} BFD_RELOC_860_HAGOTOFF
--@deffnx {} BFD_RELOC_860_HAPC
--@deffnx {} BFD_RELOC_860_HIGH
--@deffnx {} BFD_RELOC_860_HIGOT
--@deffnx {} BFD_RELOC_860_HIGOTOFF
--Intel i860 Relocations.
--@end deffn
--@deffn {} BFD_RELOC_OPENRISC_ABS_26
--@deffnx {} BFD_RELOC_OPENRISC_REL_26
--OpenRISC Relocations.
--@end deffn
--@deffn {} BFD_RELOC_H8_DIR16A8
--@deffnx {} BFD_RELOC_H8_DIR16R8
--@deffnx {} BFD_RELOC_H8_DIR24A8
--@deffnx {} BFD_RELOC_H8_DIR24R8
--@deffnx {} BFD_RELOC_H8_DIR32A16
--@deffnx {} BFD_RELOC_H8_DISP32A16
--H8 elf Relocations.
--@end deffn
--@deffn {} BFD_RELOC_XSTORMY16_REL_12
--@deffnx {} BFD_RELOC_XSTORMY16_12
--@deffnx {} BFD_RELOC_XSTORMY16_24
--@deffnx {} BFD_RELOC_XSTORMY16_FPTR16
--Sony Xstormy16 Relocations.
--@end deffn
--@deffn {} BFD_RELOC_RELC
--Self-describing complex relocations.
--@end deffn
--@deffn {} BFD_RELOC_XC16X_PAG
--@deffnx {} BFD_RELOC_XC16X_POF
--@deffnx {} BFD_RELOC_XC16X_SEG
--@deffnx {} BFD_RELOC_XC16X_SOF
--Infineon Relocations.
--@end deffn
--@deffn {} BFD_RELOC_VAX_GLOB_DAT
--@deffnx {} BFD_RELOC_VAX_JMP_SLOT
--@deffnx {} BFD_RELOC_VAX_RELATIVE
--Relocations used by VAX ELF.
--@end deffn
--@deffn {} BFD_RELOC_MT_PC16
--Morpho MT - 16 bit immediate relocation.
--@end deffn
--@deffn {} BFD_RELOC_MT_HI16
--Morpho MT - Hi 16 bits of an address.
--@end deffn
--@deffn {} BFD_RELOC_MT_LO16
--Morpho MT - Low 16 bits of an address.
--@end deffn
--@deffn {} BFD_RELOC_MT_GNU_VTINHERIT
--Morpho MT - Used to tell the linker which vtable entries are used.
--@end deffn
--@deffn {} BFD_RELOC_MT_GNU_VTENTRY
--Morpho MT - Used to tell the linker which vtable entries are used.
--@end deffn
--@deffn {} BFD_RELOC_MT_PCINSN8
--Morpho MT - 8 bit immediate relocation.
--@end deffn
--@deffn {} BFD_RELOC_MSP430_10_PCREL
--@deffnx {} BFD_RELOC_MSP430_16_PCREL
--@deffnx {} BFD_RELOC_MSP430_16
--@deffnx {} BFD_RELOC_MSP430_16_PCREL_BYTE
--@deffnx {} BFD_RELOC_MSP430_16_BYTE
--@deffnx {} BFD_RELOC_MSP430_2X_PCREL
--@deffnx {} BFD_RELOC_MSP430_RL_PCREL
--@deffnx {} BFD_RELOC_MSP430_ABS8
--@deffnx {} BFD_RELOC_MSP430X_PCR20_EXT_SRC
--@deffnx {} BFD_RELOC_MSP430X_PCR20_EXT_DST
--@deffnx {} BFD_RELOC_MSP430X_PCR20_EXT_ODST
--@deffnx {} BFD_RELOC_MSP430X_ABS20_EXT_SRC
--@deffnx {} BFD_RELOC_MSP430X_ABS20_EXT_DST
--@deffnx {} BFD_RELOC_MSP430X_ABS20_EXT_ODST
--@deffnx {} BFD_RELOC_MSP430X_ABS20_ADR_SRC
--@deffnx {} BFD_RELOC_MSP430X_ABS20_ADR_DST
--@deffnx {} BFD_RELOC_MSP430X_PCR16
--@deffnx {} BFD_RELOC_MSP430X_PCR20_CALL
--@deffnx {} BFD_RELOC_MSP430X_ABS16
--@deffnx {} BFD_RELOC_MSP430_ABS_HI16
--@deffnx {} BFD_RELOC_MSP430_PREL31
--@deffnx {} BFD_RELOC_MSP430_SYM_DIFF
--msp430 specific relocation codes
--@end deffn
--@deffn {} BFD_RELOC_NIOS2_S16
--@deffnx {} BFD_RELOC_NIOS2_U16
--@deffnx {} BFD_RELOC_NIOS2_CALL26
--@deffnx {} BFD_RELOC_NIOS2_IMM5
--@deffnx {} BFD_RELOC_NIOS2_CACHE_OPX
--@deffnx {} BFD_RELOC_NIOS2_IMM6
--@deffnx {} BFD_RELOC_NIOS2_IMM8
--@deffnx {} BFD_RELOC_NIOS2_HI16
--@deffnx {} BFD_RELOC_NIOS2_LO16
--@deffnx {} BFD_RELOC_NIOS2_HIADJ16
--@deffnx {} BFD_RELOC_NIOS2_GPREL
--@deffnx {} BFD_RELOC_NIOS2_UJMP
--@deffnx {} BFD_RELOC_NIOS2_CJMP
--@deffnx {} BFD_RELOC_NIOS2_CALLR
--@deffnx {} BFD_RELOC_NIOS2_ALIGN
--@deffnx {} BFD_RELOC_NIOS2_GOT16
--@deffnx {} BFD_RELOC_NIOS2_CALL16
--@deffnx {} BFD_RELOC_NIOS2_GOTOFF_LO
--@deffnx {} BFD_RELOC_NIOS2_GOTOFF_HA
--@deffnx {} BFD_RELOC_NIOS2_PCREL_LO
--@deffnx {} BFD_RELOC_NIOS2_PCREL_HA
--@deffnx {} BFD_RELOC_NIOS2_TLS_GD16
--@deffnx {} BFD_RELOC_NIOS2_TLS_LDM16
--@deffnx {} BFD_RELOC_NIOS2_TLS_LDO16
--@deffnx {} BFD_RELOC_NIOS2_TLS_IE16
--@deffnx {} BFD_RELOC_NIOS2_TLS_LE16
--@deffnx {} BFD_RELOC_NIOS2_TLS_DTPMOD
--@deffnx {} BFD_RELOC_NIOS2_TLS_DTPREL
--@deffnx {} BFD_RELOC_NIOS2_TLS_TPREL
--@deffnx {} BFD_RELOC_NIOS2_COPY
--@deffnx {} BFD_RELOC_NIOS2_GLOB_DAT
--@deffnx {} BFD_RELOC_NIOS2_JUMP_SLOT
--@deffnx {} BFD_RELOC_NIOS2_RELATIVE
--@deffnx {} BFD_RELOC_NIOS2_GOTOFF
--Relocations used by the Altera Nios II core.
--@end deffn
--@deffn {} BFD_RELOC_IQ2000_OFFSET_16
--@deffnx {} BFD_RELOC_IQ2000_OFFSET_21
--@deffnx {} BFD_RELOC_IQ2000_UHI16
--IQ2000 Relocations.
--@end deffn
--@deffn {} BFD_RELOC_XTENSA_RTLD
--Special Xtensa relocation used only by PLT entries in ELF shared
--objects to indicate that the runtime linker should set the value
--to one of its own internal functions or data structures.
--@end deffn
--@deffn {} BFD_RELOC_XTENSA_GLOB_DAT
--@deffnx {} BFD_RELOC_XTENSA_JMP_SLOT
--@deffnx {} BFD_RELOC_XTENSA_RELATIVE
--Xtensa relocations for ELF shared objects.
--@end deffn
--@deffn {} BFD_RELOC_XTENSA_PLT
--Xtensa relocation used in ELF object files for symbols that may require
--PLT entries. Otherwise, this is just a generic 32-bit relocation.
--@end deffn
--@deffn {} BFD_RELOC_XTENSA_DIFF8
--@deffnx {} BFD_RELOC_XTENSA_DIFF16
--@deffnx {} BFD_RELOC_XTENSA_DIFF32
--Xtensa relocations to mark the difference of two local symbols.
--These are only needed to support linker relaxation and can be ignored
--when not relaxing. The field is set to the value of the difference
--assuming no relaxation. The relocation encodes the position of the
--first symbol so the linker can determine whether to adjust the field
--value.
--@end deffn
--@deffn {} BFD_RELOC_XTENSA_SLOT0_OP
--@deffnx {} BFD_RELOC_XTENSA_SLOT1_OP
--@deffnx {} BFD_RELOC_XTENSA_SLOT2_OP
--@deffnx {} BFD_RELOC_XTENSA_SLOT3_OP
--@deffnx {} BFD_RELOC_XTENSA_SLOT4_OP
--@deffnx {} BFD_RELOC_XTENSA_SLOT5_OP
--@deffnx {} BFD_RELOC_XTENSA_SLOT6_OP
--@deffnx {} BFD_RELOC_XTENSA_SLOT7_OP
--@deffnx {} BFD_RELOC_XTENSA_SLOT8_OP
--@deffnx {} BFD_RELOC_XTENSA_SLOT9_OP
--@deffnx {} BFD_RELOC_XTENSA_SLOT10_OP
--@deffnx {} BFD_RELOC_XTENSA_SLOT11_OP
--@deffnx {} BFD_RELOC_XTENSA_SLOT12_OP
--@deffnx {} BFD_RELOC_XTENSA_SLOT13_OP
--@deffnx {} BFD_RELOC_XTENSA_SLOT14_OP
--Generic Xtensa relocations for instruction operands. Only the slot
--number is encoded in the relocation. The relocation applies to the
--last PC-relative immediate operand, or if there are no PC-relative
--immediates, to the last immediate operand.
--@end deffn
--@deffn {} BFD_RELOC_XTENSA_SLOT0_ALT
--@deffnx {} BFD_RELOC_XTENSA_SLOT1_ALT
--@deffnx {} BFD_RELOC_XTENSA_SLOT2_ALT
--@deffnx {} BFD_RELOC_XTENSA_SLOT3_ALT
--@deffnx {} BFD_RELOC_XTENSA_SLOT4_ALT
--@deffnx {} BFD_RELOC_XTENSA_SLOT5_ALT
--@deffnx {} BFD_RELOC_XTENSA_SLOT6_ALT
--@deffnx {} BFD_RELOC_XTENSA_SLOT7_ALT
--@deffnx {} BFD_RELOC_XTENSA_SLOT8_ALT
--@deffnx {} BFD_RELOC_XTENSA_SLOT9_ALT
--@deffnx {} BFD_RELOC_XTENSA_SLOT10_ALT
--@deffnx {} BFD_RELOC_XTENSA_SLOT11_ALT
--@deffnx {} BFD_RELOC_XTENSA_SLOT12_ALT
--@deffnx {} BFD_RELOC_XTENSA_SLOT13_ALT
--@deffnx {} BFD_RELOC_XTENSA_SLOT14_ALT
--Alternate Xtensa relocations. Only the slot is encoded in the
--relocation. The meaning of these relocations is opcode-specific.
--@end deffn
--@deffn {} BFD_RELOC_XTENSA_OP0
--@deffnx {} BFD_RELOC_XTENSA_OP1
--@deffnx {} BFD_RELOC_XTENSA_OP2
--Xtensa relocations for backward compatibility. These have all been
--replaced by BFD_RELOC_XTENSA_SLOT0_OP.
--@end deffn
--@deffn {} BFD_RELOC_XTENSA_ASM_EXPAND
--Xtensa relocation to mark that the assembler expanded the
--instructions from an original target. The expansion size is
--encoded in the reloc size.
--@end deffn
--@deffn {} BFD_RELOC_XTENSA_ASM_SIMPLIFY
--Xtensa relocation to mark that the linker should simplify
--assembler-expanded instructions. This is commonly used
--internally by the linker after analysis of a
--BFD_RELOC_XTENSA_ASM_EXPAND.
--@end deffn
--@deffn {} BFD_RELOC_XTENSA_TLSDESC_FN
--@deffnx {} BFD_RELOC_XTENSA_TLSDESC_ARG
--@deffnx {} BFD_RELOC_XTENSA_TLS_DTPOFF
--@deffnx {} BFD_RELOC_XTENSA_TLS_TPOFF
--@deffnx {} BFD_RELOC_XTENSA_TLS_FUNC
--@deffnx {} BFD_RELOC_XTENSA_TLS_ARG
--@deffnx {} BFD_RELOC_XTENSA_TLS_CALL
--Xtensa TLS relocations.
--@end deffn
--@deffn {} BFD_RELOC_Z80_DISP8
--8 bit signed offset in (ix+d) or (iy+d).
--@end deffn
--@deffn {} BFD_RELOC_Z8K_DISP7
--DJNZ offset.
--@end deffn
--@deffn {} BFD_RELOC_Z8K_CALLR
--CALR offset.
--@end deffn
--@deffn {} BFD_RELOC_Z8K_IMM4L
--4 bit value.
--@end deffn
--@deffn {} BFD_RELOC_LM32_CALL
--@deffnx {} BFD_RELOC_LM32_BRANCH
--@deffnx {} BFD_RELOC_LM32_16_GOT
--@deffnx {} BFD_RELOC_LM32_GOTOFF_HI16
--@deffnx {} BFD_RELOC_LM32_GOTOFF_LO16
--@deffnx {} BFD_RELOC_LM32_COPY
--@deffnx {} BFD_RELOC_LM32_GLOB_DAT
--@deffnx {} BFD_RELOC_LM32_JMP_SLOT
--@deffnx {} BFD_RELOC_LM32_RELATIVE
--Lattice Mico32 relocations.
--@end deffn
--@deffn {} BFD_RELOC_MACH_O_SECTDIFF
--Difference between two section addreses. Must be followed by a
--BFD_RELOC_MACH_O_PAIR.
--@end deffn
--@deffn {} BFD_RELOC_MACH_O_LOCAL_SECTDIFF
--Like BFD_RELOC_MACH_O_SECTDIFF but with a local symbol.
--@end deffn
--@deffn {} BFD_RELOC_MACH_O_PAIR
--Pair of relocation. Contains the first symbol.
--@end deffn
--@deffn {} BFD_RELOC_MACH_O_X86_64_BRANCH32
--@deffnx {} BFD_RELOC_MACH_O_X86_64_BRANCH8
--PCREL relocations. They are marked as branch to create PLT entry if
--required.
--@end deffn
--@deffn {} BFD_RELOC_MACH_O_X86_64_GOT
--Used when referencing a GOT entry.
--@end deffn
--@deffn {} BFD_RELOC_MACH_O_X86_64_GOT_LOAD
--Used when loading a GOT entry with movq. It is specially marked so that
--the linker could optimize the movq to a leaq if possible.
--@end deffn
--@deffn {} BFD_RELOC_MACH_O_X86_64_SUBTRACTOR32
--Symbol will be substracted. Must be followed by a BFD_RELOC_64.
--@end deffn
--@deffn {} BFD_RELOC_MACH_O_X86_64_SUBTRACTOR64
--Symbol will be substracted. Must be followed by a BFD_RELOC_64.
--@end deffn
--@deffn {} BFD_RELOC_MACH_O_X86_64_PCREL32_1
--Same as BFD_RELOC_32_PCREL but with an implicit -1 addend.
--@end deffn
--@deffn {} BFD_RELOC_MACH_O_X86_64_PCREL32_2
--Same as BFD_RELOC_32_PCREL but with an implicit -2 addend.
--@end deffn
--@deffn {} BFD_RELOC_MACH_O_X86_64_PCREL32_4
--Same as BFD_RELOC_32_PCREL but with an implicit -4 addend.
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_32_LO
--This is a 32 bit reloc for the microblaze that stores the
--low 16 bits of a value
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_32_LO_PCREL
--This is a 32 bit pc-relative reloc for the microblaze that
--stores the low 16 bits of a value
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_32_ROSDA
--This is a 32 bit reloc for the microblaze that stores a
--value relative to the read-only small data area anchor
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_32_RWSDA
--This is a 32 bit reloc for the microblaze that stores a
--value relative to the read-write small data area anchor
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM
--This is a 32 bit reloc for the microblaze to handle
--expressions of the form "Symbol Op Symbol"
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_64_NONE
--This is a 64 bit reloc that stores the 32 bit pc relative
--value in two words (with an imm instruction). No relocation is
--done here - only used for relaxing
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_64_GOTPC
--This is a 64 bit reloc that stores the 32 bit pc relative
--value in two words (with an imm instruction). The relocation is
--PC-relative GOT offset
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_64_GOT
--This is a 64 bit reloc that stores the 32 bit pc relative
--value in two words (with an imm instruction). The relocation is
--GOT offset
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_64_PLT
--This is a 64 bit reloc that stores the 32 bit pc relative
--value in two words (with an imm instruction). The relocation is
--PC-relative offset into PLT
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_64_GOTOFF
--This is a 64 bit reloc that stores the 32 bit GOT relative
--value in two words (with an imm instruction). The relocation is
--relative offset from _GLOBAL_OFFSET_TABLE_
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_32_GOTOFF
--This is a 32 bit reloc that stores the 32 bit GOT relative
--value in a word. The relocation is relative offset from
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_COPY
--This is used to tell the dynamic linker to copy the value out of
--the dynamic object into the runtime process image.
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_64_TLS
--Unused Reloc
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_64_TLSGD
--This is a 64 bit reloc that stores the 32 bit GOT relative value
--of the GOT TLS GD info entry in two words (with an imm instruction). The
--relocation is GOT offset.
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_64_TLSLD
--This is a 64 bit reloc that stores the 32 bit GOT relative value
--of the GOT TLS LD info entry in two words (with an imm instruction). The
--relocation is GOT offset.
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_32_TLSDTPMOD
--This is a 32 bit reloc that stores the Module ID to GOT(n).
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_32_TLSDTPREL
--This is a 32 bit reloc that stores TLS offset to GOT(n+1).
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_64_TLSDTPREL
--This is a 32 bit reloc for storing TLS offset to two words (uses imm
--instruction)
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_64_TLSGOTTPREL
--This is a 64 bit reloc that stores 32-bit thread pointer relative offset
--to two words (uses imm instruction).
--@end deffn
--@deffn {} BFD_RELOC_MICROBLAZE_64_TLSTPREL
--This is a 64 bit reloc that stores 32-bit thread pointer relative offset
--to two words (uses imm instruction).
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_RELOC_START
--AArch64 pseudo relocation code to mark the start of the AArch64
--relocation enumerators. N.B. the order of the enumerators is
--important as several tables in the AArch64 bfd backend are indexed
--by these enumerators; make sure they are all synced.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_NONE
--AArch64 null relocation code.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_64
--@deffnx {} BFD_RELOC_AARCH64_32
--@deffnx {} BFD_RELOC_AARCH64_16
--Basic absolute relocations of N bits. These are equivalent to
--BFD_RELOC_N and they were added to assist the indexing of the howto
--table.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_64_PCREL
--@deffnx {} BFD_RELOC_AARCH64_32_PCREL
--@deffnx {} BFD_RELOC_AARCH64_16_PCREL
--PC-relative relocations. These are equivalent to BFD_RELOC_N_PCREL
--and they were added to assist the indexing of the howto table.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_MOVW_G0
--AArch64 MOV[NZK] instruction with most significant bits 0 to 15
--of an unsigned address/value.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_MOVW_G0_NC
--AArch64 MOV[NZK] instruction with less significant bits 0 to 15 of
--an address/value. No overflow checking.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_MOVW_G1
--AArch64 MOV[NZK] instruction with most significant bits 16 to 31
--of an unsigned address/value.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_MOVW_G1_NC
--AArch64 MOV[NZK] instruction with less significant bits 16 to 31
--of an address/value. No overflow checking.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_MOVW_G2
--AArch64 MOV[NZK] instruction with most significant bits 32 to 47
--of an unsigned address/value.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_MOVW_G2_NC
--AArch64 MOV[NZK] instruction with less significant bits 32 to 47
--of an address/value. No overflow checking.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_MOVW_G3
--AArch64 MOV[NZK] instruction with most signficant bits 48 to 64
--of a signed or unsigned address/value.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_MOVW_G0_S
--AArch64 MOV[NZ] instruction with most significant bits 0 to 15
--of a signed value. Changes instruction to MOVZ or MOVN depending on the
--value's sign.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_MOVW_G1_S
--AArch64 MOV[NZ] instruction with most significant bits 16 to 31
--of a signed value. Changes instruction to MOVZ or MOVN depending on the
--value's sign.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_MOVW_G2_S
--AArch64 MOV[NZ] instruction with most significant bits 32 to 47
--of a signed value. Changes instruction to MOVZ or MOVN depending on the
--value's sign.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_LD_LO19_PCREL
--AArch64 Load Literal instruction, holding a 19 bit pc-relative word
--offset. The lowest two bits must be zero and are not stored in the
--instruction, giving a 21 bit signed byte offset.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_ADR_LO21_PCREL
--AArch64 ADR instruction, holding a simple 21 bit pc-relative byte offset.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_ADR_HI21_PCREL
--AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
--offset, giving a 4KB aligned page base address.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL
--AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
--offset, giving a 4KB aligned page base address, but with no overflow
--checking.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_ADD_LO12
--AArch64 ADD immediate instruction, holding bits 0 to 11 of the address.
--Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_LDST8_LO12
--AArch64 8-bit load/store instruction, holding bits 0 to 11 of the
--address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TSTBR14
--AArch64 14 bit pc-relative test bit and branch.
--The lowest two bits must be zero and are not stored in the instruction,
--giving a 16 bit signed byte offset.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_BRANCH19
--AArch64 19 bit pc-relative conditional branch and compare & branch.
--The lowest two bits must be zero and are not stored in the instruction,
--giving a 21 bit signed byte offset.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_JUMP26
--AArch64 26 bit pc-relative unconditional branch.
--The lowest two bits must be zero and are not stored in the instruction,
--giving a 28 bit signed byte offset.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_CALL26
--AArch64 26 bit pc-relative unconditional branch and link.
--The lowest two bits must be zero and are not stored in the instruction,
--giving a 28 bit signed byte offset.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_LDST16_LO12
--AArch64 16-bit load/store instruction, holding bits 0 to 11 of the
--address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_LDST32_LO12
--AArch64 32-bit load/store instruction, holding bits 0 to 11 of the
--address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_LDST64_LO12
--AArch64 64-bit load/store instruction, holding bits 0 to 11 of the
--address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_LDST128_LO12
--AArch64 128-bit load/store instruction, holding bits 0 to 11 of the
--address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_GOT_LD_PREL19
--AArch64 Load Literal instruction, holding a 19 bit PC relative word
--offset of the global offset table entry for a symbol. The lowest two
--bits must be zero and are not stored in the instruction, giving a 21
--bit signed byte offset. This relocation type requires signed overflow
--checking.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_ADR_GOT_PAGE
--Get to the page base of the global offset table entry for a symbol as
--part of an ADRP instruction using a 21 bit PC relative value.Used in
--conjunction with BFD_RELOC_AARCH64_LD64_GOT_LO12_NC.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_LD64_GOT_LO12_NC
--Unsigned 12 bit byte offset for 64 bit load/store from the page of
--the GOT entry for this symbol. Used in conjunction with
--BFD_RELOC_AARCH64_ADR_GOTPAGE. Valid in LP64 ABI only.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_LD32_GOT_LO12_NC
--Unsigned 12 bit byte offset for 32 bit load/store from the page of
--the GOT entry for this symbol. Used in conjunction with
--BFD_RELOC_AARCH64_ADR_GOTPAGE. Valid in ILP32 ABI only.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21
--Get to the page base of the global offset table entry for a symbols
--tls_index structure as part of an adrp instruction using a 21 bit PC
--relative value. Used in conjunction with
--BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC
--Unsigned 12 bit byte offset to global offset table entry for a symbols
--tls_index structure. Used in conjunction with
--BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1
--AArch64 TLS INITIAL EXEC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC
--AArch64 TLS INITIAL EXEC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
--AArch64 TLS INITIAL EXEC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC
--AArch64 TLS INITIAL EXEC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC
--AArch64 TLS INITIAL EXEC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19
--AArch64 TLS INITIAL EXEC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
--AArch64 TLS LOCAL EXEC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
--AArch64 TLS LOCAL EXEC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
--AArch64 TLS LOCAL EXEC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0
--AArch64 TLS LOCAL EXEC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
--AArch64 TLS LOCAL EXEC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
--AArch64 TLS LOCAL EXEC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12
--AArch64 TLS LOCAL EXEC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC
--AArch64 TLS LOCAL EXEC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSDESC_LD_PREL19
--AArch64 TLS DESC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21
--AArch64 TLS DESC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21
--AArch64 TLS DESC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC
--AArch64 TLS DESC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
--AArch64 TLS DESC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC
--AArch64 TLS DESC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSDESC_OFF_G1
--AArch64 TLS DESC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC
--AArch64 TLS DESC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSDESC_LDR
--AArch64 TLS DESC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSDESC_ADD
--AArch64 TLS DESC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSDESC_CALL
--AArch64 TLS DESC relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_COPY
--AArch64 TLS relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_GLOB_DAT
--AArch64 TLS relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_JUMP_SLOT
--AArch64 TLS relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_RELATIVE
--AArch64 TLS relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLS_DTPMOD
--AArch64 TLS relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLS_DTPREL
--AArch64 TLS relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLS_TPREL
--AArch64 TLS relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSDESC
--AArch64 TLS relocation.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_IRELATIVE
--AArch64 support for STT_GNU_IFUNC.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_RELOC_END
--AArch64 pseudo relocation code to mark the end of the AArch64
--relocation enumerators that have direct mapping to ELF reloc codes.
--There are a few more enumerators after this one; those are mainly
--used by the AArch64 assembler for the internal fixup or to select
--one of the above enumerators.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP
--AArch64 pseudo relocation code to be used internally by the AArch64
--assembler and not (currently) written to any object files.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_LDST_LO12
--AArch64 unspecified load/store instruction, holding bits 0 to 11 of the
--address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_LD_GOT_LO12_NC
--AArch64 pseudo relocation code to be used internally by the AArch64
--assembler and not (currently) written to any object files.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC
--AArch64 pseudo relocation code to be used internally by the AArch64
--assembler and not (currently) written to any object files.
--@end deffn
--@deffn {} BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC
--AArch64 pseudo relocation code to be used internally by the AArch64
--assembler and not (currently) written to any object files.
--@end deffn
--@deffn {} BFD_RELOC_TILEPRO_COPY
--@deffnx {} BFD_RELOC_TILEPRO_GLOB_DAT
--@deffnx {} BFD_RELOC_TILEPRO_JMP_SLOT
--@deffnx {} BFD_RELOC_TILEPRO_RELATIVE
--@deffnx {} BFD_RELOC_TILEPRO_BROFF_X1
--@deffnx {} BFD_RELOC_TILEPRO_JOFFLONG_X1
--@deffnx {} BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT
--@deffnx {} BFD_RELOC_TILEPRO_IMM8_X0
--@deffnx {} BFD_RELOC_TILEPRO_IMM8_Y0
--@deffnx {} BFD_RELOC_TILEPRO_IMM8_X1
--@deffnx {} BFD_RELOC_TILEPRO_IMM8_Y1
--@deffnx {} BFD_RELOC_TILEPRO_DEST_IMM8_X1
--@deffnx {} BFD_RELOC_TILEPRO_MT_IMM15_X1
--@deffnx {} BFD_RELOC_TILEPRO_MF_IMM15_X1
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_LO
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_LO
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_HI
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_HI
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_HA
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_HA
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_PCREL
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_PCREL
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_GOT
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_GOT
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA
--@deffnx {} BFD_RELOC_TILEPRO_MMSTART_X0
--@deffnx {} BFD_RELOC_TILEPRO_MMEND_X0
--@deffnx {} BFD_RELOC_TILEPRO_MMSTART_X1
--@deffnx {} BFD_RELOC_TILEPRO_MMEND_X1
--@deffnx {} BFD_RELOC_TILEPRO_SHAMT_X0
--@deffnx {} BFD_RELOC_TILEPRO_SHAMT_X1
--@deffnx {} BFD_RELOC_TILEPRO_SHAMT_Y0
--@deffnx {} BFD_RELOC_TILEPRO_SHAMT_Y1
--@deffnx {} BFD_RELOC_TILEPRO_TLS_GD_CALL
--@deffnx {} BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD
--@deffnx {} BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD
--@deffnx {} BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD
--@deffnx {} BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD
--@deffnx {} BFD_RELOC_TILEPRO_TLS_IE_LOAD
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA
--@deffnx {} BFD_RELOC_TILEPRO_TLS_DTPMOD32
--@deffnx {} BFD_RELOC_TILEPRO_TLS_DTPOFF32
--@deffnx {} BFD_RELOC_TILEPRO_TLS_TPOFF32
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA
--@deffnx {} BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA
--Tilera TILEPro Relocations.
--@end deffn
--@deffn {} BFD_RELOC_TILEGX_HW0
--@deffnx {} BFD_RELOC_TILEGX_HW1
--@deffnx {} BFD_RELOC_TILEGX_HW2
--@deffnx {} BFD_RELOC_TILEGX_HW3
--@deffnx {} BFD_RELOC_TILEGX_HW0_LAST
--@deffnx {} BFD_RELOC_TILEGX_HW1_LAST
--@deffnx {} BFD_RELOC_TILEGX_HW2_LAST
--@deffnx {} BFD_RELOC_TILEGX_COPY
--@deffnx {} BFD_RELOC_TILEGX_GLOB_DAT
--@deffnx {} BFD_RELOC_TILEGX_JMP_SLOT
--@deffnx {} BFD_RELOC_TILEGX_RELATIVE
--@deffnx {} BFD_RELOC_TILEGX_BROFF_X1
--@deffnx {} BFD_RELOC_TILEGX_JUMPOFF_X1
--@deffnx {} BFD_RELOC_TILEGX_JUMPOFF_X1_PLT
--@deffnx {} BFD_RELOC_TILEGX_IMM8_X0
--@deffnx {} BFD_RELOC_TILEGX_IMM8_Y0
--@deffnx {} BFD_RELOC_TILEGX_IMM8_X1
--@deffnx {} BFD_RELOC_TILEGX_IMM8_Y1
--@deffnx {} BFD_RELOC_TILEGX_DEST_IMM8_X1
--@deffnx {} BFD_RELOC_TILEGX_MT_IMM14_X1
--@deffnx {} BFD_RELOC_TILEGX_MF_IMM14_X1
--@deffnx {} BFD_RELOC_TILEGX_MMSTART_X0
--@deffnx {} BFD_RELOC_TILEGX_MMEND_X0
--@deffnx {} BFD_RELOC_TILEGX_SHAMT_X0
--@deffnx {} BFD_RELOC_TILEGX_SHAMT_X1
--@deffnx {} BFD_RELOC_TILEGX_SHAMT_Y0
--@deffnx {} BFD_RELOC_TILEGX_SHAMT_Y1
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW2
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW2
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW3
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW3
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE
--@deffnx {} BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE
--@deffnx {} BFD_RELOC_TILEGX_TLS_DTPMOD64
--@deffnx {} BFD_RELOC_TILEGX_TLS_DTPOFF64
--@deffnx {} BFD_RELOC_TILEGX_TLS_TPOFF64
--@deffnx {} BFD_RELOC_TILEGX_TLS_DTPMOD32
--@deffnx {} BFD_RELOC_TILEGX_TLS_DTPOFF32
--@deffnx {} BFD_RELOC_TILEGX_TLS_TPOFF32
--@deffnx {} BFD_RELOC_TILEGX_TLS_GD_CALL
--@deffnx {} BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD
--@deffnx {} BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD
--@deffnx {} BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD
--@deffnx {} BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD
--@deffnx {} BFD_RELOC_TILEGX_TLS_IE_LOAD
--@deffnx {} BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD
--@deffnx {} BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD
--@deffnx {} BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD
--@deffnx {} BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD
--Tilera TILE-Gx Relocations.
--@end deffn
--@deffn {} BFD_RELOC_EPIPHANY_SIMM8
--Adapteva EPIPHANY - 8 bit signed pc-relative displacement
--@end deffn
--@deffn {} BFD_RELOC_EPIPHANY_SIMM24
--Adapteva EPIPHANY - 24 bit signed pc-relative displacement
--@end deffn
--@deffn {} BFD_RELOC_EPIPHANY_HIGH
--Adapteva EPIPHANY - 16 most-significant bits of absolute address
--@end deffn
--@deffn {} BFD_RELOC_EPIPHANY_LOW
--Adapteva EPIPHANY - 16 least-significant bits of absolute address
--@end deffn
--@deffn {} BFD_RELOC_EPIPHANY_SIMM11
--Adapteva EPIPHANY - 11 bit signed number - add/sub immediate
--@end deffn
--@deffn {} BFD_RELOC_EPIPHANY_IMM11
--Adapteva EPIPHANY - 11 bit sign-magnitude number (ld/st displacement)
--@end deffn
--@deffn {} BFD_RELOC_EPIPHANY_IMM8
--Adapteva EPIPHANY - 8 bit immediate for 16 bit mov instruction.
--@end deffn
--
--@example
--
--typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
--@end example
--@findex bfd_reloc_type_lookup
--@subsubsection @code{bfd_reloc_type_lookup}
--@strong{Synopsis}
--@example
--reloc_howto_type *bfd_reloc_type_lookup
-- (bfd *abfd, bfd_reloc_code_real_type code);
--reloc_howto_type *bfd_reloc_name_lookup
-- (bfd *abfd, const char *reloc_name);
--@end example
--@strong{Description}@*
--Return a pointer to a howto structure which, when
--invoked, will perform the relocation @var{code} on data from the
--architecture noted.
--
--@findex bfd_default_reloc_type_lookup
--@subsubsection @code{bfd_default_reloc_type_lookup}
--@strong{Synopsis}
--@example
--reloc_howto_type *bfd_default_reloc_type_lookup
-- (bfd *abfd, bfd_reloc_code_real_type code);
--@end example
--@strong{Description}@*
--Provides a default relocation lookup routine for any architecture.
--
--@findex bfd_get_reloc_code_name
--@subsubsection @code{bfd_get_reloc_code_name}
--@strong{Synopsis}
--@example
--const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
--@end example
--@strong{Description}@*
--Provides a printable name for the supplied relocation code.
--Useful mainly for printing error messages.
--
--@findex bfd_generic_relax_section
--@subsubsection @code{bfd_generic_relax_section}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_generic_relax_section
-- (bfd *abfd,
-- asection *section,
-- struct bfd_link_info *,
-- bfd_boolean *);
--@end example
--@strong{Description}@*
--Provides default handling for relaxing for back ends which
--don't do relaxing.
--
--@findex bfd_generic_gc_sections
--@subsubsection @code{bfd_generic_gc_sections}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_generic_gc_sections
-- (bfd *, struct bfd_link_info *);
--@end example
--@strong{Description}@*
--Provides default handling for relaxing for back ends which
--don't do section gc -- i.e., does nothing.
--
--@findex bfd_generic_lookup_section_flags
--@subsubsection @code{bfd_generic_lookup_section_flags}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_generic_lookup_section_flags
-- (struct bfd_link_info *, struct flag_info *, asection *);
--@end example
--@strong{Description}@*
--Provides default handling for section flags lookup
---- i.e., does nothing.
--Returns FALSE if the section should be omitted, otherwise TRUE.
--
--@findex bfd_generic_merge_sections
--@subsubsection @code{bfd_generic_merge_sections}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_generic_merge_sections
-- (bfd *, struct bfd_link_info *);
--@end example
--@strong{Description}@*
--Provides default handling for SEC_MERGE section merging for back ends
--which don't have SEC_MERGE support -- i.e., does nothing.
--
--@findex bfd_generic_get_relocated_section_contents
--@subsubsection @code{bfd_generic_get_relocated_section_contents}
--@strong{Synopsis}
--@example
--bfd_byte *bfd_generic_get_relocated_section_contents
-- (bfd *abfd,
-- struct bfd_link_info *link_info,
-- struct bfd_link_order *link_order,
-- bfd_byte *data,
-- bfd_boolean relocatable,
-- asymbol **symbols);
--@end example
--@strong{Description}@*
--Provides default handling of relocation effort for back ends
--which can't be bothered to do it efficiently.
--
-diff -Nur binutils-2.24.orig/bfd/doc/section.texi binutils-2.24/bfd/doc/section.texi
---- binutils-2.24.orig/bfd/doc/section.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/section.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,1035 +0,0 @@
--@section Sections
--The raw data contained within a BFD is maintained through the
--section abstraction. A single BFD may have any number of
--sections. It keeps hold of them by pointing to the first;
--each one points to the next in the list.
--
--Sections are supported in BFD in @code{section.c}.
--
--@menu
--* Section Input::
--* Section Output::
--* typedef asection::
--* section prototypes::
--@end menu
--
--@node Section Input, Section Output, Sections, Sections
--@subsection Section input
--When a BFD is opened for reading, the section structures are
--created and attached to the BFD.
--
--Each section has a name which describes the section in the
--outside world---for example, @code{a.out} would contain at least
--three sections, called @code{.text}, @code{.data} and @code{.bss}.
--
--Names need not be unique; for example a COFF file may have several
--sections named @code{.data}.
--
--Sometimes a BFD will contain more than the ``natural'' number of
--sections. A back end may attach other sections containing
--constructor data, or an application may add a section (using
--@code{bfd_make_section}) to the sections attached to an already open
--BFD. For example, the linker creates an extra section
--@code{COMMON} for each input file's BFD to hold information about
--common storage.
--
--The raw data is not necessarily read in when
--the section descriptor is created. Some targets may leave the
--data in place until a @code{bfd_get_section_contents} call is
--made. Other back ends may read in all the data at once. For
--example, an S-record file has to be read once to determine the
--size of the data. An IEEE-695 file doesn't contain raw data in
--sections, but data and relocation expressions intermixed, so
--the data area has to be parsed to get out the data and
--relocations.
--
--@node Section Output, typedef asection, Section Input, Sections
--@subsection Section output
--To write a new object style BFD, the various sections to be
--written have to be created. They are attached to the BFD in
--the same way as input sections; data is written to the
--sections using @code{bfd_set_section_contents}.
--
--Any program that creates or combines sections (e.g., the assembler
--and linker) must use the @code{asection} fields @code{output_section} and
--@code{output_offset} to indicate the file sections to which each
--section must be written. (If the section is being created from
--scratch, @code{output_section} should probably point to the section
--itself and @code{output_offset} should probably be zero.)
--
--The data to be written comes from input sections attached
--(via @code{output_section} pointers) to
--the output sections. The output section structure can be
--considered a filter for the input section: the output section
--determines the vma of the output data and the name, but the
--input section determines the offset into the output section of
--the data to be written.
--
--E.g., to create a section "O", starting at 0x100, 0x123 long,
--containing two subsections, "A" at offset 0x0 (i.e., at vma
--0x100) and "B" at offset 0x20 (i.e., at vma 0x120) the @code{asection}
--structures would look like:
--
--@example
-- section name "A"
-- output_offset 0x00
-- size 0x20
-- output_section -----------> section name "O"
-- | vma 0x100
-- section name "B" | size 0x123
-- output_offset 0x20 |
-- size 0x103 |
-- output_section --------|
--@end example
--
--@subsection Link orders
--The data within a section is stored in a @dfn{link_order}.
--These are much like the fixups in @code{gas}. The link_order
--abstraction allows a section to grow and shrink within itself.
--
--A link_order knows how big it is, and which is the next
--link_order and where the raw data for it is; it also points to
--a list of relocations which apply to it.
--
--The link_order is used by the linker to perform relaxing on
--final code. The compiler creates code which is as big as
--necessary to make it work without relaxing, and the user can
--select whether to relax. Sometimes relaxing takes a lot of
--time. The linker runs around the relocations to see if any
--are attached to data which can be shrunk, if so it does it on
--a link_order by link_order basis.
--
--
--@node typedef asection, section prototypes, Section Output, Sections
--@subsection typedef asection
--Here is the section structure:
--
--
--@example
--
--typedef struct bfd_section
--@{
-- /* The name of the section; the name isn't a copy, the pointer is
-- the same as that passed to bfd_make_section. */
-- const char *name;
--
-- /* A unique sequence number. */
-- int id;
--
-- /* Which section in the bfd; 0..n-1 as sections are created in a bfd. */
-- int index;
--
-- /* The next section in the list belonging to the BFD, or NULL. */
-- struct bfd_section *next;
--
-- /* The previous section in the list belonging to the BFD, or NULL. */
-- struct bfd_section *prev;
--
-- /* The field flags contains attributes of the section. Some
-- flags are read in from the object file, and some are
-- synthesized from other information. */
-- flagword flags;
--
--#define SEC_NO_FLAGS 0x000
--
-- /* Tells the OS to allocate space for this section when loading.
-- This is clear for a section containing debug information only. */
--#define SEC_ALLOC 0x001
--
-- /* Tells the OS to load the section from the file when loading.
-- This is clear for a .bss section. */
--#define SEC_LOAD 0x002
--
-- /* The section contains data still to be relocated, so there is
-- some relocation information too. */
--#define SEC_RELOC 0x004
--
-- /* A signal to the OS that the section contains read only data. */
--#define SEC_READONLY 0x008
--
-- /* The section contains code only. */
--#define SEC_CODE 0x010
--
-- /* The section contains data only. */
--#define SEC_DATA 0x020
--
-- /* The section will reside in ROM. */
--#define SEC_ROM 0x040
--
-- /* The section contains constructor information. This section
-- type is used by the linker to create lists of constructors and
-- destructors used by @code{g++}. When a back end sees a symbol
-- which should be used in a constructor list, it creates a new
-- section for the type of name (e.g., @code{__CTOR_LIST__}), attaches
-- the symbol to it, and builds a relocation. To build the lists
-- of constructors, all the linker has to do is catenate all the
-- sections called @code{__CTOR_LIST__} and relocate the data
-- contained within - exactly the operations it would peform on
-- standard data. */
--#define SEC_CONSTRUCTOR 0x080
--
-- /* The section has contents - a data section could be
-- @code{SEC_ALLOC} | @code{SEC_HAS_CONTENTS}; a debug section could be
-- @code{SEC_HAS_CONTENTS} */
--#define SEC_HAS_CONTENTS 0x100
--
-- /* An instruction to the linker to not output the section
-- even if it has information which would normally be written. */
--#define SEC_NEVER_LOAD 0x200
--
-- /* The section contains thread local data. */
--#define SEC_THREAD_LOCAL 0x400
--
-- /* The section has GOT references. This flag is only for the
-- linker, and is currently only used by the elf32-hppa back end.
-- It will be set if global offset table references were detected
-- in this section, which indicate to the linker that the section
-- contains PIC code, and must be handled specially when doing a
-- static link. */
--#define SEC_HAS_GOT_REF 0x800
--
-- /* The section contains common symbols (symbols may be defined
-- multiple times, the value of a symbol is the amount of
-- space it requires, and the largest symbol value is the one
-- used). Most targets have exactly one of these (which we
-- translate to bfd_com_section_ptr), but ECOFF has two. */
--#define SEC_IS_COMMON 0x1000
--
-- /* The section contains only debugging information. For
-- example, this is set for ELF .debug and .stab sections.
-- strip tests this flag to see if a section can be
-- discarded. */
--#define SEC_DEBUGGING 0x2000
--
-- /* The contents of this section are held in memory pointed to
-- by the contents field. This is checked by bfd_get_section_contents,
-- and the data is retrieved from memory if appropriate. */
--#define SEC_IN_MEMORY 0x4000
--
-- /* The contents of this section are to be excluded by the
-- linker for executable and shared objects unless those
-- objects are to be further relocated. */
--#define SEC_EXCLUDE 0x8000
--
-- /* The contents of this section are to be sorted based on the sum of
-- the symbol and addend values specified by the associated relocation
-- entries. Entries without associated relocation entries will be
-- appended to the end of the section in an unspecified order. */
--#define SEC_SORT_ENTRIES 0x10000
--
-- /* When linking, duplicate sections of the same name should be
-- discarded, rather than being combined into a single section as
-- is usually done. This is similar to how common symbols are
-- handled. See SEC_LINK_DUPLICATES below. */
--#define SEC_LINK_ONCE 0x20000
--
-- /* If SEC_LINK_ONCE is set, this bitfield describes how the linker
-- should handle duplicate sections. */
--#define SEC_LINK_DUPLICATES 0xc0000
--
-- /* This value for SEC_LINK_DUPLICATES means that duplicate
-- sections with the same name should simply be discarded. */
--#define SEC_LINK_DUPLICATES_DISCARD 0x0
--
-- /* This value for SEC_LINK_DUPLICATES means that the linker
-- should warn if there are any duplicate sections, although
-- it should still only link one copy. */
--#define SEC_LINK_DUPLICATES_ONE_ONLY 0x40000
--
-- /* This value for SEC_LINK_DUPLICATES means that the linker
-- should warn if any duplicate sections are a different size. */
--#define SEC_LINK_DUPLICATES_SAME_SIZE 0x80000
--
-- /* This value for SEC_LINK_DUPLICATES means that the linker
-- should warn if any duplicate sections contain different
-- contents. */
--#define SEC_LINK_DUPLICATES_SAME_CONTENTS \
-- (SEC_LINK_DUPLICATES_ONE_ONLY | SEC_LINK_DUPLICATES_SAME_SIZE)
--
-- /* This section was created by the linker as part of dynamic
-- relocation or other arcane processing. It is skipped when
-- going through the first-pass output, trusting that someone
-- else up the line will take care of it later. */
--#define SEC_LINKER_CREATED 0x100000
--
-- /* This section should not be subject to garbage collection.
-- Also set to inform the linker that this section should not be
-- listed in the link map as discarded. */
--#define SEC_KEEP 0x200000
--
-- /* This section contains "short" data, and should be placed
-- "near" the GP. */
--#define SEC_SMALL_DATA 0x400000
--
-- /* Attempt to merge identical entities in the section.
-- Entity size is given in the entsize field. */
--#define SEC_MERGE 0x800000
--
-- /* If given with SEC_MERGE, entities to merge are zero terminated
-- strings where entsize specifies character size instead of fixed
-- size entries. */
--#define SEC_STRINGS 0x1000000
--
-- /* This section contains data about section groups. */
--#define SEC_GROUP 0x2000000
--
-- /* The section is a COFF shared library section. This flag is
-- only for the linker. If this type of section appears in
-- the input file, the linker must copy it to the output file
-- without changing the vma or size. FIXME: Although this
-- was originally intended to be general, it really is COFF
-- specific (and the flag was renamed to indicate this). It
-- might be cleaner to have some more general mechanism to
-- allow the back end to control what the linker does with
-- sections. */
--#define SEC_COFF_SHARED_LIBRARY 0x4000000
--
-- /* This input section should be copied to output in reverse order
-- as an array of pointers. This is for ELF linker internal use
-- only. */
--#define SEC_ELF_REVERSE_COPY 0x4000000
--
-- /* This section contains data which may be shared with other
-- executables or shared objects. This is for COFF only. */
--#define SEC_COFF_SHARED 0x8000000
--
-- /* When a section with this flag is being linked, then if the size of
-- the input section is less than a page, it should not cross a page
-- boundary. If the size of the input section is one page or more,
-- it should be aligned on a page boundary. This is for TI
-- TMS320C54X only. */
--#define SEC_TIC54X_BLOCK 0x10000000
--
-- /* Conditionally link this section; do not link if there are no
-- references found to any symbol in the section. This is for TI
-- TMS320C54X only. */
--#define SEC_TIC54X_CLINK 0x20000000
--
-- /* Indicate that section has the no read flag set. This happens
-- when memory read flag isn't set. */
--#define SEC_COFF_NOREAD 0x40000000
--
-- /* End of section flags. */
--
-- /* Some internal packed boolean fields. */
--
-- /* See the vma field. */
-- unsigned int user_set_vma : 1;
--
-- /* A mark flag used by some of the linker backends. */
-- unsigned int linker_mark : 1;
--
-- /* Another mark flag used by some of the linker backends. Set for
-- output sections that have an input section. */
-- unsigned int linker_has_input : 1;
--
-- /* Mark flag used by some linker backends for garbage collection. */
-- unsigned int gc_mark : 1;
--
-- /* Section compression status. */
-- unsigned int compress_status : 2;
--#define COMPRESS_SECTION_NONE 0
--#define COMPRESS_SECTION_DONE 1
--#define DECOMPRESS_SECTION_SIZED 2
--
-- /* The following flags are used by the ELF linker. */
--
-- /* Mark sections which have been allocated to segments. */
-- unsigned int segment_mark : 1;
--
-- /* Type of sec_info information. */
-- unsigned int sec_info_type:3;
--#define SEC_INFO_TYPE_NONE 0
--#define SEC_INFO_TYPE_STABS 1
--#define SEC_INFO_TYPE_MERGE 2
--#define SEC_INFO_TYPE_EH_FRAME 3
--#define SEC_INFO_TYPE_JUST_SYMS 4
--
-- /* Nonzero if this section uses RELA relocations, rather than REL. */
-- unsigned int use_rela_p:1;
--
-- /* Bits used by various backends. The generic code doesn't touch
-- these fields. */
--
-- unsigned int sec_flg0:1;
-- unsigned int sec_flg1:1;
-- unsigned int sec_flg2:1;
-- unsigned int sec_flg3:1;
-- unsigned int sec_flg4:1;
-- unsigned int sec_flg5:1;
--
-- /* End of internal packed boolean fields. */
--
-- /* The virtual memory address of the section - where it will be
-- at run time. The symbols are relocated against this. The
-- user_set_vma flag is maintained by bfd; if it's not set, the
-- backend can assign addresses (for example, in @code{a.out}, where
-- the default address for @code{.data} is dependent on the specific
-- target and various flags). */
-- bfd_vma vma;
--
-- /* The load address of the section - where it would be in a
-- rom image; really only used for writing section header
-- information. */
-- bfd_vma lma;
--
-- /* The size of the section in octets, as it will be output.
-- Contains a value even if the section has no contents (e.g., the
-- size of @code{.bss}). */
-- bfd_size_type size;
--
-- /* For input sections, the original size on disk of the section, in
-- octets. This field should be set for any section whose size is
-- changed by linker relaxation. It is required for sections where
-- the linker relaxation scheme doesn't cache altered section and
-- reloc contents (stabs, eh_frame, SEC_MERGE, some coff relaxing
-- targets), and thus the original size needs to be kept to read the
-- section multiple times. For output sections, rawsize holds the
-- section size calculated on a previous linker relaxation pass. */
-- bfd_size_type rawsize;
--
-- /* The compressed size of the section in octets. */
-- bfd_size_type compressed_size;
--
-- /* Relaxation table. */
-- struct relax_table *relax;
--
-- /* Count of used relaxation table entries. */
-- int relax_count;
--
--
-- /* If this section is going to be output, then this value is the
-- offset in *bytes* into the output section of the first byte in the
-- input section (byte ==> smallest addressable unit on the
-- target). In most cases, if this was going to start at the
-- 100th octet (8-bit quantity) in the output section, this value
-- would be 100. However, if the target byte size is 16 bits
-- (bfd_octets_per_byte is "2"), this value would be 50. */
-- bfd_vma output_offset;
--
-- /* The output section through which to map on output. */
-- struct bfd_section *output_section;
--
-- /* The alignment requirement of the section, as an exponent of 2 -
-- e.g., 3 aligns to 2^3 (or 8). */
-- unsigned int alignment_power;
--
-- /* If an input section, a pointer to a vector of relocation
-- records for the data in this section. */
-- struct reloc_cache_entry *relocation;
--
-- /* If an output section, a pointer to a vector of pointers to
-- relocation records for the data in this section. */
-- struct reloc_cache_entry **orelocation;
--
-- /* The number of relocation records in one of the above. */
-- unsigned reloc_count;
--
-- /* Information below is back end specific - and not always used
-- or updated. */
--
-- /* File position of section data. */
-- file_ptr filepos;
--
-- /* File position of relocation info. */
-- file_ptr rel_filepos;
--
-- /* File position of line data. */
-- file_ptr line_filepos;
--
-- /* Pointer to data for applications. */
-- void *userdata;
--
-- /* If the SEC_IN_MEMORY flag is set, this points to the actual
-- contents. */
-- unsigned char *contents;
--
-- /* Attached line number information. */
-- alent *lineno;
--
-- /* Number of line number records. */
-- unsigned int lineno_count;
--
-- /* Entity size for merging purposes. */
-- unsigned int entsize;
--
-- /* Points to the kept section if this section is a link-once section,
-- and is discarded. */
-- struct bfd_section *kept_section;
--
-- /* When a section is being output, this value changes as more
-- linenumbers are written out. */
-- file_ptr moving_line_filepos;
--
-- /* What the section number is in the target world. */
-- int target_index;
--
-- void *used_by_bfd;
--
-- /* If this is a constructor section then here is a list of the
-- relocations created to relocate items within it. */
-- struct relent_chain *constructor_chain;
--
-- /* The BFD which owns the section. */
-- bfd *owner;
--
-- /* A symbol which points at this section only. */
-- struct bfd_symbol *symbol;
-- struct bfd_symbol **symbol_ptr_ptr;
--
-- /* Early in the link process, map_head and map_tail are used to build
-- a list of input sections attached to an output section. Later,
-- output sections use these fields for a list of bfd_link_order
-- structs. */
-- union @{
-- struct bfd_link_order *link_order;
-- struct bfd_section *s;
-- @} map_head, map_tail;
--@} asection;
--
--/* Relax table contains information about instructions which can
-- be removed by relaxation -- replacing a long address with a
-- short address. */
--struct relax_table @{
-- /* Address where bytes may be deleted. */
-- bfd_vma addr;
--
-- /* Number of bytes to be deleted. */
-- int size;
--@};
--
--/* These sections are global, and are managed by BFD. The application
-- and target back end are not permitted to change the values in
-- these sections. */
--extern asection _bfd_std_section[4];
--
--#define BFD_ABS_SECTION_NAME "*ABS*"
--#define BFD_UND_SECTION_NAME "*UND*"
--#define BFD_COM_SECTION_NAME "*COM*"
--#define BFD_IND_SECTION_NAME "*IND*"
--
--/* Pointer to the common section. */
--#define bfd_com_section_ptr (&_bfd_std_section[0])
--/* Pointer to the undefined section. */
--#define bfd_und_section_ptr (&_bfd_std_section[1])
--/* Pointer to the absolute section. */
--#define bfd_abs_section_ptr (&_bfd_std_section[2])
--/* Pointer to the indirect section. */
--#define bfd_ind_section_ptr (&_bfd_std_section[3])
--
--#define bfd_is_und_section(sec) ((sec) == bfd_und_section_ptr)
--#define bfd_is_abs_section(sec) ((sec) == bfd_abs_section_ptr)
--#define bfd_is_ind_section(sec) ((sec) == bfd_ind_section_ptr)
--
--#define bfd_is_const_section(SEC) \
-- ( ((SEC) == bfd_abs_section_ptr) \
-- || ((SEC) == bfd_und_section_ptr) \
-- || ((SEC) == bfd_com_section_ptr) \
-- || ((SEC) == bfd_ind_section_ptr))
--
--/* Macros to handle insertion and deletion of a bfd's sections. These
-- only handle the list pointers, ie. do not adjust section_count,
-- target_index etc. */
--#define bfd_section_list_remove(ABFD, S) \
-- do \
-- @{ \
-- asection *_s = S; \
-- asection *_next = _s->next; \
-- asection *_prev = _s->prev; \
-- if (_prev) \
-- _prev->next = _next; \
-- else \
-- (ABFD)->sections = _next; \
-- if (_next) \
-- _next->prev = _prev; \
-- else \
-- (ABFD)->section_last = _prev; \
-- @} \
-- while (0)
--#define bfd_section_list_append(ABFD, S) \
-- do \
-- @{ \
-- asection *_s = S; \
-- bfd *_abfd = ABFD; \
-- _s->next = NULL; \
-- if (_abfd->section_last) \
-- @{ \
-- _s->prev = _abfd->section_last; \
-- _abfd->section_last->next = _s; \
-- @} \
-- else \
-- @{ \
-- _s->prev = NULL; \
-- _abfd->sections = _s; \
-- @} \
-- _abfd->section_last = _s; \
-- @} \
-- while (0)
--#define bfd_section_list_prepend(ABFD, S) \
-- do \
-- @{ \
-- asection *_s = S; \
-- bfd *_abfd = ABFD; \
-- _s->prev = NULL; \
-- if (_abfd->sections) \
-- @{ \
-- _s->next = _abfd->sections; \
-- _abfd->sections->prev = _s; \
-- @} \
-- else \
-- @{ \
-- _s->next = NULL; \
-- _abfd->section_last = _s; \
-- @} \
-- _abfd->sections = _s; \
-- @} \
-- while (0)
--#define bfd_section_list_insert_after(ABFD, A, S) \
-- do \
-- @{ \
-- asection *_a = A; \
-- asection *_s = S; \
-- asection *_next = _a->next; \
-- _s->next = _next; \
-- _s->prev = _a; \
-- _a->next = _s; \
-- if (_next) \
-- _next->prev = _s; \
-- else \
-- (ABFD)->section_last = _s; \
-- @} \
-- while (0)
--#define bfd_section_list_insert_before(ABFD, B, S) \
-- do \
-- @{ \
-- asection *_b = B; \
-- asection *_s = S; \
-- asection *_prev = _b->prev; \
-- _s->prev = _prev; \
-- _s->next = _b; \
-- _b->prev = _s; \
-- if (_prev) \
-- _prev->next = _s; \
-- else \
-- (ABFD)->sections = _s; \
-- @} \
-- while (0)
--#define bfd_section_removed_from_list(ABFD, S) \
-- ((S)->next == NULL ? (ABFD)->section_last != (S) : (S)->next->prev != (S))
--
--#define BFD_FAKE_SECTION(SEC, FLAGS, SYM, NAME, IDX) \
-- /* name, id, index, next, prev, flags, user_set_vma, */ \
-- @{ NAME, IDX, 0, NULL, NULL, FLAGS, 0, \
-- \
-- /* linker_mark, linker_has_input, gc_mark, decompress_status, */ \
-- 0, 0, 1, 0, \
-- \
-- /* segment_mark, sec_info_type, use_rela_p, */ \
-- 0, 0, 0, \
-- \
-- /* sec_flg0, sec_flg1, sec_flg2, sec_flg3, sec_flg4, sec_flg5, */ \
-- 0, 0, 0, 0, 0, 0, \
-- \
-- /* vma, lma, size, rawsize, compressed_size, relax, relax_count, */ \
-- 0, 0, 0, 0, 0, 0, 0, \
-- \
-- /* output_offset, output_section, alignment_power, */ \
-- 0, &SEC, 0, \
-- \
-- /* relocation, orelocation, reloc_count, filepos, rel_filepos, */ \
-- NULL, NULL, 0, 0, 0, \
-- \
-- /* line_filepos, userdata, contents, lineno, lineno_count, */ \
-- 0, NULL, NULL, NULL, 0, \
-- \
-- /* entsize, kept_section, moving_line_filepos, */ \
-- 0, NULL, 0, \
-- \
-- /* target_index, used_by_bfd, constructor_chain, owner, */ \
-- 0, NULL, NULL, NULL, \
-- \
-- /* symbol, symbol_ptr_ptr, */ \
-- (struct bfd_symbol *) SYM, &SEC.symbol, \
-- \
-- /* map_head, map_tail */ \
-- @{ NULL @}, @{ NULL @} \
-- @}
--
--@end example
--
--@node section prototypes, , typedef asection, Sections
--@subsection Section prototypes
--These are the functions exported by the section handling part of BFD.
--
--@findex bfd_section_list_clear
--@subsubsection @code{bfd_section_list_clear}
--@strong{Synopsis}
--@example
--void bfd_section_list_clear (bfd *);
--@end example
--@strong{Description}@*
--Clears the section list, and also resets the section count and
--hash table entries.
--
--@findex bfd_get_section_by_name
--@subsubsection @code{bfd_get_section_by_name}
--@strong{Synopsis}
--@example
--asection *bfd_get_section_by_name (bfd *abfd, const char *name);
--@end example
--@strong{Description}@*
--Return the most recently created section attached to @var{abfd}
--named @var{name}. Return NULL if no such section exists.
--
--@findex bfd_get_next_section_by_name
--@subsubsection @code{bfd_get_next_section_by_name}
--@strong{Synopsis}
--@example
--asection *bfd_get_next_section_by_name (asection *sec);
--@end example
--@strong{Description}@*
--Given @var{sec} is a section returned by @code{bfd_get_section_by_name},
--return the next most recently created section attached to the same
--BFD with the same name. Return NULL if no such section exists.
--
--@findex bfd_get_linker_section
--@subsubsection @code{bfd_get_linker_section}
--@strong{Synopsis}
--@example
--asection *bfd_get_linker_section (bfd *abfd, const char *name);
--@end example
--@strong{Description}@*
--Return the linker created section attached to @var{abfd}
--named @var{name}. Return NULL if no such section exists.
--
--@findex bfd_get_section_by_name_if
--@subsubsection @code{bfd_get_section_by_name_if}
--@strong{Synopsis}
--@example
--asection *bfd_get_section_by_name_if
-- (bfd *abfd,
-- const char *name,
-- bfd_boolean (*func) (bfd *abfd, asection *sect, void *obj),
-- void *obj);
--@end example
--@strong{Description}@*
--Call the provided function @var{func} for each section
--attached to the BFD @var{abfd} whose name matches @var{name},
--passing @var{obj} as an argument. The function will be called
--as if by
--
--@example
-- func (abfd, the_section, obj);
--@end example
--
--It returns the first section for which @var{func} returns true,
--otherwise @code{NULL}.
--
--@findex bfd_get_unique_section_name
--@subsubsection @code{bfd_get_unique_section_name}
--@strong{Synopsis}
--@example
--char *bfd_get_unique_section_name
-- (bfd *abfd, const char *templat, int *count);
--@end example
--@strong{Description}@*
--Invent a section name that is unique in @var{abfd} by tacking
--a dot and a digit suffix onto the original @var{templat}. If
--@var{count} is non-NULL, then it specifies the first number
--tried as a suffix to generate a unique name. The value
--pointed to by @var{count} will be incremented in this case.
--
--@findex bfd_make_section_old_way
--@subsubsection @code{bfd_make_section_old_way}
--@strong{Synopsis}
--@example
--asection *bfd_make_section_old_way (bfd *abfd, const char *name);
--@end example
--@strong{Description}@*
--Create a new empty section called @var{name}
--and attach it to the end of the chain of sections for the
--BFD @var{abfd}. An attempt to create a section with a name which
--is already in use returns its pointer without changing the
--section chain.
--
--It has the funny name since this is the way it used to be
--before it was rewritten....
--
--Possible errors are:
--@itemize @bullet
--
--@item
--@code{bfd_error_invalid_operation} -
--If output has already started for this BFD.
--@item
--@code{bfd_error_no_memory} -
--If memory allocation fails.
--@end itemize
--
--@findex bfd_make_section_anyway_with_flags
--@subsubsection @code{bfd_make_section_anyway_with_flags}
--@strong{Synopsis}
--@example
--asection *bfd_make_section_anyway_with_flags
-- (bfd *abfd, const char *name, flagword flags);
--@end example
--@strong{Description}@*
--Create a new empty section called @var{name} and attach it to the end of
--the chain of sections for @var{abfd}. Create a new section even if there
--is already a section with that name. Also set the attributes of the
--new section to the value @var{flags}.
--
--Return @code{NULL} and set @code{bfd_error} on error; possible errors are:
--@itemize @bullet
--
--@item
--@code{bfd_error_invalid_operation} - If output has already started for @var{abfd}.
--@item
--@code{bfd_error_no_memory} - If memory allocation fails.
--@end itemize
--
--@findex bfd_make_section_anyway
--@subsubsection @code{bfd_make_section_anyway}
--@strong{Synopsis}
--@example
--asection *bfd_make_section_anyway (bfd *abfd, const char *name);
--@end example
--@strong{Description}@*
--Create a new empty section called @var{name} and attach it to the end of
--the chain of sections for @var{abfd}. Create a new section even if there
--is already a section with that name.
--
--Return @code{NULL} and set @code{bfd_error} on error; possible errors are:
--@itemize @bullet
--
--@item
--@code{bfd_error_invalid_operation} - If output has already started for @var{abfd}.
--@item
--@code{bfd_error_no_memory} - If memory allocation fails.
--@end itemize
--
--@findex bfd_make_section_with_flags
--@subsubsection @code{bfd_make_section_with_flags}
--@strong{Synopsis}
--@example
--asection *bfd_make_section_with_flags
-- (bfd *, const char *name, flagword flags);
--@end example
--@strong{Description}@*
--Like @code{bfd_make_section_anyway}, but return @code{NULL} (without calling
--bfd_set_error ()) without changing the section chain if there is already a
--section named @var{name}. Also set the attributes of the new section to
--the value @var{flags}. If there is an error, return @code{NULL} and set
--@code{bfd_error}.
--
--@findex bfd_make_section
--@subsubsection @code{bfd_make_section}
--@strong{Synopsis}
--@example
--asection *bfd_make_section (bfd *, const char *name);
--@end example
--@strong{Description}@*
--Like @code{bfd_make_section_anyway}, but return @code{NULL} (without calling
--bfd_set_error ()) without changing the section chain if there is already a
--section named @var{name}. If there is an error, return @code{NULL} and set
--@code{bfd_error}.
--
--@findex bfd_set_section_flags
--@subsubsection @code{bfd_set_section_flags}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_set_section_flags
-- (bfd *abfd, asection *sec, flagword flags);
--@end example
--@strong{Description}@*
--Set the attributes of the section @var{sec} in the BFD
--@var{abfd} to the value @var{flags}. Return @code{TRUE} on success,
--@code{FALSE} on error. Possible error returns are:
--
--@itemize @bullet
--
--@item
--@code{bfd_error_invalid_operation} -
--The section cannot have one or more of the attributes
--requested. For example, a .bss section in @code{a.out} may not
--have the @code{SEC_HAS_CONTENTS} field set.
--@end itemize
--
--@findex bfd_rename_section
--@subsubsection @code{bfd_rename_section}
--@strong{Synopsis}
--@example
--void bfd_rename_section
-- (bfd *abfd, asection *sec, const char *newname);
--@end example
--@strong{Description}@*
--Rename section @var{sec} in @var{abfd} to @var{newname}.
--
--@findex bfd_map_over_sections
--@subsubsection @code{bfd_map_over_sections}
--@strong{Synopsis}
--@example
--void bfd_map_over_sections
-- (bfd *abfd,
-- void (*func) (bfd *abfd, asection *sect, void *obj),
-- void *obj);
--@end example
--@strong{Description}@*
--Call the provided function @var{func} for each section
--attached to the BFD @var{abfd}, passing @var{obj} as an
--argument. The function will be called as if by
--
--@example
-- func (abfd, the_section, obj);
--@end example
--
--This is the preferred method for iterating over sections; an
--alternative would be to use a loop:
--
--@example
-- asection *p;
-- for (p = abfd->sections; p != NULL; p = p->next)
-- func (abfd, p, ...)
--@end example
--
--@findex bfd_sections_find_if
--@subsubsection @code{bfd_sections_find_if}
--@strong{Synopsis}
--@example
--asection *bfd_sections_find_if
-- (bfd *abfd,
-- bfd_boolean (*operation) (bfd *abfd, asection *sect, void *obj),
-- void *obj);
--@end example
--@strong{Description}@*
--Call the provided function @var{operation} for each section
--attached to the BFD @var{abfd}, passing @var{obj} as an
--argument. The function will be called as if by
--
--@example
-- operation (abfd, the_section, obj);
--@end example
--
--It returns the first section for which @var{operation} returns true.
--
--@findex bfd_set_section_size
--@subsubsection @code{bfd_set_section_size}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_set_section_size
-- (bfd *abfd, asection *sec, bfd_size_type val);
--@end example
--@strong{Description}@*
--Set @var{sec} to the size @var{val}. If the operation is
--ok, then @code{TRUE} is returned, else @code{FALSE}.
--
--Possible error returns:
--@itemize @bullet
--
--@item
--@code{bfd_error_invalid_operation} -
--Writing has started to the BFD, so setting the size is invalid.
--@end itemize
--
--@findex bfd_set_section_contents
--@subsubsection @code{bfd_set_section_contents}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_set_section_contents
-- (bfd *abfd, asection *section, const void *data,
-- file_ptr offset, bfd_size_type count);
--@end example
--@strong{Description}@*
--Sets the contents of the section @var{section} in BFD
--@var{abfd} to the data starting in memory at @var{data}. The
--data is written to the output section starting at offset
--@var{offset} for @var{count} octets.
--
--Normally @code{TRUE} is returned, else @code{FALSE}. Possible error
--returns are:
--@itemize @bullet
--
--@item
--@code{bfd_error_no_contents} -
--The output section does not have the @code{SEC_HAS_CONTENTS}
--attribute, so nothing can be written to it.
--@item
--and some more too
--@end itemize
--This routine is front end to the back end function
--@code{_bfd_set_section_contents}.
--
--@findex bfd_get_section_contents
--@subsubsection @code{bfd_get_section_contents}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_get_section_contents
-- (bfd *abfd, asection *section, void *location, file_ptr offset,
-- bfd_size_type count);
--@end example
--@strong{Description}@*
--Read data from @var{section} in BFD @var{abfd}
--into memory starting at @var{location}. The data is read at an
--offset of @var{offset} from the start of the input section,
--and is read for @var{count} bytes.
--
--If the contents of a constructor with the @code{SEC_CONSTRUCTOR}
--flag set are requested or if the section does not have the
--@code{SEC_HAS_CONTENTS} flag set, then the @var{location} is filled
--with zeroes. If no errors occur, @code{TRUE} is returned, else
--@code{FALSE}.
--
--@findex bfd_malloc_and_get_section
--@subsubsection @code{bfd_malloc_and_get_section}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_malloc_and_get_section
-- (bfd *abfd, asection *section, bfd_byte **buf);
--@end example
--@strong{Description}@*
--Read all data from @var{section} in BFD @var{abfd}
--into a buffer, *@var{buf}, malloc'd by this function.
--
--@findex bfd_copy_private_section_data
--@subsubsection @code{bfd_copy_private_section_data}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_copy_private_section_data
-- (bfd *ibfd, asection *isec, bfd *obfd, asection *osec);
--@end example
--@strong{Description}@*
--Copy private section information from @var{isec} in the BFD
--@var{ibfd} to the section @var{osec} in the BFD @var{obfd}.
--Return @code{TRUE} on success, @code{FALSE} on error. Possible error
--returns are:
--
--@itemize @bullet
--
--@item
--@code{bfd_error_no_memory} -
--Not enough memory exists to create private data for @var{osec}.
--@end itemize
--@example
--#define bfd_copy_private_section_data(ibfd, isection, obfd, osection) \
-- BFD_SEND (obfd, _bfd_copy_private_section_data, \
-- (ibfd, isection, obfd, osection))
--@end example
--
--@findex bfd_generic_is_group_section
--@subsubsection @code{bfd_generic_is_group_section}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_generic_is_group_section (bfd *, const asection *sec);
--@end example
--@strong{Description}@*
--Returns TRUE if @var{sec} is a member of a group.
--
--@findex bfd_generic_discard_group
--@subsubsection @code{bfd_generic_discard_group}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_generic_discard_group (bfd *abfd, asection *group);
--@end example
--@strong{Description}@*
--Remove all members of @var{group} from the output.
--
-diff -Nur binutils-2.24.orig/bfd/doc/syms.texi binutils-2.24/bfd/doc/syms.texi
---- binutils-2.24.orig/bfd/doc/syms.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/syms.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,480 +0,0 @@
--@section Symbols
--BFD tries to maintain as much symbol information as it can when
--it moves information from file to file. BFD passes information
--to applications though the @code{asymbol} structure. When the
--application requests the symbol table, BFD reads the table in
--the native form and translates parts of it into the internal
--format. To maintain more than the information passed to
--applications, some targets keep some information ``behind the
--scenes'' in a structure only the particular back end knows
--about. For example, the coff back end keeps the original
--symbol table structure as well as the canonical structure when
--a BFD is read in. On output, the coff back end can reconstruct
--the output symbol table so that no information is lost, even
--information unique to coff which BFD doesn't know or
--understand. If a coff symbol table were read, but were written
--through an a.out back end, all the coff specific information
--would be lost. The symbol table of a BFD
--is not necessarily read in until a canonicalize request is
--made. Then the BFD back end fills in a table provided by the
--application with pointers to the canonical information. To
--output symbols, the application provides BFD with a table of
--pointers to pointers to @code{asymbol}s. This allows applications
--like the linker to output a symbol as it was read, since the ``behind
--the scenes'' information will be still available.
--@menu
--* Reading Symbols::
--* Writing Symbols::
--* Mini Symbols::
--* typedef asymbol::
--* symbol handling functions::
--@end menu
--
--@node Reading Symbols, Writing Symbols, Symbols, Symbols
--@subsection Reading symbols
--There are two stages to reading a symbol table from a BFD:
--allocating storage, and the actual reading process. This is an
--excerpt from an application which reads the symbol table:
--
--@example
-- long storage_needed;
-- asymbol **symbol_table;
-- long number_of_symbols;
-- long i;
--
-- storage_needed = bfd_get_symtab_upper_bound (abfd);
--
-- if (storage_needed < 0)
-- FAIL
--
-- if (storage_needed == 0)
-- return;
--
-- symbol_table = xmalloc (storage_needed);
-- ...
-- number_of_symbols =
-- bfd_canonicalize_symtab (abfd, symbol_table);
--
-- if (number_of_symbols < 0)
-- FAIL
--
-- for (i = 0; i < number_of_symbols; i++)
-- process_symbol (symbol_table[i]);
--@end example
--
--All storage for the symbols themselves is in an objalloc
--connected to the BFD; it is freed when the BFD is closed.
--
--@node Writing Symbols, Mini Symbols, Reading Symbols, Symbols
--@subsection Writing symbols
--Writing of a symbol table is automatic when a BFD open for
--writing is closed. The application attaches a vector of
--pointers to pointers to symbols to the BFD being written, and
--fills in the symbol count. The close and cleanup code reads
--through the table provided and performs all the necessary
--operations. The BFD output code must always be provided with an
--``owned'' symbol: one which has come from another BFD, or one
--which has been created using @code{bfd_make_empty_symbol}. Here is an
--example showing the creation of a symbol table with only one element:
--
--@example
-- #include "sysdep.h"
-- #include "bfd.h"
-- int main (void)
-- @{
-- bfd *abfd;
-- asymbol *ptrs[2];
-- asymbol *new;
--
-- abfd = bfd_openw ("foo","a.out-sunos-big");
-- bfd_set_format (abfd, bfd_object);
-- new = bfd_make_empty_symbol (abfd);
-- new->name = "dummy_symbol";
-- new->section = bfd_make_section_old_way (abfd, ".text");
-- new->flags = BSF_GLOBAL;
-- new->value = 0x12345;
--
-- ptrs[0] = new;
-- ptrs[1] = 0;
--
-- bfd_set_symtab (abfd, ptrs, 1);
-- bfd_close (abfd);
-- return 0;
-- @}
--
-- ./makesym
-- nm foo
-- 00012345 A dummy_symbol
--@end example
--
--Many formats cannot represent arbitrary symbol information; for
--instance, the @code{a.out} object format does not allow an
--arbitrary number of sections. A symbol pointing to a section
--which is not one of @code{.text}, @code{.data} or @code{.bss} cannot
--be described.
--
--@node Mini Symbols, typedef asymbol, Writing Symbols, Symbols
--@subsection Mini Symbols
--Mini symbols provide read-only access to the symbol table.
--They use less memory space, but require more time to access.
--They can be useful for tools like nm or objdump, which may
--have to handle symbol tables of extremely large executables.
--
--The @code{bfd_read_minisymbols} function will read the symbols
--into memory in an internal form. It will return a @code{void *}
--pointer to a block of memory, a symbol count, and the size of
--each symbol. The pointer is allocated using @code{malloc}, and
--should be freed by the caller when it is no longer needed.
--
--The function @code{bfd_minisymbol_to_symbol} will take a pointer
--to a minisymbol, and a pointer to a structure returned by
--@code{bfd_make_empty_symbol}, and return a @code{asymbol} structure.
--The return value may or may not be the same as the value from
--@code{bfd_make_empty_symbol} which was passed in.
--
--
--@node typedef asymbol, symbol handling functions, Mini Symbols, Symbols
--@subsection typedef asymbol
--An @code{asymbol} has the form:
--
--
--@example
--
--typedef struct bfd_symbol
--@{
-- /* A pointer to the BFD which owns the symbol. This information
-- is necessary so that a back end can work out what additional
-- information (invisible to the application writer) is carried
-- with the symbol.
--
-- This field is *almost* redundant, since you can use section->owner
-- instead, except that some symbols point to the global sections
-- bfd_@{abs,com,und@}_section. This could be fixed by making
-- these globals be per-bfd (or per-target-flavor). FIXME. */
-- struct bfd *the_bfd; /* Use bfd_asymbol_bfd(sym) to access this field. */
--
-- /* The text of the symbol. The name is left alone, and not copied; the
-- application may not alter it. */
-- const char *name;
--
-- /* The value of the symbol. This really should be a union of a
-- numeric value with a pointer, since some flags indicate that
-- a pointer to another symbol is stored here. */
-- symvalue value;
--
-- /* Attributes of a symbol. */
--#define BSF_NO_FLAGS 0x00
--
-- /* The symbol has local scope; @code{static} in @code{C}. The value
-- is the offset into the section of the data. */
--#define BSF_LOCAL (1 << 0)
--
-- /* The symbol has global scope; initialized data in @code{C}. The
-- value is the offset into the section of the data. */
--#define BSF_GLOBAL (1 << 1)
--
-- /* The symbol has global scope and is exported. The value is
-- the offset into the section of the data. */
--#define BSF_EXPORT BSF_GLOBAL /* No real difference. */
--
-- /* A normal C symbol would be one of:
-- @code{BSF_LOCAL}, @code{BSF_COMMON}, @code{BSF_UNDEFINED} or
-- @code{BSF_GLOBAL}. */
--
-- /* The symbol is a debugging record. The value has an arbitrary
-- meaning, unless BSF_DEBUGGING_RELOC is also set. */
--#define BSF_DEBUGGING (1 << 2)
--
-- /* The symbol denotes a function entry point. Used in ELF,
-- perhaps others someday. */
--#define BSF_FUNCTION (1 << 3)
--
-- /* Used by the linker. */
--#define BSF_KEEP (1 << 5)
--#define BSF_KEEP_G (1 << 6)
--
-- /* A weak global symbol, overridable without warnings by
-- a regular global symbol of the same name. */
--#define BSF_WEAK (1 << 7)
--
-- /* This symbol was created to point to a section, e.g. ELF's
-- STT_SECTION symbols. */
--#define BSF_SECTION_SYM (1 << 8)
--
-- /* The symbol used to be a common symbol, but now it is
-- allocated. */
--#define BSF_OLD_COMMON (1 << 9)
--
-- /* In some files the type of a symbol sometimes alters its
-- location in an output file - ie in coff a @code{ISFCN} symbol
-- which is also @code{C_EXT} symbol appears where it was
-- declared and not at the end of a section. This bit is set
-- by the target BFD part to convey this information. */
--#define BSF_NOT_AT_END (1 << 10)
--
-- /* Signal that the symbol is the label of constructor section. */
--#define BSF_CONSTRUCTOR (1 << 11)
--
-- /* Signal that the symbol is a warning symbol. The name is a
-- warning. The name of the next symbol is the one to warn about;
-- if a reference is made to a symbol with the same name as the next
-- symbol, a warning is issued by the linker. */
--#define BSF_WARNING (1 << 12)
--
-- /* Signal that the symbol is indirect. This symbol is an indirect
-- pointer to the symbol with the same name as the next symbol. */
--#define BSF_INDIRECT (1 << 13)
--
-- /* BSF_FILE marks symbols that contain a file name. This is used
-- for ELF STT_FILE symbols. */
--#define BSF_FILE (1 << 14)
--
-- /* Symbol is from dynamic linking information. */
--#define BSF_DYNAMIC (1 << 15)
--
-- /* The symbol denotes a data object. Used in ELF, and perhaps
-- others someday. */
--#define BSF_OBJECT (1 << 16)
--
-- /* This symbol is a debugging symbol. The value is the offset
-- into the section of the data. BSF_DEBUGGING should be set
-- as well. */
--#define BSF_DEBUGGING_RELOC (1 << 17)
--
-- /* This symbol is thread local. Used in ELF. */
--#define BSF_THREAD_LOCAL (1 << 18)
--
-- /* This symbol represents a complex relocation expression,
-- with the expression tree serialized in the symbol name. */
--#define BSF_RELC (1 << 19)
--
-- /* This symbol represents a signed complex relocation expression,
-- with the expression tree serialized in the symbol name. */
--#define BSF_SRELC (1 << 20)
--
-- /* This symbol was created by bfd_get_synthetic_symtab. */
--#define BSF_SYNTHETIC (1 << 21)
--
-- /* This symbol is an indirect code object. Unrelated to BSF_INDIRECT.
-- The dynamic linker will compute the value of this symbol by
-- calling the function that it points to. BSF_FUNCTION must
-- also be also set. */
--#define BSF_GNU_INDIRECT_FUNCTION (1 << 22)
-- /* This symbol is a globally unique data object. The dynamic linker
-- will make sure that in the entire process there is just one symbol
-- with this name and type in use. BSF_OBJECT must also be set. */
--#define BSF_GNU_UNIQUE (1 << 23)
--
-- flagword flags;
--
-- /* A pointer to the section to which this symbol is
-- relative. This will always be non NULL, there are special
-- sections for undefined and absolute symbols. */
-- struct bfd_section *section;
--
-- /* Back end special data. */
-- union
-- @{
-- void *p;
-- bfd_vma i;
-- @}
-- udata;
--@}
--asymbol;
--
--@end example
--
--@node symbol handling functions, , typedef asymbol, Symbols
--@subsection Symbol handling functions
--
--
--@findex bfd_get_symtab_upper_bound
--@subsubsection @code{bfd_get_symtab_upper_bound}
--@strong{Description}@*
--Return the number of bytes required to store a vector of pointers
--to @code{asymbols} for all the symbols in the BFD @var{abfd},
--including a terminal NULL pointer. If there are no symbols in
--the BFD, then return 0. If an error occurs, return -1.
--@example
--#define bfd_get_symtab_upper_bound(abfd) \
-- BFD_SEND (abfd, _bfd_get_symtab_upper_bound, (abfd))
--
--@end example
--
--@findex bfd_is_local_label
--@subsubsection @code{bfd_is_local_label}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_is_local_label (bfd *abfd, asymbol *sym);
--@end example
--@strong{Description}@*
--Return TRUE if the given symbol @var{sym} in the BFD @var{abfd} is
--a compiler generated local label, else return FALSE.
--
--@findex bfd_is_local_label_name
--@subsubsection @code{bfd_is_local_label_name}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_is_local_label_name (bfd *abfd, const char *name);
--@end example
--@strong{Description}@*
--Return TRUE if a symbol with the name @var{name} in the BFD
--@var{abfd} is a compiler generated local label, else return
--FALSE. This just checks whether the name has the form of a
--local label.
--@example
--#define bfd_is_local_label_name(abfd, name) \
-- BFD_SEND (abfd, _bfd_is_local_label_name, (abfd, name))
--
--@end example
--
--@findex bfd_is_target_special_symbol
--@subsubsection @code{bfd_is_target_special_symbol}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_is_target_special_symbol (bfd *abfd, asymbol *sym);
--@end example
--@strong{Description}@*
--Return TRUE iff a symbol @var{sym} in the BFD @var{abfd} is something
--special to the particular target represented by the BFD. Such symbols
--should normally not be mentioned to the user.
--@example
--#define bfd_is_target_special_symbol(abfd, sym) \
-- BFD_SEND (abfd, _bfd_is_target_special_symbol, (abfd, sym))
--
--@end example
--
--@findex bfd_canonicalize_symtab
--@subsubsection @code{bfd_canonicalize_symtab}
--@strong{Description}@*
--Read the symbols from the BFD @var{abfd}, and fills in
--the vector @var{location} with pointers to the symbols and
--a trailing NULL.
--Return the actual number of symbol pointers, not
--including the NULL.
--@example
--#define bfd_canonicalize_symtab(abfd, location) \
-- BFD_SEND (abfd, _bfd_canonicalize_symtab, (abfd, location))
--
--@end example
--
--@findex bfd_set_symtab
--@subsubsection @code{bfd_set_symtab}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_set_symtab
-- (bfd *abfd, asymbol **location, unsigned int count);
--@end example
--@strong{Description}@*
--Arrange that when the output BFD @var{abfd} is closed,
--the table @var{location} of @var{count} pointers to symbols
--will be written.
--
--@findex bfd_print_symbol_vandf
--@subsubsection @code{bfd_print_symbol_vandf}
--@strong{Synopsis}
--@example
--void bfd_print_symbol_vandf (bfd *abfd, void *file, asymbol *symbol);
--@end example
--@strong{Description}@*
--Print the value and flags of the @var{symbol} supplied to the
--stream @var{file}.
--
--@findex bfd_make_empty_symbol
--@subsubsection @code{bfd_make_empty_symbol}
--@strong{Description}@*
--Create a new @code{asymbol} structure for the BFD @var{abfd}
--and return a pointer to it.
--
--This routine is necessary because each back end has private
--information surrounding the @code{asymbol}. Building your own
--@code{asymbol} and pointing to it will not create the private
--information, and will cause problems later on.
--@example
--#define bfd_make_empty_symbol(abfd) \
-- BFD_SEND (abfd, _bfd_make_empty_symbol, (abfd))
--
--@end example
--
--@findex _bfd_generic_make_empty_symbol
--@subsubsection @code{_bfd_generic_make_empty_symbol}
--@strong{Synopsis}
--@example
--asymbol *_bfd_generic_make_empty_symbol (bfd *);
--@end example
--@strong{Description}@*
--Create a new @code{asymbol} structure for the BFD @var{abfd}
--and return a pointer to it. Used by core file routines,
--binary back-end and anywhere else where no private info
--is needed.
--
--@findex bfd_make_debug_symbol
--@subsubsection @code{bfd_make_debug_symbol}
--@strong{Description}@*
--Create a new @code{asymbol} structure for the BFD @var{abfd},
--to be used as a debugging symbol. Further details of its use have
--yet to be worked out.
--@example
--#define bfd_make_debug_symbol(abfd,ptr,size) \
-- BFD_SEND (abfd, _bfd_make_debug_symbol, (abfd, ptr, size))
--
--@end example
--
--@findex bfd_decode_symclass
--@subsubsection @code{bfd_decode_symclass}
--@strong{Description}@*
--Return a character corresponding to the symbol
--class of @var{symbol}, or '?' for an unknown class.
--
--@strong{Synopsis}
--@example
--int bfd_decode_symclass (asymbol *symbol);
--@end example
--@findex bfd_is_undefined_symclass
--@subsubsection @code{bfd_is_undefined_symclass}
--@strong{Description}@*
--Returns non-zero if the class symbol returned by
--bfd_decode_symclass represents an undefined symbol.
--Returns zero otherwise.
--
--@strong{Synopsis}
--@example
--bfd_boolean bfd_is_undefined_symclass (int symclass);
--@end example
--@findex bfd_symbol_info
--@subsubsection @code{bfd_symbol_info}
--@strong{Description}@*
--Fill in the basic info about symbol that nm needs.
--Additional info may be added by the back-ends after
--calling this function.
--
--@strong{Synopsis}
--@example
--void bfd_symbol_info (asymbol *symbol, symbol_info *ret);
--@end example
--@findex bfd_copy_private_symbol_data
--@subsubsection @code{bfd_copy_private_symbol_data}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_copy_private_symbol_data
-- (bfd *ibfd, asymbol *isym, bfd *obfd, asymbol *osym);
--@end example
--@strong{Description}@*
--Copy private symbol information from @var{isym} in the BFD
--@var{ibfd} to the symbol @var{osym} in the BFD @var{obfd}.
--Return @code{TRUE} on success, @code{FALSE} on error. Possible error
--returns are:
--
--@itemize @bullet
--
--@item
--@code{bfd_error_no_memory} -
--Not enough memory exists to create private data for @var{osec}.
--@end itemize
--@example
--#define bfd_copy_private_symbol_data(ibfd, isymbol, obfd, osymbol) \
-- BFD_SEND (obfd, _bfd_copy_private_symbol_data, \
-- (ibfd, isymbol, obfd, osymbol))
--
--@end example
--
-diff -Nur binutils-2.24.orig/bfd/doc/targets.texi binutils-2.24/bfd/doc/targets.texi
---- binutils-2.24.orig/bfd/doc/targets.texi 2013-11-18 09:49:27.000000000 +0100
-+++ binutils-2.24/bfd/doc/targets.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,621 +0,0 @@
--@section Targets
--
--
--@strong{Description}@*
--Each port of BFD to a different machine requires the creation
--of a target back end. All the back end provides to the root
--part of BFD is a structure containing pointers to functions
--which perform certain low level operations on files. BFD
--translates the applications's requests through a pointer into
--calls to the back end routines.
--
--When a file is opened with @code{bfd_openr}, its format and
--target are unknown. BFD uses various mechanisms to determine
--how to interpret the file. The operations performed are:
--
--@itemize @bullet
--
--@item
--Create a BFD by calling the internal routine
--@code{_bfd_new_bfd}, then call @code{bfd_find_target} with the
--target string supplied to @code{bfd_openr} and the new BFD pointer.
--
--@item
--If a null target string was provided to @code{bfd_find_target},
--look up the environment variable @code{GNUTARGET} and use
--that as the target string.
--
--@item
--If the target string is still @code{NULL}, or the target string is
--@code{default}, then use the first item in the target vector
--as the target type, and set @code{target_defaulted} in the BFD to
--cause @code{bfd_check_format} to loop through all the targets.
--@xref{bfd_target}. @xref{Formats}.
--
--@item
--Otherwise, inspect the elements in the target vector
--one by one, until a match on target name is found. When found,
--use it.
--
--@item
--Otherwise return the error @code{bfd_error_invalid_target} to
--@code{bfd_openr}.
--
--@item
--@code{bfd_openr} attempts to open the file using
--@code{bfd_open_file}, and returns the BFD.
--@end itemize
--Once the BFD has been opened and the target selected, the file
--format may be determined. This is done by calling
--@code{bfd_check_format} on the BFD with a suggested format.
--If @code{target_defaulted} has been set, each possible target
--type is tried to see if it recognizes the specified format.
--@code{bfd_check_format} returns @code{TRUE} when the caller guesses right.
--@menu
--* bfd_target::
--@end menu
--
--@node bfd_target, , Targets, Targets
--
--@subsection bfd_target
--
--
--@strong{Description}@*
--This structure contains everything that BFD knows about a
--target. It includes things like its byte order, name, and which
--routines to call to do various operations.
--
--Every BFD points to a target structure with its @code{xvec}
--member.
--
--The macros below are used to dispatch to functions through the
--@code{bfd_target} vector. They are used in a number of macros further
--down in @file{bfd.h}, and are also used when calling various
--routines by hand inside the BFD implementation. The @var{arglist}
--argument must be parenthesized; it contains all the arguments
--to the called function.
--
--They make the documentation (more) unpleasant to read, so if
--someone wants to fix this and not break the above, please do.
--@example
--#define BFD_SEND(bfd, message, arglist) \
-- ((*((bfd)->xvec->message)) arglist)
--
--#ifdef DEBUG_BFD_SEND
--#undef BFD_SEND
--#define BFD_SEND(bfd, message, arglist) \
-- (((bfd) && (bfd)->xvec && (bfd)->xvec->message) ? \
-- ((*((bfd)->xvec->message)) arglist) : \
-- (bfd_assert (__FILE__,__LINE__), NULL))
--#endif
--@end example
--For operations which index on the BFD format:
--@example
--#define BFD_SEND_FMT(bfd, message, arglist) \
-- (((bfd)->xvec->message[(int) ((bfd)->format)]) arglist)
--
--#ifdef DEBUG_BFD_SEND
--#undef BFD_SEND_FMT
--#define BFD_SEND_FMT(bfd, message, arglist) \
-- (((bfd) && (bfd)->xvec && (bfd)->xvec->message) ? \
-- (((bfd)->xvec->message[(int) ((bfd)->format)]) arglist) : \
-- (bfd_assert (__FILE__,__LINE__), NULL))
--#endif
--
--@end example
--This is the structure which defines the type of BFD this is. The
--@code{xvec} member of the struct @code{bfd} itself points here. Each
--module that implements access to a different target under BFD,
--defines one of these.
--
--FIXME, these names should be rationalised with the names of
--the entry points which call them. Too bad we can't have one
--macro to define them both!
--@example
--enum bfd_flavour
--@{
-- bfd_target_unknown_flavour,
-- bfd_target_aout_flavour,
-- bfd_target_coff_flavour,
-- bfd_target_ecoff_flavour,
-- bfd_target_xcoff_flavour,
-- bfd_target_elf_flavour,
-- bfd_target_ieee_flavour,
-- bfd_target_nlm_flavour,
-- bfd_target_oasys_flavour,
-- bfd_target_tekhex_flavour,
-- bfd_target_srec_flavour,
-- bfd_target_verilog_flavour,
-- bfd_target_ihex_flavour,
-- bfd_target_som_flavour,
-- bfd_target_os9k_flavour,
-- bfd_target_versados_flavour,
-- bfd_target_msdos_flavour,
-- bfd_target_ovax_flavour,
-- bfd_target_evax_flavour,
-- bfd_target_mmo_flavour,
-- bfd_target_mach_o_flavour,
-- bfd_target_pef_flavour,
-- bfd_target_pef_xlib_flavour,
-- bfd_target_sym_flavour
--@};
--
--enum bfd_endian @{ BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN @};
--
--/* Forward declaration. */
--typedef struct bfd_link_info _bfd_link_info;
--
--/* Forward declaration. */
--typedef struct flag_info flag_info;
--
--typedef struct bfd_target
--@{
-- /* Identifies the kind of target, e.g., SunOS4, Ultrix, etc. */
-- char *name;
--
-- /* The "flavour" of a back end is a general indication about
-- the contents of a file. */
-- enum bfd_flavour flavour;
--
-- /* The order of bytes within the data area of a file. */
-- enum bfd_endian byteorder;
--
-- /* The order of bytes within the header parts of a file. */
-- enum bfd_endian header_byteorder;
--
-- /* A mask of all the flags which an executable may have set -
-- from the set @code{BFD_NO_FLAGS}, @code{HAS_RELOC}, ...@code{D_PAGED}. */
-- flagword object_flags;
--
-- /* A mask of all the flags which a section may have set - from
-- the set @code{SEC_NO_FLAGS}, @code{SEC_ALLOC}, ...@code{SET_NEVER_LOAD}. */
-- flagword section_flags;
--
-- /* The character normally found at the front of a symbol.
-- (if any), perhaps `_'. */
-- char symbol_leading_char;
--
-- /* The pad character for file names within an archive header. */
-- char ar_pad_char;
--
-- /* The maximum number of characters in an archive header. */
-- unsigned char ar_max_namelen;
--
-- /* How well this target matches, used to select between various
-- possible targets when more than one target matches. */
-- unsigned char match_priority;
--
-- /* Entries for byte swapping for data. These are different from the
-- other entry points, since they don't take a BFD as the first argument.
-- Certain other handlers could do the same. */
-- bfd_uint64_t (*bfd_getx64) (const void *);
-- bfd_int64_t (*bfd_getx_signed_64) (const void *);
-- void (*bfd_putx64) (bfd_uint64_t, void *);
-- bfd_vma (*bfd_getx32) (const void *);
-- bfd_signed_vma (*bfd_getx_signed_32) (const void *);
-- void (*bfd_putx32) (bfd_vma, void *);
-- bfd_vma (*bfd_getx16) (const void *);
-- bfd_signed_vma (*bfd_getx_signed_16) (const void *);
-- void (*bfd_putx16) (bfd_vma, void *);
--
-- /* Byte swapping for the headers. */
-- bfd_uint64_t (*bfd_h_getx64) (const void *);
-- bfd_int64_t (*bfd_h_getx_signed_64) (const void *);
-- void (*bfd_h_putx64) (bfd_uint64_t, void *);
-- bfd_vma (*bfd_h_getx32) (const void *);
-- bfd_signed_vma (*bfd_h_getx_signed_32) (const void *);
-- void (*bfd_h_putx32) (bfd_vma, void *);
-- bfd_vma (*bfd_h_getx16) (const void *);
-- bfd_signed_vma (*bfd_h_getx_signed_16) (const void *);
-- void (*bfd_h_putx16) (bfd_vma, void *);
--
-- /* Format dependent routines: these are vectors of entry points
-- within the target vector structure, one for each format to check. */
--
-- /* Check the format of a file being read. Return a @code{bfd_target *} or zero. */
-- const struct bfd_target *(*_bfd_check_format[bfd_type_end]) (bfd *);
--
-- /* Set the format of a file being written. */
-- bfd_boolean (*_bfd_set_format[bfd_type_end]) (bfd *);
--
-- /* Write cached information into a file being written, at @code{bfd_close}. */
-- bfd_boolean (*_bfd_write_contents[bfd_type_end]) (bfd *);
--
--@end example
--The general target vector. These vectors are initialized using the
--BFD_JUMP_TABLE macros.
--@example
--
-- /* Generic entry points. */
--#define BFD_JUMP_TABLE_GENERIC(NAME) \
-- NAME##_close_and_cleanup, \
-- NAME##_bfd_free_cached_info, \
-- NAME##_new_section_hook, \
-- NAME##_get_section_contents, \
-- NAME##_get_section_contents_in_window
--
-- /* Called when the BFD is being closed to do any necessary cleanup. */
-- bfd_boolean (*_close_and_cleanup) (bfd *);
-- /* Ask the BFD to free all cached information. */
-- bfd_boolean (*_bfd_free_cached_info) (bfd *);
-- /* Called when a new section is created. */
-- bfd_boolean (*_new_section_hook) (bfd *, sec_ptr);
-- /* Read the contents of a section. */
-- bfd_boolean (*_bfd_get_section_contents)
-- (bfd *, sec_ptr, void *, file_ptr, bfd_size_type);
-- bfd_boolean (*_bfd_get_section_contents_in_window)
-- (bfd *, sec_ptr, bfd_window *, file_ptr, bfd_size_type);
--
-- /* Entry points to copy private data. */
--#define BFD_JUMP_TABLE_COPY(NAME) \
-- NAME##_bfd_copy_private_bfd_data, \
-- NAME##_bfd_merge_private_bfd_data, \
-- _bfd_generic_init_private_section_data, \
-- NAME##_bfd_copy_private_section_data, \
-- NAME##_bfd_copy_private_symbol_data, \
-- NAME##_bfd_copy_private_header_data, \
-- NAME##_bfd_set_private_flags, \
-- NAME##_bfd_print_private_bfd_data
--
-- /* Called to copy BFD general private data from one object file
-- to another. */
-- bfd_boolean (*_bfd_copy_private_bfd_data) (bfd *, bfd *);
-- /* Called to merge BFD general private data from one object file
-- to a common output file when linking. */
-- bfd_boolean (*_bfd_merge_private_bfd_data) (bfd *, bfd *);
-- /* Called to initialize BFD private section data from one object file
-- to another. */
--#define bfd_init_private_section_data(ibfd, isec, obfd, osec, link_info) \
-- BFD_SEND (obfd, _bfd_init_private_section_data, (ibfd, isec, obfd, osec, link_info))
-- bfd_boolean (*_bfd_init_private_section_data)
-- (bfd *, sec_ptr, bfd *, sec_ptr, struct bfd_link_info *);
-- /* Called to copy BFD private section data from one object file
-- to another. */
-- bfd_boolean (*_bfd_copy_private_section_data)
-- (bfd *, sec_ptr, bfd *, sec_ptr);
-- /* Called to copy BFD private symbol data from one symbol
-- to another. */
-- bfd_boolean (*_bfd_copy_private_symbol_data)
-- (bfd *, asymbol *, bfd *, asymbol *);
-- /* Called to copy BFD private header data from one object file
-- to another. */
-- bfd_boolean (*_bfd_copy_private_header_data)
-- (bfd *, bfd *);
-- /* Called to set private backend flags. */
-- bfd_boolean (*_bfd_set_private_flags) (bfd *, flagword);
--
-- /* Called to print private BFD data. */
-- bfd_boolean (*_bfd_print_private_bfd_data) (bfd *, void *);
--
-- /* Core file entry points. */
--#define BFD_JUMP_TABLE_CORE(NAME) \
-- NAME##_core_file_failing_command, \
-- NAME##_core_file_failing_signal, \
-- NAME##_core_file_matches_executable_p, \
-- NAME##_core_file_pid
--
-- char * (*_core_file_failing_command) (bfd *);
-- int (*_core_file_failing_signal) (bfd *);
-- bfd_boolean (*_core_file_matches_executable_p) (bfd *, bfd *);
-- int (*_core_file_pid) (bfd *);
--
-- /* Archive entry points. */
--#define BFD_JUMP_TABLE_ARCHIVE(NAME) \
-- NAME##_slurp_armap, \
-- NAME##_slurp_extended_name_table, \
-- NAME##_construct_extended_name_table, \
-- NAME##_truncate_arname, \
-- NAME##_write_armap, \
-- NAME##_read_ar_hdr, \
-- NAME##_write_ar_hdr, \
-- NAME##_openr_next_archived_file, \
-- NAME##_get_elt_at_index, \
-- NAME##_generic_stat_arch_elt, \
-- NAME##_update_armap_timestamp
--
-- bfd_boolean (*_bfd_slurp_armap) (bfd *);
-- bfd_boolean (*_bfd_slurp_extended_name_table) (bfd *);
-- bfd_boolean (*_bfd_construct_extended_name_table)
-- (bfd *, char **, bfd_size_type *, const char **);
-- void (*_bfd_truncate_arname) (bfd *, const char *, char *);
-- bfd_boolean (*write_armap)
-- (bfd *, unsigned int, struct orl *, unsigned int, int);
-- void * (*_bfd_read_ar_hdr_fn) (bfd *);
-- bfd_boolean (*_bfd_write_ar_hdr_fn) (bfd *, bfd *);
-- bfd * (*openr_next_archived_file) (bfd *, bfd *);
--#define bfd_get_elt_at_index(b,i) BFD_SEND (b, _bfd_get_elt_at_index, (b,i))
-- bfd * (*_bfd_get_elt_at_index) (bfd *, symindex);
-- int (*_bfd_stat_arch_elt) (bfd *, struct stat *);
-- bfd_boolean (*_bfd_update_armap_timestamp) (bfd *);
--
-- /* Entry points used for symbols. */
--#define BFD_JUMP_TABLE_SYMBOLS(NAME) \
-- NAME##_get_symtab_upper_bound, \
-- NAME##_canonicalize_symtab, \
-- NAME##_make_empty_symbol, \
-- NAME##_print_symbol, \
-- NAME##_get_symbol_info, \
-- NAME##_bfd_is_local_label_name, \
-- NAME##_bfd_is_target_special_symbol, \
-- NAME##_get_lineno, \
-- NAME##_find_nearest_line, \
-- _bfd_generic_find_nearest_line_discriminator, \
-- _bfd_generic_find_line, \
-- NAME##_find_inliner_info, \
-- NAME##_bfd_make_debug_symbol, \
-- NAME##_read_minisymbols, \
-- NAME##_minisymbol_to_symbol
--
-- long (*_bfd_get_symtab_upper_bound) (bfd *);
-- long (*_bfd_canonicalize_symtab)
-- (bfd *, struct bfd_symbol **);
-- struct bfd_symbol *
-- (*_bfd_make_empty_symbol) (bfd *);
-- void (*_bfd_print_symbol)
-- (bfd *, void *, struct bfd_symbol *, bfd_print_symbol_type);
--#define bfd_print_symbol(b,p,s,e) BFD_SEND (b, _bfd_print_symbol, (b,p,s,e))
-- void (*_bfd_get_symbol_info)
-- (bfd *, struct bfd_symbol *, symbol_info *);
--#define bfd_get_symbol_info(b,p,e) BFD_SEND (b, _bfd_get_symbol_info, (b,p,e))
-- bfd_boolean (*_bfd_is_local_label_name) (bfd *, const char *);
-- bfd_boolean (*_bfd_is_target_special_symbol) (bfd *, asymbol *);
-- alent * (*_get_lineno) (bfd *, struct bfd_symbol *);
-- bfd_boolean (*_bfd_find_nearest_line)
-- (bfd *, struct bfd_section *, struct bfd_symbol **, bfd_vma,
-- const char **, const char **, unsigned int *);
-- bfd_boolean (*_bfd_find_nearest_line_discriminator)
-- (bfd *, struct bfd_section *, struct bfd_symbol **, bfd_vma,
-- const char **, const char **, unsigned int *, unsigned int *);
-- bfd_boolean (*_bfd_find_line)
-- (bfd *, struct bfd_symbol **, struct bfd_symbol *,
-- const char **, unsigned int *);
-- bfd_boolean (*_bfd_find_inliner_info)
-- (bfd *, const char **, const char **, unsigned int *);
-- /* Back-door to allow format-aware applications to create debug symbols
-- while using BFD for everything else. Currently used by the assembler
-- when creating COFF files. */
-- asymbol * (*_bfd_make_debug_symbol)
-- (bfd *, void *, unsigned long size);
--#define bfd_read_minisymbols(b, d, m, s) \
-- BFD_SEND (b, _read_minisymbols, (b, d, m, s))
-- long (*_read_minisymbols)
-- (bfd *, bfd_boolean, void **, unsigned int *);
--#define bfd_minisymbol_to_symbol(b, d, m, f) \
-- BFD_SEND (b, _minisymbol_to_symbol, (b, d, m, f))
-- asymbol * (*_minisymbol_to_symbol)
-- (bfd *, bfd_boolean, const void *, asymbol *);
--
-- /* Routines for relocs. */
--#define BFD_JUMP_TABLE_RELOCS(NAME) \
-- NAME##_get_reloc_upper_bound, \
-- NAME##_canonicalize_reloc, \
-- NAME##_bfd_reloc_type_lookup, \
-- NAME##_bfd_reloc_name_lookup
--
-- long (*_get_reloc_upper_bound) (bfd *, sec_ptr);
-- long (*_bfd_canonicalize_reloc)
-- (bfd *, sec_ptr, arelent **, struct bfd_symbol **);
-- /* See documentation on reloc types. */
-- reloc_howto_type *
-- (*reloc_type_lookup) (bfd *, bfd_reloc_code_real_type);
-- reloc_howto_type *
-- (*reloc_name_lookup) (bfd *, const char *);
--
--
-- /* Routines used when writing an object file. */
--#define BFD_JUMP_TABLE_WRITE(NAME) \
-- NAME##_set_arch_mach, \
-- NAME##_set_section_contents
--
-- bfd_boolean (*_bfd_set_arch_mach)
-- (bfd *, enum bfd_architecture, unsigned long);
-- bfd_boolean (*_bfd_set_section_contents)
-- (bfd *, sec_ptr, const void *, file_ptr, bfd_size_type);
--
-- /* Routines used by the linker. */
--#define BFD_JUMP_TABLE_LINK(NAME) \
-- NAME##_sizeof_headers, \
-- NAME##_bfd_get_relocated_section_contents, \
-- NAME##_bfd_relax_section, \
-- NAME##_bfd_link_hash_table_create, \
-- NAME##_bfd_link_hash_table_free, \
-- NAME##_bfd_link_add_symbols, \
-- NAME##_bfd_link_just_syms, \
-- NAME##_bfd_copy_link_hash_symbol_type, \
-- NAME##_bfd_final_link, \
-- NAME##_bfd_link_split_section, \
-- NAME##_bfd_gc_sections, \
-- NAME##_bfd_lookup_section_flags, \
-- NAME##_bfd_merge_sections, \
-- NAME##_bfd_is_group_section, \
-- NAME##_bfd_discard_group, \
-- NAME##_section_already_linked, \
-- NAME##_bfd_define_common_symbol
--
-- int (*_bfd_sizeof_headers) (bfd *, struct bfd_link_info *);
-- bfd_byte * (*_bfd_get_relocated_section_contents)
-- (bfd *, struct bfd_link_info *, struct bfd_link_order *,
-- bfd_byte *, bfd_boolean, struct bfd_symbol **);
--
-- bfd_boolean (*_bfd_relax_section)
-- (bfd *, struct bfd_section *, struct bfd_link_info *, bfd_boolean *);
--
-- /* Create a hash table for the linker. Different backends store
-- different information in this table. */
-- struct bfd_link_hash_table *
-- (*_bfd_link_hash_table_create) (bfd *);
--
-- /* Release the memory associated with the linker hash table. */
-- void (*_bfd_link_hash_table_free) (struct bfd_link_hash_table *);
--
-- /* Add symbols from this object file into the hash table. */
-- bfd_boolean (*_bfd_link_add_symbols) (bfd *, struct bfd_link_info *);
--
-- /* Indicate that we are only retrieving symbol values from this section. */
-- void (*_bfd_link_just_syms) (asection *, struct bfd_link_info *);
--
-- /* Copy the symbol type of a linker hash table entry. */
--#define bfd_copy_link_hash_symbol_type(b, t, f) \
-- BFD_SEND (b, _bfd_copy_link_hash_symbol_type, (b, t, f))
-- void (*_bfd_copy_link_hash_symbol_type)
-- (bfd *, struct bfd_link_hash_entry *, struct bfd_link_hash_entry *);
--
-- /* Do a link based on the link_order structures attached to each
-- section of the BFD. */
-- bfd_boolean (*_bfd_final_link) (bfd *, struct bfd_link_info *);
--
-- /* Should this section be split up into smaller pieces during linking. */
-- bfd_boolean (*_bfd_link_split_section) (bfd *, struct bfd_section *);
--
-- /* Remove sections that are not referenced from the output. */
-- bfd_boolean (*_bfd_gc_sections) (bfd *, struct bfd_link_info *);
--
-- /* Sets the bitmask of allowed and disallowed section flags. */
-- bfd_boolean (*_bfd_lookup_section_flags) (struct bfd_link_info *,
-- struct flag_info *,
-- asection *);
--
-- /* Attempt to merge SEC_MERGE sections. */
-- bfd_boolean (*_bfd_merge_sections) (bfd *, struct bfd_link_info *);
--
-- /* Is this section a member of a group? */
-- bfd_boolean (*_bfd_is_group_section) (bfd *, const struct bfd_section *);
--
-- /* Discard members of a group. */
-- bfd_boolean (*_bfd_discard_group) (bfd *, struct bfd_section *);
--
-- /* Check if SEC has been already linked during a reloceatable or
-- final link. */
-- bfd_boolean (*_section_already_linked) (bfd *, asection *,
-- struct bfd_link_info *);
--
-- /* Define a common symbol. */
-- bfd_boolean (*_bfd_define_common_symbol) (bfd *, struct bfd_link_info *,
-- struct bfd_link_hash_entry *);
--
-- /* Routines to handle dynamic symbols and relocs. */
--#define BFD_JUMP_TABLE_DYNAMIC(NAME) \
-- NAME##_get_dynamic_symtab_upper_bound, \
-- NAME##_canonicalize_dynamic_symtab, \
-- NAME##_get_synthetic_symtab, \
-- NAME##_get_dynamic_reloc_upper_bound, \
-- NAME##_canonicalize_dynamic_reloc
--
-- /* Get the amount of memory required to hold the dynamic symbols. */
-- long (*_bfd_get_dynamic_symtab_upper_bound) (bfd *);
-- /* Read in the dynamic symbols. */
-- long (*_bfd_canonicalize_dynamic_symtab)
-- (bfd *, struct bfd_symbol **);
-- /* Create synthetized symbols. */
-- long (*_bfd_get_synthetic_symtab)
-- (bfd *, long, struct bfd_symbol **, long, struct bfd_symbol **,
-- struct bfd_symbol **);
-- /* Get the amount of memory required to hold the dynamic relocs. */
-- long (*_bfd_get_dynamic_reloc_upper_bound) (bfd *);
-- /* Read in the dynamic relocs. */
-- long (*_bfd_canonicalize_dynamic_reloc)
-- (bfd *, arelent **, struct bfd_symbol **);
--
--@end example
--A pointer to an alternative bfd_target in case the current one is not
--satisfactory. This can happen when the target cpu supports both big
--and little endian code, and target chosen by the linker has the wrong
--endianness. The function open_output() in ld/ldlang.c uses this field
--to find an alternative output format that is suitable.
--@example
-- /* Opposite endian version of this target. */
-- const struct bfd_target * alternative_target;
--
-- /* Data for use by back-end routines, which isn't
-- generic enough to belong in this structure. */
-- const void *backend_data;
--
--@} bfd_target;
--
--@end example
--
--@findex bfd_set_default_target
--@subsubsection @code{bfd_set_default_target}
--@strong{Synopsis}
--@example
--bfd_boolean bfd_set_default_target (const char *name);
--@end example
--@strong{Description}@*
--Set the default target vector to use when recognizing a BFD.
--This takes the name of the target, which may be a BFD target
--name or a configuration triplet.
--
--@findex bfd_find_target
--@subsubsection @code{bfd_find_target}
--@strong{Synopsis}
--@example
--const bfd_target *bfd_find_target (const char *target_name, bfd *abfd);
--@end example
--@strong{Description}@*
--Return a pointer to the transfer vector for the object target
--named @var{target_name}. If @var{target_name} is @code{NULL},
--choose the one in the environment variable @code{GNUTARGET}; if
--that is null or not defined, then choose the first entry in the
--target list. Passing in the string "default" or setting the
--environment variable to "default" will cause the first entry in
--the target list to be returned, and "target_defaulted" will be
--set in the BFD if @var{abfd} isn't @code{NULL}. This causes
--@code{bfd_check_format} to loop over all the targets to find the
--one that matches the file being read.
--
--@findex bfd_get_target_info
--@subsubsection @code{bfd_get_target_info}
--@strong{Synopsis}
--@example
--const bfd_target *bfd_get_target_info (const char *target_name,
-- bfd *abfd,
-- bfd_boolean *is_bigendian,
-- int *underscoring,
-- const char **def_target_arch);
--@end example
--@strong{Description}@*
--Return a pointer to the transfer vector for the object target
--named @var{target_name}. If @var{target_name} is @code{NULL},
--choose the one in the environment variable @code{GNUTARGET}; if
--that is null or not defined, then choose the first entry in the
--target list. Passing in the string "default" or setting the
--environment variable to "default" will cause the first entry in
--the target list to be returned, and "target_defaulted" will be
--set in the BFD if @var{abfd} isn't @code{NULL}. This causes
--@code{bfd_check_format} to loop over all the targets to find the
--one that matches the file being read.
--If @var{is_bigendian} is not @code{NULL}, then set this value to target's
--endian mode. True for big-endian, FALSE for little-endian or for
--invalid target.
--If @var{underscoring} is not @code{NULL}, then set this value to target's
--underscoring mode. Zero for none-underscoring, -1 for invalid target,
--else the value of target vector's symbol underscoring.
--If @var{def_target_arch} is not @code{NULL}, then set it to the architecture
--string specified by the target_name.
--
--@findex bfd_target_list
--@subsubsection @code{bfd_target_list}
--@strong{Synopsis}
--@example
--const char ** bfd_target_list (void);
--@end example
--@strong{Description}@*
--Return a freshly malloced NULL-terminated
--vector of the names of all the valid BFD targets. Do not
--modify the names.
--
--@findex bfd_seach_for_target
--@subsubsection @code{bfd_seach_for_target}
--@strong{Synopsis}
--@example
--const bfd_target *bfd_search_for_target
-- (int (*search_func) (const bfd_target *, void *),
-- void *);
--@end example
--@strong{Description}@*
--Return a pointer to the first transfer vector in the list of
--transfer vectors maintained by BFD that produces a non-zero
--result when passed to the function @var{search_func}. The
--parameter @var{data} is passed, unexamined, to the search
--function.
--
-diff -Nur binutils-2.24.orig/bfd/elf32-nds32.c binutils-2.24/bfd/elf32-nds32.c
---- binutils-2.24.orig/bfd/elf32-nds32.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/bfd/elf32-nds32.c 2016-06-30 21:26:12.569889845 +0200
-@@ -0,0 +1,20274 @@
-+/* NDS32-specific support for 32-bit ELF.
-+ Copyright (C) 2012-2013 Free Software Foundation, Inc.
-+ Contributed by Andes Technology Corporation.
-+
-+ This file is part of BFD, the Binary File Descriptor library.
-+
-+ This program is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 3 of the License, or
-+ (at your option) any later version.
-+
-+ This program is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ You should have received a copy of the GNU General Public License
-+ along with this program; if not, write to the Free Software
-+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-+ 02110-1301, USA.*/
-+
-+
-+#include "sysdep.h"
-+#include "bfd.h"
-+#include "bfd_stdint.h"
-+#include "bfdlink.h"
-+#include "libbfd.h"
-+#include "elf-bfd.h"
-+#include "libiberty.h"
-+#include "bfd_stdint.h"
-+#include "elf/nds32.h"
-+#include "opcode/nds32.h"
-+#include "elf32-nds32.h"
-+#include "opcode/cgen.h"
-+#include "../opcodes/nds32-opc.h"
-+
-+/* Relocation HOWTO functions. */
-+static bfd_reloc_status_type nds32_elf_ignore_reloc
-+ (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
-+static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
-+ (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
-+static bfd_reloc_status_type nds32_elf_hi20_reloc
-+ (bfd *, arelent *, asymbol *, void *,
-+ asection *, bfd *, char **);
-+static bfd_reloc_status_type nds32_elf_lo12_reloc
-+ (bfd *, arelent *, asymbol *, void *,
-+ asection *, bfd *, char **);
-+static bfd_reloc_status_type nds32_elf_generic_reloc
-+ (bfd *, arelent *, asymbol *, void *,
-+ asection *, bfd *, char **);
-+static bfd_reloc_status_type nds32_elf_sda15_reloc
-+ (bfd *, arelent *, asymbol *, void *,
-+ asection *, bfd *, char **);
-+
-+/* Helper functions for HOWTO. */
-+static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
-+ (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
-+ asection *, bfd_vma, bfd_vma);
-+static void nds32_elf_relocate_hi20
-+ (bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, bfd_byte *, bfd_vma);
-+static reloc_howto_type *bfd_elf32_bfd_reloc_type_table_lookup
-+ (enum elf_nds32_reloc_type);
-+static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
-+ (bfd *, bfd_reloc_code_real_type);
-+
-+/* Target hooks. */
-+static void nds32_info_to_howto_rel
-+ (bfd *, arelent *, Elf_Internal_Rela *dst);
-+static void nds32_info_to_howto
-+ (bfd *, arelent *, Elf_Internal_Rela *dst);
-+static bfd_boolean nds32_elf_add_symbol_hook
-+ (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **,
-+ flagword *, asection **, bfd_vma *);
-+static bfd_boolean nds32_elf_relocate_section
-+ (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
-+ Elf_Internal_Rela *, Elf_Internal_Sym *, asection **);
-+static bfd_boolean nds32_elf_object_p (bfd *);
-+static void nds32_elf_final_write_processing (bfd *, bfd_boolean);
-+static bfd_boolean nds32_elf_set_private_flags (bfd *, flagword);
-+static bfd_boolean nds32_elf_merge_private_bfd_data (bfd *, bfd *);
-+static bfd_boolean nds32_elf_print_private_bfd_data (bfd *, void *);
-+static bfd_boolean nds32_elf_gc_sweep_hook
-+ (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
-+static bfd_boolean nds32_elf_check_relocs
-+ (bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
-+static asection *nds32_elf_gc_mark_hook
-+ (asection *, struct bfd_link_info *, Elf_Internal_Rela *,
-+ struct elf_link_hash_entry *, Elf_Internal_Sym *);
-+static bfd_boolean nds32_elf_adjust_dynamic_symbol
-+ (struct bfd_link_info *, struct elf_link_hash_entry *);
-+static bfd_boolean nds32_elf_size_dynamic_sections
-+ (bfd *, struct bfd_link_info *);
-+static bfd_boolean nds32_elf_create_dynamic_sections
-+ (bfd *, struct bfd_link_info *);
-+static bfd_boolean nds32_elf_finish_dynamic_sections
-+ (bfd *, struct bfd_link_info *info);
-+static bfd_boolean nds32_elf_finish_dynamic_symbol
-+ (bfd *, struct bfd_link_info *, struct elf_link_hash_entry *,
-+ Elf_Internal_Sym *);
-+static bfd_boolean nds32_elf_mkobject (bfd *);
-+
-+/* Nds32 helper functions. */
-+static bfd_reloc_status_type nds32_elf_final_sda_base
-+ (bfd *, struct bfd_link_info *, bfd_vma *, bfd_boolean);
-+static bfd_boolean allocate_dynrelocs (struct elf_link_hash_entry *, void *);
-+static bfd_boolean readonly_dynrelocs (struct elf_link_hash_entry *, void *);
-+static Elf_Internal_Rela *find_relocs_at_address
-+ (Elf_Internal_Rela *, Elf_Internal_Rela *,
-+ Elf_Internal_Rela *, enum elf_nds32_reloc_type);
-+static bfd_vma calculate_memory_address
-+(bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
-+static int nds32_get_section_contents (bfd *, asection *,
-+ bfd_byte **, bfd_boolean);
-+static int nds32_elf_ex9_init (void);
-+static bfd_boolean nds32_elf_ex9_build_hash_table
-+(bfd *, asection *, struct bfd_link_info *);
-+static bfd_boolean nds32_elf_ex9_itb_base (struct bfd_link_info *);
-+static void nds32_elf_ex9_import_table (struct bfd_link_info *);
-+static void nds32_elf_ex9_finish (struct bfd_link_info *);
-+static void nds32_elf_ex9_reloc_jmp (struct bfd_link_info *);
-+static void nds32_elf_get_insn_with_reg
-+ (Elf_Internal_Rela *, uint32_t, uint32_t *);
-+static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
-+ Elf_Internal_Sym **);
-+static bfd_boolean nds32_elf_ex9_replace_instruction
-+ (struct bfd_link_info *, bfd *, asection *);
-+static int nds32_elf_ifc_init (void);
-+static bfd_boolean nds32_elf_ifc_calc (struct bfd_link_info *, bfd *,
-+ asection *);
-+static void nds32_elf_ifc_cse_algo (struct bfd_link_info *);
-+static bfd_boolean nds32_elf_ifc_finish (struct bfd_link_info *);
-+static bfd_boolean nds32_elf_ifc_replace (struct bfd_link_info *);
-+static bfd_boolean nds32_elf_ifc_trace_code (struct bfd_link_info *,
-+ bfd *,asection *);
-+static bfd_boolean nds32_elf_ifc_reloc (void);
-+static bfd_boolean nds32_relax_fp_as_gp
-+ (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
-+ Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
-+ Elf_Internal_Sym *isymbuf);
-+static bfd_boolean nds32_fag_remove_unused_fpbase
-+ (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
-+ Elf_Internal_Rela *irelend);
-+static bfd_byte*
-+nds32_elf_get_relocated_section_contents (bfd *abfd,
-+ struct bfd_link_info *link_info,
-+ struct bfd_link_order *link_order,
-+ bfd_byte *data,
-+ bfd_boolean relocatable,
-+ asymbol **symbols);
-+static void nds32_elf_ict_hash_init (void);
-+static void nds32_elf_ict_relocate (struct bfd_link_info *);
-+static asection*
-+nds32_elf_get_target_section (struct bfd_link_info *, char *);
-+
-+enum
-+{
-+ MACH_V1 = bfd_mach_n1h,
-+ MACH_V2 = bfd_mach_n1h_v2,
-+ MACH_V3 = bfd_mach_n1h_v3,
-+ MACH_V3M = bfd_mach_n1h_v3m,
-+};
-+
-+#define MIN(a, b) ((a) > (b) ? (b) : (a))
-+#define MAX(a, b) ((a) > (b) ? (a) : (b))
-+
-+/* True if insn is 4byte. */
-+#define INSN_32BIT(insn) ((((insn) & 0x80000000) == 0 ? (TRUE) : (FALSE)))
-+
-+/* The name of the dynamic interpreter. This is put in the .interp
-+ section. */
-+#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
-+
-+/**/
-+#define NDS32_GUARD_SEC_P(flags) ((flags) & SEC_ALLOC \
-+ && (flags) & SEC_LOAD \
-+ && (flags) & SEC_READONLY)
-+
-+/* The nop opcode we use. */
-+#define NDS32_NOP32 0x40000009
-+#define NDS32_NOP16 0x9200
-+
-+/* The size in bytes of an entry in the procedure linkage table. */
-+#define PLT_ENTRY_SIZE 24
-+#define PLT_HEADER_SIZE 24
-+
-+/* The first entry in a procedure linkage table are reserved,
-+ and the initial contents are unimportant (we zero them out).
-+ Subsequent entries look like this. */
-+#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
-+#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
-+#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
-+#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
-+#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
-+
-+/* $ta is change to $r15 (from $r25). */
-+#define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
-+#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
-+#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
-+#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
-+#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
-+#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
-+
-+#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
-+#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
-+#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
-+#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
-+#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
-+
-+#define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
-+#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
-+#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
-+#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
-+#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
-+#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
-+
-+/* These are macros used to get the relocation accurate value. */
-+#define ACCURATE_8BIT_S1 (0x100)
-+#define ACCURATE_U9BIT_S1 (0x400)
-+#define ACCURATE_12BIT_S1 (0x2000)
-+#define ACCURATE_14BIT_S1 (0x4000)
-+#define ACCURATE_19BIT (0x40000)
-+
-+/* These are macros used to get the relocation conservative value. */
-+#define CONSERVATIVE_8BIT_S1 (0x100 - 4)
-+#define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
-+#define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
-+#define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
-+/* These must be more conservative because the address may be in
-+ different segment. */
-+#define CONSERVATIVE_15BIT (0x4000 - 0x1000)
-+#define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
-+#define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
-+#define CONSERVATIVE_19BIT (0x40000 - 0x1000)
-+#define CONSERVATIVE_20BIT (0x80000 - 0x1000)
-+
-+#define NDS32_ICT_SECTION ".nds32.ict"
-+
-+/* Size of small data/bss sections, used to calculate SDA_BASE. */
-+static long got_size = 0;
-+static int is_SDA_BASE_set = 0;
-+static int is_ITB_BASE_set = 0;
-+
-+/* Convert ELF-VER in eflags to string for debugging purpose. */
-+static const char *const nds32_elfver_strtab[] = {
-+ "ELF-1.2",
-+ "ELF-1.3",
-+ "ELF-1.4",
-+};
-+
-+/* The nds32 linker needs to keep track of the number of relocs that it
-+ decides to copy in check_relocs for each symbol. This is so that
-+ it can discard PC relative relocs if it doesn't need them when
-+ linking with -Bsymbolic. We store the information in a field
-+ extending the regular ELF linker hash table. */
-+
-+/* This structure keeps track of the number of PC relative relocs we
-+ have copied for a given symbol. */
-+
-+struct elf_nds32_pcrel_relocs_copied
-+{
-+ /* Next section. */
-+ struct elf_nds32_pcrel_relocs_copied *next;
-+ /* A section in dynobj. */
-+ asection *section;
-+ /* Number of relocs copied in this section. */
-+ bfd_size_type count;
-+};
-+
-+/* The sh linker needs to keep track of the number of relocs that it
-+ decides to copy as dynamic relocs in check_relocs for each symbol.
-+ This is so that it can later discard them if they are found to be
-+ unnecessary. We store the information in a field extending the
-+ regular ELF linker hash table. */
-+
-+struct elf_nds32_dyn_relocs
-+{
-+ struct elf_nds32_dyn_relocs *next;
-+
-+ /* The input section of the reloc. */
-+ asection *sec;
-+
-+ /* Total number of relocs copied for the input section. */
-+ bfd_size_type count;
-+
-+ /* Number of pc-relative relocs copied for the input section. */
-+ bfd_size_type pc_count;
-+};
-+
-+/* Nds32 ELF linker hash entry. */
-+
-+enum elf_nds32_tls_type
-+{
-+ GOT_UNKNOWN = (0),
-+ GOT_NORMAL = (1 << 0),
-+ GOT_TLS_LE = (1 << 1),
-+ GOT_TLS_IE = (1 << 2),
-+ GOT_TLS_IEGP = (1 << 3),
-+ GOT_TLS_LD = (1 << 4),
-+ GOT_TLS_GD = (1 << 5),
-+ GOT_TLS_DESC = (1 << 6),
-+};
-+
-+struct elf_nds32_link_hash_entry
-+{
-+ struct elf_link_hash_entry root;
-+
-+ /* Track dynamic relocs copied for this symbol. */
-+ struct elf_nds32_dyn_relocs *dyn_relocs;
-+
-+ /* For checking relocation type. */
-+ enum elf_nds32_tls_type tls_type;
-+
-+ int offset_to_gp;
-+
-+ /* For saving function attribute indirect_call and entry address. */
-+ bfd_boolean indirect_call;
-+};
-+
-+/* Get the nds32 ELF linker hash table from a link_info structure. */
-+
-+#define FP_BASE_NAME "_FP_BASE_"
-+static int check_start_export_sym = 0;
-+static size_t ex9_relax_size = 0; /* Save ex9 predicted reducing size. */
-+static asection *ex9_section = NULL;
-+/* File for exporting indirect call table. */
-+static FILE *ict_file = NULL;
-+static bfd_boolean ignore_indirect_call = FALSE;
-+
-+/* Rom-patch symbol hash table. */
-+struct elf_nds32_ict_hash_entry
-+{
-+ struct bfd_hash_entry root;
-+ struct elf_link_hash_entry *h;
-+ unsigned int order;
-+};
-+
-+/* Rom-patch hash table. */
-+static struct bfd_hash_table indirect_call_table;
-+
-+/* Table to save initial crc table. */
-+static unsigned short byte_crc_table[256];
-+static unsigned short byte_inv_crc_table[256];
-+
-+/* The offset for executable tls relaxation. */
-+#define TP_OFFSET 0x0
-+
-+typedef struct
-+{
-+ int min_id;
-+ int max_id;
-+ int count;
-+ int bias;
-+ int init;
-+} elf32_nds32_relax_group_t;
-+
-+struct elf_nds32_obj_tdata
-+{
-+ struct elf_obj_tdata root;
-+
-+ /* tls_type for each local got entry. */
-+ char *local_got_tls_type;
-+
-+ unsigned int hdr_size;
-+
-+ /* GOTPLT entries for TLS descriptors. */
-+ bfd_vma *local_tlsdesc_gotent;
-+
-+ int* offset_to_gp;
-+
-+ /* for R_NDS32_RELAX_GROUP handling. */
-+ elf32_nds32_relax_group_t relax_group;
-+};
-+
-+#define elf_nds32_tdata(bfd) \
-+ ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
-+
-+#define elf32_nds32_local_got_tls_type(bfd) \
-+ (elf_nds32_tdata (bfd)->local_got_tls_type)
-+
-+#define elf32_nds32_local_gp_offset(bfd) \
-+ (elf_nds32_tdata (bfd)->offset_to_gp)
-+
-+#define elf32_nds32_relax_group_ptr(bfd) \
-+ &(elf_nds32_tdata (bfd)->relax_group)
-+
-+#define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
-+
-+bfd_boolean
-+nds32_elf_mkobject (bfd *abfd)
-+{
-+ return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
-+ NDS32_ELF_DATA);
-+}
-+
-+
-+/* Relocations used for relocation. */
-+/* NOTE!
-+ the index order must be the same with elf_nds32_reloc_type in
-+ include/elf/nds32.h
-+ */
-+#define HOWTO2(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
-+ [C] = HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC)
-+
-+static reloc_howto_type nds32_elf_howto_table[] = {
-+ /* This reloc does nothing. */
-+ HOWTO2 (R_NDS32_NONE, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_bitfield,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_NONE", /* name */
-+ FALSE, /* partial_inplace */
-+ 0, /* src_mask */
-+ 0, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* A 16 bit absolute relocation. */
-+ HOWTO2 (R_NDS32_16, /* type */
-+ 0, /* rightshift */
-+ 1, /* size (0 = byte, 1 = short, 2 = long) */
-+ 16, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_bitfield,/* complain_on_overflow */
-+ nds32_elf_generic_reloc,/* special_function */
-+ "R_NDS32_16", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffff, /* src_mask */
-+ 0xffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* A 32 bit absolute relocation. */
-+ HOWTO2 (R_NDS32_32, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_bitfield,/* complain_on_overflow */
-+ nds32_elf_generic_reloc,/* special_function */
-+ "R_NDS32_32", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* A 20 bit address. */
-+ HOWTO2 (R_NDS32_20, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_unsigned,/* complain_on_overflow */
-+ nds32_elf_generic_reloc,/* special_function */
-+ "R_NDS32_20", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xfffff, /* src_mask */
-+ 0xfffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* An PC Relative 9-bit relocation, shifted by 2.
-+ This reloc is complicated because relocations are relative to pc & -4.
-+ i.e. branches in the right insn slot use the address of the left insn
-+ slot for pc. */
-+ /* ??? It's not clear whether this should have partial_inplace set or not.
-+ Branch relaxing in the assembler can store the addend in the insn,
-+ and if bfd_install_relocation gets called the addend may get added
-+ again. */
-+ HOWTO2 (R_NDS32_9_PCREL, /* type */
-+ 1, /* rightshift */
-+ 1, /* size (0 = byte, 1 = short, 2 = long) */
-+ 8, /* bitsize */
-+ TRUE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ nds32_elf_9_pcrel_reloc,/* special_function */
-+ "R_NDS32_9_PCREL", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xff, /* src_mask */
-+ 0xff, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+
-+ /* A relative 15 bit relocation, right shifted by 1. */
-+ HOWTO2 (R_NDS32_15_PCREL, /* type */
-+ 1, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 14, /* bitsize */
-+ TRUE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_15_PCREL", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x3fff, /* src_mask */
-+ 0x3fff, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+
-+ /* A relative 17 bit relocation, right shifted by 1. */
-+ HOWTO2 (R_NDS32_17_PCREL, /* type */
-+ 1, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 16, /* bitsize */
-+ TRUE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_17_PCREL", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffff, /* src_mask */
-+ 0xffff, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+
-+ /* A relative 25 bit relocation, right shifted by 1. */
-+ /* ??? It's not clear whether this should have partial_inplace set or not.
-+ Branch relaxing in the assembler can store the addend in the insn,
-+ and if bfd_install_relocation gets called the addend may get added
-+ again. */
-+ HOWTO2 (R_NDS32_25_PCREL, /* type */
-+ 1, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 24, /* bitsize */
-+ TRUE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_25_PCREL", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffff, /* src_mask */
-+ 0xffffff, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+
-+ /* High 20 bits of address when lower 12 is or'd in. */
-+ HOWTO2 (R_NDS32_HI20, /* type */
-+ 12, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_hi20_reloc, /* special_function */
-+ "R_NDS32_HI20", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x000fffff, /* src_mask */
-+ 0x000fffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Lower 12 bits of address. */
-+ HOWTO2 (R_NDS32_LO12S3, /* type */
-+ 3, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 9, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_lo12_reloc, /* special_function */
-+ "R_NDS32_LO12S3", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x000001ff, /* src_mask */
-+ 0x000001ff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Lower 12 bits of address. */
-+ HOWTO2 (R_NDS32_LO12S2, /* type */
-+ 2, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 10, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_lo12_reloc, /* special_function */
-+ "R_NDS32_LO12S2", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x000003ff, /* src_mask */
-+ 0x000003ff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Lower 12 bits of address. */
-+ HOWTO2 (R_NDS32_LO12S1, /* type */
-+ 1, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 11, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_lo12_reloc, /* special_function */
-+ "R_NDS32_LO12S1", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x000007ff, /* src_mask */
-+ 0x000007ff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Lower 12 bits of address. */
-+ HOWTO2 (R_NDS32_LO12S0, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 12, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_lo12_reloc, /* special_function */
-+ "R_NDS32_LO12S0", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x00000fff, /* src_mask */
-+ 0x00000fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Small data area 15 bits offset. */
-+ HOWTO2 (R_NDS32_SDA15S3, /* type */
-+ 3, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 15, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ nds32_elf_sda15_reloc, /* special_function */
-+ "R_NDS32_SDA15S3", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x00007fff, /* src_mask */
-+ 0x00007fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Small data area 15 bits offset. */
-+ HOWTO2 (R_NDS32_SDA15S2, /* type */
-+ 2, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 15, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ nds32_elf_sda15_reloc, /* special_function */
-+ "R_NDS32_SDA15S2", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x00007fff, /* src_mask */
-+ 0x00007fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Small data area 15 bits offset. */
-+ HOWTO2 (R_NDS32_SDA15S1, /* type */
-+ 1, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 15, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ nds32_elf_sda15_reloc, /* special_function */
-+ "R_NDS32_SDA15S1", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x00007fff, /* src_mask */
-+ 0x00007fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Small data area 15 bits offset. */
-+ HOWTO2 (R_NDS32_SDA15S0, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 15, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ nds32_elf_sda15_reloc, /* special_function */
-+ "R_NDS32_SDA15S0", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x00007fff, /* src_mask */
-+ 0x00007fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* GNU extension to record C++ vtable hierarchy */
-+ HOWTO2 (R_NDS32_GNU_VTINHERIT,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 0, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ NULL, /* special_function */
-+ "R_NDS32_GNU_VTINHERIT",/* name */
-+ FALSE, /* partial_inplace */
-+ 0, /* src_mask */
-+ 0, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* GNU extension to record C++ vtable member usage */
-+ HOWTO2 (R_NDS32_GNU_VTENTRY, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 0, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ _bfd_elf_rel_vtable_reloc_fn,/* special_function */
-+ "R_NDS32_GNU_VTENTRY", /* name */
-+ FALSE, /* partial_inplace */
-+ 0, /* src_mask */
-+ 0, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* A 16 bit absolute relocation. */
-+ HOWTO2 (R_NDS32_16_RELA, /* type */
-+ 0, /* rightshift */
-+ 1, /* size (0 = byte, 1 = short, 2 = long) */
-+ 16, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_bitfield,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_16_RELA", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffff, /* src_mask */
-+ 0xffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* A 32 bit absolute relocation. */
-+ HOWTO2 (R_NDS32_32_RELA, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_bitfield,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_32_RELA", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* A 20 bit address. */
-+ HOWTO2 (R_NDS32_20_RELA, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_20_RELA", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xfffff, /* src_mask */
-+ 0xfffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ HOWTO2 (R_NDS32_9_PCREL_RELA, /* type */
-+ 1, /* rightshift */
-+ 1, /* size (0 = byte, 1 = short, 2 = long) */
-+ 8, /* bitsize */
-+ TRUE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_9_PCREL_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xff, /* src_mask */
-+ 0xff, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+
-+ /* A relative 15 bit relocation, right shifted by 1. */
-+ HOWTO2 (R_NDS32_15_PCREL_RELA,/* type */
-+ 1, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 14, /* bitsize */
-+ TRUE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_15_PCREL_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x3fff, /* src_mask */
-+ 0x3fff, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+
-+ /* A relative 17 bit relocation, right shifted by 1. */
-+ HOWTO2 (R_NDS32_17_PCREL_RELA,/* type */
-+ 1, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 16, /* bitsize */
-+ TRUE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_17_PCREL_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xffff, /* src_mask */
-+ 0xffff, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+
-+ /* A relative 25 bit relocation, right shifted by 2. */
-+ HOWTO2 (R_NDS32_25_PCREL_RELA,/* type */
-+ 1, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 24, /* bitsize */
-+ TRUE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_25_PCREL_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffff, /* src_mask */
-+ 0xffffff, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+
-+ /* High 20 bits of address when lower 16 is or'd in. */
-+ HOWTO2 (R_NDS32_HI20_RELA, /* type */
-+ 12, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_HI20_RELA", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x000fffff, /* src_mask */
-+ 0x000fffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Lower 12 bits of address. */
-+ HOWTO2 (R_NDS32_LO12S3_RELA, /* type */
-+ 3, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 9, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_LO12S3_RELA", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x000001ff, /* src_mask */
-+ 0x000001ff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Lower 12 bits of address. */
-+ HOWTO2 (R_NDS32_LO12S2_RELA, /* type */
-+ 2, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 10, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_LO12S2_RELA", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x000003ff, /* src_mask */
-+ 0x000003ff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Lower 12 bits of address. */
-+ HOWTO2 (R_NDS32_LO12S1_RELA, /* type */
-+ 1, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 11, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_LO12S1_RELA", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x000007ff, /* src_mask */
-+ 0x000007ff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Lower 12 bits of address. */
-+ HOWTO2 (R_NDS32_LO12S0_RELA, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 12, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_LO12S0_RELA", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x00000fff, /* src_mask */
-+ 0x00000fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Small data area 15 bits offset. */
-+ HOWTO2 (R_NDS32_SDA15S3_RELA, /* type */
-+ 3, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 15, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_SDA15S3_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x00007fff, /* src_mask */
-+ 0x00007fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Small data area 15 bits offset. */
-+ HOWTO2 (R_NDS32_SDA15S2_RELA, /* type */
-+ 2, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 15, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_SDA15S2_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x00007fff, /* src_mask */
-+ 0x00007fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ HOWTO2 (R_NDS32_SDA15S1_RELA, /* type */
-+ 1, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 15, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_SDA15S1_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x00007fff, /* src_mask */
-+ 0x00007fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ HOWTO2 (R_NDS32_SDA15S0_RELA, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 15, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_SDA15S0_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x00007fff, /* src_mask */
-+ 0x00007fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* GNU extension to record C++ vtable hierarchy */
-+ HOWTO2 (R_NDS32_RELA_GNU_VTINHERIT,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 0, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ NULL, /* special_function */
-+ "R_NDS32_RELA_GNU_VTINHERIT",/* name */
-+ FALSE, /* partial_inplace */
-+ 0, /* src_mask */
-+ 0, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* GNU extension to record C++ vtable member usage */
-+ HOWTO2 (R_NDS32_RELA_GNU_VTENTRY,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 0, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ _bfd_elf_rel_vtable_reloc_fn,/* special_function */
-+ "R_NDS32_RELA_GNU_VTENTRY",/* name */
-+ FALSE, /* partial_inplace */
-+ 0, /* src_mask */
-+ 0, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Like R_NDS32_20, but referring to the GOT table entry for
-+ the symbol. */
-+ HOWTO2 (R_NDS32_GOT20, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_GOT20", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xfffff, /* src_mask */
-+ 0xfffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Like R_NDS32_PCREL, but referring to the procedure linkage table
-+ entry for the symbol. */
-+ HOWTO2 (R_NDS32_25_PLTREL, /* type */
-+ 1, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 24, /* bitsize */
-+ TRUE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_25_PLTREL", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffff, /* src_mask */
-+ 0xffffff, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+
-+ /* This is used only by the dynamic linker. The symbol should exist
-+ both in the object being run and in some shared library. The
-+ dynamic linker copies the data addressed by the symbol from the
-+ shared library into the object, because the object being
-+ run has to have the data at some particular address. */
-+ HOWTO2 (R_NDS32_COPY, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_bitfield,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_COPY", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Like R_NDS32_20, but used when setting global offset table
-+ entries. */
-+ HOWTO2 (R_NDS32_GLOB_DAT, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_bitfield,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_GLOB_DAT", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Marks a procedure linkage table entry for a symbol. */
-+ HOWTO2 (R_NDS32_JMP_SLOT, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_bitfield,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_JMP_SLOT", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Used only by the dynamic linker. When the object is run, this
-+ longword is set to the load address of the object, plus the
-+ addend. */
-+ HOWTO2 (R_NDS32_RELATIVE, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_bitfield,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_RELATIVE", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ HOWTO2 (R_NDS32_GOTOFF, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_GOTOFF", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xfffff, /* src_mask */
-+ 0xfffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* An PC Relative 20-bit relocation used when setting PIC offset
-+ table register. */
-+ HOWTO2 (R_NDS32_GOTPC20, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ TRUE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_GOTPC20", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xfffff, /* src_mask */
-+ 0xfffff, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+
-+ /* Like R_NDS32_HI20, but referring to the GOT table entry for
-+ the symbol. */
-+ HOWTO2 (R_NDS32_GOT_HI20, /* type */
-+ 12, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_GOT_HI20", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x000fffff, /* src_mask */
-+ 0x000fffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_GOT_LO12, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 12, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_GOT_LO12", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x00000fff, /* src_mask */
-+ 0x00000fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* An PC Relative relocation used when setting PIC offset table register.
-+ Like R_NDS32_HI20, but referring to the GOT table entry for
-+ the symbol. */
-+ HOWTO2 (R_NDS32_GOTPC_HI20, /* type */
-+ 12, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_GOTPC_HI20", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x000fffff, /* src_mask */
-+ 0x000fffff, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_GOTPC_LO12, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 12, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_GOTPC_LO12", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x00000fff, /* src_mask */
-+ 0x00000fff, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+
-+ HOWTO2 (R_NDS32_GOTOFF_HI20, /* type */
-+ 12, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_GOTOFF_HI20", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x000fffff, /* src_mask */
-+ 0x000fffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_GOTOFF_LO12, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 12, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_GOTOFF_LO12", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x00000fff, /* src_mask */
-+ 0x00000fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Alignment hint for relaxable instruction. This is used with
-+ R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
-+ in order to make next label aligned on word boundary. */
-+ HOWTO2 (R_NDS32_INSN16, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_INSN16", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x00000fff, /* src_mask */
-+ 0x00000fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Alignment hint for label. */
-+ HOWTO2 (R_NDS32_LABEL, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_LABEL", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Relax hint for unconditional call sequence */
-+ HOWTO2 (R_NDS32_LONGCALL1, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_LONGCALL1", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Relax hint for conditional call sequence. */
-+ HOWTO2 (R_NDS32_LONGCALL2, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_LONGCALL2", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Relax hint for conditional call sequence. */
-+ HOWTO2 (R_NDS32_LONGCALL3, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_LONGCALL3", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Relax hint for unconditional branch sequence. */
-+ HOWTO2 (R_NDS32_LONGJUMP1, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_LONGJUMP1", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Relax hint for conditional branch sequence. */
-+ HOWTO2 (R_NDS32_LONGJUMP2, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_LONGJUMP2", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Relax hint for conditional branch sequence. */
-+ HOWTO2 (R_NDS32_LONGJUMP3, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_LONGJUMP3", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Relax hint for load/store sequence. */
-+ HOWTO2 (R_NDS32_LOADSTORE, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_LOADSTORE", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Relax hint for load/store sequence. */
-+ HOWTO2 (R_NDS32_9_FIXED_RELA, /* type */
-+ 0, /* rightshift */
-+ 1, /* size (0 = byte, 1 = short, 2 = long) */
-+ 16, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_9_FIXED_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x000000ff, /* src_mask */
-+ 0x000000ff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Relax hint for load/store sequence. */
-+ HOWTO2 (R_NDS32_15_FIXED_RELA,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_15_FIXED_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x00003fff, /* src_mask */
-+ 0x00003fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Relax hint for load/store sequence. */
-+ HOWTO2 (R_NDS32_17_FIXED_RELA,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_17_FIXED_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x0000ffff, /* src_mask */
-+ 0x0000ffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Relax hint for load/store sequence. */
-+ HOWTO2 (R_NDS32_25_FIXED_RELA,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_25_FIXED_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x00ffffff, /* src_mask */
-+ 0x00ffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* High 20 bits of PLT symbol offset relative to PC. */
-+ HOWTO2 (R_NDS32_PLTREL_HI20, /* type */
-+ 12, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_PLTREL_HI20", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x000fffff, /* src_mask */
-+ 0x000fffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Low 12 bits of PLT symbol offset relative to PC. */
-+ HOWTO2 (R_NDS32_PLTREL_LO12, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 12, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_PLTREL_LO12", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x00000fff, /* src_mask */
-+ 0x00000fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* High 20 bits of PLT symbol offset relative to GOT (GP). */
-+ HOWTO2 (R_NDS32_PLT_GOTREL_HI20, /* type */
-+ 12, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_PLT_GOTREL_HI20",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x000fffff, /* src_mask */
-+ 0x000fffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
-+ HOWTO2 (R_NDS32_PLT_GOTREL_LO12,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 12, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_PLT_GOTREL_LO12",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x00000fff, /* src_mask */
-+ 0x00000fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Small data area 12 bits offset. */
-+ HOWTO2 (R_NDS32_SDA12S2_DP_RELA,/* type */
-+ 2, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 12, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_SDA12S2_DP_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x00000fff, /* src_mask */
-+ 0x00000fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Small data area 12 bits offset. */
-+ HOWTO2 (R_NDS32_SDA12S2_SP_RELA,/* type */
-+ 2, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 12, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_SDA12S2_SP_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x00000fff, /* src_mask */
-+ 0x00000fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ /* Lower 12 bits of address. */
-+
-+ HOWTO2 (R_NDS32_LO12S2_DP_RELA, /* type */
-+ 2, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 10, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_LO12S2_DP_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x000003ff, /* src_mask */
-+ 0x000003ff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Lower 12 bits of address. */
-+ HOWTO2 (R_NDS32_LO12S2_SP_RELA,/* type */
-+ 2, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 10, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_LO12S2_SP_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x000003ff, /* src_mask */
-+ 0x000003ff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ /* Lower 12 bits of address. Special identity for or case. */
-+ HOWTO2 (R_NDS32_LO12S0_ORI_RELA,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 12, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_LO12S0_ORI_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x00000fff, /* src_mask */
-+ 0x00000fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ /* Small data area 19 bits offset. */
-+ HOWTO2 (R_NDS32_SDA16S3_RELA, /* type */
-+ 3, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 16, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_SDA16S3_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x0000ffff, /* src_mask */
-+ 0x0000ffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Small data area 15 bits offset. */
-+ HOWTO2 (R_NDS32_SDA17S2_RELA, /* type */
-+ 2, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 17, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_SDA17S2_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x0001ffff, /* src_mask */
-+ 0x0001ffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ HOWTO2 (R_NDS32_SDA18S1_RELA, /* type */
-+ 1, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 18, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_SDA18S1_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x0003ffff, /* src_mask */
-+ 0x0003ffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ HOWTO2 (R_NDS32_SDA19S0_RELA, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 19, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_SDA19S0_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x0007ffff, /* src_mask */
-+ 0x0007ffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_DWARF2_OP1_RELA,/* type */
-+ 0, /* rightshift */
-+ 0, /* size (0 = byte, 1 = short, 2 = long) */
-+ 8, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_DWARF2_OP1_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xff, /* src_mask */
-+ 0xff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_DWARF2_OP2_RELA,/* type */
-+ 0, /* rightshift */
-+ 1, /* size (0 = byte, 1 = short, 2 = long) */
-+ 16, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_DWARF2_OP2_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xffff, /* src_mask */
-+ 0xffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_DWARF2_LEB_RELA,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_DWARF2_LEB_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_UPDATE_TA_RELA,/* type */
-+ 0, /* rightshift */
-+ 1, /* size (0 = byte, 1 = short, 2 = long) */
-+ 16, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_UPDATE_TA_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xffff, /* src_mask */
-+ 0xffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ /* Like R_NDS32_PCREL, but referring to the procedure linkage table
-+ entry for the symbol. */
-+ HOWTO2 (R_NDS32_9_PLTREL, /* type */
-+ 1, /* rightshift */
-+ 1, /* size (0 = byte, 1 = short, 2 = long) */
-+ 8, /* bitsize */
-+ TRUE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_9_PLTREL", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xff, /* src_mask */
-+ 0xff, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+ /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
-+ HOWTO2 (R_NDS32_PLT_GOTREL_LO20,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_PLT_GOTREL_LO20",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x000fffff, /* src_mask */
-+ 0x000fffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ /* low 15 bits of PLT symbol offset relative to GOT (GP) */
-+ HOWTO2 (R_NDS32_PLT_GOTREL_LO15,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 15, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_PLT_GOTREL_LO15",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x00007fff, /* src_mask */
-+ 0x00007fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
-+ HOWTO2 (R_NDS32_PLT_GOTREL_LO19,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 19, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_PLT_GOTREL_LO19",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x0007ffff, /* src_mask */
-+ 0x0007ffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_GOT_LO15, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 15, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_GOT_LO15", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x00007fff, /* src_mask */
-+ 0x00007fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_GOT_LO19, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 19, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_GOT_LO19", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x0007ffff, /* src_mask */
-+ 0x0007ffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_GOTOFF_LO15, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 15, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_GOTOFF_LO15", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x00007fff, /* src_mask */
-+ 0x00007fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_GOTOFF_LO19, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 19, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_GOTOFF_LO19", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x0007ffff, /* src_mask */
-+ 0x0007ffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ /* GOT 15 bits offset. */
-+ HOWTO2 (R_NDS32_GOT15S2_RELA, /* type */
-+ 2, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 15, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_GOT15S2_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x00007fff, /* src_mask */
-+ 0x00007fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ /* GOT 17 bits offset. */
-+ HOWTO2 (R_NDS32_GOT17S2_RELA, /* type */
-+ 2, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 17, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_GOT17S2_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x0001ffff, /* src_mask */
-+ 0x0001ffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ /* A 5 bit address. */
-+ HOWTO2 (R_NDS32_5_RELA, /* type */
-+ 0, /* rightshift */
-+ 1, /* size (0 = byte, 1 = short, 2 = long) */
-+ 5, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_5_RELA", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x1f, /* src_mask */
-+ 0x1f, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_10_UPCREL_RELA,/* type */
-+ 1, /* rightshift */
-+ 1, /* size (0 = byte, 1 = short, 2 = long) */
-+ 9, /* bitsize */
-+ TRUE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_unsigned,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_10_UPCREL_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x1ff, /* src_mask */
-+ 0x1ff, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_SDA_FP7U2_RELA,/* type */
-+ 2, /* rightshift */
-+ 1, /* size (0 = byte, 1 = short, 2 = long) */
-+ 7, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_unsigned,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_SDA_FP7U2_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x0000007f, /* src_mask */
-+ 0x0000007f, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_WORD_9_PCREL_RELA,/* type */
-+ 1, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 8, /* bitsize */
-+ TRUE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_WORD_9_PCREL_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xff, /* src_mask */
-+ 0xff, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_25_ABS_RELA, /* type */
-+ 1, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 24, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_25_ABS_RELA", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffff, /* src_mask */
-+ 0xffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* A relative 17 bit relocation for ifc, right shifted by 1. */
-+ HOWTO2 (R_NDS32_17IFC_PCREL_RELA,/* type */
-+ 1, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 16, /* bitsize */
-+ TRUE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_17IFC_PCREL_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xffff, /* src_mask */
-+ 0xffff, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+
-+ /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
-+ HOWTO2 (R_NDS32_10IFCU_PCREL_RELA,/* type */
-+ 1, /* rightshift */
-+ 1, /* size (0 = byte, 1 = short, 2 = long) */
-+ 9, /* bitsize */
-+ TRUE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_unsigned,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_10IFCU_PCREL_RELA",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x1ff, /* src_mask */
-+ 0x1ff, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+
-+ /* Relax hint for unconditional call sequence */
-+ HOWTO2 (R_NDS32_LONGCALL4, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_LONGCALL4", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Relax hint for conditional call sequence. */
-+ HOWTO2 (R_NDS32_LONGCALL5, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_LONGCALL5", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Relax hint for conditional call sequence. */
-+ HOWTO2 (R_NDS32_LONGCALL6, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_LONGCALL6", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Relax hint for unconditional branch sequence. */
-+ HOWTO2 (R_NDS32_LONGJUMP4, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_LONGJUMP4", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Relax hint for conditional branch sequence. */
-+ HOWTO2 (R_NDS32_LONGJUMP5, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_LONGJUMP5", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Relax hint for conditional branch sequence. */
-+ HOWTO2 (R_NDS32_LONGJUMP6, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_LONGJUMP6", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Relax hint for conditional branch sequence. */
-+ HOWTO2 (R_NDS32_LONGJUMP7, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_LONGJUMP7", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Check sum value for security. */
-+ HOWTO2 (R_NDS32_SECURITY_16, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 16, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 5, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_SECURITY_16", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x1fffe0, /* src_mask */
-+ 0x1fffe0, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+
-+ /* TLS LE TP offset relocation */
-+ HOWTO2 (R_NDS32_TLS_TPOFF, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_bitfield,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_TLS_TPOFF", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Like R_NDS32_HI20, but referring to the TLS LE entry for the symbol. */
-+ HOWTO2 (R_NDS32_TLS_LE_HI20, /* type */
-+ 12, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_TLS_LE_HI20", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x000fffff, /* src_mask */
-+ 0x000fffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_TLS_LE_LO12, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 12, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_TLS_LE_LO12", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x00000fff, /* src_mask */
-+ 0x00000fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* A 20 bit address. */
-+ HOWTO2 (R_NDS32_TLS_LE_20, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_TLS_LE_20", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xfffff, /* src_mask */
-+ 0xfffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_TLS_LE_15S0, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 15, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_TLS_LE_15S0", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x7fff, /* src_mask */
-+ 0x7fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_TLS_LE_15S1, /* type */
-+ 1, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 15, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_TLS_LE_15S1", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x7fff, /* src_mask */
-+ 0x7fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_TLS_LE_15S2, /* type */
-+ 2, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 15, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_TLS_LE_15S2", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x7fff, /* src_mask */
-+ 0x7fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Like R_NDS32_HI20, but referring to the TLS IE entry for the symbol. */
-+ HOWTO2 (R_NDS32_TLS_IE_HI20, /* type */
-+ 12, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_TLS_IE_HI20", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x000fffff, /* src_mask */
-+ 0x000fffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_TLS_IE_LO12, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 12, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_TLS_IE_LO12", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x00000fff, /* src_mask */
-+ 0x00000fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO2 (R_NDS32_TLS_IE_LO12S2,/* type */
-+ 2, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 10, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_TLS_IE_LO12S2",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x000003ff, /* src_mask */
-+ 0x000003ff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Like R_NDS32_HI20, but referring to the TLS IE (PIE) entry for the symbol. */
-+ HOWTO2 (R_NDS32_TLS_IEGP_HI20,/* type */
-+ 12, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_TLS_IEGP_HI20",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x000fffff, /* src_mask */
-+ 0x000fffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ HOWTO2 (R_NDS32_TLS_IEGP_LO12,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 12, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_TLS_IEGP_LO12",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x00000fff, /* src_mask */
-+ 0x00000fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ HOWTO2 (R_NDS32_TLS_IEGP_LO12S2,/* type */
-+ 2, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 10, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_TLS_IEGP_LO12S2",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x000003ff, /* src_mask */
-+ 0x000003ff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* TLS description relocation */
-+ HOWTO2 (R_NDS32_TLS_DESC, /* type */
-+ 12, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_hi20_reloc, /* special_function */
-+ "R_NDS32_TLS_DESC_HI20",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x000fffff, /* src_mask */
-+ 0x000fffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* TLS GD/LD description offset high part. */
-+ HOWTO2 (R_NDS32_TLS_DESC_HI20,/* type */
-+ 12, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_hi20_reloc, /* special_function */
-+ "R_NDS32_TLS_DESC_HI20",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x000fffff, /* src_mask */
-+ 0x000fffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ /* TLS GD/LD description offset low part. */
-+ HOWTO2 (R_NDS32_TLS_DESC_LO12,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 12, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_lo12_reloc, /* special_function */
-+ "R_NDS32_TLS_DESC_LO12",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x00000fff, /* src_mask */
-+ 0x00000fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* TLS GD/LD description offset set (movi). */
-+ HOWTO2 (R_NDS32_TLS_DESC_20, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_TLS_DESC_20", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x000fffff, /* src_mask */
-+ 0x000fffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* TLS GD/LD description offset set (lwi.gp). */
-+ HOWTO2 (R_NDS32_TLS_DESC_SDA17S2,/* type */
-+ 2, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 17, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_TLS_DESC_SDA17S2",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x0001ffff, /* src_mask */
-+ 0x0001ffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* Jump-patch table relocations. */
-+ /* High 20 bits of jump-patch table address. */
-+ HOWTO2 (R_NDS32_ICT_HI20, /* type */
-+ 12, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 20, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_ICT_HI20", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x000fffff, /* src_mask */
-+ 0x000fffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ /* Lower 12 bits of jump-patch table address. */
-+ HOWTO2 (R_NDS32_ICT_LO12,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 12, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_ICT_LO12",/* name */
-+ FALSE, /* partial_inplace */
-+ 0x00000fff, /* src_mask */
-+ 0x00000fff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ /* A relative 25 bit relocation, right shifted by 2. */
-+ HOWTO2 (R_NDS32_ICT_25PC,/* type */
-+ 1, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 24, /* bitsize */
-+ TRUE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_signed,/* complain_on_overflow */
-+ bfd_elf_generic_reloc, /* special_function */
-+ "R_NDS32_ICT_25PC",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffff, /* src_mask */
-+ 0xffffff, /* dst_mask */
-+ TRUE), /* pcrel_offset */
-+};
-+
-+/* Relocations used for relaxation. */
-+#define HOWTO3(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
-+ [C-R_NDS32_RELAX_ENTRY] = HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC)
-+
-+static reloc_howto_type nds32_elf_relax_howto_table[] = {
-+ HOWTO3 (R_NDS32_RELAX_ENTRY, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_RELAX_ENTRY", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_GOT_SUFF, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_GOT_SUFF", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_GOTOFF_SUFF, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_bitfield,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_GOTOFF_SUFF", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_PLT_GOT_SUFF, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_PLT_GOT_SUFF",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_MULCALL_SUFF, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_MULCALL_SUFF",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_PTR, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_PTR", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_PTR_COUNT, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_PTR_COUNT", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_PTR_RESOLVED, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_PTR_RESOLVED",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_PLTBLOCK, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_PLTBLOCK", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_RELAX_REGION_BEGIN,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_RELAX_REGION_BEGIN",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_RELAX_REGION_END,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_RELAX_REGION_END",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_MINUEND, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_MINUEND", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_SUBTRAHEND, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_SUBTRAHEND", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_DIFF8, /* type */
-+ 0, /* rightshift */
-+ 0, /* size (0 = byte, 1 = short, 2 = long) */
-+ 8, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_DIFF8", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x000000ff, /* src_mask */
-+ 0x000000ff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_DIFF16, /* type */
-+ 0, /* rightshift */
-+ 1, /* size (0 = byte, 1 = short, 2 = long) */
-+ 16, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_DIFF16", /* name */
-+ FALSE, /* partial_inplace */
-+ 0x0000ffff, /* src_mask */
-+ 0x0000ffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_DIFF32, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_DIFF32", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_DIFF_ULEB128, /* type */
-+ 0, /* rightshift */
-+ 0, /* size (0 = byte, 1 = short, 2 = long) */
-+ 0, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_DIFF_ULEB128",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_DATA, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_DATA", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_TRAN, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_TRAN", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_EMPTY, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_EMPTY", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ HOWTO3 (R_NDS32_TLS_LE_ADD, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_TLS_LE_ADD", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+ HOWTO3 (R_NDS32_TLS_LE_LS, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_TLS_LE_LS", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ HOWTO3 (R_NDS32_TLS_IEGP_LW, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_TLS_IEGP_LW", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* TLS GD/LD description address base addition. */
-+ HOWTO3 (R_NDS32_TLS_DESC_ADD, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_TLS_DESC_ADD",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* TLS GD/LD description function load. */
-+ HOWTO3 (R_NDS32_TLS_DESC_FUNC,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_TLS_DESC_FUNC",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* TLS DESC resolve function call. */
-+ HOWTO3 (R_NDS32_TLS_DESC_CALL,/* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_TLS_DESC_CALL",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* TLS DESC variable access. */
-+ HOWTO3 (R_NDS32_TLS_DESC_MEM, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_TLS_DESC_MEM",/* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* TLS GD/LD description mark (@tlsdec). */
-+ HOWTO3 (R_NDS32_RELAX_REMOVE, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_REMOVE", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+
-+ /* TLS GD/LD description mark (@tlsdec). */
-+ HOWTO3 (R_NDS32_RELAX_GROUP, /* type */
-+ 0, /* rightshift */
-+ 2, /* size (0 = byte, 1 = short, 2 = long) */
-+ 32, /* bitsize */
-+ FALSE, /* pc_relative */
-+ 0, /* bitpos */
-+ complain_overflow_dont,/* complain_on_overflow */
-+ nds32_elf_ignore_reloc,/* special_function */
-+ "R_NDS32_GROUP", /* name */
-+ FALSE, /* partial_inplace */
-+ 0xffffffff, /* src_mask */
-+ 0xffffffff, /* dst_mask */
-+ FALSE), /* pcrel_offset */
-+};
-+
-+
-+static unsigned long dl_tlsdesc_lazy_trampoline[] =
-+{
-+ 0x46200000, /* sethi $r2,#0x0 */
-+ 0x58210000, /* ori $r2,$r2,#0x0 */
-+ 0x40217400, /* add $r2,$r2,$gp */
-+ 0x04210000, /* lwi $r2,[$r2+#0x0] */
-+ 0x46300000, /* sethi $r3,#0x0 */
-+ 0x58318000, /* ori $r3,$r3,#0x0 */
-+ 0x4031f400, /* add $r3,$r3,$gp */
-+ 0x4a000800, /* jr $r2 */
-+};
-+
-+/* === code === */
-+
-+static void
-+nds32_put_trampoline (void *contents, const unsigned long *template,
-+ unsigned count)
-+{
-+ unsigned ix;
-+
-+ for (ix = 0; ix != count; ix++)
-+ {
-+ unsigned long insn = template[ix];
-+ bfd_putb32 (insn, (char *) contents + ix * 4);
-+ }
-+}
-+
-+/* nds32_insertion_sort sorts an array with nmemb elements of size size.
-+ This prototype is the same as qsort (). */
-+
-+void
-+nds32_insertion_sort (void *base, size_t nmemb, size_t size,
-+ int (*compar) (const void *lhs, const void *rhs))
-+{
-+ char *ptr = (char *) base;
-+ int i, j;
-+ char *tmp = alloca (size);
-+
-+ /* If i is less than j, i is inserted before j.
-+
-+ |---- j ----- i --------------|
-+ \ / \ /
-+ sorted unsorted
-+ */
-+
-+ for (i = 1; i < (int) nmemb; i++)
-+ {
-+ for (j = (i - 1); j >= 0; j--)
-+ if (compar (ptr + i * size, ptr + j * size) >= 0)
-+ break;
-+
-+ j++;
-+
-+ if (i == j)
-+ continue; /* i is in order. */
-+
-+ memcpy (tmp, ptr + i * size, size);
-+ memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
-+ memcpy (ptr + j * size, tmp, size);
-+ }
-+}
-+
-+/* Sort relocation by r_offset.
-+
-+ We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
-+ algorithm. Relocations at the same r_offset must keep their order.
-+ For example, RELAX_ENTRY must be the very first relocation entry.
-+
-+ Currently, this function implements insertion-sort.
-+
-+ FIXME: If we already sort them in assembler, why bother sort them
-+ here again? */
-+
-+static int
-+compar_reloc (const void *lhs, const void *rhs)
-+{
-+ const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
-+ const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
-+
-+ if (l->r_offset > r->r_offset)
-+ return 1;
-+ else if (l->r_offset == r->r_offset)
-+ return 0;
-+ else
-+ return -1;
-+}
-+
-+/* Functions listed below are only used for old relocs.
-+ nds32_elf_9_pcrel_reloc
-+ nds32_elf_do_9_pcrel_reloc
-+ nds32_elf_hi20_reloc
-+ nds32_elf_relocate_hi20
-+ nds32_elf_lo12_reloc
-+ nds32_elf_sda15_reloc
-+ nds32_elf_generic_reloc */
-+
-+/* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
-+
-+static bfd_reloc_status_type
-+nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
-+ void *data, asection *input_section, bfd *output_bfd,
-+ char **error_message ATTRIBUTE_UNUSED)
-+{
-+ /* This part is from bfd_elf_generic_reloc. */
-+ if (output_bfd != (bfd *) NULL
-+ && (symbol->flags & BSF_SECTION_SYM) == 0
-+ && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
-+ {
-+ reloc_entry->address += input_section->output_offset;
-+ return bfd_reloc_ok;
-+ }
-+
-+ if (output_bfd != NULL)
-+ {
-+ /* FIXME: See bfd_perform_relocation. Is this right? */
-+ return bfd_reloc_continue;
-+ }
-+
-+ return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
-+ input_section,
-+ data, reloc_entry->address,
-+ symbol->section,
-+ (symbol->value
-+ + symbol->section->output_section->vma
-+ + symbol->section->output_offset),
-+ reloc_entry->addend);
-+}
-+
-+/* Utility to actually perform an R_NDS32_9_PCREL reloc. */
-+#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
-+
-+static bfd_reloc_status_type
-+nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
-+ asection *input_section, bfd_byte *data,
-+ bfd_vma offset,
-+ asection *symbol_section ATTRIBUTE_UNUSED,
-+ bfd_vma symbol_value, bfd_vma addend)
-+{
-+ bfd_signed_vma relocation;
-+ unsigned short x;
-+ bfd_reloc_status_type status;
-+
-+ /* Sanity check the address (offset in section). */
-+ if (offset > bfd_get_section_limit (abfd, input_section))
-+ return bfd_reloc_outofrange;
-+
-+ relocation = symbol_value + addend;
-+ /* Make it pc relative. */
-+ relocation -= (input_section->output_section->vma
-+ + input_section->output_offset);
-+ /* These jumps mask off the lower two bits of the current address
-+ before doing pcrel calculations. */
-+ relocation -= (offset & -(bfd_vma) 2);
-+
-+ if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
-+ status = bfd_reloc_overflow;
-+ else
-+ status = bfd_reloc_ok;
-+
-+ x = bfd_getb16 (data + offset);
-+
-+ relocation >>= howto->rightshift;
-+ relocation <<= howto->bitpos;
-+ x = (x & ~howto->dst_mask)
-+ | (((x & howto->src_mask) + relocation) & howto->dst_mask);
-+
-+ bfd_putb16 ((bfd_vma) x, data + offset);
-+
-+ return status;
-+}
-+
-+/* Handle the R_NDS32_HI20_[SU]LO relocs.
-+ HI20_SLO is for the add3 and load/store with displacement instructions.
-+ HI20 is for the or3 instruction.
-+ For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
-+ the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
-+ we must add one to the high 16 bytes (which will get subtracted off when
-+ the low 16 bits are added).
-+ These relocs have to be done in combination with an R_NDS32_LO12 reloc
-+ because there is a carry from the LO12 to the HI20. Here we just save
-+ the information we need; we do the actual relocation when we see the LO12.
-+ This code is copied from the elf32-mips.c. We also support an arbitrary
-+ number of HI20 relocs to be associated with a single LO12 reloc. The
-+ assembler sorts the relocs to ensure each HI20 immediately precedes its
-+ LO12. However if there are multiple copies, the assembler may not find
-+ the real LO12 so it picks the first one it finds. */
-+
-+struct nds32_hi20
-+{
-+ struct nds32_hi20 *next;
-+ bfd_byte *addr;
-+ bfd_vma addend;
-+};
-+
-+static struct nds32_hi20 *nds32_hi20_list;
-+
-+static bfd_reloc_status_type
-+nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
-+ asymbol *symbol, void *data, asection *input_section,
-+ bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
-+{
-+ bfd_reloc_status_type ret;
-+ bfd_vma relocation;
-+ struct nds32_hi20 *n;
-+
-+ /* This part is from bfd_elf_generic_reloc.
-+ If we're relocating, and this an external symbol, we don't want
-+ to change anything. */
-+ if (output_bfd != (bfd *) NULL
-+ && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
-+ {
-+ reloc_entry->address += input_section->output_offset;
-+ return bfd_reloc_ok;
-+ }
-+
-+ /* Sanity check the address (offset in section). */
-+ if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
-+ return bfd_reloc_outofrange;
-+
-+ ret = bfd_reloc_ok;
-+ if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
-+ ret = bfd_reloc_undefined;
-+
-+ if (bfd_is_com_section (symbol->section))
-+ relocation = 0;
-+ else
-+ relocation = symbol->value;
-+
-+ relocation += symbol->section->output_section->vma;
-+ relocation += symbol->section->output_offset;
-+ relocation += reloc_entry->addend;
-+
-+ /* Save the information, and let LO12 do the actual relocation. */
-+ n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
-+ if (n == NULL)
-+ return bfd_reloc_outofrange;
-+
-+ n->addr = (bfd_byte *) data + reloc_entry->address;
-+ n->addend = relocation;
-+ n->next = nds32_hi20_list;
-+ nds32_hi20_list = n;
-+
-+ if (output_bfd != (bfd *) NULL)
-+ reloc_entry->address += input_section->output_offset;
-+
-+ return ret;
-+}
-+
-+/* Handle an NDS32 ELF HI20 reloc. */
-+
-+static void
-+nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
-+ int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
-+ Elf_Internal_Rela *rello, bfd_byte *contents,
-+ bfd_vma addend)
-+{
-+ unsigned long insn;
-+ bfd_vma addlo;
-+
-+ insn = bfd_getb32 (contents + relhi->r_offset);
-+
-+ addlo = bfd_getb32 (contents + rello->r_offset);
-+ addlo &= 0xfff;
-+
-+ addend += ((insn & 0xfffff) << 20) + addlo;
-+
-+ insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
-+ bfd_putb32 (insn, contents + relhi->r_offset);
-+}
-+
-+/* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
-+ inplace relocation; this function exists in order to do the
-+ R_NDS32_HI20_[SU]LO relocation described above. */
-+
-+static bfd_reloc_status_type
-+nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
-+ void *data, asection *input_section, bfd *output_bfd,
-+ char **error_message)
-+{
-+ /* This part is from bfd_elf_generic_reloc.
-+ If we're relocating, and this an external symbol, we don't want
-+ to change anything. */
-+ if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
-+ && reloc_entry->addend == 0)
-+ {
-+ reloc_entry->address += input_section->output_offset;
-+ return bfd_reloc_ok;
-+ }
-+
-+ if (nds32_hi20_list != NULL)
-+ {
-+ struct nds32_hi20 *l;
-+
-+ l = nds32_hi20_list;
-+ while (l != NULL)
-+ {
-+ unsigned long insn;
-+ unsigned long val;
-+ unsigned long vallo;
-+ struct nds32_hi20 *next;
-+
-+ /* Do the HI20 relocation. Note that we actually don't need
-+ to know anything about the LO12 itself, except where to
-+ find the low 12 bits of the addend needed by the LO12. */
-+ insn = bfd_getb32 (l->addr);
-+ vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
-+ vallo &= 0xfff;
-+ switch (reloc_entry->howto->type)
-+ {
-+ case R_NDS32_LO12S3:
-+ vallo <<= 3;
-+ break;
-+
-+ case R_NDS32_LO12S2:
-+ vallo <<= 2;
-+ break;
-+
-+ case R_NDS32_LO12S1:
-+ vallo <<= 1;
-+ break;
-+
-+ case R_NDS32_LO12S0:
-+ vallo <<= 0;
-+ break;
-+ }
-+
-+ val = ((insn & 0xfffff) << 12) + vallo;
-+ val += l->addend;
-+
-+ insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
-+ bfd_putb32 ((bfd_vma) insn, l->addr);
-+
-+ next = l->next;
-+ free (l);
-+ l = next;
-+ }
-+
-+ nds32_hi20_list = NULL;
-+ }
-+
-+ /* Now do the LO12 reloc in the usual way.
-+ ??? It would be nice to call bfd_elf_generic_reloc here,
-+ but we have partial_inplace set. bfd_elf_generic_reloc will
-+ pass the handling back to bfd_install_relocation which will install
-+ a section relative addend which is wrong. */
-+ return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
-+ input_section, output_bfd, error_message);
-+}
-+
-+/* Do generic partial_inplace relocation.
-+ This is a local replacement for bfd_elf_generic_reloc. */
-+
-+static bfd_reloc_status_type
-+nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
-+ asymbol *symbol, void *data, asection *input_section,
-+ bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
-+{
-+ bfd_reloc_status_type ret;
-+ bfd_vma relocation;
-+ bfd_byte *inplace_address;
-+
-+ /* This part is from bfd_elf_generic_reloc.
-+ If we're relocating, and this an external symbol, we don't want
-+ to change anything. */
-+ if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
-+ && reloc_entry->addend == 0)
-+ {
-+ reloc_entry->address += input_section->output_offset;
-+ return bfd_reloc_ok;
-+ }
-+
-+ /* Now do the reloc in the usual way.
-+ ??? It would be nice to call bfd_elf_generic_reloc here,
-+ but we have partial_inplace set. bfd_elf_generic_reloc will
-+ pass the handling back to bfd_install_relocation which will install
-+ a section relative addend which is wrong. */
-+
-+ /* Sanity check the address (offset in section). */
-+ if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
-+ return bfd_reloc_outofrange;
-+
-+ ret = bfd_reloc_ok;
-+ if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
-+ ret = bfd_reloc_undefined;
-+
-+ if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
-+ relocation = 0;
-+ else
-+ relocation = symbol->value;
-+
-+ /* Only do this for a final link. */
-+ if (output_bfd == (bfd *) NULL)
-+ {
-+ relocation += symbol->section->output_section->vma;
-+ relocation += symbol->section->output_offset;
-+ }
-+
-+ relocation += reloc_entry->addend;
-+ switch (reloc_entry->howto->type)
-+ {
-+ case R_NDS32_LO12S3:
-+ relocation >>= 3;
-+ break;
-+
-+ case R_NDS32_LO12S2:
-+ relocation >>= 2;
-+ break;
-+
-+ case R_NDS32_LO12S1:
-+ relocation >>= 1;
-+ break;
-+
-+ case R_NDS32_LO12S0:
-+ default:
-+ relocation >>= 0;
-+ break;
-+ }
-+
-+ inplace_address = (bfd_byte *) data + reloc_entry->address;
-+
-+#define DOIT(x) \
-+ x = ((x & ~reloc_entry->howto->dst_mask) | \
-+ (((x & reloc_entry->howto->src_mask) + relocation) & \
-+ reloc_entry->howto->dst_mask))
-+
-+ switch (reloc_entry->howto->size)
-+ {
-+ case 1:
-+ {
-+ short x = bfd_getb16 (inplace_address);
-+
-+ DOIT (x);
-+ bfd_putb16 ((bfd_vma) x, inplace_address);
-+ }
-+ break;
-+ case 2:
-+ {
-+ unsigned long x = bfd_getb32 (inplace_address);
-+
-+ DOIT (x);
-+ bfd_putb32 ((bfd_vma) x, inplace_address);
-+ }
-+ break;
-+ default:
-+ BFD_ASSERT (0);
-+ }
-+
-+ if (output_bfd != (bfd *) NULL)
-+ reloc_entry->address += input_section->output_offset;
-+
-+ return ret;
-+}
-+
-+/* Handle the R_NDS32_SDA15 reloc.
-+ This reloc is used to compute the address of objects in the small data area
-+ and to perform loads and stores from that area.
-+ The lower 15 bits are sign extended and added to the register specified
-+ in the instruction, which is assumed to point to _SDA_BASE_.
-+
-+ Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
-+ the access size, this must be taken care of. */
-+
-+static bfd_reloc_status_type
-+nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
-+ asymbol *symbol, void *data ATTRIBUTE_UNUSED,
-+ asection *input_section, bfd *output_bfd,
-+ char **error_message ATTRIBUTE_UNUSED)
-+{
-+ /* This part is from bfd_elf_generic_reloc. */
-+ if (output_bfd != (bfd *) NULL
-+ && (symbol->flags & BSF_SECTION_SYM) == 0
-+ && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
-+ {
-+ reloc_entry->address += input_section->output_offset;
-+ return bfd_reloc_ok;
-+ }
-+
-+ if (output_bfd != NULL)
-+ {
-+ /* FIXME: See bfd_perform_relocation. Is this right? */
-+ return bfd_reloc_continue;
-+ }
-+
-+ /* FIXME: not sure what to do here yet. But then again, the linker
-+ may never call us. */
-+ abort ();
-+}
-+
-+/* nds32_elf_ignore_reloc is the special function for
-+ relocation types which don't need to be relocated
-+ like relaxation relocation types.
-+ This function simply return bfd_reloc_ok when it is
-+ invoked. */
-+
-+static bfd_reloc_status_type
-+nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
-+ asymbol *symbol ATTRIBUTE_UNUSED,
-+ void *data ATTRIBUTE_UNUSED, asection *input_section,
-+ bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
-+{
-+ if (output_bfd != NULL)
-+ reloc_entry->address += input_section->output_offset;
-+
-+ return bfd_reloc_ok;
-+}
-+
-+
-+/* Map BFD reloc types to NDS32 ELF reloc types. */
-+
-+struct nds32_reloc_map_entry
-+{
-+ bfd_reloc_code_real_type bfd_reloc_val;
-+ unsigned char elf_reloc_val;
-+};
-+
-+static const struct nds32_reloc_map_entry nds32_reloc_map[] = {
-+ {BFD_RELOC_NONE, R_NDS32_NONE},
-+ {BFD_RELOC_16, R_NDS32_16_RELA},
-+ {BFD_RELOC_32, R_NDS32_32_RELA},
-+ {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
-+ {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
-+ {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
-+ {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
-+ {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
-+ {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
-+ {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
-+ {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
-+ {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
-+ {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
-+ {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
-+ {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
-+ {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
-+ {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
-+ {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
-+ {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
-+ {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
-+ {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
-+ {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
-+ {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
-+
-+ {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
-+ {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
-+ {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
-+ {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
-+ {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
-+ {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
-+ {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
-+ {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
-+ {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
-+ {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
-+ {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
-+ {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
-+ {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
-+ {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
-+ {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
-+ {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
-+ {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
-+ {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
-+ {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
-+ {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
-+ {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
-+ {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
-+ {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
-+ {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
-+ {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
-+ {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
-+ {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
-+ {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
-+ {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
-+ {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
-+ {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
-+ {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
-+ {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
-+ {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
-+ {BFD_RELOC_NDS32_SECURITY_16, R_NDS32_SECURITY_16},
-+ {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
-+ {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
-+ {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
-+ {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
-+ {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
-+ {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
-+ {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
-+ {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
-+ {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
-+ {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
-+ {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
-+ {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
-+ {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
-+ {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
-+ {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
-+ {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
-+ {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
-+ {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
-+ {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
-+ {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
-+ {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
-+ {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
-+ {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
-+ {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
-+ {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
-+ {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
-+ {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
-+ {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
-+ {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
-+ {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
-+ {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
-+ {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
-+ {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
-+ {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
-+ {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
-+ {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
-+ {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
-+ {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
-+ {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
-+ {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
-+ {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
-+
-+ {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
-+ {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
-+ {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
-+ {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
-+ {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
-+ {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
-+ {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
-+ {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
-+ {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
-+ {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
-+ {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
-+ {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
-+ {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
-+ {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
-+ {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
-+ {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
-+ {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
-+ {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
-+ {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
-+
-+ {BFD_RELOC_NDS32_TLS_DESC, R_NDS32_TLS_DESC},
-+ {BFD_RELOC_NDS32_TLS_DESC_HI20, R_NDS32_TLS_DESC_HI20},
-+ {BFD_RELOC_NDS32_TLS_DESC_LO12, R_NDS32_TLS_DESC_LO12},
-+ {BFD_RELOC_NDS32_TLS_DESC_ADD, R_NDS32_TLS_DESC_ADD},
-+ {BFD_RELOC_NDS32_TLS_DESC_FUNC, R_NDS32_TLS_DESC_FUNC},
-+ {BFD_RELOC_NDS32_TLS_DESC_CALL, R_NDS32_TLS_DESC_CALL},
-+ {BFD_RELOC_NDS32_TLS_DESC_MEM, R_NDS32_TLS_DESC_MEM},
-+ {BFD_RELOC_NDS32_TLS_DESC_20, R_NDS32_TLS_DESC_20},
-+ {BFD_RELOC_NDS32_TLS_DESC_SDA17S2, R_NDS32_TLS_DESC_SDA17S2},
-+ {BFD_RELOC_NDS32_TLS_IE_LO12, R_NDS32_TLS_IE_LO12},
-+ {BFD_RELOC_NDS32_TLS_IEGP_HI20, R_NDS32_TLS_IEGP_HI20},
-+ {BFD_RELOC_NDS32_TLS_IEGP_LO12, R_NDS32_TLS_IEGP_LO12},
-+ {BFD_RELOC_NDS32_TLS_IEGP_LO12S2, R_NDS32_TLS_IEGP_LO12S2},
-+ {BFD_RELOC_NDS32_TLS_IEGP_LW, R_NDS32_TLS_IEGP_LW},
-+
-+ {BFD_RELOC_NDS32_REMOVE, R_NDS32_RELAX_REMOVE},
-+ {BFD_RELOC_NDS32_GROUP, R_NDS32_RELAX_GROUP},
-+
-+ {BFD_RELOC_NDS32_ICT_HI20, R_NDS32_ICT_HI20},
-+ {BFD_RELOC_NDS32_ICT_LO12, R_NDS32_ICT_LO12},
-+ {BFD_RELOC_NDS32_ICT_25PC, R_NDS32_ICT_25PC},
-+};
-+
-+/* Patch tag. */
-+
-+/* Reserve space for COUNT dynamic relocations in relocation selection
-+ SRELOC. */
-+
-+static inline void
-+elf32_nds32_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
-+ bfd_size_type count)
-+{
-+ BFD_ASSERT (elf_hash_table (info)->dynamic_sections_created);
-+ if (sreloc == NULL)
-+ abort ();
-+ sreloc->size += sizeof (Elf32_External_Rela) * count;
-+}
-+
-+static reloc_howto_type *
-+bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
-+ const char *r_name)
-+{
-+ unsigned int i;
-+
-+ for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
-+ if (nds32_elf_howto_table[i].name != NULL
-+ && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
-+ return &nds32_elf_howto_table[i];
-+
-+ for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
-+ if (nds32_elf_relax_howto_table[i].name != NULL
-+ && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
-+ return &nds32_elf_relax_howto_table[i];
-+
-+ return NULL;
-+}
-+
-+static reloc_howto_type *
-+bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
-+{
-+ if (code < R_NDS32_RELAX_ENTRY)
-+ {
-+ BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
-+ return &nds32_elf_howto_table[code];
-+ }
-+ else
-+ {
-+ if ((size_t) (code - R_NDS32_RELAX_ENTRY) >=
-+ ARRAY_SIZE (nds32_elf_relax_howto_table))
-+ {
-+ int i = code;
-+ i += 1;
-+ }
-+
-+ BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
-+ < ARRAY_SIZE (nds32_elf_relax_howto_table));
-+ return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
-+ }
-+}
-+
-+static reloc_howto_type *
-+bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
-+ bfd_reloc_code_real_type code)
-+{
-+ unsigned int i;
-+
-+ for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
-+ {
-+ if (nds32_reloc_map[i].bfd_reloc_val == code)
-+ return bfd_elf32_bfd_reloc_type_table_lookup
-+ (nds32_reloc_map[i].elf_reloc_val);
-+ }
-+
-+ return NULL;
-+}
-+
-+/* Set the howto pointer for an NDS32 ELF reloc. */
-+
-+static void
-+nds32_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
-+ Elf_Internal_Rela *dst)
-+{
-+ enum elf_nds32_reloc_type r_type;
-+
-+ r_type = ELF32_R_TYPE (dst->r_info);
-+ BFD_ASSERT (ELF32_R_TYPE (dst->r_info) <= R_NDS32_GNU_VTENTRY);
-+ cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
-+}
-+
-+static void
-+nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
-+ Elf_Internal_Rela *dst)
-+{
-+ BFD_ASSERT ((ELF32_R_TYPE (dst->r_info) == R_NDS32_NONE)
-+ || ((ELF32_R_TYPE (dst->r_info) > R_NDS32_GNU_VTENTRY)
-+ && (ELF32_R_TYPE (dst->r_info) < R_NDS32_max)));
-+ cache_ptr->howto =
-+ bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (dst->r_info));
-+}
-+
-+/* Support for core dump NOTE sections.
-+ Reference to include/linux/elfcore.h in Linux. */
-+
-+static bfd_boolean
-+nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
-+{
-+ int offset;
-+ size_t size;
-+
-+ switch (note->descsz)
-+ {
-+ case 0x114:
-+ /* Linux/NDS32 32-bit, ABI1 */
-+
-+ /* pr_cursig */
-+ elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
-+
-+ /* pr_pid */
-+ elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
-+
-+ /* pr_reg */
-+ offset = 72;
-+ size = 200;
-+ break;
-+
-+ case 0xfc:
-+ /* Linux/NDS32 32-bit */
-+
-+ /* pr_cursig */
-+ elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
-+
-+ /* pr_pid */
-+ elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
-+
-+ /* pr_reg */
-+ offset = 72;
-+ size = 176;
-+ break;
-+
-+ default:
-+ return FALSE;
-+ }
-+
-+ /* Make a ".reg" section. */
-+ return _bfd_elfcore_make_pseudosection (abfd, ".reg",
-+ size, note->descpos + offset);
-+}
-+
-+static bfd_boolean
-+nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
-+{
-+ switch (note->descsz)
-+ {
-+ case 124:
-+ /* Linux/NDS32 */
-+
-+ /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
-+ elf_tdata (abfd)->core->program =
-+ _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
-+ elf_tdata (abfd)->core->command =
-+ _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
-+
-+ default:
-+ return FALSE;
-+ }
-+
-+ /* Note that for some reason, a spurious space is tacked
-+ onto the end of the args in some (at least one anyway)
-+ implementations, so strip it off if it exists. */
-+ {
-+ char *command = elf_tdata (abfd)->core->command;
-+ int n = strlen (command);
-+
-+ if (0 < n && command[n - 1] == ' ')
-+ command[n - 1] = '\0';
-+ }
-+
-+ return TRUE;
-+}
-+
-+/* Hook called by the linker routine which adds symbols from an object
-+ file. We must handle the special NDS32 section numbers here.
-+ We also keep watching for whether we need to create the sdata special
-+ linker sections. */
-+
-+static bfd_boolean
-+nds32_elf_add_symbol_hook (bfd *abfd,
-+ struct bfd_link_info *info ATTRIBUTE_UNUSED,
-+ Elf_Internal_Sym *sym,
-+ const char **namep ATTRIBUTE_UNUSED,
-+ flagword *flagsp ATTRIBUTE_UNUSED,
-+ asection **secp, bfd_vma *valp)
-+{
-+ switch (sym->st_shndx)
-+ {
-+ case SHN_COMMON:
-+ /* Common symbols less than the GP size are automatically
-+ treated as SHN_MIPS_SCOMMON symbols. */
-+ if (sym->st_size > elf_gp_size (abfd)
-+ || ELF_ST_TYPE (sym->st_info) == STT_TLS)
-+ break;
-+
-+ /* st_value is the alignemnt constraint.
-+ That might be its actual size if it is an array or structure. */
-+ switch (sym->st_value)
-+ {
-+ case 1:
-+ *secp = bfd_make_section_old_way (abfd, ".scommon_b");
-+ break;
-+ case 2:
-+ *secp = bfd_make_section_old_way (abfd, ".scommon_h");
-+ break;
-+ case 4:
-+ *secp = bfd_make_section_old_way (abfd, ".scommon_w");
-+ break;
-+ case 8:
-+ *secp = bfd_make_section_old_way (abfd, ".scommon_d");
-+ break;
-+ default:
-+ return TRUE;
-+ }
-+
-+ (*secp)->flags |= SEC_IS_COMMON;
-+ *valp = sym->st_size;
-+ break;
-+ }
-+
-+ return TRUE;
-+}
-+
-+
-+/* This function can figure out the best location for a base register to access
-+ data relative to this base register
-+ INPUT:
-+ sda_d0: size of first DOUBLE WORD data section
-+ sda_w0: size of first WORD data section
-+ sda_h0: size of first HALF WORD data section
-+ sda_b : size of BYTE data section
-+ sda_hi: size of second HALF WORD data section
-+ sda_w1: size of second WORD data section
-+ sda_d1: size of second DOUBLE WORD data section
-+ OUTPUT:
-+ offset (always positive) from the beginning of sda_d0 if OK
-+ a negative error value if fail
-+ NOTE:
-+ these 7 sections have to be located back to back if exist
-+ a pass in 0 value for non-existing section */
-+
-+/* Due to the interpretation of simm15 field of load/store depending on
-+ data accessing size, the organization of base register relative data shall
-+ like the following figure
-+ -------------------------------------------
-+ | DOUBLE WORD sized data (range +/- 128K)
-+ -------------------------------------------
-+ | WORD sized data (range +/- 64K)
-+ -------------------------------------------
-+ | HALF WORD sized data (range +/- 32K)
-+ -------------------------------------------
-+ | BYTE sized data (range +/- 16K)
-+ -------------------------------------------
-+ | HALF WORD sized data (range +/- 32K)
-+ -------------------------------------------
-+ | WORD sized data (range +/- 64K)
-+ -------------------------------------------
-+ | DOUBLE WORD sized data (range +/- 128K)
-+ -------------------------------------------
-+ Its base register shall be set to access these data freely. */
-+
-+/* We have to figure out the SDA_BASE value, so that we can adjust the
-+ symbol value correctly. We look up the symbol _SDA_BASE_ in the output
-+ BFD. If we can't find it, we're stuck. We cache it in the ELF
-+ target data. We don't need to adjust the symbol value for an
-+ external symbol if we are producing relocatable output. */
-+
-+static asection *sda_rela_sec = NULL;
-+
-+#define SDA_SECTION_NUM 10
-+
-+static bfd_reloc_status_type
-+nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
-+ bfd_vma *psb, bfd_boolean add_symbol)
-+{
-+ int relax_fp_as_gp;
-+ struct elf_nds32_link_hash_table *table;
-+ struct bfd_link_hash_entry *h, *h2;
-+ long unsigned int total = 0;
-+ asection *first = NULL, *final = NULL, *temp;
-+ bfd_vma sda_base = 0;
-+
-+ h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
-+ if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
-+ {
-+ /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
-+ 4 byte-aligned. Therefore, it has to set the first section ".data"
-+ 4 byte-aligned. */
-+ static const char sec_name[SDA_SECTION_NUM][10] = {
-+ ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
-+ ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
-+ };
-+ size_t i = 0;
-+
-+ if (output_bfd->sections == NULL)
-+ {
-+ *psb = elf_gp (output_bfd);
-+ return bfd_reloc_ok;
-+ }
-+
-+ /* Get the first and final section. */
-+ while (i < ARRAY_SIZE (sec_name))
-+ {
-+ temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
-+ if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
-+ first = temp;
-+ if (temp && (temp->size != 0 || temp->rawsize != 0))
-+ final = temp;
-+
-+ /* Summarize the sections in order to check if joining .bss. */
-+ if (temp && temp->size != 0)
-+ total += temp->size;
-+ else if (temp && temp->rawsize != 0)
-+ total += temp->rawsize;
-+
-+ i++;
-+ }
-+
-+ /* Check .bss size. */
-+ temp = bfd_get_section_by_name (output_bfd, ".bss");
-+ if (temp)
-+ {
-+ if (temp->size != 0)
-+ total += temp->size;
-+ else if (temp->rawsize != 0)
-+ total += temp->rawsize;
-+
-+ if (total < 0x80000)
-+ {
-+ if (!first && (temp->size != 0 || temp->rawsize != 0))
-+ first = temp;
-+ if ((temp->size != 0 || temp->rawsize != 0))
-+ final = temp;
-+ }
-+ }
-+
-+ if (first && final)
-+ {
-+ /* The middle of data region. */
-+ sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
-+
-+ /* Find the section sda_base located. */
-+ i = 0;
-+ while (i < ARRAY_SIZE (sec_name))
-+ {
-+ final = bfd_get_section_by_name (output_bfd, sec_name[i]);
-+ if (final && (final->size != 0 || final->rawsize != 0)
-+ && sda_base >= final->vma)
-+ {
-+ first = final;
-+ i++;
-+ }
-+ else
-+ break;
-+ }
-+ }
-+ else
-+ {
-+ /* If there is not any default data section in output bfd, try to find
-+ the first data section. If no data section be found, just simplily
-+ choose the first output section. */
-+ temp = output_bfd->sections;
-+ while (temp)
-+ {
-+ if (temp->flags & SEC_ALLOC
-+ && (((temp->flags & SEC_DATA)
-+ && ((temp->flags & SEC_READONLY) == 0))
-+ || (temp->flags & SEC_LOAD) == 0)
-+ && (temp->size != 0 || temp->rawsize != 0))
-+ {
-+ if (!first)
-+ first = temp;
-+ final = temp;
-+ }
-+ temp = temp->next;
-+ }
-+
-+ /* There is no data or bss section. */
-+ if (!first || (first->size == 0 && first->rawsize == 0))
-+ {
-+ first = output_bfd->sections;
-+ while (first && first->size == 0 && first->rawsize == 0)
-+ first = first->next;
-+ }
-+
-+ /* There is no concrete section. */
-+ if (!first)
-+ {
-+ *psb = elf_gp (output_bfd);
-+ return bfd_reloc_ok;
-+ }
-+
-+ if (final && (final->vma + final->rawsize - first->vma) <= 0x4000)
-+ sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
-+ else
-+ sda_base = first->vma + 0x2000;
-+ }
-+
-+ sda_base -= first->vma;
-+ sda_base = sda_base & (~7);
-+
-+ if (!_bfd_generic_link_add_one_symbol
-+ (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
-+ (bfd_vma) sda_base, (const char *) NULL, FALSE,
-+ get_elf_backend_data (output_bfd)->collect, &h))
-+ return FALSE;
-+
-+ sda_rela_sec = first;
-+
-+ }
-+
-+ /* Set _FP_BASE_ to _SDA_BASE_. */
-+ table = nds32_elf_hash_table (info);
-+ relax_fp_as_gp = table->relax_fp_as_gp;
-+ h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME, FALSE, FALSE, FALSE);
-+ /* _SDA_BASE_ is difined in linker script. */
-+ if (!first)
-+ {
-+ first = h->u.def.section;
-+ sda_base = h->u.def.value;
-+ }
-+
-+ if (relax_fp_as_gp && h2
-+ && (h2->type == bfd_link_hash_undefweak
-+ || h2->type == bfd_link_hash_undefined))
-+ {
-+ /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
-+ And set FP equal to SDA_BASE to do relaxation for
-+ la $fp, _FP_BASE_. */
-+ if (!_bfd_generic_link_add_one_symbol
-+ (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
-+ first, sda_base, (const char *) NULL,
-+ FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
-+ return FALSE;
-+ }
-+
-+ if (add_symbol == TRUE)
-+ {
-+ if (h)
-+ {
-+ /* Now set gp. */
-+ elf_gp (output_bfd) = (h->u.def.value
-+ + h->u.def.section->output_section->vma
-+ + h->u.def.section->output_offset);
-+ }
-+ else
-+ {
-+ (*_bfd_error_handler) (_("error: Can't find symbol: _SDA_BASE_."));
-+ return bfd_reloc_dangerous;
-+ }
-+ }
-+
-+ *psb = h->u.def.value + h->u.def.section->output_section->vma
-+ + h->u.def.section->output_offset;
-+ return bfd_reloc_ok;
-+}
-+
-+
-+/* Return size of a PLT entry. */
-+#define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
-+
-+
-+/* Create an entry in an nds32 ELF linker hash table. */
-+
-+static struct bfd_hash_entry *
-+nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
-+ struct bfd_hash_table *table,
-+ const char *string)
-+{
-+ struct elf_nds32_link_hash_entry *ret;
-+
-+ ret = (struct elf_nds32_link_hash_entry *) entry;
-+
-+ /* Allocate the structure if it has not already been allocated by a
-+ subclass. */
-+ if (ret == NULL)
-+ ret = (struct elf_nds32_link_hash_entry *)
-+ bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
-+
-+ if (ret == NULL)
-+ return (struct bfd_hash_entry *) ret;
-+
-+ /* Call the allocation method of the superclass. */
-+ ret = (struct elf_nds32_link_hash_entry *)
-+ _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
-+
-+ if (ret != NULL)
-+ {
-+ struct elf_nds32_link_hash_entry *eh;
-+
-+ eh = (struct elf_nds32_link_hash_entry *) ret;
-+ eh->dyn_relocs = NULL;
-+ eh->tls_type = GOT_UNKNOWN;
-+ eh->offset_to_gp = 0;
-+ eh->indirect_call = FALSE;
-+ }
-+
-+ return (struct bfd_hash_entry *) ret;
-+}
-+
-+/* Create an nds32 ELF linker hash table. */
-+
-+static struct bfd_link_hash_table *
-+nds32_elf_link_hash_table_create (bfd *abfd)
-+{
-+ struct elf_nds32_link_hash_table *ret;
-+
-+ bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
-+
-+ ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
-+ if (ret == NULL)
-+ return NULL;
-+
-+ /* patch tag. */
-+ if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
-+ nds32_elf_link_hash_newfunc,
-+ sizeof (struct elf_nds32_link_hash_entry),
-+ NDS32_ELF_DATA))
-+ {
-+ free (ret);
-+ return NULL;
-+ }
-+
-+ ret->sdynbss = NULL;
-+ ret->srelbss = NULL;
-+ ret->sym_ld_script = NULL;
-+ ret->ex9_export_file = NULL;
-+ ret->ex9_import_file = NULL;
-+
-+ return &ret->root.root;
-+}
-+
-+/* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up
-+ shortcuts to them in our hash table. */
-+
-+static bfd_boolean
-+create_got_section (bfd *dynobj, struct bfd_link_info *info)
-+{
-+ struct elf_link_hash_table *ehtab;
-+
-+ if (!_bfd_elf_create_got_section (dynobj, info))
-+ return FALSE;
-+
-+ ehtab = elf_hash_table (info);
-+ ehtab->sgot = bfd_get_section_by_name (dynobj, ".got");
-+ ehtab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
-+ if (!ehtab->sgot || !ehtab->sgotplt)
-+ abort ();
-+
-+ /* _bfd_elf_create_got_section will create it for us. */
-+ ehtab->srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
-+ if (ehtab->srelgot == NULL
-+ || !bfd_set_section_flags (dynobj, ehtab->srelgot,
-+ (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
-+ | SEC_IN_MEMORY | SEC_LINKER_CREATED
-+ | SEC_READONLY))
-+ || !bfd_set_section_alignment (dynobj, ehtab->srelgot, 2))
-+ return FALSE;
-+
-+ return TRUE;
-+}
-+
-+/* Create dynamic sections when linking against a dynamic object. */
-+
-+static bfd_boolean
-+nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
-+{
-+ struct elf_link_hash_table *ehtab;
-+ struct elf_nds32_link_hash_table *htab;
-+ flagword flags, pltflags;
-+ register asection *s;
-+ const struct elf_backend_data *bed;
-+ int ptralign = 2; /* 32-bit */
-+ const char *secname;
-+ char *relname;
-+ flagword secflags;
-+ asection *sec;
-+
-+ bed = get_elf_backend_data (abfd);
-+ ehtab = elf_hash_table (info);
-+ htab = nds32_elf_hash_table (info);
-+
-+ /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
-+ .rel[a].bss sections. */
-+
-+ flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
-+ | SEC_LINKER_CREATED);
-+
-+ pltflags = flags;
-+ pltflags |= SEC_CODE;
-+ if (bed->plt_not_loaded)
-+ pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
-+ if (bed->plt_readonly)
-+ pltflags |= SEC_READONLY;
-+
-+ s = bfd_make_section (abfd, ".plt");
-+ ehtab->splt = s;
-+ if (s == NULL
-+ || !bfd_set_section_flags (abfd, s, pltflags)
-+ || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
-+ return FALSE;
-+
-+ if (bed->want_plt_sym)
-+ {
-+ /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
-+ .plt section. */
-+ struct bfd_link_hash_entry *bh = NULL;
-+ struct elf_link_hash_entry *h;
-+
-+ if (!(_bfd_generic_link_add_one_symbol
-+ (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
-+ (bfd_vma) 0, (const char *) NULL, FALSE,
-+ get_elf_backend_data (abfd)->collect, &bh)))
-+ return FALSE;
-+
-+ h = (struct elf_link_hash_entry *) bh;
-+ h->def_regular = 1;
-+ h->type = STT_OBJECT;
-+
-+ if (info->shared && !bfd_elf_link_record_dynamic_symbol (info, h))
-+ return FALSE;
-+ }
-+
-+ s = bfd_make_section (abfd,
-+ bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
-+ ehtab->srelplt = s;
-+ if (s == NULL
-+ || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
-+ || !bfd_set_section_alignment (abfd, s, ptralign))
-+ return FALSE;
-+
-+ if (ehtab->sgot == NULL && !create_got_section (abfd, info))
-+ return FALSE;
-+
-+ for (sec = abfd->sections; sec; sec = sec->next)
-+ {
-+ secflags = bfd_get_section_flags (abfd, sec);
-+ if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
-+ || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
-+ continue;
-+ secname = bfd_get_section_name (abfd, sec);
-+ relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
-+ strcpy (relname, ".rela");
-+ strcat (relname, secname);
-+ if (bfd_get_section_by_name (abfd, secname))
-+ continue;
-+ s = bfd_make_section (abfd, relname);
-+ if (s == NULL
-+ || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
-+ || !bfd_set_section_alignment (abfd, s, ptralign))
-+ return FALSE;
-+ }
-+
-+ if (bed->want_dynbss)
-+ {
-+ /* The .dynbss section is a place to put symbols which are defined
-+ by dynamic objects, are referenced by regular objects, and are
-+ not functions. We must allocate space for them in the process
-+ image and use a R_*_COPY reloc to tell the dynamic linker to
-+ initialize them at run time. The linker script puts the .dynbss
-+ section into the .bss section of the final image. */
-+ s = bfd_make_section (abfd, ".dynbss");
-+ htab->sdynbss = s;
-+ if (s == NULL
-+ || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
-+ return FALSE;
-+ /* The .rel[a].bss section holds copy relocs. This section is not
-+ normally needed. We need to create it here, though, so that the
-+ linker will map it to an output section. We can't just create it
-+ only if we need it, because we will not know whether we need it
-+ until we have seen all the input files, and the first time the
-+ main linker code calls BFD after examining all the input files
-+ (size_dynamic_sections) the input sections have already been
-+ mapped to the output sections. If the section turns out not to
-+ be needed, we can discard it later. We will never need this
-+ section when generating a shared object, since they do not use
-+ copy relocs. */
-+ if (!info->shared)
-+ {
-+ s = bfd_make_section (abfd, (bed->default_use_rela_p
-+ ? ".rela.bss" : ".rel.bss"));
-+ htab->srelbss = s;
-+ if (s == NULL
-+ || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
-+ || !bfd_set_section_alignment (abfd, s, ptralign))
-+ return FALSE;
-+ }
-+ }
-+
-+ return TRUE;
-+}
-+
-+/* Copy the extra info we tack onto an elf_link_hash_entry. */
-+static void
-+nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
-+ struct elf_link_hash_entry *dir,
-+ struct elf_link_hash_entry *ind)
-+{
-+ struct elf_nds32_link_hash_entry *edir, *eind;
-+
-+ edir = (struct elf_nds32_link_hash_entry *) dir;
-+ eind = (struct elf_nds32_link_hash_entry *) ind;
-+
-+ if (eind->dyn_relocs != NULL)
-+ {
-+ if (edir->dyn_relocs != NULL)
-+ {
-+ struct elf_nds32_dyn_relocs **pp;
-+ struct elf_nds32_dyn_relocs *p;
-+
-+ if (ind->root.type == bfd_link_hash_indirect)
-+ abort ();
-+
-+ /* Add reloc counts against the weak sym to the strong sym
-+ list. Merge any entries against the same section. */
-+ for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
-+ {
-+ struct elf_nds32_dyn_relocs *q;
-+
-+ for (q = edir->dyn_relocs; q != NULL; q = q->next)
-+ if (q->sec == p->sec)
-+ {
-+ q->pc_count += p->pc_count;
-+ q->count += p->count;
-+ *pp = p->next;
-+ break;
-+ }
-+ if (q == NULL)
-+ pp = &p->next;
-+ }
-+ *pp = edir->dyn_relocs;
-+ }
-+
-+ edir->dyn_relocs = eind->dyn_relocs;
-+ eind->dyn_relocs = NULL;
-+ }
-+
-+ if (ind->root.type == bfd_link_hash_indirect)
-+ {
-+ if (dir->got.refcount <= 0)
-+ {
-+ edir->tls_type = eind->tls_type;
-+ eind->tls_type = GOT_UNKNOWN;
-+ }
-+ }
-+
-+ _bfd_elf_link_hash_copy_indirect (info, dir, ind);
-+}
-+
-+
-+/* Adjust a symbol defined by a dynamic object and referenced by a
-+ regular object. The current definition is in some section of the
-+ dynamic object, but we're not including those sections. We have to
-+ change the definition to something the rest of the link can
-+ understand. */
-+
-+static bfd_boolean
-+nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
-+ struct elf_link_hash_entry *h)
-+{
-+ struct elf_nds32_link_hash_table *htab;
-+ struct elf_nds32_link_hash_entry *eh;
-+ struct elf_nds32_dyn_relocs *p;
-+ bfd *dynobj;
-+ asection *s;
-+ unsigned int power_of_two;
-+
-+ dynobj = elf_hash_table (info)->dynobj;
-+
-+ /* Make sure we know what is going on here. */
-+ BFD_ASSERT (dynobj != NULL
-+ && (h->needs_plt
-+ || h->u.weakdef != NULL
-+ || (h->def_dynamic && h->ref_regular && !h->def_regular)));
-+
-+
-+ /* If this is a function, put it in the procedure linkage table. We
-+ will fill in the contents of the procedure linkage table later,
-+ when we know the address of the .got section. */
-+ if (h->type == STT_FUNC || h->needs_plt)
-+ {
-+ if (!info->shared
-+ && !h->def_dynamic
-+ && !h->ref_dynamic
-+ && h->root.type != bfd_link_hash_undefweak
-+ && h->root.type != bfd_link_hash_undefined)
-+ {
-+ /* This case can occur if we saw a PLT reloc in an input
-+ file, but the symbol was never referred to by a dynamic
-+ object. In such a case, we don't actually need to build
-+ a procedure linkage table, and we can just do a PCREL
-+ reloc instead. */
-+ h->plt.offset = (bfd_vma) - 1;
-+ h->needs_plt = 0;
-+ }
-+
-+ return TRUE;
-+ }
-+ else
-+ h->plt.offset = (bfd_vma) - 1;
-+
-+ /* If this is a weak symbol, and there is a real definition, the
-+ processor independent code will have arranged for us to see the
-+ real definition first, and we can just use the same value. */
-+ if (h->u.weakdef != NULL)
-+ {
-+ BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
-+ || h->u.weakdef->root.type == bfd_link_hash_defweak);
-+ h->root.u.def.section = h->u.weakdef->root.u.def.section;
-+ h->root.u.def.value = h->u.weakdef->root.u.def.value;
-+ return TRUE;
-+ }
-+
-+ /* This is a reference to a symbol defined by a dynamic object which
-+ is not a function. */
-+
-+ /* If we are creating a shared library, we must presume that the
-+ only references to the symbol are via the global offset table.
-+ For such cases we need not do anything here; the relocations will
-+ be handled correctly by relocate_section. */
-+ if (info->shared)
-+ return TRUE;
-+
-+ /* If there are no references to this symbol that do not use the
-+ GOT, we don't need to generate a copy reloc. */
-+ if (!h->non_got_ref)
-+ return TRUE;
-+
-+ /* If -z nocopyreloc was given, we won't generate them either. */
-+ if (info->nocopyreloc)
-+ {
-+ h->non_got_ref = 0;
-+ return TRUE;
-+ }
-+
-+ eh = (struct elf_nds32_link_hash_entry *) h;
-+ for (p = eh->dyn_relocs; p != NULL; p = p->next)
-+ {
-+ s = p->sec->output_section;
-+ if (s != NULL && (s->flags & (SEC_READONLY | SEC_HAS_CONTENTS)) != 0)
-+ break;
-+ }
-+
-+ /* If we didn't find any dynamic relocs in sections which needs the
-+ copy reloc, then we'll be keeping the dynamic relocs and avoiding
-+ the copy reloc. */
-+ if (p == NULL)
-+ {
-+ h->non_got_ref = 0;
-+ return TRUE;
-+ }
-+
-+ /* We must allocate the symbol in our .dynbss section, which will
-+ become part of the .bss section of the executable. There will be
-+ an entry for this symbol in the .dynsym section. The dynamic
-+ object will contain position independent code, so all references
-+ from the dynamic object to this symbol will go through the global
-+ offset table. The dynamic linker will use the .dynsym entry to
-+ determine the address it must put in the global offset table, so
-+ both the dynamic object and the regular object will refer to the
-+ same memory location for the variable. */
-+
-+ htab = nds32_elf_hash_table (info);
-+ s = htab->sdynbss;
-+ BFD_ASSERT (s != NULL);
-+
-+ /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
-+ to copy the initial value out of the dynamic object and into the
-+ runtime process image. We need to remember the offset into the
-+ .rela.bss section we are going to use. */
-+ if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
-+ {
-+ asection *srel;
-+
-+ srel = htab->srelbss;
-+ BFD_ASSERT (srel != NULL);
-+ srel->size += sizeof (Elf32_External_Rela);
-+ h->needs_copy = 1;
-+ }
-+
-+ /* We need to figure out the alignment required for this symbol. I
-+ have no idea how ELF linkers handle this. */
-+ power_of_two = bfd_log2 (h->size);
-+ if (power_of_two > 3)
-+ power_of_two = 3;
-+
-+ /* Apply the required alignment. */
-+ s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
-+ if (power_of_two > bfd_get_section_alignment (dynobj, s))
-+ {
-+ if (!bfd_set_section_alignment (dynobj, s, power_of_two))
-+ return FALSE;
-+ }
-+
-+ /* Define the symbol as being at this point in the section. */
-+ h->root.u.def.section = s;
-+ h->root.u.def.value = s->size;
-+
-+ /* Increment the section size to make room for the symbol. */
-+ s->size += h->size;
-+
-+ return TRUE;
-+}
-+
-+/* Allocate space in .plt, .got and associated reloc sections for
-+ dynamic relocs. */
-+
-+static bfd_boolean
-+allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
-+{
-+ struct bfd_link_info *info;
-+ struct elf_link_hash_table *ehtab;
-+ struct elf_nds32_link_hash_table *htab;
-+ struct elf_nds32_link_hash_entry *eh;
-+ struct elf_nds32_dyn_relocs *p;
-+
-+ if (h->root.type == bfd_link_hash_indirect)
-+ return TRUE;
-+
-+ /* When warning symbols are created, they **replace** the "real"
-+ entry in the hash table, thus we never get to see the real
-+ symbol in a hash traversal. So look at it now. */
-+ if (h->root.type == bfd_link_hash_warning)
-+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
-+
-+ eh = (struct elf_nds32_link_hash_entry *) h;
-+
-+ info = (struct bfd_link_info *) inf;
-+ ehtab = elf_hash_table (info);
-+ htab = nds32_elf_hash_table (info);
-+ if (htab == NULL)
-+ return FALSE;
-+
-+ if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
-+ && h->plt.refcount > 0
-+ && !(info->pie && h->def_regular))
-+ {
-+ /* Make sure this symbol is output as a dynamic symbol.
-+ Undefined weak syms won't yet be marked as dynamic. */
-+ if (h->dynindx == -1 && !h->forced_local)
-+ {
-+ if (!bfd_elf_link_record_dynamic_symbol (info, h))
-+ return FALSE;
-+ }
-+
-+ if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, info->shared, h))
-+ {
-+ asection *s = ehtab->splt;
-+
-+ /* If this is the first .plt entry, make room for the special
-+ first entry. */
-+ if (s->size == 0)
-+ s->size += PLT_ENTRY_SIZE;
-+
-+ h->plt.offset = s->size;
-+
-+ /* If this symbol is not defined in a regular file, and we are
-+ not generating a shared library, then set the symbol to this
-+ location in the .plt. This is required to make function
-+ pointers compare as equal between the normal executable and
-+ the shared library. */
-+ if (!info->shared && !h->def_regular)
-+ {
-+ h->root.u.def.section = s;
-+ h->root.u.def.value = h->plt.offset;
-+ }
-+
-+ /* Make room for this entry. */
-+ s->size += PLT_ENTRY_SIZE;
-+
-+ /* We also need to make an entry in the .got.plt section, which
-+ will be placed in the .got section by the linker script. */
-+ ehtab->sgotplt->size += 4;
-+
-+ /* We also need to make an entry in the .rel.plt section. */
-+ ehtab->srelplt->size += sizeof (Elf32_External_Rela);
-+ htab->next_tls_desc_index++;
-+ }
-+ else
-+ {
-+ h->plt.offset = (bfd_vma) - 1;
-+ h->needs_plt = 0;
-+ }
-+ }
-+ else
-+ {
-+ h->plt.offset = (bfd_vma) - 1;
-+ h->needs_plt = 0;
-+ }
-+
-+ if (h->got.refcount > 0)
-+ {
-+ asection *sgot;
-+ bfd_boolean dyn;
-+ int tls_type = elf32_nds32_hash_entry (h)->tls_type;
-+
-+ /* Make sure this symbol is output as a dynamic symbol.
-+ Undefined weak syms won't yet be marked as dynamic. */
-+ if (h->dynindx == -1 && !h->forced_local)
-+ {
-+ if (!bfd_elf_link_record_dynamic_symbol (info, h))
-+ return FALSE;
-+ }
-+
-+ sgot = elf_hash_table (info)->sgot;
-+ h->got.offset = sgot->size;
-+
-+ if (tls_type == GOT_UNKNOWN)
-+ abort ();
-+
-+ /* Non-TLS symbols, and TLS_IE need one GOT slot. */
-+ if (tls_type & (GOT_NORMAL | GOT_TLS_IE | GOT_TLS_IEGP))
-+ sgot->size += 4;
-+ else
-+ {
-+ /* TLS_DESC, TLS_GD, and TLS_LD need 2 consecutive GOT slots. */
-+ if (tls_type & GOT_TLS_DESC)
-+ sgot->size += 8;
-+ }
-+
-+ dyn = htab->root.dynamic_sections_created;
-+
-+ if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h))
-+ {
-+ if (tls_type == GOT_TLS_DESC)
-+ {
-+ /* TLS_DESC needs a relocation slot within .rela.plt. */
-+ htab->num_tls_desc++;
-+ ehtab->srelplt->size += sizeof (Elf32_External_Rela);
-+ htab->tls_trampoline = -1;
-+ }
-+ else
-+ {
-+ /* other relocations need a relocation slot within .rela.got. */
-+ ehtab->srelgot->size += sizeof (Elf32_External_Rela);
-+ }
-+ }
-+ }
-+ else
-+ h->got.offset = (bfd_vma) -1;
-+
-+ if (eh->dyn_relocs == NULL)
-+ return TRUE;
-+
-+ /* In the shared -Bsymbolic case, discard space allocated for
-+ dynamic pc-relative relocs against symbols which turn out to be
-+ defined in regular objects. For the normal shared case, discard
-+ space for pc-relative relocs that have become local due to symbol
-+ visibility changes. */
-+
-+ if (info->shared)
-+ {
-+ if (h->def_regular && (h->forced_local || info->symbolic))
-+ {
-+ struct elf_nds32_dyn_relocs **pp;
-+
-+ for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
-+ {
-+ p->count -= p->pc_count;
-+ p->pc_count = 0;
-+ if (p->count == 0)
-+ *pp = p->next;
-+ else
-+ pp = &p->next;
-+ }
-+ }
-+ }
-+ else
-+ {
-+ /* For the non-shared case, discard space for relocs against
-+ symbols which turn out to need copy relocs or are not dynamic. */
-+
-+ if (!h->non_got_ref
-+ && ((h->def_dynamic
-+ && !h->def_regular)
-+ || (htab->root.dynamic_sections_created
-+ && (h->root.type == bfd_link_hash_undefweak
-+ || h->root.type == bfd_link_hash_undefined))))
-+ {
-+ /* Make sure this symbol is output as a dynamic symbol.
-+ Undefined weak syms won't yet be marked as dynamic. */
-+ if (h->dynindx == -1 && !h->forced_local)
-+ {
-+ if (!bfd_elf_link_record_dynamic_symbol (info, h))
-+ return FALSE;
-+ }
-+
-+ /* If that succeeded, we know we'll be keeping all the
-+ relocs. */
-+ if (h->dynindx != -1)
-+ goto keep;
-+ }
-+
-+ eh->dyn_relocs = NULL;
-+
-+keep:;
-+ }
-+
-+ /* Finally, allocate space. */
-+ for (p = eh->dyn_relocs; p != NULL; p = p->next)
-+ {
-+ asection *sreloc = elf_section_data (p->sec)->sreloc;
-+ sreloc->size += p->count * sizeof (Elf32_External_Rela);
-+ }
-+
-+ return TRUE;
-+}
-+
-+/* Add relocation REL to the end of relocation section SRELOC. */
-+
-+static void
-+elf32_nds32_add_dynreloc (bfd *output_bfd,
-+ struct bfd_link_info *info ATTRIBUTE_UNUSED,
-+ asection *sreloc, Elf_Internal_Rela *rel)
-+{
-+ bfd_byte *loc;
-+ if (sreloc == NULL)
-+ abort ();
-+
-+ loc = sreloc->contents;
-+ loc += sreloc->reloc_count++ * sizeof (Elf32_External_Rela);
-+ if (sreloc->reloc_count * sizeof (Elf32_External_Rela) > sreloc->size)
-+ abort ();
-+
-+ bfd_elf32_swap_reloca_out (output_bfd, rel, loc);
-+}
-+
-+/* Find any dynamic relocs that apply to read-only sections. */
-+
-+static bfd_boolean
-+readonly_dynrelocs (struct elf_link_hash_entry *h, void *inf)
-+{
-+ struct elf_nds32_link_hash_entry *eh;
-+ struct elf_nds32_dyn_relocs *p;
-+
-+ if (h->root.type == bfd_link_hash_warning)
-+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
-+
-+ eh = (struct elf_nds32_link_hash_entry *) h;
-+ for (p = eh->dyn_relocs; p != NULL; p = p->next)
-+ {
-+ asection *s = p->sec->output_section;
-+
-+ if (s != NULL && (s->flags & SEC_READONLY) != 0)
-+ {
-+ struct bfd_link_info *info = (struct bfd_link_info *) inf;
-+
-+ info->flags |= DF_TEXTREL;
-+
-+ /* Not an error, just cut short the traversal. */
-+ return FALSE;
-+ }
-+ }
-+ return TRUE;
-+}
-+
-+/* Set the sizes of the dynamic sections. */
-+
-+static bfd_boolean
-+nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
-+ struct bfd_link_info *info)
-+{
-+ bfd *dynobj;
-+ asection *s;
-+ bfd_boolean plt;
-+ bfd_boolean relocs;
-+ bfd *ibfd;
-+ struct elf_nds32_link_hash_table *htab;
-+
-+ htab = nds32_elf_hash_table (info);
-+ if (htab == NULL)
-+ return FALSE;
-+
-+ dynobj = elf_hash_table (info)->dynobj;
-+ BFD_ASSERT (dynobj != NULL);
-+
-+ if (elf_hash_table (info)->dynamic_sections_created)
-+ {
-+ /* Set the contents of the .interp section to the interpreter. */
-+ if (info->executable)
-+ {
-+ s = bfd_get_section_by_name (dynobj, ".interp");
-+ BFD_ASSERT (s != NULL);
-+ s->size = sizeof ELF_DYNAMIC_INTERPRETER;
-+ s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
-+ }
-+ }
-+
-+ /* Set up .got offsets for local syms, and space for local dynamic
-+ relocs. */
-+ for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
-+ {
-+ bfd_signed_vma *local_got;
-+ bfd_signed_vma *end_local_got;
-+ bfd_size_type locsymcount;
-+ Elf_Internal_Shdr *symtab_hdr;
-+ asection *sgot;
-+ char *local_tls_type;
-+ unsigned long symndx;
-+ bfd_vma *local_tlsdesc_gotent;
-+
-+ if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
-+ continue;
-+
-+ for (s = ibfd->sections; s != NULL; s = s->next)
-+ {
-+ struct elf_nds32_dyn_relocs *p;
-+
-+ for (p = ((struct elf_nds32_dyn_relocs *)
-+ elf_section_data (s)->local_dynrel);
-+ p != NULL; p = p->next)
-+ {
-+ if (!bfd_is_abs_section (p->sec)
-+ && bfd_is_abs_section (p->sec->output_section))
-+ {
-+ /* Input section has been discarded, either because
-+ it is a copy of a linkonce section or due to
-+ linker script /DISCARD/, so we'll be discarding
-+ the relocs too. */
-+ }
-+ else if (p->count != 0)
-+ {
-+ asection *sreloc = elf_section_data (p->sec)->sreloc;
-+ sreloc->size += p->count * sizeof (Elf32_External_Rela);
-+ if ((p->sec->output_section->flags & SEC_READONLY) != 0)
-+ info->flags |= DF_TEXTREL;
-+ }
-+ }
-+ }
-+
-+ local_got = elf_local_got_refcounts (ibfd);
-+ if (!local_got)
-+ continue;
-+
-+ symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
-+ locsymcount = symtab_hdr->sh_info;
-+ end_local_got = local_got + locsymcount;
-+ sgot = elf_hash_table (info)->sgot;
-+ local_tls_type = elf32_nds32_local_got_tls_type (ibfd);
-+ local_tlsdesc_gotent = elf32_nds32_local_tlsdesc_gotent (ibfd);
-+ for (symndx = 0; local_got < end_local_got;
-+ ++local_got, ++local_tls_type, ++local_tlsdesc_gotent, ++symndx)
-+ {
-+ if (*local_got > 0)
-+ {
-+ int num_of_got_entry_needed = 0;
-+ *local_got = sgot->size;
-+ *local_tlsdesc_gotent = sgot->size;
-+
-+ /* TLS_NORMAL, and TLS_IE need one slot in .got. */
-+ if (*local_tls_type & (GOT_NORMAL | GOT_TLS_IE | GOT_TLS_IEGP))
-+ num_of_got_entry_needed = 1;
-+ /* TLS_GD, TLS_LD, and TLS_DESC need an 8-byte structure in the GOT. */
-+ else if (*local_tls_type & GOT_TLS_DESC)
-+ num_of_got_entry_needed = 2;
-+
-+ sgot->size += (num_of_got_entry_needed << 2);
-+
-+ /* non-relax-able TLS_DESCs need a slot in .rela.plt.
-+ others need a slot in .rela.got. */
-+ if (*local_tls_type == GOT_TLS_DESC)
-+ {
-+ if (info->shared)
-+ {
-+ htab->num_tls_desc++;
-+ htab->root.srelplt->size += sizeof (Elf32_External_Rela);
-+ htab->tls_trampoline = -1;
-+ }
-+ else
-+ {
-+ /* TLS_DESC -> TLS_LE */
-+ }
-+ }
-+ else
-+ {
-+ htab->root.srelgot->size += sizeof (Elf32_External_Rela);
-+ }
-+ }
-+ else
-+ {
-+ *local_got = (bfd_vma) -1;
-+ *local_tlsdesc_gotent = (bfd_vma) -1;
-+ }
-+ }
-+ }
-+
-+ /* Allocate global sym .plt and .got entries, and space for global
-+ sym dynamic relocs. */
-+ elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
-+
-+ /* For every jump slot reserved in the sgotplt, reloc_count is
-+ incremented. However, when we reserve space for TLS descriptors,
-+ it's not incremented, so in order to compute the space reserved
-+ for them, it suffices to multiply the reloc count by the jump
-+ slot size. */
-+ if (htab->root.srelplt)
-+ htab->sgotplt_jump_table_size = elf32_nds32_compute_jump_table_size (htab);
-+
-+ if (htab->tls_trampoline)
-+ {
-+ htab->tls_trampoline = htab->root.splt->size;
-+
-+ /* If we're not using lazy TLS relocations, don't generate the
-+ PLT and GOT entries they require. */
-+ if (!(info->flags & DF_BIND_NOW))
-+ {
-+ htab->dt_tlsdesc_got = htab->root.sgot->size;
-+ htab->root.sgot->size += 4;
-+
-+ htab->dt_tlsdesc_plt = htab->root.splt->size;
-+ htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
-+ }
-+ }
-+
-+ /* We now have determined the sizes of the various dynamic sections.
-+ Allocate memory for them. */
-+ /* The check_relocs and adjust_dynamic_symbol entry points have
-+ determined the sizes of the various dynamic sections. Allocate
-+ memory for them. */
-+ plt = FALSE;
-+ relocs = FALSE;
-+ for (s = dynobj->sections; s != NULL; s = s->next)
-+ {
-+ if ((s->flags & SEC_LINKER_CREATED) == 0)
-+ continue;
-+
-+ if (s == htab->root.splt)
-+ {
-+ /* Strip this section if we don't need it; see the
-+ comment below. */
-+ plt = s->size != 0;
-+ }
-+ else if (s == elf_hash_table (info)->sgot)
-+ {
-+ got_size += s->size;
-+ }
-+ else if (s == elf_hash_table (info)->sgotplt)
-+ {
-+ got_size += s->size;
-+ }
-+ else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
-+ {
-+ if (s->size != 0 && s != elf_hash_table (info)->srelplt)
-+ relocs = TRUE;
-+
-+ /* We use the reloc_count field as a counter if we need
-+ to copy relocs into the output file. */
-+ s->reloc_count = 0;
-+ }
-+ else
-+ {
-+ /* It's not one of our sections, so don't allocate space. */
-+ continue;
-+ }
-+
-+ if (s->size == 0)
-+ {
-+ /* If we don't need this section, strip it from the
-+ output file. This is mostly to handle .rela.bss and
-+ .rela.plt. We must create both sections in
-+ create_dynamic_sections, because they must be created
-+ before the linker maps input sections to output
-+ sections. The linker does that before
-+ adjust_dynamic_symbol is called, and it is that
-+ function which decides whether anything needs to go
-+ into these sections. */
-+ s->flags |= SEC_EXCLUDE;
-+ continue;
-+ }
-+
-+ /* Allocate memory for the section contents. We use bfd_zalloc
-+ here in case unused entries are not reclaimed before the
-+ section's contents are written out. This should not happen,
-+ but this way if it does, we get a R_NDS32_NONE reloc instead
-+ of garbage. */
-+ s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
-+ if (s->contents == NULL)
-+ return FALSE;
-+ }
-+
-+
-+ if (htab->root.dynamic_sections_created)
-+ {
-+ /* Add some entries to the .dynamic section. We fill in the
-+ values later, in nds32_elf_finish_dynamic_sections, but we
-+ must add the entries now so that we get the correct size for
-+ the .dynamic section. The DT_DEBUG entry is filled in by the
-+ dynamic linker and used by the debugger. */
-+#define add_dynamic_entry(TAG, VAL) _bfd_elf_add_dynamic_entry (info, TAG, VAL)
-+
-+ if (info->executable)
-+ {
-+ if (!add_dynamic_entry (DT_DEBUG, 0))
-+ return FALSE;
-+ }
-+
-+ if (elf_hash_table (info)->splt->size != 0)
-+ {
-+ if (!add_dynamic_entry (DT_PLTGOT, 0)
-+ || !add_dynamic_entry (DT_PLTRELSZ, 0)
-+ || !add_dynamic_entry (DT_PLTREL, DT_RELA)
-+ || !add_dynamic_entry (DT_JMPREL, 0))
-+ return FALSE;
-+ }
-+
-+ if (plt)
-+ {
-+ if (htab->dt_tlsdesc_plt
-+ && (!add_dynamic_entry (DT_TLSDESC_PLT, 0)
-+ || !add_dynamic_entry (DT_TLSDESC_GOT, 0)))
-+ return FALSE;
-+ }
-+
-+ if (relocs)
-+ {
-+ if (!add_dynamic_entry (DT_RELA, 0)
-+ || !add_dynamic_entry (DT_RELASZ, 0)
-+ || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
-+ return FALSE;
-+
-+ /* If any dynamic relocs apply to a read-only section,
-+ then we need a DT_TEXTREL entry. */
-+ if ((info->flags & DF_TEXTREL) == 0)
-+ elf_link_hash_traverse (&htab->root, readonly_dynrelocs,
-+ (void *) info);
-+
-+ if ((info->flags & DF_TEXTREL) != 0)
-+ {
-+ if (!add_dynamic_entry (DT_TEXTREL, 0))
-+ return FALSE;
-+ }
-+ }
-+ }
-+#undef add_dynamic_entry
-+
-+ return TRUE;
-+}
-+
-+static bfd_reloc_status_type
-+nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
-+ bfd_vma relocation, bfd_byte *location)
-+{
-+ int size;
-+ bfd_vma x = 0;
-+ bfd_reloc_status_type flag;
-+ unsigned int rightshift = howto->rightshift;
-+ unsigned int bitpos = howto->bitpos;
-+
-+ /* If the size is negative, negate RELOCATION. This isn't very
-+ general. */
-+ if (howto->size < 0)
-+ relocation = -relocation;
-+
-+ /* Get the value we are going to relocate. */
-+ size = bfd_get_reloc_size (howto);
-+ switch (size)
-+ {
-+ default:
-+ case 0:
-+ case 1:
-+ case 8:
-+ abort ();
-+ break;
-+ case 2:
-+ x = bfd_getb16 (location);
-+ break;
-+ case 4:
-+ x = bfd_getb32 (location);
-+ break;
-+ }
-+
-+ /* Check for overflow. FIXME: We may drop bits during the addition
-+ which we don't check for. We must either check at every single
-+ operation, which would be tedious, or we must do the computations
-+ in a type larger than bfd_vma, which would be inefficient. */
-+ flag = bfd_reloc_ok;
-+ if (howto->complain_on_overflow != complain_overflow_dont)
-+ {
-+ bfd_vma addrmask, fieldmask, signmask, ss;
-+ bfd_vma a, b, sum;
-+
-+ /* Get the values to be added together. For signed and unsigned
-+ relocations, we assume that all values should be truncated to
-+ the size of an address. For bitfields, all the bits matter.
-+ See also bfd_check_overflow. */
-+ fieldmask = N_ONES (howto->bitsize);
-+ signmask = ~fieldmask;
-+ addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
-+ a = (relocation & addrmask) >> rightshift;
-+ b = (x & howto->src_mask & addrmask) >> bitpos;
-+
-+ switch (howto->complain_on_overflow)
-+ {
-+ case complain_overflow_signed:
-+ /* If any sign bits are set, all sign bits must be set.
-+ That is, A must be a valid negative address after
-+ shifting. */
-+ signmask = ~(fieldmask >> 1);
-+ /* Fall through. */
-+
-+ case complain_overflow_bitfield:
-+ /* Much like the signed check, but for a field one bit
-+ wider. We allow a bitfield to represent numbers in the
-+ range -2**n to 2**n-1, where n is the number of bits in the
-+ field. Note that when bfd_vma is 32 bits, a 32-bit reloc
-+ can't overflow, which is exactly what we want. */
-+ ss = a & signmask;
-+ if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
-+ flag = bfd_reloc_overflow;
-+
-+ /* We only need this next bit of code if the sign bit of B
-+ is below the sign bit of A. This would only happen if
-+ SRC_MASK had fewer bits than BITSIZE. Note that if
-+ SRC_MASK has more bits than BITSIZE, we can get into
-+ trouble; we would need to verify that B is in range, as
-+ we do for A above. */
-+ ss = ((~howto->src_mask) >> 1) & howto->src_mask;
-+ ss >>= bitpos;
-+
-+ /* Set all the bits above the sign bit. */
-+ b = (b ^ ss) - ss;
-+
-+ /* Now we can do the addition. */
-+ sum = a + b;
-+
-+ /* See if the result has the correct sign. Bits above the
-+ sign bit are junk now; ignore them. If the sum is
-+ positive, make sure we did not have all negative inputs;
-+ if the sum is negative, make sure we did not have all
-+ positive inputs. The test below looks only at the sign
-+ bits, and it really just
-+ SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
-+
-+ We mask with addrmask here to explicitly allow an address
-+ wrap-around. The Linux kernel relies on it, and it is
-+ the only way to write assembler code which can run when
-+ loaded at a location 0x80000000 away from the location at
-+ which it is linked. */
-+ if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
-+ flag = bfd_reloc_overflow;
-+
-+ break;
-+
-+ case complain_overflow_unsigned:
-+ /* Checking for an unsigned overflow is relatively easy:
-+ trim the addresses and add, and trim the result as well.
-+ Overflow is normally indicated when the result does not
-+ fit in the field. However, we also need to consider the
-+ case when, e.g., fieldmask is 0x7fffffff or smaller, an
-+ input is 0x80000000, and bfd_vma is only 32 bits; then we
-+ will get sum == 0, but there is an overflow, since the
-+ inputs did not fit in the field. Instead of doing a
-+ separate test, we can check for this by or-ing in the
-+ operands when testing for the sum overflowing its final
-+ field. */
-+ sum = (a + b) & addrmask;
-+ if ((a | b | sum) & signmask)
-+ flag = bfd_reloc_overflow;
-+ break;
-+
-+ default:
-+ abort ();
-+ }
-+ }
-+
-+ /* Put RELOCATION in the right bits. */
-+ relocation >>= (bfd_vma) rightshift;
-+ relocation <<= (bfd_vma) bitpos;
-+
-+ /* Add RELOCATION to the right bits of X. */
-+ /* FIXME : 090616
-+ Because the relaxation may generate duplicate relocation at one address,
-+ an addition to immediate in the instruction may cause the relocation added
-+ several times.
-+ This bug should be fixed in assembler, but a check is also needed here. */
-+ if (howto->partial_inplace)
-+ x = ((x & ~howto->dst_mask)
-+ | (((x & howto->src_mask) + relocation) & howto->dst_mask));
-+ else
-+ x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
-+
-+
-+ /* Put the relocated value back in the object file. */
-+ switch (size)
-+ {
-+ default:
-+ case 0:
-+ case 1:
-+ case 8:
-+ abort ();
-+ break;
-+ case 2:
-+ bfd_putb16 (x, location);
-+ break;
-+ case 4:
-+ bfd_putb32 (x, location);
-+ break;
-+ }
-+
-+ return flag;
-+}
-+
-+static bfd_reloc_status_type
-+nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
-+ asection *input_section, bfd_byte *contents,
-+ bfd_vma address, bfd_vma value, bfd_vma addend)
-+{
-+ bfd_vma relocation;
-+
-+ /* Sanity check the address. */
-+ if (address > bfd_get_section_limit (input_bfd, input_section))
-+ return bfd_reloc_outofrange;
-+
-+ /* This function assumes that we are dealing with a basic relocation
-+ against a symbol. We want to compute the value of the symbol to
-+ relocate to. This is just VALUE, the value of the symbol, plus
-+ ADDEND, any addend associated with the reloc. */
-+ relocation = value + addend;
-+
-+ /* If the relocation is PC relative, we want to set RELOCATION to
-+ the distance between the symbol (currently in RELOCATION) and the
-+ location we are relocating. Some targets (e.g., i386-aout)
-+ arrange for the contents of the section to be the negative of the
-+ offset of the location within the section; for such targets
-+ pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
-+ simply leave the contents of the section as zero; for such
-+ targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
-+ need to subtract out the offset of the location within the
-+ section (which is just ADDRESS). */
-+ if (howto->pc_relative)
-+ {
-+ relocation -= (input_section->output_section->vma
-+ + input_section->output_offset);
-+ if (howto->pcrel_offset)
-+ relocation -= address;
-+ }
-+
-+ return nds32_relocate_contents (howto, input_bfd, relocation,
-+ contents + address);
-+}
-+
-+static bfd_boolean
-+nds32_elf_output_symbol_hook (struct bfd_link_info *info,
-+ const char *name,
-+ Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
-+ asection *input_sec,
-+ struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
-+{
-+ const char *source;
-+ FILE *sym_ld_script = NULL;
-+ struct elf_nds32_link_hash_table *table;
-+
-+ table = nds32_elf_hash_table (info);
-+ sym_ld_script = table->sym_ld_script;
-+ if (!sym_ld_script)
-+ return TRUE;
-+
-+ if (!h || !name || *name == '\0')
-+ return TRUE;
-+
-+ if (input_sec->flags & SEC_EXCLUDE)
-+ return TRUE;
-+
-+ if (!check_start_export_sym)
-+ {
-+ fprintf (sym_ld_script, "SECTIONS\n{\n");
-+ check_start_export_sym = 1;
-+ }
-+
-+ if (h->root.type == bfd_link_hash_defined
-+ || h->root.type == bfd_link_hash_defweak)
-+ {
-+ if (!h->root.u.def.section->output_section)
-+ return TRUE;
-+
-+ if (bfd_is_const_section (input_sec))
-+ source = input_sec->name;
-+ else
-+ source = input_sec->owner->filename;
-+
-+ fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
-+ h->root.root.string,
-+ (h->root.u.def.value
-+ + h->root.u.def.section->output_section->vma
-+ + h->root.u.def.section->output_offset), source);
-+ }
-+
-+ return TRUE;
-+}
-+
-+/* Relocate an NDS32/D ELF section.
-+ There is some attempt to make this function usable for many architectures,
-+ both for RELA and REL type relocs, if only to serve as a learning tool.
-+
-+ The RELOCATE_SECTION function is called by the new ELF backend linker
-+ to handle the relocations for a section.
-+
-+ The relocs are always passed as Rela structures; if the section
-+ actually uses Rel structures, the r_addend field will always be
-+ zero.
-+
-+ This function is responsible for adjust the section contents as
-+ necessary, and (if using Rela relocs and generating a
-+ relocatable output file) adjusting the reloc addend as
-+ necessary.
-+
-+ This function does not have to worry about setting the reloc
-+ address or the reloc symbol index.
-+
-+ LOCAL_SYMS is a pointer to the swapped in local symbols.
-+
-+ LOCAL_SECTIONS is an array giving the section in the input file
-+ corresponding to the st_shndx field of each local symbol.
-+
-+ The global hash table entry for the global symbols can be found
-+ via elf_sym_hashes (input_bfd).
-+
-+ When generating relocatable output, this function must handle
-+ STB_LOCAL/STT_SECTION symbols specially. The output symbol is
-+ going to be the section symbol corresponding to the output
-+ section, which means that the addend must be adjusted
-+ accordingly. */
-+
-+/* Return the base VMA address which should be subtracted from real addresses
-+ when resolving @dtpoff relocation.
-+ This is PT_TLS segment p_vaddr. */
-+
-+/* Return the relocation value for @tpoff relocation
-+ if STT_TLS virtual address is ADDRESS. */
-+
-+/* Return the relocation value for @gottpoff relocation
-+ if STT_TLS virtual address is ADDRESS. */
-+static bfd_vma
-+gottpoff (struct bfd_link_info *info, bfd_vma address)
-+{
-+ bfd_vma tp_base;
-+ bfd_vma tp_offset;
-+
-+ /* If tls_sec is NULL, we should have signalled an error already. */
-+ if (elf_hash_table (info)->tls_sec == NULL)
-+ return 0;
-+
-+ tp_base = elf_hash_table (info)->tls_sec->vma;
-+ tp_offset = address - tp_base;
-+
-+ return tp_offset;
-+}
-+
-+#define POLY 0x755b /* crc = (0x10000 | POLY) >> 1 = 0xbaad. */
-+#define INV_POLY 0xb55d
-+
-+/* Initial the crc table value. */
-+
-+static void
-+nds32_precompute_byte_crc_table (void)
-+{
-+ int i;
-+ int j;
-+ unsigned short r;
-+ r = 0;
-+ for (i = 0; i < 0x100; ++i)
-+ {
-+ r = i << 8;
-+ for (j = 7; j >= 0; --j)
-+ {
-+ unsigned short p = (r & 0x8000) ? POLY : 0;
-+ r = (r << 1) ^ p;
-+ }
-+ byte_crc_table[i] = r;
-+ }
-+}
-+
-+static void
-+nds32_precompute_byte_inv_crc_table (void)
-+{
-+ int i;
-+ int j;
-+ unsigned short r;
-+ r = 0;
-+ for (i = 0; i < 0x100; ++i)
-+ {
-+ r = i << 8;
-+ for (j = 7; j >= 0; --j)
-+ {
-+ unsigned short p = (r & 0x8000) ? INV_POLY : 0;
-+ r = (r << 1) ^ p;
-+ }
-+ byte_inv_crc_table[i] = r;
-+ }
-+}
-+
-+/* Perform the crc computation. */
-+
-+static void
-+nds32_crc_compute (bfd_byte *ptr, unsigned int size, unsigned short *sum)
-+{
-+ unsigned char b;
-+
-+ if (size == 2)
-+ {
-+ b = *ptr++ ^ (*sum >> 8);
-+ *sum = (0xffff & (*sum << 8)) ^ byte_crc_table[b];
-+ b = *ptr++ ^ (*sum >> 8);
-+ *sum = (0xffff & (*sum << 8)) ^ byte_crc_table[b];
-+ b = (*sum >> 8);
-+ *sum = (0xffff & (*sum << 8)) ^ byte_crc_table[b];
-+ b = (*sum >> 8);
-+ *sum = (0xffff & (*sum << 8)) ^ byte_crc_table[b];
-+ }
-+ else
-+ {
-+ b = *ptr++ ^ (*sum >> 8);
-+ *sum = (0xffff & (*sum << 8)) ^ byte_crc_table[b];
-+ b = *ptr++ ^ (*sum >> 8);
-+ *sum = (0xffff & (*sum << 8)) ^ byte_crc_table[b];
-+ b = *ptr++ ^ (*sum >> 8);
-+ *sum = (0xffff & (*sum << 8)) ^ byte_crc_table[b];
-+ b = *ptr++ ^ (*sum >> 8);
-+ *sum = (0xffff & (*sum << 8)) ^ byte_crc_table[b];
-+ }
-+}
-+
-+static void
-+nds32_crc_final (int num, unsigned short *sum)
-+{
-+ int i, tmp, r = 0;
-+ unsigned short crc, inv_crc = 0;
-+
-+ crc = *sum;
-+ /* Reverse it. */
-+ for (i = 0; i < 16; ++i)
-+ {
-+ tmp = crc & 0x1;
-+ inv_crc = (inv_crc << 1) | tmp;
-+ crc = crc >> 1;
-+ }
-+
-+ for (i = 0; i < num + 2; ++i)
-+ {
-+ if (i == 0)
-+ tmp = (inv_crc >> 8) ^ (r >> 8);
-+ else if (i == 1)
-+ tmp = (inv_crc & 0xff) ^ (r >> 8);
-+ else
-+ tmp = (r >> 8);
-+ r = (0xffff & (r << 8)) ^ byte_inv_crc_table[tmp];
-+ }
-+ crc = r;
-+ inv_crc = 0;
-+
-+ for (i = 0; i < 16; ++i)
-+ {
-+ tmp = crc & 0x1;
-+ inv_crc = (inv_crc << 1) | tmp;
-+ crc = crc >> 1;
-+ }
-+
-+ *sum = inv_crc;
-+}
-+
-+/* Traverse the security region and get the crc. */
-+
-+static bfd_vma
-+nds32_elf_crc_relocation (Elf_Internal_Rela *start_rel,
-+ Elf_Internal_Rela *end_rel,
-+ Elf_Internal_Rela *irelend,
-+ bfd_byte *contents)
-+{
-+ static bfd_boolean init = FALSE;
-+ bfd_byte *location;
-+ bfd_vma address;
-+ bfd_vma x;
-+ unsigned short sum = 0;
-+ int num = 0;
-+ static bfd_byte *ex9_contents = NULL;
-+ Elf_Internal_Rela *irel;
-+ bfd_boolean ex_final = FALSE;
-+
-+ if (init == FALSE)
-+ {
-+ nds32_precompute_byte_crc_table ();
-+ nds32_precompute_byte_inv_crc_table ();
-+ init = TRUE;
-+ if (ex9_section)
-+ nds32_get_section_contents (ex9_section->owner, ex9_section,
-+ &ex9_contents, TRUE);
-+ }
-+
-+ /* Check the final instruction is isps or not. */
-+ irel = end_rel;
-+ while (irel < irelend && irel->r_offset == end_rel->r_offset)
-+ {
-+ if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SECURITY_16
-+ && irel->r_addend == NDS32_SECURITY_RESTART)
-+ {
-+ ex_final = TRUE;
-+ break;
-+ }
-+ irel++;
-+ }
-+
-+
-+ /* It doesn't have to add crc itself. */
-+
-+ for (address = start_rel->r_offset + 4; address <= end_rel->r_offset;)
-+ {
-+ /* Don't check the next crc itself. */
-+ if (address == end_rel->r_offset && ex_final)
-+ break;
-+
-+ num += 4;
-+ location = contents + address;
-+ x = bfd_getb32 (location);
-+ if (INSN_32BIT (x))
-+ {
-+ /* 4byte instruction. */
-+ nds32_crc_compute (location, 4, &sum);
-+ address += 4;
-+ }
-+ else
-+ {
-+ /* 2byte instruction. */
-+ /* Ex9 has to fetch table instruction. */
-+ if (((x >> 16) & 0xfe00) == INSN_EX9_IT_1 && ((x >> 16) & 0x1e0))
-+ {
-+ if (!ex9_contents)
-+ (*_bfd_error_handler) (_("SIG error: Can't get ex9 contents."));
-+ nds32_crc_compute (ex9_contents + ((x >> 16) & 0x1ff) * 4,
-+ 4, &sum);
-+ }
-+ else if (((x >> 16) & 0xffe0) == INSN_EX9_IT_2)
-+ {
-+ if (!ex9_contents)
-+ (*_bfd_error_handler) (_("SIG error: Can't get ex9 contents."));
-+ nds32_crc_compute (ex9_contents + ((x >> 16) & 0x1f) * 4,
-+ 4, &sum);
-+ }
-+ else
-+ nds32_crc_compute (location, 2, &sum);
-+ address += 2;
-+ }
-+ }
-+
-+ nds32_crc_final (num, &sum);
-+
-+ return sum;
-+}
-+
-+/* Move all SECURITY_16 to the final one for each instruction. */
-+
-+static void
-+nds32_elf_crc_adjust_reloc (Elf_Internal_Rela *relocs,
-+ Elf_Internal_Rela *relend)
-+{
-+ Elf_Internal_Rela *rel, *crc_rel = NULL;
-+ Elf_Internal_Rela rel_temp;
-+
-+ for (rel = relocs; rel < relend; rel++)
-+ {
-+ if (crc_rel && crc_rel->r_offset == rel->r_offset)
-+ {
-+ memcpy (&rel_temp, rel, sizeof (Elf_Internal_Rela));
-+ memcpy (rel, crc_rel, sizeof (Elf_Internal_Rela));
-+ memcpy (crc_rel, &rel_temp, sizeof (Elf_Internal_Rela));
-+ crc_rel = rel;
-+ }
-+ else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_SECURITY_16)
-+ {
-+ crc_rel = rel;
-+ continue;
-+ }
-+ }
-+}
-+
-+static bfd_boolean
-+patch_tls_desc_to_ie (bfd_byte *contents, Elf_Internal_Rela *rel, bfd *ibfd)
-+{
-+ /* TLS_GD/TLS_LD model #1
-+ 46 00 00 00 sethi $r0,#0x0
-+ 58 00 00 00 ori $r0,$r0,#0x0
-+ 40 00 74 00 add $r0,$r0,$gp
-+ 04 10 00 00 lwi $r1,[$r0+#0x0]
-+ 4b e0 04 01 jral $lp,$r1 */
-+
-+ /* TLS_GD/TLS_LD model #2
-+ 46 00 00 00 sethi $r0,#0x0
-+ 58 00 00 00 ori $r0,$r0,#0x0
-+ 38 10 74 02 lw $r1,[$r0+($gp<<#0x0)] <= TODO: not necessary $r1 register allocation
-+ 40 00 74 00 add $r0,$r0,$gp
-+ 4b e0 04 01 jral $lp,$r1 */
-+
-+ /* TLS_IE model (non-PIC)
-+ 46 00 00 00 sethi $r0,#0x0
-+ 04 00 00 00 lwi $r0,[$r0+#0x0]
-+ 38 00 64 02 lw $r0,[$r0+($r25<<#0x0)] */
-+
-+ /* TLS_IE model (PIC)
-+ 46 00 00 00 sethi $r0,#0x0
-+ 58 00 00 00 ori $r0,$r0,#0x0
-+ 38 00 74 02 lw $r0,[$r0+($gp<<#0x0)]
-+ 38 00 64 02 lw $r0,[$r0+($r25<<#0x0)] */
-+
-+ /* TLS_GD_TO_IE model
-+ 46 00 00 00 sethi $r0,#0x0
-+ 58 00 00 00 ori $r0,$r0,#0x0
-+ 40 00 74 00 add $r0,$rM,$gp
-+ 04 00 00 01 lwi $r0,[$r0+#0x4]
-+ 40 00 64 00 add $r0,$r0,$r25 */
-+
-+ bfd_boolean rz = FALSE;
-+
-+ typedef struct
-+ {
-+ uint32_t opcode;
-+ uint32_t mask;
-+ } pat_t;
-+
-+ uint32_t patch[3] =
-+ {
-+ 0x40007400, /* add $r0,$rM,$gp */
-+ 0x04000001, /* lwi $r0,[$r0+#0x4] */
-+ 0x40006400, /* add $r0,$r0,$r25 */
-+ };
-+
-+ pat_t mode0[3] =
-+ {
-+ { 0x40000000, 0xfe0003ff },
-+ { 0x04000000, 0xfe000000 },
-+ { 0x4be00001, 0xffff83ff },
-+ };
-+
-+ pat_t mode1[3] =
-+ {
-+ { 0x38007402, 0xfe007fff },
-+ { 0x40007400, 0xfe007fff },
-+ { 0x4be00001, 0xffff83ff },
-+ };
-+
-+ unsigned char *p = contents + rel->r_offset;
-+
-+ uint32_t insn;
-+ uint32_t regidx = 0;
-+ insn = bfd_getb32 (p);
-+ if (INSN_SETHI == (0xfe0fffffu & insn))
-+ {
-+ regidx = 0x1f & (insn >> 20);
-+ p += 4;
-+ }
-+
-+ insn = bfd_getb32 (p);
-+ if (INSN_ORI == (0xfe007fffu & insn))
-+ {
-+ regidx = 0x1f & (insn >> 20);
-+ p += 4;
-+ }
-+
-+ if (patch[2] == bfd_getb32 (p + 8)) /* character instruction */
-+ {
-+ /* already patched? */
-+ if ((patch[0] == (0xfff07fffu & bfd_getb32 (p + 0))) &&
-+ (patch[1] == bfd_getb32 (p + 4)))
-+ rz = TRUE;
-+ }
-+ else if (mode0[0].opcode == (mode0[0].mask & bfd_getb32 (p + 0)))
-+ {
-+ if ((mode0[1].opcode == (mode0[1].mask & bfd_getb32 (p + 4))) &&
-+ (mode0[2].opcode == (mode0[2].mask & bfd_getb32 (p + 8))))
-+ {
-+ bfd_putb32 (patch[0] | (regidx << 15), p + 0);
-+ bfd_putb32 (patch[1], p + 4);
-+ bfd_putb32 (patch[2], p + 8);
-+ rz = TRUE;
-+ }
-+ }
-+ else if (mode1[0].opcode == (mode1[0].mask & bfd_getb32 (p + 0)))
-+ {
-+ if ((mode1[1].opcode == (mode1[1].mask & bfd_getb32 (p + 4))) &&
-+ (mode1[2].opcode == (mode1[2].mask & bfd_getb32 (p + 8))))
-+ {
-+ bfd_putb32 (patch[0] | (regidx << 15), p + 0);
-+ bfd_putb32 (patch[1], p + 4);
-+ bfd_putb32 (patch[2], p + 8);
-+ rz = TRUE;
-+ }
-+ }
-+
-+ if (!rz)
-+ {
-+ printf ("%s: %s @ 0x%08x\n", __func__, ibfd->filename,
-+ (int) rel->r_offset);
-+ BFD_ASSERT(0); /* unsupported pattern */
-+ }
-+
-+ return rz;
-+}
-+
-+static enum elf_nds32_tls_type
-+get_tls_type (enum elf_nds32_reloc_type r_type, struct elf_link_hash_entry *h);
-+
-+static unsigned int
-+ones32 (register unsigned int x)
-+{
-+ /* 32-bit recursive reduction using SWAR...
-+ but first step is mapping 2-bit values
-+ into sum of 2 1-bit values in sneaky way. */
-+ x -= ((x >> 1) & 0x55555555);
-+ x = (((x >> 2) & 0x33333333) + (x & 0x33333333));
-+ x = (((x >> 4) + x) & 0x0f0f0f0f);
-+ x += (x >> 8);
-+ x += (x >> 16);
-+ return (x & 0x0000003f);
-+}
-+
-+static unsigned int
-+fls (register unsigned int x)
-+{
-+ return ffs (x & (-x));
-+}
-+
-+#define nds32_elf_local_tlsdesc_gotent(bfd) \
-+ (elf_nds32_tdata (bfd)->local_tlsdesc_gotent)
-+
-+static bfd_boolean
-+nds32_elf_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED,
-+ struct bfd_link_info *info, bfd *input_bfd,
-+ asection *input_section, bfd_byte *contents,
-+ Elf_Internal_Rela *relocs,
-+ Elf_Internal_Sym *local_syms,
-+ asection **local_sections)
-+{
-+ Elf_Internal_Shdr *symtab_hdr;
-+ struct elf_link_hash_entry **sym_hashes;
-+ Elf_Internal_Rela *rel, *relend;
-+ bfd_boolean ret = TRUE; /* Assume success. */
-+ int align = 0;
-+ bfd_reloc_status_type r;
-+ const char *errmsg = NULL;
-+ bfd_vma gp;
-+ struct elf_link_hash_table *ehtab;
-+ struct elf_nds32_link_hash_table *htab;
-+ bfd *dynobj;
-+ bfd_vma *local_got_offsets;
-+ asection *sgot, *splt, *sreloc;
-+ bfd_vma high_address;
-+ struct elf_nds32_link_hash_table *table;
-+ int eliminate_gc_relocs;
-+ bfd_vma fpbase_addr;
-+ Elf_Internal_Rela *crc_rel = NULL;
-+
-+ symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
-+ sym_hashes = elf_sym_hashes (input_bfd);
-+ ehtab = elf_hash_table (info);
-+ htab = nds32_elf_hash_table (info);
-+ high_address = bfd_get_section_limit (input_bfd, input_section);
-+
-+ dynobj = htab->root.dynobj;
-+ local_got_offsets = elf_local_got_offsets (input_bfd);
-+
-+ sgot = ehtab->sgot;
-+ splt = ehtab->splt;
-+ sreloc = NULL;
-+
-+ rel = relocs;
-+ relend = relocs + input_section->reloc_count;
-+
-+ table = nds32_elf_hash_table (info);
-+ eliminate_gc_relocs = table->eliminate_gc_relocs;
-+
-+ /* explain _SDA_BASE_ */
-+ /* By this time, we can adjust the value of _SDA_BASE_. */
-+ if ((!info->relocatable))
-+ {
-+ is_SDA_BASE_set = 1;
-+ r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
-+ if (r != bfd_reloc_ok)
-+ return FALSE;
-+ }
-+
-+#ifdef NDS32_LINUX_TOOLCHAIN
-+ /* Do TLS model conversion once at first. */
-+ nds32_elf_unify_tls_model (input_bfd, input_section, contents, info);
-+#endif
-+
-+ if (is_ITB_BASE_set == 0)
-+ {
-+ /* Set the _ITB_BASE_. */
-+ if (!nds32_elf_ex9_itb_base (info))
-+ {
-+ (*_bfd_error_handler) (_("%B: error: Cannot set _ITB_BASE_"),
-+ output_bfd);
-+ bfd_set_error (bfd_error_bad_value);
-+ }
-+ }
-+
-+ if (table->target_optimize & NDS32_RELAX_IFC_ON)
-+ if (!nds32_elf_ifc_reloc ())
-+ (*_bfd_error_handler) (_("error: IFC relocation error."));
-+
-+ /* Relocation for .ex9.itable. */
-+ if ((table->target_optimize & NDS32_RELAX_EX9_ON)
-+ || (table->ex9_import_file && table->update_ex9_table))
-+ nds32_elf_ex9_reloc_jmp (info);
-+
-+ if (indirect_call_table.count > 0)
-+ nds32_elf_ict_relocate (info);
-+
-+ /* Use gp as fp to prevent truncated fit. Because in relaxation time
-+ the fp value is set as gp, and it has be reverted for instruction
-+ setting fp. */
-+ fpbase_addr = elf_gp (output_bfd);
-+
-+ /* Move all SECURITY_16 to the final one for each instruction. */
-+ nds32_elf_crc_adjust_reloc (relocs, relend);
-+
-+ /* Deal with (dynamic) relocations. */
-+ for (rel = relocs; rel < relend; rel++)
-+ {
-+ enum elf_nds32_reloc_type r_type;
-+ reloc_howto_type *howto = NULL;
-+ unsigned long r_symndx;
-+ struct elf_link_hash_entry *h = NULL;
-+ struct bfd_link_hash_entry *h2;
-+ Elf_Internal_Sym *sym = NULL;
-+ asection *sec;
-+ bfd_vma relocation;
-+ struct elf_nds32_ict_hash_entry *entry;
-+ bfd_vma relocation_sym = 0xdeadbeef;
-+ Elf_Internal_Rela *lorel;
-+ bfd_vma off;
-+
-+ /* We can't modify r_addend here as elf_link_input_bfd has an assert to
-+ ensure it's zero (we use REL relocs, not RELA). Therefore this
-+ should be assigning zero to `addend', but for clarity we use
-+ `r_addend'. */
-+
-+ bfd_vma addend = rel->r_addend;
-+ bfd_vma offset = rel->r_offset;
-+
-+ r_type = ELF32_R_TYPE (rel->r_info);
-+ if (r_type >= R_NDS32_max)
-+ {
-+ (*_bfd_error_handler) (_("%B: error: unknown relocation type %d."),
-+ input_bfd, r_type);
-+ bfd_set_error (bfd_error_bad_value);
-+ ret = FALSE;
-+ continue;
-+ }
-+
-+ if (r_type == R_NDS32_GNU_VTENTRY
-+ || r_type == R_NDS32_GNU_VTINHERIT
-+ || r_type == R_NDS32_NONE
-+ || r_type == R_NDS32_RELA_GNU_VTENTRY
-+ || r_type == R_NDS32_RELA_GNU_VTINHERIT
-+ || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
-+ || r_type == R_NDS32_DATA
-+ || r_type == R_NDS32_TRAN
-+ || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7))
-+ continue;
-+
-+ /* Save security beginning. */
-+ if (r_type == R_NDS32_SECURITY_16 && crc_rel == NULL)
-+ {
-+ crc_rel = rel;
-+ continue;
-+ }
-+
-+ /* If we enter the fp-as-gp region. Resolve the address of best fp-base. */
-+ if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
-+ && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
-+ {
-+ int dist;
-+
-+ /* Distance to relocation of best fp-base is encoded in R_SYM. */
-+ dist = rel->r_addend >> 16;
-+ fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
-+ local_syms, symtab_hdr);
-+ }
-+ else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
-+ && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
-+ {
-+ fpbase_addr = elf_gp (output_bfd);
-+ }
-+
-+ if (((r_type >= R_NDS32_DWARF2_OP1_RELA
-+ && r_type <= R_NDS32_DWARF2_LEB_RELA) || r_type >= R_NDS32_RELAX_ENTRY)
-+ && !info->relocatable)
-+ continue;
-+
-+ howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
-+ r_symndx = ELF32_R_SYM (rel->r_info);
-+
-+ /* This is a final link. */
-+ sym = NULL;
-+ sec = NULL;
-+ h = NULL;
-+
-+ if (r_symndx < symtab_hdr->sh_info)
-+ {
-+ /* Local symbol. */
-+ sym = local_syms + r_symndx;
-+ sec = local_sections[r_symndx];
-+
-+ relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
-+ addend = rel->r_addend;
-+
-+ /* keep symbol location for static TLS_IE GOT entry */
-+ relocation_sym = relocation;
-+ }
-+ else
-+ {
-+ /* External symbol. */
-+ bfd_boolean warned, unresolved_reloc;
-+ int symndx = r_symndx - symtab_hdr->sh_info;
-+
-+ RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
-+ r_symndx, symtab_hdr, sym_hashes, h, sec,
-+ relocation, unresolved_reloc, warned);
-+
-+ /* keep symbol location for static TLS_IE GOT entry */
-+ relocation_sym = relocation;
-+
-+ /* la $fp, _FP_BASE_ is per-function (region).
-+ Handle it specially. */
-+ switch ((int) r_type)
-+ {
-+ case R_NDS32_SDA19S0_RELA:
-+ case R_NDS32_SDA15S0_RELA:
-+ case R_NDS32_20_RELA:
-+ if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
-+ FP_BASE_NAME) == 0)
-+ {
-+ relocation = fpbase_addr;
-+ break;
-+ }
-+ }
-+ }
-+
-+ if (info->relocatable)
-+ {
-+ /* This is a relocatable link. We don't have to change
-+ anything, unless the reloc is against a section symbol,
-+ in which case we have to adjust according to where the
-+ section symbol winds up in the output section. */
-+ if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
-+ rel->r_addend += sec->output_offset + sym->st_value;
-+
-+ continue;
-+ }
-+
-+ /* Sanity check the address. */
-+ if (offset > high_address)
-+ {
-+ r = bfd_reloc_outofrange;
-+ goto check_reloc;
-+ }
-+
-+ if ((r_type >= R_NDS32_DWARF2_OP1_RELA
-+ && r_type <= R_NDS32_DWARF2_LEB_RELA)
-+ || r_type >= R_NDS32_RELAX_ENTRY)
-+ continue;
-+
-+ switch ((int) r_type)
-+ {
-+ case R_NDS32_GOTOFF:
-+ /* Relocation is relative to the start of the global offset
-+ table (for ld24 rx, #uimm24), e.g. access at label + addend
-+
-+ ld24 rx. #label@GOTOFF + addend
-+ sub rx, r12. */
-+ case R_NDS32_GOTOFF_HI20:
-+ case R_NDS32_GOTOFF_LO12:
-+ case R_NDS32_GOTOFF_LO15:
-+ case R_NDS32_GOTOFF_LO19:
-+ BFD_ASSERT (sgot != NULL);
-+
-+ relocation -= elf_gp (output_bfd);
-+ break;
-+
-+ case R_NDS32_9_PLTREL:
-+ case R_NDS32_25_PLTREL:
-+ /* Relocation is to the entry for this symbol in the
-+ procedure linkage table. */
-+
-+ /* The native assembler will generate a 25_PLTREL reloc
-+ for a local symbol if you assemble a call from one
-+ section to another when using -K pic. */
-+ if (h == NULL)
-+ break;
-+
-+ if (h->forced_local)
-+ break;
-+
-+ /* We didn't make a PLT entry for this symbol. This
-+ happens when statically linking PIC code, or when
-+ using -Bsymbolic. */
-+ if (h->plt.offset == (bfd_vma) - 1)
-+ break;
-+
-+ relocation = (splt->output_section->vma
-+ + splt->output_offset + h->plt.offset);
-+ break;
-+
-+ case R_NDS32_PLT_GOTREL_HI20:
-+ case R_NDS32_PLT_GOTREL_LO12:
-+ case R_NDS32_PLT_GOTREL_LO15:
-+ case R_NDS32_PLT_GOTREL_LO19:
-+ case R_NDS32_PLT_GOTREL_LO20:
-+ if (h == NULL
-+ || h->forced_local
-+ || h->plt.offset == (bfd_vma) -1
-+ || (info->pie && h->def_regular))
-+ {
-+ /* TODO: find better checking to optimize PIE PLT relocations. */
-+ /* We didn't make a PLT entry for this symbol. This
-+ happens when statically linking PIC code, or when
-+ using -Bsymbolic. */
-+ if (h)
-+ h->plt.offset = (bfd_vma) -1; /* cancel PLT trampoline. */
-+ relocation -= elf_gp(output_bfd);
-+ break;
-+ }
-+
-+ relocation = (splt->output_section->vma
-+ + splt->output_offset + h->plt.offset);
-+
-+ relocation -= elf_gp (output_bfd);
-+ break;
-+
-+ case R_NDS32_PLTREL_HI20:
-+ case R_NDS32_PLTREL_LO12:
-+
-+ /* Relocation is to the entry for this symbol in the
-+ procedure linkage table. */
-+
-+ /* The native assembler will generate a 25_PLTREL reloc
-+ for a local symbol if you assemble a call from one
-+ section to another when using -K pic. */
-+ if (h == NULL)
-+ break;
-+
-+ if (h->forced_local)
-+ break;
-+
-+ if (h->plt.offset == (bfd_vma) - 1)
-+ /* We didn't make a PLT entry for this symbol. This
-+ happens when statically linking PIC code, or when
-+ using -Bsymbolic. */
-+ break;
-+
-+ if (splt == NULL)
-+ break;
-+
-+ relocation = (splt->output_section->vma
-+ + splt->output_offset
-+ + h->plt.offset + 4)
-+ - (input_section->output_section->vma
-+ + input_section->output_offset
-+ + rel->r_offset);
-+
-+ break;
-+
-+ case R_NDS32_GOTPC20:
-+ /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
-+ ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
-+ relocation = elf_gp (output_bfd);
-+ break;
-+
-+ case R_NDS32_GOTPC_HI20:
-+ case R_NDS32_GOTPC_LO12:
-+ /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
-+ bl .+4
-+ seth rx,#high(_GLOBAL_OFFSET_TABLE_)
-+ or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
-+ or
-+ bl .+4
-+ seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
-+ add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4) */
-+ relocation = elf_gp (output_bfd);
-+ relocation -= (input_section->output_section->vma
-+ + input_section->output_offset + rel->r_offset);
-+ break;
-+
-+ case R_NDS32_GOT20:
-+ /* Fall through. */
-+ case R_NDS32_GOT_HI20:
-+ case R_NDS32_GOT_LO12:
-+ case R_NDS32_GOT_LO15:
-+ case R_NDS32_GOT_LO19:
-+ /* Relocation is to the entry for this symbol in the global
-+ offset table. */
-+ BFD_ASSERT (sgot != NULL);
-+
-+ if (h != NULL) /* External symbol */
-+ {
-+ bfd_boolean dyn;
-+
-+ off = h->got.offset;
-+ BFD_ASSERT (off != (bfd_vma) - 1);
-+ dyn = htab->root.dynamic_sections_created;
-+ if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
-+ || (info->shared
-+ && (info->symbolic
-+ || h->dynindx == -1
-+ || h->forced_local) && h->def_regular))
-+ {
-+ /* This is actually a static link, or it is a
-+ -Bsymbolic link and the symbol is defined
-+ locally, or the symbol was forced to be local
-+ because of a version file. We must initialize
-+ this entry in the global offset table. Since the
-+ offset must always be a multiple of 4, we use the
-+ least significant bit to record whether we have
-+ initialized it already.
-+
-+ When doing a dynamic link, we create a .rela.got
-+ relocation entry to initialize the value. This
-+ is done in the finish_dynamic_symbol routine. */
-+ if ((off & 1) != 0) /* clear LSB */
-+ off &= ~1;
-+ else
-+ {
-+ bfd_put_32 (output_bfd, relocation, sgot->contents + off);
-+ h->got.offset |= 1; /* mark initialized */
-+ }
-+ }
-+ relocation = sgot->output_section->vma + sgot->output_offset + off
-+ - elf_gp (output_bfd);
-+ }
-+ else /* Local symbol */
-+ {
-+ bfd_byte *loc;
-+
-+ BFD_ASSERT (local_got_offsets != NULL
-+ && local_got_offsets[r_symndx] != (bfd_vma) - 1);
-+
-+ off = local_got_offsets[r_symndx];
-+
-+ /* The offset must always be a multiple of 4. We use
-+ the least significant bit to record whether we have
-+ already processed this entry. */
-+ if ((off & 1) != 0) /* clear LSB */
-+ off &= ~1;
-+ else
-+ {
-+ bfd_put_32 (output_bfd, relocation, sgot->contents + off);
-+
-+ if (info->shared)
-+ {
-+ asection *srelgot;
-+ Elf_Internal_Rela outrel;
-+
-+ /* We need to generate a R_NDS32_RELATIVE reloc
-+ for the dynamic linker. */
-+ srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
-+ BFD_ASSERT (srelgot != NULL);
-+
-+ outrel.r_offset = (elf_gp (output_bfd)
-+ + sgot->output_offset + off);
-+ outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
-+ outrel.r_addend = relocation;
-+ loc = srelgot->contents;
-+ loc +=
-+ srelgot->reloc_count * sizeof (Elf32_External_Rela);
-+ bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
-+ ++srelgot->reloc_count;
-+ }
-+ local_got_offsets[r_symndx] |= 1;
-+ }
-+ relocation = sgot->output_section->vma + sgot->output_offset + off
-+ - elf_gp (output_bfd);
-+ }
-+
-+ break;
-+
-+ case R_NDS32_25_PCREL_RELA:
-+ case R_NDS32_HI20_RELA:
-+ case R_NDS32_LO12S0_RELA:
-+ /* Merge normal and indirect call functions. */
-+ if (!ignore_indirect_call && h
-+ && elf32_nds32_hash_entry (h)->indirect_call)
-+ {
-+ (*_bfd_error_handler)
-+ (_("%B: Warning: there are mixed"
-+ " indirect call function \'%s\'\n"),
-+ input_bfd, h->root.root.string);
-+
-+ entry = (struct elf_nds32_ict_hash_entry*)
-+ bfd_hash_lookup (&indirect_call_table, h->root.root.string,
-+ FALSE, FALSE);
-+ if (!entry)
-+ {
-+ (*_bfd_error_handler)
-+ (_("%B %A: internal error indirect call relocation "
-+ "0x%lx without hash.\n"),
-+ input_bfd, sec, rel->r_offset);
-+ bfd_set_error (bfd_error_bad_value);
-+ return FALSE;
-+ }
-+
-+ h2 = bfd_link_hash_lookup (info->hash,
-+ "_INDIRECT_CALL_TABLE_BASE_",
-+ FALSE, FALSE, FALSE);
-+ relocation = ((h2->u.def.value
-+ + h2->u.def.section->output_section->vma
-+ + h2->u.def.section->output_offset)
-+ + (entry->order * 4));
-+ break;
-+ }
-+
-+ /* Fall through. */
-+ case R_NDS32_16_RELA:
-+ case R_NDS32_20_RELA:
-+ case R_NDS32_5_RELA:
-+ case R_NDS32_32_RELA:
-+ case R_NDS32_9_PCREL_RELA:
-+ case R_NDS32_WORD_9_PCREL_RELA:
-+ case R_NDS32_10_UPCREL_RELA:
-+ case R_NDS32_15_PCREL_RELA:
-+ case R_NDS32_17_PCREL_RELA:
-+ case R_NDS32_LO12S3_RELA:
-+ case R_NDS32_LO12S2_RELA:
-+ case R_NDS32_LO12S2_DP_RELA:
-+ case R_NDS32_LO12S2_SP_RELA:
-+ case R_NDS32_LO12S1_RELA:
-+ case R_NDS32_LO12S0_ORI_RELA:
-+ if (info->shared && r_symndx != 0
-+ && (input_section->flags & SEC_ALLOC) != 0
-+ && (eliminate_gc_relocs == 0
-+ || (sec && (sec->flags & SEC_EXCLUDE) == 0))
-+ && ((r_type != R_NDS32_9_PCREL_RELA
-+ && r_type != R_NDS32_WORD_9_PCREL_RELA
-+ && r_type != R_NDS32_10_UPCREL_RELA
-+ && r_type != R_NDS32_15_PCREL_RELA
-+ && r_type != R_NDS32_17_PCREL_RELA
-+ && r_type != R_NDS32_25_PCREL_RELA
-+ && !(r_type == R_NDS32_32_RELA
-+ && strcmp (input_section->name, ".eh_frame") == 0))
-+ || (h != NULL && h->dynindx != -1
-+ && (!info->symbolic || !h->def_regular))))
-+ {
-+ Elf_Internal_Rela outrel;
-+ bfd_boolean skip, relocate;
-+ bfd_byte *loc;
-+
-+ /* When generating a shared object, these relocations
-+ are copied into the output file to be resolved at run
-+ time. */
-+
-+ if (sreloc == NULL)
-+ {
-+ const char *name;
-+
-+ name = bfd_elf_string_from_elf_section
-+ (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
-+ elf_section_data (input_section)->rela.hdr->sh_name);
-+ if (name == NULL)
-+ return FALSE;
-+
-+ BFD_ASSERT (strncmp (name, ".rela", 5) == 0
-+ && strcmp (bfd_get_section_name (input_bfd,
-+ input_section),
-+ name + 5) == 0);
-+
-+ sreloc = bfd_get_section_by_name (dynobj, name);
-+ BFD_ASSERT (sreloc != NULL);
-+ }
-+
-+ skip = FALSE;
-+ relocate = FALSE;
-+
-+ outrel.r_offset = _bfd_elf_section_offset (output_bfd,
-+ info,
-+ input_section,
-+ rel->r_offset);
-+ if (outrel.r_offset == (bfd_vma) - 1)
-+ skip = TRUE;
-+ else if (outrel.r_offset == (bfd_vma) - 2)
-+ skip = TRUE, relocate = TRUE;
-+ outrel.r_offset += (input_section->output_section->vma
-+ + input_section->output_offset);
-+
-+ if (skip)
-+ memset (&outrel, 0, sizeof outrel);
-+ else if (r_type == R_NDS32_17_PCREL_RELA
-+ || r_type == R_NDS32_15_PCREL_RELA
-+ || r_type == R_NDS32_25_PCREL_RELA)
-+ {
-+ BFD_ASSERT (h != NULL && h->dynindx != -1);
-+ outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
-+ outrel.r_addend = rel->r_addend;
-+ }
-+ else
-+ {
-+ /* h->dynindx may be -1 if this symbol was marked to
-+ become local. */
-+ if (h == NULL
-+ || ((info->symbolic || h->dynindx == -1)
-+ && h->def_regular)
-+ || (info->pie && h->def_regular))
-+ {
-+ relocate = TRUE;
-+ outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
-+ outrel.r_addend = relocation + rel->r_addend;
-+ if (h)
-+ h->plt.offset = (bfd_vma) -1; /* cancel PLT trampoline. */
-+ }
-+ else
-+ {
-+ if (h->dynindx == -1)
-+ {
-+ (*_bfd_error_handler)
-+ (_("%B: relocation %s against `%s' can not be used when"
-+ "making a shared object; recompile with -fPIC"),
-+ input_bfd, nds32_elf_howto_table[r_type].name, h->root.root.string);
-+ bfd_set_error (bfd_error_bad_value);
-+ return FALSE;
-+ }
-+ outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
-+ outrel.r_addend = rel->r_addend;
-+ }
-+ }
-+
-+ loc = sreloc->contents;
-+ loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
-+ bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
-+ ++sreloc->reloc_count;
-+
-+ /* If this reloc is against an external symbol, we do
-+ not want to fiddle with the addend. Otherwise, we
-+ need to include the symbol value so that it becomes
-+ an addend for the dynamic reloc. */
-+ if (!relocate)
-+ continue;
-+ }
-+ break;
-+
-+ case R_NDS32_25_ABS_RELA:
-+ if (info->shared)
-+ {
-+ (*_bfd_error_handler)
-+ (_("%s: warning: cannot deal R_NDS32_25_ABS_RELA in shared mode."),
-+ bfd_get_filename (input_bfd));
-+ return FALSE;
-+ }
-+ break;
-+
-+ case R_NDS32_9_PCREL:
-+ r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
-+ contents, offset,
-+ sec, relocation, addend);
-+ goto check_reloc;
-+
-+ case R_NDS32_HI20:
-+ /* We allow an arbitrary number of HI20 relocs before the
-+ LO12 reloc. This permits GCC to emit the HI and LO relocs
-+ itself. */
-+ for (lorel = rel + 1;
-+ (lorel < relend
-+ && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
-+ continue;
-+ if (lorel < relend
-+ && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
-+ || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
-+ || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
-+ || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
-+ {
-+ nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
-+ contents, relocation + addend);
-+ r = bfd_reloc_ok;
-+ }
-+ else
-+ r = _bfd_final_link_relocate (howto, input_bfd, input_section,
-+ contents, offset, relocation,
-+ addend);
-+
-+ goto check_reloc;
-+
-+ case R_NDS32_GOT17S2_RELA:
-+ case R_NDS32_GOT15S2_RELA:
-+ BFD_ASSERT (sgot != NULL);
-+
-+ if (h != NULL)
-+ {
-+ bfd_boolean dyn;
-+
-+ off = h->got.offset;
-+ BFD_ASSERT (off != (bfd_vma) - 1);
-+
-+ dyn = htab->root.dynamic_sections_created;
-+ if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
-+ (dyn, info->shared, h) || (info->shared
-+ && (info->symbolic
-+ || h->dynindx == -1
-+ || h->forced_local)
-+ && h->def_regular))
-+ {
-+ /* This is actually a static link, or it is a
-+ -Bsymbolic link and the symbol is defined
-+ locally, or the symbol was forced to be local
-+ because of a version file. We must initialize
-+ this entry in the global offset table. Since the
-+ offset must always be a multiple of 4, we use the
-+ least significant bit to record whether we have
-+ initialized it already.
-+
-+ When doing a dynamic link, we create a .rela.got
-+ relocation entry to initialize the value. This
-+ is done in the finish_dynamic_symbol routine. */
-+ if ((off & 1) != 0)
-+ off &= ~1;
-+ else
-+ {
-+ bfd_put_32 (output_bfd, relocation,
-+ sgot->contents + off);
-+ h->got.offset |= 1;
-+ }
-+ }
-+ }
-+ else
-+ {
-+ bfd_byte *loc;
-+
-+ BFD_ASSERT (local_got_offsets != NULL
-+ && local_got_offsets[r_symndx] != (bfd_vma) - 1);
-+
-+ off = local_got_offsets[r_symndx];
-+
-+ /* The offset must always be a multiple of 4. We use
-+ the least significant bit to record whether we have
-+ already processed this entry. */
-+ if ((off & 1) != 0)
-+ off &= ~1;
-+ else
-+ {
-+ bfd_put_32 (output_bfd, relocation, sgot->contents + off);
-+
-+ if (info->shared)
-+ {
-+ asection *srelgot;
-+ Elf_Internal_Rela outrel;
-+
-+ /* We need to generate a R_NDS32_RELATIVE reloc
-+ for the dynamic linker. */
-+ srelgot = bfd_get_section_by_name (dynobj, ".rela.got");
-+ BFD_ASSERT (srelgot != NULL);
-+
-+ outrel.r_offset = (elf_gp (output_bfd)
-+ + sgot->output_offset + off);
-+ outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
-+ outrel.r_addend = relocation;
-+ loc = srelgot->contents;
-+ loc +=
-+ srelgot->reloc_count * sizeof (Elf32_External_Rela);
-+ bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
-+ ++srelgot->reloc_count;
-+ }
-+ local_got_offsets[r_symndx] |= 1;
-+ }
-+ }
-+ relocation = sgot->output_section->vma + sgot->output_offset + off
-+ - elf_gp (output_bfd);
-+
-+ if (relocation & align)
-+ {
-+ /* Incorrect alignment. */
-+ (*_bfd_error_handler)
-+ (_("%B: warning: unaligned access to GOT entry."), input_bfd);
-+ ret = FALSE;
-+ r = bfd_reloc_dangerous;
-+ goto check_reloc;
-+ }
-+ break;
-+
-+ case R_NDS32_SDA16S3_RELA:
-+ case R_NDS32_SDA15S3_RELA:
-+ case R_NDS32_SDA15S3:
-+ align = 0x7;
-+ goto handle_sda;
-+
-+ case R_NDS32_SDA17S2_RELA:
-+ case R_NDS32_SDA15S2_RELA:
-+ case R_NDS32_SDA12S2_SP_RELA:
-+ case R_NDS32_SDA12S2_DP_RELA:
-+ case R_NDS32_SDA15S2:
-+ case R_NDS32_SDA_FP7U2_RELA:
-+ align = 0x3;
-+ goto handle_sda;
-+
-+ case R_NDS32_SDA18S1_RELA:
-+ case R_NDS32_SDA15S1_RELA:
-+ case R_NDS32_SDA15S1:
-+ align = 0x1;
-+ goto handle_sda;
-+
-+ case R_NDS32_SDA19S0_RELA:
-+ case R_NDS32_SDA15S0_RELA:
-+ case R_NDS32_SDA15S0:
-+ align = 0x0;
-+handle_sda:
-+ BFD_ASSERT (sec != NULL);
-+
-+ /* If the symbol is in the abs section, the out_bfd will be null.
-+ This happens when the relocation has a symbol@GOTOFF. */
-+ r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
-+ if (r != bfd_reloc_ok)
-+ {
-+ (*_bfd_error_handler)
-+ (_("%B: warning: relocate SDA_BASE failed."), input_bfd);
-+ ret = FALSE;
-+ goto check_reloc;
-+ }
-+
-+ /* At this point `relocation' contains the object's
-+ address. */
-+ if (r_type == R_NDS32_SDA_FP7U2_RELA)
-+ {
-+ relocation -= fpbase_addr;
-+ }
-+ else
-+ relocation -= gp;
-+ /* Now it contains the offset from _SDA_BASE_. */
-+
-+ /* Make sure alignment is correct. */
-+
-+ if (relocation & align)
-+ {
-+ /* Incorrect alignment. */
-+ (*_bfd_error_handler)
-+ (_("%B(%A): warning: unaligned small data access of type %d."),
-+ input_bfd, input_section, r_type);
-+ ret = FALSE;
-+ goto check_reloc;
-+ }
-+
-+ break;
-+ case R_NDS32_17IFC_PCREL_RELA:
-+ case R_NDS32_10IFCU_PCREL_RELA:
-+ /* do nothing */
-+ break;
-+
-+ case R_NDS32_TLS_LE_HI20:
-+ case R_NDS32_TLS_LE_LO12:
-+ case R_NDS32_TLS_LE_20:
-+ case R_NDS32_TLS_LE_15S0:
-+ case R_NDS32_TLS_LE_15S1:
-+ case R_NDS32_TLS_LE_15S2:
-+ if (elf_hash_table (info)->tls_sec != NULL)
-+ relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
-+ break;
-+ case R_NDS32_TLS_IE_HI20:
-+ case R_NDS32_TLS_IE_LO12S2:
-+ case R_NDS32_TLS_DESC_HI20:
-+ case R_NDS32_TLS_DESC_LO12:
-+ case R_NDS32_TLS_IE_LO12:
-+ case R_NDS32_TLS_IEGP_HI20:
-+ case R_NDS32_TLS_IEGP_LO12:
-+ case R_NDS32_TLS_IEGP_LO12S2:
-+ {
-+ /* Relocation is to the entry for this symbol in the global
-+ offset table. */
-+ enum elf_nds32_tls_type tls_type, org_tls_type, eff_tls_type;
-+ asection *srelgot;
-+ Elf_Internal_Rela outrel;
-+ bfd_byte *loc;
-+ int indx = 0;
-+
-+ eff_tls_type = org_tls_type = get_tls_type (r_type, h);
-+
-+ BFD_ASSERT (sgot != NULL);
-+ if (h != NULL)
-+ {
-+ bfd_boolean dyn;
-+
-+ off = h->got.offset;
-+ BFD_ASSERT (off != (bfd_vma) -1);
-+ dyn = htab->root.dynamic_sections_created;
-+ tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
-+ if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
-+ && (!info->shared
-+ || !SYMBOL_REFERENCES_LOCAL (info, h)))
-+ indx = h->dynindx;
-+ }
-+ else
-+ {
-+ BFD_ASSERT (local_got_offsets != NULL
-+ && local_got_offsets[r_symndx] != (bfd_vma) - 1);
-+
-+ off = local_got_offsets[r_symndx];
-+ tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
-+ }
-+
-+ relocation = sgot->output_section->vma + sgot->output_offset + off;
-+
-+ if (1 < ones32 (tls_type))
-+ {
-+ eff_tls_type = 1 << (fls (tls_type) - 1);
-+ /* TLS model shall be handled in nds32_elf_unify_tls_model () */
-+
-+ /* TLS model X -> LE is not implement yet!
-+ * workaround here! */
-+ if (eff_tls_type == GOT_TLS_LE)
-+ {
-+ eff_tls_type = 1 << (fls (tls_type ^ eff_tls_type) - 1);
-+ }
-+ }
-+
-+ /* The offset must always be a multiple of 4. We use
-+ the least significant bit to record whether we have
-+ already processed this entry. */
-+ bfd_boolean need_relocs = FALSE;
-+ srelgot = ehtab->srelgot;
-+ if ((info->shared || indx != 0)
-+ && (h == NULL || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
-+ || h->root.type != bfd_link_hash_undefweak))
-+ {
-+ need_relocs = TRUE;
-+ BFD_ASSERT (srelgot != NULL);
-+ }
-+
-+ if (off & 1)
-+ {
-+ off &= ~1;
-+ relocation &= ~1;
-+
-+ if (eff_tls_type & GOT_TLS_DESC)
-+ {
-+ relocation -= elf_gp (output_bfd);
-+ if ((R_NDS32_TLS_DESC_HI20 == r_type) && (!need_relocs))
-+ {
-+ /* TLS model shall be converted */
-+ BFD_ASSERT(0);
-+ }
-+ }
-+ else if (eff_tls_type & GOT_TLS_IEGP)
-+ {
-+ relocation -= elf_gp (output_bfd);
-+ }
-+ }
-+ else
-+ {
-+ if ((eff_tls_type & GOT_TLS_LE) && (tls_type ^ eff_tls_type))
-+ {
-+ /* TLS model workaround shall be applied */
-+ BFD_ASSERT(0);
-+ }
-+ else if (eff_tls_type & (GOT_TLS_IE | GOT_TLS_IEGP))
-+ {
-+ if (eff_tls_type & GOT_TLS_IEGP)
-+ relocation -= elf_gp(output_bfd);
-+
-+ if (need_relocs)
-+ {
-+ if (indx == 0)
-+ outrel.r_addend = gottpoff (info, relocation_sym);
-+ else
-+ outrel.r_addend = 0;
-+ outrel.r_offset = (sgot->output_section->vma
-+ + sgot->output_offset + off);
-+ outrel.r_info = ELF32_R_INFO (indx, R_NDS32_TLS_TPOFF);
-+
-+ elf32_nds32_add_dynreloc (output_bfd, info, srelgot,
-+ &outrel);
-+ }
-+ else
-+ {
-+ bfd_put_32 (output_bfd, gottpoff (info, relocation_sym),
-+ sgot->contents + off);
-+ }
-+ }
-+ else if (eff_tls_type & GOT_TLS_DESC)
-+ {
-+ relocation -= elf_gp (output_bfd);
-+ if (need_relocs)
-+ {
-+ asection *srelplt;
-+ srelplt = ehtab->srelplt;
-+
-+ if (indx == 0)
-+ outrel.r_addend = gottpoff (info, relocation_sym);
-+ else
-+ outrel.r_addend = 0;
-+ outrel.r_offset = (sgot->output_section->vma
-+ + sgot->output_offset + off);
-+ outrel.r_info = ELF32_R_INFO (indx, R_NDS32_TLS_DESC);
-+
-+ loc = srelplt->contents;
-+ loc += htab->next_tls_desc_index++ * sizeof (Elf32_External_Rela);
-+ BFD_ASSERT (loc + sizeof (Elf32_External_Rela)
-+ <= srelplt->contents + srelplt->size);
-+
-+ bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
-+ }
-+ else
-+ {
-+ /* feed me! */
-+ bfd_put_32 (output_bfd, 0xdeadbeef,
-+ sgot->contents + off);
-+ bfd_put_32 (output_bfd, gottpoff (info, relocation_sym),
-+ sgot->contents + off + 4);
-+ patch_tls_desc_to_ie (contents, rel, input_bfd);
-+ BFD_ASSERT(0);
-+ }
-+ }
-+ else
-+ {
-+ /* TLS model workaround shall be applied */
-+ BFD_ASSERT(0);
-+ }
-+
-+ if (h != NULL)
-+ h->got.offset |= 1;
-+ else
-+ local_got_offsets[r_symndx] |= 1;
-+ }
-+ }
-+ break;
-+
-+ case R_NDS32_SECURITY_16:
-+ relocation = nds32_elf_crc_relocation (crc_rel, rel, relend,
-+ contents);
-+ crc_rel->r_addend = NDS32_SECURITY_NONE;
-+ r = nds32_elf_final_link_relocate (howto, input_bfd,
-+ input_section, contents,
-+ crc_rel->r_offset, relocation,
-+ crc_rel->r_addend);
-+ crc_rel = NULL;
-+ goto check_reloc;
-+ break;
-+ /* DON'T fall through. */
-+ case R_NDS32_ICT_HI20:
-+ case R_NDS32_ICT_LO12:
-+ case R_NDS32_ICT_25PC:
-+ if (!ignore_indirect_call)
-+ {
-+ entry = (struct elf_nds32_ict_hash_entry*)
-+ bfd_hash_lookup (&indirect_call_table, h->root.root.string,
-+ FALSE, FALSE);
-+ if (!entry)
-+ {
-+ (*_bfd_error_handler)
-+ (_("%B %A: internal error indirect call relocation "
-+ "0x%lx without hash.\n"),
-+ input_bfd, sec, rel->r_offset);
-+ bfd_set_error (bfd_error_bad_value);
-+ return FALSE;
-+ }
-+
-+ h2 = bfd_link_hash_lookup (info->hash,
-+ "_INDIRECT_CALL_TABLE_BASE_",
-+ FALSE, FALSE, FALSE);
-+ relocation = ((h2->u.def.value
-+ + h2->u.def.section->output_section->vma
-+ + h2->u.def.section->output_offset)
-+ + (entry->order * 4));
-+ }
-+ break;
-+ /* DON'T fall through. */
-+
-+ default:
-+ /* OLD_NDS32_RELOC. */
-+
-+ r = _bfd_final_link_relocate (howto, input_bfd, input_section,
-+ contents, offset, relocation, addend);
-+ goto check_reloc;
-+ }
-+
-+ switch ((int) r_type)
-+ {
-+ case R_NDS32_20_RELA:
-+ case R_NDS32_5_RELA:
-+ case R_NDS32_9_PCREL_RELA:
-+ case R_NDS32_WORD_9_PCREL_RELA:
-+ case R_NDS32_10_UPCREL_RELA:
-+ case R_NDS32_15_PCREL_RELA:
-+ case R_NDS32_17_PCREL_RELA:
-+ case R_NDS32_25_PCREL_RELA:
-+ case R_NDS32_25_ABS_RELA:
-+ case R_NDS32_HI20_RELA:
-+ case R_NDS32_LO12S3_RELA:
-+ case R_NDS32_LO12S2_RELA:
-+ case R_NDS32_LO12S2_DP_RELA:
-+ case R_NDS32_LO12S2_SP_RELA:
-+ case R_NDS32_LO12S1_RELA:
-+ case R_NDS32_LO12S0_RELA:
-+ case R_NDS32_LO12S0_ORI_RELA:
-+ case R_NDS32_SDA16S3_RELA:
-+ case R_NDS32_SDA17S2_RELA:
-+ case R_NDS32_SDA18S1_RELA:
-+ case R_NDS32_SDA19S0_RELA:
-+ case R_NDS32_SDA15S3_RELA:
-+ case R_NDS32_SDA15S2_RELA:
-+ case R_NDS32_SDA12S2_DP_RELA:
-+ case R_NDS32_SDA12S2_SP_RELA:
-+ case R_NDS32_SDA15S1_RELA:
-+ case R_NDS32_SDA15S0_RELA:
-+ case R_NDS32_SDA_FP7U2_RELA:
-+ case R_NDS32_9_PLTREL:
-+ case R_NDS32_25_PLTREL:
-+ case R_NDS32_GOT20:
-+ case R_NDS32_GOT_HI20:
-+ case R_NDS32_GOT_LO12:
-+ case R_NDS32_GOT_LO15:
-+ case R_NDS32_GOT_LO19:
-+ case R_NDS32_GOT15S2_RELA:
-+ case R_NDS32_GOT17S2_RELA:
-+ case R_NDS32_GOTPC20:
-+ case R_NDS32_GOTPC_HI20:
-+ case R_NDS32_GOTPC_LO12:
-+ case R_NDS32_GOTOFF:
-+ case R_NDS32_GOTOFF_HI20:
-+ case R_NDS32_GOTOFF_LO12:
-+ case R_NDS32_GOTOFF_LO15:
-+ case R_NDS32_GOTOFF_LO19:
-+ case R_NDS32_PLTREL_HI20:
-+ case R_NDS32_PLTREL_LO12:
-+ case R_NDS32_PLT_GOTREL_HI20:
-+ case R_NDS32_PLT_GOTREL_LO12:
-+ case R_NDS32_PLT_GOTREL_LO15:
-+ case R_NDS32_PLT_GOTREL_LO19:
-+ case R_NDS32_PLT_GOTREL_LO20:
-+ case R_NDS32_17IFC_PCREL_RELA:
-+ case R_NDS32_10IFCU_PCREL_RELA:
-+ case R_NDS32_TLS_LE_HI20:
-+ case R_NDS32_TLS_LE_LO12:
-+ case R_NDS32_TLS_IE_HI20:
-+ case R_NDS32_TLS_IE_LO12S2:
-+ case R_NDS32_TLS_LE_20:
-+ case R_NDS32_TLS_LE_15S0:
-+ case R_NDS32_TLS_LE_15S1:
-+ case R_NDS32_TLS_LE_15S2:
-+ case R_NDS32_TLS_DESC_HI20:
-+ case R_NDS32_TLS_DESC_LO12:
-+ case R_NDS32_TLS_IE_LO12:
-+ case R_NDS32_TLS_IEGP_HI20:
-+ case R_NDS32_TLS_IEGP_LO12:
-+ case R_NDS32_TLS_IEGP_LO12S2:
-+ /* Instruction related relocs must handle endian properly. */
-+ /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
-+ r = nds32_elf_final_link_relocate (howto, input_bfd,
-+ input_section, contents,
-+ rel->r_offset, relocation,
-+ rel->r_addend);
-+ break;
-+
-+ case R_NDS32_ICT_HI20:
-+ case R_NDS32_ICT_LO12:
-+ case R_NDS32_ICT_25PC:
-+ r = nds32_elf_final_link_relocate (howto, input_bfd, input_section,
-+ contents, rel->r_offset,
-+ relocation, 0);
-+ break;
-+
-+ default:
-+ /* All other relocs can use default handler. */
-+ r = _bfd_final_link_relocate (howto, input_bfd, input_section,
-+ contents, rel->r_offset,
-+ relocation, rel->r_addend);
-+ break;
-+ }
-+
-+check_reloc:
-+
-+ if (r != bfd_reloc_ok)
-+ {
-+ /* FIXME: This should be generic enough to go in a utility. */
-+ const char *name;
-+
-+ if (h != NULL)
-+ name = h->root.root.string;
-+ else
-+ {
-+ name = bfd_elf_string_from_elf_section
-+ (input_bfd, symtab_hdr->sh_link, sym->st_name);
-+ if (name == NULL || *name == '\0')
-+ name = bfd_section_name (input_bfd, sec);
-+ }
-+
-+ if (errmsg != NULL)
-+ goto common_error;
-+
-+ switch (r)
-+ {
-+ case bfd_reloc_overflow:
-+ if (!((*info->callbacks->reloc_overflow)
-+ (info, (h ? &h->root : NULL), name, howto->name,
-+ (bfd_vma) 0, input_bfd, input_section, offset)))
-+ return FALSE;
-+ break;
-+
-+ case bfd_reloc_undefined:
-+ if (!((*info->callbacks->undefined_symbol)
-+ (info, name, input_bfd, input_section, offset, TRUE)))
-+ return FALSE;
-+ break;
-+
-+ case bfd_reloc_outofrange:
-+ errmsg = _("internal error: out of range error");
-+ goto common_error;
-+
-+ case bfd_reloc_notsupported:
-+ errmsg = _("internal error: unsupported relocation error");
-+ goto common_error;
-+
-+ case bfd_reloc_dangerous:
-+ errmsg = _("internal error: dangerous error");
-+ goto common_error;
-+
-+ default:
-+ errmsg = _("internal error: unknown error");
-+ /* Fall through. */
-+
-+common_error:
-+ if (!((*info->callbacks->warning)
-+ (info, errmsg, name, input_bfd, input_section, offset)))
-+ return FALSE;
-+ break;
-+ }
-+ }
-+ }
-+
-+ /* Resotre header size to avoid overflow load. */
-+ if (elf_nds32_tdata (input_bfd)->hdr_size != 0)
-+ symtab_hdr->sh_size = elf_nds32_tdata (input_bfd)->hdr_size;
-+
-+ return ret;
-+}
-+
-+/* Finish up dynamic symbol handling. We set the contents of various
-+ dynamic sections here. */
-+
-+static bfd_boolean
-+nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
-+ struct elf_link_hash_entry *h,
-+ Elf_Internal_Sym *sym)
-+{
-+ struct elf_link_hash_table *ehtab;
-+ struct elf_nds32_link_hash_entry *hent;
-+ bfd_byte *loc;
-+
-+ ehtab = elf_hash_table (info);
-+ hent = (struct elf_nds32_link_hash_entry *) h;
-+
-+ if (h->plt.offset != (bfd_vma) - 1)
-+ {
-+ asection *splt;
-+ asection *sgot;
-+ asection *srela;
-+
-+ bfd_vma plt_index;
-+ bfd_vma got_offset;
-+ bfd_vma local_plt_offset;
-+ Elf_Internal_Rela rela;
-+
-+ /* This symbol has an entry in the procedure linkage table. Set
-+ it up. */
-+
-+ BFD_ASSERT (h->dynindx != -1);
-+
-+ splt = ehtab->splt;
-+ sgot = ehtab->sgotplt;
-+ srela = ehtab->srelplt;
-+ BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
-+
-+ /* Get the index in the procedure linkage table which
-+ corresponds to this symbol. This is the index of this symbol
-+ in all the symbols for which we are making plt entries. The
-+ first entry in the procedure linkage table is reserved. */
-+ plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
-+
-+ /* Get the offset into the .got table of the entry that
-+ corresponds to this function. Each .got entry is 4 bytes.
-+ The first three are reserved. */
-+ got_offset = (plt_index + 3) * 4;
-+
-+ /* Fill in the entry in the procedure linkage table. */
-+ if (!info->shared)
-+ {
-+ unsigned long insn;
-+
-+ insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
-+ + sgot->output_offset + got_offset) >> 12)
-+ & 0xfffff);
-+ bfd_putb32 (insn, splt->contents + h->plt.offset);
-+
-+ insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
-+ + sgot->output_offset + got_offset) & 0x0fff)
-+ >> 2);
-+ bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
-+
-+ insn = PLT_ENTRY_WORD2;
-+ bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
-+
-+ insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
-+ bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
-+
-+ insn = PLT_ENTRY_WORD4
-+ + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
-+ bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
-+ local_plt_offset = 12;
-+ }
-+ else
-+ {
-+ /* sda_base must be set at this time. */
-+ unsigned long insn;
-+ long offset;
-+
-+ /* FIXME, sda_base is 65536, it will damage opcode. */
-+ offset = sgot->output_section->vma + sgot->output_offset + got_offset
-+ - elf_gp (output_bfd);
-+ insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
-+ bfd_putb32 (insn, splt->contents + h->plt.offset);
-+
-+ insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
-+ bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
-+
-+ insn = PLT_PIC_ENTRY_WORD2;
-+ bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
-+
-+ insn = PLT_PIC_ENTRY_WORD3;
-+ bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
-+
-+ insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
-+ bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
-+
-+ insn = PLT_PIC_ENTRY_WORD5
-+ + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
-+ bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
-+
-+ local_plt_offset = 16;
-+ }
-+
-+ /* Fill in the entry in the global offset table,
-+ so it will fall through to the next instruction for the first time. */
-+ bfd_put_32 (output_bfd,
-+ (splt->output_section->vma + splt->output_offset
-+ + h->plt.offset + local_plt_offset),
-+ sgot->contents + got_offset);
-+
-+ /* Fill in the entry in the .rela.plt section. */
-+ rela.r_offset = (sgot->output_section->vma
-+ + sgot->output_offset + got_offset);
-+ rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
-+ rela.r_addend = 0;
-+ loc = srela->contents;
-+ loc += plt_index * sizeof (Elf32_External_Rela);
-+ bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
-+
-+ if (!h->def_regular)
-+ {
-+ /* Mark the symbol as undefined, rather than as defined in
-+ the .plt section. Leave the value alone. */
-+ sym->st_shndx = SHN_UNDEF;
-+ if (!h->ref_regular_nonweak)
-+ sym->st_value = 0;
-+ }
-+ }
-+
-+ if ((h->got.offset != (bfd_vma) -1) && (hent->tls_type == GOT_NORMAL))
-+ {
-+ asection *sgot;
-+ asection *srelagot;
-+ Elf_Internal_Rela rela;
-+
-+ /* This symbol has an entry in the global offset table.
-+ Set it up. */
-+
-+ sgot = ehtab->sgot;
-+ srelagot = ehtab->srelgot;
-+ BFD_ASSERT (sgot != NULL && srelagot != NULL);
-+
-+ rela.r_offset = (sgot->output_section->vma
-+ + sgot->output_offset + (h->got.offset & ~1));
-+
-+ /* If this is a -Bsymbolic link, and the symbol is defined
-+ locally, we just want to emit a RELATIVE reloc. Likewise if
-+ the symbol was forced to be local because of a version file.
-+ The entry in the global offset table will already have been
-+ initialized in the relocate_section function. */
-+ if ((info->shared
-+ && (info->symbolic || h->dynindx == -1 || h->forced_local)
-+ && h->def_regular)
-+ || (info->pie && h->def_regular))
-+ {
-+ rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
-+ rela.r_addend = (h->root.u.def.value
-+ + h->root.u.def.section->output_section->vma
-+ + h->root.u.def.section->output_offset);
-+
-+ /* FIXME: cancel PLT trampoline, too late ?? */
-+ /* h->plt.offset = (bfd_vma) -1; */
-+ }
-+ else
-+ {
-+ BFD_ASSERT ((h->got.offset & 1) == 0);
-+ bfd_put_32 (output_bfd, (bfd_vma) 0,
-+ sgot->contents + h->got.offset);
-+ rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
-+ rela.r_addend = 0;
-+ }
-+
-+ loc = srelagot->contents;
-+ loc += srelagot->reloc_count * sizeof (Elf32_External_Rela);
-+ bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
-+ ++srelagot->reloc_count;
-+ BFD_ASSERT (loc < (srelagot->contents + srelagot->size));
-+ }
-+
-+ if (h->needs_copy)
-+ {
-+ asection *s;
-+ Elf_Internal_Rela rela;
-+
-+ /* This symbols needs a copy reloc. Set it up. */
-+
-+ BFD_ASSERT (h->dynindx != -1
-+ && (h->root.type == bfd_link_hash_defined
-+ || h->root.type == bfd_link_hash_defweak));
-+
-+ s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
-+ BFD_ASSERT (s != NULL);
-+
-+ rela.r_offset = (h->root.u.def.value
-+ + h->root.u.def.section->output_section->vma
-+ + h->root.u.def.section->output_offset);
-+ rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
-+ rela.r_addend = 0;
-+ loc = s->contents;
-+ loc += s->reloc_count * sizeof (Elf32_External_Rela);
-+ bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
-+ ++s->reloc_count;
-+ }
-+
-+ /* Mark some specially defined symbols as absolute. */
-+ if (strcmp (h->root.root.string, "_DYNAMIC") == 0
-+ || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
-+ sym->st_shndx = SHN_ABS;
-+
-+ return TRUE;
-+}
-+
-+
-+/* Finish up the dynamic sections. */
-+
-+static bfd_boolean
-+nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
-+{
-+ bfd *dynobj;
-+ asection *sdyn;
-+ asection *sgotplt;
-+ struct elf_link_hash_table *ehtab;
-+ struct elf_nds32_link_hash_table *htab;
-+
-+ ehtab = elf_hash_table (info);
-+ htab = nds32_elf_hash_table (info);
-+ if (htab == NULL)
-+ return FALSE;
-+
-+ dynobj = elf_hash_table (info)->dynobj;
-+
-+ sgotplt = ehtab->sgotplt;
-+ /* A broken linker script might have discarded the dynamic sections.
-+ Catch this here so that we do not seg-fault later on. */
-+ if (sgotplt != NULL && bfd_is_abs_section (sgotplt->output_section))
-+ return FALSE;
-+ sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
-+
-+ if (elf_hash_table (info)->dynamic_sections_created)
-+ {
-+ asection *splt;
-+ Elf32_External_Dyn *dyncon, *dynconend;
-+
-+ BFD_ASSERT (sgotplt != NULL && sdyn != NULL);
-+
-+ dyncon = (Elf32_External_Dyn *) sdyn->contents;
-+ dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
-+
-+ for (; dyncon < dynconend; dyncon++)
-+ {
-+ Elf_Internal_Dyn dyn;
-+ asection *s;
-+
-+ bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
-+
-+ switch (dyn.d_tag)
-+ {
-+ default:
-+ break;
-+
-+ case DT_PLTGOT:
-+ /* name = ".got"; */
-+ s = ehtab->sgot->output_section;
-+ goto get_vma;
-+ case DT_JMPREL:
-+ s = ehtab->srelplt->output_section;
-+get_vma:
-+ BFD_ASSERT (s != NULL);
-+ dyn.d_un.d_ptr = s->vma;
-+ bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
-+ break;
-+
-+ case DT_PLTRELSZ:
-+ s = ehtab->srelplt->output_section;
-+ BFD_ASSERT (s != NULL);
-+ dyn.d_un.d_val = s->size;
-+ bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
-+ break;
-+
-+ case DT_RELASZ:
-+ /* My reading of the SVR4 ABI indicates that the
-+ procedure linkage table relocs (DT_JMPREL) should be
-+ included in the overall relocs (DT_RELA). This is
-+ what Solaris does. However, UnixWare can not handle
-+ that case. Therefore, we override the DT_RELASZ entry
-+ here to make it not include the JMPREL relocs. Since
-+ the linker script arranges for .rela.plt to follow all
-+ other relocation sections, we don't have to worry
-+ about changing the DT_RELA entry. */
-+ if (ehtab->srelplt != NULL)
-+ {
-+ s = ehtab->srelplt->output_section;
-+ dyn.d_un.d_val -= s->size;
-+ }
-+ bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
-+ break;
-+
-+ case DT_TLSDESC_PLT:
-+ s = htab->root.splt;
-+ dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
-+ + htab->dt_tlsdesc_plt);
-+ bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
-+ break;
-+
-+ case DT_TLSDESC_GOT:
-+ s = htab->root.sgot;
-+ dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
-+ + htab->dt_tlsdesc_got);
-+ bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
-+ break;
-+ }
-+ }
-+
-+ /* Fill in the first entry in the procedure linkage table. */
-+ splt = ehtab->splt;
-+ if (splt && splt->size > 0)
-+ {
-+ if (info->shared)
-+ {
-+ unsigned long insn;
-+ long offset;
-+
-+ /* FIXME, sda_base is 65536, it will damage opcode. */
-+ offset = sgotplt->output_section->vma + sgotplt->output_offset + 4
-+ - elf_gp (output_bfd);
-+ insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
-+ bfd_putb32 (insn, splt->contents);
-+
-+ /* here has a typo? */
-+ insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
-+ bfd_putb32 (insn, splt->contents + 4);
-+
-+ insn = PLT0_PIC_ENTRY_WORD2;
-+ bfd_putb32 (insn, splt->contents + 8);
-+
-+ insn = PLT0_PIC_ENTRY_WORD3;
-+ bfd_putb32 (insn, splt->contents + 12);
-+
-+ insn = PLT0_PIC_ENTRY_WORD4;
-+ bfd_putb32 (insn, splt->contents + 16);
-+
-+ insn = PLT0_PIC_ENTRY_WORD5;
-+ bfd_putb32 (insn, splt->contents + 20);
-+ }
-+ else
-+ {
-+ unsigned long insn;
-+ unsigned long addr;
-+
-+ /* addr = .got + 4 */
-+ addr = sgotplt->output_section->vma + sgotplt->output_offset + 4;
-+ insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
-+ bfd_putb32 (insn, splt->contents);
-+
-+ insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
-+ bfd_putb32 (insn, splt->contents + 4);
-+
-+ insn = PLT0_ENTRY_WORD2;
-+ bfd_putb32 (insn, splt->contents + 8);
-+
-+ insn = PLT0_ENTRY_WORD3;
-+ bfd_putb32 (insn, splt->contents + 12);
-+
-+ insn = PLT0_ENTRY_WORD4;
-+ bfd_putb32 (insn, splt->contents + 16);
-+ }
-+
-+ elf_section_data (splt->output_section)->this_hdr.sh_entsize =
-+ PLT_ENTRY_SIZE;
-+ }
-+
-+ if (htab->dt_tlsdesc_plt)
-+ {
-+ /* Calculate addresses. */
-+ asection *sgot = sgot = ehtab->sgot;
-+ bfd_vma pltgot = sgotplt->output_section->vma
-+ + sgotplt->output_offset;
-+ bfd_vma tlsdesc_got = sgot->output_section->vma + sgot->output_offset
-+ + htab->dt_tlsdesc_got;
-+
-+ /* Get GP offset. */
-+ pltgot -= elf_gp (output_bfd) - 4; /* PLTGOT[1] */
-+ tlsdesc_got -= elf_gp (output_bfd);
-+
-+ /* Do relocation. */
-+ dl_tlsdesc_lazy_trampoline[0] += ((1 << 20) - 1) & (tlsdesc_got >> 12);
-+ dl_tlsdesc_lazy_trampoline[1] += 0xfff & tlsdesc_got;
-+ dl_tlsdesc_lazy_trampoline[4] += ((1 << 20) - 1) & (pltgot >> 12);
-+ dl_tlsdesc_lazy_trampoline[5] += 0xfff & pltgot;
-+
-+ /* TODO: relaxation. */
-+
-+ /* Insert .plt. */
-+ nds32_put_trampoline (splt->contents + htab->dt_tlsdesc_plt,
-+ dl_tlsdesc_lazy_trampoline,
-+ ARRAY_SIZE (dl_tlsdesc_lazy_trampoline));
-+ }
-+ }
-+
-+ /* Fill in the first three entries in the global offset table. */
-+ if (sgotplt && sgotplt->size > 0)
-+ {
-+ if (sdyn == NULL)
-+ bfd_put_32 (output_bfd, (bfd_vma) 0, sgotplt->contents);
-+ else
-+ bfd_put_32 (output_bfd,
-+ sdyn->output_section->vma + sdyn->output_offset,
-+ sgotplt->contents);
-+ bfd_put_32 (output_bfd, (bfd_vma) 0, sgotplt->contents + 4);
-+ bfd_put_32 (output_bfd, (bfd_vma) 0, sgotplt->contents + 8);
-+
-+ elf_section_data (sgotplt->output_section)->this_hdr.sh_entsize = 4;
-+ }
-+
-+ return TRUE;
-+}
-+
-+
-+/* Set the right machine number. */
-+
-+static bfd_boolean
-+nds32_elf_object_p (bfd *abfd)
-+{
-+ static unsigned int cur_arch = 0;
-+
-+ if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
-+ {
-+ /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
-+ cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
-+ }
-+
-+ switch (cur_arch)
-+ {
-+ default:
-+ case E_N1_ARCH:
-+ bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
-+ break;
-+ case E_N1H_ARCH:
-+ bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
-+ break;
-+ case E_NDS_ARCH_STAR_V2_0:
-+ bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
-+ break;
-+ case E_NDS_ARCH_STAR_V3_0:
-+ bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
-+ break;
-+ case E_NDS_ARCH_STAR_V3_M:
-+ bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
-+ break;
-+ }
-+
-+ return TRUE;
-+}
-+
-+/* Store the machine number in the flags field. */
-+
-+static void
-+nds32_elf_final_write_processing (bfd *abfd,
-+ bfd_boolean linker ATTRIBUTE_UNUSED)
-+{
-+ unsigned long val;
-+ static unsigned int cur_mach = 0;
-+ unsigned int i;
-+
-+ if (bfd_mach_n1 != bfd_get_mach (abfd))
-+ {
-+ cur_mach = bfd_get_mach (abfd);
-+ }
-+
-+ switch (cur_mach)
-+ {
-+ case bfd_mach_n1:
-+ /* Only happen when object is empty, since the case is abandon. */
-+ val = E_N1_ARCH;
-+ val |= E_NDS_ABI_AABI;
-+ val |= E_NDS32_ELF_VER_1_4;
-+ break;
-+ case bfd_mach_n1h:
-+ val = E_N1H_ARCH;
-+ break;
-+ case bfd_mach_n1h_v2:
-+ val = E_NDS_ARCH_STAR_V2_0;
-+ break;
-+ case bfd_mach_n1h_v3:
-+ val = E_NDS_ARCH_STAR_V3_0;
-+ break;
-+ case bfd_mach_n1h_v3m:
-+ val = E_NDS_ARCH_STAR_V3_M;
-+ break;
-+ default:
-+ val = 0;
-+ break;
-+ }
-+
-+ elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
-+ elf_elfheader (abfd)->e_flags |= val;
-+
-+ if (ict_file)
-+ {
-+ fprintf (ict_file, ".section " NDS32_ICT_SECTION ", \"ax\"\n"
-+ ".globl _INDIRECT_CALL_TABLE_BASE_\n"
-+ "_INDIRECT_CALL_TABLE_BASE_:\n");
-+ /* Output rom patch entries. */
-+ indirect_call_table.frozen = 1;
-+ for (i = 0; i < indirect_call_table.size; i++)
-+ {
-+ struct bfd_hash_entry *p;
-+ struct elf_nds32_ict_hash_entry *entry;
-+
-+ for (p = indirect_call_table.table[i]; p != NULL; p = p->next)
-+ {
-+ entry = (struct elf_nds32_ict_hash_entry *) p;
-+ fprintf (ict_file, "\tj\t%s\n", entry->root.string);
-+ }
-+ }
-+ indirect_call_table.frozen = 0;
-+ }
-+}
-+
-+/* Function to keep NDS32 specific file flags. */
-+
-+static bfd_boolean
-+nds32_elf_set_private_flags (bfd *abfd, flagword flags)
-+{
-+ BFD_ASSERT (!elf_flags_init (abfd)
-+ || elf_elfheader (abfd)->e_flags == flags);
-+
-+ elf_elfheader (abfd)->e_flags = flags;
-+ elf_flags_init (abfd) = TRUE;
-+ return TRUE;
-+}
-+
-+static unsigned int
-+convert_e_flags (unsigned int e_flags, unsigned int arch)
-+{
-+ if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
-+ {
-+ /* From 0.9 to 1.0. */
-+ e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
-+
-+ /* Invert E_NDS32_HAS_NO_MAC_INST. */
-+ e_flags ^= E_NDS32_HAS_NO_MAC_INST;
-+ if (arch == E_NDS_ARCH_STAR_V1_0)
-+ {
-+ /* Done. */
-+ return e_flags;
-+ }
-+ }
-+
-+ /* From 1.0 to 2.0. */
-+ e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
-+
-+ /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
-+ e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
-+
-+ /* Invert E_NDS32_HAS_NO_MAC_INST. */
-+ e_flags ^= E_NDS32_HAS_NO_MAC_INST;
-+ return e_flags;
-+}
-+
-+static bfd_boolean
-+nds32_check_vec_size (bfd *ibfd)
-+{
-+ static unsigned int nds32_vec_size = 0;
-+
-+ asection *sec_t = NULL;
-+ bfd_byte *contents = NULL;
-+
-+ sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
-+
-+ if (sec_t && sec_t->size >= 4)
-+ {
-+ /* Get vec_size in file. */
-+ unsigned int flag_t;
-+
-+ nds32_get_section_contents (ibfd, sec_t, &contents, TRUE);
-+ flag_t = bfd_get_32 (ibfd, contents);
-+
-+ /* The value could only be 4 or 16. */
-+
-+ if (!nds32_vec_size)
-+ /* Set if not set yet. */
-+ nds32_vec_size = (flag_t & 0x3);
-+ else if (nds32_vec_size != (flag_t & 0x3))
-+ {
-+ (*_bfd_error_handler) (_("%B: ISR vector size mismatch"
-+ " with previous modules, previous %u-byte, current %u-byte"),
-+ ibfd,
-+ nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
-+ (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
-+ return FALSE;
-+ }
-+ else
-+ /* Only keep the first vec_size section. */
-+ sec_t->flags |= SEC_EXCLUDE;
-+ }
-+
-+ return TRUE;
-+}
-+
-+/* Merge backend specific data from an object file to the output
-+ object file when linking. */
-+
-+static bfd_boolean
-+nds32_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
-+{
-+ flagword out_flags;
-+ flagword in_flags;
-+ flagword out_16regs;
-+ flagword in_no_mac;
-+ flagword out_no_mac;
-+ flagword in_16regs;
-+ flagword out_version;
-+ flagword in_version;
-+ flagword out_fpu_config;
-+ flagword in_fpu_config;
-+
-+ /* TODO: Revise to use object-attributes instead. */
-+ if (!nds32_check_vec_size (ibfd))
-+ return FALSE;
-+
-+ if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
-+ || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
-+ return TRUE;
-+
-+ if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
-+ {
-+ (*_bfd_error_handler)
-+ (_("%B: warning: Endian mismatch with previous modules."), ibfd);
-+
-+ bfd_set_error (bfd_error_bad_value);
-+ return FALSE;
-+ }
-+
-+ /* [Bug 11585] [Ticket 7067] -B option in objcopy cannot work as expected.
-+ e_flags = 0 shall be treat as generic one.
-+ no checking, and no merging.
-+ */
-+ if (elf_elfheader (ibfd)->e_flags)
-+ {
-+ in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
-+ if (in_version == E_NDS32_ELF_VER_1_2)
-+ {
-+ (*_bfd_error_handler)
-+ (_("%B: warning: Older version of object file encountered, "
-+ "Please recompile with current tool chain."), ibfd);
-+ }
-+
-+ /* We may need to merge V1 and V2 arch object files to V2. */
-+ if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
-+ != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
-+ {
-+ /* Need to convert version. */
-+ if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
-+ == E_NDS_ARCH_STAR_RESERVED)
-+ {
-+ elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
-+ }
-+ else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH)
-+ == E_NDS_ARCH_STAR_V0_9
-+ || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
-+ > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
-+ {
-+ elf_elfheader (obfd)->e_flags =
-+ convert_e_flags (elf_elfheader (obfd)->e_flags,
-+ (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
-+ }
-+ else
-+ {
-+ elf_elfheader (ibfd)->e_flags =
-+ convert_e_flags (elf_elfheader (ibfd)->e_flags,
-+ (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
-+ }
-+ }
-+
-+ /* Extract some flags. */
-+ in_flags = elf_elfheader (ibfd)->e_flags
-+ & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
-+ | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
-+
-+ /* The following flags need special treatment. */
-+ in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
-+ in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
-+ in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
-+
-+ /* Extract some flags. */
-+ out_flags = elf_elfheader (obfd)->e_flags
-+ & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
-+ | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
-+
-+ /* The following flags need special treatment. */
-+ out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
-+ out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
-+ out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
-+ out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
-+ if (!elf_flags_init (obfd))
-+ {
-+ /* If the input is the default architecture then do not
-+ bother setting the flags for the output architecture,
-+ instead allow future merges to do this. If no future
-+ merges ever set these flags then they will retain their
-+ unitialised values, which surprise surprise, correspond
-+ to the default values. */
-+ if (bfd_get_arch_info (ibfd)->the_default)
-+ return TRUE;
-+
-+ elf_flags_init (obfd) = TRUE;
-+ elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
-+
-+ if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
-+ && bfd_get_arch_info (obfd)->the_default)
-+ {
-+ return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
-+ bfd_get_mach (ibfd));
-+ }
-+
-+ return TRUE;
-+ }
-+
-+ /* Check flag compatibility. */
-+ if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
-+ {
-+ (*_bfd_error_handler)
-+ (_("%B: error: ABI mismatch with previous modules."), ibfd);
-+
-+ bfd_set_error (bfd_error_bad_value);
-+ return FALSE;
-+ }
-+
-+ if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
-+ {
-+ if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
-+ {
-+ (*_bfd_error_handler)
-+ (_("%B: error: Instruction set mismatch with previous modules."), ibfd);
-+
-+ bfd_set_error (bfd_error_bad_value);
-+ return FALSE;
-+ }
-+ }
-+
-+ /* When linking with V1.2 and V1.3 objects together the output is V1.2.
-+ and perf ext1 and DIV are mergerd to perf ext1. */
-+ if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
-+ {
-+ elf_elfheader (obfd)->e_flags =
-+ (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
-+ | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
-+ | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
-+ ? E_NDS32_HAS_EXT_INST : 0)
-+ | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
-+ ? E_NDS32_HAS_EXT_INST : 0)
-+ | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
-+ | ((in_version > out_version) ? out_version : in_version);
-+ }
-+ else
-+ {
-+ if (in_version != out_version)
-+ (*_bfd_error_handler) (
-+ _("%B: warning: Incompatible elf-versions %s and %s."), ibfd,
-+ nds32_elfver_strtab[out_version],
-+ nds32_elfver_strtab[in_version]);
-+
-+ elf_elfheader (obfd)->e_flags = in_flags | out_flags
-+ | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
-+ | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
-+ | (in_version > out_version ? out_version : in_version);
-+ }
-+ }
-+ return TRUE;
-+}
-+
-+/* Display the flags field. */
-+
-+static bfd_boolean
-+nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
-+{
-+ FILE *file = (FILE *) ptr;
-+
-+ BFD_ASSERT (abfd != NULL && ptr != NULL);
-+
-+ _bfd_elf_print_private_bfd_data (abfd, ptr);
-+
-+ fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
-+
-+ switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
-+ {
-+ default:
-+ case E_N1_ARCH:
-+ fprintf (file, _(": n1 instructions"));
-+ break;
-+ case E_N1H_ARCH:
-+ fprintf (file, _(": n1h instructions"));
-+ break;
-+ }
-+
-+ fputc ('\n', file);
-+
-+ return TRUE;
-+}
-+
-+static unsigned int
-+nds32_elf_action_discarded (asection *sec)
-+{
-+
-+ if (strncmp
-+ (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
-+ return 0;
-+
-+ return _bfd_elf_default_action_discarded (sec);
-+}
-+
-+static asection *
-+nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
-+ Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
-+ Elf_Internal_Sym *sym)
-+{
-+ if (h != NULL)
-+ switch (ELF32_R_TYPE (rel->r_info))
-+ {
-+ case R_NDS32_GNU_VTINHERIT:
-+ case R_NDS32_GNU_VTENTRY:
-+ case R_NDS32_RELA_GNU_VTINHERIT:
-+ case R_NDS32_RELA_GNU_VTENTRY:
-+ return NULL;
-+ }
-+
-+ return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
-+}
-+
-+static bfd_boolean
-+nds32_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info, asection *sec,
-+ const Elf_Internal_Rela *relocs)
-+{
-+ /* Update the got entry reference counts for the section being removed. */
-+ Elf_Internal_Shdr *symtab_hdr;
-+ struct elf_link_hash_entry **sym_hashes;
-+ bfd_signed_vma *local_got_refcounts;
-+ const Elf_Internal_Rela *rel, *relend;
-+
-+ elf_section_data (sec)->local_dynrel = NULL;
-+
-+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
-+ sym_hashes = elf_sym_hashes (abfd);
-+ local_got_refcounts = elf_local_got_refcounts (abfd);
-+
-+ relend = relocs + sec->reloc_count;
-+ for (rel = relocs; rel < relend; rel++)
-+ {
-+ unsigned long r_symndx;
-+ struct elf_link_hash_entry *h = NULL;
-+
-+ r_symndx = ELF32_R_SYM (rel->r_info);
-+ if (r_symndx >= symtab_hdr->sh_info)
-+ {
-+ /* External symbol. */
-+ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
-+ while (h->root.type == bfd_link_hash_indirect
-+ || h->root.type == bfd_link_hash_warning)
-+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
-+ }
-+
-+ switch (ELF32_R_TYPE (rel->r_info))
-+ {
-+ case R_NDS32_GOT_HI20:
-+ case R_NDS32_GOT_LO12:
-+ case R_NDS32_GOT_LO15:
-+ case R_NDS32_GOT_LO19:
-+ case R_NDS32_GOT17S2_RELA:
-+ case R_NDS32_GOT15S2_RELA:
-+ case R_NDS32_GOTOFF:
-+ case R_NDS32_GOTOFF_HI20:
-+ case R_NDS32_GOTOFF_LO12:
-+ case R_NDS32_GOTOFF_LO15:
-+ case R_NDS32_GOTOFF_LO19:
-+ case R_NDS32_GOT20:
-+ case R_NDS32_GOTPC_HI20:
-+ case R_NDS32_GOTPC_LO12:
-+ case R_NDS32_GOTPC20:
-+ if (h != NULL)
-+ {
-+ if (h->got.refcount > 0)
-+ h->got.refcount--;
-+ }
-+ else
-+ {
-+ if (local_got_refcounts && local_got_refcounts[r_symndx] > 0)
-+ local_got_refcounts[r_symndx]--;
-+ }
-+ break;
-+
-+ case R_NDS32_16_RELA:
-+ case R_NDS32_20_RELA:
-+ case R_NDS32_5_RELA:
-+ case R_NDS32_32_RELA:
-+ case R_NDS32_HI20_RELA:
-+ case R_NDS32_LO12S3_RELA:
-+ case R_NDS32_LO12S2_RELA:
-+ case R_NDS32_LO12S2_DP_RELA:
-+ case R_NDS32_LO12S2_SP_RELA:
-+ case R_NDS32_LO12S1_RELA:
-+ case R_NDS32_LO12S0_RELA:
-+ case R_NDS32_LO12S0_ORI_RELA:
-+ case R_NDS32_SDA16S3_RELA:
-+ case R_NDS32_SDA17S2_RELA:
-+ case R_NDS32_SDA18S1_RELA:
-+ case R_NDS32_SDA19S0_RELA:
-+ case R_NDS32_SDA15S3_RELA:
-+ case R_NDS32_SDA15S2_RELA:
-+ case R_NDS32_SDA12S2_DP_RELA:
-+ case R_NDS32_SDA12S2_SP_RELA:
-+ case R_NDS32_SDA15S1_RELA:
-+ case R_NDS32_SDA15S0_RELA:
-+ case R_NDS32_SDA_FP7U2_RELA:
-+ case R_NDS32_15_PCREL_RELA:
-+ case R_NDS32_17_PCREL_RELA:
-+ case R_NDS32_25_PCREL_RELA:
-+ if (h != NULL)
-+ {
-+ struct elf_nds32_link_hash_entry *eh;
-+ struct elf_nds32_dyn_relocs **pp;
-+ struct elf_nds32_dyn_relocs *p;
-+
-+ if (!info->shared && h->plt.refcount > 0)
-+ h->plt.refcount -= 1;
-+
-+ eh = (struct elf_nds32_link_hash_entry *) h;
-+
-+ for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
-+ if (p->sec == sec)
-+ {
-+ if (ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
-+ || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA
-+ || ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA)
-+ p->pc_count -= 1;
-+ p->count -= 1;
-+ if (p->count == 0)
-+ *pp = p->next;
-+ break;
-+ }
-+ }
-+ break;
-+
-+ case R_NDS32_9_PLTREL:
-+ case R_NDS32_25_PLTREL:
-+ if (h != NULL)
-+ {
-+ if (h->plt.refcount > 0)
-+ h->plt.refcount--;
-+ }
-+ break;
-+
-+ default:
-+ break;
-+ }
-+ }
-+
-+ return TRUE;
-+}
-+
-+static enum elf_nds32_tls_type
-+get_tls_type (enum elf_nds32_reloc_type r_type,
-+ struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
-+{
-+ enum elf_nds32_tls_type tls_type;
-+ switch (r_type)
-+ {
-+ case R_NDS32_TLS_LE_HI20:
-+ case R_NDS32_TLS_LE_LO12:
-+ tls_type = GOT_TLS_LE;
-+ break;
-+ case R_NDS32_TLS_IE_HI20:
-+ case R_NDS32_TLS_IE_LO12S2:
-+ case R_NDS32_TLS_IE_LO12:
-+ tls_type = GOT_TLS_IE;
-+ break;
-+ case R_NDS32_TLS_IEGP_HI20:
-+ case R_NDS32_TLS_IEGP_LO12:
-+ case R_NDS32_TLS_IEGP_LO12S2:
-+ tls_type = GOT_TLS_IEGP;
-+ break;
-+ case R_NDS32_TLS_DESC_HI20:
-+ case R_NDS32_TLS_DESC_LO12:
-+ case R_NDS32_TLS_DESC_ADD:
-+ case R_NDS32_TLS_DESC_FUNC:
-+ case R_NDS32_TLS_DESC_CALL:
-+ tls_type = GOT_TLS_DESC;
-+ break;
-+ default:
-+ tls_type = GOT_NORMAL;
-+ break;
-+ }
-+ return tls_type;
-+}
-+
-+/* Ensure that we have allocated bookkeeping structures for ABFD's local
-+ symbols. */
-+
-+static bfd_boolean
-+elf32_nds32_allocate_local_sym_info (bfd *abfd)
-+{
-+ if (elf_local_got_refcounts (abfd) == NULL)
-+ {
-+ bfd_size_type num_syms;
-+ bfd_size_type size;
-+ char *data;
-+
-+ num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
-+ /* This space is for got_refcounts, got_tls_type, tlsdesc_gotent, and
-+ gp_offset. The details can refer to struct elf_nds32_obj_tdata. */
-+ size = num_syms * (sizeof (bfd_signed_vma) + sizeof (char)
-+ + sizeof (bfd_vma) + sizeof (int)
-+ + sizeof (bfd_boolean) + sizeof (bfd_vma));
-+ data = bfd_zalloc (abfd, size);
-+ if (data == NULL)
-+ return FALSE;
-+
-+ elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
-+ data += num_syms * sizeof (bfd_signed_vma);
-+
-+ elf32_nds32_local_got_tls_type (abfd) = (char *) data;
-+ data += num_syms * sizeof (char);
-+
-+ elf32_nds32_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
-+ data += num_syms * sizeof (bfd_vma);
-+
-+ elf32_nds32_local_gp_offset (abfd) = (int *) data;
-+ data += num_syms * sizeof (int);
-+ }
-+
-+ return TRUE;
-+}
-+
-+/* Look through the relocs for a section during the first phase.
-+ Since we don't do .gots or .plts, we just need to consider the
-+ virtual table relocs for gc. */
-+
-+static bfd_boolean
-+nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
-+ asection *sec, const Elf_Internal_Rela *relocs)
-+{
-+ Elf_Internal_Shdr *symtab_hdr;
-+ struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
-+ const Elf_Internal_Rela *rel;
-+ const Elf_Internal_Rela *rel_end;
-+ struct elf_link_hash_table *ehtab;
-+ struct elf_nds32_link_hash_table *htab;
-+ bfd *dynobj;
-+ asection *sreloc = NULL;
-+
-+ /* No need for relocation if relocatable already. */
-+ if (info->relocatable)
-+ {
-+ elf32_nds32_check_relax_group (abfd, sec);
-+ return TRUE;
-+ }
-+
-+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
-+ sym_hashes = elf_sym_hashes (abfd);
-+ sym_hashes_end =
-+ sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
-+ if (!elf_bad_symtab (abfd))
-+ sym_hashes_end -= symtab_hdr->sh_info;
-+
-+ ehtab = elf_hash_table (info);
-+ htab = nds32_elf_hash_table (info);
-+ dynobj = htab->root.dynobj;
-+
-+ rel_end = relocs + sec->reloc_count;
-+ for (rel = relocs; rel < rel_end; rel++)
-+ {
-+ enum elf_nds32_reloc_type r_type;
-+ struct elf_link_hash_entry *h;
-+ unsigned long r_symndx;
-+ enum elf_nds32_tls_type tls_type, old_tls_type;
-+ struct elf_nds32_ict_hash_entry *entry;
-+
-+ r_symndx = ELF32_R_SYM (rel->r_info);
-+ r_type = ELF32_R_TYPE (rel->r_info);
-+ if (r_symndx < symtab_hdr->sh_info)
-+ h = NULL;
-+ else
-+ {
-+ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
-+ while (h->root.type == bfd_link_hash_indirect
-+ || h->root.type == bfd_link_hash_warning)
-+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
-+ }
-+
-+ /* create .got section if necessary
-+ Some relocs require a global offset table. We create
-+ got section here, since these relocation need a got section
-+ and if it is not created yet. */
-+ if (ehtab->sgot == NULL)
-+ {
-+ switch (r_type)
-+ {
-+ case R_NDS32_GOT_HI20:
-+ case R_NDS32_GOT_LO12:
-+ case R_NDS32_GOT_LO15:
-+ case R_NDS32_GOT_LO19:
-+ case R_NDS32_GOT17S2_RELA:
-+ case R_NDS32_GOT15S2_RELA:
-+ case R_NDS32_GOTOFF:
-+ case R_NDS32_GOTOFF_HI20:
-+ case R_NDS32_GOTOFF_LO12:
-+ case R_NDS32_GOTOFF_LO15:
-+ case R_NDS32_GOTOFF_LO19:
-+ case R_NDS32_GOTPC20:
-+ case R_NDS32_GOTPC_HI20:
-+ case R_NDS32_GOTPC_LO12:
-+ case R_NDS32_GOT20:
-+ case R_NDS32_TLS_IE_HI20:
-+ case R_NDS32_TLS_IE_LO12:
-+ case R_NDS32_TLS_IE_LO12S2:
-+ case R_NDS32_TLS_IEGP_HI20:
-+ case R_NDS32_TLS_IEGP_LO12:
-+ case R_NDS32_TLS_IEGP_LO12S2:
-+ case R_NDS32_TLS_DESC_HI20:
-+ case R_NDS32_TLS_DESC_LO12:
-+ if (dynobj == NULL)
-+ htab->root.dynobj = dynobj = abfd;
-+ if (!create_got_section (dynobj, info))
-+ return FALSE;
-+ break;
-+
-+ default:
-+ break;
-+ }
-+ }
-+
-+ /* Check relocation type. */
-+ switch ((int) r_type)
-+ {
-+ case R_NDS32_TLS_LE_HI20:
-+ case R_NDS32_TLS_LE_LO12:
-+ case R_NDS32_GOT_HI20:
-+ case R_NDS32_GOT_LO12:
-+ case R_NDS32_GOT_LO15:
-+ case R_NDS32_GOT_LO19:
-+ case R_NDS32_GOT20:
-+ case R_NDS32_TLS_IE_HI20:
-+ case R_NDS32_TLS_IE_LO12:
-+ case R_NDS32_TLS_IE_LO12S2:
-+ case R_NDS32_TLS_IEGP_HI20:
-+ case R_NDS32_TLS_IEGP_LO12:
-+ case R_NDS32_TLS_IEGP_LO12S2:
-+ case R_NDS32_TLS_DESC_HI20:
-+ case R_NDS32_TLS_DESC_LO12:
-+ tls_type = get_tls_type (r_type, h);
-+ if (h)
-+ {
-+ if (tls_type != GOT_TLS_LE)
-+ h->got.refcount += 1;
-+ old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
-+ }
-+ else
-+ {
-+ /* This is a global offset table entry for a local symbol. */
-+ if (!elf32_nds32_allocate_local_sym_info (abfd))
-+ return FALSE;
-+
-+ BFD_ASSERT (r_symndx < symtab_hdr->sh_info);
-+ if (tls_type != GOT_TLS_LE)
-+ elf_local_got_refcounts (abfd)[r_symndx] += 1;
-+ old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
-+ }
-+
-+ /* We would already issued an error message if there
-+ is a TLS/non-TLS mismatch, based on the symbol
-+ type. So just combine any TLS types needed. */
-+ if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
-+ && tls_type != GOT_NORMAL)
-+ tls_type |= old_tls_type;
-+
-+ /* DESC to IE/IEGP if link to executable */
-+ if ((tls_type & GOT_TLS_DESC) && (info->executable))
-+ tls_type |= (info->pie ? GOT_TLS_IEGP : GOT_TLS_IE);
-+
-+ if (old_tls_type != tls_type)
-+ {
-+ if (h != NULL)
-+ elf32_nds32_hash_entry (h)->tls_type = tls_type;
-+ else
-+ elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
-+ }
-+ break;
-+
-+ case R_NDS32_9_PLTREL:
-+ case R_NDS32_25_PLTREL:
-+ case R_NDS32_PLTREL_HI20:
-+ case R_NDS32_PLTREL_LO12:
-+ case R_NDS32_PLT_GOTREL_HI20:
-+ case R_NDS32_PLT_GOTREL_LO12:
-+ case R_NDS32_PLT_GOTREL_LO15:
-+ case R_NDS32_PLT_GOTREL_LO19:
-+ case R_NDS32_PLT_GOTREL_LO20:
-+ /* This symbol requires a procedure linkage table entry.
-+ We actually build the entry in adjust_dynamic_symbol,
-+ because this might be a case of linking PIC code without
-+ linking in any dynamic objects, in which case we don't
-+ need to generate a procedure linkage table after all. */
-+
-+ /* If this is a local symbol, we resolve it directly without
-+ creating a procedure linkage table entry. */
-+ /* explain: continue v.s. break here following: */
-+ if (h == NULL)
-+ continue;
-+
-+ if (h->forced_local
-+ || (info->pie && h->def_regular))
-+ break;
-+
-+ elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
-+ h->needs_plt = 1;
-+ h->plt.refcount += 1;
-+ break;
-+
-+ case R_NDS32_16_RELA:
-+ case R_NDS32_20_RELA:
-+ case R_NDS32_5_RELA:
-+ case R_NDS32_32_RELA:
-+ case R_NDS32_HI20_RELA:
-+ case R_NDS32_LO12S3_RELA:
-+ case R_NDS32_LO12S2_RELA:
-+ case R_NDS32_LO12S2_DP_RELA:
-+ case R_NDS32_LO12S2_SP_RELA:
-+ case R_NDS32_LO12S1_RELA:
-+ case R_NDS32_LO12S0_RELA:
-+ case R_NDS32_LO12S0_ORI_RELA:
-+ case R_NDS32_SDA16S3_RELA:
-+ case R_NDS32_SDA17S2_RELA:
-+ case R_NDS32_SDA18S1_RELA:
-+ case R_NDS32_SDA19S0_RELA:
-+ case R_NDS32_SDA15S3_RELA:
-+ case R_NDS32_SDA15S2_RELA:
-+ case R_NDS32_SDA12S2_DP_RELA:
-+ case R_NDS32_SDA12S2_SP_RELA:
-+ case R_NDS32_SDA15S1_RELA:
-+ case R_NDS32_SDA15S0_RELA:
-+ case R_NDS32_SDA_FP7U2_RELA:
-+ case R_NDS32_15_PCREL_RELA:
-+ case R_NDS32_17_PCREL_RELA:
-+ case R_NDS32_25_PCREL_RELA:
-+
-+ if (h != NULL && !info->shared)
-+ {
-+ h->non_got_ref = 1;
-+ h->plt.refcount += 1;
-+ }
-+
-+ /* If we are creating a shared library, and this is a reloc against
-+ a global symbol, or a non PC relative reloc against a local
-+ symbol, then we need to copy the reloc into the shared library.
-+ However, if we are linking with -Bsymbolic, we do not need to
-+ copy a reloc against a global symbol which is defined in an
-+ object we are including in the link (i.e., DEF_REGULAR is set).
-+ At this point we have not seen all the input files, so it is
-+ possible that DEF_REGULAR is not set now but will be set later
-+ (it is never cleared). We account for that possibility below by
-+ storing information in the dyn_relocs field of the hash table
-+ entry. A similar situation occurs when creating shared libraries
-+ and symbol visibility changes render the symbol local.
-+
-+ If on the other hand, we are creating an executable, we may need
-+ to keep relocations for symbols satisfied by a dynamic library
-+ if we manage to avoid copy relocs for the symbol. */
-+ if ((info->shared
-+ && (sec->flags & SEC_ALLOC) != 0
-+ && ((r_type != R_NDS32_25_PCREL_RELA
-+ && r_type != R_NDS32_15_PCREL_RELA
-+ && r_type != R_NDS32_17_PCREL_RELA
-+ && !(r_type == R_NDS32_32_RELA
-+ && strcmp (sec->name, ".eh_frame") == 0))
-+ || (h != NULL
-+ && (!info->symbolic
-+ || h->root.type == bfd_link_hash_defweak
-+ || !h->def_regular))))
-+ || (!info->shared
-+ && (sec->flags & SEC_ALLOC) != 0
-+ && h != NULL
-+ && (h->root.type == bfd_link_hash_defweak
-+ || !h->def_regular)))
-+ {
-+ struct elf_nds32_dyn_relocs *p;
-+ struct elf_nds32_dyn_relocs **head;
-+
-+ if (dynobj == NULL)
-+ htab->root.dynobj = dynobj = abfd;
-+
-+ /* When creating a shared object, we must copy these
-+ relocs into the output file. We create a reloc
-+ section in dynobj and make room for the reloc. */
-+ if (sreloc == NULL)
-+ {
-+ const char *name;
-+
-+ name = bfd_elf_string_from_elf_section
-+ (abfd, elf_elfheader (abfd)->e_shstrndx,
-+ elf_section_data (sec)->rela.hdr->sh_name);
-+ if (name == NULL)
-+ return FALSE;
-+
-+ BFD_ASSERT (strncmp (name, ".rela", 5) == 0
-+ && strcmp (bfd_get_section_name (abfd, sec),
-+ name + 5) == 0);
-+
-+ sreloc = bfd_get_section_by_name (dynobj, name);
-+ if (sreloc == NULL)
-+ {
-+ flagword flags;
-+
-+ sreloc = bfd_make_section (dynobj, name);
-+ flags = (SEC_HAS_CONTENTS | SEC_READONLY
-+ | SEC_IN_MEMORY | SEC_LINKER_CREATED);
-+ if ((sec->flags & SEC_ALLOC) != 0)
-+ flags |= SEC_ALLOC | SEC_LOAD;
-+ if (sreloc == NULL
-+ || !bfd_set_section_flags (dynobj, sreloc, flags)
-+ || !bfd_set_section_alignment (dynobj, sreloc, 2))
-+ return FALSE;
-+
-+ elf_section_type (sreloc) = SHT_RELA;
-+ }
-+ elf_section_data (sec)->sreloc = sreloc;
-+ }
-+
-+ /* If this is a global symbol, we count the number of
-+ relocations we need for this symbol. */
-+ if (h != NULL)
-+ head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
-+ else
-+ {
-+ asection *s;
-+
-+ Elf_Internal_Sym *isym;
-+ isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
-+ if (isym == NULL)
-+ return FALSE;
-+
-+ /* Track dynamic relocs needed for local syms too. */
-+ s = bfd_section_from_elf_index (abfd, isym->st_shndx);
-+ if (s == NULL)
-+ return FALSE;
-+
-+ head = ((struct elf_nds32_dyn_relocs **)
-+ &elf_section_data (s)->local_dynrel);
-+ }
-+
-+ p = *head;
-+ if (p == NULL || p->sec != sec)
-+ {
-+ bfd_size_type amt = sizeof (*p);
-+ p = (struct elf_nds32_dyn_relocs *) bfd_alloc (dynobj, amt);
-+ if (p == NULL)
-+ return FALSE;
-+ p->next = *head;
-+ *head = p;
-+ p->sec = sec;
-+ p->count = 0;
-+ p->pc_count = 0;
-+ }
-+
-+ p->count += 1;
-+ if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
-+ || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
-+ || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
-+ p->pc_count += 1;
-+ }
-+ break;
-+
-+ /* Merge jump-patch table symbol here. */
-+ case R_NDS32_ICT_HI20:
-+ case R_NDS32_ICT_LO12:
-+ case R_NDS32_ICT_25PC:
-+ if (rel->r_addend != 0)
-+ {
-+ (*_bfd_error_handler)
-+ (_("%B %s: Error: Rom-patch relocation offset: 0x%lx "
-+ "with addend 0x%lx\n"),
-+ abfd, sec->name, rel->r_offset, rel->r_addend);
-+ bfd_set_error (bfd_error_bad_value);
-+ return FALSE;
-+ }
-+
-+ if (h)
-+ {
-+ elf32_nds32_hash_entry (h)->indirect_call = TRUE;
-+ entry = (struct elf_nds32_ict_hash_entry *)
-+ bfd_hash_lookup (&indirect_call_table, h->root.root.string,
-+ TRUE, TRUE);
-+ entry->h = h;
-+ if (entry == NULL)
-+ {
-+ (*_bfd_error_handler)
-+ (_("%B: failed creating indirect call %s hash table\n"),
-+ abfd, h->root.root.string);
-+ bfd_set_error (bfd_error_bad_value);
-+ return FALSE;
-+ }
-+ }
-+ else
-+ {
-+ /* Rom-patch functions cannot be local. */
-+ (*_bfd_error_handler)
-+ (_("%B: indirect call relocation with local symbol.\n"), abfd);
-+ bfd_set_error (bfd_error_bad_value);
-+ return FALSE;
-+ }
-+ break;
-+
-+ /* This relocation describes the C++ object vtable hierarchy.
-+ Reconstruct it for later use during GC. */
-+ case R_NDS32_RELA_GNU_VTINHERIT:
-+ case R_NDS32_GNU_VTINHERIT:
-+ if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
-+ return FALSE;
-+ break;
-+
-+ /* This relocation describes which C++ vtable entries are actually
-+ used. Record for later use during GC. */
-+ case R_NDS32_GNU_VTENTRY:
-+ if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
-+ return FALSE;
-+ break;
-+ case R_NDS32_RELA_GNU_VTENTRY:
-+ if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
-+ return FALSE;
-+ break;
-+ }
-+ }
-+
-+ return TRUE;
-+}
-+
-+/* Write VAL in uleb128 format to P, returning a pointer to the
-+ following byte.
-+ This code is copied from elf-attr.c. */
-+
-+static bfd_byte *
-+write_uleb128 (bfd_byte *p, unsigned int val)
-+{
-+ bfd_byte c;
-+ do
-+ {
-+ c = val & 0x7f;
-+ val >>= 7;
-+ if (val)
-+ c |= 0x80;
-+ *(p++) = c;
-+ }
-+ while (val);
-+ return p;
-+}
-+
-+static bfd_signed_vma
-+calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
-+{
-+ bfd_signed_vma foff;
-+ bfd_vma symval, addend;
-+ asection *sym_sec;
-+
-+ /* Get the value of the symbol referred to by the reloc. */
-+ if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
-+ {
-+ Elf_Internal_Sym *isym;
-+
-+ /* A local symbol. */
-+ isym = isymbuf + ELF32_R_SYM (irel->r_info);
-+
-+ if (isym->st_shndx == SHN_UNDEF)
-+ sym_sec = bfd_und_section_ptr;
-+ else if (isym->st_shndx == SHN_ABS)
-+ sym_sec = bfd_abs_section_ptr;
-+ else if (isym->st_shndx == SHN_COMMON)
-+ sym_sec = bfd_com_section_ptr;
-+ else
-+ sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
-+ symval = isym->st_value + sym_sec->output_section->vma
-+ + sym_sec->output_offset;
-+ }
-+ else
-+ {
-+ unsigned long indx;
-+ struct elf_link_hash_entry *h;
-+
-+ /* An external symbol. */
-+ indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
-+ h = elf_sym_hashes (abfd)[indx];
-+ BFD_ASSERT (h != NULL);
-+
-+ if (h->root.type != bfd_link_hash_defined
-+ && h->root.type != bfd_link_hash_defweak)
-+ /* This appears to be a reference to an undefined
-+ symbol. Just ignore it--it will be caught by the
-+ regular reloc processing. */
-+ return 0;
-+
-+ if (h->root.u.def.section->flags & SEC_MERGE)
-+ {
-+ sym_sec = h->root.u.def.section;
-+ symval = _bfd_merged_section_offset (abfd, &sym_sec,
-+ elf_section_data (sym_sec)->sec_info,
-+ h->root.u.def.value);
-+ symval = symval + sym_sec->output_section->vma
-+ + sym_sec->output_offset;
-+ }
-+ else
-+ symval = (h->root.u.def.value
-+ + h->root.u.def.section->output_section->vma
-+ + h->root.u.def.section->output_offset);
-+ }
-+
-+ addend = irel->r_addend;
-+
-+ foff = (symval + addend
-+ - (irel->r_offset + sec->output_section->vma + sec->output_offset));
-+ return foff;
-+}
-+
-+static bfd_vma
-+calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
-+ Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Rela *irel,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ bfd_vma symval;
-+
-+ if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
-+ {
-+ Elf_Internal_Sym *isym;
-+ asection *sym_sec;
-+ /* A local symbol. */
-+ isym = isymbuf + ELF32_R_SYM (irel->r_info);
-+
-+ if (isym->st_shndx == SHN_UNDEF)
-+ sym_sec = bfd_und_section_ptr;
-+ else if (isym->st_shndx == SHN_ABS)
-+ sym_sec = bfd_abs_section_ptr;
-+ else if (isym->st_shndx == SHN_COMMON)
-+ sym_sec = bfd_com_section_ptr;
-+ else
-+ sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
-+ symval = isym->st_value + sym_sec->output_section->vma
-+ + sym_sec->output_offset;
-+ }
-+ else
-+ {
-+ unsigned long indx;
-+ struct elf_link_hash_entry *h;
-+ struct elf_link_hash_table *ehtab;
-+ asection *splt;
-+
-+ /* An external symbol. */
-+ indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
-+ h = elf_sym_hashes (abfd)[indx];
-+ BFD_ASSERT (h != NULL);
-+ ehtab = elf_hash_table (link_info);
-+ splt = ehtab->splt;
-+
-+ while (h->root.type == bfd_link_hash_indirect
-+ || h->root.type == bfd_link_hash_warning)
-+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
-+
-+ if (h->plt.offset == (bfd_vma) - 1)
-+ {
-+ if (h->root.type != bfd_link_hash_defined
-+ && h->root.type != bfd_link_hash_defweak)
-+ /* This appears to be a reference to an undefined
-+ symbol. Just ignore it--it will be caught by the
-+ regular reloc processing. */
-+ return 0;
-+ symval = (h->root.u.def.value
-+ + h->root.u.def.section->output_section->vma
-+ + h->root.u.def.section->output_offset);
-+ }
-+ else
-+ symval = splt->output_section->vma + h->plt.offset;
-+ }
-+
-+ return symval;
-+}
-+
-+static bfd_signed_vma
-+calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
-+ Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ bfd_vma foff;
-+ if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
-+ symtab_hdr)) == 0)
-+ return 0;
-+ else
-+ return foff - (irel->r_offset
-+ + sec->output_section->vma + sec->output_offset);
-+}
-+
-+/* Convert a 32-bit instruction to 16-bit one.
-+ INSN is the input 32-bit instruction, INSN16 is the output 16-bit
-+ instruction. If INSN_TYPE is not NULL, it the CGEN instruction
-+ type of INSN16. Return 1 if successful. */
-+
-+static int
-+nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
-+ int *pinsn_type)
-+{
-+ uint16_t insn16 = 0;
-+ int insn_type;
-+ unsigned long mach = bfd_get_mach (abfd);
-+
-+ if (N32_SH5 (insn) != 0)
-+ return 0;
-+
-+ switch (N32_SUB5 (insn))
-+ {
-+ case N32_ALU1_ADD_SLLI:
-+ case N32_ALU1_ADD_SRLI:
-+ if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
-+ {
-+ insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
-+ N32_RB5 (insn));
-+ insn_type = NDS32_INSN_ADD333;
-+ }
-+ else if (N32_IS_RT4 (insn))
-+ {
-+ if (N32_RT5 (insn) == N32_RA5 (insn))
-+ insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
-+ else if (N32_RT5 (insn) == N32_RB5 (insn))
-+ insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
-+ insn_type = NDS32_INSN_ADD45;
-+ }
-+ break;
-+
-+ case N32_ALU1_SUB_SLLI:
-+ case N32_ALU1_SUB_SRLI:
-+ if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
-+ {
-+ insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
-+ N32_RB5 (insn));
-+ insn_type = NDS32_INSN_SUB333;
-+ }
-+ else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
-+ {
-+ insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
-+ insn_type = NDS32_INSN_SUB45;
-+ }
-+ break;
-+
-+ case N32_ALU1_AND_SLLI:
-+ case N32_ALU1_AND_SRLI:
-+ /* and $rt, $rt, $rb -> and33 for v3, v3m. */
-+ if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
-+ && N32_IS_RB3 (insn))
-+ {
-+ if (N32_RT5 (insn) == N32_RA5 (insn))
-+ insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
-+ else if (N32_RT5 (insn) == N32_RB5 (insn))
-+ insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
-+ if (insn16)
-+ insn_type = NDS32_INSN_AND33;
-+ }
-+ break;
-+
-+ case N32_ALU1_XOR_SLLI:
-+ case N32_ALU1_XOR_SRLI:
-+ /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
-+ if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
-+ && N32_IS_RB3 (insn))
-+ {
-+ if (N32_RT5 (insn) == N32_RA5 (insn))
-+ insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
-+ else if (N32_RT5 (insn) == N32_RB5 (insn))
-+ insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
-+ if (insn16)
-+ insn_type = NDS32_INSN_XOR33;
-+ }
-+ break;
-+
-+ case N32_ALU1_OR_SLLI:
-+ case N32_ALU1_OR_SRLI:
-+ /* or $rt, $rt, $rb -> or33 for v3, v3m. */
-+ if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
-+ && N32_IS_RB3 (insn))
-+ {
-+ if (N32_RT5 (insn) == N32_RA5 (insn))
-+ insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
-+ else if (N32_RT5 (insn) == N32_RB5 (insn))
-+ insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
-+ if (insn16)
-+ insn_type = NDS32_INSN_OR33;
-+ }
-+ break;
-+ case N32_ALU1_NOR:
-+ /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
-+ if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
-+ && N32_RA5 (insn) == N32_RB5 (insn))
-+ {
-+ insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
-+ insn_type = NDS32_INSN_NOT33;
-+ }
-+ break;
-+ case N32_ALU1_SRAI:
-+ if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
-+ {
-+ insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
-+ insn_type = NDS32_INSN_SRAI45;
-+ }
-+ break;
-+
-+ case N32_ALU1_SRLI:
-+ if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
-+ {
-+ insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
-+ insn_type = NDS32_INSN_SRLI45;
-+ }
-+ break;
-+
-+ case N32_ALU1_SLLI:
-+ if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
-+ {
-+ insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
-+ N32_UB5 (insn));
-+ insn_type = NDS32_INSN_SLLI333;
-+ }
-+ break;
-+
-+ case N32_ALU1_ZEH:
-+ if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
-+ {
-+ insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
-+ insn_type = NDS32_INSN_ZEH33;
-+ }
-+ break;
-+
-+ case N32_ALU1_SEB:
-+ if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
-+ {
-+ insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
-+ insn_type = NDS32_INSN_SEB33;
-+ }
-+ break;
-+
-+ case N32_ALU1_SEH:
-+ if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
-+ {
-+ insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
-+ insn_type = NDS32_INSN_SEH33;
-+ }
-+ break;
-+
-+ case N32_ALU1_SLT:
-+ if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
-+ {
-+ /* Implicit r15. */
-+ insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
-+ insn_type = NDS32_INSN_SLT45;
-+ }
-+ break;
-+
-+ case N32_ALU1_SLTS:
-+ if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
-+ {
-+ /* Implicit r15. */
-+ insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
-+ insn_type = NDS32_INSN_SLTS45;
-+ }
-+ break;
-+ }
-+
-+ if ((insn16 & 0x8000) == 0)
-+ return 0;
-+
-+ if (pinsn16)
-+ *pinsn16 = insn16;
-+ if (pinsn_type)
-+ *pinsn_type = insn_type;
-+ return 1;
-+}
-+
-+static int
-+nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
-+ int *pinsn_type)
-+{
-+ uint16_t insn16 = 0;
-+ int insn_type;
-+ unsigned long mach = bfd_get_mach (abfd);
-+
-+ /* TODO: bset, bclr, btgl, btst. */
-+ if (__GF (insn, 6, 4) != 0)
-+ return 0;
-+
-+ switch (N32_IMMU (insn, 6))
-+ {
-+ case N32_ALU2_MUL:
-+ if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
-+ && N32_IS_RB3 (insn))
-+ {
-+ if (N32_RT5 (insn) == N32_RA5 (insn))
-+ insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
-+ else if (N32_RT5 (insn) == N32_RB5 (insn))
-+ insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
-+ if (insn16)
-+ insn_type = NDS32_INSN_MUL33;
-+ }
-+ }
-+
-+ if ((insn16 & 0x8000) == 0)
-+ return 0;
-+
-+ if (pinsn16)
-+ *pinsn16 = insn16;
-+ if (pinsn_type)
-+ *pinsn_type = insn_type;
-+ return 1;
-+}
-+
-+int
-+nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
-+ int *pinsn_type)
-+{
-+ int op6;
-+ uint16_t insn16 = 0;
-+ int insn_type;
-+ unsigned long mach = bfd_get_mach (abfd);
-+
-+ /* Decode 32-bit instruction. */
-+ if (insn & 0x80000000)
-+ {
-+ /* Not 32-bit insn. */
-+ return 0;
-+ }
-+
-+ op6 = N32_OP6 (insn);
-+
-+ /* Convert it to 16-bit instruction. */
-+ switch (op6)
-+ {
-+ case N32_OP6_MOVI:
-+ if (IS_WITHIN_S (N32_IMM20S (insn), 5))
-+ {
-+ insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
-+ insn_type = NDS32_INSN_MOVI55;
-+ }
-+ else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
-+ && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
-+ {
-+ insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
-+ N32_IMM20S (insn) - 16);
-+ insn_type = NDS32_INSN_MOVPI45;
-+ }
-+ break;
-+
-+ case N32_OP6_ADDI:
-+ if (N32_IMM15S (insn) == 0)
-+ {
-+ /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
-+ because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
-+ if (mach <= MACH_V2
-+ || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
-+ {
-+ insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
-+ insn_type = NDS32_INSN_MOV55;
-+ }
-+ }
-+ else if (N32_IMM15S (insn) > 0)
-+ {
-+ if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
-+ {
-+ insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
-+ N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_ADDI333;
-+ }
-+ else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
-+ && N32_IMM15S (insn) < 32)
-+ {
-+ insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_ADDI45;
-+ }
-+ else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
-+ && N32_RT5 (insn) == N32_RA5 (insn)
-+ && N32_IMM15S (insn) < 512)
-+ {
-+ insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_ADDI10_SP;
-+ }
-+ else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
-+ && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
-+ && (N32_IMM15S (insn) % 4 == 0))
-+ {
-+ insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
-+ N32_IMM15S (insn) >> 2);
-+ insn_type = NDS32_INSN_ADDRI36_SP;
-+ }
-+ }
-+ else
-+ {
-+ /* Less than 0. */
-+ if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
-+ {
-+ insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
-+ 0 - N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_SUBI333;
-+ }
-+ else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
-+ && N32_IMM15S (insn) > -32)
-+ {
-+ insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn), 0 - N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_SUBI45;
-+ }
-+ else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
-+ && N32_RT5 (insn) == N32_RA5 (insn)
-+ && N32_IMM15S (insn) >= -512)
-+ {
-+ insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_ADDI10_SP;
-+ }
-+ }
-+ break;
-+
-+ case N32_OP6_ORI:
-+ if (N32_IMM15S (insn) == 0)
-+ {
-+ /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
-+ because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
-+ if (mach <= MACH_V2
-+ || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
-+ {
-+ insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
-+ insn_type = NDS32_INSN_MOV55;
-+ }
-+ }
-+ break;
-+
-+ case N32_OP6_SUBRI:
-+ if (mach >= MACH_V3 && N32_IS_RT3 (insn)
-+ && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
-+ {
-+ insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
-+ insn_type = NDS32_INSN_NEG33;
-+ }
-+ break;
-+
-+ case N32_OP6_ANDI:
-+ if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
-+ {
-+ if (N32_IMM15U (insn) == 1)
-+ {
-+ insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
-+ insn_type = NDS32_INSN_XLSB33;
-+ }
-+ else if (N32_IMM15U (insn) == 0x7ff)
-+ {
-+ insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
-+ insn_type = NDS32_INSN_X11B33;
-+ }
-+ else if (N32_IMM15U (insn) == 0xff)
-+ {
-+ insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
-+ insn_type = NDS32_INSN_ZEB33;
-+ }
-+ else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
-+ && N32_IMM15U (insn) < 256)
-+ {
-+ int imm15u = N32_IMM15U (insn);
-+
-+ if (__builtin_popcount (imm15u) == 1)
-+ {
-+ /* BMSKI33 */
-+ int imm3u = __builtin_ctz (imm15u);
-+
-+ insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
-+ insn_type = NDS32_INSN_BMSKI33;
-+ }
-+ else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
-+ {
-+ /* FEXTI33 */
-+ int imm3u = __builtin_ctz (imm15u + 1) - 1;
-+
-+ insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
-+ insn_type = NDS32_INSN_FEXTI33;
-+ }
-+ }
-+ }
-+ break;
-+
-+ case N32_OP6_SLTI:
-+ if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
-+ && IS_WITHIN_U (N32_IMM15S (insn), 5))
-+ {
-+ insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_SLTI45;
-+ }
-+ break;
-+
-+ case N32_OP6_SLTSI:
-+ if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
-+ && IS_WITHIN_U (N32_IMM15S (insn), 5))
-+ {
-+ insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_SLTSI45;
-+ }
-+ break;
-+
-+ case N32_OP6_LWI:
-+ if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
-+ {
-+ insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
-+ insn_type = NDS32_INSN_LWI450;
-+ }
-+ else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
-+ && IS_WITHIN_U (N32_IMM15S (insn), 3))
-+ {
-+ insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
-+ N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_LWI333;
-+ }
-+ else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
-+ && IS_WITHIN_U (N32_IMM15S (insn), 7))
-+ {
-+ insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_LWI37;
-+ }
-+ else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
-+ && IS_WITHIN_U (N32_IMM15S (insn), 7))
-+ {
-+ insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_LWI37_SP;
-+ }
-+ else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
-+ && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
-+ {
-+ insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
-+ N32_IMM15S (insn) + 32);
-+ insn_type = NDS32_INSN_LWI45_FE;
-+ }
-+ break;
-+
-+ case N32_OP6_SWI:
-+ if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
-+ {
-+ insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
-+ insn_type = NDS32_INSN_SWI450;
-+ }
-+ else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
-+ && IS_WITHIN_U (N32_IMM15S (insn), 3))
-+ {
-+ insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
-+ N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_SWI333;
-+ }
-+ else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
-+ && IS_WITHIN_U (N32_IMM15S (insn), 7))
-+ {
-+ insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_SWI37;
-+ }
-+ else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
-+ && IS_WITHIN_U (N32_IMM15S (insn), 7))
-+ {
-+ insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_SWI37_SP;
-+ }
-+ break;
-+
-+ case N32_OP6_LWI_BI:
-+ if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
-+ && IS_WITHIN_U (N32_IMM15S (insn), 3))
-+ {
-+ insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
-+ N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_LWI333_BI;
-+ }
-+ break;
-+
-+ case N32_OP6_SWI_BI:
-+ if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
-+ && IS_WITHIN_U (N32_IMM15S (insn), 3))
-+ {
-+ insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
-+ N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_SWI333_BI;
-+ }
-+ break;
-+
-+ case N32_OP6_LHI:
-+ if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
-+ && IS_WITHIN_U (N32_IMM15S (insn), 3))
-+ {
-+ insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
-+ N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_LHI333;
-+ }
-+ break;
-+
-+ case N32_OP6_SHI:
-+ if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
-+ && IS_WITHIN_U (N32_IMM15S (insn), 3))
-+ {
-+ insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
-+ N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_SHI333;
-+ }
-+ break;
-+
-+ case N32_OP6_LBI:
-+ if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
-+ && IS_WITHIN_U (N32_IMM15S (insn), 3))
-+ {
-+ insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
-+ N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_LBI333;
-+ }
-+ break;
-+
-+ case N32_OP6_SBI:
-+ if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
-+ && IS_WITHIN_U (N32_IMM15S (insn), 3))
-+ {
-+ insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
-+ N32_IMM15S (insn));
-+ insn_type = NDS32_INSN_SBI333;
-+ }
-+ break;
-+
-+ case N32_OP6_ALU1:
-+ return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
-+
-+ case N32_OP6_ALU2:
-+ return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
-+
-+ case N32_OP6_BR1:
-+ if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
-+ goto done;
-+
-+ if ((insn & __BIT (14)) == 0)
-+ {
-+ /* N32_BR1_BEQ */
-+ if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
-+ && N32_RT5 (insn) != REG_R5)
-+ insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
-+ else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
-+ && N32_RA5 (insn) != REG_R5)
-+ insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
-+ insn_type = NDS32_INSN_BEQS38;
-+ break;
-+ }
-+ else
-+ {
-+ /* N32_BR1_BNE */
-+ if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
-+ && N32_RT5 (insn) != REG_R5)
-+ insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
-+ else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
-+ && N32_RA5 (insn) != REG_R5)
-+ insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
-+ insn_type = NDS32_INSN_BNES38;
-+ break;
-+ }
-+ break;
-+
-+ case N32_OP6_BR2:
-+ switch (N32_BR2_SUB (insn))
-+ {
-+ case N32_BR2_BEQZ:
-+ if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
-+ {
-+ insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
-+ insn_type = NDS32_INSN_BEQZ38;
-+ }
-+ else if (N32_RT5 (insn) == REG_R15 && IS_WITHIN_S (N32_IMM16S (insn), 8))
-+ {
-+ insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
-+ insn_type = NDS32_INSN_BEQZS8;
-+ }
-+ break;
-+
-+ case N32_BR2_BNEZ:
-+ if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
-+ {
-+ insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
-+ insn_type = NDS32_INSN_BNEZ38;
-+ }
-+ else if (N32_RT5 (insn) == REG_R15 && IS_WITHIN_S (N32_IMM16S (insn), 8))
-+ {
-+ insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
-+ insn_type = NDS32_INSN_BNEZS8;
-+ }
-+ break;
-+
-+ case N32_BR2_SOP0:
-+ if (__GF (insn, 20, 5) == 0 && IS_WITHIN_U (N32_IMM16S (insn), 9))
-+ {
-+ insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
-+ insn_type = NDS32_INSN_IFCALL9;
-+ }
-+ break;
-+ }
-+ break;
-+
-+ case N32_OP6_JI:
-+ if ((insn & __BIT (24)) == 0)
-+ {
-+ /* N32_JI_J */
-+ if (IS_WITHIN_S (N32_IMM24S (insn), 8))
-+ {
-+ insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
-+ insn_type = NDS32_INSN_J8;
-+ }
-+ }
-+ break;
-+
-+ case N32_OP6_JREG:
-+ if (__GF (insn, 8, 2) != 0)
-+ goto done;
-+
-+ switch (N32_IMMU (insn, 5))
-+ {
-+ case N32_JREG_JR:
-+ if (N32_JREG_HINT (insn) == 0)
-+ {
-+ /* jr */
-+ insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
-+ insn_type = NDS32_INSN_JR5;
-+ }
-+ else if (N32_JREG_HINT (insn) == 1)
-+ {
-+ /* ret */
-+ insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
-+ insn_type = NDS32_INSN_RET5;
-+ }
-+ else if (N32_JREG_HINT (insn) == 3)
-+ {
-+ /* ifret = mov55 $sp, $sp */
-+ insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
-+ insn_type = NDS32_INSN_IFRET;
-+ }
-+ break;
-+
-+ case N32_JREG_JRAL:
-+ /* It's convertible when return rt5 is $lp and address
-+ translation is kept. */
-+ if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
-+ {
-+ insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
-+ insn_type = NDS32_INSN_JRAL5;
-+ }
-+ break;
-+ }
-+ break;
-+
-+ case N32_OP6_MISC:
-+ if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
-+ {
-+ /* For v3, swid above 31 are used for ex9.it. */
-+ insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
-+ insn_type = NDS32_INSN_BREAK16;
-+ }
-+ break;
-+
-+ default:
-+ /* This instruction has no 16-bit variant. */
-+ goto done;
-+ }
-+
-+done:
-+ /* Bit-15 of insn16 should be set for a valid instruction. */
-+ if ((insn16 & 0x8000) == 0)
-+ return 0;
-+
-+ if (pinsn16)
-+ *pinsn16 = insn16;
-+ if (pinsn_type)
-+ *pinsn_type = insn_type;
-+ return 1;
-+}
-+
-+static int
-+special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
-+ Elf_Internal_Rela *reloc)
-+{
-+ uint16_t insn16 = 0;
-+
-+ if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
-+ || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
-+ return 0;
-+
-+ if (!N32_IS_RT3 (insn))
-+ return 0;
-+
-+ switch (N32_OP6 (insn))
-+ {
-+ case N32_OP6_LWI:
-+ if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
-+ insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
-+ break;
-+ case N32_OP6_SWI:
-+ if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
-+ insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
-+ break;
-+ case N32_OP6_HWGP:
-+ if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
-+ break;
-+
-+ if (__GF (insn, 17, 3) == 6)
-+ insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
-+ else if (__GF (insn, 17, 3) == 7)
-+ insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
-+ break;
-+ }
-+
-+ if ((insn16 & 0x8000) == 0)
-+ return 0;
-+
-+ *pinsn16 = insn16;
-+ return 1;
-+}
-+
-+/* Convert a 16-bit instruction to 32-bit one.
-+ INSN16 it the input and PINSN it the point to output.
-+ Return non-zero on successful. Otherwise 0 is returned. */
-+
-+int
-+nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
-+{
-+ uint32_t insn = 0xffffffff;
-+ unsigned long mach = bfd_get_mach (abfd);
-+
-+ /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
-+
-+ switch (__GF (insn16, 9, 6))
-+ {
-+ case 0x4: /* add45 */
-+ insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16), N16_RA5 (insn16));
-+ goto done;
-+ case 0x5: /* sub45 */
-+ insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16), N16_RA5 (insn16));
-+ goto done;
-+ case 0x6: /* addi45 */
-+ insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16), N16_IMM5U (insn16));
-+ goto done;
-+ case 0x7: /* subi45 */
-+ insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16), -N16_IMM5U (insn16));
-+ goto done;
-+ case 0x8: /* srai45 */
-+ insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16), N16_IMM5U (insn16));
-+ goto done;
-+ case 0x9: /* srli45 */
-+ insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16), N16_IMM5U (insn16));
-+ goto done;
-+
-+ case 0xa: /* slli333 */
-+ insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
-+ goto done;
-+ case 0xc: /* add333 */
-+ insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16), N16_RB3 (insn16));
-+ goto done;
-+ case 0xd: /* sub333 */
-+ insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16), N16_RB3 (insn16));
-+ goto done;
-+ case 0xe: /* addi333 */
-+ insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
-+ goto done;
-+ case 0xf: /* subi333 */
-+ insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16), -N16_IMM3U (insn16));
-+ goto done;
-+
-+ case 0x10: /* lwi333 */
-+ insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
-+ goto done;
-+ case 0x12: /* lhi333 */
-+ insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
-+ goto done;
-+ case 0x13: /* lbi333 */
-+ insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
-+ goto done;
-+ case 0x11: /* lwi333.bi */
-+ insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
-+ goto done;
-+ case 0x14: /* swi333 */
-+ insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
-+ goto done;
-+ case 0x16: /* shi333 */
-+ insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
-+ goto done;
-+ case 0x17: /* sbi333 */
-+ insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
-+ goto done;
-+ case 0x15: /* swi333.bi */
-+ insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16), N16_IMM3U (insn16));
-+ goto done;
-+
-+ case 0x18: /* addri36.sp */
-+ insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP, N16_IMM6U (insn16) << 2);
-+ goto done;
-+
-+ case 0x19: /* lwi45.fe */
-+ insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8, (N16_IMM5U (insn16) - 32));
-+ goto done;
-+ case 0x1a: /* lwi450 */
-+ insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
-+ goto done;
-+ case 0x1b: /* swi450 */
-+ insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
-+ goto done;
-+
-+ /* These are r15 implied instructions. */
-+ case 0x30: /* slts45 */
-+ insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
-+ goto done;
-+ case 0x31: /* slt45 */
-+ insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
-+ goto done;
-+ case 0x32: /* sltsi45 */
-+ insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
-+ goto done;
-+ case 0x33: /* slti45 */
-+ insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
-+ goto done;
-+ case 0x34: /* beqzs8, bnezs8 */
-+ if (insn16 & __BIT (8))
-+ insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
-+ else
-+ insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
-+ goto done;
-+
-+ case 0x35: /* break16, ex9.it */
-+ /* Only consider range of v3 break16. */
-+ insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
-+ goto done;
-+
-+ case 0x3c: /* ifcall9 */
-+ insn = N32_BR2 (SOP0, 0, N16_IMM9U (insn16));
-+ goto done;
-+ case 0x3d: /* movpi45 */
-+ insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
-+ goto done;
-+
-+ case 0x3f: /* MISC33 */
-+ switch (insn16 & 0x7)
-+ {
-+ case 2: /* neg33 */
-+ insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
-+ break;
-+ case 3: /* not33 */
-+ insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16), N16_RA3 (insn16));
-+ break;
-+ case 4: /* mul33 */
-+ insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16), N16_RA3 (insn16));
-+ break;
-+ case 5: /* xor33 */
-+ insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16), N16_RA3 (insn16));
-+ break;
-+ case 6: /* and33 */
-+ insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16), N16_RA3 (insn16));
-+ break;
-+ case 7: /* or33 */
-+ insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16), N16_RA3 (insn16));
-+ break;
-+ }
-+ goto done;
-+
-+ case 0xb: /* ... */
-+ switch (insn16 & 0x7)
-+ {
-+ case 0: /* zeb33 */
-+ insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
-+ break;
-+ case 1: /* zeh33 */
-+ insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
-+ break;
-+ case 2: /* seb33 */
-+ insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
-+ break;
-+ case 3: /* seh33 */
-+ insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
-+ break;
-+ case 4: /* xlsb33 */
-+ insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
-+ break;
-+ case 5: /* x11b33 */
-+ insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
-+ break;
-+ case 6: /* bmski33 */
-+ insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
-+ 1 << __GF (insn16, 3, 3));
-+ break;
-+ case 7: /* fexti33 */
-+ insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
-+ (1 << (__GF (insn16, 3, 3) + 1)) - 1);
-+ break;
-+ }
-+ goto done;
-+ }
-+
-+ switch (__GF (insn16, 10, 5))
-+ {
-+ case 0x0: /* mov55 or ifret16 */
-+ if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
-+ && N16_RT5 (insn16) == N16_RA5 (insn16))
-+ insn = N32_JREG (JR, 0, 0, 0, 3);
-+ else
-+ insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
-+ goto done;
-+ case 0x1: /* movi55 */
-+ insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
-+ goto done;
-+ case 0x1b: /* addi10s (V2) */
-+ insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
-+ goto done;
-+ }
-+
-+ switch (__GF (insn16, 11, 4))
-+ {
-+ case 0x7: /* lwi37.fp/swi37.fp */
-+ if (insn16 & __BIT (7)) /* swi37.fp */
-+ insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
-+ else /* lwi37.fp */
-+ insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
-+ goto done;
-+ case 0x8: /* beqz38 */
-+ insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
-+ goto done;
-+ case 0x9: /* bnez38 */
-+ insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
-+ goto done;
-+ case 0xa: /* beqs38/j8, implied r5 */
-+ if (N16_RT38 (insn16) == 5)
-+ insn = N32_JI (J, N16_IMM8S (insn16));
-+ else
-+ insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
-+ goto done;
-+ case 0xb: /* bnes38 and others */
-+ if (N16_RT38 (insn16) == 5)
-+ {
-+ switch (__GF (insn16, 5, 3))
-+ {
-+ case 0: /* jr5 */
-+ insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
-+ break;
-+ case 4: /* ret5 */
-+ insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
-+ break;
-+ case 1: /* jral5 */
-+ insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
-+ break;
-+ case 2: /* ex9.it imm5 */
-+ /* ex9.it had no 32-bit variantl. */
-+ break;
-+ case 5: /* add5.pc */
-+ /* add5.pc had no 32-bit variantl. */
-+ break;
-+ }
-+ }
-+ else /* bnes38 */
-+ insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
-+ goto done;
-+ case 0xe: /* lwi37/swi37 */
-+ if (insn16 & (1 << 7)) /* swi37.sp */
-+ insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
-+ else /* lwi37.sp */
-+ insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
-+ goto done;
-+ }
-+
-+done:
-+ if (insn & 0x80000000)
-+ return 0;
-+
-+ if (pinsn)
-+ *pinsn = insn;
-+ return 1;
-+}
-+
-+static bfd_boolean
-+is_sda_access_insn (unsigned long insn)
-+{
-+ switch (N32_OP6 (insn))
-+ {
-+ case N32_OP6_LWI:
-+ case N32_OP6_LHI:
-+ case N32_OP6_LHSI:
-+ case N32_OP6_LBI:
-+ case N32_OP6_LBSI:
-+ case N32_OP6_SWI:
-+ case N32_OP6_SHI:
-+ case N32_OP6_SBI:
-+ case N32_OP6_LWC:
-+ case N32_OP6_LDC:
-+ case N32_OP6_SWC:
-+ case N32_OP6_SDC:
-+ return TRUE;
-+ default:
-+ ;
-+ }
-+ return FALSE;
-+}
-+
-+static unsigned long
-+turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
-+{
-+ uint32_t oinsn = 0;
-+
-+ switch (type)
-+ {
-+ case R_NDS32_GOT_LO12:
-+ case R_NDS32_GOTOFF_LO12:
-+ case R_NDS32_PLTREL_LO12:
-+ case R_NDS32_PLT_GOTREL_LO12:
-+ case R_NDS32_LO12S0_RELA:
-+ switch (N32_OP6 (insn))
-+ {
-+ case N32_OP6_LBI:
-+ /* lbi.gp */
-+ oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
-+ break;
-+ case N32_OP6_LBSI:
-+ /* lbsi.gp */
-+ oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
-+ break;
-+ case N32_OP6_SBI:
-+ /* sbi.gp */
-+ oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
-+ break;
-+ case N32_OP6_ORI:
-+ /* addi.gp */
-+ oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
-+ break;
-+ }
-+ break;
-+
-+ case R_NDS32_LO12S1_RELA:
-+ switch (N32_OP6 (insn))
-+ {
-+ case N32_OP6_LHI:
-+ /* lhi.gp */
-+ oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
-+ break;
-+ case N32_OP6_LHSI:
-+ /* lhsi.gp */
-+ oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
-+ break;
-+ case N32_OP6_SHI:
-+ /* shi.gp */
-+ oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
-+ break;
-+ }
-+ break;
-+
-+ case R_NDS32_LO12S2_RELA:
-+ switch (N32_OP6 (insn))
-+ {
-+ case N32_OP6_LWI:
-+ /* lwi.gp */
-+ oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
-+ break;
-+ case N32_OP6_SWI:
-+ /* swi.gp */
-+ oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
-+ break;
-+ }
-+ break;
-+
-+ case R_NDS32_LO12S2_DP_RELA:
-+ case R_NDS32_LO12S2_SP_RELA:
-+ oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
-+ break;
-+ }
-+
-+ if (oinsn)
-+ *pinsn = oinsn;
-+
-+ return oinsn != 0;
-+}
-+
-+/* Linker hasn't found the correct merge section for non-section symbol
-+ in relax time, this work is left to the function elf_link_input_bfd().
-+ So for non-section symbol, _bfd_merged_section_offset is also needed
-+ to find the correct symbol address. */
-+
-+static bfd_vma
-+nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
-+ asection **psec, Elf_Internal_Rela *rel)
-+{
-+ asection *sec = *psec;
-+ bfd_vma relocation;
-+
-+ relocation = (sec->output_section->vma
-+ + sec->output_offset + sym->st_value);
-+ if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
-+ {
-+ if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
-+ rel->r_addend =
-+ _bfd_merged_section_offset (abfd, psec,
-+ elf_section_data (sec)->sec_info,
-+ sym->st_value + rel->r_addend);
-+ else
-+ rel->r_addend =
-+ _bfd_merged_section_offset (abfd, psec,
-+ elf_section_data (sec)->sec_info,
-+ sym->st_value) + rel->r_addend;
-+
-+ if (sec != *psec)
-+ {
-+ /* If we have changed the section, and our original section is
-+ marked with SEC_EXCLUDE, it means that the original
-+ SEC_MERGE section has been completely subsumed in some
-+ other SEC_MERGE section. In this case, we need to leave
-+ some info around for --emit-relocs. */
-+ if ((sec->flags & SEC_EXCLUDE) != 0)
-+ sec->kept_section = *psec;
-+ sec = *psec;
-+ }
-+ rel->r_addend -= relocation;
-+ rel->r_addend += sec->output_section->vma + sec->output_offset;
-+ }
-+ return relocation;
-+}
-+
-+static bfd_vma
-+calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
-+ Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ bfd_signed_vma foff;
-+ bfd_vma symval, addend;
-+ Elf_Internal_Rela irel_fn;
-+ Elf_Internal_Sym *isym;
-+ asection *sym_sec;
-+
-+ /* Get the value of the symbol referred to by the reloc. */
-+ if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
-+ {
-+ /* A local symbol. */
-+ isym = isymbuf + ELF32_R_SYM (irel->r_info);
-+
-+ if (isym->st_shndx == SHN_UNDEF)
-+ sym_sec = bfd_und_section_ptr;
-+ else if (isym->st_shndx == SHN_ABS)
-+ sym_sec = bfd_abs_section_ptr;
-+ else if (isym->st_shndx == SHN_COMMON)
-+ sym_sec = bfd_com_section_ptr;
-+ else
-+ sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
-+ memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
-+ symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
-+ addend = irel_fn.r_addend;
-+ }
-+ else
-+ {
-+ unsigned long indx;
-+ struct elf_link_hash_entry *h;
-+
-+ /* An external symbol. */
-+ indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
-+ h = elf_sym_hashes (abfd)[indx];
-+ BFD_ASSERT (h != NULL);
-+
-+ while (h->root.type == bfd_link_hash_indirect
-+ || h->root.type == bfd_link_hash_warning)
-+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
-+
-+ if (h->root.type != bfd_link_hash_defined
-+ && h->root.type != bfd_link_hash_defweak)
-+ /* This appears to be a reference to an undefined
-+ symbol. Just ignore it--it will be caught by the
-+ regular reloc processing. */
-+ return 0;
-+
-+ if (h->root.u.def.section->flags & SEC_MERGE)
-+ {
-+ sym_sec = h->root.u.def.section;
-+ symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
-+ (sym_sec)->sec_info, h->root.u.def.value);
-+ symval = symval + sym_sec->output_section->vma
-+ + sym_sec->output_offset;
-+ }
-+ else
-+ symval = (h->root.u.def.value
-+ + h->root.u.def.section->output_section->vma
-+ + h->root.u.def.section->output_offset);
-+ addend = irel->r_addend;
-+ }
-+
-+ foff = symval + addend;
-+
-+ return foff;
-+}
-+
-+static bfd_vma
-+calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
-+ Elf_Internal_Rela *irel,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ int symndx;
-+ bfd_vma *local_got_offsets;
-+ /* Get the value of the symbol referred to by the reloc. */
-+ struct elf_link_hash_entry *h;
-+ struct elf_link_hash_table *ehtab = elf_hash_table (link_info);
-+
-+ /* An external symbol. */
-+ symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
-+ h = elf_sym_hashes (abfd)[symndx];
-+ while (h->root.type == bfd_link_hash_indirect
-+ || h->root.type == bfd_link_hash_warning)
-+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
-+
-+ if (symndx >= 0)
-+ {
-+ BFD_ASSERT (h != NULL);
-+ return ehtab->sgot->output_section->vma + ehtab->sgot->output_offset
-+ + h->got.offset;
-+ }
-+ local_got_offsets = elf_local_got_offsets (abfd);
-+ BFD_ASSERT (local_got_offsets != NULL);
-+ return ehtab->sgot->output_section->vma + ehtab->sgot->output_offset
-+ + local_got_offsets[ELF32_R_SYM (irel->r_info)];
-+
-+ /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
-+ /* The check of h->root.type is passed. */
-+}
-+
-+static int
-+is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
-+ asection *sec, Elf_Internal_Rela *rel)
-+{
-+ bfd_byte *contents;
-+ unsigned short insn16;
-+
-+ if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
-+ return FALSE;
-+ contents = elf_section_data (sec)->this_hdr.contents;
-+ insn16 = bfd_getb16 (contents + rel->r_offset);
-+ if (insn16 == NDS32_NOP16)
-+ return TRUE;
-+ return FALSE;
-+}
-+
-+/* It checks whether the instruction could be converted to
-+ 16-bit form and returns the converted one.
-+
-+ `internal_relocs' is supposed to be sorted. */
-+
-+static int
-+is_convert_32_to_16 (bfd *abfd, asection *sec,
-+ Elf_Internal_Rela *reloc,
-+ Elf_Internal_Rela *internal_relocs,
-+ Elf_Internal_Rela *irelend,
-+ uint16_t *insn16)
-+{
-+#define NORMAL_32_TO_16 (1 << 0)
-+#define SPECIAL_32_TO_16 (1 << 1)
-+ bfd_byte *contents = NULL;
-+ bfd_signed_vma off;
-+ bfd_vma mem_addr;
-+ uint32_t insn = 0;
-+ Elf_Internal_Rela *pc_rel;
-+ Elf_Internal_Shdr *symtab_hdr;
-+ Elf_Internal_Sym *isymbuf = NULL;
-+ int convert_type;
-+ bfd_vma offset;
-+
-+ if (reloc->r_offset + 4 > sec->size)
-+ return FALSE;
-+
-+ offset = reloc->r_offset;
-+
-+ if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
-+ return FALSE;
-+ insn = bfd_getb32 (contents + offset);
-+
-+ if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
-+ convert_type = NORMAL_32_TO_16;
-+ else if (special_convert_32_to_16 (insn, insn16, reloc))
-+ convert_type = SPECIAL_32_TO_16;
-+ else
-+ return FALSE;
-+
-+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
-+ if (!nds32_get_local_syms (abfd, sec, &isymbuf))
-+ return FALSE;
-+
-+ /* Find the first relocation of the same relocation-type,
-+ so we iteratie them forward. */
-+ pc_rel = reloc;
-+ while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
-+ pc_rel--;
-+
-+ for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
-+ {
-+ if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
-+ || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
-+ || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
-+ || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
-+ {
-+ off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr);
-+ if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
-+ || off == 0)
-+ return FALSE;
-+ break;
-+ }
-+ else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
-+ {
-+ /* movi => movi55 */
-+ mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf, symtab_hdr);
-+ /* mem_addr is unsigned, but the value should be between [-16, 15]. */
-+ if ((mem_addr + 0x10) >> 5)
-+ return FALSE;
-+ break;
-+ }
-+ else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
-+ || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
-+ {
-+ /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
-+ because it can be relaxed to addi for TLS_LE_ADD. */
-+ return FALSE;
-+ }
-+ else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
-+ || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
-+ && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
-+ && convert_type == SPECIAL_32_TO_16)
-+ {
-+ /* fp-as-gp
-+ We've selected a best fp-base for this access, so we can
-+ always resolve it anyway. Do nothing. */
-+ break;
-+ }
-+ else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
-+ && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
-+ || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
-+ && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
-+ || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
-+ && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
-+ {
-+ /* Prevent unresolved addi instruction translate to addi45 or addi333. */
-+ return FALSE;
-+ }
-+ else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
-+ {
-+ off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr);
-+ if (off >= ACCURATE_U9BIT_S1 || off <= 0)
-+ return FALSE;
-+ break;
-+ }
-+ }
-+
-+ return TRUE;
-+}
-+
-+static void
-+nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
-+ Elf_Internal_Rela *reloc,
-+ Elf_Internal_Rela *internal_relocs,
-+ Elf_Internal_Rela *irelend,
-+ unsigned short insn16)
-+{
-+ Elf_Internal_Rela *pc_rel;
-+ bfd_vma offset;
-+
-+ offset = reloc->r_offset;
-+ bfd_putb16 (insn16, contents + offset);
-+ /* Find the first relocation of the same relocation-type,
-+ so we iteratie them forward. */
-+ pc_rel = reloc;
-+ while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
-+ pc_rel--;
-+
-+ for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
-+ {
-+ if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
-+ || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
-+ || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
-+ {
-+ pc_rel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
-+ }
-+ else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
-+ pc_rel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
-+ else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
-+ pc_rel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
-+ else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
-+ || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
-+ pc_rel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
-+ else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
-+ pc_rel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
-+ }
-+}
-+
-+/* Find a relocation of type specified by `reloc_type'
-+ of the same r_offset with reloc.
-+ If not found, return irelend.
-+
-+ Assuming relocations are sorted by r_offset,
-+ we find the relocation from `reloc' backward untill relocs,
-+ or find it from `reloc' forward untill irelend. */
-+
-+static Elf_Internal_Rela *
-+find_relocs_at_address (Elf_Internal_Rela *reloc,
-+ Elf_Internal_Rela *relocs,
-+ Elf_Internal_Rela *irelend,
-+ enum elf_nds32_reloc_type reloc_type)
-+{
-+ Elf_Internal_Rela *rel_t;
-+
-+ /* Find backward. */
-+ for (rel_t = reloc;
-+ rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
-+ rel_t--)
-+ if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
-+ return rel_t;
-+
-+ /* We didn't find it backward. Try find it forward. */
-+ for (rel_t = reloc;
-+ rel_t < irelend && rel_t->r_offset == reloc->r_offset;
-+ rel_t++)
-+ if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
-+ return rel_t;
-+
-+ return irelend;
-+}
-+
-+/* Find a relocation of specified type and offset.
-+ `reloc' is just a refence point to find a relocation at specified offset.
-+ If not found, return irelend.
-+
-+ Assuming relocations are sorted by r_offset,
-+ we find the relocation from `reloc' backward untill relocs,
-+ or find it from `reloc' forward untill irelend. */
-+
-+static Elf_Internal_Rela *
-+find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
-+ Elf_Internal_Rela *relocs,
-+ Elf_Internal_Rela *irelend,
-+ unsigned char reloc_type,
-+ bfd_vma offset_p)
-+{
-+ Elf_Internal_Rela *rel_t = NULL;
-+
-+ /* First, we try to find a relocation of offset `offset_p',
-+ and then we use find_relocs_at_address to find specific type. */
-+
-+ if (reloc->r_offset > offset_p)
-+ {
-+ /* Find backward. */
-+ for (rel_t = reloc;
-+ rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
-+ /* Do nothing. */;
-+ }
-+ else if (reloc->r_offset < offset_p)
-+ {
-+ /* Find forward. */
-+ for (rel_t = reloc;
-+ rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
-+ /* Do nothing. */;
-+ }
-+ else
-+ rel_t = reloc;
-+
-+ /* Not found? */
-+ if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
-+ return irelend;
-+
-+ return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
-+}
-+
-+static bfd_boolean
-+nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
-+ Elf_Internal_Rela *internal_relocs,
-+ Elf_Internal_Rela *irelend,
-+ unsigned char reloc_type)
-+{
-+ Elf_Internal_Rela *rel_t;
-+
-+ for (rel_t = reloc;
-+ rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
-+ rel_t--)
-+ if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
-+ {
-+ if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
-+ && rel_t->r_addend == reloc->r_addend)
-+ continue;
-+ return TRUE;
-+ }
-+
-+ for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
-+ rel_t++)
-+ if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
-+ {
-+ if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
-+ && rel_t->r_addend == reloc->r_addend)
-+ continue;
-+ return TRUE;
-+ }
-+
-+ return FALSE;
-+}
-+
-+typedef struct nds32_elf_blank nds32_elf_blank_t;
-+struct nds32_elf_blank
-+{
-+ /* Where the blank begins. */
-+ bfd_vma offset;
-+ /* The size of the blank. */
-+ bfd_vma size;
-+ /* The accumulative size before this blank. */
-+ bfd_vma total_size;
-+ nds32_elf_blank_t *next;
-+ nds32_elf_blank_t *prev;
-+};
-+
-+static nds32_elf_blank_t *blank_free_list = NULL;
-+
-+static nds32_elf_blank_t *
-+create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
-+{
-+ nds32_elf_blank_t *blank_t;
-+
-+ if (blank_free_list)
-+ {
-+ blank_t = blank_free_list;
-+ blank_free_list = blank_free_list->next;
-+ }
-+ else
-+ blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
-+
-+ if (blank_t == NULL)
-+ return NULL;
-+
-+ blank_t->offset = offset_p;
-+ blank_t->size = size_p;
-+ blank_t->total_size = 0;
-+ blank_t->next = NULL;
-+ blank_t->prev = NULL;
-+
-+ return blank_t;
-+}
-+
-+static void
-+remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
-+{
-+ if (blank_free_list)
-+ {
-+ blank_free_list->prev = blank_p;
-+ blank_p->next = blank_free_list;
-+ }
-+ else
-+ blank_p->next = NULL;
-+
-+ blank_p->prev = NULL;
-+ blank_free_list = blank_p;
-+}
-+
-+static void
-+clean_nds32_elf_blank (void)
-+{
-+ nds32_elf_blank_t *blank_t;
-+
-+ while (blank_free_list)
-+ {
-+ blank_t = blank_free_list;
-+ blank_free_list = blank_free_list->next;
-+ free (blank_t);
-+ }
-+}
-+
-+static nds32_elf_blank_t *
-+search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
-+{
-+ nds32_elf_blank_t *blank_t;
-+
-+ if (!blank_p)
-+ return NULL;
-+ blank_t = blank_p;
-+
-+ while (blank_t && addr < blank_t->offset)
-+ blank_t = blank_t->prev;
-+ while (blank_t && blank_t->next && addr >= blank_t->next->offset)
-+ blank_t = blank_t->next;
-+
-+ return blank_t;
-+}
-+
-+static bfd_vma
-+get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
-+ int overwrite)
-+{
-+ nds32_elf_blank_t *blank_t;
-+
-+ blank_t = search_nds32_elf_blank (*blank_p, addr);
-+ if (!blank_t)
-+ return 0;
-+
-+ if (overwrite)
-+ *blank_p = blank_t;
-+
-+ if (addr < blank_t->offset + blank_t->size)
-+ return blank_t->total_size + (addr - blank_t->offset);
-+ else
-+ return blank_t->total_size + blank_t->size;
-+}
-+
-+static bfd_boolean
-+insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
-+{
-+ nds32_elf_blank_t *blank_t, *blank_t2;
-+
-+ if (!*blank_p)
-+ {
-+ *blank_p = create_nds32_elf_blank (addr, len);
-+ return *blank_p ? TRUE : FALSE;
-+ }
-+
-+ blank_t = search_nds32_elf_blank (*blank_p, addr);
-+
-+ if (blank_t == NULL)
-+ {
-+ blank_t = create_nds32_elf_blank (addr, len);
-+ if (!blank_t)
-+ return FALSE;
-+ while ((*blank_p)->prev != NULL)
-+ *blank_p = (*blank_p)->prev;
-+ blank_t->next = *blank_p;
-+ (*blank_p)->prev = blank_t;
-+ (*blank_p) = blank_t;
-+ return TRUE;
-+ }
-+
-+ if (addr < blank_t->offset + blank_t->size
-+ && ((addr + len) > (blank_t->offset + blank_t->size)))
-+ blank_t->size = addr + len - blank_t->offset - blank_t->size;
-+ else
-+ {
-+ blank_t2 = create_nds32_elf_blank (addr, len);
-+ if (!blank_t2)
-+ return FALSE;
-+ if (blank_t->next)
-+ {
-+ blank_t->next->prev = blank_t2;
-+ blank_t2->next = blank_t->next;
-+ }
-+ blank_t2->prev = blank_t;
-+ blank_t->next = blank_t2;
-+ *blank_p = blank_t2;
-+ }
-+
-+ return TRUE;
-+}
-+
-+static bfd_boolean
-+insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
-+ bfd_vma len)
-+{
-+ nds32_elf_blank_t *blank_t;
-+
-+ if (!insert_nds32_elf_blank (blank_p, addr, len))
-+ return FALSE;
-+
-+ blank_t = *blank_p;
-+
-+ if (!blank_t->prev)
-+ {
-+ blank_t->total_size = 0;
-+ blank_t = blank_t->next;
-+ }
-+
-+ while (blank_t)
-+ {
-+ blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
-+ blank_t = blank_t->next;
-+ }
-+
-+ return TRUE;
-+}
-+
-+static void
-+calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
-+{
-+ nds32_elf_blank_t *blank_t;
-+ bfd_vma total_size = 0;
-+
-+ if (!blank_p)
-+ return;
-+
-+ blank_t = blank_p;
-+ while (blank_t->prev)
-+ blank_t = blank_t->prev;
-+ while (blank_t)
-+ {
-+ blank_t->total_size = total_size;
-+ total_size += blank_t->size;
-+ blank_t = blank_t->next;
-+ }
-+}
-+
-+static bfd_boolean
-+nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
-+ nds32_elf_blank_t *blank_p)
-+{
-+ Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
-+ Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
-+ Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
-+ unsigned int sec_shndx; /* The section the be relaxed. */
-+ bfd_byte *contents; /* Contents data of iterating section. */
-+ Elf_Internal_Rela *internal_relocs;
-+ Elf_Internal_Rela *irel;
-+ Elf_Internal_Rela *irelend;
-+ struct elf_link_hash_entry **sym_hashes;
-+ struct elf_link_hash_entry **end_hashes;
-+ unsigned int symcount;
-+ asection *sect;
-+ nds32_elf_blank_t *blank_t;
-+ nds32_elf_blank_t *blank_t2;
-+ nds32_elf_blank_t *blank_head;
-+
-+ blank_head = blank_t = blank_p;
-+ while (blank_head->prev != NULL)
-+ blank_head = blank_head->prev;
-+ while (blank_t->next != NULL)
-+ blank_t = blank_t->next;
-+
-+ if (blank_t->offset + blank_t->size <= sec->size)
-+ {
-+ blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
-+ blank_t->next->prev = blank_t;
-+ }
-+ if (blank_head->offset > 0)
-+ {
-+ blank_head->prev = create_nds32_elf_blank (0, 0);
-+ blank_head->prev->next = blank_head;
-+ blank_head = blank_head->prev;
-+ }
-+
-+ sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
-+
-+ /* The deletion must stop at the next ALIGN reloc for an alignment
-+ power larger than the number of bytes we are deleting. */
-+
-+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
-+ if (!nds32_get_local_syms (abfd, sec, &isym))
-+ return FALSE;
-+
-+ if (isym == NULL)
-+ {
-+ isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
-+ symtab_hdr->sh_info, 0, NULL, NULL, NULL);
-+ symtab_hdr->contents = (bfd_byte *) isym;
-+ }
-+
-+ if (isym == NULL || symtab_hdr->sh_info == 0)
-+ return FALSE;
-+
-+ blank_t = blank_head;
-+ calc_nds32_blank_total (blank_head);
-+
-+ for (sect = abfd->sections; sect != NULL; sect = sect->next)
-+ {
-+ /* Adjust all the relocs. */
-+
-+ /* Relocations MUST be kept in memory, because relaxation adjust them. */
-+ internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
-+ TRUE /* keep_memory */);
-+ irelend = internal_relocs + sect->reloc_count;
-+
-+ blank_t = blank_head;
-+ blank_t2 = blank_head;
-+
-+ if (!(sect->flags & SEC_RELOC))
-+ continue;
-+
-+ nds32_get_section_contents (abfd, sect, &contents, TRUE);
-+
-+ for (irel = internal_relocs; irel < irelend; irel++)
-+ {
-+ bfd_vma raddr;
-+
-+ if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
-+ && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
-+ {
-+ unsigned long val = 0;
-+ unsigned long mask;
-+ long before, between;
-+ long offset;
-+
-+ switch (ELF32_R_TYPE (irel->r_info))
-+ {
-+ case R_NDS32_DIFF8:
-+ offset = bfd_get_8 (abfd, contents + irel->r_offset);
-+ break;
-+ case R_NDS32_DIFF16:
-+ offset = bfd_get_16 (abfd, contents + irel->r_offset);
-+ break;
-+ case R_NDS32_DIFF32:
-+ val = bfd_get_32 (abfd, contents + irel->r_offset);
-+ /* Get the signed bit and mask for the high part. The
-+ gcc will alarm when right shift 32-bit since the
-+ type size of long may be 32-bit. */
-+ mask = 0 - (val >> 31);
-+ if (mask)
-+ offset = (val | (mask - 0xffffffff));
-+ else
-+ offset = val;
-+ break;
-+ default:
-+ BFD_ASSERT (0);
-+ }
-+
-+ /* DIFF value
-+ 0 |encoded in location|
-+ |------------|-------------------|---------
-+ sym+off(addend)
-+ -- before ---| *****************
-+ --------------------- between ---|
-+
-+ We only care how much data are relax between DIFF, marked as ***. */
-+
-+ before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
-+ between = get_nds32_elf_blank_total (&blank_t, irel->r_addend + offset, 0);
-+ if (between == before)
-+ goto done_adjust_diff;
-+
-+ switch (ELF32_R_TYPE (irel->r_info))
-+ {
-+ case R_NDS32_DIFF8:
-+ bfd_put_8 (abfd, offset - (between - before), contents + irel->r_offset);
-+ break;
-+ case R_NDS32_DIFF16:
-+ bfd_put_16 (abfd, offset - (between - before), contents + irel->r_offset);
-+ break;
-+ case R_NDS32_DIFF32:
-+ bfd_put_32 (abfd, offset - (between - before), contents + irel->r_offset);
-+ break;
-+ }
-+ }
-+ else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
-+ && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
-+ {
-+ bfd_vma val = 0;
-+ unsigned int len = 0;
-+ unsigned long before, between;
-+ bfd_byte *endp, *p;
-+
-+ val = read_unsigned_leb128 (abfd, contents + irel->r_offset, &len);
-+
-+ before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
-+ between = get_nds32_elf_blank_total (&blank_t, irel->r_addend + val, 0);
-+ if (between == before)
-+ goto done_adjust_diff;
-+
-+ p = contents + irel->r_offset;
-+ endp = p + len -1;
-+ memset (p, 0x80, len);
-+ *(endp) = 0;
-+ p = write_uleb128 (p, val - (between - before)) - 1;
-+ if (p < endp)
-+ *p |= 0x80;
-+ }
-+done_adjust_diff:
-+
-+ if (sec == sect)
-+ {
-+ raddr = irel->r_offset;
-+ irel->r_offset -= get_nds32_elf_blank_total (&blank_t2, irel->r_offset, 1);
-+
-+ if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
-+ continue;
-+ if (blank_t2 && blank_t2->next
-+ && (blank_t2->offset > raddr || blank_t2->next->offset <= raddr))
-+ (*_bfd_error_handler) (_("%B: %s\n"), abfd,
-+ "Error: search_nds32_elf_blank reports wrong node");
-+
-+ /* Mark reloc in deleted portion as NONE.
-+ For some relocs like R_NDS32_LABEL that doesn't modify the
-+ content in the section. R_NDS32_LABEL doesn't belong to the
-+ instruction in the section, so we should preserve it. */
-+ if (raddr >= blank_t2->offset
-+ && raddr < blank_t2->offset + blank_t2->size
-+ && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
-+ && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
-+ && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
-+ && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
-+ && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
-+ && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
-+ {
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
-+ R_NDS32_NONE);
-+ continue;
-+ }
-+ }
-+
-+ if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
-+ continue;
-+
-+ if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
-+ && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
-+ && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
-+ {
-+ if (irel->r_addend <= sec->size)
-+ irel->r_addend -=
-+ get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
-+ }
-+ }
-+ }
-+
-+ /* Adjust the local symbols defined in this section. */
-+ blank_t = blank_head;
-+ for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
-+ {
-+ if (isym->st_shndx == sec_shndx)
-+ {
-+ if (isym->st_value <= sec->size)
-+ {
-+ bfd_vma ahead;
-+ bfd_vma orig_addr = isym->st_value;
-+
-+ ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
-+ isym->st_value -= ahead;
-+
-+ /* Adjust function size. */
-+ if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC && isym->st_size > 0)
-+ isym->st_size -= get_nds32_elf_blank_total
-+ (&blank_t, orig_addr + isym->st_size, 0) - ahead;
-+ }
-+ }
-+ }
-+
-+ /* Now adjust the global symbols defined in this section. */
-+ symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
-+ - symtab_hdr->sh_info);
-+ sym_hashes = elf_sym_hashes (abfd);
-+ end_hashes = sym_hashes + symcount;
-+ blank_t = blank_head;
-+ for (; sym_hashes < end_hashes; sym_hashes++)
-+ {
-+ struct elf_link_hash_entry *sym_hash = *sym_hashes;
-+
-+ if ((sym_hash->root.type == bfd_link_hash_defined
-+ || sym_hash->root.type == bfd_link_hash_defweak)
-+ && sym_hash->root.u.def.section == sec)
-+ {
-+ if (sym_hash->root.u.def.value <= sec->size)
-+ {
-+ bfd_vma ahead;
-+ bfd_vma orig_addr = sym_hash->root.u.def.value;
-+
-+ ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
-+ sym_hash->root.u.def.value -= ahead;
-+
-+ /* Adjust function size. */
-+ if (sym_hash->type == STT_FUNC)
-+ sym_hash->size -= get_nds32_elf_blank_total
-+ (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
-+
-+ }
-+ }
-+ }
-+
-+ contents = elf_section_data (sec)->this_hdr.contents;
-+ blank_t = blank_head;
-+ while (blank_t->next)
-+ {
-+ /* Actually delete the bytes. */
-+
-+ /* If current blank is the last blank overlap with current section,
-+ go to finish process. */
-+ if (sec->size <= (blank_t->next->offset))
-+ break;
-+
-+ memmove (contents + blank_t->offset - blank_t->total_size,
-+ contents + blank_t->offset + blank_t->size,
-+ blank_t->next->offset - (blank_t->offset + blank_t->size));
-+
-+ blank_t = blank_t->next;
-+ }
-+
-+ if (sec->size > (blank_t->offset + blank_t->size))
-+ {
-+ /* There are remaining code between blank and section boundary.
-+ Move the remaining code to appropriate location. */
-+ memmove (contents + blank_t->offset - blank_t->total_size,
-+ contents + blank_t->offset + blank_t->size,
-+ sec->size - (blank_t->offset + blank_t->size));
-+ sec->size -= blank_t->total_size + blank_t->size;
-+ }
-+ else
-+ /* This blank is not entirely included in the section,
-+ reduce the section size by only part of the blank size. */
-+ sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
-+
-+ while (blank_head)
-+ {
-+ blank_t = blank_head;
-+ blank_head = blank_head->next;
-+ remove_nds32_elf_blank (blank_t);
-+ }
-+
-+ return TRUE;
-+}
-+
-+/* Get the contents of a section. */
-+
-+static int
-+nds32_get_section_contents (bfd *abfd, asection *sec,
-+ bfd_byte **contents_p, bfd_boolean cache)
-+{
-+ /* Get the section contents. */
-+ if (elf_section_data (sec)->this_hdr.contents != NULL)
-+ *contents_p = elf_section_data (sec)->this_hdr.contents;
-+ else
-+ {
-+ if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
-+ return FALSE;
-+ if (cache)
-+ elf_section_data (sec)->this_hdr.contents = *contents_p;
-+ }
-+
-+ return TRUE;
-+}
-+
-+/* Get the contents of the internal symbol of abfd. */
-+
-+static int
-+nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
-+ Elf_Internal_Sym **isymbuf_p)
-+{
-+ Elf_Internal_Shdr *symtab_hdr;
-+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
-+
-+ /* Read this BFD's local symbols if we haven't done so already. */
-+ if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
-+ {
-+ *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
-+ if (*isymbuf_p == NULL)
-+ {
-+ *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
-+ symtab_hdr->sh_info, 0,
-+ NULL, NULL, NULL);
-+ if (*isymbuf_p == NULL)
-+ return FALSE;
-+ }
-+ }
-+ symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
-+
-+ return TRUE;
-+}
-+
-+/* Range of small data. */
-+static bfd_vma sdata_range[2][2];
-+static bfd_vma const sdata_init_range[2] =
-+{ ACCURATE_12BIT_S1, ACCURATE_19BIT };
-+
-+static int
-+nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
-+ bfd_byte *contents, bfd_vma addr)
-+{
-+ unsigned long insn = bfd_getb32 (contents + addr);
-+
-+ if (insn & 0x80000000)
-+ return 2;
-+
-+ return 4;
-+}
-+
-+/* Set the gp relax range. We have to measure the safe range
-+ to do gp relaxation. */
-+
-+static void
-+relax_range_measurement (bfd *abfd)
-+{
-+ asection *sec_f, *sec_b;
-+ /* For upper bound. */
-+ bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
-+ bfd_vma align;
-+ static int decide_relax_range = 0;
-+ int i;
-+ int range_number = ARRAY_SIZE (sdata_init_range);
-+
-+ if (decide_relax_range)
-+ return;
-+ decide_relax_range = 1;
-+
-+ if (sda_rela_sec == NULL)
-+ {
-+ /* Since there is no data sections, we assume the range is page size. */
-+ for (i = 0; i < range_number; i++)
-+ {
-+ sdata_range[i][0] = sdata_init_range[i] - 0x1000;
-+ sdata_range[i][1] = sdata_init_range[i] - 0x1000;
-+ }
-+ return;
-+ }
-+
-+ /* Get the biggest alignment power after the gp located section. */
-+ sec_f = sda_rela_sec->output_section;
-+ sec_b = sec_f->next;
-+ align = 0;
-+ while (sec_b != NULL)
-+ {
-+ if ((unsigned)(1 << sec_b->alignment_power) > align)
-+ align = (1 << sec_b->alignment_power);
-+ sec_b = sec_b->next;
-+ }
-+
-+ /* I guess we can not determine the section before
-+ gp located section, so we assume the align is max page size. */
-+ for (i = 0; i < range_number; i++)
-+ {
-+ sdata_range[i][1] = sdata_init_range[i] - align;
-+ BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
-+ sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
-+ BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
-+ }
-+}
-+
-+/* These are macros used to check flags encoded in r_addend.
-+ They are only used by nds32_elf_relax_section (). */
-+#define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
-+#define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
-+#define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
-+#define IS_16BIT_ON(addend) ((addend) & 0x20000000)
-+
-+/* Relax LONGCALL1 relocation for nds32_elf_relax_section.*/
-+
-+static bfd_boolean
-+nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs, int *insn_len,
-+ bfd_byte *contents, Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ /* There are 3 variations for LONGCALL1
-+ case 4-4-2; 16-bit on, optimize off or optimize for space
-+ sethi ta, hi20(symbol) ; LONGCALL1/HI20
-+ ori ta, ta, lo12(symbol) ; LO12S0
-+ jral5 ta ;
-+
-+ case 4-4-4; 16-bit off, optimize don't care
-+ sethi ta, hi20(symbol) ; LONGCALL1/HI20
-+ ori ta, ta, lo12(symbol) ; LO12S0
-+ jral ta ;
-+
-+ case 4-4-4; 16-bit on, optimize for speed
-+ sethi ta, hi20(symbol) ; LONGCALL1/HI20
-+ ori ta, ta, lo12(symbol) ; LO12S0
-+ jral ta ;
-+ Check code for -mlong-calls output. */
-+
-+ /* Get the reloc for the address from which the register is
-+ being loaded. This reloc will tell us which function is
-+ actually being called. */
-+
-+ bfd_vma laddr;
-+ int seq_len; /* Original length of instruction sequence. */
-+ uint32_t insn;
-+ Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
-+ bfd_signed_vma foff;
-+ uint16_t insn16;
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ seq_len = GET_SEQ_LEN (irel->r_addend);
-+ laddr = irel->r_offset;
-+ *insn_len = seq_len;
-+
-+ hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_HI20_RELA, laddr);
-+ lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_LO12S0_ORI_RELA,
-+ laddr + 4);
-+
-+ if (hi_irelfn == irelend || lo_irelfn == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_LONGCALL1 points to unrecognized"
-+ "reloc at 0x%lx.", abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+
-+ /* Get the value of the symbol referred to by the reloc. */
-+ foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr);
-+
-+ /* This condition only happened when symbol is undefined. */
-+ if (foff == 0 || foff < -CONSERVATIVE_24BIT_S1
-+ || foff >= CONSERVATIVE_24BIT_S1)
-+ return FALSE;
-+
-+ /* Relax to: jal symbol; 25_PCREL */
-+ /* For simplicity of coding, we are going to modify the section
-+ contents, the section relocs, and the BFD symbol table. We
-+ must tell the rest of the code not to free up this
-+ information. It would be possible to instead create a table
-+ of changes which have to be made, as is done in coff-mips.c;
-+ that would be more work, but would require less memory when
-+ the linker is run. */
-+
-+ /* Replace the long call with a jal. */
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
-+ R_NDS32_25_PCREL_RELA);
-+ irel->r_addend = hi_irelfn->r_addend;
-+
-+ /* We don't resolve this here but resolve it in relocate_section. */
-+ insn = INSN_JAL;
-+ bfd_putb32 (insn, contents + irel->r_offset);
-+
-+ hi_irelfn->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
-+ lo_irelfn->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
-+ *insn_len = 4;
-+
-+ if (seq_len & 0x2)
-+ {
-+ insn16 = NDS32_NOP16;
-+ bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
-+ lo_irelfn->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
-+ lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
-+ *insn_len += 2;
-+ }
-+ return TRUE;
-+}
-+
-+#define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
-+/* Relax LONGCALL2 relocation for nds32_elf_relax_section.*/
-+
-+static bfd_boolean
-+nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs, int *insn_len,
-+ bfd_byte *contents, Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ /* bltz rt, .L1 ; LONGCALL2
-+ jal symbol ; 25_PCREL
-+ .L1: */
-+
-+ /* Get the reloc for the address from which the register is
-+ being loaded. This reloc will tell us which function is
-+ actually being called. */
-+
-+ bfd_vma laddr;
-+ uint32_t insn;
-+ Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
-+ bfd_signed_vma foff;
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ laddr = irel->r_offset;
-+ i1_irelfn =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_25_PCREL_RELA, laddr + 4);
-+
-+ if (i1_irelfn == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_LONGCALL2 points to unrecognized"
-+ "reloc at 0x%lx.", abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+
-+ insn = bfd_getb32 (contents + laddr);
-+
-+ /* Get the value of the symbol referred to by the reloc. */
-+ foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr);
-+
-+ if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
-+ || foff >= CONSERVATIVE_16BIT_S1)
-+ return FALSE;
-+
-+ /* Relax to bgezal rt, label ; 17_PCREL
-+ or bltzal rt, label ; 17_PCREL */
-+
-+ /* Convert to complimentary conditional call. */
-+ insn = CONVERT_CONDITION_CALL (insn);
-+
-+ /* For simplicity of coding, we are going to modify the section
-+ contents, the section relocs, and the BFD symbol table. We
-+ must tell the rest of the code not to free up this
-+ information. It would be possible to instead create a table
-+ of changes which have to be made, as is done in coff-mips.c;
-+ that would be more work, but would require less memory when
-+ the linker is run. */
-+
-+ /* Clean unnessary relocations. */
-+ i1_irelfn->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
-+ cond_irelfn =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_17_PCREL_RELA, laddr);
-+ if (cond_irelfn != irelend)
-+ cond_irelfn->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
-+
-+ /* Replace the long call with a bgezal. */
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
-+ R_NDS32_17_PCREL_RELA);
-+ irel->r_addend = i1_irelfn->r_addend;
-+
-+ bfd_putb32 (insn, contents + irel->r_offset);
-+
-+ *insn_len = 4;
-+ return TRUE;
-+}
-+
-+/* Relax LONGCALL3 relocation for nds32_elf_relax_section.*/
-+
-+static bfd_boolean
-+nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs, int *insn_len,
-+ bfd_byte *contents, Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ /* There are 3 variations for LONGCALL3
-+ case 4-4-4-2; 16-bit on, optimize off or optimize for space
-+ bltz rt, $1 ; LONGCALL3
-+ sethi ta, hi20(symbol) ; HI20
-+ ori ta, ta, lo12(symbol) ; LO12S0
-+ jral5 ta ;
-+ $1
-+
-+ case 4-4-4-4; 16-bit off, optimize don't care
-+ bltz rt, $1 ; LONGCALL3
-+ sethi ta, hi20(symbol) ; HI20
-+ ori ta, ta, lo12(symbol) ; LO12S0
-+ jral ta ;
-+ $1
-+
-+ case 4-4-4-4; 16-bit on, optimize for speed
-+ bltz rt, $1 ; LONGCALL3
-+ sethi ta, hi20(symbol) ; HI20
-+ ori ta, ta, lo12(symbol) ; LO12S0
-+ jral ta ;
-+ $1 */
-+
-+ /* Get the reloc for the address from which the register is
-+ being loaded. This reloc will tell us which function is
-+ actually being called. */
-+
-+ bfd_vma laddr;
-+ int seq_len; /* Original length of instruction sequence. */
-+ uint32_t insn;
-+ Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
-+ bfd_signed_vma foff;
-+ uint16_t insn16;
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ seq_len = GET_SEQ_LEN (irel->r_addend);
-+ laddr = irel->r_offset;
-+ *insn_len = seq_len;
-+
-+ hi_irelfn =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_HI20_RELA, laddr + 4);
-+ lo_irelfn =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_LO12S0_ORI_RELA, laddr + 8);
-+
-+ if (hi_irelfn == irelend || lo_irelfn == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_LONGCALL3 points to unrecognized"
-+ "reloc at 0x%lx.", abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+
-+ /* Get the value of the symbol referred to by the reloc. */
-+ foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr);
-+
-+ if (foff == 0 || foff < -CONSERVATIVE_24BIT_S1
-+ || foff >= CONSERVATIVE_24BIT_S1)
-+ return FALSE;
-+
-+ insn = bfd_getb32 (contents + laddr);
-+ if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
-+ {
-+ /* Relax to bgezal rt, label ; 17_PCREL
-+ or bltzal rt, label ; 17_PCREL */
-+
-+ /* Convert to complimentary conditional call. */
-+ insn = CONVERT_CONDITION_CALL (insn);
-+ bfd_putb32 (insn, contents + irel->r_offset);
-+
-+ *insn_len = 4;
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
-+ hi_irelfn->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
-+ lo_irelfn->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
-+
-+ cond_irelfn =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_17_PCREL_RELA, laddr);
-+ if (cond_irelfn != irelend)
-+ {
-+ cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
-+ R_NDS32_17_PCREL_RELA);
-+ cond_irelfn->r_addend = hi_irelfn->r_addend;
-+ }
-+
-+ if (seq_len & 0x2)
-+ {
-+ insn16 = NDS32_NOP16;
-+ bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
-+ hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
-+ R_NDS32_INSN16);
-+ hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
-+ insn_len += 2;
-+ }
-+ }
-+ else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
-+ {
-+ /* Relax to the following instruction sequence
-+ bltz rt, $1 ; LONGCALL2
-+ jal symbol ; 25_PCREL
-+ $1 */
-+ *insn_len = 8;
-+ insn = INSN_JAL;
-+ bfd_putb32 (insn, contents + hi_irelfn->r_offset);
-+
-+ hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
-+ R_NDS32_25_PCREL_RELA);
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
-+
-+ lo_irelfn->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
-+
-+ if (seq_len & 0x2)
-+ {
-+ insn16 = NDS32_NOP16;
-+ bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
-+ lo_irelfn->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
-+ lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
-+ insn_len += 2;
-+ }
-+ }
-+ return TRUE;
-+}
-+
-+/* Relax LONGJUMP1 relocation for nds32_elf_relax_section.*/
-+
-+static bfd_boolean
-+nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs, int *insn_len,
-+ bfd_byte *contents, Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ /* There are 3 variations for LONGJUMP1
-+ case 4-4-2; 16-bit bit on, optimize off or optimize for space
-+ sethi ta, hi20(symbol) ; LONGJUMP1/HI20
-+ ori ta, ta, lo12(symbol) ; LO12S0
-+ jr5 ta ;
-+
-+ case 4-4-4; 16-bit off, optimize don't care
-+ sethi ta, hi20(symbol) ; LONGJUMP1/HI20
-+ ori ta, ta, lo12(symbol) ; LO12S0
-+ jr ta ;
-+
-+ case 4-4-4; 16-bit on, optimize for speed
-+ sethi ta, hi20(symbol) ; LONGJUMP1/HI20
-+ ori ta, ta, lo12(symbol) ; LO12S0
-+ jr ta ; */
-+
-+ /* Get the reloc for the address from which the register is
-+ being loaded. This reloc will tell us which function is
-+ actually being called. */
-+
-+ bfd_vma laddr;
-+ int seq_len; /* Original length of instruction sequence. */
-+ int insn16_on; /* 16-bit on/off. */
-+ uint32_t insn;
-+ Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
-+ bfd_signed_vma foff;
-+ uint16_t insn16;
-+ unsigned long reloc;
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ seq_len = GET_SEQ_LEN (irel->r_addend);
-+ laddr = irel->r_offset;
-+ *insn_len = seq_len;
-+ insn16_on = IS_16BIT_ON (irel->r_addend);
-+
-+ hi_irelfn =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_HI20_RELA, laddr);
-+ lo_irelfn =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_LO12S0_ORI_RELA, laddr + 4);
-+ if (hi_irelfn == irelend || lo_irelfn == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_LONGJUMP1 points to unrecognized"
-+ "reloc at 0x%lx.", abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+
-+ /* Get the value of the symbol referred to by the reloc. */
-+ foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr);
-+
-+ if (foff == 0 || foff >= CONSERVATIVE_24BIT_S1
-+ || foff < -CONSERVATIVE_24BIT_S1)
-+ return FALSE;
-+
-+ if (insn16_on && foff >= -ACCURATE_8BIT_S1
-+ && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
-+ {
-+ /* j8 label */
-+ /* 16-bit on, but not optimized for speed. */
-+ reloc = R_NDS32_9_PCREL_RELA;
-+ insn16 = INSN_J8;
-+ bfd_putb16 (insn16, contents + irel->r_offset);
-+ *insn_len = 2;
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
-+ }
-+ else
-+ {
-+ /* j label */
-+ reloc = R_NDS32_25_PCREL_RELA;
-+ insn = INSN_J;
-+ bfd_putb32 (insn, contents + irel->r_offset);
-+ *insn_len = 4;
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
-+ irel->r_addend = 0;
-+ }
-+
-+ hi_irelfn->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
-+ lo_irelfn->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
-+
-+ if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
-+ {
-+ insn16 = NDS32_NOP16;
-+ bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
-+ lo_irelfn->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
-+ R_NDS32_INSN16);
-+ lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
-+ *insn_len += 2;
-+ }
-+ return TRUE;
-+}
-+
-+/* Revert condition branch. This function does not check if the input
-+ instruction is condition branch or not. */
-+
-+static void
-+nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
-+ uint16_t *re_insn16, uint32_t *re_insn)
-+{
-+ uint32_t comp_insn = 0;
-+ uint16_t comp_insn16 = 0;
-+
-+ if (insn)
-+ {
-+ if (N32_OP6 (insn) == N32_OP6_BR1)
-+ {
-+ /* beqs label. */
-+ comp_insn = (insn ^ 0x4000) & 0xffffc000;
-+ if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
-+ {
-+ /* Insn can be contracted to 16-bit implied r5. */
-+ comp_insn16 =
-+ (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
-+ comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
-+ }
-+ }
-+ else if (N32_OP6 (insn) == N32_OP6_BR3)
-+ {
-+ /* bnec $ta, imm11, label. */
-+ comp_insn = (insn ^ 0x80000) & 0xffffff00;
-+ }
-+ else
-+ {
-+ comp_insn = (insn ^ 0x10000) & 0xffffc000;
-+ if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
-+ || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
-+ {
-+ if (N32_IS_RT3 (insn))
-+ {
-+ /* Insn can be contracted to 16-bit. */
-+ comp_insn16 =
-+ (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
-+ comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
-+ }
-+ else if (N32_RT5 (insn) == REG_R15)
-+ {
-+ /* Insn can be contracted to 16-bit. */
-+ comp_insn16 =
-+ (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
-+ }
-+ }
-+ }
-+ }
-+ else
-+ {
-+ switch ((insn16 & 0xf000) >> 12)
-+ {
-+ case 0xc:
-+ /* beqz38 or bnez38 */
-+ comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
-+ comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
-+ comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
-+ break;
-+
-+ case 0xd:
-+ /* beqs38 or bnes38 */
-+ comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
-+ comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
-+ comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
-+ | (REG_R5 << 15);
-+ break;
-+
-+ case 0xe:
-+ /* beqzS8 or bnezS8 */
-+ comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
-+ comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
-+ comp_insn |= REG_R15 << 20;
-+ break;
-+
-+ default:
-+ break;
-+ }
-+ }
-+ if (comp_insn && re_insn)
-+ *re_insn = comp_insn;
-+ if (comp_insn16 && re_insn16)
-+ *re_insn16 = comp_insn16;
-+}
-+
-+/* Relax LONGJUMP2 relocation for nds32_elf_relax_section.*/
-+
-+static bfd_boolean
-+nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs, int *insn_len,
-+ bfd_byte *contents, Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ /* There are 3 variations for LONGJUMP2
-+ case 2-4; 1st insn convertible, 16-bit on,
-+ optimize off or optimize for space
-+ bnes38 rt, ra, $1 ; LONGJUMP2
-+ j label ; 25_PCREL
-+ $1:
-+
-+ case 4-4; 1st insn not convertible
-+ bne rt, ra, $1 ; LONGJUMP2
-+ j label ; 25_PCREL
-+ $1:
-+
-+ case 4-4; 1st insn convertible, 16-bit on, optimize for speed
-+ bne rt, ra, $1 ; LONGJUMP2
-+ j label ; 25_PCREL
-+ $1: */
-+
-+ /* Get the reloc for the address from which the register is
-+ being loaded. This reloc will tell us which function is
-+ actually being called. */
-+
-+ bfd_vma laddr;
-+ int seq_len; /* Original length of instruction sequence. */
-+ Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
-+ int first_size;
-+ unsigned int i;
-+ bfd_signed_vma foff;
-+ uint32_t insn, re_insn = 0;
-+ uint16_t insn16, re_insn16 = 0;
-+ unsigned long reloc, cond_reloc;
-+
-+ enum elf_nds32_reloc_type checked_types[] =
-+ { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ seq_len = GET_SEQ_LEN (irel->r_addend);
-+ laddr = irel->r_offset;
-+ *insn_len = seq_len;
-+ first_size = (seq_len == 6) ? 2 : 4;
-+
-+ i2_irelfn =
-+ find_relocs_at_address_addr (irel, internal_relocs,
-+ irelend, R_NDS32_25_PCREL_RELA,
-+ laddr + first_size);
-+
-+ for (i = 0; i < ARRAY_SIZE (checked_types); i++)
-+ {
-+ cond_irelfn =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ checked_types[i], laddr);
-+ if (cond_irelfn != irelend)
-+ break;
-+ }
-+
-+ if (i2_irelfn == irelend || cond_irelfn == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_LONGJUMP2 points to unrecognized"
-+ "reloc at 0x%lx.", abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+
-+ /* Get the value of the symbol referred to by the reloc. */
-+ foff =
-+ calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr);
-+ if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
-+ || foff >= CONSERVATIVE_16BIT_S1)
-+ return FALSE;
-+
-+ /* Get the all corresponding instructions. */
-+ if (first_size == 4)
-+ {
-+ insn = bfd_getb32 (contents + laddr);
-+ nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
-+ }
-+ else
-+ {
-+ insn16 = bfd_getb16 (contents + laddr);
-+ nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
-+ }
-+
-+ if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
-+ && foff < ACCURATE_8BIT_S1 - first_size)
-+ {
-+ if (first_size == 4)
-+ {
-+ /* Don't convert it to 16-bit now, keep this as relaxable for
-+ ``label reloc; INSN16''. */
-+
-+ /* Save comp_insn32 to buffer. */
-+ bfd_putb32 (re_insn, contents + irel->r_offset);
-+ *insn_len = 4;
-+ reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
-+ R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
-+ cond_reloc = R_NDS32_INSN16;
-+ }
-+ else
-+ {
-+ bfd_putb16 (re_insn16, contents + irel->r_offset);
-+ *insn_len = 2;
-+ reloc = R_NDS32_9_PCREL_RELA;
-+ cond_reloc = R_NDS32_NONE;
-+ }
-+ }
-+ else if (N32_OP6 (re_insn) == N32_OP6_BR1
-+ && (foff >= -(ACCURATE_14BIT_S1 - first_size)
-+ && foff < ACCURATE_14BIT_S1 - first_size))
-+ {
-+ /* beqs label ; 15_PCREL */
-+ bfd_putb32 (re_insn, contents + irel->r_offset);
-+ *insn_len = 4;
-+ reloc = R_NDS32_15_PCREL_RELA;
-+ cond_reloc = R_NDS32_NONE;
-+ }
-+ else if (N32_OP6 (re_insn) == N32_OP6_BR2
-+ && foff >= -CONSERVATIVE_16BIT_S1
-+ && foff < CONSERVATIVE_16BIT_S1)
-+ {
-+ /* beqz label ; 17_PCREL */
-+ bfd_putb32 (re_insn, contents + irel->r_offset);
-+ *insn_len = 4;
-+ reloc = R_NDS32_17_PCREL_RELA;
-+ cond_reloc = R_NDS32_NONE;
-+ }
-+ else
-+ return FALSE;
-+
-+ /* Set all relocations. */
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
-+ irel->r_addend = i2_irelfn->r_addend;
-+
-+ cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
-+ cond_reloc);
-+ cond_irelfn->r_addend = 0;
-+
-+ if ((seq_len ^ *insn_len ) & 0x2)
-+ {
-+ insn16 = NDS32_NOP16;
-+ bfd_putb16 (insn16, contents + irel->r_offset + 4);
-+ i2_irelfn->r_offset = 4;
-+ i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
-+ R_NDS32_INSN16);
-+ i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
-+ *insn_len += 2;
-+ }
-+ else
-+ i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
-+ R_NDS32_NONE);
-+ return TRUE;
-+}
-+
-+/* Relax LONGJUMP3 relocation for nds32_elf_relax_section.*/
-+
-+static bfd_boolean
-+nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs, int *insn_len,
-+ bfd_byte *contents, Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ /* There are 5 variations for LONGJUMP3
-+ case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
-+ optimize off or optimize for space
-+ bnes38 rt, ra, $1 ; LONGJUMP3
-+ sethi ta, hi20(symbol) ; HI20
-+ ori ta, ta, lo12(symbol) ; LO12S0
-+ jr5 ta ;
-+ $1: ;
-+
-+ case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
-+ bnes38 rt, ra, $1 ; LONGJUMP3
-+ sethi ta, hi20(symbol) ; HI20
-+ ori ta, ta, lo12(symbol) ; LO12S0
-+ jr5 ta ;
-+ $1: ; LABEL
-+
-+ case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
-+ optimize off or optimize for space
-+ bne rt, ra, $1 ; LONGJUMP3
-+ sethi ta, hi20(symbol) ; HI20
-+ ori ta, ta, lo12(symbol) ; LO12S0
-+ jr5 ta ;
-+ $1: ;
-+
-+ case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
-+ 16-bit off if no INSN16
-+ bne rt, ra, $1 ; LONGJUMP3
-+ sethi ta, hi20(symbol) ; HI20
-+ ori ta, ta, lo12(symbol) ; LO12S0
-+ jr ta ;
-+ $1: ;
-+
-+ case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
-+ 16-bit off if no INSN16
-+ bne rt, ra, $1 ; LONGJUMP3
-+ sethi ta, hi20(symbol) ; HI20
-+ ori ta, ta, lo12(symbol) ; LO12S0
-+ jr ta ;
-+ $1: ; LABEL */
-+
-+ /* Get the reloc for the address from which the register is
-+ being loaded. This reloc will tell us which function is
-+ actually being called. */
-+ enum elf_nds32_reloc_type checked_types[] =
-+ { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
-+
-+ int reloc_off = 0, cond_removed = 0, convertible;
-+ bfd_vma laddr;
-+ int seq_len; /* Original length of instruction sequence. */
-+ Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
-+ int first_size;
-+ unsigned int i;
-+ bfd_signed_vma foff;
-+ uint32_t insn, re_insn = 0;
-+ uint16_t insn16, re_insn16 = 0;
-+ unsigned long reloc, cond_reloc;
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ seq_len = GET_SEQ_LEN (irel->r_addend);
-+ laddr = irel->r_offset;
-+ *insn_len = seq_len;
-+
-+ convertible = IS_1ST_CONVERT (irel->r_addend);
-+
-+ if (convertible)
-+ first_size = 2;
-+ else
-+ first_size = 4;
-+
-+ /* Get all needed relocations. */
-+ hi_irelfn =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_HI20_RELA, laddr + first_size);
-+ lo_irelfn =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_LO12S0_ORI_RELA,
-+ laddr + first_size + 4);
-+
-+ for (i = 0; i < ARRAY_SIZE (checked_types); i++)
-+ {
-+ cond_irelfn =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ checked_types[i], laddr);
-+ if (cond_irelfn != irelend)
-+ break;
-+ }
-+
-+ if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_LONGJUMP3 points to unrecognized"
-+ "reloc at 0x%lx.", abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+
-+ /* Get the value of the symbol referred to by the reloc. */
-+ foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr);
-+
-+ if (foff == 0 || foff < -CONSERVATIVE_24BIT_S1
-+ || foff >= CONSERVATIVE_24BIT_S1)
-+ return FALSE;
-+
-+ /* Get the all corresponding instructions. */
-+ if (first_size == 4)
-+ {
-+ insn = bfd_getb32 (contents + laddr);
-+ nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
-+ }
-+ else
-+ {
-+ insn16 = bfd_getb16 (contents + laddr);
-+ nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
-+ }
-+
-+ /* For simplicity of coding, we are going to modify the section
-+ contents, the section relocs, and the BFD symbol table. We
-+ must tell the rest of the code not to free up this
-+ information. It would be possible to instead create a table
-+ of changes which have to be made, as is done in coff-mips.c;
-+ that would be more work, but would require less memory when
-+ the linker is run. */
-+
-+ if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
-+ && foff < ACCURATE_8BIT_S1 - first_size)
-+ {
-+ if (!(seq_len & 0x2))
-+ {
-+ /* Don't convert it to 16-bit now, keep this as relaxable
-+ for ``label reloc; INSN1a''6. */
-+ /* Save comp_insn32 to buffer. */
-+ bfd_putb32 (re_insn, contents + irel->r_offset);
-+ *insn_len = 4;
-+ reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
-+ R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
-+ cond_reloc = R_NDS32_INSN16;
-+ }
-+ else
-+ {
-+ /* Not optimize for speed; convert sequence to 16-bit. */
-+ /* Save comp_insn16 to buffer. */
-+ bfd_putb16 (re_insn16, contents + irel->r_offset);
-+ *insn_len = 2;
-+ reloc = R_NDS32_9_PCREL_RELA;
-+ cond_reloc = R_NDS32_NONE;
-+ }
-+ cond_removed = 1;
-+ }
-+ else if (N32_OP6 (re_insn) == N32_OP6_BR1
-+ && (foff >= -(ACCURATE_14BIT_S1 - first_size)
-+ && foff < ACCURATE_14BIT_S1 - first_size))
-+ {
-+ /* beqs label ; 15_PCREL */
-+ bfd_putb32 (re_insn, contents + irel->r_offset);
-+ *insn_len = 4;
-+ reloc = R_NDS32_15_PCREL_RELA;
-+ cond_reloc = R_NDS32_NONE;
-+ cond_removed = 1;
-+ }
-+ else if (N32_OP6 (re_insn) == N32_OP6_BR2
-+ && foff >= -CONSERVATIVE_16BIT_S1
-+ && foff < CONSERVATIVE_16BIT_S1)
-+ {
-+ /* beqz label ; 17_PCREL */
-+ bfd_putb32 (re_insn, contents + irel->r_offset);
-+ *insn_len = 4;
-+ reloc = R_NDS32_17_PCREL_RELA;
-+ cond_reloc = R_NDS32_NONE;
-+ cond_removed = 1;
-+ }
-+ else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
-+ && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
-+ {
-+ /* Relax to one of the following 3 variations
-+
-+ case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
-+ for space
-+ bnes38 rt, $1 ; LONGJUMP2
-+ j label ; 25_PCREL
-+ $1
-+
-+ case 4-4; 1st insn not convertible, others don't care
-+ bne rt, ra, $1 ; LONGJUMP2
-+ j label ; 25_PCREL
-+ $1
-+
-+ case 4-4; 1st insn convertible, 16-bit on, optimize for speed
-+ bne rt, ra, $1 ; LONGJUMP2
-+ j label ; 25_PCREL
-+ $1 */
-+
-+ /* Offset for first instruction. */
-+
-+ /* Use j label as second instruction. */
-+ *insn_len = 4 + first_size;
-+ insn = INSN_J;
-+ bfd_putb32 (insn, contents + hi_irelfn->r_offset);
-+ reloc = R_NDS32_LONGJUMP2;
-+ cond_reloc = R_NDS32_25_PLTREL;
-+ }
-+ else
-+ return FALSE;
-+
-+ if (cond_removed == 1)
-+ {
-+ /* Set all relocations. */
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
-+ irel->r_addend = hi_irelfn->r_addend;
-+
-+ cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
-+ cond_reloc);
-+ cond_irelfn->r_addend = 0;
-+ hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
-+ R_NDS32_NONE);
-+ }
-+ else
-+ {
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
-+ irel->r_addend = irel->r_addend;
-+ hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
-+ cond_reloc);
-+ }
-+
-+ if ((seq_len ^ *insn_len ) & 0x2)
-+ {
-+ insn16 = NDS32_NOP16;
-+ bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
-+ lo_irelfn->r_offset = *insn_len;
-+ lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
-+ R_NDS32_INSN16);
-+ lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
-+ *insn_len += 2;
-+ }
-+ else
-+ lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
-+ R_NDS32_NONE);
-+ return TRUE;
-+}
-+
-+/* Relax LONGCALL4 relocation for nds32_elf_relax_section.*/
-+
-+static bfd_boolean
-+nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs, int *insn_len,
-+ bfd_byte *contents, Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ /* The pattern for LONGCALL4. Support for function cse.
-+ sethi ta, hi20(symbol) ; LONGCALL4/HI20
-+ ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
-+ jral ta ; PTR_RES/EMPTY/INSN16 */
-+
-+ bfd_vma laddr;
-+ uint32_t insn;
-+ Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
-+ Elf_Internal_Rela *irelend;
-+ bfd_signed_vma foff;
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ laddr = irel->r_offset;
-+
-+ /* Get the reloc for the address from which the register is
-+ being loaded. This reloc will tell us which function is
-+ actually being called. */
-+ hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_HI20_RELA, laddr);
-+
-+ if (hi_irel == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
-+ "reloc at 0x%lx.", abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+
-+ /* Get the value of the symbol referred to by the reloc. */
-+ foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr);
-+
-+ /* This condition only happened when symbol is undefined. */
-+ if (foff == 0 || foff < -CONSERVATIVE_24BIT_S1
-+ || foff >= CONSERVATIVE_24BIT_S1)
-+ return FALSE;
-+
-+ /* Relax to: jal symbol; 25_PCREL */
-+ /* For simplicity of coding, we are going to modify the section
-+ contents, the section relocs, and the BFD symbol table. We
-+ must tell the rest of the code not to free up this
-+ information. It would be possible to instead create a table
-+ of changes which have to be made, as is done in coff-mips.c;
-+ that would be more work, but would require less memory when
-+ the linker is run. */
-+
-+ ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_PTR_RESOLVED, irel->r_addend);
-+ em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_EMPTY, irel->r_addend);
-+
-+ if (ptr_irel == irelend || em_irel == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_LONGCALL4 points to unrecognized"
-+ "reloc at 0x%lx.", abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+ /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
-+ insn = bfd_getb32 (contents + irel->r_addend);
-+ if (insn & 0x80000000)
-+ return FALSE;
-+
-+ /* Replace the long call with a jal. */
-+ em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
-+ R_NDS32_25_PCREL_RELA);
-+ ptr_irel->r_addend = 1;
-+
-+ /* We don't resolve this here but resolve it in relocate_section. */
-+ insn = INSN_JAL;
-+ bfd_putb32 (insn, contents + em_irel->r_offset);
-+
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
-+
-+ /* If there is function cse, HI20 can not remove now. */
-+ call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_LONGCALL4, laddr);
-+ if (call_irel == irelend)
-+ {
-+ *insn_len = 0;
-+ hi_irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
-+ }
-+
-+ insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_INSN16, irel->r_addend);
-+ if (insn_irel != irelend)
-+ insn_irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
-+
-+ return TRUE;
-+}
-+
-+/* Relax LONGCALL5 relocation for nds32_elf_relax_section.*/
-+
-+static bfd_boolean
-+nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs, int *insn_len,
-+ bfd_byte *contents, Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ /* The pattern for LONGCALL5.
-+ bltz rt, .L1 ; LONGCALL5/17_PCREL
-+ jal symbol ; 25_PCREL
-+ .L1: */
-+
-+ bfd_vma laddr;
-+ uint32_t insn;
-+ Elf_Internal_Rela *cond_irel, *irelend;
-+ bfd_signed_vma foff;
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ laddr = irel->r_offset;
-+ insn = bfd_getb32 (contents + laddr);
-+
-+ /* Get the reloc for the address from which the register is
-+ being loaded. This reloc will tell us which function is
-+ actually being called. */
-+ cond_irel =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_25_PCREL_RELA, irel->r_addend);
-+ if (cond_irel == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_LONGCALL5 points to unrecognized"
-+ "reloc at 0x%lx.", abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+
-+ /* Get the value of the symbol referred to by the reloc. */
-+ foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr);
-+
-+ if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
-+ || foff >= CONSERVATIVE_16BIT_S1)
-+ return FALSE;
-+
-+ /* Relax to bgezal rt, label ; 17_PCREL
-+ or bltzal rt, label ; 17_PCREL */
-+
-+ /* Convert to complimentary conditional call. */
-+ insn = CONVERT_CONDITION_CALL (insn);
-+
-+ /* For simplicity of coding, we are going to modify the section
-+ contents, the section relocs, and the BFD symbol table. We
-+ must tell the rest of the code not to free up this
-+ information. It would be possible to instead create a table
-+ of changes which have to be made, as is done in coff-mips.c;
-+ that would be more work, but would require less memory when
-+ the linker is run. */
-+
-+ /* Modify relocation and contents. */
-+ cond_irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
-+
-+ /* Replace the long call with a bgezal. */
-+ bfd_putb32 (insn, contents + cond_irel->r_offset);
-+ *insn_len = 0;
-+
-+ /* Clean unnessary relocations. */
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
-+
-+ cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_17_PCREL_RELA, laddr);
-+ cond_irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
-+
-+ return TRUE;
-+}
-+
-+/* Relax LONGCALL6 relocation for nds32_elf_relax_section.*/
-+
-+static bfd_boolean
-+nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs, int *insn_len,
-+ bfd_byte *contents, Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ /* The pattern for LONGCALL6.
-+ bltz rt, .L1 ; LONGCALL6/17_PCREL
-+ sethi ta, hi20(symbol) ; HI20/PTR
-+ ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
-+ jral ta ; PTR_RES/EMPTY/INSN16
-+ .L1 */
-+
-+ bfd_vma laddr;
-+ uint32_t insn;
-+ Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
-+ bfd_signed_vma foff;
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ laddr = irel->r_offset;
-+
-+ /* Get the reloc for the address from which the register is
-+ being loaded. This reloc will tell us which function is
-+ actually being called. */
-+ em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_EMPTY, irel->r_addend);
-+
-+ if (em_irel == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
-+ "reloc at 0x%lx.", abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+
-+ /* Get the value of the symbol referred to by the reloc. */
-+ foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr);
-+
-+ if (foff == 0 || foff < -CONSERVATIVE_24BIT_S1
-+ || foff >= CONSERVATIVE_24BIT_S1)
-+ return FALSE;
-+
-+ /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
-+ insn = bfd_getb32 (contents + irel->r_addend);
-+ if (insn & 0x80000000)
-+ return FALSE;
-+
-+ insn = bfd_getb32 (contents + laddr);
-+ if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
-+ {
-+ /* Relax to bgezal rt, label ; 17_PCREL
-+ or bltzal rt, label ; 17_PCREL */
-+
-+ /* Convert to complimentary conditional call. */
-+ *insn_len = 0;
-+ insn = CONVERT_CONDITION_CALL (insn);
-+ bfd_putb32 (insn, contents + em_irel->r_offset);
-+
-+ em_irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
-+
-+ /* Set resolved relocation. */
-+ cond_irel =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_PTR_RESOLVED, irel->r_addend);
-+ if (cond_irel == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
-+ "reloc at 0x%lx.", abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+ cond_irel->r_addend = 1;
-+
-+ /* Clear relocations. */
-+
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
-+
-+ cond_irel =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_17_PCREL_RELA, laddr);
-+ if (cond_irel != irelend)
-+ cond_irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
-+
-+ cond_irel =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_INSN16, irel->r_addend);
-+ if (cond_irel != irelend)
-+ cond_irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
-+
-+ }
-+ else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
-+ {
-+ /* Relax to the following instruction sequence
-+ bltz rt, .L1 ; LONGCALL2/17_PCREL
-+ jal symbol ; 25_PCREL/PTR_RES
-+ .L1 */
-+ *insn_len = 4;
-+ /* Convert instruction. */
-+ insn = INSN_JAL;
-+ bfd_putb32 (insn, contents + em_irel->r_offset);
-+
-+ /* Convert relocations. */
-+ em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
-+ R_NDS32_25_PCREL_RELA);
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
-+
-+ /* Set resolved relocation. */
-+ cond_irel =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_PTR_RESOLVED, irel->r_addend);
-+ if (cond_irel == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_LONGCALL6 points to unrecognized"
-+ "reloc at 0x%lx.", abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+ cond_irel->r_addend = 1;
-+
-+ cond_irel =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_INSN16, irel->r_addend);
-+ if (cond_irel != irelend)
-+ cond_irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
-+ }
-+ return TRUE;
-+}
-+
-+/* Relax LONGJUMP4 relocation for nds32_elf_relax_section.*/
-+
-+static bfd_boolean
-+nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs, int *insn_len,
-+ bfd_byte *contents, Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ /* The pattern for LONGJUMP4.
-+ sethi ta, hi20(symbol) ; LONGJUMP4/HI20
-+ ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
-+ jr ta ; PTR_RES/INSN16/EMPTY */
-+
-+ bfd_vma laddr;
-+ int seq_len; /* Original length of instruction sequence. */
-+ uint32_t insn;
-+ Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
-+ bfd_signed_vma foff;
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ seq_len = GET_SEQ_LEN (irel->r_addend);
-+ laddr = irel->r_offset;
-+ *insn_len = seq_len;
-+
-+ /* Get the reloc for the address from which the register is
-+ being loaded. This reloc will tell us which function is
-+ actually being called. */
-+
-+ hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_HI20_RELA, laddr);
-+
-+ if (hi_irel == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
-+ "reloc at 0x%lx.", abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+
-+ /* Get the value of the symbol referred to by the reloc. */
-+ foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr);
-+
-+ if (foff == 0 || foff >= CONSERVATIVE_24BIT_S1
-+ || foff < -CONSERVATIVE_24BIT_S1)
-+ return FALSE;
-+
-+ /* Convert it to "j label", it may be converted to j8 in the final
-+ pass of relaxation. Therefore, we do not consider this currently.*/
-+ ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_PTR_RESOLVED, irel->r_addend);
-+ em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_EMPTY, irel->r_addend);
-+
-+ if (ptr_irel == irelend || em_irel == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_LONGJUMP4 points to unrecognized"
-+ "reloc at 0x%lx.", abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+
-+ em_irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
-+ ptr_irel->r_addend = 1;
-+
-+ /* Write instruction. */
-+ insn = INSN_J;
-+ bfd_putb32 (insn, contents + em_irel->r_offset);
-+
-+ /* Clear relocations. */
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
-+
-+ /* If there is function cse, HI20 can not remove now. */
-+ call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_LONGJUMP4, laddr);
-+ if (call_irel == irelend)
-+ {
-+ *insn_len = 0;
-+ hi_irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
-+ }
-+
-+ return TRUE;
-+}
-+
-+/* Relax LONGJUMP5 relocation for nds32_elf_relax_section.*/
-+
-+static bfd_boolean
-+nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs, int *insn_len,
-+ int *seq_len, bfd_byte *contents,
-+ Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ /* There are 2 variations for LONGJUMP5
-+ case 2-4; 1st insn convertible, 16-bit on.
-+ bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
-+ j label ; 25_PCREL/INSN16
-+ $1:
-+
-+ case 4-4; 1st insn not convertible
-+ bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
-+ j label ; 25_PCREL/INSN16
-+ .L1: */
-+
-+ bfd_vma laddr;
-+ Elf_Internal_Rela *cond_irel, *irelend;
-+ unsigned int i;
-+ bfd_signed_vma foff;
-+ uint32_t insn, re_insn = 0;
-+ uint16_t insn16, re_insn16 = 0;
-+ unsigned long reloc;
-+
-+ enum elf_nds32_reloc_type checked_types[] =
-+ { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
-+ R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ laddr = irel->r_offset;
-+
-+ /* Get the reloc for the address from which the register is
-+ being loaded. This reloc will tell us which function is
-+ actually being called. */
-+
-+ cond_irel =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_25_PCREL_RELA, irel->r_addend);
-+ if (cond_irel == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_LONGJUMP5 points to unrecognized"
-+ "reloc at 0x%lx.", abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+
-+ /* Get the value of the symbol referred to by the reloc. */
-+ foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr);
-+
-+ if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
-+ || foff >= CONSERVATIVE_16BIT_S1)
-+ return FALSE;
-+
-+ /* Get the all corresponding instructions. */
-+ insn = bfd_getb32 (contents + laddr);
-+ /* Check instruction size. */
-+ if (insn & 0x80000000)
-+ {
-+ *seq_len = 0;
-+ insn16 = insn >> 16;
-+ nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
-+ }
-+ else
-+ nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
-+
-+ if (N32_OP6 (re_insn) == N32_OP6_BR1
-+ && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
-+ {
-+ /* beqs label ; 15_PCREL. */
-+ bfd_putb32 (re_insn, contents + cond_irel->r_offset);
-+ reloc = R_NDS32_15_PCREL_RELA;
-+ }
-+ else if (N32_OP6 (re_insn) == N32_OP6_BR2
-+ && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
-+ {
-+ /* beqz label ; 17_PCREL. */
-+ bfd_putb32 (re_insn, contents + cond_irel->r_offset);
-+ reloc = R_NDS32_17_PCREL_RELA;
-+ }
-+ else if ( N32_OP6 (re_insn) == N32_OP6_BR3
-+ && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
-+ {
-+ /* beqc label ; 9_PCREL. */
-+ bfd_putb32 (re_insn, contents + cond_irel->r_offset);
-+ reloc = R_NDS32_WORD_9_PCREL_RELA;
-+ }
-+ else
-+ return FALSE;
-+
-+ /* Set all relocations. */
-+ cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
-+
-+ /* Clean relocations. */
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
-+ for (i = 0; i < ARRAY_SIZE (checked_types); i++)
-+ {
-+ cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ checked_types[i], laddr);
-+ if (cond_irel != irelend)
-+ {
-+ if (*seq_len == 0
-+ && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
-+ {
-+ /* If the branch instruction is 2 byte, it cannot remove
-+ directly. Only convert it to nop16 and remove it after
-+ checking alignment issue. */
-+ insn16 = NDS32_NOP16;
-+ bfd_putb16 (insn16, contents + laddr);
-+ cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
-+ }
-+ else
-+ cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
-+ R_NDS32_NONE);
-+ }
-+ }
-+ *insn_len = 0;
-+
-+ return TRUE;
-+}
-+
-+/* Relax LONGJUMP6 relocation for nds32_elf_relax_section.*/
-+
-+static bfd_boolean
-+nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs, int *insn_len,
-+ int *seq_len, bfd_byte *contents,
-+ Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ /* There are 5 variations for LONGJUMP6
-+ case : 2-4-4-4; 1st insn convertible, 16-bit on.
-+ bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
-+ sethi ta, hi20(symbol) ; HI20/PTR
-+ ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
-+ jr ta ; PTR_RES/INSN16/EMPTY
-+ .L1:
-+
-+ case : 4-4-4-4; 1st insn not convertible, 16-bit on.
-+ bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
-+ sethi ta, hi20(symbol) ; HI20/PTR
-+ ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
-+ jr ta ; PTR_RES/INSN16/EMPTY
-+ .L1: */
-+
-+ enum elf_nds32_reloc_type checked_types[] =
-+ { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
-+ R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
-+
-+ int reloc_off = 0, cond_removed = 0;
-+ bfd_vma laddr;
-+ Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
-+ unsigned int i;
-+ bfd_signed_vma foff;
-+ uint32_t insn, re_insn = 0;
-+ uint16_t insn16, re_insn16 = 0;
-+ unsigned long reloc;
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ laddr = irel->r_offset;
-+
-+ /* Get the reloc for the address from which the register is
-+ being loaded. This reloc will tell us which function is
-+ actually being called. */
-+ em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_EMPTY, irel->r_addend);
-+
-+ if (em_irel == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_LONGJUMP6 points to unrecognized"
-+ "reloc at 0x%lx.", abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+
-+ /* Get the value of the symbol referred to by the reloc. */
-+ foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr);
-+
-+ if (foff == 0 || foff < -CONSERVATIVE_24BIT_S1
-+ || foff >= CONSERVATIVE_24BIT_S1)
-+ return FALSE;
-+
-+ insn = bfd_getb32 (contents + laddr);
-+ /* Check instruction size. */
-+ if (insn & 0x80000000)
-+ {
-+ *seq_len = 0;
-+ insn16 = insn >> 16;
-+ nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
-+ }
-+ else
-+ nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
-+
-+ /* For simplicity of coding, we are going to modify the section
-+ contents, the section relocs, and the BFD symbol table. We
-+ must tell the rest of the code not to free up this
-+ information. It would be possible to instead create a table
-+ of changes which have to be made, as is done in coff-mips.c;
-+ that would be more work, but would require less memory when
-+ the linker is run. */
-+
-+ if (N32_OP6 (re_insn) == N32_OP6_BR1
-+ && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
-+ {
-+ /* beqs label ; 15_PCREL */
-+ bfd_putb32 (re_insn, contents + em_irel->r_offset);
-+ reloc = R_NDS32_15_PCREL_RELA;
-+ cond_removed = 1;
-+ }
-+ else if (N32_OP6 (re_insn) == N32_OP6_BR2
-+ && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
-+ {
-+ /* beqz label ; 17_PCREL */
-+ bfd_putb32 (re_insn, contents + em_irel->r_offset);
-+ reloc = R_NDS32_17_PCREL_RELA;
-+ cond_removed = 1;
-+ }
-+ else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
-+ && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
-+ {
-+ /* Relax to one of the following 2 variations
-+
-+ case 2-4; 1st insn convertible, 16-bit on.
-+ bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
-+ j label ; 25_PCREL/INSN16
-+ $1:
-+
-+ case 4-4; 1st insn not convertible
-+ bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
-+ j label ; 25_PCREL/INSN16
-+ .L1: */
-+
-+ /* Use j label as second instruction. */
-+ insn = INSN_J;
-+ reloc = R_NDS32_25_PCREL_RELA;
-+ bfd_putb32 (insn, contents + em_irel->r_offset);
-+ }
-+ else
-+ return FALSE;
-+
-+ /* Set all relocations. */
-+ em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
-+
-+ cond_irel =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_PTR_RESOLVED, em_irel->r_offset);
-+ cond_irel->r_addend = 1;
-+
-+ /* Use INSN16 of first branch instruction to distinguish if keeping
-+ INSN16 of final instruction or not. */
-+ insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_INSN16, irel->r_offset);
-+ if (insn_irel == irelend)
-+ {
-+ /* Clean the final INSN16. */
-+ insn_irel =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_INSN16, em_irel->r_offset);
-+ insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
-+ R_NDS32_NONE);
-+ }
-+
-+ if (cond_removed == 1)
-+ {
-+ *insn_len = 0;
-+
-+ /* Clear relocations. */
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
-+
-+ for (i = 0; i < ARRAY_SIZE (checked_types); i++)
-+ {
-+ cond_irel =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ checked_types[i], laddr);
-+ if (cond_irel != irelend)
-+ {
-+ if (*seq_len == 0
-+ && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
-+ {
-+ /* If the branch instruction is 2 byte, it cannot remove
-+ directly. Only convert it to nop16 and remove it after
-+ checking alignment issue. */
-+ insn16 = NDS32_NOP16;
-+ bfd_putb16 (insn16, contents + laddr);
-+ cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
-+ }
-+ else
-+ cond_irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
-+ }
-+ }
-+ }
-+ else
-+ {
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
-+ R_NDS32_LONGJUMP5);
-+ }
-+
-+ return TRUE;
-+}
-+
-+/* Relax LONGJUMP7 relocation for nds32_elf_relax_section.*/
-+
-+static bfd_boolean
-+nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs, int *insn_len,
-+ int *seq_len, bfd_byte *contents,
-+ Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ /* There are 2 variations for LONGJUMP5
-+ case 2-4; 1st insn convertible, 16-bit on.
-+ movi55 ta, imm11 ; LONGJUMP7/INSN16
-+ beq rt, ta, label ; 15_PCREL
-+
-+ case 4-4; 1st insn not convertible
-+ movi55 ta, imm11 ; LONGJUMP7/INSN16
-+ beq rt, ta, label ; 15_PCREL */
-+
-+ bfd_vma laddr;
-+ Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
-+ bfd_signed_vma foff;
-+ uint32_t insn, re_insn = 0;
-+ uint16_t insn16;
-+ uint32_t imm11;
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ laddr = irel->r_offset;
-+
-+ /* Get the reloc for the address from which the register is
-+ being loaded. This reloc will tell us which function is
-+ actually being called. */
-+
-+ cond_irel =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_15_PCREL_RELA, irel->r_addend);
-+ if (cond_irel == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_LONGJUMP7 points to unrecognized"
-+ "reloc at 0x%lx.", abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+
-+ /* Get the value of the symbol referred to by the reloc. */
-+ foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr);
-+
-+ if (foff == 0 || foff < -CONSERVATIVE_8BIT_S1
-+ || foff >= CONSERVATIVE_8BIT_S1)
-+ return FALSE;
-+
-+ /* Get the first instruction for its size. */
-+ insn = bfd_getb32 (contents + laddr);
-+ if (insn & 0x80000000)
-+ {
-+ *seq_len = 0;
-+ /* Get the immediate from movi55. */
-+ imm11 = N16_IMM5S (insn >> 16);
-+ }
-+ else
-+ {
-+ /* Get the immediate from movi. */
-+ imm11 = N32_IMM20S (insn);
-+ }
-+
-+ /* Get the branch instruction. */
-+ insn = bfd_getb32 (contents + irel->r_addend);
-+ /* Convert instruction to BR3. */
-+ if ((insn >> 14) & 0x1)
-+ re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
-+ else
-+ re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
-+
-+ bfd_putb32 (re_insn, contents + cond_irel->r_offset);
-+
-+ /* Set all relocations. */
-+ cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
-+ R_NDS32_WORD_9_PCREL_RELA);
-+
-+ /* Clean relocations. */
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
-+ insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_INSN16, irel->r_offset);
-+ if (insn_irel != irelend)
-+ {
-+ if (*seq_len == 0)
-+ {
-+ /* If the first insntruction is 16bit, convert it to nop16. */
-+ insn16 = NDS32_NOP16;
-+ bfd_putb16 (insn16, contents + laddr);
-+ insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
-+ }
-+ else
-+ cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
-+ R_NDS32_NONE);
-+ }
-+ *insn_len = 0;
-+
-+ return TRUE;
-+}
-+
-+/* Record the offset to gp, and check if it changed after relaxing.
-+ If the offset is fixed or the offset is near enough, try to relax
-+ the pattern. This is avoid truncated to fit when relaxing fixed
-+ address symbol. Ex: _stack. */
-+static bfd_boolean
-+nds32_elf_relax_guard (bfd_vma *access_addr, bfd_vma local_sda, asection *sec,
-+ Elf_Internal_Rela *irel, bfd_boolean *again,
-+ bfd_boolean init,
-+ struct elf_nds32_link_hash_table *table,
-+ Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
-+
-+{
-+ /* The default linker script value. */
-+ int offset_to_gp;
-+ static bfd_boolean sec_pass = FALSE;
-+ static asection *first_sec = NULL, *sym_sec;
-+ /* Record the number of instructions which may be removed. */
-+ static int count = 0, record_count;
-+ Elf_Internal_Sym *isym;
-+ struct elf_link_hash_entry *h = NULL;
-+ int indx;
-+ unsigned long r_symndx;
-+ bfd *abfd = sec->owner;
-+ static bfd_vma record_sda = 0;
-+ int sda_offset = 0;
-+
-+ /* Force doing relaxation when hyper-relax is high. */
-+ if (table->hyper_relax == 2)
-+ return TRUE;
-+
-+ /* Record the first section to get the round. */
-+ if (init)
-+ {
-+ if (!first_sec)
-+ first_sec = sec;
-+ else if (first_sec == sec)
-+ {
-+ record_count = count;
-+ count = 0;
-+ sec_pass = TRUE;
-+ }
-+
-+ if (!sec_pass)
-+ *again = TRUE;
-+
-+ return TRUE;;
-+ }
-+
-+ if (record_sda == 0)
-+ record_sda = local_sda;
-+ else if (local_sda > record_sda)
-+ /* In normal case, SDA is fixed or smaller except there is
-+ DATA_SEGMENT_ALIGN in linker script.*/
-+ sda_offset = local_sda - record_sda;
-+
-+ /* Although we doesn't delete all instructions here, counting all of
-+ them to be conservative. */
-+ count++;
-+
-+ r_symndx = ELF32_R_SYM (irel->r_info);
-+ /* Global symbols. */
-+ if (r_symndx >= symtab_hdr->sh_info)
-+ {
-+ indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
-+ h = elf_sym_hashes (abfd)[indx];
-+ sym_sec = h->root.u.def.section;
-+ if (NDS32_GUARD_SEC_P (sym_sec->flags)
-+ || bfd_is_abs_section (sym_sec))
-+ {
-+ /* Forbid doing relaxation when hyper-relax is low. */
-+ if (table->hyper_relax == 0)
-+ return FALSE;
-+
-+ offset_to_gp = *access_addr - local_sda;
-+ if (elf32_nds32_hash_entry (h)->offset_to_gp == 0)
-+ elf32_nds32_hash_entry (h)->offset_to_gp = offset_to_gp;
-+ else if (abs (elf32_nds32_hash_entry (h)->offset_to_gp)
-+ < abs (offset_to_gp) - sda_offset)
-+ {
-+ if (*access_addr >= local_sda)
-+ *access_addr += (record_count * 4);
-+ else
-+ *access_addr -= (record_count * 4);
-+ }
-+ return sec_pass;
-+ }
-+ }
-+ else
-+ {
-+ if (!elf32_nds32_allocate_local_sym_info (abfd))
-+ return FALSE;
-+ isym = isymbuf + r_symndx;
-+
-+ sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
-+ if (NDS32_GUARD_SEC_P (sym_sec->flags))
-+ {
-+ /* Forbid doing relaxation when hyper-relax is low. */
-+ if (table->hyper_relax == 0)
-+ return FALSE;
-+
-+ offset_to_gp = *access_addr - local_sda;
-+ if (elf32_nds32_local_gp_offset (abfd)[r_symndx] == 0)
-+ elf32_nds32_local_gp_offset (abfd)[r_symndx] = offset_to_gp;
-+ else if (abs (elf32_nds32_local_gp_offset (abfd)[r_symndx])
-+ < abs (offset_to_gp) - sda_offset)
-+ {
-+ if (*access_addr >= local_sda)
-+ *access_addr += (record_count * 4);
-+ else
-+ *access_addr -= (record_count * 4);
-+ }
-+ return sec_pass;
-+ }
-+ }
-+
-+ return TRUE;
-+}
-+#define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
-+
-+/* Relax LOADSTORE relocation for nds32_elf_relax_section. */
-+
-+static bfd_boolean
-+nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
-+ asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs, int *insn_len,
-+ bfd_byte *contents, Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr, int load_store_relax,
-+ struct elf_nds32_link_hash_table *table)
-+{
-+ int eliminate_sethi = 0, range_type, i;
-+ bfd_vma local_sda, laddr;
-+ int seq_len; /* Original length of instruction sequence. */
-+ uint32_t insn;
-+ Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
-+ bfd_vma access_addr = 0;
-+ bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
-+ enum elf_nds32_reloc_type checked_types[] =
-+ { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
-+ R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
-+ R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
-+ R_NDS32_TLS_LE_HI20, R_NDS32_TLS_IE_HI20,
-+ R_NDS32_TLS_IEGP_HI20, R_NDS32_TLS_DESC_HI20
-+ };
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ seq_len = GET_SEQ_LEN (irel->r_addend);
-+ laddr = irel->r_offset;
-+ *insn_len = seq_len;
-+
-+ /* Get the high part relocation. */
-+ for (i = 0; (unsigned) i < ARRAY_SIZE (checked_types); i++)
-+ {
-+ hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ checked_types[i], laddr);
-+ if (hi_irelfn != irelend)
-+ break;
-+ }
-+
-+ if (hi_irelfn == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_LOADSTORE points to unrecognized "
-+ "reloc at 0x%lx.", abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+
-+ range_type = GET_LOADSTORE_RANGE (irel->r_addend);
-+ nds32_elf_final_sda_base (sec->output_section->owner,
-+ link_info, &local_sda, FALSE);
-+
-+ switch (ELF32_R_TYPE (hi_irelfn->r_info))
-+ {
-+ case R_NDS32_HI20_RELA:
-+ insn = bfd_getb32 (contents + laddr);
-+ access_addr =
-+ calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
-+
-+ /* Try movi. */
-+ if (range_type == NDS32_LOADSTORE_IMM)
-+ {
-+ struct elf_link_hash_entry *h = NULL;
-+ int indx;
-+
-+ if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
-+ {
-+ indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
-+ h = elf_sym_hashes (abfd)[indx];
-+ }
-+
-+ if ((access_addr < CONSERVATIVE_20BIT)
-+ && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
-+ {
-+ eliminate_sethi = 1;
-+ break;
-+ }
-+ }
-+
-+ if (!nds32_elf_relax_guard (&access_addr, local_sda, sec, hi_irelfn,
-+ NULL, FALSE, table, isymbuf, symtab_hdr))
-+ return FALSE;
-+
-+
-+ if (!load_store_relax)
-+ return FALSE;
-+
-+ /* Case for set gp register. */
-+ if (N32_RT5 (insn) == REG_GP)
-+ break;
-+
-+ if (range_type == NDS32_LOADSTORE_FLOAT_S
-+ || range_type == NDS32_LOADSTORE_FLOAT_S)
-+ {
-+ range_l = sdata_range[0][0];
-+ range_h = sdata_range[0][1];
-+ }
-+ else
-+ {
-+ range_l = sdata_range[1][0];
-+ range_h = sdata_range[1][1];
-+ }
-+ break;
-+
-+ case R_NDS32_GOT_HI20:
-+ access_addr =
-+ calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
-+
-+ /* If this symbol is not in .got, the return value will be -1.
-+ Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
-+ a negative offset is allowed. */
-+ if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
-+ && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
-+ eliminate_sethi = 1;
-+ break;
-+
-+ case R_NDS32_PLT_GOTREL_HI20:
-+ access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
-+ hi_irelfn, symtab_hdr);
-+
-+ if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
-+ && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
-+ eliminate_sethi = 1;
-+ break;
-+
-+ case R_NDS32_GOTOFF_HI20:
-+ access_addr =
-+ calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
-+
-+ if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
-+ && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
-+ eliminate_sethi = 1;
-+ break;
-+
-+ case R_NDS32_GOTPC_HI20:
-+ /* The access_addr must consider r_addend of hi_irel. */
-+ access_addr = sec->output_section->vma + sec->output_offset
-+ + irel->r_offset + hi_irelfn->r_addend;
-+
-+ if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
-+ && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
-+ eliminate_sethi = 1;
-+ break;
-+
-+ case R_NDS32_TLS_LE_HI20:
-+ access_addr =
-+ calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
-+ BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
-+ access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
-+ if ((range_type == NDS32_LOADSTORE_IMM)
-+ && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
-+ && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
-+ eliminate_sethi = 1;
-+ break;
-+
-+ /* TODO: TLS IE/IEGP */
-+ case R_NDS32_TLS_IE_HI20:
-+ case R_NDS32_TLS_IEGP_HI20:
-+ break;
-+
-+ /* TODO: TLS DESC */
-+ case R_NDS32_TLS_DESC_HI20:
-+ break;
-+
-+ default:
-+ return FALSE;
-+ }
-+
-+ /* Delete sethi instruction. */
-+ if (eliminate_sethi == 1
-+ || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
-+ || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
-+ {
-+ hi_irelfn->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
-+ *insn_len = 0;
-+ }
-+ return TRUE;
-+}
-+
-+/* Relax LO12 relocation for nds32_elf_relax_section.*/
-+
-+static void
-+nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
-+ asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
-+ Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
-+ struct elf_nds32_link_hash_table *table)
-+{
-+ uint32_t insn;
-+ bfd_vma local_sda, laddr;
-+ unsigned long reloc;
-+ bfd_vma access_addr;
-+ bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
-+ Elf_Internal_Rela *irelfn = NULL, *irelend;
-+ struct elf_link_hash_entry *h = NULL;
-+ int indx;
-+
-+ /* For SDA base relative relaxation. */
-+ nds32_elf_final_sda_base (sec->output_section->owner, link_info,
-+ &local_sda, FALSE);
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ laddr = irel->r_offset;
-+ insn = bfd_getb32 (contents + laddr);
-+
-+ if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
-+ return;
-+
-+ access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
-+
-+ if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
-+ {
-+ indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
-+ h = elf_sym_hashes (abfd)[indx];
-+ }
-+
-+ /* Try movi. */
-+ if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
-+ && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
-+ {
-+ reloc = R_NDS32_20_RELA;
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
-+ insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
-+ bfd_putb32 (insn, contents + laddr);
-+ }
-+ else
-+ {
-+ if (!nds32_elf_relax_guard (&access_addr, local_sda, sec, irel, NULL,
-+ FALSE, table, isymbuf, symtab_hdr))
-+ return;
-+
-+ range_l = sdata_range[1][0];
-+ range_h = sdata_range[1][1];
-+ switch (ELF32_R_TYPE (irel->r_info))
-+ {
-+ case R_NDS32_LO12S0_RELA:
-+ reloc = R_NDS32_SDA19S0_RELA;
-+ break;
-+ case R_NDS32_LO12S1_RELA:
-+ reloc = R_NDS32_SDA18S1_RELA;
-+ break;
-+ case R_NDS32_LO12S2_RELA:
-+ reloc = R_NDS32_SDA17S2_RELA;
-+ break;
-+ case R_NDS32_LO12S2_DP_RELA:
-+ range_l = sdata_range[0][0];
-+ range_h = sdata_range[0][1];
-+ reloc = R_NDS32_SDA12S2_DP_RELA;
-+ break;
-+ case R_NDS32_LO12S2_SP_RELA:
-+ range_l = sdata_range[0][0];
-+ range_h = sdata_range[0][1];
-+ reloc = R_NDS32_SDA12S2_SP_RELA;
-+ break;
-+ default:
-+ return;
-+ }
-+
-+ /* There are range_h and range_l because linker has to promise
-+ all sections move cross one page together. */
-+ if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
-+ || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
-+ {
-+ if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
-+ {
-+ /* Maybe we should add R_NDS32_INSN16 reloc type here
-+ or manually do some optimization. sethi can't be
-+ eliminated when updating $gp so the relative ori
-+ needs to be preserved. */
-+ return;
-+ }
-+ if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
-+ &insn))
-+ return;
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
-+ bfd_putb32 (insn, contents + laddr);
-+
-+ irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
-+ R_NDS32_INSN16);
-+ /* SDA17 must keep INSN16 for converting fp_as_gp. */
-+ if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
-+ irelfn->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
-+
-+ }
-+ }
-+ return;
-+}
-+
-+/* Relax low part of PIC instruction pattern. */
-+
-+static void
-+nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
-+ asection *sec, Elf_Internal_Rela *irel,
-+ bfd_byte *contents, Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ uint32_t insn;
-+ bfd_vma local_sda, laddr;
-+ bfd_signed_vma foff;
-+ unsigned long reloc;
-+
-+ nds32_elf_final_sda_base (sec->output_section->owner, link_info,
-+ &local_sda, FALSE);
-+ laddr = irel->r_offset;
-+ insn = bfd_getb32 (contents + laddr);
-+
-+ if (N32_OP6 (insn) != N32_OP6_ORI)
-+ return;
-+
-+ if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
-+ {
-+ foff = calculate_got_memory_address (abfd, link_info, irel,
-+ symtab_hdr) - local_sda;
-+ reloc = R_NDS32_GOT20;
-+ }
-+ else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
-+ {
-+ foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
-+ symtab_hdr) - local_sda;
-+ reloc = R_NDS32_PLT_GOTREL_LO20;
-+ }
-+ else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
-+ {
-+ foff = calculate_memory_address (abfd, irel, isymbuf,
-+ symtab_hdr) - local_sda;
-+ reloc = R_NDS32_GOTOFF;
-+ }
-+ else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
-+ {
-+ foff = local_sda - sec->output_section->vma + sec->output_offset
-+ + irel->r_offset + irel->r_addend;
-+ reloc = R_NDS32_GOTPC20;
-+ }
-+ else
-+ return;
-+
-+ if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
-+ {
-+ /* Turn into MOVI. */
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
-+ insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
-+ bfd_putb32 (insn, contents + laddr);
-+ }
-+}
-+
-+/* Relax low part of LE TLS instruction pattern. */
-+
-+static void
-+nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
-+ Elf_Internal_Rela *irel,
-+ bfd_byte *contents, Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr)
-+{
-+ uint32_t insn;
-+ bfd_vma laddr;
-+ bfd_signed_vma foff;
-+ unsigned long reloc;
-+
-+ laddr = irel->r_offset;
-+ foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
-+ BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
-+ foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
-+ insn = bfd_getb32 (contents + laddr);
-+
-+ if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
-+ && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
-+ {
-+ /* Pattern sethi-ori transform to movi. */
-+ reloc = R_NDS32_TLS_LE_20;
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
-+ insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
-+ bfd_putb32 (insn, contents + laddr);
-+ }
-+}
-+
-+/* Relax LE TLS calculate address instruction pattern. */
-+
-+static void
-+nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
-+ asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs,
-+ bfd_byte *contents, Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
-+{
-+ /* Local TLS non-pic
-+ sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
-+ ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
-+ add ra, ta, tp ; TLS_LE_ADD */
-+
-+ uint32_t insn;
-+ bfd_vma laddr;
-+ bfd_signed_vma foff;
-+ Elf_Internal_Rela *i1_irelfn, *irelend;
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ laddr = irel->r_offset;
-+ insn = bfd_getb32 (contents + laddr);
-+ i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
-+ R_NDS32_PTR_RESOLVED);
-+ foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
-+ BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
-+ foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
-+
-+ /* The range is +/-16k. */
-+ if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
-+ && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
-+ {
-+ /* Transform add to addi. */
-+ insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
-+
-+ bfd_putb32 (insn, contents + laddr);
-+ if (i1_irelfn != irelend)
-+ {
-+ i1_irelfn->r_addend |= 1;
-+ *again = TRUE;
-+ }
-+ }
-+}
-+
-+/* Relax LE TLS load store instruction pattern. */
-+
-+static void
-+nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
-+ asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs,
-+ bfd_byte *contents, Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
-+{
-+ uint32_t insn;
-+ bfd_vma laddr;
-+ bfd_signed_vma foff;
-+ Elf_Internal_Rela *i1_irelfn, *irelend;
-+ int success = 0;
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ laddr = irel->r_offset;
-+ insn = bfd_getb32 (contents + laddr);
-+ i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
-+ R_NDS32_PTR_RESOLVED);
-+ foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
-+ BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
-+ foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
-+
-+ switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
-+ {
-+ case (N32_OP6_MEM << 8) | N32_MEM_LB:
-+ case (N32_OP6_MEM << 8) | N32_MEM_SB:
-+ case (N32_OP6_MEM << 8) | N32_MEM_LBS:
-+ /* The range is +/-16k. */
-+ if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
-+ && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
-+ {
-+ insn =
-+ ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
-+ success = 1;
-+ break;
-+ }
-+ case (N32_OP6_MEM << 8) | N32_MEM_LH:
-+ case (N32_OP6_MEM << 8) | N32_MEM_SH:
-+ case (N32_OP6_MEM << 8) | N32_MEM_LHS:
-+ /* The range is +/-32k. */
-+ if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
-+ && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
-+ {
-+ insn =
-+ ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
-+ success = 1;
-+ break;
-+ }
-+ case (N32_OP6_MEM << 8) | N32_MEM_LW:
-+ case (N32_OP6_MEM << 8) | N32_MEM_SW:
-+ /* The range is +/-64k. */
-+ if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
-+ && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
-+ {
-+ insn =
-+ ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
-+ success = 1;
-+ break;
-+ }
-+ default:
-+ break;
-+ }
-+
-+ if (success)
-+ {
-+ bfd_putb32 (insn, contents + laddr);
-+ if (i1_irelfn != irelend)
-+ {
-+ i1_irelfn->r_addend |= 1;
-+ *again = TRUE;
-+ }
-+ }
-+}
-+
-+/* Relax PTR relocation for nds32_elf_relax_section. */
-+
-+static bfd_boolean
-+nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs, int *insn_len,
-+ int *seq_len, bfd_byte *contents)
-+{
-+ Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+
-+ re_irel =
-+ find_relocs_at_address_addr (irel, internal_relocs, irelend,
-+ R_NDS32_PTR_RESOLVED, irel->r_addend);
-+
-+ if (re_irel == irelend)
-+ {
-+ (*_bfd_error_handler)
-+ ("%B: warning: R_NDS32_PTR points to unrecognized reloc at 0x%lx.",
-+ abfd, (long) irel->r_offset);
-+ return FALSE;
-+ }
-+
-+ if (re_irel->r_addend != 1)
-+ return FALSE;
-+
-+ /* Pointed target is relaxed and no longer needs this void *,
-+ change the type to NONE. */
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
-+
-+ /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
-+ not exist, it means only count 1 and remove it directly. */
-+ /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
-+ count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
-+ R_NDS32_PTR_COUNT);
-+ ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
-+ R_NDS32_PTR);
-+ if (count_irel != irelend)
-+ {
-+ if (--count_irel->r_addend > 0)
-+ return FALSE;
-+ }
-+
-+ if (ptr_irel != irelend)
-+ return FALSE;
-+
-+ /* If the PTR_COUNT is already 0, remove current instruction. */
-+ *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
-+ *insn_len = 0;
-+ return TRUE;
-+}
-+
-+/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
-+
-+static void
-+nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
-+ asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs,
-+ bfd_byte *contents, Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
-+{
-+ uint32_t insn;
-+ bfd_signed_vma foff;
-+ Elf_Internal_Rela *i1_irelfn, *irelend;
-+ bfd_vma local_sda, laddr;
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ laddr = irel->r_offset;
-+ insn = bfd_getb32 (contents + laddr);
-+
-+ /* FIXME: It's a little trouble to turn JRAL5 to JAL since
-+ we need additional space. It might be help if we could
-+ borrow some space from instructions to be eliminated
-+ such as sethi, ori, add. */
-+ if (insn & 0x80000000)
-+ return;
-+
-+ if (nds32_elf_check_dup_relocs
-+ (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
-+ return;
-+
-+ i1_irelfn =
-+ find_relocs_at_address (irel, internal_relocs, irelend,
-+ R_NDS32_PTR_RESOLVED);
-+
-+ /* FIXIT 090606
-+ The boundary should be reduced since the .plt section hasn't
-+ been created and the address of specific entry is still unknown
-+ Maybe the range between the function call and the begin of the
-+ .text section can be used to decide if the .plt is in the range
-+ of function call. */
-+
-+ if (N32_OP6 (insn) == N32_OP6_ALU1
-+ && N32_SUB5 (insn) == N32_ALU1_ADD)
-+ {
-+ /* Get the value of the symbol referred to by the reloc. */
-+ nds32_elf_final_sda_base (sec->output_section->owner, link_info,
-+ &local_sda, FALSE);
-+ foff = (bfd_signed_vma) (calculate_plt_memory_address
-+ (abfd, link_info, isymbuf, irel,
-+ symtab_hdr) - local_sda);
-+ /* This condition only happened when symbol is undefined. */
-+ if (foff == 0)
-+ return;
-+
-+ if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
-+ return;
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
-+ R_NDS32_PLT_GOTREL_LO19);
-+ /* addi.gp */
-+ insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
-+ }
-+ else if (N32_OP6 (insn) == N32_OP6_JREG
-+ && N32_SUB5 (insn) == N32_JREG_JRAL)
-+ {
-+ /* Get the value of the symbol referred to by the reloc. */
-+ foff =
-+ calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
-+ /* This condition only happened when symbol is undefined. */
-+ if (foff == 0)
-+ return;
-+ if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
-+ return;
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
-+ insn = INSN_JAL;
-+ }
-+ else
-+ return;
-+
-+ bfd_putb32 (insn, contents + laddr);
-+ if (i1_irelfn != irelend)
-+ {
-+ i1_irelfn->r_addend |= 1;
-+ *again = TRUE;
-+ }
-+}
-+
-+/* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
-+
-+static void
-+nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
-+ asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs,
-+ bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
-+ bfd_boolean *again)
-+{
-+ uint32_t insn;
-+ bfd_signed_vma foff;
-+ Elf_Internal_Rela *i1_irelfn, *irelend;
-+ bfd_vma local_sda, laddr;
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ laddr = irel->r_offset;
-+ insn = bfd_getb32 (contents + laddr);
-+ if (insn & 0x80000000)
-+ return;
-+
-+ if (nds32_elf_check_dup_relocs
-+ (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
-+ return;
-+
-+ i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
-+ R_NDS32_PTR_RESOLVED);
-+
-+ nds32_elf_final_sda_base (sec->output_section->owner, link_info,
-+ &local_sda, FALSE);
-+ foff = calculate_got_memory_address (abfd, link_info, irel,
-+ symtab_hdr) - local_sda;
-+
-+ if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
-+ {
-+ /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
-+ insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
-+ bfd_putb32 (insn, contents + laddr);
-+ if (i1_irelfn != irelend)
-+ {
-+ i1_irelfn->r_addend |= 1;
-+ *again = TRUE;
-+ }
-+ }
-+}
-+
-+/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
-+
-+static void
-+nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
-+ asection *sec, Elf_Internal_Rela *irel,
-+ Elf_Internal_Rela *internal_relocs,
-+ bfd_byte *contents, Elf_Internal_Sym *isymbuf,
-+ Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
-+{
-+ int opc_insn_gotoff;
-+ uint32_t insn;
-+ bfd_signed_vma foff;
-+ Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
-+ bfd_vma local_sda, laddr;
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ laddr = irel->r_offset;
-+ insn = bfd_getb32 (contents + laddr);
-+
-+ if (insn & 0x80000000)
-+ return;
-+
-+ if (nds32_elf_check_dup_relocs
-+ (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
-+ return;
-+
-+ i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
-+ R_NDS32_PTR_RESOLVED);
-+ nds32_elf_final_sda_base (sec->output_section->owner, link_info,
-+ &local_sda, FALSE);
-+ foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
-+ foff = foff - local_sda;
-+
-+ if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
-+ return;
-+
-+ /* Concatenate opcode and sub-opcode for switch case.
-+ It may be MEM or ALU1. */
-+ opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
-+ switch (opc_insn_gotoff)
-+ {
-+ case (N32_OP6_MEM << 8) | N32_MEM_LW:
-+ /* 4-byte aligned. */
-+ insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
-+ break;
-+ case (N32_OP6_MEM << 8) | N32_MEM_SW:
-+ insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
-+ break;
-+ case (N32_OP6_MEM << 8) | N32_MEM_LH:
-+ /* 2-byte aligned. */
-+ insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
-+ break;
-+ case (N32_OP6_MEM << 8) | N32_MEM_LHS:
-+ insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (18));
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
-+ break;
-+ case (N32_OP6_MEM << 8) | N32_MEM_SH:
-+ insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __BIT (19));
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
-+ break;
-+ case (N32_OP6_MEM << 8) | N32_MEM_LB:
-+ /* 1-byte aligned. */
-+ insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
-+ break;
-+ case (N32_OP6_MEM << 8) | N32_MEM_LBS:
-+ insn = N32_TYPE1 (LBGP, N32_RT5 (insn), __BIT (19));
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
-+ break;
-+ case (N32_OP6_MEM << 8) | N32_MEM_SB:
-+ insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
-+ break;
-+ case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
-+ insn = N32_TYPE1 (SBGP, N32_RT5 (insn), __BIT (19));
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
-+ break;
-+ default:
-+ return;
-+ }
-+
-+ bfd_putb32 (insn, contents + laddr);
-+ if (i1_irelfn != irelend)
-+ {
-+ i1_irelfn->r_addend |= 1;
-+ *again = TRUE;
-+ }
-+ if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
-+ R_NDS32_INSN16)) != irelend)
-+ i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
-+
-+}
-+
-+static bfd_boolean
-+nds32_relax_adjust_label (bfd *abfd, asection *sec,
-+ Elf_Internal_Rela *internal_relocs,
-+ bfd_byte *contents,
-+ nds32_elf_blank_t **relax_blank_list,
-+ int optimize, int opt_size)
-+{
-+ /* This code block is used to adjust 4-byte alignment by relax a pair
-+ of instruction a time.
-+
-+ It recognizes three types of relocations.
-+ 1. R_NDS32_LABEL - a alignment.
-+ 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
-+ 3. is_16bit_NOP () - remove a 16-bit instruction. */
-+
-+ /* TODO: It seems currently implementation only support 4-byte alignment.
-+ We should handle any-alignment. */
-+
-+ Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
-+ Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
-+ Elf_Internal_Rela rel_temp;
-+ Elf_Internal_Rela *irelend;
-+ bfd_vma address;
-+ uint16_t insn16;
-+
-+ /* Checking for branch relaxation relies on the relocations to
-+ be sorted on 'r_offset'. This is not guaranteed so we must sort. */
-+ nds32_insertion_sort (internal_relocs, sec->reloc_count,
-+ sizeof (Elf_Internal_Rela), compar_reloc);
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+
-+ /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
-+ /* FIXME: Can we generate the right order in assembler?
-+ So we don't have to swapping them here. */
-+
-+ for (label_rel = internal_relocs, insn_rel = internal_relocs;
-+ label_rel < irelend; label_rel++)
-+ {
-+ if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
-+ continue;
-+
-+ /* Find the first reloc has the same offset with label_rel. */
-+ while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
-+ insn_rel++;
-+
-+ for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
-+ insn_rel++)
-+ /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
-+ address. */
-+ if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
-+ break;
-+
-+ if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
-+ && insn_rel < label_rel)
-+ {
-+ /* Swap the two reloc if the R_NDS32_INSN16 is
-+ before R_NDS32_LABEL. */
-+ memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
-+ memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
-+ memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
-+ }
-+ }
-+
-+ label_rel = NULL;
-+ insn_rel = NULL;
-+ /* If there were a sequence of R_NDS32_LABEL end up with .align 2
-+ or higher, remove other R_NDS32_LABEL with lower alignment.
-+ If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
-+ then the R_NDS32_LABEL sequence is broke. */
-+ for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
-+ {
-+ if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
-+ {
-+ if (label_rel == NULL)
-+ {
-+ if (tmp_rel->r_addend < 2)
-+ label_rel = tmp_rel;
-+ continue;
-+ }
-+ else if (tmp_rel->r_addend > 1)
-+ {
-+ /* Remove all LABEL relocation from label_rel to tmp_rel
-+ including relocations with same offset as tmp_rel. */
-+ for (tmp2_rel = label_rel; tmp2_rel < tmp_rel; tmp2_rel++)
-+ {
-+ if (tmp2_rel->r_offset == tmp_rel->r_offset)
-+ break;
-+
-+ if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
-+ && tmp2_rel->r_addend < 2)
-+ tmp2_rel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
-+ R_NDS32_NONE);
-+ }
-+ label_rel = NULL;
-+ }
-+ }
-+ else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
-+ {
-+ /* A new INSN16 which can be converted, so clear label_rel. */
-+ if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
-+ irelend, &insn16)
-+ || is_16bit_NOP (abfd, sec, tmp_rel))
-+ label_rel = NULL;
-+ }
-+ }
-+
-+ label_rel = NULL;
-+ insn_rel = NULL;
-+ /* Optimized for speed and nothing has not been relaxed.
-+ It's time to align labels.
-+ We may convert a 16-bit instruction right before a label to
-+ 32-bit, in order to align the label if necessary
-+ all reloc entries has been sorted by r_offset. */
-+ for (irel = internal_relocs;
-+ irel < irelend && irel->r_offset < sec->size; irel++)
-+ {
-+ if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
-+ && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
-+ continue;
-+
-+ if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
-+ {
-+ /* A new INSN16 found, resize the old one. */
-+ if (is_convert_32_to_16
-+ (abfd, sec, irel, internal_relocs, irelend, &insn16)
-+ || is_16bit_NOP (abfd, sec, irel))
-+ {
-+ if (insn_rel)
-+ {
-+ /* Previous INSN16 reloc exists, reduce its
-+ size to 16-bit. */
-+ if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
-+ irelend, &insn16))
-+ {
-+ nds32_elf_write_16 (abfd, contents, insn_rel,
-+ internal_relocs, irelend, insn16);
-+
-+ if (!insert_nds32_elf_blank_recalc_total
-+ (relax_blank_list, insn_rel->r_offset + 2, 2))
-+ return FALSE;
-+ }
-+ else if (is_16bit_NOP (abfd, sec, insn_rel))
-+ {
-+ if (!insert_nds32_elf_blank_recalc_total
-+ (relax_blank_list, insn_rel->r_offset, 2))
-+ return FALSE;
-+ }
-+ insn_rel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
-+ }
-+ /* Save the new one for later use. */
-+ insn_rel = irel;
-+ }
-+ else
-+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
-+ R_NDS32_NONE);
-+ }
-+ else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
-+ {
-+ /* Search for label. */
-+ int force_relax = 0;
-+
-+ /* Label on 16-bit instruction or optimization
-+ needless, just reset this reloc. */
-+ insn16 = bfd_getb16 (contents + irel->r_offset);
-+ if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
-+ {
-+ irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
-+ continue;
-+ }
-+
-+ address =
-+ irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
-+ irel->r_offset, 1);
-+
-+ if (!insn_rel)
-+ {
-+ /* Check if there is case which can not be aligned. */
-+ if (irel->r_addend == 2 && address & 0x2)
-+ return FALSE;
-+ continue;
-+ }
-+
-+ /* Try to align this label. */
-+
-+ if ((irel->r_addend & 0x1f) < 2)
-+ {
-+ /* Check if there is a INSN16 at the same address.
-+ Label_rel always seats before insn_rel after
-+ our sort. */
-+
-+ /* Search for INSN16 at LABEL location. If INSN16 is at
-+ same location and this LABEL alignment is lower than 2,
-+ the INSN16 can be converted to 2-byte. */
-+ for (tmp_rel = irel;
-+ tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
-+ tmp_rel++)
-+ {
-+ if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
-+ && (is_convert_32_to_16
-+ (abfd, sec, tmp_rel, internal_relocs,
-+ irelend, &insn16)
-+ || is_16bit_NOP (abfd, sec, tmp_rel)))
-+ {
-+ force_relax = 1;
-+ break;
-+ }
-+ }
-+ }
-+
-+ if (force_relax || irel->r_addend == 1 || address & 0x2)
-+ {
-+ /* Label not aligned. */
-+ /* Previous reloc exists, reduce its size to 16-bit. */
-+ if (is_convert_32_to_16 (abfd, sec, insn_rel,
-+ internal_relocs, irelend, &insn16))
-+ {
-+ nds32_elf_write_16 (abfd, contents, insn_rel,
-+ internal_relocs, irelend, insn16);
-+
-+ if (!insert_nds32_elf_blank_recalc_total
-+ (relax_blank_list, insn_rel->r_offset + 2, 2))
-+ return FALSE;
-+ }
-+ else if (is_16bit_NOP (abfd, sec, insn_rel))
-+ {
-+ if (!insert_nds32_elf_blank_recalc_total
-+ (relax_blank_list, insn_rel->r_offset, 2))
-+ return FALSE;
-+ }
-+
-+ }
-+ /* INSN16 reloc is used. */
-+ insn_rel = NULL;
-+ }
-+ }
-+
-+ address =
-+ sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
-+ if (insn_rel && (address & 0x2 || opt_size))
-+ {
-+ if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
-+ irelend, &insn16))
-+ {
-+ nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
-+ irelend, insn16);
-+ if (!insert_nds32_elf_blank_recalc_total
-+ (relax_blank_list, insn_rel->r_offset + 2, 2))
-+ return FALSE;
-+ insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
-+ R_NDS32_NONE);
-+ }
-+ else if (is_16bit_NOP (abfd, sec, insn_rel))
-+ {
-+ if (!insert_nds32_elf_blank_recalc_total
-+ (relax_blank_list, insn_rel->r_offset, 2))
-+ return FALSE;
-+ insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
-+ R_NDS32_NONE);
-+ }
-+ }
-+ insn_rel = NULL;
-+ return TRUE;
-+}
-+
-+/* Pick relaxation round. */
-+
-+static int
-+nds32_elf_pick_relax (bfd_boolean init, asection *sec, bfd_boolean *again,
-+ struct elf_nds32_link_hash_table *table,
-+ struct bfd_link_info *link_info)
-+{
-+ static asection *final_sec, *first_sec = NULL;
-+ static bfd_boolean normal_again = FALSE;
-+ static bfd_boolean set = FALSE;
-+ static bfd_boolean first = TRUE;
-+ int round_table[] = {
-+ NDS32_RELAX_IFC_ROUND,
-+ NDS32_RELAX_NORMAL_ROUND,
-+ NDS32_RELAX_JUMP_IFC_ROUND,
-+ NDS32_RELAX_EX9_BUILD_ROUND,
-+ NDS32_RELAX_EX9_REPLACE_ROUND,
-+ };
-+ static int pass = 0;
-+ static int relax_round;
-+
-+ /* The new round. */
-+ if (init && first_sec == sec)
-+ {
-+ set = TRUE;
-+ normal_again = FALSE;
-+ }
-+
-+ if (first)
-+ {
-+ /* Run an empty run to get the final section. */
-+ relax_round = NDS32_RELAX_EMPTY_ROUND;
-+
-+ /* We have to do ifc optimization before general relax.
-+ Decide the first round here. */
-+ if (table->target_optimize & NDS32_RELAX_IFC_ON)
-+ pass = 0;
-+ else
-+ pass = 1;
-+
-+ /* It has to enter relax again because we can
-+ not make sure what the final turn is. */
-+ *again = TRUE;
-+
-+ first = FALSE;
-+ first_sec = sec;
-+ }
-+
-+ if (!set)
-+ {
-+ /* Not reenter yet. */
-+ final_sec = sec;
-+ return relax_round;
-+ }
-+
-+ relax_round = round_table[pass];
-+
-+ if (!init && relax_round == NDS32_RELAX_NORMAL_ROUND && *again)
-+ normal_again = TRUE;
-+
-+ if (!init && final_sec == sec)
-+ {
-+ switch (relax_round)
-+ {
-+ case NDS32_RELAX_IFC_ROUND:
-+ nds32_elf_ifc_cse_algo (link_info);
-+ *again = TRUE;
-+ pass++;
-+ break;
-+ case NDS32_RELAX_NORMAL_ROUND:
-+ if (!normal_again)
-+ {
-+ /* Normal relaxation done. */
-+ if (table->target_optimize & NDS32_RELAX_IFC_ON)
-+ {
-+ pass++;
-+ *again = TRUE;
-+ }
-+ else if (table->target_optimize & NDS32_RELAX_EX9_ON)
-+ {
-+ pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
-+ *again = TRUE;
-+ }
-+ else if (table->ex9_import_file)
-+ {
-+ /* Import ex9 table. */
-+ if (table->update_ex9_table)
-+ pass += 2; /* NDS32_RELAX_EX9_BUILD_ROUND */
-+ else
-+ pass += 3; /* NDS32_RELAX_EX9_REPLACE_ROUND */
-+ nds32_elf_ex9_import_table (link_info);
-+ *again = TRUE;
-+ }
-+ }
-+ break;
-+ case NDS32_RELAX_JUMP_IFC_ROUND:
-+ if (!nds32_elf_ifc_finish (link_info))
-+ (*_bfd_error_handler) (_("error: Jump IFC Fail."));
-+ if (table->target_optimize & NDS32_RELAX_EX9_ON)
-+ {
-+ pass++;
-+ *again = TRUE;
-+ }
-+ break;
-+ case NDS32_RELAX_EX9_BUILD_ROUND:
-+ nds32_elf_ex9_finish (link_info);
-+ pass++;
-+ *again = TRUE;
-+ break;
-+ case NDS32_RELAX_EX9_REPLACE_ROUND:
-+ if (table->target_optimize & NDS32_RELAX_IFC_ON)
-+ {
-+ /* Do jump IFC optimization again. */
-+ if (!nds32_elf_ifc_finish (link_info))
-+ (*_bfd_error_handler) (_("error: Jump IFC Fail."));
-+ }
-+ break;
-+ default:
-+ break;
-+ }
-+ }
-+
-+ return relax_round;
-+}
-+
-+static bfd_boolean
-+nds32_elf_relax_section (bfd *abfd, asection *sec,
-+ struct bfd_link_info *link_info, bfd_boolean *again)
-+{
-+ nds32_elf_blank_t *relax_blank_list = NULL;
-+ Elf_Internal_Shdr *symtab_hdr;
-+ Elf_Internal_Rela *internal_relocs;
-+ Elf_Internal_Rela *irel;
-+ Elf_Internal_Rela *irelend;
-+ Elf_Internal_Sym *isymbuf = NULL;
-+ bfd_byte *contents = NULL;
-+ bfd_boolean result = TRUE;
-+ int optimize = 0;
-+ int opt_size = 0;
-+ uint32_t insn;
-+ uint16_t insn16;
-+
-+ /* Target dependent option. */
-+ struct elf_nds32_link_hash_table *table;
-+ int load_store_relax;
-+ int relax_round;
-+
-+ relax_blank_list = NULL;
-+ *again = FALSE;
-+
-+ /* Nothing to do for
-+ relocatable link or
-+ non-relocatable section or
-+ non-code section or
-+ empty content or
-+ no reloc entry. */
-+ if (link_info->relocatable
-+ || (sec->flags & SEC_RELOC) == 0
-+ || (sec->flags & SEC_EXCLUDE) == 1
-+ || (sec->flags & SEC_CODE) == 0
-+ || sec->size == 0
-+ || sec->reloc_count == 0)
-+ return TRUE;
-+
-+ /* 09.12.11 Workaround. */
-+ /* We have to adjust align for R_NDS32_LABEL if needed.
-+ The adjust approach only can fix 2-byte align once. */
-+ if (sec->alignment_power > 2)
-+ return TRUE;
-+
-+#ifdef NDS32_LINUX_TOOLCHAIN
-+ /* Do TLS model conversion once at first. */
-+ nds32_elf_unify_tls_model (abfd, sec, contents, link_info);
-+#endif
-+
-+ /* The optimization type to do. */
-+
-+ table = nds32_elf_hash_table (link_info);
-+ relax_round = nds32_elf_pick_relax (TRUE, sec, again, table, link_info);
-+
-+ switch (relax_round)
-+ {
-+ case NDS32_RELAX_JUMP_IFC_ROUND:
-+ /* Here is the entrance of ifc jump relaxation. */
-+ if (!nds32_elf_ifc_calc (link_info, abfd, sec))
-+ return FALSE;
-+ nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
-+ return TRUE;
-+
-+ case NDS32_RELAX_EX9_BUILD_ROUND:
-+ /* Here is the entrance of ex9 relaxation. There are two pass of
-+ ex9 relaxation. The one is to traverse all instructions and build
-+ the hash table. The other one is to compare instructions and replace
-+ it by ex9.it. */
-+ if (!nds32_elf_ex9_build_hash_table (abfd, sec, link_info))
-+ return FALSE;
-+ nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
-+ return TRUE;
-+
-+ case NDS32_RELAX_EX9_REPLACE_ROUND:
-+ if (!nds32_elf_ex9_replace_instruction (link_info, abfd, sec))
-+ return FALSE;
-+ return TRUE;
-+
-+ case NDS32_RELAX_IFC_ROUND:
-+ /* The entrance of link time ifc. We must to do it before all relaxation
-+ beginging, because it may magnify size. */
-+ if (!nds32_elf_ifc_trace_code (link_info, abfd, sec))
-+ return FALSE;
-+ nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
-+ return TRUE;
-+
-+ case NDS32_RELAX_EMPTY_ROUND:
-+ nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
-+ return TRUE;
-+
-+ case NDS32_RELAX_NORMAL_ROUND:
-+ /* Save the first section for abs symbol relaxation. */
-+ nds32_elf_relax_guard (NULL, 0, sec, NULL, again, TRUE,
-+ table, NULL, NULL);
-+ default:
-+ if (sec->reloc_count == 0)
-+ return TRUE;
-+ break;
-+ }
-+
-+ /* The begining of general relaxation. */
-+
-+ if (is_SDA_BASE_set == 0)
-+ {
-+ bfd_vma gp;
-+ is_SDA_BASE_set = 1;
-+ nds32_elf_final_sda_base (sec->output_section->owner, link_info,
-+ &gp, FALSE);
-+ relax_range_measurement (abfd);
-+ }
-+
-+ if (is_ITB_BASE_set == 0)
-+ {
-+ /* Set the _ITB_BASE_. */
-+ if (!nds32_elf_ex9_itb_base (link_info))
-+ {
-+ (*_bfd_error_handler) (_("%B: error: Cannot set _ITB_BASE_"), abfd);
-+ bfd_set_error (bfd_error_bad_value);
-+ }
-+ }
-+
-+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
-+ /* Relocations MUST be kept in memory, because relaxation adjust them. */
-+ internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
-+ TRUE /* keep_memory */);
-+ if (internal_relocs == NULL)
-+ goto error_return;
-+
-+ irelend = internal_relocs + sec->reloc_count;
-+ irel = find_relocs_at_address (internal_relocs, internal_relocs,
-+ irelend, R_NDS32_RELAX_ENTRY);
-+
-+ if (irel == irelend)
-+ return TRUE;
-+
-+ if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
-+ {
-+ if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
-+ {
-+ nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
-+ return TRUE;
-+ }
-+
-+ if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
-+ optimize = 1;
-+
-+ if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
-+ opt_size = 1;
-+ }
-+
-+ load_store_relax = table->load_store_relax;
-+
-+ /* Get symbol table and section content. */
-+ if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
-+ || !nds32_get_local_syms (abfd, sec, &isymbuf))
-+ goto error_return;
-+
-+ /* Do relax loop only when finalize is not done.
-+ Take care of relaxable relocs except INSN16. */
-+ for (irel = internal_relocs; irel < irelend; irel++)
-+ {
-+ int seq_len; /* Original length of instruction sequence. */
-+ int insn_len = 0; /* Final length of instruction sequence. */
-+ bfd_boolean removed;
-+
-+ insn = 0;
-+ if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
-+ && (irel->r_addend & 0x1f) >= 2)
-+ optimize = 1;
-+
-+ /* Relocation Types
-+ R_NDS32_LONGCALL1 53
-+ R_NDS32_LONGCALL2 54
-+ R_NDS32_LONGCALL3 55
-+ R_NDS32_LONGJUMP1 56
-+ R_NDS32_LONGJUMP2 57
-+ R_NDS32_LONGJUMP3 58
-+ R_NDS32_LOADSTORE 59 */
-+ if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
-+ seq_len = GET_SEQ_LEN (irel->r_addend);
-+
-+ /* Relocation Types
-+ R_NDS32_LONGCALL4 107
-+ R_NDS32_LONGCALL5 108
-+ R_NDS32_LONGCALL6 109
-+ R_NDS32_LONGJUMP4 110
-+ R_NDS32_LONGJUMP5 111
-+ R_NDS32_LONGJUMP6 112
-+ R_NDS32_LONGJUMP7 113 */
-+ else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
-+ seq_len = 4;
-+
-+ /* Relocation Types
-+ R_NDS32_LO12S0_RELA 30
-+ R_NDS32_LO12S1_RELA 29
-+ R_NDS32_LO12S2_RELA 28
-+ R_NDS32_LO12S2_SP_RELA 71
-+ R_NDS32_LO12S2_DP_RELA 70
-+ R_NDS32_GOT_LO12 46
-+ R_NDS32_GOTOFF_LO12 50
-+ R_NDS32_PLTREL_LO12 65
-+ R_NDS32_PLT_GOTREL_LO12 67
-+ R_NDS32_17IFC_PCREL_RELA 96
-+ R_NDS32_GOT_SUFF 193
-+ R_NDS32_GOTOFF_SUFF 194
-+ R_NDS32_PLT_GOT_SUFF 195
-+ R_NDS32_MULCALL_SUFF 196
-+ R_NDS32_PTR 197 */
-+ else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
-+ && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
-+ || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
-+ seq_len = 0;
-+ else
-+ continue;
-+
-+ insn_len = seq_len;
-+ removed = FALSE;
-+
-+ switch (ELF32_R_TYPE (irel->r_info))
-+ {
-+ case R_NDS32_LONGCALL1:
-+ removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
-+ &insn_len, contents, isymbuf,
-+ symtab_hdr);
-+ break;
-+ case R_NDS32_LONGCALL2:
-+ removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
-+ &insn_len, contents, isymbuf,
-+ symtab_hdr);
-+ break;
-+ case R_NDS32_LONGCALL3:
-+ removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
-+ &insn_len, contents, isymbuf,
-+ symtab_hdr);
-+ break;
-+ case R_NDS32_LONGJUMP1:
-+ removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
-+ &insn_len, contents, isymbuf,
-+ symtab_hdr);
-+ break;
-+ case R_NDS32_LONGJUMP2:
-+ removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
-+ &insn_len, contents, isymbuf,
-+ symtab_hdr);
-+ break;
-+ case R_NDS32_LONGJUMP3:
-+ removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
-+ &insn_len, contents, isymbuf,
-+ symtab_hdr);
-+ break;
-+ case R_NDS32_LONGCALL4:
-+ removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
-+ &insn_len, contents, isymbuf,
-+ symtab_hdr);
-+ break;
-+ case R_NDS32_LONGCALL5:
-+ removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
-+ &insn_len, contents, isymbuf,
-+ symtab_hdr);
-+ break;
-+ case R_NDS32_LONGCALL6:
-+ removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
-+ &insn_len, contents, isymbuf,
-+ symtab_hdr);
-+ break;
-+ case R_NDS32_LONGJUMP4:
-+ removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
-+ &insn_len, contents, isymbuf,
-+ symtab_hdr);
-+ break;
-+ case R_NDS32_LONGJUMP5:
-+ removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
-+ &insn_len, &seq_len, contents,
-+ isymbuf, symtab_hdr);
-+ break;
-+ case R_NDS32_LONGJUMP6:
-+ removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
-+ &insn_len, &seq_len, contents,
-+ isymbuf, symtab_hdr);
-+ break;
-+ case R_NDS32_LONGJUMP7:
-+ removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
-+ &insn_len, &seq_len, contents,
-+ isymbuf, symtab_hdr);
-+ break;
-+ case R_NDS32_LOADSTORE:
-+ removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
-+ internal_relocs, &insn_len,
-+ contents, isymbuf, symtab_hdr,
-+ load_store_relax, table);
-+ break;
-+ case R_NDS32_LO12S0_RELA:
-+ case R_NDS32_LO12S1_RELA:
-+ case R_NDS32_LO12S2_RELA:
-+ case R_NDS32_LO12S2_DP_RELA:
-+ case R_NDS32_LO12S2_SP_RELA:
-+ /* Relax for low part. */
-+ nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
-+ contents, isymbuf, symtab_hdr, table);
-+
-+ /* It is impossible to delete blank, so just continue. */
-+ continue;
-+ case R_NDS32_GOT_LO12:
-+ case R_NDS32_GOTOFF_LO12:
-+ case R_NDS32_PLTREL_LO12:
-+ case R_NDS32_PLT_GOTREL_LO12:
-+ case R_NDS32_GOTPC_LO12:
-+ /* Relax for PIC gp-relative low part. */
-+ nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
-+ isymbuf, symtab_hdr);
-+
-+ /* It is impossible to delete blank, so just continue. */
-+ continue;
-+ case R_NDS32_TLS_LE_LO12:
-+ /* Relax for LE TLS low part. */
-+ nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
-+ isymbuf, symtab_hdr);
-+
-+ /* It is impossible to delete blank, so just continue. */
-+ continue;
-+ case R_NDS32_TLS_LE_ADD:
-+ nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
-+ contents, isymbuf, symtab_hdr, again);
-+ /* It is impossible to delete blank, so just continue. */
-+ continue;
-+ case R_NDS32_TLS_LE_LS:
-+ nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
-+ contents, isymbuf, symtab_hdr, again);
-+ continue;
-+ case R_NDS32_PTR:
-+ removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
-+ &insn_len, &seq_len, contents);
-+ break;
-+ case R_NDS32_PLT_GOT_SUFF:
-+ nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
-+ internal_relocs, contents,
-+ isymbuf, symtab_hdr, again);
-+ /* It is impossible to delete blank, so just continue. */
-+ continue;
-+ case R_NDS32_GOT_SUFF:
-+ nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
-+ internal_relocs, contents,
-+ symtab_hdr, again);
-+ /* It is impossible to delete blank, so just continue. */
-+ continue;
-+ case R_NDS32_GOTOFF_SUFF:
-+ nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
-+ internal_relocs, contents,
-+ isymbuf, symtab_hdr, again);
-+ /* It is impossible to delete blank, so just continue. */
-+ continue;
-+ default:
-+ continue;
-+
-+ }
-+ if (removed && seq_len - insn_len > 0)
-+ {
-+ if (!insert_nds32_elf_blank
-+ (&relax_blank_list, irel->r_offset + insn_len,
-+ seq_len - insn_len))
-+ goto error_return;
-+ *again = TRUE;
-+ }
-+ }
-+
-+ calc_nds32_blank_total (relax_blank_list);
-+
-+ if (table->relax_fp_as_gp)
-+ {
-+ if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
-+ irelend, isymbuf))
-+ goto error_return;
-+
-+ if (*again == FALSE)
-+ {
-+ if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
-+ irelend))
-+ goto error_return;
-+ }
-+ }
-+
-+ nds32_elf_pick_relax (FALSE, sec, again, table, link_info);
-+
-+ if (*again == FALSE)
-+ {
-+ if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
-+ &relax_blank_list, optimize, opt_size))
-+ goto error_return;
-+ }
-+
-+ /* It doesn't matter optimize_for_space_no_align anymore.
-+ If object file is assembled with flag '-Os',
-+ the we don't adjust jump-destination on 4-byte boundary. */
-+
-+ if (relax_blank_list)
-+ {
-+ nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
-+ relax_blank_list = NULL;
-+ }
-+
-+ if (*again == FALSE)
-+ {
-+ /* Closing the section, so we don't relax it anymore. */
-+ bfd_vma sec_size_align;
-+ Elf_Internal_Rela *tmp_rel;
-+
-+ /* Pad to alignment boundary. Only handle current section alignment. */
-+ sec_size_align = (sec->size + (~((bfd_vma)(-1) << sec->alignment_power)))
-+ & ((bfd_vma)(-1) << sec->alignment_power);
-+ if ((sec_size_align - sec->size) & 0x2)
-+ {
-+ insn16 = NDS32_NOP16;
-+ bfd_putb16 (insn16, contents + sec->size);
-+ sec->size += 2;
-+ }
-+
-+ while (sec_size_align != sec->size)
-+ {
-+ insn = NDS32_NOP32;
-+ bfd_putb32 (insn, contents + sec->size);
-+ sec->size += 4;
-+ }
-+
-+ tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
-+ irelend, R_NDS32_RELAX_ENTRY);
-+ if (tmp_rel != irelend)
-+ tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
-+
-+ clean_nds32_elf_blank ();
-+ }
-+
-+finish:
-+ if (internal_relocs != NULL
-+ && elf_section_data (sec)->relocs != internal_relocs)
-+ free (internal_relocs);
-+
-+ if (contents != NULL
-+ && elf_section_data (sec)->this_hdr.contents != contents)
-+ free (contents);
-+
-+ if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
-+ free (isymbuf);
-+
-+ return result;
-+
-+error_return:
-+ result = FALSE;
-+ goto finish;
-+}
-+
-+static struct bfd_elf_special_section const nds32_elf_special_sections[] = {
-+ {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
-+ {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
-+ {NULL, 0, 0, 0, 0}
-+};
-+
-+static bfd_boolean
-+nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
-+ struct bfd_link_info *info,
-+ void *finfo ATTRIBUTE_UNUSED,
-+ bfd_boolean (*func) (void *, const char *,
-+ Elf_Internal_Sym *,
-+ asection *,
-+ struct elf_link_hash_entry *)
-+ ATTRIBUTE_UNUSED)
-+{
-+ FILE *sym_ld_script = NULL;
-+ struct elf_nds32_link_hash_table *table;
-+
-+ table = nds32_elf_hash_table (info);
-+ sym_ld_script = table->sym_ld_script;
-+
-+ if (check_start_export_sym)
-+ fprintf (sym_ld_script, "}\n");
-+
-+ return TRUE;
-+}
-+
-+static enum elf_reloc_type_class
-+nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
-+ const asection *rel_sec ATTRIBUTE_UNUSED,
-+ const Elf_Internal_Rela *rela)
-+{
-+ switch ((int) ELF32_R_TYPE (rela->r_info))
-+ {
-+ case R_NDS32_RELATIVE:
-+ return reloc_class_relative;
-+ case R_NDS32_JMP_SLOT:
-+ return reloc_class_plt;
-+ case R_NDS32_COPY:
-+ return reloc_class_copy;
-+ default:
-+ return reloc_class_normal;
-+ }
-+}
-+
-+/* Put target dependent option into info hash table. */
-+void
-+bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
-+ int relax_fp_as_gp,
-+ int eliminate_gc_relocs,
-+ FILE * sym_ld_script, int load_store_relax,
-+ int target_optimize, int relax_status,
-+ int relax_round, FILE * ex9_export_file,
-+ FILE * ex9_import_file,
-+ int update_ex9_table, int ex9_limit,
-+ bfd_boolean ex9_loop_aware,
-+ bfd_boolean ifc_loop_aware,
-+ int hyper_relax)
-+{
-+ struct elf_nds32_link_hash_table *table;
-+
-+ /* Initialize indirect call hash table. */
-+ nds32_elf_ict_hash_init ();
-+
-+ table = nds32_elf_hash_table (link_info);
-+ if (table == NULL)
-+ return;
-+
-+ table->relax_fp_as_gp = relax_fp_as_gp;
-+ table->eliminate_gc_relocs = eliminate_gc_relocs;
-+ table->sym_ld_script = sym_ld_script;
-+ table ->load_store_relax = load_store_relax;
-+ table->target_optimize = target_optimize;
-+ table->relax_status = relax_status;
-+ table->relax_round = relax_round;
-+ table->ex9_export_file = ex9_export_file;
-+ table->ex9_import_file = ex9_import_file;
-+ table->update_ex9_table = update_ex9_table;
-+ table->ex9_limit = ex9_limit;
-+ table->ex9_loop_aware = ex9_loop_aware;
-+ table->ifc_loop_aware = ifc_loop_aware;
-+ table->hyper_relax = hyper_relax;
-+
-+ /* We have to do ifc optimization before general relax. */
-+ if (target_optimize & NDS32_RELAX_IFC_ON)
-+ {
-+ /* Initialize ifc hash table. */
-+ if (!nds32_elf_ifc_init ())
-+ return;
-+ }
-+ if (target_optimize & NDS32_RELAX_EX9_ON
-+ || (ex9_import_file != NULL && update_ex9_table == 1))
-+ {
-+ /* Initialize ex9 hash table. */
-+ if (!nds32_elf_ex9_init ())
-+ return;
-+ }
-+}
-+
-+void
-+bfd_elf32_nds32_append_section (struct bfd_link_info *link_info,
-+ bfd *abfd, int target_optimize)
-+{
-+ asection *itable;
-+ struct bfd_link_hash_entry *h;
-+ unsigned int i, count = 0;
-+
-+ /* Insert section ".ex9.itable". */
-+ if (target_optimize & NDS32_RELAX_EX9_ON)
-+ {
-+ itable = bfd_make_section_with_flags (abfd, ".ex9.itable",
-+ SEC_CODE | SEC_ALLOC | SEC_LOAD
-+ | SEC_HAS_CONTENTS | SEC_READONLY
-+ | SEC_IN_MEMORY | SEC_KEEP
-+ | SEC_RELOC);
-+ if (itable)
-+ {
-+ itable->gc_mark = 1;
-+ itable->alignment_power = 2;
-+ itable->size = 0x1000;
-+ itable->contents = bfd_zalloc (abfd, itable->size);
-+
-+ /* Add a symbol in the head of ex9.itable to objdump clearly. */
-+ h = bfd_link_hash_lookup (link_info->hash, "_EX9_BASE_",
-+ FALSE, FALSE, FALSE);
-+ _bfd_generic_link_add_one_symbol
-+ (link_info, link_info->output_bfd, "_EX9_BASE_",
-+ BSF_GLOBAL | BSF_WEAK, itable, 0, (const char *) NULL, FALSE,
-+ get_elf_backend_data (link_info->output_bfd)->collect, &h);
-+ }
-+ }
-+
-+ /* Count number of indirect call function. */
-+ indirect_call_table.frozen = 1;
-+ for (i = 0; i < indirect_call_table.size; i++)
-+ {
-+ struct bfd_hash_entry *p;
-+ struct elf_nds32_ict_hash_entry *entry;
-+
-+ for (p = indirect_call_table.table[i]; p != NULL; p = p->next)
-+ {
-+ entry = (struct elf_nds32_ict_hash_entry *) p;
-+ entry->order = count;
-+ count++;
-+ }
-+ }
-+ indirect_call_table.frozen = 0;
-+
-+ if (count)
-+ {
-+ h = bfd_link_hash_lookup (link_info->hash, "_INDIRECT_CALL_TABLE_BASE_",
-+ FALSE, FALSE, FALSE);
-+ if (h && (h->type == bfd_link_hash_defined
-+ || h->type == bfd_link_hash_defweak
-+ || h->type == bfd_link_hash_common))
-+ {
-+ (*_bfd_error_handler) (_("Warning: _INDIRECT_CALL_TABLE_BASE_ has already"
-+ "be defined. All ICT suffix is ignored."));
-+ ignore_indirect_call = TRUE;
-+ return;
-+ }
-+
-+ itable = bfd_make_section_with_flags (abfd, NDS32_ICT_SECTION,
-+ SEC_CODE | SEC_ALLOC | SEC_LOAD
-+ | SEC_HAS_CONTENTS | SEC_READONLY
-+ | SEC_IN_MEMORY | SEC_KEEP
-+ | SEC_RELOC);
-+ if (itable)
-+ {
-+ itable->gc_mark = 1;
-+ itable->alignment_power = 2;
-+ itable->size = count * 4;
-+ itable->contents = bfd_zalloc (abfd, itable->size);
-+
-+ /* Add a symbol in the head of .nds32.ict to objdump clearly. */
-+ h = bfd_link_hash_lookup (link_info->hash,
-+ "_INDIRECT_CALL_TABLE_BASE_",
-+ FALSE, FALSE, FALSE);
-+ _bfd_generic_link_add_one_symbol
-+ (link_info, link_info->output_bfd, "_INDIRECT_CALL_TABLE_BASE_",
-+ BSF_GLOBAL | BSF_WEAK, itable, 0, (const char *) NULL, FALSE,
-+ get_elf_backend_data (link_info->output_bfd)->collect, &h);
-+ }
-+
-+ ict_file = fopen ("nds32_ict.s", FOPEN_WT);
-+ if(ict_file == NULL)
-+ (*_bfd_error_handler) (_("Warning: Fail to build nds32_ict.s."));
-+ }
-+}
-+
-+/* These functions and data-structures are used for fp-as-gp
-+ optimization. */
-+
-+#define FAG_THRESHOLD 3 /* At least 3 gp-access. */
-+/* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
-+ the read-only section and read-write section. */
-+#define FAG_WINDOW (508 - 32)
-+
-+/* An nds32_fag represent a gp-relative access.
-+ We find best fp-base by using a sliding window
-+ to find a base address which can cover most gp-access. */
-+struct nds32_fag
-+{
-+ struct nds32_fag *next; /* NULL-teminated linked list. */
-+ bfd_vma addr; /* The address of this fag. */
-+ Elf_Internal_Rela **relas; /* The relocations associated with this fag.
-+ It is used for applying FP7U2_FLAG. */
-+ int count; /* How many times this address is referred.
-+ There should be exactly `count' relocations
-+ in relas. */
-+ int relas_capcity; /* The buffer size of relas.
-+ We use an array instead of linked-list,
-+ and realloc is used to adjust buffer size. */
-+};
-+
-+static void
-+nds32_fag_init (struct nds32_fag *head)
-+{
-+ memset (head, 0, sizeof (struct nds32_fag));
-+}
-+
-+static void
-+nds32_fag_verify (struct nds32_fag *head)
-+{
-+ struct nds32_fag *iter;
-+ struct nds32_fag *prev;
-+
-+ prev = NULL;
-+ iter = head->next;
-+ while (iter)
-+ {
-+ if (prev && prev->addr >= iter->addr)
-+ puts ("Bug in fp-as-gp insertion.");
-+ prev = iter;
-+ iter = iter->next;
-+ }
-+}
-+
-+/* Insert a fag in ascending order.
-+ If a fag of the same address already exists,
-+ they are chained by relas array. */
-+
-+static void
-+nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
-+ Elf_Internal_Rela * rel)
-+{
-+ struct nds32_fag *iter;
-+ struct nds32_fag *new_fag;
-+ const int INIT_RELAS_CAP = 4;
-+
-+ for (iter = head;
-+ iter->next && iter->next->addr <= addr;
-+ iter = iter->next)
-+ /* Find somewhere to insert. */ ;
-+
-+ /* `iter' will be equal to `head' if the list is empty. */
-+ if (iter != head && iter->addr == addr)
-+ {
-+ /* The address exists in the list.
-+ Insert `rel' into relocation list, relas. */
-+
-+ /* Check whether relas is big enough. */
-+ if (iter->count >= iter->relas_capcity)
-+ {
-+ iter->relas_capcity *= 2;
-+ iter->relas = bfd_realloc
-+ (iter->relas, iter->relas_capcity * sizeof (void *));
-+ }
-+ iter->relas[iter->count++] = rel;
-+ return;
-+ }
-+
-+ /* This is a new address. Create a fag node for it. */
-+ new_fag = bfd_malloc (sizeof (struct nds32_fag));
-+ memset (new_fag, 0, sizeof (*new_fag));
-+ new_fag->addr = addr;
-+ new_fag->count = 1;
-+ new_fag->next = iter->next;
-+ new_fag->relas_capcity = INIT_RELAS_CAP;
-+ new_fag->relas = (Elf_Internal_Rela **)
-+ bfd_malloc (new_fag->relas_capcity * sizeof (void *));
-+ new_fag->relas[0] = rel;
-+ iter->next = new_fag;
-+
-+ nds32_fag_verify (head);
-+}
-+
-+static void
-+nds32_fag_free_list (struct nds32_fag *head)
-+{
-+ struct nds32_fag *iter;
-+
-+ iter = head->next;
-+ while (iter)
-+ {
-+ struct nds32_fag *tmp = iter;
-+ iter = iter->next;
-+ free (tmp->relas);
-+ tmp->relas = NULL;
-+ free (tmp);
-+ }
-+}
-+
-+/* Find the best fp-base address.
-+ The relocation associated with that address is returned,
-+ so we can track the symbol instead of a fixed address.
-+
-+ When relaxation, the address of an datum may change,
-+ because a text section is shrinked, so the data section
-+ moves forward. If the aligments of text and data section
-+ are different, their distance may change too.
-+ Therefore, tracking a fixed address is not appriate. */
-+
-+static int
-+nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
-+{
-+ struct nds32_fag *base; /* First fag in the window. */
-+ struct nds32_fag *last; /* First fag outside the window. */
-+ int accu = 0; /* Usage accumulation. */
-+ struct nds32_fag *best; /* Best fag. */
-+ int baccu = 0; /* Best accumulation. */
-+
-+ /* Use first fag for initial, and find the last fag in the window.
-+
-+ In each iteration, we could simply subtract previous fag
-+ and accumulate following fags which are inside the window,
-+ untill we each the end. */
-+
-+ if (head->next == NULL)
-+ {
-+ *bestpp = NULL;
-+ return 0;
-+ }
-+
-+ /* Initialize base. */
-+ base = head->next;
-+ best = base;
-+ for (last = base;
-+ last && last->addr < base->addr + FAG_WINDOW;
-+ last = last->next)
-+ accu += last->count;
-+
-+ baccu = accu;
-+
-+ /* Record the best base in each iteration. */
-+ while (base->next)
-+ {
-+ accu -= base->count;
-+ base = base->next;
-+ /* Account fags in window. */
-+ for (/* Nothing. */;
-+ last && last->addr < base->addr + FAG_WINDOW;
-+ last = last->next)
-+ accu += last->count;
-+
-+ /* A better fp-base? */
-+ if (accu > baccu)
-+ {
-+ best = base;
-+ baccu = accu;
-+ }
-+ }
-+
-+ if (bestpp)
-+ *bestpp = best;
-+ return baccu;
-+}
-+
-+/* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
-+ so we can convert it fo fp-relative access later.
-+ `best_fag' is the best fp-base. Only those inside the window
-+ of best_fag is applied the flag. */
-+
-+static bfd_boolean
-+nds32_fag_mark_relax (struct bfd_link_info *link_info,
-+ asection *sec, struct nds32_fag *best_fag,
-+ Elf_Internal_Rela *internal_relocs,
-+ Elf_Internal_Rela *irelend)
-+{
-+ struct nds32_fag *ifag;
-+ bfd_vma best_fpbase, gp;
-+ bfd *output_bfd;
-+
-+ output_bfd = sec->output_section->owner;
-+ nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
-+ best_fpbase = best_fag->addr;
-+
-+ if (best_fpbase > gp + sdata_range[1][1]
-+ || best_fpbase < gp - sdata_range[1][0])
-+ return FALSE;
-+
-+ /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
-+ so we know they can be converted to lwi37.fp. */
-+ for (ifag = best_fag;
-+ ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
-+ {
-+ int i;
-+
-+ for (i = 0; i < ifag->count; i++)
-+ {
-+ Elf_Internal_Rela *insn16_rel;
-+ Elf_Internal_Rela *fag_rel;
-+
-+ fag_rel = ifag->relas[i];
-+
-+ /* Only if this is within the WINDOWS, FP7U2_FLAG
-+ is applied. */
-+
-+ insn16_rel = find_relocs_at_address
-+ (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
-+
-+ if (insn16_rel != irelend)
-+ insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
-+ }
-+ }
-+ return TRUE;
-+}
-+
-+/* Reset INSN16 to clean fp as gp. */
-+
-+static void
-+nds32_fag_unmark_relax (struct nds32_fag *fag,
-+ Elf_Internal_Rela *internal_relocs,
-+ Elf_Internal_Rela *irelend)
-+{
-+ struct nds32_fag *ifag;
-+ int i;
-+ Elf_Internal_Rela *insn16_rel;
-+ Elf_Internal_Rela *fag_rel;
-+
-+ for (ifag = fag; ifag; ifag = ifag->next)
-+ {
-+ for (i = 0; i < ifag->count; i++)
-+ {
-+ fag_rel = ifag->relas[i];
-+
-+ /* Restore the INSN16 relocation. */
-+ insn16_rel = find_relocs_at_address
-+ (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
-+
-+ if (insn16_rel != irelend)
-+ insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
-+ }
-+ }
-+}
-+
-+/* This is the main function of fp-as-gp optimization.
-+ It should be called by relax_section. */
-+
-+static bfd_boolean
-+nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
-+ bfd *abfd, asection *sec,
-+ Elf_Internal_Rela *internal_relocs,
-+ Elf_Internal_Rela *irelend,
-+ Elf_Internal_Sym *isymbuf)
-+{
-+ Elf_Internal_Rela *begin_rel = NULL;
-+ Elf_Internal_Rela *irel;
-+ struct nds32_fag fag_head;
-+ Elf_Internal_Shdr *symtab_hdr;
-+ bfd_byte *contents;
-+ bfd_boolean ifc_inside = FALSE;
-+
-+ /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
-+
-+ /* Per-function fp-base selection.
-+ 1. Create a list for all the gp-relative access.
-+ 2. Base on those gp-relative address,
-+ find a fp-base which can cover most access.
-+ 3. Use the fp-base for fp-as-gp relaxation.
-+
-+ NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
-+ we should
-+ 1. delete the `la $fp, _FP_BASE_' instruction and
-+ 2. not convert lwi.gp to lwi37.fp.
-+
-+ To delete the _FP_BASE_ instruction, we simply apply
-+ R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
-+
-+ To suppress the conversion, we simply NOT to apply
-+ R_NDS32_INSN16_FP7U2_FLAG flag. */
-+
-+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
-+
-+ if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
-+ || !nds32_get_local_syms (abfd, sec, &isymbuf))
-+ return FALSE;
-+
-+ /* Check whether it is worth for fp-as-gp optimization,
-+ i.e., at least 3 gp-load.
-+
-+ Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
-+ apply this optimization. */
-+
-+ for (irel = internal_relocs; irel < irelend; irel++)
-+ {
-+ /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
-+ One we enter the begin of the region, we track all the LW/ST
-+ instructions, so when we leave the region, we try to find
-+ the best fp-base address for those LW/ST instructions. */
-+
-+ if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
-+ && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
-+ {
-+ /* Begin of the region. */
-+ if (begin_rel)
-+ (*_bfd_error_handler) (_("%B: Nested OMIT_FP in %A."), abfd, sec);
-+
-+ begin_rel = irel;
-+ nds32_fag_init (&fag_head);
-+ ifc_inside = FALSE;
-+ }
-+ else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
-+ && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
-+ {
-+ int accu;
-+ struct nds32_fag *best_fag, *tmp_fag;
-+ int dist;
-+
-+ /* End of the region.
-+ Check whether it is worth to do fp-as-gp. */
-+
-+ if (begin_rel == NULL)
-+ {
-+ (*_bfd_error_handler) (_("%B: Unmatched OMIT_FP in %A."), abfd, sec);
-+ continue;
-+ }
-+
-+ accu = nds32_fag_find_base (&fag_head, &best_fag);
-+
-+ /* Clean FP7U2_FLAG because they may set ever. */
-+ tmp_fag = fag_head.next;
-+ nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
-+
-+ /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
-+ if (accu < FAG_THRESHOLD
-+ || !nds32_fag_mark_relax (link_info, sec, best_fag,
-+ internal_relocs, irelend))
-+ {
-+ /* Not worth to do fp-as-gp. */
-+ begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
-+ begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
-+ irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
-+ irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
-+ nds32_fag_free_list (&fag_head);
-+ begin_rel = NULL;
-+ continue;
-+ }
-+
-+ /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
-+ so we use it to record the distance to the reloction of best
-+ fp-base. */
-+ dist = best_fag->relas[0] - begin_rel;
-+ BFD_ASSERT (dist > 0 && dist < 0xffffff);
-+ /* Use high 16 bits of addend to record the _FP_BASE_ matched
-+ relocation. And get the base value when relocating. */
-+ begin_rel->r_addend &= (0x1 << 16) - 1;
-+ begin_rel->r_addend |= dist << 16;
-+
-+ nds32_fag_free_list (&fag_head);
-+ begin_rel = NULL;
-+ }
-+
-+ if (begin_rel == NULL || ifc_inside)
-+ /* Skip if we are not in the region of fp-as-gp. */
-+ continue;
-+
-+ if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
-+ {
-+ bfd_vma addr;
-+ uint32_t insn;
-+
-+ /* A gp-relative access is found. Insert it to the fag-list. */
-+
-+ /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
-+ insn = bfd_getb32 (contents + irel->r_offset);
-+ if (!N32_IS_RT3 (insn))
-+ continue;
-+
-+ addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
-+ nds32_fag_insert (&fag_head, addr, irel);
-+ }
-+ else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
-+ {
-+ begin_rel = NULL;
-+ }
-+ else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
-+ {
-+ /* Suppress fp as gp when encounter ifc. */
-+ ifc_inside = TRUE;
-+ }
-+ }
-+
-+ return TRUE;
-+}
-+
-+/* Remove unused `la $fp, _FD_BASE_' instruction. */
-+
-+static bfd_boolean
-+nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
-+ Elf_Internal_Rela *internal_relocs,
-+ Elf_Internal_Rela *irelend)
-+{
-+ Elf_Internal_Rela *irel;
-+ Elf_Internal_Shdr *symtab_hdr;
-+ bfd_byte *contents = NULL;
-+ nds32_elf_blank_t *relax_blank_list = NULL;
-+ bfd_boolean result = TRUE;
-+ bfd_boolean unused_region = FALSE;
-+
-+ /*
-+ NOTE: Disable fp-as-gp if we encounter ifcall relocations.
-+ * R_NDS32_17IFC_PCREL_RELA
-+ * R_NDS32_10IFCU_PCREL_RELA
-+
-+ CASE??????????????
-+ */
-+
-+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
-+ nds32_get_section_contents (abfd, sec, &contents, TRUE);
-+
-+ for (irel = internal_relocs; irel < irelend; irel++)
-+ {
-+ /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
-+ we marked to in previous pass.
-+ DO NOT scan relocations again, since we've alreadly decided it
-+ and set the flag. */
-+ const char *syname;
-+ int syndx;
-+ uint32_t insn;
-+
-+ if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
-+ && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
-+ unused_region = TRUE;
-+ else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
-+ && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
-+ unused_region = FALSE;
-+
-+ /* We're not in the region. */
-+ if (!unused_region)
-+ continue;
-+
-+ /* _FP_BASE_ must be a GLOBAL symbol. */
-+ syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
-+ if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
-+ continue;
-+
-+ /* The symbol name must be _FP_BASE_. */
-+ syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
-+ if (strcmp (syname, FP_BASE_NAME) != 0)
-+ continue;
-+
-+ if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
-+ {
-+ /* addi.gp $fp, -256 */
-+ insn = bfd_getb32 (contents + irel->r_offset);
-+ if (insn != INSN_ADDIGP_TO_FP)
-+ continue;
-+ }
-+ else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
-+ {
-+ /* addi $fp, $gp, -256 */
-+ insn = bfd_getb32 (contents + irel->r_offset);
-+ if (insn != INSN_ADDI_GP_TO_FP)
-+ continue;
-+ }
-+ else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
-+ {
-+ /* movi $fp, FP_BASE */
-+ insn = bfd_getb32 (contents + irel->r_offset);
-+ if (insn != INSN_MOVI_TO_FP)
-+ continue;
-+ }
-+ else
-+ continue;
-+
-+ /* We got here because a FP_BASE instruction is found. */
-+ if (!insert_nds32_elf_blank_recalc_total
-+ (&relax_blank_list, irel->r_offset, 4))
-+ goto error_return;
-+ }
-+
-+finish:
-+ if (relax_blank_list)
-+ {
-+ nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
-+ relax_blank_list = NULL;
-+ }
-+ return result;
-+
-+error_return:
-+ result = FALSE;
-+ goto finish;
-+}
-+
-+/* This is a version of bfd_generic_get_relocated_section_contents.
-+ We need this variety because relaxation will modify the dwarf
-+ infomation. When there is undefined symbol reference error mesage,
-+ linker need to dump line number where the symbol be used. However
-+ the address is be relaxed, it can not get the original dwarf contents.
-+ The variety only modify function call for reading in the section. */
-+
-+static bfd_byte *
-+nds32_elf_get_relocated_section_contents (bfd *abfd,
-+ struct bfd_link_info *link_info,
-+ struct bfd_link_order *link_order,
-+ bfd_byte *data,
-+ bfd_boolean relocatable,
-+ asymbol **symbols)
-+{
-+ bfd *input_bfd = link_order->u.indirect.section->owner;
-+ asection *input_section = link_order->u.indirect.section;
-+ long reloc_size;
-+ arelent **reloc_vector;
-+ long reloc_count;
-+
-+ reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
-+ if (reloc_size < 0)
-+ return NULL;
-+
-+ /* Read in the section. */
-+ if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE))
-+ return NULL;
-+
-+ if (reloc_size == 0)
-+ return data;
-+
-+ reloc_vector = (arelent **) bfd_malloc (reloc_size);
-+ if (reloc_vector == NULL)
-+ return NULL;
-+
-+ reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
-+ reloc_vector, symbols);
-+ if (reloc_count < 0)
-+ goto error_return;
-+
-+ if (reloc_count > 0)
-+ {
-+ arelent **parent;
-+ for (parent = reloc_vector; *parent != NULL; parent++)
-+ {
-+ char *error_message = NULL;
-+ asymbol *symbol;
-+ bfd_reloc_status_type r;
-+
-+ symbol = *(*parent)->sym_ptr_ptr;
-+ if (symbol->section && discarded_section (symbol->section))
-+ {
-+ bfd_byte *p;
-+ static reloc_howto_type none_howto
-+ = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
-+ "unused", FALSE, 0, 0, FALSE);
-+
-+ p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
-+ _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
-+ p);
-+ (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
-+ (*parent)->addend = 0;
-+ (*parent)->howto = &none_howto;
-+ r = bfd_reloc_ok;
-+ }
-+ else
-+ r = bfd_perform_relocation (input_bfd, *parent, data,
-+ input_section,
-+ relocatable ? abfd : NULL,
-+ &error_message);
-+
-+ if (relocatable)
-+ {
-+ asection *os = input_section->output_section;
-+
-+ /* A partial link, so keep the relocs. */
-+ os->orelocation[os->reloc_count] = *parent;
-+ os->reloc_count++;
-+ }
-+
-+ if (r != bfd_reloc_ok)
-+ {
-+ switch (r)
-+ {
-+ case bfd_reloc_undefined:
-+ if (!((*link_info->callbacks->undefined_symbol)
-+ (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
-+ input_bfd, input_section, (*parent)->address, TRUE)))
-+ goto error_return;
-+ break;
-+ case bfd_reloc_dangerous:
-+ BFD_ASSERT (error_message != NULL);
-+ if (!((*link_info->callbacks->reloc_dangerous)
-+ (link_info, error_message, input_bfd, input_section,
-+ (*parent)->address)))
-+ goto error_return;
-+ break;
-+ case bfd_reloc_overflow:
-+ if (!((*link_info->callbacks->reloc_overflow)
-+ (link_info, NULL,
-+ bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
-+ (*parent)->howto->name, (*parent)->addend,
-+ input_bfd, input_section, (*parent)->address)))
-+ goto error_return;
-+ break;
-+ case bfd_reloc_outofrange:
-+ /* PR ld/13730:
-+ This error can result when processing some partially
-+ complete binaries. Do not abort, but issue an error
-+ message instead. */
-+ link_info->callbacks->einfo
-+ (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"),
-+ abfd, input_section, * parent);
-+ goto error_return;
-+
-+ default:
-+ abort ();
-+ break;
-+ }
-+ }
-+ }
-+ }
-+
-+ free (reloc_vector);
-+ return data;
-+
-+error_return:
-+ free (reloc_vector);
-+ return NULL;
-+}
-+
-+/* Check target symbol. */
-+
-+static bfd_boolean
-+nds32_elf_is_target_special_symbol (bfd *abfd ATTRIBUTE_UNUSED, asymbol *sym)
-+{
-+ if (!sym || !sym->name || sym->name[0] != '$')
-+ return FALSE;
-+ return TRUE;
-+}
-+
-+/* nds32 find maybe function sym. Ignore target special symbol
-+ first, and then go the general function. */
-+
-+static bfd_size_type
-+nds32_elf_maybe_function_sym (const asymbol *sym, asection *sec,
-+ bfd_vma *code_off)
-+{
-+ if (nds32_elf_is_target_special_symbol (NULL, (asymbol *) sym))
-+ return 0;
-+
-+ return _bfd_elf_maybe_function_sym (sym, sec, code_off);
-+}
-+
-+
-+/* Link-time IFC relaxation.
-+ In this optimization, we chains jump instructions
-+ of the same destination with ifcall. */
-+
-+
-+/* List to save jal and j relocation. */
-+struct elf_nds32_ifc_symbol_entry
-+{
-+ asection *sec;
-+ struct elf_link_hash_entry *h;
-+ struct elf_nds32_ifc_irel_list *irel_head;
-+ unsigned long insn;
-+ int times;
-+ int enable; /* Apply ifc. */
-+ int ex9_enable; /* Apply ifc after ex9. */
-+ struct elf_nds32_ifc_symbol_entry *next;
-+};
-+
-+struct elf_nds32_ifc_irel_list
-+{
-+ Elf_Internal_Rela *irel;
-+ asection *sec;
-+ bfd_vma addr;
-+ /* If this is set, then it is the last instruction for
-+ ifc-chain, so it must be keep for the actual branching. */
-+ int keep;
-+ struct elf_nds32_ifc_irel_list *next;
-+};
-+
-+static struct elf_nds32_ifc_symbol_entry *ifc_symbol_head = NULL;
-+
-+/* Insert symbol of jal and j for ifc. */
-+
-+static void
-+nds32_elf_ifc_insert_symbol (asection *sec,
-+ struct elf_link_hash_entry *h,
-+ Elf_Internal_Rela *irel,
-+ unsigned long insn)
-+{
-+ struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
-+
-+ /* Check there is target of existing entry the same as the new one. */
-+ while (ptr != NULL)
-+ {
-+ if (((h == NULL && ptr->sec == sec
-+ && ELF32_R_SYM (ptr->irel_head->irel->r_info) == ELF32_R_SYM (irel->r_info)
-+ && ptr->irel_head->irel->r_addend == irel->r_addend)
-+ || h != NULL)
-+ && ptr->h == h
-+ && ptr->insn == insn)
-+ {
-+ /* The same target exist, so insert into list. */
-+ struct elf_nds32_ifc_irel_list *irel_list = ptr->irel_head;
-+
-+ while (irel_list->next != NULL)
-+ irel_list = irel_list->next;
-+ irel_list->next = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
-+ irel_list = irel_list->next;
-+ irel_list->irel = irel;
-+ irel_list->keep = 1;
-+
-+ if (h == NULL)
-+ irel_list->sec = NULL;
-+ else
-+ irel_list->sec = sec;
-+ irel_list->next = NULL;
-+ return;
-+ }
-+ if (ptr->next == NULL)
-+ break;
-+ ptr = ptr->next;
-+ }
-+
-+ /* There is no same target entry, so build a new one. */
-+ if (ifc_symbol_head == NULL)
-+ {
-+ ifc_symbol_head = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
-+ ptr = ifc_symbol_head;
-+ }
-+ else
-+ {
-+ ptr->next = bfd_malloc (sizeof (struct elf_nds32_ifc_symbol_entry));
-+ ptr = ptr->next;
-+ }
-+
-+ ptr->h = h;
-+ ptr->irel_head = bfd_malloc (sizeof (struct elf_nds32_ifc_irel_list));
-+ ptr->irel_head->irel = irel;
-+ ptr->insn = insn;
-+ ptr->irel_head->keep = 1;
-+
-+ if (h == NULL)
-+ {
-+ /* Local symbols. */
-+ ptr->sec = sec;
-+ ptr->irel_head->sec = NULL;
-+ }
-+ else
-+ {
-+ /* Global symbol. */
-+ ptr->sec = NULL;
-+ ptr->irel_head->sec = sec;
-+ }
-+
-+ ptr->irel_head->next = NULL;
-+ ptr->times = 0;
-+ ptr->enable = 0;
-+ ptr->ex9_enable = 0;
-+ ptr->next = NULL;
-+}
-+
-+/* Check if ignoring ifc. */
-+
-+static bfd_boolean
-+nds32_elf_ifc_check_region (Elf_Internal_Rela **irel,
-+ Elf_Internal_Rela *irelend,
-+ struct bfd_link_info *info)
-+{
-+ struct elf_nds32_link_hash_table *table;
-+ int nest = 0;
-+ bfd_boolean ifc_loop_aware;
-+ bfd_boolean security = FALSE;
-+
-+ table = nds32_elf_hash_table (info);
-+ ifc_loop_aware = table->ifc_loop_aware;
-+
-+ if ((ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN
-+ && ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_IFC_FLAG
-+ || (ifc_loop_aware == 1
-+ && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
-+ || (*irel)->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
-+ || (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_SECURITY_16))
-+ {
-+ /* Check the region if loop, no_ifc, or security. If it is true,
-+ ignore the region till region end. */
-+ if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_SECURITY_16)
-+ security = TRUE;
-+ else
-+ nest++;
-+
-+ (*irel)++;
-+ while ((*irel) != NULL && (*irel) < irelend)
-+ {
-+ if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN
-+ && ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_IFC_FLAG
-+ || (ifc_loop_aware == 1
-+ && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
-+ || (*irel)->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
-+ nest++;
-+
-+ else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_SECURITY_16
-+ && (*irel)->r_addend != NDS32_SECURITY_END)
-+ security = TRUE;
-+
-+ if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END
-+ && ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_IFC_FLAG
-+ || (ifc_loop_aware == 1
-+ && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
-+ || (*irel)->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
-+ {
-+ if (nest > 0)
-+ nest--;
-+ }
-+ else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_SECURITY_16
-+ && (*irel)->r_addend == NDS32_SECURITY_END)
-+ security = FALSE;
-+
-+ if (nest <= 0 && !security)
-+ break;
-+
-+ (*irel)++;
-+ }
-+ return TRUE;
-+ }
-+
-+ return FALSE;
-+}
-+
-+/* Gather all jal and j instructions. */
-+
-+static bfd_boolean
-+nds32_elf_ifc_calc (struct bfd_link_info *info,
-+ bfd *abfd, asection *sec)
-+{
-+ Elf_Internal_Rela *internal_relocs;
-+ Elf_Internal_Rela *irelend;
-+ Elf_Internal_Rela *irel;
-+ Elf_Internal_Shdr *symtab_hdr;
-+ bfd_byte *contents = NULL;
-+ uint32_t insn, insn_with_reg;
-+ unsigned long r_symndx;
-+ struct elf_link_hash_entry *h;
-+ struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
-+
-+ internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
-+ TRUE /* keep_memory */);
-+ irelend = internal_relocs + sec->reloc_count;
-+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
-+
-+ /* Check if the object enable ifc. */
-+ irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
-+ R_NDS32_RELAX_ENTRY);
-+
-+ if (irel == NULL
-+ || irel >= irelend
-+ || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
-+ || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
-+ && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
-+ return TRUE;
-+
-+ if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
-+ return FALSE;
-+
-+ while (irel != NULL && irel < irelend)
-+ {
-+ /* Traverse all relocation and gather all of them to build the list. */
-+
-+ if (nds32_elf_ifc_check_region (&irel, irelend, info))
-+ if (irel == NULL || irel >= irelend)
-+ return TRUE;
-+
-+
-+ if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
-+ {
-+ insn = bfd_getb32 (contents + irel->r_offset);
-+ nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
-+ r_symndx = ELF32_R_SYM (irel->r_info);
-+ if (r_symndx < symtab_hdr->sh_info)
-+ {
-+ /* Local symbol. */
-+ nds32_elf_ifc_insert_symbol (sec, NULL, irel, insn_with_reg);
-+ }
-+ else
-+ {
-+ /* External symbol. */
-+ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
-+ nds32_elf_ifc_insert_symbol (sec, h, irel, insn_with_reg);
-+ }
-+ }
-+ irel++;
-+ }
-+ return TRUE;
-+}
-+
-+/* Determine whether j and jal should be substituted. */
-+
-+static void
-+nds32_elf_ifc_filter (struct bfd_link_info *info)
-+{
-+ struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
-+ struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
-+ struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
-+ struct elf_nds32_link_hash_table *table;
-+ int target_optimize;
-+ bfd_vma address;
-+
-+ table = nds32_elf_hash_table (info);
-+ target_optimize = table->target_optimize;
-+ while (ptr)
-+ {
-+ irel_ptr = ptr->irel_head;
-+ if (ptr->h == NULL)
-+ {
-+ /* Local symbol. */
-+ irel_keeper = irel_ptr;
-+ while (irel_ptr && irel_ptr->next)
-+ {
-+ /* Check there is jump target can be used. */
-+ if ((irel_ptr->next->irel->r_offset
-+ - irel_keeper->irel->r_offset) > 1022)
-+ irel_keeper = irel_ptr->next;
-+ else
-+ {
-+ ptr->enable = 1;
-+ irel_ptr->keep = 0;
-+ }
-+ irel_ptr = irel_ptr->next;
-+ }
-+ }
-+ else
-+ {
-+ /* Global symbol. */
-+ /* We have to get the absolute address and decide
-+ whether to keep it or not.*/
-+ while (irel_ptr)
-+ {
-+ address = (irel_ptr->irel->r_offset
-+ + irel_ptr->sec->output_section->vma
-+ + irel_ptr->sec->output_offset);
-+ irel_ptr->addr = address;
-+ irel_ptr = irel_ptr->next;
-+ }
-+
-+ irel_ptr = ptr->irel_head;
-+ while (irel_ptr)
-+ {
-+ /* Sort by address. */
-+ struct elf_nds32_ifc_irel_list *irel_dest = irel_ptr;
-+ struct elf_nds32_ifc_irel_list *irel_temp = irel_ptr;
-+ struct elf_nds32_ifc_irel_list *irel_ptr_prev = NULL;
-+ struct elf_nds32_ifc_irel_list *irel_dest_prev = NULL;
-+
-+ /* Get the smallest one. */
-+ while (irel_temp->next)
-+ {
-+ if (irel_temp->next->addr < irel_dest->addr)
-+ {
-+ irel_dest_prev = irel_temp;
-+ irel_dest = irel_temp->next;
-+ }
-+ irel_temp = irel_temp->next;
-+ }
-+
-+ if (irel_dest != irel_ptr)
-+ {
-+ if (irel_ptr_prev)
-+ irel_ptr_prev->next = irel_dest;
-+ if (irel_dest_prev)
-+ irel_dest_prev->next = irel_ptr;
-+ irel_temp = irel_ptr->next;
-+ irel_ptr->next = irel_dest->next;
-+ irel_dest->next = irel_temp;
-+ }
-+ irel_ptr_prev = irel_ptr;
-+ irel_ptr = irel_ptr->next;
-+ }
-+
-+ irel_ptr = ptr->irel_head;
-+ irel_keeper = irel_ptr;
-+ while (irel_ptr && irel_ptr->next)
-+ {
-+ if ((irel_ptr->next->addr - irel_keeper->addr) > 1022)
-+ irel_keeper = irel_ptr->next;
-+ else
-+ {
-+ ptr->enable = 1;
-+ irel_ptr->keep = 0;
-+ }
-+ irel_ptr = irel_ptr->next;
-+ }
-+ }
-+
-+ /* Ex9 enable. Reserve it for ex9. */
-+ if ((target_optimize & NDS32_RELAX_EX9_ON)
-+ && ptr->irel_head != irel_keeper)
-+ ptr->enable = 0;
-+ ptr = ptr->next;
-+ }
-+}
-+
-+/* Determine whether j and jal should be substituted after ex9 done. */
-+
-+static void
-+nds32_elf_ifc_filter_after_ex9 (void)
-+{
-+ struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
-+ struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
-+
-+ while (ptr)
-+ {
-+ if (ptr->enable == 0)
-+ {
-+ /* Check whether ifc is applied or not. */
-+ irel_ptr = ptr->irel_head;
-+ ptr->ex9_enable = 1;
-+ while (irel_ptr)
-+ {
-+ if (ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_TRAN)
-+ {
-+ /* Ex9 already. */
-+ ptr->ex9_enable = 0;
-+ break;
-+ }
-+ irel_ptr = irel_ptr->next;
-+ }
-+ }
-+ ptr = ptr->next;
-+ }
-+}
-+
-+/* Wrapper to do ifc relaxation. */
-+
-+bfd_boolean
-+nds32_elf_ifc_finish (struct bfd_link_info *info)
-+{
-+ int relax_status;
-+ struct elf_nds32_link_hash_table *table;
-+
-+ table = nds32_elf_hash_table (info);
-+ relax_status = table->relax_status;
-+
-+ if (!(relax_status & NDS32_RELAX_JUMP_IFC_DONE))
-+ nds32_elf_ifc_filter (info);
-+ else
-+ nds32_elf_ifc_filter_after_ex9 ();
-+
-+ if (!nds32_elf_ifc_replace (info))
-+ return FALSE;
-+
-+ if (table)
-+ table->relax_status |= NDS32_RELAX_JUMP_IFC_DONE;
-+ return TRUE;
-+}
-+
-+/* Traverse the result of ifc filter and replace it with ifcall9. */
-+
-+static bfd_boolean
-+nds32_elf_ifc_replace (struct bfd_link_info *info)
-+{
-+ struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
-+ struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
-+ nds32_elf_blank_t *relax_blank_list = NULL;
-+ bfd_byte *contents = NULL;
-+ Elf_Internal_Rela *internal_relocs;
-+ Elf_Internal_Rela *irel;
-+ Elf_Internal_Rela *irelend;
-+ unsigned short insn16 = INSN_IFCALL9;
-+ struct elf_nds32_link_hash_table *table;
-+ int relax_status;
-+
-+ table = nds32_elf_hash_table (info);
-+ relax_status = table->relax_status;
-+
-+ while (ptr)
-+ {
-+ /* Traverse the ifc gather list, and replace the
-+ filter entries by ifcall9. */
-+ if ((!(relax_status & NDS32_RELAX_JUMP_IFC_DONE)
-+ && ptr->enable == 1)
-+ || ((relax_status & NDS32_RELAX_JUMP_IFC_DONE)
-+ && ptr->ex9_enable == 1))
-+ {
-+ irel_ptr = ptr->irel_head;
-+ if (ptr->h == NULL)
-+ {
-+ /* Local symbol. */
-+ internal_relocs = _bfd_elf_link_read_relocs
-+ (ptr->sec->owner, ptr->sec, NULL, NULL, TRUE /* keep_memory */);
-+ irelend = internal_relocs + ptr->sec->reloc_count;
-+
-+ if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
-+ &contents, TRUE))
-+ return FALSE;
-+
-+ while (irel_ptr)
-+ {
-+ if (irel_ptr->keep == 0 && irel_ptr->next)
-+ {
-+ /* The one can be replaced. We have to check whether
-+ there is any alignment point in the region. */
-+ irel = irel_ptr->irel;
-+ while (((irel_ptr->next->keep == 0
-+ && irel < irel_ptr->next->irel)
-+ || (irel_ptr->next->keep == 1 && irel < irelend))
-+ && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
-+ && (irel->r_addend & 0x1f) == 2))
-+ irel++;
-+ if (irel >= irelend
-+ || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
-+ && (irel->r_addend & 0x1f) == 2
-+ && ((irel->r_offset - get_nds32_elf_blank_total
-+ (&relax_blank_list, irel->r_offset, 1))
-+ & 0x02) == 0))
-+ {
-+ /* Replace by ifcall9. */
-+ bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
-+ if (!insert_nds32_elf_blank_recalc_total
-+ (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
-+ return FALSE;
-+ irel_ptr->irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
-+ R_NDS32_10IFCU_PCREL_RELA);
-+ }
-+ }
-+ irel_ptr = irel_ptr->next;
-+ }
-+
-+ /* Delete the redundant code. */
-+ if (relax_blank_list)
-+ {
-+ nds32_elf_relax_delete_blanks (ptr->sec->owner, ptr->sec,
-+ relax_blank_list);
-+ relax_blank_list = NULL;
-+ }
-+ }
-+ else
-+ {
-+ /* Global symbol. */
-+ while (irel_ptr)
-+ {
-+ if (irel_ptr->keep == 0 && irel_ptr->next)
-+ {
-+ /* The one can be replaced, and we have to check
-+ whether there is any alignment point in the region. */
-+ internal_relocs = _bfd_elf_link_read_relocs
-+ (irel_ptr->sec->owner, irel_ptr->sec, NULL, NULL,
-+ TRUE /* keep_memory */);
-+ irelend = internal_relocs + irel_ptr->sec->reloc_count;
-+ if (!nds32_get_section_contents (irel_ptr->sec->owner,
-+ irel_ptr->sec, &contents,
-+ TRUE))
-+ return FALSE;
-+
-+ irel = irel_ptr->irel;
-+ while (((irel_ptr->sec == irel_ptr->next->sec
-+ && irel_ptr->next->keep == 0
-+ && irel < irel_ptr->next->irel)
-+ || ((irel_ptr->sec != irel_ptr->next->sec
-+ || irel_ptr->next->keep == 1)
-+ && irel < irelend))
-+ && !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
-+ && (irel->r_addend & 0x1f) == 2))
-+ irel++;
-+ if (irel >= irelend
-+ || !(ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
-+ && (irel->r_addend & 0x1f) == 2
-+ && ((irel->r_offset
-+ - get_nds32_elf_blank_total (&relax_blank_list,
-+ irel->r_offset, 1)) & 0x02) == 0))
-+ {
-+ /* Replace by ifcall9. */
-+ bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
-+ if (!insert_nds32_elf_blank_recalc_total
-+ (&relax_blank_list, irel_ptr->irel->r_offset + 2, 2))
-+ return FALSE;
-+
-+ /* Delete the redundant code, and clear the relocation. */
-+ nds32_elf_relax_delete_blanks (irel_ptr->sec->owner,
-+ irel_ptr->sec,
-+ relax_blank_list);
-+ irel_ptr->irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
-+ R_NDS32_10IFCU_PCREL_RELA);
-+ relax_blank_list = NULL;
-+ }
-+ }
-+
-+ irel_ptr = irel_ptr->next;
-+ }
-+ }
-+ }
-+ ptr = ptr->next;
-+ }
-+
-+ return TRUE;
-+}
-+
-+/* Relocate ifcall. */
-+
-+static bfd_boolean
-+nds32_elf_ifc_reloc (void)
-+{
-+ struct elf_nds32_ifc_symbol_entry *ptr = ifc_symbol_head;
-+ struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
-+ struct elf_nds32_ifc_irel_list *irel_keeper = NULL;
-+ bfd_vma relocation, address;
-+ unsigned short insn16;
-+ static bfd_boolean done = FALSE;
-+
-+ if (done)
-+ return TRUE;
-+
-+ done = TRUE;
-+
-+ bfd_byte *contents = NULL;
-+
-+ while (ptr)
-+ {
-+ /* Check the entry is enable ifcall. */
-+ if (ptr->enable == 1 || ptr->ex9_enable == 1)
-+ {
-+ /* Get the reserve jump. */
-+ irel_ptr = ptr->irel_head;
-+ while (irel_ptr)
-+ {
-+ if (irel_ptr->keep == 1)
-+ {
-+ irel_keeper = irel_ptr;
-+ break;
-+ }
-+ irel_ptr = irel_ptr->next;
-+ }
-+
-+ irel_ptr = ptr->irel_head;
-+ if (ptr->h == NULL)
-+ {
-+ /* Local symbol. */
-+ if (!nds32_get_section_contents (ptr->sec->owner, ptr->sec,
-+ &contents, TRUE))
-+ return FALSE;
-+
-+ while (irel_ptr)
-+ {
-+ if (irel_ptr->keep == 0
-+ && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
-+ {
-+ relocation = irel_keeper->irel->r_offset;
-+ relocation = relocation - irel_ptr->irel->r_offset;
-+ while (irel_keeper && relocation > 1022)
-+ {
-+ irel_keeper = irel_keeper->next;
-+ if (irel_keeper && irel_keeper->keep == 1)
-+ {
-+ relocation = irel_keeper->irel->r_offset;
-+ relocation = relocation - irel_ptr->irel->r_offset;
-+ }
-+ }
-+ if (relocation > 1022)
-+ {
-+ /* Double check. */
-+ irel_keeper = ptr->irel_head;
-+ while (irel_keeper)
-+ {
-+ if (irel_keeper->keep == 1)
-+ {
-+ relocation = irel_keeper->irel->r_offset;
-+ relocation = relocation - irel_ptr->irel->r_offset;
-+ }
-+ if (relocation <= 1022)
-+ break;
-+ irel_keeper = irel_keeper->next;
-+ }
-+ if (!irel_keeper)
-+ return FALSE;
-+ }
-+ irel_ptr->irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
-+ R_NDS32_NONE);
-+ insn16 = INSN_IFCALL9 | (relocation >> 1);
-+ bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
-+ }
-+ irel_ptr = irel_ptr->next;
-+ }
-+ }
-+ else
-+ {
-+ /* Global symbol. */
-+ while (irel_ptr)
-+ {
-+ if (irel_ptr->keep == 0
-+ && ELF32_R_TYPE (irel_ptr->irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
-+ {
-+ /* Get the distance between ifcall and jump. */
-+ relocation = (irel_keeper->irel->r_offset
-+ + irel_keeper->sec->output_section->vma
-+ + irel_keeper->sec->output_offset);
-+ address = (irel_ptr->irel->r_offset
-+ + irel_ptr->sec->output_section->vma
-+ + irel_ptr->sec->output_offset);
-+ relocation = relocation - address;
-+
-+ /* The distance is over ragne, find callee again. */
-+ while (irel_keeper && relocation > 1022)
-+ {
-+ irel_keeper = irel_keeper->next;
-+ if (irel_keeper && irel_keeper->keep ==1)
-+ {
-+ relocation = (irel_keeper->irel->r_offset
-+ + irel_keeper->sec->output_section->vma
-+ + irel_keeper->sec->output_offset);
-+ relocation = relocation - address;
-+ }
-+ }
-+
-+ if (relocation > 1022)
-+ {
-+ /* Double check. */
-+ irel_keeper = ptr->irel_head;
-+ while (irel_keeper)
-+ {
-+ if (irel_keeper->keep == 1)
-+ {
-+
-+ relocation = (irel_keeper->irel->r_offset
-+ + irel_keeper->sec->output_section->vma
-+ + irel_keeper->sec->output_offset);
-+ relocation = relocation - address;
-+ }
-+ if (relocation <= 1022)
-+ break;
-+ irel_keeper = irel_keeper->next;
-+ }
-+ if (!irel_keeper)
-+ return FALSE;
-+ }
-+ if (!nds32_get_section_contents
-+ (irel_ptr->sec->owner, irel_ptr->sec, &contents, TRUE))
-+ return FALSE;
-+ insn16 = INSN_IFCALL9 | (relocation >> 1);
-+ bfd_putb16 (insn16, contents + irel_ptr->irel->r_offset);
-+ irel_ptr->irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info),
-+ R_NDS32_NONE);
-+ }
-+ irel_ptr =irel_ptr->next;
-+ }
-+ }
-+ }
-+ ptr = ptr->next;
-+ }
-+
-+ return TRUE;
-+}
-+
-+/* End of IFC relaxation. */
-+
-+/* EX9 Instruction Table Relaxation. */
-+#define EX9_SECTION ".ex9.itable"
-+
-+/* Global hash list. */
-+struct elf_link_hash_entry_list
-+{
-+ struct elf_link_hash_entry *h;
-+ struct elf_link_hash_entry_list *next;
-+};
-+
-+/* Save different destination but same insn. */
-+struct elf_link_hash_entry_mul_list
-+{
-+ /* Global symbol times. */
-+ int times;
-+ /* Save relocation for each global symbol but useful?? */
-+ Elf_Internal_Rela *irel;
-+ /* For sethi, two sethi may have the same high-part but different low-parts. */
-+ Elf_Internal_Rela rel_backup;
-+ struct elf_link_hash_entry_list *h_list;
-+ struct elf_link_hash_entry_mul_list *next;
-+};
-+
-+/* Instruction hash table. */
-+struct elf_nds32_code_hash_entry
-+{
-+ struct bfd_hash_entry root;
-+ int times;
-+ /* For insn that can use relocation or constant ex: sethi. */
-+ int const_insn;
-+ asection *sec;
-+ struct elf_link_hash_entry_mul_list *m_list;
-+ /* Using r_addend. */
-+ Elf_Internal_Rela *irel;
-+ /* Using r_info. */
-+ Elf_Internal_Rela rel_backup;
-+};
-+
-+/* Instruction count list. */
-+struct elf_nds32_insn_times_entry
-+{
-+ const char *string;
-+ int times;
-+ int order;
-+ asection *sec;
-+ struct elf_link_hash_entry_mul_list *m_list;
-+ Elf_Internal_Rela *irel;
-+ Elf_Internal_Rela rel_backup;
-+ struct elf_nds32_insn_times_entry *next;
-+};
-+
-+/* J and JAL symbol list. */
-+struct elf_nds32_symbol_entry
-+{
-+ char *string;
-+ unsigned long insn;
-+ struct elf_nds32_symbol_entry *next;
-+};
-+
-+/* Relocation list. */
-+struct elf_nds32_irel_entry
-+{
-+ Elf_Internal_Rela *irel;
-+ struct elf_nds32_irel_entry *next;
-+};
-+
-+/* ex9.it insn need to be fixed. */
-+struct elf_nds32_ex9_refix
-+{
-+ Elf_Internal_Rela *irel;
-+ asection *sec;
-+ struct elf_link_hash_entry *h;
-+ int order;
-+ struct elf_nds32_ex9_refix *next;
-+};
-+
-+static struct bfd_hash_table ex9_code_table;
-+static struct elf_nds32_insn_times_entry *ex9_insn_head = NULL;
-+static struct elf_nds32_ex9_refix *ex9_refix_head = NULL;
-+
-+/* EX9 hash function. */
-+
-+static struct bfd_hash_entry *
-+nds32_elf_code_hash_newfunc (struct bfd_hash_entry *entry,
-+ struct bfd_hash_table *table,
-+ const char *string)
-+{
-+ struct elf_nds32_code_hash_entry *ret;
-+
-+ /* Allocate the structure if it has not already been allocated by a
-+ subclass. */
-+ if (entry == NULL)
-+ {
-+ entry = (struct bfd_hash_entry *)
-+ bfd_hash_allocate (table, sizeof (*ret));
-+ if (entry == NULL)
-+ return entry;
-+ }
-+
-+ /* Call the allocation method of the superclass. */
-+ entry = bfd_hash_newfunc (entry, table, string);
-+ if (entry == NULL)
-+ return entry;
-+
-+ ret = (struct elf_nds32_code_hash_entry*) entry;
-+ ret->times = 0;
-+ ret->const_insn = 0;
-+ ret->m_list = NULL;
-+ ret->sec = NULL;
-+ ret->irel = NULL;
-+ return &ret->root;
-+}
-+
-+/* Insert ex9 entry
-+ this insert must be stable sorted by times. */
-+
-+static void
-+nds32_elf_ex9_insert_entry (struct elf_nds32_insn_times_entry *ptr)
-+{
-+ struct elf_nds32_insn_times_entry *temp;
-+ struct elf_nds32_insn_times_entry *temp2;
-+
-+ if (ex9_insn_head == NULL)
-+ {
-+ ex9_insn_head = ptr;
-+ ptr->next = NULL;
-+ }
-+ else
-+ {
-+ temp = ex9_insn_head;
-+ temp2 = ex9_insn_head;
-+ while (temp->next &&
-+ (temp->next->times >= ptr->times
-+ || temp->times == -1))
-+ {
-+ if (temp->times == -1)
-+ temp2 = temp;
-+ temp = temp->next;
-+ }
-+ if (ptr->times > temp->times && temp->times != -1)
-+ {
-+ ptr->next = temp;
-+ if (temp2->times == -1)
-+ temp2->next = ptr;
-+ else
-+ ex9_insn_head = ptr;
-+ }
-+ else if (temp->next == NULL)
-+ {
-+ temp->next = ptr;
-+ ptr->next = NULL;
-+ }
-+ else
-+ {
-+ ptr->next = temp->next;
-+ temp->next = ptr;
-+ }
-+ }
-+}
-+
-+/* Examine each insn times in hash table.
-+ Handle multi-link hash entry.
-+
-+ TODO: This function doesn't assign so much info since it is fake. */
-+
-+static int
-+nds32_elf_examine_insn_times (struct elf_nds32_code_hash_entry *h)
-+{
-+ struct elf_nds32_insn_times_entry *ptr;
-+ int times;
-+
-+ if (h->m_list == NULL)
-+ {
-+ /* Local symbol insn or insn without relocation. */
-+ if (h->times < 3)
-+ return TRUE;
-+
-+ ptr = (struct elf_nds32_insn_times_entry *)
-+ bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
-+ ptr->times = h->times;
-+ ptr->string = h->root.string;
-+ ptr->m_list = NULL;
-+ ptr->sec = h->sec;
-+ ptr->irel = h->irel;
-+ ptr->rel_backup = h->rel_backup;
-+ nds32_elf_ex9_insert_entry (ptr);
-+ }
-+ else
-+ {
-+ /* Global symbol insn. */
-+ /* Only sethi insn has multiple m_list. */
-+ struct elf_link_hash_entry_mul_list *m_list = h->m_list;
-+
-+ times = 0;
-+ while (m_list)
-+ {
-+ times += m_list->times;
-+ m_list = m_list->next;
-+ }
-+ if (times >= 3)
-+ {
-+ m_list = h->m_list;
-+ ptr = (struct elf_nds32_insn_times_entry *)
-+ bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
-+ ptr->times = times; /* Use the total times. */
-+ ptr->string = h->root.string;
-+ ptr->m_list = m_list;
-+ ptr->sec = h->sec;
-+ ptr->irel = m_list->irel;
-+ ptr->rel_backup = m_list->rel_backup;
-+ nds32_elf_ex9_insert_entry (ptr);
-+ }
-+ if (h->const_insn == 1)
-+ {
-+ /* sethi with constant value. */
-+ if (h->times < 3)
-+ return TRUE;
-+
-+ ptr = (struct elf_nds32_insn_times_entry *)
-+ bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
-+ ptr->times = h->times;
-+ ptr->string = h->root.string;
-+ ptr->m_list = NULL;
-+ ptr->sec = NULL;
-+ ptr->irel = NULL;
-+ ptr->rel_backup = h->rel_backup;
-+ nds32_elf_ex9_insert_entry (ptr);
-+ }
-+ }
-+ return TRUE;
-+}
-+
-+/* Count each insn times in hash table.
-+ Handle multi-link hash entry. */
-+
-+static int
-+nds32_elf_count_insn_times (struct elf_nds32_code_hash_entry *h)
-+{
-+ int reservation, times;
-+ unsigned long relocation, min_relocation;
-+ struct elf_nds32_insn_times_entry *ptr;
-+
-+ if (h->m_list == NULL)
-+ {
-+ /* Local symbol insn or insn without relocation. */
-+ if (h->times < 3)
-+ return TRUE;
-+ ptr = (struct elf_nds32_insn_times_entry *)
-+ bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
-+ ptr->times = h->times;
-+ ptr->string = h->root.string;
-+ ptr->m_list = NULL;
-+ ptr->sec = h->sec;
-+ ptr->irel = h->irel;
-+ ptr->rel_backup = h->rel_backup;
-+ nds32_elf_ex9_insert_entry (ptr);
-+ }
-+ else
-+ {
-+ /* Global symbol insn. */
-+ /* Only sethi insn has multiple m_list. */
-+ struct elf_link_hash_entry_mul_list *m_list = h->m_list;
-+
-+ if (ELF32_R_TYPE (m_list->rel_backup.r_info) == R_NDS32_HI20_RELA
-+ && m_list->next != NULL)
-+ {
-+ /* Sethi insn has different symbol or addend but has same hi20. */
-+ times = 0;
-+ reservation = 1;
-+ relocation = 0;
-+ min_relocation = 0xffffffff;
-+ while (m_list)
-+ {
-+ /* Get the minimum sethi address
-+ and calculate how many entry the sethi-list have to use. */
-+ if ((m_list->h_list->h->root.type == bfd_link_hash_defined
-+ || m_list->h_list->h->root.type == bfd_link_hash_defweak)
-+ && (m_list->h_list->h->root.u.def.section != NULL
-+ && m_list->h_list->h->root.u.def.section->output_section != NULL))
-+ {
-+ relocation = (m_list->h_list->h->root.u.def.value +
-+ m_list->h_list->h->root.u.def.section->output_section->vma +
-+ m_list->h_list->h->root.u.def.section->output_offset);
-+ relocation += m_list->irel->r_addend;
-+ }
-+ else
-+ relocation = 0;
-+ if (relocation < min_relocation)
-+ min_relocation = relocation;
-+ times += m_list->times;
-+ m_list = m_list->next;
-+ }
-+ if (min_relocation < ex9_relax_size)
-+ reservation = (min_relocation >> 12) + 1;
-+ else
-+ reservation = (min_relocation >> 12)
-+ - ((min_relocation - ex9_relax_size) >> 12) + 1;
-+ if ((reservation * 3) <= times)
-+ {
-+ /* Efficient enough to use ex9. */
-+ int i;
-+
-+ for (i = reservation ; i > 0; i--)
-+ {
-+ /* Allocate number of reservation ex9 entry. */
-+ ptr = (struct elf_nds32_insn_times_entry *)
-+ bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
-+ ptr->times = h->m_list->times / reservation;
-+ ptr->string = h->root.string;
-+ ptr->m_list = h->m_list;
-+ ptr->sec = h->sec;
-+ ptr->irel = h->m_list->irel;
-+ ptr->rel_backup = h->m_list->rel_backup;
-+ nds32_elf_ex9_insert_entry (ptr);
-+ }
-+ }
-+ }
-+ else
-+ {
-+ /* Normal global symbol that means no different address symbol
-+ using same ex9 entry. */
-+ if (m_list->times >= 3)
-+ {
-+ ptr = (struct elf_nds32_insn_times_entry *)
-+ bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
-+ ptr->times = m_list->times;
-+ ptr->string = h->root.string;
-+ ptr->m_list = h->m_list;
-+ ptr->sec = h->sec;
-+ ptr->irel = h->m_list->irel;
-+ ptr->rel_backup = h->m_list->rel_backup;
-+ nds32_elf_ex9_insert_entry (ptr);
-+ }
-+ }
-+
-+ if (h->const_insn == 1)
-+ {
-+ /* sethi with constant value. */
-+ if (h->times < 3)
-+ return TRUE;
-+
-+ ptr = (struct elf_nds32_insn_times_entry *)
-+ bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
-+ ptr->times = h->times;
-+ ptr->string = h->root.string;
-+ ptr->m_list = NULL;
-+ ptr->sec = NULL;
-+ ptr->irel = NULL;
-+ ptr->rel_backup = h->rel_backup;
-+ nds32_elf_ex9_insert_entry (ptr);
-+ }
-+ }
-+
-+ return TRUE;
-+}
-+
-+/* Hash table traverse function. */
-+
-+static void
-+nds32_elf_code_hash_traverse (int (*func) (struct elf_nds32_code_hash_entry*))
-+{
-+ unsigned int i;
-+
-+ ex9_code_table.frozen = 1;
-+ for (i = 0; i < ex9_code_table.size; i++)
-+ {
-+ struct bfd_hash_entry *p;
-+
-+ for (p = ex9_code_table.table[i]; p != NULL; p = p->next)
-+ if (!func ((struct elf_nds32_code_hash_entry *) p))
-+ goto out;
-+ }
-+out:
-+ ex9_code_table.frozen = 0;
-+}
-+
-+
-+/* Give order number to insn list. */
-+
-+static void
-+nds32_elf_order_insn_times (struct bfd_link_info *info)
-+{
-+ struct elf_nds32_insn_times_entry *ex9_insn;
-+ struct elf_nds32_insn_times_entry *temp = NULL;
-+ struct elf_nds32_link_hash_table *table;
-+ int ex9_limit;
-+ int number = 0;
-+
-+ if (ex9_insn_head == NULL)
-+ return;
-+
-+/* The max number of entries is 512. */
-+ ex9_insn = ex9_insn_head;
-+ table = nds32_elf_hash_table (info);
-+ ex9_limit = table->ex9_limit;
-+
-+ ex9_insn = ex9_insn_head;
-+
-+ while (ex9_insn != NULL && number < ex9_limit)
-+ {
-+ ex9_insn->order = number;
-+ number++;
-+ temp = ex9_insn;
-+ ex9_insn = ex9_insn->next;
-+ }
-+
-+ if (ex9_insn && temp)
-+ temp->next = NULL;
-+
-+ while (ex9_insn != NULL)
-+ {
-+ /* Free useless entry. */
-+ temp = ex9_insn;
-+ ex9_insn = ex9_insn->next;
-+ free (temp);
-+ }
-+}
-+
-+/* Get section .ex9.itable. */
-+
-+static asection*
-+nds32_elf_ex9_get_section (bfd *input_bfds)
-+{
-+ asection *sec = NULL;
-+ bfd *abfd;
-+
-+ if (ex9_section != NULL)
-+ return ex9_section;
-+
-+ for (abfd = input_bfds; abfd != NULL; abfd = abfd->link_next)
-+ {
-+ sec = bfd_get_section_by_name (abfd, EX9_SECTION);
-+ if (sec != NULL)
-+ break;
-+ }
-+
-+ ex9_section = sec;
-+ return sec;
-+}
-+
-+/* Build .ex9.itable section. */
-+
-+static void
-+nds32_elf_ex9_build_itable (struct bfd_link_info *link_info)
-+{
-+ asection *table_sec;
-+ struct elf_nds32_insn_times_entry *ptr;
-+ int number = 0;
-+ bfd_byte *contents = NULL;
-+ struct elf_nds32_link_hash_table *table;
-+
-+ table = nds32_elf_hash_table (link_info);
-+
-+ /* Find the section .ex9.itable, and put all entries into it. */
-+ table_sec = nds32_elf_ex9_get_section (link_info->input_bfds);
-+
-+ if (table_sec != NULL)
-+ {
-+ if (!nds32_get_section_contents (table_sec->owner, table_sec,
-+ &contents, TRUE))
-+ return;
-+
-+ for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
-+ number++;
-+
-+ table_sec->size = number * 4;
-+
-+ if (number == 0)
-+ return;
-+
-+ /* Check $itb register if set. */
-+ if (!table->ex9_import_file
-+ && !bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
-+ FALSE, FALSE, TRUE))
-+ {
-+ (*_bfd_error_handler)
-+ (_("\nError: Instruction Table(IT) is used, but Instruction "
-+ "Table Base($ITB) isn't set.\nPlease add the following "
-+ "instructions in _start of crt0.S:\n"
-+ "\"la $r0,_ITB_BASE_;mtusr $r0,$ITB\""));
-+ exit (1);
-+ }
-+
-+ elf_elfheader (link_info->output_bfd)->e_flags |= E_NDS32_HAS_EX9_INST;
-+ number = 0;
-+ for (ptr = ex9_insn_head; ptr !=NULL ; ptr = ptr->next)
-+ {
-+ long val;
-+
-+ val = strtol (ptr->string, NULL, 16);
-+ bfd_putb32 ((bfd_vma) val, (char *) contents + (number * 4));
-+ number++;
-+ }
-+ }
-+}
-+
-+/* Get insn with regs according to relocation type. */
-+
-+static void
-+nds32_elf_get_insn_with_reg (Elf_Internal_Rela *irel,
-+ uint32_t insn, uint32_t *insn_with_reg)
-+{
-+ reloc_howto_type *howto = NULL;
-+
-+ if (irel == NULL
-+ || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
-+ && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
-+ >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
-+ {
-+ *insn_with_reg = insn;
-+ return;
-+ }
-+
-+ howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
-+ *insn_with_reg = insn & (0xffffffff ^ howto->dst_mask);
-+}
-+
-+/* Mask number of address bits according to relocation. */
-+
-+static unsigned long
-+nds32_elf_irel_mask (Elf_Internal_Rela *irel)
-+{
-+ reloc_howto_type *howto = NULL;
-+
-+ if (irel == NULL
-+ || (ELF32_R_TYPE (irel->r_info) >= (int) ARRAY_SIZE (nds32_elf_howto_table)
-+ && (ELF32_R_TYPE (irel->r_info) - R_NDS32_RELAX_ENTRY)
-+ >= (int) ARRAY_SIZE (nds32_elf_relax_howto_table)))
-+ return 0;
-+
-+ howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
-+ return howto->dst_mask;
-+}
-+
-+static void
-+nds32_elf_insert_irel_entry (struct elf_nds32_irel_entry **irel_list,
-+ struct elf_nds32_irel_entry *irel_ptr)
-+{
-+ if (*irel_list == NULL)
-+ {
-+ *irel_list = irel_ptr;
-+ irel_ptr->next = NULL;
-+ }
-+ else
-+ {
-+ irel_ptr->next = *irel_list;
-+ *irel_list = irel_ptr;
-+ }
-+}
-+
-+static void
-+nds32_elf_ex9_insert_fix (asection * sec, Elf_Internal_Rela * irel,
-+ struct elf_link_hash_entry *h, int order)
-+{
-+ struct elf_nds32_ex9_refix *ptr;
-+
-+ ptr = bfd_malloc (sizeof (struct elf_nds32_ex9_refix));
-+ ptr->sec = sec;
-+ ptr->irel = irel;
-+ ptr->h = h;
-+ ptr->order = order;
-+ ptr->next = NULL;
-+
-+ if (ex9_refix_head == NULL)
-+ ex9_refix_head = ptr;
-+ else
-+ {
-+ struct elf_nds32_ex9_refix *temp = ex9_refix_head;
-+
-+ while (temp->next != NULL)
-+ temp = temp->next;
-+ temp->next = ptr;
-+ }
-+}
-+
-+enum
-+{
-+ DATA_EXIST = 1,
-+ CLEAN_PRE = 1 << 1,
-+ PUSH_PRE = 1 << 2
-+};
-+
-+/* Check relocation type if supporting for ex9. */
-+
-+static int
-+nds32_elf_ex9_relocation_check (struct bfd_link_info *info,
-+ Elf_Internal_Rela **irel,
-+ Elf_Internal_Rela *irelend,
-+ nds32_elf_blank_t *relax_blank_list,
-+ asection *sec, bfd_vma *off,
-+ bfd_byte *contents)
-+{
-+ /* Suppress ex9 if `.no_relax ex9' or inner loop. */
-+ bfd_boolean nested_ex9, nested_loop;
-+ bfd_boolean ex9_loop_aware;
-+ /* We use the highest 1 byte of result to record
-+ how many bytes location counter has to move. */
-+ int result = 0;
-+ Elf_Internal_Rela *irel_save = NULL;
-+ struct elf_nds32_link_hash_table *table;
-+
-+ table = nds32_elf_hash_table (info);
-+ ex9_loop_aware = table->ex9_loop_aware;
-+
-+ while ((*irel) != NULL && (*irel) < irelend && *off == (*irel)->r_offset)
-+ {
-+ switch (ELF32_R_TYPE ((*irel)->r_info))
-+ {
-+ case R_NDS32_RELAX_REGION_BEGIN:
-+ /* Ignore code block. */
-+ nested_ex9 = FALSE;
-+ nested_loop = FALSE;
-+ if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG)
-+ || (ex9_loop_aware
-+ && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG)))
-+ {
-+ /* Check the region if loop or not. If it is true and
-+ ex9-loop-aware is true, ignore the region till region end. */
-+ /* To save the status for in .no_relax ex9 region and
-+ loop region to conform the block can do ex9 relaxation. */
-+ nested_ex9 = ((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG);
-+ nested_loop = (ex9_loop_aware
-+ && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG));
-+ while ((*irel) && (*irel) < irelend && (nested_ex9 || nested_loop))
-+ {
-+ (*irel)++;
-+ if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_BEGIN)
-+ {
-+ /* There may be nested region. */
-+ if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
-+ nested_ex9 = TRUE;
-+ else if (ex9_loop_aware
-+ && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
-+ nested_loop = TRUE;
-+ }
-+ else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_RELAX_REGION_END)
-+ {
-+ /* The end of region. */
-+ if (((*irel)->r_addend & R_NDS32_RELAX_REGION_NO_EX9_FLAG) != 0)
-+ nested_ex9 = FALSE;
-+ else if (ex9_loop_aware
-+ && ((*irel)->r_addend & R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG))
-+ nested_loop = FALSE;
-+ }
-+ else if (ELF32_R_TYPE ((*irel)->r_info) == R_NDS32_LABEL
-+ && ((*irel)->r_addend & 0x1f) == 2)
-+ {
-+ /* Alignment exist in the region. */
-+ result |= CLEAN_PRE;
-+ if (((*irel)->r_offset -
-+ get_nds32_elf_blank_total (&relax_blank_list,
-+ (*irel)->r_offset, 0)) & 0x02)
-+ result |= PUSH_PRE;
-+ }
-+ }
-+ if ((*irel) >= irelend)
-+ *off = sec->size;
-+ else
-+ *off = (*irel)->r_offset;
-+
-+ /* The final instruction in the region, regard this one as data to ignore it. */
-+ result |= DATA_EXIST;
-+ return result;
-+ }
-+ break;
-+
-+ case R_NDS32_LABEL:
-+ if (((*irel)->r_addend & 0x1f) == 2)
-+ {
-+ /* Check this point is align and decide to do ex9 or not. */
-+ result |= CLEAN_PRE;
-+ if (((*irel)->r_offset -
-+ get_nds32_elf_blank_total (&relax_blank_list,
-+ (*irel)->r_offset, 0)) & 0x02)
-+ result |= PUSH_PRE;
-+ }
-+ break;
-+ case R_NDS32_32_RELA:
-+ /* Data. */
-+ result |= (4 << 24);
-+ result |= DATA_EXIST;
-+ break;
-+ case R_NDS32_16_RELA:
-+ /* Data. */
-+ result |= (2 << 24);
-+ result |= DATA_EXIST;
-+ break;
-+ case R_NDS32_DATA:
-+ /* Data. */
-+ /* The least code alignment is 2. If the data is only one byte,
-+ we have to shift one more byte. */
-+ if ((*irel)->r_addend == 1)
-+ result |= ((*irel)->r_addend << 25) ;
-+ else
-+ result |= ((*irel)->r_addend << 24) ;
-+
-+ result |= DATA_EXIST;
-+ break;
-+
-+ case R_NDS32_25_PCREL_RELA:
-+ case R_NDS32_SDA16S3_RELA:
-+ case R_NDS32_SDA15S3_RELA:
-+ case R_NDS32_SDA15S3:
-+ case R_NDS32_SDA17S2_RELA:
-+ case R_NDS32_SDA15S2_RELA:
-+ case R_NDS32_SDA12S2_SP_RELA:
-+ case R_NDS32_SDA12S2_DP_RELA:
-+ case R_NDS32_SDA15S2:
-+ case R_NDS32_SDA18S1_RELA:
-+ case R_NDS32_SDA15S1_RELA:
-+ case R_NDS32_SDA15S1:
-+ case R_NDS32_SDA19S0_RELA:
-+ case R_NDS32_SDA15S0_RELA:
-+ case R_NDS32_SDA15S0:
-+ case R_NDS32_HI20_RELA:
-+ case R_NDS32_LO12S0_ORI_RELA:
-+ case R_NDS32_LO12S0_RELA:
-+ case R_NDS32_LO12S1_RELA:
-+ case R_NDS32_LO12S2_RELA:
-+ case R_NDS32_20_RELA:
-+ /* These relocation is supported ex9 relaxation currently. */
-+ /* We have to save the relocation for using later, since we have
-+ to check there is any alignment in the same address. */
-+ irel_save = *irel;
-+ break;
-+ default:
-+ /* Not support relocations. */
-+ if (ELF32_R_TYPE ((*irel)->r_info) < ARRAY_SIZE (nds32_elf_howto_table)
-+ && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_NONE
-+ && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_INSN16
-+ && ELF32_R_TYPE ((*irel)->r_info) != R_NDS32_LOADSTORE)
-+ {
-+ /* Note: To optimize aggressively, it maybe can ignore
-+ R_NDS32_INSN16 here. But we have to consider
-+ if there is any side-effect. */
-+ if (!(result & DATA_EXIST))
-+ {
-+ /* We have to confirm there is no data relocation in the
-+ same address. In general case, this won't happen. */
-+ /* We have to do ex9 conservative, for those relocation not
-+ considerd we ignore instruction. */
-+ result |= DATA_EXIST;
-+ if (*(contents + *off) & 0x80)
-+ result |= (2 << 24);
-+ else
-+ result |= (4 << 24);
-+ break;
-+ }
-+ }
-+ }
-+ if ((*irel) < irelend
-+ && ((*irel) + 1) < irelend
-+ && (*irel)->r_offset == ((*irel) + 1)->r_offset)
-+ /* There are relocations pointing to the same address, we have to
-+ check all of them. */
-+ (*irel)++;
-+ else
-+ {
-+ if (irel_save)
-+ *irel = irel_save;
-+ return result;
-+ }
-+ }
-+ return result;
-+}
-+
-+/* Replace with ex9 instruction. */
-+static bfd_boolean
-+nds32_elf_ex9_push_insn (uint16_t insn16, bfd_byte *contents, bfd_vma pre_off,
-+ nds32_elf_blank_t **relax_blank_list,
-+ struct elf_nds32_irel_entry *pre_irel_ptr,
-+ struct elf_nds32_irel_entry **irel_list)
-+{
-+ if (insn16 != 0)
-+ {
-+ /* Implement the ex9 relaxation. */
-+ bfd_putb16 (insn16, contents + pre_off);
-+ if (!insert_nds32_elf_blank_recalc_total (relax_blank_list,
-+ pre_off + 2, 2))
-+ return FALSE;
-+ if (pre_irel_ptr != NULL)
-+ nds32_elf_insert_irel_entry (irel_list, pre_irel_ptr);
-+ }
-+ return TRUE;
-+}
-+
-+/* Replace input file instruction which is in ex9 itable. */
-+
-+static bfd_boolean
-+nds32_elf_ex9_replace_instruction (struct bfd_link_info *info, bfd *abfd, asection *sec)
-+{
-+ struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
-+ bfd_byte *contents = NULL;
-+ bfd_vma off;
-+ uint16_t insn16, insn_ex9;
-+ /* `pre_*' are used to track previous instruction that can use ex9.it. */
-+ bfd_vma pre_off = -1;
-+ uint16_t pre_insn16 = 0;
-+ struct elf_nds32_irel_entry *pre_irel_ptr = NULL;
-+ Elf_Internal_Rela *internal_relocs;
-+ Elf_Internal_Rela *irel;
-+ Elf_Internal_Rela *irelend;
-+ Elf_Internal_Shdr *symtab_hdr;
-+ Elf_Internal_Sym *isym = NULL;
-+ nds32_elf_blank_t *relax_blank_list = NULL;
-+ uint32_t insn = 0;
-+ uint32_t insn_with_reg = 0;
-+ uint32_t it_insn;
-+ uint32_t it_insn_with_reg;
-+ unsigned long r_symndx;
-+ asection *isec;
-+ struct elf_nds32_irel_entry *irel_list = NULL;
-+ struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
-+ int data_flag, do_replace, save_irel;
-+ struct elf_link_hash_entry_list *h_list;
-+
-+
-+ /* Load section instructions, relocations, and symbol table. */
-+ if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
-+ || !nds32_get_local_syms (abfd, sec, &isym))
-+ return FALSE;
-+ internal_relocs =
-+ _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, TRUE /* keep_memory */);
-+ irelend = internal_relocs + sec->reloc_count;
-+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
-+
-+ off = 0;
-+
-+ /* Check if the object enable ex9. */
-+ irel = find_relocs_at_address (internal_relocs, internal_relocs,
-+ irelend, R_NDS32_RELAX_ENTRY);
-+
-+ /* Check this section trigger ex9 relaxation. */
-+ if (irel == NULL
-+ || irel >= irelend
-+ || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
-+ || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
-+ && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
-+ return TRUE;
-+
-+ irel = internal_relocs;
-+
-+ /* Check alignment and fetch proper relocation. */
-+ while (off < sec->size)
-+ {
-+ struct elf_link_hash_entry *h = NULL;
-+ struct elf_nds32_irel_entry *irel_ptr = NULL;
-+
-+ /* Syn the instruction and the relocation. */
-+ while (irel != NULL && irel < irelend && irel->r_offset < off)
-+ irel++;
-+
-+ data_flag = nds32_elf_ex9_relocation_check (info, &irel, irelend,
-+ relax_blank_list, sec,
-+ &off, contents);
-+ if (data_flag & PUSH_PRE)
-+ if (!nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
-+ &relax_blank_list, pre_irel_ptr,
-+ &irel_list))
-+ return FALSE;
-+
-+ if (data_flag & CLEAN_PRE)
-+ {
-+ pre_off = 0;
-+ pre_insn16 = 0;
-+ pre_irel_ptr = NULL;
-+ }
-+ if (data_flag & DATA_EXIST)
-+ {
-+ /* We save the move offset in the highest byte. */
-+ off += (data_flag >> 24);
-+ continue;
-+ }
-+
-+ if (*(contents + off) & 0x80)
-+ {
-+ /* 2-byte instruction. */
-+ off += 2;
-+ continue;
-+ }
-+
-+ /* Load the instruction and its opcode with register for comparing. */
-+ ex9_insn = ex9_insn_head;
-+ insn = bfd_getb32 (contents + off);
-+ insn_with_reg = 0;
-+ /* Insn with relocation. Mask instruction. */
-+ if (irel != NULL && irel < irelend && irel->r_offset == off)
-+ nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
-+
-+ while (ex9_insn)
-+ {
-+ it_insn = strtol (ex9_insn->string, NULL, 16);
-+ it_insn_with_reg = 0;
-+ do_replace = 0;
-+ save_irel = 0;
-+
-+ if (irel != NULL && irel < irelend && irel->r_offset == off
-+ && ex9_insn->irel != NULL)
-+ nds32_elf_get_insn_with_reg (ex9_insn->irel, it_insn,
-+ &it_insn_with_reg);
-+
-+ /* Instruction and ex9 both have relocation. */
-+ if (insn_with_reg != 0 && it_insn_with_reg != 0
-+ && (ELF32_R_TYPE (irel->r_info) ==
-+ ELF32_R_TYPE (ex9_insn->irel->r_info))
-+ && (insn_with_reg == it_insn_with_reg))
-+ {
-+ /* Insn relocation and format is the same as table entry. */
-+
-+ if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
-+ || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
-+ || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
-+ || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
-+ && ELF32_R_TYPE (irel->r_info) <=
-+ R_NDS32_SDA12S2_SP_RELA)
-+ || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA)
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
-+ {
-+ r_symndx = ELF32_R_SYM (irel->r_info);
-+ if (r_symndx < symtab_hdr->sh_info)
-+ {
-+ /* Local symbol. */
-+ int shndx = isym[r_symndx].st_shndx;
-+
-+ isec = elf_elfsections (abfd)[shndx]->bfd_section;
-+ if (ex9_insn->sec == isec
-+ && ex9_insn->irel->r_addend == irel->r_addend
-+ && ex9_insn->irel->r_info == irel->r_info)
-+ {
-+ do_replace = 1;
-+ save_irel = 1;
-+ }
-+ }
-+ else if (ex9_insn->m_list)
-+ {
-+ /* External symbol. */
-+ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
-+ h_list = ex9_insn->m_list->h_list;
-+ while (h_list)
-+ {
-+ if (ex9_insn->m_list->irel->r_addend == irel->r_addend
-+ && h == h_list->h)
-+ {
-+ do_replace = 1;
-+ save_irel = 1;
-+ break;
-+ }
-+ h_list = h_list->next;
-+ }
-+ }
-+ }
-+ else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA)
-+ {
-+ r_symndx = ELF32_R_SYM (irel->r_info);
-+ if (r_symndx < symtab_hdr->sh_info)
-+ {
-+ /* Local symbols. Compare its base symbol
-+ and offset. */
-+ int shndx = isym[r_symndx].st_shndx;
-+
-+ isec = elf_elfsections (abfd)[shndx]->bfd_section;
-+ if (ex9_insn->sec == isec
-+ && ex9_insn->irel->r_addend == irel->r_addend
-+ && ex9_insn->irel->r_info == irel->r_info)
-+ {
-+ do_replace = 1;
-+ save_irel = 1;
-+ }
-+ }
-+ else
-+ {
-+ /* External symbol. */
-+ struct elf_link_hash_entry_mul_list *m_list;
-+
-+ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
-+ m_list = ex9_insn->m_list;
-+
-+ while (m_list && !do_replace)
-+ {
-+ h_list = m_list->h_list;
-+ while (h_list)
-+ {
-+ if (h == h_list->h
-+ && m_list->irel->r_addend == irel->r_addend)
-+ {
-+ do_replace = 1;
-+ save_irel = 1;
-+ /* sethi multiple entry must be fixed. */
-+ if (ex9_insn->next && ex9_insn->m_list
-+ && ex9_insn->m_list == ex9_insn->next->m_list)
-+ nds32_elf_ex9_insert_fix (sec, irel, h,
-+ ex9_insn->order);
-+ break;
-+ }
-+ h_list = h_list->next;
-+ }
-+ m_list = m_list->next;
-+ }
-+ }
-+ }
-+ }
-+ /* Import table: Check the symbol hash table and the
-+ jump target. Only R_NDS32_25_PCREL_RELA now. */
-+ else if (insn_with_reg != 0 && ex9_insn->times == -1
-+ && ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA)
-+ {
-+ nds32_elf_get_insn_with_reg (irel, it_insn, &it_insn_with_reg);
-+ if (insn_with_reg == it_insn_with_reg)
-+ {
-+ char code[10];
-+ bfd_vma relocation;
-+
-+ r_symndx = ELF32_R_SYM (irel->r_info);
-+ if (r_symndx >= symtab_hdr->sh_info)
-+ {
-+ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
-+ if ((h->root.type == bfd_link_hash_defined
-+ || h->root.type == bfd_link_hash_defweak)
-+ && h->root.u.def.section != NULL
-+ && h->root.u.def.section->output_section != NULL
-+ && h->root.u.def.section->gc_mark == 1
-+ && bfd_is_abs_section (h->root.u.def.section)
-+ && h->root.u.def.value > sec->size)
-+ {
-+ relocation = h->root.u.def.value +
-+ h->root.u.def.section->output_section->vma +
-+ h->root.u.def.section->output_offset;
-+ relocation += irel->r_addend;
-+ insn = insn_with_reg
-+ | ((relocation >> 1) & 0xffffff);
-+ snprintf (code, sizeof (code), "%08x", insn);
-+ if (strcmp (code, ex9_insn->string) == 0)
-+ {
-+ do_replace = 1;
-+ save_irel = 1;
-+ }
-+ }
-+ }
-+ }
-+ }
-+ else if ((irel == NULL || irel >= irelend || irel->r_offset != off)
-+ && insn == it_insn && ex9_insn->irel == NULL)
-+ {
-+ /* Instruction without relocation, we only
-+ have to compare their byte code. */
-+ do_replace = 1;
-+ }
-+
-+ /* Insntruction match so replacing the code here. */
-+ if (do_replace == 1)
-+ {
-+ /* There are two formats of ex9 instruction. */
-+ if (ex9_insn->order < 32)
-+ insn_ex9 = INSN_EX9_IT_2;
-+ else
-+ insn_ex9 = INSN_EX9_IT_1;
-+ insn16 = insn_ex9 | ex9_insn->order;
-+
-+ /* Insert ex9 instruction. */
-+ nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
-+ &relax_blank_list, pre_irel_ptr,
-+ &irel_list);
-+ pre_off = off;
-+ pre_insn16 = insn16;
-+
-+ if (save_irel)
-+ {
-+ /* For instuction with relocation do relax. */
-+ irel_ptr = (struct elf_nds32_irel_entry *)
-+ bfd_malloc (sizeof (struct elf_nds32_irel_entry));
-+ irel_ptr->irel = irel;
-+ irel_ptr->next = NULL;
-+ pre_irel_ptr = irel_ptr;
-+ }
-+ else
-+ pre_irel_ptr = NULL;
-+ break;
-+ }
-+ ex9_insn = ex9_insn->next;
-+ }
-+ off += 4;
-+ }
-+
-+ /* Insert ex9 instruction. */
-+ nds32_elf_ex9_push_insn (pre_insn16, contents, pre_off,
-+ &relax_blank_list, pre_irel_ptr,
-+ &irel_list);
-+
-+ /* Delete the redundant code. */
-+ if (relax_blank_list)
-+ {
-+ nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
-+ relax_blank_list = NULL;
-+ }
-+
-+ /* Clear the relocation that is replaced by ex9. */
-+ while (irel_list)
-+ {
-+ struct elf_nds32_irel_entry *irel_ptr;
-+
-+ irel_ptr = irel_list;
-+ irel_list = irel_ptr->next;
-+ irel_ptr->irel->r_info =
-+ ELF32_R_INFO (ELF32_R_SYM (irel_ptr->irel->r_info), R_NDS32_TRAN);
-+ free (irel_ptr);
-+ }
-+ return TRUE;
-+}
-+
-+/* Initialize ex9 hash table. */
-+
-+static int
-+nds32_elf_ex9_init (void)
-+{
-+ if (!bfd_hash_table_init_n (&ex9_code_table, nds32_elf_code_hash_newfunc,
-+ sizeof (struct elf_nds32_code_hash_entry),
-+ 1023))
-+ {
-+ (*_bfd_error_handler) (_("Linker: cannot init ex9 hash table error \n"));
-+ return FALSE;
-+ }
-+ return TRUE;
-+}
-+
-+/* Predict how many bytes will be relaxed with ex9 and ifc. */
-+
-+static void
-+nds32_elf_ex9_total_relax (struct bfd_link_info *info)
-+{
-+ struct elf_nds32_insn_times_entry *ex9_insn;
-+ struct elf_nds32_insn_times_entry *temp;
-+ int target_optimize;
-+ struct elf_nds32_link_hash_table *table;
-+
-+ if (ex9_insn_head == NULL)
-+ return;
-+
-+ table = nds32_elf_hash_table (info);
-+ target_optimize = table->target_optimize;
-+ ex9_insn = ex9_insn_head;
-+ while (ex9_insn)
-+ {
-+ ex9_relax_size = ex9_insn->times * 2 + ex9_relax_size;
-+ temp = ex9_insn;
-+ ex9_insn = ex9_insn->next;
-+ free (temp);
-+ }
-+ ex9_insn_head = NULL;
-+
-+ if ((target_optimize & NDS32_RELAX_IFC_ON))
-+ {
-+ /* Examine the potential of ifc reduce size. */
-+ struct elf_nds32_ifc_symbol_entry *ifc_ent = ifc_symbol_head;
-+ struct elf_nds32_ifc_irel_list *irel_ptr = NULL;
-+ int size = 0;
-+
-+ while (ifc_ent)
-+ {
-+ if (ifc_ent->enable == 0)
-+ {
-+ /* Not ifc yet. */
-+ irel_ptr = ifc_ent->irel_head;
-+ while (irel_ptr)
-+ {
-+ size += 2;
-+ irel_ptr = irel_ptr->next;
-+ }
-+ }
-+ size -= 2;
-+ ifc_ent = ifc_ent->next;
-+ }
-+ ex9_relax_size += size;
-+ }
-+}
-+
-+/* Finish ex9 table. */
-+
-+void
-+nds32_elf_ex9_finish (struct bfd_link_info *link_info)
-+{
-+ nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
-+ nds32_elf_order_insn_times (link_info);
-+ nds32_elf_ex9_total_relax (link_info);
-+ /* Traverse the hash table and count its times. */
-+ nds32_elf_code_hash_traverse (nds32_elf_count_insn_times);
-+ nds32_elf_order_insn_times (link_info);
-+ nds32_elf_ex9_build_itable (link_info);
-+}
-+
-+/* Relocate the entries in ex9 table. */
-+
-+static bfd_vma
-+nds32_elf_ex9_reloc_insn (struct elf_nds32_insn_times_entry *ptr,
-+ struct bfd_link_info *link_info)
-+{
-+ Elf_Internal_Sym *isym = NULL;
-+ bfd_vma relocation = -1;
-+ struct elf_link_hash_entry *h;
-+
-+ if (ptr->m_list != NULL)
-+ {
-+ /* Global symbol. */
-+ h = ptr->m_list->h_list->h;
-+ if ((h->root.type == bfd_link_hash_defined
-+ || h->root.type == bfd_link_hash_defweak)
-+ && h->root.u.def.section != NULL
-+ && h->root.u.def.section->output_section != NULL)
-+ {
-+
-+ relocation = h->root.u.def.value +
-+ h->root.u.def.section->output_section->vma +
-+ h->root.u.def.section->output_offset;
-+ relocation += ptr->m_list->irel->r_addend;
-+ }
-+ else
-+ relocation = 0;
-+ }
-+ else if (ptr->sec !=NULL)
-+ {
-+ /* Local symbol. */
-+ Elf_Internal_Sym sym;
-+ asection *sec = NULL;
-+ asection isec;
-+ asection *isec_ptr = &isec;
-+ Elf_Internal_Rela irel_backup = *(ptr->irel);
-+ asection *sec_backup = ptr->sec;
-+ bfd *abfd = ptr->sec->owner;
-+
-+ if (!nds32_get_local_syms (abfd, sec, &isym))
-+ return FALSE;
-+ isym = isym + ELF32_R_SYM (ptr->irel->r_info);
-+
-+ sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
-+ if (sec != NULL)
-+ *isec_ptr = *sec;
-+ sym = *isym;
-+
-+ /* The purpose is same as elf_link_input_bfd. */
-+ if (isec_ptr != NULL
-+ && isec_ptr->sec_info_type == SEC_INFO_TYPE_MERGE
-+ && ELF_ST_TYPE (isym->st_info) != STT_SECTION)
-+ {
-+ sym.st_value =
-+ _bfd_merged_section_offset (ptr->sec->output_section->owner, &isec_ptr,
-+ elf_section_data (isec_ptr)->sec_info,
-+ isym->st_value);
-+ }
-+ relocation = _bfd_elf_rela_local_sym (link_info->output_bfd, &sym,
-+ &ptr->sec, ptr->irel);
-+ if (ptr->irel != NULL)
-+ relocation += ptr->irel->r_addend;
-+
-+ /* Restore origin value since there may be some insntructions that
-+ could not be replaced with ex9.it. */
-+ *(ptr->irel) = irel_backup;
-+ ptr->sec = sec_backup;
-+ }
-+
-+ return relocation;
-+}
-+
-+/* Import ex9 table and build list. */
-+
-+void
-+nds32_elf_ex9_import_table (struct bfd_link_info *info)
-+{
-+ int num = 0;
-+ bfd_byte *contents;
-+ unsigned long insn;
-+ FILE *ex9_import_file;
-+ int update_ex9_table;
-+ struct elf_nds32_link_hash_table *table;
-+
-+ table = nds32_elf_hash_table (info);
-+ ex9_import_file = table->ex9_import_file;
-+ rewind (table->ex9_import_file);
-+
-+ contents = bfd_malloc (sizeof (bfd_byte) * 4);
-+
-+ /* Read instructions from the input file and build the list. */
-+ while (!feof (ex9_import_file))
-+ {
-+ char *code;
-+ struct elf_nds32_insn_times_entry *ptr;
-+ size_t nread;
-+
-+ nread = fread (contents, sizeof (bfd_byte) * 4, 1, ex9_import_file);
-+ /* Ignore the final byte 0x0a. */
-+ if (nread < 1)
-+ break;
-+ insn = bfd_getb32 (contents);
-+ code = bfd_malloc (sizeof (char) * 9);
-+ snprintf (code, 9, "%08lx", insn);
-+ ptr = bfd_malloc (sizeof (struct elf_nds32_insn_times_entry));
-+ ptr->string = code;
-+ ptr->order = num;
-+ ptr->times = -1;
-+ ptr->sec = NULL;
-+ ptr->m_list = NULL;
-+ ptr->rel_backup.r_offset = 0;
-+ ptr->rel_backup.r_info = 0;
-+ ptr->rel_backup.r_addend = 0;
-+ ptr->irel = NULL;
-+ ptr->next = NULL;
-+ nds32_elf_ex9_insert_entry (ptr);
-+ num++;
-+ }
-+
-+ update_ex9_table = table->update_ex9_table;
-+ if (update_ex9_table == 1)
-+ {
-+ /* It has to consider of sethi need to use multiple page
-+ but it not be done yet. */
-+ nds32_elf_code_hash_traverse (nds32_elf_examine_insn_times);
-+ nds32_elf_order_insn_times (info);
-+ }
-+}
-+
-+/* Export ex9 table. */
-+
-+static void
-+nds32_elf_ex9_export (struct bfd_link_info *info,
-+ bfd_byte *contents, int size)
-+{
-+ FILE *ex9_export_file;
-+ struct elf_nds32_link_hash_table *table;
-+
-+ table = nds32_elf_hash_table (info);
-+ ex9_export_file = table->ex9_export_file;
-+ fwrite (contents, sizeof (bfd_byte), size, ex9_export_file);
-+ fclose (ex9_export_file);
-+}
-+
-+/* Adjust relocations of J and JAL in ex9.itable.
-+ Export ex9 table. */
-+
-+static void
-+nds32_elf_ex9_reloc_jmp (struct bfd_link_info *link_info)
-+{
-+ asection *table_sec = NULL;
-+ struct elf_nds32_insn_times_entry *ex9_insn = ex9_insn_head;
-+ struct elf_nds32_insn_times_entry *temp_ptr, *temp_ptr2;
-+ uint32_t insn, insn_with_reg, source_insn;
-+ bfd_byte *contents = NULL, *source_contents = NULL;
-+ int size = 0;
-+ bfd_vma gp;
-+ int shift, update_ex9_table, offset = 0;
-+ reloc_howto_type *howto = NULL;
-+ Elf_Internal_Rela rel_backup;
-+ unsigned short insn_ex9;
-+ struct elf_nds32_link_hash_table *table;
-+ FILE *ex9_export_file;
-+ static bfd_boolean done = FALSE;
-+
-+ if (done)
-+ return;
-+
-+ done = TRUE;
-+
-+ table = nds32_elf_hash_table (link_info);
-+ if (table)
-+ table->relax_status |= NDS32_RELAX_EX9_DONE;
-+
-+ update_ex9_table = table->update_ex9_table;
-+
-+ /* Generated ex9.itable exactly. */
-+ if (update_ex9_table == 0)
-+ {
-+ bfd *output_bfd;
-+ table_sec = nds32_elf_ex9_get_section (link_info->input_bfds);
-+
-+ if (table_sec == NULL)
-+ {
-+ (*_bfd_error_handler) (_("ld: error cannot find ex9 section.\n"));
-+ return;
-+ }
-+
-+ output_bfd = table_sec->output_section->owner;
-+ nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
-+ if (table_sec->size == 0)
-+ return;
-+
-+ if (!nds32_get_section_contents (table_sec->owner, table_sec,
-+ &contents, TRUE))
-+ return;
-+ }
-+ else
-+ {
-+ /* Set gp. */
-+ bfd *output_bfd;
-+
-+ output_bfd = link_info->input_bfds->sections->output_section->owner;
-+ nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
-+ contents = bfd_malloc (sizeof (bfd_byte) * 2048);
-+ }
-+
-+ /* Relocate instruction. */
-+ while (ex9_insn)
-+ {
-+ bfd_vma relocation, min_relocation = 0xffffffff;
-+
-+ insn = strtol (ex9_insn->string, NULL, 16);
-+ insn_with_reg = 0;
-+ if (ex9_insn->m_list != NULL || ex9_insn->sec != NULL)
-+ {
-+ if (ex9_insn->m_list)
-+ rel_backup = ex9_insn->m_list->rel_backup;
-+ else
-+ rel_backup = ex9_insn->rel_backup;
-+
-+ nds32_elf_get_insn_with_reg (&rel_backup, insn, &insn_with_reg);
-+ howto =
-+ bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE
-+ (rel_backup.r_info));
-+ shift = howto->rightshift;
-+ if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_25_PCREL_RELA
-+ || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_ORI_RELA
-+ || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S0_RELA
-+ || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S1_RELA
-+ || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_LO12S2_RELA
-+ || ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_20_RELA)
-+ {
-+ relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
-+ insn =
-+ insn_with_reg | ((relocation >> shift) &
-+ nds32_elf_irel_mask (&rel_backup));
-+ bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
-+ }
-+ else if ((ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3
-+ && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0)
-+ || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA15S3_RELA
-+ && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA15S0_RELA)
-+ || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA12S2_DP_RELA
-+ && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA12S2_SP_RELA)
-+ || (ELF32_R_TYPE (rel_backup.r_info) >= R_NDS32_SDA16S3_RELA
-+ && ELF32_R_TYPE (rel_backup.r_info) <= R_NDS32_SDA19S0_RELA))
-+ {
-+ relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
-+ insn =
-+ insn_with_reg | (((relocation - gp) >> shift) &
-+ nds32_elf_irel_mask (&rel_backup));
-+ bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
-+ }
-+ else if (ELF32_R_TYPE (rel_backup.r_info) == R_NDS32_HI20_RELA)
-+ {
-+ /* Sethi may be multiple entry for one insn. */
-+ if (ex9_insn->next && ex9_insn->m_list
-+ && ex9_insn->m_list == ex9_insn->next->m_list)
-+ {
-+ struct elf_link_hash_entry_mul_list *m_list;
-+ struct elf_nds32_ex9_refix *fix_ptr;
-+ struct elf_link_hash_entry *h;
-+
-+ temp_ptr = ex9_insn;
-+ temp_ptr2 = ex9_insn;
-+ m_list = ex9_insn->m_list;
-+ while (m_list)
-+ {
-+ h = m_list->h_list->h;
-+ relocation = h->root.u.def.value +
-+ h->root.u.def.section->output_section->vma +
-+ h->root.u.def.section->output_offset;
-+ relocation += m_list->irel->r_addend;
-+
-+ if (relocation < min_relocation)
-+ min_relocation = relocation;
-+ m_list = m_list->next;
-+ }
-+ relocation = min_relocation;
-+
-+ /* Put insntruction into ex9 table. */
-+ insn = insn_with_reg
-+ | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
-+ bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
-+ relocation = relocation + 0x1000; /* hi20 */
-+
-+ while (ex9_insn->next && ex9_insn->m_list
-+ && ex9_insn->m_list == ex9_insn->next->m_list)
-+ {
-+ /* Multiple sethi. */
-+ ex9_insn = ex9_insn->next;
-+ size += 4;
-+ insn =
-+ insn_with_reg | ((relocation >> shift) &
-+ nds32_elf_irel_mask (&rel_backup));
-+ bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
-+ relocation = relocation + 0x1000; /* hi20 */
-+ }
-+
-+ fix_ptr = ex9_refix_head;
-+ while (fix_ptr)
-+ {
-+ /* Fix ex9 insn. */
-+ /* temp_ptr2 points to the head of multiple sethi. */
-+ temp_ptr = temp_ptr2;
-+ while (fix_ptr->order != temp_ptr->order && fix_ptr->next)
-+ {
-+ fix_ptr = fix_ptr->next;
-+ }
-+ if (fix_ptr->order != temp_ptr->order)
-+ break;
-+
-+ /* Set source insn. */
-+ relocation =
-+ fix_ptr->h->root.u.def.value +
-+ fix_ptr->h->root.u.def.section->output_section->vma +
-+ fix_ptr->h->root.u.def.section->output_offset;
-+ relocation += fix_ptr->irel->r_addend;
-+ /* sethi imm is imm20s. */
-+ source_insn = insn_with_reg | ((relocation >> shift) & 0xfffff);
-+
-+ while (temp_ptr)
-+ {
-+ /* Match entry and source code. */
-+ insn = bfd_getb32 (contents + (temp_ptr->order) * 4 + offset);
-+ if (insn == source_insn)
-+ {
-+ /* Fix the ex9 insn. */
-+ if (temp_ptr->order != fix_ptr->order)
-+ {
-+ if (!nds32_get_section_contents
-+ (fix_ptr->sec->owner, fix_ptr->sec,
-+ &source_contents, TRUE))
-+ (*_bfd_error_handler)
-+ (_("Linker: error cannot fixed ex9 relocation \n"));
-+ if (temp_ptr->order < 32)
-+ insn_ex9 = INSN_EX9_IT_2;
-+ else
-+ insn_ex9 = INSN_EX9_IT_1;
-+ insn_ex9 = insn_ex9 | temp_ptr->order;
-+ bfd_putb16 (insn_ex9, source_contents + fix_ptr->irel->r_offset);
-+ }
-+ break;
-+ }
-+ else
-+ {
-+ if (!temp_ptr->next || temp_ptr->m_list != temp_ptr->next->m_list)
-+ (*_bfd_error_handler)
-+ (_("Linker: error cannot fixed ex9 relocation \n"));
-+ else
-+ temp_ptr = temp_ptr->next;
-+ }
-+ }
-+ fix_ptr = fix_ptr->next;
-+ }
-+ }
-+ else
-+ {
-+ relocation = nds32_elf_ex9_reloc_insn (ex9_insn, link_info);
-+ insn = insn_with_reg
-+ | ((relocation >> shift) & nds32_elf_irel_mask (&rel_backup));
-+ bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
-+ }
-+ }
-+ }
-+ else
-+ {
-+ /* Insn without relocation does not have to be fixed
-+ if need to update export table. */
-+ if (update_ex9_table == 1)
-+ bfd_putb32 (insn, contents + (ex9_insn->order) * 4);
-+ }
-+ ex9_insn = ex9_insn->next;
-+ size += 4;
-+ }
-+
-+ ex9_export_file = table->ex9_export_file;
-+ if (ex9_export_file != NULL)
-+ nds32_elf_ex9_export (link_info, contents, table_sec->size);
-+ else if (update_ex9_table == 1)
-+ {
-+ table->ex9_export_file = table->ex9_import_file;
-+ rewind (table->ex9_export_file);
-+ nds32_elf_ex9_export (link_info, contents, size);
-+ }
-+}
-+
-+/* Check this instruction is convertable to ex9. */
-+static bfd_boolean
-+nds32_elf_ex9_check_available (uint32_t insn)
-+{
-+ if (N32_OP6 (insn) == N32_OP6_MISC
-+ && (N32_SUB5 (insn) == N32_MISC_SYSCALL
-+ || N32_SUB5 (insn) == N32_MISC_BREAK
-+ || N32_SUB5 (insn) == N32_MISC_TEQZ
-+ || N32_SUB5 (insn) == N32_MISC_TNEZ
-+ || N32_SUB5 (insn) == N32_MISC_TRAP))
-+ return FALSE;
-+ return TRUE;
-+}
-+
-+/* Generate ex9 hash table. */
-+
-+static bfd_boolean
-+nds32_elf_ex9_build_hash_table (bfd *abfd, asection *sec,
-+ struct bfd_link_info *link_info)
-+{
-+ Elf_Internal_Rela *internal_relocs;
-+ Elf_Internal_Rela *irelend;
-+ Elf_Internal_Rela *irel;
-+ Elf_Internal_Rela *jrel;
-+ Elf_Internal_Rela rel_backup;
-+ Elf_Internal_Shdr *symtab_hdr;
-+ Elf_Internal_Sym *isym = NULL;
-+ asection *isec;
-+ struct elf_link_hash_entry **sym_hashes;
-+ bfd_byte *contents = NULL;
-+ bfd_vma off = 0;
-+ unsigned long r_symndx;
-+ uint32_t insn, insn_with_reg;
-+ struct elf_link_hash_entry *h;
-+ int data_flag, shift, align;
-+ bfd_vma relocation;
-+ /* Suppress ex9 if `.no_relax ex9' or inner loop. */
-+ reloc_howto_type *howto = NULL;
-+
-+ sym_hashes = elf_sym_hashes (abfd);
-+ /* Load section instructions, relocations, and symbol table. */
-+ if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
-+ return FALSE;
-+
-+ internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
-+ TRUE /* keep_memory */);
-+ irelend = internal_relocs + sec->reloc_count;
-+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
-+ if (!nds32_get_local_syms (abfd, sec, &isym))
-+ return FALSE;
-+
-+ /* Check the object if enable ex9. */
-+ irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
-+ R_NDS32_RELAX_ENTRY);
-+
-+ /* Check this section trigger ex9 relaxation. */
-+ if (irel == NULL
-+ || irel >= irelend
-+ || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
-+ || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
-+ && !(irel->r_addend & R_NDS32_RELAX_ENTRY_EX9_FLAG)))
-+ return TRUE;
-+
-+ irel = internal_relocs;
-+
-+ /* Push each insn into hash table. */
-+ while (off < sec->size)
-+ {
-+ char code[10];
-+ struct elf_nds32_code_hash_entry *entry;
-+
-+ while (irel != NULL && irel < irelend && irel->r_offset < off)
-+ irel++;
-+
-+ data_flag = nds32_elf_ex9_relocation_check (link_info, &irel, irelend,
-+ NULL, sec, &off, contents);
-+ if (data_flag & DATA_EXIST)
-+ {
-+ /* We save the move offset in the highest byte. */
-+ off += (data_flag >> 24);
-+ continue;
-+ }
-+
-+ /* Ignore 2-byte instruction. */
-+ if (*(contents + off) & 0x80)
-+ {
-+ off += 2;
-+ continue;
-+ }
-+
-+ insn = bfd_getb32 (contents + off);
-+ if (!nds32_elf_ex9_check_available (insn))
-+ {
-+ off += 4;
-+ continue;
-+ }
-+
-+ h = NULL;
-+ isec = NULL;
-+ jrel = NULL;
-+ rel_backup.r_info = 0;
-+ rel_backup.r_offset = 0;
-+ rel_backup.r_addend = 0;
-+ /* Load the instruction and its opcode with register for comparing. */
-+ insn_with_reg = 0;
-+ if (irel != NULL && irel < irelend && irel->r_offset == off)
-+ {
-+ nds32_elf_get_insn_with_reg (irel, insn, &insn_with_reg);
-+ howto = bfd_elf32_bfd_reloc_type_table_lookup (ELF32_R_TYPE (irel->r_info));
-+ shift = howto->rightshift;
-+ align = (1 << shift) - 1;
-+ if (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_HI20_RELA
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_ORI_RELA
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S0_RELA
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S1_RELA
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_RELA
-+ || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
-+ || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
-+ || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
-+ || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA)
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
-+ {
-+ r_symndx = ELF32_R_SYM (irel->r_info);
-+ jrel = irel;
-+ rel_backup = *irel;
-+ if (r_symndx < symtab_hdr->sh_info)
-+ {
-+ /* Local symbol. */
-+ int shndx = isym[r_symndx].st_shndx;
-+
-+ bfd_vma st_value = (isym + r_symndx)->st_value;
-+ isec = elf_elfsections (abfd)[shndx]->bfd_section;
-+ relocation = (isec->output_section->vma + isec->output_offset
-+ + st_value + irel->r_addend);
-+ }
-+ else
-+ {
-+ /* External symbol. */
-+ bfd_boolean warned ATTRIBUTE_UNUSED;
-+ bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
-+ asection *sym_sec;
-+
-+ /* Maybe there is a better way to get h and relocation */
-+ RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
-+ r_symndx, symtab_hdr, sym_hashes,
-+ h, sym_sec, relocation,
-+ unresolved_reloc, warned);
-+ relocation += irel->r_addend;
-+ if ((h->root.type != bfd_link_hash_defined
-+ && h->root.type != bfd_link_hash_defweak)
-+ || strcmp (h->root.root.string, "_FP_BASE_") == 0)
-+ {
-+ off += 4;
-+ continue;
-+ }
-+ }
-+
-+ /* Check for gp relative instruction alignment. */
-+ if ((ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
-+ || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
-+ || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
-+ || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA))
-+ {
-+ bfd_vma gp;
-+ bfd *output_bfd = sec->output_section->owner;
-+ bfd_reloc_status_type r;
-+
-+ /* If the symbol is in the abs section, the out_bfd will be
-+ null. This happens when the relocation has a
-+ symbol@GOTOFF. */
-+ r = nds32_elf_final_sda_base (output_bfd, link_info,
-+ &gp, FALSE);
-+ if (r != bfd_reloc_ok)
-+ {
-+ off += 4;
-+ continue;
-+ }
-+
-+ relocation -= gp;
-+
-+ /* Make sure alignment is correct. */
-+ if (relocation & align)
-+ {
-+ /* Incorrect alignment. */
-+ (*_bfd_error_handler)
-+ (_("%s: warning: unaligned small data access. "
-+ "For entry: {%d, %d, %d}, addr = 0x%x, align = 0x%x."),
-+ bfd_get_filename (abfd), irel->r_offset,
-+ irel->r_info, irel->r_addend, relocation, align);
-+ off += 4;
-+ continue;
-+ }
-+ }
-+
-+ insn = insn_with_reg
-+ | ((relocation >> shift) & nds32_elf_irel_mask (irel));
-+ }
-+ else
-+ {
-+ off += 4;
-+ continue;
-+ }
-+ }
-+
-+ snprintf (code, sizeof (code), "%08x", insn);
-+ /* Copy "code". */
-+ entry = (struct elf_nds32_code_hash_entry*)
-+ bfd_hash_lookup (&ex9_code_table, code, TRUE, TRUE);
-+ if (entry == NULL)
-+ {
-+ (*_bfd_error_handler)
-+ (_("%P%F: failed creating ex9.it %s hash table: %E\n"), code);
-+ return FALSE;
-+ }
-+ if (h)
-+ {
-+ if (h->root.type == bfd_link_hash_undefined)
-+ return TRUE;
-+ /* Global symbol. */
-+ /* In order to do sethi with different symbol but same value. */
-+ if (entry->m_list == NULL)
-+ {
-+ struct elf_link_hash_entry_mul_list *m_list_new;
-+ struct elf_link_hash_entry_list *h_list_new;
-+
-+ m_list_new = (struct elf_link_hash_entry_mul_list *)
-+ bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
-+ h_list_new = (struct elf_link_hash_entry_list *)
-+ bfd_malloc (sizeof (struct elf_link_hash_entry_list));
-+ entry->m_list = m_list_new;
-+ m_list_new->h_list = h_list_new;
-+ m_list_new->rel_backup = rel_backup;
-+ m_list_new->times = 1;
-+ m_list_new->irel = jrel;
-+ m_list_new->next = NULL;
-+ h_list_new->h = h;
-+ h_list_new->next = NULL;
-+ }
-+ else
-+ {
-+ struct elf_link_hash_entry_mul_list *m_list = entry->m_list;
-+ struct elf_link_hash_entry_list *h_list;
-+
-+ while (m_list)
-+ {
-+ /* Build the different symbols that point to the same address. */
-+ h_list = m_list->h_list;
-+ if (h_list->h->root.u.def.value == h->root.u.def.value
-+ && h_list->h->root.u.def.section->output_section->vma
-+ == h->root.u.def.section->output_section->vma
-+ && h_list->h->root.u.def.section->output_offset
-+ == h->root.u.def.section->output_offset
-+ && m_list->rel_backup.r_addend == rel_backup.r_addend)
-+ {
-+ m_list->times++;
-+ m_list->irel = jrel;
-+ while (h_list->h != h && h_list->next)
-+ h_list = h_list->next;
-+ if (h_list->h != h)
-+ {
-+ struct elf_link_hash_entry_list *h_list_new;
-+
-+ h_list_new = (struct elf_link_hash_entry_list *)
-+ bfd_malloc (sizeof (struct elf_link_hash_entry_list));
-+ h_list->next = h_list_new;
-+ h_list_new->h = h;
-+ h_list_new->next = NULL;
-+ }
-+ break;
-+ }
-+ /* The sethi case may have different address but the
-+ hi20 is the same. */
-+ else if (ELF32_R_TYPE (jrel->r_info) == R_NDS32_HI20_RELA
-+ && m_list->next == NULL)
-+ {
-+ struct elf_link_hash_entry_mul_list *m_list_new;
-+ struct elf_link_hash_entry_list *h_list_new;
-+
-+ m_list_new = (struct elf_link_hash_entry_mul_list *)
-+ bfd_malloc (sizeof (struct elf_link_hash_entry_mul_list));
-+ h_list_new = (struct elf_link_hash_entry_list *)
-+ bfd_malloc (sizeof (struct elf_link_hash_entry_list));
-+ m_list->next = m_list_new;
-+ m_list_new->h_list = h_list_new;
-+ m_list_new->rel_backup = rel_backup;
-+ m_list_new->times = 1;
-+ m_list_new->irel = jrel;
-+ m_list_new->next = NULL;
-+ h_list_new->h = h;
-+ h_list_new->next = NULL;
-+ break;
-+ }
-+ m_list = m_list->next;
-+ }
-+ if (!m_list)
-+ {
-+ off += 4;
-+ continue;
-+ }
-+ }
-+ }
-+ else
-+ {
-+ /* Local symbol and insn without relocation*/
-+ entry->times++;
-+ entry->rel_backup = rel_backup;
-+ }
-+
-+ /* Use in sethi insn with constant and global symbol in same format. */
-+ if (!jrel)
-+ entry->const_insn = 1;
-+ else
-+ entry->irel = jrel;
-+ entry->sec = isec;
-+ off += 4;
-+ }
-+ return TRUE;
-+}
-+
-+/* Set the _ITB_BASE_, and point it to ex9 table. */
-+
-+bfd_boolean
-+nds32_elf_ex9_itb_base (struct bfd_link_info *link_info)
-+{
-+ asection *sec;
-+ bfd *output_bfd = NULL;
-+ struct bfd_link_hash_entry *bh = NULL;
-+
-+ if (is_ITB_BASE_set == 1)
-+ return TRUE;
-+
-+ is_ITB_BASE_set = 1;
-+
-+ sec = nds32_elf_ex9_get_section (link_info->input_bfds);
-+ if (sec != NULL)
-+ output_bfd = sec->output_section->owner;
-+
-+ if (output_bfd == NULL)
-+ {
-+ output_bfd = link_info->output_bfd;
-+ if (output_bfd->sections == NULL)
-+ return TRUE;
-+ else
-+ sec = bfd_abs_section_ptr;
-+ }
-+
-+ /* Do not define _ITB_BASE_ if it is not used.
-+ And remain user to set it if needed. */
-+
-+ bh = bfd_link_hash_lookup (link_info->hash, "_ITB_BASE_",
-+ FALSE, FALSE, TRUE);
-+ if (!bh)
-+ return TRUE;
-+
-+ return (_bfd_generic_link_add_one_symbol
-+ (link_info, output_bfd, "_ITB_BASE_", BSF_GLOBAL | BSF_WEAK,
-+ sec, 0, (const char *) NULL, FALSE,
-+ get_elf_backend_data (output_bfd)->collect, &bh));
-+}
-+/* End EX9.IT */
-+
-+
-+/* Begining IFC. This is common code ifc optimization. */
-+
-+struct elf_nds32_ifc_code_hash_entry;
-+struct elf_nds32_ifc_unit;
-+
-+/* Save the offset and section. */
-+
-+struct elf_nds32_ifc_member
-+{
-+ unsigned long int offset;
-+ asection *sec;
-+
-+ /* Link to its unit. */
-+ struct elf_nds32_ifc_unit *unit_p;
-+
-+ /* Link to its previous entry. */
-+ struct elf_nds32_ifc_code_hash_entry *pre_entry;
-+
-+ /* Save next insnstrution member to find group quickly. */
-+ struct elf_nds32_ifc_member *next_member;
-+ struct elf_nds32_ifc_member *pre_member;
-+ /* Save the jump target for the previous instruction. */
-+ struct bfd_link_hash_entry *bh;
-+ bfd_boolean dead;
-+ struct elf_nds32_ifc_member *next;
-+};
-+
-+/* The unit of elf_nds32_ifc_code_hash_entry. */
-+
-+struct elf_nds32_ifc_unit
-+{
-+ int times;
-+ int done;
-+ struct elf_nds32_ifc_member *member;
-+
-+ /* Link to its entry. */
-+ struct elf_nds32_ifc_code_hash_entry *entry_p;
-+
-+ /* Save next insnstruction entry. */
-+ struct elf_nds32_ifc_code_hash_entry *hash;
-+ struct elf_nds32_ifc_unit *next;
-+};
-+
-+/* Instruction hash table. */
-+
-+struct elf_nds32_ifc_code_hash_entry
-+{
-+ struct bfd_hash_entry root;
-+ int times;
-+ int size;
-+ struct elf_nds32_ifc_unit *unit;
-+ struct elf_link_hash_entry *h;
-+
-+ /* Save the max times unit in this entry. */
-+ struct elf_nds32_ifc_unit *max_unit;
-+ struct elf_nds32_ifc_code_hash_entry *next; /* For sort times. */
-+ int round; /* Save round of nds32_elf_ifc_find_cse to avoid reentrance. */
-+ struct elf_nds32_ifc_code_hash_entry *max_next;
-+ bfd_boolean end; /* This is instruction can break ifc block. */
-+ int max_times;
-+};
-+
-+/* Structure for replace using. */
-+
-+struct elf_nds32_ifc_insn_member
-+{
-+ struct elf_nds32_ifc_member *member;
-+ struct elf_nds32_ifc_insn_member *next;
-+};
-+
-+struct elf_nds32_ifc_insn_stack
-+{
-+ int live;
-+ int extend;
-+ int choose;
-+ struct elf_nds32_ifc_insn_member *imember;
-+ struct elf_nds32_ifc_insn_stack *next;
-+};
-+
-+/* Save members in the same section. */
-+
-+struct elf_nds32_ifc_sec_member
-+{
-+ struct elf_nds32_ifc_member *member;
-+ struct elf_nds32_ifc_sec_member *next;
-+};
-+
-+struct elf_nds32_ifc_sec_block
-+{
-+ asection *sec;
-+ struct elf_nds32_ifc_sec_member *smember;
-+ struct elf_nds32_ifc_sec_block *next;
-+};
-+
-+struct elf_nds32_ifc_barrier
-+{
-+ bfd_vma offset;
-+ struct elf_nds32_ifc_barrier *next;
-+};
-+
-+/* Ifc global symbol. */
-+struct bfd_hash_table ifc_code_table;
-+struct elf_nds32_ifc_code_hash_entry *ifc_insn_head = NULL;
-+struct elf_nds32_ifc_sec_block *ifc_block_head = NULL;
-+
-+/* IFC hash function. */
-+
-+static struct bfd_hash_entry *
-+nds32_elf_ifc_code_hash_newfunc (struct bfd_hash_entry *entry,
-+ struct bfd_hash_table *table,
-+ const char *string)
-+{
-+ struct elf_nds32_ifc_code_hash_entry *ret;
-+
-+ /* Allocate the structure if it has not already been allocated by a
-+ subclass. */
-+ if (entry == NULL)
-+ {
-+ entry = (struct bfd_hash_entry *)
-+ bfd_hash_allocate (table, sizeof (*ret));
-+ if (entry == NULL)
-+ return entry;
-+ }
-+
-+ /* Call the allocation method of the superclass. */
-+ entry = bfd_hash_newfunc (entry, table, string);
-+ if (entry == NULL)
-+ return entry;
-+
-+ ret = (struct elf_nds32_ifc_code_hash_entry*) entry;
-+ ret->times = 0;
-+ ret->unit = NULL;
-+ ret->next = NULL;
-+ ret->size = 0;
-+ ret->h = NULL;
-+ ret->max_unit = NULL;
-+ ret->round = 0;
-+ ret->max_next = NULL;
-+ ret->max_times = 0;
-+ ret->end = FALSE;
-+ return &ret->root;
-+}
-+
-+/* Do TLS model conversion. */
-+
-+typedef struct relax_group_list_t
-+{
-+ Elf_Internal_Rela *relo;
-+ struct relax_group_list_t *next;
-+ struct relax_group_list_t *next_sibling;
-+ int id;
-+} relax_group_list_t;
-+
-+int
-+list_insert (relax_group_list_t *pHead, Elf_Internal_Rela *pElem);
-+
-+int
-+list_insert_sibling (relax_group_list_t *pNode, Elf_Internal_Rela *pElem);
-+
-+void
-+dump_chain (relax_group_list_t *pHead);
-+
-+int
-+list_insert (relax_group_list_t *pHead, Elf_Internal_Rela *pElem)
-+{
-+ relax_group_list_t *pNext = pHead;
-+
-+ /* find place */
-+ while (pNext->next)
-+ {
-+ if (pNext->next->id > (int) pElem->r_addend)
-+ break;
-+
-+ pNext = pNext->next;
-+ }
-+
-+ /* insert node */
-+ relax_group_list_t *pNew = bfd_malloc (sizeof (relax_group_list_t));
-+ if (!pNew)
-+ return FALSE;
-+
-+ relax_group_list_t *tmp = pNext->next;
-+ pNext->next = pNew;
-+
-+ pNew->id = pElem->r_addend;
-+ pNew->relo = pElem;
-+ pNew->next = tmp;
-+ pNew->next_sibling = NULL;
-+
-+ return TRUE;
-+}
-+
-+int
-+list_insert_sibling (relax_group_list_t *pNode, Elf_Internal_Rela *pElem)
-+{
-+ relax_group_list_t *pNext = pNode;
-+
-+ /* find place */
-+ while (pNext->next_sibling)
-+ {
-+ pNext = pNext->next_sibling;
-+ }
-+
-+ /* insert node */
-+ relax_group_list_t *pNew = bfd_malloc (sizeof (relax_group_list_t));
-+ if (!pNew)
-+ return FALSE;
-+
-+ relax_group_list_t *tmp = pNext->next_sibling;
-+ pNext->next_sibling = pNew;
-+
-+ pNew->id = -1;
-+ pNew->relo = pElem;
-+ pNew->next = NULL;
-+ pNew->next_sibling = tmp;
-+
-+ return TRUE;
-+}
-+
-+void
-+dump_chain (relax_group_list_t *pHead)
-+{
-+ relax_group_list_t *pNext = pHead->next;
-+ while (pNext)
-+ {
-+ printf("group %d @ 0x%08x", pNext->id, (unsigned)pNext->relo->r_offset);
-+ relax_group_list_t *pNextSib = pNext->next_sibling;
-+ while (pNextSib)
-+ {
-+ printf(", %d", (unsigned) ELF32_R_TYPE (pNextSib->relo->r_info));
-+ pNextSib = pNextSib->next_sibling;
-+ }
-+ pNext = pNext->next;
-+ printf("\n");
-+ }
-+}
-+
-+/* check R_NDS32_RELAX_GROUP of each section.
-+ * there might be multiple sections in one object file.
-+ */
-+int
-+elf32_nds32_check_relax_group (bfd *abfd, asection *asec)
-+{
-+ elf32_nds32_relax_group_t *relax_group_ptr =
-+ elf32_nds32_relax_group_ptr (abfd);
-+
-+ int min_id = relax_group_ptr->min_id;
-+ int max_id = relax_group_ptr->max_id;
-+
-+ Elf_Internal_Rela *rel;
-+ Elf_Internal_Rela *relend;
-+ Elf_Internal_Rela *relocs;
-+ enum elf_nds32_reloc_type rtype;
-+
-+ do
-+ {
-+ /* Relocations MUST be kept in memory, because relaxation adjust them. */
-+ relocs = _bfd_elf_link_read_relocs (abfd, asec, NULL, NULL,
-+ TRUE /* keep_memory */);
-+ if (relocs == NULL)
-+ break;
-+
-+ /* check R_NDS32_RELAX_GROUP */
-+ relend = relocs + asec->reloc_count;
-+ for (rel = relocs; rel < relend; rel++)
-+ {
-+ int id;
-+ rtype = ELF32_R_TYPE (rel->r_info);
-+ if (rtype != R_NDS32_RELAX_GROUP)
-+ continue;
-+
-+ id = rel->r_addend;
-+ if (id < min_id)
-+ min_id = id;
-+ else if (id > max_id)
-+ max_id = id;
-+ }
-+ }
-+ while (FALSE);
-+
-+ if ((relocs != NULL) && (elf_section_data (asec)->relocs != relocs))
-+ free (relocs);
-+
-+ if ((min_id != relax_group_ptr->min_id)
-+ || (max_id != relax_group_ptr->max_id))
-+ {
-+ relax_group_ptr->count = max_id - min_id + 1;
-+ BFD_ASSERT(min_id <= relax_group_ptr->min_id);
-+ relax_group_ptr->min_id = min_id;
-+ BFD_ASSERT(max_id >= relax_group_ptr->max_id);
-+ relax_group_ptr->max_id = max_id;
-+ }
-+
-+ return relax_group_ptr->count;
-+}
-+
-+/* reorder RELAX_GROUP ID when command line option '-r' is applied */
-+/* TODO: find a way to free me. */
-+struct section_id_list_t *relax_group_section_id_list = NULL;
-+
-+struct section_id_list_t *
-+elf32_nds32_lookup_section_id (int id, struct section_id_list_t **lst_ptr)
-+{
-+ struct section_id_list_t *result = NULL;
-+ struct section_id_list_t *lst = *lst_ptr;
-+
-+ if (NULL == lst)
-+ {
-+ result = (struct section_id_list_t *) calloc (
-+ 1, sizeof (struct section_id_list_t));
-+ BFD_ASSERT (result); /* feed me */
-+ result->id = id;
-+ *lst_ptr = result;
-+ }
-+ else
-+ {
-+ struct section_id_list_t *cur = lst;
-+ struct section_id_list_t *prv = NULL;
-+ struct section_id_list_t *sec = NULL;
-+ while (cur)
-+ {
-+ if (cur->id < id)
-+ {
-+ prv = cur;
-+ cur = cur->next;
-+ continue;
-+ }
-+
-+ if (cur->id > id)
-+ {
-+ cur = NULL; /* to insert after prv */
-+ sec = cur; /* in case prv == NULL */
-+ }
-+
-+ break;
-+ }
-+
-+ if (NULL == cur)
-+ {
-+ /* insert after prv */
-+ result = (struct section_id_list_t *) calloc (
-+ 1, sizeof (struct section_id_list_t));
-+ BFD_ASSERT (result); /* feed me */
-+ result->id = id;
-+ if (NULL != prv)
-+ {
-+ result->next = prv->next;
-+ prv->next = result;
-+ }
-+ else
-+ {
-+ *lst_ptr = result;
-+ result->next = sec;
-+ }
-+ }
-+ }
-+
-+ return result;
-+}
-+
-+int
-+elf32_nds32_unify_relax_group (bfd *abfd, asection *asec)
-+{
-+ static int next_relax_group_bias = 0;
-+
-+ elf32_nds32_relax_group_t *relax_group_ptr =
-+ elf32_nds32_relax_group_ptr (abfd);
-+
-+ bfd_boolean result = TRUE;
-+ Elf_Internal_Rela *rel;
-+ Elf_Internal_Rela *relend;
-+ Elf_Internal_Rela *relocs = NULL;
-+ enum elf_nds32_reloc_type rtype;
-+ struct section_id_list_t *node = NULL;
-+ int count = 0;
-+
-+ do
-+ {
-+ if (0 == relax_group_ptr->count)
-+ break;
-+
-+ /* check if this section has handled */
-+ node = elf32_nds32_lookup_section_id (asec->id, &relax_group_section_id_list);
-+ if (NULL == node)
-+ break; /* hit, the section id has handled. */
-+
-+ /* Relocations MUST be kept in memory, because relaxation adjust them. */
-+ relocs = _bfd_elf_link_read_relocs (abfd, asec, NULL, NULL,
-+ TRUE /* keep_memory */);
-+ if (relocs == NULL)
-+ {
-+ BFD_ASSERT (0); /* feed me */
-+ break;
-+ }
-+
-+ /* allocate group id bias for this bfd! */
-+ if (0 == relax_group_ptr->init)
-+ {
-+ relax_group_ptr->bias = next_relax_group_bias;
-+ next_relax_group_bias += relax_group_ptr->count;
-+ relax_group_ptr->init = 1;
-+ }
-+
-+ /* reorder relax group groups */
-+ relend = relocs + asec->reloc_count;
-+ for (rel = relocs; rel < relend; rel++)
-+ {
-+ rtype = ELF32_R_TYPE(rel->r_info);
-+ if (rtype != R_NDS32_RELAX_GROUP)
-+ continue;
-+
-+ /* change it */
-+ rel->r_addend += relax_group_ptr->bias;
-+ /* debugging count */
-+ count++;
-+ }
-+ }
-+ while (FALSE);
-+
-+ if (relocs != NULL && elf_section_data (asec)->relocs != relocs)
-+ free (relocs);
-+
-+ return result;
-+}
-+
-+int
-+nds32_elf_unify_tls_model (bfd *inbfd, asection *insec, bfd_byte *incontents,
-+ struct bfd_link_info *lnkinfo)
-+{
-+ bfd_boolean result = TRUE;
-+ Elf_Internal_Rela *irel;
-+ Elf_Internal_Rela *irelend;
-+ Elf_Internal_Rela *internal_relocs;
-+ unsigned long r_symndx;
-+ enum elf_nds32_reloc_type r_type;
-+
-+ Elf_Internal_Sym *local_syms = NULL;
-+ bfd_byte *contents = NULL;
-+
-+ relax_group_list_t chain = { .id = -1, .next = NULL, .next_sibling = NULL };
-+
-+ Elf_Internal_Shdr *symtab_hdr = &elf_tdata (inbfd)->symtab_hdr;
-+ struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
-+ sym_hashes = elf_sym_hashes (inbfd);
-+ sym_hashes_end =
-+ sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
-+ if (!elf_bad_symtab (inbfd))
-+ sym_hashes_end -= symtab_hdr->sh_info;
-+
-+ /* reorder RELAX_GROUP when command line option '-r' is applied */
-+ if (lnkinfo->relocatable)
-+ {
-+ elf32_nds32_unify_relax_group (inbfd, insec);
-+ /* goto finish; */
-+ return result;
-+ }
-+
-+ /* Relocations MUST be kept in memory, because relaxation adjust them. */
-+ internal_relocs = _bfd_elf_link_read_relocs (inbfd, insec, NULL, NULL,
-+ TRUE /* keep_memory */);
-+ if (internal_relocs == NULL)
-+ goto error_return;
-+
-+ irelend = internal_relocs + insec->reloc_count;
-+ irel = find_relocs_at_address (internal_relocs, internal_relocs,
-+ irelend, R_NDS32_RELAX_ENTRY);
-+ if (irel == irelend)
-+ goto finish;
-+
-+ /* chain/remove groups */
-+ for (irel = internal_relocs; irel < irelend; irel++)
-+ {
-+ r_symndx = ELF32_R_SYM (irel->r_info);
-+ r_type = ELF32_R_TYPE (irel->r_info);
-+ if (r_type != R_NDS32_RELAX_GROUP)
-+ continue;
-+
-+ /* remove it */
-+ irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_NONE);
-+ /* chain it now */
-+ if (!list_insert (&chain, irel))
-+ goto error_return;
-+ }
-+
-+ /* collect group relocations */
-+ /* presume relocations are sorted */
-+ relax_group_list_t *pNext = chain.next;
-+ if (pNext)
-+ {
-+ for (irel = internal_relocs; irel < irelend; irel++)
-+ {
-+ if (irel->r_offset == pNext->relo->r_offset)
-+ {
-+ /* ignore Non-TLS relocation types */
-+ r_type = ELF32_R_TYPE (irel->r_info);
-+ if ((R_NDS32_TLS_TPOFF > r_type)
-+ || (R_NDS32_RELAX_ENTRY == r_type))
-+ continue;
-+
-+ if (!list_insert_sibling (pNext, irel))
-+ goto error_return;
-+ }
-+ else if (irel->r_offset > pNext->relo->r_offset)
-+ {
-+ pNext = pNext->next;
-+ if (!pNext)
-+ break;
-+
-+ bfd_vma current_offset = pNext->relo->r_offset;
-+ if (irel->r_offset > current_offset)
-+ irel = internal_relocs; /* restart from head */
-+ else
-+ --irel; /* check current irel again */
-+ continue;
-+ }
-+ else
-+ {
-+ //printf("irel->off = 0x%08x, pNext->relo->off = 0x%08x (0x%08x)\n", (unsigned)irel->r_offset, (unsigned)pNext->relo->r_offset, (unsigned)first_offset);
-+ }
-+ }
-+ }
-+
-+#ifdef DUBUG_VERBOSE
-+ dump_chain(&chain);
-+#endif
-+
-+ /* Get symbol table and section content. */
-+ if (incontents)
-+ contents = incontents;
-+ else if (!nds32_get_section_contents (inbfd, insec, &contents, TRUE)
-+ || !nds32_get_local_syms (inbfd, insec, &local_syms))
-+ goto error_return;
-+
-+ char *local_got_tls_type = elf32_nds32_local_got_tls_type (inbfd);
-+
-+ /* convert TLS model each group if necessary */
-+ pNext = chain.next;
-+ int cur_grp_id = -1;
-+ int sethi_rt = -1;
-+ int add_rt = -1;
-+ enum elf_nds32_tls_type tls_type, org_tls_type, eff_tls_type;
-+ tls_type = org_tls_type = eff_tls_type = 0;
-+ while (pNext)
-+ {
-+ relax_group_list_t *pNextSig = pNext->next_sibling;
-+ while (pNextSig)
-+ {
-+ struct elf_link_hash_entry *h = NULL;
-+ irel = pNextSig->relo;
-+ r_symndx = ELF32_R_SYM(irel->r_info);
-+ r_type = ELF32_R_TYPE(irel->r_info);
-+
-+ if (pNext->id != cur_grp_id)
-+ {
-+ cur_grp_id = pNext->id;
-+ org_tls_type = get_tls_type (r_type, NULL);
-+ if (r_symndx >= symtab_hdr->sh_info)
-+ {
-+ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
-+ while (h->root.type == bfd_link_hash_indirect
-+ || h->root.type == bfd_link_hash_warning)
-+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
-+ tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
-+ }
-+ else
-+ {
-+ /* TODO: find local symbol hash if necessary? */
-+ tls_type = local_got_tls_type ? local_got_tls_type[r_symndx] : GOT_NORMAL;
-+ }
-+
-+ eff_tls_type = 1 << (fls (tls_type) - 1);
-+ sethi_rt = N32_RT5(bfd_getb32 (contents + irel->r_offset));
-+ }
-+
-+ if (eff_tls_type != org_tls_type)
-+ {
-+ switch (org_tls_type)
-+ {
-+ case GOT_TLS_DESC:
-+ switch (eff_tls_type)
-+ {
-+ case GOT_TLS_IE:
-+ switch (r_type)
-+ {
-+ case R_NDS32_TLS_DESC_HI20:
-+ irel->r_info = ELF32_R_INFO(r_symndx,
-+ R_NDS32_TLS_IE_HI20);
-+ break;
-+ case R_NDS32_TLS_DESC_LO12:
-+ irel->r_info = ELF32_R_INFO(r_symndx,
-+ R_NDS32_TLS_IE_LO12);
-+ break;
-+ case R_NDS32_TLS_DESC_ADD:
-+ {
-+ uint32_t insn = bfd_getb32 (
-+ contents + irel->r_offset);
-+ add_rt = N32_RT5 (insn);
-+ insn = N32_TYPE2 (LWI, add_rt, sethi_rt, 0);
-+ bfd_putb32 (insn, contents + irel->r_offset);
-+
-+ irel->r_info = ELF32_R_INFO(r_symndx, R_NDS32_NONE);
-+/* irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_IE_LW);
-+*/
-+ }
-+ break;
-+ case R_NDS32_TLS_DESC_FUNC:
-+ bfd_putb32 (INSN_NOP, contents + irel->r_offset);
-+ irel->r_info = ELF32_R_INFO(r_symndx,
-+ R_NDS32_RELAX_REMOVE);
-+ break;
-+ case R_NDS32_TLS_DESC_CALL:
-+ {
-+ uint32_t insn = N32_ALU1(ADD, REG_R0, add_rt,
-+ REG_TP);
-+ bfd_putb32 (insn, contents + irel->r_offset);
-+
-+ irel->r_info = ELF32_R_INFO(r_symndx, R_NDS32_NONE);
-+ }
-+ break;
-+ case R_NDS32_LOADSTORE:
-+ case R_NDS32_PTR:
-+ case R_NDS32_PTR_RESOLVED:
-+ case R_NDS32_NONE:
-+ case R_NDS32_LABEL:
-+ break;
-+ default:
-+ BFD_ASSERT(0);
-+ break;
-+ }
-+ break;
-+ case GOT_TLS_IEGP:
-+ switch (r_type)
-+ {
-+ case R_NDS32_TLS_DESC_HI20:
-+ irel->r_info = ELF32_R_INFO(r_symndx,
-+ R_NDS32_TLS_IEGP_HI20);
-+ break;
-+ case R_NDS32_TLS_DESC_LO12:
-+ irel->r_info = ELF32_R_INFO(r_symndx,
-+ R_NDS32_TLS_IEGP_LO12);
-+ break;
-+ case R_NDS32_TLS_DESC_ADD:
-+ {
-+ uint32_t insn = bfd_getb32 (
-+ contents + irel->r_offset);
-+ add_rt = N32_RT5 (insn);
-+ insn = N32_MEM(LW, add_rt, sethi_rt, REG_GP, 0);
-+ bfd_putb32 (insn, contents + irel->r_offset);
-+
-+ irel->r_info = ELF32_R_INFO(r_symndx, R_NDS32_NONE);
-+/* irel->r_info = ELF32_R_INFO (r_symndx, R_NDS32_TLS_IEGP_LW);
-+*/
-+ }
-+ break;
-+ case R_NDS32_TLS_DESC_FUNC:
-+ bfd_putb32 (INSN_NOP, contents + irel->r_offset);
-+ irel->r_info = ELF32_R_INFO(r_symndx,
-+ R_NDS32_RELAX_REMOVE);
-+ break;
-+ case R_NDS32_TLS_DESC_CALL:
-+ {
-+ uint32_t insn = N32_ALU1(ADD, REG_R0, add_rt,
-+ REG_TP);
-+ bfd_putb32 (insn, contents + irel->r_offset);
-+
-+ irel->r_info = ELF32_R_INFO(r_symndx, R_NDS32_NONE);
-+ }
-+ break;
-+ case R_NDS32_LOADSTORE:
-+ case R_NDS32_PTR:
-+ case R_NDS32_PTR_RESOLVED:
-+ case R_NDS32_NONE:
-+ case R_NDS32_LABEL:
-+ break;
-+ default:
-+ BFD_ASSERT(0);
-+ break;
-+ }
-+ break;
-+ default:
-+#ifdef DEBUG_VERBOSE
-+ printf (
-+ "SKIP: %s: %s @ 0x%08x tls_type = 0x%08x, eff_tls_type = 0x%08x, org_tls_type = 0x%08x\n",
-+ inbfd->filename, h ? h->root.root.string : "local",
-+ (unsigned) irel->r_offset, tls_type, eff_tls_type,
-+ org_tls_type);
-+#endif
-+ break;
-+ }
-+ break;
-+ case GOT_TLS_IEGP:
-+ switch (eff_tls_type)
-+ {
-+ case GOT_TLS_IE:
-+ switch (r_type)
-+ {
-+ case R_NDS32_TLS_IEGP_HI20:
-+ irel->r_info = ELF32_R_INFO(r_symndx,
-+ R_NDS32_TLS_IE_HI20);
-+ break;
-+ case R_NDS32_TLS_IEGP_LO12:
-+ irel->r_info = ELF32_R_INFO(r_symndx,
-+ R_NDS32_TLS_IE_LO12);
-+ break;
-+ case R_NDS32_PTR_RESOLVED:
-+ {
-+ uint32_t insn = bfd_getb32 (
-+ contents + irel->r_offset);
-+ add_rt = N32_RT5 (insn);
-+ insn = N32_TYPE2 (LWI, add_rt, sethi_rt, 0);
-+ bfd_putb32 (insn, contents + irel->r_offset);
-+ }
-+ break;
-+ case R_NDS32_LOADSTORE:
-+ case R_NDS32_PTR:
-+ case R_NDS32_NONE:
-+ case R_NDS32_LABEL:
-+ break;
-+ default:
-+ BFD_ASSERT(0);
-+ break;
-+ }
-+ break;
-+ default:
-+#ifdef DEBUG_VERBOSE
-+ printf (
-+ "SKIP: %s: %s @ 0x%08x tls_type = 0x%08x, eff_tls_type = 0x%08x, org_tls_type = 0x%08x\n",
-+ inbfd->filename, h ? h->root.root.string : "local",
-+ (unsigned) irel->r_offset, tls_type, eff_tls_type,
-+ org_tls_type);
-+#endif
-+ break;
-+ }
-+ break;
-+ default:
-+#ifdef DEBUG_VERBOSE
-+ printf (
-+ "SKIP: %s: %s @ 0x%08x tls_type = 0x%08x, eff_tls_type = 0x%08x, org_tls_type = 0x%08x\n",
-+ inbfd->filename, h ? h->root.root.string : "local",
-+ (unsigned) irel->r_offset, tls_type, eff_tls_type,
-+ org_tls_type);
-+#endif
-+ break;
-+ }
-+ }
-+ pNextSig = pNextSig->next_sibling;
-+ }
-+
-+#if 1
-+ pNext = pNext->next;
-+#else
-+ while (pNext)
-+ {
-+ if (pNext->id != cur_grp_id)
-+ break;
-+ pNext = pNext->next;
-+ }
-+#endif
-+ }
-+
-+finish:
-+ if (incontents)
-+ contents = NULL;
-+
-+ if (internal_relocs != NULL
-+ && elf_section_data (insec)->relocs != internal_relocs)
-+ free (internal_relocs);
-+
-+ if (contents != NULL
-+ && elf_section_data (insec)->this_hdr.contents != contents)
-+ free (contents);
-+
-+ if (local_syms != NULL && symtab_hdr->contents != (bfd_byte *) local_syms)
-+ free (local_syms);
-+
-+ if (chain.next)
-+ {
-+ pNext = chain.next;
-+ relax_group_list_t *pDel;
-+ while (pNext)
-+ {
-+ pDel = pNext;
-+ pNext = pNext->next;
-+ free (pDel);
-+ }
-+ }
-+
-+ return result;
-+
-+error_return:
-+ result = FALSE;
-+ goto finish;
-+}
-+
-+/* Initialize ifc hash table. */
-+
-+static int
-+nds32_elf_ifc_init (void)
-+{
-+ static bfd_boolean done = FALSE;
-+ if (done)
-+ return TRUE;
-+
-+ done = TRUE;
-+ if (!bfd_hash_table_init (&ifc_code_table, nds32_elf_ifc_code_hash_newfunc,
-+ sizeof (struct elf_nds32_ifc_code_hash_entry)))
-+ {
-+ (*_bfd_error_handler) (_("Ld error: cannot init ifc hash table\n"));
-+ return FALSE;
-+ }
-+ return TRUE;
-+}
-+
-+/* New a unit and insert ifc hash entry. */
-+
-+static void
-+nds32_elf_ifc_new_ifc_unit (struct elf_nds32_ifc_code_hash_entry *entry,
-+ struct elf_nds32_ifc_code_hash_entry *pre_entry,
-+ struct elf_nds32_ifc_member *child,
-+ struct elf_nds32_ifc_member *pre_child)
-+{
-+ struct elf_nds32_ifc_unit *ptr_unit, *temp_unit;
-+ struct elf_nds32_ifc_member *ptr_member;
-+
-+ if (!pre_entry || !pre_child)
-+ return;
-+
-+ /* Find unit in entry. */
-+ ptr_unit = pre_entry->unit;
-+ temp_unit = ptr_unit;
-+ while (ptr_unit && ptr_unit->hash != entry)
-+ {
-+ temp_unit = ptr_unit;
-+ ptr_unit = ptr_unit->next;
-+ }
-+ if (!ptr_unit)
-+ {
-+ ptr_unit = bfd_malloc (sizeof (struct elf_nds32_ifc_unit));
-+ if (!pre_entry->unit)
-+ pre_entry->unit = ptr_unit;
-+ else
-+ temp_unit->next = ptr_unit;
-+ ptr_unit->times = 0;
-+ ptr_unit->member = NULL;
-+ ptr_unit->hash = entry;
-+ ptr_unit->next = NULL;
-+ ptr_unit->entry_p = pre_entry;
-+ ptr_unit->done = 0;
-+ }
-+ pre_child->next_member = child;
-+ pre_child->unit_p = ptr_unit;
-+ ptr_unit->times++;
-+ if (!pre_entry->max_unit
-+ || pre_entry->max_unit->times < ptr_unit->times)
-+ pre_entry->max_unit = ptr_unit;
-+
-+ /* Insert member into unit. */
-+ ptr_member = ptr_unit->member;
-+ while (ptr_member && ptr_member->next)
-+ ptr_member = ptr_member->next;
-+
-+ if (!ptr_member)
-+ ptr_unit->member = pre_child;
-+ else
-+ ptr_member->next = pre_child;
-+}
-+
-+/* Insert the symbol and relocation barrier list. */
-+
-+static void
-+nds32_elf_ifc_insert_barrier (int offset,
-+ struct elf_nds32_ifc_barrier ** barrier)
-+{
-+ struct elf_nds32_ifc_barrier *new_barrier;
-+ struct elf_nds32_ifc_barrier *last_barrier;
-+
-+ /* The symbol is in this section. */
-+ new_barrier = malloc (sizeof (struct elf_nds32_ifc_barrier));
-+ new_barrier->offset = offset;
-+ new_barrier->next = NULL;
-+ if (*barrier == NULL)
-+ *barrier = new_barrier;
-+ else
-+ {
-+ if (new_barrier->offset < (*barrier)->offset)
-+ {
-+ new_barrier->next = *barrier;
-+ *barrier = new_barrier;
-+ }
-+ else
-+ {
-+ last_barrier = *barrier;
-+ while (last_barrier->next
-+ && last_barrier->next->offset < new_barrier->offset)
-+ last_barrier = last_barrier->next;
-+ new_barrier->next = last_barrier->next;
-+ last_barrier->next = new_barrier;
-+ }
-+ }
-+}
-+
-+/* Build barrier list. */
-+
-+static bfd_boolean
-+nds32_elf_ifc_build_barrier (bfd *abfd, asection *sec,
-+ struct elf_nds32_ifc_barrier **barrier)
-+{
-+ const struct elf_backend_data *bed = get_elf_backend_data (abfd);
-+ struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
-+ Elf_Internal_Shdr *hdr;
-+ bfd_size_type symcount;
-+ bfd_size_type extsymcount;
-+ struct bfd_link_hash_entry *bh;
-+ Elf_Internal_Rela *internal_relocs, *irelend, *irel;
-+ unsigned int sec_shndx;
-+ Elf_Internal_Shdr *symtab_hdr;
-+ Elf_Internal_Sym *isym = NULL;
-+ unsigned int i;
-+
-+ /* Scan global symbol. */
-+ if (sym_hashes)
-+ {
-+ if (!(abfd->flags & DYNAMIC) || elf_dynsymtab (abfd) == 0)
-+ hdr = &elf_tdata (abfd)->symtab_hdr;
-+ else
-+ return FALSE;
-+
-+ /* Check for the symbol existence. */
-+ symcount = hdr->sh_size / bed->s->sizeof_sym;
-+ extsymcount = symcount - hdr->sh_info;
-+ for (i = 0; i < extsymcount; i++)
-+ {
-+ bh = (struct bfd_link_hash_entry *) *(sym_hashes + i);
-+ if (bh->u.def.section == sec)
-+ nds32_elf_ifc_insert_barrier (bh->u.def.value, barrier);
-+ }
-+ }
-+
-+ /* Scan relocations to get the local target. */
-+ internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
-+ TRUE /* keep_memory */);
-+ irelend = internal_relocs + sec->reloc_count;
-+ sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
-+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
-+ if (!nds32_get_local_syms (abfd, sec, &isym))
-+ return FALSE;
-+
-+ for (i = 0; i < symtab_hdr->sh_info; i++)
-+ {
-+ if ((isym + i)->st_value > 0
-+ && (isym + i)->st_shndx == sec_shndx
-+ && (isym + i)->st_value <= sec->size
-+ && ELF32_ST_TYPE ((isym + i)->st_info) == STT_FUNC)
-+ {
-+ nds32_elf_ifc_insert_barrier ((isym + i)->st_value, barrier);
-+ }
-+ }
-+
-+ for (irel = internal_relocs; irel < irelend; irel++)
-+ {
-+ if (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
-+ && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
-+ && ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
-+ && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
-+ {
-+ /* FIXME: DIFFxx relcoations have to be do something more. */
-+ nds32_elf_ifc_insert_barrier (irel->r_addend, barrier);
-+ }
-+ }
-+ return TRUE;
-+}
-+
-+/* Trace all section and build the instruction list. */
-+/* We collect all instruction here, and put each same insntruction in
-+ the same hash entry. Each entry has to save all appearance section
-+ and offset. */
-+
-+static bfd_boolean
-+nds32_elf_ifc_trace_code (struct bfd_link_info *link_info,
-+ bfd *abfd, asection *sec)
-+{
-+ Elf_Internal_Rela *internal_relocs, *irelend, *irel;
-+ bfd_byte *contents = NULL;
-+ unsigned int off = 0, insn_size;
-+ unsigned long insn;
-+ struct elf_nds32_ifc_code_hash_entry *entry, *pre_entry;
-+ struct elf_nds32_ifc_member *pre_child, *child;
-+ struct elf_nds32_ifc_sec_block *block;
-+ struct elf_nds32_ifc_sec_member *smember, *cur_smember;;
-+ char code[20];
-+ struct elf_nds32_ifc_barrier *barrier = NULL, *ptr_barrier;
-+ bfd_boolean ignore, end;
-+ struct elf_link_hash_entry **sym_hashes;
-+ unsigned long r_symndx;
-+ Elf_Internal_Shdr *symtab_hdr;
-+ struct elf_link_hash_entry *h;
-+ Elf_Internal_Sym *isymbuf = NULL;
-+
-+ pre_entry = NULL;
-+ pre_child = NULL;
-+ internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
-+ TRUE /* keep_memory */);
-+ irelend = internal_relocs + sec->reloc_count;
-+
-+ /* Check the object if enable ifc. */
-+ irel = find_relocs_at_address (internal_relocs, internal_relocs, irelend,
-+ R_NDS32_RELAX_ENTRY);
-+
-+ /* Check this section trigger ifc relaxation. */
-+ if (irel == NULL
-+ || irel >= irelend
-+ || ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
-+ || (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY
-+ && !(irel->r_addend & R_NDS32_RELAX_ENTRY_IFC_FLAG)))
-+ return TRUE;
-+
-+ if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
-+ return FALSE;
-+
-+ elf_section_data (sec)->relocs = internal_relocs;
-+ sym_hashes = elf_sym_hashes (abfd);
-+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
-+ nds32_get_local_syms (abfd, sec, &isymbuf);
-+ /* Backup header size and restore it after relocation because ifc
-+ optimization may modify this value. */
-+ elf_nds32_tdata (abfd)->hdr_size = symtab_hdr->sh_size;
-+
-+ /* Build barrier list. If there is any label or target in somewhere,
-+ this instruction can not be delete. It has to traverse global symbol
-+ hash table and relocations to get all possible label. */
-+ nds32_elf_ifc_build_barrier (abfd, sec, &barrier);
-+
-+ /* Start to traverse content. */
-+ irel = internal_relocs;
-+ ptr_barrier = barrier;
-+
-+ block = malloc (sizeof (struct elf_nds32_ifc_sec_block));
-+ block->sec = sec;
-+ block->smember = NULL;
-+ block->next = ifc_block_head;
-+ ifc_block_head = block;
-+ cur_smember = NULL;
-+
-+ while (off < sec->size)
-+ {
-+ h = NULL;
-+ ignore = FALSE;
-+ end = FALSE;
-+
-+ while (irel != NULL && irel < irelend && irel->r_offset < off)
-+ irel++;
-+ while (ptr_barrier && ptr_barrier->offset < off)
-+ ptr_barrier = ptr_barrier->next;
-+
-+ /* Get binary code. */
-+ if (*(contents + off) & 0x80)
-+ {
-+ /* 16-bit instuction. */
-+ insn = bfd_getb16 (contents + off);
-+ snprintf (code, sizeof (code), "%04lx", insn);
-+ insn_size = 2;
-+
-+ /* Clean insntruction regiter for jr5 and jral5. */
-+ switch (insn & 0xff00)
-+ {
-+ /* Because there is no relocation for jr5 and jral5 in case
-+ longjump and longcall, it has to ignore it for ifc. */
-+ /* jr5 ret5 jral5 add5.pc ex9.it. */
-+ case INSN_JR5:
-+ ignore = TRUE;
-+ break;
-+ default:
-+ break;
-+ }
-+ }
-+ else
-+ {
-+ /* 32-bit instuction. */
-+ insn = bfd_getb32 (contents + off);
-+ snprintf (code, sizeof (code), "%08lx", insn);
-+ insn_size = 4;
-+ switch (N32_OP6 (insn))
-+ {
-+ case N32_OP6_JREG:
-+ /* jr and jral. */
-+ ignore = TRUE;
-+ break;
-+ case N32_OP6_MISC:
-+ if (N32_SUB5 (insn) == N32_MISC_MTSR
-+ || N32_SUB5 (insn) == N32_MISC_MFSR)
-+ ignore = TRUE;
-+ break;
-+ case N32_OP6_ALU2:
-+ if (N32_SUB6 (insn) == N32_ALU2_MTUSR
-+ || N32_SUB6 (insn) == N32_ALU2_MFUSR)
-+ ignore = TRUE;
-+ break;
-+ default:
-+ break;
-+ }
-+ }
-+
-+ /* Check the IFC ignored region. */
-+ if (irel && irel < irelend
-+ && nds32_elf_ifc_check_region (&irel, irelend, link_info))
-+ {
-+ if (irel == NULL || irel >= irelend)
-+ return TRUE;
-+ off = irel->r_offset;
-+ off += ((*(contents + off) & 0x80) != 0 ? 2 : 4);
-+ pre_entry = NULL;
-+ pre_child = NULL;
-+ continue;
-+ }
-+ /* Ignore instruction with relocation. */
-+ /* It can add instruction with relocation to ifc in the future.
-+ I think only the global target can do. We may try to compare
-+ post and link ifc to know what kinds of relocation are most needed
-+ being done first. */
-+ else if (ignore == TRUE)
-+ {
-+ /* Set a new basic block. */
-+ off += insn_size;
-+ pre_entry = NULL;
-+ pre_child = NULL;
-+ continue;
-+ }
-+ else if (irel < irelend && irel->r_offset == off
-+ && (ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
-+ || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0)
-+ || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA15S3_RELA
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA15S0_RELA)
-+ || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA12S2_DP_RELA
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA12S2_SP_RELA)
-+ || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_SDA16S3_RELA
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_SDA19S0_RELA)))
-+ {
-+ r_symndx = ELF32_R_SYM (irel->r_info);
-+ if (r_symndx < symtab_hdr->sh_info)
-+ {
-+ /* Ignore local symbol, so set a new basic block. */
-+ off += insn_size;
-+ pre_entry = NULL;
-+ pre_child = NULL;
-+ continue;
-+ }
-+ else
-+ {
-+ /* Global jump target, keep going. */
-+ bfd_boolean warned ATTRIBUTE_UNUSED;
-+ bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
-+ bfd_vma relocation;
-+ asection *sym_sec;
-+
-+ RELOC_FOR_GLOBAL_SYMBOL (link_info, abfd, sec, irel,
-+ r_symndx, symtab_hdr, sym_hashes,
-+ h, sym_sec, relocation,
-+ unresolved_reloc, warned);
-+ relocation += irel->r_addend;
-+ /* J and JAL has to shift one bit. Here, we use absolute addresss
-+ to build hash entry. */
-+ snprintf (code, sizeof (code), "%08lx%08lx", relocation, insn);
-+ }
-+
-+ if ((ELF32_R_TYPE (irel->r_info) == R_NDS32_25_PCREL_RELA
-+ && (insn == INSN_JAL || insn == INSN_J)))
-+ end = TRUE;
-+ }
-+ else if (irel < irelend && irel->r_offset == off
-+ && ELF32_R_TYPE (irel->r_info) >= R_NDS32_9_PCREL_RELA
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_17_PCREL_RELA)
-+ {
-+ r_symndx = ELF32_R_SYM (irel->r_info);
-+ if (r_symndx < symtab_hdr->sh_info)
-+ {
-+ /* Local symbol. */
-+ bfd_vma relocation;
-+ int shndx = isymbuf[r_symndx].st_shndx;
-+
-+ bfd_vma st_value = (isymbuf + r_symndx)->st_value;
-+ asection *isec = elf_elfsections (abfd)[shndx]->bfd_section;
-+ relocation = isec->output_section->vma + isec->output_offset
-+ + st_value + irel->r_addend;
-+ snprintf (code, sizeof (code), "%08lx%08lx", relocation,
-+ (insn_size == 4) ? insn : insn << 16);
-+ }
-+ else
-+ {
-+ /* Ignore global condition branch target. */
-+ off += insn_size;
-+ pre_entry = NULL;
-+ pre_child = NULL;
-+ continue;
-+ }
-+
-+ if (ELF32_R_TYPE (irel->r_info) == R_NDS32_9_PCREL_RELA
-+ && (insn == INSN_J8))
-+ end = TRUE;
-+ }
-+ else if (irel < irelend && irel->r_offset == off)
-+ {
-+ while (irel < irelend && irel->r_offset == off)
-+ {
-+ switch (ELF32_R_TYPE (irel->r_info))
-+ {
-+ case R_NDS32_32_RELA:
-+ /* Data. */
-+ insn_size = 4;
-+ break;
-+ case R_NDS32_16_RELA:
-+ /* Data. */
-+ insn_size = 2;
-+ break;
-+ case R_NDS32_DATA:
-+ /* Data. */
-+ /* The least code alignment is 2. If the data is only one byte,
-+ we have to shift one more byte. */
-+ if (irel->r_addend == 1)
-+ insn_size = 2;
-+ else
-+ insn_size = irel->r_addend;
-+ break;
-+ default:
-+ break;
-+ }
-+ irel++;
-+ }
-+ /* Set a new basic block. */
-+ off += insn_size;
-+ pre_entry = NULL;
-+ pre_child = NULL;
-+ continue;
-+ }
-+
-+ if (ptr_barrier && ptr_barrier->offset == off)
-+ {
-+ /* If there is symbol at the instruction, this one only can be the
-+ begining of basic block. We have to promise there is no jump
-+ target or label in the common block, because if the block be
-+ converted ifcall the label will disapear. */
-+ pre_entry = NULL;
-+ pre_child = NULL;
-+ }
-+
-+ off += insn_size;
-+ /* Hash and copy "code". */
-+ entry = (struct elf_nds32_ifc_code_hash_entry *)
-+ bfd_hash_lookup (&ifc_code_table, code, TRUE, TRUE);
-+ if (entry == NULL)
-+ {
-+ (*_bfd_error_handler)
-+ (_("%P%F: failed creating ifc %s hash table: %E\n"), code);
-+ return FALSE;
-+ }
-+
-+ entry->size = insn_size;
-+
-+ /* It is hard to do ifc, when the sequence instructions are the same. */
-+ if (entry == pre_entry
-+ || (h && entry->h && entry->h != h))
-+ {
-+ pre_entry = NULL;
-+ pre_child = NULL;
-+ continue;
-+ }
-+
-+ entry->times++;
-+ entry->h = h;
-+ entry->end = end;
-+
-+ /* Build list between current and previous instruction.
-+ First round: generate entry A and member B. */
-+ /* List: code_hash_entry->unit->member.
-+ Example: ABCAB
-+ 12345
-+ {entry} [unit] (member)
-+ {A} -> [B] -> (1) -> (4) */
-+
-+ child = bfd_malloc (sizeof (struct elf_nds32_ifc_member));
-+ child->offset = off;
-+ child->sec = sec;
-+ /* For B member, its pre_entry is null.
-+ For C member, its pre_entry is A. */
-+ child->pre_entry = pre_entry;
-+ child->unit_p = NULL;
-+ child->next = NULL;
-+ child->next_member = NULL;
-+ child->pre_member = pre_child;
-+ child->dead = FALSE;
-+ child->bh = NULL;
-+
-+ /* Build section instruction list to adjust offset
-+ when increasing or decreasing later. */
-+ smember = malloc (sizeof (struct elf_nds32_ifc_sec_member)) ;
-+ smember->member = child;
-+ smember->next = NULL;
-+ if (!cur_smember)
-+ {
-+ block->smember = smember;
-+ cur_smember = smember;
-+ }
-+ else
-+ {
-+ cur_smember->next = smember;
-+ cur_smember = smember;
-+ }
-+
-+ nds32_elf_ifc_new_ifc_unit (entry, pre_entry, child, pre_child);
-+ if (end)
-+ {
-+ pre_child = NULL;
-+ pre_entry = NULL;
-+ }
-+ else
-+ {
-+ pre_child = child;
-+ pre_entry = entry;
-+ }
-+ }
-+ return TRUE;
-+}
-+
-+/* Insert the entry in sort by its times. */
-+
-+static void
-+nds32_elf_ifc_order_insn_times (struct elf_nds32_ifc_code_hash_entry *entry)
-+{
-+ struct elf_nds32_ifc_code_hash_entry *ptr = ifc_insn_head;
-+
-+ /* First entry. */
-+ if (!ifc_insn_head)
-+ ifc_insn_head = entry;
-+ else if (!entry->max_unit)
-+ {
-+ /* There is no max_unit in current list. */
-+ while (ptr->next)
-+ ptr = ptr->next;
-+ entry->next = ptr->next;
-+ ptr->next = entry;
-+ }
-+ else
-+ {
-+ entry->max_times = entry->max_unit->times;
-+ if (!ptr->max_unit
-+ || ptr->max_unit->times < entry->max_unit->times)
-+ {
-+ /* The new one is the bigest one. */
-+ entry->next = ptr;
-+ ifc_insn_head = entry;
-+ return;
-+ }
-+ while (ptr->next && ptr->next->unit
-+ && ptr->next->unit->times > entry->unit->times)
-+ ptr = ptr->next;
-+ entry->next = ptr->next;
-+ ptr->next = entry;
-+ }
-+}
-+
-+/* IFC hash table traverse function. */
-+
-+static void
-+nds32_elf_ifc_code_hash_traverse (void (*func) (struct elf_nds32_ifc_code_hash_entry*))
-+{
-+ unsigned int i;
-+
-+ ifc_code_table.frozen = 1;
-+ for (i = 0; i < ifc_code_table.size; i++)
-+ {
-+ struct bfd_hash_entry *p;
-+
-+ for (p = ifc_code_table.table[i]; p != NULL; p = p->next)
-+ func ((struct elf_nds32_ifc_code_hash_entry *) p);
-+ }
-+ ifc_code_table.frozen = 0;
-+}
-+
-+/* Push common subexpression. */
-+
-+static void
-+nds32_elf_ifc_push_stack (struct elf_nds32_ifc_insn_stack **stack,
-+ struct elf_nds32_ifc_unit *unit)
-+{
-+ struct elf_nds32_ifc_member *member;
-+ struct elf_nds32_ifc_insn_stack *ptr;
-+ struct elf_nds32_ifc_insn_member *imember, *ptr_imember;
-+
-+ /* Get the first member in the same unit. */
-+ member = unit->member->unit_p->member;
-+
-+ if (!*stack)
-+ {
-+ /* The first instruction in common subexpression. */
-+ while (member)
-+ {
-+ /* The newest one stack is as the head. */
-+ if (!member->dead)
-+ {
-+ ptr = bfd_malloc (sizeof (struct elf_nds32_ifc_insn_stack));
-+ imember = bfd_malloc (sizeof (struct elf_nds32_ifc_insn_member));
-+ imember->member = member;
-+ imember->next = NULL;
-+ ptr->imember = imember;
-+ ptr->next = *stack;
-+ ptr->live = 1;
-+ ptr->extend = 0;
-+ *stack = ptr;
-+ }
-+ member = member->next;
-+ }
-+ }
-+ else
-+ {
-+ /* Initial stack state, because we have to trigger them after
-+ matching new member. */
-+ ptr = *stack;
-+ while (ptr)
-+ {
-+ ptr->choose = ptr->live;
-+ ptr->live = 0;
-+ ptr = ptr->next;
-+ }
-+
-+ while (member)
-+ {
-+ /* Find the same common subexpression stack and push. */
-+ ptr = *stack;
-+ while (!member->dead && ptr)
-+ {
-+ if (ptr->live == 0 && ptr->choose == 1)
-+ {
-+ ptr_imember = ptr->imember;
-+ /* Go to the final imember. */
-+ while (ptr_imember && ptr_imember->next)
-+ ptr_imember = ptr_imember->next;
-+
-+ if (ptr_imember->member->next_member == member)
-+ {
-+ /* When the final member next one match the new member,
-+ insert it into list. */
-+ imember = bfd_malloc (sizeof (struct elf_nds32_ifc_insn_member));
-+ imember->member = member;
-+ imember->next = NULL;
-+ ptr->live = 1;
-+ ptr_imember->next = imember;
-+ break;
-+ }
-+ }
-+ ptr = ptr->next;
-+ }
-+ member = member->next;
-+ }
-+ }
-+}
-+
-+/* Pop common subexpression. */
-+
-+static void
-+nds32_elf_ifc_pop_stack (struct elf_nds32_ifc_insn_stack **stack,
-+ struct elf_nds32_ifc_unit *unit)
-+{
-+ if (!*stack)
-+ return;
-+
-+ struct elf_nds32_ifc_insn_stack *ptr;
-+ struct elf_nds32_ifc_insn_member *imember, *temp_member;
-+ struct elf_nds32_ifc_member *member;
-+
-+ ptr = *stack;
-+ while (ptr)
-+ {
-+ ptr->live = 0;
-+ ptr = ptr->next;
-+ }
-+
-+ ptr = *stack;
-+ while (ptr)
-+ {
-+ /* Get the first member in the same unit. */
-+ member = unit->member->unit_p->member;
-+ while (member)
-+ {
-+ imember = ptr->imember;
-+ while (imember)
-+ {
-+ if (imember->member == member)
-+ {
-+ ptr->live = 1;
-+ temp_member = imember->next;
-+ imember->next = NULL;
-+ imember = temp_member;
-+ break;
-+ }
-+ imember = imember->next;
-+ }
-+ while (imember)
-+ {
-+ temp_member = imember;
-+ imember = imember->next;
-+ free (temp_member);
-+ }
-+ if (ptr->live)
-+ break;
-+ member = member->next;
-+ }
-+ ptr = ptr->next;
-+ }
-+}
-+
-+/* Find the common down. */
-+
-+static int
-+nds32_elf_ifc_find_cse_recur (struct elf_nds32_ifc_unit *ptr,
-+ struct elf_nds32_ifc_insn_stack **stack,
-+ int total)
-+{
-+ struct elf_nds32_ifc_member *member = ptr->member;
-+ struct elf_nds32_ifc_unit *unit_head, *unit_current, *unit_pre = NULL;
-+ struct elf_nds32_ifc_insn_stack *stack_ptr;
-+ struct elf_nds32_ifc_insn_member *imember;
-+ unit_head = NULL;
-+ int gain, gc_size;
-+ int abandon;
-+
-+ /* Push current member into stack. */
-+ nds32_elf_ifc_push_stack (stack, ptr);
-+
-+ if (!*stack)
-+ return 0;
-+
-+ /* The instruction will close ifc state. */
-+ if (ptr->hash->end)
-+ return ptr->times * ptr->hash->size;
-+
-+ /* Find the unit its max next instruction. */
-+ stack_ptr = *stack;
-+ while (stack_ptr)
-+ {
-+ if (stack_ptr->live)
-+ {
-+ /* Get the final instruction. */
-+ imember = stack_ptr->imember;
-+ while (imember->next)
-+ imember = imember->next;
-+ member = imember->member;
-+ if (!member->next_member->dead)
-+ {
-+ unit_current = unit_head;
-+ while (unit_current)
-+ {
-+ /* Check if the hash entry exist. */
-+ unit_pre = unit_current;
-+ if (member->next_member->unit_p
-+ && member->next_member->unit_p->hash
-+ == unit_current->hash
-+ && (!unit_current->hash->h
-+ || unit_current->hash->h
-+ == member->next_member->unit_p->hash->h))
-+ {
-+ unit_current->times++;
-+ break;
-+ }
-+ unit_current = unit_current->next;
-+ }
-+ /* New a unit group. */
-+ if (member->next_member->unit_p
-+ && !member->next_member->unit_p->hash->round
-+ && !unit_current)
-+ {
-+ unit_current = bfd_malloc (sizeof (struct elf_nds32_ifc_unit));
-+ unit_current->hash = member->next_member->unit_p->hash;
-+ unit_current->times = 1;
-+ unit_current->next = NULL;
-+ unit_current->member = member->next_member;
-+ unit_current->entry_p = member->next_member->unit_p->entry_p;
-+ if (!unit_head)
-+ unit_head = unit_current;
-+ else
-+ unit_pre->next = unit_current;
-+ }
-+ }
-+ }
-+ stack_ptr = stack_ptr->next;
-+ }
-+
-+ /* Find the max next instruction unit. */
-+ unit_current = unit_head;
-+ unit_pre = unit_head;
-+ while (unit_current)
-+ {
-+ if (unit_current->times > unit_pre->times)
-+ unit_pre = unit_current;
-+ unit_current = unit_current->next;
-+ }
-+
-+ if (!unit_pre || unit_pre->times < 2)
-+ {
-+ unit_current = unit_head;
-+ while (unit_current)
-+ {
-+ unit_current = unit_current->next;
-+ free (unit_head);
-+ unit_head = unit_current;
-+ }
-+ return ptr->times * ptr->hash->size;
-+ }
-+
-+ /* Total code size and abandoned unit size. */
-+ total = total + ptr->hash->size;
-+ abandon = unit_pre->times;
-+ gc_size = total * (ptr->times - abandon);
-+
-+ /* It have to estimate the longer common subexpression is profit.
-+ Example: ABC ABC ABD.
-+ We have to calculate ABC or AB is profit. */
-+
-+ ptr->hash->round = 1;
-+ gain = nds32_elf_ifc_find_cse_recur (unit_pre, stack, total);
-+ ptr->hash->round = 0;
-+
-+ /* Free memory. */
-+ unit_current = unit_head;
-+ while (unit_current)
-+ {
-+ unit_current = unit_current->next;
-+ free (unit_head);
-+ unit_head = unit_current;
-+ }
-+
-+ if (gain > gc_size
-+ || gain == 0)
-+ {
-+ /* Return total gain if adapt this edge. */
-+ return (ptr->times - abandon) * ptr->hash->size + gain;
-+ }
-+ else
-+ {
-+ /* It is not more benifit to link deeper, and pop it. */
-+ nds32_elf_ifc_pop_stack (stack, ptr);
-+ return 0;
-+ }
-+}
-+
-+/* Reallocate section contents. */
-+
-+static void
-+nds32_elf_ifc_reallocate_contents (asection *sec, int modify,
-+ bfd_byte **contents)
-+{
-+ /* This function is highly dangerous, but I have to implement it. */
-+ sec->size += modify;
-+ bfd_byte *p = bfd_malloc (sec->size * sizeof (bfd_byte));
-+ memset (p, 0, sec->size * sizeof (bfd_byte));
-+ memcpy (p, *contents, sec->size - modify);
-+ free (*contents);
-+ *contents = p;
-+ elf_section_data (sec)->this_hdr.contents = p;
-+}
-+
-+/* Insert a symbol in symbol table. */
-+
-+static int
-+nds32_elf_ifc_insert_sym_hash (bfd *abfd,
-+ struct bfd_link_hash_entry *bh)
-+{
-+ const struct elf_backend_data *bed = get_elf_backend_data (abfd);
-+ struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (abfd);
-+ struct elf_link_hash_entry **sym_hash;
-+ bfd_size_type amt;
-+ Elf_Internal_Shdr *hdr;
-+ bfd_size_type symcount;
-+ bfd_size_type extsymcount;
-+ bfd_size_type i;
-+
-+ /* No symbol hash exsitence. */
-+ if (!sym_hashes)
-+ return -1;
-+
-+ if (!(abfd->flags & DYNAMIC) || elf_dynsymtab (abfd) == 0)
-+ hdr = &elf_tdata (abfd)->symtab_hdr;
-+ else
-+ return -1;
-+
-+ /* Check for the symbol existance. */
-+ symcount = hdr->sh_size / bed->s->sizeof_sym;
-+ extsymcount = symcount - hdr->sh_info;
-+ for (i = 0; i < extsymcount; i++)
-+ {
-+ if ((struct bfd_link_hash_entry *) *(sym_hashes + i) == bh)
-+ return i + hdr->sh_info;
-+ }
-+
-+ /* Add one more entry. */
-+ hdr->sh_size += bed->s->sizeof_sym;
-+
-+ symcount = hdr->sh_size / bed->s->sizeof_sym;
-+ if (elf_bad_symtab (abfd))
-+ extsymcount = symcount;
-+ else
-+ extsymcount = symcount - hdr->sh_info;
-+
-+ sym_hash = NULL;
-+ if (extsymcount != 0)
-+ {
-+ /* We store a pointer to the hash table entry for each external
-+ symbol. */
-+ amt = extsymcount * sizeof (struct elf_link_hash_entry *);
-+ sym_hash = bfd_malloc (amt);
-+ memset (sym_hash, 0, amt);
-+ if (sym_hash == NULL)
-+ return -1;
-+ memcpy (sym_hash, sym_hashes,
-+ amt - sizeof (struct elf_link_hash_entry *));
-+ memcpy (sym_hash + extsymcount -1, &bh,
-+ sizeof (struct elf_link_hash_entry *));
-+ elf_sym_hashes (abfd) = sym_hash;
-+ /* TODO: Since sym_hashes is allocated by bfd_zalloc, it can not
-+ be free directly. We have to record the memory allocated by
-+ ourselves and free it. */
-+ return (symcount - 1);
-+ }
-+ else
-+ return -1;
-+}
-+
-+/* Insert relocation. */
-+
-+static void
-+nds32_elf_ifc_insert_relocation (struct bfd_link_info *info,
-+ bfd *abfd, asection *sec,
-+ struct bfd_link_hash_entry *bh,
-+ bfd_vma offset,
-+ bfd_boolean align,
-+ bfd_vma clean_off)
-+{
-+ /* Insert a new relocation into section rela, and this is very force
-+ implementation. It may cause unknown problem. */
-+
-+ Elf_Internal_Rela *relocs, *internal_relocs, *irelend;
-+ long unsigned int size, extsymcount;
-+ const struct elf_backend_data *bed = get_elf_backend_data (abfd);
-+ unsigned int count = 0;
-+ int num = 2;
-+
-+ /* If the reduction size is not 4 bytes aligment, it has to insert
-+ one more relocation. */
-+ if (!align)
-+ num = 3;
-+
-+ /* Insert the jump target in symbol hash. */
-+ extsymcount = nds32_elf_ifc_insert_sym_hash (abfd, bh);
-+ if (extsymcount <= 0)
-+ return;
-+
-+ internal_relocs = _bfd_elf_link_read_relocs (abfd, sec,
-+ NULL, NULL, FALSE);
-+ irelend = internal_relocs + sec->reloc_count;
-+
-+ /* The common block including relocation, it has to been cleaned. */
-+ relocs = internal_relocs;
-+ while (relocs && relocs < irelend)
-+ {
-+ if (relocs->r_offset >= offset && relocs->r_offset <= clean_off)
-+ relocs->r_info = ELF32_R_INFO (ELF32_R_SYM (relocs->r_info),
-+ R_NDS32_NONE);
-+ relocs++;
-+ }
-+
-+ /* We have to insert two relocations; one for ifc and
-+ another is for alignment.*/
-+ sec->reloc_count += num;
-+ size = sec->reloc_count;
-+ size *= bed->s->int_rels_per_ext_rel * sizeof (Elf_Internal_Rela);
-+ relocs = (Elf_Internal_Rela *) bfd_malloc (size);
-+ memset (relocs, 0, size);
-+ elf_section_data (sec)->relocs = relocs;
-+ while ((internal_relocs + count) < irelend
-+ && (internal_relocs + count)->r_offset <= offset)
-+ count++;
-+
-+ /* Copy the front part where the offset is smaller. */
-+ memcpy (relocs, internal_relocs,
-+ (bed->s->int_rels_per_ext_rel * sizeof (Elf_Internal_Rela) * count));
-+
-+ /* Insert new relocations. */
-+ irelend = relocs + count;
-+ /* Set relocation. */
-+ irelend->r_offset = offset;
-+ irelend->r_info =
-+ ELF32_R_INFO (extsymcount, R_NDS32_17IFC_PCREL_RELA);
-+ irelend->r_addend = 0;
-+
-+ irelend++;
-+ /* Set relocation. */
-+ irelend->r_offset = offset;
-+ irelend->r_info = ELF32_R_INFO (0, R_NDS32_INSN16);
-+ irelend->r_addend = 0;
-+
-+ /* One more relocation for alignment. */
-+ if (!align)
-+ {
-+ irelend++;
-+ irelend->r_offset = offset + 4;
-+ irelend->r_info = ELF32_R_INFO (0, R_NDS32_INSN16);
-+ irelend->r_addend = 1;
-+ /* Put offset. */
-+ }
-+
-+ /* Copy the rest part. */
-+ irelend++;
-+ memcpy (irelend, internal_relocs + count,
-+ size - (bed->s->int_rels_per_ext_rel *
-+ sizeof (Elf_Internal_Rela) * (count + num)));
-+ if (!info->keep_memory)
-+ free (internal_relocs);
-+}
-+
-+/* Adjust insntruction map offset. Variable "adjust" is recorded the size
-+ after relaxing. */
-+
-+static void
-+nds32_elf_ifc_adjust_block (asection *sec, bfd_vma offset, int size, int adjust)
-+{
-+ struct elf_nds32_ifc_sec_block *block;
-+ struct elf_nds32_ifc_sec_member *smember;
-+
-+ block = ifc_block_head;
-+ while (block->sec != sec)
-+ block = block->next;
-+
-+ smember = block->smember;
-+ while (smember->member->offset < offset)
-+ smember = smember->next;
-+
-+ while (size < 0
-+ && smember
-+ && smember->member->offset < offset - size + adjust)
-+ {
-+ /* The offset result may smaller than zero, so we set its value as the
-+ ifcall. */
-+ smember->member->offset = offset;
-+ smember = smember->next;
-+ }
-+ while (smember)
-+ {
-+ smember->member->offset += size;
-+ smember = smember->next;
-+ }
-+}
-+
-+/* Adjust relocation and symbol. */
-+
-+static void
-+nds32_elf_ifc_enlarge (bfd *abfd, asection *sec, bfd_vma off, int size)
-+{
-+ unsigned int sec_shndx; /* The section the be relaxed. */
-+ Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
-+ Elf_Internal_Sym *isym; /* Symbol table of this bfd. */
-+ Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
-+ Elf_Internal_Rela *internal_relocs;
-+ Elf_Internal_Rela *irel;
-+ Elf_Internal_Rela *irelend;
-+ unsigned int symcount;
-+ struct elf_link_hash_entry **sym_hashes;
-+ struct elf_link_hash_entry **end_hashes;
-+ asection *sect;
-+ bfd_byte *contents;
-+
-+ sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
-+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
-+ isym = (Elf_Internal_Sym *) symtab_hdr->contents;
-+ if (isym == NULL)
-+ {
-+ isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
-+ symtab_hdr->sh_info, 0, NULL, NULL, NULL);
-+ symtab_hdr->contents = (bfd_byte *) isym;
-+ }
-+
-+ if (isym == NULL || symtab_hdr->sh_info == 0)
-+ return;
-+
-+ for (sect = abfd->sections; sect != NULL; sect = sect->next)
-+ {
-+ /* Adjust all the relocs. */
-+
-+ if ((sect->flags & SEC_RELOC) == 0)
-+ continue;
-+
-+ /* Relocations MUST be kept in memory, because relaxation adjust them. */
-+ internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
-+ TRUE /* keep_memory */);
-+ irelend = internal_relocs + sect->reloc_count;
-+
-+ if (!nds32_get_section_contents (abfd, sect, &contents, TRUE))
-+ continue;
-+
-+ for (irel = internal_relocs; irel < irelend; irel++)
-+ {
-+ if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
-+ && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
-+ && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
-+ {
-+ unsigned long val, mask;
-+
-+ switch (ELF32_R_TYPE (irel->r_info))
-+ {
-+ case R_NDS32_DIFF8:
-+ val = bfd_get_8 (abfd, contents + irel->r_offset);
-+ break;
-+ case R_NDS32_DIFF16:
-+ val = bfd_get_16 (abfd, contents + irel->r_offset);
-+ break;
-+ case R_NDS32_DIFF32:
-+ val = bfd_get_32 (abfd, contents + irel->r_offset);
-+ mask = 0 - (val >> 31);
-+ if (mask)
-+ val = (val | (mask - 0xffffffff));
-+ break;
-+ default:
-+ BFD_ASSERT (0);
-+ }
-+
-+ if ((off > irel->r_addend && off <= irel->r_addend + val)
-+ || (off <= irel->r_addend && off > irel->r_addend + val))
-+ {
-+ /* The offset is incresed. */
-+ switch (ELF32_R_TYPE (irel->r_info))
-+ {
-+ /* It may overflow. */
-+ case R_NDS32_DIFF8:
-+ bfd_put_8 (abfd, val + size, contents + irel->r_offset);
-+ break;
-+ case R_NDS32_DIFF16:
-+ bfd_put_16 (abfd, val + size, contents + irel->r_offset);
-+ break;
-+ case R_NDS32_DIFF32:
-+ bfd_put_32 (abfd, val + size, contents + irel->r_offset);
-+ break;
-+ }
-+ }
-+ }
-+ else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
-+ && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
-+ {
-+ bfd_vma val = 0;
-+ unsigned int len = 0;
-+ bfd_byte *endp, *p;
-+
-+ val = read_unsigned_leb128 (abfd, contents + irel->r_offset, &len);
-+
-+ if (off >= irel->r_addend
-+ && off < irel->r_addend + val)
-+ {
-+ /* The offset is incresed. */
-+ p = contents + irel->r_offset;
-+ endp = p + len -1;
-+ memset (p, 0x80, len);
-+ *(endp) = 0;
-+ /* It may overflow. */
-+ p = write_uleb128 (p, val + size) - 1;
-+ if (p < endp)
-+ *p |= 0x80;
-+ }
-+ }
-+
-+ if (sec == sect)
-+ {
-+ if (irel->r_offset >= off)
-+ irel->r_offset += size;
-+ }
-+
-+ if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
-+ || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
-+ continue;
-+
-+ if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
-+ && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
-+ && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
-+ {
-+ if (irel->r_addend <= sec->size
-+ && irel->r_addend >= off)
-+ irel->r_addend += size;
-+ }
-+ }
-+ }
-+
-+ /* Adjust the local symbols defined in this section. */
-+ for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
-+ {
-+ if (isym->st_shndx == sec_shndx)
-+ {
-+ if (isym->st_value <= sec->size)
-+ {
-+ if (isym->st_value >= off)
-+ isym->st_value += size;
-+ /* Adjust function size. */
-+ else if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC && isym->st_size > 0
-+ && (isym->st_value + isym->st_size) >= off)
-+ isym->st_size += size;
-+ }
-+ }
-+ }
-+ /* Now adjust the global symbols defined in this section. */
-+ symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
-+ - symtab_hdr->sh_info);
-+ sym_hashes = elf_sym_hashes (abfd);
-+ end_hashes = sym_hashes + symcount;
-+ for (; sym_hashes < end_hashes; sym_hashes++)
-+ {
-+ struct elf_link_hash_entry *sym_hash = *sym_hashes;
-+
-+ if ((sym_hash->root.type == bfd_link_hash_defined
-+ || sym_hash->root.type == bfd_link_hash_defweak)
-+ && sym_hash->root.u.def.section == sec)
-+ {
-+ if (sym_hash->root.u.def.value <= sec->size)
-+ {
-+ if (sym_hash->root.u.def.value >= off)
-+ sym_hash->root.u.def.value += size;
-+
-+ /* Adjust function size. */
-+ else if (sym_hash->type == STT_FUNC
-+ && (sym_hash->root.u.def.value + sym_hash->size) >= off)
-+ sym_hash->size += size;
-+
-+ }
-+ }
-+ }
-+ nds32_elf_ifc_adjust_block (sec, off, size, 0);
-+}
-+
-+/* Check distance between branch become farer if it
-+ cause relocation overfolw. */
-+
-+static bfd_boolean
-+nds32_elf_ifc_check_overflow (struct elf_nds32_ifc_insn_stack *ptr)
-+{
-+ struct elf_nds32_ifc_insn_member *imember;
-+ struct elf_nds32_ifc_member *member;
-+ asection *sec;
-+ bfd_vma offset;
-+ Elf_Internal_Rela *irel, *internal_relocs, *irelend;
-+ unsigned int sec_shndx;
-+ bfd *abfd;
-+ Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
-+ Elf_Internal_Shdr *symtab_hdr;
-+
-+ /* Get the common block final instruction address. */
-+ imember = ptr->imember;
-+ while (imember->next)
-+ imember = imember->next;
-+ member = imember->member;
-+ /* Add the final instruction and its instruction size to get
-+ the address inserted the ifret16. */
-+ offset = member->offset + member->unit_p->hash->size;
-+
-+ sec = member->sec;
-+ abfd = sec->owner;
-+ sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
-+
-+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
-+
-+ if (!nds32_get_local_syms (abfd, sec, &isym))
-+ return FALSE;
-+ internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
-+ TRUE /* keep_memory */);
-+ irelend = internal_relocs + sec->reloc_count;
-+
-+ for (irel = internal_relocs; irel < irelend; irel++)
-+ {
-+ if (ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
-+ && ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
-+ && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
-+ {
-+ /* Get the distance between caller and callee. */
-+ unsigned int distance;
-+ if (irel->r_offset < offset && irel->r_addend > offset)
-+ distance = irel->r_addend - irel->r_offset;
-+ else if (irel->r_offset > offset && irel->r_addend < offset)
-+ distance = irel->r_offset - irel->r_addend;
-+ else
-+ continue;
-+
-+ /* In current, just check pc relative jump here. It may has to
-+ check more relocation in the feature. */
-+ switch (ELF32_R_TYPE (irel->r_info))
-+ {
-+ /* It has to subtruct 5 since it has to
-+ consider the 4 bytes for ifret. */
-+ case R_NDS32_9_PCREL_RELA:
-+ if (distance > ((1 << 8) - 5))
-+ return FALSE;
-+ break;
-+ case R_NDS32_15_PCREL_RELA:
-+ if (distance > ((1 << 14) - 5))
-+ return FALSE;
-+ break;
-+ default:
-+ break;
-+ }
-+ }
-+ }
-+ return TRUE;
-+}
-+
-+
-+/* Insert a INSN16 relocation for relaxing ifret. */
-+
-+static void
-+nds32_elf_ifc_insert_insn16_reloc (struct bfd_link_info *info,
-+ bfd *abfd, asection *sec,
-+ unsigned long int offset)
-+{
-+ /* Insert a new relocation into section rela, and this is very force
-+ implementation. It may cause unknown problem. */
-+
-+ Elf_Internal_Rela *relocs, *internal_relocs, *irelend;
-+ long unsigned int size;
-+ const struct elf_backend_data *bed = get_elf_backend_data (abfd);
-+ unsigned int count = 0;
-+
-+ internal_relocs = _bfd_elf_link_read_relocs (abfd, sec,
-+ NULL, NULL, FALSE);
-+ irelend = internal_relocs + sec->reloc_count;
-+
-+ /* We have to insert two relocations; one for ifc and
-+ another is for alignment.*/
-+ sec->reloc_count += 1;
-+ size = sec->reloc_count;
-+ size *= bed->s->int_rels_per_ext_rel * sizeof (Elf_Internal_Rela);
-+ relocs = (Elf_Internal_Rela *) bfd_malloc (size);
-+ memset (relocs, 0, size);
-+ elf_section_data (sec)->relocs = relocs;
-+ while ((internal_relocs + count) < irelend
-+ && (internal_relocs + count)->r_offset <= offset)
-+ count++;
-+
-+ /* Copy the front part where the offset is smaller. */
-+ memcpy (relocs, internal_relocs,
-+ (bed->s->int_rels_per_ext_rel * sizeof (Elf_Internal_Rela) * count));
-+
-+ /* Insert new relocations. */
-+ irelend = relocs + count;
-+
-+ /* Set relocation. */
-+ irelend->r_offset = offset;
-+ irelend->r_info = ELF32_R_INFO (0, R_NDS32_INSN16);
-+ irelend->r_addend = 0;
-+
-+ irelend++;
-+ /* Copy the rest part. */
-+ memcpy (irelend, internal_relocs + count,
-+ size - (bed->s->int_rels_per_ext_rel *
-+ sizeof (Elf_Internal_Rela) * (count + 1)));
-+ if (!info->keep_memory)
-+ free (internal_relocs);
-+}
-+
-+/* Push new element into the head of stack. */
-+
-+static void
-+nds32_elf_ifc_extend_stack (struct elf_nds32_ifc_insn_stack *stack,
-+ struct elf_nds32_ifc_unit *unit)
-+{
-+ struct elf_nds32_ifc_insn_stack *stackP = stack;
-+ struct elf_nds32_ifc_member *pre_member;
-+ struct elf_nds32_ifc_insn_member *imember;
-+ struct elf_nds32_ifc_code_hash_entry *hash;
-+
-+ while (stackP)
-+ {
-+ stackP->choose = stackP->extend;
-+ stackP->extend = 0;
-+ stackP= stackP->next;
-+ }
-+
-+ hash = unit->entry_p;
-+ stackP = stack;
-+ while (stackP)
-+ {
-+ if (stackP->choose && stackP->extend == 0)
-+ {
-+ pre_member = stackP->imember->member->pre_member;
-+ if (pre_member && !pre_member->dead
-+ && pre_member->unit_p->entry_p == hash)
-+ {
-+ stackP->extend = 1;
-+ imember = malloc (sizeof (struct elf_nds32_ifc_insn_member));
-+ imember->member = pre_member;
-+ imember->next = stackP->imember;
-+ stackP->imember = imember;
-+ }
-+ }
-+ stackP = stackP->next;
-+ }
-+}
-+
-+/* Search stack extend up. */
-+
-+static bfd_boolean
-+nds32_elf_ifc_extend_up (struct elf_nds32_ifc_insn_stack *stack)
-+{
-+ struct elf_nds32_ifc_insn_stack *stackP = stack;
-+ struct elf_nds32_ifc_member *memberP;
-+ struct elf_nds32_ifc_insn_member *imember;
-+ struct elf_nds32_ifc_unit *unitP, *unit_head = NULL, *unit_tail = NULL;
-+
-+ while (stackP)
-+ {
-+ if (stackP->extend
-+ && nds32_elf_ifc_check_overflow (stackP))
-+ {
-+ /* Get previos member. */
-+ unitP = unit_head;
-+ memberP = stackP->imember->member->pre_member;
-+ if (memberP && !memberP->dead)
-+ {
-+ while (unitP)
-+ {
-+ unit_tail = unitP;
-+ if (memberP && memberP->unit_p->entry_p == unitP->entry_p
-+ && (!unitP->entry_p->h
-+ || unitP->entry_p->h == memberP->unit_p->entry_p->h))
-+ {
-+ unitP->times++;
-+ break;
-+ }
-+ unitP = unitP->next;
-+ }
-+
-+ /* Can't find matched unit so new one. */
-+ if (!unitP)
-+ {
-+ /* Check this instruction is not in stack. I can't find a
-+ better way currently. */
-+ imember = stackP->imember;
-+ while (imember)
-+ {
-+ if (imember->member->unit_p->hash
-+ == memberP->unit_p->entry_p)
-+ break;
-+ imember = imember->next;
-+ }
-+ if (!imember)
-+ {
-+ unitP = malloc (sizeof (struct elf_nds32_ifc_unit));
-+ unitP->times = 1;
-+ unitP->member = memberP;
-+ unitP->entry_p = memberP->unit_p->entry_p;
-+ unitP->hash = memberP->unit_p->hash;
-+ unitP->next = NULL;
-+ if (!unit_head)
-+ unit_head = unitP;
-+ else
-+ unit_tail->next = unitP;
-+ }
-+ }
-+ }
-+ }
-+ stackP = stackP->next;
-+ }
-+
-+ /* Find a max one unit. */
-+ unitP = unit_head;
-+ unit_tail = unit_head;
-+ while (unitP)
-+ {
-+ if (unitP->times > unit_tail->times)
-+ unit_tail = unitP;
-+ unitP = unitP->next;
-+ }
-+ if (!unit_tail || unit_tail->times < 2)
-+ return FALSE;
-+ else
-+ {
-+ nds32_elf_ifc_extend_stack (stack, unit_tail);
-+ unit_tail->hash->round = 1;
-+ nds32_elf_ifc_extend_up (stack);
-+ unit_tail->hash->round = 0;
-+ return TRUE;
-+ }
-+}
-+
-+/* Check this stack is worth to be used. */
-+
-+static bfd_boolean
-+nds32_elf_ifc_check (struct elf_nds32_ifc_insn_stack *stack,
-+ struct elf_nds32_ifc_insn_stack **base,
-+ bfd_boolean extend)
-+{
-+ struct elf_nds32_ifc_insn_stack *ptr;
-+ struct elf_nds32_ifc_insn_member *imember;
-+ bfd_vma insn_sz;
-+
-+ ptr = stack;
-+ while (ptr)
-+ {
-+ if ((extend && ptr->extend)
-+ || (!extend && ptr->live
-+ && nds32_elf_ifc_check_overflow (ptr)))
-+ break;
-+ ptr = ptr->next;
-+ }
-+ *base = ptr;
-+
-+ if (!*base)
-+ return FALSE;
-+
-+ /* Conform the code size can be reduced. */
-+ ptr = stack;
-+ while (ptr)
-+ {
-+ if (ptr->live && ptr != *base)
-+ break;
-+ ptr = ptr->next;
-+ }
-+ if (!ptr)
-+ return FALSE;
-+
-+ /* Get the end offset of common. */
-+ imember = (*base)->imember;
-+ insn_sz = imember->member->unit_p->entry_p->size;
-+ insn_sz += imember->member->unit_p->hash->size;
-+ while (imember->next)
-+ {
-+ imember = imember->next;
-+ insn_sz += imember->member->unit_p->hash->size;
-+ }
-+ /* The ifc does not trigger, clear all stack. */
-+ if (insn_sz < 8)
-+ return FALSE;
-+
-+ return TRUE;
-+}
-+
-+/* Insert a new ifc target symbol. */
-+
-+#define IFC_TARGET_NAME 10
-+static void
-+nds32_elf_ifc_insert_target (struct elf_nds32_ifc_insn_stack *base,
-+ bfd_vma off,
-+ struct bfd_link_info *info,
-+ struct bfd_link_hash_entry **bh)
-+{
-+ static char name[45] = "$nds32ifc_a"; /* Is this enough? */
-+ int temp_num;
-+ static int hash_num = IFC_TARGET_NAME;
-+ asection *sec = base->imember->member->sec;
-+ bfd *abfd = sec->owner;
-+
-+ *bh = bfd_link_hash_lookup (info->hash, name,
-+ FALSE, FALSE, TRUE);
-+ /* Insert a global symbol for ifc target. */
-+ _bfd_generic_link_add_one_symbol
-+ (info, info->output_bfd, name, BSF_GLOBAL,
-+ sec, off, (const char *) NULL, TRUE, /* copy */
-+ get_elf_backend_data (info->output_bfd)->collect,
-+ bh);
-+
-+
-+ /* Adjust ifc target name for next time. */
-+ temp_num = hash_num;
-+ while (name[temp_num] >= 'z' && temp_num >= IFC_TARGET_NAME)
-+ {
-+ temp_num--;
-+ }
-+
-+ if (temp_num < IFC_TARGET_NAME)
-+ {
-+ /* Add one more bit and reset all bits. */
-+ hash_num++;
-+ temp_num = hash_num;
-+ while (temp_num >= IFC_TARGET_NAME)
-+ {
-+ name[temp_num] = 'a';
-+ temp_num--;
-+ }
-+ name[hash_num + 1] = '\0';
-+ }
-+ else if (temp_num == hash_num)
-+ {
-+ /* Add latest one bit. */
-+ name[temp_num]++;
-+ }
-+ else
-+ {
-+ /* Add carry bit and reset low significant bits. */
-+ name[temp_num]++;
-+ while (temp_num < hash_num)
-+ {
-+ temp_num++;
-+ name[temp_num] = 'a';
-+ }
-+ }
-+ /* Insert the global symbol into branch target bfd to adjust
-+ when relaxing. */
-+ if (nds32_elf_ifc_insert_sym_hash (abfd, *bh) < 0)
-+ return;
-+}
-+
-+/* Replace common code with ifc. In this functionm, it has to check
-+ whether relocation is overflow after insert ifret16. If it is fine,
-+ insert ifret16 into one common block, and replace other common with
-+ ifcall and insert relocation for it. */
-+
-+static void
-+nds32_elf_ifc_replace_common (struct elf_nds32_ifc_insn_stack *stack,
-+ struct bfd_link_info *info)
-+{
-+ struct elf_nds32_ifc_insn_stack *ptr, *base;
-+ struct elf_nds32_ifc_insn_member *imember, *base_imember;
-+ struct elf_nds32_ifc_member *member;
-+ bfd_byte *contents = NULL;
-+ bfd_vma off, insn_sz, relocation, clean_off, base_off;
-+ nds32_elf_blank_t *relax_blank_list = NULL;
-+ struct bfd_link_hash_entry *bh;
-+ asection *sec;
-+ bfd *abfd;
-+ bfd_boolean align_mask, extend;
-+
-+ if (!stack)
-+ return;
-+
-+ /* Set extend for all live stack. */
-+ ptr = stack;
-+ while (ptr)
-+ {
-+ ptr->extend = ptr->live;
-+ ptr = ptr->next;
-+ }
-+ extend = nds32_elf_ifc_extend_up (stack);
-+
-+ if (!nds32_elf_ifc_check (stack, &base, extend))
-+ {
-+ ptr = stack;
-+ while (ptr)
-+ {
-+ ptr->live = 0;
-+ ptr = ptr->next;
-+ }
-+ return;
-+ }
-+
-+ /* Get the total block size. */
-+ imember = base->imember;
-+ while (imember->next)
-+ {
-+ imember = imember->next;
-+ insn_sz += imember->member->unit_p->hash->size;
-+ }
-+ /* Find the base block. */
-+ member = imember->member;
-+ /* Final instruction offset. */
-+ off = member->offset;
-+ /* Final instruction size. */
-+ insn_sz = member->unit_p->hash->size;
-+ sec = member->sec;
-+ abfd = member->sec->owner;
-+
-+ if (!member->unit_p->hash->end)
-+ {
-+ /* Stack is the ifc base. Insert ifret16 into the block. */
-+ if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
-+ return;
-+
-+ /* Adjust contents. */
-+ nds32_elf_ifc_reallocate_contents (sec, 4, &contents);
-+ memmove (contents + off + 4 + insn_sz,
-+ contents + off + insn_sz,
-+ sec->size - off - insn_sz - 4);
-+
-+ /* Adjust relocation and symbols. */
-+ nds32_elf_ifc_enlarge (abfd, sec, off + insn_sz, 4);
-+
-+ /* Put ifret. It insert 32-bits ret since it has to consider alignment
-+ in the future. */
-+ bfd_putb32 (INSN_IFRET, contents + off + insn_sz);
-+
-+ /* Insert relocation for convert to 16-bits if possible. */
-+ nds32_elf_ifc_insert_insn16_reloc (info, abfd, sec, off + insn_sz);
-+ }
-+
-+
-+ off = base->imember->member->offset
-+ - base->imember->member->unit_p->entry_p->size;
-+
-+ /* The common block address. */
-+ relocation = off + sec->output_offset + sec->output_section->vma;
-+
-+ /* Others has to exchange to ifcall, and insert relocation. */
-+ ptr = stack;
-+ while (ptr)
-+ {
-+ if (ptr->live && ptr != base)
-+ {
-+ insn_sz = 0;
-+ imember = ptr->imember;
-+ member = imember->member;
-+ sec = member->sec;
-+ abfd = member->sec->owner;
-+
-+ /* Check the range enough for ifcall. */
-+ off = member->offset - member->unit_p->entry_p->size
-+ + sec->output_offset + sec->output_section->vma;
-+ /* The larget range 16s and right shift one bit. Do it conservatively,
-+ so pick range 0xf000. */
-+ if ((off > relocation && (off - relocation) > 0xf000)
-+ || (off < relocation && (relocation - off) > 0xf000))
-+ {
-+ ptr = ptr->next;
-+ continue;
-+ }
-+
-+ /* The first insntruction offset. */
-+ off = member->offset - member->unit_p->entry_p->size;
-+
-+ /* Get the total insntruntion size of the common subexpression. */
-+ insn_sz += member->unit_p->entry_p->size;
-+ while (imember && member->unit_p)
-+ {
-+ member = imember->member;
-+ insn_sz += member->unit_p->hash->size;
-+ imember = imember->next;
-+ }
-+
-+ if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
-+ {
-+ (*_bfd_error_handler)
-+ (_("Linker: relax for ifc get section contents error.\n"));
-+ return;
-+ }
-+
-+ /* Check the total size of common if 4 bytes multiple or not. */
-+ align_mask = ((insn_sz % 4) == 0) ? TRUE : FALSE;
-+ clean_off = off + insn_sz - 2;
-+
-+ /* Find the member match to base block. */
-+ base_imember = base->imember;
-+ imember = ptr->imember;
-+ while (imember->member->unit_p != base_imember->member->unit_p)
-+ base_imember = base_imember->next;
-+ if (!imember)
-+ {
-+ (*_bfd_error_handler)
-+ (_("Linker: relax for ifc error.\n"));
-+ return;
-+ }
-+ bh = base_imember->member->bh;
-+ if (!bh)
-+ {
-+ base_off = base_imember->member->offset
-+ - base_imember->member->unit_p->entry_p->size;
-+ /* Insert a global symbol for ifc target. */
-+ nds32_elf_ifc_insert_target (base, base_off, info, &bh);
-+ base_imember->member->bh = bh;
-+ }
-+
-+ /* Insert two relocations IFCALL and INSN16. */
-+ nds32_elf_ifc_insert_relocation (info, abfd, sec, bh, off,
-+ align_mask, clean_off);
-+
-+ bfd_putb32 (INSN_IFCALL, contents + off);
-+
-+ if (!align_mask)
-+ bfd_putb16 (INSN_NOP16, contents + off + 4);
-+
-+ if (align_mask && !insert_nds32_elf_blank_recalc_total
-+ (&relax_blank_list, off + 4, insn_sz - 4))
-+ return;
-+ else if (!align_mask && !insert_nds32_elf_blank_recalc_total
-+ (&relax_blank_list, off + 6, insn_sz - 6))
-+ return;
-+ if (relax_blank_list)
-+ {
-+ nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
-+ relax_blank_list = NULL;
-+ }
-+ nds32_elf_ifc_adjust_block (sec, off, ((align_mask) ? 4 : 6) - insn_sz,
-+ (align_mask) ? 4 : 6);
-+ }
-+ ptr = ptr->next;
-+ }
-+}
-+
-+/* Free heap and set dead member. */
-+
-+static void
-+nds32_elf_ifc_release_member (struct elf_nds32_ifc_insn_stack *stack)
-+{
-+ struct elf_nds32_ifc_insn_stack *ptr, *temp_ptr;
-+ struct elf_nds32_ifc_insn_member *imember, *temp;
-+
-+ ptr = stack;
-+ while (ptr)
-+ {
-+ if (ptr->live)
-+ {
-+ imember = ptr->imember;
-+ while (imember)
-+ {
-+ /* Set edge dead. */
-+ imember->member->dead = TRUE;
-+ imember->member->unit_p->times--;
-+ /* Since the previous insntruction is used,
-+ set the edge dead, too. */
-+ imember->member->next_member->dead = TRUE;
-+ if (imember->member->pre_member)
-+ imember->member->pre_member->dead = TRUE;
-+ temp = imember;
-+ imember = imember->next;
-+ free (temp);
-+ }
-+ }
-+ temp_ptr = ptr;
-+ ptr = ptr->next;
-+ free (temp_ptr);
-+ }
-+}
-+
-+/* Get the new max_unit for entry. */
-+
-+static bfd_boolean
-+nds32_elf_ifc_next_max (struct elf_nds32_ifc_code_hash_entry *entry)
-+{
-+ struct elf_nds32_ifc_unit *unitP, *max_unit;
-+
-+ unitP = entry->unit;
-+ max_unit = entry->unit;
-+ while (unitP)
-+ {
-+ if (unitP->times > max_unit->times
-+ && !unitP->done)
-+ max_unit = unitP;
-+ unitP = unitP->next;
-+ }
-+ if (!max_unit->done && max_unit->times >= 2)
-+ {
-+ entry->max_unit = max_unit;
-+ entry->max_times = max_unit->times;
-+ return TRUE;
-+ }
-+ return FALSE;
-+}
-+
-+/* Find cse block here. */
-+
-+static void
-+nds32_elf_ifc_find_cse (struct bfd_link_info *info)
-+{
-+ /* Example: insntruction ABCABCB. In the first round we will choose B,
-+ and find its next possible insntruction. In the end of this round,
-+ we will know the max appearance times is 2, and the insntruction is C. */
-+ struct elf_nds32_ifc_code_hash_entry *ptr = ifc_insn_head;
-+ struct elf_nds32_ifc_insn_stack *stack;
-+
-+ while (ptr)
-+ {
-+ stack = NULL;
-+ if (ptr->max_unit && ptr->max_times >= 2)
-+ {
-+ /* We save some infomation for ifc search back, but not
-+ implement yet. It may can be done hear. */
-+ ptr->max_unit->done = 1;
-+ ptr->round = 1;
-+ nds32_elf_ifc_find_cse_recur (ptr->max_unit, &stack, ptr->size);
-+ nds32_elf_ifc_replace_common (stack, info);
-+ ptr->round = 0;
-+ nds32_elf_ifc_release_member (stack);
-+ if (nds32_elf_ifc_next_max (ptr))
-+ continue;
-+ }
-+ ptr = ptr->next;
-+ }
-+}
-+
-+/* To find the cse and relax it. */
-+
-+static void
-+nds32_elf_ifc_cse_algo (struct bfd_link_info *info)
-+{
-+ /* Order the insntruction by max_unit times. */
-+ nds32_elf_ifc_code_hash_traverse (nds32_elf_ifc_order_insn_times);
-+
-+ /* Find common subexpression. */
-+ nds32_elf_ifc_find_cse (info);
-+}
-+/* End IFC. */
-+
-+
-+/* Rom-patch table hash function. */
-+
-+static struct bfd_hash_entry *
-+nds32_elf_ict_hash_newfunc (struct bfd_hash_entry *entry,
-+ struct bfd_hash_table *table,
-+ const char *string)
-+{
-+ struct elf_nds32_ict_hash_entry *ret;
-+
-+ /* Allocate the structure if it has not already been allocated by a
-+ subclass. */
-+ if (entry == NULL)
-+ {
-+ entry = (struct bfd_hash_entry *)
-+ bfd_hash_allocate (table, sizeof (*ret));
-+ if (entry == NULL)
-+ return entry;
-+ }
-+
-+ /* Call the allocation method of the superclass. */
-+ entry = bfd_hash_newfunc (entry, table, string);
-+ if (entry == NULL)
-+ return entry;
-+
-+ ret = (struct elf_nds32_ict_hash_entry*) entry;
-+ ret->order = 0;
-+ return &ret->root;
-+}
-+
-+static void
-+nds32_elf_ict_hash_init (void)
-+{
-+ if (!bfd_hash_table_init_n (&indirect_call_table, nds32_elf_ict_hash_newfunc,
-+ sizeof (struct elf_nds32_ict_hash_entry),
-+ 1023))
-+ (*_bfd_error_handler) (_("ld error: cannot init rom patch hash table\n"));
-+ return;
-+}
-+
-+/* Relocate for NDS32_ICT_SECTION. */
-+static void
-+nds32_elf_ict_relocate (struct bfd_link_info *info)
-+{
-+ static bfd_boolean done = FALSE;
-+ asection *sec;
-+ bfd_byte *contents = NULL;
-+ uint32_t insn;
-+ unsigned int i;
-+ struct elf_link_hash_entry *h;
-+ struct bfd_link_hash_entry *h2;
-+ bfd_vma relocation, base;
-+
-+ if (done)
-+ return;
-+
-+ done = TRUE;
-+
-+ sec = nds32_elf_get_target_section (info, NDS32_ICT_SECTION);
-+ h2 = bfd_link_hash_lookup (info->hash, "_INDIRECT_CALL_TABLE_BASE_",
-+ FALSE, FALSE, FALSE);
-+ base = ((h2->u.def.value
-+ + h2->u.def.section->output_section->vma
-+ + h2->u.def.section->output_offset));
-+
-+ if (!nds32_get_section_contents (sec->owner, sec, &contents, TRUE))
-+ return;
-+
-+ indirect_call_table.frozen = 1;
-+ for (i = 0; i < indirect_call_table.size; i++)
-+ {
-+ struct bfd_hash_entry *p;
-+ struct elf_nds32_ict_hash_entry *entry;
-+
-+ for (p = indirect_call_table.table[i]; p != NULL; p = p->next)
-+ {
-+ entry = (struct elf_nds32_ict_hash_entry *) p;
-+ insn = INSN_J;
-+ h = entry->h;
-+ if ((h->root.type == bfd_link_hash_defined
-+ || h->root.type == bfd_link_hash_defweak)
-+ && h->root.u.def.section != NULL
-+ && h->root.u.def.section->output_section != NULL)
-+ {
-+
-+ relocation = h->root.u.def.value +
-+ h->root.u.def.section->output_section->vma +
-+ h->root.u.def.section->output_offset;
-+ insn |= ((relocation - base - entry->order * 4) >> 1) & 0xffffff;
-+ }
-+ else
-+ relocation = 0;
-+
-+ bfd_putb32 (insn, contents + (entry->order) * 4);
-+ }
-+ }
-+ indirect_call_table.frozen = 0;
-+}
-+
-+static asection*
-+nds32_elf_get_target_section (struct bfd_link_info *info, char *name)
-+{
-+ asection *sec = NULL;
-+ bfd *abfd;
-+
-+ for (abfd = info->input_bfds; abfd != NULL; abfd = abfd->link_next)
-+ {
-+ sec = bfd_get_section_by_name (abfd, name);
-+ if (sec != NULL)
-+ break;
-+ }
-+
-+ return sec;
-+}
-+
-+
-+#define ELF_ARCH bfd_arch_nds32
-+#define ELF_MACHINE_CODE EM_NDS32
-+#define ELF_MAXPAGESIZE 0x1000
-+#define ELF_TARGET_ID NDS32_ELF_DATA
-+
-+#define TARGET_BIG_SYM bfd_elf32_nds32be_vec
-+#define TARGET_BIG_NAME "elf32-nds32be"
-+#define TARGET_LITTLE_SYM bfd_elf32_nds32le_vec
-+#define TARGET_LITTLE_NAME "elf32-nds32le"
-+
-+#define elf_info_to_howto nds32_info_to_howto
-+#define elf_info_to_howto_rel nds32_info_to_howto_rel
-+
-+#define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
-+#define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
-+#define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
-+#define bfd_elf32_bfd_relax_section nds32_elf_relax_section
-+#define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
-+
-+#define bfd_elf32_mkobject nds32_elf_mkobject
-+#define elf_backend_action_discarded nds32_elf_action_discarded
-+#define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
-+#define elf_backend_check_relocs nds32_elf_check_relocs
-+#define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
-+#define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
-+#define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
-+#define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
-+#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
-+#define elf_backend_relocate_section nds32_elf_relocate_section
-+#define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
-+#define elf_backend_gc_sweep_hook nds32_elf_gc_sweep_hook
-+#define elf_backend_grok_prstatus nds32_elf_grok_prstatus
-+#define elf_backend_grok_psinfo nds32_elf_grok_psinfo
-+#define elf_backend_reloc_type_class nds32_elf_reloc_type_class
-+#define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
-+#define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
-+#define elf_backend_output_arch_syms nds32_elf_output_arch_syms
-+#define elf_backend_object_p nds32_elf_object_p
-+#define elf_backend_final_write_processing nds32_elf_final_write_processing
-+#define elf_backend_special_sections nds32_elf_special_sections
-+#define bfd_elf32_bfd_get_relocated_section_contents \
-+ nds32_elf_get_relocated_section_contents
-+#define bfd_elf32_bfd_is_target_special_symbol nds32_elf_is_target_special_symbol
-+#define elf_backend_maybe_function_sym nds32_elf_maybe_function_sym
-+
-+#define elf_backend_can_gc_sections 1
-+#define elf_backend_can_refcount 1
-+#define elf_backend_want_got_plt 1
-+#define elf_backend_plt_readonly 1
-+#define elf_backend_want_plt_sym 0
-+#define elf_backend_got_header_size 12
-+#define elf_backend_may_use_rel_p 1
-+#define elf_backend_default_use_rela_p 1
-+#define elf_backend_may_use_rela_p 1
-+
-+#include "elf32-target.h"
-+
-+#undef ELF_MAXPAGESIZE
-+#define ELF_MAXPAGESIZE 0x2000
-+
-+#undef TARGET_BIG_SYM
-+#define TARGET_BIG_SYM bfd_elf32_nds32belin_vec
-+#undef TARGET_BIG_NAME
-+#define TARGET_BIG_NAME "elf32-nds32be-linux"
-+#undef TARGET_LITTLE_SYM
-+#define TARGET_LITTLE_SYM bfd_elf32_nds32lelin_vec
-+#undef TARGET_LITTLE_NAME
-+#define TARGET_LITTLE_NAME "elf32-nds32le-linux"
-+#undef elf32_bed
-+#define elf32_bed elf32_nds32_lin_bed
-+
-+#include "elf32-target.h"
-diff -Nur binutils-2.24.orig/bfd/elf32-nds32.h binutils-2.24/bfd/elf32-nds32.h
---- binutils-2.24.orig/bfd/elf32-nds32.h 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/bfd/elf32-nds32.h 2016-06-30 21:26:12.569889845 +0200
-@@ -0,0 +1,215 @@
-+/* NDS32-specific support for 32-bit ELF.
-+ Copyright (C) 2012-2013 Free Software Foundation, Inc.
-+ Contributed by Andes Technology Corporation.
-+
-+ This file is part of BFD, the Binary File Descriptor library.
-+
-+ This program is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 3 of the License, or
-+ (at your option) any later version.
-+
-+ This program is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ You should have received a copy of the GNU General Public License
-+ along with this program; if not, write to the Free Software
-+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-+ 02110-1301, USA.*/
-+
-+#ifndef ELF32_NDS32_H
-+#define ELF32_NDS32_H
-+
-+/*
-+ * Relocation flags encoded in r_addend.
-+ */
-+
-+/* Relocation flags for R_NDS32_ERLAX_ENTRY. */
-+
-+/* Set if relax on this section is done or disabled. */
-+#define R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG (1 << 31)
-+/* Optimize for performance. */
-+#define R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG (1 << 30)
-+/* Optimize for size. Branch destination 4-byte adjustment
-+ may be disabled. */
-+#define R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG (1 << 29)
-+/* To distinguish the assembly code generated by compiler
-+ or written manually. */
-+#define R_NDS32_RELAX_ENTRY_VERBATIM_FLAG (1 << 28)
-+/* EX9 and link-time IFC must be explicitly enabled, so we
-+ won't mess up handcraft assembly code. */
-+/* Enable EX9 optimization for this section. */
-+#define R_NDS32_RELAX_ENTRY_EX9_FLAG (1 << 2)
-+/* Enable IFC optimization for this section. */
-+#define R_NDS32_RELAX_ENTRY_IFC_FLAG (1 << 3)
-+
-+
-+/* Relocation flags for R_NDS32_INSN16. */
-+
-+/* Tag the nop16 can be removed. */
-+#define R_NDS32_INSN16_CONVERT_FLAG (1 << 0)
-+/* Convert a gp-relative access (e.g., lwi.gp)
-+ to fp-as-gp access (lwi37.fp).
-+ This value is used by linker internally only.
-+ It's fine to change the vlaue. */
-+#define R_NDS32_INSN16_FP7U2_FLAG (1 << 1)
-+
-+/* Relocation flags for R_NDS32_RELAX_REGION_OMIT_FP_START/END. */
-+
-+/* OMIT_FP_FLAG marks the region for applying fp-as-gp
-+ optimization. */
-+#define R_NDS32_RELAX_REGION_OMIT_FP_FLAG (1 << 0)
-+/* NOT_OMIT_FP_FLAG is set if this region is not worth
-+ for fp-as-gp. */
-+#define R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG (1 << 1)
-+/* Suppress EX9 optimization in the region. */
-+#define R_NDS32_RELAX_REGION_NO_EX9_FLAG (1 << 2)
-+/* A Innermost loop region. Some optimizations is suppressed
-+ in this region due to performance drop. */
-+#define R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG (1 << 4)
-+/* Suppress IFC optimization in the region. */
-+#define R_NDS32_RELAX_REGION_NO_IFC_FLAG (1 << 5)
-+
-+/* Tag range for LOADSTORE relocation. */
-+enum
-+{
-+ NDS32_LOADSTORE_NONE = 0x0,
-+ NDS32_LOADSTORE_BYTE = 0x1,
-+ NDS32_LOADSTORE_HALF = 0x2,
-+ NDS32_LOADSTORE_WORD = 0x4,
-+ NDS32_LOADSTORE_FLOAT_S = 0x8,
-+ NDS32_LOADSTORE_FLOAT_D = 0x10,
-+ NDS32_LOADSTORE_IMM = 0x20
-+};
-+
-+/* Relax tag for nds32_elf_relax_section, we have to specify which
-+ optimization do in this round. */
-+enum
-+{
-+ NDS32_RELAX_NONE_ROUND = 0,
-+ NDS32_RELAX_NORMAL_ROUND,
-+ NDS32_RELAX_JUMP_IFC_ROUND,
-+ NDS32_RELAX_IFC_ROUND,
-+ NDS32_RELAX_EX9_BUILD_ROUND,
-+ NDS32_RELAX_EX9_REPLACE_ROUND,
-+ NDS32_RELAX_EMPTY_ROUND
-+};
-+
-+/* Security tag. */
-+enum
-+{
-+ NDS32_SECURITY_NONE = 0,
-+ NDS32_SECURITY_START,
-+ NDS32_SECURITY_RESTART,
-+ NDS32_SECURITY_END
-+};
-+
-+/* There are two state in IFC optimization including general ifc (post-opt)
-+ and jump ifc (j and jal). Therefore, we have to use two different mask to
-+ distinguish them. */
-+/* Optimization status mask. */
-+#define NDS32_RELAX_JUMP_IFC_DONE (1 << 0)
-+#define NDS32_RELAX_EX9_DONE (1 << 1)
-+#define NDS32_RELAX_IFC_DONE (1 << 2)
-+
-+/* Optimization turn on mask. */
-+#define NDS32_RELAX_IFC_ON (1 << 0)
-+#define NDS32_RELAX_EX9_ON (1 << 1)
-+
-+void nds32_insertion_sort
-+ (void *base, size_t nmemb, size_t size,
-+ int (*compar) (const void *lhs, const void *rhs));
-+
-+struct section_id_list_t
-+{
-+ int id;
-+ struct section_id_list_t *next;
-+};
-+
-+struct section_id_list_t *
-+ elf32_nds32_lookup_section_id (int id, struct section_id_list_t **lst_ptr);
-+int elf32_nds32_check_relax_group (bfd *bfd, asection *sec);
-+int elf32_nds32_unify_relax_group (bfd *abfd, asection *asec);
-+int nds32_elf_unify_tls_model (bfd *inbfd, asection *insec,
-+ bfd_byte *incontents,
-+ struct bfd_link_info *lnkinfo);
-+
-+void bfd_elf32_nds32_set_target_option (struct bfd_link_info *, int, int,
-+ FILE *, int, int, int, int, FILE *,
-+ FILE *, int, int, bfd_boolean,
-+ bfd_boolean, bfd_boolean);
-+void bfd_elf32_nds32_append_section (struct bfd_link_info*, bfd *, int);
-+int nds32_convert_32_to_16
-+ (bfd *abfd, uint32_t insn, uint16_t *pinsn16, int *pinsn_type);
-+int nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn);
-+
-+#define nds32_elf_hash_table(info) \
-+ (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
-+ == NDS32_ELF_DATA ? ((struct elf_nds32_link_hash_table *) ((info)->hash)) : NULL)
-+
-+#define elf32_nds32_compute_jump_table_size(htab) \
-+ ((htab)->next_tls_desc_index * 4)
-+
-+#define elf32_nds32_local_tlsdesc_gotent(bfd) \
-+ (elf_nds32_tdata (bfd)->local_tlsdesc_gotent)
-+
-+/* Hash table structure for target nds32. There are some members to
-+ save target options passed from nds32elf.em to bfd. */
-+
-+struct elf_nds32_link_hash_table
-+{
-+ struct elf_link_hash_table root;
-+
-+ /* ?? Short-cuts to get to dynamic linker sections. */
-+ asection *sdynbss;
-+ asection *srelbss;
-+
-+ /* Small local sym to section mapping cache. */
-+ struct sym_cache sym_cache;
-+
-+ /* Target dependent options. */
-+ int relax_fp_as_gp; /* --mrelax-omit-fp */
-+ int eliminate_gc_relocs; /* --meliminate-gc-relocs */
-+ FILE *sym_ld_script; /* --mgen-symbol-ld-script=<file> */
-+ /* Disable if linking a dynamically linked executable. */
-+ int load_store_relax;
-+ int target_optimize; /* Switch optimization. */
-+ int relax_status; /* Finished optimization. */
-+ int relax_round; /* Going optimization. */
-+ FILE *ex9_export_file; /* --mexport-ex9=<file> */
-+ FILE *ex9_import_file; /* --mimport-ex9=<file> */
-+ int update_ex9_table; /* --mupdate-ex9. */
-+ int ex9_limit;
-+ bfd_boolean ex9_loop_aware; /* Ignore ex9 if inside a loop. */
-+ bfd_boolean ifc_loop_aware; /* Ignore ifc if inside a loop. */
-+ bfd_boolean hyper_relax; /* Relax for symbol not in RW sections. */
-+
-+ /* The offset into splt of the PLT entry for the TLS descriptor
-+ resolver. Special values are 0, if not necessary (or not found
-+ to be necessary yet), and -1 if needed but not determined
-+ yet. */
-+ bfd_vma dt_tlsdesc_plt;
-+
-+ /* The offset into sgot of the GOT entry used by the PLT entry
-+ above. */
-+ bfd_vma dt_tlsdesc_got;
-+
-+ /* Offset in .plt section of tls_nds32_trampoline. */
-+ bfd_vma tls_trampoline;
-+
-+ /* The index of the next unused R_NDS32_TLS_DESC slot in .rel.plt. */
-+ bfd_vma next_tls_desc_index;
-+
-+ /* How many R_NDS32_TLS_DESC relocations were generated so far. */
-+ bfd_vma num_tls_desc;
-+
-+ /* The amount of space used by the reserved portion of the sgotplt
-+ section, plus whatever space is used by the jump slots. */
-+ bfd_vma sgotplt_jump_table_size;
-+
-+ /* True if the target uses REL relocations. */
-+ int use_rel;
-+};
-+#endif
-diff -Nur binutils-2.24.orig/bfd/elf-bfd.h binutils-2.24/bfd/elf-bfd.h
---- binutils-2.24.orig/bfd/elf-bfd.h 2013-11-08 11:13:48.000000000 +0100
-+++ binutils-2.24/bfd/elf-bfd.h 2016-06-30 21:26:12.569889845 +0200
-@@ -419,6 +419,7 @@
- MICROBLAZE_ELF_DATA,
- MIPS_ELF_DATA,
- MN10300_ELF_DATA,
-+ NDS32_ELF_DATA,
- NIOS2_ELF_DATA,
- PPC32_ELF_DATA,
- PPC64_ELF_DATA,
-diff -Nur binutils-2.24.orig/bfd/libbfd.c binutils-2.24/bfd/libbfd.c
---- binutils-2.24.orig/bfd/libbfd.c 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/bfd/libbfd.c 2016-06-30 21:26:12.569889845 +0200
-@@ -550,11 +550,10 @@
- .*/
-
- /* Sign extension to bfd_signed_vma. */
--#define COERCE16(x) (((bfd_signed_vma) (x) ^ 0x8000) - 0x8000)
--#define COERCE32(x) (((bfd_signed_vma) (x) ^ 0x80000000) - 0x80000000)
--#define EIGHT_GAZILLION ((bfd_int64_t) 1 << 63)
-+#define COERCE16(x) (((bfd_vma) (x) ^ 0x8000) - 0x8000)
-+#define COERCE32(x) (((bfd_vma) (x) ^ 0x80000000) - 0x80000000)
- #define COERCE64(x) \
-- (((bfd_int64_t) (x) ^ EIGHT_GAZILLION) - EIGHT_GAZILLION)
-+ (((bfd_uint64_t) (x) ^ ((bfd_uint64_t) 1 << 63)) - ((bfd_uint64_t) 1 << 63))
-
- bfd_vma
- bfd_getb16 (const void *p)
-diff -Nur binutils-2.24.orig/bfd/libbfd.h binutils-2.24/bfd/libbfd.h
---- binutils-2.24.orig/bfd/libbfd.h 2013-11-18 09:40:15.000000000 +0100
-+++ binutils-2.24/bfd/libbfd.h 2016-06-30 21:26:12.569889845 +0200
-@@ -1746,6 +1746,141 @@
- "BFD_RELOC_M32R_GOTPC_HI_ULO",
- "BFD_RELOC_M32R_GOTPC_HI_SLO",
- "BFD_RELOC_M32R_GOTPC_LO",
-+ "BFD_RELOC_NDS32_20",
-+ "BFD_RELOC_NDS32_9_PCREL",
-+ "BFD_RELOC_NDS32_WORD_9_PCREL",
-+ "BFD_RELOC_NDS32_15_PCREL",
-+ "BFD_RELOC_NDS32_17_PCREL",
-+ "BFD_RELOC_NDS32_25_PCREL",
-+ "BFD_RELOC_NDS32_HI20",
-+ "BFD_RELOC_NDS32_LO12S3",
-+ "BFD_RELOC_NDS32_LO12S2",
-+ "BFD_RELOC_NDS32_LO12S1",
-+ "BFD_RELOC_NDS32_LO12S0",
-+ "BFD_RELOC_NDS32_LO12S0_ORI",
-+ "BFD_RELOC_NDS32_SDA15S3",
-+ "BFD_RELOC_NDS32_SDA15S2",
-+ "BFD_RELOC_NDS32_SDA15S1",
-+ "BFD_RELOC_NDS32_SDA15S0",
-+ "BFD_RELOC_NDS32_SDA16S3",
-+ "BFD_RELOC_NDS32_SDA17S2",
-+ "BFD_RELOC_NDS32_SDA18S1",
-+ "BFD_RELOC_NDS32_SDA19S0",
-+ "BFD_RELOC_NDS32_SECURITY_16",
-+ "BFD_RELOC_NDS32_GOT20",
-+ "BFD_RELOC_NDS32_9_PLTREL",
-+ "BFD_RELOC_NDS32_25_PLTREL",
-+ "BFD_RELOC_NDS32_COPY",
-+ "BFD_RELOC_NDS32_GLOB_DAT",
-+ "BFD_RELOC_NDS32_JMP_SLOT",
-+ "BFD_RELOC_NDS32_RELATIVE",
-+ "BFD_RELOC_NDS32_GOTOFF",
-+ "BFD_RELOC_NDS32_GOTOFF_HI20",
-+ "BFD_RELOC_NDS32_GOTOFF_LO12",
-+ "BFD_RELOC_NDS32_GOTPC20",
-+ "BFD_RELOC_NDS32_GOT_HI20",
-+ "BFD_RELOC_NDS32_GOT_LO12",
-+ "BFD_RELOC_NDS32_GOTPC_HI20",
-+ "BFD_RELOC_NDS32_GOTPC_LO12",
-+ "BFD_RELOC_NDS32_INSN16",
-+ "BFD_RELOC_NDS32_LABEL",
-+ "BFD_RELOC_NDS32_LONGCALL1",
-+ "BFD_RELOC_NDS32_LONGCALL2",
-+ "BFD_RELOC_NDS32_LONGCALL3",
-+ "BFD_RELOC_NDS32_LONGJUMP1",
-+ "BFD_RELOC_NDS32_LONGJUMP2",
-+ "BFD_RELOC_NDS32_LONGJUMP3",
-+ "BFD_RELOC_NDS32_LOADSTORE",
-+ "BFD_RELOC_NDS32_9_FIXED",
-+ "BFD_RELOC_NDS32_15_FIXED",
-+ "BFD_RELOC_NDS32_17_FIXED",
-+ "BFD_RELOC_NDS32_25_FIXED",
-+ "BFD_RELOC_NDS32_LONGCALL4",
-+ "BFD_RELOC_NDS32_LONGCALL5",
-+ "BFD_RELOC_NDS32_LONGCALL6",
-+ "BFD_RELOC_NDS32_LONGJUMP4",
-+ "BFD_RELOC_NDS32_LONGJUMP5",
-+ "BFD_RELOC_NDS32_LONGJUMP6",
-+ "BFD_RELOC_NDS32_LONGJUMP7",
-+ "BFD_RELOC_NDS32_PLTREL_HI20",
-+ "BFD_RELOC_NDS32_PLTREL_LO12",
-+ "BFD_RELOC_NDS32_PLT_GOTREL_HI20",
-+ "BFD_RELOC_NDS32_PLT_GOTREL_LO12",
-+ "BFD_RELOC_NDS32_SDA12S2_DP",
-+ "BFD_RELOC_NDS32_SDA12S2_SP",
-+ "BFD_RELOC_NDS32_LO12S2_DP",
-+ "BFD_RELOC_NDS32_LO12S2_SP",
-+ "BFD_RELOC_NDS32_DWARF2_OP1",
-+ "BFD_RELOC_NDS32_DWARF2_OP2",
-+ "BFD_RELOC_NDS32_DWARF2_LEB",
-+ "BFD_RELOC_NDS32_UPDATE_TA",
-+ "BFD_RELOC_NDS32_PLT_GOTREL_LO20",
-+ "BFD_RELOC_NDS32_PLT_GOTREL_LO15",
-+ "BFD_RELOC_NDS32_PLT_GOTREL_LO19",
-+ "BFD_RELOC_NDS32_GOT_LO15",
-+ "BFD_RELOC_NDS32_GOT_LO19",
-+ "BFD_RELOC_NDS32_GOTOFF_LO15",
-+ "BFD_RELOC_NDS32_GOTOFF_LO19",
-+ "BFD_RELOC_NDS32_GOT15S2",
-+ "BFD_RELOC_NDS32_GOT17S2",
-+ "BFD_RELOC_NDS32_5",
-+ "BFD_RELOC_NDS32_10_UPCREL",
-+ "BFD_RELOC_NDS32_SDA_FP7U2_RELA",
-+ "BFD_RELOC_NDS32_RELAX_ENTRY",
-+ "BFD_RELOC_NDS32_GOT_SUFF",
-+ "BFD_RELOC_NDS32_GOTOFF_SUFF",
-+ "BFD_RELOC_NDS32_PLT_GOT_SUFF",
-+ "BFD_RELOC_NDS32_MULCALL_SUFF",
-+ "BFD_RELOC_NDS32_PTR",
-+ "BFD_RELOC_NDS32_PTR_COUNT",
-+ "BFD_RELOC_NDS32_PTR_RESOLVED",
-+ "BFD_RELOC_NDS32_PLTBLOCK",
-+ "BFD_RELOC_NDS32_RELAX_REGION_BEGIN",
-+ "BFD_RELOC_NDS32_RELAX_REGION_END",
-+ "BFD_RELOC_NDS32_MINUEND",
-+ "BFD_RELOC_NDS32_SUBTRAHEND",
-+ "BFD_RELOC_NDS32_DIFF8",
-+ "BFD_RELOC_NDS32_DIFF16",
-+ "BFD_RELOC_NDS32_DIFF32",
-+ "BFD_RELOC_NDS32_DIFF_ULEB128",
-+ "BFD_RELOC_NDS32_EMPTY",
-+ "BFD_RELOC_NDS32_25_ABS",
-+ "BFD_RELOC_NDS32_DATA",
-+ "BFD_RELOC_NDS32_TRAN",
-+ "BFD_RELOC_NDS32_17IFC_PCREL",
-+ "BFD_RELOC_NDS32_10IFCU_PCREL",
-+ "BFD_RELOC_NDS32_TPOFF",
-+ "BFD_RELOC_NDS32_GOTTPOFF",
-+ "BFD_RELOC_NDS32_TLS_LE_HI20",
-+ "BFD_RELOC_NDS32_TLS_LE_LO12",
-+ "BFD_RELOC_NDS32_TLS_LE_20",
-+ "BFD_RELOC_NDS32_TLS_LE_15S0",
-+ "BFD_RELOC_NDS32_TLS_LE_15S1",
-+ "BFD_RELOC_NDS32_TLS_LE_15S2",
-+ "BFD_RELOC_NDS32_TLS_LE_ADD",
-+ "BFD_RELOC_NDS32_TLS_LE_LS",
-+ "BFD_RELOC_NDS32_TLS_IE_HI20",
-+ "BFD_RELOC_NDS32_TLS_IE_LO12",
-+ "BFD_RELOC_NDS32_TLS_IE_LO12S2",
-+ "BFD_RELOC_NDS32_TLS_IEGP_HI20",
-+ "BFD_RELOC_NDS32_TLS_IEGP_LO12",
-+ "BFD_RELOC_NDS32_TLS_IEGP_LO12S2",
-+ "BFD_RELOC_NDS32_TLS_IEGP_LW",
-+ "BFD_RELOC_NDS32_TLS_DESC",
-+ "BFD_RELOC_NDS32_TLS_DESC_HI20",
-+ "BFD_RELOC_NDS32_TLS_DESC_LO12",
-+ "BFD_RELOC_NDS32_TLS_DESC_20",
-+ "BFD_RELOC_NDS32_TLS_DESC_SDA17S2",
-+ "BFD_RELOC_NDS32_TLS_DESC_ADD",
-+ "BFD_RELOC_NDS32_TLS_DESC_FUNC",
-+ "BFD_RELOC_NDS32_TLS_DESC_CALL",
-+ "BFD_RELOC_NDS32_TLS_DESC_MEM",
-+ "BFD_RELOC_NDS32_REMOVE",
-+ "BFD_RELOC_NDS32_GROUP",
-+ "BFD_RELOC_NDS32_ICT",
-+ "BFD_RELOC_NDS32_ICT_HI20",
-+ "BFD_RELOC_NDS32_ICT_LO12",
-+ "BFD_RELOC_NDS32_ICT_25PC",
- "BFD_RELOC_V850_9_PCREL",
- "BFD_RELOC_V850_22_PCREL",
- "BFD_RELOC_V850_SDA_16_16_OFFSET",
-diff -Nur binutils-2.24.orig/bfd/Makefile.am binutils-2.24/bfd/Makefile.am
---- binutils-2.24.orig/bfd/Makefile.am 2013-12-02 10:30:28.000000000 +0100
-+++ binutils-2.24/bfd/Makefile.am 2016-06-30 21:26:12.573890000 +0200
-@@ -136,6 +136,7 @@
- cpu-moxie.lo \
- cpu-msp430.lo \
- cpu-mt.lo \
-+ cpu-nds32.lo \
- cpu-nios2.lo \
- cpu-ns32k.lo \
- cpu-openrisc.lo \
-@@ -220,6 +221,7 @@
- cpu-moxie.c \
- cpu-msp430.c \
- cpu-mt.c \
-+ cpu-nds32.c \
- cpu-ns32k.c \
- cpu-nios2.c \
- cpu-openrisc.c \
-@@ -349,6 +351,7 @@
- elf32-moxie.lo \
- elf32-msp430.lo \
- elf32-mt.lo \
-+ elf32-nds32.lo \
- elf32-nios2.lo \
- elf32-openrisc.lo \
- elf32-or32.lo \
-@@ -537,6 +540,7 @@
- elf32-moxie.c \
- elf32-msp430.c \
- elf32-mt.c \
-+ elf32-nds32.c \
- elf32-nios2.c \
- elf32-openrisc.c \
- elf32-or32.c \
-diff -Nur binutils-2.24.orig/bfd/Makefile.in binutils-2.24/bfd/Makefile.in
---- binutils-2.24.orig/bfd/Makefile.in 2013-12-02 10:30:30.000000000 +0100
-+++ binutils-2.24/bfd/Makefile.in 2016-06-30 21:26:12.573890000 +0200
-@@ -437,6 +437,7 @@
- cpu-moxie.lo \
- cpu-msp430.lo \
- cpu-mt.lo \
-+ cpu-nds32.lo \
- cpu-nios2.lo \
- cpu-ns32k.lo \
- cpu-openrisc.lo \
-@@ -521,6 +522,7 @@
- cpu-moxie.c \
- cpu-msp430.c \
- cpu-mt.c \
-+ cpu-nds32.c \
- cpu-ns32k.c \
- cpu-nios2.c \
- cpu-openrisc.c \
-@@ -651,6 +653,7 @@
- elf32-moxie.lo \
- elf32-msp430.lo \
- elf32-mt.lo \
-+ elf32-nds32.lo \
- elf32-nios2.lo \
- elf32-openrisc.lo \
- elf32-or32.lo \
-@@ -839,6 +842,7 @@
- elf32-moxie.c \
- elf32-msp430.c \
- elf32-mt.c \
-+ elf32-nds32.c \
- elf32-nios2.c \
- elf32-openrisc.c \
- elf32-or32.c \
-@@ -1352,6 +1356,7 @@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-moxie.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-msp430.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-mt.Plo@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-nds32.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-nios2.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-ns32k.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-openrisc.Plo@am__quote@
-@@ -1442,6 +1447,7 @@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-moxie.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-msp430.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-mt.Plo@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-nds32.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-nios2.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-openrisc.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-or32.Plo@am__quote@
-diff -Nur binutils-2.24.orig/bfd/reloc.c binutils-2.24/bfd/reloc.c
---- binutils-2.24.orig/bfd/reloc.c 2013-11-18 09:40:15.000000000 +0100
-+++ binutils-2.24/bfd/reloc.c 2016-06-30 21:26:12.573890000 +0200
-@@ -3839,6 +3839,366 @@
-
-
- ENUM
-+ BFD_RELOC_NDS32_20
-+ENUMDOC
-+ NDS32 relocs.
-+ This is a 20 bit absolute address.
-+ENUM
-+ BFD_RELOC_NDS32_9_PCREL
-+ENUMDOC
-+ This is a 9-bit pc-relative reloc with the right 1 bit assumed to be 0.
-+ENUM
-+ BFD_RELOC_NDS32_WORD_9_PCREL
-+ENUMDOC
-+ This is a 9-bit pc-relative reloc with the right 1 bit assumed to be 0.
-+ENUM
-+ BFD_RELOC_NDS32_15_PCREL
-+ENUMDOC
-+ This is an 15-bit reloc with the right 1 bit assumed to be 0.
-+ENUM
-+ BFD_RELOC_NDS32_17_PCREL
-+ENUMDOC
-+ This is an 17-bit reloc with the right 1 bit assumed to be 0.
-+ENUM
-+ BFD_RELOC_NDS32_25_PCREL
-+ENUMDOC
-+ This is a 25-bit reloc with the right 1 bit assumed to be 0.
-+ENUM
-+ BFD_RELOC_NDS32_HI20
-+ENUMDOC
-+ This is a 20-bit reloc containing the high 20 bits of an address
-+ used with the lower 12 bits
-+ENUM
-+ BFD_RELOC_NDS32_LO12S3
-+ENUMDOC
-+ This is a 12-bit reloc containing the lower 12 bits of an address
-+ then shift right by 3. This is used with ldi,sdi...
-+ENUM
-+ BFD_RELOC_NDS32_LO12S2
-+ENUMDOC
-+ This is a 12-bit reloc containing the lower 12 bits of an address
-+ then shift left by 2. This is used with lwi,swi...
-+ENUM
-+ BFD_RELOC_NDS32_LO12S1
-+ENUMDOC
-+ This is a 12-bit reloc containing the lower 12 bits of an address
-+ then shift left by 1. This is used with lhi,shi...
-+ENUM
-+ BFD_RELOC_NDS32_LO12S0
-+ENUMDOC
-+ This is a 12-bit reloc containing the lower 12 bits of an address
-+ then shift left by 0. This is used with lbisbi...
-+ENUM
-+ BFD_RELOC_NDS32_LO12S0_ORI
-+ENUMDOC
-+ This is a 12-bit reloc containing the lower 12 bits of an address
-+ then shift left by 0. This is only used with branch relaxations
-+ENUM
-+ BFD_RELOC_NDS32_SDA15S3
-+ENUMDOC
-+ This is a 15-bit reloc containing the small data area 18-bit signed offset
-+ and shift left by 3 for use in ldi, sdi...
-+ENUM
-+ BFD_RELOC_NDS32_SDA15S2
-+ENUMDOC
-+ This is a 15-bit reloc containing the small data area 17-bit signed offset
-+ and shift left by 2 for use in lwi, swi...
-+ENUM
-+ BFD_RELOC_NDS32_SDA15S1
-+ENUMDOC
-+ This is a 15-bit reloc containing the small data area 16-bit signed offset
-+ and shift left by 1 for use in lhi, shi...
-+ENUM
-+ BFD_RELOC_NDS32_SDA15S0
-+ENUMDOC
-+ This is a 15-bit reloc containing the small data area 15-bit signed offset
-+ and shift left by 0 for use in lbi, sbi...
-+ENUM
-+ BFD_RELOC_NDS32_SDA16S3
-+ENUMDOC
-+ This is a 16-bit reloc containing the small data area 16-bit signed offset
-+ and shift left by 3
-+ENUM
-+ BFD_RELOC_NDS32_SDA17S2
-+ENUMDOC
-+ This is a 17-bit reloc containing the small data area 17-bit signed offset
-+ and shift left by 2 for use in lwi.gp, swi.gp...
-+ENUM
-+ BFD_RELOC_NDS32_SDA18S1
-+ENUMDOC
-+ This is a 18-bit reloc containing the small data area 18-bit signed offset
-+ and shift left by 1 for use in lhi.gp, shi.gp...
-+ENUM
-+ BFD_RELOC_NDS32_SDA19S0
-+ENUMDOC
-+ This is a 19-bit reloc containing the small data area 19-bit signed offset
-+ and shift left by 0 for use in lbi.gp, sbi.gp...
-+ENUM
-+ BFD_RELOC_NDS32_SECURITY_16
-+ENUMDOC
-+ This is a 24-bit reloc for security check sum.
-+ENUM
-+ BFD_RELOC_NDS32_GOT20
-+ENUMX
-+ BFD_RELOC_NDS32_9_PLTREL
-+ENUMX
-+ BFD_RELOC_NDS32_25_PLTREL
-+ENUMX
-+ BFD_RELOC_NDS32_COPY
-+ENUMX
-+ BFD_RELOC_NDS32_GLOB_DAT
-+ENUMX
-+ BFD_RELOC_NDS32_JMP_SLOT
-+ENUMX
-+ BFD_RELOC_NDS32_RELATIVE
-+ENUMX
-+ BFD_RELOC_NDS32_GOTOFF
-+ENUMX
-+ BFD_RELOC_NDS32_GOTOFF_HI20
-+ENUMX
-+ BFD_RELOC_NDS32_GOTOFF_LO12
-+ENUMX
-+ BFD_RELOC_NDS32_GOTPC20
-+ENUMX
-+ BFD_RELOC_NDS32_GOT_HI20
-+ENUMX
-+ BFD_RELOC_NDS32_GOT_LO12
-+ENUMX
-+ BFD_RELOC_NDS32_GOTPC_HI20
-+ENUMX
-+ BFD_RELOC_NDS32_GOTPC_LO12
-+ENUMDOC
-+ for PIC
-+ENUM
-+ BFD_RELOC_NDS32_INSN16
-+ENUMX
-+ BFD_RELOC_NDS32_LABEL
-+ENUMX
-+ BFD_RELOC_NDS32_LONGCALL1
-+ENUMX
-+ BFD_RELOC_NDS32_LONGCALL2
-+ENUMX
-+ BFD_RELOC_NDS32_LONGCALL3
-+ENUMX
-+ BFD_RELOC_NDS32_LONGJUMP1
-+ENUMX
-+ BFD_RELOC_NDS32_LONGJUMP2
-+ENUMX
-+ BFD_RELOC_NDS32_LONGJUMP3
-+ENUMX
-+ BFD_RELOC_NDS32_LOADSTORE
-+ENUMX
-+ BFD_RELOC_NDS32_9_FIXED
-+ENUMX
-+ BFD_RELOC_NDS32_15_FIXED
-+ENUMX
-+ BFD_RELOC_NDS32_17_FIXED
-+ENUMX
-+ BFD_RELOC_NDS32_25_FIXED
-+ENUMX
-+ BFD_RELOC_NDS32_LONGCALL4
-+ENUMX
-+ BFD_RELOC_NDS32_LONGCALL5
-+ENUMX
-+ BFD_RELOC_NDS32_LONGCALL6
-+ENUMX
-+ BFD_RELOC_NDS32_LONGJUMP4
-+ENUMX
-+ BFD_RELOC_NDS32_LONGJUMP5
-+ENUMX
-+ BFD_RELOC_NDS32_LONGJUMP6
-+ENUMX
-+ BFD_RELOC_NDS32_LONGJUMP7
-+ENUMDOC
-+ for relax
-+ENUM
-+ BFD_RELOC_NDS32_PLTREL_HI20
-+ENUMX
-+ BFD_RELOC_NDS32_PLTREL_LO12
-+ENUMX
-+ BFD_RELOC_NDS32_PLT_GOTREL_HI20
-+ENUMX
-+ BFD_RELOC_NDS32_PLT_GOTREL_LO12
-+ENUMDOC
-+ for PIC
-+ENUM
-+ BFD_RELOC_NDS32_SDA12S2_DP
-+ENUMX
-+ BFD_RELOC_NDS32_SDA12S2_SP
-+ENUMX
-+ BFD_RELOC_NDS32_LO12S2_DP
-+ENUMX
-+ BFD_RELOC_NDS32_LO12S2_SP
-+ENUMDOC
-+ for floating point
-+ENUM
-+ BFD_RELOC_NDS32_DWARF2_OP1
-+ENUMX
-+ BFD_RELOC_NDS32_DWARF2_OP2
-+ENUMX
-+ BFD_RELOC_NDS32_DWARF2_LEB
-+ENUMDOC
-+ for dwarf2 debug_line.
-+ENUM
-+ BFD_RELOC_NDS32_UPDATE_TA
-+ENUMDOC
-+ for eliminate 16-bit instructions
-+ENUM
-+ BFD_RELOC_NDS32_PLT_GOTREL_LO20
-+ENUMX
-+ BFD_RELOC_NDS32_PLT_GOTREL_LO15
-+ENUMX
-+ BFD_RELOC_NDS32_PLT_GOTREL_LO19
-+ENUMX
-+ BFD_RELOC_NDS32_GOT_LO15
-+ENUMX
-+ BFD_RELOC_NDS32_GOT_LO19
-+ENUMX
-+ BFD_RELOC_NDS32_GOTOFF_LO15
-+ENUMX
-+ BFD_RELOC_NDS32_GOTOFF_LO19
-+ENUMX
-+ BFD_RELOC_NDS32_GOT15S2
-+ENUMX
-+ BFD_RELOC_NDS32_GOT17S2
-+ENUMDOC
-+ for PIC object relaxation
-+ENUM
-+ BFD_RELOC_NDS32_5
-+ENUMDOC
-+ NDS32 relocs.
-+ This is a 5 bit absolute address.
-+ENUM
-+ BFD_RELOC_NDS32_10_UPCREL
-+ENUMDOC
-+ This is a 10-bit unsigned pc-relative reloc with the right 1 bit assumed to be 0.
-+ENUM
-+ BFD_RELOC_NDS32_SDA_FP7U2_RELA
-+ENUMDOC
-+ If fp were omitted, fp can used as another gp.
-+ENUM
-+ BFD_RELOC_NDS32_RELAX_ENTRY
-+ENUMX
-+ BFD_RELOC_NDS32_GOT_SUFF
-+ENUMX
-+ BFD_RELOC_NDS32_GOTOFF_SUFF
-+ENUMX
-+ BFD_RELOC_NDS32_PLT_GOT_SUFF
-+ENUMX
-+ BFD_RELOC_NDS32_MULCALL_SUFF
-+ENUMX
-+ BFD_RELOC_NDS32_PTR
-+ENUMX
-+ BFD_RELOC_NDS32_PTR_COUNT
-+ENUMX
-+ BFD_RELOC_NDS32_PTR_RESOLVED
-+ENUMX
-+ BFD_RELOC_NDS32_PLTBLOCK
-+ENUMX
-+ BFD_RELOC_NDS32_RELAX_REGION_BEGIN
-+ENUMX
-+ BFD_RELOC_NDS32_RELAX_REGION_END
-+ENUMX
-+ BFD_RELOC_NDS32_MINUEND
-+ENUMX
-+ BFD_RELOC_NDS32_SUBTRAHEND
-+ENUMX
-+ BFD_RELOC_NDS32_DIFF8
-+ENUMX
-+ BFD_RELOC_NDS32_DIFF16
-+ENUMX
-+ BFD_RELOC_NDS32_DIFF32
-+ENUMX
-+ BFD_RELOC_NDS32_DIFF_ULEB128
-+ENUMX
-+ BFD_RELOC_NDS32_EMPTY
-+ENUMDOC
-+ relaxation relative relocation types
-+ENUM
-+ BFD_RELOC_NDS32_25_ABS
-+ENUMDOC
-+ This is a 25 bit absolute address.
-+ENUM
-+ BFD_RELOC_NDS32_DATA
-+ENUMX
-+ BFD_RELOC_NDS32_TRAN
-+ENUMX
-+ BFD_RELOC_NDS32_17IFC_PCREL
-+ENUMX
-+ BFD_RELOC_NDS32_10IFCU_PCREL
-+ENUMDOC
-+ For ex9 and ifc using.
-+ENUM
-+ BFD_RELOC_NDS32_TPOFF
-+ENUMX
-+ BFD_RELOC_NDS32_GOTTPOFF
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_LE_HI20
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_LE_LO12
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_LE_20
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_LE_15S0
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_LE_15S1
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_LE_15S2
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_LE_ADD
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_LE_LS
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_IE_HI20
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_IE_LO12
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_IE_LO12S2
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_IEGP_HI20
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_IEGP_LO12
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_IEGP_LO12S2
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_IEGP_LW
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_DESC
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_DESC_HI20
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_DESC_LO12
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_DESC_20
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_DESC_SDA17S2
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_DESC_ADD
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_DESC_FUNC
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_DESC_CALL
-+ENUMX
-+ BFD_RELOC_NDS32_TLS_DESC_MEM
-+ENUMX
-+ BFD_RELOC_NDS32_REMOVE
-+ENUMX
-+ BFD_RELOC_NDS32_GROUP
-+ENUMDOC
-+ For TLS.
-+
-+ENUM
-+ BFD_RELOC_NDS32_ICT
-+ENUMX
-+ BFD_RELOC_NDS32_ICT_HI20
-+ENUMX
-+ BFD_RELOC_NDS32_ICT_LO12
-+ENUMX
-+ BFD_RELOC_NDS32_ICT_25PC
-+ENUMDOC
-+ Jump-patch table relative relocations.
-+
-+ENUM
- BFD_RELOC_V850_9_PCREL
- ENUMDOC
- This is a 9-bit reloc
-diff -Nur binutils-2.24.orig/bfd/section.c binutils-2.24/bfd/section.c
---- binutils-2.24.orig/bfd/section.c 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/bfd/section.c 2016-06-30 21:26:12.573890000 +0200
-@@ -542,6 +542,32 @@
- . int size;
- .};
- .
-+.{* Note: the following are provided as inline functions rather than macros
-+. because not all callers use the return value. A macro implementation
-+. would use a comma expression, eg: "((ptr)->foo = val, TRUE)" and some
-+. compilers will complain about comma expressions that have no effect. *}
-+.static inline bfd_boolean
-+.bfd_set_section_userdata (bfd * abfd ATTRIBUTE_UNUSED, asection * ptr, void * val)
-+.{
-+. ptr->userdata = val;
-+. return TRUE;
-+.}
-+.
-+.static inline bfd_boolean
-+.bfd_set_section_vma (bfd * abfd ATTRIBUTE_UNUSED, asection * ptr, bfd_vma val)
-+.{
-+. ptr->vma = ptr->lma = val;
-+. ptr->user_set_vma = TRUE;
-+. return TRUE;
-+.}
-+.
-+.static inline bfd_boolean
-+.bfd_set_section_alignment (bfd * abfd ATTRIBUTE_UNUSED, asection * ptr, unsigned int val)
-+.{
-+. ptr->alignment_power = val;
-+. return TRUE;
-+.}
-+.
- .{* These sections are global, and are managed by BFD. The application
- . and target back end are not permitted to change the values in
- . these sections. *}
-diff -Nur binutils-2.24.orig/bfd/targets.c binutils-2.24/bfd/targets.c
---- binutils-2.24.orig/bfd/targets.c 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/bfd/targets.c 2016-06-30 21:26:12.573890000 +0200
-@@ -673,6 +673,10 @@
- extern const bfd_target bfd_elf32_ntradlittlemips_vec;
- extern const bfd_target bfd_elf32_ntradbigmips_freebsd_vec;
- extern const bfd_target bfd_elf32_ntradlittlemips_freebsd_vec;
-+extern const bfd_target bfd_elf32_nds32be_vec;
-+extern const bfd_target bfd_elf32_nds32le_vec;
-+extern const bfd_target bfd_elf32_nds32belin_vec;
-+extern const bfd_target bfd_elf32_nds32lelin_vec;
- extern const bfd_target bfd_elf32_openrisc_vec;
- extern const bfd_target bfd_elf32_or32_big_vec;
- extern const bfd_target bfd_elf32_pj_vec;
-@@ -1061,6 +1065,10 @@
- &bfd_elf32_ntradbigmips_freebsd_vec,
- &bfd_elf32_ntradlittlemips_freebsd_vec,
- #endif
-+ &bfd_elf32_nds32be_vec,
-+ &bfd_elf32_nds32le_vec,
-+ &bfd_elf32_nds32belin_vec,
-+ &bfd_elf32_nds32lelin_vec,
- &bfd_elf32_openrisc_vec,
- &bfd_elf32_or32_big_vec,
- &bfd_elf32_pj_vec,
-diff -Nur binutils-2.24.orig/binutils/arlex.c binutils-2.24/binutils/arlex.c
---- binutils-2.24.orig/binutils/arlex.c 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/arlex.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,2036 +0,0 @@
--
--#line 3 "arlex.c"
--
--#define YY_INT_ALIGNED short int
--
--/* A lexical scanner generated by flex */
--
--#define FLEX_SCANNER
--#define YY_FLEX_MAJOR_VERSION 2
--#define YY_FLEX_MINOR_VERSION 5
--#define YY_FLEX_SUBMINOR_VERSION 35
--#if YY_FLEX_SUBMINOR_VERSION > 0
--#define FLEX_BETA
--#endif
--
--/* First, we deal with platform-specific or compiler-specific issues. */
--
--/* begin standard C headers. */
--#include <stdio.h>
--#include <string.h>
--#include <errno.h>
--#include <stdlib.h>
--
--/* end standard C headers. */
--
--/* flex integer type definitions */
--
--#ifndef FLEXINT_H
--#define FLEXINT_H
--
--/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */
--
--#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
--
--/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
-- * if you want the limit (max/min) macros for int types.
-- */
--#ifndef __STDC_LIMIT_MACROS
--#define __STDC_LIMIT_MACROS 1
--#endif
--
--#include <inttypes.h>
--typedef int8_t flex_int8_t;
--typedef uint8_t flex_uint8_t;
--typedef int16_t flex_int16_t;
--typedef uint16_t flex_uint16_t;
--typedef int32_t flex_int32_t;
--typedef uint32_t flex_uint32_t;
--typedef uint64_t flex_uint64_t;
--#else
--typedef signed char flex_int8_t;
--typedef short int flex_int16_t;
--typedef int flex_int32_t;
--typedef unsigned char flex_uint8_t;
--typedef unsigned short int flex_uint16_t;
--typedef unsigned int flex_uint32_t;
--#endif /* ! C99 */
--
--/* Limits of integral types. */
--#ifndef INT8_MIN
--#define INT8_MIN (-128)
--#endif
--#ifndef INT16_MIN
--#define INT16_MIN (-32767-1)
--#endif
--#ifndef INT32_MIN
--#define INT32_MIN (-2147483647-1)
--#endif
--#ifndef INT8_MAX
--#define INT8_MAX (127)
--#endif
--#ifndef INT16_MAX
--#define INT16_MAX (32767)
--#endif
--#ifndef INT32_MAX
--#define INT32_MAX (2147483647)
--#endif
--#ifndef UINT8_MAX
--#define UINT8_MAX (255U)
--#endif
--#ifndef UINT16_MAX
--#define UINT16_MAX (65535U)
--#endif
--#ifndef UINT32_MAX
--#define UINT32_MAX (4294967295U)
--#endif
--
--#endif /* ! FLEXINT_H */
--
--#ifdef __cplusplus
--
--/* The "const" storage-class-modifier is valid. */
--#define YY_USE_CONST
--
--#else /* ! __cplusplus */
--
--/* C99 requires __STDC__ to be defined as 1. */
--#if defined (__STDC__)
--
--#define YY_USE_CONST
--
--#endif /* defined (__STDC__) */
--#endif /* ! __cplusplus */
--
--#ifdef YY_USE_CONST
--#define yyconst const
--#else
--#define yyconst
--#endif
--
--/* Returned upon end-of-file. */
--#define YY_NULL 0
--
--/* Promotes a possibly negative, possibly signed char to an unsigned
-- * integer for use as an array index. If the signed char is negative,
-- * we want to instead treat it as an 8-bit unsigned char, hence the
-- * double cast.
-- */
--#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c)
--
--/* Enter a start condition. This macro really ought to take a parameter,
-- * but we do it the disgusting crufty way forced on us by the ()-less
-- * definition of BEGIN.
-- */
--#define BEGIN (yy_start) = 1 + 2 *
--
--/* Translate the current start state into a value that can be later handed
-- * to BEGIN to return to the state. The YYSTATE alias is for lex
-- * compatibility.
-- */
--#define YY_START (((yy_start) - 1) / 2)
--#define YYSTATE YY_START
--
--/* Action number for EOF rule of a given start state. */
--#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1)
--
--/* Special action meaning "start processing a new file". */
--#define YY_NEW_FILE yyrestart(yyin )
--
--#define YY_END_OF_BUFFER_CHAR 0
--
--/* Size of default input buffer. */
--#ifndef YY_BUF_SIZE
--#define YY_BUF_SIZE 16384
--#endif
--
--/* The state buf must be large enough to hold one state per character in the main buffer.
-- */
--#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type))
--
--#ifndef YY_TYPEDEF_YY_BUFFER_STATE
--#define YY_TYPEDEF_YY_BUFFER_STATE
--typedef struct yy_buffer_state *YY_BUFFER_STATE;
--#endif
--
--#ifndef YY_TYPEDEF_YY_SIZE_T
--#define YY_TYPEDEF_YY_SIZE_T
--typedef size_t yy_size_t;
--#endif
--
--extern yy_size_t yyleng;
--
--extern FILE *yyin, *yyout;
--
--#define EOB_ACT_CONTINUE_SCAN 0
--#define EOB_ACT_END_OF_FILE 1
--#define EOB_ACT_LAST_MATCH 2
--
-- #define YY_LESS_LINENO(n)
--
--/* Return all but the first "n" matched characters back to the input stream. */
--#define yyless(n) \
-- do \
-- { \
-- /* Undo effects of setting up yytext. */ \
-- int yyless_macro_arg = (n); \
-- YY_LESS_LINENO(yyless_macro_arg);\
-- *yy_cp = (yy_hold_char); \
-- YY_RESTORE_YY_MORE_OFFSET \
-- (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \
-- YY_DO_BEFORE_ACTION; /* set up yytext again */ \
-- } \
-- while ( 0 )
--
--#define unput(c) yyunput( c, (yytext_ptr) )
--
--#ifndef YY_STRUCT_YY_BUFFER_STATE
--#define YY_STRUCT_YY_BUFFER_STATE
--struct yy_buffer_state
-- {
-- FILE *yy_input_file;
--
-- char *yy_ch_buf; /* input buffer */
-- char *yy_buf_pos; /* current position in input buffer */
--
-- /* Size of input buffer in bytes, not including room for EOB
-- * characters.
-- */
-- yy_size_t yy_buf_size;
--
-- /* Number of characters read into yy_ch_buf, not including EOB
-- * characters.
-- */
-- yy_size_t yy_n_chars;
--
-- /* Whether we "own" the buffer - i.e., we know we created it,
-- * and can realloc() it to grow it, and should free() it to
-- * delete it.
-- */
-- int yy_is_our_buffer;
--
-- /* Whether this is an "interactive" input source; if so, and
-- * if we're using stdio for input, then we want to use getc()
-- * instead of fread(), to make sure we stop fetching input after
-- * each newline.
-- */
-- int yy_is_interactive;
--
-- /* Whether we're considered to be at the beginning of a line.
-- * If so, '^' rules will be active on the next match, otherwise
-- * not.
-- */
-- int yy_at_bol;
--
-- int yy_bs_lineno; /**< The line count. */
-- int yy_bs_column; /**< The column count. */
--
-- /* Whether to try to fill the input buffer when we reach the
-- * end of it.
-- */
-- int yy_fill_buffer;
--
-- int yy_buffer_status;
--
--#define YY_BUFFER_NEW 0
--#define YY_BUFFER_NORMAL 1
-- /* When an EOF's been seen but there's still some text to process
-- * then we mark the buffer as YY_EOF_PENDING, to indicate that we
-- * shouldn't try reading from the input source any more. We might
-- * still have a bunch of tokens to match, though, because of
-- * possible backing-up.
-- *
-- * When we actually see the EOF, we change the status to "new"
-- * (via yyrestart()), so that the user can continue scanning by
-- * just pointing yyin at a new input file.
-- */
--#define YY_BUFFER_EOF_PENDING 2
--
-- };
--#endif /* !YY_STRUCT_YY_BUFFER_STATE */
--
--/* Stack of input buffers. */
--static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */
--static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */
--static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */
--
--/* We provide macros for accessing buffer states in case in the
-- * future we want to put the buffer states in a more general
-- * "scanner state".
-- *
-- * Returns the top of the stack, or NULL.
-- */
--#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \
-- ? (yy_buffer_stack)[(yy_buffer_stack_top)] \
-- : NULL)
--
--/* Same as previous macro, but useful when we know that the buffer stack is not
-- * NULL or when we need an lvalue. For internal use only.
-- */
--#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)]
--
--/* yy_hold_char holds the character lost when yytext is formed. */
--static char yy_hold_char;
--static yy_size_t yy_n_chars; /* number of characters read into yy_ch_buf */
--yy_size_t yyleng;
--
--/* Points to current character in buffer. */
--static char *yy_c_buf_p = (char *) 0;
--static int yy_init = 0; /* whether we need to initialize */
--static int yy_start = 0; /* start state number */
--
--/* Flag which is used to allow yywrap()'s to do buffer switches
-- * instead of setting up a fresh yyin. A bit of a hack ...
-- */
--static int yy_did_buffer_switch_on_eof;
--
--void yyrestart (FILE *input_file );
--void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer );
--YY_BUFFER_STATE yy_create_buffer (FILE *file,int size );
--void yy_delete_buffer (YY_BUFFER_STATE b );
--void yy_flush_buffer (YY_BUFFER_STATE b );
--void yypush_buffer_state (YY_BUFFER_STATE new_buffer );
--void yypop_buffer_state (void );
--
--static void yyensure_buffer_stack (void );
--static void yy_load_buffer_state (void );
--static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file );
--
--#define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER )
--
--YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size );
--YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str );
--YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,yy_size_t len );
--
--void *yyalloc (yy_size_t );
--void *yyrealloc (void *,yy_size_t );
--void yyfree (void * );
--
--#define yy_new_buffer yy_create_buffer
--
--#define yy_set_interactive(is_interactive) \
-- { \
-- if ( ! YY_CURRENT_BUFFER ){ \
-- yyensure_buffer_stack (); \
-- YY_CURRENT_BUFFER_LVALUE = \
-- yy_create_buffer(yyin,YY_BUF_SIZE ); \
-- } \
-- YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \
-- }
--
--#define yy_set_bol(at_bol) \
-- { \
-- if ( ! YY_CURRENT_BUFFER ){\
-- yyensure_buffer_stack (); \
-- YY_CURRENT_BUFFER_LVALUE = \
-- yy_create_buffer(yyin,YY_BUF_SIZE ); \
-- } \
-- YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \
-- }
--
--#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol)
--
--/* Begin user sect3 */
--
--typedef unsigned char YY_CHAR;
--
--FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0;
--
--typedef int yy_state_type;
--
--extern int yylineno;
--
--int yylineno = 1;
--
--extern char *yytext;
--#define yytext_ptr yytext
--
--static yy_state_type yy_get_previous_state (void );
--static yy_state_type yy_try_NUL_trans (yy_state_type current_state );
--static int yy_get_next_buffer (void );
--static void yy_fatal_error (yyconst char msg[] );
--
--/* Done after the current pattern has been matched and before the
-- * corresponding action - sets up yytext.
-- */
--#define YY_DO_BEFORE_ACTION \
-- (yytext_ptr) = yy_bp; \
-- yyleng = (yy_size_t) (yy_cp - yy_bp); \
-- (yy_hold_char) = *yy_cp; \
-- *yy_cp = '\0'; \
-- (yy_c_buf_p) = yy_cp;
--
--#define YY_NUM_RULES 40
--#define YY_END_OF_BUFFER 41
--/* This struct is not used in this scanner,
-- but its presence is necessary. */
--struct yy_trans_info
-- {
-- flex_int32_t yy_verify;
-- flex_int32_t yy_nxt;
-- };
--static yyconst flex_int16_t yy_accept[177] =
-- { 0,
-- 0, 0, 41, 40, 39, 38, 35, 32, 33, 36,
-- 40, 34, 37, 35, 35, 35, 35, 35, 35, 35,
-- 35, 35, 35, 35, 35, 35, 35, 35, 35, 35,
-- 35, 35, 35, 35, 35, 35, 36, 31, 37, 35,
-- 35, 35, 35, 35, 35, 35, 35, 35, 35, 35,
-- 35, 35, 35, 35, 35, 35, 35, 35, 35, 35,
-- 35, 35, 35, 35, 35, 35, 35, 35, 35, 35,
-- 35, 35, 7, 35, 35, 35, 35, 35, 35, 35,
-- 35, 35, 35, 35, 35, 35, 22, 35, 35, 35,
-- 35, 35, 35, 35, 35, 35, 35, 35, 35, 35,
--
-- 35, 35, 35, 10, 11, 12, 35, 15, 35, 35,
-- 35, 35, 35, 35, 35, 35, 35, 25, 26, 27,
-- 35, 30, 35, 35, 35, 3, 35, 35, 35, 35,
-- 35, 35, 35, 35, 35, 18, 35, 35, 35, 35,
-- 35, 35, 35, 1, 2, 4, 5, 35, 35, 35,
-- 35, 35, 16, 17, 19, 20, 35, 35, 35, 35,
-- 35, 35, 8, 9, 13, 14, 35, 23, 24, 28,
-- 29, 35, 35, 6, 21, 0
-- } ;
--
--static yyconst flex_int32_t yy_ec[256] =
-- { 0,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 2,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 3, 1, 1, 1, 4, 1, 1, 1, 5,
-- 6, 7, 8, 9, 4, 4, 4, 4, 4, 4,
-- 4, 4, 4, 4, 4, 4, 4, 4, 10, 1,
-- 1, 1, 1, 1, 11, 12, 13, 14, 15, 16,
-- 4, 17, 18, 4, 4, 19, 20, 21, 22, 23,
-- 4, 24, 25, 26, 27, 28, 4, 29, 30, 4,
-- 1, 4, 1, 1, 4, 1, 31, 32, 33, 34,
--
-- 35, 36, 4, 37, 38, 4, 4, 39, 40, 41,
-- 42, 43, 4, 44, 45, 46, 47, 48, 4, 49,
-- 50, 4, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
--
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1
-- } ;
--
--static yyconst flex_int32_t yy_meta[51] =
-- { 0,
-- 1, 2, 1, 3, 1, 1, 1, 1, 1, 1,
-- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
-- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
-- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
-- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3
-- } ;
--
--static yyconst flex_int16_t yy_base[180] =
-- { 0,
-- 0, 0, 193, 194, 194, 194, 0, 194, 194, 0,
-- 190, 194, 0, 177, 32, 37, 32, 163, 174, 170,
-- 164, 171, 174, 169, 149, 15, 22, 17, 135, 146,
-- 142, 136, 143, 146, 141, 0, 0, 194, 0, 161,
-- 159, 158, 153, 147, 156, 143, 149, 148, 141, 150,
-- 141, 135, 138, 127, 125, 124, 119, 113, 122, 109,
-- 115, 114, 107, 116, 107, 101, 104, 43, 136, 135,
-- 130, 129, 0, 119, 123, 118, 114, 118, 119, 122,
-- 124, 25, 104, 103, 98, 97, 0, 87, 91, 86,
-- 82, 86, 87, 90, 92, 105, 100, 97, 94, 93,
--
-- 105, 106, 102, 0, 0, 0, 104, 0, 92, 75,
-- 70, 67, 64, 63, 75, 76, 72, 0, 0, 0,
-- 74, 0, 62, 91, 88, 0, 86, 85, 73, 85,
-- 79, 83, 70, 62, 59, 0, 57, 56, 44, 56,
-- 50, 54, 41, 0, 0, 0, 0, 63, 58, 59,
-- 67, 66, 0, 0, 0, 0, 38, 33, 34, 42,
-- 41, 51, 0, 0, 0, 0, 30, 0, 0, 0,
-- 0, 43, 21, 0, 0, 194, 65, 66, 69
-- } ;
--
--static yyconst flex_int16_t yy_def[180] =
-- { 0,
-- 176, 1, 176, 176, 176, 176, 177, 176, 176, 178,
-- 176, 176, 179, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 178, 176, 179, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
--
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 0, 176, 176, 176
-- } ;
--
--static yyconst flex_int16_t yy_nxt[245] =
-- { 0,
-- 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
-- 14, 7, 15, 16, 17, 18, 19, 7, 20, 7,
-- 7, 21, 7, 22, 23, 7, 7, 24, 7, 7,
-- 25, 7, 26, 27, 28, 29, 30, 7, 31, 7,
-- 7, 32, 7, 33, 34, 7, 7, 35, 7, 7,
-- 41, 43, 45, 55, 44, 42, 57, 59, 56, 58,
-- 46, 96, 97, 110, 111, 60, 37, 36, 37, 39,
-- 175, 39, 174, 173, 172, 171, 170, 169, 168, 167,
-- 166, 165, 164, 163, 162, 161, 160, 159, 158, 157,
-- 156, 155, 154, 153, 152, 151, 150, 149, 148, 147,
--
-- 146, 145, 144, 143, 142, 141, 140, 139, 138, 137,
-- 136, 135, 134, 133, 132, 131, 130, 129, 128, 127,
-- 126, 125, 124, 123, 122, 121, 120, 119, 118, 117,
-- 116, 115, 114, 113, 112, 109, 108, 107, 106, 105,
-- 104, 103, 102, 101, 100, 99, 98, 95, 94, 93,
-- 92, 91, 90, 89, 88, 87, 86, 85, 84, 83,
-- 82, 81, 80, 79, 78, 77, 76, 75, 74, 73,
-- 72, 71, 70, 69, 68, 67, 66, 65, 64, 63,
-- 62, 61, 54, 53, 52, 51, 50, 49, 48, 47,
-- 40, 38, 176, 3, 176, 176, 176, 176, 176, 176,
--
-- 176, 176, 176, 176, 176, 176, 176, 176, 176, 176,
-- 176, 176, 176, 176, 176, 176, 176, 176, 176, 176,
-- 176, 176, 176, 176, 176, 176, 176, 176, 176, 176,
-- 176, 176, 176, 176, 176, 176, 176, 176, 176, 176,
-- 176, 176, 176, 176
-- } ;
--
--static yyconst flex_int16_t yy_chk[245] =
-- { 0,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 15, 16, 17, 26, 16, 15, 27, 28, 26, 27,
-- 17, 68, 68, 82, 82, 28, 178, 177, 178, 179,
-- 173, 179, 172, 167, 162, 161, 160, 159, 158, 157,
-- 152, 151, 150, 149, 148, 143, 142, 141, 140, 139,
-- 138, 137, 135, 134, 133, 132, 131, 130, 129, 128,
--
-- 127, 125, 124, 123, 121, 117, 116, 115, 114, 113,
-- 112, 111, 110, 109, 107, 103, 102, 101, 100, 99,
-- 98, 97, 96, 95, 94, 93, 92, 91, 90, 89,
-- 88, 86, 85, 84, 83, 81, 80, 79, 78, 77,
-- 76, 75, 74, 72, 71, 70, 69, 67, 66, 65,
-- 64, 63, 62, 61, 60, 59, 58, 57, 56, 55,
-- 54, 53, 52, 51, 50, 49, 48, 47, 46, 45,
-- 44, 43, 42, 41, 40, 35, 34, 33, 32, 31,
-- 30, 29, 25, 24, 23, 22, 21, 20, 19, 18,
-- 14, 11, 3, 176, 176, 176, 176, 176, 176, 176,
--
-- 176, 176, 176, 176, 176, 176, 176, 176, 176, 176,
-- 176, 176, 176, 176, 176, 176, 176, 176, 176, 176,
-- 176, 176, 176, 176, 176, 176, 176, 176, 176, 176,
-- 176, 176, 176, 176, 176, 176, 176, 176, 176, 176,
-- 176, 176, 176, 176
-- } ;
--
--static yy_state_type yy_last_accepting_state;
--static char *yy_last_accepting_cpos;
--
--extern int yy_flex_debug;
--int yy_flex_debug = 0;
--
--/* The intent behind this definition is that it'll catch
-- * any uses of REJECT which flex missed.
-- */
--#define REJECT reject_used_but_not_detected
--#define yymore() yymore_used_but_not_detected
--#define YY_MORE_ADJ 0
--#define YY_RESTORE_YY_MORE_OFFSET
--char *yytext;
--#line 1 "arlex.l"
--#define YY_NO_INPUT 1
--#line 4 "arlex.l"
--/* arlex.l - Strange script language lexer */
--
--/* Copyright 1992, 1997, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2011
-- Free Software Foundation, Inc.
--
-- This file is part of GNU Binutils.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-- MA 02110-1301, USA. */
--
--
--/* Contributed by Steve Chamberlain <sac@cygnus.com>. */
--
--#define DONTDECLARE_MALLOC
--#include "ansidecl.h"
--#include "libiberty.h"
--#include "arparse.h"
--
--#ifndef YY_NO_UNPUT
--#define YY_NO_UNPUT
--#endif
--
--extern int yylex (void);
--
--int linenumber;
--#line 599 "arlex.c"
--
--#define INITIAL 0
--
--#ifndef YY_NO_UNISTD_H
--/* Special case for "unistd.h", since it is non-ANSI. We include it way
-- * down here because we want the user's section 1 to have been scanned first.
-- * The user has a chance to override it with an option.
-- */
--#include <unistd.h>
--#endif
--
--#ifndef YY_EXTRA_TYPE
--#define YY_EXTRA_TYPE void *
--#endif
--
--static int yy_init_globals (void );
--
--/* Accessor methods to globals.
-- These are made visible to non-reentrant scanners for convenience. */
--
--int yylex_destroy (void );
--
--int yyget_debug (void );
--
--void yyset_debug (int debug_flag );
--
--YY_EXTRA_TYPE yyget_extra (void );
--
--void yyset_extra (YY_EXTRA_TYPE user_defined );
--
--FILE *yyget_in (void );
--
--void yyset_in (FILE * in_str );
--
--FILE *yyget_out (void );
--
--void yyset_out (FILE * out_str );
--
--yy_size_t yyget_leng (void );
--
--char *yyget_text (void );
--
--int yyget_lineno (void );
--
--void yyset_lineno (int line_number );
--
--/* Macros after this point can all be overridden by user definitions in
-- * section 1.
-- */
--
--#ifndef YY_SKIP_YYWRAP
--#ifdef __cplusplus
--extern "C" int yywrap (void );
--#else
--extern int yywrap (void );
--#endif
--#endif
--
--#ifndef yytext_ptr
--static void yy_flex_strncpy (char *,yyconst char *,int );
--#endif
--
--#ifdef YY_NEED_STRLEN
--static int yy_flex_strlen (yyconst char * );
--#endif
--
--#ifndef YY_NO_INPUT
--
--#ifdef __cplusplus
--static int yyinput (void );
--#else
--static int input (void );
--#endif
--
--#endif
--
--/* Amount of stuff to slurp up with each read. */
--#ifndef YY_READ_BUF_SIZE
--#define YY_READ_BUF_SIZE 8192
--#endif
--
--/* Copy whatever the last rule matched to the standard output. */
--#ifndef ECHO
--/* This used to be an fputs(), but since the string might contain NUL's,
-- * we now use fwrite().
-- */
--#define ECHO fwrite( yytext, yyleng, 1, yyout )
--#endif
--
--/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL,
-- * is returned in "result".
-- */
--#ifndef YY_INPUT
--#define YY_INPUT(buf,result,max_size) \
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \
-- { \
-- int c = '*'; \
-- yy_size_t n; \
-- for ( n = 0; n < max_size && \
-- (c = getc( yyin )) != EOF && c != '\n'; ++n ) \
-- buf[n] = (char) c; \
-- if ( c == '\n' ) \
-- buf[n++] = (char) c; \
-- if ( c == EOF && ferror( yyin ) ) \
-- YY_FATAL_ERROR( "input in flex scanner failed" ); \
-- result = n; \
-- } \
-- else \
-- { \
-- errno=0; \
-- while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \
-- { \
-- if( errno != EINTR) \
-- { \
-- YY_FATAL_ERROR( "input in flex scanner failed" ); \
-- break; \
-- } \
-- errno=0; \
-- clearerr(yyin); \
-- } \
-- }\
--\
--
--#endif
--
--/* No semi-colon after return; correct usage is to write "yyterminate();" -
-- * we don't want an extra ';' after the "return" because that will cause
-- * some compilers to complain about unreachable statements.
-- */
--#ifndef yyterminate
--#define yyterminate() return YY_NULL
--#endif
--
--/* Number of entries by which start-condition stack grows. */
--#ifndef YY_START_STACK_INCR
--#define YY_START_STACK_INCR 25
--#endif
--
--/* Report a fatal error. */
--#ifndef YY_FATAL_ERROR
--#define YY_FATAL_ERROR(msg) yy_fatal_error( msg )
--#endif
--
--/* end tables serialization structures and prototypes */
--
--/* Default declaration of generated scanner - a define so the user can
-- * easily add parameters.
-- */
--#ifndef YY_DECL
--#define YY_DECL_IS_OURS 1
--
--extern int yylex (void);
--
--#define YY_DECL int yylex (void)
--#endif /* !YY_DECL */
--
--/* Code executed at the beginning of each rule, after yytext and yyleng
-- * have been set up.
-- */
--#ifndef YY_USER_ACTION
--#define YY_USER_ACTION
--#endif
--
--/* Code executed at the end of each rule. */
--#ifndef YY_BREAK
--#define YY_BREAK break;
--#endif
--
--#define YY_RULE_SETUP \
-- YY_USER_ACTION
--
--/** The main scanner function which does all the work.
-- */
--YY_DECL
--{
-- register yy_state_type yy_current_state;
-- register char *yy_cp, *yy_bp;
-- register int yy_act;
--
--#line 46 "arlex.l"
--
--
--#line 782 "arlex.c"
--
-- if ( !(yy_init) )
-- {
-- (yy_init) = 1;
--
--#ifdef YY_USER_INIT
-- YY_USER_INIT;
--#endif
--
-- if ( ! (yy_start) )
-- (yy_start) = 1; /* first start state */
--
-- if ( ! yyin )
-- yyin = stdin;
--
-- if ( ! yyout )
-- yyout = stdout;
--
-- if ( ! YY_CURRENT_BUFFER ) {
-- yyensure_buffer_stack ();
-- YY_CURRENT_BUFFER_LVALUE =
-- yy_create_buffer(yyin,YY_BUF_SIZE );
-- }
--
-- yy_load_buffer_state( );
-- }
--
-- while ( 1 ) /* loops until end-of-file is reached */
-- {
-- yy_cp = (yy_c_buf_p);
--
-- /* Support of yytext. */
-- *yy_cp = (yy_hold_char);
--
-- /* yy_bp points to the position in yy_ch_buf of the start of
-- * the current run.
-- */
-- yy_bp = yy_cp;
--
-- yy_current_state = (yy_start);
--yy_match:
-- do
-- {
-- register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)];
-- if ( yy_accept[yy_current_state] )
-- {
-- (yy_last_accepting_state) = yy_current_state;
-- (yy_last_accepting_cpos) = yy_cp;
-- }
-- while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
-- {
-- yy_current_state = (int) yy_def[yy_current_state];
-- if ( yy_current_state >= 177 )
-- yy_c = yy_meta[(unsigned int) yy_c];
-- }
-- yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-- ++yy_cp;
-- }
-- while ( yy_base[yy_current_state] != 194 );
--
--yy_find_action:
-- yy_act = yy_accept[yy_current_state];
-- if ( yy_act == 0 )
-- { /* have to back up */
-- yy_cp = (yy_last_accepting_cpos);
-- yy_current_state = (yy_last_accepting_state);
-- yy_act = yy_accept[yy_current_state];
-- }
--
-- YY_DO_BEFORE_ACTION;
--
--do_action: /* This label is used only to access EOF actions. */
--
-- switch ( yy_act )
-- { /* beginning of action switch */
-- case 0: /* must back up */
-- /* undo the effects of YY_DO_BEFORE_ACTION */
-- *yy_cp = (yy_hold_char);
-- yy_cp = (yy_last_accepting_cpos);
-- yy_current_state = (yy_last_accepting_state);
-- goto yy_find_action;
--
--case 1:
--YY_RULE_SETUP
--#line 48 "arlex.l"
--{ return ADDLIB; }
-- YY_BREAK
--case 2:
--YY_RULE_SETUP
--#line 49 "arlex.l"
--{ return ADDMOD; }
-- YY_BREAK
--case 3:
--YY_RULE_SETUP
--#line 50 "arlex.l"
--{ return CLEAR; }
-- YY_BREAK
--case 4:
--YY_RULE_SETUP
--#line 51 "arlex.l"
--{ return CREATE; }
-- YY_BREAK
--case 5:
--YY_RULE_SETUP
--#line 52 "arlex.l"
--{ return DELETE; }
-- YY_BREAK
--case 6:
--YY_RULE_SETUP
--#line 53 "arlex.l"
--{ return DIRECTORY; }
-- YY_BREAK
--case 7:
--YY_RULE_SETUP
--#line 54 "arlex.l"
--{ return END; }
-- YY_BREAK
--case 8:
--YY_RULE_SETUP
--#line 55 "arlex.l"
--{ return EXTRACT; }
-- YY_BREAK
--case 9:
--YY_RULE_SETUP
--#line 56 "arlex.l"
--{ return FULLDIR; }
-- YY_BREAK
--case 10:
--YY_RULE_SETUP
--#line 57 "arlex.l"
--{ return HELP; }
-- YY_BREAK
--case 11:
--YY_RULE_SETUP
--#line 58 "arlex.l"
--{ return LIST; }
-- YY_BREAK
--case 12:
--YY_RULE_SETUP
--#line 59 "arlex.l"
--{ return OPEN; }
-- YY_BREAK
--case 13:
--YY_RULE_SETUP
--#line 60 "arlex.l"
--{ return REPLACE; }
-- YY_BREAK
--case 14:
--YY_RULE_SETUP
--#line 61 "arlex.l"
--{ return VERBOSE; }
-- YY_BREAK
--case 15:
--YY_RULE_SETUP
--#line 62 "arlex.l"
--{ return SAVE; }
-- YY_BREAK
--case 16:
--YY_RULE_SETUP
--#line 63 "arlex.l"
--{ return ADDLIB; }
-- YY_BREAK
--case 17:
--YY_RULE_SETUP
--#line 64 "arlex.l"
--{ return ADDMOD; }
-- YY_BREAK
--case 18:
--YY_RULE_SETUP
--#line 65 "arlex.l"
--{ return CLEAR; }
-- YY_BREAK
--case 19:
--YY_RULE_SETUP
--#line 66 "arlex.l"
--{ return CREATE; }
-- YY_BREAK
--case 20:
--YY_RULE_SETUP
--#line 67 "arlex.l"
--{ return DELETE; }
-- YY_BREAK
--case 21:
--YY_RULE_SETUP
--#line 68 "arlex.l"
--{ return DIRECTORY; }
-- YY_BREAK
--case 22:
--YY_RULE_SETUP
--#line 69 "arlex.l"
--{ return END; }
-- YY_BREAK
--case 23:
--YY_RULE_SETUP
--#line 70 "arlex.l"
--{ return EXTRACT; }
-- YY_BREAK
--case 24:
--YY_RULE_SETUP
--#line 71 "arlex.l"
--{ return FULLDIR; }
-- YY_BREAK
--case 25:
--YY_RULE_SETUP
--#line 72 "arlex.l"
--{ return HELP; }
-- YY_BREAK
--case 26:
--YY_RULE_SETUP
--#line 73 "arlex.l"
--{ return LIST; }
-- YY_BREAK
--case 27:
--YY_RULE_SETUP
--#line 74 "arlex.l"
--{ return OPEN; }
-- YY_BREAK
--case 28:
--YY_RULE_SETUP
--#line 75 "arlex.l"
--{ return REPLACE; }
-- YY_BREAK
--case 29:
--YY_RULE_SETUP
--#line 76 "arlex.l"
--{ return VERBOSE; }
-- YY_BREAK
--case 30:
--YY_RULE_SETUP
--#line 77 "arlex.l"
--{ return SAVE; }
-- YY_BREAK
--case 31:
--/* rule 31 can match eol */
--YY_RULE_SETUP
--#line 78 "arlex.l"
--{ linenumber ++; }
-- YY_BREAK
--case 32:
--YY_RULE_SETUP
--#line 79 "arlex.l"
--{ return '('; }
-- YY_BREAK
--case 33:
--YY_RULE_SETUP
--#line 80 "arlex.l"
--{ return ')'; }
-- YY_BREAK
--case 34:
--YY_RULE_SETUP
--#line 81 "arlex.l"
--{ return ','; }
-- YY_BREAK
--case 35:
--YY_RULE_SETUP
--#line 82 "arlex.l"
--{
-- yylval.name = xstrdup (yytext);
-- return FILENAME;
-- }
-- YY_BREAK
--case 36:
--YY_RULE_SETUP
--#line 86 "arlex.l"
--{ }
-- YY_BREAK
--case 37:
--YY_RULE_SETUP
--#line 87 "arlex.l"
--{ }
-- YY_BREAK
--case 38:
--YY_RULE_SETUP
--#line 88 "arlex.l"
--{ }
-- YY_BREAK
--case 39:
--/* rule 39 can match eol */
--YY_RULE_SETUP
--#line 89 "arlex.l"
--{ linenumber ++; return NEWLINE; }
-- YY_BREAK
--case 40:
--YY_RULE_SETUP
--#line 91 "arlex.l"
--ECHO;
-- YY_BREAK
--#line 1070 "arlex.c"
--case YY_STATE_EOF(INITIAL):
-- yyterminate();
--
-- case YY_END_OF_BUFFER:
-- {
-- /* Amount of text matched not including the EOB char. */
-- int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1;
--
-- /* Undo the effects of YY_DO_BEFORE_ACTION. */
-- *yy_cp = (yy_hold_char);
-- YY_RESTORE_YY_MORE_OFFSET
--
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW )
-- {
-- /* We're scanning a new file or input source. It's
-- * possible that this happened because the user
-- * just pointed yyin at a new source and called
-- * yylex(). If so, then we have to assure
-- * consistency between YY_CURRENT_BUFFER and our
-- * globals. Here is the right place to do so, because
-- * this is the first action (other than possibly a
-- * back-up) that will match for the new input source.
-- */
-- (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
-- YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin;
-- YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL;
-- }
--
-- /* Note that here we test for yy_c_buf_p "<=" to the position
-- * of the first EOB in the buffer, since yy_c_buf_p will
-- * already have been incremented past the NUL character
-- * (since all states make transitions on EOB to the
-- * end-of-buffer state). Contrast this with the test
-- * in input().
-- */
-- if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
-- { /* This was really a NUL. */
-- yy_state_type yy_next_state;
--
-- (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text;
--
-- yy_current_state = yy_get_previous_state( );
--
-- /* Okay, we're now positioned to make the NUL
-- * transition. We couldn't have
-- * yy_get_previous_state() go ahead and do it
-- * for us because it doesn't know how to deal
-- * with the possibility of jamming (and we don't
-- * want to build jamming into it because then it
-- * will run more slowly).
-- */
--
-- yy_next_state = yy_try_NUL_trans( yy_current_state );
--
-- yy_bp = (yytext_ptr) + YY_MORE_ADJ;
--
-- if ( yy_next_state )
-- {
-- /* Consume the NUL. */
-- yy_cp = ++(yy_c_buf_p);
-- yy_current_state = yy_next_state;
-- goto yy_match;
-- }
--
-- else
-- {
-- yy_cp = (yy_c_buf_p);
-- goto yy_find_action;
-- }
-- }
--
-- else switch ( yy_get_next_buffer( ) )
-- {
-- case EOB_ACT_END_OF_FILE:
-- {
-- (yy_did_buffer_switch_on_eof) = 0;
--
-- if ( yywrap( ) )
-- {
-- /* Note: because we've taken care in
-- * yy_get_next_buffer() to have set up
-- * yytext, we can now set up
-- * yy_c_buf_p so that if some total
-- * hoser (like flex itself) wants to
-- * call the scanner after we return the
-- * YY_NULL, it'll still work - another
-- * YY_NULL will get returned.
-- */
-- (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ;
--
-- yy_act = YY_STATE_EOF(YY_START);
-- goto do_action;
-- }
--
-- else
-- {
-- if ( ! (yy_did_buffer_switch_on_eof) )
-- YY_NEW_FILE;
-- }
-- break;
-- }
--
-- case EOB_ACT_CONTINUE_SCAN:
-- (yy_c_buf_p) =
-- (yytext_ptr) + yy_amount_of_matched_text;
--
-- yy_current_state = yy_get_previous_state( );
--
-- yy_cp = (yy_c_buf_p);
-- yy_bp = (yytext_ptr) + YY_MORE_ADJ;
-- goto yy_match;
--
-- case EOB_ACT_LAST_MATCH:
-- (yy_c_buf_p) =
-- &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)];
--
-- yy_current_state = yy_get_previous_state( );
--
-- yy_cp = (yy_c_buf_p);
-- yy_bp = (yytext_ptr) + YY_MORE_ADJ;
-- goto yy_find_action;
-- }
-- break;
-- }
--
-- default:
-- YY_FATAL_ERROR(
-- "fatal flex scanner internal error--no action found" );
-- } /* end of action switch */
-- } /* end of scanning one token */
--} /* end of yylex */
--
--/* yy_get_next_buffer - try to read in a new buffer
-- *
-- * Returns a code representing an action:
-- * EOB_ACT_LAST_MATCH -
-- * EOB_ACT_CONTINUE_SCAN - continue scanning from current position
-- * EOB_ACT_END_OF_FILE - end of file
-- */
--static int yy_get_next_buffer (void)
--{
-- register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf;
-- register char *source = (yytext_ptr);
-- register int number_to_move, i;
-- int ret_val;
--
-- if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] )
-- YY_FATAL_ERROR(
-- "fatal flex scanner internal error--end of buffer missed" );
--
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 )
-- { /* Don't try to fill the buffer, so this is an EOF. */
-- if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 )
-- {
-- /* We matched a single character, the EOB, so
-- * treat this as a final EOF.
-- */
-- return EOB_ACT_END_OF_FILE;
-- }
--
-- else
-- {
-- /* We matched some text prior to the EOB, first
-- * process it.
-- */
-- return EOB_ACT_LAST_MATCH;
-- }
-- }
--
-- /* Try to read more data. */
--
-- /* First move last chars to start of buffer. */
-- number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1;
--
-- for ( i = 0; i < number_to_move; ++i )
-- *(dest++) = *(source++);
--
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING )
-- /* don't do the read, it's not guaranteed to return an EOF,
-- * just force an EOF
-- */
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0;
--
-- else
-- {
-- yy_size_t num_to_read =
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1;
--
-- while ( num_to_read <= 0 )
-- { /* Not enough room in the buffer - grow it. */
--
-- /* just a shorter name for the current buffer */
-- YY_BUFFER_STATE b = YY_CURRENT_BUFFER;
--
-- int yy_c_buf_p_offset =
-- (int) ((yy_c_buf_p) - b->yy_ch_buf);
--
-- if ( b->yy_is_our_buffer )
-- {
-- yy_size_t new_size = b->yy_buf_size * 2;
--
-- if ( new_size <= 0 )
-- b->yy_buf_size += b->yy_buf_size / 8;
-- else
-- b->yy_buf_size *= 2;
--
-- b->yy_ch_buf = (char *)
-- /* Include room in for 2 EOB chars. */
-- yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 );
-- }
-- else
-- /* Can't grow it, we don't own it. */
-- b->yy_ch_buf = 0;
--
-- if ( ! b->yy_ch_buf )
-- YY_FATAL_ERROR(
-- "fatal error - scanner input buffer overflow" );
--
-- (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset];
--
-- num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size -
-- number_to_move - 1;
--
-- }
--
-- if ( num_to_read > YY_READ_BUF_SIZE )
-- num_to_read = YY_READ_BUF_SIZE;
--
-- /* Read in more data. */
-- YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]),
-- (yy_n_chars), num_to_read );
--
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
-- }
--
-- if ( (yy_n_chars) == 0 )
-- {
-- if ( number_to_move == YY_MORE_ADJ )
-- {
-- ret_val = EOB_ACT_END_OF_FILE;
-- yyrestart(yyin );
-- }
--
-- else
-- {
-- ret_val = EOB_ACT_LAST_MATCH;
-- YY_CURRENT_BUFFER_LVALUE->yy_buffer_status =
-- YY_BUFFER_EOF_PENDING;
-- }
-- }
--
-- else
-- ret_val = EOB_ACT_CONTINUE_SCAN;
--
-- if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) {
-- /* Extend the array by 50%, plus the number we really need. */
-- yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1);
-- YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size );
-- if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" );
-- }
--
-- (yy_n_chars) += number_to_move;
-- YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR;
-- YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR;
--
-- (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0];
--
-- return ret_val;
--}
--
--/* yy_get_previous_state - get the state just before the EOB char was reached */
--
-- static yy_state_type yy_get_previous_state (void)
--{
-- register yy_state_type yy_current_state;
-- register char *yy_cp;
--
-- yy_current_state = (yy_start);
--
-- for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
-- {
-- register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1);
-- if ( yy_accept[yy_current_state] )
-- {
-- (yy_last_accepting_state) = yy_current_state;
-- (yy_last_accepting_cpos) = yy_cp;
-- }
-- while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
-- {
-- yy_current_state = (int) yy_def[yy_current_state];
-- if ( yy_current_state >= 177 )
-- yy_c = yy_meta[(unsigned int) yy_c];
-- }
-- yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-- }
--
-- return yy_current_state;
--}
--
--/* yy_try_NUL_trans - try to make a transition on the NUL character
-- *
-- * synopsis
-- * next_state = yy_try_NUL_trans( current_state );
-- */
-- static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state )
--{
-- register int yy_is_jam;
-- register char *yy_cp = (yy_c_buf_p);
--
-- register YY_CHAR yy_c = 1;
-- if ( yy_accept[yy_current_state] )
-- {
-- (yy_last_accepting_state) = yy_current_state;
-- (yy_last_accepting_cpos) = yy_cp;
-- }
-- while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
-- {
-- yy_current_state = (int) yy_def[yy_current_state];
-- if ( yy_current_state >= 177 )
-- yy_c = yy_meta[(unsigned int) yy_c];
-- }
-- yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-- yy_is_jam = (yy_current_state == 176);
--
-- return yy_is_jam ? 0 : yy_current_state;
--}
--
--#ifndef YY_NO_INPUT
--#ifdef __cplusplus
-- static int yyinput (void)
--#else
-- static int input (void)
--#endif
--
--{
-- int c;
--
-- *(yy_c_buf_p) = (yy_hold_char);
--
-- if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
-- {
-- /* yy_c_buf_p now points to the character we want to return.
-- * If this occurs *before* the EOB characters, then it's a
-- * valid NUL; if not, then we've hit the end of the buffer.
-- */
-- if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
-- /* This was really a NUL. */
-- *(yy_c_buf_p) = '\0';
--
-- else
-- { /* need more input */
-- yy_size_t offset = (yy_c_buf_p) - (yytext_ptr);
-- ++(yy_c_buf_p);
--
-- switch ( yy_get_next_buffer( ) )
-- {
-- case EOB_ACT_LAST_MATCH:
-- /* This happens because yy_g_n_b()
-- * sees that we've accumulated a
-- * token and flags that we need to
-- * try matching the token before
-- * proceeding. But for input(),
-- * there's no matching to consider.
-- * So convert the EOB_ACT_LAST_MATCH
-- * to EOB_ACT_END_OF_FILE.
-- */
--
-- /* Reset buffer status. */
-- yyrestart(yyin );
--
-- /*FALLTHROUGH*/
--
-- case EOB_ACT_END_OF_FILE:
-- {
-- if ( yywrap( ) )
-- return 0;
--
-- if ( ! (yy_did_buffer_switch_on_eof) )
-- YY_NEW_FILE;
--#ifdef __cplusplus
-- return yyinput();
--#else
-- return input();
--#endif
-- }
--
-- case EOB_ACT_CONTINUE_SCAN:
-- (yy_c_buf_p) = (yytext_ptr) + offset;
-- break;
-- }
-- }
-- }
--
-- c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */
-- *(yy_c_buf_p) = '\0'; /* preserve yytext */
-- (yy_hold_char) = *++(yy_c_buf_p);
--
-- return c;
--}
--#endif /* ifndef YY_NO_INPUT */
--
--/** Immediately switch to a different input stream.
-- * @param input_file A readable stream.
-- *
-- * @note This function does not reset the start condition to @c INITIAL .
-- */
-- void yyrestart (FILE * input_file )
--{
--
-- if ( ! YY_CURRENT_BUFFER ){
-- yyensure_buffer_stack ();
-- YY_CURRENT_BUFFER_LVALUE =
-- yy_create_buffer(yyin,YY_BUF_SIZE );
-- }
--
-- yy_init_buffer(YY_CURRENT_BUFFER,input_file );
-- yy_load_buffer_state( );
--}
--
--/** Switch to a different input buffer.
-- * @param new_buffer The new input buffer.
-- *
-- */
-- void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer )
--{
--
-- /* TODO. We should be able to replace this entire function body
-- * with
-- * yypop_buffer_state();
-- * yypush_buffer_state(new_buffer);
-- */
-- yyensure_buffer_stack ();
-- if ( YY_CURRENT_BUFFER == new_buffer )
-- return;
--
-- if ( YY_CURRENT_BUFFER )
-- {
-- /* Flush out information for old buffer. */
-- *(yy_c_buf_p) = (yy_hold_char);
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
-- }
--
-- YY_CURRENT_BUFFER_LVALUE = new_buffer;
-- yy_load_buffer_state( );
--
-- /* We don't actually know whether we did this switch during
-- * EOF (yywrap()) processing, but the only time this flag
-- * is looked at is after yywrap() is called, so it's safe
-- * to go ahead and always set it.
-- */
-- (yy_did_buffer_switch_on_eof) = 1;
--}
--
--static void yy_load_buffer_state (void)
--{
-- (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
-- (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos;
-- yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file;
-- (yy_hold_char) = *(yy_c_buf_p);
--}
--
--/** Allocate and initialize an input buffer state.
-- * @param file A readable stream.
-- * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
-- *
-- * @return the allocated buffer state.
-- */
-- YY_BUFFER_STATE yy_create_buffer (FILE * file, int size )
--{
-- YY_BUFFER_STATE b;
--
-- b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) );
-- if ( ! b )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
--
-- b->yy_buf_size = size;
--
-- /* yy_ch_buf has to be 2 characters longer than the size given because
-- * we need to put in 2 end-of-buffer characters.
-- */
-- b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2 );
-- if ( ! b->yy_ch_buf )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
--
-- b->yy_is_our_buffer = 1;
--
-- yy_init_buffer(b,file );
--
-- return b;
--}
--
--/** Destroy the buffer.
-- * @param b a buffer created with yy_create_buffer()
-- *
-- */
-- void yy_delete_buffer (YY_BUFFER_STATE b )
--{
--
-- if ( ! b )
-- return;
--
-- if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */
-- YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0;
--
-- if ( b->yy_is_our_buffer )
-- yyfree((void *) b->yy_ch_buf );
--
-- yyfree((void *) b );
--}
--
--#ifndef __cplusplus
--extern int isatty (int );
--#endif /* __cplusplus */
--
--/* Initializes or reinitializes a buffer.
-- * This function is sometimes called more than once on the same buffer,
-- * such as during a yyrestart() or at EOF.
-- */
-- static void yy_init_buffer (YY_BUFFER_STATE b, FILE * file )
--
--{
-- int oerrno = errno;
--
-- yy_flush_buffer(b );
--
-- b->yy_input_file = file;
-- b->yy_fill_buffer = 1;
--
-- /* If b is the current buffer, then yy_init_buffer was _probably_
-- * called from yyrestart() or through yy_get_next_buffer.
-- * In that case, we don't want to reset the lineno or column.
-- */
-- if (b != YY_CURRENT_BUFFER){
-- b->yy_bs_lineno = 1;
-- b->yy_bs_column = 0;
-- }
--
-- b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0;
--
-- errno = oerrno;
--}
--
--/** Discard all buffered characters. On the next scan, YY_INPUT will be called.
-- * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
-- *
-- */
-- void yy_flush_buffer (YY_BUFFER_STATE b )
--{
-- if ( ! b )
-- return;
--
-- b->yy_n_chars = 0;
--
-- /* We always need two end-of-buffer characters. The first causes
-- * a transition to the end-of-buffer state. The second causes
-- * a jam in that state.
-- */
-- b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR;
-- b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR;
--
-- b->yy_buf_pos = &b->yy_ch_buf[0];
--
-- b->yy_at_bol = 1;
-- b->yy_buffer_status = YY_BUFFER_NEW;
--
-- if ( b == YY_CURRENT_BUFFER )
-- yy_load_buffer_state( );
--}
--
--/** Pushes the new state onto the stack. The new state becomes
-- * the current state. This function will allocate the stack
-- * if necessary.
-- * @param new_buffer The new state.
-- *
-- */
--void yypush_buffer_state (YY_BUFFER_STATE new_buffer )
--{
-- if (new_buffer == NULL)
-- return;
--
-- yyensure_buffer_stack();
--
-- /* This block is copied from yy_switch_to_buffer. */
-- if ( YY_CURRENT_BUFFER )
-- {
-- /* Flush out information for old buffer. */
-- *(yy_c_buf_p) = (yy_hold_char);
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
-- }
--
-- /* Only push if top exists. Otherwise, replace top. */
-- if (YY_CURRENT_BUFFER)
-- (yy_buffer_stack_top)++;
-- YY_CURRENT_BUFFER_LVALUE = new_buffer;
--
-- /* copied from yy_switch_to_buffer. */
-- yy_load_buffer_state( );
-- (yy_did_buffer_switch_on_eof) = 1;
--}
--
--/** Removes and deletes the top of the stack, if present.
-- * The next element becomes the new top.
-- *
-- */
--void yypop_buffer_state (void)
--{
-- if (!YY_CURRENT_BUFFER)
-- return;
--
-- yy_delete_buffer(YY_CURRENT_BUFFER );
-- YY_CURRENT_BUFFER_LVALUE = NULL;
-- if ((yy_buffer_stack_top) > 0)
-- --(yy_buffer_stack_top);
--
-- if (YY_CURRENT_BUFFER) {
-- yy_load_buffer_state( );
-- (yy_did_buffer_switch_on_eof) = 1;
-- }
--}
--
--/* Allocates the stack if it does not exist.
-- * Guarantees space for at least one push.
-- */
--static void yyensure_buffer_stack (void)
--{
-- yy_size_t num_to_alloc;
--
-- if (!(yy_buffer_stack)) {
--
-- /* First allocation is just for 2 elements, since we don't know if this
-- * scanner will even need a stack. We use 2 instead of 1 to avoid an
-- * immediate realloc on the next call.
-- */
-- num_to_alloc = 1;
-- (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc
-- (num_to_alloc * sizeof(struct yy_buffer_state*)
-- );
-- if ( ! (yy_buffer_stack) )
-- YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
--
-- memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
--
-- (yy_buffer_stack_max) = num_to_alloc;
-- (yy_buffer_stack_top) = 0;
-- return;
-- }
--
-- if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){
--
-- /* Increase the buffer to prepare for a possible push. */
-- int grow_size = 8 /* arbitrary grow size */;
--
-- num_to_alloc = (yy_buffer_stack_max) + grow_size;
-- (yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc
-- ((yy_buffer_stack),
-- num_to_alloc * sizeof(struct yy_buffer_state*)
-- );
-- if ( ! (yy_buffer_stack) )
-- YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
--
-- /* zero only the new slots.*/
-- memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*));
-- (yy_buffer_stack_max) = num_to_alloc;
-- }
--}
--
--/** Setup the input buffer state to scan directly from a user-specified character buffer.
-- * @param base the character buffer
-- * @param size the size in bytes of the character buffer
-- *
-- * @return the newly allocated buffer state object.
-- */
--YY_BUFFER_STATE yy_scan_buffer (char * base, yy_size_t size )
--{
-- YY_BUFFER_STATE b;
--
-- if ( size < 2 ||
-- base[size-2] != YY_END_OF_BUFFER_CHAR ||
-- base[size-1] != YY_END_OF_BUFFER_CHAR )
-- /* They forgot to leave room for the EOB's. */
-- return 0;
--
-- b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) );
-- if ( ! b )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" );
--
-- b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */
-- b->yy_buf_pos = b->yy_ch_buf = base;
-- b->yy_is_our_buffer = 0;
-- b->yy_input_file = 0;
-- b->yy_n_chars = b->yy_buf_size;
-- b->yy_is_interactive = 0;
-- b->yy_at_bol = 1;
-- b->yy_fill_buffer = 0;
-- b->yy_buffer_status = YY_BUFFER_NEW;
--
-- yy_switch_to_buffer(b );
--
-- return b;
--}
--
--/** Setup the input buffer state to scan a string. The next call to yylex() will
-- * scan from a @e copy of @a str.
-- * @param yystr a NUL-terminated string to scan
-- *
-- * @return the newly allocated buffer state object.
-- * @note If you want to scan bytes that may contain NUL values, then use
-- * yy_scan_bytes() instead.
-- */
--YY_BUFFER_STATE yy_scan_string (yyconst char * yystr )
--{
--
-- return yy_scan_bytes(yystr,strlen(yystr) );
--}
--
--/** Setup the input buffer state to scan the given bytes. The next call to yylex() will
-- * scan from a @e copy of @a bytes.
-- * @param bytes the byte buffer to scan
-- * @param len the number of bytes in the buffer pointed to by @a bytes.
-- *
-- * @return the newly allocated buffer state object.
-- */
--YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, yy_size_t _yybytes_len )
--{
-- YY_BUFFER_STATE b;
-- char *buf;
-- yy_size_t n, i;
--
-- /* Get memory for full buffer, including space for trailing EOB's. */
-- n = _yybytes_len + 2;
-- buf = (char *) yyalloc(n );
-- if ( ! buf )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" );
--
-- for ( i = 0; i < _yybytes_len; ++i )
-- buf[i] = yybytes[i];
--
-- buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR;
--
-- b = yy_scan_buffer(buf,n );
-- if ( ! b )
-- YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" );
--
-- /* It's okay to grow etc. this buffer, and we should throw it
-- * away when we're done.
-- */
-- b->yy_is_our_buffer = 1;
--
-- return b;
--}
--
--#ifndef YY_EXIT_FAILURE
--#define YY_EXIT_FAILURE 2
--#endif
--
--static void yy_fatal_error (yyconst char* msg )
--{
-- (void) fprintf( stderr, "%s\n", msg );
-- exit( YY_EXIT_FAILURE );
--}
--
--/* Redefine yyless() so it works in section 3 code. */
--
--#undef yyless
--#define yyless(n) \
-- do \
-- { \
-- /* Undo effects of setting up yytext. */ \
-- int yyless_macro_arg = (n); \
-- YY_LESS_LINENO(yyless_macro_arg);\
-- yytext[yyleng] = (yy_hold_char); \
-- (yy_c_buf_p) = yytext + yyless_macro_arg; \
-- (yy_hold_char) = *(yy_c_buf_p); \
-- *(yy_c_buf_p) = '\0'; \
-- yyleng = yyless_macro_arg; \
-- } \
-- while ( 0 )
--
--/* Accessor methods (get/set functions) to struct members. */
--
--/** Get the current line number.
-- *
-- */
--int yyget_lineno (void)
--{
--
-- return yylineno;
--}
--
--/** Get the input stream.
-- *
-- */
--FILE *yyget_in (void)
--{
-- return yyin;
--}
--
--/** Get the output stream.
-- *
-- */
--FILE *yyget_out (void)
--{
-- return yyout;
--}
--
--/** Get the length of the current token.
-- *
-- */
--yy_size_t yyget_leng (void)
--{
-- return yyleng;
--}
--
--/** Get the current token.
-- *
-- */
--
--char *yyget_text (void)
--{
-- return yytext;
--}
--
--/** Set the current line number.
-- * @param line_number
-- *
-- */
--void yyset_lineno (int line_number )
--{
--
-- yylineno = line_number;
--}
--
--/** Set the input stream. This does not discard the current
-- * input buffer.
-- * @param in_str A readable stream.
-- *
-- * @see yy_switch_to_buffer
-- */
--void yyset_in (FILE * in_str )
--{
-- yyin = in_str ;
--}
--
--void yyset_out (FILE * out_str )
--{
-- yyout = out_str ;
--}
--
--int yyget_debug (void)
--{
-- return yy_flex_debug;
--}
--
--void yyset_debug (int bdebug )
--{
-- yy_flex_debug = bdebug ;
--}
--
--static int yy_init_globals (void)
--{
-- /* Initialization is the same as for the non-reentrant scanner.
-- * This function is called from yylex_destroy(), so don't allocate here.
-- */
--
-- (yy_buffer_stack) = 0;
-- (yy_buffer_stack_top) = 0;
-- (yy_buffer_stack_max) = 0;
-- (yy_c_buf_p) = (char *) 0;
-- (yy_init) = 0;
-- (yy_start) = 0;
--
--/* Defined in main.c */
--#ifdef YY_STDINIT
-- yyin = stdin;
-- yyout = stdout;
--#else
-- yyin = (FILE *) 0;
-- yyout = (FILE *) 0;
--#endif
--
-- /* For future reference: Set errno on error, since we are called by
-- * yylex_init()
-- */
-- return 0;
--}
--
--/* yylex_destroy is for both reentrant and non-reentrant scanners. */
--int yylex_destroy (void)
--{
--
-- /* Pop the buffer stack, destroying each element. */
-- while(YY_CURRENT_BUFFER){
-- yy_delete_buffer(YY_CURRENT_BUFFER );
-- YY_CURRENT_BUFFER_LVALUE = NULL;
-- yypop_buffer_state();
-- }
--
-- /* Destroy the stack itself. */
-- yyfree((yy_buffer_stack) );
-- (yy_buffer_stack) = NULL;
--
-- /* Reset the globals. This is important in a non-reentrant scanner so the next time
-- * yylex() is called, initialization will occur. */
-- yy_init_globals( );
--
-- return 0;
--}
--
--/*
-- * Internal utility routines.
-- */
--
--#ifndef yytext_ptr
--static void yy_flex_strncpy (char* s1, yyconst char * s2, int n )
--{
-- register int i;
-- for ( i = 0; i < n; ++i )
-- s1[i] = s2[i];
--}
--#endif
--
--#ifdef YY_NEED_STRLEN
--static int yy_flex_strlen (yyconst char * s )
--{
-- register int n;
-- for ( n = 0; s[n]; ++n )
-- ;
--
-- return n;
--}
--#endif
--
--void *yyalloc (yy_size_t size )
--{
-- return (void *) malloc( size );
--}
--
--void *yyrealloc (void * ptr, yy_size_t size )
--{
-- /* The cast to (char *) in the following accommodates both
-- * implementations that use char* generic pointers, and those
-- * that use void* generic pointers. It works with the latter
-- * because both ANSI C and C++ allow castless assignment from
-- * any pointer type to void*, and deal with argument conversions
-- * as though doing an assignment.
-- */
-- return (void *) realloc( (char *) ptr, size );
--}
--
--void yyfree (void * ptr )
--{
-- free( (char *) ptr ); /* see yyrealloc() for (char *) cast */
--}
--
--#define YYTABLES_NAME "yytables"
--
--#line 91 "arlex.l"
--
--
--#ifndef yywrap
--/* Needed for lex, though not flex. */
--int yywrap(void) { return 1; }
--#endif
--
-diff -Nur binutils-2.24.orig/binutils/arparse.c binutils-2.24/binutils/arparse.c
---- binutils-2.24.orig/binutils/arparse.c 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/arparse.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,1770 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton implementation for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* C LALR(1) parser skeleton written by Richard Stallman, by
-- simplifying the original so-called "semantic" parser. */
--
--/* All symbols defined below should begin with yy or YY, to avoid
-- infringing on user name space. This should be done even for local
-- variables, as they might otherwise be expanded by user macros.
-- There are some unavoidable exceptions within include files to
-- define necessary library symbols; they are noted "INFRINGES ON
-- USER NAME SPACE" below. */
--
--/* Identify Bison output. */
--#define YYBISON 1
--
--/* Bison version. */
--#define YYBISON_VERSION "2.3"
--
--/* Skeleton name. */
--#define YYSKELETON_NAME "yacc.c"
--
--/* Pure parsers. */
--#define YYPURE 0
--
--/* Using locations. */
--#define YYLSP_NEEDED 0
--
--
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- NEWLINE = 258,
-- VERBOSE = 259,
-- FILENAME = 260,
-- ADDLIB = 261,
-- LIST = 262,
-- ADDMOD = 263,
-- CLEAR = 264,
-- CREATE = 265,
-- DELETE = 266,
-- DIRECTORY = 267,
-- END = 268,
-- EXTRACT = 269,
-- FULLDIR = 270,
-- HELP = 271,
-- QUIT = 272,
-- REPLACE = 273,
-- SAVE = 274,
-- OPEN = 275
-- };
--#endif
--/* Tokens. */
--#define NEWLINE 258
--#define VERBOSE 259
--#define FILENAME 260
--#define ADDLIB 261
--#define LIST 262
--#define ADDMOD 263
--#define CLEAR 264
--#define CREATE 265
--#define DELETE 266
--#define DIRECTORY 267
--#define END 268
--#define EXTRACT 269
--#define FULLDIR 270
--#define HELP 271
--#define QUIT 272
--#define REPLACE 273
--#define SAVE 274
--#define OPEN 275
--
--
--
--
--/* Copy the first part of user declarations. */
--#line 1 "arparse.y"
--
--/* arparse.y - Stange script language parser */
--
--/* Copyright 1992, 1993, 1995, 1997, 1999, 2002, 2003, 2005, 2007
-- Free Software Foundation, Inc.
--
-- This file is part of GNU Binutils.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-- MA 02110-1301, USA. */
--
--
--/* Contributed by Steve Chamberlain
-- sac@cygnus.com
--
--*/
--#define DONTDECLARE_MALLOC
--#include "sysdep.h"
--#include "bfd.h"
--#include "arsup.h"
--extern int verbose;
--extern int yylex (void);
--static int yyerror (const char *);
--
--
--/* Enabling traces. */
--#ifndef YYDEBUG
--# define YYDEBUG 0
--#endif
--
--/* Enabling verbose error messages. */
--#ifdef YYERROR_VERBOSE
--# undef YYERROR_VERBOSE
--# define YYERROR_VERBOSE 1
--#else
--# define YYERROR_VERBOSE 0
--#endif
--
--/* Enabling the token table. */
--#ifndef YYTOKEN_TABLE
--# define YYTOKEN_TABLE 0
--#endif
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 38 "arparse.y"
--{
-- char *name;
--struct list *list ;
--
--}
--/* Line 193 of yacc.c. */
--#line 179 "arparse.c"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--
--
--/* Copy the second part of user declarations. */
--
--
--/* Line 216 of yacc.c. */
--#line 192 "arparse.c"
--
--#ifdef short
--# undef short
--#endif
--
--#ifdef YYTYPE_UINT8
--typedef YYTYPE_UINT8 yytype_uint8;
--#else
--typedef unsigned char yytype_uint8;
--#endif
--
--#ifdef YYTYPE_INT8
--typedef YYTYPE_INT8 yytype_int8;
--#elif (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--typedef signed char yytype_int8;
--#else
--typedef short int yytype_int8;
--#endif
--
--#ifdef YYTYPE_UINT16
--typedef YYTYPE_UINT16 yytype_uint16;
--#else
--typedef unsigned short int yytype_uint16;
--#endif
--
--#ifdef YYTYPE_INT16
--typedef YYTYPE_INT16 yytype_int16;
--#else
--typedef short int yytype_int16;
--#endif
--
--#ifndef YYSIZE_T
--# ifdef __SIZE_TYPE__
--# define YYSIZE_T __SIZE_TYPE__
--# elif defined size_t
--# define YYSIZE_T size_t
--# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stddef.h> /* INFRINGES ON USER NAME SPACE */
--# define YYSIZE_T size_t
--# else
--# define YYSIZE_T unsigned int
--# endif
--#endif
--
--#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
--
--#ifndef YY_
--# if defined YYENABLE_NLS && YYENABLE_NLS
--# if ENABLE_NLS
--# include <libintl.h> /* INFRINGES ON USER NAME SPACE */
--# define YY_(msgid) dgettext ("bison-runtime", msgid)
--# endif
--# endif
--# ifndef YY_
--# define YY_(msgid) msgid
--# endif
--#endif
--
--/* Suppress unused-variable warnings by "using" E. */
--#if ! defined lint || defined __GNUC__
--# define YYUSE(e) ((void) (e))
--#else
--# define YYUSE(e) /* empty */
--#endif
--
--/* Identity function, used to suppress warnings about constant conditions. */
--#ifndef lint
--# define YYID(n) (n)
--#else
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static int
--YYID (int i)
--#else
--static int
--YYID (i)
-- int i;
--#endif
--{
-- return i;
--}
--#endif
--
--#if ! defined yyoverflow || YYERROR_VERBOSE
--
--/* The parser invokes alloca or malloc; define the necessary symbols. */
--
--# ifdef YYSTACK_USE_ALLOCA
--# if YYSTACK_USE_ALLOCA
--# ifdef __GNUC__
--# define YYSTACK_ALLOC __builtin_alloca
--# elif defined __BUILTIN_VA_ARG_INCR
--# include <alloca.h> /* INFRINGES ON USER NAME SPACE */
--# elif defined _AIX
--# define YYSTACK_ALLOC __alloca
--# elif defined _MSC_VER
--# include <malloc.h> /* INFRINGES ON USER NAME SPACE */
--# define alloca _alloca
--# else
--# define YYSTACK_ALLOC alloca
--# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# endif
--# endif
--# endif
--
--# ifdef YYSTACK_ALLOC
-- /* Pacify GCC's `empty if-body' warning. */
--# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0))
--# ifndef YYSTACK_ALLOC_MAXIMUM
-- /* The OS might guarantee only one guard page at the bottom of the stack,
-- and a page size can be as small as 4096 bytes. So we cannot safely
-- invoke alloca (N) if N exceeds 4096. Use a slightly smaller number
-- to allow for a few compiler-allocated temporary stack slots. */
--# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
--# endif
--# else
--# define YYSTACK_ALLOC YYMALLOC
--# define YYSTACK_FREE YYFREE
--# ifndef YYSTACK_ALLOC_MAXIMUM
--# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
--# endif
--# if (defined __cplusplus && ! defined _STDLIB_H \
-- && ! ((defined YYMALLOC || defined malloc) \
-- && (defined YYFREE || defined free)))
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# ifndef YYMALLOC
--# define YYMALLOC malloc
--# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# ifndef YYFREE
--# define YYFREE free
--# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void free (void *); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# endif
--#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
--
--
--#if (! defined yyoverflow \
-- && (! defined __cplusplus \
-- || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
--
--/* A type that is properly aligned for any stack member. */
--union yyalloc
--{
-- yytype_int16 yyss;
-- YYSTYPE yyvs;
-- };
--
--/* The size of the maximum gap between one aligned stack and the next. */
--# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
--
--/* The size of an array large to enough to hold all stacks, each with
-- N elements. */
--# define YYSTACK_BYTES(N) \
-- ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \
-- + YYSTACK_GAP_MAXIMUM)
--
--/* Copy COUNT objects from FROM to TO. The source and destination do
-- not overlap. */
--# ifndef YYCOPY
--# if defined __GNUC__ && 1 < __GNUC__
--# define YYCOPY(To, From, Count) \
-- __builtin_memcpy (To, From, (Count) * sizeof (*(From)))
--# else
--# define YYCOPY(To, From, Count) \
-- do \
-- { \
-- YYSIZE_T yyi; \
-- for (yyi = 0; yyi < (Count); yyi++) \
-- (To)[yyi] = (From)[yyi]; \
-- } \
-- while (YYID (0))
--# endif
--# endif
--
--/* Relocate STACK from its old location to the new one. The
-- local variables YYSIZE and YYSTACKSIZE give the old and new number of
-- elements in the stack, and YYPTR gives the new location of the
-- stack. Advance YYPTR to a properly aligned location for the next
-- stack. */
--# define YYSTACK_RELOCATE(Stack) \
-- do \
-- { \
-- YYSIZE_T yynewbytes; \
-- YYCOPY (&yyptr->Stack, Stack, yysize); \
-- Stack = &yyptr->Stack; \
-- yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
-- yyptr += yynewbytes / sizeof (*yyptr); \
-- } \
-- while (YYID (0))
--
--#endif
--
--/* YYFINAL -- State number of the termination state. */
--#define YYFINAL 3
--/* YYLAST -- Last index in YYTABLE. */
--#define YYLAST 34
--
--/* YYNTOKENS -- Number of terminals. */
--#define YYNTOKENS 24
--/* YYNNTS -- Number of nonterminals. */
--#define YYNNTS 22
--/* YYNRULES -- Number of rules. */
--#define YYNRULES 42
--/* YYNRULES -- Number of states. */
--#define YYNSTATES 53
--
--/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */
--#define YYUNDEFTOK 2
--#define YYMAXUTOK 275
--
--#define YYTRANSLATE(YYX) \
-- ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
--
--/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */
--static const yytype_uint8 yytranslate[] =
--{
-- 0, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 21, 22, 2, 2, 23, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 1, 2, 3, 4,
-- 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
-- 15, 16, 17, 18, 19, 20
--};
--
--#if YYDEBUG
--/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
-- YYRHS. */
--static const yytype_uint8 yyprhs[] =
--{
-- 0, 0, 3, 4, 7, 10, 11, 14, 16, 18,
-- 20, 22, 24, 26, 28, 30, 32, 34, 36, 38,
-- 40, 42, 44, 45, 48, 51, 53, 56, 59, 61,
-- 63, 66, 69, 73, 78, 80, 81, 85, 86, 90,
-- 91, 93, 94
--};
--
--/* YYRHS -- A `-1'-separated list of the rules' RHS. */
--static const yytype_int8 yyrhs[] =
--{
-- 25, 0, -1, -1, 26, 27, -1, 27, 28, -1,
-- -1, 29, 3, -1, 37, -1, 38, -1, 45, -1,
-- 40, -1, 39, -1, 32, -1, 34, -1, 36, -1,
-- 30, -1, 31, -1, 33, -1, 35, -1, 13, -1,
-- 1, -1, 5, -1, -1, 14, 43, -1, 18, 43,
-- -1, 9, -1, 11, 43, -1, 8, 43, -1, 7,
-- -1, 19, -1, 20, 5, -1, 10, 5, -1, 6,
-- 5, 42, -1, 12, 5, 42, 41, -1, 5, -1,
-- -1, 21, 43, 22, -1, -1, 43, 44, 5, -1,
-- -1, 23, -1, -1, 4, -1
--};
--
--/* YYRLINE[YYN] -- source line where rule number YYN was defined. */
--static const yytype_uint8 yyrline[] =
--{
-- 0, 69, 69, 69, 73, 74, 78, 82, 83, 84,
-- 85, 86, 87, 88, 89, 90, 91, 92, 93, 94,
-- 95, 96, 97, 102, 107, 112, 117, 121, 126, 131,
-- 138, 143, 149, 153, 160, 162, 166, 169, 173, 179,
-- 184, 185, 190
--};
--#endif
--
--#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE
--/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
-- First, the terminals, then, starting at YYNTOKENS, nonterminals. */
--static const char *const yytname[] =
--{
-- "$end", "error", "$undefined", "NEWLINE", "VERBOSE", "FILENAME",
-- "ADDLIB", "LIST", "ADDMOD", "CLEAR", "CREATE", "DELETE", "DIRECTORY",
-- "END", "EXTRACT", "FULLDIR", "HELP", "QUIT", "REPLACE", "SAVE", "OPEN",
-- "'('", "')'", "','", "$accept", "start", "@1", "session", "command_line",
-- "command", "extract_command", "replace_command", "clear_command",
-- "delete_command", "addmod_command", "list_command", "save_command",
-- "open_command", "create_command", "addlib_command", "directory_command",
-- "optional_filename", "modulelist", "modulename", "optcomma",
-- "verbose_command", 0
--};
--#endif
--
--# ifdef YYPRINT
--/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to
-- token YYLEX-NUM. */
--static const yytype_uint16 yytoknum[] =
--{
-- 0, 256, 257, 258, 259, 260, 261, 262, 263, 264,
-- 265, 266, 267, 268, 269, 270, 271, 272, 273, 274,
-- 275, 40, 41, 44
--};
--# endif
--
--/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */
--static const yytype_uint8 yyr1[] =
--{
-- 0, 24, 26, 25, 27, 27, 28, 29, 29, 29,
-- 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
-- 29, 29, 29, 30, 31, 32, 33, 34, 35, 36,
-- 37, 38, 39, 40, 41, 41, 42, 42, 43, 43,
-- 44, 44, 45
--};
--
--/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */
--static const yytype_uint8 yyr2[] =
--{
-- 0, 2, 0, 2, 2, 0, 2, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 0, 2, 2, 1, 2, 2, 1, 1,
-- 2, 2, 3, 4, 1, 0, 3, 0, 3, 0,
-- 1, 0, 1
--};
--
--/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
-- STATE-NUM when YYTABLE doesn't specify something else to do. Zero
-- means the default is an error. */
--static const yytype_uint8 yydefact[] =
--{
-- 2, 0, 5, 1, 0, 20, 42, 21, 0, 28,
-- 39, 25, 0, 39, 0, 19, 39, 39, 29, 0,
-- 4, 0, 15, 16, 12, 17, 13, 18, 14, 7,
-- 8, 11, 10, 9, 37, 27, 31, 26, 37, 23,
-- 24, 30, 6, 39, 32, 40, 0, 35, 41, 38,
-- 34, 33, 36
--};
--
--/* YYDEFGOTO[NTERM-NUM]. */
--static const yytype_int8 yydefgoto[] =
--{
-- -1, 1, 2, 4, 20, 21, 22, 23, 24, 25,
-- 26, 27, 28, 29, 30, 31, 32, 51, 44, 35,
-- 46, 33
--};
--
--/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
-- STATE-NUM. */
--#define YYPACT_NINF -14
--static const yytype_int8 yypact[] =
--{
-- -14, 1, -14, -14, 5, -14, -14, -14, 2, -14,
-- -14, -14, 21, -14, 22, -14, -14, -14, -14, 23,
-- -14, 26, -14, -14, -14, -14, -14, -14, -14, -14,
-- -14, -14, -14, -14, 10, -3, -14, -3, 10, -3,
-- -3, -14, -14, -14, -14, -14, 27, 28, -1, -14,
-- -14, -14, -14
--};
--
--/* YYPGOTO[NTERM-NUM]. */
--static const yytype_int8 yypgoto[] =
--{
-- -14, -14, -14, -14, -14, -14, -14, -14, -14, -14,
-- -14, -14, -14, -14, -14, -14, -14, -14, -4, -13,
-- -14, -14
--};
--
--/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If
-- positive, shift that token. If negative, reduce the rule which
-- number is the opposite. If zero, do what YYDEFACT says.
-- If YYTABLE_NINF, syntax error. */
--#define YYTABLE_NINF -42
--static const yytype_int8 yytable[] =
--{
-- 37, 3, -41, 39, 40, -3, 5, 34, -22, 6,
-- 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
-- 45, 52, 45, 17, 18, 19, 36, 38, 41, 42,
-- 48, 43, 49, 50, 47
--};
--
--static const yytype_uint8 yycheck[] =
--{
-- 13, 0, 5, 16, 17, 0, 1, 5, 3, 4,
-- 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
-- 23, 22, 23, 18, 19, 20, 5, 5, 5, 3,
-- 43, 21, 5, 5, 38
--};
--
--/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
-- symbol of state STATE-NUM. */
--static const yytype_uint8 yystos[] =
--{
-- 0, 25, 26, 0, 27, 1, 4, 5, 6, 7,
-- 8, 9, 10, 11, 12, 13, 14, 18, 19, 20,
-- 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
-- 38, 39, 40, 45, 5, 43, 5, 43, 5, 43,
-- 43, 5, 3, 21, 42, 23, 44, 42, 43, 5,
-- 5, 41, 22
--};
--
--#define yyerrok (yyerrstatus = 0)
--#define yyclearin (yychar = YYEMPTY)
--#define YYEMPTY (-2)
--#define YYEOF 0
--
--#define YYACCEPT goto yyacceptlab
--#define YYABORT goto yyabortlab
--#define YYERROR goto yyerrorlab
--
--
--/* Like YYERROR except do call yyerror. This remains here temporarily
-- to ease the transition to the new meaning of YYERROR, for GCC.
-- Once GCC version 2 has supplanted version 1, this can go. */
--
--#define YYFAIL goto yyerrlab
--
--#define YYRECOVERING() (!!yyerrstatus)
--
--#define YYBACKUP(Token, Value) \
--do \
-- if (yychar == YYEMPTY && yylen == 1) \
-- { \
-- yychar = (Token); \
-- yylval = (Value); \
-- yytoken = YYTRANSLATE (yychar); \
-- YYPOPSTACK (1); \
-- goto yybackup; \
-- } \
-- else \
-- { \
-- yyerror (YY_("syntax error: cannot back up")); \
-- YYERROR; \
-- } \
--while (YYID (0))
--
--
--#define YYTERROR 1
--#define YYERRCODE 256
--
--
--/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
-- If N is 0, then set CURRENT to the empty location which ends
-- the previous symbol: RHS[0] (always defined). */
--
--#define YYRHSLOC(Rhs, K) ((Rhs)[K])
--#ifndef YYLLOC_DEFAULT
--# define YYLLOC_DEFAULT(Current, Rhs, N) \
-- do \
-- if (YYID (N)) \
-- { \
-- (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \
-- (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \
-- (Current).last_line = YYRHSLOC (Rhs, N).last_line; \
-- (Current).last_column = YYRHSLOC (Rhs, N).last_column; \
-- } \
-- else \
-- { \
-- (Current).first_line = (Current).last_line = \
-- YYRHSLOC (Rhs, 0).last_line; \
-- (Current).first_column = (Current).last_column = \
-- YYRHSLOC (Rhs, 0).last_column; \
-- } \
-- while (YYID (0))
--#endif
--
--
--/* YY_LOCATION_PRINT -- Print the location on the stream.
-- This macro was not mandated originally: define only if we know
-- we won't break user code: when these are the locations we know. */
--
--#ifndef YY_LOCATION_PRINT
--# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL
--# define YY_LOCATION_PRINT(File, Loc) \
-- fprintf (File, "%d.%d-%d.%d", \
-- (Loc).first_line, (Loc).first_column, \
-- (Loc).last_line, (Loc).last_column)
--# else
--# define YY_LOCATION_PRINT(File, Loc) ((void) 0)
--# endif
--#endif
--
--
--/* YYLEX -- calling `yylex' with the right arguments. */
--
--#ifdef YYLEX_PARAM
--# define YYLEX yylex (YYLEX_PARAM)
--#else
--# define YYLEX yylex ()
--#endif
--
--/* Enable debugging if requested. */
--#if YYDEBUG
--
--# ifndef YYFPRINTF
--# include <stdio.h> /* INFRINGES ON USER NAME SPACE */
--# define YYFPRINTF fprintf
--# endif
--
--# define YYDPRINTF(Args) \
--do { \
-- if (yydebug) \
-- YYFPRINTF Args; \
--} while (YYID (0))
--
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \
--do { \
-- if (yydebug) \
-- { \
-- YYFPRINTF (stderr, "%s ", Title); \
-- yy_symbol_print (stderr, \
-- Type, Value); \
-- YYFPRINTF (stderr, "\n"); \
-- } \
--} while (YYID (0))
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_value_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (!yyvaluep)
-- return;
--# ifdef YYPRINT
-- if (yytype < YYNTOKENS)
-- YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
--# else
-- YYUSE (yyoutput);
--# endif
-- switch (yytype)
-- {
-- default:
-- break;
-- }
--}
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (yytype < YYNTOKENS)
-- YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
-- else
-- YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
--
-- yy_symbol_value_print (yyoutput, yytype, yyvaluep);
-- YYFPRINTF (yyoutput, ")");
--}
--
--/*------------------------------------------------------------------.
--| yy_stack_print -- Print the state stack from its BOTTOM up to its |
--| TOP (included). |
--`------------------------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_stack_print (yytype_int16 *bottom, yytype_int16 *top)
--#else
--static void
--yy_stack_print (bottom, top)
-- yytype_int16 *bottom;
-- yytype_int16 *top;
--#endif
--{
-- YYFPRINTF (stderr, "Stack now");
-- for (; bottom <= top; ++bottom)
-- YYFPRINTF (stderr, " %d", *bottom);
-- YYFPRINTF (stderr, "\n");
--}
--
--# define YY_STACK_PRINT(Bottom, Top) \
--do { \
-- if (yydebug) \
-- yy_stack_print ((Bottom), (Top)); \
--} while (YYID (0))
--
--
--/*------------------------------------------------.
--| Report that the YYRULE is going to be reduced. |
--`------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_reduce_print (YYSTYPE *yyvsp, int yyrule)
--#else
--static void
--yy_reduce_print (yyvsp, yyrule)
-- YYSTYPE *yyvsp;
-- int yyrule;
--#endif
--{
-- int yynrhs = yyr2[yyrule];
-- int yyi;
-- unsigned long int yylno = yyrline[yyrule];
-- YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
-- yyrule - 1, yylno);
-- /* The symbols being reduced. */
-- for (yyi = 0; yyi < yynrhs; yyi++)
-- {
-- fprintf (stderr, " $%d = ", yyi + 1);
-- yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi],
-- &(yyvsp[(yyi + 1) - (yynrhs)])
-- );
-- fprintf (stderr, "\n");
-- }
--}
--
--# define YY_REDUCE_PRINT(Rule) \
--do { \
-- if (yydebug) \
-- yy_reduce_print (yyvsp, Rule); \
--} while (YYID (0))
--
--/* Nonzero means print parse trace. It is left uninitialized so that
-- multiple parsers can coexist. */
--int yydebug;
--#else /* !YYDEBUG */
--# define YYDPRINTF(Args)
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
--# define YY_STACK_PRINT(Bottom, Top)
--# define YY_REDUCE_PRINT(Rule)
--#endif /* !YYDEBUG */
--
--
--/* YYINITDEPTH -- initial size of the parser's stacks. */
--#ifndef YYINITDEPTH
--# define YYINITDEPTH 200
--#endif
--
--/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
-- if the built-in stack extension method is used).
--
-- Do not make this value too large; the results are undefined if
-- YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
-- evaluated with infinite-precision integer arithmetic. */
--
--#ifndef YYMAXDEPTH
--# define YYMAXDEPTH 10000
--#endif
--
--
--
--#if YYERROR_VERBOSE
--
--# ifndef yystrlen
--# if defined __GLIBC__ && defined _STRING_H
--# define yystrlen strlen
--# else
--/* Return the length of YYSTR. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static YYSIZE_T
--yystrlen (const char *yystr)
--#else
--static YYSIZE_T
--yystrlen (yystr)
-- const char *yystr;
--#endif
--{
-- YYSIZE_T yylen;
-- for (yylen = 0; yystr[yylen]; yylen++)
-- continue;
-- return yylen;
--}
--# endif
--# endif
--
--# ifndef yystpcpy
--# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
--# define yystpcpy stpcpy
--# else
--/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
-- YYDEST. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static char *
--yystpcpy (char *yydest, const char *yysrc)
--#else
--static char *
--yystpcpy (yydest, yysrc)
-- char *yydest;
-- const char *yysrc;
--#endif
--{
-- char *yyd = yydest;
-- const char *yys = yysrc;
--
-- while ((*yyd++ = *yys++) != '\0')
-- continue;
--
-- return yyd - 1;
--}
--# endif
--# endif
--
--# ifndef yytnamerr
--/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
-- quotes and backslashes, so that it's suitable for yyerror. The
-- heuristic is that double-quoting is unnecessary unless the string
-- contains an apostrophe, a comma, or backslash (other than
-- backslash-backslash). YYSTR is taken from yytname. If YYRES is
-- null, do not copy; instead, return the length of what the result
-- would have been. */
--static YYSIZE_T
--yytnamerr (char *yyres, const char *yystr)
--{
-- if (*yystr == '"')
-- {
-- YYSIZE_T yyn = 0;
-- char const *yyp = yystr;
--
-- for (;;)
-- switch (*++yyp)
-- {
-- case '\'':
-- case ',':
-- goto do_not_strip_quotes;
--
-- case '\\':
-- if (*++yyp != '\\')
-- goto do_not_strip_quotes;
-- /* Fall through. */
-- default:
-- if (yyres)
-- yyres[yyn] = *yyp;
-- yyn++;
-- break;
--
-- case '"':
-- if (yyres)
-- yyres[yyn] = '\0';
-- return yyn;
-- }
-- do_not_strip_quotes: ;
-- }
--
-- if (! yyres)
-- return yystrlen (yystr);
--
-- return yystpcpy (yyres, yystr) - yyres;
--}
--# endif
--
--/* Copy into YYRESULT an error message about the unexpected token
-- YYCHAR while in state YYSTATE. Return the number of bytes copied,
-- including the terminating null byte. If YYRESULT is null, do not
-- copy anything; just return the number of bytes that would be
-- copied. As a special case, return 0 if an ordinary "syntax error"
-- message will do. Return YYSIZE_MAXIMUM if overflow occurs during
-- size calculation. */
--static YYSIZE_T
--yysyntax_error (char *yyresult, int yystate, int yychar)
--{
-- int yyn = yypact[yystate];
--
-- if (! (YYPACT_NINF < yyn && yyn <= YYLAST))
-- return 0;
-- else
-- {
-- int yytype = YYTRANSLATE (yychar);
-- YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]);
-- YYSIZE_T yysize = yysize0;
-- YYSIZE_T yysize1;
-- int yysize_overflow = 0;
-- enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
-- char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
-- int yyx;
--
--# if 0
-- /* This is so xgettext sees the translatable formats that are
-- constructed on the fly. */
-- YY_("syntax error, unexpected %s");
-- YY_("syntax error, unexpected %s, expecting %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s");
--# endif
-- char *yyfmt;
-- char const *yyf;
-- static char const yyunexpected[] = "syntax error, unexpected %s";
-- static char const yyexpecting[] = ", expecting %s";
-- static char const yyor[] = " or %s";
-- char yyformat[sizeof yyunexpected
-- + sizeof yyexpecting - 1
-- + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2)
-- * (sizeof yyor - 1))];
-- char const *yyprefix = yyexpecting;
--
-- /* Start YYX at -YYN if negative to avoid negative indexes in
-- YYCHECK. */
-- int yyxbegin = yyn < 0 ? -yyn : 0;
--
-- /* Stay within bounds of both yycheck and yytname. */
-- int yychecklim = YYLAST - yyn + 1;
-- int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
-- int yycount = 1;
--
-- yyarg[0] = yytname[yytype];
-- yyfmt = yystpcpy (yyformat, yyunexpected);
--
-- for (yyx = yyxbegin; yyx < yyxend; ++yyx)
-- if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
-- {
-- if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
-- {
-- yycount = 1;
-- yysize = yysize0;
-- yyformat[sizeof yyunexpected - 1] = '\0';
-- break;
-- }
-- yyarg[yycount++] = yytname[yyx];
-- yysize1 = yysize + yytnamerr (0, yytname[yyx]);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
-- yyfmt = yystpcpy (yyfmt, yyprefix);
-- yyprefix = yyor;
-- }
--
-- yyf = YY_(yyformat);
-- yysize1 = yysize + yystrlen (yyf);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
--
-- if (yysize_overflow)
-- return YYSIZE_MAXIMUM;
--
-- if (yyresult)
-- {
-- /* Avoid sprintf, as that infringes on the user's name space.
-- Don't have undefined behavior even if the translation
-- produced a string with the wrong number of "%s"s. */
-- char *yyp = yyresult;
-- int yyi = 0;
-- while ((*yyp = *yyf) != '\0')
-- {
-- if (*yyp == '%' && yyf[1] == 's' && yyi < yycount)
-- {
-- yyp += yytnamerr (yyp, yyarg[yyi++]);
-- yyf += 2;
-- }
-- else
-- {
-- yyp++;
-- yyf++;
-- }
-- }
-- }
-- return yysize;
-- }
--}
--#endif /* YYERROR_VERBOSE */
--
--
--/*-----------------------------------------------.
--| Release the memory associated to this symbol. |
--`-----------------------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep)
--#else
--static void
--yydestruct (yymsg, yytype, yyvaluep)
-- const char *yymsg;
-- int yytype;
-- YYSTYPE *yyvaluep;
--#endif
--{
-- YYUSE (yyvaluep);
--
-- if (!yymsg)
-- yymsg = "Deleting";
-- YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
--
-- switch (yytype)
-- {
--
-- default:
-- break;
-- }
--}
--
--
--/* Prevent warnings from -Wmissing-prototypes. */
--
--#ifdef YYPARSE_PARAM
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void *YYPARSE_PARAM);
--#else
--int yyparse ();
--#endif
--#else /* ! YYPARSE_PARAM */
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void);
--#else
--int yyparse ();
--#endif
--#endif /* ! YYPARSE_PARAM */
--
--
--
--/* The look-ahead symbol. */
--int yychar;
--
--/* The semantic value of the look-ahead symbol. */
--YYSTYPE yylval;
--
--/* Number of syntax errors so far. */
--int yynerrs;
--
--
--
--/*----------.
--| yyparse. |
--`----------*/
--
--#ifdef YYPARSE_PARAM
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void *YYPARSE_PARAM)
--#else
--int
--yyparse (YYPARSE_PARAM)
-- void *YYPARSE_PARAM;
--#endif
--#else /* ! YYPARSE_PARAM */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void)
--#else
--int
--yyparse ()
--
--#endif
--#endif
--{
--
-- int yystate;
-- int yyn;
-- int yyresult;
-- /* Number of tokens to shift before error messages enabled. */
-- int yyerrstatus;
-- /* Look-ahead token as an internal (translated) token number. */
-- int yytoken = 0;
--#if YYERROR_VERBOSE
-- /* Buffer for error messages, and its allocated size. */
-- char yymsgbuf[128];
-- char *yymsg = yymsgbuf;
-- YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
--#endif
--
-- /* Three stacks and their tools:
-- `yyss': related to states,
-- `yyvs': related to semantic values,
-- `yyls': related to locations.
--
-- Refer to the stacks thru separate pointers, to allow yyoverflow
-- to reallocate them elsewhere. */
--
-- /* The state stack. */
-- yytype_int16 yyssa[YYINITDEPTH];
-- yytype_int16 *yyss = yyssa;
-- yytype_int16 *yyssp;
--
-- /* The semantic value stack. */
-- YYSTYPE yyvsa[YYINITDEPTH];
-- YYSTYPE *yyvs = yyvsa;
-- YYSTYPE *yyvsp;
--
--
--
--#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N))
--
-- YYSIZE_T yystacksize = YYINITDEPTH;
--
-- /* The variables used to return semantic value and location from the
-- action routines. */
-- YYSTYPE yyval;
--
--
-- /* The number of symbols on the RHS of the reduced rule.
-- Keep to zero when no symbol should be popped. */
-- int yylen = 0;
--
-- YYDPRINTF ((stderr, "Starting parse\n"));
--
-- yystate = 0;
-- yyerrstatus = 0;
-- yynerrs = 0;
-- yychar = YYEMPTY; /* Cause a token to be read. */
--
-- /* Initialize stack pointers.
-- Waste one element of value and location stack
-- so that they stay on the same level as the state stack.
-- The wasted elements are never initialized. */
--
-- yyssp = yyss;
-- yyvsp = yyvs;
--
-- goto yysetstate;
--
--/*------------------------------------------------------------.
--| yynewstate -- Push a new state, which is found in yystate. |
--`------------------------------------------------------------*/
-- yynewstate:
-- /* In all cases, when you get here, the value and location stacks
-- have just been pushed. So pushing a state here evens the stacks. */
-- yyssp++;
--
-- yysetstate:
-- *yyssp = yystate;
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- {
-- /* Get the current used size of the three stacks, in elements. */
-- YYSIZE_T yysize = yyssp - yyss + 1;
--
--#ifdef yyoverflow
-- {
-- /* Give user a chance to reallocate the stack. Use copies of
-- these so that the &'s don't force the real ones into
-- memory. */
-- YYSTYPE *yyvs1 = yyvs;
-- yytype_int16 *yyss1 = yyss;
--
--
-- /* Each stack pointer address is followed by the size of the
-- data in use in that stack, in bytes. This used to be a
-- conditional around just the two extra args, but that might
-- be undefined if yyoverflow is a macro. */
-- yyoverflow (YY_("memory exhausted"),
-- &yyss1, yysize * sizeof (*yyssp),
-- &yyvs1, yysize * sizeof (*yyvsp),
--
-- &yystacksize);
--
-- yyss = yyss1;
-- yyvs = yyvs1;
-- }
--#else /* no yyoverflow */
--# ifndef YYSTACK_RELOCATE
-- goto yyexhaustedlab;
--# else
-- /* Extend the stack our own way. */
-- if (YYMAXDEPTH <= yystacksize)
-- goto yyexhaustedlab;
-- yystacksize *= 2;
-- if (YYMAXDEPTH < yystacksize)
-- yystacksize = YYMAXDEPTH;
--
-- {
-- yytype_int16 *yyss1 = yyss;
-- union yyalloc *yyptr =
-- (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
-- if (! yyptr)
-- goto yyexhaustedlab;
-- YYSTACK_RELOCATE (yyss);
-- YYSTACK_RELOCATE (yyvs);
--
--# undef YYSTACK_RELOCATE
-- if (yyss1 != yyssa)
-- YYSTACK_FREE (yyss1);
-- }
--# endif
--#endif /* no yyoverflow */
--
-- yyssp = yyss + yysize - 1;
-- yyvsp = yyvs + yysize - 1;
--
--
-- YYDPRINTF ((stderr, "Stack size increased to %lu\n",
-- (unsigned long int) yystacksize));
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- YYABORT;
-- }
--
-- YYDPRINTF ((stderr, "Entering state %d\n", yystate));
--
-- goto yybackup;
--
--/*-----------.
--| yybackup. |
--`-----------*/
--yybackup:
--
-- /* Do appropriate processing given the current state. Read a
-- look-ahead token if we need one and don't already have one. */
--
-- /* First try to decide what to do without reference to look-ahead token. */
-- yyn = yypact[yystate];
-- if (yyn == YYPACT_NINF)
-- goto yydefault;
--
-- /* Not known => get a look-ahead token if don't already have one. */
--
-- /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */
-- if (yychar == YYEMPTY)
-- {
-- YYDPRINTF ((stderr, "Reading a token: "));
-- yychar = YYLEX;
-- }
--
-- if (yychar <= YYEOF)
-- {
-- yychar = yytoken = YYEOF;
-- YYDPRINTF ((stderr, "Now at end of input.\n"));
-- }
-- else
-- {
-- yytoken = YYTRANSLATE (yychar);
-- YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
-- }
--
-- /* If the proper action on seeing token YYTOKEN is to reduce or to
-- detect an error, take that action. */
-- yyn += yytoken;
-- if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
-- goto yydefault;
-- yyn = yytable[yyn];
-- if (yyn <= 0)
-- {
-- if (yyn == 0 || yyn == YYTABLE_NINF)
-- goto yyerrlab;
-- yyn = -yyn;
-- goto yyreduce;
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- /* Count tokens shifted since error; after three, turn off error
-- status. */
-- if (yyerrstatus)
-- yyerrstatus--;
--
-- /* Shift the look-ahead token. */
-- YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
--
-- /* Discard the shifted token unless it is eof. */
-- if (yychar != YYEOF)
-- yychar = YYEMPTY;
--
-- yystate = yyn;
-- *++yyvsp = yylval;
--
-- goto yynewstate;
--
--
--/*-----------------------------------------------------------.
--| yydefault -- do the default action for the current state. |
--`-----------------------------------------------------------*/
--yydefault:
-- yyn = yydefact[yystate];
-- if (yyn == 0)
-- goto yyerrlab;
-- goto yyreduce;
--
--
--/*-----------------------------.
--| yyreduce -- Do a reduction. |
--`-----------------------------*/
--yyreduce:
-- /* yyn is the number of a rule to reduce with. */
-- yylen = yyr2[yyn];
--
-- /* If YYLEN is nonzero, implement the default value of the action:
-- `$$ = $1'.
--
-- Otherwise, the following line sets YYVAL to garbage.
-- This behavior is undocumented and Bison
-- users should not rely upon it. Assigning to YYVAL
-- unconditionally makes the parser a bit smaller, and it avoids a
-- GCC warning that YYVAL may be used uninitialized. */
-- yyval = yyvsp[1-yylen];
--
--
-- YY_REDUCE_PRINT (yyn);
-- switch (yyn)
-- {
-- case 2:
--#line 69 "arparse.y"
-- { prompt(); }
-- break;
--
-- case 6:
--#line 78 "arparse.y"
-- { prompt(); }
-- break;
--
-- case 19:
--#line 94 "arparse.y"
-- { ar_end(); return 0; }
-- break;
--
-- case 21:
--#line 96 "arparse.y"
-- { yyerror("foo"); }
-- break;
--
-- case 23:
--#line 103 "arparse.y"
-- { ar_extract((yyvsp[(2) - (2)].list)); }
-- break;
--
-- case 24:
--#line 108 "arparse.y"
-- { ar_replace((yyvsp[(2) - (2)].list)); }
-- break;
--
-- case 25:
--#line 113 "arparse.y"
-- { ar_clear(); }
-- break;
--
-- case 26:
--#line 118 "arparse.y"
-- { ar_delete((yyvsp[(2) - (2)].list)); }
-- break;
--
-- case 27:
--#line 122 "arparse.y"
-- { ar_addmod((yyvsp[(2) - (2)].list)); }
-- break;
--
-- case 28:
--#line 127 "arparse.y"
-- { ar_list(); }
-- break;
--
-- case 29:
--#line 132 "arparse.y"
-- { ar_save(); }
-- break;
--
-- case 30:
--#line 139 "arparse.y"
-- { ar_open((yyvsp[(2) - (2)].name),0); }
-- break;
--
-- case 31:
--#line 144 "arparse.y"
-- { ar_open((yyvsp[(2) - (2)].name),1); }
-- break;
--
-- case 32:
--#line 150 "arparse.y"
-- { ar_addlib((yyvsp[(2) - (3)].name),(yyvsp[(3) - (3)].list)); }
-- break;
--
-- case 33:
--#line 154 "arparse.y"
-- { ar_directory((yyvsp[(2) - (4)].name), (yyvsp[(3) - (4)].list), (yyvsp[(4) - (4)].name)); }
-- break;
--
-- case 34:
--#line 161 "arparse.y"
-- { (yyval.name) = (yyvsp[(1) - (1)].name); }
-- break;
--
-- case 35:
--#line 162 "arparse.y"
-- { (yyval.name) = 0; }
-- break;
--
-- case 36:
--#line 167 "arparse.y"
-- { (yyval.list) = (yyvsp[(2) - (3)].list); }
-- break;
--
-- case 37:
--#line 169 "arparse.y"
-- { (yyval.list) = 0; }
-- break;
--
-- case 38:
--#line 174 "arparse.y"
-- { struct list *n = (struct list *) malloc(sizeof(struct list));
-- n->next = (yyvsp[(1) - (3)].list);
-- n->name = (yyvsp[(3) - (3)].name);
-- (yyval.list) = n;
-- }
-- break;
--
-- case 39:
--#line 179 "arparse.y"
-- { (yyval.list) = 0; }
-- break;
--
-- case 42:
--#line 191 "arparse.y"
-- { verbose = !verbose; }
-- break;
--
--
--/* Line 1267 of yacc.c. */
--#line 1546 "arparse.c"
-- default: break;
-- }
-- YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
--
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
--
-- *++yyvsp = yyval;
--
--
-- /* Now `shift' the result of the reduction. Determine what state
-- that goes to, based on the state we popped back to and the rule
-- number reduced by. */
--
-- yyn = yyr1[yyn];
--
-- yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
-- if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
-- yystate = yytable[yystate];
-- else
-- yystate = yydefgoto[yyn - YYNTOKENS];
--
-- goto yynewstate;
--
--
--/*------------------------------------.
--| yyerrlab -- here on detecting error |
--`------------------------------------*/
--yyerrlab:
-- /* If not already recovering from an error, report this error. */
-- if (!yyerrstatus)
-- {
-- ++yynerrs;
--#if ! YYERROR_VERBOSE
-- yyerror (YY_("syntax error"));
--#else
-- {
-- YYSIZE_T yysize = yysyntax_error (0, yystate, yychar);
-- if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM)
-- {
-- YYSIZE_T yyalloc = 2 * yysize;
-- if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM))
-- yyalloc = YYSTACK_ALLOC_MAXIMUM;
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
-- yymsg = (char *) YYSTACK_ALLOC (yyalloc);
-- if (yymsg)
-- yymsg_alloc = yyalloc;
-- else
-- {
-- yymsg = yymsgbuf;
-- yymsg_alloc = sizeof yymsgbuf;
-- }
-- }
--
-- if (0 < yysize && yysize <= yymsg_alloc)
-- {
-- (void) yysyntax_error (yymsg, yystate, yychar);
-- yyerror (yymsg);
-- }
-- else
-- {
-- yyerror (YY_("syntax error"));
-- if (yysize != 0)
-- goto yyexhaustedlab;
-- }
-- }
--#endif
-- }
--
--
--
-- if (yyerrstatus == 3)
-- {
-- /* If just tried and failed to reuse look-ahead token after an
-- error, discard it. */
--
-- if (yychar <= YYEOF)
-- {
-- /* Return failure if at end of input. */
-- if (yychar == YYEOF)
-- YYABORT;
-- }
-- else
-- {
-- yydestruct ("Error: discarding",
-- yytoken, &yylval);
-- yychar = YYEMPTY;
-- }
-- }
--
-- /* Else will try to reuse look-ahead token after shifting the error
-- token. */
-- goto yyerrlab1;
--
--
--/*---------------------------------------------------.
--| yyerrorlab -- error raised explicitly by YYERROR. |
--`---------------------------------------------------*/
--yyerrorlab:
--
-- /* Pacify compilers like GCC when the user code never invokes
-- YYERROR and the label yyerrorlab therefore never appears in user
-- code. */
-- if (/*CONSTCOND*/ 0)
-- goto yyerrorlab;
--
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYERROR. */
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
-- yystate = *yyssp;
-- goto yyerrlab1;
--
--
--/*-------------------------------------------------------------.
--| yyerrlab1 -- common code for both syntax error and YYERROR. |
--`-------------------------------------------------------------*/
--yyerrlab1:
-- yyerrstatus = 3; /* Each real token shifted decrements this. */
--
-- for (;;)
-- {
-- yyn = yypact[yystate];
-- if (yyn != YYPACT_NINF)
-- {
-- yyn += YYTERROR;
-- if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
-- {
-- yyn = yytable[yyn];
-- if (0 < yyn)
-- break;
-- }
-- }
--
-- /* Pop the current state because it cannot handle the error token. */
-- if (yyssp == yyss)
-- YYABORT;
--
--
-- yydestruct ("Error: popping",
-- yystos[yystate], yyvsp);
-- YYPOPSTACK (1);
-- yystate = *yyssp;
-- YY_STACK_PRINT (yyss, yyssp);
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- *++yyvsp = yylval;
--
--
-- /* Shift the error token. */
-- YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
--
-- yystate = yyn;
-- goto yynewstate;
--
--
--/*-------------------------------------.
--| yyacceptlab -- YYACCEPT comes here. |
--`-------------------------------------*/
--yyacceptlab:
-- yyresult = 0;
-- goto yyreturn;
--
--/*-----------------------------------.
--| yyabortlab -- YYABORT comes here. |
--`-----------------------------------*/
--yyabortlab:
-- yyresult = 1;
-- goto yyreturn;
--
--#ifndef yyoverflow
--/*-------------------------------------------------.
--| yyexhaustedlab -- memory exhaustion comes here. |
--`-------------------------------------------------*/
--yyexhaustedlab:
-- yyerror (YY_("memory exhausted"));
-- yyresult = 2;
-- /* Fall through. */
--#endif
--
--yyreturn:
-- if (yychar != YYEOF && yychar != YYEMPTY)
-- yydestruct ("Cleanup: discarding lookahead",
-- yytoken, &yylval);
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYABORT or YYACCEPT. */
-- YYPOPSTACK (yylen);
-- YY_STACK_PRINT (yyss, yyssp);
-- while (yyssp != yyss)
-- {
-- yydestruct ("Cleanup: popping",
-- yystos[*yyssp], yyvsp);
-- YYPOPSTACK (1);
-- }
--#ifndef yyoverflow
-- if (yyss != yyssa)
-- YYSTACK_FREE (yyss);
--#endif
--#if YYERROR_VERBOSE
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
--#endif
-- /* Make sure YYID is used. */
-- return YYID (yyresult);
--}
--
--
--#line 195 "arparse.y"
--
--
--static int
--yyerror (const char *x ATTRIBUTE_UNUSED)
--{
-- extern int linenumber;
--
-- printf (_("Syntax error in archive script, line %d\n"), linenumber + 1);
-- return 0;
--}
--
-diff -Nur binutils-2.24.orig/binutils/arparse.h binutils-2.24/binutils/arparse.h
---- binutils-2.24.orig/binutils/arparse.h 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/arparse.h 1970-01-01 01:00:00.000000000 +0100
-@@ -1,102 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton interface for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- NEWLINE = 258,
-- VERBOSE = 259,
-- FILENAME = 260,
-- ADDLIB = 261,
-- LIST = 262,
-- ADDMOD = 263,
-- CLEAR = 264,
-- CREATE = 265,
-- DELETE = 266,
-- DIRECTORY = 267,
-- END = 268,
-- EXTRACT = 269,
-- FULLDIR = 270,
-- HELP = 271,
-- QUIT = 272,
-- REPLACE = 273,
-- SAVE = 274,
-- OPEN = 275
-- };
--#endif
--/* Tokens. */
--#define NEWLINE 258
--#define VERBOSE 259
--#define FILENAME 260
--#define ADDLIB 261
--#define LIST 262
--#define ADDMOD 263
--#define CLEAR 264
--#define CREATE 265
--#define DELETE 266
--#define DIRECTORY 267
--#define END 268
--#define EXTRACT 269
--#define FULLDIR 270
--#define HELP 271
--#define QUIT 272
--#define REPLACE 273
--#define SAVE 274
--#define OPEN 275
--
--
--
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 38 "arparse.y"
--{
-- char *name;
--struct list *list ;
--
--}
--/* Line 1529 of yacc.c. */
--#line 95 "arparse.h"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--extern YYSTYPE yylval;
--
-diff -Nur binutils-2.24.orig/binutils/deflex.c binutils-2.24/binutils/deflex.c
---- binutils-2.24.orig/binutils/deflex.c 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/deflex.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,2105 +0,0 @@
--
--#line 3 "deflex.c"
--
--#define YY_INT_ALIGNED short int
--
--/* A lexical scanner generated by flex */
--
--#define FLEX_SCANNER
--#define YY_FLEX_MAJOR_VERSION 2
--#define YY_FLEX_MINOR_VERSION 5
--#define YY_FLEX_SUBMINOR_VERSION 35
--#if YY_FLEX_SUBMINOR_VERSION > 0
--#define FLEX_BETA
--#endif
--
--/* First, we deal with platform-specific or compiler-specific issues. */
--
--/* begin standard C headers. */
--#include <stdio.h>
--#include <string.h>
--#include <errno.h>
--#include <stdlib.h>
--
--/* end standard C headers. */
--
--/* flex integer type definitions */
--
--#ifndef FLEXINT_H
--#define FLEXINT_H
--
--/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */
--
--#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
--
--/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
-- * if you want the limit (max/min) macros for int types.
-- */
--#ifndef __STDC_LIMIT_MACROS
--#define __STDC_LIMIT_MACROS 1
--#endif
--
--#include <inttypes.h>
--typedef int8_t flex_int8_t;
--typedef uint8_t flex_uint8_t;
--typedef int16_t flex_int16_t;
--typedef uint16_t flex_uint16_t;
--typedef int32_t flex_int32_t;
--typedef uint32_t flex_uint32_t;
--typedef uint64_t flex_uint64_t;
--#else
--typedef signed char flex_int8_t;
--typedef short int flex_int16_t;
--typedef int flex_int32_t;
--typedef unsigned char flex_uint8_t;
--typedef unsigned short int flex_uint16_t;
--typedef unsigned int flex_uint32_t;
--#endif /* ! C99 */
--
--/* Limits of integral types. */
--#ifndef INT8_MIN
--#define INT8_MIN (-128)
--#endif
--#ifndef INT16_MIN
--#define INT16_MIN (-32767-1)
--#endif
--#ifndef INT32_MIN
--#define INT32_MIN (-2147483647-1)
--#endif
--#ifndef INT8_MAX
--#define INT8_MAX (127)
--#endif
--#ifndef INT16_MAX
--#define INT16_MAX (32767)
--#endif
--#ifndef INT32_MAX
--#define INT32_MAX (2147483647)
--#endif
--#ifndef UINT8_MAX
--#define UINT8_MAX (255U)
--#endif
--#ifndef UINT16_MAX
--#define UINT16_MAX (65535U)
--#endif
--#ifndef UINT32_MAX
--#define UINT32_MAX (4294967295U)
--#endif
--
--#endif /* ! FLEXINT_H */
--
--#ifdef __cplusplus
--
--/* The "const" storage-class-modifier is valid. */
--#define YY_USE_CONST
--
--#else /* ! __cplusplus */
--
--/* C99 requires __STDC__ to be defined as 1. */
--#if defined (__STDC__)
--
--#define YY_USE_CONST
--
--#endif /* defined (__STDC__) */
--#endif /* ! __cplusplus */
--
--#ifdef YY_USE_CONST
--#define yyconst const
--#else
--#define yyconst
--#endif
--
--/* Returned upon end-of-file. */
--#define YY_NULL 0
--
--/* Promotes a possibly negative, possibly signed char to an unsigned
-- * integer for use as an array index. If the signed char is negative,
-- * we want to instead treat it as an 8-bit unsigned char, hence the
-- * double cast.
-- */
--#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c)
--
--/* Enter a start condition. This macro really ought to take a parameter,
-- * but we do it the disgusting crufty way forced on us by the ()-less
-- * definition of BEGIN.
-- */
--#define BEGIN (yy_start) = 1 + 2 *
--
--/* Translate the current start state into a value that can be later handed
-- * to BEGIN to return to the state. The YYSTATE alias is for lex
-- * compatibility.
-- */
--#define YY_START (((yy_start) - 1) / 2)
--#define YYSTATE YY_START
--
--/* Action number for EOF rule of a given start state. */
--#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1)
--
--/* Special action meaning "start processing a new file". */
--#define YY_NEW_FILE yyrestart(yyin )
--
--#define YY_END_OF_BUFFER_CHAR 0
--
--/* Size of default input buffer. */
--#ifndef YY_BUF_SIZE
--#define YY_BUF_SIZE 16384
--#endif
--
--/* The state buf must be large enough to hold one state per character in the main buffer.
-- */
--#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type))
--
--#ifndef YY_TYPEDEF_YY_BUFFER_STATE
--#define YY_TYPEDEF_YY_BUFFER_STATE
--typedef struct yy_buffer_state *YY_BUFFER_STATE;
--#endif
--
--#ifndef YY_TYPEDEF_YY_SIZE_T
--#define YY_TYPEDEF_YY_SIZE_T
--typedef size_t yy_size_t;
--#endif
--
--extern yy_size_t yyleng;
--
--extern FILE *yyin, *yyout;
--
--#define EOB_ACT_CONTINUE_SCAN 0
--#define EOB_ACT_END_OF_FILE 1
--#define EOB_ACT_LAST_MATCH 2
--
-- #define YY_LESS_LINENO(n)
--
--/* Return all but the first "n" matched characters back to the input stream. */
--#define yyless(n) \
-- do \
-- { \
-- /* Undo effects of setting up yytext. */ \
-- int yyless_macro_arg = (n); \
-- YY_LESS_LINENO(yyless_macro_arg);\
-- *yy_cp = (yy_hold_char); \
-- YY_RESTORE_YY_MORE_OFFSET \
-- (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \
-- YY_DO_BEFORE_ACTION; /* set up yytext again */ \
-- } \
-- while ( 0 )
--
--#define unput(c) yyunput( c, (yytext_ptr) )
--
--#ifndef YY_STRUCT_YY_BUFFER_STATE
--#define YY_STRUCT_YY_BUFFER_STATE
--struct yy_buffer_state
-- {
-- FILE *yy_input_file;
--
-- char *yy_ch_buf; /* input buffer */
-- char *yy_buf_pos; /* current position in input buffer */
--
-- /* Size of input buffer in bytes, not including room for EOB
-- * characters.
-- */
-- yy_size_t yy_buf_size;
--
-- /* Number of characters read into yy_ch_buf, not including EOB
-- * characters.
-- */
-- yy_size_t yy_n_chars;
--
-- /* Whether we "own" the buffer - i.e., we know we created it,
-- * and can realloc() it to grow it, and should free() it to
-- * delete it.
-- */
-- int yy_is_our_buffer;
--
-- /* Whether this is an "interactive" input source; if so, and
-- * if we're using stdio for input, then we want to use getc()
-- * instead of fread(), to make sure we stop fetching input after
-- * each newline.
-- */
-- int yy_is_interactive;
--
-- /* Whether we're considered to be at the beginning of a line.
-- * If so, '^' rules will be active on the next match, otherwise
-- * not.
-- */
-- int yy_at_bol;
--
-- int yy_bs_lineno; /**< The line count. */
-- int yy_bs_column; /**< The column count. */
--
-- /* Whether to try to fill the input buffer when we reach the
-- * end of it.
-- */
-- int yy_fill_buffer;
--
-- int yy_buffer_status;
--
--#define YY_BUFFER_NEW 0
--#define YY_BUFFER_NORMAL 1
-- /* When an EOF's been seen but there's still some text to process
-- * then we mark the buffer as YY_EOF_PENDING, to indicate that we
-- * shouldn't try reading from the input source any more. We might
-- * still have a bunch of tokens to match, though, because of
-- * possible backing-up.
-- *
-- * When we actually see the EOF, we change the status to "new"
-- * (via yyrestart()), so that the user can continue scanning by
-- * just pointing yyin at a new input file.
-- */
--#define YY_BUFFER_EOF_PENDING 2
--
-- };
--#endif /* !YY_STRUCT_YY_BUFFER_STATE */
--
--/* Stack of input buffers. */
--static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */
--static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */
--static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */
--
--/* We provide macros for accessing buffer states in case in the
-- * future we want to put the buffer states in a more general
-- * "scanner state".
-- *
-- * Returns the top of the stack, or NULL.
-- */
--#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \
-- ? (yy_buffer_stack)[(yy_buffer_stack_top)] \
-- : NULL)
--
--/* Same as previous macro, but useful when we know that the buffer stack is not
-- * NULL or when we need an lvalue. For internal use only.
-- */
--#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)]
--
--/* yy_hold_char holds the character lost when yytext is formed. */
--static char yy_hold_char;
--static yy_size_t yy_n_chars; /* number of characters read into yy_ch_buf */
--yy_size_t yyleng;
--
--/* Points to current character in buffer. */
--static char *yy_c_buf_p = (char *) 0;
--static int yy_init = 0; /* whether we need to initialize */
--static int yy_start = 0; /* start state number */
--
--/* Flag which is used to allow yywrap()'s to do buffer switches
-- * instead of setting up a fresh yyin. A bit of a hack ...
-- */
--static int yy_did_buffer_switch_on_eof;
--
--void yyrestart (FILE *input_file );
--void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer );
--YY_BUFFER_STATE yy_create_buffer (FILE *file,int size );
--void yy_delete_buffer (YY_BUFFER_STATE b );
--void yy_flush_buffer (YY_BUFFER_STATE b );
--void yypush_buffer_state (YY_BUFFER_STATE new_buffer );
--void yypop_buffer_state (void );
--
--static void yyensure_buffer_stack (void );
--static void yy_load_buffer_state (void );
--static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file );
--
--#define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER )
--
--YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size );
--YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str );
--YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,yy_size_t len );
--
--void *yyalloc (yy_size_t );
--void *yyrealloc (void *,yy_size_t );
--void yyfree (void * );
--
--#define yy_new_buffer yy_create_buffer
--
--#define yy_set_interactive(is_interactive) \
-- { \
-- if ( ! YY_CURRENT_BUFFER ){ \
-- yyensure_buffer_stack (); \
-- YY_CURRENT_BUFFER_LVALUE = \
-- yy_create_buffer(yyin,YY_BUF_SIZE ); \
-- } \
-- YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \
-- }
--
--#define yy_set_bol(at_bol) \
-- { \
-- if ( ! YY_CURRENT_BUFFER ){\
-- yyensure_buffer_stack (); \
-- YY_CURRENT_BUFFER_LVALUE = \
-- yy_create_buffer(yyin,YY_BUF_SIZE ); \
-- } \
-- YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \
-- }
--
--#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol)
--
--/* Begin user sect3 */
--
--typedef unsigned char YY_CHAR;
--
--FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0;
--
--typedef int yy_state_type;
--
--extern int yylineno;
--
--int yylineno = 1;
--
--extern char *yytext;
--#define yytext_ptr yytext
--
--static yy_state_type yy_get_previous_state (void );
--static yy_state_type yy_try_NUL_trans (yy_state_type current_state );
--static int yy_get_next_buffer (void );
--static void yy_fatal_error (yyconst char msg[] );
--
--/* Done after the current pattern has been matched and before the
-- * corresponding action - sets up yytext.
-- */
--#define YY_DO_BEFORE_ACTION \
-- (yytext_ptr) = yy_bp; \
-- yyleng = (yy_size_t) (yy_cp - yy_bp); \
-- (yy_hold_char) = *yy_cp; \
-- *yy_cp = '\0'; \
-- (yy_c_buf_p) = yy_cp;
--
--#define YY_NUM_RULES 42
--#define YY_END_OF_BUFFER 43
--/* This struct is not used in this scanner,
-- but its presence is necessary. */
--struct yy_trans_info
-- {
-- flex_int32_t yy_verify;
-- flex_int32_t yy_nxt;
-- };
--static yyconst flex_int16_t yy_accept[199] =
-- { 0,
-- 0, 0, 43, 42, 34, 36, 35, 33, 42, 28,
-- 42, 31, 41, 39, 27, 32, 38, 40, 28, 28,
-- 28, 28, 28, 28, 28, 28, 28, 28, 28, 28,
-- 28, 28, 28, 0, 29, 28, 0, 30, 31, 27,
-- 32, 37, 28, 28, 28, 28, 28, 28, 28, 28,
-- 28, 28, 28, 28, 28, 28, 28, 28, 28, 28,
-- 28, 28, 28, 28, 28, 28, 28, 28, 28, 28,
-- 28, 28, 28, 28, 28, 28, 28, 28, 28, 28,
-- 28, 28, 28, 28, 28, 28, 28, 12, 6, 28,
-- 7, 28, 28, 28, 28, 28, 28, 28, 28, 1,
--
-- 28, 28, 28, 16, 28, 28, 28, 28, 28, 28,
-- 28, 28, 28, 28, 28, 28, 28, 28, 28, 28,
-- 28, 28, 28, 28, 28, 28, 28, 28, 28, 28,
-- 28, 17, 28, 28, 28, 28, 28, 28, 28, 28,
-- 28, 28, 14, 28, 28, 28, 19, 21, 28, 28,
-- 28, 28, 28, 28, 18, 9, 28, 10, 28, 28,
-- 2, 28, 28, 15, 28, 28, 28, 28, 11, 13,
-- 28, 5, 28, 28, 22, 28, 8, 28, 28, 28,
-- 28, 28, 28, 20, 4, 28, 28, 28, 24, 28,
-- 26, 28, 3, 28, 28, 23, 25, 0
--
-- } ;
--
--static yyconst flex_int32_t yy_ec[256] =
-- { 0,
-- 1, 1, 1, 1, 1, 1, 1, 1, 2, 3,
-- 1, 1, 4, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 5, 1, 6, 1, 7, 1, 1, 8, 1,
-- 1, 9, 1, 10, 7, 11, 12, 13, 13, 13,
-- 13, 13, 13, 13, 13, 13, 13, 7, 14, 12,
-- 15, 12, 7, 16, 17, 18, 19, 20, 21, 22,
-- 23, 24, 25, 7, 26, 27, 28, 29, 30, 31,
-- 7, 32, 33, 34, 35, 36, 37, 38, 39, 40,
-- 1, 1, 1, 1, 7, 1, 22, 22, 22, 22,
--
-- 22, 22, 7, 7, 7, 7, 7, 7, 7, 7,
-- 7, 7, 7, 7, 7, 7, 7, 7, 7, 22,
-- 7, 7, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
--
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1
-- } ;
--
--static yyconst flex_int32_t yy_meta[41] =
-- { 0,
-- 1, 1, 2, 1, 1, 1, 3, 1, 1, 1,
-- 1, 4, 5, 1, 1, 4, 6, 6, 6, 6,
-- 6, 6, 3, 3, 3, 3, 3, 3, 3, 3,
-- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3
-- } ;
--
--static yyconst flex_int16_t yy_base[206] =
-- { 0,
-- 0, 0, 230, 231, 231, 231, 231, 231, 223, 0,
-- 220, 0, 231, 231, 0, 0, 212, 0, 209, 195,
-- 24, 186, 202, 14, 197, 186, 27, 188, 198, 25,
-- 197, 196, 184, 209, 231, 0, 206, 231, 0, 0,
-- 0, 231, 0, 180, 27, 178, 178, 27, 193, 178,
-- 183, 189, 179, 177, 175, 178, 185, 182, 183, 170,
-- 181, 165, 164, 170, 173, 172, 159, 174, 171, 170,
-- 158, 156, 156, 151, 152, 149, 161, 34, 145, 160,
-- 145, 146, 154, 157, 147, 141, 139, 0, 0, 138,
-- 0, 139, 135, 137, 135, 135, 29, 149, 140, 0,
--
-- 136, 139, 145, 0, 136, 139, 132, 132, 30, 132,
-- 135, 138, 129, 119, 118, 126, 116, 122, 119, 115,
-- 115, 124, 127, 109, 112, 121, 119, 106, 111, 108,
-- 106, 0, 106, 103, 112, 99, 91, 97, 99, 95,
-- 88, 99, 0, 93, 103, 94, 0, 0, 97, 91,
-- 87, 90, 84, 83, 0, 0, 95, 0, 97, 80,
-- 0, 92, 91, 0, 78, 70, 91, 74, 0, 0,
-- 82, 0, 89, 88, 0, 84, 0, 82, 85, 83,
-- 69, 66, 56, 0, 0, 39, 36, 35, 0, 44,
-- 0, 43, 0, 40, 39, 0, 0, 231, 67, 71,
--
-- 77, 83, 85, 91, 95
-- } ;
--
--static yyconst flex_int16_t yy_def[206] =
-- { 0,
-- 198, 1, 198, 198, 198, 198, 198, 198, 199, 200,
-- 201, 202, 198, 198, 203, 204, 198, 205, 200, 200,
-- 200, 200, 200, 200, 200, 200, 200, 200, 200, 200,
-- 200, 200, 200, 199, 198, 200, 201, 198, 202, 203,
-- 204, 198, 200, 200, 200, 200, 200, 200, 200, 200,
-- 200, 200, 200, 200, 200, 200, 200, 200, 200, 200,
-- 200, 200, 200, 200, 200, 200, 200, 200, 200, 200,
-- 200, 200, 200, 200, 200, 200, 200, 200, 200, 200,
-- 200, 200, 200, 200, 200, 200, 200, 200, 200, 200,
-- 200, 200, 200, 200, 200, 200, 200, 200, 200, 200,
--
-- 200, 200, 200, 200, 200, 200, 200, 200, 200, 200,
-- 200, 200, 200, 200, 200, 200, 200, 200, 200, 200,
-- 200, 200, 200, 200, 200, 200, 200, 200, 200, 200,
-- 200, 200, 200, 200, 200, 200, 200, 200, 200, 200,
-- 200, 200, 200, 200, 200, 200, 200, 200, 200, 200,
-- 200, 200, 200, 200, 200, 200, 200, 200, 200, 200,
-- 200, 200, 200, 200, 200, 200, 200, 200, 200, 200,
-- 200, 200, 200, 200, 200, 200, 200, 200, 200, 200,
-- 200, 200, 200, 200, 200, 200, 200, 200, 200, 200,
-- 200, 200, 200, 200, 200, 200, 200, 0, 198, 198,
--
-- 198, 198, 198, 198, 198
-- } ;
--
--static yyconst flex_int16_t yy_nxt[272] =
-- { 0,
-- 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
-- 14, 4, 15, 16, 17, 18, 10, 19, 20, 21,
-- 22, 10, 10, 23, 24, 10, 25, 26, 27, 10,
-- 28, 29, 30, 31, 10, 32, 33, 10, 10, 10,
-- 46, 50, 51, 54, 47, 58, 66, 70, 59, 60,
-- 101, 118, 129, 119, 130, 67, 55, 71, 61, 197,
-- 196, 195, 194, 193, 192, 191, 102, 34, 34, 34,
-- 34, 34, 34, 36, 36, 36, 36, 37, 37, 37,
-- 37, 37, 37, 39, 190, 39, 39, 39, 39, 40,
-- 40, 41, 189, 41, 41, 41, 41, 43, 188, 187,
--
-- 43, 186, 185, 184, 183, 182, 181, 180, 179, 178,
-- 177, 176, 175, 174, 173, 172, 171, 170, 169, 168,
-- 167, 166, 165, 164, 163, 162, 161, 160, 159, 158,
-- 157, 156, 155, 154, 153, 152, 151, 150, 149, 148,
-- 147, 146, 145, 144, 143, 142, 141, 140, 139, 138,
-- 137, 136, 135, 134, 133, 132, 131, 128, 127, 126,
-- 125, 124, 123, 122, 121, 120, 117, 116, 115, 114,
-- 113, 112, 111, 110, 109, 108, 107, 106, 105, 104,
-- 103, 100, 99, 98, 97, 96, 95, 94, 93, 92,
-- 91, 90, 89, 88, 87, 86, 85, 84, 83, 82,
--
-- 81, 80, 79, 78, 77, 76, 75, 74, 73, 72,
-- 69, 68, 65, 38, 35, 64, 63, 62, 57, 56,
-- 53, 52, 49, 48, 45, 44, 42, 38, 35, 198,
-- 3, 198, 198, 198, 198, 198, 198, 198, 198, 198,
-- 198, 198, 198, 198, 198, 198, 198, 198, 198, 198,
-- 198, 198, 198, 198, 198, 198, 198, 198, 198, 198,
-- 198, 198, 198, 198, 198, 198, 198, 198, 198, 198,
-- 198
-- } ;
--
--static yyconst flex_int16_t yy_chk[272] =
-- { 0,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 21, 24, 24, 27, 21, 30, 45, 48, 30, 30,
-- 78, 97, 109, 97, 109, 45, 27, 48, 30, 195,
-- 194, 192, 190, 188, 187, 186, 78, 199, 199, 199,
-- 199, 199, 199, 200, 200, 200, 200, 201, 201, 201,
-- 201, 201, 201, 202, 183, 202, 202, 202, 202, 203,
-- 203, 204, 182, 204, 204, 204, 204, 205, 181, 180,
--
-- 205, 179, 178, 176, 174, 173, 171, 168, 167, 166,
-- 165, 163, 162, 160, 159, 157, 154, 153, 152, 151,
-- 150, 149, 146, 145, 144, 142, 141, 140, 139, 138,
-- 137, 136, 135, 134, 133, 131, 130, 129, 128, 127,
-- 126, 125, 124, 123, 122, 121, 120, 119, 118, 117,
-- 116, 115, 114, 113, 112, 111, 110, 108, 107, 106,
-- 105, 103, 102, 101, 99, 98, 96, 95, 94, 93,
-- 92, 90, 87, 86, 85, 84, 83, 82, 81, 80,
-- 79, 77, 76, 75, 74, 73, 72, 71, 70, 69,
-- 68, 67, 66, 65, 64, 63, 62, 61, 60, 59,
--
-- 58, 57, 56, 55, 54, 53, 52, 51, 50, 49,
-- 47, 46, 44, 37, 34, 33, 32, 31, 29, 28,
-- 26, 25, 23, 22, 20, 19, 17, 11, 9, 3,
-- 198, 198, 198, 198, 198, 198, 198, 198, 198, 198,
-- 198, 198, 198, 198, 198, 198, 198, 198, 198, 198,
-- 198, 198, 198, 198, 198, 198, 198, 198, 198, 198,
-- 198, 198, 198, 198, 198, 198, 198, 198, 198, 198,
-- 198
-- } ;
--
--static yy_state_type yy_last_accepting_state;
--static char *yy_last_accepting_cpos;
--
--extern int yy_flex_debug;
--int yy_flex_debug = 0;
--
--/* The intent behind this definition is that it'll catch
-- * any uses of REJECT which flex missed.
-- */
--#define REJECT reject_used_but_not_detected
--#define yymore() yymore_used_but_not_detected
--#define YY_MORE_ADJ 0
--#define YY_RESTORE_YY_MORE_OFFSET
--char *yytext;
--#line 1 "deflex.l"
--#line 2 "deflex.l"
--
--/* Copyright 1995, 1997, 1998, 1999, 2002, 2003, 2004, 2005, 2007
-- Free Software Foundation, Inc.
--
-- This file is part of GNU Binutils.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-- MA 02110-1301, USA. */
--
--
--/* Contributed by Steve Chamberlain: sac@cygnus.com */
--
--#define DONTDECLARE_MALLOC
--#include "libiberty.h"
--#include "defparse.h"
--#include "dlltool.h"
--
--#define YY_NO_UNPUT
--
--int linenumber;
--
--#line 610 "deflex.c"
--
--#define INITIAL 0
--
--#ifndef YY_NO_UNISTD_H
--/* Special case for "unistd.h", since it is non-ANSI. We include it way
-- * down here because we want the user's section 1 to have been scanned first.
-- * The user has a chance to override it with an option.
-- */
--#include <unistd.h>
--#endif
--
--#ifndef YY_EXTRA_TYPE
--#define YY_EXTRA_TYPE void *
--#endif
--
--static int yy_init_globals (void );
--
--/* Accessor methods to globals.
-- These are made visible to non-reentrant scanners for convenience. */
--
--int yylex_destroy (void );
--
--int yyget_debug (void );
--
--void yyset_debug (int debug_flag );
--
--YY_EXTRA_TYPE yyget_extra (void );
--
--void yyset_extra (YY_EXTRA_TYPE user_defined );
--
--FILE *yyget_in (void );
--
--void yyset_in (FILE * in_str );
--
--FILE *yyget_out (void );
--
--void yyset_out (FILE * out_str );
--
--yy_size_t yyget_leng (void );
--
--char *yyget_text (void );
--
--int yyget_lineno (void );
--
--void yyset_lineno (int line_number );
--
--/* Macros after this point can all be overridden by user definitions in
-- * section 1.
-- */
--
--#ifndef YY_SKIP_YYWRAP
--#ifdef __cplusplus
--extern "C" int yywrap (void );
--#else
--extern int yywrap (void );
--#endif
--#endif
--
-- static void yyunput (int c,char *buf_ptr );
--
--#ifndef yytext_ptr
--static void yy_flex_strncpy (char *,yyconst char *,int );
--#endif
--
--#ifdef YY_NEED_STRLEN
--static int yy_flex_strlen (yyconst char * );
--#endif
--
--#ifndef YY_NO_INPUT
--
--#ifdef __cplusplus
--static int yyinput (void );
--#else
--static int input (void );
--#endif
--
--#endif
--
--/* Amount of stuff to slurp up with each read. */
--#ifndef YY_READ_BUF_SIZE
--#define YY_READ_BUF_SIZE 8192
--#endif
--
--/* Copy whatever the last rule matched to the standard output. */
--#ifndef ECHO
--/* This used to be an fputs(), but since the string might contain NUL's,
-- * we now use fwrite().
-- */
--#define ECHO fwrite( yytext, yyleng, 1, yyout )
--#endif
--
--/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL,
-- * is returned in "result".
-- */
--#ifndef YY_INPUT
--#define YY_INPUT(buf,result,max_size) \
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \
-- { \
-- int c = '*'; \
-- yy_size_t n; \
-- for ( n = 0; n < max_size && \
-- (c = getc( yyin )) != EOF && c != '\n'; ++n ) \
-- buf[n] = (char) c; \
-- if ( c == '\n' ) \
-- buf[n++] = (char) c; \
-- if ( c == EOF && ferror( yyin ) ) \
-- YY_FATAL_ERROR( "input in flex scanner failed" ); \
-- result = n; \
-- } \
-- else \
-- { \
-- errno=0; \
-- while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \
-- { \
-- if( errno != EINTR) \
-- { \
-- YY_FATAL_ERROR( "input in flex scanner failed" ); \
-- break; \
-- } \
-- errno=0; \
-- clearerr(yyin); \
-- } \
-- }\
--\
--
--#endif
--
--/* No semi-colon after return; correct usage is to write "yyterminate();" -
-- * we don't want an extra ';' after the "return" because that will cause
-- * some compilers to complain about unreachable statements.
-- */
--#ifndef yyterminate
--#define yyterminate() return YY_NULL
--#endif
--
--/* Number of entries by which start-condition stack grows. */
--#ifndef YY_START_STACK_INCR
--#define YY_START_STACK_INCR 25
--#endif
--
--/* Report a fatal error. */
--#ifndef YY_FATAL_ERROR
--#define YY_FATAL_ERROR(msg) yy_fatal_error( msg )
--#endif
--
--/* end tables serialization structures and prototypes */
--
--/* Default declaration of generated scanner - a define so the user can
-- * easily add parameters.
-- */
--#ifndef YY_DECL
--#define YY_DECL_IS_OURS 1
--
--extern int yylex (void);
--
--#define YY_DECL int yylex (void)
--#endif /* !YY_DECL */
--
--/* Code executed at the beginning of each rule, after yytext and yyleng
-- * have been set up.
-- */
--#ifndef YY_USER_ACTION
--#define YY_USER_ACTION
--#endif
--
--/* Code executed at the end of each rule. */
--#ifndef YY_BREAK
--#define YY_BREAK break;
--#endif
--
--#define YY_RULE_SETUP \
-- YY_USER_ACTION
--
--/** The main scanner function which does all the work.
-- */
--YY_DECL
--{
-- register yy_state_type yy_current_state;
-- register char *yy_cp, *yy_bp;
-- register int yy_act;
--
--#line 36 "deflex.l"
--
--#line 794 "deflex.c"
--
-- if ( !(yy_init) )
-- {
-- (yy_init) = 1;
--
--#ifdef YY_USER_INIT
-- YY_USER_INIT;
--#endif
--
-- if ( ! (yy_start) )
-- (yy_start) = 1; /* first start state */
--
-- if ( ! yyin )
-- yyin = stdin;
--
-- if ( ! yyout )
-- yyout = stdout;
--
-- if ( ! YY_CURRENT_BUFFER ) {
-- yyensure_buffer_stack ();
-- YY_CURRENT_BUFFER_LVALUE =
-- yy_create_buffer(yyin,YY_BUF_SIZE );
-- }
--
-- yy_load_buffer_state( );
-- }
--
-- while ( 1 ) /* loops until end-of-file is reached */
-- {
-- yy_cp = (yy_c_buf_p);
--
-- /* Support of yytext. */
-- *yy_cp = (yy_hold_char);
--
-- /* yy_bp points to the position in yy_ch_buf of the start of
-- * the current run.
-- */
-- yy_bp = yy_cp;
--
-- yy_current_state = (yy_start);
--yy_match:
-- do
-- {
-- register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)];
-- if ( yy_accept[yy_current_state] )
-- {
-- (yy_last_accepting_state) = yy_current_state;
-- (yy_last_accepting_cpos) = yy_cp;
-- }
-- while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
-- {
-- yy_current_state = (int) yy_def[yy_current_state];
-- if ( yy_current_state >= 199 )
-- yy_c = yy_meta[(unsigned int) yy_c];
-- }
-- yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-- ++yy_cp;
-- }
-- while ( yy_base[yy_current_state] != 231 );
--
--yy_find_action:
-- yy_act = yy_accept[yy_current_state];
-- if ( yy_act == 0 )
-- { /* have to back up */
-- yy_cp = (yy_last_accepting_cpos);
-- yy_current_state = (yy_last_accepting_state);
-- yy_act = yy_accept[yy_current_state];
-- }
--
-- YY_DO_BEFORE_ACTION;
--
--do_action: /* This label is used only to access EOF actions. */
--
-- switch ( yy_act )
-- { /* beginning of action switch */
-- case 0: /* must back up */
-- /* undo the effects of YY_DO_BEFORE_ACTION */
-- *yy_cp = (yy_hold_char);
-- yy_cp = (yy_last_accepting_cpos);
-- yy_current_state = (yy_last_accepting_state);
-- goto yy_find_action;
--
--case 1:
--YY_RULE_SETUP
--#line 37 "deflex.l"
--{ return NAME;}
-- YY_BREAK
--case 2:
--YY_RULE_SETUP
--#line 38 "deflex.l"
--{ return LIBRARY;}
-- YY_BREAK
--case 3:
--YY_RULE_SETUP
--#line 39 "deflex.l"
--{ return DESCRIPTION;}
-- YY_BREAK
--case 4:
--YY_RULE_SETUP
--#line 40 "deflex.l"
--{ return STACKSIZE;}
-- YY_BREAK
--case 5:
--YY_RULE_SETUP
--#line 41 "deflex.l"
--{ return HEAPSIZE;}
-- YY_BREAK
--case 6:
--YY_RULE_SETUP
--#line 42 "deflex.l"
--{ return CODE;}
-- YY_BREAK
--case 7:
--YY_RULE_SETUP
--#line 43 "deflex.l"
--{ return DATA;}
-- YY_BREAK
--case 8:
--YY_RULE_SETUP
--#line 44 "deflex.l"
--{ return SECTIONS;}
-- YY_BREAK
--case 9:
--YY_RULE_SETUP
--#line 45 "deflex.l"
--{ return EXPORTS;}
-- YY_BREAK
--case 10:
--YY_RULE_SETUP
--#line 46 "deflex.l"
--{ return IMPORTS;}
-- YY_BREAK
--case 11:
--YY_RULE_SETUP
--#line 47 "deflex.l"
--{ return VERSIONK;}
-- YY_BREAK
--case 12:
--YY_RULE_SETUP
--#line 48 "deflex.l"
--{ return BASE;}
-- YY_BREAK
--case 13:
--YY_RULE_SETUP
--#line 49 "deflex.l"
--{ return CONSTANT; }
-- YY_BREAK
--case 14:
--YY_RULE_SETUP
--#line 50 "deflex.l"
--{ return NONAME; }
-- YY_BREAK
--case 15:
--YY_RULE_SETUP
--#line 51 "deflex.l"
--{ return PRIVATE; }
-- YY_BREAK
--case 16:
--YY_RULE_SETUP
--#line 52 "deflex.l"
--{ return READ;}
-- YY_BREAK
--case 17:
--YY_RULE_SETUP
--#line 53 "deflex.l"
--{ return WRITE;}
-- YY_BREAK
--case 18:
--YY_RULE_SETUP
--#line 54 "deflex.l"
--{ return EXECUTE;}
-- YY_BREAK
--case 19:
--YY_RULE_SETUP
--#line 55 "deflex.l"
--{ return SHARED;}
-- YY_BREAK
--case 20:
--YY_RULE_SETUP
--#line 56 "deflex.l"
--{ return NONSHARED;}
-- YY_BREAK
--case 21:
--YY_RULE_SETUP
--#line 57 "deflex.l"
--{ return SINGLE;}
-- YY_BREAK
--case 22:
--YY_RULE_SETUP
--#line 58 "deflex.l"
--{ return MULTIPLE;}
-- YY_BREAK
--case 23:
--YY_RULE_SETUP
--#line 59 "deflex.l"
--{ return INITINSTANCE;}
-- YY_BREAK
--case 24:
--YY_RULE_SETUP
--#line 60 "deflex.l"
--{ return INITGLOBAL;}
-- YY_BREAK
--case 25:
--YY_RULE_SETUP
--#line 61 "deflex.l"
--{ return TERMINSTANCE;}
-- YY_BREAK
--case 26:
--YY_RULE_SETUP
--#line 62 "deflex.l"
--{ return TERMGLOBAL;}
-- YY_BREAK
--case 27:
--YY_RULE_SETUP
--#line 64 "deflex.l"
--{ yylval.number = strtol (yytext,0,0);
-- return NUMBER; }
-- YY_BREAK
--case 28:
--YY_RULE_SETUP
--#line 67 "deflex.l"
--{
-- yylval.id = xstrdup (yytext);
-- return ID;
-- }
-- YY_BREAK
--case 29:
--/* rule 29 can match eol */
--YY_RULE_SETUP
--#line 72 "deflex.l"
--{
-- yylval.id = xstrdup (yytext+1);
-- yylval.id[yyleng-2] = 0;
-- return ID;
-- }
-- YY_BREAK
--case 30:
--/* rule 30 can match eol */
--YY_RULE_SETUP
--#line 78 "deflex.l"
--{
-- yylval.id = xstrdup (yytext+1);
-- yylval.id[yyleng-2] = 0;
-- return ID;
-- }
-- YY_BREAK
--case 31:
--YY_RULE_SETUP
--#line 83 "deflex.l"
--{ }
-- YY_BREAK
--case 32:
--YY_RULE_SETUP
--#line 84 "deflex.l"
--{ }
-- YY_BREAK
--case 33:
--YY_RULE_SETUP
--#line 85 "deflex.l"
--{ }
-- YY_BREAK
--case 34:
--YY_RULE_SETUP
--#line 86 "deflex.l"
--{ }
-- YY_BREAK
--case 35:
--YY_RULE_SETUP
--#line 87 "deflex.l"
--{ }
-- YY_BREAK
--case 36:
--/* rule 36 can match eol */
--YY_RULE_SETUP
--#line 88 "deflex.l"
--{ linenumber ++ ;}
-- YY_BREAK
--case 37:
--YY_RULE_SETUP
--#line 89 "deflex.l"
--{ return EQUAL;}
-- YY_BREAK
--case 38:
--YY_RULE_SETUP
--#line 90 "deflex.l"
--{ return '=';}
-- YY_BREAK
--case 39:
--YY_RULE_SETUP
--#line 91 "deflex.l"
--{ return '.';}
-- YY_BREAK
--case 40:
--YY_RULE_SETUP
--#line 92 "deflex.l"
--{ return '@';}
-- YY_BREAK
--case 41:
--YY_RULE_SETUP
--#line 93 "deflex.l"
--{ return ',';}
-- YY_BREAK
--case 42:
--YY_RULE_SETUP
--#line 94 "deflex.l"
--ECHO;
-- YY_BREAK
--#line 1102 "deflex.c"
--case YY_STATE_EOF(INITIAL):
-- yyterminate();
--
-- case YY_END_OF_BUFFER:
-- {
-- /* Amount of text matched not including the EOB char. */
-- int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1;
--
-- /* Undo the effects of YY_DO_BEFORE_ACTION. */
-- *yy_cp = (yy_hold_char);
-- YY_RESTORE_YY_MORE_OFFSET
--
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW )
-- {
-- /* We're scanning a new file or input source. It's
-- * possible that this happened because the user
-- * just pointed yyin at a new source and called
-- * yylex(). If so, then we have to assure
-- * consistency between YY_CURRENT_BUFFER and our
-- * globals. Here is the right place to do so, because
-- * this is the first action (other than possibly a
-- * back-up) that will match for the new input source.
-- */
-- (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
-- YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin;
-- YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL;
-- }
--
-- /* Note that here we test for yy_c_buf_p "<=" to the position
-- * of the first EOB in the buffer, since yy_c_buf_p will
-- * already have been incremented past the NUL character
-- * (since all states make transitions on EOB to the
-- * end-of-buffer state). Contrast this with the test
-- * in input().
-- */
-- if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
-- { /* This was really a NUL. */
-- yy_state_type yy_next_state;
--
-- (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text;
--
-- yy_current_state = yy_get_previous_state( );
--
-- /* Okay, we're now positioned to make the NUL
-- * transition. We couldn't have
-- * yy_get_previous_state() go ahead and do it
-- * for us because it doesn't know how to deal
-- * with the possibility of jamming (and we don't
-- * want to build jamming into it because then it
-- * will run more slowly).
-- */
--
-- yy_next_state = yy_try_NUL_trans( yy_current_state );
--
-- yy_bp = (yytext_ptr) + YY_MORE_ADJ;
--
-- if ( yy_next_state )
-- {
-- /* Consume the NUL. */
-- yy_cp = ++(yy_c_buf_p);
-- yy_current_state = yy_next_state;
-- goto yy_match;
-- }
--
-- else
-- {
-- yy_cp = (yy_c_buf_p);
-- goto yy_find_action;
-- }
-- }
--
-- else switch ( yy_get_next_buffer( ) )
-- {
-- case EOB_ACT_END_OF_FILE:
-- {
-- (yy_did_buffer_switch_on_eof) = 0;
--
-- if ( yywrap( ) )
-- {
-- /* Note: because we've taken care in
-- * yy_get_next_buffer() to have set up
-- * yytext, we can now set up
-- * yy_c_buf_p so that if some total
-- * hoser (like flex itself) wants to
-- * call the scanner after we return the
-- * YY_NULL, it'll still work - another
-- * YY_NULL will get returned.
-- */
-- (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ;
--
-- yy_act = YY_STATE_EOF(YY_START);
-- goto do_action;
-- }
--
-- else
-- {
-- if ( ! (yy_did_buffer_switch_on_eof) )
-- YY_NEW_FILE;
-- }
-- break;
-- }
--
-- case EOB_ACT_CONTINUE_SCAN:
-- (yy_c_buf_p) =
-- (yytext_ptr) + yy_amount_of_matched_text;
--
-- yy_current_state = yy_get_previous_state( );
--
-- yy_cp = (yy_c_buf_p);
-- yy_bp = (yytext_ptr) + YY_MORE_ADJ;
-- goto yy_match;
--
-- case EOB_ACT_LAST_MATCH:
-- (yy_c_buf_p) =
-- &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)];
--
-- yy_current_state = yy_get_previous_state( );
--
-- yy_cp = (yy_c_buf_p);
-- yy_bp = (yytext_ptr) + YY_MORE_ADJ;
-- goto yy_find_action;
-- }
-- break;
-- }
--
-- default:
-- YY_FATAL_ERROR(
-- "fatal flex scanner internal error--no action found" );
-- } /* end of action switch */
-- } /* end of scanning one token */
--} /* end of yylex */
--
--/* yy_get_next_buffer - try to read in a new buffer
-- *
-- * Returns a code representing an action:
-- * EOB_ACT_LAST_MATCH -
-- * EOB_ACT_CONTINUE_SCAN - continue scanning from current position
-- * EOB_ACT_END_OF_FILE - end of file
-- */
--static int yy_get_next_buffer (void)
--{
-- register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf;
-- register char *source = (yytext_ptr);
-- register int number_to_move, i;
-- int ret_val;
--
-- if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] )
-- YY_FATAL_ERROR(
-- "fatal flex scanner internal error--end of buffer missed" );
--
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 )
-- { /* Don't try to fill the buffer, so this is an EOF. */
-- if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 )
-- {
-- /* We matched a single character, the EOB, so
-- * treat this as a final EOF.
-- */
-- return EOB_ACT_END_OF_FILE;
-- }
--
-- else
-- {
-- /* We matched some text prior to the EOB, first
-- * process it.
-- */
-- return EOB_ACT_LAST_MATCH;
-- }
-- }
--
-- /* Try to read more data. */
--
-- /* First move last chars to start of buffer. */
-- number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1;
--
-- for ( i = 0; i < number_to_move; ++i )
-- *(dest++) = *(source++);
--
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING )
-- /* don't do the read, it's not guaranteed to return an EOF,
-- * just force an EOF
-- */
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0;
--
-- else
-- {
-- yy_size_t num_to_read =
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1;
--
-- while ( num_to_read <= 0 )
-- { /* Not enough room in the buffer - grow it. */
--
-- /* just a shorter name for the current buffer */
-- YY_BUFFER_STATE b = YY_CURRENT_BUFFER;
--
-- int yy_c_buf_p_offset =
-- (int) ((yy_c_buf_p) - b->yy_ch_buf);
--
-- if ( b->yy_is_our_buffer )
-- {
-- yy_size_t new_size = b->yy_buf_size * 2;
--
-- if ( new_size <= 0 )
-- b->yy_buf_size += b->yy_buf_size / 8;
-- else
-- b->yy_buf_size *= 2;
--
-- b->yy_ch_buf = (char *)
-- /* Include room in for 2 EOB chars. */
-- yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 );
-- }
-- else
-- /* Can't grow it, we don't own it. */
-- b->yy_ch_buf = 0;
--
-- if ( ! b->yy_ch_buf )
-- YY_FATAL_ERROR(
-- "fatal error - scanner input buffer overflow" );
--
-- (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset];
--
-- num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size -
-- number_to_move - 1;
--
-- }
--
-- if ( num_to_read > YY_READ_BUF_SIZE )
-- num_to_read = YY_READ_BUF_SIZE;
--
-- /* Read in more data. */
-- YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]),
-- (yy_n_chars), num_to_read );
--
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
-- }
--
-- if ( (yy_n_chars) == 0 )
-- {
-- if ( number_to_move == YY_MORE_ADJ )
-- {
-- ret_val = EOB_ACT_END_OF_FILE;
-- yyrestart(yyin );
-- }
--
-- else
-- {
-- ret_val = EOB_ACT_LAST_MATCH;
-- YY_CURRENT_BUFFER_LVALUE->yy_buffer_status =
-- YY_BUFFER_EOF_PENDING;
-- }
-- }
--
-- else
-- ret_val = EOB_ACT_CONTINUE_SCAN;
--
-- if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) {
-- /* Extend the array by 50%, plus the number we really need. */
-- yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1);
-- YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size );
-- if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" );
-- }
--
-- (yy_n_chars) += number_to_move;
-- YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR;
-- YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR;
--
-- (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0];
--
-- return ret_val;
--}
--
--/* yy_get_previous_state - get the state just before the EOB char was reached */
--
-- static yy_state_type yy_get_previous_state (void)
--{
-- register yy_state_type yy_current_state;
-- register char *yy_cp;
--
-- yy_current_state = (yy_start);
--
-- for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
-- {
-- register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1);
-- if ( yy_accept[yy_current_state] )
-- {
-- (yy_last_accepting_state) = yy_current_state;
-- (yy_last_accepting_cpos) = yy_cp;
-- }
-- while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
-- {
-- yy_current_state = (int) yy_def[yy_current_state];
-- if ( yy_current_state >= 199 )
-- yy_c = yy_meta[(unsigned int) yy_c];
-- }
-- yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-- }
--
-- return yy_current_state;
--}
--
--/* yy_try_NUL_trans - try to make a transition on the NUL character
-- *
-- * synopsis
-- * next_state = yy_try_NUL_trans( current_state );
-- */
-- static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state )
--{
-- register int yy_is_jam;
-- register char *yy_cp = (yy_c_buf_p);
--
-- register YY_CHAR yy_c = 1;
-- if ( yy_accept[yy_current_state] )
-- {
-- (yy_last_accepting_state) = yy_current_state;
-- (yy_last_accepting_cpos) = yy_cp;
-- }
-- while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
-- {
-- yy_current_state = (int) yy_def[yy_current_state];
-- if ( yy_current_state >= 199 )
-- yy_c = yy_meta[(unsigned int) yy_c];
-- }
-- yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-- yy_is_jam = (yy_current_state == 198);
--
-- return yy_is_jam ? 0 : yy_current_state;
--}
--
-- static void yyunput (int c, register char * yy_bp )
--{
-- register char *yy_cp;
--
-- yy_cp = (yy_c_buf_p);
--
-- /* undo effects of setting up yytext */
-- *yy_cp = (yy_hold_char);
--
-- if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 )
-- { /* need to shift things up to make room */
-- /* +2 for EOB chars. */
-- register yy_size_t number_to_move = (yy_n_chars) + 2;
-- register char *dest = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_size + 2];
-- register char *source =
-- &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move];
--
-- while ( source > YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
-- *--dest = *--source;
--
-- yy_cp += (int) (dest - source);
-- yy_bp += (int) (dest - source);
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars =
-- (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_buf_size;
--
-- if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 )
-- YY_FATAL_ERROR( "flex scanner push-back overflow" );
-- }
--
-- *--yy_cp = (char) c;
--
-- (yytext_ptr) = yy_bp;
-- (yy_hold_char) = *yy_cp;
-- (yy_c_buf_p) = yy_cp;
--}
--
--#ifndef YY_NO_INPUT
--#ifdef __cplusplus
-- static int yyinput (void)
--#else
-- static int input (void)
--#endif
--
--{
-- int c;
--
-- *(yy_c_buf_p) = (yy_hold_char);
--
-- if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
-- {
-- /* yy_c_buf_p now points to the character we want to return.
-- * If this occurs *before* the EOB characters, then it's a
-- * valid NUL; if not, then we've hit the end of the buffer.
-- */
-- if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
-- /* This was really a NUL. */
-- *(yy_c_buf_p) = '\0';
--
-- else
-- { /* need more input */
-- yy_size_t offset = (yy_c_buf_p) - (yytext_ptr);
-- ++(yy_c_buf_p);
--
-- switch ( yy_get_next_buffer( ) )
-- {
-- case EOB_ACT_LAST_MATCH:
-- /* This happens because yy_g_n_b()
-- * sees that we've accumulated a
-- * token and flags that we need to
-- * try matching the token before
-- * proceeding. But for input(),
-- * there's no matching to consider.
-- * So convert the EOB_ACT_LAST_MATCH
-- * to EOB_ACT_END_OF_FILE.
-- */
--
-- /* Reset buffer status. */
-- yyrestart(yyin );
--
-- /*FALLTHROUGH*/
--
-- case EOB_ACT_END_OF_FILE:
-- {
-- if ( yywrap( ) )
-- return 0;
--
-- if ( ! (yy_did_buffer_switch_on_eof) )
-- YY_NEW_FILE;
--#ifdef __cplusplus
-- return yyinput();
--#else
-- return input();
--#endif
-- }
--
-- case EOB_ACT_CONTINUE_SCAN:
-- (yy_c_buf_p) = (yytext_ptr) + offset;
-- break;
-- }
-- }
-- }
--
-- c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */
-- *(yy_c_buf_p) = '\0'; /* preserve yytext */
-- (yy_hold_char) = *++(yy_c_buf_p);
--
-- return c;
--}
--#endif /* ifndef YY_NO_INPUT */
--
--/** Immediately switch to a different input stream.
-- * @param input_file A readable stream.
-- *
-- * @note This function does not reset the start condition to @c INITIAL .
-- */
-- void yyrestart (FILE * input_file )
--{
--
-- if ( ! YY_CURRENT_BUFFER ){
-- yyensure_buffer_stack ();
-- YY_CURRENT_BUFFER_LVALUE =
-- yy_create_buffer(yyin,YY_BUF_SIZE );
-- }
--
-- yy_init_buffer(YY_CURRENT_BUFFER,input_file );
-- yy_load_buffer_state( );
--}
--
--/** Switch to a different input buffer.
-- * @param new_buffer The new input buffer.
-- *
-- */
-- void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer )
--{
--
-- /* TODO. We should be able to replace this entire function body
-- * with
-- * yypop_buffer_state();
-- * yypush_buffer_state(new_buffer);
-- */
-- yyensure_buffer_stack ();
-- if ( YY_CURRENT_BUFFER == new_buffer )
-- return;
--
-- if ( YY_CURRENT_BUFFER )
-- {
-- /* Flush out information for old buffer. */
-- *(yy_c_buf_p) = (yy_hold_char);
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
-- }
--
-- YY_CURRENT_BUFFER_LVALUE = new_buffer;
-- yy_load_buffer_state( );
--
-- /* We don't actually know whether we did this switch during
-- * EOF (yywrap()) processing, but the only time this flag
-- * is looked at is after yywrap() is called, so it's safe
-- * to go ahead and always set it.
-- */
-- (yy_did_buffer_switch_on_eof) = 1;
--}
--
--static void yy_load_buffer_state (void)
--{
-- (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
-- (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos;
-- yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file;
-- (yy_hold_char) = *(yy_c_buf_p);
--}
--
--/** Allocate and initialize an input buffer state.
-- * @param file A readable stream.
-- * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
-- *
-- * @return the allocated buffer state.
-- */
-- YY_BUFFER_STATE yy_create_buffer (FILE * file, int size )
--{
-- YY_BUFFER_STATE b;
--
-- b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) );
-- if ( ! b )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
--
-- b->yy_buf_size = size;
--
-- /* yy_ch_buf has to be 2 characters longer than the size given because
-- * we need to put in 2 end-of-buffer characters.
-- */
-- b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2 );
-- if ( ! b->yy_ch_buf )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
--
-- b->yy_is_our_buffer = 1;
--
-- yy_init_buffer(b,file );
--
-- return b;
--}
--
--/** Destroy the buffer.
-- * @param b a buffer created with yy_create_buffer()
-- *
-- */
-- void yy_delete_buffer (YY_BUFFER_STATE b )
--{
--
-- if ( ! b )
-- return;
--
-- if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */
-- YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0;
--
-- if ( b->yy_is_our_buffer )
-- yyfree((void *) b->yy_ch_buf );
--
-- yyfree((void *) b );
--}
--
--#ifndef __cplusplus
--extern int isatty (int );
--#endif /* __cplusplus */
--
--/* Initializes or reinitializes a buffer.
-- * This function is sometimes called more than once on the same buffer,
-- * such as during a yyrestart() or at EOF.
-- */
-- static void yy_init_buffer (YY_BUFFER_STATE b, FILE * file )
--
--{
-- int oerrno = errno;
--
-- yy_flush_buffer(b );
--
-- b->yy_input_file = file;
-- b->yy_fill_buffer = 1;
--
-- /* If b is the current buffer, then yy_init_buffer was _probably_
-- * called from yyrestart() or through yy_get_next_buffer.
-- * In that case, we don't want to reset the lineno or column.
-- */
-- if (b != YY_CURRENT_BUFFER){
-- b->yy_bs_lineno = 1;
-- b->yy_bs_column = 0;
-- }
--
-- b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0;
--
-- errno = oerrno;
--}
--
--/** Discard all buffered characters. On the next scan, YY_INPUT will be called.
-- * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
-- *
-- */
-- void yy_flush_buffer (YY_BUFFER_STATE b )
--{
-- if ( ! b )
-- return;
--
-- b->yy_n_chars = 0;
--
-- /* We always need two end-of-buffer characters. The first causes
-- * a transition to the end-of-buffer state. The second causes
-- * a jam in that state.
-- */
-- b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR;
-- b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR;
--
-- b->yy_buf_pos = &b->yy_ch_buf[0];
--
-- b->yy_at_bol = 1;
-- b->yy_buffer_status = YY_BUFFER_NEW;
--
-- if ( b == YY_CURRENT_BUFFER )
-- yy_load_buffer_state( );
--}
--
--/** Pushes the new state onto the stack. The new state becomes
-- * the current state. This function will allocate the stack
-- * if necessary.
-- * @param new_buffer The new state.
-- *
-- */
--void yypush_buffer_state (YY_BUFFER_STATE new_buffer )
--{
-- if (new_buffer == NULL)
-- return;
--
-- yyensure_buffer_stack();
--
-- /* This block is copied from yy_switch_to_buffer. */
-- if ( YY_CURRENT_BUFFER )
-- {
-- /* Flush out information for old buffer. */
-- *(yy_c_buf_p) = (yy_hold_char);
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
-- }
--
-- /* Only push if top exists. Otherwise, replace top. */
-- if (YY_CURRENT_BUFFER)
-- (yy_buffer_stack_top)++;
-- YY_CURRENT_BUFFER_LVALUE = new_buffer;
--
-- /* copied from yy_switch_to_buffer. */
-- yy_load_buffer_state( );
-- (yy_did_buffer_switch_on_eof) = 1;
--}
--
--/** Removes and deletes the top of the stack, if present.
-- * The next element becomes the new top.
-- *
-- */
--void yypop_buffer_state (void)
--{
-- if (!YY_CURRENT_BUFFER)
-- return;
--
-- yy_delete_buffer(YY_CURRENT_BUFFER );
-- YY_CURRENT_BUFFER_LVALUE = NULL;
-- if ((yy_buffer_stack_top) > 0)
-- --(yy_buffer_stack_top);
--
-- if (YY_CURRENT_BUFFER) {
-- yy_load_buffer_state( );
-- (yy_did_buffer_switch_on_eof) = 1;
-- }
--}
--
--/* Allocates the stack if it does not exist.
-- * Guarantees space for at least one push.
-- */
--static void yyensure_buffer_stack (void)
--{
-- yy_size_t num_to_alloc;
--
-- if (!(yy_buffer_stack)) {
--
-- /* First allocation is just for 2 elements, since we don't know if this
-- * scanner will even need a stack. We use 2 instead of 1 to avoid an
-- * immediate realloc on the next call.
-- */
-- num_to_alloc = 1;
-- (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc
-- (num_to_alloc * sizeof(struct yy_buffer_state*)
-- );
-- if ( ! (yy_buffer_stack) )
-- YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
--
-- memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
--
-- (yy_buffer_stack_max) = num_to_alloc;
-- (yy_buffer_stack_top) = 0;
-- return;
-- }
--
-- if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){
--
-- /* Increase the buffer to prepare for a possible push. */
-- int grow_size = 8 /* arbitrary grow size */;
--
-- num_to_alloc = (yy_buffer_stack_max) + grow_size;
-- (yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc
-- ((yy_buffer_stack),
-- num_to_alloc * sizeof(struct yy_buffer_state*)
-- );
-- if ( ! (yy_buffer_stack) )
-- YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
--
-- /* zero only the new slots.*/
-- memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*));
-- (yy_buffer_stack_max) = num_to_alloc;
-- }
--}
--
--/** Setup the input buffer state to scan directly from a user-specified character buffer.
-- * @param base the character buffer
-- * @param size the size in bytes of the character buffer
-- *
-- * @return the newly allocated buffer state object.
-- */
--YY_BUFFER_STATE yy_scan_buffer (char * base, yy_size_t size )
--{
-- YY_BUFFER_STATE b;
--
-- if ( size < 2 ||
-- base[size-2] != YY_END_OF_BUFFER_CHAR ||
-- base[size-1] != YY_END_OF_BUFFER_CHAR )
-- /* They forgot to leave room for the EOB's. */
-- return 0;
--
-- b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) );
-- if ( ! b )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" );
--
-- b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */
-- b->yy_buf_pos = b->yy_ch_buf = base;
-- b->yy_is_our_buffer = 0;
-- b->yy_input_file = 0;
-- b->yy_n_chars = b->yy_buf_size;
-- b->yy_is_interactive = 0;
-- b->yy_at_bol = 1;
-- b->yy_fill_buffer = 0;
-- b->yy_buffer_status = YY_BUFFER_NEW;
--
-- yy_switch_to_buffer(b );
--
-- return b;
--}
--
--/** Setup the input buffer state to scan a string. The next call to yylex() will
-- * scan from a @e copy of @a str.
-- * @param yystr a NUL-terminated string to scan
-- *
-- * @return the newly allocated buffer state object.
-- * @note If you want to scan bytes that may contain NUL values, then use
-- * yy_scan_bytes() instead.
-- */
--YY_BUFFER_STATE yy_scan_string (yyconst char * yystr )
--{
--
-- return yy_scan_bytes(yystr,strlen(yystr) );
--}
--
--/** Setup the input buffer state to scan the given bytes. The next call to yylex() will
-- * scan from a @e copy of @a bytes.
-- * @param bytes the byte buffer to scan
-- * @param len the number of bytes in the buffer pointed to by @a bytes.
-- *
-- * @return the newly allocated buffer state object.
-- */
--YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, yy_size_t _yybytes_len )
--{
-- YY_BUFFER_STATE b;
-- char *buf;
-- yy_size_t n, i;
--
-- /* Get memory for full buffer, including space for trailing EOB's. */
-- n = _yybytes_len + 2;
-- buf = (char *) yyalloc(n );
-- if ( ! buf )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" );
--
-- for ( i = 0; i < _yybytes_len; ++i )
-- buf[i] = yybytes[i];
--
-- buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR;
--
-- b = yy_scan_buffer(buf,n );
-- if ( ! b )
-- YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" );
--
-- /* It's okay to grow etc. this buffer, and we should throw it
-- * away when we're done.
-- */
-- b->yy_is_our_buffer = 1;
--
-- return b;
--}
--
--#ifndef YY_EXIT_FAILURE
--#define YY_EXIT_FAILURE 2
--#endif
--
--static void yy_fatal_error (yyconst char* msg )
--{
-- (void) fprintf( stderr, "%s\n", msg );
-- exit( YY_EXIT_FAILURE );
--}
--
--/* Redefine yyless() so it works in section 3 code. */
--
--#undef yyless
--#define yyless(n) \
-- do \
-- { \
-- /* Undo effects of setting up yytext. */ \
-- int yyless_macro_arg = (n); \
-- YY_LESS_LINENO(yyless_macro_arg);\
-- yytext[yyleng] = (yy_hold_char); \
-- (yy_c_buf_p) = yytext + yyless_macro_arg; \
-- (yy_hold_char) = *(yy_c_buf_p); \
-- *(yy_c_buf_p) = '\0'; \
-- yyleng = yyless_macro_arg; \
-- } \
-- while ( 0 )
--
--/* Accessor methods (get/set functions) to struct members. */
--
--/** Get the current line number.
-- *
-- */
--int yyget_lineno (void)
--{
--
-- return yylineno;
--}
--
--/** Get the input stream.
-- *
-- */
--FILE *yyget_in (void)
--{
-- return yyin;
--}
--
--/** Get the output stream.
-- *
-- */
--FILE *yyget_out (void)
--{
-- return yyout;
--}
--
--/** Get the length of the current token.
-- *
-- */
--yy_size_t yyget_leng (void)
--{
-- return yyleng;
--}
--
--/** Get the current token.
-- *
-- */
--
--char *yyget_text (void)
--{
-- return yytext;
--}
--
--/** Set the current line number.
-- * @param line_number
-- *
-- */
--void yyset_lineno (int line_number )
--{
--
-- yylineno = line_number;
--}
--
--/** Set the input stream. This does not discard the current
-- * input buffer.
-- * @param in_str A readable stream.
-- *
-- * @see yy_switch_to_buffer
-- */
--void yyset_in (FILE * in_str )
--{
-- yyin = in_str ;
--}
--
--void yyset_out (FILE * out_str )
--{
-- yyout = out_str ;
--}
--
--int yyget_debug (void)
--{
-- return yy_flex_debug;
--}
--
--void yyset_debug (int bdebug )
--{
-- yy_flex_debug = bdebug ;
--}
--
--static int yy_init_globals (void)
--{
-- /* Initialization is the same as for the non-reentrant scanner.
-- * This function is called from yylex_destroy(), so don't allocate here.
-- */
--
-- (yy_buffer_stack) = 0;
-- (yy_buffer_stack_top) = 0;
-- (yy_buffer_stack_max) = 0;
-- (yy_c_buf_p) = (char *) 0;
-- (yy_init) = 0;
-- (yy_start) = 0;
--
--/* Defined in main.c */
--#ifdef YY_STDINIT
-- yyin = stdin;
-- yyout = stdout;
--#else
-- yyin = (FILE *) 0;
-- yyout = (FILE *) 0;
--#endif
--
-- /* For future reference: Set errno on error, since we are called by
-- * yylex_init()
-- */
-- return 0;
--}
--
--/* yylex_destroy is for both reentrant and non-reentrant scanners. */
--int yylex_destroy (void)
--{
--
-- /* Pop the buffer stack, destroying each element. */
-- while(YY_CURRENT_BUFFER){
-- yy_delete_buffer(YY_CURRENT_BUFFER );
-- YY_CURRENT_BUFFER_LVALUE = NULL;
-- yypop_buffer_state();
-- }
--
-- /* Destroy the stack itself. */
-- yyfree((yy_buffer_stack) );
-- (yy_buffer_stack) = NULL;
--
-- /* Reset the globals. This is important in a non-reentrant scanner so the next time
-- * yylex() is called, initialization will occur. */
-- yy_init_globals( );
--
-- return 0;
--}
--
--/*
-- * Internal utility routines.
-- */
--
--#ifndef yytext_ptr
--static void yy_flex_strncpy (char* s1, yyconst char * s2, int n )
--{
-- register int i;
-- for ( i = 0; i < n; ++i )
-- s1[i] = s2[i];
--}
--#endif
--
--#ifdef YY_NEED_STRLEN
--static int yy_flex_strlen (yyconst char * s )
--{
-- register int n;
-- for ( n = 0; s[n]; ++n )
-- ;
--
-- return n;
--}
--#endif
--
--void *yyalloc (yy_size_t size )
--{
-- return (void *) malloc( size );
--}
--
--void *yyrealloc (void * ptr, yy_size_t size )
--{
-- /* The cast to (char *) in the following accommodates both
-- * implementations that use char* generic pointers, and those
-- * that use void* generic pointers. It works with the latter
-- * because both ANSI C and C++ allow castless assignment from
-- * any pointer type to void*, and deal with argument conversions
-- * as though doing an assignment.
-- */
-- return (void *) realloc( (char *) ptr, size );
--}
--
--void yyfree (void * ptr )
--{
-- free( (char *) ptr ); /* see yyrealloc() for (char *) cast */
--}
--
--#define YYTABLES_NAME "yytables"
--
--#line 94 "deflex.l"
--
--
--#ifndef yywrap
--/* Needed for lex, though not flex. */
--int yywrap(void) { return 1; }
--#endif
--
-diff -Nur binutils-2.24.orig/binutils/defparse.c binutils-2.24/binutils/defparse.c
---- binutils-2.24.orig/binutils/defparse.c 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/defparse.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,2142 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton implementation for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* C LALR(1) parser skeleton written by Richard Stallman, by
-- simplifying the original so-called "semantic" parser. */
--
--/* All symbols defined below should begin with yy or YY, to avoid
-- infringing on user name space. This should be done even for local
-- variables, as they might otherwise be expanded by user macros.
-- There are some unavoidable exceptions within include files to
-- define necessary library symbols; they are noted "INFRINGES ON
-- USER NAME SPACE" below. */
--
--/* Identify Bison output. */
--#define YYBISON 1
--
--/* Bison version. */
--#define YYBISON_VERSION "2.3"
--
--/* Skeleton name. */
--#define YYSKELETON_NAME "yacc.c"
--
--/* Pure parsers. */
--#define YYPURE 0
--
--/* Using locations. */
--#define YYLSP_NEEDED 0
--
--
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- NAME = 258,
-- LIBRARY = 259,
-- DESCRIPTION = 260,
-- STACKSIZE = 261,
-- HEAPSIZE = 262,
-- CODE = 263,
-- DATA = 264,
-- SECTIONS = 265,
-- EXPORTS = 266,
-- IMPORTS = 267,
-- VERSIONK = 268,
-- BASE = 269,
-- CONSTANT = 270,
-- READ = 271,
-- WRITE = 272,
-- EXECUTE = 273,
-- SHARED = 274,
-- NONSHARED = 275,
-- NONAME = 276,
-- PRIVATE = 277,
-- SINGLE = 278,
-- MULTIPLE = 279,
-- INITINSTANCE = 280,
-- INITGLOBAL = 281,
-- TERMINSTANCE = 282,
-- TERMGLOBAL = 283,
-- EQUAL = 284,
-- ID = 285,
-- NUMBER = 286
-- };
--#endif
--/* Tokens. */
--#define NAME 258
--#define LIBRARY 259
--#define DESCRIPTION 260
--#define STACKSIZE 261
--#define HEAPSIZE 262
--#define CODE 263
--#define DATA 264
--#define SECTIONS 265
--#define EXPORTS 266
--#define IMPORTS 267
--#define VERSIONK 268
--#define BASE 269
--#define CONSTANT 270
--#define READ 271
--#define WRITE 272
--#define EXECUTE 273
--#define SHARED 274
--#define NONSHARED 275
--#define NONAME 276
--#define PRIVATE 277
--#define SINGLE 278
--#define MULTIPLE 279
--#define INITINSTANCE 280
--#define INITGLOBAL 281
--#define TERMINSTANCE 282
--#define TERMGLOBAL 283
--#define EQUAL 284
--#define ID 285
--#define NUMBER 286
--
--
--
--
--/* Copy the first part of user declarations. */
--#line 1 "defparse.y"
-- /* defparse.y - parser for .def files */
--
--/* Copyright 1995, 1997, 1998, 1999, 2001, 2004, 2005, 2007
-- Free Software Foundation, Inc.
--
-- This file is part of GNU Binutils.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-- MA 02110-1301, USA. */
--
--#include "sysdep.h"
--#include "bfd.h"
--#include "libiberty.h"
--#include "dlltool.h"
--
--
--/* Enabling traces. */
--#ifndef YYDEBUG
--# define YYDEBUG 0
--#endif
--
--/* Enabling verbose error messages. */
--#ifdef YYERROR_VERBOSE
--# undef YYERROR_VERBOSE
--# define YYERROR_VERBOSE 1
--#else
--# define YYERROR_VERBOSE 0
--#endif
--
--/* Enabling the token table. */
--#ifndef YYTOKEN_TABLE
--# define YYTOKEN_TABLE 0
--#endif
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 29 "defparse.y"
--{
-- char *id;
-- const char *id_const;
-- int number;
--}
--/* Line 193 of yacc.c. */
--#line 192 "defparse.c"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--
--
--/* Copy the second part of user declarations. */
--
--
--/* Line 216 of yacc.c. */
--#line 205 "defparse.c"
--
--#ifdef short
--# undef short
--#endif
--
--#ifdef YYTYPE_UINT8
--typedef YYTYPE_UINT8 yytype_uint8;
--#else
--typedef unsigned char yytype_uint8;
--#endif
--
--#ifdef YYTYPE_INT8
--typedef YYTYPE_INT8 yytype_int8;
--#elif (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--typedef signed char yytype_int8;
--#else
--typedef short int yytype_int8;
--#endif
--
--#ifdef YYTYPE_UINT16
--typedef YYTYPE_UINT16 yytype_uint16;
--#else
--typedef unsigned short int yytype_uint16;
--#endif
--
--#ifdef YYTYPE_INT16
--typedef YYTYPE_INT16 yytype_int16;
--#else
--typedef short int yytype_int16;
--#endif
--
--#ifndef YYSIZE_T
--# ifdef __SIZE_TYPE__
--# define YYSIZE_T __SIZE_TYPE__
--# elif defined size_t
--# define YYSIZE_T size_t
--# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stddef.h> /* INFRINGES ON USER NAME SPACE */
--# define YYSIZE_T size_t
--# else
--# define YYSIZE_T unsigned int
--# endif
--#endif
--
--#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
--
--#ifndef YY_
--# if defined YYENABLE_NLS && YYENABLE_NLS
--# if ENABLE_NLS
--# include <libintl.h> /* INFRINGES ON USER NAME SPACE */
--# define YY_(msgid) dgettext ("bison-runtime", msgid)
--# endif
--# endif
--# ifndef YY_
--# define YY_(msgid) msgid
--# endif
--#endif
--
--/* Suppress unused-variable warnings by "using" E. */
--#if ! defined lint || defined __GNUC__
--# define YYUSE(e) ((void) (e))
--#else
--# define YYUSE(e) /* empty */
--#endif
--
--/* Identity function, used to suppress warnings about constant conditions. */
--#ifndef lint
--# define YYID(n) (n)
--#else
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static int
--YYID (int i)
--#else
--static int
--YYID (i)
-- int i;
--#endif
--{
-- return i;
--}
--#endif
--
--#if ! defined yyoverflow || YYERROR_VERBOSE
--
--/* The parser invokes alloca or malloc; define the necessary symbols. */
--
--# ifdef YYSTACK_USE_ALLOCA
--# if YYSTACK_USE_ALLOCA
--# ifdef __GNUC__
--# define YYSTACK_ALLOC __builtin_alloca
--# elif defined __BUILTIN_VA_ARG_INCR
--# include <alloca.h> /* INFRINGES ON USER NAME SPACE */
--# elif defined _AIX
--# define YYSTACK_ALLOC __alloca
--# elif defined _MSC_VER
--# include <malloc.h> /* INFRINGES ON USER NAME SPACE */
--# define alloca _alloca
--# else
--# define YYSTACK_ALLOC alloca
--# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# endif
--# endif
--# endif
--
--# ifdef YYSTACK_ALLOC
-- /* Pacify GCC's `empty if-body' warning. */
--# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0))
--# ifndef YYSTACK_ALLOC_MAXIMUM
-- /* The OS might guarantee only one guard page at the bottom of the stack,
-- and a page size can be as small as 4096 bytes. So we cannot safely
-- invoke alloca (N) if N exceeds 4096. Use a slightly smaller number
-- to allow for a few compiler-allocated temporary stack slots. */
--# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
--# endif
--# else
--# define YYSTACK_ALLOC YYMALLOC
--# define YYSTACK_FREE YYFREE
--# ifndef YYSTACK_ALLOC_MAXIMUM
--# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
--# endif
--# if (defined __cplusplus && ! defined _STDLIB_H \
-- && ! ((defined YYMALLOC || defined malloc) \
-- && (defined YYFREE || defined free)))
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# ifndef YYMALLOC
--# define YYMALLOC malloc
--# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# ifndef YYFREE
--# define YYFREE free
--# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void free (void *); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# endif
--#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
--
--
--#if (! defined yyoverflow \
-- && (! defined __cplusplus \
-- || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
--
--/* A type that is properly aligned for any stack member. */
--union yyalloc
--{
-- yytype_int16 yyss;
-- YYSTYPE yyvs;
-- };
--
--/* The size of the maximum gap between one aligned stack and the next. */
--# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
--
--/* The size of an array large to enough to hold all stacks, each with
-- N elements. */
--# define YYSTACK_BYTES(N) \
-- ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \
-- + YYSTACK_GAP_MAXIMUM)
--
--/* Copy COUNT objects from FROM to TO. The source and destination do
-- not overlap. */
--# ifndef YYCOPY
--# if defined __GNUC__ && 1 < __GNUC__
--# define YYCOPY(To, From, Count) \
-- __builtin_memcpy (To, From, (Count) * sizeof (*(From)))
--# else
--# define YYCOPY(To, From, Count) \
-- do \
-- { \
-- YYSIZE_T yyi; \
-- for (yyi = 0; yyi < (Count); yyi++) \
-- (To)[yyi] = (From)[yyi]; \
-- } \
-- while (YYID (0))
--# endif
--# endif
--
--/* Relocate STACK from its old location to the new one. The
-- local variables YYSIZE and YYSTACKSIZE give the old and new number of
-- elements in the stack, and YYPTR gives the new location of the
-- stack. Advance YYPTR to a properly aligned location for the next
-- stack. */
--# define YYSTACK_RELOCATE(Stack) \
-- do \
-- { \
-- YYSIZE_T yynewbytes; \
-- YYCOPY (&yyptr->Stack, Stack, yysize); \
-- Stack = &yyptr->Stack; \
-- yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
-- yyptr += yynewbytes / sizeof (*yyptr); \
-- } \
-- while (YYID (0))
--
--#endif
--
--/* YYFINAL -- State number of the termination state. */
--#define YYFINAL 66
--/* YYLAST -- Last index in YYTABLE. */
--#define YYLAST 141
--
--/* YYNTOKENS -- Number of terminals. */
--#define YYNTOKENS 36
--/* YYNNTS -- Number of nonterminals. */
--#define YYNNTS 26
--/* YYNRULES -- Number of rules. */
--#define YYNRULES 98
--/* YYNRULES -- Number of states. */
--#define YYNSTATES 139
--
--/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */
--#define YYUNDEFTOK 2
--#define YYMAXUTOK 286
--
--#define YYTRANSLATE(YYX) \
-- ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
--
--/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */
--static const yytype_uint8 yytranslate[] =
--{
-- 0, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 34, 2, 32, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 33, 2, 2, 35, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 1, 2, 3, 4,
-- 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
-- 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30, 31
--};
--
--#if YYDEBUG
--/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
-- YYRHS. */
--static const yytype_uint16 yyprhs[] =
--{
-- 0, 0, 3, 6, 8, 12, 17, 20, 23, 27,
-- 31, 34, 37, 40, 43, 46, 51, 52, 55, 64,
-- 67, 69, 78, 87, 94, 101, 108, 115, 120, 125,
-- 128, 130, 133, 137, 139, 141, 142, 145, 146, 148,
-- 150, 152, 154, 156, 158, 160, 162, 163, 165, 166,
-- 168, 169, 171, 172, 174, 176, 178, 180, 182, 184,
-- 186, 188, 190, 192, 194, 196, 198, 200, 202, 204,
-- 206, 208, 210, 212, 214, 216, 218, 220, 222, 224,
-- 227, 230, 234, 238, 240, 241, 244, 245, 248, 249,
-- 252, 253, 257, 258, 259, 263, 265, 267, 269
--};
--
--/* YYRHS -- A `-1'-separated list of the rules' RHS. */
--static const yytype_int8 yyrhs[] =
--{
-- 37, 0, -1, 37, 38, -1, 38, -1, 3, 55,
-- 59, -1, 4, 55, 59, 60, -1, 11, 39, -1,
-- 5, 30, -1, 6, 31, 47, -1, 7, 31, 47,
-- -1, 8, 45, -1, 9, 45, -1, 10, 43, -1,
-- 12, 41, -1, 13, 31, -1, 13, 31, 32, 31,
-- -1, -1, 39, 40, -1, 30, 58, 56, 50, 49,
-- 51, 52, 57, -1, 41, 42, -1, 42, -1, 30,
-- 33, 30, 32, 30, 32, 30, 57, -1, 30, 33,
-- 30, 32, 30, 32, 31, 57, -1, 30, 33, 30,
-- 32, 30, 57, -1, 30, 33, 30, 32, 31, 57,
-- -1, 30, 32, 30, 32, 30, 57, -1, 30, 32,
-- 30, 32, 31, 57, -1, 30, 32, 30, 57, -1,
-- 30, 32, 31, 57, -1, 43, 44, -1, 44, -1,
-- 30, 45, -1, 45, 46, 48, -1, 48, -1, 34,
-- -1, -1, 34, 31, -1, -1, 16, -1, 17, -1,
-- 18, -1, 19, -1, 20, -1, 23, -1, 24, -1,
-- 15, -1, -1, 21, -1, -1, 9, -1, -1, 22,
-- -1, -1, 3, -1, 5, -1, 6, -1, 7, -1,
-- 8, -1, 9, -1, 10, -1, 11, -1, 12, -1,
-- 13, -1, 14, -1, 15, -1, 21, -1, 22, -1,
-- 16, -1, 17, -1, 18, -1, 19, -1, 20, -1,
-- 23, -1, 24, -1, 25, -1, 26, -1, 27, -1,
-- 28, -1, 30, -1, 32, 53, -1, 32, 54, -1,
-- 53, 32, 54, -1, 30, 32, 54, -1, 54, -1,
-- -1, 35, 31, -1, -1, 29, 54, -1, -1, 33,
-- 54, -1, -1, 14, 33, 31, -1, -1, -1, 60,
-- 46, 61, -1, 25, -1, 26, -1, 27, -1, 28,
-- -1
--};
--
--/* YYRLINE[YYN] -- source line where rule number YYN was defined. */
--static const yytype_uint8 yyrline[] =
--{
-- 0, 49, 49, 50, 54, 55, 56, 57, 58, 59,
-- 60, 61, 62, 63, 64, 65, 69, 71, 75, 80,
-- 81, 85, 87, 89, 91, 93, 95, 97, 99, 104,
-- 105, 109, 113, 114, 118, 119, 121, 122, 126, 127,
-- 128, 129, 130, 131, 132, 136, 137, 141, 142, 146,
-- 147, 151, 152, 155, 160, 161, 162, 163, 164, 165,
-- 166, 167, 168, 169, 170, 171, 172, 173, 174, 175,
-- 176, 177, 178, 179, 180, 181, 182, 183, 186, 187,
-- 193, 199, 205, 212, 213, 217, 218, 222, 223, 227,
-- 228, 231, 232, 235, 237, 241, 242, 243, 244
--};
--#endif
--
--#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE
--/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
-- First, the terminals, then, starting at YYNTOKENS, nonterminals. */
--static const char *const yytname[] =
--{
-- "$end", "error", "$undefined", "NAME", "LIBRARY", "DESCRIPTION",
-- "STACKSIZE", "HEAPSIZE", "CODE", "DATA", "SECTIONS", "EXPORTS",
-- "IMPORTS", "VERSIONK", "BASE", "CONSTANT", "READ", "WRITE", "EXECUTE",
-- "SHARED", "NONSHARED", "NONAME", "PRIVATE", "SINGLE", "MULTIPLE",
-- "INITINSTANCE", "INITGLOBAL", "TERMINSTANCE", "TERMGLOBAL", "EQUAL",
-- "ID", "NUMBER", "'.'", "'='", "','", "'@'", "$accept", "start",
-- "command", "explist", "expline", "implist", "impline", "seclist",
-- "secline", "attr_list", "opt_comma", "opt_number", "attr",
-- "opt_CONSTANT", "opt_NONAME", "opt_DATA", "opt_PRIVATE",
-- "keyword_as_name", "opt_name2", "opt_name", "opt_ordinal",
-- "opt_import_name", "opt_equal_name", "opt_base", "option_list", "option", 0
--};
--#endif
--
--# ifdef YYPRINT
--/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to
-- token YYLEX-NUM. */
--static const yytype_uint16 yytoknum[] =
--{
-- 0, 256, 257, 258, 259, 260, 261, 262, 263, 264,
-- 265, 266, 267, 268, 269, 270, 271, 272, 273, 274,
-- 275, 276, 277, 278, 279, 280, 281, 282, 283, 284,
-- 285, 286, 46, 61, 44, 64
--};
--# endif
--
--/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */
--static const yytype_uint8 yyr1[] =
--{
-- 0, 36, 37, 37, 38, 38, 38, 38, 38, 38,
-- 38, 38, 38, 38, 38, 38, 39, 39, 40, 41,
-- 41, 42, 42, 42, 42, 42, 42, 42, 42, 43,
-- 43, 44, 45, 45, 46, 46, 47, 47, 48, 48,
-- 48, 48, 48, 48, 48, 49, 49, 50, 50, 51,
-- 51, 52, 52, 53, 53, 53, 53, 53, 53, 53,
-- 53, 53, 53, 53, 53, 53, 53, 53, 53, 53,
-- 53, 53, 53, 53, 53, 53, 53, 53, 54, 54,
-- 54, 54, 54, 55, 55, 56, 56, 57, 57, 58,
-- 58, 59, 59, 60, 60, 61, 61, 61, 61
--};
--
--/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */
--static const yytype_uint8 yyr2[] =
--{
-- 0, 2, 2, 1, 3, 4, 2, 2, 3, 3,
-- 2, 2, 2, 2, 2, 4, 0, 2, 8, 2,
-- 1, 8, 8, 6, 6, 6, 6, 4, 4, 2,
-- 1, 2, 3, 1, 1, 0, 2, 0, 1, 1,
-- 1, 1, 1, 1, 1, 1, 0, 1, 0, 1,
-- 0, 1, 0, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 2,
-- 2, 3, 3, 1, 0, 2, 0, 2, 0, 2,
-- 0, 3, 0, 0, 3, 1, 1, 1, 1
--};
--
--/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
-- STATE-NUM when YYTABLE doesn't specify something else to do. Zero
-- means the default is an error. */
--static const yytype_uint8 yydefact[] =
--{
-- 0, 84, 84, 0, 0, 0, 0, 0, 0, 16,
-- 0, 0, 0, 3, 53, 54, 55, 56, 57, 58,
-- 59, 60, 61, 62, 63, 64, 67, 68, 69, 70,
-- 71, 65, 66, 72, 73, 74, 75, 76, 77, 78,
-- 0, 0, 83, 92, 92, 7, 37, 37, 38, 39,
-- 40, 41, 42, 43, 44, 10, 33, 11, 0, 12,
-- 30, 6, 0, 13, 20, 14, 1, 2, 0, 79,
-- 80, 0, 0, 4, 93, 0, 8, 9, 34, 0,
-- 31, 29, 90, 17, 0, 0, 19, 0, 82, 81,
-- 0, 5, 36, 32, 0, 86, 88, 88, 0, 15,
-- 91, 0, 89, 0, 48, 0, 0, 27, 28, 0,
-- 95, 96, 97, 98, 94, 85, 47, 46, 87, 88,
-- 88, 88, 88, 45, 50, 25, 26, 0, 23, 24,
-- 49, 52, 88, 88, 51, 88, 21, 22, 18
--};
--
--/* YYDEFGOTO[NTERM-NUM]. */
--static const yytype_int16 yydefgoto[] =
--{
-- -1, 12, 13, 61, 83, 63, 64, 59, 60, 55,
-- 79, 76, 56, 124, 117, 131, 135, 41, 42, 43,
-- 104, 107, 95, 73, 91, 114
--};
--
--/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
-- STATE-NUM. */
--#define YYPACT_NINF -96
--static const yytype_int8 yypact[] =
--{
-- 38, 61, 61, -22, -1, 8, 39, 39, -7, -96,
-- 23, 59, 92, -96, -96, -96, -96, -96, -96, -96,
-- -96, -96, -96, -96, -96, -96, -96, -96, -96, -96,
-- -96, -96, -96, -96, -96, -96, -96, -96, -96, 62,
-- 61, 79, -96, 96, 96, -96, 80, 80, -96, -96,
-- -96, -96, -96, -96, -96, -13, -96, -13, 39, -7,
-- -96, 82, 1, 23, -96, 81, -96, -96, 61, 79,
-- -96, 61, 83, -96, -96, 84, -96, -96, -96, 39,
-- -13, -96, 85, -96, 5, 87, -96, 88, -96, -96,
-- 89, -12, -96, -96, 61, 86, -20, 93, 91, -96,
-- -96, -8, -96, 94, 103, 61, 30, -96, -96, 76,
-- -96, -96, -96, -96, -96, -96, -96, 111, -96, 93,
-- 93, 0, 93, -96, 118, -96, -96, 78, -96, -96,
-- -96, 106, 93, 93, -96, 93, -96, -96, -96
--};
--
--/* YYPGOTO[NTERM-NUM]. */
--static const yytype_int16 yypgoto[] =
--{
-- -96, -96, 117, -96, -96, -96, 67, -96, 72, -6,
-- 41, 90, 54, -96, -96, -96, -96, 95, -40, 132,
-- -96, -95, -96, 97, -96, -96
--};
--
--/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If
-- positive, shift that token. If negative, reduce the rule which
-- number is the opposite. If zero, do what YYDEFACT says.
-- If YYTABLE_NINF, syntax error. */
--#define YYTABLE_NINF -36
--static const yytype_int16 yytable[] =
--{
-- 70, 57, 108, -35, -35, -35, -35, -35, 45, 105,
-- -35, -35, 106, -35, -35, -35, -35, 110, 111, 112,
-- 113, 78, 78, 58, 125, 126, 128, 129, 88, 105,
-- 46, 89, 127, 84, 85, 96, 97, 136, 137, 47,
-- 138, 1, 2, 3, 4, 5, 6, 7, 8, 9,
-- 10, 11, 80, 62, 102, 48, 49, 50, 51, 52,
-- 119, 120, 53, 54, 14, 118, 15, 16, 17, 18,
-- 19, 20, 21, 22, 23, 24, 25, 26, 27, 28,
-- 29, 30, 31, 32, 33, 34, 35, 36, 37, 38,
-- 65, 39, 66, 40, 68, 1, 2, 3, 4, 5,
-- 6, 7, 8, 9, 10, 11, 121, 122, 132, 133,
-- 72, 71, 82, 87, 75, 92, 90, 98, 94, 99,
-- 100, 103, 105, 109, 116, 115, 123, 130, 134, 67,
-- 86, 81, 101, 93, 44, 69, 0, 77, 0, 0,
-- 0, 74
--};
--
--static const yytype_int16 yycheck[] =
--{
-- 40, 7, 97, 16, 17, 18, 19, 20, 30, 29,
-- 23, 24, 32, 25, 26, 27, 28, 25, 26, 27,
-- 28, 34, 34, 30, 119, 120, 121, 122, 68, 29,
-- 31, 71, 32, 32, 33, 30, 31, 132, 133, 31,
-- 135, 3, 4, 5, 6, 7, 8, 9, 10, 11,
-- 12, 13, 58, 30, 94, 16, 17, 18, 19, 20,
-- 30, 31, 23, 24, 3, 105, 5, 6, 7, 8,
-- 9, 10, 11, 12, 13, 14, 15, 16, 17, 18,
-- 19, 20, 21, 22, 23, 24, 25, 26, 27, 28,
-- 31, 30, 0, 32, 32, 3, 4, 5, 6, 7,
-- 8, 9, 10, 11, 12, 13, 30, 31, 30, 31,
-- 14, 32, 30, 32, 34, 31, 33, 30, 33, 31,
-- 31, 35, 29, 32, 21, 31, 15, 9, 22, 12,
-- 63, 59, 91, 79, 2, 40, -1, 47, -1, -1,
-- -1, 44
--};
--
--/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
-- symbol of state STATE-NUM. */
--static const yytype_uint8 yystos[] =
--{
-- 0, 3, 4, 5, 6, 7, 8, 9, 10, 11,
-- 12, 13, 37, 38, 3, 5, 6, 7, 8, 9,
-- 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,
-- 20, 21, 22, 23, 24, 25, 26, 27, 28, 30,
-- 32, 53, 54, 55, 55, 30, 31, 31, 16, 17,
-- 18, 19, 20, 23, 24, 45, 48, 45, 30, 43,
-- 44, 39, 30, 41, 42, 31, 0, 38, 32, 53,
-- 54, 32, 14, 59, 59, 34, 47, 47, 34, 46,
-- 45, 44, 30, 40, 32, 33, 42, 32, 54, 54,
-- 33, 60, 31, 48, 33, 58, 30, 31, 30, 31,
-- 31, 46, 54, 35, 56, 29, 32, 57, 57, 32,
-- 25, 26, 27, 28, 61, 31, 21, 50, 54, 30,
-- 31, 30, 31, 15, 49, 57, 57, 32, 57, 57,
-- 9, 51, 30, 31, 22, 52, 57, 57, 57
--};
--
--#define yyerrok (yyerrstatus = 0)
--#define yyclearin (yychar = YYEMPTY)
--#define YYEMPTY (-2)
--#define YYEOF 0
--
--#define YYACCEPT goto yyacceptlab
--#define YYABORT goto yyabortlab
--#define YYERROR goto yyerrorlab
--
--
--/* Like YYERROR except do call yyerror. This remains here temporarily
-- to ease the transition to the new meaning of YYERROR, for GCC.
-- Once GCC version 2 has supplanted version 1, this can go. */
--
--#define YYFAIL goto yyerrlab
--
--#define YYRECOVERING() (!!yyerrstatus)
--
--#define YYBACKUP(Token, Value) \
--do \
-- if (yychar == YYEMPTY && yylen == 1) \
-- { \
-- yychar = (Token); \
-- yylval = (Value); \
-- yytoken = YYTRANSLATE (yychar); \
-- YYPOPSTACK (1); \
-- goto yybackup; \
-- } \
-- else \
-- { \
-- yyerror (YY_("syntax error: cannot back up")); \
-- YYERROR; \
-- } \
--while (YYID (0))
--
--
--#define YYTERROR 1
--#define YYERRCODE 256
--
--
--/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
-- If N is 0, then set CURRENT to the empty location which ends
-- the previous symbol: RHS[0] (always defined). */
--
--#define YYRHSLOC(Rhs, K) ((Rhs)[K])
--#ifndef YYLLOC_DEFAULT
--# define YYLLOC_DEFAULT(Current, Rhs, N) \
-- do \
-- if (YYID (N)) \
-- { \
-- (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \
-- (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \
-- (Current).last_line = YYRHSLOC (Rhs, N).last_line; \
-- (Current).last_column = YYRHSLOC (Rhs, N).last_column; \
-- } \
-- else \
-- { \
-- (Current).first_line = (Current).last_line = \
-- YYRHSLOC (Rhs, 0).last_line; \
-- (Current).first_column = (Current).last_column = \
-- YYRHSLOC (Rhs, 0).last_column; \
-- } \
-- while (YYID (0))
--#endif
--
--
--/* YY_LOCATION_PRINT -- Print the location on the stream.
-- This macro was not mandated originally: define only if we know
-- we won't break user code: when these are the locations we know. */
--
--#ifndef YY_LOCATION_PRINT
--# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL
--# define YY_LOCATION_PRINT(File, Loc) \
-- fprintf (File, "%d.%d-%d.%d", \
-- (Loc).first_line, (Loc).first_column, \
-- (Loc).last_line, (Loc).last_column)
--# else
--# define YY_LOCATION_PRINT(File, Loc) ((void) 0)
--# endif
--#endif
--
--
--/* YYLEX -- calling `yylex' with the right arguments. */
--
--#ifdef YYLEX_PARAM
--# define YYLEX yylex (YYLEX_PARAM)
--#else
--# define YYLEX yylex ()
--#endif
--
--/* Enable debugging if requested. */
--#if YYDEBUG
--
--# ifndef YYFPRINTF
--# include <stdio.h> /* INFRINGES ON USER NAME SPACE */
--# define YYFPRINTF fprintf
--# endif
--
--# define YYDPRINTF(Args) \
--do { \
-- if (yydebug) \
-- YYFPRINTF Args; \
--} while (YYID (0))
--
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \
--do { \
-- if (yydebug) \
-- { \
-- YYFPRINTF (stderr, "%s ", Title); \
-- yy_symbol_print (stderr, \
-- Type, Value); \
-- YYFPRINTF (stderr, "\n"); \
-- } \
--} while (YYID (0))
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_value_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (!yyvaluep)
-- return;
--# ifdef YYPRINT
-- if (yytype < YYNTOKENS)
-- YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
--# else
-- YYUSE (yyoutput);
--# endif
-- switch (yytype)
-- {
-- default:
-- break;
-- }
--}
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (yytype < YYNTOKENS)
-- YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
-- else
-- YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
--
-- yy_symbol_value_print (yyoutput, yytype, yyvaluep);
-- YYFPRINTF (yyoutput, ")");
--}
--
--/*------------------------------------------------------------------.
--| yy_stack_print -- Print the state stack from its BOTTOM up to its |
--| TOP (included). |
--`------------------------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_stack_print (yytype_int16 *bottom, yytype_int16 *top)
--#else
--static void
--yy_stack_print (bottom, top)
-- yytype_int16 *bottom;
-- yytype_int16 *top;
--#endif
--{
-- YYFPRINTF (stderr, "Stack now");
-- for (; bottom <= top; ++bottom)
-- YYFPRINTF (stderr, " %d", *bottom);
-- YYFPRINTF (stderr, "\n");
--}
--
--# define YY_STACK_PRINT(Bottom, Top) \
--do { \
-- if (yydebug) \
-- yy_stack_print ((Bottom), (Top)); \
--} while (YYID (0))
--
--
--/*------------------------------------------------.
--| Report that the YYRULE is going to be reduced. |
--`------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_reduce_print (YYSTYPE *yyvsp, int yyrule)
--#else
--static void
--yy_reduce_print (yyvsp, yyrule)
-- YYSTYPE *yyvsp;
-- int yyrule;
--#endif
--{
-- int yynrhs = yyr2[yyrule];
-- int yyi;
-- unsigned long int yylno = yyrline[yyrule];
-- YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
-- yyrule - 1, yylno);
-- /* The symbols being reduced. */
-- for (yyi = 0; yyi < yynrhs; yyi++)
-- {
-- fprintf (stderr, " $%d = ", yyi + 1);
-- yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi],
-- &(yyvsp[(yyi + 1) - (yynrhs)])
-- );
-- fprintf (stderr, "\n");
-- }
--}
--
--# define YY_REDUCE_PRINT(Rule) \
--do { \
-- if (yydebug) \
-- yy_reduce_print (yyvsp, Rule); \
--} while (YYID (0))
--
--/* Nonzero means print parse trace. It is left uninitialized so that
-- multiple parsers can coexist. */
--int yydebug;
--#else /* !YYDEBUG */
--# define YYDPRINTF(Args)
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
--# define YY_STACK_PRINT(Bottom, Top)
--# define YY_REDUCE_PRINT(Rule)
--#endif /* !YYDEBUG */
--
--
--/* YYINITDEPTH -- initial size of the parser's stacks. */
--#ifndef YYINITDEPTH
--# define YYINITDEPTH 200
--#endif
--
--/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
-- if the built-in stack extension method is used).
--
-- Do not make this value too large; the results are undefined if
-- YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
-- evaluated with infinite-precision integer arithmetic. */
--
--#ifndef YYMAXDEPTH
--# define YYMAXDEPTH 10000
--#endif
--
--
--
--#if YYERROR_VERBOSE
--
--# ifndef yystrlen
--# if defined __GLIBC__ && defined _STRING_H
--# define yystrlen strlen
--# else
--/* Return the length of YYSTR. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static YYSIZE_T
--yystrlen (const char *yystr)
--#else
--static YYSIZE_T
--yystrlen (yystr)
-- const char *yystr;
--#endif
--{
-- YYSIZE_T yylen;
-- for (yylen = 0; yystr[yylen]; yylen++)
-- continue;
-- return yylen;
--}
--# endif
--# endif
--
--# ifndef yystpcpy
--# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
--# define yystpcpy stpcpy
--# else
--/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
-- YYDEST. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static char *
--yystpcpy (char *yydest, const char *yysrc)
--#else
--static char *
--yystpcpy (yydest, yysrc)
-- char *yydest;
-- const char *yysrc;
--#endif
--{
-- char *yyd = yydest;
-- const char *yys = yysrc;
--
-- while ((*yyd++ = *yys++) != '\0')
-- continue;
--
-- return yyd - 1;
--}
--# endif
--# endif
--
--# ifndef yytnamerr
--/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
-- quotes and backslashes, so that it's suitable for yyerror. The
-- heuristic is that double-quoting is unnecessary unless the string
-- contains an apostrophe, a comma, or backslash (other than
-- backslash-backslash). YYSTR is taken from yytname. If YYRES is
-- null, do not copy; instead, return the length of what the result
-- would have been. */
--static YYSIZE_T
--yytnamerr (char *yyres, const char *yystr)
--{
-- if (*yystr == '"')
-- {
-- YYSIZE_T yyn = 0;
-- char const *yyp = yystr;
--
-- for (;;)
-- switch (*++yyp)
-- {
-- case '\'':
-- case ',':
-- goto do_not_strip_quotes;
--
-- case '\\':
-- if (*++yyp != '\\')
-- goto do_not_strip_quotes;
-- /* Fall through. */
-- default:
-- if (yyres)
-- yyres[yyn] = *yyp;
-- yyn++;
-- break;
--
-- case '"':
-- if (yyres)
-- yyres[yyn] = '\0';
-- return yyn;
-- }
-- do_not_strip_quotes: ;
-- }
--
-- if (! yyres)
-- return yystrlen (yystr);
--
-- return yystpcpy (yyres, yystr) - yyres;
--}
--# endif
--
--/* Copy into YYRESULT an error message about the unexpected token
-- YYCHAR while in state YYSTATE. Return the number of bytes copied,
-- including the terminating null byte. If YYRESULT is null, do not
-- copy anything; just return the number of bytes that would be
-- copied. As a special case, return 0 if an ordinary "syntax error"
-- message will do. Return YYSIZE_MAXIMUM if overflow occurs during
-- size calculation. */
--static YYSIZE_T
--yysyntax_error (char *yyresult, int yystate, int yychar)
--{
-- int yyn = yypact[yystate];
--
-- if (! (YYPACT_NINF < yyn && yyn <= YYLAST))
-- return 0;
-- else
-- {
-- int yytype = YYTRANSLATE (yychar);
-- YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]);
-- YYSIZE_T yysize = yysize0;
-- YYSIZE_T yysize1;
-- int yysize_overflow = 0;
-- enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
-- char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
-- int yyx;
--
--# if 0
-- /* This is so xgettext sees the translatable formats that are
-- constructed on the fly. */
-- YY_("syntax error, unexpected %s");
-- YY_("syntax error, unexpected %s, expecting %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s");
--# endif
-- char *yyfmt;
-- char const *yyf;
-- static char const yyunexpected[] = "syntax error, unexpected %s";
-- static char const yyexpecting[] = ", expecting %s";
-- static char const yyor[] = " or %s";
-- char yyformat[sizeof yyunexpected
-- + sizeof yyexpecting - 1
-- + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2)
-- * (sizeof yyor - 1))];
-- char const *yyprefix = yyexpecting;
--
-- /* Start YYX at -YYN if negative to avoid negative indexes in
-- YYCHECK. */
-- int yyxbegin = yyn < 0 ? -yyn : 0;
--
-- /* Stay within bounds of both yycheck and yytname. */
-- int yychecklim = YYLAST - yyn + 1;
-- int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
-- int yycount = 1;
--
-- yyarg[0] = yytname[yytype];
-- yyfmt = yystpcpy (yyformat, yyunexpected);
--
-- for (yyx = yyxbegin; yyx < yyxend; ++yyx)
-- if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
-- {
-- if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
-- {
-- yycount = 1;
-- yysize = yysize0;
-- yyformat[sizeof yyunexpected - 1] = '\0';
-- break;
-- }
-- yyarg[yycount++] = yytname[yyx];
-- yysize1 = yysize + yytnamerr (0, yytname[yyx]);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
-- yyfmt = yystpcpy (yyfmt, yyprefix);
-- yyprefix = yyor;
-- }
--
-- yyf = YY_(yyformat);
-- yysize1 = yysize + yystrlen (yyf);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
--
-- if (yysize_overflow)
-- return YYSIZE_MAXIMUM;
--
-- if (yyresult)
-- {
-- /* Avoid sprintf, as that infringes on the user's name space.
-- Don't have undefined behavior even if the translation
-- produced a string with the wrong number of "%s"s. */
-- char *yyp = yyresult;
-- int yyi = 0;
-- while ((*yyp = *yyf) != '\0')
-- {
-- if (*yyp == '%' && yyf[1] == 's' && yyi < yycount)
-- {
-- yyp += yytnamerr (yyp, yyarg[yyi++]);
-- yyf += 2;
-- }
-- else
-- {
-- yyp++;
-- yyf++;
-- }
-- }
-- }
-- return yysize;
-- }
--}
--#endif /* YYERROR_VERBOSE */
--
--
--/*-----------------------------------------------.
--| Release the memory associated to this symbol. |
--`-----------------------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep)
--#else
--static void
--yydestruct (yymsg, yytype, yyvaluep)
-- const char *yymsg;
-- int yytype;
-- YYSTYPE *yyvaluep;
--#endif
--{
-- YYUSE (yyvaluep);
--
-- if (!yymsg)
-- yymsg = "Deleting";
-- YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
--
-- switch (yytype)
-- {
--
-- default:
-- break;
-- }
--}
--
--
--/* Prevent warnings from -Wmissing-prototypes. */
--
--#ifdef YYPARSE_PARAM
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void *YYPARSE_PARAM);
--#else
--int yyparse ();
--#endif
--#else /* ! YYPARSE_PARAM */
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void);
--#else
--int yyparse ();
--#endif
--#endif /* ! YYPARSE_PARAM */
--
--
--
--/* The look-ahead symbol. */
--int yychar;
--
--/* The semantic value of the look-ahead symbol. */
--YYSTYPE yylval;
--
--/* Number of syntax errors so far. */
--int yynerrs;
--
--
--
--/*----------.
--| yyparse. |
--`----------*/
--
--#ifdef YYPARSE_PARAM
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void *YYPARSE_PARAM)
--#else
--int
--yyparse (YYPARSE_PARAM)
-- void *YYPARSE_PARAM;
--#endif
--#else /* ! YYPARSE_PARAM */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void)
--#else
--int
--yyparse ()
--
--#endif
--#endif
--{
--
-- int yystate;
-- int yyn;
-- int yyresult;
-- /* Number of tokens to shift before error messages enabled. */
-- int yyerrstatus;
-- /* Look-ahead token as an internal (translated) token number. */
-- int yytoken = 0;
--#if YYERROR_VERBOSE
-- /* Buffer for error messages, and its allocated size. */
-- char yymsgbuf[128];
-- char *yymsg = yymsgbuf;
-- YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
--#endif
--
-- /* Three stacks and their tools:
-- `yyss': related to states,
-- `yyvs': related to semantic values,
-- `yyls': related to locations.
--
-- Refer to the stacks thru separate pointers, to allow yyoverflow
-- to reallocate them elsewhere. */
--
-- /* The state stack. */
-- yytype_int16 yyssa[YYINITDEPTH];
-- yytype_int16 *yyss = yyssa;
-- yytype_int16 *yyssp;
--
-- /* The semantic value stack. */
-- YYSTYPE yyvsa[YYINITDEPTH];
-- YYSTYPE *yyvs = yyvsa;
-- YYSTYPE *yyvsp;
--
--
--
--#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N))
--
-- YYSIZE_T yystacksize = YYINITDEPTH;
--
-- /* The variables used to return semantic value and location from the
-- action routines. */
-- YYSTYPE yyval;
--
--
-- /* The number of symbols on the RHS of the reduced rule.
-- Keep to zero when no symbol should be popped. */
-- int yylen = 0;
--
-- YYDPRINTF ((stderr, "Starting parse\n"));
--
-- yystate = 0;
-- yyerrstatus = 0;
-- yynerrs = 0;
-- yychar = YYEMPTY; /* Cause a token to be read. */
--
-- /* Initialize stack pointers.
-- Waste one element of value and location stack
-- so that they stay on the same level as the state stack.
-- The wasted elements are never initialized. */
--
-- yyssp = yyss;
-- yyvsp = yyvs;
--
-- goto yysetstate;
--
--/*------------------------------------------------------------.
--| yynewstate -- Push a new state, which is found in yystate. |
--`------------------------------------------------------------*/
-- yynewstate:
-- /* In all cases, when you get here, the value and location stacks
-- have just been pushed. So pushing a state here evens the stacks. */
-- yyssp++;
--
-- yysetstate:
-- *yyssp = yystate;
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- {
-- /* Get the current used size of the three stacks, in elements. */
-- YYSIZE_T yysize = yyssp - yyss + 1;
--
--#ifdef yyoverflow
-- {
-- /* Give user a chance to reallocate the stack. Use copies of
-- these so that the &'s don't force the real ones into
-- memory. */
-- YYSTYPE *yyvs1 = yyvs;
-- yytype_int16 *yyss1 = yyss;
--
--
-- /* Each stack pointer address is followed by the size of the
-- data in use in that stack, in bytes. This used to be a
-- conditional around just the two extra args, but that might
-- be undefined if yyoverflow is a macro. */
-- yyoverflow (YY_("memory exhausted"),
-- &yyss1, yysize * sizeof (*yyssp),
-- &yyvs1, yysize * sizeof (*yyvsp),
--
-- &yystacksize);
--
-- yyss = yyss1;
-- yyvs = yyvs1;
-- }
--#else /* no yyoverflow */
--# ifndef YYSTACK_RELOCATE
-- goto yyexhaustedlab;
--# else
-- /* Extend the stack our own way. */
-- if (YYMAXDEPTH <= yystacksize)
-- goto yyexhaustedlab;
-- yystacksize *= 2;
-- if (YYMAXDEPTH < yystacksize)
-- yystacksize = YYMAXDEPTH;
--
-- {
-- yytype_int16 *yyss1 = yyss;
-- union yyalloc *yyptr =
-- (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
-- if (! yyptr)
-- goto yyexhaustedlab;
-- YYSTACK_RELOCATE (yyss);
-- YYSTACK_RELOCATE (yyvs);
--
--# undef YYSTACK_RELOCATE
-- if (yyss1 != yyssa)
-- YYSTACK_FREE (yyss1);
-- }
--# endif
--#endif /* no yyoverflow */
--
-- yyssp = yyss + yysize - 1;
-- yyvsp = yyvs + yysize - 1;
--
--
-- YYDPRINTF ((stderr, "Stack size increased to %lu\n",
-- (unsigned long int) yystacksize));
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- YYABORT;
-- }
--
-- YYDPRINTF ((stderr, "Entering state %d\n", yystate));
--
-- goto yybackup;
--
--/*-----------.
--| yybackup. |
--`-----------*/
--yybackup:
--
-- /* Do appropriate processing given the current state. Read a
-- look-ahead token if we need one and don't already have one. */
--
-- /* First try to decide what to do without reference to look-ahead token. */
-- yyn = yypact[yystate];
-- if (yyn == YYPACT_NINF)
-- goto yydefault;
--
-- /* Not known => get a look-ahead token if don't already have one. */
--
-- /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */
-- if (yychar == YYEMPTY)
-- {
-- YYDPRINTF ((stderr, "Reading a token: "));
-- yychar = YYLEX;
-- }
--
-- if (yychar <= YYEOF)
-- {
-- yychar = yytoken = YYEOF;
-- YYDPRINTF ((stderr, "Now at end of input.\n"));
-- }
-- else
-- {
-- yytoken = YYTRANSLATE (yychar);
-- YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
-- }
--
-- /* If the proper action on seeing token YYTOKEN is to reduce or to
-- detect an error, take that action. */
-- yyn += yytoken;
-- if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
-- goto yydefault;
-- yyn = yytable[yyn];
-- if (yyn <= 0)
-- {
-- if (yyn == 0 || yyn == YYTABLE_NINF)
-- goto yyerrlab;
-- yyn = -yyn;
-- goto yyreduce;
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- /* Count tokens shifted since error; after three, turn off error
-- status. */
-- if (yyerrstatus)
-- yyerrstatus--;
--
-- /* Shift the look-ahead token. */
-- YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
--
-- /* Discard the shifted token unless it is eof. */
-- if (yychar != YYEOF)
-- yychar = YYEMPTY;
--
-- yystate = yyn;
-- *++yyvsp = yylval;
--
-- goto yynewstate;
--
--
--/*-----------------------------------------------------------.
--| yydefault -- do the default action for the current state. |
--`-----------------------------------------------------------*/
--yydefault:
-- yyn = yydefact[yystate];
-- if (yyn == 0)
-- goto yyerrlab;
-- goto yyreduce;
--
--
--/*-----------------------------.
--| yyreduce -- Do a reduction. |
--`-----------------------------*/
--yyreduce:
-- /* yyn is the number of a rule to reduce with. */
-- yylen = yyr2[yyn];
--
-- /* If YYLEN is nonzero, implement the default value of the action:
-- `$$ = $1'.
--
-- Otherwise, the following line sets YYVAL to garbage.
-- This behavior is undocumented and Bison
-- users should not rely upon it. Assigning to YYVAL
-- unconditionally makes the parser a bit smaller, and it avoids a
-- GCC warning that YYVAL may be used uninitialized. */
-- yyval = yyvsp[1-yylen];
--
--
-- YY_REDUCE_PRINT (yyn);
-- switch (yyn)
-- {
-- case 4:
--#line 54 "defparse.y"
-- { def_name ((yyvsp[(2) - (3)].id), (yyvsp[(3) - (3)].number)); }
-- break;
--
-- case 5:
--#line 55 "defparse.y"
-- { def_library ((yyvsp[(2) - (4)].id), (yyvsp[(3) - (4)].number)); }
-- break;
--
-- case 7:
--#line 57 "defparse.y"
-- { def_description ((yyvsp[(2) - (2)].id));}
-- break;
--
-- case 8:
--#line 58 "defparse.y"
-- { def_stacksize ((yyvsp[(2) - (3)].number), (yyvsp[(3) - (3)].number));}
-- break;
--
-- case 9:
--#line 59 "defparse.y"
-- { def_heapsize ((yyvsp[(2) - (3)].number), (yyvsp[(3) - (3)].number));}
-- break;
--
-- case 10:
--#line 60 "defparse.y"
-- { def_code ((yyvsp[(2) - (2)].number));}
-- break;
--
-- case 11:
--#line 61 "defparse.y"
-- { def_data ((yyvsp[(2) - (2)].number));}
-- break;
--
-- case 14:
--#line 64 "defparse.y"
-- { def_version ((yyvsp[(2) - (2)].number),0);}
-- break;
--
-- case 15:
--#line 65 "defparse.y"
-- { def_version ((yyvsp[(2) - (4)].number),(yyvsp[(4) - (4)].number));}
-- break;
--
-- case 18:
--#line 77 "defparse.y"
-- { def_exports ((yyvsp[(1) - (8)].id), (yyvsp[(2) - (8)].id), (yyvsp[(3) - (8)].number), (yyvsp[(4) - (8)].number), (yyvsp[(5) - (8)].number), (yyvsp[(6) - (8)].number), (yyvsp[(7) - (8)].number), (yyvsp[(8) - (8)].id));}
-- break;
--
-- case 21:
--#line 86 "defparse.y"
-- { def_import ((yyvsp[(1) - (8)].id),(yyvsp[(3) - (8)].id),(yyvsp[(5) - (8)].id),(yyvsp[(7) - (8)].id), 0, (yyvsp[(8) - (8)].id)); }
-- break;
--
-- case 22:
--#line 88 "defparse.y"
-- { def_import ((yyvsp[(1) - (8)].id),(yyvsp[(3) - (8)].id),(yyvsp[(5) - (8)].id), 0,(yyvsp[(7) - (8)].number), (yyvsp[(8) - (8)].id)); }
-- break;
--
-- case 23:
--#line 90 "defparse.y"
-- { def_import ((yyvsp[(1) - (6)].id),(yyvsp[(3) - (6)].id), 0,(yyvsp[(5) - (6)].id), 0, (yyvsp[(6) - (6)].id)); }
-- break;
--
-- case 24:
--#line 92 "defparse.y"
-- { def_import ((yyvsp[(1) - (6)].id),(yyvsp[(3) - (6)].id), 0, 0,(yyvsp[(5) - (6)].number), (yyvsp[(6) - (6)].id)); }
-- break;
--
-- case 25:
--#line 94 "defparse.y"
-- { def_import ( 0,(yyvsp[(1) - (6)].id),(yyvsp[(3) - (6)].id),(yyvsp[(5) - (6)].id), 0, (yyvsp[(6) - (6)].id)); }
-- break;
--
-- case 26:
--#line 96 "defparse.y"
-- { def_import ( 0,(yyvsp[(1) - (6)].id),(yyvsp[(3) - (6)].id), 0,(yyvsp[(5) - (6)].number), (yyvsp[(6) - (6)].id)); }
-- break;
--
-- case 27:
--#line 98 "defparse.y"
-- { def_import ( 0,(yyvsp[(1) - (4)].id), 0,(yyvsp[(3) - (4)].id), 0, (yyvsp[(4) - (4)].id)); }
-- break;
--
-- case 28:
--#line 100 "defparse.y"
-- { def_import ( 0,(yyvsp[(1) - (4)].id), 0, 0,(yyvsp[(3) - (4)].number), (yyvsp[(4) - (4)].id)); }
-- break;
--
-- case 31:
--#line 109 "defparse.y"
-- { def_section ((yyvsp[(1) - (2)].id),(yyvsp[(2) - (2)].number));}
-- break;
--
-- case 36:
--#line 121 "defparse.y"
-- { (yyval.number)=(yyvsp[(2) - (2)].number);}
-- break;
--
-- case 37:
--#line 122 "defparse.y"
-- { (yyval.number)=-1;}
-- break;
--
-- case 38:
--#line 126 "defparse.y"
-- { (yyval.number) = 1; }
-- break;
--
-- case 39:
--#line 127 "defparse.y"
-- { (yyval.number) = 2; }
-- break;
--
-- case 40:
--#line 128 "defparse.y"
-- { (yyval.number) = 4; }
-- break;
--
-- case 41:
--#line 129 "defparse.y"
-- { (yyval.number) = 8; }
-- break;
--
-- case 42:
--#line 130 "defparse.y"
-- { (yyval.number) = 0; }
-- break;
--
-- case 43:
--#line 131 "defparse.y"
-- { (yyval.number) = 0; }
-- break;
--
-- case 44:
--#line 132 "defparse.y"
-- { (yyval.number) = 0; }
-- break;
--
-- case 45:
--#line 136 "defparse.y"
-- {(yyval.number)=1;}
-- break;
--
-- case 46:
--#line 137 "defparse.y"
-- {(yyval.number)=0;}
-- break;
--
-- case 47:
--#line 141 "defparse.y"
-- {(yyval.number)=1;}
-- break;
--
-- case 48:
--#line 142 "defparse.y"
-- {(yyval.number)=0;}
-- break;
--
-- case 49:
--#line 146 "defparse.y"
-- { (yyval.number) = 1; }
-- break;
--
-- case 50:
--#line 147 "defparse.y"
-- { (yyval.number) = 0; }
-- break;
--
-- case 51:
--#line 151 "defparse.y"
-- { (yyval.number) = 1; }
-- break;
--
-- case 52:
--#line 152 "defparse.y"
-- { (yyval.number) = 0; }
-- break;
--
-- case 53:
--#line 155 "defparse.y"
-- { (yyval.id_const) = "NAME"; }
-- break;
--
-- case 54:
--#line 160 "defparse.y"
-- { (yyval.id_const) = "DESCRIPTION"; }
-- break;
--
-- case 55:
--#line 161 "defparse.y"
-- { (yyval.id_const) = "STACKSIZE"; }
-- break;
--
-- case 56:
--#line 162 "defparse.y"
-- { (yyval.id_const) = "HEAPSIZE"; }
-- break;
--
-- case 57:
--#line 163 "defparse.y"
-- { (yyval.id_const) = "CODE"; }
-- break;
--
-- case 58:
--#line 164 "defparse.y"
-- { (yyval.id_const) = "DATA"; }
-- break;
--
-- case 59:
--#line 165 "defparse.y"
-- { (yyval.id_const) = "SECTIONS"; }
-- break;
--
-- case 60:
--#line 166 "defparse.y"
-- { (yyval.id_const) = "EXPORTS"; }
-- break;
--
-- case 61:
--#line 167 "defparse.y"
-- { (yyval.id_const) = "IMPORTS"; }
-- break;
--
-- case 62:
--#line 168 "defparse.y"
-- { (yyval.id_const) = "VERSION"; }
-- break;
--
-- case 63:
--#line 169 "defparse.y"
-- { (yyval.id_const) = "BASE"; }
-- break;
--
-- case 64:
--#line 170 "defparse.y"
-- { (yyval.id_const) = "CONSTANT"; }
-- break;
--
-- case 65:
--#line 171 "defparse.y"
-- { (yyval.id_const) = "NONAME"; }
-- break;
--
-- case 66:
--#line 172 "defparse.y"
-- { (yyval.id_const) = "PRIVATE"; }
-- break;
--
-- case 67:
--#line 173 "defparse.y"
-- { (yyval.id_const) = "READ"; }
-- break;
--
-- case 68:
--#line 174 "defparse.y"
-- { (yyval.id_const) = "WRITE"; }
-- break;
--
-- case 69:
--#line 175 "defparse.y"
-- { (yyval.id_const) = "EXECUTE"; }
-- break;
--
-- case 70:
--#line 176 "defparse.y"
-- { (yyval.id_const) = "SHARED"; }
-- break;
--
-- case 71:
--#line 177 "defparse.y"
-- { (yyval.id_const) = "NONSHARED"; }
-- break;
--
-- case 72:
--#line 178 "defparse.y"
-- { (yyval.id_const) = "SINGLE"; }
-- break;
--
-- case 73:
--#line 179 "defparse.y"
-- { (yyval.id_const) = "MULTIPLE"; }
-- break;
--
-- case 74:
--#line 180 "defparse.y"
-- { (yyval.id_const) = "INITINSTANCE"; }
-- break;
--
-- case 75:
--#line 181 "defparse.y"
-- { (yyval.id_const) = "INITGLOBAL"; }
-- break;
--
-- case 76:
--#line 182 "defparse.y"
-- { (yyval.id_const) = "TERMINSTANCE"; }
-- break;
--
-- case 77:
--#line 183 "defparse.y"
-- { (yyval.id_const) = "TERMGLOBAL"; }
-- break;
--
-- case 78:
--#line 186 "defparse.y"
-- { (yyval.id) = (yyvsp[(1) - (1)].id); }
-- break;
--
-- case 79:
--#line 188 "defparse.y"
-- {
-- char *name = xmalloc (strlen ((yyvsp[(2) - (2)].id_const)) + 2);
-- sprintf (name, ".%s", (yyvsp[(2) - (2)].id_const));
-- (yyval.id) = name;
-- }
-- break;
--
-- case 80:
--#line 194 "defparse.y"
-- {
-- char *name = xmalloc (strlen ((yyvsp[(2) - (2)].id)) + 2);
-- sprintf (name, ".%s", (yyvsp[(2) - (2)].id));
-- (yyval.id) = name;
-- }
-- break;
--
-- case 81:
--#line 200 "defparse.y"
-- {
-- char *name = xmalloc (strlen ((yyvsp[(1) - (3)].id_const)) + 1 + strlen ((yyvsp[(3) - (3)].id)) + 1);
-- sprintf (name, "%s.%s", (yyvsp[(1) - (3)].id_const), (yyvsp[(3) - (3)].id));
-- (yyval.id) = name;
-- }
-- break;
--
-- case 82:
--#line 206 "defparse.y"
-- {
-- char *name = xmalloc (strlen ((yyvsp[(1) - (3)].id)) + 1 + strlen ((yyvsp[(3) - (3)].id)) + 1);
-- sprintf (name, "%s.%s", (yyvsp[(1) - (3)].id), (yyvsp[(3) - (3)].id));
-- (yyval.id) = name;
-- }
-- break;
--
-- case 83:
--#line 212 "defparse.y"
-- { (yyval.id) =(yyvsp[(1) - (1)].id); }
-- break;
--
-- case 84:
--#line 213 "defparse.y"
-- { (yyval.id)=""; }
-- break;
--
-- case 85:
--#line 217 "defparse.y"
-- { (yyval.number)=(yyvsp[(2) - (2)].number);}
-- break;
--
-- case 86:
--#line 218 "defparse.y"
-- { (yyval.number)=-1;}
-- break;
--
-- case 87:
--#line 222 "defparse.y"
-- { (yyval.id) = (yyvsp[(2) - (2)].id); }
-- break;
--
-- case 88:
--#line 223 "defparse.y"
-- { (yyval.id) = 0; }
-- break;
--
-- case 89:
--#line 227 "defparse.y"
-- { (yyval.id) = (yyvsp[(2) - (2)].id); }
-- break;
--
-- case 90:
--#line 228 "defparse.y"
-- { (yyval.id) = 0; }
-- break;
--
-- case 91:
--#line 231 "defparse.y"
-- { (yyval.number)= (yyvsp[(3) - (3)].number);}
-- break;
--
-- case 92:
--#line 232 "defparse.y"
-- { (yyval.number)=-1;}
-- break;
--
--
--/* Line 1267 of yacc.c. */
--#line 1929 "defparse.c"
-- default: break;
-- }
-- YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
--
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
--
-- *++yyvsp = yyval;
--
--
-- /* Now `shift' the result of the reduction. Determine what state
-- that goes to, based on the state we popped back to and the rule
-- number reduced by. */
--
-- yyn = yyr1[yyn];
--
-- yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
-- if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
-- yystate = yytable[yystate];
-- else
-- yystate = yydefgoto[yyn - YYNTOKENS];
--
-- goto yynewstate;
--
--
--/*------------------------------------.
--| yyerrlab -- here on detecting error |
--`------------------------------------*/
--yyerrlab:
-- /* If not already recovering from an error, report this error. */
-- if (!yyerrstatus)
-- {
-- ++yynerrs;
--#if ! YYERROR_VERBOSE
-- yyerror (YY_("syntax error"));
--#else
-- {
-- YYSIZE_T yysize = yysyntax_error (0, yystate, yychar);
-- if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM)
-- {
-- YYSIZE_T yyalloc = 2 * yysize;
-- if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM))
-- yyalloc = YYSTACK_ALLOC_MAXIMUM;
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
-- yymsg = (char *) YYSTACK_ALLOC (yyalloc);
-- if (yymsg)
-- yymsg_alloc = yyalloc;
-- else
-- {
-- yymsg = yymsgbuf;
-- yymsg_alloc = sizeof yymsgbuf;
-- }
-- }
--
-- if (0 < yysize && yysize <= yymsg_alloc)
-- {
-- (void) yysyntax_error (yymsg, yystate, yychar);
-- yyerror (yymsg);
-- }
-- else
-- {
-- yyerror (YY_("syntax error"));
-- if (yysize != 0)
-- goto yyexhaustedlab;
-- }
-- }
--#endif
-- }
--
--
--
-- if (yyerrstatus == 3)
-- {
-- /* If just tried and failed to reuse look-ahead token after an
-- error, discard it. */
--
-- if (yychar <= YYEOF)
-- {
-- /* Return failure if at end of input. */
-- if (yychar == YYEOF)
-- YYABORT;
-- }
-- else
-- {
-- yydestruct ("Error: discarding",
-- yytoken, &yylval);
-- yychar = YYEMPTY;
-- }
-- }
--
-- /* Else will try to reuse look-ahead token after shifting the error
-- token. */
-- goto yyerrlab1;
--
--
--/*---------------------------------------------------.
--| yyerrorlab -- error raised explicitly by YYERROR. |
--`---------------------------------------------------*/
--yyerrorlab:
--
-- /* Pacify compilers like GCC when the user code never invokes
-- YYERROR and the label yyerrorlab therefore never appears in user
-- code. */
-- if (/*CONSTCOND*/ 0)
-- goto yyerrorlab;
--
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYERROR. */
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
-- yystate = *yyssp;
-- goto yyerrlab1;
--
--
--/*-------------------------------------------------------------.
--| yyerrlab1 -- common code for both syntax error and YYERROR. |
--`-------------------------------------------------------------*/
--yyerrlab1:
-- yyerrstatus = 3; /* Each real token shifted decrements this. */
--
-- for (;;)
-- {
-- yyn = yypact[yystate];
-- if (yyn != YYPACT_NINF)
-- {
-- yyn += YYTERROR;
-- if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
-- {
-- yyn = yytable[yyn];
-- if (0 < yyn)
-- break;
-- }
-- }
--
-- /* Pop the current state because it cannot handle the error token. */
-- if (yyssp == yyss)
-- YYABORT;
--
--
-- yydestruct ("Error: popping",
-- yystos[yystate], yyvsp);
-- YYPOPSTACK (1);
-- yystate = *yyssp;
-- YY_STACK_PRINT (yyss, yyssp);
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- *++yyvsp = yylval;
--
--
-- /* Shift the error token. */
-- YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
--
-- yystate = yyn;
-- goto yynewstate;
--
--
--/*-------------------------------------.
--| yyacceptlab -- YYACCEPT comes here. |
--`-------------------------------------*/
--yyacceptlab:
-- yyresult = 0;
-- goto yyreturn;
--
--/*-----------------------------------.
--| yyabortlab -- YYABORT comes here. |
--`-----------------------------------*/
--yyabortlab:
-- yyresult = 1;
-- goto yyreturn;
--
--#ifndef yyoverflow
--/*-------------------------------------------------.
--| yyexhaustedlab -- memory exhaustion comes here. |
--`-------------------------------------------------*/
--yyexhaustedlab:
-- yyerror (YY_("memory exhausted"));
-- yyresult = 2;
-- /* Fall through. */
--#endif
--
--yyreturn:
-- if (yychar != YYEOF && yychar != YYEMPTY)
-- yydestruct ("Cleanup: discarding lookahead",
-- yytoken, &yylval);
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYABORT or YYACCEPT. */
-- YYPOPSTACK (yylen);
-- YY_STACK_PRINT (yyss, yyssp);
-- while (yyssp != yyss)
-- {
-- yydestruct ("Cleanup: popping",
-- yystos[*yyssp], yyvsp);
-- YYPOPSTACK (1);
-- }
--#ifndef yyoverflow
-- if (yyss != yyssa)
-- YYSTACK_FREE (yyss);
--#endif
--#if YYERROR_VERBOSE
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
--#endif
-- /* Make sure YYID is used. */
-- return YYID (yyresult);
--}
--
--
--
-diff -Nur binutils-2.24.orig/binutils/defparse.h binutils-2.24/binutils/defparse.h
---- binutils-2.24.orig/binutils/defparse.h 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/defparse.h 1970-01-01 01:00:00.000000000 +0100
-@@ -1,124 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton interface for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- NAME = 258,
-- LIBRARY = 259,
-- DESCRIPTION = 260,
-- STACKSIZE = 261,
-- HEAPSIZE = 262,
-- CODE = 263,
-- DATA = 264,
-- SECTIONS = 265,
-- EXPORTS = 266,
-- IMPORTS = 267,
-- VERSIONK = 268,
-- BASE = 269,
-- CONSTANT = 270,
-- READ = 271,
-- WRITE = 272,
-- EXECUTE = 273,
-- SHARED = 274,
-- NONSHARED = 275,
-- NONAME = 276,
-- PRIVATE = 277,
-- SINGLE = 278,
-- MULTIPLE = 279,
-- INITINSTANCE = 280,
-- INITGLOBAL = 281,
-- TERMINSTANCE = 282,
-- TERMGLOBAL = 283,
-- EQUAL = 284,
-- ID = 285,
-- NUMBER = 286
-- };
--#endif
--/* Tokens. */
--#define NAME 258
--#define LIBRARY 259
--#define DESCRIPTION 260
--#define STACKSIZE 261
--#define HEAPSIZE 262
--#define CODE 263
--#define DATA 264
--#define SECTIONS 265
--#define EXPORTS 266
--#define IMPORTS 267
--#define VERSIONK 268
--#define BASE 269
--#define CONSTANT 270
--#define READ 271
--#define WRITE 272
--#define EXECUTE 273
--#define SHARED 274
--#define NONSHARED 275
--#define NONAME 276
--#define PRIVATE 277
--#define SINGLE 278
--#define MULTIPLE 279
--#define INITINSTANCE 280
--#define INITGLOBAL 281
--#define TERMINSTANCE 282
--#define TERMGLOBAL 283
--#define EQUAL 284
--#define ID 285
--#define NUMBER 286
--
--
--
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 29 "defparse.y"
--{
-- char *id;
-- const char *id_const;
-- int number;
--}
--/* Line 1529 of yacc.c. */
--#line 117 "defparse.h"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--extern YYSTYPE yylval;
--
-diff -Nur binutils-2.24.orig/binutils/doc/addr2line.1 binutils-2.24/binutils/doc/addr2line.1
---- binutils-2.24.orig/binutils/doc/addr2line.1 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/doc/addr2line.1 1970-01-01 01:00:00.000000000 +0100
-@@ -1,299 +0,0 @@
--.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14)
--.\"
--.\" Standard preamble:
--.\" ========================================================================
--.de Sp \" Vertical space (when we can't use .PP)
--.if t .sp .5v
--.if n .sp
--..
--.de Vb \" Begin verbatim text
--.ft CW
--.nf
--.ne \\$1
--..
--.de Ve \" End verbatim text
--.ft R
--.fi
--..
--.\" Set up some character translations and predefined strings. \*(-- will
--.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
--.\" double quote, and \*(R" will give a right double quote. \*(C+ will
--.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
--.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
--.\" nothing in troff, for use with C<>.
--.tr \(*W-
--.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
--.ie n \{\
--. ds -- \(*W-
--. ds PI pi
--. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
--. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
--. ds L" ""
--. ds R" ""
--. ds C` ""
--. ds C' ""
--'br\}
--.el\{\
--. ds -- \|\(em\|
--. ds PI \(*p
--. ds L" ``
--. ds R" ''
--'br\}
--.\"
--.\" Escape single quotes in literal strings from groff's Unicode transform.
--.ie \n(.g .ds Aq \(aq
--.el .ds Aq '
--.\"
--.\" If the F register is turned on, we'll generate index entries on stderr for
--.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
--.\" entries marked with X<> in POD. Of course, you'll have to process the
--.\" output yourself in some meaningful fashion.
--.ie \nF \{\
--. de IX
--. tm Index:\\$1\t\\n%\t"\\$2"
--..
--. nr % 0
--. rr F
--.\}
--.el \{\
--. de IX
--..
--.\}
--.\"
--.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
--.\" Fear. Run. Save yourself. No user-serviceable parts.
--. \" fudge factors for nroff and troff
--.if n \{\
--. ds #H 0
--. ds #V .8m
--. ds #F .3m
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--. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
--. ds #V .6m
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--. ds #[ \&
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--.if n \{\
--. ds ' \&
--. ds ` \&
--. ds ^ \&
--. ds , \&
--. ds ~ ~
--. ds /
--.\}
--.if t \{\
--. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
--. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
--. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
--. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
--. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
--. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
--.\}
--. \" troff and (daisy-wheel) nroff accents
--.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
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--.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
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--.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
--.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
--.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
--.ds ae a\h'-(\w'a'u*4/10)'e
--.ds Ae A\h'-(\w'A'u*4/10)'E
--. \" corrections for vroff
--.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
--.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
--. \" for low resolution devices (crt and lpr)
--.if \n(.H>23 .if \n(.V>19 \
--\{\
--. ds : e
--. ds 8 ss
--. ds o a
--. ds d- d\h'-1'\(ga
--. ds D- D\h'-1'\(hy
--. ds th \o'bp'
--. ds Th \o'LP'
--. ds ae ae
--. ds Ae AE
--.\}
--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "ADDR2LINE 1"
--.TH ADDR2LINE 1 "2013-11-18" "binutils-2.23.91" "GNU Development Tools"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--addr2line \- convert addresses into file names and line numbers.
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--addr2line [\fB\-a\fR|\fB\-\-addresses\fR]
-- [\fB\-b\fR \fIbfdname\fR|\fB\-\-target=\fR\fIbfdname\fR]
-- [\fB\-C\fR|\fB\-\-demangle\fR[=\fIstyle\fR]]
-- [\fB\-e\fR \fIfilename\fR|\fB\-\-exe=\fR\fIfilename\fR]
-- [\fB\-f\fR|\fB\-\-functions\fR] [\fB\-s\fR|\fB\-\-basename\fR]
-- [\fB\-i\fR|\fB\-\-inlines\fR]
-- [\fB\-p\fR|\fB\-\-pretty\-print\fR]
-- [\fB\-j\fR|\fB\-\-section=\fR\fIname\fR]
-- [\fB\-H\fR|\fB\-\-help\fR] [\fB\-V\fR|\fB\-\-version\fR]
-- [addr addr ...]
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--\&\fBaddr2line\fR translates addresses into file names and line numbers.
--Given an address in an executable or an offset in a section of a relocatable
--object, it uses the debugging information to figure out which file name and
--line number are associated with it.
--.PP
--The executable or relocatable object to use is specified with the \fB\-e\fR
--option. The default is the file \fIa.out\fR. The section in the relocatable
--object to use is specified with the \fB\-j\fR option.
--.PP
--\&\fBaddr2line\fR has two modes of operation.
--.PP
--In the first, hexadecimal addresses are specified on the command line,
--and \fBaddr2line\fR displays the file name and line number for each
--address.
--.PP
--In the second, \fBaddr2line\fR reads hexadecimal addresses from
--standard input, and prints the file name and line number for each
--address on standard output. In this mode, \fBaddr2line\fR may be used
--in a pipe to convert dynamically chosen addresses.
--.PP
--The format of the output is \fB\s-1FILENAME:LINENO\s0\fR. The file name and
--line number for each input address is printed on separate lines.
--.PP
--If the \fB\-f\fR option is used, then each \fB\s-1FILENAME:LINENO\s0\fR
--line is preceded by \fB\s-1FUNCTIONNAME\s0\fR which is the name of the
--function containing the address.
--.PP
--If the \fB\-i\fR option is used and the code at the given address is
--present there because of inlining by the compiler then the
--\&\fB{\s-1FUNCTIONNAME\s0} \s-1FILENAME:LINENO\s0\fR information for the inlining
--function will be displayed afterwards. This continues recursively
--until there is no more inlining to report.
--.PP
--If the \fB\-a\fR option is used then the output is prefixed by the
--input address.
--.PP
--If the \fB\-p\fR option is used then the output for each input
--address is displayed on one, possibly quite long, line. If
--\&\fB\-p\fR is not used then the output is broken up into multiple
--lines, based on the paragraphs above.
--.PP
--If the file name or function name can not be determined,
--\&\fBaddr2line\fR will print two question marks in their place. If the
--line number can not be determined, \fBaddr2line\fR will print 0.
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--The long and short forms of options, shown here as alternatives, are
--equivalent.
--.IP "\fB\-a\fR" 4
--.IX Item "-a"
--.PD 0
--.IP "\fB\-\-addresses\fR" 4
--.IX Item "--addresses"
--.PD
--Display the address before the function name, file and line number
--information. The address is printed with a \fB0x\fR prefix to easily
--identify it.
--.IP "\fB\-b\fR \fIbfdname\fR" 4
--.IX Item "-b bfdname"
--.PD 0
--.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
--.IX Item "--target=bfdname"
--.PD
--Specify that the object-code format for the object files is
--\&\fIbfdname\fR.
--.IP "\fB\-C\fR" 4
--.IX Item "-C"
--.PD 0
--.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4
--.IX Item "--demangle[=style]"
--.PD
--Decode (\fIdemangle\fR) low-level symbol names into user-level names.
--Besides removing any initial underscore prepended by the system, this
--makes \*(C+ function names readable. Different compilers have different
--mangling styles. The optional demangling style argument can be used to
--choose an appropriate demangling style for your compiler.
--.IP "\fB\-e\fR \fIfilename\fR" 4
--.IX Item "-e filename"
--.PD 0
--.IP "\fB\-\-exe=\fR\fIfilename\fR" 4
--.IX Item "--exe=filename"
--.PD
--Specify the name of the executable for which addresses should be
--translated. The default file is \fIa.out\fR.
--.IP "\fB\-f\fR" 4
--.IX Item "-f"
--.PD 0
--.IP "\fB\-\-functions\fR" 4
--.IX Item "--functions"
--.PD
--Display function names as well as file and line number information.
--.IP "\fB\-s\fR" 4
--.IX Item "-s"
--.PD 0
--.IP "\fB\-\-basenames\fR" 4
--.IX Item "--basenames"
--.PD
--Display only the base of each file name.
--.IP "\fB\-i\fR" 4
--.IX Item "-i"
--.PD 0
--.IP "\fB\-\-inlines\fR" 4
--.IX Item "--inlines"
--.PD
--If the address belongs to a function that was inlined, the source
--information for all enclosing scopes back to the first non-inlined
--function will also be printed. For example, if \f(CW\*(C`main\*(C'\fR inlines
--\&\f(CW\*(C`callee1\*(C'\fR which inlines \f(CW\*(C`callee2\*(C'\fR, and address is from
--\&\f(CW\*(C`callee2\*(C'\fR, the source information for \f(CW\*(C`callee1\*(C'\fR and \f(CW\*(C`main\*(C'\fR
--will also be printed.
--.IP "\fB\-j\fR" 4
--.IX Item "-j"
--.PD 0
--.IP "\fB\-\-section\fR" 4
--.IX Item "--section"
--.PD
--Read offsets relative to the specified section instead of absolute addresses.
--.IP "\fB\-p\fR" 4
--.IX Item "-p"
--.PD 0
--.IP "\fB\-\-pretty\-print\fR" 4
--.IX Item "--pretty-print"
--.PD
--Make the output more human friendly: each location are printed on one line.
--If option \fB\-i\fR is specified, lines for all enclosing scopes are
--prefixed with \fB(inlined by)\fR.
--.IP "\fB@\fR\fIfile\fR" 4
--.IX Item "@file"
--Read command-line options from \fIfile\fR. The options read are
--inserted in place of the original @\fIfile\fR option. If \fIfile\fR
--does not exist, or cannot be read, then the option will be treated
--literally, and not removed.
--.Sp
--Options in \fIfile\fR are separated by whitespace. A whitespace
--character may be included in an option by surrounding the entire
--option in either single or double quotes. Any character (including a
--backslash) may be included by prefixing the character to be included
--with a backslash. The \fIfile\fR may itself contain additional
--@\fIfile\fR options; any such options will be processed recursively.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--Info entries for \fIbinutils\fR.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1991\-2013 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/binutils/doc/ar.1 binutils-2.24/binutils/doc/ar.1
---- binutils-2.24.orig/binutils/doc/ar.1 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/doc/ar.1 1970-01-01 01:00:00.000000000 +0100
-@@ -1,461 +0,0 @@
--.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14)
--.\"
--.\" Standard preamble:
--.\" ========================================================================
--.de Sp \" Vertical space (when we can't use .PP)
--.if t .sp .5v
--.if n .sp
--..
--.de Vb \" Begin verbatim text
--.ft CW
--.nf
--.ne \\$1
--..
--.de Ve \" End verbatim text
--.ft R
--.fi
--..
--.\" Set up some character translations and predefined strings. \*(-- will
--.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
--.\" double quote, and \*(R" will give a right double quote. \*(C+ will
--.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
--.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
--.\" nothing in troff, for use with C<>.
--.tr \(*W-
--.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
--.ie n \{\
--. ds -- \(*W-
--. ds PI pi
--. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
--. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
--. ds L" ""
--. ds R" ""
--. ds C` ""
--. ds C' ""
--'br\}
--.el\{\
--. ds -- \|\(em\|
--. ds PI \(*p
--. ds L" ``
--. ds R" ''
--'br\}
--.\"
--.\" Escape single quotes in literal strings from groff's Unicode transform.
--.ie \n(.g .ds Aq \(aq
--.el .ds Aq '
--.\"
--.\" If the F register is turned on, we'll generate index entries on stderr for
--.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
--.\" entries marked with X<> in POD. Of course, you'll have to process the
--.\" output yourself in some meaningful fashion.
--.ie \nF \{\
--. de IX
--. tm Index:\\$1\t\\n%\t"\\$2"
--..
--. nr % 0
--. rr F
--.\}
--.el \{\
--. de IX
--..
--.\}
--.\"
--.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
--.\" Fear. Run. Save yourself. No user-serviceable parts.
--. \" fudge factors for nroff and troff
--.if n \{\
--. ds #H 0
--. ds #V .8m
--. ds #F .3m
--. ds #[ \f1
--. ds #] \fP
--.\}
--.if t \{\
--. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
--. ds #V .6m
--. ds #F 0
--. ds #[ \&
--. ds #] \&
--.\}
--. \" simple accents for nroff and troff
--.if n \{\
--. ds ' \&
--. ds ` \&
--. ds ^ \&
--. ds , \&
--. ds ~ ~
--. ds /
--.\}
--.if t \{\
--. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
--. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
--. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
--. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
--. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
--. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
--.\}
--. \" troff and (daisy-wheel) nroff accents
--.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
--.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
--.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
--.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
--.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
--.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
--.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
--.ds ae a\h'-(\w'a'u*4/10)'e
--.ds Ae A\h'-(\w'A'u*4/10)'E
--. \" corrections for vroff
--.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
--.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
--. \" for low resolution devices (crt and lpr)
--.if \n(.H>23 .if \n(.V>19 \
--\{\
--. ds : e
--. ds 8 ss
--. ds o a
--. ds d- d\h'-1'\(ga
--. ds D- D\h'-1'\(hy
--. ds th \o'bp'
--. ds Th \o'LP'
--. ds ae ae
--. ds Ae AE
--.\}
--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "AR 1"
--.TH AR 1 "2013-11-18" "binutils-2.23.91" "GNU Development Tools"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--ar \- create, modify, and extract from archives
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--ar [\fB\-\-plugin\fR \fIname\fR] [\fB\-X32_64\fR] [\fB\-\fR]\fIp\fR[\fImod\fR [\fIrelpos\fR] [\fIcount\fR]] [\fB\-\-target\fR \fIbfdname\fR] \fIarchive\fR [\fImember\fR...]
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--The \s-1GNU\s0 \fBar\fR program creates, modifies, and extracts from
--archives. An \fIarchive\fR is a single file holding a collection of
--other files in a structure that makes it possible to retrieve
--the original individual files (called \fImembers\fR of the archive).
--.PP
--The original files' contents, mode (permissions), timestamp, owner, and
--group are preserved in the archive, and can be restored on
--extraction.
--.PP
--\&\s-1GNU\s0 \fBar\fR can maintain archives whose members have names of any
--length; however, depending on how \fBar\fR is configured on your
--system, a limit on member-name length may be imposed for compatibility
--with archive formats maintained with other tools. If it exists, the
--limit is often 15 characters (typical of formats related to a.out) or 16
--characters (typical of formats related to coff).
--.PP
--\&\fBar\fR is considered a binary utility because archives of this sort
--are most often used as \fIlibraries\fR holding commonly needed
--subroutines.
--.PP
--\&\fBar\fR creates an index to the symbols defined in relocatable
--object modules in the archive when you specify the modifier \fBs\fR.
--Once created, this index is updated in the archive whenever \fBar\fR
--makes a change to its contents (save for the \fBq\fR update operation).
--An archive with such an index speeds up linking to the library, and
--allows routines in the library to call each other without regard to
--their placement in the archive.
--.PP
--You may use \fBnm \-s\fR or \fBnm \-\-print\-armap\fR to list this index
--table. If an archive lacks the table, another form of \fBar\fR called
--\&\fBranlib\fR can be used to add just the table.
--.PP
--\&\s-1GNU\s0 \fBar\fR can optionally create a \fIthin\fR archive,
--which contains a symbol index and references to the original copies
--of the member files of the archive. This is useful for building
--libraries for use within a local build tree, where the relocatable
--objects are expected to remain available, and copying the contents of
--each object would only waste time and space.
--.PP
--An archive can either be \fIthin\fR or it can be normal. It cannot
--be both at the same time. Once an archive is created its format
--cannot be changed without first deleting it and then creating a new
--archive in its place.
--.PP
--Thin archives are also \fIflattened\fR, so that adding one thin
--archive to another thin archive does not nest it, as would happen with
--a normal archive. Instead the elements of the first archive are added
--individually to the second archive.
--.PP
--The paths to the elements of the archive are stored relative to the
--archive itself.
--.PP
--\&\s-1GNU\s0 \fBar\fR is designed to be compatible with two different
--facilities. You can control its activity using command-line options,
--like the different varieties of \fBar\fR on Unix systems; or, if you
--specify the single command-line option \fB\-M\fR, you can control it
--with a script supplied via standard input, like the \s-1MRI\s0 \*(L"librarian\*(R"
--program.
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--\&\s-1GNU\s0 \fBar\fR allows you to mix the operation code \fIp\fR and modifier
--flags \fImod\fR in any order, within the first command-line argument.
--.PP
--If you wish, you may begin the first command-line argument with a
--dash.
--.PP
--The \fIp\fR keyletter specifies what operation to execute; it may be
--any of the following, but you must specify only one of them:
--.IP "\fBd\fR" 4
--.IX Item "d"
--\&\fIDelete\fR modules from the archive. Specify the names of modules to
--be deleted as \fImember\fR...; the archive is untouched if you
--specify no files to delete.
--.Sp
--If you specify the \fBv\fR modifier, \fBar\fR lists each module
--as it is deleted.
--.IP "\fBm\fR" 4
--.IX Item "m"
--Use this operation to \fImove\fR members in an archive.
--.Sp
--The ordering of members in an archive can make a difference in how
--programs are linked using the library, if a symbol is defined in more
--than one member.
--.Sp
--If no modifiers are used with \f(CW\*(C`m\*(C'\fR, any members you name in the
--\&\fImember\fR arguments are moved to the \fIend\fR of the archive;
--you can use the \fBa\fR, \fBb\fR, or \fBi\fR modifiers to move them to a
--specified place instead.
--.IP "\fBp\fR" 4
--.IX Item "p"
--\&\fIPrint\fR the specified members of the archive, to the standard
--output file. If the \fBv\fR modifier is specified, show the member
--name before copying its contents to standard output.
--.Sp
--If you specify no \fImember\fR arguments, all the files in the archive are
--printed.
--.IP "\fBq\fR" 4
--.IX Item "q"
--\&\fIQuick append\fR; Historically, add the files \fImember\fR... to the end of
--\&\fIarchive\fR, without checking for replacement.
--.Sp
--The modifiers \fBa\fR, \fBb\fR, and \fBi\fR do \fInot\fR affect this
--operation; new members are always placed at the end of the archive.
--.Sp
--The modifier \fBv\fR makes \fBar\fR list each file as it is appended.
--.Sp
--Since the point of this operation is speed, implementations of
--\&\fBar\fR have the option of not updating the archive's symbol
--table if one exists. Too many different systems however assume that
--symbol tables are always up-to-date, so \s-1GNU\s0 \fBar\fR will
--rebuild the table even with a quick append.
--.Sp
--Note \- \s-1GNU\s0 \fBar\fR treats the command \fBqs\fR as a
--synonym for \fBr\fR \- replacing already existing files in the
--archive and appending new ones at the end.
--.IP "\fBr\fR" 4
--.IX Item "r"
--Insert the files \fImember\fR... into \fIarchive\fR (with
--\&\fIreplacement\fR). This operation differs from \fBq\fR in that any
--previously existing members are deleted if their names match those being
--added.
--.Sp
--If one of the files named in \fImember\fR... does not exist, \fBar\fR
--displays an error message, and leaves undisturbed any existing members
--of the archive matching that name.
--.Sp
--By default, new members are added at the end of the file; but you may
--use one of the modifiers \fBa\fR, \fBb\fR, or \fBi\fR to request
--placement relative to some existing member.
--.Sp
--The modifier \fBv\fR used with this operation elicits a line of
--output for each file inserted, along with one of the letters \fBa\fR or
--\&\fBr\fR to indicate whether the file was appended (no old member
--deleted) or replaced.
--.IP "\fBs\fR" 4
--.IX Item "s"
--Add an index to the archive, or update it if it already exists. Note
--this command is an exception to the rule that there can only be one
--command letter, as it is possible to use it as either a command or a
--modifier. In either case it does the same thing.
--.IP "\fBt\fR" 4
--.IX Item "t"
--Display a \fItable\fR listing the contents of \fIarchive\fR, or those
--of the files listed in \fImember\fR... that are present in the
--archive. Normally only the member name is shown; if you also want to
--see the modes (permissions), timestamp, owner, group, and size, you can
--request that by also specifying the \fBv\fR modifier.
--.Sp
--If you do not specify a \fImember\fR, all files in the archive
--are listed.
--.Sp
--If there is more than one file with the same name (say, \fBfie\fR) in
--an archive (say \fBb.a\fR), \fBar t b.a fie\fR lists only the
--first instance; to see them all, you must ask for a complete
--listing\-\-\-in our example, \fBar t b.a\fR.
--.IP "\fBx\fR" 4
--.IX Item "x"
--\&\fIExtract\fR members (named \fImember\fR) from the archive. You can
--use the \fBv\fR modifier with this operation, to request that
--\&\fBar\fR list each name as it extracts it.
--.Sp
--If you do not specify a \fImember\fR, all files in the archive
--are extracted.
--.Sp
--Files cannot be extracted from a thin archive.
--.IP "\fB\-\-help\fR" 4
--.IX Item "--help"
--Displays the list of command line options supported by \fBar\fR
--and then exits.
--.IP "\fB\-\-version\fR" 4
--.IX Item "--version"
--Displays the version information of \fBar\fR and then exits.
--.PP
--A number of modifiers (\fImod\fR) may immediately follow the \fIp\fR
--keyletter, to specify variations on an operation's behavior:
--.IP "\fBa\fR" 4
--.IX Item "a"
--Add new files \fIafter\fR an existing member of the
--archive. If you use the modifier \fBa\fR, the name of an existing archive
--member must be present as the \fIrelpos\fR argument, before the
--\&\fIarchive\fR specification.
--.IP "\fBb\fR" 4
--.IX Item "b"
--Add new files \fIbefore\fR an existing member of the
--archive. If you use the modifier \fBb\fR, the name of an existing archive
--member must be present as the \fIrelpos\fR argument, before the
--\&\fIarchive\fR specification. (same as \fBi\fR).
--.IP "\fBc\fR" 4
--.IX Item "c"
--\&\fICreate\fR the archive. The specified \fIarchive\fR is always
--created if it did not exist, when you request an update. But a warning is
--issued unless you specify in advance that you expect to create it, by
--using this modifier.
--.IP "\fBD\fR" 4
--.IX Item "D"
--Operate in \fIdeterministic\fR mode. When adding files and the archive
--index use zero for UIDs, GIDs, timestamps, and use consistent file modes
--for all files. When this option is used, if \fBar\fR is used with
--identical options and identical input files, multiple runs will create
--identical output files regardless of the input files' owners, groups,
--file modes, or modification times.
--.Sp
--If \fIbinutils\fR was configured with
--\&\fB\-\-enable\-deterministic\-archives\fR, then this mode is on by default.
--It can be disabled with the \fBU\fR modifier, below.
--.IP "\fBf\fR" 4
--.IX Item "f"
--Truncate names in the archive. \s-1GNU\s0 \fBar\fR will normally permit file
--names of any length. This will cause it to create archives which are
--not compatible with the native \fBar\fR program on some systems. If
--this is a concern, the \fBf\fR modifier may be used to truncate file
--names when putting them in the archive.
--.IP "\fBi\fR" 4
--.IX Item "i"
--Insert new files \fIbefore\fR an existing member of the
--archive. If you use the modifier \fBi\fR, the name of an existing archive
--member must be present as the \fIrelpos\fR argument, before the
--\&\fIarchive\fR specification. (same as \fBb\fR).
--.IP "\fBl\fR" 4
--.IX Item "l"
--This modifier is accepted but not used.
--.IP "\fBN\fR" 4
--.IX Item "N"
--Uses the \fIcount\fR parameter. This is used if there are multiple
--entries in the archive with the same name. Extract or delete instance
--\&\fIcount\fR of the given name from the archive.
--.IP "\fBo\fR" 4
--.IX Item "o"
--Preserve the \fIoriginal\fR dates of members when extracting them. If
--you do not specify this modifier, files extracted from the archive
--are stamped with the time of extraction.
--.IP "\fBP\fR" 4
--.IX Item "P"
--Use the full path name when matching names in the archive. \s-1GNU\s0
--\&\fBar\fR can not create an archive with a full path name (such archives
--are not \s-1POSIX\s0 complaint), but other archive creators can. This option
--will cause \s-1GNU\s0 \fBar\fR to match file names using a complete path
--name, which can be convenient when extracting a single file from an
--archive created by another tool.
--.IP "\fBs\fR" 4
--.IX Item "s"
--Write an object-file index into the archive, or update an existing one,
--even if no other change is made to the archive. You may use this modifier
--flag either with any operation, or alone. Running \fBar s\fR on an
--archive is equivalent to running \fBranlib\fR on it.
--.IP "\fBS\fR" 4
--.IX Item "S"
--Do not generate an archive symbol table. This can speed up building a
--large library in several steps. The resulting archive can not be used
--with the linker. In order to build a symbol table, you must omit the
--\&\fBS\fR modifier on the last execution of \fBar\fR, or you must run
--\&\fBranlib\fR on the archive.
--.IP "\fBT\fR" 4
--.IX Item "T"
--Make the specified \fIarchive\fR a \fIthin\fR archive. If it already
--exists and is a regular archive, the existing members must be present
--in the same directory as \fIarchive\fR.
--.IP "\fBu\fR" 4
--.IX Item "u"
--Normally, \fBar r\fR... inserts all files
--listed into the archive. If you would like to insert \fIonly\fR those
--of the files you list that are newer than existing members of the same
--names, use this modifier. The \fBu\fR modifier is allowed only for the
--operation \fBr\fR (replace). In particular, the combination \fBqu\fR is
--not allowed, since checking the timestamps would lose any speed
--advantage from the operation \fBq\fR.
--.IP "\fBU\fR" 4
--.IX Item "U"
--Do \fInot\fR operate in \fIdeterministic\fR mode. This is the inverse
--of the \fBD\fR modifier, above: added files and the archive index will
--get their actual \s-1UID\s0, \s-1GID\s0, timestamp, and file mode values.
--.Sp
--This is the default unless \fIbinutils\fR was configured with
--\&\fB\-\-enable\-deterministic\-archives\fR.
--.IP "\fBv\fR" 4
--.IX Item "v"
--This modifier requests the \fIverbose\fR version of an operation. Many
--operations display additional information, such as filenames processed,
--when the modifier \fBv\fR is appended.
--.IP "\fBV\fR" 4
--.IX Item "V"
--This modifier shows the version number of \fBar\fR.
--.PP
--\&\fBar\fR ignores an initial option spelt \fB\-X32_64\fR, for
--compatibility with \s-1AIX\s0. The behaviour produced by this option is the
--default for \s-1GNU\s0 \fBar\fR. \fBar\fR does not support any of the other
--\&\fB\-X\fR options; in particular, it does not support \fB\-X32\fR
--which is the default for \s-1AIX\s0 \fBar\fR.
--.PP
--The optional command line switch \fB\-\-plugin\fR \fIname\fR causes
--\&\fBar\fR to load the plugin called \fIname\fR which adds support
--for more file formats. This option is only available if the toolchain
--has been built with plugin support enabled.
--.PP
--The optional command line switch \fB\-\-target\fR \fIbfdname\fR
--specifies that the archive members are in an object code format
--different from your system's default format. See
--.IP "\fB@\fR\fIfile\fR" 4
--.IX Item "@file"
--Read command-line options from \fIfile\fR. The options read are
--inserted in place of the original @\fIfile\fR option. If \fIfile\fR
--does not exist, or cannot be read, then the option will be treated
--literally, and not removed.
--.Sp
--Options in \fIfile\fR are separated by whitespace. A whitespace
--character may be included in an option by surrounding the entire
--option in either single or double quotes. Any character (including a
--backslash) may be included by prefixing the character to be included
--with a backslash. The \fIfile\fR may itself contain additional
--@\fIfile\fR options; any such options will be processed recursively.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--\&\fInm\fR\|(1), \fIranlib\fR\|(1), and the Info entries for \fIbinutils\fR.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1991\-2013 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/binutils/doc/binutils.info binutils-2.24/binutils/doc/binutils.info
---- binutils-2.24.orig/binutils/doc/binutils.info 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/doc/binutils.info 1970-01-01 01:00:00.000000000 +0100
-@@ -1,4898 +0,0 @@
--This is binutils.info, produced by makeinfo version 4.8 from
--binutils.texi.
--
-- Copyright (C) 1991-2013 Free Software Foundation, Inc.
--
-- Permission is granted to copy, distribute and/or modify this document
--under the terms of the GNU Free Documentation License, Version 1.3 or
--any later version published by the Free Software Foundation; with no
--Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
--Texts. A copy of the license is included in the section entitled "GNU
--Free Documentation License".
--
--INFO-DIR-SECTION Software development
--START-INFO-DIR-ENTRY
--* Binutils: (binutils). The GNU binary utilities.
--END-INFO-DIR-ENTRY
--
--INFO-DIR-SECTION Individual utilities
--START-INFO-DIR-ENTRY
--* addr2line: (binutils)addr2line. Convert addresses to file and line.
--* ar: (binutils)ar. Create, modify, and extract from archives.
--* c++filt: (binutils)c++filt. Filter to demangle encoded C++ symbols.
--* cxxfilt: (binutils)c++filt. MS-DOS name for c++filt.
--* dlltool: (binutils)dlltool. Create files needed to build and use DLLs.
--* nlmconv: (binutils)nlmconv. Converts object code into an NLM.
--* nm: (binutils)nm. List symbols from object files.
--* objcopy: (binutils)objcopy. Copy and translate object files.
--* objdump: (binutils)objdump. Display information from object files.
--* ranlib: (binutils)ranlib. Generate index to archive contents.
--* readelf: (binutils)readelf. Display the contents of ELF format files.
--* size: (binutils)size. List section sizes and total size.
--* strings: (binutils)strings. List printable strings from files.
--* strip: (binutils)strip. Discard symbols.
--* elfedit: (binutils)elfedit. Update the ELF header of ELF files.
--* windmc: (binutils)windmc. Generator for Windows message resources.
--* windres: (binutils)windres. Manipulate Windows resources.
--END-INFO-DIR-ENTRY
--
--
--File: binutils.info, Node: Top, Next: ar, Up: (dir)
--
--Introduction
--************
--
--This brief manual contains documentation for the GNU binary utilities
--(GNU Binutils) version 2.23.91:
--
-- This document is distributed under the terms of the GNU Free
--Documentation License version 1.3. A copy of the license is included
--in the section entitled "GNU Free Documentation License".
--
--* Menu:
--
--* ar:: Create, modify, and extract from archives
--* nm:: List symbols from object files
--* objcopy:: Copy and translate object files
--* objdump:: Display information from object files
--* ranlib:: Generate index to archive contents
--* size:: List section sizes and total size
--* strings:: List printable strings from files
--* strip:: Discard symbols
--* c++filt:: Filter to demangle encoded C++ symbols
--* cxxfilt: c++filt. MS-DOS name for c++filt
--* addr2line:: Convert addresses to file and line
--* nlmconv:: Converts object code into an NLM
--* windmc:: Generator for Windows message resources
--* windres:: Manipulate Windows resources
--* dlltool:: Create files needed to build and use DLLs
--* readelf:: Display the contents of ELF format files
--* elfedit:: Update the ELF header of ELF files
--* Common Options:: Command-line options for all utilities
--* Selecting the Target System:: How these utilities determine the target
--* Reporting Bugs:: Reporting Bugs
--* GNU Free Documentation License:: GNU Free Documentation License
--* Binutils Index:: Binutils Index
--
--
--File: binutils.info, Node: ar, Next: nm, Prev: Top, Up: Top
--
--1 ar
--****
--
-- ar [`--plugin' NAME] [-]P[MOD [RELPOS] [COUNT]] [`--target' BFDNAME] ARCHIVE [MEMBER...]
-- ar -M [ <mri-script ]
--
-- The GNU `ar' program creates, modifies, and extracts from archives.
--An "archive" is a single file holding a collection of other files in a
--structure that makes it possible to retrieve the original individual
--files (called "members" of the archive).
--
-- The original files' contents, mode (permissions), timestamp, owner,
--and group are preserved in the archive, and can be restored on
--extraction.
--
-- GNU `ar' can maintain archives whose members have names of any
--length; however, depending on how `ar' is configured on your system, a
--limit on member-name length may be imposed for compatibility with
--archive formats maintained with other tools. If it exists, the limit
--is often 15 characters (typical of formats related to a.out) or 16
--characters (typical of formats related to coff).
--
-- `ar' is considered a binary utility because archives of this sort
--are most often used as "libraries" holding commonly needed subroutines.
--
-- `ar' creates an index to the symbols defined in relocatable object
--modules in the archive when you specify the modifier `s'. Once
--created, this index is updated in the archive whenever `ar' makes a
--change to its contents (save for the `q' update operation). An archive
--with such an index speeds up linking to the library, and allows
--routines in the library to call each other without regard to their
--placement in the archive.
--
-- You may use `nm -s' or `nm --print-armap' to list this index table.
--If an archive lacks the table, another form of `ar' called `ranlib' can
--be used to add just the table.
--
-- GNU `ar' can optionally create a _thin_ archive, which contains a
--symbol index and references to the original copies of the member files
--of the archive. This is useful for building libraries for use within a
--local build tree, where the relocatable objects are expected to remain
--available, and copying the contents of each object would only waste
--time and space.
--
-- An archive can either be _thin_ or it can be normal. It cannot be
--both at the same time. Once an archive is created its format cannot be
--changed without first deleting it and then creating a new archive in
--its place.
--
-- Thin archives are also _flattened_, so that adding one thin archive
--to another thin archive does not nest it, as would happen with a normal
--archive. Instead the elements of the first archive are added
--individually to the second archive.
--
-- The paths to the elements of the archive are stored relative to the
--archive itself.
--
-- GNU `ar' is designed to be compatible with two different facilities.
--You can control its activity using command-line options, like the
--different varieties of `ar' on Unix systems; or, if you specify the
--single command-line option `-M', you can control it with a script
--supplied via standard input, like the MRI "librarian" program.
--
--* Menu:
--
--* ar cmdline:: Controlling `ar' on the command line
--* ar scripts:: Controlling `ar' with a script
--
--
--File: binutils.info, Node: ar cmdline, Next: ar scripts, Up: ar
--
--1.1 Controlling `ar' on the Command Line
--========================================
--
-- ar [`--plugin' NAME] [`-X32_64'] [`-']P[MOD [RELPOS] [COUNT]] [`--target' BFDNAME] ARCHIVE [MEMBER...]
--
-- When you use `ar' in the Unix style, `ar' insists on at least two
--arguments to execute: one keyletter specifying the _operation_
--(optionally accompanied by other keyletters specifying _modifiers_),
--and the archive name to act on.
--
-- Most operations can also accept further MEMBER arguments, specifying
--particular files to operate on.
--
-- GNU `ar' allows you to mix the operation code P and modifier flags
--MOD in any order, within the first command-line argument.
--
-- If you wish, you may begin the first command-line argument with a
--dash.
--
-- The P keyletter specifies what operation to execute; it may be any
--of the following, but you must specify only one of them:
--
--`d'
-- _Delete_ modules from the archive. Specify the names of modules to
-- be deleted as MEMBER...; the archive is untouched if you specify
-- no files to delete.
--
-- If you specify the `v' modifier, `ar' lists each module as it is
-- deleted.
--
--`m'
-- Use this operation to _move_ members in an archive.
--
-- The ordering of members in an archive can make a difference in how
-- programs are linked using the library, if a symbol is defined in
-- more than one member.
--
-- If no modifiers are used with `m', any members you name in the
-- MEMBER arguments are moved to the _end_ of the archive; you can
-- use the `a', `b', or `i' modifiers to move them to a specified
-- place instead.
--
--`p'
-- _Print_ the specified members of the archive, to the standard
-- output file. If the `v' modifier is specified, show the member
-- name before copying its contents to standard output.
--
-- If you specify no MEMBER arguments, all the files in the archive
-- are printed.
--
--`q'
-- _Quick append_; Historically, add the files MEMBER... to the end of
-- ARCHIVE, without checking for replacement.
--
-- The modifiers `a', `b', and `i' do _not_ affect this operation;
-- new members are always placed at the end of the archive.
--
-- The modifier `v' makes `ar' list each file as it is appended.
--
-- Since the point of this operation is speed, implementations of
-- `ar' have the option of not updating the archive's symbol table if
-- one exists. Too many different systems however assume that symbol
-- tables are always up-to-date, so GNU `ar' will rebuild the table
-- even with a quick append.
--
-- Note - GNU `ar' treats the command `qs' as a synonym for `r' -
-- replacing already existing files in the archive and appending new
-- ones at the end.
--
--`r'
-- Insert the files MEMBER... into ARCHIVE (with _replacement_). This
-- operation differs from `q' in that any previously existing members
-- are deleted if their names match those being added.
--
-- If one of the files named in MEMBER... does not exist, `ar'
-- displays an error message, and leaves undisturbed any existing
-- members of the archive matching that name.
--
-- By default, new members are added at the end of the file; but you
-- may use one of the modifiers `a', `b', or `i' to request placement
-- relative to some existing member.
--
-- The modifier `v' used with this operation elicits a line of output
-- for each file inserted, along with one of the letters `a' or `r'
-- to indicate whether the file was appended (no old member deleted)
-- or replaced.
--
--`s'
-- Add an index to the archive, or update it if it already exists.
-- Note this command is an exception to the rule that there can only
-- be one command letter, as it is possible to use it as either a
-- command or a modifier. In either case it does the same thing.
--
--`t'
-- Display a _table_ listing the contents of ARCHIVE, or those of the
-- files listed in MEMBER... that are present in the archive.
-- Normally only the member name is shown; if you also want to see
-- the modes (permissions), timestamp, owner, group, and size, you can
-- request that by also specifying the `v' modifier.
--
-- If you do not specify a MEMBER, all files in the archive are
-- listed.
--
-- If there is more than one file with the same name (say, `fie') in
-- an archive (say `b.a'), `ar t b.a fie' lists only the first
-- instance; to see them all, you must ask for a complete listing--in
-- our example, `ar t b.a'.
--
--`x'
-- _Extract_ members (named MEMBER) from the archive. You can use
-- the `v' modifier with this operation, to request that `ar' list
-- each name as it extracts it.
--
-- If you do not specify a MEMBER, all files in the archive are
-- extracted.
--
-- Files cannot be extracted from a thin archive.
--
--`--help'
-- Displays the list of command line options supported by `ar' and
-- then exits.
--
--`--version'
-- Displays the version information of `ar' and then exits.
--
--
-- A number of modifiers (MOD) may immediately follow the P keyletter,
--to specify variations on an operation's behavior:
--
--`a'
-- Add new files _after_ an existing member of the archive. If you
-- use the modifier `a', the name of an existing archive member must
-- be present as the RELPOS argument, before the ARCHIVE
-- specification.
--
--`b'
-- Add new files _before_ an existing member of the archive. If you
-- use the modifier `b', the name of an existing archive member must
-- be present as the RELPOS argument, before the ARCHIVE
-- specification. (same as `i').
--
--`c'
-- _Create_ the archive. The specified ARCHIVE is always created if
-- it did not exist, when you request an update. But a warning is
-- issued unless you specify in advance that you expect to create it,
-- by using this modifier.
--
--`D'
-- Operate in _deterministic_ mode. When adding files and the archive
-- index use zero for UIDs, GIDs, timestamps, and use consistent file
-- modes for all files. When this option is used, if `ar' is used
-- with identical options and identical input files, multiple runs
-- will create identical output files regardless of the input files'
-- owners, groups, file modes, or modification times.
--
-- If `binutils' was configured with
-- `--enable-deterministic-archives', then this mode is on by default.
-- It can be disabled with the `U' modifier, below.
--
--`f'
-- Truncate names in the archive. GNU `ar' will normally permit file
-- names of any length. This will cause it to create archives which
-- are not compatible with the native `ar' program on some systems.
-- If this is a concern, the `f' modifier may be used to truncate file
-- names when putting them in the archive.
--
--`i'
-- Insert new files _before_ an existing member of the archive. If
-- you use the modifier `i', the name of an existing archive member
-- must be present as the RELPOS argument, before the ARCHIVE
-- specification. (same as `b').
--
--`l'
-- This modifier is accepted but not used.
--
--`N'
-- Uses the COUNT parameter. This is used if there are multiple
-- entries in the archive with the same name. Extract or delete
-- instance COUNT of the given name from the archive.
--
--`o'
-- Preserve the _original_ dates of members when extracting them. If
-- you do not specify this modifier, files extracted from the archive
-- are stamped with the time of extraction.
--
--`P'
-- Use the full path name when matching names in the archive. GNU
-- `ar' can not create an archive with a full path name (such archives
-- are not POSIX complaint), but other archive creators can. This
-- option will cause GNU `ar' to match file names using a complete
-- path name, which can be convenient when extracting a single file
-- from an archive created by another tool.
--
--`s'
-- Write an object-file index into the archive, or update an existing
-- one, even if no other change is made to the archive. You may use
-- this modifier flag either with any operation, or alone. Running
-- `ar s' on an archive is equivalent to running `ranlib' on it.
--
--`S'
-- Do not generate an archive symbol table. This can speed up
-- building a large library in several steps. The resulting archive
-- can not be used with the linker. In order to build a symbol
-- table, you must omit the `S' modifier on the last execution of
-- `ar', or you must run `ranlib' on the archive.
--
--`T'
-- Make the specified ARCHIVE a _thin_ archive. If it already exists
-- and is a regular archive, the existing members must be present in
-- the same directory as ARCHIVE.
--
--`u'
-- Normally, `ar r'... inserts all files listed into the archive. If
-- you would like to insert _only_ those of the files you list that
-- are newer than existing members of the same names, use this
-- modifier. The `u' modifier is allowed only for the operation `r'
-- (replace). In particular, the combination `qu' is not allowed,
-- since checking the timestamps would lose any speed advantage from
-- the operation `q'.
--
--`U'
-- Do _not_ operate in _deterministic_ mode. This is the inverse of
-- the `D' modifier, above: added files and the archive index will
-- get their actual UID, GID, timestamp, and file mode values.
--
-- This is the default unless `binutils' was configured with
-- `--enable-deterministic-archives'.
--
--`v'
-- This modifier requests the _verbose_ version of an operation. Many
-- operations display additional information, such as filenames
-- processed, when the modifier `v' is appended.
--
--`V'
-- This modifier shows the version number of `ar'.
--
-- `ar' ignores an initial option spelt `-X32_64', for compatibility
--with AIX. The behaviour produced by this option is the default for GNU
--`ar'. `ar' does not support any of the other `-X' options; in
--particular, it does not support `-X32' which is the default for AIX
--`ar'.
--
-- The optional command line switch `--plugin' NAME causes `ar' to load
--the plugin called NAME which adds support for more file formats. This
--option is only available if the toolchain has been built with plugin
--support enabled.
--
-- The optional command line switch `--target' BFDNAME specifies that
--the archive members are in an object code format different from your
--system's default format. See *Note Target Selection::, for more
--information.
--
--
--File: binutils.info, Node: ar scripts, Prev: ar cmdline, Up: ar
--
--1.2 Controlling `ar' with a Script
--==================================
--
-- ar -M [ <SCRIPT ]
--
-- If you use the single command-line option `-M' with `ar', you can
--control its operation with a rudimentary command language. This form
--of `ar' operates interactively if standard input is coming directly
--from a terminal. During interactive use, `ar' prompts for input (the
--prompt is `AR >'), and continues executing even after errors. If you
--redirect standard input to a script file, no prompts are issued, and
--`ar' abandons execution (with a nonzero exit code) on any error.
--
-- The `ar' command language is _not_ designed to be equivalent to the
--command-line options; in fact, it provides somewhat less control over
--archives. The only purpose of the command language is to ease the
--transition to GNU `ar' for developers who already have scripts written
--for the MRI "librarian" program.
--
-- The syntax for the `ar' command language is straightforward:
-- * commands are recognized in upper or lower case; for example, `LIST'
-- is the same as `list'. In the following descriptions, commands are
-- shown in upper case for clarity.
--
-- * a single command may appear on each line; it is the first word on
-- the line.
--
-- * empty lines are allowed, and have no effect.
--
-- * comments are allowed; text after either of the characters `*' or
-- `;' is ignored.
--
-- * Whenever you use a list of names as part of the argument to an `ar'
-- command, you can separate the individual names with either commas
-- or blanks. Commas are shown in the explanations below, for
-- clarity.
--
-- * `+' is used as a line continuation character; if `+' appears at
-- the end of a line, the text on the following line is considered
-- part of the current command.
--
-- Here are the commands you can use in `ar' scripts, or when using
--`ar' interactively. Three of them have special significance:
--
-- `OPEN' or `CREATE' specify a "current archive", which is a temporary
--file required for most of the other commands.
--
-- `SAVE' commits the changes so far specified by the script. Prior to
--`SAVE', commands affect only the temporary copy of the current archive.
--
--`ADDLIB ARCHIVE'
--`ADDLIB ARCHIVE (MODULE, MODULE, ... MODULE)'
-- Add all the contents of ARCHIVE (or, if specified, each named
-- MODULE from ARCHIVE) to the current archive.
--
-- Requires prior use of `OPEN' or `CREATE'.
--
--`ADDMOD MEMBER, MEMBER, ... MEMBER'
-- Add each named MEMBER as a module in the current archive.
--
-- Requires prior use of `OPEN' or `CREATE'.
--
--`CLEAR'
-- Discard the contents of the current archive, canceling the effect
-- of any operations since the last `SAVE'. May be executed (with no
-- effect) even if no current archive is specified.
--
--`CREATE ARCHIVE'
-- Creates an archive, and makes it the current archive (required for
-- many other commands). The new archive is created with a temporary
-- name; it is not actually saved as ARCHIVE until you use `SAVE'.
-- You can overwrite existing archives; similarly, the contents of any
-- existing file named ARCHIVE will not be destroyed until `SAVE'.
--
--`DELETE MODULE, MODULE, ... MODULE'
-- Delete each listed MODULE from the current archive; equivalent to
-- `ar -d ARCHIVE MODULE ... MODULE'.
--
-- Requires prior use of `OPEN' or `CREATE'.
--
--`DIRECTORY ARCHIVE (MODULE, ... MODULE)'
--`DIRECTORY ARCHIVE (MODULE, ... MODULE) OUTPUTFILE'
-- List each named MODULE present in ARCHIVE. The separate command
-- `VERBOSE' specifies the form of the output: when verbose output is
-- off, output is like that of `ar -t ARCHIVE MODULE...'. When
-- verbose output is on, the listing is like `ar -tv ARCHIVE
-- MODULE...'.
--
-- Output normally goes to the standard output stream; however, if you
-- specify OUTPUTFILE as a final argument, `ar' directs the output to
-- that file.
--
--`END'
-- Exit from `ar', with a `0' exit code to indicate successful
-- completion. This command does not save the output file; if you
-- have changed the current archive since the last `SAVE' command,
-- those changes are lost.
--
--`EXTRACT MODULE, MODULE, ... MODULE'
-- Extract each named MODULE from the current archive, writing them
-- into the current directory as separate files. Equivalent to `ar -x
-- ARCHIVE MODULE...'.
--
-- Requires prior use of `OPEN' or `CREATE'.
--
--`LIST'
-- Display full contents of the current archive, in "verbose" style
-- regardless of the state of `VERBOSE'. The effect is like `ar tv
-- ARCHIVE'. (This single command is a GNU `ar' enhancement, rather
-- than present for MRI compatibility.)
--
-- Requires prior use of `OPEN' or `CREATE'.
--
--`OPEN ARCHIVE'
-- Opens an existing archive for use as the current archive (required
-- for many other commands). Any changes as the result of subsequent
-- commands will not actually affect ARCHIVE until you next use
-- `SAVE'.
--
--`REPLACE MODULE, MODULE, ... MODULE'
-- In the current archive, replace each existing MODULE (named in the
-- `REPLACE' arguments) from files in the current working directory.
-- To execute this command without errors, both the file, and the
-- module in the current archive, must exist.
--
-- Requires prior use of `OPEN' or `CREATE'.
--
--`VERBOSE'
-- Toggle an internal flag governing the output from `DIRECTORY'.
-- When the flag is on, `DIRECTORY' output matches output from `ar
-- -tv '....
--
--`SAVE'
-- Commit your changes to the current archive, and actually save it
-- as a file with the name specified in the last `CREATE' or `OPEN'
-- command.
--
-- Requires prior use of `OPEN' or `CREATE'.
--
--
--
--File: binutils.info, Node: nm, Next: objcopy, Prev: ar, Up: Top
--
--2 nm
--****
--
-- nm [`-A'|`-o'|`--print-file-name'] [`-a'|`--debug-syms']
-- [`-B'|`--format=bsd'] [`-C'|`--demangle'[=STYLE]]
-- [`-D'|`--dynamic'] [`-f'FORMAT|`--format='FORMAT]
-- [`-g'|`--extern-only'] [`-h'|`--help']
-- [`-l'|`--line-numbers'] [`-n'|`-v'|`--numeric-sort']
-- [`-P'|`--portability'] [`-p'|`--no-sort']
-- [`-r'|`--reverse-sort'] [`-S'|`--print-size']
-- [`-s'|`--print-armap'] [`-t' RADIX|`--radix='RADIX]
-- [`-u'|`--undefined-only'] [`-V'|`--version']
-- [`-X 32_64'] [`--defined-only'] [`--no-demangle']
-- [`--plugin' NAME] [`--size-sort'] [`--special-syms']
-- [`--synthetic'] [`--target='BFDNAME]
-- [OBJFILE...]
--
-- GNU `nm' lists the symbols from object files OBJFILE.... If no
--object files are listed as arguments, `nm' assumes the file `a.out'.
--
-- For each symbol, `nm' shows:
--
-- * The symbol value, in the radix selected by options (see below), or
-- hexadecimal by default.
--
-- * The symbol type. At least the following types are used; others
-- are, as well, depending on the object file format. If lowercase,
-- the symbol is usually local; if uppercase, the symbol is global
-- (external). There are however a few lowercase symbols that are
-- shown for special global symbols (`u', `v' and `w').
--
-- `A'
-- The symbol's value is absolute, and will not be changed by
-- further linking.
--
-- `B'
-- `b'
-- The symbol is in the uninitialized data section (known as
-- BSS).
--
-- `C'
-- The symbol is common. Common symbols are uninitialized data.
-- When linking, multiple common symbols may appear with the
-- same name. If the symbol is defined anywhere, the common
-- symbols are treated as undefined references. For more
-- details on common symbols, see the discussion of -warn-common
-- in *Note Linker options: (ld.info)Options.
--
-- `D'
-- `d'
-- The symbol is in the initialized data section.
--
-- `G'
-- `g'
-- The symbol is in an initialized data section for small
-- objects. Some object file formats permit more efficient
-- access to small data objects, such as a global int variable
-- as opposed to a large global array.
--
-- `i'
-- For PE format files this indicates that the symbol is in a
-- section specific to the implementation of DLLs. For ELF
-- format files this indicates that the symbol is an indirect
-- function. This is a GNU extension to the standard set of ELF
-- symbol types. It indicates a symbol which if referenced by a
-- relocation does not evaluate to its address, but instead must
-- be invoked at runtime. The runtime execution will then
-- return the value to be used in the relocation.
--
-- `I'
-- The symbol is an indirect reference to another symbol.
--
-- `N'
-- The symbol is a debugging symbol.
--
-- `p'
-- The symbols is in a stack unwind section.
--
-- `R'
-- `r'
-- The symbol is in a read only data section.
--
-- `S'
-- `s'
-- The symbol is in an uninitialized data section for small
-- objects.
--
-- `T'
-- `t'
-- The symbol is in the text (code) section.
--
-- `U'
-- The symbol is undefined.
--
-- `u'
-- The symbol is a unique global symbol. This is a GNU
-- extension to the standard set of ELF symbol bindings. For
-- such a symbol the dynamic linker will make sure that in the
-- entire process there is just one symbol with this name and
-- type in use.
--
-- `V'
-- `v'
-- The symbol is a weak object. When a weak defined symbol is
-- linked with a normal defined symbol, the normal defined
-- symbol is used with no error. When a weak undefined symbol
-- is linked and the symbol is not defined, the value of the
-- weak symbol becomes zero with no error. On some systems,
-- uppercase indicates that a default value has been specified.
--
-- `W'
-- `w'
-- The symbol is a weak symbol that has not been specifically
-- tagged as a weak object symbol. When a weak defined symbol
-- is linked with a normal defined symbol, the normal defined
-- symbol is used with no error. When a weak undefined symbol
-- is linked and the symbol is not defined, the value of the
-- symbol is determined in a system-specific manner without
-- error. On some systems, uppercase indicates that a default
-- value has been specified.
--
-- `-'
-- The symbol is a stabs symbol in an a.out object file. In
-- this case, the next values printed are the stabs other field,
-- the stabs desc field, and the stab type. Stabs symbols are
-- used to hold debugging information.
--
-- `?'
-- The symbol type is unknown, or object file format specific.
--
-- * The symbol name.
--
-- The long and short forms of options, shown here as alternatives, are
--equivalent.
--
--`-A'
--`-o'
--`--print-file-name'
-- Precede each symbol by the name of the input file (or archive
-- member) in which it was found, rather than identifying the input
-- file once only, before all of its symbols.
--
--`-a'
--`--debug-syms'
-- Display all symbols, even debugger-only symbols; normally these
-- are not listed.
--
--`-B'
-- The same as `--format=bsd' (for compatibility with the MIPS `nm').
--
--`-C'
--`--demangle[=STYLE]'
-- Decode ("demangle") low-level symbol names into user-level names.
-- Besides removing any initial underscore prepended by the system,
-- this makes C++ function names readable. Different compilers have
-- different mangling styles. The optional demangling style argument
-- can be used to choose an appropriate demangling style for your
-- compiler. *Note c++filt::, for more information on demangling.
--
--`--no-demangle'
-- Do not demangle low-level symbol names. This is the default.
--
--`-D'
--`--dynamic'
-- Display the dynamic symbols rather than the normal symbols. This
-- is only meaningful for dynamic objects, such as certain types of
-- shared libraries.
--
--`-f FORMAT'
--`--format=FORMAT'
-- Use the output format FORMAT, which can be `bsd', `sysv', or
-- `posix'. The default is `bsd'. Only the first character of
-- FORMAT is significant; it can be either upper or lower case.
--
--`-g'
--`--extern-only'
-- Display only external symbols.
--
--`-h'
--`--help'
-- Show a summary of the options to `nm' and exit.
--
--`-l'
--`--line-numbers'
-- For each symbol, use debugging information to try to find a
-- filename and line number. For a defined symbol, look for the line
-- number of the address of the symbol. For an undefined symbol,
-- look for the line number of a relocation entry which refers to the
-- symbol. If line number information can be found, print it after
-- the other symbol information.
--
--`-n'
--`-v'
--`--numeric-sort'
-- Sort symbols numerically by their addresses, rather than
-- alphabetically by their names.
--
--`-p'
--`--no-sort'
-- Do not bother to sort the symbols in any order; print them in the
-- order encountered.
--
--`-P'
--`--portability'
-- Use the POSIX.2 standard output format instead of the default
-- format. Equivalent to `-f posix'.
--
--`-r'
--`--reverse-sort'
-- Reverse the order of the sort (whether numeric or alphabetic); let
-- the last come first.
--
--`-S'
--`--print-size'
-- Print both value and size of defined symbols for the `bsd' output
-- style. This option has no effect for object formats that do not
-- record symbol sizes, unless `--size-sort' is also used in which
-- case a calculated size is displayed.
--
--`-s'
--`--print-armap'
-- When listing symbols from archive members, include the index: a
-- mapping (stored in the archive by `ar' or `ranlib') of which
-- modules contain definitions for which names.
--
--`-t RADIX'
--`--radix=RADIX'
-- Use RADIX as the radix for printing the symbol values. It must be
-- `d' for decimal, `o' for octal, or `x' for hexadecimal.
--
--`-u'
--`--undefined-only'
-- Display only undefined symbols (those external to each object
-- file).
--
--`-V'
--`--version'
-- Show the version number of `nm' and exit.
--
--`-X'
-- This option is ignored for compatibility with the AIX version of
-- `nm'. It takes one parameter which must be the string `32_64'.
-- The default mode of AIX `nm' corresponds to `-X 32', which is not
-- supported by GNU `nm'.
--
--`--defined-only'
-- Display only defined symbols for each object file.
--
--`--plugin NAME'
-- Load the plugin called NAME to add support for extra target types.
-- This option is only available if the toolchain has been built
-- with plugin support enabled.
--
--`--size-sort'
-- Sort symbols by size. The size is computed as the difference
-- between the value of the symbol and the value of the symbol with
-- the next higher value. If the `bsd' output format is used the
-- size of the symbol is printed, rather than the value, and `-S'
-- must be used in order both size and value to be printed.
--
--`--special-syms'
-- Display symbols which have a target-specific special meaning.
-- These symbols are usually used by the target for some special
-- processing and are not normally helpful when included in the
-- normal symbol lists. For example for ARM targets this option
-- would skip the mapping symbols used to mark transitions between
-- ARM code, THUMB code and data.
--
--`--synthetic'
-- Include synthetic symbols in the output. These are special symbols
-- created by the linker for various purposes. They are not shown by
-- default since they are not part of the binary's original source
-- code.
--
--`--target=BFDNAME'
-- Specify an object code format other than your system's default
-- format. *Note Target Selection::, for more information.
--
--
--
--File: binutils.info, Node: objcopy, Next: objdump, Prev: nm, Up: Top
--
--3 objcopy
--*********
--
-- objcopy [`-F' BFDNAME|`--target='BFDNAME]
-- [`-I' BFDNAME|`--input-target='BFDNAME]
-- [`-O' BFDNAME|`--output-target='BFDNAME]
-- [`-B' BFDARCH|`--binary-architecture='BFDARCH]
-- [`-S'|`--strip-all']
-- [`-g'|`--strip-debug']
-- [`-K' SYMBOLNAME|`--keep-symbol='SYMBOLNAME]
-- [`-N' SYMBOLNAME|`--strip-symbol='SYMBOLNAME]
-- [`--strip-unneeded-symbol='SYMBOLNAME]
-- [`-G' SYMBOLNAME|`--keep-global-symbol='SYMBOLNAME]
-- [`--localize-hidden']
-- [`-L' SYMBOLNAME|`--localize-symbol='SYMBOLNAME]
-- [`--globalize-symbol='SYMBOLNAME]
-- [`-W' SYMBOLNAME|`--weaken-symbol='SYMBOLNAME]
-- [`-w'|`--wildcard']
-- [`-x'|`--discard-all']
-- [`-X'|`--discard-locals']
-- [`-b' BYTE|`--byte='BYTE]
-- [`-i' [BREADTH]|`--interleave'[=BREADTH]]
-- [`--interleave-width='WIDTH]
-- [`-j' SECTIONPATTERN|`--only-section='SECTIONPATTERN]
-- [`-R' SECTIONPATTERN|`--remove-section='SECTIONPATTERN]
-- [`-p'|`--preserve-dates']
-- [`-D'|`--enable-deterministic-archives']
-- [`-U'|`--disable-deterministic-archives']
-- [`--debugging']
-- [`--gap-fill='VAL]
-- [`--pad-to='ADDRESS]
-- [`--set-start='VAL]
-- [`--adjust-start='INCR]
-- [`--change-addresses='INCR]
-- [`--change-section-address' SECTIONPATTERN{=,+,-}VAL]
-- [`--change-section-lma' SECTIONPATTERN{=,+,-}VAL]
-- [`--change-section-vma' SECTIONPATTERN{=,+,-}VAL]
-- [`--change-warnings'] [`--no-change-warnings']
-- [`--set-section-flags' SECTIONPATTERN=FLAGS]
-- [`--add-section' SECTIONNAME=FILENAME]
-- [`--rename-section' OLDNAME=NEWNAME[,FLAGS]]
-- [`--long-section-names' {enable,disable,keep}]
-- [`--change-leading-char'] [`--remove-leading-char']
-- [`--reverse-bytes='NUM]
-- [`--srec-len='IVAL] [`--srec-forceS3']
-- [`--redefine-sym' OLD=NEW]
-- [`--redefine-syms='FILENAME]
-- [`--weaken']
-- [`--keep-symbols='FILENAME]
-- [`--strip-symbols='FILENAME]
-- [`--strip-unneeded-symbols='FILENAME]
-- [`--keep-global-symbols='FILENAME]
-- [`--localize-symbols='FILENAME]
-- [`--globalize-symbols='FILENAME]
-- [`--weaken-symbols='FILENAME]
-- [`--alt-machine-code='INDEX]
-- [`--prefix-symbols='STRING]
-- [`--prefix-sections='STRING]
-- [`--prefix-alloc-sections='STRING]
-- [`--add-gnu-debuglink='PATH-TO-FILE]
-- [`--keep-file-symbols']
-- [`--only-keep-debug']
-- [`--strip-dwo']
-- [`--extract-dwo']
-- [`--extract-symbol']
-- [`--writable-text']
-- [`--readonly-text']
-- [`--pure']
-- [`--impure']
-- [`--file-alignment='NUM]
-- [`--heap='SIZE]
-- [`--image-base='ADDRESS]
-- [`--section-alignment='NUM]
-- [`--stack='SIZE]
-- [`--subsystem='WHICH:MAJOR.MINOR]
-- [`--compress-debug-sections']
-- [`--decompress-debug-sections']
-- [`--dwarf-depth=N']
-- [`--dwarf-start=N']
-- [`-v'|`--verbose']
-- [`-V'|`--version']
-- [`--help'] [`--info']
-- INFILE [OUTFILE]
--
-- The GNU `objcopy' utility copies the contents of an object file to
--another. `objcopy' uses the GNU BFD Library to read and write the
--object files. It can write the destination object file in a format
--different from that of the source object file. The exact behavior of
--`objcopy' is controlled by command-line options. Note that `objcopy'
--should be able to copy a fully linked file between any two formats.
--However, copying a relocatable object file between any two formats may
--not work as expected.
--
-- `objcopy' creates temporary files to do its translations and deletes
--them afterward. `objcopy' uses BFD to do all its translation work; it
--has access to all the formats described in BFD and thus is able to
--recognize most formats without being told explicitly. *Note BFD:
--(ld.info)BFD.
--
-- `objcopy' can be used to generate S-records by using an output
--target of `srec' (e.g., use `-O srec').
--
-- `objcopy' can be used to generate a raw binary file by using an
--output target of `binary' (e.g., use `-O binary'). When `objcopy'
--generates a raw binary file, it will essentially produce a memory dump
--of the contents of the input object file. All symbols and relocation
--information will be discarded. The memory dump will start at the load
--address of the lowest section copied into the output file.
--
-- When generating an S-record or a raw binary file, it may be helpful
--to use `-S' to remove sections containing debugging information. In
--some cases `-R' will be useful to remove sections which contain
--information that is not needed by the binary file.
--
-- Note--`objcopy' is not able to change the endianness of its input
--files. If the input format has an endianness (some formats do not),
--`objcopy' can only copy the inputs into file formats that have the same
--endianness or which have no endianness (e.g., `srec'). (However, see
--the `--reverse-bytes' option.)
--
--`INFILE'
--`OUTFILE'
-- The input and output files, respectively. If you do not specify
-- OUTFILE, `objcopy' creates a temporary file and destructively
-- renames the result with the name of INFILE.
--
--`-I BFDNAME'
--`--input-target=BFDNAME'
-- Consider the source file's object format to be BFDNAME, rather than
-- attempting to deduce it. *Note Target Selection::, for more
-- information.
--
--`-O BFDNAME'
--`--output-target=BFDNAME'
-- Write the output file using the object format BFDNAME. *Note
-- Target Selection::, for more information.
--
--`-F BFDNAME'
--`--target=BFDNAME'
-- Use BFDNAME as the object format for both the input and the output
-- file; i.e., simply transfer data from source to destination with no
-- translation. *Note Target Selection::, for more information.
--
--`-B BFDARCH'
--`--binary-architecture=BFDARCH'
-- Useful when transforming a architecture-less input file into an
-- object file. In this case the output architecture can be set to
-- BFDARCH. This option will be ignored if the input file has a
-- known BFDARCH. You can access this binary data inside a program
-- by referencing the special symbols that are created by the
-- conversion process. These symbols are called
-- _binary_OBJFILE_start, _binary_OBJFILE_end and
-- _binary_OBJFILE_size. e.g. you can transform a picture file into
-- an object file and then access it in your code using these symbols.
--
--`-j SECTIONPATTERN'
--`--only-section=SECTIONPATTERN'
-- Copy only the indicated sections from the input file to the output
-- file. This option may be given more than once. Note that using
-- this option inappropriately may make the output file unusable.
-- Wildcard characters are accepted in SECTIONPATTERN.
--
--`-R SECTIONPATTERN'
--`--remove-section=SECTIONPATTERN'
-- Remove any section matching SECTIONPATTERN from the output file.
-- This option may be given more than once. Note that using this
-- option inappropriately may make the output file unusable. Wildcard
-- characters are accepted in SECTIONPATTERN. Using both the `-j'
-- and `-R' options together results in undefined behaviour.
--
--`-S'
--`--strip-all'
-- Do not copy relocation and symbol information from the source file.
--
--`-g'
--`--strip-debug'
-- Do not copy debugging symbols or sections from the source file.
--
--`--strip-unneeded'
-- Strip all symbols that are not needed for relocation processing.
--
--`-K SYMBOLNAME'
--`--keep-symbol=SYMBOLNAME'
-- When stripping symbols, keep symbol SYMBOLNAME even if it would
-- normally be stripped. This option may be given more than once.
--
--`-N SYMBOLNAME'
--`--strip-symbol=SYMBOLNAME'
-- Do not copy symbol SYMBOLNAME from the source file. This option
-- may be given more than once.
--
--`--strip-unneeded-symbol=SYMBOLNAME'
-- Do not copy symbol SYMBOLNAME from the source file unless it is
-- needed by a relocation. This option may be given more than once.
--
--`-G SYMBOLNAME'
--`--keep-global-symbol=SYMBOLNAME'
-- Keep only symbol SYMBOLNAME global. Make all other symbols local
-- to the file, so that they are not visible externally. This option
-- may be given more than once.
--
--`--localize-hidden'
-- In an ELF object, mark all symbols that have hidden or internal
-- visibility as local. This option applies on top of
-- symbol-specific localization options such as `-L'.
--
--`-L SYMBOLNAME'
--`--localize-symbol=SYMBOLNAME'
-- Make symbol SYMBOLNAME local to the file, so that it is not
-- visible externally. This option may be given more than once.
--
--`-W SYMBOLNAME'
--`--weaken-symbol=SYMBOLNAME'
-- Make symbol SYMBOLNAME weak. This option may be given more than
-- once.
--
--`--globalize-symbol=SYMBOLNAME'
-- Give symbol SYMBOLNAME global scoping so that it is visible
-- outside of the file in which it is defined. This option may be
-- given more than once.
--
--`-w'
--`--wildcard'
-- Permit regular expressions in SYMBOLNAMEs used in other command
-- line options. The question mark (?), asterisk (*), backslash (\)
-- and square brackets ([]) operators can be used anywhere in the
-- symbol name. If the first character of the symbol name is the
-- exclamation point (!) then the sense of the switch is reversed for
-- that symbol. For example:
--
-- -w -W !foo -W fo*
--
-- would cause objcopy to weaken all symbols that start with "fo"
-- except for the symbol "foo".
--
--`-x'
--`--discard-all'
-- Do not copy non-global symbols from the source file.
--
--`-X'
--`--discard-locals'
-- Do not copy compiler-generated local symbols. (These usually
-- start with `L' or `.'.)
--
--`-b BYTE'
--`--byte=BYTE'
-- If interleaving has been enabled via the `--interleave' option
-- then start the range of bytes to keep at the BYTEth byte. BYTE
-- can be in the range from 0 to BREADTH-1, where BREADTH is the
-- value given by the `--interleave' option.
--
--`-i [BREADTH]'
--`--interleave[=BREADTH]'
-- Only copy a range out of every BREADTH bytes. (Header data is not
-- affected). Select which byte in the range begins the copy with
-- the `--byte' option. Select the width of the range with the
-- `--interleave-width' option.
--
-- This option is useful for creating files to program ROM. It is
-- typically used with an `srec' output target. Note that `objcopy'
-- will complain if you do not specify the `--byte' option as well.
--
-- The default interleave breadth is 4, so with `--byte' set to 0,
-- `objcopy' would copy the first byte out of every four bytes from
-- the input to the output.
--
--`--interleave-width=WIDTH'
-- When used with the `--interleave' option, copy WIDTH bytes at a
-- time. The start of the range of bytes to be copied is set by the
-- `--byte' option, and the extent of the range is set with the
-- `--interleave' option.
--
-- The default value for this option is 1. The value of WIDTH plus
-- the BYTE value set by the `--byte' option must not exceed the
-- interleave breadth set by the `--interleave' option.
--
-- This option can be used to create images for two 16-bit flashes
-- interleaved in a 32-bit bus by passing `-b 0 -i 4
-- --interleave-width=2' and `-b 2 -i 4 --interleave-width=2' to two
-- `objcopy' commands. If the input was '12345678' then the outputs
-- would be '1256' and '3478' respectively.
--
--`-p'
--`--preserve-dates'
-- Set the access and modification dates of the output file to be the
-- same as those of the input file.
--
--`-D'
--`--enable-deterministic-archives'
-- Operate in _deterministic_ mode. When copying archive members and
-- writing the archive index, use zero for UIDs, GIDs, timestamps,
-- and use consistent file modes for all files.
--
-- If `binutils' was configured with
-- `--enable-deterministic-archives', then this mode is on by default.
-- It can be disabled with the `-U' option, below.
--
--`-U'
--`--disable-deterministic-archives'
-- Do _not_ operate in _deterministic_ mode. This is the inverse of
-- the `-D' option, above: when copying archive members and writing
-- the archive index, use their actual UID, GID, timestamp, and file
-- mode values.
--
-- This is the default unless `binutils' was configured with
-- `--enable-deterministic-archives'.
--
--`--debugging'
-- Convert debugging information, if possible. This is not the
-- default because only certain debugging formats are supported, and
-- the conversion process can be time consuming.
--
--`--gap-fill VAL'
-- Fill gaps between sections with VAL. This operation applies to
-- the _load address_ (LMA) of the sections. It is done by increasing
-- the size of the section with the lower address, and filling in the
-- extra space created with VAL.
--
--`--pad-to ADDRESS'
-- Pad the output file up to the load address ADDRESS. This is done
-- by increasing the size of the last section. The extra space is
-- filled in with the value specified by `--gap-fill' (default zero).
--
--`--set-start VAL'
-- Set the start address of the new file to VAL. Not all object file
-- formats support setting the start address.
--
--`--change-start INCR'
--`--adjust-start INCR'
-- Change the start address by adding INCR. Not all object file
-- formats support setting the start address.
--
--`--change-addresses INCR'
--`--adjust-vma INCR'
-- Change the VMA and LMA addresses of all sections, as well as the
-- start address, by adding INCR. Some object file formats do not
-- permit section addresses to be changed arbitrarily. Note that
-- this does not relocate the sections; if the program expects
-- sections to be loaded at a certain address, and this option is
-- used to change the sections such that they are loaded at a
-- different address, the program may fail.
--
--`--change-section-address SECTIONPATTERN{=,+,-}VAL'
--`--adjust-section-vma SECTIONPATTERN{=,+,-}VAL'
-- Set or change both the VMA address and the LMA address of any
-- section matching SECTIONPATTERN. If `=' is used, the section
-- address is set to VAL. Otherwise, VAL is added to or subtracted
-- from the section address. See the comments under
-- `--change-addresses', above. If SECTIONPATTERN does not match any
-- sections in the input file, a warning will be issued, unless
-- `--no-change-warnings' is used.
--
--`--change-section-lma SECTIONPATTERN{=,+,-}VAL'
-- Set or change the LMA address of any sections matching
-- SECTIONPATTERN. The LMA address is the address where the section
-- will be loaded into memory at program load time. Normally this is
-- the same as the VMA address, which is the address of the section
-- at program run time, but on some systems, especially those where a
-- program is held in ROM, the two can be different. If `=' is used,
-- the section address is set to VAL. Otherwise, VAL is added to or
-- subtracted from the section address. See the comments under
-- `--change-addresses', above. If SECTIONPATTERN does not match any
-- sections in the input file, a warning will be issued, unless
-- `--no-change-warnings' is used.
--
--`--change-section-vma SECTIONPATTERN{=,+,-}VAL'
-- Set or change the VMA address of any section matching
-- SECTIONPATTERN. The VMA address is the address where the section
-- will be located once the program has started executing. Normally
-- this is the same as the LMA address, which is the address where
-- the section will be loaded into memory, but on some systems,
-- especially those where a program is held in ROM, the two can be
-- different. If `=' is used, the section address is set to VAL.
-- Otherwise, VAL is added to or subtracted from the section address.
-- See the comments under `--change-addresses', above. If
-- SECTIONPATTERN does not match any sections in the input file, a
-- warning will be issued, unless `--no-change-warnings' is used.
--
--`--change-warnings'
--`--adjust-warnings'
-- If `--change-section-address' or `--change-section-lma' or
-- `--change-section-vma' is used, and the section pattern does not
-- match any sections, issue a warning. This is the default.
--
--`--no-change-warnings'
--`--no-adjust-warnings'
-- Do not issue a warning if `--change-section-address' or
-- `--adjust-section-lma' or `--adjust-section-vma' is used, even if
-- the section pattern does not match any sections.
--
--`--set-section-flags SECTIONPATTERN=FLAGS'
-- Set the flags for any sections matching SECTIONPATTERN. The FLAGS
-- argument is a comma separated string of flag names. The
-- recognized names are `alloc', `contents', `load', `noload',
-- `readonly', `code', `data', `rom', `share', and `debug'. You can
-- set the `contents' flag for a section which does not have
-- contents, but it is not meaningful to clear the `contents' flag of
-- a section which does have contents-just remove the section
-- instead. Not all flags are meaningful for all object file formats.
--
--`--add-section SECTIONNAME=FILENAME'
-- Add a new section named SECTIONNAME while copying the file. The
-- contents of the new section are taken from the file FILENAME. The
-- size of the section will be the size of the file. This option only
-- works on file formats which can support sections with arbitrary
-- names.
--
--`--rename-section OLDNAME=NEWNAME[,FLAGS]'
-- Rename a section from OLDNAME to NEWNAME, optionally changing the
-- section's flags to FLAGS in the process. This has the advantage
-- over usng a linker script to perform the rename in that the output
-- stays as an object file and does not become a linked executable.
--
-- This option is particularly helpful when the input format is
-- binary, since this will always create a section called .data. If
-- for example, you wanted instead to create a section called .rodata
-- containing binary data you could use the following command line to
-- achieve it:
--
-- objcopy -I binary -O <output_format> -B <architecture> \
-- --rename-section .data=.rodata,alloc,load,readonly,data,contents \
-- <input_binary_file> <output_object_file>
--
--`--long-section-names {enable,disable,keep}'
-- Controls the handling of long section names when processing `COFF'
-- and `PE-COFF' object formats. The default behaviour, `keep', is
-- to preserve long section names if any are present in the input
-- file. The `enable' and `disable' options forcibly enable or
-- disable the use of long section names in the output object; when
-- `disable' is in effect, any long section names in the input object
-- will be truncated. The `enable' option will only emit long
-- section names if any are present in the inputs; this is mostly the
-- same as `keep', but it is left undefined whether the `enable'
-- option might force the creation of an empty string table in the
-- output file.
--
--`--change-leading-char'
-- Some object file formats use special characters at the start of
-- symbols. The most common such character is underscore, which
-- compilers often add before every symbol. This option tells
-- `objcopy' to change the leading character of every symbol when it
-- converts between object file formats. If the object file formats
-- use the same leading character, this option has no effect.
-- Otherwise, it will add a character, or remove a character, or
-- change a character, as appropriate.
--
--`--remove-leading-char'
-- If the first character of a global symbol is a special symbol
-- leading character used by the object file format, remove the
-- character. The most common symbol leading character is
-- underscore. This option will remove a leading underscore from all
-- global symbols. This can be useful if you want to link together
-- objects of different file formats with different conventions for
-- symbol names. This is different from `--change-leading-char'
-- because it always changes the symbol name when appropriate,
-- regardless of the object file format of the output file.
--
--`--reverse-bytes=NUM'
-- Reverse the bytes in a section with output contents. A section
-- length must be evenly divisible by the value given in order for
-- the swap to be able to take place. Reversing takes place before
-- the interleaving is performed.
--
-- This option is used typically in generating ROM images for
-- problematic target systems. For example, on some target boards,
-- the 32-bit words fetched from 8-bit ROMs are re-assembled in
-- little-endian byte order regardless of the CPU byte order.
-- Depending on the programming model, the endianness of the ROM may
-- need to be modified.
--
-- Consider a simple file with a section containing the following
-- eight bytes: `12345678'.
--
-- Using `--reverse-bytes=2' for the above example, the bytes in the
-- output file would be ordered `21436587'.
--
-- Using `--reverse-bytes=4' for the above example, the bytes in the
-- output file would be ordered `43218765'.
--
-- By using `--reverse-bytes=2' for the above example, followed by
-- `--reverse-bytes=4' on the output file, the bytes in the second
-- output file would be ordered `34127856'.
--
--`--srec-len=IVAL'
-- Meaningful only for srec output. Set the maximum length of the
-- Srecords being produced to IVAL. This length covers both address,
-- data and crc fields.
--
--`--srec-forceS3'
-- Meaningful only for srec output. Avoid generation of S1/S2
-- records, creating S3-only record format.
--
--`--redefine-sym OLD=NEW'
-- Change the name of a symbol OLD, to NEW. This can be useful when
-- one is trying link two things together for which you have no
-- source, and there are name collisions.
--
--`--redefine-syms=FILENAME'
-- Apply `--redefine-sym' to each symbol pair "OLD NEW" listed in the
-- file FILENAME. FILENAME is simply a flat file, with one symbol
-- pair per line. Line comments may be introduced by the hash
-- character. This option may be given more than once.
--
--`--weaken'
-- Change all global symbols in the file to be weak. This can be
-- useful when building an object which will be linked against other
-- objects using the `-R' option to the linker. This option is only
-- effective when using an object file format which supports weak
-- symbols.
--
--`--keep-symbols=FILENAME'
-- Apply `--keep-symbol' option to each symbol listed in the file
-- FILENAME. FILENAME is simply a flat file, with one symbol name
-- per line. Line comments may be introduced by the hash character.
-- This option may be given more than once.
--
--`--strip-symbols=FILENAME'
-- Apply `--strip-symbol' option to each symbol listed in the file
-- FILENAME. FILENAME is simply a flat file, with one symbol name
-- per line. Line comments may be introduced by the hash character.
-- This option may be given more than once.
--
--`--strip-unneeded-symbols=FILENAME'
-- Apply `--strip-unneeded-symbol' option to each symbol listed in
-- the file FILENAME. FILENAME is simply a flat file, with one
-- symbol name per line. Line comments may be introduced by the hash
-- character. This option may be given more than once.
--
--`--keep-global-symbols=FILENAME'
-- Apply `--keep-global-symbol' option to each symbol listed in the
-- file FILENAME. FILENAME is simply a flat file, with one symbol
-- name per line. Line comments may be introduced by the hash
-- character. This option may be given more than once.
--
--`--localize-symbols=FILENAME'
-- Apply `--localize-symbol' option to each symbol listed in the file
-- FILENAME. FILENAME is simply a flat file, with one symbol name
-- per line. Line comments may be introduced by the hash character.
-- This option may be given more than once.
--
--`--globalize-symbols=FILENAME'
-- Apply `--globalize-symbol' option to each symbol listed in the file
-- FILENAME. FILENAME is simply a flat file, with one symbol name
-- per line. Line comments may be introduced by the hash character.
-- This option may be given more than once.
--
--`--weaken-symbols=FILENAME'
-- Apply `--weaken-symbol' option to each symbol listed in the file
-- FILENAME. FILENAME is simply a flat file, with one symbol name
-- per line. Line comments may be introduced by the hash character.
-- This option may be given more than once.
--
--`--alt-machine-code=INDEX'
-- If the output architecture has alternate machine codes, use the
-- INDEXth code instead of the default one. This is useful in case a
-- machine is assigned an official code and the tool-chain adopts the
-- new code, but other applications still depend on the original code
-- being used. For ELF based architectures if the INDEX alternative
-- does not exist then the value is treated as an absolute number to
-- be stored in the e_machine field of the ELF header.
--
--`--writable-text'
-- Mark the output text as writable. This option isn't meaningful
-- for all object file formats.
--
--`--readonly-text'
-- Make the output text write protected. This option isn't
-- meaningful for all object file formats.
--
--`--pure'
-- Mark the output file as demand paged. This option isn't
-- meaningful for all object file formats.
--
--`--impure'
-- Mark the output file as impure. This option isn't meaningful for
-- all object file formats.
--
--`--prefix-symbols=STRING'
-- Prefix all symbols in the output file with STRING.
--
--`--prefix-sections=STRING'
-- Prefix all section names in the output file with STRING.
--
--`--prefix-alloc-sections=STRING'
-- Prefix all the names of all allocated sections in the output file
-- with STRING.
--
--`--add-gnu-debuglink=PATH-TO-FILE'
-- Creates a .gnu_debuglink section which contains a reference to
-- PATH-TO-FILE and adds it to the output file.
--
--`--keep-file-symbols'
-- When stripping a file, perhaps with `--strip-debug' or
-- `--strip-unneeded', retain any symbols specifying source file
-- names, which would otherwise get stripped.
--
--`--only-keep-debug'
-- Strip a file, removing contents of any sections that would not be
-- stripped by `--strip-debug' and leaving the debugging sections
-- intact. In ELF files, this preserves all note sections in the
-- output.
--
-- The intention is that this option will be used in conjunction with
-- `--add-gnu-debuglink' to create a two part executable. One a
-- stripped binary which will occupy less space in RAM and in a
-- distribution and the second a debugging information file which is
-- only needed if debugging abilities are required. The suggested
-- procedure to create these files is as follows:
--
-- 1. Link the executable as normal. Assuming that is is called
-- `foo' then...
--
-- 2. Run `objcopy --only-keep-debug foo foo.dbg' to create a file
-- containing the debugging info.
--
-- 3. Run `objcopy --strip-debug foo' to create a stripped
-- executable.
--
-- 4. Run `objcopy --add-gnu-debuglink=foo.dbg foo' to add a link
-- to the debugging info into the stripped executable.
--
-- Note--the choice of `.dbg' as an extension for the debug info file
-- is arbitrary. Also the `--only-keep-debug' step is optional. You
-- could instead do this:
--
-- 1. Link the executable as normal.
--
-- 2. Copy `foo' to `foo.full'
--
-- 3. Run `objcopy --strip-debug foo'
--
-- 4. Run `objcopy --add-gnu-debuglink=foo.full foo'
--
-- i.e., the file pointed to by the `--add-gnu-debuglink' can be the
-- full executable. It does not have to be a file created by the
-- `--only-keep-debug' switch.
--
-- Note--this switch is only intended for use on fully linked files.
-- It does not make sense to use it on object files where the
-- debugging information may be incomplete. Besides the
-- gnu_debuglink feature currently only supports the presence of one
-- filename containing debugging information, not multiple filenames
-- on a one-per-object-file basis.
--
--`--strip-dwo'
-- Remove the contents of all DWARF .dwo sections, leaving the
-- remaining debugging sections and all symbols intact. This option
-- is intended for use by the compiler as part of the `-gsplit-dwarf'
-- option, which splits debug information between the .o file and a
-- separate .dwo file. The compiler generates all debug information
-- in the same file, then uses the `--extract-dwo' option to copy the
-- .dwo sections to the .dwo file, then the `--strip-dwo' option to
-- remove those sections from the original .o file.
--
--`--extract-dwo'
-- Extract the contents of all DWARF .dwo sections. See the
-- `--strip-dwo' option for more information.
--
--`--file-alignment NUM'
-- Specify the file alignment. Sections in the file will always
-- begin at file offsets which are multiples of this number. This
-- defaults to 512. [This option is specific to PE targets.]
--
--`--heap RESERVE'
--`--heap RESERVE,COMMIT'
-- Specify the number of bytes of memory to reserve (and optionally
-- commit) to be used as heap for this program. [This option is
-- specific to PE targets.]
--
--`--image-base VALUE'
-- Use VALUE as the base address of your program or dll. This is the
-- lowest memory location that will be used when your program or dll
-- is loaded. To reduce the need to relocate and improve performance
-- of your dlls, each should have a unique base address and not
-- overlap any other dlls. The default is 0x400000 for executables,
-- and 0x10000000 for dlls. [This option is specific to PE targets.]
--
--`--section-alignment NUM'
-- Sets the section alignment. Sections in memory will always begin
-- at addresses which are a multiple of this number. Defaults to
-- 0x1000. [This option is specific to PE targets.]
--
--`--stack RESERVE'
--`--stack RESERVE,COMMIT'
-- Specify the number of bytes of memory to reserve (and optionally
-- commit) to be used as stack for this program. [This option is
-- specific to PE targets.]
--
--`--subsystem WHICH'
--`--subsystem WHICH:MAJOR'
--`--subsystem WHICH:MAJOR.MINOR'
-- Specifies the subsystem under which your program will execute. The
-- legal values for WHICH are `native', `windows', `console',
-- `posix', `efi-app', `efi-bsd', `efi-rtd', `sal-rtd', and `xbox'.
-- You may optionally set the subsystem version also. Numeric values
-- are also accepted for WHICH. [This option is specific to PE
-- targets.]
--
--`--extract-symbol'
-- Keep the file's section flags and symbols but remove all section
-- data. Specifically, the option:
--
-- * removes the contents of all sections;
--
-- * sets the size of every section to zero; and
--
-- * sets the file's start address to zero.
--
-- This option is used to build a `.sym' file for a VxWorks kernel.
-- It can also be a useful way of reducing the size of a
-- `--just-symbols' linker input file.
--
--`--compress-debug-sections'
-- Compress DWARF debug sections using zlib.
--
--`--decompress-debug-sections'
-- Decompress DWARF debug sections using zlib.
--
--`-V'
--`--version'
-- Show the version number of `objcopy'.
--
--`-v'
--`--verbose'
-- Verbose output: list all object files modified. In the case of
-- archives, `objcopy -V' lists all members of the archive.
--
--`--help'
-- Show a summary of the options to `objcopy'.
--
--`--info'
-- Display a list showing all architectures and object formats
-- available.
--
--
--File: binutils.info, Node: objdump, Next: ranlib, Prev: objcopy, Up: Top
--
--4 objdump
--*********
--
-- objdump [`-a'|`--archive-headers']
-- [`-b' BFDNAME|`--target=BFDNAME']
-- [`-C'|`--demangle'[=STYLE] ]
-- [`-d'|`--disassemble']
-- [`-D'|`--disassemble-all']
-- [`-z'|`--disassemble-zeroes']
-- [`-EB'|`-EL'|`--endian='{big | little }]
-- [`-f'|`--file-headers']
-- [`-F'|`--file-offsets']
-- [`--file-start-context']
-- [`-g'|`--debugging']
-- [`-e'|`--debugging-tags']
-- [`-h'|`--section-headers'|`--headers']
-- [`-i'|`--info']
-- [`-j' SECTION|`--section='SECTION]
-- [`-l'|`--line-numbers']
-- [`-S'|`--source']
-- [`-m' MACHINE|`--architecture='MACHINE]
-- [`-M' OPTIONS|`--disassembler-options='OPTIONS]
-- [`-p'|`--private-headers']
-- [`-P' OPTIONS|`--private='OPTIONS]
-- [`-r'|`--reloc']
-- [`-R'|`--dynamic-reloc']
-- [`-s'|`--full-contents']
-- [`-W[lLiaprmfFsoRt]'|
-- `--dwarf'[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]]
-- [`-G'|`--stabs']
-- [`-t'|`--syms']
-- [`-T'|`--dynamic-syms']
-- [`-x'|`--all-headers']
-- [`-w'|`--wide']
-- [`--start-address='ADDRESS]
-- [`--stop-address='ADDRESS]
-- [`--prefix-addresses']
-- [`--[no-]show-raw-insn']
-- [`--adjust-vma='OFFSET]
-- [`--special-syms']
-- [`--prefix='PREFIX]
-- [`--prefix-strip='LEVEL]
-- [`--insn-width='WIDTH]
-- [`-V'|`--version']
-- [`-H'|`--help']
-- OBJFILE...
--
-- `objdump' displays information about one or more object files. The
--options control what particular information to display. This
--information is mostly useful to programmers who are working on the
--compilation tools, as opposed to programmers who just want their
--program to compile and work.
--
-- OBJFILE... are the object files to be examined. When you specify
--archives, `objdump' shows information on each of the member object
--files.
--
-- The long and short forms of options, shown here as alternatives, are
--equivalent. At least one option from the list
--`-a,-d,-D,-e,-f,-g,-G,-h,-H,-p,-P,-r,-R,-s,-S,-t,-T,-V,-x' must be
--given.
--
--`-a'
--`--archive-header'
-- If any of the OBJFILE files are archives, display the archive
-- header information (in a format similar to `ls -l'). Besides the
-- information you could list with `ar tv', `objdump -a' shows the
-- object file format of each archive member.
--
--`--adjust-vma=OFFSET'
-- When dumping information, first add OFFSET to all the section
-- addresses. This is useful if the section addresses do not
-- correspond to the symbol table, which can happen when putting
-- sections at particular addresses when using a format which can not
-- represent section addresses, such as a.out.
--
--`-b BFDNAME'
--`--target=BFDNAME'
-- Specify that the object-code format for the object files is
-- BFDNAME. This option may not be necessary; OBJDUMP can
-- automatically recognize many formats.
--
-- For example,
-- objdump -b oasys -m vax -h fu.o
-- displays summary information from the section headers (`-h') of
-- `fu.o', which is explicitly identified (`-m') as a VAX object file
-- in the format produced by Oasys compilers. You can list the
-- formats available with the `-i' option. *Note Target Selection::,
-- for more information.
--
--`-C'
--`--demangle[=STYLE]'
-- Decode ("demangle") low-level symbol names into user-level names.
-- Besides removing any initial underscore prepended by the system,
-- this makes C++ function names readable. Different compilers have
-- different mangling styles. The optional demangling style argument
-- can be used to choose an appropriate demangling style for your
-- compiler. *Note c++filt::, for more information on demangling.
--
--`-g'
--`--debugging'
-- Display debugging information. This attempts to parse STABS and
-- IEEE debugging format information stored in the file and print it
-- out using a C like syntax. If neither of these formats are found
-- this option falls back on the `-W' option to print any DWARF
-- information in the file.
--
--`-e'
--`--debugging-tags'
-- Like `-g', but the information is generated in a format compatible
-- with ctags tool.
--
--`-d'
--`--disassemble'
-- Display the assembler mnemonics for the machine instructions from
-- OBJFILE. This option only disassembles those sections which are
-- expected to contain instructions.
--
--`-D'
--`--disassemble-all'
-- Like `-d', but disassemble the contents of all sections, not just
-- those expected to contain instructions.
--
-- If the target is an ARM architecture this switch also has the
-- effect of forcing the disassembler to decode pieces of data found
-- in code sections as if they were instructions.
--
--`--prefix-addresses'
-- When disassembling, print the complete address on each line. This
-- is the older disassembly format.
--
--`-EB'
--`-EL'
--`--endian={big|little}'
-- Specify the endianness of the object files. This only affects
-- disassembly. This can be useful when disassembling a file format
-- which does not describe endianness information, such as S-records.
--
--`-f'
--`--file-headers'
-- Display summary information from the overall header of each of the
-- OBJFILE files.
--
--`-F'
--`--file-offsets'
-- When disassembling sections, whenever a symbol is displayed, also
-- display the file offset of the region of data that is about to be
-- dumped. If zeroes are being skipped, then when disassembly
-- resumes, tell the user how many zeroes were skipped and the file
-- offset of the location from where the disassembly resumes. When
-- dumping sections, display the file offset of the location from
-- where the dump starts.
--
--`--file-start-context'
-- Specify that when displaying interlisted source code/disassembly
-- (assumes `-S') from a file that has not yet been displayed, extend
-- the context to the start of the file.
--
--`-h'
--`--section-headers'
--`--headers'
-- Display summary information from the section headers of the object
-- file.
--
-- File segments may be relocated to nonstandard addresses, for
-- example by using the `-Ttext', `-Tdata', or `-Tbss' options to
-- `ld'. However, some object file formats, such as a.out, do not
-- store the starting address of the file segments. In those
-- situations, although `ld' relocates the sections correctly, using
-- `objdump -h' to list the file section headers cannot show the
-- correct addresses. Instead, it shows the usual addresses, which
-- are implicit for the target.
--
--`-H'
--`--help'
-- Print a summary of the options to `objdump' and exit.
--
--`-i'
--`--info'
-- Display a list showing all architectures and object formats
-- available for specification with `-b' or `-m'.
--
--`-j NAME'
--`--section=NAME'
-- Display information only for section NAME.
--
--`-l'
--`--line-numbers'
-- Label the display (using debugging information) with the filename
-- and source line numbers corresponding to the object code or relocs
-- shown. Only useful with `-d', `-D', or `-r'.
--
--`-m MACHINE'
--`--architecture=MACHINE'
-- Specify the architecture to use when disassembling object files.
-- This can be useful when disassembling object files which do not
-- describe architecture information, such as S-records. You can
-- list the available architectures with the `-i' option.
--
-- If the target is an ARM architecture then this switch has an
-- additional effect. It restricts the disassembly to only those
-- instructions supported by the architecture specified by MACHINE.
-- If it is necessary to use this switch because the input file does
-- not contain any architecture information, but it is also desired to
-- disassemble all the instructions use `-marm'.
--
--`-M OPTIONS'
--`--disassembler-options=OPTIONS'
-- Pass target specific information to the disassembler. Only
-- supported on some targets. If it is necessary to specify more
-- than one disassembler option then multiple `-M' options can be
-- used or can be placed together into a comma separated list.
--
-- If the target is an ARM architecture then this switch can be used
-- to select which register name set is used during disassembler.
-- Specifying `-M reg-names-std' (the default) will select the
-- register names as used in ARM's instruction set documentation, but
-- with register 13 called 'sp', register 14 called 'lr' and register
-- 15 called 'pc'. Specifying `-M reg-names-apcs' will select the
-- name set used by the ARM Procedure Call Standard, whilst
-- specifying `-M reg-names-raw' will just use `r' followed by the
-- register number.
--
-- There are also two variants on the APCS register naming scheme
-- enabled by `-M reg-names-atpcs' and `-M reg-names-special-atpcs'
-- which use the ARM/Thumb Procedure Call Standard naming
-- conventions. (Either with the normal register names or the
-- special register names).
--
-- This option can also be used for ARM architectures to force the
-- disassembler to interpret all instructions as Thumb instructions by
-- using the switch `--disassembler-options=force-thumb'. This can be
-- useful when attempting to disassemble thumb code produced by other
-- compilers.
--
-- For the x86, some of the options duplicate functions of the `-m'
-- switch, but allow finer grained control. Multiple selections from
-- the following may be specified as a comma separated string.
-- `x86-64', `i386' and `i8086' select disassembly for the given
-- architecture. `intel' and `att' select between intel syntax mode
-- and AT&T syntax mode. `intel-mnemonic' and `att-mnemonic' select
-- between intel mnemonic mode and AT&T mnemonic mode.
-- `intel-mnemonic' implies `intel' and `att-mnemonic' implies `att'.
-- `addr64', `addr32', `addr16', `data32' and `data16' specify the
-- default address size and operand size. These four options will be
-- overridden if `x86-64', `i386' or `i8086' appear later in the
-- option string. Lastly, `suffix', when in AT&T mode, instructs the
-- disassembler to print a mnemonic suffix even when the suffix could
-- be inferred by the operands.
--
-- For PowerPC, `booke' controls the disassembly of BookE
-- instructions. `32' and `64' select PowerPC and PowerPC64
-- disassembly, respectively. `e300' selects disassembly for the
-- e300 family. `440' selects disassembly for the PowerPC 440.
-- `ppcps' selects disassembly for the paired single instructions of
-- the PPC750CL.
--
-- For MIPS, this option controls the printing of instruction mnemonic
-- names and register names in disassembled instructions. Multiple
-- selections from the following may be specified as a comma separated
-- string, and invalid options are ignored:
--
-- `no-aliases'
-- Print the 'raw' instruction mnemonic instead of some pseudo
-- instruction mnemonic. I.e., print 'daddu' or 'or' instead of
-- 'move', 'sll' instead of 'nop', etc.
--
-- `virt'
-- Disassemble the virtualization ASE instructions.
--
-- `gpr-names=ABI'
-- Print GPR (general-purpose register) names as appropriate for
-- the specified ABI. By default, GPR names are selected
-- according to the ABI of the binary being disassembled.
--
-- `fpr-names=ABI'
-- Print FPR (floating-point register) names as appropriate for
-- the specified ABI. By default, FPR numbers are printed
-- rather than names.
--
-- `cp0-names=ARCH'
-- Print CP0 (system control coprocessor; coprocessor 0)
-- register names as appropriate for the CPU or architecture
-- specified by ARCH. By default, CP0 register names are
-- selected according to the architecture and CPU of the binary
-- being disassembled.
--
-- `hwr-names=ARCH'
-- Print HWR (hardware register, used by the `rdhwr'
-- instruction) names as appropriate for the CPU or architecture
-- specified by ARCH. By default, HWR names are selected
-- according to the architecture and CPU of the binary being
-- disassembled.
--
-- `reg-names=ABI'
-- Print GPR and FPR names as appropriate for the selected ABI.
--
-- `reg-names=ARCH'
-- Print CPU-specific register names (CP0 register and HWR names)
-- as appropriate for the selected CPU or architecture.
--
-- For any of the options listed above, ABI or ARCH may be specified
-- as `numeric' to have numbers printed rather than names, for the
-- selected types of registers. You can list the available values of
-- ABI and ARCH using the `--help' option.
--
-- For VAX, you can specify function entry addresses with `-M
-- entry:0xf00ba'. You can use this multiple times to properly
-- disassemble VAX binary files that don't contain symbol tables (like
-- ROM dumps). In these cases, the function entry mask would
-- otherwise be decoded as VAX instructions, which would probably
-- lead the rest of the function being wrongly disassembled.
--
--`-p'
--`--private-headers'
-- Print information that is specific to the object file format. The
-- exact information printed depends upon the object file format.
-- For some object file formats, no additional information is printed.
--
--`-P OPTIONS'
--`--private=OPTIONS'
-- Print information that is specific to the object file format. The
-- argument OPTIONS is a comma separated list that depends on the
-- format (the lists of options is displayed with the help).
--
-- For XCOFF, the available options are: `header', `aout',
-- `sections', `syms', `relocs', `lineno', `loader', `except',
-- `typchk', `traceback', `toc' and `ldinfo'.
--
--`-r'
--`--reloc'
-- Print the relocation entries of the file. If used with `-d' or
-- `-D', the relocations are printed interspersed with the
-- disassembly.
--
--`-R'
--`--dynamic-reloc'
-- Print the dynamic relocation entries of the file. This is only
-- meaningful for dynamic objects, such as certain types of shared
-- libraries. As for `-r', if used with `-d' or `-D', the
-- relocations are printed interspersed with the disassembly.
--
--`-s'
--`--full-contents'
-- Display the full contents of any sections requested. By default
-- all non-empty sections are displayed.
--
--`-S'
--`--source'
-- Display source code intermixed with disassembly, if possible.
-- Implies `-d'.
--
--`--prefix=PREFIX'
-- Specify PREFIX to add to the absolute paths when used with `-S'.
--
--`--prefix-strip=LEVEL'
-- Indicate how many initial directory names to strip off the
-- hardwired absolute paths. It has no effect without
-- `--prefix='PREFIX.
--
--`--show-raw-insn'
-- When disassembling instructions, print the instruction in hex as
-- well as in symbolic form. This is the default except when
-- `--prefix-addresses' is used.
--
--`--no-show-raw-insn'
-- When disassembling instructions, do not print the instruction
-- bytes. This is the default when `--prefix-addresses' is used.
--
--`--insn-width=WIDTH'
-- Display WIDTH bytes on a single line when disassembling
-- instructions.
--
--`-W[lLiaprmfFsoRt]'
--`--dwarf[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]'
-- Displays the contents of the debug sections in the file, if any are
-- present. If one of the optional letters or words follows the
-- switch then only data found in those specific sections will be
-- dumped.
--
-- Note that there is no single letter option to display the content
-- of trace sections or .gdb_index.
--
-- Note: the output from the `=info' option can also be affected by
-- the options `--dwarf-depth', the `--dwarf-start' and the
-- `--dwarf-check'.
--
--`--dwarf-depth=N'
-- Limit the dump of the `.debug_info' section to N children. This
-- is only useful with `--dwarf=info'. The default is to print all
-- DIEs; the special value 0 for N will also have this effect.
--
-- With a non-zero value for N, DIEs at or deeper than N levels will
-- not be printed. The range for N is zero-based.
--
--`--dwarf-start=N'
-- Print only DIEs beginning with the DIE numbered N. This is only
-- useful with `--dwarf=info'.
--
-- If specified, this option will suppress printing of any header
-- information and all DIEs before the DIE numbered N. Only siblings
-- and children of the specified DIE will be printed.
--
-- This can be used in conjunction with `--dwarf-depth'.
--
--`--dwarf-check'
-- Enable additional checks for consistency of Dwarf information.
--
--`-G'
--`--stabs'
-- Display the full contents of any sections requested. Display the
-- contents of the .stab and .stab.index and .stab.excl sections from
-- an ELF file. This is only useful on systems (such as Solaris 2.0)
-- in which `.stab' debugging symbol-table entries are carried in an
-- ELF section. In most other file formats, debugging symbol-table
-- entries are interleaved with linkage symbols, and are visible in
-- the `--syms' output.
--
--`--start-address=ADDRESS'
-- Start displaying data at the specified address. This affects the
-- output of the `-d', `-r' and `-s' options.
--
--`--stop-address=ADDRESS'
-- Stop displaying data at the specified address. This affects the
-- output of the `-d', `-r' and `-s' options.
--
--`-t'
--`--syms'
-- Print the symbol table entries of the file. This is similar to
-- the information provided by the `nm' program, although the display
-- format is different. The format of the output depends upon the
-- format of the file being dumped, but there are two main types.
-- One looks like this:
--
-- [ 4](sec 3)(fl 0x00)(ty 0)(scl 3) (nx 1) 0x00000000 .bss
-- [ 6](sec 1)(fl 0x00)(ty 0)(scl 2) (nx 0) 0x00000000 fred
--
-- where the number inside the square brackets is the number of the
-- entry in the symbol table, the SEC number is the section number,
-- the FL value are the symbol's flag bits, the TY number is the
-- symbol's type, the SCL number is the symbol's storage class and
-- the NX value is the number of auxilary entries associated with the
-- symbol. The last two fields are the symbol's value and its name.
--
-- The other common output format, usually seen with ELF based files,
-- looks like this:
--
-- 00000000 l d .bss 00000000 .bss
-- 00000000 g .text 00000000 fred
--
-- Here the first number is the symbol's value (sometimes refered to
-- as its address). The next field is actually a set of characters
-- and spaces indicating the flag bits that are set on the symbol.
-- These characters are described below. Next is the section with
-- which the symbol is associated or _*ABS*_ if the section is
-- absolute (ie not connected with any section), or _*UND*_ if the
-- section is referenced in the file being dumped, but not defined
-- there.
--
-- After the section name comes another field, a number, which for
-- common symbols is the alignment and for other symbol is the size.
-- Finally the symbol's name is displayed.
--
-- The flag characters are divided into 7 groups as follows:
-- `l'
-- `g'
-- `u'
-- `!'
-- The symbol is a local (l), global (g), unique global (u),
-- neither global nor local (a space) or both global and local
-- (!). A symbol can be neither local or global for a variety
-- of reasons, e.g., because it is used for debugging, but it is
-- probably an indication of a bug if it is ever both local and
-- global. Unique global symbols are a GNU extension to the
-- standard set of ELF symbol bindings. For such a symbol the
-- dynamic linker will make sure that in the entire process
-- there is just one symbol with this name and type in use.
--
-- `w'
-- The symbol is weak (w) or strong (a space).
--
-- `C'
-- The symbol denotes a constructor (C) or an ordinary symbol (a
-- space).
--
-- `W'
-- The symbol is a warning (W) or a normal symbol (a space). A
-- warning symbol's name is a message to be displayed if the
-- symbol following the warning symbol is ever referenced.
--
-- `I'
--
-- `i'
-- The symbol is an indirect reference to another symbol (I), a
-- function to be evaluated during reloc processing (i) or a
-- normal symbol (a space).
--
-- `d'
-- `D'
-- The symbol is a debugging symbol (d) or a dynamic symbol (D)
-- or a normal symbol (a space).
--
-- `F'
--
-- `f'
--
-- `O'
-- The symbol is the name of a function (F) or a file (f) or an
-- object (O) or just a normal symbol (a space).
--
--`-T'
--`--dynamic-syms'
-- Print the dynamic symbol table entries of the file. This is only
-- meaningful for dynamic objects, such as certain types of shared
-- libraries. This is similar to the information provided by the `nm'
-- program when given the `-D' (`--dynamic') option.
--
--`--special-syms'
-- When displaying symbols include those which the target considers
-- to be special in some way and which would not normally be of
-- interest to the user.
--
--`-V'
--`--version'
-- Print the version number of `objdump' and exit.
--
--`-x'
--`--all-headers'
-- Display all available header information, including the symbol
-- table and relocation entries. Using `-x' is equivalent to
-- specifying all of `-a -f -h -p -r -t'.
--
--`-w'
--`--wide'
-- Format some lines for output devices that have more than 80
-- columns. Also do not truncate symbol names when they are
-- displayed.
--
--`-z'
--`--disassemble-zeroes'
-- Normally the disassembly output will skip blocks of zeroes. This
-- option directs the disassembler to disassemble those blocks, just
-- like any other data.
--
--
--File: binutils.info, Node: ranlib, Next: size, Prev: objdump, Up: Top
--
--5 ranlib
--********
--
-- ranlib [`--plugin' NAME] [`-DhHvVt'] ARCHIVE
--
-- `ranlib' generates an index to the contents of an archive and stores
--it in the archive. The index lists each symbol defined by a member of
--an archive that is a relocatable object file.
--
-- You may use `nm -s' or `nm --print-armap' to list this index.
--
-- An archive with such an index speeds up linking to the library and
--allows routines in the library to call each other without regard to
--their placement in the archive.
--
-- The GNU `ranlib' program is another form of GNU `ar'; running
--`ranlib' is completely equivalent to executing `ar -s'. *Note ar::.
--
--`-h'
--`-H'
--`--help'
-- Show usage information for `ranlib'.
--
--`-v'
--`-V'
--`--version'
-- Show the version number of `ranlib'.
--
--`-D'
-- Operate in _deterministic_ mode. The symbol map archive member's
-- header will show zero for the UID, GID, and timestamp. When this
-- option is used, multiple runs will produce identical output files.
--
-- If `binutils' was configured with
-- `--enable-deterministic-archives', then this mode is on by
-- default. It can be disabled with the `-U' option, described below.
--
--`-t'
-- Update the timestamp of the symbol map of an archive.
--
--`-U'
-- Do _not_ operate in _deterministic_ mode. This is the inverse of
-- the `-D' option, above: the archive index will get actual UID,
-- GID, timestamp, and file mode values.
--
-- If `binutils' was configured _without_
-- `--enable-deterministic-archives', then this mode is on by default.
--
--
--
--File: binutils.info, Node: size, Next: strings, Prev: ranlib, Up: Top
--
--6 size
--******
--
-- size [`-A'|`-B'|`--format='COMPATIBILITY]
-- [`--help']
-- [`-d'|`-o'|`-x'|`--radix='NUMBER]
-- [`--common']
-- [`-t'|`--totals']
-- [`--target='BFDNAME] [`-V'|`--version']
-- [OBJFILE...]
--
-- The GNU `size' utility lists the section sizes--and the total
--size--for each of the object or archive files OBJFILE in its argument
--list. By default, one line of output is generated for each object file
--or each module in an archive.
--
-- OBJFILE... are the object files to be examined. If none are
--specified, the file `a.out' will be used.
--
-- The command line options have the following meanings:
--
--`-A'
--`-B'
--`--format=COMPATIBILITY'
-- Using one of these options, you can choose whether the output from
-- GNU `size' resembles output from System V `size' (using `-A', or
-- `--format=sysv'), or Berkeley `size' (using `-B', or
-- `--format=berkeley'). The default is the one-line format similar
-- to Berkeley's.
--
-- Here is an example of the Berkeley (default) format of output from
-- `size':
-- $ size --format=Berkeley ranlib size
-- text data bss dec hex filename
-- 294880 81920 11592 388392 5ed28 ranlib
-- 294880 81920 11888 388688 5ee50 size
--
-- This is the same data, but displayed closer to System V
-- conventions:
--
-- $ size --format=SysV ranlib size
-- ranlib :
-- section size addr
-- .text 294880 8192
-- .data 81920 303104
-- .bss 11592 385024
-- Total 388392
--
--
-- size :
-- section size addr
-- .text 294880 8192
-- .data 81920 303104
-- .bss 11888 385024
-- Total 388688
--
--`--help'
-- Show a summary of acceptable arguments and options.
--
--`-d'
--`-o'
--`-x'
--`--radix=NUMBER'
-- Using one of these options, you can control whether the size of
-- each section is given in decimal (`-d', or `--radix=10'); octal
-- (`-o', or `--radix=8'); or hexadecimal (`-x', or `--radix=16').
-- In `--radix=NUMBER', only the three values (8, 10, 16) are
-- supported. The total size is always given in two radices; decimal
-- and hexadecimal for `-d' or `-x' output, or octal and hexadecimal
-- if you're using `-o'.
--
--`--common'
-- Print total size of common symbols in each file. When using
-- Berkeley format these are included in the bss size.
--
--`-t'
--`--totals'
-- Show totals of all objects listed (Berkeley format listing mode
-- only).
--
--`--target=BFDNAME'
-- Specify that the object-code format for OBJFILE is BFDNAME. This
-- option may not be necessary; `size' can automatically recognize
-- many formats. *Note Target Selection::, for more information.
--
--`-V'
--`--version'
-- Display the version number of `size'.
--
--
--File: binutils.info, Node: strings, Next: strip, Prev: size, Up: Top
--
--7 strings
--*********
--
-- strings [`-afovV'] [`-'MIN-LEN]
-- [`-n' MIN-LEN] [`--bytes='MIN-LEN]
-- [`-t' RADIX] [`--radix='RADIX]
-- [`-e' ENCODING] [`--encoding='ENCODING]
-- [`-'] [`--all'] [`--print-file-name']
-- [`-T' BFDNAME] [`--target='BFDNAME]
-- [`--help'] [`--version'] FILE...
--
-- For each FILE given, GNU `strings' prints the printable character
--sequences that are at least 4 characters long (or the number given with
--the options below) and are followed by an unprintable character. By
--default, it only prints the strings from the initialized and loaded
--sections of object files; for other types of files, it prints the
--strings from the whole file.
--
-- `strings' is mainly useful for determining the contents of non-text
--files.
--
--`-a'
--`--all'
--`-'
-- Do not scan only the initialized and loaded sections of object
-- files; scan the whole files.
--
--`-f'
--`--print-file-name'
-- Print the name of the file before each string.
--
--`--help'
-- Print a summary of the program usage on the standard output and
-- exit.
--
--`-MIN-LEN'
--`-n MIN-LEN'
--`--bytes=MIN-LEN'
-- Print sequences of characters that are at least MIN-LEN characters
-- long, instead of the default 4.
--
--`-o'
-- Like `-t o'. Some other versions of `strings' have `-o' act like
-- `-t d' instead. Since we can not be compatible with both ways, we
-- simply chose one.
--
--`-t RADIX'
--`--radix=RADIX'
-- Print the offset within the file before each string. The single
-- character argument specifies the radix of the offset--`o' for
-- octal, `x' for hexadecimal, or `d' for decimal.
--
--`-e ENCODING'
--`--encoding=ENCODING'
-- Select the character encoding of the strings that are to be found.
-- Possible values for ENCODING are: `s' = single-7-bit-byte
-- characters (ASCII, ISO 8859, etc., default), `S' =
-- single-8-bit-byte characters, `b' = 16-bit bigendian, `l' = 16-bit
-- littleendian, `B' = 32-bit bigendian, `L' = 32-bit littleendian.
-- Useful for finding wide character strings. (`l' and `b' apply to,
-- for example, Unicode UTF-16/UCS-2 encodings).
--
--`-T BFDNAME'
--`--target=BFDNAME'
-- Specify an object code format other than your system's default
-- format. *Note Target Selection::, for more information.
--
--`-v'
--`-V'
--`--version'
-- Print the program version number on the standard output and exit.
--
--
--File: binutils.info, Node: strip, Next: c++filt, Prev: strings, Up: Top
--
--8 strip
--*******
--
-- strip [`-F' BFDNAME |`--target='BFDNAME]
-- [`-I' BFDNAME |`--input-target='BFDNAME]
-- [`-O' BFDNAME |`--output-target='BFDNAME]
-- [`-s'|`--strip-all']
-- [`-S'|`-g'|`-d'|`--strip-debug']
-- [`--strip-dwo']
-- [`-K' SYMBOLNAME |`--keep-symbol='SYMBOLNAME]
-- [`-N' SYMBOLNAME |`--strip-symbol='SYMBOLNAME]
-- [`-w'|`--wildcard']
-- [`-x'|`--discard-all'] [`-X' |`--discard-locals']
-- [`-R' SECTIONNAME |`--remove-section='SECTIONNAME]
-- [`-o' FILE] [`-p'|`--preserve-dates']
-- [`-D'|`--enable-deterministic-archives']
-- [`-U'|`--disable-deterministic-archives']
-- [`--keep-file-symbols']
-- [`--only-keep-debug']
-- [`-v' |`--verbose'] [`-V'|`--version']
-- [`--help'] [`--info']
-- OBJFILE...
--
-- GNU `strip' discards all symbols from object files OBJFILE. The
--list of object files may include archives. At least one object file
--must be given.
--
-- `strip' modifies the files named in its argument, rather than
--writing modified copies under different names.
--
--`-F BFDNAME'
--`--target=BFDNAME'
-- Treat the original OBJFILE as a file with the object code format
-- BFDNAME, and rewrite it in the same format. *Note Target
-- Selection::, for more information.
--
--`--help'
-- Show a summary of the options to `strip' and exit.
--
--`--info'
-- Display a list showing all architectures and object formats
-- available.
--
--`-I BFDNAME'
--`--input-target=BFDNAME'
-- Treat the original OBJFILE as a file with the object code format
-- BFDNAME. *Note Target Selection::, for more information.
--
--`-O BFDNAME'
--`--output-target=BFDNAME'
-- Replace OBJFILE with a file in the output format BFDNAME. *Note
-- Target Selection::, for more information.
--
--`-R SECTIONNAME'
--`--remove-section=SECTIONNAME'
-- Remove any section named SECTIONNAME from the output file. This
-- option may be given more than once. Note that using this option
-- inappropriately may make the output file unusable. The wildcard
-- character `*' may be given at the end of SECTIONNAME. If so, then
-- any section starting with SECTIONNAME will be removed.
--
--`-s'
--`--strip-all'
-- Remove all symbols.
--
--`-g'
--`-S'
--`-d'
--`--strip-debug'
-- Remove debugging symbols only.
--
--`--strip-dwo'
-- Remove the contents of all DWARF .dwo sections, leaving the
-- remaining debugging sections and all symbols intact. See the
-- description of this option in the `objcopy' section for more
-- information.
--
--`--strip-unneeded'
-- Remove all symbols that are not needed for relocation processing.
--
--`-K SYMBOLNAME'
--`--keep-symbol=SYMBOLNAME'
-- When stripping symbols, keep symbol SYMBOLNAME even if it would
-- normally be stripped. This option may be given more than once.
--
--`-N SYMBOLNAME'
--`--strip-symbol=SYMBOLNAME'
-- Remove symbol SYMBOLNAME from the source file. This option may be
-- given more than once, and may be combined with strip options other
-- than `-K'.
--
--`-o FILE'
-- Put the stripped output in FILE, rather than replacing the
-- existing file. When this argument is used, only one OBJFILE
-- argument may be specified.
--
--`-p'
--`--preserve-dates'
-- Preserve the access and modification dates of the file.
--
--`-D'
--`--enable-deterministic-archives'
-- Operate in _deterministic_ mode. When copying archive members and
-- writing the archive index, use zero for UIDs, GIDs, timestamps,
-- and use consistent file modes for all files.
--
-- If `binutils' was configured with
-- `--enable-deterministic-archives', then this mode is on by default.
-- It can be disabled with the `-U' option, below.
--
--`-U'
--`--disable-deterministic-archives'
-- Do _not_ operate in _deterministic_ mode. This is the inverse of
-- the `-D' option, above: when copying archive members and writing
-- the archive index, use their actual UID, GID, timestamp, and file
-- mode values.
--
-- This is the default unless `binutils' was configured with
-- `--enable-deterministic-archives'.
--
--`-w'
--`--wildcard'
-- Permit regular expressions in SYMBOLNAMEs used in other command
-- line options. The question mark (?), asterisk (*), backslash (\)
-- and square brackets ([]) operators can be used anywhere in the
-- symbol name. If the first character of the symbol name is the
-- exclamation point (!) then the sense of the switch is reversed for
-- that symbol. For example:
--
-- -w -K !foo -K fo*
--
-- would cause strip to only keep symbols that start with the letters
-- "fo", but to discard the symbol "foo".
--
--`-x'
--`--discard-all'
-- Remove non-global symbols.
--
--`-X'
--`--discard-locals'
-- Remove compiler-generated local symbols. (These usually start
-- with `L' or `.'.)
--
--`--keep-file-symbols'
-- When stripping a file, perhaps with `--strip-debug' or
-- `--strip-unneeded', retain any symbols specifying source file
-- names, which would otherwise get stripped.
--
--`--only-keep-debug'
-- Strip a file, removing contents of any sections that would not be
-- stripped by `--strip-debug' and leaving the debugging sections
-- intact. In ELF files, this preserves all note sections in the
-- output.
--
-- The intention is that this option will be used in conjunction with
-- `--add-gnu-debuglink' to create a two part executable. One a
-- stripped binary which will occupy less space in RAM and in a
-- distribution and the second a debugging information file which is
-- only needed if debugging abilities are required. The suggested
-- procedure to create these files is as follows:
--
-- 1. Link the executable as normal. Assuming that is is called
-- `foo' then...
--
-- 2. Run `objcopy --only-keep-debug foo foo.dbg' to create a file
-- containing the debugging info.
--
-- 3. Run `objcopy --strip-debug foo' to create a stripped
-- executable.
--
-- 4. Run `objcopy --add-gnu-debuglink=foo.dbg foo' to add a link
-- to the debugging info into the stripped executable.
--
-- Note--the choice of `.dbg' as an extension for the debug info file
-- is arbitrary. Also the `--only-keep-debug' step is optional. You
-- could instead do this:
--
-- 1. Link the executable as normal.
--
-- 2. Copy `foo' to `foo.full'
--
-- 3. Run `strip --strip-debug foo'
--
-- 4. Run `objcopy --add-gnu-debuglink=foo.full foo'
--
-- i.e., the file pointed to by the `--add-gnu-debuglink' can be the
-- full executable. It does not have to be a file created by the
-- `--only-keep-debug' switch.
--
-- Note--this switch is only intended for use on fully linked files.
-- It does not make sense to use it on object files where the
-- debugging information may be incomplete. Besides the
-- gnu_debuglink feature currently only supports the presence of one
-- filename containing debugging information, not multiple filenames
-- on a one-per-object-file basis.
--
--`-V'
--`--version'
-- Show the version number for `strip'.
--
--`-v'
--`--verbose'
-- Verbose output: list all object files modified. In the case of
-- archives, `strip -v' lists all members of the archive.
--
--
--File: binutils.info, Node: c++filt, Next: addr2line, Prev: strip, Up: Top
--
--9 c++filt
--*********
--
-- c++filt [`-_'|`--strip-underscore']
-- [`-n'|`--no-strip-underscore']
-- [`-p'|`--no-params']
-- [`-t'|`--types']
-- [`-i'|`--no-verbose']
-- [`-s' FORMAT|`--format='FORMAT]
-- [`--help'] [`--version'] [SYMBOL...]
--
-- The C++ and Java languages provide function overloading, which means
--that you can write many functions with the same name, providing that
--each function takes parameters of different types. In order to be able
--to distinguish these similarly named functions C++ and Java encode them
--into a low-level assembler name which uniquely identifies each
--different version. This process is known as "mangling". The `c++filt'
--(1) program does the inverse mapping: it decodes ("demangles") low-level
--names into user-level names so that they can be read.
--
-- Every alphanumeric word (consisting of letters, digits, underscores,
--dollars, or periods) seen in the input is a potential mangled name. If
--the name decodes into a C++ name, the C++ name replaces the low-level
--name in the output, otherwise the original word is output. In this way
--you can pass an entire assembler source file, containing mangled names,
--through `c++filt' and see the same source file containing demangled
--names.
--
-- You can also use `c++filt' to decipher individual symbols by passing
--them on the command line:
--
-- c++filt SYMBOL
--
-- If no SYMBOL arguments are given, `c++filt' reads symbol names from
--the standard input instead. All the results are printed on the
--standard output. The difference between reading names from the command
--line versus reading names from the standard input is that command line
--arguments are expected to be just mangled names and no checking is
--performed to separate them from surrounding text. Thus for example:
--
-- c++filt -n _Z1fv
--
-- will work and demangle the name to "f()" whereas:
--
-- c++filt -n _Z1fv,
--
-- will not work. (Note the extra comma at the end of the mangled name
--which makes it invalid). This command however will work:
--
-- echo _Z1fv, | c++filt -n
--
-- and will display "f(),", i.e., the demangled name followed by a
--trailing comma. This behaviour is because when the names are read from
--the standard input it is expected that they might be part of an
--assembler source file where there might be extra, extraneous characters
--trailing after a mangled name. For example:
--
-- .type _Z1fv, @function
--
--`-_'
--`--strip-underscore'
-- On some systems, both the C and C++ compilers put an underscore in
-- front of every name. For example, the C name `foo' gets the
-- low-level name `_foo'. This option removes the initial
-- underscore. Whether `c++filt' removes the underscore by default
-- is target dependent.
--
--`-n'
--`--no-strip-underscore'
-- Do not remove the initial underscore.
--
--`-p'
--`--no-params'
-- When demangling the name of a function, do not display the types of
-- the function's parameters.
--
--`-t'
--`--types'
-- Attempt to demangle types as well as function names. This is
-- disabled by default since mangled types are normally only used
-- internally in the compiler, and they can be confused with
-- non-mangled names. For example, a function called "a" treated as
-- a mangled type name would be demangled to "signed char".
--
--`-i'
--`--no-verbose'
-- Do not include implementation details (if any) in the demangled
-- output.
--
--`-s FORMAT'
--`--format=FORMAT'
-- `c++filt' can decode various methods of mangling, used by
-- different compilers. The argument to this option selects which
-- method it uses:
--
-- `auto'
-- Automatic selection based on executable (the default method)
--
-- `gnu'
-- the one used by the GNU C++ compiler (g++)
--
-- `lucid'
-- the one used by the Lucid compiler (lcc)
--
-- `arm'
-- the one specified by the C++ Annotated Reference Manual
--
-- `hp'
-- the one used by the HP compiler (aCC)
--
-- `edg'
-- the one used by the EDG compiler
--
-- `gnu-v3'
-- the one used by the GNU C++ compiler (g++) with the V3 ABI.
--
-- `java'
-- the one used by the GNU Java compiler (gcj)
--
-- `gnat'
-- the one used by the GNU Ada compiler (GNAT).
--
--`--help'
-- Print a summary of the options to `c++filt' and exit.
--
--`--version'
-- Print the version number of `c++filt' and exit.
--
-- _Warning:_ `c++filt' is a new utility, and the details of its user
-- interface are subject to change in future releases. In particular,
-- a command-line option may be required in the future to decode a
-- name passed as an argument on the command line; in other words,
--
-- c++filt SYMBOL
--
-- may in a future release become
--
-- c++filt OPTION SYMBOL
--
-- ---------- Footnotes ----------
--
-- (1) MS-DOS does not allow `+' characters in file names, so on MS-DOS
--this program is named `CXXFILT'.
--
--
--File: binutils.info, Node: addr2line, Next: nlmconv, Prev: c++filt, Up: Top
--
--10 addr2line
--************
--
-- addr2line [`-a'|`--addresses']
-- [`-b' BFDNAME|`--target='BFDNAME]
-- [`-C'|`--demangle'[=STYLE]]
-- [`-e' FILENAME|`--exe='FILENAME]
-- [`-f'|`--functions'] [`-s'|`--basename']
-- [`-i'|`--inlines']
-- [`-p'|`--pretty-print']
-- [`-j'|`--section='NAME]
-- [`-H'|`--help'] [`-V'|`--version']
-- [addr addr ...]
--
-- `addr2line' translates addresses into file names and line numbers.
--Given an address in an executable or an offset in a section of a
--relocatable object, it uses the debugging information to figure out
--which file name and line number are associated with it.
--
-- The executable or relocatable object to use is specified with the
--`-e' option. The default is the file `a.out'. The section in the
--relocatable object to use is specified with the `-j' option.
--
-- `addr2line' has two modes of operation.
--
-- In the first, hexadecimal addresses are specified on the command
--line, and `addr2line' displays the file name and line number for each
--address.
--
-- In the second, `addr2line' reads hexadecimal addresses from standard
--input, and prints the file name and line number for each address on
--standard output. In this mode, `addr2line' may be used in a pipe to
--convert dynamically chosen addresses.
--
-- The format of the output is `FILENAME:LINENO'. The file name and
--line number for each input address is printed on separate lines.
--
-- If the `-f' option is used, then each `FILENAME:LINENO' line is
--preceded by `FUNCTIONNAME' which is the name of the function containing
--the address.
--
-- If the `-i' option is used and the code at the given address is
--present there because of inlining by the compiler then the
--`{FUNCTIONNAME} FILENAME:LINENO' information for the inlining function
--will be displayed afterwards. This continues recursively until there
--is no more inlining to report.
--
-- If the `-a' option is used then the output is prefixed by the input
--address.
--
-- If the `-p' option is used then the output for each input address is
--displayed on one, possibly quite long, line. If `-p' is not used then
--the output is broken up into multiple lines, based on the paragraphs
--above.
--
-- If the file name or function name can not be determined, `addr2line'
--will print two question marks in their place. If the line number can
--not be determined, `addr2line' will print 0.
--
-- The long and short forms of options, shown here as alternatives, are
--equivalent.
--
--`-a'
--`--addresses'
-- Display the address before the function name, file and line number
-- information. The address is printed with a `0x' prefix to easily
-- identify it.
--
--`-b BFDNAME'
--`--target=BFDNAME'
-- Specify that the object-code format for the object files is
-- BFDNAME.
--
--`-C'
--`--demangle[=STYLE]'
-- Decode ("demangle") low-level symbol names into user-level names.
-- Besides removing any initial underscore prepended by the system,
-- this makes C++ function names readable. Different compilers have
-- different mangling styles. The optional demangling style argument
-- can be used to choose an appropriate demangling style for your
-- compiler. *Note c++filt::, for more information on demangling.
--
--`-e FILENAME'
--`--exe=FILENAME'
-- Specify the name of the executable for which addresses should be
-- translated. The default file is `a.out'.
--
--`-f'
--`--functions'
-- Display function names as well as file and line number information.
--
--`-s'
--`--basenames'
-- Display only the base of each file name.
--
--`-i'
--`--inlines'
-- If the address belongs to a function that was inlined, the source
-- information for all enclosing scopes back to the first non-inlined
-- function will also be printed. For example, if `main' inlines
-- `callee1' which inlines `callee2', and address is from `callee2',
-- the source information for `callee1' and `main' will also be
-- printed.
--
--`-j'
--`--section'
-- Read offsets relative to the specified section instead of absolute
-- addresses.
--
--`-p'
--`--pretty-print'
-- Make the output more human friendly: each location are printed on
-- one line. If option `-i' is specified, lines for all enclosing
-- scopes are prefixed with `(inlined by)'.
--
--
--File: binutils.info, Node: nlmconv, Next: windmc, Prev: addr2line, Up: Top
--
--11 nlmconv
--**********
--
--`nlmconv' converts a relocatable object file into a NetWare Loadable
--Module.
--
-- _Warning:_ `nlmconv' is not always built as part of the binary
-- utilities, since it is only useful for NLM targets.
--
-- nlmconv [`-I' BFDNAME|`--input-target='BFDNAME]
-- [`-O' BFDNAME|`--output-target='BFDNAME]
-- [`-T' HEADERFILE|`--header-file='HEADERFILE]
-- [`-d'|`--debug'] [`-l' LINKER|`--linker='LINKER]
-- [`-h'|`--help'] [`-V'|`--version']
-- INFILE OUTFILE
--
-- `nlmconv' converts the relocatable `i386' object file INFILE into
--the NetWare Loadable Module OUTFILE, optionally reading HEADERFILE for
--NLM header information. For instructions on writing the NLM command
--file language used in header files, see the `linkers' section,
--`NLMLINK' in particular, of the `NLM Development and Tools Overview',
--which is part of the NLM Software Developer's Kit ("NLM SDK"),
--available from Novell, Inc. `nlmconv' uses the GNU Binary File
--Descriptor library to read INFILE; see *Note BFD: (ld.info)BFD, for
--more information.
--
-- `nlmconv' can perform a link step. In other words, you can list
--more than one object file for input if you list them in the definitions
--file (rather than simply specifying one input file on the command line).
--In this case, `nlmconv' calls the linker for you.
--
--`-I BFDNAME'
--`--input-target=BFDNAME'
-- Object format of the input file. `nlmconv' can usually determine
-- the format of a given file (so no default is necessary). *Note
-- Target Selection::, for more information.
--
--`-O BFDNAME'
--`--output-target=BFDNAME'
-- Object format of the output file. `nlmconv' infers the output
-- format based on the input format, e.g. for a `i386' input file the
-- output format is `nlm32-i386'. *Note Target Selection::, for more
-- information.
--
--`-T HEADERFILE'
--`--header-file=HEADERFILE'
-- Reads HEADERFILE for NLM header information. For instructions on
-- writing the NLM command file language used in header files, see
-- see the `linkers' section, of the `NLM Development and Tools
-- Overview', which is part of the NLM Software Developer's Kit,
-- available from Novell, Inc.
--
--`-d'
--`--debug'
-- Displays (on standard error) the linker command line used by
-- `nlmconv'.
--
--`-l LINKER'
--`--linker=LINKER'
-- Use LINKER for any linking. LINKER can be an absolute or a
-- relative pathname.
--
--`-h'
--`--help'
-- Prints a usage summary.
--
--`-V'
--`--version'
-- Prints the version number for `nlmconv'.
--
--
--File: binutils.info, Node: windmc, Next: windres, Prev: nlmconv, Up: Top
--
--12 windmc
--*********
--
--`windmc' may be used to generator Windows message resources.
--
-- _Warning:_ `windmc' is not always built as part of the binary
-- utilities, since it is only useful for Windows targets.
--
-- windmc [options] input-file
--
-- `windmc' reads message definitions from an input file (.mc) and
--translate them into a set of output files. The output files may be of
--four kinds:
--
--`h'
-- A C header file containing the message definitions.
--
--`rc'
-- A resource file compilable by the `windres' tool.
--
--`bin'
-- One or more binary files containing the resource data for a
-- specific message language.
--
--`dbg'
-- A C include file that maps message id's to their symbolic name.
--
-- The exact description of these different formats is available in
--documentation from Microsoft.
--
-- When `windmc' converts from the `mc' format to the `bin' format,
--`rc', `h', and optional `dbg' it is acting like the Windows Message
--Compiler.
--
--`-a'
--`--ascii_in'
-- Specifies that the input file specified is ASCII. This is the
-- default behaviour.
--
--`-A'
--`--ascii_out'
-- Specifies that messages in the output `bin' files should be in
-- ASCII format.
--
--`-b'
--`--binprefix'
-- Specifies that `bin' filenames should have to be prefixed by the
-- basename of the source file.
--
--`-c'
--`--customflag'
-- Sets the customer bit in all message id's.
--
--`-C CODEPAGE'
--`--codepage_in CODEPAGE'
-- Sets the default codepage to be used to convert input file to
-- UTF16. The default is ocdepage 1252.
--
--`-d'
--`--decimal_values'
-- Outputs the constants in the header file in decimal. Default is
-- using hexadecimal output.
--
--`-e EXT'
--`--extension EXT'
-- The extension for the header file. The default is .h extension.
--
--`-F TARGET'
--`--target TARGET'
-- Specify the BFD format to use for a bin file as output. This is a
-- BFD target name; you can use the `--help' option to see a list of
-- supported targets. Normally `windmc' will use the default format,
-- which is the first one listed by the `--help' option. *Note
-- Target Selection::.
--
--`-h PATH'
--`--headerdir PATH'
-- The target directory of the generated header file. The default is
-- the current directory.
--
--`-H'
--`--help'
-- Displays a list of command line options and then exits.
--
--`-m CHARACTERS'
--`--maxlength CHARACTERS'
-- Instructs `windmc' to generate a warning if the length of any
-- message exceeds the number specified.
--
--`-n'
--`--nullterminate'
-- Terminate message text in `bin' files by zero. By default they are
-- terminated by CR/LF.
--
--`-o'
--`--hresult_use'
-- Not yet implemented. Instructs `windmc' to generate an OLE2 header
-- file, using HRESULT definitions. Status codes are used if the flag
-- is not specified.
--
--`-O CODEPAGE'
--`--codepage_out CODEPAGE'
-- Sets the default codepage to be used to output text files. The
-- default is ocdepage 1252.
--
--`-r PATH'
--`--rcdir PATH'
-- The target directory for the generated `rc' script and the
-- generated `bin' files that the resource compiler script includes.
-- The default is the current directory.
--
--`-u'
--`--unicode_in'
-- Specifies that the input file is UTF16.
--
--`-U'
--`--unicode_out'
-- Specifies that messages in the output `bin' file should be in UTF16
-- format. This is the default behaviour.
--
--`-v'
--
--`--verbose'
-- Enable verbose mode.
--
--`-V'
--
--`--version'
-- Prints the version number for `windmc'.
--
--`-x PATH'
--`--xdgb PATH'
-- The path of the `dbg' C include file that maps message id's to the
-- symbolic name. No such file is generated without specifying the
-- switch.
--
--
--File: binutils.info, Node: windres, Next: dlltool, Prev: windmc, Up: Top
--
--13 windres
--**********
--
--`windres' may be used to manipulate Windows resources.
--
-- _Warning:_ `windres' is not always built as part of the binary
-- utilities, since it is only useful for Windows targets.
--
-- windres [options] [input-file] [output-file]
--
-- `windres' reads resources from an input file and copies them into an
--output file. Either file may be in one of three formats:
--
--`rc'
-- A text format read by the Resource Compiler.
--
--`res'
-- A binary format generated by the Resource Compiler.
--
--`coff'
-- A COFF object or executable.
--
-- The exact description of these different formats is available in
--documentation from Microsoft.
--
-- When `windres' converts from the `rc' format to the `res' format, it
--is acting like the Windows Resource Compiler. When `windres' converts
--from the `res' format to the `coff' format, it is acting like the
--Windows `CVTRES' program.
--
-- When `windres' generates an `rc' file, the output is similar but not
--identical to the format expected for the input. When an input `rc'
--file refers to an external filename, an output `rc' file will instead
--include the file contents.
--
-- If the input or output format is not specified, `windres' will guess
--based on the file name, or, for the input file, the file contents. A
--file with an extension of `.rc' will be treated as an `rc' file, a file
--with an extension of `.res' will be treated as a `res' file, and a file
--with an extension of `.o' or `.exe' will be treated as a `coff' file.
--
-- If no output file is specified, `windres' will print the resources
--in `rc' format to standard output.
--
-- The normal use is for you to write an `rc' file, use `windres' to
--convert it to a COFF object file, and then link the COFF file into your
--application. This will make the resources described in the `rc' file
--available to Windows.
--
--`-i FILENAME'
--`--input FILENAME'
-- The name of the input file. If this option is not used, then
-- `windres' will use the first non-option argument as the input file
-- name. If there are no non-option arguments, then `windres' will
-- read from standard input. `windres' can not read a COFF file from
-- standard input.
--
--`-o FILENAME'
--`--output FILENAME'
-- The name of the output file. If this option is not used, then
-- `windres' will use the first non-option argument, after any used
-- for the input file name, as the output file name. If there is no
-- non-option argument, then `windres' will write to standard output.
-- `windres' can not write a COFF file to standard output. Note, for
-- compatibility with `rc' the option `-fo' is also accepted, but its
-- use is not recommended.
--
--`-J FORMAT'
--`--input-format FORMAT'
-- The input format to read. FORMAT may be `res', `rc', or `coff'.
-- If no input format is specified, `windres' will guess, as
-- described above.
--
--`-O FORMAT'
--`--output-format FORMAT'
-- The output format to generate. FORMAT may be `res', `rc', or
-- `coff'. If no output format is specified, `windres' will guess,
-- as described above.
--
--`-F TARGET'
--`--target TARGET'
-- Specify the BFD format to use for a COFF file as input or output.
-- This is a BFD target name; you can use the `--help' option to see
-- a list of supported targets. Normally `windres' will use the
-- default format, which is the first one listed by the `--help'
-- option. *Note Target Selection::.
--
--`--preprocessor PROGRAM'
-- When `windres' reads an `rc' file, it runs it through the C
-- preprocessor first. This option may be used to specify the
-- preprocessor to use, including any leading arguments. The default
-- preprocessor argument is `gcc -E -xc-header -DRC_INVOKED'.
--
--`--preprocessor-arg OPTION'
-- When `windres' reads an `rc' file, it runs it through the C
-- preprocessor first. This option may be used to specify additional
-- text to be passed to preprocessor on its command line. This
-- option can be used multiple times to add multiple options to the
-- preprocessor command line.
--
--`-I DIRECTORY'
--`--include-dir DIRECTORY'
-- Specify an include directory to use when reading an `rc' file.
-- `windres' will pass this to the preprocessor as an `-I' option.
-- `windres' will also search this directory when looking for files
-- named in the `rc' file. If the argument passed to this command
-- matches any of the supported FORMATS (as described in the `-J'
-- option), it will issue a deprecation warning, and behave just like
-- the `-J' option. New programs should not use this behaviour. If a
-- directory happens to match a FORMAT, simple prefix it with `./' to
-- disable the backward compatibility.
--
--`-D TARGET'
--`--define SYM[=VAL]'
-- Specify a `-D' option to pass to the preprocessor when reading an
-- `rc' file.
--
--`-U TARGET'
--`--undefine SYM'
-- Specify a `-U' option to pass to the preprocessor when reading an
-- `rc' file.
--
--`-r'
-- Ignored for compatibility with rc.
--
--`-v'
-- Enable verbose mode. This tells you what the preprocessor is if
-- you didn't specify one.
--
--`-c VAL'
--
--`--codepage VAL'
-- Specify the default codepage to use when reading an `rc' file.
-- VAL should be a hexadecimal prefixed by `0x' or decimal codepage
-- code. The valid range is from zero up to 0xffff, but the validity
-- of the codepage is host and configuration dependent.
--
--`-l VAL'
--
--`--language VAL'
-- Specify the default language to use when reading an `rc' file.
-- VAL should be a hexadecimal language code. The low eight bits are
-- the language, and the high eight bits are the sublanguage.
--
--`--use-temp-file'
-- Use a temporary file to instead of using popen to read the output
-- of the preprocessor. Use this option if the popen implementation
-- is buggy on the host (eg., certain non-English language versions
-- of Windows 95 and Windows 98 are known to have buggy popen where
-- the output will instead go the console).
--
--`--no-use-temp-file'
-- Use popen, not a temporary file, to read the output of the
-- preprocessor. This is the default behaviour.
--
--`-h'
--
--`--help'
-- Prints a usage summary.
--
--`-V'
--
--`--version'
-- Prints the version number for `windres'.
--
--`--yydebug'
-- If `windres' is compiled with `YYDEBUG' defined as `1', this will
-- turn on parser debugging.
--
--
--File: binutils.info, Node: dlltool, Next: readelf, Prev: windres, Up: Top
--
--14 dlltool
--**********
--
--`dlltool' is used to create the files needed to create dynamic link
--libraries (DLLs) on systems which understand PE format image files such
--as Windows. A DLL contains an export table which contains information
--that the runtime loader needs to resolve references from a referencing
--program.
--
-- The export table is generated by this program by reading in a `.def'
--file or scanning the `.a' and `.o' files which will be in the DLL. A
--`.o' file can contain information in special `.drectve' sections with
--export information.
--
-- _Note:_ `dlltool' is not always built as part of the binary
-- utilities, since it is only useful for those targets which support
-- DLLs.
--
-- dlltool [`-d'|`--input-def' DEF-FILE-NAME]
-- [`-b'|`--base-file' BASE-FILE-NAME]
-- [`-e'|`--output-exp' EXPORTS-FILE-NAME]
-- [`-z'|`--output-def' DEF-FILE-NAME]
-- [`-l'|`--output-lib' LIBRARY-FILE-NAME]
-- [`-y'|`--output-delaylib' LIBRARY-FILE-NAME]
-- [`--export-all-symbols'] [`--no-export-all-symbols']
-- [`--exclude-symbols' LIST]
-- [`--no-default-excludes']
-- [`-S'|`--as' PATH-TO-ASSEMBLER] [`-f'|`--as-flags' OPTIONS]
-- [`-D'|`--dllname' NAME] [`-m'|`--machine' MACHINE]
-- [`-a'|`--add-indirect']
-- [`-U'|`--add-underscore'] [`--add-stdcall-underscore']
-- [`-k'|`--kill-at'] [`-A'|`--add-stdcall-alias']
-- [`-p'|`--ext-prefix-alias' PREFIX]
-- [`-x'|`--no-idata4'] [`-c'|`--no-idata5']
-- [`--use-nul-prefixed-import-tables']
-- [`-I'|`--identify' LIBRARY-FILE-NAME] [`--identify-strict']
-- [`-i'|`--interwork']
-- [`-n'|`--nodelete'] [`-t'|`--temp-prefix' PREFIX]
-- [`-v'|`--verbose']
-- [`-h'|`--help'] [`-V'|`--version']
-- [`--no-leading-underscore'] [`--leading-underscore']
-- [object-file ...]
--
-- `dlltool' reads its inputs, which can come from the `-d' and `-b'
--options as well as object files specified on the command line. It then
--processes these inputs and if the `-e' option has been specified it
--creates a exports file. If the `-l' option has been specified it
--creates a library file and if the `-z' option has been specified it
--creates a def file. Any or all of the `-e', `-l' and `-z' options can
--be present in one invocation of dlltool.
--
-- When creating a DLL, along with the source for the DLL, it is
--necessary to have three other files. `dlltool' can help with the
--creation of these files.
--
-- The first file is a `.def' file which specifies which functions are
--exported from the DLL, which functions the DLL imports, and so on. This
--is a text file and can be created by hand, or `dlltool' can be used to
--create it using the `-z' option. In this case `dlltool' will scan the
--object files specified on its command line looking for those functions
--which have been specially marked as being exported and put entries for
--them in the `.def' file it creates.
--
-- In order to mark a function as being exported from a DLL, it needs to
--have an `-export:<name_of_function>' entry in the `.drectve' section of
--the object file. This can be done in C by using the asm() operator:
--
-- asm (".section .drectve");
-- asm (".ascii \"-export:my_func\"");
--
-- int my_func (void) { ... }
--
-- The second file needed for DLL creation is an exports file. This
--file is linked with the object files that make up the body of the DLL
--and it handles the interface between the DLL and the outside world.
--This is a binary file and it can be created by giving the `-e' option to
--`dlltool' when it is creating or reading in a `.def' file.
--
-- The third file needed for DLL creation is the library file that
--programs will link with in order to access the functions in the DLL (an
--`import library'). This file can be created by giving the `-l' option
--to dlltool when it is creating or reading in a `.def' file.
--
-- If the `-y' option is specified, dlltool generates a delay-import
--library that can be used instead of the normal import library to allow
--a program to link to the dll only as soon as an imported function is
--called for the first time. The resulting executable will need to be
--linked to the static delayimp library containing __delayLoadHelper2(),
--which in turn will import LoadLibraryA and GetProcAddress from kernel32.
--
-- `dlltool' builds the library file by hand, but it builds the exports
--file by creating temporary files containing assembler statements and
--then assembling these. The `-S' command line option can be used to
--specify the path to the assembler that dlltool will use, and the `-f'
--option can be used to pass specific flags to that assembler. The `-n'
--can be used to prevent dlltool from deleting these temporary assembler
--files when it is done, and if `-n' is specified twice then this will
--prevent dlltool from deleting the temporary object files it used to
--build the library.
--
-- Here is an example of creating a DLL from a source file `dll.c' and
--also creating a program (from an object file called `program.o') that
--uses that DLL:
--
-- gcc -c dll.c
-- dlltool -e exports.o -l dll.lib dll.o
-- gcc dll.o exports.o -o dll.dll
-- gcc program.o dll.lib -o program
--
-- `dlltool' may also be used to query an existing import library to
--determine the name of the DLL to which it is associated. See the
--description of the `-I' or `--identify' option.
--
-- The command line options have the following meanings:
--
--`-d FILENAME'
--`--input-def FILENAME'
-- Specifies the name of a `.def' file to be read in and processed.
--
--`-b FILENAME'
--`--base-file FILENAME'
-- Specifies the name of a base file to be read in and processed. The
-- contents of this file will be added to the relocation section in
-- the exports file generated by dlltool.
--
--`-e FILENAME'
--`--output-exp FILENAME'
-- Specifies the name of the export file to be created by dlltool.
--
--`-z FILENAME'
--`--output-def FILENAME'
-- Specifies the name of the `.def' file to be created by dlltool.
--
--`-l FILENAME'
--`--output-lib FILENAME'
-- Specifies the name of the library file to be created by dlltool.
--
--`-y FILENAME'
--`--output-delaylib FILENAME'
-- Specifies the name of the delay-import library file to be created
-- by dlltool.
--
--`--export-all-symbols'
-- Treat all global and weak defined symbols found in the input object
-- files as symbols to be exported. There is a small list of symbols
-- which are not exported by default; see the `--no-default-excludes'
-- option. You may add to the list of symbols to not export by using
-- the `--exclude-symbols' option.
--
--`--no-export-all-symbols'
-- Only export symbols explicitly listed in an input `.def' file or in
-- `.drectve' sections in the input object files. This is the default
-- behaviour. The `.drectve' sections are created by `dllexport'
-- attributes in the source code.
--
--`--exclude-symbols LIST'
-- Do not export the symbols in LIST. This is a list of symbol names
-- separated by comma or colon characters. The symbol names should
-- not contain a leading underscore. This is only meaningful when
-- `--export-all-symbols' is used.
--
--`--no-default-excludes'
-- When `--export-all-symbols' is used, it will by default avoid
-- exporting certain special symbols. The current list of symbols to
-- avoid exporting is `DllMain@12', `DllEntryPoint@0', `impure_ptr'.
-- You may use the `--no-default-excludes' option to go ahead and
-- export these special symbols. This is only meaningful when
-- `--export-all-symbols' is used.
--
--`-S PATH'
--`--as PATH'
-- Specifies the path, including the filename, of the assembler to be
-- used to create the exports file.
--
--`-f OPTIONS'
--`--as-flags OPTIONS'
-- Specifies any specific command line options to be passed to the
-- assembler when building the exports file. This option will work
-- even if the `-S' option is not used. This option only takes one
-- argument, and if it occurs more than once on the command line,
-- then later occurrences will override earlier occurrences. So if
-- it is necessary to pass multiple options to the assembler they
-- should be enclosed in double quotes.
--
--`-D NAME'
--`--dll-name NAME'
-- Specifies the name to be stored in the `.def' file as the name of
-- the DLL when the `-e' option is used. If this option is not
-- present, then the filename given to the `-e' option will be used
-- as the name of the DLL.
--
--`-m MACHINE'
--`-machine MACHINE'
-- Specifies the type of machine for which the library file should be
-- built. `dlltool' has a built in default type, depending upon how
-- it was created, but this option can be used to override that.
-- This is normally only useful when creating DLLs for an ARM
-- processor, when the contents of the DLL are actually encode using
-- Thumb instructions.
--
--`-a'
--`--add-indirect'
-- Specifies that when `dlltool' is creating the exports file it
-- should add a section which allows the exported functions to be
-- referenced without using the import library. Whatever the hell
-- that means!
--
--`-U'
--`--add-underscore'
-- Specifies that when `dlltool' is creating the exports file it
-- should prepend an underscore to the names of _all_ exported
-- symbols.
--
--`--no-leading-underscore'
--
--`--leading-underscore'
-- Specifies whether standard symbol should be forced to be prefixed,
-- or not.
--
--`--add-stdcall-underscore'
-- Specifies that when `dlltool' is creating the exports file it
-- should prepend an underscore to the names of exported _stdcall_
-- functions. Variable names and non-stdcall function names are not
-- modified. This option is useful when creating GNU-compatible
-- import libs for third party DLLs that were built with MS-Windows
-- tools.
--
--`-k'
--`--kill-at'
-- Specifies that when `dlltool' is creating the exports file it
-- should not append the string `@ <number>'. These numbers are
-- called ordinal numbers and they represent another way of accessing
-- the function in a DLL, other than by name.
--
--`-A'
--`--add-stdcall-alias'
-- Specifies that when `dlltool' is creating the exports file it
-- should add aliases for stdcall symbols without `@ <number>' in
-- addition to the symbols with `@ <number>'.
--
--`-p'
--`--ext-prefix-alias PREFIX'
-- Causes `dlltool' to create external aliases for all DLL imports
-- with the specified prefix. The aliases are created for both
-- external and import symbols with no leading underscore.
--
--`-x'
--`--no-idata4'
-- Specifies that when `dlltool' is creating the exports and library
-- files it should omit the `.idata4' section. This is for
-- compatibility with certain operating systems.
--
--`--use-nul-prefixed-import-tables'
-- Specifies that when `dlltool' is creating the exports and library
-- files it should prefix the `.idata4' and `.idata5' by zero an
-- element. This emulates old gnu import library generation of
-- `dlltool'. By default this option is turned off.
--
--`-c'
--`--no-idata5'
-- Specifies that when `dlltool' is creating the exports and library
-- files it should omit the `.idata5' section. This is for
-- compatibility with certain operating systems.
--
--`-I FILENAME'
--`--identify FILENAME'
-- Specifies that `dlltool' should inspect the import library
-- indicated by FILENAME and report, on `stdout', the name(s) of the
-- associated DLL(s). This can be performed in addition to any other
-- operations indicated by the other options and arguments.
-- `dlltool' fails if the import library does not exist or is not
-- actually an import library. See also `--identify-strict'.
--
--`--identify-strict'
-- Modifies the behavior of the `--identify' option, such that an
-- error is reported if FILENAME is associated with more than one DLL.
--
--`-i'
--`--interwork'
-- Specifies that `dlltool' should mark the objects in the library
-- file and exports file that it produces as supporting interworking
-- between ARM and Thumb code.
--
--`-n'
--`--nodelete'
-- Makes `dlltool' preserve the temporary assembler files it used to
-- create the exports file. If this option is repeated then dlltool
-- will also preserve the temporary object files it uses to create
-- the library file.
--
--`-t PREFIX'
--`--temp-prefix PREFIX'
-- Makes `dlltool' use PREFIX when constructing the names of
-- temporary assembler and object files. By default, the temp file
-- prefix is generated from the pid.
--
--`-v'
--`--verbose'
-- Make dlltool describe what it is doing.
--
--`-h'
--`--help'
-- Displays a list of command line options and then exits.
--
--`-V'
--`--version'
-- Displays dlltool's version number and then exits.
--
--
--* Menu:
--
--* def file format:: The format of the dlltool `.def' file
--
--
--File: binutils.info, Node: def file format, Up: dlltool
--
--14.1 The format of the `dlltool' `.def' file
--============================================
--
--A `.def' file contains any number of the following commands:
--
--`NAME' NAME `[ ,' BASE `]'
-- The result is going to be named NAME`.exe'.
--
--`LIBRARY' NAME `[ ,' BASE `]'
-- The result is going to be named NAME`.dll'. Note: If you want to
-- use LIBRARY as name then you need to quote. Otherwise this will
-- fail due a necessary hack for libtool (see PR binutils/13710 for
-- more details).
--
--`EXPORTS ( ( (' NAME1 `[ = ' NAME2 `] ) | ( ' NAME1 `=' MODULE-NAME `.' EXTERNAL-NAME `) ) [ == ' ITS_NAME `]'
--
--`[' INTEGER `] [ NONAME ] [ CONSTANT ] [ DATA ] [ PRIVATE ] ) *'
-- Declares NAME1 as an exported symbol from the DLL, with optional
-- ordinal number INTEGER, or declares NAME1 as an alias (forward) of
-- the function EXTERNAL-NAME in the DLL. If ITS_NAME is specified,
-- this name is used as string in export table. MODULE-NAME. Note:
-- The `EXPORTS' has to be the last command in .def file, as keywords
-- are treated - beside `LIBRARY' - as simple name-identifiers. If
-- you want to use LIBRARY as name then you need to quote it.
--
--`IMPORTS ( (' INTERNAL-NAME `=' MODULE-NAME `.' INTEGER `) | [' INTERNAL-NAME `= ]' MODULE-NAME `.' EXTERNAL-NAME `) [ == ) ITS_NAME `]' *'
-- Declares that EXTERNAL-NAME or the exported function whose ordinal
-- number is INTEGER is to be imported from the file MODULE-NAME. If
-- INTERNAL-NAME is specified then this is the name that the imported
-- function will be referred to in the body of the DLL. If ITS_NAME
-- is specified, this name is used as string in import table. Note:
-- The `IMPORTS' has to be the last command in .def file, as keywords
-- are treated - beside `LIBRARY' - as simple name-identifiers. If
-- you want to use LIBRARY as name then you need to quote it.
--
--`DESCRIPTION' STRING
-- Puts STRING into the output `.exp' file in the `.rdata' section.
--
--`STACKSIZE' NUMBER-RESERVE `[, ' NUMBER-COMMIT `]'
--
--`HEAPSIZE' NUMBER-RESERVE `[, ' NUMBER-COMMIT `]'
-- Generates `--stack' or `--heap' NUMBER-RESERVE,NUMBER-COMMIT in
-- the output `.drectve' section. The linker will see this and act
-- upon it.
--
--`CODE' ATTR `+'
--
--`DATA' ATTR `+'
--
--`SECTIONS (' SECTION-NAME ATTR` + ) *'
-- Generates `--attr' SECTION-NAME ATTR in the output `.drectve'
-- section, where ATTR is one of `READ', `WRITE', `EXECUTE' or
-- `SHARED'. The linker will see this and act upon it.
--
--
--
--File: binutils.info, Node: readelf, Next: elfedit, Prev: dlltool, Up: Top
--
--15 readelf
--**********
--
-- readelf [`-a'|`--all']
-- [`-h'|`--file-header']
-- [`-l'|`--program-headers'|`--segments']
-- [`-S'|`--section-headers'|`--sections']
-- [`-g'|`--section-groups']
-- [`-t'|`--section-details']
-- [`-e'|`--headers']
-- [`-s'|`--syms'|`--symbols']
-- [`--dyn-syms']
-- [`-n'|`--notes']
-- [`-r'|`--relocs']
-- [`-u'|`--unwind']
-- [`-d'|`--dynamic']
-- [`-V'|`--version-info']
-- [`-A'|`--arch-specific']
-- [`-D'|`--use-dynamic']
-- [`-x' <number or name>|`--hex-dump='<number or name>]
-- [`-p' <number or name>|`--string-dump='<number or name>]
-- [`-R' <number or name>|`--relocated-dump='<number or name>]
-- [`-c'|`--archive-index']
-- [`-w[lLiaprmfFsoRt]'|
-- `--debug-dump'[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]]
-- [`--dwarf-depth=N']
-- [`--dwarf-start=N']
-- [`-I'|`--histogram']
-- [`-v'|`--version']
-- [`-W'|`--wide']
-- [`-H'|`--help']
-- ELFFILE...
--
-- `readelf' displays information about one or more ELF format object
--files. The options control what particular information to display.
--
-- ELFFILE... are the object files to be examined. 32-bit and 64-bit
--ELF files are supported, as are archives containing ELF files.
--
-- This program performs a similar function to `objdump' but it goes
--into more detail and it exists independently of the BFD library, so if
--there is a bug in BFD then readelf will not be affected.
--
-- The long and short forms of options, shown here as alternatives, are
--equivalent. At least one option besides `-v' or `-H' must be given.
--
--`-a'
--`--all'
-- Equivalent to specifying `--file-header', `--program-headers',
-- `--sections', `--symbols', `--relocs', `--dynamic', `--notes' and
-- `--version-info'.
--
--`-h'
--`--file-header'
-- Displays the information contained in the ELF header at the start
-- of the file.
--
--`-l'
--`--program-headers'
--`--segments'
-- Displays the information contained in the file's segment headers,
-- if it has any.
--
--`-S'
--`--sections'
--`--section-headers'
-- Displays the information contained in the file's section headers,
-- if it has any.
--
--`-g'
--`--section-groups'
-- Displays the information contained in the file's section groups,
-- if it has any.
--
--`-t'
--`--section-details'
-- Displays the detailed section information. Implies `-S'.
--
--`-s'
--`--symbols'
--`--syms'
-- Displays the entries in symbol table section of the file, if it
-- has one.
--
--`--dyn-syms'
-- Displays the entries in dynamic symbol table section of the file,
-- if it has one.
--
--`-e'
--`--headers'
-- Display all the headers in the file. Equivalent to `-h -l -S'.
--
--`-n'
--`--notes'
-- Displays the contents of the NOTE segments and/or sections, if any.
--
--`-r'
--`--relocs'
-- Displays the contents of the file's relocation section, if it has
-- one.
--
--`-u'
--`--unwind'
-- Displays the contents of the file's unwind section, if it has one.
-- Only the unwind sections for IA64 ELF files, as well as ARM
-- unwind tables (`.ARM.exidx' / `.ARM.extab') are currently
-- supported.
--
--`-d'
--`--dynamic'
-- Displays the contents of the file's dynamic section, if it has one.
--
--`-V'
--`--version-info'
-- Displays the contents of the version sections in the file, it they
-- exist.
--
--`-A'
--`--arch-specific'
-- Displays architecture-specific information in the file, if there
-- is any.
--
--`-D'
--`--use-dynamic'
-- When displaying symbols, this option makes `readelf' use the
-- symbol hash tables in the file's dynamic section, rather than the
-- symbol table sections.
--
--`-x <number or name>'
--`--hex-dump=<number or name>'
-- Displays the contents of the indicated section as a hexadecimal
-- bytes. A number identifies a particular section by index in the
-- section table; any other string identifies all sections with that
-- name in the object file.
--
--`-R <number or name>'
--`--relocated-dump=<number or name>'
-- Displays the contents of the indicated section as a hexadecimal
-- bytes. A number identifies a particular section by index in the
-- section table; any other string identifies all sections with that
-- name in the object file. The contents of the section will be
-- relocated before they are displayed.
--
--`-p <number or name>'
--`--string-dump=<number or name>'
-- Displays the contents of the indicated section as printable
-- strings. A number identifies a particular section by index in the
-- section table; any other string identifies all sections with that
-- name in the object file.
--
--`-c'
--`--archive-index'
-- Displays the file symbol index information contained in the header
-- part of binary archives. Performs the same function as the `t'
-- command to `ar', but without using the BFD library. *Note ar::.
--
--`-w[lLiaprmfFsoRt]'
--`--debug-dump[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]'
-- Displays the contents of the debug sections in the file, if any are
-- present. If one of the optional letters or words follows the
-- switch then only data found in those specific sections will be
-- dumped.
--
-- Note that there is no single letter option to display the content
-- of trace sections or .gdb_index.
--
-- Note: the `=decodedline' option will display the interpreted
-- contents of a .debug_line section whereas the `=rawline' option
-- dumps the contents in a raw format.
--
-- Note: the `=frames-interp' option will display the interpreted
-- contents of a .debug_frame section whereas the `=frames' option
-- dumps the contents in a raw format.
--
-- Note: the output from the `=info' option can also be affected by
-- the options `--dwarf-depth' and `--dwarf-start'.
--
--`--dwarf-depth=N'
-- Limit the dump of the `.debug_info' section to N children. This
-- is only useful with `--debug-dump=info'. The default is to print
-- all DIEs; the special value 0 for N will also have this effect.
--
-- With a non-zero value for N, DIEs at or deeper than N levels will
-- not be printed. The range for N is zero-based.
--
--`--dwarf-start=N'
-- Print only DIEs beginning with the DIE numbered N. This is only
-- useful with `--debug-dump=info'.
--
-- If specified, this option will suppress printing of any header
-- information and all DIEs before the DIE numbered N. Only siblings
-- and children of the specified DIE will be printed.
--
-- This can be used in conjunction with `--dwarf-depth'.
--
--`-I'
--`--histogram'
-- Display a histogram of bucket list lengths when displaying the
-- contents of the symbol tables.
--
--`-v'
--`--version'
-- Display the version number of readelf.
--
--`-W'
--`--wide'
-- Don't break output lines to fit into 80 columns. By default
-- `readelf' breaks section header and segment listing lines for
-- 64-bit ELF files, so that they fit into 80 columns. This option
-- causes `readelf' to print each section header resp. each segment
-- one a single line, which is far more readable on terminals wider
-- than 80 columns.
--
--`-H'
--`--help'
-- Display the command line options understood by `readelf'.
--
--
--
--File: binutils.info, Node: elfedit, Next: Common Options, Prev: readelf, Up: Top
--
--16 elfedit
--**********
--
-- elfedit [`--input-mach='MACHINE]
-- [`--input-type='TYPE]
-- [`--input-osabi='OSABI]
-- `--output-mach='MACHINE
-- `--output-type='TYPE
-- `--output-osabi='OSABI
-- [`-v'|`--version']
-- [`-h'|`--help']
-- ELFFILE...
--
-- `elfedit' updates the ELF header of ELF files which have the
--matching ELF machine and file types. The options control how and which
--fields in the ELF header should be updated.
--
-- ELFFILE... are the ELF files to be updated. 32-bit and 64-bit ELF
--files are supported, as are archives containing ELF files.
--
-- The long and short forms of options, shown here as alternatives, are
--equivalent. At least one of the `--output-mach', `--output-type' and
--`--output-osabi' options must be given.
--
--`--input-mach=MACHINE'
-- Set the matching input ELF machine type to MACHINE. If
-- `--input-mach' isn't specified, it will match any ELF machine
-- types.
--
-- The supported ELF machine types are, L1OM, K1OM and X86-64.
--
--`--output-mach=MACHINE'
-- Change the ELF machine type in the ELF header to MACHINE. The
-- supported ELF machine types are the same as `--input-mach'.
--
--`--input-type=TYPE'
-- Set the matching input ELF file type to TYPE. If `--input-type'
-- isn't specified, it will match any ELF file types.
--
-- The supported ELF file types are, REL, EXEC and DYN.
--
--`--output-type=TYPE'
-- Change the ELF file type in the ELF header to TYPE. The supported
-- ELF types are the same as `--input-type'.
--
--`--input-osabi=OSABI'
-- Set the matching input ELF file OSABI to OSABI. If
-- `--input-osabi' isn't specified, it will match any ELF OSABIs.
--
-- The supported ELF OSABIs are, NONE, HPUX, NETBSD, GNU, LINUX
-- (alias for GNU), SOLARIS, AIX, IRIX, FREEBSD, TRU64, MODESTO,
-- OPENBSD, OPENVMS, NSK, AROS and FENIXOS.
--
--`--output-osabi=OSABI'
-- Change the ELF OSABI in the ELF header to OSABI. The supported
-- ELF OSABI are the same as `--input-osabi'.
--
--`-v'
--`--version'
-- Display the version number of `elfedit'.
--
--`-h'
--`--help'
-- Display the command line options understood by `elfedit'.
--
--
--
--File: binutils.info, Node: Common Options, Next: Selecting the Target System, Prev: elfedit, Up: Top
--
--17 Common Options
--*****************
--
--The following command-line options are supported by all of the programs
--described in this manual.
--
--`@FILE'
-- Read command-line options from FILE. The options read are
-- inserted in place of the original @FILE option. If FILE does not
-- exist, or cannot be read, then the option will be treated
-- literally, and not removed.
--
-- Options in FILE are separated by whitespace. A whitespace
-- character may be included in an option by surrounding the entire
-- option in either single or double quotes. Any character
-- (including a backslash) may be included by prefixing the character
-- to be included with a backslash. The FILE may itself contain
-- additional @FILE options; any such options will be processed
-- recursively.
--
--`--help'
-- Display the command-line options supported by the program.
--
--`--version'
-- Display the version number of the program.
--
--
--
--File: binutils.info, Node: Selecting the Target System, Next: Reporting Bugs, Prev: Common Options, Up: Top
--
--18 Selecting the Target System
--******************************
--
--You can specify two aspects of the target system to the GNU binary file
--utilities, each in several ways:
--
-- * the target
--
-- * the architecture
--
-- In the following summaries, the lists of ways to specify values are
--in order of decreasing precedence. The ways listed first override those
--listed later.
--
-- The commands to list valid values only list the values for which the
--programs you are running were configured. If they were configured with
--`--enable-targets=all', the commands list most of the available values,
--but a few are left out; not all targets can be configured in at once
--because some of them can only be configured "native" (on hosts with the
--same type as the target system).
--
--* Menu:
--
--* Target Selection::
--* Architecture Selection::
--
--
--File: binutils.info, Node: Target Selection, Next: Architecture Selection, Up: Selecting the Target System
--
--18.1 Target Selection
--=====================
--
--A "target" is an object file format. A given target may be supported
--for multiple architectures (*note Architecture Selection::). A target
--selection may also have variations for different operating systems or
--architectures.
--
-- The command to list valid target values is `objdump -i' (the first
--column of output contains the relevant information).
--
-- Some sample values are: `a.out-hp300bsd', `ecoff-littlemips',
--`a.out-sunos-big'.
--
-- You can also specify a target using a configuration triplet. This is
--the same sort of name that is passed to `configure' to specify a
--target. When you use a configuration triplet as an argument, it must be
--fully canonicalized. You can see the canonical version of a triplet by
--running the shell script `config.sub' which is included with the
--sources.
--
-- Some sample configuration triplets are: `m68k-hp-bsd',
--`mips-dec-ultrix', `sparc-sun-sunos'.
--
--`objdump' Target
------------------
--
--Ways to specify:
--
-- 1. command line option: `-b' or `--target'
--
-- 2. environment variable `GNUTARGET'
--
-- 3. deduced from the input file
--
--`objcopy' and `strip' Input Target
------------------------------------
--
--Ways to specify:
--
-- 1. command line options: `-I' or `--input-target', or `-F' or
-- `--target'
--
-- 2. environment variable `GNUTARGET'
--
-- 3. deduced from the input file
--
--`objcopy' and `strip' Output Target
-------------------------------------
--
--Ways to specify:
--
-- 1. command line options: `-O' or `--output-target', or `-F' or
-- `--target'
--
-- 2. the input target (see "`objcopy' and `strip' Input Target" above)
--
-- 3. environment variable `GNUTARGET'
--
-- 4. deduced from the input file
--
--`nm', `size', and `strings' Target
------------------------------------
--
--Ways to specify:
--
-- 1. command line option: `--target'
--
-- 2. environment variable `GNUTARGET'
--
-- 3. deduced from the input file
--
--
--File: binutils.info, Node: Architecture Selection, Prev: Target Selection, Up: Selecting the Target System
--
--18.2 Architecture Selection
--===========================
--
--An "architecture" is a type of CPU on which an object file is to run.
--Its name may contain a colon, separating the name of the processor
--family from the name of the particular CPU.
--
-- The command to list valid architecture values is `objdump -i' (the
--second column contains the relevant information).
--
-- Sample values: `m68k:68020', `mips:3000', `sparc'.
--
--`objdump' Architecture
------------------------
--
--Ways to specify:
--
-- 1. command line option: `-m' or `--architecture'
--
-- 2. deduced from the input file
--
--`objcopy', `nm', `size', `strings' Architecture
-------------------------------------------------
--
--Ways to specify:
--
-- 1. deduced from the input file
--
--
--File: binutils.info, Node: Reporting Bugs, Next: GNU Free Documentation License, Prev: Selecting the Target System, Up: Top
--
--19 Reporting Bugs
--*****************
--
--Your bug reports play an essential role in making the binary utilities
--reliable.
--
-- Reporting a bug may help you by bringing a solution to your problem,
--or it may not. But in any case the principal function of a bug report
--is to help the entire community by making the next version of the binary
--utilities work better. Bug reports are your contribution to their
--maintenance.
--
-- In order for a bug report to serve its purpose, you must include the
--information that enables us to fix the bug.
--
--* Menu:
--
--* Bug Criteria:: Have you found a bug?
--* Bug Reporting:: How to report bugs
--
--
--File: binutils.info, Node: Bug Criteria, Next: Bug Reporting, Up: Reporting Bugs
--
--19.1 Have You Found a Bug?
--==========================
--
--If you are not sure whether you have found a bug, here are some
--guidelines:
--
-- * If a binary utility gets a fatal signal, for any input whatever,
-- that is a bug. Reliable utilities never crash.
--
-- * If a binary utility produces an error message for valid input,
-- that is a bug.
--
-- * If you are an experienced user of binary utilities, your
-- suggestions for improvement are welcome in any case.
--
--
--File: binutils.info, Node: Bug Reporting, Prev: Bug Criteria, Up: Reporting Bugs
--
--19.2 How to Report Bugs
--=======================
--
--A number of companies and individuals offer support for GNU products.
--If you obtained the binary utilities from a support organization, we
--recommend you contact that organization first.
--
-- You can find contact information for many support companies and
--individuals in the file `etc/SERVICE' in the GNU Emacs distribution.
--
-- In any event, we also recommend that you send bug reports for the
--binary utilities to `http://www.sourceware.org/bugzilla/'.
--
-- The fundamental principle of reporting bugs usefully is this:
--*report all the facts*. If you are not sure whether to state a fact or
--leave it out, state it!
--
-- Often people omit facts because they think they know what causes the
--problem and assume that some details do not matter. Thus, you might
--assume that the name of a file you use in an example does not matter.
--Well, probably it does not, but one cannot be sure. Perhaps the bug is
--a stray memory reference which happens to fetch from the location where
--that pathname is stored in memory; perhaps, if the pathname were
--different, the contents of that location would fool the utility into
--doing the right thing despite the bug. Play it safe and give a
--specific, complete example. That is the easiest thing for you to do,
--and the most helpful.
--
-- Keep in mind that the purpose of a bug report is to enable us to fix
--the bug if it is new to us. Therefore, always write your bug reports
--on the assumption that the bug has not been reported previously.
--
-- Sometimes people give a few sketchy facts and ask, "Does this ring a
--bell?" This cannot help us fix a bug, so it is basically useless. We
--respond by asking for enough details to enable us to investigate. You
--might as well expedite matters by sending them to begin with.
--
-- To enable us to fix the bug, you should include all these things:
--
-- * The version of the utility. Each utility announces it if you
-- start it with the `--version' argument.
--
-- Without this, we will not know whether there is any point in
-- looking for the bug in the current version of the binary utilities.
--
-- * Any patches you may have applied to the source, including any
-- patches made to the `BFD' library.
--
-- * The type of machine you are using, and the operating system name
-- and version number.
--
-- * What compiler (and its version) was used to compile the
-- utilities--e.g. "`gcc-2.7'".
--
-- * The command arguments you gave the utility to observe the bug. To
-- guarantee you will not omit something important, list them all. A
-- copy of the Makefile (or the output from make) is sufficient.
--
-- If we were to try to guess the arguments, we would probably guess
-- wrong and then we might not encounter the bug.
--
-- * A complete input file, or set of input files, that will reproduce
-- the bug. If the utility is reading an object file or files, then
-- it is generally most helpful to send the actual object files.
--
-- If the source files were produced exclusively using GNU programs
-- (e.g., `gcc', `gas', and/or the GNU `ld'), then it may be OK to
-- send the source files rather than the object files. In this case,
-- be sure to say exactly what version of `gcc', or whatever, was
-- used to produce the object files. Also say how `gcc', or
-- whatever, was configured.
--
-- * A description of what behavior you observe that you believe is
-- incorrect. For example, "It gets a fatal signal."
--
-- Of course, if the bug is that the utility gets a fatal signal,
-- then we will certainly notice it. But if the bug is incorrect
-- output, we might not notice unless it is glaringly wrong. You
-- might as well not give us a chance to make a mistake.
--
-- Even if the problem you experience is a fatal signal, you should
-- still say so explicitly. Suppose something strange is going on,
-- such as your copy of the utility is out of sync, or you have
-- encountered a bug in the C library on your system. (This has
-- happened!) Your copy might crash and ours would not. If you told
-- us to expect a crash, then when ours fails to crash, we would know
-- that the bug was not happening for us. If you had not told us to
-- expect a crash, then we would not be able to draw any conclusion
-- from our observations.
--
-- * If you wish to suggest changes to the source, send us context
-- diffs, as generated by `diff' with the `-u', `-c', or `-p' option.
-- Always send diffs from the old file to the new file. If you wish
-- to discuss something in the `ld' source, refer to it by context,
-- not by line number.
--
-- The line numbers in our development sources will not match those
-- in your sources. Your line numbers would convey no useful
-- information to us.
--
-- Here are some things that are not necessary:
--
-- * A description of the envelope of the bug.
--
-- Often people who encounter a bug spend a lot of time investigating
-- which changes to the input file will make the bug go away and which
-- changes will not affect it.
--
-- This is often time consuming and not very useful, because the way
-- we will find the bug is by running a single example under the
-- debugger with breakpoints, not by pure deduction from a series of
-- examples. We recommend that you save your time for something else.
--
-- Of course, if you can find a simpler example to report _instead_
-- of the original one, that is a convenience for us. Errors in the
-- output will be easier to spot, running under the debugger will take
-- less time, and so on.
--
-- However, simplification is not vital; if you do not want to do
-- this, report the bug anyway and send us the entire test case you
-- used.
--
-- * A patch for the bug.
--
-- A patch for the bug does help us if it is a good one. But do not
-- omit the necessary information, such as the test case, on the
-- assumption that a patch is all we need. We might see problems
-- with your patch and decide to fix the problem another way, or we
-- might not understand it at all.
--
-- Sometimes with programs as complicated as the binary utilities it
-- is very hard to construct an example that will make the program
-- follow a certain path through the code. If you do not send us the
-- example, we will not be able to construct one, so we will not be
-- able to verify that the bug is fixed.
--
-- And if we cannot understand what bug you are trying to fix, or why
-- your patch should be an improvement, we will not install it. A
-- test case will help us to understand.
--
-- * A guess about what the bug is or what it depends on.
--
-- Such guesses are usually wrong. Even we cannot guess right about
-- such things without first using the debugger to find the facts.
--
--
--File: binutils.info, Node: GNU Free Documentation License, Next: Binutils Index, Prev: Reporting Bugs, Up: Top
--
--Appendix A GNU Free Documentation License
--*****************************************
--
-- Version 1.3, 3 November 2008
--
-- Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
-- `http://fsf.org/'
--
-- Everyone is permitted to copy and distribute verbatim copies
-- of this license document, but changing it is not allowed.
--
-- 0. PREAMBLE
--
-- The purpose of this License is to make a manual, textbook, or other
-- functional and useful document "free" in the sense of freedom: to
-- assure everyone the effective freedom to copy and redistribute it,
-- with or without modifying it, either commercially or
-- noncommercially. Secondarily, this License preserves for the
-- author and publisher a way to get credit for their work, while not
-- being considered responsible for modifications made by others.
--
-- This License is a kind of "copyleft", which means that derivative
-- works of the document must themselves be free in the same sense.
-- It complements the GNU General Public License, which is a copyleft
-- license designed for free software.
--
-- We have designed this License in order to use it for manuals for
-- free software, because free software needs free documentation: a
-- free program should come with manuals providing the same freedoms
-- that the software does. But this License is not limited to
-- software manuals; it can be used for any textual work, regardless
-- of subject matter or whether it is published as a printed book.
-- We recommend this License principally for works whose purpose is
-- instruction or reference.
--
-- 1. APPLICABILITY AND DEFINITIONS
--
-- This License applies to any manual or other work, in any medium,
-- that contains a notice placed by the copyright holder saying it
-- can be distributed under the terms of this License. Such a notice
-- grants a world-wide, royalty-free license, unlimited in duration,
-- to use that work under the conditions stated herein. The
-- "Document", below, refers to any such manual or work. Any member
-- of the public is a licensee, and is addressed as "you". You
-- accept the license if you copy, modify or distribute the work in a
-- way requiring permission under copyright law.
--
-- A "Modified Version" of the Document means any work containing the
-- Document or a portion of it, either copied verbatim, or with
-- modifications and/or translated into another language.
--
-- A "Secondary Section" is a named appendix or a front-matter section
-- of the Document that deals exclusively with the relationship of the
-- publishers or authors of the Document to the Document's overall
-- subject (or to related matters) and contains nothing that could
-- fall directly within that overall subject. (Thus, if the Document
-- is in part a textbook of mathematics, a Secondary Section may not
-- explain any mathematics.) The relationship could be a matter of
-- historical connection with the subject or with related matters, or
-- of legal, commercial, philosophical, ethical or political position
-- regarding them.
--
-- The "Invariant Sections" are certain Secondary Sections whose
-- titles are designated, as being those of Invariant Sections, in
-- the notice that says that the Document is released under this
-- License. If a section does not fit the above definition of
-- Secondary then it is not allowed to be designated as Invariant.
-- The Document may contain zero Invariant Sections. If the Document
-- does not identify any Invariant Sections then there are none.
--
-- The "Cover Texts" are certain short passages of text that are
-- listed, as Front-Cover Texts or Back-Cover Texts, in the notice
-- that says that the Document is released under this License. A
-- Front-Cover Text may be at most 5 words, and a Back-Cover Text may
-- be at most 25 words.
--
-- A "Transparent" copy of the Document means a machine-readable copy,
-- represented in a format whose specification is available to the
-- general public, that is suitable for revising the document
-- straightforwardly with generic text editors or (for images
-- composed of pixels) generic paint programs or (for drawings) some
-- widely available drawing editor, and that is suitable for input to
-- text formatters or for automatic translation to a variety of
-- formats suitable for input to text formatters. A copy made in an
-- otherwise Transparent file format whose markup, or absence of
-- markup, has been arranged to thwart or discourage subsequent
-- modification by readers is not Transparent. An image format is
-- not Transparent if used for any substantial amount of text. A
-- copy that is not "Transparent" is called "Opaque".
--
-- Examples of suitable formats for Transparent copies include plain
-- ASCII without markup, Texinfo input format, LaTeX input format,
-- SGML or XML using a publicly available DTD, and
-- standard-conforming simple HTML, PostScript or PDF designed for
-- human modification. Examples of transparent image formats include
-- PNG, XCF and JPG. Opaque formats include proprietary formats that
-- can be read and edited only by proprietary word processors, SGML or
-- XML for which the DTD and/or processing tools are not generally
-- available, and the machine-generated HTML, PostScript or PDF
-- produced by some word processors for output purposes only.
--
-- The "Title Page" means, for a printed book, the title page itself,
-- plus such following pages as are needed to hold, legibly, the
-- material this License requires to appear in the title page. For
-- works in formats which do not have any title page as such, "Title
-- Page" means the text near the most prominent appearance of the
-- work's title, preceding the beginning of the body of the text.
--
-- The "publisher" means any person or entity that distributes copies
-- of the Document to the public.
--
-- A section "Entitled XYZ" means a named subunit of the Document
-- whose title either is precisely XYZ or contains XYZ in parentheses
-- following text that translates XYZ in another language. (Here XYZ
-- stands for a specific section name mentioned below, such as
-- "Acknowledgements", "Dedications", "Endorsements", or "History".)
-- To "Preserve the Title" of such a section when you modify the
-- Document means that it remains a section "Entitled XYZ" according
-- to this definition.
--
-- The Document may include Warranty Disclaimers next to the notice
-- which states that this License applies to the Document. These
-- Warranty Disclaimers are considered to be included by reference in
-- this License, but only as regards disclaiming warranties: any other
-- implication that these Warranty Disclaimers may have is void and
-- has no effect on the meaning of this License.
--
-- 2. VERBATIM COPYING
--
-- You may copy and distribute the Document in any medium, either
-- commercially or noncommercially, provided that this License, the
-- copyright notices, and the license notice saying this License
-- applies to the Document are reproduced in all copies, and that you
-- add no other conditions whatsoever to those of this License. You
-- may not use technical measures to obstruct or control the reading
-- or further copying of the copies you make or distribute. However,
-- you may accept compensation in exchange for copies. If you
-- distribute a large enough number of copies you must also follow
-- the conditions in section 3.
--
-- You may also lend copies, under the same conditions stated above,
-- and you may publicly display copies.
--
-- 3. COPYING IN QUANTITY
--
-- If you publish printed copies (or copies in media that commonly
-- have printed covers) of the Document, numbering more than 100, and
-- the Document's license notice requires Cover Texts, you must
-- enclose the copies in covers that carry, clearly and legibly, all
-- these Cover Texts: Front-Cover Texts on the front cover, and
-- Back-Cover Texts on the back cover. Both covers must also clearly
-- and legibly identify you as the publisher of these copies. The
-- front cover must present the full title with all words of the
-- title equally prominent and visible. You may add other material
-- on the covers in addition. Copying with changes limited to the
-- covers, as long as they preserve the title of the Document and
-- satisfy these conditions, can be treated as verbatim copying in
-- other respects.
--
-- If the required texts for either cover are too voluminous to fit
-- legibly, you should put the first ones listed (as many as fit
-- reasonably) on the actual cover, and continue the rest onto
-- adjacent pages.
--
-- If you publish or distribute Opaque copies of the Document
-- numbering more than 100, you must either include a
-- machine-readable Transparent copy along with each Opaque copy, or
-- state in or with each Opaque copy a computer-network location from
-- which the general network-using public has access to download
-- using public-standard network protocols a complete Transparent
-- copy of the Document, free of added material. If you use the
-- latter option, you must take reasonably prudent steps, when you
-- begin distribution of Opaque copies in quantity, to ensure that
-- this Transparent copy will remain thus accessible at the stated
-- location until at least one year after the last time you
-- distribute an Opaque copy (directly or through your agents or
-- retailers) of that edition to the public.
--
-- It is requested, but not required, that you contact the authors of
-- the Document well before redistributing any large number of
-- copies, to give them a chance to provide you with an updated
-- version of the Document.
--
-- 4. MODIFICATIONS
--
-- You may copy and distribute a Modified Version of the Document
-- under the conditions of sections 2 and 3 above, provided that you
-- release the Modified Version under precisely this License, with
-- the Modified Version filling the role of the Document, thus
-- licensing distribution and modification of the Modified Version to
-- whoever possesses a copy of it. In addition, you must do these
-- things in the Modified Version:
--
-- A. Use in the Title Page (and on the covers, if any) a title
-- distinct from that of the Document, and from those of
-- previous versions (which should, if there were any, be listed
-- in the History section of the Document). You may use the
-- same title as a previous version if the original publisher of
-- that version gives permission.
--
-- B. List on the Title Page, as authors, one or more persons or
-- entities responsible for authorship of the modifications in
-- the Modified Version, together with at least five of the
-- principal authors of the Document (all of its principal
-- authors, if it has fewer than five), unless they release you
-- from this requirement.
--
-- C. State on the Title page the name of the publisher of the
-- Modified Version, as the publisher.
--
-- D. Preserve all the copyright notices of the Document.
--
-- E. Add an appropriate copyright notice for your modifications
-- adjacent to the other copyright notices.
--
-- F. Include, immediately after the copyright notices, a license
-- notice giving the public permission to use the Modified
-- Version under the terms of this License, in the form shown in
-- the Addendum below.
--
-- G. Preserve in that license notice the full lists of Invariant
-- Sections and required Cover Texts given in the Document's
-- license notice.
--
-- H. Include an unaltered copy of this License.
--
-- I. Preserve the section Entitled "History", Preserve its Title,
-- and add to it an item stating at least the title, year, new
-- authors, and publisher of the Modified Version as given on
-- the Title Page. If there is no section Entitled "History" in
-- the Document, create one stating the title, year, authors,
-- and publisher of the Document as given on its Title Page,
-- then add an item describing the Modified Version as stated in
-- the previous sentence.
--
-- J. Preserve the network location, if any, given in the Document
-- for public access to a Transparent copy of the Document, and
-- likewise the network locations given in the Document for
-- previous versions it was based on. These may be placed in
-- the "History" section. You may omit a network location for a
-- work that was published at least four years before the
-- Document itself, or if the original publisher of the version
-- it refers to gives permission.
--
-- K. For any section Entitled "Acknowledgements" or "Dedications",
-- Preserve the Title of the section, and preserve in the
-- section all the substance and tone of each of the contributor
-- acknowledgements and/or dedications given therein.
--
-- L. Preserve all the Invariant Sections of the Document,
-- unaltered in their text and in their titles. Section numbers
-- or the equivalent are not considered part of the section
-- titles.
--
-- M. Delete any section Entitled "Endorsements". Such a section
-- may not be included in the Modified Version.
--
-- N. Do not retitle any existing section to be Entitled
-- "Endorsements" or to conflict in title with any Invariant
-- Section.
--
-- O. Preserve any Warranty Disclaimers.
--
-- If the Modified Version includes new front-matter sections or
-- appendices that qualify as Secondary Sections and contain no
-- material copied from the Document, you may at your option
-- designate some or all of these sections as invariant. To do this,
-- add their titles to the list of Invariant Sections in the Modified
-- Version's license notice. These titles must be distinct from any
-- other section titles.
--
-- You may add a section Entitled "Endorsements", provided it contains
-- nothing but endorsements of your Modified Version by various
-- parties--for example, statements of peer review or that the text
-- has been approved by an organization as the authoritative
-- definition of a standard.
--
-- You may add a passage of up to five words as a Front-Cover Text,
-- and a passage of up to 25 words as a Back-Cover Text, to the end
-- of the list of Cover Texts in the Modified Version. Only one
-- passage of Front-Cover Text and one of Back-Cover Text may be
-- added by (or through arrangements made by) any one entity. If the
-- Document already includes a cover text for the same cover,
-- previously added by you or by arrangement made by the same entity
-- you are acting on behalf of, you may not add another; but you may
-- replace the old one, on explicit permission from the previous
-- publisher that added the old one.
--
-- The author(s) and publisher(s) of the Document do not by this
-- License give permission to use their names for publicity for or to
-- assert or imply endorsement of any Modified Version.
--
-- 5. COMBINING DOCUMENTS
--
-- You may combine the Document with other documents released under
-- this License, under the terms defined in section 4 above for
-- modified versions, provided that you include in the combination
-- all of the Invariant Sections of all of the original documents,
-- unmodified, and list them all as Invariant Sections of your
-- combined work in its license notice, and that you preserve all
-- their Warranty Disclaimers.
--
-- The combined work need only contain one copy of this License, and
-- multiple identical Invariant Sections may be replaced with a single
-- copy. If there are multiple Invariant Sections with the same name
-- but different contents, make the title of each such section unique
-- by adding at the end of it, in parentheses, the name of the
-- original author or publisher of that section if known, or else a
-- unique number. Make the same adjustment to the section titles in
-- the list of Invariant Sections in the license notice of the
-- combined work.
--
-- In the combination, you must combine any sections Entitled
-- "History" in the various original documents, forming one section
-- Entitled "History"; likewise combine any sections Entitled
-- "Acknowledgements", and any sections Entitled "Dedications". You
-- must delete all sections Entitled "Endorsements."
--
-- 6. COLLECTIONS OF DOCUMENTS
--
-- You may make a collection consisting of the Document and other
-- documents released under this License, and replace the individual
-- copies of this License in the various documents with a single copy
-- that is included in the collection, provided that you follow the
-- rules of this License for verbatim copying of each of the
-- documents in all other respects.
--
-- You may extract a single document from such a collection, and
-- distribute it individually under this License, provided you insert
-- a copy of this License into the extracted document, and follow
-- this License in all other respects regarding verbatim copying of
-- that document.
--
-- 7. AGGREGATION WITH INDEPENDENT WORKS
--
-- A compilation of the Document or its derivatives with other
-- separate and independent documents or works, in or on a volume of
-- a storage or distribution medium, is called an "aggregate" if the
-- copyright resulting from the compilation is not used to limit the
-- legal rights of the compilation's users beyond what the individual
-- works permit. When the Document is included in an aggregate, this
-- License does not apply to the other works in the aggregate which
-- are not themselves derivative works of the Document.
--
-- If the Cover Text requirement of section 3 is applicable to these
-- copies of the Document, then if the Document is less than one half
-- of the entire aggregate, the Document's Cover Texts may be placed
-- on covers that bracket the Document within the aggregate, or the
-- electronic equivalent of covers if the Document is in electronic
-- form. Otherwise they must appear on printed covers that bracket
-- the whole aggregate.
--
-- 8. TRANSLATION
--
-- Translation is considered a kind of modification, so you may
-- distribute translations of the Document under the terms of section
-- 4. Replacing Invariant Sections with translations requires special
-- permission from their copyright holders, but you may include
-- translations of some or all Invariant Sections in addition to the
-- original versions of these Invariant Sections. You may include a
-- translation of this License, and all the license notices in the
-- Document, and any Warranty Disclaimers, provided that you also
-- include the original English version of this License and the
-- original versions of those notices and disclaimers. In case of a
-- disagreement between the translation and the original version of
-- this License or a notice or disclaimer, the original version will
-- prevail.
--
-- If a section in the Document is Entitled "Acknowledgements",
-- "Dedications", or "History", the requirement (section 4) to
-- Preserve its Title (section 1) will typically require changing the
-- actual title.
--
-- 9. TERMINATION
--
-- You may not copy, modify, sublicense, or distribute the Document
-- except as expressly provided under this License. Any attempt
-- otherwise to copy, modify, sublicense, or distribute it is void,
-- and will automatically terminate your rights under this License.
--
-- However, if you cease all violation of this License, then your
-- license from a particular copyright holder is reinstated (a)
-- provisionally, unless and until the copyright holder explicitly
-- and finally terminates your license, and (b) permanently, if the
-- copyright holder fails to notify you of the violation by some
-- reasonable means prior to 60 days after the cessation.
--
-- Moreover, your license from a particular copyright holder is
-- reinstated permanently if the copyright holder notifies you of the
-- violation by some reasonable means, this is the first time you have
-- received notice of violation of this License (for any work) from
-- that copyright holder, and you cure the violation prior to 30 days
-- after your receipt of the notice.
--
-- Termination of your rights under this section does not terminate
-- the licenses of parties who have received copies or rights from
-- you under this License. If your rights have been terminated and
-- not permanently reinstated, receipt of a copy of some or all of
-- the same material does not give you any rights to use it.
--
-- 10. FUTURE REVISIONS OF THIS LICENSE
--
-- The Free Software Foundation may publish new, revised versions of
-- the GNU Free Documentation License from time to time. Such new
-- versions will be similar in spirit to the present version, but may
-- differ in detail to address new problems or concerns. See
-- `http://www.gnu.org/copyleft/'.
--
-- Each version of the License is given a distinguishing version
-- number. If the Document specifies that a particular numbered
-- version of this License "or any later version" applies to it, you
-- have the option of following the terms and conditions either of
-- that specified version or of any later version that has been
-- published (not as a draft) by the Free Software Foundation. If
-- the Document does not specify a version number of this License,
-- you may choose any version ever published (not as a draft) by the
-- Free Software Foundation. If the Document specifies that a proxy
-- can decide which future versions of this License can be used, that
-- proxy's public statement of acceptance of a version permanently
-- authorizes you to choose that version for the Document.
--
-- 11. RELICENSING
--
-- "Massive Multiauthor Collaboration Site" (or "MMC Site") means any
-- World Wide Web server that publishes copyrightable works and also
-- provides prominent facilities for anybody to edit those works. A
-- public wiki that anybody can edit is an example of such a server.
-- A "Massive Multiauthor Collaboration" (or "MMC") contained in the
-- site means any set of copyrightable works thus published on the MMC
-- site.
--
-- "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0
-- license published by Creative Commons Corporation, a not-for-profit
-- corporation with a principal place of business in San Francisco,
-- California, as well as future copyleft versions of that license
-- published by that same organization.
--
-- "Incorporate" means to publish or republish a Document, in whole or
-- in part, as part of another Document.
--
-- An MMC is "eligible for relicensing" if it is licensed under this
-- License, and if all works that were first published under this
-- License somewhere other than this MMC, and subsequently
-- incorporated in whole or in part into the MMC, (1) had no cover
-- texts or invariant sections, and (2) were thus incorporated prior
-- to November 1, 2008.
--
-- The operator of an MMC Site may republish an MMC contained in the
-- site under CC-BY-SA on the same site at any time before August 1,
-- 2009, provided the MMC is eligible for relicensing.
--
--
--ADDENDUM: How to use this License for your documents
--====================================================
--
--To use this License in a document you have written, include a copy of
--the License in the document and put the following copyright and license
--notices just after the title page:
--
-- Copyright (C) YEAR YOUR NAME.
-- Permission is granted to copy, distribute and/or modify this document
-- under the terms of the GNU Free Documentation License, Version 1.3
-- or any later version published by the Free Software Foundation;
-- with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
-- Texts. A copy of the license is included in the section entitled ``GNU
-- Free Documentation License''.
--
-- If you have Invariant Sections, Front-Cover Texts and Back-Cover
--Texts, replace the "with...Texts." line with this:
--
-- with the Invariant Sections being LIST THEIR TITLES, with
-- the Front-Cover Texts being LIST, and with the Back-Cover Texts
-- being LIST.
--
-- If you have Invariant Sections without Cover Texts, or some other
--combination of the three, merge those two alternatives to suit the
--situation.
--
-- If your document contains nontrivial examples of program code, we
--recommend releasing these examples in parallel under your choice of
--free software license, such as the GNU General Public License, to
--permit their use in free software.
--
--
--File: binutils.info, Node: Binutils Index, Prev: GNU Free Documentation License, Up: Top
--
--Binutils Index
--**************
--
--
--* Menu:
--
--* --enable-deterministic-archives <1>: objcopy. (line 302)
--* --enable-deterministic-archives <2>: ranlib. (line 44)
--* --enable-deterministic-archives <3>: ar cmdline. (line 151)
--* --enable-deterministic-archives <4>: strip. (line 115)
--* --enable-deterministic-archives <5>: ar cmdline. (line 224)
--* --enable-deterministic-archives: objcopy. (line 292)
--* .stab: objdump. (line 413)
--* Add prefix to absolute paths: objdump. (line 356)
--* addr2line: addr2line. (line 6)
--* address to file name and line number: addr2line. (line 6)
--* all header information, object file: objdump. (line 531)
--* ar: ar. (line 6)
--* ar compatibility: ar. (line 60)
--* architecture: objdump. (line 197)
--* architectures available: objdump. (line 182)
--* archive contents: ranlib. (line 6)
--* Archive file symbol index information: readelf. (line 155)
--* archive headers: objdump. (line 67)
--* archives: ar. (line 6)
--* base files: dlltool. (line 124)
--* bug criteria: Bug Criteria. (line 6)
--* bug reports: Bug Reporting. (line 6)
--* bugs: Reporting Bugs. (line 6)
--* bugs, reporting: Bug Reporting. (line 6)
--* c++filt: c++filt. (line 6)
--* changing object addresses: objcopy. (line 337)
--* changing section address: objcopy. (line 347)
--* changing section LMA: objcopy. (line 356)
--* changing section VMA: objcopy. (line 369)
--* changing start address: objcopy. (line 332)
--* collections of files: ar. (line 6)
--* compatibility, ar: ar. (line 60)
--* contents of archive: ar cmdline. (line 97)
--* crash: Bug Criteria. (line 9)
--* creating archives: ar cmdline. (line 145)
--* creating thin archive: ar cmdline. (line 210)
--* cxxfilt: c++filt. (line 14)
--* dates in archive: ar cmdline. (line 184)
--* debug symbols: objdump. (line 413)
--* debugging symbols: nm. (line 147)
--* deleting from archive: ar cmdline. (line 26)
--* demangling C++ symbols: c++filt. (line 6)
--* demangling in nm: nm. (line 155)
--* demangling in objdump <1>: objdump. (line 95)
--* demangling in objdump: addr2line. (line 78)
--* deterministic archives <1>: ranlib. (line 32)
--* deterministic archives <2>: objcopy. (line 292)
--* deterministic archives <3>: ar cmdline. (line 224)
--* deterministic archives <4>: strip. (line 105)
--* deterministic archives <5>: ar cmdline. (line 151)
--* deterministic archives <6>: ranlib. (line 44)
--* deterministic archives: objcopy. (line 302)
--* disassembling object code: objdump. (line 117)
--* disassembly architecture: objdump. (line 197)
--* disassembly endianness: objdump. (line 137)
--* disassembly, with source: objdump. (line 352)
--* discarding symbols: strip. (line 6)
--* DLL: dlltool. (line 6)
--* dlltool: dlltool. (line 6)
--* DWARF: objdump. (line 378)
--* dynamic relocation entries, in object file: objdump. (line 340)
--* dynamic symbol table entries, printing: objdump. (line 515)
--* dynamic symbols: nm. (line 167)
--* ELF dynamic section information: readelf. (line 113)
--* ELF dynamic symbol table information: readelf. (line 88)
--* ELF file header information: readelf. (line 57)
--* ELF file information: readelf. (line 6)
--* ELF notes: readelf. (line 97)
--* ELF object file format: objdump. (line 413)
--* ELF program header information: readelf. (line 63)
--* ELF reloc information: readelf. (line 101)
--* ELF section group information: readelf. (line 74)
--* ELF section information: readelf. (line 79)
--* ELF segment information: readelf. (line 63)
--* ELF symbol table information: readelf. (line 84)
--* ELF version sections information: readelf. (line 117)
--* elfedit: elfedit. (line 6)
--* endianness: objdump. (line 137)
--* error on valid input: Bug Criteria. (line 12)
--* external symbols: nm. (line 179)
--* extract from archive: ar cmdline. (line 112)
--* fatal signal: Bug Criteria. (line 9)
--* file name: nm. (line 141)
--* header information, all: objdump. (line 531)
--* input .def file: dlltool. (line 120)
--* input file name: nm. (line 141)
--* Instruction width: objdump. (line 373)
--* libraries: ar. (line 25)
--* listings strings: strings. (line 6)
--* load plugin: nm. (line 252)
--* machine instructions: objdump. (line 117)
--* moving in archive: ar cmdline. (line 34)
--* MRI compatibility, ar: ar scripts. (line 8)
--* name duplication in archive: ar cmdline. (line 106)
--* name length: ar. (line 18)
--* nm: nm. (line 6)
--* nm compatibility: nm. (line 173)
--* nm format: nm. (line 173)
--* not writing archive index: ar cmdline. (line 203)
--* objdump: objdump. (line 6)
--* object code format <1>: strings. (line 67)
--* object code format <2>: nm. (line 278)
--* object code format <3>: addr2line. (line 73)
--* object code format <4>: objdump. (line 81)
--* object code format: size. (line 84)
--* object file header: objdump. (line 143)
--* object file information: objdump. (line 6)
--* object file offsets: objdump. (line 148)
--* object file sections: objdump. (line 347)
--* object formats available: objdump. (line 182)
--* operations on archive: ar cmdline. (line 22)
--* printing from archive: ar cmdline. (line 46)
--* printing strings: strings. (line 6)
--* quick append to archive: ar cmdline. (line 54)
--* radix for section sizes: size. (line 66)
--* ranlib <1>: ranlib. (line 6)
--* ranlib: ar cmdline. (line 91)
--* readelf: readelf. (line 6)
--* relative placement in archive: ar cmdline. (line 133)
--* relocation entries, in object file: objdump. (line 334)
--* removing symbols: strip. (line 6)
--* repeated names in archive: ar cmdline. (line 106)
--* replacement in archive: ar cmdline. (line 73)
--* reporting bugs: Reporting Bugs. (line 6)
--* scripts, ar: ar scripts. (line 8)
--* section addresses in objdump: objdump. (line 73)
--* section headers: objdump. (line 164)
--* section information: objdump. (line 187)
--* section sizes: size. (line 6)
--* sections, full contents: objdump. (line 347)
--* size: size. (line 6)
--* size display format: size. (line 27)
--* size number format: size. (line 66)
--* sorting symbols: nm. (line 202)
--* source code context: objdump. (line 157)
--* source disassembly: objdump. (line 352)
--* source file name: nm. (line 141)
--* source filenames for object files: objdump. (line 191)
--* stab: objdump. (line 413)
--* start-address: objdump. (line 422)
--* stop-address: objdump. (line 426)
--* strings: strings. (line 6)
--* strings, printing: strings. (line 6)
--* strip: strip. (line 6)
--* Strip absolute paths: objdump. (line 359)
--* symbol index <1>: ar. (line 28)
--* symbol index: ranlib. (line 6)
--* symbol index, listing: nm. (line 224)
--* symbol line numbers: nm. (line 187)
--* symbol table entries, printing: objdump. (line 431)
--* symbols: nm. (line 6)
--* symbols, discarding: strip. (line 6)
--* thin archives: ar. (line 40)
--* undefined symbols: nm. (line 235)
--* Unix compatibility, ar: ar cmdline. (line 8)
--* unwind information: readelf. (line 106)
--* Update ELF header: elfedit. (line 6)
--* updating an archive: ar cmdline. (line 215)
--* version: Top. (line 6)
--* VMA in objdump: objdump. (line 73)
--* wide output, printing: objdump. (line 537)
--* writing archive index: ar cmdline. (line 197)
--
--
--
--Tag Table:
--Node: Top1896
--Node: ar3609
--Node: ar cmdline6747
--Node: ar scripts17089
--Node: nm22777
--Node: objcopy32671
--Node: objdump64440
--Node: ranlib86571
--Node: size88176
--Node: strings91180
--Node: strip93638
--Node: c++filt100870
--Ref: c++filt-Footnote-1105711
--Node: addr2line105817
--Node: nlmconv110154
--Node: windmc112759
--Node: windres116408
--Node: dlltool122769
--Node: def file format135649
--Node: readelf138188
--Node: elfedit145743
--Node: Common Options147997
--Node: Selecting the Target System149037
--Node: Target Selection149969
--Node: Architecture Selection151951
--Node: Reporting Bugs152779
--Node: Bug Criteria153558
--Node: Bug Reporting154111
--Node: GNU Free Documentation License160981
--Node: Binutils Index186160
--
--End Tag Table
-diff -Nur binutils-2.24.orig/binutils/doc/cxxfilt.man binutils-2.24/binutils/doc/cxxfilt.man
---- binutils-2.24.orig/binutils/doc/cxxfilt.man 2013-11-18 09:49:32.000000000 +0100
-+++ binutils-2.24/binutils/doc/cxxfilt.man 1970-01-01 01:00:00.000000000 +0100
-@@ -1,336 +0,0 @@
--.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14)
--.\"
--.\" Standard preamble:
--.\" ========================================================================
--.de Sp \" Vertical space (when we can't use .PP)
--.if t .sp .5v
--.if n .sp
--..
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--.ie \nF \{\
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--. rr F
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--. de IX
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--.if \n(.H>23 .if \n(.V>19 \
--\{\
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--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "C++FILT 1"
--.TH C++FILT 1 "2013-11-18" "binutils-2.23.91" "GNU Development Tools"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--cxxfilt \- Demangle C++ and Java symbols.
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--c++filt [\fB\-_\fR|\fB\-\-strip\-underscore\fR]
-- [\fB\-n\fR|\fB\-\-no\-strip\-underscore\fR]
-- [\fB\-p\fR|\fB\-\-no\-params\fR]
-- [\fB\-t\fR|\fB\-\-types\fR]
-- [\fB\-i\fR|\fB\-\-no\-verbose\fR]
-- [\fB\-s\fR \fIformat\fR|\fB\-\-format=\fR\fIformat\fR]
-- [\fB\-\-help\fR] [\fB\-\-version\fR] [\fIsymbol\fR...]
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--The \*(C+ and Java languages provide function overloading, which means
--that you can write many functions with the same name, providing that
--each function takes parameters of different types. In order to be
--able to distinguish these similarly named functions \*(C+ and Java
--encode them into a low-level assembler name which uniquely identifies
--each different version. This process is known as \fImangling\fR. The
--\&\fBc++filt\fR
--[1]
--program does the inverse mapping: it decodes (\fIdemangles\fR) low-level
--names into user-level names so that they can be read.
--.PP
--Every alphanumeric word (consisting of letters, digits, underscores,
--dollars, or periods) seen in the input is a potential mangled name.
--If the name decodes into a \*(C+ name, the \*(C+ name replaces the
--low-level name in the output, otherwise the original word is output.
--In this way you can pass an entire assembler source file, containing
--mangled names, through \fBc++filt\fR and see the same source file
--containing demangled names.
--.PP
--You can also use \fBc++filt\fR to decipher individual symbols by
--passing them on the command line:
--.PP
--.Vb 1
--\& c++filt <symbol>
--.Ve
--.PP
--If no \fIsymbol\fR arguments are given, \fBc++filt\fR reads symbol
--names from the standard input instead. All the results are printed on
--the standard output. The difference between reading names from the
--command line versus reading names from the standard input is that
--command line arguments are expected to be just mangled names and no
--checking is performed to separate them from surrounding text. Thus
--for example:
--.PP
--.Vb 1
--\& c++filt \-n _Z1fv
--.Ve
--.PP
--will work and demangle the name to \*(L"f()\*(R" whereas:
--.PP
--.Vb 1
--\& c++filt \-n _Z1fv,
--.Ve
--.PP
--will not work. (Note the extra comma at the end of the mangled
--name which makes it invalid). This command however will work:
--.PP
--.Vb 1
--\& echo _Z1fv, | c++filt \-n
--.Ve
--.PP
--and will display \*(L"f(),\*(R", i.e., the demangled name followed by a
--trailing comma. This behaviour is because when the names are read
--from the standard input it is expected that they might be part of an
--assembler source file where there might be extra, extraneous
--characters trailing after a mangled name. For example:
--.PP
--.Vb 1
--\& .type _Z1fv, @function
--.Ve
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--.IP "\fB\-_\fR" 4
--.IX Item "-_"
--.PD 0
--.IP "\fB\-\-strip\-underscore\fR" 4
--.IX Item "--strip-underscore"
--.PD
--On some systems, both the C and \*(C+ compilers put an underscore in front
--of every name. For example, the C name \f(CW\*(C`foo\*(C'\fR gets the low-level
--name \f(CW\*(C`_foo\*(C'\fR. This option removes the initial underscore. Whether
--\&\fBc++filt\fR removes the underscore by default is target dependent.
--.IP "\fB\-n\fR" 4
--.IX Item "-n"
--.PD 0
--.IP "\fB\-\-no\-strip\-underscore\fR" 4
--.IX Item "--no-strip-underscore"
--.PD
--Do not remove the initial underscore.
--.IP "\fB\-p\fR" 4
--.IX Item "-p"
--.PD 0
--.IP "\fB\-\-no\-params\fR" 4
--.IX Item "--no-params"
--.PD
--When demangling the name of a function, do not display the types of
--the function's parameters.
--.IP "\fB\-t\fR" 4
--.IX Item "-t"
--.PD 0
--.IP "\fB\-\-types\fR" 4
--.IX Item "--types"
--.PD
--Attempt to demangle types as well as function names. This is disabled
--by default since mangled types are normally only used internally in
--the compiler, and they can be confused with non-mangled names. For example,
--a function called \*(L"a\*(R" treated as a mangled type name would be
--demangled to \*(L"signed char\*(R".
--.IP "\fB\-i\fR" 4
--.IX Item "-i"
--.PD 0
--.IP "\fB\-\-no\-verbose\fR" 4
--.IX Item "--no-verbose"
--.PD
--Do not include implementation details (if any) in the demangled
--output.
--.IP "\fB\-s\fR \fIformat\fR" 4
--.IX Item "-s format"
--.PD 0
--.IP "\fB\-\-format=\fR\fIformat\fR" 4
--.IX Item "--format=format"
--.PD
--\&\fBc++filt\fR can decode various methods of mangling, used by
--different compilers. The argument to this option selects which
--method it uses:
--.RS 4
--.ie n .IP """auto""" 4
--.el .IP "\f(CWauto\fR" 4
--.IX Item "auto"
--Automatic selection based on executable (the default method)
--.ie n .IP """gnu""" 4
--.el .IP "\f(CWgnu\fR" 4
--.IX Item "gnu"
--the one used by the \s-1GNU\s0 \*(C+ compiler (g++)
--.ie n .IP """lucid""" 4
--.el .IP "\f(CWlucid\fR" 4
--.IX Item "lucid"
--the one used by the Lucid compiler (lcc)
--.ie n .IP """arm""" 4
--.el .IP "\f(CWarm\fR" 4
--.IX Item "arm"
--the one specified by the \*(C+ Annotated Reference Manual
--.ie n .IP """hp""" 4
--.el .IP "\f(CWhp\fR" 4
--.IX Item "hp"
--the one used by the \s-1HP\s0 compiler (aCC)
--.ie n .IP """edg""" 4
--.el .IP "\f(CWedg\fR" 4
--.IX Item "edg"
--the one used by the \s-1EDG\s0 compiler
--.ie n .IP """gnu\-v3""" 4
--.el .IP "\f(CWgnu\-v3\fR" 4
--.IX Item "gnu-v3"
--the one used by the \s-1GNU\s0 \*(C+ compiler (g++) with the V3 \s-1ABI\s0.
--.ie n .IP """java""" 4
--.el .IP "\f(CWjava\fR" 4
--.IX Item "java"
--the one used by the \s-1GNU\s0 Java compiler (gcj)
--.ie n .IP """gnat""" 4
--.el .IP "\f(CWgnat\fR" 4
--.IX Item "gnat"
--the one used by the \s-1GNU\s0 Ada compiler (\s-1GNAT\s0).
--.RE
--.RS 4
--.RE
--.IP "\fB\-\-help\fR" 4
--.IX Item "--help"
--Print a summary of the options to \fBc++filt\fR and exit.
--.IP "\fB\-\-version\fR" 4
--.IX Item "--version"
--Print the version number of \fBc++filt\fR and exit.
--.IP "\fB@\fR\fIfile\fR" 4
--.IX Item "@file"
--Read command-line options from \fIfile\fR. The options read are
--inserted in place of the original @\fIfile\fR option. If \fIfile\fR
--does not exist, or cannot be read, then the option will be treated
--literally, and not removed.
--.Sp
--Options in \fIfile\fR are separated by whitespace. A whitespace
--character may be included in an option by surrounding the entire
--option in either single or double quotes. Any character (including a
--backslash) may be included by prefixing the character to be included
--with a backslash. The \fIfile\fR may itself contain additional
--@\fIfile\fR options; any such options will be processed recursively.
--.SH "FOOTNOTES"
--.IX Header "FOOTNOTES"
--.IP "1." 4
--MS-DOS does not allow \f(CW\*(C`+\*(C'\fR characters in file names, so on
--MS-DOS this program is named \fB\s-1CXXFILT\s0\fR.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--the Info entries for \fIbinutils\fR.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1991\-2013 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/binutils/doc/dlltool.1 binutils-2.24/binutils/doc/dlltool.1
---- binutils-2.24.orig/binutils/doc/dlltool.1 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/doc/dlltool.1 1970-01-01 01:00:00.000000000 +0100
-@@ -1,529 +0,0 @@
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--.if n .sp
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--.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
--.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
--.\" nothing in troff, for use with C<>.
--.tr \(*W-
--.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
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--.el .ds Aq '
--.\"
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--.\" entries marked with X<> in POD. Of course, you'll have to process the
--.\" output yourself in some meaningful fashion.
--.ie \nF \{\
--. de IX
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--..
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--. rr F
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--. de IX
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--.if t \{\
--. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
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--. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
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--. \" troff and (daisy-wheel) nroff accents
--.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
--.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
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--.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
--.ds ae a\h'-(\w'a'u*4/10)'e
--.ds Ae A\h'-(\w'A'u*4/10)'E
--. \" corrections for vroff
--.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
--.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
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--.if \n(.H>23 .if \n(.V>19 \
--\{\
--. ds : e
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--. ds o a
--. ds d- d\h'-1'\(ga
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--. ds th \o'bp'
--. ds Th \o'LP'
--. ds ae ae
--. ds Ae AE
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--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "DLLTOOL 1"
--.TH DLLTOOL 1 "2013-11-18" "binutils-2.23.91" "GNU Development Tools"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--dlltool \- Create files needed to build and use DLLs.
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--dlltool [\fB\-d\fR|\fB\-\-input\-def\fR \fIdef-file-name\fR]
-- [\fB\-b\fR|\fB\-\-base\-file\fR \fIbase-file-name\fR]
-- [\fB\-e\fR|\fB\-\-output\-exp\fR \fIexports-file-name\fR]
-- [\fB\-z\fR|\fB\-\-output\-def\fR \fIdef-file-name\fR]
-- [\fB\-l\fR|\fB\-\-output\-lib\fR \fIlibrary-file-name\fR]
-- [\fB\-y\fR|\fB\-\-output\-delaylib\fR \fIlibrary-file-name\fR]
-- [\fB\-\-export\-all\-symbols\fR] [\fB\-\-no\-export\-all\-symbols\fR]
-- [\fB\-\-exclude\-symbols\fR \fIlist\fR]
-- [\fB\-\-no\-default\-excludes\fR]
-- [\fB\-S\fR|\fB\-\-as\fR \fIpath-to-assembler\fR] [\fB\-f\fR|\fB\-\-as\-flags\fR \fIoptions\fR]
-- [\fB\-D\fR|\fB\-\-dllname\fR \fIname\fR] [\fB\-m\fR|\fB\-\-machine\fR \fImachine\fR]
-- [\fB\-a\fR|\fB\-\-add\-indirect\fR]
-- [\fB\-U\fR|\fB\-\-add\-underscore\fR] [\fB\-\-add\-stdcall\-underscore\fR]
-- [\fB\-k\fR|\fB\-\-kill\-at\fR] [\fB\-A\fR|\fB\-\-add\-stdcall\-alias\fR]
-- [\fB\-p\fR|\fB\-\-ext\-prefix\-alias\fR \fIprefix\fR]
-- [\fB\-x\fR|\fB\-\-no\-idata4\fR] [\fB\-c\fR|\fB\-\-no\-idata5\fR]
-- [\fB\-\-use\-nul\-prefixed\-import\-tables\fR]
-- [\fB\-I\fR|\fB\-\-identify\fR \fIlibrary-file-name\fR] [\fB\-\-identify\-strict\fR]
-- [\fB\-i\fR|\fB\-\-interwork\fR]
-- [\fB\-n\fR|\fB\-\-nodelete\fR] [\fB\-t\fR|\fB\-\-temp\-prefix\fR \fIprefix\fR]
-- [\fB\-v\fR|\fB\-\-verbose\fR]
-- [\fB\-h\fR|\fB\-\-help\fR] [\fB\-V\fR|\fB\-\-version\fR]
-- [\fB\-\-no\-leading\-underscore\fR] [\fB\-\-leading\-underscore\fR]
-- [object\-file ...]
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--\&\fBdlltool\fR reads its inputs, which can come from the \fB\-d\fR and
--\&\fB\-b\fR options as well as object files specified on the command
--line. It then processes these inputs and if the \fB\-e\fR option has
--been specified it creates a exports file. If the \fB\-l\fR option
--has been specified it creates a library file and if the \fB\-z\fR option
--has been specified it creates a def file. Any or all of the \fB\-e\fR,
--\&\fB\-l\fR and \fB\-z\fR options can be present in one invocation of
--dlltool.
--.PP
--When creating a \s-1DLL\s0, along with the source for the \s-1DLL\s0, it is necessary
--to have three other files. \fBdlltool\fR can help with the creation of
--these files.
--.PP
--The first file is a \fI.def\fR file which specifies which functions are
--exported from the \s-1DLL\s0, which functions the \s-1DLL\s0 imports, and so on. This
--is a text file and can be created by hand, or \fBdlltool\fR can be used
--to create it using the \fB\-z\fR option. In this case \fBdlltool\fR
--will scan the object files specified on its command line looking for
--those functions which have been specially marked as being exported and
--put entries for them in the \fI.def\fR file it creates.
--.PP
--In order to mark a function as being exported from a \s-1DLL\s0, it needs to
--have an \fB\-export:<name_of_function>\fR entry in the \fB.drectve\fR
--section of the object file. This can be done in C by using the
--\&\fIasm()\fR operator:
--.PP
--.Vb 2
--\& asm (".section .drectve");
--\& asm (".ascii \e"\-export:my_func\e"");
--\&
--\& int my_func (void) { ... }
--.Ve
--.PP
--The second file needed for \s-1DLL\s0 creation is an exports file. This file
--is linked with the object files that make up the body of the \s-1DLL\s0 and it
--handles the interface between the \s-1DLL\s0 and the outside world. This is a
--binary file and it can be created by giving the \fB\-e\fR option to
--\&\fBdlltool\fR when it is creating or reading in a \fI.def\fR file.
--.PP
--The third file needed for \s-1DLL\s0 creation is the library file that programs
--will link with in order to access the functions in the \s-1DLL\s0 (an `import
--library'). This file can be created by giving the \fB\-l\fR option to
--dlltool when it is creating or reading in a \fI.def\fR file.
--.PP
--If the \fB\-y\fR option is specified, dlltool generates a delay-import
--library that can be used instead of the normal import library to allow
--a program to link to the dll only as soon as an imported function is
--called for the first time. The resulting executable will need to be
--linked to the static delayimp library containing _\|\fI_delayLoadHelper2()\fR,
--which in turn will import LoadLibraryA and GetProcAddress from kernel32.
--.PP
--\&\fBdlltool\fR builds the library file by hand, but it builds the
--exports file by creating temporary files containing assembler statements
--and then assembling these. The \fB\-S\fR command line option can be
--used to specify the path to the assembler that dlltool will use,
--and the \fB\-f\fR option can be used to pass specific flags to that
--assembler. The \fB\-n\fR can be used to prevent dlltool from deleting
--these temporary assembler files when it is done, and if \fB\-n\fR is
--specified twice then this will prevent dlltool from deleting the
--temporary object files it used to build the library.
--.PP
--Here is an example of creating a \s-1DLL\s0 from a source file \fBdll.c\fR and
--also creating a program (from an object file called \fBprogram.o\fR)
--that uses that \s-1DLL:\s0
--.PP
--.Vb 4
--\& gcc \-c dll.c
--\& dlltool \-e exports.o \-l dll.lib dll.o
--\& gcc dll.o exports.o \-o dll.dll
--\& gcc program.o dll.lib \-o program
--.Ve
--.PP
--\&\fBdlltool\fR may also be used to query an existing import library
--to determine the name of the \s-1DLL\s0 to which it is associated. See the
--description of the \fB\-I\fR or \fB\-\-identify\fR option.
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--The command line options have the following meanings:
--.IP "\fB\-d\fR \fIfilename\fR" 4
--.IX Item "-d filename"
--.PD 0
--.IP "\fB\-\-input\-def\fR \fIfilename\fR" 4
--.IX Item "--input-def filename"
--.PD
--Specifies the name of a \fI.def\fR file to be read in and processed.
--.IP "\fB\-b\fR \fIfilename\fR" 4
--.IX Item "-b filename"
--.PD 0
--.IP "\fB\-\-base\-file\fR \fIfilename\fR" 4
--.IX Item "--base-file filename"
--.PD
--Specifies the name of a base file to be read in and processed. The
--contents of this file will be added to the relocation section in the
--exports file generated by dlltool.
--.IP "\fB\-e\fR \fIfilename\fR" 4
--.IX Item "-e filename"
--.PD 0
--.IP "\fB\-\-output\-exp\fR \fIfilename\fR" 4
--.IX Item "--output-exp filename"
--.PD
--Specifies the name of the export file to be created by dlltool.
--.IP "\fB\-z\fR \fIfilename\fR" 4
--.IX Item "-z filename"
--.PD 0
--.IP "\fB\-\-output\-def\fR \fIfilename\fR" 4
--.IX Item "--output-def filename"
--.PD
--Specifies the name of the \fI.def\fR file to be created by dlltool.
--.IP "\fB\-l\fR \fIfilename\fR" 4
--.IX Item "-l filename"
--.PD 0
--.IP "\fB\-\-output\-lib\fR \fIfilename\fR" 4
--.IX Item "--output-lib filename"
--.PD
--Specifies the name of the library file to be created by dlltool.
--.IP "\fB\-y\fR \fIfilename\fR" 4
--.IX Item "-y filename"
--.PD 0
--.IP "\fB\-\-output\-delaylib\fR \fIfilename\fR" 4
--.IX Item "--output-delaylib filename"
--.PD
--Specifies the name of the delay-import library file to be created by dlltool.
--.IP "\fB\-\-export\-all\-symbols\fR" 4
--.IX Item "--export-all-symbols"
--Treat all global and weak defined symbols found in the input object
--files as symbols to be exported. There is a small list of symbols which
--are not exported by default; see the \fB\-\-no\-default\-excludes\fR
--option. You may add to the list of symbols to not export by using the
--\&\fB\-\-exclude\-symbols\fR option.
--.IP "\fB\-\-no\-export\-all\-symbols\fR" 4
--.IX Item "--no-export-all-symbols"
--Only export symbols explicitly listed in an input \fI.def\fR file or in
--\&\fB.drectve\fR sections in the input object files. This is the default
--behaviour. The \fB.drectve\fR sections are created by \fBdllexport\fR
--attributes in the source code.
--.IP "\fB\-\-exclude\-symbols\fR \fIlist\fR" 4
--.IX Item "--exclude-symbols list"
--Do not export the symbols in \fIlist\fR. This is a list of symbol names
--separated by comma or colon characters. The symbol names should not
--contain a leading underscore. This is only meaningful when
--\&\fB\-\-export\-all\-symbols\fR is used.
--.IP "\fB\-\-no\-default\-excludes\fR" 4
--.IX Item "--no-default-excludes"
--When \fB\-\-export\-all\-symbols\fR is used, it will by default avoid
--exporting certain special symbols. The current list of symbols to avoid
--exporting is \fBDllMain@12\fR, \fBDllEntryPoint@0\fR,
--\&\fBimpure_ptr\fR. You may use the \fB\-\-no\-default\-excludes\fR option
--to go ahead and export these special symbols. This is only meaningful
--when \fB\-\-export\-all\-symbols\fR is used.
--.IP "\fB\-S\fR \fIpath\fR" 4
--.IX Item "-S path"
--.PD 0
--.IP "\fB\-\-as\fR \fIpath\fR" 4
--.IX Item "--as path"
--.PD
--Specifies the path, including the filename, of the assembler to be used
--to create the exports file.
--.IP "\fB\-f\fR \fIoptions\fR" 4
--.IX Item "-f options"
--.PD 0
--.IP "\fB\-\-as\-flags\fR \fIoptions\fR" 4
--.IX Item "--as-flags options"
--.PD
--Specifies any specific command line options to be passed to the
--assembler when building the exports file. This option will work even if
--the \fB\-S\fR option is not used. This option only takes one argument,
--and if it occurs more than once on the command line, then later
--occurrences will override earlier occurrences. So if it is necessary to
--pass multiple options to the assembler they should be enclosed in
--double quotes.
--.IP "\fB\-D\fR \fIname\fR" 4
--.IX Item "-D name"
--.PD 0
--.IP "\fB\-\-dll\-name\fR \fIname\fR" 4
--.IX Item "--dll-name name"
--.PD
--Specifies the name to be stored in the \fI.def\fR file as the name of
--the \s-1DLL\s0 when the \fB\-e\fR option is used. If this option is not
--present, then the filename given to the \fB\-e\fR option will be
--used as the name of the \s-1DLL\s0.
--.IP "\fB\-m\fR \fImachine\fR" 4
--.IX Item "-m machine"
--.PD 0
--.IP "\fB\-machine\fR \fImachine\fR" 4
--.IX Item "-machine machine"
--.PD
--Specifies the type of machine for which the library file should be
--built. \fBdlltool\fR has a built in default type, depending upon how
--it was created, but this option can be used to override that. This is
--normally only useful when creating DLLs for an \s-1ARM\s0 processor, when the
--contents of the \s-1DLL\s0 are actually encode using Thumb instructions.
--.IP "\fB\-a\fR" 4
--.IX Item "-a"
--.PD 0
--.IP "\fB\-\-add\-indirect\fR" 4
--.IX Item "--add-indirect"
--.PD
--Specifies that when \fBdlltool\fR is creating the exports file it
--should add a section which allows the exported functions to be
--referenced without using the import library. Whatever the hell that
--means!
--.IP "\fB\-U\fR" 4
--.IX Item "-U"
--.PD 0
--.IP "\fB\-\-add\-underscore\fR" 4
--.IX Item "--add-underscore"
--.PD
--Specifies that when \fBdlltool\fR is creating the exports file it
--should prepend an underscore to the names of \fIall\fR exported symbols.
--.IP "\fB\-\-no\-leading\-underscore\fR" 4
--.IX Item "--no-leading-underscore"
--.PD 0
--.IP "\fB\-\-leading\-underscore\fR" 4
--.IX Item "--leading-underscore"
--.PD
--Specifies whether standard symbol should be forced to be prefixed, or
--not.
--.IP "\fB\-\-add\-stdcall\-underscore\fR" 4
--.IX Item "--add-stdcall-underscore"
--Specifies that when \fBdlltool\fR is creating the exports file it
--should prepend an underscore to the names of exported \fIstdcall\fR
--functions. Variable names and non-stdcall function names are not modified.
--This option is useful when creating GNU-compatible import libs for third
--party DLLs that were built with MS-Windows tools.
--.IP "\fB\-k\fR" 4
--.IX Item "-k"
--.PD 0
--.IP "\fB\-\-kill\-at\fR" 4
--.IX Item "--kill-at"
--.PD
--Specifies that when \fBdlltool\fR is creating the exports file it
--should not append the string \fB@ <number>\fR. These numbers are
--called ordinal numbers and they represent another way of accessing the
--function in a \s-1DLL\s0, other than by name.
--.IP "\fB\-A\fR" 4
--.IX Item "-A"
--.PD 0
--.IP "\fB\-\-add\-stdcall\-alias\fR" 4
--.IX Item "--add-stdcall-alias"
--.PD
--Specifies that when \fBdlltool\fR is creating the exports file it
--should add aliases for stdcall symbols without \fB@ <number>\fR
--in addition to the symbols with \fB@ <number>\fR.
--.IP "\fB\-p\fR" 4
--.IX Item "-p"
--.PD 0
--.IP "\fB\-\-ext\-prefix\-alias\fR \fIprefix\fR" 4
--.IX Item "--ext-prefix-alias prefix"
--.PD
--Causes \fBdlltool\fR to create external aliases for all \s-1DLL\s0
--imports with the specified prefix. The aliases are created for both
--external and import symbols with no leading underscore.
--.IP "\fB\-x\fR" 4
--.IX Item "-x"
--.PD 0
--.IP "\fB\-\-no\-idata4\fR" 4
--.IX Item "--no-idata4"
--.PD
--Specifies that when \fBdlltool\fR is creating the exports and library
--files it should omit the \f(CW\*(C`.idata4\*(C'\fR section. This is for compatibility
--with certain operating systems.
--.IP "\fB\-\-use\-nul\-prefixed\-import\-tables\fR" 4
--.IX Item "--use-nul-prefixed-import-tables"
--Specifies that when \fBdlltool\fR is creating the exports and library
--files it should prefix the \f(CW\*(C`.idata4\*(C'\fR and \f(CW\*(C`.idata5\*(C'\fR by zero an
--element. This emulates old gnu import library generation of
--\&\f(CW\*(C`dlltool\*(C'\fR. By default this option is turned off.
--.IP "\fB\-c\fR" 4
--.IX Item "-c"
--.PD 0
--.IP "\fB\-\-no\-idata5\fR" 4
--.IX Item "--no-idata5"
--.PD
--Specifies that when \fBdlltool\fR is creating the exports and library
--files it should omit the \f(CW\*(C`.idata5\*(C'\fR section. This is for compatibility
--with certain operating systems.
--.IP "\fB\-I\fR \fIfilename\fR" 4
--.IX Item "-I filename"
--.PD 0
--.IP "\fB\-\-identify\fR \fIfilename\fR" 4
--.IX Item "--identify filename"
--.PD
--Specifies that \fBdlltool\fR should inspect the import library
--indicated by \fIfilename\fR and report, on \f(CW\*(C`stdout\*(C'\fR, the name(s)
--of the associated \s-1DLL\s0(s). This can be performed in addition to any
--other operations indicated by the other options and arguments.
--\&\fBdlltool\fR fails if the import library does not exist or is not
--actually an import library. See also \fB\-\-identify\-strict\fR.
--.IP "\fB\-\-identify\-strict\fR" 4
--.IX Item "--identify-strict"
--Modifies the behavior of the \fB\-\-identify\fR option, such
--that an error is reported if \fIfilename\fR is associated with
--more than one \s-1DLL\s0.
--.IP "\fB\-i\fR" 4
--.IX Item "-i"
--.PD 0
--.IP "\fB\-\-interwork\fR" 4
--.IX Item "--interwork"
--.PD
--Specifies that \fBdlltool\fR should mark the objects in the library
--file and exports file that it produces as supporting interworking
--between \s-1ARM\s0 and Thumb code.
--.IP "\fB\-n\fR" 4
--.IX Item "-n"
--.PD 0
--.IP "\fB\-\-nodelete\fR" 4
--.IX Item "--nodelete"
--.PD
--Makes \fBdlltool\fR preserve the temporary assembler files it used to
--create the exports file. If this option is repeated then dlltool will
--also preserve the temporary object files it uses to create the library
--file.
--.IP "\fB\-t\fR \fIprefix\fR" 4
--.IX Item "-t prefix"
--.PD 0
--.IP "\fB\-\-temp\-prefix\fR \fIprefix\fR" 4
--.IX Item "--temp-prefix prefix"
--.PD
--Makes \fBdlltool\fR use \fIprefix\fR when constructing the names of
--temporary assembler and object files. By default, the temp file prefix
--is generated from the pid.
--.IP "\fB\-v\fR" 4
--.IX Item "-v"
--.PD 0
--.IP "\fB\-\-verbose\fR" 4
--.IX Item "--verbose"
--.PD
--Make dlltool describe what it is doing.
--.IP "\fB\-h\fR" 4
--.IX Item "-h"
--.PD 0
--.IP "\fB\-\-help\fR" 4
--.IX Item "--help"
--.PD
--Displays a list of command line options and then exits.
--.IP "\fB\-V\fR" 4
--.IX Item "-V"
--.PD 0
--.IP "\fB\-\-version\fR" 4
--.IX Item "--version"
--.PD
--Displays dlltool's version number and then exits.
--.IP "\fB@\fR\fIfile\fR" 4
--.IX Item "@file"
--Read command-line options from \fIfile\fR. The options read are
--inserted in place of the original @\fIfile\fR option. If \fIfile\fR
--does not exist, or cannot be read, then the option will be treated
--literally, and not removed.
--.Sp
--Options in \fIfile\fR are separated by whitespace. A whitespace
--character may be included in an option by surrounding the entire
--option in either single or double quotes. Any character (including a
--backslash) may be included by prefixing the character to be included
--with a backslash. The \fIfile\fR may itself contain additional
--@\fIfile\fR options; any such options will be processed recursively.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--The Info pages for \fIbinutils\fR.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1991\-2013 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/binutils/doc/elfedit.1 binutils-2.24/binutils/doc/elfedit.1
---- binutils-2.24.orig/binutils/doc/elfedit.1 2013-11-18 09:49:31.000000000 +0100
-+++ binutils-2.24/binutils/doc/elfedit.1 1970-01-01 01:00:00.000000000 +0100
-@@ -1,233 +0,0 @@
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--.if n .sp
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--.ie \n(.g .ds Aq \(aq
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--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "ELFEDIT 1"
--.TH ELFEDIT 1 "2013-11-18" "binutils-2.23.91" "GNU Development Tools"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--elfedit \- Update the ELF header of ELF files.
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--elfedit [\fB\-\-input\-mach=\fR\fImachine\fR]
-- [\fB\-\-input\-type=\fR\fItype\fR]
-- [\fB\-\-input\-osabi=\fR\fIosabi\fR]
-- \fB\-\-output\-mach=\fR\fImachine\fR
-- \fB\-\-output\-type=\fR\fItype\fR
-- \fB\-\-output\-osabi=\fR\fIosabi\fR
-- [\fB\-v\fR|\fB\-\-version\fR]
-- [\fB\-h\fR|\fB\-\-help\fR]
-- \fIelffile\fR...
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--\&\fBelfedit\fR updates the \s-1ELF\s0 header of \s-1ELF\s0 files which have
--the matching \s-1ELF\s0 machine and file types. The options control how and
--which fields in the \s-1ELF\s0 header should be updated.
--.PP
--\&\fIelffile\fR... are the \s-1ELF\s0 files to be updated. 32\-bit and
--64\-bit \s-1ELF\s0 files are supported, as are archives containing \s-1ELF\s0 files.
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--The long and short forms of options, shown here as alternatives, are
--equivalent. At least one of the \fB\-\-output\-mach\fR,
--\&\fB\-\-output\-type\fR and \fB\-\-output\-osabi\fR options must be given.
--.IP "\fB\-\-input\-mach=\fR\fImachine\fR" 4
--.IX Item "--input-mach=machine"
--Set the matching input \s-1ELF\s0 machine type to \fImachine\fR. If
--\&\fB\-\-input\-mach\fR isn't specified, it will match any \s-1ELF\s0
--machine types.
--.Sp
--The supported \s-1ELF\s0 machine types are, \fIL1OM\fR, \fIK1OM\fR and
--\&\fIx86\-64\fR.
--.IP "\fB\-\-output\-mach=\fR\fImachine\fR" 4
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--.Sp
--The supported \s-1ELF\s0 file types are, \fIrel\fR, \fIexec\fR and \fIdyn\fR.
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--Change the \s-1ELF\s0 file type in the \s-1ELF\s0 header to \fItype\fR. The
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--.IP "\fB\-\-input\-osabi=\fR\fIosabi\fR" 4
--.IX Item "--input-osabi=osabi"
--Set the matching input \s-1ELF\s0 file \s-1OSABI\s0 to \fIosabi\fR. If
--\&\fB\-\-input\-osabi\fR isn't specified, it will match any \s-1ELF\s0 OSABIs.
--.Sp
--The supported \s-1ELF\s0 OSABIs are, \fInone\fR, \fI\s-1HPUX\s0\fR, \fINetBSD\fR,
--\&\fI\s-1GNU\s0\fR, \fILinux\fR (alias for \fI\s-1GNU\s0\fR),
--\&\fISolaris\fR, \fI\s-1AIX\s0\fR, \fIIrix\fR,
--\&\fIFreeBSD\fR, \fI\s-1TRU64\s0\fR, \fIModesto\fR, \fIOpenBSD\fR, \fIOpenVMS\fR,
--\&\fI\s-1NSK\s0\fR, \fI\s-1AROS\s0\fR and \fIFenixOS\fR.
--.IP "\fB\-\-output\-osabi=\fR\fIosabi\fR" 4
--.IX Item "--output-osabi=osabi"
--Change the \s-1ELF\s0 \s-1OSABI\s0 in the \s-1ELF\s0 header to \fIosabi\fR. The
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--.IP "\fB\-v\fR" 4
--.IX Item "-v"
--.PD 0
--.IP "\fB\-\-version\fR" 4
--.IX Item "--version"
--.PD
--Display the version number of \fBelfedit\fR.
--.IP "\fB\-h\fR" 4
--.IX Item "-h"
--.PD 0
--.IP "\fB\-\-help\fR" 4
--.IX Item "--help"
--.PD
--Display the command line options understood by \fBelfedit\fR.
--.IP "\fB@\fR\fIfile\fR" 4
--.IX Item "@file"
--Read command-line options from \fIfile\fR. The options read are
--inserted in place of the original @\fIfile\fR option. If \fIfile\fR
--does not exist, or cannot be read, then the option will be treated
--literally, and not removed.
--.Sp
--Options in \fIfile\fR are separated by whitespace. A whitespace
--character may be included in an option by surrounding the entire
--option in either single or double quotes. Any character (including a
--backslash) may be included by prefixing the character to be included
--with a backslash. The \fIfile\fR may itself contain additional
--@\fIfile\fR options; any such options will be processed recursively.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--\&\fIreadelf\fR\|(1), and the Info entries for \fIbinutils\fR.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1991\-2013 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/binutils/doc/nlmconv.1 binutils-2.24/binutils/doc/nlmconv.1
---- binutils-2.24.orig/binutils/doc/nlmconv.1 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/doc/nlmconv.1 1970-01-01 01:00:00.000000000 +0100
-@@ -1,242 +0,0 @@
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--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "NLMCONV 1"
--.TH NLMCONV 1 "2013-11-18" "binutils-2.23.91" "GNU Development Tools"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--nlmconv \- converts object code into an NLM.
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--nlmconv [\fB\-I\fR \fIbfdname\fR|\fB\-\-input\-target=\fR\fIbfdname\fR]
-- [\fB\-O\fR \fIbfdname\fR|\fB\-\-output\-target=\fR\fIbfdname\fR]
-- [\fB\-T\fR \fIheaderfile\fR|\fB\-\-header\-file=\fR\fIheaderfile\fR]
-- [\fB\-d\fR|\fB\-\-debug\fR] [\fB\-l\fR \fIlinker\fR|\fB\-\-linker=\fR\fIlinker\fR]
-- [\fB\-h\fR|\fB\-\-help\fR] [\fB\-V\fR|\fB\-\-version\fR]
-- \fIinfile\fR \fIoutfile\fR
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--\&\fBnlmconv\fR converts the relocatable \fBi386\fR object file
--\&\fIinfile\fR into the NetWare Loadable Module \fIoutfile\fR, optionally
--reading \fIheaderfile\fR for \s-1NLM\s0 header information. For instructions
--on writing the \s-1NLM\s0 command file language used in header files, see the
--\&\fBlinkers\fR section, \fB\s-1NLMLINK\s0\fR in particular, of the \fI\s-1NLM\s0
--Development and Tools Overview\fR, which is part of the \s-1NLM\s0 Software
--Developer's Kit (\*(L"\s-1NLM\s0 \s-1SDK\s0\*(R"), available from Novell, Inc.
--\&\fBnlmconv\fR uses the \s-1GNU\s0 Binary File Descriptor library to read
--\&\fIinfile\fR;
--.PP
--\&\fBnlmconv\fR can perform a link step. In other words, you can list
--more than one object file for input if you list them in the definitions
--file (rather than simply specifying one input file on the command line).
--In this case, \fBnlmconv\fR calls the linker for you.
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--.IP "\fB\-I\fR \fIbfdname\fR" 4
--.IX Item "-I bfdname"
--.PD 0
--.IP "\fB\-\-input\-target=\fR\fIbfdname\fR" 4
--.IX Item "--input-target=bfdname"
--.PD
--Object format of the input file. \fBnlmconv\fR can usually determine
--the format of a given file (so no default is necessary).
--.IP "\fB\-O\fR \fIbfdname\fR" 4
--.IX Item "-O bfdname"
--.PD 0
--.IP "\fB\-\-output\-target=\fR\fIbfdname\fR" 4
--.IX Item "--output-target=bfdname"
--.PD
--Object format of the output file. \fBnlmconv\fR infers the output
--format based on the input format, e.g. for a \fBi386\fR input file the
--output format is \fBnlm32\-i386\fR.
--.IP "\fB\-T\fR \fIheaderfile\fR" 4
--.IX Item "-T headerfile"
--.PD 0
--.IP "\fB\-\-header\-file=\fR\fIheaderfile\fR" 4
--.IX Item "--header-file=headerfile"
--.PD
--Reads \fIheaderfile\fR for \s-1NLM\s0 header information. For instructions on
--writing the \s-1NLM\s0 command file language used in header files, see see the
--\&\fBlinkers\fR section, of the \fI\s-1NLM\s0 Development and Tools
--Overview\fR, which is part of the \s-1NLM\s0 Software Developer's Kit, available
--from Novell, Inc.
--.IP "\fB\-d\fR" 4
--.IX Item "-d"
--.PD 0
--.IP "\fB\-\-debug\fR" 4
--.IX Item "--debug"
--.PD
--Displays (on standard error) the linker command line used by \fBnlmconv\fR.
--.IP "\fB\-l\fR \fIlinker\fR" 4
--.IX Item "-l linker"
--.PD 0
--.IP "\fB\-\-linker=\fR\fIlinker\fR" 4
--.IX Item "--linker=linker"
--.PD
--Use \fIlinker\fR for any linking. \fIlinker\fR can be an absolute or a
--relative pathname.
--.IP "\fB\-h\fR" 4
--.IX Item "-h"
--.PD 0
--.IP "\fB\-\-help\fR" 4
--.IX Item "--help"
--.PD
--Prints a usage summary.
--.IP "\fB\-V\fR" 4
--.IX Item "-V"
--.PD 0
--.IP "\fB\-\-version\fR" 4
--.IX Item "--version"
--.PD
--Prints the version number for \fBnlmconv\fR.
--.IP "\fB@\fR\fIfile\fR" 4
--.IX Item "@file"
--Read command-line options from \fIfile\fR. The options read are
--inserted in place of the original @\fIfile\fR option. If \fIfile\fR
--does not exist, or cannot be read, then the option will be treated
--literally, and not removed.
--.Sp
--Options in \fIfile\fR are separated by whitespace. A whitespace
--character may be included in an option by surrounding the entire
--option in either single or double quotes. Any character (including a
--backslash) may be included by prefixing the character to be included
--with a backslash. The \fIfile\fR may itself contain additional
--@\fIfile\fR options; any such options will be processed recursively.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--the Info entries for \fIbinutils\fR.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1991\-2013 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/binutils/doc/nm.1 binutils-2.24/binutils/doc/nm.1
---- binutils-2.24.orig/binutils/doc/nm.1 2013-11-18 09:49:31.000000000 +0100
-+++ binutils-2.24/binutils/doc/nm.1 1970-01-01 01:00:00.000000000 +0100
-@@ -1,530 +0,0 @@
--.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14)
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--.\" entries marked with X<> in POD. Of course, you'll have to process the
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--. de IX
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--.if \n(.H>23 .if \n(.V>19 \
--\{\
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--. ds o a
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--. ds ae ae
--. ds Ae AE
--.\}
--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "NM 1"
--.TH NM 1 "2013-11-18" "binutils-2.23.91" "GNU Development Tools"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--nm \- list symbols from object files
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--nm [\fB\-A\fR|\fB\-o\fR|\fB\-\-print\-file\-name\fR] [\fB\-a\fR|\fB\-\-debug\-syms\fR]
-- [\fB\-B\fR|\fB\-\-format=bsd\fR] [\fB\-C\fR|\fB\-\-demangle\fR[=\fIstyle\fR]]
-- [\fB\-D\fR|\fB\-\-dynamic\fR] [\fB\-f\fR\fIformat\fR|\fB\-\-format=\fR\fIformat\fR]
-- [\fB\-g\fR|\fB\-\-extern\-only\fR] [\fB\-h\fR|\fB\-\-help\fR]
-- [\fB\-l\fR|\fB\-\-line\-numbers\fR] [\fB\-n\fR|\fB\-v\fR|\fB\-\-numeric\-sort\fR]
-- [\fB\-P\fR|\fB\-\-portability\fR] [\fB\-p\fR|\fB\-\-no\-sort\fR]
-- [\fB\-r\fR|\fB\-\-reverse\-sort\fR] [\fB\-S\fR|\fB\-\-print\-size\fR]
-- [\fB\-s\fR|\fB\-\-print\-armap\fR] [\fB\-t\fR \fIradix\fR|\fB\-\-radix=\fR\fIradix\fR]
-- [\fB\-u\fR|\fB\-\-undefined\-only\fR] [\fB\-V\fR|\fB\-\-version\fR]
-- [\fB\-X 32_64\fR] [\fB\-\-defined\-only\fR] [\fB\-\-no\-demangle\fR]
-- [\fB\-\-plugin\fR \fIname\fR] [\fB\-\-size\-sort\fR] [\fB\-\-special\-syms\fR]
-- [\fB\-\-synthetic\fR] [\fB\-\-target=\fR\fIbfdname\fR]
-- [\fIobjfile\fR...]
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--\&\s-1GNU\s0 \fBnm\fR lists the symbols from object files \fIobjfile\fR....
--If no object files are listed as arguments, \fBnm\fR assumes the file
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--.PP
--For each symbol, \fBnm\fR shows:
--.IP "\(bu" 4
--The symbol value, in the radix selected by options (see below), or
--hexadecimal by default.
--.IP "\(bu" 4
--The symbol type. At least the following types are used; others are, as
--well, depending on the object file format. If lowercase, the symbol is
--usually local; if uppercase, the symbol is global (external). There
--are however a few lowercase symbols that are shown for special global
--symbols (\f(CW\*(C`u\*(C'\fR, \f(CW\*(C`v\*(C'\fR and \f(CW\*(C`w\*(C'\fR).
--.RS 4
--.ie n .IP """A""" 4
--.el .IP "\f(CWA\fR" 4
--.IX Item "A"
--The symbol's value is absolute, and will not be changed by further
--linking.
--.ie n .IP """B""" 4
--.el .IP "\f(CWB\fR" 4
--.IX Item "B"
--.PD 0
--.ie n .IP """b""" 4
--.el .IP "\f(CWb\fR" 4
--.IX Item "b"
--.PD
--The symbol is in the uninitialized data section (known as \s-1BSS\s0).
--.ie n .IP """C""" 4
--.el .IP "\f(CWC\fR" 4
--.IX Item "C"
--The symbol is common. Common symbols are uninitialized data. When
--linking, multiple common symbols may appear with the same name. If the
--symbol is defined anywhere, the common symbols are treated as undefined
--references.
--.ie n .IP """D""" 4
--.el .IP "\f(CWD\fR" 4
--.IX Item "D"
--.PD 0
--.ie n .IP """d""" 4
--.el .IP "\f(CWd\fR" 4
--.IX Item "d"
--.PD
--The symbol is in the initialized data section.
--.ie n .IP """G""" 4
--.el .IP "\f(CWG\fR" 4
--.IX Item "G"
--.PD 0
--.ie n .IP """g""" 4
--.el .IP "\f(CWg\fR" 4
--.IX Item "g"
--.PD
--The symbol is in an initialized data section for small objects. Some
--object file formats permit more efficient access to small data objects,
--such as a global int variable as opposed to a large global array.
--.ie n .IP """i""" 4
--.el .IP "\f(CWi\fR" 4
--.IX Item "i"
--For \s-1PE\s0 format files this indicates that the symbol is in a section
--specific to the implementation of DLLs. For \s-1ELF\s0 format files this
--indicates that the symbol is an indirect function. This is a \s-1GNU\s0
--extension to the standard set of \s-1ELF\s0 symbol types. It indicates a
--symbol which if referenced by a relocation does not evaluate to its
--address, but instead must be invoked at runtime. The runtime
--execution will then return the value to be used in the relocation.
--.ie n .IP """I""" 4
--.el .IP "\f(CWI\fR" 4
--.IX Item "I"
--The symbol is an indirect reference to another symbol.
--.ie n .IP """N""" 4
--.el .IP "\f(CWN\fR" 4
--.IX Item "N"
--The symbol is a debugging symbol.
--.ie n .IP """p""" 4
--.el .IP "\f(CWp\fR" 4
--.IX Item "p"
--The symbols is in a stack unwind section.
--.ie n .IP """R""" 4
--.el .IP "\f(CWR\fR" 4
--.IX Item "R"
--.PD 0
--.ie n .IP """r""" 4
--.el .IP "\f(CWr\fR" 4
--.IX Item "r"
--.PD
--The symbol is in a read only data section.
--.ie n .IP """S""" 4
--.el .IP "\f(CWS\fR" 4
--.IX Item "S"
--.PD 0
--.ie n .IP """s""" 4
--.el .IP "\f(CWs\fR" 4
--.IX Item "s"
--.PD
--The symbol is in an uninitialized data section for small objects.
--.ie n .IP """T""" 4
--.el .IP "\f(CWT\fR" 4
--.IX Item "T"
--.PD 0
--.ie n .IP """t""" 4
--.el .IP "\f(CWt\fR" 4
--.IX Item "t"
--.PD
--The symbol is in the text (code) section.
--.ie n .IP """U""" 4
--.el .IP "\f(CWU\fR" 4
--.IX Item "U"
--The symbol is undefined.
--.ie n .IP """u""" 4
--.el .IP "\f(CWu\fR" 4
--.IX Item "u"
--The symbol is a unique global symbol. This is a \s-1GNU\s0 extension to the
--standard set of \s-1ELF\s0 symbol bindings. For such a symbol the dynamic linker
--will make sure that in the entire process there is just one symbol with
--this name and type in use.
--.ie n .IP """V""" 4
--.el .IP "\f(CWV\fR" 4
--.IX Item "V"
--.PD 0
--.ie n .IP """v""" 4
--.el .IP "\f(CWv\fR" 4
--.IX Item "v"
--.PD
--The symbol is a weak object. When a weak defined symbol is linked with
--a normal defined symbol, the normal defined symbol is used with no error.
--When a weak undefined symbol is linked and the symbol is not defined,
--the value of the weak symbol becomes zero with no error. On some
--systems, uppercase indicates that a default value has been specified.
--.ie n .IP """W""" 4
--.el .IP "\f(CWW\fR" 4
--.IX Item "W"
--.PD 0
--.ie n .IP """w""" 4
--.el .IP "\f(CWw\fR" 4
--.IX Item "w"
--.PD
--The symbol is a weak symbol that has not been specifically tagged as a
--weak object symbol. When a weak defined symbol is linked with a normal
--defined symbol, the normal defined symbol is used with no error.
--When a weak undefined symbol is linked and the symbol is not defined,
--the value of the symbol is determined in a system-specific manner without
--error. On some systems, uppercase indicates that a default value has been
--specified.
--.ie n .IP """\-""" 4
--.el .IP "\f(CW\-\fR" 4
--.IX Item "-"
--The symbol is a stabs symbol in an a.out object file. In this case, the
--next values printed are the stabs other field, the stabs desc field, and
--the stab type. Stabs symbols are used to hold debugging information.
--.ie n .IP """?""" 4
--.el .IP "\f(CW?\fR" 4
--.IX Item "?"
--The symbol type is unknown, or object file format specific.
--.RE
--.RS 4
--.RE
--.IP "\(bu" 4
--The symbol name.
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--The long and short forms of options, shown here as alternatives, are
--equivalent.
--.IP "\fB\-A\fR" 4
--.IX Item "-A"
--.PD 0
--.IP "\fB\-o\fR" 4
--.IX Item "-o"
--.IP "\fB\-\-print\-file\-name\fR" 4
--.IX Item "--print-file-name"
--.PD
--Precede each symbol by the name of the input file (or archive member)
--in which it was found, rather than identifying the input file once only,
--before all of its symbols.
--.IP "\fB\-a\fR" 4
--.IX Item "-a"
--.PD 0
--.IP "\fB\-\-debug\-syms\fR" 4
--.IX Item "--debug-syms"
--.PD
--Display all symbols, even debugger-only symbols; normally these are not
--listed.
--.IP "\fB\-B\fR" 4
--.IX Item "-B"
--The same as \fB\-\-format=bsd\fR (for compatibility with the \s-1MIPS\s0 \fBnm\fR).
--.IP "\fB\-C\fR" 4
--.IX Item "-C"
--.PD 0
--.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4
--.IX Item "--demangle[=style]"
--.PD
--Decode (\fIdemangle\fR) low-level symbol names into user-level names.
--Besides removing any initial underscore prepended by the system, this
--makes \*(C+ function names readable. Different compilers have different
--mangling styles. The optional demangling style argument can be used to
--choose an appropriate demangling style for your compiler.
--.IP "\fB\-\-no\-demangle\fR" 4
--.IX Item "--no-demangle"
--Do not demangle low-level symbol names. This is the default.
--.IP "\fB\-D\fR" 4
--.IX Item "-D"
--.PD 0
--.IP "\fB\-\-dynamic\fR" 4
--.IX Item "--dynamic"
--.PD
--Display the dynamic symbols rather than the normal symbols. This is
--only meaningful for dynamic objects, such as certain types of shared
--libraries.
--.IP "\fB\-f\fR \fIformat\fR" 4
--.IX Item "-f format"
--.PD 0
--.IP "\fB\-\-format=\fR\fIformat\fR" 4
--.IX Item "--format=format"
--.PD
--Use the output format \fIformat\fR, which can be \f(CW\*(C`bsd\*(C'\fR,
--\&\f(CW\*(C`sysv\*(C'\fR, or \f(CW\*(C`posix\*(C'\fR. The default is \f(CW\*(C`bsd\*(C'\fR.
--Only the first character of \fIformat\fR is significant; it can be
--either upper or lower case.
--.IP "\fB\-g\fR" 4
--.IX Item "-g"
--.PD 0
--.IP "\fB\-\-extern\-only\fR" 4
--.IX Item "--extern-only"
--.PD
--Display only external symbols.
--.IP "\fB\-h\fR" 4
--.IX Item "-h"
--.PD 0
--.IP "\fB\-\-help\fR" 4
--.IX Item "--help"
--.PD
--Show a summary of the options to \fBnm\fR and exit.
--.IP "\fB\-l\fR" 4
--.IX Item "-l"
--.PD 0
--.IP "\fB\-\-line\-numbers\fR" 4
--.IX Item "--line-numbers"
--.PD
--For each symbol, use debugging information to try to find a filename and
--line number. For a defined symbol, look for the line number of the
--address of the symbol. For an undefined symbol, look for the line
--number of a relocation entry which refers to the symbol. If line number
--information can be found, print it after the other symbol information.
--.IP "\fB\-n\fR" 4
--.IX Item "-n"
--.PD 0
--.IP "\fB\-v\fR" 4
--.IX Item "-v"
--.IP "\fB\-\-numeric\-sort\fR" 4
--.IX Item "--numeric-sort"
--.PD
--Sort symbols numerically by their addresses, rather than alphabetically
--by their names.
--.IP "\fB\-p\fR" 4
--.IX Item "-p"
--.PD 0
--.IP "\fB\-\-no\-sort\fR" 4
--.IX Item "--no-sort"
--.PD
--Do not bother to sort the symbols in any order; print them in the order
--encountered.
--.IP "\fB\-P\fR" 4
--.IX Item "-P"
--.PD 0
--.IP "\fB\-\-portability\fR" 4
--.IX Item "--portability"
--.PD
--Use the \s-1POSIX\s0.2 standard output format instead of the default format.
--Equivalent to \fB\-f posix\fR.
--.IP "\fB\-r\fR" 4
--.IX Item "-r"
--.PD 0
--.IP "\fB\-\-reverse\-sort\fR" 4
--.IX Item "--reverse-sort"
--.PD
--Reverse the order of the sort (whether numeric or alphabetic); let the
--last come first.
--.IP "\fB\-S\fR" 4
--.IX Item "-S"
--.PD 0
--.IP "\fB\-\-print\-size\fR" 4
--.IX Item "--print-size"
--.PD
--Print both value and size of defined symbols for the \f(CW\*(C`bsd\*(C'\fR output style.
--This option has no effect for object formats that do not record symbol
--sizes, unless \fB\-\-size\-sort\fR is also used in which case a
--calculated size is displayed.
--.IP "\fB\-s\fR" 4
--.IX Item "-s"
--.PD 0
--.IP "\fB\-\-print\-armap\fR" 4
--.IX Item "--print-armap"
--.PD
--When listing symbols from archive members, include the index: a mapping
--(stored in the archive by \fBar\fR or \fBranlib\fR) of which modules
--contain definitions for which names.
--.IP "\fB\-t\fR \fIradix\fR" 4
--.IX Item "-t radix"
--.PD 0
--.IP "\fB\-\-radix=\fR\fIradix\fR" 4
--.IX Item "--radix=radix"
--.PD
--Use \fIradix\fR as the radix for printing the symbol values. It must be
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--.IP "\fB\-u\fR" 4
--.IX Item "-u"
--.PD 0
--.IP "\fB\-\-undefined\-only\fR" 4
--.IX Item "--undefined-only"
--.PD
--Display only undefined symbols (those external to each object file).
--.IP "\fB\-V\fR" 4
--.IX Item "-V"
--.PD 0
--.IP "\fB\-\-version\fR" 4
--.IX Item "--version"
--.PD
--Show the version number of \fBnm\fR and exit.
--.IP "\fB\-X\fR" 4
--.IX Item "-X"
--This option is ignored for compatibility with the \s-1AIX\s0 version of
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--\&\fB32_64\fR. The default mode of \s-1AIX\s0 \fBnm\fR corresponds
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--.IP "\fB\-\-defined\-only\fR" 4
--.IX Item "--defined-only"
--Display only defined symbols for each object file.
--.IP "\fB\-\-plugin\fR \fIname\fR" 4
--.IX Item "--plugin name"
--Load the plugin called \fIname\fR to add support for extra target
--types. This option is only available if the toolchain has been built
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--.IP "\fB\-\-size\-sort\fR" 4
--.IX Item "--size-sort"
--Sort symbols by size. The size is computed as the difference between
--the value of the symbol and the value of the symbol with the next higher
--value. If the \f(CW\*(C`bsd\*(C'\fR output format is used the size of the symbol
--is printed, rather than the value, and \fB\-S\fR must be used in order
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--.IP "\fB\-\-special\-syms\fR" 4
--.IX Item "--special-syms"
--Display symbols which have a target-specific special meaning. These
--symbols are usually used by the target for some special processing and
--are not normally helpful when included in the normal symbol lists.
--For example for \s-1ARM\s0 targets this option would skip the mapping symbols
--used to mark transitions between \s-1ARM\s0 code, \s-1THUMB\s0 code and data.
--.IP "\fB\-\-synthetic\fR" 4
--.IX Item "--synthetic"
--Include synthetic symbols in the output. These are special symbols
--created by the linker for various purposes. They are not shown by
--default since they are not part of the binary's original source code.
--.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
--.IX Item "--target=bfdname"
--Specify an object code format other than your system's default format.
--.IP "\fB@\fR\fIfile\fR" 4
--.IX Item "@file"
--Read command-line options from \fIfile\fR. The options read are
--inserted in place of the original @\fIfile\fR option. If \fIfile\fR
--does not exist, or cannot be read, then the option will be treated
--literally, and not removed.
--.Sp
--Options in \fIfile\fR are separated by whitespace. A whitespace
--character may be included in an option by surrounding the entire
--option in either single or double quotes. Any character (including a
--backslash) may be included by prefixing the character to be included
--with a backslash. The \fIfile\fR may itself contain additional
--@\fIfile\fR options; any such options will be processed recursively.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--\&\fIar\fR\|(1), \fIobjdump\fR\|(1), \fIranlib\fR\|(1), and the Info entries for \fIbinutils\fR.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1991\-2013 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/binutils/doc/objcopy.1 binutils-2.24/binutils/doc/objcopy.1
---- binutils-2.24.orig/binutils/doc/objcopy.1 2013-11-18 09:49:31.000000000 +0100
-+++ binutils-2.24/binutils/doc/objcopy.1 1970-01-01 01:00:00.000000000 +0100
-@@ -1,1012 +0,0 @@
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--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "OBJCOPY 1"
--.TH OBJCOPY 1 "2013-11-18" "binutils-2.23.91" "GNU Development Tools"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--objcopy \- copy and translate object files
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--objcopy [\fB\-F\fR \fIbfdname\fR|\fB\-\-target=\fR\fIbfdname\fR]
-- [\fB\-I\fR \fIbfdname\fR|\fB\-\-input\-target=\fR\fIbfdname\fR]
-- [\fB\-O\fR \fIbfdname\fR|\fB\-\-output\-target=\fR\fIbfdname\fR]
-- [\fB\-B\fR \fIbfdarch\fR|\fB\-\-binary\-architecture=\fR\fIbfdarch\fR]
-- [\fB\-S\fR|\fB\-\-strip\-all\fR]
-- [\fB\-g\fR|\fB\-\-strip\-debug\fR]
-- [\fB\-K\fR \fIsymbolname\fR|\fB\-\-keep\-symbol=\fR\fIsymbolname\fR]
-- [\fB\-N\fR \fIsymbolname\fR|\fB\-\-strip\-symbol=\fR\fIsymbolname\fR]
-- [\fB\-\-strip\-unneeded\-symbol=\fR\fIsymbolname\fR]
-- [\fB\-G\fR \fIsymbolname\fR|\fB\-\-keep\-global\-symbol=\fR\fIsymbolname\fR]
-- [\fB\-\-localize\-hidden\fR]
-- [\fB\-L\fR \fIsymbolname\fR|\fB\-\-localize\-symbol=\fR\fIsymbolname\fR]
-- [\fB\-\-globalize\-symbol=\fR\fIsymbolname\fR]
-- [\fB\-W\fR \fIsymbolname\fR|\fB\-\-weaken\-symbol=\fR\fIsymbolname\fR]
-- [\fB\-w\fR|\fB\-\-wildcard\fR]
-- [\fB\-x\fR|\fB\-\-discard\-all\fR]
-- [\fB\-X\fR|\fB\-\-discard\-locals\fR]
-- [\fB\-b\fR \fIbyte\fR|\fB\-\-byte=\fR\fIbyte\fR]
-- [\fB\-i\fR [\fIbreadth\fR]|\fB\-\-interleave\fR[=\fIbreadth\fR]]
-- [\fB\-\-interleave\-width=\fR\fIwidth\fR]
-- [\fB\-j\fR \fIsectionpattern\fR|\fB\-\-only\-section=\fR\fIsectionpattern\fR]
-- [\fB\-R\fR \fIsectionpattern\fR|\fB\-\-remove\-section=\fR\fIsectionpattern\fR]
-- [\fB\-p\fR|\fB\-\-preserve\-dates\fR]
-- [\fB\-D\fR|\fB\-\-enable\-deterministic\-archives\fR]
-- [\fB\-U\fR|\fB\-\-disable\-deterministic\-archives\fR]
-- [\fB\-\-debugging\fR]
-- [\fB\-\-gap\-fill=\fR\fIval\fR]
-- [\fB\-\-pad\-to=\fR\fIaddress\fR]
-- [\fB\-\-set\-start=\fR\fIval\fR]
-- [\fB\-\-adjust\-start=\fR\fIincr\fR]
-- [\fB\-\-change\-addresses=\fR\fIincr\fR]
-- [\fB\-\-change\-section\-address\fR \fIsectionpattern\fR{=,+,\-}\fIval\fR]
-- [\fB\-\-change\-section\-lma\fR \fIsectionpattern\fR{=,+,\-}\fIval\fR]
-- [\fB\-\-change\-section\-vma\fR \fIsectionpattern\fR{=,+,\-}\fIval\fR]
-- [\fB\-\-change\-warnings\fR] [\fB\-\-no\-change\-warnings\fR]
-- [\fB\-\-set\-section\-flags\fR \fIsectionpattern\fR=\fIflags\fR]
-- [\fB\-\-add\-section\fR \fIsectionname\fR=\fIfilename\fR]
-- [\fB\-\-rename\-section\fR \fIoldname\fR=\fInewname\fR[,\fIflags\fR]]
-- [\fB\-\-long\-section\-names\fR {enable,disable,keep}]
-- [\fB\-\-change\-leading\-char\fR] [\fB\-\-remove\-leading\-char\fR]
-- [\fB\-\-reverse\-bytes=\fR\fInum\fR]
-- [\fB\-\-srec\-len=\fR\fIival\fR] [\fB\-\-srec\-forceS3\fR]
-- [\fB\-\-redefine\-sym\fR \fIold\fR=\fInew\fR]
-- [\fB\-\-redefine\-syms=\fR\fIfilename\fR]
-- [\fB\-\-weaken\fR]
-- [\fB\-\-keep\-symbols=\fR\fIfilename\fR]
-- [\fB\-\-strip\-symbols=\fR\fIfilename\fR]
-- [\fB\-\-strip\-unneeded\-symbols=\fR\fIfilename\fR]
-- [\fB\-\-keep\-global\-symbols=\fR\fIfilename\fR]
-- [\fB\-\-localize\-symbols=\fR\fIfilename\fR]
-- [\fB\-\-globalize\-symbols=\fR\fIfilename\fR]
-- [\fB\-\-weaken\-symbols=\fR\fIfilename\fR]
-- [\fB\-\-alt\-machine\-code=\fR\fIindex\fR]
-- [\fB\-\-prefix\-symbols=\fR\fIstring\fR]
-- [\fB\-\-prefix\-sections=\fR\fIstring\fR]
-- [\fB\-\-prefix\-alloc\-sections=\fR\fIstring\fR]
-- [\fB\-\-add\-gnu\-debuglink=\fR\fIpath-to-file\fR]
-- [\fB\-\-keep\-file\-symbols\fR]
-- [\fB\-\-only\-keep\-debug\fR]
-- [\fB\-\-strip\-dwo\fR]
-- [\fB\-\-extract\-dwo\fR]
-- [\fB\-\-extract\-symbol\fR]
-- [\fB\-\-writable\-text\fR]
-- [\fB\-\-readonly\-text\fR]
-- [\fB\-\-pure\fR]
-- [\fB\-\-impure\fR]
-- [\fB\-\-file\-alignment=\fR\fInum\fR]
-- [\fB\-\-heap=\fR\fIsize\fR]
-- [\fB\-\-image\-base=\fR\fIaddress\fR]
-- [\fB\-\-section\-alignment=\fR\fInum\fR]
-- [\fB\-\-stack=\fR\fIsize\fR]
-- [\fB\-\-subsystem=\fR\fIwhich\fR:\fImajor\fR.\fIminor\fR]
-- [\fB\-\-compress\-debug\-sections\fR]
-- [\fB\-\-decompress\-debug\-sections\fR]
-- [\fB\-\-dwarf\-depth=\fR\fIn\fR]
-- [\fB\-\-dwarf\-start=\fR\fIn\fR]
-- [\fB\-v\fR|\fB\-\-verbose\fR]
-- [\fB\-V\fR|\fB\-\-version\fR]
-- [\fB\-\-help\fR] [\fB\-\-info\fR]
-- \fIinfile\fR [\fIoutfile\fR]
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--The \s-1GNU\s0 \fBobjcopy\fR utility copies the contents of an object
--file to another. \fBobjcopy\fR uses the \s-1GNU\s0 \s-1BFD\s0 Library to
--read and write the object files. It can write the destination object
--file in a format different from that of the source object file. The
--exact behavior of \fBobjcopy\fR is controlled by command-line options.
--Note that \fBobjcopy\fR should be able to copy a fully linked file
--between any two formats. However, copying a relocatable object file
--between any two formats may not work as expected.
--.PP
--\&\fBobjcopy\fR creates temporary files to do its translations and
--deletes them afterward. \fBobjcopy\fR uses \s-1BFD\s0 to do all its
--translation work; it has access to all the formats described in \s-1BFD\s0
--and thus is able to recognize most formats without being told
--explicitly.
--.PP
--\&\fBobjcopy\fR can be used to generate S\-records by using an output
--target of \fBsrec\fR (e.g., use \fB\-O srec\fR).
--.PP
--\&\fBobjcopy\fR can be used to generate a raw binary file by using an
--output target of \fBbinary\fR (e.g., use \fB\-O binary\fR). When
--\&\fBobjcopy\fR generates a raw binary file, it will essentially produce
--a memory dump of the contents of the input object file. All symbols and
--relocation information will be discarded. The memory dump will start at
--the load address of the lowest section copied into the output file.
--.PP
--When generating an S\-record or a raw binary file, it may be helpful to
--use \fB\-S\fR to remove sections containing debugging information. In
--some cases \fB\-R\fR will be useful to remove sections which contain
--information that is not needed by the binary file.
--.PP
--Note\-\-\-\fBobjcopy\fR is not able to change the endianness of its input
--files. If the input format has an endianness (some formats do not),
--\&\fBobjcopy\fR can only copy the inputs into file formats that have the
--same endianness or which have no endianness (e.g., \fBsrec\fR).
--(However, see the \fB\-\-reverse\-bytes\fR option.)
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--.IP "\fIinfile\fR" 4
--.IX Item "infile"
--.PD 0
--.IP "\fIoutfile\fR" 4
--.IX Item "outfile"
--.PD
--The input and output files, respectively.
--If you do not specify \fIoutfile\fR, \fBobjcopy\fR creates a
--temporary file and destructively renames the result with
--the name of \fIinfile\fR.
--.IP "\fB\-I\fR \fIbfdname\fR" 4
--.IX Item "-I bfdname"
--.PD 0
--.IP "\fB\-\-input\-target=\fR\fIbfdname\fR" 4
--.IX Item "--input-target=bfdname"
--.PD
--Consider the source file's object format to be \fIbfdname\fR, rather than
--attempting to deduce it.
--.IP "\fB\-O\fR \fIbfdname\fR" 4
--.IX Item "-O bfdname"
--.PD 0
--.IP "\fB\-\-output\-target=\fR\fIbfdname\fR" 4
--.IX Item "--output-target=bfdname"
--.PD
--Write the output file using the object format \fIbfdname\fR.
--.IP "\fB\-F\fR \fIbfdname\fR" 4
--.IX Item "-F bfdname"
--.PD 0
--.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
--.IX Item "--target=bfdname"
--.PD
--Use \fIbfdname\fR as the object format for both the input and the output
--file; i.e., simply transfer data from source to destination with no
--translation.
--.IP "\fB\-B\fR \fIbfdarch\fR" 4
--.IX Item "-B bfdarch"
--.PD 0
--.IP "\fB\-\-binary\-architecture=\fR\fIbfdarch\fR" 4
--.IX Item "--binary-architecture=bfdarch"
--.PD
--Useful when transforming a architecture-less input file into an object file.
--In this case the output architecture can be set to \fIbfdarch\fR. This
--option will be ignored if the input file has a known \fIbfdarch\fR. You
--can access this binary data inside a program by referencing the special
--symbols that are created by the conversion process. These symbols are
--called _binary_\fIobjfile\fR_start, _binary_\fIobjfile\fR_end and
--_binary_\fIobjfile\fR_size. e.g. you can transform a picture file into
--an object file and then access it in your code using these symbols.
--.IP "\fB\-j\fR \fIsectionpattern\fR" 4
--.IX Item "-j sectionpattern"
--.PD 0
--.IP "\fB\-\-only\-section=\fR\fIsectionpattern\fR" 4
--.IX Item "--only-section=sectionpattern"
--.PD
--Copy only the indicated sections from the input file to the output file.
--This option may be given more than once. Note that using this option
--inappropriately may make the output file unusable. Wildcard
--characters are accepted in \fIsectionpattern\fR.
--.IP "\fB\-R\fR \fIsectionpattern\fR" 4
--.IX Item "-R sectionpattern"
--.PD 0
--.IP "\fB\-\-remove\-section=\fR\fIsectionpattern\fR" 4
--.IX Item "--remove-section=sectionpattern"
--.PD
--Remove any section matching \fIsectionpattern\fR from the output file.
--This option may be given more than once. Note that using this option
--inappropriately may make the output file unusable. Wildcard
--characters are accepted in \fIsectionpattern\fR. Using both the
--\&\fB\-j\fR and \fB\-R\fR options together results in undefined
--behaviour.
--.IP "\fB\-S\fR" 4
--.IX Item "-S"
--.PD 0
--.IP "\fB\-\-strip\-all\fR" 4
--.IX Item "--strip-all"
--.PD
--Do not copy relocation and symbol information from the source file.
--.IP "\fB\-g\fR" 4
--.IX Item "-g"
--.PD 0
--.IP "\fB\-\-strip\-debug\fR" 4
--.IX Item "--strip-debug"
--.PD
--Do not copy debugging symbols or sections from the source file.
--.IP "\fB\-\-strip\-unneeded\fR" 4
--.IX Item "--strip-unneeded"
--Strip all symbols that are not needed for relocation processing.
--.IP "\fB\-K\fR \fIsymbolname\fR" 4
--.IX Item "-K symbolname"
--.PD 0
--.IP "\fB\-\-keep\-symbol=\fR\fIsymbolname\fR" 4
--.IX Item "--keep-symbol=symbolname"
--.PD
--When stripping symbols, keep symbol \fIsymbolname\fR even if it would
--normally be stripped. This option may be given more than once.
--.IP "\fB\-N\fR \fIsymbolname\fR" 4
--.IX Item "-N symbolname"
--.PD 0
--.IP "\fB\-\-strip\-symbol=\fR\fIsymbolname\fR" 4
--.IX Item "--strip-symbol=symbolname"
--.PD
--Do not copy symbol \fIsymbolname\fR from the source file. This option
--may be given more than once.
--.IP "\fB\-\-strip\-unneeded\-symbol=\fR\fIsymbolname\fR" 4
--.IX Item "--strip-unneeded-symbol=symbolname"
--Do not copy symbol \fIsymbolname\fR from the source file unless it is needed
--by a relocation. This option may be given more than once.
--.IP "\fB\-G\fR \fIsymbolname\fR" 4
--.IX Item "-G symbolname"
--.PD 0
--.IP "\fB\-\-keep\-global\-symbol=\fR\fIsymbolname\fR" 4
--.IX Item "--keep-global-symbol=symbolname"
--.PD
--Keep only symbol \fIsymbolname\fR global. Make all other symbols local
--to the file, so that they are not visible externally. This option may
--be given more than once.
--.IP "\fB\-\-localize\-hidden\fR" 4
--.IX Item "--localize-hidden"
--In an \s-1ELF\s0 object, mark all symbols that have hidden or internal visibility
--as local. This option applies on top of symbol-specific localization options
--such as \fB\-L\fR.
--.IP "\fB\-L\fR \fIsymbolname\fR" 4
--.IX Item "-L symbolname"
--.PD 0
--.IP "\fB\-\-localize\-symbol=\fR\fIsymbolname\fR" 4
--.IX Item "--localize-symbol=symbolname"
--.PD
--Make symbol \fIsymbolname\fR local to the file, so that it is not
--visible externally. This option may be given more than once.
--.IP "\fB\-W\fR \fIsymbolname\fR" 4
--.IX Item "-W symbolname"
--.PD 0
--.IP "\fB\-\-weaken\-symbol=\fR\fIsymbolname\fR" 4
--.IX Item "--weaken-symbol=symbolname"
--.PD
--Make symbol \fIsymbolname\fR weak. This option may be given more than once.
--.IP "\fB\-\-globalize\-symbol=\fR\fIsymbolname\fR" 4
--.IX Item "--globalize-symbol=symbolname"
--Give symbol \fIsymbolname\fR global scoping so that it is visible
--outside of the file in which it is defined. This option may be given
--more than once.
--.IP "\fB\-w\fR" 4
--.IX Item "-w"
--.PD 0
--.IP "\fB\-\-wildcard\fR" 4
--.IX Item "--wildcard"
--.PD
--Permit regular expressions in \fIsymbolname\fRs used in other command
--line options. The question mark (?), asterisk (*), backslash (\e) and
--square brackets ([]) operators can be used anywhere in the symbol
--name. If the first character of the symbol name is the exclamation
--point (!) then the sense of the switch is reversed for that symbol.
--For example:
--.Sp
--.Vb 1
--\& \-w \-W !foo \-W fo*
--.Ve
--.Sp
--would cause objcopy to weaken all symbols that start with \*(L"fo\*(R"
--except for the symbol \*(L"foo\*(R".
--.IP "\fB\-x\fR" 4
--.IX Item "-x"
--.PD 0
--.IP "\fB\-\-discard\-all\fR" 4
--.IX Item "--discard-all"
--.PD
--Do not copy non-global symbols from the source file.
--.IP "\fB\-X\fR" 4
--.IX Item "-X"
--.PD 0
--.IP "\fB\-\-discard\-locals\fR" 4
--.IX Item "--discard-locals"
--.PD
--Do not copy compiler-generated local symbols.
--(These usually start with \fBL\fR or \fB.\fR.)
--.IP "\fB\-b\fR \fIbyte\fR" 4
--.IX Item "-b byte"
--.PD 0
--.IP "\fB\-\-byte=\fR\fIbyte\fR" 4
--.IX Item "--byte=byte"
--.PD
--If interleaving has been enabled via the \fB\-\-interleave\fR option
--then start the range of bytes to keep at the \fIbyte\fRth byte.
--\&\fIbyte\fR can be in the range from 0 to \fIbreadth\fR\-1, where
--\&\fIbreadth\fR is the value given by the \fB\-\-interleave\fR option.
--.IP "\fB\-i [\fR\fIbreadth\fR\fB]\fR" 4
--.IX Item "-i [breadth]"
--.PD 0
--.IP "\fB\-\-interleave[=\fR\fIbreadth\fR\fB]\fR" 4
--.IX Item "--interleave[=breadth]"
--.PD
--Only copy a range out of every \fIbreadth\fR bytes. (Header data is
--not affected). Select which byte in the range begins the copy with
--the \fB\-\-byte\fR option. Select the width of the range with the
--\&\fB\-\-interleave\-width\fR option.
--.Sp
--This option is useful for creating files to program \s-1ROM\s0. It is
--typically used with an \f(CW\*(C`srec\*(C'\fR output target. Note that
--\&\fBobjcopy\fR will complain if you do not specify the
--\&\fB\-\-byte\fR option as well.
--.Sp
--The default interleave breadth is 4, so with \fB\-\-byte\fR set to 0,
--\&\fBobjcopy\fR would copy the first byte out of every four bytes
--from the input to the output.
--.IP "\fB\-\-interleave\-width=\fR\fIwidth\fR" 4
--.IX Item "--interleave-width=width"
--When used with the \fB\-\-interleave\fR option, copy \fIwidth\fR
--bytes at a time. The start of the range of bytes to be copied is set
--by the \fB\-\-byte\fR option, and the extent of the range is set with
--the \fB\-\-interleave\fR option.
--.Sp
--The default value for this option is 1. The value of \fIwidth\fR plus
--the \fIbyte\fR value set by the \fB\-\-byte\fR option must not exceed
--the interleave breadth set by the \fB\-\-interleave\fR option.
--.Sp
--This option can be used to create images for two 16\-bit flashes interleaved
--in a 32\-bit bus by passing \fB\-b 0 \-i 4 \-\-interleave\-width=2\fR
--and \fB\-b 2 \-i 4 \-\-interleave\-width=2\fR to two \fBobjcopy\fR
--commands. If the input was '12345678' then the outputs would be
--\&'1256' and '3478' respectively.
--.IP "\fB\-p\fR" 4
--.IX Item "-p"
--.PD 0
--.IP "\fB\-\-preserve\-dates\fR" 4
--.IX Item "--preserve-dates"
--.PD
--Set the access and modification dates of the output file to be the same
--as those of the input file.
--.IP "\fB\-D\fR" 4
--.IX Item "-D"
--.PD 0
--.IP "\fB\-\-enable\-deterministic\-archives\fR" 4
--.IX Item "--enable-deterministic-archives"
--.PD
--Operate in \fIdeterministic\fR mode. When copying archive members
--and writing the archive index, use zero for UIDs, GIDs, timestamps,
--and use consistent file modes for all files.
--.Sp
--If \fIbinutils\fR was configured with
--\&\fB\-\-enable\-deterministic\-archives\fR, then this mode is on by default.
--It can be disabled with the \fB\-U\fR option, below.
--.IP "\fB\-U\fR" 4
--.IX Item "-U"
--.PD 0
--.IP "\fB\-\-disable\-deterministic\-archives\fR" 4
--.IX Item "--disable-deterministic-archives"
--.PD
--Do \fInot\fR operate in \fIdeterministic\fR mode. This is the
--inverse of the \fB\-D\fR option, above: when copying archive members
--and writing the archive index, use their actual \s-1UID\s0, \s-1GID\s0, timestamp,
--and file mode values.
--.Sp
--This is the default unless \fIbinutils\fR was configured with
--\&\fB\-\-enable\-deterministic\-archives\fR.
--.IP "\fB\-\-debugging\fR" 4
--.IX Item "--debugging"
--Convert debugging information, if possible. This is not the default
--because only certain debugging formats are supported, and the
--conversion process can be time consuming.
--.IP "\fB\-\-gap\-fill\fR \fIval\fR" 4
--.IX Item "--gap-fill val"
--Fill gaps between sections with \fIval\fR. This operation applies to
--the \fIload address\fR (\s-1LMA\s0) of the sections. It is done by increasing
--the size of the section with the lower address, and filling in the extra
--space created with \fIval\fR.
--.IP "\fB\-\-pad\-to\fR \fIaddress\fR" 4
--.IX Item "--pad-to address"
--Pad the output file up to the load address \fIaddress\fR. This is
--done by increasing the size of the last section. The extra space is
--filled in with the value specified by \fB\-\-gap\-fill\fR (default zero).
--.IP "\fB\-\-set\-start\fR \fIval\fR" 4
--.IX Item "--set-start val"
--Set the start address of the new file to \fIval\fR. Not all object file
--formats support setting the start address.
--.IP "\fB\-\-change\-start\fR \fIincr\fR" 4
--.IX Item "--change-start incr"
--.PD 0
--.IP "\fB\-\-adjust\-start\fR \fIincr\fR" 4
--.IX Item "--adjust-start incr"
--.PD
--Change the start address by adding \fIincr\fR. Not all object file
--formats support setting the start address.
--.IP "\fB\-\-change\-addresses\fR \fIincr\fR" 4
--.IX Item "--change-addresses incr"
--.PD 0
--.IP "\fB\-\-adjust\-vma\fR \fIincr\fR" 4
--.IX Item "--adjust-vma incr"
--.PD
--Change the \s-1VMA\s0 and \s-1LMA\s0 addresses of all sections, as well as the start
--address, by adding \fIincr\fR. Some object file formats do not permit
--section addresses to be changed arbitrarily. Note that this does not
--relocate the sections; if the program expects sections to be loaded at a
--certain address, and this option is used to change the sections such
--that they are loaded at a different address, the program may fail.
--.IP "\fB\-\-change\-section\-address\fR \fIsectionpattern\fR\fB{=,+,\-}\fR\fIval\fR" 4
--.IX Item "--change-section-address sectionpattern{=,+,-}val"
--.PD 0
--.IP "\fB\-\-adjust\-section\-vma\fR \fIsectionpattern\fR\fB{=,+,\-}\fR\fIval\fR" 4
--.IX Item "--adjust-section-vma sectionpattern{=,+,-}val"
--.PD
--Set or change both the \s-1VMA\s0 address and the \s-1LMA\s0 address of any section
--matching \fIsectionpattern\fR. If \fB=\fR is used, the section
--address is set to \fIval\fR. Otherwise, \fIval\fR is added to or
--subtracted from the section address. See the comments under
--\&\fB\-\-change\-addresses\fR, above. If \fIsectionpattern\fR does not
--match any sections in the input file, a warning will be issued, unless
--\&\fB\-\-no\-change\-warnings\fR is used.
--.IP "\fB\-\-change\-section\-lma\fR \fIsectionpattern\fR\fB{=,+,\-}\fR\fIval\fR" 4
--.IX Item "--change-section-lma sectionpattern{=,+,-}val"
--Set or change the \s-1LMA\s0 address of any sections matching
--\&\fIsectionpattern\fR. The \s-1LMA\s0 address is the address where the
--section will be loaded into memory at program load time. Normally
--this is the same as the \s-1VMA\s0 address, which is the address of the
--section at program run time, but on some systems, especially those
--where a program is held in \s-1ROM\s0, the two can be different. If \fB=\fR
--is used, the section address is set to \fIval\fR. Otherwise,
--\&\fIval\fR is added to or subtracted from the section address. See the
--comments under \fB\-\-change\-addresses\fR, above. If
--\&\fIsectionpattern\fR does not match any sections in the input file, a
--warning will be issued, unless \fB\-\-no\-change\-warnings\fR is used.
--.IP "\fB\-\-change\-section\-vma\fR \fIsectionpattern\fR\fB{=,+,\-}\fR\fIval\fR" 4
--.IX Item "--change-section-vma sectionpattern{=,+,-}val"
--Set or change the \s-1VMA\s0 address of any section matching
--\&\fIsectionpattern\fR. The \s-1VMA\s0 address is the address where the
--section will be located once the program has started executing.
--Normally this is the same as the \s-1LMA\s0 address, which is the address
--where the section will be loaded into memory, but on some systems,
--especially those where a program is held in \s-1ROM\s0, the two can be
--different. If \fB=\fR is used, the section address is set to
--\&\fIval\fR. Otherwise, \fIval\fR is added to or subtracted from the
--section address. See the comments under \fB\-\-change\-addresses\fR,
--above. If \fIsectionpattern\fR does not match any sections in the
--input file, a warning will be issued, unless
--\&\fB\-\-no\-change\-warnings\fR is used.
--.IP "\fB\-\-change\-warnings\fR" 4
--.IX Item "--change-warnings"
--.PD 0
--.IP "\fB\-\-adjust\-warnings\fR" 4
--.IX Item "--adjust-warnings"
--.PD
--If \fB\-\-change\-section\-address\fR or \fB\-\-change\-section\-lma\fR or
--\&\fB\-\-change\-section\-vma\fR is used, and the section pattern does not
--match any sections, issue a warning. This is the default.
--.IP "\fB\-\-no\-change\-warnings\fR" 4
--.IX Item "--no-change-warnings"
--.PD 0
--.IP "\fB\-\-no\-adjust\-warnings\fR" 4
--.IX Item "--no-adjust-warnings"
--.PD
--Do not issue a warning if \fB\-\-change\-section\-address\fR or
--\&\fB\-\-adjust\-section\-lma\fR or \fB\-\-adjust\-section\-vma\fR is used, even
--if the section pattern does not match any sections.
--.IP "\fB\-\-set\-section\-flags\fR \fIsectionpattern\fR\fB=\fR\fIflags\fR" 4
--.IX Item "--set-section-flags sectionpattern=flags"
--Set the flags for any sections matching \fIsectionpattern\fR. The
--\&\fIflags\fR argument is a comma separated string of flag names. The
--recognized names are \fBalloc\fR, \fBcontents\fR, \fBload\fR,
--\&\fBnoload\fR, \fBreadonly\fR, \fBcode\fR, \fBdata\fR, \fBrom\fR,
--\&\fBshare\fR, and \fBdebug\fR. You can set the \fBcontents\fR flag
--for a section which does not have contents, but it is not meaningful
--to clear the \fBcontents\fR flag of a section which does have
--contents\*(--just remove the section instead. Not all flags are
--meaningful for all object file formats.
--.IP "\fB\-\-add\-section\fR \fIsectionname\fR\fB=\fR\fIfilename\fR" 4
--.IX Item "--add-section sectionname=filename"
--Add a new section named \fIsectionname\fR while copying the file. The
--contents of the new section are taken from the file \fIfilename\fR. The
--size of the section will be the size of the file. This option only
--works on file formats which can support sections with arbitrary names.
--.IP "\fB\-\-rename\-section\fR \fIoldname\fR\fB=\fR\fInewname\fR\fB[,\fR\fIflags\fR\fB]\fR" 4
--.IX Item "--rename-section oldname=newname[,flags]"
--Rename a section from \fIoldname\fR to \fInewname\fR, optionally
--changing the section's flags to \fIflags\fR in the process. This has
--the advantage over usng a linker script to perform the rename in that
--the output stays as an object file and does not become a linked
--executable.
--.Sp
--This option is particularly helpful when the input format is binary,
--since this will always create a section called .data. If for example,
--you wanted instead to create a section called .rodata containing binary
--data you could use the following command line to achieve it:
--.Sp
--.Vb 3
--\& objcopy \-I binary \-O <output_format> \-B <architecture> \e
--\& \-\-rename\-section .data=.rodata,alloc,load,readonly,data,contents \e
--\& <input_binary_file> <output_object_file>
--.Ve
--.IP "\fB\-\-long\-section\-names {enable,disable,keep}\fR" 4
--.IX Item "--long-section-names {enable,disable,keep}"
--Controls the handling of long section names when processing \f(CW\*(C`COFF\*(C'\fR
--and \f(CW\*(C`PE\-COFF\*(C'\fR object formats. The default behaviour, \fBkeep\fR,
--is to preserve long section names if any are present in the input file.
--The \fBenable\fR and \fBdisable\fR options forcibly enable or disable
--the use of long section names in the output object; when \fBdisable\fR
--is in effect, any long section names in the input object will be truncated.
--The \fBenable\fR option will only emit long section names if any are
--present in the inputs; this is mostly the same as \fBkeep\fR, but it
--is left undefined whether the \fBenable\fR option might force the
--creation of an empty string table in the output file.
--.IP "\fB\-\-change\-leading\-char\fR" 4
--.IX Item "--change-leading-char"
--Some object file formats use special characters at the start of
--symbols. The most common such character is underscore, which compilers
--often add before every symbol. This option tells \fBobjcopy\fR to
--change the leading character of every symbol when it converts between
--object file formats. If the object file formats use the same leading
--character, this option has no effect. Otherwise, it will add a
--character, or remove a character, or change a character, as
--appropriate.
--.IP "\fB\-\-remove\-leading\-char\fR" 4
--.IX Item "--remove-leading-char"
--If the first character of a global symbol is a special symbol leading
--character used by the object file format, remove the character. The
--most common symbol leading character is underscore. This option will
--remove a leading underscore from all global symbols. This can be useful
--if you want to link together objects of different file formats with
--different conventions for symbol names. This is different from
--\&\fB\-\-change\-leading\-char\fR because it always changes the symbol name
--when appropriate, regardless of the object file format of the output
--file.
--.IP "\fB\-\-reverse\-bytes=\fR\fInum\fR" 4
--.IX Item "--reverse-bytes=num"
--Reverse the bytes in a section with output contents. A section length must
--be evenly divisible by the value given in order for the swap to be able to
--take place. Reversing takes place before the interleaving is performed.
--.Sp
--This option is used typically in generating \s-1ROM\s0 images for problematic
--target systems. For example, on some target boards, the 32\-bit words
--fetched from 8\-bit ROMs are re-assembled in little-endian byte order
--regardless of the \s-1CPU\s0 byte order. Depending on the programming model, the
--endianness of the \s-1ROM\s0 may need to be modified.
--.Sp
--Consider a simple file with a section containing the following eight
--bytes: \f(CW12345678\fR.
--.Sp
--Using \fB\-\-reverse\-bytes=2\fR for the above example, the bytes in the
--output file would be ordered \f(CW21436587\fR.
--.Sp
--Using \fB\-\-reverse\-bytes=4\fR for the above example, the bytes in the
--output file would be ordered \f(CW43218765\fR.
--.Sp
--By using \fB\-\-reverse\-bytes=2\fR for the above example, followed by
--\&\fB\-\-reverse\-bytes=4\fR on the output file, the bytes in the second
--output file would be ordered \f(CW34127856\fR.
--.IP "\fB\-\-srec\-len=\fR\fIival\fR" 4
--.IX Item "--srec-len=ival"
--Meaningful only for srec output. Set the maximum length of the Srecords
--being produced to \fIival\fR. This length covers both address, data and
--crc fields.
--.IP "\fB\-\-srec\-forceS3\fR" 4
--.IX Item "--srec-forceS3"
--Meaningful only for srec output. Avoid generation of S1/S2 records,
--creating S3\-only record format.
--.IP "\fB\-\-redefine\-sym\fR \fIold\fR\fB=\fR\fInew\fR" 4
--.IX Item "--redefine-sym old=new"
--Change the name of a symbol \fIold\fR, to \fInew\fR. This can be useful
--when one is trying link two things together for which you have no
--source, and there are name collisions.
--.IP "\fB\-\-redefine\-syms=\fR\fIfilename\fR" 4
--.IX Item "--redefine-syms=filename"
--Apply \fB\-\-redefine\-sym\fR to each symbol pair "\fIold\fR \fInew\fR"
--listed in the file \fIfilename\fR. \fIfilename\fR is simply a flat file,
--with one symbol pair per line. Line comments may be introduced by the hash
--character. This option may be given more than once.
--.IP "\fB\-\-weaken\fR" 4
--.IX Item "--weaken"
--Change all global symbols in the file to be weak. This can be useful
--when building an object which will be linked against other objects using
--the \fB\-R\fR option to the linker. This option is only effective when
--using an object file format which supports weak symbols.
--.IP "\fB\-\-keep\-symbols=\fR\fIfilename\fR" 4
--.IX Item "--keep-symbols=filename"
--Apply \fB\-\-keep\-symbol\fR option to each symbol listed in the file
--\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol
--name per line. Line comments may be introduced by the hash character.
--This option may be given more than once.
--.IP "\fB\-\-strip\-symbols=\fR\fIfilename\fR" 4
--.IX Item "--strip-symbols=filename"
--Apply \fB\-\-strip\-symbol\fR option to each symbol listed in the file
--\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol
--name per line. Line comments may be introduced by the hash character.
--This option may be given more than once.
--.IP "\fB\-\-strip\-unneeded\-symbols=\fR\fIfilename\fR" 4
--.IX Item "--strip-unneeded-symbols=filename"
--Apply \fB\-\-strip\-unneeded\-symbol\fR option to each symbol listed in
--the file \fIfilename\fR. \fIfilename\fR is simply a flat file, with one
--symbol name per line. Line comments may be introduced by the hash
--character. This option may be given more than once.
--.IP "\fB\-\-keep\-global\-symbols=\fR\fIfilename\fR" 4
--.IX Item "--keep-global-symbols=filename"
--Apply \fB\-\-keep\-global\-symbol\fR option to each symbol listed in the
--file \fIfilename\fR. \fIfilename\fR is simply a flat file, with one
--symbol name per line. Line comments may be introduced by the hash
--character. This option may be given more than once.
--.IP "\fB\-\-localize\-symbols=\fR\fIfilename\fR" 4
--.IX Item "--localize-symbols=filename"
--Apply \fB\-\-localize\-symbol\fR option to each symbol listed in the file
--\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol
--name per line. Line comments may be introduced by the hash character.
--This option may be given more than once.
--.IP "\fB\-\-globalize\-symbols=\fR\fIfilename\fR" 4
--.IX Item "--globalize-symbols=filename"
--Apply \fB\-\-globalize\-symbol\fR option to each symbol listed in the file
--\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol
--name per line. Line comments may be introduced by the hash character.
--This option may be given more than once.
--.IP "\fB\-\-weaken\-symbols=\fR\fIfilename\fR" 4
--.IX Item "--weaken-symbols=filename"
--Apply \fB\-\-weaken\-symbol\fR option to each symbol listed in the file
--\&\fIfilename\fR. \fIfilename\fR is simply a flat file, with one symbol
--name per line. Line comments may be introduced by the hash character.
--This option may be given more than once.
--.IP "\fB\-\-alt\-machine\-code=\fR\fIindex\fR" 4
--.IX Item "--alt-machine-code=index"
--If the output architecture has alternate machine codes, use the
--\&\fIindex\fRth code instead of the default one. This is useful in case
--a machine is assigned an official code and the tool-chain adopts the
--new code, but other applications still depend on the original code
--being used. For \s-1ELF\s0 based architectures if the \fIindex\fR
--alternative does not exist then the value is treated as an absolute
--number to be stored in the e_machine field of the \s-1ELF\s0 header.
--.IP "\fB\-\-writable\-text\fR" 4
--.IX Item "--writable-text"
--Mark the output text as writable. This option isn't meaningful for all
--object file formats.
--.IP "\fB\-\-readonly\-text\fR" 4
--.IX Item "--readonly-text"
--Make the output text write protected. This option isn't meaningful for all
--object file formats.
--.IP "\fB\-\-pure\fR" 4
--.IX Item "--pure"
--Mark the output file as demand paged. This option isn't meaningful for all
--object file formats.
--.IP "\fB\-\-impure\fR" 4
--.IX Item "--impure"
--Mark the output file as impure. This option isn't meaningful for all
--object file formats.
--.IP "\fB\-\-prefix\-symbols=\fR\fIstring\fR" 4
--.IX Item "--prefix-symbols=string"
--Prefix all symbols in the output file with \fIstring\fR.
--.IP "\fB\-\-prefix\-sections=\fR\fIstring\fR" 4
--.IX Item "--prefix-sections=string"
--Prefix all section names in the output file with \fIstring\fR.
--.IP "\fB\-\-prefix\-alloc\-sections=\fR\fIstring\fR" 4
--.IX Item "--prefix-alloc-sections=string"
--Prefix all the names of all allocated sections in the output file with
--\&\fIstring\fR.
--.IP "\fB\-\-add\-gnu\-debuglink=\fR\fIpath-to-file\fR" 4
--.IX Item "--add-gnu-debuglink=path-to-file"
--Creates a .gnu_debuglink section which contains a reference to \fIpath-to-file\fR
--and adds it to the output file.
--.IP "\fB\-\-keep\-file\-symbols\fR" 4
--.IX Item "--keep-file-symbols"
--When stripping a file, perhaps with \fB\-\-strip\-debug\fR or
--\&\fB\-\-strip\-unneeded\fR, retain any symbols specifying source file names,
--which would otherwise get stripped.
--.IP "\fB\-\-only\-keep\-debug\fR" 4
--.IX Item "--only-keep-debug"
--Strip a file, removing contents of any sections that would not be
--stripped by \fB\-\-strip\-debug\fR and leaving the debugging sections
--intact. In \s-1ELF\s0 files, this preserves all note sections in the output.
--.Sp
--The intention is that this option will be used in conjunction with
--\&\fB\-\-add\-gnu\-debuglink\fR to create a two part executable. One a
--stripped binary which will occupy less space in \s-1RAM\s0 and in a
--distribution and the second a debugging information file which is only
--needed if debugging abilities are required. The suggested procedure
--to create these files is as follows:
--.RS 4
--.IP "1.<Link the executable as normal. Assuming that is is called>" 4
--.IX Item "1.<Link the executable as normal. Assuming that is is called>"
--\&\f(CW\*(C`foo\*(C'\fR then...
--.ie n .IP "1.<Run ""objcopy \-\-only\-keep\-debug foo foo.dbg"" to>" 4
--.el .IP "1.<Run \f(CWobjcopy \-\-only\-keep\-debug foo foo.dbg\fR to>" 4
--.IX Item "1.<Run objcopy --only-keep-debug foo foo.dbg to>"
--create a file containing the debugging info.
--.ie n .IP "1.<Run ""objcopy \-\-strip\-debug foo"" to create a>" 4
--.el .IP "1.<Run \f(CWobjcopy \-\-strip\-debug foo\fR to create a>" 4
--.IX Item "1.<Run objcopy --strip-debug foo to create a>"
--stripped executable.
--.ie n .IP "1.<Run ""objcopy \-\-add\-gnu\-debuglink=foo.dbg foo"">" 4
--.el .IP "1.<Run \f(CWobjcopy \-\-add\-gnu\-debuglink=foo.dbg foo\fR>" 4
--.IX Item "1.<Run objcopy --add-gnu-debuglink=foo.dbg foo>"
--to add a link to the debugging info into the stripped executable.
--.RE
--.RS 4
--.Sp
--Note\-\-\-the choice of \f(CW\*(C`.dbg\*(C'\fR as an extension for the debug info
--file is arbitrary. Also the \f(CW\*(C`\-\-only\-keep\-debug\*(C'\fR step is
--optional. You could instead do this:
--.IP "1.<Link the executable as normal.>" 4
--.IX Item "1.<Link the executable as normal.>"
--.PD 0
--.ie n .IP "1.<Copy ""foo"" to ""foo.full"">" 4
--.el .IP "1.<Copy \f(CWfoo\fR to \f(CWfoo.full\fR>" 4
--.IX Item "1.<Copy foo to foo.full>"
--.ie n .IP "1.<Run ""objcopy \-\-strip\-debug foo"">" 4
--.el .IP "1.<Run \f(CWobjcopy \-\-strip\-debug foo\fR>" 4
--.IX Item "1.<Run objcopy --strip-debug foo>"
--.ie n .IP "1.<Run ""objcopy \-\-add\-gnu\-debuglink=foo.full foo"">" 4
--.el .IP "1.<Run \f(CWobjcopy \-\-add\-gnu\-debuglink=foo.full foo\fR>" 4
--.IX Item "1.<Run objcopy --add-gnu-debuglink=foo.full foo>"
--.RE
--.RS 4
--.PD
--.Sp
--i.e., the file pointed to by the \fB\-\-add\-gnu\-debuglink\fR can be the
--full executable. It does not have to be a file created by the
--\&\fB\-\-only\-keep\-debug\fR switch.
--.Sp
--Note\-\-\-this switch is only intended for use on fully linked files. It
--does not make sense to use it on object files where the debugging
--information may be incomplete. Besides the gnu_debuglink feature
--currently only supports the presence of one filename containing
--debugging information, not multiple filenames on a one-per-object-file
--basis.
--.RE
--.IP "\fB\-\-strip\-dwo\fR" 4
--.IX Item "--strip-dwo"
--Remove the contents of all \s-1DWARF\s0 .dwo sections, leaving the
--remaining debugging sections and all symbols intact.
--This option is intended for use by the compiler as part of
--the \fB\-gsplit\-dwarf\fR option, which splits debug information
--between the .o file and a separate .dwo file. The compiler
--generates all debug information in the same file, then uses
--the \fB\-\-extract\-dwo\fR option to copy the .dwo sections to
--the .dwo file, then the \fB\-\-strip\-dwo\fR option to remove
--those sections from the original .o file.
--.IP "\fB\-\-extract\-dwo\fR" 4
--.IX Item "--extract-dwo"
--Extract the contents of all \s-1DWARF\s0 .dwo sections. See the
--\&\fB\-\-strip\-dwo\fR option for more information.
--.IP "\fB\-\-file\-alignment\fR \fInum\fR" 4
--.IX Item "--file-alignment num"
--Specify the file alignment. Sections in the file will always begin at
--file offsets which are multiples of this number. This defaults to
--512.
--[This option is specific to \s-1PE\s0 targets.]
--.IP "\fB\-\-heap\fR \fIreserve\fR" 4
--.IX Item "--heap reserve"
--.PD 0
--.IP "\fB\-\-heap\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4
--.IX Item "--heap reserve,commit"
--.PD
--Specify the number of bytes of memory to reserve (and optionally commit)
--to be used as heap for this program.
--[This option is specific to \s-1PE\s0 targets.]
--.IP "\fB\-\-image\-base\fR \fIvalue\fR" 4
--.IX Item "--image-base value"
--Use \fIvalue\fR as the base address of your program or dll. This is
--the lowest memory location that will be used when your program or dll
--is loaded. To reduce the need to relocate and improve performance of
--your dlls, each should have a unique base address and not overlap any
--other dlls. The default is 0x400000 for executables, and 0x10000000
--for dlls.
--[This option is specific to \s-1PE\s0 targets.]
--.IP "\fB\-\-section\-alignment\fR \fInum\fR" 4
--.IX Item "--section-alignment num"
--Sets the section alignment. Sections in memory will always begin at
--addresses which are a multiple of this number. Defaults to 0x1000.
--[This option is specific to \s-1PE\s0 targets.]
--.IP "\fB\-\-stack\fR \fIreserve\fR" 4
--.IX Item "--stack reserve"
--.PD 0
--.IP "\fB\-\-stack\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4
--.IX Item "--stack reserve,commit"
--.PD
--Specify the number of bytes of memory to reserve (and optionally commit)
--to be used as stack for this program.
--[This option is specific to \s-1PE\s0 targets.]
--.IP "\fB\-\-subsystem\fR \fIwhich\fR" 4
--.IX Item "--subsystem which"
--.PD 0
--.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR" 4
--.IX Item "--subsystem which:major"
--.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR\fB.\fR\fIminor\fR" 4
--.IX Item "--subsystem which:major.minor"
--.PD
--Specifies the subsystem under which your program will execute. The
--legal values for \fIwhich\fR are \f(CW\*(C`native\*(C'\fR, \f(CW\*(C`windows\*(C'\fR,
--\&\f(CW\*(C`console\*(C'\fR, \f(CW\*(C`posix\*(C'\fR, \f(CW\*(C`efi\-app\*(C'\fR, \f(CW\*(C`efi\-bsd\*(C'\fR,
--\&\f(CW\*(C`efi\-rtd\*(C'\fR, \f(CW\*(C`sal\-rtd\*(C'\fR, and \f(CW\*(C`xbox\*(C'\fR. You may optionally set
--the subsystem version also. Numeric values are also accepted for
--\&\fIwhich\fR.
--[This option is specific to \s-1PE\s0 targets.]
--.IP "\fB\-\-extract\-symbol\fR" 4
--.IX Item "--extract-symbol"
--Keep the file's section flags and symbols but remove all section data.
--Specifically, the option:
--.RS 4
--.IP "*<removes the contents of all sections;>" 4
--.IX Item "*<removes the contents of all sections;>"
--.PD 0
--.IP "*<sets the size of every section to zero; and>" 4
--.IX Item "*<sets the size of every section to zero; and>"
--.IP "*<sets the file's start address to zero.>" 4
--.IX Item "*<sets the file's start address to zero.>"
--.RE
--.RS 4
--.PD
--.Sp
--This option is used to build a \fI.sym\fR file for a VxWorks kernel.
--It can also be a useful way of reducing the size of a \fB\-\-just\-symbols\fR
--linker input file.
--.RE
--.IP "\fB\-\-compress\-debug\-sections\fR" 4
--.IX Item "--compress-debug-sections"
--Compress \s-1DWARF\s0 debug sections using zlib.
--.IP "\fB\-\-decompress\-debug\-sections\fR" 4
--.IX Item "--decompress-debug-sections"
--Decompress \s-1DWARF\s0 debug sections using zlib.
--.IP "\fB\-V\fR" 4
--.IX Item "-V"
--.PD 0
--.IP "\fB\-\-version\fR" 4
--.IX Item "--version"
--.PD
--Show the version number of \fBobjcopy\fR.
--.IP "\fB\-v\fR" 4
--.IX Item "-v"
--.PD 0
--.IP "\fB\-\-verbose\fR" 4
--.IX Item "--verbose"
--.PD
--Verbose output: list all object files modified. In the case of
--archives, \fBobjcopy \-V\fR lists all members of the archive.
--.IP "\fB\-\-help\fR" 4
--.IX Item "--help"
--Show a summary of the options to \fBobjcopy\fR.
--.IP "\fB\-\-info\fR" 4
--.IX Item "--info"
--Display a list showing all architectures and object formats available.
--.IP "\fB@\fR\fIfile\fR" 4
--.IX Item "@file"
--Read command-line options from \fIfile\fR. The options read are
--inserted in place of the original @\fIfile\fR option. If \fIfile\fR
--does not exist, or cannot be read, then the option will be treated
--literally, and not removed.
--.Sp
--Options in \fIfile\fR are separated by whitespace. A whitespace
--character may be included in an option by surrounding the entire
--option in either single or double quotes. Any character (including a
--backslash) may be included by prefixing the character to be included
--with a backslash. The \fIfile\fR may itself contain additional
--@\fIfile\fR options; any such options will be processed recursively.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--\&\fIld\fR\|(1), \fIobjdump\fR\|(1), and the Info entries for \fIbinutils\fR.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1991\-2013 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/binutils/doc/objdump.1 binutils-2.24/binutils/doc/objdump.1
---- binutils-2.24.orig/binutils/doc/objdump.1 2013-11-18 09:49:31.000000000 +0100
-+++ binutils-2.24/binutils/doc/objdump.1 1970-01-01 01:00:00.000000000 +0100
-@@ -1,842 +0,0 @@
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--. \" troff and (daisy-wheel) nroff accents
--.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
--.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
--.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
--.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
--.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
--.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
--.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
--.ds ae a\h'-(\w'a'u*4/10)'e
--.ds Ae A\h'-(\w'A'u*4/10)'E
--. \" corrections for vroff
--.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
--.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
--. \" for low resolution devices (crt and lpr)
--.if \n(.H>23 .if \n(.V>19 \
--\{\
--. ds : e
--. ds 8 ss
--. ds o a
--. ds d- d\h'-1'\(ga
--. ds D- D\h'-1'\(hy
--. ds th \o'bp'
--. ds Th \o'LP'
--. ds ae ae
--. ds Ae AE
--.\}
--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "OBJDUMP 1"
--.TH OBJDUMP 1 "2013-11-18" "binutils-2.23.91" "GNU Development Tools"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--objdump \- display information from object files.
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--objdump [\fB\-a\fR|\fB\-\-archive\-headers\fR]
-- [\fB\-b\fR \fIbfdname\fR|\fB\-\-target=\fR\fIbfdname\fR]
-- [\fB\-C\fR|\fB\-\-demangle\fR[=\fIstyle\fR] ]
-- [\fB\-d\fR|\fB\-\-disassemble\fR]
-- [\fB\-D\fR|\fB\-\-disassemble\-all\fR]
-- [\fB\-z\fR|\fB\-\-disassemble\-zeroes\fR]
-- [\fB\-EB\fR|\fB\-EL\fR|\fB\-\-endian=\fR{big | little }]
-- [\fB\-f\fR|\fB\-\-file\-headers\fR]
-- [\fB\-F\fR|\fB\-\-file\-offsets\fR]
-- [\fB\-\-file\-start\-context\fR]
-- [\fB\-g\fR|\fB\-\-debugging\fR]
-- [\fB\-e\fR|\fB\-\-debugging\-tags\fR]
-- [\fB\-h\fR|\fB\-\-section\-headers\fR|\fB\-\-headers\fR]
-- [\fB\-i\fR|\fB\-\-info\fR]
-- [\fB\-j\fR \fIsection\fR|\fB\-\-section=\fR\fIsection\fR]
-- [\fB\-l\fR|\fB\-\-line\-numbers\fR]
-- [\fB\-S\fR|\fB\-\-source\fR]
-- [\fB\-m\fR \fImachine\fR|\fB\-\-architecture=\fR\fImachine\fR]
-- [\fB\-M\fR \fIoptions\fR|\fB\-\-disassembler\-options=\fR\fIoptions\fR]
-- [\fB\-p\fR|\fB\-\-private\-headers\fR]
-- [\fB\-P\fR \fIoptions\fR|\fB\-\-private=\fR\fIoptions\fR]
-- [\fB\-r\fR|\fB\-\-reloc\fR]
-- [\fB\-R\fR|\fB\-\-dynamic\-reloc\fR]
-- [\fB\-s\fR|\fB\-\-full\-contents\fR]
-- [\fB\-W[lLiaprmfFsoRt]\fR|
-- \fB\-\-dwarf\fR[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]]
-- [\fB\-G\fR|\fB\-\-stabs\fR]
-- [\fB\-t\fR|\fB\-\-syms\fR]
-- [\fB\-T\fR|\fB\-\-dynamic\-syms\fR]
-- [\fB\-x\fR|\fB\-\-all\-headers\fR]
-- [\fB\-w\fR|\fB\-\-wide\fR]
-- [\fB\-\-start\-address=\fR\fIaddress\fR]
-- [\fB\-\-stop\-address=\fR\fIaddress\fR]
-- [\fB\-\-prefix\-addresses\fR]
-- [\fB\-\-[no\-]show\-raw\-insn\fR]
-- [\fB\-\-adjust\-vma=\fR\fIoffset\fR]
-- [\fB\-\-special\-syms\fR]
-- [\fB\-\-prefix=\fR\fIprefix\fR]
-- [\fB\-\-prefix\-strip=\fR\fIlevel\fR]
-- [\fB\-\-insn\-width=\fR\fIwidth\fR]
-- [\fB\-V\fR|\fB\-\-version\fR]
-- [\fB\-H\fR|\fB\-\-help\fR]
-- \fIobjfile\fR...
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--\&\fBobjdump\fR displays information about one or more object files.
--The options control what particular information to display. This
--information is mostly useful to programmers who are working on the
--compilation tools, as opposed to programmers who just want their
--program to compile and work.
--.PP
--\&\fIobjfile\fR... are the object files to be examined. When you
--specify archives, \fBobjdump\fR shows information on each of the member
--object files.
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--The long and short forms of options, shown here as alternatives, are
--equivalent. At least one option from the list
--\&\fB\-a,\-d,\-D,\-e,\-f,\-g,\-G,\-h,\-H,\-p,\-P,\-r,\-R,\-s,\-S,\-t,\-T,\-V,\-x\fR must be given.
--.IP "\fB\-a\fR" 4
--.IX Item "-a"
--.PD 0
--.IP "\fB\-\-archive\-header\fR" 4
--.IX Item "--archive-header"
--.PD
--If any of the \fIobjfile\fR files are archives, display the archive
--header information (in a format similar to \fBls \-l\fR). Besides the
--information you could list with \fBar tv\fR, \fBobjdump \-a\fR shows
--the object file format of each archive member.
--.IP "\fB\-\-adjust\-vma=\fR\fIoffset\fR" 4
--.IX Item "--adjust-vma=offset"
--When dumping information, first add \fIoffset\fR to all the section
--addresses. This is useful if the section addresses do not correspond to
--the symbol table, which can happen when putting sections at particular
--addresses when using a format which can not represent section addresses,
--such as a.out.
--.IP "\fB\-b\fR \fIbfdname\fR" 4
--.IX Item "-b bfdname"
--.PD 0
--.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
--.IX Item "--target=bfdname"
--.PD
--Specify that the object-code format for the object files is
--\&\fIbfdname\fR. This option may not be necessary; \fIobjdump\fR can
--automatically recognize many formats.
--.Sp
--For example,
--.Sp
--.Vb 1
--\& objdump \-b oasys \-m vax \-h fu.o
--.Ve
--.Sp
--displays summary information from the section headers (\fB\-h\fR) of
--\&\fIfu.o\fR, which is explicitly identified (\fB\-m\fR) as a \s-1VAX\s0 object
--file in the format produced by Oasys compilers. You can list the
--formats available with the \fB\-i\fR option.
--.IP "\fB\-C\fR" 4
--.IX Item "-C"
--.PD 0
--.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4
--.IX Item "--demangle[=style]"
--.PD
--Decode (\fIdemangle\fR) low-level symbol names into user-level names.
--Besides removing any initial underscore prepended by the system, this
--makes \*(C+ function names readable. Different compilers have different
--mangling styles. The optional demangling style argument can be used to
--choose an appropriate demangling style for your compiler.
--.IP "\fB\-g\fR" 4
--.IX Item "-g"
--.PD 0
--.IP "\fB\-\-debugging\fR" 4
--.IX Item "--debugging"
--.PD
--Display debugging information. This attempts to parse \s-1STABS\s0 and \s-1IEEE\s0
--debugging format information stored in the file and print it out using
--a C like syntax. If neither of these formats are found this option
--falls back on the \fB\-W\fR option to print any \s-1DWARF\s0 information in
--the file.
--.IP "\fB\-e\fR" 4
--.IX Item "-e"
--.PD 0
--.IP "\fB\-\-debugging\-tags\fR" 4
--.IX Item "--debugging-tags"
--.PD
--Like \fB\-g\fR, but the information is generated in a format compatible
--with ctags tool.
--.IP "\fB\-d\fR" 4
--.IX Item "-d"
--.PD 0
--.IP "\fB\-\-disassemble\fR" 4
--.IX Item "--disassemble"
--.PD
--Display the assembler mnemonics for the machine instructions from
--\&\fIobjfile\fR. This option only disassembles those sections which are
--expected to contain instructions.
--.IP "\fB\-D\fR" 4
--.IX Item "-D"
--.PD 0
--.IP "\fB\-\-disassemble\-all\fR" 4
--.IX Item "--disassemble-all"
--.PD
--Like \fB\-d\fR, but disassemble the contents of all sections, not just
--those expected to contain instructions.
--.Sp
--If the target is an \s-1ARM\s0 architecture this switch also has the effect
--of forcing the disassembler to decode pieces of data found in code
--sections as if they were instructions.
--.IP "\fB\-\-prefix\-addresses\fR" 4
--.IX Item "--prefix-addresses"
--When disassembling, print the complete address on each line. This is
--the older disassembly format.
--.IP "\fB\-EB\fR" 4
--.IX Item "-EB"
--.PD 0
--.IP "\fB\-EL\fR" 4
--.IX Item "-EL"
--.IP "\fB\-\-endian={big|little}\fR" 4
--.IX Item "--endian={big|little}"
--.PD
--Specify the endianness of the object files. This only affects
--disassembly. This can be useful when disassembling a file format which
--does not describe endianness information, such as S\-records.
--.IP "\fB\-f\fR" 4
--.IX Item "-f"
--.PD 0
--.IP "\fB\-\-file\-headers\fR" 4
--.IX Item "--file-headers"
--.PD
--Display summary information from the overall header of
--each of the \fIobjfile\fR files.
--.IP "\fB\-F\fR" 4
--.IX Item "-F"
--.PD 0
--.IP "\fB\-\-file\-offsets\fR" 4
--.IX Item "--file-offsets"
--.PD
--When disassembling sections, whenever a symbol is displayed, also
--display the file offset of the region of data that is about to be
--dumped. If zeroes are being skipped, then when disassembly resumes,
--tell the user how many zeroes were skipped and the file offset of the
--location from where the disassembly resumes. When dumping sections,
--display the file offset of the location from where the dump starts.
--.IP "\fB\-\-file\-start\-context\fR" 4
--.IX Item "--file-start-context"
--Specify that when displaying interlisted source code/disassembly
--(assumes \fB\-S\fR) from a file that has not yet been displayed, extend the
--context to the start of the file.
--.IP "\fB\-h\fR" 4
--.IX Item "-h"
--.PD 0
--.IP "\fB\-\-section\-headers\fR" 4
--.IX Item "--section-headers"
--.IP "\fB\-\-headers\fR" 4
--.IX Item "--headers"
--.PD
--Display summary information from the section headers of the
--object file.
--.Sp
--File segments may be relocated to nonstandard addresses, for example by
--using the \fB\-Ttext\fR, \fB\-Tdata\fR, or \fB\-Tbss\fR options to
--\&\fBld\fR. However, some object file formats, such as a.out, do not
--store the starting address of the file segments. In those situations,
--although \fBld\fR relocates the sections correctly, using \fBobjdump
--\&\-h\fR to list the file section headers cannot show the correct addresses.
--Instead, it shows the usual addresses, which are implicit for the
--target.
--.IP "\fB\-H\fR" 4
--.IX Item "-H"
--.PD 0
--.IP "\fB\-\-help\fR" 4
--.IX Item "--help"
--.PD
--Print a summary of the options to \fBobjdump\fR and exit.
--.IP "\fB\-i\fR" 4
--.IX Item "-i"
--.PD 0
--.IP "\fB\-\-info\fR" 4
--.IX Item "--info"
--.PD
--Display a list showing all architectures and object formats available
--for specification with \fB\-b\fR or \fB\-m\fR.
--.IP "\fB\-j\fR \fIname\fR" 4
--.IX Item "-j name"
--.PD 0
--.IP "\fB\-\-section=\fR\fIname\fR" 4
--.IX Item "--section=name"
--.PD
--Display information only for section \fIname\fR.
--.IP "\fB\-l\fR" 4
--.IX Item "-l"
--.PD 0
--.IP "\fB\-\-line\-numbers\fR" 4
--.IX Item "--line-numbers"
--.PD
--Label the display (using debugging information) with the filename and
--source line numbers corresponding to the object code or relocs shown.
--Only useful with \fB\-d\fR, \fB\-D\fR, or \fB\-r\fR.
--.IP "\fB\-m\fR \fImachine\fR" 4
--.IX Item "-m machine"
--.PD 0
--.IP "\fB\-\-architecture=\fR\fImachine\fR" 4
--.IX Item "--architecture=machine"
--.PD
--Specify the architecture to use when disassembling object files. This
--can be useful when disassembling object files which do not describe
--architecture information, such as S\-records. You can list the available
--architectures with the \fB\-i\fR option.
--.Sp
--If the target is an \s-1ARM\s0 architecture then this switch has an
--additional effect. It restricts the disassembly to only those
--instructions supported by the architecture specified by \fImachine\fR.
--If it is necessary to use this switch because the input file does not
--contain any architecture information, but it is also desired to
--disassemble all the instructions use \fB\-marm\fR.
--.IP "\fB\-M\fR \fIoptions\fR" 4
--.IX Item "-M options"
--.PD 0
--.IP "\fB\-\-disassembler\-options=\fR\fIoptions\fR" 4
--.IX Item "--disassembler-options=options"
--.PD
--Pass target specific information to the disassembler. Only supported on
--some targets. If it is necessary to specify more than one
--disassembler option then multiple \fB\-M\fR options can be used or
--can be placed together into a comma separated list.
--.Sp
--If the target is an \s-1ARM\s0 architecture then this switch can be used to
--select which register name set is used during disassembler. Specifying
--\&\fB\-M reg-names-std\fR (the default) will select the register names as
--used in \s-1ARM\s0's instruction set documentation, but with register 13 called
--\&'sp', register 14 called 'lr' and register 15 called 'pc'. Specifying
--\&\fB\-M reg-names-apcs\fR will select the name set used by the \s-1ARM\s0
--Procedure Call Standard, whilst specifying \fB\-M reg-names-raw\fR will
--just use \fBr\fR followed by the register number.
--.Sp
--There are also two variants on the \s-1APCS\s0 register naming scheme enabled
--by \fB\-M reg-names-atpcs\fR and \fB\-M reg-names-special-atpcs\fR which
--use the ARM/Thumb Procedure Call Standard naming conventions. (Either
--with the normal register names or the special register names).
--.Sp
--This option can also be used for \s-1ARM\s0 architectures to force the
--disassembler to interpret all instructions as Thumb instructions by
--using the switch \fB\-\-disassembler\-options=force\-thumb\fR. This can be
--useful when attempting to disassemble thumb code produced by other
--compilers.
--.Sp
--For the x86, some of the options duplicate functions of the \fB\-m\fR
--switch, but allow finer grained control. Multiple selections from the
--following may be specified as a comma separated string.
--\&\fBx86\-64\fR, \fBi386\fR and \fBi8086\fR select disassembly for
--the given architecture. \fBintel\fR and \fBatt\fR select between
--intel syntax mode and \s-1AT&T\s0 syntax mode.
--\&\fBintel-mnemonic\fR and \fBatt-mnemonic\fR select between
--intel mnemonic mode and \s-1AT&T\s0 mnemonic mode. \fBintel-mnemonic\fR
--implies \fBintel\fR and \fBatt-mnemonic\fR implies \fBatt\fR.
--\&\fBaddr64\fR, \fBaddr32\fR,
--\&\fBaddr16\fR, \fBdata32\fR and \fBdata16\fR specify the default
--address size and operand size. These four options will be overridden if
--\&\fBx86\-64\fR, \fBi386\fR or \fBi8086\fR appear later in the
--option string. Lastly, \fBsuffix\fR, when in \s-1AT&T\s0 mode,
--instructs the disassembler to print a mnemonic suffix even when the
--suffix could be inferred by the operands.
--.Sp
--For PowerPC, \fBbooke\fR controls the disassembly of BookE
--instructions. \fB32\fR and \fB64\fR select PowerPC and
--PowerPC64 disassembly, respectively. \fBe300\fR selects
--disassembly for the e300 family. \fB440\fR selects disassembly for
--the PowerPC 440. \fBppcps\fR selects disassembly for the paired
--single instructions of the \s-1PPC750CL\s0.
--.Sp
--For \s-1MIPS\s0, this option controls the printing of instruction mnemonic
--names and register names in disassembled instructions. Multiple
--selections from the following may be specified as a comma separated
--string, and invalid options are ignored:
--.RS 4
--.ie n .IP """no\-aliases""" 4
--.el .IP "\f(CWno\-aliases\fR" 4
--.IX Item "no-aliases"
--Print the 'raw' instruction mnemonic instead of some pseudo
--instruction mnemonic. I.e., print 'daddu' or 'or' instead of 'move',
--\&'sll' instead of 'nop', etc.
--.ie n .IP """virt""" 4
--.el .IP "\f(CWvirt\fR" 4
--.IX Item "virt"
--Disassemble the virtualization \s-1ASE\s0 instructions.
--.ie n .IP """gpr\-names=\f(CIABI\f(CW""" 4
--.el .IP "\f(CWgpr\-names=\f(CIABI\f(CW\fR" 4
--.IX Item "gpr-names=ABI"
--Print \s-1GPR\s0 (general-purpose register) names as appropriate
--for the specified \s-1ABI\s0. By default, \s-1GPR\s0 names are selected according to
--the \s-1ABI\s0 of the binary being disassembled.
--.ie n .IP """fpr\-names=\f(CIABI\f(CW""" 4
--.el .IP "\f(CWfpr\-names=\f(CIABI\f(CW\fR" 4
--.IX Item "fpr-names=ABI"
--Print \s-1FPR\s0 (floating-point register) names as
--appropriate for the specified \s-1ABI\s0. By default, \s-1FPR\s0 numbers are printed
--rather than names.
--.ie n .IP """cp0\-names=\f(CIARCH\f(CW""" 4
--.el .IP "\f(CWcp0\-names=\f(CIARCH\f(CW\fR" 4
--.IX Item "cp0-names=ARCH"
--Print \s-1CP0\s0 (system control coprocessor; coprocessor 0) register names
--as appropriate for the \s-1CPU\s0 or architecture specified by
--\&\fI\s-1ARCH\s0\fR. By default, \s-1CP0\s0 register names are selected according to
--the architecture and \s-1CPU\s0 of the binary being disassembled.
--.ie n .IP """hwr\-names=\f(CIARCH\f(CW""" 4
--.el .IP "\f(CWhwr\-names=\f(CIARCH\f(CW\fR" 4
--.IX Item "hwr-names=ARCH"
--Print \s-1HWR\s0 (hardware register, used by the \f(CW\*(C`rdhwr\*(C'\fR instruction) names
--as appropriate for the \s-1CPU\s0 or architecture specified by
--\&\fI\s-1ARCH\s0\fR. By default, \s-1HWR\s0 names are selected according to
--the architecture and \s-1CPU\s0 of the binary being disassembled.
--.ie n .IP """reg\-names=\f(CIABI\f(CW""" 4
--.el .IP "\f(CWreg\-names=\f(CIABI\f(CW\fR" 4
--.IX Item "reg-names=ABI"
--Print \s-1GPR\s0 and \s-1FPR\s0 names as appropriate for the selected \s-1ABI\s0.
--.ie n .IP """reg\-names=\f(CIARCH\f(CW""" 4
--.el .IP "\f(CWreg\-names=\f(CIARCH\f(CW\fR" 4
--.IX Item "reg-names=ARCH"
--Print CPU-specific register names (\s-1CP0\s0 register and \s-1HWR\s0 names)
--as appropriate for the selected \s-1CPU\s0 or architecture.
--.RE
--.RS 4
--.Sp
--For any of the options listed above, \fI\s-1ABI\s0\fR or
--\&\fI\s-1ARCH\s0\fR may be specified as \fBnumeric\fR to have numbers printed
--rather than names, for the selected types of registers.
--You can list the available values of \fI\s-1ABI\s0\fR and \fI\s-1ARCH\s0\fR using
--the \fB\-\-help\fR option.
--.Sp
--For \s-1VAX\s0, you can specify function entry addresses with \fB\-M
--entry:0xf00ba\fR. You can use this multiple times to properly
--disassemble \s-1VAX\s0 binary files that don't contain symbol tables (like
--\&\s-1ROM\s0 dumps). In these cases, the function entry mask would otherwise
--be decoded as \s-1VAX\s0 instructions, which would probably lead the rest
--of the function being wrongly disassembled.
--.RE
--.IP "\fB\-p\fR" 4
--.IX Item "-p"
--.PD 0
--.IP "\fB\-\-private\-headers\fR" 4
--.IX Item "--private-headers"
--.PD
--Print information that is specific to the object file format. The exact
--information printed depends upon the object file format. For some
--object file formats, no additional information is printed.
--.IP "\fB\-P\fR \fIoptions\fR" 4
--.IX Item "-P options"
--.PD 0
--.IP "\fB\-\-private=\fR\fIoptions\fR" 4
--.IX Item "--private=options"
--.PD
--Print information that is specific to the object file format. The
--argument \fIoptions\fR is a comma separated list that depends on the
--format (the lists of options is displayed with the help).
--.Sp
--For \s-1XCOFF\s0, the available options are: \fBheader\fR, \fBaout\fR,
--\&\fBsections\fR, \fBsyms\fR, \fBrelocs\fR, \fBlineno\fR,
--\&\fBloader\fR, \fBexcept\fR, \fBtypchk\fR, \fBtraceback\fR,
--\&\fBtoc\fR and \fBldinfo\fR.
--.IP "\fB\-r\fR" 4
--.IX Item "-r"
--.PD 0
--.IP "\fB\-\-reloc\fR" 4
--.IX Item "--reloc"
--.PD
--Print the relocation entries of the file. If used with \fB\-d\fR or
--\&\fB\-D\fR, the relocations are printed interspersed with the
--disassembly.
--.IP "\fB\-R\fR" 4
--.IX Item "-R"
--.PD 0
--.IP "\fB\-\-dynamic\-reloc\fR" 4
--.IX Item "--dynamic-reloc"
--.PD
--Print the dynamic relocation entries of the file. This is only
--meaningful for dynamic objects, such as certain types of shared
--libraries. As for \fB\-r\fR, if used with \fB\-d\fR or
--\&\fB\-D\fR, the relocations are printed interspersed with the
--disassembly.
--.IP "\fB\-s\fR" 4
--.IX Item "-s"
--.PD 0
--.IP "\fB\-\-full\-contents\fR" 4
--.IX Item "--full-contents"
--.PD
--Display the full contents of any sections requested. By default all
--non-empty sections are displayed.
--.IP "\fB\-S\fR" 4
--.IX Item "-S"
--.PD 0
--.IP "\fB\-\-source\fR" 4
--.IX Item "--source"
--.PD
--Display source code intermixed with disassembly, if possible. Implies
--\&\fB\-d\fR.
--.IP "\fB\-\-prefix=\fR\fIprefix\fR" 4
--.IX Item "--prefix=prefix"
--Specify \fIprefix\fR to add to the absolute paths when used with
--\&\fB\-S\fR.
--.IP "\fB\-\-prefix\-strip=\fR\fIlevel\fR" 4
--.IX Item "--prefix-strip=level"
--Indicate how many initial directory names to strip off the hardwired
--absolute paths. It has no effect without \fB\-\-prefix=\fR\fIprefix\fR.
--.IP "\fB\-\-show\-raw\-insn\fR" 4
--.IX Item "--show-raw-insn"
--When disassembling instructions, print the instruction in hex as well as
--in symbolic form. This is the default except when
--\&\fB\-\-prefix\-addresses\fR is used.
--.IP "\fB\-\-no\-show\-raw\-insn\fR" 4
--.IX Item "--no-show-raw-insn"
--When disassembling instructions, do not print the instruction bytes.
--This is the default when \fB\-\-prefix\-addresses\fR is used.
--.IP "\fB\-\-insn\-width=\fR\fIwidth\fR" 4
--.IX Item "--insn-width=width"
--Display \fIwidth\fR bytes on a single line when disassembling
--instructions.
--.IP "\fB\-W[lLiaprmfFsoRt]\fR" 4
--.IX Item "-W[lLiaprmfFsoRt]"
--.PD 0
--.IP "\fB\-\-dwarf[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]\fR" 4
--.IX Item "--dwarf[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]"
--.PD
--Displays the contents of the debug sections in the file, if any are
--present. If one of the optional letters or words follows the switch
--then only data found in those specific sections will be dumped.
--.Sp
--Note that there is no single letter option to display the content of
--trace sections or .gdb_index.
--.Sp
--Note: the output from the \fB=info\fR option can also be affected
--by the options \fB\-\-dwarf\-depth\fR, the \fB\-\-dwarf\-start\fR and
--the \fB\-\-dwarf\-check\fR.
--.IP "\fB\-\-dwarf\-depth=\fR\fIn\fR" 4
--.IX Item "--dwarf-depth=n"
--Limit the dump of the \f(CW\*(C`.debug_info\*(C'\fR section to \fIn\fR children.
--This is only useful with \fB\-\-dwarf=info\fR. The default is
--to print all DIEs; the special value 0 for \fIn\fR will also have this
--effect.
--.Sp
--With a non-zero value for \fIn\fR, DIEs at or deeper than \fIn\fR
--levels will not be printed. The range for \fIn\fR is zero-based.
--.IP "\fB\-\-dwarf\-start=\fR\fIn\fR" 4
--.IX Item "--dwarf-start=n"
--Print only DIEs beginning with the \s-1DIE\s0 numbered \fIn\fR. This is only
--useful with \fB\-\-dwarf=info\fR.
--.Sp
--If specified, this option will suppress printing of any header
--information and all DIEs before the \s-1DIE\s0 numbered \fIn\fR. Only
--siblings and children of the specified \s-1DIE\s0 will be printed.
--.Sp
--This can be used in conjunction with \fB\-\-dwarf\-depth\fR.
--.IP "\fB\-\-dwarf\-check\fR" 4
--.IX Item "--dwarf-check"
--Enable additional checks for consistency of Dwarf information.
--.IP "\fB\-G\fR" 4
--.IX Item "-G"
--.PD 0
--.IP "\fB\-\-stabs\fR" 4
--.IX Item "--stabs"
--.PD
--Display the full contents of any sections requested. Display the
--contents of the .stab and .stab.index and .stab.excl sections from an
--\&\s-1ELF\s0 file. This is only useful on systems (such as Solaris 2.0) in which
--\&\f(CW\*(C`.stab\*(C'\fR debugging symbol-table entries are carried in an \s-1ELF\s0
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--output.
--.IP "\fB\-\-start\-address=\fR\fIaddress\fR" 4
--.IX Item "--start-address=address"
--Start displaying data at the specified address. This affects the output
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--.IP "\fB\-\-stop\-address=\fR\fIaddress\fR" 4
--.IX Item "--stop-address=address"
--Stop displaying data at the specified address. This affects the output
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--.IP "\fB\-t\fR" 4
--.IX Item "-t"
--.PD 0
--.IP "\fB\-\-syms\fR" 4
--.IX Item "--syms"
--.PD
--Print the symbol table entries of the file.
--This is similar to the information provided by the \fBnm\fR program,
--although the display format is different. The format of the output
--depends upon the format of the file being dumped, but there are two main
--types. One looks like this:
--.Sp
--.Vb 2
--\& [ 4](sec 3)(fl 0x00)(ty 0)(scl 3) (nx 1) 0x00000000 .bss
--\& [ 6](sec 1)(fl 0x00)(ty 0)(scl 2) (nx 0) 0x00000000 fred
--.Ve
--.Sp
--where the number inside the square brackets is the number of the entry
--in the symbol table, the \fIsec\fR number is the section number, the
--\&\fIfl\fR value are the symbol's flag bits, the \fIty\fR number is the
--symbol's type, the \fIscl\fR number is the symbol's storage class and
--the \fInx\fR value is the number of auxilary entries associated with
--the symbol. The last two fields are the symbol's value and its name.
--.Sp
--The other common output format, usually seen with \s-1ELF\s0 based files,
--looks like this:
--.Sp
--.Vb 2
--\& 00000000 l d .bss 00000000 .bss
--\& 00000000 g .text 00000000 fred
--.Ve
--.Sp
--Here the first number is the symbol's value (sometimes refered to as
--its address). The next field is actually a set of characters and
--spaces indicating the flag bits that are set on the symbol. These
--characters are described below. Next is the section with which the
--symbol is associated or \fI*ABS*\fR if the section is absolute (ie
--not connected with any section), or \fI*UND*\fR if the section is
--referenced in the file being dumped, but not defined there.
--.Sp
--After the section name comes another field, a number, which for common
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--.Sp
--The flag characters are divided into 7 groups as follows:
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--.ie n .IP """l""" 4
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--.PD 0
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--.IX Item "g"
--.ie n .IP """u""" 4
--.el .IP "\f(CWu\fR" 4
--.IX Item "u"
--.ie n .IP """!""" 4
--.el .IP "\f(CW!\fR" 4
--.IX Item "!"
--.PD
--The symbol is a local (l), global (g), unique global (u), neither
--global nor local (a space) or both global and local (!). A
--symbol can be neither local or global for a variety of reasons, e.g.,
--because it is used for debugging, but it is probably an indication of
--a bug if it is ever both local and global. Unique global symbols are
--a \s-1GNU\s0 extension to the standard set of \s-1ELF\s0 symbol bindings. For such
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--.ie n .IP """w""" 4
--.el .IP "\f(CWw\fR" 4
--.IX Item "w"
--The symbol is weak (w) or strong (a space).
--.ie n .IP """C""" 4
--.el .IP "\f(CWC\fR" 4
--.IX Item "C"
--The symbol denotes a constructor (C) or an ordinary symbol (a space).
--.ie n .IP """W""" 4
--.el .IP "\f(CWW\fR" 4
--.IX Item "W"
--The symbol is a warning (W) or a normal symbol (a space). A warning
--symbol's name is a message to be displayed if the symbol following the
--warning symbol is ever referenced.
--.ie n .IP """I""" 4
--.el .IP "\f(CWI\fR" 4
--.IX Item "I"
--.PD 0
--.ie n .IP """i""" 4
--.el .IP "\f(CWi\fR" 4
--.IX Item "i"
--.PD
--The symbol is an indirect reference to another symbol (I), a function
--to be evaluated during reloc processing (i) or a normal symbol (a
--space).
--.ie n .IP """d""" 4
--.el .IP "\f(CWd\fR" 4
--.IX Item "d"
--.PD 0
--.ie n .IP """D""" 4
--.el .IP "\f(CWD\fR" 4
--.IX Item "D"
--.PD
--The symbol is a debugging symbol (d) or a dynamic symbol (D) or a
--normal symbol (a space).
--.ie n .IP """F""" 4
--.el .IP "\f(CWF\fR" 4
--.IX Item "F"
--.PD 0
--.ie n .IP """f""" 4
--.el .IP "\f(CWf\fR" 4
--.IX Item "f"
--.ie n .IP """O""" 4
--.el .IP "\f(CWO\fR" 4
--.IX Item "O"
--.PD
--The symbol is the name of a function (F) or a file (f) or an object
--(O) or just a normal symbol (a space).
--.RE
--.RS 4
--.RE
--.IP "\fB\-T\fR" 4
--.IX Item "-T"
--.PD 0
--.IP "\fB\-\-dynamic\-syms\fR" 4
--.IX Item "--dynamic-syms"
--.PD
--Print the dynamic symbol table entries of the file. This is only
--meaningful for dynamic objects, such as certain types of shared
--libraries. This is similar to the information provided by the \fBnm\fR
--program when given the \fB\-D\fR (\fB\-\-dynamic\fR) option.
--.IP "\fB\-\-special\-syms\fR" 4
--.IX Item "--special-syms"
--When displaying symbols include those which the target considers to be
--special in some way and which would not normally be of interest to the
--user.
--.IP "\fB\-V\fR" 4
--.IX Item "-V"
--.PD 0
--.IP "\fB\-\-version\fR" 4
--.IX Item "--version"
--.PD
--Print the version number of \fBobjdump\fR and exit.
--.IP "\fB\-x\fR" 4
--.IX Item "-x"
--.PD 0
--.IP "\fB\-\-all\-headers\fR" 4
--.IX Item "--all-headers"
--.PD
--Display all available header information, including the symbol table and
--relocation entries. Using \fB\-x\fR is equivalent to specifying all of
--\&\fB\-a \-f \-h \-p \-r \-t\fR.
--.IP "\fB\-w\fR" 4
--.IX Item "-w"
--.PD 0
--.IP "\fB\-\-wide\fR" 4
--.IX Item "--wide"
--.PD
--Format some lines for output devices that have more than 80 columns.
--Also do not truncate symbol names when they are displayed.
--.IP "\fB\-z\fR" 4
--.IX Item "-z"
--.PD 0
--.IP "\fB\-\-disassemble\-zeroes\fR" 4
--.IX Item "--disassemble-zeroes"
--.PD
--Normally the disassembly output will skip blocks of zeroes. This
--option directs the disassembler to disassemble those blocks, just like
--any other data.
--.IP "\fB@\fR\fIfile\fR" 4
--.IX Item "@file"
--Read command-line options from \fIfile\fR. The options read are
--inserted in place of the original @\fIfile\fR option. If \fIfile\fR
--does not exist, or cannot be read, then the option will be treated
--literally, and not removed.
--.Sp
--Options in \fIfile\fR are separated by whitespace. A whitespace
--character may be included in an option by surrounding the entire
--option in either single or double quotes. Any character (including a
--backslash) may be included by prefixing the character to be included
--with a backslash. The \fIfile\fR may itself contain additional
--@\fIfile\fR options; any such options will be processed recursively.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--\&\fInm\fR\|(1), \fIreadelf\fR\|(1), and the Info entries for \fIbinutils\fR.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1991\-2013 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/binutils/doc/ranlib.1 binutils-2.24/binutils/doc/ranlib.1
---- binutils-2.24.orig/binutils/doc/ranlib.1 2013-11-18 09:49:31.000000000 +0100
-+++ binutils-2.24/binutils/doc/ranlib.1 1970-01-01 01:00:00.000000000 +0100
-@@ -1,218 +0,0 @@
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--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "RANLIB 1"
--.TH RANLIB 1 "2013-11-18" "binutils-2.23.91" "GNU Development Tools"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--ranlib \- generate index to archive.
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--ranlib [\fB\-\-plugin\fR \fIname\fR] [\fB\-DhHvVt\fR] \fIarchive\fR
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--\&\fBranlib\fR generates an index to the contents of an archive and
--stores it in the archive. The index lists each symbol defined by a
--member of an archive that is a relocatable object file.
--.PP
--You may use \fBnm \-s\fR or \fBnm \-\-print\-armap\fR to list this index.
--.PP
--An archive with such an index speeds up linking to the library and
--allows routines in the library to call each other without regard to
--their placement in the archive.
--.PP
--The \s-1GNU\s0 \fBranlib\fR program is another form of \s-1GNU\s0 \fBar\fR; running
--\&\fBranlib\fR is completely equivalent to executing \fBar \-s\fR.
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--.IP "\fB\-h\fR" 4
--.IX Item "-h"
--.PD 0
--.IP "\fB\-H\fR" 4
--.IX Item "-H"
--.IP "\fB\-\-help\fR" 4
--.IX Item "--help"
--.PD
--Show usage information for \fBranlib\fR.
--.IP "\fB\-v\fR" 4
--.IX Item "-v"
--.PD 0
--.IP "\fB\-V\fR" 4
--.IX Item "-V"
--.IP "\fB\-\-version\fR" 4
--.IX Item "--version"
--.PD
--Show the version number of \fBranlib\fR.
--.IP "\fB\-D\fR" 4
--.IX Item "-D"
--Operate in \fIdeterministic\fR mode. The symbol map archive member's
--header will show zero for the \s-1UID\s0, \s-1GID\s0, and timestamp. When this
--option is used, multiple runs will produce identical output files.
--.Sp
--If \fIbinutils\fR was configured with
--\&\fB\-\-enable\-deterministic\-archives\fR, then this mode is on by
--default. It can be disabled with the \fB\-U\fR option, described
--below.
--.IP "\fB\-t\fR" 4
--.IX Item "-t"
--Update the timestamp of the symbol map of an archive.
--.IP "\fB\-U\fR" 4
--.IX Item "-U"
--Do \fInot\fR operate in \fIdeterministic\fR mode. This is the
--inverse of the \fB\-D\fR option, above: the archive index will get
--actual \s-1UID\s0, \s-1GID\s0, timestamp, and file mode values.
--.Sp
--If \fIbinutils\fR was configured \fIwithout\fR
--\&\fB\-\-enable\-deterministic\-archives\fR, then this mode is on by
--default.
--.IP "\fB@\fR\fIfile\fR" 4
--.IX Item "@file"
--Read command-line options from \fIfile\fR. The options read are
--inserted in place of the original @\fIfile\fR option. If \fIfile\fR
--does not exist, or cannot be read, then the option will be treated
--literally, and not removed.
--.Sp
--Options in \fIfile\fR are separated by whitespace. A whitespace
--character may be included in an option by surrounding the entire
--option in either single or double quotes. Any character (including a
--backslash) may be included by prefixing the character to be included
--with a backslash. The \fIfile\fR may itself contain additional
--@\fIfile\fR options; any such options will be processed recursively.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--\&\fIar\fR\|(1), \fInm\fR\|(1), and the Info entries for \fIbinutils\fR.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1991\-2013 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/binutils/doc/readelf.1 binutils-2.24/binutils/doc/readelf.1
---- binutils-2.24.orig/binutils/doc/readelf.1 2013-11-18 09:49:31.000000000 +0100
-+++ binutils-2.24/binutils/doc/readelf.1 1970-01-01 01:00:00.000000000 +0100
-@@ -1,448 +0,0 @@
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--.\"
--.\" If the F register is turned on, we'll generate index entries on stderr for
--.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
--.\" entries marked with X<> in POD. Of course, you'll have to process the
--.\" output yourself in some meaningful fashion.
--.ie \nF \{\
--. de IX
--. tm Index:\\$1\t\\n%\t"\\$2"
--..
--. nr % 0
--. rr F
--.\}
--.el \{\
--. de IX
--..
--.\}
--.\"
--.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
--.\" Fear. Run. Save yourself. No user-serviceable parts.
--. \" fudge factors for nroff and troff
--.if n \{\
--. ds #H 0
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--. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
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--. \" troff and (daisy-wheel) nroff accents
--.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
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--.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
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--.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
--.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
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--.ds Ae A\h'-(\w'A'u*4/10)'E
--. \" corrections for vroff
--.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
--.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
--. \" for low resolution devices (crt and lpr)
--.if \n(.H>23 .if \n(.V>19 \
--\{\
--. ds : e
--. ds 8 ss
--. ds o a
--. ds d- d\h'-1'\(ga
--. ds D- D\h'-1'\(hy
--. ds th \o'bp'
--. ds Th \o'LP'
--. ds ae ae
--. ds Ae AE
--.\}
--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "READELF 1"
--.TH READELF 1 "2013-11-18" "binutils-2.23.91" "GNU Development Tools"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--readelf \- Displays information about ELF files.
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--readelf [\fB\-a\fR|\fB\-\-all\fR]
-- [\fB\-h\fR|\fB\-\-file\-header\fR]
-- [\fB\-l\fR|\fB\-\-program\-headers\fR|\fB\-\-segments\fR]
-- [\fB\-S\fR|\fB\-\-section\-headers\fR|\fB\-\-sections\fR]
-- [\fB\-g\fR|\fB\-\-section\-groups\fR]
-- [\fB\-t\fR|\fB\-\-section\-details\fR]
-- [\fB\-e\fR|\fB\-\-headers\fR]
-- [\fB\-s\fR|\fB\-\-syms\fR|\fB\-\-symbols\fR]
-- [\fB\-\-dyn\-syms\fR]
-- [\fB\-n\fR|\fB\-\-notes\fR]
-- [\fB\-r\fR|\fB\-\-relocs\fR]
-- [\fB\-u\fR|\fB\-\-unwind\fR]
-- [\fB\-d\fR|\fB\-\-dynamic\fR]
-- [\fB\-V\fR|\fB\-\-version\-info\fR]
-- [\fB\-A\fR|\fB\-\-arch\-specific\fR]
-- [\fB\-D\fR|\fB\-\-use\-dynamic\fR]
-- [\fB\-x\fR <number or name>|\fB\-\-hex\-dump=\fR<number or name>]
-- [\fB\-p\fR <number or name>|\fB\-\-string\-dump=\fR<number or name>]
-- [\fB\-R\fR <number or name>|\fB\-\-relocated\-dump=\fR<number or name>]
-- [\fB\-c\fR|\fB\-\-archive\-index\fR]
-- [\fB\-w[lLiaprmfFsoRt]\fR|
-- \fB\-\-debug\-dump\fR[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]]
-- [\fB\-\-dwarf\-depth=\fR\fIn\fR]
-- [\fB\-\-dwarf\-start=\fR\fIn\fR]
-- [\fB\-I\fR|\fB\-\-histogram\fR]
-- [\fB\-v\fR|\fB\-\-version\fR]
-- [\fB\-W\fR|\fB\-\-wide\fR]
-- [\fB\-H\fR|\fB\-\-help\fR]
-- \fIelffile\fR...
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--\&\fBreadelf\fR displays information about one or more \s-1ELF\s0 format object
--files. The options control what particular information to display.
--.PP
--\&\fIelffile\fR... are the object files to be examined. 32\-bit and
--64\-bit \s-1ELF\s0 files are supported, as are archives containing \s-1ELF\s0 files.
--.PP
--This program performs a similar function to \fBobjdump\fR but it
--goes into more detail and it exists independently of the \s-1BFD\s0
--library, so if there is a bug in \s-1BFD\s0 then readelf will not be
--affected.
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--The long and short forms of options, shown here as alternatives, are
--equivalent. At least one option besides \fB\-v\fR or \fB\-H\fR must be
--given.
--.IP "\fB\-a\fR" 4
--.IX Item "-a"
--.PD 0
--.IP "\fB\-\-all\fR" 4
--.IX Item "--all"
--.PD
--Equivalent to specifying \fB\-\-file\-header\fR,
--\&\fB\-\-program\-headers\fR, \fB\-\-sections\fR, \fB\-\-symbols\fR,
--\&\fB\-\-relocs\fR, \fB\-\-dynamic\fR, \fB\-\-notes\fR and
--\&\fB\-\-version\-info\fR.
--.IP "\fB\-h\fR" 4
--.IX Item "-h"
--.PD 0
--.IP "\fB\-\-file\-header\fR" 4
--.IX Item "--file-header"
--.PD
--Displays the information contained in the \s-1ELF\s0 header at the start of the
--file.
--.IP "\fB\-l\fR" 4
--.IX Item "-l"
--.PD 0
--.IP "\fB\-\-program\-headers\fR" 4
--.IX Item "--program-headers"
--.IP "\fB\-\-segments\fR" 4
--.IX Item "--segments"
--.PD
--Displays the information contained in the file's segment headers, if it
--has any.
--.IP "\fB\-S\fR" 4
--.IX Item "-S"
--.PD 0
--.IP "\fB\-\-sections\fR" 4
--.IX Item "--sections"
--.IP "\fB\-\-section\-headers\fR" 4
--.IX Item "--section-headers"
--.PD
--Displays the information contained in the file's section headers, if it
--has any.
--.IP "\fB\-g\fR" 4
--.IX Item "-g"
--.PD 0
--.IP "\fB\-\-section\-groups\fR" 4
--.IX Item "--section-groups"
--.PD
--Displays the information contained in the file's section groups, if it
--has any.
--.IP "\fB\-t\fR" 4
--.IX Item "-t"
--.PD 0
--.IP "\fB\-\-section\-details\fR" 4
--.IX Item "--section-details"
--.PD
--Displays the detailed section information. Implies \fB\-S\fR.
--.IP "\fB\-s\fR" 4
--.IX Item "-s"
--.PD 0
--.IP "\fB\-\-symbols\fR" 4
--.IX Item "--symbols"
--.IP "\fB\-\-syms\fR" 4
--.IX Item "--syms"
--.PD
--Displays the entries in symbol table section of the file, if it has one.
--.IP "\fB\-\-dyn\-syms\fR" 4
--.IX Item "--dyn-syms"
--Displays the entries in dynamic symbol table section of the file, if it
--has one.
--.IP "\fB\-e\fR" 4
--.IX Item "-e"
--.PD 0
--.IP "\fB\-\-headers\fR" 4
--.IX Item "--headers"
--.PD
--Display all the headers in the file. Equivalent to \fB\-h \-l \-S\fR.
--.IP "\fB\-n\fR" 4
--.IX Item "-n"
--.PD 0
--.IP "\fB\-\-notes\fR" 4
--.IX Item "--notes"
--.PD
--Displays the contents of the \s-1NOTE\s0 segments and/or sections, if any.
--.IP "\fB\-r\fR" 4
--.IX Item "-r"
--.PD 0
--.IP "\fB\-\-relocs\fR" 4
--.IX Item "--relocs"
--.PD
--Displays the contents of the file's relocation section, if it has one.
--.IP "\fB\-u\fR" 4
--.IX Item "-u"
--.PD 0
--.IP "\fB\-\-unwind\fR" 4
--.IX Item "--unwind"
--.PD
--Displays the contents of the file's unwind section, if it has one. Only
--the unwind sections for \s-1IA64\s0 \s-1ELF\s0 files, as well as \s-1ARM\s0 unwind tables
--(\f(CW\*(C`.ARM.exidx\*(C'\fR / \f(CW\*(C`.ARM.extab\*(C'\fR) are currently supported.
--.IP "\fB\-d\fR" 4
--.IX Item "-d"
--.PD 0
--.IP "\fB\-\-dynamic\fR" 4
--.IX Item "--dynamic"
--.PD
--Displays the contents of the file's dynamic section, if it has one.
--.IP "\fB\-V\fR" 4
--.IX Item "-V"
--.PD 0
--.IP "\fB\-\-version\-info\fR" 4
--.IX Item "--version-info"
--.PD
--Displays the contents of the version sections in the file, it they
--exist.
--.IP "\fB\-A\fR" 4
--.IX Item "-A"
--.PD 0
--.IP "\fB\-\-arch\-specific\fR" 4
--.IX Item "--arch-specific"
--.PD
--Displays architecture-specific information in the file, if there
--is any.
--.IP "\fB\-D\fR" 4
--.IX Item "-D"
--.PD 0
--.IP "\fB\-\-use\-dynamic\fR" 4
--.IX Item "--use-dynamic"
--.PD
--When displaying symbols, this option makes \fBreadelf\fR use the
--symbol hash tables in the file's dynamic section, rather than the
--symbol table sections.
--.IP "\fB\-x <number or name>\fR" 4
--.IX Item "-x <number or name>"
--.PD 0
--.IP "\fB\-\-hex\-dump=<number or name>\fR" 4
--.IX Item "--hex-dump=<number or name>"
--.PD
--Displays the contents of the indicated section as a hexadecimal bytes.
--A number identifies a particular section by index in the section table;
--any other string identifies all sections with that name in the object file.
--.IP "\fB\-R <number or name>\fR" 4
--.IX Item "-R <number or name>"
--.PD 0
--.IP "\fB\-\-relocated\-dump=<number or name>\fR" 4
--.IX Item "--relocated-dump=<number or name>"
--.PD
--Displays the contents of the indicated section as a hexadecimal
--bytes. A number identifies a particular section by index in the
--section table; any other string identifies all sections with that name
--in the object file. The contents of the section will be relocated
--before they are displayed.
--.IP "\fB\-p <number or name>\fR" 4
--.IX Item "-p <number or name>"
--.PD 0
--.IP "\fB\-\-string\-dump=<number or name>\fR" 4
--.IX Item "--string-dump=<number or name>"
--.PD
--Displays the contents of the indicated section as printable strings.
--A number identifies a particular section by index in the section table;
--any other string identifies all sections with that name in the object file.
--.IP "\fB\-c\fR" 4
--.IX Item "-c"
--.PD 0
--.IP "\fB\-\-archive\-index\fR" 4
--.IX Item "--archive-index"
--.PD
--Displays the file symbol index information contained in the header part
--of binary archives. Performs the same function as the \fBt\fR
--command to \fBar\fR, but without using the \s-1BFD\s0 library.
--.IP "\fB\-w[lLiaprmfFsoRt]\fR" 4
--.IX Item "-w[lLiaprmfFsoRt]"
--.PD 0
--.IP "\fB\-\-debug\-dump[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]\fR" 4
--.IX Item "--debug-dump[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges,=pubtypes,=trace_info,=trace_abbrev,=trace_aranges,=gdb_index]"
--.PD
--Displays the contents of the debug sections in the file, if any are
--present. If one of the optional letters or words follows the switch
--then only data found in those specific sections will be dumped.
--.Sp
--Note that there is no single letter option to display the content of
--trace sections or .gdb_index.
--.Sp
--Note: the \fB=decodedline\fR option will display the interpreted
--contents of a .debug_line section whereas the \fB=rawline\fR option
--dumps the contents in a raw format.
--.Sp
--Note: the \fB=frames\-interp\fR option will display the interpreted
--contents of a .debug_frame section whereas the \fB=frames\fR option
--dumps the contents in a raw format.
--.Sp
--Note: the output from the \fB=info\fR option can also be affected
--by the options \fB\-\-dwarf\-depth\fR and \fB\-\-dwarf\-start\fR.
--.IP "\fB\-\-dwarf\-depth=\fR\fIn\fR" 4
--.IX Item "--dwarf-depth=n"
--Limit the dump of the \f(CW\*(C`.debug_info\*(C'\fR section to \fIn\fR children.
--This is only useful with \fB\-\-debug\-dump=info\fR. The default is
--to print all DIEs; the special value 0 for \fIn\fR will also have this
--effect.
--.Sp
--With a non-zero value for \fIn\fR, DIEs at or deeper than \fIn\fR
--levels will not be printed. The range for \fIn\fR is zero-based.
--.IP "\fB\-\-dwarf\-start=\fR\fIn\fR" 4
--.IX Item "--dwarf-start=n"
--Print only DIEs beginning with the \s-1DIE\s0 numbered \fIn\fR. This is only
--useful with \fB\-\-debug\-dump=info\fR.
--.Sp
--If specified, this option will suppress printing of any header
--information and all DIEs before the \s-1DIE\s0 numbered \fIn\fR. Only
--siblings and children of the specified \s-1DIE\s0 will be printed.
--.Sp
--This can be used in conjunction with \fB\-\-dwarf\-depth\fR.
--.IP "\fB\-I\fR" 4
--.IX Item "-I"
--.PD 0
--.IP "\fB\-\-histogram\fR" 4
--.IX Item "--histogram"
--.PD
--Display a histogram of bucket list lengths when displaying the contents
--of the symbol tables.
--.IP "\fB\-v\fR" 4
--.IX Item "-v"
--.PD 0
--.IP "\fB\-\-version\fR" 4
--.IX Item "--version"
--.PD
--Display the version number of readelf.
--.IP "\fB\-W\fR" 4
--.IX Item "-W"
--.PD 0
--.IP "\fB\-\-wide\fR" 4
--.IX Item "--wide"
--.PD
--Don't break output lines to fit into 80 columns. By default
--\&\fBreadelf\fR breaks section header and segment listing lines for
--64\-bit \s-1ELF\s0 files, so that they fit into 80 columns. This option causes
--\&\fBreadelf\fR to print each section header resp. each segment one a
--single line, which is far more readable on terminals wider than 80 columns.
--.IP "\fB\-H\fR" 4
--.IX Item "-H"
--.PD 0
--.IP "\fB\-\-help\fR" 4
--.IX Item "--help"
--.PD
--Display the command line options understood by \fBreadelf\fR.
--.IP "\fB@\fR\fIfile\fR" 4
--.IX Item "@file"
--Read command-line options from \fIfile\fR. The options read are
--inserted in place of the original @\fIfile\fR option. If \fIfile\fR
--does not exist, or cannot be read, then the option will be treated
--literally, and not removed.
--.Sp
--Options in \fIfile\fR are separated by whitespace. A whitespace
--character may be included in an option by surrounding the entire
--option in either single or double quotes. Any character (including a
--backslash) may be included by prefixing the character to be included
--with a backslash. The \fIfile\fR may itself contain additional
--@\fIfile\fR options; any such options will be processed recursively.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--\&\fIobjdump\fR\|(1), and the Info entries for \fIbinutils\fR.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1991\-2013 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/binutils/doc/size.1 binutils-2.24/binutils/doc/size.1
---- binutils-2.24.orig/binutils/doc/size.1 2013-11-18 09:49:31.000000000 +0100
-+++ binutils-2.24/binutils/doc/size.1 1970-01-01 01:00:00.000000000 +0100
-@@ -1,266 +0,0 @@
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--.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
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--.ie \nF \{\
--. de IX
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--. nr % 0
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--. de IX
--..
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--. \" fudge factors for nroff and troff
--.if n \{\
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--. ds 8 ss
--. ds o a
--. ds d- d\h'-1'\(ga
--. ds D- D\h'-1'\(hy
--. ds th \o'bp'
--. ds Th \o'LP'
--. ds ae ae
--. ds Ae AE
--.\}
--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "SIZE 1"
--.TH SIZE 1 "2013-11-18" "binutils-2.23.91" "GNU Development Tools"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--size \- list section sizes and total size.
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--size [\fB\-A\fR|\fB\-B\fR|\fB\-\-format=\fR\fIcompatibility\fR]
-- [\fB\-\-help\fR]
-- [\fB\-d\fR|\fB\-o\fR|\fB\-x\fR|\fB\-\-radix=\fR\fInumber\fR]
-- [\fB\-\-common\fR]
-- [\fB\-t\fR|\fB\-\-totals\fR]
-- [\fB\-\-target=\fR\fIbfdname\fR] [\fB\-V\fR|\fB\-\-version\fR]
-- [\fIobjfile\fR...]
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--The \s-1GNU\s0 \fBsize\fR utility lists the section sizes\-\-\-and the total
--size\-\-\-for each of the object or archive files \fIobjfile\fR in its
--argument list. By default, one line of output is generated for each
--object file or each module in an archive.
--.PP
--\&\fIobjfile\fR... are the object files to be examined.
--If none are specified, the file \f(CW\*(C`a.out\*(C'\fR will be used.
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--The command line options have the following meanings:
--.IP "\fB\-A\fR" 4
--.IX Item "-A"
--.PD 0
--.IP "\fB\-B\fR" 4
--.IX Item "-B"
--.IP "\fB\-\-format=\fR\fIcompatibility\fR" 4
--.IX Item "--format=compatibility"
--.PD
--Using one of these options, you can choose whether the output from \s-1GNU\s0
--\&\fBsize\fR resembles output from System V \fBsize\fR (using \fB\-A\fR,
--or \fB\-\-format=sysv\fR), or Berkeley \fBsize\fR (using \fB\-B\fR, or
--\&\fB\-\-format=berkeley\fR). The default is the one-line format similar to
--Berkeley's.
--.Sp
--Here is an example of the Berkeley (default) format of output from
--\&\fBsize\fR:
--.Sp
--.Vb 4
--\& $ size \-\-format=Berkeley ranlib size
--\& text data bss dec hex filename
--\& 294880 81920 11592 388392 5ed28 ranlib
--\& 294880 81920 11888 388688 5ee50 size
--.Ve
--.Sp
--This is the same data, but displayed closer to System V conventions:
--.Sp
--.Vb 7
--\& $ size \-\-format=SysV ranlib size
--\& ranlib :
--\& section size addr
--\& .text 294880 8192
--\& .data 81920 303104
--\& .bss 11592 385024
--\& Total 388392
--\&
--\&
--\& size :
--\& section size addr
--\& .text 294880 8192
--\& .data 81920 303104
--\& .bss 11888 385024
--\& Total 388688
--.Ve
--.IP "\fB\-\-help\fR" 4
--.IX Item "--help"
--Show a summary of acceptable arguments and options.
--.IP "\fB\-d\fR" 4
--.IX Item "-d"
--.PD 0
--.IP "\fB\-o\fR" 4
--.IX Item "-o"
--.IP "\fB\-x\fR" 4
--.IX Item "-x"
--.IP "\fB\-\-radix=\fR\fInumber\fR" 4
--.IX Item "--radix=number"
--.PD
--Using one of these options, you can control whether the size of each
--section is given in decimal (\fB\-d\fR, or \fB\-\-radix=10\fR); octal
--(\fB\-o\fR, or \fB\-\-radix=8\fR); or hexadecimal (\fB\-x\fR, or
--\&\fB\-\-radix=16\fR). In \fB\-\-radix=\fR\fInumber\fR, only the three
--values (8, 10, 16) are supported. The total size is always given in two
--radices; decimal and hexadecimal for \fB\-d\fR or \fB\-x\fR output, or
--octal and hexadecimal if you're using \fB\-o\fR.
--.IP "\fB\-\-common\fR" 4
--.IX Item "--common"
--Print total size of common symbols in each file. When using Berkeley
--format these are included in the bss size.
--.IP "\fB\-t\fR" 4
--.IX Item "-t"
--.PD 0
--.IP "\fB\-\-totals\fR" 4
--.IX Item "--totals"
--.PD
--Show totals of all objects listed (Berkeley format listing mode only).
--.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
--.IX Item "--target=bfdname"
--Specify that the object-code format for \fIobjfile\fR is
--\&\fIbfdname\fR. This option may not be necessary; \fBsize\fR can
--automatically recognize many formats.
--.IP "\fB\-V\fR" 4
--.IX Item "-V"
--.PD 0
--.IP "\fB\-\-version\fR" 4
--.IX Item "--version"
--.PD
--Display the version number of \fBsize\fR.
--.IP "\fB@\fR\fIfile\fR" 4
--.IX Item "@file"
--Read command-line options from \fIfile\fR. The options read are
--inserted in place of the original @\fIfile\fR option. If \fIfile\fR
--does not exist, or cannot be read, then the option will be treated
--literally, and not removed.
--.Sp
--Options in \fIfile\fR are separated by whitespace. A whitespace
--character may be included in an option by surrounding the entire
--option in either single or double quotes. Any character (including a
--backslash) may be included by prefixing the character to be included
--with a backslash. The \fIfile\fR may itself contain additional
--@\fIfile\fR options; any such options will be processed recursively.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--\&\fIar\fR\|(1), \fIobjdump\fR\|(1), \fIreadelf\fR\|(1), and the Info entries for \fIbinutils\fR.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1991\-2013 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/binutils/doc/strings.1 binutils-2.24/binutils/doc/strings.1
---- binutils-2.24.orig/binutils/doc/strings.1 2013-11-18 09:49:31.000000000 +0100
-+++ binutils-2.24/binutils/doc/strings.1 1970-01-01 01:00:00.000000000 +0100
-@@ -1,255 +0,0 @@
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--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "STRINGS 1"
--.TH STRINGS 1 "2013-11-18" "binutils-2.23.91" "GNU Development Tools"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--strings \- print the strings of printable characters in files.
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--strings [\fB\-afovV\fR] [\fB\-\fR\fImin-len\fR]
-- [\fB\-n\fR \fImin-len\fR] [\fB\-\-bytes=\fR\fImin-len\fR]
-- [\fB\-t\fR \fIradix\fR] [\fB\-\-radix=\fR\fIradix\fR]
-- [\fB\-e\fR \fIencoding\fR] [\fB\-\-encoding=\fR\fIencoding\fR]
-- [\fB\-\fR] [\fB\-\-all\fR] [\fB\-\-print\-file\-name\fR]
-- [\fB\-T\fR \fIbfdname\fR] [\fB\-\-target=\fR\fIbfdname\fR]
-- [\fB\-\-help\fR] [\fB\-\-version\fR] \fIfile\fR...
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--For each \fIfile\fR given, \s-1GNU\s0 \fBstrings\fR prints the printable
--character sequences that are at least 4 characters long (or the number
--given with the options below) and are followed by an unprintable
--character. By default, it only prints the strings from the initialized
--and loaded sections of object files; for other types of files, it prints
--the strings from the whole file.
--.PP
--\&\fBstrings\fR is mainly useful for determining the contents of non-text
--files.
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--.IP "\fB\-a\fR" 4
--.IX Item "-a"
--.PD 0
--.IP "\fB\-\-all\fR" 4
--.IX Item "--all"
--.IP "\fB\-\fR" 4
--.IX Item "-"
--.PD
--Do not scan only the initialized and loaded sections of object files;
--scan the whole files.
--.IP "\fB\-f\fR" 4
--.IX Item "-f"
--.PD 0
--.IP "\fB\-\-print\-file\-name\fR" 4
--.IX Item "--print-file-name"
--.PD
--Print the name of the file before each string.
--.IP "\fB\-\-help\fR" 4
--.IX Item "--help"
--Print a summary of the program usage on the standard output and exit.
--.IP "\fB\-\fR\fImin-len\fR" 4
--.IX Item "-min-len"
--.PD 0
--.IP "\fB\-n\fR \fImin-len\fR" 4
--.IX Item "-n min-len"
--.IP "\fB\-\-bytes=\fR\fImin-len\fR" 4
--.IX Item "--bytes=min-len"
--.PD
--Print sequences of characters that are at least \fImin-len\fR characters
--long, instead of the default 4.
--.IP "\fB\-o\fR" 4
--.IX Item "-o"
--Like \fB\-t o\fR. Some other versions of \fBstrings\fR have \fB\-o\fR
--act like \fB\-t d\fR instead. Since we can not be compatible with both
--ways, we simply chose one.
--.IP "\fB\-t\fR \fIradix\fR" 4
--.IX Item "-t radix"
--.PD 0
--.IP "\fB\-\-radix=\fR\fIradix\fR" 4
--.IX Item "--radix=radix"
--.PD
--Print the offset within the file before each string. The single
--character argument specifies the radix of the offset\-\-\-\fBo\fR for
--octal, \fBx\fR for hexadecimal, or \fBd\fR for decimal.
--.IP "\fB\-e\fR \fIencoding\fR" 4
--.IX Item "-e encoding"
--.PD 0
--.IP "\fB\-\-encoding=\fR\fIencoding\fR" 4
--.IX Item "--encoding=encoding"
--.PD
--Select the character encoding of the strings that are to be found.
--Possible values for \fIencoding\fR are: \fBs\fR = single\-7\-bit\-byte
--characters (\s-1ASCII\s0, \s-1ISO\s0 8859, etc., default), \fBS\fR =
--single\-8\-bit\-byte characters, \fBb\fR = 16\-bit bigendian, \fBl\fR =
--16\-bit littleendian, \fBB\fR = 32\-bit bigendian, \fBL\fR = 32\-bit
--littleendian. Useful for finding wide character strings. (\fBl\fR
--and \fBb\fR apply to, for example, Unicode \s-1UTF\-16/UCS\-2\s0 encodings).
--.IP "\fB\-T\fR \fIbfdname\fR" 4
--.IX Item "-T bfdname"
--.PD 0
--.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
--.IX Item "--target=bfdname"
--.PD
--Specify an object code format other than your system's default format.
--.IP "\fB\-v\fR" 4
--.IX Item "-v"
--.PD 0
--.IP "\fB\-V\fR" 4
--.IX Item "-V"
--.IP "\fB\-\-version\fR" 4
--.IX Item "--version"
--.PD
--Print the program version number on the standard output and exit.
--.IP "\fB@\fR\fIfile\fR" 4
--.IX Item "@file"
--Read command-line options from \fIfile\fR. The options read are
--inserted in place of the original @\fIfile\fR option. If \fIfile\fR
--does not exist, or cannot be read, then the option will be treated
--literally, and not removed.
--.Sp
--Options in \fIfile\fR are separated by whitespace. A whitespace
--character may be included in an option by surrounding the entire
--option in either single or double quotes. Any character (including a
--backslash) may be included by prefixing the character to be included
--with a backslash. The \fIfile\fR may itself contain additional
--@\fIfile\fR options; any such options will be processed recursively.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--\&\fIar\fR\|(1), \fInm\fR\|(1), \fIobjdump\fR\|(1), \fIranlib\fR\|(1), \fIreadelf\fR\|(1)
--and the Info entries for \fIbinutils\fR.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1991\-2013 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/binutils/doc/strip.1 binutils-2.24/binutils/doc/strip.1
---- binutils-2.24.orig/binutils/doc/strip.1 2013-11-18 09:49:31.000000000 +0100
-+++ binutils-2.24/binutils/doc/strip.1 1970-01-01 01:00:00.000000000 +0100
-@@ -1,427 +0,0 @@
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--.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
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--.ie \n(.g .ds Aq \(aq
--.el .ds Aq '
--.\"
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--.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
--.\" entries marked with X<> in POD. Of course, you'll have to process the
--.\" output yourself in some meaningful fashion.
--.ie \nF \{\
--. de IX
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--. rr F
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--. de IX
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--.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
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--. \" corrections for vroff
--.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
--.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
--. \" for low resolution devices (crt and lpr)
--.if \n(.H>23 .if \n(.V>19 \
--\{\
--. ds : e
--. ds 8 ss
--. ds o a
--. ds d- d\h'-1'\(ga
--. ds D- D\h'-1'\(hy
--. ds th \o'bp'
--. ds Th \o'LP'
--. ds ae ae
--. ds Ae AE
--.\}
--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "STRIP 1"
--.TH STRIP 1 "2013-11-18" "binutils-2.23.91" "GNU Development Tools"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--strip \- Discard symbols from object files.
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--strip [\fB\-F\fR \fIbfdname\fR |\fB\-\-target=\fR\fIbfdname\fR]
-- [\fB\-I\fR \fIbfdname\fR |\fB\-\-input\-target=\fR\fIbfdname\fR]
-- [\fB\-O\fR \fIbfdname\fR |\fB\-\-output\-target=\fR\fIbfdname\fR]
-- [\fB\-s\fR|\fB\-\-strip\-all\fR]
-- [\fB\-S\fR|\fB\-g\fR|\fB\-d\fR|\fB\-\-strip\-debug\fR]
-- [\fB\-\-strip\-dwo\fR]
-- [\fB\-K\fR \fIsymbolname\fR |\fB\-\-keep\-symbol=\fR\fIsymbolname\fR]
-- [\fB\-N\fR \fIsymbolname\fR |\fB\-\-strip\-symbol=\fR\fIsymbolname\fR]
-- [\fB\-w\fR|\fB\-\-wildcard\fR]
-- [\fB\-x\fR|\fB\-\-discard\-all\fR] [\fB\-X\fR |\fB\-\-discard\-locals\fR]
-- [\fB\-R\fR \fIsectionname\fR |\fB\-\-remove\-section=\fR\fIsectionname\fR]
-- [\fB\-o\fR \fIfile\fR] [\fB\-p\fR|\fB\-\-preserve\-dates\fR]
-- [\fB\-D\fR|\fB\-\-enable\-deterministic\-archives\fR]
-- [\fB\-U\fR|\fB\-\-disable\-deterministic\-archives\fR]
-- [\fB\-\-keep\-file\-symbols\fR]
-- [\fB\-\-only\-keep\-debug\fR]
-- [\fB\-v\fR |\fB\-\-verbose\fR] [\fB\-V\fR|\fB\-\-version\fR]
-- [\fB\-\-help\fR] [\fB\-\-info\fR]
-- \fIobjfile\fR...
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--\&\s-1GNU\s0 \fBstrip\fR discards all symbols from object files
--\&\fIobjfile\fR. The list of object files may include archives.
--At least one object file must be given.
--.PP
--\&\fBstrip\fR modifies the files named in its argument,
--rather than writing modified copies under different names.
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--.IP "\fB\-F\fR \fIbfdname\fR" 4
--.IX Item "-F bfdname"
--.PD 0
--.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
--.IX Item "--target=bfdname"
--.PD
--Treat the original \fIobjfile\fR as a file with the object
--code format \fIbfdname\fR, and rewrite it in the same format.
--.IP "\fB\-\-help\fR" 4
--.IX Item "--help"
--Show a summary of the options to \fBstrip\fR and exit.
--.IP "\fB\-\-info\fR" 4
--.IX Item "--info"
--Display a list showing all architectures and object formats available.
--.IP "\fB\-I\fR \fIbfdname\fR" 4
--.IX Item "-I bfdname"
--.PD 0
--.IP "\fB\-\-input\-target=\fR\fIbfdname\fR" 4
--.IX Item "--input-target=bfdname"
--.PD
--Treat the original \fIobjfile\fR as a file with the object
--code format \fIbfdname\fR.
--.IP "\fB\-O\fR \fIbfdname\fR" 4
--.IX Item "-O bfdname"
--.PD 0
--.IP "\fB\-\-output\-target=\fR\fIbfdname\fR" 4
--.IX Item "--output-target=bfdname"
--.PD
--Replace \fIobjfile\fR with a file in the output format \fIbfdname\fR.
--.IP "\fB\-R\fR \fIsectionname\fR" 4
--.IX Item "-R sectionname"
--.PD 0
--.IP "\fB\-\-remove\-section=\fR\fIsectionname\fR" 4
--.IX Item "--remove-section=sectionname"
--.PD
--Remove any section named \fIsectionname\fR from the output file. This
--option may be given more than once. Note that using this option
--inappropriately may make the output file unusable. The wildcard
--character \fB*\fR may be given at the end of \fIsectionname\fR. If
--so, then any section starting with \fIsectionname\fR will be removed.
--.IP "\fB\-s\fR" 4
--.IX Item "-s"
--.PD 0
--.IP "\fB\-\-strip\-all\fR" 4
--.IX Item "--strip-all"
--.PD
--Remove all symbols.
--.IP "\fB\-g\fR" 4
--.IX Item "-g"
--.PD 0
--.IP "\fB\-S\fR" 4
--.IX Item "-S"
--.IP "\fB\-d\fR" 4
--.IX Item "-d"
--.IP "\fB\-\-strip\-debug\fR" 4
--.IX Item "--strip-debug"
--.PD
--Remove debugging symbols only.
--.IP "\fB\-\-strip\-dwo\fR" 4
--.IX Item "--strip-dwo"
--Remove the contents of all \s-1DWARF\s0 .dwo sections, leaving the
--remaining debugging sections and all symbols intact.
--See the description of this option in the \fBobjcopy\fR section
--for more information.
--.IP "\fB\-\-strip\-unneeded\fR" 4
--.IX Item "--strip-unneeded"
--Remove all symbols that are not needed for relocation processing.
--.IP "\fB\-K\fR \fIsymbolname\fR" 4
--.IX Item "-K symbolname"
--.PD 0
--.IP "\fB\-\-keep\-symbol=\fR\fIsymbolname\fR" 4
--.IX Item "--keep-symbol=symbolname"
--.PD
--When stripping symbols, keep symbol \fIsymbolname\fR even if it would
--normally be stripped. This option may be given more than once.
--.IP "\fB\-N\fR \fIsymbolname\fR" 4
--.IX Item "-N symbolname"
--.PD 0
--.IP "\fB\-\-strip\-symbol=\fR\fIsymbolname\fR" 4
--.IX Item "--strip-symbol=symbolname"
--.PD
--Remove symbol \fIsymbolname\fR from the source file. This option may be
--given more than once, and may be combined with strip options other than
--\&\fB\-K\fR.
--.IP "\fB\-o\fR \fIfile\fR" 4
--.IX Item "-o file"
--Put the stripped output in \fIfile\fR, rather than replacing the
--existing file. When this argument is used, only one \fIobjfile\fR
--argument may be specified.
--.IP "\fB\-p\fR" 4
--.IX Item "-p"
--.PD 0
--.IP "\fB\-\-preserve\-dates\fR" 4
--.IX Item "--preserve-dates"
--.PD
--Preserve the access and modification dates of the file.
--.IP "\fB\-D\fR" 4
--.IX Item "-D"
--.PD 0
--.IP "\fB\-\-enable\-deterministic\-archives\fR" 4
--.IX Item "--enable-deterministic-archives"
--.PD
--Operate in \fIdeterministic\fR mode. When copying archive members
--and writing the archive index, use zero for UIDs, GIDs, timestamps,
--and use consistent file modes for all files.
--.Sp
--If \fIbinutils\fR was configured with
--\&\fB\-\-enable\-deterministic\-archives\fR, then this mode is on by default.
--It can be disabled with the \fB\-U\fR option, below.
--.IP "\fB\-U\fR" 4
--.IX Item "-U"
--.PD 0
--.IP "\fB\-\-disable\-deterministic\-archives\fR" 4
--.IX Item "--disable-deterministic-archives"
--.PD
--Do \fInot\fR operate in \fIdeterministic\fR mode. This is the
--inverse of the \fB\-D\fR option, above: when copying archive members
--and writing the archive index, use their actual \s-1UID\s0, \s-1GID\s0, timestamp,
--and file mode values.
--.Sp
--This is the default unless \fIbinutils\fR was configured with
--\&\fB\-\-enable\-deterministic\-archives\fR.
--.IP "\fB\-w\fR" 4
--.IX Item "-w"
--.PD 0
--.IP "\fB\-\-wildcard\fR" 4
--.IX Item "--wildcard"
--.PD
--Permit regular expressions in \fIsymbolname\fRs used in other command
--line options. The question mark (?), asterisk (*), backslash (\e) and
--square brackets ([]) operators can be used anywhere in the symbol
--name. If the first character of the symbol name is the exclamation
--point (!) then the sense of the switch is reversed for that symbol.
--For example:
--.Sp
--.Vb 1
--\& \-w \-K !foo \-K fo*
--.Ve
--.Sp
--would cause strip to only keep symbols that start with the letters
--\&\*(L"fo\*(R", but to discard the symbol \*(L"foo\*(R".
--.IP "\fB\-x\fR" 4
--.IX Item "-x"
--.PD 0
--.IP "\fB\-\-discard\-all\fR" 4
--.IX Item "--discard-all"
--.PD
--Remove non-global symbols.
--.IP "\fB\-X\fR" 4
--.IX Item "-X"
--.PD 0
--.IP "\fB\-\-discard\-locals\fR" 4
--.IX Item "--discard-locals"
--.PD
--Remove compiler-generated local symbols.
--(These usually start with \fBL\fR or \fB.\fR.)
--.IP "\fB\-\-keep\-file\-symbols\fR" 4
--.IX Item "--keep-file-symbols"
--When stripping a file, perhaps with \fB\-\-strip\-debug\fR or
--\&\fB\-\-strip\-unneeded\fR, retain any symbols specifying source file names,
--which would otherwise get stripped.
--.IP "\fB\-\-only\-keep\-debug\fR" 4
--.IX Item "--only-keep-debug"
--Strip a file, removing contents of any sections that would not be
--stripped by \fB\-\-strip\-debug\fR and leaving the debugging sections
--intact. In \s-1ELF\s0 files, this preserves all note sections in the output.
--.Sp
--The intention is that this option will be used in conjunction with
--\&\fB\-\-add\-gnu\-debuglink\fR to create a two part executable. One a
--stripped binary which will occupy less space in \s-1RAM\s0 and in a
--distribution and the second a debugging information file which is only
--needed if debugging abilities are required. The suggested procedure
--to create these files is as follows:
--.RS 4
--.IP "1.<Link the executable as normal. Assuming that is is called>" 4
--.IX Item "1.<Link the executable as normal. Assuming that is is called>"
--\&\f(CW\*(C`foo\*(C'\fR then...
--.ie n .IP "1.<Run ""objcopy \-\-only\-keep\-debug foo foo.dbg"" to>" 4
--.el .IP "1.<Run \f(CWobjcopy \-\-only\-keep\-debug foo foo.dbg\fR to>" 4
--.IX Item "1.<Run objcopy --only-keep-debug foo foo.dbg to>"
--create a file containing the debugging info.
--.ie n .IP "1.<Run ""objcopy \-\-strip\-debug foo"" to create a>" 4
--.el .IP "1.<Run \f(CWobjcopy \-\-strip\-debug foo\fR to create a>" 4
--.IX Item "1.<Run objcopy --strip-debug foo to create a>"
--stripped executable.
--.ie n .IP "1.<Run ""objcopy \-\-add\-gnu\-debuglink=foo.dbg foo"">" 4
--.el .IP "1.<Run \f(CWobjcopy \-\-add\-gnu\-debuglink=foo.dbg foo\fR>" 4
--.IX Item "1.<Run objcopy --add-gnu-debuglink=foo.dbg foo>"
--to add a link to the debugging info into the stripped executable.
--.RE
--.RS 4
--.Sp
--Note\-\-\-the choice of \f(CW\*(C`.dbg\*(C'\fR as an extension for the debug info
--file is arbitrary. Also the \f(CW\*(C`\-\-only\-keep\-debug\*(C'\fR step is
--optional. You could instead do this:
--.IP "1.<Link the executable as normal.>" 4
--.IX Item "1.<Link the executable as normal.>"
--.PD 0
--.ie n .IP "1.<Copy ""foo"" to ""foo.full"">" 4
--.el .IP "1.<Copy \f(CWfoo\fR to \f(CWfoo.full\fR>" 4
--.IX Item "1.<Copy foo to foo.full>"
--.ie n .IP "1.<Run ""strip \-\-strip\-debug foo"">" 4
--.el .IP "1.<Run \f(CWstrip \-\-strip\-debug foo\fR>" 4
--.IX Item "1.<Run strip --strip-debug foo>"
--.ie n .IP "1.<Run ""objcopy \-\-add\-gnu\-debuglink=foo.full foo"">" 4
--.el .IP "1.<Run \f(CWobjcopy \-\-add\-gnu\-debuglink=foo.full foo\fR>" 4
--.IX Item "1.<Run objcopy --add-gnu-debuglink=foo.full foo>"
--.RE
--.RS 4
--.PD
--.Sp
--i.e., the file pointed to by the \fB\-\-add\-gnu\-debuglink\fR can be the
--full executable. It does not have to be a file created by the
--\&\fB\-\-only\-keep\-debug\fR switch.
--.Sp
--Note\-\-\-this switch is only intended for use on fully linked files. It
--does not make sense to use it on object files where the debugging
--information may be incomplete. Besides the gnu_debuglink feature
--currently only supports the presence of one filename containing
--debugging information, not multiple filenames on a one-per-object-file
--basis.
--.RE
--.IP "\fB\-V\fR" 4
--.IX Item "-V"
--.PD 0
--.IP "\fB\-\-version\fR" 4
--.IX Item "--version"
--.PD
--Show the version number for \fBstrip\fR.
--.IP "\fB\-v\fR" 4
--.IX Item "-v"
--.PD 0
--.IP "\fB\-\-verbose\fR" 4
--.IX Item "--verbose"
--.PD
--Verbose output: list all object files modified. In the case of
--archives, \fBstrip \-v\fR lists all members of the archive.
--.IP "\fB@\fR\fIfile\fR" 4
--.IX Item "@file"
--Read command-line options from \fIfile\fR. The options read are
--inserted in place of the original @\fIfile\fR option. If \fIfile\fR
--does not exist, or cannot be read, then the option will be treated
--literally, and not removed.
--.Sp
--Options in \fIfile\fR are separated by whitespace. A whitespace
--character may be included in an option by surrounding the entire
--option in either single or double quotes. Any character (including a
--backslash) may be included by prefixing the character to be included
--with a backslash. The \fIfile\fR may itself contain additional
--@\fIfile\fR options; any such options will be processed recursively.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--the Info entries for \fIbinutils\fR.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1991\-2013 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/binutils/doc/windmc.1 binutils-2.24/binutils/doc/windmc.1
---- binutils-2.24.orig/binutils/doc/windmc.1 2013-11-18 09:49:32.000000000 +0100
-+++ binutils-2.24/binutils/doc/windmc.1 1970-01-01 01:00:00.000000000 +0100
-@@ -1,351 +0,0 @@
--.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14)
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--.if t .sp .5v
--.if n .sp
--..
--.de Vb \" Begin verbatim text
--.ft CW
--.nf
--.ne \\$1
--..
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--.ft R
--.fi
--..
--.\" Set up some character translations and predefined strings. \*(-- will
--.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
--.\" double quote, and \*(R" will give a right double quote. \*(C+ will
--.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
--.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
--.\" nothing in troff, for use with C<>.
--.tr \(*W-
--.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
--.ie n \{\
--. ds -- \(*W-
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--. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
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--. ds L" ""
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--. ds C' ""
--'br\}
--.el\{\
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--. ds PI \(*p
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--.\"
--.\" Escape single quotes in literal strings from groff's Unicode transform.
--.ie \n(.g .ds Aq \(aq
--.el .ds Aq '
--.\"
--.\" If the F register is turned on, we'll generate index entries on stderr for
--.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
--.\" entries marked with X<> in POD. Of course, you'll have to process the
--.\" output yourself in some meaningful fashion.
--.ie \nF \{\
--. de IX
--. tm Index:\\$1\t\\n%\t"\\$2"
--..
--. nr % 0
--. rr F
--.\}
--.el \{\
--. de IX
--..
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--.if n \{\
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--. ds /
--.\}
--.if t \{\
--. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
--. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
--. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
--. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
--. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
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--. \" troff and (daisy-wheel) nroff accents
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--.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
--.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
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--.ds ae a\h'-(\w'a'u*4/10)'e
--.ds Ae A\h'-(\w'A'u*4/10)'E
--. \" corrections for vroff
--.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
--.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
--. \" for low resolution devices (crt and lpr)
--.if \n(.H>23 .if \n(.V>19 \
--\{\
--. ds : e
--. ds 8 ss
--. ds o a
--. ds d- d\h'-1'\(ga
--. ds D- D\h'-1'\(hy
--. ds th \o'bp'
--. ds Th \o'LP'
--. ds ae ae
--. ds Ae AE
--.\}
--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "WINDMC 1"
--.TH WINDMC 1 "2013-11-18" "binutils-2.23.91" "GNU Development Tools"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--windmc \- generates Windows message resources.
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--windmc [options] input-file
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--\&\fBwindmc\fR reads message definitions from an input file (.mc) and
--translate them into a set of output files. The output files may be of
--four kinds:
--.ie n .IP """h""" 4
--.el .IP "\f(CWh\fR" 4
--.IX Item "h"
--A C header file containing the message definitions.
--.ie n .IP """rc""" 4
--.el .IP "\f(CWrc\fR" 4
--.IX Item "rc"
--A resource file compilable by the \fBwindres\fR tool.
--.ie n .IP """bin""" 4
--.el .IP "\f(CWbin\fR" 4
--.IX Item "bin"
--One or more binary files containing the resource data for a specific
--message language.
--.ie n .IP """dbg""" 4
--.el .IP "\f(CWdbg\fR" 4
--.IX Item "dbg"
--A C include file that maps message id's to their symbolic name.
--.PP
--The exact description of these different formats is available in
--documentation from Microsoft.
--.PP
--When \fBwindmc\fR converts from the \f(CW\*(C`mc\*(C'\fR format to the \f(CW\*(C`bin\*(C'\fR
--format, \f(CW\*(C`rc\*(C'\fR, \f(CW\*(C`h\*(C'\fR, and optional \f(CW\*(C`dbg\*(C'\fR it is acting like the
--Windows Message Compiler.
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--.IP "\fB\-a\fR" 4
--.IX Item "-a"
--.PD 0
--.IP "\fB\-\-ascii_in\fR" 4
--.IX Item "--ascii_in"
--.PD
--Specifies that the input file specified is \s-1ASCII\s0. This is the default
--behaviour.
--.IP "\fB\-A\fR" 4
--.IX Item "-A"
--.PD 0
--.IP "\fB\-\-ascii_out\fR" 4
--.IX Item "--ascii_out"
--.PD
--Specifies that messages in the output \f(CW\*(C`bin\*(C'\fR files should be in \s-1ASCII\s0
--format.
--.IP "\fB\-b\fR" 4
--.IX Item "-b"
--.PD 0
--.IP "\fB\-\-binprefix\fR" 4
--.IX Item "--binprefix"
--.PD
--Specifies that \f(CW\*(C`bin\*(C'\fR filenames should have to be prefixed by the
--basename of the source file.
--.IP "\fB\-c\fR" 4
--.IX Item "-c"
--.PD 0
--.IP "\fB\-\-customflag\fR" 4
--.IX Item "--customflag"
--.PD
--Sets the customer bit in all message id's.
--.IP "\fB\-C\fR \fIcodepage\fR" 4
--.IX Item "-C codepage"
--.PD 0
--.IP "\fB\-\-codepage_in\fR \fIcodepage\fR" 4
--.IX Item "--codepage_in codepage"
--.PD
--Sets the default codepage to be used to convert input file to \s-1UTF16\s0. The
--default is ocdepage 1252.
--.IP "\fB\-d\fR" 4
--.IX Item "-d"
--.PD 0
--.IP "\fB\-\-decimal_values\fR" 4
--.IX Item "--decimal_values"
--.PD
--Outputs the constants in the header file in decimal. Default is using
--hexadecimal output.
--.IP "\fB\-e\fR \fIext\fR" 4
--.IX Item "-e ext"
--.PD 0
--.IP "\fB\-\-extension\fR \fIext\fR" 4
--.IX Item "--extension ext"
--.PD
--The extension for the header file. The default is .h extension.
--.IP "\fB\-F\fR \fItarget\fR" 4
--.IX Item "-F target"
--.PD 0
--.IP "\fB\-\-target\fR \fItarget\fR" 4
--.IX Item "--target target"
--.PD
--Specify the \s-1BFD\s0 format to use for a bin file as output. This
--is a \s-1BFD\s0 target name; you can use the \fB\-\-help\fR option to see a list
--of supported targets. Normally \fBwindmc\fR will use the default
--format, which is the first one listed by the \fB\-\-help\fR option.
--.IP "\fB\-h\fR \fIpath\fR" 4
--.IX Item "-h path"
--.PD 0
--.IP "\fB\-\-headerdir\fR \fIpath\fR" 4
--.IX Item "--headerdir path"
--.PD
--The target directory of the generated header file. The default is the
--current directory.
--.IP "\fB\-H\fR" 4
--.IX Item "-H"
--.PD 0
--.IP "\fB\-\-help\fR" 4
--.IX Item "--help"
--.PD
--Displays a list of command line options and then exits.
--.IP "\fB\-m\fR \fIcharacters\fR" 4
--.IX Item "-m characters"
--.PD 0
--.IP "\fB\-\-maxlength\fR \fIcharacters\fR" 4
--.IX Item "--maxlength characters"
--.PD
--Instructs \fBwindmc\fR to generate a warning if the length
--of any message exceeds the number specified.
--.IP "\fB\-n\fR" 4
--.IX Item "-n"
--.PD 0
--.IP "\fB\-\-nullterminate\fR" 4
--.IX Item "--nullterminate"
--.PD
--Terminate message text in \f(CW\*(C`bin\*(C'\fR files by zero. By default they are
--terminated by \s-1CR/LF\s0.
--.IP "\fB\-o\fR" 4
--.IX Item "-o"
--.PD 0
--.IP "\fB\-\-hresult_use\fR" 4
--.IX Item "--hresult_use"
--.PD
--Not yet implemented. Instructs \f(CW\*(C`windmc\*(C'\fR to generate an \s-1OLE2\s0 header
--file, using \s-1HRESULT\s0 definitions. Status codes are used if the flag is not
--specified.
--.IP "\fB\-O\fR \fIcodepage\fR" 4
--.IX Item "-O codepage"
--.PD 0
--.IP "\fB\-\-codepage_out\fR \fIcodepage\fR" 4
--.IX Item "--codepage_out codepage"
--.PD
--Sets the default codepage to be used to output text files. The default
--is ocdepage 1252.
--.IP "\fB\-r\fR \fIpath\fR" 4
--.IX Item "-r path"
--.PD 0
--.IP "\fB\-\-rcdir\fR \fIpath\fR" 4
--.IX Item "--rcdir path"
--.PD
--The target directory for the generated \f(CW\*(C`rc\*(C'\fR script and the generated
--\&\f(CW\*(C`bin\*(C'\fR files that the resource compiler script includes. The default
--is the current directory.
--.IP "\fB\-u\fR" 4
--.IX Item "-u"
--.PD 0
--.IP "\fB\-\-unicode_in\fR" 4
--.IX Item "--unicode_in"
--.PD
--Specifies that the input file is \s-1UTF16\s0.
--.IP "\fB\-U\fR" 4
--.IX Item "-U"
--.PD 0
--.IP "\fB\-\-unicode_out\fR" 4
--.IX Item "--unicode_out"
--.PD
--Specifies that messages in the output \f(CW\*(C`bin\*(C'\fR file should be in \s-1UTF16\s0
--format. This is the default behaviour.
--.IP "\fB\-v\fR" 4
--.IX Item "-v"
--.PD 0
--.IP "\fB\-\-verbose\fR" 4
--.IX Item "--verbose"
--.PD
--Enable verbose mode.
--.IP "\fB\-V\fR" 4
--.IX Item "-V"
--.PD 0
--.IP "\fB\-\-version\fR" 4
--.IX Item "--version"
--.PD
--Prints the version number for \fBwindmc\fR.
--.IP "\fB\-x\fR \fIpath\fR" 4
--.IX Item "-x path"
--.PD 0
--.IP "\fB\-\-xdgb\fR \fIpath\fR" 4
--.IX Item "--xdgb path"
--.PD
--The path of the \f(CW\*(C`dbg\*(C'\fR C include file that maps message id's to the
--symbolic name. No such file is generated without specifying the switch.
--.IP "\fB@\fR\fIfile\fR" 4
--.IX Item "@file"
--Read command-line options from \fIfile\fR. The options read are
--inserted in place of the original @\fIfile\fR option. If \fIfile\fR
--does not exist, or cannot be read, then the option will be treated
--literally, and not removed.
--.Sp
--Options in \fIfile\fR are separated by whitespace. A whitespace
--character may be included in an option by surrounding the entire
--option in either single or double quotes. Any character (including a
--backslash) may be included by prefixing the character to be included
--with a backslash. The \fIfile\fR may itself contain additional
--@\fIfile\fR options; any such options will be processed recursively.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--the Info entries for \fIbinutils\fR.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1991\-2013 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/binutils/doc/windres.1 binutils-2.24/binutils/doc/windres.1
---- binutils-2.24.orig/binutils/doc/windres.1 2013-11-18 09:49:31.000000000 +0100
-+++ binutils-2.24/binutils/doc/windres.1 1970-01-01 01:00:00.000000000 +0100
-@@ -1,359 +0,0 @@
--.\" Automatically generated by Pod::Man 2.23 (Pod::Simple 3.14)
--.\"
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--.\" ========================================================================
--.de Sp \" Vertical space (when we can't use .PP)
--.if t .sp .5v
--.if n .sp
--..
--.de Vb \" Begin verbatim text
--.ft CW
--.nf
--.ne \\$1
--..
--.de Ve \" End verbatim text
--.ft R
--.fi
--..
--.\" Set up some character translations and predefined strings. \*(-- will
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--.\" nothing in troff, for use with C<>.
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--.el\{\
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--'br\}
--.\"
--.\" Escape single quotes in literal strings from groff's Unicode transform.
--.ie \n(.g .ds Aq \(aq
--.el .ds Aq '
--.\"
--.\" If the F register is turned on, we'll generate index entries on stderr for
--.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
--.\" entries marked with X<> in POD. Of course, you'll have to process the
--.\" output yourself in some meaningful fashion.
--.ie \nF \{\
--. de IX
--. tm Index:\\$1\t\\n%\t"\\$2"
--..
--. nr % 0
--. rr F
--.\}
--.el \{\
--. de IX
--..
--.\}
--.\"
--.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
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--. \" fudge factors for nroff and troff
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--. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
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--. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
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--. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
--.\}
--. \" troff and (daisy-wheel) nroff accents
--.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
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--.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
--.ds ae a\h'-(\w'a'u*4/10)'e
--.ds Ae A\h'-(\w'A'u*4/10)'E
--. \" corrections for vroff
--.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
--.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
--. \" for low resolution devices (crt and lpr)
--.if \n(.H>23 .if \n(.V>19 \
--\{\
--. ds : e
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--. ds o a
--. ds d- d\h'-1'\(ga
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--. ds Th \o'LP'
--. ds ae ae
--. ds Ae AE
--.\}
--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "WINDRES 1"
--.TH WINDRES 1 "2013-11-18" "binutils-2.23.91" "GNU Development Tools"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--windres \- manipulate Windows resources.
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--windres [options] [input\-file] [output\-file]
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--\&\fBwindres\fR reads resources from an input file and copies them into
--an output file. Either file may be in one of three formats:
--.ie n .IP """rc""" 4
--.el .IP "\f(CWrc\fR" 4
--.IX Item "rc"
--A text format read by the Resource Compiler.
--.ie n .IP """res""" 4
--.el .IP "\f(CWres\fR" 4
--.IX Item "res"
--A binary format generated by the Resource Compiler.
--.ie n .IP """coff""" 4
--.el .IP "\f(CWcoff\fR" 4
--.IX Item "coff"
--A \s-1COFF\s0 object or executable.
--.PP
--The exact description of these different formats is available in
--documentation from Microsoft.
--.PP
--When \fBwindres\fR converts from the \f(CW\*(C`rc\*(C'\fR format to the \f(CW\*(C`res\*(C'\fR
--format, it is acting like the Windows Resource Compiler. When
--\&\fBwindres\fR converts from the \f(CW\*(C`res\*(C'\fR format to the \f(CW\*(C`coff\*(C'\fR
--format, it is acting like the Windows \f(CW\*(C`CVTRES\*(C'\fR program.
--.PP
--When \fBwindres\fR generates an \f(CW\*(C`rc\*(C'\fR file, the output is similar
--but not identical to the format expected for the input. When an input
--\&\f(CW\*(C`rc\*(C'\fR file refers to an external filename, an output \f(CW\*(C`rc\*(C'\fR file
--will instead include the file contents.
--.PP
--If the input or output format is not specified, \fBwindres\fR will
--guess based on the file name, or, for the input file, the file contents.
--A file with an extension of \fI.rc\fR will be treated as an \f(CW\*(C`rc\*(C'\fR
--file, a file with an extension of \fI.res\fR will be treated as a
--\&\f(CW\*(C`res\*(C'\fR file, and a file with an extension of \fI.o\fR or
--\&\fI.exe\fR will be treated as a \f(CW\*(C`coff\*(C'\fR file.
--.PP
--If no output file is specified, \fBwindres\fR will print the resources
--in \f(CW\*(C`rc\*(C'\fR format to standard output.
--.PP
--The normal use is for you to write an \f(CW\*(C`rc\*(C'\fR file, use \fBwindres\fR
--to convert it to a \s-1COFF\s0 object file, and then link the \s-1COFF\s0 file into
--your application. This will make the resources described in the
--\&\f(CW\*(C`rc\*(C'\fR file available to Windows.
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--.IP "\fB\-i\fR \fIfilename\fR" 4
--.IX Item "-i filename"
--.PD 0
--.IP "\fB\-\-input\fR \fIfilename\fR" 4
--.IX Item "--input filename"
--.PD
--The name of the input file. If this option is not used, then
--\&\fBwindres\fR will use the first non-option argument as the input file
--name. If there are no non-option arguments, then \fBwindres\fR will
--read from standard input. \fBwindres\fR can not read a \s-1COFF\s0 file from
--standard input.
--.IP "\fB\-o\fR \fIfilename\fR" 4
--.IX Item "-o filename"
--.PD 0
--.IP "\fB\-\-output\fR \fIfilename\fR" 4
--.IX Item "--output filename"
--.PD
--The name of the output file. If this option is not used, then
--\&\fBwindres\fR will use the first non-option argument, after any used
--for the input file name, as the output file name. If there is no
--non-option argument, then \fBwindres\fR will write to standard output.
--\&\fBwindres\fR can not write a \s-1COFF\s0 file to standard output. Note,
--for compatibility with \fBrc\fR the option \fB\-fo\fR is also
--accepted, but its use is not recommended.
--.IP "\fB\-J\fR \fIformat\fR" 4
--.IX Item "-J format"
--.PD 0
--.IP "\fB\-\-input\-format\fR \fIformat\fR" 4
--.IX Item "--input-format format"
--.PD
--The input format to read. \fIformat\fR may be \fBres\fR, \fBrc\fR, or
--\&\fBcoff\fR. If no input format is specified, \fBwindres\fR will
--guess, as described above.
--.IP "\fB\-O\fR \fIformat\fR" 4
--.IX Item "-O format"
--.PD 0
--.IP "\fB\-\-output\-format\fR \fIformat\fR" 4
--.IX Item "--output-format format"
--.PD
--The output format to generate. \fIformat\fR may be \fBres\fR,
--\&\fBrc\fR, or \fBcoff\fR. If no output format is specified,
--\&\fBwindres\fR will guess, as described above.
--.IP "\fB\-F\fR \fItarget\fR" 4
--.IX Item "-F target"
--.PD 0
--.IP "\fB\-\-target\fR \fItarget\fR" 4
--.IX Item "--target target"
--.PD
--Specify the \s-1BFD\s0 format to use for a \s-1COFF\s0 file as input or output. This
--is a \s-1BFD\s0 target name; you can use the \fB\-\-help\fR option to see a list
--of supported targets. Normally \fBwindres\fR will use the default
--format, which is the first one listed by the \fB\-\-help\fR option.
--.IP "\fB\-\-preprocessor\fR \fIprogram\fR" 4
--.IX Item "--preprocessor program"
--When \fBwindres\fR reads an \f(CW\*(C`rc\*(C'\fR file, it runs it through the C
--preprocessor first. This option may be used to specify the preprocessor
--to use, including any leading arguments. The default preprocessor
--argument is \f(CW\*(C`gcc \-E \-xc\-header \-DRC_INVOKED\*(C'\fR.
--.IP "\fB\-\-preprocessor\-arg\fR \fIoption\fR" 4
--.IX Item "--preprocessor-arg option"
--When \fBwindres\fR reads an \f(CW\*(C`rc\*(C'\fR file, it runs it through
--the C preprocessor first. This option may be used to specify additional
--text to be passed to preprocessor on its command line.
--This option can be used multiple times to add multiple options to the
--preprocessor command line.
--.IP "\fB\-I\fR \fIdirectory\fR" 4
--.IX Item "-I directory"
--.PD 0
--.IP "\fB\-\-include\-dir\fR \fIdirectory\fR" 4
--.IX Item "--include-dir directory"
--.PD
--Specify an include directory to use when reading an \f(CW\*(C`rc\*(C'\fR file.
--\&\fBwindres\fR will pass this to the preprocessor as an \fB\-I\fR
--option. \fBwindres\fR will also search this directory when looking for
--files named in the \f(CW\*(C`rc\*(C'\fR file. If the argument passed to this command
--matches any of the supported \fIformats\fR (as described in the \fB\-J\fR
--option), it will issue a deprecation warning, and behave just like the
--\&\fB\-J\fR option. New programs should not use this behaviour. If a
--directory happens to match a \fIformat\fR, simple prefix it with \fB./\fR
--to disable the backward compatibility.
--.IP "\fB\-D\fR \fItarget\fR" 4
--.IX Item "-D target"
--.PD 0
--.IP "\fB\-\-define\fR \fIsym\fR\fB[=\fR\fIval\fR\fB]\fR" 4
--.IX Item "--define sym[=val]"
--.PD
--Specify a \fB\-D\fR option to pass to the preprocessor when reading an
--\&\f(CW\*(C`rc\*(C'\fR file.
--.IP "\fB\-U\fR \fItarget\fR" 4
--.IX Item "-U target"
--.PD 0
--.IP "\fB\-\-undefine\fR \fIsym\fR" 4
--.IX Item "--undefine sym"
--.PD
--Specify a \fB\-U\fR option to pass to the preprocessor when reading an
--\&\f(CW\*(C`rc\*(C'\fR file.
--.IP "\fB\-r\fR" 4
--.IX Item "-r"
--Ignored for compatibility with rc.
--.IP "\fB\-v\fR" 4
--.IX Item "-v"
--Enable verbose mode. This tells you what the preprocessor is if you
--didn't specify one.
--.IP "\fB\-c\fR \fIval\fR" 4
--.IX Item "-c val"
--.PD 0
--.IP "\fB\-\-codepage\fR \fIval\fR" 4
--.IX Item "--codepage val"
--.PD
--Specify the default codepage to use when reading an \f(CW\*(C`rc\*(C'\fR file.
--\&\fIval\fR should be a hexadecimal prefixed by \fB0x\fR or decimal
--codepage code. The valid range is from zero up to 0xffff, but the
--validity of the codepage is host and configuration dependent.
--.IP "\fB\-l\fR \fIval\fR" 4
--.IX Item "-l val"
--.PD 0
--.IP "\fB\-\-language\fR \fIval\fR" 4
--.IX Item "--language val"
--.PD
--Specify the default language to use when reading an \f(CW\*(C`rc\*(C'\fR file.
--\&\fIval\fR should be a hexadecimal language code. The low eight bits are
--the language, and the high eight bits are the sublanguage.
--.IP "\fB\-\-use\-temp\-file\fR" 4
--.IX Item "--use-temp-file"
--Use a temporary file to instead of using popen to read the output of
--the preprocessor. Use this option if the popen implementation is buggy
--on the host (eg., certain non-English language versions of Windows 95 and
--Windows 98 are known to have buggy popen where the output will instead
--go the console).
--.IP "\fB\-\-no\-use\-temp\-file\fR" 4
--.IX Item "--no-use-temp-file"
--Use popen, not a temporary file, to read the output of the preprocessor.
--This is the default behaviour.
--.IP "\fB\-h\fR" 4
--.IX Item "-h"
--.PD 0
--.IP "\fB\-\-help\fR" 4
--.IX Item "--help"
--.PD
--Prints a usage summary.
--.IP "\fB\-V\fR" 4
--.IX Item "-V"
--.PD 0
--.IP "\fB\-\-version\fR" 4
--.IX Item "--version"
--.PD
--Prints the version number for \fBwindres\fR.
--.IP "\fB\-\-yydebug\fR" 4
--.IX Item "--yydebug"
--If \fBwindres\fR is compiled with \f(CW\*(C`YYDEBUG\*(C'\fR defined as \f(CW1\fR,
--this will turn on parser debugging.
--.IP "\fB@\fR\fIfile\fR" 4
--.IX Item "@file"
--Read command-line options from \fIfile\fR. The options read are
--inserted in place of the original @\fIfile\fR option. If \fIfile\fR
--does not exist, or cannot be read, then the option will be treated
--literally, and not removed.
--.Sp
--Options in \fIfile\fR are separated by whitespace. A whitespace
--character may be included in an option by surrounding the entire
--option in either single or double quotes. Any character (including a
--backslash) may be included by prefixing the character to be included
--with a backslash. The \fIfile\fR may itself contain additional
--@\fIfile\fR options; any such options will be processed recursively.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--the Info entries for \fIbinutils\fR.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1991\-2013 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/binutils/dwarf.c binutils-2.24/binutils/dwarf.c
---- binutils-2.24.orig/binutils/dwarf.c 2013-11-08 11:13:48.000000000 +0100
-+++ binutils-2.24/binutils/dwarf.c 2016-06-30 21:26:12.585890467 +0200
-@@ -263,7 +263,7 @@
- *length_return = num_read;
-
- if (sign && (shift < 8 * sizeof (result)) && (byte & 0x40))
-- result |= -1L << shift;
-+ result |= (dwarf_vma) -1 << shift;
-
- return result;
- }
-@@ -2663,14 +2663,10 @@
- linfo->li_max_ops_per_insn = 1;
-
- SAFE_BYTE_GET_AND_INC (linfo->li_default_is_stmt, hdrptr, 1, end);
-- SAFE_BYTE_GET_AND_INC (linfo->li_line_base, hdrptr, 1, end);
-+ SAFE_SIGNED_BYTE_GET_AND_INC (linfo->li_line_base, hdrptr, 1, end);
- SAFE_BYTE_GET_AND_INC (linfo->li_line_range, hdrptr, 1, end);
- SAFE_BYTE_GET_AND_INC (linfo->li_opcode_base, hdrptr, 1, end);
-
-- /* Sign extend the line base field. */
-- linfo->li_line_base <<= 24;
-- linfo->li_line_base >>= 24;
--
- * end_of_sequence = data + linfo->li_length + initial_length_size;
- return hdrptr;
- }
-diff -Nur binutils-2.24.orig/binutils/MAINTAINERS binutils-2.24/binutils/MAINTAINERS
---- binutils-2.24.orig/binutils/MAINTAINERS 2013-11-08 11:13:48.000000000 +0100
-+++ binutils-2.24/binutils/MAINTAINERS 2016-06-30 21:26:12.585890467 +0200
-@@ -109,6 +109,8 @@
- MN10300 Alexandre Oliva <aoliva@redhat.com>
- Moxie Anthony Green <green@moxielogic.com>
- MSP430 Dmitry Diky <diwil@spec.ru>
-+ NDS32 Kuan-Lin Chen <kuanlinchentw@gmail.com>
-+ NDS32 Wei-Cheng Wang <cole945@gmail.com>
- NetBSD support Matt Thomas <matt@netbsd.org>
- Nios II Sandra Loosemore <sandra@codesourcery.com>
- Nios II Andrew Jenner <andrew@codesourcery.com>
-diff -Nur binutils-2.24.orig/binutils/Makefile.am binutils-2.24/binutils/Makefile.am
---- binutils-2.24.orig/binutils/Makefile.am 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/binutils/Makefile.am 2016-06-30 21:26:12.585890467 +0200
-@@ -241,7 +241,7 @@
-
- objdump_SOURCES = objdump.c dwarf.c prdbg.c $(DEBUG_SRCS) $(BULIBS) $(ELFLIBS)
- EXTRA_objdump_SOURCES = od-xcoff.c
--objdump_LDADD = $(OBJDUMP_PRIVATE_OFILES) $(OPCODES) $(BFDLIB) $(LIBIBERTY) $(LIBINTL)
-+objdump_LDADD = $(OBJDUMP_PRIVATE_OFILES) $(OPCODES) $(BFDLIB) $(LIBIBERTY) $(LIBINTL) -ldl
-
- objdump.@OBJEXT@:objdump.c
- if am__fastdepCC
-diff -Nur binutils-2.24.orig/binutils/Makefile.in binutils-2.24/binutils/Makefile.in
---- binutils-2.24.orig/binutils/Makefile.in 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/binutils/Makefile.in 2016-06-30 21:26:12.589890622 +0200
-@@ -581,7 +581,7 @@
- nm_new_SOURCES = nm.c $(BULIBS)
- objdump_SOURCES = objdump.c dwarf.c prdbg.c $(DEBUG_SRCS) $(BULIBS) $(ELFLIBS)
- EXTRA_objdump_SOURCES = od-xcoff.c
--objdump_LDADD = $(OBJDUMP_PRIVATE_OFILES) $(OPCODES) $(BFDLIB) $(LIBIBERTY) $(LIBINTL)
-+objdump_LDADD = $(OBJDUMP_PRIVATE_OFILES) $(OPCODES) $(BFDLIB) $(LIBIBERTY) $(LIBINTL) -ldl
- cxxfilt_SOURCES = cxxfilt.c $(BULIBS)
- ar_SOURCES = arparse.y arlex.l ar.c not-ranlib.c arsup.c rename.c binemul.c \
- emul_$(EMULATION).c $(BULIBS)
-diff -Nur binutils-2.24.orig/binutils/mcparse.c binutils-2.24/binutils/mcparse.c
---- binutils-2.24.orig/binutils/mcparse.c 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/mcparse.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,2156 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton implementation for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* C LALR(1) parser skeleton written by Richard Stallman, by
-- simplifying the original so-called "semantic" parser. */
--
--/* All symbols defined below should begin with yy or YY, to avoid
-- infringing on user name space. This should be done even for local
-- variables, as they might otherwise be expanded by user macros.
-- There are some unavoidable exceptions within include files to
-- define necessary library symbols; they are noted "INFRINGES ON
-- USER NAME SPACE" below. */
--
--/* Identify Bison output. */
--#define YYBISON 1
--
--/* Bison version. */
--#define YYBISON_VERSION "2.3"
--
--/* Skeleton name. */
--#define YYSKELETON_NAME "yacc.c"
--
--/* Pure parsers. */
--#define YYPURE 0
--
--/* Using locations. */
--#define YYLSP_NEEDED 0
--
--
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- NL = 258,
-- MCIDENT = 259,
-- MCFILENAME = 260,
-- MCLINE = 261,
-- MCCOMMENT = 262,
-- MCTOKEN = 263,
-- MCENDLINE = 264,
-- MCLANGUAGENAMES = 265,
-- MCFACILITYNAMES = 266,
-- MCSEVERITYNAMES = 267,
-- MCOUTPUTBASE = 268,
-- MCMESSAGEIDTYPEDEF = 269,
-- MCLANGUAGE = 270,
-- MCMESSAGEID = 271,
-- MCSEVERITY = 272,
-- MCFACILITY = 273,
-- MCSYMBOLICNAME = 274,
-- MCNUMBER = 275
-- };
--#endif
--/* Tokens. */
--#define NL 258
--#define MCIDENT 259
--#define MCFILENAME 260
--#define MCLINE 261
--#define MCCOMMENT 262
--#define MCTOKEN 263
--#define MCENDLINE 264
--#define MCLANGUAGENAMES 265
--#define MCFACILITYNAMES 266
--#define MCSEVERITYNAMES 267
--#define MCOUTPUTBASE 268
--#define MCMESSAGEIDTYPEDEF 269
--#define MCLANGUAGE 270
--#define MCMESSAGEID 271
--#define MCSEVERITY 272
--#define MCFACILITY 273
--#define MCSYMBOLICNAME 274
--#define MCNUMBER 275
--
--
--
--
--/* Copy the first part of user declarations. */
--#line 1 "mcparse.y"
-- /* mcparse.y -- parser for Windows mc files
-- Copyright 2007
-- Free Software Foundation, Inc.
--
-- Parser for Windows mc files
-- Written by Kai Tietz, Onevision.
--
-- This file is part of GNU Binutils.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-- 02110-1301, USA. */
--
--/* This is a parser for Windows rc files. It is based on the parser
-- by Gunther Ebert <gunther.ebert@ixos-leipzig.de>. */
--
--#include "sysdep.h"
--#include "bfd.h"
--#include "bucomm.h"
--#include "libiberty.h"
--#include "windmc.h"
--#include "safe-ctype.h"
--
--static rc_uint_type mc_last_id = 0;
--static rc_uint_type mc_sefa_val = 0;
--static unichar *mc_last_symbol = NULL;
--static const mc_keyword *mc_cur_severity = NULL;
--static const mc_keyword *mc_cur_facility = NULL;
--static mc_node *cur_node = NULL;
--
--
--
--/* Enabling traces. */
--#ifndef YYDEBUG
--# define YYDEBUG 0
--#endif
--
--/* Enabling verbose error messages. */
--#ifdef YYERROR_VERBOSE
--# undef YYERROR_VERBOSE
--# define YYERROR_VERBOSE 1
--#else
--# define YYERROR_VERBOSE 0
--#endif
--
--/* Enabling the token table. */
--#ifndef YYTOKEN_TABLE
--# define YYTOKEN_TABLE 0
--#endif
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 45 "mcparse.y"
--{
-- rc_uint_type ival;
-- unichar *ustr;
-- const mc_keyword *tok;
-- mc_node *nod;
--}
--/* Line 193 of yacc.c. */
--#line 186 "mcparse.c"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--
--
--/* Copy the second part of user declarations. */
--
--
--/* Line 216 of yacc.c. */
--#line 199 "mcparse.c"
--
--#ifdef short
--# undef short
--#endif
--
--#ifdef YYTYPE_UINT8
--typedef YYTYPE_UINT8 yytype_uint8;
--#else
--typedef unsigned char yytype_uint8;
--#endif
--
--#ifdef YYTYPE_INT8
--typedef YYTYPE_INT8 yytype_int8;
--#elif (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--typedef signed char yytype_int8;
--#else
--typedef short int yytype_int8;
--#endif
--
--#ifdef YYTYPE_UINT16
--typedef YYTYPE_UINT16 yytype_uint16;
--#else
--typedef unsigned short int yytype_uint16;
--#endif
--
--#ifdef YYTYPE_INT16
--typedef YYTYPE_INT16 yytype_int16;
--#else
--typedef short int yytype_int16;
--#endif
--
--#ifndef YYSIZE_T
--# ifdef __SIZE_TYPE__
--# define YYSIZE_T __SIZE_TYPE__
--# elif defined size_t
--# define YYSIZE_T size_t
--# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stddef.h> /* INFRINGES ON USER NAME SPACE */
--# define YYSIZE_T size_t
--# else
--# define YYSIZE_T unsigned int
--# endif
--#endif
--
--#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
--
--#ifndef YY_
--# if defined YYENABLE_NLS && YYENABLE_NLS
--# if ENABLE_NLS
--# include <libintl.h> /* INFRINGES ON USER NAME SPACE */
--# define YY_(msgid) dgettext ("bison-runtime", msgid)
--# endif
--# endif
--# ifndef YY_
--# define YY_(msgid) msgid
--# endif
--#endif
--
--/* Suppress unused-variable warnings by "using" E. */
--#if ! defined lint || defined __GNUC__
--# define YYUSE(e) ((void) (e))
--#else
--# define YYUSE(e) /* empty */
--#endif
--
--/* Identity function, used to suppress warnings about constant conditions. */
--#ifndef lint
--# define YYID(n) (n)
--#else
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static int
--YYID (int i)
--#else
--static int
--YYID (i)
-- int i;
--#endif
--{
-- return i;
--}
--#endif
--
--#if ! defined yyoverflow || YYERROR_VERBOSE
--
--/* The parser invokes alloca or malloc; define the necessary symbols. */
--
--# ifdef YYSTACK_USE_ALLOCA
--# if YYSTACK_USE_ALLOCA
--# ifdef __GNUC__
--# define YYSTACK_ALLOC __builtin_alloca
--# elif defined __BUILTIN_VA_ARG_INCR
--# include <alloca.h> /* INFRINGES ON USER NAME SPACE */
--# elif defined _AIX
--# define YYSTACK_ALLOC __alloca
--# elif defined _MSC_VER
--# include <malloc.h> /* INFRINGES ON USER NAME SPACE */
--# define alloca _alloca
--# else
--# define YYSTACK_ALLOC alloca
--# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# endif
--# endif
--# endif
--
--# ifdef YYSTACK_ALLOC
-- /* Pacify GCC's `empty if-body' warning. */
--# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0))
--# ifndef YYSTACK_ALLOC_MAXIMUM
-- /* The OS might guarantee only one guard page at the bottom of the stack,
-- and a page size can be as small as 4096 bytes. So we cannot safely
-- invoke alloca (N) if N exceeds 4096. Use a slightly smaller number
-- to allow for a few compiler-allocated temporary stack slots. */
--# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
--# endif
--# else
--# define YYSTACK_ALLOC YYMALLOC
--# define YYSTACK_FREE YYFREE
--# ifndef YYSTACK_ALLOC_MAXIMUM
--# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
--# endif
--# if (defined __cplusplus && ! defined _STDLIB_H \
-- && ! ((defined YYMALLOC || defined malloc) \
-- && (defined YYFREE || defined free)))
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# ifndef YYMALLOC
--# define YYMALLOC malloc
--# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# ifndef YYFREE
--# define YYFREE free
--# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void free (void *); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# endif
--#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
--
--
--#if (! defined yyoverflow \
-- && (! defined __cplusplus \
-- || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
--
--/* A type that is properly aligned for any stack member. */
--union yyalloc
--{
-- yytype_int16 yyss;
-- YYSTYPE yyvs;
-- };
--
--/* The size of the maximum gap between one aligned stack and the next. */
--# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
--
--/* The size of an array large to enough to hold all stacks, each with
-- N elements. */
--# define YYSTACK_BYTES(N) \
-- ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \
-- + YYSTACK_GAP_MAXIMUM)
--
--/* Copy COUNT objects from FROM to TO. The source and destination do
-- not overlap. */
--# ifndef YYCOPY
--# if defined __GNUC__ && 1 < __GNUC__
--# define YYCOPY(To, From, Count) \
-- __builtin_memcpy (To, From, (Count) * sizeof (*(From)))
--# else
--# define YYCOPY(To, From, Count) \
-- do \
-- { \
-- YYSIZE_T yyi; \
-- for (yyi = 0; yyi < (Count); yyi++) \
-- (To)[yyi] = (From)[yyi]; \
-- } \
-- while (YYID (0))
--# endif
--# endif
--
--/* Relocate STACK from its old location to the new one. The
-- local variables YYSIZE and YYSTACKSIZE give the old and new number of
-- elements in the stack, and YYPTR gives the new location of the
-- stack. Advance YYPTR to a properly aligned location for the next
-- stack. */
--# define YYSTACK_RELOCATE(Stack) \
-- do \
-- { \
-- YYSIZE_T yynewbytes; \
-- YYCOPY (&yyptr->Stack, Stack, yysize); \
-- Stack = &yyptr->Stack; \
-- yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
-- yyptr += yynewbytes / sizeof (*yyptr); \
-- } \
-- while (YYID (0))
--
--#endif
--
--/* YYFINAL -- State number of the termination state. */
--#define YYFINAL 3
--/* YYLAST -- Last index in YYTABLE. */
--#define YYLAST 114
--
--/* YYNTOKENS -- Number of terminals. */
--#define YYNTOKENS 26
--/* YYNNTS -- Number of nonterminals. */
--#define YYNNTS 29
--/* YYNRULES -- Number of rules. */
--#define YYNRULES 82
--/* YYNRULES -- Number of states. */
--#define YYNSTATES 125
--
--/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */
--#define YYUNDEFTOK 2
--#define YYMAXUTOK 275
--
--#define YYTRANSLATE(YYX) \
-- ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
--
--/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */
--static const yytype_uint8 yytranslate[] =
--{
-- 0, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 22, 23, 2, 25, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 24, 2,
-- 2, 21, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 1, 2, 3, 4,
-- 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
-- 15, 16, 17, 18, 19, 20
--};
--
--#if YYDEBUG
--/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
-- YYRHS. */
--static const yytype_uint16 yyprhs[] =
--{
-- 0, 0, 3, 5, 6, 9, 11, 13, 15, 17,
-- 23, 29, 33, 36, 42, 48, 52, 55, 61, 67,
-- 71, 74, 78, 82, 86, 89, 91, 94, 96, 101,
-- 105, 108, 110, 113, 115, 120, 124, 127, 129, 132,
-- 134, 141, 148, 153, 157, 160, 161, 164, 167, 168,
-- 173, 177, 181, 184, 185, 187, 190, 193, 194, 197,
-- 200, 203, 207, 211, 215, 217, 220, 225, 227, 230,
-- 232, 235, 237, 240, 246, 252, 258, 263, 266, 268,
-- 270, 271, 272
--};
--
--/* YYRHS -- A `-1'-separated list of the rules' RHS. */
--static const yytype_int8 yyrhs[] =
--{
-- 27, 0, -1, 28, -1, -1, 28, 29, -1, 30,
-- -1, 38, -1, 49, -1, 1, -1, 12, 21, 22,
-- 31, 23, -1, 12, 21, 22, 31, 1, -1, 12,
-- 21, 1, -1, 12, 1, -1, 10, 21, 22, 35,
-- 23, -1, 10, 21, 22, 35, 1, -1, 10, 21,
-- 1, -1, 10, 1, -1, 11, 21, 22, 33, 23,
-- -1, 11, 21, 22, 33, 1, -1, 11, 21, 1,
-- -1, 11, 1, -1, 13, 21, 20, -1, 14, 21,
-- 4, -1, 14, 21, 1, -1, 14, 1, -1, 32,
-- -1, 31, 32, -1, 1, -1, 51, 21, 20, 37,
-- -1, 51, 21, 1, -1, 51, 1, -1, 34, -1,
-- 33, 34, -1, 1, -1, 51, 21, 20, 37, -1,
-- 51, 21, 1, -1, 51, 1, -1, 36, -1, 35,
-- 36, -1, 1, -1, 51, 21, 20, 54, 24, 5,
-- -1, 51, 21, 20, 54, 24, 1, -1, 51, 21,
-- 20, 1, -1, 51, 21, 1, -1, 51, 1, -1,
-- -1, 24, 4, -1, 24, 1, -1, -1, 40, 42,
-- 39, 46, -1, 16, 21, 41, -1, 16, 21, 1,
-- -1, 16, 1, -1, -1, 20, -1, 25, 20, -1,
-- 25, 1, -1, -1, 42, 43, -1, 42, 44, -1,
-- 42, 45, -1, 17, 21, 8, -1, 18, 21, 8,
-- -1, 19, 21, 4, -1, 47, -1, 46, 47, -1,
-- 50, 53, 48, 9, -1, 6, -1, 48, 6, -1,
-- 1, -1, 48, 1, -1, 7, -1, 49, 7, -1,
-- 15, 52, 21, 8, 3, -1, 15, 52, 21, 4,
-- 3, -1, 15, 52, 21, 51, 1, -1, 15, 52,
-- 21, 1, -1, 15, 1, -1, 4, -1, 8, -1,
-- -1, -1, -1
--};
--
--/* YYRLINE[YYN] -- source line where rule number YYN was defined. */
--static const yytype_uint16 yyrline[] =
--{
-- 0, 67, 67, 70, 72, 74, 75, 76, 81, 85,
-- 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
-- 96, 97, 103, 107, 111, 118, 119, 120, 124, 128,
-- 129, 133, 134, 135, 139, 143, 144, 148, 149, 150,
-- 154, 158, 159, 160, 161, 166, 169, 173, 178, 177,
-- 190, 191, 192, 196, 199, 203, 207, 212, 219, 225,
-- 231, 239, 247, 255, 262, 263, 267, 277, 281, 293,
-- 294, 297, 298, 312, 316, 321, 326, 331, 338, 339,
-- 343, 347, 351
--};
--#endif
--
--#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE
--/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
-- First, the terminals, then, starting at YYNTOKENS, nonterminals. */
--static const char *const yytname[] =
--{
-- "$end", "error", "$undefined", "NL", "MCIDENT", "MCFILENAME", "MCLINE",
-- "MCCOMMENT", "MCTOKEN", "MCENDLINE", "MCLANGUAGENAMES",
-- "MCFACILITYNAMES", "MCSEVERITYNAMES", "MCOUTPUTBASE",
-- "MCMESSAGEIDTYPEDEF", "MCLANGUAGE", "MCMESSAGEID", "MCSEVERITY",
-- "MCFACILITY", "MCSYMBOLICNAME", "MCNUMBER", "'='", "'('", "')'", "':'",
-- "'+'", "$accept", "input", "entities", "entity", "global_section",
-- "severitymaps", "severitymap", "facilitymaps", "facilitymap", "langmaps",
-- "langmap", "alias_name", "message", "@1", "id", "vid", "sefasy_def",
-- "severity", "facility", "symbol", "lang_entities", "lang_entity",
-- "lines", "comments", "lang", "token", "lex_want_nl", "lex_want_line",
-- "lex_want_filename", 0
--};
--#endif
--
--# ifdef YYPRINT
--/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to
-- token YYLEX-NUM. */
--static const yytype_uint16 yytoknum[] =
--{
-- 0, 256, 257, 258, 259, 260, 261, 262, 263, 264,
-- 265, 266, 267, 268, 269, 270, 271, 272, 273, 274,
-- 275, 61, 40, 41, 58, 43
--};
--# endif
--
--/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */
--static const yytype_uint8 yyr1[] =
--{
-- 0, 26, 27, 28, 28, 29, 29, 29, 29, 30,
-- 30, 30, 30, 30, 30, 30, 30, 30, 30, 30,
-- 30, 30, 30, 30, 30, 31, 31, 31, 32, 32,
-- 32, 33, 33, 33, 34, 34, 34, 35, 35, 35,
-- 36, 36, 36, 36, 36, 37, 37, 37, 39, 38,
-- 40, 40, 40, 41, 41, 41, 41, 42, 42, 42,
-- 42, 43, 44, 45, 46, 46, 47, 48, 48, 48,
-- 48, 49, 49, 50, 50, 50, 50, 50, 51, 51,
-- 52, 53, 54
--};
--
--/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */
--static const yytype_uint8 yyr2[] =
--{
-- 0, 2, 1, 0, 2, 1, 1, 1, 1, 5,
-- 5, 3, 2, 5, 5, 3, 2, 5, 5, 3,
-- 2, 3, 3, 3, 2, 1, 2, 1, 4, 3,
-- 2, 1, 2, 1, 4, 3, 2, 1, 2, 1,
-- 6, 6, 4, 3, 2, 0, 2, 2, 0, 4,
-- 3, 3, 2, 0, 1, 2, 2, 0, 2, 2,
-- 2, 3, 3, 3, 1, 2, 4, 1, 2, 1,
-- 2, 1, 2, 5, 5, 5, 4, 2, 1, 1,
-- 0, 0, 0
--};
--
--/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
-- STATE-NUM when YYTABLE doesn't specify something else to do. Zero
-- means the default is an error. */
--static const yytype_uint8 yydefact[] =
--{
-- 3, 0, 0, 1, 8, 71, 0, 0, 0, 0,
-- 0, 0, 4, 5, 6, 57, 7, 16, 0, 20,
-- 0, 12, 0, 0, 24, 0, 52, 0, 48, 72,
-- 15, 0, 19, 0, 11, 0, 21, 23, 22, 51,
-- 54, 0, 50, 0, 0, 0, 0, 58, 59, 60,
-- 39, 78, 79, 0, 37, 0, 33, 0, 31, 0,
-- 27, 0, 25, 0, 56, 55, 0, 0, 0, 0,
-- 49, 64, 81, 14, 13, 38, 44, 0, 18, 17,
-- 32, 36, 0, 10, 9, 26, 30, 0, 61, 62,
-- 63, 77, 0, 65, 0, 43, 0, 35, 45, 29,
-- 45, 0, 69, 67, 0, 42, 0, 0, 34, 28,
-- 76, 78, 79, 0, 70, 68, 66, 0, 47, 46,
-- 74, 73, 75, 41, 40
--};
--
--/* YYDEFGOTO[NTERM-NUM]. */
--static const yytype_int8 yydefgoto[] =
--{
-- -1, 1, 2, 12, 13, 61, 62, 57, 58, 53,
-- 54, 108, 14, 46, 15, 42, 28, 47, 48, 49,
-- 70, 71, 104, 16, 72, 55, 92, 94, 106
--};
--
--/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
-- STATE-NUM. */
--#define YYPACT_NINF -34
--static const yytype_int8 yypact[] =
--{
-- -34, 62, 70, -34, -34, -34, 15, 22, 30, -15,
-- 34, 37, -34, -34, -34, -34, 56, -34, 10, -34,
-- 12, -34, 20, 25, -34, 52, -34, 0, 80, -34,
-- -34, 71, -34, 84, -34, 86, -34, -34, -34, -34,
-- -34, 45, -34, 1, 68, 74, 76, -34, -34, -34,
-- -34, -34, -34, 4, -34, 38, -34, 6, -34, 39,
-- -34, 29, -34, 40, -34, -34, 93, 94, 99, 43,
-- 76, -34, -34, -34, -34, -34, -34, 46, -34, -34,
-- -34, -34, 47, -34, -34, -34, -34, 49, -34, -34,
-- -34, -34, 83, -34, 3, -34, 2, -34, 81, -34,
-- 81, 92, -34, -34, 48, -34, 82, 72, -34, -34,
-- -34, 104, 105, 108, -34, -34, -34, 73, -34, -34,
-- -34, -34, -34, -34, -34
--};
--
--/* YYPGOTO[NTERM-NUM]. */
--static const yytype_int8 yypgoto[] =
--{
-- -34, -34, -34, -34, -34, -34, 50, -34, 53, -34,
-- 59, 13, -34, -34, -34, -34, -34, -34, -34, -34,
-- -34, 44, -34, -34, -34, -33, -34, -34, -34
--};
--
--/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If
-- positive, shift that token. If negative, reduce the rule which
-- number is the opposite. If zero, do what YYDEFACT says.
-- If YYTABLE_NINF, syntax error. */
--#define YYTABLE_NINF -83
--static const yytype_int8 yytable[] =
--{
-- 59, 39, 63, 105, 102, 73, 23, 78, 51, 103,
-- 51, 30, 52, 32, 52, -53, 17, -53, -53, -53,
-- 40, 34, 66, 19, 59, 41, -82, 74, 63, 79,
-- 83, 21, 31, 51, 33, 24, 18, 52, 26, 76,
-- 81, 86, 35, 20, 91, 36, 64, 95, 97, 114,
-- 99, 22, 84, 37, 115, 25, 38, 116, 27, 77,
-- 82, 87, 3, 29, -80, 65, 96, 98, 113, 100,
-- -2, 4, 50, 118, 123, 51, 119, 5, 124, 52,
-- 6, 7, 8, 9, 10, 56, 11, 60, 51, 67,
-- 51, 69, 52, 110, 52, 68, 111, 43, 44, 45,
-- 112, 88, 89, 90, 101, 107, 117, 120, 121, 122,
-- 80, 85, 75, 109, 93
--};
--
--static const yytype_uint8 yycheck[] =
--{
-- 33, 1, 35, 1, 1, 1, 21, 1, 4, 6,
-- 4, 1, 8, 1, 8, 15, 1, 17, 18, 19,
-- 20, 1, 21, 1, 57, 25, 24, 23, 61, 23,
-- 1, 1, 22, 4, 22, 1, 21, 8, 1, 1,
-- 1, 1, 22, 21, 1, 20, 1, 1, 1, 1,
-- 1, 21, 23, 1, 6, 21, 4, 9, 21, 21,
-- 21, 21, 0, 7, 21, 20, 20, 20, 101, 20,
-- 0, 1, 1, 1, 1, 4, 4, 7, 5, 8,
-- 10, 11, 12, 13, 14, 1, 16, 1, 4, 21,
-- 4, 15, 8, 1, 8, 21, 4, 17, 18, 19,
-- 8, 8, 8, 4, 21, 24, 24, 3, 3, 1,
-- 57, 61, 53, 100, 70
--};
--
--/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
-- symbol of state STATE-NUM. */
--static const yytype_uint8 yystos[] =
--{
-- 0, 27, 28, 0, 1, 7, 10, 11, 12, 13,
-- 14, 16, 29, 30, 38, 40, 49, 1, 21, 1,
-- 21, 1, 21, 21, 1, 21, 1, 21, 42, 7,
-- 1, 22, 1, 22, 1, 22, 20, 1, 4, 1,
-- 20, 25, 41, 17, 18, 19, 39, 43, 44, 45,
-- 1, 4, 8, 35, 36, 51, 1, 33, 34, 51,
-- 1, 31, 32, 51, 1, 20, 21, 21, 21, 15,
-- 46, 47, 50, 1, 23, 36, 1, 21, 1, 23,
-- 34, 1, 21, 1, 23, 32, 1, 21, 8, 8,
-- 4, 1, 52, 47, 53, 1, 20, 1, 20, 1,
-- 20, 21, 1, 6, 48, 1, 54, 24, 37, 37,
-- 1, 4, 8, 51, 1, 6, 9, 24, 1, 4,
-- 3, 3, 1, 1, 5
--};
--
--#define yyerrok (yyerrstatus = 0)
--#define yyclearin (yychar = YYEMPTY)
--#define YYEMPTY (-2)
--#define YYEOF 0
--
--#define YYACCEPT goto yyacceptlab
--#define YYABORT goto yyabortlab
--#define YYERROR goto yyerrorlab
--
--
--/* Like YYERROR except do call yyerror. This remains here temporarily
-- to ease the transition to the new meaning of YYERROR, for GCC.
-- Once GCC version 2 has supplanted version 1, this can go. */
--
--#define YYFAIL goto yyerrlab
--
--#define YYRECOVERING() (!!yyerrstatus)
--
--#define YYBACKUP(Token, Value) \
--do \
-- if (yychar == YYEMPTY && yylen == 1) \
-- { \
-- yychar = (Token); \
-- yylval = (Value); \
-- yytoken = YYTRANSLATE (yychar); \
-- YYPOPSTACK (1); \
-- goto yybackup; \
-- } \
-- else \
-- { \
-- yyerror (YY_("syntax error: cannot back up")); \
-- YYERROR; \
-- } \
--while (YYID (0))
--
--
--#define YYTERROR 1
--#define YYERRCODE 256
--
--
--/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
-- If N is 0, then set CURRENT to the empty location which ends
-- the previous symbol: RHS[0] (always defined). */
--
--#define YYRHSLOC(Rhs, K) ((Rhs)[K])
--#ifndef YYLLOC_DEFAULT
--# define YYLLOC_DEFAULT(Current, Rhs, N) \
-- do \
-- if (YYID (N)) \
-- { \
-- (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \
-- (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \
-- (Current).last_line = YYRHSLOC (Rhs, N).last_line; \
-- (Current).last_column = YYRHSLOC (Rhs, N).last_column; \
-- } \
-- else \
-- { \
-- (Current).first_line = (Current).last_line = \
-- YYRHSLOC (Rhs, 0).last_line; \
-- (Current).first_column = (Current).last_column = \
-- YYRHSLOC (Rhs, 0).last_column; \
-- } \
-- while (YYID (0))
--#endif
--
--
--/* YY_LOCATION_PRINT -- Print the location on the stream.
-- This macro was not mandated originally: define only if we know
-- we won't break user code: when these are the locations we know. */
--
--#ifndef YY_LOCATION_PRINT
--# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL
--# define YY_LOCATION_PRINT(File, Loc) \
-- fprintf (File, "%d.%d-%d.%d", \
-- (Loc).first_line, (Loc).first_column, \
-- (Loc).last_line, (Loc).last_column)
--# else
--# define YY_LOCATION_PRINT(File, Loc) ((void) 0)
--# endif
--#endif
--
--
--/* YYLEX -- calling `yylex' with the right arguments. */
--
--#ifdef YYLEX_PARAM
--# define YYLEX yylex (YYLEX_PARAM)
--#else
--# define YYLEX yylex ()
--#endif
--
--/* Enable debugging if requested. */
--#if YYDEBUG
--
--# ifndef YYFPRINTF
--# include <stdio.h> /* INFRINGES ON USER NAME SPACE */
--# define YYFPRINTF fprintf
--# endif
--
--# define YYDPRINTF(Args) \
--do { \
-- if (yydebug) \
-- YYFPRINTF Args; \
--} while (YYID (0))
--
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \
--do { \
-- if (yydebug) \
-- { \
-- YYFPRINTF (stderr, "%s ", Title); \
-- yy_symbol_print (stderr, \
-- Type, Value); \
-- YYFPRINTF (stderr, "\n"); \
-- } \
--} while (YYID (0))
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_value_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (!yyvaluep)
-- return;
--# ifdef YYPRINT
-- if (yytype < YYNTOKENS)
-- YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
--# else
-- YYUSE (yyoutput);
--# endif
-- switch (yytype)
-- {
-- default:
-- break;
-- }
--}
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (yytype < YYNTOKENS)
-- YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
-- else
-- YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
--
-- yy_symbol_value_print (yyoutput, yytype, yyvaluep);
-- YYFPRINTF (yyoutput, ")");
--}
--
--/*------------------------------------------------------------------.
--| yy_stack_print -- Print the state stack from its BOTTOM up to its |
--| TOP (included). |
--`------------------------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_stack_print (yytype_int16 *bottom, yytype_int16 *top)
--#else
--static void
--yy_stack_print (bottom, top)
-- yytype_int16 *bottom;
-- yytype_int16 *top;
--#endif
--{
-- YYFPRINTF (stderr, "Stack now");
-- for (; bottom <= top; ++bottom)
-- YYFPRINTF (stderr, " %d", *bottom);
-- YYFPRINTF (stderr, "\n");
--}
--
--# define YY_STACK_PRINT(Bottom, Top) \
--do { \
-- if (yydebug) \
-- yy_stack_print ((Bottom), (Top)); \
--} while (YYID (0))
--
--
--/*------------------------------------------------.
--| Report that the YYRULE is going to be reduced. |
--`------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_reduce_print (YYSTYPE *yyvsp, int yyrule)
--#else
--static void
--yy_reduce_print (yyvsp, yyrule)
-- YYSTYPE *yyvsp;
-- int yyrule;
--#endif
--{
-- int yynrhs = yyr2[yyrule];
-- int yyi;
-- unsigned long int yylno = yyrline[yyrule];
-- YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
-- yyrule - 1, yylno);
-- /* The symbols being reduced. */
-- for (yyi = 0; yyi < yynrhs; yyi++)
-- {
-- fprintf (stderr, " $%d = ", yyi + 1);
-- yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi],
-- &(yyvsp[(yyi + 1) - (yynrhs)])
-- );
-- fprintf (stderr, "\n");
-- }
--}
--
--# define YY_REDUCE_PRINT(Rule) \
--do { \
-- if (yydebug) \
-- yy_reduce_print (yyvsp, Rule); \
--} while (YYID (0))
--
--/* Nonzero means print parse trace. It is left uninitialized so that
-- multiple parsers can coexist. */
--int yydebug;
--#else /* !YYDEBUG */
--# define YYDPRINTF(Args)
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
--# define YY_STACK_PRINT(Bottom, Top)
--# define YY_REDUCE_PRINT(Rule)
--#endif /* !YYDEBUG */
--
--
--/* YYINITDEPTH -- initial size of the parser's stacks. */
--#ifndef YYINITDEPTH
--# define YYINITDEPTH 200
--#endif
--
--/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
-- if the built-in stack extension method is used).
--
-- Do not make this value too large; the results are undefined if
-- YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
-- evaluated with infinite-precision integer arithmetic. */
--
--#ifndef YYMAXDEPTH
--# define YYMAXDEPTH 10000
--#endif
--
--
--
--#if YYERROR_VERBOSE
--
--# ifndef yystrlen
--# if defined __GLIBC__ && defined _STRING_H
--# define yystrlen strlen
--# else
--/* Return the length of YYSTR. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static YYSIZE_T
--yystrlen (const char *yystr)
--#else
--static YYSIZE_T
--yystrlen (yystr)
-- const char *yystr;
--#endif
--{
-- YYSIZE_T yylen;
-- for (yylen = 0; yystr[yylen]; yylen++)
-- continue;
-- return yylen;
--}
--# endif
--# endif
--
--# ifndef yystpcpy
--# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
--# define yystpcpy stpcpy
--# else
--/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
-- YYDEST. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static char *
--yystpcpy (char *yydest, const char *yysrc)
--#else
--static char *
--yystpcpy (yydest, yysrc)
-- char *yydest;
-- const char *yysrc;
--#endif
--{
-- char *yyd = yydest;
-- const char *yys = yysrc;
--
-- while ((*yyd++ = *yys++) != '\0')
-- continue;
--
-- return yyd - 1;
--}
--# endif
--# endif
--
--# ifndef yytnamerr
--/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
-- quotes and backslashes, so that it's suitable for yyerror. The
-- heuristic is that double-quoting is unnecessary unless the string
-- contains an apostrophe, a comma, or backslash (other than
-- backslash-backslash). YYSTR is taken from yytname. If YYRES is
-- null, do not copy; instead, return the length of what the result
-- would have been. */
--static YYSIZE_T
--yytnamerr (char *yyres, const char *yystr)
--{
-- if (*yystr == '"')
-- {
-- YYSIZE_T yyn = 0;
-- char const *yyp = yystr;
--
-- for (;;)
-- switch (*++yyp)
-- {
-- case '\'':
-- case ',':
-- goto do_not_strip_quotes;
--
-- case '\\':
-- if (*++yyp != '\\')
-- goto do_not_strip_quotes;
-- /* Fall through. */
-- default:
-- if (yyres)
-- yyres[yyn] = *yyp;
-- yyn++;
-- break;
--
-- case '"':
-- if (yyres)
-- yyres[yyn] = '\0';
-- return yyn;
-- }
-- do_not_strip_quotes: ;
-- }
--
-- if (! yyres)
-- return yystrlen (yystr);
--
-- return yystpcpy (yyres, yystr) - yyres;
--}
--# endif
--
--/* Copy into YYRESULT an error message about the unexpected token
-- YYCHAR while in state YYSTATE. Return the number of bytes copied,
-- including the terminating null byte. If YYRESULT is null, do not
-- copy anything; just return the number of bytes that would be
-- copied. As a special case, return 0 if an ordinary "syntax error"
-- message will do. Return YYSIZE_MAXIMUM if overflow occurs during
-- size calculation. */
--static YYSIZE_T
--yysyntax_error (char *yyresult, int yystate, int yychar)
--{
-- int yyn = yypact[yystate];
--
-- if (! (YYPACT_NINF < yyn && yyn <= YYLAST))
-- return 0;
-- else
-- {
-- int yytype = YYTRANSLATE (yychar);
-- YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]);
-- YYSIZE_T yysize = yysize0;
-- YYSIZE_T yysize1;
-- int yysize_overflow = 0;
-- enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
-- char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
-- int yyx;
--
--# if 0
-- /* This is so xgettext sees the translatable formats that are
-- constructed on the fly. */
-- YY_("syntax error, unexpected %s");
-- YY_("syntax error, unexpected %s, expecting %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s");
--# endif
-- char *yyfmt;
-- char const *yyf;
-- static char const yyunexpected[] = "syntax error, unexpected %s";
-- static char const yyexpecting[] = ", expecting %s";
-- static char const yyor[] = " or %s";
-- char yyformat[sizeof yyunexpected
-- + sizeof yyexpecting - 1
-- + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2)
-- * (sizeof yyor - 1))];
-- char const *yyprefix = yyexpecting;
--
-- /* Start YYX at -YYN if negative to avoid negative indexes in
-- YYCHECK. */
-- int yyxbegin = yyn < 0 ? -yyn : 0;
--
-- /* Stay within bounds of both yycheck and yytname. */
-- int yychecklim = YYLAST - yyn + 1;
-- int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
-- int yycount = 1;
--
-- yyarg[0] = yytname[yytype];
-- yyfmt = yystpcpy (yyformat, yyunexpected);
--
-- for (yyx = yyxbegin; yyx < yyxend; ++yyx)
-- if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
-- {
-- if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
-- {
-- yycount = 1;
-- yysize = yysize0;
-- yyformat[sizeof yyunexpected - 1] = '\0';
-- break;
-- }
-- yyarg[yycount++] = yytname[yyx];
-- yysize1 = yysize + yytnamerr (0, yytname[yyx]);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
-- yyfmt = yystpcpy (yyfmt, yyprefix);
-- yyprefix = yyor;
-- }
--
-- yyf = YY_(yyformat);
-- yysize1 = yysize + yystrlen (yyf);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
--
-- if (yysize_overflow)
-- return YYSIZE_MAXIMUM;
--
-- if (yyresult)
-- {
-- /* Avoid sprintf, as that infringes on the user's name space.
-- Don't have undefined behavior even if the translation
-- produced a string with the wrong number of "%s"s. */
-- char *yyp = yyresult;
-- int yyi = 0;
-- while ((*yyp = *yyf) != '\0')
-- {
-- if (*yyp == '%' && yyf[1] == 's' && yyi < yycount)
-- {
-- yyp += yytnamerr (yyp, yyarg[yyi++]);
-- yyf += 2;
-- }
-- else
-- {
-- yyp++;
-- yyf++;
-- }
-- }
-- }
-- return yysize;
-- }
--}
--#endif /* YYERROR_VERBOSE */
--
--
--/*-----------------------------------------------.
--| Release the memory associated to this symbol. |
--`-----------------------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep)
--#else
--static void
--yydestruct (yymsg, yytype, yyvaluep)
-- const char *yymsg;
-- int yytype;
-- YYSTYPE *yyvaluep;
--#endif
--{
-- YYUSE (yyvaluep);
--
-- if (!yymsg)
-- yymsg = "Deleting";
-- YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
--
-- switch (yytype)
-- {
--
-- default:
-- break;
-- }
--}
--
--
--/* Prevent warnings from -Wmissing-prototypes. */
--
--#ifdef YYPARSE_PARAM
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void *YYPARSE_PARAM);
--#else
--int yyparse ();
--#endif
--#else /* ! YYPARSE_PARAM */
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void);
--#else
--int yyparse ();
--#endif
--#endif /* ! YYPARSE_PARAM */
--
--
--
--/* The look-ahead symbol. */
--int yychar;
--
--/* The semantic value of the look-ahead symbol. */
--YYSTYPE yylval;
--
--/* Number of syntax errors so far. */
--int yynerrs;
--
--
--
--/*----------.
--| yyparse. |
--`----------*/
--
--#ifdef YYPARSE_PARAM
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void *YYPARSE_PARAM)
--#else
--int
--yyparse (YYPARSE_PARAM)
-- void *YYPARSE_PARAM;
--#endif
--#else /* ! YYPARSE_PARAM */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void)
--#else
--int
--yyparse ()
--
--#endif
--#endif
--{
--
-- int yystate;
-- int yyn;
-- int yyresult;
-- /* Number of tokens to shift before error messages enabled. */
-- int yyerrstatus;
-- /* Look-ahead token as an internal (translated) token number. */
-- int yytoken = 0;
--#if YYERROR_VERBOSE
-- /* Buffer for error messages, and its allocated size. */
-- char yymsgbuf[128];
-- char *yymsg = yymsgbuf;
-- YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
--#endif
--
-- /* Three stacks and their tools:
-- `yyss': related to states,
-- `yyvs': related to semantic values,
-- `yyls': related to locations.
--
-- Refer to the stacks thru separate pointers, to allow yyoverflow
-- to reallocate them elsewhere. */
--
-- /* The state stack. */
-- yytype_int16 yyssa[YYINITDEPTH];
-- yytype_int16 *yyss = yyssa;
-- yytype_int16 *yyssp;
--
-- /* The semantic value stack. */
-- YYSTYPE yyvsa[YYINITDEPTH];
-- YYSTYPE *yyvs = yyvsa;
-- YYSTYPE *yyvsp;
--
--
--
--#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N))
--
-- YYSIZE_T yystacksize = YYINITDEPTH;
--
-- /* The variables used to return semantic value and location from the
-- action routines. */
-- YYSTYPE yyval;
--
--
-- /* The number of symbols on the RHS of the reduced rule.
-- Keep to zero when no symbol should be popped. */
-- int yylen = 0;
--
-- YYDPRINTF ((stderr, "Starting parse\n"));
--
-- yystate = 0;
-- yyerrstatus = 0;
-- yynerrs = 0;
-- yychar = YYEMPTY; /* Cause a token to be read. */
--
-- /* Initialize stack pointers.
-- Waste one element of value and location stack
-- so that they stay on the same level as the state stack.
-- The wasted elements are never initialized. */
--
-- yyssp = yyss;
-- yyvsp = yyvs;
--
-- goto yysetstate;
--
--/*------------------------------------------------------------.
--| yynewstate -- Push a new state, which is found in yystate. |
--`------------------------------------------------------------*/
-- yynewstate:
-- /* In all cases, when you get here, the value and location stacks
-- have just been pushed. So pushing a state here evens the stacks. */
-- yyssp++;
--
-- yysetstate:
-- *yyssp = yystate;
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- {
-- /* Get the current used size of the three stacks, in elements. */
-- YYSIZE_T yysize = yyssp - yyss + 1;
--
--#ifdef yyoverflow
-- {
-- /* Give user a chance to reallocate the stack. Use copies of
-- these so that the &'s don't force the real ones into
-- memory. */
-- YYSTYPE *yyvs1 = yyvs;
-- yytype_int16 *yyss1 = yyss;
--
--
-- /* Each stack pointer address is followed by the size of the
-- data in use in that stack, in bytes. This used to be a
-- conditional around just the two extra args, but that might
-- be undefined if yyoverflow is a macro. */
-- yyoverflow (YY_("memory exhausted"),
-- &yyss1, yysize * sizeof (*yyssp),
-- &yyvs1, yysize * sizeof (*yyvsp),
--
-- &yystacksize);
--
-- yyss = yyss1;
-- yyvs = yyvs1;
-- }
--#else /* no yyoverflow */
--# ifndef YYSTACK_RELOCATE
-- goto yyexhaustedlab;
--# else
-- /* Extend the stack our own way. */
-- if (YYMAXDEPTH <= yystacksize)
-- goto yyexhaustedlab;
-- yystacksize *= 2;
-- if (YYMAXDEPTH < yystacksize)
-- yystacksize = YYMAXDEPTH;
--
-- {
-- yytype_int16 *yyss1 = yyss;
-- union yyalloc *yyptr =
-- (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
-- if (! yyptr)
-- goto yyexhaustedlab;
-- YYSTACK_RELOCATE (yyss);
-- YYSTACK_RELOCATE (yyvs);
--
--# undef YYSTACK_RELOCATE
-- if (yyss1 != yyssa)
-- YYSTACK_FREE (yyss1);
-- }
--# endif
--#endif /* no yyoverflow */
--
-- yyssp = yyss + yysize - 1;
-- yyvsp = yyvs + yysize - 1;
--
--
-- YYDPRINTF ((stderr, "Stack size increased to %lu\n",
-- (unsigned long int) yystacksize));
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- YYABORT;
-- }
--
-- YYDPRINTF ((stderr, "Entering state %d\n", yystate));
--
-- goto yybackup;
--
--/*-----------.
--| yybackup. |
--`-----------*/
--yybackup:
--
-- /* Do appropriate processing given the current state. Read a
-- look-ahead token if we need one and don't already have one. */
--
-- /* First try to decide what to do without reference to look-ahead token. */
-- yyn = yypact[yystate];
-- if (yyn == YYPACT_NINF)
-- goto yydefault;
--
-- /* Not known => get a look-ahead token if don't already have one. */
--
-- /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */
-- if (yychar == YYEMPTY)
-- {
-- YYDPRINTF ((stderr, "Reading a token: "));
-- yychar = YYLEX;
-- }
--
-- if (yychar <= YYEOF)
-- {
-- yychar = yytoken = YYEOF;
-- YYDPRINTF ((stderr, "Now at end of input.\n"));
-- }
-- else
-- {
-- yytoken = YYTRANSLATE (yychar);
-- YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
-- }
--
-- /* If the proper action on seeing token YYTOKEN is to reduce or to
-- detect an error, take that action. */
-- yyn += yytoken;
-- if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
-- goto yydefault;
-- yyn = yytable[yyn];
-- if (yyn <= 0)
-- {
-- if (yyn == 0 || yyn == YYTABLE_NINF)
-- goto yyerrlab;
-- yyn = -yyn;
-- goto yyreduce;
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- /* Count tokens shifted since error; after three, turn off error
-- status. */
-- if (yyerrstatus)
-- yyerrstatus--;
--
-- /* Shift the look-ahead token. */
-- YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
--
-- /* Discard the shifted token unless it is eof. */
-- if (yychar != YYEOF)
-- yychar = YYEMPTY;
--
-- yystate = yyn;
-- *++yyvsp = yylval;
--
-- goto yynewstate;
--
--
--/*-----------------------------------------------------------.
--| yydefault -- do the default action for the current state. |
--`-----------------------------------------------------------*/
--yydefault:
-- yyn = yydefact[yystate];
-- if (yyn == 0)
-- goto yyerrlab;
-- goto yyreduce;
--
--
--/*-----------------------------.
--| yyreduce -- Do a reduction. |
--`-----------------------------*/
--yyreduce:
-- /* yyn is the number of a rule to reduce with. */
-- yylen = yyr2[yyn];
--
-- /* If YYLEN is nonzero, implement the default value of the action:
-- `$$ = $1'.
--
-- Otherwise, the following line sets YYVAL to garbage.
-- This behavior is undocumented and Bison
-- users should not rely upon it. Assigning to YYVAL
-- unconditionally makes the parser a bit smaller, and it avoids a
-- GCC warning that YYVAL may be used uninitialized. */
-- yyval = yyvsp[1-yylen];
--
--
-- YY_REDUCE_PRINT (yyn);
-- switch (yyn)
-- {
-- case 7:
--#line 77 "mcparse.y"
-- {
-- cur_node = mc_add_node ();
-- cur_node->user_text = (yyvsp[(1) - (1)].ustr);
-- }
-- break;
--
-- case 8:
--#line 81 "mcparse.y"
-- { mc_fatal ("syntax error"); }
-- break;
--
-- case 10:
--#line 86 "mcparse.y"
-- { mc_fatal ("missing ')' in SeverityNames"); }
-- break;
--
-- case 11:
--#line 87 "mcparse.y"
-- { mc_fatal ("missing '(' in SeverityNames"); }
-- break;
--
-- case 12:
--#line 88 "mcparse.y"
-- { mc_fatal ("missing '=' for SeverityNames"); }
-- break;
--
-- case 14:
--#line 90 "mcparse.y"
-- { mc_fatal ("missing ')' in LanguageNames"); }
-- break;
--
-- case 15:
--#line 91 "mcparse.y"
-- { mc_fatal ("missing '(' in LanguageNames"); }
-- break;
--
-- case 16:
--#line 92 "mcparse.y"
-- { mc_fatal ("missing '=' for LanguageNames"); }
-- break;
--
-- case 18:
--#line 94 "mcparse.y"
-- { mc_fatal ("missing ')' in FacilityNames"); }
-- break;
--
-- case 19:
--#line 95 "mcparse.y"
-- { mc_fatal ("missing '(' in FacilityNames"); }
-- break;
--
-- case 20:
--#line 96 "mcparse.y"
-- { mc_fatal ("missing '=' for FacilityNames"); }
-- break;
--
-- case 21:
--#line 98 "mcparse.y"
-- {
-- if ((yyvsp[(3) - (3)].ival) != 10 && (yyvsp[(3) - (3)].ival) != 16)
-- mc_fatal ("OutputBase allows 10 or 16 as value");
-- mcset_out_values_are_decimal = ((yyvsp[(3) - (3)].ival) == 10 ? 1 : 0);
-- }
-- break;
--
-- case 22:
--#line 104 "mcparse.y"
-- {
-- mcset_msg_id_typedef = (yyvsp[(3) - (3)].ustr);
-- }
-- break;
--
-- case 23:
--#line 108 "mcparse.y"
-- {
-- mc_fatal ("MessageIdTypedef expects an identifier");
-- }
-- break;
--
-- case 24:
--#line 112 "mcparse.y"
-- {
-- mc_fatal ("missing '=' for MessageIdTypedef");
-- }
-- break;
--
-- case 27:
--#line 120 "mcparse.y"
-- { mc_fatal ("severity ident missing"); }
-- break;
--
-- case 28:
--#line 125 "mcparse.y"
-- {
-- mc_add_keyword ((yyvsp[(1) - (4)].ustr), MCTOKEN, "severity", (yyvsp[(3) - (4)].ival), (yyvsp[(4) - (4)].ustr));
-- }
-- break;
--
-- case 29:
--#line 128 "mcparse.y"
-- { mc_fatal ("severity number missing"); }
-- break;
--
-- case 30:
--#line 129 "mcparse.y"
-- { mc_fatal ("severity missing '='"); }
-- break;
--
-- case 33:
--#line 135 "mcparse.y"
-- { mc_fatal ("missing ident in FacilityNames"); }
-- break;
--
-- case 34:
--#line 140 "mcparse.y"
-- {
-- mc_add_keyword ((yyvsp[(1) - (4)].ustr), MCTOKEN, "facility", (yyvsp[(3) - (4)].ival), (yyvsp[(4) - (4)].ustr));
-- }
-- break;
--
-- case 35:
--#line 143 "mcparse.y"
-- { mc_fatal ("facility number missing"); }
-- break;
--
-- case 36:
--#line 144 "mcparse.y"
-- { mc_fatal ("facility missing '='"); }
-- break;
--
-- case 39:
--#line 150 "mcparse.y"
-- { mc_fatal ("missing ident in LanguageNames"); }
-- break;
--
-- case 40:
--#line 155 "mcparse.y"
-- {
-- mc_add_keyword ((yyvsp[(1) - (6)].ustr), MCTOKEN, "language", (yyvsp[(3) - (6)].ival), (yyvsp[(6) - (6)].ustr));
-- }
-- break;
--
-- case 41:
--#line 158 "mcparse.y"
-- { mc_fatal ("missing filename in LanguageNames"); }
-- break;
--
-- case 42:
--#line 159 "mcparse.y"
-- { mc_fatal ("missing ':' in LanguageNames"); }
-- break;
--
-- case 43:
--#line 160 "mcparse.y"
-- { mc_fatal ("missing language code in LanguageNames"); }
-- break;
--
-- case 44:
--#line 161 "mcparse.y"
-- { mc_fatal ("missing '=' for LanguageNames"); }
-- break;
--
-- case 45:
--#line 166 "mcparse.y"
-- {
-- (yyval.ustr) = NULL;
-- }
-- break;
--
-- case 46:
--#line 170 "mcparse.y"
-- {
-- (yyval.ustr) = (yyvsp[(2) - (2)].ustr);
-- }
-- break;
--
-- case 47:
--#line 173 "mcparse.y"
-- { mc_fatal ("illegal token in identifier"); (yyval.ustr) = NULL; }
-- break;
--
-- case 48:
--#line 178 "mcparse.y"
-- {
-- cur_node = mc_add_node ();
-- cur_node->symbol = mc_last_symbol;
-- cur_node->facility = mc_cur_facility;
-- cur_node->severity = mc_cur_severity;
-- cur_node->id = ((yyvsp[(1) - (2)].ival) & 0xffffUL);
-- cur_node->vid = ((yyvsp[(1) - (2)].ival) & 0xffffUL) | mc_sefa_val;
-- mc_last_id = (yyvsp[(1) - (2)].ival);
-- }
-- break;
--
-- case 50:
--#line 190 "mcparse.y"
-- { (yyval.ival) = (yyvsp[(3) - (3)].ival); }
-- break;
--
-- case 51:
--#line 191 "mcparse.y"
-- { mc_fatal ("missing number in MessageId"); (yyval.ival) = 0; }
-- break;
--
-- case 52:
--#line 192 "mcparse.y"
-- { mc_fatal ("missing '=' for MessageId"); (yyval.ival) = 0; }
-- break;
--
-- case 53:
--#line 196 "mcparse.y"
-- {
-- (yyval.ival) = ++mc_last_id;
-- }
-- break;
--
-- case 54:
--#line 200 "mcparse.y"
-- {
-- (yyval.ival) = (yyvsp[(1) - (1)].ival);
-- }
-- break;
--
-- case 55:
--#line 204 "mcparse.y"
-- {
-- (yyval.ival) = mc_last_id + (yyvsp[(2) - (2)].ival);
-- }
-- break;
--
-- case 56:
--#line 207 "mcparse.y"
-- { mc_fatal ("missing number after MessageId '+'"); }
-- break;
--
-- case 57:
--#line 212 "mcparse.y"
-- {
-- (yyval.ival) = 0;
-- mc_sefa_val = (mcset_custom_bit ? 1 : 0) << 29;
-- mc_last_symbol = NULL;
-- mc_cur_severity = NULL;
-- mc_cur_facility = NULL;
-- }
-- break;
--
-- case 58:
--#line 220 "mcparse.y"
-- {
-- if ((yyvsp[(1) - (2)].ival) & 1)
-- mc_warn (_("duplicate definition of Severity"));
-- (yyval.ival) = (yyvsp[(1) - (2)].ival) | 1;
-- }
-- break;
--
-- case 59:
--#line 226 "mcparse.y"
-- {
-- if ((yyvsp[(1) - (2)].ival) & 2)
-- mc_warn (_("duplicate definition of Facility"));
-- (yyval.ival) = (yyvsp[(1) - (2)].ival) | 2;
-- }
-- break;
--
-- case 60:
--#line 232 "mcparse.y"
-- {
-- if ((yyvsp[(1) - (2)].ival) & 4)
-- mc_warn (_("duplicate definition of SymbolicName"));
-- (yyval.ival) = (yyvsp[(1) - (2)].ival) | 4;
-- }
-- break;
--
-- case 61:
--#line 240 "mcparse.y"
-- {
-- mc_sefa_val &= ~ (0x3UL << 30);
-- mc_sefa_val |= (((yyvsp[(3) - (3)].tok)->nval & 0x3UL) << 30);
-- mc_cur_severity = (yyvsp[(3) - (3)].tok);
-- }
-- break;
--
-- case 62:
--#line 248 "mcparse.y"
-- {
-- mc_sefa_val &= ~ (0xfffUL << 16);
-- mc_sefa_val |= (((yyvsp[(3) - (3)].tok)->nval & 0xfffUL) << 16);
-- mc_cur_facility = (yyvsp[(3) - (3)].tok);
-- }
-- break;
--
-- case 63:
--#line 256 "mcparse.y"
-- {
-- mc_last_symbol = (yyvsp[(3) - (3)].ustr);
-- }
-- break;
--
-- case 66:
--#line 268 "mcparse.y"
-- {
-- mc_node_lang *h;
-- h = mc_add_node_lang (cur_node, (yyvsp[(1) - (4)].tok), cur_node->vid);
-- h->message = (yyvsp[(3) - (4)].ustr);
-- if (mcset_max_message_length != 0 && unichar_len (h->message) > mcset_max_message_length)
-- mc_warn ("message length to long");
-- }
-- break;
--
-- case 67:
--#line 278 "mcparse.y"
-- {
-- (yyval.ustr) = (yyvsp[(1) - (1)].ustr);
-- }
-- break;
--
-- case 68:
--#line 282 "mcparse.y"
-- {
-- unichar *h;
-- rc_uint_type l1,l2;
-- l1 = unichar_len ((yyvsp[(1) - (2)].ustr));
-- l2 = unichar_len ((yyvsp[(2) - (2)].ustr));
-- h = (unichar *) res_alloc ((l1 + l2 + 1) * sizeof (unichar));
-- if (l1) memcpy (h, (yyvsp[(1) - (2)].ustr), l1 * sizeof (unichar));
-- if (l2) memcpy (&h[l1], (yyvsp[(2) - (2)].ustr), l2 * sizeof (unichar));
-- h[l1 + l2] = 0;
-- (yyval.ustr) = h;
-- }
-- break;
--
-- case 69:
--#line 293 "mcparse.y"
-- { mc_fatal ("missing end of message text"); (yyval.ustr) = NULL; }
-- break;
--
-- case 70:
--#line 294 "mcparse.y"
-- { mc_fatal ("missing end of message text"); (yyval.ustr) = (yyvsp[(1) - (2)].ustr); }
-- break;
--
-- case 71:
--#line 297 "mcparse.y"
-- { (yyval.ustr) = (yyvsp[(1) - (1)].ustr); }
-- break;
--
-- case 72:
--#line 299 "mcparse.y"
-- {
-- unichar *h;
-- rc_uint_type l1,l2;
-- l1 = unichar_len ((yyvsp[(1) - (2)].ustr));
-- l2 = unichar_len ((yyvsp[(2) - (2)].ustr));
-- h = (unichar *) res_alloc ((l1 + l2 + 1) * sizeof (unichar));
-- if (l1) memcpy (h, (yyvsp[(1) - (2)].ustr), l1 * sizeof (unichar));
-- if (l2) memcpy (&h[l1], (yyvsp[(2) - (2)].ustr), l2 * sizeof (unichar));
-- h[l1 + l2] = 0;
-- (yyval.ustr) = h;
-- }
-- break;
--
-- case 73:
--#line 313 "mcparse.y"
-- {
-- (yyval.tok) = (yyvsp[(4) - (5)].tok);
-- }
-- break;
--
-- case 74:
--#line 317 "mcparse.y"
-- {
-- (yyval.tok) = NULL;
-- mc_fatal (_("undeclared language identifier"));
-- }
-- break;
--
-- case 75:
--#line 322 "mcparse.y"
-- {
-- (yyval.tok) = NULL;
-- mc_fatal ("missing newline after Language");
-- }
-- break;
--
-- case 76:
--#line 327 "mcparse.y"
-- {
-- (yyval.tok) = NULL;
-- mc_fatal ("missing ident for Language");
-- }
-- break;
--
-- case 77:
--#line 332 "mcparse.y"
-- {
-- (yyval.tok) = NULL;
-- mc_fatal ("missing '=' for Language");
-- }
-- break;
--
-- case 78:
--#line 338 "mcparse.y"
-- { (yyval.ustr) = (yyvsp[(1) - (1)].ustr); }
-- break;
--
-- case 79:
--#line 339 "mcparse.y"
-- { (yyval.ustr) = (yyvsp[(1) - (1)].tok)->usz; }
-- break;
--
-- case 80:
--#line 343 "mcparse.y"
-- { mclex_want_nl = 1; }
-- break;
--
-- case 81:
--#line 347 "mcparse.y"
-- { mclex_want_line = 1; }
-- break;
--
-- case 82:
--#line 351 "mcparse.y"
-- { mclex_want_filename = 1; }
-- break;
--
--
--/* Line 1267 of yacc.c. */
--#line 1939 "mcparse.c"
-- default: break;
-- }
-- YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
--
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
--
-- *++yyvsp = yyval;
--
--
-- /* Now `shift' the result of the reduction. Determine what state
-- that goes to, based on the state we popped back to and the rule
-- number reduced by. */
--
-- yyn = yyr1[yyn];
--
-- yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
-- if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
-- yystate = yytable[yystate];
-- else
-- yystate = yydefgoto[yyn - YYNTOKENS];
--
-- goto yynewstate;
--
--
--/*------------------------------------.
--| yyerrlab -- here on detecting error |
--`------------------------------------*/
--yyerrlab:
-- /* If not already recovering from an error, report this error. */
-- if (!yyerrstatus)
-- {
-- ++yynerrs;
--#if ! YYERROR_VERBOSE
-- yyerror (YY_("syntax error"));
--#else
-- {
-- YYSIZE_T yysize = yysyntax_error (0, yystate, yychar);
-- if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM)
-- {
-- YYSIZE_T yyalloc = 2 * yysize;
-- if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM))
-- yyalloc = YYSTACK_ALLOC_MAXIMUM;
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
-- yymsg = (char *) YYSTACK_ALLOC (yyalloc);
-- if (yymsg)
-- yymsg_alloc = yyalloc;
-- else
-- {
-- yymsg = yymsgbuf;
-- yymsg_alloc = sizeof yymsgbuf;
-- }
-- }
--
-- if (0 < yysize && yysize <= yymsg_alloc)
-- {
-- (void) yysyntax_error (yymsg, yystate, yychar);
-- yyerror (yymsg);
-- }
-- else
-- {
-- yyerror (YY_("syntax error"));
-- if (yysize != 0)
-- goto yyexhaustedlab;
-- }
-- }
--#endif
-- }
--
--
--
-- if (yyerrstatus == 3)
-- {
-- /* If just tried and failed to reuse look-ahead token after an
-- error, discard it. */
--
-- if (yychar <= YYEOF)
-- {
-- /* Return failure if at end of input. */
-- if (yychar == YYEOF)
-- YYABORT;
-- }
-- else
-- {
-- yydestruct ("Error: discarding",
-- yytoken, &yylval);
-- yychar = YYEMPTY;
-- }
-- }
--
-- /* Else will try to reuse look-ahead token after shifting the error
-- token. */
-- goto yyerrlab1;
--
--
--/*---------------------------------------------------.
--| yyerrorlab -- error raised explicitly by YYERROR. |
--`---------------------------------------------------*/
--yyerrorlab:
--
-- /* Pacify compilers like GCC when the user code never invokes
-- YYERROR and the label yyerrorlab therefore never appears in user
-- code. */
-- if (/*CONSTCOND*/ 0)
-- goto yyerrorlab;
--
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYERROR. */
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
-- yystate = *yyssp;
-- goto yyerrlab1;
--
--
--/*-------------------------------------------------------------.
--| yyerrlab1 -- common code for both syntax error and YYERROR. |
--`-------------------------------------------------------------*/
--yyerrlab1:
-- yyerrstatus = 3; /* Each real token shifted decrements this. */
--
-- for (;;)
-- {
-- yyn = yypact[yystate];
-- if (yyn != YYPACT_NINF)
-- {
-- yyn += YYTERROR;
-- if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
-- {
-- yyn = yytable[yyn];
-- if (0 < yyn)
-- break;
-- }
-- }
--
-- /* Pop the current state because it cannot handle the error token. */
-- if (yyssp == yyss)
-- YYABORT;
--
--
-- yydestruct ("Error: popping",
-- yystos[yystate], yyvsp);
-- YYPOPSTACK (1);
-- yystate = *yyssp;
-- YY_STACK_PRINT (yyss, yyssp);
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- *++yyvsp = yylval;
--
--
-- /* Shift the error token. */
-- YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
--
-- yystate = yyn;
-- goto yynewstate;
--
--
--/*-------------------------------------.
--| yyacceptlab -- YYACCEPT comes here. |
--`-------------------------------------*/
--yyacceptlab:
-- yyresult = 0;
-- goto yyreturn;
--
--/*-----------------------------------.
--| yyabortlab -- YYABORT comes here. |
--`-----------------------------------*/
--yyabortlab:
-- yyresult = 1;
-- goto yyreturn;
--
--#ifndef yyoverflow
--/*-------------------------------------------------.
--| yyexhaustedlab -- memory exhaustion comes here. |
--`-------------------------------------------------*/
--yyexhaustedlab:
-- yyerror (YY_("memory exhausted"));
-- yyresult = 2;
-- /* Fall through. */
--#endif
--
--yyreturn:
-- if (yychar != YYEOF && yychar != YYEMPTY)
-- yydestruct ("Cleanup: discarding lookahead",
-- yytoken, &yylval);
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYABORT or YYACCEPT. */
-- YYPOPSTACK (yylen);
-- YY_STACK_PRINT (yyss, yyssp);
-- while (yyssp != yyss)
-- {
-- yydestruct ("Cleanup: popping",
-- yystos[*yyssp], yyvsp);
-- YYPOPSTACK (1);
-- }
--#ifndef yyoverflow
-- if (yyss != yyssa)
-- YYSTACK_FREE (yyss);
--#endif
--#if YYERROR_VERBOSE
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
--#endif
-- /* Make sure YYID is used. */
-- return YYID (yyresult);
--}
--
--
--#line 354 "mcparse.y"
--
--
--/* Something else. */
--
-diff -Nur binutils-2.24.orig/binutils/mcparse.h binutils-2.24/binutils/mcparse.h
---- binutils-2.24.orig/binutils/mcparse.h 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/mcparse.h 1970-01-01 01:00:00.000000000 +0100
-@@ -1,103 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton interface for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- NL = 258,
-- MCIDENT = 259,
-- MCFILENAME = 260,
-- MCLINE = 261,
-- MCCOMMENT = 262,
-- MCTOKEN = 263,
-- MCENDLINE = 264,
-- MCLANGUAGENAMES = 265,
-- MCFACILITYNAMES = 266,
-- MCSEVERITYNAMES = 267,
-- MCOUTPUTBASE = 268,
-- MCMESSAGEIDTYPEDEF = 269,
-- MCLANGUAGE = 270,
-- MCMESSAGEID = 271,
-- MCSEVERITY = 272,
-- MCFACILITY = 273,
-- MCSYMBOLICNAME = 274,
-- MCNUMBER = 275
-- };
--#endif
--/* Tokens. */
--#define NL 258
--#define MCIDENT 259
--#define MCFILENAME 260
--#define MCLINE 261
--#define MCCOMMENT 262
--#define MCTOKEN 263
--#define MCENDLINE 264
--#define MCLANGUAGENAMES 265
--#define MCFACILITYNAMES 266
--#define MCSEVERITYNAMES 267
--#define MCOUTPUTBASE 268
--#define MCMESSAGEIDTYPEDEF 269
--#define MCLANGUAGE 270
--#define MCMESSAGEID 271
--#define MCSEVERITY 272
--#define MCFACILITY 273
--#define MCSYMBOLICNAME 274
--#define MCNUMBER 275
--
--
--
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 45 "mcparse.y"
--{
-- rc_uint_type ival;
-- unichar *ustr;
-- const mc_keyword *tok;
-- mc_node *nod;
--}
--/* Line 1529 of yacc.c. */
--#line 96 "mcparse.h"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--extern YYSTYPE yylval;
--
-diff -Nur binutils-2.24.orig/binutils/NEWS binutils-2.24/binutils/NEWS
---- binutils-2.24.orig/binutils/NEWS 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/binutils/NEWS 2016-06-30 21:26:12.589890622 +0200
-@@ -1,5 +1,7 @@
- -*- text -*-
-
-+* Add support for the Andes NDS32.
-+
- Changes in 2.24:
-
- * Objcopy now supports wildcard characters in command line options that take
-diff -Nur binutils-2.24.orig/binutils/nlmheader.c binutils-2.24/binutils/nlmheader.c
---- binutils-2.24.orig/binutils/nlmheader.c 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/nlmheader.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,2698 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton implementation for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* C LALR(1) parser skeleton written by Richard Stallman, by
-- simplifying the original so-called "semantic" parser. */
--
--/* All symbols defined below should begin with yy or YY, to avoid
-- infringing on user name space. This should be done even for local
-- variables, as they might otherwise be expanded by user macros.
-- There are some unavoidable exceptions within include files to
-- define necessary library symbols; they are noted "INFRINGES ON
-- USER NAME SPACE" below. */
--
--/* Identify Bison output. */
--#define YYBISON 1
--
--/* Bison version. */
--#define YYBISON_VERSION "2.3"
--
--/* Skeleton name. */
--#define YYSKELETON_NAME "yacc.c"
--
--/* Pure parsers. */
--#define YYPURE 0
--
--/* Using locations. */
--#define YYLSP_NEEDED 0
--
--
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- CHECK = 258,
-- CODESTART = 259,
-- COPYRIGHT = 260,
-- CUSTOM = 261,
-- DATE = 262,
-- DEBUG_K = 263,
-- DESCRIPTION = 264,
-- EXIT = 265,
-- EXPORT = 266,
-- FLAG_ON = 267,
-- FLAG_OFF = 268,
-- FULLMAP = 269,
-- HELP = 270,
-- IMPORT = 271,
-- INPUT = 272,
-- MAP = 273,
-- MESSAGES = 274,
-- MODULE = 275,
-- MULTIPLE = 276,
-- OS_DOMAIN = 277,
-- OUTPUT = 278,
-- PSEUDOPREEMPTION = 279,
-- REENTRANT = 280,
-- SCREENNAME = 281,
-- SHARELIB = 282,
-- STACK = 283,
-- START = 284,
-- SYNCHRONIZE = 285,
-- THREADNAME = 286,
-- TYPE = 287,
-- VERBOSE = 288,
-- VERSIONK = 289,
-- XDCDATA = 290,
-- STRING = 291,
-- QUOTED_STRING = 292
-- };
--#endif
--/* Tokens. */
--#define CHECK 258
--#define CODESTART 259
--#define COPYRIGHT 260
--#define CUSTOM 261
--#define DATE 262
--#define DEBUG_K 263
--#define DESCRIPTION 264
--#define EXIT 265
--#define EXPORT 266
--#define FLAG_ON 267
--#define FLAG_OFF 268
--#define FULLMAP 269
--#define HELP 270
--#define IMPORT 271
--#define INPUT 272
--#define MAP 273
--#define MESSAGES 274
--#define MODULE 275
--#define MULTIPLE 276
--#define OS_DOMAIN 277
--#define OUTPUT 278
--#define PSEUDOPREEMPTION 279
--#define REENTRANT 280
--#define SCREENNAME 281
--#define SHARELIB 282
--#define STACK 283
--#define START 284
--#define SYNCHRONIZE 285
--#define THREADNAME 286
--#define TYPE 287
--#define VERBOSE 288
--#define VERSIONK 289
--#define XDCDATA 290
--#define STRING 291
--#define QUOTED_STRING 292
--
--
--
--
--/* Copy the first part of user declarations. */
--#line 1 "nlmheader.y"
--/* nlmheader.y - parse NLM header specification keywords.
-- Copyright 1993, 1994, 1995, 1997, 1998, 2001, 2002, 2003, 2005, 2007,
-- 2010 Free Software Foundation, Inc.
--
-- This file is part of GNU Binutils.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-- MA 02110-1301, USA. */
--
--/* Written by Ian Lance Taylor <ian@cygnus.com>.
--
-- This bison file parses the commands recognized by the NetWare NLM
-- linker, except for lists of object files. It stores the
-- information in global variables.
--
-- This implementation is based on the description in the NetWare Tool
-- Maker Specification manual, edition 1.0. */
--
--#include "sysdep.h"
--#include "safe-ctype.h"
--#include "bfd.h"
--#include "nlm/common.h"
--#include "nlm/internal.h"
--#include "bucomm.h"
--#include "nlmconv.h"
--
--/* Information is stored in the structures pointed to by these
-- variables. */
--
--Nlm_Internal_Fixed_Header *fixed_hdr;
--Nlm_Internal_Variable_Header *var_hdr;
--Nlm_Internal_Version_Header *version_hdr;
--Nlm_Internal_Copyright_Header *copyright_hdr;
--Nlm_Internal_Extended_Header *extended_hdr;
--
--/* Procedure named by CHECK. */
--char *check_procedure;
--/* File named by CUSTOM. */
--char *custom_file;
--/* Whether to generate debugging information (DEBUG). */
--bfd_boolean debug_info;
--/* Procedure named by EXIT. */
--char *exit_procedure;
--/* Exported symbols (EXPORT). */
--struct string_list *export_symbols;
--/* List of files from INPUT. */
--struct string_list *input_files;
--/* Map file name (MAP, FULLMAP). */
--char *map_file;
--/* Whether a full map has been requested (FULLMAP). */
--bfd_boolean full_map;
--/* File named by HELP. */
--char *help_file;
--/* Imported symbols (IMPORT). */
--struct string_list *import_symbols;
--/* File named by MESSAGES. */
--char *message_file;
--/* Autoload module list (MODULE). */
--struct string_list *modules;
--/* File named by OUTPUT. */
--char *output_file;
--/* File named by SHARELIB. */
--char *sharelib_file;
--/* Start procedure name (START). */
--char *start_procedure;
--/* VERBOSE. */
--bfd_boolean verbose;
--/* RPC description file (XDCDATA). */
--char *rpc_file;
--
--/* The number of serious errors that have occurred. */
--int parse_errors;
--
--/* The current symbol prefix when reading a list of import or export
-- symbols. */
--static char *symbol_prefix;
--
--/* Parser error message handler. */
--#define yyerror(msg) nlmheader_error (msg);
--
--/* Local functions. */
--static int yylex (void);
--static void nlmlex_file_push (const char *);
--static bfd_boolean nlmlex_file_open (const char *);
--static int nlmlex_buf_init (void);
--static char nlmlex_buf_add (int);
--static long nlmlex_get_number (const char *);
--static void nlmheader_identify (void);
--static void nlmheader_warn (const char *, int);
--static void nlmheader_error (const char *);
--static struct string_list * string_list_cons (char *, struct string_list *);
--static struct string_list * string_list_append (struct string_list *,
-- struct string_list *);
--static struct string_list * string_list_append1 (struct string_list *,
-- char *);
--static char *xstrdup (const char *);
--
--
--
--/* Enabling traces. */
--#ifndef YYDEBUG
--# define YYDEBUG 0
--#endif
--
--/* Enabling verbose error messages. */
--#ifdef YYERROR_VERBOSE
--# undef YYERROR_VERBOSE
--# define YYERROR_VERBOSE 1
--#else
--# define YYERROR_VERBOSE 0
--#endif
--
--/* Enabling the token table. */
--#ifndef YYTOKEN_TABLE
--# define YYTOKEN_TABLE 0
--#endif
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 113 "nlmheader.y"
--{
-- char *string;
-- struct string_list *list;
--}
--/* Line 193 of yacc.c. */
--#line 286 "nlmheader.c"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--
--
--/* Copy the second part of user declarations. */
--
--
--/* Line 216 of yacc.c. */
--#line 299 "nlmheader.c"
--
--#ifdef short
--# undef short
--#endif
--
--#ifdef YYTYPE_UINT8
--typedef YYTYPE_UINT8 yytype_uint8;
--#else
--typedef unsigned char yytype_uint8;
--#endif
--
--#ifdef YYTYPE_INT8
--typedef YYTYPE_INT8 yytype_int8;
--#elif (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--typedef signed char yytype_int8;
--#else
--typedef short int yytype_int8;
--#endif
--
--#ifdef YYTYPE_UINT16
--typedef YYTYPE_UINT16 yytype_uint16;
--#else
--typedef unsigned short int yytype_uint16;
--#endif
--
--#ifdef YYTYPE_INT16
--typedef YYTYPE_INT16 yytype_int16;
--#else
--typedef short int yytype_int16;
--#endif
--
--#ifndef YYSIZE_T
--# ifdef __SIZE_TYPE__
--# define YYSIZE_T __SIZE_TYPE__
--# elif defined size_t
--# define YYSIZE_T size_t
--# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stddef.h> /* INFRINGES ON USER NAME SPACE */
--# define YYSIZE_T size_t
--# else
--# define YYSIZE_T unsigned int
--# endif
--#endif
--
--#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
--
--#ifndef YY_
--# if defined YYENABLE_NLS && YYENABLE_NLS
--# if ENABLE_NLS
--# include <libintl.h> /* INFRINGES ON USER NAME SPACE */
--# define YY_(msgid) dgettext ("bison-runtime", msgid)
--# endif
--# endif
--# ifndef YY_
--# define YY_(msgid) msgid
--# endif
--#endif
--
--/* Suppress unused-variable warnings by "using" E. */
--#if ! defined lint || defined __GNUC__
--# define YYUSE(e) ((void) (e))
--#else
--# define YYUSE(e) /* empty */
--#endif
--
--/* Identity function, used to suppress warnings about constant conditions. */
--#ifndef lint
--# define YYID(n) (n)
--#else
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static int
--YYID (int i)
--#else
--static int
--YYID (i)
-- int i;
--#endif
--{
-- return i;
--}
--#endif
--
--#if ! defined yyoverflow || YYERROR_VERBOSE
--
--/* The parser invokes alloca or malloc; define the necessary symbols. */
--
--# ifdef YYSTACK_USE_ALLOCA
--# if YYSTACK_USE_ALLOCA
--# ifdef __GNUC__
--# define YYSTACK_ALLOC __builtin_alloca
--# elif defined __BUILTIN_VA_ARG_INCR
--# include <alloca.h> /* INFRINGES ON USER NAME SPACE */
--# elif defined _AIX
--# define YYSTACK_ALLOC __alloca
--# elif defined _MSC_VER
--# include <malloc.h> /* INFRINGES ON USER NAME SPACE */
--# define alloca _alloca
--# else
--# define YYSTACK_ALLOC alloca
--# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# endif
--# endif
--# endif
--
--# ifdef YYSTACK_ALLOC
-- /* Pacify GCC's `empty if-body' warning. */
--# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0))
--# ifndef YYSTACK_ALLOC_MAXIMUM
-- /* The OS might guarantee only one guard page at the bottom of the stack,
-- and a page size can be as small as 4096 bytes. So we cannot safely
-- invoke alloca (N) if N exceeds 4096. Use a slightly smaller number
-- to allow for a few compiler-allocated temporary stack slots. */
--# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
--# endif
--# else
--# define YYSTACK_ALLOC YYMALLOC
--# define YYSTACK_FREE YYFREE
--# ifndef YYSTACK_ALLOC_MAXIMUM
--# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
--# endif
--# if (defined __cplusplus && ! defined _STDLIB_H \
-- && ! ((defined YYMALLOC || defined malloc) \
-- && (defined YYFREE || defined free)))
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# ifndef YYMALLOC
--# define YYMALLOC malloc
--# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# ifndef YYFREE
--# define YYFREE free
--# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void free (void *); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# endif
--#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
--
--
--#if (! defined yyoverflow \
-- && (! defined __cplusplus \
-- || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
--
--/* A type that is properly aligned for any stack member. */
--union yyalloc
--{
-- yytype_int16 yyss;
-- YYSTYPE yyvs;
-- };
--
--/* The size of the maximum gap between one aligned stack and the next. */
--# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
--
--/* The size of an array large to enough to hold all stacks, each with
-- N elements. */
--# define YYSTACK_BYTES(N) \
-- ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \
-- + YYSTACK_GAP_MAXIMUM)
--
--/* Copy COUNT objects from FROM to TO. The source and destination do
-- not overlap. */
--# ifndef YYCOPY
--# if defined __GNUC__ && 1 < __GNUC__
--# define YYCOPY(To, From, Count) \
-- __builtin_memcpy (To, From, (Count) * sizeof (*(From)))
--# else
--# define YYCOPY(To, From, Count) \
-- do \
-- { \
-- YYSIZE_T yyi; \
-- for (yyi = 0; yyi < (Count); yyi++) \
-- (To)[yyi] = (From)[yyi]; \
-- } \
-- while (YYID (0))
--# endif
--# endif
--
--/* Relocate STACK from its old location to the new one. The
-- local variables YYSIZE and YYSTACKSIZE give the old and new number of
-- elements in the stack, and YYPTR gives the new location of the
-- stack. Advance YYPTR to a properly aligned location for the next
-- stack. */
--# define YYSTACK_RELOCATE(Stack) \
-- do \
-- { \
-- YYSIZE_T yynewbytes; \
-- YYCOPY (&yyptr->Stack, Stack, yysize); \
-- Stack = &yyptr->Stack; \
-- yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
-- yyptr += yynewbytes / sizeof (*yyptr); \
-- } \
-- while (YYID (0))
--
--#endif
--
--/* YYFINAL -- State number of the termination state. */
--#define YYFINAL 64
--/* YYLAST -- Last index in YYTABLE. */
--#define YYLAST 73
--
--/* YYNTOKENS -- Number of terminals. */
--#define YYNTOKENS 40
--/* YYNNTS -- Number of nonterminals. */
--#define YYNNTS 11
--/* YYNRULES -- Number of rules. */
--#define YYNRULES 52
--/* YYNRULES -- Number of states. */
--#define YYNSTATES 82
--
--/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */
--#define YYUNDEFTOK 2
--#define YYMAXUTOK 292
--
--#define YYTRANSLATE(YYX) \
-- ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
--
--/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */
--static const yytype_uint8 yytranslate[] =
--{
-- 0, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 38, 39, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 1, 2, 3, 4,
-- 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
-- 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
-- 35, 36, 37
--};
--
--#if YYDEBUG
--/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
-- YYRHS. */
--static const yytype_uint8 yyprhs[] =
--{
-- 0, 0, 3, 5, 6, 9, 12, 15, 18, 21,
-- 26, 28, 31, 34, 35, 39, 42, 45, 47, 50,
-- 53, 54, 58, 61, 63, 66, 69, 72, 74, 76,
-- 79, 81, 83, 86, 89, 92, 95, 97, 100, 103,
-- 105, 110, 114, 117, 118, 120, 122, 124, 127, 130,
-- 134, 136, 137
--};
--
--/* YYRHS -- A `-1'-separated list of the rules' RHS. */
--static const yytype_int8 yyrhs[] =
--{
-- 41, 0, -1, 42, -1, -1, 43, 42, -1, 3,
-- 36, -1, 4, 36, -1, 5, 37, -1, 6, 36,
-- -1, 7, 36, 36, 36, -1, 8, -1, 9, 37,
-- -1, 10, 36, -1, -1, 11, 44, 46, -1, 12,
-- 36, -1, 13, 36, -1, 14, -1, 14, 36, -1,
-- 15, 36, -1, -1, 16, 45, 46, -1, 17, 50,
-- -1, 18, -1, 18, 36, -1, 19, 36, -1, 20,
-- 50, -1, 21, -1, 22, -1, 23, 36, -1, 24,
-- -1, 25, -1, 26, 37, -1, 27, 36, -1, 28,
-- 36, -1, 29, 36, -1, 30, -1, 31, 37, -1,
-- 32, 36, -1, 33, -1, 34, 36, 36, 36, -1,
-- 34, 36, 36, -1, 35, 36, -1, -1, 47, -1,
-- 49, -1, 48, -1, 47, 49, -1, 47, 48, -1,
-- 38, 36, 39, -1, 36, -1, -1, 36, 50, -1
--};
--
--/* YYRLINE[YYN] -- source line where rule number YYN was defined. */
--static const yytype_uint16 yyrline[] =
--{
-- 0, 144, 144, 149, 151, 157, 161, 166, 183, 187,
-- 205, 209, 225, 230, 229, 237, 242, 247, 252, 257,
-- 262, 261, 269, 273, 277, 281, 285, 289, 293, 297,
-- 304, 308, 312, 328, 332, 337, 341, 345, 361, 366,
-- 370, 394, 410, 420, 423, 434, 438, 442, 446, 455,
-- 466, 483, 486
--};
--#endif
--
--#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE
--/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
-- First, the terminals, then, starting at YYNTOKENS, nonterminals. */
--static const char *const yytname[] =
--{
-- "$end", "error", "$undefined", "CHECK", "CODESTART", "COPYRIGHT",
-- "CUSTOM", "DATE", "DEBUG_K", "DESCRIPTION", "EXIT", "EXPORT", "FLAG_ON",
-- "FLAG_OFF", "FULLMAP", "HELP", "IMPORT", "INPUT", "MAP", "MESSAGES",
-- "MODULE", "MULTIPLE", "OS_DOMAIN", "OUTPUT", "PSEUDOPREEMPTION",
-- "REENTRANT", "SCREENNAME", "SHARELIB", "STACK", "START", "SYNCHRONIZE",
-- "THREADNAME", "TYPE", "VERBOSE", "VERSIONK", "XDCDATA", "STRING",
-- "QUOTED_STRING", "'('", "')'", "$accept", "file", "commands", "command",
-- "@1", "@2", "symbol_list_opt", "symbol_list", "symbol_prefix", "symbol",
-- "string_list", 0
--};
--#endif
--
--# ifdef YYPRINT
--/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to
-- token YYLEX-NUM. */
--static const yytype_uint16 yytoknum[] =
--{
-- 0, 256, 257, 258, 259, 260, 261, 262, 263, 264,
-- 265, 266, 267, 268, 269, 270, 271, 272, 273, 274,
-- 275, 276, 277, 278, 279, 280, 281, 282, 283, 284,
-- 285, 286, 287, 288, 289, 290, 291, 292, 40, 41
--};
--# endif
--
--/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */
--static const yytype_uint8 yyr1[] =
--{
-- 0, 40, 41, 42, 42, 43, 43, 43, 43, 43,
-- 43, 43, 43, 44, 43, 43, 43, 43, 43, 43,
-- 45, 43, 43, 43, 43, 43, 43, 43, 43, 43,
-- 43, 43, 43, 43, 43, 43, 43, 43, 43, 43,
-- 43, 43, 43, 46, 46, 47, 47, 47, 47, 48,
-- 49, 50, 50
--};
--
--/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */
--static const yytype_uint8 yyr2[] =
--{
-- 0, 2, 1, 0, 2, 2, 2, 2, 2, 4,
-- 1, 2, 2, 0, 3, 2, 2, 1, 2, 2,
-- 0, 3, 2, 1, 2, 2, 2, 1, 1, 2,
-- 1, 1, 2, 2, 2, 2, 1, 2, 2, 1,
-- 4, 3, 2, 0, 1, 1, 1, 2, 2, 3,
-- 1, 0, 2
--};
--
--/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
-- STATE-NUM when YYTABLE doesn't specify something else to do. Zero
-- means the default is an error. */
--static const yytype_uint8 yydefact[] =
--{
-- 3, 0, 0, 0, 0, 0, 10, 0, 0, 13,
-- 0, 0, 17, 0, 20, 51, 23, 0, 51, 27,
-- 28, 0, 30, 31, 0, 0, 0, 0, 36, 0,
-- 0, 39, 0, 0, 0, 2, 3, 5, 6, 7,
-- 8, 0, 11, 12, 43, 15, 16, 18, 19, 43,
-- 51, 22, 24, 25, 26, 29, 32, 33, 34, 35,
-- 37, 38, 0, 42, 1, 4, 0, 50, 0, 14,
-- 44, 46, 45, 21, 52, 41, 9, 0, 48, 47,
-- 40, 49
--};
--
--/* YYDEFGOTO[NTERM-NUM]. */
--static const yytype_int8 yydefgoto[] =
--{
-- -1, 34, 35, 36, 44, 49, 69, 70, 71, 72,
-- 51
--};
--
--/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
-- STATE-NUM. */
--#define YYPACT_NINF -20
--static const yytype_int8 yypact[] =
--{
-- -3, -1, 1, 2, 4, 5, -20, 6, 8, -20,
-- 9, 10, 11, 12, -20, 13, 14, 16, 13, -20,
-- -20, 17, -20, -20, 18, 20, 21, 22, -20, 23,
-- 25, -20, 26, 27, 38, -20, -3, -20, -20, -20,
-- -20, 28, -20, -20, -2, -20, -20, -20, -20, -2,
-- 13, -20, -20, -20, -20, -20, -20, -20, -20, -20,
-- -20, -20, 30, -20, -20, -20, 31, -20, 32, -20,
-- -2, -20, -20, -20, -20, 33, -20, 3, -20, -20,
-- -20, -20
--};
--
--/* YYPGOTO[NTERM-NUM]. */
--static const yytype_int8 yypgoto[] =
--{
-- -20, -20, 34, -20, -20, -20, 24, -20, -19, -16,
-- 15
--};
--
--/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If
-- positive, shift that token. If negative, reduce the rule which
-- number is the opposite. If zero, do what YYDEFACT says.
-- If YYTABLE_NINF, syntax error. */
--#define YYTABLE_NINF -1
--static const yytype_uint8 yytable[] =
--{
-- 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
-- 11, 12, 13, 14, 15, 16, 17, 18, 19, 20,
-- 21, 22, 23, 24, 25, 26, 27, 28, 29, 30,
-- 31, 32, 33, 54, 67, 37, 68, 38, 64, 39,
-- 40, 41, 81, 42, 43, 45, 46, 47, 48, 50,
-- 52, 78, 53, 55, 79, 56, 57, 58, 59, 0,
-- 60, 61, 62, 63, 66, 74, 75, 76, 77, 80,
-- 65, 0, 0, 73
--};
--
--static const yytype_int8 yycheck[] =
--{
-- 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
-- 13, 14, 15, 16, 17, 18, 19, 20, 21, 22,
-- 23, 24, 25, 26, 27, 28, 29, 30, 31, 32,
-- 33, 34, 35, 18, 36, 36, 38, 36, 0, 37,
-- 36, 36, 39, 37, 36, 36, 36, 36, 36, 36,
-- 36, 70, 36, 36, 70, 37, 36, 36, 36, -1,
-- 37, 36, 36, 36, 36, 50, 36, 36, 36, 36,
-- 36, -1, -1, 49
--};
--
--/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
-- symbol of state STATE-NUM. */
--static const yytype_uint8 yystos[] =
--{
-- 0, 3, 4, 5, 6, 7, 8, 9, 10, 11,
-- 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
-- 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-- 32, 33, 34, 35, 41, 42, 43, 36, 36, 37,
-- 36, 36, 37, 36, 44, 36, 36, 36, 36, 45,
-- 36, 50, 36, 36, 50, 36, 37, 36, 36, 36,
-- 37, 36, 36, 36, 0, 42, 36, 36, 38, 46,
-- 47, 48, 49, 46, 50, 36, 36, 36, 48, 49,
-- 36, 39
--};
--
--#define yyerrok (yyerrstatus = 0)
--#define yyclearin (yychar = YYEMPTY)
--#define YYEMPTY (-2)
--#define YYEOF 0
--
--#define YYACCEPT goto yyacceptlab
--#define YYABORT goto yyabortlab
--#define YYERROR goto yyerrorlab
--
--
--/* Like YYERROR except do call yyerror. This remains here temporarily
-- to ease the transition to the new meaning of YYERROR, for GCC.
-- Once GCC version 2 has supplanted version 1, this can go. */
--
--#define YYFAIL goto yyerrlab
--
--#define YYRECOVERING() (!!yyerrstatus)
--
--#define YYBACKUP(Token, Value) \
--do \
-- if (yychar == YYEMPTY && yylen == 1) \
-- { \
-- yychar = (Token); \
-- yylval = (Value); \
-- yytoken = YYTRANSLATE (yychar); \
-- YYPOPSTACK (1); \
-- goto yybackup; \
-- } \
-- else \
-- { \
-- yyerror (YY_("syntax error: cannot back up")); \
-- YYERROR; \
-- } \
--while (YYID (0))
--
--
--#define YYTERROR 1
--#define YYERRCODE 256
--
--
--/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
-- If N is 0, then set CURRENT to the empty location which ends
-- the previous symbol: RHS[0] (always defined). */
--
--#define YYRHSLOC(Rhs, K) ((Rhs)[K])
--#ifndef YYLLOC_DEFAULT
--# define YYLLOC_DEFAULT(Current, Rhs, N) \
-- do \
-- if (YYID (N)) \
-- { \
-- (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \
-- (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \
-- (Current).last_line = YYRHSLOC (Rhs, N).last_line; \
-- (Current).last_column = YYRHSLOC (Rhs, N).last_column; \
-- } \
-- else \
-- { \
-- (Current).first_line = (Current).last_line = \
-- YYRHSLOC (Rhs, 0).last_line; \
-- (Current).first_column = (Current).last_column = \
-- YYRHSLOC (Rhs, 0).last_column; \
-- } \
-- while (YYID (0))
--#endif
--
--
--/* YY_LOCATION_PRINT -- Print the location on the stream.
-- This macro was not mandated originally: define only if we know
-- we won't break user code: when these are the locations we know. */
--
--#ifndef YY_LOCATION_PRINT
--# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL
--# define YY_LOCATION_PRINT(File, Loc) \
-- fprintf (File, "%d.%d-%d.%d", \
-- (Loc).first_line, (Loc).first_column, \
-- (Loc).last_line, (Loc).last_column)
--# else
--# define YY_LOCATION_PRINT(File, Loc) ((void) 0)
--# endif
--#endif
--
--
--/* YYLEX -- calling `yylex' with the right arguments. */
--
--#ifdef YYLEX_PARAM
--# define YYLEX yylex (YYLEX_PARAM)
--#else
--# define YYLEX yylex ()
--#endif
--
--/* Enable debugging if requested. */
--#if YYDEBUG
--
--# ifndef YYFPRINTF
--# include <stdio.h> /* INFRINGES ON USER NAME SPACE */
--# define YYFPRINTF fprintf
--# endif
--
--# define YYDPRINTF(Args) \
--do { \
-- if (yydebug) \
-- YYFPRINTF Args; \
--} while (YYID (0))
--
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \
--do { \
-- if (yydebug) \
-- { \
-- YYFPRINTF (stderr, "%s ", Title); \
-- yy_symbol_print (stderr, \
-- Type, Value); \
-- YYFPRINTF (stderr, "\n"); \
-- } \
--} while (YYID (0))
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_value_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (!yyvaluep)
-- return;
--# ifdef YYPRINT
-- if (yytype < YYNTOKENS)
-- YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
--# else
-- YYUSE (yyoutput);
--# endif
-- switch (yytype)
-- {
-- default:
-- break;
-- }
--}
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (yytype < YYNTOKENS)
-- YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
-- else
-- YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
--
-- yy_symbol_value_print (yyoutput, yytype, yyvaluep);
-- YYFPRINTF (yyoutput, ")");
--}
--
--/*------------------------------------------------------------------.
--| yy_stack_print -- Print the state stack from its BOTTOM up to its |
--| TOP (included). |
--`------------------------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_stack_print (yytype_int16 *bottom, yytype_int16 *top)
--#else
--static void
--yy_stack_print (bottom, top)
-- yytype_int16 *bottom;
-- yytype_int16 *top;
--#endif
--{
-- YYFPRINTF (stderr, "Stack now");
-- for (; bottom <= top; ++bottom)
-- YYFPRINTF (stderr, " %d", *bottom);
-- YYFPRINTF (stderr, "\n");
--}
--
--# define YY_STACK_PRINT(Bottom, Top) \
--do { \
-- if (yydebug) \
-- yy_stack_print ((Bottom), (Top)); \
--} while (YYID (0))
--
--
--/*------------------------------------------------.
--| Report that the YYRULE is going to be reduced. |
--`------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_reduce_print (YYSTYPE *yyvsp, int yyrule)
--#else
--static void
--yy_reduce_print (yyvsp, yyrule)
-- YYSTYPE *yyvsp;
-- int yyrule;
--#endif
--{
-- int yynrhs = yyr2[yyrule];
-- int yyi;
-- unsigned long int yylno = yyrline[yyrule];
-- YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
-- yyrule - 1, yylno);
-- /* The symbols being reduced. */
-- for (yyi = 0; yyi < yynrhs; yyi++)
-- {
-- fprintf (stderr, " $%d = ", yyi + 1);
-- yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi],
-- &(yyvsp[(yyi + 1) - (yynrhs)])
-- );
-- fprintf (stderr, "\n");
-- }
--}
--
--# define YY_REDUCE_PRINT(Rule) \
--do { \
-- if (yydebug) \
-- yy_reduce_print (yyvsp, Rule); \
--} while (YYID (0))
--
--/* Nonzero means print parse trace. It is left uninitialized so that
-- multiple parsers can coexist. */
--int yydebug;
--#else /* !YYDEBUG */
--# define YYDPRINTF(Args)
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
--# define YY_STACK_PRINT(Bottom, Top)
--# define YY_REDUCE_PRINT(Rule)
--#endif /* !YYDEBUG */
--
--
--/* YYINITDEPTH -- initial size of the parser's stacks. */
--#ifndef YYINITDEPTH
--# define YYINITDEPTH 200
--#endif
--
--/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
-- if the built-in stack extension method is used).
--
-- Do not make this value too large; the results are undefined if
-- YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
-- evaluated with infinite-precision integer arithmetic. */
--
--#ifndef YYMAXDEPTH
--# define YYMAXDEPTH 10000
--#endif
--
--
--
--#if YYERROR_VERBOSE
--
--# ifndef yystrlen
--# if defined __GLIBC__ && defined _STRING_H
--# define yystrlen strlen
--# else
--/* Return the length of YYSTR. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static YYSIZE_T
--yystrlen (const char *yystr)
--#else
--static YYSIZE_T
--yystrlen (yystr)
-- const char *yystr;
--#endif
--{
-- YYSIZE_T yylen;
-- for (yylen = 0; yystr[yylen]; yylen++)
-- continue;
-- return yylen;
--}
--# endif
--# endif
--
--# ifndef yystpcpy
--# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
--# define yystpcpy stpcpy
--# else
--/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
-- YYDEST. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static char *
--yystpcpy (char *yydest, const char *yysrc)
--#else
--static char *
--yystpcpy (yydest, yysrc)
-- char *yydest;
-- const char *yysrc;
--#endif
--{
-- char *yyd = yydest;
-- const char *yys = yysrc;
--
-- while ((*yyd++ = *yys++) != '\0')
-- continue;
--
-- return yyd - 1;
--}
--# endif
--# endif
--
--# ifndef yytnamerr
--/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
-- quotes and backslashes, so that it's suitable for yyerror. The
-- heuristic is that double-quoting is unnecessary unless the string
-- contains an apostrophe, a comma, or backslash (other than
-- backslash-backslash). YYSTR is taken from yytname. If YYRES is
-- null, do not copy; instead, return the length of what the result
-- would have been. */
--static YYSIZE_T
--yytnamerr (char *yyres, const char *yystr)
--{
-- if (*yystr == '"')
-- {
-- YYSIZE_T yyn = 0;
-- char const *yyp = yystr;
--
-- for (;;)
-- switch (*++yyp)
-- {
-- case '\'':
-- case ',':
-- goto do_not_strip_quotes;
--
-- case '\\':
-- if (*++yyp != '\\')
-- goto do_not_strip_quotes;
-- /* Fall through. */
-- default:
-- if (yyres)
-- yyres[yyn] = *yyp;
-- yyn++;
-- break;
--
-- case '"':
-- if (yyres)
-- yyres[yyn] = '\0';
-- return yyn;
-- }
-- do_not_strip_quotes: ;
-- }
--
-- if (! yyres)
-- return yystrlen (yystr);
--
-- return yystpcpy (yyres, yystr) - yyres;
--}
--# endif
--
--/* Copy into YYRESULT an error message about the unexpected token
-- YYCHAR while in state YYSTATE. Return the number of bytes copied,
-- including the terminating null byte. If YYRESULT is null, do not
-- copy anything; just return the number of bytes that would be
-- copied. As a special case, return 0 if an ordinary "syntax error"
-- message will do. Return YYSIZE_MAXIMUM if overflow occurs during
-- size calculation. */
--static YYSIZE_T
--yysyntax_error (char *yyresult, int yystate, int yychar)
--{
-- int yyn = yypact[yystate];
--
-- if (! (YYPACT_NINF < yyn && yyn <= YYLAST))
-- return 0;
-- else
-- {
-- int yytype = YYTRANSLATE (yychar);
-- YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]);
-- YYSIZE_T yysize = yysize0;
-- YYSIZE_T yysize1;
-- int yysize_overflow = 0;
-- enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
-- char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
-- int yyx;
--
--# if 0
-- /* This is so xgettext sees the translatable formats that are
-- constructed on the fly. */
-- YY_("syntax error, unexpected %s");
-- YY_("syntax error, unexpected %s, expecting %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s");
--# endif
-- char *yyfmt;
-- char const *yyf;
-- static char const yyunexpected[] = "syntax error, unexpected %s";
-- static char const yyexpecting[] = ", expecting %s";
-- static char const yyor[] = " or %s";
-- char yyformat[sizeof yyunexpected
-- + sizeof yyexpecting - 1
-- + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2)
-- * (sizeof yyor - 1))];
-- char const *yyprefix = yyexpecting;
--
-- /* Start YYX at -YYN if negative to avoid negative indexes in
-- YYCHECK. */
-- int yyxbegin = yyn < 0 ? -yyn : 0;
--
-- /* Stay within bounds of both yycheck and yytname. */
-- int yychecklim = YYLAST - yyn + 1;
-- int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
-- int yycount = 1;
--
-- yyarg[0] = yytname[yytype];
-- yyfmt = yystpcpy (yyformat, yyunexpected);
--
-- for (yyx = yyxbegin; yyx < yyxend; ++yyx)
-- if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
-- {
-- if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
-- {
-- yycount = 1;
-- yysize = yysize0;
-- yyformat[sizeof yyunexpected - 1] = '\0';
-- break;
-- }
-- yyarg[yycount++] = yytname[yyx];
-- yysize1 = yysize + yytnamerr (0, yytname[yyx]);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
-- yyfmt = yystpcpy (yyfmt, yyprefix);
-- yyprefix = yyor;
-- }
--
-- yyf = YY_(yyformat);
-- yysize1 = yysize + yystrlen (yyf);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
--
-- if (yysize_overflow)
-- return YYSIZE_MAXIMUM;
--
-- if (yyresult)
-- {
-- /* Avoid sprintf, as that infringes on the user's name space.
-- Don't have undefined behavior even if the translation
-- produced a string with the wrong number of "%s"s. */
-- char *yyp = yyresult;
-- int yyi = 0;
-- while ((*yyp = *yyf) != '\0')
-- {
-- if (*yyp == '%' && yyf[1] == 's' && yyi < yycount)
-- {
-- yyp += yytnamerr (yyp, yyarg[yyi++]);
-- yyf += 2;
-- }
-- else
-- {
-- yyp++;
-- yyf++;
-- }
-- }
-- }
-- return yysize;
-- }
--}
--#endif /* YYERROR_VERBOSE */
--
--
--/*-----------------------------------------------.
--| Release the memory associated to this symbol. |
--`-----------------------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep)
--#else
--static void
--yydestruct (yymsg, yytype, yyvaluep)
-- const char *yymsg;
-- int yytype;
-- YYSTYPE *yyvaluep;
--#endif
--{
-- YYUSE (yyvaluep);
--
-- if (!yymsg)
-- yymsg = "Deleting";
-- YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
--
-- switch (yytype)
-- {
--
-- default:
-- break;
-- }
--}
--
--
--/* Prevent warnings from -Wmissing-prototypes. */
--
--#ifdef YYPARSE_PARAM
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void *YYPARSE_PARAM);
--#else
--int yyparse ();
--#endif
--#else /* ! YYPARSE_PARAM */
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void);
--#else
--int yyparse ();
--#endif
--#endif /* ! YYPARSE_PARAM */
--
--
--
--/* The look-ahead symbol. */
--int yychar;
--
--/* The semantic value of the look-ahead symbol. */
--YYSTYPE yylval;
--
--/* Number of syntax errors so far. */
--int yynerrs;
--
--
--
--/*----------.
--| yyparse. |
--`----------*/
--
--#ifdef YYPARSE_PARAM
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void *YYPARSE_PARAM)
--#else
--int
--yyparse (YYPARSE_PARAM)
-- void *YYPARSE_PARAM;
--#endif
--#else /* ! YYPARSE_PARAM */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void)
--#else
--int
--yyparse ()
--
--#endif
--#endif
--{
--
-- int yystate;
-- int yyn;
-- int yyresult;
-- /* Number of tokens to shift before error messages enabled. */
-- int yyerrstatus;
-- /* Look-ahead token as an internal (translated) token number. */
-- int yytoken = 0;
--#if YYERROR_VERBOSE
-- /* Buffer for error messages, and its allocated size. */
-- char yymsgbuf[128];
-- char *yymsg = yymsgbuf;
-- YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
--#endif
--
-- /* Three stacks and their tools:
-- `yyss': related to states,
-- `yyvs': related to semantic values,
-- `yyls': related to locations.
--
-- Refer to the stacks thru separate pointers, to allow yyoverflow
-- to reallocate them elsewhere. */
--
-- /* The state stack. */
-- yytype_int16 yyssa[YYINITDEPTH];
-- yytype_int16 *yyss = yyssa;
-- yytype_int16 *yyssp;
--
-- /* The semantic value stack. */
-- YYSTYPE yyvsa[YYINITDEPTH];
-- YYSTYPE *yyvs = yyvsa;
-- YYSTYPE *yyvsp;
--
--
--
--#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N))
--
-- YYSIZE_T yystacksize = YYINITDEPTH;
--
-- /* The variables used to return semantic value and location from the
-- action routines. */
-- YYSTYPE yyval;
--
--
-- /* The number of symbols on the RHS of the reduced rule.
-- Keep to zero when no symbol should be popped. */
-- int yylen = 0;
--
-- YYDPRINTF ((stderr, "Starting parse\n"));
--
-- yystate = 0;
-- yyerrstatus = 0;
-- yynerrs = 0;
-- yychar = YYEMPTY; /* Cause a token to be read. */
--
-- /* Initialize stack pointers.
-- Waste one element of value and location stack
-- so that they stay on the same level as the state stack.
-- The wasted elements are never initialized. */
--
-- yyssp = yyss;
-- yyvsp = yyvs;
--
-- goto yysetstate;
--
--/*------------------------------------------------------------.
--| yynewstate -- Push a new state, which is found in yystate. |
--`------------------------------------------------------------*/
-- yynewstate:
-- /* In all cases, when you get here, the value and location stacks
-- have just been pushed. So pushing a state here evens the stacks. */
-- yyssp++;
--
-- yysetstate:
-- *yyssp = yystate;
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- {
-- /* Get the current used size of the three stacks, in elements. */
-- YYSIZE_T yysize = yyssp - yyss + 1;
--
--#ifdef yyoverflow
-- {
-- /* Give user a chance to reallocate the stack. Use copies of
-- these so that the &'s don't force the real ones into
-- memory. */
-- YYSTYPE *yyvs1 = yyvs;
-- yytype_int16 *yyss1 = yyss;
--
--
-- /* Each stack pointer address is followed by the size of the
-- data in use in that stack, in bytes. This used to be a
-- conditional around just the two extra args, but that might
-- be undefined if yyoverflow is a macro. */
-- yyoverflow (YY_("memory exhausted"),
-- &yyss1, yysize * sizeof (*yyssp),
-- &yyvs1, yysize * sizeof (*yyvsp),
--
-- &yystacksize);
--
-- yyss = yyss1;
-- yyvs = yyvs1;
-- }
--#else /* no yyoverflow */
--# ifndef YYSTACK_RELOCATE
-- goto yyexhaustedlab;
--# else
-- /* Extend the stack our own way. */
-- if (YYMAXDEPTH <= yystacksize)
-- goto yyexhaustedlab;
-- yystacksize *= 2;
-- if (YYMAXDEPTH < yystacksize)
-- yystacksize = YYMAXDEPTH;
--
-- {
-- yytype_int16 *yyss1 = yyss;
-- union yyalloc *yyptr =
-- (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
-- if (! yyptr)
-- goto yyexhaustedlab;
-- YYSTACK_RELOCATE (yyss);
-- YYSTACK_RELOCATE (yyvs);
--
--# undef YYSTACK_RELOCATE
-- if (yyss1 != yyssa)
-- YYSTACK_FREE (yyss1);
-- }
--# endif
--#endif /* no yyoverflow */
--
-- yyssp = yyss + yysize - 1;
-- yyvsp = yyvs + yysize - 1;
--
--
-- YYDPRINTF ((stderr, "Stack size increased to %lu\n",
-- (unsigned long int) yystacksize));
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- YYABORT;
-- }
--
-- YYDPRINTF ((stderr, "Entering state %d\n", yystate));
--
-- goto yybackup;
--
--/*-----------.
--| yybackup. |
--`-----------*/
--yybackup:
--
-- /* Do appropriate processing given the current state. Read a
-- look-ahead token if we need one and don't already have one. */
--
-- /* First try to decide what to do without reference to look-ahead token. */
-- yyn = yypact[yystate];
-- if (yyn == YYPACT_NINF)
-- goto yydefault;
--
-- /* Not known => get a look-ahead token if don't already have one. */
--
-- /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */
-- if (yychar == YYEMPTY)
-- {
-- YYDPRINTF ((stderr, "Reading a token: "));
-- yychar = YYLEX;
-- }
--
-- if (yychar <= YYEOF)
-- {
-- yychar = yytoken = YYEOF;
-- YYDPRINTF ((stderr, "Now at end of input.\n"));
-- }
-- else
-- {
-- yytoken = YYTRANSLATE (yychar);
-- YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
-- }
--
-- /* If the proper action on seeing token YYTOKEN is to reduce or to
-- detect an error, take that action. */
-- yyn += yytoken;
-- if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
-- goto yydefault;
-- yyn = yytable[yyn];
-- if (yyn <= 0)
-- {
-- if (yyn == 0 || yyn == YYTABLE_NINF)
-- goto yyerrlab;
-- yyn = -yyn;
-- goto yyreduce;
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- /* Count tokens shifted since error; after three, turn off error
-- status. */
-- if (yyerrstatus)
-- yyerrstatus--;
--
-- /* Shift the look-ahead token. */
-- YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
--
-- /* Discard the shifted token unless it is eof. */
-- if (yychar != YYEOF)
-- yychar = YYEMPTY;
--
-- yystate = yyn;
-- *++yyvsp = yylval;
--
-- goto yynewstate;
--
--
--/*-----------------------------------------------------------.
--| yydefault -- do the default action for the current state. |
--`-----------------------------------------------------------*/
--yydefault:
-- yyn = yydefact[yystate];
-- if (yyn == 0)
-- goto yyerrlab;
-- goto yyreduce;
--
--
--/*-----------------------------.
--| yyreduce -- Do a reduction. |
--`-----------------------------*/
--yyreduce:
-- /* yyn is the number of a rule to reduce with. */
-- yylen = yyr2[yyn];
--
-- /* If YYLEN is nonzero, implement the default value of the action:
-- `$$ = $1'.
--
-- Otherwise, the following line sets YYVAL to garbage.
-- This behavior is undocumented and Bison
-- users should not rely upon it. Assigning to YYVAL
-- unconditionally makes the parser a bit smaller, and it avoids a
-- GCC warning that YYVAL may be used uninitialized. */
-- yyval = yyvsp[1-yylen];
--
--
-- YY_REDUCE_PRINT (yyn);
-- switch (yyn)
-- {
-- case 5:
--#line 158 "nlmheader.y"
-- {
-- check_procedure = (yyvsp[(2) - (2)].string);
-- }
-- break;
--
-- case 6:
--#line 162 "nlmheader.y"
-- {
-- nlmheader_warn (_("CODESTART is not implemented; sorry"), -1);
-- free ((yyvsp[(2) - (2)].string));
-- }
-- break;
--
-- case 7:
--#line 167 "nlmheader.y"
-- {
-- int len;
--
-- strncpy (copyright_hdr->stamp, "CoPyRiGhT=", 10);
-- len = strlen ((yyvsp[(2) - (2)].string));
-- if (len >= NLM_MAX_COPYRIGHT_MESSAGE_LENGTH)
-- {
-- nlmheader_warn (_("copyright string is too long"),
-- NLM_MAX_COPYRIGHT_MESSAGE_LENGTH - 1);
-- len = NLM_MAX_COPYRIGHT_MESSAGE_LENGTH - 1;
-- }
-- copyright_hdr->copyrightMessageLength = len;
-- strncpy (copyright_hdr->copyrightMessage, (yyvsp[(2) - (2)].string), len);
-- copyright_hdr->copyrightMessage[len] = '\0';
-- free ((yyvsp[(2) - (2)].string));
-- }
-- break;
--
-- case 8:
--#line 184 "nlmheader.y"
-- {
-- custom_file = (yyvsp[(2) - (2)].string);
-- }
-- break;
--
-- case 9:
--#line 188 "nlmheader.y"
-- {
-- /* We don't set the version stamp here, because we use the
-- version stamp to detect whether the required VERSION
-- keyword was given. */
-- version_hdr->month = nlmlex_get_number ((yyvsp[(2) - (4)].string));
-- version_hdr->day = nlmlex_get_number ((yyvsp[(3) - (4)].string));
-- version_hdr->year = nlmlex_get_number ((yyvsp[(4) - (4)].string));
-- free ((yyvsp[(2) - (4)].string));
-- free ((yyvsp[(3) - (4)].string));
-- free ((yyvsp[(4) - (4)].string));
-- if (version_hdr->month < 1 || version_hdr->month > 12)
-- nlmheader_warn (_("illegal month"), -1);
-- if (version_hdr->day < 1 || version_hdr->day > 31)
-- nlmheader_warn (_("illegal day"), -1);
-- if (version_hdr->year < 1900 || version_hdr->year > 3000)
-- nlmheader_warn (_("illegal year"), -1);
-- }
-- break;
--
-- case 10:
--#line 206 "nlmheader.y"
-- {
-- debug_info = TRUE;
-- }
-- break;
--
-- case 11:
--#line 210 "nlmheader.y"
-- {
-- int len;
--
-- len = strlen ((yyvsp[(2) - (2)].string));
-- if (len > NLM_MAX_DESCRIPTION_LENGTH)
-- {
-- nlmheader_warn (_("description string is too long"),
-- NLM_MAX_DESCRIPTION_LENGTH);
-- len = NLM_MAX_DESCRIPTION_LENGTH;
-- }
-- var_hdr->descriptionLength = len;
-- strncpy (var_hdr->descriptionText, (yyvsp[(2) - (2)].string), len);
-- var_hdr->descriptionText[len] = '\0';
-- free ((yyvsp[(2) - (2)].string));
-- }
-- break;
--
-- case 12:
--#line 226 "nlmheader.y"
-- {
-- exit_procedure = (yyvsp[(2) - (2)].string);
-- }
-- break;
--
-- case 13:
--#line 230 "nlmheader.y"
-- {
-- symbol_prefix = NULL;
-- }
-- break;
--
-- case 14:
--#line 234 "nlmheader.y"
-- {
-- export_symbols = string_list_append (export_symbols, (yyvsp[(3) - (3)].list));
-- }
-- break;
--
-- case 15:
--#line 238 "nlmheader.y"
-- {
-- fixed_hdr->flags |= nlmlex_get_number ((yyvsp[(2) - (2)].string));
-- free ((yyvsp[(2) - (2)].string));
-- }
-- break;
--
-- case 16:
--#line 243 "nlmheader.y"
-- {
-- fixed_hdr->flags &=~ nlmlex_get_number ((yyvsp[(2) - (2)].string));
-- free ((yyvsp[(2) - (2)].string));
-- }
-- break;
--
-- case 17:
--#line 248 "nlmheader.y"
-- {
-- map_file = "";
-- full_map = TRUE;
-- }
-- break;
--
-- case 18:
--#line 253 "nlmheader.y"
-- {
-- map_file = (yyvsp[(2) - (2)].string);
-- full_map = TRUE;
-- }
-- break;
--
-- case 19:
--#line 258 "nlmheader.y"
-- {
-- help_file = (yyvsp[(2) - (2)].string);
-- }
-- break;
--
-- case 20:
--#line 262 "nlmheader.y"
-- {
-- symbol_prefix = NULL;
-- }
-- break;
--
-- case 21:
--#line 266 "nlmheader.y"
-- {
-- import_symbols = string_list_append (import_symbols, (yyvsp[(3) - (3)].list));
-- }
-- break;
--
-- case 22:
--#line 270 "nlmheader.y"
-- {
-- input_files = string_list_append (input_files, (yyvsp[(2) - (2)].list));
-- }
-- break;
--
-- case 23:
--#line 274 "nlmheader.y"
-- {
-- map_file = "";
-- }
-- break;
--
-- case 24:
--#line 278 "nlmheader.y"
-- {
-- map_file = (yyvsp[(2) - (2)].string);
-- }
-- break;
--
-- case 25:
--#line 282 "nlmheader.y"
-- {
-- message_file = (yyvsp[(2) - (2)].string);
-- }
-- break;
--
-- case 26:
--#line 286 "nlmheader.y"
-- {
-- modules = string_list_append (modules, (yyvsp[(2) - (2)].list));
-- }
-- break;
--
-- case 27:
--#line 290 "nlmheader.y"
-- {
-- fixed_hdr->flags |= 0x2;
-- }
-- break;
--
-- case 28:
--#line 294 "nlmheader.y"
-- {
-- fixed_hdr->flags |= 0x10;
-- }
-- break;
--
-- case 29:
--#line 298 "nlmheader.y"
-- {
-- if (output_file == NULL)
-- output_file = (yyvsp[(2) - (2)].string);
-- else
-- nlmheader_warn (_("ignoring duplicate OUTPUT statement"), -1);
-- }
-- break;
--
-- case 30:
--#line 305 "nlmheader.y"
-- {
-- fixed_hdr->flags |= 0x8;
-- }
-- break;
--
-- case 31:
--#line 309 "nlmheader.y"
-- {
-- fixed_hdr->flags |= 0x1;
-- }
-- break;
--
-- case 32:
--#line 313 "nlmheader.y"
-- {
-- int len;
--
-- len = strlen ((yyvsp[(2) - (2)].string));
-- if (len >= NLM_MAX_SCREEN_NAME_LENGTH)
-- {
-- nlmheader_warn (_("screen name is too long"),
-- NLM_MAX_SCREEN_NAME_LENGTH);
-- len = NLM_MAX_SCREEN_NAME_LENGTH;
-- }
-- var_hdr->screenNameLength = len;
-- strncpy (var_hdr->screenName, (yyvsp[(2) - (2)].string), len);
-- var_hdr->screenName[NLM_MAX_SCREEN_NAME_LENGTH] = '\0';
-- free ((yyvsp[(2) - (2)].string));
-- }
-- break;
--
-- case 33:
--#line 329 "nlmheader.y"
-- {
-- sharelib_file = (yyvsp[(2) - (2)].string);
-- }
-- break;
--
-- case 34:
--#line 333 "nlmheader.y"
-- {
-- var_hdr->stackSize = nlmlex_get_number ((yyvsp[(2) - (2)].string));
-- free ((yyvsp[(2) - (2)].string));
-- }
-- break;
--
-- case 35:
--#line 338 "nlmheader.y"
-- {
-- start_procedure = (yyvsp[(2) - (2)].string);
-- }
-- break;
--
-- case 36:
--#line 342 "nlmheader.y"
-- {
-- fixed_hdr->flags |= 0x4;
-- }
-- break;
--
-- case 37:
--#line 346 "nlmheader.y"
-- {
-- int len;
--
-- len = strlen ((yyvsp[(2) - (2)].string));
-- if (len >= NLM_MAX_THREAD_NAME_LENGTH)
-- {
-- nlmheader_warn (_("thread name is too long"),
-- NLM_MAX_THREAD_NAME_LENGTH);
-- len = NLM_MAX_THREAD_NAME_LENGTH;
-- }
-- var_hdr->threadNameLength = len;
-- strncpy (var_hdr->threadName, (yyvsp[(2) - (2)].string), len);
-- var_hdr->threadName[len] = '\0';
-- free ((yyvsp[(2) - (2)].string));
-- }
-- break;
--
-- case 38:
--#line 362 "nlmheader.y"
-- {
-- fixed_hdr->moduleType = nlmlex_get_number ((yyvsp[(2) - (2)].string));
-- free ((yyvsp[(2) - (2)].string));
-- }
-- break;
--
-- case 39:
--#line 367 "nlmheader.y"
-- {
-- verbose = TRUE;
-- }
-- break;
--
-- case 40:
--#line 371 "nlmheader.y"
-- {
-- long val;
--
-- strncpy (version_hdr->stamp, "VeRsIoN#", 8);
-- version_hdr->majorVersion = nlmlex_get_number ((yyvsp[(2) - (4)].string));
-- val = nlmlex_get_number ((yyvsp[(3) - (4)].string));
-- if (val < 0 || val > 99)
-- nlmheader_warn (_("illegal minor version number (must be between 0 and 99)"),
-- -1);
-- else
-- version_hdr->minorVersion = val;
-- val = nlmlex_get_number ((yyvsp[(4) - (4)].string));
-- if (val < 0)
-- nlmheader_warn (_("illegal revision number (must be between 0 and 26)"),
-- -1);
-- else if (val > 26)
-- version_hdr->revision = 0;
-- else
-- version_hdr->revision = val;
-- free ((yyvsp[(2) - (4)].string));
-- free ((yyvsp[(3) - (4)].string));
-- free ((yyvsp[(4) - (4)].string));
-- }
-- break;
--
-- case 41:
--#line 395 "nlmheader.y"
-- {
-- long val;
--
-- strncpy (version_hdr->stamp, "VeRsIoN#", 8);
-- version_hdr->majorVersion = nlmlex_get_number ((yyvsp[(2) - (3)].string));
-- val = nlmlex_get_number ((yyvsp[(3) - (3)].string));
-- if (val < 0 || val > 99)
-- nlmheader_warn (_("illegal minor version number (must be between 0 and 99)"),
-- -1);
-- else
-- version_hdr->minorVersion = val;
-- version_hdr->revision = 0;
-- free ((yyvsp[(2) - (3)].string));
-- free ((yyvsp[(3) - (3)].string));
-- }
-- break;
--
-- case 42:
--#line 411 "nlmheader.y"
-- {
-- rpc_file = (yyvsp[(2) - (2)].string);
-- }
-- break;
--
-- case 43:
--#line 420 "nlmheader.y"
-- {
-- (yyval.list) = NULL;
-- }
-- break;
--
-- case 44:
--#line 424 "nlmheader.y"
-- {
-- (yyval.list) = (yyvsp[(1) - (1)].list);
-- }
-- break;
--
-- case 45:
--#line 435 "nlmheader.y"
-- {
-- (yyval.list) = string_list_cons ((yyvsp[(1) - (1)].string), NULL);
-- }
-- break;
--
-- case 46:
--#line 439 "nlmheader.y"
-- {
-- (yyval.list) = NULL;
-- }
-- break;
--
-- case 47:
--#line 443 "nlmheader.y"
-- {
-- (yyval.list) = string_list_append1 ((yyvsp[(1) - (2)].list), (yyvsp[(2) - (2)].string));
-- }
-- break;
--
-- case 48:
--#line 447 "nlmheader.y"
-- {
-- (yyval.list) = (yyvsp[(1) - (2)].list);
-- }
-- break;
--
-- case 49:
--#line 456 "nlmheader.y"
-- {
-- if (symbol_prefix != NULL)
-- free (symbol_prefix);
-- symbol_prefix = (yyvsp[(2) - (3)].string);
-- }
-- break;
--
-- case 50:
--#line 467 "nlmheader.y"
-- {
-- if (symbol_prefix == NULL)
-- (yyval.string) = (yyvsp[(1) - (1)].string);
-- else
-- {
-- (yyval.string) = xmalloc (strlen (symbol_prefix) + strlen ((yyvsp[(1) - (1)].string)) + 2);
-- sprintf ((yyval.string), "%s@%s", symbol_prefix, (yyvsp[(1) - (1)].string));
-- free ((yyvsp[(1) - (1)].string));
-- }
-- }
-- break;
--
-- case 51:
--#line 483 "nlmheader.y"
-- {
-- (yyval.list) = NULL;
-- }
-- break;
--
-- case 52:
--#line 487 "nlmheader.y"
-- {
-- (yyval.list) = string_list_cons ((yyvsp[(1) - (2)].string), (yyvsp[(2) - (2)].list));
-- }
-- break;
--
--
--/* Line 1267 of yacc.c. */
--#line 2015 "nlmheader.c"
-- default: break;
-- }
-- YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
--
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
--
-- *++yyvsp = yyval;
--
--
-- /* Now `shift' the result of the reduction. Determine what state
-- that goes to, based on the state we popped back to and the rule
-- number reduced by. */
--
-- yyn = yyr1[yyn];
--
-- yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
-- if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
-- yystate = yytable[yystate];
-- else
-- yystate = yydefgoto[yyn - YYNTOKENS];
--
-- goto yynewstate;
--
--
--/*------------------------------------.
--| yyerrlab -- here on detecting error |
--`------------------------------------*/
--yyerrlab:
-- /* If not already recovering from an error, report this error. */
-- if (!yyerrstatus)
-- {
-- ++yynerrs;
--#if ! YYERROR_VERBOSE
-- yyerror (YY_("syntax error"));
--#else
-- {
-- YYSIZE_T yysize = yysyntax_error (0, yystate, yychar);
-- if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM)
-- {
-- YYSIZE_T yyalloc = 2 * yysize;
-- if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM))
-- yyalloc = YYSTACK_ALLOC_MAXIMUM;
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
-- yymsg = (char *) YYSTACK_ALLOC (yyalloc);
-- if (yymsg)
-- yymsg_alloc = yyalloc;
-- else
-- {
-- yymsg = yymsgbuf;
-- yymsg_alloc = sizeof yymsgbuf;
-- }
-- }
--
-- if (0 < yysize && yysize <= yymsg_alloc)
-- {
-- (void) yysyntax_error (yymsg, yystate, yychar);
-- yyerror (yymsg);
-- }
-- else
-- {
-- yyerror (YY_("syntax error"));
-- if (yysize != 0)
-- goto yyexhaustedlab;
-- }
-- }
--#endif
-- }
--
--
--
-- if (yyerrstatus == 3)
-- {
-- /* If just tried and failed to reuse look-ahead token after an
-- error, discard it. */
--
-- if (yychar <= YYEOF)
-- {
-- /* Return failure if at end of input. */
-- if (yychar == YYEOF)
-- YYABORT;
-- }
-- else
-- {
-- yydestruct ("Error: discarding",
-- yytoken, &yylval);
-- yychar = YYEMPTY;
-- }
-- }
--
-- /* Else will try to reuse look-ahead token after shifting the error
-- token. */
-- goto yyerrlab1;
--
--
--/*---------------------------------------------------.
--| yyerrorlab -- error raised explicitly by YYERROR. |
--`---------------------------------------------------*/
--yyerrorlab:
--
-- /* Pacify compilers like GCC when the user code never invokes
-- YYERROR and the label yyerrorlab therefore never appears in user
-- code. */
-- if (/*CONSTCOND*/ 0)
-- goto yyerrorlab;
--
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYERROR. */
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
-- yystate = *yyssp;
-- goto yyerrlab1;
--
--
--/*-------------------------------------------------------------.
--| yyerrlab1 -- common code for both syntax error and YYERROR. |
--`-------------------------------------------------------------*/
--yyerrlab1:
-- yyerrstatus = 3; /* Each real token shifted decrements this. */
--
-- for (;;)
-- {
-- yyn = yypact[yystate];
-- if (yyn != YYPACT_NINF)
-- {
-- yyn += YYTERROR;
-- if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
-- {
-- yyn = yytable[yyn];
-- if (0 < yyn)
-- break;
-- }
-- }
--
-- /* Pop the current state because it cannot handle the error token. */
-- if (yyssp == yyss)
-- YYABORT;
--
--
-- yydestruct ("Error: popping",
-- yystos[yystate], yyvsp);
-- YYPOPSTACK (1);
-- yystate = *yyssp;
-- YY_STACK_PRINT (yyss, yyssp);
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- *++yyvsp = yylval;
--
--
-- /* Shift the error token. */
-- YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
--
-- yystate = yyn;
-- goto yynewstate;
--
--
--/*-------------------------------------.
--| yyacceptlab -- YYACCEPT comes here. |
--`-------------------------------------*/
--yyacceptlab:
-- yyresult = 0;
-- goto yyreturn;
--
--/*-----------------------------------.
--| yyabortlab -- YYABORT comes here. |
--`-----------------------------------*/
--yyabortlab:
-- yyresult = 1;
-- goto yyreturn;
--
--#ifndef yyoverflow
--/*-------------------------------------------------.
--| yyexhaustedlab -- memory exhaustion comes here. |
--`-------------------------------------------------*/
--yyexhaustedlab:
-- yyerror (YY_("memory exhausted"));
-- yyresult = 2;
-- /* Fall through. */
--#endif
--
--yyreturn:
-- if (yychar != YYEOF && yychar != YYEMPTY)
-- yydestruct ("Cleanup: discarding lookahead",
-- yytoken, &yylval);
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYABORT or YYACCEPT. */
-- YYPOPSTACK (yylen);
-- YY_STACK_PRINT (yyss, yyssp);
-- while (yyssp != yyss)
-- {
-- yydestruct ("Cleanup: popping",
-- yystos[*yyssp], yyvsp);
-- YYPOPSTACK (1);
-- }
--#ifndef yyoverflow
-- if (yyss != yyssa)
-- YYSTACK_FREE (yyss);
--#endif
--#if YYERROR_VERBOSE
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
--#endif
-- /* Make sure YYID is used. */
-- return YYID (yyresult);
--}
--
--
--#line 492 "nlmheader.y"
--
--
--/* If strerror is just a macro, we want to use the one from libiberty
-- since it will handle undefined values. */
--#undef strerror
--extern char *strerror PARAMS ((int));
--
--/* The lexer is simple, too simple for flex. Keywords are only
-- recognized at the start of lines. Everything else must be an
-- argument. A comma is treated as whitespace. */
--
--/* The states the lexer can be in. */
--
--enum lex_state
--{
-- /* At the beginning of a line. */
-- BEGINNING_OF_LINE,
-- /* In the middle of a line. */
-- IN_LINE
--};
--
--/* We need to keep a stack of files to handle file inclusion. */
--
--struct input
--{
-- /* The file to read from. */
-- FILE *file;
-- /* The name of the file. */
-- char *name;
-- /* The current line number. */
-- int lineno;
-- /* The current state. */
-- enum lex_state state;
-- /* The next file on the stack. */
-- struct input *next;
--};
--
--/* The current input file. */
--
--static struct input current;
--
--/* The character which introduces comments. */
--#define COMMENT_CHAR '#'
--
--/* Start the lexer going on the main input file. */
--
--bfd_boolean
--nlmlex_file (const char *name)
--{
-- current.next = NULL;
-- return nlmlex_file_open (name);
--}
--
--/* Start the lexer going on a subsidiary input file. */
--
--static void
--nlmlex_file_push (const char *name)
--{
-- struct input *push;
--
-- push = (struct input *) xmalloc (sizeof (struct input));
-- *push = current;
-- if (nlmlex_file_open (name))
-- current.next = push;
-- else
-- {
-- current = *push;
-- free (push);
-- }
--}
--
--/* Start lexing from a file. */
--
--static bfd_boolean
--nlmlex_file_open (const char *name)
--{
-- current.file = fopen (name, "r");
-- if (current.file == NULL)
-- {
-- fprintf (stderr, "%s:%s: %s\n", program_name, name, strerror (errno));
-- ++parse_errors;
-- return FALSE;
-- }
-- current.name = xstrdup (name);
-- current.lineno = 1;
-- current.state = BEGINNING_OF_LINE;
-- return TRUE;
--}
--
--/* Table used to turn keywords into tokens. */
--
--struct keyword_tokens_struct
--{
-- const char *keyword;
-- int token;
--};
--
--static struct keyword_tokens_struct keyword_tokens[] =
--{
-- { "CHECK", CHECK },
-- { "CODESTART", CODESTART },
-- { "COPYRIGHT", COPYRIGHT },
-- { "CUSTOM", CUSTOM },
-- { "DATE", DATE },
-- { "DEBUG", DEBUG_K },
-- { "DESCRIPTION", DESCRIPTION },
-- { "EXIT", EXIT },
-- { "EXPORT", EXPORT },
-- { "FLAG_ON", FLAG_ON },
-- { "FLAG_OFF", FLAG_OFF },
-- { "FULLMAP", FULLMAP },
-- { "HELP", HELP },
-- { "IMPORT", IMPORT },
-- { "INPUT", INPUT },
-- { "MAP", MAP },
-- { "MESSAGES", MESSAGES },
-- { "MODULE", MODULE },
-- { "MULTIPLE", MULTIPLE },
-- { "OS_DOMAIN", OS_DOMAIN },
-- { "OUTPUT", OUTPUT },
-- { "PSEUDOPREEMPTION", PSEUDOPREEMPTION },
-- { "REENTRANT", REENTRANT },
-- { "SCREENNAME", SCREENNAME },
-- { "SHARELIB", SHARELIB },
-- { "STACK", STACK },
-- { "STACKSIZE", STACK },
-- { "START", START },
-- { "SYNCHRONIZE", SYNCHRONIZE },
-- { "THREADNAME", THREADNAME },
-- { "TYPE", TYPE },
-- { "VERBOSE", VERBOSE },
-- { "VERSION", VERSIONK },
-- { "XDCDATA", XDCDATA }
--};
--
--#define KEYWORD_COUNT (sizeof (keyword_tokens) / sizeof (keyword_tokens[0]))
--
--/* The lexer accumulates strings in these variables. */
--static char *lex_buf;
--static int lex_size;
--static int lex_pos;
--
--/* Start accumulating strings into the buffer. */
--#define BUF_INIT() \
-- ((void) (lex_buf != NULL ? lex_pos = 0 : nlmlex_buf_init ()))
--
--static int
--nlmlex_buf_init (void)
--{
-- lex_size = 10;
-- lex_buf = xmalloc (lex_size + 1);
-- lex_pos = 0;
-- return 0;
--}
--
--/* Finish a string in the buffer. */
--#define BUF_FINISH() ((void) (lex_buf[lex_pos] = '\0'))
--
--/* Accumulate a character into the buffer. */
--#define BUF_ADD(c) \
-- ((void) (lex_pos < lex_size \
-- ? lex_buf[lex_pos++] = (c) \
-- : nlmlex_buf_add (c)))
--
--static char
--nlmlex_buf_add (int c)
--{
-- if (lex_pos >= lex_size)
-- {
-- lex_size *= 2;
-- lex_buf = xrealloc (lex_buf, lex_size + 1);
-- }
--
-- return lex_buf[lex_pos++] = c;
--}
--
--/* The lexer proper. This is called by the bison generated parsing
-- code. */
--
--static int
--yylex (void)
--{
-- int c;
--
--tail_recurse:
--
-- c = getc (current.file);
--
-- /* Commas are treated as whitespace characters. */
-- while (ISSPACE (c) || c == ',')
-- {
-- current.state = IN_LINE;
-- if (c == '\n')
-- {
-- ++current.lineno;
-- current.state = BEGINNING_OF_LINE;
-- }
-- c = getc (current.file);
-- }
--
-- /* At the end of the file we either pop to the previous file or
-- finish up. */
-- if (c == EOF)
-- {
-- fclose (current.file);
-- free (current.name);
-- if (current.next == NULL)
-- return 0;
-- else
-- {
-- struct input *next;
--
-- next = current.next;
-- current = *next;
-- free (next);
-- goto tail_recurse;
-- }
-- }
--
-- /* A comment character always means to drop everything until the
-- next newline. */
-- if (c == COMMENT_CHAR)
-- {
-- do
-- {
-- c = getc (current.file);
-- }
-- while (c != '\n');
-- ++current.lineno;
-- current.state = BEGINNING_OF_LINE;
-- goto tail_recurse;
-- }
--
-- /* An '@' introduces an include file. */
-- if (c == '@')
-- {
-- do
-- {
-- c = getc (current.file);
-- if (c == '\n')
-- ++current.lineno;
-- }
-- while (ISSPACE (c));
-- BUF_INIT ();
-- while (! ISSPACE (c) && c != EOF)
-- {
-- BUF_ADD (c);
-- c = getc (current.file);
-- }
-- BUF_FINISH ();
--
-- ungetc (c, current.file);
--
-- nlmlex_file_push (lex_buf);
-- goto tail_recurse;
-- }
--
-- /* A non-space character at the start of a line must be the start of
-- a keyword. */
-- if (current.state == BEGINNING_OF_LINE)
-- {
-- BUF_INIT ();
-- while (ISALNUM (c) || c == '_')
-- {
-- BUF_ADD (TOUPPER (c));
-- c = getc (current.file);
-- }
-- BUF_FINISH ();
--
-- if (c != EOF && ! ISSPACE (c) && c != ',')
-- {
-- nlmheader_identify ();
-- fprintf (stderr, _("%s:%d: illegal character in keyword: %c\n"),
-- current.name, current.lineno, c);
-- }
-- else
-- {
-- unsigned int i;
--
-- for (i = 0; i < KEYWORD_COUNT; i++)
-- {
-- if (lex_buf[0] == keyword_tokens[i].keyword[0]
-- && strcmp (lex_buf, keyword_tokens[i].keyword) == 0)
-- {
-- /* Pushing back the final whitespace avoids worrying
-- about \n here. */
-- ungetc (c, current.file);
-- current.state = IN_LINE;
-- return keyword_tokens[i].token;
-- }
-- }
--
-- nlmheader_identify ();
-- fprintf (stderr, _("%s:%d: unrecognized keyword: %s\n"),
-- current.name, current.lineno, lex_buf);
-- }
--
-- ++parse_errors;
-- /* Treat the rest of this line as a comment. */
-- ungetc (COMMENT_CHAR, current.file);
-- goto tail_recurse;
-- }
--
-- /* Parentheses just represent themselves. */
-- if (c == '(' || c == ')')
-- return c;
--
-- /* Handle quoted strings. */
-- if (c == '"' || c == '\'')
-- {
-- int quote;
-- int start_lineno;
--
-- quote = c;
-- start_lineno = current.lineno;
--
-- c = getc (current.file);
-- BUF_INIT ();
-- while (c != quote && c != EOF)
-- {
-- BUF_ADD (c);
-- if (c == '\n')
-- ++current.lineno;
-- c = getc (current.file);
-- }
-- BUF_FINISH ();
--
-- if (c == EOF)
-- {
-- nlmheader_identify ();
-- fprintf (stderr, _("%s:%d: end of file in quoted string\n"),
-- current.name, start_lineno);
-- ++parse_errors;
-- }
--
-- /* FIXME: Possible memory leak. */
-- yylval.string = xstrdup (lex_buf);
-- return QUOTED_STRING;
-- }
--
-- /* Gather a generic argument. */
-- BUF_INIT ();
-- while (! ISSPACE (c)
-- && c != ','
-- && c != COMMENT_CHAR
-- && c != '('
-- && c != ')')
-- {
-- BUF_ADD (c);
-- c = getc (current.file);
-- }
-- BUF_FINISH ();
--
-- ungetc (c, current.file);
--
-- /* FIXME: Possible memory leak. */
-- yylval.string = xstrdup (lex_buf);
-- return STRING;
--}
--
--/* Get a number from a string. */
--
--static long
--nlmlex_get_number (const char *s)
--{
-- long ret;
-- char *send;
--
-- ret = strtol (s, &send, 10);
-- if (*send != '\0')
-- nlmheader_warn (_("bad number"), -1);
-- return ret;
--}
--
--/* Prefix the nlmconv warnings with a note as to where they come from.
-- We don't use program_name on every warning, because then some
-- versions of the emacs next-error function can't recognize the line
-- number. */
--
--static void
--nlmheader_identify (void)
--{
-- static int done;
--
-- if (! done)
-- {
-- fprintf (stderr, _("%s: problems in NLM command language input:\n"),
-- program_name);
-- done = 1;
-- }
--}
--
--/* Issue a warning. */
--
--static void
--nlmheader_warn (const char *s, int imax)
--{
-- nlmheader_identify ();
-- fprintf (stderr, "%s:%d: %s", current.name, current.lineno, s);
-- if (imax != -1)
-- fprintf (stderr, " (max %d)", imax);
-- fprintf (stderr, "\n");
--}
--
--/* Report an error. */
--
--static void
--nlmheader_error (const char *s)
--{
-- nlmheader_warn (s, -1);
-- ++parse_errors;
--}
--
--/* Add a string to a string list. */
--
--static struct string_list *
--string_list_cons (char *s, struct string_list *l)
--{
-- struct string_list *ret;
--
-- ret = (struct string_list *) xmalloc (sizeof (struct string_list));
-- ret->next = l;
-- ret->string = s;
-- return ret;
--}
--
--/* Append a string list to another string list. */
--
--static struct string_list *
--string_list_append (struct string_list *l1, struct string_list *l2)
--{
-- register struct string_list **pp;
--
-- for (pp = &l1; *pp != NULL; pp = &(*pp)->next)
-- ;
-- *pp = l2;
-- return l1;
--}
--
--/* Append a string to a string list. */
--
--static struct string_list *
--string_list_append1 (struct string_list *l, char *s)
--{
-- struct string_list *n;
-- register struct string_list **pp;
--
-- n = (struct string_list *) xmalloc (sizeof (struct string_list));
-- n->next = NULL;
-- n->string = s;
-- for (pp = &l; *pp != NULL; pp = &(*pp)->next)
-- ;
-- *pp = n;
-- return l;
--}
--
--/* Duplicate a string in memory. */
--
--static char *
--xstrdup (const char *s)
--{
-- unsigned long len;
-- char *ret;
--
-- len = strlen (s);
-- ret = xmalloc (len + 1);
-- strcpy (ret, s);
-- return ret;
--}
--
-diff -Nur binutils-2.24.orig/binutils/nlmheader.h binutils-2.24/binutils/nlmheader.h
---- binutils-2.24.orig/binutils/nlmheader.h 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/nlmheader.h 1970-01-01 01:00:00.000000000 +0100
-@@ -1,135 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton interface for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- CHECK = 258,
-- CODESTART = 259,
-- COPYRIGHT = 260,
-- CUSTOM = 261,
-- DATE = 262,
-- DEBUG_K = 263,
-- DESCRIPTION = 264,
-- EXIT = 265,
-- EXPORT = 266,
-- FLAG_ON = 267,
-- FLAG_OFF = 268,
-- FULLMAP = 269,
-- HELP = 270,
-- IMPORT = 271,
-- INPUT = 272,
-- MAP = 273,
-- MESSAGES = 274,
-- MODULE = 275,
-- MULTIPLE = 276,
-- OS_DOMAIN = 277,
-- OUTPUT = 278,
-- PSEUDOPREEMPTION = 279,
-- REENTRANT = 280,
-- SCREENNAME = 281,
-- SHARELIB = 282,
-- STACK = 283,
-- START = 284,
-- SYNCHRONIZE = 285,
-- THREADNAME = 286,
-- TYPE = 287,
-- VERBOSE = 288,
-- VERSIONK = 289,
-- XDCDATA = 290,
-- STRING = 291,
-- QUOTED_STRING = 292
-- };
--#endif
--/* Tokens. */
--#define CHECK 258
--#define CODESTART 259
--#define COPYRIGHT 260
--#define CUSTOM 261
--#define DATE 262
--#define DEBUG_K 263
--#define DESCRIPTION 264
--#define EXIT 265
--#define EXPORT 266
--#define FLAG_ON 267
--#define FLAG_OFF 268
--#define FULLMAP 269
--#define HELP 270
--#define IMPORT 271
--#define INPUT 272
--#define MAP 273
--#define MESSAGES 274
--#define MODULE 275
--#define MULTIPLE 276
--#define OS_DOMAIN 277
--#define OUTPUT 278
--#define PSEUDOPREEMPTION 279
--#define REENTRANT 280
--#define SCREENNAME 281
--#define SHARELIB 282
--#define STACK 283
--#define START 284
--#define SYNCHRONIZE 285
--#define THREADNAME 286
--#define TYPE 287
--#define VERBOSE 288
--#define VERSIONK 289
--#define XDCDATA 290
--#define STRING 291
--#define QUOTED_STRING 292
--
--
--
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 113 "nlmheader.y"
--{
-- char *string;
-- struct string_list *list;
--}
--/* Line 1529 of yacc.c. */
--#line 128 "nlmheader.h"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--extern YYSTYPE yylval;
--
-diff -Nur binutils-2.24.orig/binutils/rcparse.c binutils-2.24/binutils/rcparse.c
---- binutils-2.24.orig/binutils/rcparse.c 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/rcparse.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,4663 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton implementation for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* C LALR(1) parser skeleton written by Richard Stallman, by
-- simplifying the original so-called "semantic" parser. */
--
--/* All symbols defined below should begin with yy or YY, to avoid
-- infringing on user name space. This should be done even for local
-- variables, as they might otherwise be expanded by user macros.
-- There are some unavoidable exceptions within include files to
-- define necessary library symbols; they are noted "INFRINGES ON
-- USER NAME SPACE" below. */
--
--/* Identify Bison output. */
--#define YYBISON 1
--
--/* Bison version. */
--#define YYBISON_VERSION "2.3"
--
--/* Skeleton name. */
--#define YYSKELETON_NAME "yacc.c"
--
--/* Pure parsers. */
--#define YYPURE 0
--
--/* Using locations. */
--#define YYLSP_NEEDED 0
--
--
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- BEG = 258,
-- END = 259,
-- ACCELERATORS = 260,
-- VIRTKEY = 261,
-- ASCII = 262,
-- NOINVERT = 263,
-- SHIFT = 264,
-- CONTROL = 265,
-- ALT = 266,
-- BITMAP = 267,
-- CURSOR = 268,
-- DIALOG = 269,
-- DIALOGEX = 270,
-- EXSTYLE = 271,
-- CAPTION = 272,
-- CLASS = 273,
-- STYLE = 274,
-- AUTO3STATE = 275,
-- AUTOCHECKBOX = 276,
-- AUTORADIOBUTTON = 277,
-- CHECKBOX = 278,
-- COMBOBOX = 279,
-- CTEXT = 280,
-- DEFPUSHBUTTON = 281,
-- EDITTEXT = 282,
-- GROUPBOX = 283,
-- LISTBOX = 284,
-- LTEXT = 285,
-- PUSHBOX = 286,
-- PUSHBUTTON = 287,
-- RADIOBUTTON = 288,
-- RTEXT = 289,
-- SCROLLBAR = 290,
-- STATE3 = 291,
-- USERBUTTON = 292,
-- BEDIT = 293,
-- HEDIT = 294,
-- IEDIT = 295,
-- FONT = 296,
-- ICON = 297,
-- ANICURSOR = 298,
-- ANIICON = 299,
-- DLGINCLUDE = 300,
-- DLGINIT = 301,
-- FONTDIR = 302,
-- HTML = 303,
-- MANIFEST = 304,
-- PLUGPLAY = 305,
-- VXD = 306,
-- TOOLBAR = 307,
-- BUTTON = 308,
-- LANGUAGE = 309,
-- CHARACTERISTICS = 310,
-- VERSIONK = 311,
-- MENU = 312,
-- MENUEX = 313,
-- MENUITEM = 314,
-- SEPARATOR = 315,
-- POPUP = 316,
-- CHECKED = 317,
-- GRAYED = 318,
-- HELP = 319,
-- INACTIVE = 320,
-- MENUBARBREAK = 321,
-- MENUBREAK = 322,
-- MESSAGETABLE = 323,
-- RCDATA = 324,
-- STRINGTABLE = 325,
-- VERSIONINFO = 326,
-- FILEVERSION = 327,
-- PRODUCTVERSION = 328,
-- FILEFLAGSMASK = 329,
-- FILEFLAGS = 330,
-- FILEOS = 331,
-- FILETYPE = 332,
-- FILESUBTYPE = 333,
-- BLOCKSTRINGFILEINFO = 334,
-- BLOCKVARFILEINFO = 335,
-- VALUE = 336,
-- BLOCK = 337,
-- MOVEABLE = 338,
-- FIXED = 339,
-- PURE = 340,
-- IMPURE = 341,
-- PRELOAD = 342,
-- LOADONCALL = 343,
-- DISCARDABLE = 344,
-- NOT = 345,
-- QUOTEDUNISTRING = 346,
-- QUOTEDSTRING = 347,
-- STRING = 348,
-- NUMBER = 349,
-- SIZEDUNISTRING = 350,
-- SIZEDSTRING = 351,
-- IGNORED_TOKEN = 352,
-- NEG = 353
-- };
--#endif
--/* Tokens. */
--#define BEG 258
--#define END 259
--#define ACCELERATORS 260
--#define VIRTKEY 261
--#define ASCII 262
--#define NOINVERT 263
--#define SHIFT 264
--#define CONTROL 265
--#define ALT 266
--#define BITMAP 267
--#define CURSOR 268
--#define DIALOG 269
--#define DIALOGEX 270
--#define EXSTYLE 271
--#define CAPTION 272
--#define CLASS 273
--#define STYLE 274
--#define AUTO3STATE 275
--#define AUTOCHECKBOX 276
--#define AUTORADIOBUTTON 277
--#define CHECKBOX 278
--#define COMBOBOX 279
--#define CTEXT 280
--#define DEFPUSHBUTTON 281
--#define EDITTEXT 282
--#define GROUPBOX 283
--#define LISTBOX 284
--#define LTEXT 285
--#define PUSHBOX 286
--#define PUSHBUTTON 287
--#define RADIOBUTTON 288
--#define RTEXT 289
--#define SCROLLBAR 290
--#define STATE3 291
--#define USERBUTTON 292
--#define BEDIT 293
--#define HEDIT 294
--#define IEDIT 295
--#define FONT 296
--#define ICON 297
--#define ANICURSOR 298
--#define ANIICON 299
--#define DLGINCLUDE 300
--#define DLGINIT 301
--#define FONTDIR 302
--#define HTML 303
--#define MANIFEST 304
--#define PLUGPLAY 305
--#define VXD 306
--#define TOOLBAR 307
--#define BUTTON 308
--#define LANGUAGE 309
--#define CHARACTERISTICS 310
--#define VERSIONK 311
--#define MENU 312
--#define MENUEX 313
--#define MENUITEM 314
--#define SEPARATOR 315
--#define POPUP 316
--#define CHECKED 317
--#define GRAYED 318
--#define HELP 319
--#define INACTIVE 320
--#define MENUBARBREAK 321
--#define MENUBREAK 322
--#define MESSAGETABLE 323
--#define RCDATA 324
--#define STRINGTABLE 325
--#define VERSIONINFO 326
--#define FILEVERSION 327
--#define PRODUCTVERSION 328
--#define FILEFLAGSMASK 329
--#define FILEFLAGS 330
--#define FILEOS 331
--#define FILETYPE 332
--#define FILESUBTYPE 333
--#define BLOCKSTRINGFILEINFO 334
--#define BLOCKVARFILEINFO 335
--#define VALUE 336
--#define BLOCK 337
--#define MOVEABLE 338
--#define FIXED 339
--#define PURE 340
--#define IMPURE 341
--#define PRELOAD 342
--#define LOADONCALL 343
--#define DISCARDABLE 344
--#define NOT 345
--#define QUOTEDUNISTRING 346
--#define QUOTEDSTRING 347
--#define STRING 348
--#define NUMBER 349
--#define SIZEDUNISTRING 350
--#define SIZEDSTRING 351
--#define IGNORED_TOKEN 352
--#define NEG 353
--
--
--
--
--/* Copy the first part of user declarations. */
--#line 1 "rcparse.y"
-- /* rcparse.y -- parser for Windows rc files
-- Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2007, 2008,
-- 2011 Free Software Foundation, Inc.
-- Written by Ian Lance Taylor, Cygnus Support.
-- Extended by Kai Tietz, Onevision.
--
-- This file is part of GNU Binutils.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-- 02110-1301, USA. */
--
--
--/* This is a parser for Windows rc files. It is based on the parser
-- by Gunther Ebert <gunther.ebert@ixos-leipzig.de>. */
--
--#include "sysdep.h"
--#include "bfd.h"
--#include "bucomm.h"
--#include "libiberty.h"
--#include "windres.h"
--#include "safe-ctype.h"
--
--/* The current language. */
--
--static unsigned short language;
--
--/* The resource information during a sub statement. */
--
--static rc_res_res_info sub_res_info;
--
--/* Dialog information. This is built by the nonterminals styles and
-- controls. */
--
--static rc_dialog dialog;
--
--/* This is used when building a style. It is modified by the
-- nonterminal styleexpr. */
--
--static unsigned long style;
--
--/* These are used when building a control. They are set before using
-- control_params. */
--
--static rc_uint_type base_style;
--static rc_uint_type default_style;
--static rc_res_id class;
--static rc_res_id res_text_field;
--static unichar null_unichar;
--
--/* This is used for COMBOBOX, LISTBOX and EDITTEXT which
-- do not allow resource 'text' field in control definition. */
--static const rc_res_id res_null_text = { 1, {{0, &null_unichar}}};
--
--
--
--/* Enabling traces. */
--#ifndef YYDEBUG
--# define YYDEBUG 0
--#endif
--
--/* Enabling verbose error messages. */
--#ifdef YYERROR_VERBOSE
--# undef YYERROR_VERBOSE
--# define YYERROR_VERBOSE 1
--#else
--# define YYERROR_VERBOSE 0
--#endif
--
--/* Enabling the token table. */
--#ifndef YYTOKEN_TABLE
--# define YYTOKEN_TABLE 0
--#endif
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 69 "rcparse.y"
--{
-- rc_accelerator acc;
-- rc_accelerator *pacc;
-- rc_dialog_control *dialog_control;
-- rc_menuitem *menuitem;
-- struct
-- {
-- rc_rcdata_item *first;
-- rc_rcdata_item *last;
-- } rcdata;
-- rc_rcdata_item *rcdata_item;
-- rc_fixed_versioninfo *fixver;
-- rc_ver_info *verinfo;
-- rc_ver_stringtable *verstringtable;
-- rc_ver_stringinfo *verstring;
-- rc_ver_varinfo *vervar;
-- rc_toolbar_item *toobar_item;
-- rc_res_id id;
-- rc_res_res_info res_info;
-- struct
-- {
-- rc_uint_type on;
-- rc_uint_type off;
-- } memflags;
-- struct
-- {
-- rc_uint_type val;
-- /* Nonzero if this number was explicitly specified as long. */
-- int dword;
-- } i;
-- rc_uint_type il;
-- rc_uint_type is;
-- const char *s;
-- struct
-- {
-- rc_uint_type length;
-- const char *s;
-- } ss;
-- unichar *uni;
-- struct
-- {
-- rc_uint_type length;
-- const unichar *s;
-- } suni;
--}
--/* Line 193 of yacc.c. */
--#line 405 "rcparse.c"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--
--
--/* Copy the second part of user declarations. */
--
--
--/* Line 216 of yacc.c. */
--#line 418 "rcparse.c"
--
--#ifdef short
--# undef short
--#endif
--
--#ifdef YYTYPE_UINT8
--typedef YYTYPE_UINT8 yytype_uint8;
--#else
--typedef unsigned char yytype_uint8;
--#endif
--
--#ifdef YYTYPE_INT8
--typedef YYTYPE_INT8 yytype_int8;
--#elif (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--typedef signed char yytype_int8;
--#else
--typedef short int yytype_int8;
--#endif
--
--#ifdef YYTYPE_UINT16
--typedef YYTYPE_UINT16 yytype_uint16;
--#else
--typedef unsigned short int yytype_uint16;
--#endif
--
--#ifdef YYTYPE_INT16
--typedef YYTYPE_INT16 yytype_int16;
--#else
--typedef short int yytype_int16;
--#endif
--
--#ifndef YYSIZE_T
--# ifdef __SIZE_TYPE__
--# define YYSIZE_T __SIZE_TYPE__
--# elif defined size_t
--# define YYSIZE_T size_t
--# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stddef.h> /* INFRINGES ON USER NAME SPACE */
--# define YYSIZE_T size_t
--# else
--# define YYSIZE_T unsigned int
--# endif
--#endif
--
--#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
--
--#ifndef YY_
--# if defined YYENABLE_NLS && YYENABLE_NLS
--# if ENABLE_NLS
--# include <libintl.h> /* INFRINGES ON USER NAME SPACE */
--# define YY_(msgid) dgettext ("bison-runtime", msgid)
--# endif
--# endif
--# ifndef YY_
--# define YY_(msgid) msgid
--# endif
--#endif
--
--/* Suppress unused-variable warnings by "using" E. */
--#if ! defined lint || defined __GNUC__
--# define YYUSE(e) ((void) (e))
--#else
--# define YYUSE(e) /* empty */
--#endif
--
--/* Identity function, used to suppress warnings about constant conditions. */
--#ifndef lint
--# define YYID(n) (n)
--#else
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static int
--YYID (int i)
--#else
--static int
--YYID (i)
-- int i;
--#endif
--{
-- return i;
--}
--#endif
--
--#if ! defined yyoverflow || YYERROR_VERBOSE
--
--/* The parser invokes alloca or malloc; define the necessary symbols. */
--
--# ifdef YYSTACK_USE_ALLOCA
--# if YYSTACK_USE_ALLOCA
--# ifdef __GNUC__
--# define YYSTACK_ALLOC __builtin_alloca
--# elif defined __BUILTIN_VA_ARG_INCR
--# include <alloca.h> /* INFRINGES ON USER NAME SPACE */
--# elif defined _AIX
--# define YYSTACK_ALLOC __alloca
--# elif defined _MSC_VER
--# include <malloc.h> /* INFRINGES ON USER NAME SPACE */
--# define alloca _alloca
--# else
--# define YYSTACK_ALLOC alloca
--# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# endif
--# endif
--# endif
--
--# ifdef YYSTACK_ALLOC
-- /* Pacify GCC's `empty if-body' warning. */
--# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0))
--# ifndef YYSTACK_ALLOC_MAXIMUM
-- /* The OS might guarantee only one guard page at the bottom of the stack,
-- and a page size can be as small as 4096 bytes. So we cannot safely
-- invoke alloca (N) if N exceeds 4096. Use a slightly smaller number
-- to allow for a few compiler-allocated temporary stack slots. */
--# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
--# endif
--# else
--# define YYSTACK_ALLOC YYMALLOC
--# define YYSTACK_FREE YYFREE
--# ifndef YYSTACK_ALLOC_MAXIMUM
--# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
--# endif
--# if (defined __cplusplus && ! defined _STDLIB_H \
-- && ! ((defined YYMALLOC || defined malloc) \
-- && (defined YYFREE || defined free)))
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# ifndef YYMALLOC
--# define YYMALLOC malloc
--# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# ifndef YYFREE
--# define YYFREE free
--# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void free (void *); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# endif
--#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
--
--
--#if (! defined yyoverflow \
-- && (! defined __cplusplus \
-- || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
--
--/* A type that is properly aligned for any stack member. */
--union yyalloc
--{
-- yytype_int16 yyss;
-- YYSTYPE yyvs;
-- };
--
--/* The size of the maximum gap between one aligned stack and the next. */
--# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
--
--/* The size of an array large to enough to hold all stacks, each with
-- N elements. */
--# define YYSTACK_BYTES(N) \
-- ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \
-- + YYSTACK_GAP_MAXIMUM)
--
--/* Copy COUNT objects from FROM to TO. The source and destination do
-- not overlap. */
--# ifndef YYCOPY
--# if defined __GNUC__ && 1 < __GNUC__
--# define YYCOPY(To, From, Count) \
-- __builtin_memcpy (To, From, (Count) * sizeof (*(From)))
--# else
--# define YYCOPY(To, From, Count) \
-- do \
-- { \
-- YYSIZE_T yyi; \
-- for (yyi = 0; yyi < (Count); yyi++) \
-- (To)[yyi] = (From)[yyi]; \
-- } \
-- while (YYID (0))
--# endif
--# endif
--
--/* Relocate STACK from its old location to the new one. The
-- local variables YYSIZE and YYSTACKSIZE give the old and new number of
-- elements in the stack, and YYPTR gives the new location of the
-- stack. Advance YYPTR to a properly aligned location for the next
-- stack. */
--# define YYSTACK_RELOCATE(Stack) \
-- do \
-- { \
-- YYSIZE_T yynewbytes; \
-- YYCOPY (&yyptr->Stack, Stack, yysize); \
-- Stack = &yyptr->Stack; \
-- yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
-- yyptr += yynewbytes / sizeof (*yyptr); \
-- } \
-- while (YYID (0))
--
--#endif
--
--/* YYFINAL -- State number of the termination state. */
--#define YYFINAL 2
--/* YYLAST -- Last index in YYTABLE. */
--#define YYLAST 830
--
--/* YYNTOKENS -- Number of terminals. */
--#define YYNTOKENS 112
--/* YYNNTS -- Number of nonterminals. */
--#define YYNNTS 102
--/* YYNRULES -- Number of rules. */
--#define YYNRULES 276
--/* YYNRULES -- Number of states. */
--#define YYNSTATES 520
--
--/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */
--#define YYUNDEFTOK 2
--#define YYMAXUTOK 353
--
--#define YYTRANSLATE(YYX) \
-- ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
--
--/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */
--static const yytype_uint8 yytranslate[] =
--{
-- 0, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 105, 100, 2,
-- 110, 111, 103, 101, 108, 102, 2, 104, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 109, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 99, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 98, 2, 106, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 1, 2, 3, 4,
-- 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
-- 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
-- 35, 36, 37, 38, 39, 40, 41, 42, 43, 44,
-- 45, 46, 47, 48, 49, 50, 51, 52, 53, 54,
-- 55, 56, 57, 58, 59, 60, 61, 62, 63, 64,
-- 65, 66, 67, 68, 69, 70, 71, 72, 73, 74,
-- 75, 76, 77, 78, 79, 80, 81, 82, 83, 84,
-- 85, 86, 87, 88, 89, 90, 91, 92, 93, 94,
-- 95, 96, 97, 107
--};
--
--#if YYDEBUG
--/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
-- YYRHS. */
--static const yytype_uint16 yyprhs[] =
--{
-- 0, 0, 3, 4, 7, 10, 13, 16, 19, 22,
-- 25, 28, 31, 34, 37, 40, 43, 46, 49, 56,
-- 57, 60, 63, 68, 70, 72, 74, 78, 81, 83,
-- 85, 87, 89, 91, 93, 98, 103, 104, 118, 119,
-- 133, 134, 149, 150, 154, 155, 159, 163, 167, 171,
-- 175, 181, 188, 196, 205, 209, 213, 218, 222, 223,
-- 226, 227, 232, 233, 238, 239, 244, 245, 250, 251,
-- 256, 257, 261, 273, 286, 287, 292, 293, 298, 299,
-- 303, 304, 309, 310, 315, 322, 331, 342, 354, 355,
-- 360, 361, 365, 366, 371, 372, 377, 378, 383, 384,
-- 389, 390, 395, 396, 400, 401, 406, 407, 423, 430,
-- 439, 449, 452, 453, 456, 458, 460, 461, 465, 466,
-- 470, 471, 475, 476, 480, 485, 490, 494, 501, 502,
-- 505, 510, 513, 520, 521, 525, 528, 530, 532, 534,
-- 536, 538, 540, 547, 548, 551, 554, 558, 564, 567,
-- 573, 580, 588, 598, 603, 604, 607, 608, 610, 612,
-- 614, 616, 620, 624, 628, 631, 632, 639, 640, 644,
-- 649, 652, 654, 656, 658, 660, 662, 664, 666, 668,
-- 670, 672, 679, 684, 693, 694, 698, 701, 708, 709,
-- 716, 723, 727, 731, 735, 739, 743, 744, 750, 758,
-- 759, 765, 766, 772, 773, 777, 779, 781, 783, 785,
-- 788, 790, 793, 794, 797, 801, 806, 810, 811, 814,
-- 815, 818, 820, 822, 824, 826, 828, 830, 832, 834,
-- 836, 838, 841, 843, 845, 847, 849, 851, 854, 856,
-- 859, 861, 864, 866, 869, 873, 878, 880, 884, 885,
-- 887, 890, 892, 894, 898, 901, 904, 908, 912, 916,
-- 920, 924, 928, 932, 936, 939, 941, 943, 947, 950,
-- 954, 958, 962, 966, 970, 974, 978
--};
--
--/* YYRHS -- A `-1'-separated list of the rules' RHS. */
--static const yytype_int16 yyrhs[] =
--{
-- 113, 0, -1, -1, 113, 114, -1, 113, 120, -1,
-- 113, 121, -1, 113, 122, -1, 113, 162, -1, 113,
-- 163, -1, 113, 164, -1, 113, 165, -1, 113, 170,
-- -1, 113, 173, -1, 113, 178, -1, 113, 183, -1,
-- 113, 182, -1, 113, 185, -1, 113, 97, -1, 191,
-- 5, 194, 3, 115, 4, -1, -1, 115, 116, -1,
-- 117, 211, -1, 117, 211, 108, 118, -1, 92, -1,
-- 212, -1, 119, -1, 118, 108, 119, -1, 118, 119,
-- -1, 6, -1, 7, -1, 8, -1, 9, -1, 10,
-- -1, 11, -1, 191, 12, 196, 198, -1, 191, 13,
-- 195, 198, -1, -1, 191, 14, 196, 126, 212, 208,
-- 208, 208, 123, 127, 3, 128, 4, -1, -1, 191,
-- 15, 196, 126, 212, 208, 208, 208, 124, 127, 3,
-- 128, 4, -1, -1, 191, 15, 196, 126, 212, 208,
-- 208, 208, 208, 125, 127, 3, 128, 4, -1, -1,
-- 16, 109, 209, -1, -1, 127, 17, 199, -1, 127,
-- 18, 191, -1, 127, 19, 205, -1, 127, 16, 209,
-- -1, 127, 18, 199, -1, 127, 41, 209, 108, 199,
-- -1, 127, 41, 209, 108, 199, 208, -1, 127, 41,
-- 209, 108, 199, 208, 208, -1, 127, 41, 209, 108,
-- 199, 208, 208, 208, -1, 127, 57, 191, -1, 127,
-- 55, 209, -1, 127, 54, 209, 208, -1, 127, 56,
-- 209, -1, -1, 128, 129, -1, -1, 20, 153, 130,
-- 151, -1, -1, 21, 153, 131, 151, -1, -1, 22,
-- 153, 132, 151, -1, -1, 38, 153, 133, 151, -1,
-- -1, 23, 153, 134, 151, -1, -1, 24, 135, 151,
-- -1, 10, 153, 209, 152, 156, 208, 208, 208, 208,
-- 207, 155, -1, 10, 153, 209, 152, 156, 208, 208,
-- 208, 208, 208, 208, 155, -1, -1, 25, 153, 136,
-- 151, -1, -1, 26, 153, 137, 151, -1, -1, 27,
-- 138, 151, -1, -1, 28, 153, 139, 151, -1, -1,
-- 39, 153, 140, 151, -1, 42, 193, 209, 208, 208,
-- 155, -1, 42, 193, 209, 208, 208, 208, 208, 155,
-- -1, 42, 193, 209, 208, 208, 208, 208, 158, 207,
-- 155, -1, 42, 193, 209, 208, 208, 208, 208, 158,
-- 208, 208, 155, -1, -1, 40, 153, 141, 151, -1,
-- -1, 29, 142, 151, -1, -1, 30, 153, 143, 151,
-- -1, -1, 31, 153, 144, 151, -1, -1, 32, 153,
-- 145, 151, -1, -1, 33, 153, 146, 151, -1, -1,
-- 34, 153, 147, 151, -1, -1, 35, 148, 151, -1,
-- -1, 36, 153, 149, 151, -1, -1, 37, 193, 209,
-- 108, 209, 108, 209, 108, 209, 108, 209, 108, 150,
-- 205, 207, -1, 209, 208, 208, 208, 208, 155, -1,
-- 209, 208, 208, 208, 208, 160, 207, 155, -1, 209,
-- 208, 208, 208, 208, 160, 208, 208, 155, -1, 108,
-- 154, -1, -1, 154, 108, -1, 212, -1, 199, -1,
-- -1, 3, 174, 4, -1, -1, 108, 157, 205, -1,
-- -1, 108, 159, 205, -1, -1, 108, 161, 205, -1,
-- 191, 41, 195, 198, -1, 191, 42, 195, 198, -1,
-- 54, 209, 208, -1, 191, 57, 194, 3, 166, 4,
-- -1, -1, 166, 167, -1, 59, 199, 208, 168, -1,
-- 59, 60, -1, 61, 199, 168, 3, 166, 4, -1,
-- -1, 168, 108, 169, -1, 168, 169, -1, 62, -1,
-- 63, -1, 64, -1, 65, -1, 66, -1, 67, -1,
-- 191, 58, 194, 3, 171, 4, -1, -1, 171, 172,
-- -1, 59, 199, -1, 59, 199, 208, -1, 59, 199,
-- 208, 208, 207, -1, 59, 60, -1, 61, 199, 3,
-- 171, 4, -1, 61, 199, 208, 3, 171, 4, -1,
-- 61, 199, 208, 208, 3, 171, 4, -1, 61, 199,
-- 208, 208, 208, 207, 3, 171, 4, -1, 191, 68,
-- 196, 198, -1, -1, 175, 176, -1, -1, 177, -1,
-- 203, -1, 204, -1, 210, -1, 177, 108, 203, -1,
-- 177, 108, 204, -1, 177, 108, 210, -1, 177, 108,
-- -1, -1, 70, 194, 3, 179, 180, 4, -1, -1,
-- 180, 209, 202, -1, 180, 209, 108, 202, -1, 180,
-- 1, -1, 191, -1, 48, -1, 69, -1, 49, -1,
-- 50, -1, 51, -1, 45, -1, 46, -1, 43, -1,
-- 44, -1, 191, 181, 194, 3, 174, 4, -1, 191,
-- 181, 194, 198, -1, 191, 52, 194, 209, 208, 3,
-- 184, 4, -1, -1, 184, 53, 191, -1, 184, 60,
-- -1, 191, 71, 186, 3, 187, 4, -1, -1, 186,
-- 72, 209, 207, 207, 207, -1, 186, 73, 209, 207,
-- 207, 207, -1, 186, 74, 209, -1, 186, 75, 209,
-- -1, 186, 76, 209, -1, 186, 77, 209, -1, 186,
-- 78, 209, -1, -1, 187, 79, 3, 188, 4, -1,
-- 187, 80, 3, 81, 199, 190, 4, -1, -1, 188,
-- 82, 3, 189, 4, -1, -1, 189, 81, 199, 108,
-- 199, -1, -1, 190, 208, 208, -1, 212, -1, 192,
-- -1, 200, -1, 93, -1, 212, 108, -1, 192, -1,
-- 192, 108, -1, -1, 194, 197, -1, 194, 55, 209,
-- -1, 194, 54, 209, 208, -1, 194, 56, 209, -1,
-- -1, 195, 197, -1, -1, 196, 197, -1, 83, -1,
-- 84, -1, 85, -1, 86, -1, 87, -1, 88, -1,
-- 89, -1, 92, -1, 93, -1, 200, -1, 199, 200,
-- -1, 91, -1, 92, -1, 204, -1, 203, -1, 201,
-- -1, 202, 201, -1, 96, -1, 203, 96, -1, 95,
-- -1, 204, 95, -1, 206, -1, 90, 206, -1, 205,
-- 98, 206, -1, 205, 98, 90, 206, -1, 94, -1,
-- 110, 209, 111, -1, -1, 208, -1, 108, 209, -1,
-- 210, -1, 94, -1, 110, 210, 111, -1, 106, 210,
-- -1, 102, 210, -1, 210, 103, 210, -1, 210, 104,
-- 210, -1, 210, 105, 210, -1, 210, 101, 210, -1,
-- 210, 102, 210, -1, 210, 100, 210, -1, 210, 99,
-- 210, -1, 210, 98, 210, -1, 108, 212, -1, 213,
-- -1, 94, -1, 110, 210, 111, -1, 106, 210, -1,
-- 213, 103, 210, -1, 213, 104, 210, -1, 213, 105,
-- 210, -1, 213, 101, 210, -1, 213, 102, 210, -1,
-- 213, 100, 210, -1, 213, 99, 210, -1, 213, 98,
-- 210, -1
--};
--
--/* YYRLINE[YYN] -- source line where rule number YYN was defined. */
--static const yytype_uint16 yyrline[] =
--{
-- 0, 179, 179, 181, 182, 183, 184, 185, 186, 187,
-- 188, 189, 190, 191, 192, 193, 194, 195, 201, 212,
-- 215, 236, 241, 253, 273, 283, 287, 292, 299, 303,
-- 308, 312, 316, 320, 329, 341, 355, 353, 380, 378,
-- 407, 405, 437, 440, 446, 448, 454, 458, 463, 467,
-- 471, 484, 499, 514, 529, 533, 537, 541, 547, 549,
-- 561, 560, 573, 572, 585, 584, 597, 596, 612, 611,
-- 624, 623, 637, 648, 658, 657, 670, 669, 682, 681,
-- 694, 693, 706, 705, 720, 725, 731, 737, 744, 743,
-- 759, 758, 771, 770, 783, 782, 794, 793, 806, 805,
-- 818, 817, 830, 829, 842, 841, 855, 853, 874, 885,
-- 896, 908, 919, 922, 926, 931, 941, 944, 954, 953,
-- 960, 959, 966, 965, 973, 985, 998, 1007, 1018, 1021,
-- 1038, 1042, 1046, 1054, 1057, 1061, 1068, 1072, 1076, 1080,
-- 1084, 1088, 1097, 1108, 1111, 1128, 1132, 1136, 1140, 1144,
-- 1148, 1152, 1156, 1166, 1179, 1179, 1191, 1195, 1202, 1210,
-- 1218, 1226, 1235, 1244, 1253, 1263, 1262, 1267, 1269, 1274,
-- 1279, 1287, 1291, 1296, 1301, 1306, 1311, 1316, 1321, 1326,
-- 1331, 1342, 1349, 1359, 1365, 1366, 1385, 1410, 1421, 1426,
-- 1433, 1440, 1445, 1450, 1455, 1460, 1475, 1478, 1482, 1490,
-- 1493, 1501, 1504, 1512, 1515, 1524, 1529, 1538, 1542, 1552,
-- 1557, 1561, 1572, 1578, 1584, 1589, 1594, 1605, 1610, 1622,
-- 1627, 1639, 1644, 1649, 1654, 1659, 1664, 1669, 1679, 1683,
-- 1691, 1696, 1711, 1715, 1724, 1728, 1740, 1745, 1761, 1765,
-- 1777, 1781, 1803, 1807, 1811, 1815, 1822, 1826, 1836, 1839,
-- 1848, 1857, 1866, 1870, 1874, 1879, 1884, 1889, 1894, 1899,
-- 1904, 1909, 1914, 1919, 1930, 1939, 1950, 1954, 1958, 1963,
-- 1968, 1973, 1978, 1983, 1988, 1993, 1998
--};
--#endif
--
--#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE
--/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
-- First, the terminals, then, starting at YYNTOKENS, nonterminals. */
--static const char *const yytname[] =
--{
-- "$end", "error", "$undefined", "BEG", "END", "ACCELERATORS", "VIRTKEY",
-- "ASCII", "NOINVERT", "SHIFT", "CONTROL", "ALT", "BITMAP", "CURSOR",
-- "DIALOG", "DIALOGEX", "EXSTYLE", "CAPTION", "CLASS", "STYLE",
-- "AUTO3STATE", "AUTOCHECKBOX", "AUTORADIOBUTTON", "CHECKBOX", "COMBOBOX",
-- "CTEXT", "DEFPUSHBUTTON", "EDITTEXT", "GROUPBOX", "LISTBOX", "LTEXT",
-- "PUSHBOX", "PUSHBUTTON", "RADIOBUTTON", "RTEXT", "SCROLLBAR", "STATE3",
-- "USERBUTTON", "BEDIT", "HEDIT", "IEDIT", "FONT", "ICON", "ANICURSOR",
-- "ANIICON", "DLGINCLUDE", "DLGINIT", "FONTDIR", "HTML", "MANIFEST",
-- "PLUGPLAY", "VXD", "TOOLBAR", "BUTTON", "LANGUAGE", "CHARACTERISTICS",
-- "VERSIONK", "MENU", "MENUEX", "MENUITEM", "SEPARATOR", "POPUP",
-- "CHECKED", "GRAYED", "HELP", "INACTIVE", "MENUBARBREAK", "MENUBREAK",
-- "MESSAGETABLE", "RCDATA", "STRINGTABLE", "VERSIONINFO", "FILEVERSION",
-- "PRODUCTVERSION", "FILEFLAGSMASK", "FILEFLAGS", "FILEOS", "FILETYPE",
-- "FILESUBTYPE", "BLOCKSTRINGFILEINFO", "BLOCKVARFILEINFO", "VALUE",
-- "BLOCK", "MOVEABLE", "FIXED", "PURE", "IMPURE", "PRELOAD", "LOADONCALL",
-- "DISCARDABLE", "NOT", "QUOTEDUNISTRING", "QUOTEDSTRING", "STRING",
-- "NUMBER", "SIZEDUNISTRING", "SIZEDSTRING", "IGNORED_TOKEN", "'|'", "'^'",
-- "'&'", "'+'", "'-'", "'*'", "'/'", "'%'", "'~'", "NEG", "','", "'='",
-- "'('", "')'", "$accept", "input", "accelerator", "acc_entries",
-- "acc_entry", "acc_event", "acc_options", "acc_option", "bitmap",
-- "cursor", "dialog", "@1", "@2", "@3", "exstyle", "styles", "controls",
-- "control", "@4", "@5", "@6", "@7", "@8", "@9", "@10", "@11", "@12",
-- "@13", "@14", "@15", "@16", "@17", "@18", "@19", "@20", "@21", "@22",
-- "@23", "@24", "control_params", "cresid", "optresidc", "resid",
-- "opt_control_data", "control_styleexpr", "@25", "icon_styleexpr", "@26",
-- "control_params_styleexpr", "@27", "font", "icon", "language", "menu",
-- "menuitems", "menuitem", "menuitem_flags", "menuitem_flag", "menuex",
-- "menuexitems", "menuexitem", "messagetable", "optrcdata_data", "@28",
-- "optrcdata_data_int", "rcdata_data", "stringtable", "@29", "string_data",
-- "rcdata_id", "user", "toolbar", "toolbar_data", "versioninfo",
-- "fixedverinfo", "verblocks", "verstringtables", "vervals", "vertrans",
-- "id", "resname", "resref", "suboptions", "memflags_move_discard",
-- "memflags_move", "memflag", "file_name", "res_unicode_string_concat",
-- "res_unicode_string", "res_unicode_sizedstring",
-- "res_unicode_sizedstring_concat", "sizedstring", "sizedunistring",
-- "styleexpr", "parennumber", "optcnumexpr", "cnumexpr", "numexpr",
-- "sizednumexpr", "cposnumexpr", "posnumexpr", "sizedposnumexpr", 0
--};
--#endif
--
--# ifdef YYPRINT
--/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to
-- token YYLEX-NUM. */
--static const yytype_uint16 yytoknum[] =
--{
-- 0, 256, 257, 258, 259, 260, 261, 262, 263, 264,
-- 265, 266, 267, 268, 269, 270, 271, 272, 273, 274,
-- 275, 276, 277, 278, 279, 280, 281, 282, 283, 284,
-- 285, 286, 287, 288, 289, 290, 291, 292, 293, 294,
-- 295, 296, 297, 298, 299, 300, 301, 302, 303, 304,
-- 305, 306, 307, 308, 309, 310, 311, 312, 313, 314,
-- 315, 316, 317, 318, 319, 320, 321, 322, 323, 324,
-- 325, 326, 327, 328, 329, 330, 331, 332, 333, 334,
-- 335, 336, 337, 338, 339, 340, 341, 342, 343, 344,
-- 345, 346, 347, 348, 349, 350, 351, 352, 124, 94,
-- 38, 43, 45, 42, 47, 37, 126, 353, 44, 61,
-- 40, 41
--};
--# endif
--
--/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */
--static const yytype_uint8 yyr1[] =
--{
-- 0, 112, 113, 113, 113, 113, 113, 113, 113, 113,
-- 113, 113, 113, 113, 113, 113, 113, 113, 114, 115,
-- 115, 116, 116, 117, 117, 118, 118, 118, 119, 119,
-- 119, 119, 119, 119, 120, 121, 123, 122, 124, 122,
-- 125, 122, 126, 126, 127, 127, 127, 127, 127, 127,
-- 127, 127, 127, 127, 127, 127, 127, 127, 128, 128,
-- 130, 129, 131, 129, 132, 129, 133, 129, 134, 129,
-- 135, 129, 129, 129, 136, 129, 137, 129, 138, 129,
-- 139, 129, 140, 129, 129, 129, 129, 129, 141, 129,
-- 142, 129, 143, 129, 144, 129, 145, 129, 146, 129,
-- 147, 129, 148, 129, 149, 129, 150, 129, 151, 151,
-- 151, 152, 153, 153, 154, 154, 155, 155, 157, 156,
-- 159, 158, 161, 160, 162, 163, 164, 165, 166, 166,
-- 167, 167, 167, 168, 168, 168, 169, 169, 169, 169,
-- 169, 169, 170, 171, 171, 172, 172, 172, 172, 172,
-- 172, 172, 172, 173, 175, 174, 176, 176, 177, 177,
-- 177, 177, 177, 177, 177, 179, 178, 180, 180, 180,
-- 180, 181, 181, 181, 181, 181, 181, 181, 181, 181,
-- 181, 182, 182, 183, 184, 184, 184, 185, 186, 186,
-- 186, 186, 186, 186, 186, 186, 187, 187, 187, 188,
-- 188, 189, 189, 190, 190, 191, 191, 192, 192, 193,
-- 193, 193, 194, 194, 194, 194, 194, 195, 195, 196,
-- 196, 197, 197, 197, 197, 197, 197, 197, 198, 198,
-- 199, 199, 200, 200, 201, 201, 202, 202, 203, 203,
-- 204, 204, 205, 205, 205, 205, 206, 206, 207, 207,
-- 208, 209, 210, 210, 210, 210, 210, 210, 210, 210,
-- 210, 210, 210, 210, 211, 212, 213, 213, 213, 213,
-- 213, 213, 213, 213, 213, 213, 213
--};
--
--/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */
--static const yytype_uint8 yyr2[] =
--{
-- 0, 2, 0, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 6, 0,
-- 2, 2, 4, 1, 1, 1, 3, 2, 1, 1,
-- 1, 1, 1, 1, 4, 4, 0, 13, 0, 13,
-- 0, 14, 0, 3, 0, 3, 3, 3, 3, 3,
-- 5, 6, 7, 8, 3, 3, 4, 3, 0, 2,
-- 0, 4, 0, 4, 0, 4, 0, 4, 0, 4,
-- 0, 3, 11, 12, 0, 4, 0, 4, 0, 3,
-- 0, 4, 0, 4, 6, 8, 10, 11, 0, 4,
-- 0, 3, 0, 4, 0, 4, 0, 4, 0, 4,
-- 0, 4, 0, 3, 0, 4, 0, 15, 6, 8,
-- 9, 2, 0, 2, 1, 1, 0, 3, 0, 3,
-- 0, 3, 0, 3, 4, 4, 3, 6, 0, 2,
-- 4, 2, 6, 0, 3, 2, 1, 1, 1, 1,
-- 1, 1, 6, 0, 2, 2, 3, 5, 2, 5,
-- 6, 7, 9, 4, 0, 2, 0, 1, 1, 1,
-- 1, 3, 3, 3, 2, 0, 6, 0, 3, 4,
-- 2, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 6, 4, 8, 0, 3, 2, 6, 0, 6,
-- 6, 3, 3, 3, 3, 3, 0, 5, 7, 0,
-- 5, 0, 5, 0, 3, 1, 1, 1, 1, 2,
-- 1, 2, 0, 2, 3, 4, 3, 0, 2, 0,
-- 2, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 2, 1, 1, 1, 1, 1, 2, 1, 2,
-- 1, 2, 1, 2, 3, 4, 1, 3, 0, 1,
-- 2, 1, 1, 3, 2, 2, 3, 3, 3, 3,
-- 3, 3, 3, 3, 2, 1, 1, 3, 2, 3,
-- 3, 3, 3, 3, 3, 3, 3
--};
--
--/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
-- STATE-NUM when YYTABLE doesn't specify something else to do. Zero
-- means the default is an error. */
--static const yytype_uint16 yydefact[] =
--{
-- 2, 0, 1, 0, 212, 232, 233, 208, 266, 17,
-- 0, 0, 3, 4, 5, 6, 7, 8, 9, 10,
-- 11, 12, 13, 15, 14, 16, 0, 206, 207, 205,
-- 265, 252, 0, 0, 0, 0, 251, 0, 268, 0,
-- 212, 219, 217, 219, 219, 217, 217, 179, 180, 177,
-- 178, 172, 174, 175, 176, 212, 212, 212, 219, 173,
-- 188, 212, 171, 0, 0, 0, 0, 0, 0, 0,
-- 0, 255, 254, 0, 0, 126, 0, 0, 0, 0,
-- 0, 0, 0, 0, 165, 0, 0, 0, 221, 222,
-- 223, 224, 225, 226, 227, 213, 267, 0, 0, 0,
-- 42, 42, 0, 0, 0, 0, 0, 0, 0, 0,
-- 276, 275, 274, 272, 273, 269, 270, 271, 253, 250,
-- 263, 262, 261, 259, 260, 256, 257, 258, 167, 0,
-- 214, 216, 19, 228, 229, 220, 34, 218, 35, 0,
-- 0, 0, 124, 125, 0, 128, 143, 153, 196, 0,
-- 0, 0, 0, 0, 0, 0, 154, 182, 0, 215,
-- 0, 0, 0, 0, 0, 0, 0, 0, 248, 248,
-- 191, 192, 193, 194, 195, 0, 156, 170, 166, 0,
-- 18, 23, 20, 0, 24, 43, 0, 0, 184, 127,
-- 0, 0, 129, 142, 0, 0, 144, 187, 0, 0,
-- 248, 249, 248, 181, 240, 238, 155, 157, 158, 159,
-- 160, 0, 236, 168, 235, 234, 0, 21, 0, 0,
-- 0, 131, 0, 230, 133, 148, 145, 0, 199, 0,
-- 248, 248, 164, 239, 241, 169, 237, 264, 0, 36,
-- 38, 183, 0, 186, 231, 133, 0, 146, 143, 0,
-- 0, 0, 189, 190, 161, 162, 163, 28, 29, 30,
-- 31, 32, 33, 22, 25, 44, 44, 40, 185, 130,
-- 128, 136, 137, 138, 139, 140, 141, 0, 135, 248,
-- 0, 143, 0, 197, 0, 203, 0, 27, 0, 0,
-- 44, 0, 134, 147, 149, 0, 143, 248, 201, 0,
-- 26, 58, 0, 0, 0, 0, 0, 0, 0, 0,
-- 0, 58, 0, 132, 150, 0, 0, 0, 198, 0,
-- 0, 48, 45, 46, 49, 207, 0, 246, 0, 47,
-- 242, 0, 0, 55, 57, 54, 0, 58, 151, 143,
-- 200, 0, 204, 37, 112, 112, 112, 112, 112, 70,
-- 112, 112, 78, 112, 90, 112, 112, 112, 112, 112,
-- 102, 112, 0, 112, 112, 112, 0, 59, 243, 0,
-- 0, 0, 56, 39, 0, 0, 0, 0, 0, 115,
-- 114, 60, 62, 64, 68, 0, 74, 76, 0, 80,
-- 0, 92, 94, 96, 98, 100, 0, 104, 210, 0,
-- 0, 66, 82, 88, 0, 247, 0, 244, 50, 41,
-- 152, 0, 0, 113, 0, 0, 0, 0, 71, 0,
-- 0, 0, 79, 0, 91, 0, 0, 0, 0, 0,
-- 103, 0, 211, 0, 209, 0, 0, 0, 0, 245,
-- 51, 202, 0, 0, 61, 63, 65, 69, 0, 75,
-- 77, 81, 93, 95, 97, 99, 101, 105, 0, 67,
-- 83, 89, 0, 52, 111, 118, 0, 0, 0, 116,
-- 53, 0, 0, 0, 0, 154, 84, 0, 119, 0,
-- 116, 0, 0, 116, 0, 122, 108, 248, 0, 117,
-- 120, 85, 248, 248, 0, 116, 249, 0, 0, 116,
-- 249, 116, 249, 123, 109, 116, 0, 121, 86, 116,
-- 72, 116, 110, 0, 87, 73, 106, 0, 248, 107
--};
--
--/* YYDEFGOTO[NTERM-NUM]. */
--static const yytype_int16 yydefgoto[] =
--{
-- -1, 1, 12, 160, 182, 183, 263, 264, 13, 14,
-- 15, 265, 266, 290, 140, 288, 320, 367, 414, 415,
-- 416, 435, 417, 385, 420, 421, 388, 423, 436, 437,
-- 390, 425, 426, 427, 428, 429, 396, 431, 517, 418,
-- 443, 377, 378, 476, 466, 471, 492, 498, 487, 494,
-- 16, 17, 18, 19, 165, 192, 246, 278, 20, 166,
-- 196, 21, 175, 176, 206, 207, 22, 128, 158, 61,
-- 23, 24, 220, 25, 108, 167, 250, 317, 299, 26,
-- 27, 399, 37, 99, 98, 95, 136, 379, 223, 212,
-- 213, 214, 215, 329, 330, 200, 201, 419, 36, 217,
-- 380, 30
--};
--
--/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
-- STATE-NUM. */
--#define YYPACT_NINF -446
--static const yytype_int16 yypact[] =
--{
-- -446, 75, -446, 317, -446, -446, -446, -446, -446, -446,
-- 317, 317, -446, -446, -446, -446, -446, -446, -446, -446,
-- -446, -446, -446, -446, -446, -446, 463, -446, -446, -446,
-- 589, -446, 317, 317, 317, -93, 626, 209, -446, 437,
-- -446, -446, -446, -446, -446, -446, -446, -446, -446, -446,
-- -446, -446, -446, -446, -446, -446, -446, -446, -446, -446,
-- -446, -446, -446, 317, 317, 317, 317, 317, 317, 317,
-- 317, -446, -446, 526, 317, -446, 317, 317, 317, 317,
-- 317, 317, 317, 317, -446, 317, 317, 317, -446, -446,
-- -446, -446, -446, -446, -446, -446, -446, 267, 675, 675,
-- 275, 275, 675, 675, 491, 404, 441, 675, 168, 256,
-- 719, 379, 397, 213, 213, -446, -446, -446, -446, -446,
-- 719, 379, 397, 213, 213, -446, -446, -446, -446, -93,
-- -446, -446, -446, -446, -446, -446, -446, -446, -446, -65,
-- 144, 144, -446, -446, -93, -446, -446, -446, -446, 317,
-- 317, 317, 317, 317, 317, 317, -446, -446, 18, -446,
-- 21, 317, -93, -93, 31, 140, 155, 126, -93, -93,
-- -446, -446, -446, -446, -446, 47, 177, -446, -446, 212,
-- -446, -446, -446, -34, -446, -446, -93, -93, -446, -446,
-- -36, -5, -446, -446, -25, -5, -446, -446, 119, 131,
-- -93, -446, -93, -446, -446, -446, -446, 54, 68, 84,
-- 626, 2, -446, 2, 68, 84, 144, 87, -93, -93,
-- 25, -446, 95, -446, -5, -446, 95, 62, -446, 102,
-- -93, -93, 177, -446, -446, 2, -446, -446, 552, -446,
-- -93, -446, 306, -446, -446, -446, 76, -93, -446, 8,
-- 6, -5, -446, -446, 68, 84, 626, -446, -446, -446,
-- -446, -446, -446, 167, -446, -446, -446, -446, -446, 271,
-- -446, -446, -446, -446, -446, -446, -446, 763, -446, -93,
-- 161, -446, 11, -446, 197, -5, 552, -446, 374, 548,
-- -446, 178, -446, -446, -446, 190, -446, -93, -446, 3,
-- -446, -446, 317, -5, 306, -47, 317, 317, 317, 317,
-- 306, -446, 565, -446, -446, 194, 201, -1, -446, -93,
-- 639, -446, -5, -446, -5, 143, -33, -446, 317, 110,
-- -446, 105, -93, -446, -446, -446, 676, -446, -446, -446,
-- -446, -5, -446, -446, 311, 311, 311, 311, 311, -446,
-- 311, 311, -446, 311, -446, 311, 311, 311, 311, 311,
-- -446, 311, 306, 311, 311, 311, 306, -446, -446, 104,
-- -42, -5, -446, -446, 713, 207, 99, 317, 113, -5,
-- -446, -446, -446, -446, -446, 317, -446, -446, 317, -446,
-- 317, -446, -446, -446, -446, -446, 317, -446, 115, 317,
-- 120, -446, -446, -446, 317, -446, -33, -446, 95, -446,
-- -446, -5, 152, -446, 317, 317, 317, 317, -446, -93,
-- 317, 317, -446, 317, -446, 317, 317, 317, 317, 317,
-- -446, 317, -446, 153, -446, 317, 317, 317, -93, -446,
-- -93, -5, 311, 159, -446, -446, -446, -446, -93, -446,
-- -446, -446, -446, -446, -446, -446, -446, -446, 317, -446,
-- -446, -446, -93, -93, -446, -446, -93, -93, 173, 15,
-- -446, -47, -93, -93, 317, -446, -446, -93, 110, -93,
-- 27, 180, 244, 29, -93, -446, -446, -93, 317, -446,
-- -446, -446, -93, -93, -47, 273, -93, 192, -47, 273,
-- -93, 273, -93, 110, -446, 273, 317, 110, -446, 273,
-- -446, 273, -446, 193, -446, -446, -446, -47, -75, -446
--};
--
--/* YYPGOTO[NTERM-NUM]. */
--static const yytype_int16 yypgoto[] =
--{
-- -446, -446, -446, -446, -446, -446, -446, -236, -446, -446,
-- -446, -446, -446, -446, 184, -262, -273, -446, -446, -446,
-- -446, -446, -446, -446, -446, -446, -446, -446, -446, -446,
-- -446, -446, -446, -446, -446, -446, -446, -446, -446, 219,
-- -446, 442, -123, 274, -446, -446, -446, -446, -446, -446,
-- -446, -446, -446, -446, 77, -446, 101, 88, -446, -239,
-- -446, -446, -109, -446, -446, -446, -446, -446, -446, -446,
-- -446, -446, -446, -446, -446, -446, -446, -446, -446, -24,
-- -245, 4, 169, 211, 270, 710, 175, -178, 5, -173,
-- 157, -156, -122, -445, -325, -161, -30, -3, 26, -446,
-- 20, -446
--};
--
--/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If
-- positive, shift that token. If negative, reduce the rule which
-- number is the opposite. If zero, do what YYDEFACT says.
-- If YYTABLE_NINF, syntax error. */
--#define YYTABLE_NINF -231
--static const yytype_int16 yytable[] =
--{
-- 35, 368, 62, 340, 289, 75, 28, 318, 202, 280,
-- 283, 281, 222, 224, 296, 74, 226, 227, 475, 177,
-- 208, 29, 178, 370, 221, 180, 478, 287, 312, 241,
-- 475, 28, 475, 74, 188, 225, 38, 39, 336, 230,
-- 236, 231, 295, 326, 161, 407, 29, 327, 406, 503,
-- 300, 203, 327, 507, 209, 5, 6, 315, 71, 72,
-- 73, 327, 236, 328, 374, 248, 5, 6, 328, 252,
-- 253, 119, 518, 285, 216, 2, 254, 328, 242, 270,
-- 341, 439, 129, 130, 131, 243, 5, 6, 284, 110,
-- 111, 112, 113, 114, 115, 116, 117, 204, 205, 159,
-- 375, 144, 120, 121, 122, 123, 124, 125, 126, 127,
-- 255, 74, 31, 181, 164, 8, 74, 398, 293, 74,
-- 32, 398, 228, 74, 33, 322, 324, 10, 34, 3,
-- 197, 11, 186, 187, 229, 485, 316, 490, 271, 272,
-- 273, 274, 275, 276, 189, 4, 168, 169, 170, 171,
-- 172, 173, 174, 5, 6, 179, 218, 219, 185, 193,
-- 162, 163, 232, 376, 233, 294, 5, 6, 7, 8,
-- 74, 148, 9, 257, 258, 259, 260, 261, 262, 234,
-- 184, 10, 313, 251, 277, 11, 5, 6, 239, 240,
-- 5, 6, 245, 408, 314, 238, 247, 249, 338, 190,
-- 298, 191, 210, 74, 339, 198, 199, 411, 370, 97,
-- 267, 410, 84, 371, 194, 405, 195, 279, 268, 282,
-- 194, 413, 195, 432, 104, 105, 106, 244, 434, 244,
-- 109, 244, 244, 441, -230, -230, 237, 190, 8, 191,
-- 149, 150, 151, 152, 153, 154, 155, 28, 489, 194,
-- 10, 195, 297, 194, 11, 195, 102, 103, 256, 156,
-- 442, 458, 29, 85, 86, 87, 194, 465, 195, 319,
-- 132, 31, 204, 205, 138, 286, 475, 142, 143, 32,
-- 323, 474, 147, 33, 157, 141, 335, 34, 488, 342,
-- 244, 139, 88, 89, 90, 91, 92, 93, 94, 321,
-- 506, 516, 372, 331, 332, 333, 334, 204, 205, 325,
-- 85, 86, 87, 100, 101, 28, 81, 82, 83, 464,
-- 211, 85, 86, 87, 29, 369, 495, 244, 107, 244,
-- 29, 499, 501, 271, 272, 273, 274, 275, 276, 88,
-- 89, 90, 91, 92, 93, 94, 269, 291, 133, 134,
-- 88, 89, 90, 91, 92, 93, 94, 519, 88, 89,
-- 90, 91, 92, 93, 94, 292, 482, 28, 235, 0,
-- 404, 28, 0, 0, 412, 0, 0, 301, 440, 277,
-- 0, 244, 400, 0, 244, 0, 400, 0, 0, 448,
-- 302, 303, 304, 305, 0, 0, 433, 5, 6, 7,
-- 8, 438, 5, 6, 0, 8, 0, 145, 462, 0,
-- 463, 31, 10, 244, 0, 306, 11, 10, 467, 32,
-- 0, 11, 0, 33, 0, 0, 0, 34, 307, 308,
-- 309, 310, 469, 470, 0, 0, 472, 473, 0, 477,
-- 0, 0, 479, 480, 146, 0, 244, 483, 0, 484,
-- 0, 0, 0, 0, 493, 468, 0, 496, 85, 86,
-- 87, 0, 500, 502, 0, 0, 505, 0, 40, 0,
-- 509, 481, 511, 0, 0, 41, 42, 43, 44, 78,
-- 79, 80, 81, 82, 83, 497, 0, 88, 89, 90,
-- 91, 92, 93, 94, 0, 85, 86, 87, 79, 80,
-- 81, 82, 83, 513, 45, 46, 47, 48, 49, 50,
-- 0, 51, 52, 53, 54, 55, 0, 0, 0, 0,
-- 56, 57, 0, 0, 88, 89, 90, 91, 92, 93,
-- 94, 58, 59, 0, 60, 76, 77, 78, 79, 80,
-- 81, 82, 83, 0, 0, 85, 86, 87, 96, 0,
-- 0, 311, 0, 0, 5, 6, 7, 8, 257, 258,
-- 259, 260, 261, 262, 302, 303, 304, 305, 337, 10,
-- 0, 0, 0, 11, 88, 89, 90, 91, 92, 93,
-- 94, 302, 303, 304, 305, 31, 0, 0, 0, 306,
-- 0, 0, 0, 32, 0, 0, 0, 33, 0, 0,
-- 0, 34, 307, 308, 309, 310, 306, 422, 0, 424,
-- 0, 0, 0, 0, 0, 430, 0, 0, 0, 307,
-- 308, 309, 310, 0, 76, 77, 78, 79, 80, 81,
-- 82, 83, 0, 444, 445, 446, 447, 118, 0, 449,
-- 450, 0, 451, 343, 452, 453, 454, 455, 456, 344,
-- 457, 0, 0, 0, 459, 460, 461, 0, 0, 345,
-- 346, 347, 348, 349, 350, 351, 352, 353, 354, 355,
-- 356, 357, 358, 359, 360, 361, 362, 363, 364, 365,
-- 373, 366, 0, 0, 0, 0, 344, 63, 64, 65,
-- 66, 67, 68, 69, 70, 0, 345, 346, 347, 348,
-- 349, 350, 351, 352, 353, 354, 355, 356, 357, 358,
-- 359, 360, 361, 362, 363, 364, 365, 409, 366, 0,
-- 0, 0, 0, 344, 76, 77, 78, 79, 80, 81,
-- 82, 83, 0, 345, 346, 347, 348, 349, 350, 351,
-- 352, 353, 354, 355, 356, 357, 358, 359, 360, 361,
-- 362, 363, 364, 365, 486, 366, 0, 491, 88, 89,
-- 90, 91, 92, 93, 94, 0, 0, 133, 134, 504,
-- 0, 0, 0, 508, 0, 510, 0, 0, 0, 512,
-- 0, 0, 0, 514, 0, 515, 0, 381, 382, 383,
-- 384, 0, 386, 387, 0, 389, 0, 391, 392, 393,
-- 394, 395, 0, 397, 0, 401, 402, 403, 135, 137,
-- 135, 135, 137, 137, 0, 0, 0, 135, 77, 78,
-- 79, 80, 81, 82, 83, 271, 272, 273, 274, 275,
-- 276
--};
--
--static const yytype_int16 yycheck[] =
--{
-- 3, 326, 26, 4, 266, 35, 1, 4, 169, 248,
-- 4, 3, 190, 191, 3, 108, 194, 195, 3, 1,
-- 176, 1, 4, 98, 60, 4, 471, 263, 290, 4,
-- 3, 26, 3, 108, 3, 60, 10, 11, 311, 200,
-- 213, 202, 281, 90, 109, 370, 26, 94, 90, 494,
-- 286, 4, 94, 498, 176, 91, 92, 296, 32, 33,
-- 34, 94, 235, 110, 337, 3, 91, 92, 110, 230,
-- 231, 74, 517, 251, 108, 0, 232, 110, 53, 3,
-- 81, 406, 85, 86, 87, 60, 91, 92, 82, 63,
-- 64, 65, 66, 67, 68, 69, 70, 95, 96, 129,
-- 339, 104, 76, 77, 78, 79, 80, 81, 82, 83,
-- 232, 108, 94, 92, 144, 94, 108, 362, 279, 108,
-- 102, 366, 3, 108, 106, 303, 304, 106, 110, 54,
-- 4, 110, 162, 163, 3, 108, 297, 108, 62, 63,
-- 64, 65, 66, 67, 4, 70, 149, 150, 151, 152,
-- 153, 154, 155, 91, 92, 158, 186, 187, 161, 4,
-- 140, 141, 108, 341, 96, 4, 91, 92, 93, 94,
-- 108, 3, 97, 6, 7, 8, 9, 10, 11, 95,
-- 160, 106, 4, 81, 108, 110, 91, 92, 218, 219,
-- 91, 92, 222, 371, 4, 108, 226, 227, 4, 59,
-- 3, 61, 176, 108, 3, 79, 80, 108, 98, 40,
-- 240, 4, 3, 108, 59, 111, 61, 247, 242, 249,
-- 59, 108, 61, 108, 55, 56, 57, 222, 108, 224,
-- 61, 226, 227, 411, 91, 92, 216, 59, 94, 61,
-- 72, 73, 74, 75, 76, 77, 78, 242, 4, 59,
-- 106, 61, 282, 59, 110, 61, 45, 46, 232, 3,
-- 108, 108, 242, 54, 55, 56, 59, 108, 61, 299,
-- 3, 94, 95, 96, 99, 108, 3, 102, 103, 102,
-- 304, 108, 107, 106, 109, 101, 310, 110, 108, 319,
-- 285, 16, 83, 84, 85, 86, 87, 88, 89, 302,
-- 108, 108, 332, 306, 307, 308, 309, 95, 96, 304,
-- 54, 55, 56, 43, 44, 310, 103, 104, 105, 442,
-- 108, 54, 55, 56, 304, 328, 487, 322, 58, 324,
-- 310, 492, 493, 62, 63, 64, 65, 66, 67, 83,
-- 84, 85, 86, 87, 88, 89, 245, 270, 92, 93,
-- 83, 84, 85, 86, 87, 88, 89, 518, 83, 84,
-- 85, 86, 87, 88, 89, 277, 475, 362, 211, -1,
-- 366, 366, -1, -1, 377, -1, -1, 3, 408, 108,
-- -1, 376, 362, -1, 379, -1, 366, -1, -1, 419,
-- 16, 17, 18, 19, -1, -1, 399, 91, 92, 93,
-- 94, 404, 91, 92, -1, 94, -1, 3, 438, -1,
-- 440, 94, 106, 408, -1, 41, 110, 106, 448, 102,
-- -1, 110, -1, 106, -1, -1, -1, 110, 54, 55,
-- 56, 57, 462, 463, -1, -1, 466, 467, -1, 469,
-- -1, -1, 472, 473, 3, -1, 441, 477, -1, 479,
-- -1, -1, -1, -1, 484, 458, -1, 487, 54, 55,
-- 56, -1, 492, 493, -1, -1, 496, -1, 5, -1,
-- 500, 474, 502, -1, -1, 12, 13, 14, 15, 100,
-- 101, 102, 103, 104, 105, 488, -1, 83, 84, 85,
-- 86, 87, 88, 89, -1, 54, 55, 56, 101, 102,
-- 103, 104, 105, 506, 41, 42, 43, 44, 45, 46,
-- -1, 48, 49, 50, 51, 52, -1, -1, -1, -1,
-- 57, 58, -1, -1, 83, 84, 85, 86, 87, 88,
-- 89, 68, 69, -1, 71, 98, 99, 100, 101, 102,
-- 103, 104, 105, -1, -1, 54, 55, 56, 111, -1,
-- -1, 3, -1, -1, 91, 92, 93, 94, 6, 7,
-- 8, 9, 10, 11, 16, 17, 18, 19, 3, 106,
-- -1, -1, -1, 110, 83, 84, 85, 86, 87, 88,
-- 89, 16, 17, 18, 19, 94, -1, -1, -1, 41,
-- -1, -1, -1, 102, -1, -1, -1, 106, -1, -1,
-- -1, 110, 54, 55, 56, 57, 41, 388, -1, 390,
-- -1, -1, -1, -1, -1, 396, -1, -1, -1, 54,
-- 55, 56, 57, -1, 98, 99, 100, 101, 102, 103,
-- 104, 105, -1, 414, 415, 416, 417, 111, -1, 420,
-- 421, -1, 423, 4, 425, 426, 427, 428, 429, 10,
-- 431, -1, -1, -1, 435, 436, 437, -1, -1, 20,
-- 21, 22, 23, 24, 25, 26, 27, 28, 29, 30,
-- 31, 32, 33, 34, 35, 36, 37, 38, 39, 40,
-- 4, 42, -1, -1, -1, -1, 10, 98, 99, 100,
-- 101, 102, 103, 104, 105, -1, 20, 21, 22, 23,
-- 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
-- 34, 35, 36, 37, 38, 39, 40, 4, 42, -1,
-- -1, -1, -1, 10, 98, 99, 100, 101, 102, 103,
-- 104, 105, -1, 20, 21, 22, 23, 24, 25, 26,
-- 27, 28, 29, 30, 31, 32, 33, 34, 35, 36,
-- 37, 38, 39, 40, 480, 42, -1, 483, 83, 84,
-- 85, 86, 87, 88, 89, -1, -1, 92, 93, 495,
-- -1, -1, -1, 499, -1, 501, -1, -1, -1, 505,
-- -1, -1, -1, 509, -1, 511, -1, 345, 346, 347,
-- 348, -1, 350, 351, -1, 353, -1, 355, 356, 357,
-- 358, 359, -1, 361, -1, 363, 364, 365, 98, 99,
-- 100, 101, 102, 103, -1, -1, -1, 107, 99, 100,
-- 101, 102, 103, 104, 105, 62, 63, 64, 65, 66,
-- 67
--};
--
--/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
-- symbol of state STATE-NUM. */
--static const yytype_uint8 yystos[] =
--{
-- 0, 113, 0, 54, 70, 91, 92, 93, 94, 97,
-- 106, 110, 114, 120, 121, 122, 162, 163, 164, 165,
-- 170, 173, 178, 182, 183, 185, 191, 192, 200, 212,
-- 213, 94, 102, 106, 110, 209, 210, 194, 210, 210,
-- 5, 12, 13, 14, 15, 41, 42, 43, 44, 45,
-- 46, 48, 49, 50, 51, 52, 57, 58, 68, 69,
-- 71, 181, 191, 98, 99, 100, 101, 102, 103, 104,
-- 105, 210, 210, 210, 108, 208, 98, 99, 100, 101,
-- 102, 103, 104, 105, 3, 54, 55, 56, 83, 84,
-- 85, 86, 87, 88, 89, 197, 111, 194, 196, 195,
-- 196, 196, 195, 195, 194, 194, 194, 196, 186, 194,
-- 210, 210, 210, 210, 210, 210, 210, 210, 111, 209,
-- 210, 210, 210, 210, 210, 210, 210, 210, 179, 209,
-- 209, 209, 3, 92, 93, 197, 198, 197, 198, 16,
-- 126, 126, 198, 198, 209, 3, 3, 198, 3, 72,
-- 73, 74, 75, 76, 77, 78, 3, 198, 180, 208,
-- 115, 109, 212, 212, 208, 166, 171, 187, 209, 209,
-- 209, 209, 209, 209, 209, 174, 175, 1, 4, 209,
-- 4, 92, 116, 117, 212, 209, 208, 208, 3, 4,
-- 59, 61, 167, 4, 59, 61, 172, 4, 79, 80,
-- 207, 208, 207, 4, 95, 96, 176, 177, 203, 204,
-- 210, 108, 201, 202, 203, 204, 108, 211, 208, 208,
-- 184, 60, 199, 200, 199, 60, 199, 199, 3, 3,
-- 207, 207, 108, 96, 95, 202, 201, 212, 108, 208,
-- 208, 4, 53, 60, 200, 208, 168, 208, 3, 208,
-- 188, 81, 207, 207, 203, 204, 210, 6, 7, 8,
-- 9, 10, 11, 118, 119, 123, 124, 208, 191, 168,
-- 3, 62, 63, 64, 65, 66, 67, 108, 169, 208,
-- 171, 3, 208, 4, 82, 199, 108, 119, 127, 127,
-- 125, 166, 169, 207, 4, 171, 3, 208, 3, 190,
-- 119, 3, 16, 17, 18, 19, 41, 54, 55, 56,
-- 57, 3, 127, 4, 4, 171, 207, 189, 4, 208,
-- 128, 209, 199, 191, 199, 200, 90, 94, 110, 205,
-- 206, 209, 209, 209, 209, 191, 128, 3, 4, 3,
-- 4, 81, 208, 4, 10, 20, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
-- 35, 36, 37, 38, 39, 40, 42, 129, 206, 209,
-- 98, 108, 208, 4, 128, 171, 199, 153, 154, 199,
-- 212, 153, 153, 153, 153, 135, 153, 153, 138, 153,
-- 142, 153, 153, 153, 153, 153, 148, 153, 192, 193,
-- 212, 153, 153, 153, 193, 111, 90, 206, 199, 4,
-- 4, 108, 209, 108, 130, 131, 132, 134, 151, 209,
-- 136, 137, 151, 139, 151, 143, 144, 145, 146, 147,
-- 151, 149, 108, 209, 108, 133, 140, 141, 209, 206,
-- 208, 199, 108, 152, 151, 151, 151, 151, 208, 151,
-- 151, 151, 151, 151, 151, 151, 151, 151, 108, 151,
-- 151, 151, 208, 208, 154, 108, 156, 208, 209, 208,
-- 208, 157, 208, 208, 108, 3, 155, 208, 205, 208,
-- 208, 209, 174, 208, 208, 108, 155, 160, 108, 4,
-- 108, 155, 158, 208, 161, 207, 208, 209, 159, 207,
-- 208, 207, 208, 205, 155, 208, 108, 205, 155, 208,
-- 155, 208, 155, 209, 155, 155, 108, 150, 205, 207
--};
--
--#define yyerrok (yyerrstatus = 0)
--#define yyclearin (yychar = YYEMPTY)
--#define YYEMPTY (-2)
--#define YYEOF 0
--
--#define YYACCEPT goto yyacceptlab
--#define YYABORT goto yyabortlab
--#define YYERROR goto yyerrorlab
--
--
--/* Like YYERROR except do call yyerror. This remains here temporarily
-- to ease the transition to the new meaning of YYERROR, for GCC.
-- Once GCC version 2 has supplanted version 1, this can go. */
--
--#define YYFAIL goto yyerrlab
--
--#define YYRECOVERING() (!!yyerrstatus)
--
--#define YYBACKUP(Token, Value) \
--do \
-- if (yychar == YYEMPTY && yylen == 1) \
-- { \
-- yychar = (Token); \
-- yylval = (Value); \
-- yytoken = YYTRANSLATE (yychar); \
-- YYPOPSTACK (1); \
-- goto yybackup; \
-- } \
-- else \
-- { \
-- yyerror (YY_("syntax error: cannot back up")); \
-- YYERROR; \
-- } \
--while (YYID (0))
--
--
--#define YYTERROR 1
--#define YYERRCODE 256
--
--
--/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
-- If N is 0, then set CURRENT to the empty location which ends
-- the previous symbol: RHS[0] (always defined). */
--
--#define YYRHSLOC(Rhs, K) ((Rhs)[K])
--#ifndef YYLLOC_DEFAULT
--# define YYLLOC_DEFAULT(Current, Rhs, N) \
-- do \
-- if (YYID (N)) \
-- { \
-- (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \
-- (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \
-- (Current).last_line = YYRHSLOC (Rhs, N).last_line; \
-- (Current).last_column = YYRHSLOC (Rhs, N).last_column; \
-- } \
-- else \
-- { \
-- (Current).first_line = (Current).last_line = \
-- YYRHSLOC (Rhs, 0).last_line; \
-- (Current).first_column = (Current).last_column = \
-- YYRHSLOC (Rhs, 0).last_column; \
-- } \
-- while (YYID (0))
--#endif
--
--
--/* YY_LOCATION_PRINT -- Print the location on the stream.
-- This macro was not mandated originally: define only if we know
-- we won't break user code: when these are the locations we know. */
--
--#ifndef YY_LOCATION_PRINT
--# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL
--# define YY_LOCATION_PRINT(File, Loc) \
-- fprintf (File, "%d.%d-%d.%d", \
-- (Loc).first_line, (Loc).first_column, \
-- (Loc).last_line, (Loc).last_column)
--# else
--# define YY_LOCATION_PRINT(File, Loc) ((void) 0)
--# endif
--#endif
--
--
--/* YYLEX -- calling `yylex' with the right arguments. */
--
--#ifdef YYLEX_PARAM
--# define YYLEX yylex (YYLEX_PARAM)
--#else
--# define YYLEX yylex ()
--#endif
--
--/* Enable debugging if requested. */
--#if YYDEBUG
--
--# ifndef YYFPRINTF
--# include <stdio.h> /* INFRINGES ON USER NAME SPACE */
--# define YYFPRINTF fprintf
--# endif
--
--# define YYDPRINTF(Args) \
--do { \
-- if (yydebug) \
-- YYFPRINTF Args; \
--} while (YYID (0))
--
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \
--do { \
-- if (yydebug) \
-- { \
-- YYFPRINTF (stderr, "%s ", Title); \
-- yy_symbol_print (stderr, \
-- Type, Value); \
-- YYFPRINTF (stderr, "\n"); \
-- } \
--} while (YYID (0))
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_value_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (!yyvaluep)
-- return;
--# ifdef YYPRINT
-- if (yytype < YYNTOKENS)
-- YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
--# else
-- YYUSE (yyoutput);
--# endif
-- switch (yytype)
-- {
-- default:
-- break;
-- }
--}
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (yytype < YYNTOKENS)
-- YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
-- else
-- YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
--
-- yy_symbol_value_print (yyoutput, yytype, yyvaluep);
-- YYFPRINTF (yyoutput, ")");
--}
--
--/*------------------------------------------------------------------.
--| yy_stack_print -- Print the state stack from its BOTTOM up to its |
--| TOP (included). |
--`------------------------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_stack_print (yytype_int16 *bottom, yytype_int16 *top)
--#else
--static void
--yy_stack_print (bottom, top)
-- yytype_int16 *bottom;
-- yytype_int16 *top;
--#endif
--{
-- YYFPRINTF (stderr, "Stack now");
-- for (; bottom <= top; ++bottom)
-- YYFPRINTF (stderr, " %d", *bottom);
-- YYFPRINTF (stderr, "\n");
--}
--
--# define YY_STACK_PRINT(Bottom, Top) \
--do { \
-- if (yydebug) \
-- yy_stack_print ((Bottom), (Top)); \
--} while (YYID (0))
--
--
--/*------------------------------------------------.
--| Report that the YYRULE is going to be reduced. |
--`------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_reduce_print (YYSTYPE *yyvsp, int yyrule)
--#else
--static void
--yy_reduce_print (yyvsp, yyrule)
-- YYSTYPE *yyvsp;
-- int yyrule;
--#endif
--{
-- int yynrhs = yyr2[yyrule];
-- int yyi;
-- unsigned long int yylno = yyrline[yyrule];
-- YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
-- yyrule - 1, yylno);
-- /* The symbols being reduced. */
-- for (yyi = 0; yyi < yynrhs; yyi++)
-- {
-- fprintf (stderr, " $%d = ", yyi + 1);
-- yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi],
-- &(yyvsp[(yyi + 1) - (yynrhs)])
-- );
-- fprintf (stderr, "\n");
-- }
--}
--
--# define YY_REDUCE_PRINT(Rule) \
--do { \
-- if (yydebug) \
-- yy_reduce_print (yyvsp, Rule); \
--} while (YYID (0))
--
--/* Nonzero means print parse trace. It is left uninitialized so that
-- multiple parsers can coexist. */
--int yydebug;
--#else /* !YYDEBUG */
--# define YYDPRINTF(Args)
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
--# define YY_STACK_PRINT(Bottom, Top)
--# define YY_REDUCE_PRINT(Rule)
--#endif /* !YYDEBUG */
--
--
--/* YYINITDEPTH -- initial size of the parser's stacks. */
--#ifndef YYINITDEPTH
--# define YYINITDEPTH 200
--#endif
--
--/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
-- if the built-in stack extension method is used).
--
-- Do not make this value too large; the results are undefined if
-- YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
-- evaluated with infinite-precision integer arithmetic. */
--
--#ifndef YYMAXDEPTH
--# define YYMAXDEPTH 10000
--#endif
--
--
--
--#if YYERROR_VERBOSE
--
--# ifndef yystrlen
--# if defined __GLIBC__ && defined _STRING_H
--# define yystrlen strlen
--# else
--/* Return the length of YYSTR. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static YYSIZE_T
--yystrlen (const char *yystr)
--#else
--static YYSIZE_T
--yystrlen (yystr)
-- const char *yystr;
--#endif
--{
-- YYSIZE_T yylen;
-- for (yylen = 0; yystr[yylen]; yylen++)
-- continue;
-- return yylen;
--}
--# endif
--# endif
--
--# ifndef yystpcpy
--# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
--# define yystpcpy stpcpy
--# else
--/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
-- YYDEST. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static char *
--yystpcpy (char *yydest, const char *yysrc)
--#else
--static char *
--yystpcpy (yydest, yysrc)
-- char *yydest;
-- const char *yysrc;
--#endif
--{
-- char *yyd = yydest;
-- const char *yys = yysrc;
--
-- while ((*yyd++ = *yys++) != '\0')
-- continue;
--
-- return yyd - 1;
--}
--# endif
--# endif
--
--# ifndef yytnamerr
--/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
-- quotes and backslashes, so that it's suitable for yyerror. The
-- heuristic is that double-quoting is unnecessary unless the string
-- contains an apostrophe, a comma, or backslash (other than
-- backslash-backslash). YYSTR is taken from yytname. If YYRES is
-- null, do not copy; instead, return the length of what the result
-- would have been. */
--static YYSIZE_T
--yytnamerr (char *yyres, const char *yystr)
--{
-- if (*yystr == '"')
-- {
-- YYSIZE_T yyn = 0;
-- char const *yyp = yystr;
--
-- for (;;)
-- switch (*++yyp)
-- {
-- case '\'':
-- case ',':
-- goto do_not_strip_quotes;
--
-- case '\\':
-- if (*++yyp != '\\')
-- goto do_not_strip_quotes;
-- /* Fall through. */
-- default:
-- if (yyres)
-- yyres[yyn] = *yyp;
-- yyn++;
-- break;
--
-- case '"':
-- if (yyres)
-- yyres[yyn] = '\0';
-- return yyn;
-- }
-- do_not_strip_quotes: ;
-- }
--
-- if (! yyres)
-- return yystrlen (yystr);
--
-- return yystpcpy (yyres, yystr) - yyres;
--}
--# endif
--
--/* Copy into YYRESULT an error message about the unexpected token
-- YYCHAR while in state YYSTATE. Return the number of bytes copied,
-- including the terminating null byte. If YYRESULT is null, do not
-- copy anything; just return the number of bytes that would be
-- copied. As a special case, return 0 if an ordinary "syntax error"
-- message will do. Return YYSIZE_MAXIMUM if overflow occurs during
-- size calculation. */
--static YYSIZE_T
--yysyntax_error (char *yyresult, int yystate, int yychar)
--{
-- int yyn = yypact[yystate];
--
-- if (! (YYPACT_NINF < yyn && yyn <= YYLAST))
-- return 0;
-- else
-- {
-- int yytype = YYTRANSLATE (yychar);
-- YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]);
-- YYSIZE_T yysize = yysize0;
-- YYSIZE_T yysize1;
-- int yysize_overflow = 0;
-- enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
-- char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
-- int yyx;
--
--# if 0
-- /* This is so xgettext sees the translatable formats that are
-- constructed on the fly. */
-- YY_("syntax error, unexpected %s");
-- YY_("syntax error, unexpected %s, expecting %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s");
--# endif
-- char *yyfmt;
-- char const *yyf;
-- static char const yyunexpected[] = "syntax error, unexpected %s";
-- static char const yyexpecting[] = ", expecting %s";
-- static char const yyor[] = " or %s";
-- char yyformat[sizeof yyunexpected
-- + sizeof yyexpecting - 1
-- + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2)
-- * (sizeof yyor - 1))];
-- char const *yyprefix = yyexpecting;
--
-- /* Start YYX at -YYN if negative to avoid negative indexes in
-- YYCHECK. */
-- int yyxbegin = yyn < 0 ? -yyn : 0;
--
-- /* Stay within bounds of both yycheck and yytname. */
-- int yychecklim = YYLAST - yyn + 1;
-- int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
-- int yycount = 1;
--
-- yyarg[0] = yytname[yytype];
-- yyfmt = yystpcpy (yyformat, yyunexpected);
--
-- for (yyx = yyxbegin; yyx < yyxend; ++yyx)
-- if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
-- {
-- if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
-- {
-- yycount = 1;
-- yysize = yysize0;
-- yyformat[sizeof yyunexpected - 1] = '\0';
-- break;
-- }
-- yyarg[yycount++] = yytname[yyx];
-- yysize1 = yysize + yytnamerr (0, yytname[yyx]);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
-- yyfmt = yystpcpy (yyfmt, yyprefix);
-- yyprefix = yyor;
-- }
--
-- yyf = YY_(yyformat);
-- yysize1 = yysize + yystrlen (yyf);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
--
-- if (yysize_overflow)
-- return YYSIZE_MAXIMUM;
--
-- if (yyresult)
-- {
-- /* Avoid sprintf, as that infringes on the user's name space.
-- Don't have undefined behavior even if the translation
-- produced a string with the wrong number of "%s"s. */
-- char *yyp = yyresult;
-- int yyi = 0;
-- while ((*yyp = *yyf) != '\0')
-- {
-- if (*yyp == '%' && yyf[1] == 's' && yyi < yycount)
-- {
-- yyp += yytnamerr (yyp, yyarg[yyi++]);
-- yyf += 2;
-- }
-- else
-- {
-- yyp++;
-- yyf++;
-- }
-- }
-- }
-- return yysize;
-- }
--}
--#endif /* YYERROR_VERBOSE */
--
--
--/*-----------------------------------------------.
--| Release the memory associated to this symbol. |
--`-----------------------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep)
--#else
--static void
--yydestruct (yymsg, yytype, yyvaluep)
-- const char *yymsg;
-- int yytype;
-- YYSTYPE *yyvaluep;
--#endif
--{
-- YYUSE (yyvaluep);
--
-- if (!yymsg)
-- yymsg = "Deleting";
-- YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
--
-- switch (yytype)
-- {
--
-- default:
-- break;
-- }
--}
--
--
--/* Prevent warnings from -Wmissing-prototypes. */
--
--#ifdef YYPARSE_PARAM
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void *YYPARSE_PARAM);
--#else
--int yyparse ();
--#endif
--#else /* ! YYPARSE_PARAM */
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void);
--#else
--int yyparse ();
--#endif
--#endif /* ! YYPARSE_PARAM */
--
--
--
--/* The look-ahead symbol. */
--int yychar;
--
--/* The semantic value of the look-ahead symbol. */
--YYSTYPE yylval;
--
--/* Number of syntax errors so far. */
--int yynerrs;
--
--
--
--/*----------.
--| yyparse. |
--`----------*/
--
--#ifdef YYPARSE_PARAM
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void *YYPARSE_PARAM)
--#else
--int
--yyparse (YYPARSE_PARAM)
-- void *YYPARSE_PARAM;
--#endif
--#else /* ! YYPARSE_PARAM */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void)
--#else
--int
--yyparse ()
--
--#endif
--#endif
--{
--
-- int yystate;
-- int yyn;
-- int yyresult;
-- /* Number of tokens to shift before error messages enabled. */
-- int yyerrstatus;
-- /* Look-ahead token as an internal (translated) token number. */
-- int yytoken = 0;
--#if YYERROR_VERBOSE
-- /* Buffer for error messages, and its allocated size. */
-- char yymsgbuf[128];
-- char *yymsg = yymsgbuf;
-- YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
--#endif
--
-- /* Three stacks and their tools:
-- `yyss': related to states,
-- `yyvs': related to semantic values,
-- `yyls': related to locations.
--
-- Refer to the stacks thru separate pointers, to allow yyoverflow
-- to reallocate them elsewhere. */
--
-- /* The state stack. */
-- yytype_int16 yyssa[YYINITDEPTH];
-- yytype_int16 *yyss = yyssa;
-- yytype_int16 *yyssp;
--
-- /* The semantic value stack. */
-- YYSTYPE yyvsa[YYINITDEPTH];
-- YYSTYPE *yyvs = yyvsa;
-- YYSTYPE *yyvsp;
--
--
--
--#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N))
--
-- YYSIZE_T yystacksize = YYINITDEPTH;
--
-- /* The variables used to return semantic value and location from the
-- action routines. */
-- YYSTYPE yyval;
--
--
-- /* The number of symbols on the RHS of the reduced rule.
-- Keep to zero when no symbol should be popped. */
-- int yylen = 0;
--
-- YYDPRINTF ((stderr, "Starting parse\n"));
--
-- yystate = 0;
-- yyerrstatus = 0;
-- yynerrs = 0;
-- yychar = YYEMPTY; /* Cause a token to be read. */
--
-- /* Initialize stack pointers.
-- Waste one element of value and location stack
-- so that they stay on the same level as the state stack.
-- The wasted elements are never initialized. */
--
-- yyssp = yyss;
-- yyvsp = yyvs;
--
-- goto yysetstate;
--
--/*------------------------------------------------------------.
--| yynewstate -- Push a new state, which is found in yystate. |
--`------------------------------------------------------------*/
-- yynewstate:
-- /* In all cases, when you get here, the value and location stacks
-- have just been pushed. So pushing a state here evens the stacks. */
-- yyssp++;
--
-- yysetstate:
-- *yyssp = yystate;
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- {
-- /* Get the current used size of the three stacks, in elements. */
-- YYSIZE_T yysize = yyssp - yyss + 1;
--
--#ifdef yyoverflow
-- {
-- /* Give user a chance to reallocate the stack. Use copies of
-- these so that the &'s don't force the real ones into
-- memory. */
-- YYSTYPE *yyvs1 = yyvs;
-- yytype_int16 *yyss1 = yyss;
--
--
-- /* Each stack pointer address is followed by the size of the
-- data in use in that stack, in bytes. This used to be a
-- conditional around just the two extra args, but that might
-- be undefined if yyoverflow is a macro. */
-- yyoverflow (YY_("memory exhausted"),
-- &yyss1, yysize * sizeof (*yyssp),
-- &yyvs1, yysize * sizeof (*yyvsp),
--
-- &yystacksize);
--
-- yyss = yyss1;
-- yyvs = yyvs1;
-- }
--#else /* no yyoverflow */
--# ifndef YYSTACK_RELOCATE
-- goto yyexhaustedlab;
--# else
-- /* Extend the stack our own way. */
-- if (YYMAXDEPTH <= yystacksize)
-- goto yyexhaustedlab;
-- yystacksize *= 2;
-- if (YYMAXDEPTH < yystacksize)
-- yystacksize = YYMAXDEPTH;
--
-- {
-- yytype_int16 *yyss1 = yyss;
-- union yyalloc *yyptr =
-- (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
-- if (! yyptr)
-- goto yyexhaustedlab;
-- YYSTACK_RELOCATE (yyss);
-- YYSTACK_RELOCATE (yyvs);
--
--# undef YYSTACK_RELOCATE
-- if (yyss1 != yyssa)
-- YYSTACK_FREE (yyss1);
-- }
--# endif
--#endif /* no yyoverflow */
--
-- yyssp = yyss + yysize - 1;
-- yyvsp = yyvs + yysize - 1;
--
--
-- YYDPRINTF ((stderr, "Stack size increased to %lu\n",
-- (unsigned long int) yystacksize));
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- YYABORT;
-- }
--
-- YYDPRINTF ((stderr, "Entering state %d\n", yystate));
--
-- goto yybackup;
--
--/*-----------.
--| yybackup. |
--`-----------*/
--yybackup:
--
-- /* Do appropriate processing given the current state. Read a
-- look-ahead token if we need one and don't already have one. */
--
-- /* First try to decide what to do without reference to look-ahead token. */
-- yyn = yypact[yystate];
-- if (yyn == YYPACT_NINF)
-- goto yydefault;
--
-- /* Not known => get a look-ahead token if don't already have one. */
--
-- /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */
-- if (yychar == YYEMPTY)
-- {
-- YYDPRINTF ((stderr, "Reading a token: "));
-- yychar = YYLEX;
-- }
--
-- if (yychar <= YYEOF)
-- {
-- yychar = yytoken = YYEOF;
-- YYDPRINTF ((stderr, "Now at end of input.\n"));
-- }
-- else
-- {
-- yytoken = YYTRANSLATE (yychar);
-- YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
-- }
--
-- /* If the proper action on seeing token YYTOKEN is to reduce or to
-- detect an error, take that action. */
-- yyn += yytoken;
-- if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
-- goto yydefault;
-- yyn = yytable[yyn];
-- if (yyn <= 0)
-- {
-- if (yyn == 0 || yyn == YYTABLE_NINF)
-- goto yyerrlab;
-- yyn = -yyn;
-- goto yyreduce;
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- /* Count tokens shifted since error; after three, turn off error
-- status. */
-- if (yyerrstatus)
-- yyerrstatus--;
--
-- /* Shift the look-ahead token. */
-- YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
--
-- /* Discard the shifted token unless it is eof. */
-- if (yychar != YYEOF)
-- yychar = YYEMPTY;
--
-- yystate = yyn;
-- *++yyvsp = yylval;
--
-- goto yynewstate;
--
--
--/*-----------------------------------------------------------.
--| yydefault -- do the default action for the current state. |
--`-----------------------------------------------------------*/
--yydefault:
-- yyn = yydefact[yystate];
-- if (yyn == 0)
-- goto yyerrlab;
-- goto yyreduce;
--
--
--/*-----------------------------.
--| yyreduce -- Do a reduction. |
--`-----------------------------*/
--yyreduce:
-- /* yyn is the number of a rule to reduce with. */
-- yylen = yyr2[yyn];
--
-- /* If YYLEN is nonzero, implement the default value of the action:
-- `$$ = $1'.
--
-- Otherwise, the following line sets YYVAL to garbage.
-- This behavior is undocumented and Bison
-- users should not rely upon it. Assigning to YYVAL
-- unconditionally makes the parser a bit smaller, and it avoids a
-- GCC warning that YYVAL may be used uninitialized. */
-- yyval = yyvsp[1-yylen];
--
--
-- YY_REDUCE_PRINT (yyn);
-- switch (yyn)
-- {
-- case 18:
--#line 202 "rcparse.y"
-- {
-- define_accelerator ((yyvsp[(1) - (6)].id), &(yyvsp[(3) - (6)].res_info), (yyvsp[(5) - (6)].pacc));
-- if (yychar != YYEMPTY)
-- YYERROR;
-- rcparse_discard_strings ();
-- }
-- break;
--
-- case 19:
--#line 212 "rcparse.y"
-- {
-- (yyval.pacc) = NULL;
-- }
-- break;
--
-- case 20:
--#line 216 "rcparse.y"
-- {
-- rc_accelerator *a;
--
-- a = (rc_accelerator *) res_alloc (sizeof *a);
-- *a = (yyvsp[(2) - (2)].acc);
-- if ((yyvsp[(1) - (2)].pacc) == NULL)
-- (yyval.pacc) = a;
-- else
-- {
-- rc_accelerator **pp;
--
-- for (pp = &(yyvsp[(1) - (2)].pacc)->next; *pp != NULL; pp = &(*pp)->next)
-- ;
-- *pp = a;
-- (yyval.pacc) = (yyvsp[(1) - (2)].pacc);
-- }
-- }
-- break;
--
-- case 21:
--#line 237 "rcparse.y"
-- {
-- (yyval.acc) = (yyvsp[(1) - (2)].acc);
-- (yyval.acc).id = (yyvsp[(2) - (2)].il);
-- }
-- break;
--
-- case 22:
--#line 242 "rcparse.y"
-- {
-- (yyval.acc) = (yyvsp[(1) - (4)].acc);
-- (yyval.acc).id = (yyvsp[(2) - (4)].il);
-- (yyval.acc).flags |= (yyvsp[(4) - (4)].is);
-- if (((yyval.acc).flags & ACC_VIRTKEY) == 0
-- && ((yyval.acc).flags & (ACC_SHIFT | ACC_CONTROL)) != 0)
-- rcparse_warning (_("inappropriate modifiers for non-VIRTKEY"));
-- }
-- break;
--
-- case 23:
--#line 254 "rcparse.y"
-- {
-- const char *s = (yyvsp[(1) - (1)].s);
-- char ch;
--
-- (yyval.acc).next = NULL;
-- (yyval.acc).id = 0;
-- ch = *s;
-- if (ch != '^')
-- (yyval.acc).flags = 0;
-- else
-- {
-- (yyval.acc).flags = ACC_CONTROL | ACC_VIRTKEY;
-- ++s;
-- ch = TOUPPER (s[0]);
-- }
-- (yyval.acc).key = ch;
-- if (s[1] != '\0')
-- rcparse_warning (_("accelerator should only be one character"));
-- }
-- break;
--
-- case 24:
--#line 274 "rcparse.y"
-- {
-- (yyval.acc).next = NULL;
-- (yyval.acc).flags = 0;
-- (yyval.acc).id = 0;
-- (yyval.acc).key = (yyvsp[(1) - (1)].il);
-- }
-- break;
--
-- case 25:
--#line 284 "rcparse.y"
-- {
-- (yyval.is) = (yyvsp[(1) - (1)].is);
-- }
-- break;
--
-- case 26:
--#line 288 "rcparse.y"
-- {
-- (yyval.is) = (yyvsp[(1) - (3)].is) | (yyvsp[(3) - (3)].is);
-- }
-- break;
--
-- case 27:
--#line 293 "rcparse.y"
-- {
-- (yyval.is) = (yyvsp[(1) - (2)].is) | (yyvsp[(2) - (2)].is);
-- }
-- break;
--
-- case 28:
--#line 300 "rcparse.y"
-- {
-- (yyval.is) = ACC_VIRTKEY;
-- }
-- break;
--
-- case 29:
--#line 304 "rcparse.y"
-- {
-- /* This is just the absence of VIRTKEY. */
-- (yyval.is) = 0;
-- }
-- break;
--
-- case 30:
--#line 309 "rcparse.y"
-- {
-- (yyval.is) = ACC_NOINVERT;
-- }
-- break;
--
-- case 31:
--#line 313 "rcparse.y"
-- {
-- (yyval.is) = ACC_SHIFT;
-- }
-- break;
--
-- case 32:
--#line 317 "rcparse.y"
-- {
-- (yyval.is) = ACC_CONTROL;
-- }
-- break;
--
-- case 33:
--#line 321 "rcparse.y"
-- {
-- (yyval.is) = ACC_ALT;
-- }
-- break;
--
-- case 34:
--#line 330 "rcparse.y"
-- {
-- define_bitmap ((yyvsp[(1) - (4)].id), &(yyvsp[(3) - (4)].res_info), (yyvsp[(4) - (4)].s));
-- if (yychar != YYEMPTY)
-- YYERROR;
-- rcparse_discard_strings ();
-- }
-- break;
--
-- case 35:
--#line 342 "rcparse.y"
-- {
-- define_cursor ((yyvsp[(1) - (4)].id), &(yyvsp[(3) - (4)].res_info), (yyvsp[(4) - (4)].s));
-- if (yychar != YYEMPTY)
-- YYERROR;
-- rcparse_discard_strings ();
-- }
-- break;
--
-- case 36:
--#line 355 "rcparse.y"
-- {
-- memset (&dialog, 0, sizeof dialog);
-- dialog.x = (yyvsp[(5) - (8)].il);
-- dialog.y = (yyvsp[(6) - (8)].il);
-- dialog.width = (yyvsp[(7) - (8)].il);
-- dialog.height = (yyvsp[(8) - (8)].il);
-- dialog.style = WS_POPUP | WS_BORDER | WS_SYSMENU;
-- dialog.exstyle = (yyvsp[(4) - (8)].il);
-- dialog.menu.named = 1;
-- dialog.class.named = 1;
-- dialog.font = NULL;
-- dialog.ex = NULL;
-- dialog.controls = NULL;
-- sub_res_info = (yyvsp[(3) - (8)].res_info);
-- style = 0;
-- }
-- break;
--
-- case 37:
--#line 372 "rcparse.y"
-- {
-- define_dialog ((yyvsp[(1) - (13)].id), &sub_res_info, &dialog);
-- if (yychar != YYEMPTY)
-- YYERROR;
-- rcparse_discard_strings ();
-- }
-- break;
--
-- case 38:
--#line 380 "rcparse.y"
-- {
-- memset (&dialog, 0, sizeof dialog);
-- dialog.x = (yyvsp[(5) - (8)].il);
-- dialog.y = (yyvsp[(6) - (8)].il);
-- dialog.width = (yyvsp[(7) - (8)].il);
-- dialog.height = (yyvsp[(8) - (8)].il);
-- dialog.style = WS_POPUP | WS_BORDER | WS_SYSMENU;
-- dialog.exstyle = (yyvsp[(4) - (8)].il);
-- dialog.menu.named = 1;
-- dialog.class.named = 1;
-- dialog.font = NULL;
-- dialog.ex = ((rc_dialog_ex *)
-- res_alloc (sizeof (rc_dialog_ex)));
-- memset (dialog.ex, 0, sizeof (rc_dialog_ex));
-- dialog.controls = NULL;
-- sub_res_info = (yyvsp[(3) - (8)].res_info);
-- style = 0;
-- }
-- break;
--
-- case 39:
--#line 399 "rcparse.y"
-- {
-- define_dialog ((yyvsp[(1) - (13)].id), &sub_res_info, &dialog);
-- if (yychar != YYEMPTY)
-- YYERROR;
-- rcparse_discard_strings ();
-- }
-- break;
--
-- case 40:
--#line 407 "rcparse.y"
-- {
-- memset (&dialog, 0, sizeof dialog);
-- dialog.x = (yyvsp[(5) - (9)].il);
-- dialog.y = (yyvsp[(6) - (9)].il);
-- dialog.width = (yyvsp[(7) - (9)].il);
-- dialog.height = (yyvsp[(8) - (9)].il);
-- dialog.style = WS_POPUP | WS_BORDER | WS_SYSMENU;
-- dialog.exstyle = (yyvsp[(4) - (9)].il);
-- dialog.menu.named = 1;
-- dialog.class.named = 1;
-- dialog.font = NULL;
-- dialog.ex = ((rc_dialog_ex *)
-- res_alloc (sizeof (rc_dialog_ex)));
-- memset (dialog.ex, 0, sizeof (rc_dialog_ex));
-- dialog.ex->help = (yyvsp[(9) - (9)].il);
-- dialog.controls = NULL;
-- sub_res_info = (yyvsp[(3) - (9)].res_info);
-- style = 0;
-- }
-- break;
--
-- case 41:
--#line 427 "rcparse.y"
-- {
-- define_dialog ((yyvsp[(1) - (14)].id), &sub_res_info, &dialog);
-- if (yychar != YYEMPTY)
-- YYERROR;
-- rcparse_discard_strings ();
-- }
-- break;
--
-- case 42:
--#line 437 "rcparse.y"
-- {
-- (yyval.il) = 0;
-- }
-- break;
--
-- case 43:
--#line 441 "rcparse.y"
-- {
-- (yyval.il) = (yyvsp[(3) - (3)].il);
-- }
-- break;
--
-- case 45:
--#line 449 "rcparse.y"
-- {
-- dialog.style |= WS_CAPTION;
-- style |= WS_CAPTION;
-- dialog.caption = (yyvsp[(3) - (3)].uni);
-- }
-- break;
--
-- case 46:
--#line 455 "rcparse.y"
-- {
-- dialog.class = (yyvsp[(3) - (3)].id);
-- }
-- break;
--
-- case 47:
--#line 460 "rcparse.y"
-- {
-- dialog.style = style;
-- }
-- break;
--
-- case 48:
--#line 464 "rcparse.y"
-- {
-- dialog.exstyle = (yyvsp[(3) - (3)].il);
-- }
-- break;
--
-- case 49:
--#line 468 "rcparse.y"
-- {
-- res_unistring_to_id (& dialog.class, (yyvsp[(3) - (3)].uni));
-- }
-- break;
--
-- case 50:
--#line 472 "rcparse.y"
-- {
-- dialog.style |= DS_SETFONT;
-- style |= DS_SETFONT;
-- dialog.pointsize = (yyvsp[(3) - (5)].il);
-- dialog.font = (yyvsp[(5) - (5)].uni);
-- if (dialog.ex != NULL)
-- {
-- dialog.ex->weight = 0;
-- dialog.ex->italic = 0;
-- dialog.ex->charset = 1;
-- }
-- }
-- break;
--
-- case 51:
--#line 485 "rcparse.y"
-- {
-- dialog.style |= DS_SETFONT;
-- style |= DS_SETFONT;
-- dialog.pointsize = (yyvsp[(3) - (6)].il);
-- dialog.font = (yyvsp[(5) - (6)].uni);
-- if (dialog.ex == NULL)
-- rcparse_warning (_("extended FONT requires DIALOGEX"));
-- else
-- {
-- dialog.ex->weight = (yyvsp[(6) - (6)].il);
-- dialog.ex->italic = 0;
-- dialog.ex->charset = 1;
-- }
-- }
-- break;
--
-- case 52:
--#line 500 "rcparse.y"
-- {
-- dialog.style |= DS_SETFONT;
-- style |= DS_SETFONT;
-- dialog.pointsize = (yyvsp[(3) - (7)].il);
-- dialog.font = (yyvsp[(5) - (7)].uni);
-- if (dialog.ex == NULL)
-- rcparse_warning (_("extended FONT requires DIALOGEX"));
-- else
-- {
-- dialog.ex->weight = (yyvsp[(6) - (7)].il);
-- dialog.ex->italic = (yyvsp[(7) - (7)].il);
-- dialog.ex->charset = 1;
-- }
-- }
-- break;
--
-- case 53:
--#line 515 "rcparse.y"
-- {
-- dialog.style |= DS_SETFONT;
-- style |= DS_SETFONT;
-- dialog.pointsize = (yyvsp[(3) - (8)].il);
-- dialog.font = (yyvsp[(5) - (8)].uni);
-- if (dialog.ex == NULL)
-- rcparse_warning (_("extended FONT requires DIALOGEX"));
-- else
-- {
-- dialog.ex->weight = (yyvsp[(6) - (8)].il);
-- dialog.ex->italic = (yyvsp[(7) - (8)].il);
-- dialog.ex->charset = (yyvsp[(8) - (8)].il);
-- }
-- }
-- break;
--
-- case 54:
--#line 530 "rcparse.y"
-- {
-- dialog.menu = (yyvsp[(3) - (3)].id);
-- }
-- break;
--
-- case 55:
--#line 534 "rcparse.y"
-- {
-- sub_res_info.characteristics = (yyvsp[(3) - (3)].il);
-- }
-- break;
--
-- case 56:
--#line 538 "rcparse.y"
-- {
-- sub_res_info.language = (yyvsp[(3) - (4)].il) | ((yyvsp[(4) - (4)].il) << SUBLANG_SHIFT);
-- }
-- break;
--
-- case 57:
--#line 542 "rcparse.y"
-- {
-- sub_res_info.version = (yyvsp[(3) - (3)].il);
-- }
-- break;
--
-- case 59:
--#line 550 "rcparse.y"
-- {
-- rc_dialog_control **pp;
--
-- for (pp = &dialog.controls; *pp != NULL; pp = &(*pp)->next)
-- ;
-- *pp = (yyvsp[(2) - (2)].dialog_control);
-- }
-- break;
--
-- case 60:
--#line 561 "rcparse.y"
-- {
-- default_style = BS_AUTO3STATE | WS_TABSTOP;
-- base_style = BS_AUTO3STATE;
-- class.named = 0;
-- class.u.id = CTL_BUTTON;
-- res_text_field = (yyvsp[(2) - (2)].id);
-- }
-- break;
--
-- case 61:
--#line 569 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control);
-- }
-- break;
--
-- case 62:
--#line 573 "rcparse.y"
-- {
-- default_style = BS_AUTOCHECKBOX | WS_TABSTOP;
-- base_style = BS_AUTOCHECKBOX;
-- class.named = 0;
-- class.u.id = CTL_BUTTON;
-- res_text_field = (yyvsp[(2) - (2)].id);
-- }
-- break;
--
-- case 63:
--#line 581 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control);
-- }
-- break;
--
-- case 64:
--#line 585 "rcparse.y"
-- {
-- default_style = BS_AUTORADIOBUTTON | WS_TABSTOP;
-- base_style = BS_AUTORADIOBUTTON;
-- class.named = 0;
-- class.u.id = CTL_BUTTON;
-- res_text_field = (yyvsp[(2) - (2)].id);
-- }
-- break;
--
-- case 65:
--#line 593 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control);
-- }
-- break;
--
-- case 66:
--#line 597 "rcparse.y"
-- {
-- default_style = ES_LEFT | WS_BORDER | WS_TABSTOP;
-- base_style = ES_LEFT | WS_BORDER | WS_TABSTOP;
-- class.named = 0;
-- class.u.id = CTL_EDIT;
-- res_text_field = (yyvsp[(2) - (2)].id);
-- }
-- break;
--
-- case 67:
--#line 605 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control);
-- if (dialog.ex == NULL)
-- rcparse_warning (_("BEDIT requires DIALOGEX"));
-- res_string_to_id (&(yyval.dialog_control)->class, "BEDIT");
-- }
-- break;
--
-- case 68:
--#line 612 "rcparse.y"
-- {
-- default_style = BS_CHECKBOX | WS_TABSTOP;
-- base_style = BS_CHECKBOX | WS_TABSTOP;
-- class.named = 0;
-- class.u.id = CTL_BUTTON;
-- res_text_field = (yyvsp[(2) - (2)].id);
-- }
-- break;
--
-- case 69:
--#line 620 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control);
-- }
-- break;
--
-- case 70:
--#line 624 "rcparse.y"
-- {
-- /* This is as per MSDN documentation. With some (???)
-- versions of MS rc.exe their is no default style. */
-- default_style = CBS_SIMPLE | WS_TABSTOP;
-- base_style = 0;
-- class.named = 0;
-- class.u.id = CTL_COMBOBOX;
-- res_text_field = res_null_text;
-- }
-- break;
--
-- case 71:
--#line 634 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(3) - (3)].dialog_control);
-- }
-- break;
--
-- case 72:
--#line 639 "rcparse.y"
-- {
-- (yyval.dialog_control) = define_control ((yyvsp[(2) - (11)].id), (yyvsp[(3) - (11)].il), (yyvsp[(6) - (11)].il), (yyvsp[(7) - (11)].il), (yyvsp[(8) - (11)].il), (yyvsp[(9) - (11)].il), (yyvsp[(4) - (11)].id), style, (yyvsp[(10) - (11)].il));
-- if ((yyvsp[(11) - (11)].rcdata_item) != NULL)
-- {
-- if (dialog.ex == NULL)
-- rcparse_warning (_("control data requires DIALOGEX"));
-- (yyval.dialog_control)->data = (yyvsp[(11) - (11)].rcdata_item);
-- }
-- }
-- break;
--
-- case 73:
--#line 650 "rcparse.y"
-- {
-- (yyval.dialog_control) = define_control ((yyvsp[(2) - (12)].id), (yyvsp[(3) - (12)].il), (yyvsp[(6) - (12)].il), (yyvsp[(7) - (12)].il), (yyvsp[(8) - (12)].il), (yyvsp[(9) - (12)].il), (yyvsp[(4) - (12)].id), style, (yyvsp[(10) - (12)].il));
-- if (dialog.ex == NULL)
-- rcparse_warning (_("help ID requires DIALOGEX"));
-- (yyval.dialog_control)->help = (yyvsp[(11) - (12)].il);
-- (yyval.dialog_control)->data = (yyvsp[(12) - (12)].rcdata_item);
-- }
-- break;
--
-- case 74:
--#line 658 "rcparse.y"
-- {
-- default_style = SS_CENTER | WS_GROUP;
-- base_style = SS_CENTER;
-- class.named = 0;
-- class.u.id = CTL_STATIC;
-- res_text_field = (yyvsp[(2) - (2)].id);
-- }
-- break;
--
-- case 75:
--#line 666 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control);
-- }
-- break;
--
-- case 76:
--#line 670 "rcparse.y"
-- {
-- default_style = BS_DEFPUSHBUTTON | WS_TABSTOP;
-- base_style = BS_DEFPUSHBUTTON | WS_TABSTOP;
-- class.named = 0;
-- class.u.id = CTL_BUTTON;
-- res_text_field = (yyvsp[(2) - (2)].id);
-- }
-- break;
--
-- case 77:
--#line 678 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control);
-- }
-- break;
--
-- case 78:
--#line 682 "rcparse.y"
-- {
-- default_style = ES_LEFT | WS_BORDER | WS_TABSTOP;
-- base_style = ES_LEFT | WS_BORDER | WS_TABSTOP;
-- class.named = 0;
-- class.u.id = CTL_EDIT;
-- res_text_field = res_null_text;
-- }
-- break;
--
-- case 79:
--#line 690 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(3) - (3)].dialog_control);
-- }
-- break;
--
-- case 80:
--#line 694 "rcparse.y"
-- {
-- default_style = BS_GROUPBOX;
-- base_style = BS_GROUPBOX;
-- class.named = 0;
-- class.u.id = CTL_BUTTON;
-- res_text_field = (yyvsp[(2) - (2)].id);
-- }
-- break;
--
-- case 81:
--#line 702 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control);
-- }
-- break;
--
-- case 82:
--#line 706 "rcparse.y"
-- {
-- default_style = ES_LEFT | WS_BORDER | WS_TABSTOP;
-- base_style = ES_LEFT | WS_BORDER | WS_TABSTOP;
-- class.named = 0;
-- class.u.id = CTL_EDIT;
-- res_text_field = (yyvsp[(2) - (2)].id);
-- }
-- break;
--
-- case 83:
--#line 714 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control);
-- if (dialog.ex == NULL)
-- rcparse_warning (_("IEDIT requires DIALOGEX"));
-- res_string_to_id (&(yyval.dialog_control)->class, "HEDIT");
-- }
-- break;
--
-- case 84:
--#line 721 "rcparse.y"
-- {
-- (yyval.dialog_control) = define_icon_control ((yyvsp[(2) - (6)].id), (yyvsp[(3) - (6)].il), (yyvsp[(4) - (6)].il), (yyvsp[(5) - (6)].il), 0, 0, 0, (yyvsp[(6) - (6)].rcdata_item),
-- dialog.ex);
-- }
-- break;
--
-- case 85:
--#line 727 "rcparse.y"
-- {
-- (yyval.dialog_control) = define_icon_control ((yyvsp[(2) - (8)].id), (yyvsp[(3) - (8)].il), (yyvsp[(4) - (8)].il), (yyvsp[(5) - (8)].il), 0, 0, 0, (yyvsp[(8) - (8)].rcdata_item),
-- dialog.ex);
-- }
-- break;
--
-- case 86:
--#line 733 "rcparse.y"
-- {
-- (yyval.dialog_control) = define_icon_control ((yyvsp[(2) - (10)].id), (yyvsp[(3) - (10)].il), (yyvsp[(4) - (10)].il), (yyvsp[(5) - (10)].il), style, (yyvsp[(9) - (10)].il), 0, (yyvsp[(10) - (10)].rcdata_item),
-- dialog.ex);
-- }
-- break;
--
-- case 87:
--#line 739 "rcparse.y"
-- {
-- (yyval.dialog_control) = define_icon_control ((yyvsp[(2) - (11)].id), (yyvsp[(3) - (11)].il), (yyvsp[(4) - (11)].il), (yyvsp[(5) - (11)].il), style, (yyvsp[(9) - (11)].il), (yyvsp[(10) - (11)].il), (yyvsp[(11) - (11)].rcdata_item),
-- dialog.ex);
-- }
-- break;
--
-- case 88:
--#line 744 "rcparse.y"
-- {
-- default_style = ES_LEFT | WS_BORDER | WS_TABSTOP;
-- base_style = ES_LEFT | WS_BORDER | WS_TABSTOP;
-- class.named = 0;
-- class.u.id = CTL_EDIT;
-- res_text_field = (yyvsp[(2) - (2)].id);
-- }
-- break;
--
-- case 89:
--#line 752 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control);
-- if (dialog.ex == NULL)
-- rcparse_warning (_("IEDIT requires DIALOGEX"));
-- res_string_to_id (&(yyval.dialog_control)->class, "IEDIT");
-- }
-- break;
--
-- case 90:
--#line 759 "rcparse.y"
-- {
-- default_style = LBS_NOTIFY | WS_BORDER;
-- base_style = LBS_NOTIFY | WS_BORDER;
-- class.named = 0;
-- class.u.id = CTL_LISTBOX;
-- res_text_field = res_null_text;
-- }
-- break;
--
-- case 91:
--#line 767 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(3) - (3)].dialog_control);
-- }
-- break;
--
-- case 92:
--#line 771 "rcparse.y"
-- {
-- default_style = SS_LEFT | WS_GROUP;
-- base_style = SS_LEFT;
-- class.named = 0;
-- class.u.id = CTL_STATIC;
-- res_text_field = (yyvsp[(2) - (2)].id);
-- }
-- break;
--
-- case 93:
--#line 779 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control);
-- }
-- break;
--
-- case 94:
--#line 783 "rcparse.y"
-- {
-- default_style = BS_PUSHBOX | WS_TABSTOP;
-- base_style = BS_PUSHBOX;
-- class.named = 0;
-- class.u.id = CTL_BUTTON;
-- }
-- break;
--
-- case 95:
--#line 790 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control);
-- }
-- break;
--
-- case 96:
--#line 794 "rcparse.y"
-- {
-- default_style = BS_PUSHBUTTON | WS_TABSTOP;
-- base_style = BS_PUSHBUTTON | WS_TABSTOP;
-- class.named = 0;
-- class.u.id = CTL_BUTTON;
-- res_text_field = (yyvsp[(2) - (2)].id);
-- }
-- break;
--
-- case 97:
--#line 802 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control);
-- }
-- break;
--
-- case 98:
--#line 806 "rcparse.y"
-- {
-- default_style = BS_RADIOBUTTON | WS_TABSTOP;
-- base_style = BS_RADIOBUTTON;
-- class.named = 0;
-- class.u.id = CTL_BUTTON;
-- res_text_field = (yyvsp[(2) - (2)].id);
-- }
-- break;
--
-- case 99:
--#line 814 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control);
-- }
-- break;
--
-- case 100:
--#line 818 "rcparse.y"
-- {
-- default_style = SS_RIGHT | WS_GROUP;
-- base_style = SS_RIGHT;
-- class.named = 0;
-- class.u.id = CTL_STATIC;
-- res_text_field = (yyvsp[(2) - (2)].id);
-- }
-- break;
--
-- case 101:
--#line 826 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control);
-- }
-- break;
--
-- case 102:
--#line 830 "rcparse.y"
-- {
-- default_style = SBS_HORZ;
-- base_style = 0;
-- class.named = 0;
-- class.u.id = CTL_SCROLLBAR;
-- res_text_field = res_null_text;
-- }
-- break;
--
-- case 103:
--#line 838 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(3) - (3)].dialog_control);
-- }
-- break;
--
-- case 104:
--#line 842 "rcparse.y"
-- {
-- default_style = BS_3STATE | WS_TABSTOP;
-- base_style = BS_3STATE;
-- class.named = 0;
-- class.u.id = CTL_BUTTON;
-- res_text_field = (yyvsp[(2) - (2)].id);
-- }
-- break;
--
-- case 105:
--#line 850 "rcparse.y"
-- {
-- (yyval.dialog_control) = (yyvsp[(4) - (4)].dialog_control);
-- }
-- break;
--
-- case 106:
--#line 855 "rcparse.y"
-- { style = WS_CHILD | WS_VISIBLE; }
-- break;
--
-- case 107:
--#line 857 "rcparse.y"
-- {
-- rc_res_id cid;
-- cid.named = 0;
-- cid.u.id = CTL_BUTTON;
-- (yyval.dialog_control) = define_control ((yyvsp[(2) - (15)].id), (yyvsp[(3) - (15)].il), (yyvsp[(5) - (15)].il), (yyvsp[(7) - (15)].il), (yyvsp[(9) - (15)].il), (yyvsp[(11) - (15)].il), cid,
-- style, (yyvsp[(15) - (15)].il));
-- }
-- break;
--
-- case 108:
--#line 875 "rcparse.y"
-- {
-- (yyval.dialog_control) = define_control (res_text_field, (yyvsp[(1) - (6)].il), (yyvsp[(2) - (6)].il), (yyvsp[(3) - (6)].il), (yyvsp[(4) - (6)].il), (yyvsp[(5) - (6)].il), class,
-- default_style | WS_CHILD | WS_VISIBLE, 0);
-- if ((yyvsp[(6) - (6)].rcdata_item) != NULL)
-- {
-- if (dialog.ex == NULL)
-- rcparse_warning (_("control data requires DIALOGEX"));
-- (yyval.dialog_control)->data = (yyvsp[(6) - (6)].rcdata_item);
-- }
-- }
-- break;
--
-- case 109:
--#line 887 "rcparse.y"
-- {
-- (yyval.dialog_control) = define_control (res_text_field, (yyvsp[(1) - (8)].il), (yyvsp[(2) - (8)].il), (yyvsp[(3) - (8)].il), (yyvsp[(4) - (8)].il), (yyvsp[(5) - (8)].il), class, style, (yyvsp[(7) - (8)].il));
-- if ((yyvsp[(8) - (8)].rcdata_item) != NULL)
-- {
-- if (dialog.ex == NULL)
-- rcparse_warning (_("control data requires DIALOGEX"));
-- (yyval.dialog_control)->data = (yyvsp[(8) - (8)].rcdata_item);
-- }
-- }
-- break;
--
-- case 110:
--#line 898 "rcparse.y"
-- {
-- (yyval.dialog_control) = define_control (res_text_field, (yyvsp[(1) - (9)].il), (yyvsp[(2) - (9)].il), (yyvsp[(3) - (9)].il), (yyvsp[(4) - (9)].il), (yyvsp[(5) - (9)].il), class, style, (yyvsp[(7) - (9)].il));
-- if (dialog.ex == NULL)
-- rcparse_warning (_("help ID requires DIALOGEX"));
-- (yyval.dialog_control)->help = (yyvsp[(8) - (9)].il);
-- (yyval.dialog_control)->data = (yyvsp[(9) - (9)].rcdata_item);
-- }
-- break;
--
-- case 111:
--#line 909 "rcparse.y"
-- {
-- if ((yyvsp[(2) - (2)].id).named)
-- res_unistring_to_id (&(yyval.id), (yyvsp[(2) - (2)].id).u.n.name);
-- else
-- (yyval.id)=(yyvsp[(2) - (2)].id);
-- }
-- break;
--
-- case 112:
--#line 919 "rcparse.y"
-- {
-- res_string_to_id (&(yyval.id), "");
-- }
-- break;
--
-- case 113:
--#line 922 "rcparse.y"
-- { (yyval.id)=(yyvsp[(1) - (2)].id); }
-- break;
--
-- case 114:
--#line 927 "rcparse.y"
-- {
-- (yyval.id).named = 0;
-- (yyval.id).u.id = (yyvsp[(1) - (1)].il);
-- }
-- break;
--
-- case 115:
--#line 932 "rcparse.y"
-- {
-- (yyval.id).named = 1;
-- (yyval.id).u.n.name = (yyvsp[(1) - (1)].uni);
-- (yyval.id).u.n.length = unichar_len ((yyvsp[(1) - (1)].uni));
-- }
-- break;
--
-- case 116:
--#line 941 "rcparse.y"
-- {
-- (yyval.rcdata_item) = NULL;
-- }
-- break;
--
-- case 117:
--#line 945 "rcparse.y"
-- {
-- (yyval.rcdata_item) = (yyvsp[(2) - (3)].rcdata).first;
-- }
-- break;
--
-- case 118:
--#line 954 "rcparse.y"
-- { style = WS_CHILD | WS_VISIBLE; }
-- break;
--
-- case 120:
--#line 960 "rcparse.y"
-- { style = SS_ICON | WS_CHILD | WS_VISIBLE; }
-- break;
--
-- case 122:
--#line 966 "rcparse.y"
-- { style = base_style | WS_CHILD | WS_VISIBLE; }
-- break;
--
-- case 124:
--#line 974 "rcparse.y"
-- {
-- define_font ((yyvsp[(1) - (4)].id), &(yyvsp[(3) - (4)].res_info), (yyvsp[(4) - (4)].s));
-- if (yychar != YYEMPTY)
-- YYERROR;
-- rcparse_discard_strings ();
-- }
-- break;
--
-- case 125:
--#line 986 "rcparse.y"
-- {
-- define_icon ((yyvsp[(1) - (4)].id), &(yyvsp[(3) - (4)].res_info), (yyvsp[(4) - (4)].s));
-- if (yychar != YYEMPTY)
-- YYERROR;
-- rcparse_discard_strings ();
-- }
-- break;
--
-- case 126:
--#line 999 "rcparse.y"
-- {
-- language = (yyvsp[(2) - (3)].il) | ((yyvsp[(3) - (3)].il) << SUBLANG_SHIFT);
-- }
-- break;
--
-- case 127:
--#line 1008 "rcparse.y"
-- {
-- define_menu ((yyvsp[(1) - (6)].id), &(yyvsp[(3) - (6)].res_info), (yyvsp[(5) - (6)].menuitem));
-- if (yychar != YYEMPTY)
-- YYERROR;
-- rcparse_discard_strings ();
-- }
-- break;
--
-- case 128:
--#line 1018 "rcparse.y"
-- {
-- (yyval.menuitem) = NULL;
-- }
-- break;
--
-- case 129:
--#line 1022 "rcparse.y"
-- {
-- if ((yyvsp[(1) - (2)].menuitem) == NULL)
-- (yyval.menuitem) = (yyvsp[(2) - (2)].menuitem);
-- else
-- {
-- rc_menuitem **pp;
--
-- for (pp = &(yyvsp[(1) - (2)].menuitem)->next; *pp != NULL; pp = &(*pp)->next)
-- ;
-- *pp = (yyvsp[(2) - (2)].menuitem);
-- (yyval.menuitem) = (yyvsp[(1) - (2)].menuitem);
-- }
-- }
-- break;
--
-- case 130:
--#line 1039 "rcparse.y"
-- {
-- (yyval.menuitem) = define_menuitem ((yyvsp[(2) - (4)].uni), (yyvsp[(3) - (4)].il), (yyvsp[(4) - (4)].is), 0, 0, NULL);
-- }
-- break;
--
-- case 131:
--#line 1043 "rcparse.y"
-- {
-- (yyval.menuitem) = define_menuitem (NULL, 0, 0, 0, 0, NULL);
-- }
-- break;
--
-- case 132:
--#line 1047 "rcparse.y"
-- {
-- (yyval.menuitem) = define_menuitem ((yyvsp[(2) - (6)].uni), 0, (yyvsp[(3) - (6)].is), 0, 0, (yyvsp[(5) - (6)].menuitem));
-- }
-- break;
--
-- case 133:
--#line 1054 "rcparse.y"
-- {
-- (yyval.is) = 0;
-- }
-- break;
--
-- case 134:
--#line 1058 "rcparse.y"
-- {
-- (yyval.is) = (yyvsp[(1) - (3)].is) | (yyvsp[(3) - (3)].is);
-- }
-- break;
--
-- case 135:
--#line 1062 "rcparse.y"
-- {
-- (yyval.is) = (yyvsp[(1) - (2)].is) | (yyvsp[(2) - (2)].is);
-- }
-- break;
--
-- case 136:
--#line 1069 "rcparse.y"
-- {
-- (yyval.is) = MENUITEM_CHECKED;
-- }
-- break;
--
-- case 137:
--#line 1073 "rcparse.y"
-- {
-- (yyval.is) = MENUITEM_GRAYED;
-- }
-- break;
--
-- case 138:
--#line 1077 "rcparse.y"
-- {
-- (yyval.is) = MENUITEM_HELP;
-- }
-- break;
--
-- case 139:
--#line 1081 "rcparse.y"
-- {
-- (yyval.is) = MENUITEM_INACTIVE;
-- }
-- break;
--
-- case 140:
--#line 1085 "rcparse.y"
-- {
-- (yyval.is) = MENUITEM_MENUBARBREAK;
-- }
-- break;
--
-- case 141:
--#line 1089 "rcparse.y"
-- {
-- (yyval.is) = MENUITEM_MENUBREAK;
-- }
-- break;
--
-- case 142:
--#line 1098 "rcparse.y"
-- {
-- define_menu ((yyvsp[(1) - (6)].id), &(yyvsp[(3) - (6)].res_info), (yyvsp[(5) - (6)].menuitem));
-- if (yychar != YYEMPTY)
-- YYERROR;
-- rcparse_discard_strings ();
-- }
-- break;
--
-- case 143:
--#line 1108 "rcparse.y"
-- {
-- (yyval.menuitem) = NULL;
-- }
-- break;
--
-- case 144:
--#line 1112 "rcparse.y"
-- {
-- if ((yyvsp[(1) - (2)].menuitem) == NULL)
-- (yyval.menuitem) = (yyvsp[(2) - (2)].menuitem);
-- else
-- {
-- rc_menuitem **pp;
--
-- for (pp = &(yyvsp[(1) - (2)].menuitem)->next; *pp != NULL; pp = &(*pp)->next)
-- ;
-- *pp = (yyvsp[(2) - (2)].menuitem);
-- (yyval.menuitem) = (yyvsp[(1) - (2)].menuitem);
-- }
-- }
-- break;
--
-- case 145:
--#line 1129 "rcparse.y"
-- {
-- (yyval.menuitem) = define_menuitem ((yyvsp[(2) - (2)].uni), 0, 0, 0, 0, NULL);
-- }
-- break;
--
-- case 146:
--#line 1133 "rcparse.y"
-- {
-- (yyval.menuitem) = define_menuitem ((yyvsp[(2) - (3)].uni), (yyvsp[(3) - (3)].il), 0, 0, 0, NULL);
-- }
-- break;
--
-- case 147:
--#line 1137 "rcparse.y"
-- {
-- (yyval.menuitem) = define_menuitem ((yyvsp[(2) - (5)].uni), (yyvsp[(3) - (5)].il), (yyvsp[(4) - (5)].il), (yyvsp[(5) - (5)].il), 0, NULL);
-- }
-- break;
--
-- case 148:
--#line 1141 "rcparse.y"
-- {
-- (yyval.menuitem) = define_menuitem (NULL, 0, 0, 0, 0, NULL);
-- }
-- break;
--
-- case 149:
--#line 1145 "rcparse.y"
-- {
-- (yyval.menuitem) = define_menuitem ((yyvsp[(2) - (5)].uni), 0, 0, 0, 0, (yyvsp[(4) - (5)].menuitem));
-- }
-- break;
--
-- case 150:
--#line 1149 "rcparse.y"
-- {
-- (yyval.menuitem) = define_menuitem ((yyvsp[(2) - (6)].uni), (yyvsp[(3) - (6)].il), 0, 0, 0, (yyvsp[(5) - (6)].menuitem));
-- }
-- break;
--
-- case 151:
--#line 1153 "rcparse.y"
-- {
-- (yyval.menuitem) = define_menuitem ((yyvsp[(2) - (7)].uni), (yyvsp[(3) - (7)].il), (yyvsp[(4) - (7)].il), 0, 0, (yyvsp[(6) - (7)].menuitem));
-- }
-- break;
--
-- case 152:
--#line 1158 "rcparse.y"
-- {
-- (yyval.menuitem) = define_menuitem ((yyvsp[(2) - (9)].uni), (yyvsp[(3) - (9)].il), (yyvsp[(4) - (9)].il), (yyvsp[(5) - (9)].il), (yyvsp[(6) - (9)].il), (yyvsp[(8) - (9)].menuitem));
-- }
-- break;
--
-- case 153:
--#line 1167 "rcparse.y"
-- {
-- define_messagetable ((yyvsp[(1) - (4)].id), &(yyvsp[(3) - (4)].res_info), (yyvsp[(4) - (4)].s));
-- if (yychar != YYEMPTY)
-- YYERROR;
-- rcparse_discard_strings ();
-- }
-- break;
--
-- case 154:
--#line 1179 "rcparse.y"
-- {
-- rcparse_rcdata ();
-- }
-- break;
--
-- case 155:
--#line 1183 "rcparse.y"
-- {
-- rcparse_normal ();
-- (yyval.rcdata) = (yyvsp[(2) - (2)].rcdata);
-- }
-- break;
--
-- case 156:
--#line 1191 "rcparse.y"
-- {
-- (yyval.rcdata).first = NULL;
-- (yyval.rcdata).last = NULL;
-- }
-- break;
--
-- case 157:
--#line 1196 "rcparse.y"
-- {
-- (yyval.rcdata) = (yyvsp[(1) - (1)].rcdata);
-- }
-- break;
--
-- case 158:
--#line 1203 "rcparse.y"
-- {
-- rc_rcdata_item *ri;
--
-- ri = define_rcdata_string ((yyvsp[(1) - (1)].ss).s, (yyvsp[(1) - (1)].ss).length);
-- (yyval.rcdata).first = ri;
-- (yyval.rcdata).last = ri;
-- }
-- break;
--
-- case 159:
--#line 1211 "rcparse.y"
-- {
-- rc_rcdata_item *ri;
--
-- ri = define_rcdata_unistring ((yyvsp[(1) - (1)].suni).s, (yyvsp[(1) - (1)].suni).length);
-- (yyval.rcdata).first = ri;
-- (yyval.rcdata).last = ri;
-- }
-- break;
--
-- case 160:
--#line 1219 "rcparse.y"
-- {
-- rc_rcdata_item *ri;
--
-- ri = define_rcdata_number ((yyvsp[(1) - (1)].i).val, (yyvsp[(1) - (1)].i).dword);
-- (yyval.rcdata).first = ri;
-- (yyval.rcdata).last = ri;
-- }
-- break;
--
-- case 161:
--#line 1227 "rcparse.y"
-- {
-- rc_rcdata_item *ri;
--
-- ri = define_rcdata_string ((yyvsp[(3) - (3)].ss).s, (yyvsp[(3) - (3)].ss).length);
-- (yyval.rcdata).first = (yyvsp[(1) - (3)].rcdata).first;
-- (yyvsp[(1) - (3)].rcdata).last->next = ri;
-- (yyval.rcdata).last = ri;
-- }
-- break;
--
-- case 162:
--#line 1236 "rcparse.y"
-- {
-- rc_rcdata_item *ri;
--
-- ri = define_rcdata_unistring ((yyvsp[(3) - (3)].suni).s, (yyvsp[(3) - (3)].suni).length);
-- (yyval.rcdata).first = (yyvsp[(1) - (3)].rcdata).first;
-- (yyvsp[(1) - (3)].rcdata).last->next = ri;
-- (yyval.rcdata).last = ri;
-- }
-- break;
--
-- case 163:
--#line 1245 "rcparse.y"
-- {
-- rc_rcdata_item *ri;
--
-- ri = define_rcdata_number ((yyvsp[(3) - (3)].i).val, (yyvsp[(3) - (3)].i).dword);
-- (yyval.rcdata).first = (yyvsp[(1) - (3)].rcdata).first;
-- (yyvsp[(1) - (3)].rcdata).last->next = ri;
-- (yyval.rcdata).last = ri;
-- }
-- break;
--
-- case 164:
--#line 1254 "rcparse.y"
-- {
-- (yyval.rcdata)=(yyvsp[(1) - (2)].rcdata);
-- }
-- break;
--
-- case 165:
--#line 1263 "rcparse.y"
-- { sub_res_info = (yyvsp[(2) - (3)].res_info); rcparse_rcdata (); }
-- break;
--
-- case 166:
--#line 1264 "rcparse.y"
-- { rcparse_normal (); }
-- break;
--
-- case 168:
--#line 1270 "rcparse.y"
-- {
-- define_stringtable (&sub_res_info, (yyvsp[(2) - (3)].il), (yyvsp[(3) - (3)].suni).s, (yyvsp[(3) - (3)].suni).length);
-- rcparse_discard_strings ();
-- }
-- break;
--
-- case 169:
--#line 1275 "rcparse.y"
-- {
-- define_stringtable (&sub_res_info, (yyvsp[(2) - (4)].il), (yyvsp[(4) - (4)].suni).s, (yyvsp[(4) - (4)].suni).length);
-- rcparse_discard_strings ();
-- }
-- break;
--
-- case 170:
--#line 1280 "rcparse.y"
-- {
-- rcparse_warning (_("invalid stringtable resource."));
-- abort ();
-- }
-- break;
--
-- case 171:
--#line 1288 "rcparse.y"
-- {
-- (yyval.id)=(yyvsp[(1) - (1)].id);
-- }
-- break;
--
-- case 172:
--#line 1292 "rcparse.y"
-- {
-- (yyval.id).named = 0;
-- (yyval.id).u.id = 23;
-- }
-- break;
--
-- case 173:
--#line 1297 "rcparse.y"
-- {
-- (yyval.id).named = 0;
-- (yyval.id).u.id = RT_RCDATA;
-- }
-- break;
--
-- case 174:
--#line 1302 "rcparse.y"
-- {
-- (yyval.id).named = 0;
-- (yyval.id).u.id = RT_MANIFEST;
-- }
-- break;
--
-- case 175:
--#line 1307 "rcparse.y"
-- {
-- (yyval.id).named = 0;
-- (yyval.id).u.id = RT_PLUGPLAY;
-- }
-- break;
--
-- case 176:
--#line 1312 "rcparse.y"
-- {
-- (yyval.id).named = 0;
-- (yyval.id).u.id = RT_VXD;
-- }
-- break;
--
-- case 177:
--#line 1317 "rcparse.y"
-- {
-- (yyval.id).named = 0;
-- (yyval.id).u.id = RT_DLGINCLUDE;
-- }
-- break;
--
-- case 178:
--#line 1322 "rcparse.y"
-- {
-- (yyval.id).named = 0;
-- (yyval.id).u.id = RT_DLGINIT;
-- }
-- break;
--
-- case 179:
--#line 1327 "rcparse.y"
-- {
-- (yyval.id).named = 0;
-- (yyval.id).u.id = RT_ANICURSOR;
-- }
-- break;
--
-- case 180:
--#line 1332 "rcparse.y"
-- {
-- (yyval.id).named = 0;
-- (yyval.id).u.id = RT_ANIICON;
-- }
-- break;
--
-- case 181:
--#line 1343 "rcparse.y"
-- {
-- define_user_data ((yyvsp[(1) - (6)].id), (yyvsp[(2) - (6)].id), &(yyvsp[(3) - (6)].res_info), (yyvsp[(5) - (6)].rcdata).first);
-- if (yychar != YYEMPTY)
-- YYERROR;
-- rcparse_discard_strings ();
-- }
-- break;
--
-- case 182:
--#line 1350 "rcparse.y"
-- {
-- define_user_file ((yyvsp[(1) - (4)].id), (yyvsp[(2) - (4)].id), &(yyvsp[(3) - (4)].res_info), (yyvsp[(4) - (4)].s));
-- if (yychar != YYEMPTY)
-- YYERROR;
-- rcparse_discard_strings ();
-- }
-- break;
--
-- case 183:
--#line 1360 "rcparse.y"
-- {
-- define_toolbar ((yyvsp[(1) - (8)].id), &(yyvsp[(3) - (8)].res_info), (yyvsp[(4) - (8)].il), (yyvsp[(5) - (8)].il), (yyvsp[(7) - (8)].toobar_item));
-- }
-- break;
--
-- case 184:
--#line 1365 "rcparse.y"
-- { (yyval.toobar_item)= NULL; }
-- break;
--
-- case 185:
--#line 1367 "rcparse.y"
-- {
-- rc_toolbar_item *c,*n;
-- c = (yyvsp[(1) - (3)].toobar_item);
-- n= (rc_toolbar_item *)
-- res_alloc (sizeof (rc_toolbar_item));
-- if (c != NULL)
-- while (c->next != NULL)
-- c = c->next;
-- n->prev = c;
-- n->next = NULL;
-- if (c != NULL)
-- c->next = n;
-- n->id = (yyvsp[(3) - (3)].id);
-- if ((yyvsp[(1) - (3)].toobar_item) == NULL)
-- (yyval.toobar_item) = n;
-- else
-- (yyval.toobar_item) = (yyvsp[(1) - (3)].toobar_item);
-- }
-- break;
--
-- case 186:
--#line 1386 "rcparse.y"
-- {
-- rc_toolbar_item *c,*n;
-- c = (yyvsp[(1) - (2)].toobar_item);
-- n= (rc_toolbar_item *)
-- res_alloc (sizeof (rc_toolbar_item));
-- if (c != NULL)
-- while (c->next != NULL)
-- c = c->next;
-- n->prev = c;
-- n->next = NULL;
-- if (c != NULL)
-- c->next = n;
-- n->id.named = 0;
-- n->id.u.id = 0;
-- if ((yyvsp[(1) - (2)].toobar_item) == NULL)
-- (yyval.toobar_item) = n;
-- else
-- (yyval.toobar_item) = (yyvsp[(1) - (2)].toobar_item);
-- }
-- break;
--
-- case 187:
--#line 1411 "rcparse.y"
-- {
-- define_versioninfo ((yyvsp[(1) - (6)].id), language, (yyvsp[(3) - (6)].fixver), (yyvsp[(5) - (6)].verinfo));
-- if (yychar != YYEMPTY)
-- YYERROR;
-- rcparse_discard_strings ();
-- }
-- break;
--
-- case 188:
--#line 1421 "rcparse.y"
-- {
-- (yyval.fixver) = ((rc_fixed_versioninfo *)
-- res_alloc (sizeof (rc_fixed_versioninfo)));
-- memset ((yyval.fixver), 0, sizeof (rc_fixed_versioninfo));
-- }
-- break;
--
-- case 189:
--#line 1428 "rcparse.y"
-- {
-- (yyvsp[(1) - (6)].fixver)->file_version_ms = ((yyvsp[(3) - (6)].il) << 16) | (yyvsp[(4) - (6)].il);
-- (yyvsp[(1) - (6)].fixver)->file_version_ls = ((yyvsp[(5) - (6)].il) << 16) | (yyvsp[(6) - (6)].il);
-- (yyval.fixver) = (yyvsp[(1) - (6)].fixver);
-- }
-- break;
--
-- case 190:
--#line 1435 "rcparse.y"
-- {
-- (yyvsp[(1) - (6)].fixver)->product_version_ms = ((yyvsp[(3) - (6)].il) << 16) | (yyvsp[(4) - (6)].il);
-- (yyvsp[(1) - (6)].fixver)->product_version_ls = ((yyvsp[(5) - (6)].il) << 16) | (yyvsp[(6) - (6)].il);
-- (yyval.fixver) = (yyvsp[(1) - (6)].fixver);
-- }
-- break;
--
-- case 191:
--#line 1441 "rcparse.y"
-- {
-- (yyvsp[(1) - (3)].fixver)->file_flags_mask = (yyvsp[(3) - (3)].il);
-- (yyval.fixver) = (yyvsp[(1) - (3)].fixver);
-- }
-- break;
--
-- case 192:
--#line 1446 "rcparse.y"
-- {
-- (yyvsp[(1) - (3)].fixver)->file_flags = (yyvsp[(3) - (3)].il);
-- (yyval.fixver) = (yyvsp[(1) - (3)].fixver);
-- }
-- break;
--
-- case 193:
--#line 1451 "rcparse.y"
-- {
-- (yyvsp[(1) - (3)].fixver)->file_os = (yyvsp[(3) - (3)].il);
-- (yyval.fixver) = (yyvsp[(1) - (3)].fixver);
-- }
-- break;
--
-- case 194:
--#line 1456 "rcparse.y"
-- {
-- (yyvsp[(1) - (3)].fixver)->file_type = (yyvsp[(3) - (3)].il);
-- (yyval.fixver) = (yyvsp[(1) - (3)].fixver);
-- }
-- break;
--
-- case 195:
--#line 1461 "rcparse.y"
-- {
-- (yyvsp[(1) - (3)].fixver)->file_subtype = (yyvsp[(3) - (3)].il);
-- (yyval.fixver) = (yyvsp[(1) - (3)].fixver);
-- }
-- break;
--
-- case 196:
--#line 1475 "rcparse.y"
-- {
-- (yyval.verinfo) = NULL;
-- }
-- break;
--
-- case 197:
--#line 1479 "rcparse.y"
-- {
-- (yyval.verinfo) = append_ver_stringfileinfo ((yyvsp[(1) - (5)].verinfo), (yyvsp[(4) - (5)].verstringtable));
-- }
-- break;
--
-- case 198:
--#line 1483 "rcparse.y"
-- {
-- (yyval.verinfo) = append_ver_varfileinfo ((yyvsp[(1) - (7)].verinfo), (yyvsp[(5) - (7)].uni), (yyvsp[(6) - (7)].vervar));
-- }
-- break;
--
-- case 199:
--#line 1490 "rcparse.y"
-- {
-- (yyval.verstringtable) = NULL;
-- }
-- break;
--
-- case 200:
--#line 1494 "rcparse.y"
-- {
-- (yyval.verstringtable) = append_ver_stringtable ((yyvsp[(1) - (5)].verstringtable), (yyvsp[(2) - (5)].s), (yyvsp[(4) - (5)].verstring));
-- }
-- break;
--
-- case 201:
--#line 1501 "rcparse.y"
-- {
-- (yyval.verstring) = NULL;
-- }
-- break;
--
-- case 202:
--#line 1505 "rcparse.y"
-- {
-- (yyval.verstring) = append_verval ((yyvsp[(1) - (5)].verstring), (yyvsp[(3) - (5)].uni), (yyvsp[(5) - (5)].uni));
-- }
-- break;
--
-- case 203:
--#line 1512 "rcparse.y"
-- {
-- (yyval.vervar) = NULL;
-- }
-- break;
--
-- case 204:
--#line 1516 "rcparse.y"
-- {
-- (yyval.vervar) = append_vertrans ((yyvsp[(1) - (3)].vervar), (yyvsp[(2) - (3)].il), (yyvsp[(3) - (3)].il));
-- }
-- break;
--
-- case 205:
--#line 1525 "rcparse.y"
-- {
-- (yyval.id).named = 0;
-- (yyval.id).u.id = (yyvsp[(1) - (1)].il);
-- }
-- break;
--
-- case 206:
--#line 1530 "rcparse.y"
-- {
-- res_unistring_to_id (&(yyval.id), (yyvsp[(1) - (1)].uni));
-- }
-- break;
--
-- case 207:
--#line 1539 "rcparse.y"
-- {
-- (yyval.uni) = (yyvsp[(1) - (1)].uni);
-- }
-- break;
--
-- case 208:
--#line 1543 "rcparse.y"
-- {
-- unichar *h = NULL;
-- unicode_from_ascii ((rc_uint_type *) NULL, &h, (yyvsp[(1) - (1)].s));
-- (yyval.uni) = h;
-- }
-- break;
--
-- case 209:
--#line 1553 "rcparse.y"
-- {
-- (yyval.id).named = 0;
-- (yyval.id).u.id = (yyvsp[(1) - (2)].il);
-- }
-- break;
--
-- case 210:
--#line 1558 "rcparse.y"
-- {
-- res_unistring_to_id (&(yyval.id), (yyvsp[(1) - (1)].uni));
-- }
-- break;
--
-- case 211:
--#line 1562 "rcparse.y"
-- {
-- res_unistring_to_id (&(yyval.id), (yyvsp[(1) - (2)].uni));
-- }
-- break;
--
-- case 212:
--#line 1572 "rcparse.y"
-- {
-- memset (&(yyval.res_info), 0, sizeof (rc_res_res_info));
-- (yyval.res_info).language = language;
-- /* FIXME: Is this the right default? */
-- (yyval.res_info).memflags = MEMFLAG_MOVEABLE | MEMFLAG_PURE | MEMFLAG_DISCARDABLE;
-- }
-- break;
--
-- case 213:
--#line 1579 "rcparse.y"
-- {
-- (yyval.res_info) = (yyvsp[(1) - (2)].res_info);
-- (yyval.res_info).memflags |= (yyvsp[(2) - (2)].memflags).on;
-- (yyval.res_info).memflags &=~ (yyvsp[(2) - (2)].memflags).off;
-- }
-- break;
--
-- case 214:
--#line 1585 "rcparse.y"
-- {
-- (yyval.res_info) = (yyvsp[(1) - (3)].res_info);
-- (yyval.res_info).characteristics = (yyvsp[(3) - (3)].il);
-- }
-- break;
--
-- case 215:
--#line 1590 "rcparse.y"
-- {
-- (yyval.res_info) = (yyvsp[(1) - (4)].res_info);
-- (yyval.res_info).language = (yyvsp[(3) - (4)].il) | ((yyvsp[(4) - (4)].il) << SUBLANG_SHIFT);
-- }
-- break;
--
-- case 216:
--#line 1595 "rcparse.y"
-- {
-- (yyval.res_info) = (yyvsp[(1) - (3)].res_info);
-- (yyval.res_info).version = (yyvsp[(3) - (3)].il);
-- }
-- break;
--
-- case 217:
--#line 1605 "rcparse.y"
-- {
-- memset (&(yyval.res_info), 0, sizeof (rc_res_res_info));
-- (yyval.res_info).language = language;
-- (yyval.res_info).memflags = MEMFLAG_MOVEABLE | MEMFLAG_DISCARDABLE;
-- }
-- break;
--
-- case 218:
--#line 1611 "rcparse.y"
-- {
-- (yyval.res_info) = (yyvsp[(1) - (2)].res_info);
-- (yyval.res_info).memflags |= (yyvsp[(2) - (2)].memflags).on;
-- (yyval.res_info).memflags &=~ (yyvsp[(2) - (2)].memflags).off;
-- }
-- break;
--
-- case 219:
--#line 1622 "rcparse.y"
-- {
-- memset (&(yyval.res_info), 0, sizeof (rc_res_res_info));
-- (yyval.res_info).language = language;
-- (yyval.res_info).memflags = MEMFLAG_MOVEABLE | MEMFLAG_PURE | MEMFLAG_DISCARDABLE;
-- }
-- break;
--
-- case 220:
--#line 1628 "rcparse.y"
-- {
-- (yyval.res_info) = (yyvsp[(1) - (2)].res_info);
-- (yyval.res_info).memflags |= (yyvsp[(2) - (2)].memflags).on;
-- (yyval.res_info).memflags &=~ (yyvsp[(2) - (2)].memflags).off;
-- }
-- break;
--
-- case 221:
--#line 1640 "rcparse.y"
-- {
-- (yyval.memflags).on = MEMFLAG_MOVEABLE;
-- (yyval.memflags).off = 0;
-- }
-- break;
--
-- case 222:
--#line 1645 "rcparse.y"
-- {
-- (yyval.memflags).on = 0;
-- (yyval.memflags).off = MEMFLAG_MOVEABLE;
-- }
-- break;
--
-- case 223:
--#line 1650 "rcparse.y"
-- {
-- (yyval.memflags).on = MEMFLAG_PURE;
-- (yyval.memflags).off = 0;
-- }
-- break;
--
-- case 224:
--#line 1655 "rcparse.y"
-- {
-- (yyval.memflags).on = 0;
-- (yyval.memflags).off = MEMFLAG_PURE;
-- }
-- break;
--
-- case 225:
--#line 1660 "rcparse.y"
-- {
-- (yyval.memflags).on = MEMFLAG_PRELOAD;
-- (yyval.memflags).off = 0;
-- }
-- break;
--
-- case 226:
--#line 1665 "rcparse.y"
-- {
-- (yyval.memflags).on = 0;
-- (yyval.memflags).off = MEMFLAG_PRELOAD;
-- }
-- break;
--
-- case 227:
--#line 1670 "rcparse.y"
-- {
-- (yyval.memflags).on = MEMFLAG_DISCARDABLE;
-- (yyval.memflags).off = 0;
-- }
-- break;
--
-- case 228:
--#line 1680 "rcparse.y"
-- {
-- (yyval.s) = (yyvsp[(1) - (1)].s);
-- }
-- break;
--
-- case 229:
--#line 1684 "rcparse.y"
-- {
-- (yyval.s) = (yyvsp[(1) - (1)].s);
-- }
-- break;
--
-- case 230:
--#line 1692 "rcparse.y"
-- {
-- (yyval.uni) = (yyvsp[(1) - (1)].uni);
-- }
-- break;
--
-- case 231:
--#line 1697 "rcparse.y"
-- {
-- rc_uint_type l1 = unichar_len ((yyvsp[(1) - (2)].uni));
-- rc_uint_type l2 = unichar_len ((yyvsp[(2) - (2)].uni));
-- unichar *h = (unichar *) res_alloc ((l1 + l2 + 1) * sizeof (unichar));
-- if (l1 != 0)
-- memcpy (h, (yyvsp[(1) - (2)].uni), l1 * sizeof (unichar));
-- if (l2 != 0)
-- memcpy (h + l1, (yyvsp[(2) - (2)].uni), l2 * sizeof (unichar));
-- h[l1 + l2] = 0;
-- (yyval.uni) = h;
-- }
-- break;
--
-- case 232:
--#line 1712 "rcparse.y"
-- {
-- (yyval.uni) = unichar_dup ((yyvsp[(1) - (1)].uni));
-- }
-- break;
--
-- case 233:
--#line 1716 "rcparse.y"
-- {
-- unichar *h = NULL;
-- unicode_from_ascii ((rc_uint_type *) NULL, &h, (yyvsp[(1) - (1)].s));
-- (yyval.uni) = h;
-- }
-- break;
--
-- case 234:
--#line 1725 "rcparse.y"
-- {
-- (yyval.suni) = (yyvsp[(1) - (1)].suni);
-- }
-- break;
--
-- case 235:
--#line 1729 "rcparse.y"
-- {
-- unichar *h = NULL;
-- rc_uint_type l = 0;
-- unicode_from_ascii_len (&l, &h, (yyvsp[(1) - (1)].ss).s, (yyvsp[(1) - (1)].ss).length);
-- (yyval.suni).s = h;
-- (yyval.suni).length = l;
-- }
-- break;
--
-- case 236:
--#line 1741 "rcparse.y"
-- {
-- (yyval.suni) = (yyvsp[(1) - (1)].suni);
-- }
-- break;
--
-- case 237:
--#line 1746 "rcparse.y"
-- {
-- rc_uint_type l1 = (yyvsp[(1) - (2)].suni).length;
-- rc_uint_type l2 = (yyvsp[(2) - (2)].suni).length;
-- unichar *h = (unichar *) res_alloc ((l1 + l2 + 1) * sizeof (unichar));
-- if (l1 != 0)
-- memcpy (h, (yyvsp[(1) - (2)].suni).s, l1 * sizeof (unichar));
-- if (l2 != 0)
-- memcpy (h + l1, (yyvsp[(2) - (2)].suni).s, l2 * sizeof (unichar));
-- h[l1 + l2] = 0;
-- (yyval.suni).length = l1 + l2;
-- (yyval.suni).s = h;
-- }
-- break;
--
-- case 238:
--#line 1762 "rcparse.y"
-- {
-- (yyval.ss) = (yyvsp[(1) - (1)].ss);
-- }
-- break;
--
-- case 239:
--#line 1766 "rcparse.y"
-- {
-- rc_uint_type l = (yyvsp[(1) - (2)].ss).length + (yyvsp[(2) - (2)].ss).length;
-- char *h = (char *) res_alloc (l);
-- memcpy (h, (yyvsp[(1) - (2)].ss).s, (yyvsp[(1) - (2)].ss).length);
-- memcpy (h + (yyvsp[(1) - (2)].ss).length, (yyvsp[(2) - (2)].ss).s, (yyvsp[(2) - (2)].ss).length);
-- (yyval.ss).s = h;
-- (yyval.ss).length = l;
-- }
-- break;
--
-- case 240:
--#line 1778 "rcparse.y"
-- {
-- (yyval.suni) = (yyvsp[(1) - (1)].suni);
-- }
-- break;
--
-- case 241:
--#line 1782 "rcparse.y"
-- {
-- rc_uint_type l = (yyvsp[(1) - (2)].suni).length + (yyvsp[(2) - (2)].suni).length;
-- unichar *h = (unichar *) res_alloc (l * sizeof (unichar));
-- memcpy (h, (yyvsp[(1) - (2)].suni).s, (yyvsp[(1) - (2)].suni).length * sizeof (unichar));
-- memcpy (h + (yyvsp[(1) - (2)].suni).length, (yyvsp[(2) - (2)].suni).s, (yyvsp[(2) - (2)].suni).length * sizeof (unichar));
-- (yyval.suni).s = h;
-- (yyval.suni).length = l;
-- }
-- break;
--
-- case 242:
--#line 1804 "rcparse.y"
-- {
-- style |= (yyvsp[(1) - (1)].il);
-- }
-- break;
--
-- case 243:
--#line 1808 "rcparse.y"
-- {
-- style &=~ (yyvsp[(2) - (2)].il);
-- }
-- break;
--
-- case 244:
--#line 1812 "rcparse.y"
-- {
-- style |= (yyvsp[(3) - (3)].il);
-- }
-- break;
--
-- case 245:
--#line 1816 "rcparse.y"
-- {
-- style &=~ (yyvsp[(4) - (4)].il);
-- }
-- break;
--
-- case 246:
--#line 1823 "rcparse.y"
-- {
-- (yyval.il) = (yyvsp[(1) - (1)].i).val;
-- }
-- break;
--
-- case 247:
--#line 1827 "rcparse.y"
-- {
-- (yyval.il) = (yyvsp[(2) - (3)].il);
-- }
-- break;
--
-- case 248:
--#line 1836 "rcparse.y"
-- {
-- (yyval.il) = 0;
-- }
-- break;
--
-- case 249:
--#line 1840 "rcparse.y"
-- {
-- (yyval.il) = (yyvsp[(1) - (1)].il);
-- }
-- break;
--
-- case 250:
--#line 1849 "rcparse.y"
-- {
-- (yyval.il) = (yyvsp[(2) - (2)].il);
-- }
-- break;
--
-- case 251:
--#line 1858 "rcparse.y"
-- {
-- (yyval.il) = (yyvsp[(1) - (1)].i).val;
-- }
-- break;
--
-- case 252:
--#line 1867 "rcparse.y"
-- {
-- (yyval.i) = (yyvsp[(1) - (1)].i);
-- }
-- break;
--
-- case 253:
--#line 1871 "rcparse.y"
-- {
-- (yyval.i) = (yyvsp[(2) - (3)].i);
-- }
-- break;
--
-- case 254:
--#line 1875 "rcparse.y"
-- {
-- (yyval.i).val = ~ (yyvsp[(2) - (2)].i).val;
-- (yyval.i).dword = (yyvsp[(2) - (2)].i).dword;
-- }
-- break;
--
-- case 255:
--#line 1880 "rcparse.y"
-- {
-- (yyval.i).val = - (yyvsp[(2) - (2)].i).val;
-- (yyval.i).dword = (yyvsp[(2) - (2)].i).dword;
-- }
-- break;
--
-- case 256:
--#line 1885 "rcparse.y"
-- {
-- (yyval.i).val = (yyvsp[(1) - (3)].i).val * (yyvsp[(3) - (3)].i).val;
-- (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword;
-- }
-- break;
--
-- case 257:
--#line 1890 "rcparse.y"
-- {
-- (yyval.i).val = (yyvsp[(1) - (3)].i).val / (yyvsp[(3) - (3)].i).val;
-- (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword;
-- }
-- break;
--
-- case 258:
--#line 1895 "rcparse.y"
-- {
-- (yyval.i).val = (yyvsp[(1) - (3)].i).val % (yyvsp[(3) - (3)].i).val;
-- (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword;
-- }
-- break;
--
-- case 259:
--#line 1900 "rcparse.y"
-- {
-- (yyval.i).val = (yyvsp[(1) - (3)].i).val + (yyvsp[(3) - (3)].i).val;
-- (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword;
-- }
-- break;
--
-- case 260:
--#line 1905 "rcparse.y"
-- {
-- (yyval.i).val = (yyvsp[(1) - (3)].i).val - (yyvsp[(3) - (3)].i).val;
-- (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword;
-- }
-- break;
--
-- case 261:
--#line 1910 "rcparse.y"
-- {
-- (yyval.i).val = (yyvsp[(1) - (3)].i).val & (yyvsp[(3) - (3)].i).val;
-- (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword;
-- }
-- break;
--
-- case 262:
--#line 1915 "rcparse.y"
-- {
-- (yyval.i).val = (yyvsp[(1) - (3)].i).val ^ (yyvsp[(3) - (3)].i).val;
-- (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword;
-- }
-- break;
--
-- case 263:
--#line 1920 "rcparse.y"
-- {
-- (yyval.i).val = (yyvsp[(1) - (3)].i).val | (yyvsp[(3) - (3)].i).val;
-- (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword;
-- }
-- break;
--
-- case 264:
--#line 1931 "rcparse.y"
-- {
-- (yyval.il) = (yyvsp[(2) - (2)].il);
-- }
-- break;
--
-- case 265:
--#line 1940 "rcparse.y"
-- {
-- (yyval.il) = (yyvsp[(1) - (1)].i).val;
-- }
-- break;
--
-- case 266:
--#line 1951 "rcparse.y"
-- {
-- (yyval.i) = (yyvsp[(1) - (1)].i);
-- }
-- break;
--
-- case 267:
--#line 1955 "rcparse.y"
-- {
-- (yyval.i) = (yyvsp[(2) - (3)].i);
-- }
-- break;
--
-- case 268:
--#line 1959 "rcparse.y"
-- {
-- (yyval.i).val = ~ (yyvsp[(2) - (2)].i).val;
-- (yyval.i).dword = (yyvsp[(2) - (2)].i).dword;
-- }
-- break;
--
-- case 269:
--#line 1964 "rcparse.y"
-- {
-- (yyval.i).val = (yyvsp[(1) - (3)].i).val * (yyvsp[(3) - (3)].i).val;
-- (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword;
-- }
-- break;
--
-- case 270:
--#line 1969 "rcparse.y"
-- {
-- (yyval.i).val = (yyvsp[(1) - (3)].i).val / (yyvsp[(3) - (3)].i).val;
-- (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword;
-- }
-- break;
--
-- case 271:
--#line 1974 "rcparse.y"
-- {
-- (yyval.i).val = (yyvsp[(1) - (3)].i).val % (yyvsp[(3) - (3)].i).val;
-- (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword;
-- }
-- break;
--
-- case 272:
--#line 1979 "rcparse.y"
-- {
-- (yyval.i).val = (yyvsp[(1) - (3)].i).val + (yyvsp[(3) - (3)].i).val;
-- (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword;
-- }
-- break;
--
-- case 273:
--#line 1984 "rcparse.y"
-- {
-- (yyval.i).val = (yyvsp[(1) - (3)].i).val - (yyvsp[(3) - (3)].i).val;
-- (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword;
-- }
-- break;
--
-- case 274:
--#line 1989 "rcparse.y"
-- {
-- (yyval.i).val = (yyvsp[(1) - (3)].i).val & (yyvsp[(3) - (3)].i).val;
-- (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword;
-- }
-- break;
--
-- case 275:
--#line 1994 "rcparse.y"
-- {
-- (yyval.i).val = (yyvsp[(1) - (3)].i).val ^ (yyvsp[(3) - (3)].i).val;
-- (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword;
-- }
-- break;
--
-- case 276:
--#line 1999 "rcparse.y"
-- {
-- (yyval.i).val = (yyvsp[(1) - (3)].i).val | (yyvsp[(3) - (3)].i).val;
-- (yyval.i).dword = (yyvsp[(1) - (3)].i).dword || (yyvsp[(3) - (3)].i).dword;
-- }
-- break;
--
--
--/* Line 1267 of yacc.c. */
--#line 4440 "rcparse.c"
-- default: break;
-- }
-- YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
--
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
--
-- *++yyvsp = yyval;
--
--
-- /* Now `shift' the result of the reduction. Determine what state
-- that goes to, based on the state we popped back to and the rule
-- number reduced by. */
--
-- yyn = yyr1[yyn];
--
-- yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
-- if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
-- yystate = yytable[yystate];
-- else
-- yystate = yydefgoto[yyn - YYNTOKENS];
--
-- goto yynewstate;
--
--
--/*------------------------------------.
--| yyerrlab -- here on detecting error |
--`------------------------------------*/
--yyerrlab:
-- /* If not already recovering from an error, report this error. */
-- if (!yyerrstatus)
-- {
-- ++yynerrs;
--#if ! YYERROR_VERBOSE
-- yyerror (YY_("syntax error"));
--#else
-- {
-- YYSIZE_T yysize = yysyntax_error (0, yystate, yychar);
-- if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM)
-- {
-- YYSIZE_T yyalloc = 2 * yysize;
-- if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM))
-- yyalloc = YYSTACK_ALLOC_MAXIMUM;
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
-- yymsg = (char *) YYSTACK_ALLOC (yyalloc);
-- if (yymsg)
-- yymsg_alloc = yyalloc;
-- else
-- {
-- yymsg = yymsgbuf;
-- yymsg_alloc = sizeof yymsgbuf;
-- }
-- }
--
-- if (0 < yysize && yysize <= yymsg_alloc)
-- {
-- (void) yysyntax_error (yymsg, yystate, yychar);
-- yyerror (yymsg);
-- }
-- else
-- {
-- yyerror (YY_("syntax error"));
-- if (yysize != 0)
-- goto yyexhaustedlab;
-- }
-- }
--#endif
-- }
--
--
--
-- if (yyerrstatus == 3)
-- {
-- /* If just tried and failed to reuse look-ahead token after an
-- error, discard it. */
--
-- if (yychar <= YYEOF)
-- {
-- /* Return failure if at end of input. */
-- if (yychar == YYEOF)
-- YYABORT;
-- }
-- else
-- {
-- yydestruct ("Error: discarding",
-- yytoken, &yylval);
-- yychar = YYEMPTY;
-- }
-- }
--
-- /* Else will try to reuse look-ahead token after shifting the error
-- token. */
-- goto yyerrlab1;
--
--
--/*---------------------------------------------------.
--| yyerrorlab -- error raised explicitly by YYERROR. |
--`---------------------------------------------------*/
--yyerrorlab:
--
-- /* Pacify compilers like GCC when the user code never invokes
-- YYERROR and the label yyerrorlab therefore never appears in user
-- code. */
-- if (/*CONSTCOND*/ 0)
-- goto yyerrorlab;
--
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYERROR. */
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
-- yystate = *yyssp;
-- goto yyerrlab1;
--
--
--/*-------------------------------------------------------------.
--| yyerrlab1 -- common code for both syntax error and YYERROR. |
--`-------------------------------------------------------------*/
--yyerrlab1:
-- yyerrstatus = 3; /* Each real token shifted decrements this. */
--
-- for (;;)
-- {
-- yyn = yypact[yystate];
-- if (yyn != YYPACT_NINF)
-- {
-- yyn += YYTERROR;
-- if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
-- {
-- yyn = yytable[yyn];
-- if (0 < yyn)
-- break;
-- }
-- }
--
-- /* Pop the current state because it cannot handle the error token. */
-- if (yyssp == yyss)
-- YYABORT;
--
--
-- yydestruct ("Error: popping",
-- yystos[yystate], yyvsp);
-- YYPOPSTACK (1);
-- yystate = *yyssp;
-- YY_STACK_PRINT (yyss, yyssp);
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- *++yyvsp = yylval;
--
--
-- /* Shift the error token. */
-- YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
--
-- yystate = yyn;
-- goto yynewstate;
--
--
--/*-------------------------------------.
--| yyacceptlab -- YYACCEPT comes here. |
--`-------------------------------------*/
--yyacceptlab:
-- yyresult = 0;
-- goto yyreturn;
--
--/*-----------------------------------.
--| yyabortlab -- YYABORT comes here. |
--`-----------------------------------*/
--yyabortlab:
-- yyresult = 1;
-- goto yyreturn;
--
--#ifndef yyoverflow
--/*-------------------------------------------------.
--| yyexhaustedlab -- memory exhaustion comes here. |
--`-------------------------------------------------*/
--yyexhaustedlab:
-- yyerror (YY_("memory exhausted"));
-- yyresult = 2;
-- /* Fall through. */
--#endif
--
--yyreturn:
-- if (yychar != YYEOF && yychar != YYEMPTY)
-- yydestruct ("Cleanup: discarding lookahead",
-- yytoken, &yylval);
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYABORT or YYACCEPT. */
-- YYPOPSTACK (yylen);
-- YY_STACK_PRINT (yyss, yyssp);
-- while (yyssp != yyss)
-- {
-- yydestruct ("Cleanup: popping",
-- yystos[*yyssp], yyvsp);
-- YYPOPSTACK (1);
-- }
--#ifndef yyoverflow
-- if (yyss != yyssa)
-- YYSTACK_FREE (yyss);
--#endif
--#if YYERROR_VERBOSE
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
--#endif
-- /* Make sure YYID is used. */
-- return YYID (yyresult);
--}
--
--
--#line 2005 "rcparse.y"
--
--
--/* Set the language from the command line. */
--
--void
--rcparse_set_language (int lang)
--{
-- language = lang;
--}
--
-diff -Nur binutils-2.24.orig/binutils/rcparse.h binutils-2.24/binutils/rcparse.h
---- binutils-2.24.orig/binutils/rcparse.h 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/rcparse.h 1970-01-01 01:00:00.000000000 +0100
-@@ -1,298 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton interface for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- BEG = 258,
-- END = 259,
-- ACCELERATORS = 260,
-- VIRTKEY = 261,
-- ASCII = 262,
-- NOINVERT = 263,
-- SHIFT = 264,
-- CONTROL = 265,
-- ALT = 266,
-- BITMAP = 267,
-- CURSOR = 268,
-- DIALOG = 269,
-- DIALOGEX = 270,
-- EXSTYLE = 271,
-- CAPTION = 272,
-- CLASS = 273,
-- STYLE = 274,
-- AUTO3STATE = 275,
-- AUTOCHECKBOX = 276,
-- AUTORADIOBUTTON = 277,
-- CHECKBOX = 278,
-- COMBOBOX = 279,
-- CTEXT = 280,
-- DEFPUSHBUTTON = 281,
-- EDITTEXT = 282,
-- GROUPBOX = 283,
-- LISTBOX = 284,
-- LTEXT = 285,
-- PUSHBOX = 286,
-- PUSHBUTTON = 287,
-- RADIOBUTTON = 288,
-- RTEXT = 289,
-- SCROLLBAR = 290,
-- STATE3 = 291,
-- USERBUTTON = 292,
-- BEDIT = 293,
-- HEDIT = 294,
-- IEDIT = 295,
-- FONT = 296,
-- ICON = 297,
-- ANICURSOR = 298,
-- ANIICON = 299,
-- DLGINCLUDE = 300,
-- DLGINIT = 301,
-- FONTDIR = 302,
-- HTML = 303,
-- MANIFEST = 304,
-- PLUGPLAY = 305,
-- VXD = 306,
-- TOOLBAR = 307,
-- BUTTON = 308,
-- LANGUAGE = 309,
-- CHARACTERISTICS = 310,
-- VERSIONK = 311,
-- MENU = 312,
-- MENUEX = 313,
-- MENUITEM = 314,
-- SEPARATOR = 315,
-- POPUP = 316,
-- CHECKED = 317,
-- GRAYED = 318,
-- HELP = 319,
-- INACTIVE = 320,
-- MENUBARBREAK = 321,
-- MENUBREAK = 322,
-- MESSAGETABLE = 323,
-- RCDATA = 324,
-- STRINGTABLE = 325,
-- VERSIONINFO = 326,
-- FILEVERSION = 327,
-- PRODUCTVERSION = 328,
-- FILEFLAGSMASK = 329,
-- FILEFLAGS = 330,
-- FILEOS = 331,
-- FILETYPE = 332,
-- FILESUBTYPE = 333,
-- BLOCKSTRINGFILEINFO = 334,
-- BLOCKVARFILEINFO = 335,
-- VALUE = 336,
-- BLOCK = 337,
-- MOVEABLE = 338,
-- FIXED = 339,
-- PURE = 340,
-- IMPURE = 341,
-- PRELOAD = 342,
-- LOADONCALL = 343,
-- DISCARDABLE = 344,
-- NOT = 345,
-- QUOTEDUNISTRING = 346,
-- QUOTEDSTRING = 347,
-- STRING = 348,
-- NUMBER = 349,
-- SIZEDUNISTRING = 350,
-- SIZEDSTRING = 351,
-- IGNORED_TOKEN = 352,
-- NEG = 353
-- };
--#endif
--/* Tokens. */
--#define BEG 258
--#define END 259
--#define ACCELERATORS 260
--#define VIRTKEY 261
--#define ASCII 262
--#define NOINVERT 263
--#define SHIFT 264
--#define CONTROL 265
--#define ALT 266
--#define BITMAP 267
--#define CURSOR 268
--#define DIALOG 269
--#define DIALOGEX 270
--#define EXSTYLE 271
--#define CAPTION 272
--#define CLASS 273
--#define STYLE 274
--#define AUTO3STATE 275
--#define AUTOCHECKBOX 276
--#define AUTORADIOBUTTON 277
--#define CHECKBOX 278
--#define COMBOBOX 279
--#define CTEXT 280
--#define DEFPUSHBUTTON 281
--#define EDITTEXT 282
--#define GROUPBOX 283
--#define LISTBOX 284
--#define LTEXT 285
--#define PUSHBOX 286
--#define PUSHBUTTON 287
--#define RADIOBUTTON 288
--#define RTEXT 289
--#define SCROLLBAR 290
--#define STATE3 291
--#define USERBUTTON 292
--#define BEDIT 293
--#define HEDIT 294
--#define IEDIT 295
--#define FONT 296
--#define ICON 297
--#define ANICURSOR 298
--#define ANIICON 299
--#define DLGINCLUDE 300
--#define DLGINIT 301
--#define FONTDIR 302
--#define HTML 303
--#define MANIFEST 304
--#define PLUGPLAY 305
--#define VXD 306
--#define TOOLBAR 307
--#define BUTTON 308
--#define LANGUAGE 309
--#define CHARACTERISTICS 310
--#define VERSIONK 311
--#define MENU 312
--#define MENUEX 313
--#define MENUITEM 314
--#define SEPARATOR 315
--#define POPUP 316
--#define CHECKED 317
--#define GRAYED 318
--#define HELP 319
--#define INACTIVE 320
--#define MENUBARBREAK 321
--#define MENUBREAK 322
--#define MESSAGETABLE 323
--#define RCDATA 324
--#define STRINGTABLE 325
--#define VERSIONINFO 326
--#define FILEVERSION 327
--#define PRODUCTVERSION 328
--#define FILEFLAGSMASK 329
--#define FILEFLAGS 330
--#define FILEOS 331
--#define FILETYPE 332
--#define FILESUBTYPE 333
--#define BLOCKSTRINGFILEINFO 334
--#define BLOCKVARFILEINFO 335
--#define VALUE 336
--#define BLOCK 337
--#define MOVEABLE 338
--#define FIXED 339
--#define PURE 340
--#define IMPURE 341
--#define PRELOAD 342
--#define LOADONCALL 343
--#define DISCARDABLE 344
--#define NOT 345
--#define QUOTEDUNISTRING 346
--#define QUOTEDSTRING 347
--#define STRING 348
--#define NUMBER 349
--#define SIZEDUNISTRING 350
--#define SIZEDSTRING 351
--#define IGNORED_TOKEN 352
--#define NEG 353
--
--
--
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 69 "rcparse.y"
--{
-- rc_accelerator acc;
-- rc_accelerator *pacc;
-- rc_dialog_control *dialog_control;
-- rc_menuitem *menuitem;
-- struct
-- {
-- rc_rcdata_item *first;
-- rc_rcdata_item *last;
-- } rcdata;
-- rc_rcdata_item *rcdata_item;
-- rc_fixed_versioninfo *fixver;
-- rc_ver_info *verinfo;
-- rc_ver_stringtable *verstringtable;
-- rc_ver_stringinfo *verstring;
-- rc_ver_varinfo *vervar;
-- rc_toolbar_item *toobar_item;
-- rc_res_id id;
-- rc_res_res_info res_info;
-- struct
-- {
-- rc_uint_type on;
-- rc_uint_type off;
-- } memflags;
-- struct
-- {
-- rc_uint_type val;
-- /* Nonzero if this number was explicitly specified as long. */
-- int dword;
-- } i;
-- rc_uint_type il;
-- rc_uint_type is;
-- const char *s;
-- struct
-- {
-- rc_uint_type length;
-- const char *s;
-- } ss;
-- unichar *uni;
-- struct
-- {
-- rc_uint_type length;
-- const unichar *s;
-- } suni;
--}
--/* Line 1529 of yacc.c. */
--#line 291 "rcparse.h"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--extern YYSTYPE yylval;
--
-diff -Nur binutils-2.24.orig/binutils/readelf.c binutils-2.24/binutils/readelf.c
---- binutils-2.24.orig/binutils/readelf.c 2013-11-18 09:40:15.000000000 +0100
-+++ binutils-2.24/binutils/readelf.c 2016-06-30 21:26:12.593890778 +0200
-@@ -131,6 +131,7 @@
- #include "elf/moxie.h"
- #include "elf/mt.h"
- #include "elf/msp430.h"
-+#include "elf/nds32.h"
- #include "elf/nios2.h"
- #include "elf/or32.h"
- #include "elf/pj.h"
-@@ -626,6 +627,7 @@
- case EM_MSP430:
- case EM_MSP430_OLD:
- case EM_MT:
-+ case EM_NDS32:
- case EM_NIOS32:
- case EM_PPC64:
- case EM_PPC:
-@@ -1144,6 +1146,10 @@
- rtype = elf_msp430_reloc_type (type);
- break;
-
-+ case EM_NDS32:
-+ rtype = elf_nds32_reloc_type (type);
-+ break;
-+
- case EM_PPC:
- rtype = elf_ppc_reloc_type (type);
- break;
-@@ -2307,6 +2313,215 @@
- strcat (buf,_(", <unknown>"));
- }
-
-+static void
-+decode_NDS32_machine_flags (unsigned e_flags, char buf[], size_t size)
-+{
-+ unsigned abi;
-+ unsigned arch;
-+ unsigned config;
-+ unsigned version;
-+ int has_fpu = 0;
-+ int r = 0;
-+
-+ static const char *ABI_STRINGS[] = {
-+ [E_NDS_ABI_V0 >> EF_NDS_ABI_SHIFT] = "ABI v0", /* use r5 as return register; only used in N1213HC */
-+ [E_NDS_ABI_V1 >> EF_NDS_ABI_SHIFT] = "ABI v1", /* use r0 as return register */
-+ [E_NDS_ABI_V2 >> EF_NDS_ABI_SHIFT] = "ABI v2", /* use r0 as return register and don't reserve 24 bytes for arguments */
-+ [E_NDS_ABI_V2FP >> EF_NDS_ABI_SHIFT] = "ABI v2fp", /* for FPU */
-+ [E_NDS_ABI_AABI >> EF_NDS_ABI_SHIFT] = "AABI",
-+ [E_NDS_ABI_V2FP_PLUS >> EF_NDS_ABI_SHIFT] = "ABI2 FP+"
-+ };
-+ static const char *VER_STRINGS[] = {
-+ [E_NDS32_ELF_VER_1_2 >> EF_NDS32_ELF_VERSION_SHIFT] = "Andes ELF V1.3 or older",
-+ [E_NDS32_ELF_VER_1_3 >> EF_NDS32_ELF_VERSION_SHIFT] = "Andes ELF V1.3.1",
-+ [E_NDS32_ELF_VER_1_4 >> EF_NDS32_ELF_VERSION_SHIFT] = "Andes ELF V1.4",
-+ };
-+ static const char *ARCH_STRINGS[] = {
-+ [E_NDS_ARCH_STAR_V1_0 >> EF_NDS_ARCH_SHIFT] = "Andes Star v1.0",
-+ [E_NDS_ARCH_STAR_V2_0 >> EF_NDS_ARCH_SHIFT] = "Andes Star v2.0",
-+ [E_NDS_ARCH_STAR_V3_0 >> EF_NDS_ARCH_SHIFT] = "Andes Star v3.0",
-+ [E_NDS_ARCH_STAR_V3_M >> EF_NDS_ARCH_SHIFT] = "Andes Star v3.0m"
-+ };
-+
-+ abi = EF_NDS_ABI & e_flags;
-+ arch = EF_NDS_ARCH & e_flags;
-+ config = EF_NDS_INST & e_flags;
-+ version = EF_NDS32_ELF_VERSION & e_flags;
-+
-+ memset (buf, 0, size);
-+
-+ switch (abi)
-+ {
-+ case E_NDS_ABI_V0:
-+ case E_NDS_ABI_V1:
-+ case E_NDS_ABI_V2:
-+ case E_NDS_ABI_V2FP:
-+ case E_NDS_ABI_AABI:
-+ case E_NDS_ABI_V2FP_PLUS:
-+ /* In case there are holes in the array. */
-+ r += snprintf (buf + r, size - r, ", %s", ABI_STRINGS[abi >> EF_NDS_ABI_SHIFT]);
-+ break;
-+
-+ default:
-+ r += snprintf (buf + r, size - r, ", <unrecognized ABI>");
-+ break;
-+ }
-+
-+ switch (version)
-+ {
-+ case E_NDS32_ELF_VER_1_2:
-+ case E_NDS32_ELF_VER_1_3:
-+ case E_NDS32_ELF_VER_1_4:
-+ r += snprintf (buf + r, size - r, ", %s", VER_STRINGS[version >> EF_NDS32_ELF_VERSION_SHIFT]);
-+ break;
-+
-+ default:
-+ r += snprintf (buf + r, size - r, ", <unrecognized ELF version number>");
-+ break;
-+ }
-+
-+ if (E_NDS_ABI_V0 == abi)
-+ {
-+ /* OLD ABI; only used in N1213HC, has performance extension 1 */
-+ r += snprintf (buf + r, size - r, ", Andes Star v1.0, N1213HC, MAC, PERF1");
-+ if (arch == E_NDS_ARCH_STAR_V1_0)
-+ r += snprintf (buf + r, size -r, ", 16b"); /* has 16-bit instructions */
-+ return;
-+ }
-+
-+ switch (arch)
-+ {
-+ case E_NDS_ARCH_STAR_V1_0:
-+ case E_NDS_ARCH_STAR_V2_0:
-+ case E_NDS_ARCH_STAR_V3_0:
-+ case E_NDS_ARCH_STAR_V3_M:
-+ r += snprintf (buf + r, size - r, ", %s", ARCH_STRINGS[arch >> EF_NDS_ARCH_SHIFT]);
-+ break;
-+
-+ default:
-+ r += snprintf (buf + r, size - r, ", <unrecognized architecture>");
-+ /* ARCH version determines how the e_flags are interpreted.
-+ If it is unknown, we cannot proceed. */
-+ return;
-+ }
-+
-+ /* newer ABI; Now handle architecture specific flags. */
-+ if (arch == E_NDS_ARCH_STAR_V1_0)
-+ {
-+ if (config & E_NDS32_HAS_MFUSR_PC_INST)
-+ r += snprintf (buf + r, size -r, ", MFUSR_PC");
-+
-+ if (!(config & E_NDS32_HAS_NO_MAC_INST))
-+ r += snprintf (buf + r, size -r, ", MAC");
-+
-+ if (config & E_NDS32_HAS_DIV_INST)
-+ r += snprintf (buf + r, size -r, ", DIV");
-+
-+ if (config & E_NDS32_HAS_16BIT_INST)
-+ r += snprintf (buf + r, size -r, ", 16b");
-+ }
-+ else
-+ {
-+ if (config & E_NDS32_HAS_MFUSR_PC_INST)
-+ {
-+ if (version <= E_NDS32_ELF_VER_1_3)
-+ r += snprintf (buf + r, size -r, ", [B8]");
-+ else
-+ r += snprintf (buf + r, size -r, ", EX9");
-+ }
-+
-+ if (config & E_NDS32_HAS_MAC_DX_INST)
-+ r += snprintf (buf + r, size -r, ", MAC_DX");
-+
-+ if (config & E_NDS32_HAS_DIV_DX_INST)
-+ r += snprintf (buf + r, size -r, ", DIV_DX");
-+
-+ if (config & E_NDS32_HAS_16BIT_INST)
-+ {
-+ if (version <= E_NDS32_ELF_VER_1_3)
-+ r += snprintf (buf + r, size -r, ", 16b");
-+ else
-+ r += snprintf (buf + r, size -r, ", IFC");
-+ }
-+ }
-+
-+ if (config & E_NDS32_HAS_EXT_INST)
-+ r += snprintf (buf + r, size -r, ", PERF1");
-+
-+ if (config & E_NDS32_HAS_EXT2_INST)
-+ r += snprintf (buf + r, size -r, ", PERF2");
-+
-+ if (config & E_NDS32_HAS_FPU_INST)
-+ {
-+ has_fpu = 1;
-+ r += snprintf (buf + r, size -r, ", FPU_SP");
-+ }
-+
-+ if (config & E_NDS32_HAS_FPU_DP_INST)
-+ {
-+ has_fpu = 1;
-+ r += snprintf (buf + r, size -r, ", FPU_DP");
-+ }
-+
-+ if (config & E_NDS32_HAS_FPU_MAC_INST)
-+ {
-+ has_fpu = 1;
-+ r += snprintf (buf + r, size -r, ", FPU_MAC");
-+ }
-+
-+ if (config & E_NDS32_HAS_DSP_INST)
-+ {
-+ r += snprintf (buf + r, size -r, ", DSP");
-+ }
-+
-+ if (config & E_NDS32_HAS_ZOL)
-+ {
-+ r += snprintf (buf + r, size -r, ", ZOL");
-+ }
-+
-+ if (has_fpu)
-+ {
-+ switch ((config & E_NDS32_FPU_REG_CONF) >> E_NDS32_FPU_REG_CONF_SHIFT)
-+ {
-+ case E_NDS32_FPU_REG_8SP_4DP:
-+ r += snprintf (buf + r, size -r, ", FPU_REG:8/4");
-+ break;
-+ case E_NDS32_FPU_REG_16SP_8DP:
-+ r += snprintf (buf + r, size -r, ", FPU_REG:16/8");
-+ break;
-+ case E_NDS32_FPU_REG_32SP_16DP:
-+ r += snprintf (buf + r, size -r, ", FPU_REG:32/16");
-+ break;
-+ case E_NDS32_FPU_REG_32SP_32DP:
-+ r += snprintf (buf + r, size -r, ", FPU_REG:32/32");
-+ break;
-+ }
-+ }
-+
-+ if (config & E_NDS32_HAS_AUDIO_INST)
-+ r += snprintf (buf + r, size -r, ", AUDIO");
-+
-+ if (config & E_NDS32_HAS_STRING_INST)
-+ r += snprintf (buf + r, size -r, ", STR");
-+
-+ if (config & E_NDS32_HAS_REDUCED_REGS)
-+ r += snprintf (buf + r, size -r, ", 16REG");
-+
-+ if (config & E_NDS32_HAS_VIDEO_INST)
-+ {
-+ if (version <= E_NDS32_ELF_VER_1_3)
-+ r += snprintf (buf + r, size -r, ", VIDEO");
-+ else
-+ r += snprintf (buf + r, size -r, ", SATURATION");
-+ }
-+
-+ if (config & E_NDS32_HAS_ENCRIPT_INST)
-+ r += snprintf (buf + r, size -r, ", ENCRP");
-+
-+ if (config & E_NDS32_HAS_L2C_INST)
-+ r += snprintf (buf + r, size -r, ", L2C");
-+}
-+
- static char *
- get_machine_flags (unsigned e_flags, unsigned e_machine)
- {
-@@ -2649,6 +2864,10 @@
- }
- break;
-
-+ case EM_NDS32:
-+ decode_NDS32_machine_flags (e_flags, buf, sizeof buf);
-+ break;
-+
- case EM_SH:
- switch ((e_flags & EF_SH_MACH_MASK))
- {
-@@ -4171,7 +4390,7 @@
- else
- {
- char fmt [32];
-- int ret = snprintf (fmt, sizeof (fmt), "%%%ds", PATH_MAX);
-+ int ret = snprintf (fmt, sizeof (fmt), "%%%ds", PATH_MAX - 1);
-
- if (ret >= (int) sizeof (fmt) || ret < 0)
- error (_("Internal error: failed to create format string to display program interpreter\n"));
-@@ -10257,6 +10476,8 @@
- return reloc_type == 1; /* R_MSP430_32 or R_MSP320_ABS32. */
- case EM_MT:
- return reloc_type == 2; /* R_MT_32. */
-+ case EM_NDS32:
-+ return reloc_type == 20; /* R_NDS32_RELA. */
- case EM_ALTERA_NIOS2:
- return reloc_type == 12; /* R_NIOS2_BFD_RELOC_32. */
- case EM_NIOS32:
-@@ -10510,6 +10731,8 @@
- return reloc_type == 2; /* R_MSP430_ABS16. */
- case EM_MSP430_OLD:
- return reloc_type == 5; /* R_MSP430_16_BYTE. */
-+ case EM_NDS32:
-+ return reloc_type == 19; /* R_NDS32_RELA. */
- case EM_ALTERA_NIOS2:
- return reloc_type == 13; /* R_NIOS2_BFD_RELOC_16. */
- case EM_NIOS32:
-@@ -10573,6 +10796,12 @@
- return reloc_type == 0;
- case EM_AARCH64:
- return reloc_type == 0 || reloc_type == 256;
-+ case EM_NDS32:
-+ return (reloc_type == 0 /* R_XTENSA_NONE. */
-+ || reloc_type == 204 /* R_NDS32_DIFF8. */
-+ || reloc_type == 205 /* R_NDS32_DIFF16. */
-+ || reloc_type == 206 /* R_NDS32_DIFF32. */
-+ || reloc_type == 207 /* R_NDS32_ULEB128. */);
- case EM_XTENSA_OLD:
- case EM_XTENSA:
- return (reloc_type == 0 /* R_XTENSA_NONE. */
-@@ -12954,6 +13183,39 @@
- }
-
- static int
-+process_nds32_specific (FILE * file)
-+{
-+ Elf_Internal_Shdr *sect = NULL;
-+
-+ sect = find_section (".nds32_e_flags");
-+ if (sect != NULL)
-+ {
-+ unsigned int *flag;
-+ printf ("\nNDS32 elf flags section:\n");
-+ flag = get_data (NULL, file, sect->sh_offset, 1,
-+ sect->sh_size, _("NDS32 elf flags section"));
-+
-+ switch ((*flag) & 0x3)
-+ {
-+ case 0:
-+ printf ("(VEC_SIZE):\tNo entry.\n");
-+ break;
-+ case 1:
-+ printf ("(VEC_SIZE):\t4 bytes\n");
-+ break;
-+ case 2:
-+ printf ("(VEC_SIZE):\t16 bytes\n");
-+ break;
-+ case 3:
-+ printf ("(VEC_SIZE):\treserved\n");
-+ break;
-+ }
-+ }
-+
-+ return TRUE;
-+}
-+
-+static int
- process_gnu_liblist (FILE * file)
- {
- Elf_Internal_Shdr * section;
-@@ -13779,6 +14041,9 @@
- case EM_MIPS_RS3_LE:
- return process_mips_specific (file);
- break;
-+ case EM_NDS32:
-+ return process_nds32_specific (file);
-+ break;
- case EM_PPC:
- return process_power_specific (file);
- break;
-diff -Nur binutils-2.24.orig/binutils/size.c binutils-2.24/binutils/size.c
---- binutils-2.24.orig/binutils/size.c 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/binutils/size.c 2016-06-30 21:26:12.593890778 +0200
-@@ -436,6 +436,7 @@
- static bfd_size_type bsssize;
- static bfd_size_type datasize;
- static bfd_size_type textsize;
-+static bfd_size_type rodata_size;
-
- static void
- berkeley_sum (bfd *abfd ATTRIBUTE_UNUSED, sec_ptr sec,
-@@ -449,6 +450,10 @@
- return;
-
- size = bfd_get_section_size (sec);
-+
-+ if ((flags & SEC_DATA) != 0 && (flags & SEC_READONLY) != 0 && (flags & SEC_CODE) == 0)
-+ rodata_size = rodata_size + size;
-+
- if ((flags & SEC_CODE) != 0 || (flags & SEC_READONLY) != 0)
- textsize += size;
- else if ((flags & SEC_HAS_CONTENTS) != 0)
-@@ -466,13 +471,15 @@
- bsssize = 0;
- datasize = 0;
- textsize = 0;
-+ rodata_size = 0;
-
- bfd_map_over_sections (abfd, berkeley_sum, NULL);
-
- bsssize += common_size;
- if (files_seen++ == 0)
-- puts ((radix == octal) ? " text\t data\t bss\t oct\t hex\tfilename" :
-- " text\t data\t bss\t dec\t hex\tfilename");
-+ puts ((radix == octal) ?
-+ " text (code + rodata)\t data\t bss\t oct\t hex\tfilename" :
-+ " text (code + rodata)\t data\t bss\t dec\t hex\tfilename");
-
- total = textsize + datasize + bsssize;
-
-@@ -484,6 +491,11 @@
- }
-
- rprint_number (7, textsize);
-+ printf (" (");
-+ rprint_number (4, (textsize - rodata_size));
-+ printf (" + ");
-+ rprint_number (6, rodata_size);
-+ printf (")");
- putchar ('\t');
- rprint_number (7, datasize);
- putchar ('\t');
-diff -Nur binutils-2.24.orig/binutils/sysinfo.c binutils-2.24/binutils/sysinfo.c
---- binutils-2.24.orig/binutils/sysinfo.c 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/sysinfo.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,1962 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton implementation for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* C LALR(1) parser skeleton written by Richard Stallman, by
-- simplifying the original so-called "semantic" parser. */
--
--/* All symbols defined below should begin with yy or YY, to avoid
-- infringing on user name space. This should be done even for local
-- variables, as they might otherwise be expanded by user macros.
-- There are some unavoidable exceptions within include files to
-- define necessary library symbols; they are noted "INFRINGES ON
-- USER NAME SPACE" below. */
--
--/* Identify Bison output. */
--#define YYBISON 1
--
--/* Bison version. */
--#define YYBISON_VERSION "2.3"
--
--/* Skeleton name. */
--#define YYSKELETON_NAME "yacc.c"
--
--/* Pure parsers. */
--#define YYPURE 0
--
--/* Using locations. */
--#define YYLSP_NEEDED 0
--
--
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- COND = 258,
-- REPEAT = 259,
-- TYPE = 260,
-- NAME = 261,
-- NUMBER = 262,
-- UNIT = 263
-- };
--#endif
--/* Tokens. */
--#define COND 258
--#define REPEAT 259
--#define TYPE 260
--#define NAME 261
--#define NUMBER 262
--#define UNIT 263
--
--
--
--
--/* Copy the first part of user declarations. */
--#line 21 "sysinfo.y"
--
--#include <stdio.h>
--#include <stdlib.h>
--
--static char writecode;
--static char *it;
--static int code;
--static char * repeat;
--static char *oldrepeat;
--static char *name;
--static int rdepth;
--static char *names[] = {" ","[n]","[n][m]"};
--static char *pnames[]= {"","*","**"};
--
--static int yyerror (char *s);
--extern int yylex (void);
--
--
--/* Enabling traces. */
--#ifndef YYDEBUG
--# define YYDEBUG 0
--#endif
--
--/* Enabling verbose error messages. */
--#ifdef YYERROR_VERBOSE
--# undef YYERROR_VERBOSE
--# define YYERROR_VERBOSE 1
--#else
--# define YYERROR_VERBOSE 0
--#endif
--
--/* Enabling the token table. */
--#ifndef YYTOKEN_TABLE
--# define YYTOKEN_TABLE 0
--#endif
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 40 "sysinfo.y"
--{
-- int i;
-- char *s;
--}
--/* Line 193 of yacc.c. */
--#line 135 "sysinfo.c"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--
--
--/* Copy the second part of user declarations. */
--
--
--/* Line 216 of yacc.c. */
--#line 148 "sysinfo.c"
--
--#ifdef short
--# undef short
--#endif
--
--#ifdef YYTYPE_UINT8
--typedef YYTYPE_UINT8 yytype_uint8;
--#else
--typedef unsigned char yytype_uint8;
--#endif
--
--#ifdef YYTYPE_INT8
--typedef YYTYPE_INT8 yytype_int8;
--#elif (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--typedef signed char yytype_int8;
--#else
--typedef short int yytype_int8;
--#endif
--
--#ifdef YYTYPE_UINT16
--typedef YYTYPE_UINT16 yytype_uint16;
--#else
--typedef unsigned short int yytype_uint16;
--#endif
--
--#ifdef YYTYPE_INT16
--typedef YYTYPE_INT16 yytype_int16;
--#else
--typedef short int yytype_int16;
--#endif
--
--#ifndef YYSIZE_T
--# ifdef __SIZE_TYPE__
--# define YYSIZE_T __SIZE_TYPE__
--# elif defined size_t
--# define YYSIZE_T size_t
--# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stddef.h> /* INFRINGES ON USER NAME SPACE */
--# define YYSIZE_T size_t
--# else
--# define YYSIZE_T unsigned int
--# endif
--#endif
--
--#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
--
--#ifndef YY_
--# if defined YYENABLE_NLS && YYENABLE_NLS
--# if ENABLE_NLS
--# include <libintl.h> /* INFRINGES ON USER NAME SPACE */
--# define YY_(msgid) dgettext ("bison-runtime", msgid)
--# endif
--# endif
--# ifndef YY_
--# define YY_(msgid) msgid
--# endif
--#endif
--
--/* Suppress unused-variable warnings by "using" E. */
--#if ! defined lint || defined __GNUC__
--# define YYUSE(e) ((void) (e))
--#else
--# define YYUSE(e) /* empty */
--#endif
--
--/* Identity function, used to suppress warnings about constant conditions. */
--#ifndef lint
--# define YYID(n) (n)
--#else
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static int
--YYID (int i)
--#else
--static int
--YYID (i)
-- int i;
--#endif
--{
-- return i;
--}
--#endif
--
--#if ! defined yyoverflow || YYERROR_VERBOSE
--
--/* The parser invokes alloca or malloc; define the necessary symbols. */
--
--# ifdef YYSTACK_USE_ALLOCA
--# if YYSTACK_USE_ALLOCA
--# ifdef __GNUC__
--# define YYSTACK_ALLOC __builtin_alloca
--# elif defined __BUILTIN_VA_ARG_INCR
--# include <alloca.h> /* INFRINGES ON USER NAME SPACE */
--# elif defined _AIX
--# define YYSTACK_ALLOC __alloca
--# elif defined _MSC_VER
--# include <malloc.h> /* INFRINGES ON USER NAME SPACE */
--# define alloca _alloca
--# else
--# define YYSTACK_ALLOC alloca
--# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# endif
--# endif
--# endif
--
--# ifdef YYSTACK_ALLOC
-- /* Pacify GCC's `empty if-body' warning. */
--# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0))
--# ifndef YYSTACK_ALLOC_MAXIMUM
-- /* The OS might guarantee only one guard page at the bottom of the stack,
-- and a page size can be as small as 4096 bytes. So we cannot safely
-- invoke alloca (N) if N exceeds 4096. Use a slightly smaller number
-- to allow for a few compiler-allocated temporary stack slots. */
--# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
--# endif
--# else
--# define YYSTACK_ALLOC YYMALLOC
--# define YYSTACK_FREE YYFREE
--# ifndef YYSTACK_ALLOC_MAXIMUM
--# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
--# endif
--# if (defined __cplusplus && ! defined _STDLIB_H \
-- && ! ((defined YYMALLOC || defined malloc) \
-- && (defined YYFREE || defined free)))
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# ifndef YYMALLOC
--# define YYMALLOC malloc
--# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# ifndef YYFREE
--# define YYFREE free
--# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void free (void *); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# endif
--#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
--
--
--#if (! defined yyoverflow \
-- && (! defined __cplusplus \
-- || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
--
--/* A type that is properly aligned for any stack member. */
--union yyalloc
--{
-- yytype_int16 yyss;
-- YYSTYPE yyvs;
-- };
--
--/* The size of the maximum gap between one aligned stack and the next. */
--# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
--
--/* The size of an array large to enough to hold all stacks, each with
-- N elements. */
--# define YYSTACK_BYTES(N) \
-- ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \
-- + YYSTACK_GAP_MAXIMUM)
--
--/* Copy COUNT objects from FROM to TO. The source and destination do
-- not overlap. */
--# ifndef YYCOPY
--# if defined __GNUC__ && 1 < __GNUC__
--# define YYCOPY(To, From, Count) \
-- __builtin_memcpy (To, From, (Count) * sizeof (*(From)))
--# else
--# define YYCOPY(To, From, Count) \
-- do \
-- { \
-- YYSIZE_T yyi; \
-- for (yyi = 0; yyi < (Count); yyi++) \
-- (To)[yyi] = (From)[yyi]; \
-- } \
-- while (YYID (0))
--# endif
--# endif
--
--/* Relocate STACK from its old location to the new one. The
-- local variables YYSIZE and YYSTACKSIZE give the old and new number of
-- elements in the stack, and YYPTR gives the new location of the
-- stack. Advance YYPTR to a properly aligned location for the next
-- stack. */
--# define YYSTACK_RELOCATE(Stack) \
-- do \
-- { \
-- YYSIZE_T yynewbytes; \
-- YYCOPY (&yyptr->Stack, Stack, yysize); \
-- Stack = &yyptr->Stack; \
-- yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
-- yyptr += yynewbytes / sizeof (*yyptr); \
-- } \
-- while (YYID (0))
--
--#endif
--
--/* YYFINAL -- State number of the termination state. */
--#define YYFINAL 3
--/* YYLAST -- Last index in YYTABLE. */
--#define YYLAST 38
--
--/* YYNTOKENS -- Number of terminals. */
--#define YYNTOKENS 11
--/* YYNNTS -- Number of nonterminals. */
--#define YYNNTS 19
--/* YYNRULES -- Number of rules. */
--#define YYNRULES 27
--/* YYNRULES -- Number of states. */
--#define YYNSTATES 55
--
--/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */
--#define YYUNDEFTOK 2
--#define YYMAXUTOK 263
--
--#define YYTRANSLATE(YYX) \
-- ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
--
--/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */
--static const yytype_uint8 yytranslate[] =
--{
-- 0, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 5, 6, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 1, 2, 3, 4,
-- 7, 8, 9, 10
--};
--
--#if YYDEBUG
--/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
-- YYRHS. */
--static const yytype_uint8 yyprhs[] =
--{
-- 0, 0, 3, 4, 7, 10, 11, 12, 19, 22,
-- 25, 28, 29, 30, 37, 38, 45, 46, 57, 59,
-- 60, 64, 67, 71, 72, 73, 77, 78
--};
--
--/* YYRHS -- A `-1'-separated list of the rules' RHS. */
--static const yytype_int8 yyrhs[] =
--{
-- 12, 0, -1, -1, 13, 14, -1, 15, 14, -1,
-- -1, -1, 5, 8, 9, 16, 17, 6, -1, 22,
-- 17, -1, 20, 17, -1, 18, 17, -1, -1, -1,
-- 5, 4, 8, 19, 17, 6, -1, -1, 5, 3,
-- 8, 21, 17, 6, -1, -1, 5, 25, 5, 24,
-- 26, 6, 27, 23, 28, 6, -1, 7, -1, -1,
-- 5, 8, 6, -1, 9, 10, -1, 5, 8, 6,
-- -1, -1, -1, 5, 29, 6, -1, -1, 29, 5,
-- 8, 8, 6, -1
--};
--
--/* YYRLINE[YYN] -- source line where rule number YYN was defined. */
--static const yytype_uint16 yyrline[] =
--{
-- 0, 54, 54, 54, 92, 93, 98, 97, 169, 170,
-- 171, 172, 176, 175, 223, 222, 250, 249, 357, 358,
-- 362, 367, 373, 374, 377, 378, 380, 382
--};
--#endif
--
--#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE
--/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
-- First, the terminals, then, starting at YYNTOKENS, nonterminals. */
--static const char *const yytname[] =
--{
-- "$end", "error", "$undefined", "COND", "REPEAT", "'('", "')'", "TYPE",
-- "NAME", "NUMBER", "UNIT", "$accept", "top", "@1", "it_list", "it", "@2",
-- "it_field_list", "repeat_it_field", "@3", "cond_it_field", "@4",
-- "it_field", "@5", "attr_type", "attr_desc", "attr_size", "attr_id",
-- "enums", "enum_list", 0
--};
--#endif
--
--# ifdef YYPRINT
--/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to
-- token YYLEX-NUM. */
--static const yytype_uint16 yytoknum[] =
--{
-- 0, 256, 257, 258, 259, 40, 41, 260, 261, 262,
-- 263
--};
--# endif
--
--/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */
--static const yytype_uint8 yyr1[] =
--{
-- 0, 11, 13, 12, 14, 14, 16, 15, 17, 17,
-- 17, 17, 19, 18, 21, 20, 23, 22, 24, 24,
-- 25, 26, 27, 27, 28, 28, 29, 29
--};
--
--/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */
--static const yytype_uint8 yyr2[] =
--{
-- 0, 2, 0, 2, 2, 0, 0, 6, 2, 2,
-- 2, 0, 0, 6, 0, 6, 0, 10, 1, 0,
-- 3, 2, 3, 0, 0, 3, 0, 5
--};
--
--/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
-- STATE-NUM when YYTABLE doesn't specify something else to do. Zero
-- means the default is an error. */
--static const yytype_uint8 yydefact[] =
--{
-- 2, 0, 5, 1, 0, 3, 5, 0, 4, 6,
-- 11, 0, 0, 11, 11, 11, 0, 0, 0, 0,
-- 7, 10, 9, 8, 14, 12, 0, 19, 11, 11,
-- 20, 18, 0, 0, 0, 0, 0, 15, 13, 21,
-- 23, 0, 16, 0, 24, 22, 26, 0, 0, 17,
-- 0, 25, 0, 0, 27
--};
--
--/* YYDEFGOTO[NTERM-NUM]. */
--static const yytype_int8 yydefgoto[] =
--{
-- -1, 1, 2, 5, 6, 10, 12, 13, 29, 14,
-- 28, 15, 44, 32, 19, 36, 42, 47, 48
--};
--
--/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
-- STATE-NUM. */
--#define YYPACT_NINF -14
--static const yytype_int8 yypact[] =
--{
-- -14, 8, 4, -14, 2, -14, 4, 3, -14, -14,
-- 6, 0, 7, 6, 6, 6, 9, 10, 11, 15,
-- -14, -14, -14, -14, -14, -14, 16, 14, 6, 6,
-- -14, -14, 5, 17, 18, 19, 20, -14, -14, -14,
-- 22, 23, -14, 24, 27, -14, -14, 28, 1, -14,
-- 25, -14, 29, 30, -14
--};
--
--/* YYPGOTO[NTERM-NUM]. */
--static const yytype_int8 yypgoto[] =
--{
-- -14, -14, -14, 32, -14, -14, -13, -14, -14, -14,
-- -14, -14, -14, -14, -14, -14, -14, -14, -14
--};
--
--/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If
-- positive, shift that token. If negative, reduce the rule which
-- number is the opposite. If zero, do what YYDEFACT says.
-- If YYTABLE_NINF, syntax error. */
--#define YYTABLE_NINF -1
--static const yytype_uint8 yytable[] =
--{
-- 21, 22, 23, 16, 17, 18, 50, 51, 3, 4,
-- 7, 11, 9, 20, 35, 33, 34, 24, 25, 26,
-- 27, 31, 30, 37, 38, 0, 40, 41, 0, 39,
-- 45, 43, 46, 52, 49, 0, 54, 53, 8
--};
--
--static const yytype_int8 yycheck[] =
--{
-- 13, 14, 15, 3, 4, 5, 5, 6, 0, 5,
-- 8, 5, 9, 6, 9, 28, 29, 8, 8, 8,
-- 5, 7, 6, 6, 6, -1, 6, 5, -1, 10,
-- 6, 8, 5, 8, 6, -1, 6, 8, 6
--};
--
--/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
-- symbol of state STATE-NUM. */
--static const yytype_uint8 yystos[] =
--{
-- 0, 12, 13, 0, 5, 14, 15, 8, 14, 9,
-- 16, 5, 17, 18, 20, 22, 3, 4, 5, 25,
-- 6, 17, 17, 17, 8, 8, 8, 5, 21, 19,
-- 6, 7, 24, 17, 17, 9, 26, 6, 6, 10,
-- 6, 5, 27, 8, 23, 6, 5, 28, 29, 6,
-- 5, 6, 8, 8, 6
--};
--
--#define yyerrok (yyerrstatus = 0)
--#define yyclearin (yychar = YYEMPTY)
--#define YYEMPTY (-2)
--#define YYEOF 0
--
--#define YYACCEPT goto yyacceptlab
--#define YYABORT goto yyabortlab
--#define YYERROR goto yyerrorlab
--
--
--/* Like YYERROR except do call yyerror. This remains here temporarily
-- to ease the transition to the new meaning of YYERROR, for GCC.
-- Once GCC version 2 has supplanted version 1, this can go. */
--
--#define YYFAIL goto yyerrlab
--
--#define YYRECOVERING() (!!yyerrstatus)
--
--#define YYBACKUP(Token, Value) \
--do \
-- if (yychar == YYEMPTY && yylen == 1) \
-- { \
-- yychar = (Token); \
-- yylval = (Value); \
-- yytoken = YYTRANSLATE (yychar); \
-- YYPOPSTACK (1); \
-- goto yybackup; \
-- } \
-- else \
-- { \
-- yyerror (YY_("syntax error: cannot back up")); \
-- YYERROR; \
-- } \
--while (YYID (0))
--
--
--#define YYTERROR 1
--#define YYERRCODE 256
--
--
--/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
-- If N is 0, then set CURRENT to the empty location which ends
-- the previous symbol: RHS[0] (always defined). */
--
--#define YYRHSLOC(Rhs, K) ((Rhs)[K])
--#ifndef YYLLOC_DEFAULT
--# define YYLLOC_DEFAULT(Current, Rhs, N) \
-- do \
-- if (YYID (N)) \
-- { \
-- (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \
-- (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \
-- (Current).last_line = YYRHSLOC (Rhs, N).last_line; \
-- (Current).last_column = YYRHSLOC (Rhs, N).last_column; \
-- } \
-- else \
-- { \
-- (Current).first_line = (Current).last_line = \
-- YYRHSLOC (Rhs, 0).last_line; \
-- (Current).first_column = (Current).last_column = \
-- YYRHSLOC (Rhs, 0).last_column; \
-- } \
-- while (YYID (0))
--#endif
--
--
--/* YY_LOCATION_PRINT -- Print the location on the stream.
-- This macro was not mandated originally: define only if we know
-- we won't break user code: when these are the locations we know. */
--
--#ifndef YY_LOCATION_PRINT
--# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL
--# define YY_LOCATION_PRINT(File, Loc) \
-- fprintf (File, "%d.%d-%d.%d", \
-- (Loc).first_line, (Loc).first_column, \
-- (Loc).last_line, (Loc).last_column)
--# else
--# define YY_LOCATION_PRINT(File, Loc) ((void) 0)
--# endif
--#endif
--
--
--/* YYLEX -- calling `yylex' with the right arguments. */
--
--#ifdef YYLEX_PARAM
--# define YYLEX yylex (YYLEX_PARAM)
--#else
--# define YYLEX yylex ()
--#endif
--
--/* Enable debugging if requested. */
--#if YYDEBUG
--
--# ifndef YYFPRINTF
--# include <stdio.h> /* INFRINGES ON USER NAME SPACE */
--# define YYFPRINTF fprintf
--# endif
--
--# define YYDPRINTF(Args) \
--do { \
-- if (yydebug) \
-- YYFPRINTF Args; \
--} while (YYID (0))
--
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \
--do { \
-- if (yydebug) \
-- { \
-- YYFPRINTF (stderr, "%s ", Title); \
-- yy_symbol_print (stderr, \
-- Type, Value); \
-- YYFPRINTF (stderr, "\n"); \
-- } \
--} while (YYID (0))
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_value_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (!yyvaluep)
-- return;
--# ifdef YYPRINT
-- if (yytype < YYNTOKENS)
-- YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
--# else
-- YYUSE (yyoutput);
--# endif
-- switch (yytype)
-- {
-- default:
-- break;
-- }
--}
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (yytype < YYNTOKENS)
-- YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
-- else
-- YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
--
-- yy_symbol_value_print (yyoutput, yytype, yyvaluep);
-- YYFPRINTF (yyoutput, ")");
--}
--
--/*------------------------------------------------------------------.
--| yy_stack_print -- Print the state stack from its BOTTOM up to its |
--| TOP (included). |
--`------------------------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_stack_print (yytype_int16 *bottom, yytype_int16 *top)
--#else
--static void
--yy_stack_print (bottom, top)
-- yytype_int16 *bottom;
-- yytype_int16 *top;
--#endif
--{
-- YYFPRINTF (stderr, "Stack now");
-- for (; bottom <= top; ++bottom)
-- YYFPRINTF (stderr, " %d", *bottom);
-- YYFPRINTF (stderr, "\n");
--}
--
--# define YY_STACK_PRINT(Bottom, Top) \
--do { \
-- if (yydebug) \
-- yy_stack_print ((Bottom), (Top)); \
--} while (YYID (0))
--
--
--/*------------------------------------------------.
--| Report that the YYRULE is going to be reduced. |
--`------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_reduce_print (YYSTYPE *yyvsp, int yyrule)
--#else
--static void
--yy_reduce_print (yyvsp, yyrule)
-- YYSTYPE *yyvsp;
-- int yyrule;
--#endif
--{
-- int yynrhs = yyr2[yyrule];
-- int yyi;
-- unsigned long int yylno = yyrline[yyrule];
-- YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
-- yyrule - 1, yylno);
-- /* The symbols being reduced. */
-- for (yyi = 0; yyi < yynrhs; yyi++)
-- {
-- fprintf (stderr, " $%d = ", yyi + 1);
-- yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi],
-- &(yyvsp[(yyi + 1) - (yynrhs)])
-- );
-- fprintf (stderr, "\n");
-- }
--}
--
--# define YY_REDUCE_PRINT(Rule) \
--do { \
-- if (yydebug) \
-- yy_reduce_print (yyvsp, Rule); \
--} while (YYID (0))
--
--/* Nonzero means print parse trace. It is left uninitialized so that
-- multiple parsers can coexist. */
--int yydebug;
--#else /* !YYDEBUG */
--# define YYDPRINTF(Args)
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
--# define YY_STACK_PRINT(Bottom, Top)
--# define YY_REDUCE_PRINT(Rule)
--#endif /* !YYDEBUG */
--
--
--/* YYINITDEPTH -- initial size of the parser's stacks. */
--#ifndef YYINITDEPTH
--# define YYINITDEPTH 200
--#endif
--
--/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
-- if the built-in stack extension method is used).
--
-- Do not make this value too large; the results are undefined if
-- YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
-- evaluated with infinite-precision integer arithmetic. */
--
--#ifndef YYMAXDEPTH
--# define YYMAXDEPTH 10000
--#endif
--
--
--
--#if YYERROR_VERBOSE
--
--# ifndef yystrlen
--# if defined __GLIBC__ && defined _STRING_H
--# define yystrlen strlen
--# else
--/* Return the length of YYSTR. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static YYSIZE_T
--yystrlen (const char *yystr)
--#else
--static YYSIZE_T
--yystrlen (yystr)
-- const char *yystr;
--#endif
--{
-- YYSIZE_T yylen;
-- for (yylen = 0; yystr[yylen]; yylen++)
-- continue;
-- return yylen;
--}
--# endif
--# endif
--
--# ifndef yystpcpy
--# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
--# define yystpcpy stpcpy
--# else
--/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
-- YYDEST. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static char *
--yystpcpy (char *yydest, const char *yysrc)
--#else
--static char *
--yystpcpy (yydest, yysrc)
-- char *yydest;
-- const char *yysrc;
--#endif
--{
-- char *yyd = yydest;
-- const char *yys = yysrc;
--
-- while ((*yyd++ = *yys++) != '\0')
-- continue;
--
-- return yyd - 1;
--}
--# endif
--# endif
--
--# ifndef yytnamerr
--/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
-- quotes and backslashes, so that it's suitable for yyerror. The
-- heuristic is that double-quoting is unnecessary unless the string
-- contains an apostrophe, a comma, or backslash (other than
-- backslash-backslash). YYSTR is taken from yytname. If YYRES is
-- null, do not copy; instead, return the length of what the result
-- would have been. */
--static YYSIZE_T
--yytnamerr (char *yyres, const char *yystr)
--{
-- if (*yystr == '"')
-- {
-- YYSIZE_T yyn = 0;
-- char const *yyp = yystr;
--
-- for (;;)
-- switch (*++yyp)
-- {
-- case '\'':
-- case ',':
-- goto do_not_strip_quotes;
--
-- case '\\':
-- if (*++yyp != '\\')
-- goto do_not_strip_quotes;
-- /* Fall through. */
-- default:
-- if (yyres)
-- yyres[yyn] = *yyp;
-- yyn++;
-- break;
--
-- case '"':
-- if (yyres)
-- yyres[yyn] = '\0';
-- return yyn;
-- }
-- do_not_strip_quotes: ;
-- }
--
-- if (! yyres)
-- return yystrlen (yystr);
--
-- return yystpcpy (yyres, yystr) - yyres;
--}
--# endif
--
--/* Copy into YYRESULT an error message about the unexpected token
-- YYCHAR while in state YYSTATE. Return the number of bytes copied,
-- including the terminating null byte. If YYRESULT is null, do not
-- copy anything; just return the number of bytes that would be
-- copied. As a special case, return 0 if an ordinary "syntax error"
-- message will do. Return YYSIZE_MAXIMUM if overflow occurs during
-- size calculation. */
--static YYSIZE_T
--yysyntax_error (char *yyresult, int yystate, int yychar)
--{
-- int yyn = yypact[yystate];
--
-- if (! (YYPACT_NINF < yyn && yyn <= YYLAST))
-- return 0;
-- else
-- {
-- int yytype = YYTRANSLATE (yychar);
-- YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]);
-- YYSIZE_T yysize = yysize0;
-- YYSIZE_T yysize1;
-- int yysize_overflow = 0;
-- enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
-- char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
-- int yyx;
--
--# if 0
-- /* This is so xgettext sees the translatable formats that are
-- constructed on the fly. */
-- YY_("syntax error, unexpected %s");
-- YY_("syntax error, unexpected %s, expecting %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s");
--# endif
-- char *yyfmt;
-- char const *yyf;
-- static char const yyunexpected[] = "syntax error, unexpected %s";
-- static char const yyexpecting[] = ", expecting %s";
-- static char const yyor[] = " or %s";
-- char yyformat[sizeof yyunexpected
-- + sizeof yyexpecting - 1
-- + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2)
-- * (sizeof yyor - 1))];
-- char const *yyprefix = yyexpecting;
--
-- /* Start YYX at -YYN if negative to avoid negative indexes in
-- YYCHECK. */
-- int yyxbegin = yyn < 0 ? -yyn : 0;
--
-- /* Stay within bounds of both yycheck and yytname. */
-- int yychecklim = YYLAST - yyn + 1;
-- int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
-- int yycount = 1;
--
-- yyarg[0] = yytname[yytype];
-- yyfmt = yystpcpy (yyformat, yyunexpected);
--
-- for (yyx = yyxbegin; yyx < yyxend; ++yyx)
-- if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
-- {
-- if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
-- {
-- yycount = 1;
-- yysize = yysize0;
-- yyformat[sizeof yyunexpected - 1] = '\0';
-- break;
-- }
-- yyarg[yycount++] = yytname[yyx];
-- yysize1 = yysize + yytnamerr (0, yytname[yyx]);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
-- yyfmt = yystpcpy (yyfmt, yyprefix);
-- yyprefix = yyor;
-- }
--
-- yyf = YY_(yyformat);
-- yysize1 = yysize + yystrlen (yyf);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
--
-- if (yysize_overflow)
-- return YYSIZE_MAXIMUM;
--
-- if (yyresult)
-- {
-- /* Avoid sprintf, as that infringes on the user's name space.
-- Don't have undefined behavior even if the translation
-- produced a string with the wrong number of "%s"s. */
-- char *yyp = yyresult;
-- int yyi = 0;
-- while ((*yyp = *yyf) != '\0')
-- {
-- if (*yyp == '%' && yyf[1] == 's' && yyi < yycount)
-- {
-- yyp += yytnamerr (yyp, yyarg[yyi++]);
-- yyf += 2;
-- }
-- else
-- {
-- yyp++;
-- yyf++;
-- }
-- }
-- }
-- return yysize;
-- }
--}
--#endif /* YYERROR_VERBOSE */
--
--
--/*-----------------------------------------------.
--| Release the memory associated to this symbol. |
--`-----------------------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep)
--#else
--static void
--yydestruct (yymsg, yytype, yyvaluep)
-- const char *yymsg;
-- int yytype;
-- YYSTYPE *yyvaluep;
--#endif
--{
-- YYUSE (yyvaluep);
--
-- if (!yymsg)
-- yymsg = "Deleting";
-- YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
--
-- switch (yytype)
-- {
--
-- default:
-- break;
-- }
--}
--
--
--/* Prevent warnings from -Wmissing-prototypes. */
--
--#ifdef YYPARSE_PARAM
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void *YYPARSE_PARAM);
--#else
--int yyparse ();
--#endif
--#else /* ! YYPARSE_PARAM */
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void);
--#else
--int yyparse ();
--#endif
--#endif /* ! YYPARSE_PARAM */
--
--
--
--/* The look-ahead symbol. */
--int yychar;
--
--/* The semantic value of the look-ahead symbol. */
--YYSTYPE yylval;
--
--/* Number of syntax errors so far. */
--int yynerrs;
--
--
--
--/*----------.
--| yyparse. |
--`----------*/
--
--#ifdef YYPARSE_PARAM
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void *YYPARSE_PARAM)
--#else
--int
--yyparse (YYPARSE_PARAM)
-- void *YYPARSE_PARAM;
--#endif
--#else /* ! YYPARSE_PARAM */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void)
--#else
--int
--yyparse ()
--
--#endif
--#endif
--{
--
-- int yystate;
-- int yyn;
-- int yyresult;
-- /* Number of tokens to shift before error messages enabled. */
-- int yyerrstatus;
-- /* Look-ahead token as an internal (translated) token number. */
-- int yytoken = 0;
--#if YYERROR_VERBOSE
-- /* Buffer for error messages, and its allocated size. */
-- char yymsgbuf[128];
-- char *yymsg = yymsgbuf;
-- YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
--#endif
--
-- /* Three stacks and their tools:
-- `yyss': related to states,
-- `yyvs': related to semantic values,
-- `yyls': related to locations.
--
-- Refer to the stacks thru separate pointers, to allow yyoverflow
-- to reallocate them elsewhere. */
--
-- /* The state stack. */
-- yytype_int16 yyssa[YYINITDEPTH];
-- yytype_int16 *yyss = yyssa;
-- yytype_int16 *yyssp;
--
-- /* The semantic value stack. */
-- YYSTYPE yyvsa[YYINITDEPTH];
-- YYSTYPE *yyvs = yyvsa;
-- YYSTYPE *yyvsp;
--
--
--
--#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N))
--
-- YYSIZE_T yystacksize = YYINITDEPTH;
--
-- /* The variables used to return semantic value and location from the
-- action routines. */
-- YYSTYPE yyval;
--
--
-- /* The number of symbols on the RHS of the reduced rule.
-- Keep to zero when no symbol should be popped. */
-- int yylen = 0;
--
-- YYDPRINTF ((stderr, "Starting parse\n"));
--
-- yystate = 0;
-- yyerrstatus = 0;
-- yynerrs = 0;
-- yychar = YYEMPTY; /* Cause a token to be read. */
--
-- /* Initialize stack pointers.
-- Waste one element of value and location stack
-- so that they stay on the same level as the state stack.
-- The wasted elements are never initialized. */
--
-- yyssp = yyss;
-- yyvsp = yyvs;
--
-- goto yysetstate;
--
--/*------------------------------------------------------------.
--| yynewstate -- Push a new state, which is found in yystate. |
--`------------------------------------------------------------*/
-- yynewstate:
-- /* In all cases, when you get here, the value and location stacks
-- have just been pushed. So pushing a state here evens the stacks. */
-- yyssp++;
--
-- yysetstate:
-- *yyssp = yystate;
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- {
-- /* Get the current used size of the three stacks, in elements. */
-- YYSIZE_T yysize = yyssp - yyss + 1;
--
--#ifdef yyoverflow
-- {
-- /* Give user a chance to reallocate the stack. Use copies of
-- these so that the &'s don't force the real ones into
-- memory. */
-- YYSTYPE *yyvs1 = yyvs;
-- yytype_int16 *yyss1 = yyss;
--
--
-- /* Each stack pointer address is followed by the size of the
-- data in use in that stack, in bytes. This used to be a
-- conditional around just the two extra args, but that might
-- be undefined if yyoverflow is a macro. */
-- yyoverflow (YY_("memory exhausted"),
-- &yyss1, yysize * sizeof (*yyssp),
-- &yyvs1, yysize * sizeof (*yyvsp),
--
-- &yystacksize);
--
-- yyss = yyss1;
-- yyvs = yyvs1;
-- }
--#else /* no yyoverflow */
--# ifndef YYSTACK_RELOCATE
-- goto yyexhaustedlab;
--# else
-- /* Extend the stack our own way. */
-- if (YYMAXDEPTH <= yystacksize)
-- goto yyexhaustedlab;
-- yystacksize *= 2;
-- if (YYMAXDEPTH < yystacksize)
-- yystacksize = YYMAXDEPTH;
--
-- {
-- yytype_int16 *yyss1 = yyss;
-- union yyalloc *yyptr =
-- (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
-- if (! yyptr)
-- goto yyexhaustedlab;
-- YYSTACK_RELOCATE (yyss);
-- YYSTACK_RELOCATE (yyvs);
--
--# undef YYSTACK_RELOCATE
-- if (yyss1 != yyssa)
-- YYSTACK_FREE (yyss1);
-- }
--# endif
--#endif /* no yyoverflow */
--
-- yyssp = yyss + yysize - 1;
-- yyvsp = yyvs + yysize - 1;
--
--
-- YYDPRINTF ((stderr, "Stack size increased to %lu\n",
-- (unsigned long int) yystacksize));
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- YYABORT;
-- }
--
-- YYDPRINTF ((stderr, "Entering state %d\n", yystate));
--
-- goto yybackup;
--
--/*-----------.
--| yybackup. |
--`-----------*/
--yybackup:
--
-- /* Do appropriate processing given the current state. Read a
-- look-ahead token if we need one and don't already have one. */
--
-- /* First try to decide what to do without reference to look-ahead token. */
-- yyn = yypact[yystate];
-- if (yyn == YYPACT_NINF)
-- goto yydefault;
--
-- /* Not known => get a look-ahead token if don't already have one. */
--
-- /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */
-- if (yychar == YYEMPTY)
-- {
-- YYDPRINTF ((stderr, "Reading a token: "));
-- yychar = YYLEX;
-- }
--
-- if (yychar <= YYEOF)
-- {
-- yychar = yytoken = YYEOF;
-- YYDPRINTF ((stderr, "Now at end of input.\n"));
-- }
-- else
-- {
-- yytoken = YYTRANSLATE (yychar);
-- YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
-- }
--
-- /* If the proper action on seeing token YYTOKEN is to reduce or to
-- detect an error, take that action. */
-- yyn += yytoken;
-- if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
-- goto yydefault;
-- yyn = yytable[yyn];
-- if (yyn <= 0)
-- {
-- if (yyn == 0 || yyn == YYTABLE_NINF)
-- goto yyerrlab;
-- yyn = -yyn;
-- goto yyreduce;
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- /* Count tokens shifted since error; after three, turn off error
-- status. */
-- if (yyerrstatus)
-- yyerrstatus--;
--
-- /* Shift the look-ahead token. */
-- YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
--
-- /* Discard the shifted token unless it is eof. */
-- if (yychar != YYEOF)
-- yychar = YYEMPTY;
--
-- yystate = yyn;
-- *++yyvsp = yylval;
--
-- goto yynewstate;
--
--
--/*-----------------------------------------------------------.
--| yydefault -- do the default action for the current state. |
--`-----------------------------------------------------------*/
--yydefault:
-- yyn = yydefact[yystate];
-- if (yyn == 0)
-- goto yyerrlab;
-- goto yyreduce;
--
--
--/*-----------------------------.
--| yyreduce -- Do a reduction. |
--`-----------------------------*/
--yyreduce:
-- /* yyn is the number of a rule to reduce with. */
-- yylen = yyr2[yyn];
--
-- /* If YYLEN is nonzero, implement the default value of the action:
-- `$$ = $1'.
--
-- Otherwise, the following line sets YYVAL to garbage.
-- This behavior is undocumented and Bison
-- users should not rely upon it. Assigning to YYVAL
-- unconditionally makes the parser a bit smaller, and it avoids a
-- GCC warning that YYVAL may be used uninitialized. */
-- yyval = yyvsp[1-yylen];
--
--
-- YY_REDUCE_PRINT (yyn);
-- switch (yyn)
-- {
-- case 2:
--#line 54 "sysinfo.y"
-- {
-- switch (writecode)
-- {
-- case 'i':
-- printf("#ifdef SYSROFF_SWAP_IN\n");
-- break;
-- case 'p':
-- printf("#ifdef SYSROFF_p\n");
-- break;
-- case 'd':
-- break;
-- case 'g':
-- printf("#ifdef SYSROFF_SWAP_OUT\n");
-- break;
-- case 'c':
-- printf("#ifdef SYSROFF_PRINT\n");
-- printf("#include <stdio.h>\n");
-- printf("#include <stdlib.h>\n");
-- printf("#include <ansidecl.h>\n");
-- break;
-- }
-- }
-- break;
--
-- case 3:
--#line 76 "sysinfo.y"
-- {
-- switch (writecode) {
-- case 'i':
-- case 'p':
-- case 'g':
-- case 'c':
-- printf("#endif\n");
-- break;
-- case 'd':
-- break;
-- }
--}
-- break;
--
-- case 6:
--#line 98 "sysinfo.y"
-- {
-- it = (yyvsp[(2) - (3)].s); code = (yyvsp[(3) - (3)].i);
-- switch (writecode)
-- {
-- case 'd':
-- printf("\n\n\n#define IT_%s_CODE 0x%x\n", it,code);
-- printf("struct IT_%s;\n", it);
-- printf("extern void sysroff_swap_%s_in (struct IT_%s *);\n",
-- (yyvsp[(2) - (3)].s), it);
-- printf("extern void sysroff_swap_%s_out (FILE *, struct IT_%s *);\n",
-- (yyvsp[(2) - (3)].s), it);
-- printf("extern void sysroff_print_%s_out (struct IT_%s *);\n",
-- (yyvsp[(2) - (3)].s), it);
-- printf("struct IT_%s { \n", it);
-- break;
-- case 'i':
-- printf("void sysroff_swap_%s_in (struct IT_%s * ptr)\n",(yyvsp[(2) - (3)].s),it);
-- printf("{\n");
-- printf("\tunsigned char raw[255];\n");
-- printf("\tint idx = 0;\n");
-- printf("\tint size;\n");
-- printf("\tmemset(raw,0,255);\n");
-- printf("\tmemset(ptr,0,sizeof(*ptr));\n");
-- printf("\tsize = fillup(raw);\n");
-- break;
-- case 'g':
-- printf("void sysroff_swap_%s_out (FILE * ffile, struct IT_%s * ptr)\n",(yyvsp[(2) - (3)].s),it);
-- printf("{\n");
-- printf("\tunsigned char raw[255];\n");
-- printf("\tint idx = 16;\n");
-- printf("\tmemset (raw, 0, 255);\n");
-- printf("\tcode = IT_%s_CODE;\n", it);
-- break;
-- case 'o':
-- printf("void sysroff_swap_%s_out (bfd * abfd, struct IT_%s * ptr)\n",(yyvsp[(2) - (3)].s), it);
-- printf("{\n");
-- printf("\tint idx = 0;\n");
-- break;
-- case 'c':
-- printf("void sysroff_print_%s_out (struct IT_%s *ptr)\n",(yyvsp[(2) - (3)].s),it);
-- printf("{\n");
-- printf("itheader(\"%s\", IT_%s_CODE);\n",(yyvsp[(2) - (3)].s),(yyvsp[(2) - (3)].s));
-- break;
--
-- case 't':
-- break;
-- }
--
-- }
-- break;
--
-- case 7:
--#line 149 "sysinfo.y"
-- {
-- switch (writecode) {
-- case 'd':
-- printf("};\n");
-- break;
-- case 'g':
-- printf("\tchecksum(ffile,raw, idx, IT_%s_CODE);\n", it);
--
-- case 'i':
--
-- case 'o':
-- case 'c':
-- printf("}\n");
-- }
--}
-- break;
--
-- case 12:
--#line 176 "sysinfo.y"
-- {
-- rdepth++;
-- switch (writecode)
-- {
-- case 'c':
-- if (rdepth==1)
-- printf("\tprintf(\"repeat %%d\\n\", %s);\n",(yyvsp[(3) - (3)].s));
-- if (rdepth==2)
-- printf("\tprintf(\"repeat %%d\\n\", %s[n]);\n",(yyvsp[(3) - (3)].s));
-- case 'i':
-- case 'g':
-- case 'o':
--
-- if (rdepth==1)
-- {
-- printf("\t{ int n; for (n = 0; n < %s; n++) {\n", (yyvsp[(3) - (3)].s));
-- }
-- if (rdepth == 2) {
-- printf("\t{ int m; for (m = 0; m < %s[n]; m++) {\n", (yyvsp[(3) - (3)].s));
-- }
--
-- break;
-- }
--
-- oldrepeat = repeat;
-- repeat = (yyvsp[(3) - (3)].s);
-- }
-- break;
--
-- case 13:
--#line 206 "sysinfo.y"
-- {
-- repeat = oldrepeat;
-- oldrepeat =0;
-- rdepth--;
-- switch (writecode)
-- {
-- case 'i':
-- case 'g':
-- case 'o':
-- case 'c':
-- printf("\t}}\n");
-- }
-- }
-- break;
--
-- case 14:
--#line 223 "sysinfo.y"
-- {
-- switch (writecode)
-- {
-- case 'i':
-- case 'g':
-- case 'o':
-- case 'c':
-- printf("\tif (%s) {\n", (yyvsp[(3) - (3)].s));
-- break;
-- }
-- }
-- break;
--
-- case 15:
--#line 236 "sysinfo.y"
-- {
-- switch (writecode)
-- {
-- case 'i':
-- case 'g':
-- case 'o':
-- case 'c':
-- printf("\t}\n");
-- }
-- }
-- break;
--
-- case 16:
--#line 250 "sysinfo.y"
-- {name = (yyvsp[(7) - (7)].s); }
-- break;
--
-- case 17:
--#line 252 "sysinfo.y"
-- {
-- char *desc = (yyvsp[(2) - (10)].s);
-- char *type = (yyvsp[(4) - (10)].s);
-- int size = (yyvsp[(5) - (10)].i);
-- char *id = (yyvsp[(7) - (10)].s);
--char *p = names[rdepth];
--char *ptr = pnames[rdepth];
-- switch (writecode)
-- {
-- case 'g':
-- if (size % 8)
-- {
--
-- printf("\twriteBITS(ptr->%s%s,raw,&idx,%d);\n",
-- id,
-- names[rdepth], size);
--
-- }
-- else {
-- printf("\twrite%s(ptr->%s%s,raw,&idx,%d,ffile);\n",
-- type,
-- id,
-- names[rdepth],size/8);
-- }
-- break;
-- case 'i':
-- {
--
-- if (rdepth >= 1)
--
-- {
-- printf("if (!ptr->%s) ptr->%s = (%s*)xcalloc(%s, sizeof(ptr->%s[0]));\n",
-- id,
-- id,
-- type,
-- repeat,
-- id);
-- }
--
-- if (rdepth == 2)
-- {
-- printf("if (!ptr->%s[n]) ptr->%s[n] = (%s**)xcalloc(%s[n], sizeof(ptr->%s[n][0]));\n",
-- id,
-- id,
-- type,
-- repeat,
-- id);
-- }
--
-- }
--
-- if (size % 8)
-- {
-- printf("\tptr->%s%s = getBITS(raw,&idx, %d,size);\n",
-- id,
-- names[rdepth],
-- size);
-- }
-- else {
-- printf("\tptr->%s%s = get%s(raw,&idx, %d,size);\n",
-- id,
-- names[rdepth],
-- type,
-- size/8);
-- }
-- break;
-- case 'o':
-- printf("\tput%s(raw,%d,%d,&idx,ptr->%s%s);\n", type,size/8,size%8,id,names[rdepth]);
-- break;
-- case 'd':
-- if (repeat)
-- printf("\t/* repeat %s */\n", repeat);
--
-- if (type[0] == 'I') {
-- printf("\tint %s%s; \t/* %s */\n",ptr,id, desc);
-- }
-- else if (type[0] =='C') {
-- printf("\tchar %s*%s;\t /* %s */\n",ptr,id, desc);
-- }
-- else {
-- printf("\tbarray %s%s;\t /* %s */\n",ptr,id, desc);
-- }
-- break;
-- case 'c':
-- printf("tabout();\n");
-- printf("\tprintf(\"/*%-30s*/ ptr->%s = \");\n", desc, id);
--
-- if (type[0] == 'I')
-- printf("\tprintf(\"%%d\\n\",ptr->%s%s);\n", id,p);
-- else if (type[0] == 'C')
-- printf("\tprintf(\"%%s\\n\",ptr->%s%s);\n", id,p);
--
-- else if (type[0] == 'B')
-- {
-- printf("\tpbarray(&ptr->%s%s);\n", id,p);
-- }
-- else abort();
-- break;
-- }
-- }
-- break;
--
-- case 18:
--#line 357 "sysinfo.y"
-- { (yyval.s) = (yyvsp[(1) - (1)].s); }
-- break;
--
-- case 19:
--#line 358 "sysinfo.y"
-- { (yyval.s) = "INT";}
-- break;
--
-- case 20:
--#line 363 "sysinfo.y"
-- { (yyval.s) = (yyvsp[(2) - (3)].s); }
-- break;
--
-- case 21:
--#line 368 "sysinfo.y"
-- { (yyval.i) = (yyvsp[(1) - (2)].i) * (yyvsp[(2) - (2)].i); }
-- break;
--
-- case 22:
--#line 373 "sysinfo.y"
-- { (yyval.s) = (yyvsp[(2) - (3)].s); }
-- break;
--
-- case 23:
--#line 374 "sysinfo.y"
-- { (yyval.s) = "dummy";}
-- break;
--
-- case 27:
--#line 382 "sysinfo.y"
-- {
-- switch (writecode)
-- {
-- case 'd':
-- printf("#define %s %s\n", (yyvsp[(3) - (5)].s),(yyvsp[(4) - (5)].s));
-- break;
-- case 'c':
-- printf("if (ptr->%s%s == %s) { tabout(); printf(\"%s\\n\");}\n", name, names[rdepth],(yyvsp[(4) - (5)].s),(yyvsp[(3) - (5)].s));
-- }
-- }
-- break;
--
--
--/* Line 1267 of yacc.c. */
--#line 1715 "sysinfo.c"
-- default: break;
-- }
-- YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
--
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
--
-- *++yyvsp = yyval;
--
--
-- /* Now `shift' the result of the reduction. Determine what state
-- that goes to, based on the state we popped back to and the rule
-- number reduced by. */
--
-- yyn = yyr1[yyn];
--
-- yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
-- if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
-- yystate = yytable[yystate];
-- else
-- yystate = yydefgoto[yyn - YYNTOKENS];
--
-- goto yynewstate;
--
--
--/*------------------------------------.
--| yyerrlab -- here on detecting error |
--`------------------------------------*/
--yyerrlab:
-- /* If not already recovering from an error, report this error. */
-- if (!yyerrstatus)
-- {
-- ++yynerrs;
--#if ! YYERROR_VERBOSE
-- yyerror (YY_("syntax error"));
--#else
-- {
-- YYSIZE_T yysize = yysyntax_error (0, yystate, yychar);
-- if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM)
-- {
-- YYSIZE_T yyalloc = 2 * yysize;
-- if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM))
-- yyalloc = YYSTACK_ALLOC_MAXIMUM;
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
-- yymsg = (char *) YYSTACK_ALLOC (yyalloc);
-- if (yymsg)
-- yymsg_alloc = yyalloc;
-- else
-- {
-- yymsg = yymsgbuf;
-- yymsg_alloc = sizeof yymsgbuf;
-- }
-- }
--
-- if (0 < yysize && yysize <= yymsg_alloc)
-- {
-- (void) yysyntax_error (yymsg, yystate, yychar);
-- yyerror (yymsg);
-- }
-- else
-- {
-- yyerror (YY_("syntax error"));
-- if (yysize != 0)
-- goto yyexhaustedlab;
-- }
-- }
--#endif
-- }
--
--
--
-- if (yyerrstatus == 3)
-- {
-- /* If just tried and failed to reuse look-ahead token after an
-- error, discard it. */
--
-- if (yychar <= YYEOF)
-- {
-- /* Return failure if at end of input. */
-- if (yychar == YYEOF)
-- YYABORT;
-- }
-- else
-- {
-- yydestruct ("Error: discarding",
-- yytoken, &yylval);
-- yychar = YYEMPTY;
-- }
-- }
--
-- /* Else will try to reuse look-ahead token after shifting the error
-- token. */
-- goto yyerrlab1;
--
--
--/*---------------------------------------------------.
--| yyerrorlab -- error raised explicitly by YYERROR. |
--`---------------------------------------------------*/
--yyerrorlab:
--
-- /* Pacify compilers like GCC when the user code never invokes
-- YYERROR and the label yyerrorlab therefore never appears in user
-- code. */
-- if (/*CONSTCOND*/ 0)
-- goto yyerrorlab;
--
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYERROR. */
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
-- yystate = *yyssp;
-- goto yyerrlab1;
--
--
--/*-------------------------------------------------------------.
--| yyerrlab1 -- common code for both syntax error and YYERROR. |
--`-------------------------------------------------------------*/
--yyerrlab1:
-- yyerrstatus = 3; /* Each real token shifted decrements this. */
--
-- for (;;)
-- {
-- yyn = yypact[yystate];
-- if (yyn != YYPACT_NINF)
-- {
-- yyn += YYTERROR;
-- if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
-- {
-- yyn = yytable[yyn];
-- if (0 < yyn)
-- break;
-- }
-- }
--
-- /* Pop the current state because it cannot handle the error token. */
-- if (yyssp == yyss)
-- YYABORT;
--
--
-- yydestruct ("Error: popping",
-- yystos[yystate], yyvsp);
-- YYPOPSTACK (1);
-- yystate = *yyssp;
-- YY_STACK_PRINT (yyss, yyssp);
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- *++yyvsp = yylval;
--
--
-- /* Shift the error token. */
-- YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
--
-- yystate = yyn;
-- goto yynewstate;
--
--
--/*-------------------------------------.
--| yyacceptlab -- YYACCEPT comes here. |
--`-------------------------------------*/
--yyacceptlab:
-- yyresult = 0;
-- goto yyreturn;
--
--/*-----------------------------------.
--| yyabortlab -- YYABORT comes here. |
--`-----------------------------------*/
--yyabortlab:
-- yyresult = 1;
-- goto yyreturn;
--
--#ifndef yyoverflow
--/*-------------------------------------------------.
--| yyexhaustedlab -- memory exhaustion comes here. |
--`-------------------------------------------------*/
--yyexhaustedlab:
-- yyerror (YY_("memory exhausted"));
-- yyresult = 2;
-- /* Fall through. */
--#endif
--
--yyreturn:
-- if (yychar != YYEOF && yychar != YYEMPTY)
-- yydestruct ("Cleanup: discarding lookahead",
-- yytoken, &yylval);
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYABORT or YYACCEPT. */
-- YYPOPSTACK (yylen);
-- YY_STACK_PRINT (yyss, yyssp);
-- while (yyssp != yyss)
-- {
-- yydestruct ("Cleanup: popping",
-- yystos[*yyssp], yyvsp);
-- YYPOPSTACK (1);
-- }
--#ifndef yyoverflow
-- if (yyss != yyssa)
-- YYSTACK_FREE (yyss);
--#endif
--#if YYERROR_VERBOSE
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
--#endif
-- /* Make sure YYID is used. */
-- return YYID (yyresult);
--}
--
--
--#line 397 "sysinfo.y"
--
--/* four modes
--
-- -d write structure definitions for sysroff in host format
-- -i write functions to swap into sysroff format in
-- -o write functions to swap into sysroff format out
-- -c write code to print info in human form */
--
--int yydebug;
--
--int
--main (int ac, char **av)
--{
-- yydebug=0;
-- if (ac > 1)
-- writecode = av[1][1];
--if (writecode == 'd')
-- {
-- printf("typedef struct { unsigned char *data; int len; } barray; \n");
-- printf("typedef int INT;\n");
-- printf("typedef char * CHARS;\n");
--
-- }
-- yyparse();
--return 0;
--}
--
--static int
--yyerror (char *s)
--{
-- fprintf(stderr, "%s\n" , s);
-- return 0;
--}
--
-diff -Nur binutils-2.24.orig/binutils/sysinfo.h binutils-2.24/binutils/sysinfo.h
---- binutils-2.24.orig/binutils/sysinfo.h 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/sysinfo.h 1970-01-01 01:00:00.000000000 +0100
-@@ -1,77 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton interface for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- COND = 258,
-- REPEAT = 259,
-- TYPE = 260,
-- NAME = 261,
-- NUMBER = 262,
-- UNIT = 263
-- };
--#endif
--/* Tokens. */
--#define COND 258
--#define REPEAT 259
--#define TYPE 260
--#define NAME 261
--#define NUMBER 262
--#define UNIT 263
--
--
--
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 40 "sysinfo.y"
--{
-- int i;
-- char *s;
--}
--/* Line 1529 of yacc.c. */
--#line 70 "sysinfo.h"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--extern YYSTYPE yylval;
--
-diff -Nur binutils-2.24.orig/binutils/syslex.c binutils-2.24/binutils/syslex.c
---- binutils-2.24.orig/binutils/syslex.c 2013-11-18 09:49:30.000000000 +0100
-+++ binutils-2.24/binutils/syslex.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,1906 +0,0 @@
--
--#line 3 "syslex.c"
--
--#define YY_INT_ALIGNED short int
--
--/* A lexical scanner generated by flex */
--
--#define FLEX_SCANNER
--#define YY_FLEX_MAJOR_VERSION 2
--#define YY_FLEX_MINOR_VERSION 5
--#define YY_FLEX_SUBMINOR_VERSION 35
--#if YY_FLEX_SUBMINOR_VERSION > 0
--#define FLEX_BETA
--#endif
--
--/* First, we deal with platform-specific or compiler-specific issues. */
--
--/* begin standard C headers. */
--#include <stdio.h>
--#include <string.h>
--#include <errno.h>
--#include <stdlib.h>
--
--/* end standard C headers. */
--
--/* flex integer type definitions */
--
--#ifndef FLEXINT_H
--#define FLEXINT_H
--
--/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */
--
--#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
--
--/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
-- * if you want the limit (max/min) macros for int types.
-- */
--#ifndef __STDC_LIMIT_MACROS
--#define __STDC_LIMIT_MACROS 1
--#endif
--
--#include <inttypes.h>
--typedef int8_t flex_int8_t;
--typedef uint8_t flex_uint8_t;
--typedef int16_t flex_int16_t;
--typedef uint16_t flex_uint16_t;
--typedef int32_t flex_int32_t;
--typedef uint32_t flex_uint32_t;
--typedef uint64_t flex_uint64_t;
--#else
--typedef signed char flex_int8_t;
--typedef short int flex_int16_t;
--typedef int flex_int32_t;
--typedef unsigned char flex_uint8_t;
--typedef unsigned short int flex_uint16_t;
--typedef unsigned int flex_uint32_t;
--#endif /* ! C99 */
--
--/* Limits of integral types. */
--#ifndef INT8_MIN
--#define INT8_MIN (-128)
--#endif
--#ifndef INT16_MIN
--#define INT16_MIN (-32767-1)
--#endif
--#ifndef INT32_MIN
--#define INT32_MIN (-2147483647-1)
--#endif
--#ifndef INT8_MAX
--#define INT8_MAX (127)
--#endif
--#ifndef INT16_MAX
--#define INT16_MAX (32767)
--#endif
--#ifndef INT32_MAX
--#define INT32_MAX (2147483647)
--#endif
--#ifndef UINT8_MAX
--#define UINT8_MAX (255U)
--#endif
--#ifndef UINT16_MAX
--#define UINT16_MAX (65535U)
--#endif
--#ifndef UINT32_MAX
--#define UINT32_MAX (4294967295U)
--#endif
--
--#endif /* ! FLEXINT_H */
--
--#ifdef __cplusplus
--
--/* The "const" storage-class-modifier is valid. */
--#define YY_USE_CONST
--
--#else /* ! __cplusplus */
--
--/* C99 requires __STDC__ to be defined as 1. */
--#if defined (__STDC__)
--
--#define YY_USE_CONST
--
--#endif /* defined (__STDC__) */
--#endif /* ! __cplusplus */
--
--#ifdef YY_USE_CONST
--#define yyconst const
--#else
--#define yyconst
--#endif
--
--/* Returned upon end-of-file. */
--#define YY_NULL 0
--
--/* Promotes a possibly negative, possibly signed char to an unsigned
-- * integer for use as an array index. If the signed char is negative,
-- * we want to instead treat it as an 8-bit unsigned char, hence the
-- * double cast.
-- */
--#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c)
--
--/* Enter a start condition. This macro really ought to take a parameter,
-- * but we do it the disgusting crufty way forced on us by the ()-less
-- * definition of BEGIN.
-- */
--#define BEGIN (yy_start) = 1 + 2 *
--
--/* Translate the current start state into a value that can be later handed
-- * to BEGIN to return to the state. The YYSTATE alias is for lex
-- * compatibility.
-- */
--#define YY_START (((yy_start) - 1) / 2)
--#define YYSTATE YY_START
--
--/* Action number for EOF rule of a given start state. */
--#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1)
--
--/* Special action meaning "start processing a new file". */
--#define YY_NEW_FILE yyrestart(yyin )
--
--#define YY_END_OF_BUFFER_CHAR 0
--
--/* Size of default input buffer. */
--#ifndef YY_BUF_SIZE
--#define YY_BUF_SIZE 16384
--#endif
--
--/* The state buf must be large enough to hold one state per character in the main buffer.
-- */
--#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type))
--
--#ifndef YY_TYPEDEF_YY_BUFFER_STATE
--#define YY_TYPEDEF_YY_BUFFER_STATE
--typedef struct yy_buffer_state *YY_BUFFER_STATE;
--#endif
--
--#ifndef YY_TYPEDEF_YY_SIZE_T
--#define YY_TYPEDEF_YY_SIZE_T
--typedef size_t yy_size_t;
--#endif
--
--extern yy_size_t yyleng;
--
--extern FILE *yyin, *yyout;
--
--#define EOB_ACT_CONTINUE_SCAN 0
--#define EOB_ACT_END_OF_FILE 1
--#define EOB_ACT_LAST_MATCH 2
--
-- #define YY_LESS_LINENO(n)
--
--/* Return all but the first "n" matched characters back to the input stream. */
--#define yyless(n) \
-- do \
-- { \
-- /* Undo effects of setting up yytext. */ \
-- int yyless_macro_arg = (n); \
-- YY_LESS_LINENO(yyless_macro_arg);\
-- *yy_cp = (yy_hold_char); \
-- YY_RESTORE_YY_MORE_OFFSET \
-- (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \
-- YY_DO_BEFORE_ACTION; /* set up yytext again */ \
-- } \
-- while ( 0 )
--
--#define unput(c) yyunput( c, (yytext_ptr) )
--
--#ifndef YY_STRUCT_YY_BUFFER_STATE
--#define YY_STRUCT_YY_BUFFER_STATE
--struct yy_buffer_state
-- {
-- FILE *yy_input_file;
--
-- char *yy_ch_buf; /* input buffer */
-- char *yy_buf_pos; /* current position in input buffer */
--
-- /* Size of input buffer in bytes, not including room for EOB
-- * characters.
-- */
-- yy_size_t yy_buf_size;
--
-- /* Number of characters read into yy_ch_buf, not including EOB
-- * characters.
-- */
-- yy_size_t yy_n_chars;
--
-- /* Whether we "own" the buffer - i.e., we know we created it,
-- * and can realloc() it to grow it, and should free() it to
-- * delete it.
-- */
-- int yy_is_our_buffer;
--
-- /* Whether this is an "interactive" input source; if so, and
-- * if we're using stdio for input, then we want to use getc()
-- * instead of fread(), to make sure we stop fetching input after
-- * each newline.
-- */
-- int yy_is_interactive;
--
-- /* Whether we're considered to be at the beginning of a line.
-- * If so, '^' rules will be active on the next match, otherwise
-- * not.
-- */
-- int yy_at_bol;
--
-- int yy_bs_lineno; /**< The line count. */
-- int yy_bs_column; /**< The column count. */
--
-- /* Whether to try to fill the input buffer when we reach the
-- * end of it.
-- */
-- int yy_fill_buffer;
--
-- int yy_buffer_status;
--
--#define YY_BUFFER_NEW 0
--#define YY_BUFFER_NORMAL 1
-- /* When an EOF's been seen but there's still some text to process
-- * then we mark the buffer as YY_EOF_PENDING, to indicate that we
-- * shouldn't try reading from the input source any more. We might
-- * still have a bunch of tokens to match, though, because of
-- * possible backing-up.
-- *
-- * When we actually see the EOF, we change the status to "new"
-- * (via yyrestart()), so that the user can continue scanning by
-- * just pointing yyin at a new input file.
-- */
--#define YY_BUFFER_EOF_PENDING 2
--
-- };
--#endif /* !YY_STRUCT_YY_BUFFER_STATE */
--
--/* Stack of input buffers. */
--static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */
--static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */
--static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */
--
--/* We provide macros for accessing buffer states in case in the
-- * future we want to put the buffer states in a more general
-- * "scanner state".
-- *
-- * Returns the top of the stack, or NULL.
-- */
--#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \
-- ? (yy_buffer_stack)[(yy_buffer_stack_top)] \
-- : NULL)
--
--/* Same as previous macro, but useful when we know that the buffer stack is not
-- * NULL or when we need an lvalue. For internal use only.
-- */
--#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)]
--
--/* yy_hold_char holds the character lost when yytext is formed. */
--static char yy_hold_char;
--static yy_size_t yy_n_chars; /* number of characters read into yy_ch_buf */
--yy_size_t yyleng;
--
--/* Points to current character in buffer. */
--static char *yy_c_buf_p = (char *) 0;
--static int yy_init = 0; /* whether we need to initialize */
--static int yy_start = 0; /* start state number */
--
--/* Flag which is used to allow yywrap()'s to do buffer switches
-- * instead of setting up a fresh yyin. A bit of a hack ...
-- */
--static int yy_did_buffer_switch_on_eof;
--
--void yyrestart (FILE *input_file );
--void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer );
--YY_BUFFER_STATE yy_create_buffer (FILE *file,int size );
--void yy_delete_buffer (YY_BUFFER_STATE b );
--void yy_flush_buffer (YY_BUFFER_STATE b );
--void yypush_buffer_state (YY_BUFFER_STATE new_buffer );
--void yypop_buffer_state (void );
--
--static void yyensure_buffer_stack (void );
--static void yy_load_buffer_state (void );
--static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file );
--
--#define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER )
--
--YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size );
--YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str );
--YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,yy_size_t len );
--
--void *yyalloc (yy_size_t );
--void *yyrealloc (void *,yy_size_t );
--void yyfree (void * );
--
--#define yy_new_buffer yy_create_buffer
--
--#define yy_set_interactive(is_interactive) \
-- { \
-- if ( ! YY_CURRENT_BUFFER ){ \
-- yyensure_buffer_stack (); \
-- YY_CURRENT_BUFFER_LVALUE = \
-- yy_create_buffer(yyin,YY_BUF_SIZE ); \
-- } \
-- YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \
-- }
--
--#define yy_set_bol(at_bol) \
-- { \
-- if ( ! YY_CURRENT_BUFFER ){\
-- yyensure_buffer_stack (); \
-- YY_CURRENT_BUFFER_LVALUE = \
-- yy_create_buffer(yyin,YY_BUF_SIZE ); \
-- } \
-- YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \
-- }
--
--#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol)
--
--typedef unsigned char YY_CHAR;
--
--FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0;
--
--typedef int yy_state_type;
--
--extern int yylineno;
--
--int yylineno = 1;
--
--extern char *yytext;
--#define yytext_ptr yytext
--
--static yy_state_type yy_get_previous_state (void );
--static yy_state_type yy_try_NUL_trans (yy_state_type current_state );
--static int yy_get_next_buffer (void );
--static void yy_fatal_error (yyconst char msg[] );
--
--/* Done after the current pattern has been matched and before the
-- * corresponding action - sets up yytext.
-- */
--#define YY_DO_BEFORE_ACTION \
-- (yytext_ptr) = yy_bp; \
-- yyleng = (yy_size_t) (yy_cp - yy_bp); \
-- (yy_hold_char) = *yy_cp; \
-- *yy_cp = '\0'; \
-- (yy_c_buf_p) = yy_cp;
--
--#define YY_NUM_RULES 25
--#define YY_END_OF_BUFFER 26
--/* This struct is not used in this scanner,
-- but its presence is necessary. */
--struct yy_trans_info
-- {
-- flex_int32_t yy_verify;
-- flex_int32_t yy_nxt;
-- };
--static yyconst flex_int16_t yy_accept[81] =
-- { 0,
-- 0, 0, 26, 25, 7, 8, 5, 25, 1, 2,
-- 11, 11, 6, 3, 4, 25, 25, 25, 25, 25,
-- 25, 25, 0, 9, 11, 0, 6, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 10, 0, 0,
-- 13, 0, 0, 0, 0, 16, 0, 0, 0, 0,
-- 0, 12, 15, 0, 23, 0, 0, 0, 0, 0,
-- 0, 14, 18, 0, 0, 0, 0, 0, 17, 0,
-- 24, 0, 0, 0, 20, 22, 0, 21, 19, 0
-- } ;
--
--static yyconst flex_int32_t yy_ec[256] =
-- { 0,
-- 1, 1, 1, 1, 1, 1, 1, 1, 2, 3,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 4, 1, 5, 1, 1, 1, 1, 1, 6,
-- 7, 1, 1, 1, 1, 1, 1, 8, 9, 9,
-- 9, 9, 9, 9, 9, 9, 9, 1, 10, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 11, 1, 12, 1, 1, 1, 13, 14, 15, 16,
--
-- 17, 18, 19, 20, 21, 1, 1, 22, 1, 23,
-- 24, 25, 1, 26, 27, 28, 29, 30, 1, 31,
-- 32, 33, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
--
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1
-- } ;
--
--static yyconst flex_int32_t yy_meta[34] =
-- { 0,
-- 1, 1, 2, 1, 1, 1, 1, 3, 3, 1,
-- 1, 1, 3, 3, 3, 3, 3, 3, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1
-- } ;
--
--static yyconst flex_int16_t yy_base[84] =
-- { 0,
-- 0, 0, 100, 101, 101, 101, 101, 94, 101, 101,
-- 26, 28, 0, 101, 101, 82, 26, 18, 74, 79,
-- 78, 81, 88, 101, 32, 0, 0, 76, 65, 62,
-- 61, 75, 20, 59, 61, 66, 58, 0, 57, 56,
-- 54, 63, 53, 62, 54, 101, 59, 48, 53, 46,
-- 59, 101, 44, 43, 101, 41, 55, 46, 53, 44,
-- 31, 101, 101, 39, 27, 21, 39, 19, 101, 35,
-- 101, 33, 26, 29, 101, 101, 28, 101, 101, 101,
-- 58, 61, 41
-- } ;
--
--static yyconst flex_int16_t yy_def[84] =
-- { 0,
-- 80, 1, 80, 80, 80, 80, 80, 81, 80, 80,
-- 80, 80, 82, 80, 80, 80, 80, 80, 80, 80,
-- 80, 80, 81, 80, 80, 83, 82, 80, 80, 80,
-- 80, 80, 80, 80, 80, 80, 80, 83, 80, 80,
-- 80, 80, 80, 80, 80, 80, 80, 80, 80, 80,
-- 80, 80, 80, 80, 80, 80, 80, 80, 80, 80,
-- 80, 80, 80, 80, 80, 80, 80, 80, 80, 80,
-- 80, 80, 80, 80, 80, 80, 80, 80, 80, 0,
-- 80, 80, 80
-- } ;
--
--static yyconst flex_int16_t yy_nxt[135] =
-- { 0,
-- 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
-- 14, 15, 16, 17, 18, 4, 4, 4, 4, 4,
-- 19, 4, 4, 4, 4, 20, 21, 4, 4, 22,
-- 4, 4, 4, 25, 25, 25, 25, 32, 29, 25,
-- 25, 33, 44, 38, 79, 78, 30, 77, 45, 76,
-- 75, 74, 73, 72, 71, 70, 26, 31, 23, 23,
-- 23, 27, 69, 27, 68, 67, 66, 65, 64, 63,
-- 62, 61, 60, 59, 58, 57, 56, 55, 54, 53,
-- 52, 51, 50, 49, 48, 47, 46, 43, 42, 41,
-- 40, 39, 24, 37, 36, 35, 34, 28, 24, 80,
--
-- 3, 80, 80, 80, 80, 80, 80, 80, 80, 80,
-- 80, 80, 80, 80, 80, 80, 80, 80, 80, 80,
-- 80, 80, 80, 80, 80, 80, 80, 80, 80, 80,
-- 80, 80, 80, 80
-- } ;
--
--static yyconst flex_int16_t yy_chk[135] =
-- { 0,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 11, 11, 12, 12, 18, 17, 25,
-- 25, 18, 33, 83, 77, 74, 17, 73, 33, 72,
-- 70, 68, 67, 66, 65, 64, 11, 17, 81, 81,
-- 81, 82, 61, 82, 60, 59, 58, 57, 56, 54,
-- 53, 51, 50, 49, 48, 47, 45, 44, 43, 42,
-- 41, 40, 39, 37, 36, 35, 34, 32, 31, 30,
-- 29, 28, 23, 22, 21, 20, 19, 16, 8, 3,
--
-- 80, 80, 80, 80, 80, 80, 80, 80, 80, 80,
-- 80, 80, 80, 80, 80, 80, 80, 80, 80, 80,
-- 80, 80, 80, 80, 80, 80, 80, 80, 80, 80,
-- 80, 80, 80, 80
-- } ;
--
--static yy_state_type yy_last_accepting_state;
--static char *yy_last_accepting_cpos;
--
--extern int yy_flex_debug;
--int yy_flex_debug = 0;
--
--/* The intent behind this definition is that it'll catch
-- * any uses of REJECT which flex missed.
-- */
--#define REJECT reject_used_but_not_detected
--#define yymore() yymore_used_but_not_detected
--#define YY_MORE_ADJ 0
--#define YY_RESTORE_YY_MORE_OFFSET
--char *yytext;
--#line 1 "syslex.l"
--#define YY_NO_INPUT 1
--#line 4 "syslex.l"
--/* Copyright 2001, 2003, 2005, 2007, 2011, 2012 Free Software Foundation, Inc.
--
-- This file is part of GNU Binutils.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 3, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with GLD; see the file COPYING. If not, write to the Free
-- Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
-- 02110-1301, USA. */
--
--/* Note: config.h is #included via syslex_wrap.c. */
--
--#ifdef HAVE_STRING_H
--#include <string.h>
--#else
--#ifdef HAVE_STRINGS_H
--#include <strings.h>
--#endif
--#endif
--
--#include "sysinfo.h"
--
--#ifndef YY_NO_UNPUT
--#define YY_NO_UNPUT
--#endif
--
--#ifndef yywrap
--static int yywrap (void) { return 1; }
--#endif
--
--extern int yylex (void);
--#line 544 "syslex.c"
--
--#define INITIAL 0
--
--#ifndef YY_NO_UNISTD_H
--/* Special case for "unistd.h", since it is non-ANSI. We include it way
-- * down here because we want the user's section 1 to have been scanned first.
-- * The user has a chance to override it with an option.
-- */
--#include <unistd.h>
--#endif
--
--#ifndef YY_EXTRA_TYPE
--#define YY_EXTRA_TYPE void *
--#endif
--
--static int yy_init_globals (void );
--
--/* Accessor methods to globals.
-- These are made visible to non-reentrant scanners for convenience. */
--
--int yylex_destroy (void );
--
--int yyget_debug (void );
--
--void yyset_debug (int debug_flag );
--
--YY_EXTRA_TYPE yyget_extra (void );
--
--void yyset_extra (YY_EXTRA_TYPE user_defined );
--
--FILE *yyget_in (void );
--
--void yyset_in (FILE * in_str );
--
--FILE *yyget_out (void );
--
--void yyset_out (FILE * out_str );
--
--yy_size_t yyget_leng (void );
--
--char *yyget_text (void );
--
--int yyget_lineno (void );
--
--void yyset_lineno (int line_number );
--
--/* Macros after this point can all be overridden by user definitions in
-- * section 1.
-- */
--
--#ifndef YY_SKIP_YYWRAP
--#ifdef __cplusplus
--extern "C" int yywrap (void );
--#else
--extern int yywrap (void );
--#endif
--#endif
--
--#ifndef yytext_ptr
--static void yy_flex_strncpy (char *,yyconst char *,int );
--#endif
--
--#ifdef YY_NEED_STRLEN
--static int yy_flex_strlen (yyconst char * );
--#endif
--
--#ifndef YY_NO_INPUT
--
--#ifdef __cplusplus
--static int yyinput (void );
--#else
--static int input (void );
--#endif
--
--#endif
--
--/* Amount of stuff to slurp up with each read. */
--#ifndef YY_READ_BUF_SIZE
--#define YY_READ_BUF_SIZE 8192
--#endif
--
--/* Copy whatever the last rule matched to the standard output. */
--#ifndef ECHO
--/* This used to be an fputs(), but since the string might contain NUL's,
-- * we now use fwrite().
-- */
--#define ECHO fwrite( yytext, yyleng, 1, yyout )
--#endif
--
--/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL,
-- * is returned in "result".
-- */
--#ifndef YY_INPUT
--#define YY_INPUT(buf,result,max_size) \
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \
-- { \
-- int c = '*'; \
-- yy_size_t n; \
-- for ( n = 0; n < max_size && \
-- (c = getc( yyin )) != EOF && c != '\n'; ++n ) \
-- buf[n] = (char) c; \
-- if ( c == '\n' ) \
-- buf[n++] = (char) c; \
-- if ( c == EOF && ferror( yyin ) ) \
-- YY_FATAL_ERROR( "input in flex scanner failed" ); \
-- result = n; \
-- } \
-- else \
-- { \
-- errno=0; \
-- while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \
-- { \
-- if( errno != EINTR) \
-- { \
-- YY_FATAL_ERROR( "input in flex scanner failed" ); \
-- break; \
-- } \
-- errno=0; \
-- clearerr(yyin); \
-- } \
-- }\
--\
--
--#endif
--
--/* No semi-colon after return; correct usage is to write "yyterminate();" -
-- * we don't want an extra ';' after the "return" because that will cause
-- * some compilers to complain about unreachable statements.
-- */
--#ifndef yyterminate
--#define yyterminate() return YY_NULL
--#endif
--
--/* Number of entries by which start-condition stack grows. */
--#ifndef YY_START_STACK_INCR
--#define YY_START_STACK_INCR 25
--#endif
--
--/* Report a fatal error. */
--#ifndef YY_FATAL_ERROR
--#define YY_FATAL_ERROR(msg) yy_fatal_error( msg )
--#endif
--
--/* end tables serialization structures and prototypes */
--
--/* Default declaration of generated scanner - a define so the user can
-- * easily add parameters.
-- */
--#ifndef YY_DECL
--#define YY_DECL_IS_OURS 1
--
--extern int yylex (void);
--
--#define YY_DECL int yylex (void)
--#endif /* !YY_DECL */
--
--/* Code executed at the beginning of each rule, after yytext and yyleng
-- * have been set up.
-- */
--#ifndef YY_USER_ACTION
--#define YY_USER_ACTION
--#endif
--
--/* Code executed at the end of each rule. */
--#ifndef YY_BREAK
--#define YY_BREAK break;
--#endif
--
--#define YY_RULE_SETUP \
-- YY_USER_ACTION
--
--/** The main scanner function which does all the work.
-- */
--YY_DECL
--{
-- register yy_state_type yy_current_state;
-- register char *yy_cp, *yy_bp;
-- register int yy_act;
--
--#line 45 "syslex.l"
--
--#line 726 "syslex.c"
--
-- if ( !(yy_init) )
-- {
-- (yy_init) = 1;
--
--#ifdef YY_USER_INIT
-- YY_USER_INIT;
--#endif
--
-- if ( ! (yy_start) )
-- (yy_start) = 1; /* first start state */
--
-- if ( ! yyin )
-- yyin = stdin;
--
-- if ( ! yyout )
-- yyout = stdout;
--
-- if ( ! YY_CURRENT_BUFFER ) {
-- yyensure_buffer_stack ();
-- YY_CURRENT_BUFFER_LVALUE =
-- yy_create_buffer(yyin,YY_BUF_SIZE );
-- }
--
-- yy_load_buffer_state( );
-- }
--
-- while ( 1 ) /* loops until end-of-file is reached */
-- {
-- yy_cp = (yy_c_buf_p);
--
-- /* Support of yytext. */
-- *yy_cp = (yy_hold_char);
--
-- /* yy_bp points to the position in yy_ch_buf of the start of
-- * the current run.
-- */
-- yy_bp = yy_cp;
--
-- yy_current_state = (yy_start);
--yy_match:
-- do
-- {
-- register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)];
-- if ( yy_accept[yy_current_state] )
-- {
-- (yy_last_accepting_state) = yy_current_state;
-- (yy_last_accepting_cpos) = yy_cp;
-- }
-- while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
-- {
-- yy_current_state = (int) yy_def[yy_current_state];
-- if ( yy_current_state >= 81 )
-- yy_c = yy_meta[(unsigned int) yy_c];
-- }
-- yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-- ++yy_cp;
-- }
-- while ( yy_base[yy_current_state] != 101 );
--
--yy_find_action:
-- yy_act = yy_accept[yy_current_state];
-- if ( yy_act == 0 )
-- { /* have to back up */
-- yy_cp = (yy_last_accepting_cpos);
-- yy_current_state = (yy_last_accepting_state);
-- yy_act = yy_accept[yy_current_state];
-- }
--
-- YY_DO_BEFORE_ACTION;
--
--do_action: /* This label is used only to access EOF actions. */
--
-- switch ( yy_act )
-- { /* beginning of action switch */
-- case 0: /* must back up */
-- /* undo the effects of YY_DO_BEFORE_ACTION */
-- *yy_cp = (yy_hold_char);
-- yy_cp = (yy_last_accepting_cpos);
-- yy_current_state = (yy_last_accepting_state);
-- goto yy_find_action;
--
--case 1:
--YY_RULE_SETUP
--#line 46 "syslex.l"
--{ return '(';}
-- YY_BREAK
--case 2:
--YY_RULE_SETUP
--#line 47 "syslex.l"
--{ return ')';}
-- YY_BREAK
--case 3:
--YY_RULE_SETUP
--#line 48 "syslex.l"
--{ return '[';}
-- YY_BREAK
--case 4:
--YY_RULE_SETUP
--#line 49 "syslex.l"
--{ return ']';}
-- YY_BREAK
--case 5:
--YY_RULE_SETUP
--#line 50 "syslex.l"
--{ ; }
-- YY_BREAK
--case 6:
--YY_RULE_SETUP
--#line 51 "syslex.l"
--{ ; }
-- YY_BREAK
--case 7:
--YY_RULE_SETUP
--#line 52 "syslex.l"
--{ ; }
-- YY_BREAK
--case 8:
--/* rule 8 can match eol */
--YY_RULE_SETUP
--#line 53 "syslex.l"
--{ ; }
-- YY_BREAK
--case 9:
--/* rule 9 can match eol */
--YY_RULE_SETUP
--#line 54 "syslex.l"
--{
-- yylval.s = malloc (yyleng - 1);
-- memcpy (yylval.s, yytext + 1, yyleng - 2);
-- yylval.s[yyleng - 2] = '\0';
-- return NAME;
-- }
-- YY_BREAK
--case 10:
--YY_RULE_SETUP
--#line 61 "syslex.l"
--{
-- yylval.i = strtol(yytext,0,16);
-- return NUMBER;
-- }
-- YY_BREAK
--case 11:
--YY_RULE_SETUP
--#line 66 "syslex.l"
--{
-- yylval.i = atoi(yytext);
-- return NUMBER;
-- }
-- YY_BREAK
--case 12:
--YY_RULE_SETUP
--#line 72 "syslex.l"
--{ yylval.i =1 ;return UNIT;}
-- YY_BREAK
--case 13:
--YY_RULE_SETUP
--#line 73 "syslex.l"
--{ yylval.i = 1; return UNIT;}
-- YY_BREAK
--case 14:
--YY_RULE_SETUP
--#line 74 "syslex.l"
--{ yylval.i= 8; return UNIT;}
-- YY_BREAK
--case 15:
--YY_RULE_SETUP
--#line 75 "syslex.l"
--{ yylval.i = 8; return UNIT;}
-- YY_BREAK
--case 16:
--YY_RULE_SETUP
--#line 77 "syslex.l"
--{ yylval.s = "INT"; return TYPE;}
-- YY_BREAK
--case 17:
--YY_RULE_SETUP
--#line 78 "syslex.l"
--{ yylval.s = "BARRAY"; return TYPE;}
-- YY_BREAK
--case 18:
--YY_RULE_SETUP
--#line 79 "syslex.l"
--{ yylval.s = "CHARS"; return TYPE;}
-- YY_BREAK
--case 19:
--YY_RULE_SETUP
--#line 80 "syslex.l"
--{ yylval.i = 0; return NUMBER;}
-- YY_BREAK
--case 20:
--YY_RULE_SETUP
--#line 81 "syslex.l"
--{ yylval.i = -4; return NUMBER;}
-- YY_BREAK
--case 21:
--YY_RULE_SETUP
--#line 82 "syslex.l"
--{ yylval.i = -2; return NUMBER; }
-- YY_BREAK
--case 22:
--YY_RULE_SETUP
--#line 83 "syslex.l"
--{ yylval.i = -1; return NUMBER; }
-- YY_BREAK
--case 23:
--YY_RULE_SETUP
--#line 84 "syslex.l"
--{ return COND;}
-- YY_BREAK
--case 24:
--YY_RULE_SETUP
--#line 85 "syslex.l"
--{ return REPEAT;}
-- YY_BREAK
--case 25:
--YY_RULE_SETUP
--#line 86 "syslex.l"
--ECHO;
-- YY_BREAK
--#line 947 "syslex.c"
--case YY_STATE_EOF(INITIAL):
-- yyterminate();
--
-- case YY_END_OF_BUFFER:
-- {
-- /* Amount of text matched not including the EOB char. */
-- int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1;
--
-- /* Undo the effects of YY_DO_BEFORE_ACTION. */
-- *yy_cp = (yy_hold_char);
-- YY_RESTORE_YY_MORE_OFFSET
--
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW )
-- {
-- /* We're scanning a new file or input source. It's
-- * possible that this happened because the user
-- * just pointed yyin at a new source and called
-- * yylex(). If so, then we have to assure
-- * consistency between YY_CURRENT_BUFFER and our
-- * globals. Here is the right place to do so, because
-- * this is the first action (other than possibly a
-- * back-up) that will match for the new input source.
-- */
-- (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
-- YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin;
-- YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL;
-- }
--
-- /* Note that here we test for yy_c_buf_p "<=" to the position
-- * of the first EOB in the buffer, since yy_c_buf_p will
-- * already have been incremented past the NUL character
-- * (since all states make transitions on EOB to the
-- * end-of-buffer state). Contrast this with the test
-- * in input().
-- */
-- if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
-- { /* This was really a NUL. */
-- yy_state_type yy_next_state;
--
-- (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text;
--
-- yy_current_state = yy_get_previous_state( );
--
-- /* Okay, we're now positioned to make the NUL
-- * transition. We couldn't have
-- * yy_get_previous_state() go ahead and do it
-- * for us because it doesn't know how to deal
-- * with the possibility of jamming (and we don't
-- * want to build jamming into it because then it
-- * will run more slowly).
-- */
--
-- yy_next_state = yy_try_NUL_trans( yy_current_state );
--
-- yy_bp = (yytext_ptr) + YY_MORE_ADJ;
--
-- if ( yy_next_state )
-- {
-- /* Consume the NUL. */
-- yy_cp = ++(yy_c_buf_p);
-- yy_current_state = yy_next_state;
-- goto yy_match;
-- }
--
-- else
-- {
-- yy_cp = (yy_c_buf_p);
-- goto yy_find_action;
-- }
-- }
--
-- else switch ( yy_get_next_buffer( ) )
-- {
-- case EOB_ACT_END_OF_FILE:
-- {
-- (yy_did_buffer_switch_on_eof) = 0;
--
-- if ( yywrap( ) )
-- {
-- /* Note: because we've taken care in
-- * yy_get_next_buffer() to have set up
-- * yytext, we can now set up
-- * yy_c_buf_p so that if some total
-- * hoser (like flex itself) wants to
-- * call the scanner after we return the
-- * YY_NULL, it'll still work - another
-- * YY_NULL will get returned.
-- */
-- (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ;
--
-- yy_act = YY_STATE_EOF(YY_START);
-- goto do_action;
-- }
--
-- else
-- {
-- if ( ! (yy_did_buffer_switch_on_eof) )
-- YY_NEW_FILE;
-- }
-- break;
-- }
--
-- case EOB_ACT_CONTINUE_SCAN:
-- (yy_c_buf_p) =
-- (yytext_ptr) + yy_amount_of_matched_text;
--
-- yy_current_state = yy_get_previous_state( );
--
-- yy_cp = (yy_c_buf_p);
-- yy_bp = (yytext_ptr) + YY_MORE_ADJ;
-- goto yy_match;
--
-- case EOB_ACT_LAST_MATCH:
-- (yy_c_buf_p) =
-- &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)];
--
-- yy_current_state = yy_get_previous_state( );
--
-- yy_cp = (yy_c_buf_p);
-- yy_bp = (yytext_ptr) + YY_MORE_ADJ;
-- goto yy_find_action;
-- }
-- break;
-- }
--
-- default:
-- YY_FATAL_ERROR(
-- "fatal flex scanner internal error--no action found" );
-- } /* end of action switch */
-- } /* end of scanning one token */
--} /* end of yylex */
--
--/* yy_get_next_buffer - try to read in a new buffer
-- *
-- * Returns a code representing an action:
-- * EOB_ACT_LAST_MATCH -
-- * EOB_ACT_CONTINUE_SCAN - continue scanning from current position
-- * EOB_ACT_END_OF_FILE - end of file
-- */
--static int yy_get_next_buffer (void)
--{
-- register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf;
-- register char *source = (yytext_ptr);
-- register int number_to_move, i;
-- int ret_val;
--
-- if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] )
-- YY_FATAL_ERROR(
-- "fatal flex scanner internal error--end of buffer missed" );
--
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 )
-- { /* Don't try to fill the buffer, so this is an EOF. */
-- if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 )
-- {
-- /* We matched a single character, the EOB, so
-- * treat this as a final EOF.
-- */
-- return EOB_ACT_END_OF_FILE;
-- }
--
-- else
-- {
-- /* We matched some text prior to the EOB, first
-- * process it.
-- */
-- return EOB_ACT_LAST_MATCH;
-- }
-- }
--
-- /* Try to read more data. */
--
-- /* First move last chars to start of buffer. */
-- number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1;
--
-- for ( i = 0; i < number_to_move; ++i )
-- *(dest++) = *(source++);
--
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING )
-- /* don't do the read, it's not guaranteed to return an EOF,
-- * just force an EOF
-- */
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0;
--
-- else
-- {
-- yy_size_t num_to_read =
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1;
--
-- while ( num_to_read <= 0 )
-- { /* Not enough room in the buffer - grow it. */
--
-- /* just a shorter name for the current buffer */
-- YY_BUFFER_STATE b = YY_CURRENT_BUFFER;
--
-- int yy_c_buf_p_offset =
-- (int) ((yy_c_buf_p) - b->yy_ch_buf);
--
-- if ( b->yy_is_our_buffer )
-- {
-- yy_size_t new_size = b->yy_buf_size * 2;
--
-- if ( new_size <= 0 )
-- b->yy_buf_size += b->yy_buf_size / 8;
-- else
-- b->yy_buf_size *= 2;
--
-- b->yy_ch_buf = (char *)
-- /* Include room in for 2 EOB chars. */
-- yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 );
-- }
-- else
-- /* Can't grow it, we don't own it. */
-- b->yy_ch_buf = 0;
--
-- if ( ! b->yy_ch_buf )
-- YY_FATAL_ERROR(
-- "fatal error - scanner input buffer overflow" );
--
-- (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset];
--
-- num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size -
-- number_to_move - 1;
--
-- }
--
-- if ( num_to_read > YY_READ_BUF_SIZE )
-- num_to_read = YY_READ_BUF_SIZE;
--
-- /* Read in more data. */
-- YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]),
-- (yy_n_chars), num_to_read );
--
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
-- }
--
-- if ( (yy_n_chars) == 0 )
-- {
-- if ( number_to_move == YY_MORE_ADJ )
-- {
-- ret_val = EOB_ACT_END_OF_FILE;
-- yyrestart(yyin );
-- }
--
-- else
-- {
-- ret_val = EOB_ACT_LAST_MATCH;
-- YY_CURRENT_BUFFER_LVALUE->yy_buffer_status =
-- YY_BUFFER_EOF_PENDING;
-- }
-- }
--
-- else
-- ret_val = EOB_ACT_CONTINUE_SCAN;
--
-- if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) {
-- /* Extend the array by 50%, plus the number we really need. */
-- yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1);
-- YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size );
-- if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" );
-- }
--
-- (yy_n_chars) += number_to_move;
-- YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR;
-- YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR;
--
-- (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0];
--
-- return ret_val;
--}
--
--/* yy_get_previous_state - get the state just before the EOB char was reached */
--
-- static yy_state_type yy_get_previous_state (void)
--{
-- register yy_state_type yy_current_state;
-- register char *yy_cp;
--
-- yy_current_state = (yy_start);
--
-- for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
-- {
-- register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1);
-- if ( yy_accept[yy_current_state] )
-- {
-- (yy_last_accepting_state) = yy_current_state;
-- (yy_last_accepting_cpos) = yy_cp;
-- }
-- while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
-- {
-- yy_current_state = (int) yy_def[yy_current_state];
-- if ( yy_current_state >= 81 )
-- yy_c = yy_meta[(unsigned int) yy_c];
-- }
-- yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-- }
--
-- return yy_current_state;
--}
--
--/* yy_try_NUL_trans - try to make a transition on the NUL character
-- *
-- * synopsis
-- * next_state = yy_try_NUL_trans( current_state );
-- */
-- static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state )
--{
-- register int yy_is_jam;
-- register char *yy_cp = (yy_c_buf_p);
--
-- register YY_CHAR yy_c = 1;
-- if ( yy_accept[yy_current_state] )
-- {
-- (yy_last_accepting_state) = yy_current_state;
-- (yy_last_accepting_cpos) = yy_cp;
-- }
-- while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
-- {
-- yy_current_state = (int) yy_def[yy_current_state];
-- if ( yy_current_state >= 81 )
-- yy_c = yy_meta[(unsigned int) yy_c];
-- }
-- yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-- yy_is_jam = (yy_current_state == 80);
--
-- return yy_is_jam ? 0 : yy_current_state;
--}
--
--#ifndef YY_NO_INPUT
--#ifdef __cplusplus
-- static int yyinput (void)
--#else
-- static int input (void)
--#endif
--
--{
-- int c;
--
-- *(yy_c_buf_p) = (yy_hold_char);
--
-- if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
-- {
-- /* yy_c_buf_p now points to the character we want to return.
-- * If this occurs *before* the EOB characters, then it's a
-- * valid NUL; if not, then we've hit the end of the buffer.
-- */
-- if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
-- /* This was really a NUL. */
-- *(yy_c_buf_p) = '\0';
--
-- else
-- { /* need more input */
-- yy_size_t offset = (yy_c_buf_p) - (yytext_ptr);
-- ++(yy_c_buf_p);
--
-- switch ( yy_get_next_buffer( ) )
-- {
-- case EOB_ACT_LAST_MATCH:
-- /* This happens because yy_g_n_b()
-- * sees that we've accumulated a
-- * token and flags that we need to
-- * try matching the token before
-- * proceeding. But for input(),
-- * there's no matching to consider.
-- * So convert the EOB_ACT_LAST_MATCH
-- * to EOB_ACT_END_OF_FILE.
-- */
--
-- /* Reset buffer status. */
-- yyrestart(yyin );
--
-- /*FALLTHROUGH*/
--
-- case EOB_ACT_END_OF_FILE:
-- {
-- if ( yywrap( ) )
-- return 0;
--
-- if ( ! (yy_did_buffer_switch_on_eof) )
-- YY_NEW_FILE;
--#ifdef __cplusplus
-- return yyinput();
--#else
-- return input();
--#endif
-- }
--
-- case EOB_ACT_CONTINUE_SCAN:
-- (yy_c_buf_p) = (yytext_ptr) + offset;
-- break;
-- }
-- }
-- }
--
-- c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */
-- *(yy_c_buf_p) = '\0'; /* preserve yytext */
-- (yy_hold_char) = *++(yy_c_buf_p);
--
-- return c;
--}
--#endif /* ifndef YY_NO_INPUT */
--
--/** Immediately switch to a different input stream.
-- * @param input_file A readable stream.
-- *
-- * @note This function does not reset the start condition to @c INITIAL .
-- */
-- void yyrestart (FILE * input_file )
--{
--
-- if ( ! YY_CURRENT_BUFFER ){
-- yyensure_buffer_stack ();
-- YY_CURRENT_BUFFER_LVALUE =
-- yy_create_buffer(yyin,YY_BUF_SIZE );
-- }
--
-- yy_init_buffer(YY_CURRENT_BUFFER,input_file );
-- yy_load_buffer_state( );
--}
--
--/** Switch to a different input buffer.
-- * @param new_buffer The new input buffer.
-- *
-- */
-- void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer )
--{
--
-- /* TODO. We should be able to replace this entire function body
-- * with
-- * yypop_buffer_state();
-- * yypush_buffer_state(new_buffer);
-- */
-- yyensure_buffer_stack ();
-- if ( YY_CURRENT_BUFFER == new_buffer )
-- return;
--
-- if ( YY_CURRENT_BUFFER )
-- {
-- /* Flush out information for old buffer. */
-- *(yy_c_buf_p) = (yy_hold_char);
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
-- }
--
-- YY_CURRENT_BUFFER_LVALUE = new_buffer;
-- yy_load_buffer_state( );
--
-- /* We don't actually know whether we did this switch during
-- * EOF (yywrap()) processing, but the only time this flag
-- * is looked at is after yywrap() is called, so it's safe
-- * to go ahead and always set it.
-- */
-- (yy_did_buffer_switch_on_eof) = 1;
--}
--
--static void yy_load_buffer_state (void)
--{
-- (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
-- (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos;
-- yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file;
-- (yy_hold_char) = *(yy_c_buf_p);
--}
--
--/** Allocate and initialize an input buffer state.
-- * @param file A readable stream.
-- * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
-- *
-- * @return the allocated buffer state.
-- */
-- YY_BUFFER_STATE yy_create_buffer (FILE * file, int size )
--{
-- YY_BUFFER_STATE b;
--
-- b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) );
-- if ( ! b )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
--
-- b->yy_buf_size = size;
--
-- /* yy_ch_buf has to be 2 characters longer than the size given because
-- * we need to put in 2 end-of-buffer characters.
-- */
-- b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2 );
-- if ( ! b->yy_ch_buf )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
--
-- b->yy_is_our_buffer = 1;
--
-- yy_init_buffer(b,file );
--
-- return b;
--}
--
--/** Destroy the buffer.
-- * @param b a buffer created with yy_create_buffer()
-- *
-- */
-- void yy_delete_buffer (YY_BUFFER_STATE b )
--{
--
-- if ( ! b )
-- return;
--
-- if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */
-- YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0;
--
-- if ( b->yy_is_our_buffer )
-- yyfree((void *) b->yy_ch_buf );
--
-- yyfree((void *) b );
--}
--
--#ifndef __cplusplus
--extern int isatty (int );
--#endif /* __cplusplus */
--
--/* Initializes or reinitializes a buffer.
-- * This function is sometimes called more than once on the same buffer,
-- * such as during a yyrestart() or at EOF.
-- */
-- static void yy_init_buffer (YY_BUFFER_STATE b, FILE * file )
--
--{
-- int oerrno = errno;
--
-- yy_flush_buffer(b );
--
-- b->yy_input_file = file;
-- b->yy_fill_buffer = 1;
--
-- /* If b is the current buffer, then yy_init_buffer was _probably_
-- * called from yyrestart() or through yy_get_next_buffer.
-- * In that case, we don't want to reset the lineno or column.
-- */
-- if (b != YY_CURRENT_BUFFER){
-- b->yy_bs_lineno = 1;
-- b->yy_bs_column = 0;
-- }
--
-- b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0;
--
-- errno = oerrno;
--}
--
--/** Discard all buffered characters. On the next scan, YY_INPUT will be called.
-- * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
-- *
-- */
-- void yy_flush_buffer (YY_BUFFER_STATE b )
--{
-- if ( ! b )
-- return;
--
-- b->yy_n_chars = 0;
--
-- /* We always need two end-of-buffer characters. The first causes
-- * a transition to the end-of-buffer state. The second causes
-- * a jam in that state.
-- */
-- b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR;
-- b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR;
--
-- b->yy_buf_pos = &b->yy_ch_buf[0];
--
-- b->yy_at_bol = 1;
-- b->yy_buffer_status = YY_BUFFER_NEW;
--
-- if ( b == YY_CURRENT_BUFFER )
-- yy_load_buffer_state( );
--}
--
--/** Pushes the new state onto the stack. The new state becomes
-- * the current state. This function will allocate the stack
-- * if necessary.
-- * @param new_buffer The new state.
-- *
-- */
--void yypush_buffer_state (YY_BUFFER_STATE new_buffer )
--{
-- if (new_buffer == NULL)
-- return;
--
-- yyensure_buffer_stack();
--
-- /* This block is copied from yy_switch_to_buffer. */
-- if ( YY_CURRENT_BUFFER )
-- {
-- /* Flush out information for old buffer. */
-- *(yy_c_buf_p) = (yy_hold_char);
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
-- }
--
-- /* Only push if top exists. Otherwise, replace top. */
-- if (YY_CURRENT_BUFFER)
-- (yy_buffer_stack_top)++;
-- YY_CURRENT_BUFFER_LVALUE = new_buffer;
--
-- /* copied from yy_switch_to_buffer. */
-- yy_load_buffer_state( );
-- (yy_did_buffer_switch_on_eof) = 1;
--}
--
--/** Removes and deletes the top of the stack, if present.
-- * The next element becomes the new top.
-- *
-- */
--void yypop_buffer_state (void)
--{
-- if (!YY_CURRENT_BUFFER)
-- return;
--
-- yy_delete_buffer(YY_CURRENT_BUFFER );
-- YY_CURRENT_BUFFER_LVALUE = NULL;
-- if ((yy_buffer_stack_top) > 0)
-- --(yy_buffer_stack_top);
--
-- if (YY_CURRENT_BUFFER) {
-- yy_load_buffer_state( );
-- (yy_did_buffer_switch_on_eof) = 1;
-- }
--}
--
--/* Allocates the stack if it does not exist.
-- * Guarantees space for at least one push.
-- */
--static void yyensure_buffer_stack (void)
--{
-- yy_size_t num_to_alloc;
--
-- if (!(yy_buffer_stack)) {
--
-- /* First allocation is just for 2 elements, since we don't know if this
-- * scanner will even need a stack. We use 2 instead of 1 to avoid an
-- * immediate realloc on the next call.
-- */
-- num_to_alloc = 1;
-- (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc
-- (num_to_alloc * sizeof(struct yy_buffer_state*)
-- );
-- if ( ! (yy_buffer_stack) )
-- YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
--
-- memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
--
-- (yy_buffer_stack_max) = num_to_alloc;
-- (yy_buffer_stack_top) = 0;
-- return;
-- }
--
-- if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){
--
-- /* Increase the buffer to prepare for a possible push. */
-- int grow_size = 8 /* arbitrary grow size */;
--
-- num_to_alloc = (yy_buffer_stack_max) + grow_size;
-- (yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc
-- ((yy_buffer_stack),
-- num_to_alloc * sizeof(struct yy_buffer_state*)
-- );
-- if ( ! (yy_buffer_stack) )
-- YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
--
-- /* zero only the new slots.*/
-- memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*));
-- (yy_buffer_stack_max) = num_to_alloc;
-- }
--}
--
--/** Setup the input buffer state to scan directly from a user-specified character buffer.
-- * @param base the character buffer
-- * @param size the size in bytes of the character buffer
-- *
-- * @return the newly allocated buffer state object.
-- */
--YY_BUFFER_STATE yy_scan_buffer (char * base, yy_size_t size )
--{
-- YY_BUFFER_STATE b;
--
-- if ( size < 2 ||
-- base[size-2] != YY_END_OF_BUFFER_CHAR ||
-- base[size-1] != YY_END_OF_BUFFER_CHAR )
-- /* They forgot to leave room for the EOB's. */
-- return 0;
--
-- b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) );
-- if ( ! b )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" );
--
-- b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */
-- b->yy_buf_pos = b->yy_ch_buf = base;
-- b->yy_is_our_buffer = 0;
-- b->yy_input_file = 0;
-- b->yy_n_chars = b->yy_buf_size;
-- b->yy_is_interactive = 0;
-- b->yy_at_bol = 1;
-- b->yy_fill_buffer = 0;
-- b->yy_buffer_status = YY_BUFFER_NEW;
--
-- yy_switch_to_buffer(b );
--
-- return b;
--}
--
--/** Setup the input buffer state to scan a string. The next call to yylex() will
-- * scan from a @e copy of @a str.
-- * @param yystr a NUL-terminated string to scan
-- *
-- * @return the newly allocated buffer state object.
-- * @note If you want to scan bytes that may contain NUL values, then use
-- * yy_scan_bytes() instead.
-- */
--YY_BUFFER_STATE yy_scan_string (yyconst char * yystr )
--{
--
-- return yy_scan_bytes(yystr,strlen(yystr) );
--}
--
--/** Setup the input buffer state to scan the given bytes. The next call to yylex() will
-- * scan from a @e copy of @a bytes.
-- * @param bytes the byte buffer to scan
-- * @param len the number of bytes in the buffer pointed to by @a bytes.
-- *
-- * @return the newly allocated buffer state object.
-- */
--YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, yy_size_t _yybytes_len )
--{
-- YY_BUFFER_STATE b;
-- char *buf;
-- yy_size_t n, i;
--
-- /* Get memory for full buffer, including space for trailing EOB's. */
-- n = _yybytes_len + 2;
-- buf = (char *) yyalloc(n );
-- if ( ! buf )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" );
--
-- for ( i = 0; i < _yybytes_len; ++i )
-- buf[i] = yybytes[i];
--
-- buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR;
--
-- b = yy_scan_buffer(buf,n );
-- if ( ! b )
-- YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" );
--
-- /* It's okay to grow etc. this buffer, and we should throw it
-- * away when we're done.
-- */
-- b->yy_is_our_buffer = 1;
--
-- return b;
--}
--
--#ifndef YY_EXIT_FAILURE
--#define YY_EXIT_FAILURE 2
--#endif
--
--static void yy_fatal_error (yyconst char* msg )
--{
-- (void) fprintf( stderr, "%s\n", msg );
-- exit( YY_EXIT_FAILURE );
--}
--
--/* Redefine yyless() so it works in section 3 code. */
--
--#undef yyless
--#define yyless(n) \
-- do \
-- { \
-- /* Undo effects of setting up yytext. */ \
-- int yyless_macro_arg = (n); \
-- YY_LESS_LINENO(yyless_macro_arg);\
-- yytext[yyleng] = (yy_hold_char); \
-- (yy_c_buf_p) = yytext + yyless_macro_arg; \
-- (yy_hold_char) = *(yy_c_buf_p); \
-- *(yy_c_buf_p) = '\0'; \
-- yyleng = yyless_macro_arg; \
-- } \
-- while ( 0 )
--
--/* Accessor methods (get/set functions) to struct members. */
--
--/** Get the current line number.
-- *
-- */
--int yyget_lineno (void)
--{
--
-- return yylineno;
--}
--
--/** Get the input stream.
-- *
-- */
--FILE *yyget_in (void)
--{
-- return yyin;
--}
--
--/** Get the output stream.
-- *
-- */
--FILE *yyget_out (void)
--{
-- return yyout;
--}
--
--/** Get the length of the current token.
-- *
-- */
--yy_size_t yyget_leng (void)
--{
-- return yyleng;
--}
--
--/** Get the current token.
-- *
-- */
--
--char *yyget_text (void)
--{
-- return yytext;
--}
--
--/** Set the current line number.
-- * @param line_number
-- *
-- */
--void yyset_lineno (int line_number )
--{
--
-- yylineno = line_number;
--}
--
--/** Set the input stream. This does not discard the current
-- * input buffer.
-- * @param in_str A readable stream.
-- *
-- * @see yy_switch_to_buffer
-- */
--void yyset_in (FILE * in_str )
--{
-- yyin = in_str ;
--}
--
--void yyset_out (FILE * out_str )
--{
-- yyout = out_str ;
--}
--
--int yyget_debug (void)
--{
-- return yy_flex_debug;
--}
--
--void yyset_debug (int bdebug )
--{
-- yy_flex_debug = bdebug ;
--}
--
--static int yy_init_globals (void)
--{
-- /* Initialization is the same as for the non-reentrant scanner.
-- * This function is called from yylex_destroy(), so don't allocate here.
-- */
--
-- (yy_buffer_stack) = 0;
-- (yy_buffer_stack_top) = 0;
-- (yy_buffer_stack_max) = 0;
-- (yy_c_buf_p) = (char *) 0;
-- (yy_init) = 0;
-- (yy_start) = 0;
--
--/* Defined in main.c */
--#ifdef YY_STDINIT
-- yyin = stdin;
-- yyout = stdout;
--#else
-- yyin = (FILE *) 0;
-- yyout = (FILE *) 0;
--#endif
--
-- /* For future reference: Set errno on error, since we are called by
-- * yylex_init()
-- */
-- return 0;
--}
--
--/* yylex_destroy is for both reentrant and non-reentrant scanners. */
--int yylex_destroy (void)
--{
--
-- /* Pop the buffer stack, destroying each element. */
-- while(YY_CURRENT_BUFFER){
-- yy_delete_buffer(YY_CURRENT_BUFFER );
-- YY_CURRENT_BUFFER_LVALUE = NULL;
-- yypop_buffer_state();
-- }
--
-- /* Destroy the stack itself. */
-- yyfree((yy_buffer_stack) );
-- (yy_buffer_stack) = NULL;
--
-- /* Reset the globals. This is important in a non-reentrant scanner so the next time
-- * yylex() is called, initialization will occur. */
-- yy_init_globals( );
--
-- return 0;
--}
--
--/*
-- * Internal utility routines.
-- */
--
--#ifndef yytext_ptr
--static void yy_flex_strncpy (char* s1, yyconst char * s2, int n )
--{
-- register int i;
-- for ( i = 0; i < n; ++i )
-- s1[i] = s2[i];
--}
--#endif
--
--#ifdef YY_NEED_STRLEN
--static int yy_flex_strlen (yyconst char * s )
--{
-- register int n;
-- for ( n = 0; s[n]; ++n )
-- ;
--
-- return n;
--}
--#endif
--
--void *yyalloc (yy_size_t size )
--{
-- return (void *) malloc( size );
--}
--
--void *yyrealloc (void * ptr, yy_size_t size )
--{
-- /* The cast to (char *) in the following accommodates both
-- * implementations that use char* generic pointers, and those
-- * that use void* generic pointers. It works with the latter
-- * because both ANSI C and C++ allow castless assignment from
-- * any pointer type to void*, and deal with argument conversions
-- * as though doing an assignment.
-- */
-- return (void *) realloc( (char *) ptr, size );
--}
--
--void yyfree (void * ptr )
--{
-- free( (char *) ptr ); /* see yyrealloc() for (char *) cast */
--}
--
--#define YYTABLES_NAME "yytables"
--
--#line 86 "syslex.l"
-diff -Nur binutils-2.24.orig/cgen/aclocal.m4 binutils-2.24/cgen/aclocal.m4
---- binutils-2.24.orig/cgen/aclocal.m4 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/aclocal.m4 2016-06-30 21:26:12.597890934 +0200
-@@ -0,0 +1,137 @@
-+dnl aclocal.m4 generated automatically by aclocal 1.4
-+
-+dnl Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
-+dnl This file is free software; the Free Software Foundation
-+dnl gives unlimited permission to copy and/or distribute it,
-+dnl with or without modifications, as long as this notice is preserved.
-+
-+dnl This program is distributed in the hope that it will be useful,
-+dnl but WITHOUT ANY WARRANTY, to the extent permitted by law; without
-+dnl even the implied warranty of MERCHANTABILITY or FITNESS FOR A
-+dnl PARTICULAR PURPOSE.
-+
-+# Do all the work for Automake. This macro actually does too much --
-+# some checks are only needed if your package does certain things.
-+# But this isn't really a big deal.
-+
-+# serial 1
-+
-+dnl Usage:
-+dnl AM_INIT_AUTOMAKE(package,version, [no-define])
-+
-+AC_DEFUN(AM_INIT_AUTOMAKE,
-+[AC_REQUIRE([AC_PROG_INSTALL])
-+PACKAGE=[$1]
-+AC_SUBST(PACKAGE)
-+VERSION=[$2]
-+AC_SUBST(VERSION)
-+dnl test to see if srcdir already configured
-+if test "`cd $srcdir && pwd`" != "`pwd`" && test -f $srcdir/config.status; then
-+ AC_MSG_ERROR([source directory already configured; run "make distclean" there first])
-+fi
-+ifelse([$3],,
-+AC_DEFINE_UNQUOTED(PACKAGE, "$PACKAGE", [Name of package])
-+AC_DEFINE_UNQUOTED(VERSION, "$VERSION", [Version number of package]))
-+AC_REQUIRE([AM_SANITY_CHECK])
-+AC_REQUIRE([AC_ARG_PROGRAM])
-+dnl FIXME This is truly gross.
-+missing_dir=`cd $ac_aux_dir && pwd`
-+AM_MISSING_PROG(ACLOCAL, aclocal, $missing_dir)
-+AM_MISSING_PROG(AUTOCONF, autoconf, $missing_dir)
-+AM_MISSING_PROG(AUTOMAKE, automake, $missing_dir)
-+AM_MISSING_PROG(AUTOHEADER, autoheader, $missing_dir)
-+AM_MISSING_PROG(MAKEINFO, makeinfo, $missing_dir)
-+AC_REQUIRE([AC_PROG_MAKE_SET])])
-+
-+#
-+# Check to make sure that the build environment is sane.
-+#
-+
-+AC_DEFUN(AM_SANITY_CHECK,
-+[AC_MSG_CHECKING([whether build environment is sane])
-+# Just in case
-+sleep 1
-+echo timestamp > conftestfile
-+# Do `set' in a subshell so we don't clobber the current shell's
-+# arguments. Must try -L first in case configure is actually a
-+# symlink; some systems play weird games with the mod time of symlinks
-+# (eg FreeBSD returns the mod time of the symlink's containing
-+# directory).
-+if (
-+ set X `ls -Lt $srcdir/configure conftestfile 2> /dev/null`
-+ if test "[$]*" = "X"; then
-+ # -L didn't work.
-+ set X `ls -t $srcdir/configure conftestfile`
-+ fi
-+ if test "[$]*" != "X $srcdir/configure conftestfile" \
-+ && test "[$]*" != "X conftestfile $srcdir/configure"; then
-+
-+ # If neither matched, then we have a broken ls. This can happen
-+ # if, for instance, CONFIG_SHELL is bash and it inherits a
-+ # broken ls alias from the environment. This has actually
-+ # happened. Such a system could not be considered "sane".
-+ AC_MSG_ERROR([ls -t appears to fail. Make sure there is not a broken
-+alias in your environment])
-+ fi
-+
-+ test "[$]2" = conftestfile
-+ )
-+then
-+ # Ok.
-+ :
-+else
-+ AC_MSG_ERROR([newly created file is older than distributed files!
-+Check your system clock])
-+fi
-+rm -f conftest*
-+AC_MSG_RESULT(yes)])
-+
-+dnl AM_MISSING_PROG(NAME, PROGRAM, DIRECTORY)
-+dnl The program must properly implement --version.
-+AC_DEFUN(AM_MISSING_PROG,
-+[AC_MSG_CHECKING(for working $2)
-+# Run test in a subshell; some versions of sh will print an error if
-+# an executable is not found, even if stderr is redirected.
-+# Redirect stdin to placate older versions of autoconf. Sigh.
-+if ($2 --version) < /dev/null > /dev/null 2>&1; then
-+ $1=$2
-+ AC_MSG_RESULT(found)
-+else
-+ $1="$3/missing $2"
-+ AC_MSG_RESULT(missing)
-+fi
-+AC_SUBST($1)])
-+
-+# Add --enable-maintainer-mode option to configure.
-+# From Jim Meyering
-+
-+# serial 1
-+
-+AC_DEFUN(AM_MAINTAINER_MODE,
-+[AC_MSG_CHECKING([whether to enable maintainer-specific portions of Makefiles])
-+ dnl maintainer-mode is disabled by default
-+ AC_ARG_ENABLE(maintainer-mode,
-+[ --enable-maintainer-mode enable make rules and dependencies not useful
-+ (and sometimes confusing) to the casual installer],
-+ USE_MAINTAINER_MODE=$enableval,
-+ USE_MAINTAINER_MODE=no)
-+ AC_MSG_RESULT($USE_MAINTAINER_MODE)
-+ AM_CONDITIONAL(MAINTAINER_MODE, test $USE_MAINTAINER_MODE = yes)
-+ MAINT=$MAINTAINER_MODE_TRUE
-+ AC_SUBST(MAINT)dnl
-+]
-+)
-+
-+# Define a conditional.
-+
-+AC_DEFUN(AM_CONDITIONAL,
-+[AC_SUBST($1_TRUE)
-+AC_SUBST($1_FALSE)
-+if $2; then
-+ $1_TRUE=
-+ $1_FALSE='#'
-+else
-+ $1_TRUE='#'
-+ $1_FALSE=
-+fi])
-+
-diff -Nur binutils-2.24.orig/cgen/attr.scm binutils-2.24/cgen/attr.scm
---- binutils-2.24.orig/cgen/attr.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/attr.scm 2016-06-30 21:26:12.597890934 +0200
-@@ -0,0 +1,1230 @@
-+; Attributes.
-+; Copyright (C) 2000, 2003, 2005, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; There are 5 kinds of attributes: boolean, integer, enum, bitset, and string.
-+; Boolean attributes are really enum attributes with two possible values,
-+; but they occur frequently enough that they are special cased.
-+; String attributes are intentionally not documented in the manual as
-+; being supported - they're still a bit of work-in-progress.
-+;
-+; All objects that use attributes must have two methods:
-+; - 'get-atlist - returns the object's attr-list
-+; - 'set-atlist! - set the object's attr-list
-+;
-+; In .cpu files, attribute lists are associative lists of (NAME VALUE).
-+; Boolean attributes are specified as (NAME #t) or (NAME #f),
-+; but for convenience ATTR and !ATTR are also supported.
-+; integer/enum attrs are specified as (ATTR value).
-+; string attrs are specified as (ATTR "value").
-+; Bitset attrs are specified as (ATTR val1 val2 val3), each value must be
-+; a valid Scheme symbol (stick with valid C symbols + "-" and you'll be fine).
-+; For backwards compatibility (ATTR val1,val2,val3) and
-+; (ATTR "val1,val2,val3") are also supported for bitset values.
-+; val1,val2,val3 is not portable (e.g. mzscheme will reject it).
-+; In all cases the value needn't be constant, and can be an expression,
-+; though expressions are currently only supported for META-attributes
-+; (attributes that don't appear in any generated code).
-+;
-+; Example:
-+; (FOO1 !FOO2 (BAR 3) (FOO3 X) (MACH sparc sparclite))
-+;
-+; ??? Implementation of expressions is being postponed as long
-+; as possible, avoiding adding complications for complication's sake, and
-+; because I'm not completely sure how I want to do them.
-+; The syntax for an expression value is (ATTR (rtx-func ...)).
-+;
-+; ??? May wish to allow a bitset attribute like (ATTR val1 !val2), where `!'
-+; means to turn off that particular bit (or bits if val2 refers to several).
-+;
-+; ??? May wish to allow specifying enum attributes by only having to
-+; specify the value (move names into "enum space" or some such).
-+
-+; An attr-list (or "atlist") is a collection of attributes.
-+; Attributes are stored as an associative list.
-+; There is possible confusion between "alist" (associative-list) and
-+; "atlist" (attribute-list) but in practice I haven't had a problem.
-+; ??? May wish to change this to a list of objects, as the alist doesn't carry
-+; enough info. However the alist is simple and fast.
-+
-+(define <attr-list> (class-make '<attr-list> nil '(prefix attrs) nil))
-+
-+(define atlist-prefix (elm-make-getter <attr-list> 'prefix))
-+(define atlist-attrs (elm-make-getter <attr-list> 'attrs))
-+
-+(define (atlist? x) (class-instance? <attr-list> x))
-+
-+; An empty attribute-list.
-+
-+(define atlist-empty (make <attr-list> "" nil))
-+
-+; The attribute baseclass.
-+; The attributes of <ident> are the set of attributes for this attribute
-+; [meaning attributes themselves can have attributes].
-+; [Ya, that's clumsily written. I left it that way for fun.]
-+; An odd notion that is of some use. It's current raison d'etre is to
-+; support sanitization of attributes [which is implemented with the
-+; `sanitize' attribute].
-+
-+(define <attribute>
-+ (class-make '<attribute>
-+ '(<ident>)
-+ '(
-+ ; List of object types this attribute is for.
-+ ; Possible element values are:
-+ ; attr, enum, cpu, mach, model, ifield, hardware, operand,
-+ ; insn
-+ ; A value of #f means the attribute is for everything.
-+ for
-+ )
-+ nil)
-+)
-+
-+; Accessors.
-+
-+(define atlist-for (elm-make-getter <attribute> 'for))
-+
-+; A class for each type of attribute.
-+
-+; `values' exists for boolean-attribute to simplify the code, it's ignored.
-+; Ditto for `default'. The default for boolean-attribute is always #f.
-+
-+(define <boolean-attribute>
-+ (class-make '<boolean-attribute>
-+ '(<attribute>)
-+ '(default values)
-+ nil)
-+)
-+
-+; VALUES is ignored for string-attribute.
-+
-+(define <string-attribute>
-+ (class-make '<string-attribute>
-+ '(<attribute>)
-+ '(default values)
-+ nil)
-+)
-+
-+; For bitset attributes VALUES is a list of
-+; (symbol bit-number-or-#f attr-list comment-or-#f),
-+; one for each bit.
-+; If bit-number is #f (unspecified), cgen will choose.
-+; Int's are used to record the bitset in the generated code so there's a limit
-+; of 32 elements, though there's nothing inherent in the description language
-+; that precludes removing the limit.
-+; NOTE: While one might want to record each element as an object, there's
-+; currently no need for the added complexity.
-+
-+(define <bitset-attribute>
-+ (class-make '<bitset-attribute>
-+ '(<attribute>)
-+ '(default values)
-+ nil)
-+)
-+
-+; For integer attributes VALUES is a list of (int),
-+; one for each possible value,
-+; or the empty list of all values are permissible.
-+; Note that each element is itself a list. This is for consistency.
-+
-+(define <integer-attribute>
-+ (class-make '<integer-attribute>
-+ '(<attribute>)
-+ '(default values)
-+ nil)
-+)
-+
-+; For enum attributes VALUES is a list of
-+; (symbol enum-value-or-#f attr-list comment-or-#f),
-+; one for each possible.
-+; If enum-value is #f (unspecified) cgen will apply the standard rule for
-+; assigning enum values.
-+; NOTE: While one might want to record each element as an object, there's
-+; currently no need for the added complexity.
-+
-+(define <enum-attribute>
-+ (class-make '<enum-attribute>
-+ '(<attribute>)
-+ '(default values)
-+ nil)
-+)
-+
-+; Return a boolean indicating if X is a <boolean-attribute> object.
-+
-+(define (bool-attr? x) (class-instance? <boolean-attribute> x))
-+
-+; Return a symbol indicating the kind of attribute ATTR is.
-+; The result is one of boolean,integer,enum,bitset or string.
-+
-+(define (attr-kind attr)
-+ (case (object-class-name attr)
-+ ((<boolean-attribute>) 'boolean)
-+ ((<string-attribute>) 'string)
-+ ((<integer-attribute>) 'integer)
-+ ((<enum-attribute>) 'enum)
-+ ((<bitset-attribute>) 'bitset)
-+ (else (error "attr-kind: internal error, not an attribute class"
-+ (object-class-name attr))))
-+)
-+
-+; Accessors.
-+
-+(define (attr-default attr) (elm-xget attr 'default))
-+(define (attr-values attr) (elm-xget attr 'values))
-+
-+; Create an attribute.
-+; Attributes are stored in attribute lists using the actual value
-+; rather than an object containing the value, so we only have to cons
-+; NAME and VALUE rather than building some object. This is for simplicity
-+; and speed. We try to incrementally complicate things, only as necessary.
-+
-+; VALUE must be #f or #t.
-+
-+(define (bool-attr-make name value) (cons name value))
-+
-+; VALUES must be a list of symbols.
-+; E.g., (val1 val2) not val1,val2.
-+
-+(define (bitset-attr-make name values) (cons name values))
-+
-+; VALUE must be a number (or maybe a symbol).
-+
-+(define (int-attr-make name value) (cons name value))
-+
-+; VALUE must be a symbol.
-+
-+(define (enum-attr-make name value) (cons name value))
-+
-+;; Return a procedure to parse an attribute.
-+;; RIGHT-TYPE? is a procedure that verifies the value is the right type.
-+;; MESSAGE is printed if there is an error.
-+;; The result of the parsed attribute is (name . value).
-+
-+(define (/parse-simple-attribute right-type? message)
-+ (lambda (self context val)
-+ (if (and (not (null? val))
-+ (right-type? (car val))
-+ (null? (cdr val)))
-+ (cons (obj:name self) (car val))
-+ (parse-error context message (cons (obj:name self) val))))
-+)
-+
-+; A boolean attribute's value is either #t or #f.
-+
-+(method-make!
-+ <boolean-attribute> 'parse-value
-+ (/parse-simple-attribute boolean? "boolean attribute not one of #f/#t")
-+)
-+
-+(method-make!
-+ <string-attribute> 'parse-value
-+ (/parse-simple-attribute string? "invalid argument to string attribute"))
-+
-+; A bitset attribute's value is a list of symbols.
-+; For backwards compatibility (ATTR val1,val2,val3) and
-+; (ATTR "val1,val2,val3") are also supported for bitset values.
-+; val1,val2,val3 is not portable (e.g. mzscheme will reject it).
-+;
-+; We don't validate the values. In the case of the MACH attribute,
-+; there's no current mechanism to create it after all define-mach's have
-+; been read in.
-+; ??? Need to decide whether all define-mach's must appear before any
-+; define-insn's. It would be nice to be able to spread an architecture's
-+; description over several .cpu files.
-+; ??? On the other hand, all machs are specified in define-arch.
-+; Perhaps creation of builtins could be defered until then.
-+
-+(method-make!
-+ <bitset-attribute> 'parse-value
-+ (lambda (self context val)
-+ (let ((value (if (and (= (length val) 1)
-+ (or (symbol? (car val)) (string? (car val))))
-+ (map string->symbol (string-cut (->string (car val)) #\,))
-+ val))
-+ (message "improper bitset attribute"))
-+ ;; NOTE: An empty list is ok.
-+ (if (all-true? (map symbol? value))
-+ (cons (obj:name self) value)
-+ (parse-error context message (cons (obj:name self) val)))))
-+)
-+
-+; An integer attribute's value is a number
-+; (or maybe a symbol representing that value).
-+
-+(method-make!
-+ <integer-attribute> 'parse-value
-+ (/parse-simple-attribute (lambda (x) (or (number? x) (symbol? x)))
-+ "improper integer attribute")
-+)
-+
-+; An enum attribute's value is a symbol representing that value.
-+
-+(method-make!
-+ <enum-attribute> 'parse-value
-+ (/parse-simple-attribute (lambda (x) (or (symbol? x) (string? x)))
-+ "improper enum attribute")
-+)
-+
-+; Parse a boolean attribute's value definition.
-+
-+(method-make!
-+ <boolean-attribute> 'parse-value-def
-+ (lambda (self context values)
-+ (if (equal? values '(#f #t))
-+ values
-+ (parse-error context "boolean value list must be (#f #t)" values)))
-+)
-+
-+; Ignore values for strings.
-+; They're not supported and /attr-read catches this.
-+
-+(method-make!
-+ <string-attribute> 'parse-value-def
-+ (lambda (self context values) #f)
-+)
-+
-+; Parse a bitset attribute's value definition.
-+
-+(method-make!
-+ <bitset-attribute> 'parse-value-def
-+ (lambda (self context values)
-+ ;; parse-enum-vals works well enough
-+ (parse-enum-vals context "" values))
-+)
-+
-+; Parse an integer attribute's value definition.
-+; VALUES may be #f which means any value is ok.
-+; A fixed set of VALUES is work-in-progress.
-+
-+(method-make!
-+ <integer-attribute> 'parse-value-def
-+ (lambda (self context values)
-+ (if values
-+ (for-each (lambda (val)
-+ ;; A list entry is for providing a sanitization key.
-+ (if (or (not (list? val))
-+ (not (number? (car val))))
-+ (parse-error context
-+ "invalid element in integer attribute list"
-+ val)))
-+ values))
-+ values)
-+)
-+
-+; Parse an enum attribute's value definition.
-+; See parse-enum-vals for more info.
-+
-+(method-make!
-+ <enum-attribute> 'parse-value-def
-+ (lambda (self context values)
-+ (parse-enum-vals context "" values))
-+)
-+
-+; Make an attribute list object from a list of name/value pairs.
-+
-+(define (atlist-make prefix . attrs) (make <attr-list> prefix attrs))
-+
-+; Parse an attribute definition.
-+; This is the main routine for building an attribute object from a
-+; description in the .cpu file.
-+; All arguments are in raw (non-evaluated) form.
-+; TYPE-CLASS is the class of the object to create.
-+; i.e. one of <{boolean,bitset,integer,enum,string}-attribute>.
-+; For enum attributes, if DEFAULT is #f use the first value.
-+; For all other attribute kinds, we use what /attr-read gives us.
-+; ??? Allowable values for integer attributes is wip,
-+; for now it is the portable set of integers (int32_t).
-+
-+(define (/attr-parse context type-class name comment attrs for default values)
-+ (logit 2 "Processing attribute " name " ...\n")
-+
-+ ;; Pick out name first to augment the error context.
-+ (let* ((name (parse-name context name))
-+ (context (context-append-name context name))
-+ (result (new type-class))
-+ (parsed-values (send result 'parse-value-def context values)))
-+
-+ (elm-xset! result 'name name)
-+ (elm-xset! result 'comment (parse-comment context comment))
-+ (elm-xset! result 'attrs (atlist-parse context attrs ""))
-+ (elm-xset! result 'for for)
-+
-+ ;; Set the default.
-+ ;; FIXME: Clean up with /attr-read.
-+ (case (class-name type-class)
-+ ((<boolean-attribute>)
-+ ;; ??? docs say default must be #f, but we want to allow an rtx to
-+ ;; specify the default.
-+ (if (and (not (memq default '(#f #t)))
-+ (not (/attr-val-is-rtx? default)))
-+ (parse-error context "invalid default" default))
-+ (elm-xset! result 'default default))
-+ ((<string-attribute>)
-+ (let ((default (or default "")))
-+ (if (and (not (string? default))
-+ (not (/attr-val-is-rtx? default)))
-+ (parse-error context "invalid default" default))
-+ (elm-xset! result 'default default)))
-+ ((<integer-attribute>)
-+ (let ((default (if default default (if (null? values) 0 (car values)))))
-+ (if (and (not (integer? default))
-+ (not (/attr-val-is-rtx? default)))
-+ (parse-error context "invalid default" default))
-+ (elm-xset! result 'default default)))
-+ ((<enum-attribute>)
-+ (let ((default (if default default (caar parsed-values))))
-+ (if (and (not (assq default parsed-values))
-+ (not (/attr-val-is-rtx? default)))
-+ (parse-error context "invalid default" default))
-+ (elm-xset! result 'default default)))
-+ ((<bitset-attribute>)
-+ ;; bitset attributes must specify a default, /attr-read catches this
-+ (assert default)
-+ ;; It's also /attr-read's job to ensure it is a list.
-+ (assert (list? default))
-+ (let ((default default))
-+ ;; NOTE: We don't allow an rtx for bitset attributes,
-+ ;; the rtl language currently doesn't support them.
-+ (if (/attr-val-is-rtx? default)
-+ (parse-error context "invalid default, rtx not supported for bitset" default))
-+ (if (not (all-true? (map (lambda (v) (assq v parsed-values))
-+ default)))
-+ (parse-error context "invalid default" default))
-+ (elm-xset! result 'default default))))
-+
-+ (elm-xset! result 'values parsed-values)
-+
-+ result)
-+)
-+
-+; Read an attribute description
-+; This is the main routine for analyzing attributes in the .cpu file.
-+; CONTEXT is a <context> object for error messages.
-+; ARG-LIST is an associative list of field name and field value.
-+; /attr-parse is invoked to create the attribute object.
-+
-+(define (/attr-read context . arg-list)
-+ (let (
-+ (type 'not-set) ;; attribute type
-+ (type-class 'not-set) ;; attribute class
-+ (name #f)
-+ (comment "")
-+ (attrs nil)
-+ (for #f) ;; assume for everything
-+ (default #f) ;; #f indicates "not set"
-+ (values #f) ;; #f indicates "not set"
-+ )
-+
-+ ;; Loop over each element in ARG-LIST, recording what's found.
-+ (let loop ((arg-list arg-list))
-+ (if (null? arg-list)
-+ nil
-+ (let ((arg (car arg-list))
-+ (elm-name (caar arg-list)))
-+ (case elm-name
-+ ((type)
-+ (set! type-class (case (cadr arg)
-+ ((boolean) <boolean-attribute>)
-+ ((string) <string-attribute>)
-+ ((bitset) <bitset-attribute>)
-+ ((integer) <integer-attribute>)
-+ ((enum) <enum-attribute>)
-+ (else (parse-error
-+ context
-+ "invalid attribute type"
-+ (cadr arg)))))
-+ (set! type (cadr arg)))
-+ ((name) (set! name (cadr arg)))
-+ ((comment) (set! comment (cadr arg)))
-+ ((attrs) (set! attrs (cdr arg)))
-+ ((for) (set! for (cdr arg)))
-+ ((default) (set! default (cdr arg)))
-+ ((values) (set! values (cdr arg)))
-+ (else (parse-error context "invalid attribute arg" arg)))
-+ (loop (cdr arg-list)))))
-+
-+ ;; Must have type now.
-+ (if (eq? type-class 'not-set)
-+ (parse-error context "type not specified") arg-list)
-+
-+ ;; For scalar attributes, fix up the default.
-+ (if (and default (memq type '(boolean string integer enum)))
-+ (begin
-+ (if (!= (length default) 1)
-+ (parse-error context "invalid default" default))
-+ ;; Don't change rtx values.
-+ (if (not (pair? (car default)))
-+ (set! default (car default)))))
-+
-+ ;; Establish proper defaults now that we know the type.
-+ ;; FIXME: Clean up with /attr-parse.
-+ (case type
-+ ((boolean)
-+ (if (eq? default #f)
-+ (set! default #f)) ;; really a nop, but for consistency
-+ (if (eq? values #f)
-+ (set! values '(#f #t))))
-+ ((bitset) ;; FIXME
-+ (if (eq? default #f)
-+ (parse-error context "bitset attribute default not specified"
-+ arg-list))
-+ (if (eq? values #f)
-+ (parse-error context "bitset attribute values not specified"
-+ arg-list)))
-+ ((integer) ;; FIXME
-+ (if (eq? default #f)
-+ (set! default 0))
-+ (if (eq? values #f)
-+ (set! values #f))) ;; really a nop, but for consistency
-+ ((enum) ;; FIXME
-+;; There are some existing cases where no default is specified,
-+;; expecting that the first value is the default.
-+;; (if (eq? default #f)
-+;; (parse-error context "enum attribute default not specified"
-+;; arg-list))
-+ (if (eq? values #f)
-+ (parse-error context "enum attribute values not specified"
-+ arg-list)))
-+ ((string)
-+ (if (eq? default #f)
-+ (set! default ""))
-+ (if (not (eq? values #f))
-+ (parse-error context "string attribute values specified"
-+ arg-list)))
-+ )
-+
-+ ;; Now that we've identified the elements, build the object.
-+ (/attr-parse context type-class name comment attrs for default values))
-+)
-+
-+; Main routines for defining attributes in .cpu files.
-+
-+(define define-attr
-+ (lambda arg-list
-+ (let ((a (apply /attr-read (cons (make-current-context "define-attr")
-+ arg-list))))
-+ (current-attr-add! a)
-+ a))
-+)
-+
-+; Query routines.
-+
-+; Lookup ATTR-NAME in ATTR-LIST.
-+; The result is the object or #f if not found.
-+
-+(define (attr-lookup attr-name attr-list)
-+ (object-assq attr-name attr-list)
-+)
-+
-+; Return a boolean indicating if boolean attribute ATTR is "true" in
-+; attribute alist ALIST.
-+; Note that if the attribute isn't present, it is defined to be #f.
-+
-+(method-make!
-+ <attr-list> 'has-attr?
-+ (lambda (self attr)
-+ (let ((a (assq attr (elm-get self 'attrs))))
-+ (cond ((not a) a)
-+ ((boolean? (cdr a)) (cdr a))
-+ (else (error "Not a boolean attribute:" attr)))))
-+)
-+
-+(define (atlist-has-attr? atlist attr)
-+ (send atlist 'has-attr? attr)
-+)
-+
-+; Return a boolean indicating if attribute ATTR is present in
-+; attribute alist ALIST.
-+
-+(method-make!
-+ <attr-list> 'attr-present?
-+ (lambda (self attr)
-+ (->bool (assq attr (elm-get self 'attrs))))
-+)
-+
-+(define (atlist-attr-present? atlist attr)
-+ (send atlist 'attr-present? attr)
-+)
-+
-+;; Return #t if attribute value VAL is an rtx expression.
-+;; RTXs in attributes are recorded as a list of one element
-+;; which is the rtx.
-+;; I.e., ((rtx foo bar)).
-+
-+(define (/attr-val-is-rtx? val)
-+ (and (pair? val)
-+ (null? (cdr val))
-+ (pair? (car val))) ;; pair? -> cheap non-null-list?
-+)
-+
-+; Expand attribute value ATVAL, which is an rtx expression.
-+; OWNER is the containing object or #f if there is none.
-+; OWNER is needed if an attribute is defined in terms of other attributes.
-+; OWNER is also needed to get the ISA(s) in which to evaluate the expression.
-+; If it's #f obviously ATVAL can't be defined in terms of others,
-+; or refer to operands that require an ISA to disambiguate.
-+
-+(define (/attr-eval atval owner)
-+ (let* ((atval-expr (car atval))
-+ (expr (rtx-simplify #f owner
-+ (rtx-canonicalize #f 'DFLT
-+ (and owner (obj-isa-list owner))
-+ nil atval-expr)
-+ nil))
-+ (value (rtx-value expr owner)))
-+ (cond ((symbol? value) value)
-+ ((number? value) value)
-+ (error "/attr-eval: internal error, unsupported result:" value)))
-+)
-+
-+; Return value of ATTR in attribute alist ALIST.
-+; If not present, return the default value.
-+; If ATTR is an unknown attribute, return #f.
-+; OWNER is the containing object or #f if there is none.
-+
-+(define (attr-value alist attr owner)
-+ (let ((a (assq-ref alist attr)))
-+ (if a
-+ (if (/attr-val-is-rtx? a)
-+ (/attr-eval a owner)
-+ a)
-+ (attr-lookup-default attr owner)))
-+)
-+
-+; Return the value of ATTR in ATLIST.
-+; If not present, return the default value.
-+; If ATTR is an unknown attribute, return #f.
-+; OWNER is the containing object or #f if there is none.
-+
-+(define (atlist-attr-value atlist attr owner)
-+ (attr-value (atlist-attrs atlist) attr owner)
-+)
-+
-+; Same as atlist-attr-value but return nil if attribute not present.
-+
-+(define (atlist-attr-value-no-default atlist attr owner)
-+ (let ((a (assq-ref (atlist-attrs atlist) attr)))
-+ (if a
-+ (if (/attr-val-is-rtx? a)
-+ (/attr-eval a owner)
-+ a)
-+ nil))
-+)
-+
-+; Return the default for attribute A.
-+;
-+; If A is unknown return #f.
-+; This means the caller can't distinguish booleans from unknowns,
-+; but the caller is left to deal with that.
-+;
-+; OWNER is the containing object or #f if there is none.
-+
-+(define (attr-lookup-default a owner)
-+ (let ((at (current-attr-lookup a)))
-+ (if at
-+ (if (bool-attr? at)
-+ #f ;; FIXME: should fetch default from the attribute
-+ (let ((deflt (attr-default at)))
-+ (if deflt
-+ (if (/attr-val-is-rtx? deflt)
-+ (/attr-eval deflt owner)
-+ deflt)
-+ ;; If no default was provided, use the first value.
-+ ;; FIXME: This shouldn't happen. /attr-parse should DTRT.
-+ (caar (attr-values at)))))
-+ #f))
-+)
-+
-+; Return a boolean indicating if X is present in BITSET.
-+; Bitset values are recorded as (val1 val2 ...).
-+
-+(define (bitset-attr-member? x bitset)
-+ (->bool (memq x bitset))
-+)
-+
-+; Routines for accessing attributes in objects.
-+
-+; Get/set attributes of OBJ.
-+; OBJ is any object which supports the get-atlist message.
-+
-+(define (obj-atlist obj)
-+ (let ((result (send obj 'get-atlist)))
-+ ; As a speed up, we allow objects to specify an empty attribute list
-+ ; with #f or (), rather than creating an attr-list object.
-+ ; ??? There is atlist-empty now which should be used directly.
-+ (if (or (null? result) (not result))
-+ atlist-empty
-+ result))
-+)
-+
-+(define (obj-set-atlist! obj attrs) (send obj 'set-atlist! attrs))
-+
-+; Add attribute ATTR to OBJ.
-+; The attribute is prepended to the front so it overrides any existing
-+; definition.
-+
-+(define (obj-cons-attr! obj attr)
-+ (obj-set-atlist! obj (atlist-cons attr (obj-atlist obj)))
-+)
-+
-+; Add attribute list ATLIST to OBJ.
-+; Attributes in ATLIST override existing values, so ATLIST is "prepended".
-+
-+(define (obj-prepend-atlist! obj atlist)
-+ ; Must have same prefix.
-+ (assert (equal? (atlist-prefix (obj-atlist obj))
-+ (atlist-prefix atlist)))
-+ (obj-set-atlist! obj (atlist-append atlist (obj-atlist obj)))
-+)
-+
-+; Return boolean of whether OBJ has boolean attribute ATTR or not.
-+; OBJ is any object that supports attributes.
-+
-+(define (obj-has-attr? obj attr)
-+ (atlist-has-attr? (obj-atlist obj) attr)
-+)
-+
-+; FIXME: for backward compatibility. Delete in time.
-+(define has-attr? obj-has-attr?)
-+
-+; Return a boolean indicating if attribute ATTR is present in OBJ.
-+
-+(define (obj-attr-present? obj attr)
-+ (atlist-attr-present? (obj-atlist obj) attr)
-+)
-+
-+; Return value of attribute ATTR in OBJ.
-+; If the attribute isn't present, the default is returned.
-+; If ATTR is an unknown attribute, return #f.
-+; OBJ is any object that supports the get-atlist method.
-+
-+(define (obj-attr-value obj attr)
-+ (let ((atlist (obj-atlist obj)))
-+ (atlist-attr-value atlist attr obj))
-+)
-+
-+; Return boolean of whether OBJ has attribute ATTR value VALUE or not.
-+; OBJ is any object that supports attributes.
-+; NOTE: The default value of the attribute IS considered.
-+
-+(define (obj-has-attr-value? obj attr value)
-+ (let ((a (obj-attr-value obj attr)))
-+ (eq? a value))
-+)
-+
-+; Return boolean of whether OBJ explicitly has attribute ATTR value VALUE
-+; or not.
-+; OBJ is any object that supports attributes.
-+; NOTE: The default value of the attribute IS NOT considered.
-+
-+(define (obj-has-attr-value-no-default? obj attr value)
-+ (let* ((atlist (obj-atlist obj))
-+ (objs-value (atlist-attr-value-no-default atlist attr obj)))
-+ (and (not (null? objs-value)) (eq? value objs-value)))
-+)
-+
-+; Utilities.
-+
-+; Generate a list representing a bit mask of the indices of 'values'
-+; within 'all-values'. Each element in the resulting list represents a byte.
-+; Both bits and bytes are indexed from left to right starting at 0
-+; with 8 bits in a byte.
-+
-+(define (charmask-bytes values all-values vec-length)
-+ (logit 3 "charmask-bytes for " values " " all-values "\n")
-+ (let ((result (make-vector vec-length 0))
-+ (indices (map (lambda (name)
-+ (list-ref (map cadr all-values)
-+ (element-lookup-index name (map car all-values) 0)))
-+ values)))
-+ (logit 3 "indices: " indices "\n")
-+ (for-each (lambda (x)
-+ (let* ((byteno (quotient x 8))
-+ (bitno (- 7 (remainder x 8)))
-+ (byteval (logior (vector-ref result byteno)
-+ (ash 1 bitno))))
-+ (vector-set! result byteno byteval)))
-+ indices)
-+ (logit 3 "result: " (vector->list result) "\n")
-+ (vector->list result))
-+)
-+
-+; Convert a bitset value into a bit string based on the
-+; index of each member in values.
-+; VALUE is a list of symbols in the bitset.
-+; VALUES is the values member of the attribute's definition.
-+
-+(define (/bitset-attr->charmask value values)
-+ (let* ((values-names (map car values))
-+ (values-values (map cadr values))
-+ (vec-length (+ 1 (quotient (apply max values-values) 8))))
-+ (string-append "{ " (number->string vec-length) ", \""
-+ (string-map (lambda (x)
-+ (string-append "\\x" (number->hex x)))
-+ (charmask-bytes value values vec-length))
-+ "\" }"))
-+)
-+
-+; Return the enum of ATTR-NAME for type TYPE.
-+; TYPE is one of 'ifld, 'hw, 'operand, 'insn.
-+
-+(define (gen-attr-enum type attr-name)
-+ (string-upcase (string-append "CGEN_" type "_" (gen-sym attr-name)))
-+)
-+
-+; Return a list of enum value definitions for gen-enum-decl.
-+; Attributes numbers are organized as follows: booleans are numbered 0-31.
-+; The range is because that's what fits in a portable int. Unused numbers
-+; are left unused. Non-booleans are numbered starting at 32.
-+; An alternative is start numbering the booleans at 32. The generated code
-+; is simpler with the current way (the "- 32" to get back the bit number or
-+; array index number occurs less often).
-+;
-+; Three special values are created:
-+; END-BOOLS - mark end of boolean attributes
-+; END-NBOOLS - mark end of non-boolean attributes
-+; START-NBOOLS - marks the start of the non-boolean attributes
-+; (needed in case first non-bool is sanytized out).
-+;
-+; ATTR-OBJ-LIST is a list of <attribute> objects (always subclassed of course).
-+
-+(define (attr-list-enum-list attr-obj-list)
-+ (let ((sorted-attrs (/attr-sort (attr-remove-meta-attrs attr-obj-list))))
-+ (assert (<= (length (car sorted-attrs)) 32))
-+ (append!
-+ (map (lambda (bool-attr)
-+ (list (obj:name bool-attr) '-
-+ (atlist-attrs (obj-atlist bool-attr))))
-+ (car sorted-attrs))
-+ (list '(END-BOOLS))
-+ (list '(START-NBOOLS 31))
-+ (map (lambda (nbool-attr)
-+ (list (obj:name nbool-attr) '-
-+ (atlist-attrs (obj-atlist nbool-attr))))
-+ (cdr sorted-attrs))
-+ (list '(END-NBOOLS))
-+ ))
-+)
-+
-+; Sort an alist of attributes so non-boolean attributes are at the front.
-+; This is used to sort a particular object's attributes.
-+; This is required by the C support code (cgen.h:CGEN_ATTR_VALUE).
-+; Boolean attributes appear as (NAME . #t/#f), non-boolean ones appear as
-+; (NAME . VALUE). Attributes of the same type are sorted by name.
-+
-+(define (/attr-sort-alist alist)
-+ (sort alist
-+ (lambda (a b)
-+ ;(display (list a b "\n"))
-+ (cond ((and (boolean? (cdr a)) (boolean? (cdr b)))
-+ (string<? (symbol->string (car a)) (symbol->string (car b))))
-+ ((boolean? (cdr a)) #f) ; we know b is non-bool here
-+ ((boolean? (cdr b)) #t) ; we know a is non-bool here
-+ (else (string<? (symbol->string (car a))
-+ (symbol->string (car b)))))))
-+)
-+
-+; Sort ATTR-LIST into two lists: bools and non-bools.
-+; The car of the result is the bools, the cdr is the non-bools.
-+; Attributes requiring a fixed index have the INDEX attribute,
-+; and used for the few special attributes that are refered to by
-+; architecture independent code.
-+; For each of non-bools and bools, put attributes with the INDEX attribute
-+; first. This is used to sort a list of attributes for output (e.g. define
-+; the attr enum).
-+;
-+; FIXME: Record index number with the INDEX attribute and sort on it.
-+; At present it's just a boolean.
-+
-+(define (/attr-sort attr-list)
-+ (let loop ((fixed-non-bools nil)
-+ (non-fixed-non-bools nil)
-+ (fixed-bools nil)
-+ (non-fixed-bools nil)
-+ (attr-list attr-list))
-+ (cond ((null? attr-list)
-+ (cons (append! (reverse! fixed-bools)
-+ (reverse! non-fixed-bools))
-+ (append! (reverse! fixed-non-bools)
-+ (reverse! non-fixed-non-bools))))
-+ ((bool-attr? (car attr-list))
-+ (if (obj-has-attr? (car attr-list) 'INDEX)
-+ (loop fixed-non-bools non-fixed-non-bools
-+ (cons (car attr-list) fixed-bools) non-fixed-bools
-+ (cdr attr-list))
-+ (loop fixed-non-bools non-fixed-non-bools
-+ fixed-bools (cons (car attr-list) non-fixed-bools)
-+ (cdr attr-list))))
-+ (else
-+ (if (obj-has-attr? (car attr-list) 'INDEX)
-+ (loop (cons (car attr-list) fixed-non-bools) non-fixed-non-bools
-+ fixed-bools non-fixed-bools
-+ (cdr attr-list))
-+ (loop fixed-non-bools (cons (car attr-list) non-fixed-non-bools)
-+ fixed-bools non-fixed-bools
-+ (cdr attr-list))))))
-+)
-+
-+; Return number of non-bools in attributes ATLIST.
-+
-+(define (attr-count-non-bools atlist)
-+ (count-true (map (lambda (a) (not (bool-attr? a)))
-+ atlist))
-+)
-+
-+; Given an alist of attributes, return the non-bools.
-+
-+(define (attr-non-bool-attrs alist)
-+ (let loop ((result nil) (alist alist))
-+ (cond ((null? alist) (reverse! result))
-+ ((boolean? (cdar alist)) (loop result (cdr alist)))
-+ (else (loop (cons (car alist) result) (cdr alist)))))
-+)
-+
-+; Given an alist of attributes, return the bools.
-+
-+(define (attr-bool-attrs alist)
-+ (let loop ((result nil) (alist alist))
-+ (cond ((null? alist) (reverse! result))
-+ ((boolean? (cdar alist))
-+ (loop (cons (car alist) result) (cdr alist)))
-+ (else (loop result (cdr alist)))))
-+)
-+
-+; Parse an attribute spec.
-+; CONTEXT is a <context> object or #f if there is none.
-+; ATTRS is a list of attribute specs (e.g. (FOO !BAR (BAZ 3))).
-+; The result is the attribute alist.
-+
-+(define (attr-parse context attrs)
-+ (logit 4 (list 'attr-parse context attrs) "\n")
-+ (if (not (list? attrs))
-+ (parse-error context "improper attribute list" attrs))
-+ (let ((alist nil))
-+ (for-each (lambda (elm)
-+ (cond ((symbol? elm)
-+ ; boolean attribute
-+ (if (char=? (string-ref (symbol->string elm) 0) #\!)
-+ (set! alist (acons (string->symbol (string-drop1 (symbol->string elm))) #f alist))
-+ (set! alist (acons elm #t alist)))
-+ (if (not (current-attr-lookup (caar alist)))
-+ (parse-error context "unknown attribute" (caar alist))))
-+ ((and (list? elm) (pair? elm) (symbol? (car elm)))
-+ (let ((a (current-attr-lookup (car elm))))
-+ (if (not a)
-+ (parse-error context "unknown attribute" elm))
-+ (set! alist (cons (send a 'parse-value
-+ context (cdr elm))
-+ alist))))
-+ (else (parse-error context "improper attribute" elm))))
-+ attrs)
-+ alist)
-+)
-+
-+; Parse an object attribute spec.
-+; ATTRS is a list of attribute specs (e.g. (FOO !BAR (BAZ 3))).
-+; The result is an <attr-list> object.
-+
-+(define (atlist-parse context attrs prefix)
-+ (make <attr-list> prefix (attr-parse context attrs))
-+)
-+
-+;; Return the source form of an atlist's values.
-+;; Externally scalar attributes (boolean, integer, enum and string) are
-+;; ((name1 value1) (name2 value2) ...).
-+;; Internally they are ((name1 . value1) (name2 . value2) ...).
-+;; Externally bitset attributes are (name value1 value2 ...).
-+;; Internally they are the same, (name value1 value2 ...).
-+;; If the value is an rtx expression, externally it is (name (expr)),
-+;; and internally it is the same, (name (expr)).
-+
-+(define (atlist-source-form atlist)
-+ (map (lambda (attr)
-+ (let ((value (cdr attr)))
-+ (if (pair? value)
-+ (cons (car attr) value)
-+ (list (car attr) value))))
-+ (atlist-attrs atlist))
-+)
-+
-+; Cons an attribute to an attribute list to create a new attribute list.
-+; ATLIST is either an attr-list object or #f or () (both of the latter two
-+; signify an empty attribute list, in which case we make the prefix of the
-+; result "").
-+
-+(define (atlist-cons attr atlist)
-+ (if (or (not atlist) (null? atlist))
-+ (make <attr-list> "" (cons attr nil))
-+ (make <attr-list> (atlist-prefix atlist) (cons attr (atlist-attrs atlist))))
-+)
-+
-+; Append one attribute list to another.
-+; The prefix for the new atlist is taken from the first one.
-+
-+(define (atlist-append attr-list1 attr-list2)
-+ (make <attr-list>
-+ (atlist-prefix attr-list1)
-+ (append (atlist-attrs attr-list1) (atlist-attrs attr-list2)))
-+)
-+
-+; Remove meta-attributes from ALIST.
-+; "meta" may be the wrong adjective to use here.
-+; The attributes in question are not intended to appear in generated files.
-+; They started out being attributes of attributes, hence the name "meta".
-+
-+(define (attr-remove-meta-attrs-alist alist)
-+ (let ((all-attrs (current-attr-list)))
-+ ; FIXME: Why not use find?
-+ (let loop ((result nil) (alist alist))
-+ (if (null? alist)
-+ (reverse! result)
-+ (let ((attr (attr-lookup (caar alist) all-attrs)))
-+ (if (and attr (has-attr? attr 'META))
-+ (loop result (cdr alist))
-+ (loop (cons (car alist) result) (cdr alist)))))))
-+)
-+
-+; Remove meta-attributes from ATTR-LIST.
-+; "meta" may be the wrong adjective to use here.
-+; The attributes in question are not intended to appear in generated files.
-+; They started out being attributes of attributes, hence the name "meta".
-+
-+(define (attr-remove-meta-attrs attr-list)
-+ ; FIXME: Why not use find?
-+ (let loop ((result nil) (attr-list attr-list))
-+ (cond ((null? attr-list)
-+ (reverse! result))
-+ ((has-attr? (car attr-list) 'META)
-+ (loop result (cdr attr-list)))
-+ (else
-+ (loop (cons (car attr-list) result) (cdr attr-list)))))
-+)
-+
-+; Remove duplicates from ATTRS, a list of attributes.
-+; Attribute lists are typically small so we use a simple O^2 algorithm.
-+; The leading entry of an attribute overrides subsequent ones so this is
-+; defined to pick the first entry of each attribute.
-+
-+(define (attr-nub attrs)
-+ (let loop ((result nil) (attrs attrs))
-+ (cond ((null? attrs) (reverse! result))
-+ ((assq (caar attrs) result) (loop result (cdr attrs)))
-+ (else (loop (cons (car attrs) result) (cdr attrs)))))
-+)
-+
-+; Return a list of all attrs in TABLE-LIST, a list of lists of arbitrary
-+; elements. A list of lists is passed to simplify computation of insn
-+; attributes where the insns and macro-insns are on separate lists and
-+; appending them into one list would be unnecessarily expensive.
-+; ACCESSOR is a function to access the attrs field from TABLE-LIST.
-+; Duplicates are eliminated and the list is sorted so non-boolean attributes
-+; are at the front (required by the C code that fetches attribute values).
-+; STD-ATTRS is an `attr-list' object of attrs that are always available.
-+; The actual values returned are random (e.g. #t vs #f). We could
-+; canonicalize them.
-+; The result is an alist of all the attributes that are used in TABLE-LIST.
-+; ??? The cdr of each element is some random value. Perhaps it should be
-+; the default value or perhaps we should just return a list of names.
-+; ??? No longer used.
-+
-+(define (attr-compute-all table-list accessor std-attrs)
-+ (let ((accessor (lambda (elm) (atlist-attrs (accessor elm)))))
-+ (attr-remove-meta-attrs-alist
-+ (attr-nub
-+ (/attr-sort-alist
-+ (append
-+ (apply append
-+ (map (lambda (table-elm)
-+ (apply append
-+ (find-apply accessor
-+ (lambda (e)
-+ (let ((attrs (accessor e)))
-+ (not (null? attrs))))
-+ table-elm)))
-+ table-list))
-+ (atlist-attrs std-attrs))))))
-+)
-+
-+; Return lists of attributes for particular object types.
-+; FIXME: The output shouldn't be required to be sorted.
-+
-+(define (current-attr-list-for type)
-+ (let ((sorted (/attr-sort (find (lambda (a)
-+ (if (atlist-for a)
-+ (memq type (atlist-for a))
-+ #t))
-+ (attr-remove-meta-attrs
-+ (current-attr-list))))))
-+ ; Current behaviour puts the non-bools at the front.
-+ (append! (cdr sorted) (car sorted)))
-+)
-+(define (current-ifld-attr-list)
-+ (current-attr-list-for 'ifield)
-+)
-+(define (current-hw-attr-list)
-+ (current-attr-list-for 'hardware)
-+)
-+(define (current-op-attr-list)
-+ (current-attr-list-for 'operand)
-+)
-+(define (current-insn-attr-list)
-+ (current-attr-list-for 'insn)
-+)
-+
-+; Methods to emit the C value of an attribute.
-+; These don't _really_ belong here (C code doesn't belong in the appl'n
-+; independent part of CGEN), but there isn't a better place for them
-+; (maybe utils-cgen.scm?) and there's only a few of them.
-+
-+(method-make!
-+ <boolean-attribute> 'gen-value-for-defn-raw
-+ (lambda (self value)
-+ (if (not value)
-+ "0"
-+ "1"))
-+ ;(string-upcase (string-append (obj:str-name self) "_" value)))
-+)
-+
-+(method-make!
-+ <boolean-attribute> 'gen-value-for-defn
-+ (lambda (self value)
-+ (send self 'gen-value-for-defn-raw value))
-+)
-+
-+;; NOTE: VALUE is a list of symbols in the bitset.
-+
-+(method-make!
-+ <bitset-attribute> 'gen-value-for-defn-raw
-+ (lambda (self value)
-+ (if (string=? (string-downcase (gen-sym self)) "isa")
-+ (/bitset-attr->charmask value (elm-get self 'values))
-+ (string-drop1
-+ (string-upcase
-+ (string-map (lambda (x)
-+ (string-append "|(1<<"
-+ (gen-sym self)
-+ "_" (gen-c-symbol x) ")"))
-+ value))))
-+ )
-+)
-+
-+;; NOTE: VALUE is a list of symbols in the bitset.
-+
-+(method-make!
-+ <bitset-attribute> 'gen-value-for-defn
-+ (lambda (self value)
-+ (string-append
-+ "{ "
-+ (if (string=? (string-downcase (gen-sym self)) "isa")
-+ (/bitset-attr->charmask value (elm-get self 'values))
-+ (string-append
-+ "{ "
-+ (string-drop1
-+ (string-upcase
-+ (string-map (lambda (x)
-+ (string-append "|(1<<"
-+ (gen-sym self)
-+ "_" (gen-c-symbol x) ")"))
-+ value)))
-+ ", 0 }"))
-+ " }")
-+ )
-+)
-+
-+(method-make!
-+ <integer-attribute> 'gen-value-for-defn-raw
-+ (lambda (self value)
-+ (number->string value)
-+ )
-+)
-+
-+(method-make!
-+ <integer-attribute> 'gen-value-for-defn
-+ (lambda (self value)
-+ (string-append
-+ "{ { "
-+ (send self 'gen-value-for-defn-raw value)
-+ ", 0 } }")
-+ )
-+)
-+
-+(method-make!
-+ <enum-attribute> 'gen-value-for-defn-raw
-+ (lambda (self value)
-+ (string-upcase
-+ (gen-c-symbol (string-append (obj:str-name self)
-+ "_"
-+ (symbol->string value))))
-+ )
-+)
-+
-+(method-make!
-+ <enum-attribute> 'gen-value-for-defn
-+ (lambda (self value)
-+ (string-append
-+ "{ { "
-+ (send self 'gen-value-for-defn-raw value)
-+ ", 0 } }")
-+ )
-+)
-+
-+;; Doesn't handle escape sequences.
-+(method-make!
-+ <string-attribute> 'gen-value-for-defn-raw
-+ (lambda (self value)
-+ (string-append "\"" value "\""))
-+)
-+
-+(method-make!
-+ <string-attribute> 'gen-value-for-defn
-+ (lambda (self value)
-+ (send self 'gen-value-for-defn-raw value))
-+)
-+
-+
-+; Called before loading a .cpu file to initialize.
-+
-+(define (attr-init!)
-+
-+ (reader-add-command! 'define-attr
-+ "\
-+Define an attribute, name/value pair list version.
-+"
-+ nil 'arg-list define-attr)
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Called before a . cpu file is read in to install any builtins.
-+; One thing this does is define all attributes requiring a fixed index,
-+; keeping them all in one place.
-+; ??? Perhaps it would make sense to define all predefined attributes here.
-+
-+(define (attr-builtin!)
-+ (define-attr '(type boolean) '(name VIRTUAL) '(comment "virtual object"))
-+
-+ ; The meta attribute is used for attributes that aren't to appear in
-+ ; generated output (need a better name).
-+ (define-attr '(for attr) '(type boolean) '(name META))
-+
-+ ; Objects to keep local to a generated file.
-+ (define-attr '(for keyword) '(type boolean) '(name PRIVATE))
-+
-+ ; Attributes requiring fixed indices.
-+ (define-attr '(for attr) '(type boolean) '(name INDEX) '(attrs META))
-+
-+ ; ALIAS is used for instructions that are aliases of more general insns.
-+ ; ALIAS insns are ignored by the simulator.
-+ (define-attr '(for insn) '(type boolean) '(name ALIAS)
-+ '(comment "insn is an alias of another")
-+ '(attrs INDEX))
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Called after loading a .cpu file to perform any post-processing required.
-+
-+(define (attr-finish!)
-+ *UNSPECIFIED*
-+)
-diff -Nur binutils-2.24.orig/cgen/AUTHORS binutils-2.24/cgen/AUTHORS
---- binutils-2.24.orig/cgen/AUTHORS 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/AUTHORS 2016-06-30 21:26:12.597890934 +0200
-@@ -0,0 +1,2 @@
-+CGEN was originally written by Doug Evans <dje@transmeta.com>
-+while at Cygnus.
-diff -Nur binutils-2.24.orig/cgen/cgen-doc.scm binutils-2.24/cgen/cgen-doc.scm
---- binutils-2.24.orig/cgen/cgen-doc.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cgen-doc.scm 2016-06-30 21:26:12.597890934 +0200
-@@ -0,0 +1,77 @@
-+; CPU description file generator for CGEN cpu documentation
-+; This is invoked to build: $arch.html.
-+; Copyright (C) 2003, 2009 Doug Evans
-+; This file is part of CGEN.
-+;
-+; This is a standalone script, we don't load anything until we parse the
-+; -s argument (keeps reliance off of environment variables, etc.).
-+
-+; Load the various support routines.
-+
-+(define (load-files srcdir)
-+ (load (string-append srcdir "/read.scm"))
-+ (load (string-append srcdir "/desc.scm"))
-+ (load (string-append srcdir "/desc-cpu.scm"))
-+ (load (string-append srcdir "/html.scm"))
-+)
-+
-+(define doc-arguments
-+ (list
-+ (list "-H" "file" "generate $arch.html in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen.html)))
-+ (list "-I" "file" "generate $arch-insn.html in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-insn.html)))
-+ (list "-N" "file" "specify name of insn.html file"
-+ #f
-+ (lambda (arg) (set! *insn-html-file-name* arg)))
-+ )
-+)
-+
-+; Kept global so it's available to the other .scm files.
-+(define srcdir ".")
-+
-+; Scan argv for -s srcdir.
-+; We can't process any other args until we find the cgen source dir.
-+; The result is srcdir.
-+; We assume "-s" isn't the argument to another option. Unwise, yes.
-+; Alternatives are to require it to be the first argument or at least preceed
-+; any option with a "-s" argument, or to put knowledge of the common argument
-+; set and common argument parsing code in every top level file.
-+
-+(define (find-srcdir argv)
-+ (let loop ((argv argv))
-+ (if (null? argv)
-+ (error "`-s srcdir' not present, can't load cgen"))
-+ (if (string=? "-s" (car argv))
-+ (begin
-+ (if (null? (cdr argv))
-+ (error "missing srcdir arg to `-s'"))
-+ (cadr argv))
-+ (loop (cdr argv))))
-+)
-+
-+; Main routine, parses options and calls generators.
-+
-+(define (cgen-doc argv)
-+ (let ()
-+
-+ ; Find and set srcdir, then load all Scheme code.
-+ ; Drop the first argument, it is the script name (i.e. argv[0]).
-+ (set! srcdir (find-srcdir (cdr argv)))
-+ (set! %load-path (cons srcdir %load-path))
-+ (load-files srcdir)
-+
-+ (display-argv argv)
-+
-+ (cgen #:argv argv
-+ #:app-name "doc"
-+ #:arg-spec doc-arguments
-+ #:init doc-init!
-+ #:finish doc-finish!
-+ #:analyze doc-analyze!)
-+ )
-+)
-+
-+(cgen-doc (program-arguments))
-diff -Nur binutils-2.24.orig/cgen/cgen-gas.scm binutils-2.24/cgen/cgen-gas.scm
---- binutils-2.24.orig/cgen/cgen-gas.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cgen-gas.scm 2016-06-30 21:26:12.597890934 +0200
-@@ -0,0 +1,80 @@
-+; CPU description file generator for the GAS testsuite.
-+; Copyright (C) 2000, 2001, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+
-+; This is invoked to build several .s files and a "build script",
-+; which generates the .d files and .exp DejaGNU test case.
-+
-+; Load the various support routines.
-+
-+(define (load-files srcdir)
-+ (load (string-append srcdir "/read.scm"))
-+ (load (string-append srcdir "/desc.scm"))
-+ (load (string-append srcdir "/desc-cpu.scm"))
-+ (load (string-append srcdir "/opcodes.scm"))
-+ (load (string-append srcdir "/opc-asmdis.scm"))
-+ (load (string-append srcdir "/opc-ibld.scm"))
-+ (load (string-append srcdir "/opc-itab.scm"))
-+ (load (string-append srcdir "/opc-opinst.scm"))
-+ (load (string-append srcdir "/gas-test.scm"))
-+)
-+
-+(define gas-arguments
-+ (list
-+ (list "-B" "file" "generate build script in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-build.sh)))
-+ (list "-E" "file" "generate allinsn.exp in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-allinsn.exp)))
-+ )
-+)
-+
-+; Kept global so it's available to the other .scm files.
-+(define srcdir ".")
-+
-+; Scan argv for -s srcdir.
-+; We can't process any other args until we find the cgen source dir.
-+; The result is srcdir.
-+; We assume "-s" isn't the argument to another option. Unwise, yes.
-+; Alternatives are to require it to be the first argument or at least preceed
-+; any option with a "-s" argument, or to put knowledge of the common argument
-+; set and common argument parsing code in every top level file.
-+
-+(define (find-srcdir argv)
-+ (let loop ((argv argv))
-+ (if (null? argv)
-+ (error "`-s srcdir' not present, can't load cgen"))
-+ (if (string=? "-s" (car argv))
-+ (begin
-+ (if (null? (cdr argv))
-+ (error "missing srcdir arg to `-s'"))
-+ (cadr argv))
-+ (loop (cdr argv))))
-+)
-+
-+; Main routine, parses options and calls generators.
-+
-+(define (cgen-gas argv)
-+ (let ()
-+
-+ ; Find and set srcdir, then load all Scheme code.
-+ ; Drop the first argument, it is the script name (i.e. argv[0]).
-+ (set! srcdir (find-srcdir (cdr argv)))
-+ (set! %load-path (cons srcdir %load-path))
-+ (load-files srcdir)
-+
-+ (display-argv argv)
-+
-+ (cgen #:argv argv
-+ #:app-name "gas-test"
-+ #:arg-spec gas-arguments
-+ #:init gas-test-init!
-+ #:finish gas-test-finish!
-+ #:analyze gas-test-analyze!)
-+ )
-+)
-+
-+(cgen-gas (program-arguments))
-+
-+;; FIXME: cgen-all will generate the opcodes files, not what we want
-diff -Nur binutils-2.24.orig/cgen/cgen-intrinsics.scm binutils-2.24/cgen/cgen-intrinsics.scm
---- binutils-2.24.orig/cgen/cgen-intrinsics.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cgen-intrinsics.scm 2016-06-30 21:26:12.597890934 +0200
-@@ -0,0 +1,84 @@
-+; GCC "intrinsics" file entry point.
-+;
-+; This is invoked to build support files for registering intrinsic
-+; functions within gcc. this code has a fair bit of target-specific
-+; code in it. it's not a general-purpose module yet.
-+;
-+; Copyright (C) 2000, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+;
-+; This is a standalone script, we don't load anything until we parse the
-+; -s argument (keeps reliance off of environment variables, etc.).
-+
-+; Load the various support routines.
-+
-+(define (load-files srcdir)
-+ ; Fix up Scheme to be what we use (guile is always in flux).
-+ (primitive-load-path (string-append srcdir "/guile.scm"))
-+
-+ (load (string-append srcdir "/read.scm"))
-+ (load (string-append srcdir "/intrinsics.scm"))
-+)
-+
-+(define intrinsics-isas '())
-+
-+(define intrinsics-arguments
-+ (list
-+ (list "-K" "isa" "keep isa <isa> in intrinsics" #f
-+ (lambda (args)
-+ (for-each
-+ (lambda (arg) (set! intrinsics-isas (cons (string->symbol arg) intrinsics-isas)))
-+ (string-cut args #\,))))
-+ (list "-M" "file" "generate insns.md in <file>" #f
-+ (lambda (arg) (file-write arg insns.md)))
-+ (list "-N" "file" "generate intrinsics.h in <file>" #f
-+ (lambda (arg) (file-write arg intrinsics.h)))
-+ (list "-P" "file" "generate intrinsic-protos.h in <file>" #f
-+ (lambda (arg) (file-write arg intrinsic-protos.h)))
-+ (list "-T" "file" "generate intrinsic-testsuite.c in <file>" #f
-+ (lambda (arg) (file-write arg intrinsic-testsuite.c)))))
-+
-+; Kept global so it's available to the other .scm files.
-+(define srcdir ".")
-+
-+; Scan argv for -s srcdir.
-+; We can't process any other args until we find the cgen source dir.
-+; The result is srcdir.
-+; We assume "-s" isn't the argument to another option. Unwise, yes.
-+; Alternatives are to require it to be the first argument or at least preceed
-+; any option with a "-s" argument, or to put knowledge of the common argument
-+; set and common argument parsing code in every top level file.
-+
-+(define (find-srcdir argv)
-+ (let loop ((argv argv))
-+ (if (null? argv)
-+ (error "`-s srcdir' not present, can't load cgen"))
-+ (if (string=? "-s" (car argv))
-+ (begin
-+ (if (null? (cdr argv))
-+ (error "missing srcdir arg to `-s'"))
-+ (cadr argv))
-+ (loop (cdr argv))))
-+)
-+
-+; Main routine, parses options and calls generators.
-+
-+(define (cgen-intrinsics argv)
-+ (let ()
-+
-+ ; Find and set srcdir, then load all Scheme code.
-+ ; Drop the first argument, it is the script name (i.e. argv[0]).
-+ (set! srcdir (find-srcdir (cdr argv)))
-+ (set! %load-path (cons srcdir %load-path))
-+ (load-files srcdir)
-+
-+ (display-argv argv)
-+
-+ (cgen #:argv argv
-+ #:app-name "intrinsics"
-+ #:arg-spec intrinsics-arguments
-+ #:analyze intrinsics-analyze!)
-+ )
-+)
-+
-+(cgen-intrinsics (program-arguments))
-diff -Nur binutils-2.24.orig/cgen/cgen-opc.scm binutils-2.24/cgen/cgen-opc.scm
---- binutils-2.24.orig/cgen/cgen-opc.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cgen-opc.scm 2016-06-30 21:26:12.597890934 +0200
-@@ -0,0 +1,108 @@
-+; CPU description file generator for the GNU Binutils.
-+; This is invoked to build: $arch-desc.[ch], $arch-opinst.c,
-+; $arch-opc.h, $arch-opc.c, $arch-asm.in, $arch-dis.in, and $arch-ibld.[ch].
-+; Copyright (C) 2000, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+;
-+; This is a standalone script, we don't load anything until we parse the
-+; -s argument (keeps reliance off of environment variables, etc.).
-+
-+; Load the various support routines.
-+
-+(define (load-files srcdir)
-+ (load (string-append srcdir "/read.scm"))
-+ (load (string-append srcdir "/desc.scm"))
-+ (load (string-append srcdir "/desc-cpu.scm"))
-+ (load (string-append srcdir "/opcodes.scm"))
-+ (load (string-append srcdir "/opc-asmdis.scm"))
-+ (load (string-append srcdir "/opc-ibld.scm"))
-+ (load (string-append srcdir "/opc-itab.scm"))
-+ (load (string-append srcdir "/opc-opinst.scm"))
-+)
-+
-+(define opc-arguments
-+ (list
-+ (list "-OPC" "file" "specify path to .opc file"
-+ (lambda (arg) (set-opc-file-path! arg))
-+ #f)
-+ (list "-H" "file" "generate $arch-desc.h in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-desc.h)))
-+ (list "-C" "file" "generate $arch-desc.c in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-desc.c)))
-+ (list "-O" "file" "generate $arch-opc.h in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-opc.h)))
-+ (list "-P" "file" "generate $arch-opc.c in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-opc.c)))
-+ (list "-Q" "file" "generate $arch-opinst.c in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-opinst.c)))
-+ (list "-B" "file" "generate $arch-ibld.h in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-ibld.h)))
-+ (list "-L" "file" "generate $arch-ibld.in in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-ibld.in)))
-+ (list "-A" "file" "generate $arch-asm.in in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-asm.in)))
-+ (list "-D" "file" "generate $arch-dis.in in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-dis.in)))
-+ )
-+)
-+
-+; (-R "file" "generate $cpu-reloc.h") ; FIXME: wip (rename to -abi.h?)
-+; (-S "file" "generate cpu-$cpu.c") ; FIXME: wip (bfd's cpu-$cpu.c)
-+; ((-R) (file-write *arg* cgen-reloc.c))
-+; ((-S) (file-write *arg* cgen-bfdcpu.c))
-+
-+; Kept global so it's available to the other .scm files.
-+(define srcdir ".")
-+
-+; Scan argv for -s srcdir.
-+; We can't process any other args until we find the cgen source dir.
-+; The result is srcdir.
-+; We assume "-s" isn't the argument to another option. Unwise, yes.
-+; Alternatives are to require it to be the first argument or at least preceed
-+; any option with a "-s" argument, or to put knowledge of the common argument
-+; set and common argument parsing code in every top level file.
-+
-+(define (find-srcdir argv)
-+ (let loop ((argv argv))
-+ (if (null? argv)
-+ (error "`-s srcdir' not present, can't load cgen"))
-+ (if (string=? "-s" (car argv))
-+ (begin
-+ (if (null? (cdr argv))
-+ (error "missing srcdir arg to `-s'"))
-+ (cadr argv))
-+ (loop (cdr argv))))
-+)
-+
-+; Main routine, parses options and calls generators.
-+
-+(define (cgen-opc argv)
-+ (let ()
-+
-+ ; Find and set srcdir, then load all Scheme code.
-+ ; Drop the first argument, it is the script name (i.e. argv[0]).
-+ (set! srcdir (find-srcdir (cdr argv)))
-+ (set! %load-path (cons srcdir %load-path))
-+ (load-files srcdir)
-+
-+ (display-argv argv)
-+
-+ (cgen #:argv argv
-+ #:app-name "opcodes"
-+ #:arg-spec opc-arguments
-+ #:init opcodes-init!
-+ #:finish opcodes-finish!
-+ #:analyze opcodes-analyze!)
-+ )
-+)
-+
-+(cgen-opc (program-arguments))
-diff -Nur binutils-2.24.orig/cgen/cgen-sid.scm binutils-2.24/cgen/cgen-sid.scm
---- binutils-2.24.orig/cgen/cgen-sid.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cgen-sid.scm 2016-06-30 21:26:12.597890934 +0200
-@@ -0,0 +1,101 @@
-+; Simulator generator entry point.
-+; This is invoked to build: desc.h, cpu.h, defs.h, decode.h, decode.cxx,
-+; semantics.cxx, sem-switch.cxx, model.h, model.cxx
-+; Copyright (C) 2000, 2003, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+;
-+; This is a standalone script, we don't load anything until we parse the
-+; -s argument (keeps reliance off of environment variables, etc.).
-+
-+; Load the various support routines.
-+
-+(define (load-files srcdir)
-+ (load (string-append srcdir "/read.scm"))
-+ (load (string-append srcdir "/utils-sim.scm"))
-+ (load (string-append srcdir "/sid.scm"))
-+ (load (string-append srcdir "/sid-cpu.scm"))
-+ (load (string-append srcdir "/sid-model.scm"))
-+ (load (string-append srcdir "/sid-decode.scm"))
-+)
-+
-+(define sim-arguments
-+ (list
-+ (list "-H" "file" "generate desc.h in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-desc.h)))
-+ (list "-C" "file" "generate cpu.h in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-cpu.h)))
-+ (list "-E" "file" "generate defs.h in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-defs.h)))
-+ (list "-T" "file" "generate decode.h in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-decode.h)))
-+ (list "-D" "file" "generate decode.cxx in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-decode.cxx)))
-+ (list "-W" "file" "generate write.cxx in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-write.cxx)))
-+ (list "-S" "file" "generate semantics.cxx in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-semantics.cxx)))
-+ (list "-X" "file" "generate sem-switch.cxx in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-sem-switch.cxx)))
-+ (list "-M" "file" "generate model.cxx in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-model.cxx)))
-+ (list "-N" "file" "generate model.h in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-model.h)))
-+ )
-+)
-+
-+; Kept global so it's available to the other .scm files.
-+(define srcdir ".")
-+
-+; Scan argv for -s srcdir.
-+; We can't process any other args until we find the cgen source dir.
-+; The result is srcdir.
-+; We assume "-s" isn't the argument to another option. Unwise, yes.
-+; Alternatives are to require it to be the first argument or at least preceed
-+; any option with a "-s" argument, or to put knowledge of the common argument
-+; set and common argument parsing code in every top level file.
-+
-+(define (find-srcdir argv)
-+ (let loop ((argv argv))
-+ (if (null? argv)
-+ (error "`-s srcdir' not present, can't load cgen"))
-+ (if (string=? "-s" (car argv))
-+ (begin
-+ (if (null? (cdr argv))
-+ (error "missing srcdir arg to `-s'"))
-+ (cadr argv))
-+ (loop (cdr argv))))
-+)
-+
-+; Main routine, parses options and calls generators.
-+
-+(define (cgen-sim argv)
-+ (let ()
-+
-+ ; Find and set srcdir, then load all Scheme code.
-+ ; Drop the first argument, it is the script name (i.e. argv[0]).
-+ (set! srcdir (find-srcdir (cdr argv)))
-+ (set! %load-path (cons srcdir %load-path))
-+ (load-files srcdir)
-+
-+ (display-argv argv)
-+
-+ (cgen #:argv argv
-+ #:app-name "sim"
-+ #:arg-spec sim-arguments
-+ #:init sim-init!
-+ #:finish sim-finish!
-+ #:analyze sim-analyze!)
-+ )
-+)
-+
-+(cgen-sim (program-arguments))
-diff -Nur binutils-2.24.orig/cgen/cgen-sim.scm binutils-2.24/cgen/cgen-sim.scm
---- binutils-2.24.orig/cgen/cgen-sim.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cgen-sim.scm 2016-06-30 21:26:12.597890934 +0200
-@@ -0,0 +1,129 @@
-+; Simulator generator entry point.
-+; This is invoked to build: arch.h, cpu-<cpu>.h, memops.h, semops.h, decode.h,
-+; decode.c, defs.h, extract.c, semantics.c, ops.c, model.c, mainloop.in.
-+;
-+; memops.h, semops.h, ops.c, mainloop.in are either deprecated or wip.
-+;
-+; Copyright (C) 2000, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+;
-+; This is a standalone script, we don't load anything until we parse the
-+; -s argument (keeps reliance off of environment variables, etc.).
-+
-+; Load the various support routines.
-+
-+(define (load-files srcdir)
-+ (load (string-append srcdir "/read.scm"))
-+ (load (string-append srcdir "/utils-sim.scm"))
-+ (load (string-append srcdir "/sim.scm"))
-+ (load (string-append srcdir "/sim-arch.scm"))
-+ (load (string-append srcdir "/sim-cpu.scm"))
-+ (load (string-append srcdir "/sim-model.scm"))
-+ (load (string-append srcdir "/sim-decode.scm"))
-+)
-+
-+(define sim-arguments
-+ (list
-+ (list "-A" "file" "generate arch.h in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-arch.h)))
-+ (list "-B" "file" "generate arch.c in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-arch.c)))
-+ (list "-C" "file" "generate cpu-<cpu>.h in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-cpu.h)))
-+ (list "-U" "file" "generate cpu-<cpu>.c in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-cpu.c)))
-+ (list "-N" "file" "generate cpu-all.h in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-cpuall.h)))
-+ (list "-F" "file" "generate memops.h in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-mem-ops.h)))
-+ (list "-G" "file" "generate defs.h in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-defs.h)))
-+ (list "-P" "file" "generate semops.h in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-sem-ops.h)))
-+ (list "-T" "file" "generate decode.h in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-decode.h)))
-+ (list "-D" "file" "generate decode.c in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-decode.c)))
-+ (list "-E" "file" "generate extract.c in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-extract.c)))
-+ (list "-R" "file" "generate read.c in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-read.c)))
-+ (list "-W" "file" "generate write.c in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-write.c)))
-+ (list "-S" "file" "generate semantics.c in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-semantics.c)))
-+ (list "-X" "file" "generate sem-switch.c in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-sem-switch.c)))
-+ (list "-O" "file" "generate ops.c in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-ops.c)))
-+ (list "-M" "file" "generate model.c in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-model.c)))
-+ (list "-L" "file" "generate mainloop.in in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-mainloop.in)))
-+ )
-+)
-+
-+; Kept global so it's available to the other .scm files.
-+(define srcdir ".")
-+
-+; Scan argv for -s srcdir.
-+; We can't process any other args until we find the cgen source dir.
-+; The result is srcdir.
-+; We assume "-s" isn't the argument to another option. Unwise, yes.
-+; Alternatives are to require it to be the first argument or at least preceed
-+; any option with a "-s" argument, or to put knowledge of the common argument
-+; set and common argument parsing code in every top level file.
-+
-+(define (find-srcdir argv)
-+ (let loop ((argv argv))
-+ (if (null? argv)
-+ (error "`-s srcdir' not present, can't load cgen"))
-+ (if (string=? "-s" (car argv))
-+ (begin
-+ (if (null? (cdr argv))
-+ (error "missing srcdir arg to `-s'"))
-+ (cadr argv))
-+ (loop (cdr argv))))
-+)
-+
-+; Main routine, parses options and calls generators.
-+
-+(define (cgen-sim argv)
-+ (let ()
-+
-+ ; Find and set srcdir, then load all Scheme code.
-+ ; Drop the first argument, it is the script name (i.e. argv[0]).
-+ (set! srcdir (find-srcdir (cdr argv)))
-+ (set! %load-path (cons srcdir %load-path))
-+ (load-files srcdir)
-+
-+ (display-argv argv)
-+
-+ (cgen #:argv argv
-+ #:app-name "sim"
-+ #:arg-spec sim-arguments
-+ #:init sim-init!
-+ #:finish sim-finish!
-+ #:analyze sim-analyze!)
-+ )
-+)
-+
-+(cgen-sim (program-arguments))
-diff -Nur binutils-2.24.orig/cgen/cgen-stest.scm binutils-2.24/cgen/cgen-stest.scm
---- binutils-2.24.orig/cgen/cgen-stest.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cgen-stest.scm 2016-06-30 21:26:12.597890934 +0200
-@@ -0,0 +1,80 @@
-+; CPU description file generator for the simulator testsuite.
-+; Copyright (C) 2000, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+
-+; This is invoked to build several .s files and a script to run to
-+; generate the .d files and .exp file.
-+; This is invoked to build: tmp-build.sh cpu-cpu.exp
-+
-+; Load the various support routines
-+(define (load-files srcdir)
-+ (load (string-append srcdir "/read.scm"))
-+ (load (string-append srcdir "/desc.scm"))
-+ (load (string-append srcdir "/desc-cpu.scm"))
-+ (load (string-append srcdir "/opcodes.scm"))
-+ (load (string-append srcdir "/opc-asmdis.scm"))
-+ (load (string-append srcdir "/opc-ibld.scm"))
-+ (load (string-append srcdir "/opc-itab.scm"))
-+ (load (string-append srcdir "/opc-opinst.scm"))
-+ (load (string-append srcdir "/sim-test.scm"))
-+)
-+
-+(define stest-arguments
-+ (list
-+ (list "-B" "file" "generate build.sh"
-+ #f
-+ (lambda (arg) (file-write arg cgen-build.sh)))
-+ (list "-E" "file" "generate the testsuite .exp"
-+ #f
-+ (lambda (arg) (file-write arg cgen-allinsn.exp)))
-+ )
-+)
-+
-+; Kept global so it's available to the other .scm files.
-+(define srcdir ".")
-+
-+; Scan argv for -s srcdir.
-+; We can't process any other args until we find the cgen source dir.
-+; The result is srcdir.
-+; We assume "-s" isn't the argument to another option. Unwise, yes.
-+; Alternatives are to require it to be the first argument or at least preceed
-+; any option with a "-s" argument, or to put knowledge of the common argument
-+; set and common argument parsing code in every top level file.
-+
-+(define (find-srcdir argv)
-+ (let loop ((argv argv))
-+ (if (null? argv)
-+ (error "`-s srcdir' not present, can't load cgen"))
-+ (if (string=? "-s" (car argv))
-+ (begin
-+ (if (null? (cdr argv))
-+ (error "missing srcdir arg to `-s'"))
-+ (cadr argv))
-+ (loop (cdr argv))))
-+)
-+
-+; Main routine, parses options and calls generators.
-+
-+(define (cgen-stest argv)
-+ (let ()
-+
-+ ; Find and set srcdir, then load all Scheme code.
-+ ; Drop the first argument, it is the script name (i.e. argv[0]).
-+ (set! srcdir (find-srcdir (cdr argv)))
-+ (set! %load-path (cons srcdir %load-path))
-+ (load-files srcdir)
-+
-+ (display-argv argv)
-+
-+ (cgen #:argv argv
-+ #:app-name "sim-test"
-+ #:arg-spec stest-arguments
-+ #:init sim-test-init!
-+ #:finish sim-test-finish!
-+ #:analyze sim-test-analyze!)
-+ )
-+)
-+
-+(cgen-stest (program-arguments))
-+
-+;; FIXME: cgen-all will generate the opcodes files, not what we want
-diff -Nur binutils-2.24.orig/cgen/cgen-testsuite.scm binutils-2.24/cgen/cgen-testsuite.scm
---- binutils-2.24.orig/cgen/cgen-testsuite.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cgen-testsuite.scm 2016-06-30 21:26:12.597890934 +0200
-@@ -0,0 +1,70 @@
-+; CGEN testsuite driver.
-+; Copyright (C) 2009 Doug Evans
-+; This file is part of CGEN.
-+;
-+; This is a standalone script, we don't load anything until we parse the
-+; -s argument (keeps reliance off of environment variables, etc.).
-+
-+; Load the various support routines.
-+
-+(define (load-files srcdir)
-+ (load (string-append srcdir "/read.scm"))
-+ (load (string-append srcdir "/desc.scm"))
-+ (load (string-append srcdir "/desc-cpu.scm"))
-+ (load (string-append srcdir "/testsuite.scm"))
-+)
-+
-+(define testsuite-arguments
-+ (list
-+ (list "-T" "file" "generate $arch-test.h in <file>"
-+ #f
-+ (lambda (arg) (file-write arg cgen-test.h)))
-+ )
-+)
-+
-+; Kept global so it's available to the other .scm files.
-+(define srcdir ".")
-+
-+; Scan argv for -s srcdir.
-+; We can't process any other args until we find the cgen source dir.
-+; The result is srcdir.
-+; We assume "-s" isn't the argument to another option. Unwise, yes.
-+; Alternatives are to require it to be the first argument or at least preceed
-+; any option with a "-s" argument, or to put knowledge of the common argument
-+; set and common argument parsing code in every top level file.
-+
-+(define (find-srcdir argv)
-+ (let loop ((argv argv))
-+ (if (null? argv)
-+ (error "`-s srcdir' not present, can't load cgen"))
-+ (if (string=? "-s" (car argv))
-+ (begin
-+ (if (null? (cdr argv))
-+ (error "missing srcdir arg to `-s'"))
-+ (cadr argv))
-+ (loop (cdr argv))))
-+)
-+
-+; Main routine, parses options and calls generators.
-+
-+(define (cgen-testsuite argv)
-+ (let ()
-+
-+ ; Find and set srcdir, then load all Scheme code.
-+ ; Drop the first argument, it is the script name (i.e. argv[0]).
-+ (set! srcdir (find-srcdir (cdr argv)))
-+ (set! %load-path (cons srcdir %load-path))
-+ (load-files srcdir)
-+
-+ (display-argv argv)
-+
-+ (cgen #:argv argv
-+ #:app-name "testsuite"
-+ #:arg-spec testsuite-arguments
-+ #:init testsuite-init!
-+ #:finish testsuite-finish!
-+ #:analyze testsuite-analyze!)
-+ )
-+)
-+
-+(cgen-testsuite (program-arguments))
-diff -Nur binutils-2.24.orig/cgen/ChangeLog binutils-2.24/cgen/ChangeLog
---- binutils-2.24.orig/cgen/ChangeLog 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/ChangeLog 2016-06-30 21:26:12.601891090 +0200
-@@ -0,0 +1,6422 @@
-+2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
-+ Anil Paranjape <anilp1@kpitcummins.com>
-+ Shilin Shakti <shilins@kpitcummins.com>
-+
-+ * cpu/xc16x.cpu: New file containing complete CGEN specific XC16X
-+ CPU description.
-+ * cpu/xc16x.opc: New file containing supporting XC16C routines.
-+
-+2006-02-10 Nick Clifton <nickc@redhat.com>
-+
-+ * cpu/iq2000.opc (parse_hi16): Truncate shifted value to 16 bits.
-+
-+2005-12-28 Nathan Sidwell <nathan@codesourcery.com>
-+
-+ * sid-cpu.scm (-gen-hw-stream-and-destream-fns): Stringize mode
-+ for concatenation.
-+ (-hw-gen-write-stack-decl): Likewise.
-+
-+2005-12-05 Hans-Peter Nilsson <hp@axis.com>
-+
-+ * utils-sim.scm (-gen-decode-insn-entry): Correct last change for
-+ non-(adata-integral-insn? CURRENT-ARCH) case.
-+
-+2005-10-28 Dave Brolley <brolley@redhat.com>
-+
-+ Contribute the following changes:
-+ 2005-09-19 Dave Brolley <brolley@redhat.com>
-+
-+ * attr.scm (gen-value-for-defn-raw): New methods.
-+ (gen-value-for-defn): Don't test for 'SID-SIMULATOR. Call
-+ gen-value-for-defn-raw.
-+ * sid.scm (gen-obj-attr-sid-defn): Call gen-value-for-defn-raw.
-+
-+ 2002-12-13 Dave Brolley <brolley@redhat.com>
-+
-+ * utils-cgen.scm (gen-attr-type): Moved from sid.scm.
-+ (-gen-attr-accessors): New function.
-+ (gen-obj-attr-defn): Update terminating initializer.
-+ (gen-obj-attr-end-defn): New function.
-+ * sid.scm (gen-attr-type): Moved to utils-cgen.scm.
-+ * sid-cpu.scm (cgen-desc.h): Generate code to include
-+ "opcode/cgen-bitset.h"
-+ * intrinsics.scm (kept-insn-isas): Correct the extraction of the isa
-+ name.
-+ * desc.scm ('gen-defn): Update terminating initializer.
-+ * desc-cpu.scm (gen-ifld-decls): Call -gen-attr-accessors. Update
-+ terminatinig initializer.
-+ (gen-hw-decls): Ditto.
-+ (gen-operand-decls): Ditto.
-+ (gen-insn-decls): Ditto.
-+ (-gen-hash-defines): Generate code to include "opcde/cgen-bitset.h"
-+ (gen-insn-table): Update terminating initializer.
-+ (-gen-cpu-open): Update generation of @arch@_cgen_rebuild_tables,
-+ @arch@_cgen_cpu_open, @arch@_cgen_cpu_close.
-+ * attr.scm (charmask-bytes): New function.
-+ (bitset-attr->charmask): New function.
-+ (<bitset-attribute>): Handle isa-attributes specially. Also handle
-+ differences for SID-SIMULATOR.
-+ (<integer-attribute>): Handle differences for SID-SIMULATOR.
-+ (<enum-attribute>): Ditto.
-+
-+2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
-+
-+ * cpu/m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
-+
-+2005-10-24 DJ Delorie <dj@redhat.com>
-+
-+ * operand.scm (-anyof-merge-syntax): Print a more useful error
-+ message.
-+
-+2005-10-19 Nick Clifton <nickc@redhat.com>
-+
-+ * cpu/m32r.opc (parse_slo16): Fix bad application of previous
-+ patch.
-+
-+2005-10-18 Andreas Schwab <schwab@suse.de>
-+
-+ * cpu/m32r.opc (parse_slo16): Better version of previous patch.
-+
-+2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
-+
-+ * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
-+ size.
-+
-+2005-08-02 Dave Brolley <brolley@redhat.com>
-+
-+ * rtl-c.scm (s-unop): Don't dereference
-+ CGEN_CPU_FPU (current_cpu)->ops->xxxxx in the generated code.
-+ (s-binop, s-convop, s-cmpop): Likewise.
-+
-+2005-07-29 Dave Brolley <brolley@redhat.com>
-+
-+ * sid-cpu.scm (-gen-scache-semantic-fn): Generate a declation of 'written'
-+ if with-profile or with-parallel-write.
-+ (cgen-semantics.cxx): Make the @prefix@ namespace available if with-parallel.
-+ * operand.scm (op:new-mode): Convert (obj:name op) to a string for
-+ string-append.
-+
-+2005-07-15 Alan Modra <amodra@bigpond.net.au>
-+
-+ * cpu/fr30.opc (print_register_list): Correct format strings.
-+ * cpu/ip2k.opc: Likewise.
-+
-+2005-07-05 Nick Clifton <nickc@redhat.com>
-+
-+ * cpu/iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
-+ unsigned in order to avoid compile time warnings about sign
-+ conflicts.
-+
-+2005-07-01 Nick Clifton <nickc@redhat.com>
-+
-+ * desc-cpu.scm: Update to ISO C90 function declaration style.
-+ * opc-asmdis.scm: Likewise.
-+ * opc-ibld.scm: Likewise.
-+ * opc-itab.scm: Likewise.
-+ * cpu/fr30.opc: Likewise.
-+ * cpu/i960.opc: Likewise.
-+ * cpu/ip2k.opc: Likewise.
-+ * cpu/iq2000.opc: Likewise.
-+ * cpu/m32r.opc: Likewise.
-+ * cpu/openrisc.opc: Likewise.
-+ * cpu/sh.opc: Likewise.
-+ * cpu/sparc.opc: Likewise.
-+ * cpu/xstormy16.opc: Likewise.
-+
-+2005-06-15 Dave Brolley <brolley@redhat.com>
-+
-+ * sid-cpu.scm (-gen-hw-stream-and-destream-fns): New function.
-+ (cgen-cpu.h): Call it.
-+
-+ Contributed on behalf of Graydon Hoare
-+ 2001-06-05 graydon hoare <graydon@redhat.com>
-+
-+ * utils.scm (foldl): Define.
-+ (foldr): Define.
-+ (filter): Define.
-+ (union): Define.
-+ (intersection): Simplify.
-+ * sid.scm : Set APPLICATION to SID-SIMULATOR.
-+ (-op-gen-delayed-set-maybe-trace): Define.
-+ (<operand> 'gen-set-{quiet,trace}): Delegate to
-+ op-gen-delayed-set-quiet etc. Note: this is still a little tangled
-+ up and needs cleaning.
-+ (-with-parallel?): Hardwire with-parallel to #t.
-+ (<operand> 'cxmake-get): Replace with lookahead-aware code
-+ * sid-decode.scm: Remove per-insn writeback fns.
-+ (-gen-idesc-decls): Redefine sem_fn type.
-+ * sid-cpu.scm (gen-write-stack-structure): Replace parexec stuff
-+ with write stack stuff.
-+ (cgen-write.cxx): Replace per-insn writebacks with single write
-+ stack writeback. Add write stack reset function.
-+ (-gen-scache-semantic-fn insn): Replace parexec stuff with write
-+ stack stuff.
-+ * rtl-c.scm (xop): Clone operand into delayed operand if #:delayed
-+ estate attribute set.
-+ (delay): Set #:delayed attribute to calculated delay, update
-+ maximum delay of cpu, check (delay ...) usage.
-+ * operand.scm (<operand>): Add delayed slot to <operand>.
-+ * mach.scm (<cpu>): Add max-delay slot to <cpu>.
-+ * dev.scm (load-sid): Set APPLICATION to SID-SIMULATOR.
-+ * doc/rtl.texi (Expressions): Add section on (delay ...).
-+
-+2005-06-13 Jim Blandy <jimb@redhat.com>
-+
-+ * pmacros.scm (-pmacro-upcase, -pmacro-downcase): Handle symbols
-+ as well as strings.
-+
-+2005-06-07 Zack Weinberg <zack@codesourcery.com>
-+
-+ * doc/porting.texi: Change all mention of md_apply_fix3 and
-+ gas_cgen_md_apply_fix3 to md_apply_fix and gas_cgen_md_apply_fix
-+ respectively.
-+
-+2005-05-18 Dave Brolley <brolley@redhat.com>
-+
-+ * utils-sim.scm (-gen-decode-default-entry): New function.
-+ (-gen-decode-insn-entry): Now takes 'invalid-insn' argument. Generate
-+ code to check that all opcodes bits match.
-+ (-gen-decoder-switch): Use -gen-decode-default-entry.
-+
-+2005-05-16 Jim Blandy <jimb@redhat.com>
-+
-+ * sid.scm (gen-ifetch): Require BITSIZE to be exactly the size
-+ fetched by one of our GETIMEM* methods.
-+ * utils-gen.scm (-extract-chunk-specs): Always fetch full
-+ base-insn-sized chunks.
-+
-+2005-05-10 Nick Clifton <nickc@redhat.com>
-+
-+ * Update the address and phone number of the FSF organization in
-+ the GPL notices in the following files:
-+ COPYING.CGEN, utils.scm, cpu/iq2000m.cpu, cpu/openrisc.cpu,
-+ cpu/powerpc.cpu, slib/random.scm
-+
-+2005-05-06 Jim Blandy <jimb@redhat.com>
-+
-+ * pprint.scm, cos-pprint.scm: Add documentation.
-+
-+ * pprint.scm (pprint): Don't wipe out elide-table after each call.
-+
-+ * pprint.scm, cos-pprint.scm: New files.
-+
-+2005-04-04 Nick Clifton <nickc@redhat.com>
-+
-+ * opcodes.scm (-gen-parse-address): Initialise value to zero to
-+ avoid a compile time warning.
-+
-+2005-03-18 Nick Clifton <nickc@redhat.com>
-+
-+ * cpu/ip2k.opc (parse_lit8): Change wording of error message to
-+ "percent-operand" from "%operand" as the latter confuses xgettext
-+ into thinking that it is a C printf formating directive, which
-+ prevents proper translation.
-+
-+2005-02-23 Nick Clifton <nickc@redhat.com>
-+
-+ * opcodes.scm (gen-parse-number): Add a cast to the desired
-+ pointer signed'ness in order to prevent compile time warnings.
-+ * cpu/ip2k.opc: Fixed compile time warnings about differing
-+ signed'ness of pointers passed to functions.
-+ * cpu/iq2000.opc: Likewise.
-+ * cpu/m32r.opc: Likewise.
-+ * cpu/openrisc.opc: Likewise.
-+ * cpu/xstormy16.opc: Likewise.
-+
-+2005-02-22 Alan Modra <amodra@bigpond.net.au>
-+
-+ * desc-cpu.scm (gen-ifld-decls): Move cgen_ifld_table from here..
-+ (cgen-desc.h): ..to here, after opcode/cgen.h include.
-+
-+2005-02-16 Dave Brolley <brolley@redhat.com>
-+
-+ * utils.scm: Update copyright years.
-+ * utils-gen.scm (gen-ifld-extract): Pass base-length to -gen-ifld-extract-base.
-+ * sid.scm (gen-ifetch): Handle the case where bitsize == 24.
-+ * operand.scm (-derived-operand-parse): Move logit message from level 1
-+ to level 2.
-+
-+2005-02-15 Nick Clifton <nickc@redhat.com>
-+
-+ * opc-itab.scm (-gen-ifmt-table-1): Add an ATTRIBUTE_UNUSED to
-+ prevent compile time warning messages.
-+ * opc-opinst.scm (-gen-operand-instance-table): Likewise.
-+ * utils-gen.scm (attr-int-gen-defn): Likewise.
-+ (attr-gen-defn): Likewise.
-+ * cpu/ip2k.opc (parse_addr16_p): Remove unused function.
-+ (print_dollarhex16): Remove unused function.
-+
-+2005-02-15 Jim Blandy <jimb@redhat.com>
-+
-+ * guile.scm (cgen-call-with-debugging): Doc fix.
-+
-+ Make backtraces work more reliably.
-+ * guile.scm: Set up debugging parameters, and enable debugging and
-+ source positions while loading.
-+ (cgen-call-with-debugging, cgen-debugging-stack-start): New
-+ functions.
-+ * read.scm: Don't set debugging parameters here.
-+ (catch-with-backtrace): Function deleted.
-+ (-cgen): Simply note the presence or absence of the -b option.
-+ Pass the flag to cgen-call-with-debugging, so debugging is turned
-+ off here if the user didn't request it, for faster computation.
-+ (cgen): Call cgen-debugging-stack-start here, instead of
-+ catch-with-backtrace.
-+
-+ * Makefile.am (GUILE): Explicitly load guile.scm here, and leave a
-+ trailing -s.
-+ (desc, html, opcodes, sim-arch, sim-cpu, gas-test, sim-test):
-+ Don't write out the trailing -s here.
-+ * Makefile.in: Regenerated.
-+ * cgen-doc.scm, cgen-gas.scm, cgen-stest.scm): Don't load
-+ fixup.scm here; let the caller decide which Scheme's customization
-+ file to preload.
-+ * dev.scm: Load guile.scm, not fixup.scm.
-+ * fixup.scm: Deleted; contents have all moved to guile.scm.
-+ * README: Doc fix.
-+
-+ * guile.scm (debug-write): New function.
-+
-+2005-02-14 Jim Blandy <jimb@redhat.com>
-+
-+ * pmacros.scm (pmacros-init!): For .eval macros, use eval1 as the
-+ transformer procedure, not eval. Transformer procedures take one
-+ argument.
-+
-+2005-02-11 Nick Clifton <nickc@redhat.com>
-+
-+ * cpu/iq2000.opc (parse_jtargq10): Change type of valuep argument
-+ to 'bfd_vma *' in order avoid compile time warning message.
-+
-+2005-02-09 Jim Blandy <jimb@redhat.com>
-+
-+ * cgen-sim.scm (load-files): Don't load fixup.scm. (See
-+ corresponding change in the sim/common directory.)
-+
-+2005-02-07 Jim Blandy <jimb@redhat.com>
-+
-+ * cgen-opc.scm: Don't load fixup.scm here. (See corresponding
-+ changes in the opcodes directory.)
-+
-+ * guile.scm: New file, containing Guile-specific definitions and
-+ adaptations. This is loaded by the app-specific shell scripts.
-+ Initially identical to fixup.scm.
-+ * cgen-sid.scm: Don't load fixup.scm here.
-+
-+ * cos.scm: Profile elm-xset! when requested, not elm-set!; the
-+ latter is a macro.
-+
-+2005-01-27 Jim Blandy <jimb@redhat.com>
-+
-+ * utils.scm (string/symbol->append): Renamed from 'concat'.
-+ * opcodes.scm (gen-switch): Use new name.
-+ * insn.scm (-sub-insn-make!): Same.
-+ * rtl.scm (rtx-dump): Same.
-+ * semantics.scm (semantic-compile): Same.
-+
-+2005-01-20 Jim Blandy <jimb@redhat.com>
-+
-+ * opcodes.scm (gen-switch): Use concat instead of string-map.
-+
-+ * utils.scm (concat): New function.
-+ * insn.scm (-sub-insn-make!): Use concat instead of string-map.
-+ * rtl.scm (rtx-dump): Same.
-+ * semantics.scm (semantic-compile): Same.
-+
-+2004-12-16 Jim Blandy <jimb@redhat.com>
-+
-+ * utils-cgen.scm (parse-name): Don't assume that string-map can be
-+ applied to symbols. Process everything as strings, and then
-+ convert to a symbol at the end.
-+
-+ * read.scm (debug-repl): Temporarily redirect input and output to
-+ /dev/tty while we debug, so we don't interfere with whatever CGEN
-+ is reading or writing.
-+ * utils.scm (setter-getter-fluid-let, with-input-and-output-to):
-+ New functions.
-+
-+2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
-+
-+ * cpu/iq2000.cpu: Added quotes around macro arguments so that they
-+ will work with newer versions of guile.
-+
-+2004-10-27 Nick Clifton <nickc@redhat.com>
-+
-+ * cpu/iq2000m.cpu: Import latest version from cpu/ directory.
-+ * cpu/iq2000.cpu: Likewise.
-+
-+2004-07-21 DJ Delorie <dj@redhat.com>
-+
-+ * cpu/xstormy16.cpu (movhmemgr): Use hmem8, not lmem8.
-+
-+2003-03-14 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * cpu/iq2000.opc (parse_jtargq10): Add ATTRIBUTE_UNUSED on unused args.
-+ (parse_jtargq10, iq2000_cgen_isa_register, parse_mlo16): Declare.
-+
-+2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
-+
-+ * cpu/m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
-+
-+2004-03-22 Dave Brolley <brolley@redhat.com>
-+
-+ * utils.scm (copyright-fsf): Update copyright years.
-+ (copyright-red-hat): Ditto.
-+ * sid.scm (-op-gen-set-trace): Generate trace code before semantic
-+ code.
-+ (-op-gen-set-trace-parallel): Ditto.
-+
-+2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.dot.com>
-+
-+ * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
-+ disassembling codes for 0x*2 addresses.
-+
-+2004-01-29 Dave Brolley <brolley@redhat.com>
-+
-+ * decode.scm (-opcode-slots): For short insns, generate 'opcode' with
-+ zeroes in the extra bit positions and generate 'opcode-mask' with ones
-+ in the extra bit positions.
-+
-+2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
-+
-+ * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
-+
-+2003-12-04 Alan Modra <amodra@bigpond.net.au>
-+
-+ * cpu/openrisc.opc (openrisc_sign_extend_16bit): Don't rely on
-+ "short" being 16 bit.
-+ (parse_hi16): Likewise. Fix type-punned pointer warnings too, and
-+ internationalize error message.
-+ (parse_lo16): Likewise. Remove useless code.
-+
-+2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
-+
-+ * cpu/m32r.cpu : Add new model m32r2.
-+ Add new instructions.
-+ Replace occurrances of 'Mitsubishi' with 'Renesas'.
-+ Changed PIPE attr of push from O to OS.
-+ Care for Little-endian of M32R.
-+ * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
-+ Care for Little-endian of M32R.
-+ (parse_slo16): signed extension for value.
-+
-+2003-10-26 Dave Brolley <brolley@redhat.com>
-+
-+ * sid-decode.scm (-gen-record-profile-args): Test trace_counter_p
-+ and final_insn_count_p. Don't test WITH_PROFILE_MODEL_P.
-+ (-gen-extract-fn): Call -gen-record-profile-args.
-+
-+2003-10-21 Dave Brolley <brolley@redhat.com>
-+
-+ * sid-model.scm (-gen-model-class-decls): Generate MAX_UNITS as
-+ a static const int.
-+ * decode.scm (-opcode-slots): Correct typo in logit call.
-+
-+2003-10-09 Jim Blandy <jimb@redhat.com>
-+
-+ * desc-cpu.scm (gen-hw-table-decls): Emit an 'extern' declaration
-+ for @arch@_cgen_hw_table. GDB needs to be able to find this.
-+
-+ * mach.scm (def-isa-attr!): hardware can have ISA attributes, too.
-+
-+2003-10-06 Dave Brolley <brolley@redhat.com>
-+
-+ * gen-all-doc: Add fr550.
-+
-+2003-09-11 Doug Evans <dje@sebabeach.org>
-+
-+ * Makefile.am (ARCHFILE): New var.
-+ (desc): Pass $(ARCHFILE) for -a parm, not $(ARCH).
-+ (html,opcodes,sim-arch,sim-cpu,gas-test,sim-test): Ditto.
-+ * Makefile.in: Regenerate.
-+
-+2003-09-08 Dave Brolley <brolley@redhat.com>
-+
-+ On behalf of Doug Evans <dje@sebabeach.org>
-+ Pass in paths to input files, instead of assuming they live in
-+ $srcdir/cpu. Plus misc. option processing cleanup.
-+ * cgen-doc.scm (doc-arguments): Make options strings not symbols.
-+ Add pre-process pass to all options.
-+ * cgen-gas.scm (gas-arguments): Ditto.
-+ * cgen-sid.scm (sim-arguments): Ditto.
-+ * cgen-sim.scm (sim-arguments): Ditto.
-+ * cgen-stest.scm (stest-arguments): Ditto.
-+ * cgen-opc.scm (opc-arguments): Ditto. New argument -OPC.
-+ (-opc-file-path): New global.
-+ (opc-file-path): New fn.
-+ * opcodes.scm (read-cpu.opc): Replace srcdir,cpu args with opc-file.
-+ All callers updated.
-+ (gen-extra-cpu.h,gen-extra-cpu.c,gen-extra-opc.h,gen-extra-opc.c,
-+ gen-extra-asm.c,gen-extra-dis.c,gen-extra-ibld.h,gen-extra-ibld.c):
-+ Replace srcdir arg with opc-file. All callers updated.
-+ * read.scm (-opt-spec-update): Delete.
-+ (opt-get-first-pass,opt-get-second-pass): New fns.
-+ (-cgen): Process application-specific arguments in two passes.
-+
-+2003-08-29 Dave Brolley <brolley@redhat.com>
-+
-+ * cpu/frv.cpu: Removed.
-+ * cpu/frv.opc: Removed.
-+
-+2003-08-21 Nick Clifton <nickc@redhat.com>
-+
-+ * cpu/frv.cpu (mbtoh): Replace input parameter to
-+ u-media-dual-expand and u-media-dual-btoh with output parameter.
-+ (cmbtoh): Add profiling hack.
-+
-+2003-08-19 Michael Snyder <msnyder@redhat.com>
-+
-+ * cpu/frv.cpu: Fix typo, Frintkeven -> FRintkeven
-+
-+2003-08-07 Michael Meissner <gnu@the-meissners.org>
-+
-+ * opc-opinst.scm (-gen-operand-instance-table): Initialize all of
-+ the elements for the END record of CGEN_OPINST, silencing warnings.
-+
-+2003-07-15 Doug Evans <dje@sebabeach.org>
-+
-+ Add guile 1.6.4 support.
-+ - empty list must be quoted
-+ - string functions have stricter type checking
-+ - eval now takes a second argument
-+ - symbol-bound? is deprecated
-+ * attr.scm (-attr-parse): Use stringsym-append to build errtxt.
-+ (bitset-attr->list): Ensure arg to string-cut is a string.
-+ (attr-parse): Ensure args to string-ref and string-drop1 are strings.
-+ (<enum-attribute>,gen-value-for-defn): Fetch string name of self.
-+ * cos.scm (-class-list): Must quote empty list.
-+ (-class-parent-classes,-class-compute-class-desc): Ditto.
-+ (class-make,make,object-reset!): Ditto.
-+ (method-make-make!): Call eval1 instead of eval.
-+ (method-make-forward!,method-make-virtual-forward!): Ditto.
-+ * decode.scm (subdtable-add): Use stringsym-append instead of
-+ string-append.
-+ (-gen-exprtable-name): Fetch string name of exprtable-entry-insn.
-+ (-build-decode-table-entry): Fetch string name of insn.
-+ * desc-cpu.scm (-gen-isa-table-defns): Fetch string name of isa.
-+ (-gen-mach-table-defns): Ditto for mach.
-+ (gen-ifld-defns): Ditto for ifld.
-+ (gen-hw-table-defns): Ditto for hw.
-+ (gen-operand-table): Ditto for op.
-+ (gen-insn-table-entry): Ditto for insn.
-+ * desc.scm (gen-attr-table-defn): Ditto for attr.
-+ (<keyword>,gen-defn): Don't pass symbols to string-append.
-+ * enum.scm (parse-enum-vals): Use symbolstr-append instead of
-+ symbol-append.
-+ (enum-vals-upcase): Use symbol-upcase to build result.
-+ (-enum-parse): Use stringsym-append to build errtxt.
-+ * fixup.scm (*guile-major-version*,*guile-minor-version*): New globals.
-+ (eval1): New function.
-+ (symbol-bound?): Provide own version if >= guile 1.6.
-+ * hardware.scm (define-keyword): Use string-append instead of
-+ symbol-append.
-+ * html.scm (gen-html-header,gen-table-of-contents,gen-arch-intro,
-+ cgen.html,cgen-insn.html): Convert current-arch-name to a string
-+ before using.
-+ (gen-list-entry): Handle either symbol or string `name' arg.
-+ (gen-obj-doc-header): Fetch string name of `o' arg.
-+ (define-cpu-intro): Ditto for cpu.
-+ (gen-mach-intro): Ditto for mach.
-+ (gen-model-intro): Ditto for model.
-+ (gen-isa-intro): Ditto for isa.
-+ (gen-machine-doc-1): Ditto for isa.
-+ (gen-reg-doc-1): Convert mach to string first.
-+ (gen-insn-doc-1): Ditto. Convert model/unit names to strings first.
-+ (gen-insn-doc-list): Fetch string name of mach. Convert insn name
-+ to string first.
-+ (gen-insn-categories): Fetch string name of mach. Convert
-+ enum-val-name to string first.
-+ (gen-insn-docs): Fetch string name of mach.
-+ * ifield.scm (ifld-ilk): Result is a string.
-+ * iformat.scm (-ifmt-search-key): Convert attr value to string first.
-+ Fetch string name of ifld.
-+ (-sfmt-search-key): Similarily for ifld and op.
-+ * insn.scm (syntax-make): Fetch string name of syntax element.
-+ * mach.scm (-cpu-parse): Use stringsym-append to build errtxt.
-+ * minsn.scm (minsn-make-alias): Fetch string name of minsn.
-+ * mode.scm (mode:c-type): Result is a string.
-+ (mode:enum): Fetch string name of mode.
-+ (-mode-parse): Use stringsym-append to build errtxt.
-+ * model.scm (model:enum): Fetch string name of model.
-+ (-model-parse): Use stringsym-append to build errtxt.
-+ (parse-insn-timing): Must quote empty list.
-+ * opc-itab.scm (-gen-minsn-table-entry): Fetch string name of minsn.
-+ (-gen-minsn-opcode-entry): Ditto.
-+ * opcodes.scm (<operand>,gen-function-name): `what' arg is a symbol,
-+ convert to string.
-+ (read-cpu.opc): Convert current-arch-name to a string before using.
-+ * operand.scm (<operand>,gen-pretty-name): Ensure `name' is a string.
-+ (<derived-operand>): Must quote empty list.
-+ (op-sort): Simplify, call alpha-sort-obj-list to do sort.
-+ * pgmr-tools.scm (pgmr-pretty-print-insn-value): Fetch string name
-+ of ifld.
-+ * pmacros.scm (-pmacro-build-lambda): Use eval1 instead of eval.
-+ (-pmacro-sym): Must convert symbols to strings before passing to
-+ string-append.
-+ (-pmacro-str): Ditto.
-+ (pmacros-init!): Use eval1 instead of eval.
-+ * read.scm (keep-mach-atlist?): Simplify, use bitset-attr->list.
-+ (keep-isa-atlist?): Ditto.
-+ (cmd-if): Use eval1 instead of eval.
-+ * rtl-c.scm (<c-expr>,get-name): Fetch string name of self.
-+ (-rtl-c-get): Fetch string name of src.
-+ (s-unop): Ditto for mode.
-+ (s-binop,s-binop-with-bit,s-shop,s-convop,s-cmpop): Ditto.
-+ (-gen-par-temp-defns,subword): Ditto.
-+ (join): Use stringsym-append instead of string-append.
-+ * rtl-traverse.scm (rtx-option?): Convert option to string first.
-+ (rtx-traverse-debug): Fetch string name of rtx-obj.
-+ * rtl.scm (def-rtx-node): Use eval1 instead of eval.
-+ (def-rtx-syntax-node,def-rtx-operand-node,def-rtx-macro-node): Ditto.
-+ (rtx-pretty-name): Result is a string.
-+ (-rtx-hw-name): Use symbolstr-append instead of symbol-append.
-+ * semantics.scm (semantic-compile): Simplify, use alpha-sort-obj-list.
-+ * sid-cpu.scm (cgen-write.cxx): Convert current-arch-name to a string
-+ before using.
-+ (-gen-sfrag-case): Fetch string name of user.
-+ * sid-model.scm (unit:enum): Fetch string name of unit.
-+ * sid.scm (<hw-memory>,cxmake-get): Fetch string name of mode.
-+ (<hw-memory>,gen-set-quiet): Ditto.
-+ (gen-mode-defs): Ditto.
-+ (sim-finish!): Convert current-arch-name to a string before using.
-+ * sim-cpu.scm (-gen-scache-semantic-fn): Fetch string name of insn.
-+ (-gen-no-scache-semantic-fn): Ditto.
-+ (cgen-defs.h): Fetch string name of isa.
-+ (cgen-read.c): Convert current-arch-name to a string before using.
-+ (cgen-write.c): Ditto.
-+ * sim-model.scm (unit:enum): Fetch string name of unit.
-+ (gen-model-fn-decls): Use stringsym-append instead of string-append.
-+ (-gen-model-timing-table): Fetch string name of model.
-+ (-gen-mach-model-table): Ditto.
-+ (-gen-mach-defns): Fetch string name of mach.
-+ * sim.scm (gen-reg-access-defn): Fetch string name of hw.
-+ (<hw-memory>,cxmake-get): Fetch string name of mode.
-+ (<hw-memory>,gen-set-quiet): Ditto.
-+ (gen-mode-defs): Ditto.
-+ (sim-finish!): Must quote empty list.
-+ * utils-cgen.scm (<ident>): Must quote empty list.
-+ (obj:str-name): New fn.
-+ (parse-comment): Result is a string.
-+ (parse-symbol): Result is a symbol.
-+ (parse-string): Result is a string.
-+ (keyword-list?): Convert arg to string before calling string-ref.
-+ (keyword-list->arg-list): Ditto.
-+ (gen-attr-name): Convert attr-name to string first.
-+ (alpha-sort-obj-list): Use symbol<? instead of string<?.
-+ * utils-gen.scm (attr-gen-decl): Fetch string name of attr.
-+ (gen-define-ifmt-ifields): Ditto for fld.
-+ * utils.scm (gen-c-symbol): Ensure str is a string before calling
-+ map-over-string.
-+ (gen-file-name): Ditto.
-+ (symbol-downcase,symbol-upcase,symbol<?): New fns.
-+ (stringsym-append,symbolstr-append,->string,->symbol): New fns.
-+ (reduce): Call eval1 instead of eval.
-+ * cpu/m32r.cpu (addi): Don't use `#.'.
-+
-+ * gen-all-sim: Fix some typos.
-+
-+2003-07-08 Doug Evans <dje@sebabeach.org>
-+
-+ * gen-all-doc: Ensure run from cgen src dir.
-+ * gen-all-opcodes: Build in ./tmp-opcodes. Don't delete dir when done.
-+ * gen-all-sid: Similarily, in ./tmp-sid.
-+ * gen-all-sim: Similarily, in ./tmp-sim.
-+
-+2003-06-20 Doug Evans <dje@sebabeach.org>
-+
-+ * gen-all-sim: Add fr30,sh64 support. Only generate m32r by default.
-+
-+2003-06-19 Doug Evans <dje@sebabeach.org>
-+
-+ * mach.scm (-ifld-already-defined?): New proc.
-+ (current-ifld-add!): Use it.
-+ (-op-already-defined?): New proc.
-+ (current-op-add!): Use it.
-+ (-insn-already-defined?): New proc.
-+ (current-insn-add!): Use it.
-+ (-minsn-already-defined?): New proc.
-+ (current-minsn-add!): Use it.
-+ (obj-isa-list): New proc.
-+ (isa-supports?): Use it.
-+
-+2003-06-10 Doug Evans <dje@sebabeach.org>
-+
-+ * insn.scm (insn-builtin!): RELAX renamed to RELAXABLE.
-+ * cpu/m32r.cpu (all insns): Ditto.
-+
-+ * mach.scm (current-*-add!): Disallow redefinition. Make result
-+ "unspecified".
-+
-+ * gen-all-doc: Split arm and frv docs up a bit.
-+
-+ * cpu/arm.cpu: Add IDOC attribute.
-+ * cpu/frv.cpu: Ditto.
-+ * cpu/i960.cpu: Ditto.
-+ * cpu/openrisc.cpu: Ditto.
-+ * cpu/xstormy16.cpu: Ditto.
-+ * cpu/m32r.cpu: Ditto.
-+ (all insns): Explicitly specify IDOC attribute.
-+
-+ * Makefile.am (MACH,ISAS,INSN_FILE_NAME): New vars.
-+ (desc,opcodes,sim-arch,sim-cpu,gas-test,sim-test): Use MACH,ISAS.
-+ (html): Use MACH,ISAS,INSN_FILE_NAME. Generate insn.html separately.
-+ * Makefile.in: Regenerate.
-+ * attr.scm (<integer-attribute>:parse-value-def): Implement.
-+ (-attr-read): Defer computing default value until we know the type.
-+ (attr-has-attr?): Delete, move contents to <attr-list>:has-attr?.
-+ (<attr-list>:attr-present?): New method.
-+ (atlist-attr-present?,obj-attr-present?): New fns.
-+ (obj-has-attr-value?,obj-has-attr-value-no-default?): New fns.
-+ (attr-builtin!): New insn attr IDOC.
-+ * cgen-doc.scm (doc-arguments): New args -I,-N.
-+ * enum.scm (parse-enum-vals): New arg errtxt, all callers updated.
-+ Support comment as fourth element of enum value.
-+ (enum-val-name,enum-val-value,enum-val-attrs,enum-val-comment): New fns.
-+ * html.scm (gen-html-header): New arg kind, all callers updated.
-+ (gen-table-of-contents): New arg insn-file, all callers updated.
-+ (gen-list-entry,gen-doc-header): New fn.
-+ (get-operands): Delete.
-+ (gen-iformat-table): Rewrite.
-+ (gen-insn-doc-1): Print constant-folded and trimmed semantics.
-+ (gen-insn-doc-list): New args name, comment, insns. All callers updated.
-+ (get-insn-properties,guess-insn-idoc-attr!): New fn.
-+ (insn-sets-pc?,insn-refs-mem?,insn-uses-fpu?): New fns.
-+ (get-insns-for-category,gen-categories-insn-lists): New fns.
-+ (gen-insn-docs): Simplify each insn's semantics first.
-+ Print insn tables sorted by IDOC categories.
-+ (*insn-html-file-name*): New global.
-+ (cgen-insn.html): New fn.
-+ (cgen-all): Update.
-+ * insn.scm (<insn>): Create a setter for the `tmp' member.
-+ * semantics.scm (insn-build-known-values): Renamed from
-+ -build-known-values. All callers updated.
-+
-+ * rtl.scm: Move traveral/evaluation support to ...
-+ * rtl-traverse.scm: New file.
-+ * read.scm: Maybe-load rtl-traverse.scm.
-+
-+ * rtl.scm (-rtx-valid-types): Add SETRTX.
-+
-+ * rtx-funcs.scm (nop,parallel): Fix mode.
-+
-+ * utils.scm (eqv-lookup-index): New fn.
-+ (assq-lookup-index): Renamed from lookup-index. All callers updated.
-+
-+ * dev.scm (load-doc): Set APPLICATION.
-+
-+2003-06-10 Dave Brolley <brolley@redhat.com>
-+
-+ * sid-cpu.scm: Generate #include of config.h into @prefix@-sem.cxx.
-+ * sid-decode.scm: Generate #include of config.h into
-+ @prefix@-decode.cxx.
-+ * sid-model.scm: Generate #include of config.h into @prefix@-model.cxx.
-+
-+2003-06-07 Doug Evans <dje@sebabeach.org>
-+
-+ * gen-all-sid: New file.
-+ * gen-all-opcodes: New file.
-+
-+2003-06-05 Nick Clifton <nickc@redhat.com>
-+
-+ * cpu/frv.cpu (FRintieven): New operand. An even-numbered only
-+ version of the FRinti operand.
-+ (FRintjeven): Likewise for FRintj.
-+ (FRintkeven): Likewise for FRintk.
-+ (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
-+ media-quad-arith-sat-semantics, media-quad-arith-sat,
-+ conditional-media-quad-arith-sat, mdunpackh,
-+ media-quad-multiply-semantics, media-quad-multiply,
-+ conditional-media-quad-multiply, media-quad-complex-i,
-+ media-quad-multiply-acc-semantics, media-quad-multiply-acc,
-+ conditional-media-quad-multiply-acc, munpackh,
-+ media-quad-multiply-cross-acc-semantics, mdpackh,
-+ media-quad-multiply-cross-acc, mbtoh-semantics,
-+ media-quad-cross-multiply-cross-acc-semantics,
-+ media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
-+ media-quad-cross-multiply-acc-semantics, cmbtoh,
-+ media-quad-cross-multiply-acc, media-quad-complex, mhtob,
-+ media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
-+ cmhtob): Use new operands.
-+ * cpu/frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
-+ (parse_even_register): New function.
-+
-+2003-06-04 Doug Evans <dje@sebabeach.org>
-+
-+ Better handling of 64 bit and mixed 32/64 bit architectures.
-+ * hardware.scm (hw-update-word-modes!): New fn.
-+ * mach.scm (define-cpu)): Call mode-set-word-modes!,
-+ hw-update-word-modes!.
-+ (state-word-bitsize): Replace FIXME with requested check.
-+ (arch-analyze-insns!): Call mode-ensure-word-sizes-defined.
-+ * mode.scm (mode-find): Ignore INT,UINT.
-+ (-mode-word-sizes-kind): New global.
-+ (mode-set-word-modes!,mode-set-identical-word-bitsizes!,
-+ mode-set-biggest-word-bitsizes!,mode-ensure-word-sizes-defined): New fns.
-+ (mode-init!): Initialize -mode-word-sizes-kind. Move initialization
-+ of mode-list to ...
-+ (mode-builtin!): ... here. Initialize WI/UWI/AI/IAI to something
-+ unusable, correct values set later.
-+ (mode-finish!): Remove cruft.
-+ * html.scm (doc-init!): Call mode-set-biggest-word-bitsizes!.
-+ * opcodes.scm (opcodes-init!): Ditto.
-+ * rtx-funcs.scm (annul): Fix mode of pc.
-+ * cpu/ia64.cpu: Remove cruft that sets word modes.
-+ * cpu/xstormy16.cpu (define-cpu): Set word-bitsize.
-+
-+2003-06-03 Nick Clifton <nickc@redhat.com>
-+
-+ * cpu/frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
-+ immediate value not unsigned.
-+
-+2003-05-21 J"orn Rennecke <joern.rennecke@superh.com>
-+
-+ * cpu/sh.cpu: Amend comments to refer to SuperH.
-+ * cpu/sh64-compact.cpu: Change comment to refer to SuperH.
-+ * cpu/sh64-media.cpu: Likewise.
-+ (Saturation): Update manual reference.
-+
-+2003-05-15 Doug Evans <dje@sebabeach.org>
-+
-+ * Makefile.am (srcroot): New var.
-+ (html): New rule.
-+ * Makefile.in: Regenerate.
-+ * cgen-doc.scm: New file.
-+ * html.scm: New file.
-+ * gen-all-doc: New file.
-+ * dev.scm (cload): Handle DOC application.
-+ (load-doc): New fn.
-+ * machs.scm (machs-for-cpu): New fn.
-+ * model.scm (models-for-cpu): New fn.
-+ * utils.scm (gen-c-copyright): Renamed from gen-copyright.
-+ All uses updated.
-+ (iota): Rewrite to be identical to pmacro version. All uses updated.
-+ * utils-cgen.scm (alpha-sort-obj-list): New fn.
-+
-+ * utils-sim.scm (-gen-decoder-switch): Back out patch of 2003-01-09.
-+ (-gen-decode-bits): Instead put in better fix here.
-+
-+ * cpu/i960.cpu (index): Rename to indx. All uses updated.
-+
-+2003-05-01 DJ Delorie <dj@redhat.com>
-+
-+ * cpu/xstormy16.cpu (alignfix-mem): Correct logic for unaligned
-+ word accesses.
-+ (set-alignfix-mem): Likewise.
-+
-+2003-04-16 Dave Brolley <brolley@redhat.com>
-+
-+ * doc/rtl.texi (Iiming): Correct example to use 'model-name'.
-+ * utils.scm (copyright-fsf): Update generate copyright years.
-+ (copyright-cygnus): Ditto.
-+ * sid.scm (-op-gen-set-trace): Generate code to fill in bitmask of modified
-+ operands.
-+ (-gen-arch-model-decls): Don't generate unit enum declaration or MAX_UNITS
-+ here.
-+ (<operand>'gen-profile-code): New parameter 'when'.
-+ (<iunit>'gen-profile-code): Ditto.
-+ (<insn>'gen-profile-code): Ditto.
-+ (<unit>'gen-profile-code): Ditto. Only generate 'referenced' and
-+ 'insn_reference' for the 'after' function.
-+ * model.scm (unit:enum): Moved to sim-model.scm.
-+ * sim-model.scm (unit:enum): Moved from model.scm.
-+ * sid-decode.scm (-gen-scache-decls): Generate the 'written' field.
-+ * cgen-sid.scm (sim-arguments): Document the generation of model.h.
-+ * sid-model.scm (unit:enum): New version for sid.
-+ (gen-model-class-name): New function.
-+ (gen-model-unit-fn-decl): New function.
-+ (gen-model-fn-decls): Call gen-model-unit-fn-decl.
-+ (gen-model-unit-fn-name): New parameter 'when'.
-+ (-gen-model-insn-fn-name): Ditto.
-+ (-gen-model-insn-qualified-fn-name): New function.
-+ (-gen-model-insn-fn-decl): New function.
-+ (-gen-model-insn-fn-decls): New function.
-+ (-gen-model-insn-fn): New parameter 'when'. Call
-+ -gen-model-insn-qualified-fn-name.
-+ (-gen-model-insn-fns): Generate the constructor for the model. Generate
-+ functions for modelling insn before and after execution.
-+ (-gen-model-class-decls): New function.
-+ (" (gen-model-class-name model) "): New function.
-+ (gen-model-classes): New function.
-+ (-gen-insn-timing): Generate functions for modelling insn before and after
-+ execution.
-+ (-gen-insn-unit-timing): Generate class-qualified names.
-+ (-gen-model-timing-table): Ditto.
-+ (cgen-model.cxx): Generate #include for @cpu@.h. Omit generation of code
-+ not needed (yet) by sid.
-+ (cgen-model.h): New function.
-+
-+2003-04-15 Rohit Kumar Srivastava <rohits@kpitcummins.com>
-+
-+ * cpu/sh.cpu: Replace occurrances of 'Hitachi' with 'Renesas'.
-+ * cpu/sh64-compact.cpu: Likewise.
-+ * cpu/sh64-media.cpu: Likewise.
-+
-+2003-03-21 DJ Delorie <dj@redhat.com>
-+
-+ * cpu/xstormy16.cpu (basic-psw): New argument ws (wordsize),
-+ which indicates if the sign flag is set from bit 15 or 7.
-+ Adjust all callers.
-+ (set-psw): New argument ws, propogate it.
-+ (set-psw-nowrite): Likewise.
-+ (set-mem-psw): Likewise.
-+ (set-psw-carry): Likewise. Use temporaries to prevent
-+ prematurely overwriting needed inputs.
-+ (set-psw-rrotate17): Fix logic.
-+ (shrgrgr): Preserve carry for zero-bit shifts.
-+ (shrgrimm): Likewise.
-+ (shlgrgr): Likewise.
-+ (shlgrimm): Likewise.
-+ (asrgrgr): Likewise.
-+ (asrgrimm): Likewise.
-+ (reset): New.
-+
-+2003-03-12 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * sid.scm: Set APPLICATION to SID-SIMULATOR.
-+
-+2002-03-05 DJ Delorie <dj@redhat.com>
-+
-+ * cpu/xstormy16.cpu (set-psw-add): Use temporaries to prevent
-+ prematurely overwriting needed inputs.
-+ (set-psw-sub): Likewise.
-+
-+Fri Feb 21 19:48:19 2003 J"orn Rennecke <joern.rennecke@superh.com>
-+
-+ * cpu/sh64-media.cpu (make-mextr): Fix setting of count.
-+
-+2003-02-18 DJ Delorie <dj@redhat.com>
-+
-+ * xstormy16.cpu (set-mem-alignfix-psw): Remove.
-+ (movlmemimm): Just mask the address.
-+ (movhmemimm): Likewise.
-+ (movlmemgr): Likewise.
-+ (movhmemgr): Likewise.
-+ (set-psw): Always set the psw last.
-+ (set-psw-carry): Likewise.
-+ (set-psw-add): Likewise.
-+ (set-psw-sub): Likewise.
-+
-+ * xstormy16.cpu (set-psw-rrotate17): New. Choose the correct set
-+ of 16 patterns from the set-psw-rotate17 function.
-+ (movgrigr, movgripostincgr, movgripredecgr, movgriigr,
-+ movgriipostincgr, movgriipredecgr): Set psw correctly.
-+ (movfgrigr, movfgripostincgr, movfgripredecgr, movfgriigr,
-+ movfgriipostincgr, movfgriipredecgr): Fix semantics.
-+ (rrcgrgr, rrcgrimm4): Use new set-psw-rrotate17 function.
-+
-+2003-02-11 Dave Brolley <brolley@redhat.com>
-+
-+ * desc-cpu.scm (gen-ifld-defns): Add all ifields to the
-+ @arch@_cgen-ifld_table.
-+ (gen-maybe-multi-ifld): Use the ifield enumerators to index the
-+ @arch@_cgen-ifld_table.
-+
-+2003-02-03 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * sid-cpu.scm (-gen-sfrag-engine-fn): Generate more hygienic C++.
-+
-+2003-01-09 Graydon Hoare <graydon@redhat.com>
-+
-+ * utils-sim.scm (-gen-decoder-switch): Fix edge condition for
-+ empty ISAs.
-+
-+2003-01-07 Graydon Hoare <graydon@redhat.com>
-+
-+ * utils-gen.scm (attr-int-gen-defn): Define.
-+
-+2002-12-21 Doug Evans <dje@sebabeach.org>
-+
-+ * ifield.scm (-ifield-parse): Rewrite <bitrange> computation.
-+ (-get-ifld-word-offset,-get-ifld-word-length): New fns.
-+
-+ * dev.scm (cload): Update location of .cpu files.
-+
-+2002-12-19 Doug Evans <dje@sebabeach.org>
-+
-+ * utils-sim.scm (gen-profile-sym): New fn.
-+ (<operand>,sbuf-profile-sym): New method.
-+ (<operand>,sbuf-profile-elm): Use it.
-+ * sim.scm (<operand>,gen-record-profile): Use sbuf-profile-sym instead
-+ of hardcoding symbol name.
-+ (<operand>,gen-profile-code): Ditto.
-+ (<unit>,gen-profile-code): Use gen-profile-sym instead of hardcoding
-+ symbol name.
-+
-+ * mode.scm (mode-sem-mode): New fn.
-+ * operand.scm (op:new-mode): Update. mode-name.
-+ (op-natural-mode?) New fn.
-+ * rtl.scm (hw): Set hw-name,mode-name.
-+
-+ Back out sim*.scm changes of 2001-04-02 Ben Elliston <bje@redhat.com>
-+ Instead do:
-+ * sim-decode.scm (-gen-decode-insn-globals): Use @PREFIX@_INSN__MAX
-+ as size of IDESC-TABLE-VAR.
-+ (@prefix@_init_idesc_table): Ditto.
-+ * sim-model.scm (-gen-mach-defns): Ditto.
-+ * sim.scm (gen-cpu-insn-enum-decl): Rename last elm from max to -max.
-+
-+ * utils-sim.scm (-gen-decode-insn-entry): Fix some spacing in output.
-+
-+ * insn.scm (-parse-insn-format-symbol): Improve error message.
-+ (-parse-insn-format): Ditto.
-+
-+ * gen-all-sim: New script.
-+
-+2002-12-16 DJ Delorie <dj@delorie.com>
-+
-+ * cpu/xstormy16.opc (parse_immediate16): Add prototype.
-+
-+2002-12-16 Andrew MacLeod <amacleod@redhat.com>
-+
-+ * cpu/xstormy16.cpu (imm16): Call handler immediate16.
-+ * cpu/xstormy16.opc (parse_small_immediate): Return on '@'.
-+ (parse_immediate16): Handle immediate16 values, which now include
-+ @hi(label) and @lo(label)
-+
-+2002-12-03 Alan Modra <amodra@bigpond.net.au>
-+
-+ * desc-cpu.scm (gen-maybe-multi-ifld): Remove superfluous parens.
-+ Add braces and cast for union field.
-+ (gen-multi-ifield-nodes): Add braces and cast for union field.
-+ (cgen_operand_table): Similarly fix sentinel.
-+ (cgen_cpu_close): Constify "insns". Formatting.
-+ (cgen-desc.c): Include xregex.h.
-+ * cpu/ip2k.opc (ip2k_cgen_insn_supported): Move to opc.c section.
-+ Prototype.
-+ <opc.c>: Include safe-ctype.h.
-+ (ip2k_asm_hash): Use ISSPACE and TOLOWER.
-+ (PARSE_FUNC_DECL): Declare. Use to prototype parse_fr, parse_addr16,
-+ parse_addr16_p, parse_addr16_cjp, parse_lit8 and parse_bit3.
-+ (parse_fr): Constify "old_strp". Correct type of "tempvalue".
-+ Don't test it for >= 0. Use ISSPACE rather than isspace. Formatting.
-+ (parse_addr16): Correct type of "value". Formatting.
-+ (parse_addr16_p): Likewise.
-+ (parse_addr16_cjp): Likewise.
-+ (parse_lit8): Likewise.
-+ (parse_bit3): Formatting.
-+ (PRINT_FUNC_DECL): Define. Use to prototype print_fr, print_dollarhex,
-+ print_dollarhex8, print_dollarhex16, print_dollarhex_addr16h,
-+ print_dollarhex_addr16l, print_dollarhex_p, print_dollarhex_cj and
-+ print_decimal.
-+ (print_fr): Add ATTRIBUTE_UNUSED on unused args. Formatting.
-+ (print_dollarhex): Add ATTRIBUTE_UNUSED on unused args.
-+ (print_dollarhex8): Likewise.
-+ (print_dollarhex16): Likewise.
-+ (print_dollarhex_addr16h): Likewise.
-+ (print_dollarhex_addr16l): Likewise.
-+ (print_dollarhex_p): Likewise.
-+ (print_dollarhex_cj): Likewise.
-+ (print_decimal): Likewise.
-+ * cpu/xstormy16.opc (parse_mem8): Use ISALNUM rather than isalnum.
-+
-+2002-11-30 Hans-Peter Nilsson <hp@axis.com>
-+
-+ * doc/rtl.texi (Model variants): Mention current limitations for
-+ unit inputs and outputs.
-+ (Hardware elements) <attribute PROFILE>: Be slightly more
-+ verbose.
-+ (Instructions) <timing>: input/output overrides have a direction
-+ operand.
-+
-+2002-11-25 DJ Delorie <dj@redhat.com>
-+
-+ * xstormy16.cpu (sdiv, divlh, sdivlh): Fix sdivlh/divlh encodings.
-+
-+2002-11-21 Jeff Johnston <jjohnstn@redhat.com>
-+
-+ * cpu/iq10.cpu: New file.
-+ * cpu/iq2000.cpu: Likewise.
-+ * cpu/iq2000.opc: Likewise.
-+ * cpu/iq2000m.cpu: Likewise.
-+
-+2002-11-19 DJ Delorie <dj@redhat.com>
-+
-+ * cpu/xstormy16.cpu (sdiv, divlh, sdivlh): New.
-+
-+2002-11-05 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * dev.scm: Call getenv with a string, not a symbol.
-+
-+2002-10-08 Doug Evans <dje@transmeta.com>
-+ Hans-Peter Nilsson <hp@axis.com>
-+
-+ * types.scm (bitrange-overlap?): Handle lsb0?.
-+
-+2002-09-07 Frank Ch. Eigler <fche@redhat.com>
-+
-+ From Robert Cragie <rcc@jennic.com>:
-+ * cpu/arm7.cpu (ldm*-sw*, stm*-sw*): New instructions.
-+
-+2002-07-17 Frank Ch. Eigler <fche@redhat.com>
-+ Ben Elliston <bje@redhat.com>
-+ John Healy <jhealy@redhat.com>
-+ Jeff Johnston <jjohnstn@redhat.com>
-+ Alan Lehotsky <alehotsky@redhat.com>
-+ Ubicom Inc. <SupportDesk@ubicom.com>
-+
-+ * cpu/ip2k.cpu: New file.
-+ * cpu/ip2k.opc: Likewise.
-+
-+2002-07-01 Hans-Peter Nilsson <hp@axis.com>
-+
-+ * utils-gen.scm (-gen-extract-word): Handle lsb0?.
-+
-+2002-06-25 J"orn Rennecke <joern.rennecke@superh.com>
-+
-+ * cpu/sh64-compact.cpu (movw5): Use Correct operand field for reg.
-+ * cpu/sh64-media.cpu (-ldhi-byte, -ldhi-word, -ldhi-long): New macros.
-+ (-ldlo-byte, -ldlo-word, -ldlo-long): Likewise.
-+ (-sthi-word, -sthi-long -stlo-byte, -stlo-word, -stlo-long): Likewise.
-+ (ldhil, ldhiq, ldlol, ldloq, stlol, stloq): Implement.
-+ (mshfhib, mshfhil, mshfhiw, mshflob, mshflol, mshflow): Fix indices.
-+ (-sthi-byte): If there is a single byte to store, store it at
-+ proper address.
-+ (sthil, sthiq): Fix big-endian behaviour.
-+ (mcnvslw, mcnvswb, mcnvswub, mmacfxwl, mmacnfx.wl): Fix indices.
-+ (mmulfxl, mmulfxw, mmulfxrpw, mmulhiwl, mmullowl): Likewise.
-+ (saturate): Use Dimode to check if saturation operation is required.
-+ (usaturate): Likewise.
-+ (mpermw): Fix mask.
-+ (-maddsl, -maddsub): Compute to-be-saturated value in wider mode.
-+ (-maddsw, mmacfxwl, mmacnfx.wl, -mshaldsl, -mshaldsw): Likewise.
-+ (-mshardl, -mshardw, -msubsl, -msubsub, -msubsw): Likewise.
-+ (msadubq): Fix subword index in second operand of first subtraction.
-+
-+2002-06-20 Hans-Peter Nilsson <hp@axis.com>
-+
-+ * sim-cpu.scm (gen-semantic-code): Prepend with setup-semantics
-+ code.
-+
-+2002-06-18 Dave Brolley <brolley@redhat.com>
-+
-+ * cpu/frv.cpu: New cpu description.
-+ * cpu/frv.opc: New cpu support code.
-+
-+2002-05-21 Dave Brolley <brolley@redhat.com>
-+
-+ * decode.scm (-opcode-slots): Don't consider bits beyond the
-+ length of the insn.
-+
-+2002-05-17 Johan Rydberg <jrydberg@rtmk.org>
-+
-+ * cpu/powerpc.cpu: New file.
-+
-+2002-05-01 Graydon Hoare <graydon@redhat.com>
-+
-+ * desc-cpu.scm (@arch@_cgen_cpu_close): Fix memory leaks.
-+
-+2002-03-20 Hans-Peter Nilsson <hp@axis.com>
-+
-+ * doc/pmacros.texi (Symbol concatenation): Mention that .sym
-+ results are expanded recursively.
-+
-+2002-03-19 Hans-Peter Nilsson <hp@axis.com>
-+
-+ * pmacros.scm (-pmacro-expand,scan): If result is a symbol,
-+ call scan-symbol on it, to enable recursive macro-expansion.
-+
-+2002-01-25 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * sid-cpu.scm (-gen-hardware-types): Generate single hardware union
-+ for multiple-isa configurations.
-+ * sid-decode.scm (-gen-decode-fn): Tolerate empty insn list.
-+
-+2002-02-04 Ben Elliston <bje@redhat.com>
-+
-+ * cpu/sh.cpu, cpu/sh.opc: New files.
-+ * cpu/sh64-comact.cpu, cpu/sh64-media.cpu: Likewise.
-+
-+2002-01-29 Hans-Peter Nilsson <hp@axis.com>
-+
-+ * doc/rtl.texi: Fix typo: define-attr, not define-attribute.
-+ (Enumerated constants): Mention that an ifield must not specify a
-+ multi-ifield.
-+ (Instruction operands): Ditto for index.
-+ (Expressions) <parallel>: Remove misplaced mention of local
-+ variables.
-+ <if>: Mention that mode must be specified and non-VOID when the
-+ result is used.
-+
-+2002-01-28 Hans-Peter Nilsson <hp@axis.com>
-+
-+ * doc/porting.texi: When referring to *.opc, mention they are in
-+ the cpu subdir. Call top-level directory toplevel, not devo.
-+ Close string in define-normal-insn example.
-+
-+ * doc/pmacros.texi: Fix .substr typo to .substring.
-+ Mention that .sym expansions are not further expanded.
-+
-+2002-01-22 Graydon Hoare <graydon@redhat.com>
-+
-+ * desc-cpu.scm (ifld-number-cache): Add.
-+ (ifld-number): Add.
-+ (gen-maybe-multi-ifld-of-op): Add.
-+ (gen-maybe-multi-ifld): Add.
-+ (gen-multi-ifield-nodes): Add.
-+ (cgen-desc.c): Add call to gen-multi-ifield-nodes.
-+
-+2002-01-10 matthew green <mrg@redhat.com>
-+
-+ * cpu/xstormy16.cpu (gr-Rbj-names): Rename this ...
-+ (gr-Rb-names): ... to this.
-+ (h-Rb): New hardware piece.
-+ (h-Rbj): Use gr-Rb-names.
-+ (Rb): Use h-Rb.
-+ (holdx): New instruction.
-+
-+2002-01-07 Ben Elliston <bje@redhat.com>
-+
-+ * utils.scm (package-cygnus-simulators): Rename from this ..
-+ (package-red-hat-simulators): .. to this.
-+ * opcodes.scm (option-set!): Use package-red-hat-simulators.
-+ * sid-cpu.scm (cgen-desc.h): Likewise.
-+ (cgen-cpu.h): Likewise.
-+ (cgen-defs.h): Likewise.
-+ (cgen-write.cxx): Likewise.
-+ (cgen-semantics.cxx): Likewise.
-+ (cgen-sem-switch.cxx): Likewise.
-+ * sid-decode.scm (cgen-decode.h): Likewise.
-+ (cgen-decode.cxx): Likewise.
-+ * sid-model.scm (cgen-model.cxx): Likewise.
-+ * sid.scm (option-set!): Likewise.
-+ * sim.scm (option-set!): Likewise.
-+
-+2002-01-07 Ben Elliston <bje@redhat.com>
-+
-+ * utils.scm (copyright-fsf): Add 2002.
-+ (copyright-cygnus): Rename to copyright-red-hat.
-+ (copyright-red-hat): Add 2002.
-+ (CURRENT-COPYRIGHT): Update comment.
-+ * opcodes.scm (option-set!): Update callers.
-+ * sid-model.scm (cgen-model.cxx): Likewise.
-+ * sid-cpu.scm: Likewise.
-+ * sid-decode.scm: Likewise.
-+ * sid.scm (option-set!): Handle "redhat" as an option for
-+ "copyright"; use copyright-red-hat.
-+ * sim.scm (option-set!): Likewise.
-+
-+2002-01-03 Dave Brolley <brolley@redhat.com>
-+
-+ * decode.scm (-distinguishing-bit-population): Compute num-insns, the
-+ number of insns in the list. Update the population count function to
-+ identify and prioritize 3 catgories of useful bits.
-+ (-population-top-few): Don't consider bits with a population count of
-+ zero.
-+ (-build-decode-table-entry): Don't call
-+ filter-harmlessly-ambiguous-insns. Filter out non-specialized and
-+ identical insns at the next tree level.
-+ * insn.scm (filter-harmlessly-ambiguous-insns): Note in a comment that
-+ this function is no longer used.
-+ (filter-non-specialized-ambiguous-insns): New function.
-+ (filter-identical-ambiguous-insns): New function.
-+ (find-identical-insn): New function.
-+ (filter-harmlessly-ambiguous-insns): Removed.
-+
-+2001-11-26 Geoffrey Keating <geoffk@redhat.com>
-+ matthew green <mrg@redhat.com>
-+ Frank Ch. Eigler <fche@redhat.com>
-+ Nick Clifton <nickc@cambridge.redhat.com>
-+
-+ * cpu/xstormy16.cpu: New file.
-+ * cpu/xstormy16.opc: New file.
-+
-+2001-11-26 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * doc/sim.texi, rtl.texi, porting.texi: Correct texinfo markup typos.
-+
-+2001-11-14 Dave Brolley <brolley@redhat.com>
-+
-+ * utils-gen.scm (-gen-extract-word): Correct computation of the length
-+ of the field being extracted.
-+
-+2001-10-29 Johan Rydberg <johan@rydberg.com>
-+
-+ * doc/rtl.texi (Expressions): Document the (error ..), (sqrt ..),
-+ (cos ...) and (sin ..) rtx.
-+
-+2001-10-13 Nick Clifton <nickc@cambridge.redhat.com>
-+
-+ * desc-cpu.scm: Do not include ctype.h in generated desc
-+ files. They will inherit safe-ctype.h instead.
-+
-+2001-10-08 Nick Clifton <nickc@cambridge.redhat.com>
-+
-+ * desc-cpu.scm: Add missing function prototypes (for generated
-+ C files). Fix compile time warning messages about unused
-+ parameters (for generated C files).
-+ * opc-asmdis.scm: The same.
-+ * opc-ibld.c: The same.
-+ * opc-itab.scm: The same.
-+ * cpu/fr30.opc: The same.
-+ * cpu/m32r.opc: The same.
-+ * cpu/openrisc.opc: The same.
-+
-+2001-09-17 graydon hoare <graydon@redhat.com>
-+
-+ * insn.scm (syntax-break-out): Correct logic in handling escaped
-+ syntax characters.
-+
-+2001-07-12 Jeff Johnston <jjohnstn@redhat.com>
-+
-+ * opc-itab.scm (@arch@_cgen_init_opcode_table): Unconditionally
-+ call @arch@_cgen_build_insn_regex now that regex support is in
-+ libiberty.
-+
-+2001-07-12 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * insn.scm (filter-harmlessly-ambiguous-insns): Fix msg typo.
-+ (mask-superset?): Look for strict supersets to allow rejection of
-+ duplicate insns.
-+
-+2001-07-11 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * sid-cpu.scm (-gen-mach-params): New proc to emit ...CHUNK_BITSIZE...
-+ (cgen-desc.h): Call it.
-+ * sid-decode.scm (-gen-decode-fn): Use base-insn-bitsize as
-+ decode-size.
-+ * utils-sim.scm (-gen-decode-insn-entry): For SID only, prepare
-+ entire_insn for extraction, if it's shorter than base-insn-bitsize.
-+
-+2001-07-11 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * desc-cpu.scm (-gen-mach-table-defns): Emit fourth field: the
-+ mach->cpu insn-chunk-bitsize.
-+ (-gen-cpu-open): In @arch@_cgen_rebuild_tables, process above new
-+ field toward CGEN_CPU_TABLE->insn_chunk_bitsize.
-+ * mach.scm (<cpu>): New field insn-chunk-bitsize.
-+ (-cpu-parse, -cpu-read): Parse/initialize it.
-+ * doc/rtl.texi (define-cpu): Document it.
-+
-+2001-07-09 Geoffrey Keating <geoffk@redhat.com>
-+
-+ * ifield.scm (<ifield> 'field-start): Don't look at word-len.
-+
-+2001-07-06 Ben Elliston <bje@redhat.com>
-+
-+ * opcodes.scm (read-cpu.opc): Read .opc files from subdir/cpu.
-+
-+2001-07-05 Ben Elliston <bje@redhat.com>
-+
-+ * README: Update.
-+
-+ * read.scm (include): Include files from srcdir/cpu.
-+ (-cgen): Likewise for loading .cpu files.
-+ * sid.scm (sim-finish!): Read .sim files from srcdir/cpu.
-+ * *.cpu: Move all cpu descriptions into cpu subdirectory.
-+ * *.opc: Likewise.
-+ * simplify.inc: Likewise.
-+
-+2001-07-04 Ben Elliston <bje@redhat.com>
-+
-+ * read.scm (include): Log "Including file" message at level 1,
-+ rather than outputting it with (display).
-+ (cpu-load): Log "Loading cpu description" and "Processing cpu
-+ description" messages at levels 1 and 2, respectively, rather than
-+ using (display).
-+
-+2001-06-14 Geoffrey Keating <geoffk@redhat.com>
-+
-+ * desc.scm (<keyword> 'gen-defn): Add extra zero into
-+ CGEN_KEYWORD_ENTRY initializers.
-+
-+ * gas-test.scm (gen-gas-test): Create 8 testcases, not just 5.
-+ (<operand> 'test-data): Involve both the index and the hardware
-+ in testcase generation.
-+ (<hw-indx> 'test-data): Generate test data from the underlying
-+ object.
-+ (<ifield> 'test-data): Generate test data by computing bit
-+ patterns for the field, then decoding them.
-+ (<hw-address> 'test-data): Allow for new calling convention.
-+ (<hw-iaddress> 'test-data): Likewise.
-+ (<keyword> 'test-data): Convert index values into keywords.
-+ (<hw-asm> 'test-data): Convert index values into integer strings.
-+
-+ * gas-test.scm (cgen-build.sh): Escape '.' as well.
-+
-+2001-06-01 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * rtl.scm (hw): Encode hw access mode into <operand> name, since this
-+ is required for multi-mode hw types (memory).
-+
-+2001-05-11 Ben Elliston <bje@redhat.com>
-+
-+ * gas-test.scm (cgen-build.sh, gentest): Escape $ with a backslash
-+ when generating allinsn.d from objdump output. Without it, the
-+ testsuite will treat $ as the regular expression for end of line.
-+
-+2001-05-09 Ben Elliston <bje@redhat.com>
-+
-+ * doc/porting.texi (Doing a GAS port): Replace `cgen_opcode_open'
-+ with `cgen_cpu_open'; documentation had become out of date.
-+ * doc/rtl.texi (Instruction operands): Likewise.
-+
-+2001-05-07 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * iformat.scm (compute-insn-base-mask-length): Rewrite to tolerate
-+ various-base-length instruction sets.
-+
-+2001-04-02 Ben Elliston <bje@redhat.com>
-+
-+ * sid-cpu.scm (-last-insn): New function.
-+ (-gen-sem-switch-engine): Loop through idesc while less than or
-+ equal to the last instruction enum, not less than the MAX enum.
-+ (-gen-sfrag-engine-fn): Clean up frag_label_table initialisation.
-+ * sid-decode.scm (-gen-decode-insn-globals): Define the idesc
-+ table's size to be the last instruction enum plus one, not
-+ @PREFIX@_INSN_MAX.
-+ * sid.scm (gen-cpu-insn-enum-decl): Do not append a dummy `max'
-+ instruction onto the instruction list.
-+
-+ * sim-decode.scm (@prefix@_init_idesc_table): Compute tabsize
-+ using the size of the table and its elements.
-+ (-gen-decode-insn-globals): Define the idesc table's size to be
-+ the last instruction enum plus one, not @PREFIX@_INSN_MAX.
-+ * sim-model.scm (-gen-mach-defns): Define CPU_MAX_INSNS as the
-+ last instruction enum plus one, not @CPU@_INSN_MAX.
-+
-+2001-03-28 Ben Elliston <bje@redhat.com>
-+
-+ * doc/version.texi (UPDATED, EDITION): Update.
-+ * doc/stamp-vti: Likewise.
-+
-+2001-03-26 Ben Elliston <bje@redhat.com>
-+
-+ * doc/credits.texi (Credits): Update.
-+
-+ * gas-test.scm (<keyword>,test-data): Prefix keywords by their
-+ specified prefix and, if necessary, escape `$' in gas-build.sh to
-+ prevent unwanted shell variable expansion.
-+
-+2001-03-24 Ben Elliston <bje@redhat.com>
-+
-+ * gas-test.scm (<hw-asm>,test-data): Choose pseudo-random data.
-+ (<keyword>,test-data): Likewise.
-+ (<hw-address>,test-data): Likewise.
-+ (<hw-iaddress>,test-data): Likewise.
-+ (-collate-test-set): New function.
-+ (build-test-set): Use it.
-+ (gen-gas-test): Generate five test cases per instruction.
-+ (cgen-allinsn.exp): Include "-*- Tcl -*-" in DejaGNU test file.
-+
-+ * read.scm: Load "slib/random" if random is not defined.
-+ * slib/random.scm: New file.
-+
-+ * utils.scm: Remove comments about the Hobbit compiler.
-+ (copyright-cygnus): Add 2001.
-+ (package-cygnus-simulators): Replace "Cygnus" with "Red Hat".
-+ (package-gnu-simulators): Tidy.
-+
-+2001-03-23 Ben Elliston <bje@redhat.com>
-+
-+ * cgen-gas.scm: Inline documentation improvements.
-+
-+2001-03-21 Ben Elliston <bje@redhat.com>
-+
-+ * opc-itab.scm (compute-syntax): Emit a parse error if an operand
-+ given in a syntax string is undefined.
-+
-+ * opc-itab.scm (compute-syntax): Emit a parse error if an operand
-+ name is empty or invalid -- eg. "$(rs)" instead of "($rs)".
-+
-+2001-03-20 Patrick Macdonald <patrickm@redhat.com>
-+
-+ * desc-cpu.scm (@arch@_cgen_cpu_open): Correct machine calculation
-+ for arg_type CGEN_CPU_OPEN_BFDMACH.
-+
-+2001-03-20 Ben Elliston <bje@redhat.com>
-+
-+ * opc-itab.scm (-gen-insn-enum): Do not append a dummy `max'
-+ instruction onto the instruction list. Define MAX_INSNS to be the
-+ value of the last instruction enum plus one.
-+
-+2001-03-14 Nick Clifton <nickc@redhat.com>
-+
-+ * utils.scm (copyright-fsf): Add 2001. Remove (C).
-+
-+2001-03-05 Dave Brolley <brolley@redhat.com>
-+
-+ * sim-decode.scm (-gen-extract-case): Generate declaration of "insn"
-+ if the number of ifields is greater than zero.
-+
-+2001-03-01 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * sid.cpu (-op-gen-set-trace[-parallel], -create-virtual-insns!):
-+ Emit LIKELY/UNLIKELY branch probability hints.
-+ * sid-decode.cpu (-gen-record-args): Ditto.
-+
-+2001-02-02 Patrick Macdonald <patrickm@redhat.com>
-+
-+ * desc-cpu.scm (-gen-hash-defines): Rename
-+ CGEN_ACTUAL_MAX_SYNTAX_BYTES to CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS.
-+
-+2001-01-26 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * sid-cpu.scm (gen-parallel-exec-type): Use unsigned long long for
-+ writeback tracking.
-+ (-gen-write-fn, -gen-sem-case, -gen-sfrag-case): Ditto.
-+ * sid-decode.scm (-gen-scache-decls): Exclude writeback tracking field
-+ if unnecessary.
-+ * sid.scm (<operand> gen-write): Use unsigned long long expression
-+ for writeback.
-+ (-op-gen-set-trace, -op-gen-set-trace-parallel): Ditto.
-+ (<unit> gen-profile-code): Ditto.
-+
-+2001-01-23 Johan Rydberg <jrydberg@opencores.org>
-+
-+ * doc/rtl.texi (Expressions): Document the (index-of ...) and
-+ (regno ...) rtx.
-+
-+2001-01-08 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * operand.scm (<operand> pretty-sem-name): New field.
-+ (<operand> make): Initialize it from hw-name.
-+ (op:set-pretty-sem-name!): New function.
-+ (<operand> gen-pretty-name): Default to fetching new field.
-+ * rtl.scm (hw): Copy hw-name to pretty-sem-name instead. Restore
-+ sem-name setting from -rtx-hw-name.
-+
-+2001-01-08 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * rtl.scm (hw): Copy hw-name to new operand's sem-name, to simplify
-+ its subsequent gen-pretty-name.
-+
-+ * read.scm: Increase thread working stack limit and backtrace
-+ depth limits.
-+
-+2001-01-08 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * doc/rtl.texi: Deprecate and depreciate the decode-assist construct.
-+
-+2001-01-06 Johan Rydberg <jrydberg@opencores.org>
-+
-+ * openrisc.cpu (or32): Setup semantics for h-delay-insn to
-+ current insn plus 4.
-+ (h-delay-insn): New hardware register.
-+ (l-jal): Uses h-delay-insn instead of pc when setting link register.
-+ (l-jalr): Likewise.
-+ (l-bal): Likewise.
-+
-+ * openrisc.opc (parse_hi16): Sign extend value.
-+ (parse_lo16): Likewise.
-+
-+2001-01-06 Ben Elliston <bje@redhat.com>
-+
-+ * utils-gen.scm (gen-sfmt-enum-decl): Use @prefix@ and @PREFIX@
-+ instead of @cpu@ and @CPU@ to generically prefix symbol names.
-+ * sim-cpu.scm (-gen-sem-fn-table-entry): Likewise.
-+ (-gen-semantic-fn-table): Likewise.
-+ (-gen-scache-semantic-fn): Likewise.
-+ (-gen-no-scache-semantic-fn): Likewise.
-+ (cgen-read.c): Likewise.
-+ (cgen-sem-switch.c): Likewise.
-+ * desc-cpu.scm (cgen-desc.c): Use @arch@, not @prefix@, since this
-+ is a filename prefix.
-+ * sim-decode.scm (IDESC-TABLE-VAR): Use @prefix@, et al.
-+ (-gen-decode-insn-globals): Likewise.
-+ (-gen-idesc-decls): Likewise.
-+ (cgen-decode.h): Likewise.
-+ (cgen-decode.c): Likewise.
-+ * sim.scm (gen-cpu-insn-enum-decl): Likewise.
-+ (gen-cpu-insn-enum): Likewise.
-+ (sim-finish!): Likewise.
-+
-+2001-01-05 Johan Rydberg <jrydberg@opencores.org>
-+
-+ * openrisc.cpu: New file.
-+ * openrisc.opc: Likewise.
-+
-+2000-12-12 Ben Elliston <bje@redhat.com>
-+
-+ * doc/rtl.texi (Expressions): Document the (delay ..) rtx.
-+
-+2000-12-07 Ben Elliston <bje@redhat.com>
-+
-+ * sim-decode.scm (-gen-extract-case): Do not emit a definition for
-+ "insn" when there are zero ifields to extract.
-+
-+2000-12-04 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * utils-sim.scm (gen-define-argbuf-macro): Handle sfmt=#f case, to be
-+ used by simple/non-scache simulators.
-+ * sim-cpu.scm (-gen-read-case): Call gen-define/undef-field-macro
-+ regardless of with-scache?.
-+ (-gen-write-case, -gen-no-scache-semantic-fn, -gen-sem-case): Ditto.
-+
-+2000-12-03 Ben Elliston <bje@redhat.com>
-+
-+ * desc-cpu.scm (cgen-desc.h): Clarify generated filenames.
-+ (cgen-desc.c): Likewise.
-+
-+2000-12-01 Greg McGary <greg@mcgary.org>
-+
-+ * desc.scm (<keyword>,gen-defn): Prepend prefix to keyword names.
-+
-+2000-12-01 Ben Elliston <bje@redhat.com>
-+
-+ * sim-cpu.scm (cgen-cpu.h): Only emit argbuf, scache and extract
-+ definitions if run without with-multipla-isa?.
-+ (cgen-defs.h): New function. Emit an ISA-specific defs file.
-+ * cgen-sim.scm (sim-arguments): Accept -G option to generate defs.
-+
-+2000-11-24 Ben Elliston <bje@redhat.com>
-+
-+ * sim-cpu.scm (-gen-hardware-struct): New function.
-+ (-gen-hardware-types): If with-multiple-isa is specified, emit all
-+ hardware elements wich have share one or more ISAs with the ISAs
-+ being kept.
-+
-+ * sim.scm (-with-multiple-isa?): New symbol.
-+ (with-multiple-isa?): New function.
-+ (option-init!): Initialise -with-multiple-isa?.
-+ (option-set!): Handle with-multiple-isa option.
-+
-+2000-11-21 Ben Elliston <bje@redhat.com>
-+
-+ * utils.scm (copyright-fsf): Add the year 2000.
-+
-+2000-11-20 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * opc-itab.scm (-gen-ifmt-table, -gen-macro-insn-table: Remove
-+ unneeded "\n\n" from F() macro definition.
-+
-+2000-11-15 Greg McGary <greg@mcgary.org>
-+
-+ * utils-cgen.scm (gen-define-with-symcat): New function.
-+ * desc-cpu.scm (gen-ifld-defns): Use it.
-+ (gen-hw-table-defns): Use it.
-+ (-gen-hash-defines): Use it.
-+ (gen-operand-table): Use it.
-+ (gen-insn-table): Use it. Remove spurious `#undef MNEM'.
-+ * opc-itab.scm (-gen-ifmt-table): Use it.
-+ (-gen-insn-opcode-table): Use it.
-+ (-gen-macro-insn-table): Use it.
-+ * opc-opinst.scm (-gen-operand-instance-tables): Use it.
-+ * sim-cpu.scm (cgen-semantics.c): Use it.
-+ (cgen-sem-switch.c): Use it.
-+
-+2000-11-10 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * utils-sim.scm (-gen-decode-insn-entry): Add fn? parameter to signal
-+ request to emit calls to insn extractors as functions rather than
-+ branches to inline blocks.
-+ (-gen-decode-expr-set-itype, -gen-decode-expr-entry): Ditto.
-+ (-gen-decode-table-entry, -gen-decoder-switch, gen-decoder): Ditto.
-+
-+ * sim-decode.c (-gen-decode-fn): Tell (gen-decode) to emit branches
-+ to extractor clauses.
-+
-+2000-11-10 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * decode.scm (-distinguishing-bit-population): Significantly
-+ improve popularity heuristic. Renamed from
-+ (-mask-bit-population): Gone.
-+ (-population-above-threshold): Sort new bit numbers in order of
-+ popularity.
-+ (-population-top-few): Allow up to three more bits to be selected
-+ than requested. Correct selection order to prefer better bits.
-+ Correct bug in fewer-than-requested case. Keep threshold as
-+ floating-point.
-+ (decode-best-get-bits): Pass also the insn-values.
-+
-+ * utils-sim.scm (-gen-decoder-switch): Add comment suggesting a
-+ future optimization.
-+
-+ * utils.scm (message): Format nested lists better.
-+
-+2000-11-09 Doug Evans <dje@casey.transmeta.com>
-+
-+ * dev.scm: Add srcdir to %load-path.
-+
-+ * rtx-funcs.scm (subword): Mode of argument can be different
-+ than mode of result, so don't use OP0 to specify argument's mode.
-+
-+2000-11-02 Ben Elliston <bje@redhat.com>
-+
-+ * doc/porting.texi (Building a GAS test suite): Document my change
-+ to gas-build.sh.
-+
-+2000-11-01 Ben Elliston <bje@redhat.com>
-+
-+ * sim-test.scm (cgen-build.sh): Include "-*- Asm -*-" in test cases.
-+
-+2000-10-31 Ben Elliston <bje@redhat.com>
-+
-+ * gas-test.scm (cgen-build.sh): Allow the generated script to run
-+ with no command line arguments if the gas build directory can be
-+ determined.
-+
-+2000-10-26 Doug Evans <dje@casey.transmeta.com>
-+
-+ * insn.scm (-parse-insn-format-symbol): Fix spelling error,
-+ op-ifld -> op-ifield.
-+
-+2000-10-23 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * thumb.scm (cc-tests): Add (ISA thumb) attribute.
-+
-+2000-10-13 matthew green <mrg@cygnus.com>
-+
-+ * utils-cgen.scm (get-ifetch): Move from here ...
-+ * sim.scm (get-ifetch): ... to here.
-+ * sid.scm (get-ifetch): Copy and port to c++.
-+
-+2000-10-06 Dave Brolley <brolley@redhat.com>
-+
-+ * utils-gen.scm (-gen-ifld-extract-base): Compute start position as
-+ ifld-start + ifld-word-offset.
-+ (gen-ifld-extract): Check adata-integral-insn? before checking whether
-+ the field is beyond the base number of bits.
-+ (gen-define-ifields): Use a base-length of 32 if adata-integral-insn?.
-+ (gen-extract-ifields): Ditto.
-+ * gas-test.scm (gentest): Generate backslashes before '[' and ']'
-+ characters in the regular expression.
-+
-+2000-10-02 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * desc-cpu.scm: (gen-operand-decls): Emit MAX_OPERANDS as a
-+ preprocessor constant.
-+
-+2000-09-21 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * slib/logical.scm: New file from slib. Provides robust bitwise
-+ logical operations for large integers.
-+ * read.scm: maybe-load it.
-+
-+2000-09-15 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * enum.scm (define-full-insn-enum): Filter with keep-isa predicate.
-+ * ifield.scm (-ifield-parse, -multi-ifield-parse): No longer assert
-+ single-isa predicate, but support keep-isa filtering.
-+
-+2000-09-08 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * rtl-c.scm (s-sequence): Handle nested c-calls in both
-+ statement-expression and comma-expression contexts.
-+ (s-c-call, s-c-raw-call): Add warning comment about bad assumption.
-+
-+2000-09-08 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * decode.scm (-population-top-few): Signal error gracefully if
-+ decoding is about to become ambiguous.
-+
-+2000-09-06 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * doc/rtl.texi (decode-assist): Describe this field as optional.
-+
-+2000-09-06 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * utils-gen.scm (gen-multi-ifld-extract): Handle case of multi-ifield
-+ with decode proc.
-+
-+2000-09-05 Dave Brolley <brolley@redhat.com>
-+
-+ * sim.scm (sim-finish!): Honour the definition of FAST_P when calling
-+ @cpu@_pbb_begin. Use 0 if FAST_P is not defined.
-+
-+2000-08-29 Dave Brolley <brolley@redhat.com>
-+
-+ * utils-gen.scm (gen-ifld-extract): Pass total-len if
-+ adata-integral-insn is true for this architecture.
-+
-+2000-08-24 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * hardware.scm (<hw-immediate> get-index-mode): Define method.
-+ * operand.scm (<operand> gen-pretty-name): Tolerate no op:sem-name.
-+ * rtl-c.scm (-c-rtl-get): Improve an error message.
-+ * sim.scm (-op-gen-set-trace): Support <derived-operand> lvalues.
-+
-+2000-08-22 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * Makefile.in (DIST_COMMON): Regenerated.
-+ * ifield.scm (<derived-ifield> needed-iflds): New method.
-+ * iformat.scm (-ifmt-lookup-sfmt!): Use base ifields for
-+ sfmts built from <derived-ifield>s.
-+ * operand.scm (-derived-parse-encoding): Give <derived-ifield> a fixed
-+ type symbol 'derived-ifield, not an unparseable string.
-+ * utils-sim.scm (op-needed-iflds) Handler 'derived-ifield case.
-+ (-sfmt-contents): Add tracing.
-+
-+ From Doug Evans <dje@transmeta.com>:
-+ * sim.scm (<operand> cxmake-get): Result is a <c-expr>, not a string of
-+ C code.
-+
-+2000-08-20 Doug Evans <dje@casey.transmeta.com>
-+
-+ * rtl-c.scm (rtl-c-expr-with-estate): New fn.
-+ (rtl-c-expr-parsed,rtl-c-expr): New fns.
-+ (-rtl-c-get): Rename from rtl-c-get.
-+ (rtl-c-get): New fn for getter logging.
-+
-+2000-07-28 Ben Elliston <bje@redhat.com>
-+
-+ * NEWS: Update.
-+
-+2000-07-25 Ben Elliston <bje@redhat.com>
-+
-+ * doc/credits.texi (Credits): Add Frank Eigler.
-+
-+2000-07-24 Dave Brolley <brolley@redhat.com>
-+
-+ * opc-itab.scm (gen-insn-opcode-table): Initialize the first element
-+ fully.
-+ * desc.scm (gen-attr-table-defn): Initialize all elements fully.
-+ (<keyword>): Initialize all elements fully.
-+ * desc-cpu.scm (-gen-isa-table-defns): Initialize the last element
-+ fully.
-+ (-gen-mach-table-defns): Ditto.
-+ (-gen-ifld-defns): Ditto.
-+ (-gen-operand-table): Ditto.
-+ (-gen-insn-table): Ditto.
-+ (-gen-cpu-open): Nothing to do for the mach table.
-+
-+2000-07-13 Ben Elliston <bje@redhat.com>
-+
-+ * doc/version.texi (UPDATED): Update.
-+
-+2000-07-05 Ben Elliston <bje@redhat.com>
-+
-+ * configure.in (AC_PATH_PROG): Remove.
-+ * configure: Regenerate.
-+ * Makefile.am (GUILE): Locate guile dynamically.
-+ * Makefile.in: Regenerate.
-+ * doc/Makefile.in: Likewise.
-+
-+2000-07-03 Ben Elliston <bje@redhat.com>
-+
-+ * desc-cpu.scm (cgen-desc.c): Include "libiberty.h".
-+ * opc-itab.scm (cgen-opc.c): Likewise.
-+
-+2000-06-28 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * rtl.scm (-rtx-traverse-locals): Correct call to `symbol?' for
-+ guile 1.4 compatibility.
-+ (rtx-env-dump): Comment out buggy display calls.
-+
-+2000-06-15 matthew green <mrg@redhat.com>
-+
-+ * opc-itab.scm (-gen-ifmt-table-1): Add extra braces to pacify GCC.
-+
-+2000-06-14 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * Makefile.in: Regenerated.
-+
-+ * desc-cpu.scm (gen-ifld-decls): Exclude derived ifields.
-+ (gen-ifld-defns): Ditto.
-+ * pgmr-tools.scm (pgmr-pretty-print-insn-format): Ditto.
-+ * rtl.c (rtl-finish!): Ditto.
-+ * opc-itab.scm (-gen-ifield-decls): Ditto.
-+ * opcodes.scm (gen-switch): Exclude derived operands.
-+ * operand.scm (op-iflds-used): Expand derived operands.
-+ (hw-index-derived): New dummy function to create dummy object.
-+ (-derived-operand-parse): Fix mode arg passed to <derived-operand>
-+ constructor. Set object's hw-name and index fields.
-+ (-anyof-merge-subchoices): Set instance object's index also.
-+ (-anyof-name): New helper function.
-+ (anyof-merge-semantics): Correct replacement of operand names in
-+ anyof instance.
-+ (op-ifield): Tolerate derived-operands and their funny indices better.
-+ * ifield.scm (ifld-known-values): Expand derived ifields.
-+ (non-multi-ifields, non-derived-ifields): New utility functions.
-+ (ifld-decode-mode): Tolerate objects with unbound decode field.
-+ * iformat.scm (compute-insn-length): Expand derived ifields.
-+ (compute-insn-base-mask): Ditto.
-+ * insn.scm (insn-base-ifields): Remove.
-+ (<insn>): Add iflds-values entry to cache ifld-base-ifields values.
-+ (insn-value): Call ifld-base-ifields and ifld-constant? instead.
-+ * mach.scm (arch-analyze-insns!): Exclude multi-insns.
-+ * sem-frags.scm (sim-sfrag-analyze-insns!): Ditto.
-+ (-frag-test-data): Ditto.
-+ * sid-cpu.scm (cgen-write.cxx,-gen-sem-switch): Ditto.
-+ (-gen-sem-switch-engine); Ditto.
-+ * sid-model.scm (-gen-model-insn-fns, -gen-model-timing-table): Ditto.
-+ * sid-decode.scm (cgen-decode.h, cgen-decode.cxx): Ditto.
-+ (-gen-record-args): Tolerate unbound op-ifield.
-+ * sid.scm (<derived-operand> cxmake-get): New sketch implementation.
-+ (-gen-arch-model-decls, scache-engine-insns, pbb-engine-insns):
-+ Exclude multi-insns.
-+ * sim-decode.scm (cgen-decode.h, cgen-decode.cxx): Ditto.
-+ * utils-sim.scm (op-extract?): Handle derived operands.
-+
-+ * gas-test.scm (cgen-build.sh): Quote '*' chars printed by objdump.
-+ * semantics.scm (-build-operand!): Handle 'DFLT case during parsing.
-+ * hardware.scm (hardware-for-mode): New function.
-+
-+ * insn.scm (filter-harmlessly-ambiguous-insns): New function for
-+ cleaning up decode tables.
-+ (mask-superset?): Little helper function for above.
-+ * decode.scm (-build-decode-table-entry): Call it.
-+ (-opcode-slots): Add some more tracing.
-+ * arm.cpu: Disable decode-splits construct due to implementation
-+ conflict with `filter-harmlessly-ambiguous-insns'
-+
-+ * decode.scm (-population-top-few): New function for better decode
-+ bit generation. Includes minor helper functions.
-+ (decode-get-best-bits): Call it instead.
-+ (OLDdecode-get-best-bits): Renamed previous version of above.
-+
-+
-+2000-06-13 Ben Elliston <bje@redhat.com>
-+
-+ * configure.in: Use AC_EXEEXT with Cygnus mode. Remove AC_ARG_WITH
-+ for the Guile library directory.
-+ * configure: Regenerate.
-+ * Makefile.in, doc/Makefile.in: Regenerate.
-+
-+ * Makefile.in, doc/Makefile.in: Regenerate.
-+ * configure.in: Remove unnecessary tests. Move to version 1.0.
-+ * acconfig.h, config.in: Remove.
-+ * configure, aclocal.m4: Regenerate.
-+ * doc/stamp-vti, doc/version.texi: Likewise.
-+ * AUTHORS: New file.
-+
-+2000-06-07 Ben Elliston <bje@redhat.com>
-+
-+ * fixup.scm (symbol-bound?): Reduce debugging output.
-+
-+2000-06-02 matthew green <mrg@redhat.com>
-+
-+ * insn.scm (insn-base-ifields): Returns all the instruction fields for
-+ a given instruction, replacing derived fields with their subfields.
-+ (insn-value): Use `insn-base-ifields' to find all constant values.
-+ (multi-insn-instantiate!): Comment some debug messages.
-+
-+2000-06-01 Ben Elliston <bje@redhat.com>
-+
-+ * doc/rtl.texi (Expressions): Document a hazard with the choice of
-+ symbol names used in a (c-call ..) rtx.
-+
-+ * sim-test.scm (build-test-set): Return (()) for an instruction
-+ with no operands, so it too is included in the generated test set.
-+
-+2000-05-31 Ben Elliston <bje@redhat.com>
-+
-+ * Makefile.am (gas-test): Ensure $(ISA) is not empty.
-+ (sim-test): Likewise.
-+ * Makefile.in: Regenerate.
-+
-+2000-05-30 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * read.scm (-cgen): In debugging mode (-b), ask guile for untruncated
-+ stack traceback, in an order that resembles gdb's `bt'.
-+
-+2000-05-24 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * desc-cpu.scm (-gen-hash-defines): Use ifmt-ifields again.
-+ * opc-itab.scm (-gen-ifmt-table-1): Ditto.
-+ * gas-test.scm (gas-test-analyze!, cgen-build.sh): Filter out
-+ multi insns.
-+ * ifield.scm (multi-ifield): Define workable field-mask and field-value
-+ virtual functions.
-+ (ifld-base-ifields): New routine to replace ifmt-expanded-ifields.
-+ * iformat.scm (ifmt-expanded-ifields): Gone.
-+ (ifields-base-ifields): New function. Call ifld-base-ifields for real
-+ work.
-+ (-ifmt-lookup-ifmt!): Use it to expand derived/multi combos in new
-+ ifmt entries.
-+
-+ * opcodes.scm (multi-ifield gen-extract): Correct spacing in generated
-+ code.
-+
-+2000-05-23 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * sid.scm (with-any-profile?): New function clone.
-+
-+2000-05-19 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * utils-gen.scm (gen-multi-ifld-extract): Fix decode hook for sim.
-+
-+2000-05-18 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * ifield.scm (-multi-ifield-parse): Add encode/decode args.
-+ (-multi-ifield-read): Parse them.
-+ (define-full-multi-ifield): Pass #f/#f as defaults for them.
-+ * opcodes.scm (multi-ifield gen-insert): Add encode hook.
-+ (multi-ifield gen-extract): Add decode hook.
-+ * utils-gen.scm (gen-multi-ifld-extract): Add decode hook for sim.
-+
-+ * insn.scm (syntax-break-out): More correctly handle \-escaped
-+ syntax characters.
-+ (syntax-make-elements): Ditto.
-+ * opc-itab.scm (compute-syntax): Ditto.
-+
-+2000-05-17 Ben Elliston <bje@redhat.com>
-+
-+ * gas-test.scm (cgen-build.sh): Log the correct script filename.
-+
-+2000-05-15 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * gas-test.scm (build-test-set): Return (()) for an instruction
-+ with no operands, so it too is included in the generated test set.
-+
-+2000-05-15 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * desc-cpu.scm (-gen-hash-defines): Define CGEN_ACTUAL_MAX values for
-+ IFMT_OPERANDS and SYNTAX_BYTES.
-+
-+2000-05-15 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * sim.scm (with-any-profile?): New function.
-+ * utils-sim.scm (-sfmt-contents): Use above instead of `with-profile?'
-+ to decide whether or not to include profiling counters.
-+
-+2000-05-10 Frank Ch. Eigler <fche@redhat.com>
-+
-+ Fuller derived-operand support for opcodes.
-+ * insn.scm (non-multi-insns): New filter to oppose `multi-insns'.
-+ * desc-cpu.scm (-define-hash-defines): Compute CGEN_MAX_SYNTAX_BYTES.
-+ Correctly compute ..._IFMT_OPERANDS. Omit useless ..._INSN_OPERANDS.
-+ (gen-operand-table): Omit derived- and anyof- operands from table.
-+ (gen-insn-table): Omit multi-insns from table.
-+ * iformat.scm (ifmt-expanded-fields): New function to expand
-+ subfields of derived-ifields.
-+ (ifmt-compute!): Ignore remaining multi-insns.
-+ * mach.scm (isa-min-insn-bitsize, isa-max-insn-bitsize): Ignore
-+ multi-insns.
-+ * opc-itab.scm (-gen-ifmt-table-1): Use ifmt-expanded-ifields.
-+ (-gen-insn-enum, -gen-insn-opcode-table): Ignore multi-insns.
-+ * opcodes.scm (derived-operand): Define abort()ing gen-insert,
-+ gen-extract, gen-fget, gen-fset, gen-parse, gen-print functions.
-+ (gen-switch): Omit anyof-operands.
-+ * operand.scm (-anyof-syntax): New function.
-+ (-anyof-merge-syntax): Call it.
-+ * utils.scm (collect): New idiomatic function.
-+
-+2000-05-10 Ben Elliston <bje@redhat.com>
-+
-+ * m68k.cpu: New file (work in progress).
-+
-+2000-05-05 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * Makefile.am (all-local): New target. Create stamp-cgen.
-+ * Makefile.in: Regenerated.
-+ * doc/Makefile.in: Regenerated.
-+
-+2000-04-26 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * operand.scm (-operand-g/setter-syntax): Correct off-by-one error.
-+ (-operand-parse-setter): Ditto.
-+ * utils-sim.scm (needed-iflds): Store ifield (index) in argbuf, even
-+ for CACHE-ADDR operands.
-+ * sid-decode.scm (-gen-record-args): Remove newly duplicated extract
-+ trace entries. Widen byte-wide values for printing.
-+ * sid.scm (-op-gen-set-trace): Enhance result trace with op indices.
-+ Widen byte-wide values for printing. Hexify memory addresses.
-+
-+2000-04-23 matthew green <mrg@redhat.com>
-+
-+ * m32r.cpu: Fix a typo.
-+
-+Fri Apr 21 22:18:48 2000 Jim Wilson <wilson@cygnus.com>
-+
-+ * ia64.cpu (define-model): Change merced to Itanium.
-+ (f-qp): Change quilifying to qualifying.
-+ (movbr_ph, movbr_pvec): Delete.
-+ (I-I21): Delete uses of movbr_ph and movbr_pvec.
-+
-+2000-04-07 Ben Elliston <bje@redhat.com>
-+
-+ * doc/porting.texi (Building a simulator test suite): Clarify
-+ where generated test cases are placed.
-+
-+2000-04-07 Ben Elliston <bje@redhat.com>
-+
-+ * Makefile.am (gas-test): Remove dependency on `cgen'.
-+ (sim-test): Ditto.
-+ * Makefile.in: Regenerate.
-+
-+2000-04-04 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * hardware.scm (<hw-pc> parse): Allow user to set type for pc register.
-+ * mode.scm (mode-finish!): Add placeholder code for mach-dependent
-+ type reconfiguration.
-+ * utils-sim.scm (-sfmt-contents): Add profile-counters only if
-+ with-profile?.
-+
-+2000-03-30 Ben Elliston <bje@redhat.com>
-+
-+ * doc/rtl.texi (Enumerated constants): Add concept index entries.
-+
-+2000-03-24 Ben Elliston <bje@redhat.com>
-+
-+ * Makefile.am (stamp-cgen): Reinstate target.
-+ * Makefile.in: Regenerate.
-+
-+2000-03-22 Ben Elliston <bje@redhat.com>
-+
-+ * slib/ppfile.scm: Remove; unused.
-+ * slib/defmacex.scm: Likewise.
-+
-+2000-03-21 Ben Elliston <bje@redhat.com>
-+
-+ * doc/internals.texi (Source file overview): Document.
-+
-+ * Makefile.am (GUILEDIR): Remove.
-+ (CGEN): Ditto. Callers use $(GUILE) instead.
-+ (GUILEFLAGS): Ditto.
-+ (CGENFILES): Ditto.
-+ (APPDESCFILES): Ditto.
-+ (OPCODESFILES): Ditto.
-+ (SIMFILES): Ditto.
-+ (pkgdata_SCRIPTS): Ditto.
-+ (stamp-cgen): Remove target.
-+ * Makefile.in: Regenerate.
-+
-+ * configure.in: Remove header and library tests.
-+ * configure: Regenerate.
-+ * config.in: Likewise.
-+
-+2000-03-20 Ben Elliston <bje@redhat.com>
-+
-+ * read.scm: Cease loading "hob-sup.scm".
-+ * utils.scm: Inherit the fastcall family of procedures (for now).
-+ * hob-sup.scm: Remove.
-+
-+2000-03-20 Ben Elliston <bje@redhat.com>
-+
-+ * configure.in (AC_OUTPUT): Do not emit .gdbinit.
-+ * configure: Regenerate.
-+ * gdbinit.in: Remove.
-+
-+2000-03-17 Ben Elliston <bje@redhat.com>
-+
-+ * Makefile.am (CGEN): Use guile, not cgen.
-+ (CGENCFLAGS, LIBIBERTY, INCLUDES): Remove.
-+ (bin_PROGRAMS, cgen_SOURCES): Likewise.
-+ (CGENFILES): Fold CGEN_HOB_INPUT_FILES and CGEN_NOHOB_FILES.
-+ (HOBBIT_INPUT_FILES, HOBBIT_OUTPUT_FILE): Remove.
-+ (HOB_OBJS): Likewise.
-+ (CGEN_HOB_SRC, CGEN_HOB_OBJ): Likewise.
-+ (CGENOBJS): Likewise.
-+ (cgen_DEPENDENCIES, cgen_LDFLAGS, cgen_LDADD): Likewise.
-+ (hobbit, hobbit.o, hobbit.c): Remove targets.
-+ (cos.o, cgen.o, cgen-gh.o, hob-sup.o): Likewise.
-+ (CLEANFILES): Update.
-+ * acconfig.h (WITH_HOBBIT): Remove.
-+ * configure.in: Do not test for 3 arg scm_make_vector. Remove
-+ option --with-cgen-hobbit.
-+ * cos.h, cos.c, hob-main.c, hob-sup.c, hob-sup.h, hob.sh: Remove.
-+ * cgen-gh.h, cgen-gh.c, cgen-hob.scm, cgen.c: Likewise.
-+ * hobbit.c, hobbit.h, hobbit.scm: Likewise.
-+ * hobscmif.h, hobslib.scm, scmhob.h: Likewise.
-+ * Makefile.in: Regenerate.
-+ * config.in: Likewise.
-+ * aclocal.m4: Likewise.
-+ * configure: Likewise.
-+ * README (Hobbit support): Remove.
-+ * doc/internals.texi (Conventions): Do not mention Hobbit.
-+ * doc/porting.texi (Supported Guile versions): Likewise.
-+
-+2000-03-16 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * sid-cpu.scm (-gen-sem-switch-engine): Adjust calling &
-+ callback convention to new sid sidutil::basic_cpu code.
-+ (-gen-sfrag-engine-fn): Ditto.
-+ * sid.scm (-create-virtual-insns!): Ditto.
-+ (-hw-gen-set-quiet-pc): Mark delay slot execution specially in pbb
-+ mode.
-+ (cxmake-skip): Implement properly for pbb mode.
-+
-+2000-03-03 Ben Elliston <bje@redhat.com>
-+
-+ * doc/internals.texi: New file.
-+
-+2000-02-29 Ben Elliston <bje@redhat.com>
-+
-+ * doc/rtl.texi (Derived operands): Remove unnecessary footnote.
-+ * doc/porting.texi: Formatting tweaks.
-+
-+2000-02-25 Nick Clifton <nickc@cygnus.com>
-+
-+ * desc-cpu.scm (*_cgen_cpu_open): Initialise signed_overflow_ok_p
-+ field.
-+
-+Thu Feb 24 14:09:01 2000 Doug Evans <devans@seba.cygnus.com>
-+
-+ * operand.scm (<anyof-operand>,make!): Initialize mode-name, not
-+ mode.
-+
-+2000-02-23 Andrew Haley <aph@cygnus.com>
-+
-+ * m32r.cpu (pcmpbz): Make pcmpbz a special (i.e. hidden)
-+ instruction.
-+
-+2000-02-24 Ben Elliston <bje@redhat.com>
-+
-+ * doc/rtl.texi (Derived operands): Add some cindex entries.
-+
-+2000-02-23 Ben Elliston <bje@redhat.com>
-+
-+ * ia32.cpu (dndo): Move general purpose macro from here ..
-+ * simplify.inc (dndo): .. to here.
-+
-+2000-02-18 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * arm.cpu (h-tbit): Add c-call setter function.
-+ (h-mbits): Ditto.
-+
-+2000-02-17 Frank Ch. Eigler <fche@redhat.com>
-+
-+ * sem-frags.scm (-frag-hash-compute!): Add appstuff arg for traversal.
-+ (-frag-cost-compute!): Ditto.
-+ * utils.scm (copyright-cygnus): Add Y2K.
-+ * sid-cpu.scm (@prefix@_pbb_run): Add unsigned& argument.
-+
-+2000-01-25 Nick Clifton <nickc@cygnus.com>
-+
-+ * desc-cpu.scm (@arch@_cgen_cpu_open): Add code to initialise
-+ flags field of the CGEN_CPU_TABLE structure.
-+
-+Sun Dec 12 14:20:36 1999 Doug Evans <devans@seba.cygnus.com>
-+
-+ * operand.scm (<anyof-instance>): Renamed from <anyof-value>.
-+ All references updated.
-+
-+Tue Nov 30 11:06:22 1999 Doug Evans <devans@seba.cygnus.com>
-+
-+ * ia32.cpu: Rewrite addressing mode support.
-+
-+ * ifield.scm (<ifield>): New member `follows'.
-+ (ifld-known-values): New proc.
-+ (<ifield>): New method set-word-offset!.
-+ (ifld-set-word-offset!): New proc.
-+ (ifld-new-word-offset): New proc.
-+ (<ifield>): New method next-word.
-+ (<multi-ifield>): New method next-word.
-+ (ifld-next-word): New proc.
-+ (ifld-precedes?): New proc.
-+ (-ifield-parse): New args word-offset,word-length,follows.
-+ All callers updated. Handle CISC-style vs RISC-style ifields.
-+ (-ifield-read): Recognize word-offset,word-length,follows specs.
-+ (-ifld-parse-follows): New proc.
-+ (-multi-ifield-make-default-insert): New proc.
-+ (-multi-ifield-make-default-extract): New proc.
-+ (-multi-ifield-parse): Provide default values for insert,extract
-+ handlers if not specified.
-+ (<derived-ifield>): New class.
-+ (derived-ifield?): New predicate.
-+ (ifld-derived-operand?): New predicate.
-+ (f-anyof): New global.
-+ (ifld-anyof?,ifld-anyof-operand?): New predicates.
-+ (f-derived,ifld-derived?): Delete.
-+ (ifield-builtin!): Delete init of f-derived. Init f-anyof.
-+ * insn.scm (-sub-insn-ifields): New proc.
-+ (-sub-insn-make!): New proc.
-+ (multi-insn-instantiate!): Provide initial implementation.
-+ (-insn-parse): If insn contains "anyof" operands, create a
-+ <multi-insn> object instead of a plain <insn>.
-+ (-parse-insn-format-symbol): Rewrite derived operand handling.
-+ Add anyof operand handling.
-+ (-parse-insn-format-ifield-spec): Rewrite.
-+ (-parse-insn-format-operand-spec): Delete.
-+ (-parse-insn-format-list): Delete support for `(operand value)'.
-+ (anyof-operand-format?): Replaces derived-operand-format?.
-+ * operand.scm (-operand-parse-getter): Improve error messages.
-+ (-operand-parse-setter): Ditto.
-+ (<derived-operand>): New members args,syntax,base-ifield,encoding,
-+ ifield-assertion.
-+ (<anyof-operand>): Change baseclass from <derived-operand> to
-+ <operand>. Delete member values. New members base-ifield,choices.
-+ (anyof-operand?): New predicate.
-+ (-derived-parse-encoding,-derived-parse-ifield-assertion): New procs.
-+ (-derived-operand-parse): Rewrite.
-+ (-derived-operand-read): Rewrite.
-+ (-anyof-parse-choice): New proc.
-+ (-anyof-operand-parse): Rewrite.
-+ (-anyof-operand-read,define-anyof-operand): New procs.
-+ (<anyof-value>): Rewrite.
-+ (-anyof-initial-known): New proc.
-+ (anyof-satisfies-assertions?): New proc.
-+ (-anyof-merge-syntax,-anyof-merge-encoding): New procs.
-+ (-anyof-merge-getter,-anyof-merge-setter): New procs.
-+ (-anyof-merge-semantics,-anyof-merge-ifield-assertion): New procs.
-+ (-anyof-merge-subchoices,-anyof-all-subchoices): New procs.
-+ (-anyof-value-from-derived): New proc.
-+ (-anyof-all-choices-1,anyof-all-choices): New procs.
-+ (operand-init!): Create define-anyof-operand reader command.
-+
-+ * insn (syntax-break-out): Take syntax as argument instead of insn.
-+ All callers updated.
-+ (syntax-make): Move here, from ???.
-+
-+ * types.scm (<bitrange>): Rename accessors from bitrange:foo to
-+ bitrange-foo. All uses updated.
-+ (bitrange-next-word): New proc.
-+
-+ * semantics.scm (-solve-expr-fn,rtx-solve): New procs.
-+
-+ * rtl.scm (rtx-canonicalize): Provide initial implementation.
-+ (rtx-make-const,rtx-make-enum): New procs.
-+ (rtx-arg1,rtx-arg2): Renamed from -rtx-arg[12]. All callers updated.
-+ (rtx-mem-addr,rtx-mem-sel): New procs.
-+ (rtx-change-address): New proc.
-+ (rtx-make-ifield,rtx-make-operand,rtx-make-local): New proc.
-+ (rtx-make-set,rtx-single-set?): New procs.
-+ (rtx-combine): New proc.
-+
-+ * rtl.scm (rtx-traverse): New arg `appstuff'. All callers updated.
-+ (rtx-traverse-with-locals): Ditto.
-+ (-rtx-traverse,-rtx-traverse-*): Ditto.
-+
-+ * rtl.scm (define-subr): New proc.
-+ (rtl-init!): Create reader command `define-subr'.
-+
-+ * cos.c (_object_mi_p): Ensure argument is an object.
-+ (indent): New function.
-+ (_object_print_elms): Add pretty-printing support.
-+ (_object_print): Ditto.
-+
-+ * hobbit.scm (*reckless-s->c-fun-table*): Add fastcall7.
-+ (*floats-s->c-fun-table*): Ditto.
-+ * hobbit.c,hobbit.h: Rebuild.
-+ * hob-sup.c (fastcall7): New proc.
-+ * hob-sup.h (fastcall7): Declare.
-+ * hob-sup.scm (fastcall7): New macro.
-+
-+ * mach.scm (<arch>): New member subr-list.
-+ (current-subr-list,current-subr-add!,current-subr-lookup): New procs.
-+ (arch-finish!): Reverse recorded subr list.
-+
-+ * read.scm (debug-env): New global.
-+ (debug-var-names,debug-var,debug-repl-env): New procs.
-+ (debug-repl): Rewrite. New arg `env-list'. All callers updated.
-+ (debug-quit): Renamed from `continue'.
-+
-+ * simplify.inc (dsmf): New pmacro.
-+
-+ * utils.scm (plus-scan): New proc.
-+ (split-bits): Rewrite.
-+ (split-value): New proc.
-+
-+1999-10-13 Doug Evans <devans@casey.cygnus.com>
-+
-+ * doc/Makefile.am (DOCFILES): Add notes.texi.
-+ * doc/Makefile.in: Rebuild.
-+
-+1999-10-11 Doug Evans <devans@casey.cygnus.com>
-+
-+ * ifield.scm (ifld-derived?): New proc.
-+ (f-derived): New global.
-+ (ifield-builtin!): Create ifield f-derived.
-+ (<multi-insn>): New class.
-+ (multi-insn?): New predicate.
-+ (multi-insn-instantiate!): New proc.
-+ (-insn-parse): Create <multi-insn> objects for insns with derived
-+ ifields.
-+ (-parse-insn-format-symbol): Handle derived ifields.
-+ (-parse-insn-format-ifield-spec): New proc.
-+ (-parse-insn-format-operand-spec): New proc.
-+ (-parse-insn-format-list): Simplify.
-+ (-parse-insn-format): No longer allow (ifield-object value) spec.
-+ (derived-operand-format?): New proc.
-+ (insn-alias?): New proc.
-+ (non-alias-insns): Rewrite.
-+ (insn-real?): Renamed from real-insn?, all callers updated.
-+ (virutal-insns): Rewrite.
-+ (multi-insns): New proc.
-+ * mach.scm (arch-analyze-insns!): Instantiate multi-insns if present.
-+ * operand.scm (op-ifield): Renamed from op:ifield, all callers updated.
-+ Return #f if operand doesn't have an index or if index is not an
-+ ifield.
-+ (hw-index-anyof): New proc.
-+ (-operand-parse): Allow integer indices.
-+ (<derived-operand>): New class.
-+ (derived-operand?): New predicate.
-+ (<anyof-operand>): New class.
-+ (<anyof-value>): New class.
-+ (-anyof-parse-value,-anyof-operand-parse): New procs.
-+ (-derived-operand-parse,-derived-operand-read): New procs.
-+ (define-derived-operand,define-full-derived-operand): New procs.
-+ (operand-init!): New reader command define-derived-operand.
-+
-+ * utils.scm (list-take): Handle negative amount.
-+ (element?): Rewrite.
-+
-+1999-10-10 Doug Evans <devans@casey.cygnus.com>
-+
-+ * dev.scm: quick-utils.scm renamed to ~/.cgenrc.
-+
-+1999-10-04 Richard Henderson <rth@cygnus.com>
-+
-+ * ia64.cpu: Checkpoint.
-+
-+1999-09-29 Doug Evans <devans@casey.cygnus.com>
-+
-+ * sim-cpu.scm (-gen-semantic-fn-table): Virtual insns are always valid.
-+
-+ * sim.scm (sim-finish!,x-invalid): Always set pc. Set vpc based on
-+ default-insn-bitsize. Pass vpc to sim_engine_invalid_insn.
-+
-+Wed Sep 29 14:39:39 1999 Dave Brolley <brolley@cygnus.com>
-+
-+ * sim.scm (sim-finish!): Don't call sim_io_error for invalid insn. Use
-+ PC returned by sim_engine_invalid_insn.
-+
-+1999-09-28 Doug Evans <devans@casey.cygnus.com>
-+
-+ * ia32.cpu: New file.
-+
-+1999-09-25 Doug Evans <devans@casey.cygnus.com>
-+
-+ * utils.scm (bit-set?): Fix off by one error.
-+
-+ * rtl-c.scm (s-sequence): Fix non-void-mode result output.
-+
-+ * rtl.scm (hw): Check for valid hardware element before trying to
-+ get its mode.
-+
-+ * arm.cpu (arm7f cpu): Renamed from arm. All users updated.
-+ * arm7.cpu (bx): Fix name of target address operand in assembler spec.
-+ (*): arm_compute_operand2_foo renamed to compute_operand2_foo.
-+ * thumb.cpu (*): arm_compute_operand2_foo renamed to
-+ compute_operand2_foo.
-+
-+ * cgen-sid.scm (sim_arguments): Add support for building defs.h.
-+ * sid.scm (-hw-gen-set-quiet-pc): Handle #:delay modifier.
-+ Call delayed_branch/branch methods instead of assigning to `vpc'.
-+ (<hw-pc>,cxmake-skip): Call skip method.
-+ (-gen-hw-selector): Call rtl-c++ instead of rtl-c.
-+ (<pc>,cxmake-skip): Ditto.
-+ (-create-virtual-insns!): Ditto.
-+ (op:read): Call estate-make-for-normal-c++ instead of estate-...-c.
-+ (op:write): Ditto.
-+ (op:record-profile): Specify #:output-language "c++".
-+ * sid-cpu.scm (-gen-insn-attr-decls): Rename @cpu@_insn_attr to
-+ @arch@_insn_attr.
-+ (cgen-desc.h): Use @arch@ namespace instead of @cpu@.
-+ Define enums here.
-+ (-gen-reg-access-defns): Use rtl-c++ instead of rtl-c.
-+ (gen-semantic-code): Ditto.
-+ (-gen-sem-case,-gen-sfrag-code): Ditto.
-+ (-gen-hardware-types): Delete class @cpu@_cpu_base.
-+ (cgen-cpu.h): File is now #included by main cpu class, rather than
-+ subclassing.
-+ (cgen-defs.h): New proc.
-+ (-gen-scache-semantic-fn): Change result type to sem_status.
-+ New local `status'. Call done_cti_insn/done_insn method at end.
-+ (cgen-semantics.cxx): Include @cpu@.h instead of @arch@-main.h,
-+ cgen-ops.h.
-+ (cgen-sem-switch.cxx): Ditto.
-+ * sid-decode.scm (-gen-idesc-decls): Update return type of
-+ @prefix@_sem_fn.
-+ (cgen-decode.h): Add using namespace @arch@.
-+ (cgen-decode.cxx): Include @cpu@.h instead of @arch@-main.h.
-+
-+ * rtl-c.scm (<rtl-c-eval-state>): New member output-language.
-+ (estate-output-language-c?,estate-output-language-c++?): New procs.
-+ (<rtl-c-eval-state>,vmake!): Handle #:output-language.
-+ (estate-make-for-normal-rtl-c++): New proc.
-+ (rtl-c++-parsed,rtl-c++): New proc.
-+ (s-c-call): Invoke cpu class method if c++.
-+ (join): Use s-c-raw-call.
-+
-+ * rtl-c.scm (subword): Don't pass current_cpu to SUBWORD.
-+ (nop): Rewrite.
-+
-+ * rtl-c.scm (delay): Mark the sequence as #:delay'd.
-+ * rtl.scm (<eval-state>): New member `modifiers'.
-+ (<eval-state>,vmake!): Handle #:modifiers.
-+ (estate-with-modifiers): New proc.
-+
-+ * rtl.scm (rtx-side-effects?): New proc.
-+ (rtx-canonical-bool): Don't change expr if it has side effects.
-+ * semantics.scm (-simplify-expr-fn): Handle exprs with side-effects
-+ better.
-+
-+1999-09-23 Doug Evans <devans@casey.cygnus.com>
-+
-+ * sim.scm (gen-scache-type): Fix typo in last patch.
-+
-+Tue Sep 21 17:12:55 1999 Dave Brolley <brolley@cygnus.com>
-+
-+ * sim.scm (gen-scache-type): Add last_insn_p flag for parallel support.
-+
-+1999-09-05 Doug Evans <devans@casey.cygnus.com>
-+
-+ * sid.scm (<hw-pc>,cxmake-skip): New method.
-+ (<pc>,cxmake-skip): New method.
-+
-+ * decode.scm (decode-build-table): Delete args startbit,index-list.
-+ All callers updated.
-+ * utils-sim.scm (gen-decoder): Delete args startbit,index-list.
-+ All callers updated.
-+ * sim-decode.scm (-gen-decode-fn): Always pass 0 for startbit
-+ to decode-get-best-bits.
-+ * sid-decode.scm (-gen-decode-fn): Ditto.
-+
-+ * hardware.scm (hw-bits): New proc.
-+ (-hw-parse): New arg layout. All callers updated.
-+ (define-full-hardware): New arg layout. All callers updated.
-+ (-hw-validate-layout): New proc.
-+ (-hw-create-[gs]etter-from-layout): New procs.
-+ (<hw-register>,parse!): Handle layout spec.
-+ * types.scm (type-bits): New proc.
-+
-+ * sem-frags.scm (-frag-cost-compute!): Fix calculation of
-+ UNARY, BINARY, TRINARY rtxs.
-+
-+ * attr.scm (<enum-attribute>,parse-value): Allow strings.
-+ * enum.scm (parse-enum-vals): Use reverse! instead of reverse.
-+ Support '- as "unused spot" indicator.
-+
-+1999-09-03 Doug Evans <devans@casey.cygnus.com>
-+
-+ * pgmr-tools.scm (pgmr-pretty-print-insn-format): Fix typo.
-+
-+1999-09-02 Doug Evans <devans@casey.cygnus.com>
-+
-+ * rtx-funcs.scm (subword): Fix mode spec of `value'.
-+
-+ * rtl.scm (-rtx-traverse-operands): Fix debugging message
-+ construction.
-+ (tstate-make): New arg `depth'. All callers updated.
-+ (tstate-depth,tstate-set-depth!): New procs.
-+ (tstate-incr-depth!,tstate-decr-depth!): New procs.
-+ (-rtx-traverse-operands): Indent debugging output by traversal depth.
-+ (-rtx-traverse): Ditto. Keep track of traversal depth.
-+
-+1999-09-01 Doug Evans <devans@casey.cygnus.com>
-+
-+ * sim-decode.scm (-gen-decoder+supporting cast): Move to utils-sim.scm.
-+ * sid-decode.scm (-gen-decoder+supporting cast): Ditto.
-+ * utils-sim.scm: Decoder generator support moved here.
-+ (-decode-equiv-entries?,-decode-sort-entries): New procs.
-+ (-gen-decoder-switch): Sort entries for more fall-throughs.
-+
-+ * Makefile.am (gas-test,sim-test): Specify ISA when invoking cgen.
-+ * Makefile.in: Rebuild.
-+ * sim-test.scm (build-sim-testcase): Add logging message.
-+ * dev.scm (cload): Recognize SIM-TEST application.
-+ (load-stest): Set APPLICATION to SIM-TEST.
-+
-+ * desc-cpu.scm (-gen-hash-defines): Add \n to output.
-+
-+ * ifield.scm (-ifield-parse): Allow bit numbers up to 127.
-+ * mach.scm (-isa-parse): Allow insn bitsizes from 8 to 128.
-+ * mode.scm (mode-make-int,mode-make-uint): Allow values up to 64 bits.
-+
-+ * insn.scm (syntax-break-out): Handle ${foo}.
-+
-+Sun Aug 29 11:11:15 1999 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * Makefile.am (noinst_PROGRAMS,noinst_LIBRARIES): Delete.
-+ (bin_PROGRAMS): Define.
-+ (CGEN_HOB_INPUT_FILES): Remove $(srcdir)/.
-+ (cgen-hob.c): Prepend $(srcdir)/ here.
-+ (APPDESCFILES,OPCODESFILES,SIMFILES,pkgdata_SCRIPTS): Define.
-+ (libcpu_a_SOURCES): Delete.
-+ (cgen_DEPENDENCIES,cgen_LDADD): Rewrite.
-+ (CGEN_HOB_OBJ,CGENOBJS): New variables.
-+ * configure.in (LIBS): Replace -Wl,-rpath with -R.
-+ Add AC_CHECK_LIB(guile,main).
-+ * Makefile.in: Rebuild.
-+ * doc/Makefile.in: Rebuild.
-+ * aclocal.m4: Rebuild.
-+ * config.in: Rebuild.
-+ * configure: Rebuild.
-+
-+1999-08-28 Doug Evans <devans@casey.cygnus.com>
-+
-+ Rename rtx functions from name: to name, accept optional leading
-+ modifier and mode.
-+ VM -> VOID, DM -> DFLT, use DFLT instead of VM for default mode.
-+ * attr.scm (-attr-eval): Update.
-+ * hardware.scm (hw-mode-ok?): Rename arg mode to new-mode-name.
-+ (<hw-register>,mode-ok?): Disallow VOID.
-+ (<hw-immediate>,mode-ok?): Disallow VOID.
-+ (<hw-address>,mode-ok?): Disallow VOID.
-+ * mode.scm (mode-name?): New proc.
-+ (VOID): Renamed from VM.
-+ (DFLT): Renamed from DM.
-+ (mode-builtin!): Update.
-+ * opcodes.scm (<ifield>,gen-insert): Update.
-+ (<ifield>,gen-extract): Update.
-+ (<multi-ifield>,gen-insert,gen-extract): Update.
-+ * operand.scm (op:mode): Update.
-+ (<pc>,make!): Update.
-+ (op:new-mode): Update.
-+ (-operand-read): Update.
-+ * rtl.scm (-rtx-valid-types): Add OPTIONS, EXPLNUMMODE,
-+ NONVOIDMODE, DFLTMODE. Rename VMMODE to VOIDMODE.
-+ (def-rtx-dual-mode,define-rtx-dual-mode): Delete.
-+ (-rtx-lazy-sem-mode): Renamed from -rtx-mode. All callers updated.
-+ (rtx-make): Call -rtx-munge-mode&options.
-+ (rtx accessors): Rewrite.
-+ (rtx-pretty-name): Update.
-+ (-rtx-traverse-*): Update.
-+ (-rtx-traverse-explnummode,-rtx-traverse-nonvoidmode): New procs.
-+ (-rtx-traverse-voidmode,-rtx-traverse-dfltmode): New procs.
-+ (-rtx-make-traverse-table): Update.
-+ (-rtx-traverse-operands): Update.
-+ (-rtx-option?,-rtx-option-list?): New procs.
-+ (-rtx-munge-mode&options): New proc.
-+ (-rtx-traverse-expr): Call -rtx-munge-mode&options.
-+ (-rtx-traverse): Update.
-+ (rtx-traverse,rtx-traverse-with-locals,rtx-compile): Update.
-+ (rtx-compile-time-constant?): Update.
-+ (rtx-true?,rtx-false?,rtx-true,rtx-false): Update.
-+ (rtx-value): Update.
-+ (hw,reg,mem): Renamed from foo:. Update. All callers updated.
-+ * rtx-funcs.scm (*): Update.
-+ * rtl-c.scm (rtl-c-get): Update.
-+ (rtl-c-set-quiet,rtl-c-set-trace): Update.
-+ (s-c-call,s-c-raw-call): Update.
-+ (s-boolifop,s-convop,s-if,s-cond): Update.
-+ (s-case-vm,-gen-non-vm-case-test,s-case): Update.
-+ (-par-replace-set-dests,-par-replace-set-srcs): Update.
-+ (s-parallel,s-sequence): Update.
-+ (rtl-c-build-table): Update.
-+ * sem-frags.scm (-frag-hash-compute!): Update.
-+ (-frag-cost-compute!): Improperly handle unary,binary,trinary ops
-+ for temporary bug compatibility with previous version.
-+ (-frag-expr-locals,-frag-expr-stmts): Update.
-+ (-frag-compute-desired-frags,-frag-pick-best): Update.
-+ * semantics.scm (-simplify-expr-fn): Update.
-+ (rtx-simplify): Update.
-+ (-rtx-ref-type): Update. Account for modifiers.
-+ (-build-operand!,-build-reg-operand!,-build-mem-operand!): Update.
-+ (-build-ifield-operand!): Update.
-+ (-build-known-values): Update.
-+ (semantic-compile): Update.
-+ (-gen-reg-access-defns): Update.
-+ (gen-semantic-code,-gen-sem-case): Update.
-+ (-gen-sfrag-code,-gen-sfrag-case): Update.
-+ * sim-cpu (gen-semantic-code): Update.
-+ * sim.scm (<hw-pc>,gen-write,cxmake-skip): Update.
-+ (<hw-register>,gen-write,gen-set-macro,cxmake-get-raw): Update.
-+ (-hw-cxmake-get): Update.
-+ (<hw-memory>,cxmake-get,gen-set-quiet,gen-write): Update.
-+ (<hw-index>,cxmake-get): Update.
-+ (<operand>,gen-type,gen-read,cxmake-get): Update.
-+ (<operand>,gen-set-quiet,gen-set-trace): Update.
-+ (<pc>,cxmake-get): Update.
-+ (sim-finish!): Update.
-+ * utils-gen.scm (-gen-ifld-extract-base): Update.
-+ (-gen-ifld-extract-beyond): Update.
-+ (gen-multi-ifld-extract): Update.
-+ * sid-decode.scm (-decode-expr-ifield-values-used): Update.
-+ * sid.scm (<hw-pc>,gen-write): Update.
-+ (-gen-decode-insn-globals): Update.
-+ (-hw-cxmake-get): Update.
-+ (<hw-register>,cxmake-get-raw): Update.
-+ (<hw-memory>,cxmake-get,gen-set-quiet,gen-write): Update.
-+ (<hw-index>,cxmake-get): Update.
-+ (<operand>,gen-type,gen-read,cxmake-get): Update.
-+ (<operand>,gen-set-quiet,gen-set-trace): Update.
-+ (<pc>,cxmake-get): Update.
-+ (-create-virtual-insns!): Update.
-+ (-decode-split-build-assertion): Update.
-+ * *.cpu: Update.
-+ * simplify.inc: Update.
-+
-+1999-08-20 Doug Evans <devans@casey.cygnus.com>
-+
-+ * sim.scm (-op-gen-queued-write): Fix memory address calculation.
-+ Prefix queue function name with sim_ instead of @cpu@_.
-+
-+ * sim.scm (-with-parallel-only?): New global.
-+ (option-init!): Initialize it.
-+ (option-set!): Set it.
-+ (with-parallel-only?): New proc.
-+ * sim-decode.scm (-gen-decode-insn-globals): Don't include parallel
-+ and writeback markers if with-parallel-only.
-+ (-gen-idesc-init-fn): Update.
-+ * sim-cpu.scm (cgen-cpu.h): Don't generate struct parexec if
-+ with-generic-write.
-+
-+Wed Aug 18 15:04:30 1999 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * sim-cpu.scm (-gen-semantic-fn-table): Handle unsupported insns
-+ with the invalid insn handler.
-+
-+ * utils.scm (list-maybe-ref): New proc.
-+
-+ * mach.scm (-isa-parse): Signal error if isa wasn't specified in
-+ define-arch.
-+ (-mach-parse): Signal error if mach wasn't specified in define-arch.
-+
-+ * i960.cpu (test*-*): Delete `expr' arg.
-+ (test-op,branch-op): Update.
-+
-+1999-08-09 Doug Evans <devans@casey.cygnus.com>
-+
-+ * sim.scm (gen-reg-getter-fn,gen-reg-setter-fn): New procs.
-+ (gen-reg-access-decl): Replace `name' arg with `hw'. All callers
-+ updated.
-+ (gen-reg-access-defn): Ditto.
-+ (-gen-hw-addr): Rewrite.
-+ (-op-gen-queued-write): Rewrite.
-+ * sim-cpu.scm (-gen-cpu-reg-access-decls):
-+ (-gen-scache-semantic-fn): Handle with-generic-write.
-+ (-gen-no-scache-semantic-fn): Ditto.
-+
-+1999-08-08 Doug Evans <devans@casey.cygnus.com>
-+
-+ * utils-gen.scm (gen-define-ifmt-ifields): Tweak output.
-+
-+ * sim.scm (-with-generic-write?): New global.
-+ (option-init!): Initialize it.
-+ (option-set!): Set it.
-+ (with-generic-write?): New proc.
-+ (-gen-hw-addr): New proc.
-+ (-op-gen-queued-write): New proc.
-+ (-op-gen-set-{quiet,trace}-parallel): Use it if with-generic-write?.
-+
-+ * sim-cpu.scm (-gen-hardware-types): Output code with parallel support
-+ turned off.
-+ (-gen-sem-switch): Preserve existing with-parallel? value.
-+ (-gen-sem-parallel-switch): Ditto.
-+ (-gen-write-case): Add /indent support.
-+ (cgen-write.c): Rewrite.
-+
-+ * utils.scm (-current-print-state): New global.
-+ (make-print-state): New proc.
-+ (pstate-indent,pstate-set-indent!): New procs.
-+ (pstate-cmd?,pstate-cmd-do): New procs.
-+ (/indent): New global.
-+ (/indent-set,/indent-add): New procs.
-+ (string-write): Set -current-print-state.
-+ (-string-write): New arg pstate, all callers updated.
-+ Handle print-state commands.
-+ (-string-list-flatten): New proc.
-+ (string-list->string): Use it.
-+
-+ * sim-cpu.scm (-gen-sem-fn-name): Move here from sim-decode.scm.
-+ (-gen-sem-fn-table-entry): New proc.
-+ (-gen-semantic-fn-table): New proc.
-+ (-gen-scache-semantic-fn): Make fn static.
-+ (-gen-no-scache-semantic-fn): Ditto.
-+ (cgen-semantics.c): Define macro SEM_FN_NAME.
-+ * sim-decode.scm (-gen-decode-insn-globals): Delete FMT,TYPE,IDX,
-+ FAST,FULL. Update @cpu@_insn_sem contents.
-+ (-gen-semf-fn-name): Delete.
-+ (-gen-sem-fn-decls): Delete.
-+ (-gen-idesc-decls): Output prototypes of @cpu@_sem_init_idesc_table,
-+ @cpu@_semf_init_idesc_table.
-+ (-gen-idesc-init-fn): Update. Don't initialize pointers to semantic
-+ handlers here.
-+ (cgen-decode.h): Print sfmt enum.
-+ * sid-decode.scm (-gen-semf-fn-name): Delete.
-+ * utils-gen.scm (gen-sfmt-enum-decl): New proc.
-+
-+ * iformat.scm (sfmt-build): Rename sformats from fmt-foo to sfmt-foo.
-+ (ifmt-compute!): Ditto.
-+ * sim-decode.scm (-gen-decoder-switch): Ditto.
-+ * sid-decode.scm (-gen-decode-expr-entry): Ditto.
-+ (-gen-decoder-switch): Ditto.
-+
-+ * insn.scm (insn-virtual?): New proc.
-+
-+ * enum.scm (gen-enum-decl): Speed up, build string as list and then
-+ convert to string.
-+ * mach.scm (<arch>): attr-list is now a pair of lists.
-+ (current-attr-list): Rewrite.
-+ (current-attr-add!,current-attr-lookup): Rewrite.
-+ * sim.scm (gen-cpu-insn-enum-decl): Replace append with append!.
-+
-+1999-08-06 Richard Henderson <rth@cygnus.com>
-+
-+ * ia64.cpu: Initial checkpoint.
-+
-+1999-08-06 Doug Evans <devans@casey.cygnus.com>
-+
-+ * pmacros.scm (-pmacro-apply): Fix definition, takes only 1 arg.
-+ (pmacros-init!): Update .apply help string.
-+
-+1999-08-03 Doug Evans <devans@casey.cygnus.com>
-+
-+ * sim.scm (-hw-gen-set-quiet-pc): Update call to SEM_BRANCH_VIA_CACHE.
-+ (<hw-pc>,cxmake-skip): New method.
-+ (<pc>,cxmake-skip): New method.
-+ (-gen-argbuf-fields-union): Add branch_target to `chain' member.
-+ (gen-argbuf-type): New member `skip_count'.
-+ (sim-finish!): Update calls to @cpu@_pbb_cti_chain.
-+ * utils-cgen.scm (atlist-cti?): Don't include SKIP-CTI insns.
-+
-+ * utils-sim.scm: New file.
-+ * dev.scm (load-sim): Load it.
-+ (load-sid): Load it.
-+ * cgen-sid.scm: Load it.
-+ * cgen-sim.scm: Load it.
-+ * iformat.scm (<sformat>): New member sbuf, not initialized by
-+ default make.
-+ * rtx-funcs.scm (skip): Rewrite.
-+ * rtl-c.scm (skip): Rewrite.
-+ * m32r.cpu (sc,snc): Update `skip' usage.
-+ * mode.scm (mode-real-mode): New proc.
-+ * sem-frags.scm (-frag-split-by-sbuf): Rename from -frag-split-by-sfmt.
-+ Distinguish fragments by the <sformat-abuf> they use.
-+ * sim.scm (gen-profile-index-type): Delete.
-+ (ifield argbuf support): Move to utils-sim.scm and sim-decode.scm.
-+ (-gen-ifld-decoded-val): Delete, use gen-extracted-ifld-value instead.
-+ (hardware argbuf support): Move to utils-sim.scm and sim-decode.scm.
-+ (operand argbuf support): Move to utils-sim.scm and sim-decode.scm.
-+ (-gen-argbuf-elm): Rewrite.
-+ (-gen-argbuf-hw-elm): Delete.
-+ (-gen-argbuf-fields-union): Generate structs for each sbuf instead
-+ of each sfmt.
-+ (-sim-sformat-argbuf-list,-sim-insns-analyzed?): New globals.
-+ (sim-init!): Initialize them.
-+ (sim-analyze-insns!): Set them.
-+ (current-sbuf-list): New proc.
-+ * sim-cpu.scm (-gen-no-scache-semantic-fn): Update calls to
-+ gen-sfmt-op-argbuf-defns,gen-sfmt-op-argbuf-assigns.
-+ * sim-model.scm (-gen-model-insn-fn): Ditto.
-+ * sim-decode.scm (-gen-extract-decls): Delete.
-+ (-gen-record-argbuf-ifld,-gen-trace-argbuf-ifld): New procs.
-+ (<hardware-base>,gen-extract,gen-trace-extract): Move here from
-+ sim.scm.
-+ (<hw-register,gen-extract,gen-trace-extract): Ditto.
-+ (<hw-address,gen-extract,gen-trace-extract): Ditto.
-+ (-gen-op-extract,-gen-op-trace-extract): New procs.
-+ (gen-sfmt-op-argbuf-defns,gen-sfmt-op-argbuf-assigns): Rename from
-+ gen-sfmt-argvars-foo and rewrite.
-+ (-gen-record-args): Rewrite.
-+ (-gen-extract-case): Tweak.
-+ * sid.scm (gen-profile-index-type): Delete.
-+ (ifield argbuf support): Move to utils-sim.scm.
-+ (-gen-ifld-decoded-val): Delete, use gen-extracted-ifld-value instead.
-+ (hardware argbuf support): Move to utils-sim.scm and sid-decode.scm.
-+ (operand argbuf support): Move to utils-sim.scm and sid-decode.scm.
-+ (-sim-sformat-argbuf-list): New global.
-+ (sim-init!): Initialize it.
-+ (sim-analyze-insns!): Set it.
-+ (current-sbuf-list): New proc.
-+ * sid-decode.scm (-gen-argbuf-elm): Rewrite.
-+ (-gen-argbuf-hw-elm): Delete.
-+ (-gen-argbuf-fields-union): Generate structs for each sbuf instead
-+ of each sfmt.
-+ (-gen-record-argbuf-ifld,-gen-trace-argbuf-ifld): New procs.
-+ (-gen-extract-decls): Delete.
-+ (<hardware-base>,gen-extract,gen-trace-extract): Move here from
-+ sid.scm.
-+ (<hw-register,gen-extract,gen-trace-extract): Ditto.
-+ (<hw-address,gen-extract,gen-trace-extract): Ditto.
-+ (-gen-op-extract,-gen-op-trace-extract): New procs.
-+ (gen-sfmt-op-argbuf-defns,gen-sfmt-op-argbuf-assigns): Rename from
-+ gen-sfmt-argvars-foo and rewrite.
-+ (-gen-record-args): Rewrite.
-+ (-gen-extract-case): Tweak.
-+
-+ * cgen-gh.c (gh_putc,gh_puts): New functions.
-+ * cgen-gh.h (gh_putc,gh_puts): Declare them.
-+ * cos.c (_object_print_elms,_object_print): Use them.
-+ * hob-sup.c (fastcall_print): Use them.
-+ * configure.in: Check for scm_gen_puts, scm_puts.
-+ * config.in: Rebuild.
-+ * configure: Rebuild.
-+ * aclocal.m4: Rebuild.
-+ * Makefile.in: Rebuild.
-+
-+ * dev.scm (load-opc): Use load instead of maybe-load.
-+ (load-gtest,load-sim,load-stest): Ditto.
-+ (load-sid): Ditto.
-+
-+1999-07-23 Doug Evans <devans@casey.cygnus.com>
-+
-+ * sid-cpu.scm (-gen-sem-switch-engine): Move definition of `count'
-+ up to avoid g++ 'goto crosses initialization' warning.
-+ (-gen-sfrag-engine-fn): Delete vpc arg to NEXT_FRAG.
-+ (-gen-sfrag-case): Update use of NEXT_FRAG.
-+
-+1999-07-22 Doug Evans <devans@casey.cygnus.com>
-+
-+ * cos.c (cos_init): Protect _make_x_symbol from garbage collection.
-+
-+ * read.scm: Load sem-frags.scm.
-+ * sem-frags.scm (*): Lots rewritten.
-+ * sid.scm (-with-sem-frags?): New global
-+ (with-sem-frags?): New proc.
-+ (option-init!): Initialize -with-sem-frags?.
-+ (option-set!): Recognize with-sem-frags.
-+ (sim-init!): Call sim-sfrag-init! if with-sem-frags.
-+ * sid-cpu.scm (cgen-sem-switch.cxx): Generate semantic frag version
-+ if asked to.
-+ (-gen-sfrag-engine-decls): New proc.
-+ (-gen-sfrag-code,-gen-sfrag-case,-gen-sfrag-enum-decl): New procs.
-+ (-gen-sfrag-engine-frag-table,-gen-sfrag-engine-fn): New procs.
-+ (-gen-sfrag-engine): New proc.
-+ (-gen-sem-case): Emit setup-semantics if specified.
-+ (-gen-sem-switch-engine): Update init/use of computed goto label.
-+ * sid-decode.scm (-gen-decode-expr-entry): Fetch ifield values
-+ from local vars.
-+ (-gen-idesc-decls): Replace sem_address with cgoto.
-+ (-gen-scache-decls): Rewrite definition of `execute' member.
-+ * arm.cpu (arm isa): Enable decode-splits.
-+ * arm7.cpu (multiply insns): Rename result to mul-result.
-+
-+ Rename decode-specialize to decode-split.
-+ * decode.scm (*): Update.
-+ * insn.scm (*): Update.
-+ * mach.scm (*): Update.
-+ * sid.scm (*): Update.
-+
-+1999-07-19 Doug Evans <devans@casey.cygnus.com>
-+
-+ Record objects as a smob.
-+ * cos.c (scm_tc16_object): New static global.
-+ (cos_init): Initialize it.
-+ (OBJECT_P,OBJECT_ELEMENTS,OBJECT_CLASS_DESC): Update macros.
-+ (OBJECT_CLASS,OBJECT_ELEMENT_OFFSET): Update.
-+ (_object_tag): Delete.
-+ (_object_make_smob): New function.
-+ (_object_make_x,_object_make_with_values_x): Rewrite.
-+ (_object_elements,_object_class_desc): Rewrite.
-+ (_object_copy,object_p): Rewrite.
-+ (_object_specialize): Rewrite.
-+ (_object_print_elms,_object_print): New functions.
-+ (object_smob): New static global.
-+ (default_make_x): Use OBJECT_ELEMENT_OFFSET instead of magic number.
-+
-+ * cos.c (_make_x_symbol): New static global.
-+ (object_make): Use it.
-+ (cos_init): Initialize it.
-+
-+1999-07-15 Doug Evans <devans@casey.cygnus.com>
-+
-+ * rtl-c.scm (ifield): Back out last patch, use estate-ifield-var?
-+ instead to determine whether to use FLD macro.
-+ (<rtl-c-eval-state>): New member ifield-var?.
-+ (<rtl-c-eval-state>,vmake!): Recognize #:ifield-var?.
-+ * utils-gen.scm (-gen-ifld-extract-base): Specify #:ifield-var? #f.
-+ (-gen-ifld-extract-beyond,gen-multi-ifld-extract): Ditto.
-+
-+ * rtl.scm (rtx-sequence-assq-locals): New proc.
-+
-+ * cos.scm (-object-error): Don't crash on non-objects.
-+
-+ * Makefile.am (CLEANFILES): Add hobbit.
-+ * Makefile.in: Rebuild.
-+
-+ * rtl-c.scm (s-c-call): Delete unnecessary code.
-+
-+1999-07-14 Doug Evans <devans@casey.cygnus.com>
-+
-+ * rtl-c.scm (ifield): Always reference value via `FLD'.
-+
-+ * cos.c (elm_bound_p): Return problem SCM boolean values.
-+
-+ * utils-cgen.scm (display-argv): New proc.
-+ * cgen-opc.scm (cgen): Call it.
-+ * cgen-sim.scm (cgen): Ditto.
-+ * cgen-gas.scm (cgen): Ditto.
-+ * cgen-stest.scm (cgen): Ditto.
-+ * cgen-sid.scm (cgen): Ditto.
-+
-+1999-07-05 Doug Evans <devans@casey.cygnus.com>
-+
-+ * opc-asmdis.scm (-gen-parse-switch): New local var `junk'.
-+ * opc-ibld.scm (-gen-insert-switch): Initialize result to NULL.
-+ (-gen-extract-switch): Initialize result to 1.
-+ * opcodes.scm (gen-ifield-default-type): New proc.
-+ (gen-ifield-value-decl): Renamed from gen-ifield-type. All callers
-+ updated.
-+ (<hw-index>,gen-insert): Handle non-ifield indices.
-+ (<hw-index>,gen-extract): Ditto.
-+ (<hw-asm>,gen-parse): Ditto.
-+ (<hw-asm>,gen-print): Ditto.
-+ (<keyword>,gen-parse): Ditto.
-+ (<keyword>,gen-print): Ditto.
-+ (<operand>,gen-fget): Ditto.
-+ (<operand>,gen-fset): Ditto.
-+
-+ * sim.scm (-gen-hw-index-raw): Handle scalar indices.
-+ (-gen-hw-index): Ditto.
-+ * sid.scm (-gen-hw-index-raw): Handle scalar indices.
-+ (-gen-hw-index): Ditto.
-+
-+ * sem-frags.scm: New file.
-+
-+ * attr.scm (attr-parse): Add better checking of input.
-+
-+ * hardware.scm (-hw-parse-getter): Renamed from -hw-parse-get.
-+ All uses updated.
-+ (-hw-parse-setter): Renamed from -hw-parse-set. All uses updated.
-+
-+ * ifield.scm (ifld-nil?): New proc.
-+
-+ * operand.scm (<operand>): New members getter,setter.
-+ (<operand>,make!): New args getter,setter. All uses updated.
-+ (op:getter,op:setter): New procs.
-+ (<hw-index>,field-start): Return 0 for non-ifield indices.
-+ (<hw-index>,field-length): Return 0 for non-ifield indices.
-+ (-operand-parse-getter,-operand-parse-setter): New procs.
-+ (-operand-parse): New args getter,setter. All callers updated.
-+ Always use hw-index-scalar for scalar operands.
-+ (-operand-read): Handle getter,setter.
-+ (define-full-operand): New args getter,setter. All uses updated.
-+ * semantics.scm (-build-ifield-operand!): Update.
-+ (-build-index-of-operand!): Update.
-+ * sim.scm (<operand>,cxmake-get): If operand has getter, use it.
-+ * simplify.inc (define-normal-operand): Update.
-+
-+ * rtl.scm (abs,sqrt,cos,sin,min,max,umin,umax): New rtx fns.
-+ * rtl-c.scm (s-unop): Indirect fp ops through fpu op vector.
-+ (s-binop,s-cmpop,s-convop): Ditto.
-+ (abs,sqrt,cos,sin,min,max,umin,umax): New rtx fns.
-+ * sparc.cpu (insn-fmt2): Add FPOPS1,FPOPS2.
-+ (fcc-tests): New insn-enum.
-+ (fcc-value): Rename from fcc-type.
-+ * sparcfpu.cpu: New file. All fp support moved here.
-+
-+ * rtl.scm (<rtx-func>): New member class.
-+ (rtx-class-*?): New procs.
-+ (def-rtx-node): New arg class. All callers updated.
-+ (def-rtx-syntax-node,def-rtx-operand-node,def-rtx-dual-node): Ditto.
-+ * rtx-funcs.scm (*): Specify class.
-+
-+ * utils-cgen.scm (context-make-reader): New proc.
-+
-+ * utils.scm (assert-fail-msg): New variable.
-+ (assert): Use it.
-+ (list-drop,list-tail-drop): New procs.
-+
-+1999-06-22 Doug Evans <devans@casey.cygnus.com>
-+
-+ * desc-cpu.scm (-gen-hash-defines): Restore generation of
-+ CGEN_MIN_INSN_SIZE deleted on March 22.
-+
-+ * ifield.scm (<ifield>,needed-iflds): New method.
-+ (<multi-ifield>,needed-iflds): New method.
-+ (ifld-needed-iflds): New proc.
-+ (multi-ifield?): New proc.
-+ * iformat.scm (<sfmt>): Delete member ifmt. New members length,iflds.
-+ (-sfmt-search-key): Include insn length in key.
-+ (-sfmt-order-iflds,-sfmt-used-iflds): New procs.
-+ (<fmt-desc>): Delete members ifmt-key,sfmt-key. New member used-iflds.
-+ (-ifmt-lookup-ifmt!): Compute key here.
-+ (-ifmt-lookup-sfmt!): Compute key here. Delete arg ifmt.
-+ All callers updated.
-+ (ifmt-build): Delete arg desc. New args search-key,iflds.
-+ All callers updated.
-+ (sfmt-build): Delete args desc,ifmt. New args search-key,cti?,
-+ in-ops,out-ops,sorted-used-iflds. All callers updated.
-+ * minsn.scm (minsn-make-alias): Use insn-set-ifmt!. Update call
-+ to ifmt-build.
-+ * operand.scm (op-iflds-used): New proc.
-+ * utils-gen.scm (gen-ifld-type): Move here from sim.scm
-+ and sim-cpu.scm.
-+ And from sid.scm,sid-cpu.scm as well.
-+ (gen-ifld-extract-decl,-gen-ifld-extract-base): Ditto.
-+ (-gen-extract-word,-gen-ifld-extract-beyond): Ditto.
-+ (gen-ifld-extract,gen-multi-ifld-extract): Ditto.
-+ (gen-extracted-ifld-value): Ditto.
-+ (-extract-chunk-specs): Ditto.
-+ (gen-define-ifields,gen-define-ifmt-ifields): Ditto.
-+ (-extract-chunk,-gen-extract-beyond-var-list): Ditto.
-+ (gen-extract-ifields,gen-extract-ifmt-ifields): Ditto.
-+ (-extract-insert-subfields): New function.
-+ * sim.scm (gen-record-argbuf-ifld): Renamed from gen-ifld-extract.
-+ (gen-record-argvar-ifld): Renamed from gen-ifld-extract-argvar.
-+ * sim-cpu.scm (-gen-extract-ifmt-macro): Replace calls to
-+ gen-define-ifields with gen-define-ifmt-ifields. Ditto for
-+ gen-extract-foo.
-+ (-gen-no-scache-semantic-fn): Ditto.
-+ (-gen-sem-case): Ditto.
-+ (-gen-read-case): Update calls to gen-define-ifields,
-+ gen-extract-ifields.
-+ * sim-decode.scm (-gen-record-args): Update.
-+ (-gen-sfmt-argvars-assigns): Update.
-+ (-gen-extract-case): Update.
-+ * sim-model.scm (-gen-model-insn-fn): Replace calls to
-+ gen-define-ifields with gen-define-ifmt-ifields. Ditto for
-+ gen-extract-foo.
-+ * sid.scm (gen-ifld-argbuf-defn): Use gen-ifld-type.
-+ (gen-record-argbuf-ifld): Rename from gen-ifld-extract.
-+ (gen-record-argvar-ifld): Rename from gen-ifld-extract-argvar.
-+ * sid-decode.scm (-gen-decode-expr-entry): Update calls to
-+ gen-define-ifields, gen-extract-ifields.
-+ (-gen-record-args): Update.
-+ (gen-sfmt-argvars-assigns): Update.
-+ (-gen-extract-case): Replace calls to gen-define-ifmt-ifields
-+ with gen-define-ifields. Ditto for gen-extract-foo.
-+ (-gen-decode-fn): Use gen-ifld-extract-decl/gen-ifld-extract
-+ procs rather than method calls.
-+
-+1999-06-18 Doug Evans <devans@casey.cygnus.com>
-+
-+ * sid.scm (-create-virtual-insns!): New local `context', pass it
-+ to insn-read.
-+
-+ * rtl.scm (-rtx-traverse): Output symbol shortcuts in source form,
-+ (operand name) not (operand object), (local name) not (local object).
-+ (rtx-traverse-with-locals): New proc.
-+ (-compile-expr-fn): New proc.
-+ (rtx-compile): Rewrite.
-+ * rtl-c.scm (rtl-c-get): Handle operand/local names for src arg.
-+ (rtl-c-set-quiet): Don't accept operand/local names for dest arg.
-+ (rtl-c-set-trace): Ditto.
-+ (operand define-fn): Recognize operand name argument.
-+ (local define-fn): Recognize sequence temp name argument.
-+ * rtx-funcs.scm (operand): Argument is operand name, not object,
-+ so call current-op-lookup.
-+ (local): Similarily, so call rtx-temp-lookup.
-+
-+ * rtl.scm (rtx-field?): Use rtx-name instead of car.
-+ (rtx-operand?): Ditto.
-+ (rtx-pretty-name): Ditto.
-+ (rtx-local-obj): Flag symbol argument as an error.
-+ (rtx-local-name): New proc.
-+ (rtx-sequence-locals,rtx-sequence-exprs): New procs.
-+
-+ * rtl.scm (-rtx-traverse-operands): Fix debugging output of arg-types.
-+
-+ * read.scm (debug-repl): Renamed from -debug-repl. All callers
-+ updated.
-+
-+ * arm7.cpu (do-word/byte-store): Use (trunc: QI rd) rather than
-+ (and: QI rd #xff).
-+
-+ * hobbit.scm (*reckless-s->c-fun-table*): Add fastcall4, fastcall6.
-+ (*floats-s->c-fun-table*): Ditto.
-+ * hobbit.c,hobbit.h: Rebuild.
-+ * rtl.scm (-rtx-traverse-expr): Use fastcall6.
-+ * semantics.scm (rtx-simplify): Use /fastcall-make.
-+
-+ * iformat.scm (-sfmt-search-key): Don't include memory modes.
-+
-+ * insn.scm (<insn>): Delete members condition, compiled-condition.
-+ (<insn>,make!): Update
-+ (<insn> getters,setters): Update.
-+ (-insn-parse,insn-read,define-full-insn): Update.
-+ * minsn.scm (minsn-make-alias): Update.
-+ * iformat.scm (ifmt-analyze): Delete insn-condition reference.
-+ (ifmt-compute!): Ditto.
-+ * sim.scm (sim-finish!): Update.
-+ * simplify.inc: (define-normal-insn): Update.
-+ * sid-cpu.scm (gen-semantic-code): Update.
-+
-+ * iformat.scm (-ifmt-lookup-ifmt!): Use insn-set-ifmt!.
-+ (-ifmt-lookup-sfmt!): Use insn-set-sfmt!.
-+ (ifmt-compute!): Ditto.
-+
-+1999-06-16 Doug Evans <devans@casey.cygnus.com>
-+
-+ * minsn.scm (minsn-compute-iflds): Print better error message for
-+ missing ifields.
-+
-+1999-06-12 Doug Evans <devans@casey.cygnus.com>
-+
-+ * rtl.scm (tstate->estate): Don't copy over expr-fn.
-+
-+ * Makefile.am (HOBFLAGS): New variable.
-+ (cgen-hob.c): Use it.
-+ (hobbit.c): Use it.
-+ (libcpu_a_SOURCES): Add hob-sup.c.
-+ (hob-sup.o): New rule.
-+ * Makefile.in: Rebuild.
-+ * cgen.c: #include hob-sup.h.
-+ (cgen_init_c): Call hobbit_init_support.
-+ * hobbit.scm (*fastcall-make*,*c-symbol*): New variables.
-+ (*special-scm->c-functions*): Add them.
-+ (display-c-expression): Handle *c-symbol*.
-+ (*reckless-s->c-fun-table*): Add *fastcall-make*, fastcall5.
-+ (*floats-s->c-fun-table*): Ditto.
-+ (normalize): Recognize /fastcall-make.
-+ (normalize-fastcall-make): New proc.
-+ * hobbit.c,hobbit.h: Rebuild.
-+ * hob-sup.scm: New file.
-+ * hob-sup.c: New file.
-+ * hob-sup.h: New file.
-+ * read.scm: Load hob-sup.scm.
-+ * rtl.scm (-rtx-name-list): New variable.
-+ (rtx-name-list): New proc.
-+ (rtx-lookup): Try symbol first.
-+ (def-rtx-node): Add name to -rtx-name-list.
-+ (def-rtx-syntax-node,def-rtx-operand-node,def-rtx-macro-node): Ditto.
-+ (-rtx-traverse-anymode): New proc.
-+ (-rtx-traverse-{emode,intmode,floatmode,nummode,vmmode}): New procs.
-+ (-rtx-traverse-{rtx,setrtx,testrtx,condrtx,casertx}): New procs.
-+ (-rtx-traverse-{locals,env,attrs,symbol,string,number}): New procs.
-+ (-rtx-traverse-{symornum,object}): New procs.
-+ (-rtx-make-traverse-table): Rewrite.
-+ (-rtx-traverse-operands): Rewrite arg-types handling.
-+ Handle #f result of traverser.
-+ (-rtx-traverse): Renamed from -rtx-traverse-normal.
-+ Move debug handling here.
-+ (-rtx-traverse-debug): Delete.
-+ (rtl-finish!): Change -rtx-traverse-table into list of handlers
-+ for each rtx.
-+ * semantics.scm (semantic-compile:process-expr!): Fix call to
-+ -rtx-traverse.
-+ * utils.scm (map1-improper): New proc.
-+
-+1999-06-08 Doug Evans <devans@casey.cygnus.com>
-+
-+ * arm.sim (h-tbit): Replace FUN-ACCESS with FUN-SET.
-+ (h-mbits): Ditto.
-+ * sid.scm (-hw-cxmake-get): s/FUN-ACCESS/FUN-GET/.
-+ (-hw-gen-set-quiet): s/FUN-ACCESS/FUN-SET/.
-+ (<operand>,cxmake-get): Tweak.
-+ (sim-finish!): Delete FUN-ACCESS attribute. Create FUN-GET,FUN_SET.
-+
-+1999-06-07 Doug Evans <devans@casey.cygnus.com>
-+
-+ * thumb.cpu (dnti): Delete timing spec.
-+ (all insn): Update.
-+
-+ * arm.cpu (arm isa): New fields condition, setup-semantics.
-+ (thumb isa): New field setup-semantics.
-+ (h-gr): Add attribute CACHE-ADDR.
-+ * arm7.cpu (dnai): Delete condition.
-+ (eval-cond): Delete.
-+
-+ * mach.scm (<isa>): New member setup-semantics.
-+ (-isa-parse-setup-semantics): New proc.
-+ (-isa-parse): New arg setup-semantics.
-+ (-isa-read): Recognize setup-semantics.
-+
-+ * sid-cpu.scm (gen-extract-fields): Split into two:
-+ gen-extract-ifields, gen-extract-ifmt-ifields.
-+ (-gen-scache-semantic-fn): Delete `taken_p'. Delete
-+ tracing begin/end messages (done by caller now).
-+ (-gen-sem-case): Delete `taken_p'. Add npc,br_status. Delete
-+ tracing begin/end messages (done by x-before,x-after virtual insns).
-+ (-gen-sem-switch-engine): Redo vpc initialization. Save vpc at
-+ end so don't have to look it up again next time.
-+ * sid-decode.scm (-decode-expr-ifield-values): New proc.
-+ (-decode-expr-ifield-tracking-key): New proc.
-+ (-decode-expr-ifield-tracking): New proc.
-+ (-decode-expr-ifield-values-used): New proc.
-+ (-decode-expr-ifield-mark-used!): New proc.
-+ (-gen-decode-expr-set-itype): New proc.
-+ (-gen-decode-expr-entry): Rewrite.
-+ (-gen-decode-table-entry): New proc.
-+ (-gen-decoder-switch): Use it.
-+ (-gen-virtual-insn-finder): New proc.
-+ (-gen-argbuf-elm): Move here from sid.scm.
-+ (-gen-argbuf-hw-elm): Ditto.
-+ (-gen-argbuf-fields-union): Add entries for chain,before insns.
-+ (-gen-scache-decls): Add `cond' member to @prefix@_scache for
-+ conditional-execution isas.
-+ (-gen-decode-fn): Record conditional-exec ifield.
-+ * sid.scm (-current-pbb-engine?): New global.
-+ (current-pbb-engine?,set-current-pbb-engine?!): New procs.
-+ (<ifield>,gen-ifld-extract): New arg `indent'.
-+ (<multi-ifield>,gen-ifld-extract): Ditto.
-+ (-hw-gen-set-quiet-pc): Add pbb support. Delete `taken_p'.
-+ (-op-gen-set-trace): Don't print tracing messages for pbb engine.
-+ (-gen-arch-model-decls): Only scan real insns.
-+ (scache-engine-insns,pbb-engine-insns): New procs.
-+ (-create-virtual-insns!): New proc.
-+ (sim-finish!): Call it.
-+ (-decode-specialize-insn?): New proc.
-+ (-decode-specialize-build-assertion): New proc.
-+ (-decode-specialize-insn-1): New proc.
-+ (-decode-specialize-insn): New proc.
-+ (-fill-sim-insn-list!): New proc.
-+ (sim-analyze!): Create copies of insns to be specialized.
-+ * utils-cgen.scm (obj-set-name!): New proc.
-+
-+ * attr.scm (-attr-eval): Rewrite calls to rtx-simplify/rtx-compile.
-+ * iformat.scm (ifmt-analyze): Pass `insn' to semantic-compile,
-+ semantic-attrs.
-+ (ifmt-compute!): Delete arg `arch'. Result is list of iformats,
-+ sformats.
-+ * mach.scm (arch-analyze-insns!): Update call to ifmt-compute!.
-+ * rtl-c.scm (rtl-c-get): Use DM for default mode instead of VM.
-+ Avoid infinite loop when rtx-eval-with-estate leaves expr alone.
-+ (attr): Rewrite test for insn owner.
-+ (member): New rtx function.
-+ * rtl.scm (rtx-* accessors): Define as cxr directly rather than
-+ as separate function.
-+ (rtx-ifield?,rtx-ifield-name): New procs.
-+ (rtx-operand-obj): Rewrite.
-+ (rtx-operand-name): New proc.
-+ (rtx-cmp-op-mode,rtx-cmp-op-arg): New procs.
-+ (rtx-number-list-values,rtx-member-value,rtx-member-set): New procs.
-+ (tstate-make): New args owner, known. All callers updated.
-+ (tstate-known-lookup): New proc.
-+ (rtx-traverse): New arg owner. All callers updated.
-+ (rtx-make-bool): New proc.
-+ (rtl-find-ifields): Rewrite.
-+ (rtx-simplify,rtx-simplify-eq-attr-{insn,mach}): Moved to ...
-+ * semantics.scm: ... here.
-+ (rtx-const-equal,rtx-const-list-equal): New procs.
-+ (-build-known-values): New proc.
-+ (semantic-compile): New arg `insn'. Call rtx-simplify.
-+ (semantic-attrs): Ditto.
-+ * rtx-funcs.scm (member,number-list): New rtx functions.
-+
-+ * attr.scm (attr-remove-meta-attrs-alist): Delete leading '-' in name.
-+ Rewrite. Delete arg `all-attrs'. All callers updated.
-+ (attr-remove-meta-attrs): Delete leading '-' in name. All callers
-+ updated.
-+ * utils-cgen.scm (gen-bool-attrs): Remove meta attrs.
-+
-+ * decode.scm (subdtable-add): Handle `expr' entries.
-+ (exprtable-entry-make): Use vector. Record ifields refered to by expr.
-+ (exprtable-entry-*): Update.
-+ (exprtable-entry-iflds): New proc.
-+ (exprentry-cost): New proc.
-+ (exprtable-sort,-gen-exprtable-name): New procs.
-+ (exprtable-make): New arg `name'. All callers updated. use vector.
-+ (exprtable-*): Update.
-+ (-build-decode-table-entry): Don't issue collision warning if all are
-+ specialized insns. Sort exprtable entries before building table.
-+
-+ * read.scm (-reader-process-expanded-1): Move pretty printing of
-+ input to logging level 4.
-+
-+ * utils.scm (string-list->string): New proc.
-+
-+ * insn.scm (<insn>): Define setters for ifield-assertion, condition,
-+ semantics.
-+ (insn-read): Delete leading '-' in name. All callers updated.
-+ (real-insn?): New proc.
-+ (real-insns): Rewrite.
-+ (insn-has-ifield?): New proc.
-+ (insn-builtin!): Create insn attribute SPECIALIZED.
-+
-+ * mach.scm (<arch>): Delete member app-data.
-+ (current-raw-insn-list): New proc.
-+ (insn-list-car,insn-list-splice!): New procs.
-+ (<decode-specialize>): New class.
-+ (-isa-parse-decode-specialize): New proc.
-+ (-isa-parse-decode-specializes): New proc.
-+ (<isa>): New members `condition', `decode-specializes'.
-+ (-isa-parse-condition): New proc.
-+ (-isa-parse): New args condition, decode-specializes.
-+ (-isa-read): Recognize condition, decode-specializes.
-+ (-isa-add-decode-specialize!): New proc.
-+ (modify-isa): New proc.
-+ (isa-conditional-exec?,state-conditional-exec?): New procs.
-+ (arch-init!): New reader command `modify-isa'.
-+
-+ * mode.scm (mode-class-signed?,mode-class-unsigned?): New procs.
-+ (mode-signed,mode-unsigned?): New procs.
-+
-+Thu Jun 3 16:00:40 1999 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * types.scm (<array>): New method get-shape.
-+ * hardware.scm (<hardware-base>): Forward get-shape,get-num-elms
-+ onto type.
-+ (hw-shape,hw-num-elms): New procs.
-+ * sim.scm (<hw-register>,gen-profile-index-type): Use "unsigned short"
-+ if there's more than 255 registers.
-+ * sid.scm (<hw-register>,gen-profile-index-type): Ditto.
-+
-+ * hardware.scm (-hw-parse): Flag as error CACHE-ADDR specified
-+ with get/set specs.
-+
-+1999-05-21 Doug Evans <devans@casey.cygnus.com>
-+
-+ * cgen-sid.scm (sim-arguments): Add -X.
-+ * sid-cpu.scm (-gen-hardware-types): Comment out scache vars.
-+ (-gen-all-semantic-fns): Don't include PBB support virtual insns.
-+ (-gen-sem-case): Use CASE/NEXT macros again. Tweak indenting.
-+ Simplify by supporting pbb engine only.
-+ (-gen-sem-switch-init): New proc.
-+ (-gen-sem-switch-engine): Rename from -gen-sem-switch-fn.
-+ (cgen-sem-switch.cxx): New proc.
-+ * sid-decode.scm (-gen-decode-insn-globals): Replace with-sem-switch?
-+ with with-pbb?. Support dual scache/pbb engines.
-+ (-gen-idesc-decls): Replace with-sem-switch? with with-pbb?.
-+ Support dual scache/pbb engines.
-+ (cgen-decode.h): Generate semantic fn decls if with-scache?.
-+ * sid.scm (*) with-pbb? replaces with-sem-switch?.
-+ (sim-finish!): Create pbb support virtual insns if with-pbb?.
-+
-+1999-05-10 Ben Elliston <bje@cygnus.com>
-+
-+ * arm7.cpu: Remove coprocessor related fields, operands and insn
-+ definitions for now. Take the undefined instruction trap instead.
-+ (ldmda-wb): New instruction.
-+ (ldmib-wb): Likewise.
-+ (ldmdb-wb): Likewise.
-+ (stmdb-wb): Likewise.
-+ (stmib-wb): Likewise.
-+ (stmda-wb): Likewise.
-+
-+1999-05-08 Doug Evans <devans@casey.cygnus.com>
-+
-+ * sid.scm (<hw-memory>,cxmake-get): Call GETMEM method, not function.
-+ (<hw-memory>,gen-set-quiet): Call SETMEM method, not function.
-+
-+ * utils-cgen.scm (keyword-list->arg-list): Fix call to substring,
-+ hobbit can't handle optional third arg.
-+
-+1999-05-07 Doug Evans <devans@casey.cygnus.com>
-+
-+ * arm.cpu (h-tbit): Delete set spec.
-+ (h-mbits): Don't call arm_mbits_set in set spec.
-+ * arm.sim: New file.
-+ * hardware.scm (modify-hardware): New proc.
-+ (hardware-init!): Add modify-hardware command.
-+ * sid.scm (-hw-cxmake-get): Use method call if FUN-ACCESS specified.
-+ (-hw-gen-set-quiet): Ditto.
-+ (sim-finish!): Call invalid_insn method. Define FUN-ACCESS builtin
-+ hardware attribute. Load $arch.sim file if present.
-+ * utils-cgen.scm (keyword-list?): New proc.
-+ (keyword-list->arg-list,arg-list-validate-name): New procs.
-+ (arg-list-check-no-args,arg-list-symbol-arg): New procs.
-+
-+ * arm7.cpu (eval-cond): Pass pc to @cpu@_eval_cond handler.
-+
-+ * sid-cpu.scm (-gen-hardware-types): Rename @cpu@_cpu to
-+ @cpu@_cpu_cgen.
-+
-+ * attr.scm (obj-prepend-atlist!): New proc.
-+
-+ * opc-opinst.scm (cgen-opinst.c): Analyze instructions if necessary.
-+
-+ * sid.scm (<operand>,profilable?): Use op:type.
-+ * sim.scm (<operand>,profilable?): Use op:type.
-+
-+1999-05-04 Doug Evans <devans@casey.cygnus.com>
-+
-+ * utils.scm (find-index,find): Be more stack friendly.
-+
-+ * arm7.cpu (arith-imm-op): Compute pc before setting cpsr.
-+ (bic-imm): Ditto.
-+
-+1999-05-01 Doug Evans <devans@casey.cygnus.com>
-+
-+ * arm.cpu (h-gr-usr): New hardware element.
-+ (h-gr-fiq,h-gr-svc,h-gr-abt,h-gr-irq,h-gr-und): New hardware elements.
-+ (arm-mode): New keyword.
-+ (h-mbits): Add set spec.
-+ (h-spsr): Implement get/set specs.
-+
-+ * read.scm: Load slib/pp.scm, slib/genwrite.scm.
-+ (-reader-process-expanded-1): Pretty print logging output.
-+
-+ * sid-cpu.scm (-gen-reg-access-defns): Make getters `const'.
-+ (cgen-cpu.h): Print enums before hardware elements.
-+ (cgen-semantics.cxx): @arch@-cgen.h renamed to @arch@-main.h.
-+ * sid-decode.scm (cgen-decode.cxx): Ditto.
-+ * sid-model.scm (cgen-model.cxx): Ditto.
-+
-+ * utils-cgen.scm (context-error): Accept variable number of
-+ trailing args.
-+
-+ * rtx-funcs.scm (error:): New rtx function.
-+ * rtl-c.scm (s-case-vm): New proc.
-+ (-gen-non-vm-case-get,s-case-non-vm): New procs.
-+ (s-case): Simplify, handle non-VM result.
-+ (error:): New rtx function.
-+
-+1999-04-30 Doug Evans <devans@casey.cygnus.com>
-+
-+ * arm.cpu (h-pc): Add set spec to zero bottom bits.
-+ (test-hi,test-ls): Fix cbit handling.
-+ (shift-type,h-operand2-shifttype): Move here ...
-+ * arm7.cpu: ... from here.
-+ (set-cond,set-cond-maybe,dnix): Delete, unused.
-+ (set-zn-flags,set-logical-cc,set-add-flags,set-sub-flags): Move ...
-+ * arm.cpu: ... to here.
-+ * thumb.cpu (cmp,alu-cmp): Use set-sub-flags.
-+ (alu-cmn): Use set-add-flags.
-+ (alu-tst): Use set-zn-flags.
-+ (alu-cmp): Use set-sub-flags.
-+ (lsl,lsr,asr): Set condition codes.
-+ (add,addi,sub,subi,mov,addi8,subi8): Ditto.
-+ (alu-op): Split into three: alu-logical-op,alu-arith-op,
-+ alu-shift-op.
-+ (hireg-op): Split sem-fn into lo-dest-sem-fn,hi-dest-sem-fn.
-+ All callers updated.
-+ (sub-sp): Rename from add-sp-neg.
-+ (f-lbwl-offset): Delete.
-+ (f-lbwl-hi,f-lbwl-lo): New ifields.
-+ (lbwl-hi,lbwl-lo): Update.
-+ (bl-hi): Add 4 to pc.
-+ (push-reg,pop-reg): Simplify.
-+ (push,push-lr): Push registers in correct order.
-+ (pop,pop-pc): Pop registers in correct order.
-+ (save-reg-inc,load-reg-inc): Simplify.
-+ (ldmia): Save registers in correct order.
-+
-+1999-04-30 Ben Elliston <bje@cygnus.com>
-+
-+ * arm7.cpu (f-op-hdt): Remove; unused.
-+ (f-ror-imm8-value,f-ror-imm-rotate): New fields.
-+ (f-ror-imm8): New multi-ifield.
-+ (f-operand2-bit7): Remove; use the generic `f-bit7' instead. All
-+ callers updated.
-+ (f-uimm12): New field.
-+ (ror-imm8): New operand.
-+ (uimm12): Likewise.
-+ (hdt-offset8): Reinstate operand.
-+ (offset4-hi,offset4-lo): Remove.
-+ (set-cond): Remove macro; unused.
-+ (set-cond-maybe): Likewise.
-+ (load-word/byte): Use uimm12 operand for a true 12-bit immediate.
-+ (store-word/byte): Likewise.
-+ (load-halfword): Use hdt-offset8 multifield operand instead of two
-+ 4-bit operands that are explicitly combined by semantic code.
-+ (do-halfword-store): Bug fix. Set address when not preindexing.
-+ (store-halfword): Also use hdt-offset8 operand.
-+ (arith-op): Avoid clobbering source registers when one of them is
-+ the destination register.
-+ (arith-imm-op): Likewise.
-+ (tst-imm): Use ror-imm8 operand. Handle special case of rot 0.
-+ (teq-imm): Likewise.
-+ (ldm-p): Rename to ldmdb.
-+ (stm-pw): Rename to stmdb-wb.
-+ (multi-action): New macro; test reg-list bits and execute a
-+ semantic fn if the bit is set.
-+ (ldmda,ldmib,ldmia,ldmia-wb,ldmdb): New multiple load insns.
-+ (stmdb,stmib,stmia,stmia-wb,stmda,stmdb-wb): Store insns.
-+ (all insns): Use dnai entries for simplicity rather than dni.
-+ (*): Use short-form of (const ..).
-+
-+1999-04-29 Doug Evans <devans@casey.cygnus.com>
-+
-+ * rtl.scm (<rtx-func>): Rename member type to style. Rename
-+ member eval to evaluator.
-+ (rtx-foo accessors): Rename from rtx:foo. All callers updated.
-+ (tstate-make): Delete arg op-fn. All callers updated.
-+ (tstate-op-fn,tstate-set-op-fn!): Delete.
-+ (rtx-traverse): Delete op-fn arg. All callers updated.
-+ * semantics.scm (-simplify-for-compilation-process-expr): New proc,
-+ split out of -simplify-for-compilation.
-+
-+ * Makefile.am (CGEN_NONHOB_FILES,CGENFILES): New variables.
-+ (cgen_DEPENDENCIES): Add stamp-cgen.
-+ (stamp-cgen): New rule.
-+ * Makefile.in: Rebuild.
-+
-+ * rtl-c.scm (enum:): Define emitter for.
-+ * rtl.scm (rtx-constant?): Rename from rtx-const? and check for
-+ enums as well.
-+ (rtx-constant-value,rtx-enum-value): New procs.
-+ (-rtx-traverse-normal): Expand enum-value to (enum enum-value).
-+ (rtx-compile-time-constant?): Return #t for enums.
-+ (rtx-true?,rtx-false?): Handle enums.
-+ (rtx-simplify-eq-attr-mach): Use rtx-true,rtx-false instead of
-+ building result by hand.
-+ (rtx-simplify-eq-attr-insn): Ditto.
-+ * rtx-funcs.scm (enum:,enum): New rtx functions.
-+
-+ * mach.scm (<arch>): New members insns-analyzed?, semantics-analyzed?,
-+ aliases-analyzed?.
-+ (arch-analyze-insns!): New proc.
-+ * opcodes.scm (opcodes-analyze!): Call arch-analyze-insns! instead
-+ of calling ifmt-compute! directly.
-+ * sid.scm (-sim-insns-analyzed?): Delete.
-+ (sim-analyze!): Call arch-analyze-insns! instead of calling
-+ ifmt-compute! directly.
-+ * sim.scm (-sim-insns-analyzed?): Delete.
-+ (sim-analyze!): Call arch-analyze-insns! instead of calling
-+ ifmt-compute! directly.
-+
-+ * utils.scm (string-take-with-filler): New proc.
-+ (string-take): Use it.
-+
-+ * pgmr-tools.scm: New file.
-+ * read.scm: Load it.
-+ * insn.scm (pretty-print-insn-format): Move to pgmr.scm.
-+
-+ * insn.scm (insn-base-mask): Renamed from insn:mask.
-+ All callers updated.
-+ (insn-base-mask-length): Renamed from insn:mask-length.
-+ All callers updated.
-+ (insn-foo): Renamed from insn:foo. All callers updated.
-+ * minsn.scm (minsn-foo): Renamed from minsn:foo. All callers updated.
-+ * iformat.scm (compute-insn-base-mask-length): Renamed from
-+ compute-insn-mask-length. All callers updated.
-+ (compute-insn-base-mask): Renamed from compute-insn-mask.
-+ All callers updated.
-+
-+ * enum.scm (-enum-parse-prefix): New proc.
-+ (<enum>,make!): Don't parse enum values here.
-+ (-enum-parse): Do it here. Call -enum-parse-prefix.
-+ (define-full-insn-enum): Ditto.
-+ (enum-vals-upcase): New proc.
-+ * hardware.scm (define-keyword): Make enum prefix uppercase.
-+ * hobscmif.h (CHAR_LOWERP,CHAR_UPPERP,CHAR_WHITEP): New macros.
-+
-+ * ifield.scm (<ifield>,field-mask): Allow container to be #f.
-+ (<ifield>,field-extract): New method.
-+ (<multi-ifield>,field-extract): New method.
-+ (ifld-extract): New proc.
-+ * opcodes.scm (ifld-insert-fn-name): Renamed from ifld-insert.
-+ (ifld-extract-fn-name): Renamed from ifld-extract.
-+
-+ * ifield.scm (ifld-new-value): Renamed from ifield-make.
-+ All callers updated.
-+
-+ * ifield.scm (ifld-lsb0?): New proc.
-+ (sort-ifield-list): New arg up?. All callers updated.
-+ * iformat.scm (compute-insn-mask): Get lsb0? flag from argument,
-+ rather than global state.
-+
-+1999-04-27 Doug Evans <devans@casey.cygnus.com>
-+
-+ * insn.scm (pretty-print-insn-format): New proc.
-+
-+ * Makefile.in: Rebuild.
-+ * aclocal.m4: Rebuild
-+ * configure: Rebuild.
-+
-+Mon Apr 26 10:30:18 1999 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * configure.in (AM_INIT_AUTOMAKE): Update version to 0.7.2.
-+ * configure: Rebuild.
-+ * aclocal.m4: Rebuild.
-+ * Makefile.in: Rebuild.
-+ * doc/Makefile.in: Rebuild.
-+ * doc/version.texi: Rebuild.
-+
-+1999-04-25 Doug Evans <devans@casey.cygnus.com>
-+
-+ * utils.scm (bits->bools): New proc.
-+
-+1999-04-23 Doug Evans <devans@casey.cygnus.com>
-+
-+ * sid.scm (<multi-ifield>,gen-ifld-extract-decl): Fix call to
-+ subfield's gen-ifld-extract-decl method.
-+
-+1999-04-23 Ben Elliston <bje@cygnus.com>
-+
-+ * arm7.cpu (ldrsh-pu): Remove.
-+ (do-halfword-load): New pmacro.
-+ (load-halfword): Likewise.
-+ (do-halfword-store): Likewise.
-+ (store-halfword): Likewise.
-+ (strh-*): New instructions.
-+ (ldrsb-*): Likewise.
-+ (ldrh-*): Likewise.
-+ (ldrsh-*): Likewise.
-+
-+1999-04-22 Doug Evans <devans@casey.cygnus.com>
-+
-+ * ifield.scm (ifld-constant?): Delete special handling of RESERVED
-+ fields.
-+
-+ * arm7.cpu (do-word/byte-store): Fix typo.
-+
-+1999-04-22 Ben Elliston <bje@cygnus.com>
-+
-+ * arm7.cpu (do-word/byte-load): Handle cases where the destination
-+ register is the program counter (R15).
-+
-+ * arm7.cpu (do-word/byte-store,store-word/byte): New pmacros.
-+ (str-*): Implement using store-word-byte. Remove older versions.
-+ (bic): Use the `inv' rtx for obtaining bitwise complements.
-+ (bic-imm): Likewise.
-+ (mvn): Likewise.
-+ (mvn-imm): Likewise.
-+ (store-indev-reg): Remove crufty pmacro.
-+ (load-indiv-reg): Likewise.
-+ (ldm-p): Reverse the order of register processing for decrement.
-+ (stm-p): Likewise.
-+ (stbi): Remove; handled by the str-* insns.
-+
-+1999-04-21 Doug Evans <devans@casey.cygnus.com>
-+
-+ * thumb.cpu (cmp): Fix carry bit computation.
-+ (alu-cmp): Ditto.
-+
-+1999-04-20 Doug Evans <devans@casey.cygnus.com>
-+
-+ * arm.cpu (h-tbit): Specify set spec.
-+ (h-cpsr): Ditto.
-+ * arm7.cpu (bx): Don't call C routine, just set h-tbit.
-+ (set-sub-flags): Interpret "carry bit" as a borrow.
-+ (all sub/cmp insns): Carry bit is actually a borrow bit.
-+ * thumb.cpu (bx-rs,bx-hs): Don't call C routine, just set h-tbit.
-+ (add-carry,sub-carry,thumb-neg,thumb-bic,thumb-inv): Delete. Use
-+ .pmacro instead.
-+ (hireg-add,hireg-cmp,hireg-move): Ditto.
-+
-+ * read.scm (-CGEN-VERSION): Change version to 0.7.2.
-+ (-CGEN-LANG-VERSION): Ditto.
-+
-+1999-04-18 Doug Evans <devans@casey.cygnus.com>
-+
-+ * pmacros.scm (-pmacro-make): New arg `default-values',
-+ all callers updated.
-+ (-pmacro-default-values): New proc.
-+ (-pmacro-process-keyworded-args): New proc.
-+ (-pmacro-process-args): New proc.
-+ (-pmacro-invoke): Process arguments before expanding macro.
-+ (-pmacro-get-arg-spec,-pmacro-get-default-values): New procs.
-+ (define-pmacro): Handle default values specified in arg list.
-+ * rtl.scm (rtx-alu-op-mode,rtx-alu-op-arg): New procs.
-+ (rtx-boolif-op-arg[01]): New procs.
-+ (rtx-true,rtx-false,rtx-canonical-bool): New procs.
-+ (rtx-simplify): Handle not,orif,andif.
-+ * semantics.scm (-simplify-for-compilation): Simplify not,orif,andif.
-+ * utils.scm (alist-copy): New proc.
-+ * arm7.cpu (do-word/byte-load,load-word/byte): New pmacros.
-+ (ldr*): Rewrite.
-+ (swi): Explicitly set pc.
-+
-+ * thumb.cpu (bx-rs,bx-hs): Reverse test for switch to arm mode.
-+
-+1999-04-17 Ben Elliston <bje@cygnus.com>
-+
-+ * arm7.cpu (ldr-pu): Do not add 8 to R15; the step() method
-+ correctly adjusts the program counter now.
-+
-+ * arm7.cpu (f-halfword?): Rename from `f-hdt-halfword?'.
-+ (f-signed?): Rename from `f-hdt-signed?'.
-+ (f-offset4-hi): Rename from `h-hdt-off4-ms'.
-+ (f-offset4-lo): Rename from `h-hdt-off4-ls'.
-+ (f-hdt-offset8): Use new field names.
-+ (ldr): Use `imm12' field, not `offset12', since we do our own
-+ address arithmetic.
-+ (str, str-*): Likewise.
-+ (ldu-*): Remove most; better not implemented than broken.
-+ (ldrh*): Likewise.
-+ (ldrsh-pu): New insn.
-+ (stri): Likewise.
-+ (stri-p): Likewise.
-+ (stbi): Likewise.
-+ (ldm-p): Likewise; replace (load-indiv-reg) version.
-+
-+1999-04-15 Doug Evans <devans@casey.cygnus.com>
-+
-+ * arm.cpu (h-pc): Delete VIRTUAL attribute, get/set specs.
-+ * arm7.cpu (*): Fix mode of result of arm_compute_carry_out_*.
-+ (*): Explicitly specify mode in c-call.
-+ (logical-op): Recognize sets of h-gr[15] as sets of pc.
-+ (arith-op): Ditto.
-+ (and-imm,orr-imm,xor-imm,mov-imm,bic-imm,mvn-imm): Ditto.
-+ (arith-imm-op): New pmacro.
-+ (add-imm,adc-imm,sub-imm,sbc-imm,rsb-imm,rsc-imm): Use it.
-+ * thumb.cpu (bx-rs,bx-hs): Rewrite.
-+
-+1999-04-14 Doug Evans <devans@casey.cygnus.com>
-+
-+ * rtl.scm (rtx-simplify-eq-attr-insn): Fix call to context-error.
-+
-+ * rtl.scm (rtl-find-ifields): Implement.
-+
-+ * utils-gen.scm: New file.
-+ * read.scm: Load it.
-+ * desc.scm: Move generic attribute code to utils-gen.scm.
-+ * Makefile.am (CGEN_HOB_INPUT_FILES): Add it.
-+ * Makefile.in: Rebuild.
-+
-+ * arm7.cpu (R15-OFFSET): New attribute.
-+ (dnai): New pmacro.
-+ (logical-op): Delete arg `result?'. All callers updated. Use dnai.
-+ Delete use of eval-cond (dnai specifies it). Specify R15-OFFSET of 12
-+ for reg-shift version.
-+ (arith-op): Ditto.
-+ (data processing insns): Reorganize. Use dnai.
-+
-+ * attr.scm (attr-kind): New proc.
-+ (attr-list-enum-list): Rewrite.
-+ (-attr-sort): Split result into two lists, bools and non-bools.
-+ (current-attr-list-for): Update.
-+
-+ * cgen-sid.scm (sim-arguments): Add -H -> build desc.h file.
-+ * sid-cpu.scm (-gen-attr-decls): New proc.
-+ (-gen-insn-attr-decls): New proc.
-+ (cgen-desc.h): New proc.
-+ (cgen-cpu.h): Put everything in @cpu@ namespace.
-+ (gen-parallel-exec-type): Change prefix of parexec struct from
-+ @cpu@ to @prefix@.
-+ (-gen-trace-record-type): Ditto for trace_record struct.
-+ (-gen-write-case): Update.
-+ (-gen-scache-semantic-fn): Change function prefix from @cpu@ to
-+ @prefix@. Update scache struct references.
-+ (-gen-sem-case): Update scache struct references.
-+ (-gen-sem-switch-fn): Update idesc struct reference.
-+ Update insn_type enum reference.
-+ (cgen-write.cxx): Update scache,argbuf references.
-+ (cgen-semantics.cxx): Simplify namespace choice (always @cpu@).
-+ * sid-decode.scm (IDESC-TABLE-VAR): Change prefix of insn_data
-+ from @cpu@ to @prefix@.
-+ (-gen-decode-insn-entry): Use gen-cpu-insn-enum.
-+ (-gen-decode-expr-entry): Ditto. Change prefix of INSN_X_INVALID
-+ from @CPU@ to @PREFIX@.
-+ (-gen-decoder-switch): Change prefix of INSN_X_INVALID
-+ from @CPU@ to @PREFIX@.
-+ (-gen-decode-insn-globals): Generate insn attributes.
-+ (-gen-sem-fn-name): Change function prefix from @cpu@ to @prefix@.
-+ (-gen-sem-fn-decls): Use -gen-sem-fn-name. Add `using' for
-+ semantic fn typedef.
-+ (-gen-idesc-decls): Simplify cpu class name (always @cpu@_cpu).
-+ Change prefix of scache struct from @cpu@ to @prefix@.
-+ Change prefix of semantic fn typedef from @cpu@ to @prefix@.
-+ Change prefix of idesc struct from @cpu@ to @prefix@.
-+ Change prefix of insn_type enum from @cpu@ to @prefix@.
-+ (-gen-argbuf-fields-union): Change prefix of sem_fields union
-+ from @cpu@ to @prefix@.
-+ (-gen-scache-decls): Change prefix of scache struct from
-+ @cpu@ to @prefix@. Update idesc struct name.
-+ Update decode,execute methods.
-+ (-gen-extract-case): Update to type name changes.
-+ (-gen-decode-fn): Ditto.
-+ (cgen-decode.h): Put everything in @cpu@ namespace (except
-+ semantic fn decls). Change prefix of insn_word from @cpu@ to @prefix@.
-+ (cgen-decode.cxx): Add using namespace @cpu@.
-+ * sid-model.scm (-gen-hw-profile-decls): Change prefix of
-+ model_mark_get/set from @cpu@ to @prefix@.
-+ (gen-model-unit-fn-name): Change function prefix from @cpu@ to
-+ @prefix@.
-+ (gen-model-fn-decls): Update idesc struct name. Change prefix
-+ of model_insn_before/after from @cpu@ to @prefix@.
-+ (-gen-model-insn-fn): Update scache/idesc/argbuf struct names.
-+ Update insn_word type name.
-+ (-gen-model-timing-table): Update INSN_TIMING struct name.
-+ (-gen-model-init-fn): Update MODEL_DATA struct name.
-+ (-gen-mach-defns): Update name of init_idesc_table fn.
-+ (cgen-model.cxx): Add using namespace @cpu@.
-+ * sid.scm (gen-cpu-class): Delete.
-+ (gen-attr-type): New proc.
-+ (gen-obj-attr-sid-defn): New proc.
-+ (<operand>,gen-profile-code): Update name of model_mark_get/set fn.
-+ (gen-cpu-insn-enum-decl): Change prefix of insn_type enum from
-+ @CPU@ to @PREFIX@.
-+ (gen-cpu-insn-enum): Update name of insn enum.
-+ * thumb.cpu (bx-rs): Rename @cpu@_do_bx to @prefix@_do_bx.
-+ (bx-hs): Ditto.
-+ (swi): Rename @cpu@_swi to @prefix@_swi.
-+
-+ * decode.scm (-build-decode-table-entry): Remove heuristic for
-+ distinguishing insns, and use insn ifield-assertion specs.
-+
-+ * desc-cpu.scm (gen-A-attr-mask): Simplify.
-+ (gen-ifld-defns): Boolean attributes begin at number 0 now.
-+ (gen-hw-table-defns,gen-operand-table,gen-insn-table): Ditto.
-+ * opc-itab.scm (-gen-macro-insn-table): Ditto.
-+ * utils-cgen.scm (gen-attr-enum-decl): Change type arg to prefix,
-+ all callers updated.
-+ (gen-attr-name): New proc
-+ (gen-attr-mask): Use it. Boolean attributes start at 0 now.
-+ (gen-obj-attr-defn): Delete num_nonbools count.
-+
-+ * iformat.scm (ifmt-analyze): Handle insn-condition.
-+ (ifmt-compute!): Ditto.
-+ * insn.scm (<insn>): Specify default value for condition,
-+ post-cond-trap,compiled-condition,compiled-semantics.
-+ (<insn>,make!): New arg condition.
-+ (<insn>): Add getters for condition,compiled-condition.
-+ (-insn-parse): New arg condition, all callers updated.
-+ (-insn-read): Recognize condition spec.
-+ (define-full-insn): New arg condition.
-+ * minsn.scm (minsn-make-alias): Update call to (make <insn> ...).
-+ * semantics.scm (semantic-compile): Change arg sem-code to
-+ sem-code-list.
-+ (semantic-attrs): Ditto.
-+ * sim.scm (sim-finish!): Update calls to define-full-insn.
-+ * simplify.inc (define-normal-insn): Update call to define-full-insn.
-+ * sid-cpu.scm (gen-semantic-code): Handle insn-condition.
-+ * sid.scm (sim-finish!): Update call to define-full-insn.
-+
-+Tue Apr 13 17:04:34 1999 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * Makefile.am (sim-cpu): Allow specification of ISA.
-+ * Makefile.in: Rebuild.
-+
-+Sun Apr 11 00:37:56 1999 Jim Wilson <wilson@cygnus.com>
-+
-+ * i960.cpu (sll-expr, srl-expr, sra-expr): Handle large shift counts.
-+
-+1999-04-10 Doug Evans <devans@casey.cygnus.com>
-+
-+ * sparccom.cpu (check-fp-enable): Wrap TRAP32_FP_DIS in c-code.
-+
-+ * arm.cpu (gr-names): Put pc first so it gets prefered in disassembly.
-+
-+ * attr.scm (atlist?): New proc.
-+ (-attr-eval): Rewrite.
-+ (attr-parse): New proc.
-+ (atlist-parse): Use it.
-+
-+ * decode.scm (exprtable-entry-make): New proc.
-+ (exprtable-entry-insn,exprtable-entry-expr): New procs.
-+ (exprtable-make,exprtable-insns): New procs.
-+
-+ * hardware.scm (hw-mode-ok?): Delete argument `set?'.
-+ All uses updated.
-+ (hardware-builtin!): Make h-memory a vector.
-+
-+ * iformat.scm (ifmt-ifields): Renamed from ifmt-fields.
-+ All callers updated.
-+ (ifmt-analyze): Use csem-* accessors on result of semantic-compile.
-+
-+ * insn.scm (<insn>). Rename ifld-assertions to ifield-assertion.
-+ All uses updated.
-+ (-insn-parse): Set semantics to #f if not specified.
-+ (define-insn,define-full-insn): Take out code that ignores ALIAS's
-+ if simulator.
-+ (-parse-insn-format): Recognize `=' iformat spec.
-+
-+ * mach.scm (isa-min-insn-bitsize): Ignore ALIAS's.
-+ (isa-max-insn-bitsize): Ditto.
-+
-+ * opcodes.scm (<ifield>,gen-insert): Call rtl-c instead of
-+ rtl-c-with-alist.
-+ (<ifield>,gen-extract): Ditto.
-+ (<multi-ifield>,gen-insert,gen-extract): Ditto.
-+ * sid-cpu.scm (-gen-reg-access-defns): Ditto.
-+ (gen-define-ifmt-ifields): New proc.
-+ (gen-semantic-code): Rewrite.
-+ * sid-decode.scm (-gen-decode-expr-entry): New proc.
-+ (-gen-decoder-switch): Handle expression tables.
-+ (-gen-extract-case): Call gen-define-ifmt-ifields instead of
-+ gen-define-fields.
-+ * sid-model.scm (-gen-model-insn-fn): Call gen-define-ifmt-ifields
-+ instead of gen-define-fields.
-+ * sid.scm (<ifield>,gen-ifld-extract-decl): New arg `indent', all
-+ callers updated.
-+ (<multi-ifield,gen-ifld-extract-decl): Ditto.
-+ (-gen-ifld-extract-base): Call rtl-c instead of rtl-c-with-alist.
-+ (-gen-ifld-extract-beyond): Ditto.
-+ (<multi-ifield>,gen-ifld-extract): Ditto.
-+ (<*>,cxmake-get,gen-set-quiet,gen-set-trace,gen-write): Update to new
-+ rtl evaluation code.
-+ (op:read): Build an <eval-state> to pass to gen-read.
-+ (op:write): Build an <eval-state> to pass to gen-write.
-+ (op:record-profile): Build an <eval-state> to pass to
-+ gen-record-profile.
-+ * sim-cpu.scm (gen-semantic-code): Rewrite.
-+ * sim.scm (-gen-ifld-extract-base): Call rtl-c instead of
-+ rtl-c-with-alist.
-+ (-gen-ifld-extract-beyond): Ditto.
-+ (<multi-ifield>,gen-ifld-extract): Ditto.
-+ (<hw-register>,gen-get-macro,gen-set-macro): Ditto.
-+ (<*>,cxmake-get,gen-set-quiet,gen-set-trace,gen-write): Update to new
-+ rtl evaluation code.
-+ (op:read): Build an <eval-state> to pass to gen-read.
-+ (op:write): Build an <eval-state> to pass to gen-write.
-+ (op:record-profile): Build an <eval-state> to pass to
-+ gen-record-profile.
-+
-+ * operand.scm (<operand>): Give `selector' default value of #f.
-+ Give `num' default value of -1. Give `cond?' default value of #f.
-+ (op:new-mode): Delete arg `set?', all uses updated.
-+
-+ * read.scm (reader-error): Handle #f return from port-filename.
-+ (-init-parse-cpu!): Call rtl-c-init!.
-+ (reader-install-builtin!): Call rtl-builtin!.
-+
-+ * rtl-c.scm: New file.
-+ * semantics.scm: New file.
-+ * read.scm: Load them.
-+ * rtl.scm: C generation moved to rtl-c.scm. Semantic analysis moved
-+ to semantics.scm.
-+ (<rtx-func>): Delete members syntax?,macro,c,expr. New members
-+ type,eval,num.
-+ (rtx-lookup): Renamed from -rtx-func-lookup. All callers updated.
-+ (-rtx-num-text,-rtx-max-num): New globals.
-+ (def-rtx-operand-node,define-rtx-operand-node): New procs.
-+ (-rtx-macro-lookup): New proc.
-+ (rtx-lvalue-mode-name): Renamed from rtx-expr-mode-name.
-+ (rtx-env-stack-empty?,rtx-env-stack-head): New procs.
-+ (rtx-env-var-list,rtx-env-empty-stack,rtx-env-init-stack1): New procs.
-+ (rtx-env-make,rtx-env-empty?,rtx-env-make-locals): New procs.
-+ (rtx-env-push,rtx-temp-lookup,-rtx-closure-make): New procs.
-+ (rtx-make,rtx-kind?,rtx-const?,rtx-const-value,rtx-symbol-name,
-+ rtx-operand?,rtx-operand-obj,rtx-local?,rtx-local-obj, rtx-xop-obj,
-+ rtx-index-of-value,rtx-if-mode,rtx-if-test,rtx-if-then,rtx-if-else,
-+ rtx-eq-attr-owner,rtx-eq-attr-attr,rtx-eq-attr-value): New procs.
-+ (rtx-pretty-name): New proc.
-+ (-rtx-traverser-table,-rtx-make-traverse-table): New procs.
-+ (rtx-traverse-*): Rewrite rtx traversing.
-+ (rtx-eval-*): Rewrite rtx evaluation.
-+ (rtx-compile): New proc.
-+ (rtx-simplify): New proc.
-+ (rtx-simply-eq-attr-mach,rtx-simplify-eq-attr-insn): New procs.
-+ * rtx-funcs.scm: C generation moved to rtl-c.scm.
-+ (ifield,index-of): Rewrite.
-+ (name): Renamed from `operand:'.
-+ (operand,xop,local): New rtx's.
-+ (current-insn): Rewrite.
-+ * Makefile.am (CGEN_HOB_INPUT_FILES): Add rtl-c.scm, semantics.scm.
-+ (cgen-hob.h): Remove rule for.
-+ (cgen-hob.o): Depend on cgen-hob.c only.
-+ * Makefile.in: Rebuild.
-+
-+ * utils-cgen.scm (vmake): New proc.
-+ (<context>): New class.
-+ (context-make-prefix,context-error): New procs.
-+
-+Fri Apr 9 19:26:28 1999 Jim Wilson <wilson@cygnus.com>
-+
-+ * i960.cpu: Add some ??? comments.
-+ (xnor, ornot): New instructions.
-+ (*): Delete obsolete COND-CTI and UNCOND-CTI attributes.
-+
-+1999-04-08 Doug Evans <devans@casey.cygnus.com>
-+
-+ * cos.scm (-object-error): Print better error message.
-+
-+ * pmacros.scm (-pmacro-env-make): Renamed from -env-make.
-+ (-pmacro-env-ref): Renamed from -env-ref.
-+
-+1999-03-31 Doug Evans <devans@casey.cygnus.com>
-+
-+ * hardware.scm (<hw-pc>,parse!): Allow get/set specs.
-+ (h-pc): Delete.
-+ (hardware-builtin!): Delete h-pc builtin.
-+ * arm.cpu (h-pc): Define.
-+ (h-gr): Delete get,set specs. Make array of 16 regs again.
-+ * arm7.cpu (set-logical-cc-maybe): Delete.
-+ (set-zn-flags,set-add-flags,set-sub-flags): New macros.
-+ (data processing insns): Rewrite.
-+ * m32r.cpu (h-pc): Define.
-+ * fr30.cpu (h-pc): Define.
-+ * i960.cpu (h-pc): Define.
-+ * sparc.cpu (h-pc): Define.
-+
-+ * rtl.scm (-rtx-traverse-operands): Add some error checking to LOCALS.
-+ (s-parallel): Replace do {...} while (0) with {...}.
-+ (s-sequence): Ditto.
-+
-+ * sid-cpu.scm (gen-parallel-exec-type): Make type of `written'
-+ consistent.
-+ (-gen-write-case,-gen-sem-case): Ditto.
-+ (-gen-sem-case): Only specify `written' if profiling or
-+ parallel-write-back.
-+ (-gen-scache-semantic-fn,-gen-all-semantic-fns): Put procs back in.
-+ (-gen-sem-switch-fn): New proc.
-+ (cgen-semantics.cxx): Emit either semantic fns or semantic switch
-+ based on with-sem-switch option.
-+ * sid-decode.scm (-gen-decode-insn-globals): Only define
-+ idesc_table_initialized_p if with-sem-switch. Record semantic fn
-+ addresses in idesc_table if !with-sem-switch.
-+ (-gen-sem-fn-decls): Rewrite.
-+ (-gen-idesc-decls): Define @cpu@_sem_fn type. Define `execute'
-+ member based on with-sem-switch. Only define
-+ `idesc_table_initialized_p' member if with-sem-switch.
-+ (cgen-decode.h): If !with-sem-switch, declare semantic fns.
-+ * sid.scm (-with-sem-switch?): New variable.
-+ (option-init!): Initialize it.
-+ (option-set!): Set it.
-+ (with-sem-switch?): New proc.
-+ (-op-gen-set-trace): Only emit `written' reference if profiling.
-+ (sim-finish!): Use h_pc_set to set pc.
-+
-+1999-03-30 Doug Evans <devans@casey.cygnus.com>
-+
-+ * sparccom.cpu (arith-cc-binop): New args s32-set-flags,s64-set-flags.
-+ All callers updated.
-+ (arith-carry-cc-binop): New arg set-flags. All callers updated.
-+
-+ * sid.scm (gen-argbuf-type): Delete.
-+ (-gen-argbuf-fields-union): Move to ...
-+ * sid-decode.scm: ... here.
-+
-+ * read.scm (-reader-process-expanded-1): New proc.
-+ (-reader-process-expanded): Call it to catch nested begin's.
-+ (reader-process): Move `begin' handling to -reader-process-expanded.
-+
-+ * insn.scm (-insn-read): Fix name of `format' spec.
-+
-+ * pmacros.scm (.pmacro): New builtin.
-+ (scan-symbol): If procedure macro, return macro rather than its symbol.
-+ (check-macro): Don't do lookup, instead check if (car expr) is
-+ macro object.
-+ (scan-list): Handle .pmacro.
-+ (scan): No longer re-examine text for another macro invocation.
-+ (-pmacro-build-lambda): New proc.
-+ (define-pmacro): Rewrite. If defining one pmacro to be an alias of
-+ another, fetch the other's value (rather than doing it during
-+ expansion).
-+
-+1999-03-27 Doug Evans <devans@casey.cygnus.com>
-+
-+ * Makefile.am (CGEN_HOB_INPUT_FILES): Add decode.scm.
-+ * Makefile.in: Rebuild.
-+
-+ * decode.scm (decode-get-best-bits): Use memq instead of element?.
-+ (-fill-slot!): Simplify.
-+ (-build-slots): Simplify.
-+
-+ * dev.scm (load-sid): Don't load sid-arch.scm.
-+
-+ * sid-decode.scm: Replace computed goto decoder/extractor with plain
-+ switch's.
-+ * sim-decode.scm: Replace computed goto decoder/extractor with plain
-+ switch's.
-+
-+1999-03-26 Doug Evans <devans@casey.cygnus.com>
-+
-+ * sim-decode.scm: Clean up pass. Move decoder computation into ...
-+ * decode.scm: ... here. New file.
-+ * sid-decode.scm: Use decoder computation code in decode.scm.
-+ * read.scm: Load decode.scm.
-+
-+ * arm.cpu (arm710 model): Add u-exec function unit.
-+ (h-gr): Delete CACHE-ADDR for now. Make array of 15, not 16 regs.
-+ Add get/set specs to redirect reg 15 to h-pc.
-+ (h-*): Indicate for both ARM and THUMB isas.
-+ (cbit,nbit,vbit,zbit): Ditto.
-+ (h-ibit,h-fbit,h-tbit,h-mbits): New hardware elements.
-+ (h-cpsr): Make virtual. Add get/set specs.
-+ (h-spsr-fiq,h-spsr-svc,h-spsr-abt,h-spsr-irq,h-spsr-und): New hw.
-+ (h-spsr): New virtual reg.
-+ * arm7.cpu (shift-type): New explicitly defined keyword.
-+ (h-operand2-shifttype): Use it.
-+ (set-logical-cc-maybe): Delete carry-out arg. New args arg1,arg2.
-+ All callers updated. Don't set cbit.
-+ (logical-op): Add rm to ifield list. Change case to case:. Use
-+ shift-type enum as case choices. Set cbit.
-+ (and,orr,eor,add-imm): Uncomment out.
-+ (undefined): Temporarily comment out.
-+ * thumb.scm (mov,cmp,addi8,subi8,str-sprel,ldr-sprel): s/rd/bit10-rd/.
-+ (lda-pc,lda-sp): Ditto.
-+ (ldr-pc): Rename from ldr.
-+ (cbranch): Mark insns as being thumb insns.
-+
-+ * attr.scm (<bitset-attribute>,parse-value): Recognize strings.
-+
-+ * cgen-sid.scm: Don't load sid-arch.scm.
-+ (sim-arguments): Delete unused entries.
-+ * sid-arch.scm: Delete.
-+
-+ * insn.scm (<insn>,iflds): Renamed from flds. All uses updated.
-+ (<insn>,ifld-assertions): New member.
-+ (<insn>,make!): New arg ifld-assertions, all callers updated.
-+ (<insn> accessors): Change insn:foo to insn-foo. All callers updated.
-+ (insn:fields): Delete.
-+ (-insn-parse): New arg ifld-assertions. All callers updated.
-+ (-insn-read,define-insn): New procs.
-+ (define-full-insn): New arg ifld-assertions. All callers updated.
-+ (insn-init!): New comment define-insn.
-+
-+ * model.scm (-model-parse): Ensure at least one unit specified.
-+
-+ * rtl.scm (-rtx-traverse-operands): Recognize environments.
-+ (<c-expr-temp>,get-name): New method.
-+ (-rtx-make-current-closure,s-closure): New proc.
-+ (hw:): Wrap rtx indices in a closure.
-+ (-gen-case-prefix): New proc.
-+ (s-case): Simplify.
-+ * rtx-funcs.scm (case:): Fix call to s-case.
-+ (closure): New rtx func.
-+
-+ * hardware.scm (<hardware-base>): New member isas-cache.
-+ (<hardware-base>,get-isas): New method.
-+ (hardware-builtin): Indicate for all isas.
-+ * ifield.scm (-ifield-parse): Only keep if isa+mach are kept.
-+ * mach.scm (current-arch-mach-name-list): Return list of names.
-+ (current-isa-mach-name-list): Ditto.
-+ (define-arch): Install builtin objects here.
-+ * read.scm (keep-atlist?): Only keep if both mach and isa are
-+ being kept.
-+ (keep-mach-atlist?): New proc.
-+ (keep-isa-multiple?,current-keep-isa-name-list): New proc.
-+ (reader-install-builtin!): Renamed from -install-builtin!.
-+ * sid-cpu.scm (-gen-reg-access-defns): Renamed from
-+ -gen-cpu-reg-access-defns. Rewrite.
-+ (gen-reg-access-defn): Delete.
-+ (-gen-hardware-struct): New proc.
-+ (-gen-hardware-types): Simplify. Add multiple-isa support.
-+ (gen-semantic-fn,-gen-all-semantics): Delete.
-+ (-gen-read-args,-gen-read-case,-gen-read-switch): Delete.
-+ (cgen-cpu.c,cgen-read.c,cgen-sem-switch.c,cgen-mainloop.in): Delete.
-+ (cgen-write.cxx,cgen-semantics.cxx,cgen-decode.cxx): Renamed from *.c.
-+ Call sem-analyze-insns!.
-+ (cgen-semantics.cxx): Add multiple-isa support.
-+ * sid-decode.c (-gen-idesc-decls): Add multiple-isa support.
-+ (-gen-scache-decls,-gen-decode-fn): Ditto.
-+ (cgen-decode.h): Call sem-analyze-insns!.
-+ * sid-model.scm (cgen-model.cxx): Renamed from cgen-model.c.
-+ * sid.scm (-with-multiple-isa?): New variable.
-+ (option-init!): Initialize it.
-+ (option-set!): Set it.
-+ (with-multiple-isa?): New proc.
-+ (gen-cpu-ref): New arg isas. All callers updated.
-+ (gen-cpu-class): New proc.
-+ (*-get-macro,*-set-macro): Delete.
-+ (gen-reg-get-fun-name,gen-reg-set-fun-name): New procs.
-+ (-hw-gen-fun-get): Call gen-reg-get-fun-name.
-+ (-hw-gen-fun-set): Call gen-reg-set-fun-name.
-+ (-gen-hw-index): Call rtx-c instead of rtx-c-with-temps for rtxs.
-+ (-sim-insns-analyzed): New global variable.
-+ (sim-init!): Reset it.
-+ (sim-analyze-insns!): New proc.
-+ (sim-analyze!): Don't do instruction analysis here.
-+ (sim-finish!): Specify isa of x-invalid insn.
-+ * sim.scm (sim-finish!): Specify isa of added x-* virtual insns.
-+
-+1999-03-22 Doug Evans <devans@casey.cygnus.com>
-+
-+ * thumb.cpu (cpu,mach,model): Delete.
-+ (dntf): New pmacro. Use it for all field definitions.
-+ (dntop): New pmacro. Use it for all operand definitions.
-+ (asr): Correct field list.
-+ (add,addi,sub,subi,add-sp,add-sp-neg): Ditto.
-+
-+ * utils-cgen.scm (define-getters): New macro to simplify
-+ writing class accessors.
-+ (define-setters): Ditto.
-+ (sanitize): Recognize isa elements.
-+
-+ * sid-cpu.scm (*): Replace cpu:parallel-exec? call with
-+ state-parallel-exec?.
-+ * sid-model.scm (*): Ditto.
-+ * sid-decode.scm (*): Ditto. Replace cpu:decode-assist with
-+ state-decode-assist.
-+
-+ * sid-decode.scm (decode-bits): Replace list-reverse! with reverse!.
-+ (-gen-decode-switch): Rewrite to not generate deeply nested lists.
-+ * sim-decode.scm (-gen-decode-switch): Ditto.
-+
-+ * sim-arch.scm (-regs-for-access-fns): Delete.
-+ (-biggest-reg-mode,-gen-arch-reg-access-decls): Delete.
-+ (-gen-arch-reg-access-defns): Delete.
-+
-+ * sim-cpu.scm (*): Replace cpu:liw-insns with state-liw-insns,
-+ cpu:parallel-insns with state-parallel-insns, cpu:parallel-exec?
-+ with state-parallel=exec?.
-+ (cgen-*): Call sim-analyze-insns! here.
-+ * sim-decode.scm (cgen-*): Ditto.
-+ * sim-model.scm (cgen-*): Ditto.
-+ * sim.scm (-sim-insns-analyzed): New global variable.
-+ (sim-init!): Reset it.
-+ (sim-analyze-insns!): Renamed from sim-analyze!. Keep track if we've
-+ already done the analysis.
-+
-+ * sim-model.scm (-gen-mach-defns): Add mach attribute number to
-+ MACH struct.
-+
-+ * arm.cpu: Only include arm7.cpu,thumb.cpu if necessary.
-+ (arm arch): Update isa spec.
-+ (arm,thumb isas): Define.
-+ (arm7 cpu): default-insn-bitsize,base-insn-bitsize moved to isas.
-+ (arm7tdmi mach): Add isa spec.
-+ * arm7.cpu (*): Replace subreg: with subword:. Remove unnecessary
-+ `const' on word number.
-+ * fr30.cpu (fr30 arch): Update isa spec.
-+ (fr30 isa): Define.
-+ (fr30bf cpu): default-insn-bitsize,base-insn-bitsize,decode-assist,
-+ moved to isa spec.
-+ * i960.cpu (i960 arch): Update isa spec.
-+ (i960 isa): Define.
-+ (i960base cpu): default-insn-bitsize,base-insn-bitsize,decode-assist,
-+ liw-insns,parallel-insns moved to isas spec.
-+ * m32r.cpu (m32r arch): Update isas spec.
-+ (m32r isa): Define.
-+ (m32rbf cpu): default-insn-bitsize,base-insn-bitsize,decode-assist,
-+ liw-insns,parallel-insns moved to isa spec.
-+ * sparc.cpu (sparc arch): Update isas spec.
-+ (sparc isa): Define.
-+ * sparc32.cpu (sparc32 cpu): default-insn-bitsize,base-insn-bitsize,
-+ decode-assist moved to isa spec.
-+ * sparc64.cpu (sparc64 cpu): Ditto.
-+ * sparccom.cpu (trap insns): Correct mode of result of c-call:.
-+ * desc-cpu.scm (-gen-isa-table-defns): New proc.
-+ (-gen-mach-table-defns): Output mach table.
-+ (-gen-hash-defines): Delete insn size macros, except for
-+ CGEN_MAX_INSN_SIZE.
-+ (-cgen-cpu-open): Rewrite cpu_open handling. Take stdarg list of args.
-+ (cgen-desc.h): Define MAX_ISAS.
-+ (cgen-desc.c): Include stdarg.h. Call -gen-isa-table-defns.
-+ * mach.scm (<arch>): Rename arch-data to data. New member isa-list.
-+ (arch-* accessors): Renamed from arch:*. All callers updated.
-+ (current-arch-isa-name-list): New proc.
-+ (-arch-parse-isas): Renamed from -arch-parse-isa.
-+ (def-isa-attr!): Rewrite.
-+ (<iframe>): New class.
-+ (<itype>): New class.
-+ (<isa>): Rewrite.
-+ (isa-min-insn-bitsize,isa-max-insn-bitsize): New procs.
-+ (isa-integral-insn?,isa-parallel-exec?): New procs.
-+ (-isa-parse,-isa-read,define-isa): New proc.
-+ (<cpu>): Members default-insn-bitsize,base-insn-bitsize,decode-assist,
-+ liw-insns moved to <isa>.
-+ (cpu-* accessors): Renamed from cpu:*. All callers updated.
-+ (-cpu-parse,-cpu-read): Update.
-+ (state-*): Renamed from state:*. All callers updated.
-+ (state-default-insn-bitsize,state-base-insn-bitsize): Use isa spec,
-+ not cpu.
-+ (state-parallel-insns,state-parallel-exec?,state-liw-insns): New procs.
-+ (state-decode-assist): New proc.
-+ (<derived-arch-data>): Delete min-insn-bitsize,max-insn-bitsize.
-+ (-adata-set-derived!): Rewrite.
-+ (adata-integral-insn?): Renamed from adata:integral-insn?. All
-+ callers updated.
-+ (arch-init!): Add define-isa command.
-+ * read.scm (<reader>): Default keep-isa member to (all).
-+ (reader-* accessors): Renamed from reader:*. All callers updated.
-+ (-keep-isa-set!): Call string->symbol on isa name list.
-+ (keep-isa-validate!): Rewrite.
-+ (current-isa): New proc.
-+ (keep-isa?): Recognize "all".
-+ (-init-parse-cpu!): New arg keep-isa. All callers updated.
-+ Call -keep-isa-set!.
-+ (cmd-if): Recognize keep-isa?.
-+ (cpu-load): New arg keep-isa. All callers updated.
-+ (-opt-spec-update): New proc.
-+ (common-arguments): First arg is string, not symbol.
-+ (-cgen): Call -opt-spec-update. Rewrite argument parsing.
-+
-+ * rtl.scm (rtx-get): Default mode of string arg is INT.
-+
-+ * rtl.scm (s-subword): Renamed from s-subreg. All uses updated.
-+
-+ * rtx-funcs.scm (join:): Pass cpu to handler.
-+
-+ * configure.in (guile_include_dir): Delete.
-+ * configure: Rebuild.
-+ * Makefile.in: Rebuild.
-+ * doc/Makefile.in: Rebuild.
-+
-+ * sid-cpu.scm (-extract-chunk-specs): New proc.
-+ (gen-define-fields): Use it.
-+ (-extract-chunk): New proc.
-+ (-gen-extract-beyond-var-list): Use it.
-+ (gen-extract-fields): Simplify.
-+
-+1999-03-22 Ben Elliston <bje@cygnus.com>
-+
-+ * arm7.cpu (ldri-p): New instruction.
-+ (swi): Do not vector through 0x8 yet--there is nothing there.
-+ (addi): Reinstate.
-+ (movi): Likewise.
-+ (all): Use (const x) in subreg expressions.
-+
-+1999-03-19 Ben Elliston <bje@cygnus.com>
-+
-+ * arm7.cpu (smull): Use operand field `rs', not `mul-rn'. Thinko.
-+ (smlal): Likewise.
-+
-+1999-03-17 Doug Evans <devans@casey.cygnus.com>
-+
-+ * fr30.cpu (define-arch): Specify "forced" default-alignment.
-+ * mach.scm (-parse-alignment): Recognize "forced" alignment.
-+ * sim-cpu.scm (-extract-chunk-specs): New proc.
-+ (gen-define-fields): Use it.
-+ (-extract-chunk): New proc.
-+ (-gen-extract-beyond-var-list): Use it.
-+ (gen-extract-fields): Simplify.
-+
-+ Port to guile 1.3.1.
-+ * Makefile.am (GUILEINCDIR,GUILELDFLAGS,GUILELDADD): Delete.
-+ (LIBIBERTY): New var.
-+ (HOB_OBJS): Add cgen-gh.o.
-+ (hobbit): Delete $(CFLAGS) from link, add $(LIBS) $(LIBIBERTY).
-+ * Makefile.in: Rebuild.
-+ * acconfig.h: Add HAVE_3_ARG_SCM_MAKE_VECTOR.
-+ * config.in: Rebuild.
-+ * configure.in: Add checks for libdl, libreadline, libnsl, libsocket,
-+ libncurses, libtermcap.
-+ Add checks for needed functions in guile 1.2 not in guile 1.3,
-+ and vice versa. Add test for 3 argument scm_make_vector.
-+ * configure: Rebuild.
-+ * cgen-gh.c (scm_list_length,scm_list_append,scm_list_reverse): Provide
-+ definitions if guile doesn't have them.
-+ (gh_make_vector,gh_length,gh_vector_set_x,gh_vector_ref):
-+ (cgh_vector): Replace gh_vector with gh_make_vector. Replace gh_vset
-+ with gh_vector_set_x.
-+ (cgh_qsort): Replace gh_list_length with gh_length.
-+ * cgen-gh.h: Add decls for added functions.
-+ (cgh_qsort): Don't declare if IN_HOBBIT.
-+ * cos.c: Include config.h. Replace gh_vref with gh_vector_ref,
-+ gh_vset with gh_vector_set_x, gh_list_length with gh_length,
-+ scm_make_vector with gh_make_vector.
-+ * cos.scm: Use vector-length instead of length on vectors.
-+ * dev.scm (cload): Make varargs proc with keyword/value args.
-+ * hobscmif.h: Include config.h, cgen-gh.h. Undef make_vector and
-+ provide version that works with guile 1.2 or 1.3.
-+ Include private copy of scmhob.h.
-+ * scmhob.h: New file. Keep our own copy for now.
-+
-+Tue Mar 16 13:22:01 1999 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * rtl.scm (-rtx-traverse-error): Ensure expression is output in
-+ plain text.
-+ (-rtx-traverse-operands): Dump cx temp stack if debugging.
-+ (-cx-temp-dump-stack): Pretty up output.
-+
-+ * arm.cpu: comment out thumb.cpu until isa support ready.
-+ * arm7.cpu (bl): Replace lr with (reg h-gr 14).
-+ (f-imm12,f-offset24,swi,undef): Fix thinko, add `const'.
-+ * thumb.cpu (h-gr-t,h-lr-t,h-sp-t,dnti,h-hiregs): s/MACH/ISA/.
-+
-+ * sid-decode.scm (cgen-decode.c): Call rtl-gen-init!.
-+
-+1999-03-11 Doug Evans <devans@casey.cygnus.com>
-+
-+ * hardware.scm (<hw-immediate>,mode-ok?): Ensure result is boolean.
-+ (<hw-address>,mode-ok?): unsigned/signed are compatible.
-+
-+ * operand (op:new-mode): Improve error message.
-+
-+ * arm.cpu: Move arm isa into arm7.cpu. Include arm7.cpu, thumb.cpu.
-+ * arm7.cpu: New file.
-+
-+1999-03-12 Ben Elliston <bje@cygnus.com>
-+
-+ * arm.cpu: Lots of minor fixes after desk checking.
-+
-+1999-03-11 Doug Evans <devans@casey.cygnus.com>
-+
-+ * thumb.cpu: snapshot of current work
-+
-+ * rtl.scm (rtx-get): Tweak error message.
-+
-+1999-03-10 Doug Evans <devans@casey.cygnus.com>
-+
-+ * Makefile.am (cos.o,cgen.o,cgen-gh.o): Fix dependencies.
-+ * Makefile.in: Rebuild.
-+
-+ * cos.c (cos_vector_copy): New function.
-+ (_object_copy): Use it.
-+
-+ * mode.scm (mode:eq?): Clean up.
-+ * rtl.scm (cx-new-mode): Copy attributes.
-+ (rtx-get): Don't make copy if <c-expr> with identical mode.
-+
-+ * fr30.cpu (define-arch): Delete default-insn-word-bitsize,
-+ add new isas spec.
-+ (gr-names): h-gr register names moved here.
-+ (h-gr): Update.
-+ (cr-names): h-cr register names moved here.
-+ (h-cr): update.
-+ (dr-names): h-dr register names moved here.
-+ (h-dr): update.
-+ (h-ps): Replace FUN-ACCESS attribute with get/set specs.
-+ (h-sbit,h-ccr,h-scr,h-ilm): Ditto.
-+ * i960.cpu (define-arch): Delete default-insn-word-bitsize,
-+ add new isas spec.
-+ * m32r.cpu (define-arch): Delete default-insn-word-bitsize,
-+ add new isas spec.
-+ (gr-names): h-gr register names moved here.
-+ (h-gr): Update.
-+ (cr-names): h-cr register names moved here.
-+ (h-cr): update.
-+ (h-accum): Replace FUN-ACCESS attribute with get/set specs.
-+ (h-accums,h-psw): Ditto.
-+ * sparc.cpu (define-arch): Delete default-insn-word-bitsize,
-+ add new isas spec.
-+ (gr-names): h-gr register names moved here.
-+ (h-gr-indices): Delete.
-+ (sparc32 h-gr): Update. Replace FUN-ACCESS with get/set specs.
-+ (sparc64 h-gr): Ditto.
-+ (h-y): Add get/set specs.
-+ (fp regs): Rewrite.
-+ (fp operands): Rewrite.
-+ * sparc32.cpu (h-psr): Replace FUN-ACCESS with get/set specs.
-+ (h-tbr,h-cwp,h-wim): Ditto.
-+ * sparc64.cpu (h-fpsr): Add get/set specs.
-+ * sparccom.cpu (ldd-reg+reg): Load value all at once.
-+ (fp-ld-op): New arg `dest', all callers updated.
-+ (*): Replace `make-di' with `join'.
-+
-+ * sid-cpu.scm (-gen-cpu-reg-access-defns): Use get/set specs if
-+ present.
-+ (gen-semantic-code): Save/restore rtl generator state.
-+ (cgen-cpu.h): Call rtl-gen-init!.
-+ * sid.scm (-gen-ifld-extract-base): Update call to rtx-c-with-alist.
-+ (-gen-ifld-extract-beyond): Ditto.
-+ (<multi-ifield>,gen-ifld-extract): Ditto.
-+ (all gen-read,gen-write,cxmake-get,gen-set-* methods): New arg
-+ `gstate'.
-+ (-hw-gen-set-quiet-pc): Ditto.
-+ (<hw-pc>,gen-write): Ditto.
-+ (-hw-cxmake-get): Ditto. Call getter function if present.
-+ (<hw-register>,cxmake-get-raw): New method.
-+ (<hw-register>,gen-set-quiet-raw): New method.
-+ (-hw-gen-set-quiet): New arg `gstate'.
-+ (hw-fun-access?): Delete.
-+ (gen-reg-access-defn): Output function contents.
-+ (-gen-hw-index-raw): Update call to rtx-c. Update cxmake-get
-+ invocation.
-+ (-gen-hw-index): Ditto.
-+ (op:read): Update gen-read invocation.
-+ (op:write): Update gen-write invocation.
-+ (<operand>,cxmake-get,gen-set-quiet,gen-set-trace): Handle raw-reg
-+ operands.
-+ (-op-gen-set-quiet,-op-gen-set-quiet-parallel): New arg `gstate'.
-+ (-op-gen-set-trace,-op-gen-set-trace-parallel): Ditto.
-+ (<unit>,gen-profile-code): Update to sim.scm version.
-+
-+ * sim-arch.scm (-regs-for-access-fns): New proc.
-+ (-biggest-reg-mode): New proc.
-+ (-gen-arch-reg-access-decls,-gen-arch-reg-access-defns): Rewrite.
-+ * sim-cpu.scm (-gen-hardware-types): Output get/set handlers for
-+ virtual regs separately.
-+ (-gen-cpu-reg-access-defns): Replace fun-access? with new
-+ get/set specs.
-+ (gen-semantic-code): Save/restore rtl generator state.
-+ (cgen-cpu.h): Call rtl-gen-init!.
-+ (cgen-cpu.c): Ditto. #include cgen-ops.h.
-+ * sim-model.scm: mach:cpu renamed to mach-cpu. mach:bfd-name
-+ renamed to mach-bfd-name.
-+ * sim.scm (-gen-ifld-extract-base): Update call to rtx-c-with-alist.
-+ (-gen-ifld-extract-beyond): Ditto.
-+ (<multi-ifield>,gen-ifld-extract): Ditto.
-+ (<scalar>,gen-sym-get-macro): Update call to gen-get-macro.
-+ (<scalar>,gen-sym-set-macro): Update call to gen-set-macro.
-+ (all gen-read,gen-write,cxmake-get,gen-set-* methods): New arg
-+ `gstate'.
-+ (hw-fun-access?): Delete.
-+ (-hw-gen-set-quiet-pc): New arg `gstate'.
-+ (<hw-register>,gen-get-macro): Rewrite.
-+ (<hw-register>,gen-set-macro): Rewrite.
-+ (-hw-gen-fun-get,-hw-gen-fun-set): Delete.
-+ (-hw-cxmake-get): New arg `gstate'. Rewrite.
-+ (<hw-register>,cxmake-get-raw): New method.
-+ (-hw-gen-set-quiet): New arg `gstate'. Rewrite.
-+ (<hw-register>,gen-set-quiet-raw): New method.
-+ (-gen-hw-index-raw): Update call to rtx-c. Update cxmake-get
-+ invocation.
-+ (-gen-hw-index): Ditto.
-+ (<hw-index>): New arg `gstate'.
-+ (-gen-hw-selector): Update call to rtx-c.
-+ (<pc>): New arg `gstate'.
-+ (op:read): Update gen-read invocation.
-+ (op:write): Update gen-write invocation.
-+ (<operand>,cxmake-get): Handle raw-reg.
-+ (-op-gen-set-quiet,-op-gen-set-quiet-parallel): New arg `gstate'.
-+ (-op-gen-set-trace,-op-gen-set-trace-parallel): Ditto.
-+ (<operand>,gen-set-quiet): Handle raw-reg.
-+ (<operand>,gen-set-trace): Handle raw-reg.
-+ (-gen-mach-data): mach:cpu renamed to mach-cpu.
-+
-+ * desc-cpu.scm (gen-operand-decls): Take nub of operands for
-+ cgen_operand_type enum.
-+ (gen-operand-table): Add operand type enum. Replace pointer to
-+ hardware element with its enum. Null terminate table.
-+ (-gen-cpu-open): Add new `isa' argument to @arch@_cgen_cpu_open.
-+ Build operand table.
-+ * ifield.scm (-ifield-parse): Recognize ISA attribute.
-+ * mach.scm (<arch-data>): New member `isas'.
-+ (adata-isas): New accessor.
-+ (<isa>): New class.
-+ (isa-default-insn-word-bitsize): New accessor.
-+ (isa-enum): New proc.
-+ (current-arch-default-insn-word-bitsize): Delete.
-+ (current-isa-list,current-isa-lookup): New procs.
-+ (-arch-parse-isa): New proc.
-+ (-arch-parse): Rewrite.
-+ (-arch-read): Recognize `isas'. Delete `default-insn-word-bitsize'.
-+ (define-arch): Define ISA attribute.
-+ (def-isa-attr!,isa-supports?): New procs.
-+ (<mach>): New member `isas'.
-+ (mach-isas): New accessor.
-+ (-mach-parse): New arg `isas', all callers updated.
-+ (-mach-read): Recognize `isas'.
-+ (arch-finish!): Rewrite.
-+ * opc-ibld.scm (-gen-fget-switch): Add `cd' arg to
-+ @arch@_cgen_get_{int,vma}_operand.
-+ (-gen-fset-switch): Add `cd' arg to @arch@_cgen_set_{int,vma}_operand.
-+ * opc-opinst.scm (-gen-operand-instance): Output operand enum instead
-+ of pointer to table entry.
-+ * opcodes.scm (gen-switch): Handle multiply defined operands.
-+ * operand.scm (op-sort): New proc.
-+
-+ * hardware.scm (<hardware-base>): Rename getters/setters to get/set.
-+ (hw-getter,hw-setter): Renamed from hw-getters,hw-setter.
-+ (hw-enum): Accept symbol argument.
-+ (hardware-builtin!): Delete attribute FUN-ACCESS.
-+ * ifield.scm (ifld-encode-mode,ifld-decode-mode): New procs.
-+
-+ * attr.scm (atlist-source-form): New proc.
-+ (attr-builtin!): New attr `PRIVATE'.
-+ * desc.scm (<keyword>,gen-defn): Make keyword entry table static.
-+ * desc-cpu.scm (-gen-hw-defn): Only output index and value tables
-+ if they have `PRIVATE' attribute.
-+ (gen-hw-table-defns): Output definitions of explicitly defined
-+ keyword tables.
-+ * hardware.scm (<keyword>): New member print-name. Rename member
-+ `value' to `values', all uses updated.
-+ (kw-mode,kw-print-name,kw-prefix,kw-values): New procs.
-+ (keyword-parse): Rewrite.
-+ (-keyword-read): New proc.
-+ (define-keyword): New proc.
-+ (-hw-parse-keyword): New proc.
-+ (-hw-parse-indices): Rewrite keyword handling, support new index spec
-+ `extern-keyword'.
-+ (-hw-parse-values): Ditto.
-+ (-hw-parse-get,-hw-parse-set): Rewrite.
-+ (hardware-init!): Add new comment define-keyword.
-+ * mach.scm (<arch>): New member `kw-list'.
-+ (arch:kw-list,arch_set-kw-list!): New accessors.
-+ (current-kw-list,current-kw-add!,current-kw-lookup): New procs.
-+
-+ * hardware.scm (<hw-register>,mode-ok?): Rewrite.
-+ * mode.scm (mode-class-integral?): New proc.
-+ (mode-class-float?,mode-class-numeric?): New procs.
-+ (mode-integral?,mode-float?,mode-numeric?): New procs.
-+ (mode-compatible?): New proc.
-+ * opcodes.scm (<ifield>,gen-insert): Update alist arg to
-+ rtx-c-with-alist.
-+ (<ifield>,gen-extract): Ditto.
-+ * rtl.scm (-rtl-simulator?,-rtx-current-obj): Delete.
-+ (<gstate>): New class.
-+ (gstate-simulator?,gstate-set-simulator?!): New accessors.
-+ (gstate-context,gstate-set-context!): New accessors.
-+ (gstate-macro?,gstate-set-macro?!): New accessors.
-+ (gstate-make,gstate-copy): New procs.
-+ (-rtl-current-gstate): New global.
-+ (current-gstate-simulator?): New proc.
-+ (current-gstate-context,current-gstate-macro?): New procs.
-+ (current-gstate,current-gstate-set!): New procs.
-+ (rtl-gen-init!): Rewrite.
-+ (-rtx-valid-types): Add INTMODE, FLOATMODE, NUMMODE.
-+ (tstate-make): New arg `gstate', all callers updated.
-+ (tstate-set-expr-fn!,tstate-set-op-fn!): New accessors.
-+ (tstate-set-cond?!,tstate-set?,tstate-set-set?!): New accessors.
-+ (tstate-gstate,tstate-set-gstate!): New accessors.
-+ (tstate-copy): New proc.
-+ (tstate-new-cond?,tstate-new-set?): Rewrite.
-+ (-rtx-traverse-operands): Handle INTMODE, FLOATMODE, NUMMODE.
-+ (rtx-traverse): New arg `gstate', all callers updated.
-+ (rtx-strdump): New proc.
-+ (-simplify-for-compilation): New arg `gstate', all callers updated.
-+ (semantic-in-out-operands): Ditto.
-+ (semantic-attrs): Ditto.
-+ (rtx-eval): Rewrite. New arg `gstate', all callers updated.
-+ (rtx-eval-with-temps,rtx-eval-with-alist): Ditto.
-+ (rtx-value): Rewrite.
-+ (<c-expr>,gen-name): New method.
-+ (<c-expr>,gen-set-quiet): New arg `gstate', all callers updated.
-+ (<c-expr>,gen-set-trace): New arg `gstate', all callers updated.
-+ (cx-new-mode): New proc.
-+ (-rtx-c-with-tstate): New proc.
-+ (rtx-c,rtx-c-with-temps,rtx-c-with-alist): New arg `gstate', all
-+ callers updated.
-+ (-rtx-mode): Rewrite.
-+ (-rtx-mode-compatible?): New proc.
-+ (<c-expr-temp>): New member `value'.
-+ (cx-temp:value): New accessor.
-+ (<c-expr-temp>,make!): Override default method.
-+ (<c-expr-temp>,cxmake-get): Rewrite.
-+ (<c-expr-temp>,gen-set-quiet): Rewrite.
-+ (<c-expr-temp>,gen-set-trace): Rewrite.
-+ (gen-temp-defs): Use cx-temp:value.
-+ (record-temp!): New arg value, all callers updated.
-+ (cx-temp:cx:make): Delete.
-+ (-cx-temp-dump-stack): New proc.
-+ (rtx-get): New arg `gstate', all callers updated. Do mode
-+ compatibility checks. Ensure result has specified mode.
-+ (rtx-set-quiet): New arg `gstate', all callers updated.
-+ (rtx-set-trace): Ditto.
-+ (s-c-call): New arg `tstate', all callers updated.
-+ (s-c-raw-call): Ditto.
-+ (s-unop,s-binop,s-binop-with-with,s-shop,s-boolifop,s-convop): Ditto.
-+ (s-cmpop,s-if,e-if): Ditto.
-+ (s-subreg): New proc.
-+ (-par-new-temp!): New proc.
-+ (-par-next-temp!): Rewrite.
-+ (-par-replace-set-dests): Use -par-new-temp!.
-+ (s-parallel): Rewrite temp handling. Use -rtx-c-with-state.
-+ (s-sequence): Use -rtx-c-with-state.
-+ * rtx-funcs.scm (*): Update.
-+ (raw-reg:): New rtx function.
-+ (make-di): Delete.
-+ (join:,subreg:): New rtx functions.
-+
-+ * insn.scm (<insn>): New members pre-cond-trap, condition,
-+ post-cond-trap, compiled-condition.
-+
-+ * insn.scm (syntax-break-out): Replace eval with current-op-lookup.
-+
-+ * opcodes.scm (<pc>,cxmake-get): New arg `selector'.
-+
-+ * utils-cgen.scm (parse-symbol): New proc.
-+ (parse-string): New proc.
-+ (gen-get-macro,gen-set-macro): New arg `index-args'.
-+ (gen-set-macro2): Ditto. Enclose code in do { } while (0).
-+ Prepend \ to newlines.
-+
-+ * utils.scm (alist-remove-duplicates): Delete.
-+
-+ * sid.scm (sim-init!): Delete private debugging code.
-+
-+1999-03-10 Frank Ch. Eigler <fche@cygnus.com>
-+
-+ * cgen-sid.scm: New file for C++ simulator application.
-+ * sid-arch.scm: Ditto.
-+ * sid-cpu.scm: Ditto.
-+ * sid-decode.scm: Ditto.
-+ * sid-model.scm: Ditto.
-+ * sid.scm: Ditto.
-+ * utils-cgen.scm (gen-mach-sid-name): Remove this accident.
-+
-+1999-03-05 Ben Elliston <bje@cygnus.com>
-+
-+ * arm.cpu: New file.
-+
-+1999-03-03 Doug Evans <devans@casey.cygnus.com>
-+
-+ * Makefile.am (CGEN_HOB_INPUT_FILES): Add hardware.scm.
-+ * Makefile.in: Rebuild.
-+
-+ * attr.scm (<integer-attribute>,parse-value-def): Tweak.
-+ (-attr-parse): Validate default value.
-+
-+ * read.scm (-CGEN-VERSION): Change to 0.7.1.
-+ (-CGEN-LANG-VERSION): Ditto.
-+ (-keep-all-machs): Renamed from -keep-all, all uses updated.
-+ (<reader>): New member keep-isa plus accessors.
-+ (-keep-isa-set!,keep-isa-validate!): New procs.
-+ (keep-isa?,keep-isa-atlist?,keep-isa-obj?): New procs.
-+ (common-arguments): New variable.
-+ (cgen-usage,getarg,catch-with-backtrace,option-arg): New procs.
-+ (-debug-repl,continue): New procs.
-+ (-cgen,cgen): New procs.
-+ * cgen-gas.scm: Rewrite.
-+ * cgen-opc.scm: Rewrite.
-+ * cgen-sim.scm: Rewrite.
-+ * cgen-stest.scm: Rewrite.
-+
-+ * gas-test.scm (gas-test-init!): Call opcodes-init!.
-+ (gas-test-finish!): Call opcodes-finish!.
-+ (gas-test-analyze!): Call opcodes-analyze!.
-+ (<hw-asm>): New method test-data.
-+ (<operand>,testdata): Rewrite.
-+ * sim-test.scm (sim-test-init!): Call opcodes-init!.
-+ (sim-test-finish!): Call opcodes-finish!.
-+ (sim-test-analyze!): Call opcodes-analyze!.
-+ (<hw-asm>): New method test-data.
-+ (<operand>,testdata): Rewrite.
-+
-+1999-03-01 Doug Evans <devans@casey.cygnus.com>
-+
-+ * fixup.scm (reverse!): Define if missing.
-+ * *.scm: Use reverse! instead of list-reverse!.
-+
-+ * utils.scm (leading-id-char?): New proc.
-+ (id-char?): Rewrite.
-+ (chars-until-delimiter): New proc.
-+ * opc-itab.scm (extract-syntax-operands): Rewrite.
-+ (strip-mnemonic): Rewrite.
-+ (compute-syntax): Rewrite.
-+
-+ * pmacros.scm (-pmacro-substr): New proc.
-+ (pmacros-init!): Add builtin .substr.
-+
-+1999-02-26 Doug Evans <devans@casey.cygnus.com>
-+
-+ * thumb.cpu: New file.
-+
-+1999-02-24 Doug Evans <devans@casey.cygnus.com>
-+
-+ * Makefile.am (CGENCFLAGS): New variable.
-+ (WITH_HOBBIT): Use automake conditional.
-+ (CGEN_HOB_SRC): New variable.
-+ (libcpu_a_SOURCES): Use $(CGEN_HOB_SRC).
-+ (*.o): Compile with CGENCFLAGS.
-+ (cgen-hob.c): Simplify.
-+ (cgen-nohob.c): New rule.
-+ (hobbit): Renamed from hob.x.
-+ (CLEANFILES): Add cgen-nohob.c.
-+ * Makefile.in: Rebuild.
-+ * doc/Makefile.in: Rebuild.
-+ * configure.in (AM_INIT_AUTOMAKE): Update CGEN version to 0.7.1.
-+ (WITH_HOBBIT): Use AM_CONDITIONAL.
-+ * configure: Rebuild.
-+ * aclocal.m4: Rebuild.
-+
-+ * sim-arch.scm (-gen-arch-reg-access-defns): Replace string-map
-+ with string-write-map.
-+
-+ * sim-cpu.scm (hw-need-storage?): New proc.
-+ (-gen-hardware-types): Use it.
-+ (gen-parallel-exec-elm): Call op-save-index?.
-+
-+ * sim-decode.scm (cgen-decode.c): Call rtl-gen-init!.
-+
-+ * sim.scm (-gen-ifld-extract-base): Use mode:class instead of
-+ UNSIGNED attribute.
-+ (-gen-ifld-extract-beyond): Ditto.
-+ (<integer>): Delete all references.
-+ (<sim-hardware>): Delete.
-+ (hw-profilable?): New proc.
-+ (<hardware-base>): New methods gen-get-macro,gen-set-macro.
-+ (<hw-register>): Rename method get-index-mode to save-index?.
-+ (<hw-register>): New methods gen-get-macro,gen-set-macro.
-+ (<hw-register>,gen-sym-decl): Make virtual.
-+ (<hw-memory>,gen-sym-decl): Make virtual.
-+ (<hw-memory>): Rename method get-index-mode to save-index?.
-+ (<hw-address>,gen-sym-decl): Make virtual.
-+ (<operand>): New method save-index?.
-+ (sim-init!): Delete calls to sim-hw-init!,sim-hw-init-parsers!.
-+
-+ * opc-itab.scm (opc-{parse,insert,extract,print}-handlers): opc-
-+ prefix added. All uses updated.
-+
-+ * opc-opinst.scm (-gen-operand-instance): Output hw enum value
-+ rather than pointer to table entry.
-+
-+ * opcodes.scm: Remove all attribute support, lives in desc.scm.
-+ Remove all hw-asm,op-asm support.
-+ (-gen-parse-number,-gen-parse-address): New procs.
-+ (<keyword>,gen-parse): Redo function name computation.
-+ (<keyword>,gen-print): Ditto.
-+ (<operand>,gen-function-name): Rewrite.
-+ (<operand>,gen-fget,gen-fset,gen-parse,gen-print): Ditto.
-+ (opcodes-init!): Delete call to add-parser!.
-+
-+ * desc-cpu.scm (gen-hw-decls): Rename enum hw_type to cgen_hw_type.
-+ Define enum using hardware semantic name.
-+ (-gen-hw-decl,-gen-hw-defn): New procs.
-+ (gen-hw-table-decls): Use -gen-hw-decl.
-+ (gen-hw-table-defns): Use -gen-hw-defn. Rewrite generation of
-+ CGEN_HW_ENTRY structs.
-+ (gen-operand-table): Output hw's enum, not pointer to table entry.
-+ (-gen-cpu-open): Build table of selected hardware elements.
-+
-+ * desc.scm (-hw-asm-specs,-parse-hw-asm): Delete.
-+ (<hardware> support): Delete.
-+ (<hw-asm>): Delete, moved to hardware.scm.
-+ (normal-hw-asm,hw-asm:parse,hw-asm:print): Delete.
-+ (<hw-asm>,gen-table-entry): New method.
-+ (<hw-asm>,parse!): Delete.
-+ (<keyword>,gen-table-entry): New method.
-+ (<keyword>,parse!): Delete.
-+ (<hw-{register,memory,immediate,address}>): Delete forwarding methods
-+ for gen-decl,gen-defn,gen-ref,gen-init.
-+ (desc-init!): Don't create parser for operand asm specs.
-+
-+ * attr.scm (attr-builtin!): Delete UNSIGNED attribute.
-+ * ifield.scm (<ifield>): New member `mode'.
-+ (<ifield>,make!): New arg `mode'.
-+ (ifld-mode): Rewrite.
-+ (ifld-hw-type): Rewrite.
-+ (<ifield>,min-value): Rewrite.
-+ (<ifield>,max-value): Rewrite.
-+ (-ifield-parse): New arg `mode'.
-+ (-ifield-read): Update.
-+ (define-full-ifield): New arg `mode'.
-+ (define-full-multi-ifield): Ditto.
-+ (-multi-ifield-parse): Ditto.
-+ (-multi-ifield-read): Update.
-+ (define-full-multi-ifield): New arg `mode'.
-+ (ifield-builtin!): Update definition of f-nil.
-+ * simplify.inc (define-normal-ifield): Update call to
-+ define-full-ifield.
-+ (define-normal-multi-ifield): Update call to define-full-multi-ifield.
-+ (define-normal-hardware): Delete arg asm. New args indices, values,
-+ handlers. Update call to define-full-hardware.
-+ (define-simple-hardware,dsh): New pmacros.
-+ (define-normal-operand): Update call to define-full-operand.
-+ * fr30.cpu (f-*): Delete UNSIGNED attribute. Default is now UNSIGNED.
-+ Specify INT/UINT mode instead.
-+ (h-gr,h-cr): Use "indices" instead of "asm".
-+ (h-dr,h-ps): Update keyword syntax.
-+ (h-r13,h-r14,h-r15): Ditto.
-+ (h-nbit,h-zbit,h-vbit,h-cbit): Use dsh instead of dnh.
-+ (h-d0bit,h-d1bit,h-ibit,h-sbit,h-tbit,h-ccr,h-scr,h-ilm): Ditto.
-+ (m4): Fix typo on HASH-PREFIX. Use "handlers" instead of "asm".
-+ (reglist_low_ld,reglist_hi_ld,reglist_low_st,reglist_hi_st): Ditto.
-+ * i960.cpu (f-*): Delete UNSIGNED attribute. Default is now UNSIGNED.
-+ Specify INT/UINT mode instead.
-+ (h-gr): Use "indices" instead of "asm".
-+ (h-cc): Update keyword syntax.
-+ * m32r.cpu (f-*): Delete UNSIGNED attribute. Default is now UNSIGNED.
-+ Specify INT/UINT mode instead.
-+ (h-hi16,h-slo16,h-ulo16): Update.
-+ (h-gr,h-cr): Use "indices" instead of "asm".
-+ (h-accum,h-cond,h-psw,h-bpsw,h-bbpsw,h-lock): Use dsh instead of dnh.
-+ (h-accums): Update keyword syntax.
-+ (hash,hi16,slo16,ulo16): Use "indices" instead of "asm".
-+ * sparc.cpu (f-*): Delete UNSIGNED attribute. Default is now UNSIGNED.
-+ Specify INT/UINT mode instead.
-+ (h-gr-indices): New pmacro.
-+ (h-gr32,h-gr64): Split up from h-gr.
-+ (h-a): Update type spec. Use values instead of asm spec.
-+ (h-icc-[cnvz],h-xcc-[cnvz]): Use dsh instead of dnh.
-+ (h-y,h-annul-p): Ditto.
-+ (h-asr): Update keyword spec.
-+ (h-lo10,h-lo13,h-hi22): Update.
-+ (get-freg-spec,set-freg-spec): New pmacros.
-+ (h-fr32,h-fr64): Split up from h-fr.
-+ (rdd): Comment out get/set specs.
-+ (lo10,lo13,hi22): Use "handlers" instead of "asm".
-+ * sparc32.cpu (h-psr): Use dsh instead of dnh.
-+ (h-s,h-ps,h-pil,h-et,h-tbr,h-cwp,h-ag,h-ec,h-ef,h-fsr): Ditto.
-+ * sparc64.cpu (f-*): Delete UNSIGNED attribute. Default is now
-+ UNSIGNED. Specify INT/UINT mode instead.
-+ (h-*): Use dsh instead of dnh where appropriate.
-+ (h-ixcc): Update type spec. Use "values" instead of "asm".
-+ (h-p,h-membarmask): Ditto.
-+ (membarmask): Use "handlers" instead of "asm".
-+
-+ * hardware.scm (<hardware-base>): New member sem-name,type,indices,
-+ values,handlers,getters,setters plus accessors.
-+ (hw-mode-ok?,hw-default-mode): New procs.
-+ (<hardware-base>): Rename method new-mode to mode-ok?
-+ (<hardware-base>): New method get-index-mode.
-+ (hw-index-mode): New proc.
-+ (pc?): Delete, moved to operand.scm.
-+ (address?): New proc.
-+ (<hardware>): Delete.
-+ (<hw-asm>): Definition moved here from desc.scm.
-+ (keyword-parse): New proc.
-+ (hardware-parsers): Delete.
-+ (-parse-hw-type,-parse-hw-asm,-parse-hw-profile): Delete.
-+ (-hw-parse-indices,-hw-parse-values,-hw-parse-handlers): New procs.
-+ (-hw-parse-get,-hw-parse-set): New procs.
-+ (-hw-parse): Delete args aasm,profile,extra. New args semantic-name,
-+ indices,values,handlers,get,set. Rewrite.
-+ (-hw-read-extra): Delete.
-+ (-hw-read): Update.
-+ (define-hardware): Don't add object if not selected.
-+ (define-full-hardware): Ditto.
-+ (current-hw-sem-lookup,current-hw-sem-lookup-1): New procs.
-+ (<hw-register>): Member `type' moved to baseclass. Delete member
-+ hw-asm.
-+ (<hw-register>,parse!): Rewrite.
-+ (<hw-register>): Delete methods get-rank,get-mode.
-+ (<hw-register>): Method new-mode renamed to mode-ok?
-+ (<hw-register>): New method get-index-mode.
-+ (<hw-pc>,parse!): Rewrite.
-+ (<hw-memory>): Member `type' moved to baseclass. Delete member hw-asm.
-+ (<hw-memory>,parse!): Rewrite.
-+ (<hw-memory>): Delete methods get-rank,get-mode.
-+ (<hw-memory>): Method new-mode renamed to mode-ok?
-+ (<hw-memory>): New method get-index-mode.
-+ (<hw-immediate>): Member `type' moved to baseclass. Delete member
-+ hw-asm.
-+ (<hw-immediate>,parse!): Rewrite.
-+ (<hw-immediate>): Delete methods get-rank,get-mode.
-+ (<hw-immediate>): Method new-mode renamed to mode-ok?
-+ (<hw-address>): Delete member hw-asm.
-+ (<hw-address>,parse!): Rewrite.
-+ (<hw-address>): Delete methods get-rank,get-mode.
-+ (<hw-address>): Method new-mode renamed to mode-ok?
-+ (hw-profilable?): Delete.
-+ (hardware-init!): Delete hardware-parsers reference.
-+ Update argument specs of command define-full-hardware.
-+ (hardware-builtin!): Update definitions of hardware builtins.
-+ * operand.scm (<operand>): New members hw-name,mode-name.
-+ Delete member op-asm. New member handlers.
-+ (<operand>,make!): Update.
-+ (op:hw-name,op:mode-name,op:handlers): New procs.
-+ (op:type): Rewrite.
-+ (op:mode): Rewrite.
-+ (<operand>): New method get-index-mode.
-+ (<pc>,make!): Update.
-+ (op:new-mode): Rewrite.
-+ (operand-parsers): Delete.
-+ (-operand-parse): Rewrite. Return #f if insn not selected.
-+ (-op-read-extra): Delete.
-+ (-operand-read): Update.
-+ (define-operand,define-full-operand): Update.
-+ (operand-init!): Delete operand-parsers reference.
-+ Update syntax of define-full-operand command.
-+
-+ * insn.scm (-insn-parse): Rewrite. Return #f if insn not selected.
-+ (define-full-insn): Update.
-+ * minsn.scm (-minsn-parse): Rewrite. Return #f if insn not selected.
-+ (define-full-minsn): Update.
-+
-+ * mode.scm (<mode>): New member class.
-+ (mode:class): New proc.
-+ (mode?): Rewrite.
-+ (-mode-parse): New arg class.
-+ (define-full-mode): Update.
-+ (mode-find): Rewrite.
-+ (mode-make-int,mode-make-uint): New procs.
-+ (mode-init!): Update syntax of define-full-mode command.
-+ (mode-builtin!): Update definitions of builtin modes.
-+
-+ * model.scm (<profile>): Delete.
-+
-+ * read.scm (keep-atlist?): New proc.
-+ (keep-multiple?): New proc.
-+ (<parser-list>): Delete.
-+ (add-parser!,parse-spec!): Delete.
-+
-+ * rtl.scm (def-rtx-node): Prepend arg *tstate* to all handlers.
-+ (def-rtx-syntax-node): Ditto.
-+ (-rtx-traverse-debug?): New variable.
-+ (tstate-make): New proc.
-+ (tstate-expr-fn,tstate-op-fn,tstate-cond?,tstate-set?): New procs.
-+ (tstate-new-cond?,tstate-new-set?): New procs.
-+ (-rtx-traverse-normal): Delete args cond?,expr-fn,op-fn. New arg
-+ tstate. All callers updated.
-+ (-rtx-traverse-expr,-rtx-traverse-debug): Ditto.
-+ (-rtx-traverse-list,-rtx-traverse-operands): Ditto.
-+ (-build-operand!): Replace arg cond? with tstate.
-+ (-build-reg-operand!,-build-mem-operand!): Ditto.
-+ (-build-index-of-operand!): Update making of <operand> object.
-+ (s-ifield): New arg tstate. All callers updated.
-+ (hw:): New arg tstate. All callers updated. Replace call to
-+ current-hw-lookup with current-hw-sem-lookup-1.
-+ (s-index-of): New arg tstate. All callers updated.
-+ (reg:,mem:): Ditto.
-+ (-rtx-use-sem-fn?): New proc.
-+ (s-unop,s-binop,s-shop): Use it. Only use semantic mode when using
-+ semantic cover fns.
-+ (s-convop): Only use semantic mode when using semantic cover fns.
-+ (s-cmpop): Call -rtx-use-sem-fn?.
-+ (s-cond,s-case): New arg tstate. All callers updated.
-+ (s-parallel,s-sequence): Ditto.
-+
-+ * rtx-funcs.scm (set,set-quiet:): Use SETRTX to mark the set dest.
-+
-+ * types.scm (<scalar>): Rewrite implementation.
-+ (<integer>): Delete.
-+ (parse-type): Rewrite.
-+
-+ * utils-cgen.scm (parse-handlers): New proc.
-+
-+ * utils.scm (!=): New proc.
-+
-+Tue Feb 23 12:10:29 1999 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * pmacros.scm (-pmacro-expand): Fix typo.
-+
-+1999-02-12 Doug Evans <devans@casey.cygnus.com>
-+
-+ * pmacros.scm (-pmacro-hex,-pmacro-upcase,-pmacro-downcase): New procs.
-+ (pmacros-init!): Install builtins .hex, .upcase, .downcase.
-+ * i960.cpu (build-hex2): New pmacro.
-+ (insn-opcode): Simplify.
-+ (insn-opcode2): Ditto.
-+
-+ * cgen-sim.scm (catch-with-backtrace): Comment out debugging printf.
-+ * cgen-stest.scm (catch-with-backtrace): Ditto.
-+
-+1999-02-11 Doug Evans <devans@casey.cygnus.com>
-+
-+ * pmacros.scm (-pmacro-lookup): Renamed from -pmacro-ref.
-+ All callers updated.
-+ (-pmacro-invoke): New proc.
-+ (-pmacro-sym,-pmacro-str): New procs.
-+ (-pmacro-iota,-pmacro-map,-pmacro-apply): New procs.
-+ (pmacros-init!): Install builtins .iota, .map, .apply.
-+ * sparc.cpu (cc-tests): Add CC_NZ,CC_Z,CC_GEU,CC_LU aliases.
-+ (h-fr): Simplify register name spec.
-+ * sparc64.cpu (cond-move-1): New arg mnemonic. All callers updated.
-+ * utils.scm (num-args-ok?): New proc.
-+
-+1999-02-10 Doug Evans <devans@casey.cygnus.com>
-+
-+ * pmacros.scm (-pmacro-error): New proc.
-+ (-pmacro-expand): Use it.
-+ (-pmacro-splice): New proc.
-+ (pmacros-init!): Install new builtin .splice.
-+
-+ * sparc.cpu: Include sparc64.cpu when appropriate.
-+ (f-mmask,f-simm11): Moved to sparc64.cpu.
-+ (insn-fmt2): Add FLUSH,FLUSHW,IMPDEP1,IMPDEP2,MEMBAR,MOVCC.
-+ (ANNUL attribute): Delete.
-+ (test-* pmacros): New arg cc, all callers updated.
-+ (uncond-br-sem,cond-br-sem): New arg cc, all callers updated.
-+ * sparc32.cpu (atom-op): Moved to sparccom.cpu and renamed to
-+ atomic-opc.
-+ (ldstub,swap): Moved to sparccom.cpu.
-+ * sparc64.cpu: Add more insns.
-+
-+1999-02-09 Doug Evans <devans@casey.cygnus.com>
-+
-+ * sim-cpu.scm (cgen-semantics.c): Replace CGEN_INSN_ATTR with
-+ CGEN_ATTR_VALUE.
-+ (cgen-sem-switch.c): Ditto.
-+ * sim-decode.scm (-gen-idesc-decls): struct idesc definition
-+ moved to cgen-engine.h.
-+ (-gen-insn-sem-type): Delete, struct insn_sem mvoed to cgen-engine.h.
-+ (-gen-idesc-init-fn,init_idesc): Lookup insn table via descriptor, not
-+ global. Cache attributes and insn length in IDESC.
-+ * sim-model.scm (-gen-cpu-defns): Generate new func @cpu@_prepare_run.
-+ @cpu@_opcode renamed to @cpu@_get_idata.
-+ (-gen-mach-defns,@mach@_init_cpu): Don't initialize IDESC table here,
-+ done later underneath sim_resume.
-+ (@mach@_mach): Record @cpu@_prepare_run.
-+ * sim.scm (<hardware-base>,cxmake-get): New arg selector, all callers
-+ updated.
-+ (-hw-gen-set-quiet-pc): Ditto.
-+ (-hw-cxmake-get,-hw-gen-set-quiet): Ditto.
-+ (<hw-memory>,cxmake-get,gen-set-quiet): Ditto.
-+ (<hw-addr>,cxmake-get): Ditto.
-+ (<hw-iaddr>,cxmake-get): Ditto.
-+ (<pc>,cxmake-get): Ditto.
-+ (<operand>,cxmake-get,gen-set-quiet,gen-set-trace): Ditto.
-+ (-op-gen-set-quiet,-op-gen-set-quiet-parallel): Ditto.
-+ (-op-gen-set-trace,-op-gen-set-trace-parallel): Ditto.
-+ (<hw-pc>,gen-write): Use hw-selector-default.
-+ (<hw-register>,gen-write): Ditto.
-+ (<hw-memory>,gen-write): Ditto.
-+ (-gen-hw-index-raw,-gen-hw-index): Handle selector.
-+ (-gen-hw-selector): New proc.
-+
-+ * desc.scm: New file.
-+ * desc-cpu.scm: New file.
-+ * opcodes.scm: Split up into several smaller files.
-+ * opc-asmdis.scm: New file.
-+ * opc-ibld.scm: New file.
-+ * opc-itab.scm: New file.
-+ * opc-opinst.scm: New file.
-+ * Makefile.am (desc): New target.
-+ (opcodes): Update args to cgen-opc.scm.
-+ * Makefile.in: Rebuild.
-+ * aclocal.m4: Rebuild.
-+ * config.in: Rebuild.
-+ * configure.in: Update arg to AC_INIT.
-+ Update version number to 0.7.0. Change AM_EXEEXT to AC_EXEEXT.
-+ Update AC_PREREG arg to 2.13. Change AM_PROG_INSTALL to
-+ AC_PROG_INSTALL.
-+ * configure: Rebuild.
-+ * cgen-gas.scm: Update files to load.
-+ * cgen-opc.scm: Ditto. Reorganize option letters.
-+ * cgen-sim.scm: Update files to load.
-+ * cgen-stest.scm: Ditto.
-+ * dev.scm (cload): New app "DESC".
-+ (load-opc): Update files to load.
-+ (load-gtest,load-sim,load-stest): Ditto.
-+
-+ * attr.scm (bool-attr?): New proc.
-+ (attr-list-enum-list): New proc.
-+ (-attr-sort): Rewrite.
-+ (attr-builtin!): Give ALIAS attribute a fixed index.
-+ * utils-cgen.scm (gen-attr-enum-decl): Call attr-list-enum-list to
-+ calculate attribute enum list.
-+ (gen-attr-mask): Subtract CGEN_ATTR_BOOL_OFFSET from attribute's enum.
-+
-+ * insn.scm (-insn-parse): Renamed from parse-insn.
-+
-+ * hardware.scm (-hw-parse): New arg errtxt, all callers updated.
-+ (-hw-read): Ditto.
-+
-+ * mode.scm (-mode-parse): Renamed from parse-mode.
-+
-+ * operand.scm (<operand>): New member `selector'.
-+ (<operand>,make!): Use default selector.
-+ (hw-selector-default): New variable.
-+ (hw-selector-default?): New proc.
-+
-+ * pmacros.scm (pmacros-init!): New proc.
-+ (-pmacro-{make,name,arg-spec,transformer,comment}): New procs.
-+ (-env-set!): Delete.
-+ (-pmacro-expand): New proc apply-macro.
-+ Use it in scan-list,scan. Scan list first, then see if macro
-+ invocation.
-+ (define-pmacro): Rewrite.
-+ * read.scm (-init-parse-cpu!): Call utils-init!,parse-init!.
-+
-+ * rtl.scm (-simplify-for-compilation): Ensure at least one mach
-+ selected if (current-mach) seen.
-+ (rtx?): Renamed from rtx-uneval?, all callers updated.
-+ (<c-expr>,gen-set-quiet,gen-set-trace): New arg selector, all callers
-+ updated.
-+ (<c-expr-temp>,cxmake-get,gen-set-quiet,gen-set-trace): New arg
-+ selector, all callers updated.
-+ (hw:): New arg selector, all callers updated. Delete old comments
-+ and code.
-+ (reg:,mem:): Handle selectors
-+ * rtx-funcs.scm (reg:): Handle selectors.
-+
-+ * read.scm: Renamed from cpu.scm.
-+ (<command>): New class.
-+ (<reader>): New member commands.
-+ (reader-add-command!): New proc.
-+ (reader-lookup-command): New proc.
-+ (reader-error,-reader-process-expanded,reader-process): New procs.
-+ (reader-read-file!): New proc.
-+ (include): Call reader-read-file!.
-+ (cmd-if): New proc.
-+ (cpu-load): Call reader-read-file!.
-+ * utils.scm (num-args): New proc.
-+ * simplify.inc: New file.
-+ * *.scm: Delete def-foo procs. Rewrite define-foo/define-full-foo
-+ procs. Move define-normal-foo procs (and abbreviated forms) to
-+ simplify.inc. Install define-foo/define-full-foo commands in foo-init!
-+ routines.
-+ * fr30.cpu: Include simplify.inc.
-+ * fr30.opc: CGEN_OPCODE_DESC renamed to CGEN_CPU_DESC.
-+ * i960.cpu: Include simplify.inc.
-+ * m32r.cpu: Include simplify.inc.
-+ * m32r.opc: CGEN_OPCODE_DESC renamed to CGEN_CPU_DESC.
-+ (CGEN_PRINT_NORMAL): Use CGEN_BOOL_ATTR.
-+ * sparc.cpu: Include simplify.inc.
-+ * sparc.opc: CGEN_OPCODE_DESC renamed to CGEN_CPU_DESC.
-+ * utils-cgen.scm (parse-error): Moved to read.scm.
-+ (sanitize): Rewrite.
-+ (utils-init!): New proc.
-+
-+1999-02-02 Doug Evans <devans@casey.cygnus.com>
-+
-+ * sparc.cpu: New file.
-+ * sparc32.cpu: New file.
-+ * sparc64.cpu: New file.
-+ * sparccom.cpu: New file.
-+ * sparc.opc: New file.
-+
-+1999-01-27 Frank Eigler <fche@cygnus.com>
-+
-+ * utils.scm (gen-copyright): New proc.
-+
-+1999-01-27 Doug Evans <devans@casey.cygnus.com>
-+
-+ Parameterize rtl parsing, rather than having lots of little handlers.
-+ * rtl.scm (<rtx-func>): New members arg-types,arg-modes.
-+ Delete member traverse.
-+ (rtx:set-traverse!): Delete.
-+ (-rtx-valid-types,-rtx-valid-matches): New variables.
-+ (-rtx-func-lookup): Take symbol or <rtx-func> object as argument
-+ instead of expression. All callers updated.
-+ (def-rtx-node): New args arg-types,arg-modes.
-+ (def-rtx-syntax-node): Ditto.
-+ (def-rtx-dual-mode): Ditto.
-+ (-rtx-macro-expand-list): Renamed from -rtx-macro-maybe-expand-list.
-+ All callers updated.
-+ (-rtx-macro-expand): Renamed from -rtx-macro-maybe-expand.
-+ All callers updated.
-+ (rtx-macro-expand): New proc.
-+ (-rtx-traverse-check-args): Delete.
-+ (-rtx-traverse-normal): Call -rtx-traverse-expr rather than calling
-+ an rtx specific traverser.
-+ (-rtx-any-mode?,-rtx-symornum?): New procs.
-+ (-rtx-traverse-rtx-list,-rtx-traverse-error): New proc.
-+ (-rtx-traverse-no-mode): Delete.
-+ (-rtx-traverse-syntax-expr,-rtx-traverse-syntax-no-mode): Delete.
-+ (-rtx-traverse-operands): Rewrite.
-+ (-rtx-traverse-expr): Rewrite.
-+ (rtx-traverse): Don't expand macros here, leave for caller to do.
-+ (rtx-simplify): Delete.
-+ (rtx-compile-time-constant?): Rewrite. Handle FALSE/TRUE for boolean
-+ attributes.
-+ (rtx-true?,rtx-false?): Ditto.
-+ (-rtx-ref-type): Set dest is operand 1 now.
-+ (-simplify-for-compilation): New proc.
-+ (semantic-in-out-operands): Recognize regno as an alias for index-of.
-+ Expand macros before calling rtx-traverse. Sort operands by name
-+ to avoid unnecessary semantic formats.
-+ (semantic-attrs): New proc.
-+ (rtx-uneval?): Handle (<rtx-func> ...).
-+ (s-boolifop): Delete arg mode. All callers updated.
-+ * rtx-funcs.scm (all non-macros): Add arg-type and arg-mode specs.
-+ (eq-attr): New arg obj.
-+ (eq-attr:): Delete.
-+ * m32r.cpu (rach): Update calls to andif.
-+
-+ * minsn.scm (-minsn-parse-expansion): Renamed from
-+ parse-minsn-expansion.
-+ (-minsn-parse): Renamed from parse-minsn.
-+ (-minsn-read): Renamed from read-minsn.
-+ (def-minsn): Don't check APPLICATION here.
-+ (def-full-minsn): New proc.
-+ (define-macro-insn): Check APPLICATION here. Expand macros.
-+ (define-normal-macro-insn): Ditto.
-+
-+ * utils.scm (word-value): New arg start-lsb?.
-+ (word-mask,word-extract): Ditto.
-+ (split-bits,powers-of-2): Use integer-expt instead of expt.
-+ (bit-set?): Handle 32 bit values (which are bignums).
-+ (cg-logand,cg-logxor): New functions.
-+ * ifield.scm (<ifield>,field-mask): Update call to word-mask.
-+ (<ifield>,field-value): Update call to word-value.
-+ (<ifield>,min-value): Use integer-expt instead of expt.
-+ (<ifield>,max-value): Ditto.
-+
-+ * hardware.scm (<hw-register>,new-mode): Rename local mode to cur-mode.
-+
-+ * insn.scm (def-full-insn): Discard ALIAS insns if simulator.
-+
-+ Compute raw instruction format in addition to semantic based format.
-+ * iformat.scm: Delete members cti?,sem-in-ops,sem-out-ops.
-+ (<iformat> accessors): Rename accessors to ifmt-*.
-+ (<sformat>): New class.
-+ (fmt-enum): Renamed from fmt:enum.
-+ (-ifmt-search-key): Rewrite.
-+ (-sfmt-search-key): New proc.
-+ (ifmt-analyze): Rename arg include-sem-operands? to compute-sformat?
-+ Compute iformat and sformat search keys.
-+ (ifmt-build): Update.
-+ (sfmt-build): New proc.
-+ (-ifmt-lookup-ifmt!,-ifmt-lookup-sfmt!): New procs.
-+ (ifmt-compute!): Compute instruction format <iformat> based on
-+ instruction fields alone. Compute new semantic format <sformat>
-+ based on instruction fields and semantic information.
-+ (ifmt:lookup): Delete.
-+ * mach.scm (<arch>): New member sfmt-list, plus accessors.
-+ (current-sfmt-list): New proc.
-+ * insn.scm (<insn>): Rename member fmt-tmp to tmp.
-+ Rename member fmt to ifmt. New members fmt-desc, sfmt.
-+ (insn-length,insn-length-bytes): Update.
-+ (insn:mask-length,insn:mask): Update.
-+ (insn-lookup-op): Update.
-+ * gas-test.scm (gas-test-analyze!): Update.
-+ (gen-gas-test): Ditto.
-+ * sim-test.scm (sim-test-analyze!): Update.
-+ (gen-sim-test): Ditto.
-+ * opcodes.scm (gen-operand-instance-table): Update.
-+ (gen-operand-instance-ref): Ditto.
-+ (max-operand-instances): Use heuristic if semantics not parsed.
-+ (ifmt-opcode-operands): Renamed from fmt-opcode-operands.
-+ (opcodes-analyze!): Only scan semantics of building operand instance
-+ tables.
-+ * sim-cpu.scm (*) Update calls to <iformat>/<sformat> accessors.
-+ (-gen-extract-ifmt-macro): Renamed from -gen-extract-fmt-macro.
-+ * sim-decode.scm (*) Update calls to <iformat>/<sformat> accessors.
-+ (gen-sfmt-argvars-defns): Renamed from gen-ifmt-argvars-defns.
-+ (gen-sfmt-argvars-assigns): Renamed from gen-ifmt-argvars-assigns.
-+ * sim-model.scm (*) Update calls to <iformat>/<sformat> accessors.
-+ * sim.scm (*) Update calls to <iformat>/<sformat> accessors.
-+
-+ * sim-decode.scm (usable-decode-bit?): Rename from decode-bit?
-+ New arg lsb0? All callers updated.
-+ (decode-bits): New arg lsb0?. All callers updated.
-+ (opcode-slots): Update call to bit-set?. Call integer-expt instead
-+ of expt.
-+ (-gen-decode-bits): New arg lsb0?. All callers updated.
-+ (build-slots): Call integer-expt instead of expt.
-+ (build-decode-table-entry): Handle crossing word boundaries better.
-+ (-gen-decode-switch): New arg lsb0?. All callers updated.
-+ (-gen-extract-decls): Rename decode format entry from ifmt to sfmt.
-+
-+ * enum.scm (define-enum): Rewrite.
-+ (define-normal-enum): Ditto.
-+ (def-full-insn-enum): New proc.
-+ (define-normal-insn-enum): Rewrite.
-+
-+ * attr.scm (<bitset-attribute>,gen-value-for-defn): Ensure result is
-+ valid C.
-+ (<{integer,enum}-attribute>,gen-value-for-defn): Ditto.
-+
-+ * dev.scm: Add sid support.
-+
-+ * Makefile.am (opcodes,sim-arch,sim-cpu): New targets.
-+ (CLEANFILES): Add tmp-*.
-+ * Makefile.in: Rebuild.
-+
-+ * doc/Makefile.am: New file.
-+ * doc/Makefile.in: New file.
-+ * doc/cgen.texi: New file.
-+ * Makefile.am (SUBDIRS): Define.
-+ * Makefile.in: Rebuild.
-+ * configure.in: Create doc/Makefile.
-+ * configure: Rebuild.
-+
-+1999-01-18 Doug Evans <devans@casey.cygnus.com>
-+
-+ * insn.scm (insn:syn): Delete.
-+
-+1999-01-15 Doug Evans <devans@casey.cygnus.com>
-+
-+ * fr30.cpu (model fr30-1): Add state variables load-regs,
-+ load-regs-pending. Delete h-gr. Clean up operand names of all units.
-+ * m32r.cpu (model m32r/d): Clean up operand names of u-exec.
-+ (model m32rx): Ditto.
-+ (addi): Simplify function unit usage spec.
-+ (ld-plus): Rewrite operand names in function unit usage spec.
-+ (mvtachi,mvtachi-a,mvtaclo,mvtaclo-a,st-plus,st-minus): Ditto.
-+ * sim.scm (<unit>,gen-profile-code): Redo how operand names are
-+ overridden. Allow operand to appear in input and output spec.
-+ (<insn>,gen-profile-code): string-append -> string-list.
-+
-+ * ifield.scm (define-ifield): Call pmacro-expand.
-+ (define-full-ifield,define-normal-ifield): Ditto.
-+ (define-multi-ifield,define-normal-multi-ifield): Ditto.
-+
-+ * sim.scm (gen-argbuf-type): Keep leading part of ARGBUF same for
-+ with-scache and without-scache cases.
-+
-+1999-01-14 Doug Evans <devans@casey.cygnus.com>
-+
-+ * fr30.cpu (fr30-1): Add state variable h-gr.
-+ Add units u-cti, u-load, u-store, u-ldm, u-stm.
-+ (all insns): First pass at providing cycle counts.
-+ * sim.scm (<unit>,gen-profile-code): Only check for output operands
-+ when initializing unit output operands, ditto for input operands.
-+
-+ * insn.scm (insn-length,insn-length-bytes): New procs.
-+ * mach.scm (-adata-set-derived!): Use them.
-+ * sim-cpu.scm (-gen-sem-case): Ditto.
-+
-+ * sim-cpu.scm (-gen-trace-record-type): PCADDR->IADDR.
-+ (-gen-write-case): Ditto.
-+ (gen-semantic-fn): Ditto. Split into two:
-+ -gen-scache-semantic-fn and -gen-no-scache-semantic-fn. Fix bitrot
-+ in non-scache case.
-+ (-gen-all-semantic-fns): Renamed from -gen-all-semantics. Handle
-+ scache/no-scache appropriately. All callers updated.
-+ (-gen-sem-case): PCADDR->IADDR.
-+ * sim.scm (gen-argbuf-type): PCADDR->IADDR.
-+
-+ * sim-decode.scm (*): Replace string-append,string-map with
-+ string-list,string-list-map where the result is sufficiently large.
-+ (-gen-decode-insn-table): Go back to simple version for non-scache
-+ case: just record IDESC in decoder tables and leave field extraction
-+ to the caller.
-+ (-gen-decode-switch): Ditto.
-+ (-gen-decode-fn): Ditto.
-+ (-gen-extract-decls): Only emit format enum if with-scache?.
-+ * sim-model.scm (-gen-model-insn-fn): Extract ifields here in
-+ non-scache case.
-+ (-gen-model-insn-fns): Don't emit model fns for virtual insns.
-+ (-gen-insn-timing): Ditto.
-+ * sim.scm (gen-argbuf-type): Only output sem_fields union in
-+ with-scache case.
-+
-+ * sim.scm (-hw-gen-fun-get): Use GET_<H-NAME> macro.
-+ (-hw-gen-fun-set): Use SET_<H-NAME> macro.
-+
-+1999-01-12 Doug Evans <devans@casey.cygnus.com>
-+
-+ * cpu.scm (keep-mach-validate!): New proc.
-+ (include): New proc.
-+
-+ * mach.scm (current-arch-mach-name-list): New proc.
-+ (-parse-arch-machs): Always return canonical form.
-+ (def-arch): Validate user specified machs to be kept.
-+ (def-mach-attr!): Simplify.
-+
-+ * opcodes.scm (-opcodes-build-operand-instance-table?): New global.
-+ (option-init!): Initialize it.
-+ (option-set!): Set it.
-+ (gen-insn-table-entry): Emit 0 for operand instance ref if not
-+ output operand instance tables.
-+ (cgen-opc.in): Only output operand instance tables if asked to.
-+
-+ * sim.scm (option-init!,option-set!): Clarify returned value.
-+
-+ * sim.scm (gen-mach-bfd-name): Move from here.
-+ * utils-cgen.scm: To here.
-+
-+1999-01-11 Doug Evans <devans@casey.cygnus.com>
-+
-+ * fr30.cpu (ilm): Fix comment field.
-+ (cond-branch): Remove explicit setting of COND-CTI, let cgen
-+ compute it.
-+
-+ * rtl.scm (rtx-simplify,rtx-compile-time-constant?): New procs.
-+ (rtx-true?, rtx-false?): New procs.
-+ * rtx-funcs.scm (annul): Rename vpc to pc.
-+ (-rtx-traverse-if): Improve determination of whether then/else parts
-+ are conditionally executed.
-+
-+ * sim.scm (-gen-argbuf-fields-union): Move definition of union to
-+ outer level.
-+ (gen-argbuf-type): Simplify generated definition (big sem_fields
-+ union moved outside).
-+
-+1999-01-11 Ben Elliston <bje@cygnus.com>
-+
-+ * doc/porting.texi: New file.
-+
-+ * doc/intro.texi: New file.
-+ (Layout): Use @example to insert preformatted ASCII text (such as
-+ diagrams). @code is inappropriate here.
-+
-+1999-01-06 Doug Evans <devans@casey.cygnus.com>
-+
-+ * ifield.scm (-multi-ifield-read): Fix handling of insert/extract.
-+
-+ * m32r.opc (print_hash): Cast dis_info.
-+
-+ * sim-cpu.scm (-gen-hardware-types): Sanitize get/set macros.
-+ * sim.scm (<sim-hardware>,make!): Emit a comment for user-written
-+ get/set macros.
-+
-+1999-01-05 Doug Evans <devans@casey.cygnus.com>
-+
-+ * i960.cpu (f-br-disp): Remove RELOC attribute.
-+ (f-ctrl-disp): Ditto.
-+ (callx-disp): set-quiet -> set for (reg h-gr 2).
-+ (callx-indirect,callx-indirect-offset): Ditto.
-+
-+ * Makefile.am (gas-test): Fix dependencies.
-+ * Makefile.in: Rebuild.
-+ * cgen-gas.asm: File creation args are -<uppercase-letter>.
-+ * gas-test.scm (break-out-syntax,make-file-name): Delete.
-+ (gas-test-analyze!): Use syntax-break-out.
-+ * sim-test.scm (break-out-syntax,make-file-name): Delete.
-+ (sim-test-analyze!): Use syntax-break-out.
-+ (cgen-build.sh): Use gen-file-name.
-+ (cgen-allinsn.exp): Compute and pass all machs to run_sim_test.
-+ * insn.scm (syntax-break-out): New proc.
-+ * utils.scm (gen-file-name): New proc.
-+
-+ * fixup.scm (nil,<?,<=?,>?): Delete.
-+
-+ * utils.scm (count-true): Rewrite.
-+
-+ * slib/sort.scm: Move sort.scm to slib directory.
-+ * cpu.scm: Update.
-+
-+ * iformat.scm (ifmt-compute!): Record empty format.
-+
-+ * rtl.scm (semantic-in-out-operands): Simplify by moving several
-+ internal procs outside. Handle expression register numbers.
-+ Handle index-of.
-+
-+ * rtx-funcs.scm (annul): Rename new_pc to vpc.
-+
-+ * sim-cpu.scm (-gen-cpu-reg-access-defns): Define access fns for
-+ every register.
-+ (-gen-write-case): Pass vpc to SEM_BRANCH_FINI.
-+ (gen-semantic-fn,-gen-sem-case): Ditto.
-+ (cgen-cpu.c): Define WANT_CPU to @cpu@.
-+ (cgen-semantics.c): Ditto.
-+ * sim-decode.scm (-gen-extract-decls): Handle non-with-scache case.
-+ (gen-ifmt-argvars-defns): New proc.
-+ (gen-ifmt-argvars-assigns): New proc.
-+ (-gen-all-extractors): Delete FMT_EMPTY case, now handled like others.
-+ (-gen-decode-fn): Handle non-with-scache case.
-+ (cgen-decode.c): Define WANT_CPU to @cpu@.
-+ * sim-models.scm (-gen-mach-defns): Emit bfd name.
-+ (cgen-model.c): Define WANT_CPU to @cpu@.
-+ * sim.scm (gen-ifld-extract-argvar): New proc.
-+ (<sim-hardware>,make!): Don't emit [GS]ET_H_FOO macros for elements
-+ with FUN-ACCESS specified.
-+ (hw-fun-access?): New proc, as <hardware-base>:fun-access? method.
-+ (<hw-register>,gen-extract): New arg local?.
-+ (<hw-address>,gen-extract): Ditto.
-+ (-hw-cxmake-get): Handle non-with-scache case.
-+ (-hw-gen-set-quiet): Ditto.
-+ (<hw-address>,cxmake-get): Handle non-with-scache case.
-+ (gen-op-extract-argvar): New proc.
-+ (<operand>,gen-record-profile): Rewrite.
-+ (<operand>,gen-profile-code): Rewrite.
-+ (<unit>,gen-profile-code): Use -gen-argfld-ref.
-+ (gen-argbuf-fields-union): New proc.
-+ (gen-argbuf-type): Use it. Handle non-scache case.
-+
-+ * *.scm: class:foo procs renamed to class-foo.
-+ * attr.scm (<attribute>): New member `for'.
-+ (-attr-parse): New first value in list for default if
-+ none specified.
-+ (non-bool-attr-list,attr:add!): Delete.
-+ (def-attr): Use current-attr-add!.
-+ (atlist-attr-value-no-default): New proc.
-+ (attr-lookup-default): Handle boolean attributes.
-+ (gen-attr-enum): New proc.
-+ (-attr-remove-meta-attrs-alist): New proc.
-+ (attr-nub): New proc.
-+ (current-attr-list-for): New proc.
-+ (current-{ifld,hw,op,insn}-attr-list): New procs.
-+ (attr-builtin!): New proc.
-+ * cpu.scm (keep-obj?): Rewrite.
-+ (-init-parse-cpu!): Call arch-init!.
-+ (-install-builtin!): Call {attr,mode,ifield,insn}-builtin!.
-+ (-finish-parse-cpu!): Call arch-finish!.
-+ * enum.scm (enum-list,enum:add,enum:lookup): Delete.
-+ (def-enum,def-full-enum): Use current-enum-add!.
-+ (gen-obj-list-enums): New proc.
-+ * hardware.scm (hw:add!,hw:lookup): Delete.
-+ (def-hardware,def-hardware-ext): Use current-hw-add!.
-+ (hw:std-attrs,hw:attr-list): Delete.
-+ (hardware-builtin!): Define builtin hardware attributes.
-+ * ifield.scm (ifld:add!,ifld:lookup): Delete.
-+ (def-ifield,def-full-ifield): Use current-ifld-add!.
-+ (ifld:std-attrs,ifld:attr-list): Delete.
-+ (ifield-builtin!): New proc.
-+ * insn.scm (insn:add!,insn:lookup): Delete.
-+ (def-full-insn): Use current-insn-add!.
-+ (insn:std-attrs): Delete.
-+ (insn-builtin!): New proc.
-+ * mach.scm (<arch>): New members attr-list,enum-list,op-list,
-+ minsn-list.
-+ (<arch-data>): New member machs.
-+ (current-attr-list,current-enum-list): New procs.
-+ (current-op-list,current-minsn-list): New procs.
-+ (current-{attr,enum,ifld,op,hw,insn,minsn,cpu,mach,model}-add!): Ditto.
-+ (current-{attr,enum,ifld,op,hw,insn,minsn,cpu,mach,model}-lookup):
-+ Ditto.
-+ (-parse-arch-machs): New proc.
-+ (-arch-parse): New arg machs, all callers updated.
-+ (-arch-read): Handle machs spec.
-+ (def-arch): Define MACH attribute here.
-+ (mach-init!,mach-finish!): Not here.
-+ (cpu:add!,cpu:lookup): Delete.
-+ (def-cpu): Use current-cpu-add!.
-+ (<mach>): New member bfd-name.
-+ (-mach-parse): New arg bfd-name, all callers updated.
-+ (-mach-read): Handle bfd-name spec.
-+ (mach:add!,mach:lookup): Delete.
-+ (def-mach): Use current-mach-add!.
-+ (def-mach-attr!): New proc.
-+ (arch-init!): New proc.
-+ (arch-finish!): New proc. Reverse all object lists here.
-+ * minsn.scm (minsn-list,minsn-add!,minsn:lookup): Delete.
-+ (def-minsn): Use current-minsn-add!. Ignore minsn if mach not kept.
-+ (define-normal-macro-insn): Ignore minsn if mach not kept.
-+ * mode.scm (mode-builtin!): New proc.
-+ * model.scm (model:add!,model:lookup): Delete.
-+ (def-model): Use current-model-add!.
-+ * opcodes.scm (insn:attr-list): Delete.
-+ (attr-bool-gen-decl,attr-bool-gen-defn): New procs.
-+ (gen-attr-table-defn): Emit value for default.
-+ (gen-attr-table-defns): Emit bool_attr. Emit ifield attr table.
-+ (op:attr-list): Delete.
-+ (gen-operand-decls,gen-insn-decls): New proc.
-+ (compute-insn-attr-list): Delete.
-+ (cgen-opc.h): Reorganize and simplify.
-+ * operand.scm (-operand-list,operand-list,op:add,op:lookup): Delete.
-+ (def-operand,def-full-operand): Use current-op-add!.
-+ (op:std-attrs): Delete.
-+ (operand-enum): Delete.
-+ (operand-builtin!): Define builtin operand attrs.
-+ * utils-cgen.scm (sanitize): Update calls to lookup procs.
-+ (gen-attr-enum-decl): Use gen-obj-list-enums.
-+ (gen-obj-attr-defn): Renamed from gen-attr-defn, all callers updated.
-+ Rewrite.
-+ * fr30.cpu (define-arch): Add machs spec.
-+ (f-i4): SIGNED attribute -> !UNSIGNED.
-+ (f-disp8,f-disp9,f-disp10,f-s10,f-rel9,f-rel12): Ditto.
-+ (HASH-PREFIX): Define operand attribute.
-+ (NOT-IN-DELAY-SLOT): Define insn attribute.
-+ * i960.cpu (define-arch): Add machs spec.
-+ * m32r.cpu (define-arch): Add machs spec.
-+ (h-hi16): Remove UNSIGNED,SIGN-OPT attributes.
-+ (HASH-PREFIX): Define operand attribute.
-+ (FILL-SLOT): Define insn attribute.
-+
-+Thu Dec 17 17:15:06 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * fr30.cpu (stilm): Correct mask for and operation.
-+
-+1998-12-17 Doug Evans <devans@casey.cygnus.com>
-+
-+ * sim-test.scm (cgen-build.sh): Use `mach' to specify machs, not `cpu'.
-+ Replace START/EXIT with start/pass.
-+ (gen-sim-test): Delete ".text".
-+
-+Wed Dec 16 16:16:39 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * fr30.cpu (cond-branch): Conditional branches not allowed in delay slots.
-+
-+Tue Dec 15 17:30:01 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * fr30.cpu: Add NOT-IN-DELAY-SLOT as appropriate.
-+ (h-sbit): Make it FUN-ACCESS.
-+ (h-gr): Reorder so that general regs are always printed by number.
-+
-+1998-12-14 James E Wilson <wilson@wilson-pc.cygnus.com>
-+
-+ * i960.cpu (flushreg): Use nop.
-+
-+1998-12-14 Doug Evans <devans@casey.cygnus.com>
-+
-+ * m32r.cpu (default-alignment): Specify.
-+ * mach.scm (<arch-data>): New member default-alignment.
-+ (adata:default-alignment): New proc.
-+ (current-arch-default-alignment): New proc.
-+ (-arch-parse): New arg default-alignment.
-+ (parse-alignment): New proc.
-+ (-arch-read): Handle default-alignment spec.
-+
-+ * rtx-funcs.scm (attr:): Pass attr-name through gen-c-symbol.
-+
-+ * insn.scm (f-%): Delete.
-+ * sim-cpu.scm (gen-define-fields): Delete support for f-%. Can
-+ be readded if proved useful.
-+ (gen-extract-fields): Ditto. Use gen-ifetch.
-+ * sim.scm (<hw-memory>,cxmake-get): Pass pc to GETMEM*.
-+ (<hw-memory>,gen-set-quiet): Pass pc to SETMEM*.
-+
-+Mon Dec 14 16:20:59 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * fr30.cpu (div2): Set zbit properly when remainder not zero.
-+
-+1998-12-14 Dave Brolley <brolley@cygnus.com>
-+
-+ * fr30.cpu: Remove stub macros.
-+ (div1): Shift bits from mdl into mdh. Don't use addc/subc.
-+ (div2): Don't use addc/subc.
-+
-+1998-12-11 Doug Evans <devans@casey.cygnus.com>
-+
-+ * utils-cgen.scm (gen-obj-sanitize): Only catch spelling errors
-+ if opcodes.
-+
-+Thu Dec 10 18:37:34 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * fr30.cpu (div0s,div0u,div1,div2,div3,div4s): Implemented.
-+
-+Thu Dec 10 12:28:53 1998 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * cpu.scm (keep-all?): New proc.
-+ (assert-keep-all): Use it.
-+ * opcodes.scm (gen-ifmt-table-1): Use gen-obj-sanitize.
-+ * utils-cgen.scm (gen-obj-sanitize): Handle macro-insns.
-+ Check for spelling errors.
-+
-+1998-12-09 Doug Evans <devans@casey.cygnus.com>
-+
-+ * rtl.scm (s-convop): Call -rtx-sem-mode.
-+
-+Tue Dec 8 10:58:38 1998 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * hardware.scm (-parse-hw-type): parse! no longer returns a result.
-+ (-parse-hw-profile): Ditto.
-+ (<hw-register>, parse!): Return `void' result.
-+ (<hw-pc>, parse!): Ditto.
-+ (<hw-memory>, parse!): Ditto.
-+ (<hw-immediate>, parse!): Ditto.
-+ (<hw-address>, parse!): Ditto.
-+
-+ * ifield.scm (-ifield-parse): Validate encode/decode fields.
-+ (-ifld-parse-encode-decode): New proc.
-+ (-ifld-parse-encode,-ifld-parse-decode): New proc.
-+ (-multi-ifield-parse): Set encode/decode to #f.
-+ (ifld:decode-mode): New proc.
-+ * utils.scm (nub): Rewrite.
-+ * operand.scm (op-nub): Rewrite.
-+ * sim.scm (<ifield>, gen-type): Rewrite.
-+ (-gen-ifld-argbuf-defn): New proc.
-+ (gen-ifld-extract,gen-ifld-trace-extract): New procs.
-+ (<sim-hardware>): Forward gen-trace-extract onto `type'.
-+ Ditto for needed-iflds. gen-argbuf-defn renamed from gen-argbuf-elm.
-+ (<hardware-base>): New method needed-iflds. gen-argbuf-defn
-+ renamed from gen-argbuf-elm, return "". Rewrite gen-extract.
-+ New method gen-trace-extract.
-+ (<hw-register>): New method needed-iflds. gen-argbuf-defn renamed
-+ from gen-argbuf-elm, return "" if not caching register address.
-+ Rewrite gen-extract. New method gen-trace-extract.
-+ (<hw-address>): New methods needed-iflds, gen-argbuf-defn,
-+ gen-extract, gen-trace-extract, cxmake-get.
-+ (<hw-iaddress>): New method cxmake-get.
-+ (op-needed-iflds): New proc.
-+ (<operand>): Delete methods gen-argbuf-elm, gen-extract.
-+ (-gen-op-argbuf-defn): New proc.
-+ (gen-op-extract): Renamed from op:extract.
-+ (gen-op-trace-extract): Renamed from op:trace-extract.
-+ (fmt-extractable-operands): Renamed from fmt-semantic-operands
-+ and rewritten.
-+ (gen-argbuf-elm): Rewrite.
-+ * sim-decode.scm (-gen-record-args): Update.
-+
-+ * sim.scm (c-cpu-macro): Renamed from cpu-deref. All uses changed.
-+
-+ * pmacros.scm (-pmacro-expand): Handle procedural macros in
-+ argument position. Flag symbolic macros in function position as
-+ an error.
-+ (define-pmacro): Handle quoting in definition of symbolic macros.
-+ (pmacro-trace): Call -pmacro-expand, not -pmacro-ref.
-+
-+Tue Dec 8 13:06:44 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * fr30.opc (parse_register_list): Account for reverse masks
-+ for load and store.
-+ (print_register_list): Ditto.
-+ (parse_low_register_list_ld): New function.
-+ (parse_hi_register_list_ld): New function.
-+ (parse_low_register_list_st): New function.
-+ (parse_hi_register_list_st): New function.
-+ (print_hi_register_list_ld): New function.
-+ (print_hi_register_list_st): New function.
-+ (print_low_register_list_ld): New function.
-+ (print_low_register_list_st): New function.
-+ * fr30.cpu (ldr15dr): Implement workaround.
-+ (ldm0,ldm1,stm0,stm1): Implemented.
-+
-+1998-12-08 Doug Evans <devans@casey.cygnus.com>
-+
-+ * configure.in: Rename --with-hobbit to --with-cgen-hobbit.
-+ * configure: Regenerate.
-+ * Makefile.am (WITH_HOBBIT): Update.
-+ (cgen-hob.c): Remove Makefile dependency.
-+ (cgen.o): Depend on cgen-gh.h, config.h.
-+ * Makefile.in: Regenerate.
-+ * aclocal.m4: Regenerate.
-+
-+1998-12-07 James E Wilson <wilson@wilson-pc.cygnus.com>
-+
-+ * i960.cpu, i960.opc: New files.
-+
-+Mon Dec 7 14:30:24 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * fr30.opc (parse_register_number): New function.
-+ (parse_register_list): New function.
-+ (parse_low_register_list): Use parse_register_list.
-+ (parse_hi_register_list): Use parse_register_list.
-+ * fr30.cpu (sth): Fix assembler syntax. Implement more
-+ insns.
-+
-+Fri Dec 4 16:07:13 1998 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * sim-cpu.scm (cgen-sem-switch.c): Update definition of TRACE_RESULT.
-+ * sim-decode.scm (-gen-record-args): Update call to TRACE_EXTRACT.
-+ * sim.scm (-op-gen-set-trace): Update call to TRACE_RESULT.
-+ (-op-gen-set-trace-parallel): Ditto.
-+ (gen-argbuf-type): New ARGBUF members trace_p,profile_p;
-+
-+ * fr30.cpu (call,calld): Fix setting of pc.
-+ (f-op5): Fix start bit number.
-+
-+Fri Dec 4 17:06:28 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * fr30.cpu (st): Fix operand ordering. Implement more
-+ insns.
-+
-+Thu Dec 3 23:59:40 1998 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * ifield.scm (ifld:mode,ifld:hw-type): New procs.
-+ * iformat.scm (fmt-opcode-operands): Move to opcodes.scm.
-+ (fmt-semantic-operands): Move to sim.scm.
-+ * opcodes.scm (fmt-opcode-operands): Moved here from iformat.scm.
-+ * operand.scm (<hw-index>): New member `name'. All builders updated.
-+ (<hw-index>): New method get-name.
-+ (op-profilable?): Moved to sim.scm.
-+ (op-nub): New proc.
-+ * sim.scm (fmt-semantic-operands): Moved here from iformat.scm.
-+ (op-profilable?): Moved here from operand.scm.
-+ (gen-extract-type): Delete.
-+ (c-argfld-macro): Renamed from c-ifield-macro. All uses updated.
-+ (-gen-argfld-ref): New proc.
-+ (-gen-ifld-argfld-name): New proc.
-+ (gen-ifld-argfld-ref): Renamed from -gen-ifld-ref. All uses updated.
-+ (-gen-ifld-decoded-val): Renamed from -gen-ifld-raw-val.
-+ (-gen-hw-index-argfld-name,-gen-hw-index-argfld-ref): New procs.
-+ (<hardware-base>): Delete method gen-extract-type. New method
-+ gen-argbuf-elm.
-+ (<hw-register): Ditto. Update method gen-extract.
-+ (<operand>, method gen-argbuf-elm): Rewrite.
-+ * rtl.scm (semantic-in-out-operands): Handle (ifield f-name).
-+ (s-cmpop): Fix handling of eq,ne for unsigned modes.
-+ * rtx-funcs.scm (eq,ne,lt,le,gt,ge,ltu,leu,gtu,geu): Update.
-+
-+ * sim-decode.scm (-gen-record-args): Tweak.
-+
-+ * sim.scm (gen-argbuf-elm): Handle case of all constant opcode fields.
-+
-+Thu Dec 3 14:23:27 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * doc/porting: Fix typo: gas->sim.
-+ * fr30.opc (print_m4): New function.
-+ * fr30.cpu: Implemented many insns.
-+
-+Thu Dec 3 00:03:16 1998 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * rtl.scm (build-reg-operand!): Remove redundant setting of hw-name.
-+
-+ * fr30.cpu (f-rel9): Delete RELOC attribute.
-+ (f-rel12): Add PCREL-ADDR attribute.
-+ (label9): Make an h-iaddr, not h-uint. Delete asm print spec.
-+ (label12): Delete PCREL-ADDR attribute. Make an h-iaddr, not h-sint.
-+ * fr30.opc (print_label9): Delete.
-+
-+ * iformat.scm (ifmt-analyze): Check attributes derived from semantic
-+ code for CTI indicators.
-+ * insn.scm (insn-cti?): Simplify.
-+ * utils-cgen.scm (atlist:cti?): New proc.
-+
-+1998-11-30 Doug Evans <devans@casey.cygnus.com>
-+
-+ * fr30.cpu (arch): default-insn-bitsize -> default-insn-word-bitsize.
-+ (f-i20-4,f-i20-16,f-i20): New fields.
-+ (i20): New operand.
-+ (ldi8): Implement.
-+ (ldi20): New insn.
-+ (ldi32m): Delete.
-+ (jmpd): Implement.
-+ * fr30.opc (CGEN_DIS_HASH_SIZE,CGEN_DIS_HASH): Define in opc.h.
-+ * m32r.cpu (arch): default-insn-bitsize -> default-insn-word-bitsize.
-+ * mach.scm (arch-data): Ditto.
-+ (current-arch-default-insn-word-bitsize): Renamed from
-+ current-arch-default-insn-bitsize [ya, that's a pretty long name].
-+ (-arch-read): Update.
-+
-+ * hardware.scm (hw:attr-list): Move here ...
-+ * opcodes.scm: ... from here.
-+
-+ * ifield.scm (fld:bitrange): Delete.
-+ (fld:word-offset,fld:word-length): New procs.
-+ (ifield?): Use class-instance.
-+ (<ifield>, method field-start): Rewrite.
-+ (ifld:enum): New proc.
-+ (<ifield>, methods field-mask,field-value): Rewrite.
-+ (-ifield-parse): Rewrite.
-+ (<multi-ifield> support): Rewrite.
-+ (ifld-beyond-base?): Rewrite.
-+ (ifld:std-attrs): New variable.
-+ (ifld:attr-list): New proc.
-+ * iformat.scm (-compute-insn-mask): Rewrite.
-+ * insn.scm (-parse-insn-format): New arg errtxt, all callers updated.
-+ Simplify.
-+ (-parse-insn-format-symbol,-parse-insn-format-list): New procs.
-+ * opcodes.scm (<hardware>): No longer forward gen-insert,gen-extract
-+ onto type.
-+ (<operand>): Ditto. Forward onto index instead.
-+ (gen-ifld-decls,gen-ifld-defns): New procs.
-+ (ifld:insert,ifld:extract): New procs.
-+ (<ifield>): New methods gen-insert, gen-extract.
-+ (<multi-ifield>): Ditto.
-+ (<hw-index>): Forward gen-insert,gen-extract onto value.
-+ (<hw-asm>): Delete insert/extract support.
-+ (<hw-register,hw-memory,hw-immediate>): Ditto.
-+ (gen-hash-defines): Use string-list.
-+ Define CGEN_MAX_IFMT_OPERANDS.
-+ (gen-switch): Use string-list,string-list-map.
-+ (gen-fget-switch,gen-fset-switch): Use string-list.
-+ (gen-parse-switch,gen-insert-switch): Ditto.
-+ (gen-extract-switch,gen-print-switch): Ditto.
-+ (gen-insert-switch,gen-extract-switch): New local `total_length'.
-+ (gen-ifmt-table-1,gen-ifmt-table): New procs.
-+ (gen-ifmt-entry): Renamed from gen-iformat-entry, rewrite.
-+ (gen-ivalue-entry): New proc.
-+ (gen-insn-table-entry): Use string-list. Update iformat,ivalue
-+ computation. Use 0 for operand ref table if ALIAS insn.
-+ (gen-minsn-table-entry): Use string-list.
-+ (gen-macro-insn-table): Temporarily emit format tables for ALIAS insns.
-+ (gen-opcode-open): Record address of ifield table.
-+ (cgen-opc.h): Call gen-ifld-decls.
-+ (cgen-opc.in): Call gen-ifld-defns, gen-ifmt-table.
-+ * types.scm (<bitrange>): New members word-offset,word-length.
-+ Delete member total-length. Delete methods start,mask,value.
-+ (bitrange:word-offset,bitrange:word-length): New procs.
-+ * sim-cpu.scm (gen-define-fields): Simplify.
-+ (gen-extract-fields): Simplify.
-+ * sim.scm (<ifield>, gen-ifld-extract): Rewrite.
-+ (<ifield>): New methods gen-ifld-extract-decl.
-+ Delete method gen-ifld-extract-beyond.
-+ (<multi-ifield>): New methods gen-ifld-extract-decl.
-+ (<multi-ifield>, method gen-ifld-extract): Implement.
-+ (-gen-ifld-extract-base,-gen-ifld-extract-beyond): New procs.
-+ (gen-ifld-exttact,gen-ifld-extract-beyond): Delete.
-+
-+ * rtl.scm (-rtx-traverse-no-mode): Process operands.
-+ (-rtx-traverse-syntax-no-mode): New proc.
-+ (semantic-in-out-operands): Watch for `delay' and add DELAY-SLOT attr.
-+ (s-ifield): New proc.
-+ (s-shop): Don't prepend `unsigned' for unsigned modes.
-+ * rtx-funcs.scm (ifield): New rtx function.
-+ (ref,symbol): Use standard -rtx-traverse-syntax-no-mode.
-+ (delay): New rtx function.
-+ * insn.scm (insn:std-attrs): Add DELAY-SLOT.
-+
-+ * cos.scm (-elm-make-method-getter): Fix typo.
-+
-+ * utils.scm (backslash): Handle lists of strings.
-+
-+Thu Nov 26 11:47:29 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * fr30.cpu (f-rel9): Correct for pc+2.
-+ (label9): Use print_label9.
-+ * fr30.opc (print_label9): New function.
-+
-+Tue Nov 24 11:19:35 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * fr30.cpu: Change $r13,$r14,$r15 to uppercase.
-+ * fr30.opc (parse_low_register_list): Renamed.
-+ (parse_hi_register_list): Renamed.
-+ (print_hi_register_list): Renamed.
-+ (print_low_register_list): Renamed.
-+
-+Mon Nov 23 18:26:36 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * fr30.cpu (f-rel9): Now a pc relative offset.
-+
-+1998-11-23 Doug Evans <devans@casey.cygnus.com>
-+
-+ * opcodes.scm (op-asm): Move to here, from operands.scm.
-+ (<op-asm>, method parse!): Validate arguments.
-+ (<operand>, method gen-function-name): Fix thinko.
-+ * operand.scm (<operand>, method make!): Don't set op-asm here.
-+ * utils.scm (list-elements-ok?): New proc.
-+
-+ * opcodes.scm: Clean up pass.
-+
-+1998-11-20 Doug Evans <devans@tobor.to.cygnus.com>
-+
-+ * fr30.cpu (int): Defer saving of ps,pc and setting ibit,sbit to
-+ the fr30_int function.
-+ (h-cr): Remove PROFILE,CACHE-ADDR attributes.
-+ (h-dr): Add FUN-ACCESS attribute.
-+
-+1998-11-20 James E Wilson <wilson@wilson-pc.cygnus.com>
-+
-+ * sim-model.scm (-gen-mach-defns): Use gen-sym instead of obj:name
-+ for C symbol for models array.
-+
-+Thu Nov 19 15:57:45 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * fr30.opc (parse_reglist_low): New function.
-+ (parse_reglist_hi): New function.
-+ (print_reglist_low): New function.
-+ (print_reglist_hi): New function.
-+ * fr30.cpu: Finish remaining insn stubs.
-+
-+1998-11-19 Doug Evans <devans@tobor.to.cygnus.com>
-+
-+ * sim.scm (-gen-extract-word): Handle fields shorter than entire word.
-+
-+ * fr30.cpu (ldi32m): Don't use for disassembly.
-+
-+Wed Nov 18 21:34:41 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * fr30.cpu (int): Implement it.
-+
-+1998-11-18 Doug Evans <devans@casey.cygnus.com>
-+
-+ * rtx-funcs.scm (nop): Fix C code.
-+
-+ * rtl.scm (semantic-in-out-operands): Fix setting of sem-attrs.
-+
-+ * fr30.cpu (f-i32): New ifield.
-+ (i32): New operand.
-+ (ldi32): New insn.
-+ (ldi32m): New macro insn.
-+ (inte): Provide simple version for now.
-+
-+ * sim-arch.scm: New file.
-+ * sim.scm: Move architecture support generation to sim-arch.scm.
-+ * cgen-sim.scm: Load sim-arch.scm.
-+ * dev.scm: Ditto.
-+
-+ * hardware.scm (pc?) New proc.
-+ (class <hardware-base>): Rewrite method 'pc?.
-+ (class <hardware>): Forward 'pc? to the hardware type.
-+ (class <hw-pc>): New method 'pc?.
-+
-+ Add support for variable length ISAs.
-+ * ifield.scm (ifld-beyond-base?): New proc.
-+ * m32r.cpu: Remove integral-insn? spec.
-+ * mach.scm (arch:derived,arch:set-derived!): New procs.
-+ (arch:app-data,arch:set-app-data!): New procs.
-+ (class <arch>): New members derived, app-data.
-+ (class <cpu>): Delete member integral-insn?.
-+ (cpu:integral-insn?): Delete.
-+ (-cpu-parse): Delete arg integral-insn?. All callers updated.
-+ (-cpu-read): Delete integral-insn? support.
-+ (state:decode-assist): Delete.
-+ (state:int-insn?): Delete.
-+ (<derived-arch-data>): New class.
-+ (-adata-set-derived!): New proc.
-+ (mach-finish!): Call it.
-+ * opcodes.scm (<hw-asm>, method gen-extract): Pass pc to C handler.
-+ (gen-operand-instance): Add COND_REF support.
-+ (gen-operand-instance-table): Ditto.
-+ (gen-hash-defines): Update.
-+ (gen-extract-switch): Update type of `insn_value' arg.
-+ (gen-opcode-open): Update type of `value' arg of dis_hash_insn.
-+ * rtl.scm (-rtx-ref-type): Renamed from -rtx-set?. All callers
-+ updated.
-+ (semantic-in-out-operands): Compute UNCOND-CTI,COND-CTI from rtl.
-+ * sim-cpu.scm (gen-define-fields): Create vars to hold insn value
-+ beyond the base insn (for large insns).
-+ (-gen-extract-beyond-var-list): New proc.
-+ (gen-extract-fields): Handle large insns.
-+ (-gen-write-case): Update sem_arg computation.
-+ Update initial vpc computation.
-+ (gen-semantic-fn): Ditto. Update type of `insn'.
-+ (-gen-sem-case): Update sem_arg computation.
-+ Update initial vpc computation.
-+ * sim.scm (<ifield>, gen-ifld-extract): Renamed from `extract'.
-+ (-gen-extract-word): New proc.
-+ (<ifield>): New method gen-ifld-extract-beyond.
-+ (gen-ifld-extract-beyond): New proc.
-+ * types.scm (bitrange-overlap?): New proc.
-+
-+ * utils.scm (bits->bytes): New proc.
-+ (bytes->bits): New proc.
-+
-+ Move extraction support into decoder.
-+ * sim-cpu.scm (-gen-record-args,-gen-record-profile-args,
-+ -gen-extractor,-gen-all-extractors,cgen-extract.c): Move extraction
-+ support to sim-decode.scm.
-+ * sim-decode.scm (-gen-decode-insn-table): Change decoder data to
-+ be array of IDESC,FMT entries. Make the array const.
-+ (-gen-gcc-label-table): Make array const.
-+ (-gen-decode-switch): Branch to extraction code after insn has been
-+ identified.
-+ (-gen-decode-insn-globals): Delete extract handler from
-+ @cpu@_insn_sem.
-+ (gen-decode-fn): Add extraction support.
-+ (-gen-sem-fn-decls): Delete extraction fn decls.
-+ (-gen-idesc-decls): Update @cpu@_decode decl.
-+ (-gen-idesc-init-fn): Delete extraction support.
-+ (-gen-extract-decls): New proc.
-+
-+ * sim-cpu.scm (cgen-sem-switch.c): Update switch test.
-+ (sim-finish!): Surround pbb only code with #if WITH_SCACHE_PBB.
-+
-+ * sim-decode.scm (build-decode-table-entry): New arg invalid insn.
-+ All callers updated.
-+ (table-entry:make): Record insn value as insn object, not name.
-+ All uses updated.
-+
-+ * hobbit.scm (path_basename): Renamed from `basename' to avoid
-+ collision with C function.
-+ (path_dirname): Similarily.
-+ * hobbit.c,hobbit.h: Rebuild.
-+
-+Wed Nov 18 11:26:17 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * fr30.cpu (dir2r15-predec-stub): Reference to R15 must be indirect.
-+
-+Mon Nov 16 19:19:50 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * fr30.cpu: Implement more instruction stubs.
-+
-+Thu Nov 12 19:20:28 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * fr30.cpu: Implement more instruction stubs.
-+
-+Tue Nov 10 10:53:55 1998 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * rtl.scm (-rtx-expr-mode-name): Handle sequence locals.
-+
-+ * rtx-funcs.scm (zflag:,zflag,nflag:,nflag): New rtx fns.
-+
-+ * operand.scm (<pc>, method make!): FAKE renamed to SEM-ONLY.
-+ (op:std-attrs): Ditto.
-+ * opcodes.scm (gen-operand-instance): Ditto.
-+ (gen-switch): Ditto.
-+ * m32r.cpu (condbit,accum): Update.
-+ * fr30.cpu (nbit,vbit,zbit,cbit): Update.
-+
-+Mon Nov 9 14:30:51 1998 Doug Evans <devans@seba.cygnus.com>
-+
-+ * enum.scm (-enum-read): Fix typo.
-+
-+ * iformat.scm (-ifmt-search-key): Simplify a little.
-+
-+Mon Nov 9 12:07:56 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * doc/porting: semantics.c -> sem.c.
-+ * Makefile.in: Regenerate.
-+ * fr30.cpu (add): Change ADD to add. Add more registers and set
-+ status bits on 'add' instruction.
-+
-+Fri Nov 6 18:15:05 1998 James E Wilson <wilson@wilson-pc.cygnus.com>
-+
-+ * sim.scm (-gen-arch-model-decls): Default MAX_UNITS to 1 instead
-+ of 0.
-+
-+Fri Nov 6 17:43:16 1998 Doug Evans <devans@seba.cygnus.com>
-+
-+ * minsn.scm (minsn:enum): Update, call current-arch-name.
-+
-+ * pmacros.scm (-pmacro-expand): Make `cep' a variable.
-+
-+ * Makefile.am (CGEN_HOB_INPUT_FILES): Add pmacros.scm,enum.scm,
-+ mach.scm,model.scm,types.scm,ifield.scm,minsn.scm.
-+ (ARCH,CGEN,CGENFLAGS): New variables.
-+ (gas-test,sim-test): New rules.
-+ * Makefile.in: Rebuild.
-+ * configure.in (arch): Define.
-+ * configure: Rebuild.
-+
-+ * cgen-hob.scm (*UNSPECIFIED*): Renamed from UNSPECIFIED.
-+ * All .scm files: Ditto.
-+
-+ * dev.scm: Fix gas-test call to cpu-load.
-+ * gas-test.scm: Clean up pass to remove bit-rot.
-+ * sim-test.scm: Ditto.
-+
-+ * enum.scm (read-enum): Fix typo in `vals' handling.
-+
-+ * hardware.scm (-parse-hw-type): Fix typo.
-+ (parse-hardware): Rename `asm' to `aasm' to avoid GCC reserved word.
-+ (def-hardware,define-normal-hardware): Ditto.
-+
-+ * hobbit.scm (*case-sensitive-flag*): New configuration variable.
-+ (display-var): Use it.
-+ * hobbit.c: Rebuild.
-+ * hobbit.h: Rebuild.
-+
-+ * ifield.scm (-ifield-read): Rename local `length' to `length-' to
-+ avoid hobbit problem.
-+ * mach.scm (-cpu-read): Rename local `parallel-insns' to
-+ `parallel-insns-' to avoid hobbit problem.
-+
-+Fri Nov 6 17:19:12 1998 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * m32r.opc (parse_hi16): Fix call to cgen_parse_address.
-+ (parse_slo16,parse_ulo16): Ditto.
-+ * opcodes.scm (<hw-address>, method gen-parse): Ditto.
-+
-+Thu Nov 5 13:04:53 1998 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * Makefile.am (GUILELDFLAGS,GUILELDADD): New variables.
-+ (cgen_LDFLAGS,cgen_LDADD,hob.x): Use them.
-+ * Makefile.in: Rebuild.
-+ * insn.scm (define-normal-insn): Expand pmacros.
-+ * mode.scm (<mode>): New member `host?'. All uses updated.
-+ (mode:host?): New proc.
-+ * rtl.scm (define-rtx-node): Make a syntax proc, not a macro.
-+ (define-rtx-syntax-node,define-rtx-macro-node): Ditto.
-+ (define-rtx-dual-mode): Ditto.
-+ (s-index-of): New proc.
-+ (s-unop): Use plain C for host mode operations.
-+ (s-binop,s-shop,s-boolifop,s-cmpop): Ditto.
-+ * rtx-funcs.scm (index-of): New rtx function.
-+ * sim.scm (<hw-index>): New method cxmake-get.
-+
-+Wed Nov 4 23:58:08 1998 Doug Evans <devans@seba.cygnus.com>
-+
-+ * sim-cpu.scm (-gen-engine-decls): Delete.
-+
-+Wed Nov 4 18:40:47 1998 Dave Brolley <brolley@cygnus.com>
-+
-+ * doc/rtl (Example): Correct Typo.
-+ * doc/porting: Add 'make dep' step to opcodes port instructions.
-+ * fr30.opc: New file.
-+ * fr30.cpu: New file.
-+
-+Wed Oct 28 13:36:15 1998 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * configure.in: Handle guile $exec_prefix = $prefix/foo.
-+ * Makefile.am (GUILEINCDIR): New variable.
-+ (INCLUDES): Use it.
-+ * configure: Regenerate.
-+ * Makefile.in: Ditto.
-+ * aclocal.m4: Ditto.
-+
-+Mon Oct 19 13:19:34 1998 Doug Evans <devans@seba.cygnus.com>
-+
-+ * sim-cpu.scm (cgen-extract.c): Delete #include cpu-sim.h
-+ (cgen-semantics.c): Ditto.
-+ * sim-decode.scm (cgen-decode.c): Delete #include cpu-sim.h,cpu-opc.h.
-+ * sim-model.scm (cgen-model.c): Ditto.
-+ * sim.scm (cgen-arch.h): Delete #include @arch@-opc.h.
-+ (cgen-arch.c): Delete #include cpu-sim.h,cpu-opc.h.
-+
-+ * opcodes.scm (read-cpu.opc): Handle empty file.
-+
-+ * cos.scm (-elm-make-method-setter): Fix typo.
-+
-+ * cpu.scm (-init-parse-cpu!): Call types-init!.
-+ (-finish-parse-cpu!): Call types-finish!.
-+ * ifield.scm (<ifield>): Delete members start,length.
-+ New member bitrange.
-+ (<ifield>, methods field-start,field-length): Update.
-+ (fld:start): New arg insn-len. All callers updated.
-+ (<ifield>, methods field-mask,field-value): Update.
-+ (-ifield-parse): Update.
-+ (ifield-init!): Update.
-+ * iformat.scm (compute-insn-length): Simplify.
-+ (compute-insn-mask): Update.
-+ * insn.scm (insn:value): Update.
-+ * mach.scm (<arch-data>): New members default-insn-bitsize,insn-lsb0?.
-+ (current-arch-default-insn-bitsize): New proc.
-+ (current-arch-insn-lsb0?): New proc.
-+ (-arch-parse,-arch-read): Update.
-+ (<cpu>): New member file-transform.
-+ (-cpu-parse,-cpu-read): Update.
-+ * opcodes.scm (<hw-asm>, method gen-extract): Pass ex_info to handler.
-+ (gen-hash-defines): Define CGEN_INSN_LSB0_P.
-+ (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
-+ (gen-insert-switch): Update args of @arch@_cgen_insert_operand.
-+ (gen-extract-switch): Update args of @arch@_cgen_extract_operand.
-+ (gen-opcode-open): Set CGEN_OPCODE_INSN_ENDIAN.
-+ * operand.scm (op:start): Update call to field-start method.
-+ * sim-decode.scm (opcode-slots): New arg lsb0?.
-+ (fill-slot!,build-slots): Ditto.
-+ (build-decode-table-entry,build-decode-table-guts): Ditto.
-+ (gen-decoder-table,gen-decoder-switch,gen-decoder): Ditto.
-+ (gen-decode-fn): Ditto.
-+ (cgen-decode.c): Update call to gen-decode-fn.
-+ * sim.scm (gen-argbuf-type): Move `semantic' to cpu specific part.
-+ (-gen-cpu-header,-gen-cpuall-includes): New procs.
-+ (cgen-cpuall.h): Call -gen-cpuall-includes.
-+ * types.scm (<bitrange>): New class.
-+ (types-init!,types-finish!): New procs.
-+ * utils-cgen.scm (parse-number): New proc.
-+ (parse-boolean): New proc.
-+ * utils.scm (word-value): Renamed from shift-bits, rewrite.
-+ (word-mask): Rewrite.
-+ * m32r.cpu (define-arch): New fields default-insn-bitsize,insn-lsb0?.
-+ (m32rxf): New field `file-transform'.
-+ * m32r.opc (my_print_insn): print_int_insn -> print_insn.
-+
-+ * hobbit.h: Fix include file name.
-+
-+Fri Oct 9 16:58:10 1998 Doug Evans <devans@seba.cygnus.com>
-+
-+ * slib: New directory of slib files used by cgen/hobbit.
-+ * hobbit.scm: New file.
-+ * hobbit.c: New file.
-+ * hobbit.h: New file.
-+ * hobscmif.h: New file.
-+ * hob-main.c: New file.
-+ * hobslib.scm: New file.
-+ * hob.sh: New file.
-+ * Makefile.am: Add support for compiling hobbit, and using compiled
-+ version of hobbit to compile cgen.
-+ * Makefile.in: Regenerate.
-+ * configure.in: Support --with-hobbit.
-+ * configure: Regenerate.
-+ * acconfig.h (WITH_HOBBIT): Add.
-+ * config.in: Regenerate.
-+
-+ * rtl.scm: New file, was cdl-c.scm.
-+ Definition of rtx funcs moved to rtx-funcs.scm.
-+ (semantic-in-out-operands): Rewrite to compute object form of
-+ semantic code.
-+ * rtx-funcs.scm: New file.
-+
-+ * cgen-gh.c: #include "config.h".
-+ (gh_cadddr,gh_cddddr): New fns.
-+ (cgh_vector_to_list): New fn.
-+ (cgh_map1,cgh_map2,cgh_map1_fn2): Rewrite.
-+ (cgh_init): Prefix qsort procs with "cgh-".
-+ * cgen-gh.h (gh_cadddr,gh_cddddr,cgh_vector_to_list): Declare.
-+ * cgen.c: #include "config.h".
-+
-+ * attr.scm (bitset-attr?): New proc.
-+ (<bitset-attribute>, method parse-value): Value syntax changed from
-+ (val1 val2 ...) to val1,val2,....
-+ (<bitset-attribute>): New method gen-value.
-+ (<integer-attribute>): New method gen-value.
-+ (<enum-attribute>): New method gen-value.
-+ * cpu.scm: Disable debugging evaluator if (not (defined? 'DEBUG-EVAL)).
-+ (<reader>): New class.
-+ (CURRENT-ARCH,CURRENT-READER): New globals.
-+ (keep-mach?): Move here from mach.scm.
-+ * mach.scm (arch,arch-comment,arch-default-mach): Delete.
-+ (<arch>): New class.
-+ (<arch-data>): New class.
-+ (<cpu>): Make subclass of <ident>.
-+ (*ENDIAN* variables): Delete.
-+ (process-state-vars): Delete.
-+ (mach-finish!): Add `base' value to MACH attribute.
-+ * hardware.scm (<hardware>): Make subclass of <ident>.
-+ (hw:std-attrs): New global.
-+ (hw-profilable?): New proc.
-+ * ifield.scm (<ifield>): Make subclass of <ident>.
-+ (sort-ifield-list): Move here from iformat.scm.
-+ * iformat.scm (<iformat>): Renamed from <insn-format>.
-+ Make subclass of <ident>.
-+ (-ifmt-search-key): Include cti? in categorization of formats.
-+ (ifmt-analyze): Compile semantics (turn to object form).
-+ * insn.scm (<insn>): Make subclass of <ident>.
-+ New member compiled-semantics.
-+ (insn:std-attrs): Add SKIP-CTI, VIRTUAL.
-+ * mode.scm (<mode>): Make subclass of <ident>.
-+ (UBI): Delete.
-+ * model.scm (<unit>): Make subclass of <ident>.
-+ New members inputs,outputs.
-+ (<model>): Make subclass of <ident>. New member state.
-+ (-unit-parse): Parse inputs,outputs.
-+ (<iunit>): New class.
-+ (-insn-timing-parse-model): New proc.
-+ (parse-insn-timing): Function unit spec rewritten.
-+ * operand.scm (<operand>): Make subclass of <ident>.
-+ New members sem-name,num,cond? New method gen-pretty-name.
-+ (hw-index-scalar): New global.
-+ (op-nub-hw): Move here from rtl.scm.
-+ (op:lookup-sem-name,op-profilable?): New procs.
-+ * pmacros.scm: Rewrite to pass through hobbit.
-+ * utils-cgen.scm (gen-attr-defn): Simplify using new gen-value method.
-+ * utils.scm (logit): Make a macro.
-+ (bit-set?): Rewrite.
-+ (high-part): Rewrite.
-+
-+ * m32r.cpu (define-arch): Move to top of file.
-+ (cpu family m32rbf): Renamed from m32rb.
-+ (model m32r/d): Function unit spec rewritten.
-+ (all insns): Ditto. Replace UBI with BI.
-+
-+ * opcodes.scm (gen-attr-table-decls): Declare
-+ @arch@_cgen_hw_attr_table.
-+ (gen-attr-table-defns): Generate hw attribute table.
-+
-+ * sim-cpu.scm (-gen-engine-decls): New proc.
-+ (-gen-model-decls): New proc.
-+ (gen-parallel-exec-type): Add new member `written' to struct parexec.
-+ (-gen-record-args): Add SEM_BRANCH_INIT_EXTRACT if cti insn.
-+ (-gen-record-profile-args): Simplify.
-+ (-gen-parallel-sem-case): Delete.
-+ (gen-semantic-fn): Emit SEM_BRANCH_{INIT,FINI} if cti insn.
-+ New local `written'. Delete profiling code.
-+ (-gen-sem-case): Ditto.
-+ (-uncond-written-mask,-any-cond-written?): New procs.
-+ (cgen-sem-switch.c): Include duplicates of insns that can be executed
-+ parallelly or serially, and write-back handlers for all parallel insns.
-+ * sim-decode.scm (-gen-decode-insn-globals): Add parallel write-back
-+ support to initialization of struct insn_sem.
-+ (-gen-idesc-decls): Add parallel write-back support to struct idesc.
-+ (-gen-insn-sem-type): Add parallel write-back support to struct
-+ insn_sem.
-+ (-gen-idesc-init-fn): Add support for virtual insns.
-+ Add parallel write-back support.
-+ * sim-model.scm (gen-model-profile-fn): Delete
-+ (-gen-model-fn-decls): New proc.
-+ (-gen-model-insn-fn,-gen-model-insn-fns): New procs.
-+ (-gen-model-init-fn): New proc.
-+ (-gen-mach-defns): Initialize insn-name lookup and fast/full engine_fn
-+ members in @mach@_init_cpu.
-+ (cgen-model.c): Generate model handlers for each insn.
-+ * sim.scm (gen-define-field-macro): Cti insns handled differently.
-+ (<hw-pc>): New method gen-write.
-+ (<hw-register>, method gen-write): New arg `mode'.
-+ (<hw-register>): Delete method gen-record-profile!.
-+ New method gen-profile-index-type.
-+ (<hw-memory>, method gen-write): New arg `mode'.
-+ (<hw-address>, method gen-extract): Delete.
-+ (<hw-address>, method gen-write): New arg `mode'.
-+ (<hw-index>, method get-write-index): Rewrite.
-+ (<pc>, method cxmake-get-direct): Delete.
-+ (<pc>): New method cxmake-get. Comment out methods
-+ gen-set-quiet,gen-set-trace.
-+ (<operand>): New methods gen-argbuf-elm,gen-profile-argbuf-elm,
-+ gen-profile-index-type,gen-profile-code.
-+ Delete method gen-pretty-name. Rewrite method gen-write.
-+ Delete method cxmake-get-direct.
-+ (-op-gen-set-trace): Update `written'.
-+ (-op-gen-set-trace-parallel): Ditto.
-+ (-gen-hw-index-raw,-gen-hw-index): Handle strings.
-+ (gen-cpu-insn-enum-decl): Add extra entries for parallel
-+ insns and their write-back handlers.
-+ (insn-op-lookup): New proc.
-+ (<unit>): New method gen-profile-code.
-+ (<iunit>): New method gen-profile-code.
-+ (gen-argbuf-elm): Add profiling elements.
-+ (gen-argbuf-type): Define cti insns separately in their own struct.
-+ Add member `addr_cache' to this struct. Add entries for pbb virtual
-+ insns. Move semantic entries here from struct scache.
-+ Delete everything from struct scache except argbuf.
-+ (<insn>, method gen-profile-locals): Rewrite.
-+ (<insn>, method gen-profile-code): Rewrite.
-+ (sim-finish!): Create virtual pbb insns.
-+
-+Tue Sep 15 15:22:02 1998 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * m32r.cpu (h-cr): Add bbpc,bbpsw.
-+ (h-sm,h-bsm,h-ie,h-bie,h-bcond,h-bpc): Delete.
-+ (h-psw,h-bpsw,h-bbpsw): Define.
-+ (rte,trap): Handle bbpc,bbpsw.
-+ * opcodes.scm (max-operand-instances): Fix typo.
-+ * sim.scm (<hardware-base>, method 'fun-access?): Don't force virtual
-+ hardware elements to be fun-access.
-+ (-hw-gen-fun-get,-hw-gen-fun-set): Fix handling of scalars.
-+
-+Wed Sep 9 15:28:55 1998 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * m32r.cpu (trap): Pass `pc' to m32r_trap.
-+
-+Mon Aug 10 14:29:33 1998 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * opcodes.scm (gen-insn-table-entry): Comment out generation of cdx.
-+
-+Mon Aug 3 11:51:04 1998 Doug Evans <devans@seba.cygnus.com>
-+
-+ * m32r.cpu (cpu m32rb): Renamed from m32r to distinguish from
-+ architecture name.
-+ (mach m32r): Update.
-+
-+ * mach.scm (mach:supports?): New proc.
-+ * sim-cpu.scm (gen-cpu-reg-access-{decls,defns}): Renamed from
-+ gen-reg-access-{decls,defns}.
-+ * sim.scm (gen-reg-access-{decl,defn}): New procs.
-+ (gen-mach-bfd-name): New proc.
-+ (gen-arch-reg-access-{decls,defns}): New procs.
-+ (cgen-arch.[ch]): Output register access cover fns.
-+
-+ * hardware.scm (hardware-builtin!): Set print handlers for
-+ h-addr,h-iaddr.
-+ * m32r.opc (parse_hash,parse_hi16,parse_slo16,parse_ulo16): New arg
-+ `od'.
-+ (CGEN_PRINT_NORMAL,print_hash): Ditto.
-+ (my_print_insn): Ditto. Delete args buf, buflen.
-+ * opcodes.scm: Pass `od' (opcode-descriptor) to all C handlers.
-+ (-hw-asm-specs): Add `handlers' spec.
-+ (-parse-hw-asm): Lookup class at runtime. If no asm-spec, use
-+ `normal-hw-asm'.
-+ (<hw-asm>): Renamed from <opval>. New elements parse,insert,extract,
-+ print.
-+ (<hw-asm>, gen-insert,gen-extract,gen-print): Use them.
-+ (<hw-asm>, parse!): New method.
-+ (gen-insn-table-entry): Print semantics.
-+ (gen-opcode-open): Renamed from gen-opcode-table.
-+
-+ * utils.scm (string-write): No longer a macro.
-+ (-string-write): Handle procedure args.
-+ * opcodes.scm: Update all calls to string-write.
-+ * sim-cpu.scm: Ditto.
-+ * sim-decode.scm: Ditto.
-+ * sim-model.scm: Ditto.
-+ * sim.scm: Ditto.
-+
-+Fri Jul 31 14:40:38 1998 Doug Evans <devans@seba.cygnus.com>
-+
-+ * opcodes.scm (cgen-ibd.h,gen-extra-ibd.h): New procs.
-+ (-gen-insn-builders,-gen-insn-builder): New procs.
-+
-+Fri Jul 24 11:38:59 1998 Doug Evans <devans@canuck.cygnus.com>
-+
-+ * opcodes.scm (gen-syntax-entry): Fix bracketing for -Wall.
-+ (gen-opcode-table): Properly terminate comment.
-+
-+Tue Jul 21 10:51:42 1998 Doug Evans <devans@seba.cygnus.com>
-+
-+ * Version 0.6.0.
-+ Clean up pass over everything, so starting fresh.
-diff -Nur binutils-2.24.orig/cgen/configure binutils-2.24/cgen/configure
---- binutils-2.24.orig/cgen/configure 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/configure 2016-06-30 21:26:12.601891090 +0200
-@@ -0,0 +1,1374 @@
-+#! /bin/sh
-+
-+# Guess values for system-dependent variables and create Makefiles.
-+# Generated automatically using autoconf version 2.13
-+# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-+#
-+# This configure script is free software; the Free Software Foundation
-+# gives unlimited permission to copy, distribute and modify it.
-+
-+# Defaults:
-+ac_help=
-+ac_default_prefix=/usr/local
-+# Any additions from configure.in:
-+ac_help="$ac_help
-+ --enable-maintainer-mode enable make rules and dependencies not useful
-+ (and sometimes confusing) to the casual installer"
-+
-+# Initialize some variables set by options.
-+# The variables have the same names as the options, with
-+# dashes changed to underlines.
-+build=NONE
-+cache_file=./config.cache
-+exec_prefix=NONE
-+host=NONE
-+no_create=
-+nonopt=NONE
-+no_recursion=
-+prefix=NONE
-+program_prefix=NONE
-+program_suffix=NONE
-+program_transform_name=s,x,x,
-+silent=
-+site=
-+sitefile=
-+srcdir=
-+target=NONE
-+verbose=
-+x_includes=NONE
-+x_libraries=NONE
-+bindir='${exec_prefix}/bin'
-+sbindir='${exec_prefix}/sbin'
-+libexecdir='${exec_prefix}/libexec'
-+datadir='${prefix}/share'
-+sysconfdir='${prefix}/etc'
-+sharedstatedir='${prefix}/com'
-+localstatedir='${prefix}/var'
-+libdir='${exec_prefix}/lib'
-+includedir='${prefix}/include'
-+oldincludedir='/usr/include'
-+infodir='${prefix}/info'
-+mandir='${prefix}/man'
-+
-+# Initialize some other variables.
-+subdirs=
-+MFLAGS= MAKEFLAGS=
-+SHELL=${CONFIG_SHELL-/bin/sh}
-+# Maximum number of lines to put in a shell here document.
-+ac_max_here_lines=12
-+
-+ac_prev=
-+for ac_option
-+do
-+
-+ # If the previous option needs an argument, assign it.
-+ if test -n "$ac_prev"; then
-+ eval "$ac_prev=\$ac_option"
-+ ac_prev=
-+ continue
-+ fi
-+
-+ case "$ac_option" in
-+ -*=*) ac_optarg=`echo "$ac_option" | sed 's/[-_a-zA-Z0-9]*=//'` ;;
-+ *) ac_optarg= ;;
-+ esac
-+
-+ # Accept the important Cygnus configure options, so we can diagnose typos.
-+
-+ case "$ac_option" in
-+
-+ -bindir | --bindir | --bindi | --bind | --bin | --bi)
-+ ac_prev=bindir ;;
-+ -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
-+ bindir="$ac_optarg" ;;
-+
-+ -build | --build | --buil | --bui | --bu)
-+ ac_prev=build ;;
-+ -build=* | --build=* | --buil=* | --bui=* | --bu=*)
-+ build="$ac_optarg" ;;
-+
-+ -cache-file | --cache-file | --cache-fil | --cache-fi \
-+ | --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
-+ ac_prev=cache_file ;;
-+ -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
-+ | --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* | --c=*)
-+ cache_file="$ac_optarg" ;;
-+
-+ -datadir | --datadir | --datadi | --datad | --data | --dat | --da)
-+ ac_prev=datadir ;;
-+ -datadir=* | --datadir=* | --datadi=* | --datad=* | --data=* | --dat=* \
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-+ datadir="$ac_optarg" ;;
-+
-+ -disable-* | --disable-*)
-+ ac_feature=`echo $ac_option|sed -e 's/-*disable-//'`
-+ # Reject names that are not valid shell variable names.
-+ if test -n "`echo $ac_feature| sed 's/[-a-zA-Z0-9_]//g'`"; then
-+ { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
-+ fi
-+ ac_feature=`echo $ac_feature| sed 's/-/_/g'`
-+ eval "enable_${ac_feature}=no" ;;
-+
-+ -enable-* | --enable-*)
-+ ac_feature=`echo $ac_option|sed -e 's/-*enable-//' -e 's/=.*//'`
-+ # Reject names that are not valid shell variable names.
-+ if test -n "`echo $ac_feature| sed 's/[-_a-zA-Z0-9]//g'`"; then
-+ { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
-+ fi
-+ ac_feature=`echo $ac_feature| sed 's/-/_/g'`
-+ case "$ac_option" in
-+ *=*) ;;
-+ *) ac_optarg=yes ;;
-+ esac
-+ eval "enable_${ac_feature}='$ac_optarg'" ;;
-+
-+ -exec-prefix | --exec_prefix | --exec-prefix | --exec-prefi \
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-+ ac_prev=exec_prefix ;;
-+ -exec-prefix=* | --exec_prefix=* | --exec-prefix=* | --exec-prefi=* \
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-+ | --exec=* | --exe=* | --ex=*)
-+ exec_prefix="$ac_optarg" ;;
-+
-+ -gas | --gas | --ga | --g)
-+ # Obsolete; use --with-gas.
-+ with_gas=yes ;;
-+
-+ -help | --help | --hel | --he)
-+ # Omit some internal or obsolete options to make the list less imposing.
-+ # This message is too long to be a string in the A/UX 3.1 sh.
-+ cat << EOF
-+Usage: configure [options] [host]
-+Options: [defaults in brackets after descriptions]
-+Configuration:
-+ --cache-file=FILE cache test results in FILE
-+ --help print this message
-+ --no-create do not create output files
-+ --quiet, --silent do not print \`checking...' messages
-+ --site-file=FILE use FILE as the site file
-+ --version print the version of autoconf that created configure
-+Directory and file names:
-+ --prefix=PREFIX install architecture-independent files in PREFIX
-+ [$ac_default_prefix]
-+ --exec-prefix=EPREFIX install architecture-dependent files in EPREFIX
-+ [same as prefix]
-+ --bindir=DIR user executables in DIR [EPREFIX/bin]
-+ --sbindir=DIR system admin executables in DIR [EPREFIX/sbin]
-+ --libexecdir=DIR program executables in DIR [EPREFIX/libexec]
-+ --datadir=DIR read-only architecture-independent data in DIR
-+ [PREFIX/share]
-+ --sysconfdir=DIR read-only single-machine data in DIR [PREFIX/etc]
-+ --sharedstatedir=DIR modifiable architecture-independent data in DIR
-+ [PREFIX/com]
-+ --localstatedir=DIR modifiable single-machine data in DIR [PREFIX/var]
-+ --libdir=DIR object code libraries in DIR [EPREFIX/lib]
-+ --includedir=DIR C header files in DIR [PREFIX/include]
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-+ --srcdir=DIR find the sources in DIR [configure dir or ..]
-+ --program-prefix=PREFIX prepend PREFIX to installed program names
-+ --program-suffix=SUFFIX append SUFFIX to installed program names
-+ --program-transform-name=PROGRAM
-+ run sed PROGRAM on installed program names
-+EOF
-+ cat << EOF
-+Host type:
-+ --build=BUILD configure for building on BUILD [BUILD=HOST]
-+ --host=HOST configure for HOST [guessed]
-+ --target=TARGET configure for TARGET [TARGET=HOST]
-+Features and packages:
-+ --disable-FEATURE do not include FEATURE (same as --enable-FEATURE=no)
-+ --enable-FEATURE[=ARG] include FEATURE [ARG=yes]
-+ --with-PACKAGE[=ARG] use PACKAGE [ARG=yes]
-+ --without-PACKAGE do not use PACKAGE (same as --with-PACKAGE=no)
-+ --x-includes=DIR X include files are in DIR
-+ --x-libraries=DIR X library files are in DIR
-+EOF
-+ if test -n "$ac_help"; then
-+ echo "--enable and --with options recognized:$ac_help"
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-+ exit 0 ;;
-+
-+ -host | --host | --hos | --ho)
-+ ac_prev=host ;;
-+ -host=* | --host=* | --hos=* | --ho=*)
-+ host="$ac_optarg" ;;
-+
-+ -includedir | --includedir | --includedi | --included | --include \
-+ | --includ | --inclu | --incl | --inc)
-+ ac_prev=includedir ;;
-+ -includedir=* | --includedir=* | --includedi=* | --included=* | --include=* \
-+ | --includ=* | --inclu=* | --incl=* | --inc=*)
-+ includedir="$ac_optarg" ;;
-+
-+ -infodir | --infodir | --infodi | --infod | --info | --inf)
-+ ac_prev=infodir ;;
-+ -infodir=* | --infodir=* | --infodi=* | --infod=* | --info=* | --inf=*)
-+ infodir="$ac_optarg" ;;
-+
-+ -libdir | --libdir | --libdi | --libd)
-+ ac_prev=libdir ;;
-+ -libdir=* | --libdir=* | --libdi=* | --libd=*)
-+ libdir="$ac_optarg" ;;
-+
-+ -libexecdir | --libexecdir | --libexecdi | --libexecd | --libexec \
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-+ ac_prev=libexecdir ;;
-+ -libexecdir=* | --libexecdir=* | --libexecdi=* | --libexecd=* | --libexec=* \
-+ | --libexe=* | --libex=* | --libe=*)
-+ libexecdir="$ac_optarg" ;;
-+
-+ -localstatedir | --localstatedir | --localstatedi | --localstated \
-+ | --localstate | --localstat | --localsta | --localst \
-+ | --locals | --local | --loca | --loc | --lo)
-+ ac_prev=localstatedir ;;
-+ -localstatedir=* | --localstatedir=* | --localstatedi=* | --localstated=* \
-+ | --localstate=* | --localstat=* | --localsta=* | --localst=* \
-+ | --locals=* | --local=* | --loca=* | --loc=* | --lo=*)
-+ localstatedir="$ac_optarg" ;;
-+
-+ -mandir | --mandir | --mandi | --mand | --man | --ma | --m)
-+ ac_prev=mandir ;;
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-+ mandir="$ac_optarg" ;;
-+
-+ -nfp | --nfp | --nf)
-+ # Obsolete; use --without-fp.
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-+
-+ -no-create | --no-create | --no-creat | --no-crea | --no-cre \
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-+ no_create=yes ;;
-+
-+ -no-recursion | --no-recursion | --no-recursio | --no-recursi \
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-+ no_recursion=yes ;;
-+
-+ -oldincludedir | --oldincludedir | --oldincludedi | --oldincluded \
-+ | --oldinclude | --oldinclud | --oldinclu | --oldincl | --oldinc \
-+ | --oldin | --oldi | --old | --ol | --o)
-+ ac_prev=oldincludedir ;;
-+ -oldincludedir=* | --oldincludedir=* | --oldincludedi=* | --oldincluded=* \
-+ | --oldinclude=* | --oldinclud=* | --oldinclu=* | --oldincl=* | --oldinc=* \
-+ | --oldin=* | --oldi=* | --old=* | --ol=* | --o=*)
-+ oldincludedir="$ac_optarg" ;;
-+
-+ -prefix | --prefix | --prefi | --pref | --pre | --pr | --p)
-+ ac_prev=prefix ;;
-+ -prefix=* | --prefix=* | --prefi=* | --pref=* | --pre=* | --pr=* | --p=*)
-+ prefix="$ac_optarg" ;;
-+
-+ -program-prefix | --program-prefix | --program-prefi | --program-pref \
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-+ ac_prev=program_prefix ;;
-+ -program-prefix=* | --program-prefix=* | --program-prefi=* \
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-+ program_prefix="$ac_optarg" ;;
-+
-+ -program-suffix | --program-suffix | --program-suffi | --program-suff \
-+ | --program-suf | --program-su | --program-s)
-+ ac_prev=program_suffix ;;
-+ -program-suffix=* | --program-suffix=* | --program-suffi=* \
-+ | --program-suff=* | --program-suf=* | --program-su=* | --program-s=*)
-+ program_suffix="$ac_optarg" ;;
-+
-+ -program-transform-name | --program-transform-name \
-+ | --program-transform-nam | --program-transform-na \
-+ | --program-transform-n | --program-transform- \
-+ | --program-transform | --program-transfor \
-+ | --program-transfo | --program-transf \
-+ | --program-trans | --program-tran \
-+ | --progr-tra | --program-tr | --program-t)
-+ ac_prev=program_transform_name ;;
-+ -program-transform-name=* | --program-transform-name=* \
-+ | --program-transform-nam=* | --program-transform-na=* \
-+ | --program-transform-n=* | --program-transform-=* \
-+ | --program-transform=* | --program-transfor=* \
-+ | --program-transfo=* | --program-transf=* \
-+ | --program-trans=* | --program-tran=* \
-+ | --progr-tra=* | --program-tr=* | --program-t=*)
-+ program_transform_name="$ac_optarg" ;;
-+
-+ -q | -quiet | --quiet | --quie | --qui | --qu | --q \
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-+ silent=yes ;;
-+
-+ -sbindir | --sbindir | --sbindi | --sbind | --sbin | --sbi | --sb)
-+ ac_prev=sbindir ;;
-+ -sbindir=* | --sbindir=* | --sbindi=* | --sbind=* | --sbin=* \
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-+ sbindir="$ac_optarg" ;;
-+
-+ -sharedstatedir | --sharedstatedir | --sharedstatedi \
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-+ ac_prev=sharedstatedir ;;
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-+ | --sharedstated=* | --sharedstate=* | --sharedstat=* | --sharedsta=* \
-+ | --sharedst=* | --shareds=* | --shared=* | --share=* | --shar=* \
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-+ sharedstatedir="$ac_optarg" ;;
-+
-+ -site | --site | --sit)
-+ ac_prev=site ;;
-+ -site=* | --site=* | --sit=*)
-+ site="$ac_optarg" ;;
-+
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-+ ac_prev=sitefile ;;
-+ -site-file=* | --site-file=* | --site-fil=* | --site-fi=* | --site-f=*)
-+ sitefile="$ac_optarg" ;;
-+
-+ -srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
-+ ac_prev=srcdir ;;
-+ -srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
-+ srcdir="$ac_optarg" ;;
-+
-+ -sysconfdir | --sysconfdir | --sysconfdi | --sysconfd | --sysconf \
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-+ ac_prev=sysconfdir ;;
-+ -sysconfdir=* | --sysconfdir=* | --sysconfdi=* | --sysconfd=* | --sysconf=* \
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-+ sysconfdir="$ac_optarg" ;;
-+
-+ -target | --target | --targe | --targ | --tar | --ta | --t)
-+ ac_prev=target ;;
-+ -target=* | --target=* | --targe=* | --targ=* | --tar=* | --ta=* | --t=*)
-+ target="$ac_optarg" ;;
-+
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-+ -with-* | --with-*)
-+ ac_package=`echo $ac_option|sed -e 's/-*with-//' -e 's/=.*//'`
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-+ ac_package=`echo $ac_package| sed 's/-/_/g'`
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-+ *) ac_optarg=yes ;;
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-+ eval "with_${ac_package}='$ac_optarg'" ;;
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-+ -without-* | --without-*)
-+ ac_package=`echo $ac_option|sed -e 's/-*without-//'`
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-+ fi
-+ ac_package=`echo $ac_package| sed 's/-/_/g'`
-+ eval "with_${ac_package}=no" ;;
-+
-+ --x)
-+ # Obsolete; use --with-x.
-+ with_x=yes ;;
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-+ -x-includes | --x-includes | --x-include | --x-includ | --x-inclu \
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-+ ac_prev=x_includes ;;
-+ -x-includes=* | --x-includes=* | --x-include=* | --x-includ=* | --x-inclu=* \
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-+ x_includes="$ac_optarg" ;;
-+
-+ -x-libraries | --x-libraries | --x-librarie | --x-librari \
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-+ ac_prev=x_libraries ;;
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-+ x_libraries="$ac_optarg" ;;
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-+ -*) { echo "configure: error: $ac_option: invalid option; use --help to show usage" 1>&2; exit 1; }
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-+ *)
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-+ fi
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-+ { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; }
-+ fi
-+ nonopt="$ac_option"
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-+if test -n "$ac_prev"; then
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-+# File descriptor usage:
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-+# 1 file creation
-+# 2 errors and warnings
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-+ exec 6>&1
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-+
-+echo "\
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-+
-+# confdefs.h avoids OS command line length limits that DEFS can exceed.
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-+# AIX cpp loses on an empty file, so make sure it contains at least a newline.
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-+# A filename unique to this package, relative to the directory that
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-+ if test ! -r $srcdir/$ac_unique_file; then
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-+ fi
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-+ ac_srcdir_defaulted=no
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-+if test ! -r $srcdir/$ac_unique_file; then
-+ if test "$ac_srcdir_defaulted" = yes; then
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-+ else
-+ { echo "configure: error: can not find sources in $srcdir" 1>&2; exit 1; }
-+ fi
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-+
-+# Prefer explicitly selected file to automatically selected ones.
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-+ else
-+ CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
-+ fi
-+ fi
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-+for ac_site_file in $CONFIG_SITE; do
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-+ fi
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-+else
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-+fi
-+
-+ac_ext=c
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-+ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-+ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
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-+ac_exeext=
-+ac_objext=o
-+if (echo "testing\c"; echo 1,2,3) | grep c >/dev/null; then
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-+ if (echo -n testing; echo 1,2,3) | sed s/-n/xn/ | grep xn >/dev/null; then
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-+ break
-+ fi
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-+
-+
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-+# configure --host=HOST --target=TARGET --build=BUILD NONOPT
-+#
-+# The rules are:
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-+# same time.
-+# 2. Host defaults to nonopt.
-+# 3. If nonopt is not specified, then host defaults to the current host,
-+# as determined by config.guess.
-+# 4. Target and build default to nonopt.
-+# 5. If nonopt is not specified, then target and build default to host.
-+
-+# The aliases save the names the user supplied, while $host etc.
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-+*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-+esac
-+
-+
-+# Make sure we can run config.sub.
-+if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-+else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-+fi
-+
-+echo $ac_n "checking host system type""... $ac_c" 1>&6
-+echo "configure:586: checking host system type" >&5
-+
-+host_alias=$host
-+case "$host_alias" in
-+NONE)
-+ case $nonopt in
-+ NONE)
-+ if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
-+ else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
-+ fi ;;
-+ *) host_alias=$nonopt ;;
-+ esac ;;
-+esac
-+
-+host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-+host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-+host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-+host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-+echo "$ac_t""$host" 1>&6
-+
-+echo $ac_n "checking target system type""... $ac_c" 1>&6
-+echo "configure:607: checking target system type" >&5
-+
-+target_alias=$target
-+case "$target_alias" in
-+NONE)
-+ case $nonopt in
-+ NONE) target_alias=$host_alias ;;
-+ *) target_alias=$nonopt ;;
-+ esac ;;
-+esac
-+
-+target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-+target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-+target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-+target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-+echo "$ac_t""$target" 1>&6
-+
-+echo $ac_n "checking build system type""... $ac_c" 1>&6
-+echo "configure:625: checking build system type" >&5
-+
-+build_alias=$build
-+case "$build_alias" in
-+NONE)
-+ case $nonopt in
-+ NONE) build_alias=$host_alias ;;
-+ *) build_alias=$nonopt ;;
-+ esac ;;
-+esac
-+
-+build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-+build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-+build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-+build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-+echo "$ac_t""$build" 1>&6
-+
-+test "$host_alias" != "$target_alias" &&
-+ test "$program_prefix$program_suffix$program_transform_name" = \
-+ NONENONEs,x,x, &&
-+ program_prefix=${target_alias}-
-+
-+# Find a good install program. We prefer a C program (faster),
-+# so one script is as good as another. But avoid the broken or
-+# incompatible versions:
-+# SysV /etc/install, /usr/sbin/install
-+# SunOS /usr/etc/install
-+# IRIX /sbin/install
-+# AIX /bin/install
-+# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
-+# AFS /usr/afsws/bin/install, which mishandles nonexistent args
-+# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
-+# ./install, which can be erroneously created by make from ./install.sh.
-+echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-+echo "configure:659: checking for a BSD compatible install" >&5
-+if test -z "$INSTALL"; then
-+if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
-+ echo $ac_n "(cached) $ac_c" 1>&6
-+else
-+ IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
-+ for ac_dir in $PATH; do
-+ # Account for people who put trailing slashes in PATH elements.
-+ case "$ac_dir/" in
-+ /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
-+ *)
-+ # OSF1 and SCO ODT 3.0 have their own names for install.
-+ # Don't use installbsd from OSF since it installs stuff as root
-+ # by default.
-+ for ac_prog in ginstall scoinst install; do
-+ if test -f $ac_dir/$ac_prog; then
-+ if test $ac_prog = install &&
-+ grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
-+ # AIX install. It has an incompatible calling convention.
-+ :
-+ else
-+ ac_cv_path_install="$ac_dir/$ac_prog -c"
-+ break 2
-+ fi
-+ fi
-+ done
-+ ;;
-+ esac
-+ done
-+ IFS="$ac_save_IFS"
-+
-+fi
-+ if test "${ac_cv_path_install+set}" = set; then
-+ INSTALL="$ac_cv_path_install"
-+ else
-+ # As a last resort, use the slow shell script. We don't cache a
-+ # path for INSTALL within a source directory, because that will
-+ # break other packages using the cache if that directory is
-+ # removed, or if the path is relative.
-+ INSTALL="$ac_install_sh"
-+ fi
-+fi
-+echo "$ac_t""$INSTALL" 1>&6
-+
-+# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
-+# It thinks the first close brace ends the variable substitution.
-+test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
-+
-+test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
-+
-+test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-+
-+echo $ac_n "checking whether build environment is sane""... $ac_c" 1>&6
-+echo "configure:712: checking whether build environment is sane" >&5
-+# Just in case
-+sleep 1
-+echo timestamp > conftestfile
-+# Do `set' in a subshell so we don't clobber the current shell's
-+# arguments. Must try -L first in case configure is actually a
-+# symlink; some systems play weird games with the mod time of symlinks
-+# (eg FreeBSD returns the mod time of the symlink's containing
-+# directory).
-+if (
-+ set X `ls -Lt $srcdir/configure conftestfile 2> /dev/null`
-+ if test "$*" = "X"; then
-+ # -L didn't work.
-+ set X `ls -t $srcdir/configure conftestfile`
-+ fi
-+ if test "$*" != "X $srcdir/configure conftestfile" \
-+ && test "$*" != "X conftestfile $srcdir/configure"; then
-+
-+ # If neither matched, then we have a broken ls. This can happen
-+ # if, for instance, CONFIG_SHELL is bash and it inherits a
-+ # broken ls alias from the environment. This has actually
-+ # happened. Such a system could not be considered "sane".
-+ { echo "configure: error: ls -t appears to fail. Make sure there is not a broken
-+alias in your environment" 1>&2; exit 1; }
-+ fi
-+
-+ test "$2" = conftestfile
-+ )
-+then
-+ # Ok.
-+ :
-+else
-+ { echo "configure: error: newly created file is older than distributed files!
-+Check your system clock" 1>&2; exit 1; }
-+fi
-+rm -f conftest*
-+echo "$ac_t""yes" 1>&6
-+if test "$program_transform_name" = s,x,x,; then
-+ program_transform_name=
-+else
-+ # Double any \ or $. echo might interpret backslashes.
-+ cat <<\EOF_SED > conftestsed
-+s,\\,\\\\,g; s,\$,$$,g
-+EOF_SED
-+ program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
-+ rm -f conftestsed
-+fi
-+test "$program_prefix" != NONE &&
-+ program_transform_name="s,^,${program_prefix},; $program_transform_name"
-+# Use a double $ so make ignores it.
-+test "$program_suffix" != NONE &&
-+ program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-+
-+# sed with no file args requires a program.
-+test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-+
-+echo $ac_n "checking whether ${MAKE-make} sets \${MAKE}""... $ac_c" 1>&6
-+echo "configure:769: checking whether ${MAKE-make} sets \${MAKE}" >&5
-+set dummy ${MAKE-make}; ac_make=`echo "$2" | sed 'y%./+-%__p_%'`
-+if eval "test \"`echo '$''{'ac_cv_prog_make_${ac_make}_set'+set}'`\" = set"; then
-+ echo $ac_n "(cached) $ac_c" 1>&6
-+else
-+ cat > conftestmake <<\EOF
-+all:
-+ @echo 'ac_maketemp="${MAKE}"'
-+EOF
-+# GNU make sometimes prints "make[1]: Entering...", which would confuse us.
-+eval `${MAKE-make} -f conftestmake 2>/dev/null | grep temp=`
-+if test -n "$ac_maketemp"; then
-+ eval ac_cv_prog_make_${ac_make}_set=yes
-+else
-+ eval ac_cv_prog_make_${ac_make}_set=no
-+fi
-+rm -f conftestmake
-+fi
-+if eval "test \"`echo '$ac_cv_prog_make_'${ac_make}_set`\" = yes"; then
-+ echo "$ac_t""yes" 1>&6
-+ SET_MAKE=
-+else
-+ echo "$ac_t""no" 1>&6
-+ SET_MAKE="MAKE=${MAKE-make}"
-+fi
-+
-+
-+PACKAGE=cgen
-+
-+VERSION=1.0
-+
-+if test "`cd $srcdir && pwd`" != "`pwd`" && test -f $srcdir/config.status; then
-+ { echo "configure: error: source directory already configured; run "make distclean" there first" 1>&2; exit 1; }
-+fi
-+cat >> confdefs.h <<EOF
-+#define PACKAGE "$PACKAGE"
-+EOF
-+
-+cat >> confdefs.h <<EOF
-+#define VERSION "$VERSION"
-+EOF
-+
-+
-+
-+missing_dir=`cd $ac_aux_dir && pwd`
-+echo $ac_n "checking for working aclocal""... $ac_c" 1>&6
-+echo "configure:815: checking for working aclocal" >&5
-+# Run test in a subshell; some versions of sh will print an error if
-+# an executable is not found, even if stderr is redirected.
-+# Redirect stdin to placate older versions of autoconf. Sigh.
-+if (aclocal --version) < /dev/null > /dev/null 2>&1; then
-+ ACLOCAL=aclocal
-+ echo "$ac_t""found" 1>&6
-+else
-+ ACLOCAL="$missing_dir/missing aclocal"
-+ echo "$ac_t""missing" 1>&6
-+fi
-+
-+echo $ac_n "checking for working autoconf""... $ac_c" 1>&6
-+echo "configure:828: checking for working autoconf" >&5
-+# Run test in a subshell; some versions of sh will print an error if
-+# an executable is not found, even if stderr is redirected.
-+# Redirect stdin to placate older versions of autoconf. Sigh.
-+if (autoconf --version) < /dev/null > /dev/null 2>&1; then
-+ AUTOCONF=autoconf
-+ echo "$ac_t""found" 1>&6
-+else
-+ AUTOCONF="$missing_dir/missing autoconf"
-+ echo "$ac_t""missing" 1>&6
-+fi
-+
-+echo $ac_n "checking for working automake""... $ac_c" 1>&6
-+echo "configure:841: checking for working automake" >&5
-+# Run test in a subshell; some versions of sh will print an error if
-+# an executable is not found, even if stderr is redirected.
-+# Redirect stdin to placate older versions of autoconf. Sigh.
-+if (automake --version) < /dev/null > /dev/null 2>&1; then
-+ AUTOMAKE=automake
-+ echo "$ac_t""found" 1>&6
-+else
-+ AUTOMAKE="$missing_dir/missing automake"
-+ echo "$ac_t""missing" 1>&6
-+fi
-+
-+echo $ac_n "checking for working autoheader""... $ac_c" 1>&6
-+echo "configure:854: checking for working autoheader" >&5
-+# Run test in a subshell; some versions of sh will print an error if
-+# an executable is not found, even if stderr is redirected.
-+# Redirect stdin to placate older versions of autoconf. Sigh.
-+if (autoheader --version) < /dev/null > /dev/null 2>&1; then
-+ AUTOHEADER=autoheader
-+ echo "$ac_t""found" 1>&6
-+else
-+ AUTOHEADER="$missing_dir/missing autoheader"
-+ echo "$ac_t""missing" 1>&6
-+fi
-+
-+echo $ac_n "checking for working makeinfo""... $ac_c" 1>&6
-+echo "configure:867: checking for working makeinfo" >&5
-+# Run test in a subshell; some versions of sh will print an error if
-+# an executable is not found, even if stderr is redirected.
-+# Redirect stdin to placate older versions of autoconf. Sigh.
-+if (makeinfo --version) < /dev/null > /dev/null 2>&1; then
-+ MAKEINFO=makeinfo
-+ echo "$ac_t""found" 1>&6
-+else
-+ MAKEINFO="$missing_dir/missing makeinfo"
-+ echo "$ac_t""missing" 1>&6
-+fi
-+
-+
-+
-+# Find a good install program. We prefer a C program (faster),
-+# so one script is as good as another. But avoid the broken or
-+# incompatible versions:
-+# SysV /etc/install, /usr/sbin/install
-+# SunOS /usr/etc/install
-+# IRIX /sbin/install
-+# AIX /bin/install
-+# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
-+# AFS /usr/afsws/bin/install, which mishandles nonexistent args
-+# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
-+# ./install, which can be erroneously created by make from ./install.sh.
-+echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-+echo "configure:893: checking for a BSD compatible install" >&5
-+if test -z "$INSTALL"; then
-+if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
-+ echo $ac_n "(cached) $ac_c" 1>&6
-+else
-+ IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
-+ for ac_dir in $PATH; do
-+ # Account for people who put trailing slashes in PATH elements.
-+ case "$ac_dir/" in
-+ /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
-+ *)
-+ # OSF1 and SCO ODT 3.0 have their own names for install.
-+ # Don't use installbsd from OSF since it installs stuff as root
-+ # by default.
-+ for ac_prog in ginstall scoinst install; do
-+ if test -f $ac_dir/$ac_prog; then
-+ if test $ac_prog = install &&
-+ grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
-+ # AIX install. It has an incompatible calling convention.
-+ :
-+ else
-+ ac_cv_path_install="$ac_dir/$ac_prog -c"
-+ break 2
-+ fi
-+ fi
-+ done
-+ ;;
-+ esac
-+ done
-+ IFS="$ac_save_IFS"
-+
-+fi
-+ if test "${ac_cv_path_install+set}" = set; then
-+ INSTALL="$ac_cv_path_install"
-+ else
-+ # As a last resort, use the slow shell script. We don't cache a
-+ # path for INSTALL within a source directory, because that will
-+ # break other packages using the cache if that directory is
-+ # removed, or if the path is relative.
-+ INSTALL="$ac_install_sh"
-+ fi
-+fi
-+echo "$ac_t""$INSTALL" 1>&6
-+
-+# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
-+# It thinks the first close brace ends the variable substitution.
-+test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
-+
-+test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
-+
-+test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-+
-+echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-+echo "configure:946: checking for Cygwin environment" >&5
-+if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
-+ echo $ac_n "(cached) $ac_c" 1>&6
-+else
-+ cat > conftest.$ac_ext <<EOF
-+#line 951 "configure"
-+#include "confdefs.h"
-+
-+int main() {
-+
-+#ifndef __CYGWIN__
-+#define __CYGWIN__ __CYGWIN32__
-+#endif
-+return __CYGWIN__;
-+; return 0; }
-+EOF
-+if { (eval echo configure:962: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
-+ rm -rf conftest*
-+ ac_cv_cygwin=yes
-+else
-+ echo "configure: failed program was:" >&5
-+ cat conftest.$ac_ext >&5
-+ rm -rf conftest*
-+ ac_cv_cygwin=no
-+fi
-+rm -f conftest*
-+rm -f conftest*
-+fi
-+
-+echo "$ac_t""$ac_cv_cygwin" 1>&6
-+CYGWIN=
-+test "$ac_cv_cygwin" = yes && CYGWIN=yes
-+echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-+echo "configure:979: checking for mingw32 environment" >&5
-+if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then
-+ echo $ac_n "(cached) $ac_c" 1>&6
-+else
-+ cat > conftest.$ac_ext <<EOF
-+#line 984 "configure"
-+#include "confdefs.h"
-+
-+int main() {
-+return __MINGW32__;
-+; return 0; }
-+EOF
-+if { (eval echo configure:991: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
-+ rm -rf conftest*
-+ ac_cv_mingw32=yes
-+else
-+ echo "configure: failed program was:" >&5
-+ cat conftest.$ac_ext >&5
-+ rm -rf conftest*
-+ ac_cv_mingw32=no
-+fi
-+rm -f conftest*
-+rm -f conftest*
-+fi
-+
-+echo "$ac_t""$ac_cv_mingw32" 1>&6
-+MINGW32=
-+test "$ac_cv_mingw32" = yes && MINGW32=yes
-+
-+
-+echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
-+echo "configure:1010: checking for executable suffix" >&5
-+if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then
-+ echo $ac_n "(cached) $ac_c" 1>&6
-+else
-+ if test "$CYGWIN" = yes || test "$MINGW32" = yes; then
-+ ac_cv_exeext=.exe
-+else
-+ rm -f conftest*
-+ echo 'int main () { return 0; }' > conftest.$ac_ext
-+ ac_cv_exeext=
-+ if { (eval echo configure:1020: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
-+ for file in conftest.*; do
-+ case $file in
-+ *.c | *.o | *.obj | *.ilk | *.pdb) ;;
-+ *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;;
-+ esac
-+ done
-+ else
-+ { echo "configure: error: installation or configuration problem: compiler cannot create executables." 1>&2; exit 1; }
-+ fi
-+ rm -f conftest*
-+ test x"${ac_cv_exeext}" = x && ac_cv_exeext=no
-+fi
-+fi
-+
-+EXEEXT=""
-+test x"${ac_cv_exeext}" != xno && EXEEXT=${ac_cv_exeext}
-+echo "$ac_t""${ac_cv_exeext}" 1>&6
-+ac_exeext=$EXEEXT
-+
-+
-+# Set target cpu.
-+arch=${target_cpu}
-+
-+
-+echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6
-+echo "configure:1046: checking whether to enable maintainer-specific portions of Makefiles" >&5
-+ # Check whether --enable-maintainer-mode or --disable-maintainer-mode was given.
-+if test "${enable_maintainer_mode+set}" = set; then
-+ enableval="$enable_maintainer_mode"
-+ USE_MAINTAINER_MODE=$enableval
-+else
-+ USE_MAINTAINER_MODE=no
-+fi
-+
-+ echo "$ac_t""$USE_MAINTAINER_MODE" 1>&6
-+
-+
-+if test $USE_MAINTAINER_MODE = yes; then
-+ MAINTAINER_MODE_TRUE=
-+ MAINTAINER_MODE_FALSE='#'
-+else
-+ MAINTAINER_MODE_TRUE='#'
-+ MAINTAINER_MODE_FALSE=
-+fi
-+ MAINT=$MAINTAINER_MODE_TRUE
-+
-+
-+if test "$program_transform_name" = s,x,x,; then
-+ program_transform_name=
-+else
-+ # Double any \ or $. echo might interpret backslashes.
-+ cat <<\EOF_SED > conftestsed
-+s,\\,\\\\,g; s,\$,$$,g
-+EOF_SED
-+ program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
-+ rm -f conftestsed
-+fi
-+test "$program_prefix" != NONE &&
-+ program_transform_name="s,^,${program_prefix},; $program_transform_name"
-+# Use a double $ so make ignores it.
-+test "$program_suffix" != NONE &&
-+ program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-+
-+# sed with no file args requires a program.
-+test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-+
-+
-+trap '' 1 2 15
-+cat > confcache <<\EOF
-+# This file is a shell script that caches the results of configure
-+# tests run on this system so they can be shared between configure
-+# scripts and configure runs. It is not useful on other systems.
-+# If it contains results you don't want to keep, you may remove or edit it.
-+#
-+# By default, configure uses ./config.cache as the cache file,
-+# creating it if it does not exist already. You can give configure
-+# the --cache-file=FILE option to use a different cache file; that is
-+# what configure does when it calls configure scripts in
-+# subdirectories, so they share the cache.
-+# Giving --cache-file=/dev/null disables caching, for debugging configure.
-+# config.status only pays attention to the cache file if you give it the
-+# --recheck option to rerun configure.
-+#
-+EOF
-+# The following way of writing the cache mishandles newlines in values,
-+# but we know of no workaround that is simple, portable, and efficient.
-+# So, don't put newlines in cache variables' values.
-+# Ultrix sh set writes to stderr and can't be redirected directly,
-+# and sets the high bit in the cache file unless we assign to the vars.
-+(set) 2>&1 |
-+ case `(ac_space=' '; set | grep ac_space) 2>&1` in
-+ *ac_space=\ *)
-+ # `set' does not quote correctly, so add quotes (double-quote substitution
-+ # turns \\\\ into \\, and sed turns \\ into \).
-+ sed -n \
-+ -e "s/'/'\\\\''/g" \
-+ -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
-+ ;;
-+ *)
-+ # `set' quotes correctly as required by POSIX, so do not add quotes.
-+ sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
-+ ;;
-+ esac >> confcache
-+if cmp -s $cache_file confcache; then
-+ :
-+else
-+ if test -w $cache_file; then
-+ echo "updating cache $cache_file"
-+ cat confcache > $cache_file
-+ else
-+ echo "not updating unwritable cache $cache_file"
-+ fi
-+fi
-+rm -f confcache
-+
-+trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-+
-+test "x$prefix" = xNONE && prefix=$ac_default_prefix
-+# Let make expand exec_prefix.
-+test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
-+
-+# Any assignment to VPATH causes Sun make to only execute
-+# the first set of double-colon rules, so remove it if not needed.
-+# If there is a colon in the path, we need to keep it.
-+if test "x$srcdir" = x.; then
-+ ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-+fi
-+
-+trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-+
-+# Transform confdefs.h into DEFS.
-+# Protect against shell expansion while executing Makefile rules.
-+# Protect against Makefile macro expansion.
-+cat > conftest.defs <<\EOF
-+s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%-D\1=\2%g
-+s%[ `~#$^&*(){}\\|;'"<>?]%\\&%g
-+s%\[%\\&%g
-+s%\]%\\&%g
-+s%\$%$$%g
-+EOF
-+DEFS=`sed -f conftest.defs confdefs.h | tr '\012' ' '`
-+rm -f conftest.defs
-+
-+
-+# Without the "./", some shells look in PATH for config.status.
-+: ${CONFIG_STATUS=./config.status}
-+
-+echo creating $CONFIG_STATUS
-+rm -f $CONFIG_STATUS
-+cat > $CONFIG_STATUS <<EOF
-+#! /bin/sh
-+# Generated automatically by configure.
-+# Run this file to recreate the current configuration.
-+# This directory was configured as follows,
-+# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
-+#
-+# $0 $ac_configure_args
-+#
-+# Compiler output produced by configure, useful for debugging
-+# configure, is in ./config.log if it exists.
-+
-+ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-+for ac_option
-+do
-+ case "\$ac_option" in
-+ -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
-+ echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
-+ exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
-+ -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
-+ echo "$CONFIG_STATUS generated by autoconf version 2.13"
-+ exit 0 ;;
-+ -help | --help | --hel | --he | --h)
-+ echo "\$ac_cs_usage"; exit 0 ;;
-+ *) echo "\$ac_cs_usage"; exit 1 ;;
-+ esac
-+done
-+
-+ac_given_srcdir=$srcdir
-+ac_given_INSTALL="$INSTALL"
-+
-+trap 'rm -fr `echo "Makefile doc/Makefile" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-+EOF
-+cat >> $CONFIG_STATUS <<EOF
-+
-+# Protect against being on the right side of a sed subst in config.status.
-+sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
-+ s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-+$ac_vpsub
-+$extrasub
-+s%@SHELL@%$SHELL%g
-+s%@CFLAGS@%$CFLAGS%g
-+s%@CPPFLAGS@%$CPPFLAGS%g
-+s%@CXXFLAGS@%$CXXFLAGS%g
-+s%@FFLAGS@%$FFLAGS%g
-+s%@DEFS@%$DEFS%g
-+s%@LDFLAGS@%$LDFLAGS%g
-+s%@LIBS@%$LIBS%g
-+s%@exec_prefix@%$exec_prefix%g
-+s%@prefix@%$prefix%g
-+s%@program_transform_name@%$program_transform_name%g
-+s%@bindir@%$bindir%g
-+s%@sbindir@%$sbindir%g
-+s%@libexecdir@%$libexecdir%g
-+s%@datadir@%$datadir%g
-+s%@sysconfdir@%$sysconfdir%g
-+s%@sharedstatedir@%$sharedstatedir%g
-+s%@localstatedir@%$localstatedir%g
-+s%@libdir@%$libdir%g
-+s%@includedir@%$includedir%g
-+s%@oldincludedir@%$oldincludedir%g
-+s%@infodir@%$infodir%g
-+s%@mandir@%$mandir%g
-+s%@host@%$host%g
-+s%@host_alias@%$host_alias%g
-+s%@host_cpu@%$host_cpu%g
-+s%@host_vendor@%$host_vendor%g
-+s%@host_os@%$host_os%g
-+s%@target@%$target%g
-+s%@target_alias@%$target_alias%g
-+s%@target_cpu@%$target_cpu%g
-+s%@target_vendor@%$target_vendor%g
-+s%@target_os@%$target_os%g
-+s%@build@%$build%g
-+s%@build_alias@%$build_alias%g
-+s%@build_cpu@%$build_cpu%g
-+s%@build_vendor@%$build_vendor%g
-+s%@build_os@%$build_os%g
-+s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
-+s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g
-+s%@INSTALL_DATA@%$INSTALL_DATA%g
-+s%@PACKAGE@%$PACKAGE%g
-+s%@VERSION@%$VERSION%g
-+s%@ACLOCAL@%$ACLOCAL%g
-+s%@AUTOCONF@%$AUTOCONF%g
-+s%@AUTOMAKE@%$AUTOMAKE%g
-+s%@AUTOHEADER@%$AUTOHEADER%g
-+s%@MAKEINFO@%$MAKEINFO%g
-+s%@SET_MAKE@%$SET_MAKE%g
-+s%@EXEEXT@%$EXEEXT%g
-+s%@arch@%$arch%g
-+s%@MAINTAINER_MODE_TRUE@%$MAINTAINER_MODE_TRUE%g
-+s%@MAINTAINER_MODE_FALSE@%$MAINTAINER_MODE_FALSE%g
-+s%@MAINT@%$MAINT%g
-+
-+CEOF
-+EOF
-+
-+cat >> $CONFIG_STATUS <<\EOF
-+
-+# Split the substitutions into bite-sized pieces for seds with
-+# small command number limits, like on Digital OSF/1 and HP-UX.
-+ac_max_sed_cmds=60 # Maximum number of lines to put in a sed script.
-+ac_file=1 # Number of current file.
-+ac_beg=1 # First line for current file.
-+ac_end=$ac_max_sed_cmds # Line after last line for current file.
-+ac_more_lines=:
-+ac_sed_cmds=""
-+while $ac_more_lines; do
-+ if test $ac_beg -gt 1; then
-+ sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
-+ else
-+ sed "${ac_end}q" conftest.subs > conftest.s$ac_file
-+ fi
-+ if test ! -s conftest.s$ac_file; then
-+ ac_more_lines=false
-+ rm -f conftest.s$ac_file
-+ else
-+ if test -z "$ac_sed_cmds"; then
-+ ac_sed_cmds="sed -f conftest.s$ac_file"
-+ else
-+ ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
-+ fi
-+ ac_file=`expr $ac_file + 1`
-+ ac_beg=$ac_end
-+ ac_end=`expr $ac_end + $ac_max_sed_cmds`
-+ fi
-+done
-+if test -z "$ac_sed_cmds"; then
-+ ac_sed_cmds=cat
-+fi
-+EOF
-+
-+cat >> $CONFIG_STATUS <<EOF
-+
-+CONFIG_FILES=\${CONFIG_FILES-"Makefile doc/Makefile"}
-+EOF
-+cat >> $CONFIG_STATUS <<\EOF
-+for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
-+ # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
-+ case "$ac_file" in
-+ *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
-+ ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
-+ *) ac_file_in="${ac_file}.in" ;;
-+ esac
-+
-+ # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-+
-+ # Remove last slash and all that follows it. Not all systems have dirname.
-+ ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
-+ if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
-+ # The file is in a subdirectory.
-+ test ! -d "$ac_dir" && mkdir "$ac_dir"
-+ ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
-+ # A "../" for each directory in $ac_dir_suffix.
-+ ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
-+ else
-+ ac_dir_suffix= ac_dots=
-+ fi
-+
-+ case "$ac_given_srcdir" in
-+ .) srcdir=.
-+ if test -z "$ac_dots"; then top_srcdir=.
-+ else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
-+ /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
-+ *) # Relative path.
-+ srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
-+ top_srcdir="$ac_dots$ac_given_srcdir" ;;
-+ esac
-+
-+ case "$ac_given_INSTALL" in
-+ [/$]*) INSTALL="$ac_given_INSTALL" ;;
-+ *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
-+ esac
-+
-+ echo creating "$ac_file"
-+ rm -f "$ac_file"
-+ configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
-+ case "$ac_file" in
-+ *Makefile*) ac_comsub="1i\\
-+# $configure_input" ;;
-+ *) ac_comsub= ;;
-+ esac
-+
-+ ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
-+ sed -e "$ac_comsub
-+s%@configure_input@%$configure_input%g
-+s%@srcdir@%$srcdir%g
-+s%@top_srcdir@%$top_srcdir%g
-+s%@INSTALL@%$INSTALL%g
-+" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-+fi; done
-+rm -f conftest.s*
-+
-+EOF
-+cat >> $CONFIG_STATUS <<EOF
-+
-+EOF
-+cat >> $CONFIG_STATUS <<\EOF
-+
-+exit 0
-+EOF
-+chmod +x $CONFIG_STATUS
-+rm -fr confdefs* $ac_clean_files
-+test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-+
-diff -Nur binutils-2.24.orig/cgen/configure.in binutils-2.24/cgen/configure.in
---- binutils-2.24.orig/cgen/configure.in 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/configure.in 2016-06-30 21:26:12.605891245 +0200
-@@ -0,0 +1,18 @@
-+dnl Process this file with autoconf to produce a configure script.
-+
-+AC_PREREQ(2.13)
-+AC_INIT(read.scm)
-+AC_CANONICAL_SYSTEM
-+AM_INIT_AUTOMAKE(cgen, 1.0)
-+
-+AC_PROG_INSTALL
-+AC_EXEEXT
-+
-+# Set target cpu.
-+arch=${target_cpu}
-+AC_SUBST(arch)
-+
-+AM_MAINTAINER_MODE
-+AC_ARG_PROGRAM
-+
-+AC_OUTPUT([Makefile doc/Makefile])
-diff -Nur binutils-2.24.orig/cgen/COPYING.CGEN binutils-2.24/cgen/COPYING.CGEN
---- binutils-2.24.orig/cgen/COPYING.CGEN 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/COPYING.CGEN 2016-06-30 21:26:12.605891245 +0200
-@@ -0,0 +1,44 @@
-+CGEN - a Cpu tools GENerator
-+Copyright 2000 Red Hat, Inc.
-+
-+This program is free software; you can redistribute it and/or modify
-+it under the terms of the GNU General Public License as published by
-+the Free Software Foundation; either version 2, or (at your option)
-+any later version.
-+
-+This program is distributed in the hope that it will be useful, but
-+WITHOUT ANY WARRANTY; without even the implied warranty of
-+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+General Public License for more details.
-+
-+You should have received a copy of the GNU General Public License
-+along with this software; see the file COPYING. If not, write to the
-+Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-+02110-1301 USA
-+
-+As a special exception, Red Hat gives unlimited permission to copy,
-+distribute and modify the code that is the output of CGEN. You need
-+not follow the terms of the GNU General Public License when using or
-+distributing such code, even though portions of the text of CGEN
-+appear in them. The GNU General Public License (GPL) does govern all
-+other use of the material that constitutes the CGEN program.
-+
-+Certain portions of the CGEN source text are designed to be copied (in
-+certain cases, depending on the input) into the output of CGEN. We
-+call these the "data" portions. CPU description files are, for the
-+purposes of this copyright, deemed "data". The rest of the CGEN
-+source text consists of comments plus executable code that decides
-+which of the data portions to output in any given case. We call these
-+comments and executable code the "non-data" portions. CGEN never
-+copies any of the non-data portions into its output.
-+
-+This special exception to the GPL applies to versions of CGEN released
-+by Red Hat. When you make and distribute a modified version of CGEN,
-+you may extend this special exception to the GPL to apply to your
-+modified version as well, *unless* your modified version has the
-+potential to copy into its output some of the text that was the
-+non-data portion of the version that you started with. (In other
-+words, unless your change moves or copies text from the non-data
-+portions to the data portions.) If your modification has such
-+potential, you must delete any notice of this special exception to the
-+GPL from your modified version.
-diff -Nur binutils-2.24.orig/cgen/cos-pprint.scm binutils-2.24/cgen/cos-pprint.scm
---- binutils-2.24.orig/cgen/cos-pprint.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cos-pprint.scm 2016-06-30 21:26:12.605891245 +0200
-@@ -0,0 +1,26 @@
-+;;;; cos-pprint.scm --- pretty-print definitions for COS
-+;;;; Copyright (C) 2005, 2009 Red Hat, Inc.
-+;;;; This file is part of CGEN.
-+;;;; See file COPYING.CGEN for details.
-+
-+;;; To use this with pprint.scm:
-+;;;
-+;;; (load "pprint.scm")
-+;;; (load "cos-pprint.scm")
-+;;;
-+;;; You must load this file second, so it can redefine the ELIDE? and
-+;;; ELIDED-NAME hooks.
-+;;;
-+;;; See the documentation in pprint.scm for details.
-+
-+(define (elide? obj)
-+ (or (object? obj) (class? obj)))
-+
-+(define (elided-name obj)
-+ (cond ((class? obj) `(class ,(class-name obj)))
-+ ((object? obj)
-+ `(object ,(class-name (object-class obj))
-+ ,@(if (method-present? obj 'get-name)
-+ (list (send obj 'get-name))
-+ '())))
-+ (else (error "unexpected elided object"))))
-diff -Nur binutils-2.24.orig/cgen/cos.scm binutils-2.24/cgen/cos.scm
---- binutils-2.24.orig/cgen/cos.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cos.scm 2016-06-30 21:26:12.605891245 +0200
-@@ -0,0 +1,1273 @@
-+;; Cgen's Object System.
-+;; Copyright (C) 2000, 2009, 2010 Red Hat, Inc.
-+;; This file is part of CGEN.
-+;; See file COPYING.CGEN for details.
-+;;
-+;; Scheme implementations don't agree on a lot of things beyond the basics.
-+;; This is a simple object system for cgen's needs.
-+;; I thought at the start that when Guile had an official object system
-+;; we'd switch over, but the higher order bit now is to be usable on
-+;; multiple Scheme implementations: Guile isn't fast enough.
-+;;
-+;; NOTE: The original COS supported multiple inheritance. This does not.
-+;;
-+;; Classes look like:
-+;;
-+;; #(class-tag
-+;; class-name
-+;; class-uid ;; unique id of class, index into /class-table
-+;; parent-name
-+;; elm-alist ;; not including parent classes
-+;; method-alist ;; not including parent classes
-+;; full-elm-initial-list ;; including parent classes
-+;; method-cache ;; ??? not currently used
-+;; class-descriptor)
-+;;
-+;; PARENT-NAME is the name of the parent class, if any.
-+;; If a subclasses b which subclasses c, then parent-name for a is b,
-+;; the parent-name for b is c, and the parent-name for c is #f.
-+;;
-+;; ELM-ALIST is an alist of (symbol vector-offset-with-class . initial-value)
-+;; for this class only.
-+;; Values can be looked up by name, via elm-make-[gs]etter routines.
-+;; Various Lisp (or Lisp-like) OOP systems (e.g. CLOS, Dylan) call these
-+;; "slots". Maybe for consistency "slot" would be a better name. Some might
-+;; confuse that with intentions at directions though.
-+;;
-+;; METHOD-ALIST is an alist of (symbol . procedure) for this class only.
-+;;
-+;; FULL-ELM-INITIAL-LIST is the elements of the flattened inheritance tree.
-+;; Initially it is #f meaning it hasn't been computed yet.
-+;; It is computed when the class is first instantiated. During development,
-+;; it can be reset to #f after some module has been reloaded (as long as no
-+;; elements have been deleted/added/moved/etc., existing objects are ok).
-+;;
-+;; METHOD-CACHE is an alist of the methods of the flattened inheritance
-+;; tree. Each element is (symbol . (parent-list-entry . method)).
-+;; Initially it is #f meaning it hasn't been computed yet.
-+;; It is computed when the class is first instantiated. During development,
-+;; it can be reset to #f after some module has been reloaded (requires all
-+;; object instantiation to happen later of course).
-+;; FIXME: We don't yet implement the method cache.
-+;;
-+;; CLASS-DESCRIPTOR is the processed form of parent-name-list.
-+;; There is an entry for the class and one for each parent (recursively):
-+;; (class offset child-backpointer [parent-descriptor]).
-+;; offset is the offset in the element vector of the class's elements.
-+;; child-backpointer is #f in the top level object.
-+;; ??? child->subclass, parent->superclass?
-+;; Initially the class-descriptor is #f meaning it hasn't been computed yet.
-+;; It is computed when the class is first instantiated. During development,
-+;; it can be reset to #f after some module has been reloaded (requires all
-+;; object instantiation to happen later of course).
-+;;
-+;; An object is a vector: #(object-tag class-name class-uid elm1 elm2 ...)
-+;; Vectors are nice in that they're self-evaluating.
-+;; Both class name and uid are stored here for a better developer experience.
-+;; It might be better to store the class-descriptor instead, but it's big and
-+;; vastly reduces the S/N ratio when displaying objects.
-+;;
-+;; -----------------------------------------------------------------------------
-+;;
-+;; User visible procs/macros:
-+;;
-+;; (define-class name prefix parents members)
-+;;
-+;; This is a macro that defines several things:
-+;; - the class object with the specified class members
-+;; - a predicate to identify instances of this class, named "class?"
-+;; - getters and setters for each member
-+;; NAME is the name of the class.
-+;; Convention requires class names to be decorated as <class-name>.
-+;; ??? This might change to require the actual class object, but not yet.
-+;; PREFIX is prepended to member getters/setters.
-+;; PARENTS is a list of parent class names.
-+;; It must contain at most one element, multiple inheritance isn't supported.
-+;; Each element of MEMBERS is either member-name (for uninitialized
-+;; elements) or (member-name . initial-value).
-+;; MEMBER-NAME may begin with modifiers / and !:
-+;; / - member is private: getter/setter begins with /
-+;; ! - member is writable: readonly members do not get a setter
-+;; / and ! may not appear elsewhere in MEMBER-NAME.
-+;; / and ! may appear in either order.
-+;;
-+;; (class-make name parents members unused) -> class
-+;;
-+;; Create a class. The result is then passed back by procedures requiring
-+;; a class argument.
-+;; NAME is the name of the class.
-+;; Convention requires class names to be decorated as <class-name>.
-+;; PARENTS is a list of parent class names.
-+;; It must contain at most one element, multiple inheritance isn't supported.
-+;; ??? This might change to require the actual class object, but not yet.
-+;; MEMBERS is a list of members, each list member is either a name (for
-+;; uninitialized elements) or (name . initial-value).
-+;; UNUSED must be the empty list, it will eventually be deleted.
-+;;
-+;; (class-list) -> list of all defined classes
-+;;
-+;; (class-name class) -> name of CLASS
-+;;
-+;; (class-lookup class-name) -> class
-+;;
-+;; (class-instance? class object) -> #t if OBJECT is an instance of CLASS
-+;;
-+;; (object-class object) -> class of OBJECT
-+;;
-+;; (object-class-name object) -> class name of OBJECT
-+;;
-+;; (send object method-name . args) -> result of invoking METHOD-NAME
-+;;
-+;; (send-next object class-name method-name . args) -> result of invoking next METHOD-NAME
-+;;
-+;; (new class) -> instantiate CLASS
-+;;
-+;; The object is initialized with values specified when CLASS
-+;; (and its parent classes) was defined.
-+;;
-+;; (vmake class . args) -> instantiate class and initialize it with 'vmake!
-+;;
-+;; This is shorthand for (send (new class) 'vmake! args).
-+;; ARGS is a list of option names and arguments (a la CLOS).
-+;; ??? Not implemented yet.
-+;;
-+;; (method-vmake! object . args) -> modify OBJECT from ARGS
-+;;
-+;; This is the standard 'vmake! method, available for use by user-written
-+;; 'vmake! methods.
-+;; ??? Not implemented yet.
-+;;
-+;; (make class . args) -> instantiate CLASS and initialize it with 'make!
-+;;
-+;; This is shorthand for (send (new class) 'make! arg1 ...).
-+;; This is a positional form of `new'.
-+;;
-+;; (method-make-make! class elm1-name elm2-name ...) -> unspecified
-+;;
-+;; Create a 'make! method that sets the specified elements.
-+;;
-+;; (object-copy object) -> copy of OBJECT
-+;;
-+;; Return a copy of OBJECT.
-+;; NOTE: This does a shallow copy.
-+;;
-+;; (object-assign! dstsrc) -> unspecified
-+;;
-+;; Assign the contents of SRC to DST.
-+;; Both must be objects of the same class.
-+;;
-+;; (class? foo) -> return #t if FOO is a class
-+;;
-+;; (object? foo) -> return #t if FOO is an object
-+;;
-+;; (method-make! class name lambda) -> unspecified
-+;;
-+;; Add method NAME to CLASS.
-+;;
-+;; (method-make-forward! class elm-name methods) -> unspecified
-+;;
-+;; Add METHODS to CLASS that pass the "message" onto the object in element
-+;; ELM-NAME.
-+;;
-+;; (elm-get object elm-name) -> value of element ELM-NAME in OBJ
-+;;
-+;; Can only be used in methods.
-+;;
-+;; (elm-set! object elm-name new-value) -> unspecified
-+;;
-+;; Set element ELM-NAME in OBJECT to NEW-VALUE.
-+;; Can only be used in methods.
-+;;
-+;; (elm-make-getter class elm-name) -> lambda
-+;;
-+;; Return efficient lambda to get the value of ELM-NAME in CLASS.
-+;;
-+;; (elm-make-setter class elm-name) -> lambda
-+;;
-+;; Return efficient lambda to set the value of ELM-NAME in CLASS.
-+;;
-+;; Conventions used in this file:
-+;; - procs/vars internal to this file are prefixed with "/"
-+;; - except for a few exceptions, public procs/macros begin with one of
-+;; define-, class-, object-, elm-, method-.
-+;; The exceptions are make, vmake, new, send, send-next.
-+;;
-+;; NOTES:
-+;; - "send" as a public interface is deprecated
-+
-+(define /class-tag "class")
-+(define /object-tag "object")
-+
-+;; Alist of all classes.
-+;; Each element is (class-name class?-object).
-+;; Note that classes are consed unto the front.
-+
-+(define /class-list '())
-+
-+;; Table of all classes, indexed by class-uid.
-+;; Note that classes are appended to the end.
-+
-+(define /class-table '#())
-+
-+;; Internal variables to mark their respective properties.
-+(define /object-unspecified #:unspecified)
-+(define /object-unbound #:unbound)
-+
-+;; True if error messages are verbose and debugging messages are printed.
-+
-+(define /object-verbose? #f)
-+
-+;; Cover fn to set verbosity.
-+
-+(define (object-set-verbose! verbose?)
-+ (set! /object-verbose? verbose?)
-+)
-+
-+;; Signal error if not class/object.
-+
-+(define (/class-check maybe-class proc-name . extra-text)
-+ (if (not (class? maybe-class))
-+ (apply /object-error
-+ (append! (list proc-name maybe-class "not a class")
-+ extra-text)))
-+ /object-unspecified
-+)
-+
-+(define (/object-check-name maybe-name proc-name . extra-text)
-+ (if (not (symbol? maybe-name))
-+ (apply /object-error
-+ (append! (list proc-name maybe-name) extra-text)))
-+ /object-unspecified
-+)
-+
-+(define (/object-check maybe-object proc-name . extra-text)
-+ (if (not (object? maybe-object))
-+ (apply /object-error
-+ (append! (list proc-name maybe-object "not an object")
-+ extra-text)))
-+ /object-unspecified
-+)
-+
-+;; Main routine to flag a cos error.
-+;; X is any arbitrary Scheme data.
-+
-+(define (/object-error proc-name x . text)
-+ (error (string-append proc-name ": "
-+ (apply string-append (map /object->string text))
-+ (if (object? x)
-+ (string-append
-+ " (class: " (/object->string (/object-class-name x))
-+ (if (method-present? x 'get-name)
-+ (string-append ", name: "
-+ (/object->string (send x 'get-name)))
-+ "")
-+ ")")
-+ "")
-+ "")
-+ x)
-+)
-+
-+;; Utility to count the number of non-#f elements in FLAGS.
-+
-+(define (/object-count-true flags)
-+ (let loop ((result 0) (flags flags))
-+ (if (null? flags)
-+ result
-+ (loop (+ result (if (car flags) 1 0))
-+ (cdr flags))))
-+)
-+
-+;; If S is a symbol, convert it to a string.
-+;; Otherwise S must be a string, returned unchanged.
-+
-+(define (/object->string s)
-+ (cond ((symbol? s) (symbol->string s))
-+ ((string? s) s)
-+ (else (error "not a symbol or string" s)))
-+)
-+
-+;; Low level class operations.
-+
-+;; Return boolean indicating if X is a class.
-+
-+(define (class? class)
-+ (and (vector? class) (eq? /class-tag (vector-ref class 0)))
-+)
-+
-+;; Accessors.
-+
-+(define (/class-name class) (vector-ref class 1))
-+(define (/class-uid class) (vector-ref class 2))
-+(define (/class-parent-name class) (vector-ref class 3))
-+(define (/class-elements class) (vector-ref class 4))
-+(define (/class-methods class) (vector-ref class 5))
-+(define (/class-all-initial-values class) (vector-ref class 6))
-+(define (/class-method-cache class) (vector-ref class 7))
-+(define (/class-class-desc class) (vector-ref class 8))
-+
-+(define (/class-set-uid! class uid)
-+ (vector-set! class 2 uid)
-+)
-+
-+(define (/class-set-methods! class method-alist)
-+ (vector-set! class 5 method-alist)
-+)
-+
-+(define (/class-set-all-initial-values! class init-list)
-+ (vector-set! class 6 init-list)
-+)
-+
-+(define (/class-set-method-cache! class all-meth-list)
-+ (vector-set! class 7 all-meth-list)
-+)
-+
-+(define (/class-set-class-desc! class parent-list)
-+ (vector-set! class 8 parent-list)
-+)
-+
-+;; Make a class.
-+;; The new definition overrides any existing definition.
-+
-+(define (/class-make! name parent-name elements)
-+ (let ((class (vector /class-tag name
-+ #f ;; uid filled in later
-+ parent-name elements
-+ '() ;; methods, none yet
-+ #f #f #f))
-+ (list-entry (assq name /class-list)))
-+ (if list-entry
-+ (let ((uid (/class-uid (cdr list-entry))))
-+ (/class-set-uid! class uid)
-+ (set-cdr! list-entry class))
-+ (let ((uid (vector-length /class-table)))
-+ (/class-set-uid! class uid)
-+ (set! /class-table (list->vector
-+ (append (vector->list /class-table)
-+ (list class))))
-+ (set! /class-list (acons name class /class-list))))
-+ class)
-+)
-+
-+;; Lookup a class given its name.
-+;; The result is the class or #f if not found.
-+
-+(define (class-lookup name) (assq-ref /class-list name))
-+
-+;; Lookup a class given its uid.
-+
-+(define (/class-lookup-uid uid) (vector-ref /class-table uid))
-+
-+;; Return a list of all direct parent classes of CLASS.
-+;; The list can have at most one element.
-+;; this is for callers that prefer a list result.
-+
-+(define (/class-parent-classes class)
-+ (if (/class-parent-name class)
-+ (let ((parent (class-lookup (/class-parent-name class))))
-+ (if parent
-+ (list parent)
-+ ;; The proc name we pass here is made up as we don't
-+ ;; want it to be the name of an internal proc.
-+ (/object-error "class" parent "not a class")))
-+ '())
-+)
-+
-+;; Cover proc of /class-name for the outside world to use.
-+;; The result is the name of the class or #f if CLASS is not a class.
-+;; We could issue an error here, but to be consistent with object-class-name
-+;; we don't.
-+
-+(define (class-name class)
-+ (if (class? class)
-+ (/class-name class)
-+ #f)
-+)
-+
-+;; Class descriptor utilities.
-+;; A class-descriptor is:
-+;; (class offset child-backpointer [parent-descriptor])
-+
-+(define (/class-desc? maybe-class-desc)
-+ (and (pair? maybe-class-desc)
-+ (class? (car maybe-class-desc)))
-+)
-+(define /class-desc-class car)
-+(define /class-desc-offset cadr)
-+(define /class-desc-child caddr)
-+(define /class-desc-parents cdddr) ;; nil or list of one element
-+
-+;; Compute the class descriptor of CLASS.
-+;; OFFSET is the beginning offset in the element vector.
-+;; We can assume the parents of CLASS have already been initialized.
-+;;
-+;; A class-descriptor is:
-+;; (class offset child (parent-entry))
-+;; CLASS is the class? data structure of the class.
-+;; OFFSET is the offset into the object vector of the baseclass's elements.
-+;; CHILD is the backlink to the direct child class or #f if no subclass.
-+;; PARENT-ENTRY is the class descriptor of the parent class.
-+
-+(define (/class-compute-class-desc class offset child)
-+
-+ ;; OFFSET must be global to the calculation because it is continually
-+ ;; incremented as we recurse down through the hierarchy (actually, as we
-+ ;; traverse back up). At any point in time it is the offset from the start
-+ ;; of the element vector of the next class's elements.
-+ ;; Object elements are laid out using a depth first traversal of the
-+ ;; inheritance tree.
-+
-+ (define (compute1 class child)
-+
-+ ;; Build the result first, then build our parents so that our parents have
-+ ;; the right value for the CHILD-BACKPOINTER field.
-+ ;; FIXME: Can't assume append! works that way.
-+ ;; Use a bogus value (999) for offset for the moment.
-+ ;; The correct value is set later.
-+
-+ (let ((result (list class 999 child)))
-+
-+ ;; Recurse on the parent.
-+
-+ (if (/class-parent-name class)
-+ (let ((parent (class-lookup (/class-parent-name class))))
-+ (if (not parent)
-+ ;; The proc name we pass here is made up as we don't
-+ ;; want it to be the name of an internal proc.
-+ (/object-error "class" (car parents) "not a class"))
-+
-+ (let ((parent-desc (compute1 parent result)))
-+
-+ ;; We use `append!' here as the location of `result' is now fixed
-+ ;; so that our parent's child-backpointer remains stable.
-+ (append! result (list parent-desc)))))
-+
-+ (list-set! result 1 offset)
-+ (set! offset (+ offset (length (/class-elements class))))
-+ result))
-+
-+ (compute1 class child)
-+)
-+
-+;; Return the top level class-descriptor of CLASS-DESC.
-+
-+(define (/class-desc-top class-desc)
-+ (if (/class-desc-child class-desc)
-+ (/class-desc-top (/class-desc-child class-desc))
-+ class-desc)
-+)
-+
-+;; Pretty print a class descriptor.
-+
-+(define (class-desc-dump class-desc)
-+ (let* ((cep (current-error-port))
-+ (top-desc (/class-desc-top class-desc))
-+ (spaces (lambda (n port)
-+ (display (make-string n #\space) port)))
-+ (writeln (lambda (indent port . args)
-+ (spaces indent port)
-+ (for-each (lambda (arg) (display arg port))
-+ args)
-+ (newline port)))
-+ )
-+ (letrec ((dump (lambda (cd indent)
-+ (writeln indent cep "Class: "
-+ (/class-name (/class-desc-class cd)))
-+ (writeln indent cep " offset: "
-+ (/class-desc-offset cd))
-+ (writeln indent cep " child: "
-+ (if (/class-desc-child cd)
-+ (/class-name (/class-desc-class
-+ (/class-desc-child cd)))
-+ "-top-"))
-+ (for-each (lambda (parent-cd) (dump parent-cd (+ indent 4)))
-+ (/class-desc-parents cd))
-+ )))
-+ (display "Top level class: " cep)
-+ (display (/class-name (/class-desc-class top-desc)) cep)
-+ (newline cep)
-+ (dump class-desc 0)
-+ ))
-+)
-+
-+;; Low level object utilities.
-+
-+;; Make an object.
-+;; All elements get initial (or unbound) values.
-+
-+(define (/object-make! class)
-+ (/class-check-init! class)
-+ (apply vector (append! (list /object-tag
-+ (/class-name class)
-+ (/class-uid class))
-+ (/class-all-initial-values class)))
-+)
-+
-+;; Make an object using VALUES.
-+;; VALUES must specify all elements in the class (and parent classes).
-+
-+(define (/object-make-with-values! class values)
-+ (/class-check-init! class)
-+ (apply vector (append! (list /object-tag
-+ (/class-name class)
-+ (/class-uid class))
-+ values))
-+)
-+
-+;; Copy an object.
-+;; WARNING: A shallow copy is currently done on the elements!
-+
-+(define (/object-copy obj)
-+ (/object-vector-copy obj)
-+)
-+
-+;; Accessors.
-+
-+(define (/object-class-name obj) (vector-ref obj 1))
-+(define (/object-class-uid obj) (vector-ref obj 2))
-+
-+(define (/object-class-desc obj)
-+ (/class-class-desc (/object-class obj))
-+)
-+
-+(define (/object-class obj)
-+ (/class-lookup-uid (/object-class-uid obj))
-+)
-+
-+(define (/object-elm-get obj elm-offset)
-+ (vector-ref obj elm-offset)
-+)
-+
-+(define (/object-elm-set! obj elm-offset new-val)
-+ (vector-set! obj elm-offset new-val)
-+ /object-unspecified
-+)
-+
-+;; Return boolean indicating if X is an object.
-+
-+(define (object? obj)
-+ (and (vector? obj)
-+ (>= (vector-length obj) 3)
-+ (eq? /object-tag (vector-ref obj 0)))
-+)
-+
-+;; Return the class of an object.
-+
-+(define (object-class obj)
-+ (/object-check obj "object-class")
-+ (/object-class obj)
-+)
-+
-+;; Cover proc of /object-class-name for the outside world to use.
-+;; The result is the name of the class or #f if OBJ is not an object.
-+
-+(define (object-class-name obj)
-+ (if (object? obj)
-+ (/object-class-name obj)
-+ #f)
-+)
-+
-+;; Class operations.
-+
-+;; Return the list of initial values for CLASS.
-+;; The result does not include parent classes.
-+
-+(define (/class-my-initial-values class)
-+ (map cadr (/class-elements class))
-+)
-+
-+;; Initialize class if not already done.
-+;; FIXME: Need circularity check. Later.
-+
-+(define (/class-check-init! class)
-+ ;; This should be fast the second time through, so don't do any
-+ ;; computation until we know it's necessary.
-+
-+ (if (/class-all-initial-values class)
-+
-+ #t ;; nothing to do
-+
-+ (begin
-+
-+ ;; First pass ensures all parents are initialized.
-+ (for-each /class-check-init!
-+ (/class-parent-classes class))
-+
-+ ;; Next pass initializes the initial value list.
-+ (letrec ((get-inits
-+ (lambda (class)
-+ (let ((parents (/class-parent-classes class)))
-+ (append (apply append (map get-inits parents))
-+ (/class-my-initial-values class))))))
-+
-+ (let* ((parents (/class-parent-classes class))
-+ (inits (append (apply append (map get-inits parents))
-+ (/class-my-initial-values class))))
-+ (/class-set-all-initial-values! class inits)))
-+
-+ ;; Next pass initializes the class's class-descriptor.
-+ ;; Object elements begin at offset 3 in the element vector.
-+ (/class-set-class-desc! class
-+ (/class-compute-class-desc class 3 #f))
-+ ))
-+
-+ /object-unspecified
-+)
-+
-+;; Make a class.
-+;;
-+;; PARENTS is the name of parent class as a list, i.e. () or (<parent>).
-+;; It's a list just in case multiple-inheritance is added one day.
-+;; The parent need not exist yet, though it must exist when the class
-+;; is first instantiated.
-+;; ELMS is a either a list of either element names or name/value pairs.
-+;; Elements without initial values are marked as "unbound".
-+;; UNUSED must be the empty list, it will eventually be deleted.
-+
-+(define (class-make name parents elms unused)
-+ (if (> (length parents) 1)
-+ (/object-error "class-make" parents "multiple-inheritance is not supported"))
-+ (if (not (null? unused))
-+ (/object-error "class-make" methods "unused parameter must be ()"))
-+
-+ (let ((elm-list #f))
-+
-+ ;; Mark elements without initial values as unbound, and
-+ ;; compute indices into the element vector (relative to the class's
-+ ;; offset).
-+ ;; Elements are recorded as (symbol initial-value . vector-index)
-+ (let loop ((elm-list-tmp '()) (index 0) (elms elms))
-+ (if (null? elms)
-+ (set! elm-list (reverse! elm-list-tmp)) ;; done
-+ (if (pair? (car elms))
-+ (loop (acons (caar elms)
-+ (cons (cdar elms) index)
-+ elm-list-tmp)
-+ (+ index 1)
-+ (cdr elms))
-+ (loop (acons (car elms)
-+ (cons /object-unbound index)
-+ elm-list-tmp)
-+ (+ index 1)
-+ (cdr elms)))))
-+
-+ (let ((result (/class-make! name
-+ (if (null? parents) #f (car parents))
-+ elm-list)))
-+
-+ ;; Create the standard `make!' method.
-+ ;; The caller can override afterwards if desired.
-+ ;; Note that if there are any parent classes then we don't know the names
-+ ;; of all of the elements yet, that is only known after the class has been
-+ ;; initialized which only happens when the class is first instantiated.
-+ ;; This method won't be called until that happens though so we're safe.
-+ ;; This is written without knowledge of the names, it just initializes
-+ ;; all elements.
-+ (method-make! result 'make!
-+ (lambda args
-+ (let ((self (car args)))
-+ ;; Ensure exactly all of the elements are provided.
-+ (if (not (= (length args)
-+ (- (vector-length self) 2)))
-+ (/object-error "make!" "" "wrong number of arguments to method `make!'"))
-+ (/object-make-with-values! (/object-class self)
-+ (cdr args)))))
-+
-+ result))
-+)
-+
-+;; Create an object of a class CLASS.
-+
-+(define (new class)
-+ (/class-check class "new")
-+
-+ (if /object-verbose?
-+ (display (string-append "Instantiating class " (/class-name class) ".\n")
-+ (current-error-port)))
-+
-+ (/object-make! class)
-+)
-+
-+;; Make a copy of OBJ.
-+;; WARNING: A shallow copy is done on the elements!
-+
-+(define (object-copy obj)
-+ (/object-check obj "object-copy")
-+ (/object-copy obj)
-+)
-+
-+;; Assign object SRC to object DST.
-+;; They must have the same class.
-+
-+(define (object-assign! dst src)
-+ (/object-check dst "object-assign!")
-+ (/object-check src "object-assign!")
-+ (if (not (eq? (/object-class-name dst) (/object-class-name src)))
-+ (/object-error "object-assign" (list dst src) "not same class"))
-+
-+ (let ((n (vector-length dst)))
-+ (let loop ((i 0))
-+ (if (< i n)
-+ (begin
-+ (vector-set! dst i (vector-ref src i))
-+ (loop (+ i 1))))))
-+ /object-unspecified
-+)
-+
-+;; Utility to define a standard `make!' method.
-+;; A standard make! method is one in which all it does is initialize
-+;; fields from args.
-+
-+(define (method-make-make! class args)
-+ (let ((lambda-expr
-+ (append (list 'lambda (cons 'self args))
-+ (map (lambda (elm) (list 'elm-set! 'self
-+ (list 'quote elm) elm))
-+ args)
-+ '(self))))
-+ (method-make! class 'make! (eval1 lambda-expr)))
-+)
-+
-+;; The "standard" way to invoke `make!' is (send (new class) 'make! ...).
-+;; This puts all that in a cover function.
-+
-+(define (make class . operands)
-+ (apply send (append (cons (new class) '()) '(make!) operands))
-+)
-+
-+;; Return #t if class X is a subclass of BASE-NAME.
-+
-+(define (/class-subclass? base-name x)
-+ (if (eq? base-name (/class-name x))
-+ #t
-+ (let ((parent-name (/class-parent-name x)))
-+ (if parent-name
-+ (/class-subclass? base-name (class-lookup parent-name))
-+ #f)))
-+)
-+
-+;; Return #t if OBJECT is an instance of CLASS.
-+;; This does not signal an error if OBJECT is not an object as this is
-+;; intended to be used in class predicates.
-+
-+(define (class-instance? class object)
-+ (/class-check class "class-instance?")
-+ (if (object? object)
-+ (/class-subclass? (/class-name class) (/object-class object))
-+ #f)
-+)
-+
-+;; Subroutine of define-class.
-+;; Parse a define-class member list and return a list of five elements:
-+;; - list of all members
-+;; - list of public readable members
-+;; - list of public writable members
-+;; - list of private readable members
-+;; - list of private writable members
-+;; MEMBER-SPEC is a list of members, with private members prefixed with '/',
-+;; and writable members prefixed with '!'. / and ! may appear in any order.
-+;; Each element is either member-name or (member-name . initial-value).
-+
-+(define (/parse-member-list member-spec)
-+ (let loop ((member-spec member-spec)
-+ (members nil)
-+ (public-readable nil)
-+ (public-writable nil)
-+ (private-readable nil)
-+ (private-writable nil))
-+ (if (null? member-spec)
-+ (list (reverse! members)
-+ (reverse! public-readable)
-+ (reverse! public-writable)
-+ (reverse! private-readable)
-+ (reverse! private-writable))
-+ (let* ((spec (car member-spec))
-+ (sym (if (pair? spec) (car spec) spec))
-+ (str (symbol->string sym)))
-+ (let ((private? (string-index str #\/))
-+ (writable? (string-index str #\!)))
-+ ;; ??? Assumes /,! are first characters.
-+ (let* ((stripped-str (substring str (/object-count-true (list private? writable?))))
-+ (stripped-sym (string->symbol stripped-str)))
-+ (loop (cdr member-spec)
-+ ;; Combine initial value if present.
-+ (cons (if (pair? spec)
-+ (cons stripped-sym (cdr spec))
-+ stripped-sym)
-+ members)
-+ (if (not private?)
-+ (cons stripped-sym public-readable)
-+ public-readable)
-+ (if (and (not private?) writable?)
-+ (cons stripped-sym public-writable)
-+ public-writable)
-+ (if private?
-+ (cons stripped-sym private-readable)
-+ private-readable)
-+ (if (and private? writable?)
-+ (cons stripped-sym private-writable)
-+ private-writable)))))))
-+)
-+
-+;; Subroutine of define-class.
-+;; Return a list of definitions of member getters.
-+
-+(define (/build-getter-defs class prefix members private?)
-+ (let ((str-prefix (symbol->string prefix)))
-+ (cons 'begin
-+ (map (lambda (m)
-+ (let* ((elm-name (if (pair? m) (car m) m))
-+ (name (string-append (if private? "/" "")
-+ str-prefix
-+ (symbol->string elm-name)))
-+ (getter-name (string->symbol name)))
-+ `(define ,getter-name
-+ (elm-make-getter ,class (quote ,elm-name)))))
-+ members)))
-+)
-+
-+;; Subroutine of define-class.
-+;; Return a list of definitions of member getters.
-+
-+(define (/build-setter-defs class prefix members private?)
-+ (let ((str-prefix (symbol->string prefix)))
-+ (cons 'begin
-+ (map (lambda (m)
-+ (let* ((elm-name (if (pair? m) (car m) m))
-+ (name (string-append (if private? "/" "")
-+ str-prefix
-+ "set-"
-+ (symbol->string elm-name)
-+ "!"))
-+ (getter-name (string->symbol name)))
-+ `(define ,getter-name
-+ (elm-make-setter ,class (quote ,elm-name)))))
-+ members)))
-+)
-+
-+;; Main routine to define a class.
-+;;
-+;; This defines several things:
-+;; - the class object with the specified class members
-+;; - a predicate to identify instances of this class, named "class?"
-+;; - getters and setters for each member
-+;;
-+;; Private members are specified as /member.
-+;; Writable members are specified as !member.
-+;; / and ! may be combined in any order.
-+;;
-+;; By convention name is formatted as <class-name>.
-+
-+(defmacro define-class (name prefix parents members)
-+ (let* ((parsed-members (/parse-member-list members))
-+ (str-name (symbol->string name))
-+ (str-name-len (string-length str-name))
-+ (name-sans-decorations (substring str-name 1 (- str-name-len 1))))
-+ ;; Enforce the <class> naming convention.
-+ (if (or (not (eq? (string-ref str-name 0) #\<))
-+ (not (eq? (string-ref str-name (- str-name-len 1)) #\>)))
-+ (/object-error "define-class" name " not formatted as <class>: "))
-+ `(begin
-+ (define ,name (class-make (quote ,name) (quote ,parents) (quote ,(car parsed-members)) nil))
-+ ,(/build-getter-defs name prefix (list-ref parsed-members 1) #f)
-+ ,(/build-setter-defs name prefix (list-ref parsed-members 2) #f)
-+ ,(/build-getter-defs name prefix (list-ref parsed-members 3) #t)
-+ ,(/build-setter-defs name prefix (list-ref parsed-members 4) #t)
-+ (define ,(string->symbol (string-append name-sans-decorations "?"))
-+ (lambda (obj) (class-instance? ,name obj)))))
-+)
-+
-+;; Element operations.
-+
-+;; Lookup an element in a class-desc.
-+;; The result is elm-index or #f if not found.
-+
-+(define (/class-lookup-element class-desc elm-name)
-+ (let* ((class (/class-desc-class class-desc))
-+ (elm (assq elm-name (/class-elements class))))
-+ (if elm
-+ (+ (cddr elm) ;; elm is (name init-value . index)
-+ (/class-desc-offset class-desc))
-+ (let ((parents (/class-desc-parents class-desc)))
-+ (if (null? parents)
-+ #f
-+ (/class-lookup-element (car parents) elm-name)))))
-+)
-+
-+;; Return a boolean indicating if ELM-NAME is bound in OBJ.
-+
-+(define (elm-bound? obj elm-name)
-+ (/object-check obj "elm-bound?")
-+ (let ((index (/class-lookup-element (/object-class-desc obj) elm-name)))
-+ (if index
-+ (not (eq? (/object-elm-get obj index) /object-unbound))
-+ (/object-error "elm-bound?" obj "element not present: " elm-name)))
-+)
-+
-+;; Subroutine of elm-get.
-+
-+(define (/elm-make-method-getter self elm-name)
-+ (/object-check self "elm-get")
-+ (let ((index (/class-lookup-element (/object-class-desc self) elm-name)))
-+ (if index
-+ (procedure->memoizing-macro
-+ (lambda (exp env)
-+ `(lambda (obj)
-+ (/object-elm-get obj ,index))))
-+ (/object-error "elm-get" self "element not present: " elm-name)))
-+)
-+
-+;; Get an element from an object.
-+;; If OBJ is `self' then the caller is required to be a method and we emit
-+;; memoized code. Otherwise we do things the slow way.
-+;; ??? There must be a better way.
-+;; What this does is turn
-+;; (elm-get self 'foo)
-+;; into
-+;; ((/elm-make-method-get self 'foo) self)
-+;; Note the extra set of parens. /elm-make-method-get then does the lookup of
-+;; foo and returns a memoizing macro that returns the code to perform the
-+;; operation with O(1). Cute, but I'm hoping there's an easier/better way.
-+
-+(defmacro elm-get (self elm-name)
-+ (if (eq? self 'self)
-+ `(((/elm-make-method-getter ,self ,elm-name)) ,self)
-+ `(elm-xget ,self ,elm-name))
-+)
-+
-+;; Subroutine of elm-set!.
-+
-+(define (/elm-make-method-setter self elm-name)
-+ (/object-check self "elm-set!")
-+ (let ((index (/class-lookup-element (/object-class-desc self) elm-name)))
-+ (if index
-+ (procedure->memoizing-macro
-+ (lambda (exp env)
-+ `(lambda (obj new-val)
-+ (/object-elm-set! obj ,index new-val))))
-+ (/object-error "elm-set!" self "element not present: " elm-name)))
-+)
-+
-+;; Set an element in an object.
-+;; This can only be used by methods.
-+;; See the comments for `elm-get'!
-+
-+(defmacro elm-set! (self elm-name new-val)
-+ (if (eq? self 'self)
-+ `(((/elm-make-method-setter ,self ,elm-name)) ,self ,new-val)
-+ `(elm-xset! ,self ,elm-name ,new-val))
-+)
-+
-+;; Get an element from an object.
-+;; This is for invoking from outside a method, and without having to
-+;; use elm-make-getter. It should be used sparingly.
-+
-+(define (elm-xget obj elm-name)
-+ (/object-check obj "elm-xget")
-+ (let ((index (/class-lookup-element (/object-class-desc obj) elm-name)))
-+ (if index
-+ (/object-elm-get obj index)
-+ (/object-error "elm-xget" obj "element not present: " elm-name)))
-+)
-+
-+;; Set an element in an object.
-+;; This is for invoking from outside a method, and without having to
-+;; use elm-make-setter. It should be used sparingly.
-+
-+(define (elm-xset! obj elm-name new-val)
-+ (/object-check obj "elm-xset!")
-+ (let ((index (/class-lookup-element (/object-class-desc obj) elm-name)))
-+ (if index
-+ (/object-elm-set! obj index new-val)
-+ (/object-error "elm-xset!" obj "element not present: " elm-name)))
-+)
-+
-+;; Return a boolean indicating if object OBJ has element ELM-NAME.
-+
-+(define (elm-present? obj elm-name)
-+ (/object-check obj "elm-present?")
-+ (->bool (/class-lookup-element (/object-class-desc obj) elm-name))
-+)
-+
-+;; Return lambda to get element ELM-NAME in CLASS.
-+;; FIXME: validate elm-name.
-+
-+(define (elm-make-getter class elm-name)
-+ (/class-check class "elm-make-getter")
-+ ;; We use delay here as we can't assume parent classes have been
-+ ;; initialized yet.
-+ (let ((fast-index (delay (/class-lookup-element
-+ (/class-class-desc class) elm-name))))
-+ (lambda (obj)
-+ (let ((index (force fast-index)))
-+ (/object-elm-get obj index))))
-+)
-+
-+;; Return lambda to set element ELM-NAME in CLASS.
-+;; FIXME: validate elm-name.
-+
-+(define (elm-make-setter class elm-name)
-+ (/class-check class "elm-make-setter")
-+ ;; We use delay here as we can't assume parent classes have been
-+ ;; initialized yet.
-+ (let ((fast-index (delay (/class-lookup-element
-+ (/class-class-desc class) elm-name))))
-+ (lambda (obj newval)
-+ (let ((index (force fast-index)))
-+ (/object-elm-set! obj index newval))))
-+)
-+
-+;; Method operations.
-+
-+;; Lookup the next method in a class.
-+;; This means begin the search in the parent.
-+
-+(define (/method-lookup-next class-desc method-name)
-+ (let ((parent-descs (/class-desc-parents class-desc)))
-+ (if (null? parent-descs)
-+ #f
-+ (let ((parent-desc (car parent-descs)))
-+ (/method-lookup parent-desc method-name))))
-+)
-+
-+;; Lookup a method in a class.
-+;; The result is (class-desc . method). If the method is found in a parent
-+;; class, the associated parent class descriptor is returned.
-+
-+(define (/method-lookup class-desc method-name)
-+ (if /object-verbose?
-+ (display (string-append "Looking up method " method-name " in "
-+ (/class-name (/class-desc-class class-desc)) ".\n")
-+ (current-error-port)))
-+
-+ (let ((meth (assq method-name (/class-methods (/class-desc-class class-desc)))))
-+ (if meth
-+ ;; Found.
-+ (cons class-desc (cdr meth))
-+ ;; Method not found, search parents.
-+ (/method-lookup-next class-desc method-name)))
-+)
-+
-+;; Return a boolean indicating if object OBJ has method NAME.
-+
-+(define (method-present? obj name)
-+ (/object-check obj "method-present?")
-+ (->bool (/method-lookup (/object-class-desc obj) name))
-+)
-+
-+;; Add a method to a class.
-+
-+(define (method-make! class method-name method)
-+ (/class-check class "method-make!")
-+ (/object-check-name method-name "method-make!" "method-name must be a symbol")
-+ (if (not (procedure? method))
-+ (/object-error "method-make!" method "method must be a procedure"))
-+ (/class-set-methods! class (acons method-name method
-+ (/class-methods class)))
-+ /object-unspecified
-+)
-+
-+;; Utility to create "forwarding" methods.
-+;; METHODS are forwarded to class member ELM-NAME, assumed to be an object.
-+;; The created methods take a variable number of arguments.
-+;; Argument length checking will be done by the receiving method.
-+;; FIXME: ensure elm-name is a symbol
-+
-+(define (method-make-forward! class elm-name methods)
-+ (for-each (lambda (method-name)
-+ (method-make!
-+ class method-name
-+ (eval1 `(lambda args
-+ (apply send
-+ (cons (elm-get (car args)
-+ (quote ,elm-name))
-+ (cons (quote ,method-name)
-+ (cdr args))))))))
-+ methods)
-+ /object-unspecified
-+)
-+
-+;; Utility of send, send-next.
-+
-+(define (/object-method-notify obj method-name maybe-next)
-+ (set! /object-verbose? #f)
-+ (display (string-append "Sending " maybe-next method-name " to"
-+ (if (method-present? obj 'get-name)
-+ (let ((name (send obj 'get-name)))
-+ (if (or (symbol? name) (string? name))
-+ (string-append " object " name)
-+ ""))
-+ "")
-+ " class " (object-class-name obj) ".\n")
-+ (current-error-port))
-+ (set! /object-verbose? #t)
-+)
-+
-+;; Invoke a method in an object.
-+;; When the method is invoked, the (possible parent class) object in which the
-+;; method is found is passed to the method.
-+;; ??? The word `send' comes from "sending messages". Perhaps should pick
-+;; a better name for this operation, except this is deprecated as a public API.
-+
-+(define (send obj method-name . args)
-+ (/object-check obj "send")
-+ (if /object-verbose? (/object-method-notify obj method-name ""))
-+
-+ (let ((class-desc.meth (/method-lookup (/object-class-desc obj)
-+ method-name)))
-+ (if class-desc.meth
-+ (apply (cdr class-desc.meth)
-+ (cons obj args))
-+ (/object-error "send" obj "method not supported: " method-name)))
-+)
-+
-+;; Invoke the next method named METHOD-NAME in the heirarchy of OBJ.
-+;; i.e. the method that would have been invoked if the calling method
-+;; didn't exist.
-+;; CLASS-NAME is the class of the invoking method.
-+;; It is present to simplify things: otherwise we have to either include in
-+;; objects the notion a current class or specialization, or include the class
-+;; as an argument to methods.
-+;; This may only be called by a method.
-+;; ??? Ideally we shouldn't need either CLASS-NAME or METHOD-NAME arguments.
-+;; They could be removed with a bit of effort, but is it worth it?
-+;; One possibility is if method-make! was a macro, then maybe send-next could
-+;; work with method-make! and get the values from it.
-+;;
-+;; While `send' is deprecated, this is not, yet anyway.
-+
-+(define (send-next obj class-name method-name . args)
-+ (/object-check obj "send-next")
-+ (if /object-verbose? (/object-method-notify obj method-name "next "))
-+
-+ (let* ((class (class-lookup class-name)) ;; FIXME: slow
-+ (class-desc.meth (/method-lookup-next (/class-class-desc class)
-+ method-name)))
-+ (if class-desc.meth
-+ (apply (cdr class-desc.meth)
-+ (cons obj args))
-+ (/object-error "send-next" obj "method not supported: " method-name)))
-+)
-+
-+;; Create an interface.
-+;; This defines a function named NAME that invokes METHOD-NAME.
-+
-+(defmacro define-interface (name method-name . arg-list)
-+ `(define (,name object ,@arg-list)
-+ (send object (quote ,method-name) ,@arg-list))
-+)
-+
-+;; Wrapper to define a method.
-+;; `self' must be the first argument.
-+
-+(defmacro define-method (class name args . body)
-+ `(method-make! ,class (quote ,name) ,(cons 'lambda (cons args body)))
-+)
-+
-+;; Miscellaneous publically accessible utilities.
-+
-+;; Return list of all classes.
-+
-+(define (class-list) (map cdr /class-list))
-+
-+;; Utility to map over a class and all its parent classes, recursively.
-+
-+(define (class-map-over-class proc class)
-+ (cons (proc class)
-+ (map (lambda (class) (class-map-over-class proc class))
-+ (/class-parent-classes class)))
-+)
-+
-+;; Return class tree of a class or object.
-+
-+(define (class-tree class-or-object)
-+ (cond ((class? class-or-object)
-+ (class-map-over-class class-name class-or-object))
-+ ((object? class-or-object)
-+ (class-map-over-class class-name (/object-class class-or-object)))
-+ (else (/object-error "class-tree" class-or-object
-+ "not a class or object")))
-+)
-+
-+;; Return names of each alist.
-+
-+(define (/class-alist-names class)
-+ (list (/class-name class)
-+ (map car (/class-elements class))
-+ (map car (/class-methods class)))
-+)
-+
-+;; Return complete layout of class-or-object.
-+
-+(define (class-layout class-or-object)
-+ (cond ((class? class-or-object)
-+ (class-map-over-class /class-alist-names class-or-object))
-+ ((object? class-or-object)
-+ (class-map-over-class /class-alist-names (/object-class class-or-object)))
-+ (else (/object-error "class-layout" class-or-object
-+ "not a class or object")))
-+)
-+
-+;; Define the getter for a list of elements of a class.
-+
-+(defmacro define-getters (class class-prefix elm-names)
-+ (cons 'begin
-+ (map (lambda (elm-name)
-+ (if (pair? elm-name)
-+ `(define ,(symbol-append class-prefix '- (cdr elm-name))
-+ (elm-make-getter ,class (quote ,(car elm-name))))
-+ `(define ,(symbol-append class-prefix '- elm-name)
-+ (elm-make-getter ,class (quote ,elm-name)))))
-+ elm-names))
-+)
-+
-+;; Define the setter for a list of elements of a class.
-+
-+(defmacro define-setters (class class-prefix elm-names)
-+ (cons 'begin
-+ (map (lambda (elm-name)
-+ (if (pair? elm-name)
-+ `(define ,(symbol-append class-prefix '-set- (cdr elm-name) '!)
-+ (elm-make-setter ,class (quote ,(car elm-name))))
-+ `(define ,(symbol-append class-prefix '-set- elm-name '!)
-+ (elm-make-setter ,class (quote ,elm-name)))))
-+ elm-names))
-+)
-+
-+;; Make an object, specifying values for particular elements.
-+
-+(define (vmake class . args)
-+ (let ((obj (new class)))
-+ (let ((unrecognized (send obj 'vmake! args)))
-+ (if (null? unrecognized)
-+ obj
-+ (error "vmake: unknown options:" unrecognized))))
-+)
-+
-+;; Like assq but based on the `name' element.
-+;; WARNING: Slow.
-+
-+(define (object-assq name obj-list)
-+ (find-first (lambda (o) (eq? (elm-xget o 'name) name))
-+ obj-list)
-+)
-+
-+;; Like memq but based on the `name' element.
-+;; WARNING: Slow.
-+
-+(define (object-memq name obj-list)
-+ (let loop ((r obj-list))
-+ (cond ((null? r) #f)
-+ ((eq? name (elm-xget (car r) 'name)) r)
-+ (else (loop (cdr r)))))
-+)
-+
-+;; Misc. internal utilities.
-+
-+;; We need a fast vector copy operation.
-+;; If `vector-copy' doesn't exist (which is assumed to be the fast one),
-+;; provide a simple version.
-+
-+(if (defined? 'vector-copy)
-+ (define /object-vector-copy vector-copy)
-+ (define (/object-vector-copy v) (list->vector (vector->list v)))
-+)
-diff -Nur binutils-2.24.orig/cgen/cpu/andes.inc binutils-2.24/cgen/cpu/andes.inc
---- binutils-2.24.orig/cgen/cpu/andes.inc 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/andes.inc 2016-06-30 21:26:12.605891245 +0200
-@@ -0,0 +1,4 @@
-+; ==============================================================================
-+; Andes patch to CGEN - currently only extension allowed -*- Scheme -*-
-+; Andes Technology Corporation
-+; ==============================================================================
-diff -Nur binutils-2.24.orig/cgen/cpu/arm7.cpu binutils-2.24/cgen/cpu/arm7.cpu
---- binutils-2.24.orig/cgen/cpu/arm7.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/arm7.cpu 2016-06-30 21:26:12.605891245 +0200
-@@ -0,0 +1,2496 @@
-+; ARM7 CPU description. -*- Scheme -*-
-+; Copyright (C) 2000 Red Hat, Inc.
-+; Copyright (C) 2002 Jennic, Ltd.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+;
-+; This file is included by arm.cpu.
-+;
-+; ??? The name of this file may be confusing.
-+;
-+; Every entry in this file belongs to the "arm" isa.
-+; Things are simple since that is the default, but it is something to
-+; keep in mind.
-+
-+(define-attr
-+ (type integer)
-+ (name R15-OFFSET)
-+ (comment "offset in pc value at time of use")
-+ (default 8)
-+)
-+
-+(dnf f-cond "Condition code" () 31 4)
-+
-+(dnf f-op2 "Opcode (2 bits)" () 27 2)
-+(dnf f-op3 "Opcode (3 bits)" () 27 3)
-+(dnf f-op4 "Opcode (4 bits)" () 27 4)
-+(dnf f-op5 "Opcode (5 bits)" () 27 5)
-+(dnf f-op6 "Opcode (6 bits)" () 27 6)
-+(dnf f-op24 "Opcode (24 bits)" () 27 24)
-+
-+(dnf f-op-alu "Arith/logic opcode" () 24 4)
-+(dnf f-op-mul "Sub-opcode for MUL" () 7 4)
-+(dnf f-op-swap1 "Sub-opcode for SWP" () 21 2)
-+(dnf f-op-swap2 "Sub-opcode for SWP" () 11 8)
-+(dnf f-op-mrs1 "Sub-opcode for MRS" () 21 6)
-+(dnf f-op-mrs2 "Sub-opcode for MRS" () 11 12)
-+(dnf f-op-msr1 "Sub-opcode for MSR" () 21 10)
-+(dnf f-op-msr2 "Sub-opcode for MSR" () 11 8)
-+
-+(dnf f-rn "Rn" () 19 4)
-+(dnf f-rd "Rd" () 15 4)
-+(dnf f-rm "Rm" () 3 4)
-+(dnf f-preindex? "Pre/post indexing" () 24 1)
-+(dnf f-set-cc? "Set condition codes?" () 20 1)
-+(dnf f-imm? "Immediate?" () 25 1)
-+(dnf f-byte-qty? "Byte sized transfer?" () 22 1)
-+
-+; Extra fields needed for the Data Processing/PSR Transfer class.
-+
-+(dnf f-ror-imm8-value "8 bit value to be rotated" () 7 8)
-+(dnf f-ror-imm8-rotate "Rotate amount" () 11 4)
-+
-+(dnmf f-ror-imm8 "8 bit rotated immediate" () UINT
-+ (f-ror-imm8-value f-ror-imm8-rotate)
-+ ; insert
-+ (c-call SI "arm_encode_imm12" (ifield f-ror-imm8))
-+ ; extract
-+ (sequence ()
-+ (set (ifield f-ror-imm8)
-+ (ror WI (ifield f-ror-imm8-value)
-+ (mul 2 (ifield f-ror-imm8-rotate))))
-+ )
-+)
-+
-+(df f-imm12 "Immediate (12 bit)" () 11 12 UINT
-+ ((value pc) (c-call SI "arm_encode_imm12" value))
-+ ((value pc)
-+ (ror WI (and WI value #xFF)
-+ (mul 2 (srl WI (and WI value #xF00) 8))))
-+)
-+
-+; These two are for a register operand2 (i=0).
-+(dnf f-operand2-reg? "Operand2 reg indicator" () 4 1)
-+(dnf f-operand2-shifttype "Operand2 shift type" () 6 2)
-+
-+(dnf f-operand2-shiftimm "Operand2 shift amount (imm)" () 11 5)
-+(dnf f-operand2-shiftreg "Operand2 shift amount (reg)" () 11 4)
-+
-+; Extra fields needed for the Transfer instruction classes.
-+
-+(dnf f-up-down "Base register direction" () 23 1)
-+(dnf f-write-back? "Write back?" () 21 1)
-+(dnf f-load? "Load or store?" () 20 1)
-+
-+; Extra fields needed for the Single Data Transfer instruction class.
-+
-+(df f-offset12 "Offset" (PCREL-ADDR) 11 12 INT
-+ ((value pc) (sra WI (sub WI value 2)))
-+ ((value pc) (add WI (sll WI value 2) pc)))
-+
-+(dnf f-uimm12 "Unsigned immediate (12 bit)" () 11 12)
-+
-+; Extra fields needed for the Branch and Exchange instruction class.
-+
-+(dnf f-bx-rn "Rn for branch/exchg" () 3 4)
-+
-+; Extra fields needed for the Halfword Data Transfer instruction class.
-+
-+(dnf f-halfword? "Halfword transfer?" () 5 1)
-+(dnf f-signed? "Signed transfer?" () 6 1)
-+(dnf f-offset4-hi "High nybble" () 11 4)
-+(dnf f-offset4-lo "Low nybble" () 3 4)
-+
-+; Extra fields needed for the PSR Transfer instructions.
-+
-+(dnf f-psr "PSR selector" () 22 1)
-+
-+; Miscellaneous single bit fields.
-+
-+(dnf f-bit4 "Bit 4" () 4 1)
-+(dnf f-bit7 "Bit 7" () 7 1)
-+(dnf f-bit22 "Bit 22" () 22 1)
-+
-+(define-multi-ifield
-+ (name f-hdt-offset8)
-+ (comment "Immediate offset for halfword and signed data transfers")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-offset4-hi f-offset4-lo)
-+ (insert (sequence ()
-+ (set (ifield f-offset4-hi)
-+ (and (srl (ifield f-hdt-offset8) 4) #xF))
-+ (set (ifield f-offset4-lo)
-+ (and (ifield f-hdt-offset8) #xF))))
-+ (extract (set (ifield f-hdt-offset8)
-+ (or (sll (ifield f-offset4-hi) 4)
-+ (ifield f-offset4-lo))))
-+)
-+
-+; Extra fields needed for the Multiply instruction class.
-+
-+(dnf f-acc? "Accumulate?" () 21 1)
-+(dnf f-mul-rd "Rd for multiply" () 19 4)
-+(dnf f-mul-rn "Rn for multiply" () 15 4)
-+(dnf f-rs "Rs" () 11 4)
-+(dnf f-unsigned? "Unsigned multiply?" () 22 1)
-+
-+; Extra fields needed for the Multiply Long instruction class.
-+
-+(dnf f-rdhi "Rd (high)" () 19 4)
-+(dnf f-rdlo "Rd (low)" () 15 4)
-+(dnf f-mull-rn "Rn for long multiply" () 11 4)
-+
-+; Extra fields needed for the Branch instruction class.
-+
-+(dnf f-branch-link? "Branch and link?" () 24 1)
-+(df f-offset24 "Branch offset" (PCREL-ADDR) 23 24 INT
-+ ((value pc) (sra WI (sub WI value (add pc 8)) 2))
-+ ((value pc) (add WI (sll WI value 2) (add pc 8)))
-+)
-+
-+; Extra fields needed for the Block Data Transfer instruction class.
-+
-+(dnf f-reg-list "Register list" () 15 16)
-+(dnf f-load-psr? "Load PSR?" () 22 1)
-+
-+; Extra fields needed for the SWI instruction.
-+
-+(dnf f-swi-comment "User-defined operand" () 23 24)
-+
-+; Extra fields needed for the undefined instruction.
-+
-+(dnf f-undef-dont1 "Don't care" (RESERVED) 24 20)
-+(dnf f-undef-dont2 "Don't care" (RESERVED) 3 4)
-+
-+; Enumerated constants.
-+
-+(define-normal-insn-enum cond-codes "condition codes" () COND_ f-cond
-+ ("EQ" "NE" "CS" "CC" "MI" "PL" "VS" "VC" "HI" "LS" "GE" "LT" "GT" "LE" "AL")
-+)
-+
-+(define-normal-insn-enum al-opcode "Arith/logic opcode enums" () OP_ f-op-alu
-+ ("AND" "EOR" "SUB" "RSB" "ADD" "ADC" "SBC" "RSC" "TST" "TEQ" "CMP" "CMN"
-+ "ORR" "MOV" "BIC" "MVN")
-+)
-+
-+(define-normal-insn-enum psr-dests "PSR transfer destinations" () PSR_
-+ f-psr ("CURRENT" "SAVED")
-+)
-+
-+; Instruction operands.
-+
-+(dnop cond "Condition code" () h-uint f-cond)
-+(dnop rn "Rn" () h-gr f-rn)
-+(dnop rd "Rd" () h-gr f-rd)
-+(dnop rm "Rm" () h-gr f-rm)
-+(dnop rs "Rs" () h-gr f-rs)
-+(dnop imm? "Immediate constant?" () h-uint f-imm?)
-+(dnop set-cc? "Set condition codes" () h-uint f-set-cc?)
-+
-+(dnop ror-imm8 "Rotated immediate (8 bits)" () h-uint f-ror-imm8)
-+(dnop imm12 "Immediate" () h-uint f-imm12)
-+(dnop uimm12 "Unsigned immediate (12 bits)" () h-uint f-uimm12)
-+
-+(dnop operand2-shifttype "Operand 2 shift type" ()
-+ h-operand2-shifttype f-operand2-shifttype)
-+(dnop operand2-shiftimm "Operand 2 shift immediate" ()
-+ h-uint f-operand2-shiftimm)
-+(dnop operand2-shiftreg "Operand 2 shift reg" ()
-+ h-gr f-operand2-shiftreg)
-+
-+(dnop reglist "Register list" () h-uint f-reg-list)
-+(dnop bx-rn "Source register (BX insn)" () h-gr f-bx-rn)
-+(dnop mul-rd "Destination register (MUL insns)" () h-gr f-mul-rd)
-+(dnop mul-rn "Source register (MUL insns)" () h-gr f-mul-rn)
-+(dnop rdhi "Rd (high) for long multiply" () h-gr f-rdhi)
-+(dnop rdlo "Rd (low) for long multiply" () h-gr f-rdlo)
-+
-+(dnop offset12 "Offset (12 bits)" () h-addr f-offset12)
-+(dnop offset24 "Branch offset (24 bits)" () h-iaddr f-offset24)
-+(dnop hdt-offset8 "Split offset (8 bits)" () h-addr f-hdt-offset8)
-+
-+(dnop swi-comment "Argument to swi" () h-uint f-swi-comment)
-+
-+(dnop undef-dont1 "Don't care" () h-uint f-undef-dont1)
-+(dnop undef-dont2 "Don't care" () h-uint f-undef-dont2)
-+
-+; Useful macros.
-+
-+; Same as dni but leave out timing.
-+; dnai - define-normal-arm-insn
-+
-+(define-pmacro (dnai xname xcomment xattrs xsyntax xformat xsemantics)
-+ (define-insn
-+ (name xname)
-+ (comment xcomment)
-+ (.splice attrs (.unsplice xattrs))
-+ (syntax xsyntax)
-+ (format xformat)
-+ (semantics xsemantics)
-+ )
-+)
-+
-+; Branch insns.
-+
-+(dnai b "Branch"
-+ ()
-+ "b$cond $offset24"
-+ (+ cond (f-op3 5) (f-branch-link? 0) offset24)
-+ (set pc offset24)
-+)
-+
-+(dnai bl "Branch and link"
-+ ()
-+ "bl$cond $offset24"
-+ (+ cond (f-op3 5) (f-branch-link? 1) offset24)
-+ (sequence ()
-+ (set (reg h-gr 14) (and (add pc 4) -4))
-+ (set pc offset24))
-+)
-+
-+(dnai bx "Branch and exchange"
-+ ()
-+ "bx$cond ${bx-rn}"
-+ (+ cond (f-op24 #x12FFF1) bx-rn)
-+ (sequence ()
-+ (set pc (and bx-rn #xfffffffe))
-+ (if (and bx-rn 1)
-+ (set (reg h-tbit) 1)))
-+)
-+
-+; Load word/byte insns.
-+
-+(define-pmacro (do-word/byte-load byte? preindex? writeback? up? offset-expr)
-+ (sequence ((SI addr) (SI offset))
-+ (set offset offset-expr)
-+ (if preindex?
-+ (if up?
-+ (set addr (add rn offset))
-+ (set addr (sub rn offset)))
-+ (set addr rn))
-+ ; If writeback in postindexing case -> do transfer
-+ ; in non-priviledged mode.
-+ ; FIXME: still need to handle non-word-aligned addresses
-+ (if (andif (not preindex?) writeback?)
-+ (if byte?
-+ ; FIXME: specify "non-priviledged mode" `selector'
-+ (if (eq f-rd 15)
-+ (set pc (zext SI (mem QI addr)))
-+ (set rd (zext SI (mem QI addr))))
-+ ; !byte
-+ (if (eq f-rd 15)
-+ (set pc (mem SI addr))
-+ (set rd (mem SI addr))))
-+ ; else
-+ (if byte?
-+ (if (eq f-rd 15)
-+ (set pc (zext SI (mem QI addr)))
-+ (set rd (zext SI (mem QI addr))))
-+ ; !byte
-+ (if (eq f-rd 15)
-+ (set pc (mem SI addr))
-+ (set rd (mem SI addr)))))
-+ (if (not preindex?)
-+ (if up?
-+ (set addr (add rn offset))
-+ (set addr (sub rn offset))))
-+ (if (orif (not preindex?)
-+ (andif preindex? writeback?))
-+ (set rn addr))
-+ )
-+)
-+
-+(define-pmacro (load-word/byte name comment size-char t-char
-+ byte? preindex? writeback? up?)
-+ (begin
-+ (dnai (.sym name -imm-offset)
-+ (.str comment ", immediate offset")
-+ ()
-+ ; ??? Enhancement to compute offset syntax based on args?
-+ (.str "ldr${cond}" size-char t-char " $rd,???")
-+ (+ cond (f-op2 1)
-+ (f-imm? 0) (f-preindex? preindex?) (f-up-down up?)
-+ (f-byte-qty? byte?) (f-write-back? writeback?)
-+ (f-load? 1) rn rd uimm12)
-+ (do-word/byte-load byte? preindex? writeback? up? uimm12)
-+ )
-+ (dnai (.sym name -reg-offset)
-+ (.str comment ", register offset")
-+ ()
-+ (.str "ldr${cond}" size-char t-char " $rd,???")
-+ (+ cond (f-op2 1)
-+ (f-imm? 1) (f-preindex? preindex?) (f-up-down up?)
-+ (f-byte-qty? byte?) (f-write-back? writeback?)
-+ (f-load? 1) rn rd rm
-+ (f-operand2-reg? 0) operand2-shifttype operand2-shiftimm)
-+ (do-word/byte-load byte? preindex? writeback? up?
-+ (c-call SI "compute_operand2_immshift" rm
-+ operand2-shifttype operand2-shiftimm))
-+ )
-+ )
-+)
-+
-+(load-word/byte #:name ldr-post-dec
-+ #:comment "Load word (postindex, decrement)"
-+ #:size-char "" #:t-char ""
-+ #:byte? 0 #:preindex? 0 #:writeback? 0 #:up? 0)
-+
-+(load-word/byte #:name ldr-post-inc
-+ #:comment "Load word (postindex, increment)"
-+ #:size-char "" #:t-char ""
-+ #:byte? 0 #:preindex? 0 #:writeback? 0 #:up? 1)
-+
-+(load-word/byte #:name ldr-post-dec-nonpriv
-+ #:comment "Load word (postindex, decrement, nonpriv)"
-+ #:size-char "" #:t-char "t"
-+ #:byte? 0 #:preindex? 0 #:writeback? 1 #:up? 0)
-+
-+(load-word/byte #:name ldr-post-inc-nonpriv
-+ #:comment "Load word (postindex, increment, nonpriv)"
-+ #:size-char "" #:t-char "t"
-+ #:byte? 0 #:preindex? 0 #:writeback? 1 #:up? 1)
-+
-+(load-word/byte #:name ldr-pre-dec
-+ #:comment "Load word (preindex, decrement)"
-+ #:size-char "" #:t-char ""
-+ #:byte? 0 #:preindex? 1 #:writeback? 0 #:up? 0)
-+
-+(load-word/byte #:name ldr-pre-inc
-+ #:comment "Load word (preindex, increment)"
-+ #:size-char "" #:t-char ""
-+ #:byte? 0 #:preindex? 1 #:writeback? 0 #:up? 1)
-+
-+(load-word/byte #:name ldr-pre-dec-wb
-+ #:comment "Load word (preindex, decrement, writeback)"
-+ #:size-char "" #:t-char ""
-+ #:byte? 0 #:preindex? 1 #:writeback? 1 #:up? 0)
-+
-+(load-word/byte #:name ldr-pre-inc-wb
-+ #:comment "Load word (preindex, increment, writeback)"
-+ #:size-char "" #:t-char ""
-+ #:byte? 0 #:preindex? 1 #:writeback? 1 #:up? 1)
-+
-+(load-word/byte #:name ldrb-post-dec
-+ #:comment "Load byte (postindex, decrement)"
-+ #:size-char "b" #:t-char ""
-+ #:byte? 1 #:preindex? 0 #:writeback? 0 #:up? 0)
-+
-+(load-word/byte #:name ldrb-post-inc
-+ #:comment "Load byte (postindex, increment)"
-+ #:size-char "b" #:t-char ""
-+ #:byte? 1 #:preindex? 0 #:writeback? 0 #:up? 1)
-+
-+(load-word/byte #:name ldrb-post-dec-nonpriv
-+ #:comment "Load byte (postindex, decrement, nonpriv)"
-+ #:size-char "b" #:t-char "t"
-+ #:byte? 1 #:preindex? 0 #:writeback? 1 #:up? 0)
-+
-+(load-word/byte #:name ldrb-post-inc-nonpriv
-+ #:comment "Load byte (postindex, increment, nonpriv)"
-+ #:size-char "b" #:t-char "t"
-+ #:byte? 1 #:preindex? 0 #:writeback? 1 #:up? 1)
-+
-+(load-word/byte #:name ldrb-pre-dec
-+ #:comment "Load byte (preindex, decrement)"
-+ #:size-char "b" #:t-char ""
-+ #:byte? 1 #:preindex? 1 #:writeback? 0 #:up? 0)
-+
-+(load-word/byte #:name ldrb-pre-inc
-+ #:comment "Load byte (preindex, increment)"
-+ #:size-char "b" #:t-char ""
-+ #:byte? 1 #:preindex? 1 #:writeback? 0 #:up? 1)
-+
-+(load-word/byte #:name ldrb-pre-dec-wb
-+ #:comment "Load byte (preindex, decrement, writeback)"
-+ #:size-char "b" #:t-char ""
-+ #:byte? 1 #:preindex? 1 #:writeback? 1 #:up? 0)
-+
-+(load-word/byte #:name ldrb-pre-inc-wb
-+ #:comment "Load byte (preindex, increment, writeback)"
-+ #:size-char "b" #:t-char ""
-+ #:byte? 1 #:preindex? 1 #:writeback? 1 #:up? 1)
-+
-+; Store word/byte insns.
-+
-+(define-pmacro (do-word/byte-store byte? preindex? writeback? up? offset-expr)
-+ (sequence ((SI addr) (SI offset))
-+ (set offset offset-expr)
-+ (if preindex?
-+ (if up?
-+ (set addr (add rn offset))
-+ (set addr (sub rn offset)))
-+ (set addr rn))
-+ ; If writeback in postindexing case -> do transfer
-+ ; in non-priviledged mode.
-+ ; FIXME: still need to handle non-word-aligned addresses
-+ (if (andif (not preindex?) writeback?)
-+ (if byte?
-+ ; FIXME: specify "non-priviliged mode" `selector'
-+ (set (mem QI addr) (trunc QI rd))
-+ (set (mem SI addr) rd))
-+ (if byte?
-+ (set (mem QI addr) (trunc QI rd))
-+ (set (mem SI addr) rd)))
-+ (if (not preindex?)
-+ (if up?
-+ (set addr (add rn offset))
-+ (set addr (sub rn offset))))
-+ (if (orif (not preindex?)
-+ (andif preindex? writeback?))
-+ (set rn addr))
-+ )
-+)
-+
-+(define-pmacro (store-word/byte name comment size-char t-char
-+ byte? preindex? writeback? up?)
-+ (begin
-+ (dnai (.sym name -imm-offset)
-+ (.str comment ", immediate offset")
-+ ()
-+ (.str "ldr${cond}" size-char t-char " $rd,???")
-+ (+ cond (f-op2 1)
-+ (f-imm? 0) (f-preindex? preindex?) (f-up-down up?)
-+ (f-byte-qty? byte?) (f-write-back? writeback?)
-+ (f-load? 0) rn rd uimm12)
-+ (do-word/byte-store byte? preindex? writeback? up? uimm12)
-+ )
-+
-+ (dnai (.sym name -reg-offset)
-+ (.str comment ", register offset")
-+ ()
-+ (.str "str${cond}" size-char t-char " $rd,???")
-+ (+ cond (f-op2 1)
-+ (f-imm? 1) (f-preindex? preindex?) (f-up-down up?)
-+ (f-byte-qty? byte?) (f-write-back? writeback?)
-+ (f-load? 0) rn rd rm
-+ (f-operand2-reg? 0) operand2-shifttype operand2-shiftimm)
-+ (do-word/byte-store byte? preindex? writeback? up?
-+ (c-call SI "compute_operand2_immshift" rm
-+ operand2-shifttype operand2-shiftimm))
-+ )
-+ )
-+)
-+
-+(store-word/byte #:name str-post-dec
-+ #:comment "Store word (postindex, decrement)"
-+ #:size-char "" #:t-char ""
-+ #:byte? 0 #:preindex? 0 #:writeback? 0 #:up? 0)
-+
-+(store-word/byte #:name str-post-inc
-+ #:comment "Store word (postindex, increment)"
-+ #:size-char "" #:t-char ""
-+ #:byte? 0 #:preindex? 0 #:writeback? 0 #:up? 1)
-+
-+(store-word/byte #:name str-post-dec-nonpriv
-+ #:comment "Store word (postindex, decrement, nonpriv)"
-+ #:size-char "" #:t-char "t"
-+ #:byte? 0 #:preindex? 0 #:writeback? 1 #:up? 0)
-+
-+(store-word/byte #:name str-post-inc-nonpriv
-+ #:comment "Store word (postindex, increment, nonpriv)"
-+ #:size-char "" #:t-char "t"
-+ #:byte? 0 #:preindex? 0 #:writeback? 1 #:up? 1)
-+
-+(store-word/byte #:name str-pre-dec
-+ #:comment "Store word (preindex, decrement)"
-+ #:size-char "" #:t-char ""
-+ #:byte? 0 #:preindex? 1 #:writeback? 0 #:up? 0)
-+
-+(store-word/byte #:name str-pre-inc
-+ #:comment "Store word (preindex, increment)"
-+ #:size-char "" #:t-char ""
-+ #:byte? 0 #:preindex? 1 #:writeback? 0 #:up? 1)
-+
-+(store-word/byte #:name str-pre-dec-wb
-+ #:comment "Store word (preindex, decrement, writeback)"
-+ #:size-char "" #:t-char ""
-+ #:byte? 0 #:preindex? 1 #:writeback? 1 #:up? 0)
-+
-+(store-word/byte #:name str-pre-inc-wb
-+ #:comment "Store word (preindex, increment, writeback)"
-+ #:size-char "" #:t-char ""
-+ #:byte? 0 #:preindex? 1 #:writeback? 1 #:up? 1)
-+
-+(store-word/byte #:name strb-post-dec
-+ #:comment "Store byte (postindex, decrement)"
-+ #:size-char "b" #:t-char ""
-+ #:byte? 1 #:preindex? 0 #:writeback? 0 #:up? 0)
-+
-+(store-word/byte #:name strb-post-inc
-+ #:comment "Store byte (postindex, increment)"
-+ #:size-char "" #:t-char ""
-+ #:byte? 1 #:preindex? 0 #:writeback? 0 #:up? 1)
-+
-+(store-word/byte #:name strb-post-dec-nonpriv
-+ #:comment "Store byte (postindex, decrement, nonpriv)"
-+ #:size-char "" #:t-char "t"
-+ #:byte? 1 #:preindex? 0 #:writeback? 1 #:up? 0)
-+
-+(store-word/byte #:name strb-post-inc-nonpriv
-+ #:comment "Store byte (postindex, increment, nonpriv)"
-+ #:size-char "" #:t-char "t"
-+ #:byte? 1 #:preindex? 0 #:writeback? 1 #:up? 1)
-+
-+(store-word/byte #:name strb-pre-dec
-+ #:comment "Store byte (preindex, decrement)"
-+ #:size-char "" #:t-char ""
-+ #:byte? 1 #:preindex? 1 #:writeback? 0 #:up? 0)
-+
-+(store-word/byte #:name strb-pre-inc
-+ #:comment "Store byte (preindex, increment)"
-+ #:size-char "" #:t-char ""
-+ #:byte? 1 #:preindex? 1 #:writeback? 0 #:up? 1)
-+
-+(store-word/byte #:name strb-pre-dec-wb
-+ #:comment "Store byte (preindex, decrement, writeback)"
-+ #:size-char "" #:t-char ""
-+ #:byte? 1 #:preindex? 1 #:writeback? 1 #:up? 0)
-+
-+(store-word/byte #:name strb-pre-inc-wb
-+ #:comment "Store byte (preindex, increment, writeback)"
-+ #:size-char "" #:t-char ""
-+ #:byte? 1 #:preindex? 1 #:writeback? 1 #:up? 1)
-+
-+; Halfword and signed load insns.
-+
-+(define-pmacro (do-halfword-load preindex? up? writeback? signed?
-+ halfword? offset-expr)
-+ (sequence ((SI addr) (SI offset))
-+ (set offset offset-expr)
-+
-+ ; Handle pre-increment.
-+ (if preindex?
-+ (if up?
-+ (set addr (add rn offset))
-+ (set addr (sub rn offset)))
-+ (set addr rn))
-+
-+ ; Do the transfer; sign extend the result.
-+ (if halfword?
-+ (if signed?
-+ (if (eq f-rd 15)
-+ (set pc (ext SI (mem HI addr)))
-+ (set rd (ext SI (mem HI addr))))
-+ (if (eq f-rd 15)
-+ (set pc (zext SI (mem HI addr)))
-+ (set rd (zext SI (mem HI addr)))))
-+ (if (eq f-rd 15)
-+ (set pc (ext SI (mem QI addr)))
-+ (set rd (ext SI (mem QI addr)))))
-+
-+ (if (not preindex?)
-+ (if up?
-+ (set addr (add rn offset))
-+ (set addr (sub rn offset))))
-+
-+ ; Write back the modified base register.
-+ (if (orif (not preindex?)
-+ (andif preindex? writeback?))
-+ (set rn addr))
-+ )
-+)
-+
-+(define-pmacro (load-halfword name comment preindex? up? writeback?
-+ signed? halfword?)
-+ (begin
-+ (dnai (.sym name -imm-offset)
-+ (.str comment ", immediate offset")
-+ ()
-+ (.str "FIXME")
-+ (+ cond (f-op3 0) (f-preindex? preindex?) (f-up-down up?)
-+ (f-bit22 1) (f-write-back? writeback?) (f-load? 1)
-+ rn rd (f-bit7 1) (f-signed? signed?) (f-halfword? halfword?)
-+ (f-bit4 1) hdt-offset8)
-+ (do-halfword-load preindex? up? writeback? signed? halfword? hdt-offset8)
-+ )
-+ (dnai (.sym name -reg-offset)
-+ (.str comment ", register offset")
-+ ()
-+ (.str "FIXME")
-+ (+ cond (f-op3 0) (f-preindex? preindex?) (f-up-down up?)
-+ (f-bit22 0) (f-write-back? writeback?) (f-load? 1)
-+ rn rd (f-offset4-hi 0) (f-bit7 1) (f-signed? signed?)
-+ (f-halfword? halfword?) (f-bit4 1) rm)
-+ (do-halfword-load preindex? up? writeback? signed? halfword? rm)
-+ )
-+ )
-+)
-+
-+(define-pmacro (do-halfword-store preindex? up? writeback? offset-expr)
-+ (sequence ((SI addr) (SI offset))
-+ (set offset offset-expr)
-+
-+ ; Handle pre-increment.
-+ (if preindex?
-+ (if up?
-+ (set addr (add rn offset))
-+ (set addr (sub rn offset)))
-+ (set addr rn))
-+
-+ ; Do the transfer; unsigned halfwords only.
-+ (set (mem HI addr) (trunc HI rd))
-+
-+ (if (not preindex?)
-+ (if up?
-+ (set addr (add rn offset))
-+ (set addr (sub rn offset))))
-+
-+ (if (orif (not preindex?)
-+ (andif preindex? writeback?))
-+ (set rn addr))
-+ )
-+)
-+
-+(define-pmacro (store-halfword name comment preindex? up? writeback?)
-+ (begin
-+ (dnai (.sym name -imm-offset)
-+ (.str comment ", immediate offset")
-+ ()
-+ (.str "FIXME")
-+ (+ cond (f-op3 0) (f-preindex? preindex?) (f-up-down up?)
-+ (f-bit22 1) (f-write-back? writeback?) (f-load? 0)
-+ rn rd (f-bit7 1) (f-signed? 0) (f-halfword? 1)
-+ (f-bit4 1) hdt-offset8)
-+ (do-halfword-store preindex? up? writeback? hdt-offset8)
-+ )
-+ (dnai (.sym name -reg-offset)
-+ (.str comment ", register offset")
-+ ()
-+ (.str "FIXME")
-+ (+ cond (f-op3 0) (f-preindex? preindex?) (f-up-down up?)
-+ (f-bit22 0) (f-write-back? writeback?) (f-load? 0)
-+ rn rd (f-offset4-hi 0) (f-bit7 1) (f-signed? 0)
-+ (f-halfword? 1) (f-bit4 1) rm)
-+ (do-halfword-store preindex? up? writeback? rm)
-+ )
-+ )
-+)
-+
-+(store-halfword #:name strh-pre-dec
-+ #:comment "Store halfword (predecrement)"
-+ #:preindex? 1 #:up? 0 #:writeback? 0)
-+
-+(store-halfword #:name strh-pre-inc
-+ #:comment "Store halfword (preincrement)"
-+ #:preindex? 1 #:up? 1 #:writeback? 0)
-+
-+(store-halfword #:name strh-pre-dec-wb
-+ #:comment "Store halfword (predec, writeback)"
-+ #:preindex? 1 #:up? 0 #:writeback? 1)
-+
-+(store-halfword #:name strh-pre-inc-wb
-+ #:comment "Store halfword (preinc, writeback)"
-+ #:preindex? 1 #:up? 1 #:writeback? 1)
-+
-+(store-halfword #:name strh-post-dec
-+ #:comment "Store halfword (postdecrement)"
-+ #:preindex? 0 #:up? 0 #:writeback? 0)
-+
-+(store-halfword #:name strh-post-inc
-+ #:comment "Store halfword (postindex, increment)"
-+ #:preindex? 0 #:up? 1 #:writeback? 0)
-+
-+
-+(load-halfword #:name ldrsb-pre-dec
-+ #:comment "Load signed byte (predecrement)"
-+ #:preindex? 1 #:up? 0 #:writeback? 0
-+ #:signed? 1 #:halfword? 0)
-+
-+(load-halfword #:name ldrsb-pre-inc
-+ #:comment "Load signed byte (preincrement)"
-+ #:preindex? 1 #:up? 1 #:writeback? 0
-+ #:signed? 1 #:halfword? 0)
-+
-+(load-halfword #:name ldrsb-pre-dec-wb
-+ #:comment "Load signed byte (predec, writeback)"
-+ #:preindex? 1 #:up? 0 #:writeback? 1
-+ #:signed? 1 #:halfword? 0)
-+
-+(load-halfword #:name ldrsb-pre-inc-wb
-+ #:comment "Load signed byte (preinc, writeback)"
-+ #:preindex? 1 #:up? 1 #:writeback? 1
-+ #:signed? 1 #:halfword? 0)
-+
-+(load-halfword #:name ldrsb-post-dec
-+ #:comment "Load signed byte (postdecrement)"
-+ #:preindex? 0 #:up? 0 #:writeback? 0
-+ #:signed? 1 #:halfword? 0)
-+
-+(load-halfword #:name ldrsb-post-inc
-+ #:comment "Load signed byte (postindex, increment)"
-+ #:preindex? 0 #:up? 1 #:writeback? 0
-+ #:signed? 1 #:halfword? 0)
-+
-+(load-halfword #:name ldrh-pre-dec
-+ #:comment "Load halfword (predecrement)"
-+ #:preindex? 1 #:up? 0 #:writeback? 0
-+ #:signed? 0 #:halfword? 1)
-+
-+(load-halfword #:name ldrh-pre-inc
-+ #:comment "Load halfword (preincrement)"
-+ #:preindex? 1 #:up? 1 #:writeback? 0
-+ #:signed? 0 #:halfword? 1)
-+
-+(load-halfword #:name ldrh-pre-dec-wb
-+ #:comment "Load halfword (predec, writeback)"
-+ #:preindex? 1 #:up? 0 #:writeback? 1
-+ #:signed? 0 #:halfword? 1)
-+
-+(load-halfword #:name ldrh-pre-inc-wb
-+ #:comment "Load halfword (preinc, writeback)"
-+ #:preindex? 1 #:up? 1 #:writeback? 1
-+ #:signed? 0 #:halfword? 1)
-+
-+(load-halfword #:name ldrh-post-dec
-+ #:comment "Load halfword (postdecrement)"
-+ #:preindex? 0 #:up? 0 #:writeback? 0
-+ #:signed? 0 #:halfword? 1)
-+
-+(load-halfword #:name ldrh-post-inc
-+ #:comment "Load halfword (postincrement)"
-+ #:preindex? 0 #:up? 1 #:writeback? 0
-+ #:signed? 0 #:halfword? 1)
-+
-+(load-halfword #:name ldrsh-pre-dec
-+ #:comment "Load signed halfword (predecrement)"
-+ #:preindex? 1 #:up? 0 #:writeback? 0
-+ #:signed? 1 #:halfword? 1)
-+
-+(load-halfword #:name ldrsh-pre-inc
-+ #:comment "Load signed halfword (preincrement)"
-+ #:preindex? 1 #:up? 1 #:writeback? 0
-+ #:signed? 1 #:halfword? 1)
-+
-+(load-halfword #:name ldrsh-pre-dec-wb
-+ #:comment "Load signed halfword (predec, writeback)"
-+ #:preindex? 1 #:up? 0 #:writeback? 1
-+ #:signed? 1 #:halfword? 1)
-+
-+(load-halfword #:name ldrsh-pre-inc-wb
-+ #:comment "Load signed halfword (preinc, writeback)"
-+ #:preindex? 1 #:up? 1 #:writeback? 1
-+ #:signed? 1 #:halfword? 1)
-+
-+(load-halfword #:name ldrsh-post-dec
-+ #:comment "Load signed halfword (postdecrement)"
-+ #:preindex? 0 #:up? 0 #:writeback? 0
-+ #:signed? 1 #:halfword? 1)
-+
-+(load-halfword #:name ldrsh-post-inc
-+ #:comment "Load signed halfword (postincrement)"
-+ #:preindex? 0 #:up? 1 #:writeback? 0
-+ #:signed? 1 #:halfword? 1)
-+
-+; Multiply instructions.
-+
-+(define-pmacro (set-mul-cond-maybe result)
-+ (if set-cc?
-+ (sequence ()
-+ ; vbit is not affected
-+ ; cbit is set to a meaningless value, we just ignore it
-+ (set zbit (zflag WI result))
-+ (set nbit (nflag WI result))))
-+)
-+
-+(define-pmacro (set-muldi-cond-maybe result)
-+ (if set-cc?
-+ (sequence ()
-+ ; vbit,cbit are set to meaningless values, we just ignore them
-+ (set zbit (zflag DI result))
-+ (set nbit (nflag DI result))))
-+)
-+
-+(dnai mul "Multiply"
-+ ()
-+ "mul$cond${set-cc?} ${mul-rd},$rm,$rs"
-+ (+ cond (f-op6 0) (f-acc? 0) set-cc? mul-rd mul-rn rs (f-op-mul 9) rm)
-+ (sequence ((WI result))
-+ (set result (mul rm rs))
-+ (set mul-rd result)
-+ (set-mul-cond-maybe result))
-+)
-+
-+(dnai mla "Multiply and accumulate"
-+ ()
-+ "mla$cond${set-cc?} ${mul-rd},$rm,$rs,${mul-rn}"
-+ (+ cond (f-op6 0) (f-acc? 1) set-cc? mul-rd mul-rn rs (f-op-mul 9) rm)
-+ (sequence ((WI result))
-+ (set mul-rd (add (mul rm rs) mul-rn))
-+ (set-mul-cond-maybe result))
-+)
-+
-+(dnai umull "Multiply long (unsigned)"
-+ ()
-+ "umull$cond${set-cc?} $rdlo,$rdhi,$rm,$rs"
-+ (+ cond (f-op5 1) (f-unsigned? 0) (f-acc? 0) set-cc? rdhi rdlo rs (f-op-mul 9) rm)
-+ (sequence ((DI mul-result) (SI hi) (SI lo))
-+ (set mul-result (mul (zext DI rs) (zext DI rm)))
-+ (set rdhi (subword SI mul-result 0))
-+ (set rdlo (subword SI mul-result 1))
-+ (set-muldi-cond-maybe mul-result))
-+)
-+
-+(dnai umlal "Multiply long and accumulate (unsigned)"
-+ ()
-+ "umlal$cond${set-cc?} $rdlo,$rdhi,$rm,$rs"
-+ (+ cond (f-op5 1) (f-unsigned? 0) (f-acc? 1) set-cc? rdhi rdlo rs (f-op-mul 9) rm)
-+ (sequence ((DI mul-result) (SI hi) (SI lo))
-+ (set mul-result (join DI SI rdhi rdlo))
-+ (set mul-result
-+ (add (mul (zext DI rs) (zext DI rm)) mul-result))
-+ (set rdhi (subword SI mul-result 0))
-+ (set rdlo (subword SI mul-result 1))
-+ (set-muldi-cond-maybe mul-result))
-+)
-+
-+(dnai smull "Multiply long (signed)"
-+ ()
-+ "smull$cond${set-cc?} $rdlo,$rdhi,$rm,$rs"
-+ (+ cond (f-op5 1) (f-unsigned? 1) (f-acc? 0) set-cc? rdhi rdlo rs
-+ (f-op-mul 9) rm)
-+ (sequence ((DI mul-result) (SI hi) (SI lo))
-+ (set mul-result (mul (ext DI rs) (ext DI rm)))
-+ (set rdhi (subword SI mul-result 0))
-+ (set rdlo (subword SI mul-result 1))
-+ (set-muldi-cond-maybe mul-result))
-+)
-+
-+(dnai smlal "Multiply long and accumulate (signed)"
-+ ()
-+ "smlal$cond${set-cc?} $rdlo,$rdhi,$rm,$rs"
-+ (+ cond (f-op5 1) (f-unsigned? 1) (f-acc? 1) set-cc? rdhi rdlo rs
-+ (f-op-mul 9) rm)
-+ (sequence ((DI mul-result) (SI hi) (SI lo))
-+ (set mul-result (join DI SI rdhi rdlo))
-+ (set mul-result
-+ (add (mul (ext DI rs) (ext DI rm)) mul-result))
-+ (set rdhi (subword SI mul-result 0))
-+ (set rdlo (subword SI mul-result 1))
-+ (set-muldi-cond-maybe mul-result))
-+)
-+
-+(dnai swp "Swap word"
-+ ()
-+ "swp$cond $rd,$rm,[$rn]"
-+ (+ cond (f-op5 2) (f-byte-qty? 0) (f-op-swap1 #b00) rn rd
-+ (f-op-swap2 9) rm)
-+ (sequence ((WI temp))
-+ (set temp (mem WI rn)) ; read contents of swap address
-+ (set (mem WI rn) rm) ; write rm to the swap address
-+ (set rd temp)) ; store old swap contents in rd
-+)
-+
-+(dnai swpb "Swap byte"
-+ ()
-+ "swpb${cond}b $rd,$rm,[$rn]"
-+ (+ cond (f-op5 2) (f-byte-qty? 1) (f-op-swap1 #b00) rn rd
-+ (f-op-swap2 #b00001001) rm)
-+ (sequence ((WI temp))
-+ (set temp (mem QI rn)) ; read contents of swap address
-+ (set (mem QI rn) rm) ; write rm to the swap address
-+ (set rd temp)) ; store old swap contents in rd
-+)
-+
-+(dnai swi "Software interrupt"
-+ ()
-+ "swi$cond ${swi-comment}"
-+ (+ cond (f-op4 #xF) swi-comment)
-+ ; Take the software trap. Jump to the vector held in
-+ ; 0x8. User code retrieves the comment field itself (see the
-+ ; SWI instruction description in the ARM 7TDMI data sheet).
-+ ; FIXME: more state change than this occurs
-+ ;(set pc (mem WI 8)))
-+ (set pc (c-call SI "arm_swi" pc swi-comment))
-+)
-+
-+; Data processing [sic] instructions with a register for operand2.
-+; The immediate operand2 case is handled separately.
-+;
-+; FIXME: 'twould be nice to split up each semantic element into
-+; shifttype, set-cc/no-set-cc, set-pc,no-set-pc cases.
-+; This is something that could be done as an optimization or extension,
-+; without having to change this code [which would have general utility].
-+;
-+; FIXME: assembler syntaxes don't take into account unary vs binary vs
-+; no-result. Later.
-+
-+; Logical operation semantic code.
-+;
-+; Flag handling if rd != pc:
-+; cbit is set to the carry out of a shift operation if present
-+; nbit is set to the sign bit
-+; vbit is not affected
-+; zflag is set to indicate whether the result was zero or not
-+;
-+; Flag handling if rd = pc:
-+; cpsr is set from spsr
-+; N.B. The pc must be set before setting cpsr as the registers that go into
-+; computing the new value of pc may change when cpsr is set (new register
-+; bank may get installed).
-+
-+; Logical operation, with a result.
-+
-+(define-pmacro (logical-op mnemonic comment-text opcode semantic-fn)
-+ (begin
-+ (dnai
-+ (.sym mnemonic -reg/imm-shift)
-+ (.str comment-text " immediate shift")
-+ ()
-+ (.str mnemonic "$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}")
-+ (+ cond (f-op2 0) (f-imm? 0) opcode set-cc? rn rd rm
-+ (f-operand2-reg? 0) operand2-shifttype operand2-shiftimm)
-+ (sequence ((SI operand2) (BI carry-out) (SI result))
-+ (set operand2
-+ (c-call SI "compute_operand2_immshift" rm
-+ operand2-shifttype operand2-shiftimm))
-+ (set carry-out
-+ (c-call BI "compute_carry_out_immshift" rm
-+ operand2-shifttype operand2-shiftimm cbit))
-+ (set result (semantic-fn rn operand2))
-+ (if (eq f-rd 15)
-+ (sequence ()
-+ (set pc result)
-+ (if set-cc?
-+ (set (reg h-cpsr) (reg h-spsr))))
-+ (sequence ()
-+ (set rd result)
-+ (if set-cc?
-+ (set-logical-cc result carry-out)))))
-+ )
-+ (dnai
-+ (.sym mnemonic -reg/reg-shift)
-+ (.str comment-text " register shift")
-+ ((R15-OFFSET 12))
-+ (.str mnemonic "$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}")
-+ (+ cond (f-op2 0) (f-imm? 0) opcode set-cc? rn rd rm
-+ (f-operand2-reg? 1) (f-bit7 0)
-+ operand2-shifttype operand2-shiftreg)
-+ (sequence ((SI operand2) (BI carry-out) (SI result))
-+ (set operand2
-+ (c-call SI "compute_operand2_regshift" rm
-+ operand2-shifttype operand2-shiftreg))
-+ (set carry-out
-+ (c-call BI "compute_carry_out_regshift" rm
-+ operand2-shifttype operand2-shiftreg cbit))
-+ (set result (semantic-fn rn operand2))
-+ (if (eq f-rd 15)
-+ (sequence ()
-+ (set pc result)
-+ (if set-cc?
-+ (set (reg h-cpsr) (reg h-spsr))))
-+ (sequence ()
-+ (set rd result)
-+ (if set-cc?
-+ (set-logical-cc result carry-out)))))
-+ )
-+ )
-+)
-+
-+; Arithmetic operation semantic code.
-+;
-+; Flag handling if rd != pc:
-+; cbit is set to the carry out of the ALU
-+; N.B. For subtraction, the "carry" bit is actually a "borrow" bit.
-+; nbit is set to the sign bit
-+; vbit is set to indicate if an overflow occured
-+; zbit is set to indicate whether the result was zero or not
-+;
-+; Flag handling if rd = pc:
-+; cpsr is set from spsr
-+
-+; Arithmetic operation, with a result.
-+
-+(define-pmacro (arith-op mnemonic comment-text opcode semantic-fn set-flags)
-+ (begin
-+ (dnai
-+ (.sym mnemonic -reg/imm-shift)
-+ (.str comment-text " immediate shift")
-+ ()
-+ (.str mnemonic "$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}")
-+ (+ cond (f-op2 0) (f-imm? 0) opcode set-cc? rn rd rm
-+ (f-operand2-reg? 0) operand2-shifttype operand2-shiftimm)
-+ (sequence ((SI operand2) (SI result) (SI temp-op1) (SI temp-op2))
-+ (set operand2
-+ (c-call SI "compute_operand2_immshift" rm
-+ operand2-shifttype operand2-shiftimm))
-+ (set temp-op1 rn)
-+ (set temp-op2 operand2)
-+ (set result (semantic-fn rn operand2 cbit))
-+ (if (eq f-rd 15)
-+ (sequence ()
-+ (set pc result)
-+ (if set-cc?
-+ (set (reg h-cpsr) (reg h-spsr))))
-+ (sequence ()
-+ (set rd result)
-+ (if set-cc?
-+ (set-flags temp-op1 temp-op2 cbit)))))
-+ )
-+ (dnai
-+ (.sym mnemonic -reg/reg-shift)
-+ (.str comment-text " register shift")
-+ ((R15-OFFSET 12))
-+ (.str mnemonic "$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}")
-+ (+ cond (f-op2 0) (f-imm? 0) opcode set-cc? rn rd rm
-+ (f-operand2-reg? 1) (f-bit7 0)
-+ operand2-shifttype operand2-shiftreg)
-+ (sequence ((SI operand2) (SI result) (SI temp-op1) (SI temp-op2))
-+ (set operand2
-+ (c-call SI "compute_operand2_regshift" rm
-+ operand2-shifttype operand2-shiftreg))
-+ (set temp-op1 rn)
-+ (set temp-op2 operand2)
-+ (set result (semantic-fn rn operand2 cbit))
-+ (if (eq f-rd 15)
-+ (sequence ()
-+ (set pc result)
-+ (if set-cc?
-+ (set (reg h-cpsr) (reg h-spsr))))
-+ (sequence ()
-+ (set rd result)
-+ (if set-cc?
-+ (set-flags temp-op1 temp-op2 cbit)))))
-+ )
-+ )
-+)
-+
-+; Arithmetic operation, with a result and immediate operand.
-+
-+(define-pmacro (arith-imm-op mnemonic comment-text opcode semantic-fn set-flags)
-+ (dnai (.sym mnemonic -imm)
-+ (.str comment-text " immediate")
-+ ()
-+ (.str mnemonic "$cond${set-cc?} $rd,$rn,$imm12")
-+ (+ cond (f-op2 0) (f-imm? 1) opcode set-cc? rn rd imm12)
-+ (sequence ((SI result))
-+ (set result (semantic-fn rn imm12 cbit))
-+ (if (eq f-rd 15)
-+ (sequence ()
-+ (if set-cc?
-+ (set (reg h-cpsr) (reg h-spsr)))
-+ (set pc result))
-+ (sequence ()
-+ (if set-cc?
-+ (set-flags rn imm12 cbit))
-+ (set rd result))))
-+ )
-+)
-+
-+; Logical data processing insns.
-+
-+(logical-op and "Bitwise AND" OP_AND and)
-+
-+(dnai and-imm "Bitwise AND immediate" ()
-+ "and$cond${set-cc?} $rd,$rn,$imm12"
-+ (+ cond (f-op2 0) (f-imm? 1) OP_AND set-cc? rn rd imm12)
-+ (sequence ((SI result))
-+ (set result (and rn imm12))
-+ (if (eq f-rd 15)
-+ (sequence ()
-+ (set pc result)
-+ (if set-cc?
-+ (set (reg h-cpsr) (reg h-spsr))))
-+ (sequence ()
-+ (set rd result)
-+ (if set-cc?
-+ (set-zn-flags result)))))
-+)
-+
-+(logical-op orr "Bitwise OR" OP_ORR or)
-+
-+(dnai orr-imm "Bitwise OR immediate" ()
-+ "orr$cond${set-cc?} $rd,$rn,$imm12"
-+ (+ cond (f-op2 0) (f-imm? 1) OP_ORR set-cc? rn rd imm12)
-+ (sequence ((SI result))
-+ (set result (or rn imm12))
-+ (if (eq f-rd 15)
-+ (sequence ()
-+ (set pc result)
-+ (if set-cc?
-+ (set (reg h-cpsr) (reg h-spsr))))
-+ (sequence ()
-+ (set rd result)
-+ (if set-cc?
-+ (set-zn-flags result)))))
-+)
-+
-+(logical-op eor "Exclusive OR" OP_EOR xor)
-+
-+(dnai eor-imm "Exclusive OR immediate" ()
-+ "eor$cond${set-cc?} $rd,$rn,$imm12"
-+ (+ cond (f-op2 0) (f-imm? 1) OP_EOR set-cc? rn rd imm12)
-+ (sequence ((SI result))
-+ (set result (xor rn imm12))
-+ (if (eq f-rd 15)
-+ (sequence ()
-+ (set pc result)
-+ (if set-cc?
-+ (set (reg h-cpsr) (reg h-spsr))))
-+ (sequence ()
-+ (set rd result)
-+ (if set-cc?
-+ (set-zn-flags result)))))
-+)
-+
-+(logical-op mov "Move" OP_MOV (.pmacro (arg1 arg2) arg2))
-+
-+(dnai mov-imm "Move immediate" ()
-+ "mov$cond${set-cc?} $rd,$imm12"
-+ ; rn is ignored
-+ (+ cond (f-op2 0) (f-imm? 1) OP_MOV set-cc? rn rd imm12)
-+ (sequence ((SI result))
-+ (set result imm12)
-+ (if (eq f-rd 15)
-+ (sequence ()
-+ (set pc result)
-+ (if set-cc?
-+ (set (reg h-cpsr) (reg h-spsr))))
-+ (sequence ()
-+ (set rd result)
-+ (if set-cc?
-+ (set-zn-flags result)))))
-+)
-+
-+(logical-op bic "Bit clear" OP_BIC (.pmacro (arg1 arg2) (and arg1 (inv arg2))))
-+
-+(dnai bic-imm "Bit clear immediate" ()
-+ "bic$cond${set-cc?} $rd,$rn,$imm12"
-+ (+ cond (f-op2 0) (f-imm? 1) OP_BIC set-cc? rn rd imm12)
-+ (sequence ((SI result))
-+ (set result (and rn (inv imm12)))
-+ (if (eq f-rd 15)
-+ (sequence ()
-+ (set pc result)
-+ (if set-cc?
-+ (set (reg h-cpsr) (reg h-spsr))))
-+ (sequence ()
-+ (set rd result)
-+ (if set-cc?
-+ (set-zn-flags result)))))
-+)
-+
-+(logical-op mvn "Move negate" OP_MVN (.pmacro (arg1 arg2) (inv arg2)))
-+
-+(dnai mvn-imm "Move (logical) negate immediate" ()
-+ "mvn$cond${set-cc?} $rd,$imm12"
-+ ; rn is ignored
-+ (+ cond (f-op2 0) (f-imm? 1) OP_MVN set-cc? rn rd imm12)
-+ (sequence ((SI result))
-+ (set result (inv imm12))
-+ (if (eq f-rd 15)
-+ (sequence ()
-+ (set pc result)
-+ (if set-cc?
-+ (set (reg h-cpsr) (reg h-spsr))))
-+ (sequence ()
-+ (set rd result)
-+ (if set-cc?
-+ (set-zn-flags result)))))
-+)
-+
-+; Arithmetic data processing insns.
-+
-+(arith-op add "Add" OP_ADD
-+ (.pmacro (arg1 arg2 carry) (add arg1 arg2))
-+ (.pmacro (arg1 arg2 carry) (set-add-flags arg1 arg2 0))
-+)
-+
-+(arith-imm-op add "Add" OP_ADD
-+ (.pmacro (arg1 arg2 carry) (add arg1 arg2))
-+ (.pmacro (arg1 arg2 carry) (set-add-flags arg1 arg2 0))
-+)
-+
-+(arith-op adc "Add with carry" OP_ADC
-+ (.pmacro (arg1 arg2 carry) (addc arg1 arg2 carry))
-+ (.pmacro (arg1 arg2 carry) (set-add-flags arg1 arg2 carry))
-+)
-+
-+(arith-imm-op adc "Add with carry" OP_ADC
-+ (.pmacro (arg1 arg2 carry) (addc arg1 arg2 carry))
-+ (.pmacro (arg1 arg2 carry) (set-add-flags arg1 arg2 carry))
-+)
-+
-+(arith-op sub "Subtract" OP_SUB
-+ (.pmacro (arg1 arg2 borrow) (sub arg1 arg2))
-+ (.pmacro (arg1 arg2 borrow) (set-sub-flags arg1 arg2 1))
-+)
-+
-+(arith-imm-op sub "Subtract" OP_SUB
-+ (.pmacro (arg1 arg2 borrow) (sub arg1 arg2))
-+ (.pmacro (arg1 arg2 borrow) (set-sub-flags arg1 arg2 1))
-+)
-+
-+(arith-op sbc "Subtract with carry" OP_SBC
-+ (.pmacro (arg1 arg2 borrow) (subc arg1 arg2 (not borrow)))
-+ (.pmacro (arg1 arg2 borrow) (set-sub-flags arg1 arg2 borrow))
-+)
-+
-+(arith-imm-op sbc "Subtract with carry" OP_SBC
-+ (.pmacro (arg1 arg2 borrow) (subc arg1 arg2 (not borrow)))
-+ (.pmacro (arg1 arg2 borrow) (set-sub-flags arg1 arg2 borrow))
-+)
-+
-+(arith-op rsb "Reverse subtract" OP_RSB
-+ (.pmacro (arg1 arg2 borrow) (sub arg2 arg1))
-+ (.pmacro (arg1 arg2 borrow) (set-sub-flags arg2 arg1 1))
-+)
-+
-+(arith-imm-op rsb "Reverse subtract" OP_RSB
-+ (.pmacro (arg1 arg2 borrow) (sub arg2 arg1))
-+ (.pmacro (arg1 arg2 borrow) (set-sub-flags arg2 arg1 1))
-+)
-+
-+(arith-op rsc "Reverse subtract with carry" OP_RSC
-+ (.pmacro (arg1 arg2 borrow) (subc arg2 arg1 (not borrow)))
-+ (.pmacro (arg1 arg2 borrow) (set-sub-flags arg2 arg1 borrow))
-+)
-+
-+(arith-imm-op rsc "Reverse subtract with carry" OP_RSC
-+ (.pmacro (arg1 arg2 borrow) (subc arg2 arg1 (not borrow)))
-+ (.pmacro (arg1 arg2 borrow) (set-sub-flags arg2 arg1 borrow))
-+)
-+
-+; Comparison instructions.
-+;
-+; For the following data processing insns, the `S' mnemonic suffix is
-+; redundant, but can be specified. The `S' bit is forced to 1 by the
-+; assembler. rd is not used. rn is tested only.
-+; `S' bit = 0 -> mrs,msr insns.
-+
-+(dnai tst-reg/imm-shift
-+ "Test immediate shift"
-+ ()
-+ "tst$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}"
-+ (+ cond (f-op2 0) (f-imm? 0) OP_TST (f-set-cc? 1) rn rd rm
-+ (f-operand2-reg? 0) operand2-shifttype operand2-shiftimm)
-+ (sequence ((SI operand2) (BI carry-out) (SI result))
-+ (set operand2
-+ (c-call SI "compute_operand2_immshift" rm
-+ operand2-shifttype operand2-shiftimm))
-+ (set carry-out
-+ (c-call BI "compute_carry_out_immshift" rm
-+ operand2-shifttype operand2-shiftimm cbit))
-+ (set result (and rn operand2))
-+ (if (eq f-rd 15)
-+ (set (reg h-cpsr) (reg h-spsr))
-+ (set-logical-cc result carry-out)))
-+)
-+
-+(dnai tst-reg/reg-shift
-+ "Test register shift"
-+ ((R15-OFFSET 12))
-+ "tst$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}"
-+ (+ cond (f-op2 0) (f-imm? 0) OP_TST (f-set-cc? 1) rn rd rm
-+ (f-operand2-reg? 1) (f-bit7 0)
-+ operand2-shifttype operand2-shiftreg)
-+ (sequence ((SI operand2) (BI carry-out) (SI result))
-+ (set operand2
-+ (c-call SI "compute_operand2_regshift" rm
-+ operand2-shifttype operand2-shiftreg))
-+ (set carry-out
-+ (c-call BI "compute_carry_out_regshift" rm
-+ operand2-shifttype operand2-shiftreg cbit))
-+ (set result (and rn operand2))
-+ (if (eq f-rd 15)
-+ (set (reg h-cpsr) (reg h-spsr))
-+ (set-logical-cc result carry-out)))
-+)
-+
-+(dnai tst-imm "Test immediate" ()
-+ "tst${cond}${set-cc?} $rn,$imm12"
-+ (+ cond (f-op2 0) (f-imm? 1) OP_TST (f-set-cc? 1) rn rd ror-imm8)
-+ (sequence ((BI carry-out))
-+ (if (eq f-ror-imm8-rotate 0)
-+ (set carry-out cbit)
-+ ; FIXME: nflag BI?
-+ (set carry-out (nflag BI ror-imm8)))
-+ (set-logical-cc (and rn ror-imm8) carry-out))
-+)
-+
-+(dnai teq-reg/imm-shift
-+ "Test equal immediate shift"
-+ ()
-+ "teq$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}"
-+ (+ cond (f-op2 0) (f-imm? 0) OP_TEQ (f-set-cc? 1) rn rd rm
-+ (f-operand2-reg? 0) operand2-shifttype operand2-shiftimm)
-+ (sequence ((SI operand2) (BI carry-out) (SI result))
-+ (set operand2
-+ (c-call SI "compute_operand2_immshift" rm
-+ operand2-shifttype operand2-shiftimm))
-+ (set carry-out
-+ (c-call BI "compute_carry_out_immshift" rm
-+ operand2-shifttype operand2-shiftimm cbit))
-+ (set result (xor rn operand2))
-+ (if (eq f-rd 15)
-+ (set (reg h-cpsr) (reg h-spsr))
-+ (set-logical-cc result carry-out)))
-+)
-+
-+(dnai teq-reg/reg-shift
-+ "Test equal register shift"
-+ ((R15-OFFSET 12))
-+ "teq$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}"
-+ (+ cond (f-op2 0) (f-imm? 0) OP_TEQ (f-set-cc? 1) rn rd rm
-+ (f-operand2-reg? 1) (f-bit7 0)
-+ operand2-shifttype operand2-shiftreg)
-+ (sequence ((SI operand2) (BI carry-out) (SI result))
-+ (set operand2
-+ (c-call SI "compute_operand2_regshift" rm
-+ operand2-shifttype operand2-shiftreg))
-+ (set carry-out
-+ (c-call BI "compute_carry_out_regshift" rm
-+ operand2-shifttype operand2-shiftreg cbit))
-+ (set result (xor rn operand2))
-+ (if (eq f-rd 15)
-+ (set (reg h-cpsr) (reg h-spsr))
-+ (set-logical-cc result carry-out)))
-+)
-+
-+(dnai teq-imm "Test equal immediate" ()
-+ "teq${cond}${set-cc?} $rn,$imm12"
-+ (+ cond (f-op2 0) (f-imm? 1) OP_TEQ (f-set-cc? 1) rn rd ror-imm8)
-+ ; The carry bit is preserved for the immediate form of this
-+ ; insn. ??? Though semantic analysis will believe it's read/written.
-+ (sequence ((BI carry-out))
-+ (if (eq f-ror-imm8-rotate 0)
-+ (set carry-out cbit)
-+ ; FIXME: nflag BI?
-+ (set carry-out (nflag BI ror-imm8)))
-+ (set-logical-cc (xor rn ror-imm8) carry-out))
-+)
-+
-+(dnai cmp-reg/imm-shift
-+ "Compare immediate shift "
-+ ()
-+ "cmp$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}"
-+ (+ cond (f-op2 0) (f-imm? 0) OP_CMP (f-set-cc? 1) rn rd rm
-+ (f-operand2-reg? 0) operand2-shifttype operand2-shiftimm)
-+ (sequence ((SI operand2))
-+ (set operand2
-+ (c-call SI "compute_operand2_immshift" rm
-+ operand2-shifttype operand2-shiftimm))
-+ (if (eq f-rd 15)
-+ (set (reg h-cpsr) (reg h-spsr))
-+ (set-sub-flags rn operand2 1)))
-+)
-+
-+(dnai cmp-reg/reg-shift
-+ "Compare register shift"
-+ ((R15-OFFSET 12))
-+ "cmp$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}"
-+ (+ cond (f-op2 0) (f-imm? 0) OP_CMP (f-set-cc? 1) rn rd rm
-+ (f-operand2-reg? 1) (f-bit7 0)
-+ operand2-shifttype operand2-shiftreg)
-+ (sequence ((SI operand2))
-+ (set operand2
-+ (c-call SI "compute_operand2_regshift" rm
-+ operand2-shifttype operand2-shiftreg))
-+ (if (eq f-rd 15)
-+ (set (reg h-cpsr) (reg h-spsr))
-+ (set-sub-flags rn operand2 1)))
-+)
-+
-+(dnai cmp-imm "Compare immediate" ()
-+ "cmp${cond}${set-cc?} $rn,$imm12"
-+ (+ cond (f-op2 0) (f-imm? 1) OP_CMP (f-set-cc? 1) rn rd imm12)
-+ (set-sub-flags rn imm12 1)
-+)
-+
-+(dnai cmn-reg/imm-shift
-+ "Compare negative immediate shift "
-+ ()
-+ "cmn$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}"
-+ (+ cond (f-op2 0) (f-imm? 0) OP_CMN (f-set-cc? 1) rn rd rm
-+ (f-operand2-reg? 0) operand2-shifttype operand2-shiftimm)
-+ (sequence ((SI operand2))
-+ (set operand2
-+ (c-call SI "compute_operand2_immshift" rm
-+ operand2-shifttype operand2-shiftimm))
-+ (if (eq f-rd 15)
-+ (set (reg h-cpsr) (reg h-spsr))
-+ (set-add-flags rn operand2 0)))
-+)
-+
-+(dnai cmn-reg/reg-shift
-+ "Compare negative register shift"
-+ ((R15-OFFSET 12))
-+ "cmn$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}"
-+ (+ cond (f-op2 0) (f-imm? 0) OP_CMN (f-set-cc? 1) rn rd rm
-+ (f-operand2-reg? 1) (f-bit7 0)
-+ operand2-shifttype operand2-shiftreg)
-+ (sequence ((SI operand2))
-+ (set operand2
-+ (c-call SI "compute_operand2_regshift" rm
-+ operand2-shifttype operand2-shiftreg))
-+ (if (eq f-rd 15)
-+ (set (reg h-cpsr) (reg h-spsr))
-+ (set-add-flags rn operand2 0)))
-+)
-+
-+(dnai cmn-imm "Compare negative immediate" ()
-+ "cmn${cond}${set-cc?} $rn,$imm12"
-+ (+ cond (f-op2 0) (f-imm? 1) OP_CMN (f-set-cc? 1) rn rd imm12)
-+ ; ??? Is this right?
-+ (set-add-flags rn imm12 0)
-+)
-+
-+; Multiple load and store insns.
-+
-+(define-pmacro (multi-action bit-num semantic-fn)
-+ (if (and reglist (sll 1 bit-num))
-+ (semantic-fn bit-num))
-+)
-+
-+(define-pmacro (ldmda-action bit-num)
-+ (sequence ()
-+ (set (reg WI h-gr bit-num) (mem WI addr))
-+ (set addr (sub addr 4)))
-+)
-+
-+(define-pmacro (ldmda-action-r15 ignored)
-+ (sequence ()
-+ (set pc (mem WI addr))
-+ (set addr (sub addr 4)))
-+)
-+
-+(define-pmacro (ldmda-sw-action bit-num)
-+ (sequence ()
-+ (if (and reglist (sll 1 15))
-+ (set (reg WI h-gr bit-num) (mem WI addr))
-+ (set (reg WI h-gr-usr (sub bit-num 8)) (mem WI addr)))
-+ (set addr (sub addr 4)))
-+)
-+
-+(define-pmacro (ldmda-sw-action-r15 ignored)
-+ (sequence ()
-+ (set pc (mem WI addr))
-+ (set addr (sub addr 4))
-+ (set (reg h-cpsr) (reg h-spsr)))
-+)
-+
-+(dnai ldmda "Load multiple registers (postindex, decrement)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 0)
-+ (f-write-back? 0) (f-load? 1) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 15 ldmda-action-r15)
-+ (multi-action 14 ldmda-action)
-+ (multi-action 13 ldmda-action)
-+ (multi-action 12 ldmda-action)
-+ (multi-action 11 ldmda-action)
-+ (multi-action 10 ldmda-action)
-+ (multi-action 9 ldmda-action)
-+ (multi-action 8 ldmda-action)
-+ (multi-action 7 ldmda-action)
-+ (multi-action 6 ldmda-action)
-+ (multi-action 5 ldmda-action)
-+ (multi-action 4 ldmda-action)
-+ (multi-action 3 ldmda-action)
-+ (multi-action 2 ldmda-action)
-+ (multi-action 1 ldmda-action)
-+ (multi-action 0 ldmda-action)
-+ )
-+)
-+
-+(dnai ldmda-sw "Load multiple registers (postindex, decrement, switch)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 1)
-+ (f-write-back? 0) (f-load? 1) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 15 ldmda-sw-action-r15)
-+ (multi-action 14 ldmda-sw-action)
-+ (multi-action 13 ldmda-sw-action)
-+ (multi-action 12 ldmda-sw-action)
-+ (multi-action 11 ldmda-sw-action)
-+ (multi-action 10 ldmda-sw-action)
-+ (multi-action 9 ldmda-sw-action)
-+ (multi-action 8 ldmda-sw-action)
-+ (multi-action 7 ldmda-action)
-+ (multi-action 6 ldmda-action)
-+ (multi-action 5 ldmda-action)
-+ (multi-action 4 ldmda-action)
-+ (multi-action 3 ldmda-action)
-+ (multi-action 2 ldmda-action)
-+ (multi-action 1 ldmda-action)
-+ (multi-action 0 ldmda-action)
-+ )
-+)
-+
-+(dnai ldmda-wb "Load multiple registers (postindex, decrement, writeback)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 0)
-+ (f-write-back? 1) (f-load? 1) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 15 ldmda-action-r15)
-+ (multi-action 14 ldmda-action)
-+ (multi-action 13 ldmda-action)
-+ (multi-action 12 ldmda-action)
-+ (multi-action 11 ldmda-action)
-+ (multi-action 10 ldmda-action)
-+ (multi-action 9 ldmda-action)
-+ (multi-action 8 ldmda-action)
-+ (multi-action 7 ldmda-action)
-+ (multi-action 6 ldmda-action)
-+ (multi-action 5 ldmda-action)
-+ (multi-action 4 ldmda-action)
-+ (multi-action 3 ldmda-action)
-+ (multi-action 2 ldmda-action)
-+ (multi-action 1 ldmda-action)
-+ (multi-action 0 ldmda-action)
-+ (set rn addr))
-+)
-+
-+(dnai ldmda-sw-wb "Load multiple registers (postindex, decrement, switch, writeback)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 1)
-+ (f-write-back? 1) (f-load? 1) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 15 ldmda-sw-action-r15)
-+ (multi-action 14 ldmda-sw-action)
-+ (multi-action 13 ldmda-sw-action)
-+ (multi-action 12 ldmda-sw-action)
-+ (multi-action 11 ldmda-sw-action)
-+ (multi-action 10 ldmda-sw-action)
-+ (multi-action 9 ldmda-sw-action)
-+ (multi-action 8 ldmda-sw-action)
-+ (multi-action 7 ldmda-action)
-+ (multi-action 6 ldmda-action)
-+ (multi-action 5 ldmda-action)
-+ (multi-action 4 ldmda-action)
-+ (multi-action 3 ldmda-action)
-+ (multi-action 2 ldmda-action)
-+ (multi-action 1 ldmda-action)
-+ (multi-action 0 ldmda-action)
-+ (set rn addr))
-+)
-+
-+(define-pmacro (ldmib-action bit-num)
-+ (sequence ()
-+ (set addr (add addr 4))
-+ (set (reg WI h-gr bit-num) (mem WI addr)))
-+)
-+
-+(define-pmacro (ldmib-action-r15 ignored)
-+ (sequence ()
-+ (set addr (add addr 4))
-+ (set pc (mem WI addr)))
-+)
-+
-+(define-pmacro (ldmib-sw-action bit-num)
-+ (sequence ()
-+ (set addr (add addr 4))
-+ (if (and reglist (sll 1 15))
-+ (set (reg WI h-gr bit-num) (mem WI addr))
-+ (set (reg WI h-gr-usr (sub bit-num 8)) (mem WI addr))))
-+)
-+
-+(define-pmacro (ldmib-sw-action-r15 ignored)
-+ (sequence ()
-+ (set addr (add addr 4))
-+ (set pc (mem WI addr))
-+ (set (reg h-cpsr) (reg h-spsr)))
-+)
-+
-+(dnai ldmib "Load multiple register (preindex, increment)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 0)
-+ (f-write-back? 0) (f-load? 1) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 0 ldmib-action)
-+ (multi-action 1 ldmib-action)
-+ (multi-action 2 ldmib-action)
-+ (multi-action 3 ldmib-action)
-+ (multi-action 4 ldmib-action)
-+ (multi-action 5 ldmib-action)
-+ (multi-action 6 ldmib-action)
-+ (multi-action 7 ldmib-action)
-+ (multi-action 8 ldmib-action)
-+ (multi-action 9 ldmib-action)
-+ (multi-action 10 ldmib-action)
-+ (multi-action 11 ldmib-action)
-+ (multi-action 12 ldmib-action)
-+ (multi-action 13 ldmib-action)
-+ (multi-action 14 ldmib-action)
-+ (multi-action 15 ldmib-action-r15))
-+)
-+
-+(dnai ldmib-sw "Load multiple register (preindex, increment, switch)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 1)
-+ (f-write-back? 0) (f-load? 1) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 0 ldmib-action)
-+ (multi-action 1 ldmib-action)
-+ (multi-action 2 ldmib-action)
-+ (multi-action 3 ldmib-action)
-+ (multi-action 4 ldmib-action)
-+ (multi-action 5 ldmib-action)
-+ (multi-action 6 ldmib-action)
-+ (multi-action 7 ldmib-action)
-+ (multi-action 8 ldmib-sw-action)
-+ (multi-action 9 ldmib-sw-action)
-+ (multi-action 10 ldmib-sw-action)
-+ (multi-action 11 ldmib-sw-action)
-+ (multi-action 12 ldmib-sw-action)
-+ (multi-action 13 ldmib-sw-action)
-+ (multi-action 14 ldmib-sw-action)
-+ (multi-action 15 ldmib-sw-action-r15))
-+)
-+
-+(dnai ldmib-wb "Load multiple registers (preindex, increment, writeback)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 0)
-+ (f-write-back? 1) (f-load? 1) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 0 ldmib-action)
-+ (multi-action 1 ldmib-action)
-+ (multi-action 2 ldmib-action)
-+ (multi-action 3 ldmib-action)
-+ (multi-action 4 ldmib-action)
-+ (multi-action 5 ldmib-action)
-+ (multi-action 6 ldmib-action)
-+ (multi-action 7 ldmib-action)
-+ (multi-action 8 ldmib-action)
-+ (multi-action 9 ldmib-action)
-+ (multi-action 10 ldmib-action)
-+ (multi-action 11 ldmib-action)
-+ (multi-action 12 ldmib-action)
-+ (multi-action 13 ldmib-action)
-+ (multi-action 14 ldmib-action)
-+ (multi-action 15 ldmib-action-r15)
-+ (set rn addr))
-+)
-+
-+(dnai ldmib-sw-wb "Load multiple registers (preindex, increment, switch, writeback)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 1)
-+ (f-write-back? 1) (f-load? 1) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 0 ldmib-action)
-+ (multi-action 1 ldmib-action)
-+ (multi-action 2 ldmib-action)
-+ (multi-action 3 ldmib-action)
-+ (multi-action 4 ldmib-action)
-+ (multi-action 5 ldmib-action)
-+ (multi-action 6 ldmib-action)
-+ (multi-action 7 ldmib-action)
-+ (multi-action 8 ldmib-sw-action)
-+ (multi-action 9 ldmib-sw-action)
-+ (multi-action 10 ldmib-sw-action)
-+ (multi-action 11 ldmib-sw-action)
-+ (multi-action 12 ldmib-sw-action)
-+ (multi-action 13 ldmib-sw-action)
-+ (multi-action 14 ldmib-sw-action)
-+ (multi-action 15 ldmib-sw-action-r15)
-+ (set rn addr))
-+)
-+
-+(define-pmacro (ldmia-action bit-num)
-+ (sequence ()
-+ (set (reg WI h-gr bit-num) (mem WI addr))
-+ (set addr (add addr 4)))
-+)
-+
-+(define-pmacro (ldmia-action-r15 ignored)
-+ (sequence ()
-+ (set pc (mem WI addr))
-+ (set addr (add addr 4)))
-+)
-+
-+(define-pmacro (ldmia-sw-action bit-num)
-+ (sequence ()
-+ (if (and reglist (sll 1 15))
-+ (set (reg WI h-gr bit-num) (mem WI addr))
-+ (set (reg WI h-gr-usr (sub bit-num 8)) (mem WI addr)))
-+ (set addr (add addr 4)))
-+)
-+
-+(define-pmacro (ldmia-sw-action-r15 ignored)
-+ (sequence ()
-+ (set pc (mem WI addr))
-+ (set addr (add addr 4))
-+ (set (reg h-cpsr) (reg h-spsr)))
-+)
-+
-+(dnai ldmia "Load multiple registers (postindex, increment)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 0)
-+ (f-write-back? 0) (f-load? 1) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 0 ldmia-action)
-+ (multi-action 1 ldmia-action)
-+ (multi-action 2 ldmia-action)
-+ (multi-action 3 ldmia-action)
-+ (multi-action 4 ldmia-action)
-+ (multi-action 5 ldmia-action)
-+ (multi-action 6 ldmia-action)
-+ (multi-action 7 ldmia-action)
-+ (multi-action 8 ldmia-action)
-+ (multi-action 9 ldmia-action)
-+ (multi-action 10 ldmia-action)
-+ (multi-action 11 ldmia-action)
-+ (multi-action 12 ldmia-action)
-+ (multi-action 13 ldmia-action)
-+ (multi-action 14 ldmia-action)
-+ (multi-action 15 ldmia-action-r15))
-+)
-+
-+(dnai ldmia-sw "Load multiple registers (postindex, increment, switch)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1)
-+ (f-write-back? 0) (f-load? 1) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 0 ldmia-action)
-+ (multi-action 1 ldmia-action)
-+ (multi-action 2 ldmia-action)
-+ (multi-action 3 ldmia-action)
-+ (multi-action 4 ldmia-action)
-+ (multi-action 5 ldmia-action)
-+ (multi-action 6 ldmia-action)
-+ (multi-action 7 ldmia-action)
-+ (multi-action 8 ldmia-sw-action)
-+ (multi-action 9 ldmia-sw-action)
-+ (multi-action 10 ldmia-sw-action)
-+ (multi-action 11 ldmia-sw-action)
-+ (multi-action 12 ldmia-sw-action)
-+ (multi-action 13 ldmia-sw-action)
-+ (multi-action 14 ldmia-sw-action)
-+ (multi-action 15 ldmia-sw-action-r15))
-+)
-+
-+(dnai ldmia-wb "Load multiple registers (postindex, increment, writeback)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 0)
-+ (f-write-back? 1) (f-load? 1) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 0 ldmia-action)
-+ (multi-action 1 ldmia-action)
-+ (multi-action 2 ldmia-action)
-+ (multi-action 3 ldmia-action)
-+ (multi-action 4 ldmia-action)
-+ (multi-action 5 ldmia-action)
-+ (multi-action 6 ldmia-action)
-+ (multi-action 7 ldmia-action)
-+ (multi-action 8 ldmia-action)
-+ (multi-action 9 ldmia-action)
-+ (multi-action 10 ldmia-action)
-+ (multi-action 11 ldmia-action)
-+ (multi-action 12 ldmia-action)
-+ (multi-action 13 ldmia-action)
-+ (multi-action 14 ldmia-action)
-+ (multi-action 15 ldmia-action-r15)
-+ (set rn addr))
-+)
-+
-+(dnai ldmia-sw-wb "Load multiple registers (postindex, increment, switch, writeback)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1)
-+ (f-write-back? 1) (f-load? 1) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 0 ldmia-action)
-+ (multi-action 1 ldmia-action)
-+ (multi-action 2 ldmia-action)
-+ (multi-action 3 ldmia-action)
-+ (multi-action 4 ldmia-action)
-+ (multi-action 5 ldmia-action)
-+ (multi-action 6 ldmia-action)
-+ (multi-action 7 ldmia-action)
-+ (multi-action 8 ldmia-sw-action)
-+ (multi-action 9 ldmia-sw-action)
-+ (multi-action 10 ldmia-sw-action)
-+ (multi-action 11 ldmia-sw-action)
-+ (multi-action 12 ldmia-sw-action)
-+ (multi-action 13 ldmia-sw-action)
-+ (multi-action 14 ldmia-sw-action)
-+ (multi-action 15 ldmia-sw-action-r15)
-+ (set rn addr))
-+)
-+
-+(define-pmacro (ldmdb-action bit-num)
-+ (sequence ()
-+ (set addr (sub addr 4))
-+ (set (reg WI h-gr bit-num) (mem WI addr)))
-+)
-+
-+(define-pmacro (ldmdb-action-r15 bit-num)
-+ (sequence ()
-+ (set addr (sub addr 4))
-+ (set pc (mem WI addr)))
-+)
-+
-+(define-pmacro (ldmdb-sw-action bit-num)
-+ (sequence ()
-+ (set addr (sub addr 4))
-+ (if (and reglist (sll 1 15))
-+ (set (reg WI h-gr bit-num) (mem WI addr))
-+ (set (reg WI h-gr-usr (sub bit-num 8)) (mem WI addr))))
-+)
-+
-+(define-pmacro (ldmdb-sw-action-r15 ignored)
-+ (sequence ()
-+ (set addr (sub addr 4))
-+ (set pc (mem WI addr))
-+ (set (reg h-cpsr) (reg h-spsr)))
-+)
-+
-+(dnai ldmdb "Load multiple registers (preindex, decrement)"
-+ ()
-+ "ldm$cond .."
-+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 0)
-+ (f-write-back? 0) (f-load? 1) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 15 ldmdb-action-r15)
-+ (multi-action 14 ldmdb-action)
-+ (multi-action 13 ldmdb-action)
-+ (multi-action 12 ldmdb-action)
-+ (multi-action 11 ldmdb-action)
-+ (multi-action 10 ldmdb-action)
-+ (multi-action 9 ldmdb-action)
-+ (multi-action 8 ldmdb-action)
-+ (multi-action 7 ldmdb-action)
-+ (multi-action 6 ldmdb-action)
-+ (multi-action 5 ldmdb-action)
-+ (multi-action 4 ldmdb-action)
-+ (multi-action 3 ldmdb-action)
-+ (multi-action 2 ldmdb-action)
-+ (multi-action 1 ldmdb-action)
-+ (multi-action 0 ldmdb-action))
-+)
-+
-+(dnai ldmdb-sw "Load multiple registers (preindex, decrement, switch)"
-+ ()
-+ "ldm$cond .."
-+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 1)
-+ (f-write-back? 0) (f-load? 1) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 15 ldmdb-sw-action-r15)
-+ (multi-action 14 ldmdb-sw-action)
-+ (multi-action 13 ldmdb-sw-action)
-+ (multi-action 12 ldmdb-sw-action)
-+ (multi-action 11 ldmdb-sw-action)
-+ (multi-action 10 ldmdb-sw-action)
-+ (multi-action 9 ldmdb-sw-action)
-+ (multi-action 8 ldmdb-sw-action)
-+ (multi-action 7 ldmdb-action)
-+ (multi-action 6 ldmdb-action)
-+ (multi-action 5 ldmdb-action)
-+ (multi-action 4 ldmdb-action)
-+ (multi-action 3 ldmdb-action)
-+ (multi-action 2 ldmdb-action)
-+ (multi-action 1 ldmdb-action)
-+ (multi-action 0 ldmdb-action))
-+)
-+
-+(dnai ldmdb-wb "Load multiple registers (preindex, decrement, writeback)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 0)
-+ (f-write-back? 1) (f-load? 1) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 15 ldmdb-action-r15)
-+ (multi-action 14 ldmdb-action)
-+ (multi-action 13 ldmdb-action)
-+ (multi-action 12 ldmdb-action)
-+ (multi-action 11 ldmdb-action)
-+ (multi-action 10 ldmdb-action)
-+ (multi-action 9 ldmdb-action)
-+ (multi-action 8 ldmdb-action)
-+ (multi-action 7 ldmdb-action)
-+ (multi-action 6 ldmdb-action)
-+ (multi-action 5 ldmdb-action)
-+ (multi-action 4 ldmdb-action)
-+ (multi-action 3 ldmdb-action)
-+ (multi-action 2 ldmdb-action)
-+ (multi-action 1 ldmdb-action)
-+ (multi-action 0 ldmdb-action)
-+ (set rn addr))
-+)
-+
-+(dnai ldmdb-sw-wb "Load multiple registers (preindex, decrement, switch, writeback)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 1)
-+ (f-write-back? 1) (f-load? 1) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 15 ldmdb-sw-action-r15)
-+ (multi-action 14 ldmdb-sw-action)
-+ (multi-action 13 ldmdb-sw-action)
-+ (multi-action 12 ldmdb-sw-action)
-+ (multi-action 11 ldmdb-sw-action)
-+ (multi-action 10 ldmdb-sw-action)
-+ (multi-action 9 ldmdb-sw-action)
-+ (multi-action 8 ldmdb-sw-action)
-+ (multi-action 7 ldmdb-action)
-+ (multi-action 6 ldmdb-action)
-+ (multi-action 5 ldmdb-action)
-+ (multi-action 4 ldmdb-action)
-+ (multi-action 3 ldmdb-action)
-+ (multi-action 2 ldmdb-action)
-+ (multi-action 1 ldmdb-action)
-+ (multi-action 0 ldmdb-action)
-+ (set rn addr))
-+)
-+
-+(define-pmacro (stmdb-action bit-num)
-+ (sequence ()
-+ (set addr (sub addr 4))
-+ (set (mem WI addr) (reg WI h-gr bit-num)))
-+)
-+
-+(define-pmacro (stmdb-sw-action bit-num)
-+ (sequence ()
-+ (set addr (sub addr 4))
-+ (if (and reglist (sll 1 15))
-+ (set (mem WI addr) (reg WI h-gr bit-num))
-+ (set (mem WI addr) (reg WI h-gr-usr (sub bit-num 8)))))
-+)
-+
-+(define-pmacro (stmdb-action-r15 ignore)
-+ (sequence ()
-+ (set addr (sub addr 4))
-+ (set (mem WI addr) (add (reg WI h-gr 15) 4)))
-+)
-+
-+(dnai stmdb "Store multiple registers (preindex, decrement)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 0)
-+ (f-write-back? 0) (f-load? 0) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 15 stmdb-action-r15)
-+ (multi-action 14 stmdb-action)
-+ (multi-action 13 stmdb-action)
-+ (multi-action 12 stmdb-action)
-+ (multi-action 11 stmdb-action)
-+ (multi-action 10 stmdb-action)
-+ (multi-action 9 stmdb-action)
-+ (multi-action 8 stmdb-action)
-+ (multi-action 7 stmdb-action)
-+ (multi-action 6 stmdb-action)
-+ (multi-action 5 stmdb-action)
-+ (multi-action 4 stmdb-action)
-+ (multi-action 3 stmdb-action)
-+ (multi-action 2 stmdb-action)
-+ (multi-action 1 stmdb-action)
-+ (multi-action 0 stmdb-action))
-+)
-+
-+(dnai stmdb-sw "Store multiple registers (preindex, decrement, switch)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 1)
-+ (f-write-back? 0) (f-load? 0) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 15 stmdb-action-r15)
-+ (multi-action 14 stmdb-sw-action)
-+ (multi-action 13 stmdb-sw-action)
-+ (multi-action 12 stmdb-sw-action)
-+ (multi-action 11 stmdb-sw-action)
-+ (multi-action 10 stmdb-sw-action)
-+ (multi-action 9 stmdb-sw-action)
-+ (multi-action 8 stmdb-sw-action)
-+ (multi-action 7 stmdb-action)
-+ (multi-action 6 stmdb-action)
-+ (multi-action 5 stmdb-action)
-+ (multi-action 4 stmdb-action)
-+ (multi-action 3 stmdb-action)
-+ (multi-action 2 stmdb-action)
-+ (multi-action 1 stmdb-action)
-+ (multi-action 0 stmdb-action))
-+)
-+
-+(dnai stmdb-wb "Store multiple registers (preindex, decrement, writeback)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 0)
-+ (f-write-back? 1) (f-load? 0) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 15 stmdb-action-r15)
-+ (multi-action 14 stmdb-action)
-+ (multi-action 13 stmdb-action)
-+ (multi-action 12 stmdb-action)
-+ (multi-action 11 stmdb-action)
-+ (multi-action 10 stmdb-action)
-+ (multi-action 9 stmdb-action)
-+ (multi-action 8 stmdb-action)
-+ (multi-action 7 stmdb-action)
-+ (multi-action 6 stmdb-action)
-+ (multi-action 5 stmdb-action)
-+ (multi-action 4 stmdb-action)
-+ (multi-action 3 stmdb-action)
-+ (multi-action 2 stmdb-action)
-+ (multi-action 1 stmdb-action)
-+ (multi-action 0 stmdb-action)
-+ (set rn addr))
-+)
-+
-+(dnai stmdb-sw-wb "Store multiple registers (preindex, decrement, switch, writeback)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 1)
-+ (f-write-back? 1) (f-load? 0) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 15 stmdb-action-r15)
-+ (multi-action 14 stmdb-sw-action)
-+ (multi-action 13 stmdb-sw-action)
-+ (multi-action 12 stmdb-sw-action)
-+ (multi-action 11 stmdb-sw-action)
-+ (multi-action 10 stmdb-sw-action)
-+ (multi-action 9 stmdb-sw-action)
-+ (multi-action 8 stmdb-sw-action)
-+ (multi-action 7 stmdb-action)
-+ (multi-action 6 stmdb-action)
-+ (multi-action 5 stmdb-action)
-+ (multi-action 4 stmdb-action)
-+ (multi-action 3 stmdb-action)
-+ (multi-action 2 stmdb-action)
-+ (multi-action 1 stmdb-action)
-+ (multi-action 0 stmdb-action)
-+ (set rn addr))
-+)
-+
-+(define-pmacro (stmib-action bit-num)
-+ (sequence ()
-+ (set addr (add addr 4))
-+ (set (mem WI addr) (reg WI h-gr bit-num)))
-+)
-+
-+(define-pmacro (stmib-sw-action bit-num)
-+ (sequence ()
-+ (set addr (add addr 4))
-+ (if (and reglist (sll 1 15))
-+ (set (mem WI addr) (reg WI h-gr bit-num))
-+ (set (mem WI addr) (reg WI h-gr-usr (sub bit-num 8)))))
-+)
-+
-+(define-pmacro (stmib-action-r15 ignore)
-+ (sequence ()
-+ (set addr (add addr 4))
-+ (set (mem WI addr) (add (reg WI h-gr 15) 4)))
-+)
-+
-+(dnai stmib "Store multiple registers (preindex, increment)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 0)
-+ (f-write-back? 0) (f-load? 0) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 0 stmib-action)
-+ (multi-action 1 stmib-action)
-+ (multi-action 2 stmib-action)
-+ (multi-action 3 stmib-action)
-+ (multi-action 4 stmib-action)
-+ (multi-action 5 stmib-action)
-+ (multi-action 6 stmib-action)
-+ (multi-action 7 stmib-action)
-+ (multi-action 8 stmib-action)
-+ (multi-action 9 stmib-action)
-+ (multi-action 10 stmib-action)
-+ (multi-action 11 stmib-action)
-+ (multi-action 12 stmib-action)
-+ (multi-action 13 stmib-action)
-+ (multi-action 14 stmib-action)
-+ (multi-action 15 stmib-action-r15))
-+)
-+
-+(dnai stmib-sw "Store multiple registers (preindex, increment, switch)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 1)
-+ (f-write-back? 0) (f-load? 0) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 0 stmib-action)
-+ (multi-action 1 stmib-action)
-+ (multi-action 2 stmib-action)
-+ (multi-action 3 stmib-action)
-+ (multi-action 4 stmib-action)
-+ (multi-action 5 stmib-action)
-+ (multi-action 6 stmib-action)
-+ (multi-action 7 stmib-action)
-+ (multi-action 8 stmib-sw-action)
-+ (multi-action 9 stmib-sw-action)
-+ (multi-action 10 stmib-sw-action)
-+ (multi-action 11 stmib-sw-action)
-+ (multi-action 12 stmib-sw-action)
-+ (multi-action 13 stmib-sw-action)
-+ (multi-action 14 stmib-sw-action)
-+ (multi-action 15 stmib-action-r15))
-+)
-+
-+(dnai stmib-wb "Store multiple registers (preindex, increment, writeback)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 0)
-+ (f-write-back? 1) (f-load? 0) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 0 stmib-action)
-+ (multi-action 1 stmib-action)
-+ (multi-action 2 stmib-action)
-+ (multi-action 3 stmib-action)
-+ (multi-action 4 stmib-action)
-+ (multi-action 5 stmib-action)
-+ (multi-action 6 stmib-action)
-+ (multi-action 7 stmib-action)
-+ (multi-action 8 stmib-action)
-+ (multi-action 9 stmib-action)
-+ (multi-action 10 stmib-action)
-+ (multi-action 11 stmib-action)
-+ (multi-action 12 stmib-action)
-+ (multi-action 13 stmib-action)
-+ (multi-action 14 stmib-action)
-+ (multi-action 15 stmib-action-r15)
-+ (set rn addr))
-+)
-+
-+(dnai stmib-sw-wb "Store multiple registers (preindex, increment, switch, writeback)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 1)
-+ (f-write-back? 1) (f-load? 0) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 0 stmib-action)
-+ (multi-action 1 stmib-action)
-+ (multi-action 2 stmib-action)
-+ (multi-action 3 stmib-action)
-+ (multi-action 4 stmib-action)
-+ (multi-action 5 stmib-action)
-+ (multi-action 6 stmib-action)
-+ (multi-action 7 stmib-action)
-+ (multi-action 8 stmib-sw-action)
-+ (multi-action 9 stmib-sw-action)
-+ (multi-action 10 stmib-sw-action)
-+ (multi-action 11 stmib-sw-action)
-+ (multi-action 12 stmib-sw-action)
-+ (multi-action 13 stmib-sw-action)
-+ (multi-action 14 stmib-sw-action)
-+ (multi-action 15 stmib-action-r15)
-+ (set rn addr))
-+)
-+
-+(define-pmacro (stmia-action bit-num)
-+ (sequence ()
-+ (set (mem WI addr) (reg WI h-gr bit-num))
-+ (set addr (add addr 4)))
-+)
-+
-+(define-pmacro (stmia-sw-action bit-num)
-+ (sequence ()
-+ (if (and reglist (sll 1 15))
-+ (set (mem WI addr) (reg WI h-gr bit-num))
-+ (set (mem WI addr) (reg WI h-gr-usr (sub bit-num 8))))
-+ (set addr (add addr 4)))
-+)
-+
-+(define-pmacro (stmia-action-r15 ignore)
-+ (sequence ()
-+ (set (mem WI addr) (add (reg WI h-gr 15) 4))
-+ (set addr (add addr 4)))
-+)
-+
-+(dnai stmia "Store multiple registers (postindex, increment)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 0)
-+ (f-write-back? 0) (f-load? 0) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 0 stmia-action)
-+ (multi-action 1 stmia-action)
-+ (multi-action 2 stmia-action)
-+ (multi-action 3 stmia-action)
-+ (multi-action 4 stmia-action)
-+ (multi-action 5 stmia-action)
-+ (multi-action 6 stmia-action)
-+ (multi-action 7 stmia-action)
-+ (multi-action 8 stmia-action)
-+ (multi-action 9 stmia-action)
-+ (multi-action 10 stmia-action)
-+ (multi-action 11 stmia-action)
-+ (multi-action 12 stmia-action)
-+ (multi-action 13 stmia-action)
-+ (multi-action 14 stmia-action)
-+ (multi-action 15 stmia-action-r15))
-+)
-+
-+(dnai stmia-sw "Store multiple registers (postindex, increment, switch)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1)
-+ (f-write-back? 0) (f-load? 0) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 0 stmia-action)
-+ (multi-action 1 stmia-action)
-+ (multi-action 2 stmia-action)
-+ (multi-action 3 stmia-action)
-+ (multi-action 4 stmia-action)
-+ (multi-action 5 stmia-action)
-+ (multi-action 6 stmia-action)
-+ (multi-action 7 stmia-action)
-+ (multi-action 8 stmia-sw-action)
-+ (multi-action 9 stmia-sw-action)
-+ (multi-action 10 stmia-sw-action)
-+ (multi-action 11 stmia-sw-action)
-+ (multi-action 12 stmia-sw-action)
-+ (multi-action 13 stmia-sw-action)
-+ (multi-action 14 stmia-sw-action)
-+ (multi-action 15 stmia-action-r15))
-+)
-+
-+(dnai stmia-wb "Store multiple registers (postindex, increment, writeback)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 0)
-+ (f-write-back? 1) (f-load? 0) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 0 stmia-action)
-+ (multi-action 1 stmia-action)
-+ (multi-action 2 stmia-action)
-+ (multi-action 3 stmia-action)
-+ (multi-action 4 stmia-action)
-+ (multi-action 5 stmia-action)
-+ (multi-action 6 stmia-action)
-+ (multi-action 7 stmia-action)
-+ (multi-action 8 stmia-action)
-+ (multi-action 9 stmia-action)
-+ (multi-action 10 stmia-action)
-+ (multi-action 11 stmia-action)
-+ (multi-action 12 stmia-action)
-+ (multi-action 13 stmia-action)
-+ (multi-action 14 stmia-action)
-+ (multi-action 15 stmia-action-r15)
-+ (set rn addr))
-+)
-+
-+(dnai stmia-sw-wb "Store multiple registers (postindex, increment, switch, writeback)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1)
-+ (f-write-back? 1) (f-load? 0) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 0 stmia-action)
-+ (multi-action 1 stmia-action)
-+ (multi-action 2 stmia-action)
-+ (multi-action 3 stmia-action)
-+ (multi-action 4 stmia-action)
-+ (multi-action 5 stmia-action)
-+ (multi-action 6 stmia-action)
-+ (multi-action 7 stmia-action)
-+ (multi-action 8 stmia-sw-action)
-+ (multi-action 9 stmia-sw-action)
-+ (multi-action 10 stmia-sw-action)
-+ (multi-action 11 stmia-sw-action)
-+ (multi-action 12 stmia-sw-action)
-+ (multi-action 13 stmia-sw-action)
-+ (multi-action 14 stmia-sw-action)
-+ (multi-action 15 stmia-action-r15)
-+ (set rn addr))
-+)
-+
-+(define-pmacro (stmda-action-r15 ignore)
-+ (sequence ()
-+ (set (mem WI addr) (add (reg WI h-gr 15) 4))
-+ (set addr (sub addr 4)))
-+)
-+
-+(define-pmacro (stmda-sw-action bit-num)
-+ (sequence ()
-+ (if (and reglist (sll 1 15))
-+ (set (mem WI addr) (reg WI h-gr bit-num))
-+ (set (mem WI addr) (reg WI h-gr-usr (sub bit-num 8))))
-+ (set addr (sub addr 4)))
-+)
-+
-+(define-pmacro (stmda-action bit-num)
-+ (sequence ()
-+ (set (mem WI addr) (reg WI h-gr bit-num))
-+ (set addr (sub addr 4)))
-+)
-+
-+(dnai stmda "Store multiple registers (postindex, decrement)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 0)
-+ (f-write-back? 0) (f-load? 0) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 15 stmda-action-r15)
-+ (multi-action 14 stmda-action)
-+ (multi-action 13 stmda-action)
-+ (multi-action 12 stmda-action)
-+ (multi-action 11 stmda-action)
-+ (multi-action 10 stmda-action)
-+ (multi-action 9 stmda-action)
-+ (multi-action 8 stmda-action)
-+ (multi-action 7 stmda-action)
-+ (multi-action 6 stmda-action)
-+ (multi-action 5 stmda-action)
-+ (multi-action 4 stmda-action)
-+ (multi-action 3 stmda-action)
-+ (multi-action 2 stmda-action)
-+ (multi-action 1 stmda-action)
-+ (multi-action 0 stmda-action))
-+)
-+
-+(dnai stmda-sw "Store multiple registers (postindex, decrement, switch)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 1)
-+ (f-write-back? 0) (f-load? 0) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 15 stmda-action-r15)
-+ (multi-action 14 stmda-sw-action)
-+ (multi-action 13 stmda-sw-action)
-+ (multi-action 12 stmda-sw-action)
-+ (multi-action 11 stmda-sw-action)
-+ (multi-action 10 stmda-sw-action)
-+ (multi-action 9 stmda-sw-action)
-+ (multi-action 8 stmda-sw-action)
-+ (multi-action 7 stmda-action)
-+ (multi-action 6 stmda-action)
-+ (multi-action 5 stmda-action)
-+ (multi-action 4 stmda-action)
-+ (multi-action 3 stmda-action)
-+ (multi-action 2 stmda-action)
-+ (multi-action 1 stmda-action)
-+ (multi-action 0 stmda-action))
-+)
-+
-+(dnai stmda-wb "Store multiple registers (postindex, decrement, writeback)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 0)
-+ (f-write-back? 1) (f-load? 0) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 15 stmda-action-r15)
-+ (multi-action 14 stmda-action)
-+ (multi-action 13 stmda-action)
-+ (multi-action 12 stmda-action)
-+ (multi-action 11 stmda-action)
-+ (multi-action 10 stmda-action)
-+ (multi-action 9 stmda-action)
-+ (multi-action 8 stmda-action)
-+ (multi-action 7 stmda-action)
-+ (multi-action 6 stmda-action)
-+ (multi-action 5 stmda-action)
-+ (multi-action 4 stmda-action)
-+ (multi-action 3 stmda-action)
-+ (multi-action 2 stmda-action)
-+ (multi-action 1 stmda-action)
-+ (multi-action 0 stmda-action)
-+ (set rn addr))
-+)
-+
-+(dnai stmda-sw-wb "Store multiple registers (postindex, decrement, switch, writeback)"
-+ ()
-+ "FIXME"
-+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 1)
-+ (f-write-back? 1) (f-load? 0) rn reglist)
-+ (sequence ((WI addr))
-+ (set addr rn)
-+ (multi-action 15 stmda-action-r15)
-+ (multi-action 14 stmda-sw-action)
-+ (multi-action 13 stmda-sw-action)
-+ (multi-action 12 stmda-sw-action)
-+ (multi-action 11 stmda-sw-action)
-+ (multi-action 10 stmda-sw-action)
-+ (multi-action 9 stmda-sw-action)
-+ (multi-action 8 stmda-sw-action)
-+ (multi-action 7 stmda-action)
-+ (multi-action 6 stmda-action)
-+ (multi-action 5 stmda-action)
-+ (multi-action 4 stmda-action)
-+ (multi-action 3 stmda-action)
-+ (multi-action 2 stmda-action)
-+ (multi-action 1 stmda-action)
-+ (multi-action 0 stmda-action)
-+ (set rn addr))
-+)
-+
-+; Coprocessor instructions.
-+; Currently not implemented, so omit these, such that we take the
-+; undefined instruction trap as specified by the ARM documentation.
-+
-+(dnai mrs-c "Transfer CPSR contents to a register"
-+ ()
-+ "mrs$cond $rd,cpsr"
-+ (+ cond (f-op5 2) PSR_CURRENT (f-op-mrs1 #xF) rd (f-op-mrs2 0))
-+ (set rd (reg h-cpsr))
-+)
-+
-+(dnai mrs-s "Transfer SPSR contents to a register"
-+ ()
-+ "mrs$cond $rd,spsr"
-+ (+ cond (f-op5 2) PSR_SAVED (f-op-mrs1 #xF) rd (f-op-mrs2 0))
-+ (set rd (reg h-spsr))
-+)
-+
-+(dnai msr-c "Transfer register contents to CPSR"
-+ ()
-+ "msr$cond cpsr,$rm"
-+ (+ cond (f-op5 2) PSR_CURRENT (f-op-msr1 #x29F) (f-op-msr2 0) rm)
-+ (set (reg h-cpsr) rm)
-+)
-+
-+(dnai msr-s "Transfer register contents to SPSR"
-+ ()
-+ "msr$cond spsr,$rm"
-+ (+ cond (f-op5 2) PSR_SAVED (f-op-msr1 #x29F) (f-op-msr2 0) rm)
-+ (set (reg h-spsr) rm)
-+)
-+
-+; TODO: msr to flag bits only
-+
-+; Commented out until ifield assertions added, collides with str/ldr.
-+; ??? It's possible to rewrite str,ldr, but assertions are wanted anyway.
-+
-+;(dnai undefined "Undefined instruction"
-+; ()
-+; "undef"
-+; (+ cond (f-op3 3) undef-dont1 (f-bit4 1) undef-dont2)
-+; ; Generate an undefined exception.
-+; ; Jump to the vector held in 0x4.
-+; ; FIXME: More state change than this occurs.
-+; (set pc (mem WI #x4))
-+;)
-diff -Nur binutils-2.24.orig/cgen/cpu/arm.cpu binutils-2.24/cgen/cpu/arm.cpu
---- binutils-2.24.orig/cgen/cpu/arm.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/arm.cpu 2016-06-30 21:26:12.605891245 +0200
-@@ -0,0 +1,423 @@
-+; ARM CPU description. -*- Scheme -*-
-+; Copyright (C) 2000 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+(include "simplify.inc")
-+
-+(define-arch
-+ (name arm)
-+ (comment "Advanced RISC Machines (ARM)")
-+ (insn-lsb0? #t)
-+ (machs arm7tdmi)
-+ (isas arm thumb)
-+)
-+
-+; ??? There should be an official rtx to do this. Until then.
-+(define-pmacro (invalid-insn)
-+ (c-call BI "invalid_insn" pc) ; FIXME: Not VOID to workaround codegen bug.
-+)
-+
-+(define-isa
-+ (name arm)
-+ (comment "ARM instruction set (32 bit insns)")
-+ (base-insn-bitsize 32)
-+ ; FIXME: wip. `f-cond' is currently defined in arm7.cpu.
-+ (condition f-cond
-+ ; `cond-code' is the extracted value of `f-cond'
-+ ; FIXME: wip
-+; (case BI cond-code
-+; ((COND_EQ) (reg h-zbit))
-+; ((COND_NE) (not (reg h-zbit)))
-+; ((COND_CS) (reg h-cbit))
-+; ((COND_CC) (not (reg h-cbit)))
-+; ((COND_MI) (reg h-nbit))
-+; ((COND_PL) (not (reg h-zbit)))
-+; ((COND_VS) (reg h-vbit))
-+; ((COND_VC) (not (reg h-vbit)))
-+; ((COND_HI) (and (reg h-cbit) (not (reg h-zbit))))
-+; ((COND_LS) (not (or (reg h-cbit) (reg h-zbit))))
-+; ((COND_GE) (eq (reg h-zbit) (reg h-vbit)))
-+; ((COND_LT) (ne (reg h-nbit) (reg h-vbit)))
-+; ((COND_GT) (and (not (reg h-zbit))
-+; (eq (reg h-nbit) (reg h-vbit))))
-+; ((COND_LE) (or (reg h-zbit)
-+; (ne (reg h-nbit) (reg h-vbit))))
-+; ((COND_AL) 1)
-+; (else (sequence BI () (invalid-insn) 1))))
-+ (c-call BI "eval_cond" cond-code pc))
-+ (decode-assist (27 26 25 24 23 22 21))
-+ ; We can lengthen pbb's by breaking insns that set h-gr into those that set
-+ ; h-gr[15] (the pc), and those that don't.
-+ ; Other analysis of the isa will benefit from this, so this is recorded here
-+ ; rather than in a simulator specific file.
-+;; (decode-splits
-+;; ; split insns with field f-rd into f-rd == 15, f-rd != 15
-+;; ; ??? To be made more general in time.
-+;; (f-rd ; split on values of this field
-+;; () ; no extra constraints
-+;; ((no-pc-dest (.iota 15)) (pc-dest 15)) ; list of splits
-+;; )
-+;; )
-+ (setup-semantics (set-quiet (reg h-gr 15) (add pc (attr (current-insn) R15-OFFSET))))
-+)
-+
-+(define-isa
-+ (name thumb)
-+ (comment "ARM Thumb instruction set (16 bit insns)")
-+ (base-insn-bitsize 16)
-+ (decode-assist (15 14 13 12 11 10 9 8))
-+ (setup-semantics (set-quiet (reg h-gr 15) (add pc 4)))
-+)
-+
-+(define-cpu
-+ (name arm7f)
-+ (comment "ARM7")
-+ (endian either)
-+ (word-bitsize 32)
-+)
-+
-+(define-mach
-+ (name arm7tdmi)
-+ (comment "ARM 7TDMI core")
-+ (cpu arm7f)
-+ (isas arm thumb)
-+)
-+
-+(define-model
-+ (name arm710)
-+ (comment "ARM 710 microprocessor")
-+ (mach arm7tdmi)
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () () () ())
-+)
-+
-+; IDOC attribute for instruction documentation.
-+; FIXME: Categorization is a bit tricky when alu ops can set the pc.
-+
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name IDOC)
-+ (comment "insn kind for documentation")
-+ (attrs META)
-+ (values
-+ (MEM - () "Memory")
-+ (ALU - () "ALU")
-+ (FPU - () "FPU")
-+ (BR - () "Branch")
-+ (PRIV - () "Priviledged")
-+ (MISC - () "Miscellaneous")
-+ )
-+)
-+
-+; Hardware.
-+
-+; The program counter is actually reg 15.
-+; But ... [there's always a "But ..." :-(] when referenced in instructions
-+; the value is either 8 or 12 beyond the address of the instruction in
-+; ARM mode and 4 beyond in Thumb mode.
-+; To handle this the program counter is treated as a separate register
-+; and r15 is set to the appropriate offset before executing each instruction.
-+; This seems like the simplest and most efficient way to handle this.
-+
-+(define-hardware
-+ (name h-pc)
-+ (comment "ARM program counter (h-gr reg 15)")
-+ (attrs PC (ISA arm,thumb))
-+ (type pc)
-+ ; In ARM mode the bottom two bits read as zero.
-+ ; In Thumb mode the bottom bit reads as zero.
-+ ; This can be handled during gets, sets, or both.
-+ ; Handling this in sets seems best ('tis handled in only one place and the
-+ ; stored value is always correct - assuming all out-of-band sets are ok).
-+ ; ??? Might be possible to optimize out the test of tbit. Later.
-+ (set (newval)
-+ (if (reg h-tbit)
-+ (set (raw-reg SI h-pc) (and newval -2))
-+ (set (raw-reg SI h-pc) (and newval -4))))
-+)
-+
-+(define-keyword
-+ (name gr-names)
-+ (print-name h-gr)
-+ (values (pc 15) ; put this first so it is prefered over r15
-+ (r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)
-+ (r8 8) (r9 9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14) (r15 15)
-+ (sp 13) (lr 14))
-+)
-+
-+(define-hardware
-+ (name h-gr)
-+ (comment "General purpose registers")
-+ (attrs (ISA arm,thumb) CACHE-ADDR)
-+ (type register SI (16))
-+ (indices extern-keyword gr-names)
-+)
-+
-+; Banked versions of h-gr.
-+; h-gr is always "active". When a mode switch happens, the copies in h-gr
-+; are copied to their holding buffers, and new values are switched in.
-+; ??? The non-user-mode versions of these registers have special names which
-+; are just(?) aliases for the normal names.
-+
-+(define-hardware
-+ (name h-gr-usr)
-+ (comment "user/system mode r8-r14 holding buffer")
-+ (attrs (ISA arm,thumb))
-+ (type register SI (7))
-+)
-+(define-hardware
-+ (name h-gr-fiq)
-+ (comment "fiq mode r8-r14 regs")
-+ (attrs (ISA arm,thumb))
-+ (type register SI (7))
-+)
-+(define-hardware
-+ (name h-gr-svc)
-+ (comment "supervisor mode r13-r14 regs")
-+ (attrs (ISA arm,thumb))
-+ (type register SI (2))
-+)
-+(define-hardware
-+ (name h-gr-abt)
-+ (comment "abort mode r13-r14 regs")
-+ (attrs (ISA arm,thumb))
-+ (type register SI (2))
-+)
-+(define-hardware
-+ (name h-gr-irq)
-+ (comment "irq mode r13-r14 regs")
-+ (attrs (ISA arm,thumb))
-+ (type register SI (2))
-+)
-+(define-hardware
-+ (name h-gr-und)
-+ (comment "undefined mode r13-r14 regs")
-+ (attrs (ISA arm,thumb))
-+ (type register SI (2))
-+)
-+
-+; The condition code bits.
-+
-+(dsh h-cbit "carry bit" ((ISA arm,thumb)) (register BI))
-+(dsh h-nbit "negative bit" ((ISA arm,thumb)) (register BI))
-+(dsh h-vbit "overflow bit" ((ISA arm,thumb)) (register BI))
-+(dsh h-zbit "zerobit" ((ISA arm,thumb)) (register BI))
-+
-+(dnop cbit "carry bit" ((ISA arm,thumb)) h-cbit f-nil)
-+(dnop nbit "negative bit" ((ISA arm,thumb)) h-nbit f-nil)
-+(dnop vbit "overflow bit" ((ISA arm,thumb)) h-vbit f-nil)
-+(dnop zbit "zero bit" ((ISA arm,thumb)) h-zbit f-nil)
-+
-+; The CPSR (current program status register).
-+
-+(dsh h-ibit "irq disable bit" ((ISA arm,thumb)) (register BI))
-+(dsh h-fbit "fiq disable bit" ((ISA arm,thumb)) (register BI))
-+
-+(define-hardware
-+ (name h-tbit)
-+ (comment "thumb bit")
-+ (attrs (ISA arm,thumb))
-+ (type register BI)
-+ (set (newval)
-+ (sequence ()
-+ (c-call VOID "arm_tbit_set" newval)))
-+)
-+
-+(define-keyword
-+ (name arm-mode)
-+ (comment "arm cpu states")
-+ (values (User #x10)
-+ (FIQ #x11)
-+ (IRQ #x12)
-+ (Supervisor #x13)
-+ (Abort #x17)
-+ (Undefined #x1b)
-+ (System #x1f)
-+ )
-+)
-+
-+(define-hardware
-+ (name h-mbits)
-+ (comment "m4,m3,m2,m1,m0")
-+ (attrs (ISA arm,thumb))
-+ (type register (UINT 5))
-+ (set (newval)
-+ (sequence ()
-+ ; processor goes into an undefined state if bad value,
-+ ; so do something similar
-+ (case VOID newval
-+ ((ARM-MODE-User ARM-MODE-FIQ ARM-MODE-IRQ
-+ ARM-MODE-Supervisor ARM-MODE-Abort
-+ ARM-MODE-Undefined ARM-MODE-System)
-+ (nop))
-+ (else (error VOID "bad value for M4-M0")))
-+ (c-call VOID "arm_mbits_set" newval)))
-+)
-+
-+(define-hardware
-+ (name h-cpsr)
-+ (comment "Current Program Status Register")
-+ (attrs VIRTUAL (ISA arm,thumb))
-+ (type register SI) ; One CPSR register.
-+ (get ()
-+ ; ??? 'twould be nice if one `or' would do
-+ (or SI (sll (zext SI (reg BI h-nbit)) (const 31))
-+ (or SI (sll (zext SI (reg BI h-zbit)) (const 30))
-+ (or SI (sll (zext SI (reg BI h-cbit)) (const 29))
-+ (or SI (sll (zext SI (reg BI h-vbit)) (const 28))
-+ (or SI (sll (zext SI (reg BI h-ibit)) (const 7))
-+ (or SI (sll (zext SI (reg BI h-fbit)) (const 6))
-+ (or SI (sll (zext SI (reg BI h-tbit)) (const 5))
-+ (reg UINT h-mbits)))))))))
-+ (set (newval)
-+ (sequence ()
-+ ; FIXME: Processor enters undefined state if software changes
-+ ; tbit, so we should do something similar.
-+ (set (reg h-nbit) (ne (and newval #x80000000) 0))
-+ (set (reg h-zbit) (ne (and newval #x40000000) 0))
-+ (set (reg h-cbit) (ne (and newval #x20000000) 0))
-+ (set (reg h-vbit) (ne (and newval #x10000000) 0))
-+ ; FIXME: user mode is not permitted to change ibit/fbit!
-+ (set (reg h-ibit) (ne (and newval #x00000080) 0))
-+ (set (reg h-fbit) (ne (and newval #x00000040) 0))
-+ (set (reg h-tbit) (ne (and newval #x00000020) 0))
-+ (set (reg h-mbits) (and newval #x1f))))
-+)
-+
-+(define-hardware
-+ (name h-spsr-fiq)
-+ (comment "Saved Process Status Register during FIQ")
-+ (attrs (ISA arm,thumb))
-+ (type register SI)
-+)
-+(define-hardware
-+ (name h-spsr-svc)
-+ (comment "Saved Process Status Register during SVC")
-+ (attrs (ISA arm,thumb))
-+ (type register SI)
-+)
-+(define-hardware
-+ (name h-spsr-abt)
-+ (comment "Saved Process Status Register during Abort")
-+ (attrs (ISA arm,thumb))
-+ (type register SI)
-+)
-+(define-hardware
-+ (name h-spsr-irq)
-+ (comment "Saved Process Status Register during IRQ")
-+ (attrs (ISA arm,thumb))
-+ (type register SI)
-+)
-+(define-hardware
-+ (name h-spsr-und)
-+ (comment "Saved Process Status Register during Undefined")
-+ (attrs (ISA arm,thumb))
-+ (type register SI)
-+)
-+
-+; Virtual version of spsr to access real one based on current mode.
-+
-+(define-hardware
-+ (name h-spsr)
-+ (comment "virtual spsr")
-+ (attrs VIRTUAL (ISA arm,thumb))
-+ (type register SI)
-+ (get ()
-+ (case SI (reg h-mbits)
-+ ((ARM-MODE-User) (error SI "can't read spsr in user mode"))
-+ ((ARM-MODE-FIQ) (reg h-spsr-fiq))
-+ ((ARM-MODE-IRQ) (reg h-spsr-irq))
-+ ((ARM-MODE-Supervisor) (reg h-spsr-svc))
-+ ((ARM-MODE-Abort) (reg h-spsr-abt))
-+ ((ARM-MODE-Undefined) (reg h-spsr-und))
-+ ((ARM-MODE-System) (error SI "can't read spsr in system mode"))
-+ (else (error SI "can't read spsr, invalid mode"))))
-+ (set (newval)
-+ (case VOID (reg h-mbits)
-+ ((ARM-MODE-User) (error VOID "can't set spsr in user mode"))
-+ ((ARM-MODE-FIQ) (set (reg h-spsr-fiq) newval))
-+ ((ARM-MODE-IRQ) (set (reg h-spsr-irq) newval))
-+ ((ARM-MODE-Supervisor) (set (reg h-spsr-svc) newval))
-+ ((ARM-MODE-Abort) (set (reg h-spsr-abt) newval))
-+ ((ARM-MODE-Undefined) (set (reg h-spsr-und) newval))
-+ ((ARM-MODE-System) (error VOID "can't set spsr in system mode"))
-+ (else (error VOID "can't set spsr, invalid mode"))))
-+)
-+
-+; Explicitly define the shift types so they can be used in semantics
-+; (enums are created for them).
-+
-+(define-keyword
-+ (name shift-type)
-+ (comment "operand 2 shift type")
-+ (prefix "")
-+ (values (lsl 0) (asl 0) (lsr 1) (asr 2) (ror 3))
-+)
-+
-+(define-hardware
-+ (name h-operand2-shifttype)
-+ (comment "operand2 shift type")
-+ (type immediate (UINT 2))
-+ (values extern-keyword shift-type)
-+)
-+
-+; Utility macros for setting the condition codes.
-+
-+(define-pmacro (set-zn-flags result)
-+ (sequence ()
-+ (set zbit (zflag WI result))
-+ (set nbit (nflag WI result)))
-+)
-+
-+; Logical operation flag handling:
-+; cbit is set to the carry out of a shift operation if present
-+; nbit is set to the sign bit
-+; vbit is not affected
-+; zflag is set to indicate whether the result was zero or not
-+
-+(define-pmacro (set-logical-cc result carry-out)
-+ (sequence ()
-+ (set-zn-flags result)
-+ (set cbit carry-out))
-+)
-+
-+(define-pmacro (set-add-flags arg1 arg2 carry)
-+ (sequence ((SI result))
-+ (set result (addc arg1 arg2 carry))
-+ (set-zn-flags result)
-+ (set cbit (add-cflag arg1 arg2 carry))
-+ (set vbit (add-oflag arg1 arg2 carry)))
-+)
-+
-+(define-pmacro (set-sub-flags arg1 arg2 borrow)
-+ (sequence ((SI result))
-+ (set result (subc arg1 arg2 (not borrow)))
-+ (set-zn-flags result)
-+ (set cbit (not (sub-cflag arg1 arg2 (not borrow))))
-+ (set vbit (sub-oflag arg1 arg2 (not borrow))))
-+)
-+
-+; Utility macros for testing the condition codes.
-+
-+(define-pmacro (test-ne) (not zbit))
-+(define-pmacro (test-eq) zbit)
-+(define-pmacro (test-gt) (not (or zbit (xor nbit vbit))))
-+(define-pmacro (test-le) (or zbit (xor nbit vbit)))
-+(define-pmacro (test-ge) (not (xor nbit vbit)))
-+(define-pmacro (test-lt) (xor nbit vbit))
-+(define-pmacro (test-hi) (and cbit (not zbit)))
-+(define-pmacro (test-ls) (or (not cbit) zbit))
-+(define-pmacro (test-cc) (not cbit))
-+(define-pmacro (test-cs) cbit)
-+(define-pmacro (test-pl) (not nbit))
-+(define-pmacro (test-mi) nbit)
-+(define-pmacro (test-vc) (not vbit))
-+(define-pmacro (test-vs) vbit)
-+
-+(if (keep-isa? (arm))
-+ (include "arm7.cpu"))
-+(if (keep-isa? (thumb))
-+ (include "thumb.cpu"))
-diff -Nur binutils-2.24.orig/cgen/cpu/arm.sim binutils-2.24/cgen/cpu/arm.sim
---- binutils-2.24.orig/cgen/cpu/arm.sim 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/arm.sim 2016-06-30 21:26:12.605891245 +0200
-@@ -0,0 +1,39 @@
-+; ARM CPU simulator support. -*- Scheme -*-
-+; Copyright (C) 2000 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; N.B.
-+; - The format of this file is *extremely* wip!
-+; - This isn't intended to be simulator independent, it is an application
-+; specific file and not all simulator apps are equivalent.
-+; - This file is loaded after all the .cpu files are loaded.
-+
-+; ??? The application (e.g. simulator) may wish to do further processing when
-+; the tbit is set. For a C++ simulator what one would want to do is override
-+; the "set" method. That presumes there's a "set" method to override and
-+; that all affected code uses it. There are several to accomplish this.
-+; The first way to accomplish this is to have all code always
-+; access hardware elements through their get/set methods. Perhaps ok,
-+; but also maybe overkill. The second is to specify those that use get/set
-+; methods. One could do this for elements that have get/set specs, but this
-+; requires the .cpu file to get it right (and to change when it isn't).
-+; A variant of the second is to move this info to an application specific
-+; file (much like what .opc files are although even they have the problem of
-+; requiring collaboration with the .cpu file. -- to be fixed!).
-+; The solution taken here is the latter.
-+
-+; The h-tbit and h-mbits registers need extra processing when they are set.
-+; This is done by specifying the FUN-SET attribute, which causes all machine
-+; generated references to go through the `set' access method.
-+; Oh no, not FUN-ACCESS again! :-)
-+
-+(modify-hardware
-+ (name h-tbit)
-+ (add-attrs FUN-SET)
-+)
-+
-+(modify-hardware
-+ (name h-mbits)
-+ (add-attrs FUN-SET)
-+)
-diff -Nur binutils-2.24.orig/cgen/cpu/ChangeLog binutils-2.24/cgen/cpu/ChangeLog
---- binutils-2.24.orig/cgen/cpu/ChangeLog 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/ChangeLog 2016-06-30 21:26:12.605891245 +0200
-@@ -0,0 +1,550 @@
-+2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
-+ Anil Paranjape <anilp1@kpitcummins.com>
-+ Shilin Shakti <shilins@kpitcummins.com>
-+
-+ * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
-+ description.
-+ * xc16x.opc: New file containing supporting XC16C routines.
-+
-+2006-02-10 Nick Clifton <nickc@redhat.com>
-+
-+ * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
-+
-+2006-01-06 DJ Delorie <dj@redhat.com>
-+
-+ * m32c.cpu (mov.w:q): Fix mode.
-+ (push32.b.imm): Likewise, for the comment.
-+
-+2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
-+
-+ Second part of ms1 to mt renaming.
-+ * mt.cpu (define-arch, define-isa): Set name to mt.
-+ (define-mach): Adjust.
-+ * mt.opc (CGEN_ASM_HASH): Update.
-+ (mt_asm_hash, mt_cgen_insn_supported): Renamed.
-+ (parse_loopsize, parse_imm16): Adjust.
-+
-+2005-12-13 DJ Delorie <dj@redhat.com>
-+
-+ * m32c.cpu (jsri): Fix order so register names aren't treated as
-+ symbols.
-+ (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
-+ indexwd, indexws): Fix encodings.
-+
-+2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
-+
-+ * mt.cpu: Rename from ms1.cpu.
-+ * mt.opc: Rename from ms1.opc.
-+
-+2005-12-06 Hans-Peter Nilsson <hp@axis.com>
-+
-+ * cris.cpu (simplecris-common-writable-specregs)
-+ (simplecris-common-readable-specregs): Split from
-+ simplecris-common-specregs. All users changed.
-+ (cris-implemented-writable-specregs-v0)
-+ (cris-implemented-readable-specregs-v0): Similar from
-+ cris-implemented-specregs-v0.
-+ (cris-implemented-writable-specregs-v3)
-+ (cris-implemented-readable-specregs-v3)
-+ (cris-implemented-writable-specregs-v8)
-+ (cris-implemented-readable-specregs-v8)
-+ (cris-implemented-writable-specregs-v10)
-+ (cris-implemented-readable-specregs-v10)
-+ (cris-implemented-writable-specregs-v32)
-+ (cris-implemented-readable-specregs-v32): Similar.
-+ (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
-+ insns and specializations.
-+
-+2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
-+
-+ Add ms2
-+ * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
-+ model.
-+ (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
-+ f-cb2incr, f-rc3): New fields.
-+ (LOOP): New instruction.
-+ (JAL-HAZARD): New hazard.
-+ (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
-+ New operands.
-+ (mul, muli, dbnz, iflush): Enable for ms2
-+ (jal, reti): Has JAL-HAZARD.
-+ (ldctxt, ldfb, stfb): Only ms1.
-+ (fbcb): Only ms1,ms1-003.
-+ (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
-+ fbcbincrs, mfbcbincrs): Enable for ms2.
-+ (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
-+ * ms1.opc (parse_loopsize): New.
-+ (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
-+ (print_pcrel): New.
-+
-+2005-10-28 Dave Brolley <brolley@redhat.com>
-+
-+ Contribute the following change:
-+ 2003-09-24 Dave Brolley <brolley@redhat.com>
-+
-+ * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
-+ CGEN_ATTR_VALUE_TYPE.
-+ * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
-+ Use cgen_bitset_intersect_p.
-+
-+2005-10-27 DJ Delorie <dj@redhat.com>
-+
-+ * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
-+ (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
-+ arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
-+ imm operand is needed.
-+ (adjnz, sbjnz): Pass the right operands.
-+ (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
-+ unary-insn): Add -g variants for opcodes that need to support :G.
-+ (not.BW:G, push.BW:G): Call it.
-+ (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
-+ stzx16-imm8-imm8-abs16): Fix operand typos.
-+ * m32c.opc (m32c_asm_hash): Support bnCND.
-+ (parse_signed4n, print_signed4n): New.
-+
-+2005-10-26 DJ Delorie <dj@redhat.com>
-+
-+ * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
-+ (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
-+ mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
-+ dsp8[sp] is signed.
-+ (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
-+ (mov.BW:S r0,r1): Fix typo r1l->r1.
-+ (tst): Allow :G suffix.
-+ * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
-+
-+2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
-+
-+ * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
-+
-+2005-10-25 DJ Delorie <dj@redhat.com>
-+
-+ * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
-+ making one a macro of the other.
-+
-+2005-10-21 DJ Delorie <dj@redhat.com>
-+
-+ * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
-+ (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
-+ indexld, indexls): .w variants have `1' bit.
-+ (rot32.b): QI, not SI.
-+ (rot32.w): HI, not SI.
-+ (xchg16): HI for .w variant.
-+
-+2005-10-19 Nick Clifton <nickc@redhat.com>
-+
-+ * m32r.opc (parse_slo16): Fix bad application of previous patch.
-+
-+2005-10-18 Andreas Schwab <schwab@suse.de>
-+
-+ * m32r.opc (parse_slo16): Better version of previous patch.
-+
-+2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
-+
-+ * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
-+ size.
-+
-+2005-07-25 DJ Delorie <dj@redhat.com>
-+
-+ * m32c.opc (parse_unsigned8): Add %dsp8().
-+ (parse_signed8): Add %hi8().
-+ (parse_unsigned16): Add %dsp16().
-+ (parse_signed16): Add %lo16() and %hi16().
-+ (parse_lab_5_3): Make valuep a bfd_vma *.
-+
-+2005-07-18 Nick Clifton <nickc@redhat.com>
-+
-+ * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
-+ components.
-+ (f-lab32-jmp-s): Fix insertion sequence.
-+ (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
-+ (Dsp-40-s8): Make parameter be signed.
-+ (Dsp-40-s16): Likewise.
-+ (Dsp-48-s8): Likewise.
-+ (Dsp-48-s16): Likewise.
-+ (Imm-13-u3): Likewise. (Despite its name!)
-+ (BitBase16-16-s8): Make the parameter be unsigned.
-+ (BitBase16-8-u11-S): Likewise.
-+ (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
-+ jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
-+ relaxation.
-+
-+ * m32c.opc: Fix formatting.
-+ Use safe-ctype.h instead of ctype.h
-+ Move duplicated code sequences into a macro.
-+ Fix compile time warnings about signedness mismatches.
-+ Remove dead code.
-+ (parse_lab_5_3): New parser function.
-+
-+2005-07-16 Jim Blandy <jimb@redhat.com>
-+
-+ * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
-+ to represent isa sets.
-+
-+2005-07-15 Jim Blandy <jimb@redhat.com>
-+
-+ * m32c.cpu, m32c.opc: Fix copyright.
-+
-+2005-07-14 Jim Blandy <jimb@redhat.com>
-+
-+ * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
-+
-+2005-07-14 Alan Modra <amodra@bigpond.net.au>
-+
-+ * ms1.opc (print_dollarhex): Correct format string.
-+
-+2005-07-06 Alan Modra <amodra@bigpond.net.au>
-+
-+ * iq2000.cpu: Include from binutils cpu dir.
-+
-+2005-07-05 Nick Clifton <nickc@redhat.com>
-+
-+ * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
-+ unsigned in order to avoid compile time warnings about sign
-+ conflicts.
-+
-+ * ms1.opc (parse_*): Likewise.
-+ (parse_imm16): Use a "void *" as it is passed both signed and
-+ unsigned arguments.
-+
-+2005-07-01 Nick Clifton <nickc@redhat.com>
-+
-+ * frv.opc: Update to ISO C90 function declaration style.
-+ * iq2000.opc: Likewise.
-+ * m32r.opc: Likewise.
-+ * sh.opc: Likewise.
-+
-+2005-06-15 Dave Brolley <brolley@redhat.com>
-+
-+ Contributed by Red Hat.
-+ * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
-+ * ms1.opc: New file. Written by Stan Cox.
-+
-+2005-05-10 Nick Clifton <nickc@redhat.com>
-+
-+ * Update the address and phone number of the FSF organization in
-+ the GPL notices in the following files:
-+ cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
-+ m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
-+ sh64-media.cpu, simplify.inc
-+
-+2005-02-24 Alan Modra <amodra@bigpond.net.au>
-+
-+ * frv.opc (parse_A): Warning fix.
-+
-+2005-02-23 Nick Clifton <nickc@redhat.com>
-+
-+ * frv.opc: Fixed compile time warnings about differing signed'ness
-+ of pointers passed to functions.
-+ * m32r.opc: Likewise.
-+
-+2005-02-11 Nick Clifton <nickc@redhat.com>
-+
-+ * iq2000.opc (parse_jtargq10): Change type of valuep argument to
-+ 'bfd_vma *' in order avoid compile time warning message.
-+
-+2005-01-28 Hans-Peter Nilsson <hp@axis.com>
-+
-+ * cris.cpu (mstep): Add missing insn.
-+
-+2005-01-25 Alexandre Oliva <aoliva@redhat.com>
-+
-+ 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
-+ * frv.cpu: Add support for TLS annotations in loads and calll.
-+ * frv.opc (parse_symbolic_address): New.
-+ (parse_ldd_annotation): New.
-+ (parse_call_annotation): New.
-+ (parse_ld_annotation): New.
-+ (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
-+ Introduce TLS relocations.
-+ (parse_d12, parse_s12, parse_u12): Likewise.
-+ (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
-+ (parse_call_label, print_at): New.
-+
-+2004-12-21 Mikael Starvik <starvik@axis.com>
-+
-+ * cris.cpu (cris-set-mem): Correct integral write semantics.
-+
-+2004-11-29 Hans-Peter Nilsson <hp@axis.com>
-+
-+ * cris.cpu: New file.
-+
-+2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
-+
-+ * iq2000.cpu: Added quotes around macro arguments so that they
-+ will work with newer versions of guile.
-+
-+2004-10-27 Nick Clifton <nickc@redhat.com>
-+
-+ * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
-+ wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
-+ operand.
-+ * iq2000.cpu (dnop index): Rename to _index to avoid complications
-+ with guile.
-+
-+2004-08-27 Richard Sandiford <rsandifo@redhat.com>
-+
-+ * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
-+
-+2004-05-15 Nick Clifton <nickc@redhat.com>
-+
-+ * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
-+
-+2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
-+
-+ * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
-+
-+2004-03-01 Richard Sandiford <rsandifo@redhat.com>
-+
-+ * frv.cpu (define-arch frv): Add fr450 mach.
-+ (define-mach fr450): New.
-+ (define-model fr450): New. Add profile units to every fr450 insn.
-+ (define-attr UNIT): Add MDCUTSSI.
-+ (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
-+ (define-attr AUDIO): New boolean.
-+ (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
-+ (f-LRA-null, f-TLBPR-null): New fields.
-+ (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
-+ (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
-+ (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
-+ (LRA-null, TLBPR-null): New macros.
-+ (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
-+ (load-real-address): New macro.
-+ (lrai, lrad, tlbpr): New instructions.
-+ (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
-+ (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
-+ (mdcutssi): Change UNIT attribute to MDCUTSSI.
-+ (media-low-clear-semantics, media-scope-limit-semantics)
-+ (media-quad-limit, media-quad-shift): New macros.
-+ (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
-+ * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
-+ (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
-+ (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
-+ (fr450_unit_mapping): New array.
-+ (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
-+ for new MDCUTSSI unit.
-+ (fr450_check_insn_major_constraints): New function.
-+ (check_insn_major_constraints): Use it.
-+
-+2004-03-01 Richard Sandiford <rsandifo@redhat.com>
-+
-+ * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
-+ (scutss): Change unit to I0.
-+ (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
-+ (mqsaths): Fix FR400-MAJOR categorization.
-+ (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
-+ (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
-+ * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
-+ combinations.
-+
-+2004-03-01 Richard Sandiford <rsandifo@redhat.com>
-+
-+ * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
-+ (rstb, rsth, rst, rstd, rstq): Delete.
-+ (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
-+
-+2004-02-23 Nick Clifton <nickc@redhat.com>
-+
-+ * Apply these patches from Renesas:
-+
-+ 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
-+
-+ * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
-+ disassembling codes for 0x*2 addresses.
-+
-+ 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
-+
-+ * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
-+
-+ 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
-+
-+ * cpu/m32r.cpu : Add new model m32r2.
-+ Add new instructions.
-+ Replace occurrances of 'Mitsubishi' with 'Renesas'.
-+ Changed PIPE attr of push from O to OS.
-+ Care for Little-endian of M32R.
-+ * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
-+ Care for Little-endian of M32R.
-+ (parse_slo16): signed extension for value.
-+
-+2004-02-20 Andrew Cagney <cagney@redhat.com>
-+
-+ * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
-+ Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
-+
-+ * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
-+ written by Ben Elliston.
-+
-+2004-01-14 Richard Sandiford <rsandifo@redhat.com>
-+
-+ * frv.cpu (UNIT): Add IACC.
-+ (iacc-multiply-r-r): Use it.
-+ * frv.opc (fr400_unit_mapping): Add entry for IACC.
-+ (fr500_unit_mapping, fr550_unit_mapping): Likewise.
-+
-+2004-01-06 Alexandre Oliva <aoliva@redhat.com>
-+
-+ 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
-+ * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
-+ cut&paste errors in shifting/truncating numerical operands.
-+ 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
-+ * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
-+ (parse_uslo16): Likewise.
-+ (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
-+ (parse_d12): Parse gotoff12 and gotofffuncdesc12.
-+ (parse_s12): Likewise.
-+ 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
-+ * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
-+ (parse_uslo16): Likewise.
-+ (parse_uhi16): Parse gothi and gotfuncdeschi.
-+ (parse_d12): Parse got12 and gotfuncdesc12.
-+ (parse_s12): Likewise.
-+
-+2003-10-10 Dave Brolley <brolley@redhat.com>
-+
-+ * frv.cpu (dnpmop): New p-macro.
-+ (GRdoublek): Use dnpmop.
-+ (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
-+ (store-double-r-r): Use (.sym regtype doublek).
-+ (r-store-double): Ditto.
-+ (store-double-r-r-u): Ditto.
-+ (conditional-store-double): Ditto.
-+ (conditional-store-double-u): Ditto.
-+ (store-double-r-simm): Ditto.
-+ (fmovs): Assign to UNIT FMALL.
-+
-+2003-10-06 Dave Brolley <brolley@redhat.com>
-+
-+ * frv.cpu, frv.opc: Add support for fr550.
-+
-+2003-09-24 Dave Brolley <brolley@redhat.com>
-+
-+ * frv.cpu (u-commit): New modelling unit for fr500.
-+ (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
-+ (commit-r): Use u-commit model for fr500.
-+ (commit): Ditto.
-+ (conditional-float-binary-op): Take profiling data as an argument.
-+ Update callers.
-+ (ne-float-binary-op): Ditto.
-+
-+2003-09-19 Michael Snyder <msnyder@redhat.com>
-+
-+ * frv.cpu (nldqi): Delete unimplemented instruction.
-+
-+2003-09-12 Dave Brolley <brolley@redhat.com>
-+
-+ * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
-+ (clear-ne-flag-r): Pass insn profiling in as an argument. Call
-+ frv_ref_SI to get input register referenced for profiling.
-+ (clear-ne-flag-all): Pass insn profiling in as an argument.
-+ (clrgr,clrfr,clrga,clrfa): Add profiling information.
-+
-+2003-09-11 Michael Snyder <msnyder@redhat.com>
-+
-+ * frv.cpu: Typographical corrections.
-+
-+2003-09-09 Dave Brolley <brolley@redhat.com>
-+
-+ * frv.cpu (media-dual-complex): Change UNIT to FMALL.
-+ (conditional-media-dual-complex, media-quad-complex): Likewise.
-+
-+2003-09-04 Dave Brolley <brolley@redhat.com>
-+
-+ * frv.cpu (register-transfer): Pass in all attributes in on argument.
-+ Update all callers.
-+ (conditional-register-transfer): Ditto.
-+ (cache-preload): Ditto.
-+ (floating-point-conversion): Ditto.
-+ (floating-point-neg): Ditto.
-+ (float-abs): Ditto.
-+ (float-binary-op-s): Ditto.
-+ (conditional-float-binary-op): Ditto.
-+ (ne-float-binary-op): Ditto.
-+ (float-dual-arith): Ditto.
-+ (ne-float-dual-arith): Ditto.
-+
-+2003-09-03 Dave Brolley <brolley@redhat.com>
-+
-+ * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
-+ * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
-+ MCLRACC-1.
-+ (A): Removed operand.
-+ (A0,A1): New operands replace operand A.
-+ (mnop): Now a real insn
-+ (mclracc): Removed insn.
-+ (mclracc-0, mclracc-1): New insns replace mclracc.
-+ (all insns): Use new UNIT attributes.
-+
-+2003-08-21 Nick Clifton <nickc@redhat.com>
-+
-+ * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
-+ and u-media-dual-btoh with output parameter.
-+ (cmbtoh): Add profiling hack.
-+
-+2003-08-19 Michael Snyder <msnyder@redhat.com>
-+
-+ * frv.cpu: Fix typo, Frintkeven -> FRintkeven
-+
-+2003-06-10 Doug Evans <dje@sebabeach.org>
-+
-+ * frv.cpu: Add IDOC attribute.
-+
-+2003-06-06 Andrew Cagney <cagney@redhat.com>
-+
-+ Contributed by Red Hat.
-+ * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
-+ Stan Cox, and Frank Ch. Eigler.
-+ * iq2000.opc: New file. Written by Ben Elliston, Frank
-+ Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
-+ * iq2000m.cpu: New file. Written by Jeff Johnston.
-+ * iq10.cpu: New file. Written by Jeff Johnston.
-+
-+2003-06-05 Nick Clifton <nickc@redhat.com>
-+
-+ * frv.cpu (FRintieven): New operand. An even-numbered only
-+ version of the FRinti operand.
-+ (FRintjeven): Likewise for FRintj.
-+ (FRintkeven): Likewise for FRintk.
-+ (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
-+ media-quad-arith-sat-semantics, media-quad-arith-sat,
-+ conditional-media-quad-arith-sat, mdunpackh,
-+ media-quad-multiply-semantics, media-quad-multiply,
-+ conditional-media-quad-multiply, media-quad-complex-i,
-+ media-quad-multiply-acc-semantics, media-quad-multiply-acc,
-+ conditional-media-quad-multiply-acc, munpackh,
-+ media-quad-multiply-cross-acc-semantics, mdpackh,
-+ media-quad-multiply-cross-acc, mbtoh-semantics,
-+ media-quad-cross-multiply-cross-acc-semantics,
-+ media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
-+ media-quad-cross-multiply-acc-semantics, cmbtoh,
-+ media-quad-cross-multiply-acc, media-quad-complex, mhtob,
-+ media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
-+ cmhtob): Use new operands.
-+ * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
-+ (parse_even_register): New function.
-+
-+2003-06-03 Nick Clifton <nickc@redhat.com>
-+
-+ * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
-+ immediate value not unsigned.
-+
-+2003-06-03 Andrew Cagney <cagney@redhat.com>
-+
-+ Contributed by Red Hat.
-+ * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
-+ and Eric Christopher.
-+ * frv.opc: New file. Written by Catherine Moore, and Dave
-+ Brolley.
-+ * simplify.inc: New file. Written by Doug Evans.
-+
-+2003-05-02 Andrew Cagney <cagney@redhat.com>
-+
-+ * New file.
-+
-+
-+Local Variables:
-+mode: change-log
-+left-margin: 8
-+fill-column: 74
-+version-control: never
-+End:
-diff -Nur binutils-2.24.orig/cgen/cpu/cris.cpu binutils-2.24/cgen/cpu/cris.cpu
---- binutils-2.24.orig/cgen/cpu/cris.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/cris.cpu 2016-06-30 21:26:12.609891400 +0200
-@@ -0,0 +1,4550 @@
-+; CRIS CPU description. -*- Scheme -*-
-+;
-+; Copyright 2003, 2004 Free Software Foundation, Inc.
-+;
-+; Contributed by Axis Communications AB.
-+;
-+; This file is part of the GNU Binutils.
-+;
-+; This program is free software; you can redistribute it and/or modify
-+; it under the terms of the GNU General Public License as published by
-+; the Free Software Foundation; either version 2 of the License, or
-+; (at your option) any later version.
-+;
-+; This program is distributed in the hope that it will be useful,
-+; but WITHOUT ANY WARRANTY; without even the implied warranty of
-+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+; GNU General Public License for more details.
-+;
-+; You should have received a copy of the GNU General Public License
-+; along with this program; if not, write to the Free Software
-+; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
-+
-+(include "simplify.inc")
-+
-+;;;;;;;;;;;;;;;;;; -pmacro (generic ones)
-+
-+(define-pmacro (.car2 l) (.apply (.pmacro (a b) a) l))
-+(define-pmacro (.cadr2 l) (.apply (.pmacro (a b) b) l))
-+(define-pmacro (SI-ext x) "How to sign-extend a dword to dword (a nop)" x)
-+(define-pmacro (HI-ext x) "How to sign-extend a word to dword" (ext SI x))
-+(define-pmacro (QI-ext x) "How to sign-extend a byte to dword" (ext SI x))
-+(define-pmacro (SI-zext x) "How to zero-extend a dword to dword (a nop)" x)
-+(define-pmacro (HI-zext x) "How to zero-extend a word to dword" (zext SI x))
-+(define-pmacro (QI-zext x) "How to zero-extend a byte to dword" (zext SI x))
-+(define-pmacro
-+ (define-pmacro-map x)
-+ "On a list ((x0 y0) .. (xN yN)), 0 <= m <= N, (define-pmacro xm ym)"
-+ (.splice
-+ begin
-+ (.unsplice
-+ (.map
-+ (.pmacro (l) (.apply (.pmacro (xm ym) (define-pmacro xm ym)) l)) x)))
-+)
-+
-+;;;;;;;;;;;;;;;;;; -arch -isa -cpu -model
-+
-+(define-arch
-+ (name cris)
-+ (comment "Axis Communications CRIS")
-+ (default-alignment unaligned)
-+ (insn-lsb0? #t)
-+ (machs crisv0 crisv3 crisv8 crisv10 crisv32)
-+ (isas cris)
-+)
-+
-+(define-isa
-+ (name cris)
-+ (base-insn-bitsize 16)
-+ (liw-insns 1)
-+ (parallel-insns 1)
-+)
-+
-+(define-pmacro
-+ (define-cpu-cris x-suffix x-comment)
-+ "Define a CRIS CPU family"
-+ (define-cpu
-+ (name (.sym cris x-suffix f))
-+ (comment x-comment)
-+ (endian little)
-+ ; CGEN-FIXME: Should be deduced from the default?
-+ (word-bitsize 32)
-+ (file-transform (.str x-suffix))
-+ )
-+)
-+
-+; Useful when there's a need to iterate over all models.
-+(define-pmacro (cris-cpu-model-numbers)
-+ "List of CRIS CPU model numbers (version register contents)"
-+ (0 3 8 10 32)
-+)
-+
-+(define-pmacro (cris-cpu-models)
-+ "List of CRIS CPU model names"
-+ (.map (.pmacro (n) (.sym v n)) (cris-cpu-model-numbers))
-+)
-+
-+; Mapping from model name to number.
-+(define-pmacro-map
-+ (.map (.pmacro (n) ((.sym v n -number) n))
-+ (cris-cpu-model-numbers)))
-+
-+; FIXME: Rationalize these rules.
-+; CPU names must be distinct from the architecture name and machine names.
-+; The "b" suffix stands for "base" and is the convention.
-+; The "f" suffix stands for "family" and is the convention.
-+; We ignore the "b" convention, partly because v0 isn't really a "base", at
-+; least not for some aspects of v32.
-+(define-cpu-cris v0 "CRIS base family")
-+(define-cpu-cris v3 "CRIS v3 family")
-+(define-cpu-cris v8 "CRIS v8 family")
-+(define-cpu-cris v10 "CRIS v10 family")
-+(define-cpu-cris v32 "CRIS v32 family")
-+
-+(define-pmacro MACH-PRE-V32 (MACH crisv0,crisv3,crisv8,crisv10))
-+(define-pmacro MACH-V3-UP (MACH crisv3,crisv8,crisv10,crisv32))
-+(define-pmacro MACH-V32 (MACH crisv32))
-+(define-pmacro MACH-PC MACH-PRE-V32)
-+(define-pmacro MACH-ACR MACH-V32)
-+(define-pmacro MACH-BRANCH-OFFSET-AT-INSN MACH-V32)
-+(define-pmacro MACH-BRANCH-OFFSET-AFTER-INSN MACH-PRE-V32)
-+
-+(define-pmacro
-+ current-mach-is-v32
-+ "Whether the generated code is for V32. See comment at h-v32."
-+ (reg h-v32)
-+)
-+
-+(define-pmacro (define-mach-cris x-suffix x-comment x-name)
-+ "Define a CRIS mach"
-+ (define-mach
-+ (name (.sym cris x-suffix))
-+ ; They're all called "cris" in bfd. Watch out for breakages for some
-+ ; uses.
-+ (bfd-name x-name)
-+ (comment x-comment)
-+ (cpu (.sym cris x-suffix f)))
-+)
-+
-+(define-mach-cris v0 "Generic CRIS v0 CPU, ETRAX 1 .. 3" "cris")
-+(define-mach-cris v3 "Generic CRIS v3 CPU, ETRAX 4" "cris")
-+(define-mach-cris v8 "Generic CRIS v8 CPU, ETRAX 100" "cris")
-+(define-mach-cris v10 "Generic CRIS v10 CPU, ETRAX 100 LX" "cris")
-+(define-mach-cris v32 "Generic CRIS v32 CPU, ETRAX FS" "crisv32")
-+
-+(define-pmacro (define-model-simplecris x-name x-comment)
-+ "Define a simple CRIS model"
-+ (define-model
-+ (name (.sym cris x-name))
-+ (comment x-comment)
-+ (mach (.sym cris x-name))
-+
-+ (unit u-exec "Execution Unit" () 1 1 () () () ())
-+ (unit u-mem "Memory Unit" () 1 1 () () () ())
-+
-+ (unit u-const16 "Fetch 16-bit operand" () 1 1 () () () ())
-+ (unit u-const32 "Fetch 32-bit operand" () 1 1
-+ () () () ())
-+ ; Used in special-case insn, for example arithmetic with PC destination.
-+ (unit u-stall "Stall unit" () 1 1 () () () ())
-+ (unit u-skip4 "Skip 4 bytes" () 1 1 () () () ())
-+ (unit u-multiply "Multiply Unit" () 1 1 ((MACH crisv10)) () () ())
-+ (unit u-movem "Movem Unit" () 1 1 ()
-+ ((Rd INT -1))
-+ () ()))
-+)
-+
-+(define-model-simplecris v0 "Model of CRIS v0, ETRAX 1 .. 3")
-+(define-model-simplecris v3 "Model of CRIS v3, ETRAX 4")
-+(define-model-simplecris v8 "Model of CRIS v8, ETRAX 100")
-+(define-model-simplecris v10 "Model of CRIS v10, ETRAX 100 LX")
-+
-+; For some reason, we get an error:
-+; Generating arch.h ...
-+; ERROR: In procedure vector-ref:
-+; ERROR: Wrong type argument in position 1: ()
-+; if we include timings for machs that we don't generate sims for.
-+; Last checked: CVS as of 2004-11-18.
-+; CGEN-FIXME: Looks like another CGEN bug. When it's fixed (or when
-+; generating sims for v0, v3 or v8), add 0, 3 and 8 to
-+; simplecris-timing-models. But before that, simplecris-timing-x has to
-+; be rewritten to work on a multiple-element-list, not assume a single
-+; element. (A change which seems likely to depend on lexical scoping for
-+; macros to be introduced: try the obvious implementation.)
-+(define-pmacro simplecris-timing-models (10))
-+(define-pmacro (simplecris-common-timing x-units)
-+ "Make timing models, using x-units for all simplecris-timing-models"
-+ ; CGEN-FIXME: Another CGEN bug: the part (.unsplice (10)) will remain
-+ ; unexpanded in (.sym crisv (.unsplice (10)) if we write this as
-+ ; ((.splice (.sym crisv (.unsplice simplecris-timing-models))
-+ ; (.unsplice x-units)))
-+ ((.splice (.sym crisv (.apply (.pmacro (x) x) simplecris-timing-models))
-+ (.unsplice x-units)))
-+)
-+
-+(define-pmacro-map
-+ (
-+ ; Timing for memory instructions running on a simple cris model.
-+ ((simplecris-mem-timing) (simplecris-common-timing
-+ ((unit u-mem) (unit u-exec))))
-+ ; Timing for movem instructions running on a simple cris model.
-+ ((simplecris-movem-timing) (simplecris-common-timing
-+ ((unit u-movem) (unit u-exec))))
-+ ; Similar, for an 8- or 16-bit constant ([PC+]) operand.
-+ ((simplecris-const-timing-HI)
-+ (simplecris-common-timing
-+ ((unit u-const16) (unit u-exec))))
-+ ; Similar, for a 32-bit constant ([PC+]) operand.
-+ ((simplecris-const-timing-SI)
-+ (simplecris-common-timing
-+ ((unit u-const32) (unit u-exec))))
-+ ; Similar, no particular operand.
-+ ((simplecris-timing) (simplecris-common-timing
-+ ((unit u-exec)))))
-+)
-+
-+(define-model
-+ (name crisv32)
-+ (comment "Model of CRISv32")
-+ (mach crisv32)
-+
-+ (state
-+ ; Bitmask of h-gr register (0..15) and h-sr register (17..31)
-+ ; modified by 3rd previous insn, updated by the u-exec unit.
-+ ; Because there's no need to mark writes to special registers BZ and
-+ ; WZ, bit 16 is for jump mark and bit 20 for memory-write mark.
-+ (prev-prev-prev-modf-regs UINT)
-+
-+ ; Ditto for the 2nd previous insn.
-+ (prev-prev-modf-regs UINT)
-+
-+ ; Ditto for the previous insn.
-+ (prev-modf-regs UINT)
-+
-+ ; Bit-mask for regs modified by the current insn, propagated to
-+ ; prev-modf-regs.
-+ (modf-regs UINT)
-+
-+ ; Registers loaded by movem are not forwarded to the execution
-+ ; stage, so we need to insert stall-cycles for ordinary insns
-+ ; accessing such registers. In addition to the *modf-regs
-+ ; above, these are set to tell *ordinary* insns which registers
-+ ; are inaccessible.
-+
-+ (prev-prev-prev-movem-dest-regs UINT)
-+
-+ ; Ditto for the 2nd previous insn.
-+ (prev-prev-movem-dest-regs UINT)
-+
-+ ; Ditto for the previous insn.
-+ (prev-movem-dest-regs UINT)
-+
-+ ; Bit-mask for regs modified by the current insn, propagated to
-+ ; prev-movem-dest-regs.
-+ (movem-dest-regs UINT))
-+
-+ ; It seems this pipeline description isn't used at all; this is just
-+ ; for show.
-+ ; Noteworthy is the placement of the memory stage before the execute stage.
-+ (pipeline all "" () ((fetch) (decode) (memory) (execute) (writeback)))
-+
-+ ; Units that contribute only a constant pipeline delay are not included.
-+ (unit u-mem "Memory Unit" () 1 1 ()
-+ ((Rs INT -1))
-+ () ())
-+
-+ ; Artificial units for read/write-related hazard accounting.
-+ (unit u-mem-r "Memory Unit Read" () 1 1 () () () ())
-+ (unit u-mem-w "Memory Unit Write" () 1 1 () () () ())
-+
-+ (unit u-movem-rtom "Movem-to-memory Unit" () 1 1 ()
-+ ((Rs INT -1) (Rd INT -1))
-+ () ())
-+ (unit u-movem-mtor "Movem-to-register Unit" () 1 1 ()
-+ ((Rs INT -1) (Rd INT -1))
-+ () ())
-+ (unit u-multiply "Multiply Unit" () 1 1 ()
-+ ((Rs INT -1) (Rd INT -1))
-+ () ())
-+ (unit u-branch "Branch Unit" () 1 1 ()
-+ ()
-+ () ())
-+ (unit u-jump-r "Jump-to-register Unit" () 1 1 ()
-+ ((Rs INT -1))
-+ () ())
-+ (unit u-jump-sr "Jump-to-special-register Unit" () 1 1 ()
-+ ((Ps INT -1))
-+ () ())
-+ (unit u-jump "JAS/BAS Unit, saving PC" () 1 1 ()
-+ ()
-+ ((Pd INT -1)) ())
-+
-+ ; To keep track of PC; not really functional units.
-+ (unit u-const16 "Fetch 16-bit operand" () 1 1 () () () ())
-+ (unit u-const32 "Fetch 32-bit operand" () 1 1 () () () ())
-+ (unit u-skip4 "Skip 4 bytes" () 1 1 () () () ())
-+
-+ ; For v32, we need to keep track of inputs (for movem destination
-+ ; cycle penalties) and output (for e.g. memory source and jump
-+ ; source cycle penalties).
-+ (unit u-exec "Execution Unit" () 1 1 ()
-+ ((Rd INT -1) (Rs INT -1))
-+ ((Rd INT -1))
-+ ())
-+
-+ ; Special case of u-exec for movem: don't treat Rd as an incoming
-+ ; parameter.
-+ (unit u-exec-movem "Execution Unit" () 1 1 ()
-+ ((Rs INT -1))
-+ ((Rd INT -1))
-+ ())
-+
-+ ; Special case of u-exec when the destination is a special
-+ ; register.
-+ (unit u-exec-to-sr "Execution Unit" () 1 1 ()
-+ ((Rs INT -1))
-+ ((Pd INT -1)) ())
-+)
-+
-+(define-pmacro (crisv32-timing-destreg d)
-+ "Timing for instructions running on a crisv32 model"
-+ ((crisv32
-+ (.splice unit u-exec (.unsplice d))))
-+)
-+(define-pmacro (crisv32-timing) (crisv32-timing-destreg ()))
-+
-+(define-pmacro (cris-timing-Rd-sfield)
-+ (crisv32-timing-destreg ((out Rd Rd-sfield)))
-+)
-+
-+(define-pmacro (crisv32-timing-c-HI)
-+ ((crisv32 (unit u-const16) (unit u-exec)))
-+)
-+
-+(define-pmacro-map
-+ ((crisv32-timing-c-QI crisv32-timing-c-HI)
-+ ((crisv32-timing-c-SI) ((crisv32 (unit u-const32) (unit u-exec))))
-+ ((crisv32-timing-c-sr-SI) ((crisv32 (unit u-const32) (unit u-exec-to-sr))))
-+ ((crisv32-reg-sr-timing) ((crisv32 (unit u-exec-to-sr))))
-+ ((crisv32-mem-sr-timing)
-+ ((crisv32 (unit u-mem) (unit u-mem-r) (unit u-exec-to-sr))))
-+ ((crisv32-mem-timing) ((crisv32 (unit u-mem) (unit u-mem-r) (unit u-exec))))
-+ ((crisv32-mem-write-timing) ((crisv32 (unit u-mem) (unit u-exec) (unit u-mem-w)))))
-+)
-+
-+(define-pmacro-map
-+ (
-+ ; Timing for instructions using memory operands.
-+ ((cris-mem-timing) (.splice (.unsplice (simplecris-mem-timing))
-+ (.unsplice (crisv32-mem-timing))))
-+ ; Timing for instructions using memory operands.
-+ ((cris-mem-write-timing) (.splice
-+ (.unsplice (simplecris-mem-timing))
-+ (.unsplice (crisv32-mem-write-timing))))
-+ ; Timing for moves from general register to special register.
-+ ((cris-reg-sr-timing) (.splice (.unsplice (simplecris-timing))
-+ (.unsplice (crisv32-reg-sr-timing))))
-+ ; Timing for moves from memory to special register.
-+ ((cris-mem-sr-timing) (.splice (.unsplice (simplecris-mem-timing))
-+ (.unsplice (crisv32-mem-sr-timing))))
-+ ; Timing for non-mul, non-memory, non-special-register, 16-bit instructions.
-+ ((cris-timing) (.splice (.unsplice (simplecris-timing))
-+ (.unsplice (crisv32-timing))))
-+ ; Timing for instructions with 8- or 16-bit constant operand ([PC+]).
-+ ((cris-timing-const-HI) (.splice
-+ (.unsplice (simplecris-const-timing-HI))
-+ (.unsplice (crisv32-timing-c-HI))))
-+ ; Timing for instructions with a 32-bit constant operand ([PC+]).
-+ ((cris-timing-const-SI) (.splice
-+ (.unsplice (simplecris-const-timing-SI))
-+ (.unsplice (crisv32-timing-c-SI))))
-+ ; Like cris-timing-const-SI, but destination special register.
-+ ((cris-timing-const-sr-SI) (.splice
-+ (.unsplice (simplecris-const-timing-SI))
-+ (.unsplice (crisv32-timing-c-sr-SI))))
-+ ; Like cris-timing-const-HI, but destination special register.
-+ ((cris-timing-const-sr-HI) (.splice
-+ (.unsplice (simplecris-const-timing-HI))
-+ (.unsplice (crisv32-timing-c-sr-SI)))))
-+)
-+
-+(define-pmacro cris-timing-const-QI cris-timing-const-HI)
-+(define-pmacro cris-timing-const-sr-QI cris-timing-const-sr-HI)
-+
-+(define-pmacro (simplecris-common-writable-specregs)
-+ "The common writable special registers in pre-v32 models."
-+ ((HI 5) (SI 9) (SI 10) (SI 11) (SI 12) (SI 13))
-+)
-+
-+(define-pmacro (simplecris-common-readable-specregs)
-+ "The common readable special registers in pre-v32 models."
-+ (.splice (.unsplice (simplecris-common-writable-specregs))
-+ (QI 0) (QI 1) (HI 4) (SI 8))
-+)
-+
-+(define-pmacro (cris-implemented-writable-specregs-v0)
-+ "Special writable registers in v0 and their sizes"
-+ (.splice (.unsplice (simplecris-common-writable-specregs)) (HI 6) (HI 7))
-+)
-+(define-pmacro
-+ cris-implemented-specregs-const-v0
-+ cris-implemented-writable-specregs-v0
-+)
-+(define-pmacro (cris-implemented-readable-specregs-v0)
-+ "Special readable registers in v0 and their sizes"
-+ (.splice (.unsplice (simplecris-common-readable-specregs)) (HI 6) (HI 7))
-+)
-+
-+(define-pmacro (cris-implemented-writable-specregs-v3)
-+ "Special writable registers in v3 and their sizes"
-+ (.splice (.unsplice (cris-implemented-writable-specregs-v0)) (SI 14))
-+)
-+(define-pmacro
-+ cris-implemented-specregs-const-v3
-+ cris-implemented-writable-specregs-v3
-+)
-+(define-pmacro (cris-implemented-readable-specregs-v3)
-+ "Special readable registers in v3 and their sizes"
-+ (.splice (.unsplice (cris-implemented-readable-specregs-v0)) (SI 14))
-+)
-+
-+(define-pmacro (cris-implemented-writable-specregs-v8)
-+ "Special writable registers in v8 and their sizes"
-+ (.splice (.unsplice (simplecris-common-writable-specregs)) (SI 14))
-+)
-+(define-pmacro
-+ cris-implemented-specregs-const-v8
-+ cris-implemented-writable-specregs-v8
-+)
-+(define-pmacro (cris-implemented-readable-specregs-v8)
-+ "Special readable registers in v8 and their sizes"
-+ (.splice (.unsplice (simplecris-common-readable-specregs)) (SI 14))
-+)
-+
-+(define-pmacro (cris-implemented-writable-specregs-v10)
-+ "Special writable registers in v10 and their sizes"
-+ (.splice (.unsplice (simplecris-common-writable-specregs))
-+ (SI 7) (SI 14) (SI 15))
-+)
-+(define-pmacro
-+ cris-implemented-specregs-const-v10
-+ cris-implemented-writable-specregs-v10
-+)
-+(define-pmacro (cris-implemented-readable-specregs-v10)
-+ "Special registers in v10 and their sizes"
-+ (.splice (.unsplice (simplecris-common-readable-specregs))
-+ (SI 7) (SI 14) (SI 15))
-+)
-+
-+(define-pmacro (cris-implemented-writable-specregs-v32)
-+ "Special writable registers in v32 and their sizes"
-+ ((QI 2) (QI 3)
-+ (SI 5) (SI 6) (SI 7) (SI 9)
-+ (SI 10) (SI 11) (SI 12) (SI 13) (SI 14) (SI 15))
-+)
-+(define-pmacro (cris-implemented-readable-specregs-v32)
-+ "Special readable registers in v32 and their sizes"
-+ (.splice (.unsplice (cris-implemented-writable-specregs-v32))
-+ (QI 0) (QI 1) (HI 4) (SI 8))
-+)
-+
-+; For v32, all special register operations on constants (that is,
-+; move) take 32-bit operands, not the real size of the register, as in
-+; other move operations.
-+(define-pmacro (cris-implemented-specregs-const-v32)
-+ (.map (.pmacro (x) (SI (.cadr2 x)))
-+ (cris-implemented-writable-specregs-v32))
-+)
-+
-+(define-pmacro cris-swap-codes
-+ "CRIS Swap codes in numeric order (no zero)"
-+ ( r b br w wr wb wbr
-+ n nr nb nbr nw nwr nwb nwbr)
-+)
-+
-+(define-pmacro cris-flagnames
-+ "CRIS flag field values, dest and src fields concatenated"
-+ (c v z n x i u p) ; ... b m for pre-v32
-+)
-+
-+(define-pmacro-map
-+ ; Bitnumber for each respective flag.
-+ (.map (.pmacro (x num) ((.sym x -bitnumber) num))
-+ cris-flagnames (.iota 8))
-+)
-+
-+; I give up. Here's a perl-script to get the values I want for this macro
-+; (not working along list principles, though). You can run this region.
-+; perl -e '$x = "cvznxiup"; for ($i = 0; $i < 256; $i++) { $s = "";
-+; for ($j = 0; $j < 8; $j++) { if ($i & (1 << $j)) {
-+; $s .= substr ($x, $j, 1);}}
-+; printf ("%s%s", $s eq "" ? "_" : $s, (($i + 1) % 8) == 0 ? "\n " : " "); }'
-+(define-pmacro cris-flag-combinations
-+ "Combinations of flags in numeric order"
-+ (_ c v cv z cz vz cvz
-+ n cn vn cvn zn czn vzn cvzn
-+ x cx vx cvx zx czx vzx cvzx
-+ nx cnx vnx cvnx znx cznx vznx cvznx
-+ i ci vi cvi zi czi vzi cvzi
-+ ni cni vni cvni zni czni vzni cvzni
-+ xi cxi vxi cvxi zxi czxi vzxi cvzxi
-+ nxi cnxi vnxi cvnxi znxi cznxi vznxi cvznxi
-+ u cu vu cvu zu czu vzu cvzu
-+ nu cnu vnu cvnu znu cznu vznu cvznu
-+ xu cxu vxu cvxu zxu czxu vzxu cvzxu
-+ nxu cnxu vnxu cvnxu znxu cznxu vznxu cvznxu
-+ iu ciu viu cviu ziu cziu vziu cvziu
-+ niu cniu vniu cvniu zniu czniu vzniu cvzniu
-+ xiu cxiu vxiu cvxiu zxiu czxiu vzxiu cvzxiu
-+ nxiu cnxiu vnxiu cvnxiu znxiu cznxiu vznxiu cvznxiu
-+ p cp vp cvp zp czp vzp cvzp
-+ np cnp vnp cvnp znp cznp vznp cvznp
-+ xp cxp vxp cvxp zxp czxp vzxp cvzxp
-+ nxp cnxp vnxp cvnxp znxp cznxp vznxp cvznxp
-+ ip cip vip cvip zip czip vzip cvzip
-+ nip cnip vnip cvnip znip cznip vznip cvznip
-+ xip cxip vxip cvxip zxip czxip vzxip cvzxip
-+ nxip cnxip vnxip cvnxip znxip cznxip vznxip cvznxip
-+ up cup vup cvup zup czup vzup cvzup
-+ nup cnup vnup cvnup znup cznup vznup cvznup
-+ xup cxup vxup cvxup zxup czxup vzxup cvzxup
-+ nxup cnxup vnxup cvnxup znxup cznxup vznxup cvznxup
-+ iup ciup viup cviup ziup cziup vziup cvziup
-+ niup cniup vniup cvniup zniup czniup vzniup cvzniup
-+ xiup cxiup vxiup cvxiup zxiup czxiup vzxiup cvzxiup
-+ nxiup cnxiup vnxiup cvnxiup znxiup cznxiup vznxiup cvznxiup
-+ )
-+)
-+
-+(define-pmacro cc-condition (not cbit))
-+(define-pmacro cs-condition cbit)
-+(define-pmacro ne-condition (not zbit))
-+(define-pmacro eq-condition zbit)
-+(define-pmacro vc-condition (not vbit))
-+(define-pmacro vs-condition vbit)
-+(define-pmacro pl-condition (not nbit))
-+(define-pmacro mi-condition nbit)
-+(define-pmacro ls-condition (or cbit zbit))
-+(define-pmacro hi-condition (not (or cbit zbit)))
-+(define-pmacro ge-condition (not (xor vbit nbit)))
-+(define-pmacro lt-condition (xor vbit nbit))
-+(define-pmacro gt-condition (not (or (xor vbit nbit) zbit)))
-+(define-pmacro le-condition (or (xor vbit nbit) zbit))
-+(define-pmacro a-condition 1)
-+
-+; FIXME: define this properly for v10 and pre-v10.
-+(define-pmacro wf-condition pbit)
-+
-+(define-pmacro (cris-condition condno)
-+ "Return condition state for condition number CONDNO"
-+ (sequence
-+ BI
-+ ((SI tmpcond) (BI condres))
-+ (set tmpcond condno)
-+ (.splice
-+ cond
-+ (.unsplice
-+ (.map
-+ (.pmacro
-+ (condn condc)
-+ ((eq tmpcond condn) (set condres (.sym condc -condition))))
-+ (.iota 16)
-+ cris-condition-codes)))
-+ condres)
-+)
-+
-+;;;;;;;;;;;;;;;;;; -keyword
-+
-+; General registers.
-+(define-pmacro (cris-general-gregs)
-+ (.splice (SP 14) (.unsplice (.map (.pmacro (n) ((.sym R n) n)) (.iota 15))))
-+)
-+
-+; Can't keep more than one gr-names definition at the same time;
-+; generated enum declarations in sim/cris/cris-desc.h will collide.
-+; FIXME: (include "different-mach-parts")
-+
-+(define-keyword
-+ (name gr-names-pcreg)
-+ (attrs MACH-PC)
-+ (print-name h-gr-real-pc)
-+ ; Put PC first so it is preferred over r15.
-+ (.splice values (PC 15) (.unsplice (cris-general-gregs)))
-+)
-+
-+(define-keyword
-+ (name gr-names-acr)
-+ (attrs MACH-ACR)
-+ ; The print-name directive will control the enum prefix. With the
-+ ; arguably more appropriate h-gr-v32 or h-gr-acr, we'd get names like
-+ ; H_GR_ACR_R0 instead of H_GR_R0. Since we have to choose something for
-+ ; unprefixed names, we use the CRISv32 names. FIXME: All users should
-+ ; change to use H_GR_V32_R0 (etc.), then change this to h-gr-v32.
-+ (print-name h-gr)
-+ ; Put ACR first so it is preferred over r15.
-+ (.splice values (ACR 15) (.unsplice (cris-general-gregs)))
-+)
-+
-+(define-keyword
-+ (name gr-names-v32)
-+ (attrs MACH-V32)
-+ ; In preparation for implementing the FIXME above.
-+ (print-name h-gr-v32)
-+ ; Put ACR first so it is preferred over r15.
-+ (.splice values (ACR 15) (.unsplice (cris-general-gregs)))
-+)
-+
-+; Special registers with names common to all.
-+(define-pmacro (cris-general-pregs)
-+ (.splice
-+ (VR 1)
-+ (SRP 11)
-+ (.unsplice (.map (.pmacro (n) ((.sym P n) n)) (.iota 15))))
-+)
-+
-+(define-keyword
-+ (name p-names-v10)
-+ (attrs MACH-PRE-V32)
-+ (print-name h-sr-pre-v32)
-+ (.splice
-+ values
-+ (CCR 5)
-+ (MOF 7)
-+ (IBR 9)
-+ (IRP 10)
-+ (BAR 12)
-+ (DCCR 13)
-+ (BRP 14)
-+ (USP 15)
-+ (.unsplice (cris-general-pregs)))
-+)
-+
-+(define-keyword
-+ (name p-names-v32)
-+ (attrs MACH-V32)
-+ ; See comment for gr-names-acr.
-+ (print-name h-sr)
-+ (.splice
-+ values
-+ (BZ 0)
-+ (PID 2)
-+ (SRS 3)
-+ (WZ 4)
-+ (EXS 5)
-+ (EDA 6)
-+ (MOF 7)
-+ (DZ 8)
-+ (EBP 9)
-+ (ERP 10)
-+ (NRP 12)
-+ (CCS 13)
-+ (USP 14)
-+ (SPC 15)
-+ (.unsplice (cris-general-pregs)))
-+)
-+
-+; Similarly as for h-gr-v32, in preparation.
-+(define-keyword
-+ (name p-names-v32-x)
-+ (attrs MACH-V32)
-+ ; See comment for gr-names-acr.
-+ (print-name h-sr-v32)
-+ (.splice
-+ values
-+ (BZ 0)
-+ (PID 2)
-+ (SRS 3)
-+ (WZ 4)
-+ (EXS 5)
-+ (EDA 6)
-+ (MOF 7)
-+ (DZ 8)
-+ (EBP 9)
-+ (ERP 10)
-+ (NRP 12)
-+ (CCS 13)
-+ (USP 14)
-+ (SPC 15)
-+ (.unsplice (cris-general-pregs)))
-+)
-+
-+(define-pmacro p0 (reg h-sr 0))
-+(define-pmacro vr (reg h-sr 1))
-+(define-pmacro pid (reg h-sr 2))
-+(define-pmacro srs (reg h-sr 3))
-+(define-pmacro p4 (reg h-sr 4))
-+(define-pmacro ccr (reg h-sr 5))
-+(define-pmacro mof (reg h-sr 7))
-+(define-pmacro p8 (reg h-sr 8))
-+(define-pmacro ibr (reg h-sr 9))
-+(define-pmacro ebp (reg h-sr 9))
-+(define-pmacro erp (reg h-sr 10))
-+(define-pmacro srp (reg h-sr 11))
-+(define-pmacro ccs (reg h-sr 13))
-+(define-pmacro dccr (reg h-sr 13))
-+(define-pmacro usp (reg h-sr 14))
-+(define-pmacro spc (reg h-sr 15))
-+
-+(define-pmacro sp (reg h-gr 14))
-+(define-pmacro acr (reg h-gr 15))
-+
-+(define-pmacro cris-condition-codes
-+ "CRIS condition codes in numeric order"
-+ (cc cs ne eq vc vs pl mi ls hi ge lt gt le a wf)
-+)
-+
-+; No use having different lists; this is the only CC that
-+; differs between v10 and v32, and mostly in the name.
-+(define-pmacro sb wf)
-+
-+
-+;;;;;;;;;;;;;;;;;; -hardware
-+
-+;; Various constant generators.
-+
-+(define-hardware
-+ (name h-inc)
-+ (comment "autoincrement-bit syntax specifier")
-+ (type immediate (UINT 1))
-+ (values keyword "" (("" 0) ("+" 1)))
-+)
-+
-+(define-hardware
-+ (name h-ccode)
-+ (comment "Condition code specifier")
-+ (type immediate (UINT 4))
-+ (values keyword ""
-+ (.map (.pmacro (x y) ((.str x) y))
-+ cris-condition-codes (.iota 16)))
-+)
-+
-+(define-hardware
-+ (name h-swap)
-+ (comment "Swap option specifier")
-+ (type immediate (UINT 4))
-+ (values
-+ keyword ""
-+ (.splice
-+ (" " 0)
-+ (.unsplice
-+ (.map
-+ (.pmacro (x y) ((.str x) y)) cris-swap-codes (.iota 15 1)))))
-+)
-+
-+(define-hardware
-+ (name h-flagbits)
-+ (comment "Flag bits specifier")
-+ (type immediate (UINT 8))
-+ (values
-+ keyword ""
-+ (.map (.pmacro (x y) ((.str x) y)) cris-flag-combinations (.iota 256)))
-+)
-+
-+; Apparently, the semantic-name isn't used for accessors, so external
-+; users like the sim glue and SID sees the -v32 and -pre-v32 munged names.
-+; Defining "dispatchers"; virtual registers whose getter and setter works
-+; on the "real" mach variants, seems to help. CGEN-FIXME: Make
-+; semantic-name set the generated names.
-+(define-pmacro (cris-d-hwreg x-name x-type)
-+ (define-hardware
-+ (name x-name)
-+ (comment (.str "Dispatcher for " x-name))
-+ (attrs VIRTUAL)
-+ (type register x-type)
-+ (get () (reg (.sym x-name -x)))
-+ (set (val) (set (reg (.sym x-name -x)) val)))
-+)
-+(define-pmacro (cris-d-hwregf-a x-name x-type x-n x-attrs)
-+ (define-hardware
-+ (name x-name)
-+ (comment (.str "Dispatcher for " x-name))
-+ (.splice attrs VIRTUAL (.unsplice x-attrs))
-+ (type register x-type (x-n))
-+ (get (index) (reg (.sym x-name -x) index))
-+ (set (index val) (set-quiet (reg (.sym x-name -x) index) val)))
-+)
-+(define-pmacro (cris-d-hwregf x-name x-type x-n)
-+ (cris-d-hwregf-a x-name x-type x-n ())
-+)
-+(define-pmacro (cris-d-hwregf-p x-name x-type x-n)
-+ (cris-d-hwregf-a x-name x-type x-n (PROFILE))
-+)
-+
-+; At first glance we could use (eq-attr (current-mach) ...) for
-+; everything, but that seems sometimes (always?) to yield false. For
-+; ifields, it causes noncompilable C-code. For the insn semantics code,
-+; it causes tests movei.ms and mulv32.ms to fail, apparently because the
-+; current-mach-is-v32 usage in flags setting is miscompiled as 0 (or
-+; rather, misgenerated). Instead we use different definitions of a
-+; MACH-tagged virtual register yielding a constant, together with a
-+; pmacro. CGEN-FIXME: If eq-attr is someday fixed, we could just remove
-+; these h-v32 virtual register definitions and change the pmacro
-+; definition for current-mach-is-v32.
-+(define-hardware
-+ (semantic-name h-v32)
-+ (name h-v32-v32)
-+ (attrs MACH-V32 VIRTUAL)
-+ (type register BI)
-+ (get () (const BI 1))
-+ (set (val) (error "Can't set h-v32"))
-+)
-+(define-hardware
-+ (semantic-name h-v32)
-+ (name h-v32-non-v32)
-+ (attrs MACH-PRE-V32 VIRTUAL)
-+ (type register BI)
-+ (get () (const BI 0))
-+ (set (val) (error "Can't set h-v32"))
-+)
-+
-+;; "Real" hardware.
-+
-+(define-hardware
-+ (name h-pc)
-+ (comment "program counter")
-+ (attrs PC PROFILE)
-+ (type pc)
-+ ; There's no bit 0 in PC, so just ignore it when jumping etc.
-+ (set (val) (set (raw-reg h-pc) (and val (inv 1))))
-+)
-+
-+; Note that setting register 15 isn't handled here, but in each insn, so
-+; the proper "jump" attributes and other special stuff for speedy
-+; execution can be present.
-+(cris-d-hwregf-p h-gr SI 16)
-+(define-hardware
-+ (semantic-name h-gr-x)
-+ (name h-gr-pc)
-+ (attrs MACH-PC VIRTUAL)
-+ (comment "General purpose registers, aborting on PC access")
-+ (type register SI (16))
-+ (indices extern-keyword gr-names-pcreg)
-+ (get
-+ (index)
-+ (if SI (eq index 15)
-+ (error SI "General register read of PC is not implemented.")
-+ (reg SI h-gr-real-pc index)))
-+ (set
-+ (index val)
-+ (sequence
-+ ()
-+ (if (eq index 15)
-+ (error "General register write to PC is not implemented."))
-+ (set (reg SI h-gr-real-pc index) val)))
-+)
-+(define-hardware
-+ (name h-gr-real-pc)
-+ (attrs MACH-PC)
-+ (comment "General purpose registers")
-+ (type register SI (16))
-+ (indices extern-keyword gr-names-pcreg)
-+)
-+
-+; We have to use a virtual register trick to get the "raw", unaccounted
-+; contents of the global register; the raw-reg RTX only works for
-+; non-virtual register files.
-+(define-hardware
-+ (semantic-name h-raw-gr)
-+ (name h-raw-gr-pc)
-+ (attrs MACH-PC VIRTUAL)
-+ (comment "Unaccounted version of general purpose registers")
-+ (type register SI (16))
-+ (get (index) (raw-reg h-gr-real-pc index))
-+ (set (index val) (set-quiet (raw-reg h-gr-real-pc index) val))
-+)
-+(define-hardware
-+ (semantic-name h-gr-x)
-+ (name h-gr-acr)
-+ (attrs MACH-ACR)
-+ (comment "General purpose registers")
-+ (type register SI (16))
-+ (indices extern-keyword gr-names-acr)
-+)
-+(define-hardware
-+ (semantic-name h-raw-gr)
-+ (name h-raw-gr-acr)
-+ (attrs MACH-ACR VIRTUAL)
-+ (comment "Unaccounted version of general purpose registers")
-+ (type register SI (16))
-+ (get (index) (raw-reg h-gr-x index))
-+ (set (index val) (set-quiet (raw-reg h-gr-x index) val))
-+)
-+
-+; FIXME: get and set semantics? Unknown how to split semantics best; with
-+; get/set semantics or within the insn specification. Doing the former for
-+; now. Should use different names for pre-v10.
-+; FIXME: No dccr for v0 and v3. Different high flag bits.
-+(cris-d-hwregf-p h-sr SI 16)
-+(define-pmacro
-+ (cris-h-sr machver)
-+ (define-hardware
-+ (semantic-name h-sr-x)
-+ (name (.sym h-sr-v machver))
-+ (attrs (MACH (.sym crisv machver)))
-+ (comment (.str "Special registers for v" machver))
-+ (type register SI (16))
-+ (indices extern-keyword p-names-v10)
-+ (get
-+ (index)
-+ (cond
-+ SI
-+ ((orif (orif (eq index (regno p0)) (eq index (regno p4)))
-+ (eq index (regno p8))) 0)
-+ ((eq index (regno vr)) machver)
-+ ((orif (eq index (regno ccr))
-+ (eq index (regno dccr)))
-+ ; Return "P U I X N Z V C" for the low 8 bits.
-+ ; FIXME: More bits.
-+ (or SI
-+ (and SI (raw-reg SI h-sr-x (regno ccr)) #xffffff00)
-+ (or
-+ (zext SI (reg BI h-cbit))
-+ (or
-+ (sll (zext SI (reg BI h-vbit)) 1)
-+ (or
-+ (sll (zext SI (reg BI h-zbit)) 2)
-+ (or
-+ (sll (zext SI (reg BI h-nbit)) 3)
-+ (or
-+ (sll (zext SI (reg BI h-xbit)) 4)
-+ (or
-+ (sll (zext SI (reg BI h-ibit)) 5)
-+ (or
-+ (sll (zext SI (reg BI h-ubit)) 6)
-+ (or
-+ (sll (zext SI (reg BI h-pbit)) 7)
-+ 0))))))))))
-+ (else (raw-reg SI h-sr-x index))))
-+ (set
-+ (index val)
-+ (cond
-+ ((orif (orif (eq index (regno p0)) (eq index (regno p4)))
-+ (orif (eq index (regno p8)) (eq index (regno vr))))
-+ (nop))
-+ ((orif (eq index (regno ccr)) (eq index (regno dccr)))
-+ (sequence
-+ ()
-+ (set (reg BI h-cbit) (if BI (ne SI (and val (sll 1 0)) 0) 1 0))
-+ (set (reg BI h-vbit) (if BI (ne SI (and val (sll 1 1)) 0) 1 0))
-+ (set (reg BI h-zbit) (if BI (ne SI (and val (sll 1 2)) 0) 1 0))
-+ (set (reg BI h-nbit) (if BI (ne SI (and val (sll 1 3)) 0) 1 0))
-+ (set (reg BI h-xbit) (if BI (ne SI (and val (sll 1 4)) 0) 1 0))
-+ (set (reg BI h-ibit) (if BI (ne SI (and val (sll 1 5)) 0) 1 0))
-+ (set (reg BI h-ubit) (if BI (ne SI (and val (sll 1 6)) 0) 1 0))
-+ (set (reg BI h-pbit) (if BI (ne SI (and val (sll 1 7)) 0) 1 0))
-+ (set-quiet (raw-reg SI h-sr-x (regno ccr)) val)
-+ (set-quiet (raw-reg SI h-sr-x (regno dccr)) val)))
-+ (else (set-quiet (raw-reg SI h-sr-x index) val)))))
-+)
-+
-+(cris-h-sr 0)
-+(cris-h-sr 3)
-+(cris-h-sr 8)
-+(cris-h-sr 10)
-+
-+(define-hardware
-+ (semantic-name h-sr-x)
-+ (name h-sr-v32)
-+ (attrs MACH-V32)
-+ (comment "Special registers for v32")
-+ (type register SI (16))
-+ (indices extern-keyword p-names-v32)
-+
-+ (get
-+ (index)
-+ (cond
-+ SI
-+ ((orif (orif (eq index (regno p0)) (eq index (regno p4)))
-+ (eq index (regno p8))) 0)
-+ ((eq index (regno vr)) 32)
-+ ((eq index (regno ccs))
-+ ; Return "S R P U I X N Z V C" for the low 10 bits.
-+ (or SI
-+ (and SI (raw-reg SI h-sr-x (regno ccs)) #x3ffffc00)
-+ (or
-+ (zext SI (reg BI h-cbit))
-+ (or
-+ (sll (zext SI (reg BI h-vbit)) 1)
-+ (or
-+ (sll (zext SI (reg BI h-zbit)) 2)
-+ (or
-+ (sll (zext SI (reg BI h-nbit)) 3)
-+ (or
-+ (sll (zext SI (reg BI h-xbit)) 4)
-+ (or
-+ (sll (zext SI (reg BI h-ibit)) 5)
-+ (or
-+ (sll (zext SI (reg BI h-ubit)) 6)
-+ (or
-+ (sll (zext SI (reg BI h-pbit)) 7)
-+ (or
-+ (sll (zext SI (reg BI h-rbit)) 8)
-+ (or
-+ (sll (zext SI (reg BI h-sbit)) 9)
-+ (or
-+ (sll (zext SI (reg BI h-mbit)) 30)
-+ (or
-+ (sll (zext SI (reg BI h-qbit)) 31)
-+ 0))))))))))))))
-+ ((eq index (regno usp))
-+ ; In user mode, return general stack pointer.
-+ (if BI (reg BI h-ubit)
-+ (raw-reg SI h-gr-x (regno sp))
-+ (raw-reg SI h-sr-x (regno usp))))
-+ (else (raw-reg SI h-sr-x index))))
-+
-+ (set
-+ (index val)
-+ (cond
-+ ((orif (orif (eq index (regno p0)) (eq index (regno p4)))
-+ (orif (eq index (regno p8)) (eq index (regno vr))))
-+ (nop))
-+ ((eq index (regno ccs))
-+ (sequence
-+ ()
-+ ; Protected bits are handled as such in the respective setter function.
-+ (set (reg BI h-cbit) (if BI (ne SI (and val (sll 1 0)) 0) 1 0))
-+ (set (reg BI h-vbit) (if BI (ne SI (and val (sll 1 1)) 0) 1 0))
-+ (set (reg BI h-zbit) (if BI (ne SI (and val (sll 1 2)) 0) 1 0))
-+ (set (reg BI h-nbit) (if BI (ne SI (and val (sll 1 3)) 0) 1 0))
-+ (set (reg BI h-xbit) (if BI (ne SI (and val (sll 1 4)) 0) 1 0))
-+ (set (reg BI h-ibit) (if BI (ne SI (and val (sll 1 5)) 0) 1 0))
-+ (set (reg BI h-sbit) (if BI (ne SI (and val (sll 1 9)) 0) 1 0))
-+ (set (reg BI h-mbit) (if BI (ne SI (and val (sll 1 30)) 0) 1 0))
-+ (set (reg BI h-pbit) (if BI (ne SI (and val (sll 1 7)) 0) 1 0))
-+ (set (reg BI h-rbit) (if BI (ne SI (and val (sll 1 8)) 0) 1 0))
-+ (set (reg BI h-qbit) (if BI (ne SI (and val (sll 1 31)) 0) 1 0))
-+ ; Set the U bit last, so the setter functions for the other bits
-+ ; don't see it as set from this operation. It is not cleared from
-+ ; this operation, so we don't have to handle that; it's only
-+ ; cleared "manually" from within simulator-specific context-switch
-+ ; machinery.
-+ (set (reg BI h-ubit) (if BI (ne SI (and val (sll 1 6)) 0) 1 0))
-+ (set-quiet (raw-reg SI h-sr-x index) val)))
-+ ((eq index (regno usp))
-+ ; In user mode, set general register 14 too, whenever setting USP.
-+ (sequence
-+ ()
-+ (if (reg BI h-ubit) (set (raw-reg SI h-gr-x (regno sp)) val))
-+ (set (raw-reg SI h-sr-x (regno usp)) val)))
-+ ((eq index (regno srs))
-+ (if (not (reg BI h-ubit)) (set (raw-reg h-sr-x (regno srs)) val)))
-+ ((eq index (regno ebp))
-+ (if (not (reg BI h-ubit)) (set (raw-reg h-sr-x (regno ebp)) val)))
-+ ((eq index (regno pid))
-+ (if (not (reg BI h-ubit))
-+ (sequence
-+ ()
-+ (c-call VOID "@cpu@_write_pid_handler" val)
-+ (set (raw-reg h-sr-x (regno pid)) val))))
-+ ((eq index (regno spc))
-+ (if (not (reg BI h-ubit)) (set (raw-reg h-sr-x (regno spc)) val)))
-+ (else (set-quiet (raw-reg SI h-sr-x index) val))))
-+)
-+
-+(define-hardware
-+ (name h-supr)
-+ (attrs MACH-V32 VIRTUAL)
-+ (comment "Support registers")
-+ (type register SI (16))
-+ (values keyword "" (.map (.pmacro (y) ((.str S y) y)) (.iota 16)))
-+ (get (index) (c-call SI "@cpu@_read_supr" index))
-+ (set (index val) (c-call VOID "@cpu@_write_supr" index val))
-+)
-+
-+(define-pmacro (cris-dsh semantic-name name comment attrs type)
-+ "Like dsh, but the semantic-name is separate"
-+ (define-full-hardware
-+ name comment attrs semantic-name type () () () () () ())
-+)
-+
-+; We define the condition codes that hold arithmetic flags separately
-+; and "or" them in, in the get and set methods of the special
-+; registers. We define arithmetic flags as any of C V Z N X. They
-+; thankfully have that order (zero-based) in all processor versions.
-+
-+; To avoid having two variants of most move-type instructions because V32
-+; doesn't set C and V (and N and Z), we fake the setting to virtual
-+; registers which have two different implementations.
-+(define-pmacro (cris-move-flag f f-name f-whence)
-+ "Flag set differently in pre-v32 and v32 in some cases"
-+ (begin
-+ (dsh (.sym h- f bit) (.str f-name " bit") () (register BI))
-+ (cris-d-hwreg (.sym h- f bit-move) BI)
-+ (define-hardware
-+ (semantic-name (.sym h- f bit-move-x))
-+ (name (.sym h- f bit-move-v32))
-+ (comment (.str f-name " bit set in " f-whence " instructions, ignored"))
-+ (attrs MACH-V32 VIRTUAL)
-+ (type register BI)
-+ (get
-+ ()
-+ (sequence BI ()
-+ (error (.str "Can't get h-" f "bit-move on CRISv32")) 0))
-+ (set (val) (nop)))
-+ (define-hardware
-+ (semantic-name (.sym h- f bit-move-x))
-+ (name (.sym h- f bit-move-pre-v32))
-+ (comment
-+ (.str
-+ f-name " bit set in " f-whence " instructions, same as " f "bit"))
-+ (attrs MACH-PRE-V32 VIRTUAL)
-+ (type register BI)
-+ (get () (reg (.sym h- f bit)))
-+ (set (val) (set (reg (.sym h- f bit)) val))))
-+)
-+
-+(cris-move-flag c "carry" "move-type")
-+(cris-move-flag v "overflow" "move-type")
-+(cris-move-flag z "zero" "moveq")
-+(cris-move-flag n "sign" "moveq")
-+
-+(dsh h-xbit "extended-arithmetic bit" () (register BI))
-+(cris-d-hwreg h-ibit BI)
-+(cris-dsh h-ibit-x h-ibit-pre-v32
-+ "interrupt-enable bit" (MACH-PRE-V32) (register BI))
-+(dsh h-pbit "sequence-broken bit" ((MACH crisv10,crisv32)) (register BI))
-+(dsh h-rbit "carry bit for MCP+restore-p bit" (MACH-V32) (register BI))
-+(cris-d-hwreg h-ubit BI)
-+(cris-dsh h-ubit-x h-ubit-pre-v32
-+ "user mode bit" ((MACH crisv10)) (register BI))
-+(dsh h-gbit "guru mode bit" (MACH-V32) (register BI))
-+
-+; When doing a transition from kernel to user mode on V32, we save the
-+; stack pointer in an internal register and copy USP to R14, so we don't
-+; need non-trivial handlers for general registers.
-+(dsh
-+ h-kernel-sp
-+ "Kernel stack pointer during user mode"
-+ (MACH-V32)
-+ (register SI)
-+)
-+
-+(define-hardware
-+ (semantic-name h-ubit-x)
-+ (name h-ubit-v32)
-+ (comment "User mode bit")
-+ (attrs MACH-V32)
-+ (type register BI)
-+ (set
-+ (val)
-+ (sequence
-+ ()
-+ (if (andif val (not (raw-reg BI h-ubit-x)))
-+ (sequence
-+ ()
-+ (set (reg SI h-kernel-sp) (raw-reg h-gr-x (regno sp)))
-+ (set (raw-reg h-gr-x (regno sp)) (raw-reg h-sr-x (regno usp)))
-+ (set (raw-reg BI h-ubit-x) val)
-+ (c-call VOID "@cpu@_usermode_enabled")))))
-+)
-+
-+(define-hardware
-+ (semantic-name h-ibit-x)
-+ (name h-ibit-v32)
-+ (comment "Interrupt-enable bit")
-+ (attrs MACH-V32)
-+ (type register BI)
-+ (set
-+ (val)
-+ (sequence
-+ ()
-+ (if (not (reg BI h-ubit))
-+ (sequence
-+ ((BI enabled))
-+ (set enabled (andif val (not (raw-reg BI h-ibit-x))))
-+ (set (raw-reg BI h-ibit-x) val)
-+ ; Call handler when enabling.
-+ (if enabled (c-call VOID "@cpu@_interrupts_enabled"))))))
-+)
-+
-+(define-hardware
-+ (name h-mbit)
-+ (comment "NMI enable bit")
-+ (attrs MACH-V32)
-+ (type register BI)
-+ (set
-+ (val)
-+ (sequence
-+ ()
-+ ; Don't allow clearing (through this handler) when once set.
-+ (if (andif val (andif (not (raw-reg BI h-mbit)) (not (reg BI h-ubit))))
-+ (sequence
-+ ()
-+ (set (raw-reg BI h-mbit) 1)
-+ ; Call handler when enabling.
-+ (c-call VOID "@cpu@_nmi_enabled")))))
-+)
-+
-+(define-pmacro
-+ (dsh-cond-bit-v32 x-name x-comment x-cond)
-+ "dsh bit for MACH-V32, with bit only changeable when X-COND"
-+ (define-hardware
-+ (name x-name)
-+ (comment x-comment)
-+ (attrs MACH-V32)
-+ (type register BI)
-+ (set (val) (sequence () (if x-cond (set (raw-reg BI x-name) val)))))
-+)
-+(define-pmacro
-+ (dsh-protected-bit-v32 x-name x-comment)
-+ "dsh bit for MACH-V32, with bit only changeable in kernel mode"
-+ (dsh-cond-bit-v32 x-name x-comment (not (reg BI h-ubit)))
-+)
-+(dsh-protected-bit-v32 h-qbit "Pending single-step bit")
-+
-+(define-hardware
-+ (name h-sbit)
-+ (comment "Cause single step exception on ... [see CRISv32 ref] bit")
-+ (attrs MACH-V32)
-+ (type register BI)
-+ (set
-+ (val)
-+ (sequence
-+ ()
-+ (if (not (reg BI h-ubit))
-+ (sequence
-+ ((BI enabled))
-+ (set enabled (andif val (not (raw-reg BI h-sbit))))
-+ (set (raw-reg BI h-sbit) val)
-+ ; Call handler when enabling.
-+ (if enabled (c-call VOID "@cpu@_single_step_enabled"))))))
-+)
-+
-+(dnop cbit "" (SEM-ONLY) h-cbit f-nil)
-+(dnop cbit-move
-+ "cbit for pre-V32, nothing for newer" (SEM-ONLY) h-cbit-move f-nil)
-+(dnop vbit "" (SEM-ONLY) h-vbit f-nil)
-+(dnop vbit-move
-+ "vbit for pre-V32, nothing for newer" (SEM-ONLY) h-vbit-move f-nil)
-+(dnop zbit "" (SEM-ONLY) h-zbit f-nil)
-+(dnop zbit-move
-+ "zbit for pre-V32, nothing for newer" (SEM-ONLY) h-zbit-move f-nil)
-+(dnop nbit "" (SEM-ONLY) h-nbit f-nil)
-+(dnop nbit-move
-+ "nbit for pre-V32, nothing for newer" (SEM-ONLY) h-nbit-move f-nil)
-+(dnop xbit "" (SEM-ONLY) h-xbit f-nil)
-+(dnop ibit "" (SEM-ONLY) h-ibit f-nil)
-+(dnop ubit "" (SEM-ONLY (MACH crisv10,crisv32)) h-ubit f-nil)
-+(dnop pbit "" (SEM-ONLY (MACH crisv10,crisv32)) h-pbit f-nil)
-+(dnop
-+ rbit "carry bit for MCP+restore-P flag bit" (SEM-ONLY MACH-V32) h-rbit f-nil)
-+(dnop sbit "" (SEM-ONLY MACH-V32) h-sbit f-nil)
-+(dnop mbit "" (SEM-ONLY MACH-V32) h-mbit f-nil)
-+(dnop qbit "" (SEM-ONLY MACH-V32) h-qbit f-nil)
-+
-+(cris-d-hwreg h-insn-prefixed-p BI)
-+(cris-dsh
-+ h-insn-prefixed-p-x
-+ h-insn-prefixed-p-pre-v32
-+ "instruction-is-prefixed bit"
-+ (MACH-PRE-V32)
-+ (register BI)
-+)
-+
-+; CRISv32 has no prefixing on memory accesses. CGEN-FIXME: [Once (eq-attr
-+; (current-mach) ...) works]: can we change andif and/or orif so it
-+; doesn't look too close at short-circuited operands and avoid defining an
-+; operand that doesn't apply to a certain mach?
-+(define-hardware
-+ (semantic-name h-insn-prefixed-p-x)
-+ (name h-insn-prefixed-p-v32)
-+ (attrs MACH-V32 VIRTUAL)
-+ (comment "instruction-is-prefixed bit")
-+ (type register BI)
-+ (get () (const BI 0))
-+ (set (val) (nop))
-+)
-+(dnop
-+ prefix-set
-+ "Instruction-prefixed flag"
-+ (SEM-ONLY)
-+ h-insn-prefixed-p
-+ f-nil
-+)
-+
-+(cris-dsh
-+ h-prefixreg h-prefixreg-pre-v32
-+ "Prefix-address register" (MACH-PRE-V32) (register SI))
-+(define-hardware
-+ (semantic-name h-prefixreg)
-+ (name h-prefixreg-v32)
-+ (comment "Prefix-address register, redirecting to ACR")
-+ (attrs MACH-V32 VIRTUAL)
-+ (type register SI)
-+ ; Why can't we have just a "acr" a.k.a "(reg h-gr 15)" here?
-+ (get () acr)
-+ (set (value) (set acr value))
-+)
-+
-+(dnop
-+ prefixreg
-+ "Prefix address"
-+ (SEM-ONLY)
-+ h-prefixreg
-+ f-nil
-+)
-+
-+;;;;;;;;;;;;;;;;;; -ifield
-+
-+; 15 0
-+; +-----------+-----+-----------+-----+-----------+
-+; | Operand2 | Mode| Opcode | Size| Operand1 |
-+; +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-+;
-+; Figure 5. General instruction format.
-+;
-+; Some deviations from this format exist, [see below].
-+
-+; Field specifiers in CGEN specify the highest numbered bit followed by
-+; the number of bits.
-+
-+(dnf f-operand1 "Operand1" () 3 4)
-+(dnf f-size "Size" () 5 2)
-+(dnf f-opcode "Opcode" () 9 4)
-+(dnf f-mode "Mode" () 11 2)
-+(dnf f-operand2 "Operand2" () 15 4)
-+
-+; Subfields. FIXME: unfortunately there's some limitation in CGEN so we
-+; can't (as would be somewhat intuitive) make f-mode a multi-ifield
-+; consisting of these two, concatenated.
-+(dnf f-memmode "Indirect of autoincrement" () 10 1)
-+(dnf f-membit "Memory specifier" () 11 1)
-+
-+(dnf f-b5 "Bit 5 (zero for some quick operands)" () 5 1)
-+
-+; When the addressing mode is quick immediate, the low bits are
-+; part of the operand.
-+(dnf f-opcode-hi "Opcode field, high bits" () 9 2)
-+
-+; Common synonyms for those fields.
-+(define-pmacro f-source f-operand1)
-+(define-pmacro f-dest f-operand2)
-+
-+(dnmf
-+ f-dstsrc "Dest and source fields concatenated" () UINT
-+ (f-dest f-source)
-+ ; Insert-code.
-+ (sequence
-+ ((SI tmpval))
-+ (set tmpval (ifield f-dstsrc))
-+ (set (ifield f-dest) (and (srl tmpval 4) #xf))
-+ (set (ifield f-source) (and tmpval #xf)))
-+ ; Extract-code.
-+ (set
-+ (ifield f-dstsrc)
-+ (and (or (ifield f-source) (sll (ifield f-dest) 4)) #xff))
-+)
-+
-+;The 6-bit value may be sign or zero extended depending on the instruction.
-+;
-+; 15 0
-+; +-----------+-----+-----------+-----+-----------+
-+; | Operand2 | Mode| Opcode | Immediate value |
-+; +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
-+;
-+; Figure 6. Quick immediate addressing mode instruction format.
-+
-+(dnf f-u6 "Quick immediate unsigned 6-bit" () 5 6)
-+(df f-s6 "Quick signed 6-bit" () 5 6 INT #f #f)
-+
-+; There's also a variant used with shift insns, with one bit larger opcode
-+; and one bit smaller immediate value, though it doesn't have a general
-+; graphic description.
-+(dnf f-u5 "Quick unsigned 5-bit" () 4 5)
-+
-+; Similarly, a four-bit immediate field.
-+(dnf f-u4 "Quick unsigned 4-bit" () 3 4)
-+
-+; An 8-bit signed value, which doesn't have a general graphic description.
-+(df f-s8 "Source signed byte" () 7 8 INT #f #f)
-+
-+; The 9-bit branch offset, with bit 0 in the field being bit 8 in the
-+; offset, and bit 0 in the offset always 0.
-+(df f-disp9-hi "PC-relative 9-bit offset, sign bit" () 0 1 INT #f #f)
-+(dnf f-disp9-lo "PC-relative 9-bit offset, low bits" () 7 7)
-+
-+; It would work to have this in two mach-specific variants, but
-+; considering that current-mach-is-v32 is a compile-time constant, we
-+; don't win any simulator performance.
-+(dnmf
-+ f-disp9 "PC-relative 9-bit offset"
-+ (PCREL-ADDR)
-+ INT
-+ (f-disp9-hi f-disp9-lo)
-+ ; Insert-code.
-+ (sequence
-+ ((SI absval))
-+ (set absval (srl (sub (sub SI (ifield f-disp9) pc)
-+ (if SI current-mach-is-v32 0 2)) 1))
-+ (set (ifield f-disp9-hi) (if (lt absval 0) 1 0))
-+ (set (ifield f-disp9-lo) (and absval) #x7f))
-+ ; Extract-code.
-+ (sequence
-+ ((SI abslo) (SI absval))
-+ (set abslo (sll (ifield f-disp9-lo) 1))
-+ (set absval
-+ (or (if SI (ne (ifield f-disp9-hi) 0)
-+ (inv SI #xff)
-+ 0)
-+ abslo))
-+ (set (ifield f-disp9)
-+ (add SI (add SI pc absval) (if SI current-mach-is-v32 0 2))))
-+)
-+
-+; The operand of LAPCQ is PC-relative, similar to f-disp9 but unsigned,
-+; and only four bits.
-+(df
-+ f-qo
-+ "PC-relative 4-bit unsigned offset, counted from start of insn"
-+ (MACH-V32 PCREL-ADDR)
-+ 3 4
-+ UINT
-+ ; Insert-code.
-+ ((value pc) (srl SI (sub SI value pc) 1))
-+ ; Extract-code.
-+ ((value pc) (add SI pc (sll SI value 1)))
-+)
-+
-+; 8-bit, 16-bit and 32-bit immediates. The 8-bit values are constructed
-+; through encoding/decoding functions, since the PC increment is by a
-+; word.
-+(define-pmacro (dcrisf x-name x-comment x-attrs x-word-offset x-word-length
-+ x-start x-length x-mode x-encode x-decode)
-+ (define-ifield
-+ (name x-name)
-+ (comment x-comment)
-+ (.splice attrs (.unsplice x-attrs))
-+ (word-offset x-word-offset)
-+ (word-length x-word-length)
-+ (start x-start)
-+ (length x-length)
-+ (mode x-mode)
-+ (.splice encode (.unsplice x-encode))
-+ (.splice decode (.unsplice x-decode))
-+ )
-+)
-+
-+(dcrisf
-+ f-indir-pc+-byte "[PC+] 8-bit field" (SIGN-OPT)
-+ 16 16
-+ 15 16 ; CGEN-FIXME: Should be 7 8
-+ INT (#f) (#f)
-+)
-+
-+(dcrisf
-+ f-indir-pc+-word "[PC+] 16-bit field" (SIGN-OPT)
-+ 16 16 15 16 INT (#f) (#f)
-+)
-+
-+; CGEN-FIXME: I shouldn't have to use trunc here, should I?
-+; Sign-extension should be implicit through use of SI (as opposed to USI)
-+; and additionally through SIGN-OPT. The ext isn't actually needed, but
-+; having it there rather than implicit makes more sense than to just have
-+; the trunc.
-+(dcrisf
-+ f-indir-pc+-word-pcrel "[PC+] PC-relative 16-bit field"
-+ (PCREL-ADDR SIGN-OPT)
-+ 16 16 15 16 SI
-+ ((value pc) (sub SI value (add SI pc (if SI current-mach-is-v32 0 4))))
-+ ((value pc) (add SI (ext SI (trunc HI value)) (add SI pc (if SI current-mach-is-v32 0 4))))
-+)
-+
-+(dcrisf
-+ f-indir-pc+-dword "PC autoincrement - 32-bit field" (SIGN-OPT)
-+ 16 32 31 32 INT (#f) (#f)
-+)
-+
-+(dcrisf
-+ f-indir-pc+-dword-pcrel
-+ "[PC+] PC-relative 32-bit field, counted from start of insn"
-+ (SIGN-OPT MACH-V32 PCREL-ADDR)
-+ 16 32 31 32 INT
-+ ((value pc) (sub SI value pc))
-+ ((value pc) (add SI pc value))
-+)
-+
-+;;;;;;;;;;;;;;;;;; -insn-enum -normal-operand -normal-derived-operand
-+
-+;; How different fields are transformed into something we put in insns.
-+
-+; m := size modifier, byte (00), word (01) or dword (10)
-+; z := size modifier, byte (0) or word (1)
-+; (For the latter, the "higher" bit is always 0, mapping trivially on m.)
-+
-+(define-normal-insn-enum
-+ insn-size
-+ "Standard instruction operand size"
-+ ()
-+ SIZE_
-+ f-size
-+ ("BYTE" "WORD" "DWORD" "FIXED")
-+)
-+
-+; The mode field for insns with "s" operand (perhaps with a partial set of
-+; operand types).
-+(define-normal-insn-enum
-+ insn-mode
-+ "Standard instruction addressing modes"
-+ ()
-+ MODE_
-+ f-mode
-+ ("QUICK_IMMEDIATE" "REGISTER" "INDIRECT" "AUTOINCREMENT")
-+)
-+
-+(define-normal-insn-enum
-+ insn-memoryness-mode
-+ "Whether the operand is indirect"
-+ ()
-+ MODEMEMP_
-+ f-membit
-+ ("NO" "YES")
-+)
-+
-+; FIXME: Needed?
-+(define-normal-insn-enum
-+ insn-memincness-mode
-+ "Whether the indirect operand is autoincrement"
-+ ()
-+ MODEINCP_
-+ f-memmode
-+ ("NO" "YES")
-+)
-+
-+; Special semantics for multiply.
-+(define-pmacro MODE_MULU MODE_INDIRECT)
-+(define-pmacro MODE_MULS MODE_AUTOINCREMENT)
-+
-+(define-normal-insn-enum
-+ insn-signed-size
-+ "Signed instruction operand size"
-+ ()
-+ SIGNED_
-+ f-size
-+ ("UNDEF_SIZE_0" "UNDEF_SIZE_1" "BYTE" "WORD")
-+)
-+
-+(define-normal-insn-enum
-+ insn-unsigned-size
-+ "Unsigned instruction operand size"
-+ ()
-+ UNSIGNED_
-+ f-size
-+ ("BYTE" "WORD" "UNDEF_SIZE_2" "UNDEF_SIZE_3")
-+)
-+
-+; Rs := source operand, register addressing mode
-+(dnop Rs "Source general register" () h-gr f-source)
-+
-+; [Rs] := source operand, indirect addressing mode
-+; = MODE_INDIRECT Rs
-+
-+; [Rs+] := source operand, autoincrement addressing mode (see note!)
-+; = MODE_AUTOINCREMENT Rs
-+
-+; The union of [Rs] and [Rs(+)]
-+; = MODEMEMP_YES Rs
-+
-+; Whether an indirect operand is increment can be obtained as an operand by
-+; = inc
-+(dnop inc "Incrementness of indirect operand" () h-inc f-memmode)
-+
-+; or as an affirmative specifier
-+; = MODEINCP_YES
-+; (or MODEINCP_NO)
-+
-+; s := source operand, any of the modes Rs, [Rs] or [Rs+]
-+; No common operand; each are handled separately, using the above definitions.
-+
-+; Ps := source operand, special register
-+; It's in the field usually used for the destination.
-+(dnop Ps "Source special register" () h-sr f-dest)
-+
-+; Ss := source operand, support register
-+; It's in the field usually used for the destination.
-+(dnop Ss "Source support register" (MACH-V32) h-supr f-dest)
-+
-+; Sd := source operand, support register
-+(dnop Sd "Destination support register" (MACH-V32) h-supr f-dest)
-+
-+; i := 6-bit signed immediate operand
-+(dnop i "Quick signed 6-bit" () h-sint f-s6)
-+
-+; j := 6-bit unsigned immediate operand
-+(dnop j "Quick unsigned 6-bit" () h-uint f-u6)
-+
-+; c := 5-bit immediate shift value
-+(dnop c "Quick unsigned 5-bit" () h-uint f-u5)
-+
-+; qo := 4-bit unsigned immediate operand
-+(dnop qo "Quick unsigned 4-bit, PC-relative" (MACH-V32) h-addr f-qo)
-+
-+; Rd := destination operand, register addressing mode
-+(dnop Rd "Destination general register" () h-gr f-dest)
-+(define-pmacro Rd-sfield Rs)
-+(define-pmacro Rs-dfield Rd)
-+
-+; [Rd] := destination operand, indirect addressing mode
-+; = MODE_INDIRECT Rd
-+
-+; [Rd+] := destination operand, autoincrement addressing mode
-+; = MODE_AUTOINCREMENT Rd
-+
-+; [PC+] := destination operand PC, autoincrement addressing mode
-+; = MODE_AUTOINCREMENT (f-dest 15) X
-+; where X is one of sconst8, uconst8, sconst16, uconst16 or const32.
-+(dnop sconst8 "Signed byte [PC+]" () h-sint f-indir-pc+-byte)
-+(dnop uconst8 "Unsigned byte [PC+]" () h-uint f-indir-pc+-byte)
-+(dnop sconst16 "Signed word [PC+]" () h-sint f-indir-pc+-word)
-+(dnop uconst16 "Unsigned word [PC+]" () h-uint f-indir-pc+-word)
-+(dnop const32 "Dword [PC+]" () h-uint f-indir-pc+-dword)
-+(dnop const32-pcrel "Dword [PC+]" () h-addr f-indir-pc+-dword-pcrel)
-+
-+; d := destination operand, any of the modes Rd, [Rd] or [Rd+]
-+; No common operand; each are handled separately, using the above definitions.
-+
-+; Pd := destination operand, special register
-+(dnop Pd "Destination special register" () h-sr f-dest)
-+
-+; o := 8-bit immediate offset value
-+(dnop o "Signed 8-bit" () h-sint f-s8)
-+
-+; The division of operand semantics and insn fields in the CRIS
-+; instruction set reference doesn't permit a simple mapping to a
-+; simulator description, and the division of insn fields and
-+; semantics in CGEN is not between the define-normal-ifield
-+; vs. define-normal-operand. For example, the "o" operand is
-+; PC-relative for branch insns, as described by the CGEN f-disp9
-+; field.
-+; See comment at f-disp9; thankfully the mach
-+; attribute works here to have two different definitions by the
-+; same name.
-+(dnop o-pcrel "9-bit signed immediate PC-rel"
-+ ()
-+ h-iaddr f-disp9)
-+
-+(dnop o-word-pcrel "16-bit signed immediate PC-rel"
-+ ()
-+ h-iaddr f-indir-pc+-word-pcrel)
-+
-+; cc := condition code
-+(dnop cc "Condition codes" () h-ccode f-dest)
-+
-+; n := 4 bit breakpoint exception vector index
-+(dnop n "Quick unsigned 4-bit" () h-uint f-u4)
-+
-+; The "option" in the SWAP insn.
-+(dnop swapoption "Swap option" () h-swap f-dest)
-+
-+(dnop list-of-flags "Flag bits as operand" () h-flagbits f-dstsrc)
-+
-+; Enumerations for insn codes, for use in insn definitions
-+; instead of raw numbers. See it as operand definitions for the
-+; opcode field.
-+
-+(define-normal-insn-enum
-+ insn-qi-opc
-+ "Insns for MODE_QUICK_IMMEDIATE"
-+ ()
-+ Q_
-+ f-opcode
-+ ("BCC_0" "BCC_1" "BCC_2" "BCC_3"
-+ "BDAP_0" "BDAP_1" "BDAP_2" "BDAP_3"
-+ "ADDQ" "MOVEQ" "SUBQ" "CMPQ"
-+ "ANDQ" "ORQ" "ASHQ" "LSHQ")
-+)
-+
-+(define-normal-insn-enum
-+ insn-qihi-opc
-+ "Same as insn-qi-opc, though using only the high two bits of the opcode"
-+ ()
-+ QHI_
-+ f-opcode-hi
-+ ("BCC" "BDAP" "OTHER2" "OTHER3")
-+)
-+(define-pmacro QHI_ADDOQ QHI_BDAP)
-+
-+(define-normal-insn-enum
-+ insn-r-opc
-+ "Insns for MODE_REGISTER and either SIZE_BYTE, SIZE_WORD or SIZE_DWORD"
-+ ()
-+ R_
-+ f-opcode
-+ ("ADDX" "MOVX" "SUBX" "LSL"
-+ "ADDI" "BIAP" "NEG" "BOUND"
-+ "ADD" "MOVE" "SUB" "CMP"
-+ "AND" "OR" "ASR" "LSR")
-+)
-+(define-pmacro R_ADDI_ACR R_BIAP)
-+
-+(define-normal-insn-enum
-+ insn-rfix-opc
-+ "Insns for MODE_REGISTER and SIZE_FIXED"
-+ ()
-+ RFIX_
-+ f-opcode
-+ ("ADDX" "MOVX" "SUBX" "BTST"
-+ "SCC" "ADDC" "SETF" "CLEARF"
-+ "MOVE_R_S" "MOVE_S_R" "ABS" "DSTEP"
-+ "LZ" "SWAP" "XOR" "MSTEP")
-+)
-+(define-pmacro RFIX_MCP RFIX_MSTEP)
-+
-+(define-normal-insn-enum
-+ insn-indir-opc
-+ "Insns for (MODE_INDIRECT or MODE_AUTOINCREMENT) and either SIZE_BYTE, SIZE_WORD or SIZE_DWORD"
-+ ()
-+ INDIR_
-+ f-opcode
-+ ("ADDX" "MOVX" "SUBX" "CMPX"
-+ "MUL" "BDAP_M" "ADDC" "BOUND"
-+ "ADD" "MOVE_M_R" "SUB" "CMP"
-+ "AND" "OR" "TEST" "MOVE_R_M")
-+)
-+(define-pmacro INDIR_ADDO INDIR_BDAP_M)
-+
-+(define-normal-insn-enum
-+ insn-infix-opc
-+ "Insns for (MODE_INDIRECT or MODE_AUTOINCREMENT) and SIZE_FIXED"
-+ ()
-+ INFIX_
-+ f-opcode
-+ ("ADDX" "MOVX" "SUBX" "CMPX"
-+ "JUMP_M" "DIP" "JUMP_R" "BCC_M"
-+ "MOVE_M_S" "MOVE_S_M" "BMOD" "BSTORE"
-+ "RBF" "SBFS" "MOVEM_M_R" "MOVEM_R_M")
-+)
-+
-+(define-pmacro INFIX_MOVE_SS INFIX_SBFS)
-+(define-pmacro INFIX_LAPC INFIX_DIP)
-+(define-pmacro INFIX_RFE INFIX_JUMP_M)
-+(define-pmacro INFIX_RFN INFIX_JUMP_M)
-+(define-pmacro INFIX_HALT INFIX_JUMP_M)
-+(define-pmacro INFIX_SFE INFIX_JUMP_M)
-+(define-pmacro INFIX_RFG INFIX_JUMP_M)
-+(define-pmacro INFIX_JAS_R INFIX_JUMP_R)
-+(define-pmacro INFIX_JAS_M INFIX_JUMP_R)
-+(define-pmacro INFIX_JASC INFIX_RBF)
-+(define-pmacro INFIX_JUMP_P INFIX_BCC_M)
-+(define-pmacro INFIX_BAS INFIX_BMOD)
-+(define-pmacro INFIX_BASC INFIX_BSTORE)
-+(define-pmacro INFIX_BREAK INFIX_JUMP_M)
-+(define-pmacro INFIX_FIDXI INFIX_JUMP_M)
-+(define-pmacro INFIX_FIDXD INFIX_BAS)
-+(define-pmacro INFIX_FTAGI INFIX_JUMP_M)
-+(define-pmacro INFIX_FTAGD INFIX_BAS)
-+
-+; Classes of insns:
-+; Move-to-register, move-to-memory, move-to/from-other-register,
-+; logical, arithmetic, branch.
-+; Classes of operands:
-+; quick, register, memory-indirect, memory-postinc.
-+
-+
-+;;;;;;;;;;;;;;;;;; -normal-insn
-+
-+(define-pmacro (dni-bwd-attr name comment attr syntax fmt fsem timing)
-+ (begin
-+ (dni (.sym name .b) (.str "byte " comment) attr (.str name ".b " syntax)
-+ (.splice (.unsplice fmt) SIZE_BYTE)
-+ (fsem QI)
-+ timing)
-+ (dni (.sym name .w) (.str "word " comment) attr (.str name ".w " syntax)
-+ (.splice (.unsplice fmt) SIZE_WORD)
-+ (fsem HI)
-+ timing)
-+ (dni (.sym name .d) (.str "dword " comment) attr (.str name ".d " syntax)
-+ (.splice (.unsplice fmt) SIZE_DWORD)
-+ (fsem SI)
-+ timing))
-+)
-+
-+(define-pmacro (dni-cdt-attr name comment attr syntax fmt semantics)
-+ "dni without specifying timing"
-+ (dni name comment attr syntax fmt semantics (cris-timing))
-+)
-+
-+(define-pmacro (dni-cdt-bwd-attr name comment attr syntax fmt fsem)
-+ (begin
-+ (dni-cdt-attr (.sym name .b-r) (.str "byte " comment) attr (.str name ".b " syntax)
-+ (.splice (.unsplice fmt) SIZE_BYTE)
-+ (fsem QI))
-+ (dni-cdt-attr (.sym name .w-r) (.str "word " comment) attr (.str name ".w " syntax)
-+ (.splice (.unsplice fmt) SIZE_WORD)
-+ (fsem HI))
-+ (dni-cdt-attr (.sym name .d-r) (.str "dword " comment) attr (.str name ".d " syntax)
-+ (.splice (.unsplice fmt) SIZE_DWORD)
-+ (fsem SI)))
-+)
-+
-+; Some convenience macros based on the above ones.
-+(define-pmacro (dni-cdt-bwd name comment syntax fmt fsem)
-+ (dni-cdt-bwd-attr name comment () syntax fmt fsem)
-+)
-+
-+(define-pmacro (dni-bwd name comment syntax fmt fsem timing)
-+ (dni-bwd-attr comment () syntax fmt fsem timing)
-+)
-+
-+(define-pmacro-map
-+ (((dni-cdt name comment syntax fmt semantics)
-+ (dni-cdt-attr name comment () syntax fmt semantics))
-+ ((dni-c-QI-attr name comment attr syntax fmt fsem)
-+ (dni name comment attr syntax fmt fsem (cris-timing-const-QI)))
-+ ((dni-c-HI-attr name comment attr syntax fmt fsem)
-+ (dni name comment attr syntax fmt fsem (cris-timing-const-HI)))
-+ ((dni-c-SI-attr name comment attr syntax fmt fsem)
-+ (dni name comment attr syntax fmt fsem (cris-timing-const-SI))))
-+)
-+
-+(define-pmacro-map
-+ (((dni-c-QI name comment syntax fmt fsem)
-+ (dni-c-QI-attr name comment () syntax fmt fsem))
-+ ((dni-c-HI name comment syntax fmt fsem)
-+ (dni-c-HI-attr name comment () syntax fmt fsem))
-+ ((dni-c-SI name comment syntax fmt fsem)
-+ (dni-c-SI-attr name comment () syntax fmt fsem)))
-+)
-+
-+; These flags are both cleared by all insns except prefixes (before
-+; CRISv32) and "setf x", so we put them in a handy macro.
-+(define-pmacro
-+ (reset-x-p)
-+ (sequence
-+ ()
-+ (set xbit 0)
-+ (set prefix-set 0))
-+)
-+
-+; NOP | 0 0 0 0| 0 1| 0 1 0 0| 0 0| 1 1 1 1|
-+; (For V32, "SETF" (no flags) is used.)
-+(dni-cdt-attr
-+ nop "nop" (MACH-PC) "nop"
-+ (+ (f-operand2 0) R_ADDI MODE_REGISTER SIZE_BYTE (f-operand1 15))
-+ (reset-x-p)
-+)
-+
-+; Pre- and v32+ variants MOVE insns set flags differently. These two
-+; macros for flag settings are meant to be used in all MOVE insns.
-+(define-pmacro (setf-moveq value)
-+ (sequence
-+ ()
-+ (set-quiet nbit-move (lt SI value 0))
-+ (set-quiet zbit-move (andif BI (eq SI value 0) (if BI xbit zbit 1)))
-+ (set-quiet cbit-move 0)
-+ (set-quiet vbit-move 0)
-+ (reset-x-p))
-+)
-+
-+(define-pmacro (setf-move size value)
-+ (sequence
-+ ()
-+ (set nbit (lt size value 0))
-+ (set zbit (andif BI (eq size value 0) (if BI xbit zbit 1)))
-+ (set-quiet cbit-move 0)
-+ (set-quiet vbit-move 0)
-+ (reset-x-p))
-+)
-+; The CGEN binop-with-bit operations are not documented well enough that I
-+; trust their semantics to remain stable. Better define local ones: the
-+; semantics become explicit.
-+(define-pmacro-map
-+ (((add-overflow size R D S carry)
-+ (orif BI (andif BI (andif BI (lt size S 0) (lt size D 0)) (ge size R 0))
-+ (andif BI (andif BI (ge size S 0) (ge size D 0)) (lt size R 0))))
-+ ((add-carry size R D S carry)
-+ (orif BI (andif BI (lt size S 0) (lt size D 0))
-+ (orif BI (andif BI (lt size D 0) (ge size R 0))
-+ (andif BI (lt size S 0) (ge size R 0)))))
-+ ((sub-overflow size R D S carry)
-+ (orif BI (andif BI (andif BI (ge size S 0) (lt size D 0)) (ge size R 0))
-+ (andif BI (andif BI (lt size S 0) (ge size D 0)) (lt size R 0))))
-+ ((sub-carry size R D S carry)
-+ (orif BI (andif BI (lt size S 0) (ge size D 0))
-+ (orif BI (andif BI (ge size D 0) (lt size R 0))
-+ (andif BI (lt size S 0) (lt size R 0)))))
-+ ; Only valid for size := DI
-+ ((mulu-overflow size R D S carry)
-+ (ne DI R (zext DI (trunc SI R))))
-+ ((mulu-carry size R D S carry)
-+ (andif current-mach-is-v32 carry))
-+ ((muls-overflow size R D S carry)
-+ (ne DI R (ext DI (trunc SI R))))
-+ ((muls-carry size R D S carry)
-+ (andif current-mach-is-v32 carry)))
-+)
-+
-+(define-pmacro (setf-arit2 size op source1 source2 result carryin carryout)
-+ "Set no-prefix, x=0, carryout, v, z and n according to operation OP in size SIZE"
-+ (sequence
-+ ()
-+ (set carryout ((.sym op -carry) size result source1 source2 carryin))
-+ (set nbit (lt size result 0))
-+ (set zbit (andif BI (eq size result 0) (orif BI zbit (not BI xbit))))
-+ (set vbit ((.sym op -overflow) size result source1 source2 carryin))
-+ (reset-x-p))
-+)
-+(define-pmacro (setf-arit size op source1 source2 result carry)
-+ "Set no-prefix, x=0, c, v, z and n according to operation OP in size SIZE"
-+ (setf-arit2 size op source1 source2 result carry cbit)
-+)
-+
-+; Let's have convienence macros for arithmetic, including evaluation of the
-+; operation, destination modification, flag setting and carry propagation.
-+(define-pmacro
-+ (cris-arit6-int arit size fdest fdest_op srcop1 srcop2 carryout carryin)
-+ "Core for performing some three-operand arithmetic with carry as parameter"
-+ (sequence
-+ ((size tmpopd) (size tmpops) (BI carry) (size newval))
-+ (set tmpops srcop2)
-+ (set tmpopd srcop1)
-+ (set carry carryin)
-+ (set newval ((.sym arit c) tmpopd tmpops (if BI (eq xbit 0) 0 carry)))
-+ (fdest size fdest_op newval)
-+ (setf-arit2 size arit tmpopd tmpops newval carry carryout))
-+)
-+
-+(define-pmacro
-+ (cris-arit5-int arit size destregno srcop1 srcop2 carryout carryin)
-+ "As cris-arit6-int, but to set a part of a general register"
-+ (cris-arit6-int
-+ arit
-+ size
-+ (.pmacro (sz regno val) (set-subreg-gr sz regno val))
-+ destregno
-+ srcop1
-+ srcop2
-+ carryout
-+ carryin)
-+)
-+
-+(define-pmacro (cris-arit5 arit size destreg srcop1 srcop2 carryout carryin)
-+ "As cris-arit5-int, but takes a register as parameter, not register number"
-+ (cris-arit5-int arit size (regno destreg) srcop1 srcop2 carryout carryin)
-+)
-+(define-pmacro (cris-arit3-int arit size destregno srcop1 srcop2)
-+ "As cris-arit5-int, but with carry-in same as carry-out"
-+ (cris-arit5-int arit size destregno srcop1 srcop2 cbit cbit)
-+)
-+(define-pmacro (cris-arit3 arit size destreg srcop1 srcop2)
-+ "As cris-arit3-int, but takes a register as parameter, not register number"
-+ (cris-arit3-int arit size (regno destreg) srcop1 srcop2)
-+)
-+(define-pmacro (cris-arit arit size destreg srcop)
-+ "As cris-arit3, but with destination same as srcop1"
-+ (cris-arit3 arit size destreg destreg srcop)
-+)
-+(define-pmacro (cris-arit-3op arit size destsrcop2 srcop1 dest-3op)
-+ "Similar to cris-arit3-int, but for prefixed operand only"
-+ (cris-arit3-int arit size
-+ (if SI (andif prefix-set (not inc))
-+ (regno dest-3op)
-+ (regno destsrcop2))
-+ destsrcop2 srcop1)
-+)
-+
-+; Convenience macros to select a part of a value and its complement, for
-+; the <op>.b, <op>.w and <op>.d operations.
-+(define-pmacro (QI-part val) (and SI val #xff))
-+(define-pmacro (non-QI-part val) (and SI val #xffffff00))
-+(define-pmacro (HI-part val) (and SI val #xffff))
-+(define-pmacro (non-HI-part val) (and SI val #xffff0000))
-+(define-pmacro (SI-part val) val)
-+(define-pmacro (non-SI-part val) 0)
-+(define-pmacro
-+ (set-subreg-gr-bw BWD gregno newval)
-+ "Set a byte or word part or full dword of a general register"
-+ (sequence
-+ ((SI oldregval))
-+ (set oldregval (reg h-raw-gr gregno))
-+ (set (reg h-gr gregno)
-+ (or SI ((.sym BWD -part) newval) ((.sym non- BWD -part) oldregval))))
-+)
-+(define-pmacro (set-subreg-gr BWD gregno newval)
-+ ((.sym set-subreg-gr- BWD) BWD gregno newval)
-+)
-+(define-pmacro (set-subreg-gr-SI SI gregno newval)
-+ (set (reg h-gr gregno) newval)
-+)
-+(define-pmacro set-subreg-gr-HI set-subreg-gr-bw)
-+(define-pmacro set-subreg-gr-QI set-subreg-gr-bw)
-+
-+; MOVE.m Rs,Rd [ Rd | 011001mm | Rs ]
-+(dni-cdt-bwd
-+ move "move.m r,R"
-+ "move.m ${Rs},${Rd}"
-+ (+ Rd MODE_REGISTER R_MOVE Rs)
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ((BWD newval))
-+ (set newval Rs)
-+ (set-subreg-gr BWD (regno Rd) newval)
-+ (setf-move BWD newval)))
-+)
-+
-+; MOVE.D PC,Rd [ Rd | 01100110 | 1111 ]
-+; This insn is used in PIC code to find out the code address. It's an
-+; exception to the (guarded) non-implementation of PC operands in this
-+; file.
-+(dni-cdt-attr
-+ movepcr "move.d PC,R"
-+ (MACH-PC UNCOND-CTI)
-+ "move.d PC,${Rd}"
-+ (+ Rd MODE_REGISTER R_MOVE SIZE_DWORD (f-source 15))
-+ (sequence
-+ ((SI pcval))
-+ (set pcval (add SI pc 2))
-+ (set Rd pcval)
-+ (setf-move SI pcval))
-+)
-+
-+; MOVEQ i,Rd [ Rd | 001001 | i ]
-+(dni-cdt
-+ moveq "moveq"
-+ "moveq $i,$Rd"
-+ (+ Rd MODE_QUICK_IMMEDIATE Q_MOVEQ i)
-+ (sequence
-+ ((SI newval))
-+ (set newval i)
-+ (set Rd newval)
-+ (setf-moveq newval))
-+)
-+
-+(define-pmacro (dni-cdt-sbw name comment syntax fmt fsem)
-+ "Insn generator for insns with signed <op>.b and <op>.w variants"
-+ (begin
-+ (dni-cdt
-+ (.sym name .b-r) (.str "byte " comment) (.str name ".b " syntax)
-+ (.splice (.unsplice fmt) SIGNED_BYTE)
-+ (fsem QI))
-+ (dni-cdt
-+ (.sym name .w-r) (.str "word " comment) (.str name ".w " syntax)
-+ (.splice (.unsplice fmt) SIGNED_WORD)
-+ (fsem HI)))
-+)
-+
-+; MOVS.z Rs,Rd [ Rd | 0100011z | Rs ]
-+(dni-cdt-sbw
-+ movs "movs.m r,R"
-+ "movs.m ${Rs},${Rd}"
-+ (+ Rd MODE_REGISTER R_MOVX Rs)
-+ (.pmacro
-+ (BW)
-+ (sequence
-+ ((BW newval))
-+ (set newval Rs)
-+ (set Rd (ext SI newval))
-+ (setf-move SI newval)))
-+)
-+
-+(define-pmacro (dni-cdt-ubw name comment syntax fmt fsem)
-+ "Similar to dni-cdt-sbw but for unsigned operations"
-+ (begin
-+ (dni-cdt
-+ (.sym name .b-r) (.str "byte " comment) (.str name ".b " syntax)
-+ (.splice (.unsplice fmt) UNSIGNED_BYTE)
-+ (fsem QI))
-+ (dni-cdt
-+ (.sym name .w-r) (.str "word " comment) (.str name ".w " syntax)
-+ (.splice (.unsplice fmt) UNSIGNED_WORD)
-+ (fsem HI)))
-+)
-+
-+; MOVU.z Rs,Rd [ Rd | 0100010z | Rs ]
-+(dni-cdt-ubw
-+ movu "movu.m r,R"
-+ "movu.m ${Rs},${Rd}"
-+ (+ Rd MODE_REGISTER R_MOVX Rs)
-+ (.pmacro
-+ (BW)
-+ (sequence
-+ ((BW newval))
-+ (set newval Rs)
-+ (set Rd (zext SI newval))
-+ (setf-move SI newval)))
-+)
-+
-+; (MOVE.m [PC+],Rd [ Rd | 111001mm | 1111 ])
-+; For the moment, it doesn't seem worthwhile to make a dni-c-bwd macro;
-+; too many places to parametrize.
-+(dni-c-QI
-+ movecbr "move.b [PC+],R"
-+ "move.b ${sconst8},${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_MOVE_M_R SIZE_BYTE (f-source 15) sconst8)
-+ (sequence
-+ ((QI newval))
-+ (set newval sconst8)
-+ (set-subreg-gr QI (regno Rd) newval)
-+ (setf-move QI newval))
-+)
-+
-+(dni-c-HI
-+ movecwr "move.w [PC+],R"
-+ "move.w ${sconst16},${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_MOVE_M_R SIZE_WORD (f-source 15) sconst16)
-+ (sequence
-+ ((HI newval))
-+ (set newval sconst16)
-+ (set-subreg-gr HI (regno Rd) newval)
-+ (setf-move HI newval))
-+)
-+
-+(dni-c-SI
-+ movecdr "move.d [PC+],R"
-+ "move.d ${const32},${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_MOVE_M_R SIZE_DWORD (f-source 15) const32)
-+ (sequence
-+ ((SI newval))
-+ (set newval const32)
-+ (set Rd newval)
-+ (setf-move SI newval))
-+)
-+
-+; (MOVS.z [PC+],Rd [ Rd | 1100011z | 1111 ])
-+; Similarly, no likely net improvement for a dni-c-bw.
-+(dni-c-QI
-+ movscbr "movs.b [PC+],R"
-+ "movs.b ${sconst8},${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_MOVX SIGNED_BYTE (f-source 15) sconst8)
-+ (sequence
-+ ((SI newval))
-+ ; FIXME: Make trunc unnecessary.
-+ (set newval (ext SI (trunc QI sconst8)))
-+ (set Rd newval)
-+ (setf-move SI newval))
-+)
-+
-+(dni-c-HI
-+ movscwr "movs.w [PC+],R"
-+ "movs.w ${sconst16},${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_MOVX SIGNED_WORD (f-source 15) sconst16)
-+ (sequence
-+ ((SI newval))
-+ ; FIXME: Make trunc unnecessary.
-+ (set newval (ext SI (trunc HI sconst16)))
-+ (set Rd newval)
-+ (setf-move SI newval))
-+)
-+
-+; (MOVU.z [PC+],Rd [ Rd | 1100010z | 1111 ])
-+(dni-c-QI
-+ movucbr "movu.b [PC+],R"
-+ "movu.b ${uconst8},${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_MOVX UNSIGNED_BYTE (f-source 15) uconst8)
-+ (sequence
-+ ((SI newval))
-+ ; FIXME: Make trunc unnecessary.
-+ (set newval (zext SI (trunc QI uconst8)))
-+ (set Rd newval)
-+ (setf-move SI newval))
-+)
-+
-+(dni-c-HI
-+ movucwr "movu.w [PC+],R"
-+ "movu.w ${uconst16},${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_MOVX UNSIGNED_WORD (f-source 15) uconst16)
-+ (sequence
-+ ((SI newval))
-+ ; FIXME: Make trunc unnecessary.
-+ (set newval (zext SI (trunc HI uconst16)))
-+ (set Rd newval)
-+ (setf-move SI newval))
-+)
-+
-+; ADDQ j,Rd [ Rd | 001000 | j ]
-+(dni-cdt
-+ addq "addq j,Rd"
-+ "addq $j,$Rd"
-+ (+ Rd MODE_QUICK_IMMEDIATE Q_ADDQ j)
-+ (cris-arit add SI Rd j)
-+)
-+
-+; SUBQ j,Rd [ Rd | 001010| j ]
-+(dni-cdt
-+ subq "subq j,Rd"
-+ "subq $j,$Rd"
-+ (+ Rd MODE_QUICK_IMMEDIATE Q_SUBQ j)
-+ (cris-arit sub SI Rd j)
-+)
-+
-+; Convenience macros for insns with a memory operand.
-+(define-pmacro
-+ (dni-cmt-attr-tim name comment attr syntax fmt semantics timing)
-+ "dni with memory-access"
-+ (dni name comment attr syntax
-+ ; Specifying MODE_INDIRECT and MODE_AUTOINCREMENT in this
-+ ; manner makes the autoincrementness handily available.
-+ ; It also effectively excludes non-memory use of dni-cmt.
-+ (.splice (.unsplice fmt) MODEMEMP_YES inc)
-+ semantics
-+ timing)
-+)
-+
-+(define-pmacro (dni-cmt-attr name comment attr syntax fmt semantics)
-+ "dni with read memory-access timing"
-+ (dni-cmt-attr-tim name comment attr syntax fmt semantics
-+ (cris-mem-timing))
-+)
-+
-+(define-pmacro (dni-cmwt-attr name comment attr syntax fmt semantics)
-+ "dni with write memory-access timing"
-+ (dni-cmt-attr-tim name comment attr syntax fmt semantics
-+ (cris-mem-write-timing))
-+)
-+
-+(define-pmacro QI-size 1)
-+(define-pmacro HI-size 2)
-+(define-pmacro SI-size 4)
-+
-+(define-pmacro (cris-get-mem size regop)
-+ "Handle reading memory in <size>, with source address register\
-+ (read once, maybe set once) in <regop> or prefixed"
-+ (sequence
-+ size
-+ ((SI addr) (size tmp-mem) (BI postinc))
-+
-+ ; Cache the incrementness of the operand.
-+ (set postinc inc)
-+
-+ ; Get the address from somewhere.
-+ (set addr
-+ (if SI (eq prefix-set 0)
-+ ; If the insn was prefixed, it's in the prefix-register.
-+ regop
-+ prefixreg))
-+
-+ ; Get the memory contents.
-+ (set tmp-mem (mem size addr))
-+
-+ ; For non-prefixed post-increment, we increment the address by the
-+ ; size of the memory access.
-+ (if (ne postinc 0)
-+ (sequence
-+ ()
-+ (if (eq prefix-set 0)
-+ (set addr (add addr (.sym size -size))))
-+ ; Update the source-register for post-increments.
-+ (set regop addr)))
-+
-+ ; Don't forget the return-value.
-+ tmp-mem)
-+)
-+
-+(define-pmacro (cris-set-mem size regop value)
-+ "Handle writing <value> of <size> to memory, with memory address register\
-+ (read once, maybe set once) in <regop> or prefixed."
-+ (sequence
-+ ((SI addr) (BI postinc))
-+
-+ ; Cache the incrementness of the operand.
-+ (set postinc inc)
-+
-+ ; Get the address from somewhere.
-+ (set addr
-+ (if SI (eq prefix-set 0)
-+ ; If the insn was prefixed, it's in the prefix-register.
-+ regop
-+ prefixreg))
-+
-+ ; Set the memory contents. Integral-write semantics apply.
-+ ; FIXME: currently v32 only; when proper semantics needed, fix v10.
-+ (if (andif current-mach-is-v32 (ne xbit 0))
-+ (if (eq pbit 0)
-+ (sequence
-+ ()
-+ (set (mem size addr) value)
-+ ; Write failures are signalled (by whatever entity "sends
-+ ; the signal") by setting P at time of the write above, if X
-+ ; is set. Here, we just need to copy P into C.
-+ (set cbit pbit))
-+ (set cbit 1))
-+ (set (mem size addr) value))
-+
-+ ; For non-prefixed post-increment, we increment the address by the
-+ ; size of the memory access. As for the integral-write, this needs to
-+ ; be tweaked for pre-v32: increment should have been performed if
-+ ; there's a fault at the memory access above.
-+ (if (ne postinc 0)
-+ (sequence
-+ ()
-+ (if (eq prefix-set 0)
-+ (set addr (add addr (.sym size -size))))
-+ ; Update the source-register for post-increments.
-+ (set regop addr))))
-+)
-+
-+(define-pmacro
-+ (dni-cmt-bwd-attr-tim name comment attr syntax fmt fsem timing)
-+ "Core generator macro for insns with <op>.b, <op>.w and <op>.d variants\
-+ and a memory operand."
-+ (begin
-+ (dni-cmt-attr-tim
-+ (.sym name .b-m)
-+ (.str "byte mem " comment)
-+ attr
-+ (.str name ".b " syntax)
-+ (.splice (.unsplice fmt) SIZE_BYTE)
-+ (fsem QI)
-+ timing)
-+ (dni-cmt-attr-tim
-+ (.sym name .w-m)
-+ (.str "word mem " comment)
-+ attr
-+ (.str name ".w " syntax)
-+ (.splice (.unsplice fmt) SIZE_WORD)
-+ (fsem HI)
-+ timing)
-+ (dni-cmt-attr-tim
-+ (.sym name .d-m)
-+ (.str "dword mem " comment)
-+ attr
-+ (.str name ".d " syntax)
-+ (.splice (.unsplice fmt) SIZE_DWORD)
-+ (fsem SI)
-+ timing))
-+)
-+
-+; Further refinement macros.
-+(define-pmacro (dni-cmt-bwd-attr name comment attr syntax fmt fsem)
-+ (dni-cmt-bwd-attr-tim name comment attr syntax fmt fsem
-+ (cris-mem-timing))
-+)
-+
-+(define-pmacro (dni-cmwt-bwd name comment syntax fmt fsem)
-+ (dni-cmt-bwd-attr-tim name comment () syntax fmt fsem
-+ (cris-mem-write-timing))
-+)
-+
-+(define-pmacro (dni-cmt-bwd name comment syntax fmt fsem)
-+ (dni-cmt-bwd-attr name comment () syntax fmt fsem)
-+)
-+
-+(define-pmacro (dni-cmt-sbw name comment syntax fmt fsem)
-+ "Core generator macro for insns with <op>.b and <op>.w variants\
-+ and a signed memory operand."
-+ (begin
-+ (dni-cmt-attr
-+ (.sym name .b-m) (.str "byte mem " comment)
-+ ()
-+ (.str name ".b " syntax)
-+ (.splice (.unsplice fmt) SIGNED_BYTE)
-+ (fsem QI))
-+ (dni-cmt-attr
-+ (.sym name .w-m) (.str "word mem " comment)
-+ ()
-+ (.str name ".w " syntax)
-+ (.splice (.unsplice fmt) SIGNED_WORD)
-+ (fsem HI)))
-+)
-+
-+(define-pmacro (dni-cmt-ubw name comment syntax fmt fsem)
-+ "Core generator macro for insns with <op>.b and <op>.w variants\
-+ and an unsigned memory operand."
-+ (begin
-+ (dni-cmt-attr
-+ (.sym name .b-m) (.str "byte mem " comment)
-+ ()
-+ (.str name ".b " syntax)
-+ (.splice (.unsplice fmt) UNSIGNED_BYTE)
-+ (fsem QI))
-+ (dni-cmt-attr
-+ (.sym name .w-m) (.str "word mem " comment)
-+ ()
-+ (.str name ".w " syntax)
-+ (.splice (.unsplice fmt) UNSIGNED_WORD)
-+ (fsem HI)))
-+)
-+
-+; CMP.m Rs,Rd [ Rd | 011011mm | Rs ]
-+(dni-cdt-bwd
-+ cmp-r "compare register to register"
-+ "$Rs,$Rd"
-+ (+ Rd MODE_REGISTER R_CMP Rs)
-+ (.pmacro
-+ (BWD)
-+ (cris-arit6-int
-+ sub BWD (.pmacro (sz regno val) (nop)) 0
-+ Rd Rs cbit cbit))
-+)
-+
-+; CMP.m [Rs],Rd [ Rd | 101011mm | Rs ]
-+; CMP.m [Rs+],Rd [ Rd | 111011mm | Rs ]
-+(dni-cmt-bwd
-+ cmp-m "compare memory to register"
-+ "[${Rs}${inc}],${Rd}"
-+ (+ INDIR_CMP Rs Rd)
-+ (.pmacro
-+ (BWD)
-+ (cris-arit6-int
-+ sub BWD (.pmacro (sz regno val) (nop)) 0
-+ Rd (cris-get-mem BWD Rs) cbit cbit))
-+)
-+
-+; (CMP.m [PC+],Rd [ Rd | 111011mm | 1111 ])
-+(dni-c-QI
-+ cmpcbr "cmp constant byte to register"
-+ "cmp.b $sconst8,$Rd"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_CMP SIZE_BYTE (f-source 15) sconst8)
-+ (cris-arit6-int
-+ sub QI (.pmacro (sz regno val) (nop)) 0
-+ Rd (trunc QI sconst8) cbit cbit)
-+)
-+
-+(dni-c-HI
-+ cmpcwr "cmp constant word to register"
-+ "cmp.w $sconst16,$Rd"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_CMP SIZE_WORD (f-source 15) sconst16)
-+ (cris-arit6-int
-+ sub HI (.pmacro (sz regno val) (nop)) 0
-+ Rd (trunc HI sconst16) cbit cbit)
-+)
-+
-+(dni-c-SI
-+ cmpcdr "cmp constant dword to register"
-+ "cmp.d $const32,$Rd"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_CMP SIZE_DWORD (f-source 15) const32)
-+ (cris-arit6-int
-+ sub SI (.pmacro (sz regno val) (nop)) 0
-+ Rd const32 cbit cbit)
-+)
-+
-+; CMPQ i,Rd [ Rd | 001011 | i ]
-+(dni-cdt
-+ cmpq "cmpq i,Rd"
-+ "cmpq $i,$Rd"
-+ (+ Rd MODE_QUICK_IMMEDIATE Q_CMPQ i)
-+ (cris-arit6-int
-+ sub SI (.pmacro (sz regno val) (nop)) 0
-+ Rd i cbit cbit)
-+)
-+
-+; CMPS.z [Rs],Rd [ Rd | 1000111z | Rs ]
-+; CMPS.z [Rs+],Rd [ Rd | 1100111z | Rs ]
-+(dni-cmt-sbw
-+ cmps-m "cmp sign-extended from memory to register"
-+ "[${Rs}${inc}],$Rd"
-+ (+ Rd INDIR_CMPX Rs)
-+ (.pmacro
-+ (BW)
-+ (cris-arit6-int
-+ sub SI (.pmacro (sz regno val) (nop)) 0
-+ Rd ((.sym BW -ext) (cris-get-mem BW Rs)) cbit cbit))
-+)
-+
-+; (CMPS.z [PC+],Rd [ Rd | 1100111z | 1111 ])
-+(dni-c-QI
-+ cmpscbr "cmp sign-extended constant byte to register"
-+ "[${Rs}${inc}],$Rd"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_CMPX SIGNED_BYTE (f-source 15) sconst8)
-+ (cris-arit6-int
-+ sub SI (.pmacro (sz regno val) (nop)) 0
-+ Rd (ext SI (trunc QI sconst8)) cbit cbit)
-+)
-+(dni-c-HI
-+ cmpscwr "cmp sign-extended constant word to register"
-+ "[${Rs}${inc}],$Rd"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_CMPX SIGNED_WORD (f-source 15) sconst16)
-+ (cris-arit6-int
-+ sub SI (.pmacro (sz regno val) (nop)) 0
-+ Rd (ext SI (trunc HI sconst16)) cbit cbit)
-+)
-+
-+; CMPU.z [Rs],Rd [ Rd | 1000110z | Rs ]
-+; CMPU.z [Rs+],Rd [ Rd | 1100110z | Rs ]
-+(dni-cmt-ubw
-+ cmpu-m "cmp zero-extended from memory to register"
-+ "[${Rs}${inc}],$Rd"
-+ (+ Rd INDIR_CMPX Rs)
-+ (.pmacro
-+ (BW)
-+ (cris-arit6-int
-+ sub SI (.pmacro (sz regno val) (nop)) 0
-+ Rd ((.sym BW -zext) (cris-get-mem BW Rs)) cbit cbit))
-+)
-+
-+; (CMPU.z [PC+],Rd [ Rd | 1100110z | 1111 ])
-+(dni-c-QI
-+ cmpucbr "cmp zero-extended constant byte to register"
-+ "[${Rs}${inc}],$Rd"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_CMPX UNSIGNED_BYTE (f-source 15) uconst8)
-+ (cris-arit6-int
-+ sub SI (.pmacro (sz regno val) (nop)) 0
-+ Rd (zext SI (trunc QI uconst8)) cbit cbit)
-+)
-+(dni-c-HI
-+ cmpucwr "cmp zero-extended constant word to register"
-+ "[${Rs}${inc}],$Rd"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_CMPX UNSIGNED_WORD (f-source 15) uconst16)
-+ (cris-arit6-int
-+ sub SI (.pmacro (sz regno val) (nop)) 0
-+ Rd (zext SI (trunc HI uconst16)) cbit cbit)
-+)
-+
-+; MOVE.m [Rs],Rd [ Rd | 101001mm | Rs ]
-+; MOVE.m [Rs+],Rd [ Rd | 111001mm | Rs ]
-+(dni-cmt-bwd
-+ move-m "move from memory to register"
-+ "[${Rs}${inc}],${Rd}"
-+ (+ INDIR_MOVE_M_R Rs Rd)
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ((SI tmp))
-+ (set tmp (cris-get-mem BWD Rs))
-+ (set-subreg-gr
-+ BWD
-+ (if SI (andif prefix-set (not inc)) (regno Rs) (regno Rd))
-+ tmp)
-+ (setf-move BWD tmp)))
-+)
-+
-+; MOVS.z [Rs],Rd [ Rd | 1000011z | Rs ]
-+; MOVS.z [Rs+],Rd [ Rd | 1100011z | Rs ]
-+(dni-cmt-sbw
-+ movs-m "movs from memory to register"
-+ "[${Rs}${inc}],${Rd}"
-+ (+ INDIR_MOVX Rs Rd)
-+ (.pmacro
-+ (BW)
-+ (sequence
-+ ((SI tmp))
-+ (set tmp (ext SI (cris-get-mem BW Rs)))
-+ (if (andif prefix-set (not inc))
-+ (set Rs tmp)
-+ (set Rd tmp))
-+ (setf-move SI tmp)))
-+)
-+
-+; MOVU.z [Rs],Rd [ Rd | 1000010z | Rs ]
-+; MOVU.z [Rs+],Rd [ Rd | 1100010z | Rs ]
-+(dni-cmt-ubw
-+ movu-m "movu from memory to register"
-+ "[${Rs}${inc}],${Rd}"
-+ (+ INDIR_MOVX Rs Rd)
-+ (.pmacro
-+ (BW)
-+ (sequence
-+ ((SI tmp))
-+ (set tmp (zext SI (cris-get-mem BW Rs)))
-+ (if (andif prefix-set (not inc))
-+ (set Rs tmp)
-+ (set Rd tmp))
-+ (setf-move SI tmp)))
-+)
-+
-+; MOVE Rs,Pd [ Pd | 01100011 | Rs ]
-+(.splice
-+ begin
-+ (.unsplice
-+ (.map
-+ (.pmacro
-+ (VER)
-+ (dni
-+ (.sym move-r-spr VER)
-+ "Move from general register to special register"
-+ ((MACH (.sym cris VER)))
-+ "move ${Rs},${Pd}"
-+ (+ RFIX_MOVE_R_S MODE_REGISTER SIZE_FIXED Rs Pd)
-+ (sequence
-+ ((SI tmp) (SI rno))
-+ (set tmp Rs)
-+ (set rno (regno Pd))
-+ (cond
-+ ; See reg-sr setter for most of the special-register semantics.
-+ ; The sanity check for known read-only registers is for program
-+ ; debug help; the real insn would be harmless and have no effect.
-+ ; CGEN-FIXME: regno of symbolic h-sr names doesn't work here.
-+ ((orif (orif (eq rno 0) (eq rno 1)) (orif (eq rno 4) (eq rno 8)))
-+ (error "move-r-spr: trying to set a read-only special register"))
-+ (else (set Pd tmp)))
-+ (reset-x-p))
-+ (cris-reg-sr-timing)))
-+ (cris-cpu-models)))
-+)
-+
-+(define-pmacro (dni-cdt-ver-attr name comment fattr syntax fmt fsem)
-+ "Generator for each MACH, using default timing."
-+ (.splice
-+ begin
-+ (.unsplice
-+ (.map
-+ (.pmacro (v) (dni-cdt-attr name comment (fattr v) syntax fmt (fsem v)))
-+ (cris-cpu-models))))
-+)
-+
-+; MOVE Ps,Rd [ Ps | 01100111 | Rd ]
-+; Note that in the insn format, the Rd operand is in the Rs field (the
-+; Rd field by the definition used everywhere else is the Ps position in
-+; this insn).
-+; It gets a little weird here because we can't get this insn into a
-+; define-pmacro unless we make named pmacros for e.g. a separate attr
-+; function and a semantics function: a .pmacro can't refer to the
-+; parameters of the outer define-pmacro. (The manual refers to this as
-+; not implementing "lexical scoping").
-+(.splice
-+ begin
-+ (.unsplice
-+ (.map
-+ (.pmacro
-+ (VER)
-+ (dni-cdt-attr
-+ (.sym move-spr-r VER)
-+ "Move from special register to general register"
-+ ((MACH (.sym cris VER)))
-+ "move ${Ps},${Rd-sfield}"
-+ (+ Ps RFIX_MOVE_S_R MODE_REGISTER SIZE_FIXED Rd-sfield)
-+ (sequence
-+ ((SI grno) (SI prno) (SI newval))
-+ (set prno (regno Ps))
-+ ; CGEN-FIXME: Can't use the following and then "grno" below because
-+ ; CGEN will emit a "tmp_grno" *also* in decodev32.c:crisv32f_decode
-+ ; (set grno (regno Rd-sfield))
-+ (set newval Ps)
-+ (.splice
-+ cond
-+ (.unsplice
-+ (.map
-+ (.pmacro
-+ (r)
-+ ((eq prno (.cadr2 r))
-+ (set-subreg-gr (.car2 r) (regno Rd-sfield) newval)))
-+ ((.sym cris-implemented-readable-specregs- VER))))
-+ (else (error "move-spr-r from unimplemented register")))
-+ (reset-x-p))))
-+ (cris-cpu-models)))
-+)
-+
-+; MOVE Ps,PC [ Ps | 01100111 | 1111 ]
-+; The move-special-register-to-pc insns are return-type instructions and
-+; have to be special-cased to get the delay-slot and avoid being indicated
-+; as invalid.
-+(dni-cdt-attr
-+ ret-type
-+ "ret-type"
-+ (MACH-PC)
-+ "ret/reti/retb"
-+ (+ Ps MODE_REGISTER RFIX_MOVE_S_R SIZE_FIXED (f-source 15))
-+ (sequence
-+ ((SI retaddr))
-+ (set retaddr Ps)
-+ (reset-x-p)
-+ (delay 1 (set pc retaddr)))
-+)
-+
-+; MOVE [Rs],Pd [ Pd | 10100011 | Rs ]
-+; MOVE [Rs+],Pd [ Pd | 11100011 | Rs ]
-+; We make variants that loads constants or memory for each MACH version,
-+; since each consider some subset of the "special registers" to have
-+; different sizes. FIXME: Should be able to simplify this.
-+(.splice
-+ begin
-+ (.unsplice
-+ (.map
-+ (.pmacro
-+ (VER)
-+ (dni
-+ (.sym move-m-spr VER)
-+ "Move from memory to special register"
-+ ((MACH (.sym cris VER)))
-+ "move [${Rs}${inc}],${Pd}"
-+ (+ Pd INFIX_MOVE_M_S MODEMEMP_YES inc SIZE_FIXED Rs)
-+ (sequence
-+ ((SI rno) (SI newval))
-+ (set rno (regno Pd))
-+ (.splice
-+ cond
-+ ; No sanity check for constant special register here, since the
-+ ; memory read side-effect or post-increment may be the goal, or
-+ ; for pre-v32 a prefix assignment side-effect.
-+ (.unsplice
-+ (.map
-+ (.pmacro
-+ (r)
-+ ((eq rno (.cadr2 r))
-+ (set newval ((.sym (.car2 r) -ext) (cris-get-mem (.car2 r) Rs)))))
-+ ((.sym cris-implemented-writable-specregs- VER))))
-+ (else (error "Trying to set unimplemented special register")))
-+ (set Pd newval)
-+ (reset-x-p))
-+ (cris-mem-sr-timing)))
-+ (cris-cpu-models)))
-+)
-+
-+(define-pmacro QI-operand sconst8)
-+(define-pmacro HI-operand sconst16)
-+(define-pmacro SI-operand const32)
-+
-+(define-pmacro
-+ (cris-move-c-spr VER VERFN)
-+ "Generator for loading constant into special register"
-+ (.splice
-+ begin
-+ (.unsplice
-+ (.map
-+ (.pmacro
-+ (srdef v)
-+ (dni
-+ (.sym move-c-spr v -p (.cadr2 srdef))
-+ (.str "Move constant to special register p" (.cadr2 srdef))
-+ ((MACH (.sym cris v)))
-+ (.str "move ${" (.sym (.car2 srdef) -operand) "},${Pd}")
-+ ; We use Pd in semantics without naming it in the format (which
-+ ; would CGEN-FIXME: cause a CGEN error for some reason, likely
-+ ; related to specifying an insn field multiple times). This
-+ ; currently works and is guarded with test-cases (specifically
-+ ; wrt. the timing model) but may need to be tweaked in the future.
-+ ; Note that using instead (ifield f-dest) causes incorrect timing
-+ ; model to be generated; the timing model requires that Pd is set.
-+ (+ (f-dest (.cadr2 srdef)) MODE_AUTOINCREMENT INFIX_MOVE_M_S SIZE_FIXED
-+ (f-source 15) (.sym (.car2 srdef) -operand))
-+ (sequence
-+ ()
-+ (set Pd (.sym (.car2 srdef) -operand)) ; (reg h-sr (.cadr2 srdef))
-+ (reset-x-p))
-+ ((.sym cris-timing-const-sr- (.car2 srdef)))))
-+ ((.sym cris-implemented-specregs-const- VER))
-+ (.map VERFN ((.sym cris-implemented-specregs-const- VER))))))
-+)
-+
-+; CGEN-FIXME:
-+; Unfortunately we can't iterate over the list of models due to the
-+; problem with referring to the parameters of a surrounding pmacro from
-+; within an enclosed .pmacro (perhaps related to "lexical scoping").
-+; We get e.g. 'insn already defined:: (move-c-sprvn-p0)' with this:
-+;(.splice
-+; begin (.unsplice (.map (.pmacro (vn) (cris-move-c-spr vn (.pmacro (x) vn)))
-+; (cris-cpu-models)))
-+;)
-+(cris-move-c-spr v0 (.pmacro (x) v0))
-+(cris-move-c-spr v3 (.pmacro (x) v3))
-+(cris-move-c-spr v8 (.pmacro (x) v8))
-+(cris-move-c-spr v10 (.pmacro (x) v10))
-+(cris-move-c-spr v32 (.pmacro (x) v32))
-+
-+; MOVE Ps,[Rd] [ Ps | 10100111 | Rd ]
-+; MOVE Ps,[Rd+] [ Ps | 11100111 | Rd ]
-+(.splice
-+ begin
-+ (.unsplice
-+ (.map
-+ (.pmacro
-+ (VER)
-+ (dni-cmwt-attr
-+ (.sym move-spr-m VER)
-+ "Move from special register to memory"
-+ ((MACH (.sym cris VER)))
-+ "move ${Ps},[${Rd-sfield}${inc}]"
-+ (+ INFIX_MOVE_S_M SIZE_FIXED Rd-sfield Ps)
-+ (sequence
-+ ((SI rno))
-+ (set rno (regno Ps))
-+ (.splice
-+ cond
-+ (.unsplice
-+ (.map
-+ (.pmacro
-+ (r)
-+ ((eq rno (.cadr2 r))
-+ (cris-set-mem (.car2 r) Rd-sfield Ps)))
-+ ((.sym cris-implemented-readable-specregs- VER))))
-+ (else (error "write from unimplemented special register")))
-+ (reset-x-p))))
-+ (cris-cpu-models)))
-+)
-+
-+; SBFS [Rs(+)]
-+; Instruction format: |0 0 1 1 1 m 1 1 0 1 1 1| Dest. |
-+(dni-cdt-attr
-+ sbfs
-+ "sbfs"
-+ ((MACH crisv10))
-+ "sbfs [${Rd-sfield}${inc}]"
-+ (+ (f-dest 3) INFIX_SBFS SIZE_FIXED MODEMEMP_YES inc Rd-sfield)
-+ (error "SBFS isn't implemented")
-+)
-+
-+; MOVE Ss,Rd [ Ss | 11110111 | Rd ]
-+(dni-cdt-attr
-+ move-ss-r
-+ "move from support register to general register"
-+ (MACH-V32)
-+ "move ${Ss},${Rd-sfield}"
-+ (+ Ss INFIX_MOVE_SS SIZE_FIXED (f-mode 3) Rd-sfield)
-+ (sequence
-+ ()
-+ (set Rd-sfield Ss)
-+ (reset-x-p))
-+)
-+
-+; MOVE Rs,Sd [ Sd | 10110111 | Rs ]
-+(dni-cdt-attr
-+ move-r-ss
-+ "move from general register to support register"
-+ (MACH-V32)
-+ "move ${Rs},${Sd}"
-+ (+ Sd INFIX_MOVE_SS SIZE_FIXED (f-mode 2) Rs)
-+ (sequence
-+ ()
-+ (set Sd Rs)
-+ (reset-x-p))
-+)
-+
-+; MOVEM Rs,[Rd] [ Rs | 10111111 | Rd ]
-+; MOVEM Rs,[Rd+] [ Rs | 11111111 | Rd ]
-+
-+(define-pmacro (movem-to-mem-step regn)
-+ ; Without the SI attribute, UINT is generated, which isn't supported by
-+ ; the sim framework.
-+ (if (ge SI (regno Rs-dfield) regn)
-+ (sequence
-+ ((SI tmp))
-+ (set tmp (reg h-gr regn))
-+ (set (mem SI addr) tmp)
-+ (set addr (add addr 4))))
-+)
-+
-+(dni
-+ movem-r-m
-+ "movem to memory"
-+ (MACH-PRE-V32)
-+ "movem ${Rs-dfield},[${Rd-sfield}${inc}]"
-+ (+ INFIX_MOVEM_R_M MODEMEMP_YES inc SIZE_FIXED Rs-dfield Rd-sfield)
-+ (sequence
-+ ((SI addr) (BI postinc))
-+ ; FIXME: A copy of what's in cris-get-mem.
-+
-+ ; Cache the incrementness of the operand.
-+ (set postinc inc)
-+
-+ ; CGEN-FIXME: Kludge to work around a CGEN bug: it doesn't see that
-+ ; Rs-dfield is used as an input, causing the timing model to be wrong.
-+ (sequence ((SI dummy)) (set dummy Rs-dfield))
-+
-+ ; Get the address from somewhere. If the insn was prefixed, it's in
-+ ; the prefix-register.
-+ (set addr
-+ (if SI (eq prefix-set 0)
-+ Rd-sfield
-+ prefixreg))
-+
-+ (.splice
-+ sequence ()
-+ (.unsplice (.map movem-to-mem-step (.iota 16 15 -1))))
-+
-+ ; Update the source-register for post-increments.
-+ (if (ne postinc 0)
-+ (set Rd-sfield
-+ (if SI (eq prefix-set 0) addr prefixreg)))
-+ (reset-x-p))
-+ (simplecris-movem-timing)
-+)
-+
-+(dni
-+ movem-r-m-v32
-+ "movem to memory"
-+ (MACH-V32)
-+ "movem ${Rs-dfield},[${Rd-sfield}${inc}]"
-+ (+ INFIX_MOVEM_R_M MODEMEMP_YES inc SIZE_FIXED Rs-dfield Rd-sfield)
-+ (sequence
-+ ((SI addr) (BI postinc))
-+ ; FIXME: Mostly a copy of what's in cris-get-mem.
-+
-+ ; Cache the incrementness of the operand.
-+ (set postinc inc)
-+
-+ ; CGEN-FIXME: See movem-r-m.
-+ (sequence ((SI dummy)) (set dummy Rs-dfield))
-+
-+ (set addr Rd-sfield)
-+
-+ (.splice
-+ sequence ()
-+ (.unsplice (.map movem-to-mem-step (.iota 16))))
-+
-+ ; Update the source-register for post-increments.
-+ (if (ne postinc 0)
-+ (set Rd-sfield addr))
-+ (reset-x-p))
-+ ; Unit u-mem must be specified before the u-movem-* for memory address
-+ ; register stall count to be right.
-+ ((crisv32 (unit u-mem) (unit u-movem-rtom) (unit u-exec-movem)
-+ (unit u-mem-w)))
-+)
-+
-+; MOVEM [Rs],Rd [ Rd | 10111011 | Rs ]
-+; MOVEM [Rs+],Rd [ Rd | 11111011 | Rs ]
-+
-+(define-pmacro
-+ (movem-to-reg-step regn)
-+ ; Without the SI attribute, UINT is generated, which isn't supported by
-+ ; the sim framework.
-+ (if (ge SI (regno Rd) regn)
-+ (sequence
-+ ((SI tmp))
-+ (set tmp (mem SI addr))
-+ (set (reg h-gr regn) tmp)
-+ (set addr (add addr 4))))
-+)
-+
-+(dni
-+ movem-m-r
-+ "movem to register"
-+ (MACH-PRE-V32)
-+ "movem [${Rs}${inc}],${Rd}"
-+ (+ Rd INFIX_MOVEM_M_R MODEMEMP_YES inc SIZE_FIXED Rs)
-+ (sequence
-+ ((SI addr) (BI postinc))
-+ ; FIXME: Mostly a copy of what's in cris-get-mem.
-+
-+ ; Cache the incrementness of the operand.
-+ (set postinc inc)
-+
-+ ; Get the address from somewhere. If the insn was prefixed, it's in
-+ ; the prefix-register.
-+ (set addr
-+ (if SI (eq prefix-set 0)
-+ Rs
-+ prefixreg))
-+
-+ ; CGEN-FIXME: See movem-r-m.
-+ (sequence ((SI dummy)) (set dummy Rd))
-+
-+ (.splice
-+ sequence ()
-+ ; The first movem step is left out because it can't happen; it's for
-+ ; PC destination. See the pattern below.
-+ (.unsplice (.map movem-to-reg-step (.iota 15 14 -1))))
-+
-+ ; Update the source-register for post-increments.
-+ ; FIXME: No postinc-prefixed for v0 IIRC.
-+ (if (ne postinc 0)
-+ (set Rs (if SI (eq prefix-set 0) addr prefixreg)))
-+ (reset-x-p))
-+ (simplecris-movem-timing)
-+)
-+
-+; (MOVEM [Rs],PC [ 1111 | 10111011 | Rs ])
-+; (MOVEM [Rs+],PC [ 1111 | 11111011 | Rs ])
-+; We have to special-case it for PC destination; used in longjump.
-+; We shouldn't *have* to special-case it; the main reason is (FIXME:)
-+; misgeneration of the simulator when the PC case is folded into the
-+; generic PRE-V32 movem; possibly related to then being a COND-CTI rather
-+; than an UNCOND-CTI.
-+(dni-cmt-attr
-+ movem-m-pc
-+ "movem to register, ending with PC"
-+ (MACH-PRE-V32)
-+ "movem [${Rs}${inc}],${Rd}"
-+ (+ (f-dest 15) INFIX_MOVEM_M_R SIZE_FIXED Rs)
-+ (sequence
-+ ((SI addr) (BI postinc))
-+ ; FIXME: Mostly a copy of what's in cris-get-mem.
-+
-+ ; Cache the incrementness of the operand.
-+ (set postinc inc)
-+
-+ ; Get the address from somewhere. If the insn was prefixed, it's in
-+ ; the prefix-register.
-+ (set addr
-+ (if SI (eq prefix-set 0)
-+ Rs
-+ prefixreg))
-+
-+ ; FIXME: Add kludge here too *and* a test-case.
-+
-+ (.splice
-+ sequence ()
-+ ; The first movem step is for PC destination, used in longjmp.
-+ (set pc (mem SI addr))
-+ (set addr (add addr 4))
-+ (.unsplice
-+ (.map
-+ (.pmacro
-+ (regn)
-+ (sequence
-+ ((SI tmp))
-+ (set tmp (mem SI addr))
-+ (set (reg h-gr regn) tmp)
-+ (set addr (add addr 4))))
-+ (.iota 15 14 -1))))
-+
-+ ; Update the source-register for post-increments.
-+ ; FIXME: No postinc-prefixed for v0.
-+ (if (ne postinc 0)
-+ (set Rs (if SI (eq prefix-set 0) addr prefixreg)))
-+ (reset-x-p))
-+)
-+
-+(dni
-+ movem-m-r-v32
-+ "movem to register"
-+ (MACH-V32)
-+ "movem [${Rs}${inc}],${Rd}"
-+ (+ INFIX_MOVEM_M_R MODEMEMP_YES inc SIZE_FIXED Rs Rd)
-+ (sequence
-+ ((SI addr) (BI postinc))
-+ ; FIXME: A copy of what's in cris-get-mem
-+
-+ ; Cache the incrementness of the operand.
-+ (set postinc inc)
-+
-+ ; Get the address from somewhere.
-+ (set addr Rs)
-+
-+ ; CGEN-FIXME: See movem-r-m.
-+ (sequence ((SI dummy)) (set dummy Rd))
-+
-+ (.splice
-+ sequence ()
-+ (.unsplice (.map movem-to-reg-step (.iota 16))))
-+
-+ ; Update the source-register for post-increments.
-+ ; FIXME: No postinc-prefixed for v0 IIRC.
-+ (if (ne postinc 0)
-+ (set Rs addr))
-+ (reset-x-p))
-+ ; u-mem must be specified before the u-movem-* for memory source
-+ ; register stall count to be right.
-+ ((crisv32 (unit u-mem) (unit u-mem-r) (unit u-movem-mtor)
-+ (unit u-exec-movem)))
-+)
-+
-+; ADD.m Rs,Rd [ Rd | 011000mm | Rs ]
-+(dni-cdt-bwd
-+ add "add from register to register"
-+ "$Rs,$Rd"
-+ (+ Rd MODE_REGISTER R_ADD Rs)
-+ (.pmacro (BWD) (cris-arit add BWD Rd Rs))
-+)
-+
-+; ADD.m [Rs],Rd [ Rd | 101000mm | Rs ]
-+; ADD.m [Rs+],Rd [ Rd | 111000mm | Rs ]
-+(dni-cmt-bwd
-+ add-m "add from memory to register"
-+ "[${Rs}${inc}],${Rd}"
-+ (+ INDIR_ADD Rs Rd)
-+ (.pmacro (BWD) (cris-arit-3op add BWD Rd (cris-get-mem BWD Rs) Rs))
-+)
-+; (ADD.m [PC+],Rd [ Rd | 111000mm | 1111 ])
-+(dni-c-QI
-+ addcbr "add constant byte to register"
-+ "add.b ${sconst8}],${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_ADD SIZE_BYTE (f-source 15) sconst8)
-+ (cris-arit add QI Rd sconst8)
-+)
-+
-+(dni-c-HI
-+ addcwr "add constant word to register"
-+ "add.w ${sconst16}],${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_ADD SIZE_WORD (f-source 15) sconst16)
-+ (cris-arit add HI Rd sconst16)
-+)
-+
-+(dni-c-SI
-+ addcdr "add constant dword to register"
-+ "add.d ${const32}],${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_ADD SIZE_DWORD (f-source 15) const32)
-+ (cris-arit add SI Rd const32)
-+)
-+
-+; (ADD.D [PC+],PC [ 1111 | 11100010 | 1111 ])
-+; This insn is used for DSO-local jumps in PIC code.
-+(dni
-+ addcpc "Relative jump by adding constant to PC"
-+ (MACH-PC)
-+ "add.d ${sconst32},PC"
-+ (+ (f-dest 15) MODE_AUTOINCREMENT INDIR_ADD SIZE_DWORD (f-source 15) const32)
-+ (sequence
-+ ((SI newpc) (SI oldpc) (SI offs))
-+ (set offs const32)
-+ (set oldpc (add SI pc 6))
-+ (set newpc (add SI oldpc offs))
-+ (set pc newpc)
-+ (setf-arit SI add oldpc offs newpc cbit))
-+ (simplecris-common-timing ((unit u-const32) (unit u-stall) (unit u-exec)))
-+)
-+
-+; ADDS.z Rs,Rd [ Rd | 0100001z | Rs ]
-+(dni-cdt-sbw
-+ adds "add sign-extended from register to register"
-+ "$Rs,$Rd"
-+ (+ Rd MODE_REGISTER R_ADDX Rs)
-+ (.pmacro (BW) (cris-arit add SI Rd ((.sym BW -ext) (trunc BW Rs))))
-+)
-+
-+; ADDS.z [Rs],Rd [ Rd | 1000001z | Rs ]
-+; ADDS.z [Rs+],Rd [ Rd | 1100001z | Rs ]
-+(dni-cmt-sbw
-+ adds-m "add sign-extended from memory to register"
-+ "[${Rs}${inc}],$Rd"
-+ (+ Rd INDIR_ADDX Rs)
-+ (.pmacro (BW) (cris-arit-3op add SI Rd ((.sym BW -ext) (cris-get-mem BW Rs)) Rs))
-+)
-+
-+; (ADDS.z [PC+],Rd [ Rd | 1100001z | 1111 ])
-+(dni-c-QI
-+ addscbr "add sign-extended constant byte to register"
-+ "[${Rs}${inc}],$Rd"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_ADDX SIGNED_BYTE (f-source 15) sconst8)
-+ (cris-arit add SI Rd (ext SI (trunc QI sconst8)))
-+)
-+(dni-c-HI
-+ addscwr "add sign-extended constant word to register"
-+ "[${Rs}${inc}],$Rd"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_ADDX SIGNED_WORD (f-source 15) sconst16)
-+ (cris-arit add SI Rd (ext SI (trunc HI sconst16)))
-+)
-+
-+; (ADDS.w [],PC [ 1111 | 10000011 | 1111 ])
-+; For a PC destination, we support only the two-operand case
-+; (dest == src), which is used in switch/case statements.
-+; FIXME: Should implement ADD.D [PC],PC and ADDS.B [PC],PC for use if/when
-+; implementing CASE_VECTOR_SHORTEN_MODE.
-+(dni
-+ addspcpc "add sign-extended prefixed arg to PC"
-+ (MACH-PC)
-+ "adds.w [PC],PC"
-+ (+ (f-dest 15) MODE_INDIRECT INDIR_ADDX SIGNED_WORD (f-source 15))
-+ (sequence
-+ ((SI newpc) (SI oldpc) (HI offs))
-+ (if (not prefix-set)
-+ (error "Unexpected adds.w [PC],PC without prefix"))
-+ ; We don't use cris-get-mem but instead special-case this one, since we
-+ ; have most instruction fields fixed where cris-get-mem expects
-+ ; field-parametrization by certain names.
-+ (set offs (mem HI prefixreg))
-+ (set oldpc (add SI pc 2))
-+ (set newpc (add SI oldpc offs))
-+ (set pc newpc)
-+ (setf-arit SI add oldpc (ext SI offs) newpc cbit))
-+ (simplecris-common-timing ((unit u-mem) (unit u-stall) (unit u-exec)))
-+)
-+
-+; ADDU.z Rs,Rd [ Rd | 0100000z | Rs ]
-+(dni-cdt-ubw
-+ addu "add zero-extended from register to register"
-+ "$Rs,$Rd"
-+ (+ Rd MODE_REGISTER R_ADDX Rs)
-+ (.pmacro (BW) (cris-arit add SI Rd ((.sym BW -zext) (trunc BW Rs))))
-+)
-+
-+; ADDU.z [Rs],Rd [ Rd | 1000000z | Rs ]
-+; ADDU.z [Rs+],Rd [ Rd | 1100000z | Rs ]
-+(dni-cmt-ubw
-+ addu-m "add zero-extended from memory to register"
-+ "[${Rs}${inc}],$Rd"
-+ (+ Rd INDIR_ADDX Rs)
-+ (.pmacro (BW)
-+ (cris-arit-3op add SI Rd ((.sym BW -zext) (cris-get-mem BW Rs)) Rs))
-+)
-+
-+; (ADDU.z [PC+],Rd [ Rd | 1100000z | 1111 ])
-+(dni-c-QI
-+ adducbr "add zero-extended constant byte to register"
-+ "[${Rs}${inc}],$Rd"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_ADDX UNSIGNED_BYTE (f-source 15) sconst8)
-+ (cris-arit add SI Rd (zext SI (trunc QI sconst8)))
-+)
-+(dni-c-HI
-+ adducwr "add zero-extended constant word to register"
-+ "[${Rs}${inc}],$Rd"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_ADDX UNSIGNED_WORD (f-source 15) sconst16)
-+ (cris-arit add SI Rd (zext SI (trunc HI sconst16)))
-+)
-+
-+; SUB.m Rs,Rd [ Rd | 011010mm | Rs ]
-+(dni-cdt-bwd
-+ sub "subtract from register to register"
-+ "$Rs,$Rd"
-+ (+ Rd MODE_REGISTER R_SUB Rs)
-+ (.pmacro (BWD) (cris-arit sub BWD Rd Rs))
-+)
-+
-+; SUB.m [Rs],Rd [ Rd | 101010mm | Rs ]
-+; SUB.m [Rs+],Rd [ Rd | 111010mm | Rs ]
-+(dni-cmt-bwd
-+ sub-m "subtract from memory to register"
-+ "[${Rs}${inc}],${Rd}"
-+ (+ INDIR_SUB Rs Rd)
-+ (.pmacro (BWD) (cris-arit-3op sub BWD Rd (cris-get-mem BWD Rs) Rs))
-+)
-+
-+; (SUB.m [PC+],Rd [ Rd | 111010mm | 1111 ]
-+(dni-c-QI
-+ subcbr "subtract constant byte from register"
-+ "sub.b ${sconst8}],${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_SUB SIZE_BYTE (f-source 15) sconst8)
-+ (cris-arit sub QI Rd sconst8)
-+)
-+
-+(dni-c-HI
-+ subcwr "subtract constant word from register"
-+ "sub.w ${sconst16}],${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_SUB SIZE_WORD (f-source 15) sconst16)
-+ (cris-arit sub HI Rd sconst16)
-+)
-+
-+(dni-c-SI
-+ subcdr "subtract constant dword from register"
-+ "sub.d ${const32}],${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_SUB SIZE_DWORD (f-source 15) const32)
-+ (cris-arit sub SI Rd const32)
-+)
-+
-+; SUBS.z Rs,Rd [ Rd | 0100101z | Rs ]
-+(dni-cdt-sbw
-+ subs "sub sign-extended from register to register"
-+ "$Rs,$Rd"
-+ (+ Rd MODE_REGISTER R_SUBX Rs)
-+ (.pmacro (BW) (cris-arit sub SI Rd ((.sym BW -ext) (trunc BW Rs))))
-+)
-+
-+; SUBS.z [Rs],Rd [ Rd | 1000101z | Rs ]
-+; SUBS.z [Rs+],Rd [ Rd | 1100101z | Rs ]
-+(dni-cmt-sbw
-+ subs-m "sub sign-extended from memory to register"
-+ "[${Rs}${inc}],$Rd"
-+ (+ Rd INDIR_SUBX Rs)
-+ (.pmacro (BW)
-+ (cris-arit-3op sub SI Rd ((.sym BW -ext) (cris-get-mem BW Rs)) Rs))
-+)
-+
-+; (SUBS.z [PC+],Rd [ Rd | 1100101z | 1111 ])
-+(dni-c-QI
-+ subscbr "sub sign-extended constant byte to register"
-+ "[${Rs}${inc}],$Rd"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_SUBX SIGNED_BYTE (f-source 15) sconst8)
-+ (cris-arit sub SI Rd (ext SI (trunc QI sconst8)))
-+)
-+(dni-c-HI
-+ subscwr "sub sign-extended constant word to register"
-+ "[${Rs}${inc}],$Rd"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_SUBX SIGNED_WORD (f-source 15) sconst16)
-+ (cris-arit sub SI Rd (ext SI (trunc HI sconst16)))
-+)
-+
-+; SUBU.z Rs,Rd [ Rd | 0100100z | Rs ]
-+(dni-cdt-ubw
-+ subu "sub zero-extended from register to register"
-+ "$Rs,$Rd"
-+ (+ Rd MODE_REGISTER R_SUBX Rs)
-+ (.pmacro (BW) (cris-arit sub SI Rd ((.sym BW -zext) (trunc BW Rs))))
-+)
-+
-+; SUBU.z [Rs],Rd [ Rd | 1000100z | Rs ]
-+; SUBU.z [Rs+],Rd [ Rd | 1100100z | Rs ]
-+(dni-cmt-ubw
-+ subu-m "sub zero-extended from memory to register"
-+ "[${Rs}${inc}],$Rd"
-+ (+ Rd INDIR_SUBX Rs)
-+ (.pmacro (BW)
-+ (cris-arit-3op sub SI Rd ((.sym BW -zext) (cris-get-mem BW Rs)) Rs))
-+)
-+
-+; (SUBU.z [PC+],Rd [ Rd | 1100100z | 1111 ])
-+(dni-c-QI
-+ subucbr "sub zero-extended constant byte to register"
-+ "[${Rs}${inc}],$Rd"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_SUBX UNSIGNED_BYTE (f-source 15) sconst8)
-+ (cris-arit sub SI Rd (zext SI (trunc QI sconst8)))
-+)
-+(dni-c-HI
-+ subucwr "sub zero-extended constant word to register"
-+ "[${Rs}${inc}],$Rd"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_SUBX UNSIGNED_WORD (f-source 15) sconst16)
-+ (cris-arit sub SI Rd (zext SI (trunc HI sconst16)))
-+)
-+
-+; ADDC Rs,Rd [ Rd | 01010111 | Rs ]
-+(dni-cdt-attr
-+ addc-r "addc from register to register"
-+ (MACH-V32)
-+ "addc $Rs,$Rd"
-+ (+ Rd MODE_REGISTER RFIX_ADDC SIZE_FIXED Rs)
-+ ; Since this is equivalent to "ax" plus "add.d Rs,Rd", we'll just do
-+ ; that, semantically.
-+ (sequence
-+ ()
-+ (set-quiet xbit 1)
-+ (cris-arit add SI Rd Rs))
-+)
-+
-+; ADDC [Rs],Rd [ Rd | 10011010 | Rs ]
-+; ADDC [Rs+],Rd [ Rd | 11011010 | Rs ]
-+(dni-cmt-attr
-+ addc-m "addc from memory to register"
-+ (MACH-V32)
-+ "addc [${Rs}${inc}],${Rd}"
-+ (+ Rd INDIR_ADDC SIZE_DWORD Rs)
-+ (sequence
-+ ()
-+ (set-quiet xbit 1)
-+ (cris-arit add SI Rd (cris-get-mem SI Rs)))
-+)
-+
-+; (ADDC [Rs+],Rd [ Rd | 11011010 | 1111 ])
-+(dni-c-SI-attr
-+ addc-c "addc constant to register"
-+ (MACH-V32)
-+ "addc ${const32},${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_ADDC SIZE_DWORD (f-source 15) const32)
-+ (sequence
-+ ()
-+ (set-quiet xbit 1)
-+ (cris-arit add SI Rd const32))
-+)
-+
-+; LAPC [PC+],Rd [ Rd | 11010111 1111 ]
-+(dni-c-SI-attr
-+ lapc-d "lapc.d"
-+ (MACH-V32)
-+ "lapc.d ${const32-pcrel},${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INFIX_LAPC SIZE_FIXED (f-source 15) const32-pcrel)
-+ (sequence
-+ ()
-+ (set Rd const32-pcrel)
-+ (reset-x-p))
-+)
-+
-+; LAPCQ qo,Rd [ Rd | 10010111 | qo ]
-+(dni-cdt-attr
-+ lapcq "lapcq"
-+ (MACH-V32)
-+ "lapcq ${qo},${Rd}"
-+ (+ Rd MODE_INDIRECT INFIX_LAPC SIZE_FIXED qo)
-+ (sequence
-+ ()
-+ (set Rd qo)
-+ (reset-x-p))
-+)
-+
-+; ADDI Rs.m,Rd [ Rs | 010100mm | Rd ]
-+(dni-cdt-bwd
-+ addi "addi"
-+ "${Rs-dfield}.m,${Rd-sfield}"
-+ (+ Rd-sfield MODE_REGISTER R_ADDI Rs-dfield)
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ()
-+ (set Rd-sfield (add SI Rd-sfield (mul Rs-dfield (.sym BWD -size))))
-+ (reset-x-p)))
-+)
-+
-+; NEG.m Rs,Rd [ Rd | 010110mm | Rs ]
-+(dni-cdt-bwd
-+ neg "neg.m Rs,Rd"
-+ "$Rs,$Rd"
-+ (+ Rd MODE_REGISTER R_NEG Rs)
-+ (.pmacro (BWD) (cris-arit3 sub BWD Rd 0 Rs))
-+)
-+
-+; TEST.m [Rs] [ 0000101110mm | Rs ]
-+; TEST.m [Rs+] [ 0000111110mm | Rs ]
-+(dni-cmt-bwd
-+ test-m "test.m [Rs(+)]"
-+ "[${Rs}${inc}]"
-+ (+ (f-dest 0) INDIR_TEST Rs)
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ((BWD tmpd))
-+ (set tmpd (cris-get-mem BWD Rs))
-+ ; This is supposed to be the same result as for cmpq 0,X, hence same code.
-+ (cris-arit6-int
-+ sub BWD (.pmacro (sz regno val) (nop)) 0 tmpd 0 cbit cbit)))
-+)
-+
-+; MOVE.m Rs,[Rd] [ Rs | 101111mm | Rd ]
-+; MOVE.m Rs,[Rd+] [ Rs | 111111mm | Rd ]
-+
-+(dni-cmwt-bwd
-+ move-r-m "move.m R,[]"
-+ "${Rs-dfield},[${Rd-sfield}${inc}]"
-+ (+ Rs-dfield INDIR_MOVE_R_M Rd-sfield)
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ((BWD tmpd))
-+ (set tmpd Rs-dfield)
-+ (cris-set-mem BWD Rd-sfield tmpd)
-+ (reset-x-p)))
-+)
-+
-+; MULS.m Rs,Rd [ Rd | 110100mm | Rs ]
-+(dni-bwd-attr
-+ muls "muls.m Rs,Rd"
-+ ((MACH crisv10,crisv32))
-+ "$Rs,$Rd"
-+ (+ Rd MODE_MULS INDIR_MUL Rs)
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ((DI src1) (DI src2) (DI tmpr))
-+ (set src1 (ext DI (trunc BWD Rs)))
-+ (set src2 (ext DI (trunc BWD Rd)))
-+ (set tmpr (mul src1 src2))
-+ (set Rd (trunc SI tmpr))
-+ (set mof (trunc SI (srl tmpr 32)))
-+ (setf-arit DI muls src1 src2 tmpr cbit)))
-+ ((crisv10 (unit u-multiply) (unit u-exec))
-+ (crisv32 (unit u-multiply) (unit u-exec)))
-+)
-+
-+; MULU.m Rs,Rd [ Rd | 100100mm | Rs ]
-+(dni-bwd-attr
-+ mulu "mulu.m Rs,Rd"
-+ ((MACH crisv10,crisv32))
-+ "$Rs,$Rd"
-+ (+ Rd MODE_MULU INDIR_MUL Rs)
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ((DI src1) (DI src2) (DI tmpr))
-+ (set src1 (zext DI (trunc BWD Rs)))
-+ (set src2 (zext DI (trunc BWD Rd)))
-+ (set tmpr (mul src1 src2))
-+ (set Rd (trunc SI tmpr))
-+ (set mof (trunc SI (srl tmpr 32)))
-+ (setf-arit DI mulu src1 src2 tmpr cbit)))
-+ ((crisv10 (unit u-multiply) (unit u-exec))
-+ (crisv32 (unit u-multiply) (unit u-exec)))
-+)
-+
-+; MCP Ps,Rd [ Ps | 01111111 | Rd ]
-+(dni-cdt-attr
-+ mcp "Multiply Carry Propagation"
-+ (MACH-V32)
-+ "mcp $Ps,$Rd"
-+ (+ Ps MODE_REGISTER RFIX_MCP SIZE_FIXED Rd-sfield)
-+ (sequence
-+ ()
-+ (set-quiet xbit 1)
-+ (set-quiet zbit 1)
-+ (cris-arit5 add SI Rd-sfield Rd-sfield Ps rbit rbit))
-+)
-+
-+; MSTEP Rs,Rd [ Rd | 01111111 | Rs ]
-+(dni-cdt-attr
-+ mstep "Multiply step"
-+ (MACH-PRE-V32)
-+ "mstep $Rs,$Rd"
-+ (+ Rd MODE_REGISTER RFIX_MSTEP SIZE_FIXED Rs)
-+ (sequence
-+ ((SI tmpd) (SI tmps))
-+ (set tmps Rs)
-+ (set tmpd (add (sll Rd 1) (if SI nbit tmps 0)))
-+ (set Rd tmpd)
-+ (setf-move SI tmpd))
-+)
-+
-+; DSTEP Rs,Rd [ Rd | 01101111 | Rs ]
-+(dni-cdt
-+ dstep "Division step"
-+ "dstep $Rs,$Rd"
-+ (+ Rd MODE_REGISTER RFIX_DSTEP SIZE_FIXED Rs)
-+ (sequence
-+ ((SI tmp) (SI tmps) (SI tmpd))
-+ (set tmps Rs)
-+ (set tmp (sll Rd 1))
-+ (set tmpd (if SI (geu tmp tmps) (sub tmp tmps) tmp))
-+ (set Rd tmpd)
-+ (setf-move SI tmpd))
-+)
-+
-+; ABS Rs,Rd [ Rd | 01101011 | Rs ]
-+(dni-cdt
-+ abs "Absolut Instruction"
-+ "abs $Rs,$Rd"
-+ (+ Rd MODE_REGISTER RFIX_ABS SIZE_FIXED Rs)
-+ (sequence
-+ ((SI tmpd))
-+ (set tmpd (abs Rs))
-+ (set Rd tmpd)
-+ (setf-move SI tmpd))
-+)
-+
-+; AND.m Rs,Rd [ Rd | 011100mm | Rs ]
-+(dni-cdt-bwd
-+ and "And from register to register"
-+ "$Rs,$Rd"
-+ (+ Rd MODE_REGISTER R_AND Rs)
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ((BWD tmpd))
-+ (set tmpd (and BWD Rd Rs))
-+ (set-subreg-gr BWD (regno Rd) tmpd)
-+ (setf-move BWD tmpd)))
-+)
-+
-+; AND.m [Rs],Rd [ Rd | 101100mm | Rs ]
-+; AND.m [Rs+],Rd [ Rd | 111100mm | Rs ]
-+(dni-cmt-bwd
-+ and-m "And from memory to register"
-+ "[${Rs}${inc}],${Rd}"
-+ (+ INDIR_AND Rs Rd)
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ((BWD tmpd))
-+ (set tmpd (and BWD Rd (cris-get-mem BWD Rs)))
-+ (set-subreg-gr
-+ BWD
-+ (if SI (andif prefix-set (not inc)) (regno Rs) (regno Rd))
-+ tmpd)
-+ (setf-move BWD tmpd)))
-+)
-+
-+; (AND.m [PC+],Rd [ Rd | 111100mm | 1111 ])
-+(dni-c-QI
-+ andcbr "And constant byte to register"
-+ "and.b ${sconst8}],${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_AND SIZE_BYTE (f-source 15) sconst8)
-+ (sequence
-+ ((QI tmpd))
-+ (set tmpd (and QI Rd sconst8))
-+ (set-subreg-gr QI (regno Rd) tmpd)
-+ (setf-move QI tmpd))
-+)
-+
-+(dni-c-HI
-+ andcwr "And constant word to register"
-+ "and.w ${sconst16}],${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_AND SIZE_WORD (f-source 15) sconst16)
-+ (sequence
-+ ((HI tmpd))
-+ (set tmpd (and HI Rd sconst16))
-+ (set-subreg-gr HI (regno Rd) tmpd)
-+ (setf-move HI tmpd))
-+)
-+
-+(dni-c-SI
-+ andcdr "And constant dword to register"
-+ "and.d ${const32}],${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_AND SIZE_DWORD (f-source 15) const32)
-+ (sequence
-+ ((SI tmpd))
-+ (set tmpd (and SI Rd const32))
-+ (set-subreg-gr SI (regno Rd) tmpd)
-+ (setf-move SI tmpd))
-+)
-+
-+; ANDQ i,Rd [ Rd | 001100 | i ]
-+(dni-cdt
-+ andq "And quick-immediate to register"
-+ "andq $i,$Rd"
-+ (+ Rd MODE_QUICK_IMMEDIATE Q_ANDQ i)
-+ (sequence
-+ ((SI tmpd))
-+ (set tmpd (and SI Rd i))
-+ (set-subreg-gr SI (regno Rd) tmpd)
-+ (setf-move SI tmpd))
-+)
-+
-+; OR.m Rs,Rd [ Rd | 011101mm | Rs ]
-+(dni-cdt-bwd
-+ orr "Or from register to register"
-+ "$Rs,$Rd"
-+ (+ Rd MODE_REGISTER R_OR Rs)
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ((BWD tmpd))
-+ (set tmpd (or BWD Rd Rs))
-+ (set-subreg-gr BWD (regno Rd) tmpd)
-+ (setf-move BWD tmpd)))
-+)
-+
-+; OR.m [Rs],Rd [ Rd | 101101mm | Rs ]
-+; OR.m [Rs+],Rd [ Rd | 111101mm | Rs ]
-+(dni-cmt-bwd
-+ or-m "Or from memory to register"
-+ "[${Rs}${inc}],${Rd}"
-+ (+ INDIR_OR Rs Rd)
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ((BWD tmpd))
-+ (set tmpd (or BWD Rd (cris-get-mem BWD Rs)))
-+ (set-subreg-gr
-+ BWD
-+ (if SI (andif prefix-set (not inc)) (regno Rs) (regno Rd))
-+ tmpd)
-+ (setf-move BWD tmpd)))
-+)
-+
-+; (OR.m [PC+],Rd [ Rd | 111101mm | 1111 ])
-+(dni-c-QI
-+ orcbr "Or constant byte to register"
-+ "or.b ${sconst8}],${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_OR SIZE_BYTE (f-source 15) sconst8)
-+ (sequence
-+ ((QI tmpd))
-+ (set tmpd (or QI Rd sconst8))
-+ (set-subreg-gr QI (regno Rd) tmpd)
-+ (setf-move QI tmpd))
-+)
-+
-+(dni-c-HI
-+ orcwr "Or constant word to register"
-+ "or.w ${sconst16}],${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_OR SIZE_WORD (f-source 15) sconst16)
-+ (sequence
-+ ((HI tmpd))
-+ (set tmpd (or HI Rd sconst16))
-+ (set-subreg-gr HI (regno Rd) tmpd)
-+ (setf-move HI tmpd))
-+)
-+
-+(dni-c-SI
-+ orcdr "Or constant dword to register"
-+ "or.d ${const32}],${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_OR SIZE_DWORD (f-source 15) const32)
-+ (sequence
-+ ((SI tmpd))
-+ (set tmpd (or SI Rd const32))
-+ (set-subreg-gr SI (regno Rd) tmpd)
-+ (setf-move SI tmpd))
-+)
-+
-+; ORQ i,Rd [ Rd | 001101 | i ]
-+(dni-cdt
-+ orq "Or quick-immediate to register"
-+ "orq $i,$Rd"
-+ (+ Rd MODE_QUICK_IMMEDIATE Q_ORQ i)
-+ (sequence
-+ ((SI tmpd))
-+ (set tmpd (or SI Rd i))
-+ (set-subreg-gr SI (regno Rd) tmpd)
-+ (setf-move SI tmpd))
-+)
-+
-+; XOR Rs,Rd [ Rd | 01111011 | Rs ]
-+(dni-cdt
-+ xor "Xor from register to register"
-+ "xor $Rs,$Rd"
-+ (+ Rd MODE_REGISTER RFIX_XOR SIZE_FIXED Rs)
-+ (sequence
-+ ((SI tmpd))
-+ (set tmpd (xor SI Rd Rs))
-+ (set Rd tmpd)
-+ (setf-move SI tmpd))
-+)
-+
-+(define-pmacro (swap-r x)
-+ "Perform bit-wise swap within each byte"
-+ (sequence
-+ SI
-+ ((SI tmpr))
-+ (set tmpr x)
-+ (or (sll (and tmpr #x1010101) 7)
-+ (or (sll (and tmpr #x2020202) 5)
-+ (or (sll (and tmpr #x4040404) 3)
-+ (or (sll (and tmpr #x8080808) 1)
-+ (or (srl (and tmpr #x10101010) 1)
-+ (or (srl (and tmpr #x20202020) 3)
-+ (or (srl (and tmpr #x40404040) 5)
-+ (srl (and tmpr #x80808080) 7)))))))))
-+)
-+
-+(define-pmacro (swap-b x)
-+ "Perform byte-wise swap within each word"
-+ (sequence
-+ SI
-+ ((SI tmpb))
-+ (set tmpb x)
-+ (or (and (sll tmpb 8) #xff00ff00)
-+ (and (srl tmpb 8) #xff00ff)))
-+)
-+
-+(define-pmacro (swap-w x)
-+ "Perform word-wise swap within each dword"
-+ (sequence
-+ SI
-+ ((SI tmpb))
-+ (set tmpb x)
-+ (or (and (sll tmpb 16) #xffff0000)
-+ (and (srl tmpb 16) #xffff)))
-+)
-+
-+(define-pmacro (swap-_ x)
-+ "Do nothing swap-wise"
-+ (error SI "SWAP without swap modifier isn't implemented")
-+)
-+
-+(define-pmacro (swap-n x)
-+ "Perform bitwise not (that is, perform a not, not not perform)"
-+ (inv x)
-+)
-+
-+(define-pmacro (swap-br x) "Combine swap-r and swap-b" (swap-r (swap-b x)))
-+(define-pmacro (swap-wr x) "Combine swap-r and swap-w" (swap-r (swap-w x)))
-+(define-pmacro (swap-wb x) "Combine swap-b and swap-w" (swap-b (swap-w x)))
-+(define-pmacro (swap-wbr x) "Combine swap-r and swap-wb" (swap-r (swap-wb x)))
-+(define-pmacro (swap-nr x) "Combine swap-r and swap-n" (swap-r (swap-n x)))
-+(define-pmacro (swap-nb x) "Combine swap-n and swap-b" (swap-b (swap-n x)))
-+(define-pmacro (swap-nbr x) "Combine swap-r and swap-nb" (swap-r (swap-nb x)))
-+(define-pmacro (swap-nw x) "Combine swap-n and swap-w" (swap-w (swap-n x)))
-+(define-pmacro (swap-nwr x) "Combine swap-r and swap-nw" (swap-r (swap-nw x)))
-+(define-pmacro (swap-nwb x) "Combine swap-b and swap-nw" (swap-b (swap-nw x)))
-+(define-pmacro (swap-nwbr x) "Combine swap-r and swap-nwb" (swap-r (swap-nwb x)))
-+
-+(define-pmacro (cris-swap swapcode val)
-+ (sequence
-+ SI
-+ ((SI tmpcode) (SI tmpval) (SI tmpres))
-+ (set tmpcode swapcode)
-+ (set tmpval val)
-+ (.splice
-+ cond
-+ (.unsplice
-+ (.map
-+ (.pmacro
-+ (x-swapcode x-swap)
-+ ((eq tmpcode x-swapcode)
-+ (set tmpres ((.sym swap- x-swap) tmpval))))
-+ (.iota 16)
-+ (.splice _ (.unsplice cris-swap-codes)))))
-+ tmpres)
-+)
-+
-+; NOT Rd alias for SWAPN Rd
-+(dni-cdt-attr
-+ not "Not"
-+ ((MACH crisv0,crisv3))
-+ "not ${Rs}"
-+ (+ (f-dest 8) RFIX_SWAP MODE_REGISTER SIZE_FIXED Rd-sfield)
-+ (sequence
-+ ((SI tmp) (SI tmpd))
-+ (set tmp Rd-sfield)
-+ (set tmpd (cris-swap 8 tmp))
-+ (set Rd-sfield tmpd)
-+ (setf-move SI tmpd))
-+)
-+
-+; SWAP<option> Rd [ N W B R | 01110111 | Rd ]
-+(dni-cdt-attr
-+ swap "Swap"
-+ ((MACH crisv8,crisv10,crisv32))
-+ "swap${swapoption} ${Rs}"
-+ (+ swapoption RFIX_SWAP MODE_REGISTER SIZE_FIXED Rd-sfield)
-+ (sequence
-+ ((SI tmps) (SI tmpd))
-+ (set tmps Rd-sfield)
-+ (set tmpd (cris-swap swapoption tmps))
-+ (set Rd-sfield tmpd)
-+ (setf-move SI tmpd))
-+)
-+
-+; ASR.m Rs,Rd [ Rd | 011110mm | Rs ]
-+(dni-cdt-bwd
-+ asrr "Arithmetic shift right register count"
-+ "$Rs,$Rd"
-+ (+ Rd MODE_REGISTER R_ASR Rs)
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ((BWD tmpd) (SI cnt1) (SI cnt2))
-+ (set cnt1 Rs)
-+ (set cnt2 (if SI (ne (and cnt1 32) 0) 31 (and cnt1 31)))
-+ (set tmpd (sra SI (ext SI (trunc BWD Rd)) cnt2))
-+ (set-subreg-gr BWD (regno Rd) tmpd)
-+ (setf-move BWD tmpd)))
-+)
-+
-+; ASRQ c,Rd [ Rd | 0011101 | c ]
-+(dni-cdt
-+ asrq "Arithmetic shift right quick-immediate count"
-+ "asrq $c,${Rd}"
-+ (+ Rd Q_ASHQ MODE_QUICK_IMMEDIATE (f-b5 1) c)
-+ (sequence
-+ ((SI tmpd))
-+ (set tmpd (sra Rd c))
-+ (set Rd tmpd)
-+ (setf-move SI tmpd))
-+)
-+
-+; LSR.m Rs,Rd [ Rd | 011111mm | Rs ]
-+(dni-cdt-bwd
-+ lsrr "Logical shift right register count"
-+ "$Rs,$Rd"
-+ (+ Rd MODE_REGISTER R_LSR Rs)
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ((SI tmpd) (SI cnt))
-+ (set cnt (and Rs 63))
-+ (set
-+ tmpd
-+ (if SI (ne (and cnt 32) 0)
-+ 0
-+ (srl SI (zext SI (trunc BWD Rd)) (and cnt 31))))
-+ (set-subreg-gr BWD (regno Rd) tmpd)
-+ (setf-move BWD tmpd)))
-+)
-+
-+; LSRQ c,Rd [ Rd | 0011111 | c ]
-+(dni-cdt
-+ lsrq "Logical shift right quick-immediate count"
-+ "lsrq $c,${Rd}"
-+ (+ Rd Q_LSHQ MODE_QUICK_IMMEDIATE (f-b5 1) c)
-+ (sequence
-+ ((SI tmpd))
-+ (set tmpd (srl Rd c))
-+ (set Rd tmpd)
-+ (setf-move SI tmpd))
-+)
-+
-+; LSL.m Rs,Rd [ Rd | 010011mm | Rs ]
-+(dni-cdt-bwd
-+ lslr "Logical shift left register count"
-+ "$Rs,$Rd"
-+ (+ Rd MODE_REGISTER R_LSL Rs)
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ((SI tmpd) (SI cnt))
-+ (set cnt (and Rs 63))
-+ (set
-+ tmpd
-+ (if SI (ne (and cnt 32) 0)
-+ 0
-+ (sll SI (zext SI (trunc BWD Rd)) (and cnt 31))))
-+ (set-subreg-gr BWD (regno Rd) tmpd)
-+ (setf-move BWD tmpd)))
-+)
-+
-+; LSLQ c,Rd [ Rd | 0011110 | c ]
-+(dni-cdt
-+ lslq "Logical shift left quick-immediate count"
-+ "lslq $c,${Rd}"
-+ (+ Rd Q_LSHQ MODE_QUICK_IMMEDIATE (f-b5 0) c)
-+ (sequence
-+ ((SI tmpd))
-+ (set tmpd (sll Rd c))
-+ (set Rd tmpd)
-+ (setf-move SI tmpd))
-+)
-+
-+; BTST Rs,Rd [ Rd | 01001111 | Rs ]
-+(dni-cdt
-+ btst "Bit test register number"
-+ "$Rs,$Rd"
-+ (+ Rd MODE_REGISTER RFIX_BTST SIZE_FIXED Rs)
-+ (sequence
-+ ((SI tmpd) (SI cnt))
-+ (set tmpd (sll Rd (sub 31 (and Rs 31))))
-+ (setf-move SI tmpd))
-+)
-+
-+; BTSTQ c,Rd [ Rd | 0011100 | c ]
-+(dni-cdt
-+ btstq "Bit test quick-immediate number"
-+ "btstq $c,${Rd}"
-+ (+ Rd Q_ASHQ MODE_QUICK_IMMEDIATE (f-b5 0) c)
-+ (sequence
-+ ((SI tmpd))
-+ (set tmpd (sll Rd (sub 31 c)))
-+ (setf-move SI tmpd))
-+)
-+
-+; SETF <list of flags> [ P U I X | 01011011 | N Z V C ]
-+(dni-cdt
-+ setf "Set condition code flags explicitly"
-+ "setf ${list-of-flags}"
-+ ; The zero-flags case gets flag operands wrong; there's a "_"
-+ ; where there should have been nothing. Also, flags are in
-+ ; assembly code allowed to be specified in any order, which
-+ ; doesn't match the "flagbits" settings. Luckily we don't
-+ ; use this field for assembly.
-+ (+ RFIX_SETF MODE_REGISTER SIZE_FIXED list-of-flags)
-+ (.splice
-+ sequence
-+ ((SI tmp))
-+ (set tmp list-of-flags)
-+ (.unsplice
-+ (.map
-+ (.pmacro (ccbit)
-+ (if (ne (and tmp (sll 1 (.sym ccbit -bitnumber))) 0)
-+ (set (.sym ccbit bit) 1)))
-+ cris-flagnames))
-+ (set prefix-set 0)
-+ ; Unless x was specified to be set, set it to 0.
-+ (if (eq (and tmp (sll 1 x-bitnumber)) 0)
-+ (set xbit 0)))
-+)
-+
-+; CLEARF <list of flags> [ P U I X | 01011111 | N Z V C ]
-+(dni-cdt
-+ clearf "Clear condition code flags explicitly"
-+ "clearf ${list-of-flags}"
-+ ; The zero-flags case gets flag operands wrong; there's a "_"
-+ ; where there should have been nothing. Also, flags are in
-+ ; assembly code allowed to be specified in any order, which
-+ ; doesn't match the "flagbits" settings. Luckily we don't
-+ ; use this field for assembly.
-+ (+ RFIX_CLEARF MODE_REGISTER SIZE_FIXED list-of-flags)
-+ (.splice
-+ sequence
-+ ((SI tmp))
-+ (set tmp list-of-flags)
-+ (.unsplice
-+ (.map
-+ (.pmacro (ccbit)
-+ (if (ne (and tmp (sll 1 (.sym ccbit -bitnumber))) 0)
-+ (set (.sym ccbit bit) 0)))
-+ cris-flagnames))
-+ (reset-x-p))
-+)
-+
-+(define-pmacro
-+ (rfe-rfn-guts)
-+ "Common parts of RFE and RFN"
-+ (sequence
-+ ((USI oldccs) (USI samebits) (USI shiftbits) (USI keepmask) (BI p1))
-+ (set oldccs ccs)
-+ ; Keeping U, S and I in user mode is handled by the CCS setter, so we
-+ ; don't have to bother. Actually Q and M are handled too. The reason
-+ ; to mask those out is to not have them shifted down into the second
-+ ; flags level.
-+ (set keepmask #xc0000000)
-+ (set samebits (and oldccs keepmask))
-+ ; The P bit has its own equation.
-+ (set shiftbits (and (srl (and oldccs #x3ffdfc00) 10) (inv keepmask)))
-+ (set p1 (ne 0 (and oldccs #x20000)))
-+ (set ccs (or (or samebits shiftbits)
-+ (if SI (and rbit (not p1)) 0 #x80))))
-+)
-+
-+; RFE [ 0010 10010011 0000 ]
-+(dni-cdt-attr
-+ rfe
-+ "RFE"
-+ (MACH-V32)
-+ "rfe"
-+ (+ (f-dest 2) MODE_INDIRECT INFIX_RFE SIZE_FIXED (f-source 0))
-+ (rfe-rfn-guts)
-+)
-+
-+; SFE [ 0011 10010011 0000 ]
-+(dni-cdt-attr
-+ sfe
-+ "SFE"
-+ (MACH-V32)
-+ "sfe"
-+ (+ (f-dest 3) MODE_INDIRECT INFIX_SFE SIZE_FIXED (f-source 0))
-+ (sequence
-+ ((SI oldccs) (SI savemask))
-+ (set savemask #xc0000000)
-+ (set oldccs ccs)
-+ (set ccs
-+ (or (and savemask oldccs)
-+ (and (inv savemask) (sll oldccs 10)))))
-+)
-+
-+; RFG [ 0100 10010011 0000 ]
-+(dni-cdt-attr
-+ rfg
-+ "RFG"
-+ (MACH-V32)
-+ "rfg"
-+ (+ (f-dest 4) MODE_INDIRECT INFIX_RFG SIZE_FIXED (f-source 0))
-+ (c-call VOID "@cpu@_rfg_handler" pc)
-+)
-+
-+; RFN [ 0101 10010011 0000 ]
-+(dni-cdt-attr
-+ rfn
-+ "RFN"
-+ (MACH-V32)
-+ "rfn"
-+ (+ (f-dest 5) MODE_INDIRECT INFIX_RFN SIZE_FIXED (f-source 0))
-+ (sequence () (rfe-rfn-guts) (set mbit 1))
-+)
-+
-+; HALT [ 1111 10010011 0000 ]
-+(dni-cdt-attr
-+ halt
-+ "HALT"
-+ (MACH-V32)
-+ "halt"
-+ (+ (f-dest 15) MODE_INDIRECT INFIX_HALT SIZE_FIXED (f-source 0))
-+ (set pc (c-call USI "@cpu@_halt_handler" pc))
-+)
-+
-+; Bcc o [ cc | 0000 | o ]
-+(dni
-+ bcc-b "bcc byte operand"
-+ ()
-+ "b${cc} ${o-pcrel}"
-+ (+ cc QHI_BCC MODE_QUICK_IMMEDIATE o-pcrel)
-+ (sequence
-+ ((BI truthval))
-+ (set truthval (cris-condition cc))
-+
-+ ; Amazing as it may seem, there's no simpler way to find out
-+ ; whether a branch is taken or not than to mark it through a kludge
-+ ; like this.
-+ (c-call VOID "@cpu@_branch_taken" pc o-pcrel truthval)
-+
-+ (reset-x-p)
-+ (if truthval
-+ (delay 1
-+ (set pc o-pcrel))))
-+ (.splice (.unsplice (simplecris-timing))
-+ (crisv32 (unit u-branch) (unit u-exec)))
-+)
-+(dni
-+ ba-b "ba byte operand"
-+ ()
-+ "ba ${o-pcrel}"
-+ (+ (f-dest 14) QHI_BCC MODE_QUICK_IMMEDIATE o-pcrel)
-+ (sequence
-+ ()
-+ (reset-x-p)
-+ (delay 1
-+ (set pc o-pcrel)))
-+ ((crisv32 (unit u-jump) (unit u-exec)))
-+)
-+
-+; Bcc [PC+] [ cc | 11011111 1111 ]
-+; (We don't implement the generic for pre-V32 but unused variant
-+; "Bcc [Rn(+)]" where n != 15.)
-+(dni
-+ bcc-w "bcc, word operand"
-+ ()
-+ "b${cc} ${o-word-pcrel}"
-+ (+ cc MODE_AUTOINCREMENT INFIX_BCC_M SIZE_FIXED (f-source 15) o-word-pcrel)
-+ (sequence
-+ ((BI truthval))
-+ (set truthval (cris-condition cc))
-+
-+ ; Amazing as it may seem, there's no simpler way to find out
-+ ; whether a branch is taken or not than to mark it through a kludge
-+ ; like this.
-+ (c-call VOID "@cpu@_branch_taken" pc o-word-pcrel truthval)
-+
-+ (reset-x-p)
-+ (if truthval
-+ (delay 1
-+ (set pc o-word-pcrel))))
-+ (.splice
-+ (.unsplice (simplecris-common-timing ((unit u-const16) (unit u-exec))))
-+ (crisv32 (unit u-const16) (unit u-branch) (unit u-exec)))
-+)
-+(dni
-+ ba-w "ba word operand"
-+ ()
-+ "ba ${o-word-pcrel}"
-+ (+ (f-dest 14) MODE_AUTOINCREMENT INFIX_BCC_M SIZE_FIXED (f-source 15) o-word-pcrel)
-+ (sequence
-+ ()
-+ (reset-x-p)
-+ (delay 1
-+ (set pc o-word-pcrel)))
-+ (.splice
-+ (.unsplice (simplecris-common-timing ((unit u-const16) (unit u-exec))))
-+ (crisv32 (unit u-const16) (unit u-jump) (unit u-exec)))
-+)
-+
-+; JAS Rs,Pd [ Pd | 10011011 | Rs ]
-+(dni
-+ jas-r "JAS register"
-+ (MACH-V32)
-+ "jas ${Rs},${Pd}"
-+ (+ Pd MODE_INDIRECT INFIX_JAS_R SIZE_FIXED Rs)
-+ (sequence
-+ ()
-+ (reset-x-p)
-+ (if (andif (eq (regno Rs) 1) (eq (regno Pd) 11))
-+ ; We use this as a trigger; a normally reasonably rare instruction
-+ ; used in the v32 trampoline. See comment at bdapqpc.
-+ ; CGEN-FIXME: can't use (regno srp) [== (regno (reg h-sr 11))]
-+ (c-call VOID "cris_flush_simulator_decode_cache" pc))
-+ (delay 1
-+ (sequence
-+ ()
-+ (set Pd (add SI pc 4))
-+ (set pc Rs))))
-+ ((crisv32 (unit u-jump-r) (unit u-jump) (unit u-exec)))
-+)
-+; Same semantics in pre-V32, except no delay-slot.
-+; FIXME: Missing JIRC/JSRC/JBRC.
-+(dni-cdt-attr
-+ jump-r "JUMP/JSR/JIR register"
-+ (MACH-PC)
-+ "jump/jsr/jir ${Rs}"
-+ (+ Pd MODE_INDIRECT INFIX_JUMP_R SIZE_FIXED Rs)
-+ (sequence
-+ ()
-+ (set Pd (add SI pc 2))
-+ (set pc Rs)
-+ (reset-x-p))
-+)
-+
-+; JAS [PC+],Pd [ Pd | 11011011 1111 ]
-+(dni
-+ jas-c "JAS constant"
-+ (MACH-V32)
-+ "jas ${const32},${Pd}"
-+ (+ Pd MODE_AUTOINCREMENT INFIX_JAS_M SIZE_FIXED (f-source 15) const32)
-+ (sequence
-+ ()
-+ (reset-x-p)
-+ (delay 1
-+ (sequence
-+ ()
-+ (set Pd (add SI pc 8))
-+ (set pc const32))))
-+ ((crisv32 (unit u-const32) (unit u-jump) (unit u-exec)))
-+)
-+
-+; JUMP/JSR/JIR | Special r.| 1 m| 0 1 0 0| 1 1| Source |
-+(dni-cmt-attr
-+ jump-m "JUMP/JSR/JIR memory"
-+ (MACH-PC)
-+ "jump/jsr/jir [${Rs}${inc}]"
-+ (+ Pd INFIX_JUMP_M SIZE_FIXED Rs)
-+ (sequence
-+ ()
-+ (set Pd (add SI pc 2))
-+ (set pc (cris-get-mem SI Rs))
-+ (reset-x-p))
-+)
-+(dni-c-SI-attr
-+ jump-c "JUMP/JSR/JIR constant"
-+ (MACH-PC)
-+ "jump/jsr/jir ${const32}"
-+ (+ Pd MODE_AUTOINCREMENT INFIX_JUMP_M SIZE_FIXED (f-source 15) const32)
-+ (sequence
-+ ()
-+ (set Pd (add SI pc 6))
-+ (set pc const32)
-+ (reset-x-p))
-+)
-+
-+; JUMP Ps [ Ps | 10011111 0000 ]
-+(dni
-+ jump-p "JUMP special register"
-+ (MACH-V32)
-+ "jump ${Ps}"
-+ (+ Ps MODE_INDIRECT INFIX_JUMP_P SIZE_FIXED (f-source 0))
-+ (sequence
-+ ()
-+ (reset-x-p)
-+ (delay 1
-+ (set pc Ps)))
-+ ((crisv32 (unit u-jump-sr)
-+ (unit u-exec)))
-+)
-+
-+; BAS [PC+],Pd [ Pd | 11101011 1111 ]
-+(dni
-+ bas-c "BAS constant"
-+ (MACH-V32)
-+ "bas ${const32},${Pd}"
-+ (+ Pd MODE_AUTOINCREMENT INFIX_BAS SIZE_FIXED (f-source 15) const32-pcrel)
-+ (sequence
-+ ()
-+ (reset-x-p)
-+ (delay 1
-+ (sequence
-+ ()
-+ (set Pd (add SI pc 8))
-+ (set pc const32-pcrel))))
-+ ((crisv32 (unit u-const32) (unit u-jump) (unit u-exec)))
-+)
-+
-+; JASC Rs,Pd [ Pd | 10110011 | Rs ]
-+(dni
-+ jasc-r "JASC register"
-+ (MACH-V32)
-+ "jasc ${Rs},${Pd}"
-+ (+ Pd MODE_INDIRECT INFIX_JASC SIZE_FIXED Rs)
-+ (sequence
-+ ()
-+ (reset-x-p)
-+ (delay 1
-+ (sequence
-+ ()
-+ (set Pd (add SI pc 8))
-+ (set pc Rs))))
-+ ((crisv32 (unit u-jump-r) (unit u-skip4) (unit u-jump) (unit u-exec)))
-+)
-+
-+; JASC [PC+],Pd [ Pd | 11110011 1111 ]
-+(dni
-+ jasc-c "JASC constant"
-+ (MACH-V32)
-+ "jasc ${const32},${Pd}"
-+ (+ Pd MODE_AUTOINCREMENT INFIX_JASC SIZE_FIXED (f-source 15) const32)
-+ (sequence
-+ ()
-+ (reset-x-p)
-+ (delay 1
-+ (sequence
-+ ()
-+ (set Pd (add SI pc 12))
-+ (set pc const32))))
-+ ((crisv32 (unit u-const32) (unit u-skip4) (unit u-jump) (unit u-exec)))
-+)
-+
-+; BASC [PC+],Pd [ Pd | 11101111 1111 ]
-+(dni
-+ basc-c "BASC constant"
-+ (MACH-V32)
-+ "basc ${const32},${Pd}"
-+ (+ Pd MODE_AUTOINCREMENT INFIX_BASC SIZE_FIXED (f-source 15) const32-pcrel)
-+ (sequence
-+ ()
-+ (reset-x-p)
-+ (delay 1
-+ (sequence
-+ ()
-+ (set Pd (add SI pc 12))
-+ (set pc const32-pcrel))))
-+ ((crisv32 (unit u-const32) (unit u-skip4) (unit u-jump) (unit u-exec)))
-+)
-+
-+; BREAK n [ 1110 | 10010011 | n ]
-+
-+(dni-cdt
-+ break "break"
-+ "break $n"
-+ (+ (f-operand2 #xe) MODE_INDIRECT INFIX_BREAK SIZE_FIXED n)
-+ (sequence () (reset-x-p) (set pc (c-call USI "@cpu@_break_handler" n pc)))
-+)
-+
-+; BOUND.m Rs,Rd [ Rd | 010111mm | Rs ]
-+(dni-cdt-bwd
-+ bound-r "Bound register"
-+ "${Rs},${Rd}"
-+ (+ Rd R_BOUND MODE_REGISTER Rs)
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ((SI tmpopd) (SI tmpops) (SI newval))
-+ (set tmpops ((.sym BWD -zext) (trunc BWD Rs)))
-+ (set tmpopd Rd)
-+ (set newval (if SI (ltu tmpops tmpopd) tmpops tmpopd))
-+ (set Rd newval)
-+ (setf-move SI newval)))
-+)
-+
-+; BOUND.m [Rs],Rd [ Rd | 100111mm | Rs ]
-+; BOUND.m [Rs+],Rd [ Rd | 110111mm | Rs ]
-+(dni-cmt-bwd-attr
-+ bound-m "Bound memory"
-+ (MACH-PRE-V32)
-+ "[${Rs}${inc}],${Rd}"
-+ (+ Rd INDIR_BOUND Rs)
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ((SI tmpopd) (SI tmpops) (SI newval))
-+ (set tmpops ((.sym BWD -zext) (cris-get-mem BWD Rs)))
-+ (set tmpopd Rd)
-+ (set newval (if SI (ltu tmpops tmpopd) tmpops tmpopd))
-+ (if (andif prefix-set (not inc))
-+ (set Rs newval)
-+ (set Rd newval))
-+ (setf-move SI newval)))
-+)
-+
-+; (BOUND.m [PC+],Rd [ Rd | 110111mm | 1111 ])
-+(dni-c-QI
-+ bound-cb "Bound constant byte"
-+ "bound.b [PC+],${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_BOUND SIZE_BYTE (f-source 15) uconst8)
-+ (sequence
-+ ((SI tmpopd) (SI tmpops) (SI newval))
-+ (set tmpops (zext SI (trunc QI uconst8)))
-+ (set tmpopd Rd)
-+ (set newval (if SI (ltu tmpops tmpopd) tmpops tmpopd))
-+ (set Rd newval)
-+ (setf-move SI newval))
-+)
-+(dni-c-HI
-+ bound-cw "Bound constant word"
-+ "bound.w [PC+],${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_BOUND SIZE_WORD (f-source 15) uconst16)
-+ (sequence
-+ ((SI tmpopd) (SI tmpops) (SI newval))
-+ (set tmpops (zext SI uconst16))
-+ (set tmpopd Rd)
-+ (set newval (if SI (ltu tmpops tmpopd) tmpops tmpopd))
-+ (set Rd newval)
-+ (setf-move SI newval))
-+)
-+(dni-c-SI
-+ bound-cd "Bound constant dword"
-+ "bound.d [PC+],${Rd}"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_BOUND SIZE_DWORD (f-source 15) const32)
-+ (sequence
-+ ((SI tmpopd) (SI tmpops) (SI newval))
-+ (set tmpops const32)
-+ (set tmpopd Rd)
-+ (set newval (if SI (ltu tmpops tmpopd) tmpops tmpopd))
-+ (set Rd newval)
-+ (setf-move SI newval))
-+)
-+
-+; Scc Rd [ cc | 01010011 | Rd ]
-+(dni-cdt
-+ scc "scc"
-+ "s${cc} ${Rd-sfield}"
-+ (+ cc MODE_REGISTER RFIX_SCC SIZE_FIXED Rd-sfield)
-+ (sequence
-+ ((BI truthval))
-+ (set truthval (cris-condition cc))
-+ (set Rd-sfield (zext SI truthval))
-+ (reset-x-p))
-+)
-+
-+; LZ Rs,Rd [ Rd | 01110011 | Rs ]
-+(dni-cdt-attr
-+ lz "lz"
-+ (MACH-V3-UP)
-+ "lz ${Rs},${Rd}"
-+ (+ Rd MODE_REGISTER RFIX_LZ SIZE_FIXED Rs)
-+ (sequence
-+ ((SI tmpd) (SI tmp))
-+ (set tmp Rs)
-+ (set tmpd 0)
-+ (.splice
-+ sequence
-+ ()
-+ (.unsplice
-+ (.map
-+ (.pmacro (n)
-+ (if (ge tmp 0)
-+ (sequence
-+ ()
-+ (set tmp (sll tmp 1))
-+ (set tmpd (add tmpd 1)))))
-+ (.iota 32))))
-+ (set Rd tmpd)
-+ (setf-move SI tmpd))
-+)
-+
-+; ADDOQ o,Rs,ACR [ Rs | 0001 | o ]
-+(dni-cdt
-+ addoq "addoq"
-+ "addoq $o,$Rs,ACR"
-+ (+ Rs-dfield MODE_QUICK_IMMEDIATE QHI_ADDOQ o)
-+ (sequence
-+ ()
-+ (set prefixreg (add SI Rs-dfield o))
-+ (set prefix-set 1))
-+)
-+
-+; (BDAPQ o,PC [ 1111 | 0001 | o ])
-+; This [PC+I] prefix is used in trampolines.
-+(dni-cdt-attr
-+ bdapqpc "bdapq pc operand"
-+ (MACH-PC UNCOND-CTI)
-+ "bdapq $o,PC"
-+ (+ (f-dest 15) MODE_QUICK_IMMEDIATE QHI_BDAP o)
-+ (sequence
-+ ()
-+ (set prefixreg (add SI (add SI pc 2) o))
-+ (set prefix-set 1)
-+ ; When this *rare* instruction is seen, we're may be about to write
-+ ; into code to be executed soon, *probably* covering addresses decoded
-+ ; and executed before. If the simulator does not implement snooping
-+ ; and automatic decoder flush, it will execute old code. This call
-+ ; is a kludge for such simulators, asking it to abandon such cached
-+ ; information. Anyway, it is hopefully enough to make CGEN-sim not
-+ ; hork on gcc trampolines.
-+ ; We mark this insn as UNCOND-CTI so this insn will end a simulator
-+ ; basic block (the atomic unit of translation).
-+ (c-call VOID "cris_flush_simulator_decode_cache" pc))
-+)
-+
-+; (BDAP.D [PC+],PC [ 1111 | 11010110 | 1111 ]
-+; This [PC+I] prefix is used for DSO-local jumps in PIC code, together with
-+; move-m-pcplus-p0: "move [pc=pc+N],p0"
-+(dni-c-SI-attr
-+ bdap-32-pc "bdap.d [PC+],PC"
-+ (MACH-PC)
-+ "bdap ${sconst32},PC"
-+ (+ (f-dest 15) MODE_AUTOINCREMENT INDIR_BDAP_M SIZE_DWORD (f-source 15) const32)
-+ (sequence
-+ ((SI newpc) (SI oldpc) (SI offs))
-+ (set offs const32)
-+ (set oldpc (add SI pc 6))
-+ (set newpc (add SI oldpc offs))
-+ (set prefixreg newpc)
-+ (set prefix-set 1))
-+)
-+
-+; (MOVE [PC+],P0 [ 0000 | 11100011 | 1111 ])
-+; This insn is used for DSO-local jumps in PIC code. See bdap-32-pc.
-+(dni ; Must not use dni-cmt-* because we force MODE_AUTOINCREMENT.
-+ move-m-pcplus-p0 "move [PC+],P0"
-+ (MACH-PC)
-+ "move [PC+],P0"
-+ (+ (f-dest 0) MODE_AUTOINCREMENT INFIX_MOVE_M_S SIZE_FIXED (f-source 15))
-+ (if prefix-set
-+ (sequence
-+ ((QI dummy))
-+ ; We model the memory read, but throw the result away, as the
-+ ; destination register is read-only. We need to assign the result of
-+ ; cris-get-mem though, as CGEN-FIXME: invalid C code will otherwise
-+ ; be generated.
-+ (set dummy (cris-get-mem QI pc))
-+ (reset-x-p))
-+ (error "move [PC+],P0 without prefix is not implemented"))
-+ (cris-mem-timing)
-+)
-+
-+; This insn is used in Linux in the form "move [$sp=$sp+16],$p8"; it's
-+; similar to move-m-pcplus-p0 above. The same comments apply here.
-+(dni
-+ move-m-spplus-p8 "move [SP+],P8"
-+ (MACH-PC)
-+ "move [SP+],P8"
-+ (+ (f-dest 8) MODE_AUTOINCREMENT INFIX_MOVE_M_S SIZE_FIXED (f-source 14))
-+ (if prefix-set
-+ (sequence
-+ ((SI dummy))
-+ (set dummy (cris-get-mem SI sp))
-+ (reset-x-p))
-+ (error "move [SP+],P8 without prefix is not implemented"))
-+ (cris-mem-timing)
-+)
-+
-+; ADDO.m [Rs],Rd,ACR [ Rd | 100101mm | Rs ]
-+; ADDO.m [Rs+],Rd,ACR [ Rd | 110101mm | Rs ]
-+(dni-cmt-bwd
-+ addo-m "addo.m memory"
-+ "[${Rs}${inc}],$Rd,ACR"
-+ (+ Rd INDIR_ADDO Rs)
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ((BWD tmps))
-+ (set tmps (cris-get-mem BWD Rs))
-+ (set prefixreg (add SI Rd ((.sym BWD -ext) tmps)))
-+ (set prefix-set 1)))
-+)
-+
-+; (ADDO.m [PC+],Rd,ACR [ Rd | 110101mm | 1111 ]
-+(dni-c-QI
-+ addo-cb "addo.b const"
-+ "addo.b [PC+],$Rd,ACR"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_ADDO SIZE_BYTE (f-source 15) sconst8)
-+ (sequence
-+ ()
-+ (set prefixreg (add SI Rd (ext SI (trunc QI sconst8))))
-+ (set prefix-set 1))
-+)
-+(dni-c-HI
-+ addo-cw "addo.w const"
-+ "addo.w [PC+],$Rd,ACR"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_ADDO SIZE_WORD (f-source 15) sconst16)
-+ (sequence
-+ ()
-+ (set prefixreg (add SI Rd (ext SI (trunc HI sconst16))))
-+ (set prefix-set 1))
-+)
-+(dni-c-SI
-+ addo-cd "addo.d const"
-+ "addo.d [PC+],$Rd,ACR"
-+ (+ Rd MODE_AUTOINCREMENT INDIR_ADDO SIZE_DWORD (f-source 15) const32)
-+ (sequence
-+ ()
-+ (set prefixreg (add SI Rd const32))
-+ (set prefix-set 1))
-+)
-+
-+; DIP [] | 0 0 0 0| 1 m| 0 1 0 1| 1 1| Source |
-+
-+(dni-cmt-attr
-+ dip-m "dip mem"
-+ (MACH-PRE-V32)
-+ "dip [${Rs}${inc}]"
-+ (+ (f-dest 0) INFIX_DIP SIZE_FIXED Rs)
-+ (sequence
-+ ((SI tmps))
-+ (set tmps (cris-get-mem SI Rs))
-+ (set prefixreg tmps)
-+ (set prefix-set 1))
-+)
-+
-+; (DIP [] | 0 0 0 0| 1 m| 0 1 0 1| 1 1| Source | )
-+(dni-c-SI-attr
-+ dip-c "dip [PC+]"
-+ (MACH-PC)
-+ "dip [PC+]"
-+ (+ (f-dest 0) MODE_AUTOINCREMENT INFIX_DIP SIZE_FIXED (f-source 15) const32)
-+ (sequence
-+ ()
-+ (set prefixreg const32)
-+ (set prefix-set 1))
-+)
-+
-+; ADDI Rs.m,Rd,ACR [ Rs | 010101mm | Rd ]
-+; a.k.a. biap
-+(dni-cdt-bwd
-+ addi-acr "addi prefix"
-+ "${Rs-dfield}.m,${Rd-sfield},ACR"
-+ (+ Rd-sfield MODE_REGISTER R_ADDI_ACR Rs-dfield)
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ()
-+ (set prefixreg (add SI Rd-sfield (mul Rs-dfield (.sym BWD -size))))
-+ (set prefix-set 1)))
-+)
-+
-+(dni-cdt-bwd-attr
-+ biap-pc "biap.m ${Rs-dfield},PC"
-+ (MACH-PC)
-+ "${Rs-dfield}.m,PC"
-+ (+ Rs-dfield MODE_REGISTER R_ADDI_ACR (f-source 15))
-+ (.pmacro
-+ (BWD)
-+ (sequence
-+ ()
-+ (set prefixreg (add SI (add SI pc 4) (mul Rs-dfield (.sym BWD -size))))
-+ (set prefix-set 1)))
-+)
-+
-+; FIDXI [Rs] [ 0000 | 11010011 | Rs ]
-+(dni-cdt-attr
-+ fidxi "fidxi [Rs]"
-+ (MACH-V32)
-+ "fidxi [$Rs]"
-+ (+ (f-dest 0) MODE_AUTOINCREMENT INFIX_FIDXI SIZE_FIXED Rs)
-+ (set pc (c-call USI "@cpu@_fidxi_handler" pc Rs))
-+)
-+
-+; FTAGI [Rs] [ 0001 | 11010011 | Rs ]
-+(dni-cdt-attr
-+ ftagi "ftagi [Rs]"
-+ (MACH-V32)
-+ "fidxi [$Rs]"
-+ (+ (f-dest 1) MODE_AUTOINCREMENT INFIX_FTAGI SIZE_FIXED Rs)
-+ (set pc (c-call USI "@cpu@_ftagi_handler" pc Rs))
-+)
-+
-+; FIDXD [Rs] [ 0000 | 10101011 | Rs ]
-+(dni-cdt-attr
-+ fidxd "fidxd [Rs]"
-+ (MACH-V32)
-+ "fidxd [$Rs]"
-+ (+ (f-dest 0) MODE_INDIRECT INFIX_FIDXD SIZE_FIXED Rs)
-+ (set pc (c-call USI "@cpu@_fidxd_handler" pc Rs))
-+)
-+
-+; FTAGD [Rs] [ 0001 | 10101011 | Rs ]
-+(dni-cdt-attr
-+ ftagd "ftagd [Rs]"
-+ (MACH-V32)
-+ "ftagd [$Rs]"
-+ (+ (f-dest 1) MODE_INDIRECT INFIX_FTAGD SIZE_FIXED Rs)
-+ (set pc (c-call USI "@cpu@_ftagd_handler" pc Rs))
-+)
-diff -Nur binutils-2.24.orig/cgen/cpu/fr30.cpu binutils-2.24/cgen/cpu/fr30.cpu
---- binutils-2.24.orig/cgen/cpu/fr30.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/fr30.cpu 2016-06-30 21:26:12.609891400 +0200
-@@ -0,0 +1,1845 @@
-+; Fujitsu FR30 CPU description. -*- Scheme -*-
-+; Copyright (C) 2000 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+(include "simplify.inc")
-+
-+; define-arch must appear first
-+
-+(define-arch
-+ (name fr30) ; name of cpu family
-+ (comment "Fujitsu FR30")
-+ (default-alignment forced)
-+ (insn-lsb0? #f)
-+ (machs fr30)
-+ (isas fr30)
-+)
-+
-+(define-isa
-+ (name fr30)
-+ (base-insn-bitsize 16)
-+ (decode-assist (0 1 2 3 4 5 6 7)) ; Initial bitnumbers to decode insns by.
-+ (liw-insns 1) ; The fr30 fetches 1 insn at a time.
-+ (parallel-insns 1) ; The fr30 executes 1 insn at a time.
-+)
-+
-+(define-cpu
-+ ; cpu names must be distinct from the architecture name and machine names.
-+ ; The "b" suffix stands for "base" and is the convention.
-+ ; The "f" suffix stands for "family" and is the convention.
-+ (name fr30bf)
-+ (comment "Fujitsu FR30 base family")
-+ (endian big)
-+ (word-bitsize 32)
-+)
-+
-+(define-mach
-+ (name fr30)
-+ (comment "Generic FR30 cpu")
-+ (cpu fr30bf)
-+)
-+
-+; Model descriptions.
-+;
-+(define-model
-+ (name fr30-1) (comment "fr30-1") (attrs)
-+ (mach fr30)
-+
-+ (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
-+
-+ ; `state' is a list of variables for recording model state
-+ (state
-+ ; bit mask of h-gr registers loaded from memory by previous insn
-+ (load-regs UINT)
-+ ; bit mask of h-gr registers loaded from memory by current insn
-+ (load-regs-pending UINT)
-+ )
-+
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((Ri INT -1) (Rj INT -1)) ; inputs
-+ ((Ri INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-cti "Branch Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((Ri INT -1)) ; inputs
-+ ((pc)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-load "Memory Load Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((Rj INT -1)
-+ ;(ld-mem AI)
-+ ) ; inputs
-+ ((Ri INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-store "Memory Store Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((Ri INT -1) (Rj INT -1)) ; inputs
-+ () ; ((st-mem AI)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-ldm "LDM Memory Load Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((reglist INT)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-stm "STM Memory Store Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((reglist INT)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+; The instruction fetch/execute cycle.
-+;
-+; This is how to fetch and decode an instruction.
-+; Leave it out for now
-+
-+; (define-extract (const SI 0))
-+
-+; This is how to execute a decoded instruction.
-+; Leave it out for now
-+
-+; (define-execute (const SI 0))
-+
-+; Instruction fields.
-+;
-+; Attributes:
-+; PCREL-ADDR: pc relative value (for reloc and disassembly purposes)
-+; ABS-ADDR: absolute address (for reloc and disassembly purposes?)
-+; RESERVED: bits are not used to decode insn, must be all 0
-+
-+(dnf f-op1 "1st 4 bits of opcode" () 0 4)
-+(dnf f-op2 "2nd 4 bits of opcode" () 4 4)
-+(dnf f-op3 "3rd 4 bits of opcode" () 8 4)
-+(dnf f-op4 "4th 4 bits of opcode" () 12 4)
-+(dnf f-op5 "5th bit of opcode" () 4 1)
-+(dnf f-cc "condition code" () 4 4)
-+(dnf f-ccc "coprocessor calc code" () 16 8)
-+(dnf f-Rj "register Rj" () 8 4)
-+(dnf f-Ri "register Ri" () 12 4)
-+(dnf f-Rs1 "register Rs" () 8 4)
-+(dnf f-Rs2 "register Rs" () 12 4)
-+(dnf f-Rjc "register Rj" () 24 4)
-+(dnf f-Ric "register Ri" () 28 4)
-+(dnf f-CRj "coprocessor register" () 24 4)
-+(dnf f-CRi "coprocessor register" () 28 4)
-+(dnf f-u4 "4 bit 0 extended" () 8 4)
-+(dnf f-u4c "4 bit 0 extended" () 12 4)
-+(df f-i4 "4 bit sign extended" () 8 4 INT #f #f)
-+(df f-m4 "4 bit minus extended" () 8 4 UINT
-+ ((value pc) (and WI value (const #xf)))
-+ ; ??? On a 64 bit host this doesn't get completely sign extended
-+ ; if the value is recorded in a long, as it is during extraction.
-+ ; Various fixes exist, pick one.
-+ ((value pc) (or WI value (sll WI (const -1) (const 4))))
-+)
-+(dnf f-u8 "8 bit unsigned" () 8 8)
-+(dnf f-i8 "8 bit unsigned" () 4 8)
-+
-+(dnf f-i20-4 "upper 4 bits of i20" () 8 4)
-+(dnf f-i20-16 "lower 16 bits of i20" () 16 16)
-+(dnmf f-i20 "20 bit unsigned" () UINT
-+ (f-i20-4 f-i20-16)
-+ (sequence () ; insert
-+ (set (ifield f-i20-4) (srl (ifield f-i20) (const 16)))
-+ (set (ifield f-i20-16) (and (ifield f-i20) (const #xffff)))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-i20) (or (sll (ifield f-i20-4) (const 16))
-+ (ifield f-i20-16)))
-+ )
-+)
-+
-+(dnf f-i32 "32 bit immediate" (SIGN-OPT) 16 32)
-+
-+(df f-udisp6 "6 bit unsigned offset" () 8 4 UINT
-+ ((value pc) (srl UWI value (const 2)))
-+ ((value pc) (sll UWI value (const 2)))
-+)
-+(df f-disp8 "8 bit signed offset" () 4 8 INT #f #f)
-+(df f-disp9 "9 bit signed offset" () 4 8 INT
-+ ((value pc) (sra WI value (const 1)))
-+ ((value pc) (sll WI value (const 1)))
-+)
-+(df f-disp10 "10 bit signed offset" () 4 8 INT
-+ ((value pc) (sra WI value (const 2)))
-+ ((value pc) (sll WI value (const 2)))
-+)
-+(df f-s10 "10 bit signed offset" () 8 8 INT
-+ ((value pc) (sra WI value (const 2)))
-+ ((value pc) (sll WI value (const 2)))
-+)
-+(df f-u10 "10 bit unsigned offset" () 8 8 UINT
-+ ((value pc) (srl UWI value (const 2)))
-+ ((value pc) (sll UWI value (const 2)))
-+)
-+(df f-rel9 "9 pc relative signed offset" (PCREL-ADDR) 8 8 INT
-+ ((value pc) (sra WI (sub WI value (add WI pc (const 2))) (const 1)))
-+ ((value pc) (add WI (sll WI value (const 1)) (add WI pc (const 2))))
-+)
-+(dnf f-dir8 "8 bit direct address" () 8 8)
-+(df f-dir9 "9 bit direct address" () 8 8 UINT
-+ ((value pc) (srl UWI value (const 1)))
-+ ((value pc) (sll UWI value (const 1)))
-+)
-+(df f-dir10 "10 bit direct address" () 8 8 UINT
-+ ((value pc) (srl UWI value (const 2)))
-+ ((value pc) (sll UWI value (const 2)))
-+)
-+(df f-rel12 "12 bit pc relative signed offset" (PCREL-ADDR) 5 11 INT
-+ ((value pc) (sra WI (sub WI value (add WI pc (const 2))) (const 1)))
-+ ((value pc) (add WI (sll WI value (const 1)) (add WI pc (const 2))))
-+)
-+
-+(dnf f-reglist_hi_st "8 bit register mask for stm" () 8 8)
-+(dnf f-reglist_low_st "8 bit register mask for stm" () 8 8)
-+(dnf f-reglist_hi_ld "8 bit register mask for ldm" () 8 8)
-+(dnf f-reglist_low_ld "8 bit register mask for ldm" () 8 8)
-+
-+; Enums.
-+
-+; insn-op1: bits 0-3
-+; FIXME: should use die macro or some such
-+(define-normal-insn-enum insn-op1 "insn op1 enums" () OP1_ f-op1
-+ ("0" "1" "2" "3" "4" "5" "6" "7"
-+ "8" "9" "A" "B" "C" "D" "E" "F")
-+)
-+
-+; insn-op2: bits 4-7
-+; FIXME: should use die macro or some such
-+(define-normal-insn-enum insn-op2 "insn op2 enums" () OP2_ f-op2
-+ ("0" "1" "2" "3" "4" "5" "6" "7"
-+ "8" "9" "A" "B" "C" "D" "E" "F")
-+)
-+
-+; insn-op3: bits 8-11
-+; FIXME: should use die macro or some such
-+(define-normal-insn-enum insn-op3 "insn op3 enums" () OP3_ f-op3
-+ ("0" "1" "2" "3" "4" "5" "6" "7"
-+ "8" "9" "A" "B" "C" "D" "E" "F")
-+)
-+
-+; insn-op4: bits 12-15
-+; FIXME: should use die macro or some such
-+(define-normal-insn-enum insn-op4 "insn op4 enums" () OP4_ f-op4
-+ ("0")
-+)
-+
-+; insn-op5: bit 4 (5th bit origin 0)
-+; FIXME: should use die macro or some such
-+(define-normal-insn-enum insn-op5 "insn op5 enums" () OP5_ f-op5
-+ ("0" "1")
-+)
-+
-+; insn-cc: condition codes
-+; FIXME: should use die macro or some such
-+(define-normal-insn-enum insn-cc "insn cc enums" () CC_ f-cc
-+ ("ra" "no" "eq" "ne" "c" "nc" "n" "p" "v" "nv" "lt" "ge" "le" "gt" "ls" "hi")
-+)
-+
-+; Hardware pieces.
-+; These entries list the elements of the raw hardware.
-+; They're also used to provide tables and other elements of the assembly
-+; language.
-+
-+(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
-+
-+(define-keyword
-+ (name gr-names)
-+ (print-name h-gr)
-+ (prefix "")
-+ (values (r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)
-+ (r8 8) (r9 9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14) (r15 15)
-+ (ac 13) (fp 14) (sp 15))
-+)
-+
-+(define-hardware
-+ (name h-gr)
-+ (comment "general registers")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register WI (16))
-+ (indices extern-keyword gr-names)
-+)
-+
-+(define-keyword
-+ (name cr-names)
-+ (print-name h-cr)
-+ (prefix "")
-+ (values (cr0 0) (cr1 1) (cr2 2) (cr3 3)
-+ (cr4 4) (cr5 5) (cr6 6) (cr7 7)
-+ (cr8 8) (cr9 9) (cr10 10) (cr11 11)
-+ (cr12 12) (cr13 13) (cr14 14) (cr15 15))
-+)
-+
-+(define-hardware
-+ (name h-cr)
-+ (comment "coprocessor registers")
-+ (attrs)
-+ (type register WI (16))
-+ (indices extern-keyword cr-names)
-+)
-+
-+(define-keyword
-+ (name dr-names)
-+ (print-name h-dr)
-+ (prefix "")
-+ (values (tbr 0) (rp 1) (ssp 2) (usp 3) (mdh 4) (mdl 5))
-+)
-+
-+(define-hardware
-+ (name h-dr)
-+ (comment "dedicated registers")
-+ (type register WI (6))
-+ (indices extern-keyword dr-names)
-+ (get (index) (c-call WI "@cpu@_h_dr_get_handler" index))
-+ (set (index newval) (c-call VOID "@cpu@_h_dr_set_handler" index newval))
-+)
-+
-+(define-hardware
-+ (name h-ps)
-+ (comment "processor status")
-+ (type register UWI)
-+ (indices keyword "" ((ps 0)))
-+ (get () (c-call UWI "@cpu@_h_ps_get_handler"))
-+ (set (newval) (c-call VOID "@cpu@_h_ps_set_handler" newval))
-+)
-+
-+(dnh h-r13 "General Register 13 explicitly required"
-+ ()
-+ (register WI)
-+ (keyword "" ((r13 0)))
-+ () ()
-+)
-+
-+(dnh h-r14 "General Register 14 explicitly required"
-+ ()
-+ (register WI)
-+ (keyword "" ((r14 0)))
-+ () ()
-+)
-+
-+(dnh h-r15 "General Register 15 explicitly required"
-+ ()
-+ (register WI)
-+ (keyword "" ((r15 0)))
-+ () ()
-+)
-+
-+; These bits are actually part of the PS register but are accessed more
-+; often than the entire register, so define them directly. We can assemble
-+; the PS register from its components when necessary.
-+
-+(dsh h-nbit "negative bit" () (register BI))
-+(dsh h-zbit "zero bit" () (register BI))
-+(dsh h-vbit "overflow bit" () (register BI))
-+(dsh h-cbit "carry bit" () (register BI))
-+(dsh h-ibit "interrupt enable bit" () (register BI))
-+(define-hardware
-+ (name h-sbit)
-+ (comment "stack bit")
-+ (type register BI)
-+ (get () (c-call BI "@cpu@_h_sbit_get_handler"))
-+ (set (newval) (c-call VOID "@cpu@_h_sbit_set_handler" newval))
-+)
-+(dsh h-tbit "trace trap bit" () (register BI))
-+(dsh h-d0bit "division 0 bit" () (register BI))
-+(dsh h-d1bit "division 1 bit" () (register BI))
-+
-+; These represent sub-registers within the program status register
-+
-+(define-hardware
-+ (name h-ccr)
-+ (comment "condition code bits")
-+ (type register UQI)
-+ (get () (c-call UQI "@cpu@_h_ccr_get_handler"))
-+ (set (newval) (c-call VOID "@cpu@_h_ccr_set_handler" newval))
-+)
-+(define-hardware
-+ (name h-scr)
-+ (comment "system condition bits")
-+ (type register UQI)
-+ (get () (c-call UQI "@cpu@_h_scr_get_handler"))
-+ (set (newval) (c-call VOID "@cpu@_h_scr_set_handler" newval))
-+)
-+(define-hardware
-+ (name h-ilm)
-+ (comment "interrupt level mask")
-+ (type register UQI)
-+ (get () (c-call UQI "@cpu@_h_ilm_get_handler"))
-+ (set (newval) (c-call VOID "@cpu@_h_ilm_set_handler" newval))
-+)
-+
-+; Instruction Operands.
-+; These entries provide a layer between the assembler and the raw hardware
-+; description, and are used to refer to hardware elements in the semantic
-+; code. Usually there's a bit of over-specification, but in more complicated
-+; instruction sets there isn't.
-+
-+; FR30 specific operand attributes:
-+
-+(define-attr
-+ (for operand)
-+ (type boolean)
-+ (name HASH-PREFIX)
-+ (comment "immediates have an optional '#' prefix")
-+)
-+
-+; ??? Convention says this should be o-sr, but then the insn definitions
-+; should refer to o-sr which is clumsy. The "o-" could be implicit, but
-+; then it should be implicit for all the symbols here, but then there would
-+; be confusion between (f-)simm8 and (h-)simm8.
-+; So for now the rule is exactly as it appears here.
-+
-+(dnop Ri "destination register" () h-gr f-Ri)
-+(dnop Rj "source register" () h-gr f-Rj)
-+(dnop Ric "target register coproc insn" () h-gr f-Ric)
-+(dnop Rjc "source register coproc insn" () h-gr f-Rjc)
-+(dnop CRi "coprocessor register" () h-cr f-CRi)
-+(dnop CRj "coprocessor register" () h-cr f-CRj)
-+(dnop Rs1 "dedicated register" () h-dr f-Rs1)
-+(dnop Rs2 "dedicated register" () h-dr f-Rs2)
-+(dnop R13 "General Register 13" () h-r13 f-nil)
-+(dnop R14 "General Register 14" () h-r14 f-nil)
-+(dnop R15 "General Register 15" () h-r15 f-nil)
-+(dnop ps "Program Status register" () h-ps f-nil)
-+(dnop u4 "4 bit unsigned immediate" (HASH-PREFIX) h-uint f-u4)
-+(dnop u4c "4 bit unsigned immediate" (HASH-PREFIX) h-uint f-u4c)
-+(dnop u8 "8 bit unsigned immediate" (HASH-PREFIX) h-uint f-u8)
-+(dnop i8 "8 bit unsigned immediate" (HASH-PREFIX) h-uint f-i8)
-+(dnop udisp6 "6 bit unsigned immediate" (HASH-PREFIX) h-uint f-udisp6)
-+(dnop disp8 "8 bit signed immediate" (HASH-PREFIX) h-sint f-disp8)
-+(dnop disp9 "9 bit signed immediate" (HASH-PREFIX) h-sint f-disp9)
-+(dnop disp10 "10 bit signed immediate" (HASH-PREFIX) h-sint f-disp10)
-+
-+(dnop s10 "10 bit signed immediate" (HASH-PREFIX) h-sint f-s10)
-+(dnop u10 "10 bit unsigned immediate" (HASH-PREFIX) h-uint f-u10)
-+(dnop i32 "32 bit immediate" (HASH-PREFIX) h-uint f-i32)
-+
-+(define-operand
-+ (name m4)
-+ (comment "4 bit negative immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-sint)
-+ (index f-m4)
-+ (handlers (print "m4"))
-+)
-+
-+(define-operand
-+ (name i20)
-+ (comment "20 bit immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-uint)
-+ (index f-i20)
-+)
-+
-+(dnop dir8 "8 bit direct address" () h-uint f-dir8)
-+(dnop dir9 "9 bit direct address" () h-uint f-dir9)
-+(dnop dir10 "10 bit direct address" () h-uint f-dir10)
-+
-+(dnop label9 "9 bit pc relative address" () h-iaddr f-rel9)
-+(dnop label12 "12 bit pc relative address" () h-iaddr f-rel12)
-+
-+(define-operand
-+ (name reglist_low_ld)
-+ (comment "8 bit low register mask for ldm")
-+ (attrs)
-+ (type h-uint)
-+ (index f-reglist_low_ld)
-+ (handlers (parse "low_register_list_ld")
-+ (print "low_register_list_ld"))
-+)
-+
-+(define-operand
-+ (name reglist_hi_ld)
-+ (comment "8 bit high register mask for ldm")
-+ (attrs)
-+ (type h-uint)
-+ (index f-reglist_hi_ld)
-+ (handlers (parse "hi_register_list_ld")
-+ (print "hi_register_list_ld"))
-+)
-+
-+(define-operand
-+ (name reglist_low_st)
-+ (comment "8 bit low register mask for stm")
-+ (attrs)
-+ (type h-uint)
-+ (index f-reglist_low_st)
-+ (handlers (parse "low_register_list_st")
-+ (print "low_register_list_st"))
-+)
-+
-+(define-operand
-+ (name reglist_hi_st)
-+ (comment "8 bit high register mask for stm")
-+ (attrs)
-+ (type h-uint)
-+ (index f-reglist_hi_st)
-+ (handlers (parse "hi_register_list_st")
-+ (print "hi_register_list_st"))
-+)
-+
-+(dnop cc "condition codes" () h-uint f-cc)
-+(dnop ccc "coprocessor calc" (HASH-PREFIX) h-uint f-ccc)
-+
-+(dnop nbit "negative bit" (SEM-ONLY) h-nbit f-nil)
-+(dnop vbit "overflow bit" (SEM-ONLY) h-vbit f-nil)
-+(dnop zbit "zero bit" (SEM-ONLY) h-zbit f-nil)
-+(dnop cbit "carry bit" (SEM-ONLY) h-cbit f-nil)
-+(dnop ibit "interrupt bit" (SEM-ONLY) h-ibit f-nil)
-+(dnop sbit "stack bit" (SEM-ONLY) h-sbit f-nil)
-+(dnop tbit "trace trap bit" (SEM-ONLY) h-tbit f-nil)
-+(dnop d0bit "division 0 bit" (SEM-ONLY) h-d0bit f-nil)
-+(dnop d1bit "division 1 bit" (SEM-ONLY) h-d1bit f-nil)
-+
-+(dnop ccr "condition code bits" (SEM-ONLY) h-ccr f-nil)
-+(dnop scr "system condition bits" (SEM-ONLY) h-scr f-nil)
-+(dnop ilm "interrupt level mask" (SEM-ONLY) h-ilm f-nil)
-+
-+; Instruction definitions.
-+;
-+; Notes:
-+; - dni is short for "define-normal-instruction"
-+
-+; FR30 specific insn attributes:
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name NOT-IN-DELAY-SLOT)
-+ (comment "insn can't go in delay slot")
-+)
-+
-+; Sets zbit and nbit based on the value of x
-+;
-+(define-pmacro (set-z-and-n x)
-+ (sequence ()
-+ (set zbit (eq x (const 0)))
-+ (set nbit (lt x (const 0))))
-+)
-+
-+; Binary integer instruction which sets status bits
-+;
-+(define-pmacro (binary-int-op name insn comment opc1 opc2 op arg1 arg2)
-+ (dni name
-+ (.str insn " " comment)
-+ ()
-+ (.str insn " $" arg1 ",$" arg2)
-+ (+ opc1 opc2 arg1 arg2)
-+ (sequence ()
-+ (set vbit ((.sym op -oflag) arg2 arg1 (const 0)))
-+ (set cbit ((.sym op -cflag) arg2 arg1 (const 0)))
-+ (set arg2 (op arg2 arg1))
-+ (set-z-and-n arg2))
-+ ()
-+ )
-+)
-+
-+; Binary integer instruction which does *not* set status bits
-+;
-+(define-pmacro (binary-int-op-n name insn comment opc1 opc2 op arg1 arg2)
-+ (dni name
-+ (.str insn " " comment)
-+ ()
-+ (.str insn " $" arg1 ",$" arg2)
-+ (+ opc1 opc2 arg1 arg2)
-+ (set arg2 (op arg2 arg1))
-+ ()
-+ )
-+)
-+
-+; Binary integer instruction with carry which sets status bits
-+;
-+(define-pmacro (binary-int-op-c name insn comment opc1 opc2 op arg1 arg2)
-+ (dni name
-+ (.str insn " " comment)
-+ ()
-+ (.str insn " $" arg1 ",$" arg2)
-+ (+ opc1 opc2 arg1 arg2)
-+ (sequence ((WI tmp))
-+ (set tmp ((.sym op c) arg2 arg1 cbit))
-+ (set vbit ((.sym op -oflag) arg2 arg1 cbit))
-+ (set cbit ((.sym op -cflag) arg2 arg1 cbit))
-+ (set arg2 tmp)
-+ (set-z-and-n arg2))
-+ ()
-+ )
-+)
-+
-+(binary-int-op add add "reg/reg" OP1_A OP2_6 add Rj Ri)
-+(binary-int-op addi add "immed/reg" OP1_A OP2_4 add u4 Ri)
-+(binary-int-op add2 add2 "immed/reg" OP1_A OP2_5 add m4 Ri)
-+(binary-int-op-c addc addc "reg/reg" OP1_A OP2_7 add Rj Ri)
-+(binary-int-op-n addn addn "reg/reg" OP1_A OP2_2 add Rj Ri)
-+(binary-int-op-n addni addn "immed/reg" OP1_A OP2_0 add u4 Ri)
-+(binary-int-op-n addn2 addn2 "immed/reg" OP1_A OP2_1 add m4 Ri)
-+
-+(binary-int-op sub sub "reg/reg" OP1_A OP2_C sub Rj Ri)
-+(binary-int-op-c subc subc "reg/reg" OP1_A OP2_D sub Rj Ri)
-+(binary-int-op-n subn subn "reg/reg" OP1_A OP2_E sub Rj Ri)
-+
-+; Integer compare instruction
-+;
-+(define-pmacro (int-cmp name insn comment opc1 opc2 arg1 arg2)
-+ (dni name
-+ (.str insn " " comment)
-+ ()
-+ (.str insn " $" arg1 ",$" arg2)
-+ (+ opc1 opc2 arg1 arg2)
-+ (sequence ((WI tmp1))
-+ (set vbit (sub-oflag arg2 arg1 (const 0)))
-+ (set cbit (sub-cflag arg2 arg1 (const 0)))
-+ (set tmp1 (sub arg2 arg1))
-+ (set-z-and-n tmp1)
-+ )
-+ ()
-+ )
-+)
-+
-+(int-cmp cmp cmp "reg/reg" OP1_A OP2_A Rj Ri)
-+(int-cmp cmpi cmp "immed/reg" OP1_A OP2_8 u4 Ri)
-+(int-cmp cmp2 cmp2 "immed/reg" OP1_A OP2_9 m4 Ri)
-+
-+; Binary logical instruction
-+;
-+(define-pmacro (binary-logical-op name insn comment opc1 opc2 op arg1 arg2)
-+ (dni name
-+ (.str insn " " comment)
-+ ()
-+ (.str insn " $" arg1 ",$" arg2)
-+ (+ opc1 opc2 arg1 arg2)
-+ (sequence ()
-+ (set arg2 (op arg2 arg1))
-+ (set-z-and-n arg2))
-+ ()
-+ )
-+)
-+
-+(binary-logical-op and and "reg/reg" OP1_8 OP2_2 and Rj Ri)
-+(binary-logical-op or or "reg/reg" OP1_9 OP2_2 or Rj Ri)
-+(binary-logical-op eor eor "reg/reg" OP1_9 OP2_A xor Rj Ri)
-+
-+(define-pmacro (les-units model) ; les: load-exec-store
-+ (model (unit u-exec) (unit u-load) (unit u-store))
-+)
-+
-+; Binary logical instruction to memory
-+;
-+(define-pmacro (binary-logical-op-m name insn comment opc1 opc2 mode op arg1 arg2)
-+ (dni name
-+ (.str insn " " comment)
-+ (NOT-IN-DELAY-SLOT)
-+ (.str insn " $" arg1 ",@$" arg2)
-+ (+ opc1 opc2 arg1 arg2)
-+ (sequence ((mode tmp))
-+ (set mode tmp (op mode (mem mode arg2) arg1))
-+ (set-z-and-n tmp)
-+ (set mode (mem mode arg2) tmp))
-+ ((les-units fr30-1))
-+ )
-+)
-+
-+(binary-logical-op-m andm and "reg/mem" OP1_8 OP2_4 WI and Rj Ri)
-+(binary-logical-op-m andh andh "reg/mem" OP1_8 OP2_5 HI and Rj Ri)
-+(binary-logical-op-m andb andb "reg/mem" OP1_8 OP2_6 QI and Rj Ri)
-+(binary-logical-op-m orm or "reg/mem" OP1_9 OP2_4 WI or Rj Ri)
-+(binary-logical-op-m orh orh "reg/mem" OP1_9 OP2_5 HI or Rj Ri)
-+(binary-logical-op-m orb orb "reg/mem" OP1_9 OP2_6 QI or Rj Ri)
-+(binary-logical-op-m eorm eor "reg/mem" OP1_9 OP2_C WI xor Rj Ri)
-+(binary-logical-op-m eorh eorh "reg/mem" OP1_9 OP2_D HI xor Rj Ri)
-+(binary-logical-op-m eorb eorb "reg/mem" OP1_9 OP2_E QI xor Rj Ri)
-+
-+; Binary logical instruction to low half of byte in memory
-+;
-+(dni bandl
-+ "bandl #u4,@Ri"
-+ (NOT-IN-DELAY-SLOT)
-+ "bandl $u4,@$Ri"
-+ (+ OP1_8 OP2_0 u4 Ri)
-+ (set QI (mem QI Ri)
-+ (and QI
-+ (or QI u4 (const #xf0))
-+ (mem QI Ri)))
-+ ((les-units fr30-1))
-+)
-+
-+(dni borl
-+ "borl #u4,@Ri"
-+ (NOT-IN-DELAY-SLOT)
-+ "borl $u4,@$Ri"
-+ (+ OP1_9 OP2_0 u4 Ri)
-+ (set QI (mem QI Ri) (or QI u4 (mem QI Ri)))
-+ ((les-units fr30-1))
-+)
-+
-+(dni beorl
-+ "beorl #u4,@Ri"
-+ (NOT-IN-DELAY-SLOT)
-+ "beorl $u4,@$Ri"
-+ (+ OP1_9 OP2_8 u4 Ri)
-+ (set QI (mem QI Ri) (xor QI u4 (mem QI Ri)))
-+ ((les-units fr30-1))
-+)
-+
-+; Binary logical instruction to high half of byte in memory
-+;
-+(dni bandh
-+ "bandh #u4,@Ri"
-+ (NOT-IN-DELAY-SLOT)
-+ "bandh $u4,@$Ri"
-+ (+ OP1_8 OP2_1 u4 Ri)
-+ (set QI (mem QI Ri)
-+ (and QI
-+ (or QI (sll QI u4 (const 4)) (const #x0f))
-+ (mem QI Ri)))
-+ ((les-units fr30-1))
-+)
-+
-+(define-pmacro (binary-or-op-mh name insn opc1 opc2 op arg1 arg2)
-+ (dni name
-+ (.str name " #" arg1 ",@" args)
-+ (NOT-IN-DELAY-SLOT)
-+ (.str name " $" arg1 ",@$" arg2)
-+ (+ opc1 opc2 arg1 arg2)
-+ (set QI (mem QI arg2)
-+ (insn QI
-+ (sll QI arg1 (const 4))
-+ (mem QI arg2)))
-+ ((les-units fr30-1))
-+ )
-+)
-+
-+(binary-or-op-mh borh or OP1_9 OP2_1 or u4 Ri)
-+(binary-or-op-mh beorh xor OP1_9 OP2_9 xor u4 Ri)
-+
-+(dni btstl
-+ "btstl #u4,@Ri"
-+ (NOT-IN-DELAY-SLOT)
-+ "btstl $u4,@$Ri"
-+ (+ OP1_8 OP2_8 u4 Ri)
-+ (sequence ((QI tmp))
-+ (set tmp (and QI u4 (mem QI Ri)))
-+ (set zbit (eq tmp (const 0)))
-+ (set nbit (const 0)))
-+ ((fr30-1 (unit u-load) (unit u-exec (cycles 2))))
-+)
-+
-+(dni btsth
-+ "btsth #u4,@Ri"
-+ (NOT-IN-DELAY-SLOT)
-+ "btsth $u4,@$Ri"
-+ (+ OP1_8 OP2_9 u4 Ri)
-+ (sequence ((QI tmp))
-+ (set tmp (and QI (sll QI u4 (const 4)) (mem QI Ri)))
-+ (set zbit (eq tmp (const 0)))
-+ (set nbit (lt tmp (const 0))))
-+ ((fr30-1 (unit u-load) (unit u-exec (cycles 2))))
-+)
-+
-+(dni mul
-+ "mul Rj,Ri"
-+ (NOT-IN-DELAY-SLOT)
-+ "mul $Rj,$Ri"
-+ (+ OP1_A OP2_F Rj Ri)
-+ (sequence ((DI tmp))
-+ (set tmp (mul DI (ext DI Rj) (ext DI Ri)))
-+ (set (reg h-dr 5) (trunc WI tmp))
-+ (set (reg h-dr 4) (trunc WI (srl tmp (const 32))))
-+ (set nbit (lt (reg h-dr 5) (const 0)))
-+ (set zbit (eq tmp (const DI 0)))
-+ (set vbit (orif
-+ (gt tmp (const DI #x7fffffff))
-+ (lt tmp (neg (const DI #x80000000))))))
-+ ((fr30-1 (unit u-exec (cycles 5))))
-+)
-+
-+(dni mulu
-+ "mulu Rj,Ri"
-+ (NOT-IN-DELAY-SLOT)
-+ "mulu $Rj,$Ri"
-+ (+ OP1_A OP2_B Rj Ri)
-+ (sequence ((DI tmp))
-+ (set tmp (mul DI (zext DI Rj) (zext DI Ri)))
-+ (set (reg h-dr 5) (trunc WI tmp))
-+ (set (reg h-dr 4) (trunc WI (srl tmp (const 32))))
-+ (set nbit (lt (reg h-dr 4) (const 0)))
-+ (set zbit (eq (reg h-dr 5) (const 0)))
-+ (set vbit (ne (reg h-dr 4) (const 0))))
-+ ((fr30-1 (unit u-exec (cycles 5))))
-+)
-+
-+(dni mulh
-+ "mulh Rj,Ri"
-+ (NOT-IN-DELAY-SLOT)
-+ "mulh $Rj,$Ri"
-+ (+ OP1_B OP2_F Rj Ri)
-+ (sequence ()
-+ (set (reg h-dr 5) (mul (trunc HI Rj) (trunc HI Ri)))
-+ (set nbit (lt (reg h-dr 5) (const 0)))
-+ (set zbit (ge (reg h-dr 5) (const 0))))
-+ ((fr30-1 (unit u-exec (cycles 3))))
-+)
-+
-+(dni muluh
-+ "muluh Rj,Ri"
-+ (NOT-IN-DELAY-SLOT)
-+ "muluh $Rj,$Ri"
-+ (+ OP1_B OP2_B Rj Ri)
-+ (sequence ()
-+ (set (reg h-dr 5) (mul (and Rj (const #xffff))
-+ (and Ri (const #xffff))))
-+ (set nbit (lt (reg h-dr 5) (const 0)))
-+ (set zbit (ge (reg h-dr 5) (const 0))))
-+ ((fr30-1 (unit u-exec (cycles 3))))
-+)
-+
-+(dni div0s
-+ "div0s Ri"
-+ ()
-+ "div0s $Ri"
-+ (+ OP1_9 OP2_7 OP3_4 Ri)
-+ (sequence ()
-+ (set d0bit (lt (reg h-dr 5) (const 0)))
-+ (set d1bit (xor d0bit (lt Ri (const 0))))
-+ (if (ne d0bit (const 0))
-+ (set (reg h-dr 4) (const #xffffffff))
-+ (set (reg h-dr 4) (const 0))))
-+ ()
-+)
-+
-+(dni div0u
-+ "div0u Ri"
-+ ()
-+ "div0u $Ri"
-+ (+ OP1_9 OP2_7 OP3_5 Ri)
-+ (sequence ()
-+ (set d0bit (const 0))
-+ (set d1bit (const 0))
-+ (set (reg h-dr 4) (const 0)))
-+ ()
-+)
-+
-+(dni div1
-+ "div1 Ri"
-+ ()
-+ "div1 $Ri"
-+ (+ OP1_9 OP2_7 OP3_6 Ri)
-+ (sequence ((WI tmp))
-+ (set (reg h-dr 4) (sll (reg h-dr 4) (const 1)))
-+ (if (lt (reg h-dr 5) (const 0))
-+ (set (reg h-dr 4) (add (reg h-dr 4) (const 1))))
-+ (set (reg h-dr 5) (sll (reg h-dr 5) (const 1)))
-+ (if (eq d1bit (const 1))
-+ (sequence ()
-+ (set tmp (add (reg h-dr 4) Ri))
-+ (set cbit (add-cflag (reg h-dr 4) Ri (const 0))))
-+ (sequence ()
-+ (set tmp (sub (reg h-dr 4) Ri))
-+ (set cbit (sub-cflag (reg h-dr 4) Ri (const 0)))))
-+ (if (not (xor (xor d0bit d1bit) cbit))
-+ (sequence ()
-+ (set (reg h-dr 4) tmp)
-+ (set (reg h-dr 5) (or (reg h-dr 5) (const 1)))))
-+ (set zbit (eq (reg h-dr 4) (const 0))))
-+ ()
-+)
-+
-+(dni div2
-+ "div2 Ri"
-+ ()
-+ "div2 $Ri"
-+ (+ OP1_9 OP2_7 OP3_7 Ri)
-+ (sequence ((WI tmp))
-+ (if (eq d1bit (const 1))
-+ (sequence ()
-+ (set tmp (add (reg h-dr 4) Ri))
-+ (set cbit (add-cflag (reg h-dr 4) Ri (const 0))))
-+ (sequence ()
-+ (set tmp (sub (reg h-dr 4) Ri))
-+ (set cbit (sub-cflag (reg h-dr 4) Ri (const 0)))))
-+ (if (eq tmp (const 0))
-+ (sequence ()
-+ (set zbit (const 1))
-+ (set (reg h-dr 4) (const 0)))
-+ (set zbit (const 0))))
-+ ()
-+)
-+
-+(dni div3
-+ "div3"
-+ ()
-+ "div3"
-+ (+ OP1_9 OP2_F OP3_6 OP4_0)
-+ (if (eq zbit (const 1))
-+ (set (reg h-dr 5) (add (reg h-dr 5) (const 1))))
-+ ()
-+)
-+
-+(dni div4s
-+ "div4s"
-+ ()
-+ "div4s"
-+ (+ OP1_9 OP2_F OP3_7 OP4_0)
-+ (if (eq d1bit (const 1))
-+ (set (reg h-dr 5) (neg (reg h-dr 5))))
-+ ()
-+)
-+
-+(define-pmacro (leftshift-op name insn opc1 opc2 arg1 arg2 shift-expr)
-+ (dni name
-+ (.str insn " " arg1 "," arg2)
-+ ()
-+ (.str insn " $" arg1 ",$" arg2)
-+ (+ opc1 opc2 arg1 arg2)
-+ (sequence ((WI shift))
-+ (set shift shift-expr)
-+ (if (ne shift (const 0))
-+ (sequence ()
-+ (set cbit (ne (and arg2
-+ (sll (const 1)
-+ (sub (const 32) shift)))
-+ (const 0)))
-+ (set arg2 (sll arg2 shift)))
-+ (set cbit (const 0)))
-+ (set nbit (lt arg2 (const 0)))
-+ (set zbit (eq arg2 (const 0))))
-+ ()
-+ )
-+)
-+(leftshift-op lsl lsl OP1_B OP2_6 Rj Ri (and Rj (const #x1f)))
-+(leftshift-op lsli lsl OP1_B OP2_4 u4 Ri u4)
-+(leftshift-op lsl2 lsl2 OP1_B OP2_5 u4 Ri (add u4 (const #x10)))
-+
-+(define-pmacro (rightshift-op name insn opc1 opc2 op arg1 arg2 shift-expr)
-+ (dni name
-+ (.str insn " " arg1 "," arg2)
-+ ()
-+ (.str insn " $" arg1 ",$" arg2)
-+ (+ opc1 opc2 arg1 arg2)
-+ (sequence ((WI shift))
-+ (set shift shift-expr)
-+ (if (ne shift (const 0))
-+ (sequence ()
-+ (set cbit (ne (and arg2
-+ (sll (const 1)
-+ (sub shift (const 1))))
-+ (const 0)))
-+ (set arg2 (op arg2 shift)))
-+ (set cbit (const 0)))
-+ (set nbit (lt arg2 (const 0)))
-+ (set zbit (eq arg2 (const 0))))
-+ ()
-+ )
-+)
-+(rightshift-op lsr lsr OP1_B OP2_2 srl Rj Ri (and Rj (const #x1f)))
-+(rightshift-op lsri lsr OP1_B OP2_0 srl u4 Ri u4)
-+(rightshift-op lsr2 lsr2 OP1_B OP2_1 srl u4 Ri (add u4 (const #x10)))
-+(rightshift-op asr asr OP1_B OP2_A sra Rj Ri (and Rj (const #x1f)))
-+(rightshift-op asri asr OP1_B OP2_8 sra u4 Ri u4)
-+(rightshift-op asr2 asr2 OP1_B OP2_9 sra u4 Ri (add u4 (const #x10)))
-+
-+(dni ldi8
-+ "load 8 bit unsigned immediate"
-+ ()
-+ "ldi:8 $i8,$Ri"
-+ (+ OP1_C i8 Ri)
-+ (set Ri i8)
-+ ()
-+)
-+
-+; Typing ldi:8 in in emacs is a pain.
-+(dnmi ldi8m "ldi:8 without the colon"
-+ (NO-DIS)
-+ "ldi8 $i8,$Ri"
-+ (emit ldi8 i8 Ri)
-+)
-+
-+(dni ldi20
-+ "load 20 bit unsigned immediate"
-+ (NOT-IN-DELAY-SLOT)
-+ "ldi:20 $i20,$Ri"
-+ (+ OP1_9 OP2_B Ri i20)
-+ (set Ri i20)
-+ ((fr30-1 (unit u-exec (cycles 2))))
-+)
-+
-+; Typing ldi:20 in in emacs is a pain.
-+(dnmi ldi20m "ldi:20 without the colon"
-+ (NO-DIS)
-+ "ldi20 $i20,$Ri"
-+ (emit ldi20 i20 Ri)
-+)
-+
-+(dni ldi32
-+ "load 32 bit immediate"
-+ (NOT-IN-DELAY-SLOT)
-+ "ldi:32 $i32,$Ri"
-+ (+ OP1_9 OP2_F OP3_8 Ri i32)
-+ (set Ri i32)
-+ ((fr30-1 (unit u-exec (cycles 3))))
-+)
-+
-+; Typing ldi:32 in in emacs is a pain.
-+(dnmi ldi32m "ldi:32 without the colon"
-+ (NO-DIS)
-+ "ldi32 $i32,$Ri"
-+ (emit ldi32 i32 Ri)
-+)
-+
-+(define-pmacro (basic-ld name insn opc1 opc2 mode arg1 arg2)
-+ (dni name
-+ (.str name " @" arg1 "," arg2)
-+ ()
-+ (.str name " @$" arg1 ",$" arg2)
-+ (+ opc1 opc2 arg1 arg2)
-+ (set arg2 (mem mode arg1))
-+ ((fr30-1 (unit u-load)))
-+ )
-+)
-+
-+(basic-ld ld ld OP1_0 OP2_4 WI Rj Ri)
-+(basic-ld lduh lduh OP1_0 OP2_5 UHI Rj Ri)
-+(basic-ld ldub ldub OP1_0 OP2_6 UQI Rj Ri)
-+
-+(define-pmacro (r13base-ld name insn opc1 opc2 mode arg1 arg2)
-+ (dni name
-+ (.str insn " @(R13," arg1 ")," arg2)
-+ ()
-+ (.str insn " @($R13,$" arg1 "),$" arg2)
-+ (+ opc1 opc2 arg1 arg2)
-+ (set arg2 (mem mode (add arg1 (reg h-gr 13))))
-+ ((fr30-1 (unit u-load)))
-+ )
-+)
-+
-+(r13base-ld ldr13 ld OP1_0 OP2_0 WI Rj Ri)
-+(r13base-ld ldr13uh lduh OP1_0 OP2_1 UHI Rj Ri)
-+(r13base-ld ldr13ub ldub OP1_0 OP2_2 UQI Rj Ri)
-+
-+(define-pmacro (r14base-ld name insn opc1 mode arg1 arg2)
-+ (dni name
-+ (.str insn " @(R14," arg1 ")," arg2)
-+ ()
-+ (.str insn " @($R14,$" arg1 "),$" arg2)
-+ (+ opc1 arg1 arg2)
-+ (set arg2 (mem mode (add arg1 (reg h-gr 14))))
-+ ((fr30-1 (unit u-load)))
-+ )
-+)
-+
-+(r14base-ld ldr14 ld OP1_2 WI disp10 Ri)
-+(r14base-ld ldr14uh lduh OP1_4 UHI disp9 Ri)
-+(r14base-ld ldr14ub ldub OP1_6 UQI disp8 Ri)
-+
-+(dni ldr15
-+ "ld @(R15,udisp6),Ri mem/reg"
-+ ()
-+ "ld @($R15,$udisp6),$Ri"
-+ (+ OP1_0 OP2_3 udisp6 Ri)
-+ (set Ri (mem WI (add udisp6 (reg h-gr 15))))
-+ ((fr30-1 (unit u-load)))
-+)
-+
-+(dni ldr15gr
-+ "ld @R15+,Ri"
-+ ()
-+ "ld @$R15+,$Ri"
-+ (+ OP1_0 OP2_7 OP3_0 Ri)
-+ (sequence ()
-+ (set Ri (mem WI (reg h-gr 15)))
-+ (if (ne (ifield f-Ri) (const 15))
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4)))))
-+ ((fr30-1 (unit u-load)))
-+)
-+
-+; This insn loads a value from where r15 points into the target register and
-+; then increments r15. If the target register is also r15, then the post
-+; increment is not performed.
-+;
-+(dni ldr15dr
-+ "ld @R15+,Rs2"
-+ ()
-+ "ld @$R15+,$Rs2"
-+ (+ OP1_0 OP2_7 OP3_8 Rs2)
-+; This seems more straight forward, but doesn't work due to a problem in
-+; cgen. We're trying to not increment r15 if it is the target register.
-+; (sequence ()
-+; (set Rs2 (mem WI (reg h-gr 15)))
-+; (if (not (or (and (eq (ifield f-Rs2) (const 2))
-+; (eq sbit (const 0)))
-+; (and (eq (ifield f-Rs2) (const 3))
-+; (eq sbit (const 1)))))
-+; (set (reg h-gr 15) (add (reg h-gr 15) (const 4)))
-+; )
-+; )
-+ (sequence ((WI tmp))
-+ (set tmp (mem WI (reg h-gr 15))) ; save in case target is r15
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4)))
-+ (set Rs2 tmp))
-+ ((fr30-1 (unit u-load)))
-+)
-+
-+(dni ldr15ps
-+ "ld @R15+,ps mem/reg"
-+ (NOT-IN-DELAY-SLOT)
-+ "ld @$R15+,$ps"
-+ (+ OP1_0 OP2_7 OP3_9 OP4_0)
-+ (sequence ()
-+ (set ps (mem WI (reg h-gr 15)))
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4))))
-+ ((fr30-1 (unit u-load)))
-+)
-+
-+(define-pmacro (basic-st name insn opc1 opc2 mode arg1 arg2)
-+ (dni name
-+ (.str name " " arg1 ",@" arg2)
-+ ()
-+ (.str name " $" arg1 ",@$" arg2)
-+ (+ opc1 opc2 arg1 arg2)
-+ (set (mem mode arg2) arg1)
-+ ((fr30-1 (unit u-store)))
-+ )
-+)
-+
-+(basic-st st st OP1_1 OP2_4 WI Ri Rj)
-+(basic-st sth sth OP1_1 OP2_5 HI Ri Rj)
-+(basic-st stb stb OP1_1 OP2_6 QI Ri Rj)
-+
-+(define-pmacro (r13base-st name insn opc1 opc2 mode arg1 arg2)
-+ (dni name
-+ (.str insn " " arg1 ",@(R13," arg2 ")")
-+ ()
-+ (.str insn " $" arg1 ",@($R13,$" arg2 ")")
-+ (+ opc1 opc2 arg1 arg2)
-+ (set (mem mode (add arg2 (reg h-gr 13))) arg1)
-+ ((fr30-1 (unit u-store)))
-+ )
-+)
-+
-+(r13base-st str13 st OP1_1 OP2_0 WI Ri Rj)
-+(r13base-st str13h sth OP1_1 OP2_1 HI Ri Rj)
-+(r13base-st str13b stb OP1_1 OP2_2 QI Ri Rj)
-+
-+(define-pmacro (r14base-st name insn opc1 mode arg1 arg2)
-+ (dni name
-+ (.str insn " " arg1 ",@(R14," arg2 ")")
-+ ()
-+ (.str insn " $" arg1 ",@($R14,$" arg2 ")")
-+ (+ opc1 arg1 arg2)
-+ (set (mem mode (add arg2 (reg h-gr 14))) arg1)
-+ ((fr30-1 (unit u-store)))
-+ )
-+)
-+
-+(r14base-st str14 st OP1_3 WI Ri disp10)
-+(r14base-st str14h sth OP1_5 HI Ri disp9)
-+(r14base-st str14b stb OP1_7 QI Ri disp8)
-+
-+(dni str15
-+ "st Ri,@(R15,udisp6) reg/mem"
-+ ()
-+ "st $Ri,@($R15,$udisp6)"
-+ (+ OP1_1 OP2_3 udisp6 Ri)
-+ (set (mem WI (add (reg h-gr 15) udisp6)) Ri)
-+ ((fr30-1 (unit u-store)))
-+)
-+
-+; These store insns predecrement r15 and then store the contents of the source
-+; register where r15 then points. If the source register is also r15, then the
-+; original value of r15 is stored.
-+;
-+(dni str15gr
-+ "st Ri,@-R15 reg/mem"
-+ ()
-+ "st $Ri,@-$R15"
-+ (+ OP1_1 OP2_7 OP3_0 Ri)
-+ (sequence ((WI tmp))
-+ (set tmp Ri) ; save in case it's r15
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) tmp))
-+ ((fr30-1 (unit u-store)))
-+)
-+
-+(dni str15dr
-+ "st Rs,@-R15 reg/mem"
-+ ()
-+ "st $Rs2,@-$R15"
-+ (+ OP1_1 OP2_7 OP3_8 Rs2)
-+ (sequence ((WI tmp))
-+ (set tmp Rs2) ; save in case it's r15
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) tmp))
-+ ((fr30-1 (unit u-store)))
-+)
-+
-+(dni str15ps
-+ "st ps,@-R15 reg/mem"
-+ ()
-+ "st $ps,@-$R15"
-+ (+ OP1_1 OP2_7 OP3_9 OP4_0)
-+ (sequence ()
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) ps))
-+ ((fr30-1 (unit u-store)))
-+)
-+
-+(define-pmacro (mov2gr name opc1 opc2 arg1 arg2)
-+ (dni name
-+ (.str "mov " arg1 "," arg2)
-+ ()
-+ (.str "mov $" arg1 ",$" arg2)
-+ (+ opc1 opc2 arg1 arg2)
-+ (set arg2 arg1)
-+ ()
-+ )
-+)
-+
-+(mov2gr mov OP1_8 OP2_B Rj Ri)
-+(mov2gr movdr OP1_B OP2_7 Rs1 Ri)
-+
-+(dni movps
-+ "mov ps,Ri reg/reg"
-+ ()
-+ "mov $ps,$Ri"
-+ (+ OP1_1 OP2_7 OP3_1 Ri)
-+ (set Ri ps)
-+ ()
-+)
-+
-+(dni mov2dr
-+ "mov Ri,Rs reg/reg"
-+ ()
-+ "mov $Ri,$Rs1"
-+ (+ OP1_B OP2_3 Rs1 Ri)
-+ (set Rs1 Ri)
-+ ()
-+)
-+
-+(dni mov2ps
-+ "mov Ri,ps reg/reg"
-+ ()
-+ "mov $Ri,$ps"
-+ (+ OP1_0 OP2_7 OP3_1 Ri)
-+ (set ps Ri)
-+ ()
-+)
-+
-+(dni jmp
-+ "jmp with no delay slot"
-+ (NOT-IN-DELAY-SLOT)
-+ "jmp @$Ri"
-+ (+ OP1_9 OP2_7 OP3_0 Ri)
-+ (set pc Ri)
-+ ((fr30-1 (unit u-cti)))
-+)
-+
-+(dni jmpd "jmp with delay slot"
-+ (NOT-IN-DELAY-SLOT)
-+ "jmp:d @$Ri"
-+ (+ OP1_9 OP2_F OP3_0 Ri)
-+ (delay (const 1)
-+ (set pc Ri))
-+ ((fr30-1 (unit u-cti)))
-+)
-+
-+; These versions which use registers must appear before the other
-+; versions which use relative addresses due to a problem in cgen
-+; - DB.
-+(dni callr
-+ "call @Ri"
-+ (NOT-IN-DELAY-SLOT)
-+ "call @$Ri"
-+ (+ OP1_9 OP2_7 OP3_1 Ri)
-+ (sequence ()
-+ (set (reg h-dr 1) (add pc (const 2)))
-+ (set pc Ri))
-+ ((fr30-1 (unit u-cti)))
-+)
-+(dni callrd
-+ "call:d @Ri"
-+ (NOT-IN-DELAY-SLOT)
-+ "call:d @$Ri"
-+ (+ OP1_9 OP2_F OP3_1 Ri)
-+ (delay (const 1)
-+ (sequence ()
-+ (set (reg h-dr 1) (add pc (const 4)))
-+ (set pc Ri)))
-+ ((fr30-1 (unit u-cti)))
-+)
-+; end of reordered insns
-+
-+(dni call
-+ "call relative to pc"
-+ (NOT-IN-DELAY-SLOT)
-+ "call $label12"
-+ (+ OP1_D OP5_0 label12)
-+ (sequence ()
-+ (set (reg h-dr 1) (add pc (const 2)))
-+ (set pc label12))
-+ ((fr30-1 (unit u-cti)))
-+)
-+(dni calld
-+ "call relative to pc"
-+ (NOT-IN-DELAY-SLOT)
-+ "call:d $label12"
-+ (+ OP1_D OP5_1 label12)
-+ (delay (const 1)
-+ (sequence ()
-+ (set (reg h-dr 1) (add pc (const 4)))
-+ (set pc label12)))
-+ ((fr30-1 (unit u-cti)))
-+)
-+
-+(dni ret
-+ "return from subroutine"
-+ (NOT-IN-DELAY-SLOT)
-+ "ret"
-+ (+ OP1_9 OP2_7 OP3_2 OP4_0)
-+ (set pc (reg h-dr 1))
-+ ((fr30-1 (unit u-cti)))
-+)
-+
-+(dni ret:d
-+ "return from subroutine with delay slot"
-+ (NOT-IN-DELAY-SLOT)
-+ "ret:d"
-+ (+ OP1_9 OP2_F OP3_2 OP4_0)
-+ (delay (const 1)
-+ (set pc (reg h-dr 1)))
-+ ((fr30-1 (unit u-cti)))
-+)
-+
-+(dni int
-+ "interrupt"
-+ (NOT-IN-DELAY-SLOT)
-+ "int $u8"
-+ (+ OP1_1 OP2_F u8)
-+ (sequence ()
-+ ; This is defered to fr30_int because for the breakpoint case
-+ ; we want to change as little of the machine state as possible.
-+ ; Push PS onto the system stack
-+ ;(set (reg h-dr 2) (sub (reg h-dr 2) (const 4)))
-+ ;(set UWI (mem UWI (reg h-dr 2)) ps)
-+ ; Push the return address onto the system stack
-+ ;(set (reg h-dr 2) (sub (reg h-dr 2) (const 4)))
-+ ;(set UWI (mem UWI (reg h-dr 2)) (add pc (const 2)))
-+ ; Set status bits
-+ ;(set ibit (const 0))
-+ ;(set sbit (const 0))
-+
-+ ; We still should indicate what is modified by this insn.
-+ (clobber (reg h-dr 2))
-+ (clobber ibit)
-+ (clobber sbit)
-+ ; ??? (clobber memory)?
-+
-+ ; fr30_int handles operating vs user mode
-+ (set WI pc (c-call WI "fr30_int" pc u8))
-+ )
-+ ; This is more properly a cti, but branch stall calculation is different.
-+ ((fr30-1 (unit u-exec (cycles 6))))
-+)
-+
-+(dni inte
-+ "interrupt for emulator"
-+ (NOT-IN-DELAY-SLOT)
-+ "inte"
-+ (+ OP1_9 OP2_F OP3_3 OP4_0)
-+ (sequence ()
-+ ; This is defered to fr30_inte because for the breakpoint case
-+ ; we want to change as little of the machine state as possible.
-+ ; Push PS onto the system stack
-+ ;(set (reg h-dr 2) (sub (reg h-dr 2) (const 4)))
-+ ;(set UWI (mem UWI (reg h-dr 2)) ps)
-+ ; Push the return address onto the system stack
-+ ;(set (reg h-dr 2) (sub (reg h-dr 2) (const 4)))
-+ ;(set UWI (mem UWI (reg h-dr 2)) (add pc (const 2)))
-+ ; Set status bits
-+ ;(set ibit (const 0))
-+ ;(set ilm (const 4))
-+
-+ ; We still should indicate what is modified by this insn.
-+ (clobber (reg h-dr 2))
-+ (clobber ibit)
-+ (clobber ilm)
-+ ; ??? (clobber memory)?
-+
-+ ; fr30_int handles operating vs user mode
-+ (set WI pc (c-call WI "fr30_inte" pc))
-+ )
-+ ; This is more properly a cti, but branch stall calculation is different.
-+ ((fr30-1 (unit u-exec (cycles 6))))
-+)
-+
-+(dni reti
-+ "return from interrupt"
-+ (NOT-IN-DELAY-SLOT)
-+ "reti"
-+ (+ OP1_9 OP2_7 OP3_3 OP4_0)
-+ (if (eq sbit (const 0))
-+ (sequence ()
-+ ; Pop the return address from the system stack
-+ (set UWI pc (mem UWI (reg h-dr 2)))
-+ (set (reg h-dr 2) (add (reg h-dr 2) (const 4)))
-+ ; Pop PS from the system stack
-+ (set UWI ps (mem UWI (reg h-dr 2)))
-+ (set (reg h-dr 2) (add (reg h-dr 2) (const 4)))
-+ )
-+ (sequence ()
-+ ; Pop the return address from the user stack
-+ (set UWI pc (mem UWI (reg h-dr 3)))
-+ (set (reg h-dr 3) (add (reg h-dr 3) (const 4)))
-+ ; Pop PS from the user stack
-+ (set UWI ps (mem UWI (reg h-dr 3)))
-+ (set (reg h-dr 3) (add (reg h-dr 3) (const 4)))
-+ )
-+ )
-+ ; This is more properly a cti, but branch stall calculation is different.
-+ ((fr30-1 (unit u-exec (cycles 4))))
-+)
-+
-+; Conditional branches with and without delay slots
-+;
-+(define-pmacro (cond-branch cc condition)
-+ (begin
-+ (dni (.sym b cc d)
-+ (.str (.sym b cc :d) " label9")
-+ (NOT-IN-DELAY-SLOT)
-+ (.str (.sym b cc :d) " $label9")
-+ (+ OP1_F (.sym CC_ cc) label9)
-+ (delay (const 1)
-+ (if condition (set pc label9)))
-+ ((fr30-1 (unit u-cti)))
-+ )
-+ (dni (.sym b cc)
-+ (.str (.sym b cc) " label9")
-+ (NOT-IN-DELAY-SLOT)
-+ (.str (.sym b cc) " $label9")
-+ (+ OP1_E (.sym CC_ cc) label9)
-+ (if condition (set pc label9))
-+ ((fr30-1 (unit u-cti)))
-+ )
-+ )
-+)
-+
-+(cond-branch ra (const BI 1))
-+(cond-branch no (const BI 0))
-+(cond-branch eq zbit)
-+(cond-branch ne (not zbit))
-+(cond-branch c cbit)
-+(cond-branch nc (not cbit))
-+(cond-branch n nbit)
-+(cond-branch p (not nbit))
-+(cond-branch v vbit)
-+(cond-branch nv (not vbit))
-+(cond-branch lt (xor vbit nbit))
-+(cond-branch ge (not (xor vbit nbit)))
-+(cond-branch le (or (xor vbit nbit) zbit))
-+(cond-branch gt (not (or (xor vbit nbit) zbit)))
-+(cond-branch ls (or cbit zbit))
-+(cond-branch hi (not (or cbit zbit)))
-+
-+(define-pmacro (dir2r13 name insn opc1 opc2 mode arg1)
-+ (dni name
-+ (.str insn " @" arg1 ",R13")
-+ ()
-+ (.str insn " @$" arg1 ",$R13")
-+ (+ opc1 opc2 arg1)
-+ (set (reg h-gr 13) (mem mode arg1))
-+ ((fr30-1 (unit u-load)))
-+ )
-+)
-+
-+(define-pmacro (dir2r13-postinc name insn opc1 opc2 mode arg1 incr)
-+ (dni name
-+ (.str insn " @" arg1 ",@R13+")
-+ (NOT-IN-DELAY-SLOT)
-+ (.str insn " @$" arg1 ",@$R13+")
-+ (+ opc1 opc2 arg1)
-+ (sequence ()
-+ (set (mem mode (reg h-gr 13)) (mem mode arg1))
-+ (set (reg h-gr 13) (add (reg h-gr 13) incr)))
-+ ((fr30-1 (unit u-load) (unit u-store)))
-+ )
-+)
-+
-+(define-pmacro (r132dir name insn opc1 opc2 mode arg1)
-+ (dni name
-+ (.str insn " R13,@" arg1)
-+ ()
-+ (.str insn " $R13,@$" arg1)
-+ (+ opc1 opc2 arg1)
-+ (set (mem mode arg1) (reg h-gr 13))
-+ ((fr30-1 (unit u-store)))
-+ )
-+)
-+
-+(define-pmacro (r13-postinc2dir name insn opc1 opc2 mode arg1 incr)
-+ (dni name
-+ (.str insn " @R13+,@" arg1)
-+ (NOT-IN-DELAY-SLOT)
-+ (.str insn " @$R13+,@$" arg1)
-+ (+ opc1 opc2 arg1)
-+ (sequence ()
-+ (set (mem mode arg1) (mem mode (reg h-gr 13)))
-+ (set (reg h-gr 13) (add (reg h-gr 13) incr)))
-+ ((fr30-1 (unit u-load) (unit u-store)))
-+ )
-+)
-+
-+; These versions which move from reg to mem must appear before the other
-+; versions which use immediate addresses due to a problem in cgen
-+; - DB.
-+(r132dir dmovr13 dmov OP1_1 OP2_8 WI dir10)
-+(r132dir dmovr13h dmovh OP1_1 OP2_9 HI dir9)
-+(r132dir dmovr13b dmovb OP1_1 OP2_A QI dir8)
-+
-+(r13-postinc2dir dmovr13pi dmov OP1_1 OP2_C WI dir10 (const 4))
-+(r13-postinc2dir dmovr13pih dmovh OP1_1 OP2_D HI dir9 (const 2))
-+(r13-postinc2dir dmovr13pib dmovb OP1_1 OP2_E QI dir8 (const 1))
-+
-+(dni dmovr15pi
-+ "dmov @R15+,@dir10"
-+ (NOT-IN-DELAY-SLOT)
-+ "dmov @$R15+,@$dir10"
-+ (+ OP1_1 OP2_B dir10)
-+ (sequence ()
-+ (set (mem WI dir10) (mem WI (reg h-gr 15)))
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4))))
-+ ((fr30-1 (unit u-load) (unit u-store)))
-+)
-+; End of reordered insns.
-+
-+(dir2r13 dmov2r13 dmov OP1_0 OP2_8 WI dir10)
-+(dir2r13 dmov2r13h dmovh OP1_0 OP2_9 HI dir9)
-+(dir2r13 dmov2r13b dmovb OP1_0 OP2_A QI dir8)
-+
-+(dir2r13-postinc dmov2r13pi dmov OP1_0 OP2_C WI dir10 (const 4))
-+(dir2r13-postinc dmov2r13pih dmovh OP1_0 OP2_D HI dir9 (const 2))
-+(dir2r13-postinc dmov2r13pib dmovb OP1_0 OP2_E QI dir8 (const 1))
-+
-+(dni dmov2r15pd
-+ "dmov @dir10,@-R15"
-+ (NOT-IN-DELAY-SLOT)
-+ "dmov @$dir10,@-$R15"
-+ (+ OP1_0 OP2_B dir10)
-+ (sequence ()
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) (mem WI dir10)))
-+ ((fr30-1 (unit u-load) (unit u-store)))
-+)
-+
-+; Leave these insns as stubs for now, except for the increment of $Ri
-+;
-+(dni ldres
-+ "ldres @Ri+,#u4"
-+ ()
-+ "ldres @$Ri+,$u4"
-+ (+ OP1_B OP2_C u4 Ri)
-+ (set Ri (add Ri (const 4)))
-+ ()
-+)
-+
-+(dni stres
-+ "stres #u4,@Ri+"
-+ ()
-+ "stres $u4,@$Ri+"
-+ (+ OP1_B OP2_D u4 Ri)
-+ (set Ri (add Ri (const 4)))
-+ ()
-+)
-+
-+; Leave the coprocessor insns as stubs for now.
-+;
-+(define-pmacro (cop-stub name insn opc1 opc2 opc3 arg1 arg2)
-+ (dni name
-+ (.str insn " u4c,ccc,CRj," arg1 "," arg2)
-+ (NOT-IN-DELAY-SLOT)
-+ (.str insn " $u4c,$ccc,$" arg1 ",$" arg2)
-+ (+ opc1 opc2 opc3 u4c ccc arg1 arg2)
-+ (nop) ; STUB
-+ ()
-+ )
-+)
-+
-+(cop-stub copop copop OP1_9 OP2_F OP3_C CRj CRi)
-+(cop-stub copld copld OP1_9 OP2_F OP3_D Rjc CRi)
-+(cop-stub copst copst OP1_9 OP2_F OP3_E CRj Ric)
-+(cop-stub copsv copsv OP1_9 OP2_F OP3_F CRj Ric)
-+
-+(dni nop
-+ "nop"
-+ ()
-+ "nop"
-+ (+ OP1_9 OP2_F OP3_A OP4_0)
-+ (nop)
-+ ()
-+)
-+
-+(dni andccr
-+ "andccr #u8"
-+ ()
-+ "andccr $u8"
-+ (+ OP1_8 OP2_3 u8)
-+ (set ccr (and ccr u8))
-+ ()
-+)
-+
-+(dni orccr
-+ "orccr #u8"
-+ ()
-+ "orccr $u8"
-+ (+ OP1_9 OP2_3 u8)
-+ (set ccr (or ccr u8))
-+ ()
-+)
-+
-+(dni stilm
-+ "stilm #u8"
-+ ()
-+ "stilm $u8"
-+ (+ OP1_8 OP2_7 u8)
-+ (set ilm (and u8 (const #x1f)))
-+ ()
-+)
-+
-+(dni addsp
-+ "addsp #s10"
-+ ()
-+ "addsp $s10"
-+ (+ OP1_A OP2_3 s10)
-+ (set (reg h-gr 15) (add (reg h-gr 15) s10))
-+ ()
-+)
-+
-+(define-pmacro (ext-op name opc1 opc2 opc3 op mode mask)
-+ (dni name
-+ (.str name " Ri")
-+ ()
-+ (.str name " $Ri")
-+ (+ opc1 opc2 opc3 Ri)
-+ (set Ri (op WI (and mode Ri mask)))
-+ ()
-+ )
-+)
-+
-+(ext-op extsb OP1_9 OP2_7 OP3_8 ext QI (const #xff))
-+(ext-op extub OP1_9 OP2_7 OP3_9 zext UQI (const #xff))
-+(ext-op extsh OP1_9 OP2_7 OP3_A ext HI (const #xffff))
-+(ext-op extuh OP1_9 OP2_7 OP3_B zext UHI (const #xffff))
-+
-+(dni ldm0
-+ "ldm0 (reglist_low_ld)"
-+ (NOT-IN-DELAY-SLOT)
-+ "ldm0 ($reglist_low_ld)"
-+ (+ OP1_8 OP2_C reglist_low_ld)
-+ (sequence ()
-+ (if (and reglist_low_ld (const #x1))
-+ (sequence ()
-+ (set (reg h-gr 0) (mem WI (reg h-gr 15)))
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4)))))
-+ (if (and reglist_low_ld (const #x2))
-+ (sequence ()
-+ (set (reg h-gr 1) (mem WI (reg h-gr 15)))
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4)))))
-+ (if (and reglist_low_ld (const #x4))
-+ (sequence ()
-+ (set (reg h-gr 2) (mem WI (reg h-gr 15)))
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4)))))
-+ (if (and reglist_low_ld (const #x8))
-+ (sequence ()
-+ (set (reg h-gr 3) (mem WI (reg h-gr 15)))
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4)))))
-+ (if (and reglist_low_ld (const #x10))
-+ (sequence ()
-+ (set (reg h-gr 4) (mem WI (reg h-gr 15)))
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4)))))
-+ (if (and reglist_low_ld (const #x20))
-+ (sequence ()
-+ (set (reg h-gr 5) (mem WI (reg h-gr 15)))
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4)))))
-+ (if (and reglist_low_ld (const #x40))
-+ (sequence ()
-+ (set (reg h-gr 6) (mem WI (reg h-gr 15)))
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4)))))
-+ (if (and reglist_low_ld (const #x80))
-+ (sequence ()
-+ (set (reg h-gr 7) (mem WI (reg h-gr 15)))
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4)))))
-+ )
-+ ((fr30-1 (unit u-ldm)))
-+)
-+
-+(dni ldm1
-+ "ldm1 (reglist_hi_ld)"
-+ (NOT-IN-DELAY-SLOT)
-+ "ldm1 ($reglist_hi_ld)"
-+ (+ OP1_8 OP2_D reglist_hi_ld)
-+ (sequence ()
-+ (if (and reglist_hi_ld (const #x1))
-+ (sequence ()
-+ (set (reg h-gr 8) (mem WI (reg h-gr 15)))
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4)))))
-+ (if (and reglist_hi_ld (const #x2))
-+ (sequence ()
-+ (set (reg h-gr 9) (mem WI (reg h-gr 15)))
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4)))))
-+ (if (and reglist_hi_ld (const #x4))
-+ (sequence ()
-+ (set (reg h-gr 10) (mem WI (reg h-gr 15)))
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4)))))
-+ (if (and reglist_hi_ld (const #x8))
-+ (sequence ()
-+ (set (reg h-gr 11) (mem WI (reg h-gr 15)))
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4)))))
-+ (if (and reglist_hi_ld (const #x10))
-+ (sequence ()
-+ (set (reg h-gr 12) (mem WI (reg h-gr 15)))
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4)))))
-+ (if (and reglist_hi_ld (const #x20))
-+ (sequence ()
-+ (set (reg h-gr 13) (mem WI (reg h-gr 15)))
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4)))))
-+ (if (and reglist_hi_ld (const #x40))
-+ (sequence ()
-+ (set (reg h-gr 14) (mem WI (reg h-gr 15)))
-+ (set (reg h-gr 15) (add (reg h-gr 15) (const 4)))))
-+ (if (and reglist_hi_ld (const #x80))
-+ (set (reg h-gr 15) (mem WI (reg h-gr 15))))
-+ )
-+ ((fr30-1 (unit u-ldm)))
-+)
-+
-+(dni stm0
-+ "stm0 (reglist_low_st)"
-+ (NOT-IN-DELAY-SLOT)
-+ "stm0 ($reglist_low_st)"
-+ (+ OP1_8 OP2_E reglist_low_st)
-+ (sequence ()
-+ (if (and reglist_low_st (const #x1))
-+ (sequence ()
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) (reg h-gr 7))))
-+ (if (and reglist_low_st (const #x2))
-+ (sequence ()
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) (reg h-gr 6))))
-+ (if (and reglist_low_st (const #x4))
-+ (sequence ()
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) (reg h-gr 5))))
-+ (if (and reglist_low_st (const #x8))
-+ (sequence ()
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) (reg h-gr 4))))
-+ (if (and reglist_low_st (const #x10))
-+ (sequence ()
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) (reg h-gr 3))))
-+ (if (and reglist_low_st (const #x20))
-+ (sequence ()
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) (reg h-gr 2))))
-+ (if (and reglist_low_st (const #x40))
-+ (sequence ()
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) (reg h-gr 1))))
-+ (if (and reglist_low_st (const #x80))
-+ (sequence ()
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) (reg h-gr 0))))
-+ )
-+ ((fr30-1 (unit u-stm)))
-+)
-+
-+(dni stm1
-+ "stm1 (reglist_hi_st)"
-+ (NOT-IN-DELAY-SLOT)
-+ "stm1 ($reglist_hi_st)"
-+ (+ OP1_8 OP2_F reglist_hi_st)
-+ (sequence ()
-+ (if (and reglist_hi_st (const #x1))
-+ (sequence ((WI save-r15))
-+ (set save-r15 (reg h-gr 15))
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) save-r15)))
-+ (if (and reglist_hi_st (const #x2))
-+ (sequence ()
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) (reg h-gr 14))))
-+ (if (and reglist_hi_st (const #x4))
-+ (sequence ()
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) (reg h-gr 13))))
-+ (if (and reglist_hi_st (const #x8))
-+ (sequence ()
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) (reg h-gr 12))))
-+ (if (and reglist_hi_st (const #x10))
-+ (sequence ()
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) (reg h-gr 11))))
-+ (if (and reglist_hi_st (const #x20))
-+ (sequence ()
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) (reg h-gr 10))))
-+ (if (and reglist_hi_st (const #x40))
-+ (sequence ()
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) (reg h-gr 9))))
-+ (if (and reglist_hi_st (const #x80))
-+ (sequence ()
-+ (set (reg h-gr 15) (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI (reg h-gr 15)) (reg h-gr 8))))
-+ )
-+ ((fr30-1 (unit u-stm)))
-+)
-+
-+(dni enter
-+ "enter #u10"
-+ (NOT-IN-DELAY-SLOT)
-+ "enter $u10"
-+ (+ OP1_0 OP2_F u10)
-+ (sequence ((WI tmp))
-+ (set tmp (sub (reg h-gr 15) (const 4)))
-+ (set (mem WI tmp) (reg h-gr 14))
-+ (set (reg h-gr 14) tmp)
-+ (set (reg h-gr 15) (sub (reg h-gr 15) u10)))
-+ ((fr30-1 (unit u-exec (cycles 2))))
-+)
-+
-+(dni leave
-+ "leave"
-+ ()
-+ "leave"
-+ (+ OP1_9 OP2_F OP3_9 OP4_0)
-+ (sequence ()
-+ (set (reg h-gr 15) (add (reg h-gr 14) (const 4)))
-+ (set (reg h-gr 14) (mem WI (sub (reg h-gr 15) (const 4)))))
-+ ()
-+)
-+
-+(dni xchb
-+ "xchb @Rj,Ri"
-+ (NOT-IN-DELAY-SLOT)
-+ "xchb @$Rj,$Ri"
-+ (+ OP1_8 OP2_A Rj Ri)
-+ (sequence ((WI tmp))
-+ (set tmp Ri)
-+ (set Ri (mem UQI Rj))
-+ (set (mem UQI Rj) tmp))
-+ ((fr30-1 (unit u-load) (unit u-store)))
-+)
-diff -Nur binutils-2.24.orig/cgen/cpu/fr30.opc binutils-2.24/cgen/cpu/fr30.opc
---- binutils-2.24.orig/cgen/cpu/fr30.opc 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/fr30.opc 2016-06-30 21:26:12.609891400 +0200
-@@ -0,0 +1,235 @@
-+/* FR30 opcode support. -*- C -*-
-+ Copyright (C) 2000, 2001, 2005 Red Hat, Inc.
-+ This file is part of CGEN. */
-+
-+/* This file is an addendum to fr30.cpu. Heavy use of C code isn't
-+ appropriate in .cpu files, so it resides here. This especially applies
-+ to assembly/disassembly where parsing/printing can be quite involved.
-+ Such things aren't really part of the specification of the cpu, per se,
-+ so .cpu files provide the general framework and .opc files handle the
-+ nitty-gritty details as necessary.
-+
-+ Each section is delimited with start and end markers.
-+
-+ <arch>-opc.h additions use: "-- opc.h"
-+ <arch>-opc.c additions use: "-- opc.c"
-+ <arch>-asm.c additions use: "-- asm.c"
-+ <arch>-dis.c additions use: "-- dis.c"
-+ <arch>-ibd.h additions use: "-- ibd.h". */
-+
-+/* -- opc.h */
-+
-+/* ??? This can be improved upon. */
-+#undef CGEN_DIS_HASH_SIZE
-+#define CGEN_DIS_HASH_SIZE 16
-+#undef CGEN_DIS_HASH
-+#define CGEN_DIS_HASH(buffer, value) (((unsigned char *) (buffer))[0] >> 4)
-+
-+/* -- */
-+
-+/* -- asm.c */
-+/* Handle register lists for LDMx and STMx. */
-+
-+static int
-+parse_register_number (const char **strp)
-+{
-+ int regno;
-+
-+ if (**strp < '0' || **strp > '9')
-+ return -1; /* Error. */
-+ regno = **strp - '0';
-+ ++*strp;
-+
-+ if (**strp >= '0' && **strp <= '9')
-+ {
-+ regno = regno * 10 + (**strp - '0');
-+ ++*strp;
-+ }
-+
-+ return regno;
-+}
-+
-+static const char *
-+parse_register_list (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ const char **strp,
-+ int opindex ATTRIBUTE_UNUSED,
-+ unsigned long *valuep,
-+ int high_low, /* 0 == high, 1 == low. */
-+ int load_store) /* 0 == load, 1 == store. */
-+{
-+ *valuep = 0;
-+ while (**strp && **strp != ')')
-+ {
-+ int regno;
-+
-+ if (**strp != 'R' && **strp != 'r')
-+ break;
-+ ++*strp;
-+
-+ regno = parse_register_number (strp);
-+ if (regno == -1)
-+ return _("Register number is not valid");
-+ if (regno > 7 && !high_low)
-+ return _("Register must be between r0 and r7");
-+ if (regno < 8 && high_low)
-+ return _("Register must be between r8 and r15");
-+
-+ if (high_low)
-+ regno -= 8;
-+
-+ if (load_store) /* Mask is reversed for store. */
-+ *valuep |= 0x80 >> regno;
-+ else
-+ *valuep |= 1 << regno;
-+
-+ if (**strp == ',')
-+ {
-+ if (*(*strp + 1) == ')')
-+ break;
-+ ++*strp;
-+ }
-+ }
-+
-+ if (!*strp || **strp != ')')
-+ return _("Register list is not valid");
-+
-+ return NULL;
-+}
-+
-+static const char *
-+parse_low_register_list_ld (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ return parse_register_list (cd, strp, opindex, valuep,
-+ 0 /* Low. */, 0 /* Load. */);
-+}
-+
-+static const char *
-+parse_hi_register_list_ld (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ return parse_register_list (cd, strp, opindex, valuep,
-+ 1 /* High. */, 0 /* Load. */);
-+}
-+
-+static const char *
-+parse_low_register_list_st (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ return parse_register_list (cd, strp, opindex, valuep,
-+ 0 /* Low. */, 1 /* Store. */);
-+}
-+
-+static const char *
-+parse_hi_register_list_st (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ return parse_register_list (cd, strp, opindex, valuep,
-+ 1 /* High. */, 1 /* Store. */);
-+}
-+
-+/* -- */
-+
-+/* -- dis.c */
-+static void
-+print_register_list (void * dis_info,
-+ long value,
-+ long offset,
-+ int load_store) /* 0 == load, 1 == store. */
-+{
-+ disassemble_info *info = dis_info;
-+ int mask;
-+ int index = 0;
-+ char * comma = "";
-+
-+ if (load_store)
-+ mask = 0x80;
-+ else
-+ mask = 1;
-+
-+ if (value & mask)
-+ {
-+ (*info->fprintf_func) (info->stream, "r%li", index + offset);
-+ comma = ",";
-+ }
-+
-+ for (index = 1; index <= 7; ++index)
-+ {
-+ if (load_store)
-+ mask >>= 1;
-+ else
-+ mask <<= 1;
-+
-+ if (value & mask)
-+ {
-+ (*info->fprintf_func) (info->stream, "%sr%li", comma, index + offset);
-+ comma = ",";
-+ }
-+ }
-+}
-+
-+static void
-+print_hi_register_list_ld (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ print_register_list (dis_info, value, 8, 0 /* Load. */);
-+}
-+
-+static void
-+print_low_register_list_ld (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ print_register_list (dis_info, value, 0, 0 /* Load. */);
-+}
-+
-+static void
-+print_hi_register_list_st (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ print_register_list (dis_info, value, 8, 1 /* Store. */);
-+}
-+
-+static void
-+print_low_register_list_st (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ print_register_list (dis_info, value, 0, 1 /* Store. */);
-+}
-+
-+static void
-+print_m4 (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ (*info->fprintf_func) (info->stream, "%ld", value);
-+}
-+/* -- */
-diff -Nur binutils-2.24.orig/cgen/cpu/frv.cpu binutils-2.24/cgen/cpu/frv.cpu
---- binutils-2.24.orig/cgen/cpu/frv.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/frv.cpu 2016-06-30 21:26:12.613891556 +0200
-@@ -0,0 +1,9779 @@
-+; Fujitsu FRV opcode support, for GNU Binutils. -*- Scheme -*-
-+;
-+; Copyright 2000, 2001, 2003, 2004 Free Software Foundation, Inc.
-+;
-+; Contributed by Red Hat Inc; developed under contract from Fujitsu.
-+;
-+; This file is part of the GNU Binutils.
-+;
-+; This program is free software; you can redistribute it and/or modify
-+; it under the terms of the GNU General Public License as published by
-+; the Free Software Foundation; either version 2 of the License, or
-+; (at your option) any later version.
-+;
-+; This program is distributed in the hope that it will be useful,
-+; but WITHOUT ANY WARRANTY; without even the implied warranty of
-+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+; GNU General Public License for more details.
-+;
-+; You should have received a copy of the GNU General Public License
-+; along with this program; if not, write to the Free Software
-+; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
-+
-+(include "simplify.inc")
-+
-+; define-arch must appear first
-+
-+(define-arch
-+ (name frv) ; name of cpu architecture
-+ (comment "Fujitsu FRV")
-+ (insn-lsb0? #t)
-+ (machs frv fr550 fr500 fr450 fr400 tomcat simple)
-+ (isas frv)
-+)
-+
-+(define-isa
-+ (name frv)
-+ (base-insn-bitsize 32)
-+ ; Initial bitnumbers to decode insns by.
-+ (decode-assist (24 23 22 21 20 19 18))
-+ (liw-insns 1) ; The frv fetches up to 1 insns at a time.
-+ (parallel-insns 8) ; The frv executes up to 8 insns at a time.
-+)
-+
-+; Cpu family definitions.
-+;
-+(define-cpu
-+ ; cpu names must be distinct from the architecture name and machine names.
-+ ; The "b" suffix stands for "base" and is the convention.
-+ ; The "f" suffix stands for "family" and is the convention.
-+ (name frvbf)
-+ (comment "Fujitsu FRV base family")
-+ (endian big)
-+ (word-bitsize 32)
-+)
-+
-+; Generic FR-V machine. Supports the entire architecture
-+(define-mach
-+ (name frv)
-+ (comment "Generic FRV cpu")
-+ (cpu frvbf)
-+)
-+(define-model
-+ (name frv) (comment "Generic FRV model") (attrs)
-+ (mach frv)
-+
-+ (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
-+
-+ ; `state' is a list of variables for recording model state
-+ ; (state)
-+
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+; FR550 machine
-+(define-mach
-+ (name fr550)
-+ (comment "FR550 cpu")
-+ (cpu frvbf)
-+)
-+(define-model
-+ (name fr550) (comment "FR550 model") (attrs)
-+ (mach fr550)
-+
-+ (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
-+
-+ ; `state' is a list of variables for recording model state
-+ (state
-+ ; State items
-+ ; These are all masks with each bit representing one register.
-+ (prev-fr-load DI) ; Previous use of FR register was target of a load
-+ (prev-fr-complex-1 DI) ; Previous use of FR register has variable latency
-+ (prev-fr-complex-2 DI) ; Previous use of FR register has variable latency
-+ (prev-ccr-complex DI) ; Previous use of CCR register has variable latency
-+ (prev-acc-mmac DI) ; Previous use of ACC register was a MMAC category
-+ (cur-fr-load DI) ; Current use of FR register was target of a load
-+ (cur-fr-complex-1 DI) ; Current use of FR register has variable latency
-+ (cur-fr-complex-2 DI) ; Current use of FR register has variable latency
-+ (cur-ccr-complex SI) ; Current use of CCR register has variable latency
-+ (cur-acc-mmac DI) ; Current use of ACC register was a MMAC category
-+ )
-+ ; Basic unit for instructions with no latency penalties
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Basic integer insn unit
-+ (unit u-integer "Integer Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Integer multiplication unit
-+ (unit u-imul "Integer Multiplication Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Integer division unit
-+ (unit u-idiv "Integer Division Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Branch unit
-+ (unit u-branch "Branch Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)
-+ (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
-+ ((pc)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Trap unit
-+ (unit u-trap "Trap Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)
-+ (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Condition code check unit
-+ (unit u-check "Check Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Float Arithmetic unit
-+ (unit u-float-arith "Float Arithmetic unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRi INT -1) (FRj INT -1) ; inputs
-+ (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
-+ ((FRk INT -1) (FRdoublek INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Float Dual Arithmetic unit
-+ (unit u-float-dual-arith "Float Arithmetic unit" ()
-+ ; This unit has a 2 cycle penalty -- see table 14-14 in the fr550 LSI
-+ 1 3 ; issue done
-+ () ; state
-+ ((FRi INT -1) (FRj INT -1) ; inputs
-+ (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
-+ ((FRk INT -1) (FRdoublek INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Float Div unit
-+ (unit u-float-div "Float Div unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRi INT -1) (FRj INT -1)) ; inputs
-+ ((FRk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Float Square Root unit
-+ (unit u-float-sqrt "Float Square Root unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRj INT -1) (FRdoublej INT -1)) ; inputs
-+ ((FRk INT -1) (FRdoublek INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Float Compare unit
-+ (unit u-float-compare "Float Compare unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRi INT -1) (FRj INT -1)
-+ (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
-+ ((FCCi_2 INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Dual Float Compare unit
-+ (unit u-float-dual-compare "Float Dual Compare unit" ()
-+ ; This unit has a 2 cycle penalty -- see table 14-14 in the fr550 LSI
-+ 1 3 ; issue done
-+ () ; state
-+ ((FRi INT -1) (FRj INT -1)) ; inputs
-+ ((FCCi_2 INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; FR Move to GR unit
-+ (unit u-fr2gr "FR Move to GR Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRintk INT -1)) ; inputs
-+ ((GRj INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR Move to FR unit
-+ (unit u-gr2fr "GR Move to FR Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; SPR Move to GR unit
-+ (unit u-spr2gr "SPR Move to GR Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((spr INT -1)) ; inputs
-+ ((GRj INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR Move to SPR unit
-+ (unit u-gr2spr "GR Move to SPR Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRj INT -1)) ; inputs
-+ ((spr INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR set half unit
-+ (unit u-set-hilo "GR Set Half" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ ((GRkhi INT -1) (GRklo INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR load unit
-+ (unit u-gr-load "GR Load Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRk INT -1) (GRdoublek INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR store unit
-+ (unit u-gr-store "GR Store Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; FR load unit
-+ (unit u-fr-load "FR Load Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((FRintk INT -1) (FRdoublek INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; FR store unit
-+ (unit u-fr-store "FR Store Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Swap unit
-+ (unit u-swap "Swap Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; FR Move to FR unit
-+ (unit u-fr2fr "FR Move to FR Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRi INT -1)) ; inputs
-+ ((FRk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Clrgr unit
-+ (unit u-clrgr "Clrgr Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRk INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Clrfr unit
-+ (unit u-clrfr "Clrfr Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRk INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Insn cache invalidate unit
-+ (unit u-ici "Insn cache invalidate unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Data cache invalidate unit
-+ (unit u-dci "Data cache invalidate unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Data cache flush unit
-+ (unit u-dcf "Data cache flush unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Insn cache preload unit
-+ (unit u-icpl "Insn cache preload unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Data cache preload unit
-+ (unit u-dcpl "Data cache preload unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Insn cache unlock unit
-+ (unit u-icul "Insn cache unlock unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Data cache unlock unit
-+ (unit u-dcul "Data cache unlock unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; commit unit
-+ (unit u-commit "Commit Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRk INT -1) (FRk INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Float Conversion unit
-+ (unit u-float-convert "Float Conversion unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRj INT -1) (FRintj INT -1) (FRdoublej INT -1)) ; inputs
-+ ((FRk INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media units
-+ (unit u-media "Media unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-quad "Media-quad unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRintieven INT -1) (FRintjeven INT -1)) ; inputs
-+ ((FRintkeven INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-dual-expand "Media Dual Expand unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1)) ; inputs
-+ ((FRintkeven INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-3-dual "Media-3-dual unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-3-acc "Media unit for M-3 using ACC" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRintj INT -1) (ACC40Si INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-3-acc-dual "Media-3-acc-dual unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACC40Si INT -1)) ; inputs
-+ ((FRintkeven INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-3-wtacc "Media-3-wtacc unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (ACC40Sk INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-3-mclracc "Media-3-mclracc unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-set "Media set" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-4 "Media-4 unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-4-acc "Media-4-acc unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACC40Si INT -1)) ; inputs
-+ ((ACC40Sk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-4-acc-dual "Media-4-acc-dual unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACC40Si INT -1)) ; inputs
-+ ((ACC40Sk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-4-add-sub "Media-4-add-sub unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACC40Si INT -1)) ; inputs
-+ ((ACC40Sk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-4-add-sub-dual "Media-4-add-sub-dual unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACC40Si INT -1)) ; inputs
-+ ((ACC40Sk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-4-quad "Media-4-quad unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRintieven INT -1) (FRintjeven INT -1)) ; inputs
-+ ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+; FR500 machine.
-+(define-mach
-+ (name fr500)
-+ (comment "FR500 cpu")
-+ (cpu frvbf)
-+)
-+(define-model
-+ (name fr500) (comment "FR500 model") (attrs)
-+ (mach fr500)
-+
-+ (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
-+
-+ ; `state' is a list of variables for recording model state
-+ (state
-+ ; State items
-+ ; These are all masks with each bit representing one register.
-+ (prev-fpop DI) ; Previous use of FR register was floating point insn
-+ (prev-media DI) ; Previous use of FR register was a media insn
-+ (prev-cc-complex DI) ; Previous use of ICC register was not simple
-+ (cur-fpop DI) ; Current use of FR register was floating point insn
-+ (cur-media DI) ; Current use of FR register was a media insn
-+ (cur-cc-complex DI) ; Current use of ICC register was not simple
-+ )
-+ ; Basic unit for instructions with no latency penalties
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Basic integer insn unit
-+ (unit u-integer "Integer Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Integer multiplication unit
-+ (unit u-imul "Integer Multiplication Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Integer division unit
-+ (unit u-idiv "Integer Division Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Branch unit
-+ (unit u-branch "Branch Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)
-+ (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
-+ ((pc)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Trap unit
-+ (unit u-trap "Trap Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)
-+ (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Condition code check unit
-+ (unit u-check "Check Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Clrgr unit
-+ (unit u-clrgr "Clrgr Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRk INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Clrfr unit
-+ (unit u-clrfr "Clrfr Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRk INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR set half unit
-+ (unit u-set-hilo "GR Set Half" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ ((GRkhi INT -1) (GRklo INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR load unit -- TODO doesn't handle quad
-+ (unit u-gr-load "GR Load Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRk INT -1) (GRdoublek INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR store unit -- TODO doesn't handle quad
-+ (unit u-gr-store "GR Store Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR recovering store unit -- TODO doesn't handle quad
-+ (unit u-gr-r-store "GR Recovering Store Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; FR load unit -- TODO doesn't handle quad
-+ (unit u-fr-load "FR Load Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((FRintk INT -1) (FRdoublek INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; FR store unit -- TODO doesn't handle quad
-+ (unit u-fr-store "FR Store Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; FR recovering store unit -- TODO doesn't handle quad
-+ (unit u-fr-r-store "FR Recovering Store Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Swap unit
-+ (unit u-swap "Swap Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; FR Move to FR unit
-+ (unit u-fr2fr "FR Move to FR Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRi INT -1)) ; inputs
-+ ((FRk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; FR Move to GR unit
-+ (unit u-fr2gr "FR Move to GR Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRintk INT -1)) ; inputs
-+ ((GRj INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; SPR Move to GR unit
-+ (unit u-spr2gr "SPR Move to GR Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((spr INT -1)) ; inputs
-+ ((GRj INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR Move to FR unit
-+ (unit u-gr2fr "GR Move to FR Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR Move to SPR unit
-+ (unit u-gr2spr "GR Move to SPR Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRj INT -1)) ; inputs
-+ ((spr INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Float Arithmetic unit
-+ (unit u-float-arith "Float Arithmetic unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRi INT -1) (FRj INT -1) ; inputs
-+ (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
-+ ((FRk INT -1) (FRdoublek INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Float Dual Arithmetic unit
-+ (unit u-float-dual-arith "Float Arithmetic unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRi INT -1) (FRj INT -1) ; inputs
-+ (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
-+ ((FRk INT -1) (FRdoublek INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Float Div unit
-+ (unit u-float-div "Float Div unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRi INT -1) (FRj INT -1)) ; inputs
-+ ((FRk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Float Square Root unit
-+ (unit u-float-sqrt "Float Square Root unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRj INT -1) (FRdoublej INT -1)) ; inputs
-+ ((FRk INT -1) (FRdoublek INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Float Dual Square Root unit
-+ (unit u-float-dual-sqrt "Float Dual Square Root unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRj INT -1)) ; inputs
-+ ((FRk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Float Compare unit
-+ (unit u-float-compare "Float Compare unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRi INT -1) (FRj INT -1)
-+ (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
-+ ((FCCi_2 INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Dual Float Compare unit
-+ (unit u-float-dual-compare "Float Dual Compare unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRi INT -1) (FRj INT -1)) ; inputs
-+ ((FCCi_2 INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Float Conversion unit
-+ (unit u-float-convert "Float Conversion unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRj INT -1) (FRintj INT -1) (FRdoublej INT -1)) ; inputs
-+ ((FRk INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Dual Float Conversion unit
-+ (unit u-float-dual-convert "Float Dual Conversion unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRj INT -1) (FRintj INT -1)) ; inputs
-+ ((FRk INT -1) (FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media unit
-+ (unit u-media "Media unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1) (ACC40Si INT -1) (ACCGi INT -1)) ; inputs
-+ ((FRintk INT -1) (ACC40Sk INT -1) (ACC40Uk INT -1) (ACCGk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media Quad Arithmetic unit
-+ (unit u-media-quad-arith "Media Quad Arithmetic unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media Dual Multiplication unit
-+ (unit u-media-dual-mul "Media Dual Multiplication unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media Quad Multiplication unit
-+ (unit u-media-quad-mul "Media Quad Multiplication unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media Quad Complex unit
-+ (unit u-media-quad-complex "Media Quad Complex unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((ACC40Sk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media Dual Expand unit
-+ (unit u-media-dual-expand "Media Dual Expand unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media Dual Unpack unit
-+ (unit u-media-dual-unpack "Media Dual Unpack unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media Dual byte to half unit
-+ (unit u-media-dual-btoh "Media Byte to byte" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRintj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media Dual half to byte unit
-+ (unit u-media-dual-htob "Media Half to byte" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRintj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media Dual byte to half unit extended
-+ (unit u-media-dual-btohe "Media Byte to byte extended" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRintj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Barrier unit
-+ (unit u-barrier "Barrier unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Memory Barrier unit
-+ (unit u-membar "Memory Barrier unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Insn cache invalidate unit
-+ (unit u-ici "Insn cache invalidate unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Data cache invalidate unit
-+ (unit u-dci "Data cache invalidate unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Data cache flush unit
-+ (unit u-dcf "Data cache flush unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Insn cache preload unit
-+ (unit u-icpl "Insn cache preload unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Data cache preload unit
-+ (unit u-dcpl "Data cache preload unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Insn cache unlock unit
-+ (unit u-icul "Insn cache unlock unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Data cache unlock unit
-+ (unit u-dcul "Data cache unlock unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; commit unit
-+ (unit u-commit "Commit Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRk INT -1) (FRk INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+; Tomcat machine. Early version of fr500 machine
-+(define-mach
-+ (name tomcat)
-+ (comment "Tomcat -- early version of fr500")
-+ (cpu frvbf)
-+)
-+(define-model
-+ (name tomcat) (comment "Tomcat model") (attrs)
-+ (mach tomcat)
-+
-+ (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
-+
-+ ; `state' is a list of variables for recording model state
-+ ; (state)
-+
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+; FR400 machine
-+(define-mach
-+ (name fr400)
-+ (comment "FR400 cpu")
-+ (cpu frvbf)
-+)
-+(define-model
-+ (name fr400) (comment "FR400 model") (attrs)
-+ (mach fr400)
-+ (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
-+ ; `state' is a list of variables for recording model state
-+ (state
-+ ; State items
-+ ; These are all masks with each bit representing one register.
-+ (prev-fp-load DI) ; Previous use of FR register was floating point load
-+ (prev-fr-p4 DI) ; Previous use of FR register was media unit 4
-+ (prev-fr-p6 DI) ; Previous use of FR register was media unit 6
-+ (prev-acc-p2 DI) ; Previous use of ACC register was media unit 2
-+ (prev-acc-p4 DI) ; Previous use of ACC register was media unit 4
-+ (cur-fp-load DI) ; Current use of FR register is floating point load
-+ (cur-fr-p4 DI) ; Current use of FR register is media unit 4
-+ (cur-fr-p6 DI) ; Current use of FR register is media unit 6
-+ (cur-acc-p2 DI) ; Current use of ACC register is media unit 2
-+ (cur-acc-p4 DI) ; Current use of ACC register is media unit 4
-+ )
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Basic integer insn unit
-+ (unit u-integer "Integer Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Integer multiplication unit
-+ (unit u-imul "Integer Multiplication Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Integer division unit
-+ (unit u-idiv "Integer Division Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Branch unit
-+ (unit u-branch "Branch Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)
-+ (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
-+ ((pc)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Trap unit
-+ (unit u-trap "Trap Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)
-+ (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Condition code check unit
-+ (unit u-check "Check Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR set half unit
-+ (unit u-set-hilo "GR Set Half" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ ((GRkhi INT -1) (GRklo INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR load unit -- TODO doesn't handle quad
-+ (unit u-gr-load "GR Load Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRk INT -1) (GRdoublek INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR store unit -- TODO doesn't handle quad
-+ (unit u-gr-store "GR Store Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; FR load unit -- TODO doesn't handle quad
-+ (unit u-fr-load "FR Load Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((FRintk INT -1) (FRdoublek INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; FR store unit -- TODO doesn't handle quad
-+ (unit u-fr-store "FR Store Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Swap unit
-+ (unit u-swap "Swap Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; FR Move to GR unit
-+ (unit u-fr2gr "FR Move to GR Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRintk INT -1)) ; inputs
-+ ((GRj INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; SPR Move to GR unit
-+ (unit u-spr2gr "SPR Move to GR Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((spr INT -1)) ; inputs
-+ ((GRj INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR Move to FR unit
-+ (unit u-gr2fr "GR Move to FR Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR Move to SPR unit
-+ (unit u-gr2spr "GR Move to SPR Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRj INT -1)) ; inputs
-+ ((spr INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media unit M1 -- see table 13-8 in the fr400 LSI
-+ (unit u-media-1 "Media-1 unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-1-quad "Media-1-quad unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-hilo "Media-hilo unit -- a variation of the Media-1 unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ ((FRkhi INT -1) (FRklo INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media unit M2 -- see table 13-8 in the fr400 LSI
-+ (unit u-media-2 "Media-2 unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-2-quad "Media-2-quad unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-2-acc "Media-2-acc unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACC40Si INT -1)) ; inputs
-+ ((ACC40Sk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-2-acc-dual "Media-2-acc-dual unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACC40Si INT -1)) ; inputs
-+ ((ACC40Sk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-2-add-sub "Media-2-add-sub unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACC40Si INT -1)) ; inputs
-+ ((ACC40Sk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-2-add-sub-dual "Media-2-add-sub-dual unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACC40Si INT -1)) ; inputs
-+ ((ACC40Sk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media unit M3 -- see table 13-8 in the fr400 LSI
-+ (unit u-media-3 "Media-3 unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-3-dual "Media-3-dual unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-3-quad "Media-3-quad unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media unit M4 -- see table 13-8 in the fr400 LSI
-+ (unit u-media-4 "Media-4 unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACC40Si INT -1) (FRintj INT -1)) ; inputs
-+ ((ACC40Sk INT -1) (FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-4-accg "Media-4-accg unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACCGi INT -1) (FRinti INT -1)) ; inputs
-+ ((ACCGk INT -1) (FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-4-acc-dual "Media-4-acc-dual unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACC40Si INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media unit M6 -- see table 13-8 in the fr400 LSI
-+ (unit u-media-6 "Media-6 unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media unit M7 -- see table 13-8 in the fr400 LSI
-+ (unit u-media-7 "Media-1 unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((FCCk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media Dual Expand unit
-+ (unit u-media-dual-expand "Media Dual Expand unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media Dual half to byte unit
-+ (unit u-media-dual-htob "Media Half to byte" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRintj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Barrier unit
-+ (unit u-barrier "Barrier unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Memory Barrier unit
-+ (unit u-membar "Memory Barrier unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Insn cache invalidate unit
-+ (unit u-ici "Insn cache invalidate unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Data cache invalidate unit
-+ (unit u-dci "Data cache invalidate unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Data cache flush unit
-+ (unit u-dcf "Data cache flush unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Insn cache preload unit
-+ (unit u-icpl "Insn cache preload unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Data cache preload unit
-+ (unit u-dcpl "Data cache preload unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Insn cache unlock unit
-+ (unit u-icul "Insn cache unlock unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Data cache unlock unit
-+ (unit u-dcul "Data cache unlock unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+; FR450 machine
-+(define-mach
-+ (name fr450)
-+ (comment "FR450 cpu")
-+ (cpu frvbf)
-+)
-+(define-model
-+ (name fr450) (comment "FR450 model") (attrs)
-+ (mach fr450)
-+ (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
-+ ; `state' is a list of variables for recording model state
-+ (state
-+ ; State items
-+ ; These are all masks with each bit representing one register.
-+ (prev-fp-load DI) ; Previous use of FR register was floating point load
-+ (prev-fr-p4 DI) ; Previous use of FR register was media unit 4
-+ (prev-fr-p6 DI) ; Previous use of FR register was media unit 6
-+ (prev-acc-p2 DI) ; Previous use of ACC register was media unit 2
-+ (prev-acc-p4 DI) ; Previous use of ACC register was media unit 4
-+ (cur-fp-load DI) ; Current use of FR register is floating point load
-+ (cur-fr-p4 DI) ; Current use of FR register is media unit 4
-+ (cur-fr-p6 DI) ; Current use of FR register is media unit 6
-+ (cur-acc-p2 DI) ; Current use of ACC register is media unit 2
-+ (cur-acc-p4 DI) ; Current use of ACC register is media unit 4
-+ )
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Basic integer insn unit
-+ (unit u-integer "Integer Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Integer multiplication unit
-+ (unit u-imul "Integer Multiplication Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Integer division unit
-+ (unit u-idiv "Integer Division Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Branch unit
-+ (unit u-branch "Branch Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)
-+ (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
-+ ((pc)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Trap unit
-+ (unit u-trap "Trap Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)
-+ (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Condition code check unit
-+ (unit u-check "Check Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR set half unit
-+ (unit u-set-hilo "GR Set Half" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ ((GRkhi INT -1) (GRklo INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR load unit -- TODO doesn't handle quad
-+ (unit u-gr-load "GR Load Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRk INT -1) (GRdoublek INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR store unit -- TODO doesn't handle quad
-+ (unit u-gr-store "GR Store Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; FR load unit -- TODO doesn't handle quad
-+ (unit u-fr-load "FR Load Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((FRintk INT -1) (FRdoublek INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; FR store unit -- TODO doesn't handle quad
-+ (unit u-fr-store "FR Store Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Swap unit
-+ (unit u-swap "Swap Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ ((GRk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; FR Move to GR unit
-+ (unit u-fr2gr "FR Move to GR Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRintk INT -1)) ; inputs
-+ ((GRj INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; SPR Move to GR unit
-+ (unit u-spr2gr "SPR Move to GR Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((spr INT -1)) ; inputs
-+ ((GRj INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR Move to FR unit
-+ (unit u-gr2fr "GR Move to FR Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; GR Move to SPR unit
-+ (unit u-gr2spr "GR Move to SPR Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRj INT -1)) ; inputs
-+ ((spr INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media unit M1 -- see table 14-8 in the fr450 LSI
-+ (unit u-media-1 "Media-1 unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-1-quad "Media-1-quad unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-hilo "Media-hilo unit -- a variation of the Media-1 unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ ((FRkhi INT -1) (FRklo INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media unit M2 -- see table 14-8 in the fr450 LSI
-+ (unit u-media-2 "Media-2 unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-2-quad "Media-2-quad unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-2-acc "Media-2-acc unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACC40Si INT -1)) ; inputs
-+ ((ACC40Sk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-2-acc-dual "Media-2-acc-dual unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACC40Si INT -1)) ; inputs
-+ ((ACC40Sk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-2-add-sub "Media-2-add-sub unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACC40Si INT -1)) ; inputs
-+ ((ACC40Sk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-2-add-sub-dual "Media-2-add-sub-dual unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACC40Si INT -1)) ; inputs
-+ ((ACC40Sk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media unit M3 -- see table 14-8 in the fr450 LSI
-+ (unit u-media-3 "Media-3 unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-3-dual "Media-3-dual unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-3-quad "Media-3-quad unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media unit M4 -- see table 14-8 in the fr450 LSI
-+ (unit u-media-4 "Media-4 unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACC40Si INT -1) (FRintj INT -1)) ; inputs
-+ ((ACC40Sk INT -1) (FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-4-accg "Media-4-accg unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACCGi INT -1) (FRinti INT -1)) ; inputs
-+ ((ACCGk INT -1) (FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-4-acc-dual "Media-4-acc-dual unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((ACC40Si INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-media-4-mclracca "Media-4 unit for MCLRACC with #A=1" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media unit M6 -- see table 14-8 in the fr450 LSI
-+ (unit u-media-6 "Media-6 unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media unit M7 -- see table 14-8 in the fr450 LSI
-+ (unit u-media-7 "Media-1 unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1) (FRintj INT -1)) ; inputs
-+ ((FCCk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media Dual Expand unit
-+ (unit u-media-dual-expand "Media Dual Expand unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRinti INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Media Dual half to byte unit
-+ (unit u-media-dual-htob "Media Half to byte" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((FRintj INT -1)) ; inputs
-+ ((FRintk INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Barrier unit
-+ (unit u-barrier "Barrier unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Memory Barrier unit
-+ (unit u-membar "Memory Barrier unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Insn cache invalidate unit
-+ (unit u-ici "Insn cache invalidate unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Data cache invalidate unit
-+ (unit u-dci "Data cache invalidate unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Data cache flush unit
-+ (unit u-dcf "Data cache flush unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Insn cache preload unit
-+ (unit u-icpl "Insn cache preload unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Data cache preload unit
-+ (unit u-dcpl "Data cache preload unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Insn cache unlock unit
-+ (unit u-icul "Insn cache unlock unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ ; Data cache unlock unit
-+ (unit u-dcul "Data cache unlock unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((GRi INT -1) (GRj INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+; Simple machine - single issue integer machine
-+(define-mach
-+ (name simple)
-+ (comment "Simple single issue integer cpu")
-+ (cpu frvbf)
-+)
-+(define-model
-+ (name simple) (comment "Simple model") (attrs)
-+ (mach simple)
-+ (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
-+ ; `state' is a list of variables for recording model state
-+ (state)
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+; The instruction fetch/execute cycle.
-+;
-+; This is how to fetch and decode an instruction.
-+; Leave it out for now
-+
-+; (define-extract (const SI 0))
-+
-+; This is how to execute a decoded instruction.
-+; Leave it out for now
-+
-+; (define-execute (const SI 0))
-+
-+; An attribute to describe which unit an insn runs in.
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name UNIT)
-+ (comment "parallel execution pipeline selection")
-+ ; The order of declaration is significant.
-+ ; See the *_unit_mapping tables in frv.opc
-+ ; Keep variations on the same unit together.
-+ ; Keep the '01' variant immediately after the '1' variant in each unit.
-+ ; Keep the 'ALL' variations immediately after the last numbered variant in each unit.
-+ (values NIL
-+ I0 I1 I01 I2 I3 IALL
-+ FM0 FM1 FM01 FM2 FM3 FMALL FMLOW
-+ B0 B1 B01
-+ C
-+ MULT-DIV ; multiply/division slotted differently on different machines
-+ IACC ; iacc multiply slotted differently on different machines
-+ LOAD ; loads slotted differently on different machines
-+ STORE ; store slotted differently on different machines
-+ SCAN ; scan, scani slotted differently on different machines
-+ DCPL ; dcpl slotted differently on different machines
-+ MDUALACC ; media dual acc slotted differently on different machines
-+ MDCUTSSI ; mdcutssi insn slotted differently on different machines
-+ MCLRACC-1; mclracc A==1 slotted differently on different machines
-+ NUM_UNITS
-+ )
-+)
-+; Attributes to describe major categories of insns
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name FR400-MAJOR)
-+ (comment "fr400 major insn categories")
-+ ; The order of declaration is significant. Keep variations on the same major
-+ ; together.
-+ (values NONE
-+ I-1 I-2 I-3 I-4 I-5
-+ B-1 B-2 B-3 B-4 B-5 B-6
-+ C-1 C-2
-+ M-1 M-2
-+ )
-+)
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name FR450-MAJOR)
-+ (comment "fr450 major insn categories")
-+ ; The order of declaration is significant. Keep variations on the same major
-+ ; together.
-+ (values NONE
-+ I-1 I-2 I-3 I-4 I-5
-+ B-1 B-2 B-3 B-4 B-5 B-6
-+ C-1 C-2
-+ M-1 M-2 M-3 M-4 M-5 M-6
-+ )
-+)
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name FR500-MAJOR)
-+ (comment "fr500 major insn categories")
-+ ; The order of declaration is significant. Keep variations on the same major
-+ ; together.
-+ (values NONE
-+ I-1 I-2 I-3 I-4 I-5 I-6
-+ B-1 B-2 B-3 B-4 B-5 B-6
-+ C-1 C-2
-+ F-1 F-2 F-3 F-4 F-5 F-6 F-7 F-8
-+ M-1 M-2 M-3 M-4 M-5 M-6 M-7 M-8
-+ )
-+)
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name FR550-MAJOR)
-+ (comment "fr550 major insn categories")
-+ ; The order of declaration is significant. Keep variations on the same major
-+ ; together.
-+ (values NONE
-+ I-1 I-2 I-3 I-4 I-5 I-6 I-7 I-8
-+ B-1 B-2 B-3 B-4 B-5 B-6
-+ C-1 C-2
-+ F-1 F-2 F-3 F-4
-+ M-1 M-2 M-3 M-4 M-5
-+ )
-+)
-+; Privileged insn
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name PRIVILEGED)
-+ (comment "insn only allowed in supervisor mode")
-+)
-+; Non-Excepting insn
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name NON-EXCEPTING)
-+ (comment "non-excepting insn")
-+)
-+; Conditional insn
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name CONDITIONAL)
-+ (comment "conditional insn")
-+)
-+; insn accesses FR registers
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name FR-ACCESS)
-+ (comment "insn accesses FR registers")
-+)
-+; insn preserves MSR.OVF
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name PRESERVE-OVF)
-+ (comment "Preserve value of MSR.OVF")
-+)
-+; "Audio" instruction provided by the fr405 but not the original fr400 core.
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name AUDIO)
-+ (comment "Audio instruction added with FR405")
-+)
-+; null attribute -- used as a place holder for where an attribue is required.
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name NA)
-+ (comment "placeholder attribute")
-+ (attrs META) ; do not define in any generated file for now
-+)
-+
-+; IDOC attribute for instruction documentation.
-+
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name IDOC)
-+ (comment "insn kind for documentation")
-+ (attrs META)
-+ (values
-+ (MEM - () "Memory")
-+ (ALU - () "ALU")
-+ (FPU - () "FPU")
-+ (BR - () "Branch")
-+ (PRIV - () "Priviledged")
-+ (MISC - () "Miscellaneous")
-+ )
-+)
-+
-+; Instruction fields.
-+;
-+; Attributes:
-+; PCREL-ADDR: pc relative value (for reloc and disassembly purposes)
-+; ABS-ADDR: absolute address (for reloc and disassembly purposes?)
-+; RESERVED: bits are not used to decode insn, must be all 0
-+(dnf f-pack "packing bit" () 31 1)
-+(dnf f-op "primary opcode" () 24 7)
-+(dnf f-ope1 "extended opcode" () 11 6)
-+(dnf f-ope2 "extended opcode" () 9 4)
-+(dnf f-ope3 "extended opcode" () 15 3)
-+(dnf f-ope4 "extended opcode" () 7 2)
-+
-+(dnf f-GRi "source register 1" () 17 6)
-+(dnf f-GRj "source register 2" () 5 6)
-+(dnf f-GRk "destination register" () 30 6)
-+
-+(dnf f-FRi "source register 1" () 17 6)
-+(dnf f-FRj "source register 2" () 5 6)
-+(dnf f-FRk "destination register" () 30 6)
-+
-+(dnf f-CPRi "source register 1" () 17 6)
-+(dnf f-CPRj "source register 2" () 5 6)
-+(dnf f-CPRk "destination register" () 30 6)
-+
-+(dnf f-ACCGi "source register" () 17 6)
-+(dnf f-ACCGk "destination register" () 30 6)
-+
-+(dnf f-ACC40Si "40 bit signed accumulator" () 17 6)
-+(dnf f-ACC40Ui "40 bit unsigned accumulator" () 17 6)
-+(dnf f-ACC40Sk "40 bit accumulator" () 30 6)
-+(dnf f-ACC40Uk "40 bit accumulator" () 30 6)
-+
-+(dnf f-CRi "source register" () 14 3)
-+(dnf f-CRj "source register" () 2 3)
-+(dnf f-CRk "destination register" () 27 3)
-+(dnf f-CCi "condition register" () 11 3)
-+
-+(df f-CRj_int "target cr for ck insns" () 26 2 UINT
-+ ((value pc) (sub WI value 4))
-+ ((value pc) (add WI value 4))
-+)
-+(dnf f-CRj_float "target cr for fck insns" () 26 2)
-+
-+(dnf f-ICCi_1 "condition register" () 11 2)
-+(dnf f-ICCi_2 "condition register" () 26 2)
-+(dnf f-ICCi_3 "condition register" () 1 2)
-+(dnf f-FCCi_1 "condition register" () 11 2)
-+(dnf f-FCCi_2 "condition register" () 26 2)
-+(dnf f-FCCi_3 "condition register" () 1 2)
-+(dnf f-FCCk "condition register" () 26 2)
-+(dnf f-eir "exception insn register" () 17 6)
-+
-+(df f-s10 "10 bit sign extended" () 9 10 INT #f #f)
-+(df f-s12 "12 bit sign extended" () 11 12 INT #f #f)
-+(df f-d12 "12 bit sign extended" () 11 12 INT #f #f)
-+(df f-u16 "16 bit unsigned" () 15 16 UINT #f #f)
-+(df f-s16 "16 bit sign extended" () 15 16 INT #f #f)
-+(df f-s6 "6 bit signed" () 5 6 INT #f #f)
-+(df f-s6_1 "6 bit signed" () 11 6 INT #f #f)
-+(df f-u6 "6 bit unsigned" () 5 6 UINT #f #f)
-+(df f-s5 "5 bit signed" () 4 5 INT #f #f)
-+
-+(df f-u12-h "upper 6 bits of u12" () 17 6 INT #f #f)
-+(df f-u12-l "lower 6 bits of u12" () 5 6 UINT #f #f)
-+(dnmf f-u12 "12 bit signed immediate" () INT
-+ (f-u12-h f-u12-l)
-+ (sequence () ; insert
-+ (set (ifield f-u12-h) (sra SI (ifield f-u12) 6))
-+ (set (ifield f-u12-l) (and (ifield f-u12) #x3f))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-u12) (or (sll (ifield f-u12-h) 6)
-+ (ifield f-u12-l)))
-+ )
-+)
-+
-+(dnf f-int-cc "integer branch conditions" () 30 4)
-+(dnf f-flt-cc "floating branch conditions" () 30 4)
-+(df f-cond "conditional arithmetic" () 8 1 UINT #f #f)
-+(df f-ccond "lr branch condition" () 12 1 UINT #f #f)
-+(df f-hint "2 bit branch prediction hint" () 17 2 UINT #f #f)
-+(df f-LI "link indicator" () 25 1 UINT #f #f)
-+(df f-lock "cache lock indicator" () 25 1 UINT #f #f)
-+(df f-debug "debug mode indicator" () 25 1 UINT #f #f)
-+(df f-A "all accumulator bit" () 17 1 UINT #f #f)
-+(df f-ae "cache all entries indicator" () 25 1 UINT #f #f)
-+
-+(dnf f-spr-h "upper 6 bits of spr" () 30 6)
-+(dnf f-spr-l "lower 6 bits of spr" () 17 6)
-+(dnmf f-spr "special purpose register" () UINT
-+ (f-spr-h f-spr-l)
-+ (sequence () ; insert
-+ (set (ifield f-spr-h) (srl (ifield f-spr) (const 6)))
-+ (set (ifield f-spr-l) (and (ifield f-spr) (const #x3f)))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-spr) (or (sll (ifield f-spr-h) (const 6))
-+ (ifield f-spr-l)))
-+ )
-+)
-+
-+(df f-label16 "18 bit pc relative signed offset" (PCREL-ADDR) 15 16 INT
-+ ((value pc) (sra WI (sub WI value pc) (const 2)))
-+ ((value pc) (add WI (sll WI value (const 2)) pc))
-+)
-+
-+(df f-labelH6 "upper 6 bits of label24" () 30 6 INT #f #f)
-+(dnf f-labelL18 "lower 18 bits of label24" () 17 18)
-+(dnmf f-label24 "26 bit signed offset" (PCREL-ADDR) INT
-+ (f-labelH6 f-labelL18)
-+ ; insert
-+ (sequence ()
-+ (set (ifield f-labelH6)
-+ (sra WI (sub (ifield f-label24) pc) (const 20)))
-+ (set (ifield f-labelL18)
-+ (and (srl (sub (ifield f-label24) pc) (const 2))
-+ (const #x3ffff)))
-+ )
-+ ; extract
-+ (sequence ()
-+ (set (ifield f-label24)
-+ (add (sll (or (sll (ifield f-labelH6) (const 18))
-+ (ifield f-labelL18))
-+ (const 2))
-+ pc)))
-+)
-+
-+(dnf f-LRAE "Load Real Address E flag" () 5 1)
-+(dnf f-LRAD "Load Real Address D flag" () 4 1)
-+(dnf f-LRAS "Load Real Address S flag" () 3 1)
-+
-+(dnf f-TLBPRopx "TLB Probe operation number" () 28 3)
-+(dnf f-TLBPRL "TLB Probe L flag" () 25 1)
-+
-+(dnf f-ICCi_1-null "null field" (RESERVED) 11 2)
-+(dnf f-ICCi_2-null "null field" (RESERVED) 26 2)
-+(dnf f-ICCi_3-null "null field" (RESERVED) 1 2)
-+(dnf f-FCCi_1-null "null field" (RESERVED) 11 2)
-+(dnf f-FCCi_2-null "null field" (RESERVED) 26 2)
-+(dnf f-FCCi_3-null "null field" (RESERVED) 1 2)
-+(dnf f-rs-null "null field" (RESERVED) 17 6)
-+(dnf f-GRi-null "null field" (RESERVED) 17 6)
-+(dnf f-GRj-null "null field" (RESERVED) 5 6)
-+(dnf f-GRk-null "null field" (RESERVED) 30 6)
-+(dnf f-FRi-null "null field" (RESERVED) 17 6)
-+(dnf f-FRj-null "null field" (RESERVED) 5 6)
-+(dnf f-ACCj-null "null field" (RESERVED) 5 6)
-+(dnf f-rd-null "null field" (RESERVED) 30 6)
-+(dnf f-cond-null "null field" (RESERVED) 30 4)
-+(dnf f-ccond-null "null field" (RESERVED) 12 1)
-+(dnf f-s12-null "null field" (RESERVED) 11 12)
-+(dnf f-label16-null "null field" (RESERVED) 15 16)
-+(dnf f-misc-null-1 "null field" (RESERVED) 30 5)
-+(dnf f-misc-null-2 "null field" (RESERVED) 11 6)
-+(dnf f-misc-null-3 "null field" (RESERVED) 11 4)
-+(dnf f-misc-null-4 "null field" (RESERVED) 17 2)
-+(dnf f-misc-null-5 "null field" (RESERVED) 17 16)
-+(dnf f-misc-null-6 "null field" (RESERVED) 30 3)
-+(dnf f-misc-null-7 "null field" (RESERVED) 17 3)
-+(dnf f-misc-null-8 "null field" (RESERVED) 5 3)
-+(dnf f-misc-null-9 "null field" (RESERVED) 5 4)
-+(dnf f-misc-null-10 "null field" (RESERVED) 16 5)
-+(dnf f-misc-null-11 "null field" (RESERVED) 5 1)
-+
-+(dnf f-LRA-null "null field" (RESERVED) 2 3)
-+(dnf f-TLBPR-null "null field" (RESERVED) 30 2)
-+
-+(dnf f-LI-off "null field" (RESERVED) 25 1)
-+(dnf f-LI-on "null field" (RESERVED) 25 1)
-+
-+; Relocation annotations.
-+(dsh h-reloc-ann "relocation annotation" () (register BI))
-+(dnf f-reloc-ann "relocation annotation" () 0 0)
-+
-+(define-pmacro (dann xname xcomment xmode xparse xprint)
-+ (define-operand
-+ (name xname)
-+ (comment xcomment)
-+ (type h-reloc-ann)
-+ (index f-reloc-ann)
-+ (mode xmode)
-+ (handlers (parse xparse) (print xprint))
-+ )
-+ )
-+
-+
-+; Enums.
-+
-+; insn-op:
-+; FIXME: should use die macro or some such
-+(define-normal-insn-enum insn-op "insn op enums" () OP_ f-op
-+ (
-+ "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F"
-+ "10" "11" "12" "13" "14" "15" "16" "17" "18" "19" "1A" "1B" "1C" "1D" "1E" "1F"
-+ "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "2A" "2B" "2C" "2D" "2E" "2F"
-+ "30" "31" "32" "33" "34" "35" "36" "37" "38" "39" "3A" "3B" "3C" "3D" "3E" "3F"
-+ "40" "41" "42" "43" "44" "45" "46" "47" "48" "49" "4A" "4B" "4C" "4D" "4E" "4F"
-+ "50" "51" "52" "53" "54" "55" "56" "57" "58" "59" "5A" "5B" "5C" "5D" "5E" "5F"
-+ "60" "61" "62" "63" "64" "65" "66" "67" "68" "69" "6A" "6B" "6C" "6D" "6E" "6F"
-+ "70" "71" "72" "73" "74" "75" "76" "77" "78" "79" "7A" "7B" "7C" "7D" "7E" "7F"
-+ )
-+)
-+
-+(define-normal-insn-enum insn-ope1 "insn ope enums" () OPE1_ f-ope1
-+ (
-+ "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F"
-+ "10" "11" "12" "13" "14" "15" "16" "17" "18" "19" "1A" "1B" "1C" "1D" "1E" "1F"
-+ "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "2A" "2B" "2C" "2D" "2E" "2F"
-+ "30" "31" "32" "33" "34" "35" "36" "37" "38" "39" "3A" "3B" "3C" "3D" "3E" "3F"
-+ )
-+)
-+
-+(define-normal-insn-enum insn-ope2 "insn ope enums" () OPE2_ f-ope2
-+ (
-+ "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F"
-+ )
-+)
-+
-+(define-normal-insn-enum insn-ope3 "insn ope enums" () OPE3_ f-ope3
-+ (
-+ "00" "01" "02" "03" "04" "05" "06" "07"
-+ )
-+)
-+
-+(define-normal-insn-enum insn-ope4 "insn ope enums" () OPE4_ f-ope4
-+ (
-+ "0" "1" "2" "3"
-+ )
-+)
-+
-+; int-cc: integer branch conditions
-+; FIXME: should use die macro or some such
-+(define-normal-insn-enum int-cc "integer branch cond enums" () ICC_ f-int-cc
-+ (
-+ "nev" "c" "v" "lt" "eq" "ls" "n" "le"
-+ "ra" "nc" "nv" "ge" "ne" "hi" "p" "gt"
-+ )
-+)
-+
-+; flt-cc: floating-point/media branch conditions
-+; FIXME: should use die macro or some such
-+(define-normal-insn-enum flt-cc "float branch cond enums" () FCC_ f-flt-cc
-+ ("nev" "u" "gt" "ug" "lt" "ul" "lg" "ne"
-+ "eq" "ue" "ge" "uge" "le" "ule" "o" "ra")
-+)
-+
-+; Hardware pieces.
-+; These entries list the elements of the raw hardware.
-+; They're also used to provide tables and other elements of the assembly
-+; language.
-+(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
-+
-+; The PSR. The individual fields are referenced more than the entire
-+; register, so reference them directly. We can assemble the
-+; entire register contents when necessary.
-+;
-+(dsh h-psr_imple "PSR.IMPLE" () (register UQI))
-+(dsh h-psr_ver "PSR.VER" () (register UQI))
-+(dsh h-psr_ice "PSR.ICE bit" () (register BI))
-+(dsh h-psr_nem "PSR.NEM bit" () (register BI))
-+(dsh h-psr_cm "PSR.CM bit" () (register BI))
-+(dsh h-psr_be "PSR.BE bit" () (register BI))
-+(dsh h-psr_esr "PSR.ESR bit" () (register BI))
-+(dsh h-psr_ef "PSR.EF bit" () (register BI))
-+(dsh h-psr_em "PSR.EM bit" () (register BI))
-+(dsh h-psr_pil "PSR.PIL " () (register UQI))
-+(dsh h-psr_ps "PSR.PS bit" () (register BI))
-+(dsh h-psr_et "PSR.ET bit" () (register BI))
-+
-+; PSR.S requires special handling because the shadow registers (SR0-SR4) must
-+; be switched with GR4-GR7 when changing from user to supervisor mode or
-+; vice-versa.
-+(define-hardware
-+ (name h-psr_s)
-+ (comment "PSR.S bit")
-+ (attrs)
-+ (type register BI)
-+ (get)
-+ (set (newval) (c-call VOID "@cpu@_h_psr_s_set_handler" newval))
-+)
-+
-+; The TBR. The individual bits are referenced more than the entire
-+; register, so reference them directly. We can assemble the
-+; entire register contents when necessary.
-+;
-+(dsh h-tbr_tba "TBR.TBA" () (register UWI))
-+(dsh h-tbr_tt "TBR.TT" () (register UQI))
-+
-+; The BPSR. The individual bits are referenced more than the entire
-+; register, so reference them directly. We can assemble the
-+; entire register contents when necessary.
-+;
-+(dsh h-bpsr_bs "PSR.S bit" () (register BI))
-+(dsh h-bpsr_bet "PSR.ET bit" () (register BI))
-+
-+; General registers
-+;
-+(define-keyword
-+ (name gr-names)
-+ (print-name h-gr)
-+ (prefix "")
-+ (values
-+ (sp 1) (fp 2)
-+ (gr0 0)(gr1 1)(gr2 2)(gr3 3)(gr4 4)(gr5 5)(gr6 6)(gr7 7)
-+ (gr8 8)(gr9 9)(gr10 10)(gr11 11)(gr12 12)(gr13 13)(gr14 14)(gr15 15)
-+ (gr16 16)(gr17 17)(gr18 18)(gr19 19)(gr20 20)(gr21 21)(gr22 22)(gr23 23)
-+ (gr24 24)(gr25 25)(gr26 26)(gr27 27)(gr28 28)(gr29 29)(gr30 30)(gr31 31)
-+ (gr32 32)(gr33 33)(gr34 34)(gr35 35)(gr36 36)(gr37 37)(gr38 38)(gr39 39)
-+ (gr40 40)(gr41 41)(gr42 42)(gr43 43)(gr44 44)(gr45 45)(gr46 46)(gr47 47)
-+ (gr48 48)(gr49 49)(gr50 50)(gr51 51)(gr52 52)(gr53 53)(gr54 54)(gr55 55)
-+ (gr56 56)(gr57 57)(gr58 58)(gr59 59)(gr60 60)(gr61 61)(gr62 62)(gr63 63)
-+ )
-+)
-+
-+(define-hardware
-+ (name h-gr)
-+ (comment "general registers")
-+ (attrs PROFILE)
-+ (type register USI (64))
-+ (indices extern-keyword gr-names)
-+ (get (index) (c-call WI "@cpu@_h_gr_get_handler" index))
-+ (set (index newval) (c-call VOID "@cpu@_h_gr_set_handler" index newval))
-+)
-+
-+; General Registers as double words
-+; These registers are shadowed onto h-gr
-+(define-hardware
-+ (name h-gr_double)
-+ (comment "general registers as double words")
-+ (attrs PROFILE VIRTUAL)
-+ (type register DI (32))
-+ ; FIXME: Need constraint to prohibit odd numbers.
-+ (indices extern-keyword gr-names)
-+ (get (index)
-+ (c-call DI "@cpu@_h_gr_double_get_handler" index))
-+ (set (index newval)
-+ (c-call VOID "@cpu@_h_gr_double_set_handler" index newval))
-+)
-+
-+; General Registers as high and low half words
-+; These registers are shadowed onto h-gr
-+(define-hardware
-+ (name h-gr_hi)
-+ (comment "general registers as high half word")
-+ (attrs PROFILE VIRTUAL)
-+ (type register UHI (64))
-+ (indices extern-keyword gr-names)
-+ (get (index) (c-call UHI "@cpu@_h_gr_hi_get_handler" index))
-+ (set (index newval) (c-call VOID "@cpu@_h_gr_hi_set_handler" index newval))
-+)
-+(define-hardware
-+ (name h-gr_lo)
-+ (comment "general registers as low half word")
-+ (attrs PROFILE VIRTUAL)
-+ (type register UHI (64))
-+ (indices extern-keyword gr-names)
-+ (get (index) (c-call UHI "@cpu@_h_gr_lo_get_handler" index))
-+ (set (index newval) (c-call VOID "@cpu@_h_gr_lo_set_handler" index newval))
-+)
-+
-+; Floating Point Registers
-+(define-keyword
-+ (name fr-names)
-+ (print-name h-fr)
-+ (prefix "")
-+ (values
-+ (fr0 0)(fr1 1)(fr2 2)(fr3 3)(fr4 4)(fr5 5)(fr6 6)(fr7 7)
-+ (fr8 8)(fr9 9)(fr10 10)(fr11 11)(fr12 12)(fr13 13)(fr14 14)(fr15 15)
-+ (fr16 16)(fr17 17)(fr18 18)(fr19 19)(fr20 20)(fr21 21)(fr22 22)(fr23 23)
-+ (fr24 24)(fr25 25)(fr26 26)(fr27 27)(fr28 28)(fr29 29)(fr30 30)(fr31 31)
-+ (fr32 32)(fr33 33)(fr34 34)(fr35 35)(fr36 36)(fr37 37)(fr38 38)(fr39 39)
-+ (fr40 40)(fr41 41)(fr42 42)(fr43 43)(fr44 44)(fr45 45)(fr46 46)(fr47 47)
-+ (fr48 48)(fr49 49)(fr50 50)(fr51 51)(fr52 52)(fr53 53)(fr54 54)(fr55 55)
-+ (fr56 56)(fr57 57)(fr58 58)(fr59 59)(fr60 60)(fr61 61)(fr62 62)(fr63 63)
-+ )
-+)
-+
-+(define-hardware
-+ (name h-fr)
-+ (comment "floating point registers")
-+ (attrs PROFILE)
-+ (type register SF (64))
-+ (indices extern-keyword fr-names)
-+ (get (index) (c-call SF "@cpu@_h_fr_get_handler" index))
-+ (set (index newval) (c-call VOID "@cpu@_h_fr_set_handler" index newval))
-+)
-+
-+; Floating Point Registers as double precision
-+; These registers are shadowed onto h-fr
-+
-+(define-hardware
-+ (name h-fr_double)
-+ (comment "floating point registers as double precision")
-+ (attrs PROFILE VIRTUAL)
-+ (type register DF (32))
-+ ; FIXME: Need constraint to prohibit odd numbers.
-+ (indices extern-keyword fr-names)
-+ (get (index)
-+ (c-call DF "@cpu@_h_fr_double_get_handler" index))
-+ (set (index newval)
-+ (c-call VOID "@cpu@_h_fr_double_set_handler" index newval))
-+)
-+
-+; Floating Point Registers as integer words.
-+; These registers are shadowed onto h-fr
-+
-+(define-hardware
-+ (name h-fr_int)
-+ (comment "floating point registers as integers")
-+ (attrs PROFILE VIRTUAL)
-+ (type register USI (64))
-+ (indices extern-keyword fr-names)
-+ (get (index)
-+ (c-call USI "@cpu@_h_fr_int_get_handler" index))
-+ (set (index newval)
-+ (c-call VOID "@cpu@_h_fr_int_set_handler" index newval))
-+)
-+
-+; Floating Point Registers as high and low half words
-+; These registers are shadowed onto h-fr
-+(define-hardware
-+ (name h-fr_hi)
-+ (comment "floating point registers as unsigned high half word")
-+ (attrs PROFILE VIRTUAL)
-+ (type register UHI (64))
-+ (indices extern-keyword fr-names)
-+ (get (regno) (srl (reg h-fr_int regno) 16))
-+ (set (regno newval) (set (reg h-fr_int regno)
-+ (or (and (reg h-fr_int regno) #xffff)
-+ (sll newval 16))))
-+)
-+(define-hardware
-+ (name h-fr_lo)
-+ (comment "floating point registers as unsigned low half word")
-+ (attrs PROFILE VIRTUAL)
-+ (type register UHI (64))
-+ (indices extern-keyword fr-names)
-+ (get (regno) (and (reg h-fr_int regno) #xffff))
-+ (set (regno newval) (set (reg h-fr_int regno)
-+ (or (and (reg h-fr_int regno) #xffff0000)
-+ (and newval #xffff))))
-+)
-+
-+; Floating Point Registers as unsigned bytes
-+; These registers are shadowed onto h-fr
-+(define-hardware
-+ (name h-fr_0)
-+ (comment "floating point registers as unsigned byte 0")
-+ (attrs PROFILE VIRTUAL)
-+ (type register UHI (64))
-+ (indices extern-keyword fr-names)
-+ (get (regno) (and (reg h-fr_int regno) #xff))
-+ (set (regno newval)
-+ (sequence ()
-+ (if (gt USI newval #xff)
-+ (set newval #xff))
-+ (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xffffff00)
-+ newval))))
-+)
-+(define-hardware
-+ (name h-fr_1)
-+ (comment "floating point registers as unsigned byte 1")
-+ (attrs PROFILE VIRTUAL)
-+ (type register UHI (64))
-+ (indices extern-keyword fr-names)
-+ (get (regno) (and (srl (reg h-fr_int regno) 8) #xff))
-+ (set (regno newval)
-+ (sequence ()
-+ (if (gt USI newval #xff)
-+ (set newval #xff))
-+ (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xffff00ff)
-+ (sll newval 8)))))
-+)
-+(define-hardware
-+ (name h-fr_2)
-+ (comment "floating point registers as unsigned byte 2")
-+ (attrs PROFILE VIRTUAL)
-+ (type register UHI (64))
-+ (indices extern-keyword fr-names)
-+ (get (regno) (and (srl (reg h-fr_int regno) 16) #xff))
-+ (set (regno newval)
-+ (sequence ()
-+ (if (gt USI newval #xff)
-+ (set newval #xff))
-+ (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xff00ffff)
-+ (sll newval 16)))))
-+)
-+(define-hardware
-+ (name h-fr_3)
-+ (comment "floating point registers as unsigned byte 3")
-+ (attrs PROFILE VIRTUAL)
-+ (type register UHI (64))
-+ (indices extern-keyword fr-names)
-+ (get (regno) (and (srl (reg h-fr_int regno) 24) #xff))
-+ (set (regno newval)
-+ (sequence ()
-+ (if (gt USI newval #xff)
-+ (set newval #xff))
-+ (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #x00ffffff)
-+ (sll newval 24)))))
-+)
-+; Coprocessor Registers
-+;
-+(define-keyword
-+ (name cpr-names)
-+ (print-name h-cpr)
-+ (prefix "")
-+ (values
-+(cpr0 0)(cpr1 1)(cpr2 2)(cpr3 3)(cpr4 4)(cpr5 5)(cpr6 6)(cpr7 7)
-+(cpr8 8)(cpr9 9)(cpr10 10)(cpr11 11)(cpr12 12)(cpr13 13)(cpr14 14)(cpr15 15)
-+(cpr16 16)(cpr17 17)(cpr18 18)(cpr19 19)(cpr20 20)(cpr21 21)(cpr22 22)(cpr23 23)
-+(cpr24 24)(cpr25 25)(cpr26 26)(cpr27 27)(cpr28 28)(cpr29 29)(cpr30 30)(cpr31 31)
-+(cpr32 32)(cpr33 33)(cpr34 34)(cpr35 35)(cpr36 36)(cpr37 37)(cpr38 38)(cpr39 39)
-+(cpr40 40)(cpr41 41)(cpr42 42)(cpr43 43)(cpr44 44)(cpr45 45)(cpr46 46)(cpr47 47)
-+(cpr48 48)(cpr49 49)(cpr50 50)(cpr51 51)(cpr52 52)(cpr53 53)(cpr54 54)(cpr55 55)
-+(cpr56 56)(cpr57 57)(cpr58 58)(cpr59 59)(cpr60 60)(cpr61 61)(cpr62 62)(cpr63 63)
-+ )
-+)
-+
-+(define-hardware
-+ (name h-cpr)
-+ (comment "coprocessor registers")
-+ (attrs PROFILE (MACH frv))
-+ (type register WI (64))
-+ (indices extern-keyword cpr-names)
-+)
-+
-+; Coprocessor Registers as double words
-+; These registers are shadowed onto h-cpr
-+(define-hardware
-+ (name h-cpr_double)
-+ (comment "coprocessor registers as double words")
-+ (attrs PROFILE VIRTUAL (MACH frv))
-+ (type register DI (32))
-+ ; FIXME: Need constraint to prohibit odd numbers.
-+ (indices extern-keyword cpr-names)
-+ (get (index)
-+ (c-call DI "@cpu@_h_cpr_double_get_handler" index))
-+ (set (index newval)
-+ (c-call VOID "@cpu@_h_cpr_double_set_handler" index newval))
-+)
-+
-+; Special Purpose Registers
-+;
-+(define-keyword
-+ (name spr-names)
-+ (print-name h-spr)
-+ (prefix "")
-+ (values
-+ (psr 0) (pcsr 1) (bpcsr 2) (tbr 3) (bpsr 4)
-+
-+ (hsr0 16) (hsr1 17) (hsr2 18) (hsr3 19)
-+ (hsr4 20) (hsr5 21) (hsr6 22) (hsr7 23)
-+ (hsr8 24) (hsr9 25) (hsr10 26) (hsr11 27)
-+ (hsr12 28) (hsr13 29) (hsr14 30) (hsr15 31)
-+ (hsr16 32) (hsr17 33) (hsr18 34) (hsr19 35)
-+ (hsr20 36) (hsr21 37) (hsr22 38) (hsr23 39)
-+ (hsr24 40) (hsr25 41) (hsr26 42) (hsr27 43)
-+ (hsr28 44) (hsr29 45) (hsr30 46) (hsr31 47)
-+ (hsr32 48) (hsr33 49) (hsr34 50) (hsr35 51)
-+ (hsr36 52) (hsr37 53) (hsr38 54) (hsr39 55)
-+ (hsr40 56) (hsr41 57) (hsr42 58) (hsr43 59)
-+ (hsr44 60) (hsr45 61) (hsr46 62) (hsr47 63)
-+ (hsr48 64) (hsr49 65) (hsr50 66) (hsr51 67)
-+ (hsr52 68) (hsr53 69) (hsr54 70) (hsr55 71)
-+ (hsr56 72) (hsr57 73) (hsr58 74) (hsr59 75)
-+ (hsr60 76) (hsr61 77) (hsr62 78) (hsr63 79)
-+
-+ (ccr 256) (cccr 263) (lr 272) (lcr 273) (iacc0h 280) (iacc0l 281) (isr 288)
-+
-+ (neear0 352) (neear1 353) (neear2 354) (neear3 355)
-+ (neear4 356) (neear5 357) (neear6 358) (neear7 359)
-+ (neear8 360) (neear9 361) (neear10 362) (neear11 363)
-+ (neear12 364) (neear13 365) (neear14 366) (neear15 367)
-+ (neear16 368) (neear17 369) (neear18 370) (neear19 371)
-+ (neear20 372) (neear21 373) (neear22 374) (neear23 375)
-+ (neear24 376) (neear25 377) (neear26 378) (neear27 379)
-+ (neear28 380) (neear29 381) (neear30 382) (neear31 383)
-+
-+ (nesr0 384) (nesr1 385) (nesr2 386) (nesr3 387)
-+ (nesr4 388) (nesr5 389) (nesr6 390) (nesr7 391)
-+ (nesr8 392) (nesr9 393) (nesr10 394) (nesr11 395)
-+ (nesr12 396) (nesr13 397) (nesr14 398) (nesr15 399)
-+ (nesr16 400) (nesr17 401) (nesr18 402) (nesr19 403)
-+ (nesr20 404) (nesr21 405) (nesr22 406) (nesr23 407)
-+ (nesr24 408) (nesr25 409) (nesr26 410) (nesr27 411)
-+ (nesr28 412) (nesr29 413) (nesr30 414) (nesr31 415)
-+
-+ (necr 416)
-+
-+ (gner0 432) (gner1 433)
-+
-+ (fner0 434) (fner1 435)
-+
-+ (epcr0 512) (epcr1 513) (epcr2 514) (epcr3 515)
-+ (epcr4 516) (epcr5 517) (epcr6 518) (epcr7 519)
-+ (epcr8 520) (epcr9 521) (epcr10 522) (epcr11 523)
-+ (epcr12 524) (epcr13 525) (epcr14 526) (epcr15 527)
-+ (epcr16 528) (epcr17 529) (epcr18 530) (epcr19 531)
-+ (epcr20 532) (epcr21 533) (epcr22 534) (epcr23 535)
-+ (epcr24 536) (epcr25 537) (epcr26 538) (epcr27 539)
-+ (epcr28 540) (epcr29 541) (epcr30 542) (epcr31 543)
-+ (epcr32 544) (epcr33 545) (epcr34 546) (epcr35 547)
-+ (epcr36 548) (epcr37 549) (epcr38 550) (epcr39 551)
-+ (epcr40 552) (epcr41 553) (epcr42 554) (epcr43 555)
-+ (epcr44 556) (epcr45 557) (epcr46 558) (epcr47 559)
-+ (epcr48 560) (epcr49 561) (epcr50 562) (epcr51 563)
-+ (epcr52 564) (epcr53 565) (epcr54 566) (epcr55 567)
-+ (epcr56 568) (epcr57 569) (epcr58 570) (epcr59 571)
-+ (epcr60 572) (epcr61 573) (epcr62 574) (epcr63 575)
-+
-+ (esr0 576) (esr1 577) (esr2 578) (esr3 579)
-+ (esr4 580) (esr5 581) (esr6 582) (esr7 583)
-+ (esr8 584) (esr9 585) (esr10 586) (esr11 587)
-+ (esr12 588) (esr13 589) (esr14 590) (esr15 591)
-+ (esr16 592) (esr17 593) (esr18 594) (esr19 595)
-+ (esr20 596) (esr21 597) (esr22 598) (esr23 599)
-+ (esr24 600) (esr25 601) (esr26 602) (esr27 603)
-+ (esr28 604) (esr29 605) (esr30 606) (esr31 607)
-+ (esr32 608) (esr33 609) (esr34 610) (esr35 611)
-+ (esr36 612) (esr37 613) (esr38 614) (esr39 615)
-+ (esr40 616) (esr41 617) (esr42 618) (esr43 619)
-+ (esr44 620) (esr45 621) (esr46 622) (esr47 623)
-+ (esr48 624) (esr49 625) (esr50 626) (esr51 627)
-+ (esr52 628) (esr53 629) (esr54 630) (esr55 631)
-+ (esr56 632) (esr57 633) (esr58 634) (esr59 635)
-+ (esr60 636) (esr61 637) (esr62 638) (esr63 639)
-+
-+ (eir0 640) (eir1 641) (eir2 642) (eir3 643)
-+ (eir4 644) (eir5 645) (eir6 646) (eir7 647)
-+ (eir8 648) (eir9 649) (eir10 650) (eir11 651)
-+ (eir12 652) (eir13 653) (eir14 654) (eir15 655)
-+ (eir16 656) (eir17 657) (eir18 658) (eir19 659)
-+ (eir20 660) (eir21 661) (eir22 662) (eir23 663)
-+ (eir24 664) (eir25 665) (eir26 666) (eir27 667)
-+ (eir28 668) (eir29 669) (eir30 670) (eir31 671)
-+
-+ (esfr0 672) (esfr1 673)
-+
-+ (sr0 768) (sr1 769) (sr2 770) (sr3 771)
-+
-+ (scr0 832) (scr1 833) (scr2 834) (scr3 835)
-+
-+ (fsr0 1024) (fsr1 1025) (fsr2 1026) (fsr3 1027)
-+ (fsr4 1028) (fsr5 1029) (fsr6 1030) (fsr7 1031)
-+ (fsr8 1032) (fsr9 1033) (fsr10 1034) (fsr11 1035)
-+ (fsr12 1036) (fsr13 1037) (fsr14 1038) (fsr15 1039)
-+ (fsr16 1040) (fsr17 1041) (fsr18 1042) (fsr19 1043)
-+ (fsr20 1044) (fsr21 1045) (fsr22 1046) (fsr23 1047)
-+ (fsr24 1048) (fsr25 1049) (fsr26 1050) (fsr27 1051)
-+ (fsr28 1052) (fsr29 1053) (fsr30 1054) (fsr31 1055)
-+ (fsr32 1056) (fsr33 1057) (fsr34 1058) (fsr35 1059)
-+ (fsr36 1060) (fsr37 1061) (fsr38 1062) (fsr39 1063)
-+ (fsr40 1064) (fsr41 1065) (fsr42 1066) (fsr43 1067)
-+ (fsr44 1068) (fsr45 1069) (fsr46 1070) (fsr47 1071)
-+ (fsr48 1072) (fsr49 1073) (fsr50 1074) (fsr51 1075)
-+ (fsr52 1076) (fsr53 1077) (fsr54 1078) (fsr55 1079)
-+ (fsr56 1080) (fsr57 1081) (fsr58 1082) (fsr59 1083)
-+ (fsr60 1084) (fsr61 1085) (fsr62 1086) (fsr63 1087)
-+
-+ ; FQ0-FQ31 are 64 bit registers.
-+ ; These names allow access to the upper 32 bits of the FQ registers.
-+ (fqop0 1088) (fqop1 1090) (fqop2 1092) (fqop3 1094)
-+ (fqop4 1096) (fqop5 1098) (fqop6 1100) (fqop7 1102)
-+ (fqop8 1104) (fqop9 1106) (fqop10 1108) (fqop11 1110)
-+ (fqop12 1112) (fqop13 1114) (fqop14 1116) (fqop15 1118)
-+ (fqop16 1120) (fqop17 1122) (fqop18 1124) (fqop19 1126)
-+ (fqop20 1128) (fqop21 1130) (fqop22 1132) (fqop23 1134)
-+ (fqop24 1136) (fqop25 1138) (fqop26 1140) (fqop27 1142)
-+ (fqop28 1144) (fqop29 1146) (fqop30 1148) (fqop31 1150)
-+ ; These names allow access to the lower 32 bits of the FQ registers.
-+ (fqst0 1089) (fqst1 1091) (fqst2 1093) (fqst3 1095)
-+ (fqst4 1097) (fqst5 1099) (fqst6 1101) (fqst7 1103)
-+ (fqst8 1105) (fqst9 1107) (fqst10 1109) (fqst11 1111)
-+ (fqst12 1113) (fqst13 1115) (fqst14 1117) (fqst15 1119)
-+ (fqst16 1121) (fqst17 1123) (fqst18 1125) (fqst19 1127)
-+ (fqst20 1129) (fqst21 1131) (fqst22 1133) (fqst23 1135)
-+ (fqst24 1137) (fqst25 1139) (fqst26 1141) (fqst27 1143)
-+ (fqst28 1145) (fqst29 1147) (fqst30 1149) (fqst31 1151)
-+ ; These also access the lower 32 bits of the FQ registers.
-+ ; These are not accessible as spr registers (see LSI appendix - section 13.4)
-+; (fq0 1089) (fq1 1091) (fq2 1093) (fq3 1095)
-+; (fq4 1097) (fq5 1099) (fq6 1101) (fq7 1103)
-+; (fq8 1105) (fq9 1107) (fq10 1109) (fq11 1111)
-+; (fq12 1113) (fq13 1115) (fq14 1117) (fq15 1119)
-+; (fq16 1121) (fq17 1123) (fq18 1125) (fq19 1127)
-+; (fq20 1129) (fq21 1131) (fq22 1133) (fq23 1135)
-+; (fq24 1137) (fq25 1139) (fq26 1141) (fq27 1143)
-+; (fq28 1145) (fq29 1147) (fq30 1149) (fq31 1151)
-+
-+ (mcilr0 1272) (mcilr1 1273)
-+
-+ (msr0 1280) (msr1 1281) (msr2 1282) (msr3 1283)
-+ (msr4 1284) (msr5 1285) (msr6 1286) (msr7 1287)
-+ (msr8 1288) (msr9 1289) (msr10 1290) (msr11 1291)
-+ (msr12 1292) (msr13 1293) (msr14 1294) (msr15 1295)
-+ (msr16 1296) (msr17 1297) (msr18 1298) (msr19 1299)
-+ (msr20 1300) (msr21 1301) (msr22 1302) (msr23 1303)
-+ (msr24 1304) (msr25 1305) (msr26 1306) (msr27 1307)
-+ (msr28 1308) (msr29 1309) (msr30 1310) (msr31 1311)
-+ (msr32 1312) (msr33 1313) (msr34 1314) (msr35 1315)
-+ (msr36 1316) (msr37 1317) (msr38 1318) (msr39 1319)
-+ (msr40 1320) (msr41 1321) (msr42 1322) (msr43 1323)
-+ (msr44 1324) (msr45 1325) (msr46 1326) (msr47 1327)
-+ (msr48 1328) (msr49 1329) (msr50 1330) (msr51 1331)
-+ (msr52 1332) (msr53 1333) (msr54 1334) (msr55 1335)
-+ (msr56 1336) (msr57 1337) (msr58 1338) (msr59 1339)
-+ (msr60 1340) (msr61 1341) (msr62 1342) (msr63 1343)
-+
-+ ; MQ0-MQ31 are 64 bit registers.
-+ ; These names allow access to the upper 32 bits of the MQ registers.
-+ (mqop0 1344) (mqop1 1346) (mqop2 1348) (mqop3 1350)
-+ (mqop4 1352) (mqop5 1354) (mqop6 1356) (mqop7 1358)
-+ (mqop8 1360) (mqop9 1362) (mqop10 1364) (mqop11 1366)
-+ (mqop12 1368) (mqop13 1370) (mqop14 1372) (mqop15 1374)
-+ (mqop16 1376) (mqop17 1378) (mqop18 1380) (mqop19 1382)
-+ (mqop20 1384) (mqop21 1386) (mqop22 1388) (mqop23 1390)
-+ (mqop24 1392) (mqop25 1394) (mqop26 1396) (mqop27 1398)
-+ (mqop28 1400) (mqop29 1402) (mqop30 1404) (mqop31 1406)
-+ ; These names allow access to the lower 32 bits of the MQ registers.
-+ (mqst0 1345) (mqst1 1347) (mqst2 1349) (mqst3 1351)
-+ (mqst4 1353) (mqst5 1355) (mqst6 1357) (mqst7 1359)
-+ (mqst8 1361) (mqst9 1363) (mqst10 1365) (mqst11 1367)
-+ (mqst12 1369) (mqst13 1371) (mqst14 1373) (mqst15 1375)
-+ (mqst16 1377) (mqst17 1379) (mqst18 1381) (mqst19 1383)
-+ (mqst20 1385) (mqst21 1387) (mqst22 1389) (mqst23 1391)
-+ (mqst24 1393) (mqst25 1395) (mqst26 1397) (mqst27 1399)
-+ (mqst28 1401) (mqst29 1403) (mqst30 1405) (mqst31 1407)
-+ ; These also access the lower 32 bits of the MQ registers.
-+ ; These are not accessible as spr registers (see LSI appendix - section 13.4)
-+; (mq0 1345) (mq1 1347) (mq2 1349) (mq3 1351)
-+; (mq4 1353) (mq5 1355) (mq6 1357) (mq7 1359)
-+; (mq8 1361) (mq9 1363) (mq10 1365) (mq11 1367)
-+; (mq12 1369) (mq13 1371) (mq14 1373) (mq15 1375)
-+; (mq16 1377) (mq17 1379) (mq18 1381) (mq19 1383)
-+; (mq20 1385) (mq21 1387) (mq22 1389) (mq23 1391)
-+; (mq24 1393) (mq25 1395) (mq26 1397) (mq27 1399)
-+; (mq28 1401) (mq29 1403) (mq30 1405) (mq31 1407)
-+
-+ ; These are not accessible as spr registers (see LSI appendix - section 13.4)
-+; (acc0 1408) (acc1 1409) (acc2 1410) (acc3 1411)
-+; (acc4 1412) (acc5 1413) (acc6 1414) (acc7 1415)
-+; (acc8 1416) (acc9 1417) (acc10 1418) (acc11 1419)
-+; (acc12 1420) (acc13 1421) (acc14 1422) (acc15 1423)
-+; (acc16 1424) (acc17 1425) (acc18 1426) (acc19 1427)
-+; (acc20 1428) (acc21 1429) (acc22 1430) (acc23 1431)
-+; (acc24 1432) (acc25 1433) (acc26 1434) (acc27 1435)
-+; (acc28 1436) (acc29 1437) (acc30 1438) (acc31 1439)
-+; (acc32 1440) (acc33 1441) (acc34 1442) (acc35 1443)
-+; (acc36 1444) (acc37 1445) (acc38 1446) (acc39 1447)
-+; (acc40 1448) (acc41 1449) (acc42 1450) (acc43 1451)
-+; (acc44 1452) (acc45 1453) (acc46 1454) (acc47 1455)
-+; (acc48 1456) (acc49 1457) (acc50 1458) (acc51 1459)
-+; (acc52 1460) (acc53 1461) (acc54 1462) (acc55 1463)
-+; (acc56 1464) (acc57 1465) (acc58 1466) (acc59 1467)
-+; (acc60 1468) (acc61 1469) (acc62 1470) (acc63 1471)
-+
-+; (accg0 1472) (accg1 1473) (accg2 1474) (accg3 1475)
-+; (accg4 1476) (accg5 1477) (accg6 1478) (accg7 1479)
-+; (accg8 1480) (accg9 1481) (accg10 1482) (accg11 1483)
-+; (accg12 1484) (accg13 1485) (accg14 1486) (accg15 1487)
-+; (accg16 1488) (accg17 1489) (accg18 1490) (accg19 1491)
-+; (accg20 1492) (accg21 1493) (accg22 1494) (accg23 1495)
-+; (accg24 1496) (accg25 1497) (accg26 1498) (accg27 1499)
-+; (accg28 1500) (accg29 1501) (accg30 1502) (accg31 1503)
-+; (accg32 1504) (accg33 1505) (accg34 1506) (accg35 1507)
-+; (accg36 1508) (accg37 1509) (accg38 1510) (accg39 1511)
-+; (accg40 1512) (accg41 1513) (accg42 1514) (accg43 1515)
-+; (accg44 1516) (accg45 1517) (accg46 1518) (accg47 1519)
-+; (accg48 1520) (accg49 1521) (accg50 1522) (accg51 1523)
-+; (accg52 1524) (accg53 1525) (accg54 1526) (accg55 1527)
-+; (accg56 1528) (accg57 1529) (accg58 1530) (accg59 1531)
-+; (accg60 1532) (accg61 1533) (accg62 1534) (accg63 1535)
-+
-+ (ear0 1536) (ear1 1537) (ear2 1538) (ear3 1539)
-+ (ear4 1540) (ear5 1541) (ear6 1542) (ear7 1543)
-+ (ear8 1544) (ear9 1545) (ear10 1546) (ear11 1547)
-+ (ear12 1548) (ear13 1549) (ear14 1550) (ear15 1551)
-+ (ear16 1552) (ear17 1553) (ear18 1554) (ear19 1555)
-+ (ear20 1556) (ear21 1557) (ear22 1558) (ear23 1559)
-+ (ear24 1560) (ear25 1561) (ear26 1562) (ear27 1563)
-+ (ear28 1564) (ear29 1565) (ear30 1566) (ear31 1567)
-+ (ear32 1568) (ear33 1569) (ear34 1570) (ear35 1571)
-+ (ear36 1572) (ear37 1573) (ear38 1574) (ear39 1575)
-+ (ear40 1576) (ear41 1577) (ear42 1578) (ear43 1579)
-+ (ear44 1580) (ear45 1581) (ear46 1582) (ear47 1583)
-+ (ear48 1584) (ear49 1585) (ear50 1586) (ear51 1587)
-+ (ear52 1588) (ear53 1589) (ear54 1590) (ear55 1591)
-+ (ear56 1592) (ear57 1593) (ear58 1594) (ear59 1595)
-+ (ear60 1596) (ear61 1597) (ear62 1598) (ear63 1599)
-+
-+ (edr0 1600) (edr1 1601) (edr2 1602) (edr3 1603)
-+ (edr4 1604) (edr5 1605) (edr6 1606) (edr7 1607)
-+ (edr8 1608) (edr9 1609) (edr10 1610) (edr11 1611)
-+ (edr12 1612) (edr13 1613) (edr14 1614) (edr15 1615)
-+ (edr16 1616) (edr17 1617) (edr18 1618) (edr19 1619)
-+ (edr20 1620) (edr21 1621) (edr22 1622) (edr23 1623)
-+ (edr24 1624) (edr25 1625) (edr26 1626) (edr27 1627)
-+ (edr28 1628) (edr29 1629) (edr30 1630) (edr31 1631)
-+ (edr32 1632) (edr33 1636) (edr34 1634) (edr35 1635)
-+ (edr36 1636) (edr37 1637) (edr38 1638) (edr39 1639)
-+ (edr40 1640) (edr41 1641) (edr42 1642) (edr43 1643)
-+ (edr44 1644) (edr45 1645) (edr46 1646) (edr47 1647)
-+ (edr48 1648) (edr49 1649) (edr50 1650) (edr51 1651)
-+ (edr52 1652) (edr53 1653) (edr54 1654) (edr55 1655)
-+ (edr56 1656) (edr57 1657) (edr58 1658) (edr59 1659)
-+ (edr60 1660) (edr61 1661) (edr62 1662) (edr63 1663)
-+
-+ (iamlr0 1664) (iamlr1 1665) (iamlr2 1666) (iamlr3 1667)
-+ (iamlr4 1668) (iamlr5 1669) (iamlr6 1670) (iamlr7 1671)
-+ (iamlr8 1672) (iamlr9 1673) (iamlr10 1674) (iamlr11 1675)
-+ (iamlr12 1676) (iamlr13 1677) (iamlr14 1678) (iamlr15 1679)
-+ (iamlr16 1680) (iamlr17 1681) (iamlr18 1682) (iamlr19 1683)
-+ (iamlr20 1684) (iamlr21 1685) (iamlr22 1686) (iamlr23 1687)
-+ (iamlr24 1688) (iamlr25 1689) (iamlr26 1690) (iamlr27 1691)
-+ (iamlr28 1692) (iamlr29 1693) (iamlr30 1694) (iamlr31 1695)
-+ (iamlr32 1696) (iamlr33 1697) (iamlr34 1698) (iamlr35 1699)
-+ (iamlr36 1700) (iamlr37 1701) (iamlr38 1702) (iamlr39 1703)
-+ (iamlr40 1704) (iamlr41 1705) (iamlr42 1706) (iamlr43 1707)
-+ (iamlr44 1708) (iamlr45 1709) (iamlr46 1710) (iamlr47 1711)
-+ (iamlr48 1712) (iamlr49 1713) (iamlr50 1714) (iamlr51 1715)
-+ (iamlr52 1716) (iamlr53 1717) (iamlr54 1718) (iamlr55 1719)
-+ (iamlr56 1720) (iamlr57 1721) (iamlr58 1722) (iamlr59 1723)
-+ (iamlr60 1724) (iamlr61 1725) (iamlr62 1726) (iamlr63 1727)
-+
-+ (iampr0 1728) (iampr1 1729) (iampr2 1730) (iampr3 1731)
-+ (iampr4 1732) (iampr5 1733) (iampr6 1734) (iampr7 1735)
-+ (iampr8 1736) (iampr9 1737) (iampr10 1738) (iampr11 1739)
-+ (iampr12 1740) (iampr13 1741) (iampr14 1742) (iampr15 1743)
-+ (iampr16 1744) (iampr17 1745) (iampr18 1746) (iampr19 1747)
-+ (iampr20 1748) (iampr21 1749) (iampr22 1750) (iampr23 1751)
-+ (iampr24 1752) (iampr25 1753) (iampr26 1754) (iampr27 1755)
-+ (iampr28 1756) (iampr29 1757) (iampr30 1758) (iampr31 1759)
-+ (iampr32 1760) (iampr33 1761) (iampr34 1762) (iampr35 1763)
-+ (iampr36 1764) (iampr37 1765) (iampr38 1766) (iampr39 1767)
-+ (iampr40 1768) (iampr41 1769) (iampr42 1770) (iampr43 1771)
-+ (iampr44 1772) (iampr45 1773) (iampr46 1774) (iampr47 1775)
-+ (iampr48 1776) (iampr49 1777) (iampr50 1778) (iampr51 1779)
-+ (iampr52 1780) (iampr53 1781) (iampr54 1782) (iampr55 1783)
-+ (iampr56 1784) (iampr57 1785) (iampr58 1786) (iampr59 1787)
-+ (iampr60 1788) (iampr61 1789) (iampr62 1790) (iampr63 1791)
-+
-+ (damlr0 1792) (damlr1 1793) (damlr2 1794) (damlr3 1795)
-+ (damlr4 1796) (damlr5 1797) (damlr6 1798) (damlr7 1799)
-+ (damlr8 1800) (damlr9 1801) (damlr10 1802) (damlr11 1803)
-+ (damlr12 1804) (damlr13 1805) (damlr14 1806) (damlr15 1807)
-+ (damlr16 1808) (damlr17 1809) (damlr18 1810) (damlr19 1811)
-+ (damlr20 1812) (damlr21 1813) (damlr22 1814) (damlr23 1815)
-+ (damlr24 1816) (damlr25 1817) (damlr26 1818) (damlr27 1819)
-+ (damlr28 1820) (damlr29 1821) (damlr30 1822) (damlr31 1823)
-+ (damlr32 1824) (damlr33 1825) (damlr34 1826) (damlr35 1827)
-+ (damlr36 1828) (damlr37 1829) (damlr38 1830) (damlr39 1831)
-+ (damlr40 1832) (damlr41 1833) (damlr42 1834) (damlr43 1835)
-+ (damlr44 1836) (damlr45 1837) (damlr46 1838) (damlr47 1839)
-+ (damlr48 1840) (damlr49 1841) (damlr50 1842) (damlr51 1843)
-+ (damlr52 1844) (damlr53 1845) (damlr54 1846) (damlr55 1847)
-+ (damlr56 1848) (damlr57 1849) (damlr58 1850) (damlr59 1851)
-+ (damlr60 1852) (damlr61 1853) (damlr62 1854) (damlr63 1855)
-+
-+ (dampr0 1856) (dampr1 1857) (dampr2 1858) (dampr3 1859)
-+ (dampr4 1860) (dampr5 1861) (dampr6 1862) (dampr7 1863)
-+ (dampr8 1864) (dampr9 1865) (dampr10 1866) (dampr11 1867)
-+ (dampr12 1868) (dampr13 1869) (dampr14 1870) (dampr15 1871)
-+ (dampr16 1872) (dampr17 1873) (dampr18 1874) (dampr19 1875)
-+ (dampr20 1876) (dampr21 1877) (dampr22 1878) (dampr23 1879)
-+ (dampr24 1880) (dampr25 1881) (dampr26 1882) (dampr27 1883)
-+ (dampr28 1884) (dampr29 1885) (dampr30 1886) (dampr31 1887)
-+ (dampr32 1888) (dampr33 1889) (dampr34 1890) (dampr35 1891)
-+ (dampr36 1892) (dampr37 1893) (dampr38 1894) (dampr39 1895)
-+ (dampr40 1896) (dampr41 1897) (dampr42 1898) (dampr43 1899)
-+ (dampr44 1900) (dampr45 1901) (dampr46 1902) (dampr47 1903)
-+ (dampr48 1904) (dampr49 1905) (dampr50 1906) (dampr51 1907)
-+ (dampr52 1908) (dampr53 1909) (dampr54 1910) (dampr55 1911)
-+ (dampr56 1912) (dampr57 1913) (dampr58 1914) (dampr59 1915)
-+ (dampr60 1916) (dampr61 1917) (dampr62 1918) (dampr63 1919)
-+
-+ (amcr 1920) (stbar 1921) (mmcr 1922)
-+ (iamvr1 1925) (damvr1 1927)
-+ (cxnr 1936) (ttbr 1937) (tplr 1938) (tppr 1939)
-+ (tpxr 1940)
-+ (timerh 1952) (timerl 1953) (timerd 1954)
-+ (dcr 2048) (brr 2049) (nmar 2050) (btbr 2051)
-+
-+ (ibar0 2052) (ibar1 2053) (ibar2 2054) (ibar3 2055)
-+ (dbar0 2056) (dbar1 2057) (dbar2 2058) (dbar3 2059)
-+
-+ (dbdr00 2060) (dbdr01 2061) (dbdr02 2062) (dbdr03 2063)
-+ (dbdr10 2064) (dbdr11 2065) (dbdr12 2066) (dbdr13 2067)
-+ (dbdr20 2068) (dbdr21 2069) (dbdr22 2070) (dbdr23 2071)
-+ (dbdr30 2072) (dbdr31 2073) (dbdr32 2074) (dbdr33 2075)
-+
-+ (dbmr00 2076) (dbmr01 2077) (dbmr02 2078) (dbmr03 2079)
-+ (dbmr10 2080) (dbmr11 2081) (dbmr12 2082) (dbmr13 2083)
-+ (dbmr20 2084) (dbmr21 2085) (dbmr22 2086) (dbmr23 2087)
-+ (dbmr30 2088) (dbmr31 2089) (dbmr32 2090) (dbmr33 2091)
-+
-+ (cpcfr 2092) (cpcr 2093) (cpsr 2094)
-+
-+ (cpesr0 2096) (cpesr1 2097)
-+ (cpemr0 2098) (cpemr1 2099)
-+
-+ (ihsr8 3848)
-+ )
-+)
-+
-+(define-hardware
-+ (name h-spr)
-+ (comment "special purpose registers")
-+ (attrs PROFILE)
-+ (type register UWI (4096))
-+ (indices extern-keyword spr-names)
-+ (get (index) (c-call UWI "@cpu@_h_spr_get_handler" index))
-+ (set (index newval) (c-call VOID "@cpu@_h_spr_set_handler" index newval))
-+)
-+
-+(define-pmacro (spr-pcsr) (reg h-spr 1))
-+(define-pmacro (spr-bpcsr) (reg h-spr 2))
-+(define-pmacro (spr-lr) (reg h-spr 272))
-+(define-pmacro (spr-lcr) (reg h-spr 273))
-+(define-pmacro (spr-iacc0h) (reg h-spr 280))
-+(define-pmacro (spr-iacc0l) (reg h-spr 281))
-+(define-pmacro (spr-sr0) (reg h-spr 768))
-+(define-pmacro (spr-sr1) (reg h-spr 769))
-+(define-pmacro (spr-sr2) (reg h-spr 770))
-+(define-pmacro (spr-sr3) (reg h-spr 771))
-+
-+; Accumulator guard. Actually a subset of the SPR registers, but those SPRs
-+; are read-only in most insns. This hardware element is used by those insns
-+; which have direct access (mwtaccg, mrdaccg).
-+(define-keyword
-+ (name accg-names)
-+ (print-name h-accg)
-+ (prefix "")
-+ (values
-+ (accg0 0)(accg1 1)(accg2 2)(accg3 3)
-+ (accg4 4)(accg5 5)(accg6 6)(accg7 7)
-+ (accg8 8)(accg9 9)(accg10 10)(accg11 11)
-+ (accg12 12)(accg13 13)(accg14 14)(accg15 15)
-+ (accg16 16)(accg17 17)(accg18 18)(accg19 19)
-+ (accg20 20)(accg21 21)(accg22 22)(accg23 23)
-+ (accg24 24)(accg25 25)(accg26 26)(accg27 27)
-+ (accg28 28)(accg29 29)(accg30 30)(accg31 31)
-+ (accg32 32)(accg33 33)(accg34 34)(accg35 35)
-+ (accg36 36)(accg37 37)(accg38 38)(accg39 39)
-+ (accg40 40)(accg41 41)(accg42 42)(accg43 43)
-+ (accg44 44)(accg45 45)(accg46 46)(accg47 47)
-+ (accg48 48)(accg49 49)(accg50 50)(accg51 51)
-+ (accg52 52)(accg53 53)(accg54 54)(accg55 55)
-+ (accg56 56)(accg57 57)(accg58 58)(accg59 59)
-+ (accg60 60)(accg61 61)(accg62 62)(accg63 63)
-+ )
-+)
-+
-+(define-hardware
-+ (name h-accg)
-+ (comment "accumulator guard")
-+ (attrs PROFILE VIRTUAL)
-+ (type register UWI (64))
-+ (indices extern-keyword accg-names)
-+ (get (index)
-+ (and (reg h-spr (add index 1472)) #xff))
-+ (set (index newval)
-+ (set (raw-reg UWI h-spr (add index 1472)) (and newval #xff)))
-+)
-+
-+; 40 bit accumulator. Composed of ACCG and ACC registers concatenated, but
-+; referenced more often as the composed 40 bits.
-+(define-keyword
-+ (name acc-names)
-+ (print-name h-acc40)
-+ (prefix "")
-+ (values
-+(acc0 0)(acc1 1)(acc2 2)(acc3 3)(acc4 4)(acc5 5)(acc6 6)(acc7 7)
-+(acc8 8)(acc9 9)(acc10 10)(acc11 11)(acc12 12)(acc13 13)(acc14 14)(acc15 15)
-+(acc16 16)(acc17 17)(acc18 18)(acc19 19)(acc20 20)(acc21 21)(acc22 22)(acc23 23)
-+(acc24 24)(acc25 25)(acc26 26)(acc27 27)(acc28 28)(acc29 29)(acc30 30)(acc31 31)
-+(acc32 32)(acc33 33)(acc34 34)(acc35 35)(acc36 36)(acc37 37)(acc38 38)(acc39 39)
-+(acc40 40)(acc41 41)(acc42 42)(acc43 43)(acc44 44)(acc45 45)(acc46 46)(acc47 47)
-+(acc48 48)(acc49 49)(acc50 50)(acc51 51)(acc52 52)(acc53 53)(acc54 54)(acc55 55)
-+(acc56 56)(acc57 57)(acc58 58)(acc59 59)(acc60 60)(acc61 61)(acc62 62)(acc63 63)
-+ )
-+)
-+
-+(define-hardware
-+ (name h-acc40S)
-+ (comment "40 bit signed accumulator")
-+ (attrs PROFILE VIRTUAL)
-+ (type register DI (64))
-+ (indices extern-keyword acc-names)
-+ ; The accumlator is made up of two 32 bit registers, accgi/acci.
-+ ; We want to extract this as a combined 40 signed bits
-+ (get (index)
-+ (or DI
-+ (sll DI (ext DI (trunc QI (reg h-spr (add index 1472))))
-+ 32)
-+ (zext DI (reg h-spr (add index 1408)))))
-+ ; Bits 40-63 are not written. raw-reg is used to bypass read-only restrictions
-+ ; on ACC and ACCG registers
-+ (set (index newval)
-+ (sequence ()
-+ (c-call VOID "frv_check_spr_write_access" (add index 1408))
-+ (set (raw-reg UWI h-spr
-+ (add index 1472)) (and (srl newval 32) #xff))
-+ (set (raw-reg UWI h-spr
-+ (add index 1408)) (trunc USI newval))))
-+)
-+
-+(define-hardware
-+ (name h-acc40U)
-+ (comment "40 bit unsigned accumulator")
-+ (attrs PROFILE VIRTUAL)
-+ (type register UDI (64))
-+ (indices extern-keyword acc-names)
-+ ; The accumlator is made up of two 32 bit registers, accgi/acci.
-+ ; We want to extract this as a combined 40 unsigned bits
-+ (get (index)
-+ (or DI
-+ (sll DI (zext DI (reg h-spr (add index 1472))) 32)
-+ (zext DI (reg h-spr (add index 1408)))))
-+ ; Bits 40-63 are not written. raw-reg is used to bypass read-only restrictions
-+ ; on ACC and ACCG registers
-+ (set (index newval)
-+ (sequence ()
-+ (c-call VOID "frv_check_spr_write_access" (add index 1408))
-+ (set (raw-reg UWI h-spr
-+ (add index 1472)) (and (srl newval 32) #xff))
-+ (set (raw-reg UWI h-spr
-+ (add index 1408)) (trunc USI newval))))
-+)
-+; 64-bit signed accumulator. Composed of iacc0h and iacc0l registers
-+; concatenated, but referenced more often as the composed 64 bits.
-+(define-keyword
-+ ; This is totally hokey -- I have to have an index!
-+ (name iacc0-names)
-+ (print-name h-iacc0)
-+ (prefix "")
-+ (values (iacc0 0))
-+)
-+
-+(define-hardware
-+ (name h-iacc0)
-+ (comment "64 bit signed accumulator")
-+ (attrs PROFILE VIRTUAL (MACH fr400,fr450))
-+ (type register DI (1))
-+ (indices extern-keyword iacc0-names)
-+ ; The single 64-bit integer accumulator is made up of two 32 bit
-+ ; registers, iacc0h and iacc0l. We want to extract this as a
-+ ; combined 64 signed bits.
-+ (get (idx) (or DI (sll DI (ext DI (spr-iacc0h)) 32) (zext DI (spr-iacc0l))))
-+ (set (idx newval)
-+ (sequence ()
-+ (set (spr-iacc0h) (trunc SI (srl newval 32)))
-+ (set (spr-iacc0l) (trunc SI newval))))
-+)
-+
-+; Integer condition code registers (CCR)
-+;
-+; The individual sub registers bits of the CCR are referenced more often than
-+; the entire register so set them directly. We can assemble the
-+; entire register when necessary.
-+;
-+(define-keyword
-+ (name iccr-names)
-+ (print-name h-iccr)
-+ (prefix "")
-+ (values (icc0 0) (icc1 1) (icc2 2) (icc3 3))
-+)
-+
-+(define-hardware
-+ (name h-iccr)
-+ (comment "Integer condition code registers")
-+ (attrs PROFILE)
-+ (type register UQI (4))
-+ (indices extern-keyword iccr-names)
-+)
-+
-+; Floating point condition code registers (CCR)
-+;
-+; The individual sub registers bits of the CCR are referenced more often than
-+; the entire register so set them directly. We can assemble the
-+; entire register when necessary.
-+;
-+(define-keyword
-+ (name fccr-names)
-+ (print-name h-fccr)
-+ (prefix "")
-+ (values (fcc0 0) (fcc1 1) (fcc2 2) (fcc3 3))
-+)
-+
-+(define-hardware
-+ (name h-fccr)
-+ (comment "Floating point condition code registers")
-+ (attrs PROFILE)
-+ (type register UQI (4))
-+ (indices extern-keyword fccr-names)
-+)
-+
-+; C condition code registers (CCCR)
-+;
-+(define-keyword
-+ (name cccr-names)
-+ (print-name h-cccr)
-+ (prefix "")
-+ (values (cc0 0) (cc1 1) (cc2 2) (cc3 3) (cc4 4) (cc5 5) (cc6 6) (cc7 7))
-+)
-+
-+(define-hardware
-+ (name h-cccr)
-+ (comment "Condition code registers")
-+ (attrs PROFILE)
-+ (type register UQI (8))
-+ (indices extern-keyword cccr-names)
-+)
-+
-+; Dummy hardware used to define packing bit on insns
-+;
-+(define-hardware
-+ (name h-pack)
-+ (comment "Packing bit dummy hardware")
-+ (type immediate (UINT 1))
-+ (values keyword "" (("" 1) (".p" 0) (".P" 0)))
-+)
-+; Dummy hardware used to define hint field for branches always taken
-+;
-+(define-hardware
-+ (name h-hint-taken)
-+ (comment "Branch taken hint dummy hardware")
-+ (type immediate (UINT 1))
-+ ; The order of these is important. We want '2' to get written by default,
-+ ; but we also want the docoder/disassembler to allow the values '0', '1' and
-+ ; '3'.
-+ (values keyword "" (("" 2) ("" 0) ("" 1) ("" 3)))
-+)
-+; Dummy hardware used to define hint field for branches never taken
-+;
-+(define-hardware
-+ (name h-hint-not-taken)
-+ (comment "Branch not taken hint dummy hardware")
-+ (type immediate (UINT 1))
-+ ; The order of these is important. We want '0' to get written by default,
-+ ; but we also want the docoder/disassembler to allow the values '1', '2' and
-+ ; '3'.
-+ (values keyword "" (("" 0) ("" 1) ("" 2) ("" 3)))
-+)
-+
-+; Instruction Operands.
-+; These entries provide a layer between the assembler and the raw hardware
-+; description, and are used to refer to hardware elements in the semantic
-+; code. Usually there's a bit of over-specification, but in more complicated
-+; instruction sets there isn't.
-+
-+; FRV specific operand attributes:
-+
-+(define-attr
-+ (for operand)
-+ (type boolean)
-+ (name HASH-PREFIX)
-+ (comment "immediates have an optional '#' prefix")
-+)
-+
-+; ??? Convention says this should be o-sr, but then the insn definitions
-+; should refer to o-sr which is clumsy. The "o-" could be implicit, but
-+; then it should be implicit for all the symbols here, but then there would
-+; be confusion between (f-)simm8 and (h-)simm8.
-+; So for now the rule is exactly as it appears here.
-+
-+; dnmop: define-normal-mode-operand: temporary, pending potential removal
-+; of modes from h/w.
-+(define-pmacro (dnmop xname xcomment xattrs xtype xindex xmode)
-+ (define-operand
-+ (name xname)
-+ (comment xcomment)
-+ (.splice attrs (.unsplice xattrs))
-+ (type xtype)
-+ (index xindex)
-+ (mode xmode)
-+ )
-+)
-+
-+; dnpmop: define-normal-parsed-mode-operand: Normal mode operand with parse handler
-+(define-pmacro (dnpmop xname xcomment xattrs xtype xindex xmode xparse)
-+ (define-operand
-+ (name xname)
-+ (comment xcomment)
-+ (.splice attrs (.unsplice xattrs))
-+ (type xtype)
-+ (index xindex)
-+ (mode xmode)
-+ (handlers (parse xparse))
-+ )
-+)
-+
-+(dnop pack "packing bit" () h-pack f-pack)
-+
-+(dnmop GRi "source register 1" () h-gr f-GRi SI)
-+(dnmop GRj "source register 2" () h-gr f-GRj SI)
-+(dnmop GRk "destination register" () h-gr f-GRk SI)
-+(dnmop GRkhi "destination register" () h-gr_hi f-GRk UHI)
-+(dnmop GRklo "destination register" () h-gr_lo f-GRk UHI)
-+(dnpmop GRdoublek "destination register" () h-gr_double f-GRk DI "even_register")
-+(dnmop ACC40Si "signed accumulator" () h-acc40S f-ACC40Si DI)
-+(dnmop ACC40Ui "unsigned accumulator" () h-acc40U f-ACC40Ui UDI)
-+(dnmop ACC40Sk "target accumulator" () h-acc40S f-ACC40Sk DI)
-+(dnmop ACC40Uk "target accumulator" () h-acc40U f-ACC40Uk UDI)
-+(dnmop ACCGi "source register" () h-accg f-ACCGi UWI)
-+(dnmop ACCGk "target register" () h-accg f-ACCGk UWI)
-+
-+(dnmop CPRi "source register" ((MACH frv)) h-cpr f-CPRi SI)
-+(dnmop CPRj "source register" ((MACH frv)) h-cpr f-CPRj SI)
-+(dnmop CPRk "destination register" ((MACH frv)) h-cpr f-CPRk SI)
-+(dnpmop CPRdoublek "destination register" ((MACH frv)) h-cpr_double f-CPRk DI "even_register")
-+
-+; floating point operands
-+(dnmop FRinti "source register 1" () h-fr_int f-FRi SI)
-+(dnmop FRintj "source register 2" () h-fr_int f-FRj SI)
-+(dnmop FRintk "target register" () h-fr_int f-FRk SI)
-+(dnmop FRi "source register 1" () h-fr f-FRi SF)
-+(dnmop FRj "source register 2" () h-fr f-FRj SF)
-+(dnmop FRk "destination register" () h-fr f-FRk SF)
-+(dnmop FRkhi "destination register" () h-fr_hi f-FRk UHI)
-+(dnmop FRklo "destination register" () h-fr_lo f-FRk UHI)
-+(dnpmop FRdoublei "source register 1" () h-fr_double f-FRi DF "even_register")
-+(dnpmop FRdoublej "source register 2" () h-fr_double f-FRj DF "even_register")
-+(dnpmop FRdoublek "target register" () h-fr_double f-FRk DF "even_register")
-+
-+(dnop CRi "source register 1" () h-cccr f-CRi)
-+(dnop CRj "source register 2" () h-cccr f-CRj)
-+(dnop CRj_int "destination register" () h-cccr f-CRj_int)
-+(dnop CRj_float "destination register" () h-cccr f-CRj_float)
-+(dnop CRk "destination register" () h-cccr f-CRk)
-+(dnop CCi "condition register" () h-cccr f-CCi)
-+
-+(dnop ICCi_1 "condition register" () h-iccr f-ICCi_1)
-+(dnop ICCi_2 "condition register" () h-iccr f-ICCi_2)
-+(dnop ICCi_3 "condition register" () h-iccr f-ICCi_3)
-+(dnop FCCi_1 "condition register" () h-fccr f-FCCi_1)
-+(dnop FCCi_2 "condition register" () h-fccr f-FCCi_2)
-+(dnop FCCi_3 "condition register" () h-fccr f-FCCi_3)
-+(dnop FCCk "condition register" () h-fccr f-FCCk)
-+
-+(dnop eir "exception insn reg" () h-uint f-eir)
-+(dnop s10 "10 bit signed immediate" (HASH-PREFIX) h-sint f-s10)
-+(dnop u16 "16 bit unsigned immediate" (HASH-PREFIX) h-uint f-u16)
-+(dnop s16 "16 bit signed immediate" (HASH-PREFIX) h-sint f-s16)
-+(dnop s6 "6 bit signed immediate" (HASH-PREFIX) h-sint f-s6)
-+(dnop s6_1 "6 bit signed immediate" (HASH-PREFIX) h-sint f-s6_1)
-+(dnop u6 "6 bit unsigned immediate" (HASH-PREFIX) h-uint f-u6)
-+(dnop s5 "5 bit signed immediate" (HASH-PREFIX) h-sint f-s5)
-+(dnop cond "conditional arithmetic" (HASH-PREFIX) h-uint f-cond)
-+(dnop ccond "lr branch condition" (HASH-PREFIX) h-uint f-ccond)
-+(dnop hint "2 bit branch predictor" (HASH-PREFIX) h-uint f-hint)
-+(dnop hint_taken "2 bit branch predictor" () h-hint-taken f-hint)
-+(dnop hint_not_taken "2 bit branch predictor" () h-hint-not-taken f-hint)
-+
-+(dnop LI "link indicator" () h-uint f-LI)
-+(dnop lock "cache lock indicator" (HASH-PREFIX) h-uint f-lock)
-+(dnop debug "debug mode indicator" (HASH-PREFIX) h-uint f-debug)
-+(dnop ae "all entries indicator" (HASH-PREFIX) h-uint f-ae)
-+
-+(dnop label16 "18 bit pc relative address" () h-iaddr f-label16)
-+
-+(dnop LRAE "Load Real Address E flag" () h-uint f-LRAE)
-+(dnop LRAD "Load Real Address D flag" () h-uint f-LRAD)
-+(dnop LRAS "Load Real Address S flag" () h-uint f-LRAS)
-+
-+(dnop TLBPRopx "TLB Probe operation number" () h-uint f-TLBPRopx)
-+(dnop TLBPRL "TLB Probe L flag" () h-uint f-TLBPRL)
-+
-+(define-operand
-+ (name A0)
-+ (comment "A==0 operand of mclracc")
-+ (attrs)
-+ (type h-uint)
-+ (index f-A)
-+ (mode USI)
-+ (handlers (parse "A0"))
-+)
-+
-+(define-operand
-+ (name A1)
-+ (comment "A==1 operand of mclracc")
-+ (attrs)
-+ (type h-uint)
-+ (index f-A)
-+ (mode USI)
-+ (handlers (parse "A1"))
-+)
-+
-+(define-operand
-+ (name FRintieven)
-+ (comment "(even) source register 1")
-+ (attrs)
-+ (type h-fr_int)
-+ (index f-FRi)
-+ (mode SI)
-+ (handlers (parse "even_register"))
-+)
-+
-+(define-operand
-+ (name FRintjeven)
-+ (comment "(even) source register 2")
-+ (attrs)
-+ (type h-fr_int)
-+ (index f-FRj)
-+ (mode SI)
-+ (handlers (parse "even_register"))
-+)
-+
-+(define-operand
-+ (name FRintkeven)
-+ (comment "(even) target register")
-+ (attrs)
-+ (type h-fr_int)
-+ (index f-FRk)
-+ (mode SI)
-+ (handlers (parse "even_register"))
-+)
-+
-+(define-operand
-+ (name d12)
-+ (comment "12 bit signed immediate")
-+ (attrs)
-+ (type h-sint)
-+ (index f-d12)
-+ (handlers (parse "d12"))
-+)
-+
-+(define-operand
-+ (name s12)
-+ (comment "12 bit signed immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-sint)
-+ (index f-d12)
-+ (handlers (parse "s12"))
-+)
-+
-+(define-operand
-+ (name u12)
-+ (comment "12 bit signed immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-sint)
-+ (index f-u12)
-+ (handlers (parse "u12"))
-+)
-+
-+(define-operand
-+ (name spr)
-+ (comment "special purpose register")
-+ (attrs)
-+ (type h-spr)
-+ (index f-spr)
-+ (handlers (parse "spr") (print "spr"))
-+)
-+
-+(define-operand
-+ (name ulo16)
-+ (comment "16 bit unsigned immediate, for #lo()")
-+ (attrs)
-+ (type h-uint)
-+ (index f-u16)
-+ (handlers (parse "ulo16") (print "lo"))
-+)
-+
-+(define-operand
-+ (name slo16)
-+ (comment "16 bit unsigned immediate, for #lo()")
-+ (attrs)
-+ (type h-sint)
-+ (index f-s16)
-+ (handlers (parse "uslo16") (print "lo"))
-+)
-+
-+(define-operand
-+ (name uhi16)
-+ (comment "16 bit unsigned immediate, for #hi()")
-+ (attrs)
-+ (type h-uint)
-+ (index f-u16)
-+ (handlers (parse "uhi16") (print "hi"))
-+)
-+
-+(define-operand
-+ (name label24)
-+ (comment "26 bit pc relative address")
-+ (attrs)
-+ (type h-iaddr)
-+ (index f-label24)
-+ (mode SI)
-+ (handlers (parse "call_label"))
-+)
-+
-+; operands representing hardware
-+;
-+(dnop psr_esr "PSR.ESR bit" (SEM-ONLY) h-psr_esr f-nil)
-+(dnop psr_s "PSR.S bit" (SEM-ONLY) h-psr_s f-nil)
-+(dnop psr_ps "PSR.PS bit" (SEM-ONLY) h-psr_ps f-nil)
-+(dnop psr_et "PSR.ET bit" (SEM-ONLY) h-psr_et f-nil)
-+
-+(dnop bpsr_bs "BPSR.BS bit" (SEM-ONLY) h-bpsr_bs f-nil)
-+(dnop bpsr_bet "BPSR.BET bit" (SEM-ONLY) h-bpsr_bet f-nil)
-+
-+(dnop tbr_tba "TBR.TBA" (SEM-ONLY) h-tbr_tba f-nil)
-+(dnop tbr_tt "TBR.TT" (SEM-ONLY) h-tbr_tt f-nil)
-+
-+; Null operands
-+;
-+(define-pmacro (ICCi_1-null) (f-ICCi_1-null 0))
-+(define-pmacro (ICCi_2-null) (f-ICCi_2-null 0))
-+(define-pmacro (ICCi_3-null) (f-ICCi_3-null 0))
-+(define-pmacro (FCCi_1-null) (f-FCCi_1-null 0))
-+(define-pmacro (FCCi_2-null) (f-FCCi_2-null 0))
-+(define-pmacro (FCCi_3-null) (f-FCCi_3-null 0))
-+(define-pmacro (rs-null) (f-rs-null 0))
-+(define-pmacro (GRi-null) (f-GRi-null 0))
-+(define-pmacro (GRj-null) (f-GRj-null 0))
-+(define-pmacro (GRk-null) (f-GRk-null 0))
-+(define-pmacro (FRi-null) (f-FRi-null 0))
-+(define-pmacro (FRj-null) (f-FRj-null 0))
-+(define-pmacro (ACCj-null) (f-ACCj-null 0))
-+(define-pmacro (rd-null) (f-rd-null 0))
-+(define-pmacro (cond-null) (f-cond-null 0))
-+(define-pmacro (ccond-null) (f-ccond-null 0))
-+(define-pmacro (s12-null) (f-s12-null 0))
-+(define-pmacro (label16-null) (f-label16-null 0))
-+(define-pmacro (misc-null-1) (f-misc-null-1 0))
-+(define-pmacro (misc-null-2) (f-misc-null-2 0))
-+(define-pmacro (misc-null-3) (f-misc-null-3 0))
-+(define-pmacro (misc-null-4) (f-misc-null-4 0))
-+(define-pmacro (misc-null-5) (f-misc-null-5 0))
-+(define-pmacro (misc-null-6) (f-misc-null-6 0))
-+(define-pmacro (misc-null-7) (f-misc-null-7 0))
-+(define-pmacro (misc-null-8) (f-misc-null-8 0))
-+(define-pmacro (misc-null-9) (f-misc-null-9 0))
-+(define-pmacro (misc-null-10) (f-misc-null-10 0))
-+(define-pmacro (misc-null-11) (f-misc-null-11 0))
-+
-+(define-pmacro (LRA-null) (f-LRA-null 0))
-+(define-pmacro (TLBPR-null) (f-TLBPR-null 0))
-+
-+(define-pmacro (LI-on) (f-LI-on 1))
-+(define-pmacro (LI-off) (f-LI-off 0))
-+
-+; Instruction definitions.
-+;
-+; Notes:
-+; - dni is short for "define-normal-instruction"
-+; - Macros are used to represent each insn format. These should be used as much
-+; as possible unless an insn has exceptional behaviour
-+;
-+
-+; Commonly used Macros
-+;
-+; Specific registers
-+;
-+
-+; Integer condition code manipulation
-+;
-+(define-pmacro (set-z-and-n icc x)
-+ (if (eq x 0)
-+ (set icc (or (and icc #x7) #x4))
-+ (if (lt x 0)
-+ (set icc (or (and icc #xb) #x8))
-+ (set icc (and icc #x3))))
-+)
-+
-+(define-pmacro (set-n icc val)
-+ (if (eq val 0)
-+ (set icc (and icc #x7))
-+ (set icc (or icc #x8)))
-+)
-+
-+(define-pmacro (set-z icc val)
-+ (if (eq val 0)
-+ (set icc (and icc #xb))
-+ (set icc (or icc #x4)))
-+)
-+
-+(define-pmacro (set-v icc val)
-+ (if (eq val 0)
-+ (set icc (and icc #xd))
-+ (set icc (or icc #x2)))
-+)
-+
-+(define-pmacro (set-c icc val)
-+ (if (eq val 0)
-+ (set icc (and icc #xe))
-+ (set icc (or icc #x1)))
-+)
-+
-+(define-pmacro (nbit icc)
-+ (trunc BI (srl (and icc #x8) 3))
-+)
-+
-+(define-pmacro (zbit icc)
-+ (trunc BI (srl (and icc #x4) 2))
-+)
-+
-+(define-pmacro (vbit icc)
-+ (trunc BI (srl (and icc #x2) 1))
-+)
-+
-+(define-pmacro (cbit icc)
-+ (trunc BI (and icc #x1))
-+)
-+
-+(define-pmacro (ebit icc)
-+ (trunc BI (srl (and icc #x8) 3))
-+)
-+
-+(define-pmacro (lbit icc)
-+ (trunc BI (srl (and icc #x4) 2))
-+)
-+
-+(define-pmacro (gbit icc)
-+ (trunc BI (srl (and icc #x2) 1))
-+)
-+
-+(define-pmacro (ubit icc)
-+ (trunc BI (and icc #x1))
-+)
-+
-+; FRV insns
-+;
-+;
-+; Format: INT, Logic, Shift r-r
-+;
-+(define-pmacro (int-logic-r-r name operation op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ (.str name "$pack $GRi,$GRj,$GRk")
-+ (+ pack GRk op GRi (ICCi_1-null) ope GRj)
-+ (set GRk (operation GRi GRj))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(int-logic-r-r add add OP_00 OPE2_00 "add reg/reg")
-+(int-logic-r-r sub sub OP_00 OPE2_04 "sub reg/reg")
-+(int-logic-r-r and and OP_01 OPE2_00 "and reg/reg")
-+(int-logic-r-r or or OP_01 OPE2_02 "or reg/reg")
-+(int-logic-r-r xor xor OP_01 OPE2_04 "xor reg/reg")
-+
-+(dni not
-+ ("not")
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ ("not$pack $GRj,$GRk")
-+ (+ pack GRk OP_01 (rs-null) (ICCi_1-null) OPE2_06 GRj)
-+ (set GRk (inv GRj))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+)
-+
-+(dni sdiv
-+ "signed division"
-+ ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ "sdiv$pack $GRi,$GRj,$GRk"
-+ (+ pack GRk OP_00 GRi (ICCi_1-null) OPE2_0E GRj)
-+ (sequence ()
-+ (c-call VOID "@cpu@_signed_integer_divide"
-+ GRi GRj (index-of GRk) 0)
-+ (clobber GRk))
-+ ((fr400 (unit u-idiv)) (fr450 (unit u-idiv))
-+ (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
-+)
-+
-+(dni nsdiv
-+ "non excepting signed division"
-+ ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING
-+ (MACH simple,tomcat,fr500,fr550,frv))
-+ "nsdiv$pack $GRi,$GRj,$GRk"
-+ (+ pack GRk OP_01 GRi (ICCi_1-null) OPE2_0E GRj)
-+ (sequence ()
-+ (c-call VOID "@cpu@_signed_integer_divide"
-+ GRi GRj (index-of GRk) 1)
-+ (clobber GRk))
-+ ((fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
-+)
-+
-+(dni udiv
-+ "unsigned division reg/reg"
-+ ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ "udiv$pack $GRi,$GRj,$GRk"
-+ (+ pack GRk OP_00 GRi (ICCi_1-null) OPE2_0F GRj)
-+ (sequence ()
-+ (c-call VOID "@cpu@_unsigned_integer_divide"
-+ GRi GRj (index-of GRk) 0)
-+ (clobber GRk))
-+ ((fr400 (unit u-idiv)) (fr450 (unit u-idiv))
-+ (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
-+)
-+
-+(dni nudiv
-+ "non excepting unsigned division"
-+ ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING
-+ (MACH simple,tomcat,fr500,fr550,frv))
-+ "nudiv$pack $GRi,$GRj,$GRk"
-+ (+ pack GRk OP_01 GRi (ICCi_1-null) OPE2_0F GRj)
-+ (sequence ()
-+ (c-call VOID "@cpu@_unsigned_integer_divide"
-+ GRi GRj (index-of GRk) 1)
-+ (clobber GRk))
-+ ((fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
-+)
-+
-+; Multiplication
-+;
-+(define-pmacro (multiply-r-r name signop op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ (.str name "$pack $GRi,$GRj,$GRdoublek")
-+ (+ pack GRdoublek op GRi (ICCi_1-null) ope GRj)
-+ (set GRdoublek (mul DI (signop DI GRi) (signop DI GRj)))
-+ ((fr400 (unit u-imul)) (fr450 (unit u-imul))
-+ (fr500 (unit u-imul)) (fr550 (unit u-imul)))
-+ )
-+)
-+
-+(multiply-r-r smul ext OP_00 OPE2_08 "signed multiply reg/reg")
-+(multiply-r-r umul zext OP_00 OPE2_0A "unsigned multiply reg/reg")
-+
-+; Multiplication with integer accumulator IACC
-+;
-+
-+(define-pmacro (iacc-set value)
-+ (set (reg h-iacc0 0) value))
-+
-+(define-pmacro (iacc-add value)
-+ (set (reg h-iacc0 0)
-+ (cond DI
-+ ((andif (andif (gt value 0) (gt (reg h-iacc0 0) 0))
-+ (lt (sub DI #x7fffffffffffffff value) (reg h-iacc0 0)))
-+ ; Positive overflow
-+ (const DI #x7fffffffffffffff))
-+ ((andif (andif (lt value 0) (lt (reg h-iacc0 0) 0))
-+ (gt (sub DI #x8000000000000000 value) (reg h-iacc0 0)))
-+ ; Negative overflow
-+ (const DI #x8000000000000000))
-+ (else
-+ (add DI (reg h-iacc0 0) value))))
-+)
-+
-+(define-pmacro (iacc-sub value)
-+ (set (reg h-iacc0 0)
-+ (cond DI
-+ ((andif (andif (lt value 0) (gt (reg h-iacc0 0) 0))
-+ (lt (add DI #x7fffffffffffffff value) (reg h-iacc0 0)))
-+ ; Positive overflow
-+ (const DI #x7fffffffffffffff))
-+ ((andif (andif (gt value 0) (lt (reg h-iacc0 0) 0))
-+ (gt (add DI #x8000000000000000 value) (reg h-iacc0 0)))
-+ ; Negative overflow
-+ (const DI #x8000000000000000))
-+ (else
-+ (sub DI (reg h-iacc0 0) value))))
-+)
-+
-+(define-pmacro (iacc-multiply-r-r name operation op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT IACC) (MACH fr400,fr450)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO)
-+ (.str name "$pack $GRi,$GRj")
-+ (+ pack (rd-null) op GRi ope GRj)
-+ ((.sym iacc- operation) (mul DI (ext DI GRi) (ext DI GRj)))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer)))
-+ )
-+)
-+
-+(iacc-multiply-r-r smu set OP_46 OPE1_05 "Signed multiply reg/reg/iacc")
-+(iacc-multiply-r-r smass add OP_46 OPE1_06 "Signed multiply/add reg/reg/iacc")
-+(iacc-multiply-r-r smsss sub OP_46 OPE1_07 "Signed multiply/sub reg/reg/iacc")
-+
-+(define-pmacro (int-shift-r-r name op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ (.str name "$pack $GRi,$GRj,$GRk")
-+ (+ pack GRk op GRi (ICCi_1-null) ope GRj)
-+ (set GRk (name GRi (and GRj #x1f)))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(int-shift-r-r sll OP_01 OPE2_08 "shift left logical reg/reg")
-+(int-shift-r-r srl OP_01 OPE2_0A "shift right logical reg/reg")
-+(int-shift-r-r sra OP_01 OPE2_0C "shift right arith reg/reg")
-+
-+(dni slass
-+ "shift left arith reg/reg with saturation"
-+ ((UNIT IALL) (MACH fr400,fr450)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO)
-+ "slass$pack $GRi,$GRj,$GRk"
-+ (+ pack GRk OP_46 GRi OPE1_02 GRj)
-+ (set GRk (c-call SI "@cpu@_shift_left_arith_saturate" GRi GRj))
-+ ()
-+)
-+
-+(dni scutss
-+ "Integer accumulator cut with saturation"
-+ ((UNIT I0) (MACH fr400,fr450)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO)
-+ "scutss$pack $GRj,$GRk"
-+ (+ pack GRk OP_46 (rs-null) OPE1_04 GRj)
-+ (set GRk (c-call SI "@cpu@_iacc_cut" (reg h-iacc0 0) GRj))
-+ ()
-+)
-+
-+(define-pmacro (scan-semantics arg1 arg2 targ)
-+ (sequence ((WI tmp1) (WI tmp2))
-+ (set tmp1 arg1)
-+ (set tmp2 (sra arg2 1))
-+ (set targ (c-call WI "@cpu@_scan_result" (xor tmp1 tmp2))))
-+)
-+
-+(dni scan
-+ "scan"
-+ ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ "scan$pack $GRi,$GRj,$GRk"
-+ (+ pack GRk OP_0B GRi (ICCi_1-null) OPE2_00 GRj)
-+ (scan-semantics GRi GRj GRk)
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+)
-+
-+; Format: conditional INT, Logic, Shift r-r
-+;
-+(define-pmacro (conditional-int-logic name operation op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
-+ (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond")
-+ (+ pack GRk op GRi CCi cond ope GRj)
-+ (if (eq CCi (or cond 2))
-+ (set GRk (operation GRi GRj)))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(conditional-int-logic cadd add OP_58 OPE4_0 "conditional add")
-+(conditional-int-logic csub sub OP_58 OPE4_1 "conditional sub")
-+(conditional-int-logic cand and OP_5A OPE4_0 "conditional and")
-+(conditional-int-logic cor or OP_5A OPE4_1 "conditional or")
-+(conditional-int-logic cxor xor OP_5A OPE4_2 "conditional xor")
-+
-+(dni cnot
-+ "conditional not"
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
-+ "cnot$pack $GRj,$GRk,$CCi,$cond"
-+ (+ pack GRk OP_5A (rs-null) CCi cond OPE4_3 GRj)
-+ (if (eq CCi (or cond 2))
-+ (set GRk (inv GRj)))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+)
-+
-+(dni csmul
-+ "conditional signed multiply"
-+ ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
-+ "csmul$pack $GRi,$GRj,$GRdoublek,$CCi,$cond"
-+ (+ pack GRdoublek OP_58 GRi CCi cond OPE4_2 GRj)
-+ (if (eq CCi (or cond 2))
-+ (set GRdoublek (mul DI (ext DI GRi) (ext DI GRj))))
-+ ((fr400 (unit u-imul)) (fr450 (unit u-imul))
-+ (fr500 (unit u-imul)) (fr550 (unit u-imul)))
-+)
-+
-+(dni csdiv
-+ "conditional signed division"
-+ ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
-+ "csdiv$pack $GRi,$GRj,$GRk,$CCi,$cond"
-+ (+ pack GRk OP_58 GRi CCi cond OPE4_3 GRj)
-+ (if (eq CCi (or cond 2))
-+ (sequence ()
-+ (c-call VOID "@cpu@_signed_integer_divide"
-+ GRi GRj (index-of GRk) 0)
-+ (clobber GRk)))
-+ ((fr400 (unit u-idiv)) (fr450 (unit u-idiv))
-+ (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
-+)
-+
-+(dni cudiv
-+ "conditional unsigned division"
-+ ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
-+ "cudiv$pack $GRi,$GRj,$GRk,$CCi,$cond"
-+ (+ pack GRk OP_59 GRi CCi cond OPE4_3 GRj)
-+ (if (eq CCi (or cond 2))
-+ (sequence ()
-+ (c-call VOID "@cpu@_unsigned_integer_divide"
-+ GRi GRj (index-of GRk) 0)
-+ (clobber GRk)))
-+ ((fr400 (unit u-idiv)) (fr450 (unit u-idiv))
-+ (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
-+)
-+
-+(define-pmacro (conditional-shift name operation op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
-+ (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond")
-+ (+ pack GRk op GRi CCi cond ope GRj)
-+ (if (eq CCi (or cond 2))
-+ (set GRk (operation GRi (and GRj #x1f))))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(conditional-shift csll sll OP_5C OPE4_0 "conditional shift left logical")
-+(conditional-shift csrl srl OP_5C OPE4_1 "conditional shift right logical")
-+(conditional-shift csra sra OP_5C OPE4_2 "conditional shift right arith")
-+
-+(dni cscan
-+ "conditional scan"
-+ ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
-+ "cscan$pack $GRi,$GRj,$GRk,$CCi,$cond"
-+ (+ pack GRk OP_65 GRi CCi cond OPE4_3 GRj)
-+ (if (eq CCi (or cond 2))
-+ (scan-semantics GRi GRj GRk))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+)
-+
-+; Format: INT, Logic, Shift, cc r-r
-+;
-+(define-pmacro (int-arith-cc-semantics operation icc)
-+ (sequence ((BI tmp) (QI cc) (SI result))
-+ (set cc icc)
-+ (set tmp ((.sym operation -oflag) GRi GRj (const 0)))
-+ (set-v cc tmp)
-+ (set tmp ((.sym operation -cflag) GRi GRj (const 0)))
-+ (set-c cc tmp)
-+ (set result (operation GRi GRj))
-+ (set-z-and-n cc result)
-+ (set GRk result)
-+ (set icc cc))
-+)
-+
-+(define-pmacro (int-arith-cc-r-r name operation op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1")
-+ (+ pack GRk op GRi ICCi_1 ope GRj)
-+ (int-arith-cc-semantics operation ICCi_1)
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(int-arith-cc-r-r addcc add OP_00 OPE2_01 "add reg/reg, set icc")
-+(int-arith-cc-r-r subcc sub OP_00 OPE2_05 "sub reg/reg, set icc")
-+
-+(define-pmacro (int-logic-cc-semantics op icc)
-+ (sequence ((SI tmp))
-+ (set tmp (op GRi GRj))
-+ (set GRk tmp)
-+ (set-z-and-n icc tmp))
-+)
-+
-+(define-pmacro (int-logic-cc-r-r name op ope comment)
-+ (dni (.sym name cc)
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ (.str (.sym name cc) "$pack $GRi,$GRj,$GRk,$ICCi_1")
-+ (+ pack GRk op GRi ICCi_1 ope GRj)
-+ (int-logic-cc-semantics name ICCi_1)
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(int-logic-cc-r-r and OP_01 OPE2_01 "and reg/reg, set icc")
-+(int-logic-cc-r-r or OP_01 OPE2_03 "or reg/reg, set icc")
-+(int-logic-cc-r-r xor OP_01 OPE2_05 "xor reg/reg, set icc")
-+
-+(define-pmacro (int-shift-cc-semantics op l-r icc)
-+ (sequence ((WI shift) (SI tmp) (QI cc))
-+ (set shift (and GRj #x1f))
-+ (set cc (c-call QI (.str "@cpu@_set_icc_for_shift_" l-r)
-+ GRi shift icc))
-+ (set tmp (op GRi shift))
-+ (set GRk tmp)
-+ (set-z-and-n cc tmp)
-+ (set icc cc))
-+)
-+
-+(define-pmacro (int-shift-cc-r-r name l-r op ope comment)
-+ (dni (.sym name cc)
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ (.str (.sym name cc) "$pack $GRi,$GRj,$GRk,$ICCi_1")
-+ (+ pack GRk op GRi ICCi_1 ope GRj)
-+ (int-shift-cc-semantics name l-r ICCi_1)
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(int-shift-cc-r-r sll left OP_01 OPE2_09 "shift left logical reg/reg,set icc")
-+(int-shift-cc-r-r srl right OP_01 OPE2_0B "shift right logical reg/reg,set icc")
-+(int-shift-cc-r-r sra right OP_01 OPE2_0D "shift right arith reg/reg,set icc")
-+
-+(define-pmacro (multiply-cc-semantics signop arg1 arg2 targ icc)
-+ (sequence ((DI tmp) (QI cc))
-+ (set cc icc)
-+ (set tmp (mul DI (signop DI arg1) (signop DI arg2)))
-+ (set-n cc (srl DI tmp 63))
-+ (set-z cc (eq tmp 0))
-+ (set targ tmp)
-+ (set icc cc))
-+)
-+
-+(define-pmacro (multiply-cc-r-r name signop op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ (.str name "$pack $GRi,$GRj,$GRdoublek,$ICCi_1")
-+ (+ pack GRdoublek op GRi ICCi_1 ope GRj)
-+ (multiply-cc-semantics signop GRi GRj GRdoublek ICCi_1)
-+ ((fr400 (unit u-imul)) (fr450 (unit u-imul))
-+ (fr500 (unit u-imul)) (fr550 (unit u-imul)))
-+ )
-+)
-+
-+(multiply-cc-r-r smulcc ext OP_00 OPE2_09 "signed multiply reg/reg")
-+(multiply-cc-r-r umulcc zext OP_00 OPE2_0B "unsigned multiply reg/reg")
-+
-+
-+; Format: conditional INT, Logic, Shift, cc r-r
-+;
-+(define-pmacro (conditional-int-arith-cc name operation op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
-+ (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond")
-+ (+ pack GRk op GRi CCi cond ope GRj)
-+ (if (eq CCi (or cond 2))
-+ (int-arith-cc-semantics operation
-+ (reg h-iccr (and (index-of CCi) 3))))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(conditional-int-arith-cc caddcc add OP_59 OPE4_0 "add, set icc")
-+(conditional-int-arith-cc csubcc sub OP_59 OPE4_1 "sub, set icc")
-+
-+(dni csmulcc
-+ "conditional signed multiply and set condition code"
-+ ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
-+ "csmulcc$pack $GRi,$GRj,$GRdoublek,$CCi,$cond"
-+ (+ pack GRdoublek OP_59 GRi CCi cond OPE4_2 GRj)
-+ (if (eq CCi (or cond 2))
-+ (multiply-cc-semantics ext GRi GRj GRdoublek
-+ (reg h-iccr (and (index-of CCi) 3))))
-+ ((fr400 (unit u-imul)) (fr450 (unit u-imul))
-+ (fr500 (unit u-imul)) (fr550 (unit u-imul)))
-+)
-+
-+(define-pmacro (conditional-int-logic-cc name operation op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
-+ (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond")
-+ (+ pack GRk op GRi CCi cond ope GRj)
-+ (if (eq CCi (or cond 2))
-+ (int-logic-cc-semantics operation
-+ (reg h-iccr (and (index-of CCi) 3))))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(conditional-int-logic-cc candcc and OP_5B OPE4_0 "conditional and, set icc")
-+(conditional-int-logic-cc corcc or OP_5B OPE4_1 "conditional or , set icc")
-+(conditional-int-logic-cc cxorcc xor OP_5B OPE4_2 "conditional xor, set icc")
-+
-+(define-pmacro (conditional-int-shift-cc name l-r op ope comment)
-+ (dni (.sym c name cc)
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
-+ (.str (.sym c name cc) "$pack $GRi,$GRj,$GRk,$CCi,$cond")
-+ (+ pack GRk op GRi CCi cond ope GRj)
-+ (if (eq CCi (or cond 2))
-+ (int-shift-cc-semantics name l-r
-+ (reg h-iccr (and (index-of CCi) 3))))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(conditional-int-shift-cc sll left OP_5D OPE4_0 "shift left logical, set icc")
-+(conditional-int-shift-cc srl right OP_5D OPE4_1 "shift right logical, set icc")
-+(conditional-int-shift-cc sra right OP_5D OPE4_2 "shift right arith , set icc")
-+
-+; Add and subtract with carry
-+;
-+(define-pmacro (int-arith-x-r-r name operation op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1")
-+ (+ pack GRk op GRi ICCi_1 ope GRj)
-+ (set GRk ((.sym operation c) GRi GRj (cbit ICCi_1)))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(int-arith-x-r-r addx add OP_00 OPE2_02 "Add reg/reg, with carry")
-+(int-arith-x-r-r subx sub OP_00 OPE2_06 "Sub reg/reg, with carry")
-+
-+(define-pmacro (int-arith-x-cc-r-r name operation op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1")
-+ (+ pack GRk op GRi ICCi_1 ope GRj)
-+ (sequence ((WI tmp) (QI cc))
-+ (set cc ICCi_1)
-+ (set tmp ((.sym operation c) GRi GRj (cbit cc)))
-+ (set-v cc ((.sym operation -oflag) GRi GRj (cbit cc)))
-+ (set-c cc ((.sym operation -cflag) GRi GRj (cbit cc)))
-+ (set-z-and-n cc tmp)
-+ (set GRk tmp)
-+ (set ICCi_1 cc))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(int-arith-x-cc-r-r addxcc add OP_00 OPE2_03 "Add reg/reg, use/set carry")
-+(int-arith-x-cc-r-r subxcc sub OP_00 OPE2_07 "Sub reg/reg, use/set carry")
-+; Add and subtract with saturation
-+;
-+(define-pmacro (int-arith-ss-r-r name operation op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT IALL) (MACH fr400,fr450)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO)
-+ (.str name "$pack $GRi,$GRj,$GRk")
-+ (+ pack GRk op GRi ope GRj)
-+ (sequence ()
-+ (set GRk (operation GRi GRj))
-+ (if ((.sym operation -oflag) GRi GRj (const 0))
-+ ; Overflow, saturate.
-+ ; Sign of result will be
-+ ; same as sign of first operand.
-+ (set GRk
-+ (cond SI
-+ ((gt GRi 0) (const #x7fffffff))
-+ ((lt GRi 0) (const #x80000000))
-+ (else (const 0)))))
-+ )
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer)))
-+ )
-+)
-+
-+(int-arith-ss-r-r addss add OP_46 OPE1_00 "add reg/reg, with saturation")
-+(int-arith-ss-r-r subss sub OP_46 OPE1_01 "sub reg/reg, with saturation")
-+
-+; Format: INT, Logic, Shift r-simm
-+;
-+(define-pmacro (int-logic-r-simm name operation op comment)
-+ (dni name
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ (.str name "$pack $GRi,$s12,$GRk")
-+ (+ pack GRk op GRi s12)
-+ (set GRk (operation GRi s12))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(int-logic-r-simm addi add OP_10 "add reg/immed")
-+(int-logic-r-simm subi sub OP_14 "sub reg/immed")
-+(int-logic-r-simm andi and OP_20 "and reg/immed")
-+(int-logic-r-simm ori or OP_22 "or reg/immed")
-+(int-logic-r-simm xori xor OP_24 "xor reg/immed")
-+
-+(dni sdivi
-+ "signed division reg/immed"
-+ ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ "sdivi$pack $GRi,$s12,$GRk"
-+ (+ pack GRk OP_1E GRi s12)
-+ (sequence ()
-+ (c-call VOID "@cpu@_signed_integer_divide"
-+ GRi s12 (index-of GRk) 0)
-+ (clobber GRk))
-+ ((fr400 (unit u-idiv)) (fr450 (unit u-idiv))
-+ (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
-+)
-+
-+(dni nsdivi
-+ "non excepting signed division reg/immed"
-+ ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING
-+ (MACH simple,tomcat,fr500,fr550,frv))
-+ "nsdivi$pack $GRi,$s12,$GRk"
-+ (+ pack GRk OP_2E GRi s12)
-+ (sequence ()
-+ (c-call VOID "@cpu@_signed_integer_divide"
-+ GRi s12 (index-of GRk) 1)
-+ (clobber GRk))
-+ ((fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
-+)
-+
-+(dni udivi
-+ "unsigned division reg/immed"
-+ ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ "udivi$pack $GRi,$s12,$GRk"
-+ (+ pack GRk OP_1F GRi s12)
-+ (sequence ()
-+ (c-call VOID "@cpu@_unsigned_integer_divide"
-+ GRi s12 (index-of GRk) 0)
-+ (clobber GRk))
-+ ((fr400 (unit u-idiv)) (fr450 (unit u-idiv))
-+ (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
-+)
-+
-+(dni nudivi
-+ "non excepting unsigned division reg/immed"
-+ ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING
-+ (MACH simple,tomcat,fr500,fr550,frv))
-+ "nudivi$pack $GRi,$s12,$GRk"
-+ (+ pack GRk OP_2F GRi s12)
-+ (sequence ()
-+ (c-call VOID "@cpu@_unsigned_integer_divide"
-+ GRi s12 (index-of GRk) 1)
-+ (clobber GRk))
-+ ((fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
-+)
-+
-+(define-pmacro (multiply-r-simm name signop op comment)
-+ (dni name
-+ (comment)
-+ ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ (.str name "$pack $GRi,$s12,$GRdoublek")
-+ (+ pack GRdoublek op GRi s12)
-+ (set GRdoublek (mul DI (signop DI GRi) (signop DI s12)))
-+ ((fr400 (unit u-imul)) (fr450 (unit u-imul))
-+ (fr500 (unit u-imul)) (fr550 (unit u-imul)))
-+ )
-+)
-+
-+(multiply-r-simm smuli ext OP_18 "signed multiply reg/immed")
-+(multiply-r-simm umuli zext OP_1A "unsigned multiply reg/immed")
-+
-+(define-pmacro (int-shift-r-simm name op comment)
-+ (dni (.sym name i)
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ (.str (.sym name i) "$pack $GRi,$s12,$GRk")
-+ (+ pack GRk op GRi s12)
-+ (set GRk (name GRi (and s12 #x1f)))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(int-shift-r-simm sll OP_28 "shift left logical reg/immed")
-+(int-shift-r-simm srl OP_2A "shift right logical reg/immed")
-+(int-shift-r-simm sra OP_2C "shift right arith reg/immed")
-+
-+(dni scani
-+ "scan immediate"
-+ ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ "scani$pack $GRi,$s12,$GRk"
-+ (+ pack GRk OP_47 GRi s12)
-+ (scan-semantics GRi s12 GRk)
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+)
-+
-+; Format: INT, Logic, Shift cc r-simm
-+;
-+(define-pmacro (int-arith-cc-r-simm name operation op comment)
-+ (dni name
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ (.str name "$pack $GRi,$s10,$GRk,$ICCi_1")
-+ (+ pack GRk op GRi ICCi_1 s10)
-+ (sequence ((BI tmp) (QI cc) (SI result))
-+ (set cc ICCi_1)
-+ (set tmp ((.sym operation -oflag) GRi s10 (const 0)))
-+ (set-v cc tmp)
-+ (set tmp ((.sym operation -cflag) GRi s10 (const 0)))
-+ (set-c cc tmp)
-+ (set result (operation GRi s10))
-+ (set-z-and-n cc result)
-+ (set GRk result)
-+ (set ICCi_1 cc))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(int-arith-cc-r-simm addicc add OP_11 "add reg/immed, set icc")
-+(int-arith-cc-r-simm subicc sub OP_15 "sub reg/immed, set icc")
-+
-+(define-pmacro (int-logic-cc-r-simm name op comment)
-+ (dni (.sym name icc)
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ (.str (.sym name icc) "$pack $GRi,$s10,$GRk,$ICCi_1")
-+ (+ pack GRk op GRi ICCi_1 s10)
-+ (sequence ((SI tmp))
-+ (set tmp (name GRi s10))
-+ (set GRk tmp)
-+ (set-z-and-n ICCi_1 tmp))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(int-logic-cc-r-simm and OP_21 "and reg/immed, set icc")
-+(int-logic-cc-r-simm or OP_23 "or reg/immed, set icc")
-+(int-logic-cc-r-simm xor OP_25 "xor reg/immed, set icc")
-+
-+(define-pmacro (multiply-cc-r-simm name signop op comment)
-+ (dni name
-+ (comment)
-+ ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ (.str name "$pack $GRi,$s10,$GRdoublek,$ICCi_1")
-+ (+ pack GRdoublek op GRi ICCi_1 s10)
-+ (multiply-cc-semantics signop GRi s10 GRdoublek ICCi_1)
-+ ((fr400 (unit u-imul)) (fr450 (unit u-imul))
-+ (fr500 (unit u-imul)) (fr550 (unit u-imul)))
-+ )
-+)
-+
-+(multiply-cc-r-simm smulicc ext OP_19 "signed multiply reg/immed")
-+(multiply-cc-r-simm umulicc zext OP_1B "unsigned multiply reg/immed")
-+
-+(define-pmacro (int-shift-cc-r-simm name l-r op comment)
-+ (dni (.sym name icc)
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ (.str (.sym name icc) "$pack $GRi,$s10,$GRk,$ICCi_1")
-+ (+ pack GRk op GRi ICCi_1 s10)
-+ (sequence ((WI shift) (SI tmp) (QI cc))
-+ (set shift (and s10 #x1f))
-+ (set cc (c-call QI (.str "@cpu@_set_icc_for_shift_" l-r)
-+ GRi shift ICCi_1))
-+ (set tmp (name GRi shift))
-+ (set GRk tmp)
-+ (set-z-and-n cc tmp)
-+ (set ICCi_1 cc))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(int-shift-cc-r-simm sll left OP_29 "shift left logical reg/immed, set icc")
-+(int-shift-cc-r-simm srl right OP_2B "shift right logical reg/immed, set icc")
-+(int-shift-cc-r-simm sra right OP_2D "shift right arith reg/immed, set icc")
-+
-+(define-pmacro (int-arith-x-r-simm name operation op comment)
-+ (dni name
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ (.str name "$pack $GRi,$s10,$GRk,$ICCi_1")
-+ (+ pack GRk op GRi ICCi_1 s10)
-+ (set GRk ((.sym operation c) GRi s10 (cbit ICCi_1)))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(int-arith-x-r-simm addxi add OP_12 "Add reg/immed, with carry")
-+(int-arith-x-r-simm subxi sub OP_16 "Sub reg/immed, with carry")
-+
-+(define-pmacro (int-arith-x-cc-r-simm name operation op comment)
-+ (dni name
-+ (comment)
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ (.str name "$pack $GRi,$s10,$GRk,$ICCi_1")
-+ (+ pack GRk op GRi ICCi_1 s10)
-+ (sequence ((WI tmp) (QI cc))
-+ (set cc ICCi_1)
-+ (set tmp ((.sym operation c) GRi s10 (cbit cc)))
-+ (set-v cc ((.sym operation -oflag) GRi s10 (cbit cc)))
-+ (set-c cc ((.sym operation -cflag) GRi s10 (cbit cc)))
-+ (set-z-and-n cc tmp)
-+ (set GRk tmp)
-+ (set ICCi_1 cc))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+ )
-+)
-+
-+(int-arith-x-cc-r-simm addxicc add OP_13 "Add reg/immed, with carry")
-+(int-arith-x-cc-r-simm subxicc sub OP_17 "Sub reg/immed, with carry")
-+
-+; Byte compare insns
-+
-+(dni cmpb
-+ "Compare bytes"
-+ ((UNIT IALL) (MACH fr400,fr450,fr550) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ "cmpb$pack $GRi,$GRj,$ICCi_1"
-+ (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0C GRj)
-+ (sequence ((QI cc))
-+ (set-n cc (eq (and GRi #xff000000) (and GRj #xff000000)))
-+ (set-z cc (eq (and GRi #x00ff0000) (and GRj #x00ff0000)))
-+ (set-v cc (eq (and GRi #x0000ff00) (and GRj #x0000ff00)))
-+ (set-c cc (eq (and GRi #x000000ff) (and GRj #x000000ff)))
-+ (set ICCi_1 cc))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr550 (unit u-integer)))
-+)
-+
-+(dni cmpba
-+ "OR of Compare bytes"
-+ ((UNIT IALL) (MACH fr400,fr450,fr550) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ "cmpba$pack $GRi,$GRj,$ICCi_1"
-+ (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0D GRj)
-+ (sequence ((QI cc))
-+ (set cc 0)
-+ (set-c cc
-+ (orif (eq (and GRi #xff000000) (and GRj #xff000000))
-+ (orif (eq (and GRi #x00ff0000) (and GRj #x00ff0000))
-+ (orif (eq (and GRi #x0000ff00)
-+ (and GRj #x0000ff00))
-+ (eq (and GRi #x000000ff)
-+ (and GRj #x000000ff))))))
-+ (set ICCi_1 cc))
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr550 (unit u-integer)))
-+)
-+
-+; Format: Load immediate
-+;
-+(dni setlo
-+ "set low order bits"
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ "setlo$pack $ulo16,$GRklo"
-+ (+ pack GRk OP_3D (misc-null-4) u16)
-+ (set GRklo u16)
-+ ((fr400 (unit u-set-hilo)) (fr450 (unit u-set-hilo))
-+ (fr500 (unit u-set-hilo)) (fr550 (unit u-set-hilo)))
-+)
-+
-+(dni sethi
-+ "set high order bits"
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ "sethi$pack $uhi16,$GRkhi"
-+ (+ pack GRkhi OP_3E (misc-null-4) u16)
-+ (set GRkhi u16)
-+ ((fr400 (unit u-set-hilo)) (fr450 (unit u-set-hilo))
-+ (fr500 (unit u-set-hilo)) (fr550 (unit u-set-hilo)))
-+)
-+
-+(dni setlos
-+ "set low order bits and extend sign"
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ "setlos$pack $slo16,$GRk"
-+ (+ pack GRk OP_3F (misc-null-4) s16)
-+ (set GRk s16)
-+ ((fr400 (unit u-integer)) (fr450 (unit u-integer))
-+ (fr500 (unit u-integer)) (fr550 (unit u-integer)))
-+)
-+
-+(define-pmacro (load-gr-r name mode op ope comment ann)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
-+ (FR400-MAJOR I-2) (FR450-MAJOR I-2))
-+ (.str name "$pack " ann "($GRi,$GRj),$GRk")
-+ (+ pack GRk op GRi ope GRj)
-+ (set GRk (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj)))
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ )
-+)
-+
-+(dann ldann "ld annotation" SI "ld_annotation" "at")
-+
-+(load-gr-r ldsb QI OP_02 OPE1_00 "Load signed byte" "@")
-+(load-gr-r ldub UQI OP_02 OPE1_01 "Load unsigned byte" "@")
-+(load-gr-r ldsh HI OP_02 OPE1_02 "Load signed half" "@")
-+(load-gr-r lduh UHI OP_02 OPE1_03 "Load unsigned half" "@")
-+(load-gr-r ld SI OP_02 OPE1_04 "Load word" "$ldann")
-+
-+(define-pmacro (load-fr-r name mode op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
-+ (FR400-MAJOR I-2) (FR450-MAJOR I-2) FR-ACCESS)
-+ (.str name "$pack @($GRi,$GRj),$FRintk")
-+ (+ pack FRintk op GRi ope GRj)
-+ (set FRintk (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj)))
-+ ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
-+ (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
-+ )
-+)
-+
-+(load-fr-r ldbf UQI OP_02 OPE1_08 "Load byte float")
-+(load-fr-r ldhf UHI OP_02 OPE1_09 "Load half float")
-+(load-fr-r ldf SI OP_02 OPE1_0A "Load word float")
-+
-+(define-pmacro (load-cpr-r name mode op ope reg attr comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR500-MAJOR I-2) attr)
-+ (.str name "$pack @($GRi,$GRj),$" reg "k")
-+ (+ pack (.sym reg k) op GRi ope GRj)
-+ (set (.sym reg k)
-+ (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj)))
-+ ()
-+ )
-+)
-+
-+(load-cpr-r ldc SI OP_02 OPE1_0D CPR (MACH frv) "Load coprocessor word")
-+
-+; These correspond to enumerators in frv-sim.h
-+(define-pmacro (ne-UQI-size) 0)
-+(define-pmacro (ne-QI-size) 1)
-+(define-pmacro (ne-UHI-size) 2)
-+(define-pmacro (ne-HI-size) 3)
-+(define-pmacro (ne-SI-size) 4)
-+(define-pmacro (ne-DI-size) 5)
-+(define-pmacro (ne-XI-size) 6)
-+
-+(define-pmacro (ne-load-semantics base dispix targ idisp size is_float action)
-+ (sequence ((BI do_op))
-+ (set do_op
-+ (c-call BI "@cpu@_check_non_excepting_load"
-+ (index-of base) dispix (index-of targ)
-+ idisp size is_float))
-+ (if do_op action))
-+)
-+
-+(define-pmacro (ne-load-gr-r name mode op ope size comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING
-+ (MACH simple,tomcat,fr500,fr550,frv))
-+ (.str name "$pack @($GRi,$GRj),$GRk")
-+ (+ pack GRk op GRi ope GRj)
-+ (ne-load-semantics GRi (index-of GRj) GRk 0 size 0
-+ (set GRk
-+ (c-call mode (.str "@cpu@_read_mem_" mode)
-+ pc (add GRi GRj))))
-+ ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ )
-+)
-+
-+(ne-load-gr-r nldsb QI OP_02 OPE1_20 (ne-QI-size) "Load signed byte")
-+(ne-load-gr-r nldub UQI OP_02 OPE1_21 (ne-UQI-size) "Load unsigned byte")
-+(ne-load-gr-r nldsh HI OP_02 OPE1_22 (ne-HI-size) "Load signed half")
-+(ne-load-gr-r nlduh UHI OP_02 OPE1_23 (ne-UHI-size) "Load unsigned half")
-+(ne-load-gr-r nld SI OP_02 OPE1_24 (ne-SI-size) "Load word")
-+
-+(define-pmacro (ne-load-fr-r name mode op ope size comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS
-+ (MACH simple,tomcat,fr500,fr550,frv))
-+ (.str name "$pack @($GRi,$GRj),$FRintk")
-+ (+ pack FRintk op GRi ope GRj)
-+ (ne-load-semantics GRi (index-of GRj) FRintk 0 size 1
-+ (set FRintk
-+ (c-call mode (.str "@cpu@_read_mem_" mode)
-+ pc (add GRi GRj))))
-+ ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
-+ )
-+)
-+
-+(ne-load-fr-r nldbf UQI OP_02 OPE1_28 (ne-UQI-size) "Load byte float")
-+(ne-load-fr-r nldhf UHI OP_02 OPE1_29 (ne-UHI-size) "Load half float")
-+(ne-load-fr-r nldf SI OP_02 OPE1_2A (ne-SI-size) "Load word float")
-+
-+; Semantics for a load-double insn
-+;
-+(define-pmacro (load-double-semantics not_gr mode regtype address arg)
-+ (if (orif not_gr (ne (index-of (.sym regtype doublek)) 0))
-+ (sequence ()
-+ (set address (add GRi arg))
-+ (set (.sym regtype doublek)
-+ (c-call mode (.str "@cpu@_read_mem_" mode) pc address))))
-+)
-+
-+(define-pmacro (load-double-r-r
-+ name not_gr mode op ope regtype attr profile comment ann)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
-+ (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr)
-+ (.str name "$pack " ann "($GRi,$GRj),$" regtype "doublek")
-+ (+ pack (.sym regtype doublek) op GRi ope GRj)
-+ (sequence ((WI address))
-+ (load-double-semantics not_gr mode regtype address GRj))
-+ profile
-+ )
-+)
-+
-+(dann lddann "ldd annotation" SI "ldd_annotation" "at")
-+
-+(load-double-r-r ldd 0 DI OP_02 OPE1_05 GR NA
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ "Load double word" "$lddann")
-+(load-double-r-r lddf 1 DF OP_02 OPE1_0B FR FR-ACCESS
-+ ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
-+ (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
-+ "Load double float" "@")
-+(load-double-r-r lddc 1 DI OP_02 OPE1_0E CPR (MACH frv) ()
-+ "Load coprocessor double" "@")
-+
-+(define-pmacro (ne-load-double-r-r
-+ name not_gr mode op ope regtype size is_float attr profile
-+ comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING attr
-+ (MACH simple,tomcat,fr500,fr550,frv))
-+ (.str name "$pack @($GRi,$GRj),$" regtype "doublek")
-+ (+ pack (.sym regtype doublek) op GRi ope GRj)
-+ (sequence ((WI address))
-+ (ne-load-semantics GRi (index-of GRj) (.sym regtype doublek)
-+ 0 size is_float
-+ (load-double-semantics not_gr mode
-+ regtype
-+ address GRj)))
-+ profile
-+ )
-+)
-+
-+(ne-load-double-r-r nldd 0 DI OP_02 OPE1_25 GR (ne-DI-size) 0 NA
-+ ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load double word")
-+(ne-load-double-r-r nlddf 1 DF OP_02 OPE1_2B FR (ne-DI-size) 1 FR-ACCESS
-+ ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load double float")
-+
-+; Semantics for a load-quad insn
-+;
-+(define-pmacro (load-quad-semantics regtype address arg)
-+ (sequence ()
-+ (set address (add GRi arg))
-+ (c-call VOID (.str "@cpu@_load_quad_" regtype)
-+ pc address (index-of (.sym regtype k))))
-+)
-+
-+(define-pmacro (load-quad-r-r name op ope regtype attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr)
-+ (.str name "$pack @($GRi,$GRj),$" regtype "k")
-+ (+ pack (.sym regtype k) op GRi ope GRj)
-+ (sequence ((WI address))
-+ (load-quad-semantics regtype address GRj))
-+ ; TODO regtype-k not referenced for profiling
-+ profile
-+ )
-+)
-+
-+(load-quad-r-r ldq OP_02 OPE1_06 GR NA ((fr500 (unit u-gr-load)))
-+ "Load quad word")
-+(load-quad-r-r ldqf OP_02 OPE1_0C FRint FR-ACCESS ((fr500 (unit u-fr-load)))
-+ "Load quad float")
-+(load-quad-r-r ldqc OP_02 OPE1_0F CPR NA () "Load coprocessor quad")
-+
-+(define-pmacro (ne-load-quad-r-r
-+ name op ope regtype size is_float attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING attr)
-+ (.str name "$pack @($GRi,$GRj),$" regtype "k")
-+ (+ pack (.sym regtype k) op GRi ope GRj)
-+ (sequence ((WI address))
-+ (ne-load-semantics GRi (index-of GRj) (.sym regtype k)
-+ 0 size is_float
-+ (load-quad-semantics regtype address GRj)))
-+ ; TODO regtype-k not referenced for profiling
-+ profile
-+ )
-+)
-+
-+(ne-load-quad-r-r nldq OP_02 OPE1_26 GR (ne-XI-size) 0 NA
-+ ((fr500 (unit u-gr-load))) "Load quad word")
-+(ne-load-quad-r-r nldqf OP_02 OPE1_2C FRint (ne-XI-size) 1 FR-ACCESS
-+ ((fr500 (unit u-fr-load))) "Load quad float")
-+
-+(define-pmacro (load-gr-u-semantics mode)
-+ (sequence ((UWI address))
-+ (set address (add GRi GRj))
-+ (set GRk (c-call mode (.str "@cpu@_read_mem_" mode) pc address))
-+ (if (ne (index-of GRi) (index-of GRk))
-+ (sequence ()
-+ (set GRi address)
-+ (c-call VOID "@cpu@_force_update"))))
-+)
-+
-+(define-pmacro (load-gr-u name mode op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
-+ (FR400-MAJOR I-2) (FR450-MAJOR I-2))
-+ (.str name "$pack @($GRi,$GRj),$GRk")
-+ (+ pack GRk op GRi ope GRj)
-+ (load-gr-u-semantics mode)
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ )
-+)
-+
-+(load-gr-u ldsbu QI OP_02 OPE1_10 "Load signed byte, update index")
-+(load-gr-u ldubu UQI OP_02 OPE1_11 "Load unsigned byte, update index")
-+(load-gr-u ldshu HI OP_02 OPE1_12 "Load signed half, update index")
-+(load-gr-u lduhu UHI OP_02 OPE1_13 "Load unsigned half, update index")
-+(load-gr-u ldu SI OP_02 OPE1_14 "Load word, update index")
-+
-+(define-pmacro (ne-load-gr-u name mode op ope size comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING
-+ (MACH simple,tomcat,fr500,fr550,frv))
-+ (.str name "$pack @($GRi,$GRj),$GRk")
-+ (+ pack GRk op GRi ope GRj)
-+ (ne-load-semantics GRi (index-of GRj) GRk 0 size 0 (load-gr-u-semantics mode))
-+ ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ )
-+)
-+
-+(ne-load-gr-u nldsbu QI OP_02 OPE1_30 (ne-QI-size) "Load signed byte, update index")
-+(ne-load-gr-u nldubu UQI OP_02 OPE1_31 (ne-UQI-size) "Load unsigned byte, update index")
-+(ne-load-gr-u nldshu HI OP_02 OPE1_32 (ne-HI-size) "Load signed half, update index")
-+(ne-load-gr-u nlduhu UHI OP_02 OPE1_33 (ne-UHI-size) "Load unsigned half, update index")
-+(ne-load-gr-u nldu SI OP_02 OPE1_34 (ne-SI-size) "Load word, update index")
-+
-+(define-pmacro (load-non-gr-u-semantics mode regtype)
-+ (sequence ((UWI address))
-+ (set address (add GRi GRj))
-+ (set (.sym regtype k)
-+ (c-call mode (.str "@cpu@_read_mem_" mode) pc address))
-+ (set GRi address)
-+ (c-call VOID "@cpu@_force_update"))
-+)
-+
-+(define-pmacro (load-fr-u name mode op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
-+ (FR400-MAJOR I-2) (FR450-MAJOR I-2) FR-ACCESS)
-+ (.str name "$pack @($GRi,$GRj),$FRintk")
-+ (+ pack FRintk op GRi ope GRj)
-+ (load-non-gr-u-semantics mode FRint)
-+ ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
-+ (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
-+ )
-+)
-+
-+(load-fr-u ldbfu UQI OP_02 OPE1_18 "Load byte float, update index")
-+(load-fr-u ldhfu UHI OP_02 OPE1_19 "Load half float, update index")
-+(load-fr-u ldfu SI OP_02 OPE1_1A "Load word float, update index")
-+
-+(define-pmacro (load-cpr-u name mode op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv))
-+ (.str name "$pack @($GRi,$GRj),$CPRk")
-+ (+ pack CPRk op GRi ope GRj)
-+ (load-non-gr-u-semantics mode CPR)
-+ ()
-+ )
-+)
-+
-+(load-cpr-u ldcu SI OP_02 OPE1_1D "Load coprocessor word float,update index")
-+
-+(define-pmacro (ne-load-non-gr-u name mode op ope regtype size comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS
-+ (MACH simple,tomcat,fr500,fr550,frv))
-+ (.str name "$pack @($GRi,$GRj),$" regtype "k")
-+ (+ pack (.sym regtype k) op GRi ope GRj)
-+ (ne-load-semantics GRi (index-of GRj) (.sym regtype k) 0 size 1
-+ (load-non-gr-u-semantics mode regtype))
-+ ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
-+ )
-+)
-+
-+(ne-load-non-gr-u nldbfu UQI OP_02 OPE1_38 FRint (ne-UQI-size) "Load byte float, update index")
-+(ne-load-non-gr-u nldhfu UHI OP_02 OPE1_39 FRint (ne-UHI-size) "Load half float, update index")
-+(ne-load-non-gr-u nldfu SI OP_02 OPE1_3A FRint (ne-SI-size) "Load word float, update index")
-+
-+(define-pmacro (load-double-gr-u-semantics)
-+ (sequence ((WI address))
-+ (load-double-semantics 0 DI GR address GRj)
-+ (if (ne (index-of GRi) (index-of GRdoublek))
-+ (sequence ()
-+ (set GRi address)
-+ (c-call VOID "@cpu@_force_update"))))
-+)
-+
-+(define-pmacro (load-double-gr-u name op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
-+ (FR400-MAJOR I-2) (FR450-MAJOR I-2))
-+ (.str name "$pack @($GRi,$GRj),$GRdoublek")
-+ (+ pack GRdoublek op GRi ope GRj)
-+ (load-double-gr-u-semantics)
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ )
-+)
-+
-+(load-double-gr-u lddu OP_02 OPE1_15 "Load double word, update index")
-+
-+(define-pmacro (ne-load-double-gr-u name op ope size comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING
-+ (MACH simple,tomcat,fr500,fr550,frv))
-+ (.str name "$pack @($GRi,$GRj),$GRdoublek")
-+ (+ pack GRdoublek op GRi ope GRj)
-+ (ne-load-semantics GRi (index-of GRj) GRdoublek 0 size 0
-+ (load-double-gr-u-semantics))
-+ ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+
-+ )
-+)
-+
-+(ne-load-double-gr-u nlddu OP_02 OPE1_35 (ne-DI-size) "Load double word, update index")
-+
-+(define-pmacro (load-double-non-gr-u-semantics mode regtype)
-+ (sequence ((WI address))
-+ (load-double-semantics 1 mode regtype address GRj)
-+ (set GRi address)
-+ (c-call VOID "@cpu@_force_update"))
-+)
-+
-+(define-pmacro (load-double-non-gr-u
-+ name mode op ope regtype attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
-+ (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr)
-+ (.str name "$pack @($GRi,$GRj),$" regtype "doublek")
-+ (+ pack (.sym regtype doublek) op GRi ope GRj)
-+ (load-double-non-gr-u-semantics mode regtype)
-+ profile
-+ )
-+)
-+
-+(load-double-non-gr-u lddfu DF OP_02 OPE1_1B FR FR-ACCESS
-+ ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
-+ (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
-+ "Load double float, update index")
-+(load-double-non-gr-u lddcu DI OP_02 OPE1_1E CPR (MACH frv)
-+ () "Load coprocessor double float, update index")
-+
-+(define-pmacro (ne-load-double-non-gr-u name mode op ope regtype size comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS
-+ (MACH simple,tomcat,fr500,fr550,frv))
-+ (.str name "$pack @($GRi,$GRj),$" regtype "doublek")
-+ (+ pack (.sym regtype doublek) op GRi ope GRj)
-+ (ne-load-semantics GRi (index-of GRj) (.sym regtype doublek) 0 size 1
-+ (load-double-non-gr-u-semantics mode regtype))
-+ ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
-+ )
-+)
-+
-+(ne-load-double-non-gr-u nlddfu DF OP_02 OPE1_3B FR (ne-DI-size) "Load double float, update index")
-+
-+(define-pmacro (load-quad-gr-u-semantics)
-+ (sequence ((WI address))
-+ (load-quad-semantics GR address GRj)
-+ (if (ne (index-of GRi) (index-of GRk))
-+ (sequence ()
-+ (set GRi address)
-+ (c-call VOID "@cpu@_force_update"))))
-+)
-+
-+(define-pmacro (load-quad-gr-u name op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv))
-+ (.str name "$pack @($GRi,$GRj),$GRk")
-+ (+ pack GRk op GRi ope GRj)
-+ (load-quad-gr-u-semantics)
-+ ; TODO - GRk not referenced here for profiling
-+ ((fr500 (unit u-gr-load)))
-+ )
-+)
-+
-+(load-quad-gr-u ldqu OP_02 OPE1_16 "Load quad word, update index")
-+
-+(define-pmacro (ne-load-quad-gr-u name op ope size comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING)
-+ (.str name "$pack @($GRi,$GRj),$GRk")
-+ (+ pack GRk op GRi ope GRj)
-+ (ne-load-semantics GRi (index-of GRj) GRk 0 size 0
-+ (load-quad-gr-u-semantics))
-+ ; TODO - GRk not referenced here for profiling
-+ ((fr500 (unit u-gr-load)))
-+ )
-+)
-+
-+(ne-load-quad-gr-u nldqu OP_02 OPE1_36 (ne-XI-size) "Load quad word, update index")
-+
-+(define-pmacro (load-quad-non-gr-u-semantics regtype)
-+ (sequence ((WI address))
-+ (load-quad-semantics regtype address GRj)
-+ (set GRi address)
-+ (c-call VOID "@cpu@_force_update"))
-+)
-+
-+(define-pmacro (load-quad-non-gr-u name op ope regtype attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr)
-+ (.str name "$pack @($GRi,$GRj),$" regtype "k")
-+ (+ pack (.sym regtype k) op GRi ope GRj)
-+ (load-quad-non-gr-u-semantics regtype)
-+ profile
-+ )
-+)
-+
-+(load-quad-non-gr-u ldqfu OP_02 OPE1_1C FRint FR-ACCESS
-+ ((fr500 (unit u-fr-load))) "Load quad float, update index")
-+(load-quad-non-gr-u ldqcu OP_02 OPE1_1F CPR NA
-+ () "Load coprocessor quad word, update index")
-+
-+(define-pmacro (ne-load-quad-non-gr-u name op ope regtype size comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING FR-ACCESS)
-+ (.str name "$pack @($GRi,$GRj),$" regtype "k")
-+ (+ pack (.sym regtype k) op GRi ope GRj)
-+ (ne-load-semantics GRi (index-of GRj) (.sym regtype k) 0 size 1
-+ (load-quad-non-gr-u-semantics regtype))
-+ ((fr500 (unit u-fr-load)))
-+ )
-+)
-+
-+(ne-load-quad-non-gr-u nldqfu OP_02 OPE1_3C FRint (ne-XI-size) "Load quad float,update index")
-+
-+(define-pmacro (load-r-simm name mode op regtype attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
-+ (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr)
-+ (.str name "$pack @($GRi,$d12),$" regtype "k")
-+ (+ pack (.sym regtype k) op GRi d12)
-+ (set (.sym regtype k)
-+ (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi d12)))
-+ profile
-+ )
-+)
-+
-+(load-r-simm ldsbi QI OP_30 GR NA
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ "Load signed byte")
-+(load-r-simm ldshi HI OP_31 GR NA
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ "Load signed half")
-+(load-r-simm ldi SI OP_32 GR NA
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ "Load word")
-+(load-r-simm ldubi UQI OP_35 GR NA
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ "Load unsigned byte")
-+(load-r-simm lduhi UHI OP_36 GR NA
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ "Load unsigned half")
-+
-+(load-r-simm ldbfi UQI OP_38 FRint FR-ACCESS
-+ ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
-+ (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
-+ "Load byte float")
-+(load-r-simm ldhfi UHI OP_39 FRint FR-ACCESS
-+ ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
-+ (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
-+ "Load half float")
-+(load-r-simm ldfi SI OP_3A FRint FR-ACCESS
-+ ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
-+ (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
-+ "Load word float")
-+
-+(define-pmacro (ne-load-r-simm
-+ name mode op regtype size is_float attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING attr
-+ (MACH simple,tomcat,fr500,fr550,frv))
-+ (.str name "$pack @($GRi,$d12),$" regtype "k")
-+ (+ pack (.sym regtype k) op GRi d12)
-+ (ne-load-semantics GRi -1 (.sym regtype k) d12 size is_float
-+ (set (.sym regtype k)
-+ (c-call mode (.str "@cpu@_read_mem_" mode)
-+ pc (add GRi d12))))
-+ profile
-+ )
-+)
-+
-+(ne-load-r-simm nldsbi QI OP_40 GR (ne-QI-size) 0 NA
-+ ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load signed byte")
-+(ne-load-r-simm nldubi UQI OP_41 GR (ne-UQI-size) 0 NA
-+ ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load unsigned byte")
-+(ne-load-r-simm nldshi HI OP_42 GR (ne-HI-size) 0 NA
-+ ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load signed half")
-+(ne-load-r-simm nlduhi UHI OP_43 GR (ne-UHI-size) 0 NA
-+ ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load unsigned half")
-+(ne-load-r-simm nldi SI OP_44 GR (ne-SI-size) 0 NA
-+ ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load word")
-+
-+(ne-load-r-simm nldbfi UQI OP_48 FRint (ne-UQI-size) 1 FR-ACCESS
-+ ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load byte float")
-+(ne-load-r-simm nldhfi UHI OP_49 FRint (ne-UHI-size) 1 FR-ACCESS
-+ ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load half float")
-+(ne-load-r-simm nldfi SI OP_4A FRint (ne-SI-size) 1 FR-ACCESS
-+ ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load word float")
-+
-+(define-pmacro (load-double-r-simm
-+ name not_gr mode op regtype attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
-+ (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr)
-+ (.str name "$pack @($GRi,$d12),$" regtype "doublek")
-+ (+ pack (.sym regtype doublek) op GRi d12)
-+ (sequence ((WI address))
-+ (load-double-semantics not_gr mode regtype address d12))
-+ profile
-+ )
-+)
-+
-+(load-double-r-simm lddi 0 DI OP_33 GR NA
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ "Load double word")
-+(load-double-r-simm lddfi 1 DF OP_3B FR FR-ACCESS
-+ ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
-+ (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
-+ "Load double float")
-+
-+(define-pmacro (ne-load-double-r-simm
-+ name not_gr mode op regtype size is_float attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING attr
-+ (MACH simple,tomcat,fr500,fr550,frv))
-+ (.str name "$pack @($GRi,$d12),$" regtype "doublek")
-+ (+ pack (.sym regtype doublek) op GRi d12)
-+ (sequence ((WI address))
-+ (ne-load-semantics GRi -1 (.sym regtype doublek)
-+ d12 size is_float
-+ (load-double-semantics not_gr mode
-+ regtype
-+ address d12)))
-+ profile
-+ )
-+)
-+
-+(ne-load-double-r-simm nlddi 0 DI OP_45 GR (ne-DI-size) 0 NA
-+ ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load double word")
-+(ne-load-double-r-simm nlddfi 1 DF OP_4B FR (ne-DI-size) 1 FR-ACCESS
-+ ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load double float")
-+
-+(define-pmacro (load-quad-r-simm name op regtype attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr)
-+ (.str name "$pack @($GRi,$d12),$" regtype "k")
-+ (+ pack (.sym regtype k) op GRi d12)
-+ (sequence ((WI address))
-+ (load-quad-semantics regtype address d12))
-+ profile
-+ )
-+)
-+
-+(load-quad-r-simm ldqi OP_34 GR NA
-+ ((fr500 (unit u-gr-load))) "Load quad word")
-+(load-quad-r-simm ldqfi OP_3C FRint FR-ACCESS
-+ ((fr500 (unit u-fr-load))) "Load quad float")
-+
-+(define-pmacro (ne-load-quad-r-simm
-+ name op regtype size is_float attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING attr)
-+ (.str name "$pack @($GRi,$d12),$" regtype "k")
-+ (+ pack (.sym regtype k) op GRi d12)
-+ (sequence ((WI address))
-+ (ne-load-semantics GRi -1 (.sym regtype k) d12 size is_float
-+ (load-quad-semantics regtype address d12)))
-+ profile
-+ )
-+)
-+
-+(ne-load-quad-r-simm nldqfi OP_4C FRint (ne-XI-size) 1 FR-ACCESS
-+ ((fr500 (unit u-fr-load))) "Load quad float")
-+
-+(define-pmacro (store-r-r name mode op ope reg attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
-+ (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr)
-+ (.str name "$pack $" reg "k,@($GRi,$GRj)")
-+ (+ pack (.sym reg k) op GRi ope GRj)
-+ (c-call VOID (.str "@cpu@_write_mem_" mode)
-+ pc (add GRi GRj) (.sym reg k))
-+ profile
-+ )
-+)
-+
-+(store-r-r stb QI OP_03 OPE1_00 GR NA
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store unsigned byte")
-+(store-r-r sth HI OP_03 OPE1_01 GR NA
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store unsigned half")
-+(store-r-r st SI OP_03 OPE1_02 GR NA
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store word")
-+
-+(store-r-r stbf QI OP_03 OPE1_08 FRint FR-ACCESS
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store byte float")
-+(store-r-r sthf HI OP_03 OPE1_09 FRint FR-ACCESS
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store half float")
-+(store-r-r stf SI OP_03 OPE1_0A FRint FR-ACCESS
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store word float")
-+
-+(store-r-r stc SI OP_03 OPE1_25 CPR (MACH frv) () "Store coprocessor word")
-+
-+; Semantics for a store-double insn
-+;
-+(define-pmacro (store-double-semantics mode regtype address arg)
-+ (sequence ()
-+ (set address (add GRi arg))
-+ (c-call VOID (.str "@cpu@_write_mem_" mode)
-+ pc address (.sym regtype doublek)))
-+)
-+
-+(define-pmacro (store-double-r-r name mode op ope regtype attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
-+ (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr)
-+ (.str name "$pack $" regtype "doublek,@($GRi,$GRj)")
-+ (+ pack (.sym regtype doublek) op GRi ope GRj)
-+ (sequence ((WI address))
-+ (store-double-semantics mode regtype address GRj))
-+ profile
-+ )
-+)
-+
-+(store-double-r-r std DI OP_03 OPE1_03 GR NA
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store double word")
-+(store-double-r-r stdf DF OP_03 OPE1_0B FR FR-ACCESS
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store double float")
-+
-+(store-double-r-r stdc DI OP_03 OPE1_26 CPR (MACH frv)
-+ () "Store coprocessor double word")
-+
-+; Semantics for a store-quad insn
-+;
-+(define-pmacro (store-quad-semantics regtype address arg)
-+ (sequence ()
-+ (set address (add GRi arg))
-+ (c-call VOID (.str "@cpu@_store_quad_" regtype)
-+ pc address (index-of (.sym regtype k))))
-+)
-+
-+(define-pmacro (store-quad-r-r name op ope regtype attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr)
-+ (.str name "$pack $" regtype "k,@($GRi,$GRj)")
-+ (+ pack (.sym regtype k) op GRi ope GRj)
-+ (sequence ((WI address))
-+ (store-quad-semantics regtype address GRj))
-+ profile
-+ )
-+)
-+
-+(store-quad-r-r stq OP_03 OPE1_04 GR NA
-+ ((fr500 (unit u-gr-store))) "Store quad word")
-+(store-quad-r-r stqf OP_03 OPE1_0C FRint FR-ACCESS
-+ ((fr500 (unit u-fr-store)))
-+ "Store quad float")
-+(store-quad-r-r stqc OP_03 OPE1_27 CPR NA
-+ () "Store coprocessor quad word")
-+
-+(define-pmacro (store-r-r-u name mode op ope regtype attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
-+ (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr)
-+ (.str name "$pack $" regtype "k,@($GRi,$GRj)")
-+ (+ pack (.sym regtype k) op GRi ope GRj)
-+ (sequence ((UWI address))
-+ (set address (add GRi GRj))
-+ (c-call VOID (.str "@cpu@_write_mem_" mode)
-+ pc address (.sym regtype k))
-+ (set GRi address))
-+ profile
-+ )
-+)
-+
-+(store-r-r-u stbu QI OP_03 OPE1_10 GR NA
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store unsigned byte, update index")
-+(store-r-r-u sthu HI OP_03 OPE1_11 GR NA
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store unsigned half, update index")
-+(store-r-r-u stu WI OP_03 OPE1_12 GR NA
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store word, update index")
-+
-+(store-r-r-u stbfu QI OP_03 OPE1_18 FRint FR-ACCESS
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store byte float, update index")
-+(store-r-r-u sthfu HI OP_03 OPE1_19 FRint FR-ACCESS
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store half float, update index")
-+(store-r-r-u stfu SI OP_03 OPE1_1A FRint FR-ACCESS
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store word float, update index")
-+
-+(store-r-r-u stcu SI OP_03 OPE1_2D CPR (MACH frv) ()
-+ "Store coprocessor word, update index")
-+
-+(define-pmacro (store-double-r-r-u
-+ name mode op ope regtype attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
-+ (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr)
-+ (.str name "$pack $" regtype "doublek,@($GRi,$GRj)")
-+ (+ pack (.sym regtype doublek) op GRi ope GRj)
-+ (sequence ((WI address))
-+ (store-double-semantics mode regtype address GRj)
-+ (set GRi address))
-+ profile
-+ )
-+)
-+
-+(store-double-r-r-u stdu DI OP_03 OPE1_13 GR NA
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store double word, update index")
-+(store-double-r-r-u stdfu DF OP_03 OPE1_1B FR FR-ACCESS
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store double float,update index")
-+(store-double-r-r-u stdcu DI OP_03 OPE1_2E CPR (MACH frv) ()
-+ "Store coprocessor double word, update index")
-+
-+(define-pmacro (store-quad-r-r-u name op ope regtype attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr)
-+ (.str name "$pack $" regtype "k,@($GRi,$GRj)")
-+ (+ pack (.sym regtype k) op GRi ope GRj)
-+ (sequence ((WI address))
-+ (store-quad-semantics regtype address GRj)
-+ (set GRi address))
-+ profile
-+ )
-+)
-+
-+(store-quad-r-r-u stqu OP_03 OPE1_14 GR NA
-+ ((fr500 (unit u-gr-store)))
-+ "Store quad word, update index")
-+(store-quad-r-r-u stqfu OP_03 OPE1_1C FRint FR-ACCESS
-+ ((fr500 (unit u-fr-store)))
-+ "Store quad float, update index")
-+(store-quad-r-r-u stqcu OP_03 OPE1_2F CPR NA ()
-+ "Store coprocessor quad word, update index")
-+
-+(define-pmacro (conditional-load name mode op ope regtype profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
-+ (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL)
-+ (.str name "$pack @($GRi,$GRj),$" regtype "k,$CCi,$cond")
-+ (+ pack (.sym regtype k) op GRi CCi cond ope GRj)
-+ (if (eq CCi (or cond 2))
-+ (set (.sym regtype k)
-+ (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj))))
-+ profile
-+ )
-+)
-+
-+(conditional-load cldsb QI OP_5E OPE4_0 GR
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ "Load signed byte")
-+(conditional-load cldub UQI OP_5E OPE4_1 GR
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ "Load unsigned byte")
-+(conditional-load cldsh HI OP_5E OPE4_2 GR
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ "Load signed half")
-+(conditional-load clduh UHI OP_5E OPE4_3 GR
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ "Load unsigned half")
-+(conditional-load cld SI OP_5F OPE4_0 GR
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ "Load word")
-+
-+(conditional-load cldbf UQI OP_60 OPE4_0 FRint
-+ ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
-+ (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
-+ "Load byte float")
-+(conditional-load cldhf UHI OP_60 OPE4_1 FRint
-+ ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
-+ (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
-+ "Load half float")
-+(conditional-load cldf SI OP_60 OPE4_2 FRint
-+ ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
-+ (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
-+ "Load word float")
-+
-+(define-pmacro (conditional-load-double
-+ name not_gr mode op ope regtype attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
-+ (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL attr)
-+ (.str name "$pack @($GRi,$GRj),$" regtype "doublek,$CCi,$cond")
-+ (+ pack (.sym regtype doublek) op GRi CCi cond ope GRj)
-+ (if (eq CCi (or cond 2))
-+ (sequence ((WI address))
-+ (load-double-semantics not_gr mode regtype address GRj)))
-+ profile
-+ )
-+)
-+
-+(conditional-load-double cldd 0 DI OP_5F OPE4_1 GR NA
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ "Load double word")
-+(conditional-load-double clddf 1 DF OP_60 OPE4_3 FR FR-ACCESS
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-fr-load)))
-+ "Load double float")
-+
-+(dni cldq
-+ "conditional load quad integer"
-+ ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) CONDITIONAL)
-+ "cldq$pack @($GRi,$GRj),$GRk,$CCi,$cond"
-+ (+ pack GRk OP_5F GRi CCi cond OPE4_2 GRj)
-+ (if (eq CCi (or cond 2))
-+ (sequence ((WI address))
-+ (load-quad-semantics GR address GRj)))
-+ ((fr500 (unit u-gr-load)))
-+)
-+
-+(define-pmacro (conditional-load-gr-u name mode op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
-+ (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL)
-+ (.str name "$pack @($GRi,$GRj),$GRk,$CCi,$cond")
-+ (+ pack GRk op GRi CCi cond ope GRj)
-+ (if (eq CCi (or cond 2))
-+ (sequence ((WI address))
-+ (set address (add GRi GRj))
-+ (set GRk
-+ (c-call mode (.str "@cpu@_read_mem_" mode)
-+ pc address))
-+ (if (ne (index-of GRi) (index-of GRk))
-+ (set GRi address))))
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+ )
-+)
-+
-+(conditional-load-gr-u cldsbu QI OP_61 OPE4_0 "Load signed byte, update")
-+(conditional-load-gr-u cldubu UQI OP_61 OPE4_1 "Load unsigned byte, update")
-+(conditional-load-gr-u cldshu HI OP_61 OPE4_2 "Load signed half, update")
-+(conditional-load-gr-u clduhu UHI OP_61 OPE4_3 "Load unsigned half, update")
-+(conditional-load-gr-u cldu SI OP_62 OPE4_0 "Load word, update")
-+
-+(define-pmacro (conditional-load-non-gr-u name mode op ope regtype comment)
-+ (dni name
-+ (comment)
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
-+ (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL FR-ACCESS)
-+ (.str name "$pack @($GRi,$GRj),$" regtype "k,$CCi,$cond")
-+ (+ pack (.sym regtype k) op GRi CCi cond ope GRj)
-+ (if (eq CCi (or cond 2))
-+ (sequence ((WI address))
-+ (set address (add GRi GRj))
-+ (set (.sym regtype k)
-+ (c-call mode (.str "@cpu@_read_mem_" mode)
-+ pc address))
-+ (set GRi address)))
-+ ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
-+ (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
-+ )
-+)
-+
-+(conditional-load-non-gr-u cldbfu UQI OP_63 OPE4_0 FRint "Load byte float, update")
-+(conditional-load-non-gr-u cldhfu UHI OP_63 OPE4_1 FRint "Load half float, update")
-+(conditional-load-non-gr-u cldfu SI OP_63 OPE4_2 FRint "Load word float, update")
-+
-+
-+(dni clddu
-+ "Load double word, update"
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
-+ (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL)
-+ "clddu$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond"
-+ (+ pack GRdoublek OP_62 GRi CCi cond OPE4_1 GRj)
-+ (if (eq CCi (or cond 2))
-+ (sequence ((WI address))
-+ (load-double-semantics 0 DI GR address GRj)
-+ (if (ne (index-of GRi) (index-of GRdoublek))
-+ (set GRi address))))
-+ ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load))
-+ (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
-+)
-+
-+(dni clddfu
-+ "Load double float, update"
-+ ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2)
-+ (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL FR-ACCESS)
-+ "clddfu$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond"
-+ (+ pack FRdoublek OP_63 GRi CCi cond OPE4_3 GRj)
-+ (if (eq CCi (or cond 2))
-+ (sequence ((WI address))
-+ (load-double-semantics 1 DF FR address GRj)
-+ (set GRi address)))
-+ ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load))
-+ (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
-+)
-+
-+(dni cldqu
-+ "conditional load quad integer and update index"
-+ ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) CONDITIONAL)
-+ "cldqu$pack @($GRi,$GRj),$GRk,$CCi,$cond"
-+ (+ pack GRk OP_62 GRi CCi cond OPE4_2 GRj)
-+ (if (eq CCi (or cond 2))
-+ (sequence ((WI address))
-+ (load-quad-semantics GR address GRj)
-+ (if (ne (index-of GRi) (index-of GRk))
-+ (set GRi address))))
-+ ((fr500 (unit u-gr-load)))
-+)
-+
-+(define-pmacro (conditional-store name mode op ope regtype profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
-+ (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL)
-+ (.str name "$pack $" regtype "k,@($GRi,$GRj),$CCi,$cond")
-+ (+ pack (.sym regtype k) op GRi CCi cond ope GRj)
-+ (if (eq CCi (or cond 2))
-+ (c-call VOID (.str "@cpu@_write_mem_" mode)
-+ pc (add GRi GRj) (.sym regtype k)))
-+ profile
-+ )
-+)
-+
-+(conditional-store cstb QI OP_64 OPE4_0 GR
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store unsigned byte")
-+(conditional-store csth HI OP_64 OPE4_1 GR
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store unsigned half")
-+(conditional-store cst SI OP_64 OPE4_2 GR
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store word")
-+
-+(conditional-store cstbf QI OP_66 OPE4_0 FRint
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store byte float")
-+(conditional-store csthf HI OP_66 OPE4_1 FRint
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store half float")
-+(conditional-store cstf SI OP_66 OPE4_2 FRint
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store word float")
-+
-+(define-pmacro (conditional-store-double
-+ name mode op ope regtype attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
-+ (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL attr)
-+ (.str name "$pack $" regtype "doublek,@($GRi,$GRj),$CCi,$cond")
-+ (+ pack (.sym regtype doublek) op GRi CCi cond ope GRj)
-+ (if (eq CCi (or cond 2))
-+ (sequence ((WI address))
-+ (store-double-semantics mode regtype address GRj)))
-+ profile
-+ )
-+)
-+
-+(conditional-store-double cstd DI OP_64 OPE4_3 GR NA
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store double word")
-+(conditional-store-double cstdf DF OP_66 OPE4_3 FR FR-ACCESS
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store double float")
-+
-+(dni cstq
-+ "conditionally store quad word"
-+ ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) CONDITIONAL)
-+ "cstq$pack $GRk,@($GRi,$GRj),$CCi,$cond"
-+ (+ pack GRk OP_65 GRi CCi cond OPE4_0 GRj)
-+ (if (eq CCi (or cond 2))
-+ (sequence ((WI address))
-+ (store-quad-semantics GR address GRj)))
-+ ((fr500 (unit u-gr-store)))
-+)
-+
-+(define-pmacro (conditional-store-u
-+ name mode op ope regtype attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
-+ (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL attr)
-+ (.str name "$pack $" regtype "k,@($GRi,$GRj),$CCi,$cond")
-+ (+ pack (.sym regtype k) op GRi CCi cond ope GRj)
-+ (if (eq CCi (or cond 2))
-+ (sequence ((WI address))
-+ (set address (add GRi GRj))
-+ (c-call VOID (.str "@cpu@_write_mem_" mode)
-+ pc address (.sym regtype k))
-+ (set GRi address)))
-+ profile
-+ )
-+)
-+
-+(conditional-store-u cstbu QI OP_67 OPE4_0 GR NA
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store unsigned byte, update index")
-+(conditional-store-u csthu HI OP_67 OPE4_1 GR NA
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store unsigned half, update index")
-+(conditional-store-u cstu SI OP_67 OPE4_2 GR NA
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store word, update index")
-+
-+(conditional-store-u cstbfu QI OP_68 OPE4_0 FRint FR-ACCESS
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store byte float, update index")
-+(conditional-store-u csthfu HI OP_68 OPE4_1 FRint FR-ACCESS
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store half float, update index")
-+(conditional-store-u cstfu SI OP_68 OPE4_2 FRint FR-ACCESS
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store word float, update index")
-+
-+(define-pmacro (conditional-store-double-u
-+ name mode op ope regtype attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
-+ (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL attr)
-+ (.str name "$pack $" regtype "doublek,@($GRi,$GRj),$CCi,$cond")
-+ (+ pack (.sym regtype doublek) op GRi CCi cond ope GRj)
-+ (if (eq CCi (or cond 2))
-+ (sequence ((WI address))
-+ (store-double-semantics mode regtype address GRj)
-+ (set GRi address)))
-+ profile
-+ )
-+)
-+
-+(conditional-store-double-u cstdu DI OP_67 OPE4_3 GR NA
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store double word, update index")
-+(conditional-store-double-u cstdfu DF OP_68 OPE4_3 FR FR-ACCESS
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store double float, update index")
-+
-+(define-pmacro (store-r-simm name mode op regtype attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
-+ (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr)
-+ (.str name "$pack $" regtype "k,@($GRi,$d12)")
-+ (+ pack (.sym regtype k) op GRi d12)
-+ (c-call VOID (.str "@cpu@_write_mem_" mode)
-+ pc (add GRi d12) (.sym regtype k))
-+ profile
-+ )
-+)
-+
-+(store-r-simm stbi QI OP_50 GR NA
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store unsigned byte")
-+(store-r-simm sthi HI OP_51 GR NA
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store unsigned half")
-+(store-r-simm sti SI OP_52 GR NA
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store word")
-+
-+(store-r-simm stbfi QI OP_4E FRint FR-ACCESS
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store byte float")
-+(store-r-simm sthfi HI OP_4F FRint FR-ACCESS
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store half float")
-+(store-r-simm stfi SI OP_55 FRint FR-ACCESS
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store word float")
-+
-+(define-pmacro (store-double-r-simm name mode op regtype attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3)
-+ (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr)
-+ (.str name "$pack $" regtype "doublek,@($GRi,$d12)")
-+ (+ pack (.sym regtype doublek) op GRi d12)
-+ (sequence ((WI address))
-+ (store-double-semantics mode regtype address d12))
-+ profile
-+ )
-+)
-+
-+(store-double-r-simm stdi DI OP_53 GR NA
-+ ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store))
-+ (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
-+ "Store double word")
-+(store-double-r-simm stdfi DF OP_56 FR FR-ACCESS
-+ ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store))
-+ (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
-+ "Store double float")
-+
-+(define-pmacro (store-quad-r-simm name op regtype attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr)
-+ (.str name "$pack $" regtype "k,@($GRi,$d12)")
-+ (+ pack (.sym regtype k) op GRi d12)
-+ (sequence ((WI address))
-+ (store-quad-semantics regtype address d12))
-+ profile
-+ )
-+)
-+
-+(store-quad-r-simm stqi OP_54 GR NA ((fr500 (unit u-gr-store)))
-+ "Store quad word")
-+(store-quad-r-simm stqfi OP_57 FRint FR-ACCESS ()
-+ "Store quad float")
-+
-+(define-pmacro (swap-semantics base offset arg)
-+ (sequence ((WI tmp) (WI address))
-+ (set tmp arg)
-+ (set address (add base offset))
-+ (c-call VOID "@cpu@_check_swap_address" address)
-+ (set arg (c-call WI "@cpu@_read_mem_WI" pc address))
-+ (c-call VOID "@cpu@_write_mem_WI" pc address tmp))
-+)
-+
-+(dni swap
-+ "Swap contents of memory with GR"
-+ ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
-+ (FR400-MAJOR C-2) (FR450-MAJOR C-2))
-+ "swap$pack @($GRi,$GRj),$GRk"
-+ (+ pack GRk OP_03 GRi OPE1_05 GRj)
-+ (swap-semantics GRi GRj GRk)
-+ ((fr400 (unit u-swap)) (fr450 (unit u-swap))
-+ (fr500 (unit u-swap)) (fr550 (unit u-swap)))
-+)
-+
-+(dni "swapi"
-+ "Swap contents of memory with GR"
-+ ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
-+ (FR400-MAJOR C-2) (FR450-MAJOR C-2))
-+ ("swapi$pack @($GRi,$d12),$GRk")
-+ (+ pack GRk OP_4D GRi d12)
-+ (swap-semantics GRi d12 GRk)
-+ ((fr400 (unit u-swap)) (fr450 (unit u-swap))
-+ (fr500 (unit u-swap)) (fr550 (unit u-swap)))
-+)
-+
-+(dni cswap
-+ "Conditionally swap contents of memory with GR"
-+ ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
-+ (FR400-MAJOR C-2) (FR450-MAJOR C-2) CONDITIONAL)
-+ "cswap$pack @($GRi,$GRj),$GRk,$CCi,$cond"
-+ (+ pack GRk OP_65 GRi CCi cond OPE4_2 GRj)
-+ (if (eq CCi (or cond 2))
-+ (swap-semantics GRi GRj GRk))
-+ ((fr400 (unit u-swap)) (fr450 (unit u-swap))
-+ (fr500 (unit u-swap)) (fr550 (unit u-swap)))
-+)
-+
-+(define-pmacro (register-transfer
-+ name op ope reg_src reg_targ pipe attrs profile comment)
-+ (dni name
-+ (comment)
-+ (.splice (UNIT pipe) (.unsplice attrs))
-+ (.str name "$pack $" reg_src ",$" reg_targ)
-+ (+ pack reg_targ op (rs-null) ope reg_src)
-+ (set reg_targ reg_src)
-+ profile
-+ )
-+)
-+
-+(register-transfer movgf OP_03 OPE1_15
-+ GRj FRintk I0
-+ ((FR500-MAJOR I-4) (FR550-MAJOR I-5)
-+ (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS)
-+ ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr))
-+ (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr)))
-+ "transfer gr to fr")
-+(register-transfer movfg OP_03 OPE1_0D
-+ FRintk GRj I0
-+ ((FR500-MAJOR I-4) (FR550-MAJOR I-5)
-+ (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS)
-+ ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr))
-+ (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr)))
-+ "transfer fr to gr")
-+
-+(define-pmacro (nextreg hw r offset) (reg hw (add (index-of r) offset)))
-+
-+(define-pmacro (register-transfer-double-from-gr-semantics cond)
-+ (if cond
-+ (if (eq (index-of GRj) 0)
-+ (sequence ()
-+ (set FRintk 0)
-+ (set (nextreg h-fr_int FRintk 1) 0))
-+ (sequence ()
-+ (set FRintk GRj)
-+ (set (nextreg h-fr_int FRintk 1) (nextreg h-gr GRj 1)))))
-+)
-+
-+(dni movgfd
-+ "move GR for FR double"
-+ ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5)
-+ (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS)
-+ "movgfd$pack $GRj,$FRintk"
-+ (+ pack FRintk OP_03 (rs-null) OPE1_16 GRj)
-+ (register-transfer-double-from-gr-semantics 1)
-+ ; TODO -- doesn't handle second register in the pair
-+ ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr))
-+ (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr)))
-+)
-+
-+(define-pmacro (register-transfer-double-to-gr-semantics cond)
-+ (if (andif (ne (index-of GRj) 0) cond)
-+ (sequence ()
-+ (set GRj FRintk)
-+ (set (nextreg h-gr GRj 1) (nextreg h-fr_int FRintk 1))))
-+)
-+
-+(dni movfgd
-+ "move FR for GR double"
-+ ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5)
-+ (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS)
-+ "movfgd$pack $FRintk,$GRj"
-+ (+ pack FRintk OP_03 (rs-null) OPE1_0E GRj)
-+ (register-transfer-double-to-gr-semantics 1)
-+ ; TODO -- doesn't handle second register in the pair
-+ ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr))
-+ (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr)))
-+)
-+
-+(dni movgfq
-+ "move GR for FR quad"
-+ ((UNIT I0) (FR500-MAJOR I-4) (MACH frv) FR-ACCESS)
-+ "movgfq$pack $GRj,$FRintk"
-+ (+ pack FRintk OP_03 (rs-null) OPE1_17 GRj)
-+ (if (eq (index-of GRj) 0)
-+ (sequence ()
-+ (set FRintk 0)
-+ (set (reg h-fr_int (add (index-of FRintk) 1)) 0)
-+ (set (reg h-fr_int (add (index-of FRintk) 2)) 0)
-+ (set (reg h-fr_int (add (index-of FRintk) 3)) 0))
-+ (sequence ()
-+ (set FRintk GRj)
-+ (set (reg h-fr_int (add (index-of FRintk) 1))
-+ (reg h-gr (add (index-of GRj) 1)))
-+ (set (reg h-fr_int (add (index-of FRintk) 2))
-+ (reg h-gr (add (index-of GRj) 2)))
-+ (set (reg h-fr_int (add (index-of FRintk) 3))
-+ (reg h-gr (add (index-of GRj) 3)))))
-+ ()
-+)
-+
-+(dni movfgq
-+ "move FR for GR quad"
-+ ((UNIT I0) (FR500-MAJOR I-4) (MACH frv) FR-ACCESS)
-+ "movfgq$pack $FRintk,$GRj"
-+ (+ pack FRintk OP_03 (rs-null) OPE1_0F GRj)
-+ (if (ne (index-of GRj) 0)
-+ (sequence ()
-+ (set GRj FRintk)
-+ (set (reg h-gr (add (index-of GRj) 1))
-+ (reg h-fr_int (add (index-of FRintk) 1)))
-+ (set (reg h-gr (add (index-of GRj) 2))
-+ (reg h-fr_int (add (index-of FRintk) 2)))
-+ (set (reg h-gr (add (index-of GRj) 3))
-+ (reg h-fr_int (add (index-of FRintk) 3)))))
-+ ()
-+)
-+
-+(define-pmacro (conditional-register-transfer
-+ name op ope reg_src reg_targ pipe attrs profile comment)
-+ (dni name
-+ (comment)
-+ (.splice (UNIT pipe) CONDITIONAL FR-ACCESS (.unsplice attrs))
-+ (.str name "$pack $" reg_src ",$" reg_targ ",$CCi,$cond")
-+ (+ pack reg_targ op (rs-null) CCi cond ope reg_src)
-+ (if (eq CCi (or cond 2))
-+ (set reg_targ reg_src))
-+ profile
-+ )
-+)
-+
-+(conditional-register-transfer cmovgf OP_69 OPE4_0 GRj FRintk I0
-+ ((FR500-MAJOR I-4) (FR550-MAJOR I-5)
-+ (FR400-MAJOR I-4) (FR450-MAJOR I-4))
-+ ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr))
-+ (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr)))
-+ "transfer gr to fr")
-+(conditional-register-transfer cmovfg OP_69 OPE4_2 FRintk GRj I0
-+ ((FR500-MAJOR I-4) (FR550-MAJOR I-5)
-+ (FR400-MAJOR I-4) (FR450-MAJOR I-4))
-+ ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr))
-+ (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr)))
-+ "transfer fr to gr")
-+
-+
-+(dni cmovgfd
-+ "Conditional move GR to FR double"
-+ ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5)
-+ (FR400-MAJOR I-4) (FR450-MAJOR I-4) CONDITIONAL FR-ACCESS)
-+ "cmovgfd$pack $GRj,$FRintk,$CCi,$cond"
-+ (+ pack FRintk OP_69 (rs-null) CCi cond OPE4_1 GRj)
-+ (register-transfer-double-from-gr-semantics (eq CCi (or cond 2)))
-+ ; TODO -- doesn't handle extra registers in double
-+ ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr))
-+ (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr)))
-+)
-+
-+(dni cmovfgd
-+ "Conditional move FR to GR double"
-+ ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5)
-+ (FR400-MAJOR I-4) (FR450-MAJOR I-4) CONDITIONAL FR-ACCESS)
-+ "cmovfgd$pack $FRintk,$GRj,$CCi,$cond"
-+ (+ pack FRintk OP_69 (rs-null) CCi cond OPE4_3 GRj)
-+ (register-transfer-double-to-gr-semantics (eq CCi (or cond 2)))
-+ ; TODO -- doesn't handle second register in the pair
-+ ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr))
-+ (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr)))
-+)
-+
-+(define-pmacro (register-transfer-spr
-+ name op ope reg_src reg_targ unitname comment)
-+ (dni name
-+ (comment)
-+ ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
-+ (FR400-MAJOR C-2) (FR450-MAJOR C-2))
-+ (.str name "$pack $" reg_src ",$" reg_targ)
-+ (+ pack reg_targ op ope reg_src)
-+ (set reg_targ reg_src)
-+ ((fr400 (unit unitname)) (fr450 (unit unitname))
-+ (fr500 (unit unitname)) (fr550 (unit unitname)))
-+ )
-+)
-+
-+(register-transfer-spr movgs OP_03 OPE1_06 GRj spr u-gr2spr "transfer gr->spr")
-+(register-transfer-spr movsg OP_03 OPE1_07 spr GRj u-spr2gr "transfer spr->gr")
-+
-+; Integer Branch Conditions
-+(define-pmacro (Inev cc) (const BI 0))
-+(define-pmacro (Ira cc) (const BI 1))
-+(define-pmacro (Ieq cc) ( zbit cc))
-+(define-pmacro (Ine cc) (not (zbit cc)))
-+(define-pmacro (Ile cc) ( orif (zbit cc) (xor (nbit cc) (vbit cc))))
-+(define-pmacro (Igt cc) (not (orif (zbit cc) (xor (nbit cc) (vbit cc)))))
-+(define-pmacro (Ilt cc) ( xor (nbit cc) (vbit cc)))
-+(define-pmacro (Ige cc) (not (xor (nbit cc) (vbit cc))))
-+(define-pmacro (Ils cc) ( orif (cbit cc) (zbit cc)))
-+(define-pmacro (Ihi cc) (not (orif (cbit cc) (zbit cc))))
-+(define-pmacro (Ic cc) ( cbit cc))
-+(define-pmacro (Inc cc) (not (cbit cc)))
-+(define-pmacro (In cc) ( nbit cc))
-+(define-pmacro (Ip cc) (not (nbit cc)))
-+(define-pmacro (Iv cc) ( vbit cc))
-+(define-pmacro (Inv cc) (not (vbit cc)))
-+
-+; Float Branch Conditions
-+(define-pmacro (Fnev cc) (const BI 0))
-+(define-pmacro (Fra cc) (const BI 1))
-+(define-pmacro (Fne cc) (orif (lbit cc) (orif (gbit cc) (ubit cc))))
-+(define-pmacro (Feq cc) (ebit cc))
-+(define-pmacro (Flg cc) (orif (lbit cc) (gbit cc)))
-+(define-pmacro (Fue cc) (orif (ebit cc) (ubit cc)))
-+(define-pmacro (Ful cc) (orif (lbit cc) (ubit cc)))
-+(define-pmacro (Fge cc) (orif (ebit cc) (gbit cc)))
-+(define-pmacro (Flt cc) (lbit cc))
-+(define-pmacro (Fuge cc) (orif (ebit cc) (orif (gbit cc) (ubit cc))))
-+(define-pmacro (Fug cc) (orif (gbit cc) (ubit cc)))
-+(define-pmacro (Fle cc) (orif (ebit cc) (lbit cc)))
-+(define-pmacro (Fgt cc) (gbit cc))
-+(define-pmacro (Fule cc) (orif (ebit cc) (orif (lbit cc) (ubit cc))))
-+(define-pmacro (Fu cc) (ubit cc))
-+(define-pmacro (Fo cc) (orif (ebit cc) (orif (lbit cc) (gbit cc))))
-+
-+(define-pmacro (conditional-branch-i prefix cc op cond comment)
-+ (dni (.sym prefix cc)
-+ (comment)
-+ ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1)
-+ (FR400-MAJOR B-1) (FR450-MAJOR B-1))
-+ (.str (.sym prefix cc) "$pack $ICCi_2,$hint,$label16")
-+ (+ pack (.sym ICC_ cc) ICCi_2 op hint label16)
-+ (sequence ()
-+ (c-call VOID "@cpu@_model_branch" label16 hint)
-+ (if (cond ICCi_2)
-+ (set pc label16)))
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+ )
-+)
-+
-+(dni bra
-+ "integer branch equal"
-+ ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1)
-+ (FR400-MAJOR B-1) (FR450-MAJOR B-1))
-+ "bra$pack $hint_taken$label16"
-+ (+ pack ICC_ra (ICCi_2-null) OP_06 hint_taken label16)
-+ (sequence ()
-+ (c-call VOID "@cpu@_model_branch" label16 hint_taken)
-+ (set pc label16))
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(dni bno
-+ "integer branch never"
-+ ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1)
-+ (FR400-MAJOR B-1) (FR450-MAJOR B-1))
-+ "bno$pack$hint_not_taken"
-+ (+ pack ICC_nev (ICCi_2-null) OP_06 hint_not_taken (label16-null))
-+ (c-call VOID "@cpu@_model_branch" label16 hint_not_taken)
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(conditional-branch-i b eq OP_06 Ieq "integer branch equal")
-+(conditional-branch-i b ne OP_06 Ine "integer branch not equal")
-+(conditional-branch-i b le OP_06 Ile "integer branch less or equal")
-+(conditional-branch-i b gt OP_06 Igt "integer branch greater")
-+(conditional-branch-i b lt OP_06 Ilt "integer branch less")
-+(conditional-branch-i b ge OP_06 Ige "integer branch greater or equal")
-+(conditional-branch-i b ls OP_06 Ils "integer branch less or equal unsigned")
-+(conditional-branch-i b hi OP_06 Ihi "integer branch greater unsigned")
-+(conditional-branch-i b c OP_06 Ic "integer branch carry set")
-+(conditional-branch-i b nc OP_06 Inc "integer branch carry clear")
-+(conditional-branch-i b n OP_06 In "integer branch negative")
-+(conditional-branch-i b p OP_06 Ip "integer branch positive")
-+(conditional-branch-i b v OP_06 Iv "integer branch overflow set")
-+(conditional-branch-i b nv OP_06 Inv "integer branch overflow clear")
-+
-+(define-pmacro (conditional-branch-f prefix cc op cond comment)
-+ (dni (.sym prefix cc)
-+ (comment)
-+ ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1)
-+ (FR400-MAJOR B-1) (FR450-MAJOR B-1) FR-ACCESS)
-+ (.str (.sym prefix cc) "$pack $FCCi_2,$hint,$label16")
-+ (+ pack (.sym FCC_ cc) FCCi_2 op hint label16)
-+ (sequence ()
-+ (c-call VOID "@cpu@_model_branch" label16 hint)
-+ (if (cond FCCi_2) (set pc label16)))
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+ )
-+)
-+
-+(dni fbra
-+ "float branch equal"
-+ ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1)
-+ (FR400-MAJOR B-1) (FR450-MAJOR B-1) FR-ACCESS)
-+ "fbra$pack $hint_taken$label16"
-+ (+ pack FCC_ra (FCCi_2-null) OP_07 hint_taken label16)
-+ (sequence ()
-+ (c-call VOID "@cpu@_model_branch" label16 hint_taken)
-+ (set pc label16))
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(dni fbno
-+ "float branch never"
-+ ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1)
-+ (FR400-MAJOR B-1) (FR450-MAJOR B-1) FR-ACCESS)
-+ "fbno$pack$hint_not_taken"
-+ (+ pack FCC_nev (FCCi_2-null) OP_07 hint_not_taken (label16-null))
-+ (c-call VOID "@cpu@_model_branch" label16 hint_not_taken)
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(conditional-branch-f fb ne OP_07 Fne "float branch not equal")
-+(conditional-branch-f fb eq OP_07 Feq "float branch equal")
-+(conditional-branch-f fb lg OP_07 Flg "float branch less or greater")
-+(conditional-branch-f fb ue OP_07 Fue "float branch unordered or equal")
-+(conditional-branch-f fb ul OP_07 Ful "float branch unordered or less")
-+(conditional-branch-f fb ge OP_07 Fge "float branch greater or equal")
-+(conditional-branch-f fb lt OP_07 Flt "float branch less")
-+(conditional-branch-f fb uge OP_07 Fuge "float branch unordered, greater,equal")
-+(conditional-branch-f fb ug OP_07 Fug "float branch unordered or greater")
-+(conditional-branch-f fb le OP_07 Fle "float branch less or equal")
-+(conditional-branch-f fb gt OP_07 Fgt "float branch greater")
-+(conditional-branch-f fb ule OP_07 Fule "float branch unordered, less or equal")
-+(conditional-branch-f fb u OP_07 Fu "float branch unordered")
-+(conditional-branch-f fb o OP_07 Fo "float branch ordered")
-+
-+(define-pmacro (ctrlr-branch-semantics cond ccond)
-+ (sequence ((SI tmp))
-+ (set tmp (sub (spr-lcr) 1))
-+ (set (spr-lcr) tmp)
-+ (if cond
-+ (if (eq ccond 0)
-+ (if (ne tmp 0)
-+ (set pc (spr-lr)))
-+ (if (eq tmp 0)
-+ (set pc (spr-lr))))))
-+)
-+
-+(dni bctrlr
-+ "LCR conditional branch to lr"
-+ ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2)
-+ (FR400-MAJOR B-2) (FR450-MAJOR B-2))
-+ ("bctrlr$pack $ccond,$hint")
-+ (+ pack (cond-null) (ICCi_2-null) OP_0E hint OPE3_01 ccond (s12-null))
-+ (sequence ()
-+ (c-call VOID "@cpu@_model_branch" (spr-lr) hint)
-+ (ctrlr-branch-semantics (const BI 1) ccond))
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(define-pmacro (conditional-branch-cclr prefix cc i-f op ope cond attr comment)
-+ (dni (.sym prefix cc lr)
-+ (comment)
-+ ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3)
-+ (FR400-MAJOR B-3) (FR450-MAJOR B-3) attr)
-+ (.str (.sym prefix cc lr) "$pack $" i-f "CCi_2,$hint")
-+ (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op hint ope
-+ (ccond-null) (s12-null))
-+ (sequence ()
-+ (c-call VOID "@cpu@_model_branch" (spr-lr) hint)
-+ (if (cond (.sym i-f CCi_2)) (set pc (spr-lr))))
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+ )
-+)
-+
-+(dni bralr
-+ "integer cclr branch always"
-+ ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3)
-+ (FR400-MAJOR B-3) (FR450-MAJOR B-3))
-+ "bralr$pack$hint_taken"
-+ (+ pack ICC_ra (ICCi_2-null) OP_0E hint_taken OPE3_02 (ccond-null) (s12-null))
-+ (sequence ()
-+ (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken)
-+ (set pc (spr-lr)))
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(dni bnolr
-+ "integer cclr branch never"
-+ ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3)
-+ (FR400-MAJOR B-3) (FR450-MAJOR B-3))
-+ "bnolr$pack$hint_not_taken"
-+ (+ pack ICC_nev (ICCi_2-null) OP_0E hint_not_taken OPE3_02 (ccond-null) (s12-null))
-+ (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken)
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(conditional-branch-cclr b eq I OP_0E OPE3_02 Ieq NA "integer cclr branch equal")
-+(conditional-branch-cclr b ne I OP_0E OPE3_02 Ine NA "integer cclr branch not equal")
-+(conditional-branch-cclr b le I OP_0E OPE3_02 Ile NA "integer cclr branch less or equal")
-+(conditional-branch-cclr b gt I OP_0E OPE3_02 Igt NA "integer cclr branch greater")
-+(conditional-branch-cclr b lt I OP_0E OPE3_02 Ilt NA "integer cclr branch less")
-+(conditional-branch-cclr b ge I OP_0E OPE3_02 Ige NA "integer cclr branch greater or equal")
-+(conditional-branch-cclr b ls I OP_0E OPE3_02 Ils NA "integer cclr branch less or equal unsigned")
-+(conditional-branch-cclr b hi I OP_0E OPE3_02 Ihi NA "integer cclr branch greater unsigned")
-+(conditional-branch-cclr b c I OP_0E OPE3_02 Ic NA "integer cclr branch carry set")
-+(conditional-branch-cclr b nc I OP_0E OPE3_02 Inc NA "integer cclr branch carry clear")
-+(conditional-branch-cclr b n I OP_0E OPE3_02 In NA "integer cclr branch negative")
-+(conditional-branch-cclr b p I OP_0E OPE3_02 Ip NA "integer cclr branch positive")
-+(conditional-branch-cclr b v I OP_0E OPE3_02 Iv NA "integer cclr branch overflow set")
-+(conditional-branch-cclr b nv I OP_0E OPE3_02 Inv NA "integer cclr branch overflow clear")
-+
-+(dni fbralr
-+ "float cclr branch always"
-+ ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3)
-+ (FR400-MAJOR B-3) (FR450-MAJOR B-3) FR-ACCESS)
-+ "fbralr$pack$hint_taken"
-+ (+ pack FCC_ra (FCCi_2-null) OP_0E hint_taken OPE3_06 (ccond-null) (s12-null))
-+ (sequence ()
-+ (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken)
-+ (set pc (spr-lr)))
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(dni fbnolr
-+ "float cclr branch never"
-+ ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3)
-+ (FR400-MAJOR B-3) (FR450-MAJOR B-3) FR-ACCESS)
-+ "fbnolr$pack$hint_not_taken"
-+ (+ pack FCC_nev (FCCi_2-null) OP_0E hint_not_taken OPE3_06 (ccond-null) (s12-null))
-+ (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken)
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(conditional-branch-cclr fb eq F OP_0E OPE3_06 Feq FR-ACCESS "float cclr branch equal")
-+(conditional-branch-cclr fb ne F OP_0E OPE3_06 Fne FR-ACCESS "float cclr branch not equal")
-+(conditional-branch-cclr fb lg F OP_0E OPE3_06 Flg FR-ACCESS "float branch less or greater")
-+(conditional-branch-cclr fb ue F OP_0E OPE3_06 Fue FR-ACCESS "float branch unordered or equal")
-+(conditional-branch-cclr fb ul F OP_0E OPE3_06 Ful FR-ACCESS "float branch unordered or less")
-+(conditional-branch-cclr fb ge F OP_0E OPE3_06 Fge FR-ACCESS "float branch greater or equal")
-+(conditional-branch-cclr fb lt F OP_0E OPE3_06 Flt FR-ACCESS "float branch less")
-+(conditional-branch-cclr fb uge F OP_0E OPE3_06 Fuge FR-ACCESS "float branch unordered, greater, equal")
-+(conditional-branch-cclr fb ug F OP_0E OPE3_06 Fug FR-ACCESS "float branch unordered or greater")
-+(conditional-branch-cclr fb le F OP_0E OPE3_06 Fle FR-ACCESS "float branch less or equal")
-+(conditional-branch-cclr fb gt F OP_0E OPE3_06 Fgt FR-ACCESS "float branch greater")
-+(conditional-branch-cclr fb ule F OP_0E OPE3_06 Fule FR-ACCESS "float branch unordered, less or equal")
-+(conditional-branch-cclr fb u F OP_0E OPE3_06 Fu FR-ACCESS "float branch unordered")
-+(conditional-branch-cclr fb o F OP_0E OPE3_06 Fo FR-ACCESS "float branch ordered")
-+
-+(define-pmacro (conditional-branch-ctrlr prefix cc i-f op ope cond attr comment)
-+ (dni (.sym prefix cc lr)
-+ (comment)
-+ ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2)
-+ (FR400-MAJOR B-2) (FR450-MAJOR B-2) attr)
-+ (.str (.sym prefix cc lr) "$pack $" i-f "CCi_2,$ccond,$hint")
-+ (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op hint ope ccond (s12-null))
-+ (sequence ()
-+ (c-call VOID "@cpu@_model_branch" (spr-lr) hint)
-+ (ctrlr-branch-semantics (cond (.sym i-f CCi_2)) ccond))
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+ )
-+)
-+
-+(dni bcralr
-+ "integer ctrlr branch always"
-+ ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2)
-+ (FR400-MAJOR B-2) (FR450-MAJOR B-2))
-+ "bcralr$pack $ccond$hint_taken"
-+ (+ pack ICC_ra (ICCi_2-null) OP_0E hint_taken OPE3_03 ccond (s12-null))
-+ (sequence ()
-+ (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken)
-+ (ctrlr-branch-semantics (const BI 1) ccond))
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(dni bcnolr
-+ "integer ctrlr branch never"
-+ ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2)
-+ (FR400-MAJOR B-2) (FR450-MAJOR B-2))
-+ "bcnolr$pack$hint_not_taken"
-+ (+ pack ICC_nev (ICCi_2-null) OP_0E hint_not_taken OPE3_03 (ccond-null) (s12-null))
-+ (sequence ()
-+ (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken)
-+ (ctrlr-branch-semantics (const BI 0) ccond))
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(conditional-branch-ctrlr bc eq I OP_0E OPE3_03 Ieq NA "integer ctrlr branch equal")
-+(conditional-branch-ctrlr bc ne I OP_0E OPE3_03 Ine NA "integer ctrlr branch not equal")
-+(conditional-branch-ctrlr bc le I OP_0E OPE3_03 Ile NA "integer ctrlr branch less equal")
-+(conditional-branch-ctrlr bc gt I OP_0E OPE3_03 Igt NA "integer ctrlr branch greater")
-+(conditional-branch-ctrlr bc lt I OP_0E OPE3_03 Ilt NA "integer ctrlr branch less")
-+(conditional-branch-ctrlr bc ge I OP_0E OPE3_03 Ige NA "integer ctrlr branch greater equal")
-+(conditional-branch-ctrlr bc ls I OP_0E OPE3_03 Ils NA "integer ctrlr branch less equal unsigned")
-+(conditional-branch-ctrlr bc hi I OP_0E OPE3_03 Ihi NA "integer ctrlr branch greater unsigned")
-+(conditional-branch-ctrlr bc c I OP_0E OPE3_03 Ic NA "integer ctrlr branch carry set")
-+(conditional-branch-ctrlr bc nc I OP_0E OPE3_03 Inc NA "integer ctrlr branch carry clear")
-+(conditional-branch-ctrlr bc n I OP_0E OPE3_03 In NA "integer ctrlr branch negative")
-+(conditional-branch-ctrlr bc p I OP_0E OPE3_03 Ip NA "integer ctrlr branch positive")
-+(conditional-branch-ctrlr bc v I OP_0E OPE3_03 Iv NA "integer ctrlr branch overflow set")
-+(conditional-branch-ctrlr bc nv I OP_0E OPE3_03 Inv NA "integer ctrlr branch overflow clear")
-+
-+(dni fcbralr
-+ "float ctrlr branch always"
-+ ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2)
-+ (FR400-MAJOR B-2) (FR450-MAJOR B-2) FR-ACCESS)
-+ "fcbralr$pack $ccond$hint_taken"
-+ (+ pack FCC_ra (FCCi_2-null) OP_0E hint_taken OPE3_07 ccond (s12-null))
-+ (sequence ()
-+ (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken)
-+ (ctrlr-branch-semantics (const BI 1) ccond))
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(dni fcbnolr
-+ "float ctrlr branch never"
-+ ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2)
-+ (FR400-MAJOR B-2) (FR450-MAJOR B-2) FR-ACCESS)
-+ "fcbnolr$pack$hint_not_taken"
-+ (+ pack FCC_nev (FCCi_2-null) OP_0E hint_not_taken OPE3_07 (ccond-null) (s12-null))
-+ (sequence ()
-+ (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken)
-+ (ctrlr-branch-semantics (const BI 0) ccond))
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(conditional-branch-ctrlr fcb eq F OP_0E OPE3_07 Feq FR-ACCESS "float cclr branch equal")
-+(conditional-branch-ctrlr fcb ne F OP_0E OPE3_07 Fne FR-ACCESS "float cclr branch not equal")
-+(conditional-branch-ctrlr fcb lg F OP_0E OPE3_07 Flg FR-ACCESS "float branch less or greater")
-+(conditional-branch-ctrlr fcb ue F OP_0E OPE3_07 Fue FR-ACCESS "float branch unordered or equal")
-+(conditional-branch-ctrlr fcb ul F OP_0E OPE3_07 Ful FR-ACCESS "float branch unordered or less")
-+(conditional-branch-ctrlr fcb ge F OP_0E OPE3_07 Fge FR-ACCESS "float branch greater or equal")
-+(conditional-branch-ctrlr fcb lt F OP_0E OPE3_07 Flt FR-ACCESS "float branch less")
-+(conditional-branch-ctrlr fcb uge F OP_0E OPE3_07 Fuge FR-ACCESS "float branch unordered, greater, equal")
-+(conditional-branch-ctrlr fcb ug F OP_0E OPE3_07 Fug FR-ACCESS "float branch unordered or greater")
-+(conditional-branch-ctrlr fcb le F OP_0E OPE3_07 Fle FR-ACCESS "float branch less or equal")
-+(conditional-branch-ctrlr fcb gt F OP_0E OPE3_07 Fgt FR-ACCESS "float branch greater")
-+(conditional-branch-ctrlr fcb ule F OP_0E OPE3_07 Fule FR-ACCESS "float branch unordered, less or equal")
-+(conditional-branch-ctrlr fcb u F OP_0E OPE3_07 Fu FR-ACCESS "float branch unordered")
-+(conditional-branch-ctrlr fcb o F OP_0E OPE3_07 Fo FR-ACCESS "float branch ordered")
-+
-+(define-pmacro (jump-and-link-semantics base offset LI)
-+ (sequence ()
-+ (if (eq LI 1)
-+ (c-call VOID "@cpu@_set_write_next_vliw_addr_to_LR" 1))
-+ ; Target address gets aligned here
-+ (set pc (and (add base offset) #xfffffffc))
-+ (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken
-+)
-+
-+(dni jmpl
-+ "jump and link"
-+ ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
-+ (FR400-MAJOR I-5) (FR450-MAJOR I-5))
-+ "jmpl$pack @($GRi,$GRj)"
-+ (+ pack (misc-null-1) (LI-off) OP_0C GRi (misc-null-2) GRj)
-+ (jump-and-link-semantics GRi GRj LI)
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(dann callann "call annotation" SI "call_annotation" "at")
-+
-+(dni calll
-+ "call and link"
-+ ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
-+ (FR400-MAJOR I-5) (FR450-MAJOR I-5))
-+ "calll$pack $callann($GRi,$GRj)"
-+ (+ pack (misc-null-1) (LI-on) OP_0C GRi (misc-null-2) GRj)
-+ (jump-and-link-semantics GRi GRj LI)
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(dni jmpil
-+ "jump immediate and link"
-+ ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
-+ (FR400-MAJOR I-5) (FR450-MAJOR I-5))
-+ "jmpil$pack @($GRi,$s12)"
-+ (+ pack (misc-null-1) (LI-off) OP_0D GRi s12)
-+ (jump-and-link-semantics GRi s12 LI)
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(dni callil
-+ "call immediate and link"
-+ ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
-+ (FR400-MAJOR I-5) (FR450-MAJOR I-5))
-+ "callil$pack @($GRi,$s12)"
-+ (+ pack (misc-null-1) (LI-on) OP_0D GRi s12)
-+ (jump-and-link-semantics GRi s12 LI)
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(dni call
-+ "call and link"
-+ ((UNIT B0) (FR500-MAJOR B-4) (FR550-MAJOR B-4)
-+ (FR400-MAJOR B-4) (FR450-MAJOR B-4))
-+ "call$pack $label24"
-+ (+ pack OP_0F label24)
-+ (sequence ()
-+ (c-call VOID "@cpu@_set_write_next_vliw_addr_to_LR" 1)
-+ (set pc label24)
-+ (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(dni rett
-+ "return from trap"
-+ ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
-+ (FR400-MAJOR C-2) (FR450-MAJOR C-2) PRIVILEGED)
-+ "rett$pack $debug"
-+ (+ pack (misc-null-1) debug OP_05 (rs-null) (s12-null))
-+ ; frv_rett handles operating vs user mode
-+ (sequence ()
-+ (set pc (c-call UWI "frv_rett" pc debug))
-+ (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken
-+ ()
-+)
-+
-+(dni rei
-+ "run exception instruction"
-+ ((UNIT C) (FR500-MAJOR C-1) (MACH frv) PRIVILEGED)
-+ "rei$pack $eir"
-+ (+ pack (rd-null) OP_37 eir (s12-null))
-+ (nop) ; for now
-+ ()
-+)
-+
-+(define-pmacro (trap-semantics cond base offset)
-+ (if cond
-+ (sequence ()
-+ ; This is defered to frv_itrap because for the breakpoint
-+ ; case we want to change as little of the machine state as
-+ ; possible.
-+ ;
-+ ; PCSR=PC
-+ ; PSR.PS=PSR.S
-+ ; PSR.ET=0
-+ ; if PSR.ESR==1
-+ ; SR0 through SR3=GR4 through GR7
-+ ; TBR.TT=0x80 + ((GRi + s12) & 0x7f)
-+ ; PC=TBR
-+ ; We still should indicate what is modified by this insn.
-+ (clobber (spr-pcsr))
-+ (clobber psr_ps)
-+ (clobber psr_et)
-+ (clobber tbr_tt)
-+ (if (ne psr_esr (const 0))
-+ (sequence ()
-+ (clobber (spr-sr0))
-+ (clobber (spr-sr1))
-+ (clobber (spr-sr2))
-+ (clobber (spr-sr3))))
-+ ; frv_itrap handles operating vs user mode
-+ (c-call VOID "frv_itrap" pc base offset)))
-+)
-+
-+(define-pmacro (trap-r prefix cc i-f op ope cond attr comment)
-+ (dni (.sym prefix cc)
-+ (comment)
-+ ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
-+ (FR400-MAJOR C-1) (FR450-MAJOR C-1) attr)
-+ (.str (.sym prefix cc) "$pack $" i-f "CCi_2,$GRi,$GRj")
-+ (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op GRi (misc-null-3) ope GRj)
-+ (trap-semantics (cond (.sym i-f CCi_2)) GRi GRj)
-+ ((fr400 (unit u-trap)) (fr450 (unit u-trap))
-+ (fr500 (unit u-trap)) (fr550 (unit u-trap)))
-+ )
-+)
-+
-+(dni tra
-+ "integer trap always"
-+ ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
-+ (FR400-MAJOR C-1) (FR450-MAJOR C-1))
-+ "tra$pack $GRi,$GRj"
-+ (+ pack ICC_ra (ICCi_2-null) OP_04 GRi (misc-null-3) OPE4_0 GRj)
-+ (trap-semantics (const BI 1) GRi GRj)
-+ ((fr400 (unit u-trap)) (fr450 (unit u-trap))
-+ (fr500 (unit u-trap)) (fr550 (unit u-trap)))
-+)
-+
-+(dni tno
-+ "integer trap never"
-+ ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
-+ (FR400-MAJOR C-1) (FR450-MAJOR C-1))
-+ "tno$pack"
-+ (+ pack ICC_nev (ICCi_2-null) OP_04 (GRi-null) (misc-null-3) OPE4_0 (GRj-null))
-+ (trap-semantics (const BI 0) GRi GRj)
-+ ((fr400 (unit u-trap)) (fr450 (unit u-trap))
-+ (fr500 (unit u-trap)) (fr550 (unit u-trap)))
-+)
-+
-+(trap-r t eq I OP_04 OPE4_0 Ieq NA "integer trap equal")
-+(trap-r t ne I OP_04 OPE4_0 Ine NA "integer trap not equal")
-+(trap-r t le I OP_04 OPE4_0 Ile NA "integer trap less or equal")
-+(trap-r t gt I OP_04 OPE4_0 Igt NA "integer trap greater")
-+(trap-r t lt I OP_04 OPE4_0 Ilt NA "integer trap less")
-+(trap-r t ge I OP_04 OPE4_0 Ige NA "integer trap greater or equal")
-+(trap-r t ls I OP_04 OPE4_0 Ils NA "integer trap less or equal unsigned")
-+(trap-r t hi I OP_04 OPE4_0 Ihi NA "integer trap greater unsigned")
-+(trap-r t c I OP_04 OPE4_0 Ic NA "integer trap carry set")
-+(trap-r t nc I OP_04 OPE4_0 Inc NA "integer trap carry clear")
-+(trap-r t n I OP_04 OPE4_0 In NA "integer trap negative")
-+(trap-r t p I OP_04 OPE4_0 Ip NA "integer trap positive")
-+(trap-r t v I OP_04 OPE4_0 Iv NA "integer trap overflow set")
-+(trap-r t nv I OP_04 OPE4_0 Inv NA "integer trap overflow clear")
-+
-+(dni ftra
-+ "float trap always"
-+ ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
-+ (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS)
-+ "ftra$pack $GRi,$GRj"
-+ (+ pack FCC_ra (FCCi_2-null) OP_04 GRi (misc-null-3) OPE4_1 GRj)
-+ (trap-semantics (const BI 1) GRi GRj)
-+ ((fr400 (unit u-trap)) (fr450 (unit u-trap))
-+ (fr500 (unit u-trap)) (fr550 (unit u-trap)))
-+)
-+
-+(dni ftno
-+ "flost trap never"
-+ ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
-+ (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS)
-+ "ftno$pack"
-+ (+ pack FCC_nev (FCCi_2-null) OP_04 (GRi-null) (misc-null-3) OPE4_1 (GRj-null))
-+ (trap-semantics (const BI 0) GRi GRj)
-+ ((fr400 (unit u-trap)) (fr450 (unit u-trap))
-+ (fr500 (unit u-trap)) (fr550 (unit u-trap)))
-+)
-+
-+(trap-r ft ne F OP_04 OPE4_1 Fne FR-ACCESS "float trap not equal")
-+(trap-r ft eq F OP_04 OPE4_1 Feq FR-ACCESS "float trap equal")
-+(trap-r ft lg F OP_04 OPE4_1 Flg FR-ACCESS "float trap greater or less")
-+(trap-r ft ue F OP_04 OPE4_1 Fue FR-ACCESS "float trap unordered or equal")
-+(trap-r ft ul F OP_04 OPE4_1 Ful FR-ACCESS "float trap unordered or less")
-+(trap-r ft ge F OP_04 OPE4_1 Fge FR-ACCESS "float trap greater or equal")
-+(trap-r ft lt F OP_04 OPE4_1 Flt FR-ACCESS "float trap less")
-+(trap-r ft uge F OP_04 OPE4_1 Fuge FR-ACCESS "float trap unordered greater or equal")
-+(trap-r ft ug F OP_04 OPE4_1 Fug FR-ACCESS "float trap unordered or greater")
-+(trap-r ft le F OP_04 OPE4_1 Fle FR-ACCESS "float trap less or equal")
-+(trap-r ft gt F OP_04 OPE4_1 Fgt FR-ACCESS "float trap greater")
-+(trap-r ft ule F OP_04 OPE4_1 Fule FR-ACCESS "float trap unordered less or equal")
-+(trap-r ft u F OP_04 OPE4_1 Fu FR-ACCESS "float trap unordered")
-+(trap-r ft o F OP_04 OPE4_1 Fo FR-ACCESS "float trap ordered")
-+
-+(define-pmacro (trap-immed prefix cc i-f op cond attr comment)
-+ (dni (.sym prefix cc)
-+ (comment)
-+ ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
-+ (FR400-MAJOR C-1) (FR450-MAJOR C-1) attr)
-+ (.str (.sym prefix cc) "$pack $" i-f "CCi_2,$GRi,$s12")
-+ (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op GRi s12)
-+ (trap-semantics (cond (.sym i-f CCi_2)) GRi s12)
-+ ((fr400 (unit u-trap)) (fr450 (unit u-trap))
-+ (fr500 (unit u-trap)) (fr550 (unit u-trap)))
-+ )
-+)
-+
-+(dni tira
-+ "integer trap always"
-+ ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
-+ (FR400-MAJOR C-1) (FR450-MAJOR C-1))
-+ "tira$pack $GRi,$s12"
-+ (+ pack ICC_ra (ICCi_2-null) OP_1C GRi s12)
-+ (trap-semantics (const BI 1) GRi s12)
-+ ((fr400 (unit u-trap)) (fr450 (unit u-trap))
-+ (fr500 (unit u-trap)) (fr550 (unit u-trap)))
-+)
-+
-+(dni tino
-+ "integer trap never"
-+ ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
-+ (FR400-MAJOR C-1) (FR450-MAJOR C-1))
-+ "tino$pack"
-+ (+ pack ICC_nev (ICCi_2-null) OP_1C (GRi-null) (s12-null))
-+ (trap-semantics (const BI 0) GRi s12)
-+ ((fr400 (unit u-trap)) (fr450 (unit u-trap))
-+ (fr500 (unit u-trap)) (fr550 (unit u-trap)))
-+)
-+
-+(trap-immed ti eq I OP_1C Ieq NA "integer trap equal")
-+(trap-immed ti ne I OP_1C Ine NA "integer trap not equal")
-+(trap-immed ti le I OP_1C Ile NA "integer trap less or equal")
-+(trap-immed ti gt I OP_1C Igt NA "integer trap greater")
-+(trap-immed ti lt I OP_1C Ilt NA "integer trap less")
-+(trap-immed ti ge I OP_1C Ige NA "integer trap greater or equal")
-+(trap-immed ti ls I OP_1C Ils NA "integer trap less or equal unsigned")
-+(trap-immed ti hi I OP_1C Ihi NA "integer trap greater unsigned")
-+(trap-immed ti c I OP_1C Ic NA "integer trap carry set")
-+(trap-immed ti nc I OP_1C Inc NA "integer trap carry clear")
-+(trap-immed ti n I OP_1C In NA "integer trap negative")
-+(trap-immed ti p I OP_1C Ip NA "integer trap positive")
-+(trap-immed ti v I OP_1C Iv NA "integer trap overflow set")
-+(trap-immed ti nv I OP_1C Inv NA "integer trap overflow clear")
-+
-+(dni ftira
-+ "float trap always"
-+ ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
-+ (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS)
-+ "ftira$pack $GRi,$s12"
-+ (+ pack FCC_ra (ICCi_2-null) OP_1D GRi s12)
-+ (trap-semantics (const BI 1) GRi s12)
-+ ((fr400 (unit u-trap))
-+ (fr500 (unit u-trap)) (fr550 (unit u-trap)))
-+)
-+
-+(dni ftino
-+ "float trap never"
-+ ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
-+ (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS)
-+ "ftino$pack"
-+ (+ pack FCC_nev (FCCi_2-null) OP_1D (GRi-null) (s12-null))
-+ (trap-semantics (const BI 0) GRi s12)
-+ ((fr400 (unit u-trap)) (fr450 (unit u-trap))
-+ (fr500 (unit u-trap)) (fr550 (unit u-trap)))
-+)
-+
-+(trap-immed fti ne F OP_1D Fne FR-ACCESS "float trap not equal")
-+(trap-immed fti eq F OP_1D Feq FR-ACCESS "float trap equal")
-+(trap-immed fti lg F OP_1D Flg FR-ACCESS "float trap greater or less")
-+(trap-immed fti ue F OP_1D Fue FR-ACCESS "float trap unordered or equal")
-+(trap-immed fti ul F OP_1D Ful FR-ACCESS "float trap unordered or less")
-+(trap-immed fti ge F OP_1D Fge FR-ACCESS "float trap greater or equal")
-+(trap-immed fti lt F OP_1D Flt FR-ACCESS "float trap less")
-+(trap-immed fti uge F OP_1D Fuge FR-ACCESS "float trap unordered greater or equal")
-+(trap-immed fti ug F OP_1D Fug FR-ACCESS "float trap unordered or greater")
-+(trap-immed fti le F OP_1D Fle FR-ACCESS "float trap less or equal")
-+(trap-immed fti gt F OP_1D Fgt FR-ACCESS "float trap greater")
-+(trap-immed fti ule F OP_1D Fule FR-ACCESS "float trap unordered less or equal")
-+(trap-immed fti u F OP_1D Fu FR-ACCESS "float trap unordered")
-+(trap-immed fti o F OP_1D Fo FR-ACCESS "float trap ordered")
-+
-+(dni break
-+ "break trap"
-+ ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
-+ (FR400-MAJOR C-1) (FR450-MAJOR C-1))
-+ "break$pack"
-+ (+ pack (rd-null) OP_04 (rs-null) (misc-null-3) OPE4_3 (GRj-null))
-+ (sequence ()
-+ ; This is defered to frv_break because for the breakpoint
-+ ; case we want to change as little of the machine state as
-+ ; possible.
-+ ;
-+ ; BPCSR=PC
-+ ; BPSR.BS=PSR.S
-+ ; BPSR.BET=PSR.ET
-+ ; PSR.S=1
-+ ; PSR.ET=0
-+ ; TBR.TT=0xff
-+ ; PC=TBR
-+ ; We still should indicate what is modified by this insn.
-+ (clobber (spr-bpcsr))
-+ (clobber bpsr_bs)
-+ (clobber bpsr_bet)
-+ (clobber psr_s)
-+ (clobber psr_et)
-+ (clobber tbr_tt)
-+ (c-call VOID "frv_break"))
-+ ()
-+)
-+
-+(dni mtrap
-+ "media trap"
-+ ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1)
-+ (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS)
-+ "mtrap$pack"
-+ (+ pack (rd-null) OP_04 (rs-null) (misc-null-3) OPE4_2 (GRj-null))
-+ (c-call VOID "frv_mtrap")
-+ ()
-+)
-+
-+(define-pmacro (condition-code-logic name operation ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT B01) (FR500-MAJOR B-6) (FR550-MAJOR B-6)
-+ (FR400-MAJOR B-6) (FR450-MAJOR B-6))
-+ (.str name "$pack $CRi,$CRj,$CRk")
-+ (+ pack (misc-null-6) CRk OP_0A (misc-null-7) CRi ope (misc-null-8) CRj)
-+ (set CRk (c-call UQI "@cpu@_cr_logic" operation CRi CRj))
-+ ()
-+ )
-+)
-+(define-pmacro (op-andcr) 0)
-+(define-pmacro (op-orcr) 1)
-+(define-pmacro (op-xorcr) 2)
-+(define-pmacro (op-nandcr) 3)
-+(define-pmacro (op-norcr) 4)
-+(define-pmacro (op-andncr) 5)
-+(define-pmacro (op-orncr) 6)
-+(define-pmacro (op-nandncr) 7)
-+(define-pmacro (op-norncr) 8)
-+
-+(define-pmacro (cr-true) 3)
-+(define-pmacro (cr-false) 2)
-+(define-pmacro (cr-undefined) 0)
-+
-+(condition-code-logic andcr (op-andcr) OPE1_08 "and condition code regs")
-+(condition-code-logic orcr (op-orcr) OPE1_09 "or condition code regs")
-+(condition-code-logic xorcr (op-xorcr) OPE1_0A "xor condition code regs")
-+(condition-code-logic nandcr (op-nandcr) OPE1_0C "nand condition code regs")
-+(condition-code-logic norcr (op-norcr) OPE1_0D "nor condition code regs")
-+(condition-code-logic andncr (op-andncr) OPE1_10 "andn condition code regs")
-+(condition-code-logic orncr (op-orncr) OPE1_11 "orn condition code regs")
-+(condition-code-logic nandncr (op-nandncr) OPE1_14 "nandn condition code regs")
-+(condition-code-logic norncr (op-norncr) OPE1_15 "norn condition code regs")
-+
-+(dni notcr
-+ ("not cccr register")
-+ ((UNIT B01) (FR500-MAJOR B-6) (FR550-MAJOR B-6)
-+ (FR400-MAJOR B-6) (FR450-MAJOR B-6))
-+ (.str notcr "$pack $CRj,$CRk")
-+ (+ pack (misc-null-6) CRk OP_0A (rs-null) OPE1_0B (misc-null-8) CRj)
-+ (set CRk (xor CRj 1))
-+ ()
-+)
-+
-+(define-pmacro (check-semantics cond cr)
-+ (if cond (set cr (cr-true)) (set cr (cr-false)))
-+)
-+
-+(define-pmacro (check-int-condition-code prefix cc op cond comment)
-+ (dni (.sym prefix cc)
-+ (comment)
-+ ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
-+ (FR400-MAJOR B-5) (FR450-MAJOR B-5))
-+ (.str (.sym prefix cc) "$pack $ICCi_3,$CRj_int")
-+ (+ pack (.sym ICC_ cc) CRj_int op (misc-null-5) ICCi_3)
-+ (check-semantics (cond ICCi_3) CRj_int)
-+ ((fr400 (unit u-check)) (fr450 (unit u-check))
-+ (fr500 (unit u-check)) (fr550 (unit u-check)))
-+ )
-+)
-+
-+(dni ckra
-+ "check integer cc always"
-+ ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
-+ (FR400-MAJOR B-5) (FR450-MAJOR B-5))
-+ "ckra$pack $CRj_int"
-+ (+ pack ICC_ra CRj_int OP_08 (misc-null-5) (ICCi_3-null))
-+ (check-semantics (const BI 1) CRj_int)
-+ ((fr400 (unit u-check)) (fr450 (unit u-check))
-+ (fr500 (unit u-check)) (fr550 (unit u-check)))
-+)
-+
-+(dni ckno
-+ "check integer cc never"
-+ ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
-+ (FR400-MAJOR B-5) (FR450-MAJOR B-5))
-+ "ckno$pack $CRj_int"
-+ (+ pack ICC_nev CRj_int OP_08 (misc-null-5) (ICCi_3-null))
-+ (check-semantics (const BI 0) CRj_int)
-+ ((fr400 (unit u-check)) (fr450 (unit u-check))
-+ (fr500 (unit u-check)) (fr550 (unit u-check)))
-+)
-+
-+(check-int-condition-code ck eq OP_08 Ieq "check integer cc equal")
-+(check-int-condition-code ck ne OP_08 Ine "check integer cc not equal")
-+(check-int-condition-code ck le OP_08 Ile "check integer cc less or equal")
-+(check-int-condition-code ck gt OP_08 Igt "check integer cc greater")
-+(check-int-condition-code ck lt OP_08 Ilt "check integer cc less")
-+(check-int-condition-code ck ge OP_08 Ige "check integer cc greater or equal")
-+(check-int-condition-code ck ls OP_08 Ils "check integer cc less or equal unsigned")
-+(check-int-condition-code ck hi OP_08 Ihi "check integer cc greater unsigned")
-+(check-int-condition-code ck c OP_08 Ic "check integer cc carry set")
-+(check-int-condition-code ck nc OP_08 Inc "check integer cc carry clear")
-+(check-int-condition-code ck n OP_08 In "check integer cc negative")
-+(check-int-condition-code ck p OP_08 Ip "check integer cc positive")
-+(check-int-condition-code ck v OP_08 Iv "check integer cc overflow set")
-+(check-int-condition-code ck nv OP_08 Inv "check integer cc overflow clear")
-+
-+(define-pmacro (check-float-condition-code prefix cc op cond comment)
-+ (dni (.sym prefix cc)
-+ (comment)
-+ ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
-+ (FR400-MAJOR B-5) (FR450-MAJOR B-5) FR-ACCESS)
-+ (.str (.sym prefix cc) "$pack $FCCi_3,$CRj_float")
-+ (+ pack (.sym FCC_ cc) CRj_float op (misc-null-5) FCCi_3)
-+ (check-semantics (cond FCCi_3) CRj_float)
-+ ((fr400 (unit u-check)) (fr450 (unit u-check))
-+ (fr500 (unit u-check)) (fr550 (unit u-check)))
-+ )
-+)
-+
-+(dni fckra
-+ "check float cc always"
-+ ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
-+ (FR400-MAJOR B-5) (FR450-MAJOR B-5) FR-ACCESS)
-+ "fckra$pack $CRj_float"
-+ (+ pack FCC_ra CRj_float OP_09 (misc-null-5) FCCi_3)
-+ (check-semantics (const BI 1) CRj_float)
-+ ((fr400 (unit u-check)) (fr450 (unit u-check))
-+ (fr500 (unit u-check)) (fr550 (unit u-check)))
-+)
-+
-+(dni fckno
-+ "check float cc never"
-+ ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
-+ (FR400-MAJOR B-5) (FR450-MAJOR B-5) FR-ACCESS)
-+ "fckno$pack $CRj_float"
-+ (+ pack FCC_nev CRj_float OP_09 (misc-null-5) FCCi_3)
-+ (check-semantics (const BI 0) CRj_float)
-+ ((fr400 (unit u-check)) (fr450 (unit u-check))
-+ (fr500 (unit u-check)) (fr550 (unit u-check)))
-+)
-+
-+(check-float-condition-code fck ne OP_09 Fne "check float cc not equal")
-+(check-float-condition-code fck eq OP_09 Feq "check float cc equal")
-+(check-float-condition-code fck lg OP_09 Flg "check float cc greater or less")
-+(check-float-condition-code fck ue OP_09 Fue "check float cc unordered or equal")
-+(check-float-condition-code fck ul OP_09 Ful "check float cc unordered or less")
-+(check-float-condition-code fck ge OP_09 Fge "check float cc greater or equal")
-+(check-float-condition-code fck lt OP_09 Flt "check float cc less")
-+(check-float-condition-code fck uge OP_09 Fuge "check float cc unordered greater or equal")
-+(check-float-condition-code fck ug OP_09 Fug "check float cc unordered or greater")
-+(check-float-condition-code fck le OP_09 Fle "check float cc less or equal")
-+(check-float-condition-code fck gt OP_09 Fgt "check float cc greater")
-+(check-float-condition-code fck ule OP_09 Fule "check float cc unordered less or equal")
-+(check-float-condition-code fck u OP_09 Fu "check float cc unordered")
-+(check-float-condition-code fck o OP_09 Fo "check float cc ordered")
-+
-+(define-pmacro (conditional-check-int-condition-code prefix cc op ope test comment)
-+ (dni (.sym prefix cc)
-+ (comment)
-+ ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
-+ (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL)
-+ (.str (.sym prefix cc) "$pack $ICCi_3,$CRj_int,$CCi,$cond")
-+ (+ pack (.sym ICC_ cc) CRj_int op (rs-null) CCi cond ope
-+ (misc-null-9) ICCi_3)
-+ (if (eq CCi (or cond 2))
-+ (check-semantics (test ICCi_3) CRj_int)
-+ (set CRj_int (cr-undefined)))
-+ ((fr400 (unit u-check)) (fr450 (unit u-check))
-+ (fr500 (unit u-check)) (fr550 (unit u-check)))
-+ )
-+)
-+
-+(dni cckra
-+ "conditional check integer cc always"
-+ ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
-+ (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL)
-+ "cckra$pack $CRj_int,$CCi,$cond"
-+ (+ pack ICC_ra CRj_int OP_6A (rs-null) CCi cond OPE4_0
-+ (misc-null-9) (ICCi_3-null))
-+ (if (eq CCi (or cond 2))
-+ (check-semantics (const BI 1) CRj_int)
-+ (set CRj_int (cr-undefined)))
-+ ((fr400 (unit u-check)) (fr450 (unit u-check))
-+ (fr500 (unit u-check)) (fr550 (unit u-check)))
-+)
-+
-+(dni cckno
-+ "conditional check integer cc never"
-+ ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
-+ (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL)
-+ "cckno$pack $CRj_int,$CCi,$cond"
-+ (+ pack ICC_nev CRj_int OP_6A (rs-null) CCi cond OPE4_0
-+ (misc-null-9) (ICCi_3-null))
-+ (if (eq CCi (or cond 2))
-+ (check-semantics (const BI 0) CRj_int)
-+ (set CRj_int (cr-undefined)))
-+ ((fr400 (unit u-check)) (fr450 (unit u-check))
-+ (fr500 (unit u-check)) (fr550 (unit u-check)))
-+)
-+
-+(conditional-check-int-condition-code cck eq OP_6A OPE4_0 Ieq "check integer cc equal")
-+(conditional-check-int-condition-code cck ne OP_6A OPE4_0 Ine "check integer cc not equal")
-+(conditional-check-int-condition-code cck le OP_6A OPE4_0 Ile "check integer cc less or equal")
-+(conditional-check-int-condition-code cck gt OP_6A OPE4_0 Igt "check integer cc greater")
-+(conditional-check-int-condition-code cck lt OP_6A OPE4_0 Ilt "check integer cc less")
-+(conditional-check-int-condition-code cck ge OP_6A OPE4_0 Ige "check integer cc greater or equal")
-+(conditional-check-int-condition-code cck ls OP_6A OPE4_0 Ils "check integer cc less or equal unsigned")
-+(conditional-check-int-condition-code cck hi OP_6A OPE4_0 Ihi "check integer cc greater unsigned")
-+(conditional-check-int-condition-code cck c OP_6A OPE4_0 Ic "check integer cc carry set")
-+(conditional-check-int-condition-code cck nc OP_6A OPE4_0 Inc "check integer cc carry clear")
-+(conditional-check-int-condition-code cck n OP_6A OPE4_0 In "check integer cc negative")
-+(conditional-check-int-condition-code cck p OP_6A OPE4_0 Ip "check integer cc positive")
-+(conditional-check-int-condition-code cck v OP_6A OPE4_0 Iv "check integer cc overflow set")
-+(conditional-check-int-condition-code cck nv OP_6A OPE4_0 Inv "check integer cc overflow clear")
-+
-+(define-pmacro (conditional-check-float-condition-code prefix cc op ope test comment)
-+ (dni (.sym prefix cc)
-+ (comment)
-+ ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
-+ (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL FR-ACCESS)
-+ (.str (.sym prefix cc) "$pack $FCCi_3,$CRj_float,$CCi,$cond")
-+ (+ pack (.sym FCC_ cc) CRj_float op (rs-null) CCi cond ope
-+ (misc-null-9) FCCi_3)
-+ (if (eq CCi (or cond 2))
-+ (check-semantics (test FCCi_3) CRj_float)
-+ (set CRj_float (cr-undefined)))
-+ ((fr400 (unit u-check)) (fr450 (unit u-check))
-+ (fr500 (unit u-check)) (fr550 (unit u-check)))
-+ )
-+)
-+
-+(dni cfckra
-+ "conditional check float cc always"
-+ ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
-+ (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL FR-ACCESS)
-+ "cfckra$pack $CRj_float,$CCi,$cond"
-+ (+ pack FCC_ra CRj_float OP_6A (rs-null) CCi cond OPE4_1
-+ (misc-null-9) (FCCi_3-null))
-+ (if (eq CCi (or cond 2))
-+ (check-semantics (const BI 1) CRj_float)
-+ (set CRj_float (cr-undefined)))
-+ ((fr400 (unit u-check)) (fr450 (unit u-check))
-+ (fr500 (unit u-check)) (fr550 (unit u-check)))
-+)
-+
-+(dni cfckno
-+ "conditional check float cc never"
-+ ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5)
-+ (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL FR-ACCESS)
-+ "cfckno$pack $CRj_float,$CCi,$cond"
-+ (+ pack FCC_nev CRj_float OP_6A (rs-null) CCi cond OPE4_1
-+ (misc-null-9) (FCCi_3-null))
-+ (if (eq CCi (or cond 2))
-+ (check-semantics (const BI 0) CRj_float)
-+ (set CRj_float (cr-undefined)))
-+ ((fr400 (unit u-check)) (fr450 (unit u-check))
-+ (fr500 (unit u-check)) (fr550 (unit u-check)))
-+)
-+
-+(conditional-check-float-condition-code cfck ne OP_6A OPE4_1 Fne "check float cc not equal")
-+(conditional-check-float-condition-code cfck eq OP_6A OPE4_1 Feq "check float cc equal")
-+(conditional-check-float-condition-code cfck lg OP_6A OPE4_1 Flg "check float cc greater or less")
-+(conditional-check-float-condition-code cfck ue OP_6A OPE4_1 Fue "check float cc unordered or equal")
-+(conditional-check-float-condition-code cfck ul OP_6A OPE4_1 Ful "check float cc unordered or less")
-+(conditional-check-float-condition-code cfck ge OP_6A OPE4_1 Fge "check float cc greater or equal")
-+(conditional-check-float-condition-code cfck lt OP_6A OPE4_1 Flt "check float cc less")
-+(conditional-check-float-condition-code cfck uge OP_6A OPE4_1 Fuge "check float cc unordered greater or equal")
-+(conditional-check-float-condition-code cfck ug OP_6A OPE4_1 Fug "check float cc unordered or greater")
-+(conditional-check-float-condition-code cfck le OP_6A OPE4_1 Fle "check float cc less or equal")
-+(conditional-check-float-condition-code cfck gt OP_6A OPE4_1 Fgt "check float cc greater")
-+(conditional-check-float-condition-code cfck ule OP_6A OPE4_1 Fule "check float cc unordered less or equal")
-+(conditional-check-float-condition-code cfck u OP_6A OPE4_1 Fu "check float cc unordered")
-+(conditional-check-float-condition-code cfck o OP_6A OPE4_1 Fo "check float cc ordered")
-+
-+(dni cjmpl
-+ "conditional jump and link"
-+ ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
-+ (FR400-MAJOR I-5) (FR450-MAJOR I-5) CONDITIONAL)
-+ "cjmpl$pack @($GRi,$GRj),$CCi,$cond"
-+ (+ pack (misc-null-1) (LI-off) OP_6A GRi CCi cond OPE4_2 GRj)
-+ (if (eq CCi (or cond 2))
-+ (jump-and-link-semantics GRi GRj LI))
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(dni ccalll
-+ "conditional call and link"
-+ ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
-+ (FR400-MAJOR I-5) (FR450-MAJOR I-5) CONDITIONAL)
-+ "ccalll$pack @($GRi,$GRj),$CCi,$cond"
-+ (+ pack (misc-null-1) (LI-on) OP_6A GRi CCi cond OPE4_2 GRj)
-+ (if (eq CCi (or cond 2))
-+ (jump-and-link-semantics GRi GRj LI))
-+ ((fr400 (unit u-branch)) (fr450 (unit u-branch))
-+ (fr500 (unit u-branch)) (fr550 (unit u-branch)))
-+)
-+
-+(define-pmacro (cache-invalidate name cache all op ope profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
-+ (FR400-MAJOR C-2) (FR450-MAJOR C-2))
-+ (.str name "$pack @($GRi,$GRj)")
-+ (+ pack (rd-null) op GRi ope GRj)
-+ (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) all)
-+ profile
-+ )
-+)
-+
-+(cache-invalidate ici insn 0 OP_03 OPE1_38
-+ ((fr400 (unit u-ici)) (fr450 (unit u-ici))
-+ (fr500 (unit u-ici)) (fr550 (unit u-ici)))
-+ "invalidate insn cache")
-+(cache-invalidate dci data 0 OP_03 OPE1_3C
-+ ((fr400 (unit u-dci)) (fr450 (unit u-dci))
-+ (fr500 (unit u-dci)) (fr550 (unit u-dci)))
-+ "invalidate data cache")
-+
-+(define-pmacro (cache-invalidate-entry name cache op ope profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT C) (MACH fr400,fr450,fr550) (FR550-MAJOR C-2)
-+ (FR400-MAJOR C-2) (FR450-MAJOR C-2))
-+ (.str name "$pack @($GRi,$GRj),$ae")
-+ (+ pack (misc-null-1) ae op GRi ope GRj)
-+ (if (eq ae 0)
-+ (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) -1) ; Invalid ae setting for this insn
-+ (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) ae))
-+ profile
-+ )
-+)
-+
-+(cache-invalidate-entry icei insn OP_03 OPE1_39
-+ ((fr400 (unit u-ici)) (fr450 (unit u-ici))
-+ (fr550 (unit u-ici)))
-+ "invalidate insn cache entry")
-+(cache-invalidate-entry dcei data OP_03 OPE1_3A
-+ ((fr400 (unit u-dci)) (fr450 (unit u-dci))
-+ (fr550 (unit u-dci)))
-+ "invalidate data cache entry")
-+
-+(dni dcf
-+ "Data cache flush"
-+ ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
-+ (FR400-MAJOR C-2) (FR450-MAJOR C-2))
-+ "dcf$pack @($GRi,$GRj)"
-+ (+ pack (rd-null) OP_03 GRi OPE1_3D GRj)
-+ (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) 0)
-+ ((fr400 (unit u-dcf)) (fr450 (unit u-dcf))
-+ (fr500 (unit u-dcf)) (fr550 (unit u-dcf)))
-+)
-+
-+(dni dcef
-+ "Data cache entry flush"
-+ ((UNIT C) (MACH fr400,fr450,fr550) (FR550-MAJOR C-2)
-+ (FR400-MAJOR C-2) (FR450-MAJOR C-2))
-+ "dcef$pack @($GRi,$GRj),$ae"
-+ (+ pack (misc-null-1) ae OP_03 GRi OPE1_3B GRj)
-+ (if (eq ae 0)
-+ (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) -1)
-+ (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) ae))
-+ ((fr400 (unit u-dcf)) (fr450 (unit u-dcf)) (fr550 (unit u-dcf)))
-+)
-+
-+(define-pmacro (write-TLB name insn op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT C) (FR500-MAJOR C-2) (MACH frv) PRIVILEGED)
-+ (.str insn "$pack $GRk,@($GRi,$GRj)")
-+ (+ pack GRk op GRi ope GRj)
-+ (nop) ; for now
-+ ()
-+ )
-+)
-+
-+(write-TLB witlb witlb OP_03 OPE1_32 "write for insn TLB")
-+(write-TLB wdtlb wdtlb OP_03 OPE1_36 "write for data TLB")
-+
-+(define-pmacro (invalidate-TLB name insn op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT C) (FR500-MAJOR C-2) (MACH frv) PRIVILEGED)
-+ (.str insn "$pack @($GRi,$GRj)")
-+ (+ pack (rd-null) op GRi ope GRj)
-+ (nop) ; for now
-+ ()
-+ )
-+)
-+
-+(invalidate-TLB itlbi itlbi OP_03 OPE1_33 "invalidate insn TLB")
-+(invalidate-TLB dtlbi dtlbi OP_03 OPE1_37 "invalidate data TLB")
-+
-+(define-pmacro (cache-preload name cache pipe attrs op ope profile comment)
-+ (dni name
-+ (comment)
-+ (.splice (UNIT pipe) (FR500-MAJOR C-2)
-+ (FR400-MAJOR C-2) (.unsplice attrs))
-+ (.str name "$pack $GRi,$GRj,$lock")
-+ (+ pack (misc-null-1) lock op GRi ope GRj)
-+ (c-call VOID (.str "@cpu@_" cache "_cache_preload") GRi GRj lock)
-+ profile
-+ )
-+)
-+
-+(cache-preload icpl insn C ((FR550-MAJOR C-2) (FR450-MAJOR C-2)) OP_03 OPE1_30
-+ ((fr400 (unit u-icpl)) (fr450 (unit u-icpl))
-+ (fr500 (unit u-icpl)) (fr550 (unit u-icpl)))
-+ "preload insn cache")
-+(cache-preload dcpl data DCPL ((FR550-MAJOR I-8) (FR450-MAJOR I-2)) OP_03 OPE1_34
-+ ((fr400 (unit u-dcpl)) (fr450 (unit u-dcpl))
-+ (fr500 (unit u-dcpl)) (fr550 (unit u-dcpl)))
-+ "preload data cache")
-+
-+(define-pmacro (cache-unlock name cache op ope profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
-+ (FR400-MAJOR C-2) (FR450-MAJOR C-2))
-+ (.str name "$pack $GRi")
-+ (+ pack (rd-null) op GRi ope (GRj-null))
-+ (c-call VOID (.str "@cpu@_" cache "_cache_unlock") GRi)
-+ profile
-+ )
-+)
-+
-+(cache-unlock icul insn OP_03 OPE1_31
-+ ((fr400 (unit u-icul)) (fr450 (unit u-icul))
-+ (fr500 (unit u-icul)) (fr550 (unit u-icul)))
-+ "unlock insn cache")
-+(cache-unlock dcul data OP_03 OPE1_35
-+ ((fr400 (unit u-dcul)) (fr450 (unit u-dcul))
-+ (fr500 (unit u-dcul)) (fr550 (unit u-dcul)))
-+ "unlock data cache")
-+
-+(define-pmacro (barrier name insn op ope profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2)
-+ (FR400-MAJOR C-2) (FR450-MAJOR C-2))
-+ (.str insn "$pack")
-+ (+ pack (rd-null) op (rs-null) ope (GRj-null))
-+ (nop) ; sufficient implementation
-+ profile
-+ )
-+)
-+
-+(barrier bar bar OP_03 OPE1_3E
-+ ((fr400 (unit u-barrier)) (fr450 (unit u-barrier))
-+ (fr500 (unit u-barrier)))
-+ "barrier")
-+(barrier membar membar OP_03 OPE1_3F
-+ ((fr400 (unit u-membar)) (fr450 (unit u-membar))
-+ (fr500 (unit u-membar)))
-+ "memory barrier")
-+
-+; Load real address instructions
-+(define-pmacro (load-real-address name insn what op ope)
-+ (dni name
-+ (.str "Load real address of " what)
-+ ((UNIT C) (FR450-MAJOR C-2) (MACH fr450))
-+ (.str insn "$pack $GRi,$GRk,$LRAE,$LRAD,$LRAS")
-+ (+ pack GRk op GRi ope LRAE LRAD LRAS (LRA-null))
-+ (nop) ; not simulated
-+ ()
-+ )
-+)
-+
-+(load-real-address lrai "lrai" "instruction" OP_03 OPE1_20)
-+(load-real-address lrad "lrad" "data" OP_03 OPE1_21)
-+
-+(dni tlbpr
-+ "TLB Probe"
-+ ((UNIT C) (FR450-MAJOR C-2) (MACH fr450))
-+ "tlbpr$pack $GRi,$GRj,$TLBPRopx,$TLBPRL"
-+ (+ pack (TLBPR-null) TLBPRopx TLBPRL OP_03 GRi OPE1_24 GRj)
-+ (nop) ; not simulated
-+ ()
-+)
-+
-+; Coprocessor operations
-+(define-pmacro (cop-op num op)
-+ (dni (.sym cop num)
-+ "Coprocessor operation"
-+ ((UNIT C) (FR500-MAJOR C-2) (MACH frv))
-+ (.str "cop" num "$pack $s6_1,$CPRi,$CPRj,$CPRk")
-+ (+ pack CPRk op CPRi s6_1 CPRj)
-+ (nop) ; sufficient implementation
-+ ()
-+ )
-+)
-+
-+(cop-op 1 OP_7E)
-+(cop-op 2 OP_7F)
-+
-+(define-pmacro (clear-ne-flag-semantics target_index is_float)
-+ (c-call VOID "@cpu@_clear_ne_flags" target_index is_float)
-+)
-+
-+(define-pmacro (clear-ne-flag-r name op ope reg is_float attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH simple,tomcat,fr500,fr550,frv) attr)
-+ (.str name "$pack $" reg "k")
-+ (+ pack (.sym reg k) op (rs-null) ope (GRj-null))
-+ (sequence ()
-+ ; hack to get this referenced for profiling
-+ (c-raw-call VOID "frv_ref_SI" (.sym reg k))
-+ (clear-ne-flag-semantics (index-of (.sym reg k)) is_float))
-+ profile
-+ )
-+)
-+
-+(clear-ne-flag-r clrgr OP_0A OPE1_00 GR 0 NA
-+ ((fr500 (unit u-clrgr)) (fr550 (unit u-clrgr)))
-+ "Clear GR NE flag")
-+(clear-ne-flag-r clrfr OP_0A OPE1_02 FR 1 FR-ACCESS
-+ ((fr500 (unit u-clrfr)) (fr550 (unit u-clrfr)))
-+ "Clear FR NE flag")
-+
-+(define-pmacro (clear-ne-flag-all name op ope is_float attr profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH simple,tomcat,fr500,fr550,frv) attr)
-+ (.str name "$pack")
-+ (+ pack (rd-null) op (rs-null) ope (GRj-null))
-+ (clear-ne-flag-semantics -1 is_float)
-+ profile
-+ )
-+)
-+
-+(clear-ne-flag-all clrga OP_0A OPE1_01 0 NA
-+ ((fr500 (unit u-clrgr)) (fr550 (unit u-clrgr)))
-+ "Clear GR NE flag ALL")
-+(clear-ne-flag-all clrfa OP_0A OPE1_03 1 FR-ACCESS
-+ ((fr500 (unit u-clrfr)) (fr550 (unit u-clrfr)))
-+ "Clear FR NE flag ALL")
-+
-+(define-pmacro (commit-semantics target_index is_float)
-+ (c-call VOID "@cpu@_commit" target_index is_float)
-+)
-+
-+(define-pmacro (commit-r name op ope reg is_float attr comment)
-+ (dni name
-+ (comment)
-+ ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH frv,fr500,fr550) attr)
-+ (.str name "$pack $" reg "k")
-+ (+ pack (.sym reg k) op (rs-null) ope (GRj-null))
-+ (commit-semantics (index-of (.sym reg k)) is_float)
-+ ((fr500 (unit u-commit)) (fr550 (unit u-commit)))
-+ )
-+)
-+
-+(commit-r commitgr OP_0A OPE1_04 GR 0 NA "commit exceptions, specific GR")
-+(commit-r commitfr OP_0A OPE1_06 FR 1 FR-ACCESS "commit exceptions, specific FR")
-+
-+(define-pmacro (commit name op ope is_float attr comment)
-+ (dni name
-+ (comment)
-+ ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH frv,fr500,fr550) attr)
-+ (.str name "$pack")
-+ (+ pack (rd-null) op (rs-null) ope (GRj-null))
-+ (commit-semantics -1 is_float)
-+ ((fr500 (unit u-commit)) (fr550 (unit u-commit)))
-+ )
-+)
-+
-+(commit commitga OP_0A OPE1_05 0 NA "commit exceptions, any GR")
-+(commit commitfa OP_0A OPE1_07 1 FR-ACCESS "commit exceptions, any FR")
-+
-+(define-pmacro (floating-point-conversion
-+ name op ope conv mode src targ attr comment)
-+ (dni name
-+ (comment)
-+ (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr))
-+ (.str name "$pack $" src ",$" targ)
-+ (+ pack targ op (rs-null) ope src)
-+ (set targ (conv mode src))
-+ ((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert)))
-+ )
-+)
-+
-+(floating-point-conversion fitos OP_79 OPE1_00 float SF FRintj FRk
-+ ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
-+ "Convert Integer to Single")
-+(floating-point-conversion fstoi OP_79 OPE1_01 fix SI FRj FRintk
-+ ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
-+ "Convert Single to Integer")
-+(floating-point-conversion fitod OP_7A OPE1_00 float DF FRintj FRdoublek
-+ ((MACH frv))
-+ "Convert Integer to Double")
-+(floating-point-conversion fdtoi OP_7A OPE1_01 fix SI FRdoublej FRintk
-+ ((MACH frv))
-+ "Convert Double to Integer")
-+
-+(define-pmacro (floating-point-dual-conversion
-+ name op ope conv mode src src_hw targ targ_hw attr comment)
-+ (dni name
-+ (comment)
-+ ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1) attr)
-+ (.str name "$pack $" src ",$" targ)
-+ (+ pack targ op (rs-null) ope src)
-+ (sequence ()
-+ (set targ (conv mode src))
-+ (set (nextreg targ_hw targ 1)
-+ (conv mode (nextreg src_hw src 1))))
-+ ((fr500 (unit u-float-dual-convert)))
-+ )
-+)
-+
-+(floating-point-dual-conversion fditos OP_79 OPE1_10 float SF FRintj h-fr_int FRk h-fr NA "Dual Convert Integer to Single")
-+(floating-point-dual-conversion fdstoi OP_79 OPE1_11 fix SI FRj h-fr FRintk h-fr_int NA "Dual Convert Single to Integer")
-+
-+(define-pmacro (ne-floating-point-dual-conversion
-+ name op ope conv mode src src_hw targ targ_hw attr comment)
-+ (dni name
-+ (comment)
-+ ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1) NON-EXCEPTING attr)
-+ (.str name "$pack $" src ",$" targ)
-+ (+ pack targ op (rs-null) ope src)
-+ (sequence ()
-+ (c-call VOID "@cpu@_set_ne_index" (index-of targ))
-+ (set targ (conv mode src))
-+ (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 1))
-+ (set (nextreg targ_hw targ 1)
-+ (conv mode (nextreg src_hw src 1))))
-+ ((fr500 (unit u-float-dual-convert)))
-+ )
-+)
-+
-+(ne-floating-point-dual-conversion nfditos OP_79 OPE1_30 float SF FRintj h-fr_int FRk h-fr NA "Non excepting dual Convert Integer to Single")
-+(ne-floating-point-dual-conversion nfdstoi OP_79 OPE1_31 fix SI FRj h-fr FRintk h-fr_int NA "Non excepting dual Convert Single to Integer")
-+
-+(define-pmacro (conditional-floating-point-conversion
-+ name op ope conv mode src targ comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
-+ (.str name "$pack $" src ",$" targ ",$CCi,$cond")
-+ (+ pack targ op (rs-null) CCi cond ope src)
-+ (if (eq CCi (or cond 2))
-+ (set targ (conv mode src)))
-+ ((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert)))
-+ )
-+)
-+
-+(conditional-floating-point-conversion cfitos OP_6B OPE4_0 float SF FRintj FRk "Conditional convert Integer to Single")
-+(conditional-floating-point-conversion cfstoi OP_6B OPE4_1 fix SI FRj FRintk "Conditional convert Single to Integer")
-+
-+(define-pmacro (ne-floating-point-conversion
-+ name op ope conv mode src targ comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
-+ (.str name "$pack $" src ",$" targ)
-+ (+ pack targ op (rs-null) ope src)
-+ (sequence ()
-+ (c-call VOID "@cpu@_set_ne_index" (index-of targ))
-+ (set targ (conv mode src)))
-+ ((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert)))
-+ )
-+)
-+
-+(ne-floating-point-conversion nfitos OP_79 OPE1_20 float SF FRintj FRk "NE convert Integer to Single")
-+(ne-floating-point-conversion nfstoi OP_79 OPE1_21 fix SI FRj FRintk "NE convert Single to Integer")
-+
-+(register-transfer fmovs OP_79 OPE1_02
-+ FRj FRk FMALL
-+ ((FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
-+ ((fr500 (unit u-fr2fr)))
-+ "Move Single Float")
-+(register-transfer fmovd OP_7A OPE1_02
-+ ; TODO -- unit doesn't handle extra register
-+ FRdoublej FRdoublek FM01
-+ ((FR500-MAJOR F-1) (MACH frv))
-+ ((fr500 (unit u-fr2fr)) (fr550 (unit u-fr2fr)))
-+ "Move Double Float")
-+
-+(dni fdmovs
-+ "Dual move single float"
-+ ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1))
-+ "fdmovs$pack $FRj,$FRk"
-+ (+ pack FRk OP_79 (rs-null) OPE1_12 FRj)
-+ (sequence ()
-+ (set FRk FRj)
-+ (set (nextreg h-fr FRk 1) (nextreg h-fr FRj 1)))
-+ ; TODO -- unit doesn't handle extra register
-+ ((fr500 (unit u-fr2fr)))
-+)
-+
-+(conditional-register-transfer cfmovs OP_6C OPE4_0 FRj FRk FMALL
-+ ((FR500-MAJOR F-1) (FR550-MAJOR F-2)
-+ (MACH simple,tomcat,fr500,fr550,frv))
-+ ((fr500 (unit u-fr2fr)) (fr550 (unit u-fr2fr)))
-+ "Conditional move Single Float")
-+
-+(define-pmacro (floating-point-neg name src targ op ope attr comment)
-+ (dni name
-+ (comment)
-+ (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr))
-+ (.str name "$pack $" src ",$" targ)
-+ (+ pack src op (rs-null) ope targ)
-+ (set targ (neg src))
-+ ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
-+ )
-+)
-+
-+(floating-point-neg fnegs FRj FRk OP_79 OPE1_03 ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) "Floating point negate, single")
-+(floating-point-neg fnegd FRdoublej FRdoublek OP_7A OPE1_03 ((MACH frv)) "Floating point negate, double")
-+
-+(dni fdnegs
-+ "Floating point dual negate, single"
-+ ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1))
-+ "fdnegs$pack $FRj,$FRk"
-+ (+ pack FRk OP_79 (rs-null) OPE1_13 FRj)
-+ (sequence ()
-+ (set FRk (neg FRj))
-+ (set (nextreg h-fr FRk 1) (neg (nextreg h-fr FRj 1))))
-+ ((fr500 (unit u-float-dual-arith)))
-+)
-+
-+(dni cfnegs
-+ "Conditional floating point negate, single"
-+ ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
-+ "cfnegs$pack $FRj,$FRk,$CCi,$cond"
-+ (+ pack FRj OP_6C (rs-null) CCi cond OPE4_1 FRk)
-+ (if (eq CCi (or cond 2))
-+ (set FRk (neg FRj)))
-+ ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
-+)
-+
-+(define-pmacro (float-abs name src targ op ope attr comment)
-+ (dni name
-+ (comment)
-+ (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr))
-+ (.str name "$pack $" src ",$" targ )
-+ (+ pack targ op (rs-null) ope src)
-+ (set targ (abs src))
-+ ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
-+ )
-+)
-+
-+(float-abs fabss FRj FRk OP_79 OPE1_04 ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) "Float absolute value, single")
-+(float-abs fabsd FRdoublej FRdoublek OP_7A OPE1_04 ((MACH frv)) "Float absolute value, double")
-+
-+(dni fdabss
-+ "Floating point dual absolute value, single"
-+ ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1))
-+ "fdabss$pack $FRj,$FRk"
-+ (+ pack FRk OP_79 (rs-null) OPE1_14 FRj)
-+ (sequence ()
-+ (set FRk (abs FRj))
-+ (set (nextreg h-fr FRk 1) (abs (nextreg h-fr FRj 1))))
-+ ((fr500 (unit u-float-dual-arith)))
-+)
-+
-+(dni cfabss
-+ "Conditional floating point absolute value, single"
-+ ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
-+ "cfabss$pack $FRj,$FRk,$CCi,$cond"
-+ (+ pack FRj OP_6C (rs-null) CCi cond OPE4_2 FRk)
-+ (if (eq CCi (or cond 2))
-+ (set FRk (abs FRj)))
-+ ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
-+)
-+
-+(dni fsqrts
-+ "Square root single"
-+ ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv))
-+ "fsqrts$pack $FRj,$FRk"
-+ (+ pack FRk OP_79 (rs-null) OPE1_05 FRj)
-+ (set FRk (sqrt SF FRj))
-+ ((fr500 (unit u-float-sqrt)) (fr550 (unit u-float-sqrt)))
-+)
-+
-+(dni fdsqrts
-+ "Dual square root single"
-+ ((MACH frv) (UNIT FM01) (FR500-MAJOR F-4))
-+ "fdsqrts$pack $FRj,$FRk"
-+ (+ pack FRk OP_79 (rs-null) OPE1_15 FRj)
-+ (sequence ()
-+ (set FRk (sqrt SF FRj))
-+ (set (nextreg h-fr FRk 1) (sqrt (nextreg h-fr FRj 1))))
-+ ((fr500 (unit u-float-dual-sqrt)))
-+)
-+
-+(dni nfdsqrts
-+ "Non excepting Dual square root single"
-+ ((MACH frv) (UNIT FM01) (FR500-MAJOR F-4) NON-EXCEPTING)
-+ "nfdsqrts$pack $FRj,$FRk"
-+ (+ pack FRk OP_79 (rs-null) OPE1_35 FRj)
-+ (sequence ()
-+ (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
-+ (set FRk (sqrt SF FRj))
-+ (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
-+ (set (nextreg h-fr FRk 1) (sqrt (nextreg h-fr FRj 1))))
-+ ((fr500 (unit u-float-dual-sqrt)))
-+)
-+
-+(dni fsqrtd
-+ "Square root double"
-+ ((UNIT FM01) (FR500-MAJOR F-4) (MACH frv))
-+ "fsqrtd$pack $FRdoublej,$FRdoublek"
-+ (+ pack FRdoublek OP_7A (rs-null) OPE1_05 FRdoublej)
-+ (set FRdoublek (sqrt DF FRdoublej))
-+ ((fr500 (unit u-float-sqrt)))
-+)
-+
-+(dni cfsqrts
-+ "Conditional square root single"
-+ ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv))
-+ "cfsqrts$pack $FRj,$FRk,$CCi,$cond"
-+ (+ pack FRk OP_6E (rs-null) CCi cond OPE4_2 FRj)
-+ (if (eq CCi (or cond 2))
-+ (set FRk (sqrt SF FRj)))
-+ ((fr500 (unit u-float-sqrt)) (fr550 (unit u-float-sqrt)))
-+)
-+
-+(dni nfsqrts
-+ "Non exception square root, single"
-+ ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv))
-+ "nfsqrts$pack $FRj,$FRk"
-+ (+ pack FRk OP_79 (rs-null) OPE1_25 FRj)
-+ (sequence ()
-+ (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
-+ (set FRk (sqrt SF FRj)))
-+ ((fr500 (unit u-float-sqrt)) (fr550 (unit u-float-sqrt)))
-+)
-+
-+(define-pmacro (float-binary-op-s name pipe attr operation op ope comment)
-+ (dni name
-+ (comment)
-+ (.splice (UNIT pipe) (MACH simple,tomcat,fr500,fr550,frv) (.unsplice attr))
-+ (.str name "$pack $FRi,$FRj,$FRk")
-+ (+ pack FRk op FRi ope FRj)
-+ (set FRk (operation FRi FRj))
-+ ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
-+ )
-+)
-+
-+(float-binary-op-s fadds FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) add OP_79 OPE1_06 "add single float")
-+(float-binary-op-s fsubs FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) sub OP_79 OPE1_07 "sub single float")
-+(float-binary-op-s fmuls FM01 ((FR500-MAJOR F-3) (FR550-MAJOR F-3)) mul OP_79 OPE1_08 "mul single float")
-+
-+(dni fdivs
-+ "div single float"
-+ ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv))
-+ "fdivs$pack $FRi,$FRj,$FRk"
-+ (+ pack FRk OP_79 FRi OPE1_09 FRj)
-+ (set FRk (div FRi FRj))
-+ ((fr500 (unit u-float-div))
-+ (fr550 (unit u-float-div)))
-+)
-+
-+(define-pmacro (float-binary-op-d name operation op ope major comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR major) (MACH frv))
-+ (.str name "$pack $FRdoublei,$FRdoublej,$FRdoublek")
-+ (+ pack FRdoublek op FRdoublei ope FRdoublej)
-+ (set FRdoublek (operation FRdoublei FRdoublej))
-+ ((fr500 (unit u-float-arith)))
-+ )
-+)
-+
-+(float-binary-op-d faddd add OP_7A OPE1_06 F-2 "add double float")
-+(float-binary-op-d fsubd sub OP_7A OPE1_07 F-2 "sub double float")
-+(float-binary-op-d fmuld mul OP_7A OPE1_08 F-3 "mul double float")
-+(float-binary-op-d fdivd div OP_7A OPE1_09 F-4 "div double float")
-+
-+(define-pmacro (conditional-float-binary-op name pipe attr operation op ope profile comment)
-+ (dni name
-+ (comment)
-+ (.splice (UNIT pipe) (MACH simple,tomcat,fr500,fr550,frv)
-+ (.unsplice attr))
-+ (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond")
-+ (+ pack FRk op FRi CCi cond ope FRj)
-+ (if (eq CCi (or cond 2))
-+ (set FRk (operation FRi FRj)))
-+ profile
-+ )
-+)
-+
-+(conditional-float-binary-op cfadds FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) add OP_6D OPE4_0
-+ ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
-+ "cond add single")
-+(conditional-float-binary-op cfsubs FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) sub OP_6D OPE4_1
-+ ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
-+ "cond sub single")
-+(conditional-float-binary-op cfmuls FM01 ((FR500-MAJOR F-3) (FR550-MAJOR F-3)) mul OP_6E OPE4_0
-+ ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
-+ "cond mul single")
-+(conditional-float-binary-op cfdivs FM01 ((FR500-MAJOR F-4) (FR550-MAJOR F-3)) div OP_6E OPE4_1
-+ ((fr500 (unit u-float-div)) (fr550 (unit u-float-div)))
-+ "cond div single")
-+
-+(define-pmacro (ne-float-binary-op name pipe attr operation op ope profile comment)
-+ (dni name
-+ (comment)
-+ (.splice (UNIT pipe) (MACH simple,tomcat,fr500,fr550,frv)
-+ (.unsplice attr))
-+ (.str name "$pack $FRi,$FRj,$FRk")
-+ (+ pack FRk op FRi ope FRj)
-+ (sequence ()
-+ (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
-+ (set FRk (operation FRi FRj)))
-+ profile
-+ )
-+)
-+
-+(ne-float-binary-op nfadds FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) add OP_79 OPE1_26
-+ ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
-+ "ne add single")
-+(ne-float-binary-op nfsubs FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) sub OP_79 OPE1_27
-+ ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
-+ "ne sub single")
-+(ne-float-binary-op nfmuls FM01 ((FR500-MAJOR F-3) (FR550-MAJOR F-3)) mul OP_79 OPE1_28
-+ ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
-+ "ne mul single")
-+(ne-float-binary-op nfdivs FM01 ((FR500-MAJOR F-4) (FR550-MAJOR F-3)) div OP_79 OPE1_29
-+ ((fr500 (unit u-float-div)) (fr550 (unit u-float-div)))
-+ "ne div single")
-+
-+(define-pmacro (fcc-eq) 8)
-+(define-pmacro (fcc-lt) 4)
-+(define-pmacro (fcc-gt) 2)
-+(define-pmacro (fcc-uo) 1)
-+
-+(define-pmacro (compare-and-set-fcc arg1 arg2 fcc)
-+ (if (gt arg1 arg2)
-+ (set fcc (fcc-gt))
-+ (if (eq arg1 arg2)
-+ (set fcc (fcc-eq))
-+ (if (lt arg1 arg2)
-+ (set fcc (fcc-lt))
-+ (set fcc (fcc-uo)))))
-+)
-+
-+(dni fcmps
-+ "compare single float"
-+ ((UNIT FMALL) (FR500-MAJOR F-2) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
-+ "fcmps$pack $FRi,$FRj,$FCCi_2"
-+ (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_0A FRj)
-+ (compare-and-set-fcc FRi FRj FCCi_2)
-+ ((fr500 (unit u-float-compare)) (fr550 (unit u-float-compare)))
-+)
-+
-+(dni fcmpd
-+ "compare double float"
-+ ((UNIT FMALL) (FR500-MAJOR F-2) (MACH frv))
-+ "fcmpd$pack $FRdoublei,$FRdoublej,$FCCi_2"
-+ (+ pack (cond-null) FCCi_2 OP_7A FRdoublei OPE1_0A FRdoublej)
-+ (compare-and-set-fcc FRdoublei FRdoublej FCCi_2)
-+ ((fr500 (unit u-float-compare)))
-+)
-+
-+(dni cfcmps
-+ "Conditional compare single, float"
-+ ((UNIT FMALL) (FR500-MAJOR F-2) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
-+ "cfcmps$pack $FRi,$FRj,$FCCi_2,$CCi,$cond"
-+ (+ pack (cond-null) FCCi_2 OP_6D FRi CCi cond OPE4_2 FRj)
-+ (if (eq CCi (or cond 2))
-+ (compare-and-set-fcc FRi FRj FCCi_2))
-+ ((fr500 (unit u-float-compare)) (fr550 (unit u-float-compare)))
-+)
-+
-+(dni fdcmps
-+ "float dual compare single"
-+ ((UNIT FMALL) (FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
-+ "fdcmps$pack $FRi,$FRj,$FCCi_2"
-+ (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_1A FRj)
-+ (sequence ()
-+ (compare-and-set-fcc FRi FRj FCCi_2)
-+ (compare-and-set-fcc (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)
-+ (nextreg h-fccr FCCi_2 1)))
-+ ((fr500 (unit u-float-dual-compare)) (fr550 (unit u-float-dual-compare)))
-+)
-+
-+(define-pmacro (float-mul-with-add name add_sub arg1 arg2 targ op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv))
-+ (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
-+ (+ pack targ op arg1 ope arg2)
-+ (set targ (add_sub (mul arg1 arg2) targ))
-+ ((fr500 (unit u-float-dual-arith)))
-+ )
-+)
-+
-+(float-mul-with-add fmadds add FRi FRj FRk OP_79 OPE1_0B "mul with add, single")
-+(float-mul-with-add fmsubs sub FRi FRj FRk OP_79 OPE1_0C "mul with sub, single")
-+
-+(float-mul-with-add fmaddd add FRdoublei FRdoublej FRdoublek OP_7A OPE1_0B "mul with add, double")
-+(float-mul-with-add fmsubd sub FRdoublei FRdoublej FRdoublek OP_7A OPE1_0C "mul with sub, double")
-+
-+(dni fdmadds
-+ "Float dual multiply with add"
-+ ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv))
-+ "fdmadds$pack $FRi,$FRj,$FRk"
-+ (+ pack FRk OP_79 FRi OPE1_1B FRj)
-+ (sequence ()
-+ (set FRk (add (mul FRi FRj) FRk))
-+ (set (nextreg h-fr FRk 1)
-+ (add (mul (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))
-+ (nextreg h-fr FRk 1))))
-+ ; TODO dual registers not referenced for profiling
-+ ((fr500 (unit u-float-dual-arith)))
-+)
-+
-+(dni nfdmadds
-+ "Non excepting float dual multiply with add"
-+ ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv))
-+ "nfdmadds$pack $FRi,$FRj,$FRk"
-+ (+ pack FRk OP_79 FRi OPE1_3B FRj)
-+ (sequence ()
-+ (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
-+ (set FRk (add (mul FRi FRj) FRk))
-+ (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
-+ (set (nextreg h-fr FRk 1)
-+ (add (mul (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))
-+ (nextreg h-fr FRk 1))))
-+ ; TODO dual registers not referenced for profiling
-+ ((fr500 (unit u-float-dual-arith)))
-+)
-+
-+(define-pmacro (conditional-float-mul-with-add
-+ name add_sub arg1 arg2 targ op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv) CONDITIONAL)
-+ (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond")
-+ (+ pack FRk op FRi CCi cond ope FRj)
-+ (if (eq CCi (or cond 2))
-+ (set targ (add_sub (mul arg1 arg2) targ)))
-+ ((fr500 (unit u-float-dual-arith)))
-+ )
-+)
-+
-+(conditional-float-mul-with-add cfmadds add FRi FRj FRk OP_6F OPE4_0 "conditional mul with add, single")
-+(conditional-float-mul-with-add cfmsubs sub FRi FRj FRk OP_6F OPE4_1 "conditional mul with sub, single")
-+
-+(define-pmacro (ne-float-mul-with-add name add_sub arg1 arg2 targ op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv) NON-EXCEPTING)
-+ (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
-+ (+ pack targ op arg1 ope arg2)
-+ (sequence ()
-+ (c-call VOID "@cpu@_set_ne_index" (index-of targ))
-+ (set targ (add_sub (mul arg1 arg2) targ)))
-+ ((fr500 (unit u-float-dual-arith)))
-+ )
-+)
-+
-+(ne-float-mul-with-add nfmadds add FRi FRj FRk OP_79 OPE1_2B "non excepting mul with add, single")
-+(ne-float-mul-with-add nfmsubs sub FRi FRj FRk OP_79 OPE1_2C "non excepting mul with sub, single")
-+
-+(define-pmacro (float-parallel-mul-add-semantics cond add_sub arg1 arg2 targ)
-+ (if cond
-+ (sequence ()
-+ (set targ (mul arg1 arg2))
-+ (set (nextreg h-fr targ 1)
-+ (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1)))))
-+)
-+
-+(define-pmacro (float-parallel-mul-add
-+ name add_sub arg1 arg2 targ op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FM01) (FR500-MAJOR F-5) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
-+ (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
-+ (+ pack targ op arg1 ope arg2)
-+ (float-parallel-mul-add-semantics 1 add_sub arg1 arg2 targ)
-+ ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
-+ )
-+)
-+
-+(float-parallel-mul-add fmas add FRi FRj FRk OP_79 OPE1_0E "parallel mul/add, single")
-+(float-parallel-mul-add fmss sub FRi FRj FRk OP_79 OPE1_0F "parallel mul/sub, single")
-+
-+(define-pmacro (float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ)
-+ (sequence ()
-+ (set targ (mul arg1 arg2))
-+ (set (nextreg h-fr targ 1)
-+ (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1)))
-+ (set (nextreg h-fr targ 2)
-+ (mul (nextreg h-fr arg1 2) (nextreg h-fr arg2 2)))
-+ (set (nextreg h-fr targ 3)
-+ (add_sub (nextreg h-fr arg1 3) (nextreg h-fr arg2 3))))
-+)
-+
-+(define-pmacro (float-dual-parallel-mul-add
-+ name add_sub arg1 arg2 targ op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv))
-+ (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
-+ (+ pack targ op arg1 ope arg2)
-+ (float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ)
-+ ()
-+ )
-+)
-+
-+(float-dual-parallel-mul-add fdmas add FRi FRj FRk OP_79 OPE1_1C "dual parallel mul/add, single")
-+(float-dual-parallel-mul-add fdmss sub FRi FRj FRk OP_79 OPE1_1D "dual parallel mul/sub, single")
-+
-+(define-pmacro (ne-float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ)
-+ (sequence ()
-+ (c-call VOID "@cpu@_set_ne_index" (index-of targ))
-+ (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 1))
-+ (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 2))
-+ (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 3))
-+ (set targ (mul arg1 arg2))
-+ (set (nextreg h-fr targ 1)
-+ (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1)))
-+ (set (nextreg h-fr targ 2)
-+ (mul (nextreg h-fr arg1 2) (nextreg h-fr arg2 2)))
-+ (set (nextreg h-fr targ 3)
-+ (add_sub (nextreg h-fr arg1 3) (nextreg h-fr arg2 3))))
-+)
-+
-+(define-pmacro (ne-float-dual-parallel-mul-add
-+ name add_sub arg1 arg2 targ op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv))
-+ (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
-+ (+ pack targ op arg1 ope arg2)
-+ (ne-float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ)
-+ ()
-+ )
-+)
-+
-+(ne-float-dual-parallel-mul-add nfdmas add FRi FRj FRk OP_79 OPE1_3C "non excepting dual parallel mul/add, single")
-+(ne-float-dual-parallel-mul-add nfdmss sub FRi FRj FRk OP_79 OPE1_3D "non excepting dual parallel mul/sub, single")
-+
-+(define-pmacro (conditional-float-parallel-mul-add name add_sub op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FM01) (FR500-MAJOR F-5) (FR550-MAJOR F-4) CONDITIONAL (MACH simple,tomcat,fr500,fr550,frv))
-+ (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond")
-+ (+ pack FRk op FRi CCi cond ope FRj)
-+ (float-parallel-mul-add-semantics (eq CCi (or cond 2))
-+ add_sub FRi FRj FRk)
-+ ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
-+ )
-+)
-+
-+(conditional-float-parallel-mul-add cfmas add OP_6F OPE4_2 "conditional parallel mul/add, single")
-+(conditional-float-parallel-mul-add cfmss sub OP_6F OPE4_3 "conditional parallel mul/sub, single")
-+
-+(define-pmacro (float-parallel-mul-add-double-semantics add_sub arg1 arg2 targ)
-+ (sequence ()
-+ (set targ (ftrunc SF (mul DF (fext DF arg1) (fext DF arg2))))
-+ (set (nextreg h-fr targ 1)
-+ (ftrunc SF (add_sub DF
-+ (fext DF (nextreg h-fr arg1 1))
-+ (fext DF (nextreg h-fr arg2 1))))))
-+)
-+
-+(define-pmacro (float-parallel-mul-add-double
-+ name add_sub arg1 arg2 targ op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv))
-+ (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
-+ (+ pack targ op arg1 ope arg2)
-+ (float-parallel-mul-add-double-semantics add_sub arg1 arg2 targ)
-+ ()
-+ )
-+)
-+
-+(float-parallel-mul-add-double fmad add FRi FRj FRk OP_7A OPE1_0E "parallel mul/add, double")
-+(float-parallel-mul-add-double fmsd sub FRi FRj FRk OP_7A OPE1_0F "parallel mul/sub, double")
-+
-+(define-pmacro (ne-float-parallel-mul-add name add_sub op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FM01) (FR500-MAJOR F-5) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
-+ (.str name "$pack $FRi,$FRj,$FRk")
-+ (+ pack FRk op FRi ope FRj)
-+ (sequence ()
-+ (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
-+ (set FRk (mul FRi FRj))
-+ (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
-+ (set (nextreg h-fr FRk 1)
-+ (add_sub (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))))
-+ ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
-+ )
-+)
-+
-+(ne-float-parallel-mul-add nfmas add OP_79 OPE1_2E "ne parallel mul/add,single")
-+(ne-float-parallel-mul-add nfmss sub OP_79 OPE1_2F "ne parallel mul/sub,single")
-+
-+(define-pmacro (float-dual-arith name attr oper1 oper2 op ope comment)
-+ (dni name
-+ (comment)
-+ (.splice (UNIT FM01) (.unsplice attr))
-+ (.str name "$pack $FRi,$FRj,$FRk")
-+ (+ pack FRk op FRi ope FRj)
-+ (sequence ()
-+ (set FRk (oper1 FRi FRj))
-+ (set (nextreg h-fr FRk 1)
-+ (oper2 (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))))
-+ ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
-+ )
-+)
-+
-+(float-dual-arith fdadds ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add add OP_79 OPE1_16 "dual add, single")
-+(float-dual-arith fdsubs ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) sub sub OP_79 OPE1_17 "dual sub, single")
-+(float-dual-arith fdmuls ((FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) mul mul OP_79 OPE1_18 "dual mul, single")
-+(float-dual-arith fddivs ((FR500-MAJOR F-7) (MACH frv)) div div OP_79 OPE1_19 "dual div,single")
-+(float-dual-arith fdsads ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add sub OP_79 OPE1_1E "dual add/sub, single")
-+
-+(dni fdmulcs
-+ "Float dual cross multiply single"
-+ ((UNIT FM01) (FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
-+ "fdmulcs$pack $FRi,$FRj,$FRk"
-+ (+ pack FRk OP_79 FRi OPE1_1F FRj)
-+ (sequence ()
-+ (set FRk (mul FRi (nextreg h-fr FRj 1)))
-+ (set (nextreg h-fr FRk 1) (mul (nextreg h-fr FRi 1) FRj)))
-+ ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
-+)
-+
-+(dni nfdmulcs
-+ "NE float dual cross multiply single"
-+ ((UNIT FM01) (FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
-+ "nfdmulcs$pack $FRi,$FRj,$FRk"
-+ (+ pack FRk OP_79 FRi OPE1_3F FRj)
-+ (sequence ()
-+ (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
-+ (set FRk (mul FRi (nextreg h-fr FRj 1)))
-+ (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
-+ (set (nextreg h-fr FRk 1) (mul (nextreg h-fr FRi 1) FRj)))
-+ ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
-+)
-+
-+(define-pmacro (ne-float-dual-arith name attr oper1 oper2 op ope comment)
-+ (dni name
-+ (comment)
-+ (.splice (UNIT FM01) (.unsplice attr))
-+ (.str name "$pack $FRi,$FRj,$FRk")
-+ (+ pack FRk op FRi ope FRj)
-+ (sequence ()
-+ (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
-+ (set FRk (oper1 FRi FRj))
-+ (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
-+ (set (nextreg h-fr FRk 1)
-+ (oper2 (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))))
-+ ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
-+ )
-+)
-+
-+(ne-float-dual-arith nfdadds ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add add OP_79 OPE1_36 "ne dual add, single")
-+(ne-float-dual-arith nfdsubs ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) sub sub OP_79 OPE1_37 "ne dual sub, single")
-+(ne-float-dual-arith nfdmuls ((FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) mul mul OP_79 OPE1_38 "ne dual mul, single")
-+(ne-float-dual-arith nfddivs ((FR500-MAJOR F-7) (MACH frv)) div div OP_79 OPE1_39 "ne dual div,single")
-+(ne-float-dual-arith nfdsads ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add sub OP_79 OPE1_3E "ne dual add/sub, single")
-+
-+(dni nfdcmps
-+ "non-excepting dual float compare"
-+ ((UNIT FM01) (FR500-MAJOR F-6) (MACH simple,tomcat,frv))
-+ "nfdcmps$pack $FRi,$FRj,$FCCi_2"
-+ (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_3A FRj)
-+ (sequence ()
-+ (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
-+ (compare-and-set-fcc FRi FRj FCCi_2)
-+ (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
-+ (compare-and-set-fcc (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)
-+ (nextreg h-fccr FCCi_2 1)))
-+ ((fr500 (unit u-float-dual-compare)))
-+)
-+
-+; Media Instructions
-+;
-+(define-pmacro (halfword hilo arg offset)
-+ (reg (.sym h-fr_ hilo) (add (index-of arg) offset)))
-+
-+(dni mhsetlos
-+ "Media set lower signed 12 bits"
-+ ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1))
-+ "mhsetlos$pack $u12,$FRklo"
-+ (+ pack FRklo OP_78 OPE1_20 u12)
-+ (set FRklo u12)
-+ ((fr400 (unit u-media-hilo)) (fr450 (unit u-media-hilo))
-+ (fr550 (unit u-media-set (out FRintk FRklo))))
-+)
-+
-+(dni mhsethis
-+ "Media set upper signed 12 bits"
-+ ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1))
-+ "mhsethis$pack $u12,$FRkhi"
-+ (+ pack FRkhi OP_78 OPE1_22 u12)
-+ (set FRkhi u12)
-+ ((fr400 (unit u-media-hilo)) (fr450 (unit u-media-hilo))
-+ (fr550 (unit u-media-set (out FRintk FRkhi))))
-+)
-+
-+(dni mhdsets
-+ "Media dual set halfword signed 12 bits"
-+ ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1))
-+ "mhdsets$pack $u12,$FRintk"
-+ (+ pack FRintk OP_78 OPE1_24 u12)
-+ (sequence ()
-+ ; hack to get FRintk passed to modelling functions
-+ (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
-+ (set (halfword hi FRintk 0) u12)
-+ (set (halfword lo FRintk 0) u12))
-+ ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
-+ (fr550 (unit u-media-set)))
-+)
-+
-+(define-pmacro (set-5-semantics target value)
-+ (sequence ((HI tmp))
-+ (set tmp target)
-+ (set tmp (and tmp #x07ff))
-+ (set tmp (or tmp (sll (and s5 #x1f) 11)))
-+ (set target tmp))
-+)
-+
-+(define-pmacro (media-set-5 name hilo op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1))
-+ (.str name "$pack $s5,$FRk" hilo)
-+ (+ pack (.sym FRk hilo) op (FRi-null) ope (misc-null-11) s5)
-+ (set-5-semantics (.sym FRk hilo) s5)
-+ ((fr400 (unit u-media-hilo)) (fr450 (unit u-media-hilo))
-+ (fr550 (unit u-media-set (out FRintk (.sym FRk hilo)))))
-+ )
-+)
-+
-+(media-set-5 mhsetloh lo OP_78 OPE1_21 "Media set upper 5 bits lo")
-+(media-set-5 mhsethih hi OP_78 OPE1_23 "Media set upper 5 bits hi")
-+
-+(dni mhdseth
-+ "Media dual set halfword upper 5 bits"
-+ ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1))
-+ "mhdseth$pack $s5,$FRintk"
-+ (+ pack FRintk OP_78 (FRi-null) OPE1_25 (misc-null-11) s5)
-+ (sequence ()
-+ ; hack to get FRintk passed to modelling functions
-+ (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
-+ (set-5-semantics (halfword hi FRintk 0) s5)
-+ (set-5-semantics (halfword lo FRintk 0) s5))
-+ ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
-+ (fr550 (unit u-media-set)))
-+)
-+
-+(define-pmacro (media-logic-r-r name operation op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1))
-+ (.str name "$pack $FRinti,$FRintj,$FRintk")
-+ (+ pack FRintk op FRinti ope FRintj)
-+ (set FRintk (operation FRinti FRintj))
-+ ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
-+ (fr500 (unit u-media)) (fr550 (unit u-media)))
-+ )
-+)
-+
-+(media-logic-r-r mand and OP_7B OPE1_00 "and reg/reg")
-+(media-logic-r-r mor or OP_7B OPE1_01 "or reg/reg")
-+(media-logic-r-r mxor xor OP_7B OPE1_02 "xor reg/reg")
-+
-+(define-pmacro (conditional-media-logic name operation op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL)
-+ (.str name "$pack $FRinti,$FRintj,$FRintk,$CCi,$cond")
-+ (+ pack FRintk op FRinti CCi cond ope FRintj)
-+ (if (eq CCi (or cond 2))
-+ (set FRintk (operation FRinti FRintj)))
-+ ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
-+ (fr500 (unit u-media)) (fr550 (unit u-media)))
-+ )
-+)
-+
-+(conditional-media-logic cmand and OP_70 OPE4_0 "conditional and reg/reg")
-+(conditional-media-logic cmor or OP_70 OPE4_1 "conditional or reg/reg")
-+(conditional-media-logic cmxor xor OP_70 OPE4_2 "conditional xor reg/reg")
-+
-+(dni mnot
-+ ("mnot")
-+ ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1))
-+ ("mnot$pack $FRintj,$FRintk")
-+ (+ pack FRintk OP_7B (rs-null) OPE1_03 FRintj)
-+ (set FRintk (inv FRintj))
-+ ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
-+ (fr500 (unit u-media)) (fr550 (unit u-media)))
-+)
-+
-+(dni cmnot
-+ ("cmnot")
-+ ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL)
-+ ("cmnot$pack $FRintj,$FRintk,$CCi,$cond")
-+ (+ pack FRintk OP_70 (rs-null) CCi cond OPE4_3 FRintj)
-+ (if (eq CCi (or cond 2))
-+ (set FRintk (inv FRintj)))
-+ ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
-+ (fr500 (unit u-media)) (fr550 (unit u-media)))
-+)
-+
-+(define-pmacro (media-rotate-r-r name operation op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1))
-+ (.str name "$pack $FRinti,$u6,$FRintk")
-+ (+ pack FRintk op FRinti ope u6)
-+ (set FRintk (operation FRinti (and u6 #x1f)))
-+ ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
-+ (fr500 (unit u-media)) (fr550 (unit u-media)))
-+ )
-+)
-+
-+(media-rotate-r-r mrotli rol OP_7B OPE1_04 "rotate left reg/reg")
-+(media-rotate-r-r mrotri ror OP_7B OPE1_05 "rotate right reg/reg")
-+
-+(define-pmacro (media-cut-r-r name arg op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-2))
-+ (.str name "$pack $FRinti,$" arg ",$FRintk")
-+ (+ pack FRintk op FRinti ope arg)
-+ (set FRintk (c-call SI "@cpu@_cut" FRinti (nextreg h-fr_int FRinti 1) arg))
-+ ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
-+ (fr500 (unit u-media)) (fr550 (unit u-media)))
-+ )
-+)
-+
-+(media-cut-r-r mwcut FRintj OP_7B OPE1_06 "media cut")
-+(media-cut-r-r mwcuti u6 OP_7B OPE1_07 "media cut")
-+
-+(define-pmacro (media-cut-acc name arg op ope fr450-major comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-1) (FR450-MAJOR fr450-major))
-+ (.str name "$pack $ACC40Si,$" arg ",$FRintk")
-+ (+ pack FRintk op ACC40Si ope arg)
-+ (set FRintk (c-call SI "@cpu@_media_cut" ACC40Si arg))
-+ ((fr400 (unit u-media-4)) (fr450 (unit u-media-4))
-+ (fr500 (unit u-media)) (fr550 (unit u-media-3-acc)))
-+ )
-+)
-+
-+(media-cut-acc mcut FRintj OP_7B OPE1_2C M-1 "media accumulator cut reg")
-+(media-cut-acc mcuti s6 OP_7B OPE1_2E M-5 "media accumulator cut immed")
-+
-+(define-pmacro (media-cut-acc-ss name arg op ope fr450-major comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-1) (FR450-MAJOR fr450-major))
-+ (.str name "$pack $ACC40Si,$" arg ",$FRintk")
-+ (+ pack FRintk op ACC40Si ope arg)
-+ (set FRintk (c-call SI "@cpu@_media_cut_ss" ACC40Si arg))
-+ ((fr400 (unit u-media-4)) (fr450 (unit u-media-4))
-+ (fr500 (unit u-media)) (fr550 (unit u-media-3-acc)))
-+ )
-+)
-+
-+(media-cut-acc-ss mcutss FRintj OP_7B OPE1_2D M-1 "media accumulator cut reg with saturation")
-+(media-cut-acc-ss mcutssi s6 OP_7B OPE1_2F M-5 "media accumulator cut immed with saturation")
-+
-+; Dual Media Instructions
-+;
-+(define-pmacro (register-unaligned register alignment)
-+ (and (index-of register) (sub alignment 1))
-+)
-+
-+(dni mdcutssi
-+ "Media dual cut with signed saturation"
-+ ((UNIT MDCUTSSI) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-6))
-+ "mdcutssi$pack $ACC40Si,$s6,$FRintkeven"
-+ (+ pack FRintkeven OP_78 ACC40Si OPE1_0E s6)
-+ (if (register-unaligned ACC40Si 2)
-+ (c-call VOID "@cpu@_media_acc_not_aligned")
-+ (if (register-unaligned FRintkeven 2)
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (sequence ()
-+ (set FRintkeven (c-call SI "@cpu@_media_cut_ss" ACC40Si s6))
-+ (set (nextreg h-fr_int FRintkeven 1)
-+ (c-call SI "@cpu@_media_cut_ss"
-+ (nextreg h-acc40S ACC40Si 1) s6)))))
-+ ((fr400 (unit u-media-4-acc-dual
-+ (out FRintk FRintkeven)))
-+ (fr450 (unit u-media-4-acc-dual
-+ (out FRintk FRintkeven)))
-+ (fr550 (unit u-media-3-acc-dual)))
-+)
-+
-+; The (add (xxxx) (mul arg 0)) is a hack to get a reference to arg generated
-+; so it will be passed to the unit modelers. YUCK!!!!!
-+(define-pmacro (extract-hilo reg1 off1 reg2 off2 arg1hi arg1lo arg2hi arg2lo)
-+ (sequence ()
-+ (set arg1hi (add (halfword hi reg1 off1) (mul reg1 0)))
-+ (set arg1lo (add (halfword lo reg1 off1) (mul reg1 0)))
-+ (set arg2hi (add (halfword hi reg2 off2) (mul reg2 0)))
-+ (set arg2lo (add (halfword lo reg2 off2) (mul reg2 0))))
-+)
-+
-+(dni maveh
-+ "Media dual average"
-+ ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1))
-+ "maveh$pack $FRinti,$FRintj,$FRintk"
-+ (+ pack FRintk OP_7B FRinti OPE1_08 FRintj)
-+ (set FRintk (c-call SI "@cpu@_media_average" FRinti FRintj))
-+ ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
-+ (fr500 (unit u-media)) (fr550 (unit u-media)))
-+)
-+
-+(define-pmacro (media-dual-shift name operation op ope profile comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1))
-+ (.str name "$pack $FRinti,$u6,$FRintk")
-+ (+ pack FRintk op FRinti ope u6)
-+ (sequence ()
-+ ; hack to get these referenced for profiling
-+ (set FRinti (c-raw-call SI "frv_ref_SI" FRinti))
-+ (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
-+ (set (halfword hi FRintk 0)
-+ (operation (halfword hi FRinti 0) (and u6 #xf)))
-+ (set (halfword lo FRintk 0)
-+ (operation (halfword lo FRinti 0) (and u6 #xf))))
-+ profile
-+ )
-+)
-+
-+(media-dual-shift msllhi sll OP_7B OPE1_09
-+ ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
-+ (fr500 (unit u-media)) (fr550 (unit u-media)))
-+ "Media dual shift left logical")
-+(media-dual-shift msrlhi srl OP_7B OPE1_0A
-+ ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
-+ (fr500 (unit u-media)) (fr550 (unit u-media)))
-+ "Media dual shift right logical")
-+(media-dual-shift msrahi sra OP_7B OPE1_0B
-+ ((fr400 (unit u-media-6)) (fr450 (unit u-media-6))
-+ (fr500 (unit u-media)) (fr550 (unit u-media)))
-+ "Media dual shift right arithmetic")
-+
-+(define-pmacro (media-dual-word-rotate-r-r name operation op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMLOW) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-2))
-+ (.str name "$pack $FRintieven,$s6,$FRintkeven")
-+ (+ pack FRintkeven op FRintieven ope s6)
-+ (if (orif (register-unaligned FRintieven 2)
-+ (register-unaligned FRintkeven 2))
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (sequence ()
-+ (set FRintkeven (operation FRintieven (and s6 #x1f)))
-+ (set (nextreg h-fr_int FRintkeven 1)
-+ (operation (nextreg h-fr_int FRintieven 1)
-+ (and s6 #x1f)))))
-+ ((fr400 (unit u-media-3-quad
-+ (in FRinti FRintieven)
-+ (out FRintk FRintkeven)))
-+ (fr450 (unit u-media-3-quad
-+ (in FRinti FRintieven)
-+ (out FRintk FRintkeven)))
-+ (fr550 (unit u-media-quad)))
-+ )
-+)
-+
-+(media-dual-word-rotate-r-r mdrotli rol OP_78 OPE1_0B "rotate left reg/reg")
-+
-+(dni mcplhi
-+ "Media bit concatenate, halfword"
-+ ((UNIT FMLOW) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-2))
-+ "mcplhi$pack $FRinti,$u6,$FRintk"
-+ (+ pack FRintk OP_78 FRinti OPE1_0C u6)
-+ (sequence ((HI arg1) (HI arg2) (HI shift))
-+ (set FRinti (c-raw-call SI "frv_ref_SI" FRinti))
-+ (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
-+ (set shift (and u6 #xf))
-+ (set arg1 (sll (halfword hi FRinti 0) shift))
-+ (if (ne shift 0)
-+ (sequence ()
-+ (set arg2 (halfword hi FRinti 1))
-+ (set arg2 (srl HI (sll HI arg2 (sub 15 shift))
-+ (sub 15 shift)))
-+ (set arg1 (or HI arg1 arg2))))
-+ (set (halfword hi FRintk 0) arg1))
-+ ((fr400 (unit u-media-3-dual)) (fr450 (unit u-media-3-dual))
-+ (fr550 (unit u-media-3-dual)))
-+)
-+
-+(dni mcpli
-+ "Media bit concatenate, word"
-+ ((UNIT FMLOW) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-2))
-+ "mcpli$pack $FRinti,$u6,$FRintk"
-+ (+ pack FRintk OP_78 FRinti OPE1_0D u6)
-+ (sequence ((SI tmp) (SI shift))
-+ (set shift (and u6 #x1f))
-+ (set tmp (sll FRinti shift))
-+ (if (ne shift 0)
-+ (sequence ((SI tmp1))
-+ (set tmp1 (srl (sll (nextreg h-fr_int FRinti 1)
-+ (sub 31 shift))
-+ (sub 31 shift)))
-+ (set tmp (or tmp tmp1))))
-+ (set FRintk tmp))
-+ ((fr400 (unit u-media-3-dual)) (fr450 (unit u-media-3-dual))
-+ (fr550 (unit u-media-3-dual)))
-+)
-+
-+(define-pmacro (saturate arg max min result)
-+ (if (gt arg max)
-+ (set result max)
-+ (if (lt arg min)
-+ (set result min)
-+ (set result arg)))
-+)
-+
-+(dni msaths
-+ "Media dual saturation signed"
-+ ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1))
-+ "msaths$pack $FRinti,$FRintj,$FRintk"
-+ (+ pack FRintk OP_7B FRinti OPE1_0C FRintj)
-+ (sequence ((HI argihi) (HI argilo) (HI argjhi) (HI argjlo))
-+ (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
-+ (saturate argihi argjhi (inv argjhi) (halfword hi FRintk 0))
-+ (saturate argilo argjlo (inv argjlo) (halfword lo FRintk 0)))
-+ ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
-+ (fr500 (unit u-media)) (fr550 (unit u-media)))
-+)
-+
-+(dni mqsaths
-+ "Media quad saturation signed"
-+ ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-2)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-2))
-+ "mqsaths$pack $FRintieven,$FRintjeven,$FRintkeven"
-+ (+ pack FRintkeven OP_78 FRintieven OPE1_0F FRintjeven)
-+ (if (orif (register-unaligned FRintieven 2)
-+ (orif (register-unaligned FRintjeven 2)
-+ (register-unaligned FRintkeven 2)))
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (sequence ((HI argihi) (HI argilo) (HI argjhi) (HI argjlo))
-+ ; hack to get FRintkeven referenced as a target for profiling
-+ (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
-+ (extract-hilo FRintieven 0 FRintjeven 0 argihi argilo argjhi argjlo)
-+ (saturate argihi argjhi (inv argjhi) (halfword hi FRintkeven 0))
-+ (saturate argilo argjlo (inv argjlo) (halfword lo FRintkeven 0))
-+ (extract-hilo FRintieven 1 FRintjeven 1 argihi argilo argjhi argjlo)
-+ (saturate argihi argjhi (inv argjhi) (halfword hi FRintkeven 1))
-+ (saturate argilo argjlo (inv argjlo) (halfword lo FRintkeven 1))))
-+ ((fr400 (unit u-media-1-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)
-+ (out FRintk FRintkeven)))
-+ (fr450 (unit u-media-1-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)
-+ (out FRintk FRintkeven)))
-+ (fr550 (unit u-media-quad)))
-+)
-+
-+(define-pmacro (saturate-unsigned arg max result)
-+ (if (gt arg max)
-+ (set result max)
-+ (set result arg))
-+)
-+
-+(dni msathu
-+ "Media dual saturation unsigned"
-+ ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1))
-+ "msathu$pack $FRinti,$FRintj,$FRintk"
-+ (+ pack FRintk OP_7B FRinti OPE1_0D FRintj)
-+ (sequence ((UHI argihi) (UHI argilo) (UHI argjhi) (UHI argjlo))
-+ (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
-+ (saturate-unsigned argihi argjhi (halfword hi FRintk 0))
-+ (saturate-unsigned argilo argjlo (halfword lo FRintk 0)))
-+ ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
-+ (fr500 (unit u-media)) (fr550 (unit u-media)))
-+)
-+
-+(define-pmacro (media-dual-compare name mode op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1))
-+ (.str name "$pack $FRinti,$FRintj,$FCCk")
-+ (+ pack (cond-null) FCCk op FRinti ope FRintj)
-+ (if (register-unaligned FCCk 2)
-+ (c-call VOID "@cpu@_media_cr_not_aligned")
-+ (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
-+ (extract-hilo FRinti 0 FRintj 0
-+ argihi argilo argjhi argjlo)
-+ (compare-and-set-fcc argihi argjhi FCCk)
-+ (compare-and-set-fcc argilo argjlo (nextreg h-fccr FCCk 1))))
-+ ; TODO - doesn't handle second FCC
-+ ((fr400 (unit u-media-7)) (fr450 (unit u-media-7))
-+ (fr500 (unit u-media)) (fr550 (unit u-media)))
-+ )
-+)
-+
-+(media-dual-compare mcmpsh HI OP_7B OPE1_0E "Media dual compare signed")
-+(media-dual-compare mcmpuh UHI OP_7B OPE1_0F "Media dual compare unsigned")
-+
-+; Bits for the MSR.SIE field
-+(define-pmacro (msr-sie-nil) 0)
-+(define-pmacro (msr-sie-fri-hi) 8)
-+(define-pmacro (msr-sie-fri-lo) 4)
-+(define-pmacro (msr-sie-fri-1-hi) 2)
-+(define-pmacro (msr-sie-fri-1-lo) 1)
-+(define-pmacro (msr-sie-acci) 8)
-+(define-pmacro (msr-sie-acci-1) 4)
-+(define-pmacro (msr-sie-acci-2) 2)
-+(define-pmacro (msr-sie-acci-3) 1)
-+
-+(define-pmacro (saturate-v arg max min sie result)
-+ (if (gt DI arg max)
-+ (sequence ()
-+ (set result max)
-+ (c-call VOID "@cpu@_media_overflow" sie))
-+ (if (lt DI arg min)
-+ (sequence ()
-+ (set result min)
-+ (c-call VOID "@cpu@_media_overflow" sie))
-+ (set result arg)))
-+)
-+
-+(dni mabshs
-+ "Media dual absolute value, halfword"
-+ ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-2)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1))
-+ "mabshs$pack $FRintj,$FRintk"
-+ (+ pack FRintk OP_78 (FRi-null) OPE1_0A FRintj)
-+ (sequence ((HI arghi) (HI arglo))
-+ (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
-+ (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
-+ (set arghi (halfword hi FRintj 0))
-+ (set arglo (halfword lo FRintj 0))
-+ (saturate-v (abs arghi) 32767 -32768 (msr-sie-fri-hi)
-+ (halfword hi FRintk 0))
-+ (saturate-v (abs arglo) 32767 -32768 (msr-sie-fri-lo)
-+ (halfword lo FRintk 0)))
-+ ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
-+ (fr550 (unit u-media)))
-+)
-+
-+(define-pmacro (media-arith-sat-semantics
-+ operation arg1 arg2 res mode max min sie)
-+ (sequence ((DI tmp))
-+ (set tmp (operation arg1 arg2))
-+ (saturate-v tmp max min sie res))
-+)
-+
-+(define-pmacro (media-dual-arith-sat-semantics operation mode max min)
-+ (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
-+ (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
-+ (media-arith-sat-semantics operation argihi argjhi
-+ (halfword hi FRintk 0) mode max min
-+ (msr-sie-fri-hi))
-+ (media-arith-sat-semantics operation argilo argjlo
-+ (halfword lo FRintk 0) mode max min
-+ (msr-sie-fri-lo)))
-+)
-+
-+(define-pmacro (media-dual-arith-sat name operation mode max min op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1))
-+ (.str name "$pack $FRinti,$FRintj,$FRintk")
-+ (+ pack FRintk op FRinti ope FRintj)
-+ (media-dual-arith-sat-semantics operation mode max min)
-+ ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
-+ (fr500 (unit u-media)) (fr550 (unit u-media)))
-+ )
-+)
-+
-+(media-dual-arith-sat maddhss add HI 32767 -32768 OP_7B OPE1_10 "Media dual add signed with saturation")
-+(media-dual-arith-sat maddhus add UHI 65535 0 OP_7B OPE1_11 "Media dual add unsigned with saturation")
-+
-+(media-dual-arith-sat msubhss sub HI 32767 -32768 OP_7B OPE1_12 "Media dual sub signed with saturation")
-+(media-dual-arith-sat msubhus sub UHI 65535 0 OP_7B OPE1_13 "Media dual sub unsigned with saturation")
-+
-+(define-pmacro (conditional-media-dual-arith-sat
-+ name operation mode max min op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL)
-+ (.str name "$pack $FRinti,$FRintj,$FRintk,$CCi,$cond")
-+ (+ pack FRintk op FRinti CCi cond ope FRintj)
-+ (if (eq CCi (or cond 2))
-+ (media-dual-arith-sat-semantics operation mode max min))
-+ ((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
-+ (fr500 (unit u-media)) (fr550 (unit u-media)))
-+ )
-+)
-+
-+(conditional-media-dual-arith-sat cmaddhss add HI 32767 -32768 OP_71 OPE4_0 "Conditional Media dual add signed with saturation")
-+(conditional-media-dual-arith-sat cmaddhus add UHI 65535 0 OP_71 OPE4_1 "Conditional Media dual add unsigned with saturation")
-+
-+(conditional-media-dual-arith-sat cmsubhss sub HI 32767 -32768 OP_71 OPE4_2 "Conditional Media dual sub signed with saturation")
-+(conditional-media-dual-arith-sat cmsubhus sub UHI 65535 0 OP_71 OPE4_3 "Conditional Media dual sub unsigned with saturation")
-+
-+(define-pmacro (media-quad-arith-sat-semantics cond operation mode max min)
-+ (if (orif (register-unaligned FRintieven 2)
-+ (orif (register-unaligned FRintjeven 2)
-+ (register-unaligned FRintkeven 2)))
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (if cond
-+ (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
-+ ; hack to get FRintkeven referenced as a target for profiling
-+ (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
-+ (extract-hilo FRintieven 0 FRintjeven 0
-+ argihi argilo argjhi argjlo)
-+ (media-arith-sat-semantics operation argihi argjhi
-+ (halfword hi FRintkeven 0) mode
-+ max min (msr-sie-fri-hi))
-+ (media-arith-sat-semantics operation argilo argjlo
-+ (halfword lo FRintkeven 0) mode
-+ max min (msr-sie-fri-lo))
-+ (extract-hilo FRintieven 1 FRintjeven 1
-+ argihi argilo argjhi argjlo)
-+ (media-arith-sat-semantics operation argihi argjhi
-+ (halfword hi FRintkeven 1) mode
-+ max min (msr-sie-fri-1-hi))
-+ (media-arith-sat-semantics operation argilo argjlo
-+ (halfword lo FRintkeven 1) mode
-+ max min (msr-sie-fri-1-lo)))))
-+)
-+
-+(define-pmacro (media-quad-arith-sat name operation mode max min op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-2))
-+ (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven")
-+ (+ pack FRintkeven op FRintieven ope FRintjeven)
-+ (media-quad-arith-sat-semantics 1 operation mode max min)
-+ ((fr400 (unit u-media-1-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)
-+ (out FRintk FRintkeven)))
-+ (fr450 (unit u-media-1-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)
-+ (out FRintk FRintkeven)))
-+ (fr500 (unit u-media-quad-arith
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)
-+ (out FRintk FRintkeven))) (fr550 (unit u-media-quad)))
-+ )
-+)
-+
-+(media-quad-arith-sat mqaddhss add HI 32767 -32768 OP_7B OPE1_18 "Media quad add signed with saturation")
-+(media-quad-arith-sat mqaddhus add UHI 65535 0 OP_7B OPE1_19 "Media quad add unsigned with saturation")
-+
-+(media-quad-arith-sat mqsubhss sub HI 32767 -32768 OP_7B OPE1_1A "Media quad sub signed with saturation")
-+(media-quad-arith-sat mqsubhus sub UHI 65535 0 OP_7B OPE1_1B "Media quad sub unsigned with saturation")
-+
-+(define-pmacro (conditional-media-quad-arith-sat
-+ name operation mode max min op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL)
-+ (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond")
-+ (+ pack FRintkeven op FRintieven CCi cond ope FRintjeven)
-+ (media-quad-arith-sat-semantics (eq CCi (or cond 2))
-+ operation mode max min)
-+ ((fr400 (unit u-media-1-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)
-+ (out FRintk FRintkeven)))
-+ (fr450 (unit u-media-1-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)
-+ (out FRintk FRintkeven)))
-+ (fr500 (unit u-media-quad-arith
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)
-+ (out FRintk FRintkeven))) (fr550 (unit u-media-quad)))
-+ )
-+)
-+
-+(conditional-media-quad-arith-sat cmqaddhss add HI 32767 -32768 OP_73 OPE4_0 "Conditional Media quad add signed with saturation")
-+(conditional-media-quad-arith-sat cmqaddhus add UHI 65535 0 OP_73 OPE4_1 "Conditional Media quad add unsigned with saturation")
-+
-+(conditional-media-quad-arith-sat cmqsubhss sub HI 32767 -32768 OP_73 OPE4_2 "Conditional Media quad sub signed with saturation")
-+(conditional-media-quad-arith-sat cmqsubhus sub UHI 65535 0 OP_73 OPE4_3 "Conditional Media quad sub unsigned with saturation")
-+
-+;; Return A if |A| > |B| and B is positive. Return -A if |A| > |B| and
-+;; B is negative, saturating 0x8000 as 0x7fff. Return 0 otherwise.
-+(define-pmacro (media-low-clear-semantics a b)
-+ (cond HI
-+ ((le UHI (abs a) (abs b)) 0)
-+ ((le HI 0 b) a)
-+ ((eq HI a -32768) 32767)
-+ (else (neg a))))
-+
-+;; Return A if -|B| < A < |B|. Return -B if A <= -|B|, saturating 0x8000
-+;; as 0x7fff. Return B if A >= |B|.
-+(define-pmacro (media-scope-limit-semantics a b)
-+ (cond HI
-+ ((andif (gt HI b -32768)
-+ (ge HI a (abs b))) b)
-+ ((gt HI a (neg (abs b))) a)
-+ ((eq HI b -32768) 32767)
-+ (else (neg b))))
-+
-+(define-pmacro (media-quad-limit name operation op ope comment)
-+ (dni name
-+ comment
-+ ((UNIT FM0) (MACH fr450) (FR450-MAJOR M-2))
-+ (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven")
-+ (+ pack FRintkeven op FRintieven ope FRintjeven)
-+ (if (orif (register-unaligned FRintieven 2)
-+ (orif (register-unaligned FRintjeven 2)
-+ (register-unaligned FRintkeven 2)))
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (sequence ((HI a1) (HI a2) (HI a3) (HI a4)
-+ (HI b1) (HI b2) (HI b3) (HI b4))
-+ ; hack to get FRintkeven referenced as a target
-+ ; for profiling
-+ (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
-+ (extract-hilo FRintieven 0 FRintjeven 0 a1 a2 b1 b2)
-+ (extract-hilo FRintieven 1 FRintjeven 1 a3 a4 b3 b4)
-+ (set (halfword hi FRintkeven 0) (operation a1 b1))
-+ (set (halfword lo FRintkeven 0) (operation a2 b2))
-+ (set (halfword hi FRintkeven 1) (operation a3 b3))
-+ (set (halfword lo FRintkeven 1) (operation a4 b4))))
-+ ((fr450 (unit u-media-1-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)
-+ (out FRintk FRintkeven))))
-+ )
-+)
-+
-+(media-quad-limit mqlclrhs media-low-clear-semantics OP_78 OPE1_10
-+ "Media quad low clear")
-+(media-quad-limit mqlmths media-scope-limit-semantics OP_78 OPE1_14
-+ "Media quad scope limitation")
-+
-+(define-pmacro (media-quad-shift name operation op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FM0) (MACH fr450) (FR450-MAJOR M-2))
-+ (.str name "$pack $FRintieven,$u6,$FRintkeven")
-+ (+ pack FRintkeven op FRintieven ope u6)
-+ (if (orif (register-unaligned FRintieven 2)
-+ (register-unaligned FRintkeven 2))
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (sequence ()
-+ ; hack to get these referenced for profiling
-+ (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven))
-+ (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
-+ (set (halfword hi FRintkeven 0)
-+ (operation HI (halfword hi FRintieven 0)
-+ (and u6 #xf)))
-+ (set (halfword lo FRintkeven 0)
-+ (operation HI (halfword lo FRintieven 0)
-+ (and u6 #xf)))
-+ (set (halfword hi FRintkeven 1)
-+ (operation HI (halfword hi FRintieven 1)
-+ (and u6 #xf)))
-+ (set (halfword lo FRintkeven 1)
-+ (operation HI (halfword lo FRintieven 1)
-+ (and u6 #xf)))))
-+ ((fr450 (unit u-media-3-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintieven)
-+ (out FRintk FRintkeven))))
-+ )
-+)
-+
-+(media-quad-shift mqsllhi sll OP_78 OPE1_11 "Media quad left shift")
-+(media-quad-shift mqsrahi sra OP_78 OPE1_13 "Media quad right shift")
-+
-+(define-pmacro (media-acc-arith-sat name operation mode max min op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-3))
-+ (.str name "$pack $ACC40Si,$ACC40Sk")
-+ (+ pack ACC40Sk op ACC40Si ope (ACCj-null))
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si))
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
-+ (if (register-unaligned ACC40Si 2)
-+ (c-call VOID "@cpu@_media_acc_not_aligned")
-+ (media-arith-sat-semantics operation ACC40Si
-+ (nextreg h-acc40S ACC40Si 1)
-+ ACC40Sk mode max min (msr-sie-acci)))))
-+ ((fr400 (unit u-media-2-acc)) (fr450 (unit u-media-2-acc))
-+ (fr550 (unit u-media-4-acc)))
-+ )
-+)
-+
-+(media-acc-arith-sat maddaccs add DI #x7fffffffff (inv DI #x7fffffffff)
-+ OP_78 OPE1_04 "Media accumulator addition")
-+(media-acc-arith-sat msubaccs sub DI #x7fffffffff (inv DI #x7fffffffff)
-+ OP_78 OPE1_05 "Media accumulator subtraction")
-+
-+(define-pmacro (media-dual-acc-arith-sat name operation mode max min op ope
-+ comment)
-+ (dni name
-+ (comment)
-+ ((UNIT MDUALACC) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-4))
-+ (.str name "$pack $ACC40Si,$ACC40Sk")
-+ (+ pack ACC40Sk op ACC40Si ope (ACCj-null))
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si))
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
-+ (if (register-unaligned ACC40Si 4)
-+ (c-call VOID "@cpu@_media_acc_not_aligned")
-+ (if (register-unaligned ACC40Sk 2)
-+ (c-call VOID "@cpu@_media_acc_not_aligned")
-+ (sequence ()
-+ (media-arith-sat-semantics operation ACC40Si
-+ (nextreg h-acc40S ACC40Si 1)
-+ ACC40Sk mode max min
-+ (msr-sie-acci))
-+ (media-arith-sat-semantics operation
-+ (nextreg h-acc40S ACC40Si 2)
-+ (nextreg h-acc40S ACC40Si 3)
-+ (nextreg h-acc40S ACC40Sk 1)
-+ mode max min
-+ (msr-sie-acci-1)))))))
-+ ((fr400 (unit u-media-2-acc-dual)) (fr450 (unit u-media-2-acc-dual))
-+ (fr550 (unit u-media-4-acc-dual)))
-+ )
-+)
-+
-+(media-dual-acc-arith-sat mdaddaccs add DI #x7fffffffff (inv DI #x7fffffffff)
-+ OP_78 OPE1_06 "Media accumulator addition")
-+(media-dual-acc-arith-sat mdsubaccs sub DI #x7fffffffff (inv DI #x7fffffffff)
-+ OP_78 OPE1_07 "Media accumulator subtraction")
-+
-+(dni masaccs
-+ "Media add and subtract signed accumulator with saturation"
-+ ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-3))
-+ "masaccs$pack $ACC40Si,$ACC40Sk"
-+ (+ pack ACC40Sk OP_78 ACC40Si OPE1_08 (ACCj-null))
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si))
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
-+ (if (register-unaligned ACC40Si 2)
-+ (c-call VOID "@cpu@_media_acc_not_aligned")
-+ (if (register-unaligned ACC40Sk 2)
-+ (c-call VOID "@cpu@_media_acc_not_aligned")
-+ (sequence ()
-+ (media-arith-sat-semantics add ACC40Si
-+ (nextreg h-acc40S ACC40Si 1)
-+ ACC40Sk DI
-+ #x7fffffffff
-+ (inv DI #x7fffffffff)
-+ (msr-sie-acci))
-+ (media-arith-sat-semantics sub ACC40Si
-+ (nextreg h-acc40S ACC40Si 1)
-+ (nextreg h-acc40S ACC40Sk 1)
-+ DI
-+ #x7fffffffff
-+ (inv DI #x7fffffffff)
-+ (msr-sie-acci-1)))))))
-+ ((fr400 (unit u-media-2-add-sub)) (fr450 (unit u-media-2-add-sub))
-+ (fr550 (unit u-media-4-add-sub)))
-+ )
-+
-+(dni mdasaccs
-+ "Media add and subtract signed accumulator with saturation"
-+ ((UNIT MDUALACC) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-4))
-+ "mdasaccs$pack $ACC40Si,$ACC40Sk"
-+ (+ pack ACC40Sk OP_78 ACC40Si OPE1_09 (ACCj-null))
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si))
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
-+ (if (register-unaligned ACC40Si 4)
-+ (c-call VOID "@cpu@_media_acc_not_aligned")
-+ (if (register-unaligned ACC40Sk 4)
-+ (c-call VOID "@cpu@_media_acc_not_aligned")
-+ (sequence ()
-+ (media-arith-sat-semantics add ACC40Si
-+ (nextreg h-acc40S ACC40Si 1)
-+ ACC40Sk DI
-+ #x7fffffffff
-+ (inv DI #x7fffffffff)
-+ (msr-sie-acci))
-+ (media-arith-sat-semantics sub ACC40Si
-+ (nextreg h-acc40S ACC40Si 1)
-+ (nextreg h-acc40S ACC40Sk 1)
-+ DI
-+ #x7fffffffff
-+ (inv DI #x7fffffffff)
-+ (msr-sie-acci-1))
-+ (media-arith-sat-semantics add
-+ (nextreg h-acc40S ACC40Si 2)
-+ (nextreg h-acc40S ACC40Si 3)
-+ (nextreg h-acc40S ACC40Sk 2)
-+ DI
-+ #x7fffffffff
-+ (inv DI #x7fffffffff)
-+ (msr-sie-acci-2))
-+ (media-arith-sat-semantics sub
-+ (nextreg h-acc40S ACC40Si 2)
-+ (nextreg h-acc40S ACC40Si 3)
-+ (nextreg h-acc40S ACC40Sk 3)
-+ DI
-+ #x7fffffffff
-+ (inv DI #x7fffffffff)
-+ (msr-sie-acci-3)))))))
-+ ((fr400 (unit u-media-2-add-sub-dual))
-+ (fr450 (unit u-media-2-add-sub-dual))
-+ (fr550 (unit u-media-4-add-sub-dual)))
-+ )
-+
-+(define-pmacro (media-multiply-semantics conv arg1 arg2 res)
-+ (set res (mul DI (conv DI arg1) (conv DI arg2)))
-+)
-+
-+(define-pmacro (media-dual-multiply-semantics cond mode conv rhs1 rhs2)
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
-+ (if (register-unaligned ACC40Sk 2)
-+ (c-call VOID "@cpu@_media_acc_not_aligned")
-+ (if cond
-+ (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
-+ (extract-hilo FRinti 0 FRintj 0
-+ argihi argilo argjhi argjlo)
-+ (media-multiply-semantics conv argihi rhs1 ACC40Sk)
-+ (media-multiply-semantics conv argilo rhs2
-+ (nextreg h-acc40S ACC40Sk 1))))))
-+)
-+
-+(define-pmacro (media-dual-multiply name mode conv rhs1 rhs2 op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-3) PRESERVE-OVF)
-+ (.str name "$pack $FRinti,$FRintj,$ACC40Sk")
-+ (+ pack ACC40Sk op FRinti ope FRintj)
-+ (media-dual-multiply-semantics 1 mode conv rhs1 rhs2)
-+ ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
-+ (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
-+ )
-+)
-+
-+(media-dual-multiply mmulhs HI ext argjhi argjlo OP_7B OPE1_14 "Media dual multiply signed")
-+(media-dual-multiply mmulhu UHI zext argjhi argjlo OP_7B OPE1_15 "Media dual multiply unsigned")
-+
-+(media-dual-multiply mmulxhs HI ext argjlo argjhi OP_7B OPE1_28 "Media dual cross multiply signed")
-+(media-dual-multiply mmulxhu UHI zext argjlo argjhi OP_7B OPE1_29 "Media dual cross multiply unsigned")
-+
-+(define-pmacro (conditional-media-dual-multiply
-+ name mode conv rhs1 rhs2 op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-3)
-+ PRESERVE-OVF CONDITIONAL)
-+ (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond")
-+ (+ pack ACC40Sk op FRinti CCi cond ope FRintj)
-+ (media-dual-multiply-semantics (eq CCi (or cond 2)) mode conv rhs1 rhs2)
-+ ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
-+ (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
-+ )
-+)
-+
-+(conditional-media-dual-multiply cmmulhs HI ext argjhi argjlo OP_72 OPE4_0 "Conditional Media dual multiply signed")
-+(conditional-media-dual-multiply cmmulhu UHI zext argjhi argjlo OP_72 OPE4_1 "Conditional Media dual multiply unsigned")
-+
-+(define-pmacro (media-quad-multiply-semantics cond mode conv rhs1 rhs2)
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
-+ (if (register-unaligned ACC40Sk 4)
-+ (c-call VOID "@cpu@_media_acc_not_aligned")
-+ (if (orif (register-unaligned FRintieven 2)
-+ (register-unaligned FRintjeven 2))
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (if cond
-+ (sequence ((mode argihi) (mode argilo)
-+ (mode argjhi) (mode argjlo))
-+ (extract-hilo FRintieven 0 FRintjeven 0
-+ argihi argilo argjhi argjlo)
-+ (media-multiply-semantics conv argihi rhs1 ACC40Sk)
-+ (media-multiply-semantics conv argilo rhs2
-+ (nextreg h-acc40S ACC40Sk 1))
-+ (extract-hilo FRintieven 1 FRintjeven 1
-+ argihi argilo argjhi argjlo)
-+ (media-multiply-semantics conv argihi rhs1
-+ (nextreg h-acc40S ACC40Sk 2))
-+ (media-multiply-semantics conv argilo rhs2
-+ (nextreg h-acc40S ACC40Sk 3)))))))
-+)
-+
-+(define-pmacro (media-quad-multiply name mode conv rhs1 rhs2 op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-4) PRESERVE-OVF)
-+ (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk")
-+ (+ pack ACC40Sk op FRintieven ope FRintjeven)
-+ (media-quad-multiply-semantics 1 mode conv rhs1 rhs2)
-+ ((fr400 (unit u-media-2-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)))
-+ (fr450 (unit u-media-2-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)))
-+ (fr500 (unit u-media-quad-mul
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
-+ )
-+)
-+
-+(media-quad-multiply mqmulhs HI ext argjhi argjlo OP_7B OPE1_1C "Media quad multiply signed")
-+(media-quad-multiply mqmulhu UHI zext argjhi argjlo OP_7B OPE1_1D "Media quad multiply unsigned")
-+
-+(media-quad-multiply mqmulxhs HI ext argjlo argjhi OP_7B OPE1_2A "Media quad cross multiply signed")
-+(media-quad-multiply mqmulxhu UHI zext argjlo argjhi OP_7B OPE1_2B "Media quad cross multiply unsigned")
-+
-+(define-pmacro (conditional-media-quad-multiply
-+ name mode conv rhs1 rhs2 op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-4)
-+ PRESERVE-OVF CONDITIONAL)
-+ (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond")
-+ (+ pack ACC40Sk op FRintieven CCi cond ope FRintjeven)
-+ (media-quad-multiply-semantics (eq CCi (or cond 2)) mode conv rhs1 rhs2)
-+ ((fr400 (unit u-media-2-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)))
-+ (fr450 (unit u-media-2-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)))
-+ (fr500 (unit u-media-quad-mul
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
-+ )
-+)
-+
-+(conditional-media-quad-multiply cmqmulhs HI ext argjhi argjlo OP_74 OPE4_0 "Conditional Media quad multiply signed")
-+(conditional-media-quad-multiply cmqmulhu UHI zext argjhi argjlo OP_74 OPE4_1 "Conditional Media quad multiply unsigned")
-+
-+(define-pmacro (media-multiply-acc-semantics
-+ conv arg1 addop arg2 res max min sie)
-+ (sequence ((DI tmp))
-+ (set tmp (addop res (mul DI (conv DI arg1) (conv DI arg2))))
-+ (saturate-v tmp max min sie res))
-+)
-+
-+(define-pmacro (media-dual-multiply-acc-semantics
-+ cond mode conv addop rhw res max min)
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of res))
-+ (if (register-unaligned res 2)
-+ (c-call VOID "@cpu@_media_acc_not_aligned")
-+ (if cond
-+ (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
-+ (extract-hilo FRinti 0 FRintj 0
-+ argihi argilo argjhi argjlo)
-+ (media-multiply-acc-semantics conv argihi addop argjhi
-+ res
-+ max min (msr-sie-acci))
-+ (media-multiply-acc-semantics conv argilo addop argjlo
-+ (nextreg rhw res 1)
-+ max min (msr-sie-acci-1))))))
-+)
-+
-+(define-pmacro (media-dual-multiply-acc
-+ name mode conv addop rhw res max min op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-3))
-+ (.str name "$pack $FRinti,$FRintj,$" res)
-+ (+ pack res op FRinti ope FRintj)
-+ (media-dual-multiply-acc-semantics 1 mode conv addop rhw res max min)
-+ ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
-+ (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
-+ )
-+)
-+
-+(media-dual-multiply-acc mmachs HI ext add h-acc40S ACC40Sk
-+ (const DI #x7fffffffff) (const DI #xffffff8000000000)
-+ OP_7B OPE1_16
-+ "Media dual multiply and accumulate signed")
-+
-+(media-dual-multiply-acc mmachu UHI zext add h-acc40U ACC40Uk
-+ (const DI #xffffffffff) (const DI 0)
-+ OP_7B OPE1_17
-+ "Media dual multiply and accumulate unsigned")
-+
-+(media-dual-multiply-acc mmrdhs HI ext sub h-acc40S ACC40Sk
-+ (const DI #x7fffffffff) (const DI #xffffff8000000000)
-+ OP_7B OPE1_30
-+ "Media dual multiply and reduce signed")
-+
-+(media-dual-multiply-acc mmrdhu UHI zext sub h-acc40U ACC40Uk
-+ (const DI #xffffffffff) (const DI 0)
-+ OP_7B OPE1_31
-+ "Media dual multiply and reduce unsigned")
-+
-+(define-pmacro (conditional-media-dual-multiply-acc
-+ name mode conv addop rhw res max min op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-3) CONDITIONAL)
-+ (.str name "$pack $FRinti,$FRintj,$" res ",$CCi,$cond")
-+ (+ pack res op FRinti CCi cond ope FRintj)
-+ (media-dual-multiply-acc-semantics (eq CCi (or cond 2))
-+ mode conv addop rhw res max min)
-+ ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
-+ (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
-+ )
-+)
-+
-+(conditional-media-dual-multiply-acc cmmachs HI ext add h-acc40S ACC40Sk
-+ (const DI #x7fffffffff) (const DI #xffffff8000000000)
-+ OP_72 OPE4_2
-+ "Conditional Media dual multiply and accumulate signed")
-+
-+(conditional-media-dual-multiply-acc cmmachu UHI zext add h-acc40U ACC40Uk
-+ (const DI #xffffffffff) (const DI 0)
-+ OP_72 OPE4_3
-+ "Conditional Media dual multiply and accumulate unsigned")
-+
-+(define-pmacro (media-quad-multiply-acc-semantics
-+ cond mode conv addop rhw res max min)
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of res))
-+ (if (register-unaligned res 4)
-+ (c-call VOID "@cpu@_media_acc_not_aligned")
-+ (if (orif (register-unaligned FRintieven 2)
-+ (register-unaligned FRintjeven 2))
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (if cond
-+ (sequence ((mode argihi) (mode argilo)
-+ (mode argjhi) (mode argjlo))
-+ (extract-hilo FRintieven 0 FRintjeven 0
-+ argihi argilo argjhi argjlo)
-+ (media-multiply-acc-semantics conv argihi addop argjhi
-+ res
-+ max min (msr-sie-acci))
-+ (media-multiply-acc-semantics conv argilo addop argjlo
-+ (nextreg rhw res 1)
-+ max min (msr-sie-acci-1))
-+ (extract-hilo FRintieven 1 FRintjeven 1
-+ argihi argilo argjhi argjlo)
-+ (media-multiply-acc-semantics conv argihi addop argjhi
-+ (nextreg rhw res 2)
-+ max min (msr-sie-acci-2))
-+ (media-multiply-acc-semantics conv argilo addop argjlo
-+ (nextreg rhw res 3)
-+ max min
-+ (msr-sie-acci-3)))))))
-+)
-+
-+(define-pmacro (media-quad-multiply-acc
-+ name mode conv addop rhw res max min op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-4))
-+ (.str name "$pack $FRintieven,$FRintjeven,$" res)
-+ (+ pack res op FRintieven ope FRintjeven)
-+ (media-quad-multiply-acc-semantics 1 mode conv addop rhw res max min)
-+ ((fr400 (unit u-media-2-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)))
-+ (fr450 (unit u-media-2-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)))
-+ (fr500 (unit u-media-quad-mul
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
-+ )
-+)
-+
-+(media-quad-multiply-acc mqmachs HI ext add h-acc40S ACC40Sk
-+ (const DI #x7fffffffff) (const DI #xffffff8000000000)
-+ OP_7B OPE1_1E
-+ "Media quad multiply and accumulate signed")
-+
-+(media-quad-multiply-acc mqmachu UHI zext add h-acc40U ACC40Uk
-+ (const DI #xffffffffff) (const DI 0)
-+ OP_7B OPE1_1F
-+ "Media quad multiply and accumulate unsigned")
-+
-+(define-pmacro (conditional-media-quad-multiply-acc
-+ name mode conv addop rhw res max min op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-4) CONDITIONAL)
-+ (.str name "$pack $FRintieven,$FRintjeven,$" res ",$CCi,$cond")
-+ (+ pack res op FRintieven CCi cond ope FRintjeven)
-+ (media-quad-multiply-acc-semantics (eq CCi (or cond 2))
-+ mode conv addop rhw res max min)
-+ ((fr400 (unit u-media-2-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)))
-+ (fr450 (unit u-media-2-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)))
-+ (fr500 (unit u-media-quad-mul
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
-+ )
-+)
-+
-+(conditional-media-quad-multiply-acc cmqmachs HI ext add h-acc40S ACC40Sk
-+ (const DI #x7fffffffff) (const DI #xffffff8000000000)
-+ OP_74 OPE4_2
-+ "Conditional Media quad multiply and accumulate signed")
-+
-+(conditional-media-quad-multiply-acc cmqmachu UHI zext add h-acc40U ACC40Uk
-+ (const DI #xffffffffff) (const DI 0)
-+ OP_74 OPE4_3
-+ "Conditional media quad multiply and accumulate unsigned")
-+
-+(define-pmacro (media-quad-multiply-cross-acc-semantics
-+ cond mode conv addop rhw res max min)
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of res))
-+ (if (register-unaligned res 4)
-+ (c-call VOID "@cpu@_media_acc_not_aligned")
-+ (if (orif (register-unaligned FRintieven 2)
-+ (register-unaligned FRintjeven 2))
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (if cond
-+ (sequence ((mode argihi) (mode argilo)
-+ (mode argjhi) (mode argjlo))
-+ (extract-hilo FRintieven 0 FRintjeven 0
-+ argihi argilo argjhi argjlo)
-+ (media-multiply-acc-semantics conv argihi addop argjhi
-+ (nextreg rhw res 2)
-+ max min (msr-sie-acci-2))
-+ (media-multiply-acc-semantics conv argilo addop argjlo
-+ (nextreg rhw res 3)
-+ max min (msr-sie-acci-3))
-+ (extract-hilo FRintieven 1 FRintjeven 1
-+ argihi argilo argjhi argjlo)
-+ (media-multiply-acc-semantics conv argihi addop argjhi
-+ res
-+ max min (msr-sie-acci))
-+ (media-multiply-acc-semantics conv argilo addop argjlo
-+ (nextreg rhw res 1)
-+ max min
-+ (msr-sie-acci-1)))))))
-+)
-+
-+(define-pmacro (media-quad-multiply-cross-acc
-+ name mode conv addop rhw res max min op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-4))
-+ (.str name "$pack $FRintieven,$FRintjeven,$" res)
-+ (+ pack res op FRintieven ope FRintjeven)
-+ (media-quad-multiply-cross-acc-semantics 1 mode conv addop rhw res
-+ max min)
-+ ((fr400 (unit u-media-2-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)))
-+ (fr450 (unit u-media-2-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)))
-+ (fr550 (unit u-media-4-quad)))
-+ )
-+)
-+
-+(media-quad-multiply-cross-acc mqxmachs HI ext add h-acc40S ACC40Sk
-+ (const DI #x7fffffffff) (const DI #xffffff8000000000)
-+ OP_78 OPE1_00
-+ "Media quad multiply and cross accumulate signed")
-+
-+(define-pmacro (media-quad-cross-multiply-cross-acc-semantics
-+ cond mode conv addop rhw res max min)
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of res))
-+ (if (register-unaligned res 4)
-+ (c-call VOID "@cpu@_media_acc_not_aligned")
-+ (if (orif (register-unaligned FRintieven 2)
-+ (register-unaligned FRintjeven 2))
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (if cond
-+ (sequence ((mode argihi) (mode argilo)
-+ (mode argjhi) (mode argjlo))
-+ (extract-hilo FRintieven 0 FRintjeven 0
-+ argihi argilo argjhi argjlo)
-+ (media-multiply-acc-semantics conv argihi addop argjlo
-+ (nextreg rhw res 2)
-+ max min (msr-sie-acci-2))
-+ (media-multiply-acc-semantics conv argilo addop argjhi
-+ (nextreg rhw res 3)
-+ max min (msr-sie-acci-3))
-+ (extract-hilo FRintieven 1 FRintjeven 1
-+ argihi argilo argjhi argjlo)
-+ (media-multiply-acc-semantics conv argihi addop argjlo
-+ res
-+ max min (msr-sie-acci))
-+ (media-multiply-acc-semantics conv argilo addop argjhi
-+ (nextreg rhw res 1)
-+ max min
-+ (msr-sie-acci-1)))))))
-+)
-+
-+(define-pmacro (media-quad-cross-multiply-cross-acc
-+ name mode conv addop rhw res max min op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-4))
-+ (.str name "$pack $FRintieven,$FRintjeven,$" res)
-+ (+ pack res op FRintieven ope FRintjeven)
-+ (media-quad-cross-multiply-cross-acc-semantics 1 mode conv addop rhw res
-+ max min)
-+ ((fr400 (unit u-media-2-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)))
-+ (fr450 (unit u-media-2-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)))
-+ (fr550 (unit u-media-4-quad)))
-+ )
-+)
-+
-+(media-quad-cross-multiply-cross-acc mqxmacxhs HI ext add h-acc40S ACC40Sk
-+ (const DI #x7fffffffff) (const DI #xffffff8000000000)
-+ OP_78 OPE1_01
-+ "Media quad cross multiply and cross accumulate signed")
-+
-+(define-pmacro (media-quad-cross-multiply-acc-semantics
-+ cond mode conv addop rhw res max min)
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of res))
-+ (if (register-unaligned res 4)
-+ (c-call VOID "@cpu@_media_acc_not_aligned")
-+ (if (orif (register-unaligned FRintieven 2)
-+ (register-unaligned FRintjeven 2))
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (if cond
-+ (sequence ((mode argihi) (mode argilo)
-+ (mode argjhi) (mode argjlo))
-+ (extract-hilo FRintieven 0 FRintjeven 0
-+ argihi argilo argjhi argjlo)
-+ (media-multiply-acc-semantics conv argihi addop argjlo
-+ res
-+ max min (msr-sie-acci))
-+ (media-multiply-acc-semantics conv argilo addop argjhi
-+ (nextreg rhw res 1)
-+ max min (msr-sie-acci-1))
-+ (extract-hilo FRintieven 1 FRintjeven 1
-+ argihi argilo argjhi argjlo)
-+ (media-multiply-acc-semantics conv argihi addop argjlo
-+ (nextreg rhw res 2)
-+ max min (msr-sie-acci-2))
-+ (media-multiply-acc-semantics conv argilo addop argjhi
-+ (nextreg rhw res 3)
-+ max min
-+ (msr-sie-acci-3)))))))
-+)
-+
-+(define-pmacro (media-quad-cross-multiply-acc
-+ name mode conv addop rhw res max min op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-4))
-+ (.str name "$pack $FRintieven,$FRintjeven,$" res)
-+ (+ pack res op FRintieven ope FRintjeven)
-+ (media-quad-cross-multiply-acc-semantics 1 mode conv addop rhw res
-+ max min)
-+ ((fr400 (unit u-media-2-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)))
-+ (fr450 (unit u-media-2-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)))
-+ (fr550 (unit u-media-4-quad)))
-+ )
-+)
-+
-+(media-quad-cross-multiply-acc mqmacxhs HI ext add h-acc40S ACC40Sk
-+ (const DI #x7fffffffff) (const DI #xffffff8000000000)
-+ OP_78 OPE1_02
-+ "Media quad cross multiply and accumulate signed")
-+
-+(define-pmacro (media-complex-semantics
-+ conv lhs1 rhs1 lhs2 rhs2 res max min sie)
-+ (sequence ((DI tmp1) (DI tmp2))
-+ (media-multiply-semantics conv lhs1 rhs1 tmp1)
-+ (media-multiply-semantics conv lhs2 rhs2 tmp2)
-+ (set tmp1 (sub tmp1 tmp2))
-+ (saturate-v tmp1 max min sie res))
-+)
-+
-+(define-pmacro (media-complex-semantics-i
-+ conv lhs1 rhs1 lhs2 rhs2 res max min sie)
-+ (sequence ((DI tmp1) (DI tmp2))
-+ (media-multiply-semantics conv lhs1 rhs1 tmp1)
-+ (media-multiply-semantics conv lhs2 rhs2 tmp2)
-+ (set tmp1 (add tmp1 tmp2))
-+ (saturate-v tmp1 max min sie res))
-+)
-+
-+(define-pmacro (media-dual-complex-semantics mode conv rhs1 rhs2 max min)
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
-+ (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
-+ (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
-+ (media-complex-semantics conv argihi rhs1 argilo rhs2 ACC40Sk
-+ max min (msr-sie-acci))))
-+)
-+
-+(define-pmacro (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min)
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
-+ (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
-+ (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
-+ (media-complex-semantics-i conv argihi rhs1 argilo rhs2 ACC40Sk
-+ max min (msr-sie-acci))))
-+)
-+
-+(define-pmacro (media-dual-complex
-+ name mode conv rhs1 rhs2 max min op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-3))
-+ (.str name "$pack $FRinti,$FRintj,$ACC40Sk")
-+ (+ pack ACC40Sk op FRinti ope FRintj)
-+ (media-dual-complex-semantics mode conv rhs1 rhs2 max min)
-+ ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
-+ (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
-+ )
-+)
-+
-+(define-pmacro (media-dual-complex-i
-+ name mode conv rhs1 rhs2 max min op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-3))
-+ (.str name "$pack $FRinti,$FRintj,$ACC40Sk")
-+ (+ pack ACC40Sk op FRinti ope FRintj)
-+ (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min)
-+ ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
-+ (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
-+ )
-+)
-+
-+(media-dual-complex mcpxrs HI ext argjhi argjlo
-+ (const DI #x7fffffffff) (const DI #xffffff8000000000)
-+ OP_7B OPE1_20
-+ "Media dual complex real signed with saturation")
-+
-+(media-dual-complex mcpxru UHI zext argjhi argjlo
-+ (const DI #xffffffffff) (const DI 0)
-+ OP_7B OPE1_21
-+ "Media dual complex real unsigned with saturation")
-+
-+(media-dual-complex-i mcpxis HI ext argjlo argjhi
-+ (const DI #x7fffffffff) (const DI #xffffff8000000000)
-+ OP_7B OPE1_22
-+ "Media dual complex imaginary signed with saturation")
-+
-+(media-dual-complex-i mcpxiu UHI zext argjlo argjhi
-+ (const DI #xffffffffff) (const DI 0)
-+ OP_7B OPE1_23
-+ "Media dual complex imaginary unsigned with saturation")
-+
-+(define-pmacro (conditional-media-dual-complex
-+ name mode conv rhs1 rhs2 max min op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-3) CONDITIONAL)
-+ (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond")
-+ (+ pack ACC40Sk op FRinti CCi cond ope FRintj)
-+ (if (eq CCi (or cond 2))
-+ (media-dual-complex-semantics mode conv rhs1 rhs2 max min))
-+ ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
-+ (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
-+ )
-+)
-+
-+(define-pmacro (conditional-media-dual-complex-i
-+ name mode conv rhs1 rhs2 max min op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-3) CONDITIONAL)
-+ (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond")
-+ (+ pack ACC40Sk op FRinti CCi cond ope FRintj)
-+ (if (eq CCi (or cond 2))
-+ (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min))
-+ ((fr400 (unit u-media-2)) (fr450 (unit u-media-2))
-+ (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
-+ )
-+)
-+
-+(conditional-media-dual-complex cmcpxrs HI ext argjhi argjlo
-+ (const DI #x7fffffffff) (const DI #xffffff8000000000)
-+ OP_75 OPE4_0
-+ "Conditional Media dual complex real signed with saturation")
-+
-+(conditional-media-dual-complex cmcpxru UHI zext argjhi argjlo
-+ (const DI #xffffffffff) (const DI 0)
-+ OP_75 OPE4_1
-+ "Conditional Media dual complex real unsigned with saturation")
-+
-+(conditional-media-dual-complex-i cmcpxis HI ext argjlo argjhi
-+ (const DI #x7fffffffff) (const DI #xffffff8000000000)
-+ OP_75 OPE4_2
-+ "Conditional Media dual complex imaginary signed with saturation")
-+
-+(conditional-media-dual-complex-i cmcpxiu UHI zext argjlo argjhi
-+ (const DI #xffffffffff) (const DI 0)
-+ OP_75 OPE4_3
-+ "Conditional Media dual complex imaginary unsigned with saturation")
-+
-+(define-pmacro (media-quad-complex
-+ name mode conv rhs1 rhs2 max min op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-4))
-+ (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk")
-+ (+ pack ACC40Sk op FRintieven ope FRintjeven)
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
-+ (if (register-unaligned ACC40Sk 2)
-+ (c-call VOID "@cpu@_media_acc_not_aligned")
-+ (if (orif (register-unaligned FRintieven 2)
-+ (register-unaligned FRintjeven 2))
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (sequence ((mode argihi) (mode argilo)
-+ (mode argjhi) (mode argjlo))
-+ (extract-hilo FRintieven 0 FRintjeven 0
-+ argihi argilo argjhi argjlo)
-+ (media-complex-semantics conv argihi rhs1 argilo rhs2
-+ ACC40Sk
-+ max min (msr-sie-acci))
-+ (extract-hilo FRintieven 1 FRintjeven 1
-+ argihi argilo argjhi argjlo)
-+ (media-complex-semantics conv argihi rhs1 argilo rhs2
-+ (nextreg h-acc40S ACC40Sk 1)
-+ max min (msr-sie-acci-1))))))
-+ ((fr400 (unit u-media-2-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)))
-+ (fr450 (unit u-media-2-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)))
-+ (fr500 (unit u-media-quad-complex
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
-+ )
-+)
-+
-+(define-pmacro (media-quad-complex-i
-+ name mode conv rhs1 rhs2 max min op ope comment)
-+ (dni name
-+ (comment)
-+ ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-4))
-+ (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk")
-+ (+ pack ACC40Sk op FRintieven ope FRintjeven)
-+ (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
-+ (if (register-unaligned ACC40Sk 2)
-+ (c-call VOID "@cpu@_media_acc_not_aligned")
-+ (if (orif (register-unaligned FRintieven 2)
-+ (register-unaligned FRintjeven 2))
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (sequence ((mode argihi) (mode argilo)
-+ (mode argjhi) (mode argjlo))
-+ (extract-hilo FRintieven 0 FRintjeven 0
-+ argihi argilo argjhi argjlo)
-+ (media-complex-semantics-i conv argihi rhs1 argilo rhs2
-+ ACC40Sk
-+ max min (msr-sie-acci))
-+ (extract-hilo FRintieven 1 FRintjeven 1
-+ argihi argilo argjhi argjlo)
-+ (media-complex-semantics-i conv argihi rhs1 argilo rhs2
-+ (nextreg h-acc40S ACC40Sk 1)
-+ max min (msr-sie-acci-1))))))
-+ ((fr400 (unit u-media-2-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)))
-+ (fr450 (unit u-media-2-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)))
-+ (fr500 (unit u-media-quad-complex
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
-+ )
-+)
-+
-+(media-quad-complex mqcpxrs HI ext argjhi argjlo
-+ (const DI #x7fffffffff) (const DI #xffffff8000000000)
-+ OP_7B OPE1_24
-+ "Media quad complex real signed with saturation")
-+
-+(media-quad-complex mqcpxru UHI zext argjhi argjlo
-+ (const DI #xffffffffff) (const DI 0)
-+ OP_7B OPE1_25
-+ "Media quad complex real unsigned with saturation")
-+
-+(media-quad-complex-i mqcpxis HI ext argjlo argjhi
-+ (const DI #x7fffffffff) (const DI #xffffff8000000000)
-+ OP_7B OPE1_26
-+ "Media quad complex imaginary signed with saturation")
-+
-+(media-quad-complex-i mqcpxiu UHI zext argjlo argjhi
-+ (const DI #xffffffffff) (const DI 0)
-+ OP_7B OPE1_27
-+ "Media quad complex imaginary unsigned with saturation")
-+
-+(define-pmacro (media-pack src1 src2 targ offset)
-+ (sequence ()
-+ (set (halfword hi targ offset) (halfword lo src1 offset))
-+ (set (halfword lo targ offset) (halfword lo src2 offset)))
-+)
-+
-+(define-pmacro (media-expand-halfword-to-word-semantics cond)
-+ (if cond
-+ (sequence ((UHI tmp))
-+ (if (and u6 1)
-+ (set tmp (halfword lo FRinti 0))
-+ (set tmp (halfword hi FRinti 0)))
-+ (set (halfword hi FRintk 0) tmp)
-+ (set (halfword lo FRintk 0) tmp)))
-+)
-+
-+(dni mexpdhw
-+ "Media expand halfword to word"
-+ ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1))
-+ "mexpdhw$pack $FRinti,$u6,$FRintk"
-+ (+ pack FRintk OP_7B FRinti OPE1_32 u6)
-+ (media-expand-halfword-to-word-semantics 1)
-+ ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
-+ (fr500 (unit u-media)) (fr550 (unit u-media)))
-+)
-+
-+(dni cmexpdhw
-+ "Conditional media expand halfword to word"
-+ ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL)
-+ "cmexpdhw$pack $FRinti,$u6,$FRintk,$CCi,$cond"
-+ (+ pack FRintk OP_76 FRinti CCi cond OPE4_2 u6)
-+ (media-expand-halfword-to-word-semantics (eq CCi (or cond 2)))
-+ ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
-+ (fr500 (unit u-media)) (fr550 (unit u-media)))
-+)
-+
-+(define-pmacro (media-expand-halfword-to-double-semantics cond)
-+ (if (register-unaligned FRintkeven 2)
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (if cond
-+ (sequence ((UHI tmp))
-+ ; a hack to get FRintkeven referenced for profiling
-+ (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
-+ (if (and u6 1)
-+ (set tmp (halfword lo FRinti 0))
-+ (set tmp (halfword hi FRinti 0)))
-+ (set (halfword hi FRintkeven 0) tmp)
-+ (set (halfword lo FRintkeven 0) tmp)
-+ (set (halfword hi FRintkeven 1) tmp)
-+ (set (halfword lo FRintkeven 1) tmp))))
-+)
-+
-+(dni mexpdhd
-+ "Media expand halfword to double"
-+ ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-2))
-+ "mexpdhd$pack $FRinti,$u6,$FRintkeven"
-+ (+ pack FRintkeven OP_7B FRinti OPE1_33 u6)
-+ (media-expand-halfword-to-double-semantics 1)
-+ ((fr400 (unit u-media-dual-expand
-+ (out FRintk FRintkeven)))
-+ (fr450 (unit u-media-dual-expand
-+ (out FRintk FRintkeven)))
-+ (fr500 (unit u-media-dual-expand
-+ (out FRintk FRintkeven)))
-+ (fr550 (unit u-media-dual-expand)))
-+)
-+
-+(dni cmexpdhd
-+ "Conditional media expand halfword to double"
-+ ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL)
-+ "cmexpdhd$pack $FRinti,$u6,$FRintkeven,$CCi,$cond"
-+ (+ pack FRintkeven OP_76 FRinti CCi cond OPE4_3 u6)
-+ (media-expand-halfword-to-double-semantics (eq CCi (or cond 2)))
-+ ((fr400 (unit u-media-dual-expand
-+ (out FRintk FRintkeven)))
-+ (fr450 (unit u-media-dual-expand
-+ (out FRintk FRintkeven)))
-+ (fr500 (unit u-media-dual-expand
-+ (out FRintk FRintkeven)))
-+ (fr550 (unit u-media-dual-expand)))
-+)
-+
-+(dni mpackh
-+ "Media halfword pack"
-+ ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1))
-+ "mpackh$pack $FRinti,$FRintj,$FRintk"
-+ (+ pack FRintk OP_7B FRinti OPE1_34 FRintj)
-+ (media-pack FRinti FRintj FRintk 0)
-+ ((fr400 (unit u-media-3)) (fr450 (unit u-media-3))
-+ (fr500 (unit u-media)) (fr550 (unit u-media)))
-+)
-+
-+(dni mdpackh
-+ "Media dual pack"
-+ ((UNIT FM01) (FR500-MAJOR M-5) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-2))
-+ "mdpackh$pack $FRintieven,$FRintjeven,$FRintkeven"
-+ (+ pack FRintkeven OP_7B FRintieven OPE1_36 FRintjeven)
-+ (if (orif (register-unaligned FRintieven 2)
-+ (orif (register-unaligned FRintjeven 2)
-+ (register-unaligned FRintkeven 2)))
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (sequence ()
-+ ; hack to get these referenced for profiling
-+ (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven))
-+ (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven))
-+ (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
-+ (media-pack FRintieven FRintjeven FRintkeven 0)
-+ (media-pack FRintieven FRintjeven FRintkeven 1)))
-+ ((fr400 (unit u-media-3-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)
-+ (out FRintk FRintkeven)))
-+ (fr450 (unit u-media-3-quad
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)
-+ (out FRintk FRintkeven)))
-+ (fr500 (unit u-media-quad-arith
-+ (in FRinti FRintieven)
-+ (in FRintj FRintjeven)
-+ (out FRintk FRintkeven)))
-+ (fr550 (unit u-media-quad)))
-+)
-+
-+(define-pmacro (media-unpack src soff targ toff)
-+ (sequence ()
-+ (set (halfword hi targ toff) (halfword hi src soff))
-+ (set (halfword lo targ toff) (halfword hi src soff))
-+ (set (halfword hi targ (add toff 1)) (halfword lo src soff))
-+ (set (halfword lo targ (add toff 1)) (halfword lo src soff)))
-+)
-+
-+(dni munpackh
-+ "Media halfword unpack"
-+ ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-2))
-+ "munpackh$pack $FRinti,$FRintkeven"
-+ (+ pack FRintkeven OP_7B FRinti OPE1_35 (FRj-null))
-+ (if (register-unaligned FRintkeven 2)
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (sequence ()
-+ ; hack to get these referenced for profiling
-+ (set FRinti (c-raw-call SI "frv_ref_SI" FRinti))
-+ (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
-+ (media-unpack FRinti 0 FRintkeven 0)))
-+ ((fr400 (unit u-media-dual-expand
-+ (out FRintk FRintkeven)))
-+ (fr450 (unit u-media-dual-expand
-+ (out FRintk FRintkeven)))
-+ (fr500 (unit u-media-dual-expand
-+ (out FRintk FRintkeven)))
-+ (fr550 (unit u-media-dual-expand)))
-+)
-+
-+(dni mdunpackh
-+ "Media dual unpack"
-+ ((UNIT FM01) (FR500-MAJOR M-7) (MACH simple,tomcat,frv))
-+ "mdunpackh$pack $FRintieven,$FRintk"
-+ (+ pack FRintk OP_7B FRintieven OPE1_37 (FRj-null))
-+ (if (orif (register-unaligned FRintieven 2) (register-unaligned FRintk 4))
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (sequence ()
-+ ; hack to get these referenced for profiling
-+ (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven))
-+ (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
-+ (media-unpack FRintieven 0 FRintk 0)
-+ (media-unpack FRintieven 1 FRintk 2)))
-+ ((fr500 (unit u-media-dual-unpack
-+ (in FRinti FRintieven))))
-+)
-+
-+(define-pmacro (ubyte num arg offset)
-+ (reg (.sym h-fr_ num) (add (index-of arg) offset)))
-+
-+(define-pmacro (mbtoh-semantics cond)
-+ (if (register-unaligned FRintkeven 2)
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (if cond
-+ (sequence ()
-+ (set (halfword hi FRintkeven 0) (ubyte 3 FRintj 0))
-+ (set (halfword lo FRintkeven 0) (ubyte 2 FRintj 0))
-+ (set (halfword hi FRintkeven 1) (ubyte 1 FRintj 0))
-+ (set (halfword lo FRintkeven 1) (ubyte 0 FRintj 0)))))
-+)
-+
-+(dni mbtoh
-+ "Media convert byte to halfword"
-+ ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-2))
-+ "mbtoh$pack $FRintj,$FRintkeven"
-+ (+ pack FRintkeven OP_7B (FRi-null) OPE1_38 FRintj)
-+ (sequence ()
-+ ; hack to get these referenced for profiling
-+ (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
-+ (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
-+ (mbtoh-semantics 1))
-+ ((fr400 (unit u-media-dual-expand
-+ (out FRintk FRintkeven)))
-+ (fr450 (unit u-media-dual-expand
-+ (out FRintk FRintkeven)))
-+ (fr500 (unit u-media-dual-btoh
-+ (out FRintk FRintkeven)))
-+ (fr550 (unit u-media-dual-expand)))
-+)
-+
-+(dni cmbtoh
-+ "Conditional media convert byte to halfword"
-+ ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL)
-+ "cmbtoh$pack $FRintj,$FRintkeven,$CCi,$cond"
-+ (+ pack FRintkeven OP_77 (FRi-null) CCi cond OPE4_0 FRintj)
-+ (sequence ()
-+ ; hack to get these referenced for profiling
-+ (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
-+ (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
-+ (mbtoh-semantics (eq CCi (or cond 2))))
-+ ((fr400 (unit u-media-dual-expand
-+ (out FRintk FRintkeven)))
-+ (fr450 (unit u-media-dual-expand
-+ (out FRintk FRintkeven)))
-+ (fr500 (unit u-media-dual-btoh
-+ (out FRintk FRintkeven)))
-+ (fr550 (unit u-media-dual-expand
-+ (in FRinti FRintj))))
-+)
-+
-+(define-pmacro (mhtob-semantics cond)
-+ (if (register-unaligned FRintjeven 2)
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (if cond
-+ (sequence ()
-+ (set (ubyte 3 FRintk 0) (halfword hi FRintjeven 0))
-+ (set (ubyte 2 FRintk 0) (halfword lo FRintjeven 0))
-+ (set (ubyte 1 FRintk 0) (halfword hi FRintjeven 1))
-+ (set (ubyte 0 FRintk 0) (halfword lo FRintjeven 1)))))
-+)
-+
-+(dni mhtob
-+ "Media convert halfword to byte"
-+ ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-2))
-+ "mhtob$pack $FRintjeven,$FRintk"
-+ (+ pack FRintk OP_7B (FRi-null) OPE1_39 FRintjeven)
-+ (sequence ()
-+ ; hack to get these referenced for profiling
-+ (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven))
-+ (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
-+ (mhtob-semantics 1))
-+ ((fr400 (unit u-media-dual-htob
-+ (in FRintj FRintjeven)))
-+ (fr450 (unit u-media-dual-htob
-+ (in FRintj FRintjeven)))
-+ (fr500 (unit u-media-dual-htob
-+ (in FRintj FRintjeven)))
-+ (fr550 (unit u-media-3-dual
-+ (in FRinti FRintjeven))))
-+)
-+
-+(dni cmhtob
-+ "Conditional media convert halfword to byte"
-+ ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL)
-+ "cmhtob$pack $FRintjeven,$FRintk,$CCi,$cond"
-+ (+ pack FRintk OP_77 (FRi-null) CCi cond OPE4_1 FRintjeven)
-+ (sequence ()
-+ ; hack to get these referenced for profiling
-+ (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven))
-+ (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
-+ (mhtob-semantics (eq CCi (or cond 2))))
-+ ((fr400 (unit u-media-dual-htob
-+ (in FRintj FRintjeven)))
-+ (fr450 (unit u-media-dual-htob
-+ (in FRintj FRintjeven)))
-+ (fr500 (unit u-media-dual-htob
-+ (in FRintj FRintjeven)))
-+ (fr550 (unit u-media-3-dual
-+ (in FRinti FRintjeven))))
-+)
-+
-+(define-pmacro (mbtohe-semantics cond)
-+ (if (register-unaligned FRintk 4)
-+ (c-call VOID "@cpu@_media_register_not_aligned")
-+ (if cond
-+ (sequence ()
-+ (set (halfword hi FRintk 0) (ubyte 3 FRintj 0))
-+ (set (halfword lo FRintk 0) (ubyte 3 FRintj 0))
-+ (set (halfword hi FRintk 1) (ubyte 2 FRintj 0))
-+ (set (halfword lo FRintk 1) (ubyte 2 FRintj 0))
-+ (set (halfword hi FRintk 2) (ubyte 1 FRintj 0))
-+ (set (halfword lo FRintk 2) (ubyte 1 FRintj 0))
-+ (set (halfword hi FRintk 3) (ubyte 0 FRintj 0))
-+ (set (halfword lo FRintk 3) (ubyte 0 FRintj 0)))))
-+)
-+
-+(dni mbtohe
-+ "Media convert byte to halfword extended"
-+ ((UNIT FM01) (FR500-MAJOR M-7) (MACH simple,tomcat,frv))
-+ "mbtohe$pack $FRintj,$FRintk"
-+ (+ pack FRintk OP_7B (FRi-null) OPE1_3A FRintj)
-+ (sequence ()
-+ ; hack to get these referenced for profiling
-+ (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
-+ (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
-+ (mbtohe-semantics 1))
-+ ((fr500 (unit u-media-dual-btohe)))
-+)
-+
-+(dni cmbtohe
-+ "Conditional media convert byte to halfword extended"
-+ ((UNIT FM01) (FR500-MAJOR M-7) CONDITIONAL (MACH simple,tomcat,frv))
-+ "cmbtohe$pack $FRintj,$FRintk,$CCi,$cond"
-+ (+ pack FRintk OP_77 (FRi-null) CCi cond OPE4_2 FRintj)
-+ (sequence ()
-+ ; hack to get these referenced for profiling
-+ (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
-+ (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
-+ (mbtohe-semantics (eq CCi (or cond 2))))
-+ ((fr500 (unit u-media-dual-btohe)))
-+)
-+
-+; Media NOP
-+; A special case of mclracc
-+(dni mnop "Media nop"
-+ ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-1)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-1))
-+ "mnop$pack"
-+ (+ pack (f-ACC40Sk 63) OP_7B (f-A 1) (misc-null-10) OPE1_3B (FRj-null))
-+ (nop)
-+ ()
-+)
-+
-+; mclracc with #A==0
-+(dni mclracc-0
-+ "Media clear accumulator(s)"
-+ ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-3))
-+ "mclracc$pack $ACC40Sk,$A0"
-+ (+ pack ACC40Sk OP_7B (f-A 0) (misc-null-10) OPE1_3B (FRj-null))
-+ (c-call VOID "@cpu@_clear_accumulators" (index-of ACC40Sk) 0)
-+ ((fr400 (unit u-media-4)) (fr450 (unit u-media-4))
-+ (fr500 (unit u-media)) (fr550 (unit u-media-3-mclracc)))
-+)
-+
-+; mclracc with #A==1
-+(dni mclracc-1
-+ "Media clear accumulator(s)"
-+ ((UNIT MCLRACC-1) (FR500-MAJOR M-6) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-2) (FR450-MAJOR M-4))
-+ "mclracc$pack $ACC40Sk,$A1"
-+ (+ pack ACC40Sk OP_7B (f-A 1) (misc-null-10) OPE1_3B (FRj-null))
-+ (c-call VOID "@cpu@_clear_accumulators" (index-of ACC40Sk) 1)
-+ ((fr400 (unit u-media-4)) (fr450 (unit u-media-4-mclracca))
-+ (fr500 (unit u-media)) (fr550 (unit u-media-3-mclracc)))
-+)
-+
-+(dni mrdacc
-+ "Media read accumulator"
-+ ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-5))
-+ "mrdacc$pack $ACC40Si,$FRintk"
-+ (+ pack FRintk OP_7B ACC40Si OPE1_3C (FRj-null))
-+ (set FRintk ACC40Si)
-+ ((fr400 (unit u-media-4)) (fr450 (unit u-media-4))
-+ (fr500 (unit u-media)) (fr550 (unit u-media-3-acc)))
-+)
-+
-+(dni mrdaccg
-+ "Media read accumulator guard"
-+ ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-5))
-+ "mrdaccg$pack $ACCGi,$FRintk"
-+ (+ pack FRintk OP_7B ACCGi OPE1_3E (FRj-null))
-+ (set FRintk ACCGi)
-+ ((fr400 (unit u-media-4-accg)) (fr450 (unit u-media-4-accg))
-+ (fr500 (unit u-media)) (fr550 (unit u-media-3-acc (in ACC40Si ACCGi))))
-+)
-+
-+(dni mwtacc
-+ "Media write accumulator"
-+ ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-3))
-+ "mwtacc$pack $FRinti,$ACC40Sk"
-+ (+ pack ACC40Sk OP_7B FRinti OPE1_3D (FRj-null))
-+ (set ACC40Sk (or (and ACC40Sk (const DI #xffffffff00000000))
-+ FRinti))
-+ ((fr400 (unit u-media-4)) (fr450 (unit u-media-4))
-+ (fr500 (unit u-media)) (fr550 (unit u-media-3-wtacc)))
-+)
-+
-+(dni mwtaccg
-+ "Media write accumulator guard"
-+ ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3)
-+ (FR400-MAJOR M-1) (FR450-MAJOR M-3))
-+ "mwtaccg$pack $FRinti,$ACCGk"
-+ (+ pack ACCGk OP_7B FRinti OPE1_3F (FRj-null))
-+ (sequence ()
-+ ; hack to get these referenced for profiling
-+ (c-raw-call VOID "frv_ref_SI" ACCGk)
-+ (set ACCGk FRinti))
-+ ((fr400 (unit u-media-4-accg)) (fr450 (unit u-media-4-accg))
-+ (fr500 (unit u-media)) (fr550 (unit u-media-3-wtacc (in ACC40Sk ACCGk))))
-+)
-+
-+(define-pmacro (media-cop num op)
-+ (dni (.sym mcop num)
-+ "Media custom instruction"
-+ ((UNIT FM01) (FR500-MAJOR M-1) (MACH frv))
-+ (.str "mcop" num "$pack $FRi,$FRj,$FRk")
-+ (+ pack FRk op FRi OPE1_00 FRj)
-+ (c-call VOID "@cpu@_media_cop" num)
-+ ()
-+ )
-+)
-+
-+(media-cop 1 OP_7C)
-+(media-cop 2 OP_7D)
-+
-+; nop
-+; A nop is defined to be a "ori gr0,0,gr0"
-+; This needn't be a macro-insn, but making it one greatly simplifies decode.c
-+; On the other hand spending a little time in the decoder is often worth it.
-+;
-+(dnmi nop "nop"
-+ ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ "nop$pack"
-+ (emit ori pack (GRi 0) (s12 0) (GRk 0))
-+)
-+
-+; Floating point NOP
-+(dni fnop
-+ "Floating point nop"
-+ ((UNIT FMALL) (FR500-MAJOR F-8) (FR550-MAJOR F-1) (MACH simple,tomcat,fr500,fr550,frv))
-+ "fnop$pack"
-+ (+ pack (rd-null) OP_79 (FRi-null) OPE1_0D (FRj-null))
-+ (nop)
-+ ()
-+)
-+
-+; A return instruction
-+(dnmi ret "return"
-+ (NO-DIS (UNIT B01) (FR500-MAJOR B-3)
-+ (FR400-MAJOR B-3) (FR450-MAJOR B-3))
-+ "ret$pack"
-+ (emit bralr pack (hint_taken 2))
-+)
-+
-+(dnmi cmp "compare"
-+ (NO-DIS (UNIT IALL) (FR500-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ "cmp$pack $GRi,$GRj,$ICCi_1"
-+ (emit subcc pack GRi GRj (GRk 0) ICCi_1)
-+)
-+
-+(dnmi cmpi "compare immediate"
-+ (NO-DIS (UNIT IALL) (FR500-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ "cmpi$pack $GRi,$s10,$ICCi_1"
-+ (emit subicc pack GRi s10 (GRk 0) ICCi_1)
-+)
-+
-+(dnmi ccmp "conditional compare"
-+ (NO-DIS (UNIT IALL) (FR500-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
-+ "ccmp$pack $GRi,$GRj,$CCi,$cond"
-+ (emit csubcc pack GRi GRj (GRk 0) CCi cond)
-+)
-+
-+(dnmi mov "move"
-+ (NO-DIS (UNIT IALL) (FR500-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1))
-+ "mov$pack $GRi,$GRk"
-+ (emit ori pack GRi (s12 0) GRk)
-+)
-+
-+(dnmi cmov "conditional move"
-+ (NO-DIS (UNIT IALL) (FR500-MAJOR I-1)
-+ (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL)
-+ "cmov$pack $GRi,$GRk,$CCi,$cond"
-+ (emit cor pack GRi (GRj 0) GRk CCi cond)
-+)
-diff -Nur binutils-2.24.orig/cgen/cpu/frv.opc binutils-2.24/cgen/cpu/frv.opc
---- binutils-2.24.orig/cgen/cpu/frv.opc 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/frv.opc 2016-06-30 21:26:12.613891556 +0200
-@@ -0,0 +1,1916 @@
-+/* Fujitsu FRV opcode support, for GNU Binutils. -*- C -*-
-+
-+ Copyright 2000, 2001, 2003, 2004, 2005 Free Software Foundation, Inc.
-+
-+ Contributed by Red Hat Inc; developed under contract from Fujitsu.
-+
-+ This file is part of the GNU Binutils.
-+
-+ This program is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 2 of the License, or
-+ (at your option) any later version.
-+
-+ This program is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ You should have received a copy of the GNU General Public License
-+ along with this program; if not, write to the Free Software
-+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-+ MA 02110-1301, USA. */
-+
-+/* This file is an addendum to frv.cpu. Heavy use of C code isn't
-+ appropriate in .cpu files, so it resides here. This especially applies
-+ to assembly/disassembly where parsing/printing can be quite involved.
-+ Such things aren't really part of the specification of the cpu, per se,
-+ so .cpu files provide the general framework and .opc files handle the
-+ nitty-gritty details as necessary.
-+
-+ Each section is delimited with start and end markers.
-+
-+ <arch>-opc.h additions use: "-- opc.h"
-+ <arch>-opc.c additions use: "-- opc.c"
-+ <arch>-asm.c additions use: "-- asm.c"
-+ <arch>-dis.c additions use: "-- dis.c"
-+ <arch>-ibd.h additions use: "-- ibd.h". */
-+
-+/* -- opc.h */
-+
-+#undef CGEN_DIS_HASH_SIZE
-+#define CGEN_DIS_HASH_SIZE 128
-+#undef CGEN_DIS_HASH
-+#define CGEN_DIS_HASH(buffer, value) (((value) >> 18) & 127)
-+
-+/* Allows reason codes to be output when assembler errors occur. */
-+#define CGEN_VERBOSE_ASSEMBLER_ERRORS
-+
-+/* Vliw support. */
-+#define FRV_VLIW_SIZE 8 /* fr550 has largest vliw size of 8. */
-+#define PAD_VLIW_COMBO ,UNIT_NIL,UNIT_NIL,UNIT_NIL,UNIT_NIL
-+
-+typedef CGEN_ATTR_VALUE_ENUM_TYPE VLIW_COMBO[FRV_VLIW_SIZE];
-+
-+typedef struct
-+{
-+ int next_slot;
-+ int constraint_violation;
-+ unsigned long mach;
-+ unsigned long elf_flags;
-+ CGEN_ATTR_VALUE_ENUM_TYPE * unit_mapping;
-+ VLIW_COMBO * current_vliw;
-+ CGEN_ATTR_VALUE_ENUM_TYPE major[FRV_VLIW_SIZE];
-+ const CGEN_INSN * insn[FRV_VLIW_SIZE];
-+} FRV_VLIW;
-+
-+int frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
-+int frv_is_float_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
-+int frv_is_media_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
-+int frv_is_branch_insn (const CGEN_INSN *);
-+int frv_is_float_insn (const CGEN_INSN *);
-+int frv_is_media_insn (const CGEN_INSN *);
-+void frv_vliw_reset (FRV_VLIW *, unsigned long, unsigned long);
-+int frv_vliw_add_insn (FRV_VLIW *, const CGEN_INSN *);
-+int spr_valid (long);
-+/* -- */
-+
-+/* -- opc.c */
-+#include "elf/frv.h"
-+#include <stdio.h>
-+
-+/* Returns TRUE if {MAJOR,MACH} is a major branch of the FRV
-+ development tree. */
-+
-+bfd_boolean
-+frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE major, unsigned long mach)
-+{
-+ switch (mach)
-+ {
-+ case bfd_mach_fr400:
-+ if (major >= FR400_MAJOR_B_1 && major <= FR400_MAJOR_B_6)
-+ return TRUE;
-+ break;
-+ case bfd_mach_fr450:
-+ if (major >= FR450_MAJOR_B_1 && major <= FR450_MAJOR_B_6)
-+ return TRUE;
-+ break;
-+ default:
-+ if (major >= FR500_MAJOR_B_1 && major <= FR500_MAJOR_B_6)
-+ return TRUE;
-+ break;
-+ }
-+
-+ return FALSE;
-+}
-+
-+/* Returns TRUE if {MAJOR,MACH} supports floating point insns. */
-+
-+bfd_boolean
-+frv_is_float_major (CGEN_ATTR_VALUE_ENUM_TYPE major, unsigned long mach)
-+{
-+ switch (mach)
-+ {
-+ case bfd_mach_fr400:
-+ case bfd_mach_fr450:
-+ return FALSE;
-+ default:
-+ if (major >= FR500_MAJOR_F_1 && major <= FR500_MAJOR_F_8)
-+ return TRUE;
-+ break;
-+ }
-+
-+ return FALSE;
-+}
-+
-+/* Returns TRUE if {MAJOR,MACH} supports media insns. */
-+
-+bfd_boolean
-+frv_is_media_major (CGEN_ATTR_VALUE_ENUM_TYPE major, unsigned long mach)
-+{
-+ switch (mach)
-+ {
-+ case bfd_mach_fr400:
-+ if (major >= FR400_MAJOR_M_1 && major <= FR400_MAJOR_M_2)
-+ return TRUE;
-+ break;
-+ case bfd_mach_fr450:
-+ if (major >= FR450_MAJOR_M_1 && major <= FR450_MAJOR_M_6)
-+ return TRUE;
-+ break;
-+ default:
-+ if (major >= FR500_MAJOR_M_1 && major <= FR500_MAJOR_M_8)
-+ return TRUE;
-+ break;
-+ }
-+
-+ return FALSE;
-+}
-+
-+bfd_boolean
-+frv_is_branch_insn (const CGEN_INSN *insn)
-+{
-+ if (frv_is_branch_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR),
-+ bfd_mach_fr400))
-+ return TRUE;
-+ if (frv_is_branch_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR450_MAJOR),
-+ bfd_mach_fr450))
-+ return TRUE;
-+ if (frv_is_branch_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR),
-+ bfd_mach_fr500))
-+ return TRUE;
-+
-+ return FALSE;
-+}
-+
-+bfd_boolean
-+frv_is_float_insn (const CGEN_INSN *insn)
-+{
-+ if (frv_is_float_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR),
-+ bfd_mach_fr400))
-+ return TRUE;
-+ if (frv_is_float_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR450_MAJOR),
-+ bfd_mach_fr450))
-+ return TRUE;
-+ if (frv_is_float_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR),
-+ bfd_mach_fr500))
-+ return TRUE;
-+
-+ return FALSE;
-+}
-+
-+bfd_boolean
-+frv_is_media_insn (const CGEN_INSN *insn)
-+{
-+ if (frv_is_media_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR),
-+ bfd_mach_fr400))
-+ return TRUE;
-+ if (frv_is_media_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR450_MAJOR),
-+ bfd_mach_fr450))
-+ return TRUE;
-+ if (frv_is_media_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR),
-+ bfd_mach_fr500))
-+ return TRUE;
-+
-+ return FALSE;
-+}
-+
-+/* This table represents the allowable packing for vliw insns for the fr400.
-+ The fr400 has only 2 vliw slots. Represent this by not allowing any insns
-+ in the extra slots.
-+ Subsets of any given row are also allowed. */
-+static VLIW_COMBO fr400_allowed_vliw[] =
-+{
-+ /* slot0 slot1 slot2 slot3 */
-+ { UNIT_I0, UNIT_I1, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
-+ { UNIT_I0, UNIT_FM0, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
-+ { UNIT_I0, UNIT_B0, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
-+ { UNIT_FM0, UNIT_FM1, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
-+ { UNIT_FM0, UNIT_B0, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
-+ { UNIT_B0, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
-+ { UNIT_C, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
-+ { UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO }
-+};
-+
-+/* This table represents the allowable packing for vliw insns for the fr500.
-+ The fr500 has only 4 vliw slots. Represent this by not allowing any insns
-+ in the extra slots.
-+ Subsets of any given row are also allowed. */
-+static VLIW_COMBO fr500_allowed_vliw[] =
-+{
-+ /* slot0 slot1 slot2 slot3 */
-+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1 PAD_VLIW_COMBO },
-+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_B0 PAD_VLIW_COMBO },
-+ { UNIT_I0, UNIT_FM0, UNIT_FM1, UNIT_B0 PAD_VLIW_COMBO },
-+ { UNIT_I0, UNIT_FM0, UNIT_B0, UNIT_B1 PAD_VLIW_COMBO },
-+ { UNIT_I0, UNIT_I1, UNIT_B0, UNIT_B1 PAD_VLIW_COMBO },
-+ { UNIT_I0, UNIT_B0, UNIT_B1, UNIT_NIL PAD_VLIW_COMBO },
-+ { UNIT_FM0, UNIT_FM1, UNIT_B0, UNIT_B1 PAD_VLIW_COMBO },
-+ { UNIT_FM0, UNIT_B0, UNIT_B1, UNIT_NIL PAD_VLIW_COMBO },
-+ { UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
-+ { UNIT_C, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
-+ { UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO }
-+};
-+
-+/* This table represents the allowable packing for vliw insns for the fr550.
-+ Subsets of any given row are also allowed. */
-+static VLIW_COMBO fr550_allowed_vliw[] =
-+{
-+ /* slot0 slot1 slot2 slot3 slot4 slot5 slot6 slot7 */
-+ { UNIT_I0, UNIT_I1, UNIT_I2, UNIT_I3, UNIT_B0, UNIT_B1 , UNIT_NIL, UNIT_NIL },
-+ { UNIT_I0, UNIT_I1, UNIT_I2, UNIT_B0, UNIT_B1 , UNIT_NIL, UNIT_NIL, UNIT_NIL },
-+ { UNIT_I0, UNIT_I1, UNIT_B0, UNIT_B1 , UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
-+ { UNIT_I0, UNIT_B0, UNIT_B1 , UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
-+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_FM2, UNIT_I3, UNIT_FM3 },
-+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_FM2, UNIT_I3, UNIT_B0 },
-+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_FM2, UNIT_FM3, UNIT_B0 },
-+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_FM2, UNIT_B0, UNIT_B1 },
-+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_I3, UNIT_B0, UNIT_B1 },
-+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_B0, UNIT_B1, UNIT_NIL },
-+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_FM2, UNIT_FM3, UNIT_B0, UNIT_B1 },
-+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_FM2, UNIT_FM3, UNIT_B0, UNIT_B1 },
-+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_FM2, UNIT_B0, UNIT_B1, UNIT_NIL },
-+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL },
-+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_I2, UNIT_I3, UNIT_B0, UNIT_B1, UNIT_NIL },
-+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_I2, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL },
-+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL },
-+ { UNIT_I0, UNIT_FM0, UNIT_FM1, UNIT_FM2, UNIT_FM3, UNIT_B0, UNIT_B1, UNIT_NIL },
-+ { UNIT_I0, UNIT_FM0, UNIT_FM1, UNIT_FM2, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL },
-+ { UNIT_I0, UNIT_FM0, UNIT_FM1, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL },
-+ { UNIT_I0, UNIT_FM0, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
-+ { UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
-+ { UNIT_C, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
-+ { UNIT_FM0, UNIT_FM1, UNIT_FM2, UNIT_FM3, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL },
-+ { UNIT_FM0, UNIT_FM1, UNIT_FM2, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL },
-+ { UNIT_FM0, UNIT_FM1, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
-+ { UNIT_FM0, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
-+ { UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL }
-+};
-+
-+/* Some insns are assigned specialized implementation units which map to
-+ different actual implementation units on different machines. These
-+ tables perform that mapping. */
-+static CGEN_ATTR_VALUE_ENUM_TYPE fr400_unit_mapping[] =
-+{
-+/* unit in insn actual unit */
-+/* NIL */ UNIT_NIL,
-+/* I0 */ UNIT_I0,
-+/* I1 */ UNIT_I1,
-+/* I01 */ UNIT_I01,
-+/* I2 */ UNIT_NIL, /* no I2 or I3 unit */
-+/* I3 */ UNIT_NIL,
-+/* IALL */ UNIT_I01, /* only I0 and I1 units */
-+/* FM0 */ UNIT_FM0,
-+/* FM1 */ UNIT_FM1,
-+/* FM01 */ UNIT_FM01,
-+/* FM2 */ UNIT_NIL, /* no F2 or M2 units */
-+/* FM3 */ UNIT_NIL, /* no F3 or M3 units */
-+/* FMALL */ UNIT_FM01,/* Only F0,F1,M0,M1 units */
-+/* FMLOW */ UNIT_FM0, /* Only F0,M0 units */
-+/* B0 */ UNIT_B0, /* branches only in B0 unit. */
-+/* B1 */ UNIT_B0,
-+/* B01 */ UNIT_B0,
-+/* C */ UNIT_C,
-+/* MULT-DIV */ UNIT_I0, /* multiply and divide only in I0 unit. */
-+/* IACC */ UNIT_I01, /* iacc multiply in I0 or I1 unit. */
-+/* LOAD */ UNIT_I0, /* load only in I0 unit. */
-+/* STORE */ UNIT_I0, /* store only in I0 unit. */
-+/* SCAN */ UNIT_I0, /* scan only in I0 unit. */
-+/* DCPL */ UNIT_C, /* dcpl only in C unit. */
-+/* MDUALACC */ UNIT_FM0, /* media dual acc insn only in FM0 unit. */
-+/* MDCUTSSI */ UNIT_FM0, /* mdcutssi only in FM0 unit. */
-+/* MCLRACC-1*/ UNIT_FM0 /* mclracc,A==1 insn only in FM0 unit. */
-+};
-+
-+/* Some insns are assigned specialized implementation units which map to
-+ different actual implementation units on different machines. These
-+ tables perform that mapping. */
-+static CGEN_ATTR_VALUE_ENUM_TYPE fr450_unit_mapping[] =
-+{
-+/* unit in insn actual unit */
-+/* NIL */ UNIT_NIL,
-+/* I0 */ UNIT_I0,
-+/* I1 */ UNIT_I1,
-+/* I01 */ UNIT_I01,
-+/* I2 */ UNIT_NIL, /* no I2 or I3 unit */
-+/* I3 */ UNIT_NIL,
-+/* IALL */ UNIT_I01, /* only I0 and I1 units */
-+/* FM0 */ UNIT_FM0,
-+/* FM1 */ UNIT_FM1,
-+/* FM01 */ UNIT_FM01,
-+/* FM2 */ UNIT_NIL, /* no F2 or M2 units */
-+/* FM3 */ UNIT_NIL, /* no F3 or M3 units */
-+/* FMALL */ UNIT_FM01,/* Only F0,F1,M0,M1 units */
-+/* FMLOW */ UNIT_FM0, /* Only F0,M0 units */
-+/* B0 */ UNIT_B0, /* branches only in B0 unit. */
-+/* B1 */ UNIT_B0,
-+/* B01 */ UNIT_B0,
-+/* C */ UNIT_C,
-+/* MULT-DIV */ UNIT_I0, /* multiply and divide only in I0 unit. */
-+/* IACC */ UNIT_I01, /* iacc multiply in I0 or I1 unit. */
-+/* LOAD */ UNIT_I0, /* load only in I0 unit. */
-+/* STORE */ UNIT_I0, /* store only in I0 unit. */
-+/* SCAN */ UNIT_I0, /* scan only in I0 unit. */
-+/* DCPL */ UNIT_I0, /* dcpl only in I0 unit. */
-+/* MDUALACC */ UNIT_FM0, /* media dual acc insn only in FM0 unit. */
-+/* MDCUTSSI */ UNIT_FM01, /* mdcutssi in FM0 or FM1. */
-+/* MCLRACC-1*/ UNIT_FM0 /* mclracc,A==1 insn only in FM0 unit. */
-+};
-+
-+static CGEN_ATTR_VALUE_ENUM_TYPE fr500_unit_mapping[] =
-+{
-+/* unit in insn actual unit */
-+/* NIL */ UNIT_NIL,
-+/* I0 */ UNIT_I0,
-+/* I1 */ UNIT_I1,
-+/* I01 */ UNIT_I01,
-+/* I2 */ UNIT_NIL, /* no I2 or I3 unit */
-+/* I3 */ UNIT_NIL,
-+/* IALL */ UNIT_I01, /* only I0 and I1 units */
-+/* FM0 */ UNIT_FM0,
-+/* FM1 */ UNIT_FM1,
-+/* FM01 */ UNIT_FM01,
-+/* FM2 */ UNIT_NIL, /* no F2 or M2 units */
-+/* FM3 */ UNIT_NIL, /* no F3 or M2 units */
-+/* FMALL */ UNIT_FM01,/* Only F0,F1,M0,M1 units */
-+/* FMLOW */ UNIT_FM0, /* Only F0,M0 units */
-+/* B0 */ UNIT_B0,
-+/* B1 */ UNIT_B1,
-+/* B01 */ UNIT_B01,
-+/* C */ UNIT_C,
-+/* MULT-DIV */ UNIT_I01, /* multiply and divide in I0 or I1 unit. */
-+/* IACC */ UNIT_NIL, /* iacc multiply not implemented */
-+/* LOAD */ UNIT_I01, /* load in I0 or I1 unit. */
-+/* STORE */ UNIT_I0, /* store only in I0 unit. */
-+/* SCAN */ UNIT_I01, /* scan in I0 or I1 unit. */
-+/* DCPL */ UNIT_C, /* dcpl only in C unit. */
-+/* MDUALACC */ UNIT_FM0, /* media dual acc insn only in FM0 unit. */
-+/* MDCUTSSI */ UNIT_FM0, /* mdcutssi only in FM0 unit. */
-+/* MCLRACC-1*/ UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit. */
-+};
-+
-+static CGEN_ATTR_VALUE_ENUM_TYPE fr550_unit_mapping[] =
-+{
-+/* unit in insn actual unit */
-+/* NIL */ UNIT_NIL,
-+/* I0 */ UNIT_I0,
-+/* I1 */ UNIT_I1,
-+/* I01 */ UNIT_I01,
-+/* I2 */ UNIT_I2,
-+/* I3 */ UNIT_I3,
-+/* IALL */ UNIT_IALL,
-+/* FM0 */ UNIT_FM0,
-+/* FM1 */ UNIT_FM1,
-+/* FM01 */ UNIT_FM01,
-+/* FM2 */ UNIT_FM2,
-+/* FM3 */ UNIT_FM3,
-+/* FMALL */ UNIT_FMALL,
-+/* FMLOW */ UNIT_FM01, /* Only F0,F1,M0,M1 units */
-+/* B0 */ UNIT_B0,
-+/* B1 */ UNIT_B1,
-+/* B01 */ UNIT_B01,
-+/* C */ UNIT_C,
-+/* MULT-DIV */ UNIT_I01, /* multiply and divide in I0 or I1 unit. */
-+/* IACC */ UNIT_NIL, /* iacc multiply not implemented. */
-+/* LOAD */ UNIT_I01, /* load in I0 or I1 unit. */
-+/* STORE */ UNIT_I01, /* store in I0 or I1 unit. */
-+/* SCAN */ UNIT_IALL, /* scan in any integer unit. */
-+/* DCPL */ UNIT_I0, /* dcpl only in I0 unit. */
-+/* MDUALACC */ UNIT_FMALL,/* media dual acc insn in all media units */
-+/* MDCUTSSI */ UNIT_FM01, /* mdcutssi in FM0 or FM1 unit. */
-+/* MCLRACC-1*/ UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit. */
-+};
-+
-+void
-+frv_vliw_reset (FRV_VLIW *vliw, unsigned long mach, unsigned long elf_flags)
-+{
-+ vliw->next_slot = 0;
-+ vliw->constraint_violation = 0;
-+ vliw->mach = mach;
-+ vliw->elf_flags = elf_flags;
-+
-+ switch (mach)
-+ {
-+ case bfd_mach_fr400:
-+ vliw->current_vliw = fr400_allowed_vliw;
-+ vliw->unit_mapping = fr400_unit_mapping;
-+ break;
-+ case bfd_mach_fr450:
-+ vliw->current_vliw = fr400_allowed_vliw;
-+ vliw->unit_mapping = fr450_unit_mapping;
-+ break;
-+ case bfd_mach_fr550:
-+ vliw->current_vliw = fr550_allowed_vliw;
-+ vliw->unit_mapping = fr550_unit_mapping;
-+ break;
-+ default:
-+ vliw->current_vliw = fr500_allowed_vliw;
-+ vliw->unit_mapping = fr500_unit_mapping;
-+ break;
-+ }
-+}
-+
-+/* Return TRUE if unit1 is a match for unit2.
-+ Unit1 comes from the insn's UNIT attribute. unit2 comes from one of the
-+ *_allowed_vliw tables above. */
-+static bfd_boolean
-+match_unit (FRV_VLIW *vliw,
-+ CGEN_ATTR_VALUE_ENUM_TYPE unit1, CGEN_ATTR_VALUE_ENUM_TYPE unit2)
-+{
-+ /* Map any specialized implementation units to actual ones. */
-+ unit1 = vliw->unit_mapping[unit1];
-+
-+ if (unit1 == unit2)
-+ return TRUE;
-+ if (unit1 < unit2)
-+ return FALSE;
-+
-+ switch (unit1)
-+ {
-+ case UNIT_I01:
-+ case UNIT_FM01:
-+ case UNIT_B01:
-+ /* The 01 versions of these units are within 2 enums of the 0 or 1
-+ versions. */
-+ if (unit1 - unit2 <= 2)
-+ return TRUE;
-+ break;
-+ case UNIT_IALL:
-+ case UNIT_FMALL:
-+ /* The ALL versions of these units are within 5 enums of the 0, 1, 2 or 3
-+ versions. */
-+ if (unit1 - unit2 <= 5)
-+ return TRUE;
-+ break;
-+ default:
-+ break;
-+ }
-+
-+ return FALSE;
-+}
-+
-+/* Return TRUE if the vliws match, FALSE otherwise. */
-+
-+static bfd_boolean
-+match_vliw (VLIW_COMBO *vliw1, VLIW_COMBO *vliw2, int vliw_size)
-+{
-+ int i;
-+
-+ for (i = 0; i < vliw_size; ++i)
-+ if ((*vliw1)[i] != (*vliw2)[i])
-+ return FALSE;
-+
-+ return TRUE;
-+}
-+
-+/* Find the next vliw vliw in the table that can accomodate the new insn.
-+ If one is found then return it. Otherwise return NULL. */
-+
-+static VLIW_COMBO *
-+add_next_to_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE unit)
-+{
-+ int next = vliw->next_slot;
-+ VLIW_COMBO *current = vliw->current_vliw;
-+ VLIW_COMBO *potential;
-+
-+ if (next <= 0)
-+ {
-+ fprintf (stderr, "frv-opc.c line %d: bad vliw->next_slot value.\n",
-+ __LINE__);
-+ abort (); /* Should never happen. */
-+ }
-+
-+ /* The table is sorted by units allowed within slots, so vliws with
-+ identical starting sequences are together. */
-+ potential = current;
-+ do
-+ {
-+ if (match_unit (vliw, unit, (*potential)[next]))
-+ return potential;
-+ ++potential;
-+ }
-+ while (match_vliw (potential, current, next));
-+
-+ return NULL;
-+}
-+
-+/* Look for the given major insn type in the given vliw.
-+ Returns TRUE if found, FALSE otherwise. */
-+
-+static bfd_boolean
-+find_major_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major)
-+{
-+ int i;
-+
-+ for (i = 0; i < vliw->next_slot; ++i)
-+ if (vliw->major[i] == major)
-+ return TRUE;
-+
-+ return FALSE;
-+}
-+
-+/* Check for constraints between the insns in the vliw due to major insn
-+ types. */
-+
-+static bfd_boolean
-+fr400_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major)
-+{
-+ /* In the cpu file, all media insns are represented as being allowed in
-+ both media units. This makes it easier since this is the case for fr500.
-+ Catch the invalid combinations here. Insns of major class FR400_MAJOR_M_2
-+ cannot coexist with any other media insn in a vliw. */
-+ switch (major)
-+ {
-+ case FR400_MAJOR_M_2:
-+ return ! find_major_in_vliw (vliw, FR400_MAJOR_M_1)
-+ && ! find_major_in_vliw (vliw, FR400_MAJOR_M_2);
-+ case FR400_MAJOR_M_1:
-+ return ! find_major_in_vliw (vliw, FR400_MAJOR_M_2);
-+ default:
-+ break;
-+ }
-+ return TRUE;
-+}
-+
-+static bfd_boolean
-+fr450_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major)
-+{
-+ CGEN_ATTR_VALUE_ENUM_TYPE other_major;
-+
-+ /* Our caller guarantees there's at least one other instruction. */
-+ other_major = CGEN_INSN_ATTR_VALUE (vliw->insn[0], CGEN_INSN_FR450_MAJOR);
-+
-+ /* (M4, M5) and (M4, M6) are allowed. */
-+ if (other_major == FR450_MAJOR_M_4)
-+ if (major == FR450_MAJOR_M_5 || major == FR450_MAJOR_M_6)
-+ return TRUE;
-+
-+ /* Otherwise, instructions in even-numbered media categories cannot be
-+ executed in parallel with other media instructions. */
-+ switch (major)
-+ {
-+ case FR450_MAJOR_M_2:
-+ case FR450_MAJOR_M_4:
-+ case FR450_MAJOR_M_6:
-+ return !(other_major >= FR450_MAJOR_M_1
-+ && other_major <= FR450_MAJOR_M_6);
-+
-+ case FR450_MAJOR_M_1:
-+ case FR450_MAJOR_M_3:
-+ case FR450_MAJOR_M_5:
-+ return !(other_major == FR450_MAJOR_M_2
-+ || other_major == FR450_MAJOR_M_4
-+ || other_major == FR450_MAJOR_M_6);
-+
-+ default:
-+ return TRUE;
-+ }
-+}
-+
-+static bfd_boolean
-+find_unit_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE unit)
-+{
-+ int i;
-+
-+ for (i = 0; i < vliw->next_slot; ++i)
-+ if (CGEN_INSN_ATTR_VALUE (vliw->insn[i], CGEN_INSN_UNIT) == unit)
-+ return TRUE;
-+
-+ return FALSE; /* Not found. */
-+}
-+
-+static bfd_boolean
-+find_major_in_slot (FRV_VLIW *vliw,
-+ CGEN_ATTR_VALUE_ENUM_TYPE major,
-+ CGEN_ATTR_VALUE_ENUM_TYPE slot)
-+{
-+ int i;
-+
-+ for (i = 0; i < vliw->next_slot; ++i)
-+ if (vliw->major[i] == major && (*vliw->current_vliw)[i] == slot)
-+ return TRUE;
-+
-+ return FALSE;
-+}
-+
-+static bfd_boolean
-+fr550_find_media_in_vliw (FRV_VLIW *vliw)
-+{
-+ int i;
-+
-+ for (i = 0; i < vliw->next_slot; ++i)
-+ {
-+ if (vliw->major[i] < FR550_MAJOR_M_1 || vliw->major[i] > FR550_MAJOR_M_5)
-+ continue;
-+
-+ /* Found a media insn, however, MNOP and MCLRACC don't count. */
-+ if (CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_MNOP
-+ || CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_MCLRACC_0
-+ || CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_MCLRACC_1)
-+ continue;
-+
-+ return TRUE; /* Found one. */
-+ }
-+
-+ return FALSE;
-+}
-+
-+static bfd_boolean
-+fr550_find_float_in_vliw (FRV_VLIW *vliw)
-+{
-+ int i;
-+
-+ for (i = 0; i < vliw->next_slot; ++i)
-+ {
-+ if (vliw->major[i] < FR550_MAJOR_F_1 || vliw->major[i] > FR550_MAJOR_F_4)
-+ continue;
-+
-+ /* Found a floating point insn, however, FNOP doesn't count. */
-+ if (CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_FNOP)
-+ continue;
-+
-+ return TRUE; /* Found one. */
-+ }
-+
-+ return FALSE;
-+}
-+
-+static bfd_boolean
-+fr550_check_insn_major_constraints (FRV_VLIW *vliw,
-+ CGEN_ATTR_VALUE_ENUM_TYPE major,
-+ const CGEN_INSN *insn)
-+{
-+ CGEN_ATTR_VALUE_ENUM_TYPE unit;
-+ CGEN_ATTR_VALUE_ENUM_TYPE slot = (*vliw->current_vliw)[vliw->next_slot];
-+ switch (slot)
-+ {
-+ case UNIT_I2:
-+ /* If it's a store, then there must be another store in I1 */
-+ unit = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_UNIT);
-+ if (unit == UNIT_STORE)
-+ return find_unit_in_vliw (vliw, UNIT_STORE);
-+ break;
-+ case UNIT_FM2:
-+ case UNIT_FM3:
-+ /* Floating point insns other than FNOP in slot f2 or f3 cannot coexist
-+ with media insns. */
-+ if (major >= FR550_MAJOR_F_1 && major <= FR550_MAJOR_F_4
-+ && CGEN_INSN_NUM (insn) != FRV_INSN_FNOP)
-+ return ! fr550_find_media_in_vliw (vliw);
-+ /* Media insns other than MNOP in slot m2 or m3 cannot coexist with
-+ floating point insns. */
-+ if (major >= FR550_MAJOR_M_1 && major <= FR550_MAJOR_M_5
-+ && CGEN_INSN_NUM (insn) != FRV_INSN_MNOP)
-+ return ! fr550_find_float_in_vliw (vliw);
-+ /* F-2 in slot f2 or f3 cannot coexist with F-2 or F-4 in slot f1 or f2
-+ respectively. */
-+ if (major == FR550_MAJOR_F_2)
-+ return ! find_major_in_slot (vliw, FR550_MAJOR_F_2,
-+ slot - (UNIT_FM2 - UNIT_FM0))
-+ && ! find_major_in_slot (vliw, FR550_MAJOR_F_4,
-+ slot - (UNIT_FM2 - UNIT_FM0));
-+ /* M-2 or M-5 in slot m2 or m3 cannot coexist with M-2 in slot m1 or m2
-+ respectively. */
-+ if (major == FR550_MAJOR_M_2 || major == FR550_MAJOR_M_5)
-+ return ! find_major_in_slot (vliw, FR550_MAJOR_M_2,
-+ slot - (UNIT_FM2 - UNIT_FM0));
-+ /* M-4 in slot m2 or m3 cannot coexist with M-4 in slot m1 or m2
-+ respectively. */
-+ if (major == FR550_MAJOR_M_4)
-+ return ! find_major_in_slot (vliw, FR550_MAJOR_M_4,
-+ slot - (UNIT_FM2 - UNIT_FM0));
-+ break;
-+ default:
-+ break;
-+ }
-+ return TRUE; /* All OK. */
-+}
-+
-+static bfd_boolean
-+fr500_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major)
-+{
-+ /* TODO: A table might be faster for some of the more complex instances
-+ here. */
-+ switch (major)
-+ {
-+ case FR500_MAJOR_I_1:
-+ case FR500_MAJOR_I_4:
-+ case FR500_MAJOR_I_5:
-+ case FR500_MAJOR_I_6:
-+ case FR500_MAJOR_B_1:
-+ case FR500_MAJOR_B_2:
-+ case FR500_MAJOR_B_3:
-+ case FR500_MAJOR_B_4:
-+ case FR500_MAJOR_B_5:
-+ case FR500_MAJOR_B_6:
-+ case FR500_MAJOR_F_4:
-+ case FR500_MAJOR_F_8:
-+ case FR500_MAJOR_M_8:
-+ return TRUE; /* OK */
-+ case FR500_MAJOR_I_2:
-+ /* Cannot coexist with I-3 insn. */
-+ return ! find_major_in_vliw (vliw, FR500_MAJOR_I_3);
-+ case FR500_MAJOR_I_3:
-+ /* Cannot coexist with I-2 insn. */
-+ return ! find_major_in_vliw (vliw, FR500_MAJOR_I_2);
-+ case FR500_MAJOR_F_1:
-+ case FR500_MAJOR_F_2:
-+ /* Cannot coexist with F-5, F-6, or M-7 insn. */
-+ return ! find_major_in_vliw (vliw, FR500_MAJOR_F_5)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_F_6)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_7);
-+ case FR500_MAJOR_F_3:
-+ /* Cannot coexist with F-7, or M-7 insn. */
-+ return ! find_major_in_vliw (vliw, FR500_MAJOR_F_7)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_7);
-+ case FR500_MAJOR_F_5:
-+ /* Cannot coexist with F-1, F-2, F-6, F-7, or M-7 insn. */
-+ return ! find_major_in_vliw (vliw, FR500_MAJOR_F_1)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_F_2)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_F_6)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_F_7)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_7);
-+ case FR500_MAJOR_F_6:
-+ /* Cannot coexist with F-1, F-2, F-5, F-6, or M-7 insn. */
-+ return ! find_major_in_vliw (vliw, FR500_MAJOR_F_1)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_F_2)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_F_5)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_F_6)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_7);
-+ case FR500_MAJOR_F_7:
-+ /* Cannot coexist with F-3, F-5, F-7, or M-7 insn. */
-+ return ! find_major_in_vliw (vliw, FR500_MAJOR_F_3)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_F_5)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_F_7)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_7);
-+ case FR500_MAJOR_M_1:
-+ /* Cannot coexist with M-7 insn. */
-+ return ! find_major_in_vliw (vliw, FR500_MAJOR_M_7);
-+ case FR500_MAJOR_M_2:
-+ case FR500_MAJOR_M_3:
-+ /* Cannot coexist with M-5, M-6 or M-7 insn. */
-+ return ! find_major_in_vliw (vliw, FR500_MAJOR_M_5)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_6)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_7);
-+ case FR500_MAJOR_M_4:
-+ /* Cannot coexist with M-6 insn. */
-+ return ! find_major_in_vliw (vliw, FR500_MAJOR_M_6);
-+ case FR500_MAJOR_M_5:
-+ /* Cannot coexist with M-2, M-3, M-5, M-6 or M-7 insn. */
-+ return ! find_major_in_vliw (vliw, FR500_MAJOR_M_2)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_3)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_5)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_6)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_7);
-+ case FR500_MAJOR_M_6:
-+ /* Cannot coexist with M-2, M-3, M-4, M-5, M-6 or M-7 insn. */
-+ return ! find_major_in_vliw (vliw, FR500_MAJOR_M_2)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_3)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_4)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_5)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_6)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_7);
-+ case FR500_MAJOR_M_7:
-+ /* Cannot coexist with M-1, M-2, M-3, M-5, M-6 or M-7 insn. */
-+ return ! find_major_in_vliw (vliw, FR500_MAJOR_M_1)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_2)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_3)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_5)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_6)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_M_7)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_F_1)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_F_2)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_F_3)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_F_5)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_F_6)
-+ && ! find_major_in_vliw (vliw, FR500_MAJOR_F_7);
-+ default:
-+ fprintf (stderr, "frv-opc.c, line %d: bad major code, aborting.\n",
-+ __LINE__);
-+ abort ();
-+ break;
-+ }
-+ return TRUE;
-+}
-+
-+static bfd_boolean
-+check_insn_major_constraints (FRV_VLIW *vliw,
-+ CGEN_ATTR_VALUE_ENUM_TYPE major,
-+ const CGEN_INSN *insn)
-+{
-+ switch (vliw->mach)
-+ {
-+ case bfd_mach_fr400:
-+ return fr400_check_insn_major_constraints (vliw, major);
-+
-+ case bfd_mach_fr450:
-+ return fr450_check_insn_major_constraints (vliw, major);
-+
-+ case bfd_mach_fr550:
-+ return fr550_check_insn_major_constraints (vliw, major, insn);
-+
-+ default:
-+ return fr500_check_insn_major_constraints (vliw, major);
-+ }
-+}
-+
-+/* Add in insn to the VLIW vliw if possible.
-+ Return 0 if successful, non-zero otherwise. */
-+
-+int
-+frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn)
-+{
-+ int index;
-+ CGEN_ATTR_VALUE_ENUM_TYPE major;
-+ CGEN_ATTR_VALUE_ENUM_TYPE unit;
-+ VLIW_COMBO *new_vliw;
-+
-+ if (vliw->constraint_violation || CGEN_INSN_INVALID_P (insn))
-+ return 1;
-+
-+ index = vliw->next_slot;
-+ if (index >= FRV_VLIW_SIZE)
-+ return 1;
-+
-+ unit = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_UNIT);
-+ if (unit == UNIT_NIL)
-+ {
-+ fprintf (stderr, "frv-opc.c line %d: bad insn unit.\n",
-+ __LINE__);
-+ abort (); /* No UNIT specified for this insn in frv.cpu. */
-+ }
-+
-+ switch (vliw->mach)
-+ {
-+ case bfd_mach_fr400:
-+ major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR);
-+ break;
-+ case bfd_mach_fr450:
-+ major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR450_MAJOR);
-+ break;
-+ case bfd_mach_fr550:
-+ major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR550_MAJOR);
-+ break;
-+ default:
-+ major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR);
-+ break;
-+ }
-+
-+ if (index <= 0)
-+ {
-+ /* Any insn can be added to slot 0. */
-+ while (! match_unit (vliw, unit, (*vliw->current_vliw)[0]))
-+ ++vliw->current_vliw;
-+ vliw->major[0] = major;
-+ vliw->insn[0] = insn;
-+ vliw->next_slot = 1;
-+ return 0;
-+ }
-+
-+ /* If there are already insns in the vliw(s) check to see that
-+ this one can be added. Do this by finding an allowable vliw
-+ combination that can accept the new insn. */
-+ if (! (vliw->elf_flags & EF_FRV_NOPACK))
-+ {
-+ new_vliw = add_next_to_vliw (vliw, unit);
-+ if (new_vliw && check_insn_major_constraints (vliw, major, insn))
-+ {
-+ vliw->current_vliw = new_vliw;
-+ vliw->major[index] = major;
-+ vliw->insn[index] = insn;
-+ vliw->next_slot++;
-+ return 0;
-+ }
-+
-+ /* The frv machine supports all packing conbinations. If we fail,
-+ to add the insn, then it could not be handled as if it was the fr500.
-+ Just return as if it was handled ok. */
-+ if (vliw->mach == bfd_mach_frv)
-+ return 0;
-+ }
-+
-+ vliw->constraint_violation = 1;
-+ return 1;
-+}
-+
-+bfd_boolean
-+spr_valid (long regno)
-+{
-+ if (regno < 0) return FALSE;
-+ if (regno <= 4095) return TRUE;
-+ return FALSE;
-+}
-+/* -- */
-+
-+/* -- asm.c */
-+inline static const char *
-+parse_symbolic_address (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ int opinfo,
-+ enum cgen_parse_operand_result *resultp,
-+ bfd_vma *valuep)
-+{
-+ enum cgen_parse_operand_result result_type;
-+ const char *errmsg = (* cd->parse_operand_fn)
-+ (cd, CGEN_PARSE_OPERAND_SYMBOLIC, strp, opindex, opinfo,
-+ &result_type, valuep);
-+
-+ if (errmsg == NULL
-+ && result_type != CGEN_PARSE_OPERAND_RESULT_QUEUED)
-+ return "symbolic expression required";
-+
-+ if (resultp)
-+ *resultp = result_type;
-+
-+ return errmsg;
-+}
-+
-+static const char *
-+parse_ldd_annotation (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ if (**strp == '#' || **strp == '%')
-+ {
-+ if (strncasecmp (*strp + 1, "tlsdesc(", 8) == 0)
-+ {
-+ *strp += 9;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_TLSDESC_RELAX,
-+ &result_type, &value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ if (valuep)
-+ *valuep = value;
-+ ++*strp;
-+ if (errmsg)
-+ return errmsg;
-+ }
-+ }
-+
-+ while (**strp == ' ' || **strp == '\t')
-+ ++*strp;
-+
-+ if (**strp != '@')
-+ return "missing `@'";
-+
-+ ++*strp;
-+
-+ return NULL;
-+}
-+
-+static const char *
-+parse_call_annotation (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ if (**strp == '#' || **strp == '%')
-+ {
-+ if (strncasecmp (*strp + 1, "gettlsoff(", 10) == 0)
-+ {
-+ *strp += 11;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GETTLSOFF_RELAX,
-+ &result_type, &value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ if (valuep)
-+ *valuep = value;
-+ ++*strp;
-+ if (errmsg)
-+ return errmsg;
-+ }
-+ }
-+
-+ while (**strp == ' ' || **strp == '\t')
-+ ++*strp;
-+
-+ if (**strp != '@')
-+ return "missing `@'";
-+
-+ ++*strp;
-+
-+ return NULL;
-+}
-+
-+static const char *
-+parse_ld_annotation (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ if (**strp == '#' || **strp == '%')
-+ {
-+ if (strncasecmp (*strp + 1, "tlsoff(", 7) == 0)
-+ {
-+ *strp += 8;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_TLSOFF_RELAX,
-+ &result_type, &value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ if (valuep)
-+ *valuep = value;
-+ ++*strp;
-+ if (errmsg)
-+ return errmsg;
-+ }
-+ }
-+
-+ while (**strp == ' ' || **strp == '\t')
-+ ++*strp;
-+
-+ if (**strp != '@')
-+ return "missing `@'";
-+
-+ ++*strp;
-+
-+ return NULL;
-+}
-+
-+static const char *
-+parse_ulo16 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ if (**strp == '#' || **strp == '%')
-+ {
-+ if (strncasecmp (*strp + 1, "lo(", 3) == 0)
-+ {
-+ *strp += 4;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_FRV_LO16,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing `)'";
-+ ++*strp;
-+ if (errmsg == NULL
-+ && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value &= 0xffff;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ if (strncasecmp (*strp + 1, "gprello(", 8) == 0)
-+ {
-+ *strp += 9;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GPRELLO,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gotlo(", 6) == 0)
-+ {
-+ *strp += 7;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOTLO,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gotfuncdesclo(", 14) == 0)
-+ {
-+ *strp += 15;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_FUNCDESC_GOTLO,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gotofflo(", 9) == 0)
-+ {
-+ *strp += 10;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOTOFFLO,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gotofffuncdesclo(", 17) == 0)
-+ {
-+ *strp += 18;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_FUNCDESC_GOTOFFLO,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gottlsdesclo(", 13) == 0)
-+ {
-+ *strp += 14;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOTTLSDESCLO,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "tlsmofflo(", 10) == 0)
-+ {
-+ *strp += 11;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_TLSMOFFLO,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gottlsofflo(", 12) == 0)
-+ {
-+ *strp += 13;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOTTLSOFFLO,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ }
-+ return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
-+}
-+
-+static const char *
-+parse_uslo16 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ signed long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ if (**strp == '#' || **strp == '%')
-+ {
-+ if (strncasecmp (*strp + 1, "lo(", 3) == 0)
-+ {
-+ *strp += 4;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_FRV_LO16,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing `)'";
-+ ++*strp;
-+ if (errmsg == NULL
-+ && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value &= 0xffff;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gprello(", 8) == 0)
-+ {
-+ *strp += 9;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GPRELLO,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gotlo(", 6) == 0)
-+ {
-+ *strp += 7;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOTLO,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gotfuncdesclo(", 14) == 0)
-+ {
-+ *strp += 15;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_FUNCDESC_GOTLO,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gotofflo(", 9) == 0)
-+ {
-+ *strp += 10;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOTOFFLO,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gotofffuncdesclo(", 17) == 0)
-+ {
-+ *strp += 18;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_FUNCDESC_GOTOFFLO,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gottlsdesclo(", 13) == 0)
-+ {
-+ *strp += 14;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOTTLSDESCLO,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "tlsmofflo(", 10) == 0)
-+ {
-+ *strp += 11;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_TLSMOFFLO,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gottlsofflo(", 12) == 0)
-+ {
-+ *strp += 13;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOTTLSOFFLO,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ }
-+ return cgen_parse_signed_integer (cd, strp, opindex, valuep);
-+}
-+
-+static const char *
-+parse_uhi16 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ if (**strp == '#' || **strp == '%')
-+ {
-+ if (strncasecmp (*strp + 1, "hi(", 3) == 0)
-+ {
-+ *strp += 4;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_FRV_HI16,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing `)'";
-+ ++*strp;
-+ if (errmsg == NULL
-+ && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ {
-+ /* If bfd_vma is wider than 32 bits, but we have a sign-
-+ or zero-extension, truncate it. */
-+ if (value >= - ((bfd_vma)1 << 31)
-+ || value <= ((bfd_vma)1 << 31) - (bfd_vma)1)
-+ value &= (((bfd_vma)1 << 16) << 16) - 1;
-+ value >>= 16;
-+ }
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gprelhi(", 8) == 0)
-+ {
-+ *strp += 9;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GPRELHI,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gothi(", 6) == 0)
-+ {
-+ *strp += 7;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOTHI,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gotfuncdeschi(", 14) == 0)
-+ {
-+ *strp += 15;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_FUNCDESC_GOTHI,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gotoffhi(", 9) == 0)
-+ {
-+ *strp += 10;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOTOFFHI,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gotofffuncdeschi(", 17) == 0)
-+ {
-+ *strp += 18;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_FUNCDESC_GOTOFFHI,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gottlsdeschi(", 13) == 0)
-+ {
-+ *strp += 14;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOTTLSDESCHI,
-+ &result_type, &value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "tlsmoffhi(", 10) == 0)
-+ {
-+ *strp += 11;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_TLSMOFFHI,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gottlsoffhi(", 12) == 0)
-+ {
-+ *strp += 13;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOTTLSOFFHI,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ }
-+ return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
-+}
-+
-+static long
-+parse_register_number (const char **strp)
-+{
-+ int regno;
-+
-+ if (**strp < '0' || **strp > '9')
-+ return -1; /* error */
-+
-+ regno = **strp - '0';
-+ for (++*strp; **strp >= '0' && **strp <= '9'; ++*strp)
-+ regno = regno * 10 + (**strp - '0');
-+
-+ return regno;
-+}
-+
-+static const char *
-+parse_spr (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ CGEN_KEYWORD * table,
-+ long *valuep)
-+{
-+ const char *save_strp;
-+ long regno;
-+
-+ /* Check for spr index notation. */
-+ if (strncasecmp (*strp, "spr[", 4) == 0)
-+ {
-+ *strp += 4;
-+ regno = parse_register_number (strp);
-+ if (**strp != ']')
-+ return _("missing `]'");
-+ ++*strp;
-+ if (! spr_valid (regno))
-+ return _("Special purpose register number is out of range");
-+ *valuep = regno;
-+ return NULL;
-+ }
-+
-+ save_strp = *strp;
-+ regno = parse_register_number (strp);
-+ if (regno != -1)
-+ {
-+ if (! spr_valid (regno))
-+ return _("Special purpose register number is out of range");
-+ *valuep = regno;
-+ return NULL;
-+ }
-+
-+ *strp = save_strp;
-+ return cgen_parse_keyword (cd, strp, table, valuep);
-+}
-+
-+static const char *
-+parse_d12 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ /* Check for small data reference. */
-+ if (**strp == '#' || **strp == '%')
-+ {
-+ if (strncasecmp (*strp + 1, "gprel12(", 8) == 0)
-+ {
-+ *strp += 9;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GPREL12,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing `)'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "got12(", 6) == 0)
-+ {
-+ *strp += 7;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOT12,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gotfuncdesc12(", 14) == 0)
-+ {
-+ *strp += 15;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_FUNCDESC_GOT12,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gotoff12(", 9) == 0)
-+ {
-+ *strp += 10;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOTOFF12,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gotofffuncdesc12(", 17) == 0)
-+ {
-+ *strp += 18;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_FUNCDESC_GOTOFF12,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gottlsdesc12(", 13) == 0)
-+ {
-+ *strp += 14;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOTTLSDESC12,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "tlsmoff12(", 10) == 0)
-+ {
-+ *strp += 11;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_TLSMOFF12,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gottlsoff12(", 12) == 0)
-+ {
-+ *strp += 13;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOTTLSOFF12,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ }
-+ return cgen_parse_signed_integer (cd, strp, opindex, valuep);
-+}
-+
-+static const char *
-+parse_s12 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ /* Check for small data reference. */
-+ if (**strp == '#' || **strp == '%')
-+ {
-+ if (strncasecmp (*strp + 1, "gprel12(", 8) == 0)
-+ {
-+ *strp += 9;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GPREL12,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing `)'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "got12(", 6) == 0)
-+ {
-+ *strp += 7;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOT12,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gotfuncdesc12(", 14) == 0)
-+ {
-+ *strp += 15;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_FUNCDESC_GOT12,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gotoff12(", 9) == 0)
-+ {
-+ *strp += 10;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOTOFF12,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gotofffuncdesc12(", 17) == 0)
-+ {
-+ *strp += 18;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_FUNCDESC_GOTOFF12,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gottlsdesc12(", 13) == 0)
-+ {
-+ *strp += 14;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOTTLSDESC12,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "tlsmoff12(", 10) == 0)
-+ {
-+ *strp += 11;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_TLSMOFF12,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp + 1, "gottlsoff12(", 12) == 0)
-+ {
-+ *strp += 13;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GOTTLSOFF12,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing ')'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ }
-+
-+ if (**strp == '#')
-+ ++*strp;
-+ return cgen_parse_signed_integer (cd, strp, opindex, valuep);
-+}
-+
-+static const char *
-+parse_u12 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ /* Check for small data reference. */
-+ if ((**strp == '#' || **strp == '%')
-+ && strncasecmp (*strp + 1, "gprel12(", 8) == 0)
-+ {
-+ *strp += 9;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GPRELU12,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return "missing `)'";
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else
-+ {
-+ if (**strp == '#')
-+ ++*strp;
-+ return cgen_parse_signed_integer (cd, strp, opindex, valuep);
-+ }
-+}
-+
-+static const char *
-+parse_A (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep,
-+ unsigned long A)
-+{
-+ const char *errmsg;
-+
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
-+ if (errmsg)
-+ return errmsg;
-+
-+ if (*valuep != A)
-+ return _("Value of A operand must be 0 or 1");
-+
-+ return NULL;
-+}
-+
-+static const char *
-+parse_A0 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ return parse_A (cd, strp, opindex, valuep, 0);
-+}
-+
-+static const char *
-+parse_A1 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ return parse_A (cd, strp, opindex, valuep, 1);
-+}
-+
-+static const char *
-+parse_even_register (CGEN_CPU_DESC cd,
-+ const char ** strP,
-+ CGEN_KEYWORD * tableP,
-+ long * valueP)
-+{
-+ const char * errmsg;
-+ const char * saved_star_strP = * strP;
-+
-+ errmsg = cgen_parse_keyword (cd, strP, tableP, valueP);
-+
-+ if (errmsg == NULL && ((* valueP) & 1))
-+ {
-+ errmsg = _("register number must be even");
-+ * strP = saved_star_strP;
-+ }
-+
-+ return errmsg;
-+}
-+
-+static const char *
-+parse_call_label (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ int opinfo,
-+ enum cgen_parse_operand_result *resultp,
-+ bfd_vma *valuep)
-+{
-+ const char *errmsg;
-+ bfd_vma value;
-+
-+ /* Check for small data reference. */
-+ if (opinfo == 0 && (**strp == '#' || **strp == '%'))
-+ {
-+ if (strncasecmp (*strp + 1, "gettlsoff(", 10) == 0)
-+ {
-+ *strp += 11;
-+ errmsg = parse_symbolic_address (cd, strp, opindex,
-+ BFD_RELOC_FRV_GETTLSOFF,
-+ resultp, &value);
-+ if (**strp != ')')
-+ return _("missing `)'");
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ }
-+
-+ return cgen_parse_address (cd, strp, opindex, opinfo, resultp, valuep);
-+}
-+
-+/* -- */
-+
-+/* -- dis.c */
-+static void
-+print_at (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long reloc_ann ATTRIBUTE_UNUSED,
-+ long value ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ (*info->fprintf_func) (info->stream, "@");
-+}
-+
-+static void
-+print_spr (CGEN_CPU_DESC cd,
-+ void * dis_info,
-+ CGEN_KEYWORD *names,
-+ long regno,
-+ unsigned int attrs)
-+{
-+ /* Use the register index format for any unnamed registers. */
-+ if (cgen_keyword_lookup_value (names, regno) == NULL)
-+ {
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ (*info->fprintf_func) (info->stream, "spr[%ld]", regno);
-+ }
-+ else
-+ print_keyword (cd, dis_info, names, regno, attrs);
-+}
-+
-+static void
-+print_hi (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ (*info->fprintf_func) (info->stream, value ? "0x%lx" : "hi(0x%lx)", value);
-+}
-+
-+static void
-+print_lo (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ if (value)
-+ (*info->fprintf_func) (info->stream, "0x%lx", value);
-+ else
-+ (*info->fprintf_func) (info->stream, "lo(0x%lx)", value);
-+}
-+
-+/* -- */
-diff -Nur binutils-2.24.orig/cgen/cpu/i960.cpu binutils-2.24/cgen/cpu/i960.cpu
---- binutils-2.24.orig/cgen/cpu/i960.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/i960.cpu 2016-06-30 21:26:12.617891712 +0200
-@@ -0,0 +1,1338 @@
-+; Intel 80960 CPU description. -*- Scheme -*-
-+; Copyright (C) 2000 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; Misc CGEN related problems.
-+
-+; ??? CGEN assumes that the program counter is called PC. On the i960, it
-+; is called IP (Instruction Pointer).
-+
-+; ??? Try using (f-m3 1) instead of M3_1.
-+
-+; ??? Try using the RESERVED attribute for instruction fields.
-+
-+(include "simplify.inc")
-+
-+
-+; Architecture and cpu family definitions.
-+
-+; ??? This should be using (insn-lsb0? #t), but it doesn't work yet.
-+
-+(define-arch
-+ (name i960)
-+ (comment "Intel 80960 architecture")
-+ (machs i960:ka_sa i960:ca)
-+ (isas i960)
-+)
-+
-+(define-isa
-+ (name i960)
-+ (base-insn-bitsize 32)
-+ (decode-assist (0 1 2 3 4 5 6 7))
-+ (liw-insns 1)
-+ (parallel-insns 1)
-+)
-+
-+(define-cpu
-+ (name i960base)
-+ (comment "Intel 80960 cpu family")
-+ (endian little)
-+ (word-bitsize 32)
-+)
-+
-+(define-mach
-+ (name i960:ka_sa)
-+ (comment "I960 KA and SA processors")
-+ (cpu i960base)
-+)
-+
-+; ??? Incomplete. Pipeline and unit info wrong.
-+
-+(define-model
-+ (name i960KA)
-+ (comment "I960 KA processor")
-+ (mach i960:ka_sa)
-+ (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
-+ (unit u-exec "Execution Unit" () 1 1
-+ () () () ())
-+)
-+
-+(define-mach
-+ (name i960:ca)
-+ (comment "I960 CA processor")
-+ (cpu i960base)
-+)
-+
-+; ??? Incomplete. Pipeline and unit info wrong.
-+
-+(define-model
-+ (name i960CA)
-+ (comment "I960 CA processor")
-+ (mach i960:ca)
-+ (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
-+ (unit u-exec "Execution Unit" () 1 1
-+ () () () ())
-+)
-+
-+; Instruction fields.
-+;
-+; Attributes:
-+; PCREL-ADDR: pc relative value (for reloc and disassembly purposes)
-+; ABS-ADDR: absolute address (for reloc and disassembly purposes?)
-+; RESERVED: bits are not used to decode insn, must be all 0
-+
-+; All of the fields for a REG format instruction.
-+
-+(dnf f-opcode "opcode" () 0 8)
-+(dnf f-srcdst "src/dst" () 8 5)
-+(dnf f-src2 "src2" () 13 5)
-+(dnf f-m3 "m3" () 18 1)
-+(dnf f-m2 "m2" () 19 1)
-+(dnf f-m1 "m1" () 20 1)
-+(dnf f-opcode2 "opcode2" () 21 4)
-+(dnf f-zero "zero" () 25 2)
-+(dnf f-src1 "src1" () 27 5)
-+
-+; Extra fields needed for a MEMA format instruction.
-+
-+(dnf f-abase "abase" () 13 5)
-+(dnf f-modea "modea" () 18 1)
-+(dnf f-zeroa "zeroa" () 19 1)
-+(dnf f-offset "offset" () 20 12)
-+
-+; Extra fields needed for a MEMB format instruction.
-+
-+(dnf f-modeb "modeb" () 18 4)
-+(dnf f-scale "scale" () 22 3)
-+(dnf f-zerob "zerob" () 25 2)
-+(dnf f-index "index" () 27 5)
-+(dnf f-optdisp "optional displacement" () 32 32)
-+
-+; Extra fields needed for a COBR format instruction.
-+
-+(dnf f-br-src1 "branch src1" () 8 5)
-+(dnf f-br-src2 "branch src2" () 13 5)
-+(dnf f-br-m1 "branch m1" () 18 1)
-+(df f-br-disp "branch displacement" (PCREL-ADDR) 19 11 INT
-+ ((value pc) (sra WI (sub WI value pc) (const 2)))
-+ ((value pc) (add WI (sll WI value (const 2)) pc)))
-+(dnf f-br-zero "branch zero" () 30 2)
-+
-+; Extra fields needed for a CRTL format instruction.
-+
-+(df f-ctrl-disp "ctrl branch disp" (PCREL-ADDR) 8 22 INT
-+ ((value pc) (sra WI (sub WI value pc) (const 2)))
-+ ((value pc) (add WI (sll WI value (const 2)) pc)))
-+(dnf f-ctrl-zero "ctrl branch zero" () 30 2)
-+
-+
-+; Enums.
-+
-+(define-pmacro (build-hex2 num) (.hex num 2))
-+
-+; insn-opcode
-+(define-normal-insn-enum insn-opcode "insn opcode enums" () OPCODE_ f-opcode
-+ (.map .upcase (.map build-hex2 (.iota 256))) ; "00" -> "FF"
-+)
-+
-+(define-normal-insn-enum insn-opcode2 "insn opcode2 enums" () OPCODE2_
-+ f-opcode2
-+ (.map .upcase (.map .hex (.iota 16))) ; "0" -> "F"
-+)
-+
-+(define-normal-insn-enum insn-m3 "insn m3 enums" () M3_
-+ f-m3
-+ ("0" "1")
-+)
-+
-+(define-normal-insn-enum insn-m2 "insn m3 enums" () M2_
-+ f-m2
-+ ("0" "1")
-+)
-+
-+(define-normal-insn-enum insn-m1 "insn m1 enums" () M1_
-+ f-m1
-+ ("0" "1")
-+)
-+
-+(define-normal-insn-enum insn-zero "insn zero enums" () ZERO_
-+ f-zero
-+ ("0")
-+)
-+
-+(define-normal-insn-enum insn-modea "insn mode a enums" () MODEA_
-+ f-modea
-+ ("OFFSET" "INDIRECT-OFFSET")
-+)
-+
-+(define-normal-insn-enum insn-zeroa "insn zero a enums" () ZEROA_
-+ f-zeroa
-+ ("0")
-+)
-+
-+(define-normal-insn-enum insn-modeb "insn mode b enums" () MODEB_
-+ f-modeb
-+ ("ILL0" "ILL1" "ILL2" "ILL3" "INDIRECT" "IP-DISP" "RES6" "INDIRECT-INDEX"
-+ "ILL8" "ILL9" "ILL10" "ILL11" "DISP" "INDIRECT-DISP" "INDEX-DISP"
-+ "INDIRECT-INDEX-DISP")
-+)
-+
-+(define-normal-insn-enum insn-zerob "insn zero b enums" () ZEROB_
-+ f-zerob
-+ ("0")
-+)
-+
-+(define-normal-insn-enum insn-br-m1 "insn branch m1 enums" () BR_M1_
-+ f-br-m1
-+ ("0" "1")
-+)
-+
-+(define-normal-insn-enum insn-br-zero "insn branch zero enums" () BR_ZERO_
-+ f-br-zero
-+ ("0")
-+)
-+
-+(define-normal-insn-enum insn-ctrl-zero "insn ctrl zero enums" () CTRL_ZERO_
-+ f-ctrl-zero
-+ ("0")
-+)
-+
-+
-+; Hardware pieces
-+
-+(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
-+
-+(define-hardware
-+ (name h-gr)
-+ (comment "general registers")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register WI (32))
-+ (indices keyword ""
-+ ((fp 31) (sp 1)
-+ (r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)
-+ (r8 8) (r9 9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14) (r15 15)
-+ (g0 16) (g1 17) (g2 18) (g3 19) (g4 20) (g5 21) (g6 22) (g7 23)
-+ (g8 24) (g9 25) (g10 26) (g11 27) (g12 28) (g13 29) (g14 30) (g15 31)
-+ ))
-+)
-+
-+; ??? This is actually part of the AC register.
-+
-+(define-hardware
-+ (name h-cc)
-+ (comment "condition code")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register WI)
-+ (indices keyword "" ((cc 0)))
-+)
-+
-+;(define-hardware
-+; (name h-pc)
-+; (comment "program counter")
-+; (attrs PC)
-+; (type register WI)
-+; ; (handlers (print "ip"))
-+;)
-+
-+; ??? Incomplete.
-+
-+
-+; Instruction Operands.
-+; These entries provide a layer between the assembler and the raw hardware
-+; description, and are used to refer to hardware elements in the semantic
-+; code. Usually there's a bit of over-specification, but in more complicated
-+; instruction sets there isn't.
-+
-+; Operand fields for a REG format instruction.
-+
-+(dnop src1 "source register 1" () h-gr f-src1)
-+(dnop src2 "source register 2" () h-gr f-src2)
-+(dnop dst "source/dest register" () h-gr f-srcdst)
-+
-+(dnop lit1 "literal 1" () h-uint f-src1)
-+(dnop lit2 "literal 2" () h-uint f-src2)
-+
-+; Operand fields for a MEMA format instruction.
-+
-+(dnop st_src "store src" () h-gr f-srcdst)
-+(dnop abase "abase" () h-gr f-abase)
-+(dnop offset "offset" () h-uint f-offset)
-+
-+; Operand fields for a MEMB format instruction.
-+
-+(dnop scale "scale" () h-uint f-scale)
-+(dnop indx "index" () h-gr f-index)
-+(dnop optdisp "optional displacement" () h-uint f-optdisp)
-+
-+; Operand fields for a COBR format instruction.
-+
-+(dnop br_src1 "branch src1" () h-gr f-br-src1)
-+(dnop br_src2 "branch src2" () h-gr f-br-src2)
-+(dnop br_disp "branch displacement" () h-iaddr f-br-disp)
-+
-+(dnop br_lit1 "branch literal 1" () h-uint f-br-src1)
-+
-+; Operand fields for a CRTL format instruction.
-+
-+(dnop ctrl_disp "ctrl branch disp" () h-iaddr f-ctrl-disp)
-+
-+
-+; Instruction definitions.
-+
-+; IDOC attribute for instruction documentation.
-+
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name IDOC)
-+ (comment "insn kind for documentation")
-+ (attrs META)
-+ (values
-+ (MEM - () "Memory")
-+ (ALU - () "ALU")
-+ (FPU - () "FPU")
-+ (BR - () "Branch")
-+ (PRIV - () "Priviledged")
-+ (MISC - () "Miscellaneous")
-+ )
-+)
-+
-+; ??? Maybe I should just reverse the operands in the alu-op macro.
-+
-+(define-pmacro (divo-expr expr1 expr2) (udiv expr2 expr1))
-+(define-pmacro (divi-expr expr1 expr2) (div expr2 expr1))
-+(define-pmacro (remo-expr expr1 expr2) (umod expr2 expr1))
-+(define-pmacro (remi-expr expr1 expr2) (mod expr2 expr1))
-+
-+(define-pmacro (sub-expr expr1 expr2) (sub expr2 expr1))
-+
-+(define-pmacro (notbit-expr expr1 expr2)
-+ (xor (sll (const 1) expr1) expr2))
-+(define-pmacro (andnot-expr expr1 expr2)
-+ (and expr2 (inv expr1)))
-+(define-pmacro (setbit-expr expr1 expr2)
-+ (or (sll (const 1) expr1) expr2))
-+(define-pmacro (notand-expr expr1 expr2)
-+ (and (inv expr2) expr1))
-+(define-pmacro (nor-expr expr1 expr2)
-+ (and (inv expr2) (inv expr1)))
-+(define-pmacro (xnor-expr expr1 expr2)
-+ (inv (xor expr1 expr2)))
-+(define-pmacro (not-expr expr1 expr2)
-+ (inv expr1))
-+(define-pmacro (ornot-expr expr1 expr2)
-+ (or expr2 (inv expr1)))
-+(define-pmacro (clrbit-expr expr1 expr2)
-+ (and (inv (sll (const 1) expr1)) expr2))
-+
-+; A shift of 32 or more shifts out all input bits.
-+
-+(define-pmacro (sll-expr expr1 expr2)
-+ (cond WI
-+ ((geu UWI expr1 (const 32)) (const 0))
-+ (else (sll expr2 expr1))))
-+(define-pmacro (srl-expr expr1 expr2)
-+ (cond WI
-+ ((geu UWI expr1 (const 32)) (const 0))
-+ (else (srl expr2 expr1))))
-+(define-pmacro (sra-expr expr1 expr2)
-+ (cond WI
-+ ((geu UWI expr1 (const 32)) (sra expr2 (const 31)))
-+ (else (sra expr2 expr1))))
-+
-+(define-pmacro (alu-op mnemonic opcode-op opcode2-op sem-op)
-+ (begin
-+ (dni mnemonic
-+ (.str mnemonic " reg/reg")
-+ ()
-+ (.str mnemonic " $src1, $src2, $dst")
-+ (+ opcode-op dst src2 M3_0 M2_0 M1_0 opcode2-op ZERO_0 src1)
-+ (set dst (sem-op src1 src2))
-+ ()
-+ )
-+ (dni (.sym mnemonic "1")
-+ (.str mnemonic " lit/reg")
-+ ()
-+ (.str mnemonic " $lit1, $src2, $dst")
-+ (+ opcode-op dst src2 M3_0 M2_0 M1_1 opcode2-op ZERO_0 lit1)
-+ (set dst (sem-op lit1 src2))
-+ ()
-+ )
-+ (dni (.sym mnemonic "2")
-+ (.str mnemonic " reg/lit")
-+ ()
-+ (.str mnemonic " $src1, $lit2, $dst")
-+ (+ opcode-op dst lit2 M3_0 M2_1 M1_0 opcode2-op ZERO_0 src1)
-+ (set dst (sem-op src1 lit2))
-+ ()
-+ )
-+ (dni (.sym mnemonic "3")
-+ (.str mnemonic " lit/lit")
-+ ()
-+ (.str mnemonic " $lit1, $lit2, $dst")
-+ (+ opcode-op dst lit2 M3_0 M2_1 M1_1 opcode2-op ZERO_0 lit1)
-+ (set dst (sem-op lit1 lit2))
-+ ()
-+ )
-+ )
-+)
-+
-+(alu-op mulo OPCODE_70 OPCODE2_1 mul)
-+(alu-op remo OPCODE_70 OPCODE2_8 remo-expr)
-+(alu-op divo OPCODE_70 OPCODE2_B divo-expr)
-+(alu-op remi OPCODE_74 OPCODE2_8 remi-expr)
-+(alu-op divi OPCODE_74 OPCODE2_B divi-expr)
-+
-+(alu-op addo OPCODE_59 OPCODE2_0 add)
-+(alu-op subo OPCODE_59 OPCODE2_2 sub-expr)
-+
-+(alu-op notbit OPCODE_58 OPCODE2_0 notbit-expr)
-+(alu-op and OPCODE_58 OPCODE2_1 and)
-+(alu-op andnot OPCODE_58 OPCODE2_2 andnot-expr)
-+(alu-op setbit OPCODE_58 OPCODE2_3 setbit-expr)
-+(alu-op notand OPCODE_58 OPCODE2_4 notand-expr)
-+(alu-op xor OPCODE_58 OPCODE2_6 xor)
-+(alu-op or OPCODE_58 OPCODE2_7 or)
-+(alu-op nor OPCODE_58 OPCODE2_8 nor-expr)
-+(alu-op xnor OPCODE_58 OPCODE2_9 xnor-expr)
-+(alu-op not OPCODE_58 OPCODE2_A not-expr)
-+(alu-op ornot OPCODE_58 OPCODE2_B ornot-expr)
-+(alu-op clrbit OPCODE_58 OPCODE2_C clrbit-expr)
-+
-+; ??? Incomplete. Does not handle overflow for integer shifts.
-+
-+(alu-op shlo OPCODE_59 OPCODE2_C sll-expr)
-+(alu-op shro OPCODE_59 OPCODE2_8 srl-expr)
-+(alu-op shli OPCODE_59 OPCODE2_E sll-expr)
-+(alu-op shri OPCODE_59 OPCODE2_B sra-expr)
-+
-+
-+; ??? Does not verify alignment of dest reg.
-+
-+(define-pmacro (emul-expr dest expr1 expr2)
-+ (sequence ((DI temp) (SI dregno))
-+ (set temp (mul DI (zext DI expr1) (zext DI expr2)))
-+ ; ??? Workaround cgen s-i-o-o bug.
-+ (set dregno (ifield f-srcdst))
-+ (set dest (trunc SI temp))
-+ (set (reg h-gr (add (index-of dest) (const 1)))
-+ (trunc SI (srl temp (const 32))))))
-+
-+; ??? Needless duplicate of alu-op. Should eliminate alu-op.
-+
-+(define-pmacro (alu2-op mnemonic opcode-op opcode2-op sem-op)
-+ (begin
-+ (dni mnemonic
-+ (.str mnemonic " reg/reg")
-+ ()
-+ (.str mnemonic " $src1, $src2, $dst")
-+ (+ opcode-op dst src2 M3_0 M2_0 M1_0 opcode2-op ZERO_0 src1)
-+ (sem-op dst src1 src2)
-+ ()
-+ )
-+ (dni (.sym mnemonic "1")
-+ (.str mnemonic " lit/reg")
-+ ()
-+ (.str mnemonic " $lit1, $src2, $dst")
-+ (+ opcode-op dst src2 M3_0 M2_0 M1_1 opcode2-op ZERO_0 lit1)
-+ (sem-op dst lit1 src2)
-+ ()
-+ )
-+ (dni (.sym mnemonic "2")
-+ (.str mnemonic " reg/lit")
-+ ()
-+ (.str mnemonic " $src1, $lit2, $dst")
-+ (+ opcode-op dst lit2 M3_0 M2_1 M1_0 opcode2-op ZERO_0 src1)
-+ (sem-op dst src1 lit2)
-+ ()
-+ )
-+ (dni (.sym mnemonic "3")
-+ (.str mnemonic " lit/lit")
-+ ()
-+ (.str mnemonic " $lit1, $lit2, $dst")
-+ (+ opcode-op dst lit2 M3_0 M2_1 M1_1 opcode2-op ZERO_0 lit1)
-+ (sem-op dst lit1 lit2)
-+ ()
-+ )
-+ )
-+)
-+
-+(alu2-op emul OPCODE_67 OPCODE2_0 emul-expr)
-+
-+
-+
-+; ??? lit2 must be zero.
-+; ??? should verify multi-word reg alignment.
-+
-+(define-pmacro (mov-expr expr1 expr2)
-+ (set expr1 expr2))
-+(define-pmacro (movl-expr expr1 expr2)
-+ (sequence ((SI dregno) (SI sregno))
-+ ; ??? Workaround cgen s-i-o-o bug.
-+ (set dregno (ifield f-srcdst))
-+ (set sregno (ifield f-src1))
-+ (set expr1 expr2)
-+ (set (reg h-gr (add (index-of expr1) (const 1)))
-+ (reg h-gr (add (index-of expr2) (const 1))))))
-+(define-pmacro (movllit-expr expr1 expr2)
-+ (sequence ((SI dregno))
-+ ; ??? Workaround cgen s-i-o-o bug.
-+ (set dregno (ifield f-srcdst))
-+ (set expr1 expr2)
-+ (set (reg h-gr (add (index-of expr1) (const 1)))
-+ (const 0))))
-+(define-pmacro (movt-expr expr1 expr2)
-+ (sequence ((SI dregno) (SI sregno))
-+ ; ??? Workaround cgen s-i-o-o bug.
-+ (set dregno (ifield f-srcdst))
-+ (set sregno (ifield f-src1))
-+ (set expr1 expr2)
-+ (set (reg h-gr (add (index-of expr1) (const 1)))
-+ (reg h-gr (add (index-of expr2) (const 1))))
-+ (set (reg h-gr (add (index-of expr1) (const 2)))
-+ (reg h-gr (add (index-of expr2) (const 2))))))
-+(define-pmacro (movtlit-expr expr1 expr2)
-+ (sequence ((SI dregno))
-+ ; ??? Workaround cgen s-i-o-o bug.
-+ (set dregno (ifield f-srcdst))
-+ (set expr1 expr2)
-+ (set (reg h-gr (add (index-of expr1) (const 1)))
-+ (const 0))
-+ (set (reg h-gr (add (index-of expr1) (const 2)))
-+ (const 0))))
-+(define-pmacro (movq-expr expr1 expr2)
-+ (sequence ((SI dregno) (SI sregno))
-+ ; ??? Workaround cgen s-i-o-o bug.
-+ (set dregno (ifield f-srcdst))
-+ (set sregno (ifield f-src1))
-+ (set expr1 expr2)
-+ (set (reg h-gr (add (index-of expr1) (const 1)))
-+ (reg h-gr (add (index-of expr2) (const 1))))
-+ (set (reg h-gr (add (index-of expr1) (const 2)))
-+ (reg h-gr (add (index-of expr2) (const 2))))
-+ (set (reg h-gr (add (index-of expr1) (const 3)))
-+ (reg h-gr (add (index-of expr2) (const 3))))))
-+(define-pmacro (movqlit-expr expr1 expr2)
-+ (sequence ((SI dregno))
-+ ; ??? Workaround cgen s-i-o-o bug.
-+ (set dregno (ifield f-srcdst))
-+ (set expr1 expr2)
-+ (set (reg h-gr (add (index-of expr1) (const 1)))
-+ (const 0))
-+ (set (reg h-gr (add (index-of expr1) (const 2)))
-+ (const 0))
-+ (set (reg h-gr (add (index-of expr1) (const 3)))
-+ (const 0))))
-+
-+(define-pmacro (move-op mnemonic opcode-op opcode2-op sem-op semlit-op)
-+ (begin
-+ (dni mnemonic
-+ (.str mnemonic " reg")
-+ ()
-+ (.str mnemonic " $src1, $dst")
-+ (+ opcode-op dst lit2 M3_0 M2_1 M1_0 opcode2-op ZERO_0 src1)
-+ (sem-op dst src1)
-+ ()
-+ )
-+ (dni (.sym mnemonic "1")
-+ (.str mnemonic " lit")
-+ ()
-+ (.str mnemonic " $lit1, $dst")
-+ (+ opcode-op dst lit2 M3_0 M2_1 M1_1 opcode2-op ZERO_0 lit1)
-+ (semlit-op dst lit1)
-+ ()
-+ )
-+ )
-+)
-+
-+(move-op mov OPCODE_5C OPCODE2_C mov-expr mov-expr)
-+(move-op movl OPCODE_5D OPCODE2_C movl-expr movllit-expr)
-+(move-op movt OPCODE_5E OPCODE2_C movt-expr movtlit-expr)
-+(move-op movq OPCODE_5F OPCODE2_C movq-expr movqlit-expr)
-+
-+; ??? This is very incomplete. This does not handle src1 or src2 as literals.
-+; This doesn't implement any of the effects of the instruction.
-+(dni modpc "modpc"
-+ ()
-+ "modpc $src1, $src2, $dst"
-+ (+ OPCODE_65 dst src1 M3_0 M2_0 M1_0 OPCODE2_5 ZERO_0 src2)
-+ (set dst src2)
-+ ()
-+)
-+
-+; ??? This is very incomplete. This does not handle src1 or src2 as literals.
-+; This doesn't implement any of the effects of the instruction.
-+(dni modac "modac"
-+ ()
-+ "modac $src1, $src2, $dst"
-+ (+ OPCODE_64 dst src1 M3_0 M2_0 M1_0 OPCODE2_5 ZERO_0 src2)
-+ (set dst src2)
-+ ()
-+)
-+
-+; ??? Incomplete. Only handles 8 of the 10 addressing modes.
-+; Does not handle sign/zero extend operations. Does not handle
-+; different modes.
-+
-+; ??? should verify multi-word reg alignment.
-+
-+; ??? index-index scale disasssembles wrong
-+
-+; ??? See also the store-op macro below.
-+
-+(define-pmacro (lda-expr expr1 expr2)
-+ (set expr1 expr2))
-+
-+(define-pmacro (ld-expr expr1 expr2)
-+ (set expr1 (mem WI expr2)))
-+(define-pmacro (ldob-expr expr1 expr2)
-+ (set expr1 (mem UQI expr2)))
-+(define-pmacro (ldos-expr expr1 expr2)
-+ (set expr1 (mem UHI expr2)))
-+(define-pmacro (ldib-expr expr1 expr2)
-+ (set expr1 (mem QI expr2)))
-+(define-pmacro (ldis-expr expr1 expr2)
-+ (set expr1 (mem HI expr2)))
-+(define-pmacro (ldl-expr expr1 expr2)
-+ (sequence ((WI temp) (SI dregno))
-+ ; ??? Workaround cgen s-i-o-o bug.
-+ (set dregno (ifield f-srcdst))
-+ (set temp expr2)
-+ (set expr1 (mem WI temp))
-+ (set (reg h-gr (add (index-of expr1) (const 1)))
-+ (mem WI (add temp (const 4))))))
-+(define-pmacro (ldt-expr expr1 expr2)
-+ (sequence ((WI temp) (SI dregno))
-+ ; ??? Workaround cgen s-i-o-o bug.
-+ (set dregno (ifield f-srcdst))
-+ (set temp expr2)
-+ (set expr1 (mem WI temp))
-+ (set (reg h-gr (add (index-of expr1) (const 1)))
-+ (mem WI (add temp (const 4))))
-+ (set (reg h-gr (add (index-of expr1) (const 2)))
-+ (mem WI (add temp (const 8))))))
-+(define-pmacro (ldq-expr expr1 expr2)
-+ (sequence ((WI temp) (SI dregno))
-+ ; ??? Workaround cgen s-i-o-o bug.
-+ (set dregno (ifield f-srcdst))
-+ ; Evaluate the address first, for correctness, in case an address
-+ ; reg will be loaded into. Also, makes the simulator faster.
-+ (set temp expr2)
-+ (set expr1 (mem WI temp))
-+ (set (reg h-gr (add (index-of expr1) (const 1)))
-+ (mem WI (add temp (const 4))))
-+ (set (reg h-gr (add (index-of expr1) (const 2)))
-+ (mem WI (add temp (const 8))))
-+ (set (reg h-gr (add (index-of expr1) (const 3)))
-+ (mem WI (add temp (const 12))))))
-+
-+(define-pmacro (load-op suffix opcode-op sem-op)
-+ (begin
-+ (dni (.sym ld suffix -offset) (.str "ld" suffix "-offset")
-+ ()
-+ (.str "ld" suffix " $offset, $dst")
-+ (+ opcode-op dst abase MODEA_OFFSET ZEROA_0 offset)
-+ (sem-op dst offset)
-+ ()
-+ )
-+ (dni (.sym ld suffix -indirect-offset)
-+ (.str "ld" suffix "-indirect-offset")
-+ ()
-+ (.str "ld" suffix " $offset($abase), $dst")
-+ (+ opcode-op dst abase MODEA_INDIRECT-OFFSET ZEROA_0 offset)
-+ (sem-op dst (add offset abase))
-+ ()
-+ )
-+ (dni (.sym ld suffix -indirect) (.str "ld" suffix "-indirect")
-+ ()
-+ (.str "ld" suffix " ($abase), $dst")
-+ (+ opcode-op dst abase MODEB_INDIRECT scale ZEROB_0 indx)
-+ (sem-op dst abase)
-+ ()
-+ )
-+ (dni (.sym ld suffix -indirect-index) (.str "ld" suffix "-indirect-index")
-+ ()
-+ (.str "ld" suffix " ($abase)[$indx*S$scale], $dst")
-+ (+ opcode-op dst abase MODEB_INDIRECT-INDEX scale ZEROB_0 indx)
-+ (sem-op dst (add abase (mul indx (sll (const 1) scale))))
-+ ()
-+ )
-+ (dni (.sym ld suffix -disp) (.str "ld" suffix "-disp")
-+ ()
-+ (.str "ld" suffix " $optdisp, $dst")
-+ (+ opcode-op dst abase MODEB_DISP scale ZEROB_0 indx optdisp)
-+ (sem-op dst optdisp)
-+ ()
-+ )
-+ (dni (.sym ld suffix -indirect-disp) (.str "ld" suffix "-indirect-disp")
-+ ()
-+ (.str "ld" suffix " $optdisp($abase), $dst")
-+ (+ opcode-op dst abase MODEB_INDIRECT-DISP scale ZEROB_0 indx optdisp)
-+ (sem-op dst (add optdisp abase))
-+ ()
-+ )
-+ (dni (.sym ld suffix -index-disp) (.str "ld" suffix "-index-disp")
-+ ()
-+ (.str "ld" suffix " $optdisp[$indx*S$scale], $dst")
-+ (+ opcode-op dst abase MODEB_INDEX-DISP scale ZEROB_0 indx optdisp)
-+ (sem-op dst (add optdisp (mul indx (sll (const 1) scale))))
-+ ()
-+ )
-+ (dni (.sym ld suffix -indirect-index-disp)
-+ (.str "ld" suffix "-indirect-index-disp")
-+ ()
-+ (.str "ld" suffix " $optdisp($abase)[$indx*S$scale], $dst")
-+ (+ opcode-op dst abase MODEB_INDIRECT-INDEX-DISP scale ZEROB_0 indx optdisp)
-+ (sem-op dst (add optdisp (add abase
-+ (mul indx (sll (const 1) scale)))))
-+ ()
-+ )
-+ )
-+)
-+
-+(load-op "a" OPCODE_8C lda-expr)
-+
-+(load-op "" OPCODE_90 ld-expr)
-+(load-op "ob" OPCODE_80 ldob-expr)
-+(load-op "os" OPCODE_88 ldos-expr)
-+(load-op "ib" OPCODE_C0 ldib-expr)
-+(load-op "is" OPCODE_C8 ldis-expr)
-+(load-op "l" OPCODE_98 ldl-expr)
-+(load-op "t" OPCODE_A0 ldt-expr)
-+(load-op "q" OPCODE_B0 ldq-expr)
-+
-+; ??? Incomplete. This is a near duplicate of the above load-op macro.
-+
-+; ??? For efficiency, should eval the address only once. See the load patterns
-+; above.
-+
-+(define-pmacro (st-expr expr1 expr2)
-+ (set (mem WI expr1) expr2))
-+(define-pmacro (stob-expr expr1 expr2)
-+ (set (mem QI expr1) expr2))
-+(define-pmacro (stos-expr expr1 expr2)
-+ (set (mem HI expr1) expr2))
-+(define-pmacro (stl-expr expr1 expr2)
-+ (sequence ((SI sregno))
-+ ; ??? Workaround cgen s-i-o-o bug.
-+ (set sregno (ifield f-srcdst))
-+ (set (mem WI expr1) expr2)
-+ (set (mem WI (add expr1 (const 4)))
-+ (reg h-gr (add (index-of expr2) (const 1))))))
-+(define-pmacro (stt-expr expr1 expr2)
-+ (sequence ((SI sregno))
-+ ; ??? Workaround cgen s-i-o-o bug.
-+ (set sregno (ifield f-srcdst))
-+ (set (mem WI expr1) expr2)
-+ (set (mem WI (add expr1 (const 4)))
-+ (reg h-gr (add (index-of expr2) (const 1))))
-+ (set (mem WI (add expr1 (const 8)))
-+ (reg h-gr (add (index-of expr2) (const 2))))))
-+(define-pmacro (stq-expr expr1 expr2)
-+ (sequence ((SI sregno))
-+ ; ??? Workaround cgen s-i-o-o bug.
-+ (set sregno (ifield f-srcdst))
-+ (set (mem WI expr1) expr2)
-+ (set (mem WI (add expr1 (const 4)))
-+ (reg h-gr (add (index-of expr2) (const 1))))
-+ (set (mem WI (add expr1 (const 8)))
-+ (reg h-gr (add (index-of expr2) (const 2))))
-+ (set (mem WI (add expr1 (const 12)))
-+ (reg h-gr (add (index-of expr2) (const 3))))))
-+
-+(define-pmacro (store-op suffix opcode-op sem-op)
-+ (begin
-+ (dni (.sym st suffix -offset) (.str "st" suffix "-offset")
-+ ()
-+ (.str "st" suffix " $st_src, $offset")
-+ (+ opcode-op st_src abase MODEA_OFFSET ZEROA_0 offset)
-+ (sem-op offset st_src)
-+ ()
-+ )
-+ (dni (.sym st suffix -indirect-offset)
-+ (.str "st" suffix "-indirect-offset")
-+ ()
-+ (.str "st" suffix " $st_src, $offset($abase)")
-+ (+ opcode-op st_src abase MODEA_INDIRECT-OFFSET ZEROA_0 offset)
-+ (sem-op (add offset abase) st_src)
-+ ()
-+ )
-+ (dni (.sym st suffix -indirect) (.str "st" suffix "-indirect")
-+ ()
-+ (.str "st" suffix " $st_src, ($abase)")
-+ (+ opcode-op st_src abase MODEB_INDIRECT scale ZEROB_0 indx)
-+ (sem-op abase st_src)
-+ ()
-+ )
-+ (dni (.sym st suffix -indirect-index) (.str "st" suffix "-indirect-index")
-+ ()
-+ (.str "st" suffix " $st_src, ($abase)[$indx*S$scale]")
-+ (+ opcode-op st_src abase MODEB_INDIRECT-INDEX scale ZEROB_0 indx)
-+ (sem-op (add abase (mul indx (sll (const 1) scale))) st_src)
-+ ()
-+ )
-+ (dni (.sym st suffix -disp) (.str "st" suffix "-disp")
-+ ()
-+ (.str "st" suffix " $st_src, $optdisp")
-+ (+ opcode-op st_src abase MODEB_DISP scale ZEROB_0 indx optdisp)
-+ (sem-op optdisp st_src)
-+ ()
-+ )
-+ (dni (.sym st suffix -indirect-disp) (.str "st" suffix "-indirect-disp")
-+ ()
-+ (.str "st" suffix " $st_src, $optdisp($abase)")
-+ (+ opcode-op st_src abase MODEB_INDIRECT-DISP scale ZEROB_0 indx optdisp)
-+ (sem-op (add optdisp abase) st_src)
-+ ()
-+ )
-+ (dni (.sym st suffix -index-disp) (.str "st" suffix "-index-disp")
-+ ()
-+ (.str "st" suffix " $st_src, $optdisp[$indx*S$scale")
-+ (+ opcode-op st_src abase MODEB_INDEX-DISP scale ZEROB_0 indx optdisp)
-+ (sem-op (add optdisp (mul indx (sll (const 1) scale))) st_src)
-+ ()
-+ )
-+ (dni (.sym st suffix -indirect-index-disp)
-+ (.str "st" suffix "-indirect-index-disp")
-+ ()
-+ (.str "st" suffix " $st_src, $optdisp($abase)[$indx*S$scale]")
-+ (+ opcode-op st_src abase MODEB_INDIRECT-INDEX-DISP scale ZEROB_0 indx optdisp)
-+ (sem-op (add optdisp (add abase (mul indx (sll (const 1) scale))))
-+ st_src)
-+ ()
-+ )
-+ )
-+)
-+
-+(store-op "" OPCODE_92 st-expr)
-+(store-op "ob" OPCODE_82 stob-expr)
-+(store-op "os" OPCODE_8A stos-expr)
-+(store-op "l" OPCODE_9A stl-expr)
-+(store-op "t" OPCODE_A2 stt-expr)
-+(store-op "q" OPCODE_B2 stq-expr)
-+
-+; ??? Incomplete, does not set condition code register.
-+
-+; ??? Without these functions, I end up with a call to the undefined
-+; function EQUSI, because br_lit1 is an unsigned field. Should be a better
-+; way to solve this.
-+
-+(define-pmacro (eq-expr expr1 expr2) (eq WI expr1 expr2))
-+(define-pmacro (ne-expr expr1 expr2) (ne WI expr1 expr2))
-+(define-pmacro (ltu-expr expr1 expr2) (ltu UWI expr1 expr2))
-+(define-pmacro (leu-expr expr1 expr2) (leu UWI expr1 expr2))
-+(define-pmacro (gtu-expr expr1 expr2) (gtu UWI expr1 expr2))
-+(define-pmacro (geu-expr expr1 expr2) (geu UWI expr1 expr2))
-+(define-pmacro (lt-expr expr1 expr2) (lt WI expr1 expr2))
-+(define-pmacro (le-expr expr1 expr2) (le WI expr1 expr2))
-+(define-pmacro (gt-expr expr1 expr2) (gt WI expr1 expr2))
-+(define-pmacro (ge-expr expr1 expr2) (ge WI expr1 expr2))
-+
-+; ??? Does not handle shifts greater than 32 correctly.
-+
-+(define-pmacro (bbc-expr expr1 expr2)
-+ (eq WI (and (sll (const 1) expr1) expr2) (const 0)))
-+(define-pmacro (bbs-expr expr1 expr2)
-+ (ne WI (and (sll (const 1) expr1) expr2) (const 0)))
-+
-+(define-pmacro (cmp-op mnemonic opcode-op sem-op)
-+ (begin
-+ (dni (.sym mnemonic -reg)
-+ (.str mnemonic " reg")
-+ ()
-+ (.str mnemonic " $br_src1, $br_src2, $br_disp")
-+ (+ opcode-op br_src1 br_src2 BR_M1_0 br_disp BR_ZERO_0)
-+ (if (sem-op br_src1 br_src2) (set pc br_disp))
-+ ()
-+ )
-+ (dni (.sym mnemonic -lit)
-+ (.str mnemonic " lit")
-+ ()
-+ (.str mnemonic " $br_lit1, $br_src2, $br_disp")
-+ (+ opcode-op br_lit1 br_src2 BR_M1_1 br_disp BR_ZERO_0)
-+ (if (sem-op br_lit1 br_src2) (set pc br_disp))
-+ ()
-+ )
-+ )
-+)
-+
-+(cmp-op "cmpobe" OPCODE_32 eq-expr)
-+(cmp-op "cmpobne" OPCODE_35 ne-expr)
-+(cmp-op "cmpobl" OPCODE_34 ltu-expr)
-+(cmp-op "cmpoble" OPCODE_36 leu-expr)
-+(cmp-op "cmpobg" OPCODE_31 gtu-expr)
-+(cmp-op "cmpobge" OPCODE_33 geu-expr)
-+
-+(cmp-op "cmpibe" OPCODE_3A eq-expr)
-+(cmp-op "cmpibne" OPCODE_3D ne-expr)
-+(cmp-op "cmpibl" OPCODE_3C lt-expr)
-+(cmp-op "cmpible" OPCODE_3E le-expr)
-+(cmp-op "cmpibg" OPCODE_39 gt-expr)
-+(cmp-op "cmpibge" OPCODE_3B ge-expr)
-+
-+(cmp-op "bbc" OPCODE_30 bbc-expr)
-+(cmp-op "bbs" OPCODE_37 bbs-expr)
-+
-+; ??? This is a near copy of alu-op, but without the dst field.
-+; ??? Should create fake operands instead of using h-cc.
-+; ??? M3 can be either 0 or 1. We only handle a value of 1 here.
-+
-+; ??? The else clause if not optional.
-+
-+(define-pmacro (cmpi-expr expr1 expr2)
-+ (cond WI
-+ ((lt WI expr1 expr2) (const 4))
-+ ((eq WI expr1 expr2) (const 2))
-+ ; gt: WI
-+ (else (const 1))))
-+(define-pmacro (cmpo-expr expr1 expr2)
-+ (cond WI
-+ ((ltu UWI expr1 expr2) (const 4))
-+ ((eq WI expr1 expr2) (const 2))
-+ ; gtu: UWI
-+ (else (const 1))))
-+
-+(define-pmacro (cc-op mnemonic opcode-op opcode2-op sem-op)
-+ (begin
-+ (dni mnemonic
-+ (.str mnemonic " reg/reg")
-+ ()
-+ (.str mnemonic " $src1, $src2")
-+ (+ opcode-op dst src2 M3_1 M2_0 M1_0 opcode2-op ZERO_0 src1)
-+ (set (reg h-cc 0) (sem-op src1 src2))
-+ ()
-+ )
-+ (dni (.sym mnemonic "1")
-+ (.str mnemonic " lit/reg")
-+ ()
-+ (.str mnemonic " $lit1, $src2")
-+ (+ opcode-op dst src2 M3_1 M2_0 M1_1 opcode2-op ZERO_0 lit1)
-+ (set (reg h-cc 0) (sem-op lit1 src2))
-+ ()
-+ )
-+ (dni (.sym mnemonic "2")
-+ (.str mnemonic " reg/lit")
-+ ()
-+ (.str mnemonic " $src1, $lit2")
-+ (+ opcode-op dst lit2 M3_1 M2_1 M1_0 opcode2-op ZERO_0 src1)
-+ (set (reg h-cc 0) (sem-op src1 lit2))
-+ ()
-+ )
-+ (dni (.sym mnemonic "3")
-+ (.str mnemonic " lit/lit")
-+ ()
-+ (.str mnemonic " $lit1, $lit2")
-+ (+ opcode-op dst lit2 M3_1 M2_1 M1_1 opcode2-op ZERO_0 lit1)
-+ (set (reg h-cc 0) (sem-op lit1 lit2))
-+ ()
-+ )
-+ )
-+)
-+
-+(cc-op "cmpi" OPCODE_5A OPCODE2_1 cmpi-expr)
-+(cc-op "cmpo" OPCODE_5A OPCODE2_0 cmpo-expr)
-+
-+; ??? The M1 field should be ignored.
-+
-+(define-pmacro (testno-expr)
-+ (eq WI (reg h-cc 0) (const 0)))
-+(define-pmacro (testg-expr)
-+ (ne WI (and (reg h-cc 0) (const 1)) (const 0)))
-+(define-pmacro (teste-expr)
-+ (ne WI (and (reg h-cc 0) (const 2)) (const 0)))
-+(define-pmacro (testge-expr)
-+ (ne WI (and (reg h-cc 0) (const 3)) (const 0)))
-+(define-pmacro (testl-expr)
-+ (ne WI (and (reg h-cc 0) (const 4)) (const 0)))
-+(define-pmacro (testne-expr)
-+ (ne WI (and (reg h-cc 0) (const 5)) (const 0)))
-+(define-pmacro (testle-expr)
-+ (ne WI (and (reg h-cc 0) (const 6)) (const 0)))
-+(define-pmacro (testo-expr)
-+ (ne WI (and (reg h-cc 0) (const 7)) (const 0)))
-+
-+
-+(define-pmacro (test-op mnemonic opcode-op sem-op)
-+ (dni (.sym mnemonic -reg)
-+ (.str mnemonic " reg")
-+ ()
-+ (.str mnemonic " $br_src1")
-+ (+ opcode-op br_src1 br_src2 BR_M1_0 br_disp BR_ZERO_0)
-+ (set br_src1 (sem-op))
-+ ()
-+ )
-+)
-+
-+(test-op "testno" OPCODE_20 testno-expr)
-+(test-op "testg" OPCODE_21 testg-expr)
-+(test-op "teste" OPCODE_22 teste-expr)
-+(test-op "testge" OPCODE_23 testge-expr)
-+(test-op "testl" OPCODE_24 testl-expr)
-+(test-op "testne" OPCODE_25 testne-expr)
-+(test-op "testle" OPCODE_26 testle-expr)
-+(test-op "testo" OPCODE_27 testo-expr)
-+
-+(define-pmacro (branch-op mnemonic opcode-op sem-op)
-+ (dni (.sym mnemonic) (.str mnemonic)
-+ ()
-+ (.str mnemonic " $ctrl_disp")
-+ (+ opcode-op ctrl_disp CTRL_ZERO_0)
-+ (if (sem-op) (set pc ctrl_disp))
-+ ()
-+ )
-+)
-+
-+(branch-op "bno" OPCODE_10 testno-expr)
-+(branch-op "bg" OPCODE_11 testg-expr)
-+(branch-op "be" OPCODE_12 teste-expr)
-+(branch-op "bge" OPCODE_13 testge-expr)
-+(branch-op "bl" OPCODE_14 testl-expr)
-+(branch-op "bne" OPCODE_15 testne-expr)
-+(branch-op "ble" OPCODE_16 testle-expr)
-+(branch-op "bo" OPCODE_17 testo-expr)
-+
-+(dni b "b"
-+ ()
-+ "b $ctrl_disp"
-+ (+ OPCODE_08 ctrl_disp CTRL_ZERO_0)
-+ (set pc ctrl_disp)
-+ ()
-+)
-+
-+; ??? Incomplete. Only handles 5 of 10 addressing modes.
-+; Should be a macro.
-+
-+(dni bx-indirect-offset "bx-indirect-offset"
-+ ()
-+ "bx $offset($abase)"
-+ (+ OPCODE_84 dst abase MODEA_INDIRECT-OFFSET ZEROA_0 offset)
-+ (set pc (add offset abase))
-+ ()
-+)
-+
-+(dni bx-indirect "bx-indirect"
-+ ()
-+ "bx ($abase)"
-+ (+ OPCODE_84 dst abase MODEB_INDIRECT scale ZEROB_0 indx)
-+ (set pc abase)
-+ ()
-+)
-+
-+(dni bx-indirect-index "bx-indirect-index"
-+ ()
-+ "bx ($abase)[$indx*S$scale]"
-+ (+ OPCODE_84 dst abase MODEB_INDIRECT-INDEX scale ZEROB_0 indx)
-+ (set pc (add abase (mul indx (sll (const 1) scale))))
-+ ()
-+)
-+
-+(dni bx-disp "bx-disp"
-+ ()
-+ "bx $optdisp"
-+ (+ OPCODE_84 dst abase MODEB_DISP scale ZEROB_0 indx optdisp)
-+ (set pc optdisp)
-+ ()
-+)
-+
-+(dni bx-indirect-disp "bx-indirect-disp"
-+ ()
-+ "bx $optdisp($abase)"
-+ (+ OPCODE_84 dst abase MODEB_INDIRECT-DISP scale ZEROB_0 indx optdisp)
-+ (set pc (add optdisp abase))
-+ ()
-+)
-+
-+; ??? Incomplete. Only handles 3 of 10 addressing modes. Only handles
-+; one local register set.
-+
-+; ??? If we don't want all of the set-quiet calls, then we need to increase
-+; SIZE_TRACE_BUF in sim/common/cgen-trace.c.
-+
-+(dni callx-disp "callx-disp"
-+ ()
-+ "callx $optdisp"
-+ (+ OPCODE_86 dst abase MODEB_DISP scale ZEROB_0 indx optdisp)
-+ (sequence ((WI temp))
-+ (set temp (and (add (reg h-gr 1) (const 63)) (inv (const 63))))
-+ ; ??? This doesn't seem right. Why do I have to add 8?.
-+ (set (reg h-gr 2) (add pc (const 8)))
-+ ; Save current local reg set on stack.
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 0)))
-+ (reg h-gr 0))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 4)))
-+ (reg h-gr 1))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 8)))
-+ (reg h-gr 2))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 12)))
-+ (reg h-gr 3))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 16)))
-+ (reg h-gr 4))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 20)))
-+ (reg h-gr 5))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 24)))
-+ (reg h-gr 6))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 28)))
-+ (reg h-gr 7))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 32)))
-+ (reg h-gr 8))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 36)))
-+ (reg h-gr 9))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 40)))
-+ (reg h-gr 10))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 44)))
-+ (reg h-gr 11))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 48)))
-+ (reg h-gr 12))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 52)))
-+ (reg h-gr 13))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 56)))
-+ (reg h-gr 14))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 60)))
-+ (reg h-gr 15))
-+ (set pc optdisp)
-+ ; Allocate new local reg set.
-+ (set-quiet (reg h-gr 0) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 1) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 2) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 3) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 4) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 5) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 6) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 7) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 8) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 9) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 10) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 11) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 12) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 13) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 14) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 15) (const #xDEADBEEF))
-+ (set (reg h-gr 0) (reg h-gr 31))
-+ (set (reg h-gr 31) temp)
-+ (set (reg h-gr 1) (add temp (const 64))))
-+ ()
-+)
-+
-+; ??? This should be macro-ized somehow.
-+
-+; ??? This adds 4 to pc. The above pattern adds 8.
-+
-+(dni callx-indirect "callx-indirect"
-+ ()
-+ "callx ($abase)"
-+ (+ OPCODE_86 dst abase MODEB_INDIRECT scale ZEROB_0 indx)
-+ (sequence ((WI temp))
-+ (set temp (and (add (reg h-gr 1) (const 63)) (inv (const 63))))
-+ ; ??? This doesn't seem right. Why do I have to add 4?.
-+ (set (reg h-gr 2) (add pc (const 4)))
-+ ; Save current local reg set on stack.
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 0)))
-+ (reg h-gr 0))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 4)))
-+ (reg h-gr 1))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 8)))
-+ (reg h-gr 2))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 12)))
-+ (reg h-gr 3))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 16)))
-+ (reg h-gr 4))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 20)))
-+ (reg h-gr 5))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 24)))
-+ (reg h-gr 6))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 28)))
-+ (reg h-gr 7))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 32)))
-+ (reg h-gr 8))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 36)))
-+ (reg h-gr 9))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 40)))
-+ (reg h-gr 10))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 44)))
-+ (reg h-gr 11))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 48)))
-+ (reg h-gr 12))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 52)))
-+ (reg h-gr 13))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 56)))
-+ (reg h-gr 14))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 60)))
-+ (reg h-gr 15))
-+ ; We do this first, because abase might be a local reg.
-+ (set pc abase)
-+ ; Allocate new local reg set.
-+ (set-quiet (reg h-gr 0) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 1) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 2) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 3) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 4) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 5) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 6) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 7) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 8) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 9) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 10) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 11) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 12) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 13) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 14) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 15) (const #xDEADBEEF))
-+ (set (reg h-gr 0) (reg h-gr 31))
-+ (set (reg h-gr 31) temp)
-+ (set (reg h-gr 1) (add temp (const 64))))
-+ ()
-+)
-+
-+; ??? This adds 4 to pc.
-+
-+; ??? This should be macro-ized somehow.
-+
-+(dni callx-indirect-offset "callx-indirect-offset"
-+ ()
-+ "callx $offset($abase)"
-+ (+ OPCODE_86 dst abase MODEA_INDIRECT-OFFSET ZEROA_0 offset)
-+ (sequence ((WI temp))
-+ (set temp (and (add (reg h-gr 1) (const 63)) (inv (const 63))))
-+ ; ??? This doesn't seem right. Why do I have to add 4?.
-+ (set (reg h-gr 2) (add pc (const 4)))
-+ ; Save current local reg set on stack.
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 0)))
-+ (reg h-gr 0))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 4)))
-+ (reg h-gr 1))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 8)))
-+ (reg h-gr 2))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 12)))
-+ (reg h-gr 3))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 16)))
-+ (reg h-gr 4))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 20)))
-+ (reg h-gr 5))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 24)))
-+ (reg h-gr 6))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 28)))
-+ (reg h-gr 7))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 32)))
-+ (reg h-gr 8))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 36)))
-+ (reg h-gr 9))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 40)))
-+ (reg h-gr 10))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 44)))
-+ (reg h-gr 11))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 48)))
-+ (reg h-gr 12))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 52)))
-+ (reg h-gr 13))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 56)))
-+ (reg h-gr 14))
-+ (set-quiet (mem WI (add (reg h-gr 31) (const 60)))
-+ (reg h-gr 15))
-+ ; We do this first, because abase might be a local reg.
-+ (set pc (add offset abase))
-+ ; Allocate new local reg set.
-+ (set-quiet (reg h-gr 0) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 1) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 2) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 3) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 4) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 5) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 6) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 7) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 8) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 9) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 10) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 11) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 12) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 13) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 14) (const #xDEADBEEF))
-+ (set-quiet (reg h-gr 15) (const #xDEADBEEF))
-+ (set (reg h-gr 0) (reg h-gr 31))
-+ (set (reg h-gr 31) temp)
-+ (set (reg h-gr 1) (add temp (const 64))))
-+ ()
-+)
-+
-+; ??? Incomplete. Does not handle return status in PFP.
-+
-+(dni ret "ret"
-+ ()
-+ "ret"
-+ (+ OPCODE_0A ctrl_disp CTRL_ZERO_0)
-+ (sequence ()
-+ (set (reg h-gr 31) (reg h-gr 0))
-+ (set-quiet (reg h-gr 0)
-+ (mem WI (add (reg h-gr 31) (const 0))))
-+ (set-quiet (reg h-gr 1)
-+ (mem WI (add (reg h-gr 31) (const 4))))
-+ (set-quiet (reg h-gr 2)
-+ (mem WI (add (reg h-gr 31) (const 8))))
-+ (set-quiet (reg h-gr 3)
-+ (mem WI (add (reg h-gr 31) (const 12))))
-+ (set-quiet (reg h-gr 4)
-+ (mem WI (add (reg h-gr 31) (const 16))))
-+ (set-quiet (reg h-gr 5)
-+ (mem WI (add (reg h-gr 31) (const 20))))
-+ (set-quiet (reg h-gr 6)
-+ (mem WI (add (reg h-gr 31) (const 24))))
-+ (set-quiet (reg h-gr 7)
-+ (mem WI (add (reg h-gr 31) (const 28))))
-+ (set-quiet (reg h-gr 8)
-+ (mem WI (add (reg h-gr 31) (const 32))))
-+ (set-quiet (reg h-gr 9)
-+ (mem WI (add (reg h-gr 31) (const 36))))
-+ (set-quiet (reg h-gr 10)
-+ (mem WI (add (reg h-gr 31) (const 40))))
-+ (set-quiet (reg h-gr 11)
-+ (mem WI (add (reg h-gr 31) (const 44))))
-+ (set-quiet (reg h-gr 12)
-+ (mem WI (add (reg h-gr 31) (const 48))))
-+ (set-quiet (reg h-gr 13)
-+ (mem WI (add (reg h-gr 31) (const 52))))
-+ (set-quiet (reg h-gr 14)
-+ (mem WI (add (reg h-gr 31) (const 56))))
-+ (set-quiet (reg h-gr 15)
-+ (mem WI (add (reg h-gr 31) (const 60))))
-+ (set pc (reg h-gr 2)))
-+ ()
-+)
-+
-+; ??? Incomplete, does not do any system operations.
-+
-+; ??? Should accept either reg or lit for src1.
-+
-+; ??? M3/M2 should not matter.
-+
-+(dni calls "calls"
-+ ()
-+ "calls $src1"
-+ (+ OPCODE_66 dst src2 M3_1 M2_1 M1_0 OPCODE2_0 ZERO_0 src1)
-+ (set WI pc (c-call WI "i960_trap" pc src1))
-+ ()
-+)
-+
-+; ??? Incomplete, does not do any system operations.
-+
-+; ??? M3/M2/M1 should not matter.
-+
-+(dni fmark "fmark"
-+ ()
-+ "fmark"
-+ (+ OPCODE_66 dst src2 M3_1 M2_1 M1_1 OPCODE2_C ZERO_0 src1)
-+ (set WI pc (c-call WI "i960_breakpoint" pc))
-+ ()
-+)
-+
-+; ??? Incomplete. This doesn't actually have to do anything, because we
-+; currently support only one set of local registers.
-+
-+; ??? The settings of the M1/2/3 bits shouldn't matter.
-+
-+(dni flushreg "flushreg"
-+ ()
-+ "flushreg"
-+ (+ OPCODE_66 dst src2 M3_1 M2_1 M1_1 OPCODE2_D ZERO_0 src1)
-+ (nop)
-+ ()
-+)
-diff -Nur binutils-2.24.orig/cgen/cpu/i960.opc binutils-2.24/cgen/cpu/i960.opc
---- binutils-2.24.orig/cgen/cpu/i960.opc 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/i960.opc 2016-06-30 21:26:12.617891712 +0200
-@@ -0,0 +1,31 @@
-+/* Intel 80960 opcode support. -*- C -*-
-+ Copyright (C) 2000, 2005 Red Hat, Inc.
-+ This file is part of CGEN. */
-+
-+/* This file is an addendum to i960.cpu. Heavy use of C code isn't
-+ appropriate in .cpu files, so it resides here. This especially applies
-+ to assembly/disassembly where parsing/printing can be quite involved.
-+ Such things aren't really part of the specification of the cpu, per se,
-+ so .cpu files provide the general framework and .opc files handle the
-+ nitty-gritty details as necessary.
-+
-+ Each section is delimited with start and end markers.
-+
-+ <arch>-opc.h additions use: "-- opc.h"
-+ <arch>-opc.c additions use: "-- opc.c"
-+ <arch>-asm.c additions use: "-- asm.c"
-+ <arch>-dis.c additions use: "-- dis.c"
-+ <arch>-ibd.h additions use: "-- ibd.h". */
-+
-+/* -- opc.h */
-+
-+#undef CGEN_DIS_HASH_SIZE
-+#define CGEN_DIS_HASH_SIZE 256
-+#undef CGEN_DIS_HASH
-+#define CGEN_DIS_HASH(buffer, value) ((unsigned char *) (buffer))[3]
-+
-+/* ??? Until cgen disassembler complete and functioning well, redirect back
-+ to old disassembler. */
-+#define CGEN_PRINT_INSN(od, pc, info) print_insn_i960_orig (pc, info)
-+
-+/* -- */
-diff -Nur binutils-2.24.orig/cgen/cpu/ia32.cpu binutils-2.24/cgen/cpu/ia32.cpu
---- binutils-2.24.orig/cgen/cpu/ia32.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/ia32.cpu 2016-06-30 21:26:12.617891712 +0200
-@@ -0,0 +1,917 @@
-+; Intel IA32 CPU description. -*- Scheme -*-
-+; Copyright (C) 2000 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+;
-+; References:
-+;
-+; Intel486 Processor Family, Programmer's Reference Manual, Intel
-+
-+(include "simplify.inc")
-+
-+; define-arch must appear first
-+
-+(define-arch
-+ (name ia32) ; name of cpu family
-+ (comment "Intel IA32 (x86)")
-+ (default-alignment unaligned)
-+ (insn-lsb0? #t)
-+ (machs i386 i486 pentium pentium-ii pentium-iii) ; ??? wip
-+ (isas ia32) ; ??? separate 8086 isa?
-+)
-+
-+; Attributes.
-+
-+; Instruction set parameters.
-+
-+(define-isa
-+ (name ia32)
-+
-+ (default-insn-bitsize 8)
-+
-+ ; Number of bytes of insn we can initially fetch.
-+ (base-insn-bitsize 8)
-+
-+ ; Used in computing bit numbers.
-+ (default-insn-word-bitsize 32)
-+
-+ ; Initial bitnumbers to decode insns by.
-+ (decode-assist (0 1 2 3 4 5 6 7))
-+)
-+
-+; Cpu family definitions.
-+
-+(define-cpu
-+ ; cpu names must be distinct from the architecture name and machine names.
-+ ; The "b" suffix stands for "base" and is the convention.
-+ ; The "f" suffix stands for "family" and is the convention.
-+ (name ia32bf)
-+ (comment "Intel x86 base family")
-+ (endian little)
-+ (word-bitsize 32)
-+)
-+
-+(define-mach
-+ (name pentium-ii)
-+ (comment "Pentium II")
-+ (cpu ia32bf)
-+)
-+
-+; Model descriptions.
-+
-+; The meaning of this value is wip but at the moment it's intended to describe
-+; the implementation (i.e. what -mtune=foo does in sparc gcc).
-+; ??? This is intended to be redesigned later.
-+
-+(define-model
-+ (name pentium-ii)
-+ (comment "Pentium II model")
-+ (mach pentium-ii)
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+; Instruction fields.
-+
-+; There currently doesn't exist shorthand macros for CISC ISA's,
-+; so define our own.
-+; DIF: define-ia32-field
-+; DNIF: define-normal-ia32-field
-+
-+(define-pmacro (dif x-name x-comment x-attrs x-word-offset x-word-length x-start x-length x-mode x-encode x-decode)
-+ (define-ifield
-+ (name x-name)
-+ (comment x-comment)
-+ (.splice attrs (.unsplice x-attrs))
-+ (word-offset x-word-offset)
-+ (word-length x-word-length)
-+ (start x-start)
-+ (length x-length)
-+ (mode x-mode)
-+ (encode x-encode)
-+ (decode x-decode)
-+ )
-+)
-+
-+(define-pmacro (dnif x-name x-comment x-attrs x-word-offset x-word-length x-start x-length)
-+ (dif x-name x-comment x-attrs x-word-offset x-word-length x-start x-length
-+ UINT #f #f)
-+)
-+
-+(dnif f-opcode "first insn byte" () 0 8 7 8)
-+
-+; The mod-r/m byte.
-+(dnif f-mod "mod field of mod-r/m byte" () 8 8 7 2)
-+(dnif f-reg/opcode "reg/opcode field of mod-r/m byte" () 8 8 5 3)
-+(dnif f-r/m "r/m field of mod-r/m byte" () 8 8 2 3)
-+(dsmf f-mod-r/m "entire mod-r/m byte" () (f-mod f-reg/opcode f-r/m))
-+
-+(dnif f-simm8 "signed 8 bit immediate" () 8 8 7 8)
-+(dnif f-simm16 "signed 16 bit immediate" () 8 16 15 16)
-+(dnif f-simm32 "signed 32 bit immediate" () 8 32 31 32)
-+
-+(dnif f-disp8 "signed 8 bit displacement" () 8 8 7 8)
-+(dnif f-disp16 "signed 16 bit displacement" () 8 16 15 16)
-+(dnif f-disp32 "signed 32 bit displacement" () 8 32 31 32)
-+
-+(dnif f-rel8 "signed 8 bit pc-relative displacement" (PCREL-ADDR) 8 8 7 8)
-+(dnif f-rel16 "signed 16 bit pc-relative displacement" (PCREL-ADDR) 8 16 15 16)
-+(dnif f-rel32 "signed 32 bit pc-relative displacement" (PCREL-ADDR) 8 32 31 32)
-+
-+; The sib byte.
-+(dnif f-sib-ss "sib scale size" () 16 8 7 2)
-+(dnif f-sib-base "sib base reg" () 16 8 5 3)
-+(dnif f-sib-index "sib index reg" () 16 8 2 3)
-+(dsmf f-sib "entire sib byte" () (f-sib-ss f-sib-base f-sib-index))
-+
-+; Enums.
-+
-+(define-pmacro (build-hex2 num) (.hex num 2))
-+
-+; insn-opcode
-+; "00" ... "FF"
-+(define-normal-insn-enum insn-opcode "insn opcode enums" () OP_ f-opcode
-+ (.map .upcase (.map build-hex2 (.iota 256)))
-+)
-+
-+; Hardware pieces.
-+; These entries list the elements of the raw hardware.
-+; They're also used to provide tables and other elements of the assembly
-+; language.
-+;
-+; ??? Sets of SP have extra-special semantics.
-+
-+(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
-+
-+(define-keyword
-+ (name gr8-names)
-+ (print-name h-gr8)
-+ (prefix "%")
-+ (values (al 0) (cl 1) (dl 2) (bl 3) (ah 4) (ch 5) (dh 6) (bh 7))
-+)
-+
-+(define-hardware
-+ (name h-gr8)
-+ (comment "8 bit general registers")
-+ (attrs VIRTUAL PROFILE)
-+ (type register QI (8))
-+ (indices extern-keyword gr8-names)
-+ (get (index)
-+ (if (lt index 4)
-+ (reg QI h-gr index)
-+ (bitfield (reg h-gr (sub index 4)) 15 8)))
-+ (set (index newval)
-+ (if (lt index 4)
-+ (set (bitfield (reg h-gr index) 7 8) newval)
-+ (set (bitfield (reg h-gr (sub index 4)) 15 8) newval)))
-+)
-+
-+(define-keyword
-+ (name gr16-names)
-+ (print-name h-gr16)
-+ (prefix "%")
-+ (values (ax 0) (cx 1) (dx 2) (bx 3) (sp 4) (bp 5) (si 6) (di 7))
-+)
-+
-+(define-hardware
-+ (name h-gr16)
-+ (comment "16 bit general registers")
-+ (attrs VIRTUAL PROFILE)
-+ (type register HI (8))
-+ (indices extern-keyword gr16-names)
-+ (get (index) (reg HI h-gr index))
-+ (set (index newval) (set (bitfield (reg h-gr index) 15 16) newval))
-+)
-+
-+(define-keyword
-+ (name gr-names)
-+ (print-name h-gr)
-+ (prefix "%")
-+ (values (eax 0) (ecx 1) (edx 2) (ebx 3) (esp 4) (ebp 5) (esi 6) (edi 7))
-+)
-+
-+(define-hardware
-+ (name h-gr)
-+ (comment "general registers")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register SI (8))
-+ (indices extern-keyword gr-names)
-+)
-+
-+(dsh h-cf "carry flag" () (register BI))
-+(dsh h-sf "sign flag" () (register BI))
-+(dsh h-of "overflow flag" () (register BI))
-+(dsh h-zf "zero flag" () (register BI))
-+
-+; Instruction Operands.
-+
-+; M32R specific operand attributes:
-+; - none yet
-+
-+; Some registers are refered to explicitly.
-+; ??? Might eventually be worth defining them all, but for now we just
-+; define the ones we need.
-+; ??? Another way to do this is to use pmacros.
-+
-+(dnop al "%al register" () h-gr8 0)
-+(dnop ax "%ax register" () h-gr16 0)
-+(dnop eax "%eax register" () h-gr 0)
-+
-+; Registers specified in the Reg/Opcode field of the r/m byte.
-+
-+(dnop reg8 "8 bit register" () h-gr8 f-reg/opcode)
-+(dnop reg16 "16 bit register" () h-gr16 f-reg/opcode)
-+(dnop reg32 "32 bit register" () h-gr f-reg/opcode)
-+
-+; Various numeric operands.
-+
-+(dnop simm8 "8 bit signed immediate" () h-sint f-simm8)
-+(dnop simm16 "16 bit signed immediate" () h-sint f-simm16)
-+(dnop simm32 "32 bit signed immediate" () h-sint f-simm32)
-+
-+(dnop disp8 "8 bit displacement" () h-sint f-disp8)
-+(dnop disp16 "16 bit displacement" () h-sint f-disp16)
-+(dnop disp32 "32 bit displacement" () h-sint f-disp32)
-+
-+(dnop rel8 "8 bit displacement" () h-iaddr f-rel8)
-+(dnop rel16 "16 bit displacement" () h-iaddr f-rel16)
-+(dnop rel32 "32 bit displacement" () h-iaddr f-rel32)
-+
-+; The condition code registers.
-+
-+(dnop cf "carry flag" () h-cf f-nil)
-+(dnop sf "sign flag" () h-sf f-nil)
-+(dnop of "overflow flag" () h-of f-nil)
-+(dnop zf "zero flag" () h-zf f-nil)
-+
-+; ModRM support.
-+
-+(dnop r/m-reg8 "8 bit register in r/m field" () h-gr8 f-r/m)
-+(dnop r/m-reg16 "16 bit register in r/m field" () h-gr16 f-r/m)
-+(dnop r/m-reg32 "32 bit register in r/m field" () h-gr f-r/m)
-+
-+(define-operand
-+ (name mod-r/m-base-reg)
-+ (comment "base register for mod-r/m addressing")
-+ (mode SI)
-+ (type h-gr)
-+ (index f-r/m)
-+)
-+
-+(define-operand
-+ (name sib-base)
-+ (comment "base register for sib addressing")
-+ (mode SI)
-+ (type h-gr)
-+ (index f-sib-base)
-+)
-+
-+(define-operand
-+ (name sib-index)
-+ (comment "index register for sib addressing")
-+ (mode SI)
-+ (type h-gr)
-+ (index f-sib-index)
-+)
-+
-+; The mod-r/m and sib ifields.
-+; These are composed of several ifields and specify a set of choices
-+; (addressing modes) to choose from.
-+
-+(define-pmacro (diff x-name x-comment x-attrs x-start x-length x-follows x-mode)
-+ "Define an ia32 ifield that follows another ifield."
-+ (define-ifield
-+ (name x-name)
-+ (comment x-comment)
-+ (.splice attrs (.unsplice x-attrs))
-+ (start x-start)
-+ (length x-length)
-+ (follows x-follows)
-+ (mode x-mode)
-+ )
-+)
-+
-+; These must be defined before they're used and it makes sense to define
-+; the operand with the ifield (rather than follow the usual convention of
-+; defining all ifields first - not that that convention is necessarily the
-+; best).
-+
-+(dnif f-disp8-@16 "signed 8 bit displacement at offset 16" () 16 8 7 8)
-+(dnop disp8-@16 "signed 8 bit displacement at offset 16" () h-sint f-disp8-@16)
-+
-+(dnif f-disp32-@16 "signed 32 bit displacement at offset 16" () 16 32 31 32)
-+(dnop disp32-@16 "signed 32 bit displacement at offset 16" () h-sint f-disp32-@16)
-+
-+(dnif f-disp32-@24 "signed 32 bit displacement at offset 24" () 24 32 31 32)
-+(dnop disp32-@24 "signed 32 bit displacement at offset 24" () h-sint f-disp32-@24)
-+
-+; The sib operand, used by the mod-r/m operand.
-+
-+(dndo base+index*1
-+ SI
-+ (sib-base sib-index)
-+ "${sib-base}+${sib-index}"
-+ f-sib
-+ (+ (f-sib-ss 0) sib-base sib-index)
-+ (andif (orif (ne f-mod 0)
-+ (ne f-sib-base 5))
-+ (ne f-sib-index 4))
-+ (add sib-base sib-index)
-+ () ; no setter
-+)
-+
-+(dndo base-1
-+ SI
-+ (sib-base)
-+ "${sib-base}"
-+ f-sib
-+ (+ (f-sib-ss 0) sib-base (f-sib-index 4))
-+ (orif (ne f-mod 0)
-+ (ne f-sib-base 5))
-+ sib-base
-+ () ; no setter
-+)
-+
-+(dndo index*1+disp32
-+ SI
-+ (sib-index disp32)
-+ "${disp32-@24}(${sib-index})"
-+ f-sib
-+ (+ (f-sib-ss 0) (f-sib-base 5) sib-index disp32-@24)
-+ (andif (eq f-mod 0)
-+ (ne f-sib-index 4))
-+ (add sib-index disp32-@24)
-+ () ; no setter
-+)
-+
-+(dndo disp32-1
-+ SI
-+ (disp32)
-+ "${disp32-@24}"
-+ f-sib
-+ (+ (f-sib-ss 0) (f-sib-base 5) (f-sib-index 4) disp32-@24)
-+ (eq f-mod 0)
-+ disp32-@24
-+ () ; no setter
-+)
-+
-+(dndo base+index*2
-+ SI
-+ (sib-base sib-index)
-+ "${sib-base}+${sib-index}*2"
-+ f-sib
-+ (+ (f-sib-ss 1) sib-base sib-index)
-+ (andif (orif (ne f-mod 0)
-+ (ne f-sib-base 5))
-+ (ne f-sib-index 4))
-+ (add sib-base (mul sib-index 2))
-+ () ; no setter
-+)
-+
-+(dndo base-2
-+ SI
-+ (sib-base)
-+ "${sib-base}"
-+ f-sib
-+ (+ (f-sib-ss 1) sib-base (f-sib-index 4))
-+ ()
-+ sib-base
-+ () ; no setter
-+)
-+
-+(dndo index*2+disp32
-+ SI
-+ (sib-index disp32)
-+ "${disp32-@24}(${sib-index})"
-+ f-sib
-+ (+ (f-sib-ss 1) (f-sib-base 5) sib-index disp32-@24)
-+ (andif (eq f-mod 0)
-+ (ne f-sib-index 4))
-+ (add (mul sib-index 2) disp32-@24)
-+ () ; no setter
-+)
-+
-+(dndo disp32-2
-+ SI
-+ (disp32)
-+ "${disp32-@24}"
-+ f-sib
-+ (+ (f-sib-ss 1) (f-sib-base 5) (f-sib-index 4) disp32-@24)
-+ (eq f-mod 0)
-+ disp32-@24
-+ () ; no setter
-+)
-+
-+(dndo base+index*4
-+ SI
-+ (sib-base sib-index)
-+ "${sib-base}+${sib-index}*4"
-+ f-sib
-+ (+ (f-sib-ss 2) sib-base sib-index)
-+ (andif (orif (ne f-mod 0)
-+ (ne f-sib-base 5))
-+ (ne f-sib-index 4))
-+ (add sib-base (mul sib-index 4))
-+ () ; no setter
-+)
-+
-+(dndo base-4
-+ SI
-+ (sib-base)
-+ "${sib-base}"
-+ f-sib
-+ (+ (f-sib-ss 2) sib-base (f-sib-index 4))
-+ ()
-+ sib-base
-+ () ; no setter
-+)
-+
-+(dndo index*4+disp32
-+ SI
-+ (sib-index disp32)
-+ "${disp32-@24}(${sib-index})"
-+ f-sib
-+ (+ (f-sib-ss 2) (f-sib-base 5) sib-index disp32-@24)
-+ (andif (eq f-mod 0)
-+ (ne f-sib-index 4))
-+ (add (mul sib-index 4) disp32-@24)
-+ () ; no setter
-+)
-+
-+(dndo disp32-4
-+ SI
-+ (disp32)
-+ "${disp32-@24}"
-+ f-sib
-+ (+ (f-sib-ss 2) (f-sib-base 5) (f-sib-index 4) disp32-@24)
-+ (eq f-mod 0)
-+ disp32-@24
-+ () ; no setter
-+)
-+
-+(dndo base+index*8
-+ SI
-+ (sib-base sib-index)
-+ "${sib-base}+${sib-index}*8"
-+ f-sib
-+ (+ (f-sib-ss 3) sib-base sib-index)
-+ (andif (orif (ne f-mod 0)
-+ (ne f-sib-base 5))
-+ (ne f-sib-index 4))
-+ (add sib-base (mul sib-index 8))
-+ () ; no setter
-+)
-+
-+(dndo base-8
-+ SI
-+ (sib-base)
-+ "${sib-base}"
-+ f-sib
-+ (+ (f-sib-ss 3) sib-base (f-sib-index 4))
-+ ()
-+ sib-base
-+ () ; no setter
-+)
-+
-+(dndo index*8+disp32
-+ SI
-+ (sib-index disp32)
-+ "${disp32-@24}(${sib-index})"
-+ f-sib
-+ (+ (f-sib-ss 3) (f-sib-base 5) sib-index disp32-@24)
-+ (andif (eq f-mod 0)
-+ (ne f-sib-index 4))
-+ (add (mul sib-index 8) disp32-@24)
-+ () ; no setter
-+)
-+
-+(dndo disp32-8
-+ SI
-+ (disp32)
-+ "${disp32-@24}"
-+ f-sib
-+ (+ (f-sib-ss 3) (f-sib-base 5) (f-sib-index 4) disp32-@24)
-+ (eq f-mod 0)
-+ disp32-@24
-+ () ; no setter
-+)
-+
-+; Now define an "anyof" operand that puts it all together.
-+
-+(define-anyof-operand
-+ (name sib)
-+ (comment "base + scaled-index + displacement")
-+ (mode SI)
-+ ; Each choice must have the same base-ifield.
-+ (choices base+index*1
-+ base-1
-+ index*1+disp32
-+ disp32-1
-+ base+index*2
-+ base-2
-+ index*2+disp32
-+ disp32-2
-+ base+index*4
-+ base-4
-+ index*4+disp32
-+ disp32-4
-+ base+index*8
-+ base-8
-+ index*8+disp32
-+ disp32-8
-+ )
-+)
-+
-+; Additional ifields/operands used by the mod-r/m byte.
-+; It seems cleaner to define the operand with its ifield so they are.
-+; Maybe the rest should be organized similarily.
-+; Also, the ones that "follow" other ifields must be defined after the latter
-+; has been defined.
-+
-+(diff f-disp8-follows-sib "disp8 ifield after sib ifields"
-+ () 7 8 sib INT
-+)
-+(dnop disp8-follows-sib "disp8 following sib"
-+ () h-sint f-disp8-follows-sib
-+)
-+
-+(diff f-disp32-follows-sib "disp32 ifield after sib ifields"
-+ () 31 32 sib INT
-+)
-+(dnop disp32-follows-sib "disp32 following sib"
-+ () h-sint f-disp32-follows-sib
-+)
-+
-+; The complete mod-r/m operand, used by instructions.
-+; ??? The [] bracketing is for clarity. Match actual assembler later.
-+; blah blah blah intel vs at&t blah blah blah
-+
-+(define-pmacro (define-mod-r/m-choices x-mode x-r/m-reg)
-+ (begin
-+ (dndo (.sym @reg- x-mode)
-+ x-mode
-+ (mod-r/m-base-reg)
-+ "[${mod-r/m-base-reg}]"
-+ f-mod-r/m
-+ (+ (f-mod 0) mod-r/m-base-reg)
-+ (andif (ne f-r/m 4) (ne f-r/m 5))
-+ (mem x-mode mod-r/m-base-reg)
-+ ()
-+ )
-+ (dndo (.sym @sib- x-mode)
-+ x-mode
-+ (sib)
-+ "[$sib]"
-+ f-mod-r/m
-+ (+ (f-mod 0) (f-r/m 4) sib)
-+ ()
-+ (mem x-mode sib)
-+ ()
-+ )
-+ (dndo (.sym @disp32- x-mode)
-+ x-mode
-+ (disp32-@16)
-+ "[${disp32-@16}]"
-+ f-mod-r/m
-+ (+ (f-mod 0) (f-r/m 5) disp32-@16)
-+ ()
-+ (mem x-mode disp32-@16)
-+ ()
-+ )
-+ (dndo (.sym @reg+disp8- x-mode)
-+ x-mode
-+ (mod-r/m-base-reg disp8)
-+ "[${disp8-@16}(${mod-r/m-base-reg})]"
-+ f-mod-r/m
-+ (+ (f-mod 1) mod-r/m-base-reg disp8-@16)
-+ (ne f-r/m 4)
-+ (mem x-mode (add mod-r/m-base-reg disp8-@16))
-+ ()
-+ )
-+ (dndo (.sym @sib+disp8- x-mode)
-+ x-mode
-+ (sib disp8-follows-sib)
-+ "[${disp8-follows-sib}($sib)]"
-+ f-mod-r/m
-+ (+ (f-mod 1) (f-r/m 4) sib disp8-follows-sib)
-+ ()
-+ (mem x-mode (add sib disp8-follows-sib))
-+ ()
-+ )
-+ (dndo (.sym @reg+disp32- x-mode)
-+ x-mode
-+ (mod-r/m-base-reg disp32)
-+ "[${disp32-@16}(${mod-r/m-base-reg})]"
-+ f-mod-r/m
-+ (+ (f-mod 2) mod-r/m-base-reg disp32-@16)
-+ (ne f-r/m 4)
-+ (mem x-mode (add mod-r/m-base-reg disp32-@16))
-+ ()
-+ )
-+ (dndo (.sym @sib+disp32- x-mode)
-+ x-mode
-+ (sib disp32-follows-sib)
-+ "[${disp32-follows-sib}($sib)]"
-+ f-mod-r/m
-+ (+ (f-mod 2) (f-r/m 4) sib disp32-follows-sib)
-+ ()
-+ (mem x-mode (add sib disp32-follows-sib))
-+ ()
-+ )
-+ (dndo (.sym reg- x-mode)
-+ x-mode
-+ (x-r/m-reg)
-+ (.str "${" x-r/m-reg "}")
-+ f-mod-r/m
-+ (+ (f-mod 3) x-r/m-reg)
-+ ()
-+ x-r/m-reg
-+ ()
-+ )
-+ )
-+)
-+
-+(define-pmacro (define-mod-r/m-operand x-name x-comment x-mode x-r/m-reg)
-+ (begin
-+ (define-mod-r/m-choices x-mode x-r/m-reg)
-+ (define-anyof-operand
-+ (name x-name)
-+ (comment x-comment)
-+ (mode x-mode)
-+ ; Each choice must have the same base-ifield.
-+ (choices (.sym @reg- x-mode)
-+ (.sym @sib- x-mode)
-+ (.sym @disp32- x-mode)
-+ (.sym @reg+disp8- x-mode)
-+ (.sym @sib+disp8- x-mode)
-+ (.sym @reg+disp32- x-mode)
-+ (.sym @sib+disp32- x-mode)
-+ (.sym reg- x-mode)
-+ ))
-+ )
-+)
-+
-+(define-mod-r/m-operand mod-r/m-8 "8 bit mod-r/m value" QI r/m-reg8)
-+(define-mod-r/m-operand mod-r/m-16 "16 bit mod-r/m value" HI r/m-reg16)
-+(define-mod-r/m-operand mod-r/m-32 "32 bit mod-r/m value" SI r/m-reg32)
-+
-+; Additional ifields/operands used by instructions.
-+; These "follow" the mod-r/m byte so must be defined afterwards.
-+
-+(diff f-simm8-follows-mod-r/m-8 "simm8 ifield after mod-r/m-8 ifields"
-+ () 7 8 mod-r/m-8 INT
-+)
-+(dnop simm8-follows-mod-r/m-8 "simm8 following mod-r/m-8"
-+ () h-sint f-simm8-follows-mod-r/m-8
-+)
-+
-+(diff f-simm16-follows-mod-r/m-16 "simm16 ifield after mod-r/m-16 ifields"
-+ () 15 16 mod-r/m-16 INT
-+)
-+(dnop simm16-follows-mod-r/m-16 "simm16 following mod-r/m-16"
-+ () h-sint f-simm16-follows-mod-r/m-16
-+)
-+
-+(diff f-simm32-follows-mod-r/m-32 "simm32 ifield after mod-r/m-32 ifields"
-+ () 31 32 mod-r/m-32 INT
-+)
-+(dnop simm32-follows-mod-r/m-32 "simm32 following mod-r/m-32"
-+ () h-sint f-simm32-follows-mod-r/m-32
-+)
-+
-+(diff f-simm8-follows-mod-r/m-16 "simm8 ifield after mod-r/m-16 ifields"
-+ () 7 8 mod-r/m-16 INT
-+)
-+(dnop simm8-follows-mod-r/m-16 "simm8 following mod-r/m-16"
-+ () h-sint f-simm8-follows-mod-r/m-16
-+)
-+
-+(diff f-simm8-follows-mod-r/m-32 "simm8 ifield after mod-r/m-32 ifields"
-+ () 7 8 mod-r/m-32 INT
-+)
-+(dnop simm8-follows-mod-r/m-32 "simm8 following mod-r/m-32"
-+ () h-sint f-simm8-follows-mod-r/m-32
-+)
-+
-+; Some subroutines, to simplify the semantic specs.
-+
-+(define-pmacro (define-arith-subr x-name x-mode x-fn x-set-cc-fn)
-+ (define-subr
-+ (name x-name)
-+ (mode VOID)
-+ (args ((x-mode dst) (x-mode src1) (x-mode src2)))
-+ (code (sequence ((x-mode arg1)
-+ (x-mode arg2)
-+ (x-mode result))
-+ (set arg1 src1)
-+ (set arg2 src2)
-+ (set result (x-fn arg1 arg2))
-+ (set dst result)
-+ (x-set-cc-fn result arg1 arg2)))
-+ )
-+)
-+
-+(define-arith-subr add-QI QI add set-add-cc)
-+(define-arith-subr add-HI HI add set-add-cc)
-+(define-arith-subr add-SI SI add set-add-cc)
-+
-+; Instruction definitions.
-+
-+; IA32 specific instruction attributes:
-+; - none yet
-+
-+(dni nop
-+ "nop"
-+ ()
-+ "nop"
-+ (+ OP_90)
-+ (nop)
-+ ()
-+)
-+
-+; Add, subtract.
-+;
-+; ??? Insn naming puts destination before addend. Ok?
-+
-+(dni add-al-simm8
-+ "add 8 bit signed immediate to %al"
-+ ()
-+ "FIXME"
-+ (+ OP_04 simm8)
-+ (sequence ()
-+ (set al (add al simm8))
-+ ; ??? condition codes
-+ )
-+ ()
-+)
-+
-+(dni add-ax-simm16
-+ "add 16 bit signed immediate to %ax"
-+ ()
-+ "FIXME"
-+ ; ??? Need something like ifield assertions to distinguish from
-+ ; 32 bit case.
-+ (+ OP_05 simm16)
-+ (sequence ()
-+ (set ax (add ax simm16))
-+ ; ??? condition codes
-+ )
-+ ()
-+)
-+
-+(dni add-eax-simm32
-+ "add 32 bit signed immediate to %eax"
-+ ()
-+ "FIXME"
-+ (+ OP_05 simm32)
-+ (sequence ()
-+ (set eax (add eax simm32))
-+ ; ??? condition codes
-+ )
-+ ()
-+)
-+
-+(dni add-r/m8-simm8
-+ "add 8 bit immediate"
-+ ()
-+ "FIXME"
-+ (+ OP_80 mod-r/m-8 simm8-follows-mod-r/m-8 (f-reg/opcode 0))
-+ (sequence ()
-+ (set mod-r/m-8 (add mod-r/m-8 simm8-follows-mod-r/m-8))
-+ ; ??? condition codes
-+ )
-+ ()
-+)
-+
-+(dni add-r/m16-simm16
-+ "add 16 bit immediate"
-+ ()
-+ "FIXME"
-+ ; ??? Need something akin to ifield-assertions to distinguish from
-+ ; 32 bit version.
-+ (+ OP_81 mod-r/m-16 simm16-follows-mod-r/m-16 (f-reg/opcode 0))
-+ (sequence ()
-+ (set mod-r/m-16 (add mod-r/m-16 simm16-follows-mod-r/m-16))
-+ ; ??? condition codes
-+ )
-+ ()
-+)
-+
-+(dni add-r/m32-simm32
-+ "add 32 bit immediate"
-+ ()
-+ "FIXME"
-+ (+ OP_81 mod-r/m-32 simm32-follows-mod-r/m-32 (f-reg/opcode 0))
-+ (sequence ()
-+ (set mod-r/m-32 (add mod-r/m-32 simm32-follows-mod-r/m-32))
-+ ; ??? condition codes
-+ )
-+ ()
-+)
-+
-+(dni add-r/m16-simm8
-+ "add 8 bit signed immediate to 16 bit value"
-+ ()
-+ "FIXME"
-+ ; ??? Need something akin to ifield-assertions to distinguish from
-+ ; 32 bit version.
-+ (+ OP_83 mod-r/m-16 simm8-follows-mod-r/m-16 (f-reg/opcode 0))
-+ (sequence ()
-+ (set mod-r/m-16 (add mod-r/m-16 (ext HI simm8-follows-mod-r/m-16)))
-+ ; ??? condition codes
-+ )
-+ ()
-+)
-+
-+(dni add-r/m32-simm8
-+ "add 8 bit signed immediate to 32 bit value"
-+ ()
-+ "FIXME"
-+ (+ OP_83 mod-r/m-32 simm8-follows-mod-r/m-32 (f-reg/opcode 0))
-+ (sequence ()
-+ (set mod-r/m-32 (add mod-r/m-32 (ext SI simm8-follows-mod-r/m-32)))
-+ ; ??? condition codes
-+ )
-+ ()
-+)
-+
-+(dni add-r/m8-reg8
-+ "add 8 bit reg to 8 bit r/m"
-+ ()
-+ "FIXME"
-+ (+ OP_00 mod-r/m-8 reg8)
-+ (sequence ()
-+ (set mod-r/m-8 (add mod-r/m-8 reg8))
-+ ; ??? condition codes
-+ )
-+ ()
-+)
-+
-+(dni add-r/m16-reg16
-+ "add 16 bit reg to 16 bit r/m"
-+ ()
-+ "FIXME"
-+ ; ??? Need something akin to ifield-assertions to distinguish from
-+ ; 32 bit version.
-+ (+ OP_01 mod-r/m-16 reg16)
-+ (sequence ()
-+ (set mod-r/m-16 (add mod-r/m-16 reg16))
-+ ; ??? condition codes
-+ )
-+ ()
-+)
-+
-+(dni add-r/m32-reg32
-+ "add 32 bit reg to 32 bit r/m"
-+ ()
-+ "FIXME"
-+ (+ OP_01 mod-r/m-32 reg32)
-+ (sequence ()
-+ (set mod-r/m-32 (add mod-r/m-32 reg32))
-+ ; ??? condition codes
-+ )
-+ ()
-+)
-+
-+(dni add-reg8-r/m8
-+ "add 8 bit r/m to 8 bit reg"
-+ ()
-+ "FIXME"
-+ (+ OP_02 mod-r/m-8 reg8)
-+ (sequence ()
-+ (set reg8 (add reg8 mod-r/m-8))
-+ ; ??? condition codes
-+ )
-+ ()
-+)
-+
-+(dni add-reg16-r/m16
-+ "add 16 bit r/m to 16 bit reg"
-+ ()
-+ "FIXME"
-+ ; ??? Need something akin to ifield-assertions to distinguish from
-+ ; 32 bit version.
-+ (+ OP_03 mod-r/m-16 reg16)
-+ (sequence ()
-+ (set reg16 (add reg16 mod-r/m-16))
-+ ; ??? condition codes
-+ )
-+ ()
-+)
-+
-+(dni add-reg32-r/m32
-+ "add 32 bit r/m to 32 bit reg"
-+ ()
-+ "FIXME"
-+ (+ OP_03 mod-r/m-32 reg32)
-+ (sequence ()
-+ (set reg32 (add reg32 mod-r/m-32))
-+ ; ??? condition codes
-+ )
-+ ()
-+)
-diff -Nur binutils-2.24.orig/cgen/cpu/ia64.cpu binutils-2.24/cgen/cpu/ia64.cpu
---- binutils-2.24.orig/cgen/cpu/ia64.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/ia64.cpu 2016-06-30 21:26:12.617891712 +0200
-@@ -0,0 +1,2340 @@
-+;;; Intel IA-64 CPU description. -*- Scheme -*-
-+;;; Copyright (C) 2000 Red Hat, Inc.
-+;;; This file is part of CGEN.
-+;;; See file COPYING.CGEN for details.
-+
-+(include "simplify.inc")
-+
-+
-+;;; Architecture and cpu family definitions.
-+
-+(define-arch
-+ (name ia64)
-+ (comment "Intel IA-64 architecture")
-+ (insn-lsb0? #t)
-+ (machs ia64)
-+ (isas ia64)
-+)
-+
-+(define-isa
-+ (name ia64)
-+
-+ ;; Each instruction in the 128-bit bundle is 41 bits wide.
-+ (base-insn-bitsize 41)
-+
-+ ;; Each bundle is 3 insns wide.
-+ (liw-insns 3)
-+
-+ ;; ??? How to specify "lots", as that's what the architecture's
-+ ;; stop bits means;
-+ (parallel-insns 3)
-+
-+ ;; Initial bit numbers to decode by.
-+ (decode-assist (40 39 38 37))
-+)
-+
-+(define-cpu
-+ (name ia64)
-+ (comment "Intel IA-64 family")
-+ (insn-endian little)
-+ (data-endian either)
-+ (word-bitsize 64)
-+)
-+
-+(define-mach
-+ (name ia64)
-+ (comment "Intel IA-64 processors")
-+ (cpu ia64)
-+)
-+
-+; ??? Incomplete. Pipeline and unit info wrong.
-+
-+(define-model
-+ (name ia64_itanium)
-+ (comment "Intel Itanium processor")
-+ (mach ia64)
-+ (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
-+ (unit u-exec "Execution Unit" () 1 1
-+ () () () ())
-+)
-+
-+;;; Attributes.
-+;;;
-+;;; These are used to mark instructions so that we can decode the
-+;;; dependancy violation data in Intel's tables.
-+
-+(define-attr
-+ (name FORMAT)
-+ (for insn)
-+ (type enum)
-+ (attrs META)
-+ (values UNKNOWN
-+
-+ A1 A2 A3 A4 A5 A6 A7 A8 A9 A10
-+
-+ I1 I2 I3 I4 I5 I6 I7 I8 I9 I10
-+ I11 I12 I13 I14 I15 I16 I17 I18 I19 I20
-+ I21 I22 I23 I24 I25 I26 I27 I28 I29
-+
-+ M1 M2 M3 M4 M5 M6 M7 M8 M9 M10
-+ M11 M12 M13 M14 M15 M16 M17 M18 M19 M20
-+ M21 M22 M23 M24 M25 M26 M27 M28 M29 M30
-+ M31 M32 M33 M34 M35 M36 M37 M38 M39 M40
-+ M41 M42 M43 M44 M45 M46
-+
-+ B1 B2 B3 B4 B5 B6 B7 B8 B9
-+
-+ F1 F2 F3 F4 F5 F6 F7 F8 F9 F10
-+ F11 F12 F13 F14 F15
-+ )
-+ (default UNKNOWN)
-+)
-+
-+;; ??? NONE isn't a valid value, but non-FP insns obviously can't have
-+;; a valid value either.
-+(define-attr
-+ (name FIELD-SF)
-+ (for insn)
-+ (type enum)
-+ (attrs META)
-+ (values NONE s0 s1 s2 s3)
-+ (default NONE)
-+)
-+
-+(define-attr
-+ (name FIELD-LFTYPE)
-+ (for insn)
-+ (type enum)
-+ (attrs META)
-+ (values NONE fault)
-+ (default NONE)
-+)
-+
-+(define-attr
-+ (name FIELD-CTYPE)
-+ (for insn)
-+ (type enum)
-+ (attrs META)
-+ (values NONE unc or and or.andcm orcm andcm and.orcm)
-+ (default NONE)
-+)
-+
-+;; Field AR3 references a register field.
-+;; Field CR3 references a register field.
-+;; Field ireg references a register field.
-+
-+;;; ??? IA-64 specific instruction attributes:
-+;;;
-+;;; FIRST Must be at the beginning of an instruction group.
-+;;; SLOT2 Must be in slot 2 on a bundle.
-+;;; LAST Must be at the end of an instruction group.
-+;;; I_IN_MLI Insn is allowed in I slot of MLI.
-+;;; PRIV Privileged instruction.
-+;;; NO_PRED Insn cannot be predicated.
-+
-+
-+;;; Instruction fields.
-+;;;
-+;;; ??? This is confusing (at least to me) -- note that we specify the _top_
-+;;; of the field and a length.
-+;;;
-+;;; ??? There are only two fields used nearly universally. But the
-+;;; instruction formats are very regular in the sense that the same
-+;;; field specifications are re-used many times. So we just have the
-+;;; raw fields here first.
-+
-+;; Fields used by most instructions.
-+(dnf f-opcode "major opcode" () 40 4)
-+(dnf f-qp "qualifying predicate" () 5 6)
-+
-+;; Random parts used by the 109 (!) instruction formats.
-+(dnf f-36-6 "6 @ 36" () 36 6)
-+(df f-36-1s "1 @ 36, signed" () 36 1 INT #f #f)
-+(dnf f-36-1 "1 @ 36" () 36 1)
-+(dnf f-35-9 "9 @ 35" () 35 9)
-+(dnf f-35-6 "6 @ 35" () 35 6)
-+(dnf f-35-3 "3 @ 35" () 35 3)
-+(dnf f-35-2 "2 @ 35" () 35 2)
-+(dnf f-35-1 "1 @ 35" () 35 1)
-+(dnf f-34-2 "2 @ 34" () 34 2)
-+(dnf f-33-1 "1 @ 33" () 33 1)
-+(dnf f-32-27 "27 @ 32" () 32 27)
-+(dnf f-32-20 "20 @ 32" () 32 20)
-+(dnf f-32-13 "13 @ 32" () 32 13)
-+(dnf f-32-9 "9 @ 32" () 32 9)
-+(dnf f-32-6 "6 @ 32" () 32 6)
-+(dnf f-32-4 "4 @ 32" () 32 4)
-+(dnf f-32-2 "2 @ 32" () 32 2)
-+(dnf f-32-1 "1 @ 32" () 32 1)
-+(dnf f-31-8 "8 @ 31" () 31 8)
-+(dnf f-31-2 "2 @ 31" () 31 2)
-+(dnf f-30-4 "4 @ 30" () 30 4)
-+(dnf f-30-19 "19 @ 30" () 30 19)
-+(dnf f-29-2 "2 @ 29" () 29 2)
-+(dnf f-28-2 "2 @ 28" () 28 2)
-+(dnf f-27-8 "8 @ 27" () 27 8)
-+(dnf f-27-4 "4 @ 27" () 27 4)
-+(dnf f-27-3 "3 @ 27" () 27 3)
-+(dnf f-27-1 "1 @ 27" () 27 1)
-+(dnf f-26-21 "21 @ 26" () 26 21)
-+(dnf f-26-11 "11 @ 26" () 26 11)
-+(dnf f-26-7 "7 @ 26" () 26 7)
-+(dnf f-26-5 "5 @ 26" () 26 5)
-+(dnf f-26-1 "1 @ 26" () 26 1)
-+(dnf f-25-20 "20 @ 25" () 25 20)
-+(dnf f-25-6 "6 @ 25" () 25 6)
-+(dnf f-24-5 "5 @ 24" () 24 5)
-+(dnf f-23-4 "4 @ 23" () 23 4)
-+(dnf f-23-1 "1 @ 23" () 23 1)
-+(dnf f-22-1 "1 @ 22" () 22 1)
-+(dnf f-21-2 "2 @ 21" () 21 2)
-+(dnf f-21-1 "1 @ 21" () 21 1)
-+(dnf f-20-1 "1 @ 20" () 20 1)
-+(dnf f-19-7 "7 @ 19" () 19 7)
-+(dnf f-19-6 "6 @ 19" () 19 6)
-+(dnf f-19-4 "4 @ 19" () 19 4)
-+(dnf f-19-1 "1 @ 19" () 19 1)
-+(dnf f-18-5 "5 @ 18" () 18 5)
-+(dnf f-15-3 "3 @ 15" () 15 3)
-+(dnf f-15-1 "1 @ 15" () 15 1)
-+(dnf f-14-2 "2 @ 14" () 14 2)
-+(dnf f-13-1 "1 @ 13" () 13 1)
-+(dnf f-12-7 "7 @ 12" () 12 7)
-+(dnf f-12-1 "1 @ 12" () 12 1)
-+(dnf f-11-6 "6 @ 11" () 11 6)
-+(dnf f-11-3 "3 @ 11" () 11 3)
-+(dnf f-8-3 "3 @ 8" () 8 3)
-+
-+;; The extra field for movl
-+(dnf f-81-41 "41 @ 81" () 81 41)
-+
-+;; Virtual fields of the broken up constants.
-+(dnmf fv-sint8 "i8 for A3 A8 I27 M30"
-+ () INT
-+
-+ (f-36-1s f-19-7)
-+ (sequence () ; insert
-+ (set (ifield f-36-1s) (srl (ifield fv-sint8) (const 7)))
-+ (set (ifield f-19-7) (and (ifield fv-sint8) (const #x7f)))
-+ )
-+ (sequence () ; extract
-+ (set (ifield fv-sint8)
-+ (or (sll (ifield f-36-1s) (const 7))
-+ (ifield f-19-7)))
-+ )
-+)
-+
-+(dnmf fv-sint9a "i9 for M3 M8 M15"
-+ () INT
-+ (f-36-1s f-27-1 f-19-7)
-+ (sequence () ; insert
-+ (set (ifield f-36-1s) (srl (ifield fv-sint9a) (const 8)))
-+ (set (ifield f-27-1)
-+ (and (srl (ifield fv-sint9a) (const 7)) (const 1)))
-+ (set (ifield f-19-7) (and (ifield fv-sint9a) (const #x7f)))
-+ )
-+ (sequence () ; extract
-+ (set (ifield fv-sint9a)
-+ (or (sll (ifield f-36-1s) (const 8))
-+ (or (sll (ifield f-27-1) (const 7))
-+ (ifield f-19-7))))
-+ )
-+)
-+
-+(dnmf fv-sint9b "i9 for M5 M10"
-+ () INT
-+ (f-36-1s f-27-1 f-12-7)
-+ (sequence () ; insert
-+ (set (ifield f-36-1s) (srl (ifield fv-sint9b) (const 8)))
-+ (set (ifield f-27-1)
-+ (and (srl (ifield fv-sint9b) (const 7)) (const 1)))
-+ (set (ifield f-12-7) (and (ifield fv-sint9b) (const #x7f)))
-+ )
-+ (sequence () ; extract
-+ (set (ifield fv-sint9b)
-+ (or (sll (ifield f-36-1s) (const 8))
-+ (or (sll (ifield f-27-1) (const 7))
-+ (ifield f-12-7))))
-+ )
-+)
-+
-+(dnmf fv-sint14 "i14 for A4"
-+ () INT
-+ (f-36-1s f-32-6 f-19-7)
-+ (sequence () ; insert
-+ (set (ifield f-36-1s) (srl (ifield fv-sint14) (const 13)))
-+ (set (ifield f-32-6)
-+ (and (srl (ifield fv-sint14) (const 7)) (const #x3f)))
-+ (set (ifield f-19-7) (and (ifield fv-sint14) (const #x7f)))
-+ )
-+ (sequence () ; extract
-+ (set (ifield fv-sint14)
-+ (or (sll (ifield f-36-1s) (const 13))
-+ (or (sll (ifield f-32-6) (const 7))
-+ (ifield f-19-7))))
-+ )
-+)
-+
-+(dnmf fv-sint17 "mask17 for I23"
-+ () INT
-+ (f-36-1s f-31-8 f-12-7)
-+ (sequence () ; insert
-+ (set (ifield f-36-1s) (srl (ifield fv-sint17) (const 16)))
-+ (set (ifield f-31-8)
-+ (and (srl (ifield fv-sint17) (const 8)) (const #xff)))
-+ (set (ifield f-12-7)
-+ (and (srl (ifield fv-sint17) (const 1)) (const #x7f)))
-+ )
-+ (sequence () ; extract
-+ (set (ifield fv-sint17)
-+ (or (sll (ifield f-36-1s) (const 16))
-+ (or (sll (ifield f-31-8) (const 8))
-+ (ifield f-12-7))))
-+ )
-+)
-+
-+(dnmf fv-sint22 "i22 for A5"
-+ () INT
-+ (f-36-1s f-35-9 f-26-5 f-19-7)
-+ (sequence () ; insert
-+ (set (ifield f-36-1s) (srl (ifield fv-sint22) (const 21)))
-+ (set (ifield f-26-5)
-+ (and (srl (ifield fv-sint22) (const 16)) (const #x1f)))
-+ (set (ifield f-35-9)
-+ (and (srl (ifield fv-sint22) (const 7)) (const #x1ff)))
-+ (set (ifield f-19-7) (and (ifield fv-sint22) (const #x7f)))
-+ )
-+ (sequence () ; extract
-+ (set (ifield fv-sint22)
-+ (or (or (sll (ifield f-36-1s) (const 21))
-+ (sll (ifield f-26-5) (const 16)))
-+ (or (sll (ifield f-35-9) (const 7))
-+ (ifield f-19-7))))
-+ )
-+)
-+
-+(dnmf fv-sint44 "i44 for I24"
-+ () INT
-+ (f-36-1s f-32-27)
-+ (sequence () ; insert
-+ (set (ifield f-36-1s) (srl (ifield fv-sint44) (const 43)))
-+ (set (ifield f-19-7)
-+ (and (srl (ifield fv-sint44) (const 16))
-+ (const #x7ffffff)))
-+ )
-+ (sequence () ; extract
-+ (set (ifield fv-sint44)
-+ (or (sll (ifield f-36-1s) (const 43))
-+ (sll (ifield f-32-27) (const 16))))
-+ )
-+)
-+
-+(dnmf fv-sint64 "i64 for I18"
-+ () INT
-+ (f-81-41 f-36-1s f-35-9 f-26-5 f-21-1 f-19-7)
-+ (sequence () ; insert
-+ (set (ifield f-36-1s) (srl (ifield fv-sint64) (const 63)))
-+ (set (ifield f-81-41)
-+ (and (srl (ifield fv-sint64) (const 22))
-+ (const #x1fffffffff)))
-+ (set (ifield f-21-1)
-+ (and (srl (ifield fv-sint64) (const 21)) (const 1)))
-+ (set (ifield f-26-5)
-+ (and (srl (ifield fv-sint64) (const 16)) (const #x1f)))
-+ (set (ifield f-35-9)
-+ (and (srl (ifield fv-sint64) (const 7)) (const #x1ff)))
-+ (set (ifield f-19-7) (and (ifield fv-sint64) (const #x7f)))
-+ )
-+ (sequence () ; extract
-+ (set (ifield fv-sint64)
-+ (or (or (or (sll (ifield f-36-1s) (const 63))
-+ (sll (ifield f-81-41) (const 22)))
-+ (or (sll (ifield f-21-1) (const 21))
-+ (sll (ifield f-26-5) (const 16))))
-+ (or (sll (ifield f-35-9) (const 7))
-+ (ifield f-19-7))))
-+ )
-+)
-+
-+(dnmf fv-uint21 "u21 for I19 M37 F15"
-+ () UINT
-+ (f-36-1 f-25-20)
-+ (sequence () ; insert
-+ (set (ifield f-36-1) (srl (ifield fv-uint21) (const 20)))
-+ (set (ifield f-25-20) (and (ifield fv-uint21) (const #xfffff)))
-+ )
-+ (sequence () ; extract
-+ (set (ifield fv-uint21)
-+ (or (sll (ifield f-36-1) (const 20))
-+ (ifield f-25-20)))
-+ )
-+)
-+
-+(dnmf fv-uint24 "u24 for M44"
-+ () UINT
-+ (f-36-1 f-32-2 f-26-21)
-+ (sequence () ; insert
-+ (set (ifield f-36-1) (srl (ifield fv-uint24) (const 23)))
-+ (set (ifield f-32-1)
-+ (and (srl (ifield fv-uint24) (const 21)) (const 3)))
-+ (set (ifield f-26-21)
-+ (and (ifield fv-uint24) (const #x1fffff)))
-+ )
-+ (sequence () ; extract
-+ (set (ifield fv-uint24)
-+ (or (sll (ifield f-36-1) (const 23))
-+ (or (sll (ifield f-32-2) (const 21))
-+ (ifield f-26-21))))
-+ )
-+)
-+
-+(dnmf fv-tgt25a "target25 for I20 M20 M21"
-+ (PCREL-ADDR) INT
-+ (f-36-1s f-32-13 f-12-7)
-+ (sequence () ; insert
-+ ;; ??? Wherefore right shift.
-+ (set (ifield f-36-1s) (srl (ifield fv-tgt25a) (const 20)))
-+ (set (ifield f-32-13)
-+ (and (srl (ifield fv-tgt25a) (const 7)) (const #x1fff)))
-+ (set (ifield f-12-7) (and (ifield fv-tgt25a) (const #x7f)))
-+ )
-+ (sequence () ; extract
-+ ;; ??? Where will pc be added.
-+ ;; ??? Wherefore left shift.
-+ (set (ifield fv-tgt25a)
-+ (or (sll (ifield f-36-1s) (const 20))
-+ (or (sll (ifield f-32-13) (const 7))
-+ (ifield f-12-7))))
-+ )
-+)
-+
-+(dnmf fv-tgt25b "target25 for F14"
-+ (PCREL-ADDR) INT
-+ (f-36-1s f-25-20)
-+ (sequence () ; insert
-+ ;; ??? Wherefore right shift.
-+ (set (ifield f-36-1s) (srl (ifield fv-tgt25b) (const 20)))
-+ (set (ifield f-25-20) (and (ifield fv-tgt25b) (const #xfffff)))
-+ )
-+ (sequence () ; extract
-+ ;; ??? Where will pc be added.
-+ ;; ??? Wherefore left shift.
-+ (set (ifield fv-tgt25b)
-+ (or (sll (ifield f-36-1) (const 20))
-+ (ifield f-25-20)))
-+ )
-+)
-+
-+(dnmf fv-tgt25c "target25 for M22 M23 B1 B2 B3 B6"
-+ (PCREL-ADDR) INT
-+ (f-36-1s f-32-20)
-+ (sequence () ; insert
-+ ;; ??? Wherefore right shift.
-+ (set (ifield f-36-1s) (srl (ifield fv-tgt25c) (const 20)))
-+ (set (ifield f-32-20) (and (ifield fv-tgt25c) (const #xfffff)))
-+ )
-+ (sequence () ; extract
-+ ;; ??? Where will pc be added.
-+ ;; ??? Wherefore left shift.
-+ (set (ifield fv-tgt25c)
-+ (or (sll (ifield f-36-1s) (const 20))
-+ (ifield f-32-20)))
-+ )
-+)
-+
-+(dnmf fv-tag13a "tag13 for I21"
-+ (PCREL-ADDR) INT
-+ (f-32-9)
-+ (sequence () ; insert
-+ ;; ??? Wherefore right shift.
-+ (set (ifield f-32-9) (and (ifield fv-tag13a (const #x1ff))))
-+ )
-+ (sequence () ; extract
-+ ;; ??? Where will pc be added.
-+ ;; ??? Wherefore left shift.
-+ (set (ifield fv-tag13a)
-+ (sub (xor (ifield f-32-9) (const #x100)) (const #x100)))
-+ )
-+)
-+
-+(dnmf fv-tag13b "tag13 for B6 B7"
-+ (PCREL-ADDR) INT
-+ (f-34-2 f-12-7)
-+ (sequence () ; insert
-+ ;; ??? Wherefore right shift.
-+ (set (ifield f-34-2)
-+ (and (sll (ifield fv-tag13b) (const 7)) (const 3)))
-+ (set (ifield f-12-7) (and (ifield fv-tag13b) (const #x7f)))
-+ )
-+ (sequence () ; extract
-+ ;; ??? Where will pc be added.
-+ ;; ??? Wherefore left shift.
-+ (set (ifield fv-tag13a)
-+ (or (sll (sub (xor (ifield f-34-2) (const 2))
-+ (const 2))
-+ (const 7))
-+ (ifield f-12-7)))
-+ )
-+)
-+
-+(dnmf fv-uint9 "u9 for F5"
-+ () UINT
-+ (f-34-2 f-26-7)
-+ (sequence () ; insert
-+ (set (ifield f-26-7) (srl (ifield fv-uint9) (const 2)))
-+ (set (ifield f-34-2) (and (ifield fv-uint9) (const 3)))
-+ )
-+ (sequence () ; extract
-+ (set (ifield fv-uint9)
-+ (or (sll (ifield f-26-7) (const 2))
-+ (ifield f-34-2)))
-+ )
-+)
-+
-+;; Fields with funny arithmetic
-+
-+(df f-count2a "count2 for A2" () 28 2 UINT
-+ ((value pc) (sub WI value (const 1)))
-+ ((value pc) (add WI value (const 1)))
-+)
-+
-+(df f-count2b "count2 for A10" () 28 2 UINT
-+ ((value pc)
-+ (if WI (le value (const 2))
-+ (sub WI value (const 1))
-+ (error "invalid value for field count2b")))
-+ ((value pc) (add WI value (const 1)))
-+)
-+
-+(df f-count2c "count2 for I1" () 31 2 UINT
-+ ((value pc)
-+ (cond WI
-+ ((eq value (const 0)) (const 0))
-+ ((eq value (const 7)) (const 1))
-+ ((eq value (const 15)) (const 2))
-+ ((eq value (const 16)) (const 3))
-+ (else (error "invalid value for field count2c"))))
-+ ((value pc)
-+ (cond WI
-+ ((eq value (const 0)) (const 0))
-+ ((eq value (const 1)) (const 7))
-+ ((eq value (const 2)) (const 15))
-+ ((eq value (const 3)) (const 16))))
-+)
-+
-+(df f-ccount5 "ccount5 for I8" () 24 5 UINT
-+ ((value pc) (sub WI (const 31) value))
-+ ((value pc) (sub WI (const 31) value))
-+)
-+
-+(df f-len4 "len4 for I15" () 30 4 UINT
-+ ((value pc) (sub WI value (const 1)))
-+ ((value pc) (add WI value (const 1)))
-+)
-+
-+(df f-len6 "len6 for I11 I12 I13 I14" () 32 6 UINT
-+ ((value pc) (sub WI value (const 1)))
-+ ((value pc) (add WI value (const 1)))
-+)
-+
-+(df f-cpos6a "cpos6 for I12 I13" () 25 6 UINT
-+ ((value pc) (sub WI (const 63) value))
-+ ((value pc) (sub WI (const 63) value))
-+)
-+
-+(df f-cpos6b "cpos6 for I14" () 19 6 UINT
-+ ((value pc) (sub WI (const 63) value))
-+ ((value pc) (sub WI (const 63) value))
-+)
-+
-+(df f-cpos6c "cpos6 for I15" () 36 6 UINT
-+ ((value pc) (sub WI (const 63) value))
-+ ((value pc) (sub WI (const 63) value))
-+)
-+
-+(dnmf fv-inc3 "inc3 for M17" () INT
-+ (f-15-1 f-14-2)
-+ (sequence () ; insert
-+ (set (ifield f-15-1) (lt (ifield fv-inc3) (const 0)))
-+ (set (ifield f-14-2) (abs (ifield fv-inc3)))
-+ (set (ifield f-14-2)
-+ (cond ((eq (ifield f-14-2) (const 1)) (const 3))
-+ ((eq (ifield f-14-2) (const 4)) (const 2))
-+ ((eq (ifield f-14-2) (const 8)) (const 1))
-+ ((eq (ifield f-14-2) (const 16)) (const 0))
-+ (else (error "invalid value for field inc3"))))
-+ )
-+ (sequence () ; extract
-+ (set (ifield fv-inc3)
-+ (mul (add (mul (neg (ifield f-15-1)) (const 2)) (const 1))
-+ (if (eq (ifield f-14-2) (const 3))
-+ (const 1)
-+ (sll (const 1) (sub (const 4)
-+ (ifield f-14-2))))))
-+ )
-+)
-+
-+;;; Hardware pieces.
-+;;;
-+;;; These entries list the elements of the raw hardware. They're also
-+;;; used to provide tables and other elements of the assembly language.
-+
-+;; The normal h-uint only provides 32 bits of integer.
-+(dnh h-int64 "64-bit integer" ()
-+ (immediate (INT 64))
-+ () () ()
-+)
-+
-+;; ??? Intel calls this if IP, but from experience with the i960
-+;; simulator using the name "ip", we know that gdb reacts badly.
-+(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
-+
-+(define-pmacro (build-decpair num) ((.dec num) num))
-+
-+(define-hardware
-+ (name h-gr)
-+ (comment "general registers")
-+ (attrs CACHE-ADDR)
-+ (type register WI (128))
-+ (indices keyword "r"
-+ (.map build-decpair (.iota 128)))
-+)
-+
-+;; ??? Skip GR NaTs for now, since we're not simulating.
-+
-+(define-hardware
-+ (name h-fr)
-+ (comment "floating-point registers")
-+ (type register XF (128))
-+ (indices keyword "fr"
-+ (.map build-decpair (.iota 128)))
-+)
-+
-+(define-hardware
-+ (name h-br)
-+ (comment "branch registers")
-+ (attrs CACHE-ADDR)
-+ (type register WI (8))
-+ (indices keyword "br"
-+ (.map build-decpair (.iota 8)))
-+)
-+
-+(define-hardware
-+ (name h-ar)
-+ (comment "application registers")
-+ (type register WI (128))
-+ (indices keyword "ar"
-+ (.map build-decpair (.iota 128)))
-+)
-+
-+(define-hardware
-+ (name h-pr)
-+ (comment "predicate registers")
-+ (type register BI (64))
-+ (indices keyword "pr"
-+ (.map build-decpair (.iota 64)))
-+)
-+
-+(define-hardware
-+ (name h-cr)
-+ (comment "control registers")
-+ (type register WI (128))
-+ (indices keyword "cr"
-+ (.map build-decpair (.iota 128)))
-+)
-+
-+;; ??? CFM, PSR, PMD, CPUID
-+
-+;;; Instruction Operands.
-+;;;
-+;;; These entries provide a layer between the assembler and the raw
-+;;; hardware description, and are used to refer to hardware elements
-+;;; in the semantic code. Usually there's a bit of over-specification,
-+;;; but in more complicated instruction sets there isn't.
-+
-+(dnop qp "qualifying predicate" () h-pr f-qp)
-+
-+(dnop r1 "general register 1" () h-gr f-12-7)
-+(dnop r2 "general register 2" () h-gr f-19-7)
-+(dnop r3 "general register 3" () h-gr f-26-7)
-+(dnop r33 "general register 3 for A5" () h-gr f-21-2)
-+
-+(dnop f1 "floating-point register 1" () h-fr f-12-7)
-+(dnop f2 "floating-point register 2" () h-fr f-19-7)
-+(dnop f3 "floating-point register 3" () h-fr f-26-7)
-+
-+(dnop p1 "predicate register 1" () h-pr f-11-6)
-+(dnop p2 "predicate register 2" () h-pr f-32-6)
-+
-+(dnop b1 "branch register 1" () h-br f-8-3)
-+(dnop b2 "branch register 2" () h-br f-15-3)
-+
-+(dnop ar3 "application register 3" () h-ar f-26-7)
-+(dnop cr3 "control register 3" () h-cr f-26-7)
-+
-+(dnop imm1 "imm1 for I14" () h-int64 f-36-1s)
-+(dnop imm8 "imm8 for A3 A8 I27 M30" () h-int64 fv-sint8)
-+(dnop imm9a "imm9 for M3 M8 M15" () h-int64 fv-sint9a)
-+(dnop imm9b "imm9 for M5 M10" () h-int64 fv-sint9b)
-+(dnop imm14 "imm14 for A4" () h-int64 fv-sint14)
-+(dnop imm17 "mask17 for I23" () h-int64 fv-sint17)
-+(dnop imm21 "imm21 for I19" () h-int64 fv-uint21)
-+(dnop imm22 "imm22 for A5" () h-int64 fv-sint22)
-+(dnop imm44 "imm44 for I24" () h-int64 fv-sint44)
-+(dnop imm64 "imm64 for I18" () h-int64 fv-sint64)
-+
-+(dnop count2a "count2 for A2" () h-int64 f-count2a)
-+(dnop count2b "count2 for A10" () h-int64 f-count2b)
-+(dnop count2c "count2 for I1" () h-int64 f-count2c)
-+(dnop count5 "count5 for I6" () h-int64 f-18-5)
-+(dnop count6 "count6 for I10" () h-int64 f-32-6)
-+(dnop ccount5 "ccount5 for I8" () h-int64 f-ccount5)
-+
-+(dnop len4 "len4 for I15" () h-int64 f-len4)
-+(dnop len6 "len6 for I11 I12 I13 I14" () h-int64 f-len6)
-+
-+(dnop pos6 "pos6 for I11" () h-int64 f-19-6)
-+(dnop cpos6a "cpos6 for I12 I13" () h-int64 f-cpos6a)
-+(dnop cpos6b "cpos6 for I14" () h-int64 f-cpos6b)
-+(dnop cpos6c "cpos6 for I15" () h-int64 f-cpos6c)
-+
-+(dnop inc3 "inc3 for M17" () h-int64 fv-inc3)
-+
-+(define-operand
-+ (name mbtype4)
-+ (comment "mbtype4 type for I3")
-+ (type h-int64)
-+ (index f-23-4)
-+ (handlers (parse "mbtype4")
-+ (print "mbtype4"))
-+)
-+
-+(dnop mhtype8 "mhtype8 for I4" () h-int64 f-27-8)
-+
-+(dnop tgt25a "tgt25 for I20 M20 M21" () h-int64 fv-tgt25a)
-+(dnop tgt25b "tgt25 for F14" () h-int64 fv-tgt25b)
-+(dnop tgt25c "tgt25 for M22 M23 B1 B2 B3 B6" () h-int64 fv-tgt25c)
-+
-+(dnop tag13a "tag13 for I21" () h-int64 fv-tag13a)
-+
-+;; Completers
-+
-+(define-operand
-+ (name ldhint)
-+ (comment "ldhint completer")
-+ (type h-int64)
-+ (index f-29-2)
-+ (handlers (parse "ldhint")
-+ (print "ldhint"))
-+)
-+
-+(define-operand
-+ (name sthint)
-+ (comment "sthint completer")
-+ (type h-int64)
-+ (index f-29-2)
-+ (handlers (parse "sthint")
-+ (print "sthint"))
-+)
-+
-+(define-operand
-+ (name movbr_mwh)
-+ (comment "mwh completer for mov_br")
-+ (type h-int64)
-+ (index f-21-2)
-+ (handlers (parse "mwh")
-+ (print "mwh"))
-+)
-+
-+(define-operand
-+ (name movbr_ih)
-+ (comment "ih completer for mov_br")
-+ (type h-int64)
-+ (index f-23-1)
-+ (handlers (parse "ih")
-+ (print "ih"))
-+)
-+
-+(define-operand
-+ (name lfhint)
-+ (comment "lfhint for lfetch")
-+ (type h-int64)
-+ (index f-29-2)
-+ (handlers (parse "lfhint")
-+ (print "lfhint"))
-+)
-+
-+(define-operand
-+ (name sorsolsof)
-+ (comment "combined i,l,o,r for alloc")
-+ (type h-int64)
-+ (index f-30-19)
-+ (handlers (parse "sorsolsof")
-+ (print "sorsolsof"))
-+)
-+
-+;; These are architecturally ignored bits, as opposed to architecturally
-+;; reserved bits. I.e. we should assemble them in with zeros, but we should
-+;; ignore them when disassembling.
-+
-+(dnop ign_36_1 "ignore 1 @ 36" () h-int64 f-36-1)
-+(dnop ign_32_2 "ignore 2 @ 32" () h-int64 f-32-2)
-+(dnop ign_32_1 "ignore 1 @ 32" () h-int64 f-32-1)
-+(dnop ign_29_2 "ignore 2 @ 29" () h-int64 f-29-2)
-+(dnop ign_27_4 "ignore 4 @ 27" () h-int64 f-27-4)
-+(dnop ign_27_3 "ignore 3 @ 27" () h-int64 f-27-3)
-+(dnop ign_27_1 "ignore 1 @ 27" () h-int64 f-27-1)
-+(dnop ign_26_11 "ignore 11 @ 26" () h-int64 f-26-11)
-+(dnop ign_26_7 "ignore 7 @ 26" () h-int64 f-26-7)
-+(dnop ign_26_1 "ignore 1 @ 26" () h-int64 f-26-1)
-+(dnop ign_23_4 "ignore 4 @ 23" () h-int64 f-23-4)
-+(dnop ign_19_7 "ignore 7 @ 19" () h-int64 f-19-7)
-+(dnop ign_19_6 "ignore 6 @ 19" () h-int64 f-19-6)
-+(dnop ign_19_4 "ignore 4 @ 19" () h-int64 f-19-4)
-+(dnop ign_19_1 "ignore 1 @ 19" () h-int64 f-19-1)
-+(dnop ign_13_1 "ignore 1 @ 13" () h-int64 f-13-1)
-+(dnop ign_12_7 "ignore 7 @ 12" () h-int64 f-12-7)
-+
-+;; ??? Add more as needed.
-+
-+;;; "A" Format Instruction definitions.
-+
-+(define-pmacro (I-A1 mnemonic maybe-p1 op x2a ve x4 x2b)
-+ (dni (.sym mnemonic maybe-p1)
-+ (.str "Integer ALU, reg-reg, " mnemonic maybe-p1)
-+ ((FORMAT A1))
-+ (.str mnemonic " $r1=$r2,$r3" maybe-p1)
-+ (+ (f-opcode op) (f-35-2 x2a) (f-33-1 ve) (f-32-4 x4) (f-28-2 x2b)
-+ ign_36_1 r3 r2 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-A1 add "" 8 0 0 0 0)
-+(I-A1 add ",1" 8 0 0 0 1)
-+(I-A1 sub "" 8 0 0 1 1)
-+(I-A1 sub ",1" 8 0 0 1 0)
-+(I-A1 addp4 "" 8 0 0 2 0)
-+(I-A1 and "" 8 0 0 3 0)
-+(I-A1 andcm "" 8 0 0 3 1)
-+(I-A1 or "" 8 0 0 3 2)
-+(I-A1 xor "" 8 0 0 3 3)
-+
-+(define-pmacro (I-A2 mnemonic op x2a ve x4)
-+ (dni mnemonic
-+ (.str "Shift Left and Add, " mnemonic)
-+ ((FORMAT A2))
-+ (.str mnemonic " $r1=$r2,$count2a,$r3")
-+ (+ (f-opcode op) (f-35-2 x2a) (f-33-1 ve) (f-32-4 x4)
-+ ign_36_1 count2a r3 r2 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-A2 shladd 8 0 0 4)
-+(I-A2 shladdp4 8 0 0 6)
-+
-+(define-pmacro (I-A3 mnemonic op x2a ve x4 x2b)
-+ (dni (.sym mnemonic "i")
-+ (.str "Integer ALU, imm8-reg, " mnemonic)
-+ ((FORMAT A3))
-+ (.str mnemonic " $r1=$imm8,$r3")
-+ (+ (f-opcode op) (f-35-2 x2a) (f-33-1 ve) (f-32-4 x4) (f-28-2 x2b)
-+ r3 imm8 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-A3 sub 8 0 0 9 1)
-+(I-A3 and 8 0 0 11 0)
-+(I-A3 andcm 8 0 0 11 1)
-+(I-A3 or 8 0 0 11 2)
-+(I-A3 xor 8 0 0 11 3)
-+
-+(define-pmacro (I-A4 mnemonic op x2a ve)
-+ (dni (.str mnemonic "i")
-+ (.str "Add imm14, " mnemonic)
-+ ((FORMAT A4))
-+ (.str mnemonic " $r1=$imm14,$r3")
-+ (+ (f-opcode op) (f-35-2 x2a) (f-33-1 ve)
-+ r3 imm14 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-A4 adds 8 2 0)
-+(I-A4 addp4 8 3 0)
-+
-+(define-pmacro (I-A5 mnemonic op)
-+ (dni (.str mnemonic)
-+ (.str "Add imm22, " mnemonic)
-+ ((FORMAT A5))
-+ (.str mnemonic " $r1=$imm22,$r33")
-+ (+ (f-opcode op) imm22 r33 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-A5 addl 9)
-+
-+(define-pmacro (I-A6 mnemonic ctype-attr op x2 tb ta c)
-+ (dni (.sym mnemonic)
-+ (.str "Integer Compare, reg-reg, " mnemonic)
-+ ((FORMAT A6) (FIELD-CTYPE ctype-attr))
-+ (.str mnemonic " $p1,$p2=$r2,$r3")
-+ (+ (f-opcode op) (f-36-1 tb) (f-35-2 x2) (f-33-1 ta) (f-12-1 c)
-+ p2 r3 r2 p1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(define-pmacro (I-A6-cmp-cond-ctype cmp cond ctype op x2 ta c)
-+ (I-A6 (.sym cmp "." cond
-+ (.eval (if (eq? (string-length ctype) 0) "" "."))
-+ ctype)
-+ (.eval (if (eq? (string-length ctype) 0) 'NONE (string->symbol ctype)))
-+ op 0 x2 ta c)
-+)
-+
-+(define-pmacro (I-A6-cmp cmp x2)
-+ (begin
-+ (I-A6-cmp-cond-ctype cmp lt "" 12 x2 0 0)
-+ (I-A6-cmp-cond-ctype cmp ltu "" 13 x2 0 0)
-+ (I-A6-cmp-cond-ctype cmp eq "" 14 x2 0 0)
-+
-+ (I-A6-cmp-cond-ctype cmp lt "unc" 12 x2 0 1)
-+ (I-A6-cmp-cond-ctype cmp ltu "unc" 13 x2 0 1)
-+ (I-A6-cmp-cond-ctype cmp eq "unc" 14 x2 0 1)
-+
-+ (I-A6-cmp-cond-ctype cmp eq "and" 12 x2 1 0)
-+ (I-A6-cmp-cond-ctype cmp eq "or" 13 x2 1 0)
-+ (I-A6-cmp-cond-ctype cmp eq "or.andcm" 14 x2 1 0)
-+
-+ (I-A6-cmp-cond-ctype cmp ne "and" 12 x2 1 1)
-+ (I-A6-cmp-cond-ctype cmp ne "or" 13 x2 1 1)
-+ (I-A6-cmp-cond-ctype cmp ne "or.andcm" 14 x2 1 1)
-+ )
-+)
-+
-+(I-A6-cmp cmp 0)
-+(I-A6-cmp cmp4 1)
-+
-+(define-pmacro (I-A7 mnemonic ctype-attr op x2 tb ta c)
-+ (dni (.sym mnemonic)
-+ (.str "Integer Compare, zero-reg, " mnemonic)
-+ ((FORMAT A7) (FIELD-CTYPE ctype-attr))
-+ (.str mnemonic " $p1,$p2=r0,$r3")
-+ (+ (f-opcode op) (f-36-1 tb) (f-35-2 x2) (f-33-1 ta) (f-12-1 c)
-+ p2 r3 (f-19-7 0) p1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(define-pmacro (I-A7-cmp-cond-ctype cmp cond ctype op x2 ta c)
-+ (I-A7 (.sym cmp "." cond "." ctype) (.sym ctype) op x2 1 ta c)
-+)
-+
-+(define-pmacro (I-A7-cmp-cond cmp cond x2 ta c)
-+ (begin
-+ (I-A7-cmp-cond-ctype cmp cond and 12 x2 ta c)
-+ (I-A7-cmp-cond-ctype cmp cond or 13 x2 ta c)
-+ (I-A7-cmp-cond-ctype cmp cond andcm 14 x2 ta c)
-+ )
-+)
-+
-+(define-pmacro (I-A7-cmp cmp x2)
-+ (begin
-+ (I-A7-cmp-cond cmp gt x2 0 0)
-+ (I-A7-cmp-cond cmp le x2 0 1)
-+ (I-A7-cmp-cond cmp ge x2 1 0)
-+ (I-A7-cmp-cond cmp lt x2 1 1)
-+ )
-+)
-+
-+(I-A7-cmp cmp 0)
-+(I-A7-cmp cmp4 1)
-+
-+(define-pmacro (I-A8 mnemonic ctype-attr op x2 ta c)
-+ (dni (.sym mnemonic)
-+ (.str "Integer Compare, imm8-reg, " mnemonic)
-+ ((FORMAT A7) (FIELD-CTYPE ctype-attr))
-+ (.str mnemonic " $p1,$p2=$imm8,$r3")
-+ (+ (f-opcode op) (f-35-2 x2) (f-33-1 ta) (f-12-1 c)
-+ p2 r3 imm8 p1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(define-pmacro (I-A8-cmp-cond-ctype cmp cond ctype op x2 ta c)
-+ (I-A8 (.sym cmp "." cond
-+ (.eval (if (eq? (string-length ctype) 0) "" "."))
-+ ctype)
-+ (.eval (if (eq? (string-length ctype) 0) 'NONE (string->symbol ctype)))
-+ op x2 ta c)
-+)
-+
-+(define-pmacro (I-A8-cmp cmp x2)
-+ (begin
-+ (I-A8-cmp-cond-ctype cmp lt "" 12 x2 0 0)
-+ (I-A8-cmp-cond-ctype cmp ltu "" 13 x2 0 0)
-+ (I-A8-cmp-cond-ctype cmp eq "" 14 x2 0 0)
-+
-+ (I-A8-cmp-cond-ctype cmp lt "unc" 12 x2 0 1)
-+ (I-A8-cmp-cond-ctype cmp ltu "unc" 13 x2 0 1)
-+ (I-A8-cmp-cond-ctype cmp eq "unc" 14 x2 0 1)
-+
-+ (I-A8-cmp-cond-ctype cmp eq "and" 12 x2 1 0)
-+ (I-A8-cmp-cond-ctype cmp eq "or" 12 x2 1 0)
-+ (I-A8-cmp-cond-ctype cmp eq "or.andcm" 12 x2 1 0)
-+
-+ (I-A8-cmp-cond-ctype cmp ne "and" 12 x2 1 1)
-+ (I-A8-cmp-cond-ctype cmp ne "or" 12 x2 1 1)
-+ (I-A8-cmp-cond-ctype cmp ne "or.andcm" 12 x2 1 1)
-+ )
-+)
-+
-+(I-A8-cmp cmp 2)
-+(I-A8-cmp cmp4 3)
-+
-+(define-pmacro (I-A9 mnemonic op x2a za zb x4 x2b)
-+ (dni (.str mnemonic)
-+ (.str "Multimetia ALU, " mnemonic)
-+ ((FORMAT A9))
-+ (.str mnemonic " $r1=$r2,$r3")
-+ (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-4 x4)
-+ (f-28-2 x2b) r3 r2 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-A9 padd1 8 1 0 0 0 0)
-+(I-A9 padd2 8 1 0 1 0 0)
-+(I-A9 padd4 8 1 1 0 0 0)
-+(I-A9 padd1.sss 8 1 0 0 0 1)
-+(I-A9 padd2.sss 8 1 0 1 0 1)
-+(I-A9 padd1.uuu 8 1 0 0 0 2)
-+(I-A9 padd2.uuu 8 1 0 1 0 2)
-+(I-A9 padd1.uus 8 1 0 0 0 3)
-+(I-A9 padd2.uus 8 1 0 1 0 3)
-+
-+(I-A9 psub1 8 1 0 0 1 0)
-+(I-A9 psub2 8 1 0 1 1 0)
-+(I-A9 psub4 8 1 1 0 1 0)
-+(I-A9 psub1.sss 8 1 0 0 1 1)
-+(I-A9 psub2.sss 8 1 0 1 1 1)
-+(I-A9 psub1.uuu 8 1 0 0 1 2)
-+(I-A9 psub2.uuu 8 1 0 1 1 2)
-+(I-A9 psub1.uus 8 1 0 0 1 3)
-+(I-A9 psub2.uus 8 1 0 1 1 3)
-+
-+(I-A9 pavg1 8 1 0 0 2 2)
-+(I-A9 pavg2 8 1 0 1 2 2)
-+(I-A9 pavg1.raz 8 1 0 0 2 3)
-+(I-A9 pavg2.raz 8 1 0 1 2 3)
-+
-+(I-A9 pavgsub1 8 1 0 0 3 2)
-+(I-A9 pavgsub2 8 1 0 1 3 2)
-+
-+(I-A9 pcmp1.eq 8 1 0 0 9 0)
-+(I-A9 pcmp2.eq 8 1 0 1 9 0)
-+(I-A9 pcmp4.eq 8 1 1 0 9 0)
-+(I-A9 pcmp1.gt 8 1 0 0 9 1)
-+(I-A9 pcmp2.gt 8 1 0 1 9 1)
-+(I-A9 pcmp4.gt 8 1 1 0 9 1)
-+
-+(define-pmacro (I-A10 mnemonic op x2a za zb x4)
-+ (dni mnemonic
-+ (.str "Multimedia Shift and Add, " mnemonic)
-+ ((FORMAT A10))
-+ (.str mnemonic " $r1=$r2,$count2b,$r3")
-+ (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-4 x4)
-+ count2b r3 r2 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-A10 pshladd2 8 1 0 1 4)
-+(I-A10 pshradd2 8 1 0 1 6)
-+
-+;;; "I" Format Instruction definitions.
-+
-+(define-pmacro (I-I1 mnemonic op za zb ve x2a x2b)
-+ (dni mnemonic
-+ (.str "Multimedia Multiply and Shift, " mnemonic)
-+ ((FORMAT I1))
-+ (.str mnemonic " $r1=$r2,$r3,$count2c")
-+ (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-1 ve)
-+ (f-29-2 x2b) count2c ign_27_1 r3 r2 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I1 pmpyshr2 7 0 1 0 0 3)
-+(I-I1 pmpyshr2.u 7 0 1 0 0 1)
-+
-+(define-pmacro (I-I2 mnemonic op za zb ve x2a x2b x2c)
-+ (dni mnemonic
-+ (.str "Multimedia Multiply/Mix/Pack/Unpack, " mnemonic)
-+ ((FORMAT I2))
-+ (.str mnemonic " $r1=$r2,$r3")
-+ (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-1 ve)
-+ (f-31-2 x2c) (f-29-2 x2b) ign_27_1 r3 r2 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I2 pmpy2.r 7 0 1 0 2 1 3)
-+(I-I2 pmpy2.l 7 0 1 0 2 3 3)
-+
-+(I-I2 mix1.r 7 0 0 0 2 0 2)
-+(I-I2 mix2.r 7 0 1 0 2 0 2)
-+(I-I2 mix4.r 7 1 0 0 2 0 2)
-+(I-I2 mix1.l 7 0 0 0 2 2 2)
-+(I-I2 mix2.l 7 0 1 0 2 2 2)
-+(I-I2 mix4.l 7 1 0 0 2 2 2)
-+
-+(I-I2 pack2.uss 7 0 1 0 2 0 0)
-+(I-I2 pack2.sss 7 0 1 0 2 2 0)
-+(I-I2 pack4.sss 7 1 0 0 2 2 0)
-+
-+(I-I2 unpack1.h 7 0 0 0 2 0 1)
-+(I-I2 unpack2.h 7 0 1 0 2 0 1)
-+(I-I2 unpack4.h 7 1 0 0 2 0 1)
-+(I-I2 unpack1.l 7 0 0 0 2 2 1)
-+(I-I2 unpack2.l 7 0 1 0 2 2 1)
-+(I-I2 unpack4.l 7 1 0 0 2 2 1)
-+
-+(I-I2 pmin1.u 7 0 0 0 2 1 0)
-+(I-I2 pmax1.u 7 0 0 0 2 1 1)
-+(I-I2 pmin2 7 0 1 0 2 3 0)
-+(I-I2 pmax2 7 0 1 0 2 3 1)
-+
-+(I-I2 psad1 7 0 0 0 2 3 2)
-+
-+(define-pmacro (I-I3 mnemonic op za zb ve x2a x2b x2c)
-+ (dni mnemonic
-+ (.str "Multimedia Mux1, " mnemonic)
-+ ((FORMAT I3))
-+ (.str mnemonic " $r1=$r2,$mbtype4")
-+ (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-1 ve)
-+ (f-31-2 x2c) (f-29-2 x2b) ign_27_4 mbtype4 r2 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I3 mux1 7 0 0 0 3 2 2)
-+
-+(define-pmacro (I-I4 mnemonic op za zb ve x2a x2b x2c)
-+ (dni mnemonic
-+ (.str "Multimedia Mux2, " mnemonic)
-+ ((FORMAT I4))
-+ (.str mnemonic " $r1=$r2,$mhtype8")
-+ (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-1 ve)
-+ (f-31-2 x2c) (f-29-2 x2b) mhtype8 r2 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I4 mux2 7 0 1 0 3 2 2)
-+
-+(define-pmacro (I-I5 mnemonic op za zb ve x2a x2b x2c)
-+ (dni mnemonic
-+ (.str "Shift Right, variable, " mnemonic)
-+ ((FORMAT I5))
-+ (.str mnemonic " $r1=$r3,$r2")
-+ (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-1 ve)
-+ (f-31-2 x2c) (f-29-2 x2b) ign_27_1 r3 r2 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I5 pshr2 7 0 1 0 0 2 0)
-+(I-I5 pshr4 7 1 0 0 0 2 0)
-+(I-I5 shr 7 1 1 0 0 2 0)
-+
-+(I-I5 pshr2.u 7 0 1 0 0 0 0)
-+(I-I5 pshr4.u 7 1 0 0 0 0 0)
-+(I-I5 shr.u 7 1 1 0 0 0 0)
-+
-+(define-pmacro (I-I6 mnemonic op za zb ve x2a x2b x2c)
-+ (dni (.sym mnemonic "i")
-+ (.str "Shift Right, fixed, " mnemonic)
-+ ((FORMAT I6))
-+ (.str mnemonic " $r1=$r3,$count5")
-+ (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-1 ve)
-+ (f-31-2 x2c) (f-29-2 x2b) ign_27_1 r3 ign_19_1 count5 ign_13_1
-+ r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I6 pshr2 7 0 1 0 1 3 0)
-+(I-I6 pshr4 7 1 0 0 1 3 0)
-+(I-I6 pshr2.u 7 0 1 0 1 1 0)
-+(I-I6 pshr4.u 7 1 0 0 1 1 0)
-+
-+(define-pmacro (I-I7 mnemonic op za zb ve x2a x2b x2c)
-+ (dni mnemonic
-+ (.str "Shift Left, variable, " mnemonic)
-+ ((FORMAT I7))
-+ (.str mnemonic " $r1=$r2,$r3")
-+ (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-1 ve)
-+ (f-31-2 x2c) (f-29-2 x2b) ign_27_1 r3 r2 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I7 pshl2 7 0 1 0 0 0 1)
-+(I-I7 pshl4 7 1 0 0 0 0 1)
-+(I-I7 shl 7 1 1 0 0 0 1)
-+
-+(define-pmacro (I-I8 mnemonic op za zb ve x2a x2b x2c)
-+ (dni (.sym mnemonic "i")
-+ (.str "Shift Left, fixed, " mnemonic)
-+ ((FORMAT I8))
-+ (.str mnemonic " $r1=$r2,$ccount5")
-+ (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-1 ve)
-+ (f-31-2 x2c) (f-29-2 x2b) ign_27_3 ccount5 r2 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I8 pshl2 7 0 1 0 0 0 1)
-+(I-I8 pshl4 7 1 0 0 0 0 1)
-+
-+(define-pmacro (I-I9 mnemonic op za zb ve x2a x2b x2c)
-+ (dni mnemonic
-+ (.str "Population Count, " mnemonic)
-+ ((FORMAT I9))
-+ (.str mnemonic " $r1=$r3")
-+ (+ (f-opcode op) (f-36-1 za) (f-35-2 x2a) (f-33-1 zb) (f-32-1 ve)
-+ (f-31-2 x2c) (f-29-2 x2b) ign_27_1 r3 (f-19-7 0) r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I9 popcnt 7 0 1 0 1 1 2)
-+
-+(define-pmacro (I-I10 mnemonic op x2 x)
-+ (dni mnemonic
-+ (.str "Shift Right Pair, " mnemonic)
-+ ((FORMAT I10))
-+ (.str mnemonic " $r1=$r2,$r3,$count6")
-+ (+ (f-opcode op) ign_36_1 (f-35-2 x2) (f-33-1 x) count6 r3 r2 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I10 shrp 5 3 0)
-+
-+(define-pmacro (I-I11 mnemonic op x2 x y)
-+ (dni mnemonic
-+ (.str "Extract, " mnemonic)
-+ ((FORMAT I11))
-+ (.str mnemonic " $r1=$r3,$pos6,$len6")
-+ (+ (f-opcode op) ign_36_1 (f-35-2 x2) (f-33-1 x) (f-13-1 y)
-+ r3 pos6 len6 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I11 extr.u 5 1 0 0)
-+(I-I11 extr 5 1 0 1)
-+
-+(define-pmacro (I-I12 mnemonic op x2 x y)
-+ (dni mnemonic
-+ (.str "Zero and Deposit, " mnemonic)
-+ ((FORMAT I12))
-+ (.str mnemonic " $r1=$r2,$cpos6a,$len6")
-+ (+ (f-opcode op) ign_36_1 (f-35-2 x2) (f-33-1 x) (f-26-1 y)
-+ r2 cpos6a len6 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I12 dep.z 5 1 1 0)
-+
-+(define-pmacro (I-I13 mnemonic op x2 x y)
-+ (dni (.sym mnemonic "i")
-+ (.str "Zero and Deposit Immediate, " mnemonic)
-+ ((FORMAT I13))
-+ (.str mnemonic " $r1=$imm8,$cpos6a,$len6")
-+ (+ (f-opcode op) (f-35-2 x2) (f-33-1 x) (f-26-1 y)
-+ imm8 cpos6a len6 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I13 dep.z 5 1 1 0)
-+
-+(define-pmacro (I-I14 mnemonic op x2 x)
-+ (dni (.sym mnemonic "i")
-+ (.str "Deposit Immediate, " mnemonic)
-+ ((FORMAT I14))
-+ (.str mnemonic " $r1=$imm1,$r3,$cpos6b,$len6")
-+ (+ (f-opcode op) (f-35-2 x2) (f-33-1 x) ign_13_1
-+ imm1 r3 cpos6b len6 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I14 dep 5 3 1)
-+
-+(define-pmacro (I-I15 mnemonic op)
-+ (dni mnemonic
-+ (.str "Deposit, " mnemonic)
-+ ((FORMAT I15))
-+ (.str mnemonic " $r1=$r2,$r3,$cpos6c,$len4")
-+ (+ (f-opcode op) cpos6c len4 r2 r3 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I15 dep 4)
-+
-+(define-pmacro (I-I16 mnemonic ctype-attr op x2 ta tb y c)
-+ (dni mnemonic
-+ (.str "Test Bit, " mnemonic)
-+ ((FORMAT I16) (FIELD-CTYPE ctype-attr))
-+ (.str mnemonic " $p1,$p2=$r3,$pos6")
-+ (+ (f-opcode op) (f-36-1 tb) (f-35-2 x2) (f-33-1 ta) (f-13-1 y)
-+ (f-12-1 c) p2 r3 pos6 p1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(define-pmacro (I-I16-ctype mnemonic ctype op x2 ta tb y c)
-+ (I-I16 (.sym mnemonic
-+ (.eval (if (eq? (string-length ctype) 0) "" "."))
-+ ctype)
-+ (.eval (if (eq? (string-length ctype) 0) 'NONE
-+ (string->symbol ctype)))
-+ op x2 ta tb y c)
-+)
-+
-+(I-I16-ctype tbit.z "" 5 0 0 0 0 0)
-+(I-I16-ctype tbit.z "unc" 5 0 0 0 0 1)
-+(I-I16-ctype tbit.z "and" 5 0 0 1 0 0)
-+(I-I16-ctype tbit.nz "and" 5 0 0 1 0 1)
-+(I-I16-ctype tbit.z "or" 5 0 1 0 0 0)
-+(I-I16-ctype tbit.nz "or" 5 0 1 0 0 1)
-+(I-I16-ctype tbit.z "or.andcm" 5 0 1 1 0 0)
-+(I-I16-ctype tbit.nz "or.andcm" 5 0 1 1 0 1)
-+
-+(define-pmacro (I-I17 mnemonic ctype-attr op x2 ta tb y c)
-+ (dni mnemonic
-+ (.str "Test Bit, " mnemonic)
-+ ((FORMAT I17) (FIELD-CTYPE ctype-attr))
-+ (.str mnemonic " $p1,$p2=$r3")
-+ (+ (f-opcode op) (f-36-1 tb) (f-35-2 x2) (f-33-1 ta) (f-13-1 y)
-+ (f-12-1 c) p2 r3 ign_19_6 p1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(define-pmacro (I-I17-ctype mnemonic ctype op x2 ta tb y c)
-+ (I-I17 (.sym mnemonic
-+ (.eval (if (eq? (string-length ctype) 0) "" "."))
-+ ctype)
-+ (.eval (if (eq? (string-length ctype) 0) 'NONE
-+ (string->symbol ctype)))
-+ op x2 ta tb y c)
-+)
-+
-+(I-I17-ctype tnat.z "" 5 0 0 0 0 0)
-+(I-I17-ctype tnat.z "unc" 5 0 0 0 0 1)
-+(I-I17-ctype tnat.z "and" 5 0 0 1 0 0)
-+(I-I17-ctype tnat.nz "and" 5 0 0 1 0 1)
-+(I-I17-ctype tnat.z "or" 5 0 1 0 0 0)
-+(I-I17-ctype tnat.nz "or" 5 0 1 0 0 1)
-+(I-I17-ctype tnat.z "or.andcm" 5 0 1 1 0 0)
-+(I-I17-ctype tnat.nz "or.andcm" 5 0 1 1 0 1)
-+
-+(define-pmacro (I-I18 mnemonic op vc)
-+ (dni mnemonic
-+ (.str "Move Long Immediate, " mnemonic)
-+ ((FORMAT I18))
-+ (.str mnemonic " $r1=$imm64")
-+ (+ (f-opcode op) (f-20-1 vc) r1 imm64 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I18 movl 6 0)
-+
-+(define-pmacro (I-I19 mnemonic op x3 x6)
-+ (dni mnemonic
-+ (.str "Break/Nop, " mnemonic)
-+ ((FORMAT I19))
-+ (.str mnemonic " $imm21")
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_26_1 imm21 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I19 break.i 0 0 0)
-+(I-I19 nop.i 0 0 1)
-+
-+(define-pmacro (I-I20 mnemonic op x3)
-+ (dni mnemonic
-+ (.str "Integer Speculation Check, " mnemonic)
-+ ((FORMAT I20))
-+ (.str mnemonic " $r2,$tgt25a")
-+ (+ (f-opcode op) (f-35-3 x3) tgt25a r2 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I20 chk.s.i 0 1)
-+
-+(define-pmacro (I-I21 mnemonic op x3 x)
-+ (dni (.sym mnemonic _tbr)
-+ (.str "Move to BR, " mnemonic)
-+ ((FORMAT I21))
-+ (.str mnemonic
-+ "$movbr_mwh$movbr_ih $b1=$r2,$tag13a")
-+ (+ (f-opcode op) (f-35-3 x3) movbr_ih (f-22-1 x) movbr_mwh
-+ (f-12-1 x) (f-11-3 x3) ign_36_1 b1 r2 tag13a qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I21 mov 0 7 0)
-+(I-I21 mov.ret 0 7 1)
-+
-+(define-pmacro (I-I22 mnemonic op x3 x6)
-+ (dni (.sym mnemonic _fbr)
-+ (.str "Move from BR, " mnemonic)
-+ ((FORMAT I22))
-+ (.str mnemonic " $r1=$b2")
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_36_1 ign_26_11
-+ r1 b2 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I22 mov 0 0 #x31)
-+
-+(define-pmacro (I-I23 mnemonic op x3)
-+ (dni (.sym mnemonic _tpr)
-+ (.str "Move to PR, reg, " mnemonic)
-+ ((FORMAT I23))
-+ (.str mnemonic " pr=$r2,$imm17")
-+ (+ (f-opcode op) (f-35-3 x3) ign_32_1 ign_23_4 r2 imm17 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I23 mov 0 3)
-+
-+(define-pmacro (I-I24 mnemonic op x3)
-+ (dni (.sym mnemonic _tpri)
-+ (.str "Move to PR, imm, " mnemonic)
-+ ((FORMAT I24))
-+ (.str mnemonic " pr.rot=$imm44")
-+ (+ (f-opcode op) (f-35-3 x3) imm44 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I24 mov 0 2)
-+
-+(define-pmacro (I-I25 mnemonic src op x3 x6)
-+ (dni (.sym mnemonic _f src)
-+ (.str "Move from Pred/IP, " mnemonic)
-+ ((FORMAT I25))
-+ (.str mnemonic " $r1=" src)
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_26_7 ign_19_7 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I25 mov ip 0 0 #x30)
-+(I-I25 mov pr 0 0 #x33)
-+
-+(define-pmacro (I-I26 mnemonic op x3 x6)
-+ (dni (.sym mnemonic _tar)
-+ (.str "Move to AR, reg, " mnemonic)
-+ ((FORMAT I26))
-+ (.str mnemonic " $ar3=$r2")
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_36_1 ign_12_7 ar3 r2 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I26 mov.i 0 0 #x2A)
-+
-+(define-pmacro (I-I27 mnemonic op x3 x6)
-+ (dni (.sym mnemonic _tari)
-+ (.str "Move to AR, imm, " mnemonic)
-+ ((FORMAT I27))
-+ (.str mnemonic " $ar3=$imm8")
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_12_7 ar3 imm8 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I27 mov.i 0 0 #x0A)
-+
-+(define-pmacro (I-I28 mnemonic op x3 x6)
-+ (dni (.sym mnemonic _far)
-+ (.str "Move from AR, " mnemonic)
-+ ((FORMAT I28))
-+ (.str mnemonic " $r1=$ar3")
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_36_1 ign_19_7 ar3 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I28 mov.i 0 0 #x32)
-+
-+(define-pmacro (I-I29 mnemonic op x3 x6)
-+ (dni mnemonic
-+ (.str "Sign/Zero Extend/Compute Zero Index, " mnemonic)
-+ ((FORMAT I29))
-+ (.str mnemonic " $r1=$r3")
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_36_1 ign_19_7 r3 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-I29 zxt1 0 0 #x10)
-+(I-I29 zxt2 0 0 #x11)
-+(I-I29 zxt4 0 0 #x12)
-+
-+(I-I29 sxt1 0 0 #x14)
-+(I-I29 sxt2 0 0 #x15)
-+(I-I29 sxt4 0 0 #x16)
-+
-+(I-I29 czx1.l 0 0 #x18)
-+(I-I29 czx2.l 0 0 #x19)
-+(I-I29 czx1.r 0 0 #x1C)
-+(I-I29 czx2.r 0 0 #x1D)
-+
-+;;; "M" Format Instruction definitions.
-+
-+(define-pmacro (apply-ildspec macro mnemonic x6-2)
-+ (begin
-+ (.apply macro (.splice mnemonic x6-2))
-+ (.apply macro (.splice (.sym mnemonic .s) (.eval (+ x6-2 #x04))))
-+ (.apply macro (.splice (.sym mnemonic .a) (.eval (+ x6-2 #x08))))
-+ (.apply macro (.splice (.sym mnemonic .sa) (.eval (+ x6-2 #x0C))))
-+ (.apply macro (.splice (.sym mnemonic .bias) (.eval (+ x6-2 #x10))))
-+ (.apply macro (.splice (.sym mnemonic .acq) (.eval (+ x6-2 #x14))))
-+ (.apply macro (.splice (.sym mnemonic .c.clr) (.eval (+ x6-2 #x20))))
-+ (.apply macro (.splice (.sym mnemonic .c.nc) (.eval (+ x6-2 #x24))))
-+ (.apply macro (.splice (.sym mnemonic .c.clr.acq) (.eval (+ x6-2 #x28))))
-+ )
-+)
-+
-+(define-pmacro (I-M1 mnemonic op m x x6)
-+ (dni mnemonic
-+ (.str "Integer Load, " mnemonic)
-+ ((FORMAT M1))
-+ (.str mnemonic "$ldhint $r1=[$r3]")
-+ (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) ldhint (f-27-1 x)
-+ r3 r1 ign_19_7 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(apply-ildspec
-+ (.pmacro (mnemonic x6)
-+ (I-M1 mnemonic 4 0 0 x6))
-+ ld1 0)
-+
-+(apply-ildspec
-+ (.pmacro (mnemonic x6)
-+ (I-M1 mnemonic 4 0 0 x6))
-+ ld2 1)
-+
-+(apply-ildspec
-+ (.pmacro (mnemonic x6)
-+ (I-M1 mnemonic 4 0 0 x6))
-+ ld4 2)
-+
-+(apply-ildspec
-+ (.pmacro (mnemonic x6)
-+ (I-M1 mnemonic 4 0 0 x6))
-+ ld8 3)
-+
-+(I-M1 ld8.fill 4 0 0 #x1B)
-+
-+(define-pmacro (I-M2 mnemonic op m x x6)
-+ (dni (.sym mnemonic .ir)
-+ (.str "Integer Load, incr reg, " mnemonic)
-+ ((FORMAT M2))
-+ (.str mnemonic "$ldhint $r1=[$r3],$r2")
-+ (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) ldhint (f-27-1 x)
-+ r3 r2 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(apply-ildspec
-+ (.pmacro (mnemonic x6)
-+ (I-M2 mnemonic 4 1 0 x6))
-+ ld1 0)
-+
-+(apply-ildspec
-+ (.pmacro (mnemonic x6)
-+ (I-M2 mnemonic 4 1 0 x6))
-+ ld2 1)
-+
-+(apply-ildspec
-+ (.pmacro (mnemonic x6)
-+ (I-M2 mnemonic 4 1 0 x6))
-+ ld4 2)
-+
-+(apply-ildspec
-+ (.pmacro (mnemonic x6)
-+ (I-M2 mnemonic 4 1 0 x6))
-+ ld8 3)
-+
-+(I-M2 ld8.fill 4 1 0 #x1B)
-+
-+(define-pmacro (I-M3 mnemonic op x6)
-+ (dni (.sym mnemonic .ii)
-+ (.str "Integer Load, incr imm, " mnemonic)
-+ ((FORMAT M3))
-+ (.str mnemonic "$ldhint $r1=[$r3],$imm9a")
-+ (+ (f-opcode op) (f-35-6 x6) ldhint r3 imm9a r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(apply-ildspec
-+ (.pmacro (mnemonic x6)
-+ (I-M3 mnemonic 5 x6))
-+ ld1 0)
-+
-+(apply-ildspec
-+ (.pmacro (mnemonic x6)
-+ (I-M3 mnemonic 5 x6))
-+ ld2 1)
-+
-+(apply-ildspec
-+ (.pmacro (mnemonic x6)
-+ (I-M3 mnemonic 5 x6))
-+ ld4 2)
-+
-+(apply-ildspec
-+ (.pmacro (mnemonic x6)
-+ (I-M3 mnemonic 5 x6))
-+ ld8 3)
-+
-+(I-M3 ld8.fill 5 #x1B)
-+
-+(define-pmacro (apply-istspec macro mnemonic x6-2)
-+ (begin
-+ (.apply macro (.splice mnemonic x6-2))
-+ (.apply macro (.splice (.sym mnemonic .rel) (.eval (+ x6-2 #x04))))
-+ )
-+)
-+
-+(define-pmacro (I-M4 mnemonic op m x x6)
-+ (dni mnemonic
-+ (.str "Integer Store, " mnemonic)
-+ ((FORMAT M4))
-+ (.str mnemonic "$sthint [$r3]=$r2")
-+ (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) (f-27-1 x)
-+ sthint r3 r2 ign_12_7 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(apply-istspec
-+ (.pmacro (mnemonic x6)
-+ (I-M4 mnemonic 4 0 0 x6))
-+ st1 #x30)
-+
-+(apply-istspec
-+ (.pmacro (mnemonic x6)
-+ (I-M4 mnemonic 4 0 0 x6))
-+ st2 #x31)
-+
-+(apply-istspec
-+ (.pmacro (mnemonic x6)
-+ (I-M4 mnemonic 4 0 0 x6))
-+ st4 #x32)
-+
-+(apply-istspec
-+ (.pmacro (mnemonic x6)
-+ (I-M4 mnemonic 4 0 0 x6))
-+ st8 #x33)
-+
-+(I-M4 st8.spill 4 0 0 #x3B)
-+
-+(define-pmacro (I-M5 mnemonic op x6)
-+ (dni (.sym mnemonic .ii)
-+ (.str "Integer Store, incr imm, " mnemonic)
-+ ((FORMAT M5))
-+ (.str mnemonic "$sthint [$r3]=$r2,$imm9b")
-+ (+ (f-opcode op) (f-35-6 x6) sthint r3 imm9b r2 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(apply-istspec
-+ (.pmacro (mnemonic x6)
-+ (I-M5 mnemonic 5 x6))
-+ st1 #x30)
-+
-+(apply-istspec
-+ (.pmacro (mnemonic x6)
-+ (I-M5 mnemonic 5 x6))
-+ st2 #x31)
-+
-+(apply-istspec
-+ (.pmacro (mnemonic x6)
-+ (I-M5 mnemonic 5 x6))
-+ st4 #x32)
-+
-+(apply-istspec
-+ (.pmacro (mnemonic x6)
-+ (I-M5 mnemonic 5 x6))
-+ st8 #x33)
-+
-+(I-M5 st8.spill 5 #x3B)
-+
-+(define-pmacro (apply-fldspec macro mnemonic x6-2)
-+ (begin
-+ (.apply macro (.splice mnemonic x6-2))
-+ (.apply macro (.splice (.sym mnemonic .s) (.eval (+ x6-2 #x04))))
-+ (.apply macro (.splice (.sym mnemonic .a) (.eval (+ x6-2 #x08))))
-+ (.apply macro (.splice (.sym mnemonic .sa) (.eval (+ x6-2 #x0C))))
-+ (.apply macro (.splice (.sym mnemonic .c.clr) (.eval (+ x6-2 #x20))))
-+ (.apply macro (.splice (.sym mnemonic .c.nc) (.eval (+ x6-2 #x24))))
-+ )
-+)
-+
-+(define-pmacro (I-M6 mnemonic op m x x6)
-+ (dni mnemonic
-+ (.str "Floating-point Load, " mnemonic)
-+ ((FORMAT M6))
-+ (.str mnemonic "$ldhint $f1=[$r3]")
-+ (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) ldhint (f-27-1 x)
-+ r3 f1 ign_19_7 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(apply-fldspec
-+ (.pmacro (mnemonic x6)
-+ (I-M6 mnemonic 6 0 0 x6))
-+ ldfs 2)
-+
-+(apply-fldspec
-+ (.pmacro (mnemonic x6)
-+ (I-M6 mnemonic 6 0 0 x6))
-+ ldfd 3)
-+
-+(apply-fldspec
-+ (.pmacro (mnemonic x6)
-+ (I-M6 mnemonic 6 0 0 x6))
-+ ldf8 1)
-+
-+(apply-fldspec
-+ (.pmacro (mnemonic x6)
-+ (I-M6 mnemonic 6 0 0 x6))
-+ ldfe 0)
-+
-+(I-M6 ldf.fill 6 0 0 #x1B)
-+
-+(define-pmacro (I-M7 mnemonic op m x x6)
-+ (dni (.sym mnemonic .ir)
-+ (.str "Floating-point Load, incr reg, " mnemonic)
-+ ((FORMAT M7))
-+ (.str mnemonic "$ldhint $f1=[$r3],$r2")
-+ (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) ldhint (f-27-1 x)
-+ r3 r2 f1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(apply-fldspec
-+ (.pmacro (mnemonic x6)
-+ (I-M7 mnemonic 6 1 0 x6))
-+ ldfs 2)
-+
-+(apply-fldspec
-+ (.pmacro (mnemonic x6)
-+ (I-M7 mnemonic 6 1 0 x6))
-+ ldfd 3)
-+
-+(apply-fldspec
-+ (.pmacro (mnemonic x6)
-+ (I-M7 mnemonic 6 1 0 x6))
-+ ldf8 1)
-+
-+(apply-fldspec
-+ (.pmacro (mnemonic x6)
-+ (I-M7 mnemonic 6 1 0 x6))
-+ ldfe 0)
-+
-+(I-M7 ldf.fill 6 1 0 #x1B)
-+
-+(define-pmacro (I-M8 mnemonic op x6)
-+ (dni (.sym mnemonic .ii)
-+ (.str "Floating-point Load, incr imm, " mnemonic)
-+ ((FORMAT M8))
-+ (.str mnemonic "$ldhint $f1=[$r3],$imm9a")
-+ (+ (f-opcode op) (f-35-6 x6) ldhint r3 imm9a f1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(apply-fldspec
-+ (.pmacro (mnemonic x6)
-+ (I-M8 mnemonic 7 x6))
-+ ldfs 2)
-+
-+(apply-fldspec
-+ (.pmacro (mnemonic x6)
-+ (I-M8 mnemonic 7 x6))
-+ ldfd 3)
-+
-+(apply-fldspec
-+ (.pmacro (mnemonic x6)
-+ (I-M8 mnemonic 7 x6))
-+ ldf8 1)
-+
-+(apply-fldspec
-+ (.pmacro (mnemonic x6)
-+ (I-M8 mnemonic 7 x6))
-+ ldfe 0)
-+
-+(I-M8 ldf.fill 7 #x1B)
-+
-+(define-pmacro (I-M9 mnemonic op m x x6)
-+ (dni mnemonic
-+ (.str "Floating-point Store, " mnemonic)
-+ ((FORMAT M9))
-+ (.str mnemonic "$sthint [$r3]=$f2")
-+ (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) (f-27-1 x)
-+ sthint r3 f2 ign_12_7 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M9 stfs 6 0 0 #x32)
-+(I-M9 stfd 6 0 0 #x33)
-+(I-M9 stf8 6 0 0 #x31)
-+(I-M9 stfe 6 0 0 #x30)
-+(I-M9 stf.spill 6 0 0 #x3B)
-+
-+(define-pmacro (I-M10 mnemonic op x6)
-+ (dni (.sym mnemonic .ii)
-+ (.str "Floating-point Store, incr imm, " mnemonic)
-+ ((FORMAT M10))
-+ (.str mnemonic "$sthint [$r3]=$f2,$imm9b")
-+ (+ (f-opcode op) (f-35-6 x6) sthint r3 imm9b f2 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M10 stfs 7 #x32)
-+(I-M10 stfd 7 #x33)
-+(I-M10 stf8 7 #x31)
-+(I-M10 stfe 7 #x30)
-+(I-M10 stf.spill 7 #x3B)
-+
-+(define-pmacro (I-M11 mnemonic op m x x6)
-+ (dni mnemonic
-+ (.str "Floating-point Load Pair, " mnemonic)
-+ ((FORMAT M11))
-+ (.str mnemonic "$ldhint $f1,$f2=[$r3]")
-+ (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) ldhint (f-27-1 x)
-+ r3 f1 f2 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(apply-fldspec
-+ (.pmacro (mnemonic x6)
-+ (I-M11 mnemonic 6 0 1 x6))
-+ ldfps 2)
-+
-+(apply-fldspec
-+ (.pmacro (mnemonic x6)
-+ (I-M11 mnemonic 6 0 1 x6))
-+ ldfpd 3)
-+
-+(apply-fldspec
-+ (.pmacro (mnemonic x6)
-+ (I-M11 mnemonic 6 0 1 x6))
-+ ldfp8 1)
-+
-+(define-pmacro (I-M12 mnemonic n op m x x6)
-+ (dni mnemonic
-+ (.str "Floating-point Load Pair, incr imm, " mnemonic)
-+ ((FORMAT M12))
-+ (.str mnemonic "$ldhint $f1,$f2=[$r3]," n)
-+ (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) ldhint (f-27-1 x)
-+ r3 f1 f2 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(apply-fldspec
-+ (.pmacro (mnemonic x6)
-+ (I-M12 mnemonic 8 6 1 1 x6))
-+ ldfps 2)
-+
-+(apply-fldspec
-+ (.pmacro (mnemonic x6)
-+ (I-M12 mnemonic 16 6 1 1 x6))
-+ ldfpd 3)
-+
-+(apply-fldspec
-+ (.pmacro (mnemonic x6)
-+ (I-M12 mnemonic 16 6 1 1 x6))
-+ ldfp8 1)
-+
-+(define-pmacro (apply-lftype macro mnemonic)
-+ (begin
-+ (.apply macro (.splice mnemonic NONE #x2C))
-+ (.apply macro (.splice (.sym mnemonic .excl) NONE #x2D))
-+ (.apply macro (.splice (.sym mnemonic .fault) fault #x2E))
-+ (.apply macro (.splice (.sym mnemonic .fault.excl) fault #x2F))
-+ )
-+)
-+
-+(define-pmacro (I-M13 mnemonic fault-attr op m x x6)
-+ (dni (.sym mnemonic)
-+ (.str "Line Prefetch, " mnemonic)
-+ ((FORMAT M13) (FIELD-LFTYPE fault-attr))
-+ (.str mnemonic "$lfhint [$r3]")
-+ (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) lfhint (f-27-1 x)
-+ r3 ign_19_7 ign_12_7 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(apply-lftype
-+ (.pmacro (mnemonic fault-attr x6)
-+ (I-M13 mnemonic fault-attr 6 0 0 x6))
-+ lfetch)
-+
-+(define-pmacro (I-M14 mnemonic fault-attr op m x x6)
-+ (dni (.sym mnemonic .ir)
-+ (.str "Line Prefetch, incr reg" mnemonic)
-+ ((FORMAT M14) (FIELD-LFTYPE fault-attr))
-+ (.str mnemonic "$lfhint [$r3],$r2")
-+ (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) lfhint (f-27-1 x)
-+ r3 r2 ign_12_7 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(apply-lftype
-+ (.pmacro (mnemonic fault-attr x6)
-+ (I-M14 mnemonic fault-attr 6 0 0 x6))
-+ lfetch)
-+
-+(define-pmacro (I-M15 mnemonic fault-attr op x6)
-+ (dni (.sym mnemonic .ii)
-+ (.str "Line Prefetch, incr imm" mnemonic)
-+ ((FORMAT M15) (FIELD-LFTYPE fault-attr))
-+ (.str mnemonic "$lfhint [$r3],$imm9a")
-+ (+ (f-opcode op) (f-35-6 x6) lfhint r3 imm9a ign_12_7 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(apply-lftype
-+ (.pmacro (mnemonic fault-attr x6)
-+ (I-M15 mnemonic fault-attr 7 x6))
-+ lfetch)
-+
-+(define-pmacro (I-M16 mnemonic extra op m x x6)
-+ (dni mnemonic
-+ (.str "Exchange/Compare and Exchange, " mnemonic)
-+ ((FORMAT M16))
-+ (.str mnemonic "$ldhint $r1=[$r3],$r2" extra)
-+ (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) (f-27-1 x)
-+ ldhint r3 r2 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M16 cmpxchg1.acq ",ar.ccv" 4 0 1 #x00)
-+(I-M16 cmpxchg2.acq ",ar.ccv" 4 0 1 #x01)
-+(I-M16 cmpxchg4.acq ",ar.ccv" 4 0 1 #x02)
-+(I-M16 cmpxchg8.acq ",ar.ccv" 4 0 1 #x03)
-+
-+(I-M16 cmpxchg1.rel ",ar.ccv" 4 0 1 #x04)
-+(I-M16 cmpxchg2.rel ",ar.ccv" 4 0 1 #x05)
-+(I-M16 cmpxchg4.rel ",ar.ccv" 4 0 1 #x06)
-+(I-M16 cmpxchg8.rel ",ar.ccv" 4 0 1 #x07)
-+
-+(I-M16 xchg1.rel "" 4 0 1 #x08)
-+(I-M16 xchg2.rel "" 4 0 1 #x09)
-+(I-M16 xchg4.rel "" 4 0 1 #x0A)
-+(I-M16 xchg8.rel "" 4 0 1 #x0B)
-+
-+(define-pmacro (I-M17 mnemonic op m x x6)
-+ (dni mnemonic
-+ (.str "Fetch and Add, " mnemonic)
-+ ((FORMAT M17))
-+ (.str mnemonic "$ldhint $r1=[$r3],$inc3")
-+ (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) (f-27-1 x)
-+ ldhint r3 ign_19_4 inc3 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M17 fetchadd4.acq 4 0 1 #x12)
-+(I-M17 fetchadd8.acq 4 0 1 #x13)
-+(I-M17 fetchadd4.rel 4 0 1 #x16)
-+(I-M17 fetchadd8.rel 4 0 1 #x17)
-+
-+(define-pmacro (I-M18 mnemonic op m x x6)
-+ (dni mnemonic
-+ (.str "Set FR, " mnemonic)
-+ ((FORMAT M18))
-+ (.str mnemonic " $f1=$r2")
-+ (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) (f-27-1 x)
-+ ign_26_7 ign_29_2 r2 f1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M18 setf.sig 6 0 1 #x1C)
-+(I-M18 setf.exp 6 0 1 #x1D)
-+(I-M18 setf.s 6 0 1 #x1E)
-+(I-M18 setf.d 6 0 1 #x1F)
-+
-+(define-pmacro (I-M19 mnemonic op m x x6)
-+ (dni mnemonic
-+ (.str "Get FR, " mnemonic)
-+ ((FORMAT M19))
-+ (.str mnemonic " $r1=$f2")
-+ (+ (f-opcode op) (f-36-1 m) (f-35-6 x6) (f-27-1 x)
-+ ign_26_7 ign_29_2 f2 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M19 getf.sig 4 0 1 #x1C)
-+(I-M19 getf.exp 4 0 1 #x1D)
-+(I-M19 getf.s 4 0 1 #x1E)
-+(I-M19 getf.d 4 0 1 #x1F)
-+
-+(define-pmacro (I-M20 mnemonic op x3)
-+ (dni mnemonic
-+ (.str "Integer Speculation Check, " mnemonic)
-+ ((FORMAT M20))
-+ (.str mnemonic " $r2,$tgt25a")
-+ (+ (f-opcode op) (f-35-3 x3) r2 tgt25a qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M20 chk.s.m 1 1)
-+
-+(define-pmacro (I-M21 mnemonic op x3)
-+ (dni (.sym mnemonic .f)
-+ (.str "Floating-point Speculation Check, " mnemonic)
-+ ((FORMAT M21))
-+ (.str mnemonic " $f2,$tgt25a")
-+ (+ (f-opcode op) (f-35-3 x3) f2 tgt25a qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M21 chk.s 1 3)
-+
-+(define-pmacro (I-M22 mnemonic op x3)
-+ (dni mnemonic
-+ (.str "Integer Advanced Load Check, " mnemonic)
-+ ((FORMAT M22))
-+ (.str mnemonic " $r1,$tgt25c")
-+ (+ (f-opcode op) (f-35-3 x3) tgt25c r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M22 chk.a.nc 0 4)
-+(I-M22 chk.a.clr 0 5)
-+
-+(define-pmacro (I-M23 mnemonic op x3)
-+ (dni (.sym mnemonic .f)
-+ (.str "Floating-point Advanced Load Check, " mnemonic)
-+ ((FORMAT M23))
-+ (.str mnemonic " $f1,$tgt25c")
-+ (+ (f-opcode op) (f-35-3 x3) tgt25c f1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M22 chk.a.nc 0 6)
-+(I-M22 chk.a.clr 0 7)
-+
-+(define-pmacro (I-M24 mnemonic op x3 x4 x2)
-+ (dni mnemonic
-+ (.str "Sync/Fence/Serialize/ALAT Control, " mnemonic)
-+ ((FORMAT M24))
-+ (.str mnemonic)
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-2 x2) (f-30-4 x4)
-+ ign_36_1 ign_26_7 ign_19_7 ign_12_7 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M24 invala 0 0 0 1)
-+(I-M24 fwb 0 0 0 2)
-+(I-M24 mf 0 0 2 2)
-+(I-M24 mf.a 0 0 3 2)
-+(I-M24 srlz.d 0 0 0 3)
-+(I-M24 srlz.i 0 0 1 3)
-+(I-M24 sync.i 0 0 3 3)
-+
-+(define-pmacro (I-M25 mnemonic op x3 x4 x2)
-+ (dni mnemonic
-+ (.str "RSE Control, " mnemonic)
-+ ((FORMAT M25))
-+ (.str mnemonic)
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-2 x2) (f-30-4 x4)
-+ ign_36_1 ign_26_7 ign_19_7 ign_12_7 (f-qp 0))
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M25 flushrs 0 0 #xC 0)
-+(I-M25 loadrs 0 0 #xA 0)
-+
-+(define-pmacro (I-M26 mnemonic op x3 x4 x2)
-+ (dni mnemonic
-+ (.str "Integer ALAT Entry Invalidate, " mnemonic)
-+ ((FORMAT M26))
-+ (.str mnemonic " $r1")
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-2 x2) (f-30-4 x4)
-+ ign_36_1 ign_26_7 ign_19_7 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M26 invala.e 0 0 2 1)
-+
-+(define-pmacro (I-M27 mnemonic op x3 x4 x2)
-+ (dni (.sym mnemonic .f)
-+ (.str "Floating-point ALAT Entry Invalidate, " mnemonic)
-+ ((FORMAT M27))
-+ (.str mnemonic " $f1")
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-2 x2) (f-30-4 x4)
-+ ign_36_1 ign_26_7 ign_19_7 f1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M27 invala.e 0 0 3 1)
-+
-+(define-pmacro (I-M28 mnemonic op x3 x6)
-+ (dni mnemonic
-+ (.str "Flush Cache/Purge Translation Cache Entry, " mnemonic)
-+ ((FORMAT M28))
-+ (.str mnemonic " $r3")
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6)
-+ ign_36_1 r3 ign_19_7 ign_12_7 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M28 fc 1 0 #x30)
-+(I-M28 ptc.e 1 0 #x34)
-+
-+(define-pmacro (I-M29 mnemonic op x3 x6)
-+ (dni (.sym mnemonic _tar)
-+ (.str "Move to AR, reg, " mnemonic)
-+ ((FORMAT M29))
-+ (.str mnemonic " $ar3=$r2")
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6)
-+ ign_36_1 ar3 r2 ign_12_7 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M29 mov.m 1 0 #x2A)
-+
-+(define-pmacro (I-M30 mnemonic op x3 x4 x2)
-+ (dni (.sym mnemonic _tari)
-+ (.str "Move to AR, imm," mnemonic)
-+ ((FORMAT M30))
-+ (.str mnemonic " $ar3=$imm8")
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-2 x2) (f-30-4 x4)
-+ ar3 imm8 ign_12_7 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M30 mov.m 0 0 8 2)
-+
-+(define-pmacro (I-M31 mnemonic op x3 x6)
-+ (dni (.sym mnemonic _far)
-+ (.str "Move from AR, " mnemonic)
-+ ((FORMAT M31))
-+ (.str mnemonic " $r1=$ar3")
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_36_1 ign_19_7 ar3 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M31 mov.m 1 0 #x22)
-+
-+(define-pmacro (I-M32 mnemonic op x3 x6)
-+ (dni (.sym mnemonic _tcr)
-+ (.str "Move to CR, " mnemonic)
-+ ((FORMAT M32))
-+ (.str mnemonic " $cr3=$r2")
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6)
-+ ign_36_1 cr3 r2 ign_12_7 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M32 mov 1 0 #x2C)
-+
-+(define-pmacro (I-M33 mnemonic op x3 x6)
-+ (dni (.sym mnemonic _fcr)
-+ (.str "Move from CR, " mnemonic)
-+ ((FORMAT M33))
-+ (.str mnemonic " $r1=$cr3")
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6)
-+ ign_36_1 cr3 ign_19_7 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M33 mov 1 0 #x24)
-+
-+(define-pmacro (I-M34 mnemonic op x3)
-+ (dni mnemonic
-+ (.str "Allocate Register Stack Frame, " mnemonic)
-+ ((FORMAT M34))
-+ (.str mnemonic " $r1=ar.pfs,$sorsolsof")
-+ (+ (f-opcode op) (f-35-3 x3) ign_36_1 ign_32_2
-+ sorsolsof r1 (f-qp 0))
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M34 alloc 1 6)
-+
-+(define-pmacro (I-M35 mnemonic which op x3 x6)
-+ (dni (.sym mnemonic _t which)
-+ (.str "Move to PSR, " mnemonic)
-+ ((FORMAT M35))
-+ (.str mnemonic " " which "=$r2")
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_36_1
-+ r2 ign_26_7 ign_12_7 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M35 mov psr.l 1 0 #x2D)
-+(I-M35 mov psr.um 1 0 #x29)
-+
-+(define-pmacro (I-M36 mnemonic which op x3 x6)
-+ (dni (.sym mnemonic _f which)
-+ (.str "Move from PSR, " mnemonic)
-+ ((FORMAT M35))
-+ (.str mnemonic " $r1=" which)
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-6 x6) ign_36_1
-+ ign_26_7 ign_19_7 r1 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M36 mov psr 1 0 #x25)
-+(I-M36 mov psr.um 1 0 #x21)
-+
-+(define-pmacro (I-M37 mnemonic op x3 x4 x2)
-+ (dni mnemonic
-+ (.str "Break/Nop, " mnemonic)
-+ ((FORMAT M37))
-+ (.str mnemonic " $imm21")
-+ (+ (f-opcode op) (f-35-3 x3) (f-32-2 x2) (f-30-4 x4) ign_26_1 imm21 qp)
-+ ()
-+ ()
-+ )
-+)
-+
-+(I-M37 break.m 0 0 0 0)
-+(I-M37 nop.m 0 0 1 0)
-+
-diff -Nur binutils-2.24.orig/cgen/cpu/ip2k.cpu binutils-2.24/cgen/cpu/ip2k.cpu
---- binutils-2.24.orig/cgen/cpu/ip2k.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/ip2k.cpu 2016-06-30 21:26:12.617891712 +0200
-@@ -0,0 +1,1463 @@
-+; Ubicom IP2K CPU description. -*- Scheme -*-
-+; Copyright (C) 2000, 2001 Red Hat, Inc.
-+; Copyright (C) 2002 Free Software Foundation, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+(include "simplify.inc")
-+
-+; define-arch must appear first
-+
-+(define-arch
-+ (name ip2k) ; name of cpu family
-+ (comment "Ubicom IP2000 family")
-+ (default-alignment aligned)
-+ (insn-lsb0? #t)
-+ (machs ip2022 ip2022ext)
-+ (isas ip2k)
-+)
-+
-+; Attributes.
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name EXT-SKIP-INSN)
-+ (comment "instruction is a PAGE, LOADL, LOADH or BREAKX instruction")
-+)
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name SKIPA)
-+ (comment "instruction is a SKIP instruction")
-+)
-+
-+; Instruction set parameters.
-+
-+(define-isa
-+ (name ip2k)
-+ (comment "Ubicom IP2000 ISA")
-+
-+ (default-insn-word-bitsize 16)
-+ (default-insn-bitsize 16)
-+ (base-insn-bitsize 16)
-+)
-+
-+; Cpu family definitions.
-+
-+
-+(define-cpu
-+ ; cpu names must be distinct from the architecture name and machine names.
-+ (name ip2kbf)
-+ (comment "Ubicom IP2000 Family")
-+ (endian big)
-+ (word-bitsize 16)
-+)
-+
-+(define-mach
-+ (name ip2022)
-+ (comment "Ubicom IP2022")
-+ (cpu ip2kbf)
-+)
-+
-+(define-mach
-+ (name ip2022ext)
-+ (comment "Ubicom IP2022 extended")
-+ (cpu ip2kbf)
-+)
-+
-+
-+; Model descriptions.
-+
-+(define-model
-+ (name ip2k) (comment "VPE 2xxx") (attrs)
-+ (mach ip2022ext)
-+
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+
-+; FIXME: It might simplify things to separate the execute process from the
-+; one that updates the PC.
-+
-+; Instruction fields.
-+;
-+; Attributes:
-+; XXX: what VPE attrs
-+; PCREL-ADDR: pc relative value (for reloc and disassembly purposes)
-+; ABS-ADDR: absolute address (for reloc and disassembly purposes?)
-+; RESERVED: bits are not used to decode insn, must be all 0
-+; RELOC: there is a relocation associated with this field (experiment)
-+
-+
-+(dnf f-imm8 "imm8" () 7 8)
-+(dnf f-reg "reg" (ABS-ADDR) 8 9)
-+(dnf f-addr16cjp "addr16cjp" (ABS-ADDR) 12 13)
-+(dnf f-dir "dir" () 9 1)
-+(dnf f-bitno "bit number" () 11 3)
-+(dnf f-op3 "op3" () 15 3)
-+(dnf f-op4 "op4" () 15 4)
-+(dnf f-op4mid "op4mid" () 11 4)
-+(dnf f-op6 "op6" () 15 6)
-+(dnf f-op8 "op8" () 15 8)
-+(dnf f-op6-10low "op6-10low" () 9 10)
-+(dnf f-op6-7low "op6-7low" () 9 7)
-+(dnf f-reti3 "reti3" () 2 3)
-+(dnf f-skipb "sb/snb" (ABS-ADDR) 12 1)
-+(dnf f-page3 "page3" () 2 3)
-+;(define-ifield (name f-page3) (comment "page3") (attrs) (start 2) (length 3)
-+; (encode (value pc) (srl WI value 13))
-+; (decode (value pc) (sll WI value 13))
-+;)
-+; To fix the page/call asymmetry
-+;(define-ifield (name f-page3) (comment "page3") (attrs) (start 2) (length 3)
-+; (encode (value pc) (srl WI value 13))
-+; (decode (value pc) (sll WI value 13))
-+;)
-+
-+
-+
-+; Enums.
-+
-+; insn-op6: bits 15-10
-+(define-normal-insn-enum insn-op6 "op6 enums" () OP6_ f-op6
-+ (OTHER1 OTHER2 SUB DEC OR AND XOR ADD
-+ TEST NOT INC DECSZ RR RL SWAP INCSZ
-+ CSE POP SUBC DECSNZ MULU MULS INCSNZ ADDC
-+ - - - - - - - -
-+ - - - - - - - -
-+ - - - - - - - -
-+ - - - - - - - -
-+ - - - - - - - -
-+ )
-+)
-+
-+; insn-dir: bit 9
-+(define-normal-insn-enum insn-dir "dir enums" () DIR_ f-dir
-+ ; This bit specifies the polarity of many two-operand instructions:
-+ ; TO_W writes result to W regiser (eg. ADDC W,$fr)
-+ ; NOTTO_W writes result in general register (eg. ADDC $fr,W)
-+ (TO_W NOTTO_W)
-+)
-+
-+
-+; insn-op4: bits 15-12
-+(define-normal-insn-enum insn-op4 "op4 enums" () OP4_ f-op4
-+ (- - - - - - - LITERAL
-+ CLRB SETB SNB SB - - - -
-+ )
-+)
-+
-+; insn-op4mid: bits 11-8
-+; used for f-op4=LITERAL
-+(define-normal-insn-enum insn-op4mid "op4mid enums" () OP4MID_ f-op4mid
-+ (LOADH_L LOADL_L MULU_L MULS_L PUSH_L - CSNE_L CSE_L
-+ RETW_L CMP_L SUB_L ADD_L MOV_L OR_L AND_L XOR_L)
-+)
-+
-+; insn-op3: bits 15-13
-+(define-normal-insn-enum insn-op3 "op3 enums" () OP3_ f-op3
-+ (- - - - - - CALL JMP)
-+)
-+
-+
-+
-+; Hardware pieces.
-+
-+; Bank-relative general purpose registers
-+
-+; (define-pmacro (build-reg-name n) (.splice (.str "$" n) n))
-+
-+(define-keyword
-+ (name register-names)
-+ (print-name h-registers)
-+ (prefix "")
-+ (values
-+ ; These are the "Special Purpose Registers" that are not reserved
-+ ("ADDRSEL" #x2) ("ADDRX" #x3)
-+ ("IPH" #x4) ("IPL" #x5) ("SPH" #x6) ("SPL" #x7)
-+ ("PCH" #x8) ("PCL" #x9) ("WREG" #xA) ("STATUS" #xB)
-+ ("DPH" #xC) ("DPL" #xD) ("SPDREG" #xE) ("MULH" #xF)
-+ ("ADDRH" #x10) ("ADDRL" #x11) ("DATAH" #x12) ("DATAL" #x13)
-+ ("INTVECH" #x14) ("INTVECL" #x15) ("INTSPD" #x16) ("INTF" #x17)
-+ ("INTE" #x18) ("INTED" #x19) ("FCFG" #x1A) ("TCTRL" #x1B)
-+ ("XCFG" #x1C) ("EMCFG" #x1D) ("IPCH" #x1E) ("IPCL" #x1F)
-+ ("RAIN" #x20) ("RAOUT" #x21) ("RADIR" #x22) ("LFSRH" #x23)
-+ ("RBIN" #x24) ("RBOUT" #x25) ("RBDIR" #x26) ("LFSRL" #x27)
-+ ("RCIN" #x28) ("RCOUT" #x29) ("RCDIR" #x2A) ("LFSRA" #x2B)
-+ ("RDIN" #x2C) ("RDOUT" #x2D) ("RDDIR" #x2E)
-+ ("REIN" #x30) ("REOUT" #x31) ("REDIR" #x32)
-+ ("RFIN" #x34) ("RFOUT" #x35) ("RFDIR" #x36)
-+ ("RGOUT" #x39) ("RGDIR" #x3A)
-+ ("RTTMR" #x40) ("RTCFG" #x41) ("T0TMR" #x42) ("T0CFG" #x43)
-+ ("T1CNTH" #x44) ("T1CNTL" #x45) ("T1CAP1H" #x46) ("T1CAP1L" #x47)
-+ ("T1CAP2H" #x48) ("T1CMP2H" #x48) ("T1CAP2L" #x49) ("T1CMP2L" #x49) ; note aliases
-+ ("T1CMP1H" #x4A) ("T1CMP1L" #x4B)
-+ ("T1CFG1H" #x4C) ("T1CFG1L" #x4D) ("T1CFG2H" #x4E) ("T1CFG2L" #x4F)
-+ ("ADCH" #x50) ("ADCL" #x51) ("ADCCFG" #x52) ("ADCTMR" #x53)
-+ ("T2CNTH" #x54) ("T2CNTL" #x55) ("T2CAP1H" #x56) ("T2CAP1L" #x57)
-+ ("T2CAP2H" #x58) ("T2CMP2H" #x58) ("T2CAP2L" #x59) ("T2CMP2L" #x59) ; note aliases
-+ ("T2CMP1H" #x5A) ("T2CMP1L" #x5B)
-+ ("T2CFG1H" #x5C) ("T2CFG1L" #x5D) ("T2CFG2H" #x5E) ("T2CFG2L" #x5F)
-+ ("S1TMRH" #x60) ("S1TMRL" #x61) ("S1TBUFH" #x62) ("S1TBUFL" #x63)
-+ ("S1TCFG" #x64) ("S1RCNT" #x65) ("S1RBUFH" #x66) ("S1RBUFL" #x67)
-+ ("S1RCFG" #x68) ("S1RSYNC" #x69) ("S1INTF" #x6A) ("S1INTE" #x6B)
-+ ("S1MODE" #x6C) ("S1SMASK" #x6D) ("PSPCFG" #x6E) ("CMPCFG" #x6F)
-+ ("S2TMRH" #x70) ("S2TMRL" #x71) ("S2TBUFH" #x72) ("S2TBUFL" #x73)
-+ ("S2TCFG" #x74) ("S2RCNT" #x75) ("S2RBUFH" #x76) ("S2RBUFL" #x77)
-+ ("S2RCFG" #x78) ("S2RSYNC" #x79) ("S2INTF" #x7A) ("S2INTE" #x7B)
-+ ("S2MODE" #x7C) ("S2SMASK" #x7D) ("CALLH" #x7E) ("CALLL" #x7F))
-+ )
-+
-+(define-hardware
-+ (name h-spr)
-+ (comment "special-purpose registers")
-+ (type register QI (128))
-+ (get (index) (c-call QI "get_spr" index ))
-+ (set (index newval) (c-call VOID "set_spr" index newval ))
-+)
-+
-+
-+;;(define-hardware
-+;; (name h-gpr-global)
-+;; (comment "gpr registers - global")
-+;; (type register QI (128))
-+;;)
-+
-+; The general register
-+
-+(define-hardware
-+ (name h-registers)
-+ (comment "all addressable registers")
-+ (attrs VIRTUAL)
-+ (type register QI (512))
-+ (get (index) (c-call QI "get_h_registers" index ))
-+ (set (index newval) (c-call VOID "set_h_registers" index newval ))
-+)
-+
-+; The hardware stack.
-+; Use {push,pop}_pc_stack c-calls to operate on this hardware element.
-+
-+(define-hardware
-+ (name h-stack)
-+ (comment "hardware stack")
-+ (type register UHI (16))
-+)
-+
-+(dsh h-pabits "page bits" () (register QI))
-+(dsh h-zbit "zero bit" () (register BI))
-+(dsh h-cbit "carry bit" () (register BI))
-+(dsh h-dcbit "digit-carry bit" () (register BI))
-+(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
-+
-+
-+; Operands
-+
-+(define-operand (name addr16cjp) (comment "13-bit address") (attrs)
-+ (type h-uint) (index f-addr16cjp) (handlers (parse "addr16_cjp") (print "dollarhex_cj"))) ; overload lit8 printer
-+(define-operand (name fr) (comment "register") (attrs)
-+ (type h-registers) (index f-reg) (handlers (parse "fr") (print "fr")))
-+(define-operand (name lit8) (comment "8-bit signed literal") (attrs)
-+ (type h-sint) (index f-imm8) (handlers (parse "lit8") (print "dollarhex8")))
-+(define-operand (name bitno) (comment "bit number") (attrs)
-+ (type h-uint) (index f-bitno) (handlers (parse "bit3")(print "decimal")))
-+(define-operand (name addr16p) (comment "page number") (attrs)
-+ (type h-uint) (index f-page3) (handlers (parse "addr16_cjp") (print "dollarhex_p")))
-+(define-operand (name addr16h) (comment "high 8 bits of address") (attrs)
-+ (type h-uint) (index f-imm8) (handlers (parse "addr16") (print "dollarhex_addr16h")))
-+(define-operand (name addr16l) (comment "low 8 bits of address") (attrs)
-+ (type h-uint) (index f-imm8) (handlers (parse "addr16") (print "dollarhex_addr16l")))
-+(define-operand (name reti3) (comment "reti flags") (attrs)
-+ (type h-uint) (index f-reti3) (handlers (print "dollarhex")))
-+(dnop pabits "page bits" () h-pabits f-nil)
-+(dnop zbit "zero bit" () h-zbit f-nil)
-+(dnop cbit "carry bit" () h-cbit f-nil)
-+(dnop dcbit "digit carry bit" () h-dcbit f-nil)
-+;;(dnop bank "bank register" () h-bank-no f-nil)
-+
-+(define-pmacro w (reg h-spr #x0A))
-+(define-pmacro mulh (reg h-spr #x0F))
-+(define-pmacro dph (reg h-spr #x0C))
-+(define-pmacro dpl (reg h-spr #x0D))
-+(define-pmacro sph (reg h-spr #x06))
-+(define-pmacro spl (reg h-spr #x07))
-+(define-pmacro iph (reg h-spr #x04))
-+(define-pmacro ipl (reg h-spr #x05))
-+(define-pmacro addrh (reg h-spr #x10))
-+(define-pmacro addrl (reg h-spr #x11))
-+
-+
-+
-+; Pseudo-RTL for DC flag calculations
-+; "DC" = "digit carry", ie carry between nibbles
-+(define-pmacro (add-dcflag a b c)
-+ (add-cflag (sll QI a 4) (sll QI b 4) c)
-+)
-+
-+(define-pmacro (sub-dcflag a b c)
-+ (sub-cflag (sll QI a 4) (sll QI b 4) c)
-+)
-+
-+; Check to see if an fr is one of IPL, SPL, DPL, ADDRL, PCL.
-+(define-pmacro (LregCheck isLreg fr9bit)
-+ (sequence()
-+ (set isLreg #x0) ;; Assume it's not an Lreg
-+ (if (or (or (eq fr9bit #x5) (eq fr9bit #x7))
-+ (or (eq fr9bit #x9)
-+ (or (eq fr9bit #xd) (eq fr9bit #x11))))
-+ (set isLreg #x1)
-+ )
-+ )
-+)
-+
-+
-+; Instructions, in order of the "Instruction Set Map" table on
-+; pp 19-20 of IP2022 spec V1.09
-+
-+(dni jmp "Jump"
-+ ()
-+ "jmp $addr16cjp"
-+ (+ OP3_JMP addr16cjp)
-+ (set pc (or (sll pabits 13) addr16cjp))
-+ ()
-+)
-+
-+; note that in call, we push pc instead of pc + 1 because the ip2k increments
-+; the pc prior to execution of the instruction
-+(dni call "Call"
-+ ()
-+ "call $addr16cjp"
-+ (+ OP3_CALL addr16cjp)
-+ (sequence ()
-+ (c-call "push_pc_stack" pc)
-+ (set pc (or (sll pabits 13) addr16cjp)))
-+ ()
-+)
-+
-+(dni sb "Skip if bit set"
-+ ()
-+ "sb $fr,$bitno"
-+ (+ OP4_SB bitno fr)
-+ (if (and fr (sll 1 bitno))
-+ (skip 1))
-+ ()
-+)
-+
-+(dni snb "Skip if bit clear"
-+ ()
-+ "snb $fr,$bitno"
-+ (+ OP4_SNB bitno fr)
-+ (if (not (and fr (sll 1 bitno)))
-+ (skip 1))
-+ ()
-+)
-+
-+(dni setb "Set bit"
-+ ()
-+ "setb $fr,$bitno"
-+ (+ OP4_SETB bitno fr)
-+ (set fr (or fr (sll 1 bitno)))
-+ ()
-+)
-+
-+(dni clrb "Clear bit"
-+ ()
-+ "clrb $fr,$bitno"
-+ (+ OP4_CLRB bitno fr)
-+ (set fr (and fr (inv (sll 1 bitno))))
-+ ()
-+)
-+
-+(dni xorw_l "XOR W,literal"
-+ ()
-+ "xor W,#$lit8"
-+ (+ OP4_LITERAL OP4MID_XOR_L lit8)
-+ (sequence ()
-+ (set w (xor w lit8))
-+ (set zbit (zflag w)))
-+ ()
-+)
-+
-+(dni andw_l "AND W,literal"
-+ ()
-+ "and W,#$lit8"
-+ (+ OP4_LITERAL OP4MID_AND_L lit8)
-+ (sequence ()
-+ (set w (and w lit8))
-+ (set zbit (zflag w)))
-+ ()
-+)
-+
-+(dni orw_l "OR W,literal"
-+ ()
-+ "or W,#$lit8"
-+ (+ OP4_LITERAL OP4MID_OR_L lit8)
-+ (sequence ()
-+ (set w (or w lit8))
-+ (set zbit (zflag w)))
-+ ()
-+)
-+
-+(dni addw_l "ADD W,literal"
-+ ()
-+ "add W,#$lit8"
-+ (+ OP4_LITERAL OP4MID_ADD_L lit8)
-+ (sequence ()
-+ (set cbit (add-cflag w lit8 0))
-+ (set dcbit (add-dcflag w lit8 0))
-+ (set w (add w lit8))
-+ (set zbit (zflag w)))
-+ ()
-+)
-+
-+(dni subw_l "SUB W,literal"
-+ ()
-+ "sub W,#$lit8"
-+ (+ OP4_LITERAL OP4MID_SUB_L lit8)
-+ (sequence ()
-+ (set cbit (not (sub-cflag lit8 w 0)))
-+ (set dcbit (not (sub-dcflag lit8 w 0)))
-+ (set zbit (zflag (sub w lit8)))
-+ (set w (sub lit8 w)))
-+ ()
-+)
-+
-+(dni cmpw_l "CMP W,literal"
-+ ()
-+ "cmp W,#$lit8"
-+ (+ OP4_LITERAL OP4MID_CMP_L lit8)
-+ (sequence ()
-+ (set cbit (not (sub-cflag lit8 w 0)))
-+ (set dcbit (not (sub-dcflag lit8 w 0)))
-+ (set zbit (zflag (sub w lit8))))
-+ ()
-+)
-+
-+(dni retw_l "RETW literal"
-+ ()
-+ "retw #$lit8"
-+ (+ OP4_LITERAL OP4MID_RETW_L lit8)
-+ (sequence ((USI new_pc))
-+ (set w lit8)
-+ (set new_pc (c-call UHI "pop_pc_stack"))
-+ (set pabits (srl new_pc 13))
-+ (set pc new_pc))
-+ ()
-+)
-+
-+(dni csew_l "CSE W,literal"
-+ ()
-+ "cse W,#$lit8"
-+ (+ OP4_LITERAL OP4MID_CSE_L lit8)
-+ (if (eq w lit8)
-+ (skip 1))
-+ ()
-+)
-+
-+(dni csnew_l "CSNE W,literal"
-+ ()
-+ "csne W,#$lit8"
-+ (+ OP4_LITERAL OP4MID_CSNE_L lit8)
-+ (if (not (eq w lit8))
-+ (skip 1))
-+ ()
-+)
-+
-+(dni push_l "Push #lit8"
-+ ()
-+ "push #$lit8"
-+ (+ OP4_LITERAL OP4MID_PUSH_L lit8)
-+ (sequence ()
-+ (c-call "push" lit8)
-+ (c-call VOID "adjuststackptr" (const -1))
-+
-+ )
-+ ()
-+)
-+
-+(dni mulsw_l "Multiply W,literal (signed)"
-+ ()
-+ "muls W,#$lit8"
-+ (+ OP4_LITERAL OP4MID_MULS_L lit8)
-+ (sequence ((SI tmp))
-+ (set tmp (mul (ext SI w) (ext SI (and UQI #xff lit8))))
-+ (set w (and tmp #xFF))
-+ (set mulh (srl tmp 8)))
-+ ()
-+)
-+
-+(dni muluw_l "Multiply W,literal (unsigned)"
-+ ()
-+ "mulu W,#$lit8"
-+ (+ OP4_LITERAL OP4MID_MULU_L lit8)
-+ (sequence ((USI tmp))
-+ (set tmp (and #xFFFF (mul (zext USI w) (zext USI lit8))))
-+ (set w (and tmp #xFF))
-+ (set mulh (srl tmp 8)))
-+ ()
-+)
-+
-+(dni loadl_l "LoadL literal"
-+ (EXT-SKIP-INSN)
-+ "loadl #$lit8"
-+ (+ OP4_LITERAL OP4MID_LOADL_L lit8)
-+ (set dpl (and lit8 #x00FF))
-+ ()
-+)
-+
-+(dni loadh_l "LoadH literal"
-+ (EXT-SKIP-INSN)
-+ "loadh #$lit8"
-+ (+ OP4_LITERAL OP4MID_LOADH_L lit8)
-+ (set dph (and lit8 #x00FF))
-+ ()
-+)
-+
-+(dni loadl_a "LoadL addr16l"
-+ (EXT-SKIP-INSN)
-+ "loadl $addr16l"
-+ (+ OP4_LITERAL OP4MID_LOADL_L addr16l)
-+ (set dpl (and addr16l #x00FF))
-+ ()
-+)
-+
-+(dni loadh_a "LoadH addr16h"
-+ (EXT-SKIP-INSN)
-+ "loadh $addr16h"
-+ (+ OP4_LITERAL OP4MID_LOADH_L addr16h)
-+ (set dph (and addr16l #x0FF00))
-+ ()
-+)
-+
-+;; THIS NO LONGER EXISTS -> Now LOADL
-+;;(dni bank_l "Bank literal"
-+;; ()
-+;; "bank #$lit8"
-+;; (+ OP4_LITERAL OP4MID_BANK_L lit8)
-+;; (set bank lit8)
-+;; ()
-+;;)
-+
-+(dni addcfr_w "Add w/carry fr,W"
-+ ()
-+ "addc $fr,W"
-+ (+ OP6_ADDC DIR_NOTTO_W fr)
-+ (sequence ((QI result) (BI newcbit) (QI isLreg) (HI 16bval))
-+ (set newcbit (add-cflag w fr cbit))
-+ (set dcbit (add-dcflag w fr cbit))
-+ ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
-+ ;; We can take advantage of the fact that by a lucky
-+ ;; coincidence, the address of register xxxH is always
-+ ;; one lower than the address of register xxxL.
-+ (LregCheck isLreg (ifield f-reg))
-+ (if (eq isLreg #x1)
-+ (sequence()
-+ (set 16bval (reg h-spr (sub (ifield f-reg) 1)))
-+ (set 16bval (sll 16bval 8))
-+ (set 16bval (or 16bval (and (reg h-spr (ifield f-reg)) #xFF)))
-+ (set 16bval (addc HI 16bval w cbit))
-+ (set (reg h-spr (ifield f-reg)) (and 16bval #xFF))
-+ (set (reg h-spr (sub (ifield f-reg) 1))
-+ (and (srl 16bval 8) #xFF))
-+ (set result (reg h-spr (ifield f-reg)))
-+ )
-+ (set result (addc w fr cbit)) ;; else part
-+ )
-+
-+ (set zbit (zflag result))
-+ (set cbit newcbit)
-+ (set fr result))
-+ ()
-+)
-+
-+(dni addcw_fr "Add w/carry W,fr"
-+ ()
-+ "addc W,$fr"
-+ (+ OP6_ADDC DIR_TO_W fr)
-+ (sequence ((QI result) (BI newcbit))
-+ (set newcbit (add-cflag w fr cbit))
-+ (set dcbit (add-dcflag w fr cbit))
-+ (set result (addc w fr cbit))
-+ (set zbit (zflag result))
-+ (set cbit newcbit)
-+ (set w result))
-+ ()
-+)
-+
-+
-+(dni incsnz_fr "Skip if fr++ not zero"
-+ ()
-+ "incsnz $fr"
-+ (+ OP6_INCSNZ DIR_NOTTO_W fr)
-+ (sequence ((QI isLreg) (HI 16bval))
-+ (LregCheck isLreg (ifield f-reg))
-+ ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
-+ ;; We can take advantage of the fact that by a lucky
-+ ;; coincidence, the address of register xxxH is always
-+ ;; one lower than the address of register xxxL.
-+ (if (eq isLreg #x1)
-+ (sequence()
-+ ; Create the 16 bit value
-+ (set 16bval (reg h-spr (sub (ifield f-reg) 1)))
-+ (set 16bval (sll 16bval 8))
-+ (set 16bval (or 16bval (and (reg h-spr (ifield f-reg)) #xFF)))
-+ ; Do 16 bit arithmetic.
-+ (set 16bval (add HI 16bval 1))
-+ ; Separate the 16 bit values into the H and L regs
-+ (set (reg h-spr (ifield f-reg)) (and 16bval #xFF))
-+ (set (reg h-spr (sub (ifield f-reg) 1))
-+ (and (srl 16bval 8) #xFF))
-+ (set fr (reg h-spr (ifield f-reg)))
-+ )
-+ (set fr (add fr 1)) ; Do 8 bit arithmetic.
-+ )
-+ (if (not (zflag fr))
-+ (skip 1)))
-+ ()
-+)
-+
-+(dni incsnzw_fr "Skip if W=fr+1 not zero"
-+ ()
-+ "incsnz W,$fr"
-+ (+ OP6_INCSNZ DIR_TO_W fr)
-+ (sequence ()
-+ (set w (add fr 1))
-+ (if (not (zflag w))
-+ (skip 1)))
-+ ()
-+)
-+
-+(dni mulsw_fr "Multiply W,fr (signed)"
-+ ()
-+ "muls W,$fr"
-+ (+ OP6_MULS DIR_TO_W fr)
-+ (sequence ((SI tmp))
-+ (set tmp (mul (ext SI w) (ext SI fr)))
-+ (set w (and tmp #xFF))
-+ (set mulh (srl tmp 8)))
-+ ()
-+)
-+
-+(dni muluw_fr "Multiply W,fr (unsigned)"
-+ ()
-+ "mulu W,$fr"
-+ (+ OP6_MULU DIR_TO_W fr)
-+ (sequence ((USI tmp))
-+ (set tmp (and #xFFFF (mul (zext USI w) (zext USI fr))))
-+ (set w (and tmp #xFF))
-+ (set mulh (srl tmp 8)))
-+ ()
-+)
-+
-+(dni decsnz_fr "Skip if fr-- not zero"
-+ ()
-+ "decsnz $fr"
-+ (+ OP6_DECSNZ DIR_NOTTO_W fr)
-+ (sequence ((QI isLreg) (HI 16bval))
-+ (LregCheck isLreg (ifield f-reg))
-+ ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
-+ ;; We can take advantage of the fact that by a lucky
-+ ;; coincidence, the address of register xxxH is always
-+ ;; one lower than the address of register xxxL.
-+ (if (eq isLreg #x1)
-+ (sequence()
-+ ; Create the 16 bit value
-+ (set 16bval (reg h-spr (sub (ifield f-reg) 1)))
-+ (set 16bval (sll 16bval 8))
-+ (set 16bval (or 16bval (and (reg h-spr (ifield f-reg)) #xFF)))
-+ ; New 16 bit instruction
-+ (set 16bval (sub HI 16bval 1))
-+ ; Separate the 16 bit values into the H and L regs
-+ (set (reg h-spr (ifield f-reg)) (and 16bval #xFF))
-+ (set (reg h-spr (sub (ifield f-reg) 1))
-+ (and (srl 16bval 8) #xFF))
-+ (set fr (reg h-spr (ifield f-reg)))
-+ )
-+ ; Original instruction
-+ (set fr (sub fr 1))
-+ )
-+ (if (not (zflag fr))
-+ (skip 1)))
-+ ()
-+)
-+
-+(dni decsnzw_fr "Skip if W=fr-1 not zero"
-+ ()
-+ "decsnz W,$fr"
-+ (+ OP6_DECSNZ DIR_TO_W fr)
-+ (sequence ()
-+ (set w (sub fr 1))
-+ (if (not (zflag w))
-+ (skip 1)))
-+ ()
-+)
-+
-+(dni subcw_fr "Subract w/carry W,fr"
-+ ()
-+ "subc W,$fr"
-+ (+ OP6_SUBC DIR_TO_W fr)
-+ (sequence ((QI result) (BI newcbit))
-+ (set newcbit (not (sub-cflag fr w (not cbit))))
-+ (set dcbit (not (sub-dcflag fr w (not cbit))))
-+ (set result (subc fr w (not cbit)))
-+ (set zbit (zflag result))
-+ (set cbit newcbit)
-+ (set w result))
-+ ()
-+)
-+
-+(dni subcfr_w "Subtract w/carry fr,W"
-+ ()
-+ "subc $fr,W"
-+ (+ OP6_SUBC DIR_NOTTO_W fr)
-+ (sequence ((QI result) (BI newcbit) (QI isLreg) (HI 16bval))
-+ (set newcbit (not (sub-cflag fr w (not cbit))))
-+ (set dcbit (not (sub-dcflag fr w (not cbit))))
-+ (LregCheck isLreg (ifield f-reg))
-+ ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
-+ ;; We can take advantage of the fact that by a lucky
-+ ;; coincidence, the address of register xxxH is always
-+ ;; one lower than the address of register xxxL.
-+ (if (eq isLreg #x1)
-+ (sequence()
-+ ; Create the 16 bit value
-+ (set 16bval (reg h-spr (sub (ifield f-reg) 1)))
-+ (set 16bval (sll 16bval 8))
-+ (set 16bval (or 16bval (and (reg h-spr (ifield f-reg)) #xFF)))
-+ ; New 16 bit instruction
-+ (set 16bval (subc HI 16bval w (not cbit)))
-+ ; Separate the 16 bit values into the H and L regs
-+ (set (reg h-spr (ifield f-reg)) (and 16bval #xFF))
-+ (set (reg h-spr (sub (ifield f-reg) 1))
-+ (and (srl 16bval 8) #xFF))
-+ (set result (reg h-spr (ifield f-reg)))
-+ )
-+ ; Original instruction
-+ (set result (subc fr w (not cbit)))
-+ )
-+
-+
-+ (set zbit (zflag result))
-+ (set cbit newcbit)
-+ (set fr result))
-+ ()
-+)
-+
-+
-+(dni pop_fr "Pop fr"
-+ ()
-+ "pop $fr"
-+ (+ OP6_POP (f-dir 1) fr)
-+ (sequence()
-+ (set fr (c-call QI "pop"))
-+ (c-call VOID "adjuststackptr" (const 1))
-+ )
-+ ()
-+)
-+
-+(dni push_fr "Push fr"
-+ ()
-+ "push $fr"
-+ (+ OP6_POP (f-dir 0) fr)
-+ (sequence()
-+ (c-call "push" fr)
-+ (c-call VOID "adjuststackptr" (const -1))
-+ )
-+ ()
-+)
-+
-+(dni csew_fr "Skip if equal W,fr"
-+ ()
-+ "cse W,$fr"
-+ (+ OP6_CSE (f-dir 1) fr)
-+ (if (eq w fr)
-+ (skip 1))
-+ ()
-+)
-+
-+(dni csnew_fr "Skip if not-equal W,fr"
-+ ()
-+ "csne W,$fr"
-+ (+ OP6_CSE (f-dir 0) fr)
-+ (if (not (eq w fr))
-+ (skip 1))
-+ ()
-+)
-+
-+;;(dni csaw_fr "Skip if W above fr"
-+;; ((MACH ip2022ext))
-+;; "csa W,$fr"
-+;; (+ OP6_CSAB (f-dir 1) fr)
-+;; (if (gt w fr)
-+;; (skip 1))
-+;; ()
-+;;)
-+
-+;;(dni csbw_fr "Skip if W below fr"
-+;; ((MACH ip2022ext))
-+;; "csb W,$fr"
-+;; (+ OP6_CSAB (f-dir 0) fr)
-+;; (if (lt w fr)
-+;; (skip 1))
-+;; ()
-+;;)
-+
-+(dni incsz_fr "Skip if fr++ zero"
-+ ()
-+ "incsz $fr"
-+ (+ OP6_INCSZ DIR_NOTTO_W fr)
-+ (sequence ((QI isLreg) (HI 16bval))
-+ (LregCheck isLreg (ifield f-reg))
-+ ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
-+ ;; We can take advantage of the fact that by a lucky
-+ ;; coincidence, the address of register xxxH is always
-+ ;; one lower than the address of register xxxL.
-+ (if (eq isLreg #x1)
-+ (sequence()
-+ ; Create the 16 bit value
-+ (set 16bval (reg h-spr (sub (ifield f-reg) 1)))
-+ (set 16bval (sll 16bval 8))
-+ (set 16bval (or 16bval (and (reg h-spr (ifield f-reg)) #xFF)))
-+ ; New 16 bit instruction
-+ (set 16bval (add HI 16bval 1))
-+ ; Separate the 16 bit values into the H and L regs
-+ (set (reg h-spr (ifield f-reg)) (and 16bval #xFF))
-+ (set (reg h-spr (sub (ifield f-reg) 1))
-+ (and (srl 16bval 8) #xFF))
-+ (set fr (reg h-spr (ifield f-reg)))
-+ )
-+ ; Original instruction
-+ (set fr (add fr 1))
-+ )
-+ (if (zflag fr)
-+ (skip 1)))
-+ ()
-+)
-+
-+(dni incszw_fr "Skip if W=fr+1 zero"
-+ ()
-+ "incsz W,$fr"
-+ (+ OP6_INCSZ DIR_TO_W fr)
-+ (sequence ()
-+ (set w (add fr 1))
-+ (if (zflag w)
-+ (skip 1)))
-+ ()
-+)
-+
-+(dni swap_fr "Swap fr nibbles"
-+ ()
-+ "swap $fr"
-+ (+ OP6_SWAP DIR_NOTTO_W fr)
-+ (set fr (or (and (sll fr 4) #xf0)
-+ (and (srl fr 4) #x0f)))
-+ ()
-+)
-+
-+(dni swapw_fr "Swap fr nibbles into W"
-+ ()
-+ "swap W,$fr"
-+ (+ OP6_SWAP DIR_TO_W fr)
-+ (set w (or (and (sll fr 4) #xf0)
-+ (and (srl fr 4) #x0f)))
-+ ()
-+)
-+
-+(dni rl_fr "Rotate fr left with carry"
-+ ()
-+ "rl $fr"
-+ (+ OP6_RL DIR_NOTTO_W fr)
-+ (sequence ((QI newfr) (BI newc))
-+ (set newc (and fr #x80))
-+ (set newfr (or (sll fr 1) (if QI cbit 1 0)))
-+ (set cbit (if QI newc 1 0))
-+ (set fr newfr))
-+ ()
-+)
-+
-+(dni rlw_fr "Rotate fr left with carry into W"
-+ ()
-+ "rl W,$fr"
-+ (+ OP6_RL DIR_TO_W fr)
-+ (sequence ((QI newfr) (BI newc))
-+ (set newc (and fr #x80))
-+ (set newfr (or (sll fr 1) (if QI cbit 1 0)))
-+ (set cbit (if QI newc 1 0))
-+ (set w newfr))
-+ ()
-+)
-+
-+(dni rr_fr "Rotate fr right with carry"
-+ ()
-+ "rr $fr"
-+ (+ OP6_RR DIR_NOTTO_W fr)
-+ (sequence ((QI newfr) (BI newc))
-+ (set newc (and fr #x01))
-+ (set newfr (or (srl fr 1) (if QI cbit #x80 #x00)))
-+ (set cbit (if QI newc 1 0))
-+ (set fr newfr))
-+ ()
-+)
-+
-+(dni rrw_fr "Rotate fr right with carry into W"
-+ ()
-+ "rr W,$fr"
-+ (+ OP6_RR DIR_TO_W fr)
-+ (sequence ((QI newfr) (BI newc))
-+ (set newc (and fr #x01))
-+ (set newfr (or (srl fr 1) (if QI cbit #x80 #x00)))
-+ (set cbit (if QI newc 1 0))
-+ (set w newfr))
-+ ()
-+)
-+
-+(dni decsz_fr "Skip if fr-- zero"
-+ ()
-+ "decsz $fr"
-+ (+ OP6_DECSZ DIR_NOTTO_W fr)
-+ (sequence ((QI isLreg) (HI 16bval))
-+ (LregCheck isLreg (ifield f-reg))
-+ ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
-+ ;; We can take advantage of the fact that by a lucky
-+ ;; coincidence, the address of register xxxH is always
-+ ;; one lower than the address of register xxxL.
-+ (if (eq isLreg #x1)
-+ (sequence()
-+ ; Create the 16 bit value
-+ (set 16bval (reg h-spr (sub (ifield f-reg) 1)))
-+ (set 16bval (sll 16bval 8))
-+ (set 16bval (or 16bval (and (reg h-spr (ifield f-reg)) #xFF)))
-+ ; New 16 bit instruction
-+ (set 16bval (sub HI 16bval 1))
-+ ; Separate the 16 bit values into the H and L regs
-+ (set (reg h-spr (ifield f-reg)) (and 16bval #xFF))
-+ (set (reg h-spr (sub (ifield f-reg) 1))
-+ (and (srl 16bval 8) #xFF))
-+ (set fr (reg h-spr (ifield f-reg)))
-+ )
-+ ; Original instruction
-+ (set fr (sub fr 1))
-+ )
-+ (if (zflag fr)
-+ (skip 1)))
-+ ()
-+)
-+
-+(dni decszw_fr "Skip if W=fr-1 zero"
-+ ()
-+ "decsz W,$fr"
-+ (+ OP6_DECSZ DIR_TO_W fr)
-+ (sequence ()
-+ (set w (sub fr 1))
-+ (if (zflag w)
-+ (skip 1)))
-+ ()
-+)
-+
-+(dni inc_fr "Increment fr"
-+ ()
-+ "inc $fr"
-+ (+ OP6_INC DIR_NOTTO_W fr)
-+ (sequence ((QI isLreg) (HI 16bval))
-+ (LregCheck isLreg (ifield f-reg))
-+ ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
-+ ;; We can take advantage of the fact that by a lucky
-+ ;; coincidence, the address of register xxxH is always
-+ ;; one lower than the address of register xxxL.
-+ (if (eq isLreg #x1)
-+ (sequence()
-+ ; Create the 16 bit value
-+ (set 16bval (reg h-spr (sub (ifield f-reg) 1)))
-+ (set 16bval (sll 16bval 8))
-+ (set 16bval (or 16bval (and (reg h-spr (ifield f-reg)) #xFF)))
-+ ; New 16 bit instruction
-+ (set 16bval (add HI 16bval 1))
-+ ; Separate the 16 bit values into the H and L regs
-+ (set (reg h-spr (ifield f-reg)) (and 16bval #xFF))
-+ (set (reg h-spr (sub (ifield f-reg) 1))
-+ (and (srl 16bval 8) #xFF))
-+ (set fr (reg h-spr (ifield f-reg)))
-+ )
-+ ; Original instruction
-+ (set fr (add fr 1))
-+ )
-+ (set zbit (zflag fr)))
-+ ()
-+)
-+
-+(dni incw_fr "Increment fr into w"
-+ ()
-+ "inc W,$fr"
-+ (+ OP6_INC DIR_TO_W fr)
-+ (sequence ()
-+ (set w (add fr 1))
-+ (set zbit (zflag w)))
-+ ()
-+)
-+
-+(dni not_fr "Invert fr"
-+ ()
-+ "not $fr"
-+ (+ OP6_NOT DIR_NOTTO_W fr)
-+ (sequence ()
-+ (set fr (inv fr))
-+ (set zbit (zflag fr)))
-+ ()
-+)
-+
-+(dni notw_fr "Invert fr into w"
-+ ()
-+ "not W,$fr"
-+ (+ OP6_NOT DIR_TO_W fr)
-+ (sequence ()
-+ (set w (inv fr))
-+ (set zbit (zflag w)))
-+ ()
-+)
-+
-+(dni test_fr "Test fr"
-+ ()
-+ "test $fr"
-+ (+ OP6_TEST DIR_NOTTO_W fr)
-+ (sequence ()
-+ (set zbit (zflag fr)))
-+ ()
-+)
-+
-+(dni movw_l "MOV W,literal"
-+ ()
-+ "mov W,#$lit8"
-+ (+ OP4_LITERAL OP4MID_MOV_L lit8)
-+ (set w lit8)
-+ ()
-+)
-+
-+(dni movfr_w "Move/test w into fr"
-+ ()
-+ "mov $fr,W"
-+ (+ OP6_OTHER1 DIR_NOTTO_W fr)
-+ (set fr w)
-+ ()
-+)
-+
-+(dni movw_fr "Move/test fr into w"
-+ ()
-+ "mov W,$fr"
-+ (+ OP6_TEST DIR_TO_W fr)
-+ (sequence ()
-+ (set w fr)
-+ (set zbit (zflag w)))
-+ ()
-+)
-+
-+
-+(dni addfr_w "Add fr,W"
-+ ()
-+ "add $fr,W"
-+ (+ OP6_ADD DIR_NOTTO_W fr)
-+ (sequence ((QI result) (QI isLreg) (HI 16bval))
-+ (set cbit (add-cflag w fr 0))
-+ (set dcbit (add-dcflag w fr 0))
-+ (LregCheck isLreg (ifield f-reg))
-+
-+ ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
-+ ;; We can take advantage of the fact that by a lucky
-+ ;; coincidence, the address of register xxxH is always
-+ ;; one lower than the address of register xxxL.
-+ (if (eq isLreg #x1)
-+ (sequence()
-+ (set 16bval (reg h-spr (sub (ifield f-reg) 1)))
-+ (set 16bval (sll 16bval 8))
-+ (set 16bval (or 16bval (and (reg h-spr (ifield f-reg)) #xFF)))
-+ (set 16bval (add HI (and w #xFF) 16bval))
-+ (set (reg h-spr (ifield f-reg)) (and 16bval #xFF))
-+ (set (reg h-spr (sub (ifield f-reg) 1))
-+ (and (srl 16bval 8) #xFF))
-+ (set result (reg h-spr (ifield f-reg)))
-+ )
-+ (set result (addc w fr 0)) ;; else part
-+ )
-+ (set zbit (zflag result))
-+ (set fr result))
-+ ()
-+)
-+
-+(dni addw_fr "Add W,fr"
-+ ()
-+ "add W,$fr"
-+ (+ OP6_ADD DIR_TO_W fr)
-+ (sequence ((QI result))
-+ (set cbit (add-cflag w fr 0))
-+ (set dcbit (add-dcflag w fr 0))
-+ (set result (addc w fr 0))
-+ (set zbit (zflag result))
-+ (set w result))
-+ ()
-+)
-+
-+(dni xorfr_w "XOR fr,W"
-+ ()
-+ "xor $fr,W"
-+ (+ OP6_XOR DIR_NOTTO_W fr)
-+ (sequence ()
-+ (set fr (xor w fr))
-+ (set zbit (zflag fr)))
-+ ()
-+)
-+
-+(dni xorw_fr "XOR W,fr"
-+ ()
-+ "xor W,$fr"
-+ (+ OP6_XOR DIR_TO_W fr)
-+ (sequence ()
-+ (set w (xor fr w))
-+ (set zbit (zflag w)))
-+ ()
-+)
-+
-+(dni andfr_w "AND fr,W"
-+ ()
-+ "and $fr,W"
-+ (+ OP6_AND DIR_NOTTO_W fr)
-+ (sequence ()
-+ (set fr (and w fr))
-+ (set zbit (zflag fr)))
-+ ()
-+)
-+
-+(dni andw_fr "AND W,fr"
-+ ()
-+ "and W,$fr"
-+ (+ OP6_AND DIR_TO_W fr)
-+ (sequence ()
-+ (set w (and fr w))
-+ (set zbit (zflag w)))
-+ ()
-+)
-+
-+(dni orfr_w "OR fr,W"
-+ ()
-+ "or $fr,W"
-+ (+ OP6_OR DIR_NOTTO_W fr)
-+ (sequence ()
-+ (set fr (or w fr))
-+ (set zbit (zflag fr)))
-+ ()
-+)
-+
-+(dni orw_fr "OR W,fr"
-+ ()
-+ "or W,$fr"
-+ (+ OP6_OR DIR_TO_W fr)
-+ (sequence ()
-+ (set w (or fr w))
-+ (set zbit (zflag w)))
-+ ()
-+)
-+
-+(dni dec_fr "Decrement fr"
-+ ()
-+ "dec $fr"
-+ (+ OP6_DEC DIR_NOTTO_W fr)
-+ (sequence ((QI isLreg) (HI 16bval))
-+ (LregCheck isLreg (ifield f-reg))
-+ ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
-+ ;; We can take advantage of the fact that by a lucky
-+ ;; coincidence, the address of register xxxH is always
-+ ;; one lower than the address of register xxxL.
-+ (if (eq isLreg #x1)
-+ (sequence()
-+ ; Create the 16 bit value
-+ (set 16bval (reg h-spr (sub (ifield f-reg) 1)))
-+ (set 16bval (sll 16bval 8))
-+ (set 16bval (or 16bval (and (reg h-spr (ifield f-reg)) #xFF)))
-+ ; New 16 bit instruction
-+ (set 16bval (sub HI 16bval 1))
-+ ; Separate the 16 bit values into the H and L regs
-+ (set (reg h-spr (ifield f-reg)) (and 16bval #xFF))
-+ (set (reg h-spr (sub (ifield f-reg) 1))
-+ (and (srl 16bval 8) #xFF))
-+ (set fr (reg h-spr (ifield f-reg)))
-+ )
-+ ; Original instruction
-+ (set fr (sub fr 1))
-+ )
-+ (set zbit (zflag fr)))
-+ ()
-+)
-+
-+(dni decw_fr "Decrement fr into w"
-+ ()
-+ "dec W,$fr"
-+ (+ OP6_DEC DIR_TO_W fr)
-+ (sequence ()
-+ (set w (sub fr 1))
-+ (set zbit (zflag w)))
-+ ()
-+)
-+
-+(dni subfr_w "Sub fr,W"
-+ ()
-+ "sub $fr,W"
-+ (+ OP6_SUB DIR_NOTTO_W fr)
-+ (sequence ((QI result) (QI isLreg) (HI 16bval))
-+ (set cbit (not (sub-cflag fr w 0)))
-+ (set dcbit (not (sub-dcflag fr w 0)))
-+ (LregCheck isLreg (ifield f-reg))
-+ ;; If fr is an Lreg, then we have to do 16-bit arithmetic.
-+ ;; We can take advantage of the fact that by a lucky
-+ ;; coincidence, the address of register xxxH is always
-+ ;; one lower than the address of register xxxL.
-+ (if (eq isLreg #x1)
-+ (sequence()
-+ ; Create the 16 bit value
-+ (set 16bval (reg h-spr (sub (ifield f-reg) 1)))
-+ (set 16bval (sll 16bval 8))
-+ (set 16bval (or 16bval (and (reg h-spr (ifield f-reg)) #xFF)))
-+ ; New 16 bit instruction
-+ (set 16bval (sub HI 16bval (and w #xFF)))
-+ ; Separate the 16 bit values into the H and L regs
-+ (set (reg h-spr (ifield f-reg)) (and 16bval #xFF))
-+ (set (reg h-spr (sub (ifield f-reg) 1))
-+ (and (srl 16bval 8) #xFF))
-+ (set result (reg h-spr (ifield f-reg)))
-+ )
-+ ; Original instruction
-+ (set result (subc fr w 0))
-+ )
-+ (set zbit (zflag result))
-+ (set fr result))
-+ ()
-+)
-+
-+(dni subw_fr "Sub W,fr"
-+ ()
-+ "sub W,$fr"
-+ (+ OP6_SUB DIR_TO_W fr)
-+ (sequence ((QI result))
-+ (set cbit (not (sub-cflag fr w 0)))
-+ (set dcbit (not (sub-dcflag fr w 0)))
-+ (set result (subc fr w 0))
-+ (set zbit (zflag result))
-+ (set w result))
-+ ()
-+)
-+
-+(dni clr_fr "Clear fr"
-+ ()
-+ "clr $fr"
-+ (+ OP6_OTHER2 (f-dir 1) fr)
-+ (sequence ()
-+ (set fr 0)
-+ (set zbit (zflag fr)))
-+ ()
-+)
-+
-+(dni cmpw_fr "CMP W,fr"
-+ ()
-+ "cmp W,$fr"
-+ (+ OP6_OTHER2 (f-dir 0) fr)
-+ (sequence ()
-+ (set cbit (not (sub-cflag fr w 0)))
-+ (set dcbit (not (sub-dcflag fr w 0)))
-+ (set zbit (zflag (sub w fr))))
-+ ()
-+)
-+
-+(dni speed "Set speed"
-+ ()
-+ "speed #$lit8"
-+ (+ (f-op8 1) lit8)
-+ (set (reg h-registers #x0E) lit8)
-+ ()
-+)
-+
-+(dni ireadi "Insn memory read with increment"
-+ ()
-+ "ireadi"
-+ (+ OP6_OTHER1 (f-op6-10low #x1D))
-+ (c-call "do_insn_read")
-+ ()
-+)
-+
-+(dni iwritei "Insn memory write with increment"
-+ ()
-+ "iwritei"
-+ (+ OP6_OTHER1 (f-op6-10low #x1C))
-+ (c-call "do_insn_write")
-+ ()
-+)
-+
-+(dni fread "Flash read"
-+ ()
-+ "fread"
-+ (+ OP6_OTHER1 (f-op6-10low #x1B))
-+ (c-call "do_flash_read")
-+ ()
-+)
-+
-+(dni fwrite "Flash write"
-+ ()
-+ "fwrite"
-+ (+ OP6_OTHER1 (f-op6-10low #x1A))
-+ (c-call "do_flash_write")
-+ ()
-+)
-+
-+(dni iread "Insn memory read"
-+ ()
-+ "iread"
-+ (+ OP6_OTHER1 (f-op6-10low #x19))
-+ (c-call "do_insn_read")
-+ ()
-+)
-+
-+(dni iwrite "Insn memory write"
-+ ()
-+ "iwrite"
-+ (+ OP6_OTHER1 (f-op6-10low #x18))
-+ (c-call "do_insn_write")
-+ ()
-+)
-+
-+(dni page "Set insn page"
-+ (EXT-SKIP-INSN)
-+ ;"page $page3"
-+ "page $addr16p"
-+ ;(+ OP6_OTHER1 (f-op6-7low #x2) page3)
-+ ;(set pabits (srl page3 13))
-+ (+ OP6_OTHER1 (f-op6-7low #x2) addr16p)
-+ (set pabits addr16p)
-+ ()
-+)
-+
-+(dni system "System call"
-+ ()
-+ "system"
-+ (+ OP6_OTHER1 (f-op6-10low #xff))
-+ (c-call "do_system")
-+ ()
-+)
-+
-+(dni reti "Return from interrupt"
-+ ()
-+ "reti #$reti3"
-+ (+ OP6_OTHER1 (f-op6-7low #x1) reti3)
-+ (c-call "do_reti" reti3)
-+ ()
-+)
-+
-+(dni ret "Return"
-+ ()
-+ "ret"
-+ (+ OP6_OTHER1 (f-op6-10low #x07))
-+ (sequence ((USI new_pc))
-+ (set new_pc (c-call UHI "pop_pc_stack"))
-+ (set pabits (srl new_pc 13))
-+ (set pc new_pc))
-+ ()
-+)
-+
-+(dni int "Software interrupt"
-+ ()
-+ "int"
-+ (+ OP6_OTHER1 (f-op6-10low #x6))
-+ (nop)
-+ ()
-+)
-+
-+(dni breakx "Breakpoint with extended skip"
-+ (EXT-SKIP-INSN)
-+ "breakx"
-+ (+ OP6_OTHER1 (f-op6-10low #x5))
-+ (c-call "do_break" pc)
-+ ()
-+)
-+
-+(dni cwdt "Clear watchdog timer"
-+ ()
-+ "cwdt"
-+ (+ OP6_OTHER1 (f-op6-10low #x4))
-+ (c-call "do_clear_wdt")
-+ ()
-+)
-+
-+(dni ferase "Flash erase"
-+ ()
-+ "ferase"
-+ (+ OP6_OTHER1 (f-op6-10low #x3))
-+ (c-call "do_flash_erase")
-+ ()
-+)
-+
-+(dni retnp "Return, no page"
-+ ()
-+ "retnp"
-+ (+ OP6_OTHER1 (f-op6-10low #x2))
-+ (sequence ((USI new_pc))
-+ (set new_pc (c-call UHI "pop_pc_stack"))
-+ (set pc new_pc))
-+ ()
-+)
-+
-+(dni break "Breakpoint"
-+ ()
-+ "break"
-+ (+ OP6_OTHER1 (f-op6-10low #x1))
-+ (c-call "do_break" pc)
-+ ()
-+)
-+
-+(dni nop "No operation"
-+ ()
-+ "nop"
-+ (+ OP6_OTHER1 (f-op6-10low #x0))
-+ (nop)
-+ ()
-+)
-+
-+
-+; Macro instructions
-+(dnmi sc "Skip on carry"
-+ ()
-+ "sc"
-+ (emit sb (bitno 0) (fr #xB)) ; sb status.0
-+)
-+
-+(dnmi snc "Skip on no carry"
-+ ()
-+ "snc"
-+ (emit snb (bitno 0) (fr #xB)) ; snb status.0
-+)
-+
-+(dnmi sz "Skip on zero"
-+ ()
-+ "sz"
-+ (emit sb (bitno 2) (fr #xB)) ; sb status.2
-+)
-+
-+(dnmi snz "Skip on no zero"
-+ ()
-+ "snz"
-+ (emit snb (bitno 2) (fr #xB)) ; snb status.2
-+)
-+
-+(dnmi skip "Skip always"
-+ (SKIPA)
-+ "skip"
-+ (emit snb (bitno 0) (fr 9)) ; snb pcl.0 | (pcl&1)<<12
-+)
-+
-+(dnmi skipb "Skip always"
-+ (SKIPA)
-+ "skip"
-+ (emit sb (bitno 0) (fr 9)) ; sb pcl.0 | (pcl&1)<<12
-+)
-+
-diff -Nur binutils-2.24.orig/cgen/cpu/ip2k.opc binutils-2.24/cgen/cpu/ip2k.opc
---- binutils-2.24.orig/cgen/cpu/ip2k.opc 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/ip2k.opc 2016-06-30 21:26:12.617891712 +0200
-@@ -0,0 +1,616 @@
-+/* IP2K opcode support. -*- C -*-
-+ Copyright (C) 2000 Red Hat, Inc.
-+ Copyright (C) 2002, 2005 Free Software Foundation, Inc.
-+ This file is part of CGEN. */
-+
-+/*
-+ Each section is delimited with start and end markers.
-+
-+ <arch>-opc.h additions use: "-- opc.h"
-+ <arch>-opc.c additions use: "-- opc.c"
-+ <arch>-asm.c additions use: "-- asm.c"
-+ <arch>-dis.c additions use: "-- dis.c"
-+ <arch>-ibd.h additions use: "-- ibd.h". */
-+
-+/* -- opc.h */
-+
-+/* Check applicability of instructions against machines. */
-+#define CGEN_VALIDATE_INSN_SUPPORTED
-+
-+/* Allows reason codes to be output when assembler errors occur. */
-+#define CGEN_VERBOSE_ASSEMBLER_ERRORS
-+
-+/* Override disassembly hashing - there are variable bits in the top
-+ byte of these instructions. */
-+#define CGEN_DIS_HASH_SIZE 8
-+#define CGEN_DIS_HASH(buf, value) \
-+ (((* (unsigned char*) (buf)) >> 5) % CGEN_DIS_HASH_SIZE)
-+
-+#define CGEN_ASM_HASH_SIZE 127
-+#define CGEN_ASM_HASH(insn) ip2k_asm_hash (insn)
-+
-+extern unsigned int ip2k_asm_hash (const char *);
-+extern int ip2k_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *);
-+
-+/* -- opc.c */
-+
-+#include "safe-ctype.h"
-+
-+/* A better hash function for instruction mnemonics. */
-+unsigned int
-+ip2k_asm_hash (const char* insn)
-+{
-+ unsigned int hash;
-+ const char* m = insn;
-+
-+ for (hash = 0; *m && ! ISSPACE (*m); m++)
-+ hash = (hash * 23) ^ (0x1F & TOLOWER (*m));
-+
-+ /* printf ("%s %d\n", insn, (hash % CGEN_ASM_HASH_SIZE)); */
-+
-+ return hash % CGEN_ASM_HASH_SIZE;
-+}
-+
-+
-+/* Special check to ensure that instruction exists for given machine. */
-+
-+int
-+ip2k_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
-+{
-+ int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
-+
-+ /* No mach attribute? Assume it's supported for all machs. */
-+ if (machs == 0)
-+ return 1;
-+
-+ return (machs & cd->machs) != 0;
-+}
-+
-+
-+/* -- asm.c */
-+
-+static const char *
-+parse_fr (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg;
-+ const char *old_strp;
-+ char *afteroffset;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+ extern CGEN_KEYWORD ip2k_cgen_opval_register_names;
-+ bfd_vma tempvalue;
-+
-+ old_strp = *strp;
-+ afteroffset = NULL;
-+
-+ /* Check here to see if you're about to try parsing a w as the first arg
-+ and return an error if you are. */
-+ if ((strncmp (*strp, "w", 1) == 0) || (strncmp (*strp, "W", 1) == 0))
-+ {
-+ (*strp)++;
-+
-+ if ((strncmp (*strp, ",", 1) == 0) || ISSPACE (**strp))
-+ {
-+ /* We've been passed a w. Return with an error message so that
-+ cgen will try the next parsing option. */
-+ errmsg = _("W keyword invalid in FR operand slot.");
-+ return errmsg;
-+ }
-+ *strp = old_strp;
-+ }
-+
-+ /* Attempt parse as register keyword. */
-+ errmsg = cgen_parse_keyword (cd, strp, & ip2k_cgen_opval_register_names,
-+ (long *) valuep);
-+ if (*strp != NULL
-+ && errmsg == NULL)
-+ return errmsg;
-+
-+ /* Attempt to parse for "(IP)". */
-+ afteroffset = strstr (*strp, "(IP)");
-+
-+ if (afteroffset == NULL)
-+ /* Make sure it's not in lower case. */
-+ afteroffset = strstr (*strp, "(ip)");
-+
-+ if (afteroffset != NULL)
-+ {
-+ if (afteroffset != *strp)
-+ {
-+ /* Invalid offset present. */
-+ errmsg = _("offset(IP) is not a valid form");
-+ return errmsg;
-+ }
-+ else
-+ {
-+ *strp += 4;
-+ *valuep = 0;
-+ errmsg = NULL;
-+ return errmsg;
-+ }
-+ }
-+
-+ /* Attempt to parse for DP. ex: mov w, offset(DP)
-+ mov offset(DP),w */
-+
-+ /* Try parsing it as an address and see what comes back. */
-+ afteroffset = strstr (*strp, "(DP)");
-+
-+ if (afteroffset == NULL)
-+ /* Maybe it's in lower case. */
-+ afteroffset = strstr (*strp, "(dp)");
-+
-+ if (afteroffset != NULL)
-+ {
-+ if (afteroffset == *strp)
-+ {
-+ /* No offset present. Use 0 by default. */
-+ tempvalue = 0;
-+ errmsg = NULL;
-+ }
-+ else
-+ errmsg = cgen_parse_address (cd, strp, opindex,
-+ BFD_RELOC_IP2K_FR_OFFSET,
-+ & result_type, & tempvalue);
-+
-+ if (errmsg == NULL)
-+ {
-+ if (tempvalue <= 127)
-+ {
-+ /* Value is ok. Fix up the first 2 bits and return. */
-+ *valuep = 0x0100 | tempvalue;
-+ *strp += 4; /* Skip over the (DP) in *strp. */
-+ return errmsg;
-+ }
-+ else
-+ {
-+ /* Found something there in front of (DP) but it's out
-+ of range. */
-+ errmsg = _("(DP) offset out of range.");
-+ return errmsg;
-+ }
-+ }
-+ }
-+
-+
-+ /* Attempt to parse for SP. ex: mov w, offset(SP)
-+ mov offset(SP), w. */
-+ afteroffset = strstr (*strp, "(SP)");
-+
-+ if (afteroffset == NULL)
-+ /* Maybe it's in lower case. */
-+ afteroffset = strstr (*strp, "(sp)");
-+
-+ if (afteroffset != NULL)
-+ {
-+ if (afteroffset == *strp)
-+ {
-+ /* No offset present. Use 0 by default. */
-+ tempvalue = 0;
-+ errmsg = NULL;
-+ }
-+ else
-+ errmsg = cgen_parse_address (cd, strp, opindex,
-+ BFD_RELOC_IP2K_FR_OFFSET,
-+ & result_type, & tempvalue);
-+
-+ if (errmsg == NULL)
-+ {
-+ if (tempvalue <= 127)
-+ {
-+ /* Value is ok. Fix up the first 2 bits and return. */
-+ *valuep = 0x0180 | tempvalue;
-+ *strp += 4; /* Skip over the (SP) in *strp. */
-+ return errmsg;
-+ }
-+ else
-+ {
-+ /* Found something there in front of (SP) but it's out
-+ of range. */
-+ errmsg = _("(SP) offset out of range.");
-+ return errmsg;
-+ }
-+ }
-+ }
-+
-+ /* Attempt to parse as an address. */
-+ *strp = old_strp;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IP2K_FR9,
-+ & result_type, & value);
-+ if (errmsg == NULL)
-+ {
-+ *valuep = value;
-+
-+ /* If a parenthesis is found, warn about invalid form. */
-+ if (**strp == '(')
-+ errmsg = _("illegal use of parentheses");
-+
-+ /* If a numeric value is specified, ensure that it is between
-+ 1 and 255. */
-+ else if (result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ {
-+ if (value < 0x1 || value > 0xff)
-+ errmsg = _("operand out of range (not between 1 and 255)");
-+ }
-+ }
-+ return errmsg;
-+}
-+
-+static const char *
-+parse_addr16 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_reloc_code_real_type code = BFD_RELOC_NONE;
-+ bfd_vma value;
-+
-+ if (opindex == (CGEN_OPERAND_TYPE) IP2K_OPERAND_ADDR16H)
-+ code = BFD_RELOC_IP2K_HI8DATA;
-+ else if (opindex == (CGEN_OPERAND_TYPE) IP2K_OPERAND_ADDR16L)
-+ code = BFD_RELOC_IP2K_LO8DATA;
-+ else
-+ {
-+ /* Something is very wrong. opindex has to be one of the above. */
-+ errmsg = _("parse_addr16: invalid opindex.");
-+ return errmsg;
-+ }
-+
-+ errmsg = cgen_parse_address (cd, strp, opindex, code,
-+ & result_type, & value);
-+ if (errmsg == NULL)
-+ {
-+ /* We either have a relocation or a number now. */
-+ if (result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ {
-+ /* We got a number back. */
-+ if (code == BFD_RELOC_IP2K_HI8DATA)
-+ value >>= 8;
-+ else
-+ /* code = BFD_RELOC_IP2K_LOW8DATA. */
-+ value &= 0x00FF;
-+ }
-+ *valuep = value;
-+ }
-+
-+ return errmsg;
-+}
-+
-+static const char *
-+parse_addr16_cjp (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_reloc_code_real_type code = BFD_RELOC_NONE;
-+ bfd_vma value;
-+
-+ if (opindex == (CGEN_OPERAND_TYPE) IP2K_OPERAND_ADDR16CJP)
-+ code = BFD_RELOC_IP2K_ADDR16CJP;
-+ else if (opindex == (CGEN_OPERAND_TYPE) IP2K_OPERAND_ADDR16P)
-+ code = BFD_RELOC_IP2K_PAGE3;
-+
-+ errmsg = cgen_parse_address (cd, strp, opindex, code,
-+ & result_type, & value);
-+ if (errmsg == NULL)
-+ {
-+ if (result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ {
-+ if ((value & 0x1) == 0) /* If the address is even .... */
-+ {
-+ if (opindex == (CGEN_OPERAND_TYPE) IP2K_OPERAND_ADDR16CJP)
-+ *valuep = (value >> 1) & 0x1FFF; /* Should mask be 1FFF? */
-+ else if (opindex == (CGEN_OPERAND_TYPE) IP2K_OPERAND_ADDR16P)
-+ *valuep = (value >> 14) & 0x7;
-+ }
-+ else
-+ errmsg = _("Byte address required. - must be even.");
-+ }
-+ else if (result_type == CGEN_PARSE_OPERAND_RESULT_QUEUED)
-+ {
-+ /* This will happen for things like (s2-s1) where s2 and s1
-+ are labels. */
-+ *valuep = value;
-+ }
-+ else
-+ errmsg = _("cgen_parse_address returned a symbol. Literal required.");
-+ }
-+ return errmsg;
-+}
-+
-+static const char *
-+parse_lit8 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_reloc_code_real_type code = BFD_RELOC_NONE;
-+ bfd_vma value;
-+
-+ /* Parse %OP relocating operators. */
-+ if (strncmp (*strp, "%bank", 5) == 0)
-+ {
-+ *strp += 5;
-+ code = BFD_RELOC_IP2K_BANK;
-+ }
-+ else if (strncmp (*strp, "%lo8data", 8) == 0)
-+ {
-+ *strp += 8;
-+ code = BFD_RELOC_IP2K_LO8DATA;
-+ }
-+ else if (strncmp (*strp, "%hi8data", 8) == 0)
-+ {
-+ *strp += 8;
-+ code = BFD_RELOC_IP2K_HI8DATA;
-+ }
-+ else if (strncmp (*strp, "%ex8data", 8) == 0)
-+ {
-+ *strp += 8;
-+ code = BFD_RELOC_IP2K_EX8DATA;
-+ }
-+ else if (strncmp (*strp, "%lo8insn", 8) == 0)
-+ {
-+ *strp += 8;
-+ code = BFD_RELOC_IP2K_LO8INSN;
-+ }
-+ else if (strncmp (*strp, "%hi8insn", 8) == 0)
-+ {
-+ *strp += 8;
-+ code = BFD_RELOC_IP2K_HI8INSN;
-+ }
-+
-+ /* Parse %op operand. */
-+ if (code != BFD_RELOC_NONE)
-+ {
-+ errmsg = cgen_parse_address (cd, strp, opindex, code,
-+ & result_type, & value);
-+ if ((errmsg == NULL) &&
-+ (result_type != CGEN_PARSE_OPERAND_RESULT_QUEUED))
-+ errmsg = _("percent-operator operand is not a symbol");
-+
-+ *valuep = value;
-+ }
-+ /* Parse as a number. */
-+ else
-+ {
-+ errmsg = cgen_parse_signed_integer (cd, strp, opindex, valuep);
-+
-+ /* Truncate to eight bits to accept both signed and unsigned input. */
-+ if (errmsg == NULL)
-+ *valuep &= 0xFF;
-+ }
-+
-+ return errmsg;
-+}
-+
-+static const char *
-+parse_bit3 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg;
-+ char mode = 0;
-+ long count = 0;
-+ unsigned long value;
-+
-+ if (strncmp (*strp, "%bit", 4) == 0)
-+ {
-+ *strp += 4;
-+ mode = 1;
-+ }
-+ else if (strncmp (*strp, "%msbbit", 7) == 0)
-+ {
-+ *strp += 7;
-+ mode = 1;
-+ }
-+ else if (strncmp (*strp, "%lsbbit", 7) == 0)
-+ {
-+ *strp += 7;
-+ mode = 2;
-+ }
-+
-+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
-+ if (errmsg)
-+ return errmsg;
-+
-+ if (mode)
-+ {
-+ value = * valuep;
-+ if (value == 0)
-+ {
-+ errmsg = _("Attempt to find bit index of 0");
-+ return errmsg;
-+ }
-+
-+ if (mode == 1)
-+ {
-+ count = 31;
-+ while ((value & 0x80000000) == 0)
-+ {
-+ count--;
-+ value <<= 1;
-+ }
-+ }
-+ else if (mode == 2)
-+ {
-+ count = 0;
-+ while ((value & 0x00000001) == 0)
-+ {
-+ count++;
-+ value >>= 1;
-+ }
-+ }
-+
-+ *valuep = count;
-+ }
-+
-+ return errmsg;
-+}
-+
-+/* -- dis.c */
-+
-+static void
-+print_fr (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ const CGEN_KEYWORD_ENTRY *ke;
-+ extern CGEN_KEYWORD ip2k_cgen_opval_register_names;
-+ long offsettest;
-+ long offsetvalue;
-+
-+ if (value == 0) /* This is (IP). */
-+ {
-+ (*info->fprintf_func) (info->stream, "%s", "(IP)");
-+ return;
-+ }
-+
-+ offsettest = value >> 7;
-+ offsetvalue = value & 0x7F;
-+
-+ /* Check to see if first two bits are 10 -> (DP). */
-+ if (offsettest == 2)
-+ {
-+ if (offsetvalue == 0)
-+ (*info->fprintf_func) (info->stream, "%s","(DP)");
-+ else
-+ (*info->fprintf_func) (info->stream, "$%lx%s", offsetvalue, "(DP)");
-+ return;
-+ }
-+
-+ /* Check to see if first two bits are 11 -> (SP). */
-+ if (offsettest == 3)
-+ {
-+ if (offsetvalue == 0)
-+ (*info->fprintf_func) (info->stream, "%s", "(SP)");
-+ else
-+ (*info->fprintf_func) (info->stream, "$%lx%s", offsetvalue,"(SP)");
-+ return;
-+ }
-+
-+ /* Attempt to print as a register keyword. */
-+ ke = cgen_keyword_lookup_value (& ip2k_cgen_opval_register_names, value);
-+
-+ if (ke != NULL)
-+ (*info->fprintf_func) (info->stream, "%s", ke->name);
-+ else
-+ /* Print as an address literal. */
-+ (*info->fprintf_func) (info->stream, "$%02lx", value);
-+}
-+
-+static void
-+print_dollarhex (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ (*info->fprintf_func) (info->stream, "$%lx", value);
-+}
-+
-+static void
-+print_dollarhex8 (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ (*info->fprintf_func) (info->stream, "$%02lx", value);
-+}
-+
-+static void
-+print_dollarhex_addr16h (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ /* This is a loadh instruction. Shift the value to the left
-+ by 8 bits so that disassembled code will reassemble properly. */
-+ value = ((value << 8) & 0xFF00);
-+
-+ (*info->fprintf_func) (info->stream, "$%04lx", value);
-+}
-+
-+static void
-+print_dollarhex_addr16l (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ (*info->fprintf_func) (info->stream, "$%04lx", value);
-+}
-+
-+static void
-+print_dollarhex_p (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ value = ((value << 14) & 0x1C000);
-+ ;value = (value & 0x1FFFF);
-+ (*info->fprintf_func) (info->stream, "$%05lx", value);
-+}
-+
-+static void
-+print_dollarhex_cj (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ value = ((value << 1) & 0x1FFFF);
-+ (*info->fprintf_func) (info->stream, "$%05lx", value);
-+}
-+
-+static void
-+print_decimal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ (*info->fprintf_func) (info->stream, "%ld", value);
-+}
-+
-+
-+
-+/* -- */
-+
-diff -Nur binutils-2.24.orig/cgen/cpu/iq10.cpu binutils-2.24/cgen/cpu/iq10.cpu
---- binutils-2.24.orig/cgen/cpu/iq10.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/iq10.cpu 2016-06-30 21:26:12.617891712 +0200
-@@ -0,0 +1,1094 @@
-+; IQ10-only CPU description. -*- Scheme -*-
-+; Copyright (C) 2001, 2002 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+
-+; Instructions.
-+
-+(dni andoui-q10 "iq10 and upper ones immediate" (MACH10 USES-RS USES-RT)
-+ "andoui $rt,$rs,$hi16"
-+ (+ OP10_ANDOUI rs rt hi16)
-+ (set rt (and rs (or (sll hi16 16) #xFFFF)))
-+ ())
-+
-+(dni andoui2-q10 "iq10 and upper ones immediate" (ALIAS NO-DIS MACH10 USES-RS USES-RT)
-+ "andoui ${rt-rs},$hi16"
-+ (+ OP10_ANDOUI rt-rs hi16)
-+ (set rt-rs (and rt-rs (or (sll hi16 16) #xFFFF)))
-+ ())
-+
-+(dni orui-q10 "or upper immediate" (MACH10 USES-RS USES-RT)
-+ "orui $rt,$rs,$hi16"
-+ (+ OP10_ORUI rs rt hi16)
-+ (set rt (or rs (sll hi16 16)))
-+ ())
-+
-+(dni orui2-q10 "or upper immediate" (ALIAS NO-DIS MACH10 USES-RS USES-RT)
-+ "orui ${rt-rs},$hi16"
-+ (+ OP10_ORUI rt-rs hi16)
-+ (set rt-rs (or rt-rs (sll hi16 16)))
-+ ())
-+
-+(dni mrgbq10 "merge bytes" (MACH10 USES-RD USES-RS USES-RT)
-+ "mrgb $rd,$rs,$rt,$maskq10"
-+ (+ OP_SPECIAL rs rt rd maskq10 FUNC_MRGB)
-+ (sequence ((SI temp))
-+ (if (bitclear? mask 0)
-+ (set temp (and rs #xFF))
-+ (set temp (and rt #xFF)))
-+ (if (bitclear? mask 1)
-+ (set temp (or temp (and rs #xFF00)))
-+ (set temp (or temp (and rt #xFF00))))
-+ (if (bitclear? mask 2)
-+ (set temp (or temp (and rs #xFF0000)))
-+ (set temp (or temp (and rt #xFF0000))))
-+ (if (bitclear? mask 3)
-+ (set temp (or temp (and rs #xFF000000)))
-+ (set temp (or temp (and rt #xFF000000))))
-+ (set rd temp))
-+ ())
-+
-+(dni mrgbq102 "merge bytes" (ALIAS NO-DIS MACH10 USES-RD USES-RS USES-RT)
-+ "mrgb ${rd-rs},$rt,$maskq10"
-+ (+ OP_SPECIAL rt rd-rs maskq10 FUNC_MRGB)
-+ (sequence ((SI temp))
-+ (if (bitclear? mask 0)
-+ (set temp (and rd-rs #xFF))
-+ (set temp (and rt #xFF)))
-+ (if (bitclear? mask 1)
-+ (set temp (or temp (and rd-rs #xFF00)))
-+ (set temp (or temp (and rt #xFF00))))
-+ (if (bitclear? mask 2)
-+ (set temp (or temp (and rd-rs #xFF0000)))
-+ (set temp (or temp (and rt #xFF0000))))
-+ (if (bitclear? mask 3)
-+ (set temp (or temp (and rd-rs #xFF000000)))
-+ (set temp (or temp (and rt #xFF000000))))
-+ (set rd-rs temp))
-+ ())
-+
-+; In the future, we'll want the j & jal to use the 21 bit target, with
-+; the upper five bits shifted up. For now, give 'em the 16 bit target.
-+
-+(dni jq10 "jump" (MACH10)
-+ "j $jmptarg"
-+ (+ OP_J (f-rs 0) (f-rt 0) jmptarg)
-+; "j $jmptargq10"
-+; (+ OP_J upper-5-jmptargq10 (f-rt 0) lower-16-jmptargq10)
-+ (delay 1 (set pc jmptarg))
-+ ())
-+
-+(dni jalq10 "jump and link" (MACH10 USES-RT)
-+ "jal $rt,$jmptarg"
-+ (+ OP_JAL (f-rs 0) rt jmptarg)
-+; "jal $rt,$jmptargq10"
-+; (+ OP_JAL upper-5-jmptargq10 rt lower-16-jmptargq10)
-+ (delay 1
-+ (sequence ()
-+ (set rt (add pc 8))
-+ (set pc jmptarg)))
-+ ())
-+
-+(dni jalq10-2 "jump and link, implied r31" (MACH10 USES-RT)
-+ "jal $jmptarg"
-+ (+ OP_JAL (f-rs 0) (f-rt 31) jmptarg)
-+ (delay 1
-+ (sequence ()
-+ (set rt (add pc 8))
-+ (set pc jmptarg)))
-+ ())
-+
-+; Branch instructions.
-+
-+(dni bbil "branch bit immediate likely" (MACH10 USES-RS)
-+ "bbil $rs($bitnum),$offset"
-+ (+ OP10_BBIL rs bitnum offset)
-+ (if (bitset? rs bitnum)
-+ (delay 1 (set pc offset))
-+ (skip 1))
-+ ())
-+
-+(dni bbinl "branch bit immediate negated likely" (MACH10 USES-RS)
-+ "bbinl $rs($bitnum),$offset"
-+ (+ OP10_BBINL rs bitnum offset)
-+ (if (bitclear? rs bitnum)
-+ (delay 1 (set pc offset))
-+ (skip 1))
-+ ())
-+
-+(dni bbvl "branch bit variable likely" (MACH10 USES-RS USES-RT)
-+ "bbvl $rs,$rt,$offset"
-+ (+ OP10_BBVL rs rt offset)
-+ (if (bitset? rs (and rt #x1F))
-+ (delay 1 (set pc offset))
-+ (skip 1))
-+ ())
-+
-+(dni bbvnl "branch bit variable negated likely" (MACH10 USES-RS USES-RT)
-+ "bbvnl $rs,$rt,$offset"
-+ (+ OP10_BBVNL rs rt offset)
-+ (if (bitclear? rs (and rt #x1F))
-+ (delay 1 (set pc offset))
-+ (skip 1))
-+ ())
-+
-+(dni bgtzal "branch if greater than zero and link" (MACH10 USES-RS USES-R31)
-+ "bgtzal $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BGTZAL offset)
-+ (if (gt rs 0)
-+ (sequence ()
-+ (set (reg h-gr 31) (add pc 8))
-+ (delay 1 (set pc offset))))
-+ ())
-+
-+(dni bgtzall
-+ "branch if greater than zero and link likely" (MACH10 USES-RS USES-R31)
-+ "bgtzall $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BGTZALL offset)
-+ (if (gt rs 0)
-+ (sequence ()
-+ (set (reg h-gr 31) (add pc 8))
-+ (delay 1 (set pc offset)))
-+ (skip 1))
-+ ())
-+
-+(dni blezal "branch if less than or equal to zero and link" (MACH10 USES-RS USES-R31)
-+ "blezal $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BLEZAL offset)
-+ (if (le rs 0)
-+ (sequence ()
-+ (set (reg h-gr 31) (add pc 8))
-+ (delay 1 (set pc offset))))
-+ ())
-+
-+(dni blezall
-+ "branch if less than or equal to zero and link likely" (MACH10 USES-RS USES-R31)
-+ "blezall $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BLEZALL offset)
-+ (if (le rs 0)
-+ (sequence ()
-+ (set (reg h-gr 31) (add pc 8))
-+ (delay 1 (set pc offset)))
-+ (skip 1))
-+ ())
-+
-+(dni bgtz-q10 "branch if greater than zero" (MACH10 USES-RS)
-+ "bgtz $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BGTZ offset)
-+ (if (gt rs 0)
-+ (delay 1 (set pc offset)))
-+ ())
-+
-+(dni bgtzl-q10 "branch if greater than zero likely" (MACH10 USES-RS)
-+ "bgtzl $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BGTZL offset)
-+ (if (gt rs 0)
-+ (delay 1 (set pc offset))
-+ (skip 1))
-+ ())
-+
-+
-+(dni blez-q10 "branch if less than or equal to zero" (MACH10 USES-RS)
-+ "blez $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BLEZ offset)
-+ (if (le rs 0)
-+ (delay 1 (set pc offset)))
-+ ())
-+
-+(dni blezl-q10 "branch if less than or equal to zero likely" (MACH10 USES-RS)
-+ "blezl $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BLEZL offset)
-+ (if (le rs 0)
-+ (delay 1 (set pc offset))
-+ (skip 1))
-+ ())
-+
-+(dni bmb-q10 "branch if matching byte-lane" (MACH10 USES-RS USES-RT)
-+ "bmb $rs,$rt,$offset"
-+ (+ OP10_BMB rs rt offset)
-+ (sequence ((BI branch?))
-+ (set branch? 0)
-+ (if (eq (and rs #xFF) (and rt #xFF))
-+ (set branch? 1))
-+ (if (eq (and rs #xFF00) (and rt #xFF00))
-+ (set branch? 1))
-+ (if (eq (and rs #xFF0000) (and rt #xFF0000))
-+ (set branch? 1))
-+ (if (eq (and rs #xFF000000) (and rt #xFF000000))
-+ (set branch? 1))
-+ (if branch?
-+ (delay 1 (set pc offset))))
-+ ())
-+
-+(dni bmbl "branch if matching byte-lane likely" (MACH10 USES-RS USES-RT)
-+ "bmbl $rs,$rt,$offset"
-+ (+ OP10_BMBL rs rt offset)
-+ (sequence ((BI branch?))
-+ (set branch? 0)
-+ (if (eq (and rs #xFF) (and rt #xFF))
-+ (set branch? 1))
-+ (if (eq (and rs #xFF00) (and rt #xFF00))
-+ (set branch? 1))
-+ (if (eq (and rs #xFF0000) (and rt #xFF0000))
-+ (set branch? 1))
-+ (if (eq (and rs #xFF000000) (and rt #xFF000000))
-+ (set branch? 1))
-+ (if branch?
-+ (delay 1 (set pc offset))
-+ (skip 1)))
-+ ())
-+
-+(dni bri "branch if register invalid" (MACH10 USES-RS)
-+ "bri $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BRI offset)
-+ (if (gt rs 0)
-+ (delay 1 (set pc offset))
-+ (skip 1))
-+ ())
-+
-+(dni brv "branch if register invalid" (MACH10 USES-RS)
-+ "brv $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BRV offset)
-+ (if (gt rs 0)
-+ (delay 1 (set pc offset))
-+ (skip 1))
-+ ())
-+
-+; debug instructions
-+
-+(dni bctx "branch if the current context == instruction[21]" (MACH10 USES-RS)
-+ "bctx $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BCTX offset)
-+ (delay 1 (set pc offset))
-+ ())
-+
-+(dni yield "unconditional yield to the other context" (MACH10)
-+ "yield"
-+ (+ OP_SPECIAL (f-rs 0) (f-rt 0) (f-rd 0) (f-shamt 0) FUNC10_YIELD)
-+ (unimp yield)
-+ ())
-+
-+; Special instructions.
-+
-+(dni crc32 "CRC, 32 bit input" (MACH10 USES-RD USES-RS USES-RT)
-+ "crc32 $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-shamt 0) FUNC10_CRC32)
-+ (unimp crc32)
-+ ())
-+
-+(dni crc32b "CRC, 8 bit input" (MACH10 USES-RD USES-RS USES-RT)
-+ "crc32b $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-shamt 0) FUNC10_CRC32B)
-+ (unimp crc32b)
-+ ())
-+
-+(dni cnt1s "Count ones" (MACH10 USES-RD USES-RS)
-+ "cnt1s $rd,$rs"
-+ (+ OP_SPECIAL rs rt rd (f-shamt 0) FUNC10_CNT1S)
-+ (unimp crcp)
-+ ())
-+
-+
-+; Special Instructions
-+
-+(dni avail "Mark Header Buffer Available" (MACH10 USES-RD)
-+ "avail $rd"
-+ (+ OP_COP3 (f-rs 0) (f-rt 0) rd (f-shamt 0) FUNC10_AVAIL)
-+ (unimp avail)
-+ ())
-+
-+(dni free "Mark Header Buffer Free" (MACH10 USES-RS USES-RD)
-+ "free $rd,$rs"
-+ (+ OP_COP3 rs (f-rt 0) rd (f-shamt 0) FUNC10_FREE)
-+ (unimp free)
-+ ())
-+
-+(dni tstod "Test Header Buffer Order Dependency" (MACH10 USES-RS USES-RD)
-+ "tstod $rd,$rs"
-+ (+ OP_COP3 rs (f-rt 0) rd (f-shamt 0) FUNC10_TSTOD)
-+ (unimp tstod)
-+ ())
-+
-+(dni cmphdr "Get a Complete Header" (MACH10 USES-RD)
-+ "cmphdr $rd"
-+ (+ OP_COP3 (f-rs 0) (f-rt 0) rd (f-shamt 0) FUNC10_CMPHDR)
-+ (unimp cmphdr)
-+ ())
-+
-+(dni mcid "Allocate a Multicast ID" (MACH10 USES-RD USES-RT)
-+ "mcid $rd,$rt"
-+ (+ OP_COP3 (f-rs 0) rt rd (f-shamt 0) FUNC10_MCID)
-+ (unimp mcid)
-+ ())
-+
-+(dni dba "Allocate a Data Buffer Pointer" (MACH10 USES-RD)
-+ "dba $rd"
-+ (+ OP_COP3 (f-rs 0) (f-rt 0) rd (f-shamt 0) FUNC10_DBA)
-+ (unimp dba)
-+ ())
-+
-+(dni dbd "Deallocate a Data Buffer Pointer" (MACH10 USES-RS USES-RT USES-RD)
-+ "dbd $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-shamt 0) FUNC10_DBD)
-+ (unimp dbd)
-+ ())
-+
-+(dni dpwt "DSTN_PORT Write" (MACH10 USES-RS USES-RD)
-+ "dpwt $rd,$rs"
-+ (+ OP_COP3 rs (f-rt 0) rd (f-shamt 0) FUNC10_DPWT)
-+ (unimp dpwt)
-+ ())
-+
-+; Architectural and coprocessor instructions.
-+
-+(dni chkhdrq10 "" (MACH10 USES-RS USES-RD)
-+ "chkhdr $rd,$rs"
-+ (+ OP_COP3 rs (f-rt 0) rd (f-shamt 0) FUNC10_CHKHDR)
-+ (unimp chkhdr)
-+ ())
-+
-+; Coprocessor DMA Instructions (IQ10)
-+
-+(dni rba "Read Bytes Absolute" (MACH10 USES-RS USES-RT USES-RD)
-+ "rba $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-shamt 0) FUNC10_RBA)
-+ (unimp rba)
-+ ())
-+
-+(dni rbal "Read Bytes Absolute and Lock" (MACH10 USES-RS USES-RT USES-RD)
-+ "rbal $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-shamt 0) FUNC10_RBAL)
-+ (unimp rbal)
-+ ())
-+
-+(dni rbar "Read Bytes Absolute and Release" (MACH10 USES-RS USES-RT USES-RD)
-+ "rbar $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-shamt 0) FUNC10_RBAR)
-+ (unimp rbar)
-+ ())
-+
-+(dni wba "Write Bytes Absolute" (MACH10 USES-RS USES-RT USES-RD)
-+ "wba $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-shamt 0) FUNC10_WBA)
-+ (unimp wba)
-+ ())
-+
-+(dni wbau "Write Bytes Absolute and Unlock" (MACH10 USES-RS USES-RT USES-RD)
-+ "wbau $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-shamt 0) FUNC10_WBAU)
-+ (unimp wbau)
-+ ())
-+
-+(dni wbac "Write Bytes Absolute Cacheable" (MACH10 USES-RS USES-RT USES-RD)
-+ "wbac $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-shamt 0) FUNC10_WBAC)
-+ (unimp wbac)
-+ ())
-+
-+(dni rbi "Read Bytes Immediate" (MACH10 USES-RD USES-RS USES-RT)
-+ "rbi $rd,$rs,$rt,$bytecount"
-+ (+ OP_COP3 rs rt rd FUNC10_RBI bytecount)
-+ (unimp rbi)
-+ ())
-+
-+(dni rbil "Read Bytes Immediate and Lock" (MACH10 USES-RD USES-RS USES-RT)
-+ "rbil $rd,$rs,$rt,$bytecount"
-+ (+ OP_COP3 rs rt rd FUNC10_RBIL bytecount)
-+ (unimp rbil)
-+ ())
-+
-+(dni rbir "Read Bytes Immediate and Release" (MACH10 USES-RD USES-RS USES-RT)
-+ "rbir $rd,$rs,$rt,$bytecount"
-+ (+ OP_COP3 rs rt rd FUNC10_RBIR bytecount)
-+ (unimp rbir)
-+ ())
-+
-+(dni wbi "Write Bytes Immediate" (MACH10 USES-RD USES-RS USES-RT)
-+ "wbi $rd,$rs,$rt,$bytecount"
-+ (+ OP_COP3 rs rt rd FUNC10_WBI bytecount)
-+ (unimp wbi)
-+ ())
-+
-+(dni wbic "Write Bytes Immediate Cacheable" (MACH10 USES-RD USES-RS USES-RT)
-+ "wbic $rd,$rs,$rt,$bytecount"
-+ (+ OP_COP3 rs rt rd FUNC10_WBIC bytecount)
-+ (unimp wbic)
-+ ())
-+
-+(dni wbiu "Write Bytes Immediate" (MACH10 USES-RD USES-RS USES-RT)
-+ "wbiu $rd,$rs,$rt,$bytecount"
-+ (+ OP_COP3 rs rt rd FUNC10_WBIU bytecount)
-+ (unimp wbiu)
-+ ())
-+
-+(dni pkrli "Packet Release Immediate" (MACH10 USES-RD USES-RS USES-RT)
-+ "pkrli $rd,$rs,$rt,$bytecount"
-+ (+ OP_COP2 rs rt rd FUNC10_PKRLI bytecount)
-+ (unimp pkrli)
-+ ())
-+
-+(dni pkrlih "Packet Release Immediate and Hold" (MACH10 USES-RD USES-RS USES-RT)
-+ "pkrlih $rd,$rs,$rt,$bytecount"
-+ (+ OP_COP2 rs rt rd FUNC10_PKRLIH bytecount)
-+ (unimp pkrlih)
-+ ())
-+
-+(dni pkrliu "Packet Release Immediate Unconditional" (MACH10 USES-RD USES-RS USES-RT)
-+ "pkrliu $rd,$rs,$rt,$bytecount"
-+ (+ OP_COP2 rs rt rd FUNC10_PKRLIU bytecount)
-+ (unimp pkrliu)
-+ ())
-+
-+(dni pkrlic "Packet Release Immediate Continue" (MACH10 USES-RD USES-RS USES-RT)
-+ "pkrlic $rd,$rs,$rt,$bytecount"
-+ (+ OP_COP2 rs rt rd FUNC10_PKRLIC bytecount)
-+ (unimp pkrlic)
-+ ())
-+
-+(dni pkrla "Packet Release Absolute" (MACH10 USES-RS USES-RT USES-RD)
-+ "pkrla $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-shamt 0) FUNC10_PKRLA)
-+ (unimp pkrla)
-+ ())
-+
-+(dni pkrlau "Packet Release Absolute Unconditional" (MACH10 USES-RS USES-RT USES-RD)
-+ "pkrlau $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-shamt 0) FUNC10_PKRLAU)
-+ (unimp pkrlau)
-+ ())
-+
-+(dni pkrlah "Packet Release Absolute and Hold" (MACH10 USES-RS USES-RT USES-RD)
-+ "pkrlah $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-shamt 0) FUNC10_PKRLAH)
-+ (unimp pkrlah)
-+ ())
-+
-+(dni pkrlac "Packet Release Absolute Continue" (MACH10 USES-RS USES-RT USES-RD)
-+ "pkrlac $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-shamt 0) FUNC10_PKRLAC)
-+ (unimp pkrlac)
-+ ())
-+
-+; Main Memory Access Instructions
-+
-+(dni lock "lock memory" (MACH10 USES-RD USES-RT)
-+ "lock $rd,$rt"
-+ (+ OP_COP3 (f-rs 0) rt rd (f-shamt 0) FUNC10_LOCK)
-+ (unimp lock)
-+ ())
-+
-+(dni unlk "unlock memory" (MACH10 USES-RT USES-RD)
-+ "unlk $rd,$rt"
-+ (+ OP_COP3 (f-rs 0) rt rd (f-shamt 0) FUNC10_UNLK)
-+ (unimp unlk)
-+ ())
-+
-+(dni swrd "Single Word Read" (MACH10 USES-RT USES-RD)
-+ "swrd $rd,$rt"
-+ (+ OP_COP3 (f-rs 0) rt rd (f-shamt 0) FUNC10_SWRD)
-+ (unimp swrd)
-+ ())
-+
-+(dni swrdl "Single Word Read and Lock" (MACH10 USES-RT USES-RD)
-+ "swrdl $rd,$rt"
-+ (+ OP_COP3 (f-rs 0) rt rd (f-shamt 0) FUNC10_SWRDL)
-+ (unimp swrdl)
-+ ())
-+
-+(dni swwr "Single Word Write" (MACH10 USES-RS USES-RT USES-RD)
-+ "swwr $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-shamt 0) FUNC10_SWWR)
-+ (unimp swwr)
-+ ())
-+
-+(dni swwru "Single Word Write and Unlock" (MACH10 USES-RS USES-RT USES-RD)
-+ "swwru $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-shamt 0) FUNC10_SWWRU)
-+ (unimp swwru)
-+ ())
-+
-+(dni dwrd "Double Word Read" (MACH10 EVEN-REG-NUM USES-RT USES-RD)
-+ "dwrd $rd,$rt"
-+ (+ OP_COP3 (f-rs 0) rt rd (f-shamt 0) FUNC10_DWRD)
-+ (unimp dwrd)
-+ ())
-+
-+(dni dwrdl "Double Word Read and Lock" (MACH10 EVEN-REG-NUM USES-RT USES-RD)
-+ "dwrdl $rd,$rt"
-+ (+ OP_COP3 (f-rs 0) rt rd (f-shamt 0) FUNC10_DWRDL)
-+ (unimp dwrdl)
-+ ())
-+
-+; CAM access instructions (IQ10)
-+
-+(dni cam36 "CAM Access in 36-bit Mode" (MACH10 USES-RT USES-RD)
-+ "cam36 $rd,$rt,${cam-z},${cam-y}"
-+ (+ OP_COP3 (f-rs 0) rt rd FUNC10_CAM36 cam-z cam-y)
-+ (unimp cam36)
-+ ())
-+
-+(dni cam72 "CAM Access in 72-bit Mode" (MACH10 USES-RT USES-RD)
-+ "cam72 $rd,$rt,${cam-y},${cam-z}"
-+ (+ OP_COP3 (f-rs 0) rt rd FUNC10_CAM72 cam-z cam-y)
-+ (unimp cam72)
-+ ())
-+
-+(dni cam144 "CAM Access in 144-bit Mode" (MACH10 USES-RT USES-RD)
-+ "cam144 $rd,$rt,${cam-y},${cam-z}"
-+ (+ OP_COP3 (f-rs 0) rt rd FUNC10_CAM144 cam-z cam-y)
-+ (unimp cam144)
-+ ())
-+
-+(dni cam288 "CAM Access in 288-bit Mode" (MACH10 USES-RT USES-RD)
-+ "cam288 $rd,$rt,${cam-y},${cam-z}"
-+ (+ OP_COP3 (f-rs 0) rt rd FUNC10_CAM288 cam-z cam-y)
-+ (unimp cam288)
-+ ())
-+
-+; Counter manager instructions (IQ10)
-+
-+(dni cm32and "Counter Manager And" (MACH10 USES-RS USES-RT USES-RD)
-+ "cm32and $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM32AND)
-+ (unimp cm32and)
-+ ())
-+
-+(dni cm32andn "Counter Manager And With Inverse" (MACH10 USES-RS USES-RT USES-RD)
-+ "cm32andn $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM32ANDN)
-+ (unimp cm32andn)
-+ ())
-+
-+(dni cm32or "Counter Manager Or" (MACH10 USES-RS USES-RT USES-RD)
-+ "cm32or $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM32OR)
-+ (unimp cm32or)
-+ ())
-+
-+(dni cm32ra "Counter Manager 32-bit Rolling Add" (MACH10 USES-RS USES-RT USES-RD)
-+ "cm32ra $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-shamt 2) FUNC10_CM32RA)
-+ (unimp cm32ra)
-+ ())
-+
-+(dni cm32rd "Counter Manager 32-bit Rolling Decrement" (MACH10 USES-RT USES-RD)
-+ "cm32rd $rd,$rt"
-+ (+ OP_COP3 (f-rs 0) rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM32RD)
-+ (unimp cm32rd)
-+ ())
-+
-+(dni cm32ri "Counter Manager 32-bit Rolling Increment" (MACH10 USES-RT USES-RD)
-+ "cm32ri $rd,$rt"
-+ (+ OP_COP3 (f-rs 0) rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM32RI)
-+ (unimp cm32ri)
-+ ())
-+
-+(dni cm32rs "Counter Manager 32-bit Rolling Subtract" (MACH10 USES-RS USES-RT USES-RD)
-+ "cm32rs $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-shamt 2) FUNC10_CM32RS)
-+ (unimp cm32rs)
-+ ())
-+
-+(dni cm32sa "Counter Manager 32-bit Saturating Add" (MACH10 USES-RS USES-RT USES-RD)
-+ "cm32sa $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM32SA)
-+ (unimp cm32sa)
-+ ())
-+
-+(dni cm32sd "Counter Manager 32-bit Saturating Decrement" (MACH10 USES-RT USES-RD)
-+ "cm32sd $rd,$rt"
-+ (+ OP_COP3 (f-rs 0) rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM32SD)
-+ (unimp cm32sd)
-+ ())
-+
-+(dni cm32si "Counter Manager 32-bit Saturating Increment" (MACH10 USES-RT USES-RD)
-+ "cm32si $rd,$rt"
-+ (+ OP_COP3 (f-rs 0) rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM32SI)
-+ (unimp cm32si)
-+ ())
-+
-+(dni cm32ss "Counter Manager 32-bit Saturating Subtract" (MACH10 USES-RS USES-RT USES-RD)
-+ "cm32ss $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM32SS)
-+ (unimp cm32ss)
-+ ())
-+
-+(dni cm32xor "Counter Manager Xor" (MACH10 USES-RS USES-RT USES-RD)
-+ "cm32xor $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM32XOR)
-+ (unimp cm32xor)
-+ ())
-+
-+(dni cm64clr "Counter Manager Clear" (MACH10 EVEN-REG-NUM USES-RT USES-RD)
-+ "cm64clr $rd,$rt"
-+ (+ OP_COP3 (f-rs 0) rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM64CLR)
-+ (unimp cm64clr)
-+ ())
-+
-+(dni cm64ra "Counter Manager 64-bit Rolling Add" (MACH10 EVEN-REG-NUM USES-RS USES-RT USES-RD)
-+ "cm64ra $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM64RA)
-+ (unimp cm64ra)
-+ ())
-+
-+(dni cm64rd "Counter Manager 64-bit Rolling Decrement" (MACH10 EVEN-REG-NUM USES-RT USES-RD)
-+ "cm64rd $rd,$rt"
-+ (+ OP_COP3 (f-rs 0) rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM64RD)
-+ (unimp cm64rd)
-+ ())
-+
-+(dni cm64ri "Counter Manager 32-bit Rolling Increment" (MACH10 EVEN-REG-NUM USES-RT USES-RD)
-+ "cm64ri $rd,$rt"
-+ (+ OP_COP3 (f-rs 0) rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM64RI)
-+ (unimp cm64ri)
-+ ())
-+
-+(dni cm64ria2 "Counter Manager 32/32 Rolling Increment/Add" (MACH10 EVEN-REG-NUM USES-RS USES-RT USES-RD)
-+ "cm64ria2 $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM64RIA2)
-+ (unimp cm64ria2)
-+ ())
-+
-+(dni cm64rs "Counter Manager 64-bit Rolling Subtract" (MACH10 EVEN-REG-NUM USES-RS USES-RT USES-RD)
-+ "cm64rs $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM64RS)
-+ (unimp cm64rs)
-+ ())
-+
-+(dni cm64sa "Counter Manager 64-bit Saturating Add" (MACH10 EVEN-REG-NUM USES-RS USES-RT USES-RD)
-+ "cm64sa $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM64SA)
-+ (unimp cm64sa)
-+ ())
-+
-+(dni cm64sd "Counter Manager 64-bit Saturating Decrement" (MACH10 EVEN-REG-NUM USES-RT USES-RD)
-+ "cm64sd $rd,$rt"
-+ (+ OP_COP3 (f-rs 0) rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM64SD)
-+ (unimp cm64sd)
-+ ())
-+
-+(dni cm64si "Counter Manager 64-bit Saturating Increment" (MACH10 EVEN-REG-NUM USES-RT USES-RD)
-+ "cm64si $rd,$rt"
-+ (+ OP_COP3 (f-rs 0) rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM64SI)
-+ (unimp cm64si)
-+ ())
-+
-+(dni cm64sia2 "Counter Manager 32/32 Saturating Increment/Add" (MACH10 EVEN-REG-NUM USES-RS USES-RT USES-RD)
-+ "cm64sia2 $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM64SIA2)
-+ (unimp cm64sia2)
-+ ())
-+
-+(dni cm64ss "Counter Manager 64-bit Saturating Subtract" (MACH10 EVEN-REG-NUM USES-RS USES-RT USES-RD)
-+ "cm64ss $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM64SS)
-+ (unimp cm64ss)
-+ ())
-+
-+(dni cm128ria2 "Counter Manager 128-bit 64/64 Rolling Increment/Add" (MACH10 EVEN-REG-NUM USES-RS USES-RT USES-RD)
-+ "cm128ria2 $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM128RIA2)
-+ (unimp cm128ria2)
-+ ())
-+
-+(dni cm128ria3 "Counter Manager 128-bit 32/32/64 Rolling Increment/Add" (MACH10 EVEN-REG-NUM USES-RS USES-RT USES-RD)
-+ "cm128ria3 $rd,$rs,$rt,${cm-3z}"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM128RIA3 cm-3z)
-+ (unimp cm128ria3)
-+ ())
-+
-+(dni cm128ria4 "Counter Manager 128-bit 32/32/32/32 Rolling Inc/Add" (MACH10 USES-RS USES-RT USES-RD)
-+ "cm128ria4 $rd,$rs,$rt,${cm-4z}"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM128RIA4 cm-4z)
-+ (unimp cm128ria4)
-+ ())
-+
-+(dni cm128sia2 "Counter Manager 128-bit 64/64 Saturating Inc/Add" (MACH10 EVEN-REG-NUM USES-RS USES-RT USES-RD)
-+ "cm128sia2 $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM128SIA2)
-+ (unimp cm128sia2)
-+ ())
-+
-+(dni cm128sia3 "Counter Manager 128-bit 32/32/64 Saturating Inc/Add" (MACH10 EVEN-REG-NUM USES-RS USES-RT USES-RD)
-+ "cm128sia3 $rd,$rs,$rt,${cm-3z}"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM128SIA3 cm-3z)
-+ (unimp cm128sia3)
-+ ())
-+
-+(dni cm128sia4 "Counter Manager 128-bit 32/32/32/32 Saturating Inc/Add" (MACH10 USES-RS USES-RT USES-RD)
-+ "cm128sia4 $rd,$rs,$rt,${cm-4z}"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM128SIA4 cm-4z)
-+ (unimp cm128sia4)
-+ ())
-+
-+(dni cm128vsa "Counter Manager Continuous State Dual Leaky Token Bucket Policing" (MACH10 USES-RS USES-RT USES-RD)
-+ "cm128vsa $rd,$rs,$rt"
-+ (+ OP_COP3 rs rt rd (f-cp-op 0) (f-cp-grp 2) FUNC10_CM128VSA)
-+ (unimp cm128vsa)
-+ ())
-+
-+; Coprocessor Data Movement Instructions
-+
-+; Note that we don't set the USES-RD or USES-RT attributes for many of the following
-+; instructions, as it's the COP register that's being specified.
-+
-+; ??? Is YIELD-INSN the right attribute for IQ10? The IQ2000 used the attribute to warn about
-+; yielding instructions in a delay slot, but that's not relevant in IQ10. What *is* relevant
-+; (and unique to IQ10) is instructions that yield if the destination register is accessed
-+; before the value is there, causing a yield.
-+
-+(dni cfc "copy from coprocessor control register" (MACH10 LOAD-DELAY USES-RD YIELD-INSN)
-+ "cfc $rd,$rt"
-+ (+ OP_COP3 (f-rs 0) rt rd (f-shamt 0) FUNC10_CFC)
-+ (unimp cfc)
-+ ())
-+
-+(dni ctc "copy to coprocessor control register" (MACH10 USES-RS)
-+ "ctc $rs,$rt"
-+ (+ OP_COP3 rs rt (f-rd 0) (f-shamt 0) FUNC10_CTC)
-+ (unimp ctc)
-+ ())
-+
-+; Macros
-+
-+(dnmi m-avail "Mark Header Buffer Available" (MACH10 NO-DIS)
-+ "avail"
-+ (emit avail (f-rd 0))
-+)
-+
-+(dnmi m-cam36 "CAM Access in 36-bit Mode" (MACH10 USES-RT USES-RD NO-DIS)
-+ "cam36 $rd,$rt,${cam-z}"
-+ (emit cam36 rd rt cam-z (f-cam-y 0))
-+)
-+
-+(dnmi m-cam72 "CAM Access in 72-bit Mode" (MACH10 USES-RT USES-RD NO-DIS)
-+ "cam72 $rd,$rt,${cam-z}"
-+ (emit cam72 rd rt cam-z (f-cam-y 0))
-+)
-+
-+(dnmi m-cam144 "CAM Access in 144-bit Mode" (MACH10 USES-RT USES-RD NO-DIS)
-+ "cam144 $rd,$rt,${cam-z}"
-+ (emit cam144 rd rt cam-z (f-cam-y 0))
-+)
-+
-+(dnmi m-cam288 "CAM Access in 288-bit Mode" (MACH10 USES-RT USES-RD NO-DIS)
-+ "cam288 $rd,$rt,${cam-z}"
-+ (emit cam288 rd rt cam-z (f-cam-y 0))
-+)
-+
-+(dnmi m-cm32read "Counter Manager 32-bit Rolling Add R0" (MACH10 USES-RT USES-RD NO-DIS)
-+ "cm32read $rd,$rt"
-+ (emit cm32ra rd (f-rs 0) rt)
-+)
-+
-+(dnmi m-cm64read "Counter Manager 64-bit Rolling Add R0" (MACH10 USES-RT USES-RD NO-DIS)
-+ "cm64read $rd,$rt"
-+ (emit cm64ra rd (f-rs 0) rt)
-+)
-+
-+(dnmi m-cm32mlog "Counter Manager 32-bit or R0" (MACH10 USES-RS USES-RT NO-DIS)
-+ "cm32mlog $rs,$rt"
-+ (emit cm32or (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-cm32and "Counter Manager And" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm32and $rs,$rt"
-+ (emit cm32and (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-cm32andn "Counter Manager And With Inverse" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm32andn $rs,$rt"
-+ (emit cm32andn (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-cm32or "Counter Manager Or" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm32or $rs,$rt"
-+ (emit cm32or (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-cm32ra "Counter Manager 32-bit Rolling Add" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm32ra $rs,$rt"
-+ (emit cm32ra (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-cm32rd "Counter Manager 32-bit Rolling Decrement" (MACH10 USES-RT USES-RD NO-DIS)
-+ "cm32rd $rt"
-+ (emit cm32rd (f-rd 0) rt)
-+)
-+
-+(dnmi m-cm32ri "Counter Manager 32-bit Rolling Increment" (MACH10 USES-RT USES-RD NO-DIS)
-+ "cm32ri $rt"
-+ (emit cm32ri (f-rd 0) rt)
-+)
-+
-+(dnmi m-cm32rs "Counter Manager 32-bit Rolling Subtract" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm32rs $rs,$rt"
-+ (emit cm32rs (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-cm32sa "Counter Manager 32-bit Saturating Add" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm32sa $rs,$rt"
-+ (emit cm32sa (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-cm32sd "Counter Manager 32-bit Saturating Decrement" (MACH10 USES-RT USES-RD NO-DIS)
-+ "cm32sd $rt"
-+ (emit cm32sd (f-rd 0) rt)
-+)
-+
-+(dnmi m-cm32si "Counter Manager 32-bit Saturating Increment" (MACH10 USES-RT USES-RD NO-DIS)
-+ "cm32si $rt"
-+ (emit cm32si (f-rd 0) rt)
-+)
-+
-+(dnmi m-cm32ss "Counter Manager 32-bit Saturating Subtract" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm32ss $rs,$rt"
-+ (emit cm32ss (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-cm32xor "Counter Manager Xor" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm32xor $rs,$rt"
-+ (emit cm32xor (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-cm64clr "Counter Manager Clear" (MACH10 USES-RT USES-RD NO-DIS)
-+ "cm64clr $rt"
-+ (emit cm64clr (f-rd 0) rt)
-+)
-+
-+(dnmi m-cm64ra "Counter Manager 64-bit Rolling Add" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm64ra $rs,$rt"
-+ (emit cm64ra (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-cm64rd "Counter Manager 64-bit Rolling Decrement" (MACH10 USES-RT USES-RD NO-DIS)
-+ "cm64rd $rt"
-+ (emit cm64rd (f-rd 0) rt)
-+)
-+
-+(dnmi m-cm64ri "Counter Manager 32-bit Rolling Increment" (MACH10 USES-RT USES-RD NO-DIS)
-+ "cm64ri $rt"
-+ (emit cm64ri (f-rd 0) rt)
-+)
-+
-+(dnmi m-cm64ria2 "Counter Manager 32/32 Rolling Increment/Add" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm64ria2 $rs,$rt"
-+ (emit cm64ria2 (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-cm64rs "Counter Manager 64-bit Rolling Subtract" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm64rs $rs,$rt"
-+ (emit cm64rs (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-cm64sa "Counter Manager 64-bit Saturating Add" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm64sa $rs,$rt"
-+ (emit cm64sa (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-cm64sd "Counter Manager 64-bit Saturating Decrement" (MACH10 USES-RT USES-RD NO-DIS)
-+ "cm64sd $rt"
-+ (emit cm64sd (f-rd 0) rt)
-+)
-+
-+(dnmi m-cm64si "Counter Manager 64-bit Saturating Increment" (MACH10 USES-RT USES-RD NO-DIS)
-+ "cm64si $rt"
-+ (emit cm64si (f-rd 0) rt)
-+)
-+
-+(dnmi m-cm64sia2 "Counter Manager 32/32 Saturating Increment/Add" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm64sia2 $rs,$rt"
-+ (emit cm64sia2 (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-cm64ss "Counter Manager 64-bit Saturating Subtract" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm64ss $rs,$rt"
-+ (emit cm64ss (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-cm128ria2 "Counter Manager 128-bit 64/64 Rolling Increment/Add" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm128ria2 $rs,$rt"
-+ (emit cm128ria2 (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-cm128ria3 "Counter Manager 128-bit 32/32/64 Rolling Increment/Add" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm128ria3 $rs,$rt,${cm-3z}"
-+ (emit cm128ria3 (f-rd 0) rs rt cm-3z)
-+)
-+
-+(dnmi m-cm128ria4 "Counter Manager 128-bit 32/32/32/32 Rolling Inc/Add" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm128ria4 $rs,$rt,${cm-4z}"
-+ (emit cm128ria4 (f-rd 0) rs rt cm-4z)
-+)
-+
-+(dnmi m-cm128sia2 "Counter Manager 128-bit 64/64 Saturating Inc/Add" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm128sia2 $rs,$rt"
-+ (emit cm128sia2 (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-cm128sia3 "Counter Manager 128-bit 32/32/64 Saturating Inc/Add" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm128sia3 $rs,$rt,${cm-3z}"
-+ (emit cm128sia3 (f-rd 0) rs rt cm-3z)
-+)
-+
-+(dnmi m-cm128sia4 "Counter Manager 128-bit 32/32/32/32 Saturating Inc/Add" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "cm128sia4 $rs,$rt,${cm-4z}"
-+ (emit cm128sia4 (f-rd 0) rs rt cm-4z)
-+)
-+
-+(dnmi m-cmphdr "Get a Complete Header" (MACH10 NO-DIS)
-+ "cmphdr"
-+ (emit cmphdr (f-rd 0))
-+)
-+
-+(dnmi m-dbd "Deallocate a Data Buffer Pointer" (MACH10 USES-RD USES-RT NO-DIS)
-+ "dbd $rd,$rt"
-+ (emit dbd rd (f-rs 0) rt)
-+)
-+
-+(dnmi m2-dbd "Deallocate a Data Buffer Pointer" (MACH10 USES-RT NO-DIS)
-+ "dbd $rt"
-+ (emit dbd (f-rd 0) (f-rs 0) rt)
-+)
-+
-+(dnmi m-dpwt "DSTN_PORT Write" (MACH10 USES-RS NO-DIS)
-+ "dpwt $rs"
-+ (emit dpwt (f-rd 0) rs)
-+)
-+
-+(dnmi m-free "" (MACH10 USES-RS USES-RD NO-DIS)
-+ "free $rs"
-+ (emit free (f-rd 0) rs)
-+)
-+
-+;(dnmi m-jal "jump and link, implied r31" (MACH10 USES-RT NO-DIS)
-+; "jal $jmptarg"
-+; (emit jal (f-rt 31) jmptarg)
-+;)
-+
-+(dnmi m-lock "lock memory" (MACH10 USES-RT NO-DIS)
-+ "lock $rt"
-+ (emit lock (f-rd 0) rt)
-+)
-+
-+(dnmi m-pkrla "Packet Release Absolute" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "pkrla $rs,$rt"
-+ (emit pkrla (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-pkrlac "Packet Release Absolute Continue" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "pkrlac $rs,$rt"
-+ (emit pkrlac (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-pkrlah "Packet Release Absolute and Hold" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "pkrlah $rs,$rt"
-+ (emit pkrlah (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-pkrlau "Packet Release Absolute Unconditional" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "pkrlau $rs,$rt"
-+ (emit pkrlau (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-pkrli "Packet Release Immediate" (MACH10 USES-RD USES-RS USES-RT NO-DIS)
-+ "pkrli $rs,$rt,$bytecount"
-+ (emit pkrli (f-rd 0) rs rt bytecount)
-+)
-+
-+(dnmi m-pkrlic "Packet Release Immediate Continue" (MACH10 USES-RS USES-RT NO-DIS)
-+ "pkrlic $rs,$rt,$bytecount"
-+ (emit pkrlic (f-rd 0) rs rt bytecount)
-+)
-+
-+(dnmi m-pkrlih "Packet Release Immediate and Hold" (MACH10 USES-RD USES-RS USES-RT NO-DIS)
-+ "pkrlih $rs,$rt,$bytecount"
-+ (emit pkrlih (f-rd 0) rs rt bytecount)
-+)
-+
-+(dnmi m-pkrliu "Packet Release Immediate Unconditional" (MACH10 USES-RD USES-RS USES-RT NO-DIS)
-+ "pkrliu $rs,$rt,$bytecount"
-+ (emit pkrliu (f-rd 0) rs rt bytecount)
-+)
-+
-+(dnmi m-rba "Read Bytes Absolute" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "rba $rs,$rt"
-+ (emit rba (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-rbal "Read Bytes Absolute and Lock" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "rbal $rs,$rt"
-+ (emit rbal (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-rbar "Read Bytes Absolute and Release" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "rbar $rs,$rt"
-+ (emit rbar (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-rbi "Read Bytes Immediate" (MACH10 USES-RS USES-RT NO-DIS)
-+ "rbi $rs,$rt,$bytecount"
-+ (emit rbi (f-rd 0) rs rt bytecount)
-+)
-+
-+(dnmi m-rbil "Read Bytes Immediate and Lock" (MACH10 USES-RS USES-RT NO-DIS)
-+ "rbil $rs,$rt,$bytecount"
-+ (emit rbil (f-rd 0) rs rt bytecount)
-+)
-+
-+(dnmi m-rbir "Read Bytes Immediate and Release" (MACH10 USES-RS USES-RT NO-DIS)
-+ "rbir $rs,$rt,$bytecount"
-+ (emit rbir (f-rd 0) rs rt bytecount)
-+)
-+
-+(dnmi m-swwr "Single Word Write" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "swwr $rs,$rt"
-+ (emit swwr (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-swwru "Single Word Write and Unlock" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "swwru $rs,$rt"
-+ (emit swwru (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-tstod "Test Header Buffer Order Dependency" (MACH10 USES-RS USES-RD NO-DIS)
-+ "tstod $rs"
-+ (emit tstod (f-rd 0) rs)
-+)
-+
-+(dnmi m-unlk "" (MACH10 USES-RT USES-RD NO-DIS)
-+ "unlk $rt"
-+ (emit unlk (f-rd 0) rt)
-+)
-+
-+(dnmi m-wba "Write Bytes Absolute" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "wba $rs,$rt"
-+ (emit wba (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-wbac "Write Bytes Absolute Cacheable" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "wbac $rs,$rt"
-+ (emit wbac (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-wbau "Write Bytes Absolute and Unlock" (MACH10 USES-RS USES-RT USES-RD NO-DIS)
-+ "wbau $rs,$rt"
-+ (emit wbau (f-rd 0) rs rt)
-+)
-+
-+(dnmi m-wbi "Write Bytes Immediate" (MACH10 USES-RD USES-RS USES-RT NO-DIS)
-+ "wbi $rs,$rt,$bytecount"
-+ (emit wbi (f-rd 0) rs rt bytecount)
-+)
-+
-+(dnmi m-wbic "Write Bytes Immediate Cacheable" (MACH10 USES-RD USES-RS USES-RT NO-DIS)
-+ "wbic $rs,$rt,$bytecount"
-+ (emit wbic (f-rd 0) rs rt bytecount)
-+)
-+
-+(dnmi m-wbiu "Write Bytes Immediate" (MACH10 USES-RD USES-RS USES-RT NO-DIS)
-+ "wbiu $rs,$rt,$bytecount"
-+ (emit wbiu (f-rd 0) rs rt bytecount)
-+)
-+
-diff -Nur binutils-2.24.orig/cgen/cpu/iq2000.cpu binutils-2.24/cgen/cpu/iq2000.cpu
---- binutils-2.24.orig/cgen/cpu/iq2000.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/iq2000.cpu 2016-06-30 21:26:12.621891868 +0200
-@@ -0,0 +1,1182 @@
-+; IQ2000/IQ10 Common CPU description. -*- Scheme -*-
-+; Copyright (C) 2000, 2001, 2002 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+(include "simplify.inc")
-+
-+(define-arch
-+ (name iq2000)
-+ (comment "IQ2000 architecture")
-+ (insn-lsb0? #t)
-+ (machs iq2000 iq10)
-+ (isas iq2000)
-+)
-+
-+(define-isa
-+ (name iq2000)
-+ (comment "Basic IQ2000 instruction set")
-+ (default-insn-word-bitsize 32)
-+ (default-insn-bitsize 32)
-+ (base-insn-bitsize 32)
-+ (decode-assist (31 30 29 28 27 26))
-+)
-+
-+(define-cpu
-+ (name iq2000bf)
-+ (comment "IQ2000 family")
-+ (endian big)
-+ (word-bitsize 32)
-+ (file-transform "")
-+)
-+
-+(define-cpu
-+ (name iq10bf)
-+ (comment "IQ10 coprocessor family")
-+ (endian big)
-+ (word-bitsize 32)
-+ (file-transform "")
-+
-+)
-+
-+(define-mach
-+ (name iq2000)
-+ (comment "IQ2000 packet processing engine")
-+ (cpu iq2000bf)
-+ (isas iq2000)
-+)
-+
-+(define-mach
-+ (name iq10)
-+ (comment "IQ10 coprocessor")
-+ (cpu iq10bf)
-+ (isas iq2000)
-+)
-+
-+(define-model
-+ (name iq2000)
-+ (comment "IQ2000 microprocessor")
-+ (mach iq2000)
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () () () ())
-+)
-+
-+(define-model
-+ (name iq10)
-+ (comment "IQ10 coprocessor")
-+ (mach iq10)
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () () () ())
-+)
-+
-+; Macros to simplify MACH attribute specification.
-+
-+(define-pmacro MACH2000 (MACH iq2000))
-+(define-pmacro MACH10 (MACH iq10))
-+
-+
-+; Hardware elements.
-+
-+(define-hardware
-+ (name h-pc)
-+ (comment "program counter")
-+ (attrs PC PROFILE (ISA iq2000))
-+ (type pc)
-+ (get () (c-call USI "get_h_pc"))
-+ (set (newval) (c-call VOID "set_h_pc" newval))
-+)
-+; FIXME: it would be nice if the hardwired zero in R0 could be
-+; specified as a virtual hardware element, with one less register in
-+; the register file proper.
-+
-+(define-keyword
-+ (name gr-names)
-+ (print-name h-gr)
-+ (values (r0 0) (%0 0) (r1 1) (%1 1) (r2 2) (%2 2) (r3 3) (%3 3)
-+ (r4 4) (%4 4) (r5 5) (%5 5) (r6 6) (%6 6) (r7 7) (%7 7)
-+ (r8 8) (%8 8) (r9 9) (%9 9) (r10 10) (%10 10) (r11 11) (%11 11)
-+ (r12 12) (%12 12) (r13 13) (%13 13) (r14 14) (%14 14) (r15 15) (%15 15)
-+ (r16 16) (%16 16) (r17 17) (%17 17) (r18 18) (%18 18) (r19 19) (%19 19)
-+ (r20 20) (%20 20) (r21 21) (%21 21) (r22 22) (%22 22) (r23 23) (%23 23)
-+ (r24 24) (%24 24) (r25 25) (%25 25) (r26 26) (%26 26) (r27 27) (%27 27)
-+ (r28 28) (%28 28) (r29 29) (%29 29) (r30 30) (%30 30) (r31 31) (%31 31))
-+)
-+
-+(define-hardware
-+ (name h-gr)
-+ (comment "General purpose registers")
-+; (attrs (ISA iq2000) CACHE-ADDR)
-+ (type register SI (32))
-+ (indices extern-keyword gr-names)
-+ (get (idx)
-+ (cond SI
-+ ((eq idx 0) (const 0))
-+ (else (raw-reg h-gr idx))))
-+ (set (idx newval)
-+ (cond VOID
-+ ((eq idx 0) (nop))
-+ (else (set (raw-reg h-gr idx) newval))))
-+)
-+
-+
-+; Instruction fields.
-+
-+(dnf f-opcode "opcode field" () 31 6)
-+(dnf f-rs "register field Rs" () 25 5)
-+(dnf f-rt "register field Rt" () 20 5)
-+(dnf f-rd "register field Rd" () 15 5)
-+(dnf f-shamt "shift amount field" () 10 5)
-+(dnf f-cp-op "coprocessor op field" () 10 3)
-+(dnf f-cp-op-10 "coprocessor op field for CAM" () 10 5)
-+(dnf f-cp-grp "coprocessor group field" () 7 2)
-+(dnf f-func "function field" () 5 6)
-+(dnf f-imm "immediate field" () 15 16)
-+
-+(define-multi-ifield
-+ (name f-rd-rs)
-+ (comment "register Rd implied from Rs")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-rd f-rs)
-+ (insert (sequence ()
-+ (set (ifield f-rd) (ifield f-rd-rs))
-+ (set (ifield f-rs) (ifield f-rd-rs))
-+ ))
-+ (extract (sequence ()
-+ (set (ifield f-rd-rs) (ifield f-rs))
-+ ))
-+)
-+
-+(define-multi-ifield
-+ (name f-rd-rt)
-+ (comment "register Rd implied from Rt")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-rd f-rt)
-+ (insert (sequence ()
-+ (set (ifield f-rd) (ifield f-rd-rt))
-+ (set (ifield f-rt) (ifield f-rd-rt))
-+ ))
-+ (extract (sequence ()
-+ (set (ifield f-rd-rt) (ifield f-rt))
-+ ))
-+)
-+
-+(define-multi-ifield
-+ (name f-rt-rs)
-+ (comment "register Rt implied from Rs")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-rt f-rs)
-+ (insert (sequence ()
-+ (set (ifield f-rt) (ifield f-rt-rs))
-+ (set (ifield f-rs) (ifield f-rt-rs))
-+ ))
-+ (extract (sequence ()
-+ (set (ifield f-rd-rs) (ifield f-rs))
-+ ))
-+)
-+
-+(df f-jtarg "jump target field" (ABS-ADDR) 15 16 UINT
-+ ((value pc) (srl USI (and USI value #x03FFFF) 2))
-+ ((value pc) (or USI (and USI pc #xF0000000) (sll USI value 2))))
-+
-+(df f-jtargq10 "iq10 jump target field" (ABS-ADDR) 20 21 UINT
-+ ((value pc) (srl SI (and SI value #x7FFFFF) 2))
-+ ((value pc) (or SI (and SI pc #xF0000000) (sll SI value 2))))
-+
-+(df f-offset "pc offset field" (PCREL-ADDR) 15 16 INT
-+ ; Actually, this is relative to the address of the delay slot.
-+ ((value pc) (sra SI (sub SI value pc) 2))
-+ ((value pc) (add SI (sll SI value 2) (add pc 4))))
-+
-+; Instruction fields that scarcely appear in instructions.
-+
-+(dnf f-count "count field" () 15 7)
-+(dnf f-bytecount "byte count field" () 7 8)
-+(dnf f-index "index field" () 8 9)
-+(dnf f-mask "mask field" () 9 4)
-+(dnf f-maskq10 "iq10 mask field" () 10 5)
-+(dnf f-maskl "mask left field" () 4 5)
-+(dnf f-excode "execcode field" () 25 20)
-+(dnf f-rsrvd "reserved field" () 25 10)
-+(dnf f-10-11 "bits 10:0" () 10 11)
-+(dnf f-24-19 "bits 24:6" () 24 19)
-+(dnf f-5 "bit 5" () 5 1)
-+(dnf f-10 "bit 10" () 10 1)
-+(dnf f-25 "bit 25" () 25 1)
-+(dnf f-cam-z "cam global mask z" () 5 3)
-+(dnf f-cam-y "cam operation y" () 2 3)
-+(dnf f-cm-3func "CM 3 bit fn field" () 5 3)
-+(dnf f-cm-4func "CM 4 bit fn field" () 5 4)
-+(dnf f-cm-3z "CM 3Z field" () 1 2)
-+(dnf f-cm-4z "CM 4Z field" () 2 3)
-+
-+
-+; Enumerations.
-+
-+(define-normal-insn-enum
-+ opcodes "primary opcodes" () OP_ f-opcode
-+ (("SPECIAL" 0) ("REGIMM" 1) ("J" 2) ("JAL" 3) ("BEQ" 4) ("BNE" 5) ("BLEZ" 6) ("BGTZ" 7)
-+ ("ADDI" 8) ("ADDIU" 9) ("SLTI" 10) ("SLTIU" 11) ("ANDI" 12) ("ORI" 13) ("XORI" 14) ("LUI" 15)
-+ ("COP0" 16) ("COP1" 17) ("COP2" 18) ("COP3" 19) ("BEQL" 20) ("BNEL" 21) ("BLEZL" 22) ("BGTZL" 23)
-+ ("BMB0" 24) ("BMB1" 25) ("BMB2" 26) ("BMB3" 27) ("BBI" 28) ("BBV" 29) ("BBIN" 30) ("BBVN" 31)
-+ ("LB" 32) ("LH" 33) ("LW" 35) ("LBU" 36) ("LHU" 37) ("RAM" 39)
-+ ("SB" 40) ("SH" 41) ("SW" 43) ("ANDOI" 44) ("BMB" 45) ("ORUI" 47)
-+ ("LDW" 48)
-+ ("SDW" 56) ("ANDOUI" 63))
-+)
-+
-+(define-normal-insn-enum
-+ q10_opcodes "iq10-only primary opcodes" () OP10_ f-opcode
-+ (("BMB" 6) ("ORUI" 15) ("BMBL" 22) ("ANDOUI" 47) ("BBIL" 60) ("BBVL" 61) ("BBINL" 62) ("BBVNL" 63))
-+)
-+
-+(define-normal-insn-enum
-+ regimm-functions "branch sub-opcodes" () FUNC_ f-rt
-+ (("BLTZ" 0) ("BGEZ" 1) ("BLTZL" 2) ("BGEZL" 3) ("BLEZ" 4) ("BGTZ" 5) ("BLEZL" 6) ("BGTZL" 7)
-+ ("BRI" 8) ("BRV" 9) ("BCTX" 12)
-+ ("BLTZAL" 16) ("BGEZAL" 17) ("BLTZALL" 18) ("BGEZALL" 19) ("BLEZAL" 20) ("BGTZAL" 21) ("BLEZALL" 22) ("BGTZALL" 23))
-+)
-+
-+(define-normal-insn-enum
-+ functions "function sub-opcodes" () FUNC_ f-func
-+ (("SLL" 0) ("SLMV" 1) ("SRL" 2) ("SRA" 3) ("SLLV" 4) ("SRMV" 5) ("SRLV" 6) ("SRAV" 7)
-+ ("JR" 8) ("JALR" 9) ("JCR" 10) ("SYSCALL" 12) ("BREAK" 13) ("SLEEP" 14)
-+ ("ADD" 32) ("ADDU" 33) ("SUB" 34) ("SUBU" 35) ("AND" 36) ("OR" 37) ("XOR" 38) ("NOR" 39)
-+ ("ADO16" 41) ("SLT" 42) ("SLTU" 43) ("MRGB" 45))
-+)
-+
-+; iq10 special function sub-opcodes
-+(define-normal-insn-enum
-+ q10s_functions "iq10-only special function sub-opcodes" () FUNC10_ f-func
-+ (("YIELD" 14) ("CNT1S" 46))
-+)
-+
-+; coprocessor opcodes in concert with f-cp-grp
-+(define-normal-insn-enum
-+ cop_functions "iq10 function sub-opcodes" () FUNC10_ f-func
-+ (("CFC" 0) ("LOCK" 1) ("CTC" 2) ("UNLK" 3) ("SWRD" 4) ("SWRDL" 5) ("SWWR" 6) ("SWWRU" 7)
-+ ("RBA" 8) ("RBAL" 9) ("RBAR" 10) ("DWRD" 12) ("DWRDL" 13)
-+ ("WBA" 16) ("WBAU" 17) ("WBAC" 18) ("CRC32" 20) ("CRC32B" 21)
-+ ("MCID" 32) ("DBD" 33) ("DBA" 34) ("DPWT" 35) ("AVAIL" 36) ("FREE" 37) ("CHKHDR" 38) ("TSTOD" 39)
-+ ("PKRLA" 40) ("PKRLAU" 41) ("PKRLAH" 42) ("PKRLAC" 43) ("CMPHDR" 44)
-+
-+ ("CM64RS" 0) ("CM64RD" 1) ("CM64RI" 4) ("CM64CLR" 5)
-+ ("CM64SS" 8) ("CM64SD" 9) ("CM64SI" 12)
-+ ("CM64RA" 16) ("CM64RIA2" 20) ("CM128RIA2" 21)
-+ ("CM64SA" 24) ("CM64SIA2" 28) ("CM128SIA2" 29)
-+ ("CM32RS" 32) ("CM32RD" 33) ("CM32XOR" 34) ("CM32ANDN" 35) ("CM32RI" 36) ("CM128VSA" 38)
-+ ("CM32SS" 40) ("CM32SD" 41) ("CM32OR" 42) ("CM32AND" 43) ("CM32SI" 44)
-+ ("CM32RA" 48)
-+ ("CM32SA" 56) )
-+)
-+
-+; coprocessor opcodes in concert with f-cp-grp
-+(define-normal-insn-enum
-+ cop_cm128_4functions "iq10 function sub-opcodes" () FUNC10_ f-cm-4func
-+ (("CM128RIA3" 4) ("CM128SIA3" 6))
-+)
-+
-+(define-normal-insn-enum
-+ cop_cm128_3functions "iq10 function sub-opcodes" () FUNC10_ f-cm-3func
-+ (("CM128RIA4" 6) ("CM128SIA4" 7))
-+)
-+
-+(define-normal-insn-enum
-+ cop2_functions "iq10 coprocessor sub-opcodes" () FUNC10_ f-cp-op
-+ (("PKRLI" 0) ("PKRLIU" 1) ("PKRLIH" 2) ("PKRLIC" 3) ("RBIR" 1) ("RBI" 2) ("RBIL" 3) ("WBIC" 5) ("WBI" 6) ("WBIU" 7))
-+)
-+
-+(define-normal-insn-enum
-+ cop3_cam_functions "iq10 coprocessor cam sub-opcodes" () FUNC10_ f-cp-op-10
-+ (("CAM36" 16) ("CAM72" 17) ("CAM144" 18) ("CAM288" 19))
-+)
-+
-+
-+; Attributes.
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name YIELD-INSN)
-+ (comment "insn generates a context yield")
-+)
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name LOAD-DELAY)
-+ (comment "insn has a load delay")
-+)
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name EVEN-REG-NUM)
-+ (comment "insn requires an even numbered register in rt(2000) or rd(10)")
-+)
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name UNSUPPORTED)
-+ (comment "insn is unsupported")
-+)
-+
-+(define-pmacro (define-reg-use-attr regfield)
-+ (define-attr
-+ (for insn)
-+ (type boolean)
-+ (name (.sym USES- (.upcase regfield)))
-+ (comment ("insn accesses register operand " regfield))))
-+
-+(define-reg-use-attr "rd")
-+(define-reg-use-attr "rs")
-+(define-reg-use-attr "rt")
-+(define-reg-use-attr "r31")
-+
-+
-+; Operands.
-+
-+(dnop rs "register Rs" () h-gr f-rs)
-+(dnop rt "register Rt" () h-gr f-rt)
-+(dnop rd "register Rd" () h-gr f-rd)
-+(dnop rd-rs "register Rd from Rs" () h-gr f-rd-rs)
-+(dnop rd-rt "register Rd from Rt" () h-gr f-rd-rt)
-+(dnop rt-rs "register Rt from Rs" () h-gr f-rt-rs)
-+(dnop shamt "shift amount" () h-uint f-shamt)
-+(define-operand (name imm) (comment "immediate") (attrs)
-+ (type h-uint) (index f-imm) (handlers (parse "imm")))
-+(dnop offset "pc-relative offset" () h-iaddr f-offset)
-+(dnop baseoff "base register offset" () h-iaddr f-imm)
-+(dnop jmptarg "jump target" () h-iaddr f-jtarg)
-+(dnop mask "mask" () h-uint f-mask)
-+(dnop maskq10 "iq10 mask" () h-uint f-maskq10)
-+(dnop maskl "mask left" () h-uint f-maskl)
-+(dnop count "count" () h-uint f-count)
-+(dnop _index "index" () h-uint f-index)
-+(dnop execode "execcode" () h-uint f-excode)
-+(dnop bytecount "byte count" () h-uint f-bytecount)
-+(dnop cam-y "cam global opn y" () h-uint f-cam-y)
-+(dnop cam-z "cam global mask z" () h-uint f-cam-z)
-+(dnop cm-3func "CM 3 bit fn field" () h-uint f-cm-3func)
-+(dnop cm-4func "CM 4 bit fn field" () h-uint f-cm-4func)
-+(dnop cm-3z "CM 3 bit Z field" () h-uint f-cm-3z)
-+(dnop cm-4z "CM 4 bit Z field" () h-uint f-cm-4z)
-+
-+; Aliases for the rs and rt operands. This just makes the load/store
-+; insns easier to compare with the instruction set documentation.
-+
-+(dnop base "base register" () h-gr f-rs)
-+(dnop maskr "mask right" () h-uint f-rs)
-+(dnop bitnum "bit number" () h-uint f-rt)
-+
-+; For high(foo).
-+(define-operand
-+ (name hi16)
-+ (comment "high 16 bit immediate")
-+ (attrs)
-+ (type h-uint)
-+ (index f-imm)
-+ (handlers (parse "hi16"))
-+)
-+
-+; For low(foo).
-+(define-operand
-+ (name lo16)
-+ (comment "16 bit signed immediate, for low")
-+ (attrs)
-+ (type h-uint)
-+ (index f-imm)
-+ (handlers (parse "lo16"))
-+)
-+
-+; For negated imm.
-+(define-operand
-+ (name mlo16)
-+ (comment "negated 16 bit signed immediate")
-+ (attrs)
-+ (type h-uint)
-+ (index f-imm)
-+ (handlers (parse "mlo16"))
-+)
-+
-+; For iq10 jmps
-+; In the future, we'll want the j & jal to use the 21 bit target, with
-+; the upper five bits shifted up. For now, don't use this.
-+(define-operand
-+ (name jmptargq10)
-+ (comment "iq10 21-bit jump offset")
-+ (attrs)
-+ (type h-iaddr)
-+ (index f-jtargq10)
-+ (handlers (parse "jtargq10"))
-+)
-+
-+
-+; Instructions.
-+
-+; A pmacro for use in semantic bodies of unimplemented insns.
-+(define-pmacro (unimp mnemonic) (nop))
-+
-+(define-pmacro (bitset? value bit-num)
-+ (and value (sll 1 bit-num)))
-+
-+(define-pmacro (bitclear? value bit-num)
-+ (not (bitset? value bit-num)))
-+
-+; Arithmetic/logic instructions.
-+
-+(dni add2 "add registers" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
-+ "add ${rd-rs},$rt"
-+ (+ OP_SPECIAL rt rd-rs (f-shamt 0) FUNC_ADD)
-+ (set rd-rs (add rt rd-rs))
-+ ())
-+
-+(dni add "add registers" (USES-RD USES-RS USES-RT)
-+ "add $rd,$rs,$rt"
-+ (+ OP_SPECIAL rs rt rd (f-shamt 0) FUNC_ADD)
-+ (set rd (add rs rt))
-+ ())
-+
-+
-+(dni addi2 "add immediate" (ALIAS NO-DIS USES-RS USES-RT)
-+ "addi ${rt-rs},$lo16"
-+ (+ OP_ADDI rt-rs lo16)
-+ (set rt-rs (add rt-rs (ext SI (trunc HI lo16))))
-+ ())
-+
-+(dni addi "add immediate" (USES-RS USES-RT)
-+ "addi $rt,$rs,$lo16"
-+ (+ OP_ADDI rs rt lo16)
-+ (set rt (add rs (ext SI (trunc HI lo16))))
-+ ())
-+
-+(dni addiu2 "add immediate unsigned" (ALIAS NO-DIS USES-RS USES-RT)
-+ "addiu ${rt-rs},$lo16"
-+ (+ OP_ADDIU rt-rs lo16)
-+ (set rt-rs (add rt-rs (ext SI (trunc HI lo16))))
-+ ())
-+
-+(dni addiu "add immediate unsigned" (USES-RS USES-RT)
-+ "addiu $rt,$rs,$lo16"
-+ (+ OP_ADDIU rs rt lo16)
-+ (set rt (add rs (ext SI (trunc HI lo16))))
-+ ())
-+
-+(dni addu2 "add unsigned" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
-+ "addu ${rd-rs},$rt"
-+ (+ OP_SPECIAL rd-rs rt (f-shamt 0) FUNC_ADDU)
-+ (set rd-rs (add rd-rs rt))
-+ ())
-+
-+(dni addu "add unsigned" (USES-RD USES-RS USES-RT)
-+ "addu $rd,$rs,$rt"
-+ (+ OP_SPECIAL rs rt rd (f-shamt 0) FUNC_ADDU)
-+ (set rd (add rs rt))
-+ ())
-+
-+(dni ado162 "add 16, ones complement" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
-+ "ado16 ${rd-rs},$rt"
-+ (+ OP_SPECIAL rd-rs rt (f-shamt 0) FUNC_ADO16)
-+ (sequence ((HI high) (HI low))
-+ (set low (add HI (and HI rd-rs #xFFFF) (and HI rt #xFFFF)))
-+ (set high (add HI (srl rd-rs 16) (srl rt 16)))
-+ (set rd-rs (or SI (sll SI high 16) low)))
-+ ())
-+
-+(dni ado16 "add 16, ones complement" (USES-RD USES-RS USES-RT)
-+ "ado16 $rd,$rs,$rt"
-+ (+ OP_SPECIAL rs rt rd (f-shamt 0) FUNC_ADO16)
-+ (sequence ((HI high) (HI low))
-+ (set low (add HI (and HI rs #xFFFF) (and HI rt #xFFFF)))
-+ (set high (add HI (srl rs 16) (srl rt 16)))
-+ (set rd (or SI (sll SI high 16) low)))
-+ ())
-+
-+(dni and2 "and register" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
-+ "and ${rd-rs},$rt"
-+ (+ OP_SPECIAL rd-rs rt (f-shamt 0) FUNC_AND)
-+ (set rd-rs (and rd-rs rt))
-+ ())
-+
-+(dni and "and register" (USES-RD USES-RS USES-RT)
-+ "and $rd,$rs,$rt"
-+ (+ OP_SPECIAL rs rt rd (f-shamt 0) FUNC_AND)
-+ (set rd (and rs rt))
-+ ())
-+
-+(dni andi2 "and immediate" (ALIAS NO-DIS USES-RS USES-RT)
-+ "andi ${rt-rs},$lo16"
-+ (+ OP_ANDI rt-rs lo16)
-+ (set rt-rs (and rt-rs (zext SI lo16)))
-+ ())
-+
-+(dni andi "and immediate" (USES-RS USES-RT)
-+ "andi $rt,$rs,$lo16"
-+ (+ OP_ANDI rs rt lo16)
-+ (set rt (and rs (zext SI lo16)))
-+ ())
-+
-+(dni andoi2 "and ones immediate" (ALIAS NO-DIS USES-RS USES-RT)
-+ "andoi ${rt-rs},$lo16"
-+ (+ OP_ANDOI rt-rs lo16)
-+ (set rt-rs (and rt-rs (or #xFFFF0000 (ext SI (trunc HI lo16)))))
-+ ())
-+
-+(dni andoi "and ones immediate" (USES-RS USES-RT)
-+ "andoi $rt,$rs,$lo16"
-+ (+ OP_ANDOI rs rt lo16)
-+ (set rt (and rs (or #xFFFF0000 (ext SI (trunc HI lo16)))))
-+ ())
-+
-+(dni nor2 "nor" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
-+ "nor ${rd-rs},$rt"
-+ (+ OP_SPECIAL rd-rs rt (f-shamt 0) FUNC_NOR)
-+ (set rd-rs (inv (or rd-rs rt)))
-+ ())
-+
-+(dni nor "nor" (USES-RD USES-RS USES-RT)
-+ "nor $rd,$rs,$rt"
-+ (+ OP_SPECIAL rs rt rd (f-shamt 0) FUNC_NOR)
-+ (set rd (inv (or rs rt)))
-+ ())
-+
-+(dni or2 "or" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
-+ "or ${rd-rs},$rt"
-+ (+ OP_SPECIAL rd-rs rt (f-shamt 0) FUNC_OR)
-+ (set rd-rs (or rd-rs rt))
-+ ())
-+
-+(dni or "or" (USES-RD USES-RS USES-RT)
-+ "or $rd,$rs,$rt"
-+ (+ OP_SPECIAL rs rt rd (f-shamt 0) FUNC_OR)
-+ (set rd (or rs rt))
-+ ())
-+
-+(dni ori2 "or immediate" (ALIAS NO-DIS USES-RS USES-RT)
-+ "ori ${rt-rs},$lo16"
-+ (+ OP_ORI rt-rs lo16)
-+ (set rt-rs (or rt-rs (zext SI lo16)))
-+ ())
-+
-+(dni ori "or immediate" (USES-RS USES-RT)
-+ "ori $rt,$rs,$lo16"
-+ (+ OP_ORI rs rt lo16)
-+ (set rt (or rs (zext SI lo16)))
-+ ())
-+
-+(dni ram "rotate and mask" (USES-RD USES-RT)
-+ "ram $rd,$rt,$shamt,$maskl,$maskr"
-+ (+ OP_RAM maskr rt rd shamt (f-5 0) maskl)
-+ (sequence ()
-+ (set rd (ror rt shamt))
-+ (set rd (and rd (srl #xFFFFFFFF maskl)))
-+ (set rd (and rd (sll #xFFFFFFFF maskr))))
-+ ())
-+
-+(dni sll "shift left logical" (USES-RD USES-RT)
-+ "sll $rd,$rt,$shamt"
-+ (+ OP_SPECIAL (f-rs 0) rt rd shamt (f-func 0))
-+ (set rd (sll rt shamt))
-+ ())
-+
-+(dni sllv2 "shift left logical variable" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
-+ "sllv ${rd-rt},$rs"
-+ (+ OP_SPECIAL rs rd-rt (f-shamt 0) FUNC_SLLV)
-+ (set rd-rt (sll rd-rt (and rs #x1F)))
-+ ())
-+
-+(dni sllv "shift left logical variable" (USES-RD USES-RS USES-RT)
-+ "sllv $rd,$rt,$rs"
-+ (+ OP_SPECIAL rs rt rd (f-shamt 0) FUNC_SLLV)
-+ (set rd (sll rt (and rs #x1F)))
-+ ())
-+
-+(dni slmv2 "shift left and mask variable" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
-+ "slmv ${rd-rt},$rs,$shamt"
-+ (+ OP_SPECIAL rs rd-rt shamt FUNC_SLMV)
-+ (set rd-rt (and (sll rd-rt shamt) (srl #xFFFFFFFF rs)))
-+ ())
-+
-+(dni slmv "shift left and mask variable" (USES-RD USES-RS USES-RT)
-+ "slmv $rd,$rt,$rs,$shamt"
-+ (+ OP_SPECIAL rs rt rd shamt FUNC_SLMV)
-+ (set rd (and (sll rt shamt) (srl #xFFFFFFFF rs)))
-+ ())
-+
-+(dni slt2 "set if less than" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
-+ "slt ${rd-rs},$rt"
-+ (+ OP_SPECIAL rt rd-rs (f-shamt 0) FUNC_SLT)
-+ (if (lt rd-rs rt)
-+ (set rd-rs 1)
-+ (set rd-rs 0))
-+ ())
-+
-+(dni slt "set if less than" (USES-RD USES-RS USES-RT)
-+ "slt $rd,$rs,$rt"
-+ (+ OP_SPECIAL rs rt rd (f-shamt 0) FUNC_SLT)
-+ (if (lt rs rt)
-+ (set rd 1)
-+ (set rd 0))
-+ ())
-+
-+(dni slti2 "set if less than immediate" (ALIAS NO-DIS USES-RS USES-RT)
-+ "slti ${rt-rs},$imm"
-+ (+ OP_SLTI rt-rs imm)
-+ (if (lt rt-rs (ext SI (trunc HI imm)))
-+ (set rt-rs 1)
-+ (set rt-rs 0))
-+ ())
-+
-+(dni slti "set if less than immediate" (USES-RS USES-RT)
-+ "slti $rt,$rs,$imm"
-+ (+ OP_SLTI rs rt imm)
-+ (if (lt rs (ext SI (trunc HI imm)))
-+ (set rt 1)
-+ (set rt 0))
-+ ())
-+
-+(dni sltiu2 "set if less than immediate unsigned" (ALIAS NO-DIS USES-RS USES-RT)
-+ "sltiu ${rt-rs},$imm"
-+ (+ OP_SLTIU rt-rs imm)
-+ (if (ltu rt-rs (ext SI (trunc HI imm)))
-+ (set rt-rs 1)
-+ (set rt-rs 0))
-+ ())
-+
-+(dni sltiu "set if less than immediate unsigned" (USES-RS USES-RT)
-+ "sltiu $rt,$rs,$imm"
-+ (+ OP_SLTIU rs rt imm)
-+ (if (ltu rs (ext SI (trunc HI imm)))
-+ (set rt 1)
-+ (set rt 0))
-+ ())
-+
-+(dni sltu2 "set if less than unsigned" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
-+ "sltu ${rd-rs},$rt"
-+ (+ OP_SPECIAL rd-rs rt (f-shamt 0) FUNC_SLTU)
-+ (if (ltu rd-rs rt)
-+ (set rd-rs 1)
-+ (set rd-rs 0))
-+ ())
-+
-+(dni sltu "set if less than unsigned" (USES-RD USES-RS USES-RT)
-+ "sltu $rd,$rs,$rt"
-+ (+ OP_SPECIAL rs rt rd (f-shamt 0) FUNC_SLTU)
-+ (if (ltu rs rt)
-+ (set rd 1)
-+ (set rd 0))
-+ ())
-+
-+(dni sra2 "shift right arithmetic" (ALIAS NO-DIS USES-RD USES-RT)
-+ "sra ${rd-rt},$shamt"
-+ (+ OP_SPECIAL (f-rs 0) rd-rt shamt FUNC_SRA)
-+ (set rd-rt (sra rd-rt shamt))
-+ ())
-+
-+(dni sra "shift right arithmetic" (USES-RD USES-RT)
-+ "sra $rd,$rt,$shamt"
-+ (+ OP_SPECIAL (f-rs 0) rt rd shamt FUNC_SRA)
-+ (set rd (sra rt shamt))
-+ ())
-+
-+(dni srav2 "shift right arithmetic variable" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
-+ "srav ${rd-rt},$rs"
-+ (+ OP_SPECIAL rs rd-rt (f-shamt 0) FUNC_SRAV)
-+ (set rd-rt (sra rd-rt (and rs #x1F)))
-+ ())
-+
-+(dni srav "shift right arithmetic variable" (USES-RD USES-RS USES-RT)
-+ "srav $rd,$rt,$rs"
-+ (+ OP_SPECIAL rs rt rd (f-shamt 0) FUNC_SRAV)
-+ (set rd (sra rt (and rs #x1F)))
-+ ())
-+
-+(dni srl "shift right logical" (USES-RD USES-RT)
-+ "srl $rd,$rt,$shamt"
-+ (+ OP_SPECIAL (f-rs 0) rt rd shamt FUNC_SRL)
-+ (set rd (srl rt shamt))
-+ ())
-+
-+(dni srlv2 "shift right logical variable" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
-+ "srlv ${rd-rt},$rs"
-+ (+ OP_SPECIAL rs rd-rt (f-shamt 0) FUNC_SRLV)
-+ (set rd-rt (srl rd-rt (and rs #x1F)))
-+ ())
-+
-+(dni srlv "shift right logical variable" (USES-RD USES-RS USES-RT)
-+ "srlv $rd,$rt,$rs"
-+ (+ OP_SPECIAL rs rt rd (f-shamt 0) FUNC_SRLV)
-+ (set rd (srl rt (and rs #x1F)))
-+ ())
-+
-+(dni srmv2 "shift right and mask variable" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
-+ "srmv ${rd-rt},$rs,$shamt"
-+ (+ OP_SPECIAL rs rd-rt shamt FUNC_SRMV)
-+ (set rd-rt (and (srl rd-rt shamt) (sll #xFFFFFFFF rs)))
-+ ())
-+
-+(dni srmv "shift right and mask variable" (USES-RD USES-RS USES-RT)
-+ "srmv $rd,$rt,$rs,$shamt"
-+ (+ OP_SPECIAL rs rt rd shamt FUNC_SRMV)
-+ (set rd (and (srl rt shamt) (sll #xFFFFFFFF rs)))
-+ ())
-+
-+(dni sub2 "subtract" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
-+ "sub ${rd-rs},$rt"
-+ (+ OP_SPECIAL rt rd-rs (f-shamt 0) FUNC_SUB)
-+ (set rd-rs (sub rd-rs rt))
-+ ())
-+
-+(dni sub "subtract" (USES-RD USES-RS USES-RT)
-+ "sub $rd,$rs,$rt"
-+ (+ OP_SPECIAL rs rt rd (f-shamt 0) FUNC_SUB)
-+ (set rd (sub rs rt))
-+ ())
-+
-+(dni subu2 "subtract unsigned" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
-+ "subu ${rd-rs},$rt"
-+ (+ OP_SPECIAL rt rd-rs (f-shamt 0) FUNC_SUBU)
-+ (set rd-rs (sub rd-rs rt))
-+ ())
-+
-+(dni subu "subtract unsigned" (USES-RD USES-RS USES-RT)
-+ "subu $rd,$rs,$rt"
-+ (+ OP_SPECIAL rs rt rd (f-shamt 0) FUNC_SUBU)
-+ (set rd (sub rs rt))
-+ ())
-+
-+(dni xor2 "exclusive or" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
-+ "xor ${rd-rs},$rt"
-+ (+ OP_SPECIAL rt rd-rs (f-shamt 0) FUNC_XOR)
-+ (set rd-rs (xor rd-rs rt))
-+ ())
-+
-+(dni xor "exclusive or" (USES-RD USES-RS USES-RT)
-+ "xor $rd,$rs,$rt"
-+ (+ OP_SPECIAL rs rt rd (f-shamt 0) FUNC_XOR)
-+ (set rd (xor rs rt))
-+ ())
-+
-+(dni xori2 "exclusive or immediate" (ALIAS NO-DIS USES-RS USES-RT)
-+ "xori ${rt-rs},$lo16"
-+ (+ OP_XORI rt-rs lo16)
-+ (set rt-rs (xor rt-rs (zext SI lo16)))
-+ ())
-+
-+(dni xori "exclusive or immediate" (USES-RS USES-RT)
-+ "xori $rt,$rs,$lo16"
-+ (+ OP_XORI rs rt lo16)
-+ (set rt (xor rs (zext SI lo16)))
-+ ())
-+
-+
-+; Branch instructions.
-+
-+(dni bbi "branch bit immediate" (USES-RS)
-+ "bbi $rs($bitnum),$offset"
-+ (+ OP_BBI rs bitnum offset)
-+ (if (bitset? rs bitnum)
-+ (delay 1 (set pc offset)))
-+ ())
-+
-+(dni bbin "branch bit immediate negated" (USES-RS)
-+ "bbin $rs($bitnum),$offset"
-+ (+ OP_BBIN rs bitnum offset)
-+ (if (bitclear? rs bitnum)
-+ (delay 1 (set pc offset)))
-+ ())
-+
-+(dni bbv "branch bit variable" (USES-RS USES-RT)
-+ "bbv $rs,$rt,$offset"
-+ (+ OP_BBV rs rt offset)
-+ (if (bitset? rs (and rt #x1F))
-+ (delay 1 (set pc offset)))
-+ ())
-+
-+(dni bbvn "branch bit variable negated" (USES-RS USES-RT)
-+ "bbvn $rs,$rt,$offset"
-+ (+ OP_BBVN rs rt offset)
-+ (if (bitclear? rs (and rt #x1F))
-+ (delay 1 (set pc offset)))
-+ ())
-+
-+(dni beq "branch if equal" (USES-RS USES-RT)
-+ "beq $rs,$rt,$offset"
-+ (+ OP_BEQ rs rt offset)
-+ (if (eq rs rt)
-+ (delay 1 (set pc offset)))
-+ ())
-+
-+(dni beql "branch if equal likely" (USES-RS USES-RT)
-+ "beql $rs,$rt,$offset"
-+ (+ OP_BEQL rs rt offset)
-+ (if (eq rs rt)
-+ (delay 1 (set pc offset))
-+ (skip 1))
-+ ())
-+
-+(dni bgez "branch if greater than or equal to zero" (USES-RS)
-+ "bgez $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BGEZ offset)
-+ (if (ge rs 0)
-+ (delay 1 (set pc offset)))
-+ ())
-+
-+(dni bgezal "branch if greater than or equal to zero and link" (USES-RS USES-R31)
-+ "bgezal $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BGEZAL offset)
-+ (if (ge rs 0)
-+ (sequence ()
-+ (set (reg h-gr 31) (add pc 8))
-+ (delay 1 (set pc offset))))
-+ ())
-+
-+(dni bgezall
-+ "branch if greater than equal to zero and link likely" (USES-RS USES-R31)
-+ "bgezall $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BGEZALL offset)
-+ (if (ge rs 0)
-+ (sequence ()
-+ (set (reg h-gr 31) (add pc 8))
-+ (delay 1 (set pc offset)))
-+ (skip 1))
-+ ())
-+
-+(dni bgezl "branch if greater or equal to zero likely" (USES-RS)
-+ "bgezl $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BGEZL offset)
-+ (if (ge rs 0)
-+ (delay 1 (set pc offset))
-+ (skip 1))
-+ ())
-+
-+(dni bltz "branch if less than zero" (USES-RS)
-+ "bltz $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BLTZ offset)
-+ (if (lt rs 0)
-+ (delay 1 (set pc offset)))
-+ ())
-+
-+(dni bltzl "branch if less than zero likely" (USES-RS)
-+ "bltzl $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BLTZL offset)
-+ (if (lt rs 0)
-+ (delay 1 (set pc offset))
-+ (skip 1))
-+ ())
-+
-+(dni bltzal "branch if less than zero and link" (USES-RS USES-R31)
-+ "bltzal $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BLTZAL offset)
-+ (if (lt rs 0)
-+ (sequence ()
-+ (set (reg h-gr 31) (add pc 8))
-+ (delay 1 (set pc offset))))
-+ ())
-+
-+(dni bltzall "branch if less than zero and link likely" (USES-RS USES-R31)
-+ "bltzall $rs,$offset"
-+ (+ OP_REGIMM rs FUNC_BLTZALL offset)
-+ (if (lt rs 0)
-+ (sequence ()
-+ (set (reg h-gr 31) (add pc 8))
-+ (delay 1 (set pc offset)))
-+ (skip 1))
-+ ())
-+
-+(dni bmb0 "branch if matching byte-lane 0" (USES-RS USES-RT)
-+ "bmb0 $rs,$rt,$offset"
-+ (+ OP_BMB0 rs rt offset)
-+ (if (eq (and rs #xFF) (and rt #xFF))
-+ (delay 1 (set pc offset)))
-+ ())
-+
-+(dni bmb1 "branch if matching byte-lane 1" (USES-RS USES-RT)
-+ "bmb1 $rs,$rt,$offset"
-+ (+ OP_BMB1 rs rt offset)
-+ (if (eq (and rs #xFF00) (and rt #xFF00))
-+ (delay 1 (set pc offset)))
-+ ())
-+
-+(dni bmb2 "branch if matching byte-lane 2" (USES-RS USES-RT)
-+ "bmb2 $rs,$rt,$offset"
-+ (+ OP_BMB2 rs rt offset)
-+ (if (eq (and rs #xFF0000) (and rt #xFF0000))
-+ (delay 1 (set pc offset)))
-+ ())
-+
-+(dni bmb3 "branch if matching byte-lane 3" (USES-RS USES-RT)
-+ "bmb3 $rs,$rt,$offset"
-+ (+ OP_BMB3 rs rt offset)
-+ (if (eq (and rs #xFF000000) (and rt #xFF000000))
-+ (delay 1 (set pc offset)))
-+ ())
-+
-+(dni bne "branch if not equal" (USES-RS USES-RT)
-+ "bne $rs,$rt,$offset"
-+ (+ OP_BNE rs rt offset)
-+ (if (ne rs rt)
-+ (delay 1 (set pc offset)))
-+ ())
-+
-+(dni bnel "branch if not equal likely" (USES-RS USES-RT)
-+ "bnel $rs,$rt,$offset"
-+ (+ OP_BNEL rs rt offset)
-+ (if (ne rs rt)
-+ (delay 1 (set pc offset))
-+ (skip 1))
-+ ())
-+
-+
-+
-+
-+; Jump instructions.
-+; Might as well jump!
-+
-+(dni jalr "jump and link register" (USES-RD USES-RS)
-+ "jalr $rd,$rs"
-+ (+ OP_SPECIAL rs (f-rt 0) rd (f-shamt 0) FUNC_JALR)
-+ (delay 1
-+ (sequence ()
-+ (set rd (add pc 8))
-+ (set pc rs)))
-+ ())
-+
-+(dni jr "jump register" (USES-RS)
-+ "jr $rs"
-+ (+ OP_SPECIAL rs (f-rt 0) (f-rd 0) (f-shamt 0) FUNC_JR)
-+ (delay 1 (set pc rs))
-+ ())
-+
-+
-+; Load instructions.
-+
-+(dni lb "load byte" (LOAD-DELAY USES-RS USES-RT)
-+ "lb $rt,$lo16($base)"
-+ (+ OP_LB base rt lo16)
-+ (set rt (ext WI (mem QI (add base (ext SI (trunc HI lo16))))))
-+; (sequence ((SI addr) (SI word))
-+; (set addr (add base lo16))
-+; (set word (mem SI (and addr (inv 3))))
-+; (set word (srl word (sll (and addr 2) 3)))
-+; (set rt (ext SI word)))
-+ ())
-+
-+(dni lbu "load byte unsigned" (LOAD-DELAY USES-RS USES-RT)
-+ "lbu $rt,$lo16($base)"
-+ (+ OP_LBU base rt lo16)
-+ (set rt (zext WI (mem QI (add base (ext SI (trunc HI lo16))))))
-+; (sequence ((SI addr) (SI word))
-+; (set addr (add base lo16))
-+; (set word (mem SI (and addr (inv 3))))
-+; (set rt (srl word (sll (and addr 2) 3))))
-+ ())
-+
-+(dni lh "load half word" (LOAD-DELAY USES-RS USES-RT)
-+ "lh $rt,$lo16($base)"
-+ (+ OP_LH base rt lo16)
-+ (set rt (ext WI (mem HI (add base (ext SI (trunc HI lo16))))))
-+; (sequence ((SI addr) (HI word))
-+; (set addr (add base lo16))
-+; (set word (mem SI (and addr (inv 3))))
-+; (set word (srl word (sll (and addr 1) 4)))
-+; (set rt (ext SI word)))
-+ ())
-+
-+(dni lhu "load half word unsigned" (LOAD-DELAY USES-RS USES-RT)
-+ "lhu $rt,$lo16($base)"
-+ (+ OP_LHU base rt lo16)
-+ (set rt (zext WI (mem HI (add base (ext SI (trunc HI lo16))))))
-+; (sequence ((SI addr) (SI word))
-+; (set addr (add base lo16))
-+; (set word (mem SI (and addr (inv 3))))
-+; (set rt (srl word (sll (and addr 1) 4))))
-+ ())
-+
-+(dni lui "load upper immediate" (USES-RT)
-+ "lui $rt,$hi16"
-+ (+ OP_LUI (f-rs 0) rt hi16)
-+ (set rt (sll hi16 16))
-+ ())
-+
-+(dni lw "load word" (LOAD-DELAY USES-RS USES-RT)
-+ "lw $rt,$lo16($base)"
-+ (+ OP_LW base rt lo16)
-+ (set rt (mem SI (add base (ext SI (trunc HI lo16)))))
-+ ())
-+
-+
-+; Store instructions.
-+
-+(dni sb "store byte" (USES-RS USES-RT)
-+ "sb $rt,$lo16($base)"
-+ (+ OP_SB base rt lo16)
-+ (set (mem QI (add base (ext SI (trunc HI lo16)))) (and QI rt #xFF))
-+ ())
-+
-+(dni sh "store half word" (USES-RS USES-RT)
-+ "sh $rt,$lo16($base)"
-+ (+ OP_SH base rt lo16)
-+ (set (mem HI (add base (ext SI (trunc HI lo16)))) (and HI rt #xFFFF))
-+ ())
-+
-+(dni sw "store word" (USES-RS USES-RT)
-+ "sw $rt,$lo16($base)"
-+ (+ OP_SW base rt lo16)
-+ (set (mem SI (add base (ext SI (trunc HI lo16)))) rt)
-+ ())
-+
-+
-+; Special instructions for simulation/debugging
-+(dni break "breakpoint" ()
-+ "break"
-+ (+ OP_SPECIAL (f-rs 0) (f-rt 0) (f-rd 0) (f-shamt 0) FUNC_BREAK)
-+ (c-call VOID "do_break" pc)
-+ ())
-+
-+(dni syscall "system call" (YIELD-INSN)
-+ "syscall"
-+ (+ OP_SPECIAL execode (f-func 12))
-+ (c-call VOID "do_syscall")
-+ ())
-+
-+; Macro instructions, common to iq10 & iq2000
-+
-+(dnmi nop "nop" ()
-+ "nop"
-+ (emit sll (rd 0) (rt 0) (shamt 0))
-+)
-+
-+(dnmi li "load immediate" (USES-RS NO-DIS)
-+ "li $rs,$imm"
-+ (emit ori (rt 0) rs imm)
-+)
-+
-+(dnmi move "move" (USES-RD USES-RT NO-DIS)
-+ "move $rd,$rt"
-+ (emit or rd (rs 0) rt)
-+)
-+
-+(dnmi lb-base-0 "load byte - implied base 0" (USES-RT NO-DIS)
-+ "lb $rt,$lo16"
-+ (emit lb rt lo16 (base 0))
-+)
-+
-+(dnmi lbu-base-0 "load byte unsigned - implied base 0" (USES-RT NO-DIS)
-+ "lbu $rt,$lo16"
-+ (emit lbu rt lo16 (base 0))
-+)
-+
-+(dnmi lh-base-0 "load half - implied base 0" (USES-RT NO-DIS)
-+ "lh $rt,$lo16"
-+ (emit lh rt lo16 (base 0))
-+)
-+
-+(dnmi lw-base-0 "load word - implied base 0" (USES-RT NO-DIS)
-+ "lw $rt,$lo16"
-+ (emit lw rt lo16 (base 0))
-+)
-+
-+(dnmi m-add "add immediate" (USES-RS USES-RT NO-DIS)
-+ "add $rt,$rs,$lo16"
-+ (emit addi rt rs lo16))
-+
-+(dnmi m-addu "add immediate unsigned" (USES-RS USES-RT NO-DIS)
-+ "addu $rt,$rs,$lo16"
-+ (emit addiu rt rs lo16)
-+)
-+
-+(dnmi m-and "and immediate" (USES-RS USES-RT NO-DIS)
-+ "and $rt,$rs,$lo16"
-+ (emit andi rt rs lo16)
-+)
-+
-+(dnmi m-j "jump register" (USES-RS NO-DIS)
-+ "j $rs"
-+ (emit jr rs)
-+)
-+
-+(dnmi m-or "or immediate" (USES-RS USES-RT NO-DIS)
-+ "or $rt,$rs,$lo16"
-+ (emit ori rt rs lo16)
-+)
-+
-+(dnmi m-sll "shift left logical" (USES-RD USES-RT USES-RS NO-DIS)
-+ "sll $rd,$rt,$rs"
-+ (emit sllv rd rt rs)
-+)
-+
-+(dnmi m-slt "slt immediate" (USES-RS USES-RT NO-DIS)
-+ "slt $rt,$rs,$imm"
-+ (emit slti rt rs imm)
-+)
-+
-+(dnmi m-sltu "sltu immediate" (USES-RS USES-RT NO-DIS)
-+ "sltu $rt,$rs,$imm"
-+ (emit sltiu rt rs imm)
-+)
-+
-+(dnmi m-sra "shift right arithmetic" (USES-RD USES-RT USES-RS NO-DIS)
-+ "sra $rd,$rt,$rs"
-+ (emit srav rd rt rs)
-+)
-+
-+(dnmi m-srl "shift right logical" (USES-RD USES-RT USES-RS NO-DIS)
-+ "srl $rd,$rt,$rs"
-+ (emit srlv rd rt rs)
-+)
-+
-+(dnmi not "not" (USES-RD USES-RT NO-DIS)
-+ "not $rd,$rt"
-+ (emit nor rd (rs 0) rt)
-+)
-+
-+(dnmi subi "sub immediate" (USES-RS USES-RT NO-DIS)
-+ "subi $rt,$rs,$mlo16"
-+ (emit addiu rt rs mlo16)
-+)
-+
-+(dnmi m-sub "subtract immediate" (USES-RS USES-RT NO-DIS)
-+ "sub $rt,$rs,$mlo16"
-+ (emit addiu rt rs mlo16)
-+)
-+
-+(dnmi m-subu "subtract unsigned" (USES-RS USES-RT NO-DIS)
-+ "subu $rt,$rs,$mlo16"
-+ (emit addiu rt rs mlo16)
-+)
-+
-+(dnmi sb-base-0 "store byte - implied base 0" (USES-RT NO-DIS)
-+ "sb $rt,$lo16"
-+ (emit sb rt lo16 (base 0))
-+)
-+
-+(dnmi sh-base-0 "store half - implied base 0" (USES-RT NO-DIS)
-+ "sh $rt,$lo16"
-+ (emit sh rt lo16 (base 0))
-+)
-+
-+(dnmi sw-base-0 "store word - implied base 0" (USES-RT NO-DIS)
-+ "sw $rt,$lo16"
-+ (emit sw rt lo16 (base 0))
-+)
-+
-+(dnmi m-xor "xor immediate" (USES-RS USES-RT NO-DIS)
-+ "xor $rt,$rs,$lo16"
-+ (emit xori rt rs lo16)
-+)
-+
-+
-+(if (keep-mach? (iq2000))
-+(include "iq2000m.cpu"))
-+
-+(if (keep-mach? (iq10))
-+(include "iq10.cpu"))
-+
-+
-+
-diff -Nur binutils-2.24.orig/cgen/cpu/iq2000m.cpu binutils-2.24/cgen/cpu/iq2000m.cpu
---- binutils-2.24.orig/cgen/cpu/iq2000m.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/iq2000m.cpu 2016-06-30 21:26:12.621891868 +0200
-@@ -0,0 +1,630 @@
-+; IQ2000-only CPU description. -*- Scheme -*-
-+;
-+; Copyright 2000, 2001, 2002, 2004 Free Software Foundation, Inc.
-+;
-+; Contributed by Red Hat Inc; developed under contract from Vitesse.
-+;
-+; This file is part of the GNU Binutils.
-+;
-+; This program is free software; you can redistribute it and/or modify
-+; it under the terms of the GNU General Public License as published by
-+; the Free Software Foundation; either version 2 of the License, or
-+; (at your option) any later version.
-+;
-+; This program is distributed in the hope that it will be useful,
-+; but WITHOUT ANY WARRANTY; without even the implied warranty of
-+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+; GNU General Public License for more details.
-+;
-+; You should have received a copy of the GNU General Public License
-+; along with this program; if not, write to the Free Software
-+; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
-+
-+(dni andoui "and upper ones immediate" (MACH2000 USES-RS USES-RT)
-+ "andoui $rt,$rs,$hi16"
-+ (+ OP_ANDOUI rs rt hi16)
-+ (set rt (and rs (or (sll hi16 16) #xFFFF)))
-+ ())
-+
-+(dni andoui2 "and upper ones immediate" (ALIAS NO-DIS MACH2000 USES-RS USES-RT)
-+ "andoui ${rt-rs},$hi16"
-+ (+ OP_ANDOUI rt-rs hi16)
-+ (set rt-rs (and rt-rs (or (sll hi16 16) #xFFFF)))
-+ ())
-+
-+(dni orui2 "or upper immediate" (ALIAS NO-DIS MACH2000 USES-RS USES-RT)
-+ "orui ${rt-rs},$hi16"
-+ (+ OP_ORUI rt-rs hi16)
-+ (set rt-rs (or rt-rs (sll hi16 16)))
-+ ())
-+
-+(dni orui "or upper immediate" (MACH2000 USES-RS USES-RT)
-+ "orui $rt,$rs,$hi16"
-+ (+ OP_ORUI rs rt hi16)
-+ (set rt (or rs (sll hi16 16)))
-+ ())
-+
-+(dni bgtz "branch if greater than zero" (MACH2000 USES-RS)
-+ "bgtz $rs,$offset"
-+ (+ OP_BGTZ rs (f-rt 0) offset)
-+ (if (gt rs 0)
-+ (delay 1 (set pc offset)))
-+ ())
-+
-+
-+(dni bgtzl "branch if greater than zero likely" (MACH2000 USES-RS)
-+ "bgtzl $rs,$offset"
-+ (+ OP_BGTZL rs (f-rt 0) offset)
-+ (if (gt rs 0)
-+ (delay 1 (set pc offset))
-+ (skip 1))
-+ ())
-+
-+(dni blez "branch if less than or equal to zero" (MACH2000 USES-RS)
-+ "blez $rs,$offset"
-+ (+ OP_BLEZ rs (f-rt 0) offset)
-+ (if (le rs 0)
-+ (delay 1 (set pc offset)))
-+ ())
-+
-+(dni blezl "branch if less than or equal to zero likely" (MACH2000 USES-RS)
-+ "blezl $rs,$offset"
-+ (+ OP_BLEZL rs (f-rt 0) offset)
-+ (if (le rs 0)
-+ (delay 1 (set pc offset))
-+ (skip 1))
-+ ())
-+
-+
-+(dni mrgb "merge bytes" (MACH2000 USES-RD USES-RS USES-RT)
-+ "mrgb $rd,$rs,$rt,$mask"
-+ (+ OP_SPECIAL rs rt rd (f-10 0) mask FUNC_MRGB)
-+ (sequence ((SI temp))
-+ (if (bitclear? mask 0)
-+ (set temp (and rs #xFF))
-+ (set temp (and rt #xFF)))
-+ (if (bitclear? mask 1)
-+ (set temp (or temp (and rs #xFF00)))
-+ (set temp (or temp (and rt #xFF00))))
-+ (if (bitclear? mask 2)
-+ (set temp (or temp (and rs #xFF0000)))
-+ (set temp (or temp (and rt #xFF0000))))
-+ (if (bitclear? mask 3)
-+ (set temp (or temp (and rs #xFF000000)))
-+ (set temp (or temp (and rt #xFF000000))))
-+ (set rd temp))
-+ ())
-+
-+(dni mrgb2 "merge bytes" (ALIAS NO-DIS MACH2000 USES-RD USES-RS USES-RT)
-+ "mrgb ${rd-rs},$rt,$mask"
-+ (+ OP_SPECIAL rt rd-rs (f-10 0) mask FUNC_MRGB)
-+ (sequence ((SI temp))
-+ (if (bitclear? mask 0)
-+ (set temp (and rd-rs #xFF))
-+ (set temp (and rt #xFF)))
-+ (if (bitclear? mask 1)
-+ (set temp (or temp (and rd-rs #xFF00)))
-+ (set temp (or temp (and rt #xFF00))))
-+ (if (bitclear? mask 2)
-+ (set temp (or temp (and rd-rs #xFF0000)))
-+ (set temp (or temp (and rt #xFF0000))))
-+ (if (bitclear? mask 3)
-+ (set temp (or temp (and rd-rs #xFF000000)))
-+ (set temp (or temp (and rt #xFF000000))))
-+ (set rd-rs temp))
-+ ())
-+
-+; NOTE: None of these instructions' semantics are specified, so they
-+; will not work in a simulator.
-+;
-+; Architectural and coprocessor instructions.
-+; BREAK and SYSCALL are implemented with escape hatches to the C
-+; code. These are used by the test suite to indicate pass/failures.
-+
-+(dni bctxt "branch and switch context" (MACH2000 DELAY-SLOT COND-CTI USES-RS)
-+ "bctxt $rs,$offset"
-+ (+ OP_REGIMM rs (f-rt 6) offset)
-+ (unimp bctxt)
-+ ())
-+
-+(dni bc0f "branch if copro 0 condition false" (MACH2000 DELAY-SLOT COND-CTI)
-+ "bc0f $offset"
-+ (+ OP_COP0 (f-rs 8) (f-rt 0) offset)
-+ (unimp bc0f)
-+ ())
-+
-+(dni bc0fl "branch if copro 0 condition false likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
-+ "bc0fl $offset"
-+ (+ OP_COP0 (f-rs 8) (f-rt 2) offset)
-+ (unimp bc0fl)
-+ ())
-+
-+(dni bc3f "branch if copro 3 condition false" (MACH2000 DELAY-SLOT COND-CTI)
-+ "bc3f $offset"
-+ (+ OP_COP3 (f-rs 8) (f-rt 0) offset)
-+ (unimp bc3f)
-+ ())
-+
-+(dni bc3fl "branch if copro 3 condition false likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
-+ "bc3fl $offset"
-+ (+ OP_COP3 (f-rs 8) (f-rt 2) offset)
-+ (unimp bc3fl)
-+ ())
-+
-+(dni bc0t "branch if copro 0 condition true" (MACH2000 DELAY-SLOT COND-CTI)
-+ "bc0t $offset"
-+ (+ OP_COP0 (f-rs 8) (f-rt 1) offset)
-+ (unimp bc0t)
-+ ())
-+
-+(dni bc0tl "branch if copro 0 condition true likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
-+ "bc0tl $offset"
-+ (+ OP_COP0 (f-rs 8) (f-rt 3) offset)
-+ (unimp bc0tl)
-+ ())
-+
-+(dni bc3t "branch if copro 3 condition true" (MACH2000 DELAY-SLOT COND-CTI)
-+ "bc3t $offset"
-+ (+ OP_COP3 (f-rs 8) (f-rt 1) offset)
-+ (unimp bc3t)
-+ ())
-+
-+(dni bc3tl "branch if copro 3 condition true likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
-+ "bc3tl $offset"
-+ (+ OP_COP3 (f-rs 8) (f-rt 3) offset)
-+ (unimp bc3tl)
-+ ())
-+
-+; Note that we don't set the USES-RD or USES-RT attributes for many of the following
-+; instructions, as it's the COP register that's being specified.
-+
-+(dni cfc0 "control from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
-+ "cfc0 $rt,$rd"
-+ (+ OP_COP0 (f-rs 2) rt rd (f-10-11 0))
-+ (unimp cfc0)
-+ ())
-+
-+(dni cfc1 "control from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
-+ "cfc1 $rt,$rd"
-+ (+ OP_COP1 (f-rs 2) rt rd (f-10-11 0))
-+ (unimp cfc1)
-+ ())
-+
-+(dni cfc2 "control from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
-+ "cfc2 $rt,$rd"
-+ (+ OP_COP2 (f-rs 2) rt rd (f-10-11 0))
-+ (unimp cfc2)
-+ ())
-+
-+(dni cfc3 "control from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
-+ "cfc3 $rt,$rd"
-+ (+ OP_COP3 (f-rs 2) rt rd (f-10-11 0))
-+ (unimp cfc3)
-+ ())
-+
-+; COPz instructions are an instruction form, not real instructions
-+; with associated assembly mnemonics. Therefore, they are omitted
-+; from the ISA description.
-+
-+(dni chkhdr "check header" (MACH2000 LOAD-DELAY USES-RD YIELD-INSN)
-+ "chkhdr $rd,$rt"
-+ (+ OP_COP3 (f-rs 9) rt rd (f-shamt 0) (f-func 0))
-+ (unimp chkhdr)
-+ ())
-+
-+(dni ctc0 "control to coprocessor 0" (MACH2000 USES-RT)
-+ "ctc0 $rt,$rd"
-+ (+ OP_COP0 (f-rs 6) rt rd (f-10-11 0))
-+ (unimp ctc0)
-+ ())
-+
-+(dni ctc1 "control to coprocessor 1" (MACH2000 USES-RT)
-+ "ctc1 $rt,$rd"
-+ (+ OP_COP1 (f-rs 6) rt rd (f-10-11 0))
-+ (unimp ctc1)
-+ ())
-+
-+(dni ctc2 "control to coprocessor 2" (MACH2000 USES-RT)
-+ "ctc2 $rt,$rd"
-+ (+ OP_COP2 (f-rs 6) rt rd (f-10-11 0))
-+ (unimp ctc2)
-+ ())
-+
-+(dni ctc3 "control to coprocessor 3" (MACH2000 USES-RT)
-+ "ctc3 $rt,$rd"
-+ (+ OP_COP3 (f-rs 6) rt rd (f-10-11 0))
-+ (unimp ctc3)
-+ ())
-+
-+(dni jcr "jump context register" (MACH2000 DELAY-SLOT UNCOND-CTI USES-RS)
-+ "jcr $rs"
-+ (+ OP_SPECIAL rs (f-rt 0) (f-rd 0) (f-shamt 0) FUNC_JCR)
-+ (unimp jcr)
-+ ())
-+
-+(dni luc32 "lookup chain 32 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "luc32 $rt,$rd"
-+ (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 3))
-+ (unimp luc32)
-+ ())
-+
-+(dni luc32l "lookup chain 32 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "luc32l $rt,$rd"
-+ (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 7))
-+ (unimp luc32l)
-+ ())
-+
-+(dni luc64 "lookup chain 64 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "luc64 $rt,$rd"
-+ (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 11))
-+ (unimp luc64)
-+ ())
-+
-+(dni luc64l "lookup chain 64 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "luc64l $rt,$rd"
-+ (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 15))
-+ (unimp luc64l)
-+ ())
-+
-+(dni luk "lookup key" (MACH2000 USES-RD USES-RT)
-+ "luk $rt,$rd"
-+ (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 8))
-+ (unimp luk)
-+ ())
-+
-+(dni lulck "lookup lock" (MACH2000 USES-RT YIELD-INSN)
-+ "lulck $rt"
-+ (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 4))
-+ (unimp lulck)
-+ ())
-+
-+(dni lum32 "lookup match 32 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "lum32 $rt,$rd"
-+ (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 2))
-+ (unimp lum32)
-+ ())
-+
-+(dni lum32l "lookup match 32 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "lum32l $rt,$rd"
-+ (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 6))
-+ (unimp lum32l)
-+ ())
-+
-+(dni lum64 "lookup match 64 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "lum64 $rt,$rd"
-+ (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 10))
-+ (unimp lum64)
-+ ())
-+
-+(dni lum64l "lookup match 64 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "lum64l $rt,$rd"
-+ (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 14))
-+ (unimp lum64l)
-+ ())
-+
-+(dni lur "lookup read" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "lur $rt,$rd"
-+ (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 1))
-+ (unimp lur)
-+ ())
-+
-+(dni lurl "lookup read and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "lurl $rt,$rd"
-+ (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 5))
-+ (unimp lurl)
-+ ())
-+
-+(dni luulck "lookup unlock" (MACH2000 USES-RT YIELD-INSN)
-+ "luulck $rt"
-+ (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 0))
-+ (unimp luulck)
-+ ())
-+
-+(dni mfc0 "move from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
-+ "mfc0 $rt,$rd"
-+ (+ OP_COP0 (f-rs 0) rt rd (f-10-11 0))
-+ (unimp mfc0)
-+ ())
-+
-+(dni mfc1 "move from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
-+ "mfc1 $rt,$rd"
-+ (+ OP_COP1 (f-rs 0) rt rd (f-10-11 0))
-+ (unimp mfc1)
-+ ())
-+
-+(dni mfc2 "move from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
-+ "mfc2 $rt,$rd"
-+ (+ OP_COP2 (f-rs 0) rt rd (f-10-11 0))
-+ (unimp mfc2)
-+ ())
-+
-+(dni mfc3 "move from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
-+ "mfc3 $rt,$rd"
-+ (+ OP_COP3 (f-rs 0) rt rd (f-10-11 0))
-+ (unimp mfc3)
-+ ())
-+
-+(dni mtc0 "move to coprocessor 0" (MACH2000 USES-RT)
-+ "mtc0 $rt,$rd"
-+ (+ OP_COP0 (f-rs 4) rt rd (f-10-11 0))
-+ (unimp mtc0)
-+ ())
-+
-+(dni mtc1 "move to coprocessor 1" (MACH2000 USES-RT)
-+ "mtc1 $rt,$rd"
-+ (+ OP_COP1 (f-rs 4) rt rd (f-10-11 0))
-+ (unimp mtc1)
-+ ())
-+
-+(dni mtc2 "move to coprocessor 2" (MACH2000 USES-RT)
-+ "mtc2 $rt,$rd"
-+ (+ OP_COP2 (f-rs 4) rt rd (f-10-11 0))
-+ (unimp mtc2)
-+ ())
-+
-+(dni mtc3 "move to coprocessor 3" (MACH2000 USES-RT)
-+ "mtc3 $rt,$rd"
-+ (+ OP_COP3 (f-rs 4) rt rd (f-10-11 0))
-+ (unimp mtc3)
-+ ())
-+
-+(dni pkrl "pkrl" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "pkrl $rd,$rt"
-+ (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 7))
-+ (unimp pkrl)
-+ ())
-+
-+(dni pkrlr1 "pkrlr1" (MACH2000 USES-RT YIELD-INSN)
-+ "pkrlr1 $rt,$_index,$count"
-+ (+ OP_COP3 (f-rs 29) rt count _index)
-+ (unimp pkrlr1)
-+ ())
-+
-+(dni pkrlr30 "pkrlr30" (MACH2000 USES-RT YIELD-INSN)
-+ "pkrlr30 $rt,$_index,$count"
-+ (+ OP_COP3 (f-rs 31) rt count _index)
-+ (unimp pkrlr30)
-+ ())
-+
-+(dni rb "dma read bytes" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "rb $rd,$rt"
-+ (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 4))
-+ (unimp rb)
-+ ())
-+
-+(dni rbr1 "dma read bytes using r1" (MACH2000 USES-RT YIELD-INSN)
-+ "rbr1 $rt,$_index,$count"
-+ (+ OP_COP3 (f-rs 24) rt count _index)
-+ (unimp rbr1)
-+ ())
-+
-+(dni rbr30 "dma read bytes using r30" (MACH2000 USES-RT YIELD-INSN)
-+ "rbr30 $rt,$_index,$count"
-+ (+ OP_COP3 (f-rs 26) rt count _index)
-+ (unimp rbr30)
-+ ())
-+
-+(dni rfe "restore from exception" (MACH2000)
-+ "rfe"
-+ (+ OP_COP0 (f-25 1) (f-24-19 0) (f-func 16))
-+ (unimp rfe)
-+ ())
-+
-+(dni rx "dma read word64s" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "rx $rd,$rt"
-+ (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 6))
-+ (unimp rx)
-+ ())
-+
-+(dni rxr1 "dma read word64s using r1" (MACH2000 USES-RT YIELD-INSN)
-+ "rxr1 $rt,$_index,$count"
-+ (+ OP_COP3 (f-rs 28) rt count _index)
-+ (unimp rxr1)
-+ ())
-+
-+(dni rxr30 "dma read word 64s using r30" (MACH2000 USES-RT YIELD-INSN)
-+ "rxr30 $rt,$_index,$count"
-+ (+ OP_COP3 (f-rs 30) rt count _index)
-+ (unimp rxr30)
-+ ())
-+
-+(dni sleep "sleep" (MACH2000 YIELD-INSN)
-+ "sleep"
-+ (+ OP_SPECIAL execode FUNC_SLEEP)
-+ (unimp sleep)
-+ ())
-+
-+(dni srrd "sram read" (MACH2000 USES-RT YIELD-INSN)
-+ "srrd $rt"
-+ (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 16))
-+ (unimp srrd)
-+ ())
-+
-+(dni srrdl "sram read and lock" (MACH2000 USES-RT YIELD-INSN)
-+ "srrdl $rt"
-+ (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 20))
-+ (unimp srrdl)
-+ ())
-+
-+(dni srulck "sram unlock" (MACH2000 USES-RT YIELD-INSN)
-+ "srulck $rt"
-+ (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 22))
-+ (unimp srulck)
-+ ())
-+
-+(dni srwr "sram write" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "srwr $rt,$rd"
-+ (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 17))
-+ (unimp srwr)
-+ ())
-+
-+(dni srwru "sram write and unlock" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "srwru $rt,$rd"
-+ (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 21))
-+ (unimp srwru)
-+ ())
-+
-+(dni trapqfl "yield if dma queue full" (MACH2000 YIELD-INSN)
-+ "trapqfl"
-+ (+ OP_COP3 (f-rs 1) (f-rt 0) (f-rd 0) (f-shamt 0) (f-func 8))
-+ (unimp trapqfl)
-+ ())
-+
-+(dni trapqne "yield if dma queue not empty" (MACH2000 YIELD-INSN)
-+ "trapqne"
-+ (+ OP_COP3 (f-rs 1) (f-rt 0) (f-rd 0) (f-shamt 0) (f-func 9))
-+ (unimp trapqne)
-+ ())
-+
-+(dni traprel "traprel" (MACH2000 USES-RT YIELD-INSN)
-+ "traprel $rt"
-+ (+ OP_COP3 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 10))
-+ (unimp traprel)
-+ ())
-+
-+(dni wb "dma write bytes" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "wb $rd,$rt"
-+ (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 0))
-+ (unimp wb)
-+ ())
-+
-+(dni wbu "dma write bytes and unlock" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "wbu $rd,$rt"
-+ (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 1))
-+ (unimp wbu)
-+ ())
-+
-+(dni wbr1 "dma write bytes using r1" (MACH2000 USES-RT YIELD-INSN)
-+ "wbr1 $rt,$_index,$count"
-+ (+ OP_COP3 (f-rs 16) rt count _index)
-+ (unimp wbr1)
-+ ())
-+
-+(dni wbr1u "dma write bytes using r1 and unlock" (MACH2000 USES-RT YIELD-INSN)
-+ "wbr1u $rt,$_index,$count"
-+ (+ OP_COP3 (f-rs 17) rt count _index)
-+ (unimp wbr1u)
-+ ())
-+
-+(dni wbr30 "dma write bytes using r30" (MACH2000 USES-RT YIELD-INSN)
-+ "wbr30 $rt,$_index,$count"
-+ (+ OP_COP3 (f-rs 18) rt count _index)
-+ (unimp wbr30)
-+ ())
-+
-+(dni wbr30u "dma write bytes using r30 and unlock" (MACH2000 USES-RT YIELD-INSN)
-+ "wbr30u $rt,$_index,$count"
-+ (+ OP_COP3 (f-rs 19) rt count _index)
-+ (unimp wbr30u)
-+ ())
-+
-+(dni wx "dma write word64s" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "wx $rd,$rt"
-+ (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 2))
-+ (unimp wx)
-+ ())
-+
-+(dni wxu "dma write word64s and unlock" (MACH2000 USES-RD USES-RT YIELD-INSN)
-+ "wxu $rd,$rt"
-+ (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 3))
-+ (unimp wxu)
-+ ())
-+
-+(dni wxr1 "dma write word64s using r1" (MACH2000 USES-RT YIELD-INSN)
-+ "wxr1 $rt,$_index,$count"
-+ (+ OP_COP3 (f-rs 20) rt count _index)
-+ (unimp wxr1)
-+ ())
-+
-+(dni wxr1u "dma write word64s using r1 and unlock" (MACH2000 USES-RT YIELD-INSN)
-+ "wxr1u $rt,$_index,$count"
-+ (+ OP_COP3 (f-rs 21) rt count _index)
-+ (unimp wxr1u)
-+ ())
-+
-+(dni wxr30 "dma write word64s using r30" (MACH2000 USES-RT YIELD-INSN)
-+ "wxr30 $rt,$_index,$count"
-+ (+ OP_COP3 (f-rs 22) rt count _index)
-+ (unimp wxr30)
-+ ())
-+
-+(dni wxr30u "dma write word64s using r30 and unlock" (MACH2000 USES-RT YIELD-INSN)
-+ "wxr30u $rt,$_index,$count"
-+ (+ OP_COP3 (f-rs 23) rt count _index)
-+ (unimp wxr30u)
-+ ())
-+
-+
-+; Load/Store instructions.
-+
-+(dni ldw "load double word" (MACH2000 EVEN-REG-NUM LOAD-DELAY USES-RT)
-+ "ldw $rt,$lo16($base)"
-+ (+ OP_LDW base rt lo16)
-+ (sequence ((SI addr))
-+ (set addr (and (add base lo16) (inv 3)))
-+ (set (reg h-gr (add (ifield f-rt) 1)) (mem SI addr))
-+ (set rt (mem SI (add addr 4))))
-+ ())
-+
-+(dni sdw "store double word" (MACH2000 EVEN-REG-NUM USES-RT)
-+ "sdw $rt,$lo16($base)"
-+ (+ OP_SDW base rt lo16)
-+ (sequence ((SI addr))
-+ (set addr (and (add base lo16) (inv 3)))
-+ (set (mem SI (add addr 4)) rt)
-+ (set (mem SI addr) (reg h-gr (add (ifield f-rt) 1))))
-+ ())
-+
-+
-+; Jump instructions
-+
-+(dni j "jump" (MACH2000)
-+ "j $jmptarg"
-+ (+ OP_J (f-rsrvd 0) jmptarg)
-+ (delay 1 (set pc jmptarg))
-+ ())
-+
-+(dni jal "jump and link" (MACH2000 USES-R31)
-+ "jal $jmptarg"
-+ (+ OP_JAL (f-rsrvd 0) jmptarg)
-+ (delay 1
-+ (sequence ()
-+ (set (reg h-gr 31) (add pc 8))
-+ (set pc jmptarg)))
-+ ())
-+
-+(dni bmb "branch if matching byte-lane" (MACH2000 USES-RS USES-RT)
-+ "bmb $rs,$rt,$offset"
-+ (+ OP_BMB rs rt offset)
-+ (sequence ((BI branch?))
-+ (set branch? 0)
-+ (if (eq (and rs #xFF) (and rt #xFF))
-+ (set branch? 1))
-+ (if (eq (and rs #xFF00) (and rt #xFF00))
-+ (set branch? 1))
-+ (if (eq (and rs #xFF0000) (and rt #xFF0000))
-+ (set branch? 1))
-+ (if (eq (and rs #xFF000000) (and rt #xFF000000))
-+ (set branch? 1))
-+ (if branch?
-+ (delay 1 (set pc offset))))
-+ ())
-+
-+
-+; Macros
-+
-+(dnmi ldw-base-0 "load double word - implied base 0" (MACH2000 EVEN-REG-NUM LOAD-DELAY USES-RT USES-RS NO-DIS)
-+ "ldw $rt,$lo16"
-+ (emit ldw rt lo16 (base 0))
-+)
-+
-+(dnmi sdw-base-0 "store double word - implied base 0" (MACH2000 EVEN-REG-NUM USES-RT NO-DIS)
-+ "sdw $rt,$lo16"
-+ (emit sdw rt lo16 (base 0))
-+)
-+
-+
-+
-+
-+
-+
-diff -Nur binutils-2.24.orig/cgen/cpu/iq2000.opc binutils-2.24/cgen/cpu/iq2000.opc
---- binutils-2.24.orig/cgen/cpu/iq2000.opc 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/iq2000.opc 2016-06-30 21:26:12.621891868 +0200
-@@ -0,0 +1,301 @@
-+/* IQ2000 opcode support. -*- C -*-
-+ Copyright (C) 1996, 1997, 1998, 2001, 2002, 2005 Red Hat Inc.
-+ This file is part of CGEN. */
-+
-+/* This file is an addendum to iq2000.cpu. Heavy use of C code isn't
-+ appropriate in .cpu files, so it resides here. This especially applies
-+ to assembly/disassembly where parsing/printing can be quite involved.
-+ Such things aren't really part of the specification of the cpu, per se,
-+ so .cpu files provide the general framework and .opc files handle the
-+ nitty-gritty details as necessary.
-+
-+ Each section is delimited with start and end markers.
-+
-+ <arch>-opc.h additions use: "-- opc.h"
-+ <arch>-opc.c additions use: "-- opc.c"
-+ <arch>-asm.c additions use: "-- asm.c"
-+ <arch>-dis.c additions use: "-- dis.c"
-+ <arch>-ibd.h additions use: "-- ibd.h". */
-+
-+/* -- opc.h */
-+
-+/* Allows reason codes to be output when assembler errors occur. */
-+#define CGEN_VERBOSE_ASSEMBLER_ERRORS
-+
-+/* Override disassembly hashing - there are variable bits in the top
-+ byte of these instructions. */
-+#define CGEN_DIS_HASH_SIZE 8
-+#define CGEN_DIS_HASH(buf,value) (((* (unsigned char*) (buf)) >> 6) % CGEN_DIS_HASH_SIZE)
-+
-+/* following activates check beyond hashing since some iq2000 and iq10
-+ instructions have same mnemonics but different functionality. */
-+#define CGEN_VALIDATE_INSN_SUPPORTED
-+
-+extern int iq2000_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *);
-+
-+/* -- asm.c */
-+
-+#include "safe-ctype.h"
-+
-+static const char * MISSING_CLOSING_PARENTHESIS = N_("missing `)'");
-+
-+/* Special check to ensure that instruction exists for given machine. */
-+
-+int
-+iq2000_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
-+{
-+ int machs = cd->machs;
-+
-+ return (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH) & machs) != 0;
-+}
-+
-+static int
-+iq2000_cgen_isa_register (const char **strp)
-+{
-+ int len;
-+ int ch1, ch2;
-+
-+ if (**strp == 'r' || **strp == 'R')
-+ {
-+ len = strlen (*strp);
-+ if (len == 2)
-+ {
-+ ch1 = (*strp)[1];
-+ if ('0' <= ch1 && ch1 <= '9')
-+ return 1;
-+ }
-+ else if (len == 3)
-+ {
-+ ch1 = (*strp)[1];
-+ ch2 = (*strp)[2];
-+ if (('1' <= ch1 && ch1 <= '2') && ('0' <= ch2 && ch2 <= '9'))
-+ return 1;
-+ if ('3' == ch1 && (ch2 == '0' || ch2 == '1'))
-+ return 1;
-+ }
-+ }
-+ if (**strp == '%'
-+ && TOLOWER ((*strp)[1]) != 'l'
-+ && TOLOWER ((*strp)[1]) != 'h')
-+ return 1;
-+ return 0;
-+}
-+
-+/* Handle negated literal. */
-+
-+static const char *
-+parse_mimm (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg;
-+
-+ /* Verify this isn't a register. */
-+ if (iq2000_cgen_isa_register (strp))
-+ errmsg = _("immediate value cannot be register");
-+ else
-+ {
-+ long value;
-+
-+ errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
-+ if (errmsg == NULL)
-+ {
-+ long x = (-value) & 0xFFFF0000;
-+
-+ if (x != 0 && x != (long) 0xFFFF0000)
-+ errmsg = _("immediate value out of range");
-+ else
-+ *valuep = (-value & 0xFFFF);
-+ }
-+ }
-+ return errmsg;
-+}
-+
-+/* Handle signed/unsigned literal. */
-+
-+static const char *
-+parse_imm (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg;
-+
-+ if (iq2000_cgen_isa_register (strp))
-+ errmsg = _("immediate value cannot be register");
-+ else
-+ {
-+ long value;
-+
-+ errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
-+ if (errmsg == NULL)
-+ {
-+ long x = value & 0xFFFF0000;
-+
-+ if (x != 0 && x != (long) 0xFFFF0000)
-+ errmsg = _("immediate value out of range");
-+ else
-+ *valuep = (value & 0xFFFF);
-+ }
-+ }
-+ return errmsg;
-+}
-+
-+/* Handle iq10 21-bit jmp offset. */
-+
-+static const char *
-+parse_jtargq10 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ int reloc ATTRIBUTE_UNUSED,
-+ enum cgen_parse_operand_result *type_addr ATTRIBUTE_UNUSED,
-+ bfd_vma *valuep)
-+{
-+ const char *errmsg;
-+ bfd_vma value;
-+ enum cgen_parse_operand_result result_type = CGEN_PARSE_OPERAND_RESULT_NUMBER;
-+
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_OFFSET_21,
-+ & result_type, & value);
-+ if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ {
-+ /* Check value is within 23-bits
-+ (remembering that 2-bit shift right will occur). */
-+ if (value > 0x7fffff)
-+ return _("21-bit offset out of range");
-+ }
-+ *valuep = (value & 0x7FFFFF);
-+ return errmsg;
-+}
-+
-+/* Handle high(). */
-+
-+static const char *
-+parse_hi16 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ if (strncasecmp (*strp, "%hi(", 4) == 0)
-+ {
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+ const char *errmsg;
-+
-+ *strp += 4;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+
-+ ++*strp;
-+ if (errmsg == NULL
-+ && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ {
-+ /* If value has top-bit of %lo on, then it will
-+ sign-propagate and so we compensate by adding
-+ 1 to the resultant %hi value. */
-+ if (value & 0x8000)
-+ value += 0x10000;
-+ value &= 0xffff;
-+ value >>= 16;
-+ }
-+ *valuep = value;
-+
-+ return errmsg;
-+ }
-+
-+ /* We add %uhi in case a user just wants the high 16-bits or is using
-+ an insn like ori for %lo which does not sign-propagate. */
-+ if (strncasecmp (*strp, "%uhi(", 5) == 0)
-+ {
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+ const char *errmsg;
-+
-+ *strp += 5;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_UHI16,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+
-+ ++*strp;
-+ if (errmsg == NULL
-+ && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value >>= 16;
-+
-+ value &= 0xffff;
-+ *valuep = value;
-+
-+ return errmsg;
-+ }
-+
-+ return parse_imm (cd, strp, opindex, valuep);
-+}
-+
-+/* Handle %lo in a signed context.
-+ The signedness of the value doesn't matter to %lo(), but this also
-+ handles the case where %lo() isn't present. */
-+
-+static const char *
-+parse_lo16 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ if (strncasecmp (*strp, "%lo(", 4) == 0)
-+ {
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ *strp += 4;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ if (errmsg == NULL
-+ && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value &= 0xffff;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return parse_imm (cd, strp, opindex, valuep);
-+}
-+
-+/* Handle %lo in a negated signed context.
-+ The signedness of the value doesn't matter to %lo(), but this also
-+ handles the case where %lo() isn't present. */
-+
-+static const char *
-+parse_mlo16 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ if (strncasecmp (*strp, "%lo(", 4) == 0)
-+ {
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ *strp += 4;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ if (errmsg == NULL
-+ && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value = (-value) & 0xffff;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return parse_mimm (cd, strp, opindex, valuep);
-+}
-+
-+/* -- */
-diff -Nur binutils-2.24.orig/cgen/cpu/m32c.cpu binutils-2.24/cgen/cpu/m32c.cpu
---- binutils-2.24.orig/cgen/cpu/m32c.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/m32c.cpu 2016-06-30 21:26:12.625892023 +0200
-@@ -0,0 +1,10391 @@
-+; Renesas M32C CPU description. -*- Scheme -*-
-+;
-+; Copyright 2005 Free Software Foundation, Inc.
-+;
-+; Contributed by Red Hat Inc; developed under contract from Renesas.
-+;
-+; This file is part of the GNU Binutils.
-+;
-+; This program is free software; you can redistribute it and/or modify
-+; it under the terms of the GNU General Public License as published by
-+; the Free Software Foundation; either version 2 of the License, or
-+; (at your option) any later version.
-+;
-+; This program is distributed in the hope that it will be useful,
-+; but WITHOUT ANY WARRANTY; without even the implied warranty of
-+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+; GNU General Public License for more details.
-+;
-+; You should have received a copy of the GNU General Public License
-+; along with this program; if not, write to the Free Software
-+; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
-+
-+(include "simplify.inc")
-+
-+(define-arch
-+ (name m32c)
-+ (comment "Renesas M32C")
-+ (default-alignment forced)
-+ (insn-lsb0? #f)
-+ (machs m16c m32c)
-+ (isas m16c m32c)
-+)
-+
-+(define-isa
-+ (name m16c)
-+
-+ (default-insn-bitsize 32)
-+
-+ ; Number of bytes of insn we can initially fetch.
-+ (base-insn-bitsize 32)
-+
-+ ; Used in computing bit numbers.
-+ (default-insn-word-bitsize 32)
-+
-+ (decode-assist (0 1 2 3 4 5 6 7)) ; Initial bitnumbers to decode insns by.
-+
-+ ; fetches 1 insn at a time.
-+ (liw-insns 1)
-+
-+ ; executes 1 insn at a time.
-+ (parallel-insns 1)
-+ )
-+
-+(define-isa
-+ (name m32c)
-+
-+ (default-insn-bitsize 32)
-+
-+ ; Number of bytes of insn we can initially fetch.
-+ (base-insn-bitsize 32)
-+
-+ ; Used in computing bit numbers.
-+ (default-insn-word-bitsize 32)
-+
-+ (decode-assist (0 1 2 3 4 5 6 7)) ; Initial bitnumbers to decode insns by.
-+
-+ ; fetches 1 insn at a time.
-+ (liw-insns 1)
-+
-+ ; executes 1 insn at a time.
-+ (parallel-insns 1)
-+ )
-+
-+(define-cpu
-+ ; cpu names must be distinct from the architecture name and machine names.
-+ ; The "b" suffix stands for "base" and is the convention.
-+ ; The "f" suffix stands for "family" and is the convention.
-+ (name m16cbf)
-+ (comment "Renesas M16C base family")
-+ (insn-endian big)
-+ (data-endian little)
-+ (word-bitsize 16)
-+)
-+
-+(define-cpu
-+ ; cpu names must be distinct from the architecture name and machine names.
-+ ; The "b" suffix stands for "base" and is the convention.
-+ ; The "f" suffix stands for "family" and is the convention.
-+ (name m32cbf)
-+ (comment "Renesas M32C base family")
-+ (insn-endian big)
-+ (data-endian little)
-+ (word-bitsize 16)
-+)
-+
-+(define-mach
-+ (name m16c)
-+ (comment "Generic M16C cpu")
-+ (cpu m32cbf)
-+)
-+
-+(define-mach
-+ (name m32c)
-+ (comment "Generic M32C cpu")
-+ (cpu m32cbf)
-+)
-+
-+; Model descriptions.
-+
-+(define-model
-+ (name m16c)
-+ (comment "m16c") (attrs)
-+ (mach m16c)
-+
-+ ; `state' is a list of variables for recording model state
-+ ; (state)
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+(define-model
-+ (name m32c)
-+ (comment "m32c") (attrs)
-+ (mach m32c)
-+
-+ ; `state' is a list of variables for recording model state
-+ ; (state)
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+; Macros to simplify MACH attribute specification.
-+
-+(define-pmacro all-isas () (ISA m16c,m32c))
-+(define-pmacro m16c-isa () (ISA m16c))
-+(define-pmacro m32c-isa () (ISA m32c))
-+
-+(define-pmacro MACH16 (MACH m16c))
-+(define-pmacro MACH32 (MACH m32c))
-+
-+(define-pmacro (machine size)
-+ (MACH (.sym m size c)) (ISA (.sym m size c)))
-+
-+;=============================================================
-+; Fields
-+;-------------------------------------------------------------
-+; Main opcodes
-+;
-+(dnf f-0-1 "opcode" (all-isas) 0 1)
-+(dnf f-0-2 "opcode" (all-isas) 0 2)
-+(dnf f-0-3 "opcode" (all-isas) 0 3)
-+(dnf f-0-4 "opcode" (all-isas) 0 4)
-+(dnf f-1-3 "opcode" (all-isas) 1 3)
-+(dnf f-2-2 "opcode" (all-isas) 2 2)
-+(dnf f-3-4 "opcode" (all-isas) 3 4)
-+(dnf f-3-1 "opcode" (all-isas) 3 1)
-+(dnf f-4-1 "opcode" (all-isas) 4 1)
-+(dnf f-4-3 "opcode" (all-isas) 4 3)
-+(dnf f-4-4 "opcode" (all-isas) 4 4)
-+(dnf f-4-6 "opcode" (all-isas) 4 6)
-+(dnf f-5-1 "opcode" (all-isas) 5 1)
-+(dnf f-5-3 "opcode" (all-isas) 5 3)
-+(dnf f-6-2 "opcode" (all-isas) 6 2)
-+(dnf f-7-1 "opcode" (all-isas) 7 1)
-+(dnf f-8-1 "opcode" (all-isas) 8 1)
-+(dnf f-8-2 "opcode" (all-isas) 8 2)
-+(dnf f-8-3 "opcode" (all-isas) 8 3)
-+(dnf f-8-4 "opcode" (all-isas) 8 4)
-+(dnf f-8-8 "opcode" (all-isas) 8 8)
-+(dnf f-9-3 "opcode" (all-isas) 9 3)
-+(dnf f-9-1 "opcode" (all-isas) 9 1)
-+(dnf f-10-1 "opcode" (all-isas) 10 1)
-+(dnf f-10-2 "opcode" (all-isas) 10 2)
-+(dnf f-10-3 "opcode" (all-isas) 10 3)
-+(dnf f-11-1 "opcode" (all-isas) 11 1)
-+(dnf f-12-1 "opcode" (all-isas) 12 1)
-+(dnf f-12-2 "opcode" (all-isas) 12 2)
-+(dnf f-12-3 "opcode" (all-isas) 12 3)
-+(dnf f-12-4 "opcode" (all-isas) 12 4)
-+(dnf f-12-6 "opcode" (all-isas) 12 6)
-+(dnf f-13-3 "opcode" (all-isas) 13 3)
-+(dnf f-14-1 "opcode" (all-isas) 14 1)
-+(dnf f-14-2 "opcode" (all-isas) 14 2)
-+(dnf f-15-1 "opcode" (all-isas) 15 1)
-+(dnf f-16-1 "opcode" (all-isas) 16 1)
-+(dnf f-16-2 "opcode" (all-isas) 16 2)
-+(dnf f-16-4 "opcode" (all-isas) 16 4)
-+(dnf f-16-8 "opcode" (all-isas) 16 8)
-+(dnf f-18-1 "opcode" (all-isas) 18 1)
-+(dnf f-18-2 "opcode" (all-isas) 18 2)
-+(dnf f-18-3 "opcode" (all-isas) 18 3)
-+(dnf f-20-1 "opcode" (all-isas) 20 1)
-+(dnf f-20-3 "opcode" (all-isas) 20 3)
-+(dnf f-20-2 "opcode" (all-isas) 20 2)
-+(dnf f-20-4 "opcode" (all-isas) 20 4)
-+(dnf f-21-3 "opcode" (all-isas) 21 3)
-+(dnf f-24-2 "opcode" (all-isas) 24 2)
-+(dnf f-24-8 "opcode" (all-isas) 24 8)
-+(dnf f-32-16 "opcode" (all-isas) 32 16)
-+
-+;-------------------------------------------------------------
-+; Registers
-+;-------------------------------------------------------------
-+
-+(dnf f-src16-rn "source Rn for m16c" (MACH16 m16c-isa) 10 2)
-+(dnf f-src16-an "source An for m16c" (MACH16 m16c-isa) 11 1)
-+
-+(dnf f-src32-an-unprefixed "destination An for m32c" (MACH32 m32c-isa) 11 1)
-+(dnf f-src32-an-prefixed "destination An for m32c" (MACH32 m32c-isa) 19 1)
-+
-+; QI mode gr encoding for m32c is different than for m16c. The hardware
-+; is indexed using the m16c encoding, so perform the transformation here.
-+; register m16c m32c
-+; ----------------------
-+; r0l 00'b 10'b
-+; r0h 01'b 00'b
-+; r1l 10'b 11'b
-+; r1h 11'b 01'b
-+(df f-src32-rn-unprefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 10 2 UINT
-+ ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
-+ ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
-+)
-+; QI mode gr encoding for m32c is different than for m16c. The hardware
-+; is indexed using the m16c encoding, so perform the transformation here.
-+; register m16c m32c
-+; ----------------------
-+; r0l 00'b 10'b
-+; r0h 01'b 00'b
-+; r1l 10'b 11'b
-+; r1h 11'b 01'b
-+(df f-src32-rn-prefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 18 2 UINT
-+ ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
-+ ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
-+)
-+; HI mode gr encoding for m32c is different than for m16c. The hardware
-+; is indexed using the m16c encoding, so perform the transformation here.
-+; register m16c m32c
-+; ----------------------
-+; r0 00'b 10'b
-+; r1 01'b 11'b
-+; r2 10'b 00'b
-+; r3 11'b 01'b
-+(df f-src32-rn-unprefixed-HI "source Rn HI for m32c" (MACH32 m32c-isa) 10 2 UINT
-+ ((value pc) (mod USI (add value 2) 4)) ; insert
-+ ((value pc) (mod USI (add value 2) 4)) ; extract
-+)
-+
-+; HI mode gr encoding for m32c is different than for m16c. The hardware
-+; is indexed using the m16c encoding, so perform the transformation here.
-+; register m16c m32c
-+; ----------------------
-+; r0 00'b 10'b
-+; r1 01'b 11'b
-+; r2 10'b 00'b
-+; r3 11'b 01'b
-+(df f-src32-rn-prefixed-HI "source Rn HI for m32c" (MACH32 m32c-isa) 18 2 UINT
-+ ((value pc) (mod USI (add value 2) 4)) ; insert
-+ ((value pc) (mod USI (add value 2) 4)) ; extract
-+)
-+
-+; SI mode gr encoding for m32c is as follows:
-+; register encoding index
-+; -------------------------
-+; r2r0 10'b 0
-+; r3r1 11'b 1
-+(df f-src32-rn-unprefixed-SI "source Rn SI for m32c" (MACH32 m32c-isa) 10 2 UINT
-+ ((value pc) (add USI value 2)) ; insert
-+ ((value pc) (sub USI value 2)) ; extract
-+)
-+(df f-src32-rn-prefixed-SI "source Rn SI for m32c" (MACH32 m32c-isa) 18 2 UINT
-+ ((value pc) (add USI value 2)) ; insert
-+ ((value pc) (sub USI value 2)) ; extract
-+)
-+
-+(dnf f-dst32-rn-ext-unprefixed "destination Rn for m32c" (MACH32 m32c-isa) 9 1)
-+
-+(dnf f-dst16-rn "destination Rn for m16c" (MACH16 m16c-isa) 14 2)
-+(dnf f-dst16-rn-ext "destination Rn for m16c" (MACH16 m16c-isa) 14 1)
-+(dnf f-dst16-rn-QI-s "destination Rn for m16c" (MACH16 m16c-isa) 5 1)
-+
-+(dnf f-dst16-an "destination An for m16c" (MACH16 m16c-isa) 15 1)
-+(dnf f-dst16-an-s "destination An for m16c" (MACH16 m16c-isa) 4 1)
-+
-+(dnf f-dst32-an-unprefixed "destination An for m32c" (MACH32 m32c-isa) 9 1)
-+(dnf f-dst32-an-prefixed "destination An for m32c" (MACH32 m32c-isa) 17 1)
-+
-+; QI mode gr encoding for m32c is different than for m16c. The hardware
-+; is indexed using the m16c encoding, so perform the transformation here.
-+; register m16c m32c
-+; ----------------------
-+; r0l 00'b 10'b
-+; r0h 01'b 00'b
-+; r1l 10'b 11'b
-+; r1h 11'b 01'b
-+(df f-dst32-rn-unprefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 8 2 UINT
-+ ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
-+ ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
-+)
-+(df f-dst32-rn-prefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 16 2 UINT
-+ ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
-+ ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
-+)
-+; HI mode gr encoding for m32c is different than for m16c. The hardware
-+; is indexed using the m16c encoding, so perform the transformation here.
-+; register m16c m32c
-+; ----------------------
-+; r0 00'b 10'b
-+; r1 01'b 11'b
-+; r2 10'b 00'b
-+; r3 11'b 01'b
-+(df f-dst32-rn-unprefixed-HI "destination Rn HI for m32c" (MACH32 m32c-isa) 8 2 UINT
-+ ((value pc) (mod USI (add value 2) 4)) ; insert
-+ ((value pc) (mod USI (add value 2) 4)) ; extract
-+)
-+(df f-dst32-rn-prefixed-HI "destination Rn HI for m32c" (MACH32 m32c-isa) 16 2 UINT
-+ ((value pc) (mod USI (add value 2) 4)) ; insert
-+ ((value pc) (mod USI (add value 2) 4)) ; extract
-+)
-+; SI mode gr encoding for m32c is as follows:
-+; register encoding index
-+; -------------------------
-+; r2r0 10'b 0
-+; r3r1 11'b 1
-+(df f-dst32-rn-unprefixed-SI "destination Rn SI for m32c" (MACH32 m32c-isa) 8 2 UINT
-+ ((value pc) (add USI value 2)) ; insert
-+ ((value pc) (sub USI value 2)) ; extract
-+)
-+(df f-dst32-rn-prefixed-SI "destination Rn SI for m32c" (MACH32 m32c-isa) 16 2 UINT
-+ ((value pc) (add USI value 2)) ; insert
-+ ((value pc) (sub USI value 2)) ; extract
-+)
-+
-+(dnf f-dst16-1-S "destination R0[hl] for m16c" (MACH16 m16c-isa) 5 1)
-+
-+;-------------------------------------------------------------
-+; Immediates embedded in the base insn
-+;-------------------------------------------------------------
-+
-+(df f-imm-8-s4 "4 bit signed" (all-isas) 8 4 INT #f #f)
-+(df f-imm-12-s4 "4 bit signed" (all-isas) 12 4 INT #f #f)
-+(df f-imm-13-u3 "3 bit unsigned" (all-isas) 13 3 UINT #f #f)
-+(df f-imm-20-s4 "4 bit signed" (all-isas) 20 4 INT #f #f)
-+
-+(df f-imm1-S "1 bit immediate for short format binary insns" (MACH32 m32c-isa) 2 1 UINT
-+ ((value pc) (sub USI value 1)) ; insert
-+ ((value pc) (add USI value 1)) ; extract
-+)
-+
-+(dnmf f-imm3-S "3 bit unsigned for short format insns" (all-isas) UINT
-+ (f-2-2 f-7-1)
-+ (sequence () ; insert
-+ (set (ifield f-7-1) (and (sub (ifield f-imm3-S) 1) 1))
-+ (set (ifield f-2-2) (and (srl (sub (ifield f-imm3-S) 1) 1) #x3))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-imm3-S) (add (or (sll (ifield f-2-2) 1)
-+ (ifield f-7-1))
-+ 1))
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+; Immediates and displacements beyond the base insn
-+;-------------------------------------------------------------
-+
-+(df f-dsp-8-u6 "6 bit unsigned" (all-isas) 8 6 UINT #f #f)
-+(df f-dsp-8-u8 "8 bit unsigned" (all-isas) 8 8 UINT #f #f)
-+(df f-dsp-8-s8 "8 bit signed" (all-isas) 8 8 INT #f #f)
-+(df f-dsp-10-u6 "6 bit unsigned" (all-isas) 10 6 UINT #f #f)
-+(df f-dsp-16-u8 "8 bit unsigned" (all-isas) 16 8 UINT #f #f)
-+(df f-dsp-16-s8 "8 bit signed" (all-isas) 16 8 INT #f #f)
-+(df f-dsp-24-u8 "8 bit unsigned" (all-isas) 24 8 UINT #f #f)
-+(df f-dsp-24-s8 "8 bit signed" (all-isas) 24 8 INT #f #f)
-+(df f-dsp-32-u8 "8 bit unsigned" (all-isas) 32 8 UINT #f #f)
-+(df f-dsp-32-s8 "8 bit signed" (all-isas) 32 8 INT #f #f)
-+(df f-dsp-40-u8 "8 bit unsigned" (all-isas) 40 8 UINT #f #f)
-+(df f-dsp-40-s8 "8 bit signed" (all-isas) 40 8 INT #f #f)
-+(df f-dsp-48-u8 "8 bit unsigned" (all-isas) 48 8 UINT #f #f)
-+(df f-dsp-48-s8 "8 bit signed" (all-isas) 48 8 INT #f #f)
-+(df f-dsp-56-u8 "8 bit unsigned" (all-isas) 56 8 UINT #f #f)
-+(df f-dsp-56-s8 "8 bit signed" (all-isas) 56 8 INT #f #f)
-+(df f-dsp-64-u8 "8 bit unsigned" (all-isas) 64 8 UINT #f #f)
-+(df f-dsp-64-s8 "8 bit signed" (all-isas) 64 8 INT #f #f)
-+
-+; Insn opcode endianness is big, but the immediate fields are stored
-+; in little endian. Handle this here at the field level for all immediate
-+; fields longer that 1 byte.
-+;
-+; CGEN can't handle a field which spans a 32 bit word boundary, so
-+; handle those as multi ifields.
-+;
-+; Take care in expressions using 'srl' or 'sll' as part of some larger
-+; expression meant to yield sign-extended values. CGEN translates
-+; uses of those operators into C expressions whose type is 'unsigned
-+; int', which tends to make the whole expression 'unsigned int'.
-+; Expressions like (set (ifield foo) X), however, just take X and
-+; store it in some member of 'struct cgen_fields', all of whose
-+; members are 'long'. On machines where 'long' is larger than
-+; 'unsigned int', assigning a "sign-extended" unsigned int to a long
-+; just produces a very large positive value. insert_normal will
-+; range-check the field's value and produce odd error messages like
-+; this:
-+;
-+; Error: operand out of range (4160684031 not between -2147483648 and 2147483647) `add.l #-265,-270[fb]'
-+;
-+; Annoyingly, the code will work fine on machines where 'long' and
-+; 'unsigned int' are the same size: the assignment will produce a
-+; negative number.
-+;
-+; Just tell yourself over and over: overflow detection is expensive,
-+; and you're glad C doesn't do it, because it never happens in real
-+; life.
-+
-+(df f-dsp-8-u16 "16 bit unsigned" (all-isas) 8 16 UINT
-+ ((value pc) (or UHI
-+ (and (srl value 8) #x00ff)
-+ (and (sll value 8) #xff00))) ; insert
-+ ((value pc) (or UHI
-+ (and UHI (srl UHI value 8) #x00ff)
-+ (and UHI (sll UHI value 8) #xff00))) ; extract
-+)
-+
-+(df f-dsp-8-s16 "8 bit signed" (all-isas) 8 16 INT
-+ ((value pc) (ext INT
-+ (trunc HI
-+ (or (and (srl value 8) #x00ff)
-+ (and (sll value 8) #xff00))))) ; insert
-+ ((value pc) (ext INT
-+ (trunc HI
-+ (or (and (srl value 8) #x00ff)
-+ (and (sll value 8) #xff00))))) ; extract
-+)
-+
-+(df f-dsp-16-u16 "16 bit unsigned" (all-isas) 16 16 UINT
-+ ((value pc) (or UHI
-+ (and (srl value 8) #x00ff)
-+ (and (sll value 8) #xff00))) ; insert
-+ ((value pc) (or UHI
-+ (and UHI (srl UHI value 8) #x00ff)
-+ (and UHI (sll UHI value 8) #xff00))) ; extract
-+)
-+
-+(df f-dsp-16-s16 "16 bit signed" (all-isas) 16 16 INT
-+ ((value pc) (ext INT
-+ (trunc HI
-+ (or (and (srl value 8) #x00ff)
-+ (and (sll value 8) #xff00))))) ; insert
-+ ((value pc) (ext INT
-+ (trunc HI
-+ (or (and (srl value 8) #x00ff)
-+ (and (sll value 8) #xff00))))) ; extract
-+)
-+
-+(dnmf f-dsp-24-u16 "16 bit unsigned" (all-isas) UINT
-+ (f-dsp-24-u8 f-dsp-32-u8)
-+ (sequence () ; insert
-+ (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-u16) #xff))
-+ (set (ifield f-dsp-32-u8) (and (srl (ifield f-dsp-24-u16) 8) #xff))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-dsp-24-u16) (or (sll (ifield f-dsp-32-u8) 8)
-+ (ifield f-dsp-24-u8)))
-+ )
-+)
-+
-+(dnmf f-dsp-24-s16 "16 bit signed" (all-isas) INT
-+ (f-dsp-24-u8 f-dsp-32-u8)
-+ (sequence () ; insert
-+ (set (ifield f-dsp-24-u8)
-+ (and (ifield f-dsp-24-s16) #xff))
-+ (set (ifield f-dsp-32-u8)
-+ (and (srl (ifield f-dsp-24-s16) 8) #xff))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-dsp-24-s16)
-+ (ext INT
-+ (trunc HI (or (sll (ifield f-dsp-32-u8) 8)
-+ (ifield f-dsp-24-u8)))))
-+ )
-+)
-+
-+(df f-dsp-32-u16 "16 bit unsigned" (all-isas) 32 16 UINT
-+ ((value pc) (or UHI
-+ (and (srl value 8) #x00ff)
-+ (and (sll value 8) #xff00))) ; insert
-+ ((value pc) (or UHI
-+ (and UHI (srl UHI value 8) #x00ff)
-+ (and UHI (sll UHI value 8) #xff00))) ; extract
-+)
-+
-+(df f-dsp-32-s16 "16 bit signed" (all-isas) 32 16 INT
-+ ((value pc) (ext INT
-+ (trunc HI
-+ (or (and (srl value 8) #x00ff)
-+ (and (sll value 8) #xff00))))) ; insert
-+ ((value pc) (ext INT
-+ (trunc HI
-+ (or (and (srl value 8) #x00ff)
-+ (and (sll value 8) #xff00))))) ; extract
-+)
-+
-+(df f-dsp-40-u16 "16 bit unsigned" (all-isas) 40 16 UINT
-+ ((value pc) (or UHI
-+ (and (srl value 8) #x00ff)
-+ (and (sll value 8) #xff00))) ; insert
-+ ((value pc) (or UHI
-+ (and UHI (srl UHI value 8) #x00ff)
-+ (and UHI (sll UHI value 8) #xff00))) ; extract
-+)
-+
-+(df f-dsp-40-s16 "16 bit signed" (all-isas) 40 16 INT
-+ ((value pc) (ext INT
-+ (trunc HI
-+ (or (and (srl value 8) #x00ff)
-+ (and (sll value 8) #xff00))))) ; insert
-+ ((value pc) (ext INT
-+ (trunc HI
-+ (or (and (srl value 8) #x00ff)
-+ (and (sll value 8) #xff00))))) ; extract
-+)
-+
-+(df f-dsp-48-u16 "16 bit unsigned" (all-isas) 48 16 UINT
-+ ((value pc) (or UHI
-+ (and (srl value 8) #x00ff)
-+ (and (sll value 8) #xff00))) ; insert
-+ ((value pc) (or UHI
-+ (and UHI (srl UHI value 8) #x00ff)
-+ (and UHI (sll UHI value 8) #xff00))) ; extract
-+)
-+
-+(df f-dsp-48-s16 "16 bit signed" (all-isas) 48 16 INT
-+ ((value pc) (ext INT
-+ (trunc HI
-+ (or (and (srl value 8) #x00ff)
-+ (and (sll value 8) #xff00))))) ; insert
-+ ((value pc) (ext INT
-+ (trunc HI
-+ (or (and (srl value 8) #x00ff)
-+ (and (sll value 8) #xff00))))) ; extract
-+)
-+
-+(df f-dsp-64-u16 "16 bit unsigned" (all-isas) 64 16 UINT
-+ ((value pc) (or UHI
-+ (and (srl value 8) #x00ff)
-+ (and (sll value 8) #xff00))) ; insert
-+ ((value pc) (or UHI
-+ (and UHI (srl UHI value 8) #x00ff)
-+ (and UHI (sll UHI value 8) #xff00))) ; extract
-+)
-+(df f-dsp-8-s24 "24 bit signed" (all-isas) 8 24 INT
-+ ((value pc) (or SI
-+ (or (srl value 16) (and value #xff00))
-+ (sll (ext INT (trunc QI (and value #xff))) 16)))
-+ ((value pc) (or SI
-+ (or (srl value 16) (and value #xff00))
-+ (sll (ext INT (trunc QI (and value #xff))) 16)))
-+ )
-+
-+(df f-dsp-8-u24 "24 bit unsigned" (all-isas) 8 24 UINT
-+ ((value pc) (or SI
-+ (or (srl value 16) (and value #xff00))
-+ (sll (and value #xff) 16)))
-+ ((value pc) (or SI
-+ (or (srl value 16) (and value #xff00))
-+ (sll (and value #xff) 16)))
-+ )
-+
-+(dnmf f-dsp-16-u24 "24 bit unsigned" (all-isas) UINT
-+ (f-dsp-16-u16 f-dsp-32-u8)
-+ (sequence () ; insert
-+ (set (ifield f-dsp-16-u16) (and (ifield f-dsp-16-u24) #xffff))
-+ (set (ifield f-dsp-32-u8) (and (srl (ifield f-dsp-16-u24) 16) #xff))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-dsp-16-u24) (or (sll (ifield f-dsp-32-u8) 16)
-+ (ifield f-dsp-16-u16)))
-+ )
-+)
-+
-+(dnmf f-dsp-24-u24 "24 bit unsigned" (all-isas) UINT
-+ (f-dsp-24-u8 f-dsp-32-u16)
-+ (sequence () ; insert
-+ (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-u24) #xff))
-+ (set (ifield f-dsp-32-u16) (and (srl (ifield f-dsp-24-u24) 8) #xffff))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-dsp-24-u24) (or (sll (ifield f-dsp-32-u16) 8)
-+ (ifield f-dsp-24-u8)))
-+ )
-+)
-+
-+(df f-dsp-32-u24 "24 bit unsigned" (all-isas) 32 24 UINT
-+ ((value pc) (or USI
-+ (or USI
-+ (and (srl value 16) #x0000ff)
-+ (and value #x00ff00))
-+ (and (sll value 16) #xff0000))) ; insert
-+ ((value pc) (or USI
-+ (or USI
-+ (and USI (srl UHI value 16) #x0000ff)
-+ (and USI value #x00ff00))
-+ (and USI (sll UHI value 16) #xff0000))) ; extract
-+)
-+
-+(df f-dsp-40-u24 "24 bit unsigned" (all-isas) 40 24 UINT
-+ ((value pc) (or USI
-+ (or USI
-+ (and (srl value 16) #x0000ff)
-+ (and value #x00ff00))
-+ (and (sll value 16) #xff0000))) ; insert
-+ ((value pc) (or USI
-+ (or USI
-+ (and USI (srl UHI value 16) #x0000ff)
-+ (and USI value #x00ff00))
-+ (and USI (sll UHI value 16) #xff0000))) ; extract
-+)
-+
-+(dnmf f-dsp-40-s32 "32 bit signed" (all-isas) INT
-+ (f-dsp-40-u24 f-dsp-64-u8)
-+ (sequence () ; insert
-+ (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-40-s32) 24) #xff))
-+ (set (ifield f-dsp-40-u24) (and (ifield f-dsp-40-s32) #xffffff))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-dsp-40-s32) (or (and (ifield f-dsp-40-u24) #xffffff)
-+ (and (sll (ifield f-dsp-64-u8) 24) #xff000000)))
-+ )
-+)
-+
-+(dnmf f-dsp-48-u24 "24 bit unsigned" (all-isas) UINT
-+ (f-dsp-48-u16 f-dsp-64-u8)
-+ (sequence () ; insert
-+ (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-48-u24) 16) #xff))
-+ (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u24) #xffff))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-dsp-48-u24) (or (and (ifield f-dsp-48-u16) #xffff)
-+ (and (sll (ifield f-dsp-64-u8) 16) #xff0000)))
-+ )
-+)
-+
-+(dnmf f-dsp-16-s32 "32 bit signed" (all-isas) INT
-+ (f-dsp-16-u16 f-dsp-32-u16)
-+ (sequence () ; insert
-+ (set (ifield f-dsp-32-u16) (and (srl (ifield f-dsp-16-s32) 16) #xffff))
-+ (set (ifield f-dsp-16-u16) (and (ifield f-dsp-16-s32) #xffff))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-dsp-16-s32) (or (and (ifield f-dsp-16-u16) #xffff)
-+ (and (sll (ifield f-dsp-32-u16) 16) #xffff0000)))
-+ )
-+)
-+
-+(dnmf f-dsp-24-s32 "32 bit signed" (all-isas) INT
-+ (f-dsp-24-u8 f-dsp-32-u24)
-+ (sequence () ; insert
-+ (set (ifield f-dsp-32-u24) (and (srl (ifield f-dsp-24-s32) 8) #xffffff))
-+ (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-s32) #xff))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-dsp-24-s32) (or (and (ifield f-dsp-24-u8) #xff)
-+ (and (sll (ifield f-dsp-32-u24) 8) #xffffff00)))
-+ )
-+)
-+
-+(df f-dsp-32-s32 "32 bit signed" (all-isas) 32 32 INT
-+ ((value pc)
-+
-+ ;; insert
-+ (ext INT
-+ (or SI
-+ (or SI
-+ (and (srl value 24) #x000000ff)
-+ (and (srl value 8) #x0000ff00))
-+ (or SI
-+ (and (sll value 8) #x00ff0000)
-+ (and (sll value 24) #xff000000)))))
-+
-+ ;; extract
-+ ((value pc)
-+ (ext INT
-+ (or SI
-+ (or SI
-+ (and (srl value 24) #x000000ff)
-+ (and (srl value 8) #x0000ff00))
-+ (or SI
-+ (and (sll value 8) #x00ff0000)
-+ (and (sll value 24) #xff000000)))))
-+)
-+
-+(dnmf f-dsp-48-u32 "32 bit unsigned" (all-isas) UINT
-+ (f-dsp-48-u16 f-dsp-64-u16)
-+ (sequence () ; insert
-+ (set (ifield f-dsp-64-u16) (and (srl (ifield f-dsp-48-u32) 16) #xffff))
-+ (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u32) #xffff))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-dsp-48-u32) (or (and (ifield f-dsp-48-u16) #xffff)
-+ (and (sll (ifield f-dsp-64-u16) 16) #xffff0000)))
-+ )
-+)
-+
-+(dnmf f-dsp-48-s32 "32 bit signed" (all-isas) INT
-+ (f-dsp-48-u16 f-dsp-64-u16)
-+ (sequence () ; insert
-+ (set (ifield f-dsp-64-u16) (and (srl (ifield f-dsp-48-s32) 16) #xffff))
-+ (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-s32) #xffff))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-dsp-48-s32) (or (and (ifield f-dsp-48-u16) #xffff)
-+ (and (sll (ifield f-dsp-64-u16) 16) #xffff0000)))
-+ )
-+)
-+
-+(dnmf f-dsp-56-s16 "16 bit signed" (all-isas) INT
-+ (f-dsp-56-u8 f-dsp-64-u8)
-+ (sequence () ; insert
-+ (set (ifield f-dsp-56-u8)
-+ (and (ifield f-dsp-56-s16) #xff))
-+ (set (ifield f-dsp-64-u8)
-+ (and (srl (ifield f-dsp-56-s16) 8) #xff))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-dsp-56-s16)
-+ (ext INT
-+ (trunc HI (or (sll (ifield f-dsp-64-u8) 8)
-+ (ifield f-dsp-56-u8)))))
-+ )
-+)
-+
-+(df f-dsp-64-s16 " 16 bit signed" (all-isas) 64 16 INT
-+ ((value pc) (ext INT
-+ (trunc HI
-+ (or (and (srl value 8) #x00ff)
-+ (and (sll value 8) #xff00))))) ; insert
-+ ((value pc) (ext INT
-+ (trunc HI
-+ (or (and (srl value 8) #x00ff)
-+ (and (sll value 8) #xff00))))) ; extract
-+)
-+
-+;-------------------------------------------------------------
-+; Bit indices
-+;-------------------------------------------------------------
-+
-+(dnf f-bitno16-S "bit index for m16c" (all-isas) 5 3)
-+(dnf f-bitno32-prefixed "bit index for m32c" (all-isas) 21 3)
-+(dnf f-bitno32-unprefixed "bit index for m32c" (all-isas) 13 3)
-+
-+(dnmf f-bitbase16-u11-S "unsigned bit,base:11" (all-isas) UINT
-+ (f-bitno16-S f-dsp-8-u8)
-+ (sequence () ; insert
-+ (set (ifield f-bitno16-S) (and f-bitbase16-u11-S #x7))
-+ (set (ifield f-dsp-8-u8) (and (srl (ifield f-bitbase16-u11-S) 3) #xff))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-bitbase16-u11-S) (or (sll (ifield f-dsp-8-u8) 3)
-+ (ifield f-bitno16-S)))
-+ )
-+)
-+
-+(dnmf f-bitbase32-16-u11-unprefixed "unsigned bit,base:11" (all-isas) UINT
-+ (f-bitno32-unprefixed f-dsp-16-u8)
-+ (sequence () ; insert
-+ (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u11-unprefixed #x7))
-+ (set (ifield f-dsp-16-u8) (and (srl (ifield f-bitbase32-16-u11-unprefixed) 3) #xff))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-bitbase32-16-u11-unprefixed) (or (sll (ifield f-dsp-16-u8) 3)
-+ (ifield f-bitno32-unprefixed)))
-+ )
-+)
-+(dnmf f-bitbase32-16-s11-unprefixed "signed bit,base:11" (all-isas) INT
-+ (f-bitno32-unprefixed f-dsp-16-s8)
-+ (sequence () ; insert
-+ (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-s11-unprefixed #x7))
-+ (set (ifield f-dsp-16-s8) (sra INT (ifield f-bitbase32-16-s11-unprefixed) 3))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-bitbase32-16-s11-unprefixed) (or (sll (ifield f-dsp-16-s8) 3)
-+ (ifield f-bitno32-unprefixed)))
-+ )
-+)
-+(dnmf f-bitbase32-16-u19-unprefixed "unsigned bit,base:19" (all-isas) UINT
-+ (f-bitno32-unprefixed f-dsp-16-u16)
-+ (sequence () ; insert
-+ (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u19-unprefixed #x7))
-+ (set (ifield f-dsp-16-u16) (and (srl (ifield f-bitbase32-16-u19-unprefixed) 3) #xffff))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-bitbase32-16-u19-unprefixed) (or (sll (ifield f-dsp-16-u16) 3)
-+ (ifield f-bitno32-unprefixed)))
-+ )
-+)
-+(dnmf f-bitbase32-16-s19-unprefixed "signed bit,base:11" (all-isas) INT
-+ (f-bitno32-unprefixed f-dsp-16-s16)
-+ (sequence () ; insert
-+ (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-s19-unprefixed #x7))
-+ (set (ifield f-dsp-16-s16) (sra INT (ifield f-bitbase32-16-s19-unprefixed) 3))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-bitbase32-16-s19-unprefixed) (or (sll (ifield f-dsp-16-s16) 3)
-+ (ifield f-bitno32-unprefixed)))
-+ )
-+)
-+; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
-+(dnmf f-bitbase32-16-u27-unprefixed "unsigned bit,base:27" (all-isas) UINT
-+ (f-bitno32-unprefixed f-dsp-16-u16 f-dsp-32-u8)
-+ (sequence () ; insert
-+ (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u27-unprefixed #x7))
-+ (set (ifield f-dsp-16-u16) (and (srl (ifield f-bitbase32-16-u27-unprefixed) 3) #xffff))
-+ (set (ifield f-dsp-32-u8) (and (srl (ifield f-bitbase32-16-u27-unprefixed) 19) #xff))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-bitbase32-16-u27-unprefixed) (or (sll (ifield f-dsp-16-u16) 3)
-+ (or (sll (ifield f-dsp-32-u8) 19)
-+ (ifield f-bitno32-unprefixed))))
-+ )
-+)
-+(dnmf f-bitbase32-24-u11-prefixed "unsigned bit,base:11" (all-isas) UINT
-+ (f-bitno32-prefixed f-dsp-24-u8)
-+ (sequence () ; insert
-+ (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u11-prefixed #x7))
-+ (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u11-prefixed) 3) #xff))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-bitbase32-24-u11-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
-+ (ifield f-bitno32-prefixed)))
-+ )
-+)
-+(dnmf f-bitbase32-24-s11-prefixed "signed bit,base:11" (all-isas) INT
-+ (f-bitno32-prefixed f-dsp-24-s8)
-+ (sequence () ; insert
-+ (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-s11-prefixed #x7))
-+ (set (ifield f-dsp-24-s8) (sra INT (ifield f-bitbase32-24-s11-prefixed) 3))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-bitbase32-24-s11-prefixed) (or (sll (ifield f-dsp-24-s8) 3)
-+ (ifield f-bitno32-prefixed)))
-+ )
-+)
-+; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
-+(dnmf f-bitbase32-24-u19-prefixed "unsigned bit,base:19" (all-isas) UINT
-+ (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-u8)
-+ (sequence () ; insert
-+ (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u19-prefixed #x7))
-+ (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u19-prefixed) 3) #xff))
-+ (set (ifield f-dsp-32-u8) (and (srl (ifield f-bitbase32-24-u19-prefixed) 11) #xff))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-bitbase32-24-u19-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
-+ (or (sll (ifield f-dsp-32-u8) 11)
-+ (ifield f-bitno32-prefixed))))
-+ )
-+)
-+; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
-+(dnmf f-bitbase32-24-s19-prefixed "signed bit,base:11" (all-isas) INT
-+ (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-s8)
-+ (sequence () ; insert
-+ (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-s19-prefixed #x7))
-+ (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-s19-prefixed) 3) #xff))
-+ (set (ifield f-dsp-32-s8) (sra INT (ifield f-bitbase32-24-s19-prefixed) 11))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-bitbase32-24-s19-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
-+ (or (sll (ifield f-dsp-32-s8) 11)
-+ (ifield f-bitno32-prefixed))))
-+ )
-+)
-+; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
-+(dnmf f-bitbase32-24-u27-prefixed "unsigned bit,base:27" (all-isas) UINT
-+ (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-u16)
-+ (sequence () ; insert
-+ (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u27-prefixed #x7))
-+ (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u27-prefixed) 3) #xff))
-+ (set (ifield f-dsp-32-u16) (and (srl (ifield f-bitbase32-24-u27-prefixed) 11) #xffff))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-bitbase32-24-u27-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
-+ (or (sll (ifield f-dsp-32-u16) 11)
-+ (ifield f-bitno32-prefixed))))
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+; Labels
-+;-------------------------------------------------------------
-+
-+(df f-lab-5-3 "3 bit pc relative unsigned offset" (PCREL-ADDR all-isas) 5 3 UINT
-+ ((value pc) (sub SI value (add SI pc 2))) ; insert
-+ ((value pc) (add SI value (add SI pc 2))) ; extract
-+)
-+(dnmf f-lab32-jmp-s "unsigned 3 bit pc relative offset" (PCREL-ADDR all-isas) UINT
-+ (f-2-2 f-7-1)
-+ (sequence ((SI val)) ; insert
-+ (set val (sub (sub (ifield f-lab32-jmp-s) pc) 2))
-+ (set (ifield f-7-1) (and val #x1))
-+ (set (ifield f-2-2) (srl val 1))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-lab32-jmp-s) (add pc (add (or (sll (ifield f-2-2) 1)
-+ (ifield f-7-1))
-+ 2)))
-+ )
-+)
-+(df f-lab-8-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 8 8 INT
-+ ((value pc) (sub SI value (add SI pc 1))) ; insert
-+ ((value pc) (add SI value (add SI pc 1))) ; extract
-+)
-+(df f-lab-8-16 "16 bit pc relative signed offset" (PCREL-ADDR SIGN-OPT all-isas) 8 16 UINT
-+ ((value pc) (or SI (sll (and (sub value (add pc 1)) #xff) 8)
-+ (srl (and (sub value (add pc 1)) #xffff) 8)))
-+ ((value pc) (add SI (or (srl (and value #xffff) 8)
-+ (sra (sll (and value #xff) 24) 16)) (add pc 1)))
-+ )
-+(df f-lab-8-24 "24 bit absolute" (all-isas ABS-ADDR) 8 24 UINT
-+ ((value pc) (or SI
-+ (or (srl value 16) (and value #xff00))
-+ (sll (and value #xff) 16)))
-+ ((value pc) (or SI
-+ (or (srl value 16) (and value #xff00))
-+ (sll (and value #xff) 16)))
-+ )
-+(df f-lab-16-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 16 8 INT
-+ ((value pc) (sub SI value (add SI pc 2))) ; insert
-+ ((value pc) (add SI value (add SI pc 2))) ; extract
-+)
-+(df f-lab-24-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 24 8 INT
-+ ((value pc) (sub SI value (add SI pc 2))) ; insert
-+ ((value pc) (add SI value (add SI pc 2))) ; extract
-+)
-+(df f-lab-32-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 32 8 INT
-+ ((value pc) (sub SI value (add SI pc 2))) ; insert
-+ ((value pc) (add SI value (add SI pc 2))) ; extract
-+)
-+(df f-lab-40-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 40 8 INT
-+ ((value pc) (sub SI value (add SI pc 2))) ; insert
-+ ((value pc) (add SI value (add SI pc 2))) ; extract
-+)
-+
-+;-------------------------------------------------------------
-+; Condition codes
-+;-------------------------------------------------------------
-+
-+(dnf f-cond16 "condition code" (all-isas) 12 4)
-+(dnf f-cond16j-5 "condition code" (all-isas) 5 3)
-+
-+(dnmf f-cond32 "condition code" (all-isas) UINT
-+ (f-9-1 f-13-3)
-+ (sequence () ; insert
-+ (set (ifield f-9-1) (and (srl (ifield f-cond32) 3) 1))
-+ (set (ifield f-13-3) (and (ifield f-cond32) #x7))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-cond32) (or (sll (ifield f-9-1) 3)
-+ (ifield f-13-3)))
-+ )
-+)
-+
-+(dnmf f-cond32j "condition code" (all-isas) UINT
-+ (f-1-3 f-7-1)
-+ (sequence () ; insert
-+ (set (ifield f-1-3) (and (srl (ifield f-cond32j) 1) #x7))
-+ (set (ifield f-7-1) (and (ifield f-cond32j) #x1))
-+ )
-+ (sequence () ; extract
-+ (set (ifield f-cond32j) (or (sll (ifield f-1-3) 1)
-+ (ifield f-7-1)))
-+ )
-+)
-+
-+;=============================================================
-+; Hardware
-+;
-+(dnh h-pc "program counter" (PC all-isas) (pc USI) () () ())
-+
-+;-------------------------------------------------------------
-+; General registers
-+; The actual registers are 16 bits
-+;-------------------------------------------------------------
-+
-+(define-hardware
-+ (name h-gr)
-+ (comment "general 16 bit registers")
-+ (attrs all-isas CACHE-ADDR)
-+ (type register HI (4))
-+ (indices keyword "" (("r0" 0) ("r1" 1) ("r2" 2) ("r3" 3))))
-+
-+; Define different views of the grs as VIRTUAL with getter/setter specs
-+;
-+(define-hardware
-+ (name h-gr-QI)
-+ (comment "general 8 bit registers")
-+ (attrs all-isas VIRTUAL)
-+ (type register QI (4))
-+ (indices keyword "" (("r0l" 0) ("r0h" 1) ("r1l" 2) ("r1h" 3)))
-+ (get (index) (and (if SI (mod index 2)
-+ (srl (reg h-gr (div index 2)) 8)
-+ (reg h-gr (div index 2)))
-+ #xff))
-+ (set (index newval) (set (reg h-gr (div index 2))
-+ (if SI (mod index 2)
-+ (or (and (reg h-gr (div index 2)) #xff)
-+ (sll (and newval #xff) 8))
-+ (or (and (reg h-gr (div index 2)) #xff00)
-+ (and newval #xff))))))
-+
-+(define-hardware
-+ (name h-gr-HI)
-+ (comment "general 16 bit registers")
-+ (attrs all-isas VIRTUAL)
-+ (type register HI (4))
-+ (indices keyword "" (("r0" 0) ("r1" 1) ("r2" 2) ("r3" 3)))
-+ (get (index) (reg h-gr index))
-+ (set (index newval) (set (reg h-gr index) newval)))
-+
-+(define-hardware
-+ (name h-gr-SI)
-+ (comment "general 32 bit registers")
-+ (attrs all-isas VIRTUAL)
-+ (type register SI (2))
-+ (indices keyword "" (("r2r0" 0) ("r3r1" 1)))
-+ (get (index) (or SI
-+ (and (reg h-gr index) #xffff)
-+ (and (sll (reg h-gr (add index 2)) 16) #xffff0000)))
-+ (set (index newval) (sequence ()
-+ (set (reg h-gr index) (and newval #xffff))
-+ (set (reg h-gr (add index 2)) (srl newval 16)))))
-+
-+(define-hardware
-+ (name h-gr-ext-QI)
-+ (comment "general 16 bit registers")
-+ (attrs all-isas VIRTUAL)
-+ (type register HI (2))
-+ (indices keyword "" (("r0l" 0) ("r1l" 1)))
-+ (get (index) (reg h-gr-QI (mul index 2)))
-+ (set (index newval) (set (reg h-gr (mul index 2)) newval)))
-+
-+(define-hardware
-+ (name h-gr-ext-HI)
-+ (comment "general 16 bit registers")
-+ (attrs all-isas VIRTUAL)
-+ (type register SI (2))
-+ (indices keyword "" (("r0" 0) ("r1" 1)))
-+ (get (index) (reg h-gr (mul index 2)))
-+ (set (index newval) (set (reg h-gr-SI index) newval)))
-+
-+(define-hardware
-+ (name h-r0l)
-+ (comment "r0l register")
-+ (attrs all-isas VIRTUAL)
-+ (type register QI)
-+ (indices keyword "" (("r0l" 0)))
-+ (get () (reg h-gr-QI 0))
-+ (set (newval) (set (reg h-gr-QI 0) newval)))
-+
-+(define-hardware
-+ (name h-r0h)
-+ (comment "r0h register")
-+ (attrs all-isas VIRTUAL)
-+ (type register QI)
-+ (indices keyword "" (("r0h" 0)))
-+ (get () (reg h-gr-QI 1))
-+ (set (newval) (set (reg h-gr-QI 1) newval)))
-+
-+(define-hardware
-+ (name h-r1l)
-+ (comment "r1l register")
-+ (attrs all-isas VIRTUAL)
-+ (type register QI)
-+ (indices keyword "" (("r1l" 0)))
-+ (get () (reg h-gr-QI 2))
-+ (set (newval) (set (reg h-gr-QI 2) newval)))
-+
-+(define-hardware
-+ (name h-r1h)
-+ (comment "r1h register")
-+ (attrs all-isas VIRTUAL)
-+ (type register QI)
-+ (indices keyword "" (("r1h" 0)))
-+ (get () (reg h-gr-QI 3))
-+ (set (newval) (set (reg h-gr-QI 3) newval)))
-+
-+(define-hardware
-+ (name h-r0)
-+ (comment "r0 register")
-+ (attrs all-isas VIRTUAL)
-+ (type register HI)
-+ (indices keyword "" (("r0" 0)))
-+ (get () (reg h-gr 0))
-+ (set (newval) (set (reg h-gr 0) newval)))
-+
-+(define-hardware
-+ (name h-r1)
-+ (comment "r1 register")
-+ (attrs all-isas VIRTUAL)
-+ (type register HI)
-+ (indices keyword "" (("r1" 0)))
-+ (get () (reg h-gr 1))
-+ (set (newval) (set (reg h-gr 1) newval)))
-+
-+(define-hardware
-+ (name h-r2)
-+ (comment "r2 register")
-+ (attrs all-isas VIRTUAL)
-+ (type register HI)
-+ (indices keyword "" (("r2" 0)))
-+ (get () (reg h-gr 2))
-+ (set (newval) (set (reg h-gr 2) newval)))
-+
-+(define-hardware
-+ (name h-r3)
-+ (comment "r3 register")
-+ (attrs all-isas VIRTUAL)
-+ (type register HI)
-+ (indices keyword "" (("r3" 0)))
-+ (get () (reg h-gr 3))
-+ (set (newval) (set (reg h-gr 3) newval)))
-+
-+(define-hardware
-+ (name h-r0l-r0h)
-+ (comment "r0l or r0h")
-+ (attrs all-isas VIRTUAL)
-+ (type register QI (2))
-+ (indices keyword "" (("r0l" 0) ("r0h" 1)))
-+ (get (index) (reg h-gr-QI index))
-+ (set (index newval) (set (reg h-gr-QI index) newval)))
-+
-+(define-hardware
-+ (name h-r2r0)
-+ (comment "r2r0 register")
-+ (attrs all-isas VIRTUAL)
-+ (type register SI)
-+ (indices keyword "" (("r2r0" 0)))
-+ (get () (or (sll (reg h-gr 2) 16) (reg h-gr 0)))
-+ (set (newval)
-+ (sequence ()
-+ (set (reg h-gr 0) newval)
-+ (set (reg h-gr 2) (sra newval 16)))))
-+
-+(define-hardware
-+ (name h-r3r1)
-+ (comment "r3r1 register")
-+ (attrs all-isas VIRTUAL)
-+ (type register SI)
-+ (indices keyword "" (("r3r1" 0)))
-+ (get () (or (sll (reg h-gr 3) 16) (reg h-gr 1)))
-+ (set (newval)
-+ (sequence ()
-+ (set (reg h-gr 1) newval)
-+ (set (reg h-gr 3) (sra newval 16)))))
-+
-+(define-hardware
-+ (name h-r1r2r0)
-+ (comment "r1r2r0 register")
-+ (attrs all-isas VIRTUAL)
-+ (type register DI)
-+ (indices keyword "" (("r1r2r0" 0)))
-+ (get () (or DI (sll DI (reg h-gr 1) 32) (or (sll (reg h-gr 2) 16) (reg h-gr 0))))
-+ (set (newval)
-+ (sequence ()
-+ (set (reg h-gr 0) newval)
-+ (set (reg h-gr 2) (sra newval 16))
-+ (set (reg h-gr 1) (sra newval 32)))))
-+
-+;-------------------------------------------------------------
-+; Address registers
-+;-------------------------------------------------------------
-+
-+(define-hardware
-+ (name h-ar)
-+ (comment "address registers")
-+ (attrs all-isas)
-+ (type register USI (2))
-+ (indices keyword "" (("a0" 0) ("a1" 1)))
-+ (get (index) (c-call USI "h_ar_get_handler" index))
-+ (set (index newval) (c-call VOID "h_ar_set_handler" index newval)))
-+
-+; Define different views of the ars as VIRTUAL with getter/setter specs
-+(define-hardware
-+ (name h-ar-QI)
-+ (comment "8 bit view of address register")
-+ (attrs all-isas VIRTUAL)
-+ (type register QI (2))
-+ (indices keyword "" (("a0" 0) ("a1" 1)))
-+ (get (index) (reg h-ar index))
-+ (set (index newval) (set (reg h-ar index) newval)))
-+
-+(define-hardware
-+ (name h-ar-HI)
-+ (comment "16 bit view of address register")
-+ (attrs all-isas VIRTUAL)
-+ (type register HI (2))
-+ (indices keyword "" (("a0" 0) ("a1" 1)))
-+ (get (index) (reg h-ar index))
-+ (set (index newval) (set (reg h-ar index) newval)))
-+
-+(define-hardware
-+ (name h-ar-SI)
-+ (comment "32 bit view of address register")
-+ (attrs all-isas VIRTUAL)
-+ (type register SI)
-+ (indices keyword "" (("a1a0" 0)))
-+ (get () (or SI (sll SI (ext SI (reg h-ar 1)) 16) (ext SI (reg h-ar 0))))
-+ (set (newval) (sequence ()
-+ (set (reg h-ar 0) (and newval #xffff))
-+ (set (reg h-ar 1) (and (srl newval 16) #xffff)))))
-+
-+(define-hardware
-+ (name h-a0)
-+ (comment "16 bit view of address register")
-+ (attrs all-isas VIRTUAL)
-+ (type register HI)
-+ (indices keyword "" (("a0" 0)))
-+ (get () (reg h-ar 0))
-+ (set (newval) (set (reg h-ar 0) newval)))
-+
-+(define-hardware
-+ (name h-a1)
-+ (comment "16 bit view of address register")
-+ (attrs all-isas VIRTUAL)
-+ (type register HI)
-+ (indices keyword "" (("a1" 1)))
-+ (get () (reg h-ar 1))
-+ (set (newval) (set (reg h-ar 1) newval)))
-+
-+; SB Register
-+(define-hardware
-+ (name h-sb)
-+ (comment "SB register")
-+ (attrs all-isas)
-+ (type register USI)
-+ (get () (c-call USI "h_sb_get_handler"))
-+ (set (newval) (c-call VOID "h_sb_set_handler" newval))
-+)
-+
-+; FB Register
-+(define-hardware
-+ (name h-fb)
-+ (comment "FB register")
-+ (attrs all-isas)
-+ (type register USI)
-+ (get () (c-call USI "h_fb_get_handler"))
-+ (set (newval) (c-call VOID "h_fb_set_handler" newval))
-+)
-+
-+; SP Register
-+(define-hardware
-+ (name h-sp)
-+ (comment "SP register")
-+ (attrs all-isas)
-+ (type register USI)
-+ (get () (c-call USI "h_sp_get_handler"))
-+ (set (newval) (c-call VOID "h_sp_set_handler" newval))
-+)
-+
-+;-------------------------------------------------------------
-+; condition-code bits
-+;-------------------------------------------------------------
-+
-+(define-hardware
-+ (name h-sbit)
-+ (comment "sign bit")
-+ (attrs all-isas)
-+ (type register BI)
-+)
-+
-+(define-hardware
-+ (name h-zbit)
-+ (comment "zero bit")
-+ (attrs all-isas)
-+ (type register BI)
-+)
-+
-+(define-hardware
-+ (name h-obit)
-+ (comment "overflow bit")
-+ (attrs all-isas)
-+ (type register BI)
-+)
-+
-+(define-hardware
-+ (name h-cbit)
-+ (comment "carry bit")
-+ (attrs all-isas)
-+ (type register BI)
-+)
-+
-+(define-hardware
-+ (name h-ubit)
-+ (comment "stack pointer select bit")
-+ (attrs all-isas)
-+ (type register BI)
-+)
-+
-+(define-hardware
-+ (name h-ibit)
-+ (comment "interrupt enable bit")
-+ (attrs all-isas)
-+ (type register BI)
-+)
-+
-+(define-hardware
-+ (name h-bbit)
-+ (comment "register bank select bit")
-+ (attrs all-isas)
-+ (type register BI)
-+)
-+
-+(define-hardware
-+ (name h-dbit)
-+ (comment "debug bit")
-+ (attrs all-isas)
-+ (type register BI)
-+)
-+
-+(define-hardware
-+ (name h-dct0)
-+ (comment "dma transfer count 000")
-+ (attrs all-isas)
-+ (type register UHI)
-+)
-+(define-hardware
-+ (name h-dct1)
-+ (comment "dma transfer count 001")
-+ (attrs all-isas)
-+ (type register UHI)
-+)
-+(define-hardware
-+ (name h-svf)
-+ (comment "save flag 011")
-+ (attrs all-isas)
-+ (type register UHI)
-+)
-+(define-hardware
-+ (name h-drc0)
-+ (comment "dma transfer count reload 100")
-+ (attrs all-isas)
-+ (type register UHI)
-+)
-+(define-hardware
-+ (name h-drc1)
-+ (comment "dma transfer count reload 101")
-+ (attrs all-isas)
-+ (type register UHI)
-+)
-+(define-hardware
-+ (name h-dmd0)
-+ (comment "dma mode 110")
-+ (attrs all-isas)
-+ (type register UQI)
-+)
-+(define-hardware
-+ (name h-dmd1)
-+ (comment "dma mode 111")
-+ (attrs all-isas)
-+ (type register UQI)
-+)
-+(define-hardware
-+ (name h-intb)
-+ (comment "interrupt table 000")
-+ (attrs all-isas)
-+ (type register USI)
-+)
-+(define-hardware
-+ (name h-svp)
-+ (comment "save pc 100")
-+ (attrs all-isas)
-+ (type register UHI)
-+)
-+(define-hardware
-+ (name h-vct)
-+ (comment "vector 101")
-+ (attrs all-isas)
-+ (type register USI)
-+)
-+(define-hardware
-+ (name h-isp)
-+ (comment "interrupt stack ptr 111")
-+ (attrs all-isas)
-+ (type register USI)
-+)
-+(define-hardware
-+ (name h-dma0)
-+ (comment "dma mem addr 010")
-+ (attrs all-isas)
-+ (type register USI)
-+)
-+(define-hardware
-+ (name h-dma1)
-+ (comment "dma mem addr 011")
-+ (attrs all-isas)
-+ (type register USI)
-+)
-+(define-hardware
-+ (name h-dra0)
-+ (comment "dma mem addr reload 100")
-+ (attrs all-isas)
-+ (type register USI)
-+)
-+(define-hardware
-+ (name h-dra1)
-+ (comment "dma mem addr reload 101")
-+ (attrs all-isas)
-+ (type register USI)
-+)
-+(define-hardware
-+ (name h-dsa0)
-+ (comment "dma sfr addr 110")
-+ (attrs all-isas)
-+ (type register USI)
-+)
-+(define-hardware
-+ (name h-dsa1)
-+ (comment "dma sfr addr 111")
-+ (attrs all-isas)
-+ (type register USI)
-+)
-+
-+;-------------------------------------------------------------
-+; Condition code operand hardware
-+;-------------------------------------------------------------
-+
-+(define-hardware
-+ (name h-cond16)
-+ (comment "condition code hardware for m16c")
-+ (attrs m16c-isa MACH16)
-+ (type immediate UQI)
-+ (values keyword ""
-+ (("geu" #x00) ("c" #x00)
-+ ("gtu" #x01)
-+ ("eq" #x02) ("z" #x02)
-+ ("n" #x03)
-+ ("le" #x04)
-+ ("o" #x05)
-+ ("ge" #x06)
-+ ("ltu" #xf8) ("nc" #xf8)
-+ ("leu" #xf9)
-+ ("ne" #xfa) ("nz" #xfa)
-+ ("pz" #xfb)
-+ ("gt" #xfc)
-+ ("no" #xfd)
-+ ("lt" #xfe)
-+ )
-+ )
-+)
-+(define-hardware
-+ (name h-cond16c)
-+ (comment "condition code hardware for m16c")
-+ (attrs m16c-isa MACH16)
-+ (type immediate UQI)
-+ (values keyword ""
-+ (("geu" #x00) ("c" #x00)
-+ ("gtu" #x01)
-+ ("eq" #x02) ("z" #x02)
-+ ("n" #x03)
-+ ("ltu" #x04) ("nc" #x04)
-+ ("leu" #x05)
-+ ("ne" #x06) ("nz" #x06)
-+ ("pz" #x07)
-+ ("le" #x08)
-+ ("o" #x09)
-+ ("ge" #x0a)
-+ ("gt" #x0c)
-+ ("no" #x0d)
-+ ("lt" #x0e)
-+ )
-+ )
-+)
-+(define-hardware
-+ (name h-cond16j)
-+ (comment "condition code hardware for m16c")
-+ (attrs m16c-isa MACH16)
-+ (type immediate UQI)
-+ (values keyword ""
-+ (("le" #x08)
-+ ("o" #x09)
-+ ("ge" #x0a)
-+ ("gt" #x0c)
-+ ("no" #x0d)
-+ ("lt" #x0e)
-+ )
-+ )
-+)
-+(define-hardware
-+ (name h-cond16j-5)
-+ (comment "condition code hardware for m16c")
-+ (attrs m16c-isa MACH16)
-+ (type immediate UQI)
-+ (values keyword ""
-+ (("geu" #x00) ("c" #x00)
-+ ("gtu" #x01)
-+ ("eq" #x02) ("z" #x02)
-+ ("n" #x03)
-+ ("ltu" #x04) ("nc" #x04)
-+ ("leu" #x05)
-+ ("ne" #x06) ("nz" #x06)
-+ ("pz" #x07)
-+ )
-+ )
-+)
-+
-+(define-hardware
-+ (name h-cond32)
-+ (comment "condition code hardware for m32c")
-+ (attrs m32c-isa MACH32)
-+ (type immediate UQI)
-+ (values keyword ""
-+ (("ltu" #x00) ("nc" #x00)
-+ ("leu" #x01)
-+ ("ne" #x02) ("nz" #x02)
-+ ("pz" #x03)
-+ ("no" #x04)
-+ ("gt" #x05)
-+ ("ge" #x06)
-+ ("geu" #x08) ("c" #x08)
-+ ("gtu" #x09)
-+ ("eq" #x0a) ("z" #x0a)
-+ ("n" #x0b)
-+ ("o" #x0c)
-+ ("le" #x0d)
-+ ("lt" #x0e)
-+ )
-+ )
-+)
-+
-+(define-hardware
-+ (name h-cr1-32)
-+ (comment "control registers")
-+ (attrs m32c-isa MACH32)
-+ (type immediate UQI)
-+ (values keyword "" (("dct0" 0) ("dct1" 1) ("flg" 2) ("svf" 3) ("drc0" 4)
-+ ("drc1" 5) ("dmd0" 6) ("dmd1" 7))))
-+(define-hardware
-+ (name h-cr2-32)
-+ (comment "control registers")
-+ (attrs m32c-isa MACH32)
-+ (type immediate UQI)
-+ (values keyword "" (("intb" 0) ("sp" 1) ("sb" 2) ("fb" 3) ("svp" 4)
-+ ("vct" 5) ("isp" 7))))
-+
-+(define-hardware
-+ (name h-cr3-32)
-+ (comment "control registers")
-+ (attrs m32c-isa MACH32)
-+ (type immediate UQI)
-+ (values keyword "" (("dma0" 2) ("dma1" 3) ("dra0" 4)
-+ ("dra1" 5) ("dsa0" 6) ("dsa1" 7))))
-+(define-hardware
-+ (name h-cr-16)
-+ (comment "control registers")
-+ (attrs m16c-isa MACH16)
-+ (type immediate UQI)
-+ (values keyword "" (("intbl" 1) ("intbh" 2) ("flg" 3) ("isp" 4)
-+ ("sp" 5) ("sb" 6) ("fb" 7))))
-+
-+(define-hardware
-+ (name h-flags)
-+ (comment "flag hardware for m32c")
-+ (attrs all-isas)
-+ (type immediate UQI)
-+ (values keyword ""
-+ (("c" #x0)
-+ ("d" #x1)
-+ ("z" #x2)
-+ ("s" #x3)
-+ ("b" #x4)
-+ ("o" #x5)
-+ ("i" #x6)
-+ ("u" #x7)
-+ )
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+; Misc helper hardware
-+;-------------------------------------------------------------
-+
-+(define-hardware
-+ (name h-shimm)
-+ (comment "shift immediate")
-+ (attrs all-isas)
-+ (type immediate (INT 4))
-+ (values keyword "" (("1" 0) ("2" 1) ("3" 2) ("4" 3) ("5" 4) ("6" 5) ("7" 6)
-+ ("8" 7) ("-1" -8) ("-2" -7) ("-3" -6) ("-4" -5) ("-5" -4)
-+ ("-6" -3) ("-7" -2) ("-8" -1)
-+ )))
-+(define-hardware
-+ (name h-bit-index)
-+ (comment "bit index for the next insn")
-+ (attrs m32c-isa MACH32)
-+ (type register UHI)
-+)
-+(define-hardware
-+ (name h-src-index)
-+ (comment "source index for the next insn")
-+ (attrs m32c-isa MACH32)
-+ (type register UHI)
-+)
-+(define-hardware
-+ (name h-dst-index)
-+ (comment "destination index for the next insn")
-+ (attrs m32c-isa MACH32)
-+ (type register UHI)
-+)
-+(define-hardware
-+ (name h-src-indirect)
-+ (comment "indirect src for the next insn")
-+ (attrs all-isas)
-+ (type register UHI)
-+)
-+(define-hardware
-+ (name h-dst-indirect)
-+ (comment "indirect dst for the next insn")
-+ (attrs all-isas)
-+ (type register UHI)
-+)
-+(define-hardware
-+ (name h-none)
-+ (comment "for storing unused values")
-+ (attrs m32c-isa MACH32)
-+ (type register SI)
-+)
-+
-+;=============================================================
-+; Operands
-+;-------------------------------------------------------------
-+; Source Registers
-+;-------------------------------------------------------------
-+
-+(dnop Src16RnQI "general register QI view" (MACH16 m16c-isa) h-gr-QI f-src16-rn)
-+(dnop Src16RnHI "general register QH view" (MACH16 m16c-isa) h-gr-HI f-src16-rn)
-+
-+(dnop Src32RnUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-src32-rn-unprefixed-QI)
-+(dnop Src32RnUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-src32-rn-unprefixed-HI)
-+(dnop Src32RnUnprefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-src32-rn-unprefixed-SI)
-+
-+(dnop Src32RnPrefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-src32-rn-prefixed-QI)
-+(dnop Src32RnPrefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-src32-rn-prefixed-HI)
-+(dnop Src32RnPrefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-src32-rn-prefixed-SI)
-+
-+(dnop Src16An "address register" (MACH16 m16c-isa) h-ar f-src16-an)
-+(dnop Src16AnQI "address register QI view" (MACH16 m16c-isa) h-ar-QI f-src16-an)
-+(dnop Src16AnHI "address register HI view" (MACH16 m16c-isa) h-ar-HI f-src16-an)
-+
-+(dnop Src32AnUnprefixed "address register" (MACH32 m32c-isa) h-ar f-src32-an-unprefixed)
-+(dnop Src32AnUnprefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-src32-an-unprefixed)
-+(dnop Src32AnUnprefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-src32-an-unprefixed)
-+(dnop Src32AnUnprefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-src32-an-unprefixed)
-+
-+(dnop Src32AnPrefixed "address register" (MACH32 m32c-isa) h-ar f-src32-an-prefixed)
-+(dnop Src32AnPrefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-src32-an-prefixed)
-+(dnop Src32AnPrefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-src32-an-prefixed)
-+(dnop Src32AnPrefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-src32-an-prefixed)
-+
-+; Destination Registers
-+;
-+(dnop Dst16RnQI "general register QI view" (MACH16 m16c-isa) h-gr-QI f-dst16-rn)
-+(dnop Dst16RnHI "general register HI view" (MACH16 m16c-isa) h-gr-HI f-dst16-rn)
-+(dnop Dst16RnSI "general register SI view" (MACH16 m16c-isa) h-gr-SI f-dst16-rn)
-+(dnop Dst16RnExtQI "general register QI/HI view for 'ext' insns" (MACH16 m16c-isa) h-gr-ext-QI f-dst16-rn-ext)
-+
-+(dnop Dst32R0QI-S "general register QI view" (MACH32 m32c-isa) h-r0l f-nil)
-+(dnop Dst32R0HI-S "general register HI view" (MACH32 m32c-isa) h-r0 f-nil)
-+
-+(dnop Dst32RnUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-unprefixed-QI)
-+(dnop Dst32RnUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-dst32-rn-unprefixed-HI)
-+(dnop Dst32RnUnprefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-dst32-rn-unprefixed-SI)
-+(dnop Dst32RnExtUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-ext-QI f-dst32-rn-ext-unprefixed)
-+(dnop Dst32RnExtUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-ext-HI f-dst32-rn-ext-unprefixed)
-+
-+(dnop Dst32RnPrefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-prefixed-QI)
-+(dnop Dst32RnPrefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-dst32-rn-prefixed-HI)
-+(dnop Dst32RnPrefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-dst32-rn-prefixed-SI)
-+
-+(dnop Dst16RnQI-S "general register QI view" (MACH16 m16c-isa) h-r0l-r0h f-dst16-rn-QI-s)
-+
-+(dnop Dst16AnQI-S "address register QI view" (MACH16 m16c-isa) h-ar-QI f-dst16-rn-QI-s)
-+
-+(dnop Bit16Rn "general register bit view" (MACH16 m16c-isa) h-gr-HI f-dst16-rn)
-+
-+(dnop Bit32RnPrefixed "general register bit view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-prefixed-QI)
-+(dnop Bit32RnUnprefixed "general register bit view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-unprefixed-QI)
-+
-+(dnop R0 "r0" (all-isas) h-r0 f-nil)
-+(dnop R1 "r1" (all-isas) h-r1 f-nil)
-+(dnop R2 "r2" (all-isas) h-r2 f-nil)
-+(dnop R3 "r3" (all-isas) h-r3 f-nil)
-+(dnop R0l "r0l" (all-isas) h-r0l f-nil)
-+(dnop R0h "r0h" (all-isas) h-r0h f-nil)
-+(dnop R2R0 "r2r0" (all-isas) h-r2r0 f-nil)
-+(dnop R3R1 "r3r1" (all-isas) h-r3r1 f-nil)
-+(dnop R1R2R0 "r1r2r0" (all-isas) h-r1r2r0 f-nil)
-+
-+(dnop Dst16An "address register" (MACH16 m16c-isa) h-ar f-dst16-an)
-+(dnop Dst16AnQI "address register QI view" (MACH16 m16c-isa) h-ar-QI f-dst16-an)
-+(dnop Dst16AnHI "address register HI view" (MACH16 m16c-isa) h-ar-HI f-dst16-an)
-+(dnop Dst16AnSI "address register SI view" (MACH16 m16c-isa) h-ar-SI f-dst16-an)
-+(dnop Dst16An-S "address register HI view" (MACH16 m16c-isa) h-ar-HI f-dst16-an-s)
-+
-+(dnop Dst32AnUnprefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
-+(dnop Dst32AnUnprefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-dst32-an-unprefixed)
-+(dnop Dst32AnUnprefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-dst32-an-unprefixed)
-+(dnop Dst32AnUnprefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
-+
-+(dnop Dst32AnExtUnprefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
-+
-+(dnop Dst32AnPrefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed)
-+(dnop Dst32AnPrefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-dst32-an-prefixed)
-+(dnop Dst32AnPrefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-dst32-an-prefixed)
-+(dnop Dst32AnPrefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed)
-+
-+(dnop Bit16An "address register bit view" (MACH16 m16c-isa) h-ar f-dst16-an)
-+
-+(dnop Bit32AnPrefixed "address register bit" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed)
-+(dnop Bit32AnUnprefixed "address register bit" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
-+
-+(dnop A0 "a0" (all-isas) h-a0 f-nil)
-+(dnop A1 "a1" (all-isas) h-a1 f-nil)
-+
-+(dnop sb "SB register" (all-isas SEM-ONLY) h-sb f-nil)
-+(dnop fb "FB register" (all-isas SEM-ONLY) h-fb f-nil)
-+(dnop sp "SP register" (all-isas SEM-ONLY) h-sp f-nil)
-+
-+(define-full-operand SrcDst16-r0l-r0h-S-normal "r0l/r0h pair" (MACH16 m16c-isa)
-+ h-sint DFLT f-5-1
-+ ((parse "r0l_r0h") (print "r0l_r0h")) () ()
-+)
-+
-+(define-full-operand Regsetpop "popm regset" (all-isas) h-uint
-+ DFLT f-8-8 ((parse "pop_regset") (print "pop_regset")) () ())
-+(define-full-operand Regsetpush "pushm regset" (all-isas) h-uint
-+ DFLT f-8-8 ((parse "push_regset") (print "push_regset")) () ())
-+
-+(dnop Rn16-push-S "r0[lh]" (MACH16 m16c-isa) h-gr-QI f-4-1)
-+(dnop An16-push-S "a[01]" (MACH16 m16c-isa) h-ar-HI f-4-1)
-+
-+;-------------------------------------------------------------
-+; Offsets and absolutes
-+;-------------------------------------------------------------
-+
-+(define-full-operand Dsp-8-u6 "unsigned 6 bit displacement at offset 8 bits" (all-isas)
-+ h-uint DFLT f-dsp-8-u6
-+ ((parse "unsigned6")) () ()
-+)
-+(define-full-operand Dsp-8-u8 "unsigned 8 bit displacement at offset 8 bits" (all-isas)
-+ h-uint DFLT f-dsp-8-u8
-+ ((parse "unsigned8")) () ()
-+)
-+(define-full-operand Dsp-8-u16 "unsigned 16 bit displacement at offset 8 bits" (all-isas)
-+ h-uint DFLT f-dsp-8-u16
-+ ((parse "unsigned16")) () ()
-+)
-+(define-full-operand Dsp-8-s8 "signed 8 bit displacement at offset 8 bits" (all-isas)
-+ h-sint DFLT f-dsp-8-s8
-+ ((parse "signed8")) () ()
-+)
-+(define-full-operand Dsp-8-s24 "signed 24 bit displacement at offset 8 bits" (all-isas)
-+ h-sint DFLT f-dsp-8-s24
-+ ((parse "signed24")) () ()
-+)
-+(define-full-operand Dsp-8-u24 "unsigned 24 bit displacement at offset 8 bits" (all-isas)
-+ h-uint DFLT f-dsp-8-u24
-+ ((parse "unsigned24")) () ()
-+)
-+(define-full-operand Dsp-10-u6 "unsigned 6 bit displacement at offset 10 bits" (all-isas)
-+ h-uint DFLT f-dsp-10-u6
-+ ((parse "unsigned6")) () ()
-+)
-+(define-full-operand Dsp-16-u8 "unsigned 8 bit displacement at offset 16 bits" (all-isas)
-+ h-uint DFLT f-dsp-16-u8
-+ ((parse "unsigned8")) () ()
-+)
-+(define-full-operand Dsp-16-u16 "unsigned 16 bit displacement at offset 16 bits" (all-isas)
-+ h-uint DFLT f-dsp-16-u16
-+ ((parse "unsigned16")) () ()
-+)
-+(define-full-operand Dsp-16-u20 "unsigned 20 bit displacement at offset 16 bits" (all-isas)
-+ h-uint DFLT f-dsp-16-u24
-+ ((parse "unsigned20")) () ()
-+)
-+(define-full-operand Dsp-16-u24 "unsigned 24 bit displacement at offset 16 bits" (all-isas)
-+ h-uint DFLT f-dsp-16-u24
-+ ((parse "unsigned24")) () ()
-+)
-+(define-full-operand Dsp-16-s8 "signed 8 bit displacement at offset 16 bits" (all-isas)
-+ h-sint DFLT f-dsp-16-s8
-+ ((parse "signed8")) () ()
-+)
-+(define-full-operand Dsp-16-s16 "signed 16 bit displacement at offset 16 bits" (all-isas)
-+ h-sint DFLT f-dsp-16-s16
-+ ((parse "signed16")) () ()
-+)
-+(define-full-operand Dsp-24-u8 "unsigned 8 bit displacement at offset 24 bits" (all-isas)
-+ h-uint DFLT f-dsp-24-u8
-+ ((parse "unsigned8")) () ()
-+)
-+(define-full-operand Dsp-24-u16 "unsigned 16 bit displacement at offset 24 bits" (all-isas)
-+ h-uint DFLT f-dsp-24-u16
-+ ((parse "unsigned16")) () ()
-+)
-+(define-full-operand Dsp-24-u20 "unsigned 20 bit displacement at offset 24 bits" (all-isas)
-+ h-uint DFLT f-dsp-24-u24
-+ ((parse "unsigned20")) () ()
-+)
-+(define-full-operand Dsp-24-u24 "unsigned 24 bit displacement at offset 24 bits" (all-isas)
-+ h-uint DFLT f-dsp-24-u24
-+ ((parse "unsigned24")) () ()
-+)
-+(define-full-operand Dsp-24-s8 "signed 8 bit displacement at offset 24 bits" (all-isas)
-+ h-sint DFLT f-dsp-24-s8
-+ ((parse "signed8")) () ()
-+)
-+(define-full-operand Dsp-24-s16 "signed 16 bit displacement at offset 24 bits" (all-isas)
-+ h-sint DFLT f-dsp-24-s16
-+ ((parse "signed16")) () ()
-+)
-+(define-full-operand Dsp-32-u8 "unsigned 8 bit displacement at offset 32 bits" (all-isas)
-+ h-uint DFLT f-dsp-32-u8
-+ ((parse "unsigned8")) () ()
-+)
-+(define-full-operand Dsp-32-u16 "unsigned 16 bit displacement at offset 32 bits" (all-isas)
-+ h-uint DFLT f-dsp-32-u16
-+ ((parse "unsigned16")) () ()
-+)
-+(define-full-operand Dsp-32-u24 "unsigned 24 bit displacement at offset 32 bits" (all-isas)
-+ h-uint DFLT f-dsp-32-u24
-+ ((parse "unsigned24")) () ()
-+)
-+(define-full-operand Dsp-32-u20 "unsigned 20 bit displacement at offset 32 bits" (all-isas)
-+ h-uint DFLT f-dsp-32-u24
-+ ((parse "unsigned20")) () ()
-+)
-+(define-full-operand Dsp-32-s8 "signed 8 bit displacement at offset 32 bits" (all-isas)
-+ h-sint DFLT f-dsp-32-s8
-+ ((parse "signed8")) () ()
-+)
-+(define-full-operand Dsp-32-s16 "signed 16 bit displacement at offset 32 bits" (all-isas)
-+ h-sint DFLT f-dsp-32-s16
-+ ((parse "signed16")) () ()
-+)
-+(define-full-operand Dsp-40-u8 "unsigned 8 bit displacement at offset 40 bits" (all-isas)
-+ h-uint DFLT f-dsp-40-u8
-+ ((parse "unsigned8")) () ()
-+)
-+(define-full-operand Dsp-40-s8 "signed 8 bit displacement at offset 40 bits" (all-isas)
-+ h-sint DFLT f-dsp-40-s8
-+ ((parse "signed8")) () ()
-+)
-+(define-full-operand Dsp-40-u16 "unsigned 16 bit displacement at offset 40 bits" (all-isas)
-+ h-uint DFLT f-dsp-40-u16
-+ ((parse "unsigned16")) () ()
-+)
-+(define-full-operand Dsp-40-s16 "signed 16 bit displacement at offset 40 bits" (all-isas)
-+ h-sint DFLT f-dsp-40-s16
-+ ((parse "signed16")) () ()
-+)
-+(define-full-operand Dsp-40-u24 "unsigned 24 bit displacement at offset 40 bits" (all-isas)
-+ h-uint DFLT f-dsp-40-u24
-+ ((parse "unsigned24")) () ()
-+)
-+(define-full-operand Dsp-48-u8 "unsigned 8 bit displacement at offset 48 bits" (all-isas)
-+ h-uint DFLT f-dsp-48-u8
-+ ((parse "unsigned8")) () ()
-+)
-+(define-full-operand Dsp-48-s8 "signed 8 bit displacement at offset 48 bits" (all-isas)
-+ h-sint DFLT f-dsp-48-s8
-+ ((parse "signed8")) () ()
-+)
-+(define-full-operand Dsp-48-u16 "unsigned 16 bit displacement at offset 48 bits" (all-isas)
-+ h-uint DFLT f-dsp-48-u16
-+ ((parse "unsigned16")) () ()
-+)
-+(define-full-operand Dsp-48-s16 "signed 16 bit displacement at offset 48 bits" (all-isas)
-+ h-sint DFLT f-dsp-48-s16
-+ ((parse "signed16")) () ()
-+)
-+(define-full-operand Dsp-48-u24 "unsigned 24 bit displacement at offset 48 bits" (all-isas)
-+ h-uint DFLT f-dsp-48-u24
-+ ((parse "unsigned24")) () ()
-+)
-+
-+(define-full-operand Imm-8-s4 "signed 4 bit immediate at offset 8 bits" (all-isas)
-+ h-sint DFLT f-imm-8-s4
-+ ((parse "signed4")) () ()
-+)
-+(define-full-operand Imm-8-s4n "negated 4 bit immediate at offset 8 bits" (all-isas)
-+ h-sint DFLT f-imm-8-s4
-+ ((parse "signed4n")) () ()
-+)
-+(define-full-operand Imm-sh-8-s4 "signed 4 bit shift immediate at offset 8 bits" (all-isas)
-+ h-shimm DFLT f-imm-8-s4
-+ () () ()
-+)
-+(define-full-operand Imm-8-QI "signed 8 bit immediate at offset 8 bits" (all-isas)
-+ h-sint DFLT f-dsp-8-s8
-+ ((parse "signed8")) () ()
-+)
-+(define-full-operand Imm-8-HI "signed 16 bit immediate at offset 8 bits" (all-isas)
-+ h-sint DFLT f-dsp-8-s16
-+ ((parse "signed16")) () ()
-+)
-+(define-full-operand Imm-12-s4 "signed 4 bit immediate at offset 12 bits" (all-isas)
-+ h-sint DFLT f-imm-12-s4
-+ ((parse "signed4")) () ()
-+)
-+(define-full-operand Imm-12-s4n "negated 4 bit immediate at offset 12 bits" (all-isas)
-+ h-sint DFLT f-imm-12-s4
-+ ((parse "signed4n") (print "signed4n")) () ()
-+)
-+(define-full-operand Imm-sh-12-s4 "signed 4 bit shift immediate at offset 12 bits" (all-isas)
-+ h-shimm DFLT f-imm-12-s4
-+ () () ()
-+)
-+(define-full-operand Imm-13-u3 "signed 3 bit immediate at offset 13 bits" (all-isas)
-+ h-sint DFLT f-imm-13-u3
-+ ((parse "signed4")) () ()
-+)
-+(define-full-operand Imm-20-s4 "signed 4 bit immediate at offset 20 bits" (all-isas)
-+ h-sint DFLT f-imm-20-s4
-+ ((parse "signed4")) () ()
-+)
-+(define-full-operand Imm-sh-20-s4 "signed 4 bit shift immediate at offset 12 bits" (all-isas)
-+ h-shimm DFLT f-imm-20-s4
-+ () () ()
-+)
-+(define-full-operand Imm-16-QI "signed 8 bit immediate at offset 16 bits" (all-isas)
-+ h-sint DFLT f-dsp-16-s8
-+ ((parse "signed8")) () ()
-+)
-+(define-full-operand Imm-16-HI "signed 16 bit immediate at offset 16 bits" (all-isas)
-+ h-sint DFLT f-dsp-16-s16
-+ ((parse "signed16")) () ()
-+)
-+(define-full-operand Imm-16-SI "signed 32 bit immediate at offset 16 bits" (all-isas)
-+ h-sint DFLT f-dsp-16-s32
-+ ((parse "signed32")) () ()
-+)
-+(define-full-operand Imm-24-QI "signed 8 bit immediate at offset 24 bits" (all-isas)
-+ h-sint DFLT f-dsp-24-s8
-+ ((parse "signed8")) () ()
-+)
-+(define-full-operand Imm-24-HI "signed 16 bit immediate at offset 24 bits" (all-isas)
-+ h-sint DFLT f-dsp-24-s16
-+ ((parse "signed16")) () ()
-+)
-+(define-full-operand Imm-24-SI "signed 32 bit immediate at offset 24 bits" (all-isas)
-+ h-sint DFLT f-dsp-24-s32
-+ ((parse "signed32")) () ()
-+)
-+(define-full-operand Imm-32-QI "signed 8 bit immediate at offset 32 bits" (all-isas)
-+ h-sint DFLT f-dsp-32-s8
-+ ((parse "signed8")) () ()
-+)
-+(define-full-operand Imm-32-SI "signed 32 bit immediate at offset 32 bits" (all-isas)
-+ h-sint DFLT f-dsp-32-s32
-+ ((parse "signed32")) () ()
-+)
-+(define-full-operand Imm-32-HI "signed 16 bit immediate at offset 32 bits" (all-isas)
-+ h-sint DFLT f-dsp-32-s16
-+ ((parse "signed16")) () ()
-+)
-+(define-full-operand Imm-40-QI "signed 8 bit immediate at offset 40 bits" (all-isas)
-+ h-sint DFLT f-dsp-40-s8
-+ ((parse "signed8")) () ()
-+)
-+(define-full-operand Imm-40-HI "signed 16 bit immediate at offset 40 bits" (all-isas)
-+ h-sint DFLT f-dsp-40-s16
-+ ((parse "signed16")) () ()
-+)
-+(define-full-operand Imm-40-SI "signed 32 bit immediate at offset 40 bits" (all-isas)
-+ h-sint DFLT f-dsp-40-s32
-+ ((parse "signed32")) () ()
-+)
-+(define-full-operand Imm-48-QI "signed 8 bit immediate at offset 48 bits" (all-isas)
-+ h-sint DFLT f-dsp-48-s8
-+ ((parse "signed8")) () ()
-+)
-+(define-full-operand Imm-48-HI "signed 16 bit immediate at offset 48 bits" (all-isas)
-+ h-sint DFLT f-dsp-48-s16
-+ ((parse "signed16")) () ()
-+)
-+(define-full-operand Imm-48-SI "signed 32 bit immediate at offset 48 bits" (all-isas)
-+ h-sint DFLT f-dsp-48-s32
-+ ((parse "signed32")) () ()
-+)
-+(define-full-operand Imm-56-QI "signed 8 bit immediate at offset 56 bits" (all-isas)
-+ h-sint DFLT f-dsp-56-s8
-+ ((parse "signed8")) () ()
-+)
-+(define-full-operand Imm-56-HI "signed 16 bit immediate at offset 56 bits" (all-isas)
-+ h-sint DFLT f-dsp-56-s16
-+ ((parse "signed16")) () ()
-+)
-+(define-full-operand Imm-64-HI "signed 16 bit immediate at offset 64 bits" (all-isas)
-+ h-sint DFLT f-dsp-64-s16
-+ ((parse "signed16")) () ()
-+)
-+(define-full-operand Imm1-S "signed 1 bit immediate for short format binary insns" (m32c-isa)
-+ h-sint DFLT f-imm1-S
-+ ((parse "imm1_S")) () ()
-+)
-+(define-full-operand Imm3-S "signed 3 bit immediate for short format binary insns" (m32c-isa)
-+ h-sint DFLT f-imm3-S
-+ ((parse "imm3_S")) () ()
-+)
-+
-+;-------------------------------------------------------------
-+; Bit numbers
-+;-------------------------------------------------------------
-+
-+(define-full-operand Bitno16R "bit number for indexing registers" (m16c-isa)
-+ h-uint DFLT f-dsp-16-u8
-+ ((parse "Bitno16R")) () ()
-+)
-+(dnop Bitno32Prefixed "bit number for indexing objects" (m32c-isa) h-uint f-bitno32-prefixed)
-+(dnop Bitno32Unprefixed "bit number for indexing objects" (m32c-isa) h-uint f-bitno32-unprefixed)
-+
-+(define-full-operand BitBase16-16-u8 "unsigned bit,base:8 at offset 16for m16c" (m16c-isa)
-+ h-uint DFLT f-dsp-16-u8
-+ ((parse "unsigned_bitbase8") (print "unsigned_bitbase")) () ()
-+)
-+(define-full-operand BitBase16-16-s8 "signed bit,base:8 at offset 16for m16c" (m16c-isa)
-+ h-sint DFLT f-dsp-16-s8
-+ ((parse "signed_bitbase8") (print "signed_bitbase")) () ()
-+)
-+(define-full-operand BitBase16-16-u16 "unsigned bit,base:16 at offset 16 for m16c" (m16c-isa)
-+ h-uint DFLT f-dsp-16-u16
-+ ((parse "unsigned_bitbase16") (print "unsigned_bitbase")) () ()
-+)
-+(define-full-operand BitBase16-8-u11-S "signed bit,base:11 at offset 16 for m16c" (m16c-isa)
-+ h-uint DFLT f-bitbase16-u11-S
-+ ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
-+)
-+
-+(define-full-operand BitBase32-16-u11-Unprefixed "unsigned bit,base:11 at offset 16 for m32c" (m32c-isa)
-+ h-uint DFLT f-bitbase32-16-u11-unprefixed
-+ ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
-+)
-+(define-full-operand BitBase32-16-s11-Unprefixed "signed bit,base:11 at offset 16 for m32c" (m32c-isa)
-+ h-sint DFLT f-bitbase32-16-s11-unprefixed
-+ ((parse "signed_bitbase11") (print "signed_bitbase")) () ()
-+)
-+(define-full-operand BitBase32-16-u19-Unprefixed "unsigned bit,base:19 at offset 16 for m32c" (m32c-isa)
-+ h-uint DFLT f-bitbase32-16-u19-unprefixed
-+ ((parse "unsigned_bitbase19") (print "unsigned_bitbase")) () ()
-+)
-+(define-full-operand BitBase32-16-s19-Unprefixed "signed bit,base:19 at offset 16 for m32c" (m32c-isa)
-+ h-sint DFLT f-bitbase32-16-s19-unprefixed
-+ ((parse "signed_bitbase19") (print "signed_bitbase")) () ()
-+)
-+(define-full-operand BitBase32-16-u27-Unprefixed "unsigned bit,base:27 at offset 16 for m32c" (m32c-isa)
-+ h-uint DFLT f-bitbase32-16-u27-unprefixed
-+ ((parse "unsigned_bitbase27") (print "unsigned_bitbase")) () ()
-+)
-+(define-full-operand BitBase32-24-u11-Prefixed "unsigned bit,base:11 at offset 24 for m32c" (m32c-isa)
-+ h-uint DFLT f-bitbase32-24-u11-prefixed
-+ ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
-+)
-+(define-full-operand BitBase32-24-s11-Prefixed "signed bit,base:11 at offset 24 for m32c" (m32c-isa)
-+ h-sint DFLT f-bitbase32-24-s11-prefixed
-+ ((parse "signed_bitbase11") (print "signed_bitbase")) () ()
-+)
-+(define-full-operand BitBase32-24-u19-Prefixed "unsigned bit,base:19 at offset 24 for m32c" (m32c-isa)
-+ h-uint DFLT f-bitbase32-24-u19-prefixed
-+ ((parse "unsigned_bitbase19") (print "unsigned_bitbase")) () ()
-+)
-+(define-full-operand BitBase32-24-s19-Prefixed "signed bit,base:19 at offset 24 for m32c" (m32c-isa)
-+ h-sint DFLT f-bitbase32-24-s19-prefixed
-+ ((parse "signed_bitbase19") (print "signed_bitbase")) () ()
-+)
-+(define-full-operand BitBase32-24-u27-Prefixed "unsigned bit,base:27 at offset 24 for m32c" (m32c-isa)
-+ h-uint DFLT f-bitbase32-24-u27-prefixed
-+ ((parse "unsigned_bitbase27") (print "unsigned_bitbase")) () ()
-+)
-+;-------------------------------------------------------------
-+; Labels
-+;-------------------------------------------------------------
-+
-+(define-full-operand Lab-5-3 "3 bit label" (all-isas RELAX)
-+ h-iaddr DFLT f-lab-5-3
-+ ((parse "lab_5_3")) () () )
-+
-+(define-full-operand Lab32-jmp-s "3 bit label" (all-isas RELAX)
-+ h-iaddr DFLT f-lab32-jmp-s
-+ ((parse "lab_5_3")) () () )
-+
-+(dnop Lab-8-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-8-8)
-+(dnop Lab-8-16 "16 bit label" (all-isas RELAX) h-iaddr f-lab-8-16)
-+(dnop Lab-8-24 "24 bit label" (all-isas) h-iaddr f-lab-8-24)
-+(dnop Lab-16-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-16-8)
-+(dnop Lab-24-8 "8 bit label" (all-isas) h-iaddr f-lab-24-8)
-+(dnop Lab-32-8 "8 bit label" (all-isas) h-iaddr f-lab-32-8)
-+(dnop Lab-40-8 "8 bit label" (all-isas) h-iaddr f-lab-40-8)
-+
-+;-------------------------------------------------------------
-+; Condition code bits
-+;-------------------------------------------------------------
-+
-+(dnop sbit "negative bit" (SEM-ONLY all-isas) h-sbit f-nil)
-+(dnop obit "overflow bit" (SEM-ONLY all-isas) h-obit f-nil)
-+(dnop zbit "zero bit" (SEM-ONLY all-isas) h-zbit f-nil)
-+(dnop cbit "carry bit" (SEM-ONLY all-isas) h-cbit f-nil)
-+(dnop ubit "stack ptr select bit" (SEM-ONLY all-isas) h-ubit f-nil)
-+(dnop ibit "interrupt enable bit" (SEM-ONLY all-isas) h-ibit f-nil)
-+(dnop bbit "reg bank select bit" (SEM-ONLY all-isas) h-bbit f-nil)
-+(dnop dbit "debug bit" (SEM-ONLY all-isas) h-dbit f-nil)
-+
-+;-------------------------------------------------------------
-+; Condition operands
-+;-------------------------------------------------------------
-+
-+(define-pmacro (cond-operand mach offset)
-+ (dnop (.sym cond mach - offset) "condition" ((.sym m mach c-isa)) (.sym h-cond mach) (.sym f-dsp- offset -u8))
-+)
-+
-+(cond-operand 16 16)
-+(cond-operand 16 24)
-+(cond-operand 16 32)
-+(cond-operand 32 16)
-+(cond-operand 32 24)
-+(cond-operand 32 32)
-+(cond-operand 32 40)
-+
-+(dnop cond16c "condition" (m16c-isa) h-cond16c f-cond16)
-+(dnop cond16j "condition" (m16c-isa) h-cond16j f-cond16)
-+(dnop cond16j5 "condition" (m16c-isa) h-cond16j-5 f-cond16j-5)
-+(dnop cond32 "condition" (m32c-isa) h-cond32 f-cond32)
-+(dnop cond32j "condition" (m32c-isa) h-cond32 f-cond32j)
-+(dnop sccond32 "scCND condition" (m32c-isa) h-cond32 f-cond16)
-+(dnop flags16 "flags" (m16c-isa) h-flags f-9-3)
-+(dnop flags32 "flags" (m32c-isa) h-flags f-13-3)
-+(dnop cr16 "control" (m16c-isa) h-cr-16 f-9-3)
-+(dnop cr1-Unprefixed-32 "control" (m32c-isa) h-cr1-32 f-13-3)
-+(dnop cr1-Prefixed-32 "control" (m32c-isa) h-cr1-32 f-21-3)
-+(dnop cr2-32 "control" (m32c-isa) h-cr2-32 f-13-3)
-+(dnop cr3-Unprefixed-32 "control" (m32c-isa) h-cr3-32 f-13-3)
-+(dnop cr3-Prefixed-32 "control" (m32c-isa) h-cr3-32 f-21-3)
-+
-+;-------------------------------------------------------------
-+; Suffixes
-+;-------------------------------------------------------------
-+
-+(define-full-operand Z "Suffix for zero format insns" (all-isas)
-+ h-sint DFLT f-nil
-+ ((parse "Z") (print "Z")) () ()
-+)
-+(define-full-operand S "Suffix for short format insns" (all-isas)
-+ h-sint DFLT f-nil
-+ ((parse "S") (print "S")) () ()
-+)
-+(define-full-operand Q "Suffix for quick format insns" (all-isas)
-+ h-sint DFLT f-nil
-+ ((parse "Q") (print "Q")) () ()
-+)
-+(define-full-operand G "Suffix for general format insns" (all-isas)
-+ h-sint DFLT f-nil
-+ ((parse "G") (print "G")) () ()
-+)
-+(define-full-operand X "Empty suffix" (all-isas)
-+ h-sint DFLT f-nil
-+ ((parse "X") (print "X")) () ()
-+)
-+(define-full-operand size "any size specifier" (all-isas)
-+ h-sint DFLT f-nil
-+ ((parse "size") (print "size")) () ()
-+)
-+;-------------------------------------------------------------
-+; Misc
-+;-------------------------------------------------------------
-+
-+(dnop BitIndex "Bit Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-bit-index f-nil)
-+(dnop SrcIndex "Source Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-src-index f-nil)
-+(dnop DstIndex "Destination Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-dst-index f-nil)
-+(dnop NoRemainder "Place holder for when the remainder is not kept" (SEM-ONLY MACH32 m32c-isa) h-none f-nil)
-+
-+;=============================================================
-+; Derived Operands
-+
-+; Memory reference macros that clip addresses appropriately. Refer to
-+; memory at ADDRESS in MODE, clipped appropriately for either the m16c
-+; or m32c.
-+(define-pmacro (mem16 mode address)
-+ (mem mode (and #xffff address)))
-+
-+(define-pmacro (mem32 mode address)
-+ (mem mode (and #xffffff address)))
-+
-+; Like mem16 and mem32, but takes MACH as a parameter. MACH must be
-+; either 16 or 32.
-+(define-pmacro (mem-mach mach mode address)
-+ ((.sym mem mach) mode address))
-+
-+;-------------------------------------------------------------
-+; Source
-+;-------------------------------------------------------------
-+; Rn direct
-+;-------------------------------------------------------------
-+
-+(define-pmacro (src16-Rn-direct-operand xmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym src16-Rn-direct- xmode))
-+ (comment (.str "m16c Rn direct source " xmode))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (args ((.sym Src16Rn xmode)))
-+ (syntax (.str "$Src16Rn" xmode))
-+ (base-ifield f-8-4)
-+ (encoding (+ (f-8-2 0) (.sym Src16Rn xmode)))
-+ (ifield-assertion (eq f-8-2 0))
-+ (getter (trunc xmode (.sym Src16Rn xmode)))
-+ (setter (set (.sym Src16Rn xmode) newval))
-+ )
-+ )
-+)
-+(src16-Rn-direct-operand QI)
-+(src16-Rn-direct-operand HI)
-+
-+(define-pmacro (src32-Rn-direct-operand group base xmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym src32-Rn-direct- group - xmode))
-+ (comment (.str "m32c Rn direct source " xmode))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (args ((.sym Src32Rn group xmode)))
-+ (syntax (.str "$Src32Rn" group xmode))
-+ (base-ifield (.sym f- base -11))
-+ (encoding (+ ((.sym f- base -3) 4) (.sym Src32Rn group xmode)))
-+ (ifield-assertion (eq (.sym f- base -3) 4))
-+ (getter (trunc xmode (.sym Src32Rn group xmode)))
-+ (setter (set (.sym Src32Rn group xmode) newval))
-+ )
-+ )
-+)
-+
-+(src32-Rn-direct-operand Unprefixed 1 QI)
-+(src32-Rn-direct-operand Prefixed 9 QI)
-+(src32-Rn-direct-operand Unprefixed 1 HI)
-+(src32-Rn-direct-operand Prefixed 9 HI)
-+(src32-Rn-direct-operand Unprefixed 1 SI)
-+(src32-Rn-direct-operand Prefixed 9 SI)
-+
-+;-------------------------------------------------------------
-+; An direct
-+;-------------------------------------------------------------
-+
-+(define-pmacro (src16-An-direct-operand xmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym src16-An-direct- xmode))
-+ (comment (.str "m16c An direct destination " xmode))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (args ((.sym Src16An xmode)))
-+ (syntax (.str "$Src16An" xmode))
-+ (base-ifield f-8-4)
-+ (encoding (+ (f-8-2 1) (f-10-1 0) (.sym Src16An xmode)))
-+ (ifield-assertion (andif (eq f-8-2 1) (eq f-10-1 0)))
-+ (getter (trunc xmode (.sym Src16An xmode)))
-+ (setter (set (.sym Src16An xmode) newval))
-+ )
-+ )
-+)
-+(src16-An-direct-operand QI)
-+(src16-An-direct-operand HI)
-+
-+(define-pmacro (src32-An-direct-operand group base1 base2 xmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym src32-An-direct- group - xmode))
-+ (comment (.str "m32c An direct destination " xmode))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (args ((.sym Src32An group xmode)))
-+ (syntax (.str "$Src32An" group xmode))
-+ (base-ifield (.sym f- base1 -11))
-+ (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Src32An group xmode)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1)))
-+ (getter (trunc xmode (.sym Src32An group xmode)))
-+ (setter (set (.sym Src32An group xmode) newval))
-+ )
-+ )
-+)
-+
-+(src32-An-direct-operand Unprefixed 1 10 QI)
-+(src32-An-direct-operand Unprefixed 1 10 HI)
-+(src32-An-direct-operand Unprefixed 1 10 SI)
-+(src32-An-direct-operand Prefixed 9 18 QI)
-+(src32-An-direct-operand Prefixed 9 18 HI)
-+(src32-An-direct-operand Prefixed 9 18 SI)
-+
-+;-------------------------------------------------------------
-+; An indirect
-+;-------------------------------------------------------------
-+
-+(define-pmacro (src16-An-indirect-operand xmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym src16-An-indirect- xmode))
-+ (comment (.str "m16c An indirect destination " xmode))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (args (Src16An))
-+ (syntax "[$Src16An]")
-+ (base-ifield f-8-4)
-+ (encoding (+ (f-8-2 1) (f-10-1 1) Src16An))
-+ (ifield-assertion (andif (eq f-8-2 1) (eq f-10-1 1)))
-+ (getter (mem16 xmode Src16An))
-+ (setter (set (mem16 xmode Src16An) newval))
-+ )
-+ )
-+)
-+(src16-An-indirect-operand QI)
-+(src16-An-indirect-operand HI)
-+
-+(define-pmacro (src32-An-indirect-operand group base1 base2 xmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym src32-An-indirect- group - xmode))
-+ (comment (.str "m32c An indirect destination " xmode))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (args ((.sym Src32An group)))
-+ (syntax (.str "[$Src32An" group "]"))
-+ (base-ifield (.sym f- base1 -11))
-+ (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Src32An group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0)))
-+ (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group)
-+ (const 0)))
-+ (setter (c-call DFLT (.str "operand_setter_" xmode) newval
-+ (.sym Src32An group) (const 0)))
-+; (getter (mem32 xmode (.sym Src32An group)))
-+; (setter (set (mem32 xmode (.sym Src32An group)) newval))
-+ )
-+ )
-+)
-+
-+(src32-An-indirect-operand Unprefixed 1 10 QI)
-+(src32-An-indirect-operand Unprefixed 1 10 HI)
-+(src32-An-indirect-operand Unprefixed 1 10 SI)
-+(src32-An-indirect-operand Prefixed 9 18 QI)
-+(src32-An-indirect-operand Prefixed 9 18 HI)
-+(src32-An-indirect-operand Prefixed 9 18 SI)
-+
-+;-------------------------------------------------------------
-+; dsp:d[r] relative
-+;-------------------------------------------------------------
-+
-+(define-pmacro (src16-relative-operand xmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym src16-16-8-SB-relative- xmode))
-+ (comment (.str "m16c dsp:8[sb] relative destination " xmode))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (args (Dsp-16-u8))
-+ (syntax "${Dsp-16-u8}[sb]")
-+ (base-ifield f-8-4)
-+ (encoding (+ (f-8-4 #xA) Dsp-16-u8))
-+ (ifield-assertion (eq f-8-4 #xA))
-+ (getter (mem16 xmode (add Dsp-16-u8 (reg h-sb))))
-+ (setter (set (mem16 xmode (add Dsp-16-u8 (reg h-sb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym src16-16-16-SB-relative- xmode))
-+ (comment (.str "m16c dsp:16[sb] relative destination " xmode))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (args (Dsp-16-u16))
-+ (syntax "${Dsp-16-u16}[sb]")
-+ (base-ifield f-8-4)
-+ (encoding (+ (f-8-4 #xE) Dsp-16-u16))
-+ (ifield-assertion (eq f-8-4 #xE))
-+ (getter (mem16 xmode (add Dsp-16-u16 (reg h-sb))))
-+ (setter (set (mem16 xmode (add Dsp-16-u16 (reg h-sb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym src16-16-8-FB-relative- xmode))
-+ (comment (.str "m16c dsp:8[fb] relative destination " xmode))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (args (Dsp-16-s8))
-+ (syntax "${Dsp-16-s8}[fb]")
-+ (base-ifield f-8-4)
-+ (encoding (+ (f-8-4 #xB) Dsp-16-s8))
-+ (ifield-assertion (eq f-8-4 #xB))
-+ (getter (mem16 xmode (add Dsp-16-s8 (reg h-fb))))
-+ (setter (set (mem16 xmode (add Dsp-16-s8 (reg h-fb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym src16-16-8-An-relative- xmode))
-+ (comment (.str "m16c dsp:8[An] relative destination " xmode))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (args (Src16An Dsp-16-u8))
-+ (syntax "${Dsp-16-u8}[$Src16An]")
-+ (base-ifield f-8-4)
-+ (encoding (+ (f-8-2 2) (f-10-1 0) Dsp-16-u8 Src16An))
-+ (ifield-assertion (andif (eq f-8-2 2) (eq f-10-1 0)))
-+ (getter (mem16 xmode (add Dsp-16-u8 Src16An)))
-+ (setter (set (mem16 xmode (add Dsp-16-u8 Src16An)) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym src16-16-16-An-relative- xmode))
-+ (comment (.str "m16c dsp:16[An] relative destination " xmode))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (args (Src16An Dsp-16-u16))
-+ (syntax "${Dsp-16-u16}[$Src16An]")
-+ (base-ifield f-8-4)
-+ (encoding (+ (f-8-2 3) (f-10-1 0) Dsp-16-u16 Src16An))
-+ (ifield-assertion (andif (eq f-8-2 3) (eq f-10-1 0)))
-+ (getter (mem16 xmode (add Dsp-16-u16 Src16An)))
-+ (setter (set (mem16 xmode (add Dsp-16-u16 Src16An)) newval))
-+ )
-+ )
-+)
-+
-+(src16-relative-operand QI)
-+(src16-relative-operand HI)
-+
-+(define-pmacro (src32-relative-operand offset group base1 base2 xmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym src32- offset -8-SB-relative- group - xmode))
-+ (comment (.str "m32c dsp:8[sb] relative destination " xmode))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (args ((.sym Dsp- offset -u8)))
-+ (syntax (.str "${Dsp-" offset "-u8}[sb]"))
-+ (base-ifield (.sym f- base1 -11))
-+ (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u8)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2)))
-+ (getter (c-call xmode (.str "operand_getter_" xmode) sb (.sym Dsp- offset -u8)))
-+ (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb (.sym Dsp- offset -u8)))
-+; (getter (mem32 xmode (add (.sym Dsp- offset -u8) (reg h-sb))))
-+; (setter (set (mem32 xmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym src32- offset -16-SB-relative- group - xmode))
-+ (comment (.str "m32c dsp:16[sb] relative destination " xmode))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (args ((.sym Dsp- offset -u16)))
-+ (syntax (.str "${Dsp-" offset "-u16}[sb]"))
-+ (base-ifield (.sym f- base1 -11))
-+ (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u16)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2)))
-+ (getter (c-call xmode (.str "operand_getter_" xmode) sb (.sym Dsp- offset -u16)))
-+ (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb (.sym Dsp- offset -u16)))
-+; (getter (mem32 xmode (add (.sym Dsp- offset -u16) (reg h-sb))))
-+; (setter (set (mem32 xmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym src32- offset -8-FB-relative- group - xmode))
-+ (comment (.str "m32c dsp:8[fb] relative destination " xmode))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (args ((.sym Dsp- offset -s8)))
-+ (syntax (.str "${Dsp-" offset "-s8}[fb]"))
-+ (base-ifield (.sym f- base1 -11))
-+ (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s8)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3)))
-+ (getter (c-call xmode (.str "operand_getter_" xmode) fb (.sym Dsp- offset -s8)))
-+ (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb (.sym Dsp- offset -s8)))
-+; (getter (mem32 xmode (add (.sym Dsp- offset -s8) (reg h-fb))))
-+; (setter (set (mem32 xmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym src32- offset -16-FB-relative- group - xmode))
-+ (comment (.str "m32c dsp:16[fb] relative destination " xmode))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (args ((.sym Dsp- offset -s16)))
-+ (syntax (.str "${Dsp-" offset "-s16}[fb]"))
-+ (base-ifield (.sym f- base1 -11))
-+ (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s16)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3)))
-+ (getter (c-call xmode (.str "operand_getter_" xmode) fb (.sym Dsp- offset -s16)))
-+ (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb (.sym Dsp- offset -s16)))
-+; (getter (mem32 xmode (add (.sym Dsp- offset -s16) (reg h-fb))))
-+; (setter (set (mem32 xmode (add (.sym Dsp- offset -s16) (reg h-fb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym src32- offset -8-An-relative- group - xmode))
-+ (comment (.str "m32c dsp:8[An] relative destination " xmode))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (args ((.sym Src32An group) (.sym Dsp- offset -u8)))
-+ (syntax (.str "${Dsp-" offset "-u8}[$Src32An" group "]"))
-+ (base-ifield (.sym f- base1 -11))
-+ (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u8) (.sym Src32An group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0)))
-+ (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u8)))
-+ (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u8)))
-+; (getter (mem32 xmode (add (.sym Dsp- offset -u8) (.sym Src32An group))))
-+; (setter (set (mem32 xmode (add (.sym Dsp- offset -u8) (.sym Src32An group))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym src32- offset -16-An-relative- group - xmode))
-+ (comment (.str "m32c dsp:16[An] relative destination " xmode))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (args ((.sym Src32An group) (.sym Dsp- offset -u16)))
-+ (syntax (.str "${Dsp-" offset "-u16}[$Src32An" group "]"))
-+ (base-ifield (.sym f- base1 -11))
-+ (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u16) (.sym Src32An group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0)))
-+ (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u16)))
-+ (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u16)))
-+; (getter (mem32 xmode (add (.sym Dsp- offset -u16) (.sym Src32An group))))
-+; (setter (set (mem32 xmode (add (.sym Dsp- offset -u16) (.sym Src32An group))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym src32- offset -24-An-relative- group - xmode))
-+ (comment (.str "m32c dsp:16[An] relative destination " xmode))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (args ((.sym Src32An group) (.sym Dsp- offset -u24)))
-+ (syntax (.str "${Dsp-" offset "-u24}[$Src32An" group "]"))
-+ (base-ifield (.sym f- base1 -11))
-+ (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u24) (.sym Src32An group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0)))
-+ (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u24) ))
-+ (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u24)))
-+; (getter (mem32 xmode (add (.sym Dsp- offset -u24) (.sym Src32An group))))
-+; (setter (set (mem32 xmode (add (.sym Dsp- offset -u24) (.sym Src32An group))) newval))
-+ )
-+ )
-+)
-+
-+(src32-relative-operand 16 Unprefixed 1 10 QI)
-+(src32-relative-operand 16 Unprefixed 1 10 HI)
-+(src32-relative-operand 16 Unprefixed 1 10 SI)
-+(src32-relative-operand 24 Prefixed 9 18 QI)
-+(src32-relative-operand 24 Prefixed 9 18 HI)
-+(src32-relative-operand 24 Prefixed 9 18 SI)
-+
-+;-------------------------------------------------------------
-+; Absolute address
-+;-------------------------------------------------------------
-+
-+(define-pmacro (src16-absolute xmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym src16-16-16-absolute- xmode))
-+ (comment (.str "m16c absolute address " xmode))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (args (Dsp-16-u16))
-+ (syntax (.str "${Dsp-16-u16}"))
-+ (base-ifield f-8-4)
-+ (encoding (+ (f-8-4 #xF) Dsp-16-u16))
-+ (ifield-assertion (eq f-8-4 #xF))
-+ (getter (mem16 xmode Dsp-16-u16))
-+ (setter (set (mem16 xmode Dsp-16-u16) newval))
-+ )
-+ )
-+)
-+
-+(src16-absolute QI)
-+(src16-absolute HI)
-+
-+(define-pmacro (src32-absolute offset group base1 base2 xmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym src32- offset -16-absolute- group - xmode))
-+ (comment (.str "m32c absolute address " xmode))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (args ((.sym Dsp- offset -u16)))
-+ (syntax (.str "${Dsp-" offset "-u16}"))
-+ (base-ifield (.sym f- base1 -11))
-+ (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
-+ (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) (.sym Dsp- offset -u16)))
-+ (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) (.sym Dsp- offset -u16)))
-+; (getter (mem32 xmode (.sym Dsp- offset -u16)))
-+; (setter (set (mem32 xmode (.sym Dsp- offset -u16)) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym src32- offset -24-absolute- group - xmode))
-+ (comment (.str "m32c absolute address " xmode))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (args ((.sym Dsp- offset -u24)))
-+ (syntax (.str "${Dsp-" offset "-u24}"))
-+ (base-ifield (.sym f- base1 -11))
-+ (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
-+ (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) (.sym Dsp- offset -u24)))
-+ (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) (.sym Dsp- offset -u24)))
-+; (getter (mem32 xmode (.sym Dsp- offset -u24)))
-+; (setter (set (mem32 xmode (.sym Dsp- offset -u24)) newval))
-+ )
-+ )
-+)
-+
-+(src32-absolute 16 Unprefixed 1 10 QI)
-+(src32-absolute 16 Unprefixed 1 10 HI)
-+(src32-absolute 16 Unprefixed 1 10 SI)
-+(src32-absolute 24 Prefixed 9 18 QI)
-+(src32-absolute 24 Prefixed 9 18 HI)
-+(src32-absolute 24 Prefixed 9 18 SI)
-+
-+;-------------------------------------------------------------
-+; An indirect indirect
-+;
-+; Double indirect addressing uses the lower 3 bytes of the value stored
-+; at the address referenced by 'op' as the effective address.
-+;-------------------------------------------------------------
-+
-+(define-pmacro (indirect-addr op) (and USI (mem32 USI op) #x00ffffff))
-+
-+; (define-pmacro (src-An-indirect-indirect-operand xmode)
-+; (define-derived-operand
-+; (name (.sym src32-An-indirect-indirect- xmode))
-+; (comment (.str "m32c An indirect indirect destination " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args (Src32AnPrefixed))
-+; (syntax (.str "[[$Src32AnPrefixed]]"))
-+; (base-ifield f-9-11)
-+; (encoding (+ (f-9-3 0) (f-18-1 0) Src32AnPrefixed))
-+; (ifield-assertion (andif (eq f-9-3 0) (eq f-18-1 0)))
-+; (getter (mem32 xmode (indirect-addr Src32AnPrefixed)))
-+; (setter (set (mem32 xmode (indirect-addr Src32AnPrefixed)) newval))
-+; )
-+; )
-+
-+; (src-An-indirect-indirect-operand QI)
-+; (src-An-indirect-indirect-operand HI)
-+; (src-An-indirect-indirect-operand SI)
-+
-+;-------------------------------------------------------------
-+; Relative indirect
-+;-------------------------------------------------------------
-+
-+(define-pmacro (src-relative-indirect-operand xmode)
-+ (begin
-+; (define-derived-operand
-+; (name (.sym src32-24-8-SB-relative-indirect- xmode))
-+; (comment (.str "m32c dsp:8[sb] relative source " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args (Dsp-24-u8))
-+; (syntax "[${Dsp-24-u8}[sb]]")
-+; (base-ifield f-9-11)
-+; (encoding (+ (f-9-3 1) (f-18-2 2) Dsp-24-u8))
-+; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-2 2)))
-+; (getter (mem32 xmode (indirect-addr (add Dsp-24-u8 (reg h-sb)))))
-+; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u8 (reg h-sb)))) newval))
-+; )
-+; (define-derived-operand
-+; (name (.sym src32-24-16-SB-relative-indirect- xmode))
-+; (comment (.str "m32c dsp:16[sb] relative source " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args (Dsp-24-u16))
-+; (syntax "[${Dsp-24-u16}[sb]]")
-+; (base-ifield f-9-11)
-+; (encoding (+ (f-9-3 2) (f-18-2 2) Dsp-24-u16))
-+; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-2 2)))
-+; (getter (mem32 xmode (indirect-addr (add Dsp-24-u16 (reg h-sb)))))
-+; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u16 (reg h-sb)))) newval))
-+; )
-+; (define-derived-operand
-+; (name (.sym src32-24-8-FB-relative-indirect- xmode))
-+; (comment (.str "m32c dsp:8[fb] relative source " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args (Dsp-24-s8))
-+; (syntax "[${Dsp-24-s8}[fb]]")
-+; (base-ifield f-9-11)
-+; (encoding (+ (f-9-3 1) (f-18-2 3) Dsp-24-s8))
-+; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-2 3)))
-+; (getter (mem32 xmode (indirect-addr (add Dsp-24-s8 (reg h-fb)))))
-+; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-s8 (reg h-fb)))) newval))
-+; )
-+; (define-derived-operand
-+; (name (.sym src32-24-16-FB-relative-indirect- xmode))
-+; (comment (.str "m32c dsp:16[fb] relative source " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args (Dsp-24-s16))
-+; (syntax "[${Dsp-24-s16}[fb]]")
-+; (base-ifield f-9-11)
-+; (encoding (+ (f-9-3 2) (f-18-2 3) Dsp-24-s16))
-+; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-2 3)))
-+; (getter (mem32 xmode (indirect-addr (add Dsp-24-s16 (reg h-fb)))))
-+; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-s16 (reg h-fb)))) newval))
-+; )
-+; (define-derived-operand
-+; (name (.sym src32-24-8-An-relative-indirect- xmode))
-+; (comment (.str "m32c dsp:8[An] relative indirect source " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args (Src32AnPrefixed Dsp-24-u8))
-+; (syntax "[${Dsp-24-u8}[$Src32AnPrefixed]]")
-+; (base-ifield f-9-11)
-+; (encoding (+ (f-9-3 1) (f-18-1 0) Dsp-24-u8 Src32AnPrefixed))
-+; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-1 0)))
-+; (getter (mem32 xmode (indirect-addr (add Dsp-24-u8 Src32AnPrefixed))))
-+; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u8 Src32AnPrefixed))) newval))
-+; )
-+; (define-derived-operand
-+; (name (.sym src32-24-16-An-relative-indirect- xmode))
-+; (comment (.str "m32c dsp:16[An] relative source " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args (Src32AnPrefixed Dsp-24-u16))
-+; (syntax "[${Dsp-24-u16}[$Src32AnPrefixed]]")
-+; (base-ifield f-9-11)
-+; (encoding (+ (f-9-3 2) (f-18-1 0) Dsp-24-u16 Src32AnPrefixed))
-+; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-1 0)))
-+; (getter (mem32 xmode (indirect-addr (add Dsp-24-u16 Src32AnPrefixed))))
-+; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u16 Src32AnPrefixed))) newval))
-+; )
-+; (define-derived-operand
-+; (name (.sym src32-24-24-An-relative-indirect- xmode))
-+; (comment (.str "m32c dsp:24[An] relative source " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args (Src32AnPrefixed Dsp-24-u24))
-+; (syntax "[${Dsp-24-u24}[$Src32AnPrefixed]]")
-+; (base-ifield f-9-11)
-+; (encoding (+ (f-9-3 3) (f-18-1 0) Dsp-24-u24 Src32AnPrefixed))
-+; (ifield-assertion (andif (eq f-9-3 3) (eq f-18-1 0)))
-+; (getter (mem32 xmode (indirect-addr (add Dsp-24-u24 Src32AnPrefixed))))
-+; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u24 Src32AnPrefixed))) newval))
-+; )
-+ )
-+)
-+
-+; (src-relative-indirect-operand QI)
-+; (src-relative-indirect-operand HI)
-+; (src-relative-indirect-operand SI)
-+
-+;-------------------------------------------------------------
-+; Absolute Indirect address
-+;-------------------------------------------------------------
-+
-+(define-pmacro (src32-absolute-indirect offset base1 base2 xmode)
-+ (begin
-+; (define-derived-operand
-+; (name (.sym src32- offset -16-absolute-indirect-derived- xmode))
-+; (comment (.str "m32c absolute indirect address " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args ((.sym Dsp- offset -u16)))
-+; (syntax (.str "[${Dsp-" offset "-u16}]"))
-+; (base-ifield (.sym f- base1 -11))
-+; (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16)))
-+; (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
-+; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))))
-+; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))) newval))
-+; )
-+; (define-derived-operand
-+; (name (.sym src32- offset -24-absolute-indirect-derived- xmode))
-+; (comment (.str "m32c absolute indirect address " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args ((.sym Dsp- offset -u24)))
-+; (syntax (.str "[${Dsp-" offset "-u24}]"))
-+; (base-ifield (.sym f- base1 -11))
-+; (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24)))
-+; (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
-+; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))))
-+; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))) newval))
-+; )
-+ )
-+)
-+
-+(src32-absolute-indirect 24 9 18 QI)
-+(src32-absolute-indirect 24 9 18 HI)
-+(src32-absolute-indirect 24 9 18 SI)
-+
-+;-------------------------------------------------------------
-+; Register relative source operands for short format insns
-+;-------------------------------------------------------------
-+
-+(define-pmacro (src-2-S-operands mach xmode base opc1 opc2 opc3)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym src mach -2-S-8-SB-relative- xmode))
-+ (comment (.str "m" mach "c SB relative address"))
-+ (attrs (machine mach))
-+ (mode xmode)
-+ (args (Dsp-8-u8))
-+ (syntax "${Dsp-8-u8}[sb]")
-+ (base-ifield (.sym f- base -2))
-+ (encoding (+ ((.sym f- base -2) opc1) Dsp-8-u8))
-+ (ifield-assertion (eq (.sym f- base -2) opc1))
-+ (getter (c-call xmode (.str "operand_getter_" xmode) sb Dsp-8-u8))
-+ (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb Dsp-8-u8))
-+; (getter (mem-mach mach xmode (indirect-addr (add (reg h-sb) Dsp-8-u8))))
-+; (setter (set (mem-mach mach xmode (indirect-addr (add (reg h-sb) Dsp-8-u8))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym src mach -2-S-8-FB-relative- xmode))
-+ (comment (.str "m" mach "c FB relative address"))
-+ (attrs (machine mach))
-+ (mode xmode)
-+ (args (Dsp-8-s8))
-+ (syntax "${Dsp-8-s8}[fb]")
-+ (base-ifield (.sym f- base -2))
-+ (encoding (+ ((.sym f- base -2) opc2) Dsp-8-s8))
-+ (ifield-assertion (eq (.sym f- base -2) opc2))
-+ (getter (c-call xmode (.str "operand_getter_" xmode) fb Dsp-8-s8))
-+ (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb Dsp-8-s8))
-+; (getter (mem-mach mach xmode (indirect-addr (add (reg h-fb) Dsp-8-s8))))
-+; (setter (set (mem-mach mach xmode (indirect-addr (add (reg h-fb) Dsp-8-s8))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym src mach -2-S-16-absolute- xmode))
-+ (comment (.str "m" mach "c absolute address"))
-+ (attrs (machine mach))
-+ (mode xmode)
-+ (args (Dsp-8-u16))
-+ (syntax "${Dsp-8-u16}")
-+ (base-ifield (.sym f- base -2))
-+ (encoding (+ ((.sym f- base -2) opc3) Dsp-8-u16))
-+ (ifield-assertion (eq (.sym f- base -2) opc3))
-+ (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) Dsp-8-u16))
-+ (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) Dsp-8-u16))
-+; (getter (mem-mach mach xmode Dsp-8-u16))
-+; (setter (set (mem-mach mach xmode Dsp-8-u16) newval))
-+ )
-+ )
-+)
-+
-+(src-2-S-operands 16 QI 6 1 2 3)
-+(src-2-S-operands 32 QI 2 2 3 1)
-+(src-2-S-operands 32 HI 2 2 3 1)
-+
-+;=============================================================
-+; Derived Operands
-+;-------------------------------------------------------------
-+; Destination
-+;-------------------------------------------------------------
-+; Rn direct
-+;-------------------------------------------------------------
-+
-+(define-pmacro (dst16-Rn-direct-operand xmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym dst16-Rn-direct- xmode))
-+ (comment (.str "m16c Rn direct destination " xmode))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (args ((.sym Dst16Rn xmode)))
-+ (syntax (.str "$Dst16Rn" xmode))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-2 0) (.sym Dst16Rn xmode)))
-+ (ifield-assertion (eq f-12-2 0))
-+ (getter (trunc xmode (.sym Dst16Rn xmode)))
-+ (setter (set (.sym Dst16Rn xmode) newval))
-+ )
-+ )
-+)
-+
-+(dst16-Rn-direct-operand QI)
-+(dst16-Rn-direct-operand HI)
-+(dst16-Rn-direct-operand SI)
-+
-+(define-derived-operand
-+ (name dst16-Rn-direct-Ext-QI)
-+ (comment "m16c Rn direct destination QI")
-+ (attrs (machine 16))
-+ (mode HI)
-+ (args (Dst16RnExtQI))
-+ (syntax "$Dst16RnExtQI")
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-2 0) Dst16RnExtQI (f-15-1 0)))
-+ (ifield-assertion (andif (eq f-12-2 0) (eq f-15-1 0)))
-+ (getter (trunc QI (.sym Dst16RnExtQI)))
-+ (setter (set Dst16RnExtQI newval))
-+)
-+
-+(define-pmacro (dst32-Rn-direct-operand group base xmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym dst32-Rn-direct- group - xmode))
-+ (comment (.str "m32c Rn direct destination " xmode))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (args ((.sym Dst32Rn group xmode)))
-+ (syntax (.str "$Dst32Rn" group xmode))
-+ (base-ifield (.sym f- base -6))
-+ (encoding (+ ((.sym f- base -3) 4) (.sym Dst32Rn group xmode)))
-+ (ifield-assertion (eq (.sym f- base -3) 4))
-+ (getter (trunc xmode (.sym Dst32Rn group xmode)))
-+ (setter (set (.sym Dst32Rn group xmode) newval))
-+ )
-+ )
-+)
-+
-+(dst32-Rn-direct-operand Unprefixed 4 QI)
-+(dst32-Rn-direct-operand Prefixed 12 QI)
-+(dst32-Rn-direct-operand Unprefixed 4 HI)
-+(dst32-Rn-direct-operand Prefixed 12 HI)
-+(dst32-Rn-direct-operand Unprefixed 4 SI)
-+(dst32-Rn-direct-operand Prefixed 12 SI)
-+
-+(define-pmacro (dst32-Rn-direct-Ext-operand group base1 base2 smode dmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym dst32-Rn-direct- group - smode))
-+ (comment (.str "m32c Rn direct destination " smode))
-+ (attrs (machine 32))
-+ (mode dmode)
-+ (args ((.sym Dst32Rn group smode)))
-+ (syntax (.str "$Dst32Rn" group smode))
-+ (base-ifield (.sym f- base1 -6))
-+ (encoding (+ ((.sym f- base1 -3) 4) ((.sym f- base2 -1) 1) (.sym Dst32Rn group smode)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 4) (eq (.sym f- base2 -1) 1)))
-+ (getter (trunc smode (.sym Dst32Rn group smode)))
-+ (setter (set (.sym Dst32Rn group smode) newval))
-+ )
-+ )
-+)
-+
-+(dst32-Rn-direct-Ext-operand ExtUnprefixed 4 8 QI HI)
-+(dst32-Rn-direct-Ext-operand ExtUnprefixed 4 8 HI SI)
-+
-+(define-derived-operand
-+ (name dst32-R3-direct-Unprefixed-HI)
-+ (comment "m32c R3 direct HI")
-+ (attrs (machine 32))
-+ (mode HI)
-+ (args (R3))
-+ (syntax "$R3")
-+ (base-ifield f-4-6)
-+ (encoding (+ (f-4-3 4) (f-8-2 #x1)))
-+ (ifield-assertion (andif (eq f-4-3 4) (eq f-8-2 #x1)))
-+ (getter (trunc HI R3))
-+ (setter (set R3 newval))
-+)
-+;-------------------------------------------------------------
-+; An direct
-+;-------------------------------------------------------------
-+
-+(define-pmacro (dst16-An-direct-operand xmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym dst16-An-direct- xmode))
-+ (comment (.str "m16c An direct destination " xmode))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (args ((.sym Dst16An xmode)))
-+ (syntax (.str "$Dst16An" xmode))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-2 1) (f-14-1 0) (.sym Dst16An xmode)))
-+ (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 0)))
-+ (getter (trunc xmode (.sym Dst16An xmode)))
-+ (setter (set (.sym Dst16An xmode) newval))
-+ )
-+ )
-+)
-+
-+(dst16-An-direct-operand QI)
-+(dst16-An-direct-operand HI)
-+(dst16-An-direct-operand SI)
-+
-+(define-pmacro (dst32-An-direct-operand group base1 base2 xmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym dst32-An-direct- group - xmode))
-+ (comment (.str "m32c An direct destination " xmode))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (args ((.sym Dst32An group xmode)))
-+ (syntax (.str "$Dst32An" group xmode))
-+ (base-ifield (.sym f- base1 -6))
-+ (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Dst32An group xmode)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1)))
-+ (getter (trunc xmode (.sym Dst32An group xmode)))
-+ (setter (set (.sym Dst32An group xmode) newval))
-+ )
-+ )
-+)
-+
-+(dst32-An-direct-operand Unprefixed 4 8 QI)
-+(dst32-An-direct-operand Prefixed 12 16 QI)
-+(dst32-An-direct-operand Unprefixed 4 8 HI)
-+(dst32-An-direct-operand Prefixed 12 16 HI)
-+(dst32-An-direct-operand Unprefixed 4 8 SI)
-+(dst32-An-direct-operand Prefixed 12 16 SI)
-+
-+;-------------------------------------------------------------
-+; An indirect
-+;-------------------------------------------------------------
-+
-+(define-pmacro (dst16-An-indirect-operand xmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym dst16-An-indirect- xmode))
-+ (comment (.str "m16c An indirect destination " xmode))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (args (Dst16An))
-+ (syntax "[$Dst16An]")
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An))
-+ (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1)))
-+ (getter (mem16 xmode Dst16An))
-+ (setter (set (mem16 xmode Dst16An) newval))
-+ )
-+ )
-+)
-+
-+(dst16-An-indirect-operand QI)
-+(dst16-An-indirect-operand HI)
-+(dst16-An-indirect-operand SI)
-+
-+(define-derived-operand
-+ (name dst16-An-indirect-Ext-QI)
-+ (comment "m16c An indirect destination QI")
-+ (attrs (machine 16))
-+ (mode HI)
-+ (args (Dst16An))
-+ (syntax "[$Dst16An]")
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An))
-+ (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1)))
-+ (getter (mem16 QI Dst16An))
-+ (setter (set (mem16 HI Dst16An) newval))
-+)
-+
-+(define-pmacro (dst32-An-indirect-operand group base1 base2 smode dmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym dst32-An-indirect- group - smode))
-+ (comment (.str "m32c An indirect destination " smode))
-+ (attrs (machine 32))
-+ (mode dmode)
-+ (args ((.sym Dst32An group)))
-+ (syntax (.str "[$Dst32An" group "]"))
-+ (base-ifield (.sym f- base1 -6))
-+ (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Dst32An group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0)))
-+ (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group)
-+ (const 0)))
-+ (setter (c-call DFLT (.str "operand_setter_" dmode) newval
-+ (.sym Dst32An group) (const 0)))
-+; (getter (mem32 smode (.sym Dst32An group)))
-+; (setter (set (mem32 dmode (.sym Dst32An group)) newval))
-+ )
-+ )
-+)
-+
-+(dst32-An-indirect-operand Unprefixed 4 8 QI QI)
-+(dst32-An-indirect-operand Prefixed 12 16 QI QI)
-+(dst32-An-indirect-operand Unprefixed 4 8 HI HI)
-+(dst32-An-indirect-operand Prefixed 12 16 HI HI)
-+(dst32-An-indirect-operand Unprefixed 4 8 SI SI)
-+(dst32-An-indirect-operand Prefixed 12 16 SI SI)
-+(dst32-An-indirect-operand ExtUnprefixed 4 8 QI HI)
-+(dst32-An-indirect-operand ExtUnprefixed 4 8 HI SI)
-+
-+;-------------------------------------------------------------
-+; dsp:d[r] relative
-+;-------------------------------------------------------------
-+
-+(define-pmacro (dst16-relative-operand offset xmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym dst16- offset -8-SB-relative- xmode))
-+ (comment (.str "m16c dsp:8[sb] relative destination " xmode))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (args ((.sym Dsp- offset -u8)))
-+ (syntax (.str "${Dsp-" offset "-u8}[sb]"))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-4 #xA) (.sym Dsp- offset -u8)))
-+ (ifield-assertion (eq f-12-4 #xA))
-+ (getter (mem16 xmode (add (.sym Dsp- offset -u8) (reg h-sb))))
-+ (setter (set (mem16 xmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym dst16- offset -16-SB-relative- xmode))
-+ (comment (.str "m16c dsp:16[sb] relative destination " xmode))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (args ((.sym Dsp- offset -u16)))
-+ (syntax (.str "${Dsp-" offset "-u16}[sb]"))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-4 #xE) (.sym Dsp- offset -u16)))
-+ (ifield-assertion (eq f-12-4 #xE))
-+ (getter (mem16 xmode (add (.sym Dsp- offset -u16) (reg h-sb))))
-+ (setter (set (mem16 xmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym dst16- offset -8-FB-relative- xmode))
-+ (comment (.str "m16c dsp:8[fb] relative destination " xmode))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (args ((.sym Dsp- offset -s8)))
-+ (syntax (.str "${Dsp-" offset "-s8}[fb]"))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-4 #xB) (.sym Dsp- offset -s8)))
-+ (ifield-assertion (eq f-12-4 #xB))
-+ (getter (mem16 xmode (add (.sym Dsp- offset -s8) (reg h-fb))))
-+ (setter (set (mem16 xmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym dst16- offset -8-An-relative- xmode))
-+ (comment (.str "m16c dsp:8[An] relative destination " xmode))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (args (Dst16An (.sym Dsp- offset -u8)))
-+ (syntax (.str "${Dsp-" offset "-u8}[$Dst16An]"))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Dst16An))
-+ (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0)))
-+ (getter (mem16 xmode (add (.sym Dsp- offset -u8) Dst16An)))
-+ (setter (set (mem16 xmode (add (.sym Dsp- offset -u8) Dst16An)) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym dst16- offset -16-An-relative- xmode))
-+ (comment (.str "m16c dsp:16[An] relative destination " xmode))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (args (Dst16An (.sym Dsp- offset -u16)))
-+ (syntax (.str "${Dsp-" offset "-u16}[$Dst16An]"))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Dst16An))
-+ (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
-+ (getter (mem16 xmode (add (.sym Dsp- offset -u16) Dst16An)))
-+ (setter (set (mem16 xmode (add (.sym Dsp- offset -u16) Dst16An)) newval))
-+ )
-+ )
-+)
-+
-+(dst16-relative-operand 16 QI)
-+(dst16-relative-operand 24 QI)
-+(dst16-relative-operand 32 QI)
-+(dst16-relative-operand 40 QI)
-+(dst16-relative-operand 48 QI)
-+(dst16-relative-operand 16 HI)
-+(dst16-relative-operand 24 HI)
-+(dst16-relative-operand 32 HI)
-+(dst16-relative-operand 40 HI)
-+(dst16-relative-operand 48 HI)
-+(dst16-relative-operand 16 SI)
-+(dst16-relative-operand 24 SI)
-+(dst16-relative-operand 32 SI)
-+(dst16-relative-operand 40 SI)
-+(dst16-relative-operand 48 SI)
-+
-+(define-pmacro (dst16-relative-Ext-operand offset smode dmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym dst16- offset -8-SB-relative-Ext- smode))
-+ (comment (.str "m16c dsp:8[sb] relative destination " smode))
-+ (attrs (machine 16))
-+ (mode dmode)
-+ (args ((.sym Dsp- offset -u8)))
-+ (syntax (.str "${Dsp-" offset "-u8}[sb]"))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-4 #xA) (.sym Dsp- offset -u8)))
-+ (ifield-assertion (eq f-12-4 #xA))
-+ (getter (mem16 smode (add (.sym Dsp- offset -u8) (reg h-sb))))
-+ (setter (set (mem16 dmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym dst16- offset -16-SB-relative-Ext- smode))
-+ (comment (.str "m16c dsp:16[sb] relative destination " smode))
-+ (attrs (machine 16))
-+ (mode dmode)
-+ (args ((.sym Dsp- offset -u16)))
-+ (syntax (.str "${Dsp-" offset "-u16}[sb]"))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-4 #xE) (.sym Dsp- offset -u16)))
-+ (ifield-assertion (eq f-12-4 #xE))
-+ (getter (mem16 smode (add (.sym Dsp- offset -u16) (reg h-sb))))
-+ (setter (set (mem16 dmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym dst16- offset -8-FB-relative-Ext- smode))
-+ (comment (.str "m16c dsp:8[fb] relative destination " smode))
-+ (attrs (machine 16))
-+ (mode dmode)
-+ (args ((.sym Dsp- offset -s8)))
-+ (syntax (.str "${Dsp-" offset "-s8}[fb]"))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-4 #xB) (.sym Dsp- offset -s8)))
-+ (ifield-assertion (eq f-12-4 #xB))
-+ (getter (mem16 smode (add (.sym Dsp- offset -s8) (reg h-fb))))
-+ (setter (set (mem16 dmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym dst16- offset -8-An-relative-Ext- smode))
-+ (comment (.str "m16c dsp:8[An] relative destination " smode))
-+ (attrs (machine 16))
-+ (mode dmode)
-+ (args (Dst16An (.sym Dsp- offset -u8)))
-+ (syntax (.str "${Dsp-" offset "-u8}[$Dst16An]"))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Dst16An))
-+ (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0)))
-+ (getter (mem16 smode (add (.sym Dsp- offset -u8) Dst16An)))
-+ (setter (set (mem16 dmode (add (.sym Dsp- offset -u8) Dst16An)) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym dst16- offset -16-An-relative-Ext- smode))
-+ (comment (.str "m16c dsp:16[An] relative destination " smode))
-+ (attrs (machine 16))
-+ (mode dmode)
-+ (args (Dst16An (.sym Dsp- offset -u16)))
-+ (syntax (.str "${Dsp-" offset "-u16}[$Dst16An]"))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Dst16An))
-+ (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
-+ (getter (mem16 smode (add (.sym Dsp- offset -u16) Dst16An)))
-+ (setter (set (mem16 dmode (add (.sym Dsp- offset -u16) Dst16An)) newval))
-+ )
-+ )
-+)
-+
-+(dst16-relative-Ext-operand 16 QI HI)
-+
-+(define-pmacro (dst32-relative-operand offset group base1 base2 smode dmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym dst32- offset -8-SB-relative- group - smode))
-+ (comment (.str "m32c dsp:8[sb] relative destination " smode))
-+ (attrs (machine 32))
-+ (mode dmode)
-+ (args ((.sym Dsp- offset -u8)))
-+ (syntax (.str "${Dsp-" offset "-u8}[sb]"))
-+ (base-ifield (.sym f- base1 -6))
-+ (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u8)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2)))
-+ (getter (c-call dmode (.str "operand_getter_" dmode) sb (.sym Dsp- offset -u8)))
-+ (setter (c-call DFLT (.str "operand_setter_" dmode) newval sb (.sym Dsp- offset -u8)))
-+; (getter (mem32 smode (add (.sym Dsp- offset -u8) (reg h-sb))))
-+; (setter (set (mem32 dmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym dst32- offset -16-SB-relative- group - smode))
-+ (comment (.str "m32c dsp:16[sb] relative destination " smode))
-+ (attrs (machine 32))
-+ (mode dmode)
-+ (args ((.sym Dsp- offset -u16)))
-+ (syntax (.str "${Dsp-" offset "-u16}[sb]"))
-+ (base-ifield (.sym f- base1 -6))
-+ (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u16)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2)))
-+ (getter (c-call dmode (.str "operand_getter_" dmode) sb (.sym Dsp- offset -u16)))
-+ (setter (c-call DFLT (.str "operand_setter_" dmode) newval sb (.sym Dsp- offset -u16)))
-+; (getter (mem32 smode (add (.sym Dsp- offset -u16) (reg h-sb))))
-+; (setter (set (mem32 dmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym dst32- offset -8-FB-relative- group - smode))
-+ (comment (.str "m32c dsp:8[fb] relative destination " smode))
-+ (attrs (machine 32))
-+ (mode dmode)
-+ (args ((.sym Dsp- offset -s8)))
-+ (syntax (.str "${Dsp-" offset "-s8}[fb]"))
-+ (base-ifield (.sym f- base1 -6))
-+ (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s8)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3)))
-+ (getter (c-call dmode (.str "operand_getter_" dmode) fb (.sym Dsp- offset -s8)))
-+ (setter (c-call DFLT (.str "operand_setter_" dmode) newval fb (.sym Dsp- offset -s8)))
-+; (getter (mem32 smode (add (.sym Dsp- offset -s8) (reg h-fb))))
-+; (setter (set (mem32 dmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym dst32- offset -16-FB-relative- group - smode))
-+ (comment (.str "m32c dsp:16[fb] relative destination " smode))
-+ (attrs (machine 32))
-+ (mode dmode)
-+ (args ((.sym Dsp- offset -s16)))
-+ (syntax (.str "${Dsp-" offset "-s16}[fb]"))
-+ (base-ifield (.sym f- base1 -6))
-+ (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s16)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3)))
-+ (getter (c-call dmode (.str "operand_getter_" dmode) fb (.sym Dsp- offset -s16)))
-+ (setter (c-call DFLT (.str "operand_setter_" dmode) newval fb (.sym Dsp- offset -s16)))
-+; (getter (mem32 smode (add (.sym Dsp- offset -s16) (reg h-fb))))
-+; (setter (set (mem32 dmode (add (.sym Dsp- offset -s16) (reg h-fb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym dst32- offset -8-An-relative- group - smode))
-+ (comment (.str "m32c dsp:8[An] relative destination " smode))
-+ (attrs (machine 32))
-+ (mode dmode)
-+ (args ((.sym Dst32An group) (.sym Dsp- offset -u8)))
-+ (syntax (.str "${Dsp-" offset "-u8}[$Dst32An" group "]"))
-+ (base-ifield (.sym f- base1 -6))
-+ (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u8) (.sym Dst32An group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0)))
-+ (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u8)))
-+ (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u8)))
-+; (getter (mem32 smode (add (.sym Dsp- offset -u8) (.sym Dst32An group))))
-+; (setter (set (mem32 dmode (add (.sym Dsp- offset -u8) (.sym Dst32An group))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym dst32- offset -16-An-relative- group - smode))
-+ (comment (.str "m32c dsp:16[An] relative destination " smode))
-+ (attrs (machine 32))
-+ (mode dmode)
-+ (args ((.sym Dst32An group) (.sym Dsp- offset -u16)))
-+ (syntax (.str "${Dsp-" offset "-u16}[$Dst32An" group "]"))
-+ (base-ifield (.sym f- base1 -6))
-+ (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u16) (.sym Dst32An group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0)))
-+ (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u16)))
-+ (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u16)))
-+; (getter (mem32 smode (add (.sym Dsp- offset -u16) (.sym Dst32An group))))
-+; (setter (set (mem32 dmode (add (.sym Dsp- offset -u16) (.sym Dst32An group))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym dst32- offset -24-An-relative- group - smode))
-+ (comment (.str "m32c dsp:16[An] relative destination " smode))
-+ (attrs (machine 32))
-+ (mode dmode)
-+ (args ((.sym Dst32An group) (.sym Dsp- offset -u24)))
-+ (syntax (.str "${Dsp-" offset "-u24}[$Dst32An" group "]"))
-+ (base-ifield (.sym f- base1 -6))
-+ (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u24) (.sym Dst32An group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0)))
-+ (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u24)))
-+ (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u24)))
-+; (getter (mem32 smode (add (.sym Dsp- offset -u24) (.sym Dst32An group))))
-+; (setter (set (mem32 dmode (add (.sym Dsp- offset -u24) (.sym Dst32An group))) newval))
-+ )
-+ )
-+)
-+
-+(dst32-relative-operand 16 Unprefixed 4 8 QI QI)
-+(dst32-relative-operand 24 Unprefixed 4 8 QI QI)
-+(dst32-relative-operand 32 Unprefixed 4 8 QI QI)
-+(dst32-relative-operand 40 Unprefixed 4 8 QI QI)
-+(dst32-relative-operand 16 Unprefixed 4 8 HI HI)
-+(dst32-relative-operand 24 Unprefixed 4 8 HI HI)
-+(dst32-relative-operand 32 Unprefixed 4 8 HI HI)
-+(dst32-relative-operand 40 Unprefixed 4 8 HI HI)
-+(dst32-relative-operand 16 Unprefixed 4 8 SI SI)
-+(dst32-relative-operand 24 Unprefixed 4 8 SI SI)
-+(dst32-relative-operand 32 Unprefixed 4 8 SI SI)
-+(dst32-relative-operand 40 Unprefixed 4 8 SI SI)
-+
-+(dst32-relative-operand 24 Prefixed 12 16 QI QI)
-+(dst32-relative-operand 32 Prefixed 12 16 QI QI)
-+(dst32-relative-operand 40 Prefixed 12 16 QI QI)
-+(dst32-relative-operand 48 Prefixed 12 16 QI QI)
-+(dst32-relative-operand 24 Prefixed 12 16 HI HI)
-+(dst32-relative-operand 32 Prefixed 12 16 HI HI)
-+(dst32-relative-operand 40 Prefixed 12 16 HI HI)
-+(dst32-relative-operand 48 Prefixed 12 16 HI HI)
-+(dst32-relative-operand 24 Prefixed 12 16 SI SI)
-+(dst32-relative-operand 32 Prefixed 12 16 SI SI)
-+(dst32-relative-operand 40 Prefixed 12 16 SI SI)
-+(dst32-relative-operand 48 Prefixed 12 16 SI SI)
-+
-+(dst32-relative-operand 16 ExtUnprefixed 4 8 QI HI)
-+(dst32-relative-operand 16 ExtUnprefixed 4 8 HI SI)
-+
-+;-------------------------------------------------------------
-+; Absolute address
-+;-------------------------------------------------------------
-+
-+(define-pmacro (dst16-absolute offset xmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym dst16- offset -16-absolute- xmode))
-+ (comment (.str "m16c absolute address " xmode))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (args ((.sym Dsp- offset -u16)))
-+ (syntax (.str "${Dsp-" offset "-u16}"))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-4 #xF) (.sym Dsp- offset -u16)))
-+ (ifield-assertion (eq f-12-4 #xF))
-+ (getter (mem16 xmode (.sym Dsp- offset -u16)))
-+ (setter (set (mem16 xmode (.sym Dsp- offset -u16)) newval))
-+ )
-+ )
-+)
-+
-+(dst16-absolute 16 QI)
-+(dst16-absolute 24 QI)
-+(dst16-absolute 32 QI)
-+(dst16-absolute 40 QI)
-+(dst16-absolute 48 QI)
-+(dst16-absolute 16 HI)
-+(dst16-absolute 24 HI)
-+(dst16-absolute 32 HI)
-+(dst16-absolute 40 HI)
-+(dst16-absolute 48 HI)
-+(dst16-absolute 16 SI)
-+(dst16-absolute 24 SI)
-+(dst16-absolute 32 SI)
-+(dst16-absolute 40 SI)
-+(dst16-absolute 48 SI)
-+
-+(define-derived-operand
-+ (name dst16-16-16-absolute-Ext-QI)
-+ (comment "m16c absolute address QI")
-+ (attrs (machine 16))
-+ (mode HI)
-+ (args (Dsp-16-u16))
-+ (syntax "${Dsp-16-u16}")
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-4 #xF) Dsp-16-u16))
-+ (ifield-assertion (eq f-12-4 #xF))
-+ (getter (mem16 QI Dsp-16-u16))
-+ (setter (set (mem16 HI Dsp-16-u16) newval))
-+)
-+
-+(define-pmacro (dst32-absolute offset group base1 base2 smode dmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym dst32- offset -16-absolute- group - smode))
-+ (comment (.str "m32c absolute address " smode))
-+ (attrs (machine 32))
-+ (mode dmode)
-+ (args ((.sym Dsp- offset -u16)))
-+ (syntax (.str "${Dsp-" offset "-u16}"))
-+ (base-ifield (.sym f- base1 -6))
-+ (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
-+ (getter (c-call smode (.str "operand_getter_" smode) (const 0) (.sym Dsp- offset -u16)))
-+ (setter (c-call DFLT (.str "operand_setter_" dmode) newval (const 0) (.sym Dsp- offset -u16)))
-+; (getter (mem32 smode (.sym Dsp- offset -u16)))
-+; (setter (set (mem32 dmode (.sym Dsp- offset -u16)) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym dst32- offset -24-absolute- group - smode))
-+ (comment (.str "m32c absolute address " smode))
-+ (attrs (machine 32))
-+ (mode dmode)
-+ (args ((.sym Dsp- offset -u24)))
-+ (syntax (.str "${Dsp-" offset "-u24}"))
-+ (base-ifield (.sym f- base1 -6))
-+ (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
-+ (getter (c-call smode (.str "operand_getter_" smode) (const 0) (.sym Dsp- offset -u24)))
-+ (setter (c-call DFLT (.str "operand_setter_" dmode) newval (const 0) (.sym Dsp- offset -u24)))
-+; (getter (mem32 smode (.sym Dsp- offset -u24)))
-+; (setter (set (mem32 dmode (.sym Dsp- offset -u24)) newval))
-+ )
-+ )
-+)
-+
-+(dst32-absolute 16 Unprefixed 4 8 QI QI)
-+(dst32-absolute 24 Unprefixed 4 8 QI QI)
-+(dst32-absolute 32 Unprefixed 4 8 QI QI)
-+(dst32-absolute 40 Unprefixed 4 8 QI QI)
-+(dst32-absolute 16 Unprefixed 4 8 HI HI)
-+(dst32-absolute 24 Unprefixed 4 8 HI HI)
-+(dst32-absolute 32 Unprefixed 4 8 HI HI)
-+(dst32-absolute 40 Unprefixed 4 8 HI HI)
-+(dst32-absolute 16 Unprefixed 4 8 SI SI)
-+(dst32-absolute 24 Unprefixed 4 8 SI SI)
-+(dst32-absolute 32 Unprefixed 4 8 SI SI)
-+(dst32-absolute 40 Unprefixed 4 8 SI SI)
-+
-+(dst32-absolute 24 Prefixed 12 16 QI QI)
-+(dst32-absolute 32 Prefixed 12 16 QI QI)
-+(dst32-absolute 40 Prefixed 12 16 QI QI)
-+(dst32-absolute 48 Prefixed 12 16 QI QI)
-+(dst32-absolute 24 Prefixed 12 16 HI HI)
-+(dst32-absolute 32 Prefixed 12 16 HI HI)
-+(dst32-absolute 40 Prefixed 12 16 HI HI)
-+(dst32-absolute 48 Prefixed 12 16 HI HI)
-+(dst32-absolute 24 Prefixed 12 16 SI SI)
-+(dst32-absolute 32 Prefixed 12 16 SI SI)
-+(dst32-absolute 40 Prefixed 12 16 SI SI)
-+(dst32-absolute 48 Prefixed 12 16 SI SI)
-+
-+(dst32-absolute 16 ExtUnprefixed 4 8 QI HI)
-+(dst32-absolute 16 ExtUnprefixed 4 8 HI SI)
-+
-+;-------------------------------------------------------------
-+; An indirect indirect
-+;-------------------------------------------------------------
-+
-+;(define-pmacro (dst-An-indirect-indirect-operand xmode)
-+; (define-derived-operand
-+; (name (.sym dst32-An-indirect-indirect- xmode))
-+; (comment (.str "m32c An indirect indirect destination " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args (Dst32AnPrefixed))
-+; (syntax (.str "[[$Dst32AnPrefixed]]"))
-+; (base-ifield f-12-6)
-+; (encoding (+ (f-12-3 0) (f-16-1 0) Dst32AnPrefixed))
-+; (ifield-assertion (andif (eq f-12-3 0) (eq f-16-1 0)))
-+; (getter (mem32 xmode (indirect-addr Dst32AnPrefixed)))
-+; (setter (set (mem32 xmode (indirect-addr Dst32AnPrefixed)) newval))
-+; )
-+;)
-+
-+; (dst-An-indirect-indirect-operand QI)
-+; (dst-An-indirect-indirect-operand HI)
-+; (dst-An-indirect-indirect-operand SI)
-+
-+;-------------------------------------------------------------
-+; Relative indirect
-+;-------------------------------------------------------------
-+
-+(define-pmacro (dst-relative-indirect-operand offset xmode)
-+ (begin
-+; (define-derived-operand
-+; (name (.sym dst32- offset -8-SB-relative-indirect- xmode))
-+; (comment (.str "m32c dsp:8[sb] relative destination " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args ((.sym Dsp- offset -u8)))
-+; (syntax (.str "[${Dsp-" offset "-u8}[sb]]"))
-+; (base-ifield f-12-6)
-+; (encoding (+ (f-12-3 1) (f-16-2 2) (.sym Dsp- offset -u8)))
-+; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-2 2)))
-+; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) (reg h-sb)))))
-+; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) (reg h-sb)))) newval))
-+; )
-+; (define-derived-operand
-+; (name (.sym dst32- offset -16-SB-relative-indirect- xmode))
-+; (comment (.str "m32c dsp:16[sb] relative destination " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args ((.sym Dsp- offset -u16)))
-+; (syntax (.str "[${Dsp-" offset "-u16}[sb]]"))
-+; (base-ifield f-12-6)
-+; (encoding (+ (f-12-3 2) (f-16-2 2) (.sym Dsp- offset -u16)))
-+; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-2 2)))
-+; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) (reg h-sb)))))
-+; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) (reg h-sb)))) newval))
-+; )
-+; (define-derived-operand
-+; (name (.sym dst32- offset -8-FB-relative-indirect- xmode))
-+; (comment (.str "m32c dsp:8[fb] relative destination " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args ((.sym Dsp- offset -s8)))
-+; (syntax (.str "[${Dsp-" offset "-s8}[fb]]"))
-+; (base-ifield f-12-6)
-+; (encoding (+ (f-12-3 1) (f-16-2 3) (.sym Dsp- offset -s8)))
-+; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-2 3)))
-+; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s8) (reg h-fb)))))
-+; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s8) (reg h-fb)))) newval))
-+; )
-+; (define-derived-operand
-+; (name (.sym dst32- offset -16-FB-relative-indirect- xmode))
-+; (comment (.str "m32c dsp:16[fb] relative destination " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args ((.sym Dsp- offset -s16)))
-+; (syntax (.str "[${Dsp-" offset "-s16}[fb]]"))
-+; (base-ifield f-12-6)
-+; (encoding (+ (f-12-3 2) (f-16-2 3) (.sym Dsp- offset -s16)))
-+; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-2 3)))
-+; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s16) (reg h-fb)))))
-+; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s16) (reg h-fb)))) newval))
-+; )
-+; (define-derived-operand
-+; (name (.sym dst32- offset -8-An-relative-indirect- xmode))
-+; (comment (.str "m32c dsp:8[An] relative indirect destination " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args (Dst32AnPrefixed (.sym Dsp- offset -u8)))
-+; (syntax (.str "[${Dsp-" offset "-u8}[$Dst32AnPrefixed]]"))
-+; (base-ifield f-12-6)
-+; (encoding (+ (f-12-3 1) (f-16-1 0) (.sym Dsp- offset -u8) Dst32AnPrefixed))
-+; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-1 0)))
-+; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) Dst32AnPrefixed))))
-+; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) Dst32AnPrefixed))) newval))
-+; )
-+; (define-derived-operand
-+; (name (.sym dst32- offset -16-An-relative-indirect- xmode))
-+; (comment (.str "m32c dsp:16[An] relative destination " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args (Dst32AnPrefixed (.sym Dsp- offset -u16)))
-+; (syntax (.str "[${Dsp-" offset "-u16}[$Dst32AnPrefixed]]"))
-+; (base-ifield f-12-6)
-+; (encoding (+ (f-12-3 2) (f-16-1 0) (.sym Dsp- offset -u16) Dst32AnPrefixed))
-+; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-1 0)))
-+; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) Dst32AnPrefixed))))
-+; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) Dst32AnPrefixed))) newval))
-+; )
-+; (define-derived-operand
-+; (name (.sym dst32- offset -24-An-relative-indirect- xmode))
-+; (comment (.str "m32c dsp:24[An] relative destination " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args (Dst32AnPrefixed (.sym Dsp- offset -u24)))
-+; (syntax (.str "[${Dsp-" offset "-u24}[$Dst32AnPrefixed]]"))
-+; (base-ifield f-12-6)
-+; (encoding (+ (f-12-3 3) (f-16-1 0) (.sym Dsp- offset -u24) Dst32AnPrefixed))
-+; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-1 0)))
-+; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u24) Dst32AnPrefixed))))
-+; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u24) Dst32AnPrefixed))) newval))
-+; )
-+ )
-+)
-+
-+; (dst-relative-indirect-operand 24 QI)
-+; (dst-relative-indirect-operand 32 QI)
-+; (dst-relative-indirect-operand 40 QI)
-+; (dst-relative-indirect-operand 48 QI)
-+; (dst-relative-indirect-operand 24 HI)
-+; (dst-relative-indirect-operand 32 HI)
-+; (dst-relative-indirect-operand 40 HI)
-+; (dst-relative-indirect-operand 48 HI)
-+; (dst-relative-indirect-operand 24 SI)
-+; (dst-relative-indirect-operand 32 SI)
-+; (dst-relative-indirect-operand 40 SI)
-+; (dst-relative-indirect-operand 48 SI)
-+
-+;-------------------------------------------------------------
-+; Absolute indirect
-+;-------------------------------------------------------------
-+
-+(define-pmacro (dst-absolute-indirect offset xmode)
-+ (begin
-+; (define-derived-operand
-+; (name (.sym dst32- offset -16-absolute-indirect-derived- xmode))
-+; (comment (.str "m32c absolute indirect address " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args ((.sym Dsp- offset -u16)))
-+; (syntax (.str "[${Dsp-" offset "-u16}]"))
-+; (base-ifield f-12-6)
-+; (encoding (+ (f-12-3 3) (f-16-2 3) (.sym Dsp- offset -u16)))
-+; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-2 3)))
-+; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))))
-+; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))) newval))
-+; )
-+; (define-derived-operand
-+; (name (.sym dst32- offset -24-absolute-indirect-derived- xmode))
-+; (comment (.str "m32c absolute indirect address " xmode))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args ((.sym Dsp- offset -u24)))
-+; (syntax (.str "[${Dsp-" offset "-u24}]"))
-+; (base-ifield f-12-6)
-+; (encoding (+ (f-12-3 3) (f-16-2 2) (.sym Dsp- offset -u24)))
-+; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-2 2)))
-+; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))))
-+; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))) newval))
-+; )
-+ )
-+)
-+
-+(dst-absolute-indirect 24 QI)
-+(dst-absolute-indirect 32 QI)
-+(dst-absolute-indirect 40 QI)
-+(dst-absolute-indirect 48 QI)
-+(dst-absolute-indirect 24 HI)
-+(dst-absolute-indirect 32 HI)
-+(dst-absolute-indirect 40 HI)
-+(dst-absolute-indirect 48 HI)
-+(dst-absolute-indirect 24 SI)
-+(dst-absolute-indirect 32 SI)
-+(dst-absolute-indirect 40 SI)
-+(dst-absolute-indirect 48 SI)
-+
-+;-------------------------------------------------------------
-+; Bit operands
-+;-------------------------------------------------------------
-+(define-pmacro (get-register-bit reg bitno)
-+ (and (srl reg bitno) 1)
-+)
-+
-+(define-pmacro (set-register-bit reg bitno value)
-+ (set reg (or (and reg (inv (sll 1 bitno)))
-+ (sll (and QI value 1) bitno)))
-+)
-+
-+(define-pmacro (get-memory-bit mach base bitno)
-+ (and (srl (mem-mach mach QI (add base (div bitno 8)))
-+ (mod bitno 8))
-+ 1)
-+)
-+
-+(define-pmacro (set-memory-bit mach base bitno value)
-+ (sequence ((USI addr))
-+ (set addr (add base (div bitno 8)))
-+ (set (mem-mach mach QI addr)
-+ (or (and (mem-mach mach QI addr)
-+ (inv (sll 1 (mod bitno 8))))
-+ (sll (and QI value 1) (mod bitno 8)))))
-+)
-+
-+;-------------------------------------------------------------
-+; Rn direct
-+;-------------------------------------------------------------
-+
-+(define-derived-operand
-+ (name bit16-Rn-direct)
-+ (comment "m16c Rn direct bit")
-+ (attrs (machine 16))
-+ (mode BI)
-+ (args (Bitno16R Bit16Rn))
-+ (syntax "$Bitno16R,$Bit16Rn")
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-2 0) Bit16Rn Bitno16R))
-+ (ifield-assertion (eq f-12-2 0))
-+ (getter (get-register-bit Bit16Rn Bitno16R))
-+ (setter (set-register-bit Bit16Rn Bitno16R newval))
-+)
-+
-+(define-pmacro (bit32-Rn-direct-operand group base)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym bit32-Rn-direct- group))
-+ (comment "m32c Rn direct bit")
-+ (attrs (machine 32))
-+ (mode BI)
-+ (args ((.sym Bitno32 group) (.sym Bit32Rn group)))
-+ (syntax (.str "$Bitno32" group ",$Bit32Rn" group))
-+ (base-ifield (.sym f- base -6))
-+ (encoding (+ ((.sym f- base -3) 4) (.sym Bit32Rn group) (.sym Bitno32 group)))
-+ (ifield-assertion (eq (.sym f- base -3) 4))
-+ (getter (get-register-bit (.sym Bit32Rn group) (.sym Bitno32 group)))
-+ (setter (set-register-bit (.sym Bit32Rn group) (.sym Bitno32 group) newval))
-+ )
-+ )
-+)
-+
-+(bit32-Rn-direct-operand Unprefixed 4)
-+(bit32-Rn-direct-operand Prefixed 12)
-+
-+;-------------------------------------------------------------
-+; An direct
-+;-------------------------------------------------------------
-+
-+(define-derived-operand
-+ (name bit16-An-direct)
-+ (comment "m16c An direct bit")
-+ (attrs (machine 16))
-+ (mode BI)
-+ (args (Bitno16R Bit16An))
-+ (syntax "$Bitno16R,$Bit16An")
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-2 1) (f-14-1 0) Bit16An Bitno16R))
-+ (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 0)))
-+ (getter (get-register-bit Bit16An Bitno16R))
-+ (setter (set-register-bit Bit16An Bitno16R newval))
-+)
-+
-+(define-pmacro (bit32-An-direct-operand group base1 base2)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym bit32-An-direct- group))
-+ (comment "m32c An direct bit")
-+ (attrs (machine 32))
-+ (mode BI)
-+ (args ((.sym Bitno32 group) (.sym Bit32An group)))
-+ (syntax (.str "$Bitno32" group ",$Bit32An" group))
-+ (base-ifield (.sym f- base1 -6))
-+ (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Bit32An group) (.sym Bitno32 group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1)))
-+ (getter (get-register-bit (.sym Bit32An group) (.sym Bitno32 group)))
-+ (setter (set-register-bit (.sym Bit32An group) (.sym Bitno32 group) newval))
-+ )
-+ )
-+)
-+
-+(bit32-An-direct-operand Unprefixed 4 8)
-+(bit32-An-direct-operand Prefixed 12 16)
-+
-+;-------------------------------------------------------------
-+; An indirect
-+;-------------------------------------------------------------
-+
-+(define-derived-operand
-+ (name bit16-An-indirect)
-+ (comment "m16c An indirect bit")
-+ (attrs (machine 16))
-+ (mode BI)
-+ (args (Bit16An))
-+ (syntax "[$Bit16An]")
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-2 1) (f-14-1 1) Bit16An))
-+ (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1)))
-+ (getter (get-memory-bit 16 0 Bit16An))
-+ (setter (set-memory-bit 16 0 Bit16An newval))
-+)
-+
-+(define-pmacro (bit32-An-indirect-operand group base1 base2)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym bit32-An-indirect- group))
-+ (comment "m32c An indirect destination ")
-+ (attrs (machine 32))
-+ (mode BI)
-+ (args ((.sym Bitno32 group) (.sym Bit32An group)))
-+ (syntax (.str "$Bitno32" group ",[$Bit32An" group "]"))
-+ (base-ifield (.sym f- base1 -6))
-+ (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Bit32An group) (.sym Bitno32 group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0)))
-+ (getter (get-memory-bit 32 (.sym Bit32An group) (.sym Bitno32 group)))
-+ (setter (set-memory-bit 32 (.sym Bit32An group) (.sym Bitno32 group) newval))
-+ )
-+ )
-+)
-+
-+(bit32-An-indirect-operand Unprefixed 4 8)
-+(bit32-An-indirect-operand Prefixed 12 16)
-+
-+;-------------------------------------------------------------
-+; dsp:d[r] relative
-+;-------------------------------------------------------------
-+
-+(define-pmacro (bit16-relative-operand offset)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym bit16- offset -8-SB-relative))
-+ (comment (.str "m16c dsp:8[sb] relative bit " xmode))
-+ (attrs (machine 16))
-+ (mode BI)
-+ (args ((.sym BitBase16- offset -u8)))
-+ (syntax (.str "${BitBase16-" offset "-u8}[sb]"))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-4 #xA) (.sym BitBase16- offset -u8)))
-+ (ifield-assertion (eq f-12-4 #xA))
-+ (getter (get-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u8)))
-+ (setter (set-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u8) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym bit16- offset -16-SB-relative))
-+ (comment (.str "m16c dsp:16[sb] relative bit " xmode))
-+ (attrs (machine 16))
-+ (mode BI)
-+ (args ((.sym BitBase16- offset -u16)))
-+ (syntax (.str "${BitBase16-" offset "-u16}[sb]"))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-4 #xE) (.sym BitBase16- offset -u16)))
-+ (ifield-assertion (eq f-12-4 #xE))
-+ (getter (get-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u16)))
-+ (setter (set-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u16) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym bit16- offset -8-FB-relative))
-+ (comment (.str "m16c dsp:8[fb] relative bit " xmode))
-+ (attrs (machine 16))
-+ (mode BI)
-+ (args ((.sym BitBase16- offset -s8)))
-+ (syntax (.str "${BitBase16-" offset "-s8}[fb]"))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-4 #xB) (.sym BitBase16- offset -s8)))
-+ (ifield-assertion (eq f-12-4 #xB))
-+ (getter (get-memory-bit 16 (reg h-fb) (.sym BitBase16- offset -s8)))
-+ (setter (set-memory-bit 16 (reg h-fb) (.sym BitBase16- offset -s8) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym bit16- offset -8-An-relative))
-+ (comment (.str "m16c dsp:8[An] relative bit " xmode))
-+ (attrs (machine 16))
-+ (mode BI)
-+ (args (Bit16An (.sym Dsp- offset -u8)))
-+ (syntax (.str "${Dsp-" offset "-u8}[$Bit16An]"))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Bit16An))
-+ (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0)))
-+ (getter (get-memory-bit 16 (.sym Dsp- offset -u8) Bit16An))
-+ (setter (set-memory-bit 16 (.sym Dsp- offset -u8) Bit16An newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym bit16- offset -16-An-relative))
-+ (comment (.str "m16c dsp:16[An] relative bit " xmode))
-+ (attrs (machine 16))
-+ (mode BI)
-+ (args (Bit16An (.sym Dsp- offset -u16)))
-+ (syntax (.str "${Dsp-" offset "-u16}[$Bit16An]"))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Bit16An))
-+ (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
-+ (getter (get-memory-bit 16 (.sym Dsp- offset -u16) Bit16An))
-+ (setter (set-memory-bit 16 (.sym Dsp- offset -u16) Bit16An newval))
-+ )
-+ )
-+)
-+
-+(bit16-relative-operand 16)
-+
-+(define-pmacro (bit32-relative-operand offset group base1 base2)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym bit32- offset -11-SB-relative- group))
-+ (comment "m32c bit,base:11[sb] relative bit")
-+ (attrs (machine 32))
-+ (mode BI)
-+ (args ((.sym BitBase32- offset -u11- group)))
-+ (syntax (.str "${BitBase32-" offset "-u11-" group "}[sb]"))
-+ (base-ifield (.sym f- base1 -12))
-+ (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u11- group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2)))
-+ (getter (get-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u11- group)))
-+ (setter (set-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u11- group) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym bit32- offset -19-SB-relative- group))
-+ (comment "m32c bit,base:19[sb] relative bit")
-+ (attrs (machine 32))
-+ (mode BI)
-+ (args ((.sym BitBase32- offset -u19- group)))
-+ (syntax (.str "${BitBase32-" offset "-u19-" group "}[sb]"))
-+ (base-ifield (.sym f- base1 -12))
-+ (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u19- group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2)))
-+ (getter (get-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u19- group)))
-+ (setter (set-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u19- group) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym bit32- offset -11-FB-relative- group))
-+ (comment "m32c bit,base:11[fb] relative bit")
-+ (attrs (machine 32))
-+ (mode BI)
-+ (args ((.sym BitBase32- offset -s11- group)))
-+ (syntax (.str "${BitBase32-" offset "-s11-" group "}[fb]"))
-+ (base-ifield (.sym f- base1 -12))
-+ (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -s11- group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3)))
-+ (getter (get-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s11- group)))
-+ (setter (set-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s11- group) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym bit32- offset -19-FB-relative- group))
-+ (comment "m32c bit,base:19[fb] relative bit")
-+ (attrs (machine 32))
-+ (mode BI)
-+ (args ((.sym BitBase32- offset -s19- group)))
-+ (syntax (.str "${BitBase32-" offset "-s19-" group "}[fb]"))
-+ (base-ifield (.sym f- base1 -12))
-+ (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -s19- group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3)))
-+ (getter (get-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s19- group)))
-+ (setter (set-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s19- group) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym bit32- offset -11-An-relative- group))
-+ (comment "m32c bit,base:11[An] relative bit")
-+ (attrs (machine 32))
-+ (mode BI)
-+ (args ((.sym BitBase32- offset -u11- group) (.sym Bit32An group)))
-+ (syntax (.str "${BitBase32-" offset "-u11-" group "}[$Bit32An" group "]"))
-+ (base-ifield (.sym f- base1 -12))
-+ (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u11- group) (.sym Bit32An group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0)))
-+ (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u11- group)))
-+ (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u11- group) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym bit32- offset -19-An-relative- group))
-+ (comment "m32c bit,base:19[An] relative bit")
-+ (attrs (machine 32))
-+ (mode BI)
-+ (args ((.sym BitBase32- offset -u19- group) (.sym Bit32An group)))
-+ (syntax (.str "${BitBase32-" offset "-u19-" group "}[$Bit32An" group "]"))
-+ (base-ifield (.sym f- base1 -12))
-+ (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u19- group) (.sym Bit32An group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0)))
-+ (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u19- group)))
-+ (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u19- group) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym bit32- offset -27-An-relative- group))
-+ (comment "m32c bit,base:27[An] relative bit")
-+ (attrs (machine 32))
-+ (mode BI)
-+ (args ((.sym BitBase32- offset -u27- group) (.sym Bit32An group)))
-+ (syntax (.str "${BitBase32-" offset "-u27-" group "}[$Bit32An" group "]"))
-+ (base-ifield (.sym f- base1 -12))
-+ (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u27- group) (.sym Bit32An group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0)))
-+ (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u27- group)))
-+ (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u27- group) newval))
-+ )
-+ )
-+)
-+
-+(bit32-relative-operand 16 Unprefixed 4 8)
-+(bit32-relative-operand 24 Prefixed 12 16)
-+
-+(define-derived-operand
-+ (name bit16-11-SB-relative-S)
-+ (comment "m16c bit,base:11[sb] relative bit")
-+ (attrs (machine 16))
-+ (mode BI)
-+ (args (BitBase16-8-u11-S))
-+ (syntax "${BitBase16-8-u11-S}[sb]")
-+ (base-ifield (.sym f-5-3))
-+ (encoding (+ BitBase16-8-u11-S))
-+; (ifield-assertion (#t))
-+ (getter (get-memory-bit 16 (reg h-sb) BitBase16-8-u11-S))
-+ (setter (set-memory-bit 16 (reg h-sb) BitBase16-8-u11-S newval))
-+)
-+
-+(define-derived-operand
-+ (name Rn16-push-S-derived)
-+ (comment "m16c r0[lh] for push,pop short version")
-+ (attrs (machine 16))
-+ (mode QI)
-+ (args (Rn16-push-S))
-+ (syntax "${Rn16-push-S}")
-+ (base-ifield (.sym f-4-1))
-+ (encoding (+ Rn16-push-S))
-+; (ifield-assertion (#t))
-+ (getter (trunc QI Rn16-push-S))
-+ (setter (set Rn16-push-S newval))
-+)
-+
-+(define-derived-operand
-+ (name An16-push-S-derived)
-+ (comment "m16c r0[lh] for push,pop short version")
-+ (attrs (machine 16))
-+ (mode HI)
-+ (args (An16-push-S))
-+ (syntax "${An16-push-S}")
-+ (base-ifield (.sym f-4-1))
-+ (encoding (+ An16-push-S))
-+; (ifield-assertion (#t))
-+ (getter (trunc QI An16-push-S))
-+ (setter (set An16-push-S newval))
-+)
-+
-+;-------------------------------------------------------------
-+; Absolute address
-+;-------------------------------------------------------------
-+
-+(define-pmacro (bit16-absolute offset)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym bit16- offset -16-absolute))
-+ (comment "m16c absolute address")
-+ (attrs (machine 16))
-+ (mode BI)
-+ (args ((.sym BitBase16- offset -u16)))
-+ (syntax (.str "${BitBase16-" offset "-u16}"))
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-4 #xF) (.sym BitBase16- offset -u16)))
-+ (ifield-assertion (eq f-12-4 #xF))
-+ (getter (get-memory-bit 16 0 (.sym BitBase16- offset -u16)))
-+ (setter (set-memory-bit 16 0 (.sym BitBase16- offset -u16) newval))
-+ )
-+ )
-+)
-+
-+(bit16-absolute 16)
-+
-+(define-pmacro (bit32-absolute offset group base1 base2)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym bit32- offset -19-absolute- group))
-+ (comment "m32c absolute address bit")
-+ (attrs (machine 32))
-+ (mode BI)
-+ (args ((.sym BitBase32- offset -u19- group)))
-+ (syntax (.str "${BitBase32-" offset "-u19-" group "}"))
-+ (base-ifield (.sym f- base1 -12))
-+ (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -u19- group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
-+ (getter (get-memory-bit 32 0 (.sym BitBase32- offset -u19- group)))
-+ (setter (set-memory-bit 32 0 (.sym BitBase32- offset -u19- group) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym bit32- offset -27-absolute- group))
-+ (comment "m32c absolute address bit")
-+ (attrs (machine 32))
-+ (mode BI)
-+ (args ((.sym BitBase32- offset -u27- group)))
-+ (syntax (.str "${BitBase32-" offset "-u27-" group "}"))
-+ (base-ifield (.sym f- base1 -12))
-+ (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u27- group)))
-+ (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
-+ (getter (get-memory-bit 32 0 (.sym BitBase32- offset -u27- group)))
-+ (setter (set-memory-bit 32 0 (.sym BitBase32- offset -u27- group) newval))
-+ )
-+ )
-+)
-+
-+(bit32-absolute 16 Unprefixed 4 8)
-+(bit32-absolute 24 Prefixed 12 16)
-+
-+;-------------------------------------------------------------
-+; Destination operands for short fomat insns
-+;-------------------------------------------------------------
-+
-+(define-derived-operand
-+ (name dst16-3-S-R0l-direct-QI)
-+ (comment "m16c R0l direct QI")
-+ (attrs (machine 16))
-+ (mode QI)
-+ (args (R0l))
-+ (syntax "r0l")
-+ (base-ifield f-5-3)
-+ (encoding (+ (f-5-3 4)))
-+ (ifield-assertion (eq f-5-3 4))
-+ (getter (trunc QI R0l))
-+ (setter (set R0l newval))
-+)
-+(define-derived-operand
-+ (name dst16-3-S-R0h-direct-QI)
-+ (comment "m16c R0h direct QI")
-+ (attrs (machine 16))
-+ (mode QI)
-+ (args (R0h))
-+ (syntax "r0h")
-+ (base-ifield f-5-3)
-+ (encoding (+ (f-5-3 3)))
-+ (ifield-assertion (eq f-5-3 3))
-+ (getter (trunc QI R0h))
-+ (setter (set R0h newval))
-+)
-+(define-derived-operand
-+ (name dst16-3-S-8-8-SB-relative-QI)
-+ (comment "m16c SB relative QI")
-+ (attrs (machine 16))
-+ (mode QI)
-+ (args (Dsp-8-u8))
-+ (syntax "${Dsp-8-u8}[sb]")
-+ (base-ifield f-5-3)
-+ (encoding (+ (f-5-3 5) Dsp-8-u8))
-+ (ifield-assertion (eq f-5-3 5))
-+ (getter (mem16 QI (add Dsp-8-u8 (reg h-sb))))
-+ (setter (set (mem16 QI (add Dsp-8-u8 (reg h-sb))) newval))
-+)
-+(define-derived-operand
-+ (name dst16-3-S-8-8-FB-relative-QI)
-+ (comment "m16c FB relative QI")
-+ (attrs (machine 16))
-+ (mode QI)
-+ (args (Dsp-8-s8))
-+ (syntax "${Dsp-8-s8}[fb]")
-+ (base-ifield f-5-3)
-+ (encoding (+ (f-5-3 6) Dsp-8-s8))
-+ (ifield-assertion (eq f-5-3 6))
-+ (getter (mem16 QI (add Dsp-8-s8 (reg h-fb))))
-+ (setter (set (mem16 QI (add Dsp-8-s8 (reg h-fb))) newval))
-+)
-+(define-derived-operand
-+ (name dst16-3-S-8-16-absolute-QI)
-+ (comment "m16c absolute address QI")
-+ (attrs (machine 16))
-+ (mode QI)
-+ (args (Dsp-8-u16))
-+ (syntax "${Dsp-8-u16}")
-+ (base-ifield f-5-3)
-+ (encoding (+ (f-5-3 7) Dsp-8-u16))
-+ (ifield-assertion (eq f-5-3 7))
-+ (getter (mem16 QI Dsp-8-u16))
-+ (setter (set (mem16 QI Dsp-8-u16) newval))
-+)
-+(define-derived-operand
-+ (name dst16-3-S-16-8-SB-relative-QI)
-+ (comment "m16c SB relative QI")
-+ (attrs (machine 16))
-+ (mode QI)
-+ (args (Dsp-16-u8))
-+ (syntax "${Dsp-16-u8}[sb]")
-+ (base-ifield f-5-3)
-+ (encoding (+ (f-5-3 5) Dsp-16-u8))
-+ (ifield-assertion (eq f-5-3 5))
-+ (getter (mem16 QI (add Dsp-16-u8 (reg h-sb))))
-+ (setter (set (mem16 QI (add Dsp-16-u8 (reg h-sb))) newval))
-+)
-+(define-derived-operand
-+ (name dst16-3-S-16-8-FB-relative-QI)
-+ (comment "m16c FB relative QI")
-+ (attrs (machine 16))
-+ (mode QI)
-+ (args (Dsp-16-s8))
-+ (syntax "${Dsp-16-s8}[fb]")
-+ (base-ifield f-5-3)
-+ (encoding (+ (f-5-3 6) Dsp-16-s8))
-+ (ifield-assertion (eq f-5-3 6))
-+ (getter (mem16 QI (add Dsp-16-s8 (reg h-fb))))
-+ (setter (set (mem16 QI (add Dsp-16-s8 (reg h-fb))) newval))
-+)
-+(define-derived-operand
-+ (name dst16-3-S-16-16-absolute-QI)
-+ (comment "m16c absolute address QI")
-+ (attrs (machine 16))
-+ (mode QI)
-+ (args (Dsp-16-u16))
-+ (syntax "${Dsp-16-u16}")
-+ (base-ifield f-5-3)
-+ (encoding (+ (f-5-3 7) Dsp-16-u16))
-+ (ifield-assertion (eq f-5-3 7))
-+ (getter (mem16 QI Dsp-16-u16))
-+ (setter (set (mem16 QI Dsp-16-u16) newval))
-+)
-+(define-derived-operand
-+ (name srcdst16-r0l-r0h-S-derived)
-+ (comment "m16c r0l/r0h operand for short format insns")
-+ (attrs (machine 16))
-+ (mode SI)
-+ (args (SrcDst16-r0l-r0h-S-normal))
-+ (syntax "${SrcDst16-r0l-r0h-S-normal}")
-+ (base-ifield f-6-3)
-+ (encoding (+ (f-6-2 0) SrcDst16-r0l-r0h-S-normal))
-+ (ifield-assertion (eq f-6-2 0))
-+ (getter (trunc SI SrcDst16-r0l-r0h-S-normal))
-+ (setter ()) ; no setter
-+)
-+(define-derived-operand
-+ (name dst32-2-S-R0l-direct-QI)
-+ (comment "m32c R0l direct QI")
-+ (attrs (machine 32))
-+ (mode QI)
-+ (args (R0l))
-+ (syntax "r0l")
-+ (base-ifield f-2-2)
-+ (encoding (+ (f-2-2 0)))
-+ (ifield-assertion (eq f-2-2 0))
-+ (getter (trunc QI R0l))
-+ (setter (set R0l newval))
-+)
-+(define-derived-operand
-+ (name dst32-2-S-R0-direct-HI)
-+ (comment "m32c R0 direct HI")
-+ (attrs (machine 32))
-+ (mode HI)
-+ (args (R0))
-+ (syntax "r0")
-+ (base-ifield f-2-2)
-+ (encoding (+ (f-2-2 0)))
-+ (ifield-assertion (eq f-2-2 0))
-+ (getter (trunc HI R0))
-+ (setter (set R0 newval))
-+)
-+(define-derived-operand
-+ (name dst32-1-S-A0-direct-HI)
-+ (comment "m32c A0 direct HI")
-+ (attrs (machine 32))
-+ (mode HI)
-+ (args (A0))
-+ (syntax "a0")
-+ (base-ifield f-7-1)
-+ (encoding (+ (f-7-1 0)))
-+ (ifield-assertion (eq f-7-1 0))
-+ (getter (trunc HI A0))
-+ (setter (set A0 newval))
-+)
-+(define-derived-operand
-+ (name dst32-1-S-A1-direct-HI)
-+ (comment "m32c A1 direct HI")
-+ (attrs (machine 32))
-+ (mode HI)
-+ (args (A1))
-+ (syntax "a1")
-+ (base-ifield f-7-1)
-+ (encoding (+ (f-7-1 1)))
-+ (ifield-assertion (eq f-7-1 1))
-+ (getter (trunc HI A1))
-+ (setter (set A1 newval))
-+)
-+(define-pmacro (dst32-2-S-operands xmode)
-+ (begin
-+ (define-derived-operand
-+ (name (.sym dst32-2-S-8-SB-relative- xmode))
-+ (comment "m32c SB relative for short binary insns")
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (args (Dsp-8-u8))
-+ (syntax "${Dsp-8-u8}[sb]")
-+ (base-ifield f-2-2)
-+ (encoding (+ (f-2-2 2) Dsp-8-u8))
-+ (ifield-assertion (eq f-2-2 2))
-+ (getter (c-call xmode (.str "operand_getter_" xmode) sb Dsp-8-u8))
-+ (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb Dsp-8-u8))
-+; (getter (mem32 xmode (add Dsp-8-u8 (reg h-sb))))
-+; (setter (set (mem32 xmode (add Dsp-8-u8 (reg h-sb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym dst32-2-S-8-FB-relative- xmode))
-+ (comment "m32c FB relative for short binary insns")
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (args (Dsp-8-s8))
-+ (syntax "${Dsp-8-s8}[fb]")
-+ (base-ifield f-2-2)
-+ (encoding (+ (f-2-2 3) Dsp-8-s8))
-+ (ifield-assertion (eq f-2-2 3))
-+ (getter (c-call xmode (.str "operand_getter_" xmode) fb Dsp-8-s8))
-+ (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb Dsp-8-s8))
-+; (getter (mem32 xmode (add Dsp-8-s8 (reg h-fb))))
-+; (setter (set (mem32 xmode (add Dsp-8-s8 (reg h-fb))) newval))
-+ )
-+ (define-derived-operand
-+ (name (.sym dst32-2-S-16-absolute- xmode))
-+ (comment "m32c absolute address for short binary insns")
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (args (Dsp-8-u16))
-+ (syntax "${Dsp-8-u16}")
-+ (base-ifield f-2-2)
-+ (encoding (+ (f-2-2 1) Dsp-8-u16))
-+ (ifield-assertion (eq f-2-2 1))
-+ (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) Dsp-8-u16))
-+ (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) Dsp-8-u16))
-+; (getter (mem32 xmode Dsp-8-u16))
-+; (setter (set (mem32 xmode Dsp-8-u16) newval))
-+ )
-+; (define-derived-operand
-+; (name (.sym dst32-2-S-8-SB-relative-indirect- xmode))
-+; (comment "m32c SB relative for short binary insns")
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args (Dsp-16-u8))
-+; (syntax "[${Dsp-16-u8}[sb]]")
-+; (base-ifield f-10-2)
-+; (encoding (+ (f-10-2 2) Dsp-16-u8))
-+; (ifield-assertion (eq f-10-2 2))
-+; (getter (mem32 xmode (indirect-addr (add Dsp-16-u8 (reg h-sb)))))
-+; (setter (set (mem32 xmode (indirect-addr (add Dsp-16-u8 (reg h-sb)))) newval))
-+; )
-+; (define-derived-operand
-+; (name (.sym dst32-2-S-8-FB-relative-indirect- xmode))
-+; (comment "m32c FB relative for short binary insns")
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args (Dsp-16-s8))
-+; (syntax "[${Dsp-16-s8}[fb]]")
-+; (base-ifield f-10-2)
-+; (encoding (+ (f-10-2 3) Dsp-16-s8))
-+; (ifield-assertion (eq f-10-2 3))
-+; (getter (mem32 xmode (indirect-addr (add Dsp-16-s8 (reg h-fb)))))
-+; (setter (set (mem32 xmode (indirect-addr (add Dsp-16-s8 (reg h-fb)))) newval))
-+; )
-+; (define-derived-operand
-+; (name (.sym dst32-2-S-16-absolute-indirect- xmode))
-+; (comment "m32c absolute address for short binary insns")
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (args (Dsp-16-u16))
-+; (syntax "[${Dsp-16-u16}]")
-+; (base-ifield f-10-2)
-+; (encoding (+ (f-10-2 1) Dsp-16-u16))
-+; (ifield-assertion (eq f-10-2 1))
-+; (getter (mem32 xmode (indirect-addr Dsp-16-u16)))
-+; (setter (set (mem32 xmode (indirect-addr Dsp-16-u16)) newval))
-+; )
-+ )
-+)
-+
-+(dst32-2-S-operands QI)
-+(dst32-2-S-operands HI)
-+(dst32-2-S-operands SI)
-+
-+;=============================================================
-+; Anyof operands
-+;-------------------------------------------------------------
-+; Source operands with no additional fields
-+;-------------------------------------------------------------
-+
-+(define-pmacro (src16-basic-operand xmode)
-+ (begin
-+ (define-anyof-operand
-+ (name (.sym src16-basic- xmode))
-+ (comment (.str "m16c source operand of size " xmode " with no additional fields"))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (choices
-+ (.sym src16-Rn-direct- xmode)
-+ (.sym src16-An-direct- xmode)
-+ (.sym src16-An-indirect- xmode)
-+ )
-+ )
-+ )
-+)
-+(src16-basic-operand QI)
-+(src16-basic-operand HI)
-+
-+(define-pmacro (src32-basic-operand xmode)
-+ (begin
-+ (define-anyof-operand
-+ (name (.sym src32-basic-Unprefixed- xmode))
-+ (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym src32-Rn-direct-Unprefixed- xmode)
-+ (.sym src32-An-direct-Unprefixed- xmode)
-+ (.sym src32-An-indirect-Unprefixed- xmode)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym src32-basic-Prefixed- xmode))
-+ (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym src32-Rn-direct-Prefixed- xmode)
-+ (.sym src32-An-direct-Prefixed- xmode)
-+ (.sym src32-An-indirect-Prefixed- xmode)
-+ )
-+ )
-+; (define-anyof-operand
-+; (name (.sym src32-basic-indirect- xmode))
-+; (comment (.str "m32c destination operand of size " xmode " indirect with no additional fields"))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym src32-An-indirect-indirect- xmode)
-+; )
-+; )
-+ )
-+)
-+
-+(src32-basic-operand QI)
-+(src32-basic-operand HI)
-+(src32-basic-operand SI)
-+
-+(define-anyof-operand
-+ (name src32-basic-ExtPrefixed-QI)
-+ (comment "m32c source operand of size QI with no additional fields")
-+ (attrs (machine 32))
-+ (mode QI)
-+ (choices
-+ src32-Rn-direct-Prefixed-QI
-+ src32-An-indirect-Prefixed-QI
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+; Source operands with additional fields at offset 16 bits
-+;-------------------------------------------------------------
-+
-+(define-pmacro (src16-16-operand xmode)
-+ (begin
-+ (define-anyof-operand
-+ (name (.sym src16-16-8- xmode))
-+ (comment (.str "m16c source operand of size " xmode " with additional 8 bit fields at offset 16"))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (choices
-+ (.sym src16-16-8-An-relative- xmode)
-+ (.sym src16-16-8-SB-relative- xmode)
-+ (.sym src16-16-8-FB-relative- xmode)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym src16-16-16- xmode))
-+ (comment (.str "m16c source operand of size " xmode " with additional 16 bit fields at offset 16"))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (choices
-+ (.sym src16-16-16-An-relative- xmode)
-+ (.sym src16-16-16-SB-relative- xmode)
-+ (.sym src16-16-16-absolute- xmode)
-+ )
-+ )
-+ )
-+)
-+(src16-16-operand QI)
-+(src16-16-operand HI)
-+
-+(define-pmacro (src32-16-operand xmode)
-+ (begin
-+ (define-anyof-operand
-+ (name (.sym src32-16-8-Unprefixed- xmode))
-+ (comment (.str "m32c source operand of size " xmode " with additional 8 bit fields at offset 16"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym src32-16-8-An-relative-Unprefixed- xmode)
-+ (.sym src32-16-8-SB-relative-Unprefixed- xmode)
-+ (.sym src32-16-8-FB-relative-Unprefixed- xmode)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym src32-16-16-Unprefixed- xmode))
-+ (comment (.str "m32c source operand of size " xmode " with additional 16 bit fields at offset 16"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym src32-16-16-An-relative-Unprefixed- xmode)
-+ (.sym src32-16-16-SB-relative-Unprefixed- xmode)
-+ (.sym src32-16-16-FB-relative-Unprefixed- xmode)
-+ (.sym src32-16-16-absolute-Unprefixed- xmode)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym src32-16-24-Unprefixed- xmode))
-+ (comment (.str "m32c source operand of size " xmode " with additional 24 bit fields at offset 16"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym src32-16-24-An-relative-Unprefixed- xmode)
-+ (.sym src32-16-24-absolute-Unprefixed- xmode)
-+ )
-+ )
-+ )
-+)
-+
-+(src32-16-operand QI)
-+(src32-16-operand HI)
-+(src32-16-operand SI)
-+
-+;-------------------------------------------------------------
-+; Source operands with additional fields at offset 24 bits
-+;-------------------------------------------------------------
-+
-+(define-pmacro (src-24-operand group xmode)
-+ (begin
-+ (define-anyof-operand
-+ (name (.sym src32-24-8- group - xmode))
-+ (comment (.str "m32c source operand of size " xmode " with additional 8 bit fields at offset 24"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym src32-24-8-An-relative- group - xmode)
-+ (.sym src32-24-8-SB-relative- group - xmode)
-+ (.sym src32-24-8-FB-relative- group - xmode)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym src32-24-16- group - xmode))
-+ (comment (.str "m32c source operand of size " xmode " with additional 16 bit fields at offset 16"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym src32-24-16-An-relative- group - xmode)
-+ (.sym src32-24-16-SB-relative- group - xmode)
-+ (.sym src32-24-16-FB-relative- group - xmode)
-+ (.sym src32-24-16-absolute- group - xmode)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym src32-24-24- group - xmode))
-+ (comment (.str "m32c source operand of size " xmode " with additional 24 bit fields at offset 16"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym src32-24-24-An-relative- group - xmode)
-+ (.sym src32-24-24-absolute- group - xmode)
-+ )
-+ )
-+ )
-+)
-+
-+(src-24-operand Prefixed QI)
-+(src-24-operand Prefixed HI)
-+(src-24-operand Prefixed SI)
-+
-+(define-pmacro (src-24-indirect-operand xmode)
-+ (begin
-+; (define-anyof-operand
-+; (name (.sym src32-24-8-indirect- xmode))
-+; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym src32-24-8-An-relative-indirect- xmode)
-+; (.sym src32-24-8-SB-relative-indirect- xmode)
-+; (.sym src32-24-8-FB-relative-indirect- xmode)
-+; )
-+; )
-+; (define-anyof-operand
-+; (name (.sym src32-24-16-indirect- xmode))
-+; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym src32-24-16-An-relative-indirect- xmode)
-+; (.sym src32-24-16-SB-relative-indirect- xmode)
-+; (.sym src32-24-16-FB-relative-indirect- xmode)
-+; )
-+; )
-+; (define-anyof-operand
-+; (name (.sym src32-24-24-indirect- xmode))
-+; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym src32-24-24-An-relative-indirect- xmode)
-+; )
-+; )
-+; (define-anyof-operand
-+; (name (.sym src32-24-16-absolute-indirect- xmode))
-+; (comment (.str "m32c source operand of size " xmode " 16 bit absolute indirect"))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym src32-24-16-absolute-indirect-derived- xmode)
-+; )
-+; )
-+; (define-anyof-operand
-+; (name (.sym src32-24-24-absolute-indirect- xmode))
-+; (comment (.str "m32c source operand of size " xmode " 24 bit absolute indirect"))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym src32-24-24-absolute-indirect-derived- xmode)
-+; )
-+; )
-+ )
-+)
-+
-+; (src-24-indirect-operand QI)
-+; (src-24-indirect-operand HI)
-+; (src-24-indirect-operand SI)
-+
-+;-------------------------------------------------------------
-+; Destination operands with no additional fields
-+;-------------------------------------------------------------
-+
-+(define-pmacro (dst16-basic-operand xmode)
-+ (begin
-+ (define-anyof-operand
-+ (name (.sym dst16-basic- xmode))
-+ (comment (.str "m16c destination operand of size " xmode " with no additional fields"))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (choices
-+ (.sym dst16-Rn-direct- xmode)
-+ (.sym dst16-An-direct- xmode)
-+ (.sym dst16-An-indirect- xmode)
-+ )
-+ )
-+ )
-+)
-+
-+(dst16-basic-operand QI)
-+(dst16-basic-operand HI)
-+(dst16-basic-operand SI)
-+
-+(define-pmacro (dst32-basic-operand xmode)
-+ (begin
-+ (define-anyof-operand
-+ (name (.sym dst32-basic-Unprefixed- xmode))
-+ (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym dst32-Rn-direct-Unprefixed- xmode)
-+ (.sym dst32-An-direct-Unprefixed- xmode)
-+ (.sym dst32-An-indirect-Unprefixed- xmode)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym dst32-basic-Prefixed- xmode))
-+ (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym dst32-Rn-direct-Prefixed- xmode)
-+ (.sym dst32-An-direct-Prefixed- xmode)
-+ (.sym dst32-An-indirect-Prefixed- xmode)
-+ )
-+ )
-+ )
-+)
-+
-+(dst32-basic-operand QI)
-+(dst32-basic-operand HI)
-+(dst32-basic-operand SI)
-+
-+;-------------------------------------------------------------
-+; Destination operands with possible additional fields at offset 16 bits
-+;-------------------------------------------------------------
-+
-+(define-pmacro (dst16-16-operand xmode)
-+ (begin
-+ (define-anyof-operand
-+ (name (.sym dst16-16- xmode))
-+ (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (choices
-+ (.sym dst16-Rn-direct- xmode)
-+ (.sym dst16-An-direct- xmode)
-+ (.sym dst16-An-indirect- xmode)
-+ (.sym dst16-16-8-An-relative- xmode)
-+ (.sym dst16-16-16-An-relative- xmode)
-+ (.sym dst16-16-8-SB-relative- xmode)
-+ (.sym dst16-16-16-SB-relative- xmode)
-+ (.sym dst16-16-8-FB-relative- xmode)
-+ (.sym dst16-16-16-absolute- xmode)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym dst16-16-8- xmode))
-+ (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (choices
-+ (.sym dst16-16-8-An-relative- xmode)
-+ (.sym dst16-16-8-SB-relative- xmode)
-+ (.sym dst16-16-8-FB-relative- xmode)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym dst16-16-16- xmode))
-+ (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (choices
-+ (.sym dst16-16-16-An-relative- xmode)
-+ (.sym dst16-16-16-SB-relative- xmode)
-+ (.sym dst16-16-16-absolute- xmode)
-+ )
-+ )
-+ )
-+)
-+
-+(dst16-16-operand QI)
-+(dst16-16-operand HI)
-+(dst16-16-operand SI)
-+
-+(define-anyof-operand
-+ (name dst16-16-Ext-QI)
-+ (comment "m16c destination operand of size QI for 'ext' insns with additional fields at offset 16")
-+ (attrs (machine 16))
-+ (mode QI)
-+ (choices
-+ dst16-Rn-direct-Ext-QI
-+ dst16-An-indirect-Ext-QI
-+ dst16-16-8-An-relative-Ext-QI
-+ dst16-16-16-An-relative-Ext-QI
-+ dst16-16-8-SB-relative-Ext-QI
-+ dst16-16-16-SB-relative-Ext-QI
-+ dst16-16-8-FB-relative-Ext-QI
-+ dst16-16-16-absolute-Ext-QI
-+ )
-+)
-+
-+(define-derived-operand
-+ (name dst16-An-indirect-Mova-HI)
-+ (comment "m16c addressof An indirect destination HI")
-+ (attrs (ISA m16c))
-+ (mode HI)
-+ (args (Dst16An))
-+ (syntax "[$Dst16An]")
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An))
-+ (ifield-assertion
-+ (andif (eq f-12-2 1) (eq f-14-1 1)))
-+ (getter Dst16An)
-+ (setter (nop))
-+ )
-+
-+(define-derived-operand
-+ (name dst16-16-8-An-relative-Mova-HI)
-+ (comment
-+ "m16c addressof dsp:8[An] relative destination HI")
-+ (attrs (ISA m16c))
-+ (mode HI)
-+ (args (Dst16An Dsp-16-u8))
-+ (syntax "${Dsp-16-u8}[$Dst16An]")
-+ (base-ifield f-12-4)
-+ (encoding
-+ (+ (f-12-2 2) (f-14-1 0) Dsp-16-u8 Dst16An))
-+ (ifield-assertion
-+ (andif (eq f-12-2 2) (eq f-14-1 0)))
-+ (getter (add Dsp-16-u8 Dst16An))
-+ (setter (nop))
-+)
-+(define-derived-operand
-+ (name dst16-16-16-An-relative-Mova-HI)
-+ (comment
-+ "m16c addressof dsp:16[An] relative destination HI")
-+ (attrs (ISA m16c))
-+ (mode HI)
-+ (args (Dst16An Dsp-16-u16))
-+ (syntax "${Dsp-16-u16}[$Dst16An]")
-+ (base-ifield f-12-4)
-+ (encoding
-+ (+ (f-12-2 3) (f-14-1 0) Dsp-16-u16 Dst16An))
-+ (ifield-assertion
-+ (andif (eq f-12-2 3) (eq f-14-1 0)))
-+ (getter (add Dsp-16-u16 Dst16An))
-+ (setter (nop))
-+ )
-+(define-derived-operand
-+ (name dst16-16-8-SB-relative-Mova-HI)
-+ (comment
-+ "m16c addressof dsp:8[sb] relative destination HI")
-+ (attrs (ISA m16c))
-+ (mode HI)
-+ (args (Dsp-16-u8))
-+ (syntax "${Dsp-16-u8}[sb]")
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-4 10) Dsp-16-u8))
-+ (ifield-assertion (eq f-12-4 10))
-+ (getter (add Dsp-16-u8 (reg h-sb)))
-+ (setter (nop))
-+)
-+(define-derived-operand
-+ (name dst16-16-16-SB-relative-Mova-HI)
-+ (comment
-+ "m16c addressof dsp:16[sb] relative destination HI")
-+ (attrs (ISA m16c))
-+ (mode HI)
-+ (args (Dsp-16-u16))
-+ (syntax "${Dsp-16-u16}[sb]")
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-4 14) Dsp-16-u16))
-+ (ifield-assertion (eq f-12-4 14))
-+ (getter (add Dsp-16-u16 (reg h-sb)))
-+ (setter (nop))
-+ )
-+(define-derived-operand
-+ (name dst16-16-8-FB-relative-Mova-HI)
-+ (comment
-+ "m16c addressof dsp:8[fb] relative destination HI")
-+ (attrs (ISA m16c))
-+ (mode HI)
-+ (args (Dsp-16-s8))
-+ (syntax "${Dsp-16-s8}[fb]")
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-4 11) Dsp-16-s8))
-+ (ifield-assertion (eq f-12-4 11))
-+ (getter (add Dsp-16-s8 (reg h-fb)))
-+ (setter (nop))
-+ )
-+(define-derived-operand
-+ (name dst16-16-16-absolute-Mova-HI)
-+ (comment "m16c addressof absolute address HI")
-+ (attrs (ISA m16c))
-+ (mode HI)
-+ (args (Dsp-16-u16))
-+ (syntax "${Dsp-16-u16}")
-+ (base-ifield f-12-4)
-+ (encoding (+ (f-12-4 15) Dsp-16-u16))
-+ (ifield-assertion (eq f-12-4 15))
-+ (getter Dsp-16-u16)
-+ (setter (nop))
-+ )
-+
-+(define-anyof-operand
-+ (name dst16-16-Mova-HI)
-+ (comment "m16c addressof destination operand of size HI with additional fields at offset 16")
-+ (attrs (machine 16))
-+ (mode HI)
-+ (choices
-+ dst16-An-indirect-Mova-HI
-+ dst16-16-8-An-relative-Mova-HI
-+ dst16-16-16-An-relative-Mova-HI
-+ dst16-16-8-SB-relative-Mova-HI
-+ dst16-16-16-SB-relative-Mova-HI
-+ dst16-16-8-FB-relative-Mova-HI
-+ dst16-16-16-absolute-Mova-HI
-+ )
-+)
-+
-+(define-derived-operand
-+ (name dst32-An-indirect-Unprefixed-Mova-SI)
-+ (comment "m32c addressof An indirect destination SI")
-+ (attrs (ISA m32c))
-+ (mode SI)
-+ (args (Dst32AnUnprefixed))
-+ (syntax "[$Dst32AnUnprefixed]")
-+ (base-ifield f-4-6)
-+ (encoding
-+ (+ (f-4-3 0) (f-8-1 0) Dst32AnUnprefixed))
-+ (ifield-assertion
-+ (andif (eq f-4-3 0) (eq f-8-1 0)))
-+ (getter Dst32AnUnprefixed)
-+ (setter (nop))
-+ )
-+
-+(define-derived-operand
-+ (name dst32-16-8-An-relative-Unprefixed-Mova-SI)
-+ (comment "m32c addressof dsp:8[An] relative destination SI")
-+ (attrs (ISA m32c))
-+ (mode SI)
-+ (args (Dst32AnUnprefixed Dsp-16-u8))
-+ (syntax "${Dsp-16-u8}[$Dst32AnUnprefixed]")
-+ (base-ifield f-4-6)
-+ (encoding
-+ (+ (f-4-3 1)
-+ (f-8-1 0)
-+ Dsp-16-u8
-+ Dst32AnUnprefixed))
-+ (ifield-assertion
-+ (andif (eq f-4-3 1) (eq f-8-1 0)))
-+ (getter (add Dsp-16-u8 Dst32AnUnprefixed))
-+ (setter (nop))
-+)
-+
-+(define-derived-operand
-+ (name dst32-16-16-An-relative-Unprefixed-Mova-SI)
-+ (comment
-+ "m32c addressof dsp:16[An] relative destination SI")
-+ (attrs (ISA m32c))
-+ (mode SI)
-+ (args (Dst32AnUnprefixed Dsp-16-u16))
-+ (syntax "${Dsp-16-u16}[$Dst32AnUnprefixed]")
-+ (base-ifield f-4-6)
-+ (encoding
-+ (+ (f-4-3 2)
-+ (f-8-1 0)
-+ Dsp-16-u16
-+ Dst32AnUnprefixed))
-+ (ifield-assertion
-+ (andif (eq f-4-3 2) (eq f-8-1 0)))
-+ (getter (add Dsp-16-u16 Dst32AnUnprefixed))
-+ (setter (nop))
-+ )
-+
-+(define-derived-operand
-+ (name dst32-16-24-An-relative-Unprefixed-Mova-SI)
-+ (comment "addressof m32c dsp:16[An] relative destination SI")
-+ (attrs (ISA m32c))
-+ (mode SI)
-+ (args (Dst32AnUnprefixed Dsp-16-u24))
-+ (syntax "${Dsp-16-u24}[$Dst32AnUnprefixed]")
-+ (base-ifield f-4-6)
-+ (encoding
-+ (+ (f-4-3 3)
-+ (f-8-1 0)
-+ Dsp-16-u24
-+ Dst32AnUnprefixed))
-+ (ifield-assertion
-+ (andif (eq f-4-3 3) (eq f-8-1 0)))
-+ (getter (add Dsp-16-u24 Dst32AnUnprefixed))
-+ (setter (nop))
-+ )
-+
-+(define-derived-operand
-+ (name dst32-16-8-SB-relative-Unprefixed-Mova-SI)
-+ (comment "m32c addressof dsp:8[sb] relative destination SI")
-+ (attrs (ISA m32c))
-+ (mode SI)
-+ (args (Dsp-16-u8))
-+ (syntax "${Dsp-16-u8}[sb]")
-+ (base-ifield f-4-6)
-+ (encoding (+ (f-4-3 1) (f-8-2 2) Dsp-16-u8))
-+ (ifield-assertion
-+ (andif (eq f-4-3 1) (eq f-8-2 2)))
-+ (getter (add Dsp-16-u8 (reg h-sb)))
-+ (setter (nop))
-+ )
-+
-+(define-derived-operand
-+ (name dst32-16-16-SB-relative-Unprefixed-Mova-SI)
-+ (comment "m32c addressof dsp:16[sb] relative destination SI")
-+ (attrs (ISA m32c))
-+ (mode SI)
-+ (args (Dsp-16-u16))
-+ (syntax "${Dsp-16-u16}[sb]")
-+ (base-ifield f-4-6)
-+ (encoding (+ (f-4-3 2) (f-8-2 2) Dsp-16-u16))
-+ (ifield-assertion
-+ (andif (eq f-4-3 2) (eq f-8-2 2)))
-+ (getter (add Dsp-16-u16 (reg h-sb)))
-+ (setter (nop))
-+ )
-+
-+(define-derived-operand
-+ (name dst32-16-8-FB-relative-Unprefixed-Mova-SI)
-+ (comment "m32c addressof dsp:8[fb] relative destination SI")
-+ (attrs (ISA m32c))
-+ (mode SI)
-+ (args (Dsp-16-s8))
-+ (syntax "${Dsp-16-s8}[fb]")
-+ (base-ifield f-4-6)
-+ (encoding (+ (f-4-3 1) (f-8-2 3) Dsp-16-s8))
-+ (ifield-assertion
-+ (andif (eq f-4-3 1) (eq f-8-2 3)))
-+ (getter (add Dsp-16-s8 (reg h-fb)))
-+ (setter (nop))
-+ )
-+
-+(define-derived-operand
-+ (name dst32-16-16-FB-relative-Unprefixed-Mova-SI)
-+ (comment "m32c addressof dsp:16[fb] relative destination SI")
-+ (attrs (ISA m32c))
-+ (mode SI)
-+ (args (Dsp-16-s16))
-+ (syntax "${Dsp-16-s16}[fb]")
-+ (base-ifield f-4-6)
-+ (encoding (+ (f-4-3 2) (f-8-2 3) Dsp-16-s16))
-+ (ifield-assertion
-+ (andif (eq f-4-3 2) (eq f-8-2 3)))
-+ (getter (add Dsp-16-s16 (reg h-fb)))
-+ (setter (nop))
-+ )
-+
-+(define-derived-operand
-+ (name dst32-16-16-absolute-Unprefixed-Mova-SI)
-+ (comment "m32c addressof absolute address SI") (attrs (ISA m32c))
-+ (mode SI)
-+ (args (Dsp-16-u16))
-+ (syntax "${Dsp-16-u16}")
-+ (base-ifield f-4-6)
-+ (encoding (+ (f-4-3 3) (f-8-2 3) Dsp-16-u16))
-+ (ifield-assertion
-+ (andif (eq f-4-3 3) (eq f-8-2 3)))
-+ (getter Dsp-16-u16)
-+ (setter (nop))
-+ )
-+
-+(define-derived-operand
-+ (name dst32-16-24-absolute-Unprefixed-Mova-SI)
-+ (comment "m32c addressof absolute address SI") (attrs (ISA m32c))
-+ (mode SI)
-+ (args (Dsp-16-u24))
-+ (syntax "${Dsp-16-u24}")
-+ (base-ifield f-4-6)
-+ (encoding (+ (f-4-3 3) (f-8-2 2) Dsp-16-u24))
-+ (ifield-assertion
-+ (andif (eq f-4-3 3) (eq f-8-2 2)))
-+ (getter Dsp-16-u24)
-+ (setter (nop))
-+ )
-+
-+(define-anyof-operand
-+ (name dst32-16-Unprefixed-Mova-SI)
-+ (comment
-+ "m32c addressof destination operand of size SI with additional fields at offset 16")
-+ (attrs (ISA m32c))
-+ (mode SI)
-+ (choices
-+ dst32-An-indirect-Unprefixed-Mova-SI
-+ dst32-16-8-An-relative-Unprefixed-Mova-SI
-+ dst32-16-16-An-relative-Unprefixed-Mova-SI
-+ dst32-16-24-An-relative-Unprefixed-Mova-SI
-+ dst32-16-8-SB-relative-Unprefixed-Mova-SI
-+ dst32-16-16-SB-relative-Unprefixed-Mova-SI
-+ dst32-16-8-FB-relative-Unprefixed-Mova-SI
-+ dst32-16-16-FB-relative-Unprefixed-Mova-SI
-+ dst32-16-16-absolute-Unprefixed-Mova-SI
-+ dst32-16-24-absolute-Unprefixed-Mova-SI))
-+
-+(define-pmacro (dst32-16-operand xmode)
-+ (begin
-+ (define-anyof-operand
-+ (name (.sym dst32-16-Unprefixed- xmode))
-+ (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym dst32-Rn-direct-Unprefixed- xmode)
-+ (.sym dst32-An-direct-Unprefixed- xmode)
-+ (.sym dst32-An-indirect-Unprefixed- xmode)
-+ (.sym dst32-16-8-An-relative-Unprefixed- xmode)
-+ (.sym dst32-16-16-An-relative-Unprefixed- xmode)
-+ (.sym dst32-16-24-An-relative-Unprefixed- xmode)
-+ (.sym dst32-16-8-SB-relative-Unprefixed- xmode)
-+ (.sym dst32-16-16-SB-relative-Unprefixed- xmode)
-+ (.sym dst32-16-8-FB-relative-Unprefixed- xmode)
-+ (.sym dst32-16-16-FB-relative-Unprefixed- xmode)
-+ (.sym dst32-16-16-absolute-Unprefixed- xmode)
-+ (.sym dst32-16-24-absolute-Unprefixed- xmode)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym dst32-16-8-Unprefixed- xmode))
-+ (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym dst32-16-8-An-relative-Unprefixed- xmode)
-+ (.sym dst32-16-8-SB-relative-Unprefixed- xmode)
-+ (.sym dst32-16-8-FB-relative-Unprefixed- xmode)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym dst32-16-16-Unprefixed- xmode))
-+ (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym dst32-16-16-An-relative-Unprefixed- xmode)
-+ (.sym dst32-16-16-SB-relative-Unprefixed- xmode)
-+ (.sym dst32-16-16-FB-relative-Unprefixed- xmode)
-+ (.sym dst32-16-16-absolute-Unprefixed- xmode)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym dst32-16-24-Unprefixed- xmode))
-+ (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym dst32-16-24-An-relative-Unprefixed- xmode)
-+ (.sym dst32-16-24-absolute-Unprefixed- xmode)
-+ )
-+ )
-+ )
-+)
-+
-+(dst32-16-operand QI)
-+(dst32-16-operand HI)
-+(dst32-16-operand SI)
-+
-+(define-pmacro (dst32-16-Ext-operand smode dmode)
-+ (begin
-+ (define-anyof-operand
-+ (name (.sym dst32-16-ExtUnprefixed- smode))
-+ (comment (.str "m32c destination operand of size " smode " with additional fields at offset 16"))
-+ (attrs (machine 32))
-+ (mode dmode)
-+ (choices
-+ (.sym dst32-Rn-direct-ExtUnprefixed- smode)
-+ (.sym dst32-An-direct-Unprefixed- dmode) ; ExtUnprefixed mode not required for this operand -- use the normal dmode version
-+ (.sym dst32-An-indirect-ExtUnprefixed- smode)
-+ (.sym dst32-16-8-An-relative-ExtUnprefixed- smode)
-+ (.sym dst32-16-16-An-relative-ExtUnprefixed- smode)
-+ (.sym dst32-16-24-An-relative-ExtUnprefixed- smode)
-+ (.sym dst32-16-8-SB-relative-ExtUnprefixed- smode)
-+ (.sym dst32-16-16-SB-relative-ExtUnprefixed- smode)
-+ (.sym dst32-16-8-FB-relative-ExtUnprefixed- smode)
-+ (.sym dst32-16-16-FB-relative-ExtUnprefixed- smode)
-+ (.sym dst32-16-16-absolute-ExtUnprefixed- smode)
-+ (.sym dst32-16-24-absolute-ExtUnprefixed- smode)
-+ )
-+ )
-+ )
-+)
-+
-+(dst32-16-Ext-operand QI HI)
-+(dst32-16-Ext-operand HI SI)
-+
-+(define-anyof-operand
-+ (name dst32-16-Unprefixed-Mulex-HI)
-+ (comment "m32c destination operand of size HI with additional fields at offset 16")
-+ (attrs (machine 32))
-+ (mode HI)
-+ (choices
-+ dst32-R3-direct-Unprefixed-HI
-+ dst32-An-direct-Unprefixed-HI
-+ dst32-An-indirect-Unprefixed-HI
-+ dst32-16-8-An-relative-Unprefixed-HI
-+ dst32-16-16-An-relative-Unprefixed-HI
-+ dst32-16-24-An-relative-Unprefixed-HI
-+ dst32-16-8-SB-relative-Unprefixed-HI
-+ dst32-16-16-SB-relative-Unprefixed-HI
-+ dst32-16-8-FB-relative-Unprefixed-HI
-+ dst32-16-16-FB-relative-Unprefixed-HI
-+ dst32-16-16-absolute-Unprefixed-HI
-+ dst32-16-24-absolute-Unprefixed-HI
-+ )
-+)
-+;-------------------------------------------------------------
-+; Destination operands with possible additional fields at offset 24 bits
-+;-------------------------------------------------------------
-+
-+(define-pmacro (dst16-24-operand xmode)
-+ (begin
-+ (define-anyof-operand
-+ (name (.sym dst16-24- xmode))
-+ (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 24"))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (choices
-+ (.sym dst16-Rn-direct- xmode)
-+ (.sym dst16-An-direct- xmode)
-+ (.sym dst16-An-indirect- xmode)
-+ (.sym dst16-24-8-An-relative- xmode)
-+ (.sym dst16-24-16-An-relative- xmode)
-+ (.sym dst16-24-8-SB-relative- xmode)
-+ (.sym dst16-24-16-SB-relative- xmode)
-+ (.sym dst16-24-8-FB-relative- xmode)
-+ (.sym dst16-24-16-absolute- xmode)
-+ )
-+ )
-+ )
-+)
-+
-+(dst16-24-operand QI)
-+(dst16-24-operand HI)
-+
-+(define-pmacro (dst32-24-operand xmode)
-+ (begin
-+ (define-anyof-operand
-+ (name (.sym dst32-24-Unprefixed- xmode))
-+ (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym dst32-Rn-direct-Unprefixed- xmode)
-+ (.sym dst32-An-direct-Unprefixed- xmode)
-+ (.sym dst32-An-indirect-Unprefixed- xmode)
-+ (.sym dst32-24-8-An-relative-Unprefixed- xmode)
-+ (.sym dst32-24-16-An-relative-Unprefixed- xmode)
-+ (.sym dst32-24-24-An-relative-Unprefixed- xmode)
-+ (.sym dst32-24-8-SB-relative-Unprefixed- xmode)
-+ (.sym dst32-24-16-SB-relative-Unprefixed- xmode)
-+ (.sym dst32-24-8-FB-relative-Unprefixed- xmode)
-+ (.sym dst32-24-16-FB-relative-Unprefixed- xmode)
-+ (.sym dst32-24-16-absolute-Unprefixed- xmode)
-+ (.sym dst32-24-24-absolute-Unprefixed- xmode)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym dst32-24-Prefixed- xmode))
-+ (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym dst32-Rn-direct-Prefixed- xmode)
-+ (.sym dst32-An-direct-Prefixed- xmode)
-+ (.sym dst32-An-indirect-Prefixed- xmode)
-+ (.sym dst32-24-8-An-relative-Prefixed- xmode)
-+ (.sym dst32-24-16-An-relative-Prefixed- xmode)
-+ (.sym dst32-24-24-An-relative-Prefixed- xmode)
-+ (.sym dst32-24-8-SB-relative-Prefixed- xmode)
-+ (.sym dst32-24-16-SB-relative-Prefixed- xmode)
-+ (.sym dst32-24-8-FB-relative-Prefixed- xmode)
-+ (.sym dst32-24-16-FB-relative-Prefixed- xmode)
-+ (.sym dst32-24-16-absolute-Prefixed- xmode)
-+ (.sym dst32-24-24-absolute-Prefixed- xmode)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym dst32-24-8-Prefixed- xmode))
-+ (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym dst32-24-8-An-relative-Prefixed- xmode)
-+ (.sym dst32-24-8-SB-relative-Prefixed- xmode)
-+ (.sym dst32-24-8-FB-relative-Prefixed- xmode)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym dst32-24-16-Prefixed- xmode))
-+ (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym dst32-24-16-An-relative-Prefixed- xmode)
-+ (.sym dst32-24-16-SB-relative-Prefixed- xmode)
-+ (.sym dst32-24-16-FB-relative-Prefixed- xmode)
-+ (.sym dst32-24-16-absolute-Prefixed- xmode)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym dst32-24-24-Prefixed- xmode))
-+ (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym dst32-24-24-An-relative-Prefixed- xmode)
-+ (.sym dst32-24-24-absolute-Prefixed- xmode)
-+ )
-+ )
-+; (define-anyof-operand
-+; (name (.sym dst32-24-indirect- xmode))
-+; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym dst32-An-indirect-indirect- xmode)
-+; (.sym dst32-24-8-An-relative-indirect- xmode)
-+; (.sym dst32-24-16-An-relative-indirect- xmode)
-+; (.sym dst32-24-24-An-relative-indirect- xmode)
-+; (.sym dst32-24-8-SB-relative-indirect- xmode)
-+; (.sym dst32-24-16-SB-relative-indirect- xmode)
-+; (.sym dst32-24-8-FB-relative-indirect- xmode)
-+; (.sym dst32-24-16-FB-relative-indirect- xmode)
-+; )
-+; )
-+; (define-anyof-operand
-+; (name (.sym dst32-basic-indirect- xmode))
-+; (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym dst32-An-indirect-indirect- xmode)
-+; )
-+; )
-+; (define-anyof-operand
-+; (name (.sym dst32-24-8-indirect- xmode))
-+; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym dst32-24-8-An-relative-indirect- xmode)
-+; (.sym dst32-24-8-SB-relative-indirect- xmode)
-+; (.sym dst32-24-8-FB-relative-indirect- xmode)
-+; )
-+; )
-+; (define-anyof-operand
-+; (name (.sym dst32-24-16-indirect- xmode))
-+; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym dst32-24-16-An-relative-indirect- xmode)
-+; (.sym dst32-24-16-SB-relative-indirect- xmode)
-+; (.sym dst32-24-16-FB-relative-indirect- xmode)
-+; )
-+; )
-+; (define-anyof-operand
-+; (name (.sym dst32-24-24-indirect- xmode))
-+; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym dst32-24-24-An-relative-indirect- xmode)
-+; )
-+; )
-+; (define-anyof-operand
-+; (name (.sym dst32-24-absolute-indirect- xmode))
-+; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym dst32-24-16-absolute-indirect-derived- xmode)
-+; (.sym dst32-24-24-absolute-indirect-derived- xmode)
-+; )
-+; )
-+; (define-anyof-operand
-+; (name (.sym dst32-24-16-absolute-indirect- xmode))
-+; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym dst32-24-16-absolute-indirect-derived- xmode)
-+; )
-+; )
-+; (define-anyof-operand
-+; (name (.sym dst32-24-24-absolute-indirect- xmode))
-+; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym dst32-24-24-absolute-indirect-derived- xmode)
-+; )
-+; )
-+ )
-+)
-+
-+(dst32-24-operand QI)
-+(dst32-24-operand HI)
-+(dst32-24-operand SI)
-+
-+;-------------------------------------------------------------
-+; Destination operands with possible additional fields at offset 32 bits
-+;-------------------------------------------------------------
-+
-+(define-pmacro (dst16-32-operand xmode)
-+ (begin
-+ (define-anyof-operand
-+ (name (.sym dst16-32- xmode))
-+ (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 32"))
-+ (attrs (machine 16))
-+ (mode xmode)
-+ (choices
-+ (.sym dst16-Rn-direct- xmode)
-+ (.sym dst16-An-direct- xmode)
-+ (.sym dst16-An-indirect- xmode)
-+ (.sym dst16-32-8-An-relative- xmode)
-+ (.sym dst16-32-16-An-relative- xmode)
-+ (.sym dst16-32-8-SB-relative- xmode)
-+ (.sym dst16-32-16-SB-relative- xmode)
-+ (.sym dst16-32-8-FB-relative- xmode)
-+ (.sym dst16-32-16-absolute- xmode)
-+ )
-+ )
-+ )
-+)
-+(dst16-32-operand QI)
-+(dst16-32-operand HI)
-+
-+; This macro actually handles operands at offset 32, 40 and 48 bits
-+(define-pmacro (dst32-32plus-operand offset xmode)
-+ (begin
-+ (define-anyof-operand
-+ (name (.sym dst32- offset -Unprefixed- xmode))
-+ (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym dst32-Rn-direct-Unprefixed- xmode)
-+ (.sym dst32-An-direct-Unprefixed- xmode)
-+ (.sym dst32-An-indirect-Unprefixed- xmode)
-+ (.sym dst32- offset -8-An-relative-Unprefixed- xmode)
-+ (.sym dst32- offset -16-An-relative-Unprefixed- xmode)
-+ (.sym dst32- offset -24-An-relative-Unprefixed- xmode)
-+ (.sym dst32- offset -8-SB-relative-Unprefixed- xmode)
-+ (.sym dst32- offset -16-SB-relative-Unprefixed- xmode)
-+ (.sym dst32- offset -8-FB-relative-Unprefixed- xmode)
-+ (.sym dst32- offset -16-FB-relative-Unprefixed- xmode)
-+ (.sym dst32- offset -16-absolute-Unprefixed- xmode)
-+ (.sym dst32- offset -24-absolute-Unprefixed- xmode)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym dst32- offset -Prefixed- xmode))
-+ (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym dst32-Rn-direct-Prefixed- xmode)
-+ (.sym dst32-An-direct-Prefixed- xmode)
-+ (.sym dst32-An-indirect-Prefixed- xmode)
-+ (.sym dst32- offset -8-An-relative-Prefixed- xmode)
-+ (.sym dst32- offset -16-An-relative-Prefixed- xmode)
-+ (.sym dst32- offset -24-An-relative-Prefixed- xmode)
-+ (.sym dst32- offset -8-SB-relative-Prefixed- xmode)
-+ (.sym dst32- offset -16-SB-relative-Prefixed- xmode)
-+ (.sym dst32- offset -8-FB-relative-Prefixed- xmode)
-+ (.sym dst32- offset -16-FB-relative-Prefixed- xmode)
-+ (.sym dst32- offset -16-absolute-Prefixed- xmode)
-+ (.sym dst32- offset -24-absolute-Prefixed- xmode)
-+ )
-+ )
-+; (define-anyof-operand
-+; (name (.sym dst32- offset -indirect- xmode))
-+; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym dst32-An-indirect-indirect- xmode)
-+; (.sym dst32- offset -8-An-relative-indirect- xmode)
-+; (.sym dst32- offset -16-An-relative-indirect- xmode)
-+; (.sym dst32- offset -24-An-relative-indirect- xmode)
-+; (.sym dst32- offset -8-SB-relative-indirect- xmode)
-+; (.sym dst32- offset -16-SB-relative-indirect- xmode)
-+; (.sym dst32- offset -8-FB-relative-indirect- xmode)
-+; (.sym dst32- offset -16-FB-relative-indirect- xmode)
-+; )
-+; )
-+; (define-anyof-operand
-+; (name (.sym dst32- offset -absolute-indirect- xmode))
-+; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym dst32- offset -16-absolute-indirect-derived- xmode)
-+; (.sym dst32- offset -24-absolute-indirect-derived- xmode)
-+; )
-+; )
-+ )
-+)
-+
-+(dst32-32plus-operand 32 QI)
-+(dst32-32plus-operand 32 HI)
-+(dst32-32plus-operand 32 SI)
-+(dst32-32plus-operand 40 QI)
-+(dst32-32plus-operand 40 HI)
-+(dst32-32plus-operand 40 SI)
-+
-+;-------------------------------------------------------------
-+; Destination operands with possible additional fields at offset 48 bits
-+;-------------------------------------------------------------
-+
-+(define-pmacro (dst32-48-operand offset xmode)
-+ (begin
-+ (define-anyof-operand
-+ (name (.sym dst32- offset -Prefixed- xmode))
-+ (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym dst32-Rn-direct-Prefixed- xmode)
-+ (.sym dst32-An-direct-Prefixed- xmode)
-+ (.sym dst32-An-indirect-Prefixed- xmode)
-+ (.sym dst32- offset -8-An-relative-Prefixed- xmode)
-+ (.sym dst32- offset -16-An-relative-Prefixed- xmode)
-+ (.sym dst32- offset -24-An-relative-Prefixed- xmode)
-+ (.sym dst32- offset -8-SB-relative-Prefixed- xmode)
-+ (.sym dst32- offset -16-SB-relative-Prefixed- xmode)
-+ (.sym dst32- offset -8-FB-relative-Prefixed- xmode)
-+ (.sym dst32- offset -16-FB-relative-Prefixed- xmode)
-+ (.sym dst32- offset -16-absolute-Prefixed- xmode)
-+ (.sym dst32- offset -24-absolute-Prefixed- xmode)
-+ )
-+ )
-+; (define-anyof-operand
-+; (name (.sym dst32- offset -indirect- xmode))
-+; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym dst32-An-indirect-indirect- xmode)
-+; (.sym dst32- offset -8-An-relative-indirect- xmode)
-+; (.sym dst32- offset -16-An-relative-indirect- xmode)
-+; (.sym dst32- offset -24-An-relative-indirect- xmode)
-+; (.sym dst32- offset -8-SB-relative-indirect- xmode)
-+; (.sym dst32- offset -16-SB-relative-indirect- xmode)
-+; (.sym dst32- offset -8-FB-relative-indirect- xmode)
-+; (.sym dst32- offset -16-FB-relative-indirect- xmode)
-+; )
-+; )
-+; (define-anyof-operand
-+; (name (.sym dst32- offset -absolute-indirect- xmode))
-+; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym dst32- offset -16-absolute-indirect-derived- xmode)
-+; (.sym dst32- offset -24-absolute-indirect-derived- xmode)
-+; )
-+; )
-+ )
-+)
-+
-+(dst32-48-operand 48 QI)
-+(dst32-48-operand 48 HI)
-+(dst32-48-operand 48 SI)
-+
-+;-------------------------------------------------------------
-+; Bit operands for m16c
-+;-------------------------------------------------------------
-+
-+(define-pmacro (bit16-operand offset)
-+ (begin
-+ (define-anyof-operand
-+ (name (.sym bit16- offset))
-+ (comment (.str "m16c bit operand with possible additional fields at offset 24"))
-+ (attrs (machine 16))
-+ (mode BI)
-+ (choices
-+ bit16-Rn-direct
-+ bit16-An-direct
-+ bit16-An-indirect
-+ (.sym bit16- offset -8-An-relative)
-+ (.sym bit16- offset -16-An-relative)
-+ (.sym bit16- offset -8-SB-relative)
-+ (.sym bit16- offset -16-SB-relative)
-+ (.sym bit16- offset -8-FB-relative)
-+ (.sym bit16- offset -16-absolute)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym bit16- offset -basic))
-+ (comment (.str "m16c bit operand with no additional fields"))
-+ (attrs (machine 16))
-+ (mode BI)
-+ (choices
-+ bit16-An-indirect
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym bit16- offset -8))
-+ (comment (.str "m16c bit operand with possible additional fields at offset 24"))
-+ (attrs (machine 16))
-+ (mode BI)
-+ (choices
-+ bit16-Rn-direct
-+ bit16-An-direct
-+ (.sym bit16- offset -8-An-relative)
-+ (.sym bit16- offset -8-SB-relative)
-+ (.sym bit16- offset -8-FB-relative)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym bit16- offset -16))
-+ (comment (.str "m16c bit operand with possible additional fields at offset 24"))
-+ (attrs (machine 16))
-+ (mode BI)
-+ (choices
-+ (.sym bit16- offset -16-An-relative)
-+ (.sym bit16- offset -16-SB-relative)
-+ (.sym bit16- offset -16-absolute)
-+ )
-+ )
-+ )
-+)
-+
-+(bit16-operand 16)
-+
-+;-------------------------------------------------------------
-+; Bit operands for m32c
-+;-------------------------------------------------------------
-+
-+(define-pmacro (bit32-operand offset group)
-+ (begin
-+ (define-anyof-operand
-+ (name (.sym bit32- offset - group))
-+ (comment (.str "m32c bit operand with possible additional fields at offset 24"))
-+ (attrs (machine 32))
-+ (mode BI)
-+ (choices
-+ (.sym bit32-Rn-direct- group)
-+ (.sym bit32-An-direct- group)
-+ (.sym bit32-An-indirect- group)
-+ (.sym bit32- offset -11-An-relative- group)
-+ (.sym bit32- offset -19-An-relative- group)
-+ (.sym bit32- offset -27-An-relative- group)
-+ (.sym bit32- offset -11-SB-relative- group)
-+ (.sym bit32- offset -19-SB-relative- group)
-+ (.sym bit32- offset -11-FB-relative- group)
-+ (.sym bit32- offset -19-FB-relative- group)
-+ (.sym bit32- offset -19-absolute- group)
-+ (.sym bit32- offset -27-absolute- group)
-+ )
-+ )
-+ )
-+)
-+
-+(bit32-operand 16 Unprefixed)
-+(bit32-operand 24 Prefixed)
-+
-+(define-anyof-operand
-+ (name bit32-basic-Unprefixed)
-+ (comment "m32c bit operand with no additional fields")
-+ (attrs (machine 32))
-+ (mode BI)
-+ (choices
-+ bit32-Rn-direct-Unprefixed
-+ bit32-An-direct-Unprefixed
-+ bit32-An-indirect-Unprefixed
-+ )
-+)
-+
-+(define-anyof-operand
-+ (name bit32-16-8-Unprefixed)
-+ (comment "m32c bit operand with 8 bit additional fields")
-+ (attrs (machine 32))
-+ (mode BI)
-+ (choices
-+ bit32-16-11-An-relative-Unprefixed
-+ bit32-16-11-SB-relative-Unprefixed
-+ bit32-16-11-FB-relative-Unprefixed
-+ )
-+)
-+
-+(define-anyof-operand
-+ (name bit32-16-16-Unprefixed)
-+ (comment "m32c bit operand with 16 bit additional fields")
-+ (attrs (machine 32))
-+ (mode BI)
-+ (choices
-+ bit32-16-19-An-relative-Unprefixed
-+ bit32-16-19-SB-relative-Unprefixed
-+ bit32-16-19-FB-relative-Unprefixed
-+ bit32-16-19-absolute-Unprefixed
-+ )
-+)
-+
-+(define-anyof-operand
-+ (name bit32-16-24-Unprefixed)
-+ (comment "m32c bit operand with 24 bit additional fields")
-+ (attrs (machine 32))
-+ (mode BI)
-+ (choices
-+ bit32-16-27-An-relative-Unprefixed
-+ bit32-16-27-absolute-Unprefixed
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+; Operands for short format binary insns
-+;-------------------------------------------------------------
-+
-+(define-anyof-operand
-+ (name src16-2-S)
-+ (comment "m16c source operand of size QI for short format insns")
-+ (attrs (machine 16))
-+ (mode QI)
-+ (choices
-+ src16-2-S-8-SB-relative-QI
-+ src16-2-S-8-FB-relative-QI
-+ src16-2-S-16-absolute-QI
-+ )
-+)
-+
-+(define-anyof-operand
-+ (name src32-2-S-QI)
-+ (comment "m32c source operand of size QI for short format insns")
-+ (attrs (machine 32))
-+ (mode QI)
-+ (choices
-+ src32-2-S-8-SB-relative-QI
-+ src32-2-S-8-FB-relative-QI
-+ src32-2-S-16-absolute-QI
-+ )
-+)
-+
-+(define-anyof-operand
-+ (name src32-2-S-HI)
-+ (comment "m32c source operand of size QI for short format insns")
-+ (attrs (machine 32))
-+ (mode HI)
-+ (choices
-+ src32-2-S-8-SB-relative-HI
-+ src32-2-S-8-FB-relative-HI
-+ src32-2-S-16-absolute-HI
-+ )
-+)
-+
-+(define-anyof-operand
-+ (name Dst16-3-S-8)
-+ (comment "m16c destination operand of size QI for short format insns")
-+ (attrs (machine 16))
-+ (mode QI)
-+ (choices
-+ dst16-3-S-R0l-direct-QI
-+ dst16-3-S-R0h-direct-QI
-+ dst16-3-S-8-8-SB-relative-QI
-+ dst16-3-S-8-8-FB-relative-QI
-+ dst16-3-S-8-16-absolute-QI
-+ )
-+)
-+
-+(define-anyof-operand
-+ (name Dst16-3-S-16)
-+ (comment "m16c destination operand of size QI for short format insns")
-+ (attrs (machine 16))
-+ (mode QI)
-+ (choices
-+ dst16-3-S-R0l-direct-QI
-+ dst16-3-S-R0h-direct-QI
-+ dst16-3-S-16-8-SB-relative-QI
-+ dst16-3-S-16-8-FB-relative-QI
-+ dst16-3-S-16-16-absolute-QI
-+ )
-+)
-+
-+(define-anyof-operand
-+ (name srcdst16-r0l-r0h-S)
-+ (comment "m16c r0l/r0h operand of size QI for short format insns")
-+ (attrs (machine 16))
-+ (mode SI)
-+ (choices
-+ srcdst16-r0l-r0h-S-derived
-+ )
-+)
-+
-+(define-anyof-operand
-+ (name dst32-2-S-basic-QI)
-+ (comment "m32c r0l operand of size QI for short format binary insns")
-+ (attrs (machine 32))
-+ (mode QI)
-+ (choices
-+ dst32-2-S-R0l-direct-QI
-+ )
-+)
-+
-+(define-anyof-operand
-+ (name dst32-2-S-basic-HI)
-+ (comment "m32c r0 operand of size HI for short format binary insns")
-+ (attrs (machine 32))
-+ (mode HI)
-+ (choices
-+ dst32-2-S-R0-direct-HI
-+ )
-+)
-+
-+(define-pmacro (dst32-2-S-operands xmode)
-+ (begin
-+ (define-anyof-operand
-+ (name (.sym dst32-2-S-8- xmode))
-+ (comment "m32c operand of size " xmode " for short format binary insns")
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym dst32-2-S-8-SB-relative- xmode)
-+ (.sym dst32-2-S-8-FB-relative- xmode)
-+ )
-+ )
-+ (define-anyof-operand
-+ (name (.sym dst32-2-S-16- xmode))
-+ (comment "m32c operand of size " xmode " for short format binary insns")
-+ (attrs (machine 32))
-+ (mode xmode)
-+ (choices
-+ (.sym dst32-2-S-16-absolute- xmode)
-+ )
-+ )
-+; (define-anyof-operand
-+; (name (.sym dst32-2-S-8-indirect- xmode))
-+; (comment "m32c operand of size " xmode " for short format binary insns")
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym dst32-2-S-8-SB-relative-indirect- xmode)
-+; (.sym dst32-2-S-8-FB-relative-indirect- xmode)
-+; )
-+; )
-+; (define-anyof-operand
-+; (name (.sym dst32-2-S-absolute-indirect- xmode))
-+; (comment "m32c operand of size " xmode " for short format binary insns")
-+; (attrs (machine 32))
-+; (mode xmode)
-+; (choices
-+; (.sym dst32-2-S-16-absolute-indirect- xmode)
-+; )
-+; )
-+ )
-+)
-+
-+(dst32-2-S-operands QI)
-+(dst32-2-S-operands HI)
-+(dst32-2-S-operands SI)
-+
-+(define-anyof-operand
-+ (name dst32-an-S)
-+ (comment "m32c An operand for short format binary insns")
-+ (attrs (machine 32))
-+ (mode HI)
-+ (choices
-+ dst32-1-S-A0-direct-HI
-+ dst32-1-S-A1-direct-HI
-+ )
-+)
-+
-+(define-anyof-operand
-+ (name bit16-11-S)
-+ (comment "m16c bit operand for short format insns")
-+ (attrs (machine 16))
-+ (mode BI)
-+ (choices
-+ bit16-11-SB-relative-S
-+ )
-+)
-+
-+(define-anyof-operand
-+ (name Rn16-push-S-anyof)
-+ (comment "m16c bit operand for short format insns")
-+ (attrs (machine 16))
-+ (mode QI)
-+ (choices
-+ Rn16-push-S-derived
-+ )
-+)
-+
-+(define-anyof-operand
-+ (name An16-push-S-anyof)
-+ (comment "m16c bit operand for short format insns")
-+ (attrs (machine 16))
-+ (mode HI)
-+ (choices
-+ An16-push-S-derived
-+ )
-+)
-+
-+;=============================================================
-+; Common macros for instruction definitions
-+;
-+(define-pmacro (set-z x)
-+ (sequence ()
-+ (set zbit (zflag x)))
-+
-+)
-+
-+(define-pmacro (set-s x)
-+ (sequence ()
-+ (set sbit (nflag x)))
-+)
-+
-+(define-pmacro (set-z-and-s x)
-+ (sequence ()
-+ (set-z x)
-+ (set-s x))
-+)
-+
-+;=============================================================
-+; Unary insn macros
-+;-------------------------------------------------------------
-+
-+(define-pmacro (unary-insn-defn-g mach group mode wstr op encoding sem opg)
-+ (dni (.sym op mach wstr - group)
-+ (.str op wstr opg " dst" mach "-" group "-" mode)
-+ ((machine mach))
-+ (.str op wstr opg " ${dst" mach "-" group "-" mode "}")
-+ encoding
-+ (sem mode (.sym dst mach - group - mode))
-+ ())
-+)
-+
-+(define-pmacro (unary-insn-defn mach group mode wstr op encoding sem)
-+ (unary-insn-defn-g mach group mode wstr op encoding sem "")
-+)
-+
-+
-+(define-pmacro (unary16-defn-g mode wstr wbit op opc1 opc2 opc3 sem opg)
-+ (unary-insn-defn-g 16 16 mode wstr op
-+ (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16- mode))
-+ sem opg)
-+)
-+(define-pmacro (unary16-defn mode wstr wbit op opc1 opc2 opc3 sem)
-+ (unary-16-defn-g mode wstr wbit op opc1 opc2 opc3 sem "")
-+)
-+
-+(define-pmacro (unary32-defn-g mode wstr wbit op opc1 opc2 opc3 sem opg)
-+ (begin
-+ ; Multi insns are tried for assembly in the reverse order in which they appear here, so
-+ ; define the absolute-indirect insns first in order to prevent them from being selected
-+ ; when the mode is register-indirect
-+; (unary-insn-defn 32 24-absolute-indirect mode wstr op
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) (f-20-4 opc3))
-+; sem)
-+ (unary-insn-defn-g 32 16-Unprefixed mode wstr op
-+ (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3))
-+ sem opg)
-+; (unary-insn-defn 32 24-indirect mode wstr op
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (.sym dst32-24-indirect- mode) (f-18-2 opc2) (f-20-4 opc3))
-+; sem)
-+ )
-+)
-+(define-pmacro (unary32-defn mode wstr wbit op opc1 opc2 opc3 sem)
-+ (unary32-defn-g mode wstr wbit op opc1 opc2 opc3 sem "")
-+)
-+
-+(define-pmacro (unary-insn-mach-g mach op opc1 opc2 opc3 sem opg)
-+ (begin
-+ (.apply (.sym unary mach -defn-g) (QI .b 0 op opc1 opc2 opc3 sem opg))
-+ (.apply (.sym unary mach -defn-g) (HI .w 1 op opc1 opc2 opc3 sem opg))
-+ )
-+)
-+(define-pmacro (unary-insn-mach mach op opc1 opc2 opc3 sem)
-+ (unary-insn-mach-g mach op opc1 opc2 opc3 sem "")
-+)
-+
-+(define-pmacro (unary-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
-+ (begin
-+ (unary-insn-mach-g 16 op opc16-1 opc16-2 opc16-3 sem "")
-+ (unary-insn-mach-g 32 op opc32-1 opc32-2 opc32-3 sem "")
-+ )
-+)
-+
-+(define-pmacro (unary-insn-g op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
-+ (begin
-+ (unary-insn-mach-g 16 op opc16-1 opc16-2 opc16-3 sem "$G")
-+ (unary-insn-mach-g 32 op opc32-1 opc32-2 opc32-3 sem "$G")
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+; Sign/zero extension macros
-+;-------------------------------------------------------------
-+
-+(define-pmacro (ext-insn-defn mach group smode dmode wstr op encoding sem)
-+ (dni (.sym op mach wstr - group)
-+ (.str op wstr " dst" mach "-" group "-" smode)
-+ ((machine mach))
-+ (.str op wstr " ${dst" mach "-" group "-" smode "}")
-+ encoding
-+ (sem smode dmode (.sym dst mach - group - smode) (.sym dst mach - group - smode))
-+ ())
-+)
-+
-+(define-pmacro (ext16-defn smode dmode wstr wbit op opc1 opc2 opc3 sem)
-+ (ext-insn-defn 16 16-Ext smode dmode wstr op
-+ (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-Ext- smode))
-+ sem)
-+)
-+
-+(define-pmacro (ext32-defn smode dmode wstr wbit op opc1 opc2 opc3 sem)
-+ (ext-insn-defn 32 16-ExtUnprefixed smode dmode wstr op
-+ (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst32-16-ExtUnprefixed- smode))
-+ sem)
-+)
-+
-+(define-pmacro (ext32-binary-insn src-group dst-group op wstr encoding sem)
-+ (dni (.sym op 32 wstr - src-group - dst-group)
-+ (.str op 32 wstr " src32-" src-group "-QI,dst32-" dst-group "-HI")
-+ ((machine 32))
-+ (.str op wstr " ${src32-" src-group "-QI},${dst32-" dst-group "-HI}")
-+ encoding
-+ (sem QI HI (.sym src32- src-group -QI) (.sym dst32 - dst-group -HI))
-+ ())
-+)
-+
-+(define-pmacro (ext32-binary-defn op wstr opc1 opc2 sem)
-+ (begin
-+ (ext32-binary-insn basic-ExtPrefixed 24-Prefixed op wstr
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-basic-ExtPrefixed-QI dst32-24-Prefixed-HI (f-20-4 opc2))
-+ sem)
-+ (ext32-binary-insn 24-24-Prefixed 48-Prefixed op wstr
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-24-Prefixed-QI dst32-48-Prefixed-HI (f-20-4 opc2))
-+ sem)
-+ (ext32-binary-insn 24-16-Prefixed 40-Prefixed op wstr
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-16-Prefixed-QI dst32-40-Prefixed-HI (f-20-4 opc2))
-+ sem)
-+ (ext32-binary-insn 24-8-Prefixed 32-Prefixed op wstr
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-8-Prefixed-QI dst32-32-Prefixed-HI (f-20-4 opc2))
-+ sem)
-+ )
-+)
-+
-+;=============================================================
-+; Binary Arithmetic macros
-+;
-+;-------------------------------------------------------------
-+;<arith>.size:S src2,r0[l] -- for m32c
-+;-------------------------------------------------------------
-+
-+(define-pmacro (binary-arith32-S-src2 op xmode wstr wbit opc1 opc2 sem)
-+ (dni (.sym op 32 wstr .S-src2-r0- xmode)
-+ (.str op 32 wstr ":S src2,r0[l]")
-+ ((machine 32))
-+ (.str op wstr"$S ${src32-2-S-" xmode "},${Dst32R0" xmode "-S}")
-+ (+ opc1 opc2 (.sym src32-2-S- xmode) (f-7-1 wbit))
-+ (sem xmode (.sym src32-2-S- xmode) (.sym Dst32R0 xmode -S))
-+ ())
-+)
-+
-+;-------------------------------------------------------------
-+;<arith>.b:S src2,r0l/r0h -- for m16c
-+;-------------------------------------------------------------
-+
-+(define-pmacro (binary-arith16-b-S-src2 op opc1 opc2 sem)
-+ (begin
-+ (dni (.sym op 16 .b.S-src2)
-+ (.str op ".b:S src2,r0[lh]")
-+ ((machine 16))
-+ (.str op ".b$S ${src16-2-S},${Dst16RnQI-S}")
-+ (+ opc1 opc2 Dst16RnQI-S src16-2-S)
-+ (sem QI src16-2-S Dst16RnQI-S)
-+ ())
-+ (dni (.sym op 16 .b.S-r0l-r0h)
-+ (.str op ".b:S r0l/r0h")
-+ ((machine 16))
-+ (.str op ".b$S ${srcdst16-r0l-r0h-S}")
-+ (+ opc1 opc2 srcdst16-r0l-r0h-S)
-+ (if (eq srcdst16-r0l-r0h-S 0)
-+ (sem QI R0h R0l)
-+ (sem QI R0l R0h))
-+ ())
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+;<arith>.b:S #imm8,dst3 -- for m16c
-+;-------------------------------------------------------------
-+
-+(define-pmacro (binary-arith16-b-S-imm8-dst3 op sz opc1 opc2 sem)
-+ (dni (.sym op 16 .b.S-imm8-dst3)
-+ (.str op sz ":S imm8,dst3")
-+ ((machine 16))
-+ (.str op sz "$S #${Imm-8-QI},${Dst16-3-S-16}")
-+ (+ opc1 opc2 Dst16-3-S-16 Imm-8-QI)
-+ (sem QI Imm-8-QI Dst16-3-S-16)
-+ ())
-+)
-+
-+;-------------------------------------------------------------
-+;<arith>.size:Q #imm4,sp -- for m16c
-+;-------------------------------------------------------------
-+
-+(define-pmacro (binary-arith16-Q-sp op opc1 opc2 opc3 sem)
-+ (dni (.sym op 16 -wQ-sp)
-+ (.str op ".w:q #imm4,sp")
-+ ((machine 16))
-+ (.str op ".w$Q #${Imm-12-s4},sp")
-+ (+ opc1 opc2 opc3 Imm-12-s4)
-+ (sem QI Imm-12-s4 sp)
-+ ())
-+)
-+
-+;-------------------------------------------------------------
-+;<arith>.size:G #imm,sp -- for m16c
-+;-------------------------------------------------------------
-+
-+(define-pmacro (binary-arith16-G-sp-defn mode wstr wbit op opc1 opc2 opc3 opc4 sem)
-+ (dni (.sym op 16 wstr - G-sp)
-+ (.str op wstr " imm-sp " mode)
-+ ((machine 16))
-+ (.str op wstr "$G #${Imm-16-" mode "},sp")
-+ (+ opc1 opc2 (f-7-1 wbit) opc3 opc4 (.sym Imm-16- mode))
-+ (sem mode (.sym Imm-16- mode) sp)
-+ ())
-+)
-+
-+(define-pmacro (binary-arith16-G-sp op opc1 opc2 opc3 opc4 sem)
-+ (begin
-+ (binary-arith16-G-sp-defn QI .b 0 op opc1 opc2 opc3 opc4 sem)
-+ (binary-arith16-G-sp-defn HI .w 1 op opc1 opc2 opc3 opc4 sem)
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+;<arith>.size:G #imm,dst -- for m16c and m32c
-+;-------------------------------------------------------------
-+
-+(define-pmacro (binary-arith-imm-dst-defn mach src dstgroup dmode wstr op suffix encoding sem)
-+ (dni (.sym op mach wstr - imm-G - dstgroup)
-+ (.str op wstr " " mach "-imm-G-" dstgroup "-" dmode)
-+ ((machine mach))
-+ (.str op wstr "$"suffix " #${" src "},${dst" mach "-" dstgroup "-" dmode "}")
-+ encoding
-+ (sem dmode src (.sym dst mach - dstgroup - dmode))
-+ ())
-+)
-+
-+; m16c variants
-+(define-pmacro (binary-arith16-imm-dst-defn smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
-+ (begin
-+ (binary-arith-imm-dst-defn 16 (.sym Imm-32- smode) 16-16 dmode wstr op suffix
-+ (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- dmode) (.sym Imm-32- smode))
-+ sem)
-+ (binary-arith-imm-dst-defn 16 (.sym Imm-24- smode) 16-8 dmode wstr op suffix
-+ (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- dmode) (.sym Imm-24- smode))
-+ sem)
-+ (binary-arith-imm-dst-defn 16 (.sym Imm-16- smode) basic dmode wstr op suffix
-+ (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- dmode) (.sym Imm-16- smode))
-+ sem)
-+ )
-+)
-+
-+; m32c Unprefixed variants
-+(define-pmacro (binary-arith32-imm-dst-Unprefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
-+ (begin
-+ (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 16-24-Unprefixed dmode wstr op suffix
-+ (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-24-Unprefixed- dmode) (.sym Imm-40- smode))
-+ sem)
-+ (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 16-16-Unprefixed dmode wstr op suffix
-+ (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-16-Unprefixed- dmode) (.sym Imm-32- smode))
-+ sem)
-+ (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) 16-8-Unprefixed dmode wstr op suffix
-+ (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-8-Unprefixed- dmode) (.sym Imm-24- smode))
-+ sem)
-+ (binary-arith-imm-dst-defn 32 (.sym Imm-16- smode) basic-Unprefixed dmode wstr op suffix
-+ (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-basic-Unprefixed- dmode) (.sym Imm-16- smode))
-+ sem)
-+ )
-+)
-+
-+; m32c Prefixed variants
-+(define-pmacro (binary-arith32-imm-dst-Prefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
-+ (begin
-+ (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-Prefixed dmode wstr op suffix
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-Prefixed- dmode) (.sym Imm-48- smode))
-+ sem)
-+ (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-Prefixed dmode wstr op suffix
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-Prefixed- dmode) (.sym Imm-40- smode))
-+ sem)
-+ (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 24-8-Prefixed dmode wstr op suffix
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-8-Prefixed- dmode) (.sym Imm-32- smode))
-+ sem)
-+ (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) basic-Prefixed dmode wstr op suffix
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-basic-Prefixed- dmode) (.sym Imm-24- smode))
-+ sem)
-+ )
-+)
-+
-+; All m32c variants
-+(define-pmacro (binary-arith32-imm-dst-defn smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
-+ (begin
-+ ; Multi insns are tried for assembly in the reverse order in which they appear here, so
-+ ; define the absolute-indirect insns first in order to prevent them from being selected
-+ ; when the mode is register-indirect
-+; (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-absolute-indirect dmode wstr op suffix
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-absolute-indirect- dmode) (.sym Imm-48- smode))
-+; sem)
-+; (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-absolute-indirect dmode wstr op suffix
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-absolute-indirect- dmode) (.sym Imm-40- smode))
-+; sem)
-+ ; Unprefixed modes next
-+ (binary-arith32-imm-dst-Unprefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
-+
-+ ; Remaining indirect modes
-+; (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) basic-indirect dmode wstr op suffix
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-basic-indirect- dmode) (.sym Imm-24- smode))
-+; sem)
-+; (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-indirect dmode wstr op suffix
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-indirect- dmode) (.sym Imm-48- smode))
-+; sem)
-+; (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-indirect dmode wstr op suffix
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-indirect- dmode) (.sym Imm-40- smode))
-+; sem)
-+; (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 24-8-indirect dmode wstr op suffix
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-8-indirect- dmode) (.sym Imm-32- smode))
-+; sem)
-+ )
-+)
-+
-+(define-pmacro (binary-arith-imm-dst-mach mach op suffix opc1 opc2 opc3 sem)
-+ (begin
-+ (.apply (.sym binary-arith mach -imm-dst-defn) (QI QI .b 0 op suffix opc1 opc2 opc3 sem))
-+ (.apply (.sym binary-arith mach -imm-dst-defn) (HI HI .w 1 op suffix opc1 opc2 opc3 sem))
-+ )
-+)
-+
-+(define-pmacro (binary-arith-imm-dst op suffix opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
-+ (begin
-+ (binary-arith-imm-dst-mach 16 op suffix opc16-1 opc16-2 opc16-3 sem)
-+ (binary-arith-imm-dst-mach 32 op suffix opc32-1 opc32-2 opc32-3 sem)
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+;<arith>.size:Q #imm4,dst -- for m16c and m32c
-+;-------------------------------------------------------------
-+
-+(define-pmacro (binary-arith-imm4-dst-defn mach src dstgroup mode wstr op encoding sem)
-+ (dni (.sym op mach wstr - imm4-Q - dstgroup)
-+ (.str op wstr " " mach "-imm4-Q-" dstgroup "-" mode)
-+ ((machine mach))
-+ (.str op wstr "$Q #${" src "},${dst" mach "-" dstgroup "-" mode "}")
-+ encoding
-+ (sem mode src (.sym dst mach - dstgroup - mode))
-+ ())
-+)
-+
-+; m16c variants
-+(define-pmacro (binary-arith16-imm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
-+ (binary-arith-imm4-dst-defn 16 Imm-8-s4 16 mode wstr op
-+ (+ opc1 opc2 (f-7-1 wbit2) Imm-8-s4 (.sym dst16-16- mode))
-+ sem)
-+)
-+
-+(define-pmacro (binary-arith16-shimm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
-+ (binary-arith-imm4-dst-defn 16 Imm-sh-8-s4 16 mode wstr op
-+ (+ opc1 opc2 (f-7-1 wbit2) Imm-sh-8-s4 (.sym dst16-16- mode))
-+ sem)
-+)
-+
-+; m32c variants
-+(define-pmacro (binary-arith32-imm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
-+ (begin
-+ ; Multi insns are tried for assembly in the reverse order in which they appear here, so
-+ ; define the absolute-indirect insns first in order to prevent them from being selected
-+ ; when the mode is register-indirect
-+; (binary-arith-imm4-dst-defn 32 Imm-20-s4 24-absolute-indirect mode wstr op
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) Imm-20-s4)
-+; sem)
-+ (binary-arith-imm4-dst-defn 32 Imm-12-s4 16-Unprefixed mode wstr op
-+ (+ (f-0-3 opc1) (f-3-1 wbit1) (f-7-1 wbit2) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4)
-+ sem)
-+; (binary-arith-imm4-dst-defn 32 Imm-20-s4 24-indirect mode wstr op
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-indirect- mode) (f-18-2 opc2) Imm-20-s4)
-+; sem)
-+ )
-+)
-+
-+(define-pmacro (binary-arith32-shimm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
-+ (begin
-+ ; Multi insns are tried for assembly in the reverse order in which they appear here, so
-+ ; define the absolute-indirect insns first in order to prevent them from being selected
-+ ; when the mode is register-indirect
-+; (binary-arith-imm4-dst-defn 32 Imm-sh-20-s4 24-absolute-indirect mode wstr op
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) Imm-sh-20-s4)
-+; sem)
-+ (binary-arith-imm4-dst-defn 32 Imm-sh-12-s4 16-Unprefixed mode wstr op
-+ (+ (f-0-3 opc1) (f-3-1 wbit1) (f-7-1 wbit2) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) Imm-sh-12-s4)
-+ sem)
-+; (binary-arith-imm4-dst-defn 32 Imm-sh-20-s4 24-indirect mode wstr op
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-indirect- mode) (f-18-2 opc2) Imm-sh-20-s4)
-+; sem)
-+ )
-+)
-+
-+(define-pmacro (binary-arith-imm4-dst-mach mach op opc1 opc2 sem)
-+ (begin
-+ (.apply (.sym binary-arith mach -imm4-dst-defn) (QI .b 0 0 op opc1 opc2 sem))
-+ (.apply (.sym binary-arith mach -imm4-dst-defn) (HI .w 0 1 op opc1 opc2 sem))
-+ )
-+)
-+
-+(define-pmacro (binary-arith-imm4-dst op opc16-1 opc16-2 opc32-1 opc32-2 sem)
-+ (begin
-+ (binary-arith-imm4-dst-mach 16 op opc16-1 opc16-2 sem)
-+ (binary-arith-imm4-dst-mach 32 op opc32-1 opc32-2 sem)
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+;<arith>.size:G src,dst -- for m16c and m32c
-+;-------------------------------------------------------------
-+
-+(define-pmacro (binary-arith-src-dst-defn mach srcgroup dstgroup smode dmode wstr op suffix encoding sem)
-+ (dni (.sym op mach wstr - srcgroup - dstgroup)
-+ (.str op wstr " dst" mach "-" srcgroup "-" dstgroup "-" dmode)
-+ ((machine mach))
-+ (.str op wstr "$" suffix " ${src" mach "-" srcgroup "-" smode "},${dst" mach "-" dstgroup "-" dmode "}")
-+ encoding
-+ (sem dmode (.sym src mach - srcgroup - smode) (.sym dst mach - dstgroup - dmode))
-+ ())
-+)
-+
-+; m16c variants
-+(define-pmacro (binary-arith16-src-dst-defn smode dmode wstr wbit op suffix opc1 opc2 sem)
-+ (begin
-+ (binary-arith-src-dst-defn 16 basic 16 smode dmode wstr op suffix
-+ (+ opc1 opc2 (f-7-1 wbit) (.sym src16-basic- smode) (.sym dst16-16- dmode))
-+ sem)
-+ (binary-arith-src-dst-defn 16 16-16 32 smode dmode wstr op suffix
-+ (+ opc1 opc2 (f-7-1 wbit) (.sym src16-16-16- smode) (.sym dst16-32- dmode))
-+ sem)
-+ (binary-arith-src-dst-defn 16 16-8 24 smode dmode wstr op suffix
-+ (+ opc1 opc2 (f-7-1 wbit) (.sym src16-16-8- smode) (.sym dst16-24- dmode))
-+ sem)
-+ )
-+)
-+
-+; m32c Prefixed variants
-+(define-pmacro (binary-arith32-src-dst-Prefixed smode dmode wstr wbit op suffix opc1 opc2 sem)
-+ (begin
-+ (binary-arith-src-dst-defn 32 basic-Prefixed 24-Prefixed smode dmode wstr op suffix
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-basic-Prefixed- smode) (.sym dst32-24-Prefixed- dmode) (f-20-4 opc2))
-+ sem)
-+ (binary-arith-src-dst-defn 32 24-24-Prefixed 48-Prefixed smode dmode wstr op suffix
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2))
-+ sem)
-+ (binary-arith-src-dst-defn 32 24-16-Prefixed 40-Prefixed smode dmode wstr op suffix
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2))
-+ sem)
-+ (binary-arith-src-dst-defn 32 24-8-Prefixed 32-Prefixed smode dmode wstr op suffix
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-Prefixed- dmode) (f-20-4 opc2))
-+ sem)
-+ )
-+)
-+
-+; all m32c variants
-+(define-pmacro (binary-arith32-src-dst-defn smode dmode wstr wbit op suffix opc1 opc2 sem)
-+ (begin
-+ ; Multi insns are tried for assembly in the reverse order in which they appear here, so
-+ ; define the absolute-indirect insns first in order to prevent them from being selected
-+ ; when the mode is register-indirect
-+; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-absolute-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-absolute-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-Prefixed smode dmode wstr op suffix
-+; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-Prefixed smode dmode wstr op suffix
-+; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 basic-Prefixed 24-absolute-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-basic-Prefixed- smode) (.sym dst32-24-absolute-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-24-Prefixed 48-absolute-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-16-Prefixed 40-absolute-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-8-Prefixed 32-absolute-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-absolute-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 basic-indirect 24-absolute-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-basic-indirect- smode) (.sym dst32-24-absolute-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-24-indirect 48-absolute-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-24-indirect- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-16-indirect 40-absolute-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-16-indirect- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-8-indirect 32-absolute-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-8-indirect- smode) (.sym dst32-32-absolute-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+ (binary-arith-src-dst-defn 32 basic-Unprefixed 16-Unprefixed smode dmode wstr op suffix
-+ (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-basic-Unprefixed- smode) (.sym dst32-16-Unprefixed- dmode) (f-12-4 opc2))
-+ sem)
-+ (binary-arith-src-dst-defn 32 16-24-Unprefixed 40-Unprefixed smode dmode wstr op suffix
-+ (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-24-Unprefixed- smode) (.sym dst32-40-Unprefixed- dmode) (f-12-4 opc2))
-+ sem)
-+ (binary-arith-src-dst-defn 32 16-16-Unprefixed 32-Unprefixed smode dmode wstr op suffix
-+ (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-16-Unprefixed- smode) (.sym dst32-32-Unprefixed- dmode) (f-12-4 opc2))
-+ sem)
-+ (binary-arith-src-dst-defn 32 16-8-Unprefixed 24-Unprefixed smode dmode wstr op suffix
-+ (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-8-Unprefixed- smode) (.sym dst32-24-Unprefixed- dmode) (f-12-4 opc2))
-+ sem)
-+; (binary-arith-src-dst-defn 32 basic-indirect 24-Prefixed smode dmode wstr op suffix
-+; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-basic-indirect- smode) (.sym dst32-24-Prefixed- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-24-indirect 48-Prefixed smode dmode wstr op suffix
-+; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-24-indirect- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-16-indirect 40-Prefixed smode dmode wstr op suffix
-+; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-16-indirect- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-8-indirect 32-Prefixed smode dmode wstr op suffix
-+; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-8-indirect- smode) (.sym dst32-32-Prefixed- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 basic-Prefixed 24-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-basic-Prefixed- smode) (.sym dst32-24-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-24-Prefixed 48-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-16-Prefixed 40-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-8-Prefixed 32-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 basic-indirect 24-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-basic-indirect- smode) (.sym dst32-24-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-24-indirect 48-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-24-indirect- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-16-indirect 40-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-16-indirect- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+; (binary-arith-src-dst-defn 32 24-8-indirect 32-indirect smode dmode wstr op suffix
-+; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
-+; (.sym src32-24-8-indirect- smode) (.sym dst32-32-indirect- dmode) (f-20-4 opc2))
-+; sem)
-+ )
-+)
-+
-+(define-pmacro (binary-arith-src-dst-mach mach op suffix opc1 opc2 sem)
-+ (begin
-+ (.apply (.sym binary-arith mach -src-dst-defn) (QI QI .b 0 op suffix opc1 opc2 sem))
-+ (.apply (.sym binary-arith mach -src-dst-defn) (HI HI .w 1 op suffix opc1 opc2 sem))
-+ )
-+)
-+
-+(define-pmacro (binary-arith-src-dst op suffix opc16-1 opc16-2 opc32-1 opc32-2 sem)
-+ (begin
-+ (binary-arith-src-dst-mach 16 op suffix opc16-1 opc16-2 sem)
-+ (binary-arith-src-dst-mach 32 op suffix opc32-1 opc32-2 sem)
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+;<arith>.size:S #imm,dst -- for m32c
-+;-------------------------------------------------------------
-+
-+(define-pmacro (binary-arith32-s-imm-dst-defn src dstgroup mode wstr op encoding sem)
-+ (dni (.sym op 32 wstr - imm-S - dstgroup)
-+ (.str op wstr " 32-imm-S-" dstgroup "-" mode)
-+ ((machine 32))
-+ (.str op wstr "$S #${" src "},${dst32-" dstgroup "-" mode "}")
-+ encoding
-+ (sem mode src (.sym dst32- dstgroup - mode))
-+ ())
-+)
-+
-+(define-pmacro (binary-arith32-z-imm-dst-defn src dstgroup mode wstr op encoding sem)
-+ (dni (.sym op 32 wstr - imm-Z - dstgroup)
-+ (.str op wstr " 32-imm-Z-" dstgroup "-" mode)
-+ ((machine 32))
-+ (.str op wstr "$Z #0,${dst32-" dstgroup "-" mode "}")
-+ encoding
-+ (sem mode (const 0) (.sym dst32- dstgroup - mode))
-+ ())
-+)
-+
-+(define-pmacro (binary-arith32-s-imm-dst mode wstr wbit op opc1 opc2 sem)
-+ (begin
-+; (binary-arith32-s-imm-dst-defn (.sym Imm-32- mode) 2-S-absolute-indirect mode wstr op
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-absolute-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-32- mode))
-+; sem)
-+ (binary-arith32-s-imm-dst-defn (.sym Imm-8- mode) 2-S-basic mode wstr op
-+ (+ (f-0-2 opc1) (.sym dst32-2-S-basic- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-8- mode))
-+ sem)
-+ (binary-arith32-s-imm-dst-defn (.sym Imm-24- mode) 2-S-16 mode wstr op
-+ (+ (f-0-2 opc1) (.sym dst32-2-S-16- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-24- mode))
-+ sem)
-+ (binary-arith32-s-imm-dst-defn (.sym Imm-16- mode) 2-S-8 mode wstr op
-+ (+ (f-0-2 opc1) (.sym dst32-2-S-8- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-16- mode))
-+ sem)
-+; (binary-arith32-s-imm-dst-defn (.sym Imm-24- mode) 2-S-8-indirect mode wstr op
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-8-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-24- mode))
-+; sem)
-+ )
-+)
-+
-+(define-pmacro (binary-arith32-z-imm-dst mode wstr wbit op opc1 opc2 sem)
-+ (begin
-+; (binary-arith32-z-imm-dst-defn (.sym Imm-32- mode) 2-S-absolute-indirect mode wstr op
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-absolute-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-32- mode))
-+; sem)
-+ (binary-arith32-z-imm-dst-defn (.sym Imm-8- mode) 2-S-basic mode wstr op
-+ (+ (f-0-2 opc1) (.sym dst32-2-S-basic- mode) (f-4-3 opc2) (f-7-1 wbit))
-+ sem)
-+ (binary-arith32-z-imm-dst-defn (.sym Imm-24- mode) 2-S-16 mode wstr op
-+ (+ (f-0-2 opc1) (.sym dst32-2-S-16- mode) (f-4-3 opc2) (f-7-1 wbit))
-+ sem)
-+ (binary-arith32-z-imm-dst-defn (.sym Imm-16- mode) 2-S-8 mode wstr op
-+ (+ (f-0-2 opc1) (.sym dst32-2-S-8- mode) (f-4-3 opc2) (f-7-1 wbit))
-+ sem)
-+; (binary-arith32-z-imm-dst-defn (.sym Imm-24- mode) 2-S-8-indirect mode wstr op
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-8-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-24- mode))
-+; sem)
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+;<arith>.L:S #imm1,An -- for m32c
-+;-------------------------------------------------------------
-+
-+(define-pmacro (binary-arith32-l-s-imm1-an op opc1 opc2 sem)
-+ (begin
-+ (dni (.sym op 32.l-s-imm1-S-an)
-+ (.str op ".l 32-imm1-S-an")
-+ ((machine 32))
-+ (.str op ".l$S #${Imm1-S},${dst32-an-S}")
-+ (+ opc1 Imm1-S opc2 dst32-an-S)
-+ (sem SI Imm1-S dst32-an-S)
-+ ())
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+;<arith>.L:Q #imm3,sp -- for m32c
-+;-------------------------------------------------------------
-+
-+(define-pmacro (binary-arith32-l-q-imm3-sp op opc1 opc2 sem)
-+ (begin
-+ (dni (.sym op 32.l-imm3-Q)
-+ (.str op ".l 32-imm3-Q")
-+ ((machine 32))
-+ (.str op ".l$Q #${Imm3-S},sp")
-+ (+ opc1 Imm3-S opc2)
-+ (sem SI Imm3-S sp)
-+ ())
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+;<arith>.L:S #imm8,sp -- for m32c
-+;-------------------------------------------------------------
-+
-+(define-pmacro (binary-arith32-l-s-imm8-sp op opc1 opc2 opc3 opc4 sem)
-+ (begin
-+ (dni (.sym op 32.l-imm8-S)
-+ (.str op ".l 32-imm8-S")
-+ ((machine 32))
-+ (.str op ".l$S #${Imm-16-QI},sp")
-+ (+ opc1 opc2 opc3 opc4 Imm-16-QI)
-+ (sem SI Imm-16-QI sp)
-+ ())
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+;<arith>.L:G #imm16,sp -- for m32c
-+;-------------------------------------------------------------
-+
-+(define-pmacro (binary-arith32-l-g-imm16-sp op opc1 opc2 opc3 opc4 sem)
-+ (begin
-+ (dni (.sym op 32.l-imm16-G)
-+ (.str op ".l 32-imm16-G")
-+ ((machine 32))
-+ (.str op ".l$G #${Imm-16-HI},sp")
-+ (+ opc1 opc2 opc3 opc4 Imm-16-HI)
-+ (sem SI Imm-16-HI sp)
-+ ())
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+;<arith>jnz.size #imm4,dst,label -- for m16c and m32c
-+;-------------------------------------------------------------
-+
-+(define-pmacro (arith-jnz-imm4-dst-defn mach src dstgroup label mode wstr op encoding sem)
-+ (dni (.sym op mach wstr - imm4 - dstgroup)
-+ (.str op wstr " " mach "-imm4-" dstgroup "-" label "-" mode)
-+ ((machine mach))
-+ (.str op wstr " #${" src "},${dst" mach "-" dstgroup "-" mode "},${" label "}")
-+ encoding
-+ (sem mode src (.sym dst mach - dstgroup - mode) label)
-+ ())
-+)
-+
-+; m16c variants
-+(define-pmacro (arith-jnz16-imm4-dst-defn mode wstr wbit op i4n opc1 opc2 sem)
-+ (begin
-+ (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) basic Lab-16-8 mode wstr op
-+ (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-basic- mode) Lab-16-8)
-+ sem)
-+ (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) 16-16 Lab-32-8 mode wstr op
-+ (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-16-16- mode) Lab-16-8)
-+ sem)
-+ (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) 16-8 Lab-24-8 mode wstr op
-+ (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-16-8- mode) Lab-16-8)
-+ sem)
-+ )
-+)
-+
-+; m32c variants
-+(define-pmacro (arith-jnz32-imm4-dst-defn mode wstr wbit op i4n opc1 opc2 sem)
-+ (begin
-+ (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) basic-Unprefixed Lab-16-8 mode wstr op
-+ (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-16-8)
-+ sem)
-+ (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-24-Unprefixed Lab-40-8 mode wstr op
-+ (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-40-8)
-+ sem)
-+ (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-16-Unprefixed Lab-32-8 mode wstr op
-+ (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-32-8)
-+ sem)
-+ (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-8-Unprefixed Lab-24-8 mode wstr op
-+ (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-24-8)
-+ sem)
-+ )
-+)
-+
-+(define-pmacro (arith-jnz-imm4-dst-mach mach op i4n opc1 opc2 sem)
-+ (begin
-+ (.apply (.sym arith-jnz mach -imm4-dst-defn) (QI .b 0 op i4n opc1 opc2 sem))
-+ (.apply (.sym arith-jnz mach -imm4-dst-defn) (HI .w 1 op i4n opc1 opc2 sem))
-+ )
-+)
-+
-+(define-pmacro (arith-jnz-imm4-dst op i4n opc16-1 opc16-2 opc32-1 opc32-2 sem)
-+ (begin
-+ (arith-jnz-imm4-dst-mach 16 op i4n opc16-1 opc16-2 sem)
-+ (arith-jnz-imm4-dst-mach 32 op i4n opc32-1 opc32-2 sem)
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+;mov.size dsp8[sp],dst -- for m16c and m32c
-+;-------------------------------------------------------------
-+(define-pmacro (mov-dspsp-dst-defn mach dstgroup dsp mode wstr op encoding sem)
-+ (dni (.sym op mach wstr -dspsp-dst- dstgroup)
-+ (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode)
-+ ((machine mach))
-+ (.str op wstr "$G ${" dsp "}[sp],${dst" mach "-" dstgroup "-" mode "}")
-+ encoding
-+ (sem mach mode dsp (.sym dst mach - dstgroup - mode))
-+ ())
-+)
-+(define-pmacro (mov-src-dspsp-defn mach dstgroup dsp mode wstr op encoding sem)
-+ (dni (.sym op mach wstr -dst-dspsp- dstgroup)
-+ (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode)
-+ ((machine mach))
-+ (.str op wstr "$G ${dst" mach "-" dstgroup "-" mode "},${" dsp "}[sp]")
-+ encoding
-+ (sem mach mode (.sym dst mach - dstgroup - mode) dsp)
-+ ())
-+)
-+
-+; m16c variants
-+(define-pmacro (mov16-dspsp-dst-defn mode wstr wbit op opc1 opc2 opc3 sem)
-+ (begin
-+ (mov-dspsp-dst-defn 16 basic Dsp-16-s8 mode wstr op
-+ (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-s8)
-+ sem)
-+ (mov-dspsp-dst-defn 16 16-16 Dsp-32-s8 mode wstr op
-+ (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-s8)
-+ sem)
-+ (mov-dspsp-dst-defn 16 16-8 Dsp-24-s8 mode wstr op
-+ (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-s8)
-+ sem)
-+ )
-+)
-+
-+(define-pmacro (mov16-src-dspsp-defn mode wstr wbit op opc1 opc2 opc3 sem)
-+ (begin
-+ (mov-src-dspsp-defn 16 basic Dsp-16-s8 mode wstr op
-+ (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-s8)
-+ sem)
-+ (mov-src-dspsp-defn 16 16-16 Dsp-32-s8 mode wstr op
-+ (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-s8)
-+ sem)
-+ (mov-src-dspsp-defn 16 16-8 Dsp-24-s8 mode wstr op
-+ (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-s8)
-+ sem)
-+ )
-+)
-+
-+; m32c variants
-+(define-pmacro (mov32-dspsp-dst-defn mode wstr wbit op opc1 opc2 opc3 sem)
-+ (begin
-+ (mov-dspsp-dst-defn 32 basic-Unprefixed Dsp-16-s8 mode wstr op
-+ (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-s8)
-+ sem)
-+ (mov-dspsp-dst-defn 32 16-24-Unprefixed Dsp-40-s8 mode wstr op
-+ (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-s8)
-+ sem)
-+ (mov-dspsp-dst-defn 32 16-16-Unprefixed Dsp-32-s8 mode wstr op
-+ (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-s8)
-+ sem)
-+ (mov-dspsp-dst-defn 32 16-8-Unprefixed Dsp-24-s8 mode wstr op
-+ (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-s8)
-+ sem)
-+ )
-+)
-+(define-pmacro (mov32-src-dspsp-defn mode wstr wbit op opc1 opc2 opc3 sem)
-+ (begin
-+ (mov-src-dspsp-defn 32 basic-Unprefixed Dsp-16-s8 mode wstr op
-+ (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-s8)
-+ sem)
-+ (mov-src-dspsp-defn 32 16-24-Unprefixed Dsp-40-s8 mode wstr op
-+ (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-s8)
-+ sem)
-+ (mov-src-dspsp-defn 32 16-16-Unprefixed Dsp-32-s8 mode wstr op
-+ (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-s8)
-+ sem)
-+ (mov-src-dspsp-defn 32 16-8-Unprefixed Dsp-24-s8 mode wstr op
-+ (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-s8)
-+ sem)
-+ )
-+)
-+
-+(define-pmacro (mov-src-dspsp-mach mach op opc1 opc2 opc3 sem)
-+ (begin
-+ (.apply (.sym mov mach -src-dspsp-defn) (QI .b 0 op opc1 opc2 opc3 sem))
-+ (.apply (.sym mov mach -src-dspsp-defn) (HI .w 1 op opc1 opc2 opc3 sem))
-+ )
-+)
-+
-+(define-pmacro (mov-dspsp-dst-mach mach op opc1 opc2 opc3 sem)
-+ (begin
-+ (.apply (.sym mov mach -dspsp-dst-defn) (QI .b 0 op opc1 opc2 opc3 sem))
-+ (.apply (.sym mov mach -dspsp-dst-defn) (HI .w 1 op opc1 opc2 opc3 sem))
-+ )
-+)
-+
-+(define-pmacro (mov-dspsp-dst op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
-+ (begin
-+ (mov-dspsp-dst-mach 16 op opc16-1 opc16-2 opc16-3 sem)
-+ (mov-dspsp-dst-mach 32 op opc32-1 opc32-2 opc32-3 sem)
-+ )
-+)
-+(define-pmacro (mov-src-dspsp op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
-+ (begin
-+ (mov-src-dspsp-mach 16 op opc16-1 opc16-2 opc16-3 sem)
-+ (mov-src-dspsp-mach 32 op opc32-1 opc32-2 opc32-3 sem)
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+; lde dsp24,dst -- for m16c
-+;-------------------------------------------------------------
-+
-+(define-pmacro (lde-dst-dsp mode wstr wbit dstgroup srcdisp)
-+ (begin
-+
-+ (dni (.sym lde wstr - dstgroup -u20)
-+ (.str "lde" wstr "-" dstgroup "-u20")
-+ ((machine 16))
-+ (.str "lde" wstr " ${" srcdisp "},${dst16-" dstgroup "-" mode "}")
-+ (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x8)
-+ (.sym dst16- dstgroup - mode) srcdisp)
-+ (nop)
-+ ())
-+
-+ (dni (.sym lde wstr - dstgroup -u20a0)
-+ (.str "lde" wstr "-" dstgroup "-u20a0")
-+ ((machine 16))
-+ (.str "lde" wstr " ${" srcdisp "}[a0],${dst16-" dstgroup "-" mode "}")
-+ (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x9)
-+ (.sym dst16- dstgroup - mode) srcdisp)
-+ (nop)
-+ ())
-+
-+ (dni (.sym lde wstr - dstgroup -a1a0)
-+ (.str "lde" wstr "-" dstgroup "-a1a0")
-+ ((machine 16))
-+ (.str "lde" wstr " [a1a0],${dst16-" dstgroup "-" mode "}")
-+ (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #xa)
-+ (.sym dst16- dstgroup - mode))
-+ (nop)
-+ ())
-+ )
-+ )
-+
-+(define-pmacro (lde-dst mode wstr wbit)
-+ (begin
-+ ; like: QI .b 0
-+ (lde-dst-dsp mode wstr wbit basic Dsp-16-u20)
-+ (lde-dst-dsp mode wstr wbit 16-8 Dsp-24-u20)
-+ (lde-dst-dsp mode wstr wbit 16-16 Dsp-32-u20)
-+ )
-+)
-+
-+;-------------------------------------------------------------
-+; ste dst,dsp24 -- for m16c
-+;-------------------------------------------------------------
-+
-+(define-pmacro (ste-dst-dsp mode wstr wbit dstgroup srcdisp)
-+ (begin
-+
-+ (dni (.sym ste wstr - dstgroup -u20)
-+ (.str "ste" wstr "-" dstgroup "-u20")
-+ ((machine 16))
-+ (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},${" srcdisp "}")
-+ (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x0)
-+ (.sym dst16- dstgroup - mode) srcdisp)
-+ (nop)
-+ ())
-+
-+ (dni (.sym ste wstr - dstgroup -u20a0)
-+ (.str "ste" wstr "-" dstgroup "-u20a0")
-+ ((machine 16))
-+ (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},${" srcdisp "}[a0]")
-+ (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x1)
-+ (.sym dst16- dstgroup - mode) srcdisp)
-+ (nop)
-+ ())
-+
-+ (dni (.sym ste wstr - dstgroup -a1a0)
-+ (.str "ste" wstr "-" dstgroup "-a1a0")
-+ ((machine 16))
-+ (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},[a1a0]")
-+ (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x2)
-+ (.sym dst16- dstgroup - mode))
-+ (nop)
-+ ())
-+ )
-+ )
-+
-+(define-pmacro (ste-dst mode wstr wbit)
-+ (begin
-+ ; like: QI .b 0
-+ (ste-dst-dsp mode wstr wbit basic Dsp-16-u20)
-+ (ste-dst-dsp mode wstr wbit 16-8 Dsp-24-u20)
-+ (ste-dst-dsp mode wstr wbit 16-16 Dsp-32-u20)
-+ )
-+)
-+
-+;=============================================================
-+; Division
-+;-------------------------------------------------------------
-+
-+(define-pmacro (div-sem divop modop opmode reg src quot rem max min)
-+ (sequence ()
-+ (if (eq src 0)
-+ (set obit (const BI 1))
-+ (sequence ((opmode quot-result) (opmode rem-result))
-+ (set quot-result (divop opmode (ext opmode reg) src))
-+ (set rem-result (modop opmode (ext opmode reg) src))
-+ (set obit (orif (gt opmode quot-result max)
-+ (lt opmode quot-result min)))
-+ (set quot quot-result)
-+ (set rem rem-result))))
-+)
-+
-+;<divop>.size #imm -- for m16c and m32c
-+(define-pmacro (div-imm-defn mach wstr op src encoding divop modop opmode reg quot rem max min sem)
-+ (dni (.sym op mach wstr - src)
-+ (.str op mach wstr "-" src)
-+ ((machine mach))
-+ (.str op wstr " #${" src "}")
-+ encoding
-+ (sem divop modop opmode reg src quot rem max min)
-+ ())
-+)
-+(define-pmacro (div16-imm-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 opc4 sem)
-+ (div-imm-defn 16 wstr op (.sym Imm-16 - smode)
-+ (+ opc1 opc2 (f-7-1 wbit) opc3 opc4 (.sym Imm-16 - smode))
-+ divop modop opmode reg quot rem max min
-+ sem)
-+)
-+(define-pmacro (div32-imm-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 opc4 sem)
-+ (div-imm-defn 32 wstr op (.sym Imm-16 - smode)
-+ (+ (f-0-4 opc1) (f-4-4 opc2) (f-8-3 opc3) (f-11-1 wbit) (f-12-4 opc4) (.sym Imm-16 - smode))
-+ divop modop opmode reg quot rem max min
-+ sem)
-+)
-+(define-pmacro (div-imm-mach mach op divop modop opmode max-QI min-QI max-HI min-HI opc1 opc2 opc3 opc4 sem)
-+ (begin
-+ (.apply (.sym div mach -imm-defn) (QI .b 0 op divop modop opmode R0 R0l R0h max-QI min-QI opc1 opc2 opc3 opc4 sem))
-+ (.apply (.sym div mach -imm-defn) (HI .w 1 op divop modop opmode R2R0 R0 R2 max-HI min-HI opc1 opc2 opc3 opc4 sem))
-+ )
-+)
-+(define-pmacro (div-imm op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc16-4 opc32-1 opc32-2 opc32-3 opc32-4 sem)
-+ (begin
-+ (div-imm-mach 16 op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc16-4 sem)
-+ (div-imm-mach 32 op divop modop opmode max-QI min-QI max-HI min-HI opc32-1 opc32-2 opc32-3 opc32-4 sem)
-+ )
-+)
-+
-+;<divop>.size src -- for m16c and m32c
-+(define-pmacro (div-src-defn mach wstr op src encoding divop modop opmode reg quot rem max min sem)
-+ (dni (.sym op mach wstr - src)
-+ (.str op mach wstr "-" src)
-+ ((machine mach))
-+ (.str op wstr " ${" src "}")
-+ encoding
-+ (sem divop modop opmode reg src quot rem max min)
-+ ())
-+)
-+(define-pmacro (div16-src-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 sem)
-+ (div-src-defn 16 wstr op (.sym dst16-16 - smode)
-+ (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16 - smode))
-+ divop modop opmode reg quot rem max min
-+ sem)
-+)
-+(define-pmacro (div32-src-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 sem)
-+ (begin
-+ ; Multi insns are tried for assembly in the reverse order in which they appear here, so
-+ ; define the absolute-indirect insns first in order to prevent them from being selected
-+ ; when the mode is register-indirect
-+; (div-src-defn 32 wstr op (.sym dst32-24-absolute-indirect- smode)
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (f-18-2 opc2) (f-20-4 opc3) (.sym dst32-24-absolute-indirect - smode))
-+; divop modop opmode reg quot rem max min
-+; sem)
-+ (div-src-defn 32 wstr op (.sym dst32-16-Unprefixed- smode)
-+ (+ (f-0-4 opc1) (f-7-1 wbit) (f-10-2 opc2) (f-12-4 opc3) (.sym dst32-16-Unprefixed- smode))
-+ divop modop opmode reg quot rem max min
-+ sem)
-+; (div-src-defn 32 wstr op (.sym dst32-24-indirect- smode)
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (f-18-2 opc2) (f-20-4 opc3) (.sym dst32-24-indirect - smode))
-+; divop modop opmode reg quot rem max min
-+; sem)
-+ )
-+)
-+(define-pmacro (div-src-mach mach op divop modop opmode max-QI min-QI max-HI min-HI opc1 opc2 opc3 sem)
-+ (begin
-+ (.apply (.sym div mach -src-defn) (QI .b 0 op divop modop opmode R0 R0l R0h max-QI min-QI opc1 opc2 opc3 sem))
-+ (.apply (.sym div mach -src-defn) (HI .w 1 op divop modop opmode R2R0 R0 R2 max-HI min-HI opc1 opc2 opc3 sem))
-+ )
-+)
-+(define-pmacro (div-src op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
-+ (begin
-+ (div-src-mach 16 op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 sem)
-+ (div-src-mach 32 op divop modop opmode max-QI min-QI max-HI min-HI opc32-1 opc32-2 opc32-3 sem)
-+ )
-+)
-+
-+;=============================================================
-+; Bit manipulation
-+;
-+(define-pmacro (bit-insn-defn mach op suffix opnd encoding sem)
-+ (dni (.sym op mach - suffix - opnd)
-+ (.str op mach ":" suffix " " opnd)
-+ ((machine mach))
-+ (.str op "$" suffix " ${" opnd "}")
-+ encoding
-+ (sem opnd)
-+ ())
-+)
-+
-+(define-pmacro (bitsrc16-defn op opc1 opc2 opc3 sem)
-+ (bit-insn-defn 16 op X bit16-16
-+ (+ opc1 opc2 opc3 bit16-16)
-+ sem)
-+)
-+
-+(define-pmacro (bitsrc32-defn op opc1 opc2 opc3 sem)
-+ (begin
-+ (bit-insn-defn 32 op X bit32-24-Prefixed
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) bit32-24-Prefixed (f-15-1 opc2) (f-18-3 opc3))
-+ sem)
-+ )
-+)
-+
-+(define-pmacro (bitsrc-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
-+ (begin
-+ (bitsrc16-defn op opc16-1 opc16-2 opc16-3 sem)
-+ (bitsrc32-defn op opc32-1 opc32-2 opc32-3 sem)
-+ )
-+)
-+
-+(define-pmacro (bitdst16-defn op opc1 opc2 opc3 opc4 opc5 opc6 sem)
-+ (begin
-+ (bit-insn-defn 16 op G bit16-16-basic (+ opc1 opc2 opc3 bit16-16-basic) sem)
-+ (bit-insn-defn 16 op G bit16-16-16 (+ opc1 opc2 opc3 bit16-16-16) sem)
-+ (bit-insn-defn 16 op S bit16-11-S (+ opc4 opc5 opc6 bit16-11-S) sem)
-+ (bit-insn-defn 16 op G bit16-16-8 (+ opc1 opc2 opc3 bit16-16-8) sem)
-+ )
-+)
-+
-+(define-pmacro (bitdst32-defn op opc1 opc2 opc3 sem)
-+ (begin
-+ (bit-insn-defn 32 op X bit32-16-Unprefixed
-+ (+ (f-0-4 opc1) bit32-16-Unprefixed (f-7-1 opc2) (f-10-3 opc3))
-+ sem)
-+ )
-+)
-+
-+(define-pmacro (bitdstnos-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
-+ (begin
-+ (bitsrc16-defn op opc16-1 opc16-2 opc16-3 sem)
-+ (bitdst32-defn op opc32-1 opc32-2 opc32-3 sem)
-+ )
-+)
-+
-+(define-pmacro (bitdst-insn op opc16-1 opc16-2 opc16-3 opc16-4 opc16-5 opc16-6 opc32-1 opc32-2 opc32-3 sem)
-+ (begin
-+ (bitdst16-defn op opc16-1 opc16-2 opc16-3 opc16-4 opc16-5 opc16-6 sem)
-+ (bitdst32-defn op opc32-1 opc32-2 opc32-3 sem)
-+ )
-+)
-+
-+;=============================================================
-+; Bit condition
-+;
-+(define-pmacro (bitcond-insn-defn mach op bit-opnd cond-opnd encoding sem)
-+ (dni (.sym op mach - bit-opnd - cond-opnd)
-+ (.str op mach " " bit-opnd " " cond-opnd)
-+ ((machine mach))
-+ (.str op "${" cond-opnd "} ${" bit-opnd "}")
-+ encoding
-+ (sem mach bit-opnd cond-opnd)
-+ ())
-+)
-+
-+(define-pmacro (bitcond16-defn op opc1 opc2 opc3 sem)
-+ (begin
-+ (bitcond-insn-defn 16 op bit16-16-basic cond16-16 (+ opc1 opc2 opc3 bit16-16-basic cond16-16) sem)
-+ (bitcond-insn-defn 16 op bit16-16-16 cond16-32 (+ opc1 opc2 opc3 bit16-16-16 cond16-32) sem)
-+ (bitcond-insn-defn 16 op bit16-16-8 cond16-24 (+ opc1 opc2 opc3 bit16-16-8 cond16-24) sem)
-+ )
-+)
-+
-+(define-pmacro (bitcond32-defn op opc1 opc2 opc3 sem)
-+ (begin
-+ (bitcond-insn-defn 32 op bit32-16-24-Unprefixed cond32-40
-+ (+ (f-0-4 opc1) bit32-16-24-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-40)
-+ sem)
-+ (bitcond-insn-defn 32 op bit32-16-16-Unprefixed cond32-32
-+ (+ (f-0-4 opc1) bit32-16-16-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-32)
-+ sem)
-+ (bitcond-insn-defn 32 op bit32-16-8-Unprefixed cond32-24
-+ (+ (f-0-4 opc1) bit32-16-8-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-24)
-+ sem)
-+ (bitcond-insn-defn 32 op bit32-basic-Unprefixed cond32-16
-+ (+ (f-0-4 opc1) bit32-basic-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-16)
-+ sem)
-+ )
-+)
-+
-+(define-pmacro (bitcond-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
-+ (begin
-+ (bitcond16-defn op opc16-1 opc16-2 opc16-3 sem)
-+ (bitcond32-defn op opc32-1 opc32-2 opc32-3 sem)
-+ )
-+)
-+
-+;=============================================================
-+;<insn>.size #imm1,#imm2,dst -- for m32c
-+;
-+(define-pmacro (insn-imm1-imm2-dst-defn src1 src2 dstgroup xmode wstr op encoding sem)
-+ (dni (.sym op 32 wstr - src1 - src2 - dstgroup)
-+ (.str op 32 wstr "-" src1 "-" src2 "-" dstgroup "-" xmode)
-+ ((machine 32))
-+ (.str op wstr " #${" src1 "},#${" src2 "},${dst32-" dstgroup "-" xmode "}")
-+ encoding
-+ (sem xmode src1 src2 (.sym dst32- dstgroup - xmode))
-+ ())
-+)
-+
-+; m32c Prefixed variants
-+(define-pmacro (insn32-imm1-imm2-dst-Prefixed-defn xmode wstr wbit base1 base2 base3 base4 op opc1 opc2 opc3 sem)
-+ (begin
-+ (insn-imm1-imm2-dst-defn (.sym Imm-48- xmode) (.sym Imm- base4 - xmode) 24-24-Prefixed xmode wstr op
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
-+ (.sym dst32-24-24-Prefixed- xmode) (.sym Imm-48- xmode) (.sym Imm- base4 - xmode))
-+ sem)
-+ (insn-imm1-imm2-dst-defn (.sym Imm-40- xmode) (.sym Imm- base3 - xmode) 24-16-Prefixed xmode wstr op
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
-+ (.sym dst32-24-16-Prefixed- xmode) (.sym Imm-40- xmode) (.sym Imm- base3 - xmode))
-+ sem)
-+ (insn-imm1-imm2-dst-defn (.sym Imm-32- xmode) (.sym Imm- base2 - xmode) 24-8-Prefixed xmode wstr op
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
-+ (.sym dst32-24-8-Prefixed- xmode) (.sym Imm-32- xmode) (.sym Imm- base2 - xmode))
-+ sem)
-+ (insn-imm1-imm2-dst-defn (.sym Imm-24- xmode) (.sym Imm- base1 - xmode) basic-Prefixed xmode wstr op
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
-+ (.sym dst32-basic-Prefixed- xmode) (.sym Imm-24- xmode) (.sym Imm- base1 - xmode))
-+ sem)
-+ )
-+)
-+
-+; m32c Unprefixed variants
-+(define-pmacro (insn32-imm1-imm2-dst-Unprefixed-defn xmode wstr wbit base1 base2 base3 base4 op opc1 opc2 opc3 sem)
-+ (begin
-+ (insn-imm1-imm2-dst-defn (.sym Imm-40- xmode) (.sym Imm- base4 - xmode) 16-24-Unprefixed xmode wstr op
-+ (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
-+ (.sym dst32-16-24-Unprefixed- xmode) (.sym Imm-40- xmode) (.sym Imm- base4 - xmode))
-+ sem)
-+ (insn-imm1-imm2-dst-defn (.sym Imm-32- xmode) (.sym Imm- base3 - xmode) 16-16-Unprefixed xmode wstr op
-+ (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
-+ (.sym dst32-16-16-Unprefixed- xmode) (.sym Imm-32- xmode) (.sym Imm- base3 - xmode))
-+ sem)
-+ (insn-imm1-imm2-dst-defn (.sym Imm-24- xmode) (.sym Imm- base2 - xmode) 16-8-Unprefixed xmode wstr op
-+ (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
-+ (.sym dst32-16-8-Unprefixed- xmode) (.sym Imm-24- xmode) (.sym Imm- base2 - xmode))
-+ sem)
-+ (insn-imm1-imm2-dst-defn (.sym Imm-16- xmode) (.sym Imm- base1 - xmode) basic-Unprefixed xmode wstr op
-+ (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
-+ (.sym dst32-basic-Unprefixed- xmode) (.sym Imm-16- xmode) (.sym Imm- base1 - xmode))
-+ sem)
-+ )
-+)
-+
-+(define-pmacro (insn-imm1-imm2-dst-Prefixed op opc32-1 opc32-2 opc32-3 sem)
-+ (begin
-+ (insn32-imm1-imm2-dst-Prefixed-defn QI .b 0 32 40 48 56 op opc32-1 opc32-2 opc32-3 sem)
-+ (insn32-imm1-imm2-dst-Prefixed-defn HI .w 1 40 48 56 64 op opc32-1 opc32-2 opc32-3 sem)
-+ )
-+)
-+(define-pmacro (insn-imm1-imm2-dst-Unprefixed op opc32-1 opc32-2 opc32-3 sem)
-+ (begin
-+ (insn32-imm1-imm2-dst-Unprefixed-defn QI .b 0 24 32 40 48 op opc32-1 opc32-2 opc32-3 sem)
-+ (insn32-imm1-imm2-dst-Unprefixed-defn HI .w 1 32 40 48 56 op opc32-1 opc32-2 opc32-3 sem)
-+ )
-+)
-+
-+;=============================================================
-+; Insn definitions
-+;-------------------------------------------------------------
-+; abs - absolute
-+;-------------------------------------------------------------
-+
-+(define-pmacro (abs-sem mode dst)
-+ (sequence ((mode result))
-+ (set result (abs mode dst))
-+ (set obit (eq result dst))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+(unary-insn abs (f-0-4 7) (f-4-3 3) (f-8-4 #xF) #xA #x1 #xF abs-sem)
-+
-+;-------------------------------------------------------------
-+; adcf - addition carry flag
-+;-------------------------------------------------------------
-+
-+(define-pmacro (adcf-sem mode dst)
-+ (sequence ((mode result))
-+ (set result (addc mode dst 0 cbit))
-+ (set obit (add-oflag mode dst 0 cbit))
-+ (set cbit (add-cflag mode dst 0 cbit))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+(unary-insn adcf (f-0-4 7) (f-4-3 3) (f-8-4 #xE) #xB #x1 #xE adcf-sem)
-+
-+;-------------------------------------------------------------
-+; add - binary addition
-+;-------------------------------------------------------------
-+
-+(define-pmacro (add-sem mode src1 dst)
-+ (sequence ((mode result))
-+ (set result (add mode src1 dst))
-+ (set obit (add-oflag mode src1 dst 0))
-+ (set cbit (add-cflag mode src1 dst 0))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+
-+; add.L:G #imm32,dst (m32 #2)
-+(binary-arith32-imm-dst-defn SI SI .l 0 add G #x8 #x3 #x1 add-sem)
-+; add.size:G #imm,dst (m16 #1 m32 #1)
-+(binary-arith-imm-dst add G (f-0-4 7) (f-4-3 3) (f-8-4 4) #x8 #x2 #xE add-sem)
-+; add.size:Q #imm4,dst (m16 #2 m32 #3)
-+(binary-arith-imm4-dst add (f-0-4 #xC) (f-4-3 4) #x7 #x3 add-sem)
-+(binary-arith32-imm4-dst-defn SI .l 1 0 add #x7 #x3 add-sem)
-+; add.b:S #imm8,dst3 (m16 #3)
-+(binary-arith16-b-S-imm8-dst3 add ".b" (f-0-4 8) (f-4-1 0) add-sem)
-+; add.BW:Q #imm4,sp (m16 #7)
-+(binary-arith16-Q-sp add (f-0-4 7) (f-4-4 #xD) (f-8-4 #xB) add-sem)
-+(dnmi add16-bQ-sp "add16-bQ-sp" ()
-+ "add.b:q #${Imm-12-s4},sp"
-+ (emit add16-wQ-sp Imm-12-s4))
-+; add.BW:G #imm,sp (m16 #6)
-+(binary-arith16-G-sp add (f-0-4 7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #xB) add-sem)
-+; add.BW:G src,dst (m16 #4 m32 #6)
-+(binary-arith-src-dst add G (f-0-4 #xA) (f-4-3 0) #x1 #x8 add-sem)
-+; add.B.S src2,r0l/r0h (m16 #5)
-+(binary-arith16-b-S-src2 add (f-0-4 2) (f-4-1 0) add-sem)
-+; add.L:G src,dst (m32 #7)
-+(binary-arith32-src-dst-defn SI SI .l 1 add G #x1 #x2 add-sem)
-+; add.L:S #imm{1,2},A0/A1 (m32 #5)
-+(binary-arith32-l-s-imm1-an add (f-0-2 2) (f-3-4 6) add-sem)
-+; add.L:Q #imm3,sp (m32 #9)
-+(binary-arith32-l-q-imm3-sp add (f-0-2 1) (f-4-3 1) add-sem)
-+; add.L:S #imm8,sp (m32 #10)
-+(binary-arith32-l-s-imm8-sp add (f-0-4 #xb) (f-4-4 6) (f-8-4 0) (f-12-4 3) add-sem)
-+; add.L:G #imm16,sp (m32 #8)
-+(binary-arith32-l-g-imm16-sp add (f-0-4 #xb) (f-4-4 6) (f-8-4 1) (f-12-4 3) add-sem)
-+; add.BW:S #imm,dst2 (m32 #4)
-+(binary-arith32-s-imm-dst QI .b 0 add #x0 #x3 add-sem)
-+(binary-arith32-s-imm-dst HI .w 1 add #x0 #x3 add-sem)
-+
-+;-------------------------------------------------------------
-+; adc - binary add with carry
-+;-------------------------------------------------------------
-+
-+(define-pmacro (addc-sem mode src dst)
-+ (sequence ((mode result))
-+ (set result (addc mode src dst cbit))
-+ (set obit (add-oflag mode src dst cbit))
-+ (set cbit (add-cflag mode src dst cbit))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+
-+; adc.size:G #imm,dst
-+(binary-arith16-imm-dst-defn QI QI .b 0 adc X (f-0-4 7) (f-4-3 3) (f-8-4 6) addc-sem)
-+(binary-arith16-imm-dst-defn HI HI .w 1 adc X (f-0-4 7) (f-4-3 3) (f-8-4 6) addc-sem)
-+(binary-arith32-imm-dst-Prefixed QI QI .b 0 adc X #x8 #x2 #xE addc-sem)
-+(binary-arith32-imm-dst-Prefixed HI HI .w 1 adc X #x8 #x2 #xE addc-sem)
-+
-+; adc.BW:G src,dst
-+(binary-arith16-src-dst-defn QI QI .b 0 adc X (f-0-4 #xB) (f-4-3 0) addc-sem)
-+(binary-arith16-src-dst-defn HI HI .w 1 adc X (f-0-4 #xB) (f-4-3 0) addc-sem)
-+(binary-arith32-src-dst-Prefixed QI QI .b 0 adc X #x1 #x4 addc-sem)
-+(binary-arith32-src-dst-Prefixed HI HI .w 1 adc X #x1 #x4 addc-sem)
-+
-+;-------------------------------------------------------------
-+; dadc - decimal add with carry
-+; dadd - decimal addition
-+;-------------------------------------------------------------
-+
-+(define-pmacro (dadc-sem mode src dst)
-+ (sequence ((mode result))
-+ (set result (subc mode dst src (not cbit)))
-+ (set cbit (sub-cflag mode dst src (not cbit)))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+
-+(define-pmacro (decimal-subtraction16-insn op opc1 opc2)
-+ (begin
-+ ; op.b #imm8,r0l
-+ (dni (.sym op 16.b-imm8)
-+ (.str op ".b #imm8")
-+ ((machine 16))
-+ (.str op ".b #${Imm-16-QI}")
-+ (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 opc1) Imm-16-QI)
-+ ((.sym op -sem) QI Imm-16-QI R0l)
-+ ())
-+ ; op.w #imm16,r0
-+ (dni (.sym op 16.w-imm16)
-+ (.str op ".b #imm16")
-+ ((machine 16))
-+ (.str op ".w #${Imm-16-HI}")
-+ (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 opc1) Imm-16-HI)
-+ ((.sym op -sem) HI Imm-16-HI R0)
-+ ())
-+ ; op.b #r0h,r0l
-+ (dni (.sym op 16.b-r0h-r0l)
-+ (.str op ".b r0h,r0l")
-+ ((machine 16))
-+ (.str op ".b r0h,r0l")
-+ (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 opc2))
-+ ((.sym op -sem) QI R0h R0l)
-+ ())
-+ ; op.w #r1,r0
-+ (dni (.sym op 16.w-r1-r0)
-+ (.str op ".b r1,r0")
-+ ((machine 16))
-+ (.str op ".w r1,r0")
-+ (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 opc2))
-+ ((.sym op -sem) HI R1 R0)
-+ ())
-+ )
-+)
-+
-+; dadc for m16c
-+(decimal-subtraction16-insn dadc #xE #x6 )
-+
-+; dadc.size #imm,dst
-+(binary-arith32-imm-dst-Prefixed QI QI .b 0 dadc X #x8 #x0 #xE dadc-sem)
-+(binary-arith32-imm-dst-Prefixed HI HI .w 1 dadc X #x8 #x0 #xE dadc-sem)
-+; dadc.BW src,dst
-+(binary-arith32-src-dst-Prefixed QI QI .b 0 dadc X #x1 #x8 dadc-sem)
-+(binary-arith32-src-dst-Prefixed HI HI .w 1 dadc X #x1 #x8 dadc-sem)
-+
-+(define-pmacro (dadd-sem mode src dst)
-+ (sequence ((mode result))
-+ (set result (subc mode dst src 0))
-+ (set cbit (sub-cflag mode dst src 0))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+
-+; dadd for m16c
-+(decimal-subtraction16-insn dadd #xC #x4)
-+
-+; dadd.size #imm,dst
-+(binary-arith32-imm-dst-Prefixed QI QI .b 0 dadd X #x8 #x1 #xE dadd-sem)
-+(binary-arith32-imm-dst-Prefixed HI HI .w 1 dadd X #x8 #x1 #xE dadd-sem)
-+; dadd.BW src,dst
-+(binary-arith32-src-dst-Prefixed QI QI .b 0 dadd X #x1 #x0 dadd-sem)
-+(binary-arith32-src-dst-Prefixed HI HI .w 1 dadd X #x1 #x0 dadd-sem)
-+
-+;-------------------------------------------------------------;
-+; addx - Add extend sign with no carry
-+;-------------------------------------------------------------;
-+
-+(define-pmacro (addx-sem mode src dst)
-+ (sequence ((SI source) (SI result))
-+ (set source (zext SI (trunc QI src)))
-+ (set result (add SI source dst))
-+ (set obit (add-oflag SI source dst 0))
-+ (set cbit (add-cflag SI source dst 0))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+
-+; addx #imm,dst
-+(binary-arith32-imm-dst-defn QI SI "" 0 addx X #x8 #x1 #x1 addx-sem)
-+; addx src,dst
-+(binary-arith32-src-dst-defn QI SI "" 0 addx X #x1 #x2 addx-sem)
-+
-+;-------------------------------------------------------------
-+; adjnz - Add/Sub and branch if not zero
-+;-------------------------------------------------------------
-+
-+(define-pmacro (arith-jnz-sem mode src dst label)
-+ (sequence ((mode result))
-+ (set result (add mode src dst))
-+ (set dst result)
-+ (if (ne result 0)
-+ (set pc label)))
-+)
-+
-+; adjnz.size #imm4,dst,label
-+(arith-jnz-imm4-dst adjnz s4 (f-0-4 #xF) (f-4-3 4) #xf #x1 arith-jnz-sem)
-+
-+;-------------------------------------------------------------
-+; and - binary and
-+;-------------------------------------------------------------
-+
-+(define-pmacro (and-sem mode src1 dst)
-+ (sequence ((mode result))
-+ (set result (and mode src1 dst))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+
-+; and.size:G #imm,dst (m16 #1 m32 #1)
-+(binary-arith-imm-dst and G (f-0-4 7) (f-4-3 3) (f-8-4 2) #x8 #x3 #xF and-sem)
-+; and.b:S #imm8,dst3 (m16 #2)
-+(binary-arith16-b-S-imm8-dst3 and ".b" (f-0-4 9) (f-4-1 0) and-sem)
-+; and.BW:G src,dst (m16 #3 m32 #3)
-+(binary-arith-src-dst and G (f-0-4 #x9) (f-4-3 0) #x1 #xD and-sem)
-+; and.B.S src2,r0l/r0h (m16 #4)
-+(binary-arith16-b-S-src2 and (f-0-4 1) (f-4-1 0) and-sem)
-+; and.BW:S #imm,dst2 (m32 #2)
-+(binary-arith32-s-imm-dst QI .b 0 and #x1 #x6 and-sem)
-+(binary-arith32-s-imm-dst HI .w 1 and #x1 #x6 and-sem)
-+
-+;-------------------------------------------------------------
-+; band - bit and
-+;-------------------------------------------------------------
-+
-+(define-pmacro (band-sem src)
-+ (set cbit (and src cbit))
-+)
-+(bitsrc-insn band (f-0-4 7) (f-4-4 #xE) (f-8-4 4) #xD #x0 #x1 band-sem)
-+
-+;-------------------------------------------------------------
-+; bclr - bit clear
-+;-------------------------------------------------------------
-+
-+(define-pmacro (bclr-sem dst)
-+ (set dst 0)
-+)
-+(bitdst-insn bclr (f-0-4 7) (f-4-4 #xE) (f-8-4 8) (f-0-2 1) (f-2-2 0) (f-4-1 0) #xD #x0 #x6 bclr-sem)
-+
-+;-------------------------------------------------------------
-+; bitindex - bit index
-+;-------------------------------------------------------------
-+
-+(define-pmacro (bitindex-sem mode dst)
-+ (set BitIndex dst)
-+)
-+(unary-insn-defn 32 16-Unprefixed QI .b bitindex
-+ (+ (f-0-4 #xC) (f-7-1 0) dst32-16-Unprefixed-QI (f-10-2 #x2) (f-12-4 #xE))
-+ bitindex-sem)
-+(unary-insn-defn 32 16-Unprefixed HI .w bitindex
-+ (+ (f-0-4 #xC) (f-7-1 1) dst32-16-Unprefixed-HI (f-10-2 #x2) (f-12-4 #xE))
-+ bitindex-sem)
-+
-+;-------------------------------------------------------------
-+; bmCnd - bit move condition
-+;-------------------------------------------------------------
-+
-+(define-pmacro (test-condition16 cond)
-+ (case UQI cond
-+ ((#x00) (trunc BI cbit))
-+ ((#x01) (not (or cbit zbit)))
-+ ((#x02) (trunc BI zbit))
-+ ((#x03) (trunc BI sbit))
-+ ((#x04) (or zbit (xor sbit obit)))
-+ ((#x05) (trunc BI obit))
-+ ((#x06) (xor sbit obit))
-+ ((#xf8) (not cbit))
-+ ((#xf9) (or cbit zbit))
-+ ((#xfa) (not zbit))
-+ ((#xfb) (not sbit))
-+ ((#xfc) (not (or zbit (xor sbit obit))))
-+ ((#xfd) (not obit))
-+ ((#xfe) (not (xor sbit obit)))
-+ (else (const BI 0))
-+ )
-+)
-+
-+(define-pmacro (test-condition32 cond)
-+ (case UQI cond
-+ ((#x00) (not cbit))
-+ ((#x01) (or cbit zbit))
-+ ((#x02) (not zbit))
-+ ((#x03) (not sbit))
-+ ((#x04) (not obit))
-+ ((#x05) (not (or zbit (xor sbit obit))))
-+ ((#x06) (not (xor sbit obit)))
-+ ((#x08) (trunc BI cbit))
-+ ((#x09) (not (or cbit zbit)))
-+ ((#x0a) (trunc BI zbit))
-+ ((#x0b) (trunc BI sbit))
-+ ((#x0c) (trunc BI obit))
-+ ((#x0d) (or zbit (xor sbit obit)))
-+ ((#x0e) (xor sbit obit))
-+ (else (const BI 0))
-+ )
-+)
-+
-+(define-pmacro (bitcond-sem mach op cond)
-+ (if ((.sym test-condition mach) cond)
-+ (set op 1)
-+ (set op 0))
-+)
-+(bitcond-insn bm (f-0-4 7) (f-4-4 #xE) (f-8-4 2) #xD #x0 #x2 bitcond-sem)
-+
-+(dni bm16-c
-+ "bm16 C"
-+ ((machine 16))
-+ "bm$cond16c c"
-+ (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xD) cond16c)
-+ (bitcond-sem 16 cbit cond16c)
-+ ())
-+
-+(dni bm32-c
-+ "bm32 C"
-+ ((machine 32))
-+ "bm$cond32 c"
-+ (+ (f-0-4 #xD) (f-4-4 #x9) (f-8-1 0) (f-10-3 5) cond32)
-+ (bitcond-sem 32 cbit cond32)
-+ ())
-+
-+;-------------------------------------------------------------
-+; bnand
-+;-------------------------------------------------------------
-+
-+(define-pmacro (bnand-sem src)
-+ (set cbit (and (inv src) cbit))
-+)
-+(bitsrc-insn bnand (f-0-4 7) (f-4-4 #xE) (f-8-4 5) #xD #x0 #x3 bnand-sem)
-+
-+;-------------------------------------------------------------
-+; bnor
-+;-------------------------------------------------------------
-+
-+(define-pmacro (bnor-sem src)
-+ (set cbit (or (inv src) cbit))
-+)
-+(bitsrc-insn bnor (f-0-4 7) (f-4-4 #xE) (f-8-4 7) #xD #x0 #x6 bnor-sem)
-+
-+;-------------------------------------------------------------
-+; bnot
-+;-------------------------------------------------------------
-+
-+(define-pmacro (bnot-sem dst)
-+ (set dst (inv dst))
-+)
-+(bitdst-insn bnot (f-0-4 7) (f-4-4 #xE) (f-8-4 #xA) (f-0-2 1) (f-2-2 1) (f-4-1 0) #xD #x0 #x3 bnot-sem)
-+
-+;-------------------------------------------------------------
-+; bntst
-+;-------------------------------------------------------------
-+
-+(define-pmacro (bntst-sem src)
-+ (set cbit (inv src))
-+ (set zbit (inv src))
-+)
-+(bitsrc-insn bntst (f-0-4 7) (f-4-4 #xE) (f-8-4 3) #xD #x0 #x0 bntst-sem)
-+
-+;-------------------------------------------------------------
-+; bnxor
-+;-------------------------------------------------------------
-+
-+(define-pmacro (bnxor-sem src)
-+ (set cbit (xor (inv src) cbit))
-+)
-+(bitsrc-insn bnxor (f-0-4 7) (f-4-4 #xE) (f-8-4 #xD) #xD #x0 #x7 bnxor-sem)
-+
-+;-------------------------------------------------------------
-+; bor
-+;-------------------------------------------------------------
-+
-+(define-pmacro (bor-sem src)
-+ (set cbit (or src cbit))
-+)
-+(bitsrc-insn bor (f-0-4 7) (f-4-4 #xE) (f-8-4 #x6) #xD #x0 #x4 bor-sem)
-+
-+;-------------------------------------------------------------
-+; brk
-+;-------------------------------------------------------------
-+
-+(dni brk16
-+ "brk"
-+ ((machine 16))
-+ "brk"
-+ (+ (f-0-4 #x0) (f-4-4 #x0))
-+ (nop)
-+ ())
-+
-+(dni brk32
-+ "brk"
-+ ((machine 32))
-+ "brk"
-+ (+ (f-0-4 #x0) (f-4-4 #x0))
-+ (nop)
-+ ())
-+
-+;-------------------------------------------------------------
-+; brk2
-+;-------------------------------------------------------------
-+
-+(dni brk232
-+ "brk2"
-+ ((machine 32))
-+ "brk2"
-+ (+ (f-0-4 #x0) (f-4-4 #x8))
-+ (nop)
-+ ())
-+
-+;-------------------------------------------------------------
-+; bset
-+;-------------------------------------------------------------
-+
-+(define-pmacro (bset-sem dst)
-+ (set dst 1)
-+)
-+(bitdst-insn bset (f-0-4 7) (f-4-4 #xE) (f-8-4 9) (f-0-2 1) (f-2-2 0) (f-4-1 1) #xD #x0 #x7 bset-sem)
-+
-+;-------------------------------------------------------------
-+; btst
-+;-------------------------------------------------------------
-+
-+(define-pmacro (btst-sem dst)
-+ (set zbit (inv dst))
-+ (set cbit dst)
-+)
-+(bitdst-insn btst (f-0-4 7) (f-4-4 #xE) (f-8-4 #xB) (f-0-2 1) (f-2-2 1) (f-4-1 1) #xD #x0 #x0 btst-sem)
-+
-+;-------------------------------------------------------------
-+; btstc
-+;-------------------------------------------------------------
-+
-+(define-pmacro (btstc-sem dst)
-+ (set zbit (inv dst))
-+ (set cbit dst)
-+ (set dst (const 0))
-+)
-+(bitdstnos-insn btstc (f-0-4 7) (f-4-4 #xE) (f-8-4 #x0) #xD #x0 #x4 btstc-sem)
-+
-+;-------------------------------------------------------------
-+; btsts
-+;-------------------------------------------------------------
-+
-+(define-pmacro (btsts-sem dst)
-+ (set zbit (inv dst))
-+ (set cbit dst)
-+ (set dst (const 0))
-+)
-+(bitdstnos-insn btsts (f-0-4 7) (f-4-4 #xE) (f-8-4 #x1) #xD #x0 #x5 btsts-sem)
-+
-+;-------------------------------------------------------------
-+; bxor
-+;-------------------------------------------------------------
-+
-+(define-pmacro (bxor-sem src)
-+ (set cbit (xor src cbit))
-+)
-+(bitsrc-insn bxor (f-0-4 7) (f-4-4 #xE) (f-8-4 #xC) #xD #x0 #x5 bxor-sem)
-+
-+;-------------------------------------------------------------
-+; clip
-+;-------------------------------------------------------------
-+
-+(define-pmacro (clip-sem mode imm1 imm2 dest)
-+ (sequence ()
-+ (if (gt mode imm1 dest)
-+ (set dest imm1))
-+ (if (lt mode imm2 dest)
-+ (set dest imm2)))
-+)
-+
-+(insn-imm1-imm2-dst-Prefixed clip #x8 #x3 #xE clip-sem)
-+
-+;-------------------------------------------------------------
-+; cmp - binary compare
-+;-------------------------------------------------------------
-+
-+(define-pmacro (cmp-sem mode src1 dst)
-+ (sequence ((mode result))
-+ (set result (sub mode dst src1))
-+ (set obit (sub-oflag mode dst src1 0))
-+ (set cbit (not (sub-cflag mode dst src1 0)))
-+ (set-z-and-s result))
-+)
-+
-+; cmp.L:G #imm32,dst (m32 #2)
-+(binary-arith32-imm-dst-defn SI SI .l 0 cmp G #xA #x3 #x1 cmp-sem)
-+; cmp.size:G #imm,dst (m16 #1 m32 #1)
-+(binary-arith-imm-dst cmp G (f-0-4 7) (f-4-3 3) (f-8-4 8) #x9 #x2 #xE cmp-sem)
-+; cmp.size:Q #imm4,dst (m16 #2 m32 #3)
-+(binary-arith-imm4-dst cmp (f-0-4 #xD) (f-4-3 0) #x7 #x1 cmp-sem)
-+; cmp.b:S #imm8,dst3 (m16 #3)
-+(binary-arith16-b-S-imm8-dst3 cmp ".b" (f-0-4 #xE) (f-4-1 0) cmp-sem)
-+; cmp.BW:G src,dst (m16 #4 m32 #5)
-+(binary-arith-src-dst cmp G (f-0-4 #xC) (f-4-3 0) #x1 #x6 cmp-sem)
-+; cmp.B.S src2,r0l/r0h (m16 #5)
-+(binary-arith16-b-S-src2 cmp (f-0-4 3) (f-4-1 1) cmp-sem)
-+; cmp.L:G src,dst (m32 #6)
-+(binary-arith32-src-dst-defn SI SI .l 1 cmp G #x1 #x1 cmp-sem)
-+; cmp.BW:S #imm,dst2 (m32 #4)
-+(binary-arith32-s-imm-dst QI .b 0 cmp #x1 #x3 cmp-sem)
-+(binary-arith32-s-imm-dst HI .w 1 cmp #x1 #x3 cmp-sem)
-+; cmp.BW:s src2,r0[l] (m32 #7)
-+(binary-arith32-S-src2 cmp QI .b 0 (f-0-2 1) (f-4-3 0) cmp-sem)
-+(binary-arith32-S-src2 cmp HI .w 1 (f-0-2 1) (f-4-3 0) cmp-sem)
-+
-+;-------------------------------------------------------------
-+; cmpx - binary compare extend sign
-+;-------------------------------------------------------------
-+
-+(define-pmacro (cmpx-sem mode src1 dst)
-+ (sequence ((mode result))
-+ (set result (sub mode dst (ext mode src1)))
-+ (set obit (sub-oflag mode dst (ext mode src1) 0))
-+ (set cbit (sub-cflag mode dst (ext mode src1) 0))
-+ (set-z-and-s result))
-+)
-+
-+(binary-arith32-imm-dst-defn QI SI "" 0 cmpx X #xA #x1 #x1 cmpx-sem)
-+
-+;-------------------------------------------------------------
-+; dec - decrement
-+;-------------------------------------------------------------
-+
-+(define-pmacro (dec-sem mode dest)
-+ (sequence ((mode result))
-+ (set result (sub mode dest 1))
-+ (set-z-and-s result)
-+ (set dest result))
-+)
-+
-+(dni dec16.b
-+ "dec.b Dst16-3-S-8"
-+ ((machine 16))
-+ "dec.b ${Dst16-3-S-8}"
-+ (+ (f-0-4 #xA) (f-4-1 #x1) Dst16-3-S-8)
-+ (dec-sem QI Dst16-3-S-8)
-+ ())
-+
-+(dni dec16.w
-+ "dec.w Dst16An-S"
-+ ((machine 16))
-+ "dec.w ${Dst16An-S}"
-+ (+ (f-0-4 #xF) (f-5-3 #x2) Dst16An-S)
-+ (dec-sem HI Dst16An-S)
-+ ())
-+
-+(unary32-defn QI .b 0 dec #xB #x0 #xE dec-sem)
-+(unary32-defn HI .w 1 dec #xB #x0 #xE dec-sem)
-+
-+;-------------------------------------------------------------
-+; div - divide
-+; divu - divide unsigned
-+; divx - divide extension
-+;-------------------------------------------------------------
-+
-+; div.BW #imm
-+(div-imm div div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x1) #xB #x0 #x2 #x3 div-sem)
-+(div-imm divu udiv umod USI 255 0 65535 0 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x0) #xB #x0 #x0 #x3 div-sem)
-+(div-imm divx div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x3) #xB #x2 #x2 #x3 div-sem)
-+; div.BW src
-+(div-src div div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 3) (f-8-4 #xD) #x8 #x1 #xE div-sem)
-+(div-src divu udiv umod USI 255 0 65535 0 (f-0-4 #x7) (f-4-3 3) (f-8-4 #xC) #x8 #x0 #xE div-sem)
-+(div-src divx div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 3) (f-8-4 #x9) #x9 #x1 #xE div-sem)
-+
-+(div-src-defn 32 .l div dst32-24-Prefixed-SI
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x1) (f-20-4 #xf) dst32-24-Prefixed-SI)
-+ div mod SI R2R0 R2R0 NoRemainder #x7fffffff (neg SI #x80000000)
-+ div-sem)
-+(div-src-defn 32 .l divu dst32-24-Prefixed-SI
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x0) (f-20-4 #xf) dst32-24-Prefixed-SI)
-+ udiv umod USI R2R0 R2R0 NoRemainder #x80000000 0
-+ div-sem)
-+(div-src-defn 32 .l divx dst32-24-Prefixed-SI
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x2) (f-20-4 #xf) dst32-24-Prefixed-SI)
-+ div mod SI R2R0 R2R0 NoRemainder #x7fffffff (neg SI #x80000000)
-+ div-sem)
-+
-+;-------------------------------------------------------------
-+; dsbb - decimal subtraction with borrow
-+; dsub - decimal subtraction
-+;-------------------------------------------------------------
-+
-+(define-pmacro (dsbb-sem mode src dst)
-+ (sequence ((mode result))
-+ (set result (subc mode dst src (not cbit)))
-+ (set cbit (sub-cflag mode dst src (not cbit)))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+
-+; dsbb for m16c
-+(decimal-subtraction16-insn dsbb #xF #x7)
-+
-+; dsbb.size #imm,dst
-+(binary-arith32-imm-dst-Prefixed QI QI .b 0 dsbb X #x9 #x0 #xE dsbb-sem)
-+(binary-arith32-imm-dst-Prefixed HI HI .w 1 dsbb X #x9 #x0 #xE dsbb-sem)
-+; dsbb.BW src,dst
-+(binary-arith32-src-dst-Prefixed QI QI .b 0 dsbb X #x1 #xA dsbb-sem)
-+(binary-arith32-src-dst-Prefixed HI HI .w 1 dsbb X #x1 #xA dsbb-sem)
-+
-+(define-pmacro (dsub-sem mode src dst)
-+ (sequence ((mode result))
-+ (set result (subc mode dst src 0))
-+ (set cbit (sub-cflag mode dst src 0))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+
-+; dsub for m16c
-+(decimal-subtraction16-insn dsub #xD #x5)
-+
-+; dsub.size #imm,dst
-+(binary-arith32-imm-dst-Prefixed QI QI .b 0 dsub X #x9 #x1 #xE dsub-sem)
-+(binary-arith32-imm-dst-Prefixed HI HI .w 1 dsub X #x9 #x1 #xE dsub-sem)
-+; dsub.BW src,dst
-+(binary-arith32-src-dst-Prefixed QI QI .b 0 dsub X #x1 #x2 dsub-sem)
-+(binary-arith32-src-dst-Prefixed HI HI .w 1 dsub X #x1 #x2 dsub-sem)
-+
-+;-------------------------------------------------------------
-+; sub - binary subtraction
-+;-------------------------------------------------------------
-+
-+(define-pmacro (sub-sem mode src1 dst)
-+ (sequence ((mode result))
-+ (set result (sub mode dst src1))
-+ (set obit (sub-oflag mode dst src1 0))
-+ (set cbit (sub-cflag mode dst src1 0))
-+ (set dst result)
-+ (set-z-and-s result)))
-+
-+; sub.size:G #imm,dst (m16 #1 m32 #1)
-+(binary-arith-imm-dst sub G (f-0-4 7) (f-4-3 3) (f-8-4 5) #x8 #x3 #xE sub-sem)
-+; sub.b:S #imm8,dst3 (m16 #2)
-+(binary-arith16-b-S-imm8-dst3 sub ".b" (f-0-4 8) (f-4-1 1) sub-sem)
-+; sub.BW:G src,dst (m16 #3 m32 #4)
-+(binary-arith-src-dst sub G (f-0-4 #xA) (f-4-3 4) #x1 #xA sub-sem)
-+; sub.B.S src2,r0l/r0h (m16 #4)
-+(binary-arith16-b-S-src2 sub (f-0-4 2) (f-4-1 1) sub-sem)
-+; sub.L:G #imm32,dst (m32 #2)
-+(binary-arith32-imm-dst-defn SI SI .l 0 sub G #x9 #x3 #x1 sub-sem)
-+; sub.BW:S #imm,dst2 (m32 #3)
-+(binary-arith32-s-imm-dst QI .b 0 sub #x0 #x7 sub-sem)
-+(binary-arith32-s-imm-dst HI .w 1 sub #x0 #x7 sub-sem)
-+; sub.L:G src,dst (m32 #5)
-+(binary-arith32-src-dst-defn SI SI .l 1 sub G #x1 #x0 sub-sem)
-+
-+;-------------------------------------------------------------
-+; enter - enter function
-+; exitd - exit and deallocate stack frame
-+;-------------------------------------------------------------
-+
-+(define-pmacro (enter16-sem mach amt)
-+ (sequence ()
-+ (set (reg h-sp) (sub (reg h-sp) 2))
-+ (set (mem16 HI (reg h-sp)) (reg h-fb))
-+ (set (reg h-fb) (reg h-sp))
-+ (set (reg h-sp) (sub (reg h-sp) amt))))
-+
-+(define-pmacro (exit16-sem mach)
-+ (sequence ((SI newpc))
-+ (set (reg h-sp) (reg h-fb))
-+ (set (reg h-fb) (mem16 HI (reg h-sp)))
-+ (set (reg h-sp) (add (reg h-sp) 2))
-+ (set newpc (mem16 HI (reg h-sp)))
-+ (set (reg h-sp) (add (reg h-sp) 2))
-+ (set newpc (or newpc (sll (mem16 QI (reg h-sp)) (const 16))))
-+ (set (reg h-sp) (add (reg h-sp) 1))
-+ (set pc newpc)))
-+
-+(define-pmacro (enter32-sem mach amt)
-+ (sequence ()
-+ (set (reg h-sp) (sub (reg h-sp) 4))
-+ (set (mem32 SI (reg h-sp)) (reg h-fb))
-+ (set (reg h-fb) (reg h-sp))
-+ (set (reg h-sp) (sub (reg h-sp) amt))))
-+
-+(define-pmacro (exit32-sem mach)
-+ (sequence ((SI newpc))
-+ (set (reg h-sp) (reg h-fb))
-+ (set (reg h-fb) (mem32 SI (reg h-sp)))
-+ (set (reg h-sp) (add (reg h-sp) 4))
-+ (set newpc (mem32 SI (reg h-sp)))
-+ (set (reg h-sp) (add (reg h-sp) 4))
-+ (set pc newpc)))
-+
-+(dni enter16 "enter #Imm-16-QI" ((machine 16))
-+ ("enter #${Dsp-16-u8}")
-+ (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 2) Dsp-16-u8)
-+ (enter16-sem 16 Dsp-16-u8)
-+ ())
-+
-+(dni exitd16 "exitd" ((machine 16))
-+ ("exitd")
-+ (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 2))
-+ (exit16-sem 16)
-+ ())
-+
-+(dni enter32 "enter #Imm-8-QI" ((machine 32))
-+ ("enter #${Dsp-8-u8}")
-+ (+ (f-0-4 #xE) (f-4-4 #xC) Dsp-8-u8)
-+ (enter32-sem 32 Dsp-8-u8)
-+ ())
-+
-+(dni exitd32 "exitd" ((machine 32))
-+ ("exitd")
-+ (+ (f-0-4 #xF) (f-4-4 #xC))
-+ (exit32-sem 32)
-+ ())
-+
-+;-------------------------------------------------------------
-+; fclr - flag register clear
-+; fset - flag register set
-+;-------------------------------------------------------------
-+
-+(define-pmacro (set-flags-sem flag)
-+ (sequence ((SI tmp))
-+ (case DFLT flag
-+ ((#x0) (set cbit 1))
-+ ((#x1) (set dbit 1))
-+ ((#x2) (set zbit 1))
-+ ((#x3) (set sbit 1))
-+ ((#x4) (set bbit 1))
-+ ((#x5) (set obit 1))
-+ ((#x6) (set ibit 1))
-+ ((#x7) (set ubit 1)))
-+ )
-+ )
-+
-+(define-pmacro (clear-flags-sem flag)
-+ (sequence ((SI tmp))
-+ (case DFLT flag
-+ ((#x0) (set cbit 0))
-+ ((#x1) (set dbit 0))
-+ ((#x2) (set zbit 0))
-+ ((#x3) (set sbit 0))
-+ ((#x4) (set bbit 0))
-+ ((#x5) (set obit 0))
-+ ((#x6) (set ibit 0))
-+ ((#x7) (set ubit 0)))
-+ )
-+ )
-+
-+(dni fclr16 "fclr flag" ((machine 16))
-+ ("fclr ${flags16}")
-+ (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) flags16 (f-12-4 5))
-+ (clear-flags-sem flags16)
-+ ())
-+
-+(dni fset16 "fset flag" ((machine 16))
-+ ("fset ${flags16}")
-+ (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) flags16 (f-12-4 4))
-+ (set-flags-sem flags16)
-+ ())
-+
-+(dni fclr "fclr" ((machine 32))
-+ ("fclr ${flags32}")
-+ (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 #xE) (f-12-1 1) flags32)
-+ (clear-flags-sem flags32)
-+ ())
-+
-+(dni fset "fset" ((machine 32))
-+ ("fset ${flags32}")
-+ (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 #xE) (f-12-1 1) flags32)
-+ (set-flags-sem flags32)
-+ ())
-+
-+;-------------------------------------------------------------
-+; inc - increment
-+;-------------------------------------------------------------
-+
-+(define-pmacro (inc-sem mode dest)
-+ (sequence ((mode result))
-+ (set result (add mode dest 1))
-+ (set-z-and-s result)
-+ (set dest result))
-+)
-+
-+(dni inc16.b
-+ "inc.b Dst16-3-S-8"
-+ ((machine 16))
-+ "inc.b ${Dst16-3-S-8}"
-+ (+ (f-0-4 #xA) (f-4-1 #x0) Dst16-3-S-8)
-+ (inc-sem QI Dst16-3-S-8)
-+ ())
-+
-+(dni inc16.w
-+ "inc.w Dst16An-S"
-+ ((machine 16))
-+ "inc.w ${Dst16An-S}"
-+ (+ (f-0-4 #xB) (f-5-3 #x2) Dst16An-S)
-+ (inc-sem HI Dst16An-S)
-+ ())
-+
-+(unary32-defn QI .b 0 inc #xA #x0 #xE inc-sem)
-+(unary32-defn HI .w 1 inc #xA #x0 #xE inc-sem)
-+
-+;-------------------------------------------------------------
-+; freit - fast return from interrupt (m32)
-+; int - interrupt
-+; into - interrupt on overflow
-+;-------------------------------------------------------------
-+
-+; ??? semantics
-+(dni freit32 "FREIT" ((machine 32))
-+ ("freit")
-+ (+ (f-0-4 9) (f-4-4 #xF))
-+ (nop)
-+ ())
-+
-+(dni int16 "int Dsp-10-u6" ((machine 16))
-+ ("int #${Dsp-10-u6}")
-+ (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-2 3) Dsp-10-u6)
-+ (c-call VOID "do_int" pc Dsp-10-u6)
-+ ())
-+
-+(dni into16 "into" ((machine 16))
-+ ("into")
-+ (+ (f-0-4 #xF) (f-4-4 6))
-+ (nop)
-+ ())
-+
-+(dni int32 "int Dsp-8-u6" ((machine 32))
-+ ("int #${Dsp-8-u6}")
-+ (+ (f-0-4 #xB) (f-4-4 #xE) Dsp-8-u6 (f-14-2 0))
-+ (c-call VOID "do_int" pc Dsp-8-u6)
-+ ())
-+
-+(dni into32 "into" ((machine 32))
-+ ("into")
-+ (+ (f-0-4 #xB) (f-4-4 #xF))
-+ (nop)
-+ ())
-+
-+;-------------------------------------------------------------
-+; index (m32c)
-+;-------------------------------------------------------------
-+
-+; TODO add support to insns allowing index
-+(define-pmacro (indexb-sem mode d) (set SrcIndex d) (set DstIndex d))
-+(define-pmacro (indexbd-sem mode d) (set SrcIndex (const 0)) (set DstIndex d))
-+(define-pmacro (indexbs-sem mode d) (set SrcIndex d) (set DstIndex (const 0)))
-+(define-pmacro (indexw-sem mode d)
-+ (set SrcIndex (sll d (const 2))) (set DstIndex (sll d (const 2))))
-+(define-pmacro (indexwd-sem mode d)
-+ (set SrcIndex (const 0)) (set DstIndex (sll d (const 2))))
-+(define-pmacro (indexws-sem mode d)
-+ (set SrcIndex (sll d (const 2))) (set DstIndex (const 0)))
-+(define-pmacro (indexl-sem mode d)
-+ (set SrcIndex d) (set DstIndex (sll d (const 2))))
-+(define-pmacro (indexld-sem mode d)
-+ (set SrcIndex (const 0)) (set DstIndex (sll d (const 2))))
-+(define-pmacro (indexls-sem mode d)
-+ (set SrcIndex (sll d (const 2))) (set DstIndex (const 0)))
-+
-+; Note that "wbit" not where the size bit goes here, hence, it's
-+; always 0 in these calls but op2 differs instead.
-+
-+; indexb src (index byte)
-+(unary32-defn QI .b 0 indexb #x8 0 #x3 indexb-sem)
-+(unary32-defn HI .w 0 indexb #x8 1 #x3 indexb-sem)
-+; indexbd src (index byte dest)
-+(unary32-defn QI .b 0 indexbd #xA 0 3 indexbd-sem)
-+(unary32-defn HI .w 0 indexbd #xA 1 3 indexbd-sem)
-+; indexbs src (index byte src)
-+(unary32-defn QI .b 0 indexbs #xC 0 3 indexbs-sem)
-+(unary32-defn HI .w 0 indexbs #xC 1 3 indexbs-sem)
-+; indexl src (index long)
-+(unary32-defn QI .b 0 indexl 9 2 3 indexl-sem)
-+(unary32-defn HI .w 0 indexl 9 3 3 indexl-sem)
-+; indexld src (index long dest)
-+(unary32-defn QI .b 0 indexld #xB 2 3 indexld-sem)
-+(unary32-defn HI .w 0 indexld #xB 3 3 indexld-sem)
-+; indexls src (index long src)
-+(unary32-defn QI .b 0 indexls 9 0 3 indexls-sem)
-+(unary32-defn HI .w 0 indexls 9 1 3 indexls-sem)
-+; indexw src (index word)
-+(unary32-defn QI .b 0 indexw 8 2 3 indexw-sem)
-+(unary32-defn HI .w 0 indexw 8 3 3 indexw-sem)
-+; indexwd src (index word dest)
-+(unary32-defn QI .b 0 indexwd #xA 2 3 indexwd-sem)
-+(unary32-defn HI .w 0 indexwd #xA 3 3 indexwd-sem)
-+; indexws (index word src)
-+(unary32-defn QI .b 0 indexws #xC 2 3 indexws-sem)
-+(unary32-defn HI .w 0 indexws #xC 3 3 indexws-sem)
-+
-+;-------------------------------------------------------------
-+; jcc - jump on condition
-+;-------------------------------------------------------------
-+
-+(define-pmacro (jcnd32-sem cnd label)
-+ (sequence ()
-+ (case DFLT cnd
-+ ((#x00) (if (not cbit) (set pc label))) ;ltu nc
-+ ((#x01) (if (not (and cbit (not zbit))) (set pc label))) ;leu
-+ ((#x02) (if (not zbit) (set pc label))) ;ne nz
-+ ((#x03) (if (not sbit) (set pc label))) ;pz
-+ ((#x04) (if (not obit) (set pc label))) ;no
-+ ((#x05) (if (not (or zbit (xor sbit obit))) (set pc label))) ;gt
-+ ((#x06) (if (not (xor sbit obit)) (set pc label))) ;ge
-+ ((#x08) (if (trunc BI cbit) (set pc label))) ;geu c
-+ ((#x09) (if (and cbit (not zbit)) (set pc label))) ;gtu
-+ ((#x0a) (if (trunc BI zbit) (set pc label))) ;eq z
-+ ((#x0b) (if (trunc BI sbit) (set pc label))) ;n
-+ ((#x0c) (if (trunc BI obit) (set pc label))) ;o
-+ ((#x0d) (if (or zbit (xor sbit obit)) (set pc label))) ;le
-+ ((#x0e) (if (xor sbit obit) (set pc label))) ;lt
-+ )
-+ )
-+ )
-+
-+(define-pmacro (jcnd16-sem cnd label)
-+ (sequence ()
-+ (case DFLT cnd
-+ ((#x00) (if (trunc BI cbit) (set pc label))) ;geu c
-+ ((#x01) (if (and cbit (not zbit)) (set pc label))) ;gtu
-+ ((#x02) (if (trunc BI zbit) (set pc label))) ;eq z
-+ ((#x03) (if (trunc BI sbit) (set pc label))) ;n
-+ ((#x04) (if (not cbit) (set pc label))) ;ltu nc
-+ ((#x05) (if (not (and cbit (not zbit))) (set pc label))) ;leu
-+ ((#x06) (if (not zbit) (set pc label))) ;ne nz
-+ ((#x07) (if (not sbit) (set pc label))) ;pz
-+ ((#x08) (if (or zbit (xor sbit obit)) (set pc label))) ;le
-+ ((#x09) (if (trunc BI obit) (set pc label))) ;o
-+ ((#x0a) (if (not (xor sbit obit)) (set pc label))) ;ge
-+ ((#x0c) (if (not (or zbit (xor sbit obit))) (set pc label))) ;gt
-+ ((#x0d) (if (not obit) (set pc label))) ;no
-+ ((#x0e) (if (xor sbit obit) (set pc label))) ;lt
-+ )
-+ )
-+ )
-+
-+(dni jcnd16-5
-+ "jCnd label"
-+ (RELAXABLE (machine 16))
-+ "j$cond16j5 ${Lab-8-8}"
-+ (+ (f-0-4 #x6) (f-4-1 1) cond16j5 Lab-8-8)
-+ (jcnd16-sem cond16j5 Lab-8-8)
-+ ()
-+)
-+
-+(dni jcnd16
-+ "jCnd label"
-+ (RELAXABLE (machine 16))
-+ "j$cond16j ${Lab-16-8}"
-+ (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xC) cond16j Lab-16-8)
-+ (jcnd16-sem cond16j Lab-16-8)
-+ ()
-+)
-+
-+(dni jcnd32
-+ "jCnd label"
-+ (RELAXABLE (machine 32))
-+ "j$cond32j ${Lab-8-8}"
-+ (+ (f-0-1 1) (f-4-3 5) cond32j Lab-8-8)
-+ (jcnd32-sem cond32j Lab-8-8)
-+ ()
-+)
-+
-+;-------------------------------------------------------------
-+; jmp - jump
-+;-------------------------------------------------------------
-+
-+; jmp.s label3 (m16 #1)
-+(dni jmp16.s "jmp.s Lab-5-3" (RELAXABLE (machine 16))
-+ ("jmp.s ${Lab-5-3}")
-+ (+ (f-0-4 6) (f-4-1 0) Lab-5-3)
-+ (sequence () (set pc Lab-5-3))
-+ ())
-+; jmp.b label8 (m16 #2)
-+(dni jmp16.b "jmp.b Lab-8-8" (RELAXABLE (machine 16))
-+ ("jmp.b ${Lab-8-8}")
-+ (+ (f-0-4 #xF) (f-4-4 #xE) Lab-8-8)
-+ (sequence () (set pc Lab-8-8))
-+ ())
-+; jmp.w label16 (m16 #3)
-+(dni jmp16.w "jmp.w Lab-8-16" (RELAXABLE (machine 16))
-+ ("jmp.w ${Lab-8-16}")
-+ (+ (f-0-4 #xF) (f-4-4 4) Lab-8-16)
-+ (sequence () (set pc Lab-8-16))
-+ ())
-+; jmp.a label24 (m16 #4)
-+(dni jmp16.a "jmp.a Lab-8-24" ((machine 16))
-+ ("jmp.a ${Lab-8-24}")
-+ (+ (f-0-4 #xF) (f-4-4 #xC) Lab-8-24)
-+ (sequence () (set pc Lab-8-24))
-+ ())
-+
-+(define-pmacro (jmp16-sem mode dst)
-+ (set pc (and dst #xfffff))
-+)
-+(define-pmacro (jmp32-sem mode dst)
-+ (set pc dst)
-+)
-+; jmpi.w dst (m16 #1 m32 #2)
-+(unary-insn-defn 16 16 HI .w jmpi (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 2) dst16-16-HI) jmp16-sem)
-+(unary-insn-defn 32 16-Unprefixed HI .w jmpi (+ (f-0-4 #xC) (f-7-1 1) dst32-16-Unprefixed-HI (f-10-2 #x0) (f-12-4 #xF)) jmp32-sem)
-+; jmpi.a dst (m16 #2 m32 #2)
-+(unary-insn-defn 16 16 SI .a jmpi (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 0) dst16-16-SI) jmp16-sem)
-+(unary-insn-defn 32 16-Unprefixed SI .a jmpi (+ (f-0-4 #x8) (f-7-1 0) dst32-16-Unprefixed-SI (f-10-2 #x0) (f-12-4 1)) jmp32-sem)
-+; jmps imm8 (m16 #1)
-+(dni jmps16 "jmps Imm-8-QI" ((machine 16))
-+ ("jmps #${Imm-8-QI}")
-+ (+ (f-0-4 #xE) (f-4-4 #xE) Imm-8-QI)
-+ (sequence () (set pc Imm-8-QI))
-+ ())
-+; jmp.s label3 (m32 #1)
-+(dni jmp32.s
-+ "jmp.s label"
-+ (RELAXABLE (machine 32))
-+ "jmp.s ${Lab32-jmp-s}"
-+ (+ (f-0-2 1) (f-4-3 5) Lab32-jmp-s)
-+ (set pc Lab32-jmp-s)
-+ ()
-+)
-+; jmp.b label8 (m32 #2)
-+(dni jmp32.b "jmp.b Lab-8-8" (RELAXABLE (machine 32))
-+ ("jmp.b ${Lab-8-8}")
-+ (+ (f-0-4 #xB) (f-4-4 #xB) Lab-8-8)
-+ (set pc Lab-8-8)
-+ ())
-+; jmp.w label16 (m32 #3)
-+(dni jmp32.w "jmp.w Lab-8-16" (RELAXABLE (machine 32))
-+ ("jmp.w ${Lab-8-16}")
-+ (+ (f-0-4 #xC) (f-4-4 #xE) Lab-8-16)
-+ (set pc Lab-8-16)
-+ ())
-+; jmp.a label24 (m32 #4)
-+(dni jmp32.a "jmp.a Lab-8-24" ((machine 32))
-+ ("jmp.a ${Lab-8-24}")
-+ (+ (f-0-4 #xC) (f-4-4 #xC) Lab-8-24)
-+ (set pc Lab-8-24)
-+ ())
-+; jmp.s imm8 (m32 #1)
-+(dni jmps32 "jmps Imm-8-QI" ((machine 32))
-+ ("jmps #${Imm-8-QI}")
-+ (+ (f-0-4 #xD) (f-4-4 #xC) Imm-8-QI)
-+ (set pc Imm-8-QI)
-+ ())
-+
-+;-------------------------------------------------------------
-+; jsr jump subroutine
-+;-------------------------------------------------------------
-+
-+(define-pmacro (jsr16-sem length dst)
-+ (sequence ((SI tpc))
-+ (set tpc (add pc length))
-+ (set (reg h-sp) (sub (reg h-sp) 2))
-+ (set (mem16 HI (reg h-sp)) (srl (and tpc #xffff00) 8))
-+ (set (reg h-sp) (sub (reg h-sp) 1))
-+ (set (mem16 QI (reg h-sp)) (and tpc #xff))
-+ (set pc dst)
-+ )
-+)
-+(define-pmacro (jsr32-sem length dst)
-+ (sequence ((SI tpc))
-+ (set tpc (add pc length))
-+ (set (reg h-sp) (sub (reg h-sp) 2))
-+ (set (mem32 HI (reg h-sp)) (srl (and tpc #xffff0000) 16))
-+ (set (reg h-sp) (sub (reg h-sp) 2))
-+ (set (mem32 HI (reg h-sp)) (and tpc #xffff))
-+ (set pc dst)
-+ )
-+)
-+
-+; jsr.w label16 (m16 #1)
-+(dni jsr16.w "jsr.w Lab-8-16" (RELAXABLE (machine 16))
-+ ("jsr.w ${Lab-8-16}")
-+ (+ (f-0-4 #xF) (f-4-4 5) Lab-8-16)
-+ (jsr16-sem 3 Lab-8-16)
-+ ())
-+; jsr.a label24 (m16 #2)
-+(dni jsr16.a "jsr.a Lab-8-24" ((machine 16))
-+ ("jsr.a ${Lab-8-24}")
-+ (+ (f-0-4 #xF) (f-4-4 #xD) Lab-8-24)
-+ (jsr16-sem 4 Lab-8-24)
-+ ())
-+(define-pmacro (jsri-defn mode op16 op16-1 op16-2 op16-3 op16-sem
-+ op32 op32-1 op32-2 op32-3 op32-4 op32-sem len)
-+ (begin
-+ (dni (.sym jsri16 mode - op16)
-+ (.str "jsri." mode " " op16)
-+ ((machine 16))
-+ (.str "jsri." mode " ${" op16 "}")
-+ (+ op16-1 op16-2 op16-3 op16)
-+ (op16-sem len op16)
-+ ())
-+ (dni (.sym jsri32 mode - op32)
-+ (.str "jsri." mode " " op32)
-+ ((machine 32))
-+ (.str "jsri." mode " ${" op32 "}")
-+ (+ op32-1 op32-2 op32-3 op32-4 op32)
-+ (op32-sem len op32)
-+ ())
-+ )
-+ )
-+; jsri.w dst (m16 #1 m32 #1))
-+(jsri-defn w dst16-16-8-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
-+ dst32-16-8-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 3)
-+(jsri-defn w dst16-16-16-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
-+ dst32-16-16-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 4)
-+(jsri-defn w dst16-basic-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
-+ dst32-basic-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 2)
-+(dni jsri32.w "jsr.w dst32-16-24-Unprefixed-HI" ((machine 32))
-+ ("jsri.w ${dst32-16-24-Unprefixed-HI}")
-+ (+ (f-0-4 #xC) (f-7-1 1) dst32-16-24-Unprefixed-HI (f-10-2 #x1) (f-12-4 #xF))
-+ (jsr32-sem 6 dst32-16-24-Unprefixed-HI)
-+ ())
-+
-+; jsri.a (m16 #2 m32 #2)
-+(jsri-defn a dst16-16-8-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
-+ dst32-16-8-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 3)
-+(jsri-defn a dst16-16-16-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
-+ dst32-16-16-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 4)
-+(jsri-defn a dst16-basic-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
-+ dst32-basic-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 2)
-+
-+(dni jsri32.a "jsr.w dst32-16-24-Unprefixed-HI" ((machine 32))
-+ ("jsri.w ${dst32-16-24-Unprefixed-SI}")
-+ (+ (f-0-4 #x9) (f-7-1 0) dst32-16-24-Unprefixed-SI (f-10-2 #x0) (f-12-4 #x1))
-+ (jsr32-sem 6 dst32-16-24-Unprefixed-SI)
-+ ())
-+; jsr.w label16 (m32 #1)
-+(dni jsr32.w "jsr.w label" (RELAXABLE (machine 32))
-+ ("jsr.w ${Lab-8-16}")
-+ (+ (f-0-4 #xC) (f-4-4 #xF) Lab-8-16)
-+ (jsr32-sem 3 Lab-8-16)
-+ ())
-+; jsr.a label16 (m32 #2)
-+(dni jsr32.a "jsr.a label" ((machine 32))
-+ ("jsr.a ${Lab-8-24}")
-+ (+ (f-0-4 #xC) (f-4-4 #xD) Lab-8-24)
-+ (jsr32-sem 4 Lab-8-24)
-+ ())
-+; jsrs imm8 (m16 #1)
-+(dni jsrs16 "jsrs Imm-8-QI" ((machine 16))
-+ ("jsrs #${Imm-8-QI}")
-+ (+ (f-0-4 #xE) (f-4-4 #xF) Imm-8-QI)
-+ (jsr16-sem 2 Imm-8-QI)
-+ ())
-+; jsrs imm8 (m32 #1)
-+(dni jsrs "jsrs #Imm-8-QI" ((machine 32))
-+ ("jsrs #${Imm-8-QI}")
-+ (+ (f-0-4 #xD) (f-4-4 #xD) Imm-8-QI)
-+ (jsr32-sem 2 Imm-8-QI)
-+ ())
-+
-+;-------------------------------------------------------------
-+; ldc - load control register
-+; stc - store control register
-+;-------------------------------------------------------------
-+
-+(define-pmacro (ldc32-cr1-sem src dst)
-+ (sequence ()
-+ (case DFLT dst
-+ ((#x0) (set (reg h-dct0) src))
-+ ((#x1) (set (reg h-dct1) src))
-+ ((#x2) (sequence ((HI tflag))
-+ (set tflag src)
-+ (if (and tflag #x1) (set cbit 1))
-+ (if (and tflag #x2) (set dbit 1))
-+ (if (and tflag #x4) (set zbit 1))
-+ (if (and tflag #x8) (set sbit 1))
-+ (if (and tflag #x10) (set bbit 1))
-+ (if (and tflag #x20) (set obit 1))
-+ (if (and tflag #x40) (set ibit 1))
-+ (if (and tflag #x80) (set ubit 1))))
-+ ((#x3) (set (reg h-svf) src))
-+ ((#x4) (set (reg h-drc0) src))
-+ ((#x5) (set (reg h-drc1) src))
-+ ((#x6) (set (reg h-dmd0) src))
-+ ((#x7) (set (reg h-dmd1) src))
-+ )
-+ )
-+)
-+(define-pmacro (ldc32-cr2-sem src dst)
-+ (sequence ()
-+ (case DFLT dst
-+ ((#x0) (set (reg h-intb) src))
-+ ((#x1) (set (reg h-sp) src))
-+ ((#x2) (set (reg h-sb) src))
-+ ((#x3) (set (reg h-fb) src))
-+ ((#x4) (set (reg h-svp) src))
-+ ((#x5) (set (reg h-vct) src))
-+ ((#x7) (set (reg h-isp) src))
-+ )
-+ )
-+)
-+(define-pmacro (ldc32-cr3-sem src dst)
-+ (sequence ()
-+ (case DFLT dst
-+ ((#x2) (set (reg h-dma0) src))
-+ ((#x3) (set (reg h-dma1) src))
-+ ((#x4) (set (reg h-dra0) src))
-+ ((#x5) (set (reg h-dra1) src))
-+ ((#x6) (set (reg h-dsa0) src))
-+ ((#x7) (set (reg h-dsa1) src))
-+ )
-+ )
-+)
-+(define-pmacro (ldc16-sem src dst)
-+ (sequence ()
-+ (case DFLT dst
-+ ((#x1) (set (reg h-intb) src))
-+ ((#x2) (set (reg h-intb) (or (reg h-intb) (sll src (const 16)))))
-+ ((#x3) (sequence ((HI tflag))
-+ (set tflag src)
-+ (if (and tflag #x1) (set cbit 1))
-+ (if (and tflag #x2) (set dbit 1))
-+ (if (and tflag #x4) (set zbit 1))
-+ (if (and tflag #x8) (set sbit 1))
-+ (if (and tflag #x10) (set bbit 1))
-+ (if (and tflag #x20) (set obit 1))
-+ (if (and tflag #x40) (set ibit 1))
-+ (if (and tflag #x80) (set ubit 1))))
-+ ((#x4) (set (reg h-isp) src))
-+ ((#x5) (set (reg h-sp) src))
-+ ((#x6) (set (reg h-sb) src))
-+ ((#x7) (set (reg h-fb) src))
-+ )
-+ )
-+)
-+
-+(define-pmacro (stc32-cr1-sem src dst)
-+ (sequence ()
-+ (case DFLT src
-+ ((#x0) (set dst (reg h-dct0)))
-+ ((#x1) (set dst (reg h-dct1)))
-+ ((#x2) (sequence ((HI tflag))
-+ (set tflag 0)
-+ (if (eq cbit 1) (set tflag (or tflag #x1)))
-+ (if (eq dbit 1) (set tflag (or tflag #x2)))
-+ (if (eq zbit 1) (set tflag (or tflag #x4)))
-+ (if (eq sbit 1) (set tflag (or tflag #x8)))
-+ (if (eq bbit 1) (set tflag (or tflag #x10)))
-+ (if (eq obit 1) (set tflag (or tflag #x20)))
-+ (if (eq ibit 1) (set tflag (or tflag #x40)))
-+ (if (eq ubit 1) (set tflag (or tflag #x80)))
-+ (set dst tflag)))
-+ ((#x3) (set dst (reg h-svf)))
-+ ((#x4) (set dst (reg h-drc0)))
-+ ((#x5) (set dst (reg h-drc1)))
-+ ((#x6) (set dst (reg h-dmd0)))
-+ ((#x7) (set dst (reg h-dmd1)))
-+ )
-+ )
-+)
-+(define-pmacro (stc32-cr2-sem src dst)
-+ (sequence ()
-+ (case DFLT src
-+ ((#x0) (set dst (reg h-intb)))
-+ ((#x1) (set dst (reg h-sp)))
-+ ((#x2) (set dst (reg h-sb)))
-+ ((#x3) (set dst (reg h-fb)))
-+ ((#x4) (set dst (reg h-svp)))
-+ ((#x5) (set dst (reg h-vct)))
-+ ((#x7) (set dst (reg h-isp)))
-+ )
-+ )
-+)
-+(define-pmacro (stc32-cr3-sem src dst)
-+ (sequence ()
-+ (case DFLT src
-+ ((#x2) (set dst (reg h-dma0)))
-+ ((#x3) (set dst (reg h-dma1)))
-+ ((#x4) (set dst (reg h-dra0)))
-+ ((#x5) (set dst (reg h-dra1)))
-+ ((#x6) (set dst (reg h-dsa0)))
-+ ((#x7) (set dst (reg h-dsa1)))
-+ )
-+ )
-+)
-+(define-pmacro (stc16-sem src dst)
-+ (sequence ()
-+ (case DFLT src
-+ ((#x1) (set dst (and (reg h-intb) (const #xffff))))
-+ ((#x2) (set dst (srl (reg h-intb) (const 16))))
-+ ((#x3) (sequence ((HI tflag))
-+ (set tflag 0)
-+ (if (eq cbit 1) (set tflag (or tflag #x1)))
-+ (if (eq dbit 1) (set tflag (or tflag #x2)))
-+ (if (eq zbit 1) (set tflag (or tflag #x4)))
-+ (if (eq sbit 1) (set tflag (or tflag #x8)))
-+ (if (eq bbit 1) (set tflag (or tflag #x10)))
-+ (if (eq obit 1) (set tflag (or tflag #x20)))
-+ (if (eq ibit 1) (set tflag (or tflag #x40)))
-+ (if (eq ubit 1) (set tflag (or tflag #x80)))
-+ (set dst tflag)))
-+ ((#x4) (set dst (reg h-isp)))
-+ ((#x5) (set dst (reg h-sp)))
-+ ((#x6) (set dst (reg h-sb)))
-+ ((#x7) (set dst (reg h-fb)))
-+ )
-+ )
-+)
-+
-+(dni ldc16.imm16 "ldc #imm,dst" ((machine 16))
-+ ("ldc #${Imm-16-HI},${cr16}")
-+ (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 0) cr16 Imm-16-HI)
-+ (ldc16-sem Imm-16-HI cr16)
-+ ())
-+
-+(dni ldc16.dst "ldc src,dest" ((machine 16))
-+ ("ldc ${dst16-16-HI},${cr16}")
-+ (+ (f-0-4 7) (f-4-4 #xA) (f-8-1 1) cr16 dst16-16-HI)
-+ (ldc16-sem dst16-16-HI cr16)
-+ ())
-+; ldc src,dest (m32c #4)
-+(dni ldc32.src-cr1 "ldc src,dst" ((machine 32))
-+ ("ldc ${dst32-24-Prefixed-HI},${cr1-Prefixed-32}")
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-HI (f-15-1 1) (f-18-2 0) (f-20-1 1) cr1-Prefixed-32)
-+ (ldc32-cr1-sem dst32-24-Prefixed-HI cr1-Prefixed-32)
-+ ())
-+; ldc src,dest (m32c #5)
-+(dni ldc32.src-cr2 "ldc src,dest" ((machine 32))
-+ ("ldc ${dst32-16-Unprefixed-SI},${cr2-32}")
-+ (+ (f-0-4 #xD) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 0) (f-12-1 0) cr2-32)
-+ (ldc32-cr2-sem dst32-16-Unprefixed-SI cr2-32)
-+ ())
-+; ldc src,dest (m32c #6)
-+(dni ldc32.src-cr3 "ldc src,dst" ((machine 32))
-+ ("ldc ${dst32-24-Prefixed-SI},${cr3-Prefixed-32}")
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-SI (f-15-1 1) (f-18-2 0) (f-20-1 0) cr3-Prefixed-32)
-+ (ldc32-cr3-sem dst32-24-Prefixed-SI cr3-Prefixed-32)
-+ ())
-+; ldc src,dest (m32c #1)
-+(dni ldc32.imm16-cr1 "ldc #imm,dst" ((machine 32))
-+ ("ldc #${Imm-16-HI},${cr1-Unprefixed-32}")
-+ (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32 Imm-16-HI)
-+ (ldc32-cr1-sem Imm-16-HI cr1-Unprefixed-32)
-+ ())
-+; ldc src,dest (m32c #2)
-+(dni ldc32.imm16-cr2 "ldc #imm,dst" ((machine 32))
-+ ("ldc #${Dsp-16-u24},${cr2-32}")
-+ (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 2) (f-12-1 1) cr2-32 Dsp-16-u24)
-+ (ldc32-cr2-sem Dsp-16-u24 cr2-32)
-+ ())
-+; ldc src,dest (m32c #3)
-+(dni ldc32.imm16-cr3 "ldc #imm,dst" ((machine 32))
-+ ("ldc #${Dsp-16-u24},${cr3-Unprefixed-32}")
-+ (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 6) (f-12-1 1) cr3-Unprefixed-32 Dsp-16-u24)
-+ (ldc32-cr3-sem Dsp-16-u24 cr3-Unprefixed-32)
-+ ())
-+
-+(dni stc16.src "stc src,dest" ((machine 16))
-+ ("stc ${cr16},${dst16-16-HI}")
-+ (+ (f-0-4 7) (f-4-4 #xB) (f-8-1 1) cr16 dst16-16-HI)
-+ (stc16-sem cr16 dst16-16-HI )
-+ ())
-+
-+(dni stc16.pc "stc pc,dest" ((machine 16))
-+ ("stc pc,${dst16-16-HI}")
-+ (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xC) dst16-16-HI)
-+ (sequence () (set dst16-16-HI (reg h-pc)))
-+ ())
-+
-+(dni stc32.src-cr1 "stc src,dst" ((machine 32))
-+ ("stc ${cr1-Prefixed-32},${dst32-24-Prefixed-HI}")
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-HI (f-15-1 1) (f-18-2 1) (f-20-1 1) cr1-Prefixed-32)
-+ (stc32-cr1-sem cr1-Prefixed-32 dst32-24-Prefixed-HI )
-+ ())
-+
-+(dni stc32.src-cr2 "stc src,dest" ((machine 32))
-+ ("stc ${cr2-32},${dst32-16-Unprefixed-SI}")
-+ (+ (f-0-4 #xD) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 0) (f-12-1 2) cr2-32)
-+ (stc32-cr2-sem cr2-32 dst32-16-Unprefixed-SI )
-+ ())
-+
-+(dni stc32.src-cr3 "stc src,dst" ((machine 32))
-+ ("stc ${cr3-Prefixed-32},${dst32-24-Prefixed-SI}")
-+ (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-SI (f-15-1 1) (f-18-2 1) (f-20-1 0) cr3-Prefixed-32)
-+ (stc32-cr3-sem cr3-Prefixed-32 dst32-24-Prefixed-SI )
-+ ())
-+
-+;-------------------------------------------------------------
-+; ldctx - load context
-+; stctx - store context
-+;-------------------------------------------------------------
-+
-+; ??? semantics
-+(dni ldctx16 "ldctx abs16,abs24" ((machine 16))
-+ ("ldctx ${Dsp-16-u16},${Dsp-32-u24}")
-+ (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 #x0) Dsp-16-u16 Dsp-32-u24)
-+ (nop)
-+ ())
-+(dni ldctx32 "ldctx abs16,abs24" ((machine 32))
-+ ("ldctx ${Dsp-16-u16},${Dsp-32-u24}")
-+ (+ (f-0-4 #xB) (f-4-4 #x6) (f-8-4 #xC) (f-12-4 #x3) Dsp-16-u16 Dsp-32-u24)
-+ (nop)
-+ ())
-+(dni stctx16 "stctx abs16,abs24" ((machine 16))
-+ ("stctx ${Dsp-16-u16},${Dsp-32-u24}")
-+ (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 #x0) Dsp-16-u16 Dsp-32-u24)
-+ (nop)
-+ ())
-+(dni stctx32 "stctx abs16,abs24" ((machine 32))
-+ ("stctx ${Dsp-16-u16},${Dsp-32-u24}")
-+ (+ (f-0-4 #xB) (f-4-4 #x6) (f-8-4 #xD) (f-12-4 #x3) Dsp-16-u16 Dsp-32-u24)
-+ (nop)
-+ ())
-+
-+;-------------------------------------------------------------
-+; lde - load from extra far data area (m16)
-+; ste - store to extra far data area (m16)
-+;-------------------------------------------------------------
-+
-+(lde-dst QI .b 0)
-+(lde-dst HI .w 1)
-+
-+(ste-dst QI .b 0)
-+(ste-dst HI .w 1)
-+
-+;-------------------------------------------------------------
-+; ldipl - load interrupt permission level
-+;-------------------------------------------------------------
-+
-+; ??? semantics
-+; ldintb <==> ldc #imm,intbh ; ldc #imm,intbl
-+(dni ldipl16.imm "ldipl #imm" ((machine 16))
-+ ("ldipl #${Imm-13-u3}")
-+ (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xA) (f-12-1 0) Imm-13-u3)
-+ (nop)
-+ ())
-+(dni ldipl32.imm "ldipl #imm" ((machine 32))
-+ ("ldipl #${Imm-13-u3}")
-+ (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 #xE) (f-12-1 1) Imm-13-u3)
-+ (nop)
-+ ())
-+
-+
-+;-------------------------------------------------------------
-+; max - maximum value
-+;-------------------------------------------------------------
-+
-+; TODO check semantics for min -1,0
-+(define-pmacro (max-sem mode src dst)
-+ (sequence ()
-+ (if (gt mode src dst)
-+ (set mode dst src)))
-+)
-+
-+; max.size:G #imm,dst
-+(binary-arith32-imm-dst-Prefixed QI QI .b 0 max X #x8 #x3 #xF max-sem)
-+(binary-arith32-imm-dst-Prefixed HI HI .w 1 max X #x8 #x3 #xF max-sem)
-+
-+; max.BW:G src,dst
-+(binary-arith32-src-dst-Prefixed QI QI .b 0 max X #x1 #xD max-sem)
-+(binary-arith32-src-dst-Prefixed HI HI .w 1 max X #x1 #xD max-sem)
-+
-+;-------------------------------------------------------------
-+; min - minimum value
-+;-------------------------------------------------------------
-+
-+(define-pmacro (min-sem mode src dst)
-+ (sequence ()
-+ (if (lt mode src dst)
-+ (set mode dst src)))
-+)
-+
-+; min.size:G #imm,dst
-+(binary-arith32-imm-dst-Prefixed QI QI .b 0 min X #x8 #x2 #xF min-sem)
-+(binary-arith32-imm-dst-Prefixed HI HI .w 1 min X #x8 #x2 #xF min-sem)
-+
-+; min.BW:G src,dst
-+(binary-arith32-src-dst-Prefixed QI QI .b 0 min X #x1 #xC min-sem)
-+(binary-arith32-src-dst-Prefixed HI HI .w 1 min X #x1 #xC min-sem)
-+
-+;-------------------------------------------------------------
-+; mov - move
-+;-------------------------------------------------------------
-+
-+(define-pmacro (mov-sem mode src1 dst)
-+ (sequence ((mode result))
-+ (set result src1)
-+ (set-z-and-s result)
-+ (set mode dst src1))
-+)
-+
-+(define-pmacro (mov-dspsp-dst-sem mach mode src1 dst)
-+ (set dst (mem-mach mach mode (add sp src1)))
-+)
-+
-+(define-pmacro (mov-src-dspsp-sem mach mode src dst1)
-+ (set (mem-mach mach mode (add sp dst1)) src)
-+)
-+
-+(define-pmacro (mov16-imm-an-defn size mode imm regn op1 op2)
-+ (dni (.sym mov16. size .S-imm- regn)
-+ (.str "mov." size ":S " imm "," regn)
-+ ((machine 16))
-+ (.str "mov." size "$S #${" imm "}," regn)
-+ (+ op1 op2 imm)
-+ (mov-sem mode imm (reg (.sym h- regn)))
-+ ())
-+)
-+; mov.size:G #imm,dst (m16 #1 m32 #1)
-+(binary-arith-imm-dst mov G (f-0-4 7) (f-4-3 2) (f-8-4 #xC) #x9 #x2 #xF mov-sem)
-+; mov.L:G #imm32,dst (m32 #2)
-+(binary-arith32-imm-dst-defn SI SI .l 0 mov G #xB #x3 #x1 mov-sem)
-+; mov.BW:S #imm,dst2 (m32 #4)
-+(binary-arith32-s-imm-dst QI .b 0 mov #x0 #x2 mov-sem)
-+(binary-arith32-s-imm-dst HI .w 1 mov #x0 #x2 mov-sem)
-+; mov.b:S #imm8,dst3 (m16 #3)
-+(binary-arith16-b-S-imm8-dst3 mov ".b" (f-0-4 #xC) (f-4-1 0) mov-sem)
-+; mov.b:S #imm8,aN (m16 #4)
-+(mov16-imm-an-defn b QI Imm-8-QI a0 (f-0-4 #xE) (f-4-4 2))
-+(mov16-imm-an-defn b QI Imm-8-QI a1 (f-0-4 #xE) (f-4-4 #xA))
-+(mov16-imm-an-defn w HI Imm-8-HI a0 (f-0-4 #xA) (f-4-4 2))
-+(mov16-imm-an-defn w HI Imm-8-HI a1 (f-0-4 #xA) (f-4-4 #xA))
-+; mov.WL:S #imm,A0/A1 (m32 #5)
-+(define-pmacro (mov32-wl-s-defn mode sz op1 imm regn op2)
-+ (dni (.sym mov32- sz - regn)
-+ (.str "mov." sz ":s" imm "," regn)
-+ ((machine 32))
-+ (.str "mov." sz "$S #${" imm "}," regn)
-+ (+ (f-0-4 op1) (f-4-4 op2) imm)
-+ (mov-sem mode imm (reg (.sym h- regn)))
-+ ())
-+)
-+(mov32-wl-s-defn HI w #x9 Imm-8-HI a0 #xC)
-+(mov32-wl-s-defn HI w #x9 Imm-8-HI a1 #xD)
-+(mov32-wl-s-defn SI l #xB Dsp-8-s24 a0 #xC)
-+(mov32-wl-s-defn SI l #xB Dsp-8-s24 a1 #xD)
-+
-+; mov.size:Q #imm4,dst (m16 #2 m32 #3)
-+(binary-arith16-imm4-dst-defn QI .b 0 0 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
-+(binary-arith16-imm4-dst-defn HI .w 0 1 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
-+(binary-arith32-imm4-dst-defn QI .b 1 0 mov #x7 #x2 mov-sem)
-+(binary-arith32-imm4-dst-defn HI .w 1 1 mov #x7 #x2 mov-sem)
-+
-+; mov.BW:Z #0,dst (m16 #5 m32 #6)
-+(dni mov16.b-Z-imm8-dst3
-+ "mov.b:Z #0,Dst16-3-S-8"
-+ ((machine 16))
-+ "mov.b$Z #0,${Dst16-3-S-8}"
-+ (+ (f-0-4 #xB) (f-4-1 #x0) Dst16-3-S-8)
-+ (mov-sem QI (const 0) Dst16-3-S-8)
-+ ())
-+; (binary-arith16-b-Z-imm8-dst3 mov ".b" (f-0-4 #xB) (f-4-1 0) mov-sem)
-+(binary-arith32-z-imm-dst QI .b 0 mov #x0 #x1 mov-sem)
-+(binary-arith32-z-imm-dst HI .w 1 mov #x0 #x1 mov-sem)
-+; mov.BW:G src,dst (m16 #6 m32 #7)
-+(binary-arith-src-dst mov G (f-0-4 #x7) (f-4-3 1) #x1 #xB mov-sem)
-+; mov.B:S src2,a0/a1 (m16 #7)
-+(dni (.sym mov 16 .b.S-An)
-+ (.str mov ".b:S src2,a[01]")
-+ ((machine 16))
-+ (.str mov ".b$S ${src16-2-S},${Dst16AnQI-S}")
-+ (+ (f-0-4 #x3) (f-4-1 0) Dst16AnQI-S src16-2-S)
-+ (mov-sem QI src16-2-S Dst16AnQI-S)
-+ ())
-+(define-pmacro (mov16-b-s-an-defn op1 op2 op2c)
-+ (dni (.sym mov16.b.S- op1 - op2)
-+ (.str mov ".b:S " op1 "," op2)
-+ ((machine 16))
-+ (.str mov ".b$S " op1 "," op2)
-+ (+ (f-0-4 #x3) op2c)
-+ (mov-sem QI (reg (.sym h- op1)) (reg (.sym h- op2)))
-+ ())
-+ )
-+(mov16-b-s-an-defn r0l a1 (f-4-4 #x4))
-+(mov16-b-s-an-defn r0h a0 (f-4-4 #x0))
-+
-+; mov.L:G src,dst (m32 #8)
-+(binary-arith32-src-dst-defn SI SI .l 1 mov G #x1 #x3 mov-sem)
-+; mov.B:S r0l/r0h,dst2 (m16 #8)
-+(dni (.sym mov 16 .b.S-Rn-An)
-+ (.str mov ".b:S r0[lh],src2")
-+ ((machine 16))
-+ (.str mov ".b$S ${Dst16RnQI-S},${src16-2-S}")
-+ (+ (f-0-4 #x0) (f-4-1 0) Dst16RnQI-S src16-2-S)
-+ (mov-sem QI src16-2-S Dst16RnQI-S)
-+ ())
-+
-+; mov.B.S src2,r0l/r0h (m16 #9)
-+(binary-arith16-b-S-src2 mov (f-0-4 0) (f-4-1 1) mov-sem)
-+
-+; mov.BW:S src2,r0l/r0 (m32 #9)
-+; mov.BW:S src2,r1l/r1 (m32 #10)
-+(define-pmacro (mov32-src-r sz szcode mode src dst opc1 opc2)
-+ (begin
-+ (dni (.sym mov32. sz - src - dst)
-+ (.str "mov." sz "src," dst)
-+ ((machine 32))
-+ (.str "mov." sz "$S ${" (.sym src - mode) "}," dst)
-+ (+ (f-0-2 opc1) (.sym src - mode) (f-4-3 opc2) (f-7-1 szcode))
-+ (mov-sem mode (.sym src - mode) (reg (.sym h- dst)))
-+ ())
-+ )
-+ )
-+(mov32-src-r b 0 QI dst32-2-S-16 r0l 0 4)
-+(mov32-src-r w 1 HI dst32-2-S-16 r0 0 4)
-+(mov32-src-r b 0 QI dst32-2-S-8 r0l 0 4)
-+(mov32-src-r w 1 HI dst32-2-S-8 r0 0 4)
-+(mov32-src-r b 0 QI dst32-2-S-basic r1l 1 7)
-+(mov32-src-r w 1 HI dst32-2-S-basic r1 1 7)
-+(mov32-src-r b 0 QI dst32-2-S-16 r1l 1 7)
-+(mov32-src-r w 1 HI dst32-2-S-16 r1 1 7)
-+(mov32-src-r b 0 QI dst32-2-S-8 r1l 1 7)
-+(mov32-src-r w 1 HI dst32-2-S-8 r1 1 7)
-+
-+; mov.BW:S r0l/r0,dst2 (m32 #11)
-+(define-pmacro (mov32-r-dest sz szcode mode src dst opc1 opc2)
-+ (begin
-+ (dni (.sym mov32. sz - src - dst)
-+ (.str "mov." sz "src," dst)
-+ ((machine 32))
-+ (.str "mov." sz "$S " src ",${" (.sym dst - mode) "}")
-+ (+ (f-0-2 opc1) (.sym dst - mode) (f-4-3 opc2) (f-7-1 szcode))
-+ (mov-sem mode (reg (.sym h- src)) (.sym dst - mode))
-+ ())
-+ )
-+ )
-+(mov32-r-dest b 0 QI r0l dst32-2-S-16 0 0)
-+(mov32-r-dest w 1 HI r0 dst32-2-S-16 0 0)
-+(mov32-r-dest b 0 QI r0l dst32-2-S-8 0 0)
-+(mov32-r-dest w 1 HI r0 dst32-2-S-8 0 0)
-+
-+; mov.L:S src,A0/A1 (m32 #12)
-+(define-pmacro (mov32-src-a src dst dstcode opc1 opc2)
-+ (begin
-+ (dni (.sym mov32. sz - src - dst)
-+ (.str "mov." sz "src," dst)
-+ ((machine 32))
-+ (.str "mov.l" "$S ${" (.sym src - SI) "}," dst)
-+ (+ (f-0-2 opc1) (.sym src - SI) (f-4-3 opc2) (f-7-1 dstcode))
-+ (mov-sem SI (.sym src - SI) (reg (.sym h- dst)))
-+ ())
-+ )
-+ )
-+(mov32-src-a dst32-2-S-16 a0 0 1 4)
-+(mov32-src-a dst32-2-S-16 a1 1 1 4)
-+(mov32-src-a dst32-2-S-8 a0 0 1 4)
-+(mov32-src-a dst32-2-S-8 a1 1 1 4)
-+
-+; mov.BW:G dsp8[sp],dst (m16 #10 m32 #13)
-+; mov.BW:G src,dsp8[sp] (m16 #11 m32 #14)
-+(mov-dspsp-dst mov (f-0-4 #x7) (f-4-3 2) (f-8-4 #xB) #xB #x0 #xF mov-dspsp-dst-sem)
-+(mov-src-dspsp mov (f-0-4 #x7) (f-4-3 2) (f-8-4 #x3) #xA #x0 #xF mov-src-dspsp-sem)
-+
-+;-------------------------------------------------------------
-+; mova - move effective address
-+;-------------------------------------------------------------
-+
-+(define-pmacro (mov16a-defn dst dstop dstcode)
-+ (dni (.sym mova16. src - dst)
-+ (.str "mova src," dst)
-+ ((machine 16))
-+ (.str "mova ${dst16-16-Mova-HI}," dst)
-+ (+ (f-0-4 #xE) (f-4-4 #xB) dst16-16-Mova-HI (f-8-4 dstcode))
-+ (sequence () (set HI (reg dstop) dst16-16-Mova-HI))
-+ ())
-+)
-+(mov16a-defn r0 h-r0 0)
-+(mov16a-defn r1 h-r1 1)
-+(mov16a-defn r2 h-r2 2)
-+(mov16a-defn r3 h-r3 3)
-+(mov16a-defn a0 h-a0 4)
-+(mov16a-defn a1 h-a1 5)
-+
-+(define-pmacro (mov32a-defn dst dstop dstcode)
-+ (dni (.sym mova32. src - dst)
-+ (.str "mova src," dst)
-+ ((machine 32))
-+ (.str "mova ${dst32-16-Unprefixed-Mova-SI}," dst)
-+ (+ (f-0-4 #xD) dst32-16-Unprefixed-Mova-SI (f-7-1 1) (f-10-2 1) (f-12-1 1) (f-13-3 dstcode))
-+ (sequence () (set SI (reg dstop) dst32-16-Unprefixed-Mova-SI))
-+ ())
-+)
-+(mov32a-defn r2r0 h-r2r0 0)
-+(mov32a-defn r3r1 h-r3r1 1)
-+(mov32a-defn a0 h-a0 2)
-+(mov32a-defn a1 h-a1 3)
-+
-+;-------------------------------------------------------------
-+; movDir - move nibble
-+;-------------------------------------------------------------
-+
-+(define-pmacro (movdir-sem nib src dst)
-+ (sequence ((SI tmp))
-+ (case DFLT nib
-+ ((0) (set dst (or (and dst #xf0) (and src #xf))))
-+ ((1) (set dst (or (and dst #x0f) (sll (and src #xf) 4))))
-+ ((2) (set dst (or (and dst #xf0) (srl (and src #xf0) 4))))
-+ ((3) (set dst (or (and dst #x0f) (and src #xf0))))
-+ )
-+ )
-+ )
-+; movDir src,dst
-+(define-pmacro (mov16dir-1-defn nib dircode dir)
-+ (dni (.sym mov nib 16 ".r0l-dst")
-+ (.str "mov" nib " r0l,dst")
-+ ((machine 16))
-+ (.str "mov" nib " r0l,${dst16-16-QI}")
-+ (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 dir) dst16-16-QI)
-+ (movdir-sem dircode (reg h-r0l) dst16-16-QI)
-+ ())
-+)
-+(mov16dir-1-defn ll 0 8)
-+(mov16dir-1-defn lh 1 #xA)
-+(mov16dir-1-defn hl 2 9)
-+(mov16dir-1-defn hh 3 #xB)
-+(define-pmacro (mov16dir-2-defn nib dircode dir)
-+ (dni (.sym mov nib 16 ".src-r0l")
-+ (.str "mov" nib " src,r0l")
-+ ((machine 16))
-+ (.str "mov" nib " ${dst16-16-QI},r0l")
-+ (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 dir) dst16-16-QI)
-+ (movdir-sem dircode dst16-16-QI (reg h-r0l))
-+ ())
-+)
-+(mov16dir-2-defn ll 0 0)
-+(mov16dir-2-defn lh 1 2)
-+(mov16dir-2-defn hl 2 1)
-+(mov16dir-2-defn hh 3 3)
-+
-+(define-pmacro (mov32dir-1-defn nib o1o0)
-+ (dni (.sym mov nib 32 ".r0l-dst")
-+ (.str "mov" nib " r0l,dst")
-+ ((machine 32))
-+ (.str "mov" nib " r0l,${dst32-24-Prefixed-QI}")
-+ (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #xB) dst32-24-Prefixed-QI (f-15-1 0) (f-18-2 o1o0) (f-20-4 #xE))
-+ (movdir-sem o1o0 (reg h-r0l) dst32-24-Prefixed-QI)
-+ ())
-+)
-+(mov32dir-1-defn ll 0)
-+(mov32dir-1-defn lh 1)
-+(mov32dir-1-defn hl 2)
-+(mov32dir-1-defn hh 3)
-+(define-pmacro (mov32dir-2-defn nib o1o0)
-+ (dni (.sym mov nib 32 ".src-r0l")
-+ (.str "mov" nib " src,r0l")
-+ ((machine 32))
-+ (.str "mov" nib " ${dst32-24-Prefixed-QI},r0l")
-+ (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #xA) dst32-24-Prefixed-QI (f-15-1 0) (f-18-2 o1o0) (f-20-4 #xE))
-+ (movdir-sem o1o0 dst32-24-Prefixed-QI (reg h-r0l))
-+ ())
-+)
-+(mov32dir-2-defn ll 0)
-+(mov32dir-2-defn lh 1)
-+(mov32dir-2-defn hl 2)
-+(mov32dir-2-defn hh 3)
-+
-+;-------------------------------------------------------------
-+; movx - move extend sign (m32)
-+;-------------------------------------------------------------
-+
-+(define-pmacro (movx-sem mode src dst)
-+ (sequence ((SI source) (SI result))
-+ (set SI result src)
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+
-+; movx #imm,dst
-+(binary-arith32-imm-dst-defn QI SI "" 0 movx X #xB #x1 #x1 movx-sem)
-+
-+;-------------------------------------------------------------
-+; mul - multiply
-+;-------------------------------------------------------------
-+
-+(define-pmacro (mul-sem mode src1 dst)
-+ (sequence ((mode result))
-+ (set obit (add-oflag mode src1 dst 0))
-+ (set result (mul mode src1 dst))
-+ (set dst result))
-+)
-+
-+; mul.BW #imm,dst
-+(binary-arith-imm-dst mul G (f-0-4 7) (f-4-3 6) (f-8-4 5) #x8 #x1 #xF mul-sem)
-+; mul.BW src,dst
-+(binary-arith-src-dst mul G (f-0-4 #x7) (f-4-3 4) #x1 #xC mul-sem)
-+
-+;-------------------------------------------------------------
-+; mulex - multiple extend sign (m32)
-+;-------------------------------------------------------------
-+
-+; mulex src,dst
-+; (dni mulex-absolute-indirect "mulex [src]" ((machine 32))
-+; ("mulex ${dst32-24-absolute-indirect-HI}")
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-4 #xC) dst32-24-absolute-indirect-HI (f-15-1 1) (f-18-2 3) (f-20-4 #xE))
-+; (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-24-absolute-indirect-HI)))
-+; ())
-+(dni mulex "mulex src" ((machine 32))
-+ ("mulex ${dst32-16-Unprefixed-Mulex-HI}")
-+ (+ (f-0-4 #xC) dst32-16-Unprefixed-Mulex-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE))
-+ (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-16-Unprefixed-Mulex-HI)))
-+ ())
-+; (dni mulex-indirect "mulex [src]" ((machine 32))
-+; ("mulex ${dst32-24-indirect-HI}")
-+; (+ (f-0-4 0) (f-4-4 9) (f-8-4 #xC) dst32-24-indirect-HI (f-15-1 1) (f-18-2 3) (f-20-4 #xE))
-+; (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-24-indirect-HI)))
-+; ())
-+
-+;-------------------------------------------------------------
-+; mulu - multiply unsigned
-+;-------------------------------------------------------------
-+
-+(define-pmacro (mulu-sem mode src1 dst)
-+ (sequence ((mode result))
-+ (set obit (add-oflag mode src1 dst 0))
-+ (set result (mul mode src1 dst))
-+ (set dst result))
-+)
-+
-+; mulu.BW #imm,dst
-+(binary-arith-imm-dst mulu G (f-0-4 7) (f-4-3 6) (f-8-4 4) #x8 #x0 #xF mulu-sem)
-+; mulu.BW src,dst
-+(binary-arith-src-dst mulu G (f-0-4 #x7) (f-4-3 0) #x1 #x4 mulu-sem)
-+
-+;-------------------------------------------------------------
-+; neg - twos complement
-+;-------------------------------------------------------------
-+
-+(define-pmacro (neg-sem mode dst)
-+ (sequence ((mode result))
-+ (set result (neg mode dst))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+
-+; neg.BW:G
-+(unary-insn neg (f-0-4 7) (f-4-3 2) (f-8-4 #x5) #xA #x2 #xF neg-sem)
-+
-+;-------------------------------------------------------------
-+; not - twos complement
-+;-------------------------------------------------------------
-+
-+(define-pmacro (not-sem mode dst)
-+ (sequence ((mode result))
-+ (set result (not mode dst))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+
-+; not.BW:G
-+(unary-insn-g not (f-0-4 7) (f-4-3 2) (f-8-4 #x7) #xA #x1 #xE not-sem)
-+
-+(dni not16.b.s
-+ "not.b:s Dst16-3-S-8"
-+ ((machine 16))
-+ "not.b:s ${Dst16-3-S-8}"
-+ (+ (f-0-4 #xb) (f-4-1 #x1) Dst16-3-S-8)
-+ (not-sem QI Dst16-3-S-8)
-+ ())
-+
-+;-------------------------------------------------------------
-+; nop
-+;-------------------------------------------------------------
-+
-+(dni nop16
-+ "nop"
-+ ((machine 16))
-+ "nop"
-+ (+ (f-0-4 #x0) (f-4-4 #x4))
-+ (nop)
-+ ())
-+
-+(dni nop32
-+ "nop"
-+ ((machine 32))
-+ "nop"
-+ (+ (f-0-4 #xD) (f-4-4 #xE))
-+ (nop)
-+ ())
-+
-+;-------------------------------------------------------------
-+; or - logical or
-+;-------------------------------------------------------------
-+
-+(define-pmacro (or-sem mode src1 dst)
-+ (sequence ((mode result))
-+ (set result (or mode src1 dst))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+
-+; or.BW #imm,dst (m16 #1 m32 #1)
-+(binary-arith-imm-dst or G (f-0-4 7) (f-4-3 3) (f-8-4 3) #x8 #x2 #xF or-sem)
-+; or.b:S #imm8,dst3 (m16 #2 m32 #2)
-+(binary-arith16-b-S-imm8-dst3 or ".b" (f-0-4 9) (f-4-1 1) or-sem)
-+(binary-arith32-s-imm-dst QI .b 0 or #x1 #x2 or-sem)
-+(binary-arith32-s-imm-dst HI .w 1 or #x1 #x2 or-sem)
-+; or.BW src,dst (m16 #3 m32 #3)
-+(binary-arith-src-dst or G (f-0-4 #x9) (f-4-3 4) #x1 #x5 or-sem)
-+
-+;-------------------------------------------------------------
-+; pop - restore register/memory
-+;-------------------------------------------------------------
-+
-+; TODO future: split this into .b and .w semantics
-+(define-pmacro (pop-sem-mach mach mode dst)
-+ (sequence ((mode b_or_w) (SI length))
-+ (set b_or_w -1)
-+ (set b_or_w (srl b_or_w #x8))
-+ (if (eq b_or_w #x0)
-+ (set length 1) ; .b
-+ (set length 2)) ; .w
-+
-+ (case DFLT length
-+ ((1) (set dst (mem-mach mach QI (reg h-sp))))
-+ ((2) (set dst (mem-mach mach HI (reg h-sp)))))
-+ (set (reg h-sp) (add (reg h-sp) length))
-+ )
-+)
-+
-+(define-pmacro (pop-sem16 mode dest) (pop-sem-mach 16 mode dest))
-+(define-pmacro (pop-sem32 mode dest) (pop-sem-mach 32 mode dest))
-+
-+; pop.BW:G (m16 #1)
-+(unary-insn-mach 16 pop (f-0-4 7) (f-4-3 2) (f-8-4 #xD) pop-sem16)
-+; pop.BW:G (m32 #1)
-+(unary-insn-mach 32 pop #xB #x2 #xF pop-sem32)
-+
-+; pop.b:S r0l/r0h
-+(dni pop16.b-s-rn "pop.b:S r0[lh]" ((machine 16))
-+ "pop.b$S ${Rn16-push-S-anyof}"
-+ (+ (f-0-4 #x9) Rn16-push-S-anyof (f-5-3 #x2))
-+ (pop-sem16 QI Rn16-push-S-anyof)
-+ ())
-+; pop.w:S a0/a1
-+(dni pop16.b-s-an "pop.w:S a[01]" ((machine 16))
-+ "pop.w$S ${An16-push-S-anyof}"
-+ (+ (f-0-4 #xD) An16-push-S-anyof (f-5-3 #x2))
-+ (pop-sem16 HI An16-push-S-anyof)
-+ ())
-+
-+;-------------------------------------------------------------
-+; popc - pop control register
-+; pushc - push control register
-+;-------------------------------------------------------------
-+
-+(define-pmacro (popc32-cr1-sem mode dst)
-+ (sequence ()
-+ (case DFLT dst
-+ ((#x0) (set (reg h-dct0) (mem32 mode (reg h-sp))))
-+ ((#x1) (set (reg h-dct1) (mem32 mode (reg h-sp))))
-+ ((#x2) (sequence ((HI tflag))
-+ (set tflag (mem32 mode (reg h-sp)))
-+ (if (and tflag #x1) (set cbit 1))
-+ (if (and tflag #x2) (set dbit 1))
-+ (if (and tflag #x4) (set zbit 1))
-+ (if (and tflag #x8) (set sbit 1))
-+ (if (and tflag #x10) (set bbit 1))
-+ (if (and tflag #x20) (set obit 1))
-+ (if (and tflag #x40) (set ibit 1))
-+ (if (and tflag #x80) (set ubit 1))))
-+ ((#x3) (set (reg h-svf) (mem32 mode (reg h-sp))))
-+ ((#x4) (set (reg h-drc0) (mem32 mode (reg h-sp))))
-+ ((#x5) (set (reg h-drc1) (mem32 mode (reg h-sp))))
-+ ((#x6) (set (reg h-dmd0) (mem32 mode (reg h-sp))))
-+ ((#x7) (set (reg h-dmd1) (mem32 mode (reg h-sp))))
-+ )
-+ (set (reg h-sp) (add (reg h-sp) 2))
-+ )
-+)
-+(define-pmacro (popc32-cr2-sem mode dst)
-+ (sequence ()
-+ (case DFLT dst
-+ ((#x0) (set (reg h-intb) (mem32 mode (reg h-sp))))
-+ ((#x1) (set (reg h-sp) (mem32 mode (reg h-sp))))
-+ ((#x2) (set (reg h-sb) (mem32 mode (reg h-sp))))
-+ ((#x3) (set (reg h-fb) (mem32 mode (reg h-sp))))
-+ ((#x7) (set (reg h-isp) (mem32 mode (reg h-sp))))
-+ )
-+ (set (reg h-sp) (add (reg h-sp) 4))
-+ )
-+)
-+(define-pmacro (popc16-sem mode dst)
-+ (sequence ()
-+ (case DFLT dst
-+ ((#x1) (set (reg h-intb) (or (and (reg h-intb) #x0000)
-+ (mem16 mode (reg h-sp)))))
-+ ((#x2) (set (reg h-intb) (or (and (reg h-intb) #xffff0000)
-+ (mem16 mode (reg h-sp)))))
-+ ((#x3) (sequence ((HI tflag))
-+ (set tflag (mem16 mode (reg h-sp)))
-+ (if (and tflag #x1) (set cbit 1))
-+ (if (and tflag #x2) (set dbit 1))
-+ (if (and tflag #x4) (set zbit 1))
-+ (if (and tflag #x8) (set sbit 1))
-+ (if (and tflag #x10) (set bbit 1))
-+ (if (and tflag #x20) (set obit 1))
-+ (if (and tflag #x40) (set ibit 1))
-+ (if (and tflag #x80) (set ubit 1))))
-+ ((#x4) (set (reg h-isp) (mem16 mode (reg h-sp))))
-+ ((#x5) (set (reg h-sp) (mem16 mode (reg h-sp))))
-+ ((#x6) (set (reg h-sb) (mem16 mode (reg h-sp))))
-+ ((#x7) (set (reg h-fb) (mem16 mode (reg h-sp))))
-+ )
-+ (set (reg h-sp) (add (reg h-sp) 2))
-+ )
-+)
-+; popc dest (m16c #1)
-+(dni popc16.imm16 "popc dst" ((machine 16))
-+ ("popc ${cr16}")
-+ (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 3) cr16)
-+ (popc16-sem HI cr16)
-+ ())
-+; popc dest (m32c #1)
-+(dni popc32.imm16-cr1 "popc dst" ((machine 32))
-+ ("popc ${cr1-Unprefixed-32}")
-+ (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32)
-+ (popc32-cr1-sem HI cr1-Unprefixed-32)
-+ ())
-+; popc dest (m32c #2)
-+(dni popc32.imm16-cr2 "popc dst" ((machine 32))
-+ ("popc ${cr2-32}")
-+ (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 2) (f-12-1 1) cr2-32)
-+ (popc32-cr2-sem SI cr2-32)
-+ ())
-+
-+(define-pmacro (pushc32-cr1-sem mode dst)
-+ (sequence ()
-+ (set (reg h-sp) (sub (reg h-sp) 2))
-+ (case DFLT dst
-+ ((#x0) (set (mem32 mode (reg h-sp)) (reg h-dct0)))
-+ ((#x1) (set (mem32 mode (reg h-sp)) (reg h-dct1)))
-+ ((#x2) (sequence ((HI tflag))
-+ (set tflag 0)
-+ (if (eq cbit 1) (set tflag (or tflag #x1)))
-+ (if (eq dbit 1) (set tflag (or tflag #x2)))
-+ (if (eq zbit 1) (set tflag (or tflag #x4)))
-+ (if (eq sbit 1) (set tflag (or tflag #x8)))
-+ (if (eq bbit 1) (set tflag (or tflag #x10)))
-+ (if (eq obit 1) (set tflag (or tflag #x20)))
-+ (if (eq ibit 1) (set tflag (or tflag #x40)))
-+ (if (eq ubit 1) (set tflag (or tflag #x80)))
-+ (set (mem32 mode (reg h-sp)) tflag)))
-+ ((#x3) (set (mem32 mode (reg h-sp)) (reg h-svf)))
-+ ((#x4) (set (mem32 mode (reg h-sp)) (reg h-drc0)))
-+ ((#x5) (set (mem32 mode (reg h-sp)) (reg h-drc1)))
-+ ((#x6) (set (mem32 mode (reg h-sp)) (reg h-dmd0)))
-+ ((#x7) (set (mem32 mode (reg h-sp)) (reg h-dmd1)))
-+ )
-+ )
-+)
-+(define-pmacro (pushc32-cr2-sem mode dst)
-+ (sequence ()
-+ (set (reg h-sp) (sub (reg h-sp) 4))
-+ (case DFLT dst
-+ ((#x0) (set (mem32 mode (reg h-sp)) (reg h-intb)))
-+ ((#x1) (set (mem32 mode (reg h-sp)) (reg h-sp)))
-+ ((#x2) (set (mem32 mode (reg h-sp)) (reg h-sb)))
-+ ((#x3) (set (mem32 mode (reg h-sp)) (reg h-fb)))
-+ ((#x7) (set (mem32 mode (reg h-sp)) (reg h-isp)))
-+ )
-+ )
-+)
-+(define-pmacro (pushc16-sem mode dst)
-+ (sequence ()
-+ (set (reg h-sp) (sub (reg h-sp) 2))
-+ (case DFLT dst
-+ ((#x1) (set (mem16 mode (reg h-sp)) (and (reg h-intb) #xffff)))
-+ ((#x2) (set (mem16 mode (reg h-sp)) (and (reg h-intb) #xffff0000)))
-+ ((#x3) (sequence ((HI tflag))
-+ (if (eq cbit 1) (set tflag (or tflag #x1)))
-+ (if (eq dbit 1) (set tflag (or tflag #x2)))
-+ (if (eq zbit 1) (set tflag (or tflag #x4)))
-+ (if (eq sbit 1) (set tflag (or tflag #x8)))
-+ (if (eq bbit 1) (set tflag (or tflag #x10)))
-+ (if (eq obit 1) (set tflag (or tflag #x20)))
-+ (if (eq ibit 1) (set tflag (or tflag #x40)))
-+ (if (eq ubit 1) (set tflag (or tflag #x80)))
-+ (set (mem16 mode (reg h-sp)) tflag)))
-+
-+ ((#x4) (set (mem16 mode (reg h-sp)) (reg h-isp)))
-+ ((#x5) (set (mem16 mode (reg h-sp)) (reg h-sp)))
-+ ((#x6) (set (mem16 mode (reg h-sp)) (reg h-sb)))
-+ ((#x7) (set (mem16 mode (reg h-sp)) (reg h-fb)))
-+ )
-+ )
-+)
-+; pushc src (m16c)
-+(dni pushc16.imm16 "pushc dst" ((machine 16))
-+ ("pushc ${cr16}")
-+ (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 2) cr16)
-+ (pushc16-sem HI cr16)
-+ ())
-+; pushc src (m32c #1)
-+(dni pushc32.imm16-cr1 "pushc dst" ((machine 32))
-+ ("pushc ${cr1-Unprefixed-32}")
-+ (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32)
-+ (pushc32-cr1-sem HI cr1-Unprefixed-32)
-+ ())
-+; pushc src (m32c #2)
-+(dni pushc32.imm16-cr2 "pushc dst" ((machine 32))
-+ ("pushc ${cr2-32}")
-+ (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 2) (f-12-1 1) cr2-32)
-+ (pushc32-cr2-sem SI cr2-32)
-+ ())
-+
-+;-------------------------------------------------------------
-+; popm - pop multiple
-+; pushm - push multiple
-+;-------------------------------------------------------------
-+
-+(define-pmacro (popm-sem machine dst)
-+ (sequence ((SI addrlen))
-+ (if (eq machine 16)
-+ (set addrlen 2)
-+ (set addrlen 4))
-+ (if (and dst 1)
-+ (sequence () (set R0 (mem-mach machine HI (reg h-sp)))
-+ (set (reg h-sp) (add (reg h-sp) 2))))
-+ (if (and dst 2)
-+ (sequence () (set R1 (mem-mach machine HI (reg h-sp)))
-+ (set (reg h-sp) (add (reg h-sp) 2))))
-+ (if (and dst 4)
-+ (sequence () (set R2 (mem-mach machine HI (reg h-sp)))
-+ (set (reg h-sp) (add (reg h-sp) 2))))
-+ (if (and dst 8)
-+ (sequence () (set R3 (mem-mach machine HI (reg h-sp)))
-+ (set (reg h-sp) (add (reg h-sp) 2))))
-+ (if (and dst 16)
-+ (sequence () (set A0 (mem-mach machine HI (reg h-sp)))
-+ (set (reg h-sp) (add (reg h-sp) addrlen))))
-+ (if (and dst 32)
-+ (sequence () (set A1 (mem-mach machine HI (reg h-sp)))
-+ (set (reg h-sp) (add (reg h-sp) addrlen))))
-+ (if (and dst 64)
-+ (sequence () (set (reg h-sb) (mem-mach machine HI (reg h-sp)))
-+ (set (reg h-sp) (add (reg h-sp) addrlen))))
-+ (if (eq dst 128)
-+ (sequence () (set (reg h-fb) (mem-mach machine HI (reg h-sp)))
-+ (set (reg h-sp) (add (reg h-sp) addrlen))))
-+ )
-+)
-+
-+(define-pmacro (pushm-sem machine dst)
-+ (sequence ((SI count) (SI addrlen))
-+ (if (eq machine 16)
-+ (set addrlen 2)
-+ (set addrlen 4))
-+ (if (eq dst 1)
-+ (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
-+ (set (mem-mach machine HI (reg h-sp)) (reg h-fb))))
-+ (if (and dst 2)
-+ (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
-+ (set (mem-mach machine HI (reg h-sp)) (reg h-sb))))
-+ (if (and dst 4)
-+ (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
-+ (set (mem-mach machine HI (reg h-sp)) A1)))
-+ (if (and dst 8)
-+ (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
-+ (set (mem-mach machine HI (reg h-sp)) A0)))
-+ (if (and dst 16)
-+ (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
-+ (set (mem-mach machine HI (reg h-sp)) R3)))
-+ (if (and dst 32)
-+ (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
-+ (set (mem-mach machine HI (reg h-sp)) R2)))
-+ (if (and dst 64)
-+ (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
-+ (set (mem-mach machine HI (reg h-sp)) R1)))
-+ (if (and dst 128)
-+ (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
-+ (set (mem-mach machine HI (reg h-sp)) R0)))
-+ )
-+)
-+
-+(dni popm16 "popm regs" ((machine 16))
-+ ("popm ${Regsetpop}")
-+ (+ (f-0-4 #xE) (f-4-4 #xD) Regsetpop)
-+ (popm-sem 16 Regsetpop)
-+ ())
-+(dni pushm16 "pushm regs" ((machine 16))
-+ ("pushm ${Regsetpush}")
-+ (+ (f-0-4 #xE) (f-4-4 #xC) Regsetpush)
-+ (pushm-sem 16 Regsetpush)
-+ ())
-+(dni popm "popm regs" ((machine 32))
-+ ("popm ${Regsetpop}")
-+ (+ (f-0-4 #x8) (f-4-4 #xE) Regsetpop)
-+ (popm-sem 32 Regsetpop)
-+ ())
-+(dni pushm "pushm regs" ((machine 32))
-+ ("pushm ${Regsetpush}")
-+ (+ (f-0-4 #x8) (f-4-4 #xF) Regsetpush)
-+ (pushm-sem 32 Regsetpush)
-+ ())
-+
-+;-------------------------------------------------------------
-+; push - Save register/memory/immediate data
-+;-------------------------------------------------------------
-+
-+; TODO future: split this into .b and .w semantics
-+(define-pmacro (push-sem-mach mach mode dst)
-+ (sequence ((mode b_or_w) (SI length))
-+ (set b_or_w -1)
-+ (set b_or_w (srl b_or_w #x8))
-+ (if (eq b_or_w #x0)
-+ (set length 1) ; .b
-+ (if (eq b_or_w #xff)
-+ (set length 2) ; .w
-+ (set length 4))) ; .l
-+ (set (reg h-sp) (sub (reg h-sp) length))
-+ (case DFLT length
-+ ((1) (set (mem-mach mach QI (reg h-sp)) dst))
-+ ((2) (set (mem-mach mach HI (reg h-sp)) dst))
-+ ((4) (set (mem-mach mach SI (reg h-sp)) dst)))
-+ )
-+ )
-+
-+(define-pmacro (push-sem16 mode dst) (push-sem-mach 16 mode dst))
-+(define-pmacro (push-sem32 mode dst) (push-sem-mach 32 mode dst))
-+
-+; push.BW:G imm (m16 #1 m32 #1)
-+(dni push16.b.G-imm "push.b:G #Imm-16-QI" ((machine 16))
-+ ("push.b$G #${Imm-16-QI}")
-+ (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 2) Imm-16-QI)
-+ (push-sem16 QI Imm-16-QI)
-+ ())
-+
-+(dni push16.w.G-imm "push.w:G #Imm-16-HI" ((machine 16))
-+ ("push.w$G #${Imm-16-HI}")
-+ (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 2) Imm-16-HI)
-+ (push-sem16 HI Imm-16-HI)
-+ ())
-+
-+(dni push32.b.imm "push.b #Imm-8-QI" ((machine 32))
-+ ("push.b #Imm-8-QI")
-+ (+ (f-0-4 #xA) (f-4-4 #xE) Imm-8-QI)
-+ (push-sem32 QI Imm-8-QI)
-+ ())
-+
-+(dni push32.w.imm "push.w #Imm-8-HI" ((machine 32))
-+ ("push.w #${Imm-8-HI}")
-+ (+ (f-0-4 #xA) (f-4-4 #xF) Imm-8-HI)
-+ (push-sem32 HI Imm-8-HI)
-+ ())
-+
-+; push.BW:G src (m16 #2)
-+(unary-insn-mach-g 16 push (f-0-4 7) (f-4-3 2) (f-8-4 #x4) push-sem16 $G)
-+; push.BW:G src (m32 #2)
-+(unary-insn-mach 32 push #xC #x0 #xE push-sem32)
-+
-+
-+; push.b:S r0l/r0h (m16 #3)
-+(dni push16.b-s-rn "push.b:S r0[lh]" ((machine 16))
-+ "push.b$S ${Rn16-push-S-anyof}"
-+ (+ (f-0-4 #x8) Rn16-push-S-anyof (f-5-3 #x2))
-+ (push-sem16 QI Rn16-push-S-anyof)
-+ ())
-+; push.w:S a0/a1 (m16 #4)
-+(dni push16.b-s-an "push.w:S a[01]" ((machine 16))
-+ "push.w$S ${An16-push-S-anyof}"
-+ (+ (f-0-4 #xC) An16-push-S-anyof (f-5-3 #x2))
-+ (push-sem16 HI An16-push-S-anyof)
-+ ())
-+
-+; push.l imm32 (m32 #3)
-+(dni push32.l.imm "push.l #Imm-16-SI" ((machine 32))
-+ ("push.l #${Imm-16-SI}")
-+ (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 5) (f-12-4 3) Imm-16-SI)
-+ (push-sem32 SI Imm-16-SI)
-+ ())
-+; push.l src (m32 #4)
-+(unary-insn-defn 32 16-Unprefixed SI .l push (+ (f-0-4 #xA) (f-7-1 0) dst32-16-Unprefixed-SI (f-10-2 0) (f-12-4 1)) push-sem32)
-+
-+;-------------------------------------------------------------
-+; pusha - push effective address
-+;------------------------------------------------------------
-+
-+(define-pmacro (push16a-sem mode dst)
-+ (sequence ()
-+ (set (reg h-sp) (sub (reg h-sp) 2))
-+ (set (mem16 HI (reg h-sp)) dst))
-+)
-+(define-pmacro (push32a-sem mode dst)
-+ (sequence ()
-+ (set (reg h-sp) (sub (reg h-sp) 4))
-+ (set (mem32 SI (reg h-sp)) dst))
-+)
-+(unary-insn-defn 16 16-Mova HI "" pusha (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 9) dst16-16-Mova-HI) push16a-sem)
-+(unary-insn-defn 32 16-Unprefixed-Mova SI "" pusha (+ (f-0-4 #xB) (f-7-1 0) dst32-16-Unprefixed-Mova-SI (f-10-2 0) (f-12-4 1)) push32a-sem)
-+
-+;-------------------------------------------------------------
-+; reit - return from interrupt
-+;-------------------------------------------------------------
-+
-+; ??? semantics
-+(dni reit16 "REIT" ((machine 16))
-+ ("reit")
-+ (+ (f-0-4 #xF) (f-4-4 #xB))
-+ (nop)
-+ ())
-+(dni reit32 "REIT" ((machine 32))
-+ ("reit")
-+ (+ (f-0-4 9) (f-4-4 #xE))
-+ (nop)
-+ ())
-+
-+;-------------------------------------------------------------
-+; rmpa - repeat multiple and addition
-+;-------------------------------------------------------------
-+
-+; TODO semantics
-+(dni rmpa16.b "rmpa.size" ((machine 16))
-+ ("rmpa.b")
-+ (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 1))
-+ (nop)
-+ ())
-+(dni rmpa16.w "rmpa.size" ((machine 16))
-+ ("rmpa.w")
-+ (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 1))
-+ (nop)
-+ ())
-+(dni rmpa32.b "rmpa.size" ((machine 32))
-+ ("rmpa.b")
-+ (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 4) (f-12-4 3))
-+ (nop)
-+ ())
-+
-+(dni rmpa32.w "rmpa.size" ((machine 32))
-+ ("rmpa.w")
-+ (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 5) (f-12-4 3))
-+ (nop)
-+ ())
-+
-+;-------------------------------------------------------------
-+; rolc - rotate left with carry
-+;-------------------------------------------------------------
-+
-+; TODO check semantics
-+; TODO future: split this into .b and .w semantics
-+(define-pmacro (rolc-sem mode dst)
-+ (sequence ((mode result) (SI ocbit) (mode b_or_w) (USI mask))
-+ (set b_or_w -1)
-+ (set b_or_w (srl b_or_w #x8))
-+ (if (eq b_or_w #x0)
-+ (set mask #x8000) ; .b
-+ (set mask #x80000000)) ; .w
-+ (set ocbit cbit)
-+ (set cbit (and dst mask))
-+ (set result (sll mode dst 1))
-+ (set result (or result ocbit))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+; rolc.BW src,dst
-+(unary-insn rolc (f-0-4 7) (f-4-3 3) (f-8-4 #xA) #xB #x2 #xE rolc-sem)
-+
-+;-------------------------------------------------------------
-+; rorc - rotate right with carry
-+;-------------------------------------------------------------
-+
-+; TODO check semantics
-+; TODO future: split this into .b and .w semantics
-+(define-pmacro (rorc-sem mode dst)
-+ (sequence ((mode result) (SI ocbit) (mode b_or_w) (USI mask) (SI shamt))
-+ (set b_or_w -1)
-+ (set b_or_w (srl b_or_w #x8))
-+ (if (eq b_or_w #x0)
-+ (sequence () (set mask #x7fff) (set shamt 15)) ; .b
-+ (sequence () (set mask #x7fffffff) (set shamt 31))) ; .w
-+ (set ocbit cbit)
-+ (set cbit (and dst #x1))
-+ (set result (srl mode dst (const 1)))
-+ (set result (or (and result mask) (sll ocbit shamt)))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+; rorc.BW src,dst
-+(unary-insn rorc (f-0-4 7) (f-4-3 3) (f-8-4 #xB) #xA #x2 #xE rorc-sem)
-+
-+;-------------------------------------------------------------
-+; rot - rotate
-+;-------------------------------------------------------------
-+
-+; TODO future: split this into .b and .w semantics
-+(define-pmacro (rot-1-sem mode src1 dst)
-+ (sequence ((mode tmp) (mode b_or_w) (USI mask) (SI shift))
-+ (case DFLT src1
-+ ((#x0) (set shift 1))
-+ ((#x1) (set shift 2))
-+ ((#x2) (set shift 3))
-+ ((#x3) (set shift 4))
-+ ((#x4) (set shift 5))
-+ ((#x5) (set shift 6))
-+ ((#x6) (set shift 7))
-+ ((#x7) (set shift 8))
-+ ((-8) (set shift -1))
-+ ((-7) (set shift -2))
-+ ((-6) (set shift -3))
-+ ((-5) (set shift -4))
-+ ((-4) (set shift -5))
-+ ((-3) (set shift -6))
-+ ((-2) (set shift -7))
-+ ((-1) (set shift -8))
-+ (else (set shift 0))
-+ )
-+ (set b_or_w -1)
-+ (set b_or_w (srl b_or_w #x8))
-+ (if (eq b_or_w #x0)
-+ (set mask #x7fff) ; .b
-+ (set mask #x7fffffff)) ; .w
-+ (set tmp dst)
-+ (if (gt mode shift 0)
-+ (sequence ()
-+ (set tmp (rol mode tmp shift))
-+ (set cbit (and tmp #x1)))
-+ (sequence ()
-+ (set tmp (ror mode tmp (mul shift -1)))
-+ (set cbit (and tmp mask))))
-+ (set-z-and-s tmp)
-+ (set dst tmp))
-+)
-+(define-pmacro (rot-2-sem mode dst)
-+ (sequence ((mode tmp) (mode b_or_w) (USI mask))
-+ (set b_or_w -1)
-+ (set b_or_w (srl b_or_w #x8))
-+ (if (eq b_or_w #x0)
-+ (set mask #x7fff) ; .b
-+ (set mask #x7fffffff)) ; .w
-+ (set tmp dst)
-+ (if (gt mode (reg h-r1h) 0)
-+ (sequence ()
-+ (set tmp (rol mode tmp (reg h-r1h)))
-+ (set cbit (and tmp #x1)))
-+ (sequence ()
-+ (set tmp (ror mode tmp (reg h-r1h)))
-+ (set cbit (and tmp mask))))
-+ (set-z-and-s tmp)
-+ (set dst tmp))
-+)
-+
-+; rot.BW #imm4,dst
-+(binary-arith16-shimm4-dst-defn QI .b 0 0 rot (f-0-4 #xE) (f-4-3 0) rot-1-sem)
-+(binary-arith16-shimm4-dst-defn HI .w 0 1 rot (f-0-4 #xE) (f-4-3 0) rot-1-sem)
-+(binary-arith32-shimm4-dst-defn QI .b 0 0 rot #x7 #x2 rot-1-sem)
-+(binary-arith32-shimm4-dst-defn HI .w 0 1 rot #x7 #x2 rot-1-sem)
-+; rot.BW src,dst
-+
-+(dni rot16.b-dst "rot r1h,dest" ((machine 16))
-+ ("rot.b r1h,${dst16-16-QI}")
-+ (+ (f-0-4 7) (f-4-4 #x4) (f-8-4 #x6) dst16-16-QI)
-+ (rot-2-sem QI dst16-16-QI)
-+ ())
-+(dni rot16.w-dst "rot r1h,dest" ((machine 16))
-+ ("rot.w r1h,${dst16-16-HI}")
-+ (+ (f-0-4 7) (f-4-4 #x5) (f-8-4 #x6) dst16-16-HI)
-+ (rot-2-sem HI dst16-16-HI)
-+ ())
-+
-+(dni rot32.b-dst "rot r1h,dest" ((machine 32))
-+ ("rot.b r1h,${dst32-16-Unprefixed-QI}")
-+ (+ (f-0-4 #xA) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xF))
-+ (rot-2-sem QI dst32-16-Unprefixed-QI)
-+ ())
-+(dni rot32.w-dst "rot r1h,dest" ((machine 32))
-+ ("rot.w r1h,${dst32-16-Unprefixed-HI}")
-+ (+ (f-0-4 #xA) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xF))
-+ (rot-2-sem HI dst32-16-Unprefixed-HI)
-+ ())
-+
-+;-------------------------------------------------------------
-+; rts - return from subroutine
-+;-------------------------------------------------------------
-+
-+(define-pmacro (rts16-sem)
-+ (sequence ((SI tpc))
-+ (set tpc (mem16 HI (reg h-sp)))
-+ (set (reg h-sp) (add (reg h-sp) 2))
-+ (set tpc (or tpc (sll (mem16 QI (reg h-sp)) 16)))
-+ (set (reg h-sp) (add (reg h-sp) 1))
-+ (set pc tpc)
-+ )
-+)
-+(define-pmacro (rts32-sem)
-+ (sequence ((SI tpc))
-+ (set tpc (mem32 HI (reg h-sp)))
-+ (set (reg h-sp) (add (reg h-sp) 2))
-+ (set tpc (or tpc (sll (mem32 HI (reg h-sp)) 16)))
-+ (set (reg h-sp) (add (reg h-sp) 2))
-+ (set pc tpc)
-+ )
-+)
-+
-+(dni rts16 "rts" ((machine 16))
-+ ("rts")
-+ (+ (f-0-4 #xF) (f-4-4 3))
-+ (rts16-sem)
-+ ())
-+
-+(dni rts32 "rts" ((machine 32))
-+ ("rts")
-+ (+ (f-0-4 #xD) (f-4-4 #xF))
-+ (rts32-sem)
-+ ())
-+
-+;-------------------------------------------------------------
-+; sbb - subtract with borrow
-+;-------------------------------------------------------------
-+
-+(define-pmacro (sbb-sem mode src dst)
-+ (sequence ((mode result))
-+ (set result (subc mode dst src cbit))
-+ (set obit (add-oflag mode dst src cbit))
-+ (set cbit (add-oflag mode dst src cbit))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+
-+; sbb.size:G #imm,dst
-+(binary-arith16-imm-dst-defn QI QI .b 0 sbb X (f-0-4 7) (f-4-3 3) (f-8-4 7) sbb-sem)
-+(binary-arith16-imm-dst-defn HI HI .w 1 sbb X (f-0-4 7) (f-4-3 3) (f-8-4 7) sbb-sem)
-+(binary-arith32-imm-dst-Prefixed QI QI .b 0 sbb X #x9 #x2 #xE sbb-sem)
-+(binary-arith32-imm-dst-Prefixed HI HI .w 1 sbb X #x9 #x2 #xE sbb-sem)
-+
-+; sbb.BW:G src,dst
-+(binary-arith16-src-dst-defn QI QI .b 0 sbb X (f-0-4 #xB) (f-4-3 4) sbb-sem)
-+(binary-arith16-src-dst-defn HI HI .w 1 sbb X (f-0-4 #xB) (f-4-3 4) sbb-sem)
-+(binary-arith32-src-dst-Prefixed QI QI .b 0 sbb X #x1 #x6 sbb-sem)
-+(binary-arith32-src-dst-Prefixed HI HI .w 1 sbb X #x1 #x6 sbb-sem)
-+
-+;-------------------------------------------------------------
-+; sbjnz - subtract then jump on not zero
-+;-------------------------------------------------------------
-+
-+(define-pmacro (sub-jnz-sem mode src dst label)
-+ (sequence ((mode result))
-+ (set result (sub mode dst src))
-+ (set dst result)
-+ (if (ne result 0)
-+ (set pc label)))
-+)
-+
-+; sbjnz.size #imm4,dst,label
-+(arith-jnz-imm4-dst sbjnz s4n (f-0-4 #xF) (f-4-3 4) #xf #x1 sub-jnz-sem)
-+
-+;-------------------------------------------------------------
-+; sccnd - store condition on condition (m32)
-+;-------------------------------------------------------------
-+
-+(define-pmacro (sccnd-sem cnd dst)
-+ (sequence ()
-+ (set dst 0)
-+ (case DFLT cnd
-+ ((#x00) (if (not cbit) (set dst 1))) ;ltu nc
-+ ((#x01) (if (or cbit zbit) (set dst 1))) ;leu
-+ ((#x02) (if (not zbit) (set dst 1))) ;ne nz
-+ ((#x03) (if (not sbit) (set dst 1))) ;pz
-+ ((#x04) (if (not obit) (set dst 1))) ;no
-+ ((#x05) (if (not (or zbit (xor sbit obit))) (set dst 1))) ;gt
-+ ((#x06) (if (xor sbit obit) (set dst 1))) ;ge
-+ ((#x08) (if (trunc BI cbit) (set dst 1))) ;geu c
-+ ((#x09) (if (not (or cbit zbit)) (set dst 1))) ;gtu
-+ ((#x0a) (if (trunc BI zbit) (set dst 1))) ;eq z
-+ ((#x0b) (if (trunc BI sbit) (set dst 1))) ;n
-+ ((#x0c) (if (trunc BI obit) (set dst 1))) ;o
-+ ((#x0d) (if (or zbit (xor sbit obit)) (set dst 1))) ;le
-+ ((#x0e) (if (xor sbit obit) (set dst 1))) ;lt
-+ )
-+ )
-+ )
-+
-+; scCND dst
-+(dni sccnd
-+ "sccnd dst"
-+ ((machine 32))
-+ "sc$sccond32 ${dst32-16-Unprefixed-HI}"
-+ (+ (f-0-4 #xD) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) sccond32)
-+ (sccnd-sem sccond32 dst32-16-Unprefixed-HI)
-+ ())
-+
-+;-------------------------------------------------------------
-+; scmpu - string compare unequal (m32)
-+;-------------------------------------------------------------
-+
-+; TODO semantics
-+(dni scmpu.b "scmpu.b" ((machine 32))
-+ ("scmpu.b")
-+ (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 #xC) (f-12-4 3))
-+ (c-call VOID "scmpu_QI_semantics")
-+ ())
-+
-+(dni scmpu.w "scmpu.w" ((machine 32))
-+ ("scmpu.w")
-+ (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 #xD) (f-12-4 3))
-+ (c-call VOID "scmpu_HI_semantics")
-+ ())
-+
-+;-------------------------------------------------------------
-+; sha - shift arithmetic
-+;-------------------------------------------------------------
-+
-+; TODO future: split this into .b and .w semantics
-+(define-pmacro (sha-sem mode src1 dst)
-+ (sequence ((mode result)(mode shift)(mode shmode))
-+ (case DFLT src1
-+ ((#x0) (set shift 1))
-+ ((#x1) (set shift 2))
-+ ((#x2) (set shift 3))
-+ ((#x3) (set shift 4))
-+ ((#x4) (set shift 5))
-+ ((#x5) (set shift 6))
-+ ((#x6) (set shift 7))
-+ ((#x7) (set shift 8))
-+ ((-8) (set shift -1))
-+ ((-7) (set shift -2))
-+ ((-6) (set shift -3))
-+ ((-5) (set shift -4))
-+ ((-4) (set shift -5))
-+ ((-3) (set shift -6))
-+ ((-2) (set shift -7))
-+ ((-1) (set shift -8))
-+ (else (set shift 0))
-+ )
-+ (set shmode -1)
-+ (set shmode (srl shmode #x8))
-+ (if (lt mode shift #x0) (set result (sra mode dst (mul shift -1))))
-+ (if (gt mode shift 0) (set result (sll mode dst shift)))
-+ (if (eq shmode #x0) ; QI
-+ (sequence
-+ ((mode cbitamt))
-+ (if (lt mode shift #x0)
-+ (set cbitamt (sub #x8 shift)) ; sra
-+ (set cbitamt (sub shift 1))) ; sll
-+ (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
-+ (set obit (ne (and dst #x80) (and result #x80)))
-+ ))
-+ (if (eq shmode #xff) ; HI
-+ (sequence
-+ ((mode cbitamt))
-+ (if (lt mode shift #x0)
-+ (set cbitamt (sub 16 shift)) ; sra
-+ (set cbitamt (sub shift 1))) ; sll
-+ (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
-+ (set obit (ne (and dst #x8000) (and result #x8000)))
-+ ))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+(define-pmacro (shar1h-sem mode dst)
-+ (sequence ((mode result)(mode shmode))
-+ (set shmode -1)
-+ (set shmode (srl shmode #x8))
-+ (if (lt mode (reg h-r1h) 0) (set result (sra mode dst (reg h-r1h))))
-+ (if (gt mode (reg h-r1h) 0) (set result (sll mode dst (reg h-r1h))))
-+ (if (eq shmode #x0) ; QI
-+ (sequence
-+ ((mode cbitamt))
-+ (if (lt mode (reg h-r1h) #x0)
-+ (set cbitamt (sub #x8 (reg h-r1h))) ; sra
-+ (set cbitamt (sub (reg h-r1h) 1))) ; sll
-+ (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
-+ (set obit (ne (and dst #x80) (and result #x80)))
-+ ))
-+ (if (eq shmode #xff) ; HI
-+ (sequence
-+ ((mode cbitamt))
-+ (if (lt mode (reg h-r1h) #x0)
-+ (set cbitamt (sub 16 (reg h-r1h))) ; sra
-+ (set cbitamt (sub (reg h-r1h) 1))) ; sll
-+ (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
-+ (set obit (ne (and dst #x8000) (and result #x8000)))
-+ ))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+; sha.BW #imm4,dst (m16 #1 m32 #1)
-+(binary-arith16-shimm4-dst-defn QI .b 0 0 sha (f-0-4 #xF) (f-4-3 0) sha-sem)
-+(binary-arith16-shimm4-dst-defn HI .w 0 1 sha (f-0-4 #xF) (f-4-3 0) sha-sem)
-+(binary-arith32-shimm4-dst-defn QI .b 1 0 sha #x7 #x0 sha-sem)
-+(binary-arith32-shimm4-dst-defn HI .w 1 1 sha #x7 #x0 sha-sem)
-+; sha.BW r1h,dst (m16 #2 m32 #3)
-+(dni sha16.b-dst "sha.b r1h,dest" ((machine 16))
-+ ("sha.b r1h,${dst16-16-QI}")
-+ (+ (f-0-4 7) (f-4-4 4) (f-8-4 #xF) dst16-16-QI)
-+ (shar1h-sem HI dst16-16-QI)
-+ ())
-+(dni sha16.w-dst "sha.w r1h,dest" ((machine 16))
-+ ("sha.w r1h,${dst16-16-HI}")
-+ (+ (f-0-4 7) (f-4-4 5) (f-8-4 #xF) dst16-16-HI)
-+ (shar1h-sem HI dst16-16-HI)
-+ ())
-+(dni sha32.b-dst "sha.b r1h,dest" ((machine 32))
-+ ("sha.b r1h,${dst32-16-Unprefixed-QI}")
-+ (+ (f-0-4 #xB) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xE))
-+ (shar1h-sem QI dst32-16-Unprefixed-QI)
-+ ())
-+(dni sha32.w-dst "sha.w r1h,dest" ((machine 32))
-+ ("sha.w r1h,${dst32-16-Unprefixed-HI}")
-+ (+ (f-0-4 #xB) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE))
-+ (shar1h-sem HI dst32-16-Unprefixed-HI)
-+ ())
-+; sha.L #imm,dst (m16 #3)
-+(dni sha16-L-imm-r2r0 "sha.L #Imm-sh-12-s4,r2r0" ((machine 16))
-+ "sha.l #${Imm-sh-12-s4},r2r0"
-+ (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #xA) Imm-sh-12-s4)
-+ (sha-sem SI Imm-sh-12-s4 (reg h-r2r0))
-+ ())
-+(dni sha16-L-imm-r3r1 "sha.L #Imm-sh-12-s4,r3r1" ((machine 16))
-+ "sha.l #${Imm-sh-12-s4},r3r1"
-+ (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #xB) Imm-sh-12-s4)
-+ (sha-sem SI Imm-sh-12-s4 (reg h-r3r1))
-+ ())
-+; sha.L r1h,dst (m16 #4)
-+(dni sha16-L-r1h-r2r0 "sha.L r1h,r2r0" ((machine 16))
-+ "sha.l r1h,r2r0"
-+ (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 2) (f-12-4 1))
-+ (sha-sem SI (reg h-r1h) (reg h-r2r0))
-+ ())
-+(dni sha16-L-r1h-r3r1 "sha.L r1h,r3r1" ((machine 16))
-+ "sha.l r1h,r3r1"
-+ (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 3) (f-12-4 1))
-+ (sha-sem SI (reg h-r1h) (reg h-r3r1))
-+ ())
-+; sha.L #imm8,dst (m32 #2)
-+(binary-arith32-imm-dst-defn QI SI .l 0 sha X #xA #x2 #x1 sha-sem)
-+; sha.L r1h,dst (m32 #4)
-+(dni sha32.l-dst "sha.l r1h,dest" ((machine 32))
-+ ("sha.l r1h,${dst32-16-Unprefixed-SI}")
-+ (+ (f-0-4 #xC) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 1) (f-12-4 1))
-+ (shar1h-sem QI dst32-16-Unprefixed-SI)
-+ ())
-+
-+;-------------------------------------------------------------
-+; shanc - shift arithmetic non carry (m32)
-+;-------------------------------------------------------------
-+
-+; TODO check semantics
-+; shanc.L #imm8,dst
-+(binary-arith32-imm-dst-defn QI SI .l 0 shanc X #xC #x2 #x1 sha-sem)
-+
-+;-------------------------------------------------------------
-+; shl - shift logical
-+;-------------------------------------------------------------
-+
-+; TODO future: split this into .b and .w semantics
-+(define-pmacro (shl-sem mode src1 dst)
-+ (sequence ((mode result)(mode shift)(mode shmode))
-+ (case DFLT src1
-+ ((#x0) (set shift 1))
-+ ((#x1) (set shift 2))
-+ ((#x2) (set shift 3))
-+ ((#x3) (set shift 4))
-+ ((#x4) (set shift 5))
-+ ((#x5) (set shift 6))
-+ ((#x6) (set shift 7))
-+ ((#x7) (set shift 8))
-+ ((-8) (set shift -1))
-+ ((-7) (set shift -2))
-+ ((-6) (set shift -3))
-+ ((-5) (set shift -4))
-+ ((-4) (set shift -5))
-+ ((-3) (set shift -6))
-+ ((-2) (set shift -7))
-+ ((-1) (set shift -8))
-+ (else (set shift 0))
-+ )
-+ (set shmode -1)
-+ (set shmode (srl shmode #x8))
-+ (if (lt mode shift #x0) (set result (srl mode dst (mul shift -1))))
-+ (if (gt mode shift 0) (set result (sll mode dst shift)))
-+ (if (eq shmode #x0) ; QI
-+ (sequence
-+ ((mode cbitamt))
-+ (if (lt mode shift #x0)
-+ (set cbitamt (sub #x8 shift)); srl
-+ (set cbitamt (sub shift 1))) ; sll
-+ (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
-+ (set obit (ne (and dst #x80) (and result #x80)))
-+ ))
-+ (if (eq shmode #xff) ; HI
-+ (sequence
-+ ((mode cbitamt))
-+ (if (lt mode shift #x0)
-+ (set cbitamt (sub 16 shift)) ; srl
-+ (set cbitamt (sub shift 1))) ; sll
-+ (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
-+ (set obit (ne (and dst #x8000) (and result #x8000)))
-+ ))
-+ (set-z-and-s result)
-+ (set dst result))
-+ )
-+(define-pmacro (shlr1h-sem mode dst)
-+ (sequence ((mode result)(mode shmode))
-+ (set shmode -1)
-+ (set shmode (srl shmode #x8))
-+ (if (lt mode (reg h-r1h) 0) (set result (srl mode dst (reg h-r1h))))
-+ (if (gt mode (reg h-r1h) 0) (set result (sll mode dst (reg h-r1h))))
-+ (if (eq shmode #x0) ; QI
-+ (sequence
-+ ((mode cbitamt))
-+ (if (lt mode (reg h-r1h) #x0)
-+ (set cbitamt (sub #x8 (reg h-r1h))) ; srl
-+ (set cbitamt (sub (reg h-r1h) 1))) ; sll
-+ (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
-+ (set obit (ne (and dst #x80) (and result #x80)))
-+ ))
-+ (if (eq shmode #xff) ; HI
-+ (sequence
-+ ((mode cbitamt))
-+ (if (lt mode (reg h-r1h) #x0)
-+ (set cbitamt (sub 16 (reg h-r1h))) ; srl
-+ (set cbitamt (sub (reg h-r1h) 1))) ; sll
-+ (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
-+ (set obit (ne (and dst #x8000) (and result #x8000)))
-+ ))
-+ (set-z-and-s result)
-+ (set dst result))
-+ )
-+; shl.BW #imm4,dst (m16 #1 m32 #1)
-+(binary-arith16-shimm4-dst-defn QI .b 0 0 shl (f-0-4 #xE) (f-4-3 4) shl-sem)
-+(binary-arith16-shimm4-dst-defn HI .w 0 1 shl (f-0-4 #xE) (f-4-3 4) shl-sem)
-+(binary-arith32-shimm4-dst-defn QI .b 0 0 shl #x7 #x0 shl-sem)
-+(binary-arith32-shimm4-dst-defn HI .w 0 1 shl #x7 #x0 shl-sem)
-+; shl.BW r1h,dst (m16 #2 m32 #3)
-+(dni shl16.b-dst "shl.b r1h,dest" ((machine 16))
-+ ("shl.b r1h,${dst16-16-QI}")
-+ (+ (f-0-4 7) (f-4-4 4) (f-8-4 #xE) dst16-16-QI)
-+ (shlr1h-sem HI dst16-16-QI)
-+ ())
-+(dni shl16.w-dst "shl.w r1h,dest" ((machine 16))
-+ ("shl.w r1h,${dst16-16-HI}")
-+ (+ (f-0-4 7) (f-4-4 5) (f-8-4 #xE) dst16-16-HI)
-+ (shlr1h-sem HI dst16-16-HI)
-+ ())
-+(dni shl32.b-dst "shl.b r1h,dest" ((machine 32))
-+ ("shl.b r1h,${dst32-16-Unprefixed-QI}")
-+ (+ (f-0-4 #xA) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xE))
-+ (shlr1h-sem QI dst32-16-Unprefixed-QI)
-+ ())
-+(dni shl32.w-dst "shl.w r1h,dest" ((machine 32))
-+ ("shl.w r1h,${dst32-16-Unprefixed-HI}")
-+ (+ (f-0-4 #xA) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE))
-+ (shlr1h-sem HI dst32-16-Unprefixed-HI)
-+ ())
-+; shl.L #imm,dst (m16 #3)
-+(dni shl16-L-imm-r2r0 "shl.L #Imm-sh-12-s4,r2r0" ((machine 16))
-+ "shl.l #${Imm-sh-12-s4},r2r0"
-+ (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #x8) Imm-sh-12-s4)
-+ (shl-sem SI Imm-sh-12-s4 (reg h-r2r0))
-+ ())
-+(dni shl16-L-imm-r3r1 "shl.L #Imm-sh-12-s4,r3r1" ((machine 16))
-+ "shl.l #${Imm-sh-12-s4},r3r1"
-+ (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #x9) Imm-sh-12-s4)
-+ (shl-sem SI Imm-sh-12-s4 (reg h-r3r1))
-+ ())
-+; shl.L r1h,dst (m16 #4)
-+(dni shl16-L-r1h-r2r0 "shl.L r1h,r2r0" ((machine 16))
-+ "shl.l r1h,r2r0"
-+ (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 0) (f-12-4 1))
-+ (shl-sem SI (reg h-r1h) (reg h-r2r0))
-+ ())
-+(dni shl16-L-r1h-r3r1 "shl.L r1h,r3r1" ((machine 16))
-+ "shl.l r1h,r3r1"
-+ (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 1) (f-12-4 1))
-+ (shl-sem SI (reg h-r1h) (reg h-r3r1))
-+ ())
-+; shl.L #imm8,dst (m32 #2)
-+(binary-arith32-imm-dst-defn QI SI .l 0 shl X #x9 #x2 #x1 shl-sem)
-+; shl.L r1h,dst (m32 #4)
-+(dni shl32.l-dst "shl.l r1h,dest" ((machine 32))
-+ ("shl.l r1h,${dst32-16-Unprefixed-SI}")
-+ (+ (f-0-4 #xC) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 0) (f-12-4 1))
-+ (shlr1h-sem QI dst32-16-Unprefixed-SI)
-+ ())
-+
-+;-------------------------------------------------------------
-+; shlnc - shift logical non carry
-+;-------------------------------------------------------------
-+
-+; TODO check semantics
-+; shlnc.L #imm8,dst
-+(binary-arith32-imm-dst-defn QI SI .l 0 shlnc X #x8 #x2 #x1 shl-sem)
-+
-+;-------------------------------------------------------------
-+; sin - string input (m32)
-+;-------------------------------------------------------------
-+
-+; TODO semantics
-+(dni sin32.b "sin" ((machine 32))
-+ ("sin.b")
-+ (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 8) (f-12-4 3))
-+ (c-call VOID "sin_QI_semantics")
-+ ())
-+
-+(dni sin32.w "sin" ((machine 32))
-+ ("sin.w")
-+ (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 9) (f-12-4 3))
-+ (c-call VOID "sin_HI_semantics")
-+ ())
-+
-+;-------------------------------------------------------------
-+; smovb - string move backward
-+;-------------------------------------------------------------
-+
-+; TODO semantics
-+(dni smovb16.b "smovb.b" ((machine 16))
-+ ("smovb.b")
-+ (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 9))
-+ (c-call VOID "smovb_QI_semantics")
-+ ())
-+
-+(dni smovb16.w "smovb.w" ((machine 16))
-+ ("smovb.w")
-+ (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 9))
-+ (c-call VOID "smovb_HI_semantics")
-+ ())
-+
-+(dni smovb32.b "smovb.b" ((machine 32))
-+ ("smovb.b")
-+ (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 8) (f-12-4 3))
-+ (c-call VOID "smovb_QI_semantics")
-+ ())
-+
-+(dni smovb32.w "smovb.w" ((machine 32))
-+ ("smovb.w")
-+ (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 9) (f-12-4 3))
-+ (c-call VOID "smovb_HI_semantics")
-+ ())
-+
-+;-------------------------------------------------------------
-+; smovf - string move forward (m32)
-+;-------------------------------------------------------------
-+
-+; TODO semantics
-+(dni smovf16.b "smovf.b" ((machine 16))
-+ ("smovf.b")
-+ (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 8))
-+ (c-call VOID "smovf_QI_semantics")
-+ ())
-+
-+(dni smovf16.w "smovf.w" ((machine 16))
-+ ("smovf.w")
-+ (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 8))
-+ (c-call VOID "smovf_HI_semantics")
-+ ())
-+
-+(dni smovf32.b "smovf.b" ((machine 32))
-+ ("smovf.b")
-+ (+ (f-0-4 #xB) (f-4-4 0) (f-8-4 8) (f-12-4 3))
-+ (c-call VOID "smovf_QI_semantics")
-+ ())
-+
-+(dni smovf32.w "smovf.w" ((machine 32))
-+ ("smovf.w")
-+ (+ (f-0-4 #xB) (f-4-4 0) (f-8-4 9) (f-12-4 3))
-+ (c-call VOID "smovf_HI_semantics")
-+ ())
-+
-+;-------------------------------------------------------------
-+; smovu - string move unequal (m32)
-+;-------------------------------------------------------------
-+
-+; TODO semantics
-+(dni smovu.b "smovu.b" ((machine 32))
-+ ("smovu.b")
-+ (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 8) (f-12-4 3))
-+ (c-call VOID "smovu_QI_semantics")
-+ ())
-+
-+(dni smovu.w "smovu.w" ((machine 32))
-+ ("smovu.w")
-+ (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 9) (f-12-4 3))
-+ (c-call VOID "smovu_HI_semantics")
-+ ())
-+
-+;-------------------------------------------------------------
-+; sout - string output (m32)
-+;-------------------------------------------------------------
-+
-+; TODO semantics
-+(dni sout.b "sout.b" ((machine 32))
-+ ("sout.b")
-+ (+ (f-0-4 #xB) (f-4-4 4) (f-8-4 8) (f-12-4 3))
-+ (c-call VOID "sout_QI_semantics")
-+ ())
-+
-+(dni sout.w "sout" ((machine 32))
-+ ("sout.w")
-+ (+ (f-0-4 #xB) (f-4-4 4) (f-8-4 9) (f-12-4 3))
-+ (c-call VOID "sout_HI_semantics")
-+ ())
-+
-+;-------------------------------------------------------------
-+; sstr - string store
-+;-------------------------------------------------------------
-+
-+; TODO semantics
-+(dni sstr16.b "sstr.b" ((machine 16))
-+ ("sstr.b")
-+ (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 #xA))
-+ (c-call VOID "sstr_QI_semantics")
-+ ())
-+
-+(dni sstr16.w "sstr.w" ((machine 16))
-+ ("sstr.w")
-+ (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 #xA))
-+ (c-call VOID "sstr_HI_semantics")
-+ ())
-+
-+(dni sstr.b "sstr" ((machine 32))
-+ ("sstr.b")
-+ (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 0) (f-12-4 3))
-+ (c-call VOID "sstr_QI_semantics")
-+ ())
-+
-+(dni sstr.w "sstr" ((machine 32))
-+ ("sstr.w")
-+ (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 1) (f-12-4 3))
-+ (c-call VOID "sstr_HI_semantics")
-+ ())
-+
-+;-------------------------------------------------------------
-+; stnz - store on not zero
-+;-------------------------------------------------------------
-+
-+(define-pmacro (stnz-sem mode src dst)
-+ (sequence ()
-+ (if (ne zbit (const 1))
-+ (set dst src)))
-+)
-+; stnz #imm8,dst3 (m16)
-+(binary-arith16-b-S-imm8-dst3 stnz "" (f-0-4 #xD) (f-4-1 0) stnz-sem)
-+; stnz.BW #imm,dst (m32)
-+(binary-arith32-imm-dst-defn QI QI .b 0 stnz X #x9 #x1 #xF stnz-sem)
-+(binary-arith32-imm-dst-defn HI HI .w 1 stnz X #x9 #x1 #xF stnz-sem)
-+
-+;-------------------------------------------------------------
-+; stz - store on zero
-+;-------------------------------------------------------------
-+
-+(define-pmacro (stz-sem mode src dst)
-+ (sequence ()
-+ (if (eq zbit (const 1))
-+ (set dst src)))
-+)
-+; stz #imm8,dst3 (m16)
-+(binary-arith16-b-S-imm8-dst3 stz "" (f-0-4 #xC) (f-4-1 1) stz-sem)
-+; stz.BW #imm,dst (m32)
-+(binary-arith32-imm-dst-defn QI QI .b 0 stz X #x9 #x0 #xF stz-sem)
-+(binary-arith32-imm-dst-defn HI HI .w 1 stz X #x9 #x0 #xF stz-sem)
-+
-+;-------------------------------------------------------------
-+; stzx - store on zero extention
-+;-------------------------------------------------------------
-+
-+(define-pmacro (stzx-sem mode src1 src2 dst)
-+ (sequence ()
-+ (if (eq zbit (const 1))
-+ (set dst src1)
-+ (set dst src2)))
-+ )
-+; stzx #imm8,dst3 (m16)
-+(dni stzx16-imm8-imm8-r0h "stzx #Imm8,#Imm8,r0h" ((machine 16))
-+ ("stzx #${Imm-8-QI},#${Imm-16-QI},r0h")
-+ (+ (f-0-4 #xD) (f-4-4 #xB) Imm-8-QI Imm-16-QI)
-+ (stzx-sem QI Imm-8-QI Imm-16-QI (reg h-r0h))
-+ ())
-+(dni stzx16-imm8-imm8-r0l "stzx #Imm8,#Imm8,r0l" ((machine 16))
-+ ("stzx #${Imm-8-QI},#${Imm-16-QI},r0l")
-+ (+ (f-0-4 #xD) (f-4-4 #xC) Imm-8-QI Imm-16-QI)
-+ (stzx-sem QI Imm-8-QI Imm-16-QI (reg h-r0l))
-+ ())
-+(dni stzx16-imm8-imm8-dsp8sb "stzx #Imm8,#Imm8,dsp8[sb]" ((machine 16))
-+ ("stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-u8}[sb]")
-+ (+ (f-0-4 #xD) (f-4-4 #xD) Imm-8-QI Dsp-16-u8 Imm-24-QI)
-+ (stzx-sem QI Imm-8-QI Imm-16-QI (mem16 QI (add (reg h-sb) Dsp-24-u8)))
-+ ())
-+(dni stzx16-imm8-imm8-dsp8fb "stzx #Imm8,#Imm8,dsp8[fb]" ((machine 16))
-+ ("stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-s8}[fb]")
-+ (+ (f-0-4 #xD) (f-4-4 #xE) Imm-8-QI Dsp-16-s8 Imm-24-QI)
-+ (stzx-sem QI Imm-8-QI Imm-24-QI (mem16 QI (add (reg h-fb) Dsp-16-s8)))
-+ ())
-+(dni stzx16-imm8-imm8-abs16 "stzx #Imm8,#Imm8,abs16" ((machine 16))
-+ ("stzx #${Imm-8-QI},#${Imm-32-QI},${Dsp-16-u16}")
-+ (+ (f-0-4 #xD) (f-4-4 #xE) Imm-8-QI Dsp-16-u16 Imm-32-QI)
-+ (stzx-sem QI Imm-8-QI Imm-32-QI (mem16 QI Dsp-16-u16))
-+ ())
-+; stzx.BW #imm,dst (m32)
-+(insn-imm1-imm2-dst-Unprefixed stzx #x9 #x3 #xF stzx-sem)
-+
-+;-------------------------------------------------------------
-+; subx - subtract extend (m32)
-+;-------------------------------------------------------------
-+
-+(define-pmacro (subx-sem mode src1 dst)
-+ (sequence ((mode result))
-+ (set result (sub mode dst (ext mode src1)))
-+ (set obit (sub-oflag mode dst (ext mode src1) 0))
-+ (set cbit (sub-cflag mode dst (ext mode src1) 0))
-+ (set dst result)
-+ (set-z-and-s result)))
-+; subx #imm8,dst
-+(binary-arith32-imm-dst-defn QI SI "" 0 subx G #x9 #x1 #x1 subx-sem)
-+; subx src,dst
-+(binary-arith32-src-dst-defn QI SI "" 0 subx G #x1 #x0 subx-sem)
-+
-+;-------------------------------------------------------------
-+; tst - test
-+;-------------------------------------------------------------
-+
-+(define-pmacro (tst-sem mode src1 dst)
-+ (sequence ((mode result))
-+ (set result (and mode dst src1))
-+ (set-z-and-s result))
-+)
-+
-+; tst.BW #imm,dst (m16 #1 m32 #1)
-+(binary-arith-imm-dst tst G (f-0-4 7) (f-4-3 3) (f-8-4 0) #x9 #x3 #xE tst-sem)
-+; tst.BW src,dst (m16 #2 m32 #3)
-+(binary-arith16-src-dst-defn QI QI .b 0 tst X (f-0-4 #x8) (f-4-3 0) tst-sem)
-+(binary-arith16-src-dst-defn HI HI .w 1 tst X (f-0-4 #x8) (f-4-3 0) tst-sem)
-+(binary-arith32-src-dst-Prefixed QI QI .b 0 tst G #x1 #x9 tst-sem)
-+(binary-arith32-src-dst-Prefixed HI HI .w 1 tst G #x1 #x9 tst-sem)
-+; tst.BW:S #imm,dst2 (m32 #2)
-+(binary-arith32-s-imm-dst QI .b 0 tst #x0 #x6 tst-sem)
-+(binary-arith32-s-imm-dst HI .w 1 tst #x0 #x6 tst-sem)
-+
-+;-------------------------------------------------------------
-+; und - undefined
-+;-------------------------------------------------------------
-+
-+(dni und16 "und" ((machine 16))
-+ ("und")
-+ (+ (f-0-4 #xF) (f-4-4 #xF))
-+ (nop)
-+ ())
-+
-+(dni und32 "und" ((machine 32))
-+ ("und")
-+ (+ (f-0-4 #xF) (f-4-4 #xF))
-+ (nop)
-+ ())
-+
-+;-------------------------------------------------------------
-+; wait
-+;-------------------------------------------------------------
-+
-+; ??? semantics
-+(dni wait16 "wait" ((machine 16))
-+ ("wait")
-+ (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 3))
-+ (nop)
-+ ())
-+
-+(dni wait "wait" ((machine 32))
-+ ("wait")
-+ (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 0) (f-12-4 3))
-+ (nop)
-+ ())
-+
-+;-------------------------------------------------------------
-+; xchg - exchange
-+;-------------------------------------------------------------
-+
-+(define-pmacro (xchg-sem mode src dst)
-+ (sequence ((mode result))
-+ (set result src)
-+ (set src dst)
-+ (set dst result))
-+ )
-+(define-pmacro (xchg16-defn mode sz szc src srcreg)
-+ (dni (.sym xchg16 sz - srcreg)
-+ (.str "xchg" sz "-" srcreg ",dst16-16-" mode)
-+ ((machine 16))
-+ (.str "xchg." sz " " srcreg ",${dst16-16-" mode "}")
-+ (+ (f-0-4 #x7) (f-4-3 #x5) (f-7-1 szc) (f-8-2 0) (f-10-2 src) (.sym dst16-16- mode))
-+ (xchg-sem mode (reg (.sym h- srcreg)) (.sym dst16-16- mode))
-+ ())
-+)
-+(xchg16-defn QI b 0 0 r0l)
-+(xchg16-defn QI b 0 1 r0h)
-+(xchg16-defn QI b 0 2 r1l)
-+(xchg16-defn QI b 0 3 r1h)
-+(xchg16-defn HI w 1 0 r0)
-+(xchg16-defn HI w 1 1 r1)
-+(xchg16-defn HI w 1 2 r2)
-+(xchg16-defn HI w 1 3 r3)
-+(define-pmacro (xchg32-defn mode sz szc src srcreg)
-+ (dni (.sym xchg32 sz - srcreg)
-+ (.str "xchg" sz "-" srcreg ",dst32-16-Unprefixed-" mode)
-+ ((machine 32))
-+ (.str "xchg." sz " " srcreg ",${dst32-16-Unprefixed-" mode "}")
-+ (+ (f-0-4 #xD) (.sym dst32-16-Unprefixed- mode) (f-7-1 szc) (f-10-2 0) (f-12-1 1) (f-13-3 src))
-+ (xchg-sem mode (reg (.sym h- srcreg)) (.sym dst32-16-Unprefixed- mode))
-+ ())
-+)
-+(xchg32-defn QI b 0 0 r0l)
-+(xchg32-defn QI b 0 1 r1l)
-+(xchg32-defn QI b 0 2 a0)
-+(xchg32-defn QI b 0 3 a1)
-+(xchg32-defn QI b 0 4 r0h)
-+(xchg32-defn QI b 0 5 r1h)
-+(xchg32-defn HI w 1 0 r0)
-+(xchg32-defn HI w 1 1 r1)
-+(xchg32-defn HI w 1 2 a0)
-+(xchg32-defn HI w 1 3 a1)
-+(xchg32-defn HI w 1 4 r2)
-+(xchg32-defn HI w 1 5 r3)
-+
-+;-------------------------------------------------------------
-+; xor - exclusive or
-+;-------------------------------------------------------------
-+
-+(define-pmacro (xor-sem mode src1 dst)
-+ (sequence ((mode result))
-+ (set result (xor mode src1 dst))
-+ (set-z-and-s result)
-+ (set dst result))
-+)
-+
-+; xor.BW #imm,dst (m16 #1 m32 #1)
-+(binary-arith-imm-dst xor G (f-0-4 7) (f-4-3 3) (f-8-4 1) #x9 #x0 #xE xor-sem)
-+; xor.BW src,dst (m16 #3 m32 #3)
-+(binary-arith-src-dst xor G (f-0-4 #x8) (f-4-3 4) #x1 #x9 xor-sem)
-+
-+;-------------------------------------------------------------
-+; Widening
-+;-------------------------------------------------------------
-+
-+(define-pmacro (exts-sem smode dmode src dst)
-+ (set dst (ext dmode (trunc smode src)))
-+)
-+(define-pmacro (extz-sem smode dmode src dst)
-+ (set dst (zext dmode (trunc smode src)))
-+)
-+
-+; exts.b dst for m16c
-+(ext16-defn QI HI .b 0 exts (f-0-4 7) (f-4-3 6) (f-8-4 6) exts-sem)
-+
-+; exts.w r0 for m16c
-+(dni exts16.w-r0
-+ "exts.w r0"
-+ ((machine 16))
-+ "exts.w r0"
-+ (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 3))
-+ (exts-sem HI SI R0 R2R0)
-+ ())
-+
-+; exts.size dst for m32c
-+(ext32-defn QI HI .b 0 exts (f-0-4 #xC) (f-10-2 1) (f-12-4 #xE) exts-sem)
-+(ext32-defn HI SI .w 1 exts (f-0-4 #xC) (f-10-2 1) (f-12-4 #xE) exts-sem)
-+; exts.b src,dst for m32c
-+(ext32-binary-defn exts .b #x1 #x7 exts-sem)
-+
-+; extz.b src,dst for m32c
-+(ext32-binary-defn extz "" #x1 #xB extz-sem)
-+
-+;-------------------------------------------------------------
-+; Indirect
-+;-------------------------------------------------------------
-+
-+; TODO semantics
-+(dni srcind "SRC-INDIRECT" ((machine 32))
-+ ("src-indirect")
-+ (+ (f-0-4 4) (f-4-4 1))
-+ (set (reg h-src-indirect) 1)
-+ ())
-+
-+(dni destind "DEST-INDIRECT" ((machine 32))
-+ ("dest-indirect")
-+ (+ (f-0-4 0) (f-4-4 9))
-+ (set (reg h-dst-indirect) 1)
-+ ())
-+
-+(dni srcdestind "SRC-DEST-INDIRECT" ((machine 32))
-+ ("src-dest-indirect")
-+ (+ (f-0-4 4) (f-4-4 9))
-+ (sequence () (set (reg h-src-indirect) 1) (set (reg h-dst-indirect) 1))
-+ ())
-diff -Nur binutils-2.24.orig/cgen/cpu/m32c.opc binutils-2.24/cgen/cpu/m32c.opc
---- binutils-2.24.orig/cgen/cpu/m32c.opc 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/m32c.opc 2016-06-30 21:26:12.625892023 +0200
-@@ -0,0 +1,1136 @@
-+/* m32c opcode support. -*- C -*-
-+
-+ Copyright 2005 Free Software Foundation, Inc.
-+
-+ Contributed by Red Hat Inc; developed under contract from Renesas
-+
-+ This file is part of the GNU Binutils.
-+
-+ This program is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 2 of the License, or
-+ (at your option) any later version.
-+
-+ This program is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ You should have received a copy of the GNU General Public License
-+ along with this program; if not, write to the Free Software
-+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
-+
-+/* This file is an addendum to m32c.cpu. Heavy use of C code isn't
-+ appropriate in .cpu files, so it resides here. This especially applies
-+ to assembly/disassembly where parsing/printing can be quite involved.
-+ Such things aren't really part of the specification of the cpu, per se,
-+ so .cpu files provide the general framework and .opc files handle the
-+ nitty-gritty details as necessary.
-+
-+ Each section is delimited with start and end markers.
-+
-+ <arch>-opc.h additions use: "-- opc.h"
-+ <arch>-opc.c additions use: "-- opc.c"
-+ <arch>-asm.c additions use: "-- asm.c"
-+ <arch>-dis.c additions use: "-- dis.c"
-+ <arch>-ibd.h additions use: "-- ibd.h". */
-+
-+/* -- opc.h */
-+
-+/* Needed for RTL's 'ext' and 'trunc' operators. */
-+#include "cgen-types.h"
-+#include "cgen-ops.h"
-+
-+/* We can't use the default hash size because many bits are used by
-+ operands. */
-+#define CGEN_DIS_HASH_SIZE 1
-+#define CGEN_DIS_HASH(buf, value) 0
-+#define CGEN_VERBOSE_ASSEMBLER_ERRORS
-+#define CGEN_VALIDATE_INSN_SUPPORTED
-+
-+extern int m32c_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *);
-+
-+#define CGEN_ASM_HASH_SIZE 0xffff
-+#define CGEN_ASM_HASH(mnem) m32c_asm_hash ((mnem))
-+
-+/* -- */
-+
-+/* -- opc.c */
-+static unsigned int
-+m32c_asm_hash (const char *mnem)
-+{
-+ unsigned int h;
-+
-+ /* The length of the mnemonic for the Jcnd insns is 1. Hash jsri. */
-+ if (mnem[0] == 'j' && mnem[1] != 's')
-+ return 'j';
-+
-+ /* Don't hash scCND */
-+ if (mnem[0] == 's' && mnem[1] == 'c')
-+ return 's';
-+
-+ /* Don't hash bmCND */
-+ if (mnem[0] == 'b' && mnem[1] == 'm')
-+ return 'b';
-+
-+ for (h = 0; *mnem && *mnem != ' ' && *mnem != ':'; ++mnem)
-+ h += *mnem;
-+ return h % CGEN_ASM_HASH_SIZE;
-+}
-+
-+/* -- asm.c */
-+#include "safe-ctype.h"
-+
-+#define MACH_M32C 5 /* Must match md_begin. */
-+
-+static int
-+m32c_cgen_isa_register (const char **strp)
-+ {
-+ int u;
-+ const char *s = *strp;
-+ static char * m32c_register_names [] =
-+ {
-+ "r0", "r1", "r2", "r3", "r0l", "r0h", "r1l", "r1h",
-+ "a0", "a1", "r2r0", "r3r1", "sp", "fb", "dct0", "dct1", "flg", "svf",
-+ "drc0", "drc1", "dmd0", "dmd1", "intb", "svp", "vct", "isp", "dma0",
-+ "dma1", "dra0", "dra1", "dsa0", "dsa1", 0
-+ };
-+
-+ for (u = 0; m32c_register_names[u]; u++)
-+ {
-+ int len = strlen (m32c_register_names[u]);
-+
-+ if (memcmp (m32c_register_names[u], s, len) == 0
-+ && (s[len] == 0 || ! ISALNUM (s[len])))
-+ return 1;
-+ }
-+ return 0;
-+}
-+
-+#define PARSE_UNSIGNED \
-+ do \
-+ { \
-+ /* Don't successfully parse literals beginning with '['. */ \
-+ if (**strp == '[') \
-+ return "Invalid literal"; /* Anything -- will not be seen. */ \
-+ \
-+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);\
-+ if (errmsg) \
-+ return errmsg; \
-+ } \
-+ while (0)
-+
-+#define PARSE_SIGNED \
-+ do \
-+ { \
-+ /* Don't successfully parse literals beginning with '['. */ \
-+ if (**strp == '[') \
-+ return "Invalid literal"; /* Anything -- will not be seen. */ \
-+ \
-+ errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); \
-+ if (errmsg) \
-+ return errmsg; \
-+ } \
-+ while (0)
-+
-+static const char *
-+parse_unsigned6 (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, unsigned long *valuep)
-+{
-+ const char *errmsg = 0;
-+ unsigned long value;
-+
-+ PARSE_UNSIGNED;
-+
-+ if (value > 0x3f)
-+ return _("imm:6 immediate is out of range");
-+
-+ *valuep = value;
-+ return 0;
-+}
-+
-+static const char *
-+parse_unsigned8 (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, unsigned long *valuep)
-+{
-+ const char *errmsg = 0;
-+ unsigned long value;
-+ long have_zero = 0;
-+
-+ if (strncasecmp (*strp, "%dsp8(", 6) == 0)
-+ {
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+ const char *errmsg;
-+
-+ *strp += 6;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_8,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return _("missing `)'");
-+ (*strp) ++;
-+
-+ if (errmsg == NULL
-+ && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ {
-+ return _("%dsp8() takes a symbolic address, not a number");
-+ }
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ if (strncmp (*strp, "0x0", 3) == 0
-+ || (**strp == '0' && *(*strp + 1) != 'x'))
-+ have_zero = 1;
-+
-+ PARSE_UNSIGNED;
-+
-+ if (value > 0xff)
-+ return _("dsp:8 immediate is out of range");
-+
-+ /* If this field may require a relocation then use larger dsp16. */
-+ if (! have_zero && value == 0)
-+ return _("dsp:8 immediate is out of range");
-+
-+ *valuep = value;
-+ return 0;
-+}
-+
-+static const char *
-+parse_signed4 (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, signed long *valuep)
-+{
-+ const char *errmsg = 0;
-+ signed long value;
-+ long have_zero = 0;
-+
-+ if (strncmp (*strp, "0x0", 3) == 0
-+ || (**strp == '0' && *(*strp + 1) != 'x'))
-+ have_zero = 1;
-+
-+ PARSE_SIGNED;
-+
-+ if (value < -8 || value > 7)
-+ return _("Immediate is out of range -8 to 7");
-+
-+ /* If this field may require a relocation then use larger dsp16. */
-+ if (! have_zero && value == 0)
-+ return _("Immediate is out of range -8 to 7");
-+
-+ *valuep = value;
-+ return 0;
-+}
-+
-+static const char *
-+parse_signed4n (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, signed long *valuep)
-+{
-+ const char *errmsg = 0;
-+ signed long value;
-+ long have_zero = 0;
-+
-+ if (strncmp (*strp, "0x0", 3) == 0
-+ || (**strp == '0' && *(*strp + 1) != 'x'))
-+ have_zero = 1;
-+
-+ PARSE_SIGNED;
-+
-+ if (value < -7 || value > 8)
-+ return _("Immediate is out of range -7 to 8");
-+
-+ /* If this field may require a relocation then use larger dsp16. */
-+ if (! have_zero && value == 0)
-+ return _("Immediate is out of range -7 to 8");
-+
-+ *valuep = -value;
-+ return 0;
-+}
-+
-+static const char *
-+parse_signed8 (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, signed long *valuep)
-+{
-+ const char *errmsg = 0;
-+ signed long value;
-+
-+ if (strncasecmp (*strp, "%hi8(", 5) == 0)
-+ {
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+ const char *errmsg;
-+
-+ *strp += 5;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32C_HI8,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return _("missing `)'");
-+ (*strp) ++;
-+
-+ if (errmsg == NULL
-+ && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ {
-+ value >>= 16;
-+ }
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ PARSE_SIGNED;
-+
-+ if (value <= 255 && value > 127)
-+ value -= 0x100;
-+
-+ if (value < -128 || value > 127)
-+ return _("dsp:8 immediate is out of range");
-+
-+ *valuep = value;
-+ return 0;
-+}
-+
-+static const char *
-+parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, unsigned long *valuep)
-+{
-+ const char *errmsg = 0;
-+ unsigned long value;
-+ long have_zero = 0;
-+
-+ if (strncasecmp (*strp, "%dsp16(", 7) == 0)
-+ {
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+ const char *errmsg;
-+
-+ *strp += 7;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_16,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return _("missing `)'");
-+ (*strp) ++;
-+
-+ if (errmsg == NULL
-+ && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ {
-+ return _("%dsp16() takes a symbolic address, not a number");
-+ }
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ /* Don't successfully parse literals beginning with '['. */
-+ if (**strp == '[')
-+ return "Invalid literal"; /* Anything -- will not be seen. */
-+
-+ /* Don't successfully parse register names. */
-+ if (m32c_cgen_isa_register (strp))
-+ return "Invalid literal"; /* Anything -- will not be seen. */
-+
-+ if (strncmp (*strp, "0x0", 3) == 0
-+ || (**strp == '0' && *(*strp + 1) != 'x'))
-+ have_zero = 1;
-+
-+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
-+ if (errmsg)
-+ return errmsg;
-+
-+ if (value > 0xffff)
-+ return _("dsp:16 immediate is out of range");
-+
-+ /* If this field may require a relocation then use larger dsp24. */
-+ if (cd->machs == MACH_M32C && ! have_zero && value == 0
-+ && (strncmp (*strp, "[a", 2) == 0
-+ || **strp == ','
-+ || **strp == 0))
-+ return _("dsp:16 immediate is out of range");
-+
-+ *valuep = value;
-+ return 0;
-+}
-+
-+static const char *
-+parse_signed16 (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, signed long *valuep)
-+{
-+ const char *errmsg = 0;
-+ signed long value;
-+
-+ if (strncasecmp (*strp, "%lo16(", 6) == 0)
-+ {
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+ const char *errmsg;
-+
-+ *strp += 6;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return _("missing `)'");
-+ (*strp) ++;
-+
-+ if (errmsg == NULL
-+ && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ {
-+ value &= 0xffff;
-+ }
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ if (strncasecmp (*strp, "%hi16(", 6) == 0)
-+ {
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+ const char *errmsg;
-+
-+ *strp += 6;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return _("missing `)'");
-+ (*strp) ++;
-+
-+ if (errmsg == NULL
-+ && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ {
-+ value >>= 16;
-+ }
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ PARSE_SIGNED;
-+
-+ if (value <= 65535 && value > 32767)
-+ value -= 0x10000;
-+
-+ if (value < -32768 || value > 32767)
-+ return _("dsp:16 immediate is out of range");
-+
-+ *valuep = value;
-+ return 0;
-+}
-+
-+static const char *
-+parse_unsigned20 (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, unsigned long *valuep)
-+{
-+ const char *errmsg = 0;
-+ unsigned long value;
-+
-+ /* Don't successfully parse literals beginning with '['. */
-+ if (**strp == '[')
-+ return "Invalid literal"; /* Anything -- will not be seen. */
-+
-+ /* Don't successfully parse register names. */
-+ if (m32c_cgen_isa_register (strp))
-+ return "Invalid literal"; /* Anything -- will not be seen. */
-+
-+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
-+ if (errmsg)
-+ return errmsg;
-+
-+ if (value > 0xfffff)
-+ return _("dsp:20 immediate is out of range");
-+
-+ *valuep = value;
-+ return 0;
-+}
-+
-+static const char *
-+parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, unsigned long *valuep)
-+{
-+ const char *errmsg = 0;
-+ unsigned long value;
-+
-+ /* Don't successfully parse literals beginning with '['. */
-+ if (**strp == '[')
-+ return "Invalid literal"; /* Anything -- will not be seen. */
-+
-+ /* Don't successfully parse register names. */
-+ if (m32c_cgen_isa_register (strp))
-+ return "Invalid literal"; /* Anything -- will not be seen. */
-+
-+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
-+ if (errmsg)
-+ return errmsg;
-+
-+ if (value > 0xffffff)
-+ return _("dsp:24 immediate is out of range");
-+
-+ *valuep = value;
-+ return 0;
-+}
-+
-+/* This should only be used for #imm->reg. */
-+static const char *
-+parse_signed24 (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, signed long *valuep)
-+{
-+ const char *errmsg = 0;
-+ signed long value;
-+
-+ PARSE_SIGNED;
-+
-+ if (value <= 0xffffff && value > 0x7fffff)
-+ value -= 0x1000000;
-+
-+ if (value > 0xffffff)
-+ return _("dsp:24 immediate is out of range");
-+
-+ *valuep = value;
-+ return 0;
-+}
-+
-+static const char *
-+parse_signed32 (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, signed long *valuep)
-+{
-+ const char *errmsg = 0;
-+ signed long value;
-+
-+ errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
-+ if (errmsg)
-+ return errmsg;
-+
-+ *valuep = value;
-+ return 0;
-+}
-+
-+static const char *
-+parse_imm1_S (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, signed long *valuep)
-+{
-+ const char *errmsg = 0;
-+ signed long value;
-+
-+ errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
-+ if (errmsg)
-+ return errmsg;
-+
-+ if (value < 1 || value > 2)
-+ return _("immediate is out of range 1-2");
-+
-+ *valuep = value;
-+ return 0;
-+}
-+
-+static const char *
-+parse_imm3_S (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, signed long *valuep)
-+{
-+ const char *errmsg = 0;
-+ signed long value;
-+
-+ errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
-+ if (errmsg)
-+ return errmsg;
-+
-+ if (value < 1 || value > 8)
-+ return _("immediate is out of range 1-8");
-+
-+ *valuep = value;
-+ return 0;
-+}
-+
-+static const char *
-+parse_lab_5_3 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex ATTRIBUTE_UNUSED,
-+ int opinfo,
-+ enum cgen_parse_operand_result *type_addr,
-+ bfd_vma *valuep)
-+{
-+ const char *errmsg = 0;
-+ bfd_vma value;
-+ enum cgen_parse_operand_result op_res;
-+
-+ errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3,
-+ opinfo, & op_res, & value);
-+
-+ if (type_addr)
-+ *type_addr = op_res;
-+
-+ if (op_res == CGEN_PARSE_OPERAND_ADDRESS)
-+ {
-+ /* This is a hack; the field cannot handle near-zero signed
-+ offsets that CGEN wants to put in to indicate an "empty"
-+ operand at first. */
-+ *valuep = 2;
-+ return 0;
-+ }
-+ if (errmsg)
-+ return errmsg;
-+
-+ if (value < 2 || value > 9)
-+ return _("immediate is out of range 2-9");
-+
-+ *valuep = value;
-+ return 0;
-+}
-+
-+static const char *
-+parse_Bitno16R (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, unsigned long *valuep)
-+{
-+ const char *errmsg = 0;
-+ unsigned long value;
-+
-+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);
-+ if (errmsg)
-+ return errmsg;
-+
-+ if (value > 15)
-+ return _("Bit number for indexing general register is out of range 0-15");
-+
-+ *valuep = value;
-+ return 0;
-+}
-+
-+static const char *
-+parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, unsigned long *valuep,
-+ unsigned bits)
-+{
-+ const char *errmsg = 0;
-+ unsigned long bit;
-+ unsigned long base;
-+ const char *newp = *strp;
-+ unsigned long long bitbase;
-+
-+ errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
-+ if (errmsg)
-+ return errmsg;
-+
-+ if (*newp != ',')
-+ return "Missing base for bit,base:8";
-+
-+ ++newp;
-+ errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & base);
-+ if (errmsg)
-+ return errmsg;
-+
-+ bitbase = (unsigned long long) bit + ((unsigned long long) base * 8);
-+
-+ if (bitbase >= (1ull << bits))
-+ return _("bit,base is out of range");
-+
-+ *valuep = bitbase;
-+ *strp = newp;
-+ return 0;
-+}
-+
-+static const char *
-+parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, signed long *valuep,
-+ unsigned bits)
-+{
-+ const char *errmsg = 0;
-+ unsigned long bit;
-+ signed long base;
-+ const char *newp = *strp;
-+ long long bitbase;
-+ long long limit;
-+
-+ errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit);
-+ if (errmsg)
-+ return errmsg;
-+
-+ if (*newp != ',')
-+ return "Missing base for bit,base:8";
-+
-+ ++newp;
-+ errmsg = cgen_parse_signed_integer (cd, & newp, opindex, & base);
-+ if (errmsg)
-+ return errmsg;
-+
-+ bitbase = (long long)bit + ((long long)base * 8);
-+
-+ limit = 1ll << (bits - 1);
-+ if (bitbase < -limit || bitbase >= limit)
-+ return _("bit,base is out of range");
-+
-+ *valuep = bitbase;
-+ *strp = newp;
-+ return 0;
-+}
-+
-+static const char *
-+parse_unsigned_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, unsigned long *valuep)
-+{
-+ return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8);
-+}
-+
-+static const char *
-+parse_unsigned_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, unsigned long *valuep)
-+{
-+ return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11);
-+}
-+
-+static const char *
-+parse_unsigned_bitbase16 (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, unsigned long *valuep)
-+{
-+ return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16);
-+}
-+
-+static const char *
-+parse_unsigned_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, unsigned long *valuep)
-+{
-+ return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19);
-+}
-+
-+static const char *
-+parse_unsigned_bitbase27 (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, unsigned long *valuep)
-+{
-+ return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27);
-+}
-+
-+static const char *
-+parse_signed_bitbase8 (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, signed long *valuep)
-+{
-+ return parse_signed_bitbase (cd, strp, opindex, valuep, 8);
-+}
-+
-+static const char *
-+parse_signed_bitbase11 (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, signed long *valuep)
-+{
-+ return parse_signed_bitbase (cd, strp, opindex, valuep, 11);
-+}
-+
-+static const char *
-+parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, signed long *valuep)
-+{
-+ return parse_signed_bitbase (cd, strp, opindex, valuep, 19);
-+}
-+
-+/* Parse the suffix as :<char> or as nothing followed by a whitespace. */
-+
-+static const char *
-+parse_suffix (const char **strp, char suffix)
-+{
-+ const char *newp = *strp;
-+
-+ if (**strp == ':' && TOLOWER (*(*strp + 1)) == suffix)
-+ newp = *strp + 2;
-+
-+ if (ISSPACE (*newp))
-+ {
-+ *strp = newp;
-+ return 0;
-+ }
-+
-+ return "Invalid suffix"; /* Anything -- will not be seen. */
-+}
-+
-+static const char *
-+parse_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
-+ int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
-+{
-+ return parse_suffix (strp, 's');
-+}
-+
-+static const char *
-+parse_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
-+ int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
-+{
-+ return parse_suffix (strp, 'g');
-+}
-+
-+static const char *
-+parse_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
-+ int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
-+{
-+ return parse_suffix (strp, 'q');
-+}
-+
-+static const char *
-+parse_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
-+ int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
-+{
-+ return parse_suffix (strp, 'z');
-+}
-+
-+/* Parse an empty suffix. Fail if the next char is ':'. */
-+
-+static const char *
-+parse_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
-+ int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
-+{
-+ if (**strp == ':')
-+ return "Unexpected suffix";
-+ return 0;
-+}
-+
-+static const char *
-+parse_r0l_r0h (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex ATTRIBUTE_UNUSED, signed long *valuep)
-+{
-+ const char *errmsg;
-+ signed long value;
-+ signed long junk;
-+ const char *newp = *strp;
-+
-+ /* Parse r0[hl]. */
-+ errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l_r0h, & value);
-+ if (errmsg)
-+ return errmsg;
-+
-+ if (*newp != ',')
-+ return _("not a valid r0l/r0h pair");
-+ ++newp;
-+
-+ /* Parse the second register in the pair. */
-+ if (value == 0) /* r0l */
-+ errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0h, & junk);
-+ else
-+ errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l, & junk);
-+ if (errmsg)
-+ return errmsg;
-+
-+ *strp = newp;
-+ *valuep = ! value;
-+ return 0;
-+}
-+
-+/* Accept .b or .w in any case. */
-+
-+static const char *
-+parse_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
-+ int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED)
-+{
-+ if (**strp == '.'
-+ && (*(*strp + 1) == 'b' || *(*strp + 1) == 'B'
-+ || *(*strp + 1) == 'w' || *(*strp + 1) == 'W'))
-+ {
-+ *strp += 2;
-+ return NULL;
-+ }
-+
-+ return _("Invalid size specifier");
-+}
-+
-+/* Special check to ensure that instruction exists for given machine. */
-+
-+int
-+m32c_cgen_insn_supported (CGEN_CPU_DESC cd,
-+ const CGEN_INSN *insn)
-+{
-+ int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
-+ CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA);
-+
-+ /* If attributes are absent, assume no restriction. */
-+ if (machs == 0)
-+ machs = ~0;
-+
-+ return ((machs & cd->machs)
-+ && cgen_bitset_intersect_p (& isas, cd->isas));
-+}
-+
-+/* Parse a set of registers, R0,R1,A0,A1,SB,FB. */
-+
-+static const char *
-+parse_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ const char **strp,
-+ int opindex ATTRIBUTE_UNUSED,
-+ unsigned long *valuep,
-+ int push)
-+{
-+ const char *errmsg = 0;
-+ int regno = 0;
-+
-+ *valuep = 0;
-+ while (**strp && **strp != ')')
-+ {
-+ if (**strp == 'r' || **strp == 'R')
-+ {
-+ ++*strp;
-+ regno = **strp - '0';
-+ if (regno > 4)
-+ errmsg = _("Register number is not valid");
-+ }
-+ else if (**strp == 'a' || **strp == 'A')
-+ {
-+ ++*strp;
-+ regno = **strp - '0';
-+ if (regno > 2)
-+ errmsg = _("Register number is not valid");
-+ regno = **strp - '0' + 4;
-+ }
-+
-+ else if (strncasecmp (*strp, "sb", 2) == 0 || strncasecmp (*strp, "SB", 2) == 0)
-+ {
-+ regno = 6;
-+ ++*strp;
-+ }
-+
-+ else if (strncasecmp (*strp, "fb", 2) == 0 || strncasecmp (*strp, "FB", 2) == 0)
-+ {
-+ regno = 7;
-+ ++*strp;
-+ }
-+
-+ if (push) /* Mask is reversed for push. */
-+ *valuep |= 0x80 >> regno;
-+ else
-+ *valuep |= 1 << regno;
-+
-+ ++*strp;
-+ if (**strp == ',')
-+ {
-+ if (*(*strp + 1) == ')')
-+ break;
-+ ++*strp;
-+ }
-+ }
-+
-+ if (!*strp)
-+ errmsg = _("Register list is not valid");
-+
-+ return errmsg;
-+}
-+
-+#define POP 0
-+#define PUSH 1
-+
-+static const char *
-+parse_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ const char **strp,
-+ int opindex ATTRIBUTE_UNUSED,
-+ unsigned long *valuep)
-+{
-+ return parse_regset (cd, strp, opindex, valuep, POP);
-+}
-+
-+static const char *
-+parse_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ const char **strp,
-+ int opindex ATTRIBUTE_UNUSED,
-+ unsigned long *valuep)
-+{
-+ return parse_regset (cd, strp, opindex, valuep, PUSH);
-+}
-+
-+/* -- dis.c */
-+
-+#include "elf/m32c.h"
-+#include "elf-bfd.h"
-+
-+/* Always print the short insn format suffix as ':<char>'. */
-+
-+static void
-+print_suffix (void * dis_info, char suffix)
-+{
-+ disassemble_info *info = dis_info;
-+
-+ (*info->fprintf_func) (info->stream, ":%c", suffix);
-+}
-+
-+static void
-+print_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value ATTRIBUTE_UNUSED,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ print_suffix (dis_info, 's');
-+}
-+
-+
-+static void
-+print_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value ATTRIBUTE_UNUSED,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ print_suffix (dis_info, 'g');
-+}
-+
-+static void
-+print_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value ATTRIBUTE_UNUSED,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ print_suffix (dis_info, 'q');
-+}
-+
-+static void
-+print_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value ATTRIBUTE_UNUSED,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ print_suffix (dis_info, 'z');
-+}
-+
-+/* Print the empty suffix. */
-+
-+static void
-+print_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info ATTRIBUTE_UNUSED,
-+ long value ATTRIBUTE_UNUSED,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ return;
-+}
-+
-+static void
-+print_r0l_r0h (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = dis_info;
-+
-+ if (value == 0)
-+ (*info->fprintf_func) (info->stream, "r0h,r0l");
-+ else
-+ (*info->fprintf_func) (info->stream, "r0l,r0h");
-+}
-+
-+static void
-+print_unsigned_bitbase (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ unsigned long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = dis_info;
-+
-+ (*info->fprintf_func) (info->stream, "%ld,0x%lx", value & 0x7, value >> 3);
-+}
-+
-+static void
-+print_signed_bitbase (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ signed long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = dis_info;
-+
-+ (*info->fprintf_func) (info->stream, "%ld,%ld", value & 0x7, value >> 3);
-+}
-+
-+static void
-+print_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value ATTRIBUTE_UNUSED,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ /* Always print the size as '.w'. */
-+ disassemble_info *info = dis_info;
-+
-+ (*info->fprintf_func) (info->stream, ".w");
-+}
-+
-+#define POP 0
-+#define PUSH 1
-+
-+static void print_pop_regset (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
-+static void print_push_regset (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
-+
-+/* Print a set of registers, R0,R1,A0,A1,SB,FB. */
-+
-+static void
-+print_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED,
-+ int push)
-+{
-+ static char * m16c_register_names [] =
-+ {
-+ "r0", "r1", "r2", "r3", "a0", "a1", "sb", "fb"
-+ };
-+ disassemble_info *info = dis_info;
-+ int mask;
-+ int index = 0;
-+ char* comma = "";
-+
-+ if (push)
-+ mask = 0x80;
-+ else
-+ mask = 1;
-+
-+ if (value & mask)
-+ {
-+ (*info->fprintf_func) (info->stream, "%s", m16c_register_names [0]);
-+ comma = ",";
-+ }
-+
-+ for (index = 1; index <= 7; ++index)
-+ {
-+ if (push)
-+ mask >>= 1;
-+ else
-+ mask <<= 1;
-+
-+ if (value & mask)
-+ {
-+ (*info->fprintf_func) (info->stream, "%s%s", comma,
-+ m16c_register_names [index]);
-+ comma = ",";
-+ }
-+ }
-+}
-+
-+static void
-+print_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ print_regset (cd, dis_info, value, attrs, pc, length, POP);
-+}
-+
-+static void
-+print_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ print_regset (cd, dis_info, value, attrs, pc, length, PUSH);
-+}
-+
-+static void
-+print_signed4n (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ signed long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = dis_info;
-+
-+ (*info->fprintf_func) (info->stream, "%ld", -value);
-+}
-diff -Nur binutils-2.24.orig/cgen/cpu/m32r.cpu binutils-2.24/cgen/cpu/m32r.cpu
---- binutils-2.24.orig/cgen/cpu/m32r.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/m32r.cpu 2016-06-30 21:26:12.625892023 +0200
-@@ -0,0 +1,2408 @@
-+; Renesas M32R CPU description. -*- Scheme -*-
-+; Copyright (C) 2000, 2003 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+(include "simplify.inc")
-+
-+; FIXME: Delete sign extension of accumulator results.
-+; Sign extension is done when accumulator is read.
-+
-+; define-arch must appear first
-+
-+(define-arch
-+ (name m32r) ; name of cpu family
-+ (comment "Renesas M32R")
-+ (default-alignment aligned)
-+ (insn-lsb0? #f)
-+ (machs m32r m32rx m32r2)
-+ (isas m32r)
-+)
-+
-+; Attributes.
-+
-+; An attribute to describe which pipeline an insn runs in.
-+; O_OS is a special attribute for sll, sra, sla, slli, srai, slai.
-+; These instructions have O attribute for m32rx and OS attribute for m32r2.
-+
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name PIPE)
-+ (comment "parallel execution pipeline selection")
-+ (values NONE O S OS O_OS)
-+)
-+
-+; A derived attribute that says which insns can be executed in parallel
-+; with others. This is a required attribute for architectures with
-+; parallel execution.
-+
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name PARALLEL)
-+ (attrs META) ; do not define in any generated file for now
-+ (values NO YES)
-+ (default (if (eq-attr (current-insn) PIPE NONE) (symbol NO) (symbol YES)))
-+)
-+
-+; Instruction set parameters.
-+
-+(define-isa
-+ (name m32r)
-+
-+ ; This is 32 because 16 bit insns always appear as pairs.
-+ ; ??? See if this can go away. It's only used by the disassembler (right?)
-+ ; to decide how long an unknown insn is. One value isn't sufficient (e.g. if
-+ ; on a 16 bit (and not 32 bit) boundary, will only want to advance pc by 16.)
-+ (default-insn-bitsize 32)
-+
-+ ; Number of bytes of insn we can initially fetch.
-+ ; The M32R is tricky in that insns are either two 16-bit insns
-+ ; (executed sequentially or in parallel) or one 32-bit insn.
-+ ; So on one hand the base insn size is 16 bits, but on another it's 32.
-+ ; 32 is chosen because:
-+ ; - if the chip were ever bi-endian it is believed that the byte order would
-+ ; be based on 32 bit quantities
-+ ; - 32 bit insns are always aligned on 32 bit boundaries
-+ ; - the pc will never stop on a 16 bit (and not 32 bit) boundary
-+ ; [well actually it can, but there are no branches to such places]
-+ (base-insn-bitsize 32)
-+
-+ ; Used in computing bit numbers.
-+ (default-insn-word-bitsize 32)
-+
-+ ; The m32r fetches 2 insns at a time.
-+ (liw-insns 2)
-+
-+ ; While the m32r can execute insns in parallel, the base mach can't
-+ ; (other than nop). The base mach is greatly handicapped by this, but
-+ ; we still need to cleanly handle it.
-+ (parallel-insns 2)
-+
-+ ; Initial bitnumbers to decode insns by.
-+ (decode-assist (0 1 2 3 8 9 10 11))
-+
-+ ; Classification of instructions that fit in the various frames.
-+ ; wip, not currently used
-+ (insn-types (long ; name
-+ 31 ; length
-+ (eq-attr (current-insn) LENGTH 31) ; matching insns
-+ (0 1 2 7 8 9 10) ; decode-assist
-+ )
-+ (short
-+ 15
-+ (eq-attr (current-insn) LENGTH 15) ; matching insns
-+ (0 1 2 7 8 9 10)
-+ )
-+ )
-+
-+ ; Instruction framing.
-+ ; Each m32r insn is either one 32 bit insn, two 16 bit insns executed
-+ ; serially (left->right), or two 16 bit insns executed parallelly.
-+ ; wip, not currently used
-+ (frame long32 ; name
-+ ((long)) ; list of insns in frame, plus constraint
-+ "$0" ; assembler
-+ (+ (1 1) (31 $0)) ; value
-+ (sequence () (execute $0)) ; action
-+ )
-+ (frame serial2x16
-+ ((short)
-+ (short))
-+ "$0 -> $1"
-+ (+ (1 0) (15 $0) (1 0) (15 $1))
-+ (sequence ()
-+ (execute $0)
-+ (execute $1))
-+ )
-+ (frame parallel2x16
-+ ((short (eq-attr (current-insn) PIPE "O,BOTH"))
-+ (short (eq-attr (current-insn) PIPE "S,BOTH")))
-+ "$0 || $1"
-+ (+ (1 0) (15 $0) (1 1) (15 $1))
-+ (parallel ()
-+ (execute $0)
-+ (execute $1))
-+ )
-+)
-+
-+; Cpu family definitions.
-+
-+; ??? define-cpu-family [and in general "cpu-family"] might be clearer than
-+; define-cpu.
-+; ??? Have define-arch provide defaults for architecture that define-cpu can
-+; then override [reduces duplication in define-cpu].
-+; ??? Another way to go is to delete cpu-families entirely and have one mach
-+; able to inherit things from another mach (would also need the ability to
-+; not only override specific inherited things but also disable some,
-+; e.g. if an insn wasn't supported).
-+
-+(define-cpu
-+ ; cpu names must be distinct from the architecture name and machine names.
-+ ; The "b" suffix stands for "base" and is the convention.
-+ ; The "f" suffix stands for "family" and is the convention.
-+ (name m32rbf)
-+ (comment "Renesas M32R base family")
-+ (endian either)
-+ (word-bitsize 32)
-+ ; Override isa spec (??? keeps things simpler, though it was more true
-+ ; in the early days and not so much now).
-+ (parallel-insns 1)
-+)
-+
-+(define-cpu
-+ (name m32rxf)
-+ (comment "Renesas M32Rx family")
-+ (endian either)
-+ (word-bitsize 32)
-+ ; Generated files have an "x" suffix.
-+ (file-transform "x")
-+)
-+
-+(define-cpu
-+ (name m32r2f)
-+ (comment "Renesas M32R2 family")
-+ (endian either)
-+ (word-bitsize 32)
-+ ; Generated files have an "2" suffix.
-+ (file-transform "2")
-+)
-+
-+(define-mach
-+ (name m32r)
-+ (comment "Generic M32R cpu")
-+ (cpu m32rbf)
-+)
-+
-+(define-mach
-+ (name m32rx)
-+ (comment "M32RX cpu")
-+ (cpu m32rxf)
-+)
-+
-+(define-mach
-+ (name m32r2)
-+ (comment "M32R2 cpu")
-+ (cpu m32r2f)
-+)
-+
-+; Model descriptions.
-+
-+; The meaning of this value is wip but at the moment it's intended to describe
-+; the implementation (i.e. what -mtune=foo does in sparc gcc).
-+;
-+; Notes while wip:
-+; - format of pipeline entry:
-+; (pipeline name (stage1-name ...) (stage2-name ...) ...)
-+; The contents of a stage description is wip.
-+; - each mach must have at least one model
-+; - the default model must be the first one
-+;- maybe have `retire' support update total cycle count to handle current
-+; parallel insn cycle counting problems
-+
-+(define-model
-+ (name m32r/d) (comment "m32r/d") (attrs)
-+ (mach m32r)
-+
-+ ;(prefetch)
-+ ;(retire)
-+
-+ (pipeline p-non-mem "" () ((fetch) (decode) (execute) (writeback)))
-+ (pipeline p-mem "" () ((fetch) (decode) (execute) (memory) (writeback)))
-+
-+ ; `state' is a list of variables for recording model state
-+ (state
-+ ; bit mask of h-gr registers, =1 means value being loaded from memory
-+ (h-gr UINT)
-+ )
-+
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((sr INT -1) (dr INT -1)) ; inputs
-+ ((dr INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-cmp "Compare Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((src1 INT -1) (src2 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-mac "Multiply/Accumulate Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((src1 INT -1) (src2 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-cti "Branch Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((sr INT -1)) ; inputs
-+ ((pc)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-load "Memory Load Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((sr INT)
-+ ;(ld-mem AI)
-+ ) ; inputs
-+ ((dr INT)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-store "Memory Store Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((src1 INT) (src2 INT)) ; inputs
-+ () ; ((st-mem AI)) ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+(define-model
-+ (name test) (comment "test") (attrs)
-+ (mach m32r)
-+ (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () () () ())
-+)
-+
-+; Each mach must have at least one model.
-+
-+(define-model
-+ (name m32rx) (comment "m32rx") (attrs)
-+ (mach m32rx)
-+
-+ ; ??? It's 6 stages but I forget the details right now.
-+ (pipeline p-o "" () ((fetch) (decode) (execute) (writeback)))
-+ (pipeline p-s "" () ((fetch) (decode) (execute) (writeback)))
-+ (pipeline p-o-mem "" () ((fetch) (decode) (execute) (memory) (writeback)))
-+
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((sr INT -1) (dr INT -1)) ; inputs
-+ ((dr INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-cmp "Compare Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((src1 INT -1) (src2 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-mac "Multiply/Accumulate Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((src1 INT -1) (src2 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-cti "Branch Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((sr INT -1)) ; inputs
-+ ((pc)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-load "Memory Load Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((sr INT)) ; inputs
-+ ((dr INT)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-store "Memory Store Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((src1 INT) (src2 INT)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+(define-model
-+ (name m32r2) (comment "m32r2") (attrs)
-+ (mach m32r2)
-+
-+ ; ??? It's 6 stages but I forget the details right now.
-+ (pipeline p-o "" () ((fetch) (decode) (execute) (writeback)))
-+ (pipeline p-s "" () ((fetch) (decode) (execute) (writeback)))
-+ (pipeline p-o-mem "" () ((fetch) (decode) (execute) (memory) (writeback)))
-+
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((sr INT -1) (dr INT -1)) ; inputs
-+ ((dr INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-cmp "Compare Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((src1 INT -1) (src2 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-mac "Multiply/Accumulate Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((src1 INT -1) (src2 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-cti "Branch Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((sr INT -1)) ; inputs
-+ ((pc)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-load "Memory Load Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((sr INT)) ; inputs
-+ ((dr INT)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-store "Memory Store Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((src1 INT) (src2 INT)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+; The instruction fetch/execute cycle.
-+; This is split into two parts as sometimes more than one instruction is
-+; decoded at once.
-+; The `const SI' argument to decode/execute is used to distinguish
-+; multiple instructions processed at the same time (e.g. m32r).
-+;
-+; ??? This is wip, and not currently used.
-+; ??? Needs to be moved to define-isa.
-+
-+; This is how to fetch and decode an instruction.
-+
-+;(define-extract
-+; (sequence VOID
-+; (if VOID (ne AI (and AI pc (const AI 3)) (const AI 0))
-+; (sequence VOID
-+; (set-quiet USI (scratch UHI insn1) (ifetch UHI pc))
-+; (decode VOID pc (and UHI insn1 (const UHI #x7fff))
-+; (const SI 0)))
-+; (sequence VOID
-+; (set-quiet USI (scratch USI insn) (ifetch USI pc))
-+; (if VOID (ne USI (and USI insn (const USI #x80000000))
-+; (const USI 0))
-+; (decode VOID pc (srl USI insn (const WI 16)) (const SI 0))
-+; (sequence VOID
-+; ; ??? parallel support
-+; (decode VOID pc (srl USI insn (const WI 16))
-+; (const SI 0))
-+; (decode VOID (add AI pc (const AI 2))
-+; (and USI insn (const WI #x7fff))
-+; (const SI 1))))))
-+; )
-+;)
-+
-+; This is how to execute a decoded instruction.
-+
-+;(define-execute
-+; (sequence VOID () ; () is empty option list
-+; ((AI new_pc))
-+; (set AI new_pc (execute: AI (const 0)) #:quiet)
-+; (set AI pc new_pc #:direct)
-+; )
-+;)
-+
-+; FIXME: It might simplify things to separate the execute process from the
-+; one that updates the PC.
-+
-+; Instruction fields.
-+;
-+; Attributes:
-+; PCREL-ADDR: pc relative value (for reloc and disassembly purposes)
-+; ABS-ADDR: absolute address (for reloc and disassembly purposes?)
-+; RESERVED: bits are not used to decode insn, must be all 0
-+; RELOC: there is a relocation associated with this field (experiment)
-+
-+(define-attr
-+ (for ifield operand)
-+ (type boolean)
-+ (name RELOC)
-+ (comment "there is a reloc associated with this field (experiment)")
-+)
-+
-+(dnf f-op1 "op1" () 0 4)
-+(dnf f-op2 "op2" () 8 4)
-+(dnf f-cond "cond" () 4 4)
-+(dnf f-r1 "r1" () 4 4)
-+(dnf f-r2 "r2" () 12 4)
-+(df f-simm8 "simm8" () 8 8 INT #f #f)
-+(df f-simm16 "simm16" () 16 16 INT #f #f)
-+(dnf f-shift-op2 "shift op2" () 8 3)
-+(dnf f-uimm3 "uimm3" () 5 3)
-+(dnf f-uimm4 "uimm4" () 12 4)
-+(dnf f-uimm5 "uimm5" () 11 5)
-+(dnf f-uimm8 "uimm8" () 8 8)
-+(dnf f-uimm16 "uimm16" () 16 16)
-+(dnf f-uimm24 "uimm24" (ABS-ADDR RELOC) 8 24)
-+(dnf f-hi16 "high 16 bits" (SIGN-OPT) 16 16)
-+(df f-disp8 "disp8, slot unknown" (PCREL-ADDR RELOC) 8 8 INT
-+ ((value pc) (sra WI (sub WI value (and WI pc (const -4))) (const 2)))
-+ ((value pc) (add WI (sll WI value (const 2)) (and WI pc (const -4)))))
-+(df f-disp16 "disp16" (PCREL-ADDR RELOC) 16 16 INT
-+ ((value pc) (sra WI (sub WI value pc) (const 2)))
-+ ((value pc) (add WI (sll WI value (const 2)) pc)))
-+(df f-disp24 "disp24" (PCREL-ADDR RELOC) 8 24 INT
-+ ((value pc) (sra WI (sub WI value pc) (const 2)))
-+ ((value pc) (add WI (sll WI value (const 2)) pc)))
-+
-+(dnf f-op23 "op2.3" () 9 3)
-+(dnf f-op3 "op3" () 14 2)
-+(dnf f-acc "acc" () 8 1)
-+(dnf f-accs "accs" () 12 2)
-+(dnf f-accd "accd" () 4 2)
-+(dnf f-bits67 "bits67" () 6 2)
-+(dnf f-bit4 "bit4" () 4 1)
-+(dnf f-bit14 "bit14" () 14 1)
-+
-+(define-ifield (name f-imm1) (comment "1 bit immediate, 0->1 1->2")
-+ (attrs)
-+ (start 15) (length 1)
-+ (encode (value pc) (sub WI value (const WI 1)))
-+ (decode (value pc) (add WI value (const WI 1)))
-+)
-+
-+; Enums.
-+
-+; insn-op1: bits 0-3
-+; FIXME: should use die macro or some such
-+(define-normal-insn-enum insn-op1 "insn format enums" () OP1_ f-op1
-+ ("0" "1" "2" "3" "4" "5" "6" "7"
-+ "8" "9" "10" "11" "12" "13" "14" "15")
-+)
-+
-+; insn-op2: bits 8-11
-+; FIXME: should use die macro or some such
-+(define-normal-insn-enum insn-op2 "op2 enums" () OP2_ f-op2
-+ ("0" "1" "2" "3" "4" "5" "6" "7"
-+ "8" "9" "10" "11" "12" "13" "14" "15")
-+)
-+
-+; Hardware pieces.
-+; These entries list the elements of the raw hardware.
-+; They're also used to provide tables and other elements of the assembly
-+; language.
-+
-+(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
-+
-+(dnh h-hi16 "high 16 bits" ()
-+ (immediate (UINT 16))
-+ () () ()
-+)
-+
-+; These two aren't technically needed.
-+; They're here for illustration sake mostly.
-+; Plus they cause the value to be stored in the extraction buffers to only
-+; be 16 bits wide (vs 32 or 64). Whoopie ding. But it's fun.
-+(dnh h-slo16 "signed low 16 bits" ()
-+ (immediate (INT 16))
-+ () () ()
-+)
-+(dnh h-ulo16 "unsigned low 16 bits" ()
-+ (immediate (UINT 16))
-+ () () ()
-+)
-+
-+(define-keyword
-+ (name gr-names)
-+ (print-name h-gr)
-+ (prefix "")
-+ (values (fp 13) (lr 14) (sp 15)
-+ (r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)
-+ (r8 8) (r9 9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14) (r15 15))
-+)
-+
-+(define-hardware
-+ (name h-gr)
-+ (comment "general registers")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register WI (16))
-+ (indices extern-keyword gr-names)
-+)
-+
-+(define-keyword
-+ (name cr-names)
-+ (print-name h-cr)
-+ (prefix "")
-+ (values (psw 0) (cbr 1) (spi 2) (spu 3)
-+ (bpc 6) (bbpsw 8) (bbpc 14) (evb 5)
-+ (cr0 0) (cr1 1) (cr2 2) (cr3 3)
-+ (cr4 4) (cr5 5) (cr6 6) (cr7 7)
-+ (cr8 8) (cr9 9) (cr10 10) (cr11 11)
-+ (cr12 12) (cr13 13) (cr14 14) (cr15 15))
-+)
-+
-+(define-hardware
-+ (name h-cr)
-+ (comment "control registers")
-+ (type register UWI (16))
-+ (indices extern-keyword cr-names)
-+ (get (index) (c-call UWI "@cpu@_h_cr_get_handler" index))
-+ (set (index newval) (c-call VOID "@cpu@_h_cr_set_handler" index newval))
-+)
-+
-+; The actual accumulator is only 56 bits.
-+; The top 8 bits are sign extended from bit 8 (when counting msb = bit 0).
-+; To simplify the accumulator instructions, no attempt is made to keep the
-+; top 8 bits properly sign extended (currently there's no point since they
-+; all ignore them). When the value is read it is properly sign extended
-+; [in the `get' handler].
-+(define-hardware
-+ (name h-accum)
-+ (comment "accumulator")
-+ (type register DI)
-+ (get () (c-call DI "@cpu@_h_accum_get_handler"))
-+ (set (newval) (c-call VOID "@cpu@_h_accum_set_handler" newval))
-+)
-+
-+; FIXME: Revisit after sanitization can be removed. Remove h-accum.
-+(define-hardware
-+ (name h-accums)
-+ (comment "accumulators")
-+ (attrs (MACH m32rx,m32r2))
-+ (type register DI (2))
-+ (indices keyword "" ((a0 0) (a1 1)))
-+ ; get/set so a0 accesses are redirected to h-accum.
-+ ; They're also so reads can properly sign extend the value.
-+ ; FIXME: Needn't be a function call.
-+ (get (index) (c-call DI "@cpu@_h_accums_get_handler" index))
-+ (set (index newval) (c-call VOID "@cpu@_h_accums_set_handler" index newval))
-+)
-+
-+; For condbit operand. FIXME: Need to allow spec of get/set of operands.
-+; Having this separate from h-psw keeps the parts that use it simpler
-+; [since they greatly outnumber those that use h-psw].
-+(dsh h-cond "condition bit" () (register BI))
-+
-+; The actual values of psw,bpsw,bbpsw are recorded here to allow access
-+; to them as a unit.
-+(define-hardware
-+ (name h-psw)
-+ (comment "psw part of psw")
-+ (type register UQI)
-+ ; get/set to handle cond bit.
-+ ; FIXME: missing: use's and clobber's
-+ ; FIXME: remove c-call?
-+ (get () (c-call UQI "@cpu@_h_psw_get_handler"))
-+ (set (newval) (c-call VOID "@cpu@_h_psw_set_handler" newval))
-+)
-+(dsh h-bpsw "backup psw" () (register UQI))
-+(dsh h-bbpsw "backup bpsw" () (register UQI))
-+
-+; FIXME: Later make add get/set specs and support SMP.
-+(dsh h-lock "lock" () (register BI))
-+
-+; Instruction Operands.
-+; These entries provide a layer between the assembler and the raw hardware
-+; description, and are used to refer to hardware elements in the semantic
-+; code. Usually there's a bit of over-specification, but in more complicated
-+; instruction sets there isn't.
-+
-+; M32R specific operand attributes:
-+
-+(define-attr
-+ (for operand)
-+ (type boolean)
-+ (name HASH-PREFIX)
-+ (comment "immediates have an optional '#' prefix")
-+)
-+
-+; ??? Convention says this should be o-sr, but then the insn definitions
-+; should refer to o-sr which is clumsy. The "o-" could be implicit, but
-+; then it should be implicit for all the symbols here, but then there would
-+; be confusion between (f-)simm8 and (h-)simm8.
-+; So for now the rule is exactly as it appears here.
-+
-+(dnop sr "source register" () h-gr f-r2)
-+(dnop dr "destination register" () h-gr f-r1)
-+;; The assembler relies upon the fact that dr and src1 are the same field.
-+;; FIXME: Revisit.
-+(dnop src1 "source register 1" () h-gr f-r1)
-+(dnop src2 "source register 2" () h-gr f-r2)
-+(dnop scr "source control register" () h-cr f-r2)
-+(dnop dcr "destination control register" () h-cr f-r1)
-+
-+(dnop simm8 "8 bit signed immediate" (HASH-PREFIX) h-sint f-simm8)
-+(dnop simm16 "16 bit signed immediate" (HASH-PREFIX) h-sint f-simm16)
-+(dnop uimm3 "3 bit unsigned number" (HASH-PREFIX) h-uint f-uimm3)
-+(dnop uimm4 "4 bit trap number" (HASH-PREFIX) h-uint f-uimm4)
-+(dnop uimm5 "5 bit shift count" (HASH-PREFIX) h-uint f-uimm5)
-+(dnop uimm8 "8 bit unsigned immediate" (HASH-PREFIX) h-uint f-uimm8)
-+(dnop uimm16 "16 bit unsigned immediate" (HASH-PREFIX) h-uint f-uimm16)
-+
-+(dnop imm1 "1 bit immediate" ((MACH m32rx,m32r2) HASH-PREFIX) h-uint f-imm1)
-+(dnop accd "accumulator destination register" ((MACH m32rx,m32r2)) h-accums f-accd)
-+(dnop accs "accumulator source register" ((MACH m32rx,m32r2)) h-accums f-accs)
-+(dnop acc "accumulator reg (d)" ((MACH m32rx,m32r2)) h-accums f-acc)
-+
-+; slo16,ulo16 are used in both with-hash-prefix/no-hash-prefix cases.
-+; e.g. add3 r3,r3,#1 and ld r3,@(4,r4). We could use HASH-PREFIX.
-+; Instead we create a fake operand `hash'. The m32r is an illustration port,
-+; so we often try out various ways of doing things.
-+
-+(define-operand (name hash) (comment "# prefix") (attrs)
-+ (type h-sint) ; doesn't really matter
-+ (index f-nil)
-+ (handlers (parse "hash") (print "hash"))
-+)
-+
-+; For high(foo),shigh(foo).
-+(define-operand
-+ (name hi16)
-+ (comment "high 16 bit immediate, sign optional")
-+ (attrs)
-+ (type h-hi16)
-+ (index f-hi16)
-+ (handlers (parse "hi16"))
-+)
-+
-+; For low(foo),sda(foo).
-+(define-operand
-+ (name slo16)
-+ (comment "16 bit signed immediate, for low()")
-+ (attrs)
-+ (type h-slo16)
-+ (index f-simm16)
-+ (handlers (parse "slo16"))
-+)
-+
-+; For low(foo).
-+(define-operand
-+ (name ulo16)
-+ (comment "16 bit unsigned immediate, for low()")
-+ (attrs)
-+ (type h-ulo16)
-+ (index f-uimm16)
-+ (handlers (parse "ulo16"))
-+)
-+
-+(dnop uimm24 "24 bit address" (HASH-PREFIX) h-addr f-uimm24)
-+
-+(define-operand
-+ (name disp8)
-+ (comment "8 bit displacement")
-+ (attrs RELAX)
-+ (type h-iaddr)
-+ (index f-disp8)
-+ ; ??? Early experiments had insert/extract fields here.
-+ ; Moving these to f-disp8 made things cleaner, but may wish to re-introduce
-+ ; fields here to handle more complicated cases.
-+)
-+
-+(dnop disp16 "16 bit displacement" () h-iaddr f-disp16)
-+(dnop disp24 "24 bit displacement" (RELAX) h-iaddr f-disp24)
-+
-+; These hardware elements are refered to frequently.
-+
-+(dnop condbit "condition bit" (SEM-ONLY) h-cond f-nil)
-+(dnop accum "accumulator" (SEM-ONLY) h-accum f-nil)
-+
-+; Instruction definitions.
-+;
-+; Notes while wip:
-+; - dni is a cover macro to the real "this is an instruction" keyword.
-+; The syntax of the real one is yet to be determined.
-+; At the lowest level (i.e. the "real" one) it will probably take a variable
-+; list of arguments where each argument [perhaps after the standard three of
-+; name, comment, attrs] is "(keyword arg-to-keyword)". This syntax is simple
-+; and yet completely upward extensible. And given the macro facility, one
-+; needn't code at that low a level so even though it'll be more verbose than
-+; necessary it won't matter. This same reasoning can be applied to most
-+; types of entries in this file.
-+
-+; M32R specific instruction attributes:
-+
-+; FILL-SLOT: Need next insn to begin on 32 bit boundary.
-+; (A "slot" as used here is a 32 bit quantity that can either be filled with
-+; one 32 bit insn or two 16 bit insns which go in the "left bin" and "right
-+; bin" where the left bin is the one with a lower address).
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name FILL-SLOT)
-+ (comment "fill right bin with `nop' if insn is in left bin")
-+)
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name SPECIAL)
-+ (comment "non-public m32rx insn")
-+)
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name SPECIAL_M32R)
-+ (comment "non-public m32r insn")
-+)
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name SPECIAL_FLOAT)
-+ (comment "floating point insn")
-+)
-+
-+; IDOC attribute for instruction documentation.
-+
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name IDOC)
-+ (comment "insn kind for documentation")
-+ (attrs META)
-+ (values
-+ (MEM - () "Memory")
-+ (ALU - () "ALU")
-+ (BR - () "Branch")
-+ (ACCUM - () "Accumulator")
-+ (MAC - () "Multiply/Accumulate")
-+ (MISC - () "Miscellaneous")
-+ )
-+)
-+
-+(define-pmacro (bin-op mnemonic op2-op sem-op imm-prefix imm)
-+ (begin
-+ (dni mnemonic
-+ (.str mnemonic " reg/reg")
-+ ((PIPE OS) (IDOC ALU))
-+ (.str mnemonic " $dr,$sr")
-+ (+ OP1_0 op2-op dr sr)
-+ (set dr (sem-op dr sr))
-+ ()
-+ )
-+ (dni (.sym mnemonic "3")
-+ (.str mnemonic " reg/" imm)
-+ ((IDOC ALU))
-+ (.str mnemonic "3 $dr,$sr," imm-prefix "$" imm)
-+ (+ OP1_8 op2-op dr sr imm)
-+ (set dr (sem-op sr imm))
-+ ()
-+ )
-+ )
-+)
-+(bin-op add OP2_10 add "$hash" slo16)
-+; sub isn't present because sub3 doesn't exist.
-+(bin-op and OP2_12 and "" uimm16)
-+(bin-op or OP2_14 or "$hash" ulo16)
-+(bin-op xor OP2_13 xor "" uimm16)
-+
-+(dni addi "addi"
-+ ((PIPE OS) (IDOC ALU))
-+ ;#.(string-append "addi " "$dr,$simm8") ; #. experiment
-+ "addi $dr,$simm8"
-+ (+ OP1_4 dr simm8)
-+ (set dr (add dr simm8))
-+ ((m32r/d (unit u-exec))
-+ (m32rx (unit u-exec))
-+ (m32r2 (unit u-exec)))
-+)
-+
-+(dni addv "addv"
-+ ((PIPE OS) (IDOC ALU))
-+ "addv $dr,$sr"
-+ (+ OP1_0 OP2_8 dr sr)
-+ (parallel ()
-+ (set dr (add dr sr))
-+ (set condbit (add-oflag dr sr (const 0))))
-+ ()
-+)
-+
-+(dni addv3 "addv3"
-+ ((IDOC ALU))
-+ "addv3 $dr,$sr,$simm16"
-+ (+ OP1_8 OP2_8 dr sr simm16)
-+ (parallel ()
-+ (set dr (add sr simm16))
-+ (set condbit (add-oflag sr simm16 (const 0))))
-+ ()
-+)
-+
-+(dni addx "addx"
-+ ((PIPE OS) (IDOC ALU))
-+ "addx $dr,$sr"
-+ (+ OP1_0 OP2_9 dr sr)
-+ (parallel ()
-+ (set dr (addc dr sr condbit))
-+ (set condbit (add-cflag dr sr condbit)))
-+ ()
-+)
-+
-+(dni bc8 "bc with 8 bit displacement"
-+ (COND-CTI (PIPE O) (IDOC BR))
-+ "bc.s $disp8"
-+ (+ OP1_7 (f-r1 12) disp8)
-+ (if condbit (set pc disp8))
-+ ((m32r/d (unit u-cti))
-+ (m32rx (unit u-cti))
-+ (m32r2 (unit u-cti)))
-+)
-+
-+(dnmi bc8r "relaxable bc8"
-+ (COND-CTI RELAXABLE (PIPE O) (IDOC BR))
-+ "bc $disp8"
-+ (emit bc8 disp8)
-+)
-+
-+(dni bc24 "bc with 24 bit displacement"
-+ (COND-CTI (IDOC BR))
-+ "bc.l $disp24"
-+ (+ OP1_15 (f-r1 12) disp24)
-+ (if condbit (set pc disp24))
-+ ((m32r/d (unit u-cti))
-+ (m32rx (unit u-cti))
-+ (m32r2 (unit u-cti)))
-+)
-+
-+(dnmi bc24r "relaxable bc24"
-+ (COND-CTI RELAXED (IDOC BR))
-+ "bc $disp24"
-+ (emit bc24 disp24)
-+)
-+
-+(dni beq "beq"
-+ (COND-CTI (IDOC BR))
-+ "beq $src1,$src2,$disp16"
-+ (+ OP1_11 OP2_0 src1 src2 disp16)
-+ (if (eq src1 src2) (set pc disp16))
-+ ((m32r/d (unit u-cti) (unit u-cmp (cycles 0)))
-+ (m32rx (unit u-cti) (unit u-cmp (cycles 0)))
-+ (m32r2 (unit u-cti) (unit u-cmp (cycles 0))))
-+)
-+
-+(define-pmacro (cbranch sym comment op2-op comp-op)
-+ (dni sym comment (COND-CTI (IDOC BR))
-+ (.str sym " $src2,$disp16")
-+ (+ OP1_11 op2-op (f-r1 0) src2 disp16)
-+ (if (comp-op src2 (const WI 0)) (set pc disp16))
-+ ((m32r/d (unit u-cti) (unit u-cmp (cycles 0)))
-+ (m32rx (unit u-cti) (unit u-cmp (cycles 0)))
-+ (m32r2 (unit u-cti) (unit u-cmp (cycles 0))))
-+ )
-+)
-+(cbranch beqz "beqz" OP2_8 eq)
-+(cbranch bgez "bgez" OP2_11 ge)
-+(cbranch bgtz "bgtz" OP2_13 gt)
-+(cbranch blez "blez" OP2_12 le)
-+(cbranch bltz "bltz" OP2_10 lt)
-+(cbranch bnez "bnez" OP2_9 ne)
-+
-+(dni bl8 "bl with 8 bit displacement"
-+ (UNCOND-CTI FILL-SLOT (PIPE O) (IDOC BR))
-+ "bl.s $disp8"
-+ (+ OP1_7 (f-r1 14) disp8)
-+ (sequence ()
-+ (set (reg h-gr 14)
-+ (add (and pc (const -4)) (const 4)))
-+ (set pc disp8))
-+ ((m32r/d (unit u-cti))
-+ (m32rx (unit u-cti))
-+ (m32r2 (unit u-cti)))
-+)
-+
-+(dnmi bl8r "relaxable bl8"
-+ (UNCOND-CTI FILL-SLOT RELAXABLE (PIPE O) (IDOC BR))
-+ "bl $disp8"
-+ (emit bl8 disp8)
-+)
-+
-+(dni bl24 "bl with 24 bit displacement"
-+ (UNCOND-CTI (IDOC BR))
-+ "bl.l $disp24"
-+ (+ OP1_15 (f-r1 14) disp24)
-+ (sequence ()
-+ (set (reg h-gr 14) (add pc (const 4)))
-+ (set pc disp24))
-+ ((m32r/d (unit u-cti))
-+ (m32rx (unit u-cti))
-+ (m32r2 (unit u-cti)))
-+)
-+
-+(dnmi bl24r "relaxable bl24"
-+ (UNCOND-CTI RELAXED (IDOC BR))
-+ "bl $disp24"
-+ (emit bl24 disp24)
-+)
-+
-+(dni bcl8 "bcl with 8 bit displacement"
-+ (COND-CTI FILL-SLOT (MACH m32rx,m32r2) (PIPE O) (IDOC BR))
-+ "bcl.s $disp8"
-+ (+ OP1_7 (f-r1 8) disp8)
-+ (if condbit
-+ (sequence ()
-+ (set (reg h-gr 14)
-+ (add (and pc (const -4))
-+ (const 4)))
-+ (set pc disp8)))
-+ ((m32rx (unit u-cti))
-+ (m32r2 (unit u-cti)))
-+)
-+
-+(dnmi bcl8r "relaxable bcl8"
-+ (COND-CTI FILL-SLOT (MACH m32rx,m32r2) (PIPE O) RELAXABLE (IDOC BR))
-+ "bcl $disp8"
-+ (emit bcl8 disp8)
-+)
-+
-+(dni bcl24 "bcl with 24 bit displacement"
-+ (COND-CTI (MACH m32rx,m32r2) (IDOC BR))
-+ "bcl.l $disp24"
-+ (+ OP1_15 (f-r1 8) disp24)
-+ (if condbit
-+ (sequence ()
-+ (set (reg h-gr 14) (add pc (const 4)))
-+ (set pc disp24)))
-+ ((m32rx (unit u-cti))
-+ (m32r2 (unit u-cti)))
-+)
-+
-+(dnmi bcl24r "relaxable bcl24"
-+ (COND-CTI (MACH m32rx,m32r2) RELAXED (IDOC BR))
-+ "bcl $disp24"
-+ (emit bcl24 disp24)
-+)
-+
-+(dni bnc8 "bnc with 8 bit displacement"
-+ (COND-CTI (PIPE O) (IDOC BR))
-+ "bnc.s $disp8"
-+ (+ OP1_7 (f-r1 13) disp8)
-+ (if (not condbit) (set pc disp8))
-+ ((m32r/d (unit u-cti))
-+ (m32rx (unit u-cti))
-+ (m32r2 (unit u-cti)))
-+)
-+
-+(dnmi bnc8r "relaxable bnc8"
-+ (COND-CTI RELAXABLE (PIPE O) (IDOC BR))
-+ "bnc $disp8"
-+ (emit bnc8 disp8)
-+)
-+
-+(dni bnc24 "bnc with 24 bit displacement"
-+ (COND-CTI (IDOC BR))
-+ "bnc.l $disp24"
-+ (+ OP1_15 (f-r1 13) disp24)
-+ (if (not condbit) (set pc disp24))
-+ ((m32r/d (unit u-cti))
-+ (m32rx (unit u-cti))
-+ (m32r2 (unit u-cti)))
-+)
-+
-+(dnmi bnc24r "relaxable bnc24"
-+ (COND-CTI RELAXED (IDOC BR))
-+ "bnc $disp24"
-+ (emit bnc24 disp24)
-+)
-+
-+(dni bne "bne"
-+ (COND-CTI (IDOC BR))
-+ "bne $src1,$src2,$disp16"
-+ (+ OP1_11 OP2_1 src1 src2 disp16)
-+ (if (ne src1 src2) (set pc disp16))
-+ ((m32r/d (unit u-cti) (unit u-cmp (cycles 0)))
-+ (m32rx (unit u-cti) (unit u-cmp (cycles 0)))
-+ (m32r2 (unit u-cti) (unit u-cmp (cycles 0))))
-+)
-+
-+(dni bra8 "bra with 8 bit displacement"
-+ (UNCOND-CTI FILL-SLOT (PIPE O) (IDOC BR))
-+ "bra.s $disp8"
-+ (+ OP1_7 (f-r1 15) disp8)
-+ (set pc disp8)
-+ ((m32r/d (unit u-cti))
-+ (m32rx (unit u-cti))
-+ (m32r2 (unit u-cti)))
-+)
-+
-+(dnmi bra8r "relaxable bra8"
-+ (UNCOND-CTI FILL-SLOT RELAXABLE (PIPE O) (IDOC BR))
-+ "bra $disp8"
-+ (emit bra8 disp8)
-+)
-+
-+(dni bra24 "bra with 24 displacement"
-+ (UNCOND-CTI (IDOC BR))
-+ "bra.l $disp24"
-+ (+ OP1_15 (f-r1 15) disp24)
-+ (set pc disp24)
-+ ((m32r/d (unit u-cti))
-+ (m32rx (unit u-cti))
-+ (m32r2 (unit u-cti)))
-+)
-+
-+(dnmi bra24r "relaxable bra24"
-+ (UNCOND-CTI RELAXED (IDOC BR))
-+ "bra $disp24"
-+ (emit bra24 disp24)
-+)
-+
-+(dni bncl8 "bncl with 8 bit displacement"
-+ (COND-CTI FILL-SLOT (MACH m32rx,m32r2) (PIPE O) (IDOC BR))
-+ "bncl.s $disp8"
-+ (+ OP1_7 (f-r1 9) disp8)
-+ (if (not condbit)
-+ (sequence ()
-+ (set (reg h-gr 14)
-+ (add (and pc (const -4))
-+ (const 4)))
-+ (set pc disp8)))
-+ ((m32rx (unit u-cti))
-+ (m32r2 (unit u-cti)))
-+)
-+
-+(dnmi bncl8r "relaxable bncl8"
-+ (COND-CTI FILL-SLOT (MACH m32rx,m32r2) (PIPE O) RELAXABLE (IDOC BR))
-+ "bncl $disp8"
-+ (emit bncl8 disp8)
-+)
-+
-+(dni bncl24 "bncl with 24 bit displacement"
-+ (COND-CTI (MACH m32rx,m32r2) (IDOC BR))
-+ "bncl.l $disp24"
-+ (+ OP1_15 (f-r1 9) disp24)
-+ (if (not condbit)
-+ (sequence ()
-+ (set (reg h-gr 14) (add pc (const 4)))
-+ (set pc disp24)))
-+ ((m32rx (unit u-cti))
-+ (m32r2 (unit u-cti)))
-+)
-+
-+(dnmi bncl24r "relaxable bncl24"
-+ (COND-CTI (MACH m32rx,m32r2) RELAXED (IDOC BR))
-+ "bncl $disp24"
-+ (emit bncl24 disp24)
-+)
-+
-+(dni cmp "cmp"
-+ ((PIPE OS) (IDOC ALU))
-+ "cmp $src1,$src2"
-+ (+ OP1_0 OP2_4 src1 src2)
-+ (set condbit (lt src1 src2))
-+ ((m32r/d (unit u-cmp))
-+ (m32rx (unit u-cmp))
-+ (m32r2 (unit u-cmp)))
-+)
-+
-+(dni cmpi "cmpi"
-+ ((IDOC ALU))
-+ "cmpi $src2,$simm16"
-+ (+ OP1_8 (f-r1 0) OP2_4 src2 simm16)
-+ (set condbit (lt src2 simm16))
-+ ((m32r/d (unit u-cmp))
-+ (m32rx (unit u-cmp))
-+ (m32r2 (unit u-cmp)))
-+)
-+
-+(dni cmpu "cmpu"
-+ ((PIPE OS) (IDOC ALU))
-+ "cmpu $src1,$src2"
-+ (+ OP1_0 OP2_5 src1 src2)
-+ (set condbit (ltu src1 src2))
-+ ((m32r/d (unit u-cmp))
-+ (m32rx (unit u-cmp))
-+ (m32r2 (unit u-cmp)))
-+)
-+
-+(dni cmpui "cmpui"
-+ ((IDOC ALU))
-+ "cmpui $src2,$simm16"
-+ (+ OP1_8 (f-r1 0) OP2_5 src2 simm16)
-+ (set condbit (ltu src2 simm16))
-+ ((m32r/d (unit u-cmp))
-+ (m32rx (unit u-cmp))
-+ (m32r2 (unit u-cmp)))
-+)
-+
-+(dni cmpeq "cmpeq"
-+ ((MACH m32rx,m32r2) (PIPE OS) (IDOC ALU))
-+ "cmpeq $src1,$src2"
-+ (+ OP1_0 OP2_6 src1 src2)
-+ (set condbit (eq src1 src2))
-+ ((m32rx (unit u-cmp))
-+ (m32r2 (unit u-cmp)))
-+)
-+
-+(dni cmpz "cmpz"
-+ ((MACH m32rx,m32r2) (PIPE OS) (IDOC ALU))
-+ "cmpz $src2"
-+ (+ OP1_0 OP2_7 (f-r1 0) src2)
-+ (set condbit (eq src2 (const 0)))
-+ ((m32rx (unit u-cmp))
-+ (m32r2 (unit u-cmp)))
-+)
-+
-+(dni div "div"
-+ ((IDOC ALU))
-+ "div $dr,$sr"
-+ (+ OP1_9 OP2_0 dr sr (f-simm16 0))
-+ (if (ne sr (const 0)) (set dr (div dr sr)))
-+ ((m32r/d (unit u-exec (cycles 37)))
-+ (m32rx (unit u-exec (cycles 37)))
-+ (m32r2 (unit u-exec (cycles 37))))
-+)
-+
-+(dni divu "divu"
-+ ((IDOC ALU))
-+ "divu $dr,$sr"
-+ (+ OP1_9 OP2_1 dr sr (f-simm16 0))
-+ (if (ne sr (const 0)) (set dr (udiv dr sr)))
-+ ((m32r/d (unit u-exec (cycles 37)))
-+ (m32rx (unit u-exec (cycles 37)))
-+ (m32r2 (unit u-exec (cycles 37))))
-+)
-+
-+(dni rem "rem"
-+ ((IDOC ALU))
-+ "rem $dr,$sr"
-+ (+ OP1_9 OP2_2 dr sr (f-simm16 0))
-+ ; FIXME: Check rounding direction.
-+ (if (ne sr (const 0)) (set dr (mod dr sr)))
-+ ((m32r/d (unit u-exec (cycles 37)))
-+ (m32rx (unit u-exec (cycles 37)))
-+ (m32r2 (unit u-exec (cycles 37))))
-+)
-+
-+(dni remu "remu"
-+ ((IDOC ALU))
-+ "remu $dr,$sr"
-+ (+ OP1_9 OP2_3 dr sr (f-simm16 0))
-+ ; FIXME: Check rounding direction.
-+ (if (ne sr (const 0)) (set dr (umod dr sr)))
-+ ((m32r/d (unit u-exec (cycles 37)))
-+ (m32rx (unit u-exec (cycles 37)))
-+ (m32r2 (unit u-exec (cycles 37))))
-+)
-+
-+(dni remh "remh"
-+ ((MACH m32r2))
-+ "remh $dr,$sr"
-+ (+ OP1_9 OP2_2 dr sr (f-simm16 #x10))
-+ ; FIXME: Check rounding direction.
-+ (if (ne sr (const 0)) (set dr (mod (ext WI (trunc HI dr)) sr)))
-+ ((m32r2 (unit u-exec (cycles 21))))
-+)
-+
-+(dni remuh "remuh"
-+ ((MACH m32r2))
-+ "remuh $dr,$sr"
-+ (+ OP1_9 OP2_3 dr sr (f-simm16 #x10))
-+ ; FIXME: Check rounding direction.
-+ (if (ne sr (const 0)) (set dr (umod dr sr)))
-+ ((m32r2 (unit u-exec (cycles 21))))
-+)
-+
-+(dni remb "remb"
-+ ((MACH m32r2))
-+ "remb $dr,$sr"
-+ (+ OP1_9 OP2_2 dr sr (f-simm16 #x18))
-+ ; FIXME: Check rounding direction.
-+ (if (ne sr (const 0)) (set dr (mod (ext WI (trunc BI dr)) sr)))
-+ ((m32r2 (unit u-exec (cycles 21))))
-+)
-+
-+(dni remub "remub"
-+ ((MACH m32r2))
-+ "remub $dr,$sr"
-+ (+ OP1_9 OP2_3 dr sr (f-simm16 #x18))
-+ ; FIXME: Check rounding direction.
-+ (if (ne sr (const 0)) (set dr (umod dr sr)))
-+ ((m32r2 (unit u-exec (cycles 21))))
-+)
-+
-+(dni divuh "divuh"
-+ ((MACH m32r2))
-+ "divuh $dr,$sr"
-+ (+ OP1_9 OP2_1 dr sr (f-simm16 #x10))
-+ (if (ne sr (const 0)) (set dr (udiv dr sr)))
-+ ((m32r2 (unit u-exec (cycles 21))))
-+)
-+
-+(dni divb "divb"
-+ ((MACH m32r2))
-+ "divb $dr,$sr"
-+ (+ OP1_9 OP2_0 dr sr (f-simm16 #x18))
-+ (if (ne sr (const 0)) (set dr (div (ext WI (trunc BI dr)) sr)))
-+ ((m32r2 (unit u-exec (cycles 21))))
-+)
-+
-+(dni divub "divub"
-+ ((MACH m32r2))
-+ "divub $dr,$sr"
-+ (+ OP1_9 OP2_1 dr sr (f-simm16 #x18))
-+ (if (ne sr (const 0)) (set dr (udiv dr sr)))
-+ ((m32r2 (unit u-exec (cycles 21))))
-+)
-+
-+(dni divh "divh"
-+ ((MACH m32rx,m32r2) (IDOC ALU))
-+ "divh $dr,$sr"
-+ (+ OP1_9 OP2_0 dr sr (f-simm16 #x10))
-+ (if (ne sr (const 0)) (set dr (div (ext WI (trunc HI dr)) sr)))
-+ ((m32rx (unit u-exec (cycles 21)))
-+ (m32r2 (unit u-exec (cycles 21))))
-+)
-+
-+(dni jc "jc"
-+ (COND-CTI (MACH m32rx,m32r2) (PIPE O) SPECIAL (IDOC BR))
-+ "jc $sr"
-+ (+ OP1_1 (f-r1 12) OP2_12 sr)
-+ (if condbit (set pc (and sr (const -4))))
-+ ((m32rx (unit u-cti))
-+ (m32r2 (unit u-cti)))
-+)
-+
-+(dni jnc "jnc"
-+ (COND-CTI (MACH m32rx,m32r2) (PIPE O) SPECIAL (IDOC BR))
-+ "jnc $sr"
-+ (+ OP1_1 (f-r1 13) OP2_12 sr)
-+ (if (not condbit) (set pc (and sr (const -4))))
-+ ((m32rx (unit u-cti))
-+ (m32r2 (unit u-cti)))
-+)
-+
-+(dni jl "jl"
-+ (UNCOND-CTI FILL-SLOT (PIPE O) (IDOC BR))
-+ "jl $sr"
-+ (+ OP1_1 (f-r1 14) OP2_12 sr)
-+ (parallel ()
-+ (set (reg h-gr 14)
-+ (add (and pc (const -4)) (const 4)))
-+ (set pc (and sr (const -4))))
-+ ((m32r/d (unit u-cti))
-+ (m32rx (unit u-cti))
-+ (m32r2 (unit u-cti)))
-+)
-+
-+(dni jmp "jmp"
-+ (UNCOND-CTI (PIPE O) (IDOC BR))
-+ "jmp $sr"
-+ (+ OP1_1 (f-r1 15) OP2_12 sr)
-+ (set pc (and sr (const -4)))
-+ ; The above works now so this kludge has been commented out.
-+ ; It's kept around because the f-r1 reference in the semantic part
-+ ; should work.
-+ ; FIXME: kludge, instruction decoding not finished.
-+ ; But this should work, so that's another FIXME.
-+ ;(sequence VOID (if VOID (eq SI f-r1 (const SI 14))
-+ ; FIXME: abuf->insn should be a macro of some sort.
-+ ;(sequence VOID
-+ ; (if VOID (eq SI (c-code SI "((abuf->insn >> 8) & 15)")
-+ ; (const SI 14))
-+ ; (set WI (reg WI h-gr 14)
-+ ; (add WI (and WI pc (const WI -4)) (const WI 4))))
-+ ; (set WI pc sr))
-+ ((m32r/d (unit u-cti))
-+ (m32rx (unit u-cti))
-+ (m32r2 (unit u-cti)))
-+)
-+
-+(define-pmacro (no-ext-expr mode expr) expr)
-+(define-pmacro (ext-expr mode expr) (ext mode expr))
-+(define-pmacro (zext-expr mode expr) (zext mode expr))
-+
-+(define-pmacro (load-op suffix op2-op mode ext-op)
-+ (begin
-+ (dni (.sym ld suffix) (.str "ld" suffix)
-+ ((PIPE O) (IDOC MEM))
-+ (.str "ld" suffix " $dr,@$sr")
-+ (+ OP1_2 op2-op dr sr)
-+ (set dr (ext-op WI (mem mode sr)))
-+ ((m32r/d (unit u-load))
-+ (m32rx (unit u-load))
-+ (m32r2 (unit u-load)))
-+ )
-+ (dnmi (.sym ld suffix "-2") (.str "ld" suffix "-2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "ld" suffix " $dr,@($sr)")
-+ (emit (.sym ld suffix) dr sr))
-+ (dni (.sym ld suffix -d) (.str "ld" suffix "-d")
-+ ((IDOC MEM))
-+ (.str "ld" suffix " $dr,@($slo16,$sr)")
-+ (+ OP1_10 op2-op dr sr slo16)
-+ (set dr (ext-op WI (mem mode (add sr slo16))))
-+ ((m32r/d (unit u-load (cycles 2)))
-+ (m32rx (unit u-load (cycles 2)))
-+ (m32r2 (unit u-load (cycles 2))))
-+ )
-+ (dnmi (.sym ld suffix -d2) (.str "ld" suffix "-d2")
-+ (NO-DIS (IDOC MEM))
-+ (.str "ld" suffix " $dr,@($sr,$slo16)")
-+ (emit (.sym ld suffix -d) dr sr slo16))
-+ )
-+)
-+(load-op "" OP2_12 WI no-ext-expr)
-+(load-op b OP2_8 QI ext-expr)
-+(load-op h OP2_10 HI ext-expr)
-+(load-op ub OP2_9 QI zext-expr)
-+(load-op uh OP2_11 HI zext-expr)
-+
-+(dni ld-plus "ld+"
-+ ((PIPE O) (IDOC MEM))
-+ "ld $dr,@$sr+"
-+ (+ OP1_2 dr OP2_14 sr)
-+ (parallel ()
-+ ; wip: memory addresses in profiling support
-+ ;(set dr (name ld-mem (mem WI sr)))
-+ (set dr (mem WI sr))
-+ (set sr (add sr (const 4))))
-+ ; Note: `pred' is the constraint. Also useful here is (ref name)
-+ ; and returns true if operand <name> was referenced
-+ ; (where "referenced" means _read_ if input operand and _written_ if
-+ ; output operand).
-+ ; args to unit are "unit-name (name1 value1) ..."
-+ ; - cycles(done),issue,pred are also specified this way
-+ ; - if unspecified, default is used
-+ ; - for ins/outs, extra arg is passed that says what was specified
-+ ; - this is AND'd with `written' for outs
-+ ((m32r/d (unit u-load (pred (const 1)))
-+ (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1))))
-+ (m32rx (unit u-load)
-+ (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1))))
-+ (m32r2 (unit u-load)
-+ (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1))))
-+ )
-+)
-+
-+(dnmi pop "pop"
-+ ((PIPE O) (IDOC MEM))
-+ "pop $dr"
-+ (emit ld-plus dr (sr 15)) ; "ld %0,@sp+"
-+)
-+
-+(dni ld24 "ld24"
-+ ((IDOC MEM))
-+ "ld24 $dr,$uimm24"
-+ (+ OP1_14 dr uimm24)
-+ (set dr uimm24)
-+ ()
-+)
-+
-+; ldi8 appears before ldi16 so we try the shorter version first
-+
-+(dni ldi8 "ldi8"
-+ ((PIPE OS) (IDOC ALU))
-+ "ldi8 $dr,$simm8"
-+ (+ OP1_6 dr simm8)
-+ (set dr simm8)
-+ ()
-+)
-+
-+(dnmi ldi8a "ldi8 alias"
-+ ((PIPE OS) (IDOC ALU))
-+ "ldi $dr,$simm8"
-+ (emit ldi8 dr simm8)
-+)
-+
-+(dni ldi16 "ldi16"
-+ ((IDOC ALU))
-+ "ldi16 $dr,$hash$slo16"
-+ (+ OP1_9 OP2_15 (f-r2 0) dr slo16)
-+ (set dr slo16)
-+ ()
-+)
-+
-+(dnmi ldi16a "ldi16 alias"
-+ ((IDOC ALU))
-+ "ldi $dr,$hash$slo16"
-+ (emit ldi16 dr slo16)
-+)
-+
-+(dni lock "lock"
-+ ((PIPE O) (IDOC MISC))
-+ "lock $dr,@$sr"
-+ (+ OP1_2 OP2_13 dr sr)
-+ (sequence ()
-+ (set (reg h-lock) (const BI 1))
-+ (set dr (mem WI sr)))
-+ ((m32r/d (unit u-load))
-+ (m32rx (unit u-load))
-+ (m32r2 (unit u-load)))
-+)
-+
-+(dni machi "machi"
-+ (
-+ ; (MACH m32r) is a temporary hack. This insn collides with machi-a
-+ ; in the simulator so disable it for m32rx.
-+ (MACH m32r) (PIPE S) (IDOC MAC)
-+ )
-+ "machi $src1,$src2"
-+ (+ OP1_3 OP2_4 src1 src2)
-+ ; FIXME: TRACE_RESULT will print the wrong thing since we
-+ ; alter one of the arguments.
-+ (set accum
-+ (sra DI
-+ (sll DI
-+ (add DI
-+ accum
-+ (mul DI
-+ (ext DI (and WI src1 (const #xffff0000)))
-+ (ext DI (trunc HI (sra WI src2 (const 16))))))
-+ (const 8))
-+ (const 8)))
-+ ((m32r/d (unit u-mac)))
-+)
-+
-+(dni machi-a "machi-a"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC))
-+ "machi $src1,$src2,$acc"
-+ (+ OP1_3 src1 acc (f-op23 4) src2)
-+ (set acc
-+ (sra DI
-+ (sll DI
-+ (add DI
-+ acc
-+ (mul DI
-+ (ext DI (and WI src1 (const #xffff0000)))
-+ (ext DI (trunc HI (sra WI src2 (const 16))))))
-+ (const 8))
-+ (const 8)))
-+ ((m32rx (unit u-mac))
-+ (m32r2 (unit u-mac)))
-+)
-+
-+(dni maclo "maclo"
-+ ((MACH m32r) (PIPE S) (IDOC MAC))
-+ "maclo $src1,$src2"
-+ (+ OP1_3 OP2_5 src1 src2)
-+ (set accum
-+ (sra DI
-+ (sll DI
-+ (add DI
-+ accum
-+ (mul DI
-+ (ext DI (sll WI src1 (const 16)))
-+ (ext DI (trunc HI src2))))
-+ (const 8))
-+ (const 8)))
-+ ((m32r/d (unit u-mac)))
-+)
-+
-+(dni maclo-a "maclo-a"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC))
-+ "maclo $src1,$src2,$acc"
-+ (+ OP1_3 src1 acc (f-op23 5) src2)
-+ (set acc
-+ (sra DI
-+ (sll DI
-+ (add DI
-+ acc
-+ (mul DI
-+ (ext DI (sll WI src1 (const 16)))
-+ (ext DI (trunc HI src2))))
-+ (const 8))
-+ (const 8)))
-+ ((m32rx (unit u-mac))
-+ (m32r2 (unit u-mac)))
-+)
-+
-+(dni macwhi "macwhi"
-+ ((MACH m32r) (PIPE S) (IDOC MAC))
-+ "macwhi $src1,$src2"
-+ (+ OP1_3 OP2_6 src1 src2)
-+ (set accum
-+ (sra DI
-+ (sll DI
-+ (add DI
-+ accum
-+ (mul DI
-+ (ext DI src1)
-+ (ext DI (trunc HI (sra WI src2 (const 16))))))
-+ (const 8))
-+ (const 8)))
-+ ((m32r/d (unit u-mac)))
-+)
-+
-+(dni macwhi-a "macwhi-a"
-+ ((MACH m32rx,m32r2) (PIPE S) SPECIAL (IDOC MAC))
-+ "macwhi $src1,$src2,$acc"
-+ (+ OP1_3 src1 acc (f-op23 6) src2)
-+ ; Note that this doesn't do the sign extension, which is correct.
-+ (set acc
-+ (add acc
-+ (mul (ext DI src1)
-+ (ext DI (trunc HI (sra src2 (const 16)))))))
-+ ((m32rx (unit u-mac))
-+ (m32r2 (unit u-mac)))
-+)
-+
-+(dni macwlo "macwlo"
-+ ((MACH m32r) (PIPE S) (IDOC MAC))
-+ "macwlo $src1,$src2"
-+ (+ OP1_3 OP2_7 src1 src2)
-+ (set accum
-+ (sra DI
-+ (sll DI
-+ (add DI
-+ accum
-+ (mul DI
-+ (ext DI src1)
-+ (ext DI (trunc HI src2))))
-+ (const 8))
-+ (const 8)))
-+ ((m32r/d (unit u-mac)))
-+)
-+
-+(dni macwlo-a "macwlo-a"
-+ ((MACH m32rx,m32r2) (PIPE S) SPECIAL (IDOC MAC))
-+ "macwlo $src1,$src2,$acc"
-+ (+ OP1_3 src1 acc (f-op23 7) src2)
-+ ; Note that this doesn't do the sign extension, which is correct.
-+ (set acc
-+ (add acc
-+ (mul (ext DI src1)
-+ (ext DI (trunc HI src2)))))
-+ ((m32rx (unit u-mac))
-+ (m32r2 (unit u-mac)))
-+)
-+
-+(dni mul "mul"
-+ ((PIPE S) (IDOC ALU))
-+ "mul $dr,$sr"
-+ (+ OP1_1 OP2_6 dr sr)
-+ (set dr (mul dr sr))
-+ ((m32r/d (unit u-exec (cycles 4)))
-+ (m32rx (unit u-exec (cycles 4)))
-+ (m32r2 (unit u-exec (cycles 4))))
-+)
-+
-+(dni mulhi "mulhi"
-+ ((MACH m32r) (PIPE S) (IDOC ACCUM))
-+ "mulhi $src1,$src2"
-+ (+ OP1_3 OP2_0 src1 src2)
-+ (set accum
-+ (sra DI
-+ (sll DI
-+ (mul DI
-+ (ext DI (and WI src1 (const #xffff0000)))
-+ (ext DI (trunc HI (sra WI src2 (const 16)))))
-+ (const 16))
-+ (const 16)))
-+ ((m32r/d (unit u-mac)))
-+)
-+
-+(dni mulhi-a "mulhi-a"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC ACCUM))
-+ "mulhi $src1,$src2,$acc"
-+ (+ OP1_3 (f-op23 0) src1 acc src2)
-+ (set acc
-+ (sra DI
-+ (sll DI
-+ (mul DI
-+ (ext DI (and WI src1 (const #xffff0000)))
-+ (ext DI (trunc HI (sra WI src2 (const 16)))))
-+ (const 16))
-+ (const 16)))
-+ ((m32rx (unit u-mac))
-+ (m32r2 (unit u-mac)))
-+)
-+
-+(dni mullo "mullo"
-+ ((MACH m32r) (PIPE S) (IDOC ACCUM))
-+ "mullo $src1,$src2"
-+ (+ OP1_3 OP2_1 src1 src2)
-+ (set accum
-+ (sra DI
-+ (sll DI
-+ (mul DI
-+ (ext DI (sll WI src1 (const 16)))
-+ (ext DI (trunc HI src2)))
-+ (const 16))
-+ (const 16)))
-+ ((m32r/d (unit u-mac)))
-+)
-+
-+(dni mullo-a "mullo-a"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC ACCUM))
-+ "mullo $src1,$src2,$acc"
-+ (+ OP1_3 src1 acc (f-op23 1) src2)
-+ (set acc
-+ (sra DI
-+ (sll DI
-+ (mul DI
-+ (ext DI (sll WI src1 (const 16)))
-+ (ext DI (trunc HI src2)))
-+ (const 16))
-+ (const 16)))
-+ ((m32rx (unit u-mac))
-+ (m32r2 (unit u-mac)))
-+)
-+
-+(dni mulwhi "mulwhi"
-+ ((MACH m32r) (PIPE S) (IDOC ACCUM))
-+ "mulwhi $src1,$src2"
-+ (+ OP1_3 OP2_2 src1 src2)
-+ (set accum
-+ (sra DI
-+ (sll DI
-+ (mul DI
-+ (ext DI src1)
-+ (ext DI (trunc HI (sra WI src2 (const 16)))))
-+ (const 8))
-+ (const 8)))
-+ ((m32r/d (unit u-mac)))
-+)
-+
-+(dni mulwhi-a "mulwhi-a"
-+ ((MACH m32rx,m32r2) (PIPE S) SPECIAL (IDOC ACCUM))
-+ "mulwhi $src1,$src2,$acc"
-+ (+ OP1_3 src1 acc (f-op23 2) src2)
-+ ; Note that this doesn't do the sign extension, which is correct.
-+ (set acc
-+ (mul (ext DI src1)
-+ (ext DI (trunc HI (sra src2 (const 16))))))
-+ ((m32rx (unit u-mac))
-+ (m32r2 (unit u-mac)))
-+)
-+
-+(dni mulwlo "mulwlo"
-+ ((MACH m32r) (PIPE S) (IDOC ACCUM))
-+ "mulwlo $src1,$src2"
-+ (+ OP1_3 OP2_3 src1 src2)
-+ (set accum
-+ (sra DI
-+ (sll DI
-+ (mul DI
-+ (ext DI src1)
-+ (ext DI (trunc HI src2)))
-+ (const 8))
-+ (const 8)))
-+ ((m32r/d (unit u-mac)))
-+)
-+
-+(dni mulwlo-a "mulwlo-a"
-+ ((MACH m32rx,m32r2) (PIPE S) SPECIAL (IDOC ACCUM))
-+ "mulwlo $src1,$src2,$acc"
-+ (+ OP1_3 src1 acc (f-op23 3) src2)
-+ ; Note that this doesn't do the sign extension, which is correct.
-+ (set acc
-+ (mul (ext DI src1)
-+ (ext DI (trunc HI src2))))
-+ ((m32rx (unit u-mac))
-+ (m32r2 (unit u-mac)))
-+)
-+
-+(dni mv "mv"
-+ ((PIPE OS) (IDOC ALU))
-+ "mv $dr,$sr"
-+ (+ OP1_1 OP2_8 dr sr)
-+ (set dr sr)
-+ ()
-+)
-+
-+(dni mvfachi "mvfachi"
-+ ((MACH m32r) (PIPE S) (IDOC ACCUM))
-+ "mvfachi $dr"
-+ (+ OP1_5 OP2_15 (f-r2 0) dr)
-+ (set dr (trunc WI (sra DI accum (const 32))))
-+ ((m32r/d (unit u-exec (cycles 2))))
-+)
-+
-+(dni mvfachi-a "mvfachi-a"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC ACCUM))
-+ "mvfachi $dr,$accs"
-+ (+ OP1_5 dr OP2_15 accs (f-op3 0))
-+ (set dr (trunc WI (sra DI accs (const 32))))
-+ ((m32rx (unit u-exec (cycles 2)))
-+ (m32r2 (unit u-exec (cycles 2))))
-+)
-+
-+(dni mvfaclo "mvfaclo"
-+ ((MACH m32r) (PIPE S) (IDOC ACCUM))
-+ "mvfaclo $dr"
-+ (+ OP1_5 OP2_15 (f-r2 1) dr)
-+ (set dr (trunc WI accum))
-+ ((m32r/d (unit u-exec (cycles 2))))
-+)
-+
-+(dni mvfaclo-a "mvfaclo-a"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC ACCUM))
-+ "mvfaclo $dr,$accs"
-+ (+ OP1_5 dr OP2_15 accs (f-op3 1))
-+ (set dr (trunc WI accs))
-+ ((m32rx (unit u-exec (cycles 2)))
-+ (m32r2 (unit u-exec (cycles 2))))
-+)
-+
-+(dni mvfacmi "mvfacmi"
-+ ((MACH m32r) (PIPE S) (IDOC ACCUM))
-+ "mvfacmi $dr"
-+ (+ OP1_5 OP2_15 (f-r2 2) dr)
-+ (set dr (trunc WI (sra DI accum (const 16))))
-+ ((m32r/d (unit u-exec (cycles 2))))
-+)
-+
-+(dni mvfacmi-a "mvfacmi-a"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC ACCUM))
-+ "mvfacmi $dr,$accs"
-+ (+ OP1_5 dr OP2_15 accs (f-op3 2))
-+ (set dr (trunc WI (sra DI accs (const 16))))
-+ ((m32rx (unit u-exec (cycles 2)))
-+ (m32r2 (unit u-exec (cycles 2))))
-+)
-+
-+(dni mvfc "mvfc"
-+ ((PIPE O) (IDOC MISC))
-+ "mvfc $dr,$scr"
-+ (+ OP1_1 OP2_9 dr scr)
-+ (set dr scr)
-+ ()
-+)
-+
-+(dni mvtachi "mvtachi"
-+ ((MACH m32r) (PIPE S) (IDOC ACCUM))
-+ "mvtachi $src1"
-+ (+ OP1_5 OP2_7 (f-r2 0) src1)
-+ (set accum
-+ (or DI
-+ (and DI accum (const DI #xffffffff))
-+ (sll DI (ext DI src1) (const 32))))
-+ ((m32r/d (unit u-exec (in sr src1))))
-+)
-+
-+(dni mvtachi-a "mvtachi-a"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC ACCUM))
-+ "mvtachi $src1,$accs"
-+ (+ OP1_5 src1 OP2_7 accs (f-op3 0))
-+ (set accs
-+ (or DI
-+ (and DI accs (const DI #xffffffff))
-+ (sll DI (ext DI src1) (const 32))))
-+ ((m32rx (unit u-exec (in sr src1)))
-+ (m32r2 (unit u-exec (in sr src1))))
-+)
-+
-+(dni mvtaclo "mvtaclo"
-+ ((MACH m32r) (PIPE S) (IDOC ACCUM))
-+ "mvtaclo $src1"
-+ (+ OP1_5 OP2_7 (f-r2 1) src1)
-+ (set accum
-+ (or DI
-+ (and DI accum (const DI #xffffffff00000000))
-+ (zext DI src1)))
-+ ((m32r/d (unit u-exec (in sr src1))))
-+)
-+
-+(dni mvtaclo-a "mvtaclo-a"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC ACCUM))
-+ "mvtaclo $src1,$accs"
-+ (+ OP1_5 src1 OP2_7 accs (f-op3 1))
-+ (set accs
-+ (or DI
-+ (and DI accs (const DI #xffffffff00000000))
-+ (zext DI src1)))
-+ ((m32rx (unit u-exec (in sr src1)))
-+ (m32r2 (unit u-exec (in sr src1))))
-+)
-+
-+(dni mvtc "mvtc"
-+ ((PIPE O) (IDOC MISC))
-+ "mvtc $sr,$dcr"
-+ (+ OP1_1 OP2_10 dcr sr)
-+ (set dcr sr)
-+ ()
-+)
-+
-+(dni neg "neg"
-+ ((PIPE OS) (IDOC ALU))
-+ "neg $dr,$sr"
-+ (+ OP1_0 OP2_3 dr sr)
-+ (set dr (neg sr))
-+ ()
-+)
-+
-+(dni nop "nop"
-+ ((PIPE OS) (IDOC MISC))
-+ "nop"
-+ (+ OP1_7 OP2_0 (f-r1 0) (f-r2 0))
-+ (c-code VOID "PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);\n")
-+ ; FIXME: quick hack: parallel nops don't contribute to cycle count.
-+ ; Other kinds of nops do however (which we currently ignore).
-+ ((m32r/d (unit u-exec (cycles 0)))
-+ (m32rx (unit u-exec (cycles 0)))
-+ (m32r2 (unit u-exec (cycles 0))))
-+)
-+
-+(dni not "not"
-+ ((PIPE OS) (IDOC ALU))
-+ "not $dr,$sr"
-+ (+ OP1_0 OP2_11 dr sr)
-+ (set dr (inv sr))
-+ ()
-+)
-+
-+(dni rac "rac"
-+ ((MACH m32r) (PIPE S) (IDOC MAC))
-+ "rac"
-+ (+ OP1_5 OP2_9 (f-r1 0) (f-r2 0))
-+ (sequence ((DI tmp1))
-+ (set tmp1 (sll DI accum (const 1)))
-+ (set tmp1 (add DI tmp1 (const DI #x8000)))
-+ (set accum
-+ (cond DI
-+ ((gt tmp1 (const DI #x00007fffffff0000))
-+ (const DI #x00007fffffff0000))
-+ ((lt tmp1 (const DI #xffff800000000000))
-+ (const DI #xffff800000000000))
-+ (else (and tmp1 (const DI #xffffffffffff0000)))))
-+ )
-+ ((m32r/d (unit u-mac)))
-+)
-+
-+(dni rac-dsi "rac-dsi"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC))
-+ "rac $accd,$accs,$imm1"
-+ (+ OP1_5 accd (f-bits67 0) OP2_9 accs (f-bit14 0) imm1)
-+ (sequence ((DI tmp1))
-+ (set tmp1 (sll accs imm1))
-+ (set tmp1 (add tmp1 (const DI #x8000)))
-+ (set accd
-+ (cond DI
-+ ((gt tmp1 (const DI #x00007fffffff0000))
-+ (const DI #x00007fffffff0000))
-+ ((lt tmp1 (const DI #xffff800000000000))
-+ (const DI #xffff800000000000))
-+ (else (and tmp1 (const DI #xffffffffffff0000)))))
-+ )
-+ ((m32rx (unit u-mac))
-+ (m32r2 (unit u-mac)))
-+)
-+
-+(dnmi rac-d "rac-d"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC))
-+ "rac $accd"
-+ (emit rac-dsi accd (f-accs 0) (f-imm1 0))
-+)
-+
-+(dnmi rac-ds "rac-ds"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC))
-+ "rac $accd,$accs"
-+ (emit rac-dsi accd accs (f-imm1 0))
-+)
-+
-+
-+(dni rach "rach"
-+ ((MACH m32r) (PIPE S) (IDOC MAC))
-+ "rach"
-+ (+ OP1_5 OP2_8 (f-r1 0) (f-r2 0))
-+ (sequence ((DI tmp1))
-+ ; Lop off top 8 bits.
-+ ; The sign bit we want to use is bit 55 so the 64 bit value
-+ ; isn't properly signed which we deal with in the if's below.
-+ (set tmp1 (and accum (const DI #xffffffffffffff)))
-+ (if (andif (ge tmp1 (const DI #x003fff80000000))
-+ (le tmp1 (const DI #x7fffffffffffff)))
-+ (set tmp1 (const DI #x003fff80000000))
-+ ; else part
-+ (if (andif (ge tmp1 (const DI #x80000000000000))
-+ (le tmp1 (const DI #xffc00000000000)))
-+ (set tmp1 (const DI #xffc00000000000))
-+ (set tmp1 (and (add accum (const DI #x40000000))
-+ (const DI #xffffffff80000000)))))
-+ (set tmp1 (sll tmp1 (const 1)))
-+ ; Sign extend top 8 bits.
-+ (set accum
-+ ; FIXME: 7?
-+ (sra DI (sll DI tmp1 (const 7)) (const 7)))
-+ )
-+ ((m32r/d (unit u-mac)))
-+)
-+
-+(dni rach-dsi "rach-dsi"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC))
-+ "rach $accd,$accs,$imm1"
-+ (+ OP1_5 accd (f-bits67 0) OP2_8 accs (f-bit14 0) imm1)
-+ (sequence ((DI tmp1))
-+ (set tmp1 (sll accs imm1))
-+ (set tmp1 (add tmp1 (const DI #x80000000)))
-+ (set accd
-+ (cond DI
-+ ((gt tmp1 (const DI #x00007fff00000000))
-+ (const DI #x00007fff00000000))
-+ ((lt tmp1 (const DI #xffff800000000000))
-+ (const DI #xffff800000000000))
-+ (else (and tmp1 (const DI #xffffffff00000000)))))
-+ )
-+ ((m32rx (unit u-mac))
-+ (m32r2 (unit u-mac)))
-+)
-+
-+(dnmi rach-d "rach-d"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC))
-+ "rach $accd"
-+ (emit rach-dsi accd (f-accs 0) (f-imm1 0))
-+)
-+
-+(dnmi rach-ds "rach-ds"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC))
-+ "rach $accd,$accs"
-+ (emit rach-dsi accd accs (f-imm1 0))
-+)
-+
-+(dni rte "rte"
-+ (UNCOND-CTI (PIPE O) (IDOC BR))
-+ "rte"
-+ (+ OP1_1 OP2_13 (f-r1 0) (f-r2 6))
-+ (sequence ()
-+ ; pc = bpc & -4
-+ (set pc (and (reg h-cr 6) (const -4)))
-+ ; bpc = bbpc
-+ (set (reg h-cr 6) (reg h-cr 14))
-+ ; psw = bpsw
-+ (set (reg h-psw) (reg h-bpsw))
-+ ; bpsw = bbpsw
-+ (set (reg h-bpsw) (reg h-bbpsw))
-+ )
-+ ()
-+)
-+
-+(dni seth "seth"
-+ ((IDOC ALU))
-+ "seth $dr,$hash$hi16"
-+ (+ OP1_13 OP2_12 dr (f-r2 0) hi16)
-+ (set dr (sll WI hi16 (const 16)))
-+ ()
-+)
-+
-+(define-pmacro (shift-op sym op2-r-op op2-3-op op2-i-op sem-op)
-+ (begin
-+ (dni sym sym ((PIPE O_OS) (IDOC ALU))
-+ (.str sym " $dr,$sr")
-+ (+ OP1_1 op2-r-op dr sr)
-+ (set dr (sem-op dr (and sr (const 31))))
-+ ()
-+ )
-+ (dni (.sym sym "3") sym ((IDOC ALU))
-+ (.str sym "3 $dr,$sr,$simm16")
-+ (+ OP1_9 op2-3-op dr sr simm16)
-+ (set dr (sem-op sr (and WI simm16 (const 31))))
-+ ()
-+ )
-+ (dni (.sym sym "i") sym ((PIPE O_OS) (IDOC ALU))
-+ (.str sym "i $dr,$uimm5")
-+ (+ OP1_5 (f-shift-op2 op2-i-op) dr uimm5)
-+ (set dr (sem-op dr uimm5))
-+ ()
-+ )
-+ )
-+)
-+(shift-op sll OP2_4 OP2_12 2 sll)
-+(shift-op sra OP2_2 OP2_10 1 sra)
-+(shift-op srl OP2_0 OP2_8 0 srl)
-+
-+(define-pmacro (store-op suffix op2-op mode)
-+ (begin
-+ (dni (.sym st suffix) (.str "st" suffix)
-+ ((PIPE O) (IDOC MEM))
-+ (.str "st" suffix " $src1,@$src2")
-+ (+ OP1_2 op2-op src1 src2)
-+ (set mode (mem mode src2) src1)
-+ ((m32r/d (unit u-store (cycles 1)))
-+ (m32rx (unit u-store (cycles 1)))
-+ (m32r2 (unit u-store (cycles 1))))
-+ )
-+ (dnmi (.sym st suffix "-2") (.str "st" suffix "-2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "st" suffix " $src1,@($src2)")
-+ (emit (.sym st suffix) src1 src2))
-+ (dni (.sym st suffix -d) (.str "st" suffix "-d")
-+ ((IDOC MEM))
-+ (.str "st" suffix " $src1,@($slo16,$src2)")
-+ (+ OP1_10 op2-op src1 src2 slo16)
-+ (set mode (mem mode (add src2 slo16)) src1)
-+ ((m32r/d (unit u-store (cycles 2)))
-+ (m32rx (unit u-store (cycles 2)))
-+ (m32r2 (unit u-store (cycles 2))))
-+ )
-+ (dnmi (.sym st suffix -d2) (.str "st" suffix "-d2")
-+ (NO-DIS (IDOC MEM))
-+ (.str "st" suffix " $src1,@($src2,$slo16)")
-+ (emit (.sym st suffix -d) src1 src2 slo16))
-+ )
-+)
-+(store-op "" OP2_4 WI)
-+(store-op b OP2_0 QI)
-+(store-op h OP2_2 HI)
-+
-+(dni st-plus "st+"
-+ ((PIPE O) (IDOC MEM))
-+ "st $src1,@+$src2"
-+ (+ OP1_2 OP2_6 src1 src2)
-+ ; This has to be coded carefully to avoid an "earlyclobber" of src2.
-+ (sequence ((WI new-src2))
-+ (set new-src2 (add WI src2 (const WI 4)))
-+ (set (mem WI new-src2) src1)
-+ (set src2 new-src2))
-+ ((m32r/d (unit u-store)
-+ (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
-+ (m32rx (unit u-store)
-+ (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
-+ (m32r2 (unit u-store)
-+ (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
-+ )
-+)
-+
-+(dni sth-plus "sth+"
-+ ((MACH m32rx,m32r2) (PIPE O) SPECIAL)
-+ "sth $src1,@$src2+"
-+ (+ OP1_2 OP2_3 src1 src2)
-+ ; This has to be coded carefully to avoid an "earlyclobber" of src2.
-+ (sequence ((HI new-src2))
-+ (set (mem HI new-src2) src1)
-+ (set new-src2 (add src2 (const 2)))
-+ (set src2 new-src2))
-+ ((m32rx (unit u-store)
-+ (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
-+ (m32r2 (unit u-store)
-+ (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
-+ )
-+)
-+
-+(dni stb-plus "stb+"
-+ ((MACH m32rx,m32r2) (PIPE O) SPECIAL)
-+ "stb $src1,@$src2+"
-+ (+ OP1_2 OP2_1 src1 src2)
-+ ; This has to be coded carefully to avoid an "earlyclobber" of src2.
-+ (sequence ((QI new-src2))
-+ (set (mem QI new-src2) src1)
-+ (set new-src2 (add src2 (const 1)))
-+ (set src2 new-src2))
-+ ((m32rx (unit u-store)
-+ (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
-+ (m32r2 (unit u-store)
-+ (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
-+ )
-+)
-+
-+(dni st-minus "st-"
-+ ((PIPE O) (IDOC MEM))
-+ "st $src1,@-$src2"
-+ (+ OP1_2 OP2_7 src1 src2)
-+ ; This is the original way. It doesn't work for parallel execution
-+ ; because of the earlyclobber of src2.
-+ ;(sequence ()
-+ ; (set src2 (sub src2 (const 4)))
-+ ; (set (mem WI src2) src1))
-+ (sequence ((WI new-src2))
-+ (set new-src2 (sub src2 (const 4)))
-+ (set (mem WI new-src2) src1)
-+ (set src2 new-src2))
-+ ((m32r/d (unit u-store)
-+ (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
-+ (m32rx (unit u-store)
-+ (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
-+ (m32r2 (unit u-store)
-+ (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
-+ )
-+)
-+
-+(dnmi push "push" ((PIPE O) (IDOC MEM))
-+ "push $src1"
-+ (emit st-minus src1 (src2 15)) ; "st %0,@-sp"
-+)
-+
-+(dni sub "sub"
-+ ((PIPE OS) (IDOC ALU))
-+ "sub $dr,$sr"
-+ (+ OP1_0 OP2_2 dr sr)
-+ (set dr (sub dr sr))
-+ ()
-+)
-+
-+(dni subv "sub:rv"
-+ ((PIPE OS) (IDOC ALU))
-+ "subv $dr,$sr"
-+ (+ OP1_0 OP2_0 dr sr)
-+ (parallel ()
-+ (set dr (sub dr sr))
-+ (set condbit (sub-oflag dr sr (const 0))))
-+ ()
-+)
-+
-+(dni subx "sub:rx"
-+ ((PIPE OS) (IDOC ALU))
-+ "subx $dr,$sr"
-+ (+ OP1_0 OP2_1 dr sr)
-+ (parallel ()
-+ (set dr (subc dr sr condbit))
-+ (set condbit (sub-cflag dr sr condbit)))
-+ ()
-+)
-+
-+(dni trap "trap"
-+ (UNCOND-CTI FILL-SLOT (PIPE O) (IDOC MISC))
-+ "trap $uimm4"
-+ (+ OP1_1 OP2_15 (f-r1 0) uimm4)
-+ (sequence ()
-+ ; bbpc = bpc
-+ (set (reg h-cr 14) (reg h-cr 6))
-+ ; Set bpc to the return address. Actually it's not quite the
-+ ; return address as RTE rounds the address down to a word
-+ ; boundary.
-+ (set (reg h-cr 6) (add pc (const 4)))
-+ ; bbpsw = bpsw
-+ (set (reg h-bbpsw) (reg h-bpsw))
-+ ; bpsw = psw
-+ (set (reg h-bpsw) (reg h-psw))
-+ ; sm is unchanged, ie,c are set to zero.
-+ (set (reg h-psw) (and (reg h-psw) (const #x80)))
-+ ; m32r_trap handles operating vs user mode
-+ (set WI pc (c-call WI "m32r_trap" pc uimm4))
-+ )
-+ ()
-+)
-+
-+(dni unlock "unlock"
-+ ((PIPE O) (IDOC MISC))
-+ "unlock $src1,@$src2"
-+ (+ OP1_2 OP2_5 src1 src2)
-+ (sequence ()
-+ (if (reg h-lock)
-+ (set (mem WI src2) src1))
-+ (set (reg h-lock) (const BI 0)))
-+ ((m32r/d (unit u-load))
-+ (m32rx (unit u-load))
-+ (m32r2 (unit u-load)))
-+)
-+
-+; Saturate into byte.
-+(dni satb "satb"
-+ ((MACH m32rx,m32r2) (IDOC ALU))
-+ "satb $dr,$sr"
-+ (+ OP1_8 dr OP2_6 sr (f-uimm16 #x0300))
-+ (set dr
-+ ; FIXME: min/max would simplify this nicely of course.
-+ (cond WI
-+ ((ge sr (const 127)) (const 127))
-+ ((le sr (const -128)) (const -128))
-+ (else sr)))
-+ ()
-+)
-+
-+; Saturate into half word.
-+(dni sath "sath"
-+ ((MACH m32rx,m32r2) (IDOC ALU))
-+ "sath $dr,$sr"
-+ (+ OP1_8 dr OP2_6 sr (f-uimm16 #x0200))
-+ (set dr
-+ (cond WI
-+ ((ge sr (const 32767)) (const 32767))
-+ ((le sr (const -32768)) (const -32768))
-+ (else sr)))
-+ ()
-+)
-+
-+; Saturate word.
-+(dni sat "sat"
-+ ((MACH m32rx,m32r2) SPECIAL (IDOC ALU))
-+ "sat $dr,$sr"
-+ (+ OP1_8 dr OP2_6 sr (f-uimm16 0))
-+ (set dr
-+ (if WI condbit
-+ (if WI (lt sr (const 0))
-+ (const #x7fffffff)
-+ (const #x80000000))
-+ sr))
-+ ()
-+)
-+
-+; Parallel compare byte zeros.
-+; Set C bit in condition register if any byte in source register is zero.
-+(dni pcmpbz "pcmpbz"
-+ ((MACH m32rx,m32r2) (PIPE OS) SPECIAL (IDOC ALU))
-+ "pcmpbz $src2"
-+ (+ OP1_0 (f-r1 3) OP2_7 src2)
-+ (set condbit
-+ (cond BI
-+ ((eq (and src2 (const #xff)) (const 0)) (const BI 1))
-+ ((eq (and src2 (const #xff00)) (const 0)) (const BI 1))
-+ ((eq (and src2 (const #xff0000)) (const 0)) (const BI 1))
-+ ((eq (and src2 (const #xff000000)) (const 0)) (const BI 1))
-+ (else (const BI 0))))
-+ ((m32rx (unit u-cmp))
-+ (m32r2 (unit u-cmp)))
-+)
-+
-+; Add accumulators
-+(dni sadd "sadd"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC ACCUM))
-+ "sadd"
-+ (+ OP1_5 (f-r1 0) OP2_14 (f-r2 4))
-+ (set (reg h-accums 0)
-+ (add (sra (reg h-accums 1) (const 16))
-+ (reg h-accums 0)))
-+ ((m32rx (unit u-mac))
-+ (m32r2 (unit u-mac)))
-+)
-+
-+; Multiply and add into accumulator 1
-+(dni macwu1 "macwu1"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC))
-+ "macwu1 $src1,$src2"
-+ (+ OP1_5 src1 OP2_11 src2)
-+ (set (reg h-accums 1)
-+ (sra DI
-+ (sll DI
-+ (add DI
-+ (reg h-accums 1)
-+ (mul DI
-+ (ext DI src1)
-+ (ext DI (and src2 (const #xffff)))))
-+ (const 8))
-+ (const 8)))
-+ ((m32rx (unit u-mac))
-+ (m32r2 (unit u-mac)))
-+)
-+
-+; Multiply and subtract from accumulator 0
-+(dni msblo "msblo"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC))
-+ "msblo $src1,$src2"
-+ (+ OP1_5 src1 OP2_13 src2)
-+ (set accum
-+ (sra DI
-+ (sll DI
-+ (sub accum
-+ (sra DI
-+ (sll DI
-+ (mul DI
-+ (ext DI (trunc HI src1))
-+ (ext DI (trunc HI src2)))
-+ (const 32))
-+ (const 16)))
-+ (const 8))
-+ (const 8)))
-+ ((m32rx (unit u-mac))
-+ (m32r2 (unit u-mac)))
-+)
-+
-+; Multiply into accumulator 1
-+(dni mulwu1 "mulwu1"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC))
-+ "mulwu1 $src1,$src2"
-+ (+ OP1_5 src1 OP2_10 src2)
-+ (set (reg h-accums 1)
-+ (sra DI
-+ (sll DI
-+ (mul DI
-+ (ext DI src1)
-+ (ext DI (and src2 (const #xffff))))
-+ (const 16))
-+ (const 16)))
-+ ((m32rx (unit u-mac))
-+ (m32r2 (unit u-mac)))
-+)
-+
-+; Multiply and add into accumulator 1
-+(dni maclh1 "maclh1"
-+ ((MACH m32rx,m32r2) (PIPE S) (IDOC MAC))
-+ "maclh1 $src1,$src2"
-+ (+ OP1_5 src1 OP2_12 src2)
-+ (set (reg h-accums 1)
-+ (sra DI
-+ (sll DI
-+ (add DI
-+ (reg h-accums 1)
-+ (sll DI
-+ (ext DI
-+ (mul SI
-+ (ext SI (trunc HI src1))
-+ (sra SI src2 (const SI 16))))
-+ (const 16)))
-+ (const 8))
-+ (const 8)))
-+ ((m32rx (unit u-mac))
-+ (m32r2 (unit u-mac)))
-+)
-+
-+; skip instruction if C
-+(dni sc "sc"
-+ ((MACH m32rx,m32r2) (PIPE O) SPECIAL (IDOC BR))
-+ "sc"
-+ (+ OP1_7 (f-r1 4) OP2_0 (f-r2 1))
-+ (skip (zext INT condbit))
-+ ()
-+)
-+
-+; skip instruction if not C
-+(dni snc "snc"
-+ ((MACH m32rx,m32r2) (PIPE O) SPECIAL (IDOC BR))
-+ "snc"
-+ (+ OP1_7 (f-r1 5) OP2_0 (f-r2 1))
-+ (skip (zext INT (not condbit)))
-+ ()
-+)
-+
-+; PSW &= ~((unsigned char) uimm8 | 0x000ff00)
-+(dni clrpsw "clrpsw"
-+ ((PIPE O) SPECIAL_M32R)
-+ "clrpsw $uimm8"
-+ (+ OP1_7 (f-r1 2) uimm8)
-+ (set USI (reg h-cr 0)
-+ (and USI (reg h-cr 0)
-+ (or USI (inv BI uimm8) (const #xff00))))
-+ ()
-+)
-+
-+; PSW |= (unsigned char) uimm8
-+(dni setpsw "setpsw"
-+ ((PIPE O) SPECIAL_M32R)
-+ "setpsw $uimm8"
-+ (+ OP1_7 (f-r1 1) uimm8)
-+ (set USI (reg h-cr 0) uimm8)
-+ ()
-+)
-+
-+; bset
-+(dni bset "bset"
-+ (SPECIAL_M32R)
-+ "bset $uimm3,@($slo16,$sr)"
-+ (+ OP1_10 (f-bit4 0) uimm3 OP2_6 sr slo16)
-+ (set QI (mem QI (add sr slo16))
-+ (or QI (mem QI (add sr slo16))
-+ (sll USI (const 1) (sub (const 7) uimm3))))
-+ ()
-+)
-+
-+; bclr
-+(dni bclr "bclr"
-+ (SPECIAL_M32R)
-+ "bclr $uimm3,@($slo16,$sr)"
-+ (+ OP1_10 (f-bit4 0) uimm3 OP2_7 sr slo16)
-+ (set QI (mem QI (add sr slo16))
-+ (and QI (mem QI (add sr slo16))
-+ (inv QI (sll USI (const 1) (sub (const 7) uimm3)))))
-+ ()
-+)
-+
-+; btst
-+(dni btst "btst"
-+ (SPECIAL_M32R (PIPE O))
-+ "btst $uimm3,$sr"
-+ (+ OP1_0 (f-bit4 0) uimm3 OP2_15 sr)
-+ (set condbit (and QI (srl USI sr (sub (const 7) uimm3)) (const 1)))
-+ ()
-+)
-+
-diff -Nur binutils-2.24.orig/cgen/cpu/m32r.opc binutils-2.24/cgen/cpu/m32r.opc
---- binutils-2.24.orig/cgen/cpu/m32r.opc 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/m32r.opc 2016-06-30 21:26:12.625892023 +0200
-@@ -0,0 +1,299 @@
-+/* M32R opcode support. -*- C -*-
-+ Copyright (C) 2000, 2001, 2004, 2005 Red Hat, Inc.
-+ This file is part of CGEN. */
-+
-+/* This file is an addendum to m32r.cpu. Heavy use of C code isn't
-+ appropriate in .cpu files, so it resides here. This especially applies
-+ to assembly/disassembly where parsing/printing can be quite involved.
-+ Such things aren't really part of the specification of the cpu, per se,
-+ so .cpu files provide the general framework and .opc files handle the
-+ nitty-gritty details as necessary.
-+
-+ Each section is delimited with start and end markers.
-+
-+ <arch>-opc.h additions use: "-- opc.h"
-+ <arch>-opc.c additions use: "-- opc.c"
-+ <arch>-asm.c additions use: "-- asm.c"
-+ <arch>-dis.c additions use: "-- dis.c"
-+ <arch>-ibd.h additions use: "-- ibd.h" */
-+
-+/* -- opc.h */
-+
-+#undef CGEN_DIS_HASH_SIZE
-+#define CGEN_DIS_HASH_SIZE 256
-+#undef CGEN_DIS_HASH
-+#if 0
-+#define X(b) (((unsigned char *) (b))[0] & 0xf0)
-+#define CGEN_DIS_HASH(buffer, value) \
-+(X (buffer) | \
-+ (X (buffer) == 0x40 || X (buffer) == 0xe0 || X (buffer) == 0x60 || X (buffer) == 0x50 ? 0 \
-+ : X (buffer) == 0x70 || X (buffer) == 0xf0 ? (((unsigned char *) (buffer))[0] & 0xf) \
-+ : X (buffer) == 0x30 ? ((((unsigned char *) (buffer))[1] & 0x70) >> 4) \
-+ : ((((unsigned char *) (buffer))[1] & 0xf0) >> 4)))
-+#else
-+#define CGEN_DIS_HASH(buffer, value) m32r_cgen_dis_hash (buffer, value)
-+extern unsigned int m32r_cgen_dis_hash (const char *, CGEN_INSN_INT);
-+#endif
-+
-+/* -- */
-+
-+/* -- opc.c */
-+unsigned int
-+m32r_cgen_dis_hash (const char * buf ATTRIBUTE_UNUSED, CGEN_INSN_INT value)
-+{
-+ unsigned int x;
-+
-+ if (value & 0xffff0000) /* 32bit instructions. */
-+ value = (value >> 16) & 0xffff;
-+
-+ x = (value >> 8) & 0xf0;
-+ if (x == 0x40 || x == 0xe0 || x == 0x60 || x == 0x50)
-+ return x;
-+
-+ if (x == 0x70 || x == 0xf0)
-+ return x | ((value >> 8) & 0x0f);
-+
-+ if (x == 0x30)
-+ return x | ((value & 0x70) >> 4);
-+ else
-+ return x | ((value & 0xf0) >> 4);
-+}
-+
-+/* -- */
-+
-+/* -- asm.c */
-+static const char * MISSING_CLOSING_PARENTHESIS = N_("missing `)'");
-+
-+/* Handle '#' prefixes (i.e. skip over them). */
-+
-+static const char *
-+parse_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ const char **strp,
-+ int opindex ATTRIBUTE_UNUSED,
-+ long *valuep ATTRIBUTE_UNUSED)
-+{
-+ if (**strp == '#')
-+ ++*strp;
-+ return NULL;
-+}
-+
-+/* Handle shigh(), high(). */
-+
-+static const char *
-+parse_hi16 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ if (strncasecmp (*strp, "high(", 5) == 0)
-+ {
-+ *strp += 5;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ if (errmsg == NULL
-+ && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ {
-+ value >>= 16;
-+ value &= 0xffff;
-+ }
-+ *valuep = value;
-+ return errmsg;
-+ }
-+ else if (strncasecmp (*strp, "shigh(", 6) == 0)
-+ {
-+ *strp += 6;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ if (errmsg == NULL
-+ && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ {
-+ value += 0x8000;
-+ value >>= 16;
-+ value &= 0xffff;
-+ }
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
-+}
-+
-+/* Handle low() in a signed context. Also handle sda().
-+ The signedness of the value doesn't matter to low(), but this also
-+ handles the case where low() isn't present. */
-+
-+static const char *
-+parse_slo16 (CGEN_CPU_DESC cd, const char ** strp, int opindex, long * valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ if (strncasecmp (*strp, "low(", 4) == 0)
-+ {
-+ *strp += 4;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ if (errmsg == NULL
-+ && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value = ((value & 0xffff) ^ 0x8000) - 0x8000;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ if (strncasecmp (*strp, "sda(", 4) == 0)
-+ {
-+ *strp += 4;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16,
-+ NULL, & value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return cgen_parse_signed_integer (cd, strp, opindex, valuep);
-+}
-+
-+/* Handle low() in an unsigned context.
-+ The signedness of the value doesn't matter to low(), but this also
-+ handles the case where low() isn't present. */
-+
-+static const char *
-+parse_ulo16 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ if (strncasecmp (*strp, "low(", 4) == 0)
-+ {
-+ *strp += 4;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ if (errmsg == NULL
-+ && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value &= 0xffff;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
-+}
-+
-+/* -- */
-+
-+/* -- dis.c */
-+/* Immediate values are prefixed with '#'. */
-+
-+#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \
-+ do \
-+ { \
-+ if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX)) \
-+ (*info->fprintf_func) (info->stream, "#"); \
-+ } \
-+ while (0)
-+
-+/* Handle '#' prefixes as operands. */
-+
-+static void
-+print_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value ATTRIBUTE_UNUSED,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ (*info->fprintf_func) (info->stream, "#");
-+}
-+
-+#undef CGEN_PRINT_INSN
-+#define CGEN_PRINT_INSN my_print_insn
-+
-+static int
-+my_print_insn (CGEN_CPU_DESC cd,
-+ bfd_vma pc,
-+ disassemble_info *info)
-+{
-+ bfd_byte buffer[CGEN_MAX_INSN_SIZE];
-+ bfd_byte *buf = buffer;
-+ int status;
-+ int buflen = (pc & 3) == 0 ? 4 : 2;
-+ int big_p = CGEN_CPU_INSN_ENDIAN (cd) == CGEN_ENDIAN_BIG;
-+ bfd_byte *x;
-+
-+ /* Read the base part of the insn. */
-+
-+ status = (*info->read_memory_func) (pc - ((!big_p && (pc & 3) != 0) ? 2 : 0),
-+ buf, buflen, info);
-+ if (status != 0)
-+ {
-+ (*info->memory_error_func) (status, pc, info);
-+ return -1;
-+ }
-+
-+ /* 32 bit insn? */
-+ x = (big_p ? &buf[0] : &buf[3]);
-+ if ((pc & 3) == 0 && (*x & 0x80) != 0)
-+ return print_insn (cd, pc, info, buf, buflen);
-+
-+ /* Print the first insn. */
-+ if ((pc & 3) == 0)
-+ {
-+ buf += (big_p ? 0 : 2);
-+ if (print_insn (cd, pc, info, buf, 2) == 0)
-+ (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
-+ buf += (big_p ? 2 : -2);
-+ }
-+
-+ x = (big_p ? &buf[0] : &buf[1]);
-+ if (*x & 0x80)
-+ {
-+ /* Parallel. */
-+ (*info->fprintf_func) (info->stream, " || ");
-+ *x &= 0x7f;
-+ }
-+ else
-+ (*info->fprintf_func) (info->stream, " -> ");
-+
-+ /* The "& 3" is to pass a consistent address.
-+ Parallel insns arguably both begin on the word boundary.
-+ Also, branch insns are calculated relative to the word boundary. */
-+ if (print_insn (cd, pc & ~ (bfd_vma) 3, info, buf, 2) == 0)
-+ (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
-+
-+ return (pc & 3) ? 2 : 4;
-+}
-+
-+/* -- */
-diff -Nur binutils-2.24.orig/cgen/cpu/m68k.cpu binutils-2.24/cgen/cpu/m68k.cpu
---- binutils-2.24.orig/cgen/cpu/m68k.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/m68k.cpu 2016-06-30 21:26:12.629892178 +0200
-@@ -0,0 +1,253 @@
-+; Motorola M68000 family CPU description. -*- Scheme -*-
-+; Copyright (C) 2000 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; NOTE: this file is still strictly WORK-IN-PROGRESS.
-+
-+(include "simplify.inc")
-+
-+(define-arch
-+ (name m68k)
-+ (comment "Motorola M68000 architecture")
-+ (insn-lsb0? #t)
-+ (machs m68k16)
-+ (isas basic)
-+)
-+
-+(define-isa
-+ (name basic)
-+ (comment "Basic M68K instruction set")
-+ (default-insn-word-bitsize 16)
-+ (default-insn-bitsize 16)
-+ (base-insn-bitsize 16)
-+ (decode-assist (15 14 13 12))
-+)
-+
-+(define-cpu
-+ (name m68k)
-+ (comment "Motorola M68000 family")
-+ (endian big)
-+ (word-bitsize 32)
-+)
-+
-+(define-mach
-+ (name m68k16)
-+ (comment "Motorola M68000 (16-bit bus)")
-+ (cpu m68k)
-+ (isas basic)
-+)
-+
-+(define-model
-+ (name mc68000)
-+ (comment "Motorola MC68000 microprocessor")
-+ (mach m68k16)
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () () () ())
-+)
-+
-+; Hardware elements.
-+
-+(dnh h-pc "program counter" (PC PROFILE (ISA basic)) (pc) () () ())
-+
-+(dsh h-ccr "condition code register" () (register HI))
-+
-+(define-keyword
-+ (name dr-names)
-+ (print-name h-dr)
-+ (prefix "")
-+ (values (d0 0) (d1 1) (d2 2) (d3 3) (d4 4) (d5 5) (d6 6) (d7 7))
-+)
-+
-+(define-keyword
-+ (name ar-names)
-+ (print-name h-ar)
-+ (prefix "")
-+ (values (a0 0) (a1 1) (a2 2) (a3 3) (a4 4) (a5 5) (a6 6) (a7 7)
-+ (sp 7))
-+)
-+
-+(define-hardware
-+ (name h-dr)
-+ (comment "data registers")
-+ (attrs (ISA basic) CACHE-ADDR)
-+ (type register SI (8))
-+ (indices extern-keyword dr-names)
-+)
-+
-+(define-hardware
-+ (name h-ar)
-+ (comment "address registers")
-+ (attrs (ISA basic) CACHE-ADDR)
-+ (type register SI (8))
-+ (indices extern-keyword ar-names)
-+)
-+
-+; FIXME: need three shadowed A7 registers here for:
-+; * User stack pointer (USP)
-+; * Interrupt stack pointer (ISP)
-+; * Master stack pointer (MSP).
-+; These can be omitted for now since we intend to only do user mode.
-+; c.f. arm.cpu for tips on how to do this. ARM shadows some registers
-+; depending on any of its five operating modes.
-+
-+
-+; Instruction fields.
-+
-+(define-pmacro (d68f x-name x-comment x-attrs x-word-offset x-word-length
-+ x-start x-length x-mode x-encode x-decode)
-+ (define-ifield
-+ (name x-name)
-+ (comment x-comment)
-+ (.splice attrs (.unsplice x-attrs))
-+ (word-offset x-word-offset)
-+ (word-length x-word-length)
-+ (start x-start)
-+ (length x-length)
-+ (mode x-mode)
-+ (encode x-encode)
-+ (decode x-decode)
-+ )
-+)
-+
-+(define-pmacro (dn68f x-name x-comment x-attrs x-word-offset
-+ x-word-length x-start x-length)
-+ (d68f x-name x-comment x-attrs x-word-offset x-word-length x-start
-+ x-length UINT #f #f)
-+)
-+
-+(d68f f-simm8 "signed 8 bit immediate" () 16 16 7 8 INT #f #f)
-+(d68f f-simm16 "signed 16 bit immediate" () 16 16 15 16 INT #f #f)
-+(d68f f-simm32 "signed 32 bit immediate" () 16 32 31 32 INT #f #f)
-+
-+(dn68f f-uimm8 "unsigned 8 bit immediate" () 16 16 7 8)
-+(dn68f f-uimm16 "unsigned 16 bit immediate" () 16 16 15 16)
-+(dn68f f-iumm32 "unsigned 32 bit immediate" () 16 32 31 32)
-+
-+(dn68f f-imm8-filler "unused part of 8 bit immediate" () 16 16 15 8)
-+
-+(dn68f f-15-4 "4 bits at bit 15" () 0 16 15 4)
-+(dn68f f-15-12 "12 bits at bit 15" () 0 16 15 12)
-+(dn68f f-15-13 "13 bits at bit 15" () 0 16 15 13)
-+(dn68f f-15-16 "16 bits at bit 15" () 0 16 15 16)
-+(dn68f f-8-1 "1 bit at bit 8" () 0 16 8 1)
-+
-+(dnf f-rx "register Rx field" () 11 3)
-+(dnf f-ry "register Ry field" () 2 3)
-+(dnf f-opmode "operation mode" () 7 5)
-+(dnf f-vector "vector field" () 3 4)
-+
-+(dnf f-imm8 "immediate constant (8 bits)" () 7 8)
-+
-+; Operands.
-+(dnop rx "register Rx operand" () h-uint f-rx)
-+(dnop reg-@2 "general reg number (at bit 2)" () h-uint f-rx)
-+(dnop reg-@11 "general reg number (at bit 11)" () h-uint f-ry)
-+(dnop ry "register Ry operand" () h-uint f-ry)
-+(dnop vector "trap vector operand" () h-uint f-vector)
-+(dnop imm8 "immediate constant (8 bits)" () h-uint f-imm8)
-+
-+; Instructions.
-+
-+(dni nop "no operation" ()
-+ "nop"
-+ (+ (f-15-16 #x4E71))
-+ (nop)
-+ ()
-+)
-+
-+(dni exg-data "exchange data registers" ()
-+ "FIXME"
-+ (+ (f-15-4 #xC) rx (f-8-1 1) (f-opmode 8) ry)
-+ (sequence ((SI temp))
-+ (set temp (reg h-dr rx))
-+ (set (reg h-dr rx) (reg h-dr ry))
-+ (set (reg h-dr ry) temp))
-+ ()
-+)
-+
-+(dni exg-addr "exchange address registers" ()
-+ "FIXME"
-+ (+ (f-15-4 #xC) rx (f-8-1 1) (f-opmode 9) ry)
-+ (sequence ((SI temp))
-+ (set temp (reg h-ar rx))
-+ (set (reg h-ar rx) (reg h-ar ry))
-+ (set (reg h-ar ry) temp))
-+ ()
-+)
-+
-+(dni exg-data-addr "exchange data and address register" ()
-+ "FIXME"
-+ (+ (f-15-4 #xC) rx (f-8-1 1) (f-opmode #x11) ry)
-+ (sequence ((SI temp))
-+ (set temp (reg h-dr rx))
-+ (set (reg h-dr rx) (reg h-ar ry))
-+ (set (reg h-ar ry) temp))
-+ ()
-+)
-+
-+(dni illegal "illegal instruction" ()
-+ "FIXME"
-+ (+ (f-15-16 #x4AFC))
-+ (nop)
-+ ()
-+)
-+
-+(dni moveq "move quick" ()
-+ "FIXME"
-+ (+ (f-15-4 7) reg-@2 (f-8-1 0) imm8)
-+ ; FIXME: set condition codes.
-+ (sequence ()
-+ (set (reg h-dr reg-@2) (ext SI imm8)))
-+ ()
-+)
-+
-+(dni reset "reset external devices" ()
-+ "FIXME"
-+ (+ (f-15-16 #x4E70))
-+ (nop)
-+ ()
-+)
-+
-+(dni rte "return from exception" ()
-+ "FIXME"
-+ (+ (f-15-16 #x4E73))
-+ (nop)
-+ ()
-+)
-+
-+(dni rtr "return and restore condition codes" ()
-+ "FIXME"
-+ (+ (f-15-16 #x4E77))
-+ (nop)
-+ ()
-+)
-+
-+(dni rts "return from subroutine" ()
-+ "RTS"
-+ (+ (f-15-16 #x4E75))
-+ (nop)
-+ ()
-+)
-+
-+(dni trap "trap" ()
-+ "FIXME"
-+ (+ (f-15-12 #x4E4) vector)
-+ (nop)
-+ ()
-+)
-+
-+(dni trapv "trap on overflow" ()
-+ "FIXME"
-+ (+ (f-15-16 #x4E76))
-+ (nop)
-+ ()
-+)
-+
-+(dni unlk "unlink" ()
-+ "FIXME"
-+ (+ (f-15-13 #x9CB) reg-@2)
-+ (nop)
-+ ()
-+)
-diff -Nur binutils-2.24.orig/cgen/cpu/mt.cpu binutils-2.24/cgen/cpu/mt.cpu
---- binutils-2.24.orig/cgen/cpu/mt.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/mt.cpu 2016-06-30 21:26:12.629892178 +0200
-@@ -0,0 +1,1351 @@
-+; Morpho Technologies MT Arch description. -*- Scheme -*-
-+; Copyright 2001 Free Software Foundation, Inc.
-+;
-+; Contributed by Red Hat Inc; developed under contract from
-+; Morpho Technologies.
-+;
-+; This file is part of the GNU Binutils.
-+;
-+; This program is free software; you can redistribute it and/or modify
-+; it under the terms of the GNU General Public License as published by
-+; the Free Software Foundation; either version 2 of the License, or
-+; (at your option) any later version.
-+;
-+; This program is distributed in the hope that it will be useful,
-+; but WITHOUT ANY WARRANTY; without even the implied warranty of
-+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+; GNU General Public License for more details.
-+;
-+; You should have received a copy of the GNU General Public License
-+; along with this program; if not, write to the Free Software
-+; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
-+
-+(include "simplify.inc")
-+
-+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-+;; Define The Architecture, Attributes, ISA, CPU, Machine, And Model. ;;
-+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-+
-+; define-arch must appear first
-+(define-arch
-+ (name mt) ; name of cpu family
-+ (comment "Morpho Technologies mRISC family")
-+ (default-alignment aligned)
-+ (insn-lsb0? #t)
-+ (machs ms1 ms1-003 ms2)
-+ (isas mt)
-+)
-+
-+; Instruction set parameters.
-+
-+(define-isa
-+ (name mt)
-+ (comment "Morpho Technologies MT ISA")
-+ (default-insn-word-bitsize 32)
-+ (default-insn-bitsize 32)
-+ (base-insn-bitsize 32)
-+ (parallel-insns 2)
-+)
-+
-+; Cpu family definitions.
-+
-+
-+(define-cpu
-+ ; cpu names must be distinct from the architecture name and machine names.
-+ (name ms1bf)
-+ (comment "Morpho Technologies mRISC family")
-+ (endian big)
-+ (word-bitsize 32)
-+)
-+
-+(define-cpu
-+ ; cpu names must be distinct from the architecture name and machine names.
-+ (name ms1-003bf)
-+ (comment "Morpho Technologies mRISC family")
-+ (endian big)
-+ (word-bitsize 32)
-+)
-+
-+(define-cpu
-+ ; cpu names must be distinct from the architecture name and machine names.
-+ (name ms2bf)
-+ (comment "Morpho Technologies mRISC family")
-+ (endian big)
-+ (word-bitsize 32)
-+)
-+
-+(define-mach
-+ (name ms1)
-+ (comment "Morpho Technologies mrisc")
-+ (cpu ms1bf)
-+ (isas mt)
-+)
-+
-+(define-mach
-+ (name ms1-003)
-+ (comment "Morpho Technologies mrisc")
-+ (cpu ms1-003bf)
-+ (isas mt)
-+)
-+
-+(define-mach
-+ (name ms2)
-+ (comment "Morpho Technologies ms2")
-+ (cpu ms2bf)
-+ (isas mt)
-+)
-+
-+
-+; Model descriptions.
-+; Can probably take the u-exec out. We'll see.
-+(define-model
-+ (name ms1)
-+ (comment "Morpho Technologies mrisc")
-+ (mach ms1)
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+(define-model
-+ (name ms1-003)
-+ (comment "Morpho Technologies mrisc")
-+ (mach ms1-003)
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+(define-model
-+ (name ms2)
-+ (comment "Morpho Technologies ms2")
-+ (mach ms2)
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ () ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+; FIXME: It might simplify things to separate the execute process from the
-+; one that updates the PC.
-+
-+
-+;;;;;;;;;;;;;;;;;;;;;;;;
-+;; Instruction Fields ;;
-+;;;;;;;;;;;;;;;;;;;;;;;;
-+
-+; Attributes:
-+; PCREL-ADDR: pc relative value (for reloc and disassembly purposes)
-+; ABS-ADDR: absolute address (for reloc and disassembly purposes?)
-+; RESERVED: bits are not used to decode insn, must be all 0
-+; RELOC: there is a relocation associated with this field (experiment)
-+;
-+; f-msys: Identify a a morphosys insns. 1 if msys, 0 if not.
-+; f-opc: 6 bit opcode for non-morphosys instructions.
-+; f-msopc: 6 bit opcode for morphosys instructions.
-+; f-imm: flag to indicate use of an immediate operand. 1 if yes, 0 if no.
-+; f-sr1: source resgister 1. (also used for MSYS insns)
-+; f-sr2: source register 2. (also used for MSYS insns)
-+; f-dr: destination register when located in bits 19:16.
-+; f-drrr: destination register when located in bits 15:12. (also for MSYS insns)
-+; f-imm16: 16 bit immediate value when not an offset.
-+; f-imm16a: 16 bit immediate value when it's a pc-rel offset.
-+; f-uu4a: unused 4 bit field.
-+; f-uu4b: second unsed 4 bit field.
-+; f-uu1: unused 1 bit field
-+; f-uu12: unused 12 bit field.
-+; f-uu16: unused 16 bit field.
-+; f-uu24: unused 24 bit field.
-+
-+(dnf f-msys "morphosys insn flag" () 31 1)
-+(dnf f-opc "opcode field" () 30 6)
-+(dnf f-imm "immedate flag" () 24 1)
-+(dnf f-uu24 "unused 24 bits" () 23 24)
-+(dnf f-sr1 "sr1 register field" (ABS-ADDR) 23 4)
-+(dnf f-sr2 "sr2 register field" (ABS-ADDR) 19 4)
-+(dnf f-dr "dr register field" (ABS-ADDR) 19 4)
-+(dnf f-drrr "drrr register field" (ABS-ADDR) 15 4)
-+(dnf f-imm16u "unsigned 16 bit immediate" () 15 16)
-+(df f-imm16s "signed 16 bit immediate" () 15 16 INT ((value pc) (add HI value 0)) ((value pc) (add HI value 0)))
-+(dnf f-imm16a "pc-rel offset" (PCREL-ADDR) 15 16)
-+(dnf f-uu4a "unused 4 bit field" () 19 4)
-+(dnf f-uu4b "unused 4 bit field" () 23 4)
-+(dnf f-uu12 "unused 12 bit field" () 11 12)
-+(dnf f-uu8 "unused 8 bit field" () 15 8)
-+(dnf f-uu16 "unused 16 bit field" () 15 16)
-+(dnf f-uu1 "unused 1 bit field" () 7 1)
-+
-+; The following ifields are used exclusively for the MorphoSys instructions.
-+; In a few cases, a bit field is used for something in addition to what its
-+; name suggests. For the most part, the names are meaningful though.
-+
-+(dnf f-msopc "opcode field" () 30 5)
-+(dnf f-uu-26-25 "unused 26 bits" () 25 26)
-+(dnf f-mask "mask" () 25 16)
-+(dnf f-bankaddr "bank address" () 25 13)
-+(dnf f-rda "rda" () 25 1)
-+(dnf f-uu-2-25 "unused bits 25 & 24" () 25 2)
-+(dnf f-rbbc "Omega network configuration" () 25 2)
-+(dnf f-perm "perm" () 25 2)
-+(dnf f-mode "mode" () 25 2)
-+(dnf f-uu-1-24 "testing" () 24 1)
-+(dnf f-wr "wr" () 24 1)
-+(dnf f-fbincr "fb incr" () 23 4)
-+(dnf f-uu-2-23 "unused bits 23 and 22" () 23 2)
-+(dnf f-xmode "xmode" () 23 1)
-+(dnf f-a23 "a23" () 23 1)
-+(dnf f-mask1 "mask1" () 22 3)
-+(dnf f-cr "cr" () 22 3)
-+(dnf f-type "type" () 21 2)
-+(dnf f-incamt "increment amount" () 19 8)
-+(dnf f-cbs "cbs" () 19 2)
-+(dnf f-uu-1-19 "unused bit 19" () 19 1)
-+(dnf f-ball "b_all" () 19 1)
-+(dnf f-colnum "column number" () 18 3)
-+(dnf f-brc "b_r_c" () 18 3)
-+(dnf f-incr "incr" () 17 6)
-+(dnf f-fbdisp "frame buffer displacement" () 15 6)
-+(dnf f-uu-4-15 "unused bits 15,14,13,12" () 15 4)
-+(dnf f-length "length" () 15 3)
-+(dnf f-uu-1-15 "unused bit 15" () 15 1)
-+(dnf f-rc "row/column context" () 15 1)
-+(dnf f-rcnum "starting cell of cntxt mem." () 14 3)
-+(dnf f-rownum "row number" () 14 3)
-+(dnf f-cbx "cbx" () 14 3)
-+(dnf f-id "id" () 14 1)
-+(dnf f-size "size" () 13 14)
-+(dnf f-rownum1 "row number" () 12 3)
-+(dnf f-uu-3-11 "unused 3 bits (11-9)" () 11 3)
-+(dnf f-rc1 "row/column context" () 11 1)
-+(dnf f-ccb "ccb" () 11 1)
-+(dnf f-cbrb "data-bus orientation" () 10 1)
-+(dnf f-cdb "cdb" () 10 1)
-+(dnf f-rownum2 "row number" () 9 3)
-+(dnf f-cell "cell" () 9 3)
-+(dnf f-uu-3-9 "unused 3 bits (9-7)" () 9 3)
-+(dnf f-contnum "context number" () 8 9)
-+(dnf f-uu-1-6 "unused bit 6" () 6 1)
-+(dnf f-dup "dup" () 6 1)
-+(dnf f-rc2 "rc2" () 6 1)
-+(dnf f-ctxdisp "context displacement" () 5 6)
-+
-+; additional fields in ms2
-+(dnf f-imm16l "loop count" () 23 16)
-+(df f-loopo "loop offset" () 7 8 UINT
-+ ((value pc) (srl SI value 2))
-+ ((value pc) (add SI (sll value 2) 8))
-+ )
-+(dnf f-cb1sel "cb1 select" () 25 3)
-+(dnf f-cb2sel "cb2 select" () 22 3)
-+(dnf f-cb1incr "cb1 increment" (SIGNED) 19 6)
-+(dnf f-cb2incr "cb2 increment" (SIGNED) 13 6)
-+(dnf f-rc3 "row/colum context" () 7 1)
-+
-+; The following is just for a test
-+(dnf f-msysfrsr2 "sr2 for msys" () 19 4)
-+(dnf f-brc2 "b_r_c2" () 14 3)
-+(dnf f-ball2 "b_all2" () 15 1)
-+
-+
-+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-+;; Enumerations Of Instruction Fields ;;
-+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-+
-+; insn-msys: bit 31. 1 for Morphosys Insns, 0 if not.
-+(define-normal-insn-enum insn-msys "msys enums" () MSYS_ f-msys
-+ (NO YES)
-+)
-+
-+; insn-opc: bits 30 through 25 . Non-MorphoSys Instructions
-+; Note - the documentation is wrong for the encoding of the DBNZ
-+; instruction. It is actually 011110. See Issue 67699.
-+(define-normal-insn-enum insn-opc "opc enums" () OPC_ f-opc
-+ (ADD ADDU SUB SUBU MUL - - -
-+ AND OR XOR NAND NOR XNOR LDUI -
-+ LSL LSR ASR - - - - -
-+ BRLT BRLE BREQ JMP JAL BRNEQ DBNZ LOOP
-+ LDW STW - - - - - -
-+ - - - - - - - -
-+ EI DI SI RETI BREAK IFLUSH - -
-+ )
-+)
-+
-+; insn-msopc: bits 30 through 26 . MorphoSys Instructions
-+(define-normal-insn-enum insn-msopc "msopc enums" () MSOPC_ f-msopc
-+ (LDCTXT LDFB STFB FBCB MFBCB FBCCI FBRCI FBCRI
-+ FBRRI MFBCCI MFBRCI MFBCRI MFBRRI FBCBDR RCFBCB MRCFBCB
-+ CBCAST DUPCBCAST WFBI WFB RCRISC FBCBINC RCXMODE INTLVR
-+ WFBINC MWFBINC WFBINCR MWFBINCR FBCBINCS MFBCBINCS FBCBINCRS MFBCBINCRS
-+ - - - - - - - -
-+ )
-+)
-+
-+; insn-imm: bit 24. Immediate operand indicator.
-+(define-normal-insn-enum insn-imm "imm enums" () IMM_ f-imm
-+ ; This bit specifies whether and immediate operand will be present.
-+ ; It's 1 if there is, 0 if there is not.
-+ (NO YES)
-+)
-+;;;;;;;;;;;;;;;;
-+;; Attributes ;;
-+;;;;;;;;;;;;;;;;
-+
-+; Might not need this. Keep if for the sim just in case.
-+;(define-attr
-+; (for insn)
-+; (type boolean)
-+; (name EXT-SKIP-INSN)
-+; (comment "instruction is a PAGE, LOADL or LOADH instruction")
-+;)
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name LOAD-DELAY)
-+ (comment "insn has a load delay")
-+)
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name MEMORY-ACCESS)
-+ (comment "insn performs a memory access")
-+)
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name AL-INSN)
-+ (comment "insn is an arithmetic or logic insn.")
-+)
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name IO-INSN)
-+ (comment "insn performs an I/O operation")
-+)
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name BR-INSN)
-+ (comment "insn performs an I/O operation")
-+)
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name JAL-HAZARD)
-+ (comment "insn has jal-like hazard")
-+)
-+
-+(define-pmacro (define-reg-use-attr regfield)
-+ (define-attr
-+ (for insn)
-+ (type boolean)
-+ (name (.sym "USES-" (.upcase regfield)))
-+ (comment ("insn accesses register operand " regfield))))
-+
-+(define-reg-use-attr "frdr")
-+(define-reg-use-attr "frdrrr")
-+(define-reg-use-attr "frsr1")
-+(define-reg-use-attr "frsr2")
-+
-+
-+; Might not need this. Keep it for the sim just in case.
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name SKIPA)
-+ (comment "instruction is a SKIP instruction")
-+)
-+
-+
-+;;;;;;;;;;;;;;;;;;;;;
-+;; Hardware Pieces ;;
-+;;;;;;;;;;;;;;;;;;;;;
-+
-+;(define-pmacro (build-reg-name n) (.splice (.str "$" n) n))
-+
-+; These are the 16 registers that the chip has. In later versions
-+; where there will be more registers, this will need to be expanded.
-+; Note that there are two entries for the registers with two names.
-+(define-hardware
-+ (name h-spr)
-+ (comment "special-purpose registers")
-+ (type register SI (16))
-+ (indices keyword "" (("R0" 0) ("R1" 1) ("R2" 2) ("R3" 3) ("R4" 4) ("R5" 5)
-+ ("R6" 6) ("R7" 7) ("R8" 8) ("R9" 9) ("R10" 10) ("R11" 11) ("R12" 12) ("fp" 12)
-+ ("R13" 13) ("sp" 13) ("R14" 14) ("ra" 14) ("R15" 15) ("ira" 15)))
-+; (get (index) (and (raw-reg h-spr) #xffffffff))
-+; (set (index value) (set (raw-reg h-spr) (and value #xffffffff)))
-+)
-+
-+; This is the program counter.
-+(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
-+
-+(define-keyword
-+ (name msys-syms)
-+ (print-name h-nil)
-+ (prefix "")
-+ (values (DUP 1) (XX 0))
-+)
-+
-+;;;;;;;;;;;;;;
-+;; Operands ;;
-+;;;;;;;;;;;;;;
-+
-+(define-operand (name frsr1) (comment "register") (attrs)
-+ (type h-spr) (index f-sr1) )
-+(define-operand (name frsr2) (comment "register") (attrs)
-+ (type h-spr) (index f-sr2) )
-+(define-operand (name frdr) (comment "register") (attrs)
-+ (type h-spr) (index f-dr) )
-+(define-operand (name frdrrr) (comment "register") (attrs)
-+ (type h-spr) (index f-drrr) )
-+(define-operand (name imm16) (comment "immediate value - sign extd") (attrs)
-+ (type h-sint) (index f-imm16s) (handlers (parse "imm16") (print "dollarhex")))
-+(define-operand (name imm16z) (comment "immediate value - zero extd") (attrs)
-+ (type h-uint) (index f-imm16u) (handlers (parse "imm16") (print "dollarhex")))
-+(define-operand (name imm16o) (comment "immediate value") (attrs PCREL-ADDR)
-+ (type h-uint) (index f-imm16s) (handlers (parse "imm16") (print "pcrel")))
-+
-+; Operands for MorphoSys Instructions
-+
-+(define-operand (name rc) (comment "rc") (attrs)
-+ (type h-uint) (index f-rc) (handlers (parse "rc") (print "dollarhex")))
-+
-+(define-operand (name rcnum) (comment "rcnum") (attrs)
-+ (type h-uint) (index f-rcnum) (handlers (print "dollarhex")))
-+
-+(define-operand (name contnum) (comment "context number") (attrs)
-+ (type h-uint) (index f-contnum) (handlers (print "dollarhex")))
-+
-+(define-operand (name rbbc) (comment "omega network configuration") (attrs)
-+ (type h-uint) (index f-rbbc) (handlers (parse "rbbc") (print "dollarhex")))
-+
-+(define-operand (name colnum) (comment "column number") (attrs)
-+ (type h-uint) (index f-colnum) (handlers (print "dollarhex")))
-+
-+(define-operand (name rownum) (comment "row number") (attrs)
-+ (type h-uint) (index f-rownum) (handlers (print "dollarhex")))
-+
-+(define-operand (name rownum1) (comment "row number") (attrs)
-+ (type h-uint) (index f-rownum1) (handlers (print "dollarhex")))
-+
-+(define-operand (name rownum2) (comment "row number") (attrs)
-+ (type h-uint) (index f-rownum2) (handlers (print "dollarhex")))
-+
-+(define-operand (name rc1) (comment "rc1") (attrs)
-+ (type h-uint) (index f-rc1) (handlers (parse "rc") (print "dollarhex")))
-+
-+(define-operand (name rc2) (comment "rc2") (attrs)
-+ (type h-uint) (index f-rc2) (handlers (parse "rc") (print "dollarhex")))
-+
-+(define-operand (name cbrb) (comment "data-bus orientation") (attrs)
-+ (type h-uint) (index f-cbrb) (handlers (parse "cbrb") (print "dollarhex")))
-+
-+(define-operand (name cell) (comment "cell") (attrs)
-+ (type h-uint) (index f-cell) (handlers (print "dollarhex")))
-+
-+(define-operand (name dup) (comment "dup") (attrs)
-+ (type h-uint) (index f-dup) (handlers (parse "dup") (print "dollarhex")))
-+
-+(define-operand (name ctxdisp) (comment "context displacement") (attrs)
-+ (type h-uint) (index f-ctxdisp) (handlers (print "dollarhex")))
-+
-+(define-operand (name fbdisp) (comment "frame buffer displacement") (attrs)
-+ (type h-uint) (index f-fbdisp) (handlers (print "dollarhex")))
-+
-+(define-operand (name type) (comment "type") (attrs)
-+ (type h-uint) (index f-type) (handlers (parse "type") (print "dollarhex")))
-+
-+(define-operand (name mask) (comment "mask") (attrs)
-+ (type h-uint) (index f-mask) (handlers (print "dollarhex")))
-+
-+(define-operand (name bankaddr) (comment "bank address") (attrs)
-+ (type h-uint) (index f-bankaddr) (handlers (print "dollarhex")))
-+
-+(define-operand (name incamt) (comment "increment amount") (attrs)
-+ (type h-uint) (index f-incamt) (handlers (print "dollarhex")))
-+
-+(define-operand (name xmode) (comment "xmode") (attrs)
-+ (type h-uint) (index f-xmode) (handlers (parse "xmode") (print "dollarhex")))
-+
-+(define-operand (name mask1) (comment "mask1") (attrs)
-+ (type h-uint) (index f-mask1) (handlers (print "dollarhex")))
-+
-+(define-operand (name ball) (comment "b_all") (attrs)
-+ (type h-uint) (index f-ball) (handlers (parse "ball") (print "dollarhex")))
-+
-+(define-operand (name brc) (comment "b_r_c") (attrs)
-+ (type h-uint) (index f-brc) (handlers (print "dollarhex")))
-+
-+(define-operand (name rda) (comment "rd") (attrs)
-+ (type h-uint) (index f-rda) (handlers (print "dollarhex")))
-+
-+(define-operand (name wr) (comment "wr") (attrs)
-+ (type h-uint) (index f-wr) (handlers (print "dollarhex")))
-+
-+(define-operand (name ball2) (comment "b_all2") (attrs)
-+ (type h-uint) (index f-ball2) (handlers (parse "ball") (print "dollarhex")))
-+
-+(define-operand (name brc2) (comment "b_r_c2") (attrs)
-+ (type h-uint) (index f-brc2) (handlers (print "dollarhex")))
-+(define-operand (name perm) (comment "perm") (attrs)
-+ (type h-uint) (index f-perm) (handlers (print "dollarhex")))
-+(define-operand (name a23) (comment "a23") (attrs)
-+ (type h-uint) (index f-a23) (handlers (print "dollarhex")))
-+(define-operand (name cr) (comment "c-r") (attrs)
-+ (type h-uint) (index f-cr) (handlers (print "dollarhex")))
-+(define-operand (name cbs) (comment "cbs") (attrs)
-+ (type h-uint) (index f-cbs) (handlers (print "dollarhex")))
-+(define-operand (name incr) (comment "incr") (attrs)
-+ (type h-uint) (index f-incr) (handlers (print "dollarhex")))
-+(define-operand (name length) (comment "length") (attrs)
-+ (type h-uint) (index f-length) (handlers (print "dollarhex")))
-+(define-operand (name cbx) (comment "cbx") (attrs)
-+ (type h-uint) (index f-cbx) (handlers (print "dollarhex")))
-+(define-operand (name ccb) (comment "ccb") (attrs)
-+ (type h-uint) (index f-ccb) (handlers (print "dollarhex")))
-+(define-operand (name cdb) (comment "cdb") (attrs)
-+ (type h-uint) (index f-cdb) (handlers (print "dollarhex")))
-+
-+; For the INTLVR insn
-+(define-operand (name mode) (comment "mode") (attrs)
-+ (type h-uint) (index f-mode) (handlers (print "dollarhex")))
-+(define-operand (name id) (comment "i/d") (attrs)
-+ (type h-uint) (index f-id) (handlers (print "dollarhex")))
-+(define-operand (name size) (comment "size") (attrs)
-+ (type h-uint) (index f-size) (handlers (print "dollarhex")))
-+
-+(define-operand (name fbincr) (comment "fb incr") (attrs)
-+ (type h-uint) (index f-fbincr) (handlers (print "dollarhex")))
-+
-+; For the ms2 insns
-+(define-operand (name loopsize) (comment "immediate value")
-+ (attrs (MACH ms2) PCREL-ADDR)
-+ (type h-uint) (index f-loopo) (handlers (parse "loopsize") (print "pcrel")))
-+(define-operand (name imm16l) (comment "immediate value")
-+ (attrs (MACH ms2))
-+ (type h-uint) (index f-imm16l) (handlers (print "dollarhex")))
-+(define-operand (name rc3) (comment "rc3") (attrs (MACH ms2))
-+ (type h-uint) (index f-rc3) (handlers (parse "rc") (print "dollarhex")))
-+(define-operand (name cb1sel) (comment "cb1sel") (attrs (MACH ms2))
-+ (type h-uint) (index f-cb1sel) (handlers (print "dollarhex")))
-+(define-operand (name cb2sel) (comment "cb2sel") (attrs (MACH ms2))
-+ (type h-uint) (index f-cb2sel) (handlers (print "dollarhex")))
-+(define-operand (name cb1incr) (comment "cb1incr") (attrs (MACH ms2))
-+ (type h-sint) (index f-cb1incr) (handlers (print "dollarhex")))
-+(define-operand (name cb2incr) (comment "cb2incr") (attrs (MACH ms2))
-+ (type h-sint) (index f-cb2incr) (handlers (print "dollarhex")))
-+
-+; Probaby won't need most of these.
-+(define-pmacro r0 (reg h-spr #x0))
-+(define-pmacro r1 (reg h-spr #x01))
-+(define-pmacro r2 (reg h-spr #x02))
-+(define-pmacro r3 (reg h-spr #x03))
-+(define-pmacro r4 (reg h-spr #x04))
-+(define-pmacro r5 (reg h-spr #x05))
-+(define-pmacro r6 (reg h-spr #x06))
-+(define-pmacro r7 (reg h-spr #x07))
-+(define-pmacro r8 (reg h-spr #x08))
-+(define-pmacro r9 (reg h-spr #x09))
-+(define-pmacro r10 (reg h-spr #xA))
-+(define-pmacro r11 (reg h-spr #xB))
-+(define-pmacro r12 (reg h-spr #xC))
-+(define-pmacro fp (reg h-spr #xC))
-+(define-pmacro r13 (reg h-spr #xD))
-+(define-pmacro sp (reg h-spr #xD))
-+(define-pmacro r14 (reg h-spr #xE))
-+(define-pmacro ra (reg h-spr #xE))
-+(define-pmacro r15 (reg h-spr #xF))
-+(define-pmacro ira (reg h-spr #xF))
-+
-+; delayed set
-+(define-pmacro (dset dest src) (set (delay 1 dest) src))
-+
-+
-+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-+;; Instructions As Defined In the MorphoRisc ISA Document ;;
-+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-+
-+; Arithmetic Instructions
-+
-+(dni add "ADD DstReg, SrcReg1, SrcReg2"
-+ (AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
-+ "add $frdrrr,$frsr1,$frsr2"
-+ (+ MSYS_NO OPC_ADD IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
-+ (set frdrrr (add SI frsr1 frsr2))
-+ ()
-+)
-+
-+(dni addu "ADDU DstReg, SrcReg1, SrcReg2"
-+ (AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
-+ "addu $frdrrr,$frsr1,$frsr2"
-+ (+ MSYS_NO OPC_ADDU IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
-+ (set frdrrr (add USI frsr1 frsr2))
-+ ()
-+)
-+
-+(dni addi "ADDI DstReg, SrcReg1 UnsImm"
-+ (AL-INSN USES-FRDR USES-FRSR1)
-+ "addi $frdr,$frsr1,#$imm16"
-+ (+ MSYS_NO OPC_ADD IMM_YES frsr1 frdr imm16)
-+ (sequence((HI tmp))
-+ (set HI tmp (and imm16 #xffff))
-+ (set frdr (add SI frsr1 (ext SI tmp)))
-+ )
-+ ()
-+)
-+
-+(dni addui "ADDUI DstReg, SrcReg1, UnsImm"
-+ (AL-INSN USES-FRDR USES-FRSR1)
-+ "addui $frdr,$frsr1,#$imm16z"
-+ (+ MSYS_NO OPC_ADDU IMM_YES frsr1 frdr imm16z)
-+ (set frdr (add USI frsr1 (ext USI imm16z)))
-+ ()
-+)
-+
-+(dni sub "SUB DstReg, SrcReg1, SrcReg2"
-+ (AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
-+ "sub $frdrrr,$frsr1,$frsr2"
-+ (+ MSYS_NO OPC_SUB IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
-+ (set frdrrr (sub SI frsr1 frsr2))
-+ ()
-+)
-+
-+(dni subu "SUBU DstReg, SrcReg1, SrcReg2"
-+ (AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
-+ "subu $frdrrr,$frsr1,$frsr2"
-+ (+ MSYS_NO OPC_SUBU IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
-+ (set frdrrr (sub USI frsr1 frsr2))
-+ ()
-+)
-+
-+(dni subi "SUBI DstReg, SrcReg1, UnsImm"
-+ (AL-INSN USES-FRDR USES-FRSR1)
-+ "subi $frdr,$frsr1,#$imm16"
-+ (+ MSYS_NO OPC_SUB IMM_YES frsr1 frdr imm16)
-+ (sequence((HI tmp))
-+ (set HI tmp (and imm16 #xffff))
-+ (set frdr (sub SI frsr1 (ext SI tmp)))
-+ )
-+ ;(set frdr (sub SI frsr1 (ext SI imm16)))
-+ ()
-+)
-+
-+(dni subui "SUBUI DstReg, SrcReg1, UnsImm"
-+ (AL-INSN USES-FRDR USES-FRSR1)
-+ "subui $frdr,$frsr1,#$imm16z"
-+ (+ MSYS_NO OPC_SUBU IMM_YES frsr1 frdr imm16z)
-+ (set frdr (sub USI frsr1 (ext USI imm16z)))
-+ ()
-+)
-+
-+(dni mul "MUL DstReg, SrcReg1, SrcReg2"
-+ ((MACH ms1-003,ms2) AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
-+ "mul $frdrrr,$frsr1,$frsr2"
-+ (+ MSYS_NO OPC_MUL IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
-+ (sequence((HI op1) (HI op2))
-+ (set op1 (and frsr1 #xffff))
-+ (if (or (lt op1 (const -32768)) (gt op1 (const 32767)))
-+ (error "operand out of range")
-+ )
-+ (set op2 (and frsr2 #xffff))
-+ (if (or (lt op2 (const -32768)) (gt op2 (const 32767)))
-+ (error "operand out of range")
-+ )
-+ (set frdrrr (mul SI (ext SI op1) (ext SI op2)))
-+ )
-+ ()
-+)
-+
-+(dni muli "MULI DstReg, SrcReg1, UnsImm"
-+ ((MACH ms1-003,ms2) AL-INSN USES-FRDR USES-FRSR1)
-+ "muli $frdr,$frsr1,#$imm16"
-+ (+ MSYS_NO OPC_MUL IMM_YES frsr1 frdr imm16)
-+ (sequence((HI op1) (HI op2))
-+ (set op1 (and frsr1 #xffff))
-+ (if (or (lt op1 (const -32768)) (gt op1 (const 32767)))
-+ (error "operand out of range")
-+ )
-+ (set op2 (and imm16 #xffff))
-+ (if (eq op1 (const 0))
-+ (error "op1 is 0")
-+ )
-+ (if (eq op2 (const 0))
-+ (error "op2 is 0")
-+ )
-+ (set frdr (mul SI (ext SI op1) (ext SI op2)))
-+ )
-+ ()
-+)
-+
-+; Logical Instructions
-+
-+(dni and "AND DstReg, SrcReg1, SrcReg2"
-+ (AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
-+ "and $frdrrr,$frsr1,$frsr2"
-+ (+ MSYS_NO OPC_AND IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
-+ (set frdrrr (and frsr1 frsr2))
-+ ()
-+)
-+
-+(dni andi "ANDI DstReg, SrcReg1, UnsImm"
-+ (AL-INSN USES-FRDR USES-FRSR1)
-+ "andi $frdr,$frsr1,#$imm16z"
-+ (+ MSYS_NO OPC_AND IMM_YES frsr1 frdr imm16z)
-+ (set frdr (and frsr1 (ext USI imm16z)))
-+ ()
-+)
-+
-+(dni or "OR DstReg, SrcReg1, SrcReg2"
-+ (AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
-+ "or $frdrrr,$frsr1,$frsr2"
-+ (+ MSYS_NO OPC_OR IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
-+ (set frdrrr (or frsr1 frsr2))
-+ ()
-+)
-+
-+(dni nop "nop"
-+ ()
-+ "nop"
-+ (+ MSYS_NO OPC_OR IMM_NO (f-uu24 0))
-+ (nop)
-+ ()
-+)
-+
-+(dni ori "ORI DstReg, SrcReg1, UnsImm"
-+ (AL-INSN USES-FRDR USES-FRSR1)
-+ "ori $frdr,$frsr1,#$imm16z"
-+ (+ MSYS_NO OPC_OR IMM_YES frsr1 frdr imm16z)
-+ (set frdr (or frsr1 (ext USI imm16z)))
-+ ()
-+)
-+
-+(dni xor "XOR DstReg, SrcReg1, SrcReg2"
-+ (AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
-+ "xor $frdrrr,$frsr1,$frsr2"
-+ (+ MSYS_NO OPC_XOR IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
-+ (set frdrrr (xor frsr1 frsr2))
-+ ()
-+)
-+
-+(dni xori "XORI DstReg, SrcReg1, UnsImm"
-+ (AL-INSN USES-FRDR USES-FRSR1)
-+ "xori $frdr,$frsr1,#$imm16z"
-+ (+ MSYS_NO OPC_XOR IMM_YES frsr1 frdr imm16z)
-+ (set frdr (xor frsr1 (ext USI imm16z)))
-+ ()
-+)
-+
-+(dni nand "NAND DstReg, SrcReg1, SrcReg2"
-+ (AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
-+ "nand $frdrrr,$frsr1,$frsr2"
-+ (+ MSYS_NO OPC_NAND IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
-+ (set frdrrr (inv (and frsr1 frsr2)))
-+ ()
-+)
-+
-+(dni nandi "NANDI DstReg, SrcReg1, UnsImm"
-+ (AL-INSN USES-FRDR USES-FRSR1)
-+ "nandi $frdr,$frsr1,#$imm16z"
-+ (+ MSYS_NO OPC_NAND IMM_YES frsr1 frdr imm16z)
-+ (set frdr (inv (and frsr1 (ext USI imm16z))))
-+ ()
-+)
-+
-+(dni nor "NOR DstReg, SrcReg1, SrcReg2"
-+ (AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
-+ "nor $frdrrr,$frsr1,$frsr2"
-+ (+ MSYS_NO OPC_NOR IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
-+ (set frdrrr (inv (or frsr1 frsr2)))
-+ ()
-+)
-+
-+(dni nori "NORI DstReg, SrcReg1, UnsImm"
-+ (AL-INSN USES-FRDR USES-FRSR1)
-+ "nori $frdr,$frsr1,#$imm16z"
-+ (+ MSYS_NO OPC_NOR IMM_YES frsr1 frdr imm16z)
-+ (set frdr (inv (or frsr1 (ext USI imm16z))))
-+ ()
-+)
-+
-+(dni xnor "XNOR DstReg, SrcReg1, SrcReg2"
-+ (AL-INSN USES-FRDRRR USES-FRSR1 USES-FRSR2)
-+ "xnor $frdrrr,$frsr1,$frsr2"
-+ (+ MSYS_NO OPC_XNOR IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
-+ (set frdrrr (inv (xor frsr1 frsr2)))
-+ ()
-+)
-+
-+(dni xnori "XNORI DstReg, SrcReg1, UnsImm"
-+ (AL-INSN USES-FRDR USES-FRSR1)
-+ "xnori $frdr,$frsr1,#$imm16z"
-+ (+ MSYS_NO OPC_XNOR IMM_YES frsr1 frdr imm16z)
-+ (set frdr (inv (xor frsr1 (ext USI imm16z))))
-+ ()
-+)
-+
-+(dni ldui "LDUI DstReg, UnsImm"
-+ (AL-INSN USES-FRDR)
-+ "ldui $frdr,#$imm16z"
-+ (+ MSYS_NO OPC_LDUI IMM_YES (f-uu4b 0) frdr imm16z)
-+ (set frdr (and (sll imm16z 16) #xffff0000))
-+ ()
-+)
-+
-+; Shift Instructions
-+
-+(dni lsl "LSL DstReg, SrcReg1, SrcReg2"
-+ (USES-FRDRRR USES-FRSR1 USES-FRSR2)
-+ "lsl $frdrrr,$frsr1,$frsr2"
-+ (+ MSYS_NO OPC_LSL IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
-+ (set frdrrr (sll frsr1 frsr2))
-+ ()
-+)
-+
-+(dni lsli "LSLI DstReg, SrcReg1, UnsImm"
-+ (USES-FRDR USES-FRSR1)
-+ "lsli $frdr,$frsr1,#$imm16"
-+ (+ MSYS_NO OPC_LSL IMM_YES frsr1 frdr imm16)
-+ (set frdr (sll frsr1 imm16))
-+ ()
-+)
-+
-+(dni lsr "LSR DstReg, SrcReg1, SrcReg2"
-+ (USES-FRDRRR USES-FRSR1 USES-FRSR2)
-+ "lsr $frdrrr,$frsr1,$frsr2"
-+ (+ MSYS_NO OPC_LSR IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
-+ (set frdrrr (srl frsr1 frsr2))
-+ ()
-+)
-+
-+(dni lsri "LSRI DstReg, SrcReg1, UnsImm"
-+ (USES-FRDR USES-FRSR1)
-+ "lsri $frdr,$frsr1,#$imm16"
-+ (+ MSYS_NO OPC_LSR IMM_YES frsr1 frdr imm16)
-+ (set frdr (srl frsr1 imm16))
-+ ()
-+)
-+
-+(dni asr "ASR DstReg, SrcReg1, SrcReg2"
-+ (USES-FRDRRR USES-FRSR1 USES-FRSR2)
-+ "asr $frdrrr,$frsr1,$frsr2"
-+ (+ MSYS_NO OPC_ASR IMM_NO frsr1 frsr2 frdrrr (f-uu12 0))
-+ (set frdrrr (sra frsr1 frsr2))
-+ ()
-+)
-+
-+(dni asri "ASRI DstReg, SrcReg1, UnsImm"
-+ (USES-FRDR USES-FRSR1)
-+ "asri $frdr,$frsr1,#$imm16"
-+ (+ MSYS_NO OPC_ASR IMM_YES frsr1 frdr imm16)
-+ (set frdr (sra frsr1 imm16))
-+ ()
-+)
-+
-+; Control Transfer Instructions
-+
-+(dni brlt "BRLT SrcReg1, SrcReg2, label"
-+ (BR-INSN DELAY-SLOT USES-FRDRRR USES-FRSR1 USES-FRSR2)
-+ "brlt $frsr1,$frsr2,$imm16o"
-+ (+ MSYS_NO OPC_BRLT IMM_YES frsr1 frsr2 imm16o)
-+ (sequence()
-+ (if (lt USI frsr1 frsr2)
-+ (dset pc (add pc (ext SI imm16o))))
-+ )
-+ ()
-+)
-+
-+(dni brle "BRLE SrcReg1, SrcReg2, label"
-+ (BR-INSN DELAY-SLOT USES-FRSR1 USES-FRSR2)
-+ "brle $frsr1,$frsr2,$imm16o"
-+ (+ MSYS_NO OPC_BRLE IMM_YES frsr1 frsr2 imm16o)
-+ (sequence()
-+ (if (le USI frsr1 frsr2)
-+ (dset pc (add pc (ext SI imm16o))))
-+ )
-+ ()
-+)
-+
-+(dni breq "BREQ SrcReg1, SrcReg2, label"
-+ (BR-INSN DELAY-SLOT USES-FRSR1 USES-FRSR2)
-+ "breq $frsr1,$frsr2,$imm16o"
-+ (+ MSYS_NO OPC_BREQ IMM_YES frsr1 frsr2 imm16o)
-+ (sequence()
-+ (if (eq USI frsr1 frsr2)
-+ (dset pc (add pc (ext SI imm16o))))
-+ )
-+ ()
-+)
-+
-+(dni brne "BRNE SrcReg1, SrcReg2, label"
-+ (BR-INSN DELAY-SLOT USES-FRSR1 USES-FRSR2)
-+ "brne $frsr1,$frsr2,$imm16o"
-+ (+ MSYS_NO OPC_BRNEQ IMM_YES frsr1 frsr2 imm16o)
-+ (sequence()
-+ (if (not (eq USI frsr1 frsr2))
-+ (dset pc (add pc (ext SI imm16o))))
-+ )
-+ ()
-+)
-+
-+(dni jmp "JMP, label"
-+ (DELAY-SLOT BR-INSN)
-+ "jmp $imm16o"
-+ (+ MSYS_NO OPC_JMP IMM_YES (f-uu4b 0) (f-uu4a 0) imm16o)
-+ (dset pc (add pc (ext SI imm16o)))
-+ ()
-+)
-+
-+(dni jal "JAL DstReg, SrcReg1"
-+ (BR-INSN DELAY-SLOT BR-INSN USES-FRDR USES-FRSR1 JAL-HAZARD)
-+ "jal $frdrrr,$frsr1"
-+ (+ MSYS_NO OPC_JAL IMM_NO frsr1 (f-uu4a 0) frdrrr (f-uu12 0))
-+ (sequence()
-+ (if (eq frsr1 #x0)
-+ (c-call VOID "do_syscall" pc)
-+ (sequence() ; else part. Do non-syscall stuff here.
-+ (dset frdrrr (add pc #x8))
-+ (dset pc frsr1)
-+ )
-+ )
-+ )
-+ ()
-+)
-+
-+(dni dbnz "DBNZ SrcReg1, label"
-+ ((MACH ms1-003,ms2) BR-INSN DELAY-SLOT USES-FRSR1)
-+ "dbnz $frsr1,$imm16o"
-+ (+ MSYS_NO OPC_DBNZ IMM_YES frsr1 (f-uu4a 0) imm16o)
-+ (sequence()
-+ (if (not (eq USI frsr1 0))
-+ (dset pc (add pc (ext SI imm16o))))
-+ )
-+ ()
-+)
-+
-+; Interrupt Control Instructions
-+
-+(dni ei "EI - Enable Interrupt Processing"
-+ ()
-+ "ei"
-+ (+ MSYS_NO OPC_EI IMM_NO (f-uu4b 0) (f-uu4a 0) (f-uu16 0))
-+ (c-call VOID "enable_interrupts")
-+ ()
-+)
-+
-+(dni di "DI - Disable Interrupt Processing"
-+ ()
-+ "di"
-+ (+ MSYS_NO OPC_DI IMM_NO (f-uu4b 0) (f-uu4a 0) (f-uu16 0))
-+ (c-call VOID "disable_interrupts")
-+ ()
-+)
-+
-+(dni si "SI - Send software Interrupt"
-+ (DELAY-SLOT BR-INSN USES-FRDR)
-+ "si $frdrrr"
-+ (+ MSYS_NO OPC_SI IMM_NO (f-uu4b 0) (f-uu4a 0) frdrrr (f-uu12 0))
-+ ;(sequence()
-+ ; (dset frdr (add pc #x4))
-+ ; (c-call VOID "do_syscall1" pc)
-+ ; ; (dset pc frsr1) Do this later when we have the address.
-+ ;)
-+ (sequence()
-+ (set frdrrr (add pc #x4))
-+ (c-call VOID "do_syscall" pc)
-+ ; (set pc frsr1) Do this later when we have the address.
-+ )
-+ ()
-+)
-+
-+(dni reti "RETI SrcReg1"
-+ (DELAY-SLOT BR-INSN USES-FRSR1 JAL-HAZARD)
-+ "reti $frsr1"
-+ (+ MSYS_NO OPC_RETI IMM_NO frsr1 (f-uu4a 0) (f-uu16 0))
-+ (sequence()
-+ (c-call VOID "enable_interrupts")
-+ (dset pc frsr1)
-+ )
-+ ()
-+)
-+
-+; Memory Access Instructions
-+
-+(dni ldw "LDW DstReg, SrcReg1, Imm"
-+ (LOAD-DELAY MEMORY-ACCESS USES-FRDR USES-FRSR1)
-+ "ldw $frdr,$frsr1,#$imm16"
-+ (+ MSYS_NO OPC_LDW IMM_YES frsr1 frdr imm16)
-+ (sequence((USI ea) (HI tmp))
-+ (set HI tmp (and imm16 #xffff))
-+ (set ea (and (add SI frsr1 (ext SI tmp)) #xfffffffc))
-+ (set frdr (mem SI ea))
-+ )
-+ ()
-+)
-+
-+(dni stw "STW SrcReg2, SrcReg1, Imm"
-+ (MEMORY-ACCESS USES-FRSR1 USES-FRSR2)
-+ "stw $frsr2,$frsr1,#$imm16"
-+ (+ MSYS_NO OPC_STW IMM_YES frsr1 frsr2 imm16)
-+ (sequence((USI ea) (HI tmp))
-+ (set HI tmp (and imm16 #xffff))
-+ (set ea (and (add SI frsr1 (ext SI tmp)) #xfffffffc))
-+ (set (mem SI ea) frsr2)
-+ )
-+ ()
-+)
-+
-+; Break Instruction
-+
-+(dni break "BREAK"
-+ ()
-+ "break"
-+ (+ MSYS_NO OPC_BREAK (f-imm 0) (f-uu24 0))
-+ (c-call VOID "do_break" pc)
-+ ()
-+)
-+
-+; Cache Flush Instruction
-+
-+(dni iflush "IFLUSH"
-+ ((MACH ms1-003,ms2))
-+ "iflush"
-+ (+ MSYS_NO OPC_IFLUSH (f-imm 0) (f-uu24 0))
-+ (nop)
-+ ()
-+)
-+
-+; MorphoSys Instructions
-+
-+(dni ldctxt "LDCTXT SRC1, SRC2, r/c, r/c#, context#"
-+ ((MACH ms1))
-+ "ldctxt $frsr1,$frsr2,#$rc,#$rcnum,#$contnum"
-+ (+ MSYS_YES MSOPC_LDCTXT (f-uu-2-25 0) frsr1 frsr2 rc rcnum (f-uu-3-11 0)
-+ contnum )
-+ (nop)
-+ ()
-+)
-+
-+(dni ldfb "LDFB SRC1, byte#"
-+ ((MACH ms1))
-+ "ldfb $frsr1,$frsr2,#$imm16z"
-+ (+ MSYS_YES MSOPC_LDFB (f-uu-2-25 0) frsr1 frsr2 imm16z)
-+ (nop)
-+ ()
-+)
-+
-+(dni stfb "STFB SRC1, SRC2, byte "
-+ ((MACH ms1))
-+ "stfb $frsr1,$frsr2,#$imm16z"
-+ (+ MSYS_YES MSOPC_STFB (f-uu-2-25 0) frsr1 frsr2 imm16z)
-+ (nop)
-+ ()
-+)
-+
-+(dni fbcb "FBCB SRC1, RT/BR1/BR2/CS, B_all, B_r_c, r/c, CB/RB, cell, dup, ctx_disp"
-+ ((MACH ms1,ms1-003))
-+ "fbcb $frsr1,#$rbbc,#$ball,#$brc,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_FBCB rbbc frsr1 ball brc (f-uu-4-15 0) rc cbrb cell dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni mfbcb "MFBCB SRC1, RT/BR1/BR2/CS, SRC2, r/c, CB/RB, cell, dup, ctx_disp"
-+ ()
-+ "mfbcb $frsr1,#$rbbc,$frsr2,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_MFBCB rbbc frsr1 frsr2 (f-uu-4-15 0) rc1 cbrb cell dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni fbcci "FBCCI SRC1, RT/BR1/BR2/CS, B_all, B_r_c, FB_disp, cell, dup, ctx_disp"
-+ ()
-+ "fbcci $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_FBCCI rbbc frsr1 ball brc fbdisp cell dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni fbrci "FBRCI SRC1, RT/BR1/BR2/CS, B_all, B_r_c, FB_disp, cell, dup, ctx_disp"
-+ ()
-+ "fbrci $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_FBRCI rbbc frsr1 ball brc fbdisp cell dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni fbcri "FBCRI SRC1, RT/BR1/BR2/CS, B_all, B_r_c, FB_disp, cell, dup, ctx_disp"
-+ ()
-+ "fbcri $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_FBCRI rbbc frsr1 ball brc fbdisp cell dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni fbrri "FBRRI SRC1, RT/BR1/BR2/CS, B_all, B_r_c, FB_disp, cell, dup, ctx_disp"
-+ ()
-+ "fbrri $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_FBRRI rbbc frsr1 ball brc fbdisp cell dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni mfbcci "MFBCCI SRC1, RT/BR1/BR2/CS, SRC2, FB_disp, cell, dup, ctx_disp"
-+ ()
-+ "mfbcci $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_MFBCCI rbbc frsr1 frsr2 fbdisp cell dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni mfbrci "MFBRCI SRC1, RT/BR1/BR2/CS, SRC2, FB_disp, cell, dup, ctx_disp"
-+ ()
-+ "mfbrci $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_MFBRCI rbbc frsr1 frsr2 fbdisp cell dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni mfbcri "MFBCRI SRC1, RT/BR1/BR2/CS, SRC2, FB_disp, cell, dup, ctx_disp"
-+ ()
-+ "mfbcri $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_MFBCRI rbbc frsr1 frsr2 fbdisp cell dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni mfbrri "MFBRRI SRC1, RT/BR1/BR2/CS, SRC2, FB_disp, cell, dup, ctx_disp"
-+ ()
-+ "mfbrri $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_MFBRRI rbbc frsr1 frsr2 fbdisp cell dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni fbcbdr "FBCBDR SRC1, RT/BR1/BR2/CS, SRC2, B_all, B_r_c, r/c, CB/RB, cell, dup, ctx_disp"
-+ ()
-+ "fbcbdr $frsr1,#$rbbc,$frsr2,#$ball2,#$brc2,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_FBCBDR rbbc frsr1 frsr2 ball2 brc2 rc1 cbrb cell dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni rcfbcb "RCFBCB RT/BR1/BR2/CS, type, B_all, B_r_c, row#, r/c, CB/RB, cell, dup, ctx_disp"
-+ ()
-+ "rcfbcb #$rbbc,#$type,#$ball,#$brc,#$rownum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_RCFBCB rbbc (f-uu-2-23 0) type ball brc (f-uu-1-15 0) rownum rc1 cbrb cell dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni mrcfbcb "MRCFBCB SRC2, RT/BR1/BR2/CS, type, row#, r/c, CB/RB, cell, dup, ctx_disp"
-+ ()
-+ "mrcfbcb $frsr2,#$rbbc,#$type,#$rownum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_MRCFBCB rbbc (f-uu-2-23 0) type frsr2 (f-uu-1-15 0) rownum rc1 cbrb cell dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni cbcast "CBCAST mask, r/c, ctx_disp "
-+ ()
-+ "cbcast #$mask,#$rc2,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_CBCAST mask (f-uu-3-9 0) rc2 ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni dupcbcast "DUPCBCAST mask, cell, r/c, ctx_disp "
-+ ()
-+ "dupcbcast #$mask,#$cell,#$rc2,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_DUPCBCAST mask cell rc2 ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni wfbi "WFBI Bank_address, row#, cell, dup, ctx_disp "
-+ ()
-+ "wfbi #$bankaddr,#$rownum1,#$cell,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_WFBI bankaddr rownum1 cell dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+;(dni wfb "WFB SRC1, SRC2, FB_disp, row#, ctx_disp"
-+; ()
-+; "wfb $frsr1,$frsr2,#$fbdisp,#$rownum,#$ctxdisp"
-+; (+ MSYS_YES MSOPC_WFB (f-uu-2-25 0) frsr1 frsr2 fbdisp rownum (f-uu-1-6 0) ctxdisp)
-+; (nop)
-+; ()
-+;)
-+
-+(dni wfb "WFB, DRC1,SRC2,FB_disp,row#,ctx_disp"
-+ ()
-+ "wfb $frsr1,$frsr2,#$fbdisp,#$rownum2,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_WFB (f-uu-2-25 0) frsr1 frsr2 fbdisp rownum2 (f-uu-1-6 0) ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+
-+(dni rcrisc "RCRISC DEST, RT/BR1/BR2/CS, SRC1, column#, r/c, CB/RB, cell, dup, ctx_disp"
-+ ()
-+ "rcrisc $frdrrr,#$rbbc,$frsr1,#$colnum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_RCRISC rbbc frsr1 (f-uu-1-19 0) colnum frdrrr rc1 cbrb cell dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni fbcbinc "FBCBINC SRC1, RT/BR1/BR2/CS, Incr_amount, r/c, CB/RB, cell, dup, ctx_disp "
-+ ()
-+ "fbcbinc $frsr1,#$rbbc,#$incamt,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_FBCBINC rbbc frsr1 incamt rc1 cbrb cell dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni rcxmode "RCXMODE SRC2, rd, wr, xmode, mask, FB_disp, row#, r/c, ctx_disp"
-+ ()
-+ "rcxmode $frsr2,#$rda,#$wr,#$xmode,#$mask1,#$fbdisp,#$rownum2,#$rc2,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_RCXMODE rda wr xmode mask1 frsr2 fbdisp rownum2 rc2 ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni interleaver "INTLVR ireg, mode, ireg, i/d, size"
-+ ()
-+ "intlvr $frsr1,#$mode,$frsr2,#$id,#$size"
-+ (+ MSYS_YES MSOPC_INTLVR mode frsr1 frsr2 (f-uu-1-15 0) id size)
-+ (nop)
-+ ()
-+)
-+
-+;; Issue 66262: The documenatation gives the wrong order for
-+;; the arguments to the WFBINC instruction.
-+(dni wfbinc "WFBINC type, ccb/rcb, incr, all, c/r, length, rca_row, word, dup, ctxt_disp"
-+ ((MACH ms1-003,ms2))
-+ "wfbinc #$rda,#$wr,#$fbincr,#$ball,#$colnum,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_WFBINC rda wr fbincr ball colnum length rownum1 rownum2 dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni mwfbinc "MWFBINC mreg, type, ccb/rcb, incr, length, rca_row, word, dup, ctxt_disp"
-+ ((MACH ms1-003,ms2))
-+ "mwfbinc $frsr2,#$rda,#$wr,#$fbincr,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_MWFBINC rda wr fbincr frsr2 length rownum1 rownum2 dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni wfbincr "WFBINCR ireg, type, ccb/rcb, all, c/r, length, rca_row, word, dup, ctxt_disp"
-+ ((MACH ms1-003,ms2))
-+ "wfbincr $frsr1,#$rda,#$wr,#$ball,#$colnum,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_WFBINCR rda wr frsr1 ball colnum length rownum1 rownum2 dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni mwfbincr "MWFBINCR ireg, mreg, type, ccb/rcb, length, rca_row, word, dup, ctxt_disp"
-+ ((MACH ms1-003,ms2))
-+ "mwfbincr $frsr1,$frsr2,#$rda,#$wr,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_MWFBINCR rda wr frsr1 frsr2 length rownum1 rownum2 dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni fbcbincs "FBCBINCS perm, all, c/r, cbs, incr, ccb/rcb, cdb/rdb, word, dup, ctxt_disp"
-+ ((MACH ms1-003,ms2))
-+ "fbcbincs #$perm,#$a23,#$cr,#$cbs,#$incr,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_FBCBINCS perm a23 cr cbs incr ccb cdb rownum2 dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni mfbcbincs "MFBCBINCS ireg, perm, cbs, incr, ccb/rcb, cdb/rdb, word, dup, ctxt_disp"
-+ ((MACH ms1-003,ms2))
-+ "mfbcbincs $frsr1,#$perm,#$cbs,#$incr,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_MFBCBINCS perm frsr1 cbs incr ccb cdb rownum2 dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni fbcbincrs "FBCBINCRS ireg, perm, all, c/r, cbs, ccb/rcb, cdb/rdb, word, dup, ctxt_disp"
-+ ((MACH ms1-003,ms2))
-+ "fbcbincrs $frsr1,#$perm,#$ball,#$colnum,#$cbx,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_FBCBINCRS perm frsr1 ball colnum (f-uu-1-15 0) cbx ccb cdb rownum2 dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni mfbcbincrs "MFBCBINCRS ireg, mreg, perm, cbs, ccb/rcb, cdb/rdb, word, dup, ctxt_disp"
-+ ((MACH ms1-003,ms2))
-+ "mfbcbincrs $frsr1,$frsr2,#$perm,#$cbx,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_MFBCBINCRS perm frsr1 frsr2 (f-uu-1-15 0) cbx ccb cdb rownum2 dup ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+; MS2 instructions
-+(dni loop "LOOP SrcReg1, label"
-+ ((MACH ms2) DELAY-SLOT USES-FRSR1)
-+ "loop $frsr1,$loopsize"
-+ (+ MSYS_NO OPC_LOOP IMM_NO frsr1 (f-uu4a 0) (f-uu8 0) loopsize)
-+ (nop) ;; to be filled in
-+ ()
-+)
-+
-+(dni loopi "LOOPI niter, label"
-+ ((MACH ms2) DELAY-SLOT)
-+ "loopi #$imm16l,$loopsize"
-+ (+ MSYS_NO OPC_LOOP IMM_YES imm16l loopsize)
-+ (nop) ;; to be filled in
-+ ()
-+)
-+
-+(dni dfbc "dfbc cb1sel,cb2sel,cb1inc,cb2inc,dr/c,cr/c,ctxdisp"
-+ ((MACH ms2))
-+ "dfbc #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc3,#$rc2,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_LDCTXT cb1sel cb2sel cb1incr cb2incr rc3 rc2 ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni dwfb "dwfb cb1sel,cb2sel,cb1inc,cb2inc,cr/c,ctxdisp"
-+ ((MACH ms2))
-+ "dwfb #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc2,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_LDFB cb1sel cb2sel cb1incr cb2incr (f-uu1 0) rc2 ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni fbwfb "fbwfb cb1sel,cb2sel,cb1inc,cb2inc,r0/1,cr/c,ctxdisp"
-+ ((MACH ms2))
-+ "fbwfb #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc3,#$rc2,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_STFB cb1sel cb2sel cb1incr cb2incr rc3 rc2 ctxdisp)
-+ (nop)
-+ ()
-+)
-+
-+(dni dfbr "dfbr cb1sel,cb2sel,reg,W/O1,W/O2,mode,cr/c,ctxdisp"
-+ ((MACH ms2) USES-FRSR2)
-+ "dfbr #$cb1sel,#$cb2sel,$frsr2,#$length,#$rownum1,#$rownum2,#$rc2,#$ctxdisp"
-+ (+ MSYS_YES MSOPC_FBCB cb1sel cb2sel frsr2 length rownum1 rownum2 rc2 ctxdisp)
-+ (nop)
-+ ()
-+)
-diff -Nur binutils-2.24.orig/cgen/cpu/mt.opc binutils-2.24/cgen/cpu/mt.opc
---- binutils-2.24.orig/cgen/cpu/mt.opc 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/mt.opc 2016-06-30 21:26:12.629892178 +0200
-@@ -0,0 +1,474 @@
-+/* Morpho Technologies mRISC opcode support, for GNU Binutils. -*- C -*-
-+ Copyright 2001 Free Software Foundation, Inc.
-+
-+ Contributed by Red Hat Inc; developed under contract from
-+ Morpho Technologies.
-+
-+ This file is part of the GNU Binutils.
-+
-+ This program is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 2 of the License, or
-+ (at your option) any later version.
-+
-+ This program is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ You should have received a copy of the GNU General Public License
-+ along with this program; if not, write to the Free Software
-+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
-+
-+*/
-+
-+/*
-+ Each section is delimited with start and end markers.
-+
-+ <arch>-opc.h additions use: "-- opc.h"
-+ <arch>-opc.c additions use: "-- opc.c"
-+ <arch>-asm.c additions use: "-- asm.c"
-+ <arch>-dis.c additions use: "-- dis.c"
-+ <arch>-ibd.h additions use: "-- ibd.h"
-+*/
-+
-+/* -- opc.h */
-+
-+/* Check applicability of instructions against machines. */
-+#define CGEN_VALIDATE_INSN_SUPPORTED
-+
-+/* Allows reason codes to be output when assembler errors occur. */
-+#define CGEN_VERBOSE_ASSEMBLER_ERRORS
-+
-+/* Override disassembly hashing - there are variable bits in the top
-+ byte of these instructions. */
-+#define CGEN_DIS_HASH_SIZE 8
-+#define CGEN_DIS_HASH(buf, value) (((* (unsigned char *) (buf)) >> 5) % CGEN_DIS_HASH_SIZE)
-+
-+#define CGEN_ASM_HASH_SIZE 127
-+#define CGEN_ASM_HASH(insn) mt_asm_hash (insn)
-+
-+extern unsigned int mt_asm_hash (const char *);
-+
-+extern int mt_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *);
-+
-+
-+/* -- opc.c */
-+#include "safe-ctype.h"
-+
-+/* Special check to ensure that instruction exists for given machine. */
-+
-+int
-+mt_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
-+{
-+ int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
-+
-+ /* No mach attribute? Assume it's supported for all machs. */
-+ if (machs == 0)
-+ return 1;
-+
-+ return ((machs & cd->machs) != 0);
-+}
-+
-+/* A better hash function for instruction mnemonics. */
-+
-+unsigned int
-+mt_asm_hash (const char* insn)
-+{
-+ unsigned int hash;
-+ const char* m = insn;
-+
-+ for (hash = 0; *m && ! ISSPACE (*m); m++)
-+ hash = (hash * 23) ^ (0x1F & TOLOWER (*m));
-+
-+ /* printf ("%s %d\n", insn, (hash % CGEN_ASM_HASH_SIZE)); */
-+
-+ return hash % CGEN_ASM_HASH_SIZE;
-+}
-+
-+
-+/* -- asm.c */
-+/* Range checking for signed numbers. Returns 0 if acceptable
-+ and 1 if the value is out of bounds for a signed quantity. */
-+
-+static int
-+signed_out_of_bounds (long val)
-+{
-+ if ((val < -32768) || (val > 32767))
-+ return 1;
-+ return 0;
-+}
-+
-+static const char *
-+parse_loopsize (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ void *arg)
-+{
-+ signed long * valuep = (signed long *) arg;
-+ const char *errmsg;
-+ bfd_reloc_code_real_type code = BFD_RELOC_NONE;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ /* Is it a control transfer instructions? */
-+ if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_LOOPSIZE)
-+ {
-+ code = BFD_RELOC_MT_PCINSN8;
-+ errmsg = cgen_parse_address (cd, strp, opindex, code,
-+ & result_type, & value);
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ abort ();
-+}
-+
-+static const char *
-+parse_imm16 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ void *arg)
-+{
-+ signed long * valuep = (signed long *) arg;
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_reloc_code_real_type code = BFD_RELOC_NONE;
-+ bfd_vma value;
-+
-+ /* Is it a control transfer instructions? */
-+ if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_IMM16O)
-+ {
-+ code = BFD_RELOC_16_PCREL;
-+ errmsg = cgen_parse_address (cd, strp, opindex, code,
-+ & result_type, & value);
-+ if (errmsg == NULL)
-+ {
-+ if (signed_out_of_bounds (value))
-+ errmsg = _("Operand out of range. Must be between -32768 and 32767.");
-+ }
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ /* If it's not a control transfer instruction, then
-+ we have to check for %OP relocating operators. */
-+ if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_IMM16L)
-+ ;
-+ else if (strncmp (*strp, "%hi16", 5) == 0)
-+ {
-+ *strp += 5;
-+ code = BFD_RELOC_HI16;
-+ }
-+ else if (strncmp (*strp, "%lo16", 5) == 0)
-+ {
-+ *strp += 5;
-+ code = BFD_RELOC_LO16;
-+ }
-+
-+ /* If we found a %OP relocating operator, then parse it as an address.
-+ If not, we need to parse it as an integer, either signed or unsigned
-+ depending on which operand type we have. */
-+ if (code != BFD_RELOC_NONE)
-+ {
-+ /* %OP relocating operator found. */
-+ errmsg = cgen_parse_address (cd, strp, opindex, code,
-+ & result_type, & value);
-+ if (errmsg == NULL)
-+ {
-+ switch (result_type)
-+ {
-+ case (CGEN_PARSE_OPERAND_RESULT_NUMBER):
-+ if (code == BFD_RELOC_HI16)
-+ value = (value >> 16) & 0xFFFF;
-+ else if (code == BFD_RELOC_LO16)
-+ value = value & 0xFFFF;
-+ else
-+ errmsg = _("Biiiig Trouble in parse_imm16!");
-+ break;
-+
-+ case (CGEN_PARSE_OPERAND_RESULT_QUEUED):
-+ /* No special processing for this case. */
-+ break;
-+
-+ default:
-+ errmsg = _("%operator operand is not a symbol");
-+ break;
-+ }
-+ }
-+ *valuep = value;
-+ }
-+ else
-+ {
-+ /* Parse hex values like 0xffff as unsigned, and sign extend
-+ them manually. */
-+ int parse_signed = (opindex == (CGEN_OPERAND_TYPE)MT_OPERAND_IMM16);
-+
-+ if ((*strp)[0] == '0'
-+ && ((*strp)[1] == 'x' || (*strp)[1] == 'X'))
-+ parse_signed = 0;
-+
-+ /* No relocating operator. Parse as an number. */
-+ if (parse_signed)
-+ {
-+ /* Parse as as signed integer. */
-+
-+ errmsg = cgen_parse_signed_integer (cd, strp, opindex, valuep);
-+
-+ if (errmsg == NULL)
-+ {
-+#if 0
-+ /* Manual range checking is needed for the signed case. */
-+ if (*valuep & 0x8000)
-+ value = 0xffff0000 | *valuep;
-+ else
-+ value = *valuep;
-+
-+ if (signed_out_of_bounds (value))
-+ errmsg = _("Operand out of range. Must be between -32768 and 32767.");
-+ /* Truncate to 16 bits. This is necessary
-+ because cgen will have sign extended *valuep. */
-+ *valuep &= 0xFFFF;
-+#endif
-+ }
-+ }
-+ else
-+ {
-+ /* MT_OPERAND_IMM16Z. Parse as an unsigned integer. */
-+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, (unsigned long *) valuep);
-+
-+ if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_IMM16
-+ && *valuep >= 0x8000
-+ && *valuep <= 0xffff)
-+ *valuep -= 0x10000;
-+ }
-+ }
-+
-+ return errmsg;
-+}
-+
-+
-+static const char *
-+parse_dup (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg = NULL;
-+
-+ if (strncmp (*strp, "dup", 3) == 0 || strncmp (*strp, "DUP", 3) == 0)
-+ {
-+ *strp += 3;
-+ *valuep = 1;
-+ }
-+ else if (strncmp (*strp, "xx", 2) == 0 || strncmp (*strp, "XX", 2) == 0)
-+ {
-+ *strp += 2;
-+ *valuep = 0;
-+ }
-+ else
-+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
-+
-+ return errmsg;
-+}
-+
-+
-+static const char *
-+parse_ball (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg = NULL;
-+
-+ if (strncmp (*strp, "all", 3) == 0 || strncmp (*strp, "ALL", 3) == 0)
-+ {
-+ *strp += 3;
-+ *valuep = 1;
-+ }
-+ else if (strncmp (*strp, "one", 3) == 0 || strncmp (*strp, "ONE", 3) == 0)
-+ {
-+ *strp += 3;
-+ *valuep = 0;
-+ }
-+ else
-+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
-+
-+ return errmsg;
-+}
-+
-+static const char *
-+parse_xmode (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg = NULL;
-+
-+ if (strncmp (*strp, "pm", 2) == 0 || strncmp (*strp, "PM", 2) == 0)
-+ {
-+ *strp += 2;
-+ *valuep = 1;
-+ }
-+ else if (strncmp (*strp, "xm", 2) == 0 || strncmp (*strp, "XM", 2) == 0)
-+ {
-+ *strp += 2;
-+ *valuep = 0;
-+ }
-+ else
-+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
-+
-+ return errmsg;
-+}
-+
-+static const char *
-+parse_rc (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg = NULL;
-+
-+ if (strncmp (*strp, "r", 1) == 0 || strncmp (*strp, "R", 1) == 0)
-+ {
-+ *strp += 1;
-+ *valuep = 1;
-+ }
-+ else if (strncmp (*strp, "c", 1) == 0 || strncmp (*strp, "C", 1) == 0)
-+ {
-+ *strp += 1;
-+ *valuep = 0;
-+ }
-+ else
-+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
-+
-+ return errmsg;
-+}
-+
-+static const char *
-+parse_cbrb (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg = NULL;
-+
-+ if (strncmp (*strp, "rb", 2) == 0 || strncmp (*strp, "RB", 2) == 0)
-+ {
-+ *strp += 2;
-+ *valuep = 1;
-+ }
-+ else if (strncmp (*strp, "cb", 2) == 0 || strncmp (*strp, "CB", 2) == 0)
-+ {
-+ *strp += 2;
-+ *valuep = 0;
-+ }
-+ else
-+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
-+
-+ return errmsg;
-+}
-+
-+static const char *
-+parse_rbbc (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg = NULL;
-+
-+ if (strncmp (*strp, "rt", 2) == 0 || strncmp (*strp, "RT", 2) == 0)
-+ {
-+ *strp += 2;
-+ *valuep = 0;
-+ }
-+ else if (strncmp (*strp, "br1", 3) == 0 || strncmp (*strp, "BR1", 3) == 0)
-+ {
-+ *strp += 3;
-+ *valuep = 1;
-+ }
-+ else if (strncmp (*strp, "br2", 3) == 0 || strncmp (*strp, "BR2", 3) == 0)
-+ {
-+ *strp += 3;
-+ *valuep = 2;
-+ }
-+ else if (strncmp (*strp, "cs", 2) == 0 || strncmp (*strp, "CS", 2) == 0)
-+ {
-+ *strp += 2;
-+ *valuep = 3;
-+ }
-+ else
-+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
-+
-+ return errmsg;
-+}
-+
-+static const char *
-+parse_type (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg = NULL;
-+
-+ if (strncmp (*strp, "odd", 3) == 0 || strncmp (*strp, "ODD", 3) == 0)
-+ {
-+ *strp += 3;
-+ *valuep = 0;
-+ }
-+ else if (strncmp (*strp, "even", 4) == 0 || strncmp (*strp, "EVEN", 4) == 0)
-+ {
-+ *strp += 4;
-+ *valuep = 1;
-+ }
-+ else if (strncmp (*strp, "oe", 2) == 0 || strncmp (*strp, "OE", 2) == 0)
-+ {
-+ *strp += 2;
-+ *valuep = 2;
-+ }
-+ else
-+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
-+
-+ if ((errmsg == NULL) && (*valuep == 3))
-+ errmsg = _("invalid operand. type may have values 0,1,2 only.");
-+
-+ return errmsg;
-+}
-+
-+/* -- dis.c */
-+static void print_dollarhex (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int);
-+static void print_pcrel (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int);
-+
-+static void
-+print_dollarhex (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ info->fprintf_func (info->stream, "$%lx", value);
-+
-+ if (0)
-+ print_normal (cd, dis_info, value, attrs, pc, length);
-+}
-+
-+static void
-+print_pcrel (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ print_address (cd, dis_info, value + pc, attrs, pc, length);
-+}
-+
-+/* -- */
-+
-+
-+
-+
-+
-diff -Nur binutils-2.24.orig/cgen/cpu/nds16.cpu binutils-2.24/cgen/cpu/nds16.cpu
---- binutils-2.24.orig/cgen/cpu/nds16.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds16.cpu 2016-06-30 21:26:12.629892178 +0200
-@@ -0,0 +1,960 @@
-+; ==============================================================================
-+; Andes NDS32 family CPU 16-bit instruction set. -*- Scheme -*-
-+; Andes Technology Corporation
-+; ==============================================================================
-+; This file is included by nds32.cpu.
-+
-+; ==============================================================================
-+; Attributes.
-+; ==============================================================================
-+
-+; ==============================================================================
-+; 16-bit instruction fields
-+; ==============================================================================
-+; define normal half-word field
-+;(define-pmacro (dnhf name comment attrs start length)
-+; (dnf name comment (.splice (.unsplice attrs) (ISA nds16)) start length)
-+;)
-+
-+
-+;opcode field assignment = 1 + 4 + 3 + 3 + 5 = 16
-+(dnf f-16-opc1 "s" () 0 1)
-+(dnf f-16-opc14 "s" () 1 4)
-+(dnf f-16-opc141 "s" () 5 1)
-+(dnf f-16-opc142 "s" () 5 2)
-+(dnf f-16-opc143 "s" () 5 3)
-+(dnf f-16-opc1431 "s" () 8 1)
-+(dnf f-16-opc1433 "s" () 8 3)
-+(dnf f-16-opc14332 "s" () 11 2)
-+(dnf f-16-opc143323 "s" () 13 3)
-+
-+
-+; operand fields
-+; registers
-+(dnf f-16-rt5h "rt5" () 6 5)
-+(dnf f-16-ra5h "ra5" () 11 5)
-+(dnf f-16-rb5h "rb5" () 11 5)
-+(dnf f-16-rt4 "rt4" () 7 4)
-+(dnf f-16-ra4 "ra4" () 7 4)
-+(dnf f-16-rt3 "rt3" () 5 3)
-+(dnf f-16-rt3_7 "rt3" () 7 3)
-+(dnf f-16-ra3 "ra3" () 10 3)
-+(dnf f-16-rb3 "rb3" () 13 3)
-+; immediates
-+(dnf f-16-uimm3 "uimm3" () 13 3)
-+(df f-16-ulo3w "ulo3w" () 13 3 UINT
-+ ((value pc) (c-code USI "value; if (value&0x3) return BAD_WOFFSET; else value>>=2"))
-+ ((value pc) (sll USI value (const 2))))
-+(df f-16-ulo3h "ulo3h" () 13 3 UINT
-+ ((value pc) (c-code USI "value; if (value&0x1) return BAD_WOFFSET; else value>>=1"))
-+ ((value pc) (sll USI value (const 1))))
-+(df f-16-ulo3b "ulo3b" () 13 3 UINT #f #f)
-+(dnf f-16-uimm5 "uimm5" () 11 5)
-+(df f-16-simm5 "simm5" () 11 5 INT #f #f)
-+(df f-16-ulo7w "ulo7w" () 9 7 UINT
-+ ((value pc) (c-code USI "value; if (value&0x3) return BAD_WOFFSET; else value>>=2"))
-+ ((value pc) (sll USI value (const 2))))
-+(df f-16-hsdisp8 "hsdisp8" (PCREL-ADDR RELOC) 8 8 INT
-+ ((value pc) (sra SI (sub SI value (and SI pc (const -2))) (const 1)))
-+ ((value pc) (add SI (sll SI value (const 1)) (and SI pc (const -2)))))
-+(dnf f-16-swid5 "5-bit SWID" () 11 5)
-+(dnf f-16-swid9 "9-bit SWID" () 7 9)
-+
-+;=================================== insn enum ===============================
-+
-+;rule
-+;3G2, 3R2, 3_2, BNEZS8 -> 3-bits sub opcode with value 2
-+;;3G2 -> Group, more than one insn under this grop
-+;;3R2 -> Reserved instruction
-+;;3_2 -> Empty space, this opcode field is defined by longer sub opcode, or it's not opcode field
-+;;BNEZS8 -> It's an instruction
-+
-+;6G -> 6-bits field, any value, can be immediate or register index
-+
-+
-+(define-normal-insn-enum format16-opc-4g "s" () F16_OPC_ f-16-opc14
-+ ("4G0" "4G1" "4G2" "4G3" "4G4" "4G5" "4G6" "4G7"
-+ "BEQZ38" "BNEZ38" "4G10" "4G11" "4G12" "4G13" "4G14" "4G15"))
-+;============= 4G0
-+(define-normal-insn-enum format16-opc-4g0-1g "s" () F16_OPC_4G0_ f-16-opc141
-+ ("MOV55" "MOVI55" ))
-+;============= 4G1
-+(define-normal-insn-enum format16-opc-4g1-2g "s" () F16_OPC_4G1_ f-16-opc142
-+ ("ADD45" "SUB45" "ADDI45" "SUBI45"))
-+;============= 4G2
-+(define-normal-insn-enum format16-opc-4g2-2g "s" () F16_OPC_4G2_ f-16-opc142
-+ ("SRAI45" "SRLI45" "SLLI333" "2G3"))
-+(define-normal-insn-enum format16-opc-4g2-2g3-6g-3g "s" () F16_OPC_4G2_2G3_6G_ f-16-opc143323
-+ ("ZEB33" "ZEH33" "SEB33" "SEH33" "XLSB33" "X11B33" "BMSKI33" "FEXTI33"))
-+;============= 4G3
-+(define-normal-insn-enum format16-opc-4g3-2g "s" () F16_OPC_4G3_ f-16-opc142
-+ ("ADD333" "SUB333" "ADDI333" "SUBI333"))
-+;============= 4G4
-+(define-normal-insn-enum format16-opc-4g4-2g "s" () F16_OPC_4G4_ f-16-opc142
-+ ("LWI333" "LWI333_BI" "LHI333" "LBI333"))
-+;============= 4G5
-+(define-normal-insn-enum format16-opc-4g5-2g "s" () F16_OPC_4G5_ f-16-opc142
-+ ("SWI333" "SWI333_BI" "SHI333" "SBI333"))
-+;============= 4G6
-+(define-normal-insn-enum format16-opc-4g6-2g "s" () F16_OPC_4G6_ f-16-opc142
-+ ("ADDRI36_SP" "LWI45_FE" "LWI450" "SWI450"))
-+;============= 4G7
-+(define-normal-insn-enum format16-opc-4g7-3g-1g "s" () F16_OPC_4G7_3G_ f-16-opc1431
-+ ("LWI37" "SWI37"))
-+;============= 4G10
-+(define-normal-insn-enum format16-opc-4g10-3g "s" () F16_OPC_4G10_ f-16-opc143
-+ ("3_0" "3_1" "3_2" "3_3" "3_4" "J8" "3_6" "3_7"))
-+;============= 4G11
-+(define-normal-insn-enum format16-opc-4g11-3g "s" () F16_OPC_4G11_ f-16-opc143
-+ ("3_0" "3_1" "3_2" "3_3" "3_4" "3G5" "3_6" "3_7"))
-+(define-normal-insn-enum format16-opc-4g11-3g5-3g "s" () F16_OPC_4G11_3G5_ f-16-opc1433
-+ ("JR5" "JRAL5" "EX5_IT" "3R3" "RET5" "ADD5_PC" "3R6" "3R7"))
-+;============= 4G12
-+(define-normal-insn-enum format16-opc-4g12-2g "s" () F16_OPC_4G12_ f-16-opc142
-+ ("SLTS45" "SLT45" "SLTSI45" "SLTI45"))
-+;============= 4G13
-+(define-normal-insn-enum format16-opc-4g13-1g "s" () F16_OPC_4G13_ f-16-opc141
-+ ("1G0" "ADDI10S"))
-+(define-normal-insn-enum format16-opc-4g13-2g "s" () F16_OPC_4G13_ f-16-opc142
-+ ("2G0" "2G1" "2_2" "2_3"))
-+(define-normal-insn-enum format16-opc-4g13-3g "s" () F16_OPC_4G13_ f-16-opc143
-+ ("BEQZS8" "BNEZS8" "3G2" "3_3" "3_4" "3_5" "3_6" "3_7"))
-+(define-normal-insn-enum format16-opc-4g13-3g2-3g "s" () F16_OPC_4G13_3G2_ f-16-opc1433
-+ ("BREAK16" "3_1" "3_2" "3_3" "3_4" "3_5" "3_6" "3_7"))
-+;============= 4G14
-+(define-normal-insn-enum format16-opc-4g14-3g-1g "s" () F16_OPC_4G14_3G_ f-16-opc1431
-+ ("LWI37_SP" "SWI37_SP"))
-+;============= 4G15
-+(define-normal-insn-enum format16-opc-4g15-2g "s" () F16_OPC_4G15_ f-16-opc142
-+ ("IFCALL9" "MOVPI45" "2G2" "2G3"))
-+(define-normal-insn-enum format16-opc-4g15-3g "s" () F16_OPC_4G15_ f-16-opc143
-+ ("3_0" "3_1" "3_2" "3_3" "3G4" "MOVD44" "3_6" "3_7"))
-+(define-normal-insn-enum format16-opc-4g15-3g4-1g "s" () F16_OPC_4G15_3G4_ f-16-opc1431
-+ ("PUSH25" "POP25"))
-+(define-normal-insn-enum format16-opc-4g15-2g3-6g-3g "s" () F16_OPC_4G15_2G3_6G_ f-16-opc143323
-+ ("3R0" "3R1" "NEG33" "NOT33" "MUL33" "XOR33" "AND33" "OR33"))
-+
-+
-+; ==============================================================================
-+; Hardware pieces.
-+; ==============================================================================
-+(dnh h-uimm3 "unsigned immediate 3 bits" ()
-+ (immediate (UINT 3))
-+ () () ()
-+)
-+(dnh h-ulo3w "unsigned immediate 3 bits" ()
-+ (immediate (UINT 3))
-+ () () ()
-+)
-+(dnh h-ulo3h "unsigned immediate 3 bits" ()
-+ (immediate (UINT 3))
-+ () () ()
-+)
-+(dnh h-ulo3b "unsigned immediate 3 bits" ()
-+ (immediate (UINT 3))
-+ () () ()
-+)
-+(dnh h-simm5h "signed immediate 5 bits" ()
-+ (immediate (INT 5))
-+ () () ()
-+)
-+(dnh h-uimm5h "unsigned immediate 5 bits" ()
-+ (immediate (UINT 5))
-+ () () ()
-+)
-+(dnh h-ulo7w "unsigned immediate 7 bits" ()
-+ (immediate (UINT 7))
-+ () () ()
-+)
-+(dnh h-swid5 "unsigned immediate 5 bits" ()
-+ (immediate (UINT 5))
-+ () () ()
-+)
-+(dnh h-swid9 "unsigned immediate 9 bits" ()
-+ (immediate (UINT 9))
-+ () () ()
-+)
-+
-+(define-hardware
-+ (name h-itb)
-+ (comment "Instruction Table Base (ITB)")
-+ (attrs PROFILE)
-+ (type register USI)
-+)
-+
-+(dnh h-conf-itb "configuration for ITB" () (register USI) () () ())
-+(dnh h-wtmsk-itb "write mask for ITB" () (register USI) () () ())
-+
-+(dnh h-hsdisp8 "8-bits half word displacement" ()
-+ (immediate (INT 8))
-+ () () ())
-+
-+
-+; These entries list the elements of the mapped general registers.
-+; 4-bit addressing of general registers
-+(define-keyword
-+ (name gr-names-16)
-+ (print-name h-gr16)
-+ (prefix "$")
-+ (values (r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)
-+ (r8 8) (r9 9) (r10 10) (r11 11) (r16 12) (r17 13) (r18 14) (r19 15)
-+ (h0 0) (h1 1) (h2 2) (h3 3) (h4 4) (h5 5) (h6 6) (h7 7)
-+ (h8 8) (h9 9) (h10 10) (h11 11) (h12 12) (h13 13) (h14 14) (h15 15)
-+ (a0 0) (a1 1) (a2 2) (a3 3) (a4 4) (a5 5)
-+ )
-+)
-+
-+(define-hardware
-+ (name h-gr16)
-+ (comment "4-bit general registers")
-+ (attrs PROFILE VIRTUAL )
-+ (type register USI (16))
-+ (indices extern-keyword gr-names-16)
-+; (get (regno) (reg SI h-gr (c-code INT "((regno<12)?regno:(regno+4))")))
-+ (get (regno) (raw-reg SI h-gr (if INT (lt regno 12) regno (add regno 4))))
-+ (set (regno newval) (if (lt regno (const 12))
-+ (set (raw-reg h-gr regno) newval)
-+ (set (raw-reg h-gr (add regno (const 4))) newval)))
-+)
-+
-+; 3-bit addressing of general registers
-+(define-keyword
-+ (name gr-names-8)
-+ (print-name h-gr8)
-+ (prefix "$")
-+ (values (r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)
-+ (o0 0) (o1 1) (o2 2) (o3 3) (o4 4) (o5 5) (o6 6) (o7 7)
-+ (a0 0) (a1 1) (a2 2) (a3 3) (a4 4) (a5 5)
-+ )
-+)
-+
-+(define-hardware
-+ (name h-gr8)
-+ (comment "3-bit general registers")
-+ (attrs PROFILE VIRTUAL )
-+ (type register USI (8))
-+ (indices extern-keyword gr-names-8)
-+ (get (regno) (raw-reg h-gr regno))
-+ (set (regno newval) (set (raw-reg h-gr regno) newval))
-+)
-+
-+; 3-bit addressing of general registers
-+(define-keyword
-+ (name gr-names-8e5)
-+ (print-name h-gr8e5)
-+ (prefix "$")
-+ (values (r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r6 6) (r7 7)
-+ (o0 0) (o1 1) (o2 2) (o3 3) (o4 4) (o6 6) (o7 7)
-+ (a0 0) (a1 1) (a2 2) (a3 3) (a4 4)
-+ )
-+)
-+
-+(define-hardware
-+ (name h-gr8e5)
-+ (comment "3-bit general registers")
-+ (attrs PROFILE VIRTUAL )
-+ (type register USI (8))
-+ (indices extern-keyword gr-names-8e5)
-+ (get (regno) (raw-reg h-gr regno))
-+ (set (regno newval) (set (raw-reg h-gr regno) newval))
-+)
-+
-+(define-hardware
-+ (name h-xlsb)
-+ (comment "subtype for XLSB (or say BFMI)")
-+ (type immediate (UINT 3))
-+ (values keyword "" (
-+ ("1" 4) ("11" 5)
-+ ))
-+)
-+
-+; ==============================================================================
-+; declare operands
-+; ==============================================================================
-+; define normal half-word field
-+;(define-pmacro (dnhop name comment attrs hw indx)
-+; (dnop name comment (.splice (.unsplice attrs) (ISA nds16)) hw indx)
-+; (dnop name comment attrs hw indx)
-+;)
-+
-+(dnop rt5h "destination register" () h-gr f-16-rt5h)
-+(dnop ra5h "source register A" () h-gr f-16-ra5h)
-+(dnop rb5h "source register B" () h-gr f-16-rb5h) ;rb5 field position is identical to ra5
-+
-+(dnop rt4 "4-bit destination register" () h-gr16 f-16-rt4)
-+(dnop ra4 "4-bit source register A" () h-gr16 f-16-ra4) ;ra4 field position is identical to rt4
-+
-+(dnop rt3 "3-bit destination register" () h-gr8 f-16-rt3)
-+(dnop rt3e5 "3-bit destination register" () h-gr8e5 f-16-rt3)
-+(dnop rt3_7 "3-bit destination register" () h-gr8 f-16-rt3_7)
-+(dnop ra3 "3-bit source register A" () h-gr8 f-16-ra3)
-+(dnop rb3 "3-bit source register B" () h-gr8 f-16-rb3)
-+
-+(dnop bits "3-bit unsigned immediate" (HASH-PREFIX ) h-xlsb f-16-uimm3)
-+
-+(define-operand
-+ (name uimm3)
-+ (comment "3-bit unsigned immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-uimm3)
-+ (index f-16-uimm3)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name ulo3w)
-+ (comment "3-bit unsigned immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-ulo3w)
-+ (index f-16-ulo3w)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name ulo3h)
-+ (comment "3-bit unsigned immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-ulo3h)
-+ (index f-16-ulo3h)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name ulo3b)
-+ (comment "3-bit unsigned immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-ulo3b)
-+ (index f-16-ulo3b)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name simm5h)
-+ (comment "5-bit signed immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-simm5h)
-+ (index f-16-simm5)
-+ (handlers (parse "slo20"))
-+)
-+
-+(define-operand
-+ (name uimm5h)
-+ (comment "5-bit unsigned immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-uimm5h)
-+ (index f-16-uimm5)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name imm5u)
-+ (comment "5-bit unsigned immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-uimm5h)
-+ (index f-16-uimm5)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name ulo7w)
-+ (comment "7-bit unsigned immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-ulo7w)
-+ (index f-16-ulo7w)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name swid5)
-+ (comment "5-bit software I/D")
-+ (attrs HASH-PREFIX)
-+ (type h-swid5)
-+ (index f-16-swid5)
-+ (handlers (parse "unsigned_immediate")(print "unsigned_immediate")))
-+
-+(define-operand
-+ (name swid9)
-+ (comment "9-bit software I/D")
-+ (attrs HASH-PREFIX)
-+ (type h-swid9)
-+ (index f-16-swid9)
-+ (handlers (parse "unsigned_immediate")(print "unsigned_immediate")))
-+
-+
-+
-+(define-operand
-+ (name hsdisp8)
-+ (comment "8 bit half-word displacement")
-+ (attrs RELAX)
-+ (type h-hsdisp8)
-+ (index f-16-hsdisp8)
-+ (handlers (parse "nds32_address") (print "address")))
-+
-+; ==============================================================================
-+; instructions by groups which are encoded using bits 1-4
-+; =============================================================================
-+; define normal half-word instruction
-+;(define-pmacro (dnhi xname xcomment xattrs xsyntax xformat xsemantics xtiming)
-+; (define-insn (name xname)
-+; (comment xcomment)
-+; (.splice attrs (.unsplice xattrs) (ISA nds16))
-+; (syntax xsyntax)
-+; (format xformat)
-+; (semantics xsemantics)
-+; (timing xtiming)
-+; )
-+;)
-+
-+; group 0 - move
-+(define-full-insn mov55 "mov55"
-+ ((PIPE OS) (IDOC ALU) A16 V3)
-+ "mov55 $rt5h,$ra5h"
-+ (+ IFMT_16 F16_OPC_4G0 F16_OPC_4G0_MOV55 rt5h ra5h)
-+ ()
-+ (sequence((USI addr))
-+ (if (c-code USI "(TEST_H_SR_FLD(MSC_CFG,IFC) && 31 == FLD (f_16_rt5h) && 31 == FLD (f_16_ra5h))")
-+ (sequence ()
-+ (if (c-call USI "audio_exception_check")
-+ (c-code VOID "goto MOV55_interruption;\n"))
-+ (c-call VOID "nds32_branch_target_alignment_check" pc (c-code USI "H_IFC_LP()"))
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto MOV55_interruption;\n\n")
-+ (c-code VOID "//CHANGE_INSTRUCTION(ifret16);\n")
-+ (if (c-code USI "current_cpu->IFC_clear()")
-+ (sequence ()
-+ (set pc (c-code USI "H_IFC_LP()"))
-+ (c-code VOID "SET_RET_CNT_COUNTER();\n"))
-+ (nop)))
-+ (sequence ((USI opval))
-+ (c-code VOID "//CHANGE_INSTRUCTION(mov55);\n")
-+ (set rt5h ra5h))))
-+ ((n1hm (unit u-exec)))
-+ ((parse "insn-special0"))
-+)
-+
-+(dni movi55 "movi55"
-+ ((PIPE OS) (IDOC ALU) A16)
-+ "movi55 $rt5h,$simm5h"
-+ (+ IFMT_16
-+ F16_OPC_4G0
-+ F16_OPC_4G0_MOVI55 rt5h simm5h)
-+ (set rt5h simm5h)
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+; group 1 - arithmetic
-+(define-pmacro (arith-op45 mnemonic opcode sem-op)
-+ (begin
-+ (define-full-insn (.sym mnemonic "i45") (.str mnemonic "i45 reg" imm5u)
-+ ((PIPE OS) (IDOC ALU) A16)
-+ (.str mnemonic "i45 $rt4,$imm5u")
-+ (+ IFMT_16 F16_OPC_4G1 (.sym "F16_OPC_4G1_" opcode "I45") rt4 imm5u)
-+ ()
-+ (set rt4 (sem-op rt4 imm5u))
-+ ((n1hm (unit u-exec))
-+ )
-+ ((print "insn-special15"))
-+ )
-+ (dni (.sym mnemonic "45") (.str mnemonic "45 reg/reg")
-+ ((PIPE OS) (IDOC ALU) A16)
-+ (.str mnemonic "45 $rt4,$rb5h")
-+ (+ IFMT_16 F16_OPC_4G1 (.sym "F16_OPC_4G1_" opcode "45") rt4 rb5h)
-+ (set rt4 (sem-op rt4 rb5h))
-+ ((n1hm (unit u-exec))
-+ )
-+ )
-+ )
-+)
-+(arith-op45 add ADD add)
-+(arith-op45 sub SUB sub)
-+
-+; group 2 - shift
-+(define-pmacro (shift-op45 mnemonic opcode sem-op)
-+ (begin
-+ (define-full-insn (.sym mnemonic "i45") (.str mnemonic "i45 reg" uimm5h)
-+ ((PIPE OS) (IDOC ALU) A16)
-+ (.str mnemonic "i45 $rt4,$uimm5h")
-+ (+ IFMT_16 F16_OPC_4G2 (.sym "F16_OPC_4G2_" opcode "I45") rt4 uimm5h)
-+ ()
-+ (set rt4 (sem-op rt4 uimm5h))
-+ ((n1hm (unit u-exec))
-+ )
-+ ;insn-special10 for srai45
-+ ((print "insn-special10"))
-+ )
-+ )
-+)
-+(shift-op45 sra SRA sra)
-+
-+
-+(define-full-insn srli45 "srli45 reg uimm5h"
-+ ((PIPE OS) (IDOC ALU) A16)
-+ "srli45 $rt4,$uimm5h"
-+ (+ IFMT_16 F16_OPC_4G2 F16_OPC_4G2_SRLI45 rt4 uimm5h)
-+ ()
-+ (if (and USI (eq USI (index-of rt4) (const 0)) (eq USI uimm5h (const 0)))
-+ (sequence ()
-+ (c-code VOID " SET_NOP_CNT_COUNTER();\n")
-+ (c-code VOID " //NOP_TRACE_RESULT (current_cpu)\n")
-+ )
-+ (set rt4 (srl rt4 uimm5h))
-+ )
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ ;insn-special11 for srli45
-+ ((print "insn-special11"))
-+)
-+
-+(define-full-insn slli333 "slli333"
-+ ((PIPE OS) (IDOC ALU) A16)
-+ "slli333 $rt3_7,$ra3,$uimm3"
-+ (+ IFMT_16 F16_OPC_4G2 F16_OPC_4G2_SLLI333 rt3_7 ra3 uimm3)
-+ ()
-+ (set rt3_7 (sll ra3 uimm3))
-+ ((n1hm (unit u-exec))
-+ )
-+ ;insn-special12 for slli333
-+ ((print "insn-special12"))
-+)
-+
-+(define-pmacro (extend33-op prefix suffix mode)
-+ (begin
-+ (dni (.sym prefix "e" suffix "33") (.str prefix "e" suffix "33")
-+ ((PIPE OS) (IDOC ALU) A16)
-+ (.str prefix "e" suffix "33 $rt3_7,$ra3")
-+ (+ IFMT_16 F16_OPC_4G2 F16_OPC_4G2_2G3 rt3_7 ra3 (.sym "F16_OPC_4G2_2G3_6G_" (.upcase prefix) "E" (.upcase suffix) "33"))
-+ (set rt3_7 ((.sym prefix "ext") SI (trunc mode ra3)))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ )
-+ )
-+)
-+(extend33-op s b QI)
-+(extend33-op s h HI)
-+(extend33-op z b UQI)
-+(extend33-op z h UHI)
-+
-+(dni xlsb33 "xlsb33"
-+ ((PIPE OS) (IDOC ALU) A16)
-+ "xlsb33 $rt3_7,$ra3"
-+ (+ IFMT_16 F16_OPC_4G2 F16_OPC_4G2_2G3 rt3_7 ra3 F16_OPC_4G2_2G3_6G_XLSB33)
-+ (set rt3_7 (and ra3 (const 1)))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+)
-+
-+(dni x11b33 "x11b33"
-+ ((PIPE OS) (IDOC ALU) A16)
-+ "x11b33 $rt3_7,$ra3"
-+ (+ IFMT_16 F16_OPC_4G2 F16_OPC_4G2_2G3 rt3_7 ra3 F16_OPC_4G2_2G3_6G_X11B33)
-+ (set rt3_7 (and ra3 (const #x7ff)))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+)
-+
-+
-+; group 3 - arithmetic
-+(define-pmacro (arith-op333 mnemonic opcode sem-op)
-+ (begin
-+ (define-full-insn (.sym mnemonic "i333") (.str mnemonic "i333 reg/reg" uimm3)
-+ ((PIPE OS) (IDOC ALU) A16)
-+ (.str mnemonic "i333 $rt3_7,$ra3,$uimm3")
-+ (+ IFMT_16 F16_OPC_4G3 (.sym "F16_OPC_4G3_" opcode "I333") rt3_7 ra3 uimm3)
-+ ()
-+ (set rt3_7 (sem-op ra3 uimm3))
-+ ((n1hm (unit u-exec))
-+ )
-+ ((print "insn-special16"))
-+ )
-+ (dni (.sym mnemonic "333") (.str mnemonic "333 reg/reg/reg")
-+ ((PIPE OS) (IDOC ALU) A16)
-+ (.str mnemonic "333 $rt3_7,$ra3,$rb3")
-+ (+ IFMT_16 F16_OPC_4G3 (.sym "F16_OPC_4G3_" opcode "333") rt3_7 ra3 rb3)
-+ (set rt3_7 (sem-op ra3 rb3))
-+ ((n1hm (unit u-exec))
-+ )
-+ )
-+ )
-+)
-+;addi333, subi333
-+(arith-op333 add ADD add)
-+(arith-op333 sub SUB sub)
-+
-+; group 4 - load
-+(dni lwi333 "lwi333"
-+ ((PIPE O) (IDOC MEM) A16)
-+ "lwi333 $rt3_7,[$ra3+$ulo3w]"
-+ (+ IFMT_16 F16_OPC_4G4 F16_OPC_4G4_LWI333 rt3_7 ra3 ulo3w)
-+ (sequence ((SI data))
-+ (set data (mem SI (add ra3 ulo3w)))
-+ (set rt3_7 (c-code USI "nds32_baseline_am2gr_handler(current_cpu, tmp_data)")))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+(dnmi lwi3332 "lwi3332"
-+ (NO-DIS (PIPE O) (IDOC MEM) A16)
-+ "lwi333 $rt3_7,[$ra3]"
-+ (emit lwi333 rt3_7 ra3 (f-16-ulo3w 0))
-+)
-+
-+(dni lwi333.bi "lwi333.bi"
-+ ((PIPE O) (IDOC MEM) A16)
-+ "lwi333.bi $rt3_7,[$ra3],$ulo3w"
-+ (+ IFMT_16 F16_OPC_4G4 F16_OPC_4G4_LWI333_BI rt3_7 ra3 ulo3w)
-+ (sequence ((SI data))
-+ (set data (mem SI ra3))
-+ (parallel ()
-+ (set rt3_7 (c-code USI "nds32_baseline_am2gr_handler(current_cpu, tmp_data)"))
-+ (set ra3 (add ra3 ulo3w))
-+ )
-+ )
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+;(dnmi lwi333.p "lwi333.p"
-+; (NO-DIS (PIPE O) (IDOC MEM) A16)
-+; "lwi333.p $rt3_7,[$ra3],$ulo3w"
-+; (emit lwi333.bi rt3_7 ra3 ulo3w)
-+;)
-+
-+(dni lhi333 "lhi333"
-+ ((PIPE O) (IDOC MEM) A16)
-+ "lhi333 $rt3_7,[$ra3+$ulo3h]"
-+ (+ IFMT_16 F16_OPC_4G4 F16_OPC_4G4_LHI333 rt3_7 ra3 ulo3h)
-+ (set rt3_7 (zext USI (mem UHI (add ra3 ulo3h))))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+(dnmi lhi3332 "lhi3332"
-+ (NO-DIS (PIPE O) (IDOC MEM) A16)
-+ "lhi333 $rt3_7,[$ra3]"
-+ (emit lhi333 rt3_7 ra3 (f-16-ulo3h 0))
-+)
-+
-+(dni lbi333 "lbi333"
-+ ((PIPE O) (IDOC MEM) A16)
-+ "lbi333 $rt3_7,[$ra3+$ulo3b]"
-+ (+ IFMT_16 F16_OPC_4G4 F16_OPC_4G4_LBI333 rt3_7 ra3 ulo3b)
-+ (set rt3_7 (zext USI (mem UQI (add ra3 ulo3b))))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+(dnmi lbi3332 "lbi3332"
-+ (NO-DIS (PIPE O) (IDOC MEM) A16)
-+ "lbi333 $rt3_7,[$ra3]"
-+ (emit lbi333 rt3_7 ra3 (f-16-ulo3b 0))
-+)
-+
-+; group 5 - store
-+(dni swi333 "swi333"
-+ ((PIPE O) (IDOC MEM) A16)
-+ "swi333 $rt3_7,[$ra3+$ulo3w]"
-+ (+ IFMT_16 F16_OPC_4G5 F16_OPC_4G5_SWI333 rt3_7 ra3 ulo3w)
-+ (set (mem SI (add ra3 ulo3w)) rt3_7)
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+(dnmi swi3332 "swi3332"
-+ (NO-DIS (PIPE O) (IDOC MEM) A16)
-+ "swi333 $rt3_7,[$ra3]"
-+ (emit swi333 rt3_7 ra3 (f-16-ulo3w 0))
-+)
-+
-+(dni swi333.bi "swi333.bi"
-+ ((PIPE O) (IDOC MEM) A16)
-+ "swi333.bi $rt3_7,[$ra3],$ulo3w"
-+ (+ IFMT_16 F16_OPC_4G5 F16_OPC_4G5_SWI333_BI rt3_7 ra3 ulo3w)
-+ (parallel ()
-+ (set (mem SI ra3) rt3_7)
-+ (set ra3 (add ra3 ulo3w))
-+ )
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+;(dnmi swi333.p "swi333.p"
-+; (NO-DIS (PIPE O) (IDOC MEM) A16)
-+; "swi333.p $rt3_7,[$ra3],$ulo3w"
-+; (emit swi333.bi rt3_7 ra3 ulo3w)
-+;)
-+
-+(dni shi333 "shi333"
-+ ((PIPE O) (IDOC MEM) A16)
-+ "shi333 $rt3_7,[$ra3+$ulo3h]"
-+ (+ IFMT_16 F16_OPC_4G5 F16_OPC_4G5_SHI333 rt3_7 ra3 ulo3h)
-+ (sequence()
-+ (c-code VOID "if (DOES_USE_REG_VIEW_DATA_VALUE_WP(current_cpu)) {\n")
-+ (c-code VOID " IS_CORNER_CASE(current_cpu) = 1;\n")
-+ (c-call VOID " store_register_view_data =" rt3_7)
-+ (c-code VOID "}\n")
-+ (set (mem HI (add ra3 ulo3h)) (trunc HI rt3_7))
-+ (c-code VOID "if (DOES_USE_REG_VIEW_DATA_VALUE_WP(current_cpu)) {\n")
-+ (c-code VOID " IS_CORNER_CASE(current_cpu) = 0;\n")
-+ (c-code VOID "}\n")
-+ )
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+(dnmi shi3332 "shi3332"
-+ (NO-DIS (PIPE O) (IDOC MEM) A16)
-+ "shi333 $rt3_7,[$ra3]"
-+ (emit shi333 rt3_7 ra3 (f-16-ulo3h 0))
-+)
-+
-+(dni sbi333 "sbi333"
-+ ((PIPE O) (IDOC MEM) A16)
-+ "sbi333 $rt3_7,[$ra3+$ulo3b]"
-+ (+ IFMT_16 F16_OPC_4G5 F16_OPC_4G5_SBI333 rt3_7 ra3 ulo3b)
-+ (sequence()
-+ (c-code VOID "if (DOES_USE_REG_VIEW_DATA_VALUE_WP(current_cpu)) {\n")
-+ (c-code VOID " IS_CORNER_CASE(current_cpu) = 1;\n")
-+ (c-call VOID " store_register_view_data =" rt3_7)
-+ (c-code VOID "}\n")
-+ (set (mem QI (add ra3 ulo3b)) (trunc QI rt3_7))
-+ (c-code VOID "if (DOES_USE_REG_VIEW_DATA_VALUE_WP(current_cpu)) {\n")
-+ (c-code VOID " IS_CORNER_CASE(current_cpu) = 0;\n")
-+ (c-code VOID "}\n")
-+ )
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+(dnmi sbi3332 "sbi3332"
-+ (NO-DIS (PIPE O) (IDOC MEM) A16)
-+ "sbi333 $rt3_7,[$ra3]"
-+ (emit sbi333 rt3_7 ra3 (f-16-ulo3b 0))
-+)
-+
-+; group 6 - load/store
-+(dni lwi450 "lwi450"
-+ ((PIPE O) (IDOC MEM) A16)
-+ "lwi450 $rt4,[$ra5h]"
-+ (+ IFMT_16 F16_OPC_4G6 F16_OPC_4G6_LWI450 rt4 ra5h)
-+ (sequence ((SI data))
-+ (set data (mem SI ra5h))
-+ (set rt4 (c-code USI "nds32_baseline_am2gr_handler(current_cpu, tmp_data)")))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+(dni swi450 "swi450"
-+ ((PIPE O) (IDOC MEM) A16)
-+ "swi450 $rt4,[$ra5h]"
-+ (+ IFMT_16 F16_OPC_4G6 F16_OPC_4G6_SWI450 rt4 ra5h)
-+ (set (mem SI ra5h) rt4)
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+; group 7 - load/store implied $fp (r28)
-+(dni lwi37 "lwi37"
-+ ((PIPE O) (IDOC MEM) A16)
-+ "lwi37 $rt3,[\\$fp+$ulo7w]"
-+ (+ IFMT_16 F16_OPC_4G7 rt3 F16_OPC_4G7_3G_LWI37 ulo7w)
-+ (sequence ((SI data))
-+ (set data (mem SI (add (reg h-gr (c-code SI "H_GR_FP")) ulo7w)))
-+ (set rt3 (c-code USI "nds32_baseline_am2gr_handler(current_cpu, tmp_data)"))
-+ )
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+(dnmi lwi372 "lwi372"
-+ (NO-DIS (PIPE O) (IDOC MEM) A16)
-+ "lwi37 $rt3,[\\$fp]"
-+ (emit lwi37 rt3 (f-16-ulo7w 0))
-+)
-+
-+(dni swi37 "swi37"
-+ ((PIPE O) (IDOC MEM) A16)
-+ "swi37 $rt3,[\\$fp+$ulo7w]"
-+ (+ IFMT_16 F16_OPC_4G7 rt3 F16_OPC_4G7_3G_SWI37 ulo7w)
-+ (set (mem SI (add (reg h-gr (c-code SI "H_GR_FP")) ulo7w)) rt3)
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+(dnmi swi372 "swi372"
-+ (NO-DIS (PIPE O) (IDOC MEM) A16)
-+ "swi37 $rt3,[\\$fp]"
-+ (emit swi37 rt3 (f-16-ulo7w 0))
-+)
-+
-+;BEQZ38, BNEZ38, BEQS38, BNES38
-+(define-pmacro (b_38-op suffix comp-op opcode operand)
-+ (begin
-+ (dni (.sym suffix) (.str suffix)
-+ (COND-CTI (IDOC BR) A16)
-+ (.str suffix " $rt3,$hsdisp8")
-+ (+ IFMT_16 (.sym "F16_OPC_" opcode) rt3 hsdisp8)
-+ (sequence ()
-+ (if (c-call USI "audio_exception_check")
-+ (c-code VOID (.str "\t goto " (.upcase suffix) "_interruption;\n")))
-+ (if (comp-op SI rt3 operand)
-+ (sequence ()
-+ (c-code VOID (.str "current_cpu->IFC_clear();\n"))
-+ (set pc hsdisp8))
-+ (nop)))
-+ ((n1hm (unit u-cti))))))
-+
-+(b_38-op beqz38 eq BEQZ38 (const SI 0))
-+(b_38-op bnez38 ne BNEZ38 (const SI 0))
-+(b_38-op beqs38 eq 4G10 (reg h-gr 5))
-+(b_38-op bnes38 ne 4G11 (reg h-gr 5))
-+
-+
-+
-+(dni j8 "jump always"
-+ (UNCOND-CTI (IDOC BR) A16)
-+ "j8 $hsdisp8"
-+ (+ IFMT_16
-+ F16_OPC_4G10
-+ F16_OPC_4G10_J8 hsdisp8)
-+ (sequence ()
-+ (if (c-call USI "audio_exception_check")
-+ (c-code VOID "\t goto J8_interruption;\n"))
-+ (c-code VOID (.str "current_cpu->IFC_clear();\n"))
-+ (set pc hsdisp8))
-+ ((n1hm (unit u-cti))))
-+
-+
-+
-+(define-pmacro (jr5-op mnemonic)
-+ (dni mnemonic "jump/ret with register"
-+ (UNCOND-CTI (IDOC BR) A16)
-+ (.str mnemonic " $rb5h")
-+ (+ IFMT_16
-+ F16_OPC_4G11
-+ F16_OPC_4G11_3G5 (.sym "F16_OPC_4G11_3G5_" (.upcase mnemonic)) rb5h)
-+ (sequence ()
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID (.str "\t goto " (.upcase mnemonic) "_interruption;\n")))
-+ ;Used to check whether target instruction address is not half aligned
-+ (c-call VOID "nds32_branch_target_alignment_check" pc rb5h)
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase mnemonic) "_interruption;\n\n"))
-+ (c-code VOID (.str "current_cpu->IFC_clear();\n"))
-+ (set pc rb5h))
-+ ((n1hm (unit u-cti)))))
-+
-+
-+(jr5-op jr5)
-+(jr5-op ret5)
-+
-+(dnmi ret52 "ret52"
-+ (NO-DIS UNCOND-CTI (IDOC BR))
-+ "ret5"
-+ (emit ret5 (f-16-rb5h 30)))
-+
-+
-+(dni jral5 "jump and link with register"
-+ (UNCOND-CTI (IDOC BR) A16)
-+ "jral5 $rb5h"
-+ (+ IFMT_16
-+ F16_OPC_4G11
-+ F16_OPC_4G11_3G5
-+ F16_OPC_4G11_3G5_JRAL5 rb5h)
-+ (sequence ((USI addr))
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID (.str "\t goto JRAL5_interruption;\n")))
-+ ;Used to check whether target instruction address is not half aligned
-+ (c-call VOID "nds32_branch_target_alignment_check" pc rb5h)
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto JRAL5_interruption;\n\n")
-+ (set addr rb5h)
-+ (c-call VOID "link_and_IFC_clear")
-+ (set pc addr))
-+ ((n1hm (unit u-cti))))
-+
-+
-+
-+; group 12 - slt operations
-+(define-full-insn slti45 "slti45"
-+ ((PIPE OS) (IDOC ALU) A16)
-+ "slti45 $rt4,$uimm5h"
-+ (+ IFMT_16 F16_OPC_4G12 F16_OPC_4G12_SLTI45 rt4 uimm5h)
-+ ()
-+ (set (reg h-gr 15) (ltu USI rt4 (zext USI uimm5h)))
-+ ((n1hm (unit u-exec))
-+ )
-+ ;insn-special13 for slti45
-+ ((print "insn-special13"))
-+)
-+
-+(define-full-insn sltsi45 "sltsi45"
-+ ((PIPE OS) (IDOC ALU) A16)
-+ "sltsi45 $rt4,$uimm5h"
-+ (+ IFMT_16 F16_OPC_4G12 F16_OPC_4G12_SLTSI45 rt4 uimm5h)
-+ ()
-+ (set (reg h-gr 15) (lt SI rt4 (zext USI uimm5h)))
-+ ((n1hm (unit u-exec))
-+ )
-+ ;insn-special14 for sltsi45
-+ ((print "insn-special14"))
-+)
-+
-+(dni slt45 "slt45"
-+ ((PIPE OS) (IDOC ALU) A16)
-+ "slt45 $rt4,$rb5h"
-+ (+ IFMT_16 F16_OPC_4G12 F16_OPC_4G12_SLT45 rt4 rb5h)
-+ (set (reg h-gr 15) (ltu USI rt4 rb5h))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+(dni slts45 "slts45"
-+ ((PIPE OS) (IDOC ALU) A16)
-+ "slts45 $rt4,$rb5h"
-+ (+ IFMT_16 F16_OPC_4G12 F16_OPC_4G12_SLTS45 rt4 rb5h)
-+ (set (reg h-gr 15) (lt SI rt4 rb5h))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+
-+;BEQZS8, BNEZS8
-+(define-pmacro (b_zs8-op suffix comp-op opcode )
-+ (begin
-+ (dni (.sym suffix) (.str suffix)
-+ (COND-CTI (IDOC BR) A16)
-+ (.str suffix " $hsdisp8")
-+ (+ IFMT_16 F16_OPC_4G13 (.sym "F16_OPC_4G13_" opcode) hsdisp8)
-+ (sequence ()
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID (.str "\t goto " (.upcase suffix) "_interruption;\n")))
-+ (if (comp-op SI (reg h-gr 15) (const 0))
-+ (sequence ()
-+ (c-code VOID (.str "current_cpu->IFC_clear();\n"))
-+ (set pc hsdisp8))
-+ (nop)))
-+ ((n1hm (unit u-cti))))))
-+
-+(b_zs8-op beqzs8 eq BEQZS8)
-+(b_zs8-op bnezs8 ne BNEZS8)
-+
-+
-+
-+
-+(define-full-insn
-+ break16
-+ "break16"
-+ (UNCOND-CTI (IDOC MISC) A16 (MACH n1h,n1h_v2))
-+ "break16 $swid9"
-+ (+ IFMT_16 F16_OPC_4G13 F16_OPC_4G13_2G1 swid9)
-+ ;FIXME
-+ ()
-+ (sequence ()
-+ (if (c-call USI "nds32_handler_break16" swid9 )
-+ (c-code VOID "goto BREAK16_interruption;\n")))
-+ ((n1hm (unit u-exec (cycles 0))))
-+ ())
-+
-+
-+
-+(dnmi nop16 "nop16"
-+ (NO-DIS (PIPE OS) (IDOC MISC) A16)
-+ "nop16"
-+ (emit srli45 (f-16-rt4 0) (f-16-uimm5 0))
-+)
-+
-+
-+
-+
-diff -Nur binutils-2.24.orig/cgen/cpu/nds16ifc.cpu binutils-2.24/cgen/cpu/nds16ifc.cpu
---- binutils-2.24.orig/cgen/cpu/nds16ifc.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds16ifc.cpu 2016-06-30 21:26:12.629892178 +0200
-@@ -0,0 +1,38 @@
-+; ==============================================================================
-+; Andes NDS32 family Inline Function Call Extension -*- Scheme -*-
-+; Andes Technology Corporation
-+; ==============================================================================
-+; This file is included by nds32.cpu.
-+; ==============================================================================
-+; Instructions
-+; ==============================================================================
-+
-+(dni ifcall9 "16 bits Inline Function Call"
-+ (IFCEXT V3 (MACH n1h_v3))
-+ "ifcall9 $disp9"
-+ (+ IFMT_16 F16_OPC_4G15 F16_OPC_4G15_IFCALL9 disp9)
-+ (sequence()
-+ (if (c-call USI "IFC_mode")
-+ (sequence ()
-+ (if (c-call USI "audio_exception_check")
-+ (c-code VOID "goto IFCALL9_interruption;\n"))
-+ (if (c-code USI "!TEST_H_SR_FLD(PSW, IFCON)")
-+ (sequence ()
-+ (c-code VOID "H_IFC_LP() = GET_H_PC() + 2;\n")
-+ (c-code VOID "SET_H_SR_FLD(PSW, IFCON);\n")
-+ (sequence ()
-+ (c-code VOID "CPU_PUSH_UPDATE_PAIR_USR(current_cpu, 29, H_IFC_LP());\n")
-+ (c-code VOID "CPU_PUSH_UPDATE_PAIR_SR(current_cpu, H_SR_PSW, PRI_GET_H_SR(H_SR_PSW));\n"))
-+ (if (c-code USI "current_cpu->debug.check(DT_TRACE)" )
-+ (sequence ()
-+ (c-code VOID "printf(\" pc=0x%08x regWr(ifc_lp)=0x%08x (ifcall9)\\n\", pc, H_IFC_LP());\n")
-+ (c-code VOID "printf(\" pc=0x%08x regWr(sr)=%d/0x%08x (ifcall9)\\n\", pc, H_SR_PSW, PRI_GET_H_SR(H_SR_PSW));\n")))))
-+ (set pc disp9)))
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu))\n")
-+ (c-code VOID " goto IFCALL9_interruption;\n"))
-+ ())
-+
-+(dnmi ifret16 "16 bits Inline Function Call Return"
-+ (IFCEXT V3 (MACH n1h_v3))
-+ "ifret16"
-+ (emit mov55 (f-16-rt5h 31) (f-16-ra5h 31)))
-diff -Nur binutils-2.24.orig/cgen/cpu/nds16v2.cpu binutils-2.24/cgen/cpu/nds16v2.cpu
---- binutils-2.24.orig/cgen/cpu/nds16v2.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds16v2.cpu 2016-06-30 21:26:12.629892178 +0200
-@@ -0,0 +1,72 @@
-+; ==============================================================================
-+; Andes NDS32 family CPU 16-bit instruction set version 2. -*- Scheme -*-
-+; Andes Technology Corporation
-+; ==============================================================================
-+; This file is included by nds32.cpu.
-+
-+; ==============================================================================
-+; Attributes.
-+; ==============================================================================
-+
-+; ==============================================================================
-+; 16-bit baseline version2 instructions fields
-+; ==============================================================================
-+(df f-16-simm10 "signed immediate 10 bits" () 6 10 INT #f #f) ; imm10s for addi10s
-+
-+
-+
-+; ==============================================================================
-+; Hardware pieces.
-+; ==============================================================================
-+(dnh h-simm10h "signed immediate 10 bits" ()
-+ (immediate (INT 10))
-+ () () ()
-+)
-+
-+; ==============================================================================
-+; declare operands
-+; ==============================================================================
-+(define-operand
-+ (name simm10)
-+ (comment "10 bit signed immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-simm10h)
-+ (index f-16-simm10)
-+ (handlers (parse "slo20"))
-+)
-+
-+
-+(dni addi10.sp "add a sign-extended immediate into the content of stack pointer register(R31)"
-+ (A16V2)
-+ "addi10.sp $simm10"
-+ (+ IFMT_16 F16_OPC_4G13 F16_OPC_4G13_ADDI10S simm10)
-+ (set (reg h-gr (c-code SI "H_GR_SP")) (add (reg h-gr (c-code SI "H_GR_SP")) simm10))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+(dni lwi37.sp "load a 32-bit word from memory into a general register"
-+ (A16V2)
-+ "lwi37.sp $rt3,[+$ulo7w]"
-+ (+ IFMT_16 F16_OPC_4G14 rt3 F16_OPC_4G14_3G_LWI37_SP ulo7w)
-+ (sequence ((SI data))
-+ (set data (mem SI (add (reg h-gr (c-code SI "H_GR_SP")) ulo7w)))
-+ (set rt3 (c-code USI "nds32_baseline_am2gr_handler(current_cpu, tmp_data)")))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+(dni swi37.sp "store a 32-bit word from memory into a general register"
-+ (A16V2)
-+ "swi37.sp $rt3,[+$ulo7w]"
-+ (+ IFMT_16 F16_OPC_4G14 rt3 F16_OPC_4G14_3G_SWI37_SP ulo7w)
-+ (set (mem SI (add (reg h-gr (c-code SI "H_GR_SP")) ulo7w)) rt3)
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+
-+
-+
-+
-+
-diff -Nur binutils-2.24.orig/cgen/cpu/nds16v3.cpu binutils-2.24/cgen/cpu/nds16v3.cpu
---- binutils-2.24.orig/cgen/cpu/nds16v3.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds16v3.cpu 2016-06-30 21:26:12.629892178 +0200
-@@ -0,0 +1,360 @@
-+; ==============================================================================
-+; Andes NDS32 family CPU 16-bit instruction set version 3. -*- Scheme -*-
-+; Andes Technology Corporation
-+; ==============================================================================
-+; This file is included by nds16.cpu.
-+
-+; ==============================================================================
-+; Attributes.
-+; ==============================================================================
-+; (V3) is defined in nds32.cpu
-+
-+; ==============================================================================
-+; 16-bit baseline version2 instructions fields
-+; ==============================================================================
-+
-+; operand fields
-+(dnf f-16-rt5e "rt5e for movd" () 8 4)
-+(dnf f-16-ra5e "ra5e for movd" () 12 4)
-+
-+; immediates
-+(dnf f-16-mask2 "reg list for push25/pop25" () 9 2)
-+(dnf f-16-uimm3_10 "uimm3_10" () 10 3)
-+(df f-16-uimm5d "uimm5d" () 11 5 UINT
-+ ((value pc) (c-code USI "value; if (value&0x7) return BAD_DWOFFSET; else value>>=3"))
-+ ((value pc) (sll USI value (const 3))))
-+(df f-16-uimm6w "uimm6w" () 10 6 UINT
-+ ((value pc) (c-code USI "value; if (value&0x3) return BAD_WOFFSET; else value>>=2"))
-+ ((value pc) (sll USI value (const 2))))
-+(df f-16-suimm5 "special uimm5 for movpi45" () 11 5 UINT
-+ ((value pc) (c-code SI "value; if (value<=47 && value>=16) value = value - 16; else return BAD_SHIFTOFFSET" ))
-+ ((value pc) (add SI value 16)))
-+(df f-16-simm5w "simm5w" () 11 5 UINT
-+ ((value pc) (c-code USI "value; if (value&0x3) return BAD_WOFFSET; else if (value>-4 || value <-128) return BAD_RANGEOFFSET; else value = (128+value) >> 2" ))
-+ ((value pc) (sll USI (sub USI value (const #x20)) (const #x2))))
-+
-+
-+; ==============================================================================
-+; Hardware pieces.
-+; ==============================================================================
-+(dnh h-uimm3_10 "unsigned immediate 3 bits" ()
-+ (immediate (UINT 3))
-+ () () ()
-+)
-+
-+(dnh h-simm5w "negative immediate 5 bits with word alligned" ()
-+ (immediate (INT 5))
-+ () () ()
-+)
-+
-+(dnh h-suimm5 "special 5 bits unsigned immediate for movpi45" ()
-+ (immediate (UINT 6))
-+ () () ()
-+)
-+
-+(dnh h-uimm5d "unsigned immediate 5 bits double word aligned!!" ()
-+ (immediate (UINT 5))
-+ () () ()
-+)
-+
-+(dnh h-uimm6w "unsigned immediate 6 bits" ()
-+ (immediate (UINT 6))
-+ () () ()
-+)
-+
-+(define-hardware
-+ (name h-reglist)
-+ (comment "subtype for PUSH25/POP25")
-+ (type immediate (UINT 2))
-+ (values keyword "" (
-+ ($r6 0) ("#0" 0) ("#0x0" 0) ("0" 0) ("0x0" 0)
-+ ($r8 1) ("#1" 1) ("#0x1" 1) ("1" 1) ("0x1" 1)
-+ ($r10 2) ("#2" 2) ("#0x2" 2) ("2" 2) ("0x2" 2)
-+ ($r14 3) ("#3" 3) ("#0x3" 3) ("3" 3) ("0x3" 3) ))
-+)
-+
-+; These entries list the elements of the mapped 16 even general registers.
-+(define-keyword
-+ (name even-gr-names-16)
-+ (print-name h-even-gr)
-+ (prefix "$")
-+ (values
-+ (r0 0) (a0 0) (h0 0) (o0 0)
-+ (r2 1) (a2 1) (h2 1) (o2 1)
-+ (r4 2) (a4 2) (h4 2) (o4 2)
-+ (r6 3) (s0 3) (h6 3) (o6 3)
-+ (r8 4) (s2 4) (h8 4)
-+ (r10 5) (s4 5) (h10 5)
-+ (r12 6) (s6 6)
-+ (r14 7) (s8 7)
-+ (r16 8) (t0 8) (h12 8)
-+ (r18 9) (t2 9) (h14 9)
-+ (r20 10) (t4 10)
-+ (r22 11) (t6 11)
-+ (r24 12) (t8 12)
-+ (r26 13) (p0 13)
-+ (r28 14) (fp 14) (s9 14)
-+ (r30 15) (lp 15)
-+ )
-+)
-+
-+(define-hardware
-+ (name h-even-gr)
-+ (comment "4-bit general registers for movd")
-+ (attrs PROFILE VIRTUAL )
-+ (type register USI (16))
-+ (indices extern-keyword even-gr-names-16)
-+ (get (regno) (reg SI h-gr regno))
-+ (set (regno newval) (set (reg h-gr regno) newval))
-+)
-+
-+;(define-hardware
-+; (name h-odd-gr)
-+; (comment "4-bit general registers for movd")
-+; (attrs PROFILE VIRTUAL )
-+; (type register USI (16))
-+; (indices extern-keyword even-gr-names-16)
-+; (get (regno) (reg SI h-gr (add regno (const #x1))))
-+; (set (regno newval) (set (reg h-gr (add regno (const #x1))) newval))
-+;)
-+
-+; ==============================================================================
-+; declare operands
-+; ==============================================================================
-+(dnop rt5e "destination register for movd44" () h-even-gr f-16-rt5e)
-+(dnop ra5e "source register for movd44" () h-even-gr f-16-ra5e)
-+(dnop reglist "subtypes for push25/pop25" () h-reglist f-16-mask2)
-+
-+(define-operand
-+ (name uimm3_10)
-+ (comment "3-bit unsigned immediate t2")
-+ (attrs HASH-PREFIX)
-+ (type h-uimm3_10)
-+ (index f-16-uimm3_10)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name simm5w)
-+ (comment "5-bit negative immediate with word alligned")
-+ (attrs HASH-PREFIX)
-+ (type h-simm5w)
-+ (index f-16-simm5w)
-+ (handlers (parse "slo20"))
-+)
-+
-+(define-operand
-+ (name suimm5)
-+ (comment "special 5-bit immediate for movpi45")
-+ (attrs HASH-PREFIX)
-+ (type h-suimm5)
-+ (index f-16-suimm5)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name uimm5d)
-+ (comment "5-bit unsigned immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-uimm5d)
-+ (index f-16-uimm5d)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name uimm6w)
-+ (comment "6-bit unsigned immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-uimm6w)
-+ (index f-16-uimm6w)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+; ==============================================================================
-+; instructions definition
-+; =============================================================================
-+;Bit masking immediate
-+(dni bmski33 "bit masking immediate"
-+ (V3)
-+ "bmski33 $rt3_7,$uimm3_10"
-+ (+ IFMT_16 F16_OPC_4G2 F16_OPC_4G2_2G3 rt3_7 uimm3_10 F16_OPC_4G2_2G3_6G_BMSKI33)
-+ (sequence()
-+ (set rt3_7
-+ (case USI uimm3_10
-+ ((0) (and USI rt3_7 (const #x1)))
-+ ((1) (and USI rt3_7 (const #x2)))
-+ ((2) (and USI rt3_7 (const #x4)))
-+ ((3) (and USI rt3_7 (const #x8)))
-+ ((4) (and USI rt3_7 (const #x10)))
-+ ((5) (and USI rt3_7 (const #x20)))
-+ ((6) (and USI rt3_7 (const #x40)))
-+ (else (and USI rt3_7 (const #x80))))))
-+ ()
-+)
-+
-+
-+
-+;Field extract immediate
-+(dni
-+ fexti33
-+ "field extract immediate"
-+ (V3)
-+ "fexti33 $rt3_7,$uimm3_10"
-+ (+ IFMT_16 F16_OPC_4G2 F16_OPC_4G2_2G3 rt3_7 uimm3_10 F16_OPC_4G2_2G3_6G_FEXTI33)
-+ ;(set rt3_7 (and rt3_7 uimm3_10))
-+ (sequence()
-+ (set rt3_7
-+ (case USI uimm3_10
-+ ((0) (and USI rt3_7 (const #x1)))
-+ ((1) (and USI rt3_7 (const #x3)))
-+ ((2) (and USI rt3_7 (const #x7)))
-+ ((3) (and USI rt3_7 (const #xf)))
-+ ((4) (and USI rt3_7 (const #x1f)))
-+ ((5) (and USI rt3_7 (const #x3f)))
-+ ((6) (and USI rt3_7 (const #x7f)))
-+ (else (and USI rt3_7 (const #xff))))))
-+ ())
-+
-+
-+
-+
-+;Sp based addition (uimm6w is word alligned!!)
-+(dni addri36.sp "sp based addition"
-+ (V3)
-+ "addri36.sp $rt3_7,$uimm6w"
-+ (+ IFMT_16 F16_OPC_4G6 F16_OPC_4G6_ADDRI36_SP rt3_7 uimm6w)
-+ (set rt3_7 (add (reg h-gr (c-code SI "H_GR_SP")) uimm6w))
-+ ()
-+)
-+
-+;Function entry point load (simm5w is negative with word alligned!!)
-+(dni lwi45.fe "fe-relative load"
-+ (V3)
-+ "lwi45.fe $rt4,$simm5w"
-+ (+ IFMT_16 F16_OPC_4G6 F16_OPC_4G6_LWI45_FE rt4 simm5w)
-+ (set rt4 (zext USI (mem USI (add (reg h-gr (c-code SI "H_GR_R8")) simm5w))))
-+ ()
-+)
-+
-+;;Shift left logic
-+;(dni sll33 "shift left logic"
-+; (V3)
-+; "sll33 $rt3_7,$ra3"
-+; (+ IFMT_16 OPC4C_15 OPC4C15_MISC rt3_7 ra3 MISC_SLL33)
-+; (set rt3_7 (sll rt3_7 (and ra3 (const #x1f))))
-+; ()
-+;)
-+
-+;;Shift right logic
-+;(dni srl33 "shift right logic"
-+; (V3)
-+; "srl33 $rt3_7,$ra3"
-+; (+ IFMT_16 OPC4C_15 OPC4C15_MISC rt3_7 ra3 MISC_SRL33)
-+; (set rt3_7 (srl rt3_7 (and ra3 (const #x1f))))
-+; ()
-+;)
-+
-+
-+(define-pmacro (misc33-op name operand)
-+ (begin
-+ (dni (.sym name 33) (.str name 33)
-+ (V3)
-+ (.str name "33 $rt3_7,$ra3")
-+ (+ IFMT_16 F16_OPC_4G15 F16_OPC_4G15_2G3 rt3_7 ra3 (.sym "F16_OPC_4G15_2G3_6G_" (.upcase name) "33"))
-+ (set rt3_7 operand )
-+ ())))
-+
-+(misc33-op neg (sub SI (const #x0) ra3))
-+(misc33-op not (inv ra3))
-+(misc33-op mul (mul rt3_7 ra3))
-+(misc33-op xor (xor rt3_7 ra3))
-+(misc33-op and (and rt3_7 ra3))
-+(misc33-op or (or rt3_7 ra3))
-+
-+
-+;Special move immediate
-+(dni movpi45 "Special move unsigned immediate"
-+ (V3)
-+ "movpi45 $rt4,$suimm5"
-+ (+ IFMT_16 F16_OPC_4G15 F16_OPC_4G15_MOVPI45 rt4 suimm5)
-+ (set rt4 suimm5)
-+ ()
-+)
-+
-+;Complicated Push
-+(define-full-insn push25 "Complicated push for codesize purpose"
-+ (V3)
-+ "push25 $reglist,$uimm5d"
-+ (+ IFMT_16 F16_OPC_4G15 F16_OPC_4G15_3G4 F16_OPC_4G15_3G4_PUSH25 reglist uimm5d)
-+ ()
-+ (sequence()
-+ (c-call VOID "nds32_push25_handler" pc reglist uimm5d)
-+ (c-code VOID (.str " if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n"))
-+ (c-code VOID (.str " DBP_LOCK(current_cpu) = 0;\n"))
-+ (c-code VOID (.str " if (CPU_INT_ARGS_ICODE(current_cpu) != NDS32_ICODE_DNDEB_A)\n"))
-+ (c-code VOID (.str " goto PUSH25_interruption;\n"))
-+ (c-code VOID (.str " }\n")) )
-+ ()
-+((print "insn-push-pop"))
-+ )
-+
-+;Complicated Pop
-+(define-full-insn pop25 "Complicated pop for codesize purpose"
-+ (UNCOND-CTI V3)
-+ "pop25 $reglist,$uimm5d"
-+ (+ IFMT_16 F16_OPC_4G15 F16_OPC_4G15_3G4 F16_OPC_4G15_3G4_POP25 reglist uimm5d)
-+ ()
-+ (sequence()
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID "goto POP25_interruption;\n"))
-+ (c-call VOID "nds32_pop25_handler" pc reglist uimm5d)
-+ (c-code VOID (.str " if (NDS32_HAS_INTERRUPTION(current_cpu))\n"))
-+ (c-code VOID (.str " {\n"))
-+ (c-code VOID (.str " DBP_LOCK(current_cpu) = 0;\n"))
-+ (c-code VOID (.str " if (CPU_INT_ARGS_ICODE(current_cpu) != NDS32_ICODE_DNDEB_A)\n"))
-+ (c-code VOID (.str " goto POP25_interruption;\n"))
-+ (c-code VOID (.str " }\n"))
-+ ;Used to check whether target instruction address is not half aligned
-+ (c-call VOID "nds32_branch_target_alignment_check" pc (reg h-gr (c-code SI "H_GR_LP")))
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto POP25_interruption;\n")
-+ (set pc (reg h-gr (c-code SI "H_GR_LP")))
-+ (c-code VOID "current_cpu->IFC_clear();\n")
-+ )
-+ ()
-+((print "insn-push-pop"))
-+)
-+
-+;move double register
-+(dni movd44 "Move double register"
-+ (V3)
-+ "movd44 $rt5e,$ra5e"
-+ (+ IFMT_16 F16_OPC_4G15 F16_OPC_4G15_MOVD44 rt5e ra5e)
-+ (sequence ()
-+ (c-call VOID "nds32_movd_handler" pc (index-of rt5e) (index-of ra5e))
-+ )
-+ ()
-+)
-+
-+;Add with PC
-+(dni add5.pc "add with pc"
-+ (V3 NOT_V3M)
-+ "add5.pc $rb5h"
-+ (+ IFMT_16
-+ F16_OPC_4G11 F16_OPC_4G11_3G5 F16_OPC_4G11_3G5_ADD5_PC rb5h)
-+ (set rb5h (add pc rb5h))
-+ ()
-+)
-+
-+(define-full-insn
-+ break16v3
-+ "break16"
-+ (UNCOND-CTI (IDOC MISC) A16 (MACH n1h_v3))
-+ "break16 $swid5"
-+ (+ IFMT_16 F16_OPC_4G13 F16_OPC_4G13_3G2 F16_OPC_4G13_3G2_BREAK16 swid5)
-+ ;FIXME
-+ ()
-+ (sequence ()
-+ (if (c-call USI "nds32_handler_break16" swid9 )
-+ (c-code VOID "goto BREAK16_interruption;\n")))
-+ ((n1hm (unit u-exec (cycles 0))))
-+ ())
-diff -Nur binutils-2.24.orig/cgen/cpu/nds32a.cpu binutils-2.24/cgen/cpu/nds32a.cpu
---- binutils-2.24.orig/cgen/cpu/nds32a.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds32a.cpu 2016-06-30 21:26:12.633892334 +0200
-@@ -0,0 +1,2993 @@
-+; ==============================================================================
-+; Andes NDS32 family CPU audio extension -*- Scheme -*-
-+; Andes Technology Corporation
-+; ==============================================================================
-+
-+; ==============================================================================
-+; Instruction fields
-+; ==============================================================================
-+
-+; Physical fields
-+; ---------------
-+
-+(dnf f-32-op2-24-a "2-bit opcode" () 7 2)
-+(dnf f-32-op3-22-a "3-bit opcode" () 9 3)
-+(dnf f-32-op3-am-a "3-bit opcode" () 9 3)
-+
-+(dnf f-32-ra5-a "5-bit index" () 12 5)
-+(dnf f-32-rd5-a "5-bit index" () 12 5)
-+(dnf f-32-res3-19-a "3-bit reserved" () 12 3)
-+(dnf f-32-aridx4-a "4-bit index" () 12 4)
-+(dnf f-32-dh2-16-a "2-bit index" () 15 2)
-+(dnf f-32-res2-16-a "2-bit reserved" () 15 2)
-+(dnf f-32-imm16-a "16-bit immediate" () 16 16)
-+(dnf f-32-rb5-a "5-bit index" () 17 5)
-+(dnf f-32-res5-14-a "5-bit reserved" () 17 5)
-+(dnf f-32-d1-a "1-bit index" () 22 1)
-+(dnf f-32-res1-9-a "1-bit reserved" () 22 1)
-+
-+(dnf f-32-op3-8-a "3-bit opcode" () 23 3)
-+(dnf f-32-op2-8-a "2-bit opcode" () 23 2)
-+(dnf f-32-dh2-6-a "2-bit index" () 25 2)
-+(dnf f-32-op1-5-a "1-bit opcode" () 26 1)
-+(dnf f-32-res1-5-a "1-bit reserved" () 26 1)
-+;(dnf f-32-rc5-a "5-bit index" () 27 5)
-+(dnf f-32-aridx5-a "5-bit index" () 27 5)
-+(dnf f-32-lsbloc-a "5-bit immediate" () 27 5)
-+(dnf f-32-res5-4-a "5-bit reserved" () 27 5)
-+
-+(dnf f-32-rc4-a "4-bit index" () 22 4)
-+
-+(dnf f-32-m2-5-a "2-bit index" () 26 2)
-+(dnf f-32-im1-4-a "1-bit index" () 27 1)
-+(dnf f-32-m2-3-a "2-bit index" () 28 2)
-+(dnf f-32-i2-1-a "2-bit index" () 30 2)
-+
-+(dnf f-32-ra4-19-a "4-bit index" () 12 4)
-+(dnf f-32-c1-15-a "1-bit index" () 16 1)
-+(dnf f-32-rb3-14-a "3-bit index" () 17 3)
-+(dnf f-32-rc2-11-a "2-bit index" () 20 2)
-+(dnf f-32-rc1-5-a "1-bit index" () 26 1)
-+
-+; Virtual fields
-+; --------------
-+
-+(define-multi-ifield
-+ (name f-32-rc5_0-a)
-+ (comment "general register index of rc")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-32-rc4-a)
-+ (insert (set (ifield f-32-rc4-a) (srl (ifield f-32-rc5_0-a) (const 1))))
-+ (extract (set (ifield f-32-rc5_0-a) (sll (ifield f-32-rc4-a) (const 1))))
-+)
-+
-+(define-multi-ifield
-+ (name f-32-rc5_1-a)
-+ (comment "general register index of rc+1")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-32-rc4-a)
-+ (insert (sequence ()
-+ (c-code VOID "if((FLD(f_32_rc5_1_a) >> 1) != FLD(f_32_rc4_a)) {\n")
-+ (c-code VOID "static char msg[100];\n")
-+ (c-code VOID "sprintf(msg, \"Rte+1 index does not equal Rte index plus 1\");\n")
-+ (c-code VOID "errmsg = msg;\n")
-+ (c-code VOID "break;}")
-+ ))
-+ (extract (set (ifield f-32-rc5_1-a) (or (sll (ifield f-32-rc4-a) (const 1)) (const #x1))))
-+)
-+
-+(define-multi-ifield
-+ (name f-32-im5-i-a)
-+ (comment "index register index of single memory access")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-32-im1-4-a f-32-i2-1-a)
-+ (insert (sequence ()
-+ (set (ifield f-32-im1-4-a) (srl (ifield f-32-im5-i-a) (const 2)))
-+ (set (ifield f-32-i2-1-a) (and (ifield f-32-im5-i-a) (const #x3)))
-+ ))
-+ (extract (set (ifield f-32-im5-i-a) (or (sll (ifield f-32-im1-4-a) (const 2)) (ifield f-32-i2-1-a))))
-+)
-+
-+(define-multi-ifield
-+ (name f-32-im5-m-a)
-+ (comment "modification register index of single memory access")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-32-im1-4-a f-32-m2-3-a)
-+ (insert (sequence ()
-+ (c-code VOID "if((FLD(f_32_im5_m_a) >> 2) == FLD(f_32_im1_4_a)) {\n")
-+ (set (ifield f-32-m2-3-a) (and (ifield f-32-im5-m-a) (const #x3)))
-+ (c-code VOID "} else {\n")
-+ (c-code VOID "static char msg[100];\n")
-+ (c-code VOID "sprintf(msg, \"invalid (Ip,Mr) pair\");\n")
-+ (c-code VOID "errmsg = msg;\n")
-+ (c-code VOID "break;}")
-+ ))
-+ (extract (set (ifield f-32-im5-m-a) (or (sll (ifield f-32-im1-4-a) (const 2)) (ifield f-32-m2-3-a))))
-+)
-+
-+;(define-multi-ifield
-+; (name f-32-rc5p-a)
-+; (comment "prevent rc5 from equaling rd5")
-+; (attrs)
-+; (mode UINT)
-+; (subfields f-32-rc5-a)
-+; (insert (sequence ()
-+; (c-code VOID "if(FLD(f_32_rc5p_a) != FLD(f_32_rd5_a)) {\n")
-+; (set (ifield f-32-rc5-a) (ifield f-32-rc5p-a))
-+; (c-code VOID "} else {\n")
-+; (c-code VOID "static char msg[100];\n")
-+; (c-code VOID "sprintf(msg, \"Rd and Rc cannot be the same\");\n")
-+; (c-code VOID "errmsg = msg;\n")
-+; (c-code VOID "break;}")
-+; ))
-+; (extract (set (ifield f-32-rc5p-a) (ifield f-32-rc5-a)))
-+;)
-+
-+(define-multi-ifield
-+ (name f-32-rb5p-a)
-+ (comment "prevent rb5 from equaling ra5")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-32-rb5-a)
-+ (insert (sequence ()
-+ (c-code VOID "if(FLD(f_32_rb5p_a) != FLD(f_32_ra5_a)) {\n")
-+ (set (ifield f-32-rb5-a) (ifield f-32-rb5p-a))
-+ (c-code VOID "} else {\n")
-+ (c-code VOID "static char msg[100];\n")
-+ (c-code VOID "sprintf(msg, \"destination registers cannot be the same\");\n")
-+ (c-code VOID "errmsg = msg;\n")
-+ (c-code VOID "break;}")
-+ ))
-+ (extract (set (ifield f-32-rb5p-a) (ifield f-32-rb5-a)))
-+)
-+
-+(define-multi-ifield
-+ (name f-32-im6-i_0-a)
-+ (comment "index register index of double memory access")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-32-i2-1-a)
-+ (insert (set (ifield f-32-i2-1-a) (ifield f-32-im6-i_0-a)))
-+ (extract (set (ifield f-32-im6-i_0-a) (ifield f-32-i2-1-a)))
-+)
-+
-+(define-multi-ifield
-+ (name f-32-im6-i_1-a)
-+ (comment "index register index of double memory access")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-32-i2-1-a)
-+ (insert (sequence ()
-+ (c-code VOID "if((FLD(f_32_im6_i_1_a) & 0x3) != FLD(f_32_i2_1_a)) {\n")
-+ (c-code VOID "static char msg[100];\n")
-+ (c-code VOID "sprintf(msg, \"invalid (Ip,Iq) pair\");\n")
-+ (c-code VOID "errmsg = msg;\n")
-+ (c-code VOID "break;}")
-+ ))
-+ (extract (set (ifield f-32-im6-i_1-a) (or (ifield f-32-i2-1-a) (const #x4))))
-+)
-+
-+(define-multi-ifield
-+ (name f-32-im6-m_0-a)
-+ (comment "modification register index of double memory access")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-32-m2-3-a)
-+ (insert (set (ifield f-32-m2-3-a) (ifield f-32-im6-m_0-a)))
-+ (extract (set (ifield f-32-im6-m_0-a) (ifield f-32-m2-3-a)))
-+)
-+
-+(define-multi-ifield
-+ (name f-32-im6-m_1-a)
-+ (comment "modification register index of double memory access")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-32-m2-5-a)
-+ (insert (set (ifield f-32-m2-5-a) (and (ifield f-32-im6-m_1-a) (const #x3))))
-+ (extract (set (ifield f-32-im6-m_1-a) (or (ifield f-32-m2-5-a) (const #x4))))
-+)
-+
-+(define-multi-ifield
-+ (name f-32-r10a5-a)
-+ (comment "general register index of AMXXXL.l/AMXXXL2.l")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-32-ra4-19-a)
-+ (insert (set (ifield f-32-ra4-19-a) (ifield f-32-r10a5-a)))
-+ (extract (set (ifield f-32-r10a5-a) (ifield f-32-ra4-19-a)))
-+)
-+
-+(define-multi-ifield
-+ (name f-32-r10b5-a)
-+ (comment "general register index of AMXXXL.l/AMXXXL2.l")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-32-c1-15-a f-32-rb3-14-a)
-+ (insert (sequence ()
-+ (set (ifield f-32-c1-15-a) (srl (ifield f-32-r10b5-a) (const 3)))
-+ (set (ifield f-32-rb3-14-a) (and (ifield f-32-r10b5-a) (const #x7)))
-+ ))
-+ (extract (set (ifield f-32-r10b5-a) (or (sll (ifield f-32-c1-15-a) (const 3)) (ifield f-32-rb3-14-a))))
-+)
-+
-+(define-multi-ifield
-+ (name f-32-r10c5-a)
-+ (comment "general register index of AMXXXL.l")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-32-c1-15-a f-32-rc2-11-a f-32-rc1-5-a)
-+ (insert (sequence ()
-+ (c-code VOID "if((FLD(f_32_r10c5_a) >> 3) == FLD(f_32_c1_15_a)) {\n")
-+ (set (ifield f-32-rc2-11-a) (and (srl (ifield f-32-r10c5-a) (const 1)) (const #x3)))
-+ (set (ifield f-32-rc1-5-a) (and (ifield f-32-r10c5-a) (const #x1)))
-+ (c-code VOID "} else {\n")
-+ (c-code VOID "static char msg[100];\n")
-+ (c-code VOID "sprintf(msg, \"invalid (Rb,Rt) pair\");\n")
-+ (c-code VOID "errmsg = msg;\n")
-+ (c-code VOID "break;}")
-+ ))
-+ (extract (set (ifield f-32-r10c5-a) (or (or (sll (ifield f-32-c1-15-a) (const 3)) (sll (ifield f-32-rc2-11-a) (const 1))) (ifield f-32-rc1-5-a))))
-+)
-+
-+(define-multi-ifield
-+ (name f-32-r10c5_0-a)
-+ (comment "general register index of rc for AMXXXL2.l")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-32-c1-15-a f-32-rc2-11-a)
-+ (insert (sequence ()
-+ (c-code VOID "if((FLD(f_32_r10c5_0_a) >> 3) == FLD(f_32_c1_15_a)) {\n")
-+ (set (ifield f-32-rc2-11-a) (and (srl (ifield f-32-r10c5_0-a) (const 1)) (const #x3)))
-+ (c-code VOID "} else {\n")
-+ (c-code VOID "static char msg[100];\n")
-+ (c-code VOID "sprintf(msg, \"invalid (Rb,Rte/Rte+1) pair\");\n")
-+ (c-code VOID "errmsg = msg;\n")
-+ (c-code VOID "break;}")
-+ ))
-+ (extract (set (ifield f-32-r10c5_0-a) (or (sll (ifield f-32-c1-15-a) (const 3)) (sll (ifield f-32-rc2-11-a) (const 1)))))
-+)
-+
-+(define-multi-ifield
-+ (name f-32-r10c5_1-a)
-+ (comment "general register index of rc+1 for AMXXXL2.l")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-32-c1-15-a f-32-rc2-11-a)
-+ (insert (sequence ()
-+ (c-code VOID "if((FLD(f_32_r10c5_1_a) >> 1) != ((FLD(f_32_c1_15_a) << 2) | FLD(f_32_rc2_11_a))) {\n")
-+ (c-code VOID "static char msg[100];\n")
-+ (c-code VOID "sprintf(msg, \"Rte+1 index does not equal Rte index plus 1\");\n")
-+ (c-code VOID "errmsg = msg;\n")
-+ (c-code VOID "break;}")
-+ ))
-+ (extract (set (ifield f-32-r10c5_1-a) (or (or (sll (ifield f-32-c1-15-a) (const 3)) (sll (ifield f-32-rc2-11-a) (const 1))) (const #x1))))
-+)
-+
-+; ==============================================================================
-+; Instruction field enums
-+; ==============================================================================
-+
-+(define-normal-insn-enum insn32-op2-24-a "bit 24-23 opcode enums" () AOP2_24_ f-32-op2-24-a
-+ ("0" "1" "2" "3")
-+)
-+
-+(define-normal-insn-enum insn32-op3-22-a "bit 22-20 opcode enums" () AOP3_22_ f-32-op3-22-a
-+ ("0" "1" "2" "3" "4" "5" "6" "7")
-+)
-+
-+(define-normal-insn-enum insn32-op3-am-a "bit 22-20 opcode enums" () AM_ f-32-op3-am-a
-+ ("AMADD" "AMSUB" "AMULT" "3" "AMADDS" "AMSUBS" "AMULTS" "AMNEGS"
-+ ("AMABB" 0) ("AMABT" 1) ("AMATB" 2) ("AMATT" 3)
-+ ("AMBB" 4) ("AMBT" 5) ("AMTB" 6) ("AMTT" 7)
-+ ("AMAWB" 4) ("AMAWT" 5) ("AMWB" 6) ("AMWT" 7)
-+ )
-+)
-+
-+(define-normal-insn-enum insn32-op3-8-a "bit 8-6 opcode enums" () AOP3_8_ f-32-op3-8-a
-+ ("0" "1" "2" "3" "4" "5" "6" "7")
-+)
-+
-+(define-normal-insn-enum insn32-op2-8-a "bit 8-7 opcode enums" () AOP2_8_ f-32-op2-8-a
-+ ("0" "1" "2" "3")
-+)
-+
-+(define-normal-insn-enum insn32-op1-5-a "bit 5 opcode enums" () AOP1_5_ f-32-op1-5-a
-+ ("0" "1")
-+)
-+
-+(define-normal-insn-enum insn32-res5-4-a "bit 5- 4 reserved enums" () ARES5_4_ f-32-res5-4-a
-+ ("0" "1" "2")
-+)
-+
-+(define-normal-insn-enum insn32-res1-9-a "bit 1- 9 reserved enums" () ARES1_9_ f-32-res1-9-a
-+ ("0" "1")
-+)
-+
-+(define-pmacro (res-field-a length start end)
-+ (define-normal-insn-enum (.sym "insn32-res" length "-" start "-a") (.str "bit " start "-" end " reserved enums") () (.sym "ARES" length "_" start "_") (.sym "f-32-res" length "-" start "-a") ("0"))
-+)
-+
-+(res-field-a 3 19 17)
-+(res-field-a 2 16 15)
-+(res-field-a 5 14 10)
-+
-+(define-normal-insn-enum insn32-fake5-4-a "bit 4-0 fake opcode enums" () AFAKE5_4_ f-32-res5-4-a
-+ ("0" "1")
-+)
-+
-+; ==============================================================================
-+; Hardware pieces
-+; ==============================================================================
-+
-+; Physical hardware
-+; -----------------
-+
-+(define-hardware
-+ (name h-ar-i)
-+ (comment "index register")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register UHI (8))
-+ (indices keyword "$" ((i0 0) (i1 1) (i2 2) (i3 3) (i4 4) (i5 5) (i6 6) (i7 7)))
-+)
-+
-+(define-hardware
-+ (name h-ar-m)
-+ (comment "modification register")
-+ (attrs PROFILE)
-+ (type register HI (8))
-+ (indices keyword "$" ((m0 0) (m1 1) (m2 2) (m3 3) (m4 4) (m5 5) (m6 6) (m7 7)))
-+ (get (regno) (case HI regno
-+ ((0) (const #x0))
-+ ((4) (const #x1))
-+ (else (raw-reg h-ar-m regno)))
-+ )
-+ (set (regno newval) (case VOID regno
-+ ((0) (set (raw-reg h-ar-m regno) (const #x0)))
-+ ((4) (set (raw-reg h-ar-m regno) (const #x1)))
-+ (else (set (raw-reg h-ar-m regno) newval)))
-+ )
-+)
-+
-+(dnh h-ar-mod "mode selection register" ()
-+ (register (UINT 6))
-+ () () ()
-+)
-+
-+(dnh h-conf-ar-mod "configured mode selection register" ()
-+ (register (UINT 6))
-+ () () ()
-+)
-+
-+(dnh h-wtmsk-ar-mod "write mask value for mode selection register" ()
-+ (register (UINT 6))
-+ () () ()
-+)
-+
-+(dnh h-ar-adm-vbase "virtual Ix base address" ()
-+ (register USI)
-+ () () ()
-+)
-+
-+(dnh h-conf-ar-adm-vbase "configured virtual Ix base address" ()
-+ (register USI)
-+ () () ()
-+)
-+
-+(dnh h-wtmsk-ar-adm-vbase "write mask value for virtual Ix base address" ()
-+ (register USI)
-+ () () ()
-+)
-+
-+(dnh h-ar-lb "zero overhead loop begin register" ()
-+ (register USI)
-+ () () ()
-+)
-+
-+(dnh h-ar-le "zero overhead loop end register" ()
-+ (register USI)
-+ () () ()
-+)
-+
-+(dnh h-ar-lc "zero overhead loop count register" ()
-+ (register UHI)
-+ () () ()
-+)
-+
-+
-+(dnh h-ar-cb-ctl "circular buffer control and selection for Ix registers" ()
-+ (register USI)
-+ () () ()
-+)
-+
-+(dnh h-wtmsk-ar-cb-ctl "write mask value for circular buffer control and selection for Ix registers" ()
-+ (register USI)
-+ () () ()
-+)
-+
-+(define-hardware
-+ (name h-ar-shft-ctl)
-+ (comment "multipliation shift control register")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register (UINT 6) (2))
-+ (indices keyword "$" ((shft_ctl0 0) (shft_ctl1 1)))
-+)
-+
-+(dnh h-wtmsk-ar-shft-ctl "write mask value for multiplication shift control register" ()
-+ (register USI)
-+ () () ()
-+)
-+
-+(define-hardware
-+ (name h-ar-cbb)
-+ (comment "circular buffer starting word address")
-+ (attrs PROFILE)
-+ (type register UHI (4))
-+ (indices keyword "$" ((cbb0 0) (cbb1 1) (cbb2 2) (cbb3 3)))
-+)
-+
-+(dnh h-wtmsk-ar-cbb "write mask value for circular buffer starting word address" ()
-+ (register USI)
-+ () () ()
-+)
-+
-+(define-hardware
-+ (name h-ar-cbe)
-+ (comment "circular buffer inclusive ending address")
-+ (attrs PROFILE )
-+ (type register UHI (4))
-+ (indices keyword "$" ((cbe0 0) (cbe1 1) (cbe2 2) (cbe3 3)))
-+)
-+
-+(dnh h-wtmsk-ar-cbe "write mask value for circular buffer inclusive ending address" ()
-+ (register USI)
-+ () () ()
-+)
-+
-+(define-hardware
-+ (name h-accum-l24)
-+ (comment "accumulation low 24-bits registers")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register (UINT 24) (2))
-+ (values keyword "$" ((d0.l24 0) (d1.l24 1)))
-+)
-+
-+; Virtual hardware
-+; ----------------
-+
-+(define-hardware
-+ (name h-gr-even)
-+ (comment "general register with even index")
-+ (attrs PROFILE VIRTUAL)
-+ (type register USI (16))
-+ (indices keyword "$" ((p0 26) (fp 28) (lp 30)
-+ (r0 0) (r2 2) (r4 4) (r6 6) (r8 8) (r10 10) (r12 12) (r14 14)
-+ (r16 16) (r18 18) (r20 20) (r22 22) (r24 24) (r26 26) (r28 28) (r30 30)
-+ (a0 0) (a2 2) (a4 4) (s0 6) (s2 8) (s4 10) (s6 12) (s8 14)
-+ (t0 16) (t2 18) (t4 20) (t6 22) (t8 24) (s9 28)))
-+ (get (regno) (raw-reg h-gr regno))
-+ (set (regno newval) (set (raw-reg h-gr regno) newval))
-+)
-+
-+(define-hardware
-+ (name h-gr-odd)
-+ (comment "general register with odd index")
-+ (attrs PROFILE VIRTUAL)
-+ (type register USI (16))
-+ (indices keyword "$" ((p1 27) (gp 29) (sp 31)
-+ (r1 1) (r3 3) (r5 5) (r7 7) (r9 9) (r11 11) (r13 13) (r15 15)
-+ (r17 17) (r19 19) (r21 21) (r23 23) (r25 25) (r27 27) (r29 29) (r31 31)
-+ (a1 1) (a3 3) (a5 5) (s1 7) (s3 9) (s5 11) (s7 13) (ta 15)
-+ (t1 17) (t3 19) (t5 21) (t7 23) (t9 25)))
-+ (get (regno) (reg h-gr regno))
-+ (set (regno newval) (set (reg h-gr regno) newval))
-+)
-+
-+(define-hardware
-+ (name h-gr-lo)
-+ (comment "general register with index less than 16")
-+ (attrs PROFILE VIRTUAL)
-+ (type register USI (16))
-+ (indices keyword "$" ((r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)
-+ (r8 8) (r9 9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14) (r15 15)
-+ (a0 0) (a1 1) (a2 2) (a3 3) (a4 4) (a5 5) (s0 6) (s1 7)
-+ (s2 8) (s3 9) (s4 10) (s5 11) (s6 12) (s7 13) (s8 14) (ta 15)))
-+ (get (regno) (raw-reg h-gr regno))
-+ (set (regno newval) (set (raw-reg h-gr regno) newval))
-+)
-+
-+(define-hardware
-+ (name h-gr-lo-even)
-+ (comment "general register with index less than 16 and even")
-+ (attrs PROFILE VIRTUAL)
-+ (type register USI (8))
-+ (indices keyword "$" ((r0 0) (r2 2) (r4 4) (r6 6) (r8 8) (r10 10) (r12 12) (r14 14)
-+ (a0 0) (a2 2) (a4 4) (s0 6) (s2 8) (s4 10) (s6 12) (s8 14)))
-+ (get (regno) (raw-reg h-gr regno))
-+ (set (regno newval) (set (raw-reg h-gr regno) newval))
-+)
-+
-+(define-hardware
-+ (name h-gr-lo-odd)
-+ (comment "general register with index less than 16 and odd")
-+ (attrs PROFILE VIRTUAL)
-+ (type register USI (8))
-+ (indices keyword "$" ((r1 1) (r3 3) (r5 5) (r7 7) (r9 9) (r11 11) (r13 13) (r15 15)
-+ (a1 1) (a3 3) (a5 5) (s1 7) (s3 9) (s5 11) (s7 13) (ta 15)))
-+ (get (regno) (raw-reg h-gr regno))
-+ (set (regno newval) (set (raw-reg h-gr regno) newval))
-+)
-+
-+(define-hardware
-+ (name h-ar-accum)
-+ (comment "accumulation register")
-+ (attrs PROFILE VIRTUAL)
-+ (type register UDI (2))
-+ (indices keyword "$" ((d0 0) (d1 1)))
-+ (get (regno) (case UDI (c-code USI "((GET_MSC_CFG_AUDIO(H_SR_REG(MSC_CFG)) == 2) || ((GET_MSC_CFG_AUDIO(H_SR_REG(MSC_CFG)) == 3) && TEST_MOD_B24(CPU(h_ar_mod))))")
-+ ((1) (or (zext UDI (reg h-accum-l24 regno)) (sll (zext UDI (reg h-accum-hl (or (sll regno (const 1)) (const #x1)))) (const 24))))
-+ (else (or (zext UDI (reg h-accum-hl (sll regno (const 1)))) (sll (zext UDI (reg h-accum-hl (or (sll regno (const 1)) (const #x1)))) (const 32)))))
-+ )
-+ (set (regno newval) (case VOID (c-code USI "((GET_MSC_CFG_AUDIO(H_SR_REG(MSC_CFG)) == 2) || ((GET_MSC_CFG_AUDIO(H_SR_REG(MSC_CFG)) == 3) && TEST_MOD_B24(CPU(h_ar_mod))))")
-+ ((1) (sequence ()
-+ (set (reg h-accum-l24 regno) (and newval (const #xffffff)))
-+ (set (reg h-accum-hl (or (sll regno (const 1)) (const #x1))) (srl newval (const 24)))))
-+ (else (sequence ()
-+ (set (reg h-accum-hl (sll regno (const 1))) newval)
-+ (set (reg h-accum-hl (or (sll regno (const 1)) (const #x1))) (srl newval (const 32))))))
-+ )
-+)
-+
-+(define-hardware
-+ (name h-ar-accum1)
-+ (comment "accumulation register")
-+ (attrs PROFILE VIRTUAL)
-+ (type register USI (4))
-+ (indices keyword "$" ((d0.hi 1) (d1.hi 3) (d0.lo 0) (d0.l24 0) (d1.lo 2) (di.l24 2)))
-+ (get (regno)
-+ (case USI regno
-+ ((1)
-+ (reg h-accum-hl regno))
-+ ((3)
-+ (reg h-accum-hl regno))
-+ ((0)
-+ (case USI (c-code USI "((GET_MSC_CFG_AUDIO(H_SR_REG(MSC_CFG)) == 2) || ((GET_MSC_CFG_AUDIO(H_SR_REG(MSC_CFG)) == 3) && TEST_MOD_B24(CPU(h_ar_mod))))")
-+ ((1)
-+ (zext USI (reg h-accum-l24 regno)))
-+ (else
-+ (reg h-accum-hl regno))))
-+ (else
-+ (case USI (c-code USI "((GET_MSC_CFG_AUDIO(H_SR_REG(MSC_CFG)) == 2) || ((GET_MSC_CFG_AUDIO(H_SR_REG(MSC_CFG)) == 3) && TEST_MOD_B24(CPU(h_ar_mod))))")
-+ ((1)
-+ (zext USI (reg h-accum-l24 (srl regno (const #x1)))))
-+ (else
-+ (reg h-accum-hl regno))))))
-+
-+ (set (regno newval)
-+ (case VOID regno
-+ ((0)
-+ (case VOID (c-code USI "((GET_MSC_CFG_AUDIO(H_SR_REG(MSC_CFG)) == 2) || ((GET_MSC_CFG_AUDIO(H_SR_REG(MSC_CFG)) == 3) && TEST_MOD_B24(CPU(h_ar_mod))))")
-+ ((1)
-+ (set (reg h-accum-l24 regno) (and newval (const #xffffff))))
-+ (else
-+ (set (reg h-accum-hl regno) newval))))
-+ ((2)
-+ (case VOID (c-code USI "((GET_MSC_CFG_AUDIO(H_SR_REG(MSC_CFG)) == 2) || ((GET_MSC_CFG_AUDIO(H_SR_REG(MSC_CFG)) == 3) && TEST_MOD_B24(CPU(h_ar_mod))))")
-+ ((1)
-+ (set (reg h-accum-l24 (srl regno (const #x1))) (and newval (const #xffffff))))
-+ (else
-+ (set (reg h-accum-hl regno) newval))))
-+ (else
-+ (set (reg h-accum-hl regno) newval))))
-+)
-+
-+(define-hardware
-+ (name h-gr-bottom)
-+ (comment "source register for bottom 16-bit data")
-+ (attrs PROFILE VIRTUAL)
-+ (type register USI (32))
-+ (indices extern-keyword gr-names)
-+ (get (regno) (sra (sll (reg h-gr regno) (const 16)) (const 16)))
-+ (set (regno newval) (set (reg h-gr regno) newval))
-+)
-+
-+(define-hardware
-+ (name h-gr-top)
-+ (comment "source register for top 16-bit data")
-+ (attrs PROFILE VIRTUAL)
-+ (type register USI (32))
-+ (indices extern-keyword gr-names)
-+ (get (regno) (sra (reg h-gr regno) (const 16)))
-+ (set (regno newval) (set (reg h-gr regno) newval))
-+)
-+
-+(define-hardware
-+ (name h-gr-lo-bottom)
-+ (comment "general register with index less than 16 and bottom 16-bit data")
-+ (attrs PROFILE VIRTUAL)
-+ (type register USI (16))
-+ (indices keyword "$" ((r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)
-+ (r8 8) (r9 9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14) (r15 15)
-+ (a0 0) (a1 1) (a2 2) (a3 3) (a4 4) (a5 5) (s0 6) (s1 7)
-+ (s2 8) (s3 9) (s4 10) (s5 11) (s6 12) (s7 13) (s8 14) (ta 15)))
-+ (get (regno) (sra (sll (raw-reg h-gr regno) (const 16)) (const 16)))
-+ (set (regno newval) (set (raw-reg h-gr regno) newval))
-+)
-+
-+(define-hardware
-+ (name h-gr-lo-top)
-+ (comment "general register with index less than 16 and top 16-bit data")
-+ (attrs PROFILE VIRTUAL)
-+ (type register USI (16))
-+ (indices keyword "$" ((r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)
-+ (r8 8) (r9 9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14) (r15 15)
-+ (a0 0) (a1 1) (a2 2) (a3 3) (a4 4) (a5 5) (s0 6) (s1 7)
-+ (s2 8) (s3 9) (s4 10) (s5 11) (s6 12) (s7 13) (s8 14) (ta 15)))
-+ (get (regno) (sra (raw-reg h-gr regno) (const 16)))
-+ (set (regno newval) (set (raw-reg h-gr regno) newval))
-+)
-+
-+(define-hardware
-+ (name h-ar-i-lo)
-+ (comment "index register i0~i3")
-+ (attrs PROFILE VIRTUAL)
-+ (type register UHI (4))
-+ (indices keyword "$" ((i0 0) (i1 1) (i2 2) (i3 3)))
-+ (get (regno) (reg h-ar-i regno))
-+ (set (regno newval) (set (reg h-ar-i regno) newval))
-+)
-+
-+(define-hardware
-+ (name h-ar-i-hi)
-+ (comment "index register i4~i7")
-+ (attrs PROFILE VIRTUAL)
-+ (type register UHI (4))
-+ (indices keyword "$" ((i4 4) (i5 5) (i6 6) (i7 7)))
-+ (get (regno) (reg h-ar-i regno))
-+ (set (regno newval) (set (reg h-ar-i regno) newval))
-+)
-+
-+(define-hardware
-+ (name h-ar-m-lo)
-+ (comment "modification register m0~m3")
-+ (attrs PROFILE VIRTUAL)
-+ (type register HI (4))
-+ (indices keyword "$" ((m0 0) (m1 1) (m2 2) (m3 3)))
-+ (get (regno) (reg h-ar-m regno))
-+ (set (regno newval) (set (reg h-ar-m regno) newval))
-+)
-+
-+(define-hardware
-+ (name h-ar-m-hi)
-+ (comment "modification register m4~m7")
-+ (attrs PROFILE VIRTUAL)
-+ (type register HI (4))
-+ (indices keyword "$" ((m4 4) (m5 5) (m6 6) (m7 7)))
-+ (get (regno) (reg h-ar-m regno))
-+ (set (regno newval) (set (reg h-ar-m regno) newval))
-+)
-+
-+; Immediate value
-+; ---------------
-+
-+(dnh h-ai-imm16 "16-bit immediate value" ()
-+ (immediate UHI)
-+ () () ()
-+)
-+
-+(dnh h-ai-lsbloc "5-bit immediate value" ()
-+ (immediate (UINT 5))
-+ () () ()
-+)
-+
-+(dnh h-ai-rc4 "rc/rc+1 general register index" ()
-+ (immediate (UINT 4))
-+ () () ()
-+)
-+
-+(dnh h-ai-m2-5 "im6 modification register index" ()
-+ (immediate (UINT 2))
-+ () () ()
-+)
-+
-+(dnh h-ai-im1-4 "im5 i&m register common index" ()
-+ (immediate (UINT 1))
-+ () () ()
-+)
-+
-+(dnh h-ai-m2-3 "im5/im6 modification register index" ()
-+ (immediate (UINT 2))
-+ () () ()
-+)
-+
-+(dnh h-ai-i2-1 "im5/im6 index register index" ()
-+ (immediate (UINT 2))
-+ () () ()
-+)
-+
-+(dnh h-ai-c1-15 "general register index of AMXXXL.l/AMXXXL2.l" ()
-+ (immediate (UINT 1))
-+ () () ()
-+)
-+
-+(dnh h-ai-ra4-19 "general register index of AMXXXL.l/AMXXXL2.l" ()
-+ (immediate (UINT 4))
-+ () () ()
-+)
-+
-+(dnh h-ai-rb3-14 "general register index of AMXXXL.l/AMXXXL2.l" ()
-+ (immediate (UINT 3))
-+ () () ()
-+)
-+
-+(dnh h-ai-rc2-11 "general register index of AMXXXL.l/AMXXXL2.l" ()
-+ (immediate (UINT 2))
-+ () () ()
-+)
-+
-+(dnh h-ai-rc1-5 "general register index of AMXXXL.l" ()
-+ (immediate (UINT 1))
-+ () () ()
-+)
-+
-+(define-hardware
-+ (name h-ai-aridx4)
-+ (comment "audio extension register index")
-+ (type immediate (UINT 4))
-+ (values keyword "$" ((i0 0) (i1 1) (i2 2) (i3 3)
-+ (i4 4) (i5 5) (i6 6) (i7 7)
-+ (mod 8) (m1 9) (m2 10) (m3 11)
-+ (m4 12) (m5 13) (m6 14) (m7 15)))
-+)
-+
-+(define-hardware
-+ (name h-ai-aridx5)
-+ (comment "audio extension register index")
-+ (type immediate (UINT 5))
-+ (values keyword "$" ((i0 0) (i1 1) (i2 2) (i3 3)
-+ (i4 4) (i5 5) (i6 6) (i7 7)
-+ (mod 8) (m1 9) (m2 10) (m3 11)
-+ (m5 13) (m6 14) (m7 15)
-+ (d0.l24 16) (d1.l24 17)
-+ (shft_ctl0 18) (shft_ctl1 19)
-+ (lb 24) (le 25) (lc 26) (adm_vbase 27)
-+ ("0" 0) ("1" 1) ("2" 2) ("3" 3)
-+ ("4" 4) ("5" 5) ("6" 6) ("7" 7)
-+ ("8" 8) ("9" 9) ("10" 10) ("11" 11)
-+ ("13" 13) ("14" 14) ("15" 15)
-+ ("16" 16) ("17" 17)
-+ ("18" 18) ("19" 19)
-+ ("24" 24) ("25" 25) ("26" 26) ("27" 27)))
-+)
-+
-+(define-hardware
-+ (name h-ai-ar2idx5)
-+ (comment "audio extension register 2 index")
-+ (type immediate (UINT 5))
-+ (values keyword "$" ((cbb0 0) (cbb1 1) (cbb2 2) (cbb3 3)
-+ (cbe0 4) (cbe1 5) (cbe2 6) (cbe3 7)
-+ (cb_ctl 31)
-+ ("0" 0) ("1" 1) ("2" 2) ("3" 3)
-+ ("4" 4) ("5" 5) ("6" 6) ("7" 7)
-+ ("31" 31)))
-+)
-+; ==============================================================================
-+; Opcode operands
-+; ==============================================================================
-+
-+(dnop ra5_a "source register a" () h-gr f-32-ra5-a)
-+(dnop ra5_a_b "source register a for bottom 16-bit data" () h-gr-bottom f-32-ra5-a)
-+(dnop ra5_a_t "source register a for top 16-bit data" () h-gr-top f-32-ra5-a)
-+(dnop rd5_a "destination register d" () h-gr f-32-rd5-a)
-+(dnop aridx4_a "audio extension register index" () h-ai-aridx4 f-32-aridx4-a)
-+(dnop dh2_16_a "accumulator high/low index" () h-ar-accum1 f-32-dh2-16-a)
-+(dnop rb5_a "source register b" () h-gr f-32-rb5-a)
-+(dnop rb5_a_b "source register b for bottom 16-bit data" () h-gr-bottom f-32-rb5-a)
-+(dnop rb5_a_t "source register b for top 16-bit data" () h-gr-top f-32-rb5-a)
-+(dnop rb5p_a "source register b" () h-gr f-32-rb5p-a)
-+(dnop rb5p_a_b "source register b for bottom 16-bit data" () h-gr-bottom f-32-rb5p-a)
-+(dnop rb5p_a_t "source register b for top 16-bit data" () h-gr-top f-32-rb5p-a)
-+(dnop d1_a "accumulator index" () h-ar-accum f-32-d1-a)
-+(dnop dh2_6_a "accumulator high/low index" () h-accum-hl f-32-dh2-6-a)
-+;(dnop rc5_a "source register c" () h-gr f-32-rc5-a)
-+;(dnop rc5p_a "source register c" () h-gr f-32-rc5p-a)
-+(dnop aridx5_a "audio extension register index" () h-ai-aridx5 f-32-aridx5-a)
-+(dnop ar2idx5_a "audio extension register index2" () h-ai-ar2idx5 f-32-aridx5-a)
-+(dnop lsbloc_a "5-bit immediate value" () h-ai-lsbloc f-32-lsbloc-a)
-+(dnop rc4_a "destination register c" () h-ai-rc4 f-32-rc4-a)
-+(dnop m2_5_a "im6 modification register index" () h-ai-m2-5 f-32-m2-5-a)
-+(dnop im1_4_a "im5 i&m register common index" () h-ai-im1-4 f-32-im1-4-a)
-+(dnop m2_3_a "im5/im6 modification register index" () h-ai-m2-3 f-32-m2-3-a)
-+(dnop i2_1_a "im5/im6 index register index" () h-ai-i2-1 f-32-i2-1-a)
-+(dnop c1_15_a "rb/rc general register index" () h-ai-c1-15 f-32-c1-15-a)
-+(dnop ra4_19_a "ra general register index" () h-ai-ra4-19 f-32-ra4-19-a)
-+(dnop rb3_14_a "rb general register index" () h-ai-rb3-14 f-32-rb3-14-a)
-+(dnop rc2_11_a "rc general register index" () h-ai-rc2-11 f-32-rc2-11-a)
-+(dnop rc1_5_a "rc general register index" () h-ai-rc1-5 f-32-rc1-5-a)
-+(dnop rc5_0_a "destination register c with even index" () h-gr-even f-32-rc5_0-a)
-+(dnop rc5_1_a "destination register c with odd index" () h-gr-odd f-32-rc5_1-a)
-+(dnop im5_i_a "index register" () h-ar-i f-32-im5-i-a)
-+(dnop im5_m_a "modification register" () h-ar-m f-32-im5-m-a)
-+(dnop im6_i_0_a "index register" () h-ar-i-lo f-32-im6-i_0-a)
-+(dnop im6_i_1_a "index register" () h-ar-i-hi f-32-im6-i_1-a)
-+(dnop im6_m_0_a "modification register" () h-ar-m-lo f-32-im6-m_0-a)
-+(dnop im6_m_1_a "modification register" () h-ar-m-hi f-32-im6-m_1-a)
-+(dnop r10a5_a "source register a" () h-gr-lo f-32-r10a5-a)
-+(dnop r10b5_a "source register b" () h-gr-lo f-32-r10b5-a)
-+(dnop r10c5_a "destination register c" () h-gr-lo f-32-r10c5-a)
-+
-+(dnop r10a5_a_b "source register a for bottom 16-bits data"() h-gr-lo-bottom f-32-r10a5-a)
-+(dnop r10a5_a_t "source register a for top 16-bits data" () h-gr-lo-top f-32-r10a5-a)
-+(dnop r10b5_a_b "source register b for bottom 16-bits data"() h-gr-lo-bottom f-32-r10b5-a)
-+(dnop r10b5_a_t "source register b for top 16-bits data" () h-gr-lo-top f-32-r10b5-a)
-+
-+(dnop r10c5_0_a "destination register c with even index" () h-gr-lo-even f-32-r10c5_0-a)
-+(dnop r10c5_1_a "destination register c with odd index" () h-gr-lo-odd f-32-r10c5_1-a)
-+
-+(define-operand
-+ (name imm16_a)
-+ (comment "16-bit unsigned/signed immediate value")
-+ (attrs HASH-PREFIX)
-+ (type h-ai-imm16)
-+ (index f-32-imm16-a)
-+ (handlers (parse "imm16_a"))
-+)
-+
-+;; ==============================================================================
-+;; Instructions
-+;; ==============================================================================
-+
-+; Without multiplication
-+; ----------------------
-+
-+(define-pmacro (arith-load-a arith-op sub-type)
-+ (dni (.sym "a" arith-op "l") (.str arith-op " two registers and load memory in parallel")
-+ (AUDIO)
-+ (.str "a" arith-op "l" " $rc5_0_a,$ra5_a,$rb5_a,$rc5_1_a,[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_1 AOP3_22_0 ra5_a rb5_a rc4_a (.sym "AOP1_5_" sub-type) im1_4_a m2_3_a i2_1_a)
-+ (sequence
-+ ((USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI data) (USI Ix))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto A" (.upcase arith-op) "L_interruption;\n\n"))
-+
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+
-+ (set data (mem USI adm_vaddr))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (parallel ()
-+ (set rc5_0_a (arith-op ra5_a rb5_a))
-+ (set rc5_1_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data)"))
-+ (set im5_i_a Ix)))
-+ ()
-+ )
-+)
-+
-+(arith-load-a add 0) ; AADDL
-+(arith-load-a sub 1) ; ASUBL
-+
-+; ABSE
-+;(dnmi abse "extract a number of bits from a register for bit stream extraction"
-+; (AUDIO)
-+; "abse $rt5,$ra5,$rb5"
-+; (emit bse rt5 ra5 rb5)
-+;)
-+
-+; ABSP
-+;(dnmi absp "insert a number of bits to a register for bit stream packing"
-+; (AUDIO)
-+; "absp $rt5,$ra5,$rb5"
-+; (emit bsp rt5 ra5 rb5)
-+;)
-+
-+; ALA
-+(dni ala "load a 32/24-bit word from audio memory into a high/low portion of accumulator"
-+ (AUDIO DX_REG)
-+ "ala $dh2_16_a,[$im5_i_a],$im5_m_a"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 AOP3_22_2 ARES3_19_0 dh2_16_a ARES5_14_0 ARES1_9_0 AOP3_8_0 AOP1_5_1 im1_4_a m2_3_a i2_1_a)
-+ (sequence
-+ ((USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI data) (USI Ix))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto ALA_interruption;\n\n")
-+
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+ (set data (mem USI adm_vaddr))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (parallel ()
-+ (set dh2_16_a (c-code USI "nds32_audio_am2dr_handler(current_cpu, FLD (f_32_dh2_16_a), tmp_data)"))
-+ (set im5_i_a Ix)))
-+ ()
-+)
-+
-+; ALR
-+(dni alr "load a 32/24-bit word from audio memory into a general register"
-+ (AUDIO)
-+ "alr $ra5_a,[$im5_i_a],$im5_m_a"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 AOP3_22_0 ra5_a ARES5_14_0 ARES1_9_0 AOP3_8_0 AOP1_5_1 im1_4_a m2_3_a i2_1_a)
-+ (sequence
-+ ((USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI data) (USI Ix))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto ALR_interruption;\n\n")
-+
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+ (set data (mem USI adm_vaddr))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (parallel ()
-+ (set ra5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data)"))
-+ (set im5_i_a Ix)))
-+ ()
-+)
-+
-+; ALR2
-+(dni alr2 "load two 32/24-bit words from audio memory into two general registers"
-+ (AUDIO)
-+ "alr2 $ra5_a,$rb5p_a,[$im6_i_0_a],[$im6_i_1_a],$im6_m_0_a,$im6_m_1_a"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 AOP3_22_0 ra5_a rb5p_a ARES1_9_0 AOP3_8_1 m2_5_a m2_3_a i2_1_a)
-+ (sequence ((USI adm_vbase) (USI adm_offset0) (USI adm_offset1) (USI adm_vaddr0) (USI adm_vaddr1) (USI data0) (USI data1) (USI Ix0) (USI Ix1))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto ALR2_interruption;\n\n")
-+
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset0 (sll im6_i_0_a (const 2)))
-+ (set adm_offset1 (sll (c-call USI "nds32_ar_i_handler" (index-of im6_i_1_a)) (const 2)))
-+ (set adm_vaddr0 (or adm_vbase adm_offset0))
-+ (set adm_vaddr1 (or adm_vbase adm_offset1))
-+ (set data0 (mem USI adm_vaddr0))
-+ (set data1 (mem USI adm_vaddr1))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix0 (c-call USI "nds32_cbb_handler" (index-of im6_i_0_a) im6_m_0_a))
-+ (set Ix0 (add im6_i_0_a im6_m_0_a)))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix1 (c-call USI "nds32_cbb_handler" (index-of im6_i_1_a) im6_m_1_a))
-+ (set Ix1 (add im6_i_1_a im6_m_1_a)))
-+
-+ (parallel ()
-+ (set ra5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data0)")))
-+
-+ (c-code VOID "current_cpu->data_in_DLM = 1;\n")
-+
-+ (parallel ()
-+ (set im6_i_0_a Ix0)
-+ (set rb5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data1)"))
-+ (set im6_i_1_a Ix1)))
-+ ()
-+)
-+
-+; ASA
-+(dni asa "store a 32/24-bit word from a high/low portion of accumulator into audio memory"
-+ (AUDIO DX_REG)
-+ "asa $dh2_16_a,[$im5_i_a],$im5_m_a"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 AOP3_22_3 ARES3_19_0 dh2_16_a ARES5_14_0 ARES1_9_0 AOP3_8_0 AOP1_5_1 im1_4_a m2_3_a i2_1_a)
-+ (sequence ((USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI Ix))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto ASA_interruption;\n\n")
-+
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (parallel ()
-+ (set (mem USI adm_vaddr) (c-call USI "nds32_dr2am_handler" (index-of dh2_16_a)))
-+ (set im5_i_a Ix)))
-+ ()
-+)
-+
-+; ASR
-+(dni asr "store a 32/24-bit word from a general register into audio memory"
-+ (AUDIO)
-+ "asr $ra5_a,[$im5_i_a],$im5_m_a"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 AOP3_22_1 ra5_a ARES5_14_0 ARES1_9_0 AOP3_8_0 AOP1_5_1 im1_4_a m2_3_a i2_1_a)
-+ (sequence ((USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI Ix))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto ASR_interruption;\n\n")
-+
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (parallel ()
-+ (set (mem USI adm_vaddr) (c-call USI "nds32_gr2am_handler" ra5_a))
-+ (set im5_i_a Ix)))
-+ ()
-+)
-+
-+; AUPI
-+(dni aupi "modify Ip register with Mr register"
-+ (AUDIO)
-+ "aupi $im5_i_a,$im5_m_a"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 AOP3_22_4 ARES3_19_0 ARES2_16_0 ARES5_14_0 ARES1_9_0 AOP3_8_0 AOP1_5_1 im1_4_a m2_3_a i2_1_a)
-+ (sequence ((USI Ix))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto AUPI_interruption;\n\n")
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+ (set im5_i_a Ix))
-+ ()
-+)
-+
-+; AMFAR
-+(dni amfar "move the content of an audio extension register into a general regiater"
-+ (AUDIO DX_REG)
-+ "amfar $rd5_a,$aridx5_a"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 AOP3_22_3 rd5_a ARES5_14_0 ARES1_9_0 AOP3_8_1 AOP1_5_1 aridx5_a)
-+ (sequence ((USI data))
-+
-+ ;Reserved instruction exception have higher priority
-+ (set data (c-call USI "nds32_mf_aridx_handler" pc aridx5_a))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto AMFAR_interruption;\n\n")
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto AMFAR_interruption;\n\n")
-+
-+ ;Set the value
-+ (set rd5_a data)
-+ )
-+ ()
-+)
-+
-+; AMTAR
-+(dni amtar "move the content of a general register into an audio extension register"
-+ (AUDIO DX_REG)
-+ "amtar $ra5_a,$aridx5_a"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 AOP3_22_3 ra5_a ARES5_14_0 ARES1_9_0 AOP3_8_1 AOP1_5_0 aridx5_a)
-+ (sequence ()
-+ (c-call VOID "nds32_mt_aridx_handler" pc ra5_a aridx5_a)
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto AMTAR_interruption;\n\n"))
-+ ()
-+)
-+
-+; AMTARI
-+(dni amtari "move a 16-bit constant into an audio register"
-+ (AUDIO)
-+ "amtari $aridx4_a,$imm16_a"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_1 AOP3_22_1 aridx4_a imm16_a)
-+ (sequence ()
-+ (c-call VOID "nds32_mt_aridx_handler" pc imm16_a aridx4_a)
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto AMTARI_interruption;\n\n"))
-+ ()
-+)
-+
-+; ASATS48
-+(dni asats48 "saturate the 64/56-bit accumulator value into 48-bit signed value"
-+ (AUDIO DX_REG)
-+ "asats48 $d1_a"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 AOP3_22_2 ARES3_19_0 ARES2_16_0 ARES5_14_0 d1_a AOP3_8_1 AOP1_5_0 ARES5_4_0)
-+ (sequence ()
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto ASATS48_interruption;\n\n")
-+
-+ (set d1_a
-+ (case UDI (c-code USI "((GET_MSC_CFG_AUDIO(H_SR_REG(MSC_CFG)) == 2) || ((GET_MSC_CFG_AUDIO(H_SR_REG(MSC_CFG)) == 3) && TEST_MOD_B24(CPU(h_ar_mod))))")
-+
-+ ((1)
-+ (cond UDI
-+ ((and (gt d1_a (const UDI #x7fffffffffff)) (le d1_a (const UDI #x7fffffffffffff)))
-+ (const UDI #x7fffffffffff))
-+ ((and (lt d1_a (const UDI #xff800000000000)) (ge d1_a (const UDI #x80000000000000)))
-+ (const UDI #xff800000000000))
-+ (else d1_a)))
-+
-+ (else
-+ (cond UDI
-+ ((and (gt d1_a (const UDI #x7fffffffffff)) (le d1_a (const UDI #x7fffffffffffffff)))
-+ (const UDI #x7fffffffffff))
-+ ((and (lt d1_a (const UDI #xffff800000000000)) (ge d1_a (const UDI #x8000000000000000)))
-+ (const UDI #xffff800000000000))
-+ (else d1_a))))))
-+ ()
-+)
-+
-+; AWEXT
-+(dni awext "extract 32-bit word from a 64/56-bit accumulator into general register"
-+ (AUDIO DX_REG)
-+ "awext $rd5_a,$d1_a,$lsbloc_a"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 AOP3_22_2 rd5_a ARES5_14_0 d1_a AOP3_8_1 AOP1_5_1 lsbloc_a)
-+ (sequence ()
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto AWEXT_interruption;\n\n")
-+ (set rd5_a (c-call USI "nds32_awext_handler" d1_a lsbloc_a)))
-+ ()
-+)
-+
-+; With multiplication
-+; -------------------
-+
-+(define-pmacro (mul-arith-accum-a opcode ext-op arith-op)
-+ (begin
-+ (dni opcode (.str "multiply the unsigned/signed contents of two registers and " arith-op " the result with accumulator")
-+ (AUDIO MAC DX_REG)
-+ (.str opcode " $d1_a,$ra5_a,$rb5_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra5_a rb5_a d1_a AOP3_8_0 AOP1_5_0 ARES5_4_0)
-+ (sequence ((UDI product) (USI index))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI ra5_a) (ext-op UDI rb5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))"))))
-+ (set d1_a (arith-op d1_a product)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "l.s") (.str "multiply the unsigned/signed contents of two registers and " arith-op " the result with accumulator in parallel with memory load")
-+ (AUDIO)
-+ (.str opcode "l.s $d1_a,$ra5_a,$rb5_a,[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra5_a rb5_a d1_a AOP3_8_2 AOP1_5_0 im1_4_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI data) (USI index) (USI Ix))
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "L_S_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI ra5_a) (ext-op UDI rb5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))"))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+ (set data (mem USI adm_vaddr))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (parallel ()
-+ (set d1_a (arith-op d1_a product))
-+ (set ra5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data)"))
-+ (set im5_i_a Ix)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "l2.s") (.str "multiply the unsigned/signed contents of two registers and " arith-op " the result with accumulator in parallel with two memory loads")
-+ (AUDIO)
-+ (.str opcode "l2.s $d1_a,$ra5_a,$rb5p_a,[$im6_i_0_a],[$im6_i_1_a],$im6_m_0_a,$im6_m_1_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra5_a rb5p_a d1_a AOP3_8_4 m2_5_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset0) (USI adm_offset1) (USI adm_vaddr0) (USI adm_vaddr1) (USI data0) (USI data1) (USI index) (USI Ix0) (USI Ix1))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "L2_S_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI ra5_a) (ext-op UDI rb5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))"))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset0 (sll im6_i_0_a (const 2)))
-+ (set adm_offset1 (sll (c-call USI "nds32_ar_i_handler" (index-of im6_i_1_a)) (const 2)))
-+ (set adm_vaddr0 (or adm_vbase adm_offset0))
-+ (set adm_vaddr1 (or adm_vbase adm_offset1))
-+ (set data0 (mem USI adm_vaddr0))
-+ (set data1 (mem USI adm_vaddr1))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix0 (c-call USI "nds32_cbb_handler" (index-of im6_i_0_a) im6_m_0_a))
-+ (set Ix0 (add im6_i_0_a im6_m_0_a)))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix1 (c-call USI "nds32_cbb_handler" (index-of im6_i_1_a) im6_m_1_a))
-+ (set Ix1 (add im6_i_1_a im6_m_1_a)))
-+
-+ (parallel ()
-+ (set d1_a (arith-op d1_a product))
-+ (set ra5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data0)")))
-+
-+ (c-code VOID "current_cpu->data_in_DLM = 1;\n")
-+
-+ (parallel ()
-+ (set im6_i_0_a Ix0)
-+ (set rb5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data1)"))
-+ (set im6_i_1_a Ix1)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "l.l") (.str "multiply the unsigned/signed contents of two registers and " arith-op " the result with accumulator in parallel with memory load")
-+ (AUDIO)
-+ (.str opcode "l.l $d1_a,$r10a5_a,$r10b5_a,$r10c5_a,[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra4_19_a c1_15_a rb3_14_a rc2_11_a d1_a AOP3_8_3 rc1_5_a im1_4_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI data) (USI index) (USI Ix))
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "L_L_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI r10a5_a) (ext-op UDI r10b5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))"))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+ (set data (mem USI adm_vaddr))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (parallel ()
-+ (set d1_a (arith-op d1_a product))
-+ (set r10c5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data)"))
-+ (set im5_i_a Ix)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "l2.l") (.str "multiply the unsigned/signed contents of two registers and " arith-op " the result with accumulator in parallel with two memory loads")
-+ (AUDIO)
-+ (.str opcode "l2.l $d1_a,$r10a5_a,$r10b5_a,$r10c5_0_a,$r10c5_1_a,[$im6_i_0_a],[$im6_i_1_a],$im6_m_0_a,$im6_m_1_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra4_19_a c1_15_a rb3_14_a rc2_11_a d1_a AOP3_8_5 m2_5_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset0) (USI adm_offset1) (USI adm_vaddr0) (USI adm_vaddr1) (USI data0) (USI data1) (USI index) (USI Ix0) (USI Ix1))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "L2_L_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI r10a5_a) (ext-op UDI r10b5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))"))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset0 (sll im6_i_0_a (const 2)))
-+ (set adm_offset1 (sll (c-call USI "nds32_ar_i_handler" (index-of im6_i_1_a)) (const 2)))
-+ (set adm_vaddr0 (or adm_vbase adm_offset0))
-+ (set adm_vaddr1 (or adm_vbase adm_offset1))
-+ (set data0 (mem USI adm_vaddr0))
-+ (set data1 (mem USI adm_vaddr1))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix0 (c-call USI "nds32_cbb_handler" (index-of im6_i_0_a) im6_m_0_a))
-+ (set Ix0 (add im6_i_0_a im6_m_0_a)))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix1 (c-call USI "nds32_cbb_handler" (index-of im6_i_1_a) im6_m_1_a))
-+ (set Ix1 (add im6_i_1_a im6_m_1_a)))
-+
-+ (parallel ()
-+ (set d1_a (arith-op d1_a product))
-+ (set r10c5_0_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data0)")))
-+
-+ (c-code VOID "current_cpu->data_in_DLM = 1;\n")
-+
-+ (parallel ()
-+ (set im6_i_0_a Ix0)
-+ (set r10c5_1_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data1)"))
-+ (set im6_i_1_a Ix1)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "sa") (.str "multiply the unsigned/signed contents of two registers and " arith-op " the result with accumulator in parallel with memory store of upper/lower portion of accumulator")
-+ (AUDIO)
-+ (.str opcode "sa $d1_a,$ra5_a,$rb5_a,$dh2_6_a,[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra5_a rb5_a d1_a AOP2_8_3 dh2_6_a im1_4_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI index) (USI Ix))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "SA_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI ra5_a) (ext-op UDI rb5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))"))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (parallel ()
-+ (set (mem USI adm_vaddr) (c-call USI "nds32_dr2am_handler" (index-of dh2_6_a)))
-+ (set d1_a (arith-op d1_a product))
-+ (set im5_i_a Ix)))
-+ ()
-+ )
-+ )
-+)
-+(mul-arith-accum-a amadd zext add) ; AMADD
-+(mul-arith-accum-a amsub zext sub) ; AMSUB
-+
-+(define-pmacro (muls-arith-accum-a opcode ext-op arith-op)
-+ (begin
-+ (dni opcode (.str "multiply the unsigned/signed contents of two registers and " arith-op " the result with accumulator")
-+ (AUDIO MAC DX_REG)
-+ (.str opcode " $d1_a,$ra5_a,$rb5_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra5_a rb5_a d1_a AOP3_8_0 AOP1_5_0 ARES5_4_0)
-+ (sequence ((UDI product) (USI index))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI ra5_a) (ext-op UDI rb5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set d1_a (arith-op d1_a product)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "l.s") (.str "multiply the unsigned/signed contents of two registers and " arith-op " the result with accumulator in parallel with memory load")
-+ (AUDIO)
-+ (.str opcode "l.s $d1_a,$ra5_a,$rb5_a,[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra5_a rb5_a d1_a AOP3_8_2 AOP1_5_0 im1_4_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI data) (USI index) (USI Ix))
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "L_S_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI ra5_a) (ext-op UDI rb5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+ (set data (mem USI adm_vaddr))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (parallel ()
-+ (set d1_a (arith-op d1_a product))
-+ (set ra5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data)"))
-+ (set im5_i_a Ix)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "l2.s") (.str "multiply the unsigned/signed contents of two registers and " arith-op " the result with accumulator in parallel with two memory loads")
-+ (AUDIO)
-+ (.str opcode "l2.s $d1_a,$ra5_a,$rb5p_a,[$im6_i_0_a],[$im6_i_1_a],$im6_m_0_a,$im6_m_1_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra5_a rb5p_a d1_a AOP3_8_4 m2_5_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset0) (USI adm_offset1) (USI adm_vaddr0) (USI adm_vaddr1) (USI data0) (USI data1) (USI index) (USI Ix0) (USI Ix1))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "L2_S_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI ra5_a) (ext-op UDI rb5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset0 (sll im6_i_0_a (const 2)))
-+ (set adm_offset1 (sll (c-call USI "nds32_ar_i_handler" (index-of im6_i_1_a)) (const 2)))
-+ (set adm_vaddr0 (or adm_vbase adm_offset0))
-+ (set adm_vaddr1 (or adm_vbase adm_offset1))
-+ (set data0 (mem USI adm_vaddr0))
-+ (set data1 (mem USI adm_vaddr1))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix0 (c-call USI "nds32_cbb_handler" (index-of im6_i_0_a) im6_m_0_a))
-+ (set Ix0 (add im6_i_0_a im6_m_0_a)))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix1 (c-call USI "nds32_cbb_handler" (index-of im6_i_1_a) im6_m_1_a))
-+ (set Ix1 (add im6_i_1_a im6_m_1_a)))
-+
-+ (parallel ()
-+ (set d1_a (arith-op d1_a product))
-+ (set ra5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data0)")))
-+
-+ (c-code VOID "current_cpu->data_in_DLM = 1;\n")
-+
-+ (parallel ()
-+ (set im6_i_0_a Ix0)
-+ (set rb5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data1)"))
-+ (set im6_i_1_a Ix1)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "l.l") (.str "multiply the unsigned/signed contents of two registers and " arith-op " the result with accumulator in parallel with memory load")
-+ (AUDIO)
-+ (.str opcode "l.l $d1_a,$r10a5_a,$r10b5_a,$r10c5_a,[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra4_19_a c1_15_a rb3_14_a rc2_11_a d1_a AOP3_8_3 rc1_5_a im1_4_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI data) (USI index) (USI Ix))
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "L_L_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI r10a5_a) (ext-op UDI r10b5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+ (set data (mem USI adm_vaddr))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (parallel ()
-+ (set d1_a (arith-op d1_a product))
-+ (set r10c5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data)"))
-+ (set im5_i_a Ix)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "l2.l") (.str "multiply the unsigned/signed contents of two registers and " arith-op " the result with accumulator in parallel with two memory loads")
-+ (AUDIO)
-+ (.str opcode "l2.l $d1_a,$r10a5_a,$r10b5_a,$r10c5_0_a,$r10c5_1_a,[$im6_i_0_a],[$im6_i_1_a],$im6_m_0_a,$im6_m_1_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra4_19_a c1_15_a rb3_14_a rc2_11_a d1_a AOP3_8_5 m2_5_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset0) (USI adm_offset1) (USI adm_vaddr0) (USI adm_vaddr1) (USI data0) (USI data1) (USI index) (USI Ix0) (USI Ix1))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "L2_L_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI r10a5_a) (ext-op UDI r10b5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset0 (sll im6_i_0_a (const 2)))
-+ (set adm_offset1 (sll (c-call USI "nds32_ar_i_handler" (index-of im6_i_1_a)) (const 2)))
-+ (set adm_vaddr0 (or adm_vbase adm_offset0))
-+ (set adm_vaddr1 (or adm_vbase adm_offset1))
-+ (set data0 (mem USI adm_vaddr0))
-+ (set data1 (mem USI adm_vaddr1))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix0 (c-call USI "nds32_cbb_handler" (index-of im6_i_0_a) im6_m_0_a))
-+ (set Ix0 (add im6_i_0_a im6_m_0_a)))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix1 (c-call USI "nds32_cbb_handler" (index-of im6_i_1_a) im6_m_1_a))
-+ (set Ix1 (add im6_i_1_a im6_m_1_a)))
-+
-+ (parallel ()
-+ (set d1_a (arith-op d1_a product))
-+ (set r10c5_0_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data0)")))
-+
-+ (c-code VOID "current_cpu->data_in_DLM = 1;\n")
-+
-+ (parallel ()
-+ (set im6_i_0_a Ix0)
-+ (set r10c5_1_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data1)"))
-+ (set im6_i_1_a Ix1)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "sa") (.str "multiply the unsigned/signed contents of two registers and " arith-op " the result with accumulator in parallel with memory store of upper/lower portion of accumulator")
-+ (AUDIO)
-+ (.str opcode "sa $d1_a,$ra5_a,$rb5_a,$dh2_6_a,[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra5_a rb5_a d1_a AOP2_8_3 dh2_6_a im1_4_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI index) (USI Ix))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "SA_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI ra5_a) (ext-op UDI rb5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (parallel ()
-+ (set (mem USI adm_vaddr) (c-call USI "nds32_dr2am_handler" (index-of dh2_6_a)))
-+ (set d1_a (arith-op d1_a product))
-+ (set im5_i_a Ix)))
-+ ()
-+ )
-+ )
-+)
-+(muls-arith-accum-a amadds ext add) ; AMADDS
-+(muls-arith-accum-a amsubs ext sub) ; AMSUBS
-+
-+
-+(define-pmacro (muls-arith-write-a opcode ext-op arith-op)
-+ (begin
-+ (dni opcode "multiply the unsigned/signed contents of two registers and write the result to accumulator"
-+ (AUDIO MAC DX_REG)
-+ (.str opcode " $d1_a,$ra5_a,$rb5_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra5_a rb5_a d1_a AOP3_8_0 AOP1_5_0 ARES5_4_0)
-+ (sequence ((UDI product) (USI index))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI ra5_a) (ext-op UDI rb5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set d1_a (arith-op (const #x0) product)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "l.s") "multiply the unsigned/signed contents of two registers and write the result to accumulator in parallel with memory load"
-+ (AUDIO)
-+ (.str opcode "l.s $d1_a,$ra5_a,$rb5_a,[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra5_a rb5_a d1_a AOP3_8_2 AOP1_5_0 im1_4_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI data) (USI index) (USI Ix))
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "L_S_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI ra5_a) (ext-op UDI rb5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+ (set data (mem USI adm_vaddr))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (parallel ()
-+ (set d1_a (arith-op (const #x0) product))
-+ (set ra5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data)"))
-+ (set im5_i_a Ix)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "l2.s") "multiply the unsigned/signed contents of two registers and write the result to accumulator in parallel with two memory loads"
-+ (AUDIO)
-+ (.str opcode "l2.s $d1_a,$ra5_a,$rb5p_a,[$im6_i_0_a],[$im6_i_1_a],$im6_m_0_a,$im6_m_1_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra5_a rb5p_a d1_a AOP3_8_4 m2_5_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset0) (USI adm_offset1) (USI adm_vaddr0) (USI adm_vaddr1) (USI data0) (USI data1) (USI index) (USI Ix0) (USI Ix1))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "L2_S_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI ra5_a) (ext-op UDI rb5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset0 (sll im6_i_0_a (const 2)))
-+ (set adm_offset1 (sll (c-call USI "nds32_ar_i_handler" (index-of im6_i_1_a)) (const 2)))
-+ (set adm_vaddr0 (or adm_vbase adm_offset0))
-+ (set adm_vaddr1 (or adm_vbase adm_offset1))
-+ (set data0 (mem USI adm_vaddr0))
-+ (set data1 (mem USI adm_vaddr1))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix0 (c-call USI "nds32_cbb_handler" (index-of im6_i_0_a) im6_m_0_a))
-+ (set Ix0 (add im6_i_0_a im6_m_0_a)))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix1 (c-call USI "nds32_cbb_handler" (index-of im6_i_1_a) im6_m_1_a))
-+ (set Ix1 (add im6_i_1_a im6_m_1_a)))
-+
-+ (parallel ()
-+ (set d1_a (arith-op (const #x0) product))
-+ (set ra5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data0)")))
-+
-+ (c-code VOID "current_cpu->data_in_DLM = 1;\n")
-+
-+ (parallel ()
-+ (set im6_i_0_a Ix0)
-+ (set rb5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data1)"))
-+ (set im6_i_1_a Ix1)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "l.l") "multiply the unsigned/signed contents of two registers and write the result to accumulator in parallel with memory load"
-+ (AUDIO)
-+ (.str opcode "l.l $d1_a,$r10a5_a,$r10b5_a,$r10c5_a,[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra4_19_a c1_15_a rb3_14_a rc2_11_a d1_a AOP3_8_3 rc1_5_a im1_4_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI data) (USI index) (USI Ix))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "L_L_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI r10a5_a) (ext-op UDI r10b5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+(set data (mem USI adm_vaddr))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (parallel ()
-+ (set d1_a (arith-op (const #x0) product))
-+ (set r10c5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data)"))
-+ (set im5_i_a Ix)))
-+()
-+ )
-+
-+ (dni (.sym opcode "l2.l") "multiply the unsigned/signed contents of two registers and write the result to accumulator in parallel with two memory loads"
-+ (AUDIO)
-+ (.str opcode "l2.l $d1_a,$r10a5_a,$r10b5_a,$r10c5_0_a,$r10c5_1_a,[$im6_i_0_a],[$im6_i_1_a],$im6_m_0_a,$im6_m_1_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra4_19_a c1_15_a rb3_14_a rc2_11_a d1_a AOP3_8_5 m2_5_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset0) (USI adm_offset1) (USI adm_vaddr0) (USI adm_vaddr1) (USI data0) (USI data1) (USI index) (USI Ix0) (USI Ix1))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "L2_L_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI r10a5_a) (ext-op UDI r10b5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset0 (sll im6_i_0_a (const 2)))
-+ (set adm_offset1 (sll (c-call USI "nds32_ar_i_handler" (index-of im6_i_1_a)) (const 2)))
-+ (set adm_vaddr0 (or adm_vbase adm_offset0))
-+ (set adm_vaddr1 (or adm_vbase adm_offset1))
-+ (set data0 (mem USI adm_vaddr0))
-+ (set data1 (mem USI adm_vaddr1))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix0 (c-call USI "nds32_cbb_handler" (index-of im6_i_0_a) im6_m_0_a))
-+ (set Ix0 (add im6_i_0_a im6_m_0_a)))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix1 (c-call USI "nds32_cbb_handler" (index-of im6_i_1_a) im6_m_1_a))
-+ (set Ix1 (add im6_i_1_a im6_m_1_a)))
-+
-+ (parallel ()
-+ (set d1_a (arith-op (const #x0) product))
-+ (set r10c5_0_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data0)")))
-+
-+ (c-code VOID "current_cpu->data_in_DLM = 1;\n")
-+
-+ (parallel ()
-+ (set im6_i_0_a Ix0)
-+ (set r10c5_1_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data1)"))
-+ (set im6_i_1_a Ix1)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "sa") "multiply the unsigned/signed contents of two registers and write the result to accumulator in parallel with memory store of upper/lower portion of accumulator"
-+ (AUDIO)
-+ (.str opcode "sa $d1_a,$ra5_a,$rb5_a,$dh2_6_a,[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra5_a rb5_a d1_a AOP2_8_3 dh2_6_a im1_4_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI index) (USI Ix))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "SA_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI ra5_a) (ext-op UDI rb5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (parallel ()
-+ (set (mem USI adm_vaddr) (c-call USI "nds32_dr2am_handler" (index-of dh2_6_a)))
-+ (set d1_a (arith-op (const #x0) product))
-+ (set im5_i_a Ix)))
-+ ()
-+ )
-+ )
-+)
-+(muls-arith-write-a amnegs ext sub) ; AMNEGS
-+(muls-arith-write-a amults ext add) ; AMULTS
-+
-+(define-pmacro (mul-arith-write-a opcode ext-op arith-op)
-+ (begin
-+ (dni opcode "multiply the unsigned/signed contents of two registers and write the result to accumulator"
-+ (AUDIO MAC DX_REG)
-+ (.str opcode " $d1_a,$ra5_a,$rb5_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra5_a rb5_a d1_a AOP3_8_0 AOP1_5_0 ARES5_4_0)
-+ (sequence ((UDI product) (USI index))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI ra5_a) (ext-op UDI rb5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))"))))
-+ (set d1_a (arith-op (const #x0) product)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "l.s") "multiply the unsigned/signed contents of two registers and write the result to accumulator in parallel with memory load"
-+ (AUDIO)
-+ (.str opcode "l.s $d1_a,$ra5_a,$rb5_a,[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra5_a rb5_a d1_a AOP3_8_2 AOP1_5_0 im1_4_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI data) (USI index) (USI Ix))
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "L_S_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI ra5_a) (ext-op UDI rb5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))"))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+ (set data (mem USI adm_vaddr))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (parallel ()
-+ (set d1_a (arith-op (const #x0) product))
-+ (set ra5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data)"))
-+ (set im5_i_a Ix)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "l2.s") "multiply the unsigned/signed contents of two registers and write the result to accumulator in parallel with two memory loads"
-+ (AUDIO)
-+ (.str opcode "l2.s $d1_a,$ra5_a,$rb5p_a,[$im6_i_0_a],[$im6_i_1_a],$im6_m_0_a,$im6_m_1_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra5_a rb5p_a d1_a AOP3_8_4 m2_5_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset0) (USI adm_offset1) (USI adm_vaddr0) (USI adm_vaddr1) (USI data0) (USI data1) (USI index) (USI Ix0) (USI Ix1))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "L2_S_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI ra5_a) (ext-op UDI rb5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))"))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset0 (sll im6_i_0_a (const 2)))
-+ (set adm_offset1 (sll (c-call USI "nds32_ar_i_handler" (index-of im6_i_1_a)) (const 2)))
-+ (set adm_vaddr0 (or adm_vbase adm_offset0))
-+ (set adm_vaddr1 (or adm_vbase adm_offset1))
-+ (set data0 (mem USI adm_vaddr0))
-+ (set data1 (mem USI adm_vaddr1))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix0 (c-call USI "nds32_cbb_handler" (index-of im6_i_0_a) im6_m_0_a))
-+ (set Ix0 (add im6_i_0_a im6_m_0_a)))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix1 (c-call USI "nds32_cbb_handler" (index-of im6_i_1_a) im6_m_1_a))
-+ (set Ix1 (add im6_i_1_a im6_m_1_a)))
-+
-+ (parallel ()
-+ (set d1_a (arith-op (const #x0) product))
-+ (set ra5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data0)")))
-+
-+ (c-code VOID "current_cpu->data_in_DLM = 1;\n")
-+
-+ (parallel ()
-+ (set im6_i_0_a Ix0)
-+ (set rb5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data1)"))
-+ (set im6_i_1_a Ix1)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "l.l") "multiply the unsigned/signed contents of two registers and write the result to accumulator in parallel with memory load"
-+ (AUDIO)
-+ (.str opcode "l.l $d1_a,$r10a5_a,$r10b5_a,$r10c5_a,[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra4_19_a c1_15_a rb3_14_a rc2_11_a d1_a AOP3_8_3 rc1_5_a im1_4_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI data) (USI index) (USI Ix))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "L_L_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI r10a5_a) (ext-op UDI r10b5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))"))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+ (set data (mem USI adm_vaddr))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (parallel ()
-+ (set d1_a (arith-op (const #x0) product))
-+ (set r10c5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data)"))
-+ (set im5_i_a Ix)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "l2.l") "multiply the unsigned/signed contents of two registers and write the result to accumulator in parallel with two memory loads"
-+ (AUDIO)
-+ (.str opcode "l2.l $d1_a,$r10a5_a,$r10b5_a,$r10c5_0_a,$r10c5_1_a,[$im6_i_0_a],[$im6_i_1_a],$im6_m_0_a,$im6_m_1_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra4_19_a c1_15_a rb3_14_a rc2_11_a d1_a AOP3_8_5 m2_5_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset0) (USI adm_offset1) (USI adm_vaddr0) (USI adm_vaddr1) (USI data0) (USI data1) (USI index) (USI Ix0) (USI Ix1))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "L2_L_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI r10a5_a) (ext-op UDI r10b5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))"))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset0 (sll im6_i_0_a (const 2)))
-+ (set adm_offset1 (sll (c-call USI "nds32_ar_i_handler" (index-of im6_i_1_a)) (const 2)))
-+ (set adm_vaddr0 (or adm_vbase adm_offset0))
-+ (set adm_vaddr1 (or adm_vbase adm_offset1))
-+ (set data0 (mem USI adm_vaddr0))
-+ (set data1 (mem USI adm_vaddr1))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix0 (c-call USI "nds32_cbb_handler" (index-of im6_i_0_a) im6_m_0_a))
-+ (set Ix0 (add im6_i_0_a im6_m_0_a)))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix1 (c-call USI "nds32_cbb_handler" (index-of im6_i_1_a) im6_m_1_a))
-+ (set Ix1 (add im6_i_1_a im6_m_1_a)))
-+
-+ (parallel ()
-+ (set d1_a (arith-op (const #x0) product))
-+ (set r10c5_0_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data0)")))
-+
-+ (c-code VOID "current_cpu->data_in_DLM = 1;\n")
-+
-+ (parallel ()
-+ (set im6_i_0_a Ix0)
-+ (set r10c5_1_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data1)"))
-+ (set im6_i_1_a Ix1)))
-+ ()
-+ )
-+
-+ (dni (.sym opcode "sa") "multiply the unsigned/signed contents of two registers and write the result to accumulator in parallel with memory store of upper/lower portion of accumulator"
-+ (AUDIO)
-+ (.str opcode "sa $d1_a,$ra5_a,$rb5_a,$dh2_6_a,[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode)) ra5_a rb5_a d1_a AOP2_8_3 dh2_6_a im1_4_a m2_3_a i2_1_a)
-+ (sequence ((UDI product) (USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI index) (USI Ix))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase opcode) "SA_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext-op UDI ra5_a) (ext-op UDI rb5_a)))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))"))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (parallel ()
-+ (set (mem USI adm_vaddr) (c-call USI "nds32_dr2am_handler" (index-of dh2_6_a)))
-+ (set d1_a (arith-op (const #x0) product))
-+ (set im5_i_a Ix)))
-+ ()
-+ )
-+ )
-+)
-+(mul-arith-write-a amult zext add) ; AMULT
-+
-+; Fake instruction
-+; ----------------
-+
-+; AZOL
-+(dni azol "fake instruction for zero-overhead loop implementation"
-+ (AUDIO)
-+ "azol"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 AOP3_22_2 ARES3_19_0 ARES2_16_0 ARES5_14_0 ARES1_9_0 AOP3_8_1 AOP1_5_0 AFAKE5_4_1)
-+ (sequence ()
-+ (set (reg h-ar-lc) (sub (reg h-ar-lc) (const 1)))
-+ (if VOID (ne (reg h-ar-lc) (const 0))
-+ (sequence ()
-+ (set pc (reg h-ar-lb))))
-+ (c-code VOID "SET_AZOL_EVENT(current_cpu);\n")
-+ )
-+ ()
-+)
-+
-+; 16-bit data related instructions
-+; --------------------------------
-+
-+(define-pmacro (multiply-with-without-add-signed opcode srcA-type srcB-type arith-op)
-+ (dni (.sym opcode srcA-type srcB-type "s") (.str "multiply with/without add signed")
-+ (AUDIO MAC DX_REG)
-+ (.str opcode srcA-type srcB-type "s" " $d1_a,$ra5_a_" srcA-type ",$rb5_a_" srcB-type)
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode) (.upcase srcA-type) (.upcase srcB-type)) (.sym "ra5_a_" srcA-type) (.sym "rb5_a_" srcB-type) d1_a AOP3_8_0 AOP1_5_0 ARES5_4_1)
-+ (sequence ((DI product) (USI index))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase (.sym opcode srcA-type srcB-type s)) "_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext DI (.sym "ra5_a_" srcA-type)) (ext DI (.sym "rb5_a_" srcB-type))))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (if (eq arith-op (const 0))
-+ (set product (add d1_a product)))
-+ (set d1_a product))
-+ ()
-+ )
-+)
-+(multiply-with-without-add-signed ama b b 0) ; AMABBS
-+(multiply-with-without-add-signed ama b t 0) ; AMABTS
-+(multiply-with-without-add-signed ama t b 0) ; AMATBS
-+(multiply-with-without-add-signed ama t t 0) ; AMATTS
-+(multiply-with-without-add-signed am b b 1) ; AMBBS
-+(multiply-with-without-add-signed am b t 1) ; AMBTS
-+(multiply-with-without-add-signed am t b 1) ; AMTBS
-+(multiply-with-without-add-signed am t t 1) ; AMTTS
-+
-+
-+
-+(define-pmacro (multiply-with-without-add-signed-and-load opcode srcA-type srcB-type arith-op)
-+ (begin
-+
-+ ; load short-form
-+ (dni (.sym opcode srcA-type srcB-type "sl.s") (.str "multiply with/without add signed and load(short)")
-+ (AUDIO MAC DX_REG)
-+ (.str opcode srcA-type srcB-type "sl.s" " $d1_a,$ra5_a_" srcA-type ",$rb5_a_" srcB-type ",[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_2
-+ (.sym "AM_" (.upcase opcode) (.upcase srcA-type) (.upcase srcB-type))
-+ (.sym "ra5_a_" srcA-type)
-+ (.sym "rb5_a_" srcB-type)
-+ d1_a AOP3_8_2 AOP1_5_0 im1_4_a m2_3_a i2_1_a)
-+ (sequence ((DI product) (USI index) (USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI data) (USI Ix))
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase (.sym opcode srcA-type srcB-type)) "SL_S_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext DI (.sym "ra5_a_" srcA-type)) (ext DI (.sym "rb5_a_" srcB-type))))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+ (set data (mem USI adm_vaddr))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (if (eq arith-op (const 0))
-+ (set product (add d1_a product)))
-+
-+ (parallel ()
-+ (set d1_a product)
-+ (set ra5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data)"))
-+ (set im5_i_a Ix)))
-+ ()
-+ )
-+
-+ ; load long-form
-+ (dni (.sym opcode srcA-type srcB-type "sl.l") (.str "multiply with/without add signed and load(long)")
-+ (AUDIO)
-+ (.str opcode srcA-type srcB-type "sl.l" " $d1_a,$r10a5_a_" srcA-type ",$r10b5_a_" srcB-type ",$r10c5_a,[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_2
-+ (.sym "AM_" (.upcase opcode) (.upcase srcA-type) (.upcase srcB-type))
-+ ra4_19_a c1_15_a rb3_14_a rc2_11_a d1_a AOP3_8_3 rc1_5_a im1_4_a m2_3_a i2_1_a)
-+ (sequence ((DI product) (USI index) (USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI data) (USI Ix))
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase (.sym opcode srcA-type srcB-type)) "SL_L_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext DI (.sym "r10a5_a_" srcA-type)) (ext DI (.sym "r10b5_a_" srcB-type))))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+ (set data (mem USI adm_vaddr))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (if (eq arith-op (const 0))
-+ (set product (add d1_a product)))
-+
-+ (parallel ()
-+ (set d1_a product)
-+ (set r10c5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data)"))
-+ (set im5_i_a Ix)))
-+ ()
-+ )
-+
-+ ; load-2 short-form
-+ (dni (.sym opcode srcA-type srcB-type "sl2.s") (.str "multiply with/without add signed and load2(short)")
-+ (AUDIO)
-+ (.str opcode srcA-type srcB-type "sl2.s" " $d1_a,$ra5_a_" srcA-type ",$rb5p_a_" srcB-type ",[$im6_i_0_a],[$im6_i_1_a],$im6_m_0_a,$im6_m_1_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_2
-+ (.sym "AM_" (.upcase opcode) (.upcase srcA-type) (.upcase srcB-type))
-+ (.sym "ra5_a_" srcA-type) (.sym "rb5p_a_" srcB-type)
-+ d1_a AOP3_8_4 m2_5_a m2_3_a i2_1_a)
-+ (sequence ((DI product) (USI index) (USI adm_vbase) (USI adm_offset0) (USI adm_offset1) (USI adm_vaddr0) (USI adm_vaddr1) (USI data0) (USI data1) (USI Ix0) (USI Ix1))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase (.sym opcode srcA-type srcB-type)) "SL2_S_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext DI (.sym "ra5_a_" srcA-type)) (ext DI (.sym "rb5_a_" srcB-type))))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset0 (sll im6_i_0_a (const 2)))
-+ (set adm_offset1 (sll (c-call USI "nds32_ar_i_handler" (index-of im6_i_1_a)) (const 2)))
-+ (set adm_vaddr0 (or adm_vbase adm_offset0))
-+ (set adm_vaddr1 (or adm_vbase adm_offset1))
-+ (set data0 (mem USI adm_vaddr0))
-+ (set data1 (mem USI adm_vaddr1))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix0 (c-call USI "nds32_cbb_handler" (index-of im6_i_0_a) im6_m_0_a))
-+ (set Ix0 (add im6_i_0_a im6_m_0_a)))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix1 (c-call USI "nds32_cbb_handler" (index-of im6_i_1_a) im6_m_1_a))
-+ (set Ix1 (add im6_i_1_a im6_m_1_a)))
-+
-+ (if (eq arith-op (const 0))
-+ (set product (add d1_a product)))
-+
-+ (parallel ()
-+ (set d1_a product)
-+ (set ra5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data0)")))
-+
-+ (c-code VOID "current_cpu->data_in_DLM = 1;\n")
-+
-+ (parallel ()
-+ (set im6_i_0_a Ix0)
-+ (set rb5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data1)"))
-+ (set im6_i_1_a Ix1)))
-+ ()
-+ )
-+
-+ ; load-2 long-form
-+ (dni (.sym opcode srcA-type srcB-type "sl2.l") (.str "multiply with/without add signed and load2(long)")
-+ (AUDIO)
-+ (.str opcode srcA-type srcB-type "sl2.l" " $d1_a,$r10a5_a_" srcA-type ",$r10b5_a_" srcB-type ",$r10c5_0_a,$r10c5_1_a,[$im6_i_0_a],[$im6_i_1_a],$im6_m_0_a,$im6_m_1_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_2
-+ (.sym "AM_" (.upcase opcode) (.upcase srcA-type) (.upcase srcB-type))
-+ ra4_19_a c1_15_a rb3_14_a rc2_11_a d1_a AOP3_8_5 m2_5_a m2_3_a i2_1_a)
-+ (sequence ((DI product) (USI index) (USI adm_vbase) (USI adm_offset0) (USI adm_offset1) (USI adm_vaddr0) (USI adm_vaddr1) (USI data0) (USI data1) (USI Ix0) (USI Ix1))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase (.sym opcode srcA-type srcB-type)) "SL2_L_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext DI (.sym "r10a5_a_" srcA-type)) (ext DI (.sym "r10b5_a_" srcB-type))))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset0 (sll im6_i_0_a (const 2)))
-+ (set adm_offset1 (sll (c-call USI "nds32_ar_i_handler" (index-of im6_i_1_a)) (const 2)))
-+ (set adm_vaddr0 (or adm_vbase adm_offset0))
-+ (set adm_vaddr1 (or adm_vbase adm_offset1))
-+ (set data0 (mem USI adm_vaddr0))
-+ (set data1 (mem USI adm_vaddr1))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix0 (c-call USI "nds32_cbb_handler" (index-of im6_i_0_a) im6_m_0_a))
-+ (set Ix0 (add im6_i_0_a im6_m_0_a)))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix1 (c-call USI "nds32_cbb_handler" (index-of im6_i_1_a) im6_m_1_a))
-+ (set Ix1 (add im6_i_1_a im6_m_1_a)))
-+
-+ (if (eq arith-op (const 0))
-+ (set product (add d1_a product)))
-+
-+ (parallel ()
-+ (set d1_a product)
-+ (set r10c5_0_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data0)")))
-+
-+ (c-code VOID "current_cpu->data_in_DLM = 1;\n")
-+
-+ (parallel ()
-+ (set im6_i_0_a Ix0)
-+ (set r10c5_1_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data1)"))
-+ (set im6_i_1_a Ix1)))
-+ ()
-+ )
-+
-+ ; store-accumulator
-+ (dni (.sym opcode srcA-type srcB-type "ssa") (.str "multiply with/without add signed and store accumulator")
-+ (AUDIO)
-+ (.str opcode srcA-type srcB-type "ssa" " $d1_a,$ra5_a_" srcA-type ",$rb5_a_" srcB-type ",$dh2_6_a,[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_2
-+ (.sym "AM_" (.upcase opcode) (.upcase srcA-type) (.upcase srcB-type))
-+ (.sym "ra5_a_" srcA-type) (.sym "rb5_a_" srcB-type)
-+ d1_a AOP2_8_3 dh2_6_a im1_4_a m2_3_a i2_1_a)
-+ (sequence ((DI product) (USI index) (USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI Ix))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase (.sym opcode srcA-type srcB-type ssa)) "_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext DI (.sym "ra5_a_" srcA-type)) (ext DI (.sym "rb5_a_" srcB-type))))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (if (eq arith-op (const 0))
-+ (set product (add d1_a product)))
-+
-+ (parallel ()
-+ (set (mem USI adm_vaddr) (c-call USI "nds32_dr2am_handler" (index-of dh2_6_a)))
-+ (set d1_a product)
-+ (set im5_i_a Ix)))
-+ ()
-+ )
-+ )
-+)
-+(multiply-with-without-add-signed-and-load ama b b 0) ; AMABBS(L/L2/SA).x
-+(multiply-with-without-add-signed-and-load ama b t 0) ; AMABTS(L/L2/SA).x
-+(multiply-with-without-add-signed-and-load ama t b 0) ; AMATBS(L/L2/SA).x
-+(multiply-with-without-add-signed-and-load ama t t 0) ; AMATTS(L/L2/SA).x
-+(multiply-with-without-add-signed-and-load am b b 1) ; AMBBS(L/L2/SA).x
-+(multiply-with-without-add-signed-and-load am b t 1) ; AMBTS(L/L2/SA).x
-+(multiply-with-without-add-signed-and-load am t b 1) ; AMTBS(L/L2/SA).x
-+(multiply-with-without-add-signed-and-load am t t 1) ; AMTTS(L/L2/SA).x
-+
-+
-+
-+
-+(define-pmacro (multiply-with-without-add-signed-32b opcode srcB-type arith-op)
-+ (dni (.sym opcode srcB-type "s") (.str "multiply with/without add signed 32-bits")
-+ (AUDIO MAC DX_REG)
-+ (.str opcode srcB-type "s" " $d1_a,$ra5_a,$rb5_a_" srcB-type)
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 (.sym "AM_" (.upcase opcode) (.upcase srcB-type)) ra5_a (.sym "rb5_a_" srcB-type) d1_a AOP3_8_0 AOP1_5_0 ARES5_4_2)
-+ (sequence ((DI product) (USI index))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase (.sym opcode srcB-type s)) "_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext DI ra5_a) (ext DI (.sym "rb5_a_" srcB-type))))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (if (eq arith-op (const 0))
-+ (set product (add d1_a product)))
-+ (set d1_a product))
-+ ()
-+ )
-+)
-+(multiply-with-without-add-signed-32b amaw b 0) ; AMAWBS
-+(multiply-with-without-add-signed-32b amaw t 0) ; AMAWTS
-+(multiply-with-without-add-signed-32b amw b 1) ; AMWBS
-+(multiply-with-without-add-signed-32b amw t 1) ; AMWTS
-+
-+
-+(define-pmacro (multiply-with-without-add-signed-32b-and-load opcode srcB-type arith-op)
-+ (begin
-+ ; load short-form
-+ (dni (.sym opcode srcB-type "sl.s") (.str "multiply with/without add signed 32-bits and load(short)")
-+ (AUDIO MAC DX_REG)
-+ (.str opcode srcB-type "sl.s" " $d1_a,$ra5_a,$rb5_a_" srcB-type ",[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_1 (.sym "AM_" (.upcase opcode) (.upcase srcB-type)) ra5_a (.sym "rb5_a_" srcB-type) d1_a AOP3_8_2 AOP1_5_0 im1_4_a m2_3_a i2_1_a)
-+ (sequence ((DI product) (USI index) (USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI data) (USI Ix))
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase (.sym opcode srcB-type)) "SL_S_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext DI ra5_a) (ext DI (.sym "rb5_a_" srcB-type))))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+ (set data (mem USI adm_vaddr))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (if (eq arith-op (const 0))
-+ (set product (add d1_a product)))
-+
-+ (parallel ()
-+ (set d1_a product)
-+ (set ra5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data)"))
-+ (set im5_i_a Ix)))
-+ ()
-+ )
-+
-+ ; load long-form
-+ (dni (.sym opcode srcB-type "sl.l") (.str "multiply with/without add signed 32-bits and load(long)")
-+ (AUDIO)
-+ (.str opcode srcB-type "sl.l" " $d1_a,$r10a5_a,$r10b5_a_" srcB-type ",$r10c5_a,[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_1 (.sym "AM_" (.upcase opcode) (.upcase srcB-type)) ra4_19_a c1_15_a rb3_14_a rc2_11_a d1_a AOP3_8_3 rc1_5_a im1_4_a m2_3_a i2_1_a)
-+ (sequence ((DI product) (USI index) (USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI data) (USI Ix))
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase (.sym opcode srcB-type)) "SL_L_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext DI r10a5_a) (ext DI (.sym "r10b5_a_" srcB-type))))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+ (set data (mem USI adm_vaddr))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (if (eq arith-op (const 0))
-+ (set product (add d1_a product)))
-+
-+ (parallel ()
-+ (set d1_a product)
-+ (set r10c5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data)"))
-+ (set im5_i_a Ix)))
-+ ()
-+ )
-+
-+ ; load-2 short-form
-+ (dni (.sym opcode srcB-type "sl2.s") (.str "multiply with/without add signed 32-bits and load2(short)")
-+ (AUDIO)
-+ (.str opcode srcB-type "sl2.s" " $d1_a,$ra5_a,$rb5p_a_" srcB-type ",[$im6_i_0_a],[$im6_i_1_a],$im6_m_0_a,$im6_m_1_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_1 (.sym "AM_" (.upcase opcode) (.upcase srcB-type)) ra5_a (.sym "rb5p_a_" srcB-type) d1_a AOP3_8_4 m2_5_a m2_3_a i2_1_a)
-+ (sequence ((DI product) (USI index) (USI adm_vbase) (USI adm_offset0) (USI adm_offset1) (USI adm_vaddr0) (USI adm_vaddr1) (USI data0) (USI data1) (USI Ix0) (USI Ix1))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase (.sym opcode srcB-type)) "SL2_S_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext DI ra5_a) (ext DI (.sym "rb5_a_" srcB-type))))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset0 (sll im6_i_0_a (const 2)))
-+ (set adm_offset1 (sll (c-call USI "nds32_ar_i_handler" (index-of im6_i_1_a)) (const 2)))
-+ (set adm_vaddr0 (or adm_vbase adm_offset0))
-+ (set adm_vaddr1 (or adm_vbase adm_offset1))
-+ (set data0 (mem USI adm_vaddr0))
-+ (set data1 (mem USI adm_vaddr1))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix0 (c-call USI "nds32_cbb_handler" (index-of im6_i_0_a) im6_m_0_a))
-+ (set Ix0 (add im6_i_0_a im6_m_0_a)))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix1 (c-call USI "nds32_cbb_handler" (index-of im6_i_1_a) im6_m_1_a))
-+ (set Ix1 (add im6_i_1_a im6_m_1_a)))
-+
-+ (if (eq arith-op (const 0))
-+ (set product (add d1_a product)))
-+
-+ (parallel ()
-+ (set d1_a product)
-+ (set ra5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data0)")))
-+
-+ (c-code VOID "current_cpu->data_in_DLM = 1;\n")
-+
-+ (parallel ()
-+ (set im6_i_0_a Ix0)
-+ (set rb5_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data1)"))
-+ (set im6_i_1_a Ix1)))
-+ ()
-+ )
-+
-+ ; load-2 long-form
-+ (dni (.sym opcode srcB-type "sl2.l") (.str "multiply with/without add signed 32-bits and load2(long)")
-+ (AUDIO)
-+ (.str opcode srcB-type "sl2.l" " $d1_a,$r10a5_a,$r10b5_a_" srcB-type ",$r10c5_0_a,$r10c5_1_a,[$im6_i_0_a],[$im6_i_1_a],$im6_m_0_a,$im6_m_1_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_1 (.sym "AM_" (.upcase opcode) (.upcase srcB-type)) ra4_19_a c1_15_a rb3_14_a rc2_11_a d1_a AOP3_8_5 m2_5_a m2_3_a i2_1_a)
-+ (sequence ((DI product) (USI index) (USI adm_vbase) (USI adm_offset0) (USI adm_offset1) (USI adm_vaddr0) (USI adm_vaddr1) (USI data0) (USI data1) (USI Ix0) (USI Ix1))
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase (.sym opcode srcB-type)) "SL2_L_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set DI product (mul (ext DI r10a5_a) (ext DI (.sym "r10b5_a_" srcB-type))))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset0 (sll im6_i_0_a (const 2)))
-+ (set adm_offset1 (sll (c-call USI "nds32_ar_i_handler" (index-of im6_i_1_a)) (const 2)))
-+ (set adm_vaddr0 (or adm_vbase adm_offset0))
-+ (set adm_vaddr1 (or adm_vbase adm_offset1))
-+ (set data0 (mem USI adm_vaddr0))
-+ (set data1 (mem USI adm_vaddr1))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix0 (c-call USI "nds32_cbb_handler" (index-of im6_i_0_a) im6_m_0_a))
-+ (set Ix0 (add im6_i_0_a im6_m_0_a)))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix1 (c-call USI "nds32_cbb_handler" (index-of im6_i_1_a) im6_m_1_a))
-+ (set Ix1 (add im6_i_1_a im6_m_1_a)))
-+
-+ (if (eq arith-op (const 0))
-+ (set product (add d1_a product)))
-+
-+ (parallel ()
-+ (set d1_a product)
-+ (set r10c5_0_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data0)")))
-+
-+ (c-code VOID "current_cpu->data_in_DLM = 1;\n")
-+
-+ (parallel ()
-+ (set im6_i_0_a Ix0)
-+ (set r10c5_1_a (c-code USI "nds32_audio_am2gr_handler(current_cpu, tmp_data1)"))
-+ (set im6_i_1_a Ix1)))
-+ ()
-+ )
-+
-+ ; store-accumulator
-+ (dni (.sym opcode srcB-type "ssa") (.str "multiply with/without add signed 32-bits and store accumulator")
-+ (AUDIO)
-+ (.str opcode srcB-type "ssa" " $d1_a,$ra5_a,$rb5_a_" srcB-type ",$dh2_6_a,[$im5_i_a],$im5_m_a")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_1 (.sym "AM_" (.upcase opcode) (.upcase srcB-type)) ra5_a (.sym "rb5_a_" srcB-type) d1_a AOP2_8_3 dh2_6_a im1_4_a m2_3_a i2_1_a)
-+ (sequence ((DI product) (USI index) (USI adm_vbase) (USI adm_offset) (USI adm_vaddr) (USI Ix))
-+
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase (.sym opcode srcB-type ssa)) "_interruption;\n\n"))
-+
-+ (set index (index-of d1_a))
-+ (set product (mul (ext DI ra5_a) (ext DI (.sym "rb5_a_" srcB-type))))
-+ (if VOID (c-code VOID "1 == GET_SHFT_CTL_EN(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (if VOID (c-code VOID "0 == GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")
-+ (set product (sll product (const 1)))
-+ (set product (sra product (c-code USI "GET_SHFT_CTL_AMT(CPU(h_ar_shft_ctl[tmp_index]))")))))
-+ (set adm_vbase (c-code USI "CPU(h_ar_adm_vbase)"))
-+ (set adm_offset (sll (c-call USI "nds32_ar_i_handler" (index-of im5_i_a)) (const 2)))
-+ (set adm_vaddr (or adm_vbase adm_offset))
-+
-+ (if VOID (c-code VOID "TEST_MOD_CBF(CPU(h_ar_mod))")
-+ (set Ix (c-call USI "nds32_cbb_handler" (index-of im5_i_a) im5_m_a))
-+ (set Ix (add im5_i_a im5_m_a)))
-+
-+ (if (eq arith-op (const 0))
-+ (set product (add d1_a product)))
-+
-+ (parallel ()
-+ (set (mem USI adm_vaddr) (c-call USI "nds32_dr2am_handler" (index-of dh2_6_a)))
-+ (set d1_a product)
-+ (set im5_i_a Ix)))
-+ ()
-+ )
-+ )
-+)
-+(multiply-with-without-add-signed-32b-and-load amaw b 0) ; AMAWBS(L/L2/SA).x
-+(multiply-with-without-add-signed-32b-and-load amaw t 0) ; AMAWTS(L/L2/SA).x
-+(multiply-with-without-add-signed-32b-and-load amw b 1) ; AMWBS(L/L2/SA).x
-+(multiply-with-without-add-signed-32b-and-load amw t 1) ; AMWTS(L/L2/SA).x
-+
-+
-+; Circular Buffer Option Instructions
-+; -----------------------------------
-+;AMFAR2
-+(dni amfar2 "move content of a audio extension register into a general register for circula buffer mechanism"
-+ (AUDIO)
-+ "amfar2 $rd5_a,$ar2idx5_a"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 AOP3_22_3 rd5_a ARES5_14_0 ARES1_9_1 AOP3_8_1 AOP1_5_1 ar2idx5_a)
-+ (sequence ((USI data))
-+ ;Reserved instruction exception have higher priority
-+ (set data (c-call USI "nds32_mf2_aridx_handler" pc ar2idx5_a))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto AMFAR2_interruption;\n")
-+
-+
-+ ;Audio exist/disable exception check
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(MSC_CFG,AUDIO)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))
-+ (if VOID (c-code VOID "!TEST_H_SR_FLD(FUCOP_CTL,AUEN)")
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_SWID(current_cpu) = AUDIO_DISABLE_EPT; //set subtype, CPID is don't care\n")
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n"))))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto AMFAR2_interruption;\n")
-+
-+ ;Set the value
-+ (set rd5_a data)
-+ )
-+ ()
-+)
-+
-+;AMTAR2
-+(dni amtar2 "move content of a general register into a audio extension register for circula buffer mechanism"
-+ (AUDIO)
-+ "amtar2 $rd5_a,$ar2idx5_a"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_AEXT AOP2_24_0 AOP3_22_3 rd5_a ARES5_14_0 ARES1_9_1 AOP3_8_1 AOP1_5_0 ar2idx5_a)
-+ (sequence ()
-+ (c-call VOID "nds32_mt2_aridx_handler" pc ra5_a aridx5_a)
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto AMTAR2_interruption;\n\n"))
-+ ()
-+)
-+
-+
-diff -Nur binutils-2.24.orig/cgen/cpu/nds32cop.cpu binutils-2.24/cgen/cpu/nds32cop.cpu
---- binutils-2.24.orig/cgen/cpu/nds32cop.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds32cop.cpu 2016-06-30 21:26:12.633892334 +0200
-@@ -0,0 +1,507 @@
-+; ==============================================================================
-+; Andes NDS32 family Co-processor extension -*- Scheme -*-
-+; Andes Technology Corporation
-+; ==============================================================================
-+
-+; ==============================================================================
-+; Instruction fields
-+; ==============================================================================
-+; Physical fields
-+; ---------------
-+(df f-32-19_7 "19 bits from bit field 7" () 7 19 UINT #f #f)
-+(df f-32-12_12 "12 bits from bit field 12" () 12 12 UINT #f #f)
-+(dnf f-32-2_26 "2 bits from bit field 26" () 26 2)
-+
-+; ==============================================================================
-+; Hardware pieces.
-+; ==============================================================================
-+(dnh h-uimm19 "unsigned immediate 19 bits" ()
-+ (immediate (UINT 19))
-+ () () ()
-+)
-+
-+(dnh h-uimm12 "unsigned immediate 12 bits" ()
-+ (immediate (UINT 12))
-+ () () ()
-+)
-+
-+(dnh h-uimm2 "unsigned immediate 2 bits" ()
-+ (immediate (UINT 2))
-+ () () ()
-+)
-+
-+(define-keyword
-+ (name cpr-names)
-+ (print-name h-cop-dr)
-+ (prefix "$")
-+ (values
-+ (cpr0 0) (cpr1 1) (cpr2 2) (cpr3 3) (cpr4 4) (cpr5 5) (cpr6 6) (cpr7 7)
-+ (cpr8 8) (cpr9 9) (cpr10 10) (cpr11 11) (cpr12 12) (cpr13 13) (cpr14 14) (cpr15 15)
-+ (cpr16 16) (cpr17 17) (cpr18 18) (cpr19 19) (cpr20 20) (cpr21 21) (cpr22 22) (cpr23 23)
-+ (cpr24 24) (cpr25 25) (cpr26 26) (cpr27 27) (cpr28 28) (cpr29 29) (cpr30 30) (cpr31 31)
-+ )
-+)
-+
-+(define-hardware
-+ (name h-cop0-dr)
-+ (comment "coprocessor 64-bits registers")
-+ (attrs PROFILE)
-+ (type register UDI (32))
-+ (indices extern-keyword cpr-names)
-+)
-+
-+(define-hardware
-+ (name h-cop0-wr)
-+ (comment "coprocessor 32-bits registers")
-+ (attrs PROFILE)
-+ (type register USI (32))
-+ (indices extern-keyword cpr-names)
-+)
-+
-+(define-hardware
-+ (name h-cop1-dr)
-+ (comment "coprocessor 64-bits registers")
-+ (attrs PROFILE)
-+ (type register UDI (32))
-+ (indices extern-keyword cpr-names)
-+)
-+
-+(define-hardware
-+ (name h-cop1-wr)
-+ (comment "coprocessor 32-bits registers")
-+ (attrs PROFILE)
-+ (type register USI (32))
-+ (indices extern-keyword cpr-names)
-+)
-+
-+(define-hardware
-+ (name h-cop2-dr)
-+ (comment "coprocessor 64-bits registers")
-+ (attrs PROFILE)
-+ (type register UDI (32))
-+ (indices extern-keyword cpr-names)
-+)
-+
-+(define-hardware
-+ (name h-cop2-wr)
-+ (comment "coprocessor 32-bits registers")
-+ (attrs PROFILE)
-+ (type register USI (32))
-+ (indices extern-keyword cpr-names)
-+)
-+
-+(define-hardware
-+ (name h-cop3-dr)
-+ (comment "coprocessor 64-bits registers")
-+ (attrs PROFILE)
-+ (type register UDI (32))
-+ (indices extern-keyword cpr-names)
-+)
-+
-+(define-hardware
-+ (name h-cop3-wr)
-+ (comment "coprocessor 32-bits registers")
-+ (attrs PROFILE)
-+ (type register USI (32))
-+ (indices extern-keyword cpr-names)
-+)
-+
-+; ==============================================================================
-+; declare operands
-+; ==============================================================================
-+(define-operand
-+ (name uimm19)
-+ (comment "19 bit unsigned immediate value")
-+ (attrs HASH-PREFIX)
-+ (type h-uimm19)
-+ (index f-32-19_7)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name uimm12)
-+ (comment "12 bit unsigned immediate value")
-+ (attrs HASH-PREFIX)
-+ (type h-uimm12)
-+ (index f-32-12_12)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name cpid)
-+ (comment "2 bit unsigned coprocessor number value")
-+ (attrs HASH-PREFIX)
-+ (type h-uimm2)
-+ (index f-32-2_26)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name cpid2)
-+ (comment "2 bit unsigned coprocessor number value version 2")
-+ (attrs HASH-PREFIX)
-+ (type h-uimm2)
-+ (index f-32tx-2_17)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+
-+; ==============================================================================
-+; Opcode operands
-+; ==============================================================================
-+(dnop copdr "Coprocessor defined 64-bits register" () h-cop0-dr f-32-rt5)
-+(dnop copwr "Coprocessor defined 32-bits register" () h-cop0-wr f-32-rt5)
-+
-+
-+; ==============================================================================
-+; Instruction field enums
-+; ==============================================================================
-+; f-32tx-2_28: cpe group, bits 28-29 (2 bits)
-+(define-normal-insn-enum COP_CPEG "cpe group enums" () COP_CPEG_ f-32tx-2_28
-+ ("0" "1" "2" "3")
-+)
-+
-+; f-32tx-2_24 : mfcp/mtcp group, bits 24-25 (2 bits)
-+(define-normal-insn-enum MFTCP "mfcp/mtcp group enums" () MFTCP_ f-32tx-2_24
-+ ("W" "D" "2" "PW")
-+)
-+
-+; f-32tx-2_30 : general coprocessor sub-code, bits 30-31 (2 bits)
-+(define-pmacro (gen-cop-sub-opcode major group enum-list)
-+ (define-normal-insn-enum (.sym major group) (.str "cpe code enums in cpe group" group) () (.sym major group "_") f-32tx-2_30 enum-list)
-+)
-+(gen-cop-sub-opcode COP_CPEG 0 ("CPE1" "MFCP" "CPLW" "CPLD"))
-+(gen-cop-sub-opcode COP_CPEG 1 ("CPE2" "1" "2" "3"))
-+(gen-cop-sub-opcode COP_CPEG 2 ("CPE3" "MTCP" "CPSW" "CPSD"))
-+(gen-cop-sub-opcode COP_CPEG 3 ("CPE4" "1" "2" "3"))
-+
-+
-+; ==============================================================================
-+; Instructions
-+; ==============================================================================
-+;coprocessor execution instruction
-+(define-pmacro (cop_execution serial_no opcode cpid)
-+ (begin
-+ (define-full-insn (.sym "cpe" serial_no "_cp" cpid) (.str "cpe" serial_no "_cp" cpid)
-+ (COP)
-+ (.str "cpe" serial_no " cp" cpid ",$uimm19")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP uimm19 (.sym "COP_0_CP26_" cpid) (.sym "COP_CPEG_" opcode) (.sym "COP_CPEG" opcode "_CPE" serial_no))
-+ ()
-+ (sequence()
-+ (c-call VOID (.str "\tnds32_cpe" serial_no "_handler") pc cpid uimm19)
-+ (c-code VOID "\tif (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID (.str "\t\tgoto CPE" serial_no "_CP" cpid "_interruption;\n"))
-+ (c-code VOID "\t}\n"))
-+ ()
-+ ((print (.str "insn-special2" serial_no)))
-+ )
-+ )
-+)
-+(cop_execution 1 0 1)
-+(cop_execution 1 0 2)
-+(cop_execution 1 0 3)
-+(cop_execution 2 1 1)
-+(cop_execution 2 1 2)
-+(cop_execution 2 1 3)
-+(cop_execution 3 2 1)
-+(cop_execution 3 2 2)
-+(cop_execution 3 2 3)
-+(cop_execution 4 3 1)
-+(cop_execution 4 3 2)
-+(cop_execution 4 3 3)
-+
-+;coprocessor load instruction
-+(define-pmacro (cpls load_store_type subopcode data_type function_type cpid)
-+ (begin
-+ ;cpld/cplw
-+ ;cpsd/cpsw
-+ (define-full-insn
-+ (.sym "cp" load_store_type data_type "_cp" cpid)
-+ (.str "cp" load_store_type data_type "_cp" cpid)
-+ (COP)
-+ (.str "cp" load_store_type data_type " cp" cpid ",$cop" data_type "r,[$ra5+$rb5<<$si]")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP (.sym "cop" data_type "r") ra5 rb5 si FPU_SUB1_24_0 RES1_25_0 (.sym "COP_0_CP26_" cpid) (.sym "COP_CPEG_" subopcode) (.sym "COP_CPEG" subopcode "_CP" (.upcase load_store_type) (.upcase data_type)))
-+ ()
-+ (sequence()
-+ (c-call VOID (.str "nds32_f" load_store_type function_type "_handler") pc cpid (index-of (.sym "cop" data_type "r")) (index-of ra5) (index-of rb5) si (const 0))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (CPU_INT_ARGS_ICODE(current_cpu) != NDS32_ICODE_DNDEB_A) {\n")
-+ (c-code VOID (.str " goto CP" (.upcase load_store_type) (.upcase data_type) "_CP" cpid "_interruption;\n"))
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+ ((print "insn-special31"))
-+ )
-+
-+ (dnmi
-+ (.sym "cp" load_store_type data_type "_cp" cpid "_1")
-+ (.str "cp" load_store_type data_type "_cp" cpid "_1")
-+ (COP NO-DIS)
-+ (.str "cp" load_store_type data_type " cp" cpid ",$cop" data_type "r,[$ra5+($rb5<<$si)]")
-+ (emit (.sym "cp" load_store_type data_type "_cp" cpid) (.sym "cop" data_type "r") ra5 rb5 si)
-+ )
-+
-+ (dnmi
-+ (.sym "cp" load_store_type data_type "_cp" cpid "_2")
-+ (.str "cp" load_store_type data_type "_cp" cpid "_2")
-+ (COP NO-DIS)
-+ (.str "cp" load_store_type data_type " cp" cpid ",$cop" data_type "r,[$ra5+$rb5]")
-+ (emit (.sym "cp" load_store_type data_type "_cp" cpid) (.sym "cop" data_type "r") ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+
-+ (dnmi
-+ (.sym "cp" load_store_type data_type "_cp" cpid "_3")
-+ (.str "cp" load_store_type data_type "_cp" cpid "_3")
-+ (COP NO-DIS)
-+ (.str "cp" load_store_type data_type " cp" cpid ",$cop" data_type "r,[$ra5]")
-+ (emit (.sym "cp" load_store_type data_type "_cp" cpid) (.sym "cop" data_type "r") ra5 (f-32-rb5 0) (f-32t3-sub10si 0))
-+ )
-+
-+ ;cpld.bi/cplw.bi
-+ ;cpsd.bi/cpsw.bi
-+ (define-full-insn
-+ (.sym "cp" load_store_type data_type ".bi_cp" cpid)
-+ (.str "cp" load_store_type data_type ".bi_cp" cpid)
-+ (COP)
-+ (.str "cp" load_store_type data_type ".bi cp" cpid ",$cop" data_type "r,[$ra5],$rb5<<$si")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP (.sym "cop" data_type "r") ra5 rb5 si FPU_SUB1_24_1 RES1_25_0 (.sym "COP_0_CP26_" cpid) (.sym "COP_CPEG_" subopcode) (.sym "COP_CPEG" subopcode "_CP" (.upcase load_store_type) (.upcase data_type)))
-+ ()
-+ (sequence()
-+ (c-call VOID (.str "nds32_f" load_store_type function_type "_handler") pc cpid (index-of (.sym "cop" data_type "r")) (index-of ra5) (index-of rb5) si (const 1))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (CPU_INT_ARGS_ICODE(current_cpu) != NDS32_ICODE_DNDEB_A) {\n")
-+ (c-code VOID (.str " goto CP" (.upcase load_store_type) (.upcase data_type) "_BI_CP" cpid "_interruption;\n"))
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+ ((print "insn-special32"))
-+ )
-+
-+ (dnmi
-+ (.sym "cp" load_store_type data_type ".bi_cp" cpid "_1")
-+ (.str "cp" load_store_type data_type ".bi_cp" cpid "_1")
-+ (COP NO-DIS)
-+ (.str "cp" load_store_type data_type ".bi cp" cpid ",$cop" data_type "r,[$ra5],($rb5<<$si)")
-+ (emit (.sym "cp" load_store_type data_type ".bi_cp" cpid) (.sym "cop" data_type "r") ra5 rb5 si)
-+ )
-+
-+ (dnmi
-+ (.sym "cp" load_store_type data_type ".bi_cp" cpid "_2")
-+ (.str "cp" load_store_type data_type ".bi_cp" cpid "_2")
-+ (COP NO-DIS)
-+ (.str "cp" load_store_type data_type ".bi cp" cpid ",$cop" data_type "r,[$ra5],$rb5")
-+ (emit (.sym "cp" load_store_type data_type ".bi_cp" cpid) (.sym "cop" data_type "r") ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+
-+ (dnmi
-+ (.sym "cp" load_store_type data_type ".bi_cp" cpid "_3")
-+ (.str "cp" load_store_type data_type ".bi_cp" cpid "_3")
-+ (COP NO-DIS)
-+ (.str "cp" load_store_type data_type ".bi cp" cpid ",$cop" data_type "r,[$ra5]")
-+ (emit (.sym "cp" load_store_type data_type ".bi_cp" cpid) (.sym "cop" data_type "r") ra5 (f-32-rb5 0) (f-32t3-sub10si 0))
-+ )
-+
-+ ;cpldi/cplwi
-+ ;cpsdi/cpswi
-+ (define-full-insn
-+ (.sym "cp" load_store_type data_type "i_cp" cpid)
-+ (.str "cp" load_store_type data_type "i_cp" cpid)
-+ (COP)
-+ (.str "cp" load_store_type data_type "i cp" cpid ",$cop" data_type "r,[$ra5+$slo12" data_type "]")
-+ (+ IFMT_32 OPC6G_3 (.sym "OPC6C3_" (.upcase load_store_type) (.upcase data_type) "C") (.sym "cop" data_type "r") ra5 (.sym "COP_0_CP17_" cpid) FPU_SUB1_19_0 (.sym "slo12" data_type))
-+ ()
-+ (sequence()
-+ (c-call VOID (.str "nds32_f" load_store_type function_type "i_handler") pc cpid (index-of (.sym "cop" data_type "r")) (index-of ra5) (.sym "slo12" data_type) (const 0))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (CPU_INT_ARGS_ICODE(current_cpu) != NDS32_ICODE_DNDEB_A) {\n")
-+ (c-code VOID (.str " goto CP" (.upcase load_store_type) (.upcase data_type) "I_CP" cpid "_interruption;\n"))
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+ ((print "insn-special33"))
-+ )
-+
-+ (dnmi
-+ (.sym "cp" load_store_type data_type "i_cp" cpid "_1")
-+ (.str "cp" load_store_type data_type "i_cp" cpid "_1")
-+ (COP NO-DIS)
-+ (.str "cp" load_store_type data_type "i cp" cpid ",$cop" data_type "r,[$ra5]")
-+ (emit (.sym "cp" load_store_type data_type "i_cp" cpid) (.sym "cop" data_type "r") ra5 ((.sym "f-32tx-slo12" data_type) 0))
-+ )
-+
-+ ;cpldi.bi/cplwi.bi
-+ ;cpsdi.bi/cpswi.bi
-+ (define-full-insn
-+ (.sym "cp" load_store_type data_type "i.bi_cp" cpid)
-+ (.str "cp" load_store_type data_type "i.bi_cp" cpid)
-+ (COP)
-+ (.str "cp" load_store_type data_type "i.bi cp" cpid ",$cop" data_type "r,[$ra5],$slo12" data_type)
-+ (+ IFMT_32 OPC6G_3 (.sym "OPC6C3_" (.upcase load_store_type) (.upcase data_type) "C") (.sym "cop" data_type "r") ra5 (.sym "COP_0_CP17_" cpid) FPU_SUB1_19_1 (.sym "slo12" data_type))
-+ ()
-+ (sequence()
-+ (c-call VOID (.str "nds32_f" load_store_type function_type "i_handler") pc cpid (index-of (.sym "cop" data_type "r")) (index-of ra5) (.sym "slo12" data_type) (const 1))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (CPU_INT_ARGS_ICODE(current_cpu) != NDS32_ICODE_DNDEB_A) {\n")
-+ (c-code VOID (.str " goto CP" (.upcase load_store_type) (.upcase data_type) "I_BI_CP" cpid "_interruption;\n"))
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+ ((print "insn-special34"))
-+ )
-+
-+ (dnmi
-+ (.sym "cp" load_store_type data_type "i.bi_cp" cpid "_1")
-+ (.str "cp" load_store_type data_type "i.bi_cp" cpid "_1")
-+ (COP NO-DIS)
-+ (.str "cp" load_store_type data_type "i.bi cp" cpid ",$cop" data_type "r,[$ra5]")
-+ (emit (.sym "cp" load_store_type data_type "i.bi_cp" cpid) (.sym "cop" data_type "r") ra5 ((.sym "f-32tx-slo12" data_type) 0))
-+ )
-+ )
-+)
-+(cpls l 0 d d 1)
-+(cpls l 0 d d 2)
-+(cpls l 0 d d 3)
-+(cpls l 0 w s 1)
-+(cpls l 0 w s 2)
-+(cpls l 0 w s 3)
-+(cpls s 2 d d 1)
-+(cpls s 2 d d 2)
-+(cpls s 2 d d 3)
-+(cpls s 2 w s 1)
-+(cpls s 2 w s 2)
-+(cpls s 2 w s 3)
-+
-+;coprocessor move from/to instruction
-+(define-pmacro (cop_mtfd cpid)
-+ (begin
-+ ;mfcpd
-+ (define-full-insn
-+ (.sym "mfcpd_cp" cpid)
-+ (.str "mfcpd_cp" cpid)
-+ (COP)
-+ (.str "mfcpd cp" cpid ",$rt5,$uimm12")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP rt5 uimm12 MFTCP_D (.sym "COP_0_CP26_" cpid) COP_CPEG_0 COP_CPEG0_MFCP)
-+ ()
-+ (sequence()
-+ (c-call VOID (.str "nds32_mfcpd_handler") pc cpid (index-of rt5) uimm12)
-+ (c-code VOID "\tif (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID (.str "\t goto MFCPD_CP" cpid "_interruption;\n"))
-+ (c-code VOID "\t}\n"))
-+ ()
-+ ((print "insn-special4"))
-+ )
-+
-+ ;mtcpd
-+ (define-full-insn
-+ (.sym "mtcpd_cp" cpid)
-+ (.str "mtcpd_cp" cpid)
-+ (COP)
-+ (.str "mtcpd cp" cpid ",$rt5,$uimm12")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP rt5 uimm12 MFTCP_D (.sym "COP_0_CP26_" cpid) COP_CPEG_2 COP_CPEG2_MTCP)
-+ ()
-+ (sequence()
-+ (c-call VOID (.str "nds32_mtcpd_handler") pc cpid (index-of rt5) uimm12)
-+ (c-code VOID "\tif (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID (.str "\t\tgoto MTCPD_CP" cpid "_interruption;\n"))
-+ (c-code VOID "\t}\n"))
-+ ()
-+ ((print "insn-special6"))
-+ )
-+ )
-+)
-+(cop_mtfd 1)
-+(cop_mtfd 2)
-+(cop_mtfd 3)
-+
-+
-+;coprocessor move from/to instruction
-+(define-pmacro (cop_mtfw cpid)
-+ (begin
-+ ;mfcpw
-+ (define-full-insn (.sym "mfcpw_cp" cpid) (.str "mfcpw_cp" cpid)
-+ (COP)
-+ (.str "mfcpw cp" cpid ",$rt5,$uimm12")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP rt5 uimm12 MFTCP_W (.sym "COP_0_CP26_" cpid) COP_CPEG_0 COP_CPEG0_MFCP)
-+ ()
-+ (sequence()
-+ (c-call VOID (.str "nds32_mfcpw_handler") pc cpid (index-of rt5) uimm12)
-+ (c-code VOID "\tif (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID (.str "\t goto MFCPW_CP" cpid "_interruption;\n"))
-+ (c-code VOID "\t}\n"))
-+ ()
-+ ((print "insn-special3"))
-+ )
-+
-+ ;mtcpw
-+ (define-full-insn (.sym "mtcpw_cp" cpid) (.str "mtcpw_cp" cpid)
-+ (COP)
-+ (.str "mtcpw cp" cpid ",$rt5,$uimm12")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP rt5 uimm12 MFTCP_W (.sym "COP_0_CP26_" cpid) COP_CPEG_2 COP_CPEG2_MTCP)
-+ ()
-+ (sequence()
-+ (c-call VOID (.str "nds32_mtcpw_handler") pc cpid (index-of rt5) uimm12)
-+ (c-code VOID "\tif (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID (.str "\t\tgoto MTCPW_CP" cpid "_interruption;\n"))
-+ (c-code VOID "\t}\n"))
-+ ()
-+ ((print "insn-special5"))
-+ )
-+ )
-+)
-+(cop_mtfw 1)
-+(cop_mtfw 2)
-+(cop_mtfw 3)
-+
-+;coprocessor move from/to instruction (privileged scope)
-+(define-pmacro (cop_mtfpw cpid)
-+ (begin
-+ ;mfcppw
-+ (define-full-insn (.sym "mfcppw_cp" cpid) (.str "mfcppw_cp" cpid)
-+ (COPV2)
-+ (.str "mfcppw cp" cpid ",$rt5,$uimm12")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP rt5 uimm12 MFTCP_PW (.sym "COP_0_CP26_" cpid) COP_CPEG_0 COP_CPEG0_MFCP)
-+ ()
-+ (sequence()
-+ (c-call VOID (.str "nds32_mfcppw_handler") pc cpid (index-of rt5) uimm12)
-+ (c-code VOID "\tif (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID (.str "\t goto MFCPPW_CP" cpid "_interruption;\n"))
-+ (c-code VOID "\t}\n"))
-+ ()
-+ ((print "insn-special7"))
-+ )
-+
-+ ;mtcppw
-+ (define-full-insn (.sym "mtcppw_cp" cpid) (.str "mtcppw_cp" cpid)
-+ (COPV2)
-+ (.str "mtcppw cp" cpid ",$rt5,$uimm12")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP rt5 uimm12 MFTCP_PW (.sym "COP_0_CP26_" cpid) COP_CPEG_2 COP_CPEG2_MTCP)
-+ ()
-+ (sequence()
-+ (c-call VOID (.str "nds32_mtcppw_handler") pc cpid (index-of rt5) uimm12)
-+ (c-code VOID "\tif (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID (.str "\t\tgoto MTCPPW_CP" cpid "_interruption;\n"))
-+ (c-code VOID "\t}\n"))
-+ ()
-+ ((print "insn-special8"))
-+ )
-+ )
-+)
-+(cop_mtfpw 1)
-+(cop_mtfpw 2)
-+(cop_mtfpw 3)
-diff -Nur binutils-2.24.orig/cgen/cpu/nds32.cpu binutils-2.24/cgen/cpu/nds32.cpu
---- binutils-2.24.orig/cgen/cpu/nds32.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds32.cpu 2016-06-30 21:26:12.633892334 +0200
-@@ -0,0 +1,3501 @@
-+; ==============================================================================
-+; Andes NDS32 family CPU description. -*- Scheme -*-
-+; Andes Technology Corporation
-+; ==============================================================================
-+(include "simplify.inc")
-+
-+; ==============================================================================
-+; Andes patch to CGEN - currently only extension allowed
-+; ==============================================================================
-+(include "andes.inc")
-+
-+; ==============================================================================
-+; Architecture definition
-+; define-arch must appear first and it defines the whole architecture.
-+; ==============================================================================
-+(define-arch
-+ (name nds32) ; name of cpu family
-+ (comment "Andes NDS32")
-+ (default-alignment unaligned)
-+ (insn-lsb0? #f)
-+; (machs n1 n1p n1h n1ph)
-+; (machs n1h)
-+ (machs n1h n1h_v2 n1h_v3 n1h_v3m)
-+ (isas nds32)
-+)
-+
-+; ==============================================================================
-+; Attributes.
-+; ==============================================================================
-+; An attribute to describe which pipeline an insn runs in.
-+
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name PIPE)
-+ (comment "parallel execution pipeline selection")
-+ (values NONE O S OS)
-+)
-+
-+; A derived attribute that says which insns can be executed in parallel
-+; with others. This is a required attribute for architectures with
-+; parallel execution.
-+
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name PARALLEL)
-+ (attrs META) ; do not define in any generated file for now
-+ (values NO YES)
-+ (default (if (eq-attr (current-insn) PIPE NONE) (symbol NO) (symbol YES)))
-+)
-+
-+; ==============================================================================
-+; Instruction set architecture parameters.
-+; ==============================================================================
-+(define-isa
-+ (name nds32)
-+ (default-insn-bitsize 32)
-+ (base-insn-bitsize 32)
-+ (default-insn-word-bitsize 32)
-+ (liw-insns 1)
-+ (parallel-insns 1)
-+ (decode-assist (0 1 2 3 4))
-+)
-+
-+; ==============================================================================
-+; CPU family definitions
-+; This defines a 'CPU family' which is a programmer specified collection of
-+; related matchines. Machines in a family are sufficiently similar that the
-+; simulator semantic code can handle any differences at run time. At least one
-+; CPU must be defined.
-+; ==============================================================================
-+;(define-cpu
-+ ; cpu names must be distinct from the architecture name and machine names.
-+ ; The "b" suffix stands for "base" and is the convention.
-+ ; The "f" suffix stands for "family" and is the convention.
-+; (name nds32bf)
-+; (comment "Andes NDS32 base family")
-+; (endian either)
-+; (insn-endian big)
-+; (word-bitsize 32)
-+; (parallel-insns 1)
-+;)
-+
-+;(define-cpu
-+; ; The "p" suffix stands for "performance" and means performance instruction extension.
-+; (name nds32pf)
-+; (comment "Andes NDS32 performance extension family")
-+; (endian either)
-+; (insn-endian big)
-+; (word-bitsize 32)
-+; (parallel-insns 1)
-+; (file-transform "p")
-+;)
-+
-+(define-cpu
-+ ; The "h" suffix stands for "half" and means half-word (16-bit) instruction extension.
-+ (name nds32hf)
-+ (comment "Andes NDS32 16-bit extension family")
-+ (endian either)
-+ (insn-endian big)
-+ (word-bitsize 32)
-+ (parallel-insns 1)
-+ (file-transform "h")
-+)
-+
-+;(define-cpu
-+; ; The "d" suffix stands for "DSP" and means DSP instruction extension.
-+; (name nds32df)
-+; (comment "Andes NDS32 DSP extension family")
-+; (endian either)
-+; (insn-endian big)
-+; (word-bitsize 32)
-+; (parallel-insns 1)
-+; (file-transform "d")
-+;)
-+
-+;(define-cpu
-+; ; The "p" suffix stands for "performance" and means performance instruction extension.
-+; ; The "h" suffix stands for "half" and means half-word (16-bit) instruction extension.
-+; (name nds32phf)
-+; (comment "Andes NDS32 performance and 16-bit extension family")
-+; (endian either)
-+; (insn-endian big)
-+; (word-bitsize 32)
-+; (parallel-insns 1)
-+; (file-transform "ph")
-+;)
-+
-+;(define-cpu
-+; ; The "h" suffix stands for "half" and means half-word (16-bit) instruction extension.
-+; ; The "d" suffix stands for "DSP" and means DSP instruction extension.
-+; (name nds32hdf)
-+; (comment "Andes NDS32 16-bit and DSP extension family")
-+; (endian either)
-+; (insn-endian big)
-+; (word-bitsize 32)
-+; (parallel-insns 1)
-+; (file-transform "hd")
-+;)
-+
-+;(define-cpu
-+; ; The "p" suffix stands for "performance" and means performance instruction extension.
-+; ; The "h" suffix stands for "half" and means half-word (16-bit) instruction extension.
-+; ; The "d" suffix stands for "DSP" and means DSP instruction extension.
-+; (name nds32phdf)
-+; (comment "Andes NDS32 performance, 16-bit and DSP extension family")
-+; (endian either)
-+; (insn-endian big)
-+; (word-bitsize 32)
-+; (parallel-insns 1)
-+; (file-transform "phd")
-+;)
-+
-+; ==============================================================================
-+; CPU machine definitions
-+; A machine is a distinct variant of a CPU. It currently has a one-to-one
-+; correspondence with BFD's 'mach number'. At least one machine must be defined.
-+; ==============================================================================
-+;(define-mach
-+; (name n1p)
-+; (comment "Base NDS32 core with performance instructions")
-+; (cpu nds32pf)
-+;)
-+
-+(define-mach
-+ (name n1h)
-+ (comment "Base NDS32 core with 16-bit instructions")
-+ (cpu nds32hf)
-+)
-+
-+(define-mach
-+ (name n1h_v2)
-+ (comment "Base v2 NDS32 core with 16-bit instructions")
-+ (cpu nds32hf)
-+)
-+
-+(define-mach
-+ (name n1h_v3)
-+ (comment "Base v3 NDS32 core with 16-bit instructions")
-+ (cpu nds32hf)
-+)
-+
-+(define-mach
-+ (name n1h_v3m)
-+ (comment "Base v3m NDS32 core with 16-bit instructions")
-+ (cpu nds32hf)
-+)
-+
-+;(define-mach
-+; (name n1d)
-+; (comment "Base NDS32 core with DSP instructions")
-+; (cpu nds32df)
-+;)
-+
-+;(define-mach
-+; (name n1ph)
-+; (comment "Base NDS32 core with performance and 16-bit instructions")
-+; (cpu nds32phf)
-+;)
-+
-+;(define-mach
-+; (name n1hd)
-+; (comment "Base NDS32 core with 16-bit and DSP instructions")
-+; (cpu nds32hdf)
-+;)
-+
-+;(define-mach
-+; (name n1phd)
-+; (comment "Base NDS32 core with performance, 16-bit and DSP instructions")
-+; (cpu nds32phdf)
-+;)
-+
-+; ==============================================================================
-+; Model descriptions
-+; Each mach must have at least one model.
-+; ==============================================================================
-+;(define-model
-+; (name n1pm) (comment "model for N1P machine") (attrs)
-+; (mach n1p)
-+;
-+; ;(prefetch)
-+; ;(retire)
-+;
-+; (pipeline p-non-mem "" () ((fetch) (decode) (execute) (writeback)))
-+; (pipeline p-mem "" () ((fetch) (decode) (execute) (memory) (writeback)))
-+;
-+; ; `state' is a list of variables for recording model state
-+; (state
-+; ; bit mask of h-gr registers, =1 means value being loaded from memory
-+; (h-gr UINT)
-+; )
-+;
-+; (unit u-exec "Execution Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((sr INT -1) (dr INT -1)) ; inputs
-+; ((dr INT -1)) ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-cmp "Compare Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((src1 INT -1) (src2 INT -1)) ; inputs
-+; () ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-mac "Multiply/Accumulate Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((src1 INT -1) (src2 INT -1)) ; inputs
-+; () ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-cti "Branch Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((sr INT -1)) ; inputs
-+; ((pc)) ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-load "Memory Load Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((sr INT)
-+; ;(ld-mem AI)
-+; ) ; inputs
-+; ((dr INT)) ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-store "Memory Store Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((src1 INT) (src2 INT)) ; inputs
-+; () ; ((st-mem AI)) ; outputs
-+; () ; profile action (default)
-+; )
-+;)
-+
-+(define-model
-+ (name n1hm) (comment "model for N1H machine") (attrs)
-+ (mach n1h)
-+
-+ ;(prefetch)
-+ ;(retire)
-+
-+ (pipeline p-non-mem "" () ((fetch) (decode) (execute) (writeback)))
-+ (pipeline p-mem "" () ((fetch) (decode) (execute) (memory) (writeback)))
-+
-+ ; `state' is a list of variables for recording model state
-+ (state
-+ ; bit mask of h-gr registers, =1 means value being loaded from memory
-+ (h-gr UINT)
-+ )
-+
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((rt5 INT -1) (ra5 INT -1)) ; inputs
-+ ((rt5 INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-cmp "Compare Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((src1 INT -1) (src2 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-mac "Multiply/Accumulate Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((src1 INT -1) (src2 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-cti "Branch Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((sr INT -1)) ; inputs
-+ ((pc)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-load "Memory Load Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((sr INT)
-+ ;(ld-mem AI)
-+ ) ; inputs
-+ ((dr INT)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-store "Memory Store Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((src1 INT) (src2 INT)) ; inputs
-+ () ; ((st-mem AI)) ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+;(define-model
-+; (name n1phm) (comment "model for N1PH machine") (attrs)
-+; (mach n1ph)
-+;
-+; ;(prefetch)
-+; ;(retire)
-+;
-+; (pipeline p-non-mem "" () ((fetch) (decode) (execute) (writeback)))
-+; (pipeline p-mem "" () ((fetch) (decode) (execute) (memory) (writeback)))
-+;
-+; ; `state' is a list of variables for recording model state
-+; (state
-+; ; bit mask of h-gr registers, =1 means value being loaded from memory
-+; (h-gr UINT)
-+; )
-+;
-+; (unit u-exec "Execution Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((sr INT -1) (dr INT -1)) ; inputs
-+; ((dr INT -1)) ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-cmp "Compare Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((src1 INT -1) (src2 INT -1)) ; inputs
-+; () ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-mac "Multiply/Accumulate Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((src1 INT -1) (src2 INT -1)) ; inputs
-+; () ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-cti "Branch Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((sr INT -1)) ; inputs
-+; ((pc)) ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-load "Memory Load Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((sr INT)
-+; ;(ld-mem AI)
-+; ) ; inputs
-+; ((dr INT)) ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-store "Memory Store Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((src1 INT) (src2 INT)) ; inputs
-+; () ; ((st-mem AI)) ; outputs
-+; () ; profile action (default)
-+; )
-+;)
-+
-+; ==============================================================================
-+; Instruction fields.
-+; ==============================================================================
-+; Attributes:
-+; PCREL-ADDR: pc relative value (for reloc and disassembly purposes)
-+; ABS-ADDR: absolute address (for reloc and disassembly purposes?)
-+; RESERVED: bits are not used to decode insn, must be all 0
-+; RELOC: there is a relocation associated with this field (experiment)
-+
-+(define-attr
-+ (for ifield operand)
-+ (type boolean)
-+ (name RELOC)
-+ (comment "there is a reloc associated with this field (experiment)")
-+)
-+
-+
-+(dnf f-ifmt "ifmt" () 0 1) ;Instruction ForMaT
-+(dnf f-32-opc6g "opc6g" () 1 3) ; opcode group (of main opcode)
-+(dnf f-32-opc6c "opc6c" () 4 3) ; opcode code (of main opcode)
-+(dnf f-32-sub1 "sub1" () 7 1)
-+(dnf f-32-rt5 "rt5" () 7 5)
-+(dnf f-32-ra5 "ra5" () 12 5)
-+(dnf f-32-rb5 "rb5" () 17 5)
-+(dnf f-32-rd24 "24-22:0" () 7 3)
-+(dnf f-32-rd1 "accums" () 10 1)
-+(dnf f-32-rd20 "20:0" () 11 1)
-+(dnf f-32-rd1hl "h/l of accums" () 12 5)
-+(dnf f-32-usr "usr index" () 12 5)
-+(dnf f-32-group "group index" () 17 5)
-+(dnf f-32-sr10 "10-bit system regs" () 12 10)
-+(df f-32t0-disp24 "disp24" (PCREL-ADDR RELOC) 8 24 INT
-+ ((value pc) (sra SI (sub SI value pc) (const 1)))
-+ ((value pc) (add SI (sll SI value (const 1)) pc)))
-+(dnf f-32-concat24 "concat24" () 8 24)
-+(df f-32t1-slo20 "signed low 20 bits" () 12 20 INT #f #f)
-+(dnf f-32t1-uhi20 "high 20 bits" () 12 20)
-+(df f-32t1-disp16 "disp16" (PCREL-ADDR RELOC) 16 16 INT
-+ ((value pc) (sra SI (sub SI value pc) (const 1)))
-+ ((value pc) (add SI (sll SI value (const 1)) pc)))
-+(df f-32t1-disp9 "disp9" (PCREL-ADDR RELOC) 7 9 UINT
-+ ((value pc) (sra USI (sub USI value pc) (const 1))) ;encode
-+ ((value pc) (add USI (sll USI value (const 1)) pc))) ;decode
-+(dnf f-32t1-sub4 "sub4" () 12 4)
-+(df f-32t2-slo15d "slo15d" () 17 15 INT
-+ ((value pc) (c-code SI "value; if (value&0x7) return BAD_DWOFFSET; else value>>=3"))
-+ ((value pc) (sll SI value (const 3))))
-+(df f-32t2-ulo15d "ulo15d" () 17 15 UINT
-+ ((value pc) (c-code USI "value; if (value&0x7) return BAD_DWOFFSET; else value>>=3"))
-+ ((value pc) (sll USI value (const 3))))
-+(df f-32t2-slo15w "slo15w" () 17 15 INT
-+ ((value pc) (c-code SI "value; if (value&0x3) return BAD_WOFFSET; else value>>=2"))
-+ ((value pc) (sll SI value (const 2))))
-+(df f-32t2-ulo15w "ulo15w" () 17 15 UINT
-+ ((value pc) (c-code USI "value; if (value&0x3) return BAD_WOFFSET; else value>>=2"))
-+ ((value pc) (sll USI value (const 2))))
-+(df f-32t2-slo15h "slo15h" () 17 15 INT
-+ ((value pc) (c-code SI "value; if (value&0x1) return BAD_HWOFFSET; else value>>=1"))
-+ ((value pc) (sll SI value (const 1))))
-+(df f-32t2-ulo15h "ulo15h" () 17 15 UINT
-+ ((value pc) (c-code USI "value; if (value&0x1) return BAD_HWOFFSET; else value>>=1"))
-+ ((value pc) (sll USI value (const 1))))
-+(df f-32t2-slo15b "slo15b" () 17 15 INT #f #f)
-+(df f-32t2-ulo15b "ulo15b" () 17 15 UINT #f #f)
-+(df f-32t2-disp14 "disp14" (PCREL-ADDR RELOC) 18 14 INT
-+ ((value pc) (sra SI (sub SI value pc) (const 1)))
-+ ((value pc) (add SI (sll SI value (const 1)) pc)))
-+(dnf f-32t2-sub1 "sub1" () 17 1)
-+(dnf f-32t3-res10_7 "reserved 10-bit" () 7 10) ; 10-bit reserved field
-+(dnf f-32t3-res12_12 "reserved 12-bit" () 12 12) ; 12-bit reserved field
-+(dnf f-32t3-swid15 "15-bit software ID" () 12 15) ; 15-bit software ID for syscall/break/trap/teqz/tnez
-+(dnf f-32t3-sub10 "sub10" () 22 10) ; 10-bit subcode
-+(dnf f-32t3-sub10si "sub10si" () 22 2) ; 2-bit scaling index in 10bit subcode
-+(dnf f-32t3-sub10dsi "sub10dsi" () 24 2) ; 10-bit subcode domain for load/store
-+(dnf f-32t3-sub10d "sub10d" () 22 4) ; 10-bit subcode domain
-+(dnf f-32t3-sub10g "sub10g" () 26 3) ; 10-bit subcode group
-+(dnf f-32t3-sub10g2 "sub10g2" () 27 2) ; 10-bit subcode group2
-+(dnf f-32t3-sub10c "sub10c" () 29 3) ; 10-bit subcode code
-+(dnf f-32t3-uimm5 "uimm5" () 17 5)
-+(dnf f-32t3-ext3 "extended 3-bit code" () 24 3)
-+(dnf f-32t4-ext5 "extended 5-bit code" () 22 5)
-+(dnf f-32t4-ext2 "extended 2-bit code" () 25 2)
-+(dnf f-32t4-res3_22 "reserved 3-bit" () 22 3) ; 3-bit reserved field
-+(dnf f-32t4-sub5 "sub5" () 27 5) ; 5-bit subcode
-+(dnf f-32t5-mask4 "4-bit mask" () 22 4)
-+(dnf f-32t5-sub4 "4-bit subcode" () 26 4)
-+(dnf f-32t5-res2 "reserved 2-bit" () 30 2)
-+(dnf f-32t2-st4 "4-bit SubType" () 8 4)
-+(dnf f-32tx-4_17 "4 bits from bit field 17" () 17 4)
-+(dnf f-32tx-1_21 "1 bit from bit field 21" () 21 1)
-+
-+(define-multi-ifield
-+ (name f-32-group-usr)
-+ (comment "user special register index")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-32-group f-32-usr)
-+ (insert (sequence ()
-+ (set (ifield f-32-group) (srl (ifield f-32-group-usr) (const 5)))
-+ (set (ifield f-32-usr) (and (ifield f-32-group-usr) (const #x1f)))
-+ ))
-+ (extract (set (ifield f-32-group-usr) (or (sll (ifield f-32-group) (const 5)) (ifield f-32-usr))))
-+)
-+
-+; ==============================================================================
-+; Enums.
-+; ==============================================================================
-+; insn-format: bit 0 (1 bit)
-+; used by nds32.opc
-+(define-normal-insn-enum insn-format "insn format (32/16) enums" () IFMT_ f-ifmt
-+ ("32" "16")
-+)
-+
-+; insn32-opc6g: bits 1-3 (3 bits)
-+(define-normal-insn-enum insn32-opc6g "insn opcode group enums" () OPC6G_ f-32-opc6g
-+ ("0" "1" "2" "3" "4" "5" "6" "7")
-+)
-+
-+(define-pmacro (use reg)
-+ (sequence ()
-+ (c-code VOID "//")
-+ (c-call VOID "use" reg)))
-+
-+
-+; opc6c: bits 29-31 (3 bits)
-+(define-pmacro
-+ (opc6c-op group enum-list)
-+ (define-normal-insn-enum
-+ (.sym "insn32-opc6c" group)
-+ (.str " insn opcode group " group "enums")
-+ ()
-+ (.sym "OPC6C" group "_")
-+ f-32-opc6c enum-list))
-+
-+
-+(opc6c-op 0 ("LBI" "LHI" "LWI" "LDI" "LBIP" "LHIP" "LWIP" "LDIP"))
-+(opc6c-op 1 ("SBI" "SHI" "SWI" "SDI" "SBIP" "SHIP" "SWIP" "SDIP"))
-+(opc6c-op 2 ("LBSI" "LHSI" "LWSI" "DPREFI" "LBSIP" "LHSIP" "LWSIP" "LBGP"))
-+(opc6c-op 3 ("LWC" "SWC" "LDC" "SDC" "MEM" "LSMW" "HWGP" "SBGP"))
-+(opc6c-op 4 ("ALU_1" "ALU_2" "MOVI" "SETHI" "JI" "JR" "BR1" "BR2"))
-+(opc6c-op 5 ("ADDI" "SUBRI" "ANDI" "XORI" "ORI" "BR3" "SLTI" "SLTSI"))
-+(opc6c-op 6 ("AEXT" "CEXT" "MISC" "BITCI" "4" "COP" "6" "7"))
-+(opc6c-op 7 ("SIMD" "1" "2" "3" "4" "5" "6" "7"))
-+
-+
-+; ji_1-sub1: bits 7 (1 bit)
-+(define-normal-insn-enum ji_1-sub1 "insn type 0 1-bit subcode enums" () JI_SUB1_ f-32-sub1
-+ ("J" "JAL")
-+)
-+
-+; dpref-sub1: bits 7 (1 bit)
-+(define-normal-insn-enum dpref-sub1 "1-bit subcode enums for dpref/dprefi" () DPREF_SUB1_ f-32-sub1
-+ ("W" "D")
-+)
-+
-+; br_1-sub1: bits 17 (1 bit)
-+(define-normal-insn-enum br_1-sub1 "insn type 2 1-bit subcode enums" () BR1_SUB1_ f-32t2-sub1
-+ ("BEQ" "BNE")
-+)
-+
-+; br_2-sub4: bits 12-15 (4 bit)
-+(define-normal-insn-enum br_2-sub4 "insn type 1 4-bit subcode enums" () BR2_SUB4_ f-32t1-sub4
-+ ("IFCALL" "1" "BEQZ" "BNEZ" "BGEZ" "BLTZ" "BGTZ" "BLEZ"
-+ "8" "9" "10" "BNEZD" "BGEZAL" "BLTZAL" "14" "15")
-+)
-+
-+; insn32-res10_7: bits 7-16 (10 bits)
-+(define-normal-insn-enum insn32-res10_7 "insn type 3 10-bit reserved field enums" () RES10_7_ f-32t3-res10_7
-+ ("0")
-+)
-+
-+; insn32-res10_12: bits 12-21 (10 bits)
-+(define-normal-insn-enum insn32-res10_12 "insn type 3 10-bit reserved field enums" () RES10_12_ f-32-sr10
-+ ("0")
-+)
-+
-+; insn32-res12_12: bits 12-23 (12 bits)
-+(define-normal-insn-enum insn32-res12_12 "insn type 3 12-bit reserved field enums" () RES12_12_ f-32t3-res12_12
-+ ("0")
-+)
-+
-+; sr10-ir: bits 12-21 (10 bits)
-+(define-normal-insn-enum sr10-ir "enums for interruption register of SRs" () SR10_IR_ f-32-sr10
-+ (("PSW" 128))
-+)
-+
-+; insn32-res15: bits 7-21 (15 bits)
-+(define-normal-insn-enum insn32-res15 "insn type 3 15-bit reserved field enums" () RES15_ f-32t3-swid15
-+ ("0")
-+)
-+
-+; insn32-res3_22: bits 22-24 (3 bits)
-+(define-normal-insn-enum insn32-res3_22 "3-bit reserved field enums" () RES3_22_ f-32t4-res3_22
-+ ("0")
-+)
-+
-+; insn32-res5_7: bits 7-11 (5 bits)
-+(define-normal-insn-enum insn32-res5_7 "5-bit reserved field enums" () RES5_7_ f-32-rt5
-+ ("0")
-+)
-+
-+; insn32-res5_12: bits 12-16 (5 bits)
-+(define-normal-insn-enum insn32-res5_12 "5-bit reserved field enums" () RES5_12_ f-32-ra5
-+ ("0")
-+)
-+
-+; insn32-res5_17: bits 17-21 (5 bits)
-+(define-normal-insn-enum insn32-res5_17 "5-bit reserved field enums" () RES5_17_ f-32-rb5
-+ ("0")
-+)
-+
-+; insn32-res4_17: bits 17-20 (4 bits)
-+(define-normal-insn-enum insn32-res4_17 "4-bit reserved field enums" () RES4_17_ f-32tx-4_17
-+ ("0")
-+)
-+
-+; insn32-res2: bits 30-31 (2 bits)
-+(define-normal-insn-enum insn32-res2 "insn type 5 2-bit reserved field enums" () RES2_30_ f-32t5-res2
-+ ("0" "1" "2" "3")
-+)
-+
-+; insn32-sub10dsi: bits 24-25 (2 bits)
-+(define-normal-insn-enum insn32-sub10dsi "insn type 3 10-bit subcode domain enums for load/store" () SUB10DSI_ f-32t3-sub10dsi
-+ ("0")
-+)
-+
-+; insn32-sub10d: bits 22-25 (4 bits)
-+(define-normal-insn-enum insn32-sub10d "insn type 3 10-bit subcode domain enums" () SUB10D_ f-32t3-sub10d
-+ ("0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15"
-+ ("NO_IDT" 0) ("IT" 4) ("DT" 8) ("IDT" 12) ("T" 12)
-+ )
-+)
-+
-+; insn32-sub10g: bits 26-28 (3 bits)
-+(define-normal-insn-enum insn32-sub10g "insn type 3 10-bit subcode group enums" () SUB10G_ f-32t3-sub10g
-+ ("0" "1" "2" "3" "4" "5" "6" "7" ("JR" 0) ("RET" 4) ("JRAL" 0))
-+)
-+
-+; insn32-sub10g2: bits 27-28 (2 bits)
-+(define-normal-insn-enum insn32-sub10g2 "insn type 3 10-bit subcode group2 enums" () SUB10G2_ f-32t3-sub10g2
-+ ("0" "1" "2" "3")
-+)
-+
-+; sub10c: bits 29-31 (3 bits)
-+(define-pmacro (sub10c-op major group enum-list)
-+ (define-normal-insn-enum (.sym major "-sub10c" group) (.str major " subcode group " group "enums") () (.sym major "_SUB10C" group "_") f-32t3-sub10c enum-list)
-+)
-+(sub10c-op ALU_1 0 ("ADD" "SUB" "AND" "XOR" "OR" "NOR" "SLT" "SLTS"))
-+(sub10c-op ALU_1 1 ("SLLI" "SRLI" "SRAI" "ROTRI" "SLL" "SRL" "SRA" "ROTR"))
-+(sub10c-op ALU_1 2 ("SEB" "SEH" "BITC" "ZEH" "WSBH" "5" "DIVSR" "DIVR"))
-+(sub10c-op ALU_1 3 ("SVA" "SVS" "CMOVZ" "CMOVN" "4" "5" "6" "7"))
-+(sub10c-op ALU_2 0 ("MAX" "MIN" "AVE" "ABS" "CLIPS" "CLIP" "CLO" "CLZ"))
-+(sub10c-op ALU_2 1 ("BSET" "BCLR" "BTGL" "BTST" "BSE" "BSP" "STR1" "STR2"))
-+(sub10c-op ALU_2 2 ("0" "1" "ADDWC" "SUBWC" "KDMXY" "5" "6" "FFZMISM"))
-+(sub10c-op ALU_2 3 ("KADDW" "KSUBW" "KSLRAW" "3" "4" "5" "6" "7"))
-+(sub10c-op ALU_2 4 ("MFUSR" "MTUSR" "2" "3" "MUL" "5" "6" "7"))
-+(sub10c-op ALU_2 5 ("MULTS64" "MULT64" "MADDS64" "MADD64" "MSUBS64" "MSUB64" "DIVS" "DIV"))
-+(sub10c-op ALU_2 6 ("MULTS32" "MULT32" "MADDS32" "MADD32" "MSUBS32" "MSUB32" "6" "7"))
-+(sub10c-op ALU_2 7 ("DMADD" "DMADDC" "DMSUB" "DMSUBC" "RMFHI" "QMFLO" "6" "7"))
-+(sub10c-op MEM 0 ("LB" "LH" "LW" "LD" "LBP" "LHP" "LWP" "LDP"))
-+(sub10c-op MEM 1 ("SB" "SH" "SW" "SD" "SBP" "SHP" "SWP" "SDP"))
-+(sub10c-op MEM 2 ("LBS" "LHS" "LWS" "DPREF" "LBSP" "LHSP" "LWSP" "7"))
-+(sub10c-op MEM 3 ("LLW" "SCW" "2" "3" "4" "5" "6" "7"))
-+(sub10c-op MEM 4 ("LBUP" "1" "LWUP" "3" "4" "5" "6" "7"))
-+(sub10c-op MEM 5 ("SBUP" "1" "SWUP" "3" "4" "5" "6" "7"))
-+(sub10c-op JR 0 ("JR" "JRAL" "JRNEZ" "JRALNEZ" "4" "5" "6" "7" ("RET" 0)))
-+(sub10c-op RET 0 ("IFRET" "1" "2" "3" "4" "5" "6" "7"))
-+
-+(sub10c-op ALU_2V2 0 ("0" "1" "2" "3" "4" "5" "6" "7"))
-+(sub10c-op ALU_2V2 1 ("0" "1" "2" "3" "4" "5" "6" "7"))
-+(sub10c-op ALU_2V2 2 ("0" "1" "2" "3" "4" "5" "6" "7"))
-+(sub10c-op ALU_2V2 3 ("KADDH" "KSUBH" "2" "3" "KDMXY" "5" "6" "7"))
-+(sub10c-op ALU_2V2 4 ("RDOV" "CLROV" "2" "3" "4" "5" "6" "7"))
-+(sub10c-op ALU_2V2 5 ("MULTS64" "MULT64" "2" "3" "4" "5" "6" "7"))
-+(sub10c-op ALU_2V2 6 ("0" "1" "2" "MADDR32" "4" "MSUBR32" "6" "7"))
-+(sub10c-op ALU_2V2 7 ("0" "1" "2" "3" "4" "5" "6" "7"))
-+
-+; misc-ext5: bits 22-26 (5 bits)
-+(define-normal-insn-enum misc-ext5 "5-bit extended code enums for mtsr" () MISC_EXT5_ f-32t4-ext5
-+ ("0")
-+)
-+
-+; mtsr-ext5: bits 22-26 (5 bits)
-+(define-normal-insn-enum mtsr-ext5 "5-bit extended code enums for mtsr" () MTSR_EXT5_ f-32t4-ext5
-+ ("BASE" "SETEND" "SETGIE")
-+)
-+
-+; setend-be: bits 7-11 (5 bits, actually only Bit 11 is used)
-+(define-normal-insn-enum setend-be "enums for endianness value of SETEND" () SETEND_ f-32-rt5
-+ ("L" "B")
-+)
-+
-+; setgie-en: bits 7-11 (5 bits, actually only Bit 11 is used)
-+(define-normal-insn-enum setgie-en "enums for enable bit value of SETGIE" () SETGIE_ f-32-rt5
-+ ("D" "E")
-+)
-+
-+; insn32-tr-ctl: bits 22-23 (2 bits)
-+(define-normal-insn-enum insn32-tr-ctl "encoding for DT/IT bits in jr insn" () TR_CTL_ f-32t3-sub10si
-+ ("NT" "IT" "DT" "DTIT")
-+)
-+
-+; insn32-res3_7 : bits 7-9 (3 bits)
-+(define-normal-insn-enum insn32-res3_7 "3-bit reserved field enums" () RES3_7_ f-32-rd24
-+ ("0")
-+)
-+
-+; insn32-res1_11 : bits 11 (1 bits)
-+(define-normal-insn-enum insn32-res1_11 "1-bit reserved field enums" () RES1_11_ f-32-rd20
-+ ("0")
-+)
-+
-+; insn32-sub10d: bits 22-25 (4 bits)
-+; misc-sub5: bits 27-31 (5 bits)
-+(define-normal-insn-enum misc-sub5 "5-bit subcode enums for MISC instructions" () MISC_SUB5_ f-32t4-sub5
-+ ("STANDBY" "CCTL" "MFSR" "MTSR" "IRET" "TRAP" "TEQZ" "TNEZ"
-+ "DSB" "ISB" "BREAK" "SYSCALL" "MSYNC" "ISYNC" "TLBOP" "15" "16"
-+ "17" "18" "19" "20" "FZB")
-+)
-+
-+; lsmw-sub4: bits 26-29 (4 bits)
-+(define-normal-insn-enum lsmw-sub4 "insn type 5 4-bit subcode enums" () LSMW_SUB4_ f-32t5-sub4
-+ ("LMWbi" "LMWbim" "LMWbd" "LMWbdm" "LMWai" "LMWaim" "LMWad" "LMWadm"
-+ "SMWbi" "SMWbim" "SMWbd" "SMWbdm" "SMWai" "SMWaim" "SMWad" "SMWadm")
-+)
-+
-+; lsmw-enable4: bits 22-25 (4 bits)
-+(define-normal-insn-enum lsmw-enable4 "4-bit enable enums" () LSMW_ENABLE4_ f-32t5-mask4
-+ ("0")
-+)
-+
-+
-+(define-pmacro (vep-vec index num) ((.sym "VEP" index) num))
-+(define-enum
-+ (name e-int-vec2)
-+ (comment "Entry point for external VIC mode")
-+ (attrs)
-+ (prefix E_INT_VEC_)
-+ (values (.map vep-vec (.iota 64 0) (.iota 64 9)))
-+)
-+
-+
-+
-+; ==============================================================================
-+; Hardware pieces.
-+; ==============================================================================
-+; These entries list the elements of the raw hardware.
-+; They're also used to provide tables and other elements of the assembly
-+; language.
-+
-+(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
-+(dnh h-ppc "previous program counter" (PC PROFILE) (pc) () () ())
-+
-+(dnh h-si "unsigned scaling index 2 bits" ()
-+ (immediate (UINT 2))
-+ () () ()
-+)
-+(dnh h-uimm5 "unsigned immediate 5 bits" ()
-+ (immediate (UINT 5))
-+ () () ()
-+)
-+(dnh h-mask4 "unsigned mask 4 bits" ()
-+ (immediate (UINT 4))
-+ () () ()
-+)
-+(dnh h-swid15 "unsigned swid 15 bits" ()
-+ (immediate (UINT 15))
-+ () () ()
-+)
-+(dnh h-disp24 "24-bits displacement" ()
-+ (immediate (INT 24))
-+ () () ()
-+)
-+(dnh h-concat24 "24-bits concat" ()
-+ (immediate (INT 24))
-+ () () ()
-+)
-+(dnh h-disp16 "16-bits displacement" ()
-+ (immediate (INT 16))
-+ () () ()
-+)
-+(dnh h-disp9 "9-bits displacement" ()
-+ (immediate (INT 9))
-+ () () ()
-+)
-+(dnh h-disp14 "14-bits displacement" ()
-+ (immediate (INT 14))
-+ () () ()
-+)
-+(dnh h-uhi20 "unsigned high 20 bits" ()
-+ (immediate (UINT 20))
-+ () () ()
-+)
-+(dnh h-slo20 "signed low 20 bits" ()
-+ (immediate (INT 20))
-+ () () ()
-+)
-+(dnh h-ulo15 "unsigned low 15 bits" ()
-+ (immediate (UINT 15))
-+ () () ()
-+)
-+(dnh h-slo15 "signed low 15 bits" ()
-+ (immediate (INT 15))
-+ () () ()
-+)
-+(dnh h-usr "usr index 5 bits" ()
-+ (immediate (UINT 5))
-+ () () ()
-+)
-+(dnh h-group "group index 5 bits" ()
-+ (immediate (UINT 5))
-+ () () ()
-+)
-+(dnh h-sr10 "system register index of 10 bits" ()
-+ (immediate (UINT 10))
-+ () () ()
-+)
-+
-+(define-hardware
-+ (name h-tpc)
-+ (comment "target program counter")
-+ (attrs PROFILE)
-+ (type register USI)
-+)
-+
-+(define-keyword
-+ (name gr-names)
-+ (print-name h-gr)
-+ (prefix "$")
-+ (values
-+ (p0 26) (p1 27) (fp 28) (gp 29) (lp 30) (sp 31)
-+ (r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)
-+ (r8 8) (r9 9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14) (r15 15)
-+ (r16 16) (r17 17) (r18 18) (r19 19) (r20 20) (r21 21) (r22 22) (r23 23)
-+ (r24 24) (r25 25) (r26 26) (r27 27) (r28 28) (r29 29) (r30 30) (r31 31)
-+ (a0 0) (a1 1) (a2 2) (a3 3) (a4 4) (a5 5) (s0 6) (s1 7)
-+ (s2 8) (s3 9) (s4 10) (s5 11) (s6 12) (s7 13) (s8 14) (ta 15)
-+ (t0 16) (t1 17) (t2 18) (t3 19) (t4 20) (t5 21) (t6 22) (t7 23)
-+ (t8 24) (t9 25) (s9 28)
-+ )
-+)
-+
-+;(define-hardware
-+; (name h-gr)
-+; (comment "general registers")
-+; (attrs PROFILE)
-+; (type register USI (32))
-+; (indices extern-keyword gr-names)
-+;
-+; ; get SP_PRIV if (MSC_CFG.SHADOW && MISC_CTL.SP_SHADOW_EN && PSW.POM == super_user && index == 31)
-+; (get (index)
-+; (if USI (and USI (and USI (eq USI (and (raw-reg h-sr 32) (const #x700000)) (const #x100000))
-+; (eq USI (and (raw-reg h-sr 367) (const #x2)) (const #x2)))
-+; (and USI (eq USI (and (raw-reg h-sr 128) (const #x18)) (const #x8))
-+; (eq USI index (const #x1f))))
-+; (raw-reg h-sr 209)
-+; (raw-reg h-gr index)))
-+;
-+; ; set SP_PRIV if (MSC_CFG.SHADOW && MISC_CTL.SP_SHADOW_EN && PSW.POM == super_user && index == 31)
-+; (set (index newval)
-+; (if VOID (and USI (and USI (eq USI (and (raw-reg h-sr 32) (const #x700000)) (const #x100000))
-+; (eq USI (and (raw-reg h-sr 367) (const #x2)) (const #x2)))
-+; (and USI (eq USI (and (raw-reg h-sr 128) (const #x18)) (const #x8))
-+; (eq USI index (const #x1f))))
-+; (set (raw-reg h-sr 209) newval)
-+; (set (raw-reg h-gr index) newval)))
-+;)
-+
-+(define-hardware
-+ (name h-gr)
-+ (comment "general registers")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register USI (32))
-+ (indices extern-keyword gr-names)
-+)
-+
-+(define-keyword
-+ (name sr-names)
-+ (print-name h-sr)
-+ (prefix "$")
-+ (values
-+ (CPU_VER 0) (ICM_CFG 8) (DCM_CFG 16) (MMU_CFG 24)
-+ (cr0 0) (cr1 8) (cr2 16) (cr3 24)
-+ (MSC_CFG 32) (CORE_ID 1) (FUCOP_EXIST 40)
-+ (cr4 32) (cr5 1) (cr6 40)
-+
-+ (PSW 128) (IPSW 129) (P_IPSW 130) (IVB 137)
-+ (ir0 128) (ir1 129) (ir2 130) (ir3 137)
-+ (EVA 145) (P_EVA 146) (ITYPE 153) (P_ITYPE 154)
-+ (ir4 145) (ir5 146) (ir6 153) (ir7 154)
-+ (MERR 161) (IPC 169) (P_IPC 170) (OIPC 171) (DIPC 171)
-+ (ir8 161) (ir9 169) (ir10 170) (ir11 171)
-+ (P_P0 178) (P_P1 186) (INT_MASK 192) (INT_PEND 200)
-+ (ir12 178) (ir13 186) (ir14 192) (ir15 200)
-+ (SP_USR 208) (SP_PRI 209) (SP_PRIV 209) (INT_PRI 216) (INT_CTRL 138)
-+ (ir16 208) (ir17 209) (ir18 216) (ir19 138)
-+ (SP_USR1 210) (SP_PRIV1 211) (SP_USR2 212) (SP_PRIV2 213)
-+ (ir20 210) (ir21 211) (ir22 212) (ir23 213)
-+ (SP_USR3 214) (SP_PRIV3 215) (INT_MASK2 193) (INT_PEND2 201)
-+ (ir24 214) (ir25 215) (ir26 193) (ir27 201)
-+ (INT_PRI2 217) (INT_TRIGGER 204)
-+ (ir28 217) (ir29 204) (ir30 139)
-+
-+ (MMU_CTL 256) (L1_PPTB 264) (TLB_VPN 272) (TLB_DATA 280)
-+ (mr0 256) (mr1 264) (mr2 272) (mr3 280)
-+ (TLB_MISC 288) (VLPT_IDX 296) (ILMB 304) (DLMB 312)
-+ (mr4 288) (mr5 296) (mr6 304) (mr7 312)
-+ (CACHE_CTL 320) (HSMP_SADDR 328) (HSMP_EADDR 329) (BG_REGION 257)
-+ (mr8 320) (mr9 328) (mr10 329) (mr11 257)
-+
-+ (SDZ_CTL 376) (MISC_CTL 377) (N12MISC_CTL 377)
-+ (idr0 376) (idr1 377)
-+
-+ (BPC0 384) (BPA0 392) (BPAM0 400) (BPV0 408) (BPCID0 416)
-+ (dr0 384) (dr1 392) (dr2 400) (dr3 408) (dr4 416)
-+ (BPC1 385) (BPA1 393) (BPAM1 401) (BPV1 409) (BPCID1 417)
-+ (dr5 385) (dr6 393) (dr7 401) (dr8 409) (dr9 417)
-+ (BPC2 386) (BPA2 394) (BPAM2 402) (BPV2 410) (BPCID2 418)
-+ (dr10 386) (dr11 394) (dr12 402) (dr13 410) (dr14 418)
-+ (BPC3 387) (BPA3 395) (BPAM3 403) (BPV3 411) (BPCID3 419)
-+ (dr15 387) (dr16 395) (dr17 403) (dr18 411) (dr19 419)
-+ (BPC4 388) (BPA4 396) (BPAM4 404) (BPV4 412) (BPCID4 420)
-+ (dr20 388) (dr21 396) (dr22 404) (dr23 412) (dr24 420)
-+ (BPC5 389) (BPA5 397) (BPAM5 405) (BPV5 413) (BPCID5 421)
-+ (dr25 389) (dr26 397) (dr27 405) (dr28 413) (dr29 421)
-+ (BPC6 390) (BPA6 398) (BPAM6 406) (BPV6 414) (BPCID6 422)
-+ (dr30 390) (dr31 398) (dr32 406) (dr33 414) (dr34 422)
-+ (BPC7 391) (BPA7 399) (BPAM7 407) (BPV7 415) (BPCID7 423)
-+ (dr35 391) (dr36 399) (dr37 407) (dr38 415) (dr39 423)
-+ (EDM_CFG 424) (EDMSW 432) (EDM_CTL 440) (EDM_DTR 448)
-+ (dr40 424) (dr41 432) (dr42 440) (dr43 448)
-+ (BPMTC 456) (DIMBR 464) (TECR0 496) (TECR1 497)
-+ (dr44 456) (dr45 464) (dr46 496) (dr47 497)
-+
-+ (PFMC0 512) (PFMC1 513) (PFMC2 514) (PFM_CTL 520)
-+ (pfr0 512) (pfr1 513) (pfr2 514) (pfr3 520)
-+
-+ (FUCOP_CTL 552)
-+ (fucpr 552)
-+
-+ (PRUSR_ACC_CTL 544)
-+
-+ (DMA_CFG 640) (DMA_GCSW 648) (DMA_CHNSEL 656) (DMA_ACT 664)
-+ (dmar0 640) (dmar1 648) (dmar2 656) (dmar3 664)
-+ (DMA_SETUP 672) (DMA_ISADDR 680) (DMA_ESADDR 688) (DMA_TCNT 696)
-+ (dmar4 672) (dmar5 680) (dmar6 688) (dmar7 696)
-+ (DMA_STATUS 704) (DMA_2DSET 712) (DMA_2DSCTL 713)
-+ (dmar8 704) (dmar9 712) (dmar10 713)
-+
-+ (SFCR 768) (secur0 768)
-+ (END 1024)
-+ )
-+)
-+
-+(define-hardware
-+ (name h-sr)
-+ (comment "system registers")
-+ (type register USI (1024))
-+ (indices extern-keyword sr-names)
-+ (get (index) (c-call USI "nds32_h_sr_get_handler" index))
-+ (set (index newval) (c-call VOID "nds32_h_sr_set_handler" index newval))
-+)
-+
-+(define-hardware
-+ (name h-reset-sr)
-+ (comment "system registers for reset")
-+ (type register USI (1024))
-+ (indices extern-keyword sr-names)
-+)
-+
-+(define-hardware
-+ (name h-wtmsk-sr)
-+ (comment "write mask value for system registers")
-+ (type register USI (1024))
-+ (indices extern-keyword sr-names)
-+)
-+
-+(define-hardware
-+ (name h-conf-sr)
-+ (comment "configured system registers")
-+ (type register USI (1024))
-+ (indices extern-keyword sr-names)
-+)
-+
-+(define-keyword
-+ (name accum-hl-names)
-+ (print-name h-accum-hl)
-+ (prefix "$")
-+ (values (d0.lo 0) (d0.hi 1) (d1.lo 2) (d1.hi 3)
-+ )
-+)
-+
-+(define-keyword
-+ (name accum-names)
-+ (print-name h-accm)
-+ (prefix "$")
-+ (values (d0 0) (d1 1))
-+)
-+
-+(define-hardware
-+ (name h-accum-hl)
-+ (comment "accumulation registers")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register USI (4))
-+ (indices extern-keyword accum-hl-names)
-+)
-+
-+(define-hardware
-+ (name h-accum)
-+ (comment "accumulation registers")
-+ (attrs PROFILE VIRTUAL)
-+ (type register UDI (2))
-+ (indices extern-keyword accum-names)
-+ (get (index) (or (zext DI (reg h-accum-hl (sll index (const 1)))) (sll (zext DI (reg h-accum-hl (or (sll index (const 1)) (const 1)))) 32)))
-+ (set (index newval) (sequence ()
-+ (set (reg h-accum-hl (sll index (const 1))) (trunc SI newval))
-+ (set (reg h-accum-hl (or (sll index (const 1)) (const 1))) (trunc SI (srl newval 32)))
-+ ))
-+)
-+
-+(define-hardware
-+ (name h-mfusridx)
-+ (comment "user special register index for mfusr instruction")
-+ (type immediate (UINT 10))
-+ (values keyword "$" ((d0.lo 0) (d0.hi 1) (d1.lo 2) (d1.hi 3) (ustat 30) (pc 31)
-+ (ITB 28) (IFC_LP 29) (ifc0 29)
-+
-+ (DMA_CFG 32) (DMA_GCSW 33) (DMA_CHNSEL 34) (DMA_ACT 35)
-+ (DMA_SETUP 36) (DMA_ISADDR 37) (DMA_ESADDR 38) (DMA_TCNT 39)
-+ (DMA_STATUS 40) (DMA_2DSET 41) (DMA_2DSCTL 57)
-+ (dmar0 32) (dmar1 33) (dmar2 34) (dmar3 35)
-+ (dmar4 36) (dmar5 37) (dmar6 38) (dmar7 39)
-+ (dmar8 40) (dmar9 41) (dmar10 57)
-+
-+ (PFMC0 64) (PFMC1 65) (PFMC2 66) (PFM_CTL 68)
-+ (pfr0 64) (pfr1 65) (pfr2 66) (pfr3 68)))
-+)
-+
-+(define-hardware
-+ (name h-mtusridx)
-+ (comment "user special register index for mtusr instruction")
-+ (type immediate (UINT 10))
-+ (values keyword "$" ((d0.lo 0) (d0.hi 1) (d1.lo 2) (d1.hi 3) (ustat 30)
-+ (ITB 28) (IFC_LP 29) (ifc0 29)
-+
-+ (DMA_CFG 32) (DMA_GCSW 33) (DMA_CHNSEL 34) (DMA_ACT 35)
-+ (DMA_SETUP 36) (DMA_ISADDR 37) (DMA_ESADDR 38) (DMA_TCNT 39)
-+ (DMA_STATUS 40) (DMA_2DSET 41) (DMA_2DSCTL 57)
-+ (dmar0 32) (dmar1 33) (dmar2 34) (dmar3 35)
-+ (dmar4 36) (dmar5 37) (dmar6 38) (dmar7 39)
-+ (dmar8 40) (dmar9 41) (dmar10 57)
-+
-+ (PFMC0 64) (PFMC1 65) (PFMC2 66) (PFM_CTL 68)
-+ (pfr0 64) (pfr1 65) (pfr2 66) (pfr3 68)))
-+)
-+
-+(define-hardware
-+ (name h-standbyst)
-+ (comment "subtype for STANDBY")
-+ (type immediate (UINT 2))
-+ (values keyword "" (
-+ (no_wake_grant 0) ("0" 0)
-+ (wake_grant 1) ("1" 1)
-+ (wait_done 2) ("2" 2)
-+ ))
-+)
-+
-+
-+(define-hardware
-+ (name h-tlbopst)
-+ (comment "subtype for TLBOP")
-+ (type immediate (UINT 4))
-+ (values keyword "" (
-+ (TargetRead 0) (TRD 0) ("0" 0)
-+ (TargetWrite 1) (TWR 1) ("1" 1)
-+ (RWrite 2) (RWR 2) ("2" 2)
-+ (RWriteLock 3) (RWLK 3) ("3" 3)
-+ (Unlock 4) (UNLK 4) ("4" 4)
-+ (Probe 5) (PB 5) ("5" 5)
-+ (Invalidate 6) (INV 6) ("6" 6)
-+ (FlushAll 7) (FLUA 7) ("7" 7)
-+ ))
-+)
-+
-+(define-hardware
-+ (name h-cctlst)
-+ (comment "subtype for CCTL")
-+ (type immediate (UINT 5))
-+ (values keyword "" (
-+ (L1D_IX_INVAL 0) ("0" 0)
-+ (L1D_IX_WB 1) ("1" 1)
-+ (L1D_IX_WBINVAL 2) ("2" 2)
-+ (L1D_IX_RTAG 3) ("3" 3)
-+ (L1D_IX_RWD 4) ("4" 4)
-+ (L1D_IX_WTAG 5) ("5" 5)
-+ (L1D_IX_WWD 6) ("6" 6)
-+ (L1D_INVALALL 7) ("7" 7)
-+ (L1D_VA_INVAL 8) ("8" 8)
-+ (L1D_VA_WB 9) ("9" 9)
-+ (L1D_VA_WBINVAL 10) ("10" 10)
-+ (L1D_VA_FILLCK 11) ("11" 11)
-+ (L1D_VA_ULCK 12) ("12" 12)
-+ (L1D_WBALL 15) ("15" 15)
-+ (L1I_IX_INVAL 16) ("16" 16)
-+ (L1I_IX_RTAG 19) ("19" 19)
-+ (L1I_IX_RWD 20) ("20" 20)
-+ (L1I_IX_WTAG 21) ("21" 21)
-+ (L1I_IX_WWD 22) ("22" 22)
-+ (L1I_VA_INVAL 24) ("24" 24)
-+ (L1I_VA_FILLCK 27) ("27" 27)
-+ (L1I_VA_ULCK 28) ("28" 28)
-+ ))
-+)
-+
-+(define-hardware
-+ (name h-cctllvl)
-+ (comment "levels for CCTL")
-+ (type immediate (UINT 1))
-+ (values keyword "" (
-+ (1level 0) ("0" 0)
-+ (alevel 1) ("1" 1)
-+ ))
-+)
-+
-+(define-hardware
-+ (name h-msyncst)
-+ (comment "subtype for MSYNC")
-+ (type immediate (UINT 4))
-+ (values keyword "" (
-+ (All 0) ("0" 0)
-+ (Store 1) ("1" 1)
-+ ))
-+)
-+
-+(define-hardware
-+ (name h-dprefst)
-+ (comment "subtype for DPREF/DPREFI")
-+ (type immediate (UINT 4))
-+ (values keyword "" (
-+ (SRD 0) ("0" 0)
-+ (MRD 1) ("1" 1)
-+ (SWR 2) ("2" 2)
-+ (MWR 3) ("3" 3)
-+ (PTE 4) ("4" 4)
-+ (CLWR 5) ("5" 5)
-+ ))
-+)
-+
-+;;;;(define-hardware
-+;;;; (name h-syscallst)
-+;;;; (comment "subtype for SYSCALL")
-+;;;; (type immediate (UINT 4))
-+;;;; (values keyword "" (
-+;;;; (All 0) ("0" 0)
-+;;;; (Store 1) ("1" 1)
-+;;;; ))
-+;;;;)
-+
-+; ==============================================================================
-+; Instruction Operands.
-+; ==============================================================================
-+; These entries provide a layer between the assembler and the raw hardware
-+; description, and are used to refer to hardware elements in the semantic
-+; code. Usually there's a bit of over-specification, but in more complicated
-+; instruction sets there isn't.
-+
-+; NDS32 specific operand attributes:
-+
-+(define-attr
-+ (for operand)
-+ (type boolean)
-+ (name HASH-PREFIX)
-+ (comment "immediates have an optional '#' prefix")
-+)
-+
-+(dnop rt5 "destination register" () h-gr f-32-rt5)
-+(dnop ra5 "source register A" () h-gr f-32-ra5)
-+(dnop rb5 "source register B" () h-gr f-32-rb5)
-+(dnop rd1 "64-bit accumulation register" () h-accum f-32-rd1)
-+(dnop rd1hl "h/l part of acc register" () h-accum-hl f-32-rd1hl)
-+(dnop usridx "usr index" () h-usr f-32-usr)
-+(dnop groupidx "group index" () h-group f-32-group)
-+(dnop mfusridx "usr index for mfusr" () h-mfusridx f-32-group-usr)
-+(dnop mtusridx "usr index for mtusr" () h-mtusridx f-32-group-usr)
-+(dnop sr10 "system register" () h-sr f-32-sr10)
-+
-+(define-operand
-+ (name disp24)
-+ (comment "24-bit displacement")
-+ (attrs HASH-PREFIX RELAX)
-+ (type h-disp24)
-+ (index f-32t0-disp24)
-+ (handlers (parse "nds32_address") (print "address"))
-+)
-+(define-operand
-+ (name concat24)
-+ (comment "24-bit concat")
-+ (attrs HASH-PREFIX RELAX)
-+ (type h-concat24)
-+ (index f-32-concat24)
-+ (handlers (parse "nds32_address") (print "address"))
-+)
-+(define-operand
-+ (name disp16)
-+ (comment "16-bit displacement")
-+ (attrs HASH-PREFIX RELAX)
-+ (type h-disp16)
-+ (index f-32t1-disp16)
-+ (handlers (parse "nds32_address") (print "address"))
-+)
-+(define-operand
-+ (name disp9)
-+ (comment "9-bit displacement")
-+ (attrs HASH-PREFIX RELAX)
-+ (type h-disp9)
-+ (index f-32t1-disp9)
-+ (handlers (parse "nds32_address") (print "address"))
-+)
-+
-+(define-operand
-+ (name disp14)
-+ (comment "14-bit displacement")
-+ (attrs HASH-PREFIX RELAX)
-+ (type h-disp14)
-+ (index f-32t2-disp14)
-+ (handlers (parse "nds32_address") (print "address"))
-+)
-+
-+;(dnop disp24 "24-bit displacement" (RELAX) h-iaddr f-32t0-disp24)
-+;(dnop disp16 "16-bit displacement" (RELAX) h-iaddr f-32t1-disp16)
-+;(dnop disp9 "9-bit displacement" (RELAX) h-iaddr f-32t1-disp9)
-+;(dnop disp14 "14-bit displacement" (RELAX) h-iaddr f-32t2-disp14)
-+
-+(dnop tlbopst "subtypes for TLBOP" () h-tlbopst f-32t4-ext5)
-+(dnop cctlst "subtypes for CCTL" () h-cctlst f-32t4-ext5)
-+(dnop cctllvl "levels for CCTL" () h-cctllvl f-32tx-1_21)
-+(dnop msyncst "subtypes for MSYNC" () h-msyncst f-32t3-ext3)
-+(dnop dprefst "subtypes for DPREF/DPREFI" () h-dprefst f-32t2-st4)
-+(dnop standbyst "subtypes for STANDBY" () h-standbyst f-32t4-ext2)
-+
-+(define-operand (name hash) (comment "# prefix") (attrs)
-+ (type h-sint) ; doesn't really matter
-+ (index f-nil)
-+ (handlers (parse "hash") (print "hash"))
-+)
-+
-+(define-operand
-+ (name si)
-+ (comment "2-bit unsigned scaling index")
-+ (attrs HASH-PREFIX)
-+ (type h-si)
-+ (index f-32t3-sub10si)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name uimm5)
-+ (comment "5-bit unsigned count/index")
-+ (attrs HASH-PREFIX)
-+ (type h-uimm5)
-+ (index f-32t3-uimm5)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name mask4)
-+ (comment "4-bit mask for mw insns")
-+ (attrs HASH-PREFIX)
-+ (type h-mask4)
-+ (index f-32t5-mask4)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name swid15)
-+ (comment "15-bit software ID")
-+ (attrs HASH-PREFIX)
-+ (type h-swid15)
-+ (index f-32t3-swid15)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+; For hi20(foo)
-+(define-operand
-+ (name uhi20)
-+ (comment "high 20 bit immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-uhi20)
-+ (index f-32t1-uhi20)
-+ (handlers (parse "uhi20"))
-+)
-+
-+; For lo12(foo)
-+(define-operand
-+ (name slo20)
-+ (comment "20 bit signed immediate with lo12() or immediate value")
-+ (attrs HASH-PREFIX)
-+ (type h-slo20)
-+ (index f-32t1-slo20)
-+ (handlers (parse "slo20"))
-+)
-+
-+; For lo12(foo).
-+(define-operand
-+ (name ulo15d)
-+ (comment "15-bit unsigned immediate or low 12 bit unsigned immediate for lo12() on double-word")
-+ (attrs HASH-PREFIX)
-+ (type h-ulo15)
-+ (index f-32t2-ulo15d)
-+ (handlers (parse "ulo15d"))
-+)
-+
-+; For lo12(foo)
-+(define-operand
-+ (name slo15d)
-+ (comment "15-bit signed immediate or low 12 bit unsigned immediate for lo12() on double-word")
-+ (attrs HASH-PREFIX)
-+ (type h-slo15)
-+ (index f-32t2-slo15d)
-+ (handlers (parse "slo15d"))
-+)
-+
-+; For lo12(foo).
-+(define-operand
-+ (name ulo15w)
-+ (comment "15-bit unsigned immediate or low 12 bit unsigned immediate for lo12() on word")
-+ (attrs HASH-PREFIX)
-+ (type h-ulo15)
-+ (index f-32t2-ulo15w)
-+ (handlers (parse "ulo15w"))
-+)
-+
-+; For lo12(foo)
-+(define-operand
-+ (name slo15w)
-+ (comment "15-bit signed immediate or low 12 bit unsigned immediate for lo12() on word")
-+ (attrs HASH-PREFIX)
-+ (type h-slo15)
-+ (index f-32t2-slo15w)
-+ (handlers (parse "slo15w"))
-+)
-+
-+; For lo12(foo).
-+(define-operand
-+ (name ulo15h)
-+ (comment "15-bit unsigned immediate or low 12 bit unsigned immediate for lo12() on half-word")
-+ (attrs HASH-PREFIX)
-+ (type h-ulo15)
-+ (index f-32t2-ulo15h)
-+ (handlers (parse "ulo15h"))
-+)
-+
-+; For lo12(foo)
-+(define-operand
-+ (name slo15h)
-+ (comment "15-bit signed immediate or low 12 bit unsigned immediate for lo12() on half-word")
-+ (attrs HASH-PREFIX)
-+ (type h-slo15)
-+ (index f-32t2-slo15h)
-+ (handlers (parse "slo15h"))
-+)
-+
-+; For lo12(foo).
-+(define-operand
-+ (name ulo15b)
-+ (comment "15-bit unsigned immediate or low 12 bit unsigned immediate for lo12() on byte")
-+ (attrs HASH-PREFIX)
-+ (type h-ulo15)
-+ (index f-32t2-ulo15b)
-+ (handlers (parse "ulo15"))
-+)
-+
-+; For lo12(foo)
-+(define-operand
-+ (name slo15b)
-+ (comment "15-bit signed immediate or low 12 bit unsigned immediate for lo12() on byte")
-+ (attrs HASH-PREFIX)
-+ (type h-slo15)
-+ (index f-32t2-slo15b)
-+ (handlers (parse "slo15"))
-+)
-+
-+; For lo12(foo).
-+(define-operand
-+ (name ulo15)
-+ (comment "15-bit unsigned immediate or low 12 bit unsigned immediate for lo12()")
-+ (attrs HASH-PREFIX)
-+ (type h-ulo15)
-+ (index f-32t2-ulo15b)
-+ (handlers (parse "ulo15"))
-+)
-+
-+; For lo12(foo)
-+(define-operand
-+ (name slo15)
-+ (comment "15-bit signed immediate or low 12 bit unsigned immediate for lo12()")
-+ (attrs HASH-PREFIX)
-+ (type h-slo15)
-+ (index f-32t2-slo15b)
-+ (handlers (parse "slo15"))
-+)
-+
-+(define-operand
-+ (name uimm_sr10)
-+ (comment "10-bit system register index")
-+ (attrs HASH-PREFIX)
-+ (type h-sr10)
-+ (index f-32-sr10)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+; ==============================================================================
-+; Instruction definitions.
-+; ==============================================================================
-+;
-+; Notes while wip:
-+; - dni is a cover macro to the real "this is an instruction" keyword.
-+; The syntax of the real one is yet to be determined.
-+; At the lowest level (i.e. the "real" one) it will probably take a variable
-+; list of arguments where each argument [perhaps after the standard three of
-+; name, comment, attrs] is "(keyword arg-to-keyword)". This syntax is simple
-+; and yet completely upward extensible. And given the macro facility, one
-+; needn't code at that low a level so even though it'll be more verbose than
-+; necessary it won't matter. This same reasoning can be applied to most
-+; types of entries in this file.
-+
-+; NDS32 specific instruction attributes:
-+; C/C++ performance extension instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name EXT)
-+ (comment "C/C++ performance extension instructions")
-+)
-+
-+; C/C++ performance 2 extension instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name EXT2)
-+ (comment "C/C++ performance 2 extension instructions")
-+)
-+
-+; Andes 16-bit instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name A16)
-+ (comment "Andes 16-bit instructions")
-+)
-+
-+; Andes 16-bit baseline version 2 instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name A16V2)
-+ (comment "Andes 16-bit baseline version 2 instructions")
-+)
-+
-+; Andes 32-bit baseline version 2 instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name A32V2)
-+ (comment "Andes 32-bit baseline version 2 instructions")
-+)
-+
-+; Saturation Arithmetic instruction
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name STAT)
-+ (comment "Saturation Arithmetic instruction")
-+)
-+
-+; Inline Function Call instruction
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name IFCEXT)
-+ (comment "Inline function call instructions")
-+)
-+
-+; COP instruction
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name COP)
-+ (comment "coprocessor instructions")
-+)
-+
-+; COPV2 instruction
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name COPV2)
-+ (comment "coprocessor V2 instructions")
-+)
-+
-+; FPU single precision instruction
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name FPU_SP)
-+ (comment "floating point instructions for single precision only")
-+)
-+
-+; FPU double precision instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name FPU_DP)
-+ (comment "floating point instructions for double precision only")
-+)
-+
-+; FPU instructions common to DP and SP
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name FPU_COM)
-+ (comment "floating point instructions common to SP and DP")
-+)
-+
-+; FPU instructions common to DP and SP
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name FPU_BOTH)
-+ (comment "floating point instructions exist when both SP and DP are implemented")
-+)
-+
-+; FPU single precision mac instruction
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name FPU_SP_MAC)
-+ (comment "floating point instructions of single precision mac")
-+)
-+
-+; FPU double precision mac instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name FPU_DP_MAC)
-+ (comment "floating point instructions of double precision mac")
-+)
-+
-+; 32-bit STRING extension
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name STRING)
-+ (comment "32-bit string instructions extension")
-+)
-+
-+; MAC instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name MAC)
-+ (comment "multiply and accumulate instructions")
-+)
-+
-+;DX_REG instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name DX_REG)
-+ (comment "Instructions involve Dx registers")
-+)
-+
-+; DIV instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name DIV)
-+ (comment "divide instructions")
-+)
-+
-+; AUDIO instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name AUDIO)
-+ (comment "audio instructions")
-+)
-+
-+; Andes 32-bit baseline version 3 instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name V3)
-+ (comment "Andes 32-bit baseline version 3 instructions")
-+)
-+
-+; Andes 32-bit baseline version 3-mini instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name NOT_V3M)
-+ (comment "Andes 32-bit baseline version 3-mini instructions")
-+)
-+
-+; IDOC attribute for instruction documentation.
-+
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name IDOC)
-+ (comment "insn kind for documentation")
-+ (attrs META)
-+ (values
-+ (MEM - () "Memory")
-+ (ALU - () "ALU")
-+ (BR - () "Branch")
-+ (ACCUM - () "Accumulator")
-+ (MAC - () "Multiply/Accumulate")
-+ (MISC - () "Miscellaneous")
-+ )
-+)
-+
-+(define-pmacro (sext mode arg) (ext mode arg))
-+;(define-pmacro (baseline arg) ((n1m arg) (n1hm arg) (n1pm arg) (n1phm arg)))
-+(define-pmacro (baseline arg) ((n1hm arg)))
-+
-+(dni movi "movi"
-+ ((PIPE OS) (IDOC ALU))
-+ "movi $rt5,$slo20"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_MOVI rt5 slo20)
-+ (sequence ()
-+ (clobber rt5)
-+ (c-call VOID "nds32_handler_movi" (index-of rt5) slo20 ))
-+ (baseline (unit u-exec))
-+)
-+
-+(dni sethi "sethi"
-+ ((PIPE OS) (IDOC ALU))
-+ "sethi $rt5,$uhi20"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_SETHI rt5 uhi20)
-+ (set rt5 (sll uhi20 (const 12)))
-+ (baseline (unit u-exec))
-+)
-+
-+(define-pmacro (arith-op mnemonic sem-op mode)
-+ (begin
-+ (dni (.sym mnemonic "i")
-+ (.str mnemonic "i reg/reg/slo15")
-+ ((PIPE OS) (IDOC ALU))
-+ (.str mnemonic "i $rt5,$ra5,$slo15")
-+ (+ IFMT_32 OPC6G_5 (.sym "OPC6C5_" (.upcase mnemonic) "I") rt5 ra5 ulo15)
-+ (set rt5 (sem-op mode ra5 slo15))
-+ (baseline (unit u-exec))
-+ )
-+ (dni mnemonic
-+ (.str mnemonic " reg/reg/reg")
-+ ((PIPE OS) (IDOC ALU))
-+ (.str mnemonic " $rt5,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_0 (.sym "ALU_1_SUB10C0_" (.upcase mnemonic)))
-+ (set rt5 (sem-op mode ra5 rb5))
-+ (baseline (unit u-exec))
-+ )
-+ )
-+)
-+(arith-op add add SI)
-+(arith-op slts lt SI)
-+(arith-op slt ltu USI)
-+
-+(dni subri "reversed subtraction with immediate"
-+ ((PIPE OS) (IDOC ALU))
-+ "subri $rt5,$ra5,$slo15"
-+ (+ IFMT_32 OPC6G_5 OPC6C5_SUBRI rt5 ra5 slo15)
-+ (set rt5 (sub slo15 ra5))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+)
-+(dnmi neg "neg"
-+ (NO-DIS (PIPE O) (IDOC ALU))
-+ "neg $rt5,$ra5"
-+ (emit subri rt5 ra5 (f-32t2-slo15b 0))
-+)
-+(dni sub "sub"
-+ ((PIPE OS) (IDOC ALU))
-+ "sub $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_0 ALU_1_SUB10C0_SUB)
-+ (set rt5 (sub ra5 rb5))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+)
-+
-+(define-pmacro (logic-op mnemonic sem-op)
-+ (begin
-+ (dni (.sym mnemonic "i")
-+ (.str mnemonic "i reg/reg/ulo15")
-+ ((PIPE OS) (IDOC ALU))
-+ (.str mnemonic "i $rt5,$ra5,$ulo15")
-+ (+ IFMT_32 OPC6G_5 (.sym "OPC6C5_" (.upcase mnemonic) "I") rt5 ra5 ulo15)
-+ (sequence ()
-+ (use ra5)
-+ (clobber rt5)
-+ (c-call VOID (.str "nds32_handler_" mnemonic "i") (index-of rt5) (index-of ra5) ulo15))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ )
-+ (dni mnemonic
-+ (.str mnemonic " reg/reg/reg")
-+ ((PIPE OS) (IDOC ALU))
-+ (.str mnemonic " $rt5,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_0 (.sym "ALU_1_SUB10C0_" (.upcase mnemonic)))
-+ (sequence ()
-+ (use ra5)
-+ (use rb5)
-+ (clobber rt5)
-+ (c-call VOID (.str "nds32_handler_" mnemonic ) (index-of rt5) (index-of ra5) (index-of rb5)))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ )
-+ )
-+)
-+(logic-op and and)
-+(logic-op xor xor)
-+(logic-op or or)
-+
-+(dni nor "nor"
-+ ((PIPE OS) (IDOC ALU))
-+ "nor $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_0 ALU_1_SUB10C0_NOR)
-+ (set rt5 (xor (or ra5 rb5) (const SI -1)))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+)
-+;SVA, SVS
-+(define-pmacro (set-overflow-op suffix sem-op)
-+ (begin
-+ (dni (.sym "sv" suffix) (.str "sv" suffix)
-+ ((PIPE OS) (IDOC ALU))
-+ (.str "sv" suffix " $rt5,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_3 (.sym "ALU_1_SUB10C3_SV" (.upcase suffix)))
-+ (set rt5 ((.sym sem-op "-oflag") ra5 rb5 (const 0)))
-+ ((n1hm (unit u-exec))))))
-+
-+(set-overflow-op a add)
-+(set-overflow-op s sub)
-+
-+(define-pmacro (extend-op prefix suffix mode)
-+ (begin
-+ (dni (.sym prefix "e" suffix) (.str prefix "e" suffix)
-+ ((PIPE OS) (IDOC ALU))
-+ (.str prefix "e" suffix " $rt5,$ra5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 RES5_17_0 SUB10D_0 SUB10G_2 (.sym "ALU_1_SUB10C2_" (.upcase prefix) "E" (.upcase suffix)))
-+ (set rt5 ((.sym prefix "ext") SI (trunc mode ra5)))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ )
-+ )
-+)
-+(extend-op s b QI)
-+(extend-op s h HI)
-+;(extend-op z b UQI) ;alias to addi rt5, ra5, 0xff
-+(extend-op z h UHI)
-+
-+(dnmi zeb "zeb"
-+ (NO-DIS (PIPE OS) (IDOC ALU))
-+ "zeb $rt5,$ra5"
-+ (emit andi rt5 ra5 (f-32t2-ulo15b #xff))
-+)
-+
-+(dni wsbh "half-word byte-swap in word"
-+ ((PIPE OS) (IDOC ALU))
-+ "wsbh $rt5,$ra5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 RES5_17_0 SUB10D_0 SUB10G_2 ALU_1_SUB10C2_WSBH)
-+ (set rt5 (or (and (srl ra5 (const 8)) (const #x00ff00ff)) (and (sll ra5 (const 8)) (const #xff00ff00))))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+)
-+
-+(define-pmacro (shift-op mnemonic sem-op)
-+ (begin
-+ (define-full-insn (.sym mnemonic "i")
-+ (.str mnemonic " reg/reg/uimm5")
-+ ((PIPE OS) (IDOC ALU))
-+ (.str mnemonic "i $rt5,$ra5,$uimm5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 uimm5 SUB10D_0 SUB10G_1 (.sym "ALU_1_SUB10C1_" (.upcase mnemonic) "I"))
-+ ()
-+ (set rt5 (sem-op ra5 uimm5))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ ((print "insn-special9"))
-+ )
-+ (dni mnemonic
-+ (.str mnemonic " reg/reg/reg")
-+ ((PIPE OS) (IDOC ALU))
-+ (.str mnemonic " $rt5,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_1 (.sym "ALU_1_SUB10C1_" (.upcase mnemonic)))
-+ (set rt5 (sem-op ra5 (and rb5 (const #x1f))))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ )
-+ )
-+)
-+(shift-op sll sll)
-+(shift-op sra sra)
-+(shift-op rotr ror)
-+
-+
-+(define-full-insn srli "srli reg/reg/uimm5"
-+ ((PIPE OS) (IDOC ALU))
-+ "srli $rt5,$ra5,$uimm5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 uimm5 SUB10D_0 SUB10G_1 ALU_1_SUB10C1_SRLI)
-+ ()
-+ (if (and USI (and USI (eq USI (index-of rt5) (const 0)) (eq USI (index-of ra5) (const 0))) (eq USI uimm5 (const 0)))
-+ (sequence ()
-+ (c-code VOID " SET_NOP_CNT_COUNTER();\n")
-+ (c-code VOID " //NOP_TRACE_RESULT (current_cpu)\n")
-+ )
-+ (set rt5 (srl ra5 uimm5))
-+ )
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ ((print "insn-special9"))
-+)
-+
-+(dni srl "srl reg/reg/reg"
-+ ((PIPE OS) (IDOC ALU))
-+ "srl $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_1 ALU_1_SUB10C1_SRL)
-+ (set rt5 (srl ra5 (and rb5 (const #x1f))))
-+ (
-+ (n1hm (unit u-exec ))
-+ )
-+)
-+
-+(dni mul "mul"
-+ ((PIPE S) (IDOC ALU) MAC)
-+ "mul $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_0 SUB10G_4 ALU_2_SUB10C4_MUL)
-+ (set rt5 (mul ra5 rb5))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+(define-pmacro (mult64-op mnemonic ext-op mode)
-+ (begin
-+ (dni (.sym mnemonic "64") (.str mnemonic "64")
-+ ((PIPE S) (IDOC ALU) MAC DX_REG NOT_V3M)
-+ (.str mnemonic "64 $rd1,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 RES3_7_0 rd1 RES1_11_0 ra5 rb5 SUB10D_0 SUB10G_5 (.sym "ALU_2_SUB10C5_" (.upcase mnemonic) "64"))
-+ (if VOID (c-code VOID "1 == GET_H_SR_FLD(MSC_CFG,NOD)")
-+ ;then
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID (.str "\tgoto " (.upcase mnemonic) "64_interruption;\n\n")))
-+
-+ ;else
-+ (set rd1 (mul mode (ext-op mode ra5) (ext-op mode rb5))))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+ )
-+ )
-+)
-+(mult64-op mults sext DI)
-+(mult64-op mult zext UDI)
-+
-+(define-pmacro (madd64-op sem-op suffix ext-op mode)
-+ (begin
-+ (dni (.sym "m" sem-op suffix "64") (.str "m" suffix "64")
-+ ((PIPE S) (IDOC ALU) MAC DX_REG NOT_V3M)
-+ (.str "m" sem-op suffix "64 $rd1,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 RES3_7_0 rd1 RES1_11_0 ra5 rb5 SUB10D_0 SUB10G_5 (.sym "ALU_2_SUB10C5_M" (.upcase sem-op) (.upcase suffix) "64"))
-+ (if VOID (c-code VOID "1 == GET_H_SR_FLD(MSC_CFG,NOD)")
-+ ;then
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID (.str "\tgoto M" (.upcase sem-op) (.upcase suffix) "64_interruption;\n\n")))
-+
-+ ;else
-+ (set rd1 (sem-op mode rd1 (mul mode (ext-op mode ra5) (ext-op mode rb5)))))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+ )
-+ )
-+)
-+(madd64-op add "s" sext DI)
-+(madd64-op add "" zext UDI)
-+(madd64-op sub "s" sext DI)
-+(madd64-op sub "" zext UDI)
-+
-+(define-pmacro (mult32-op mnemonic ext-op mode)
-+ (begin
-+ (dni (.sym mnemonic "32") (.str mnemonic "32")
-+ ((PIPE S) (IDOC ALU) MAC DX_REG NOT_V3M)
-+ (.str mnemonic "32 $rd1,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 RES3_7_0 rd1 RES1_11_0 ra5 rb5 SUB10D_0 SUB10G_6 (.sym "ALU_2_SUB10C6_" (.upcase mnemonic) "32"))
-+ (if VOID (c-code VOID "1 == GET_H_SR_FLD(MSC_CFG,NOD)")
-+ ;then
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID (.str "\tgoto " (.upcase mnemonic) "32_interruption;\n\n")))
-+
-+ ;else
-+ (set USI (reg h-accum-hl (sll (index-of rd1) (const 1))) (mul mode (ext-op mode ra5) (ext-op mode rb5))))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+ )
-+ )
-+)
-+(mult32-op mult zext UDI)
-+
-+(define-pmacro (madd32-op sem-op suffix ext-op mode)
-+ (begin
-+ (dni (.sym "m" sem-op suffix "32") (.str "m" suffix "32")
-+ ((PIPE S) (IDOC ALU) MAC DX_REG NOT_V3M)
-+ (.str "m" sem-op suffix "32 $rd1,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 RES3_7_0 rd1 RES1_11_0 ra5 rb5 SUB10D_0 SUB10G_6 (.sym "ALU_2_SUB10C6_M" (.upcase sem-op) (.upcase suffix) "32"))
-+ (if VOID (c-code VOID "1 == GET_H_SR_FLD(MSC_CFG,NOD)")
-+ ;then
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID (.str "\tgoto M" (.upcase sem-op) (.upcase suffix) "32_interruption;\n\n")))
-+
-+ ;else
-+ (set USI (reg h-accum-hl (sll (index-of rd1) (const 1))) (sem-op mode (reg h-accum-hl (sll (index-of rd1) (const 1))) (mul mode (ext-op mode ra5) (ext-op mode rb5)))))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+ )
-+ )
-+)
-+(madd32-op add "" zext UDI)
-+(madd32-op sub "" zext UDI)
-+
-+(dni mfusr "move from user special registers"
-+ ((PIPE S) (IDOC ALU) DX_REG NOT_V3M)
-+ "mfusr $rt5,$mfusridx"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 usridx groupidx SUB10D_0 SUB10G_4 ALU_2_SUB10C4_MFUSR)
-+ (set rt5 (c-call USI "nds32_mfusr_handler" (index-of rt5) groupidx usridx))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+(dni mtusr "move to user special register"
-+ ((PIPE S) (IDOC ALU) DX_REG NOT_V3M)
-+ "mtusr $rt5,$mtusridx"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 usridx groupidx SUB10D_0 SUB10G_4 ALU_2_SUB10C4_MTUSR)
-+ (c-call VOID " nds32_mtusr_handler" pc rt5 groupidx usridx)
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+ (define-full-insn lbi "lbi"
-+ ((PIPE O) (IDOC MEM))
-+ "lbi $rt5,[$ra5+$slo15b]"
-+ (+ IFMT_32 OPC6G_0 OPC6C0_LBI rt5 ra5 slo15b)
-+ ()
-+ (sequence ()
-+ (c-code VOID "if (TEST_H_SR_FLD(INT_MASK,ALZ)) { \n")
-+ (if (and USI (and USI (eq USI (index-of rt5) (const 0)) (eq USI (index-of ra5) (const 0))) (eq USI slo15b (const 0)))
-+ (sequence ()
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED;\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID " goto LBI_interruption;\n")
-+ )
-+ )
-+ (c-code VOID "}\n")
-+ (set rt5 (zext USI (mem UQI (add ra5 slo15b))))
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ ((print "insn-special20"))
-+ )
-+
-+ (define-full-insn lbi.bi "lbi.bi"
-+ ((PIPE O) (IDOC MEM))
-+ "lbi.bi $rt5,[$ra5],$slo15b"
-+ (+ IFMT_32 OPC6G_0 OPC6C0_LBIP rt5 ra5 slo15b)
-+ ()
-+ (parallel ()
-+ (set rt5 (zext USI (mem UQI ra5)))
-+ (set ra5 (add ra5 slo15b))
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ ((print "insn-special20"))
-+ )
-+
-+ (dni lb "lb"
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ "lb $rt5,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_0 MEM_SUB10C0_LB)
-+ (set rt5 (zext USI (mem UQI (add ra5 (sll rb5 si)))))
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ )
-+
-+ (dni lb.bi "lb.bi"
-+ ((PIPE O) (IDOC MEM))
-+ "lb.bi $rt5,[$ra5],$rb5<<$si"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_0 MEM_SUB10C0_LBP)
-+ (parallel ()
-+ (set rt5 (zext USI (mem UQI ra5)))
-+ (set ra5 (add ra5 (sll rb5 si)))
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ )
-+
-+(define-pmacro (loadb-op suffix mode ext-op)
-+ (begin
-+ (dnmi (.sym l suffix "i2") (.str "l" suffix "i2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "i $rt5,[$ra5]")
-+ (emit (.sym l suffix i) rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+
-+ (dnmi (.sym l suffix "i.p") (.str "l" suffix "i.p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "i.p $rt5,[$ra5],$slo15" suffix)
-+ (emit (.sym l suffix "i.bi") rt5 ra5 (.sym "slo15" suffix))
-+ )
-+
-+ (dnmi (.sym l suffix "1") (.str "l" suffix "1")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5+($rb5<<$si)]")
-+ (emit (.sym l suffix) rt5 ra5 rb5 si)
-+ )
-+ (dnmi (.sym l suffix "2") (.str "l" suffix "2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5+$rb5]")
-+ (emit (.sym l suffix) rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ (dnmi (.sym l suffix "3") (.str "l" suffix "3")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5]")
-+ (emit (.sym l suffix i) rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+
-+ (dnmi (.sym l suffix ".bi2") (.str "l" suffix ".bi2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".bi $rt5,[$ra5],$rb5")
-+ (emit (.sym l suffix ".bi") rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ (dnmi (.sym l suffix ".p") (.str "l" suffix ".p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".p $rt5,[$ra5],$rb5<<$si")
-+ (emit (.sym l suffix ".bi") rt5 ra5 rb5 si)
-+ )
-+ (dnmi (.sym l suffix ".p2") (.str "l" suffix ".p2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".p $rt5,[$ra5],$rb5")
-+ (emit (.sym l suffix ".bi") rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ )
-+)
-+(loadb-op b UQI zext)
-+
-+(define-pmacro (loadh-op suffix mode ext-op)
-+ (begin
-+ (define-full-insn (.sym l suffix i) (.str "l" suffix "i")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix "i $rt5,[$ra5+$slo15" suffix "]")
-+ (+ IFMT_32 OPC6G_0 (.sym "OPC6C0_L" (.upcase suffix) "I") rt5 ra5 (.sym "slo15" suffix))
-+ ()
-+ (set rt5 (ext-op USI (mem mode (add ra5 (.sym "slo15" suffix)))))
-+ ((n1hm (unit u-load)))
-+ ((print "insn-special20"))
-+ )
-+ (dnmi (.sym l suffix "i2") (.str "l" suffix "i2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "i $rt5,[$ra5]")
-+ (emit (.sym l suffix i) rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+
-+ (define-full-insn (.sym l suffix "i.bi") (.str "l" suffix "i.bi")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix "i.bi $rt5,[$ra5],$slo15" suffix)
-+ (+ IFMT_32 OPC6G_0 (.sym "OPC6C0_L" (.upcase suffix) "IP") rt5 ra5 (.sym "slo15" suffix))
-+ ()
-+ (parallel ()
-+ (set rt5 (ext-op USI (mem mode ra5)))
-+ (set ra5 (add ra5 (.sym "slo15" suffix)))
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ ((print "insn-special20"))
-+ ; Note: `pred' is the constraint. Also useful here is (ref name)
-+ ; and returns true if operand <name> was referenced
-+ ; (where "referenced" means _read_ if input operand and _written_ if
-+ ; output operand).
-+ ; args to unit are "unit-name (name1 value1) ..."
-+ ; - cycles(done),issue,pred are also specified this way
-+ ; - if unspecified, default is used
-+ ; - for ins/outs, extra arg is passed that says what was specified
-+ ; - this is AND'd with `written' for outs
-+; ((n1m (unit u-load (pred (const 1)))
-+; (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1))))
-+; )
-+ )
-+ (dnmi (.sym l suffix "i.p") (.str "l" suffix "i.p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "i.p $rt5,[$ra5],$slo15" suffix)
-+ (emit (.sym l suffix "i.bi") rt5 ra5 (.sym "slo15" suffix))
-+ )
-+
-+ (dni (.sym l suffix) (.str "l" suffix)
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5+$rb5<<$si]")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_0 (.sym "MEM_SUB10C0_L" (.upcase suffix)))
-+ (set rt5 (ext-op USI (mem mode (add ra5 (sll rb5 si)))))
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ )
-+ (dnmi (.sym l suffix "1") (.str "l" suffix "1")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5+($rb5<<$si)]")
-+ (emit (.sym l suffix) rt5 ra5 rb5 si)
-+ )
-+ (dnmi (.sym l suffix "2") (.str "l" suffix "2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5+$rb5]")
-+ (emit (.sym l suffix) rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ (dnmi (.sym l suffix "3") (.str "l" suffix "3")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5]")
-+ (emit (.sym l suffix i) rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+
-+ (dni (.sym l suffix ".bi") (.str "l" suffix ".bi")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".bi $rt5,[$ra5],$rb5<<$si")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_0 (.sym "MEM_SUB10C0_L" (.upcase suffix) "P"))
-+ (parallel ()
-+ (set rt5 (ext-op USI (mem mode ra5)))
-+ (set ra5 (add ra5 (sll rb5 si)))
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ ; Note: `pred' is the constraint. Also useful here is (ref name)
-+ ; and returns true if operand <name> was referenced
-+ ; (where "referenced" means _read_ if input operand and _written_ if
-+ ; output operand).
-+ ; args to unit are "unit-name (name1 value1) ..."
-+ ; - cycles(done),issue,pred are also specified this way
-+ ; - if unspecified, default is used
-+ ; - for ins/outs, extra arg is passed that says what was specified
-+ ; - this is AND'd with `written' for outs
-+; ((n1m (unit u-load (pred (const 1)))
-+; (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1))))
-+; )
-+ )
-+ (dnmi (.sym l suffix ".bi2") (.str "l" suffix ".bi2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".bi $rt5,[$ra5],$rb5")
-+ (emit (.sym l suffix ".bi") rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ (dnmi (.sym l suffix ".p") (.str "l" suffix ".p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".p $rt5,[$ra5],$rb5<<$si")
-+ (emit (.sym l suffix ".bi") rt5 ra5 rb5 si)
-+ )
-+ (dnmi (.sym l suffix ".p2") (.str "l" suffix ".p2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".p $rt5,[$ra5],$rb5")
-+ (emit (.sym l suffix ".bi") rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ )
-+)
-+(loadh-op h UHI zext)
-+
-+(define-full-insn lwi "lwi"
-+ ((PIPE O) (IDOC MEM))
-+ "lwi $rt5,[$ra5+$slo15w]"
-+ (+ IFMT_32 OPC6G_0 OPC6C0_LWI rt5 ra5 slo15w)
-+ ()
-+ (sequence ((USI data))
-+ (set data (zext USI (mem USI (add ra5 slo15w))))
-+ (set rt5 (c-code USI "nds32_baseline_am2gr_handler(current_cpu, tmp_data)")))
-+ ((n1hm (unit u-load)))
-+ ((print "insn-special20"))
-+)
-+
-+(define-full-insn lwi.bi "lwi.bi"
-+ ((PIPE O) (IDOC MEM))
-+ "lwi.bi $rt5,[$ra5],$slo15w"
-+ (+ IFMT_32 OPC6G_0 OPC6C0_LWIP rt5 ra5 slo15w)
-+ ()
-+ (sequence ((USI data))
-+ (set data (zext USI (mem USI ra5)))
-+ (parallel ()
-+ (set rt5 (c-code USI "nds32_baseline_am2gr_handler(current_cpu, tmp_data)"))
-+ (set ra5 (add ra5 slo15w))))
-+ ((n1hm (unit u-load)))
-+ ((print "insn-special20"))
-+)
-+
-+(dni lw "lw"
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ "lw $rt5,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_0 MEM_SUB10C0_LW)
-+ (sequence ((USI data))
-+ (set data (zext USI (mem USI (add ra5 (sll rb5 si)))))
-+ (set rt5 (c-code USI "nds32_baseline_am2gr_handler(current_cpu, tmp_data)")))
-+ ((n1hm (unit u-load))))
-+
-+
-+(dni lw.bi "lw.bi"
-+ ((PIPE O) (IDOC MEM))
-+ "lw.bi $rt5,[$ra5],$rb5<<$si"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_0 MEM_SUB10C0_LWP)
-+ (sequence ((USI data))
-+ (set data (zext USI (mem USI ra5)))
-+ (parallel ()
-+ (set rt5 (c-code USI "nds32_baseline_am2gr_handler(current_cpu, tmp_data)"))
-+ (set ra5 (add ra5 (sll rb5 si)))))
-+ ((n1hm (unit u-load))))
-+
-+(define-pmacro (loadw-op suffix mode ext-op)
-+ (begin
-+
-+ (dnmi (.sym l suffix "i2") (.str "l" suffix "i2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "i $rt5,[$ra5]")
-+ (emit (.sym l suffix i) rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+
-+ (dnmi (.sym l suffix "i.p") (.str "l" suffix "i.p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "i.p $rt5,[$ra5],$slo15" suffix)
-+ (emit (.sym l suffix "i.bi") rt5 ra5 (.sym "slo15" suffix)))
-+
-+ (dnmi (.sym l suffix "1") (.str "l" suffix "1")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5+($rb5<<$si)]")
-+ (emit (.sym l suffix) rt5 ra5 rb5 si))
-+
-+ (dnmi (.sym l suffix "2") (.str "l" suffix "2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5+$rb5]")
-+ (emit (.sym l suffix) rt5 ra5 rb5 (f-32t3-sub10si 0)))
-+
-+ (dnmi (.sym l suffix "3") (.str "l" suffix "3")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5]")
-+ (emit (.sym l suffix i) rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0)))
-+
-+ (dnmi (.sym l suffix ".bi2") (.str "l" suffix ".bi2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".bi $rt5,[$ra5],$rb5")
-+ (emit (.sym l suffix ".bi") rt5 ra5 rb5 (f-32t3-sub10si 0)))
-+
-+ (dnmi (.sym l suffix ".p") (.str "l" suffix ".p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".p $rt5,[$ra5],$rb5<<$si")
-+ (emit (.sym l suffix ".bi") rt5 ra5 rb5 si))
-+
-+ (dnmi (.sym l suffix ".p2") (.str "l" suffix ".p2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".p $rt5,[$ra5],$rb5")
-+ (emit (.sym l suffix ".bi") rt5 ra5 rb5 (f-32t3-sub10si 0)))
-+ )
-+ )
-+(loadw-op w USI zext)
-+
-+
-+(dni lwup "load word with user privilege"
-+ (NO-DIS (PIPE O) (IDOC MEM) NOT_V3M)
-+ "lwup $rt5,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_4 MEM_SUB10C4_LWUP)
-+ (sequence ()
-+ (c-call VOID "set_user_privilege")
-+ (set rt5 (mem USI (add ra5 (sll rb5 si))))
-+ (c-call VOID "clr_user_privilege")
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+)
-+(dnmi lwup1 "load word with user privilege (1)"
-+ ((PIPE O) (IDOC MEM) NOT_V3M)
-+ "lwup $rt5,[$ra5+($rb5<<$si)]"
-+ (emit lwup rt5 ra5 rb5 si)
-+)
-+(dnmi lwup2 "load word with user privilege (2)"
-+ (NO-DIS (PIPE O) (IDOC MEM) NOT_V3M)
-+ "lwup $rt5,[$ra5+$rb5]"
-+ (emit lwup rt5 ra5 rb5 (f-32t3-sub10si 0))
-+)
-+
-+(dni swup "store word with user privilege"
-+ (NO-DIS (PIPE O) (IDOC MEM) NOT_V3M)
-+ "swup $rt5,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_5 MEM_SUB10C5_SWUP)
-+ (sequence ()
-+ (c-call VOID "set_user_privilege")
-+ (set USI (mem USI (add ra5 (sll rb5 si))) rt5)
-+ (c-call VOID "clr_user_privilege")
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+)
-+(dnmi swup1 "store word with user privilege (1)"
-+ ((PIPE O) (IDOC MEM) NOT_V3M)
-+ "swup $rt5,[$ra5+($rb5<<$si)]"
-+ (emit swup rt5 ra5 rb5 si)
-+)
-+(dnmi swup2 "store word with user privilege (2)"
-+ (NO-DIS (PIPE O) (IDOC MEM) NOT_V3M)
-+ "swup $rt5,[$ra5+$rb5]"
-+ (emit swup rt5 ra5 rb5 (f-32t3-sub10si 0))
-+)
-+
-+(define-pmacro (loads-op suffix mode ext-op)
-+ (begin
-+ (define-full-insn (.sym l suffix "si") (.str "l" suffix "si")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix "si $rt5,[$ra5+$slo15" suffix "]")
-+ (+ IFMT_32 OPC6G_2 (.sym "OPC6C2_L" (.upcase suffix) "SI") rt5 ra5 (.sym "slo15" suffix))
-+ ()
-+ (set rt5 (ext-op SI (mem mode (add ra5 (.sym "slo15" suffix)))))
-+ ((n1hm (unit u-load)))
-+ ((print "insn-special20"))
-+ )
-+ (dnmi (.sym l suffix "si2") (.str "l" suffix "si2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "si $rt5,[$ra5]")
-+ (emit (.sym l suffix "si") rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+
-+ (define-full-insn (.sym l suffix "si.bi") (.str "l" suffix "si.bi")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix "si.bi $rt5,[$ra5],$slo15" suffix)
-+ (+ IFMT_32 OPC6G_2 (.sym "OPC6C2_L" (.upcase suffix)"SIP") rt5 ra5 (.sym "slo15" suffix))
-+ ()
-+ (parallel ()
-+ (set rt5 (ext-op SI (mem mode ra5)))
-+ (set ra5 (add ra5 (.sym "slo15" suffix)))
-+ )
-+ ((n1hm (unit u-load)))
-+ ((print "insn-special20"))
-+ ; Note: `pred' is the constraint. Also useful here is (ref name)
-+ ; and returns true if operand <name> was referenced
-+ ; (where "referenced" means _read_ if input operand and _written_ if
-+ ; output operand).
-+ ; args to unit are "unit-name (name1 value1) ..."
-+ ; - cycles(done),issue,pred are also specified this way
-+ ; - if unspecified, default is used
-+ ; - for ins/outs, extra arg is passed that says what was specified
-+ ; - this is AND'd with `written' for outs
-+; ((n1m (unit u-load (pred (const 1)))
-+; (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1))))
-+; )
-+ )
-+ (dnmi (.sym l suffix "si.p") (.str "l" suffix "si.p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "si.p $rt5,[$ra5],$slo15" suffix)
-+ (emit (.sym l suffix "si.bi") rt5 ra5 (.sym "slo15" suffix))
-+ )
-+
-+ (dni (.sym l suffix s) (.str "l" suffix "s")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "s $rt5,[$ra5+$rb5<<$si]")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_2 (.sym "MEM_SUB10C2_L" (.upcase suffix) "S"))
-+ (set rt5 (ext-op SI (mem mode (add ra5 (sll rb5 si)))))
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ )
-+ (dnmi (.sym l suffix "s1") (.str "l" suffix "s1")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix "s $rt5,[$ra5+($rb5<<$si)]")
-+ (emit (.sym l suffix "s") rt5 ra5 rb5 si)
-+ )
-+ (dnmi (.sym l suffix "s2") (.str "l" suffix "s2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "s $rt5,[$ra5+$rb5]")
-+ (emit (.sym l suffix "s") rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ (dnmi (.sym l suffix "s3") (.str "l" suffix "s3")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "s $rt5,[$ra5]")
-+ (emit (.sym l suffix "si") rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+
-+
-+ (dni (.sym l suffix "s.bi") (.str "l" suffix "s.bi")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix "s.bi $rt5,[$ra5],$rb5<<$si")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_2 (.sym "MEM_SUB10C2_L" (.upcase suffix) "SP"))
-+ (parallel ()
-+ (set rt5 (ext-op SI (mem mode ra5)))
-+ (set ra5 (add ra5 (sll rb5 si)))
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ ; Note: `pred' is the constraint. Also useful here is (ref name)
-+ ; and returns true if operand <name> was referenced
-+ ; (where "referenced" means _read_ if input operand and _written_ if
-+ ; output operand).
-+ ; args to unit are "unit-name (name1 value1) ..."
-+ ; - cycles(done),issue,pred are also specified this way
-+ ; - if unspecified, default is used
-+ ; - for ins/outs, extra arg is passed that says what was specified
-+ ; - this is AND'd with `written' for outs
-+; ((n1m (unit u-load (pred (const 1)))
-+; (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1))))
-+; )
-+ )
-+ (dnmi (.sym l suffix "s.bi2") (.str "l" suffix "s.bi2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "s.bi $rt5,[$ra5],$rb5")
-+ (emit (.sym l suffix "s.bi") rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ (dnmi (.sym l suffix "s.p") (.str "l" suffix "s.p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "s.p $rt5,[$ra5],$rb5<<$si")
-+ (emit (.sym l suffix "s.bi") rt5 ra5 rb5 si)
-+ )
-+ (dnmi (.sym l suffix "s.p2") (.str "l" suffix "s.p2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "s.p $rt5,[$ra5],$rb5")
-+ (emit (.sym l suffix "s.bi") rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ )
-+)
-+(loads-op b QI sext)
-+(loads-op h HI sext)
-+
-+(define-pmacro (store-op suffix mode)
-+ (begin
-+ (define-full-insn (.sym s suffix i) (.str "s" suffix "i")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "s" suffix "i $rt5,[$ra5+$slo15" suffix "]")
-+ (+ IFMT_32 OPC6G_1 (.sym "OPC6C1_S" (.upcase suffix) "I") rt5 ra5 (.sym "slo15" suffix))
-+ ()
-+ (sequence()
-+ (c-code VOID "if (DOES_USE_REG_VIEW_DATA_VALUE_WP(current_cpu)) {\n")
-+ (c-code VOID " IS_CORNER_CASE(current_cpu) = 1;\n")
-+ (c-call VOID " store_register_view_data =" rt5)
-+ (c-code VOID "}\n")
-+ (set mode (mem mode (add ra5 (.sym "slo15" suffix))) rt5)
-+ (c-code VOID "if (DOES_USE_REG_VIEW_DATA_VALUE_WP(current_cpu)) {\n")
-+ (c-code VOID " IS_CORNER_CASE(current_cpu) = 0;\n")
-+ (c-code VOID "}\n")
-+ )
-+ (
-+ (n1hm (unit u-store (cycles 1)))
-+ )
-+ ((print "insn-special20"))
-+ )
-+ (dnmi (.sym s suffix "i2") (.str "s" suffix "i2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "s" suffix "i $rt5,[$ra5]")
-+ (emit (.sym s suffix i) rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+
-+ (define-full-insn (.sym s suffix "i.bi") (.str "s" suffix "i.bi")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "s" suffix "i.bi $rt5,[$ra5],$slo15" suffix)
-+ (+ IFMT_32 OPC6G_1 (.sym "OPC6C1_S" (.upcase suffix) "IP") rt5 ra5 (.sym "slo15" suffix))
-+ ()
-+ (sequence()
-+ (c-code VOID "if (DOES_USE_REG_VIEW_DATA_VALUE_WP(current_cpu)) {\n")
-+ (c-code VOID " IS_CORNER_CASE(current_cpu) = 1;\n")
-+ (c-call VOID " store_register_view_data =" rt5)
-+ (c-code VOID "}\n")
-+ (parallel ()
-+ (set mode (mem mode ra5) rt5)
-+ (set ra5 (add ra5 (.sym "slo15" suffix)))
-+ )
-+ (c-code VOID "if (DOES_USE_REG_VIEW_DATA_VALUE_WP(current_cpu)) {\n")
-+ (c-code VOID " IS_CORNER_CASE(current_cpu) = 0;\n")
-+ (c-code VOID "}\n")
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ ((print "insn-special20"))
-+ ; Note: `pred' is the constraint. Also useful here is (ref name)
-+ ; and returns true if operand <name> was referenced
-+ ; (where "referenced" means _read_ if input operand and _written_ if
-+ ; output operand).
-+ ; args to unit are "unit-name (name1 value1) ..."
-+ ; - cycles(done),issue,pred are also specified this way
-+ ; - if unspecified, default is used
-+ ; - for ins/outs, extra arg is passed that says what was specified
-+ ; - this is AND'd with `written' for outs
-+; ((n1m (unit u-load (pred (const 1)))
-+; (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1))))
-+; )
-+ )
-+ (dnmi (.sym s suffix "i.p") (.str "s" suffix "i.p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "s" suffix "i.p $rt5,[$ra5],$slo15" suffix)
-+ (emit (.sym s suffix "i.bi") rt5 ra5 (.sym "slo15" suffix))
-+ )
-+
-+ (dni (.sym s suffix) (.str "s" suffix)
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "s" suffix " $rt5,[$ra5+$rb5<<$si]")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_1 (.sym "MEM_SUB10C1_S" (.upcase suffix)))
-+ (sequence()
-+ (c-code VOID "if (DOES_USE_REG_VIEW_DATA_VALUE_WP(current_cpu)) {\n")
-+ (c-code VOID " IS_CORNER_CASE(current_cpu) = 1;\n")
-+ (c-call VOID " store_register_view_data =" rt5)
-+ (c-code VOID "}\n")
-+ (set mode (mem mode (add ra5 (sll rb5 si))) rt5)
-+ (c-code VOID "if (DOES_USE_REG_VIEW_DATA_VALUE_WP(current_cpu)) {\n")
-+ (c-code VOID " IS_CORNER_CASE(current_cpu) = 0;\n")
-+ (c-code VOID "}\n")
-+ )
-+ (
-+ (n1hm (unit u-store (cycles 1)))
-+ )
-+ )
-+ (dnmi (.sym s suffix "1") (.str "s" suffix "1")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "s" suffix " $rt5,[$ra5+($rb5<<$si)]")
-+ (emit (.sym s suffix) rt5 ra5 rb5 si)
-+ )
-+ (dnmi (.sym s suffix "2") (.str "s" suffix "2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "s" suffix " $rt5,[$ra5+$rb5]")
-+ (emit (.sym s suffix) rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ (dnmi (.sym s suffix "3") (.str "s" suffix "3")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "s" suffix " $rt5,[$ra5]")
-+ (emit (.sym s suffix i) rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+
-+
-+ (dni (.sym s suffix ".bi") (.str "s" suffix ".bi")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "s" suffix ".bi $rt5,[$ra5],$rb5<<$si")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_1 (.sym "MEM_SUB10C1_S" (.upcase suffix) "P"))
-+ (sequence()
-+ (c-code VOID "if (DOES_USE_REG_VIEW_DATA_VALUE_WP(current_cpu)) {\n")
-+ (c-code VOID " IS_CORNER_CASE(current_cpu) = 1;\n")
-+ (c-call VOID " store_register_view_data =" rt5)
-+ (c-code VOID "}\n")
-+ (parallel ()
-+ (set mode (mem mode ra5) rt5)
-+ (set ra5 (add ra5 (sll rb5 si)))
-+ )
-+ (c-code VOID "if (DOES_USE_REG_VIEW_DATA_VALUE_WP(current_cpu)) {\n")
-+ (c-code VOID " IS_CORNER_CASE(current_cpu) = 0;\n")
-+ (c-code VOID "}\n")
-+ )
-+ (
-+ (n1hm (unit u-store))
-+ )
-+ ; Note: `pred' is the constraint. Also useful here is (ref name)
-+ ; and returns true if operand <name> was referenced
-+ ; (where "referenced" means _read_ if input operand and _written_ if
-+ ; output operand).
-+ ; args to unit are "unit-name (name1 value1) ..."
-+ ; - cycles(done),issue,pred are also specified this way
-+ ; - if unspecified, default is used
-+ ; - for ins/outs, extra arg is passed that says what was specified
-+ ; - this is AND'd with `written' for outs
-+; ((n1m (unit u-load (pred (const 1)))
-+; (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1))))
-+; )
-+ )
-+ (dnmi (.sym s suffix ".bi2") (.str "s" suffix ".bi2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "s" suffix ".bi $rt5,[$ra5],$rb5")
-+ (emit (.sym s suffix ".bi") rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ (dnmi (.sym s suffix ".p") (.str "s" suffix ".p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "s" suffix ".p $rt5,[$ra5],$rb5<<$si")
-+ (emit (.sym s suffix ".bi") rt5 ra5 rb5 si)
-+ )
-+ (dnmi (.sym s suffix ".p2") (.str "s" suffix ".p2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "s" suffix ".p $rt5,[$ra5],$rb5")
-+ (emit (.sym s suffix ".bi") rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ )
-+)
-+(store-op b QI)
-+(store-op h HI)
-+(store-op w SI)
-+
-+(define-pmacro (lmw-op suffix0 suffix1 suffix2)
-+ (begin
-+ (define-full-insn (.sym "lmw." suffix0 suffix1 suffix2) (.str "lmw." suffix0 suffix1 suffix2)
-+ ((PIPE O) (IDOC MEM))
-+ (.str "lmw." suffix0 suffix1 suffix2 " $rt5,[$ra5],$rb5,$mask4")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_LSMW rt5 ra5 rb5 mask4 (.sym "LSMW_SUB4_LMW" suffix0 suffix1 suffix2) RES2_30_0)
-+ ()
-+ (sequence ()
-+ (c-call VOID " nds32_lmw_handler" pc
-+ (enum SI (.sym "LSMW_SUB4_LMW" suffix0 suffix1 suffix2))
-+ (index-of rt5) (index-of ra5) (index-of rb5) mask4)
-+ (c-code VOID (.str " if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n"))
-+ (c-code VOID (.str " DBP_LOCK(current_cpu) = 0;\n"))
-+ (c-code VOID (.str " if (CPU_INT_ARGS_ICODE(current_cpu) != NDS32_ICODE_DNDEB_A) { \n"))
-+ (c-code VOID (.str " goto LMW_" (.upcase suffix0) (.upcase suffix1) (.upcase suffix2) "_interruption;\n"))
-+ (c-code VOID (.str " }\n"))
-+ (c-code VOID (.str " }\n")) )
-+ ((n1hm (unit u-load)))
-+ ((print "insn-lsmw")))
-+ (dnmi (.sym "lmw." suffix0 suffix1 suffix2 "2") (.str "lmw." suffix0 suffix1 suffix2 "2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "lmw." suffix0 suffix1 suffix2 " $rt5,[$ra5],$rb5")
-+ (emit (.sym "lmw." suffix0 suffix1 suffix2) rt5 ra5 rb5 (f-32t5-mask4 0)))))
-+
-+
-+(lmw-op b i "")
-+(lmw-op b i m)
-+(lmw-op b d "")
-+(lmw-op b d m)
-+(lmw-op a i "")
-+(lmw-op a i m)
-+(lmw-op a d "")
-+(lmw-op a d m)
-+
-+(define-pmacro (smw-op suffix0 suffix1 suffix2)
-+ (begin
-+ (define-full-insn (.sym "smw." suffix0 suffix1 suffix2) (.str "smw." suffix0 suffix1 suffix2)
-+ ((PIPE O) (IDOC MEM))
-+ (.str "smw." suffix0 suffix1 suffix2 " $rt5,[$ra5],$rb5,$mask4")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_LSMW rt5 ra5 rb5 mask4 (.sym "LSMW_SUB4_SMW" suffix0 suffix1 suffix2) RES2_30_0)
-+ ()
-+ (sequence ()
-+ (c-call VOID " nds32_smw_handler" pc
-+ (enum SI (.sym "LSMW_SUB4_SMW" suffix0 suffix1 suffix2))
-+ (index-of rt5) (index-of ra5) (index-of rb5) mask4)
-+ (c-code VOID (.str " if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n"))
-+ (c-code VOID (.str " DBP_LOCK(current_cpu) = 0;\n"))
-+ (c-code VOID (.str " if (!((CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_A)||(CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_V))) { \n"))
-+ (c-code VOID (.str " goto SMW_" (.upcase suffix0) (.upcase suffix1) (.upcase suffix2) "_interruption;\n"))
-+ (c-code VOID (.str " }\n"))
-+ (c-code VOID (.str " }\n")))
-+ ((n1hm (unit u-store)))
-+ ((print "insn-lsmw")))
-+ (dnmi (.sym "smw." suffix0 suffix1 suffix2 "2") (.str "smw." suffix0 suffix1 suffix2 "2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "smw." suffix0 suffix1 suffix2 " $rt5,[$ra5],$rb5")
-+ (emit (.sym "smw." suffix0 suffix1 suffix2) rt5 ra5 rb5 (f-32t5-mask4 0))
-+ )
-+ )
-+)
-+(smw-op b i "")
-+(smw-op b i m)
-+(smw-op b d "")
-+(smw-op b d m)
-+(smw-op a i "")
-+(smw-op a i m)
-+(smw-op a d "")
-+(smw-op a d m)
-+
-+(dni llw "llw"
-+ (NO-DIS (PIPE O) (IDOC MEM) NOT_V3M)
-+ "llw $rt5,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_3 MEM_SUB10C3_LLW)
-+;FIXME: need to call special GETMEM function to lock physical address
-+ (sequence ((USI addr))
-+ (set addr (add ra5 (sll rb5 si)))
-+ (set rt5 (mem SI addr))
-+ (c-code VOID "current_cpu->load_lock.set(tmp_addr);\n")
-+ (c-code VOID "#ifndef SIM_ENV_GDB\n")
-+ (c-code VOID " if (TEST_H_SR_FLD(MSC_CFG,L2C)) { // go to L2 cache \n")
-+ (c-code VOID " L2C_SET_CMD(current_cpu->access_l2c_cmd, L2C_LOCK_SET);\n")
-+ (c-code VOID " L2C_SET_ADDR(current_cpu->access_l2c_cmd, current_cpu->load_lock.get());\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "#endif\n")
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+)
-+(dnmi llw1 "llw1"
-+ ((PIPE O) (IDOC MEM) NOT_V3M)
-+ "llw $rt5,[$ra5+($rb5<<$si)]"
-+ (emit llw rt5 ra5 rb5 si)
-+)
-+(dnmi llw2 "llw2"
-+ (NO-DIS (PIPE O) (IDOC MEM) NOT_V3M)
-+ "llw $rt5,[$ra5+$rb5]"
-+ (emit llw rt5 ra5 rb5 (f-32t3-sub10si 0))
-+)
-+
-+(dni scw "scw"
-+ (NO-DIS (PIPE O) (IDOC MEM) NOT_V3M)
-+ "scw $rt5,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_3 MEM_SUB10C3_SCW)
-+;FIXME: need to call special SETMEM function to check lock situation
-+ (sequence ()
-+ (c-call VOID "nds32_scw_handler" pc (index-of rt5) rt5 ra5 rb5 si)
-+ (c-code VOID "if(NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID (.str " DBP_LOCK(current_cpu) = 0;\n"))
-+ (c-code VOID " if(!((CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_A)||(CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_V))) {\n")
-+ (c-code VOID " goto SCW_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+
-+ ((n1hm (unit u-load)))
-+)
-+(dnmi scw1 "scw1"
-+ ((PIPE O) (IDOC MEM) NOT_V3M)
-+ "scw $rt5,[$ra5+($rb5<<$si)]"
-+ (emit scw rt5 ra5 rb5 si)
-+)
-+(dnmi scw2 "scw2"
-+ (NO-DIS (PIPE O) (IDOC MEM) NOT_V3M)
-+ "scw $rt5,[$ra5+$rb5]"
-+ (emit scw rt5 ra5 rb5 (f-32t3-sub10si 0))
-+)
-+
-+(dni j "jump with disp24"
-+ (UNCOND-CTI (IDOC BR))
-+ "j $disp24"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_JI JI_SUB1_J disp24)
-+ (sequence ((USI set_pc)(USI set_pc_value))
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID " goto J_interruption;\n"))
-+ (c-call VOID "nds32_handler_j" set_pc set_pc_value disp24)
-+ (cond
-+ ((eq set_pc 0) (set pc set_pc_value))
-+ ((eq set_pc 1)
-+ (c-code VOID "//CHANGE_INSTRUCTION(j.it);\n")
-+ (set pc set_pc_value))))
-+ ((n1hm (unit u-cti)))
-+)
-+
-+(dni jal "jump and link with disp24"
-+ (UNCOND-CTI (IDOC BR))
-+ "jal $disp24"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_JI JI_SUB1_JAL disp24)
-+ (sequence ((USI set_pc)(USI set_pc_value))
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID " goto JAL_interruption;\n"))
-+ (c-call VOID "nds32_handler_jal" set_pc set_pc_value disp24)
-+ (cond
-+ ((eq set_pc 0) (set pc set_pc_value))
-+ ((eq set_pc 1)
-+ (c-code VOID "//CHANGE_INSTRUCTION(jal.it);\n")
-+ (set pc set_pc_value))))
-+ ((n1hm (unit u-cti))))
-+
-+(dni jr "jump with register"
-+ (UNCOND-CTI (IDOC BR))
-+ "jr $rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_JR RES10_7_0 rb5 SUB10D_NO_IDT SUB10G_JR JR_SUB10C0_JR)
-+ ;FIXME, this is temporary patch for EEMBC
-+ (sequence ()
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID " goto JR_interruption;\n"))
-+ ;Used to check whether target instruction address is not half aligned
-+ (c-call VOID "nds32_branch_target_alignment_check" pc rb5)
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto JR_interruption;\n\n")
-+ (c-code VOID "current_cpu->IFC_clear();\n")
-+ (if (eq (and rb5 (const #xfff00000)) (const #xbfc00000))
-+ (sequence ()
-+ (c-code VOID " if (current_cpu->sim_environment == SIM_ENVIRONMENT_USER_MIPS) {\n")
-+ (set SI (mem SI (reg h-gr 4)) (c-code USI "NDS32_MALLOC_SIZE"))
-+ (set SI (mem SI (add (reg h-gr 4) 4)) (const #x0))
-+ (set SI (mem SI (add (reg h-gr 4) 8)) (const #x0))
-+ (set pc (reg h-gr (c-code SI "H_GR_LP")))
-+ (c-code VOID "} else {\n")
-+ (set pc rb5)
-+ (c-code VOID "}\n"))
-+ (set pc rb5)))
-+ (baseline (unit u-cti)))
-+
-+(dni ret "return with register"
-+ (UNCOND-CTI (IDOC BR))
-+ "ret $rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_JR RES10_7_0 rb5 SUB10D_NO_IDT SUB10G_RET JR_SUB10C0_JR)
-+ (sequence ()
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID " goto RET_interruption;\n"))
-+ ;Used to check whether target instruction address is not half aligned
-+ (c-call VOID "nds32_branch_target_alignment_check" pc rb5)
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto RET_interruption;\n\n")
-+ (c-code VOID "current_cpu->IFC_clear();\n")
-+ (set pc rb5))
-+ (baseline (unit u-cti)))
-+
-+(dnmi ret2 "ret2"
-+ (NO-DIS UNCOND-CTI (IDOC BR))
-+ "ret"
-+ (emit ret (f-32-rb5 30))
-+)
-+
-+(define-pmacro (jr-idt-op mnemonic idt on-off)
-+ (dni (.sym mnemonic "." idt on-off) (.str mnemonic " with " idt " turned " on-off)
-+ (UNCOND-CTI (IDOC BR) NOT_V3M)
-+ (.str mnemonic "." idt on-off " $rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_JR RES10_7_0 rb5 (.sym "SUB10D_" (.upcase idt)) (.sym "SUB10G_" (.upcase mnemonic)) (.sym "JR_SUB10C0_" (.upcase mnemonic)))
-+ (sequence ()
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID (.str "\t goto "(.upcase mnemonic) "_" (.upcase idt) (.upcase on-off)"_interruption;\n")))
-+ ;Used to check whether target instruction address is not half aligned
-+ (c-call VOID "nds32_branch_target_alignment_check" pc rb5)
-+ (c-code VOID (.str " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto "(.upcase mnemonic) "_" (.upcase idt) (.upcase on-off)"_interruption;\n\n"))
-+ (c-code VOID (.str "current_cpu->IFC_clear();\n"))
-+ (set (reg h-sr (c-code SI "H_SR_PSW")) (c-raw-call USI (.str "RHS_PSW_" (.upcase idt) "_" (.upcase on-off))))
-+ (set pc rb5))
-+ (baseline (unit u-cti))))
-+
-+(jr-idt-op jr it off)
-+(jr-idt-op jr t off)
-+(jr-idt-op ret it off)
-+(jr-idt-op ret t off)
-+
-+(dni jral "jump and link with register"
-+ (UNCOND-CTI (IDOC BR))
-+ "jral $rt5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_JR rt5 RES5_12_0 rb5 SUB10D_0 SUB10G_JRAL JR_SUB10C0_JRAL)
-+ (sequence ((USI addr))
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID (.str "\t goto JRAL_interruption;\n")))
-+ ;Used to check whether target instruction address is not half aligned
-+ (c-call VOID "nds32_branch_target_alignment_check" pc rb5)
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto JRAL_interruption;\n\n")
-+ (set addr rb5)
-+ (c-call VOID "link_and_IFC_clear" (index-of rt5))
-+ (set pc addr))
-+ (baseline (unit u-cti)))
-+
-+(dnmi jral2 "jral2"
-+ (NO-DIS UNCOND-CTI (IDOC BR))
-+ "jral $rb5"
-+ (emit jral (f-32-rt5 30) rb5))
-+
-+;jral.iton, jral.ton, jral.xton
-+(define-pmacro (jral-idt-op mnemonic idt on-off)
-+ (begin
-+ (dni (.sym mnemonic "." idt on-off) (.str mnemonic " with " idt " turned " on-off)
-+ (UNCOND-CTI (IDOC BR) NOT_V3M)
-+ (.str mnemonic "." idt on-off " $rt5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_JR rt5 RES5_12_0 rb5 (.sym "SUB10D_" (.upcase idt)) (.sym "SUB10G_" (.upcase mnemonic)) (.sym "JR_SUB10C0_" (.upcase mnemonic)))
-+ (sequence ((USI addr))
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID (.str "\t goto " (.upcase mnemonic) "_" (.upcase idt) (.upcase on-off) "_interruption;\n")))
-+ ;Used to check whether target instruction address is not half aligned
-+ (c-call VOID "nds32_branch_target_alignment_check" pc rb5)
-+ (c-code VOID (.str "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto " (.upcase mnemonic) "_" (.upcase idt) (.upcase on-off) "_interruption;\n\n"))
-+ (set addr rb5)
-+ (c-call VOID "link_and_IFC_clear" (index-of rt5))
-+ (parallel ()
-+ (set (reg h-sr (c-code SI "H_SR_PSW")) (c-raw-call USI (.str "RHS_PSW_" (.upcase idt) "_" (.upcase on-off))))
-+ (set pc addr)))
-+ (baseline (unit u-cti)))
-+ (dnmi (.sym mnemonic "." idt on-off "2") (.str mnemonic " with " idt " turned " on-off)
-+ (NO-DIS UNCOND-CTI (IDOC BR) NOT_V3M)
-+ (.str mnemonic "." idt on-off " $rb5")
-+ (emit (.sym mnemonic "." idt on-off) (f-32-rt5 30) rb5))))
-+
-+
-+ (jral-idt-op jral it on)
-+(jral-idt-op jral t on)
-+
-+;beq, bne
-+(define-pmacro (ebranch-op suffix comp-op)
-+ (begin
-+ (dni (.sym b suffix) (.str "b" suffix)
-+ (COND-CTI (IDOC BR))
-+ (.str "b" suffix " $rt5,$ra5,$disp14")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_BR1 rt5 ra5 (.sym "BR1_SUB1_B" (.upcase suffix)) disp14)
-+ (sequence ()
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID (.str "\t goto B" (.upcase suffix) "_interruption;\n")))
-+ (if (comp-op SI rt5 ra5)
-+ (sequence ()
-+ (c-code VOID (.str "current_cpu->IFC_clear();\n"))
-+ (set pc disp14))
-+ ))
-+ ((n1hm (unit u-cti) (unit u-cmp (cycles 0)))))))
-+
-+(ebranch-op eq eq)
-+(ebranch-op ne ne)
-+
-+;beqz, bnez, bgez, bltz, bgtz, blez
-+(define-pmacro (zbranch-op suffix comp-op)
-+ (begin
-+ (dni (.sym b suffix z) (.str "b" suffix "z")
-+ (COND-CTI (IDOC BR))
-+ (.str "b" suffix "z $rt5,$disp16")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_BR2 rt5 (.sym "BR2_SUB4_B" (.upcase suffix) "Z") disp16)
-+ (sequence ()
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID (.str "\t goto B" (.upcase suffix) "Z_interruption;\n")))
-+ (if (comp-op SI rt5 (const SI 0))
-+ (sequence ()
-+ (c-code VOID (.str "current_cpu->IFC_clear();\n"))
-+ (set pc disp16))
-+ ))
-+ ((n1hm (unit u-cti) (unit u-cmp (cycles 0)))))))
-+
-+(zbranch-op eq eq)
-+(zbranch-op ne ne)
-+(zbranch-op ge ge)
-+(zbranch-op lt lt)
-+(zbranch-op gt gt)
-+(zbranch-op le le)
-+
-+;bgezal, bltzal
-+(define-pmacro (zbranchal-op suffix comp-op)
-+ (begin
-+ (dni (.sym b suffix "zal") (.str "b" suffix "zal")
-+ (COND-CTI (IDOC BR))
-+ (.str "b" suffix "zal $rt5,$disp16")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_BR2 rt5 (.sym "BR2_SUB4_B" (.upcase suffix) "ZAL") disp16)
-+ (sequence ((USI temp))
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID (.str "\t goto B" (.upcase suffix) "ZAL_interruption;\n")))
-+ (set temp rt5)
-+ (c-call VOID "link")
-+ (if (comp-op SI temp (const SI 0))
-+ (sequence ()
-+ (set pc disp16)
-+ (c-code VOID (.str "current_cpu->IFC_clear();\n")))
-+ (nop)))
-+ ((n1hm (unit u-cti) (unit u-cmp (cycles 0)))))))
-+
-+(zbranchal-op ge ge)
-+(zbranchal-op lt lt)
-+
-+(dni mfsr "move from system register"
-+ ((PIPE S) (IDOC ALU))
-+ "mfsr $rt5,$sr10"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC rt5 sr10 MISC_EXT5_0 MISC_SUB5_MFSR)
-+ (sequence ()
-+ (set rt5 sr10)
-+ )
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+(dnmi mfsr_alias "mfsr_alias"
-+ (NO-DIS)
-+ "mfsr $rt5,$uimm_sr10"
-+ (emit mfsr rt5 sr10)
-+)
-+
-+(dni mtsr "move to system register"
-+ ((PIPE S) (IDOC ALU))
-+ "mtsr $rt5,$sr10"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC rt5 sr10 MTSR_EXT5_BASE MISC_SUB5_MTSR)
-+ (sequence ()
-+ (c-code VOID "current_cpu->PSW_old = CPU(h_sr[H_SR_PSW]);\n")
-+ (set sr10 rt5)
-+ )
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+(dnmi mtsr_alias "mtsr_alias"
-+ (NO-DIS)
-+ "mtsr $rt5,$uimm_sr10"
-+ (emit mtsr rt5 sr10)
-+)
-+
-+
-+(define-pmacro (setend-op suffix sem-op)
-+ (begin
-+ (dni (.sym "setend." suffix) (.str "set endian bit in PSW to " (.upcase suffix))
-+ ((PIPE S) (IDOC ALU))
-+ (.str "setend." suffix)
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC (.sym "SETEND_" (.upcase suffix)) SR10_IR_PSW MTSR_EXT5_SETEND MISC_SUB5_MTSR)
-+ (set (reg h-sr (c-code SI "H_SR_PSW")) (c-raw-call USI (.str "RHS_" sem-op "_PSW_BE")))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+ )
-+ )
-+)
-+(setend-op l CLR)
-+(setend-op b SET)
-+
-+(define-pmacro (setgie-op suffix sem-op)
-+ (begin
-+ (dni (.sym "setgie." suffix) (.str "set GIE bit in PSW to " (.upcase suffix))
-+ ((PIPE S) (IDOC ALU))
-+ (.str "setgie." suffix)
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC (.sym "SETGIE_" (.upcase suffix)) SR10_IR_PSW MTSR_EXT5_SETGIE MISC_SUB5_MTSR)
-+ (set (reg h-sr (c-code SI "H_SR_PSW")) (c-raw-call USI (.str "RHS_" sem-op "_PSW_GIE")))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+ )
-+ )
-+)
-+(setgie-op d CLR)
-+(setgie-op e SET)
-+
-+(dni cmovz "cmovz"
-+ ((PIPE OS) (IDOC ALU))
-+ "cmovz $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_3 ALU_1_SUB10C3_CMOVZ)
-+ (if (eq rb5 (const SI 0))
-+ (set rt5 ra5))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+)
-+
-+(dni cmovn "cmovn"
-+ ((PIPE OS) (IDOC ALU))
-+ "cmovn $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_3 ALU_1_SUB10C3_CMOVN)
-+ (if (ne rb5 (const SI 0))
-+ (set rt5 ra5))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+)
-+
-+(define-pmacro (dprefi-op suffix)
-+ (begin
-+ (dni (.sym "dprefi." suffix) (.str "dprefi." suffix)
-+ ((PIPE O) (IDOC MEM) NOT_V3M)
-+ (.str "dprefi." suffix " $dprefst,[$ra5+$slo15" suffix "]")
-+ (+ IFMT_32 OPC6G_2 OPC6C2_DPREFI (.sym "DPREF_SUB1_" (.upcase suffix)) dprefst ra5 (.sym "slo15" suffix))
-+ (sequence ()
-+ (if(c-call USI "nds32_dpref_handler" dprefst ra5 (.sym "slo15" suffix) (const 0))
-+ (c-code VOID (.str "goto DPREFI_" (.upcase suffix) "_interruption;\n"))))
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ )
-+ (dnmi (.sym "dprefi." suffix "2") (.str "dprefi." suffix "2")
-+ (NO-DIS (PIPE O) (IDOC MEM) NOT_V3M)
-+ (.str "dprefi." suffix " $dprefst,[$ra5]")
-+ (emit (.sym "dprefi." suffix) dprefst ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+ )
-+)
-+(dprefi-op d)
-+(dprefi-op w)
-+
-+(dni dpref "dpref"
-+ (NO-DIS (PIPE O) (IDOC MEM) NOT_V3M)
-+ "dpref $dprefst,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM DPREF_SUB1_W dprefst ra5 rb5 SUB10DSI_0 si SUB10G_2 MEM_SUB10C2_DPREF)
-+ (sequence ()
-+ (if(c-call USI "nds32_dpref_handler" dprefst ra5 rb5 si)
-+ (c-code VOID "goto DPREF_interruption;\n"))
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+)
-+(dnmi dpref1 "dpref1"
-+ ((PIPE O) (IDOC MEM) NOT_V3M)
-+ "dpref $dprefst,[$ra5+($rb5<<$si)]"
-+ (emit dpref dprefst ra5 rb5 si)
-+)
-+(dnmi dpref2 "dpref2"
-+ (NO-DIS (PIPE O) (IDOC MEM) NOT_V3M)
-+ "dpref $dprefst,[$ra5+$rb5]"
-+ (emit dpref dprefst ra5 rb5 (f-32t3-sub10si 0))
-+)
-+(dnmi dpref3 "dpref3"
-+ (NO-DIS (PIPE O) (IDOC MEM) NOT_V3M)
-+ "dpref $dprefst,[$ra5]"
-+ (emit dprefi.w dprefst ra5 (f-32t2-slo15w 0))
-+)
-+
-+(dni isync "isync"
-+ (UNCOND-CTI (PIPE OS) (IDOC MISC))
-+ "isync $rt5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC rt5 RES10_12_0 MISC_EXT5_0 MISC_SUB5_ISYNC)
-+ (sequence ()
-+ (c-call VOID " nds32_isync_handler" pc rt5)
-+ (set pc (add pc (c-code USI "abuf->length"))))
-+ ((n1hm (unit u-exec (cycles 4))))
-+)
-+
-+(dni msync "msync"
-+ ((PIPE OS) (IDOC MISC))
-+ "msync $msyncst"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC RES5_7_0 RES12_12_0 msyncst MISC_SUB5_MSYNC)
-+ (sequence ()
-+ (c-call VOID " nds32_msync_handler" pc msyncst)
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto MSYNC_interruption;\n")
-+ )
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+(dnmi msync2 "msync2"
-+ (NO-DIS (PIPE OS) (IDOC MISC))
-+ "msync"
-+ (emit msync (f-32t3-ext3 0))
-+)
-+
-+(dni isb "isb"
-+ ((PIPE OS) (IDOC MISC) UNCOND-CTI)
-+ "isb"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC RES5_7_0 RES15_0 MISC_SUB5_ISB)
-+ (sequence ()
-+ (c-call VOID " nds32_isb_handler" pc)
-+ (set pc (add pc (c-code USI "abuf->length"))))
-+ ((n1hm (unit u-exec (cycles 4))))
-+)
-+(dni dsb "dsb"
-+ ((PIPE OS) (IDOC MISC))
-+ "dsb"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC RES5_7_0 RES15_0 MISC_SUB5_DSB)
-+ (sequence ()
-+ (nop)
-+
-+ )
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+(dni standby "standby"
-+ (UNCOND-CTI (PIPE OS) (IDOC MISC))
-+ "standby $standbyst"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC RES5_7_0 RES10_12_0 RES3_22_0 standbyst MISC_SUB5_STANDBY)
-+ (sequence ((USI valid_value))
-+ (c-code VOID "if(current_cpu->cpu_model.group_N1213_43()) {\n")
-+ (set valid_value (const 1))
-+ (c-code VOID "} else { \n")
-+ (set valid_value (const 2))
-+ (c-code VOID "}\n")
-+ (if VOID (leu USI standbyst valid_value)
-+ (sequence ()
-+ (set pc (add pc (c-code USI "abuf->length")))
-+ (c-code VOID "if ((current_cpu->sim_environment == SIM_ENVIRONMENT_USER)||(current_cpu->sim_environment == SIM_ENVIRONMENT_OPERATING)) {\n")
-+ (c-code VOID " /*\n")
-+ (c-code VOID " * cpu enters standby mode and stop SID scheduler to schedule \n")
-+ (c-code VOID " * cpu component\n")
-+ (c-code VOID " */\n")
-+ (c-code VOID " current_cpu->yield();\n")
-+ (c-code VOID " SET_STANDBY_MODE(current_cpu);\n")
-+ (c-code VOID "}\n")
-+ (if VOID (leu USI standbyst 1)
-+ (c-code VOID "current_cpu->HSS_suppress = 1;\n"))
-+ )
-+ (sequence ()
-+ (c-code VOID "if ((current_cpu->sim_environment == SIM_ENVIRONMENT_OPERATING)||(current_cpu->sim_environment == SIM_ENVIRONMENT_OPERATING_VERIFY)) {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED;\n")
-+ (c-code VOID " goto STANDBY_interruption;\n")
-+ (c-code VOID "}\n"))))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+(define-full-insn trap "trap"
-+ (UNCOND-CTI (IDOC MISC) NOT_V3M)
-+ "trap $swid15"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC RES5_7_0 swid15 MISC_SUB5_TRAP)
-+ ()
-+ (sequence ()
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID (.str "\t goto TRAP_interruption;\n")))
-+ (c-call VOID "nds32_handler_trap" swid15)
-+ (c-code VOID (.str "\t goto TRAP_interruption;\n")))
-+ ((n1hm (unit u-exec (cycles 0))))
-+ ((print "insn-special17")))
-+
-+(dnmi trap2 "trap2"
-+ (NO-DIS UNCOND-CTI (IDOC MISC) NOT_V3M)
-+ "trap"
-+ (emit trap (f-32t3-swid15 0))
-+)
-+
-+;teqz, tnez
-+(define-pmacro (trapz-op prefix)
-+ (begin
-+ (define-full-insn (.sym "t" prefix "z") (.str "t" prefix "z")
-+ (COND-CTI (IDOC MISC) NOT_V3M)
-+ (.str "t" prefix "z $rt5,$swid15")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC rt5 swid15 (.sym "MISC_SUB5_T" (.upcase prefix) "Z"))
-+ ;FIXME
-+ ()
-+ (sequence ()
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID (.str "\t goto T" (.upcase prefix) "Z_interruption;\n")))
-+ (if (prefix rt5 0)
-+ (sequence ()
-+ (c-call VOID "nds32_handler_trap" swid15)
-+ (c-code VOID (.str "\t goto T" (.upcase prefix) "Z_interruption;\n")))))
-+ ((n1hm (unit u-exec (cycles 0))))
-+ ((print "insn-special18")))
-+ (dnmi (.sym "t" prefix "z2") (.str "t" prefix "z2")
-+ (NO-DIS COND-CTI (IDOC MISC))
-+ (.str "t" prefix "z $rt5")
-+ (emit (.sym "t" prefix "z") rt5 (f-32t3-swid15 0)))))
-+
-+(trapz-op eq)
-+(trapz-op ne)
-+
-+(define-full-insn break "break"
-+ (UNCOND-CTI (IDOC MISC))
-+ "break $swid15"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC RES5_7_0 swid15 MISC_SUB5_BREAK)
-+ ;FIXME
-+ ()
-+ (sequence ()
-+ (if (c-call USI "nds32_handler_break" swid15)
-+ (c-code VOID (.str "\t goto BREAK_interruption;\n"))))
-+ ((n1hm (unit u-exec (cycles 0))))
-+ ((print "insn-special17"))
-+)
-+(dnmi break2 "break2"
-+ (NO-DIS UNCOND-CTI (IDOC MISC))
-+ "break"
-+ (emit break (f-32t3-swid15 0))
-+)
-+
-+
-+(define-full-insn syscall "syscall"
-+ (UNCOND-CTI (IDOC MISC))
-+ "syscall $swid15"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC RES5_7_0 swid15 MISC_SUB5_SYSCALL)
-+ ()
-+ (sequence ()
-+ (if (c-call USI "nds32_handler_syscall" swid15)
-+ (c-code VOID (.str "\t goto SYSCALL_interruption;\n"))))
-+ (
-+ (n1hm (unit u-exec (cycles 0)))
-+ )
-+ ((print "insn-special17"))
-+)
-+
-+(dni iret "iret"
-+ (UNCOND-CTI (IDOC MISC))
-+ "iret"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC RES5_7_0 RES15_0 MISC_SUB5_IRET)
-+ (sequence ()
-+ (c-code VOID "current_cpu->PSW_old = CPU(h_sr[H_SR_PSW]);\n")
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID (.str "\t goto IRET_interruption;\n")))
-+ ;Used to check whether target instruction address is not half aligned
-+ (c-code VOID " if ((0x2 <= GET_H_SR_FLD(MSC_CFG, BASEV) && TEST_H_SR_FLD(PSW, DEX)) || (!TEST_H_SR_FLD(MSC_CFG,INTLC) && INTL_IS_3()) || (TEST_H_SR_FLD(MSC_CFG,INTLC) && INTL_IS_2())) {\n")
-+ (c-code VOID " current_cpu->nds32_branch_target_alignment_check (pc, H_SR_REG(OIPC));\n")
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto IRET_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " current_cpu->nds32_branch_target_alignment_check (pc, H_SR_REG(IPC));\n")
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto IRET_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " TOTAL_ICOUNT(current_cpu)++; \n")
-+ (c-code VOID " if (PIPE_ON(current_cpu)) { \n")
-+ (c-code VOID " INSN_IRET_PIPE_MODEL(); \n")
-+ (c-code VOID " } \n")
-+ (c-code VOID " else \n")
-+ (c-code VOID " TOTAL_CYCLE(current_cpu)++; \n")
-+
-+ (set pc (c-call USI " nds32_iret_handler" pc))
-+ (c-code VOID (.str "\t if(NDS32_HAS_INTERRUPTION(current_cpu))\n"))
-+ (c-code VOID (.str "\t goto IRET_interruption;\n"))
-+ (c-code VOID "#ifndef SIM_ENV_GDB\n")
-+ (c-code VOID " current_cpu->yield(); //yield at iret to support block io\n")
-+ (c-code VOID "#endif\n")
-+ )
-+ (
-+ (n1hm (unit u-cti))
-+ )
-+)
-+
-+(define-full-insn tlbop "tlbop"
-+ ((PIPE OS) (IDOC MISC) UNCOND-CTI)
-+ "tlbop $rt5,$ra5,$tlbopst"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC rt5 ra5 RES5_17_0 tlbopst MISC_SUB5_TLBOP)
-+ ()
-+ (sequence ()
-+ (c-call VOID " nds32_tlbop_handler" pc (index-of rt5) (index-of ra5) (index-of tlbopst))
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto TLBOP_interruption;\n")
-+ )
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+ ((print "insn-special1"))
-+)
-+(dnmi tlbop2 "tlbop2"
-+ (NO-DIS (PIPE OS) (IDOC MISC))
-+ "tlbop $ra5,$tlbopst"
-+ (emit tlbop (f-32-rt5 0) ra5 tlbopst)
-+)
-+(dnmi tlbop3 "tlbop3"
-+ (NO-DIS (PIPE OS) (IDOC MISC))
-+ "tlbop $tlbopst"
-+ (emit tlbop (f-32-rt5 0) (f-32-ra5 0) tlbopst)
-+)
-+
-+(define-full-insn cctl "cctl"
-+ ((PIPE OS) (IDOC MISC) UNCOND-CTI NOT_V3M)
-+ "cctl $rt5,$ra5,$cctlst,$cctllvl"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC rt5 ra5 RES4_17_0 cctllvl cctlst MISC_SUB5_CCTL)
-+ ()
-+ (sequence ()
-+ (c-call VOID " nds32_cctl_handler" pc (index-of rt5) (index-of ra5) (index-of cctlst) (index-of cctllvl))
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto CCTL_interruption;\n")
-+ )
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+ ((print "insn-special0"))
-+)
-+
-+(dnmi cctl1 "cctl1"
-+ (NO-DIS (PIPE OS) (IDOC MISC) NOT_V3M)
-+ "cctl $rt5,$ra5,$cctlst"
-+ (emit cctl rt5 ra5 cctlst (f-32tx-1_21 0))
-+)
-+(dnmi cctl2 "cctl2"
-+ (NO-DIS (PIPE OS) (IDOC MISC) NOT_V3M)
-+ "cctl $ra5,$cctlst"
-+ (emit cctl (f-32-rt5 0) ra5 cctlst (f-32tx-1_21 0))
-+)
-+(dnmi cctl3 "cctl3"
-+ (NO-DIS (PIPE OS) (IDOC MISC) NOT_V3M)
-+ "cctl $cctlst"
-+ (emit cctl (f-32-rt5 0) (f-32-ra5 0) cctlst (f-32tx-1_21 0))
-+)
-+
-+(dnmi cctl4 "cctl4"
-+ (NO-DIS (PIPE OS) (IDOC MISC) NOT_V3M)
-+ "cctl $ra5,$cctlst,$cctllvl"
-+ (emit cctl (f-32-rt5 0) ra5 cctlst cctllvl)
-+)
-+
-+(dnmi nop "nop"
-+ (NO-DIS (PIPE OS) (IDOC MISC))
-+ "nop"
-+ (emit srli (f-32-rt5 0) (f-32-ra5 0) (f-32t3-uimm5 0))
-+)
-+
-+(dni divs "divs"
-+ ((PIPE S) DIV (IDOC ALU) DX_REG NOT_V3M)
-+ ("divs $rd1,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 RES3_7_0 rd1 RES1_11_0 ra5 rb5 SUB10D_0 SUB10G_5 ALU_2_SUB10C5_DIVS)
-+ (if VOID (c-code VOID "1 == GET_H_SR_FLD(MSC_CFG,NOD)")
-+ ;then
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tgoto DIVS_interruption;\n\n"))
-+
-+ ;else
-+ (if (ne USI rb5 #x0)
-+ ;then part
-+ (if (eq USI (and (eq USI ra5 (const #x80000000)) (eq USI rb5 (const #xffffffff))) (const #x1))
-+
-+ ;then part
-+ (sequence ()
-+
-+ ;(c-code VOID " H_SR_REG(ITYPE) = 0;\n")
-+
-+ ;Also update sub_type if it is arithmetic exception caused by quotient overflow
-+ ;However, sub_type is support only when spaV3 or latter
-+ (c-code VOID " if (2 <= GET_H_SR_FLD(MSC_CFG, BASEV)) {\n")
-+ ;(c-code VOID " PUT_H_SR_FLD(ITYPE, SUBTYPE, 2);\n")
-+ (c-code VOID " CPU_INT_ARGS_SWID(current_cpu) = 2;\n")
-+ (c-code VOID " }\n")
-+
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_ARITH;\n")
-+ (c-code VOID " goto DIVS_interruption;\n"))
-+
-+ ;else part
-+ (sequence ()
-+ (c-code VOID "\tDIVIDEND_VALUE(current_cpu) = *FLD(i_ra5); \n")
-+ (c-code VOID "\tDIVIDER_VALUE(current_cpu) = *FLD(i_rb5); \n")
-+ (set rd1 (or DI
-+ (sll DI (zext DI ((.sym "mod") ra5 rb5)) (const 32))
-+ (zext DI (div ra5 rb5))))))
-+ ;else part
-+ (sequence ()
-+ (c-code VOID "if (!TEST_H_SR_FLD(INT_MASK,IDIVZE)){ \n")
-+ (set rd1 #x0)
-+ (c-code VOID "} else {\n")
-+
-+ ;(c-code VOID " H_SR_REG(ITYPE) = 0;\n")
-+
-+ ;Also update sub_type if it is arithmetic exception caused by 'divided by zero'
-+ ;However, sub_type is support only when spaV3 or latter
-+ (c-code VOID " if (2 <= GET_H_SR_FLD(MSC_CFG, BASEV)) {\n")
-+ ;(c-code VOID " PUT_H_SR_FLD(ITYPE, SUBTYPE, 1);\n")
-+ (c-code VOID " CPU_INT_ARGS_SWID(current_cpu) = 1;\n")
-+ (c-code VOID " }\n")
-+
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_ARITH;\n")
-+ (c-code VOID " goto DIVS_interruption;\n")
-+ (c-code VOID "}\n"))))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+(dni div "div"
-+ ((PIPE S) DIV (IDOC ALU) DX_REG NOT_V3M)
-+ ("div $rd1,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 RES3_7_0 rd1 RES1_11_0 ra5 rb5 SUB10D_0 SUB10G_5 ALU_2_SUB10C5_DIV)
-+ (if VOID (c-code VOID "1 == GET_H_SR_FLD(MSC_CFG,NOD)")
-+ ;then
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tgoto DIV_interruption;\n\n"))
-+
-+ ;else part
-+ (if (ne USI rb5 #x0)
-+ ;then part
-+ (sequence ()
-+ (c-code VOID "\tDIVIDEND_VALUE(current_cpu) = *FLD(i_ra5); \n")
-+ (c-code VOID "\tDIVIDER_VALUE(current_cpu) = *FLD(i_rb5); \n")
-+ (set rd1 (or UDI
-+ (sll UDI (zext UDI (umod ra5 rb5)) (const 32))
-+ (zext UDI (udiv ra5 rb5))
-+ )))
-+ ;else part
-+ (sequence ()
-+ (c-code VOID "if (!TEST_H_SR_FLD(INT_MASK,IDIVZE)){ \n")
-+ (set rd1 #x0)
-+ (c-code VOID "} else {\n")
-+
-+ ;(c-code VOID " H_SR_REG(ITYPE) = 0;\n")
-+
-+ ;Also update sub_type if it is arithmetic exception caused by 'divided by zero'
-+ ;However, sub_type is support only when spaV3 or latter
-+ (c-code VOID " if (2 <= GET_H_SR_FLD(MSC_CFG, BASEV)) {\n")
-+ ;(c-code VOID " PUT_H_SR_FLD(ITYPE, SUBTYPE, 1);\n")
-+ (c-code VOID " CPU_INT_ARGS_SWID(current_cpu) = 1;\n")
-+ (c-code VOID " }\n")
-+
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_ARITH;\n")
-+ (c-code VOID " goto DIV_interruption;\n")
-+ (c-code VOID "}\n"))))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+(include "nds32p.cpu"); performance extension instructions
-+(include "nds32p2.cpu"); performance 2 extension instructions
-+
-+(include "nds16.cpu") ; 16-bit instructions
-+(include "nds16v2.cpu") ; 16-bit instructions (baseline version2)
-+(include "nds16v3.cpu") ; 16-bit instructions (baseline version3)
-+(include "nds32v2.cpu") ; 32-bit instructions (baseline version2)
-+(include "nds32v3.cpu") ; 32-bit instructions (baseline version3)
-+
-+(include "nds32pc.cpu") ; pseudo-code instructions
-+
-+(include "nds32a.cpu") ; extension instructions (audio)
-+(include "nds32f.cpu") ; extension instructions (floating-point)
-+(include "nds32s.cpu") ; extension instructions (string)
-+(include "nds32stat.cpu") ; extension instructions (saturation arithmetic)
-+(include "nds16ifc.cpu") ; extension instructions (16-bit inline function call)
-+(include "nds32ifc.cpu") ; extension instructions (32-bit inline function call)
-+(include "nds_eit.cpu") ; extension instructions (Execution on Instruction Table)
-diff -Nur binutils-2.24.orig/cgen/cpu/nds32.cpu.sethi binutils-2.24/cgen/cpu/nds32.cpu.sethi
---- binutils-2.24.orig/cgen/cpu/nds32.cpu.sethi 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds32.cpu.sethi 2016-06-30 21:26:12.637892490 +0200
-@@ -0,0 +1,3799 @@
-+; ==============================================================================
-+; Andes NDS32 family CPU description. -*- Scheme -*-
-+; Andes Technology Corporation
-+; ==============================================================================
-+(include "simplify.inc")
-+
-+; ==============================================================================
-+; Andes patch to CGEN - currently only extension allowed
-+; ==============================================================================
-+(include "andes.inc")
-+
-+; ==============================================================================
-+; Architecture definition
-+; define-arch must appear first and it defines the whole architecture.
-+; ==============================================================================
-+(define-arch
-+ (name nds32) ; name of cpu family
-+ (comment "Andes NDS32")
-+ (default-alignment unaligned)
-+ (insn-lsb0? #f)
-+; (machs n1 n1p n1h n1ph)
-+ (machs n1h)
-+ (isas nds32)
-+)
-+
-+; ==============================================================================
-+; Attributes.
-+; ==============================================================================
-+; An attribute to describe which pipeline an insn runs in.
-+
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name PIPE)
-+ (comment "parallel execution pipeline selection")
-+ (values NONE O S OS)
-+)
-+
-+; A derived attribute that says which insns can be executed in parallel
-+; with others. This is a required attribute for architectures with
-+; parallel execution.
-+
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name PARALLEL)
-+ (attrs META) ; do not define in any generated file for now
-+ (values NO YES)
-+ (default (if (eq-attr (current-insn) PIPE NONE) (symbol NO) (symbol YES)))
-+)
-+
-+; ==============================================================================
-+; Instruction set architecture parameters.
-+; ==============================================================================
-+(define-isa
-+ (name nds32)
-+ (default-insn-bitsize 32)
-+ (base-insn-bitsize 32)
-+ (default-insn-word-bitsize 32)
-+ (liw-insns 1)
-+ (parallel-insns 1)
-+ (decode-assist (0 1 2 3 4))
-+)
-+
-+; ==============================================================================
-+; CPU family definitions
-+; This defines a 'CPU family' which is a programmer specified collection of
-+; related matchines. Machines in a family are sufficiently similar that the
-+; simulator semantic code can handle any differences at run time. At least one
-+; CPU must be defined.
-+; ==============================================================================
-+;(define-cpu
-+ ; cpu names must be distinct from the architecture name and machine names.
-+ ; The "b" suffix stands for "base" and is the convention.
-+ ; The "f" suffix stands for "family" and is the convention.
-+; (name nds32bf)
-+; (comment "Andes NDS32 base family")
-+; (endian either)
-+; (insn-endian big)
-+; (word-bitsize 32)
-+; (parallel-insns 1)
-+;)
-+
-+;(define-cpu
-+; ; The "p" suffix stands for "performance" and means performance instruction extension.
-+; (name nds32pf)
-+; (comment "Andes NDS32 performance extension family")
-+; (endian either)
-+; (insn-endian big)
-+; (word-bitsize 32)
-+; (parallel-insns 1)
-+; (file-transform "p")
-+;)
-+
-+(define-cpu
-+ ; The "h" suffix stands for "half" and means half-word (16-bit) instruction extension.
-+ (name nds32hf)
-+ (comment "Andes NDS32 16-bit extension family")
-+ (endian either)
-+ (insn-endian big)
-+ (word-bitsize 32)
-+ (parallel-insns 1)
-+ (file-transform "h")
-+)
-+
-+;(define-cpu
-+; ; The "d" suffix stands for "DSP" and means DSP instruction extension.
-+; (name nds32df)
-+; (comment "Andes NDS32 DSP extension family")
-+; (endian either)
-+; (insn-endian big)
-+; (word-bitsize 32)
-+; (parallel-insns 1)
-+; (file-transform "d")
-+;)
-+
-+;(define-cpu
-+; ; The "p" suffix stands for "performance" and means performance instruction extension.
-+; ; The "h" suffix stands for "half" and means half-word (16-bit) instruction extension.
-+; (name nds32phf)
-+; (comment "Andes NDS32 performance and 16-bit extension family")
-+; (endian either)
-+; (insn-endian big)
-+; (word-bitsize 32)
-+; (parallel-insns 1)
-+; (file-transform "ph")
-+;)
-+
-+;(define-cpu
-+; ; The "h" suffix stands for "half" and means half-word (16-bit) instruction extension.
-+; ; The "d" suffix stands for "DSP" and means DSP instruction extension.
-+; (name nds32hdf)
-+; (comment "Andes NDS32 16-bit and DSP extension family")
-+; (endian either)
-+; (insn-endian big)
-+; (word-bitsize 32)
-+; (parallel-insns 1)
-+; (file-transform "hd")
-+;)
-+
-+;(define-cpu
-+; ; The "p" suffix stands for "performance" and means performance instruction extension.
-+; ; The "h" suffix stands for "half" and means half-word (16-bit) instruction extension.
-+; ; The "d" suffix stands for "DSP" and means DSP instruction extension.
-+; (name nds32phdf)
-+; (comment "Andes NDS32 performance, 16-bit and DSP extension family")
-+; (endian either)
-+; (insn-endian big)
-+; (word-bitsize 32)
-+; (parallel-insns 1)
-+; (file-transform "phd")
-+;)
-+
-+; ==============================================================================
-+; CPU machine definitions
-+; A machine is a distinct variant of a CPU. It currently has a one-to-one
-+; correspondence with BFD's 'mach number'. At least one machine must be defined.
-+; ==============================================================================
-+;(define-mach
-+; (name n1p)
-+; (comment "Base NDS32 core with performance instructions")
-+; (cpu nds32pf)
-+;)
-+
-+(define-mach
-+ (name n1h)
-+ (comment "Base NDS32 core with 16-bit instructions")
-+ (cpu nds32hf)
-+)
-+
-+;(define-mach
-+; (name n1d)
-+; (comment "Base NDS32 core with DSP instructions")
-+; (cpu nds32df)
-+;)
-+
-+;(define-mach
-+; (name n1ph)
-+; (comment "Base NDS32 core with performance and 16-bit instructions")
-+; (cpu nds32phf)
-+;)
-+
-+;(define-mach
-+; (name n1hd)
-+; (comment "Base NDS32 core with 16-bit and DSP instructions")
-+; (cpu nds32hdf)
-+;)
-+
-+;(define-mach
-+; (name n1phd)
-+; (comment "Base NDS32 core with performance, 16-bit and DSP instructions")
-+; (cpu nds32phdf)
-+;)
-+
-+; ==============================================================================
-+; Model descriptions
-+; Each mach must have at least one model.
-+; ==============================================================================
-+;(define-model
-+; (name n1pm) (comment "model for N1P machine") (attrs)
-+; (mach n1p)
-+;
-+; ;(prefetch)
-+; ;(retire)
-+;
-+; (pipeline p-non-mem "" () ((fetch) (decode) (execute) (writeback)))
-+; (pipeline p-mem "" () ((fetch) (decode) (execute) (memory) (writeback)))
-+;
-+; ; `state' is a list of variables for recording model state
-+; (state
-+; ; bit mask of h-gr registers, =1 means value being loaded from memory
-+; (h-gr UINT)
-+; )
-+;
-+; (unit u-exec "Execution Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((sr INT -1) (dr INT -1)) ; inputs
-+; ((dr INT -1)) ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-cmp "Compare Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((src1 INT -1) (src2 INT -1)) ; inputs
-+; () ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-mac "Multiply/Accumulate Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((src1 INT -1) (src2 INT -1)) ; inputs
-+; () ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-cti "Branch Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((sr INT -1)) ; inputs
-+; ((pc)) ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-load "Memory Load Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((sr INT)
-+; ;(ld-mem AI)
-+; ) ; inputs
-+; ((dr INT)) ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-store "Memory Store Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((src1 INT) (src2 INT)) ; inputs
-+; () ; ((st-mem AI)) ; outputs
-+; () ; profile action (default)
-+; )
-+;)
-+
-+(define-model
-+ (name n1hm) (comment "model for N1H machine") (attrs)
-+ (mach n1h)
-+
-+ ;(prefetch)
-+ ;(retire)
-+
-+ (pipeline p-non-mem "" () ((fetch) (decode) (execute) (writeback)))
-+ (pipeline p-mem "" () ((fetch) (decode) (execute) (memory) (writeback)))
-+
-+ ; `state' is a list of variables for recording model state
-+ (state
-+ ; bit mask of h-gr registers, =1 means value being loaded from memory
-+ (h-gr UINT)
-+ )
-+
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((rt5 INT -1) (ra5 INT -1)) ; inputs
-+ ((rt5 INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-cmp "Compare Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((src1 INT -1) (src2 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-mac "Multiply/Accumulate Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((src1 INT -1) (src2 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-cti "Branch Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((sr INT -1)) ; inputs
-+ ((pc)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-load "Memory Load Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((sr INT)
-+ ;(ld-mem AI)
-+ ) ; inputs
-+ ((dr INT)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-store "Memory Store Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((src1 INT) (src2 INT)) ; inputs
-+ () ; ((st-mem AI)) ; outputs
-+ () ; profile action (default)
-+ )
-+)
-+
-+;(define-model
-+; (name n1phm) (comment "model for N1PH machine") (attrs)
-+; (mach n1ph)
-+;
-+; ;(prefetch)
-+; ;(retire)
-+;
-+; (pipeline p-non-mem "" () ((fetch) (decode) (execute) (writeback)))
-+; (pipeline p-mem "" () ((fetch) (decode) (execute) (memory) (writeback)))
-+;
-+; ; `state' is a list of variables for recording model state
-+; (state
-+; ; bit mask of h-gr registers, =1 means value being loaded from memory
-+; (h-gr UINT)
-+; )
-+;
-+; (unit u-exec "Execution Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((sr INT -1) (dr INT -1)) ; inputs
-+; ((dr INT -1)) ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-cmp "Compare Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((src1 INT -1) (src2 INT -1)) ; inputs
-+; () ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-mac "Multiply/Accumulate Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((src1 INT -1) (src2 INT -1)) ; inputs
-+; () ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-cti "Branch Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((sr INT -1)) ; inputs
-+; ((pc)) ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-load "Memory Load Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((sr INT)
-+; ;(ld-mem AI)
-+; ) ; inputs
-+; ((dr INT)) ; outputs
-+; () ; profile action (default)
-+; )
-+; (unit u-store "Memory Store Unit" ()
-+; 1 1 ; issue done
-+; () ; state
-+; ((src1 INT) (src2 INT)) ; inputs
-+; () ; ((st-mem AI)) ; outputs
-+; () ; profile action (default)
-+; )
-+;)
-+
-+; ==============================================================================
-+; Instruction fields.
-+; ==============================================================================
-+; Attributes:
-+; PCREL-ADDR: pc relative value (for reloc and disassembly purposes)
-+; ABS-ADDR: absolute address (for reloc and disassembly purposes?)
-+; RESERVED: bits are not used to decode insn, must be all 0
-+; RELOC: there is a relocation associated with this field (experiment)
-+
-+(define-attr
-+ (for ifield operand)
-+ (type boolean)
-+ (name RELOC)
-+ (comment "there is a reloc associated with this field (experiment)")
-+)
-+
-+
-+(dnf f-ifmt "ifmt" () 0 1)
-+(dnf f-32-opc6g "opc6g" () 1 3) ; opcode group (of main opcode)
-+(dnf f-32-opc6c "opc6c" () 4 3) ; opcode code (of main opcode)
-+(dnf f-32-sub1 "sub1" () 7 1)
-+(dnf f-32-rt5 "rt5" () 7 5)
-+(dnf f-32-ra5 "ra5" () 12 5)
-+(dnf f-32-rb5 "rb5" () 17 5)
-+(dnf f-32-rd24 "24-22:0" () 7 3)
-+(dnf f-32-rd1 "accums" () 10 1)
-+(dnf f-32-rd20 "20:0" () 11 1)
-+(dnf f-32-rd1hl "h/l of accums" () 12 5)
-+(dnf f-32-usr "usr index" () 12 5)
-+(dnf f-32-group "group index" () 17 5)
-+(dnf f-32-sr10 "10-bit system regs" () 12 10)
-+(df f-32t0-disp24 "disp24" (PCREL-ADDR RELOC) 8 24 INT
-+ ((value pc) (sra SI (sub SI value pc) (const 1)))
-+ ((value pc) (add SI (sll SI value (const 1)) pc)))
-+(df f-32t1-slo20 "signed low 20 bits" () 12 20 INT #f #f)
-+(dnf f-32t1-uhi20 "high 20 bits" () 12 20)
-+(df f-32t1-disp16 "disp16" (PCREL-ADDR RELOC) 16 16 INT
-+ ((value pc) (sra SI (sub SI value pc) (const 1)))
-+ ((value pc) (add SI (sll SI value (const 1)) pc)))
-+(df f-32t1-disp9 "disp9" (PCREL-ADDR RELOC) 7 9 UINT
-+ ((value pc) (sra USI (sub USI value pc) (const 1))) ;encode
-+ ((value pc) (add USI (sll USI value (const 1)) pc))) ;decode
-+(dnf f-32t1-sub4 "sub4" () 12 4)
-+(df f-32t2-slo15d "slo15d" () 17 15 INT
-+ ((value pc) (c-code SI "value; if (value&0x7) return BAD_DWOFFSET; else value>>=3"))
-+ ((value pc) (sll SI value (const 3))))
-+(df f-32t2-ulo15d "ulo15d" () 17 15 UINT
-+ ((value pc) (c-code USI "value; if (value&0x7) return BAD_DWOFFSET; else value>>=3"))
-+ ((value pc) (sll USI value (const 3))))
-+(df f-32t2-slo15w "slo15w" () 17 15 INT
-+ ((value pc) (c-code SI "value; if (value&0x3) return BAD_WOFFSET; else value>>=2"))
-+ ((value pc) (sll SI value (const 2))))
-+(df f-32t2-ulo15w "ulo15w" () 17 15 UINT
-+ ((value pc) (c-code USI "value; if (value&0x3) return BAD_WOFFSET; else value>>=2"))
-+ ((value pc) (sll USI value (const 2))))
-+(df f-32t2-slo15h "slo15h" () 17 15 INT
-+ ((value pc) (c-code SI "value; if (value&0x1) return BAD_HWOFFSET; else value>>=1"))
-+ ((value pc) (sll SI value (const 1))))
-+(df f-32t2-ulo15h "ulo15h" () 17 15 UINT
-+ ((value pc) (c-code USI "value; if (value&0x1) return BAD_HWOFFSET; else value>>=1"))
-+ ((value pc) (sll USI value (const 1))))
-+(df f-32t2-slo15b "slo15b" () 17 15 INT #f #f)
-+(df f-32t2-ulo15b "ulo15b" () 17 15 UINT #f #f)
-+(df f-32t2-disp14 "disp14" (PCREL-ADDR RELOC) 18 14 INT
-+ ((value pc) (sra SI (sub SI value pc) (const 1)))
-+ ((value pc) (add SI (sll SI value (const 1)) pc)))
-+(dnf f-32t2-sub1 "sub1" () 17 1)
-+(dnf f-32t3-res10_7 "reserved 10-bit" () 7 10) ; 10-bit reserved field
-+(dnf f-32t3-res12_12 "reserved 12-bit" () 12 12) ; 12-bit reserved field
-+(dnf f-32t3-swid15 "15-bit software ID" () 12 15) ; 15-bit software ID for syscall/break/trap/teqz/tnez
-+(dnf f-32t3-sub10 "sub10" () 22 10) ; 10-bit subcode
-+(dnf f-32t3-sub10si "sub10si" () 22 2) ; 2-bit scaling index in 10bit subcode
-+(dnf f-32t3-sub10dsi "sub10dsi" () 24 2) ; 10-bit subcode domain for load/store
-+(dnf f-32t3-sub10d "sub10d" () 22 4) ; 10-bit subcode domain
-+(dnf f-32t3-sub10g "sub10g" () 26 3) ; 10-bit subcode group
-+(dnf f-32t3-sub10g2 "sub10g2" () 27 2) ; 10-bit subcode group2
-+(dnf f-32t3-sub10c "sub10c" () 29 3) ; 10-bit subcode code
-+(dnf f-32t3-uimm5 "uimm5" () 17 5)
-+(dnf f-32t3-ext3 "extended 3-bit code" () 24 3)
-+(dnf f-32t4-ext5 "extended 5-bit code" () 22 5)
-+(dnf f-32t4-ext2 "extended 2-bit code" () 25 2)
-+(dnf f-32t4-res3_22 "reserved 3-bit" () 22 3) ; 3-bit reserved field
-+(dnf f-32t4-sub5 "sub5" () 27 5) ; 5-bit subcode
-+(dnf f-32t5-mask4 "4-bit mask" () 22 4)
-+(dnf f-32t5-sub4 "4-bit subcode" () 26 4)
-+(dnf f-32t5-res2 "reserved 2-bit" () 30 2)
-+(dnf f-32t2-st4 "4-bit SubType" () 8 4)
-+(dnf f-32tx-4_17 "4 bits from bit field 17" () 17 4)
-+(dnf f-32tx-1_21 "1 bit from bit field 21" () 21 1)
-+
-+(define-multi-ifield
-+ (name f-32-group-usr)
-+ (comment "user special register index")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-32-group f-32-usr)
-+ (insert (sequence ()
-+ (set (ifield f-32-group) (srl (ifield f-32-group-usr) (const 5)))
-+ (set (ifield f-32-usr) (and (ifield f-32-group-usr) (const #x1f)))
-+ ))
-+ (extract (set (ifield f-32-group-usr) (or (sll (ifield f-32-group) (const 5)) (ifield f-32-usr))))
-+)
-+
-+; ==============================================================================
-+; Enums.
-+; ==============================================================================
-+; insn-format: bit 0 (1 bit)
-+; used by nds32.opc
-+(define-normal-insn-enum insn-format "insn format (32/16) enums" () IFMT_ f-ifmt
-+ ("32" "16")
-+)
-+
-+; insn32-opc6g: bits 1-3 (3 bits)
-+(define-normal-insn-enum insn32-opc6g "insn opcode group enums" () OPC6G_ f-32-opc6g
-+ ("0" "1" "2" "3" "4" "5" "6" "7")
-+)
-+
-+; opc6c: bits 29-31 (3 bits)
-+(define-pmacro (opc6c-op group enum-list)
-+ (define-normal-insn-enum (.sym "insn32-opc6c" group) (.str " insn opcode group " group "enums") () (.sym "OPC6C" group "_") f-32-opc6c enum-list)
-+)
-+
-+
-+(opc6c-op 0 ("LBI" "LHI" "LWI" "LDI" "LBIP" "LHIP" "LWIP" "LDIP"))
-+(opc6c-op 1 ("SBI" "SHI" "SWI" "SDI" "SBIP" "SHIP" "SWIP" "SDIP"))
-+(opc6c-op 2 ("LBSI" "LHSI" "LWSI" "DPREFI" "LBSIP" "LHSIP" "LWSIP" "LBGP"))
-+(opc6c-op 3 ("LWC" "SWC" "LDC" "SDC" "MEM" "LSMW" "HWGP" "SBGP"))
-+(opc6c-op 4 ("ALU_1" "ALU_2" "MOVI" "SETHI" "JI" "JR" "BR1" "BR2"))
-+(opc6c-op 5 ("ADDI" "SUBRI" "ANDI" "XORI" "ORI" "5" "SLTI" "SLTSI"))
-+(opc6c-op 6 ("AEXT" "CEXT" "MISC" "3" "4" "COP" "6" "7"))
-+(opc6c-op 7 ("SIMD" "1" "2" "3" "IFCALL9" "5" "6" "7"))
-+
-+
-+; ji_1-sub1: bits 7 (1 bit)
-+(define-normal-insn-enum ji_1-sub1 "insn type 0 1-bit subcode enums" () JI_SUB1_ f-32-sub1
-+ ("J" "JAL")
-+)
-+
-+; dpref-sub1: bits 7 (1 bit)
-+(define-normal-insn-enum dpref-sub1 "1-bit subcode enums for dpref/dprefi" () DPREF_SUB1_ f-32-sub1
-+ ("W" "D")
-+)
-+
-+; br_1-sub1: bits 17 (1 bit)
-+(define-normal-insn-enum br_1-sub1 "insn type 2 1-bit subcode enums" () BR1_SUB1_ f-32t2-sub1
-+ ("BEQ" "BNE")
-+)
-+
-+; br_2-sub4: bits 12-15 (4 bit)
-+(define-normal-insn-enum br_2-sub4 "insn type 1 4-bit subcode enums" () BR2_SUB4_ f-32t1-sub4
-+ ("IFCALL" "1" "BEQZ" "BNEZ" "BGEZ" "BLTZ" "BGTZ" "BLEZ"
-+ "8" "9" "10" "BNEZD" "BGEZAL" "BLTZAL" "14" "15")
-+)
-+
-+; insn32-res10_7: bits 7-16 (10 bits)
-+(define-normal-insn-enum insn32-res10_7 "insn type 3 10-bit reserved field enums" () RES10_7_ f-32t3-res10_7
-+ ("0")
-+)
-+
-+; insn32-res10_12: bits 12-21 (10 bits)
-+(define-normal-insn-enum insn32-res10_12 "insn type 3 10-bit reserved field enums" () RES10_12_ f-32-sr10
-+ ("0")
-+)
-+
-+; insn32-res12_12: bits 12-23 (12 bits)
-+(define-normal-insn-enum insn32-res12_12 "insn type 3 12-bit reserved field enums" () RES12_12_ f-32t3-res12_12
-+ ("0")
-+)
-+
-+; sr10-ir: bits 12-21 (10 bits)
-+(define-normal-insn-enum sr10-ir "enums for interruption register of SRs" () SR10_IR_ f-32-sr10
-+ (("PSW" 128))
-+)
-+
-+; insn32-res15: bits 7-21 (15 bits)
-+(define-normal-insn-enum insn32-res15 "insn type 3 15-bit reserved field enums" () RES15_ f-32t3-swid15
-+ ("0")
-+)
-+
-+; insn32-res3_22: bits 22-24 (3 bits)
-+(define-normal-insn-enum insn32-res3_22 "3-bit reserved field enums" () RES3_22_ f-32t4-res3_22
-+ ("0")
-+)
-+
-+; insn32-res5_7: bits 7-11 (5 bits)
-+(define-normal-insn-enum insn32-res5_7 "5-bit reserved field enums" () RES5_7_ f-32-rt5
-+ ("0")
-+)
-+
-+; insn32-res5_12: bits 12-16 (5 bits)
-+(define-normal-insn-enum insn32-res5_12 "5-bit reserved field enums" () RES5_12_ f-32-ra5
-+ ("0")
-+)
-+
-+; insn32-res5_17: bits 17-21 (5 bits)
-+(define-normal-insn-enum insn32-res5_17 "5-bit reserved field enums" () RES5_17_ f-32-rb5
-+ ("0")
-+)
-+
-+; insn32-res4_17: bits 17-20 (4 bits)
-+(define-normal-insn-enum insn32-res4_17 "4-bit reserved field enums" () RES4_17_ f-32tx-4_17
-+ ("0")
-+)
-+
-+; insn32-res2: bits 30-31 (2 bits)
-+(define-normal-insn-enum insn32-res2 "insn type 5 2-bit reserved field enums" () RES2_30_ f-32t5-res2
-+ ("0" "1" "2" "3")
-+)
-+
-+; insn32-sub10dsi: bits 24-25 (2 bits)
-+(define-normal-insn-enum insn32-sub10dsi "insn type 3 10-bit subcode domain enums for load/store" () SUB10DSI_ f-32t3-sub10dsi
-+ ("0")
-+)
-+
-+; insn32-sub10d: bits 22-25 (4 bits)
-+(define-normal-insn-enum insn32-sub10d "insn type 3 10-bit subcode domain enums" () SUB10D_ f-32t3-sub10d
-+ ("0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15"
-+ ("NO_IDT" 0) ("IT" 4) ("DT" 8) ("IDT" 12) ("T" 12)
-+ )
-+)
-+
-+; insn32-sub10g: bits 26-28 (3 bits)
-+(define-normal-insn-enum insn32-sub10g "insn type 3 10-bit subcode group enums" () SUB10G_ f-32t3-sub10g
-+ ("0" "1" "2" "3" "4" "5" "6" "7" ("JR" 0) ("RET" 4) ("JRAL" 0))
-+)
-+
-+; insn32-sub10g2: bits 27-28 (2 bits)
-+(define-normal-insn-enum insn32-sub10g2 "insn type 3 10-bit subcode group2 enums" () SUB10G2_ f-32t3-sub10g2
-+ ("0" "1" "2" "3")
-+)
-+
-+; sub10c: bits 29-31 (3 bits)
-+(define-pmacro (sub10c-op major group enum-list)
-+ (define-normal-insn-enum (.sym major "-sub10c" group) (.str major " subcode group " group "enums") () (.sym major "_SUB10C" group "_") f-32t3-sub10c enum-list)
-+)
-+(sub10c-op ALU_1 0 ("ADD" "SUB" "AND" "XOR" "OR" "NOR" "SLT" "SLTS"))
-+(sub10c-op ALU_1 1 ("SLLI" "SRLI" "SRAI" "ROTRI" "SLL" "SRL" "SRA" "ROTR"))
-+(sub10c-op ALU_1 2 ("SEB" "SEH" "ZEB" "ZEH" "WSBH" "5" "DIVSR" "DIVR"))
-+(sub10c-op ALU_1 3 ("SVA" "SVS" "CMOVZ" "CMOVN" "4" "5" "6" "7"))
-+(sub10c-op ALU_2 0 ("MAX" "MIN" "AVE" "ABS" "CLIPS" "CLIP" "CLO" "CLZ"))
-+(sub10c-op ALU_2 1 ("BSET" "BCLR" "BTGL" "BTST" "BSE" "BSP" "STR1" "STR2"))
-+(sub10c-op ALU_2 2 ("KDADD" "KDSUB" "ADDWC" "SUBWC" "KDMXY" "5" "6" "FFZMISM"))
-+(sub10c-op ALU_2 3 ("KADDW" "KSUBW" "KSLRAW" "3" "4" "5" "6" "7"))
-+(sub10c-op ALU_2 4 ("MFUSR" "MTUSR" "2" "3" "MUL" "5" "6" "7"))
-+(sub10c-op ALU_2 5 ("MULTS64" "MULT64" "MADDS64" "MADD64" "MSUBS64" "MSUB64" "DIVS" "DIV"))
-+(sub10c-op ALU_2 6 ("MULTS32" "MULT32" "MADDS32" "MADD32" "MSUBS32" "MSUB32" "6" "7"))
-+(sub10c-op ALU_2 7 ("DMADD" "DMADDC" "DMSUB" "DMSUBC" "RMFHI" "QMFLO" "6" "7"))
-+(sub10c-op MEM 0 ("LB" "LH" "LW" "LD" "LBP" "LHP" "LWP" "LDP"))
-+(sub10c-op MEM 1 ("SB" "SH" "SW" "SD" "SBP" "SHP" "SWP" "SDP"))
-+(sub10c-op MEM 2 ("LBS" "LHS" "LWS" "DPREF" "LBSP" "LHSP" "LWSP" "7"))
-+(sub10c-op MEM 3 ("LLW" "SCW" "2" "3" "4" "5" "6" "7"))
-+(sub10c-op MEM 4 ("LBUP" "1" "LWUP" "3" "4" "5" "6" "7"))
-+(sub10c-op MEM 5 ("SBUP" "1" "SWUP" "3" "4" "5" "6" "7"))
-+(sub10c-op JR 0 ("JR" "JRAL" "2" "3" "4" "5" "6" "7" ("RET" 0)))
-+(sub10c-op RET 0 ("IFRET" "1" "2" "3" "4" "5" "6" "7"))
-+
-+(sub10c-op ALU_2V2 0 ("0" "1" "2" "3" "4" "5" "6" "7"))
-+(sub10c-op ALU_2V2 1 ("0" "1" "2" "3" "4" "5" "6" "7"))
-+(sub10c-op ALU_2V2 2 ("0" "1" "2" "3" "4" "5" "6" "7"))
-+(sub10c-op ALU_2V2 3 ("KADDH" "KSUBH" "2" "3" "KDMXY" "5" "6" "7"))
-+(sub10c-op ALU_2V2 4 ("RDOV" "CLROV" "2" "3" "4" "5" "6" "7"))
-+(sub10c-op ALU_2V2 5 ("MULTS64" "MULT64" "2" "3" "4" "5" "6" "7"))
-+(sub10c-op ALU_2V2 6 ("0" "1" "2" "MADDR32" "4" "MSUBR32" "6" "7"))
-+(sub10c-op ALU_2V2 7 ("0" "1" "2" "3" "4" "5" "6" "7"))
-+
-+; misc-ext5: bits 22-26 (5 bits)
-+(define-normal-insn-enum misc-ext5 "5-bit extended code enums for mtsr" () MISC_EXT5_ f-32t4-ext5
-+ ("0")
-+)
-+
-+; mtsr-ext5: bits 22-26 (5 bits)
-+(define-normal-insn-enum mtsr-ext5 "5-bit extended code enums for mtsr" () MTSR_EXT5_ f-32t4-ext5
-+ ("BASE" "SETEND" "SETGIE")
-+)
-+
-+; setend-be: bits 7-11 (5 bits, actually only Bit 11 is used)
-+(define-normal-insn-enum setend-be "enums for endianness value of SETEND" () SETEND_ f-32-rt5
-+ ("L" "B")
-+)
-+
-+; setgie-en: bits 7-11 (5 bits, actually only Bit 11 is used)
-+(define-normal-insn-enum setgie-en "enums for enable bit value of SETGIE" () SETGIE_ f-32-rt5
-+ ("D" "E")
-+)
-+
-+; insn32-tr-ctl: bits 22-23 (2 bits)
-+(define-normal-insn-enum insn32-tr-ctl "encoding for DT/IT bits in jr insn" () TR_CTL_ f-32t3-sub10si
-+ ("NT" "IT" "DT" "DTIT")
-+)
-+
-+; insn32-res3_7 : bits 7-9 (3 bits)
-+(define-normal-insn-enum insn32-res3_7 "3-bit reserved field enums" () RES3_7_ f-32-rd24
-+ ("0")
-+)
-+
-+; insn32-res1_11 : bits 11 (1 bits)
-+(define-normal-insn-enum insn32-res1_11 "1-bit reserved field enums" () RES1_11_ f-32-rd20
-+ ("0")
-+)
-+
-+; insn32-sub10d: bits 22-25 (4 bits)
-+; misc-sub5: bits 27-31 (5 bits)
-+(define-normal-insn-enum misc-sub5 "5-bit subcode enums for MISC instructions" () MISC_SUB5_ f-32t4-sub5
-+ ("STANDBY" "CCTL" "MFSR" "MTSR" "IRET" "TRAP" "TEQZ" "TNEZ"
-+ "DSB" "ISB" "BREAK" "SYSCALL" "MSYNC" "ISYNC" "TLBOP" "15" "16"
-+ "17" "18" "19" "20" "FZB")
-+)
-+
-+; lsmw-sub4: bits 26-29 (4 bits)
-+(define-normal-insn-enum lsmw-sub4 "insn type 5 4-bit subcode enums" () LSMW_SUB4_ f-32t5-sub4
-+ ("LMWbi" "LMWbim" "LMWbd" "LMWbdm" "LMWai" "LMWaim" "LMWad" "LMWadm"
-+ "SMWbi" "SMWbim" "SMWbd" "SMWbdm" "SMWai" "SMWaim" "SMWad" "SMWadm")
-+)
-+
-+(define-enum
-+ (name e-int-vec)
-+ (comment "interruption vector indices")
-+ (attrs)
-+ (prefix E_INT_VEC_)
-+ (values (("RESET" 0) ("TLBFILL" 1) ("PTENP" 2) ("TLBMISC" 3) ("VLPTMISS" 4) ("ME" 5) ("DEB" 6) ("GE" 7) ("SYSCALL" 8)
-+ ("HW0" 9) ("HW1" 10) ("HW2" 11) ("HW3" 12) ("HW4" 13) ("HW5" 14)
-+ ("SWI" 15) ("VEP" 9) ("NOP" #xff)
-+ ))
-+)
-+(define-pmacro (vep-vec index num) ((.sym "VEP" index) num))
-+(define-enum
-+ (name e-int-vec2)
-+ (comment "interruption vector indices")
-+ (attrs)
-+ (prefix E_INT_VEC_)
-+ (values (.map vep-vec (.iota 64 0) (.iota 64 9)))
-+)
-+
-+(define-enum
-+ (name e-eetype)
-+ (comment "enumeration of extended etype")
-+ (attrs)
-+ (prefix E_EETYPE_)
-+ (values (
-+ ("DALIGN" 0) ("RESERVED" 1) ("TRAP" 2) ("ARITH" 3) ("DPBE" 4) ("DIBE" 5) ("COP" 6) ("PRIVILEGED" 7) ("RES_VALUE" 8) (DNLM_A 9) (DMPZIU 10) ("IFCEOR" 11)
-+ ("DCLOCK" 0) ("DTLOCK" 1) ("DMHIT" 2) ("DPARITY" 3) ("UPSIZE" 4) ("ILLPMACC"5)
-+ ("DMISS" 0)
-+ ("DFILL" 0)
-+ ("READ" 0) ("WRITE" 1) ("EXE" 18) ("DIRTY" 3) ("DACC" 4) ("DRPTEA" 5)
-+ ("DNP_NLEAF" 0) ("DNP_LEAF" 1)
-+ ("SYSCALL" 8) ;Arch implementation dependent
-+ ("BREAK" 0) ("BREAK16" 1) ("IDEB" 2) ("DDEB_A" 3) ("DPDEB_V" 4) ("DIDEB_V" 5) ("EXT_DEB" 6) ("HWSS" 7) ("DNDEB_A" 8) ("DNDEB_V" 9)
-+ ("COLD" 0) ("WARM" 1) ("NMI" 2)
-+ ("IALIGN" 16) ("IPBE" 20) ("IIBE" 21) ("INLM_A" 25) ("IMPZIU" 26)
-+ ("ICLOCK" 16) ("ITLOCK" 17) ("IMHIT" 18) ("IPARITY" 19)
-+ ("IMISS" 16)
-+ ("IFILL" 16)
-+ ("IACC" 20) ("IRPTEA" 21)
-+ ("INP_NLEAF" 16) ("INP_LEAF" 17)
-+ ("INT" 3) ;Arch implementaion dependent
-+ ("SWI" 0)
-+ ("NOP" #xff)
-+ ))
-+)
-+
-+(define-enum
-+ (name e-int-pri)
-+ (comment "enumeration of interruption priority")
-+ (attrs)
-+ (prefix E_INT_PRI_)
-+ (values (("NOP" 0)
-+ ("IIBE") ("DIBE") ("DPBE")
-+ ("DPDEB_V")
-+ ("DNLM_A")
-+ ("DCLOCK") ("DTLOCK") ("DMHIT") ("DPARITY") ("DSIZE") ("ILLPMACC")
-+ ("DRPTEA") ("DACC") ("DIRTY") ("WRITE") ("READ")
-+ ("DNP_LEAF") ("DNP_NLEAF") ("DMISS") ("DFILL") ("DMPZIU")
-+ ("DALIGN") ("DDEB_A")
-+ ("ARITH") ("COP") ("TRAP") ("BREAK") ("BREAK16") ("SYSCALL")
-+ ("UPSIZE")
-+ ("RES_VALUE")
-+ ("IFCEOR")
-+ ("PRIVILEGED")
-+ ("RESERVED")
-+ ("IPBE") ("INLM_A")
-+ ("ICLOCK") ("ITLOCK") ("IMHIT") ("IPARITY") ("ISIZE")
-+ ("IRPTEA") ("IACC") ("EXE")
-+ ("INP_LEAF") ("INP_NLEAF") ("IMISS") ("IFILL") ("IMPZIU")
-+ ("IALIGN") ("IDEB")
-+ ("SWI")
-+ ("INT")
-+ ("DNDEB_V") ("DNDEB_A") ("DIDEB_V")
-+ ("NMI")
-+ ("HWSS")
-+ ("EXT_DEB") ("WARM") ("COLD")
-+ ))
-+)
-+
-+; ==============================================================================
-+; Hardware pieces.
-+; ==============================================================================
-+; These entries list the elements of the raw hardware.
-+; They're also used to provide tables and other elements of the assembly
-+; language.
-+
-+(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
-+(dnh h-ppc "previous program counter" (PC PROFILE) (pc) () () ())
-+
-+(dnh h-si "unsigned scaling index 2 bits" ()
-+ (immediate (UINT 2))
-+ () () ()
-+)
-+(dnh h-uimm5 "unsigned immediate 5 bits" ()
-+ (immediate (UINT 5))
-+ () () ()
-+)
-+(dnh h-mask4 "unsigned mask 4 bits" ()
-+ (immediate (UINT 4))
-+ () () ()
-+)
-+(dnh h-swid15 "unsigned swid 15 bits" ()
-+ (immediate (UINT 15))
-+ () () ()
-+)
-+(dnh h-uhi20 "unsigned high 20 bits" ()
-+ (immediate (UINT 20))
-+ () () ()
-+)
-+(dnh h-slo20 "signed low 20 bits" ()
-+ (immediate (INT 20))
-+ () () ()
-+)
-+(dnh h-ulo15 "unsigned low 15 bits" ()
-+ (immediate (UINT 15))
-+ () () ()
-+)
-+(dnh h-slo15 "signed low 15 bits" ()
-+ (immediate (INT 15))
-+ () () ()
-+)
-+(dnh h-usr "usr index 5 bits" ()
-+ (immediate (UINT 5))
-+ () () ()
-+)
-+(dnh h-group "group index 5 bits" ()
-+ (immediate (UINT 5))
-+ () () ()
-+)
-+
-+(define-hardware
-+ (name h-tpc)
-+ (comment "target program counter")
-+ (attrs PROFILE)
-+ (type register USI)
-+)
-+
-+(define-keyword
-+ (name gr-names)
-+ (print-name h-gr)
-+ (prefix "$")
-+ (values (p0 26) (p1 27) (fp 28) (gp 29) (lp 30) (sp 31)
-+ (r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)
-+ (r8 8) (r9 9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14) (r15 15)
-+ (r16 16) (r17 17) (r18 18) (r19 19) (r20 20) (r21 21) (r22 22) (r23 23)
-+ (r24 24) (r25 25) (r26 26) (r27 27) (r28 28) (r29 29) (r30 30) (r31 31)
-+ (a0 0) (a1 1) (a2 2) (a3 3) (a4 4) (a5 5) (s0 6) (s1 7)
-+ (s2 8) (s3 9) (s4 10) (s5 11) (s6 12) (s7 13) (s8 14) (ta 15)
-+ (t0 16) (t1 17) (t2 18) (t3 19) (t4 20) (t5 21) (t6 22) (t7 23)
-+ (t8 24) (t9 25) (s9 28)
-+ )
-+)
-+
-+(define-hardware
-+ (name h-gr)
-+ (comment "general registers")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register USI (32))
-+ (indices extern-keyword gr-names)
-+)
-+
-+(define-keyword
-+ (name sr-names)
-+ (print-name h-sr)
-+ (prefix "$")
-+ (values
-+ (CPU_VER 0) (ICM_CFG 8) (DCM_CFG 16) (MMU_CFG 24) (MSC_CFG 32)
-+ (CORE_ID 1) (FUCOP_EXIST 40)
-+ (cr0 0) (cr1 8) (cr2 16) (cr3 24) (cr4 32)
-+ (cr5 1) (cr6 40)
-+ (PSW 128) (IPSW 129) (P_IPSW 130)
-+ (IVB 137)
-+ (EVA 145) (P_EVA 146)
-+ (ITYPE 153) (P_ITYPE 154)
-+ (MERR 161)
-+ (IPC 169) (P_IPC 170) (OIPC 171)
-+ (P_P0 178)
-+ (P_P1 186)
-+ (INT_MASK 192)
-+ (INT_PEND 200)
-+ (ir0 128) (ir1 129) (ir2 130)
-+ (ir3 137)
-+ (ir4 145) (ir5 146)
-+ (ir6 153) (ir7 154)
-+ (ir8 161)
-+ (ir9 169) (ir10 170) (ir11 171)
-+ (ir12 178)
-+ (ir13 186)
-+ (ir14 192)
-+ (ir15 200)
-+ (MMU_CTL 256) (L1_PPTB 264) (TLB_VPN 272) (TLB_DATA 280)
-+ (TLB_MISC 288) (VLPT_IDX 296) (ILMB 304) (DLMB 312)
-+ (CACHE_CTL 320) (HSMP_SADDR 328) (HSMP_EADDR 329)
-+ (SDZ_CTL 376) (MISC_CTL 377) (N12MISC_CTL 377)
-+ (mr0 256) (mr1 264) (mr2 272) (mr3 280)
-+ (mr4 288) (mr5 296) (mr6 304) (mr7 312)
-+ (mr8 320) (mr9 328) (mr10 329)
-+ (idr0 376) (idr1 377)
-+
-+ (BPC0 384) (BPC1 385) (BPC2 386) (BPC3 387)
-+ (BPC4 388) (BPC5 389) (BPC6 390) (BPC7 391)
-+ (BPA0 392) (BPA1 393) (BPA2 394) (BPA3 395)
-+ (BPA4 396) (BPA5 397) (BPA6 398) (BPA7 399)
-+ (BPAM0 400) (BPAM1 401) (BPAM2 402) (BPAM3 403)
-+ (BPAM4 404) (BPAM5 405) (BPAM6 406) (BPAM7 407)
-+ (BPV0 408) (BPV1 409) (BPV2 410) (BPV3 411)
-+ (BPV4 412) (BPV5 413) (BPV6 414) (BPV7 415)
-+ (BPCID0 416) (BPCID1 417) (BPCID2 418) (BPCID3 419)
-+ (BPCID4 420) (BPCID5 421) (BPCID6 422) (BPCID7 423)
-+ (EDM_CFG 424) (EDMSW 432) (EDM_CTL 440) (EDM_DTR 448)
-+ (BPMTC 456) (DIMBR 464) (TECR0 496) (TECR1 497)
-+
-+ (dr0 384) (dr5 385) (dr10 386) (dr15 387)
-+ (dr20 388) (dr25 389) (dr30 390) (dr35 391)
-+ (dr1 392) (dr6 393) (dr11 394) (dr16 395)
-+ (dr21 396) (dr26 397) (dr31 398) (dr36 399)
-+ (dr2 400) (dr7 401) (dr12 402) (dr17 403)
-+ (dr22 404) (dr27 405) (dr32 406) (dr37 407)
-+ (dr3 408) (dr8 409) (dr13 410) (dr18 411)
-+ (dr23 412) (dr28 413) (dr33 414) (dr38 415)
-+ (dr4 416) (dr9 417) (dr14 418) (dr19 419)
-+ (dr24 420) (dr29 421) (dr34 422) (dr39 423)
-+ (dr40 424) (dr41 432) (dr42 440) (dr43 448)
-+ (dr44 456) (dr45 464) (dr46 496) (dr47 497)
-+
-+ (PFMC0 512) (PFMC1 513) (PFMC2 514)
-+ (PFM_CTL 520)
-+ (pfr0 512) (pfr1 513) (pfr2 514)
-+ (pfr3 520)
-+
-+ (FUCOP_CTL 552)
-+ (fucpr 552)
-+
-+ (PRUSR_ACC_CTL 544)
-+
-+ (DMA_CFG 640) (DMA_GCSW 648) (DMA_CHNSEL 656) (DMA_ACT 664)
-+ (DMA_SETUP 672) (DMA_ISADDR 680) (DMA_ESADDR 688) (DMA_TCNT 696)
-+ (DMA_STATUS 704) (DMA_2DSET 712) (DMA_2DSCTL 713)
-+ (dmar0 640) (dmar1 648) (dmar2 656) (dmar3 664)
-+ (dmar4 672) (dmar5 680) (dmar6 688) (dmar7 696)
-+ (dmar8 704) (dmar9 712) (dmar10 713)
-+ )
-+)
-+
-+(define-hardware
-+ (name h-sr)
-+ (comment "system registers")
-+ (type register USI (1024))
-+ (indices extern-keyword sr-names)
-+ (get (index) (c-call USI "nds32_h_sr_get_handler" index))
-+ (set (index newval) (c-call VOID "nds32_h_sr_set_handler" index newval))
-+)
-+
-+(define-hardware
-+ (name h-reset-sr)
-+ (comment "system registers for reset")
-+ (type register USI (1024))
-+ (indices extern-keyword sr-names)
-+)
-+
-+(define-hardware
-+ (name h-wtmsk-sr)
-+ (comment "write mask value for system registers")
-+ (type register USI (1024))
-+ (indices extern-keyword sr-names)
-+)
-+
-+(define-hardware
-+ (name h-conf-sr)
-+ (comment "configured system registers")
-+ (type register USI (1024))
-+ (indices extern-keyword sr-names)
-+)
-+
-+(define-keyword
-+ (name accum-hl-names)
-+ (print-name h-accum-hl)
-+ (prefix "$")
-+ (values (d0.lo 0) (d0.hi 1) (d1.lo 2) (d1.hi 3)
-+ )
-+)
-+
-+(define-keyword
-+ (name accum-names)
-+ (print-name h-accm)
-+ (prefix "$")
-+ (values (d0 0) (d1 1))
-+)
-+
-+(define-hardware
-+ (name h-accum-hl)
-+ (comment "accumulation registers")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register USI (4))
-+ (indices extern-keyword accum-hl-names)
-+)
-+
-+(define-hardware
-+ (name h-accum)
-+ (comment "accumulation registers")
-+ (attrs PROFILE VIRTUAL)
-+ (type register UDI (2))
-+ (indices extern-keyword accum-names)
-+ (get (index) (or (zext DI (reg h-accum-hl (sll index (const 1)))) (sll (zext DI (reg h-accum-hl (or (sll index (const 1)) (const 1)))) 32)))
-+ (set (index newval) (sequence ()
-+ (set (reg h-accum-hl (sll index (const 1))) (trunc SI newval))
-+ (set (reg h-accum-hl (or (sll index (const 1)) (const 1))) (trunc SI (srl newval 32)))
-+ ))
-+)
-+
-+(define-hardware
-+ (name h-mfusridx)
-+ (comment "user special register index for mfusr instruction")
-+ (type immediate (UINT 10))
-+ (values keyword "$" ((d0.lo 0) (d0.hi 1) (d1.lo 2) (d1.hi 3) (ustat 30) (pc 31)
-+
-+ (DMA_CFG 32) (DMA_GCSW 33) (DMA_CHNSEL 34) (DMA_ACT 35)
-+ (DMA_SETUP 36) (DMA_ISADDR 37) (DMA_ESADDR 38) (DMA_TCNT 39)
-+ (DMA_STATUS 40) (DMA_2DSET 41) (DMA_2DSCTL 57)
-+ (dmar0 32) (dmar1 33) (dmar2 34) (dmar3 35)
-+ (dmar4 36) (dmar5 37) (dmar6 38) (dmar7 39)
-+ (dmar8 40) (dmar9 41) (dmar10 57)
-+ (IFC_CTL 29) (ifc0 29)
-+
-+ (PFMC0 64) (PFMC1 65) (PFMC2 66) (PFM_CTL 68)
-+ (pfr0 64) (pfr1 65) (pfr2 66) (pfr3 68)))
-+)
-+
-+(define-hardware
-+ (name h-mtusridx)
-+ (comment "user special register index for mtusr instruction")
-+ (type immediate (UINT 10))
-+ (values keyword "$" ((d0.lo 0) (d0.hi 1) (d1.lo 2) (ustat 30) (d1.hi 3)
-+
-+ (DMA_CFG 32) (DMA_GCSW 33) (DMA_CHNSEL 34) (DMA_ACT 35)
-+ (DMA_SETUP 36) (DMA_ISADDR 37) (DMA_ESADDR 38) (DMA_TCNT 39)
-+ (DMA_STATUS 40) (DMA_2DSET 41) (DMA_2DSCTL 57)
-+ (dmar0 32) (dmar1 33) (dmar2 34) (dmar3 35)
-+ (dmar4 36) (dmar5 37) (dmar6 38) (dmar7 39)
-+ (dmar8 40) (dmar9 41) (dmar10 57)
-+ (IFC_CTL 29) (ifc0 29)
-+
-+ (PFMC0 64) (PFMC1 65) (PFMC2 66) (PFM_CTL 68)
-+ (pfr0 64) (pfr1 65) (pfr2 66) (pfr3 68)))
-+)
-+
-+(define-hardware
-+ (name h-standbyst)
-+ (comment "subtype for STANDBY")
-+ (type immediate (UINT 2))
-+ (values keyword "" (
-+ (no_wake_grant 0) ("0" 0)
-+ (wake_grant 1) ("1" 1)
-+ (wait_done 2) ("2" 2)
-+ ))
-+)
-+
-+
-+(define-hardware
-+ (name h-tlbopst)
-+ (comment "subtype for TLBOP")
-+ (type immediate (UINT 4))
-+ (values keyword "" (
-+ (TargetRead 0) (TRD 0) ("0" 0)
-+ (TargetWrite 1) (TWR 1) ("1" 1)
-+ (RWrite 2) (RWR 2) ("2" 2)
-+ (RWriteLock 3) (RWLK 3) ("3" 3)
-+ (Unlock 4) (UNLK 4) ("4" 4)
-+ (Probe 5) (PB 5) ("5" 5)
-+ (Invalidate 6) (INV 6) ("6" 6)
-+ (FlushAll 7) (FLUA 7) ("7" 7)
-+ ))
-+)
-+
-+(define-hardware
-+ (name h-cctlst)
-+ (comment "subtype for CCTL")
-+ (type immediate (UINT 5))
-+ (values keyword "" (
-+ (L1D_IX_INVAL 0) ("0" 0)
-+ (L1D_IX_WB 1) ("1" 1)
-+ (L1D_IX_WBINVAL 2) ("2" 2)
-+ (L1D_IX_RTAG 3) ("3" 3)
-+ (L1D_IX_RWD 4) ("4" 4)
-+ (L1D_IX_WTAG 5) ("5" 5)
-+ (L1D_IX_WWD 6) ("6" 6)
-+ (L1D_INVALALL 7) ("7" 7)
-+ (L1D_VA_INVAL 8) ("8" 8)
-+ (L1D_VA_WB 9) ("9" 9)
-+ (L1D_VA_WBINVAL 10) ("10" 10)
-+ (L1D_VA_FILLCK 11) ("11" 11)
-+ (L1D_VA_ULCK 12) ("12" 12)
-+ (L1I_IX_INVAL 16) ("16" 16)
-+ (L1I_IX_RTAG 19) ("19" 19)
-+ (L1I_IX_RWD 20) ("20" 20)
-+ (L1I_IX_WTAG 21) ("21" 21)
-+ (L1I_IX_WWD 22) ("22" 22)
-+ (L1I_VA_INVAL 24) ("24" 24)
-+ (L1I_VA_FILLCK 27) ("27" 27)
-+ (L1I_VA_ULCK 28) ("28" 28)
-+ ))
-+)
-+
-+(define-hardware
-+ (name h-cctllvl)
-+ (comment "levels for CCTL")
-+ (type immediate (UINT 1))
-+ (values keyword "" (
-+ (1level 0) ("0" 0)
-+ (alevel 1) ("1" 1)
-+ ))
-+)
-+
-+(define-hardware
-+ (name h-msyncst)
-+ (comment "subtype for MSYNC")
-+ (type immediate (UINT 4))
-+ (values keyword "" (
-+ (All 0) ("0" 0)
-+ (Store 1) ("1" 1)
-+ ))
-+)
-+
-+(define-hardware
-+ (name h-dprefst)
-+ (comment "subtype for DPREF/DPREFI")
-+ (type immediate (UINT 4))
-+ (values keyword "" (
-+ (SRD 0) ("0" 0)
-+ (MRD 1) ("1" 1)
-+ (SWR 2) ("2" 2)
-+ (MWR 3) ("3" 3)
-+ (PTE 4) ("4" 4)
-+ (CLWR 5) ("5" 5)
-+ ))
-+)
-+
-+;;;;(define-hardware
-+;;;; (name h-syscallst)
-+;;;; (comment "subtype for SYSCALL")
-+;;;; (type immediate (UINT 4))
-+;;;; (values keyword "" (
-+;;;; (All 0) ("0" 0)
-+;;;; (Store 1) ("1" 1)
-+;;;; ))
-+;;;;)
-+
-+; ==============================================================================
-+; Instruction Operands.
-+; ==============================================================================
-+; These entries provide a layer between the assembler and the raw hardware
-+; description, and are used to refer to hardware elements in the semantic
-+; code. Usually there's a bit of over-specification, but in more complicated
-+; instruction sets there isn't.
-+
-+; NDS32 specific operand attributes:
-+
-+(define-attr
-+ (for operand)
-+ (type boolean)
-+ (name HASH-PREFIX)
-+ (comment "immediates have an optional '#' prefix")
-+)
-+
-+(dnop rt5 "destination register" () h-gr f-32-rt5)
-+(dnop ra5 "source register A" () h-gr f-32-ra5)
-+(dnop rb5 "source register B" () h-gr f-32-rb5)
-+(dnop rd1 "64-bit accumulation register" () h-accum f-32-rd1)
-+(dnop rd1hl "h/l part of acc register" () h-accum-hl f-32-rd1hl)
-+(dnop usridx "usr index" () h-usr f-32-usr)
-+(dnop groupidx "group index" () h-group f-32-group)
-+(dnop mfusridx "usr index for mfusr" () h-mfusridx f-32-group-usr)
-+(dnop mtusridx "usr index for mtusr" () h-mtusridx f-32-group-usr)
-+(dnop sr10 "system register" () h-sr f-32-sr10)
-+
-+(dnop disp24 "24-bit displacement" (RELAX) h-iaddr f-32t0-disp24)
-+(dnop disp16 "16-bit displacement" (RELAX) h-iaddr f-32t1-disp16)
-+(dnop disp9 "0-bit displacement" (RELAX) h-iaddr f-32t1-disp9)
-+(dnop disp14 "14-bit displacement" (RELAX) h-iaddr f-32t2-disp14)
-+
-+(dnop tlbopst "subtypes for TLBOP" () h-tlbopst f-32t4-ext5)
-+(dnop cctlst "subtypes for CCTL" () h-cctlst f-32t4-ext5)
-+(dnop cctllvl "levels for CCTL" () h-cctllvl f-32tx-1_21)
-+(dnop msyncst "subtypes for MSYNC" () h-msyncst f-32t3-ext3)
-+(dnop dprefst "subtypes for DPREF/DPREFI" () h-dprefst f-32t2-st4)
-+(dnop standbyst "subtypes for STANDBY" () h-standbyst f-32t4-ext2)
-+
-+(define-operand (name hash) (comment "# prefix") (attrs)
-+ (type h-sint) ; doesn't really matter
-+ (index f-nil)
-+ (handlers (parse "hash") (print "hash"))
-+)
-+
-+(define-operand
-+ (name si)
-+ (comment "2-bit unsigned scaling index")
-+ (attrs HASH-PREFIX)
-+ (type h-si)
-+ (index f-32t3-sub10si)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name uimm5)
-+ (comment "5-bit unsigned count/index")
-+ (attrs HASH-PREFIX)
-+ (type h-uimm5)
-+ (index f-32t3-uimm5)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name mask4)
-+ (comment "4-bit mask for mw insns")
-+ (attrs HASH-PREFIX)
-+ (type h-mask4)
-+ (index f-32t5-mask4)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+(define-operand
-+ (name swid15)
-+ (comment "15-bit software ID")
-+ (attrs HASH-PREFIX)
-+ (type h-swid15)
-+ (index f-32t3-swid15)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+; For hi20(foo)
-+(define-operand
-+ (name uhi20)
-+ (comment "high 20 bit immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-uhi20)
-+ (index f-32t1-uhi20)
-+ (handlers (parse "uhi20"))
-+)
-+
-+; For lo12(foo)
-+(define-operand
-+ (name slo20)
-+ (comment "20 bit signed immediate with lo12() or immediate value")
-+ (attrs HASH-PREFIX)
-+ (type h-slo20)
-+ (index f-32t1-slo20)
-+ (handlers (parse "slo20"))
-+)
-+
-+; For lo12(foo).
-+(define-operand
-+ (name ulo15d)
-+ (comment "15-bit unsigned immediate or low 12 bit unsigned immediate for lo12() on double-word")
-+ (attrs HASH-PREFIX)
-+ (type h-ulo15)
-+ (index f-32t2-ulo15d)
-+ (handlers (parse "ulo15d"))
-+)
-+
-+; For lo12(foo)
-+(define-operand
-+ (name slo15d)
-+ (comment "15-bit signed immediate or low 12 bit unsigned immediate for lo12() on double-word")
-+ (attrs HASH-PREFIX)
-+ (type h-slo15)
-+ (index f-32t2-slo15d)
-+ (handlers (parse "slo15d"))
-+)
-+
-+; For lo12(foo).
-+(define-operand
-+ (name ulo15w)
-+ (comment "15-bit unsigned immediate or low 12 bit unsigned immediate for lo12() on word")
-+ (attrs HASH-PREFIX)
-+ (type h-ulo15)
-+ (index f-32t2-ulo15w)
-+ (handlers (parse "ulo15w"))
-+)
-+
-+; For lo12(foo)
-+(define-operand
-+ (name slo15w)
-+ (comment "15-bit signed immediate or low 12 bit unsigned immediate for lo12() on word")
-+ (attrs HASH-PREFIX)
-+ (type h-slo15)
-+ (index f-32t2-slo15w)
-+ (handlers (parse "slo15w"))
-+)
-+
-+; For lo12(foo).
-+(define-operand
-+ (name ulo15h)
-+ (comment "15-bit unsigned immediate or low 12 bit unsigned immediate for lo12() on half-word")
-+ (attrs HASH-PREFIX)
-+ (type h-ulo15)
-+ (index f-32t2-ulo15h)
-+ (handlers (parse "ulo15h"))
-+)
-+
-+; For lo12(foo)
-+(define-operand
-+ (name slo15h)
-+ (comment "15-bit signed immediate or low 12 bit unsigned immediate for lo12() on half-word")
-+ (attrs HASH-PREFIX)
-+ (type h-slo15)
-+ (index f-32t2-slo15h)
-+ (handlers (parse "slo15h"))
-+)
-+
-+; For lo12(foo).
-+(define-operand
-+ (name ulo15b)
-+ (comment "15-bit unsigned immediate or low 12 bit unsigned immediate for lo12() on byte")
-+ (attrs HASH-PREFIX)
-+ (type h-ulo15)
-+ (index f-32t2-ulo15b)
-+ (handlers (parse "ulo15"))
-+)
-+
-+; For lo12(foo)
-+(define-operand
-+ (name slo15b)
-+ (comment "15-bit signed immediate or low 12 bit unsigned immediate for lo12() on byte")
-+ (attrs HASH-PREFIX)
-+ (type h-slo15)
-+ (index f-32t2-slo15b)
-+ (handlers (parse "slo15"))
-+)
-+
-+; For lo12(foo).
-+(define-operand
-+ (name ulo15)
-+ (comment "15-bit unsigned immediate or low 12 bit unsigned immediate for lo12()")
-+ (attrs HASH-PREFIX)
-+ (type h-ulo15)
-+ (index f-32t2-ulo15b)
-+ (handlers (parse "ulo15"))
-+)
-+
-+; For lo12(foo)
-+(define-operand
-+ (name slo15)
-+ (comment "15-bit signed immediate or low 12 bit unsigned immediate for lo12()")
-+ (attrs HASH-PREFIX)
-+ (type h-slo15)
-+ (index f-32t2-slo15b)
-+ (handlers (parse "slo15"))
-+)
-+
-+; ==============================================================================
-+; Instruction definitions.
-+; ==============================================================================
-+;
-+; Notes while wip:
-+; - dni is a cover macro to the real "this is an instruction" keyword.
-+; The syntax of the real one is yet to be determined.
-+; At the lowest level (i.e. the "real" one) it will probably take a variable
-+; list of arguments where each argument [perhaps after the standard three of
-+; name, comment, attrs] is "(keyword arg-to-keyword)". This syntax is simple
-+; and yet completely upward extensible. And given the macro facility, one
-+; needn't code at that low a level so even though it'll be more verbose than
-+; necessary it won't matter. This same reasoning can be applied to most
-+; types of entries in this file.
-+
-+; NDS32 specific instruction attributes:
-+; C/C++ performance extension instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name EXT)
-+ (comment "C/C++ performance extension instructions")
-+)
-+
-+; C/C++ performance 2 extension instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name EXT2)
-+ (comment "C/C++ performance 2 extension instructions")
-+)
-+
-+;; DSP instructions
-+;(define-attr
-+; (for insn)
-+; (type boolean)
-+; (name DSP)
-+; (comment "DSP instructions")
-+;)
-+
-+;; Andes 64-bit instructions
-+;(define-attr
-+; (for insn)
-+; (type boolean)
-+; (name A64)
-+; (comment "Andes 64-bit instructions")
-+;)
-+
-+; Andes 16-bit instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name A16)
-+ (comment "Andes 16-bit instructions")
-+)
-+
-+; Andes 16-bit baseline version 2 instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name A16V2)
-+ (comment "Andes 16-bit baseline version 2 instructions")
-+)
-+
-+; Andes 32-bit baseline version 2 instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name A32V2)
-+ (comment "Andes 32-bit baseline version 2 instructions")
-+)
-+
-+; Saturation Arithmetic instruction
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name STAT)
-+ (comment "Saturation Arithmetic instruction")
-+)
-+
-+; Inline Function Call instruction
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name IFCEXT)
-+ (comment "Inline function call instructions")
-+)
-+
-+; COP instruction
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name COP)
-+ (comment "coprocessor instructions")
-+)
-+
-+; COPV2 instruction
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name COPV2)
-+ (comment "coprocessor V2 instructions")
-+)
-+
-+; FPU instruction
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name FPU)
-+ (comment "floating point instructions ")
-+)
-+; FPU single precision instruction
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name FPU_SP)
-+ (comment "floating point instructions of single precision")
-+)
-+
-+; FPU double precision instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name FPU_DP)
-+ (comment "floating point instructions of double precision")
-+)
-+
-+; FPU instructions common to DP and SP
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name FPU_COM)
-+ (comment "floating point instructions common to DP and SP")
-+)
-+
-+; FPU single precision mac instruction
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name FPU_SP_MAC)
-+ (comment "floating point instructions of single precision mac")
-+)
-+
-+; FPU double precision mac instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name FPU_DP_MAC)
-+ (comment "floating point instructions of double precision mac")
-+)
-+
-+; 32-bit STRING extension
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name STRING)
-+ (comment "32-bit string instructions extension")
-+)
-+
-+; MAC instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name MAC)
-+ (comment "multiply and accumulate instructions")
-+)
-+
-+;DX_REG instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name DX_REG)
-+ (comment "Instructions involve Dx registers")
-+)
-+
-+; MAC with DX registers instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name MAC_DX)
-+ (comment "multiply and accumulate instructions with D0/D1 registers")
-+)
-+
-+; DIV instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name DIV)
-+ (comment "divide instructions")
-+)
-+
-+; DIV with DX registers instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name DIV_DX)
-+ (comment "divide instructions with D0/D1 registers")
-+)
-+
-+; AUDIO instructions
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name AUDIO)
-+ (comment "audio instructions")
-+)
-+
-+; IDOC attribute for instruction documentation.
-+
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name IDOC)
-+ (comment "insn kind for documentation")
-+ (attrs META)
-+ (values
-+ (MEM - () "Memory")
-+ (ALU - () "ALU")
-+ (BR - () "Branch")
-+ (ACCUM - () "Accumulator")
-+ (MAC - () "Multiply/Accumulate")
-+ (MISC - () "Miscellaneous")
-+ )
-+)
-+
-+(define-pmacro (sext mode arg) (ext mode arg))
-+;(define-pmacro (baseline arg) ((n1m arg) (n1hm arg) (n1pm arg) (n1phm arg)))
-+(define-pmacro (baseline arg) ((n1hm arg)))
-+
-+(dni movi "movi"
-+ ((PIPE OS) (IDOC ALU))
-+ "movi $rt5,$slo20"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_MOVI rt5 slo20)
-+ (set rt5 slo20)
-+ (baseline (unit u-exec))
-+)
-+
-+(dni sethi "sethi"
-+ ((PIPE OS) (IDOC ALU))
-+ "sethi $rt5,$uhi20"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_SETHI rt5 uhi20)
-+ (set rt5 (sll uhi20 (const 12)))
-+ (baseline (unit u-exec))
-+)
-+
-+(define-pmacro (arith-op mnemonic sem-op mode)
-+ (begin
-+ (dni (.sym mnemonic "i")
-+ (.str mnemonic "i reg/reg/slo15")
-+ ((PIPE OS) (IDOC ALU))
-+ (.str mnemonic "i $rt5,$ra5,$slo15")
-+ (+ IFMT_32 OPC6G_5 (.sym "OPC6C5_" (.upcase mnemonic) "I") rt5 ra5 ulo15)
-+ (set rt5 (sem-op mode ra5 slo15))
-+ (baseline (unit u-exec))
-+ )
-+ (dni mnemonic
-+ (.str mnemonic " reg/reg/reg")
-+ ((PIPE OS) (IDOC ALU))
-+ (.str mnemonic " $rt5,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_0 (.sym "ALU_1_SUB10C0_" (.upcase mnemonic)))
-+ (set rt5 (sem-op mode ra5 rb5))
-+ (baseline (unit u-exec))
-+ )
-+ )
-+)
-+(arith-op add add SI)
-+(arith-op slts lt SI)
-+(arith-op slt ltu USI)
-+
-+(dni subri "reversed subtraction with immediate"
-+ ((PIPE OS) (IDOC ALU))
-+ "subri $rt5,$ra5,$slo15"
-+ (+ IFMT_32 OPC6G_5 OPC6C5_SUBRI rt5 ra5 slo15)
-+ (set rt5 (sub slo15 ra5))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+)
-+(dnmi neg "neg"
-+ (NO-DIS (PIPE O) (IDOC ALU))
-+ "neg $rt5,$ra5"
-+ (emit subri rt5 ra5 (f-32t2-slo15b 0))
-+)
-+(dni sub "sub"
-+ ((PIPE OS) (IDOC ALU))
-+ "sub $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_0 ALU_1_SUB10C0_SUB)
-+ (set rt5 (sub ra5 rb5))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+)
-+
-+(define-pmacro (logic-op mnemonic sem-op)
-+ (begin
-+ (dni (.sym mnemonic "i")
-+ (.str mnemonic "i reg/reg/ulo15")
-+ ((PIPE OS) (IDOC ALU))
-+ (.str mnemonic "i $rt5,$ra5,$ulo15")
-+ (+ IFMT_32 OPC6G_5 (.sym "OPC6C5_" (.upcase mnemonic) "I") rt5 ra5 ulo15)
-+ (set rt5 (sem-op ra5 ulo15))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ )
-+ (dni mnemonic
-+ (.str mnemonic " reg/reg/reg")
-+ ((PIPE OS) (IDOC ALU))
-+ (.str mnemonic " $rt5,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_0 (.sym "ALU_1_SUB10C0_" (.upcase mnemonic)))
-+ (set rt5 (sem-op ra5 rb5))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ )
-+ )
-+)
-+(logic-op and and)
-+(logic-op xor xor)
-+(logic-op or or)
-+
-+(dni nor "nor"
-+ ((PIPE OS) (IDOC ALU))
-+ "nor $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_0 ALU_1_SUB10C0_NOR)
-+ (set rt5 (xor (or ra5 rb5) (const SI -1)))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+)
-+
-+(define-pmacro (set-overflow-op suffix sem-op)
-+ (begin
-+ (dni (.sym "sv" suffix) (.str "sv" suffix)
-+ ((PIPE OS) (IDOC ALU))
-+ (.str "sv" suffix " $rt5,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_3 (.sym "ALU_1_SUB10C3_SV" (.upcase suffix)))
-+ (set rt5 ((.sym sem-op "-oflag") ra5 rb5 (const 0)))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ )
-+ )
-+)
-+(set-overflow-op a add)
-+(set-overflow-op s sub)
-+
-+(define-pmacro (extend-op prefix suffix mode)
-+ (begin
-+ (dni (.sym prefix "e" suffix) (.str prefix "e" suffix)
-+ ((PIPE OS) (IDOC ALU))
-+ (.str prefix "e" suffix " $rt5,$ra5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 RES5_17_0 SUB10D_0 SUB10G_2 (.sym "ALU_1_SUB10C2_" (.upcase prefix) "E" (.upcase suffix)))
-+ (set rt5 ((.sym prefix "ext") SI (trunc mode ra5)))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ )
-+ )
-+)
-+(extend-op s b QI)
-+(extend-op s h HI)
-+;(extend-op z b UQI) ;alias to addi rt5, ra5, 0xff
-+(extend-op z h UHI)
-+
-+(dnmi zeb "zeb"
-+ (NO-DIS (PIPE OS) (IDOC ALU))
-+ "zeb $rt5,$ra5"
-+ (emit andi rt5 ra5 (f-32t2-ulo15b #xff))
-+)
-+
-+(dni wsbh "half-word byte-swap in word"
-+ ((PIPE OS) (IDOC ALU))
-+ "wsbh $rt5,$ra5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 RES5_17_0 SUB10D_0 SUB10G_2 ALU_1_SUB10C2_WSBH)
-+ (set rt5 (or (and (srl ra5 (const 8)) (const #x00ff00ff)) (and (sll ra5 (const 8)) (const #xff00ff00))))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+)
-+
-+(define-pmacro (shift-op mnemonic sem-op)
-+ (begin
-+ (dni (.sym mnemonic "i")
-+ (.str mnemonic " reg/reg/uimm5")
-+ ((PIPE OS) (IDOC ALU))
-+ (.str mnemonic "i $rt5,$ra5,$uimm5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 uimm5 SUB10D_0 SUB10G_1 (.sym "ALU_1_SUB10C1_" (.upcase mnemonic) "I"))
-+ (set rt5 (sem-op ra5 uimm5))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ )
-+ (dni mnemonic
-+ (.str mnemonic " reg/reg/reg")
-+ ((PIPE OS) (IDOC ALU))
-+ (.str mnemonic " $rt5,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_1 (.sym "ALU_1_SUB10C1_" (.upcase mnemonic)))
-+ (set rt5 (sem-op ra5 (and rb5 (const #x1f))))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ )
-+ )
-+)
-+(shift-op sll sll)
-+(shift-op sra sra)
-+(shift-op rotr ror)
-+
-+
-+(dni srli "srli reg/reg/uimm5"
-+ ((PIPE OS) (IDOC ALU))
-+ "srli $rt5,$ra5,$uimm5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 uimm5 SUB10D_0 SUB10G_1 ALU_1_SUB10C1_SRLI)
-+ (if (and USI (and USI (eq USI (index-of rt5) (const 0)) (eq USI (index-of ra5) (const 0))) (eq USI uimm5 (const 0)))
-+ (sequence ()
-+ (c-code VOID " SET_NOP_CNT_COUNTER();\n")
-+ )
-+ (set rt5 (srl ra5 uimm5))
-+ )
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+)
-+
-+(dni srl "srl reg/reg/reg"
-+ ((PIPE OS) (IDOC ALU))
-+ "srl $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_1 ALU_1_SUB10C1_SRL)
-+ (set rt5 (srl ra5 (and rb5 (const #x1f))))
-+ (
-+ (n1hm (unit u-exec ))
-+ )
-+)
-+
-+(dni mul "mul"
-+ ((PIPE S) (IDOC ALU) MAC)
-+ "mul $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_0 SUB10G_4 ALU_2_SUB10C4_MUL)
-+ (set rt5 (mul ra5 rb5))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+(define-pmacro (mult64-op mnemonic ext-op mode)
-+ (begin
-+ (dni (.sym mnemonic "64") (.str mnemonic "64")
-+ ((PIPE S) (IDOC ALU) MAC DX_REG MAC_DX)
-+ (.str mnemonic "64 $rd1,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 RES3_7_0 rd1 RES1_11_0 ra5 rb5 SUB10D_0 SUB10G_5 (.sym "ALU_2_SUB10C5_" (.upcase mnemonic) "64"))
-+ (if VOID (c-code VOID "1 == GET_H_SR_FLD(MSC_CFG,NOD)")
-+ ;then
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID (.str "\tgoto " (.upcase mnemonic) "64_interruption;\n\n")))
-+
-+ ;else
-+ (set rd1 (mul mode (ext-op mode ra5) (ext-op mode rb5))))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+ )
-+ )
-+)
-+(mult64-op mults sext DI)
-+(mult64-op mult zext UDI)
-+
-+(define-pmacro (madd64-op sem-op suffix ext-op mode)
-+ (begin
-+ (dni (.sym "m" sem-op suffix "64") (.str "m" suffix "64")
-+ ((PIPE S) (IDOC ALU) MAC DX_REG MAC_DX)
-+ (.str "m" sem-op suffix "64 $rd1,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 RES3_7_0 rd1 RES1_11_0 ra5 rb5 SUB10D_0 SUB10G_5 (.sym "ALU_2_SUB10C5_M" (.upcase sem-op) (.upcase suffix) "64"))
-+ (if VOID (c-code VOID "1 == GET_H_SR_FLD(MSC_CFG,NOD)")
-+ ;then
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID (.str "\tgoto M" (.upcase sem-op) (.upcase suffix) "64_interruption;\n\n")))
-+
-+ ;else
-+ (set rd1 (sem-op mode rd1 (mul mode (ext-op mode ra5) (ext-op mode rb5)))))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+ )
-+ )
-+)
-+(madd64-op add "s" sext DI)
-+(madd64-op add "" zext UDI)
-+(madd64-op sub "s" sext DI)
-+(madd64-op sub "" zext UDI)
-+
-+(define-pmacro (mult32-op mnemonic ext-op mode)
-+ (begin
-+ (dni (.sym mnemonic "32") (.str mnemonic "32")
-+ ((PIPE S) (IDOC ALU) MAC DX_REG MAC_DX)
-+ (.str mnemonic "32 $rd1,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 RES3_7_0 rd1 RES1_11_0 ra5 rb5 SUB10D_0 SUB10G_6 (.sym "ALU_2_SUB10C6_" (.upcase mnemonic) "32"))
-+ (if VOID (c-code VOID "1 == GET_H_SR_FLD(MSC_CFG,NOD)")
-+ ;then
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID (.str "\tgoto " (.upcase mnemonic) "32_interruption;\n\n")))
-+
-+ ;else
-+ (set USI (reg h-accum-hl (sll (index-of rd1) (const 1))) (mul mode (ext-op mode ra5) (ext-op mode rb5))))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+ )
-+ )
-+)
-+(mult32-op mult zext UDI)
-+
-+(define-pmacro (madd32-op sem-op suffix ext-op mode)
-+ (begin
-+ (dni (.sym "m" sem-op suffix "32") (.str "m" suffix "32")
-+ ((PIPE S) (IDOC ALU) MAC DX_REG MAC_DX)
-+ (.str "m" sem-op suffix "32 $rd1,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 RES3_7_0 rd1 RES1_11_0 ra5 rb5 SUB10D_0 SUB10G_6 (.sym "ALU_2_SUB10C6_M" (.upcase sem-op) (.upcase suffix) "32"))
-+ (if VOID (c-code VOID "1 == GET_H_SR_FLD(MSC_CFG,NOD)")
-+ ;then
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID (.str "\tgoto M" (.upcase sem-op) (.upcase suffix) "32_interruption;\n\n")))
-+
-+ ;else
-+ (set USI (reg h-accum-hl (sll (index-of rd1) (const 1))) (sem-op mode (reg h-accum-hl (sll (index-of rd1) (const 1))) (mul mode (ext-op mode ra5) (ext-op mode rb5)))))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+ )
-+ )
-+)
-+(madd32-op add "" zext UDI)
-+(madd32-op sub "" zext UDI)
-+
-+(dni mfusr "move from user special registers"
-+ ((PIPE S) (IDOC ALU) DX_REG)
-+ "mfusr $rt5,$mfusridx"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 usridx groupidx SUB10D_0 SUB10G_4 ALU_2_SUB10C4_MFUSR)
-+ (set rt5 (c-call USI "nds32_mfusr_handler" (index-of rt5) groupidx usridx))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+(dni mtusr "move to user special register"
-+ ((PIPE S) (IDOC ALU) DX_REG)
-+ "mtusr $rt5,$mtusridx"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 usridx groupidx SUB10D_0 SUB10G_4 ALU_2_SUB10C4_MTUSR)
-+ (c-call VOID " nds32_mtusr_handler" pc rt5 groupidx usridx)
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+ (dni lbi "lbi"
-+ ((PIPE O) (IDOC MEM))
-+ "lbi $rt5,[$ra5+$slo15b]"
-+ (+ IFMT_32 OPC6G_0 OPC6C0_LBI rt5 ra5 slo15b)
-+ (sequence ()
-+ (c-code VOID "if (TEST_H_SR_FLD(INT_MASK,ALZ)) { \n")
-+ (if (and USI (and USI (eq USI (index-of rt5) (const 0)) (eq USI (index-of ra5) (const 0))) (eq USI slo15b (const 0)))
-+ (sequence ()
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED;\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID " goto LBI_interruption;\n")
-+ )
-+ )
-+ (c-code VOID "}\n")
-+ (set rt5 (zext USI (mem UQI (add ra5 slo15b))))
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ )
-+
-+ (dni lbi.bi "lbi.bi"
-+ ((PIPE O) (IDOC MEM))
-+ "lbi.bi $rt5,[$ra5],$slo15b"
-+ (+ IFMT_32 OPC6G_0 OPC6C0_LBIP rt5 ra5 slo15b)
-+ (parallel ()
-+ (set rt5 (zext USI (mem UQI ra5)))
-+ (set ra5 (add ra5 slo15b))
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ )
-+
-+ (dni lb "lb"
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ "lb $rt5,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_0 MEM_SUB10C0_LB)
-+ (set rt5 (zext USI (mem UQI (add ra5 (sll rb5 si)))))
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ )
-+
-+ (dni lb.bi "lb.bi"
-+ ((PIPE O) (IDOC MEM))
-+ "lb.bi $rt5,[$ra5],$rb5<<$si"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_0 MEM_SUB10C0_LBP)
-+ (parallel ()
-+ (set rt5 (zext USI (mem UQI ra5)))
-+ (set ra5 (add ra5 (sll rb5 si)))
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ )
-+
-+(define-pmacro (loadb-op suffix mode ext-op)
-+ (begin
-+ (dnmi (.sym l suffix "i2") (.str "l" suffix "i2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "i $rt5,[$ra5]")
-+ (emit (.sym l suffix i) rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+
-+ (dnmi (.sym l suffix "i.p") (.str "l" suffix "i.p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "i.p $rt5,[$ra5],$slo15" suffix)
-+ (emit (.sym l suffix "i.bi") rt5 ra5 (.sym "slo15" suffix))
-+ )
-+
-+ (dnmi (.sym l suffix "1") (.str "l" suffix "1")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5+($rb5<<$si)]")
-+ (emit (.sym l suffix) rt5 ra5 rb5 si)
-+ )
-+ (dnmi (.sym l suffix "2") (.str "l" suffix "2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5+$rb5]")
-+ (emit (.sym l suffix) rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ (dnmi (.sym l suffix "3") (.str "l" suffix "3")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5]")
-+ (emit (.sym l suffix i) rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+
-+ (dnmi (.sym l suffix ".bi2") (.str "l" suffix ".bi2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".bi $rt5,[$ra5],$rb5")
-+ (emit (.sym l suffix ".bi") rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ (dnmi (.sym l suffix ".p") (.str "l" suffix ".p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".p $rt5,[$ra5],$rb5<<$si")
-+ (emit (.sym l suffix ".bi") rt5 ra5 rb5 si)
-+ )
-+ (dnmi (.sym l suffix ".p2") (.str "l" suffix ".p2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".p $rt5,[$ra5],$rb5")
-+ (emit (.sym l suffix ".bi") rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ )
-+)
-+(loadb-op b UQI zext)
-+
-+(define-pmacro (loadh-op suffix mode ext-op)
-+ (begin
-+ (dni (.sym l suffix i) (.str "l" suffix "i")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix "i $rt5,[$ra5+$slo15" suffix "]")
-+ (+ IFMT_32 OPC6G_0 (.sym "OPC6C0_L" (.upcase suffix) "I") rt5 ra5 (.sym "slo15" suffix))
-+ (set rt5 (ext-op USI (mem mode (add ra5 (.sym "slo15" suffix)))))
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ )
-+ (dnmi (.sym l suffix "i2") (.str "l" suffix "i2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "i $rt5,[$ra5]")
-+ (emit (.sym l suffix i) rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+
-+ (dni (.sym l suffix "i.bi") (.str "l" suffix "i.bi")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix "i.bi $rt5,[$ra5],$slo15" suffix)
-+ (+ IFMT_32 OPC6G_0 (.sym "OPC6C0_L" (.upcase suffix) "IP") rt5 ra5 (.sym "slo15" suffix))
-+ (parallel ()
-+ (set rt5 (ext-op USI (mem mode ra5)))
-+ (set ra5 (add ra5 (.sym "slo15" suffix)))
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ ; Note: `pred' is the constraint. Also useful here is (ref name)
-+ ; and returns true if operand <name> was referenced
-+ ; (where "referenced" means _read_ if input operand and _written_ if
-+ ; output operand).
-+ ; args to unit are "unit-name (name1 value1) ..."
-+ ; - cycles(done),issue,pred are also specified this way
-+ ; - if unspecified, default is used
-+ ; - for ins/outs, extra arg is passed that says what was specified
-+ ; - this is AND'd with `written' for outs
-+; ((n1m (unit u-load (pred (const 1)))
-+; (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1))))
-+; )
-+ )
-+ (dnmi (.sym l suffix "i.p") (.str "l" suffix "i.p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "i.p $rt5,[$ra5],$slo15" suffix)
-+ (emit (.sym l suffix "i.bi") rt5 ra5 (.sym "slo15" suffix))
-+ )
-+
-+ (dni (.sym l suffix) (.str "l" suffix)
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5+$rb5<<$si]")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_0 (.sym "MEM_SUB10C0_L" (.upcase suffix)))
-+ (set rt5 (ext-op USI (mem mode (add ra5 (sll rb5 si)))))
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ )
-+ (dnmi (.sym l suffix "1") (.str "l" suffix "1")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5+($rb5<<$si)]")
-+ (emit (.sym l suffix) rt5 ra5 rb5 si)
-+ )
-+ (dnmi (.sym l suffix "2") (.str "l" suffix "2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5+$rb5]")
-+ (emit (.sym l suffix) rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ (dnmi (.sym l suffix "3") (.str "l" suffix "3")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5]")
-+ (emit (.sym l suffix i) rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+
-+ (dni (.sym l suffix ".bi") (.str "l" suffix ".bi")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".bi $rt5,[$ra5],$rb5<<$si")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_0 (.sym "MEM_SUB10C0_L" (.upcase suffix) "P"))
-+ (parallel ()
-+ (set rt5 (ext-op USI (mem mode ra5)))
-+ (set ra5 (add ra5 (sll rb5 si)))
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ ; Note: `pred' is the constraint. Also useful here is (ref name)
-+ ; and returns true if operand <name> was referenced
-+ ; (where "referenced" means _read_ if input operand and _written_ if
-+ ; output operand).
-+ ; args to unit are "unit-name (name1 value1) ..."
-+ ; - cycles(done),issue,pred are also specified this way
-+ ; - if unspecified, default is used
-+ ; - for ins/outs, extra arg is passed that says what was specified
-+ ; - this is AND'd with `written' for outs
-+; ((n1m (unit u-load (pred (const 1)))
-+; (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1))))
-+; )
-+ )
-+ (dnmi (.sym l suffix ".bi2") (.str "l" suffix ".bi2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".bi $rt5,[$ra5],$rb5")
-+ (emit (.sym l suffix ".bi") rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ (dnmi (.sym l suffix ".p") (.str "l" suffix ".p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".p $rt5,[$ra5],$rb5<<$si")
-+ (emit (.sym l suffix ".bi") rt5 ra5 rb5 si)
-+ )
-+ (dnmi (.sym l suffix ".p2") (.str "l" suffix ".p2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".p $rt5,[$ra5],$rb5")
-+ (emit (.sym l suffix ".bi") rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ )
-+)
-+(loadh-op h UHI zext)
-+
-+(dni lwi "lwi"
-+ ((PIPE O) (IDOC MEM))
-+ "lwi $rt5,[$ra5+$slo15w]"
-+ (+ IFMT_32 OPC6G_0 OPC6C0_LWI rt5 ra5 slo15w)
-+ (sequence ((USI data))
-+ (set data (zext USI (mem USI (add ra5 slo15w))))
-+ (set rt5 (c-code USI "nds32_am2gr_handler(current_cpu, tmp_data, BLW_ACCESS_TYPE(current_cpu))")))
-+ ((n1hm (unit u-load))))
-+
-+(dni lwi.bi "lwi.bi"
-+ ((PIPE O) (IDOC MEM))
-+ "lwi.bi $rt5,[$ra5],$slo15w"
-+ (+ IFMT_32 OPC6G_0 OPC6C0_LWIP rt5 ra5 slo15w)
-+ (sequence ((USI data))
-+ (set data (zext USI (mem USI ra5)))
-+ (parallel ()
-+ (set rt5 (c-code USI "nds32_am2gr_handler(current_cpu, tmp_data, BLW_ACCESS_TYPE(current_cpu))"))
-+ (set ra5 (add ra5 slo15w))))
-+ ((n1hm (unit u-load))))
-+
-+(dni lw "lw"
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ "lw $rt5,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_0 MEM_SUB10C0_LW)
-+ (sequence ((USI data))
-+ (set data (zext USI (mem USI (add ra5 (sll rb5 si)))))
-+ (set rt5 (c-code USI "nds32_am2gr_handler(current_cpu, tmp_data, BLW_ACCESS_TYPE(current_cpu))")))
-+ ((n1hm (unit u-load))))
-+
-+
-+(dni lw.bi "lw.bi"
-+ ((PIPE O) (IDOC MEM))
-+ "lw.bi $rt5,[$ra5],$rb5<<$si"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_0 MEM_SUB10C0_LWP)
-+ (sequence ((USI data))
-+ (set data (zext USI (mem USI ra5)))
-+ (parallel ()
-+ (set rt5 (c-code USI "nds32_am2gr_handler(current_cpu, tmp_data, BLW_ACCESS_TYPE(current_cpu))"))
-+ (set ra5 (add ra5 (sll rb5 si)))))
-+ ((n1hm (unit u-load))))
-+
-+(define-pmacro (loadw-op suffix mode ext-op)
-+ (begin
-+
-+ (dnmi (.sym l suffix "i2") (.str "l" suffix "i2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "i $rt5,[$ra5]")
-+ (emit (.sym l suffix i) rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+
-+ (dnmi (.sym l suffix "i.p") (.str "l" suffix "i.p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "i.p $rt5,[$ra5],$slo15" suffix)
-+ (emit (.sym l suffix "i.bi") rt5 ra5 (.sym "slo15" suffix)))
-+
-+ (dnmi (.sym l suffix "1") (.str "l" suffix "1")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5+($rb5<<$si)]")
-+ (emit (.sym l suffix) rt5 ra5 rb5 si))
-+
-+ (dnmi (.sym l suffix "2") (.str "l" suffix "2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5+$rb5]")
-+ (emit (.sym l suffix) rt5 ra5 rb5 (f-32t3-sub10si 0)))
-+
-+ (dnmi (.sym l suffix "3") (.str "l" suffix "3")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix " $rt5,[$ra5]")
-+ (emit (.sym l suffix i) rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0)))
-+
-+ (dnmi (.sym l suffix ".bi2") (.str "l" suffix ".bi2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".bi $rt5,[$ra5],$rb5")
-+ (emit (.sym l suffix ".bi") rt5 ra5 rb5 (f-32t3-sub10si 0)))
-+
-+ (dnmi (.sym l suffix ".p") (.str "l" suffix ".p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".p $rt5,[$ra5],$rb5<<$si")
-+ (emit (.sym l suffix ".bi") rt5 ra5 rb5 si))
-+
-+ (dnmi (.sym l suffix ".p2") (.str "l" suffix ".p2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix ".p $rt5,[$ra5],$rb5")
-+ (emit (.sym l suffix ".bi") rt5 ra5 rb5 (f-32t3-sub10si 0)))
-+ )
-+ )
-+(loadw-op w USI zext)
-+
-+
-+(dni lwup "load word with user privilege"
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ "lwup $rt5,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_4 MEM_SUB10C4_LWUP)
-+ (sequence ()
-+ (c-call VOID "set_user_privilege")
-+ (set rt5 (mem USI (add ra5 (sll rb5 si))))
-+ (c-call VOID "clr_user_privilege")
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+)
-+(dnmi lwup1 "load word with user privilege (1)"
-+ ((PIPE O) (IDOC MEM))
-+ "lwup $rt5,[$ra5+($rb5<<$si)]"
-+ (emit lwup rt5 ra5 rb5 si)
-+)
-+(dnmi lwup2 "load word with user privilege (2)"
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ "lwup $rt5,[$ra5+$rb5]"
-+ (emit lwup rt5 ra5 rb5 (f-32t3-sub10si 0))
-+)
-+
-+(dni swup "store word with user privilege"
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ "swup $rt5,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_5 MEM_SUB10C5_SWUP)
-+ (sequence ()
-+ (c-call VOID "set_user_privilege")
-+ (set USI (mem USI (add ra5 (sll rb5 si))) rt5)
-+ (c-call VOID "clr_user_privilege")
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+)
-+(dnmi swup1 "store word with user privilege (1)"
-+ ((PIPE O) (IDOC MEM))
-+ "swup $rt5,[$ra5+($rb5<<$si)]"
-+ (emit swup rt5 ra5 rb5 si)
-+)
-+(dnmi swup2 "store word with user privilege (2)"
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ "swup $rt5,[$ra5+$rb5]"
-+ (emit swup rt5 ra5 rb5 (f-32t3-sub10si 0))
-+)
-+
-+(define-pmacro (loads-op suffix mode ext-op)
-+ (begin
-+ (dni (.sym l suffix "si") (.str "l" suffix "si")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix "si $rt5,[$ra5+$slo15" suffix "]")
-+ (+ IFMT_32 OPC6G_2 (.sym "OPC6C2_L" (.upcase suffix) "SI") rt5 ra5 (.sym "slo15" suffix))
-+ (set rt5 (ext-op SI (mem mode (add ra5 (.sym "slo15" suffix)))))
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ )
-+ (dnmi (.sym l suffix "si2") (.str "l" suffix "si2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "si $rt5,[$ra5]")
-+ (emit (.sym l suffix "si") rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+
-+ (dni (.sym l suffix "si.bi") (.str "l" suffix "si.bi")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix "si.bi $rt5,[$ra5],$slo15" suffix)
-+ (+ IFMT_32 OPC6G_2 (.sym "OPC6C2_L" (.upcase suffix)"SIP") rt5 ra5 (.sym "slo15" suffix))
-+ (parallel ()
-+ (set rt5 (ext-op SI (mem mode ra5)))
-+ (set ra5 (add ra5 (.sym "slo15" suffix)))
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ ; Note: `pred' is the constraint. Also useful here is (ref name)
-+ ; and returns true if operand <name> was referenced
-+ ; (where "referenced" means _read_ if input operand and _written_ if
-+ ; output operand).
-+ ; args to unit are "unit-name (name1 value1) ..."
-+ ; - cycles(done),issue,pred are also specified this way
-+ ; - if unspecified, default is used
-+ ; - for ins/outs, extra arg is passed that says what was specified
-+ ; - this is AND'd with `written' for outs
-+; ((n1m (unit u-load (pred (const 1)))
-+; (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1))))
-+; )
-+ )
-+ (dnmi (.sym l suffix "si.p") (.str "l" suffix "si.p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "si.p $rt5,[$ra5],$slo15" suffix)
-+ (emit (.sym l suffix "si.bi") rt5 ra5 (.sym "slo15" suffix))
-+ )
-+
-+ (dni (.sym l suffix s) (.str "l" suffix "s")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "s $rt5,[$ra5+$rb5<<$si]")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_2 (.sym "MEM_SUB10C2_L" (.upcase suffix) "S"))
-+ (set rt5 (ext-op SI (mem mode (add ra5 (sll rb5 si)))))
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ )
-+ (dnmi (.sym l suffix "s1") (.str "l" suffix "s1")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix "s $rt5,[$ra5+($rb5<<$si)]")
-+ (emit (.sym l suffix "s") rt5 ra5 rb5 si)
-+ )
-+ (dnmi (.sym l suffix "s2") (.str "l" suffix "s2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "s $rt5,[$ra5+$rb5]")
-+ (emit (.sym l suffix "s") rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ (dnmi (.sym l suffix "s3") (.str "l" suffix "s3")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "s $rt5,[$ra5]")
-+ (emit (.sym l suffix "si") rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+
-+
-+ (dni (.sym l suffix "s.bi") (.str "l" suffix "s.bi")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "l" suffix "s.bi $rt5,[$ra5],$rb5<<$si")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_2 (.sym "MEM_SUB10C2_L" (.upcase suffix) "SP"))
-+ (parallel ()
-+ (set rt5 (ext-op SI (mem mode ra5)))
-+ (set ra5 (add ra5 (sll rb5 si)))
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ ; Note: `pred' is the constraint. Also useful here is (ref name)
-+ ; and returns true if operand <name> was referenced
-+ ; (where "referenced" means _read_ if input operand and _written_ if
-+ ; output operand).
-+ ; args to unit are "unit-name (name1 value1) ..."
-+ ; - cycles(done),issue,pred are also specified this way
-+ ; - if unspecified, default is used
-+ ; - for ins/outs, extra arg is passed that says what was specified
-+ ; - this is AND'd with `written' for outs
-+; ((n1m (unit u-load (pred (const 1)))
-+; (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1))))
-+; )
-+ )
-+ (dnmi (.sym l suffix "s.bi2") (.str "l" suffix "s.bi2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "s.bi $rt5,[$ra5],$rb5")
-+ (emit (.sym l suffix "s.bi") rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ (dnmi (.sym l suffix "s.p") (.str "l" suffix "s.p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "s.p $rt5,[$ra5],$rb5<<$si")
-+ (emit (.sym l suffix "s.bi") rt5 ra5 rb5 si)
-+ )
-+ (dnmi (.sym l suffix "s.p2") (.str "l" suffix "s.p2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "l" suffix "s.p $rt5,[$ra5],$rb5")
-+ (emit (.sym l suffix "s.bi") rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ )
-+)
-+(loads-op b QI sext)
-+(loads-op h HI sext)
-+
-+(define-pmacro (store-op suffix mode)
-+ (begin
-+ (dni (.sym s suffix i) (.str "s" suffix "i")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "s" suffix "i $rt5,[$ra5+$slo15" suffix "]")
-+ (+ IFMT_32 OPC6G_1 (.sym "OPC6C1_S" (.upcase suffix) "I") rt5 ra5 (.sym "slo15" suffix))
-+ (set mode (mem mode (add ra5 (.sym "slo15" suffix))) rt5)
-+ (
-+ (n1hm (unit u-store (cycles 1)))
-+ )
-+ )
-+ (dnmi (.sym s suffix "i2") (.str "s" suffix "i2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "s" suffix "i $rt5,[$ra5]")
-+ (emit (.sym s suffix i) rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+
-+ (dni (.sym s suffix "i.bi") (.str "s" suffix "i.bi")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "s" suffix "i.bi $rt5,[$ra5],$slo15" suffix)
-+ (+ IFMT_32 OPC6G_1 (.sym "OPC6C1_S" (.upcase suffix) "IP") rt5 ra5 (.sym "slo15" suffix))
-+ (parallel ()
-+ (set mode (mem mode ra5) rt5)
-+ (set ra5 (add ra5 (.sym "slo15" suffix)))
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ ; Note: `pred' is the constraint. Also useful here is (ref name)
-+ ; and returns true if operand <name> was referenced
-+ ; (where "referenced" means _read_ if input operand and _written_ if
-+ ; output operand).
-+ ; args to unit are "unit-name (name1 value1) ..."
-+ ; - cycles(done),issue,pred are also specified this way
-+ ; - if unspecified, default is used
-+ ; - for ins/outs, extra arg is passed that says what was specified
-+ ; - this is AND'd with `written' for outs
-+; ((n1m (unit u-load (pred (const 1)))
-+; (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1))))
-+; )
-+ )
-+ (dnmi (.sym s suffix "i.p") (.str "s" suffix "i.p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "s" suffix "i.p $rt5,[$ra5],$slo15" suffix)
-+ (emit (.sym s suffix "i.bi") rt5 ra5 (.sym "slo15" suffix))
-+ )
-+
-+ (dni (.sym s suffix) (.str "s" suffix)
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "s" suffix " $rt5,[$ra5+$rb5<<$si]")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_1 (.sym "MEM_SUB10C1_S" (.upcase suffix)))
-+ (set mode (mem mode (add ra5 (sll rb5 si))) rt5)
-+ (
-+ (n1hm (unit u-store (cycles 1)))
-+ )
-+ )
-+ (dnmi (.sym s suffix "1") (.str "s" suffix "1")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "s" suffix " $rt5,[$ra5+($rb5<<$si)]")
-+ (emit (.sym s suffix) rt5 ra5 rb5 si)
-+ )
-+ (dnmi (.sym s suffix "2") (.str "s" suffix "2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "s" suffix " $rt5,[$ra5+$rb5]")
-+ (emit (.sym s suffix) rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ (dnmi (.sym s suffix "3") (.str "s" suffix "3")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "s" suffix " $rt5,[$ra5]")
-+ (emit (.sym s suffix i) rt5 ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+
-+
-+ (dni (.sym s suffix ".bi") (.str "s" suffix ".bi")
-+ ((PIPE O) (IDOC MEM))
-+ (.str "s" suffix ".bi $rt5,[$ra5],$rb5<<$si")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_1 (.sym "MEM_SUB10C1_S" (.upcase suffix) "P"))
-+ (parallel ()
-+ (set mode (mem mode ra5) rt5)
-+ (set ra5 (add ra5 (sll rb5 si)))
-+ )
-+ (
-+ (n1hm (unit u-store))
-+ )
-+ ; Note: `pred' is the constraint. Also useful here is (ref name)
-+ ; and returns true if operand <name> was referenced
-+ ; (where "referenced" means _read_ if input operand and _written_ if
-+ ; output operand).
-+ ; args to unit are "unit-name (name1 value1) ..."
-+ ; - cycles(done),issue,pred are also specified this way
-+ ; - if unspecified, default is used
-+ ; - for ins/outs, extra arg is passed that says what was specified
-+ ; - this is AND'd with `written' for outs
-+; ((n1m (unit u-load (pred (const 1)))
-+; (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1))))
-+; )
-+ )
-+ (dnmi (.sym s suffix ".bi2") (.str "s" suffix ".bi2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "s" suffix ".bi $rt5,[$ra5],$rb5")
-+ (emit (.sym s suffix ".bi") rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ (dnmi (.sym s suffix ".p") (.str "s" suffix ".p")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "s" suffix ".p $rt5,[$ra5],$rb5<<$si")
-+ (emit (.sym s suffix ".bi") rt5 ra5 rb5 si)
-+ )
-+ (dnmi (.sym s suffix ".p2") (.str "s" suffix ".p2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "s" suffix ".p $rt5,[$ra5],$rb5")
-+ (emit (.sym s suffix ".bi") rt5 ra5 rb5 (f-32t3-sub10si 0))
-+ )
-+ )
-+)
-+(store-op b QI)
-+(store-op h HI)
-+(store-op w SI)
-+
-+(define-pmacro (lmw-op suffix0 suffix1 suffix2)
-+ (begin
-+ (dni (.sym "lmw." suffix0 suffix1 suffix2) (.str "lmw." suffix0 suffix1 suffix2)
-+ ((PIPE O) (IDOC MEM))
-+ (.str "lmw." suffix0 suffix1 suffix2 " $rt5,[$ra5],$rb5,$mask4")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_LSMW rt5 ra5 rb5 mask4 (.sym "LSMW_SUB4_LMW" suffix0 suffix1 suffix2) RES2_30_0)
-+ (sequence ()
-+ (c-call VOID " nds32_lmw_handler" pc
-+ (enum SI (.sym "LSMW_SUB4_LMW" suffix0 suffix1 suffix2))
-+ (index-of rt5) (index-of ra5) (index-of rb5) mask4)
-+ (c-code VOID (.str " if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n"))
-+ (c-code VOID (.str " DBP_LOCK(current_cpu) = 0;\n"))
-+ (c-code VOID (.str " if (CPU_INT_ARGS_ICODE(current_cpu) != NDS32_ICODE_DNDEB_A) { \n"))
-+ (c-code VOID (.str " goto LMW_" (.upcase suffix0) (.upcase suffix1) (.upcase suffix2) "_interruption;\n"))
-+ (c-code VOID (.str " }\n"))
-+ (c-code VOID (.str " }\n"))
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ )
-+ (dnmi (.sym "lmw." suffix0 suffix1 suffix2 "2") (.str "lmw." suffix0 suffix1 suffix2 "2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "lmw." suffix0 suffix1 suffix2 " $rt5,[$ra5],$rb5")
-+ (emit (.sym "lmw." suffix0 suffix1 suffix2) rt5 ra5 rb5 (f-32t5-mask4 0))
-+ )
-+ )
-+)
-+(lmw-op b i "")
-+(lmw-op b i m)
-+(lmw-op b d "")
-+(lmw-op b d m)
-+(lmw-op a i "")
-+(lmw-op a i m)
-+(lmw-op a d "")
-+(lmw-op a d m)
-+
-+(define-pmacro (smw-op suffix0 suffix1 suffix2)
-+ (begin
-+ (dni (.sym "smw." suffix0 suffix1 suffix2) (.str "smw." suffix0 suffix1 suffix2)
-+ ((PIPE O) (IDOC MEM))
-+ (.str "smw." suffix0 suffix1 suffix2 " $rt5,[$ra5],$rb5,$mask4")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_LSMW rt5 ra5 rb5 mask4 (.sym "LSMW_SUB4_SMW" suffix0 suffix1 suffix2) RES2_30_0)
-+ (sequence ()
-+ (c-call VOID " nds32_smw_handler" pc
-+ (enum SI (.sym "LSMW_SUB4_SMW" suffix0 suffix1 suffix2))
-+ (index-of rt5) (index-of ra5) (index-of rb5) mask4)
-+ (c-code VOID (.str " if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n"))
-+ (c-code VOID (.str " DBP_LOCK(current_cpu) = 0;\n"))
-+ (c-code VOID (.str " if (!((CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_A)||(CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_V))) { \n"))
-+ (c-code VOID (.str " goto SMW_" (.upcase suffix0) (.upcase suffix1) (.upcase suffix2) "_interruption;\n"))
-+ (c-code VOID (.str " }\n"))
-+ (c-code VOID (.str " }\n"))
-+ )
-+ (
-+ (n1hm (unit u-store))
-+ )
-+ )
-+ (dnmi (.sym "smw." suffix0 suffix1 suffix2 "2") (.str "smw." suffix0 suffix1 suffix2 "2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "smw." suffix0 suffix1 suffix2 " $rt5,[$ra5],$rb5")
-+ (emit (.sym "smw." suffix0 suffix1 suffix2) rt5 ra5 rb5 (f-32t5-mask4 0))
-+ )
-+ )
-+)
-+(smw-op b i "")
-+(smw-op b i m)
-+(smw-op b d "")
-+(smw-op b d m)
-+(smw-op a i "")
-+(smw-op a i m)
-+(smw-op a d "")
-+(smw-op a d m)
-+
-+(dni llw "llw"
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ "llw $rt5,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_3 MEM_SUB10C3_LLW)
-+;FIXME: need to call special GETMEM function to lock physical address
-+ (sequence ()
-+ (set rt5 (mem SI (add ra5 (sll rb5 si))))
-+ (c-code VOID " CPU_LOCK_REGION(current_cpu) = ")
-+ (c-raw-call VOID "PUT_CPU_LOCK_REGION" (add ra5 (sll rb5 si)))
-+ (c-code VOID " SET_CPU_HW_EVENTS(current_cpu,LOCK);\n")
-+ (c-code VOID "#ifndef SIM_ENV_GDB\n")
-+ (c-code VOID " if (TEST_H_SR_FLD(MSC_CFG,L2C)) { // go to L2 cache \n")
-+ (c-code VOID " L2C_SET_CMD(current_cpu->access_l2c_cmd, L2C_LOCK_SET);\n")
-+ (c-code VOID " L2C_SET_ADDR(current_cpu->access_l2c_cmd, CPU_LOCK_REGION(current_cpu));\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "#endif\n")
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+)
-+(dnmi llw1 "llw1"
-+ ((PIPE O) (IDOC MEM))
-+ "llw $rt5,[$ra5+($rb5<<$si)]"
-+ (emit llw rt5 ra5 rb5 si)
-+)
-+(dnmi llw2 "llw2"
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ "llw $rt5,[$ra5+$rb5]"
-+ (emit llw rt5 ra5 rb5 (f-32t3-sub10si 0))
-+)
-+
-+(dni scw "scw"
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ "scw $rt5,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_3 MEM_SUB10C3_SCW)
-+;FIXME: need to call special SETMEM function to check lock situation
-+ (sequence ()
-+ (c-call VOID "nds32_scw_handler" pc (index-of rt5) rt5 ra5 rb5 si)
-+ (c-code VOID "if(NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " if(!((CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_A)||(CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_V))) {\n")
-+ (c-code VOID " goto SCW_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+
-+ ((n1hm (unit u-load)))
-+)
-+(dnmi scw1 "scw1"
-+ ((PIPE O) (IDOC MEM))
-+ "scw $rt5,[$ra5+($rb5<<$si)]"
-+ (emit scw rt5 ra5 rb5 si)
-+)
-+(dnmi scw2 "scw2"
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ "scw $rt5,[$ra5+$rb5]"
-+ (emit scw rt5 ra5 rb5 (f-32t3-sub10si 0))
-+)
-+
-+(dni j "jump with disp24"
-+ (UNCOND-CTI (IDOC BR))
-+ "j $disp24"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_JI JI_SUB1_J disp24)
-+ (sequence ()
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID "if (pc == CPU(h_ar_le)) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID "if (pc == current_cpu->h_ar_le_get()) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != CPU(h_ar_lc))) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != current_cpu->h_ar_lc_get())) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID " PUT_H_SR_FLD(ITYPE,SUBTYPE,AUDIO_ZOL_ERR);\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP;\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID " goto J_interruption;\n")
-+ (c-code VOID " } \n")
-+ (c-code VOID "} \n")
-+ (c-code VOID " IFC_EPT_CHECK(current_cpu);\n")
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto J_interruption;\n")
-+
-+ (set pc disp24)
-+ )
-+ (
-+ (n1hm (unit u-cti))
-+ )
-+)
-+
-+(dni jal "jump and link with disp24"
-+ (UNCOND-CTI (IDOC BR))
-+ "jal $disp24"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_JI JI_SUB1_JAL disp24)
-+ (sequence ()
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID "if (pc == CPU(h_ar_le)) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID "if (pc == current_cpu->h_ar_le_get()) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != CPU(h_ar_lc))) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != current_cpu->h_ar_lc_get())) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID " PUT_H_SR_FLD(ITYPE,SUBTYPE,AUDIO_ZOL_ERR);\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP;\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID " goto JAL_interruption;\n")
-+ (c-code VOID " } \n")
-+ (c-code VOID "} \n")
-+ (c-code VOID " IFC_EPT_CHECK(current_cpu);\n")
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto JAL_interruption;\n")
-+
-+ (parallel ()
-+ (set (reg h-gr (c-code SI "H_GR_LP")) (add pc (const 4)))
-+ (set pc disp24)
-+ )
-+ )
-+ (
-+ (n1hm (unit u-cti))
-+ )
-+)
-+
-+(dni jr "jump with register"
-+ (UNCOND-CTI (IDOC BR))
-+ "jr $rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_JR RES10_7_0 rb5 SUB10D_NO_IDT SUB10G_JR JR_SUB10C0_JR)
-+;FIXME, this is temporary patch for EEMBC
-+
-+ (sequence ()
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID "if (pc == CPU(h_ar_le)) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID "if (pc == current_cpu->h_ar_le_get()) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != CPU(h_ar_lc))) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != current_cpu->h_ar_lc_get())) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID " PUT_H_SR_FLD(ITYPE,SUBTYPE,AUDIO_ZOL_ERR);\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP;\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID " goto JR_interruption;\n")
-+ (c-code VOID " } \n")
-+ (c-code VOID "} \n")
-+
-+ (c-code VOID " if(TEST_H_SR_FLD(MSC_CFG,IFC) && TEST_IFC_CTL_ON()) {\n")
-+ (c-code VOID " CLR_IFC_CTL_ON();\n")
-+
-+ (c-code VOID " #if (WITH_TRACE_DEBUG_P)\n")
-+ (c-code VOID " if (TRACE_DEBUG_P(current_cpu)) {\n")
-+ (c-code VOID " register int trace_ctl;\n")
-+ (c-code VOID " trace_ctl = 0;\n")
-+ (c-code VOID " if (TRACE_PC(current_cpu)) {\n")
-+ (c-code VOID " if ((TRACE_PC_START(current_cpu) <= pc) && (pc <= TRACE_PC_END(current_cpu))) {\n")
-+ (c-code VOID " trace_ctl = 1;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " } else if (TRACE_CYCLE(current_cpu)) {\n")
-+ (c-code VOID " if ((TRACE_CYCLE_START(current_cpu) <= TOTAL_CYCLE(current_cpu)) && (TOTAL_CYCLE(current_cpu) <= TRACE_CYCLE_END(current_cpu))) {\n")
-+ (c-code VOID " trace_ctl = 1;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " } else {\n")
-+ (c-code VOID " trace_ctl = 1;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " if (trace_ctl) {\n")
-+ (c-code VOID " CPU_PUSH_UPDATE_PAIR_USR(current_cpu, 29, H_IFC_CTL());\n")
-+ (c-code VOID " printf(\"pc=0x%08x regWr(ifc_ctl)=0x%08x (jr)\\n\",GET_H_PC(), H_IFC_CTL());\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " #endif\n")
-+
-+ (c-code VOID " } \n")
-+ (if (eq (and rb5 (const #xfff00000)) (const #xbfc00000))
-+ (sequence ()
-+ (c-code VOID " if (STATE_ENVIRONMENT (CPU_STATE (current_cpu))==USER_MIPS_ENVIRONMENT) {\n")
-+ (set SI (mem SI (reg h-gr 4)) (c-code USI "NDS32_MALLOC_SIZE"))
-+ (set SI (mem SI (add (reg h-gr 4) 4)) (const #x0))
-+ (set SI (mem SI (add (reg h-gr 4) 8)) (const #x0))
-+ (set pc (reg h-gr (c-code SI "H_GR_LP")))
-+ (c-code VOID "} else {\n")
-+ (set pc rb5)
-+ (c-code VOID "}\n")
-+ )
-+ (set pc rb5)
-+ )
-+ )
-+ (baseline (unit u-cti))
-+)
-+
-+(dni ret "return with register"
-+ (UNCOND-CTI (IDOC BR))
-+ "ret $rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_JR RES10_7_0 rb5 SUB10D_NO_IDT SUB10G_RET JR_SUB10C0_JR)
-+ (sequence ()
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID "if (pc == CPU(h_ar_le)) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID "if (pc == current_cpu->h_ar_le_get()) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != CPU(h_ar_lc))) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != current_cpu->h_ar_lc_get())) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID " PUT_H_SR_FLD(ITYPE,SUBTYPE,AUDIO_ZOL_ERR);\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP;\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID " goto RET_interruption;\n")
-+ (c-code VOID " } \n")
-+ (c-code VOID "} \n")
-+ (c-code VOID " if(TEST_H_SR_FLD(MSC_CFG,IFC) && TEST_IFC_CTL_ON()) {\n")
-+ (c-code VOID " CLR_IFC_CTL_ON();\n")
-+
-+ (c-code VOID " #if (WITH_TRACE_DEBUG_P)\n")
-+ (c-code VOID " if (TRACE_DEBUG_P(current_cpu)) {\n")
-+ (c-code VOID " register int trace_ctl;\n")
-+ (c-code VOID " trace_ctl = 0;\n")
-+ (c-code VOID " if (TRACE_PC(current_cpu)) {\n")
-+ (c-code VOID " if ((TRACE_PC_START(current_cpu) <= pc) && (pc <= TRACE_PC_END(current_cpu))) {\n")
-+ (c-code VOID " trace_ctl = 1;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " } else if (TRACE_CYCLE(current_cpu)) {\n")
-+ (c-code VOID " if ((TRACE_CYCLE_START(current_cpu) <= TOTAL_CYCLE(current_cpu)) && (TOTAL_CYCLE(current_cpu) <= TRACE_CYCLE_END(current_cpu))) {\n")
-+ (c-code VOID " trace_ctl = 1;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " } else {\n")
-+ (c-code VOID " trace_ctl = 1;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " if (trace_ctl) {\n")
-+ (c-code VOID " CPU_PUSH_UPDATE_PAIR_USR(current_cpu, 29, H_IFC_CTL());\n")
-+ (c-code VOID " printf(\"pc=0x%08x regWr(ifc_ctl)=0x%08x (ret)\\n\",GET_H_PC(), H_IFC_CTL());\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " #endif\n")
-+
-+ (c-code VOID " } \n")
-+ (set pc rb5)
-+ )
-+(baseline (unit u-cti))
-+)
-+
-+(dnmi ret2 "ret2"
-+ (NO-DIS UNCOND-CTI (IDOC BR))
-+ "ret"
-+ (emit ret (f-32-rb5 30))
-+)
-+
-+(define-pmacro (jr-idt-op mnemonic idt on-off)
-+ (dni (.sym mnemonic "." idt on-off) (.str mnemonic " with " idt " turned " on-off)
-+ (UNCOND-CTI (IDOC BR))
-+ (.str mnemonic "." idt on-off " $rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_JR RES10_7_0 rb5 (.sym "SUB10D_" (.upcase idt)) (.sym "SUB10G_" (.upcase mnemonic)) (.sym "JR_SUB10C0_" (.upcase mnemonic)))
-+ (sequence ()
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID "if (pc == CPU(h_ar_le)) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID "if (pc == current_cpu->h_ar_le_get()) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != CPU(h_ar_lc))) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != current_cpu->h_ar_lc_get())) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID " PUT_H_SR_FLD(ITYPE,SUBTYPE,AUDIO_ZOL_ERR);\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP;\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID (.str "\t goto "(.upcase mnemonic) "_" (.upcase idt) (.upcase on-off)"_interruption;\n"))
-+ (c-code VOID " } \n")
-+ (c-code VOID "} \n")
-+ (c-code VOID " if(TEST_H_SR_FLD(MSC_CFG,IFC) && TEST_IFC_CTL_ON()) {\n")
-+ (c-code VOID " CLR_IFC_CTL_ON();\n")
-+
-+ (c-code VOID " #if (WITH_TRACE_DEBUG_P)\n")
-+ (c-code VOID " if (TRACE_DEBUG_P(current_cpu)) {\n")
-+ (c-code VOID " register int trace_ctl;\n")
-+ (c-code VOID " trace_ctl = 0;\n")
-+ (c-code VOID " if (TRACE_PC(current_cpu)) {\n")
-+ (c-code VOID " if ((TRACE_PC_START(current_cpu) <= pc) && (pc <= TRACE_PC_END(current_cpu))) {\n")
-+ (c-code VOID " trace_ctl = 1;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " } else if (TRACE_CYCLE(current_cpu)) {\n")
-+ (c-code VOID " if ((TRACE_CYCLE_START(current_cpu) <= TOTAL_CYCLE(current_cpu)) && (TOTAL_CYCLE(current_cpu) <= TRACE_CYCLE_END(current_cpu))) {\n")
-+ (c-code VOID " trace_ctl = 1;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " } else {\n")
-+ (c-code VOID " trace_ctl = 1;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " if (trace_ctl) {\n")
-+ (c-code VOID " CPU_PUSH_UPDATE_PAIR_USR(current_cpu, 29, H_IFC_CTL());\n")
-+ (c-code VOID (.str " printf(\"pc=0x%08x regWr(ifc_ctl)=0x%08x (" mnemonic "." idt on-off ")\\n\",GET_H_PC(), H_IFC_CTL());\n"))
-+ (c-code VOID " }\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " #endif\n")
-+
-+ (c-code VOID " } \n")
-+
-+ (set (reg h-sr (c-code SI "H_SR_PSW")) (c-raw-call USI (.str "RHS_PSW_" (.upcase idt) "_" (.upcase on-off))))
-+ (set pc rb5)
-+ )
-+ (baseline (unit u-cti))
-+ )
-+)
-+(jr-idt-op jr it off)
-+(jr-idt-op jr t off)
-+(jr-idt-op ret it off)
-+(jr-idt-op ret t off)
-+
-+(dni jral "jump and link with register"
-+ (UNCOND-CTI (IDOC BR))
-+ "jral $rt5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_JR rt5 RES5_12_0 rb5 SUB10D_0 SUB10G_JRAL JR_SUB10C0_JRAL)
-+ (sequence ((USI addr))
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID "if (pc == CPU(h_ar_le)) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID "if (pc == current_cpu->h_ar_le_get()) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != CPU(h_ar_lc))) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != current_cpu->h_ar_lc_get())) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID " PUT_H_SR_FLD(ITYPE,SUBTYPE,AUDIO_ZOL_ERR);\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP;\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID (.str "\t goto JRAL_interruption;\n"))
-+ (c-code VOID " } \n")
-+ (c-code VOID "} \n")
-+
-+ (c-code VOID " if(TEST_H_SR_FLD(MSC_CFG,IFC) && TEST_IFC_CTL_ON()) {\n")
-+ (c-code VOID " tmp_addr = GET_IFC_CTL_LP() << 1;\n")
-+ (c-code VOID " CLR_IFC_CTL_ON();\n")
-+
-+ (c-code VOID " #if (WITH_TRACE_DEBUG_P)\n")
-+ (c-code VOID " if (TRACE_DEBUG_P(current_cpu)) {\n")
-+ (c-code VOID " register int trace_ctl;\n")
-+ (c-code VOID " trace_ctl = 0;\n")
-+ (c-code VOID " if (TRACE_PC(current_cpu)) {\n")
-+ (c-code VOID " if ((TRACE_PC_START(current_cpu) <= pc) && (pc <= TRACE_PC_END(current_cpu))) {\n")
-+ (c-code VOID " trace_ctl = 1;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " } else if (TRACE_CYCLE(current_cpu)) {\n")
-+ (c-code VOID " if ((TRACE_CYCLE_START(current_cpu) <= TOTAL_CYCLE(current_cpu)) && (TOTAL_CYCLE(current_cpu) <= TRACE_CYCLE_END(current_cpu))) {\n")
-+ (c-code VOID " trace_ctl = 1;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " } else {\n")
-+ (c-code VOID " trace_ctl = 1;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " if (trace_ctl) {\n")
-+ (c-code VOID " CPU_PUSH_UPDATE_PAIR_USR(current_cpu, 29, H_IFC_CTL());\n")
-+ (c-code VOID " printf(\"pc=0x%08x regWr(ifc_ctl)=0x%08x (jral)\\n\",GET_H_PC(), H_IFC_CTL());\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " #endif\n")
-+
-+ (c-code VOID " } \n")
-+ (c-code VOID " else { \n")
-+ (set addr (add pc (const 4)))
-+ (c-code VOID " } \n")
-+
-+ (parallel ()
-+ (set rt5 addr)
-+ (set pc rb5)
-+ )
-+
-+ )
-+(baseline (unit u-cti))
-+)
-+(dnmi jral2 "jral2"
-+ (NO-DIS UNCOND-CTI (IDOC BR))
-+ "jral $rb5"
-+ (emit jral (f-32-rt5 30) rb5)
-+)
-+
-+(define-pmacro (jral-idt-op mnemonic idt on-off)
-+ (begin
-+ (dni (.sym mnemonic "." idt on-off) (.str mnemonic " with " idt " turned " on-off)
-+ (UNCOND-CTI (IDOC BR))
-+ (.str mnemonic "." idt on-off " $rt5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_JR rt5 RES5_12_0 rb5 (.sym "SUB10D_" (.upcase idt)) (.sym "SUB10G_" (.upcase mnemonic)) (.sym "JR_SUB10C0_" (.upcase mnemonic)))
-+ (sequence ((USI addr))
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID "if (pc == CPU(h_ar_le)) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID "if (pc == current_cpu->h_ar_le_get()) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != CPU(h_ar_lc))) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != current_cpu->h_ar_lc_get())) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID " PUT_H_SR_FLD(ITYPE,SUBTYPE,AUDIO_ZOL_ERR);\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP;\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID (.str "\t goto " (.upcase mnemonic) "_" (.upcase idt) (.upcase on-off) "_interruption;\n"))
-+ (c-code VOID " } \n")
-+ (c-code VOID "} \n")
-+
-+ (c-code VOID " if(TEST_H_SR_FLD(MSC_CFG,IFC) && TEST_IFC_CTL_ON()) {\n")
-+ (c-code VOID " tmp_addr = GET_IFC_CTL_LP() << 1;\n")
-+ (c-code VOID " CLR_IFC_CTL_ON();\n")
-+
-+ (c-code VOID " #if (WITH_TRACE_DEBUG_P)\n")
-+ (c-code VOID " if (TRACE_DEBUG_P(current_cpu)) {\n")
-+ (c-code VOID " register int trace_ctl;\n")
-+ (c-code VOID " trace_ctl = 0;\n")
-+ (c-code VOID " if (TRACE_PC(current_cpu)) {\n")
-+ (c-code VOID " if ((TRACE_PC_START(current_cpu) <= pc) && (pc <= TRACE_PC_END(current_cpu))) {\n")
-+ (c-code VOID " trace_ctl = 1;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " } else if (TRACE_CYCLE(current_cpu)) {\n")
-+ (c-code VOID " if ((TRACE_CYCLE_START(current_cpu) <= TOTAL_CYCLE(current_cpu)) && (TOTAL_CYCLE(current_cpu) <= TRACE_CYCLE_END(current_cpu))) {\n")
-+ (c-code VOID " trace_ctl = 1;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " } else {\n")
-+ (c-code VOID " trace_ctl = 1;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " if (trace_ctl) {\n")
-+ (c-code VOID " CPU_PUSH_UPDATE_PAIR_USR(current_cpu, 29, H_IFC_CTL());\n")
-+ (c-code VOID (.str " printf(\"pc=0x%08x regWr(ifc_ctl)=0x%08x (" mnemonic "." idt on-off ")\\n\",GET_H_PC(), H_IFC_CTL());\n"))
-+ (c-code VOID " }\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " #endif\n")
-+
-+ (c-code VOID " } \n")
-+ (c-code VOID " else { \n")
-+ (set addr (add pc (const 4)))
-+ (c-code VOID " } \n")
-+
-+ (parallel ()
-+ (set (reg h-sr (c-code SI "H_SR_PSW")) (c-raw-call USI (.str "RHS_PSW_" (.upcase idt) "_" (.upcase on-off))))
-+ (set rt5 addr)
-+ (set pc rb5)
-+ )
-+ )
-+ (baseline (unit u-cti))
-+ )
-+ (dnmi (.sym mnemonic "." idt on-off "2") (.str mnemonic " with " idt " turned " on-off)
-+ (NO-DIS UNCOND-CTI (IDOC BR))
-+ (.str mnemonic "." idt on-off " $rb5")
-+ (emit (.sym mnemonic "." idt on-off) (f-32-rt5 30) rb5)
-+ )
-+ )
-+)
-+(jral-idt-op jral it on)
-+(jral-idt-op jral t on)
-+
-+(define-pmacro (ebranch-op suffix comp-op)
-+ (begin
-+ (dni (.sym b suffix) (.str "b" suffix)
-+ (COND-CTI (IDOC BR))
-+ (.str "b" suffix " $rt5,$ra5,$disp14")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_BR1 rt5 ra5 (.sym "BR1_SUB1_B" (.upcase suffix)) disp14)
-+ (sequence ()
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID "if (pc == CPU(h_ar_le)) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID "if (pc == current_cpu->h_ar_le_get()) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != CPU(h_ar_lc))) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != current_cpu->h_ar_lc_get())) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID " PUT_H_SR_FLD(ITYPE,SUBTYPE,AUDIO_ZOL_ERR);\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP;\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID (.str "\t goto B" (.upcase suffix) "_interruption;\n"))
-+ (c-code VOID " } \n")
-+ (c-code VOID "} \n")
-+ (c-code VOID " IFC_EPT_CHECK(current_cpu);\n")
-+ (c-code VOID (.str " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto B" (.upcase suffix) "_interruption;\n"))
-+ (if (comp-op SI rt5 ra5) (set pc disp14))
-+ )
-+ (
-+ (n1hm (unit u-cti) (unit u-cmp (cycles 0)))
-+ )
-+ )
-+ )
-+)
-+(ebranch-op eq eq)
-+(ebranch-op ne ne)
-+
-+(define-pmacro (zbranch-op suffix comp-op)
-+ (begin
-+ (dni (.sym b suffix z) (.str "b" suffix "z")
-+ (COND-CTI (IDOC BR))
-+ (.str "b" suffix "z $rt5,$disp16")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_BR2 rt5 (.sym "BR2_SUB4_B" (.upcase suffix) "Z") disp16)
-+ (sequence ()
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID "if (pc == CPU(h_ar_le)) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID "if (pc == current_cpu->h_ar_le_get()) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != CPU(h_ar_lc))) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != current_cpu->h_ar_lc_get())) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID " PUT_H_SR_FLD(ITYPE,SUBTYPE,AUDIO_ZOL_ERR);\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP;\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID (.str "\t goto B" (.upcase suffix) "Z_interruption;\n"))
-+ (c-code VOID " } \n")
-+ (c-code VOID "} \n")
-+ (c-code VOID " IFC_EPT_CHECK(current_cpu);\n")
-+ (c-code VOID (.str " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto B" (.upcase suffix) "Z_interruption;\n"))
-+ (if (comp-op SI rt5 (const SI 0)) (set pc disp16))
-+ )
-+ (
-+ (n1hm (unit u-cti) (unit u-cmp (cycles 0)))
-+ )
-+ )
-+ )
-+)
-+(zbranch-op eq eq)
-+(zbranch-op ne ne)
-+(zbranch-op ge ge)
-+(zbranch-op lt lt)
-+(zbranch-op gt gt)
-+(zbranch-op le le)
-+
-+(define-pmacro (zbranchal-op suffix comp-op)
-+ (begin
-+ (dni (.sym b suffix "zal") (.str "b" suffix "zal")
-+ (COND-CTI (IDOC BR))
-+ (.str "b" suffix "zal $rt5,$disp16")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_BR2 rt5 (.sym "BR2_SUB4_B" (.upcase suffix) "ZAL") disp16)
-+
-+ (sequence ()
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID "if (pc == CPU(h_ar_le)) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID "if (pc == current_cpu->h_ar_le_get()) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != CPU(h_ar_lc))) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != current_cpu->h_ar_lc_get())) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID " PUT_H_SR_FLD(ITYPE,SUBTYPE,AUDIO_ZOL_ERR);\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP;\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID (.str "\t goto B" (.upcase suffix) "ZAL_interruption;\n"))
-+ (c-code VOID " } \n")
-+ (c-code VOID "} \n")
-+ (c-code VOID " IFC_EPT_CHECK(current_cpu);\n")
-+ (c-code VOID (.str " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto B" (.upcase suffix) "ZAL_interruption;\n"))
-+
-+ (if (comp-op SI rt5 (const SI 0))
-+ (parallel ()
-+ (set (reg h-gr (c-code SI "H_GR_LP")) (add pc (const 4)))
-+ (set pc disp16)
-+ )
-+ (set (reg h-gr (c-code SI "H_GR_LP")) (add pc (const 4)))
-+ )
-+ )
-+ (
-+ (n1hm (unit u-cti) (unit u-cmp (cycles 0)))
-+ )
-+ )
-+ )
-+)
-+(zbranchal-op ge ge)
-+(zbranchal-op lt lt)
-+
-+(dni mfsr "move from system register"
-+ ((PIPE S) (IDOC ALU))
-+ "mfsr $rt5,$sr10"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC rt5 sr10 MISC_EXT5_0 MISC_SUB5_MFSR)
-+ (sequence ()
-+ (set rt5 sr10)
-+ )
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+(dni mtsr "move to system register"
-+ ((PIPE S) (IDOC ALU))
-+ "mtsr $rt5,$sr10"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC rt5 sr10 MTSR_EXT5_BASE MISC_SUB5_MTSR)
-+ (sequence ()
-+ (set sr10 rt5)
-+ )
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+(define-pmacro (setend-op suffix sem-op)
-+ (begin
-+ (dni (.sym "setend." suffix) (.str "set endian bit in PSW to " (.upcase suffix))
-+ ((PIPE S) (IDOC ALU))
-+ (.str "setend." suffix)
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC (.sym "SETEND_" (.upcase suffix)) SR10_IR_PSW MTSR_EXT5_SETEND MISC_SUB5_MTSR)
-+ (set (reg h-sr (c-code SI "H_SR_PSW")) (c-raw-call USI (.str "RHS_" sem-op "_PSW_BE")))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+ )
-+ )
-+)
-+(setend-op l CLR)
-+(setend-op b SET)
-+
-+(define-pmacro (setgie-op suffix sem-op)
-+ (begin
-+ (dni (.sym "setgie." suffix) (.str "set GIE bit in PSW to " (.upcase suffix))
-+ ((PIPE S) (IDOC ALU))
-+ (.str "setgie." suffix)
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC (.sym "SETGIE_" (.upcase suffix)) SR10_IR_PSW MTSR_EXT5_SETGIE MISC_SUB5_MTSR)
-+ (set (reg h-sr (c-code SI "H_SR_PSW")) (c-raw-call USI (.str "RHS_" sem-op "_PSW_GIE")))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+ )
-+ )
-+)
-+(setgie-op d CLR)
-+(setgie-op e SET)
-+
-+(dni cmovz "cmovz"
-+ ((PIPE OS) (IDOC ALU))
-+ "cmovz $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_3 ALU_1_SUB10C3_CMOVZ)
-+ (if (eq rb5 (const SI 0)) (set rt5 ra5))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+)
-+
-+(dni cmovn "cmovn"
-+ ((PIPE OS) (IDOC ALU))
-+ "cmovn $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_3 ALU_1_SUB10C3_CMOVN)
-+ (if (ne rb5 (const SI 0)) (set rt5 ra5))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+)
-+
-+(define-pmacro (dprefi-op suffix)
-+ (begin
-+ (dni (.sym "dprefi." suffix) (.str "dprefi." suffix)
-+ ((PIPE O) (IDOC MEM))
-+ (.str "dprefi." suffix " $dprefst,[$ra5+$slo15" suffix "]")
-+ (+ IFMT_32 OPC6G_2 OPC6C2_DPREFI (.sym "DPREF_SUB1_" (.upcase suffix)) dprefst ra5 (.sym "slo15" suffix))
-+ (sequence ()
-+ (c-call VOID " nds32_dpref_decode" pc dprefst)
-+ (c-code VOID (.str " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto DPREFI_" (.upcase suffix) "_interruption;\n"))
-+ (c-code VOID "USI temp,temp1;\n")
-+ (c-code VOID "temp = H_SR_REG(MMU_CFG);\n")
-+ (c-code VOID "temp1 = H_SR_REG(TLB_VPN);\n")
-+ (c-code VOID "CLR_H_SR_FLD(MMU_CFG,HPTWK);\n")
-+ (if (eq (mem (.sym (.upcase suffix) "I") (add ra5 (.sym "slo15" suffix))) (const 0)) (nop) (nop))
-+ (c-code VOID "H_SR_REG(MMU_CFG) = temp;\n")
-+ (c-code VOID "H_SR_REG(TLB_VPN) = temp1;\n")
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ )
-+ (dnmi (.sym "dprefi." suffix "2") (.str "dprefi." suffix "2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "dprefi." suffix " $dprefst,[$ra5]")
-+ (emit (.sym "dprefi." suffix) dprefst ra5 ((.sym "f-32t2-slo15" suffix) 0))
-+ )
-+ )
-+)
-+(dprefi-op d)
-+(dprefi-op w)
-+
-+(dni dpref "dpref"
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ "dpref $dprefst,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM DPREF_SUB1_W dprefst ra5 rb5 SUB10DSI_0 si SUB10G_2 MEM_SUB10C2_DPREF)
-+ (sequence ()
-+ (c-call VOID " nds32_dpref_decode" pc dprefst)
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto DPREF_interruption;\n")
-+ (c-code VOID "USI temp,temp1;\n")
-+ (c-code VOID "temp = H_SR_REG(MMU_CFG);\n")
-+ (c-code VOID "temp1 = H_SR_REG(TLB_VPN);\n")
-+ (c-code VOID "CLR_H_SR_FLD(MMU_CFG,HPTWK);\n")
-+ (if (eq (mem DI (add ra5 (sll rb5 si))) (const 0)) (nop) (nop))
-+ (c-code VOID "H_SR_REG(MMU_CFG) = temp;\n")
-+ (c-code VOID "H_SR_REG(TLB_VPN) = temp1;\n")
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+)
-+(dnmi dpref1 "dpref1"
-+ ((PIPE O) (IDOC MEM))
-+ "dpref $dprefst,[$ra5+($rb5<<$si)]"
-+ (emit dpref dprefst ra5 rb5 si)
-+)
-+(dnmi dpref2 "dpref2"
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ "dpref $dprefst,[$ra5+$rb5]"
-+ (emit dpref dprefst ra5 rb5 (f-32t3-sub10si 0))
-+)
-+(dnmi dpref3 "dpref3"
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ "dpref $dprefst,[$ra5]"
-+ (emit dprefi.w dprefst ra5 (f-32t2-slo15w 0))
-+)
-+
-+(dni isync "isync"
-+ (UNCOND-CTI (PIPE OS) (IDOC MISC))
-+ "isync $rt5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC rt5 RES10_12_0 MISC_EXT5_0 MISC_SUB5_ISYNC)
-+ (sequence ()
-+ (c-call VOID " nds32_isync_handler" pc rt5)
-+ (set pc (add pc 4))
-+ )
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+(dni msync "msync"
-+ ((PIPE OS) (IDOC MISC))
-+ "msync $msyncst"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC RES5_7_0 RES12_12_0 msyncst MISC_SUB5_MSYNC)
-+ (sequence ()
-+ (c-call VOID " nds32_msync_handler" pc msyncst)
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto MSYNC_interruption;\n")
-+ )
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+(dnmi msync2 "msync2"
-+ (NO-DIS (PIPE OS) (IDOC MISC))
-+ "msync"
-+ (emit msync (f-32t3-ext3 0))
-+)
-+
-+(dni isb "isb"
-+ ((PIPE OS) (IDOC MISC) UNCOND-CTI)
-+ "isb"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC RES5_7_0 RES15_0 MISC_SUB5_ISB)
-+ (sequence ()
-+ (c-call VOID " nds32_isb_handler" pc)
-+ (set pc (add pc 4))
-+ )
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+(dni dsb "dsb"
-+ ((PIPE OS) (IDOC MISC))
-+ "dsb"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC RES5_7_0 RES15_0 MISC_SUB5_DSB)
-+ (nop)
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+(dni standby "standby"
-+ (UNCOND-CTI (PIPE OS) (IDOC MISC))
-+ "standby $standbyst"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC RES5_7_0 RES10_12_0 RES3_22_0 standbyst MISC_SUB5_STANDBY)
-+ (sequence ((USI valid_value))
-+ (c-code VOID "if (N1213_43U1HA0(current_cpu) || N1213_43U1HB0(current_cpu)) { \n")
-+ (set valid_value (const 1))
-+ (c-code VOID "} else { \n")
-+ (set valid_value (const 2))
-+ (c-code VOID "}\n")
-+ (if VOID (leu USI standbyst valid_value)
-+ (sequence ()
-+ (set pc (add pc 4))
-+ (c-code VOID "if ((STATE_ENVIRONMENT(CPU_STATE(current_cpu))==USER_ENVIRONMENT)||(STATE_ENVIRONMENT(CPU_STATE(current_cpu))==OPERATING_ENVIRONMENT)) {\n")
-+ (c-code VOID " /*\n")
-+ (c-code VOID " * cpu enters standby mode and stop SID scheduler to schedule \n")
-+ (c-code VOID " * cpu component\n")
-+ (c-code VOID " */\n")
-+ (c-code VOID " current_cpu->yield();\n")
-+ (c-code VOID " SET_STANDBY_MODE(current_cpu);\n")
-+ (c-code VOID "}\n")
-+ )
-+ (sequence ()
-+ (c-code VOID "if ((STATE_ENVIRONMENT (CPU_STATE (current_cpu))==OPERATING_ENVIRONMENT) ||\n")
-+ (c-code VOID " (STATE_ENVIRONMENT (CPU_STATE (current_cpu))==OPERATING_VERIFY_ENVIRONMENT)) {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED;\n")
-+ (c-code VOID " goto STANDBY_interruption;\n")
-+ (c-code VOID "}\n"))))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+(dni trap "trap"
-+ (UNCOND-CTI (IDOC MISC))
-+ "trap $swid15"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC RES5_7_0 swid15 MISC_SUB5_TRAP)
-+ (sequence ()
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID "if (pc == CPU(h_ar_le)) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID "if (pc == current_cpu->h_ar_le_get()) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != CPU(h_ar_lc))) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != current_cpu->h_ar_lc_get())) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID " PUT_H_SR_FLD(ITYPE,SUBTYPE,AUDIO_ZOL_ERR);\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP;\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID (.str "\t goto TRAP_interruption;\n"))
-+ (c-code VOID " } \n")
-+ (c-code VOID "} \n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_TRAP;\n")
-+ (set pc (c-call USI " nds32_interruption_handler" pc pc (enum SI E_INT_VEC_GE) (enum SI E_EETYPE_TRAP) swid15))
-+ )
-+ (
-+ (n1hm (unit u-exec (cycles 0)))
-+ )
-+)
-+(dnmi trap2 "trap2"
-+ (NO-DIS UNCOND-CTI (IDOC MISC))
-+ "trap"
-+ (emit trap (f-32t3-swid15 0))
-+)
-+
-+(define-pmacro (trapz-op prefix)
-+ (begin
-+ (dni (.sym "t" prefix "z") (.str "t" prefix "z")
-+ (COND-CTI (IDOC MISC))
-+ (.str "t" prefix "z $rt5,$swid15")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC rt5 swid15 (.sym "MISC_SUB5_T" (.upcase prefix) "Z"))
-+ ;FIXME
-+ (sequence ()
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID "if (pc == CPU(h_ar_le)) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID "if (pc == current_cpu->h_ar_le_get()) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != CPU(h_ar_lc))) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != current_cpu->h_ar_lc_get())) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID " PUT_H_SR_FLD(ITYPE,SUBTYPE,AUDIO_ZOL_ERR);\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP;\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID (.str "\t goto T" (.upcase prefix) "Z_interruption;\n"))
-+ (c-code VOID " } \n")
-+ (c-code VOID "} \n")
-+ (if (prefix rt5 0)
-+ (sequence ()
-+ (set pc (c-call USI " nds32_interruption_handler" pc pc (enum SI E_INT_VEC_GE) (enum SI E_EETYPE_TRAP) swid15))
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_TRAP;\n")
-+ )
-+ (nop)
-+ )
-+ )
-+ (
-+ (n1hm (unit u-exec (cycles 0)))
-+ )
-+ )
-+ (dnmi (.sym "t" prefix "z2") (.str "t" prefix "z2")
-+ (NO-DIS COND-CTI (IDOC MISC))
-+ (.str "t" prefix "z $rt5")
-+ (emit (.sym "t" prefix "z") rt5 (f-32t3-swid15 0))
-+ )
-+ )
-+)
-+(trapz-op eq)
-+(trapz-op ne)
-+
-+(dni break "break"
-+ (UNCOND-CTI (IDOC MISC))
-+ "break $swid15"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC RES5_7_0 swid15 MISC_SUB5_BREAK)
-+ ;FIXME
-+ (sequence ()
-+ (c-code VOID " if (STATE_ENVIRONMENT (CPU_STATE (current_cpu))==OPERATING_VERIFY_ENVIRONMENT) {\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_BREAK;\n")
-+ (set pc (c-call USI " nds32_interruption_handler" pc pc (enum SI E_INT_VEC_DEB) (enum SI E_EETYPE_BREAK) swid15))
-+ (c-code VOID "} else {\n")
-+ (c-code VOID "#ifndef SIM_ENV_GDB\n")
-+ (c-call VOID "flush_icache_all")
-+ (c-code VOID "#endif\n")
-+ (c-code VOID "sim_engine_halt (CPU_STATE(current_cpu), current_cpu, NULL, pc, sim_stopped, SIM_SIGTRAP);\n")
-+ (c-code VOID "}\n")
-+ )
-+ (
-+ (n1hm (unit u-exec (cycles 0)))
-+ )
-+)
-+(dnmi break2 "break2"
-+ (NO-DIS UNCOND-CTI (IDOC MISC))
-+ "break"
-+ (emit break (f-32t3-swid15 0))
-+)
-+
-+
-+(dni syscall "syscall"
-+ (UNCOND-CTI (IDOC MISC))
-+ "syscall $swid15"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC RES5_7_0 swid15 MISC_SUB5_SYSCALL)
-+ (sequence ()
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID "if (pc == CPU(h_ar_le)) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID "if (pc == current_cpu->h_ar_le_get()) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != CPU(h_ar_lc))) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != current_cpu->h_ar_lc_get())) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID " PUT_H_SR_FLD(ITYPE,SUBTYPE,AUDIO_ZOL_ERR);\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP;\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID (.str "\t goto SYSCALL_interruption;\n"))
-+ (c-code VOID " } \n")
-+ (c-code VOID "} \n")
-+
-+ (c-code VOID " //SYSCALL_TRACE_RESULT\n")
-+ (c-code VOID " if ((STATE_ENVIRONMENT (CPU_STATE (current_cpu))==OPERATING_ENVIRONMENT) || \n")
-+ (c-code VOID " (STATE_ENVIRONMENT (CPU_STATE (current_cpu))==OPERATING_DEBUG_ENVIRONMENT)) {\n")
-+ (c-code VOID "if (NESI (FLD(f_32t3_swid15),OS_STATISTICS)) { \n")
-+ (c-code VOID "if ((EQSI(FLD(f_32t3_swid15),SHUTDOWN_SYSCALL)) && (H_GR_REGI(2) == 0x89ABCDEF) && (SQA_MODE(current_cpu))) { \n")
-+ (c-code VOID " //SQA_SHUTDOWN_SYSCALL\n")
-+ (c-code VOID "} else { \n")
-+ (set pc (c-call USI " nds32_interruption_handler" pc pc (enum SI E_INT_VEC_SYSCALL) (enum SI E_EETYPE_SYSCALL) swid15))
-+ (c-code VOID "}\n")
-+ (c-code VOID "}\n")
-+ (c-code VOID "else if ((EQSI (FLD(f_32t3_swid15),OS_STATISTICS)) && (PERF_VERB(current_cpu))) { \n")
-+ (c-code VOID " //TOTAL_ICOUNT_IN_OS_STATISTICS\n")
-+ (c-code VOID " //TOTAL_CYCLE_IN_OS_STATISTICS\n")
-+ (c-code VOID " #ifdef WITH_MEMACCESS_INFO\n")
-+ (c-code VOID " //TOTAL_MEMACCESS_IN_OS_STATISTICS\n")
-+ (c-code VOID " #endif\n")
-+ (c-code VOID "}\n")
-+ (c-code VOID "} else if (STATE_ENVIRONMENT (CPU_STATE (current_cpu))==OPERATING_VERIFY_ENVIRONMENT) {\n")
-+ (c-code VOID "PUT_H_SR_FLD(ITYPE,SWID,FLD(f_32t3_swid15)); \n")
-+ (if (eq swid15 (const 6))
-+ (c-call VOID " nds32_linux_syscall" pc swid15)
-+ )
-+ (if (eq swid15 (const 7))
-+ (c-call VOID " nds32_linux_syscall" pc swid15)
-+ )
-+ (set pc (c-call USI " nds32_interruption_handler" pc pc (enum SI E_INT_VEC_SYSCALL) (enum SI E_EETYPE_SYSCALL) swid15))
-+ (c-code VOID "} else if (STATE_ENVIRONMENT (CPU_STATE (current_cpu))==USER_ENVIRONMENT) {\n")
-+ (c-code VOID "PUT_H_SR_FLD(ITYPE,SWID,FLD(f_32t3_swid15)); \n")
-+ (c-code VOID "if (NESI (FLD(f_32t3_swid15),OS_STATISTICS)) { \n")
-+
-+ (c-code VOID " SET_PROFILE_OFF(current_cpu);\n")
-+ (c-call VOID " nds32_libgloss_syscall" pc swid15)
-+ (c-code VOID " SET_PROFILE_ON(current_cpu);\n")
-+
-+ (c-code VOID "}\n")
-+ (c-code VOID "else if ((EQSI (FLD(f_32t3_swid15),OS_STATISTICS)) && (PERF_VERB(current_cpu))) { \n")
-+ (c-code VOID " //TOTAL_ICOUNT_IN_OS_STATISTICS\n")
-+ (c-code VOID " //TOTAL_CYCLE_IN_OS_STATISTICS\n")
-+ (c-code VOID " #ifdef WITH_MEMACCESS_INFO\n")
-+ (c-code VOID " //TOTAL_MEMACCESS_IN_OS_STATISTICS\n")
-+ (c-code VOID " #endif\n")
-+ (c-code VOID "}\n")
-+ (c-code VOID "} else if (STATE_ENVIRONMENT (CPU_STATE (current_cpu))==USER_MIPS_ENVIRONMENT) {\n")
-+ (c-code VOID "PUT_H_SR_FLD(ITYPE,SWID,FLD(f_32t3_swid15)); \n")
-+ (c-call VOID " nds32_linux_syscall" pc swid15)
-+ (c-code VOID "}\n")
-+ )
-+ (
-+ (n1hm (unit u-exec (cycles 0)))
-+ )
-+)
-+
-+(dni iret "iret"
-+ (UNCOND-CTI (IDOC MISC))
-+ "iret"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC RES5_7_0 RES15_0 MISC_SUB5_IRET)
-+ (sequence ()
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID "if (pc == CPU(h_ar_le)) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID "if (pc == current_cpu->h_ar_le_get()) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID "#ifdef SIM_ENV_GDB\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != CPU(h_ar_lc))) { \n")
-+ (c-code VOID "#else\n")
-+ (c-code VOID " if ((TEST_H_SR_FLD(PSW,AEN)) && (!INTL_IS_OVERFLOW()) && (0 != current_cpu->h_ar_lc_get())) { \n")
-+ (c-code VOID "#endif\n")
-+
-+ (c-code VOID " PUT_H_SR_FLD(ITYPE,SUBTYPE,AUDIO_ZOL_ERR);\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_COP;\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID (.str "\t goto IRET_interruption;\n"))
-+ (c-code VOID " } \n")
-+ (c-code VOID "} \n")
-+
-+ (c-code VOID " IFC_EPT_CHECK(current_cpu);\n")
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto IRET_interruption;\n")
-+
-+ (set pc (c-call USI " nds32_iret_handler" pc))
-+ (c-code VOID "#ifndef SIM_ENV_GDB\n")
-+ (c-code VOID " current_cpu->yield(); //yield at iret to support block io\n")
-+ (c-code VOID "#endif\n")
-+ )
-+ (
-+ (n1hm (unit u-cti))
-+ )
-+)
-+
-+(define-full-insn tlbop "tlbop"
-+ ((PIPE OS) (IDOC MISC) UNCOND-CTI)
-+ "tlbop $rt5,$ra5,$tlbopst"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC rt5 ra5 RES5_17_0 tlbopst MISC_SUB5_TLBOP)
-+ ()
-+ (sequence ()
-+ (c-call VOID " nds32_tlbop_handler" pc (index-of rt5) (index-of ra5) (index-of tlbopst))
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto TLBOP_interruption;\n")
-+ )
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+ ((print "insn-special1"))
-+)
-+(dnmi tlbop2 "tlbop2"
-+ (NO-DIS (PIPE OS) (IDOC MISC))
-+ "tlbop $ra5,$tlbopst"
-+ (emit tlbop (f-32-rt5 0) ra5 tlbopst)
-+)
-+(dnmi tlbop3 "tlbop3"
-+ (NO-DIS (PIPE OS) (IDOC MISC))
-+ "tlbop $tlbopst"
-+ (emit tlbop (f-32-rt5 0) (f-32-ra5 0) tlbopst)
-+)
-+
-+(define-full-insn cctl "cctl"
-+ ((PIPE OS) (IDOC MISC) UNCOND-CTI)
-+ "cctl $rt5,$ra5,$cctlst,$cctllvl"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_MISC rt5 ra5 RES4_17_0 cctllvl cctlst MISC_SUB5_CCTL)
-+ ()
-+ (sequence ()
-+ (c-call VOID " nds32_cctl_handler" pc (index-of rt5) (index-of ra5) (index-of cctlst) (index-of cctllvl))
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto CCTL_interruption;\n")
-+ )
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+ ((print "insn-special0"))
-+)
-+
-+(dnmi cctl1 "cctl1"
-+ (NO-DIS (PIPE OS) (IDOC MISC))
-+ "cctl $rt5,$ra5,$cctlst"
-+ (emit cctl rt5 ra5 cctlst (f-32tx-1_21 0))
-+)
-+(dnmi cctl2 "cctl2"
-+ (NO-DIS (PIPE OS) (IDOC MISC))
-+ "cctl $ra5,$cctlst"
-+ (emit cctl (f-32-rt5 0) ra5 cctlst (f-32tx-1_21 0))
-+)
-+(dnmi cctl3 "cctl3"
-+ (NO-DIS (PIPE OS) (IDOC MISC))
-+ "cctl $cctlst"
-+ (emit cctl (f-32-rt5 0) (f-32-ra5 0) cctlst (f-32tx-1_21 0))
-+)
-+
-+(dnmi cctl4 "cctl4"
-+ (NO-DIS (PIPE OS) (IDOC MISC))
-+ "cctl $ra5,$cctlst,$cctllvl"
-+ (emit cctl (f-32-rt5 0) ra5 cctlst cctllvl)
-+)
-+
-+(dnmi nop "nop"
-+ (NO-DIS (PIPE OS) (IDOC MISC))
-+ "nop"
-+ (emit srli (f-32-rt5 0) (f-32-ra5 0) (f-32t3-uimm5 0))
-+)
-+
-+(dni divs "divs"
-+ ((PIPE S) DIV (IDOC ALU) DX_REG DIV_DX)
-+ ("divs $rd1,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 RES3_7_0 rd1 RES1_11_0 ra5 rb5 SUB10D_0 SUB10G_5 ALU_2_SUB10C5_DIVS)
-+ (if VOID (c-code VOID "1 == GET_H_SR_FLD(MSC_CFG,NOD)")
-+ ;then
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tgoto DIVS_interruption;\n\n"))
-+
-+ ;else
-+ (if (ne USI rb5 #x0)
-+ ;then part
-+ (if (eq USI (and (eq USI ra5 (const #x80000000)) (eq USI rb5 (const #xffffffff))) (const #x1))
-+
-+ ;then part
-+ (sequence ()
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_ARITH;\n")
-+ (c-code VOID " goto DIVS_interruption;\n"))
-+
-+ ;else part
-+ (sequence ()
-+ (set rd1 (or DI
-+ (sll DI (zext DI ((.sym "mod") ra5 rb5)) (const 32))
-+ (zext DI (div ra5 rb5))))))
-+ ;else part
-+ (sequence ()
-+ (c-code VOID "if (!TEST_H_SR_FLD(INT_MASK,IDIVZE)){ \n")
-+ (set rd1 #x0)
-+ (c-code VOID "} else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_ARITH;\n")
-+ (c-code VOID " goto DIVS_interruption;\n")
-+ (c-code VOID "}\n"))))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+(dni div "div"
-+ ((PIPE S) DIV (IDOC ALU) DX_REG DIV_DX)
-+ ("div $rd1,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 RES3_7_0 rd1 RES1_11_0 ra5 rb5 SUB10D_0 SUB10G_5 ALU_2_SUB10C5_DIV)
-+ (if VOID (c-code VOID "1 == GET_H_SR_FLD(MSC_CFG,NOD)")
-+ ;then
-+ (sequence ()
-+ (c-code VOID "\tCPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_RESERVED; //set icode\n")
-+ (c-code VOID "\tCPU_INT_ARGS_IPC(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tCPU_INT_ARGS_EVA(current_cpu) = GET_H_PC();\n")
-+ (c-code VOID "\tgoto DIV_interruption;\n\n"))
-+
-+ ;else part
-+ (if (ne USI rb5 #x0)
-+ ;then part
-+ (set rd1 (or UDI
-+ (sll UDI (zext UDI (umod ra5 rb5)) (const 32))
-+ (zext UDI (udiv ra5 rb5))
-+ ))
-+ ;else part
-+ (sequence ()
-+ (c-code VOID "if (!TEST_H_SR_FLD(INT_MASK,IDIVZE)){ \n")
-+ (set rd1 #x0)
-+ (c-code VOID "} else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_ARITH;\n")
-+ (c-code VOID " goto DIV_interruption;\n")
-+ (c-code VOID "}\n"))))
-+ (
-+ (n1hm (unit u-exec (cycles 4)))
-+ )
-+)
-+
-+(include "nds32p.cpu"); performance extension instructions
-+(include "nds32p2.cpu"); performance 2 extension instructions
-+
-+(include "nds16.cpu") ; 16-bit instructions
-+(include "nds16v2.cpu") ; 16-bit instructions (baseline version2)
-+(include "nds16v3.cpu") ; 16-bit instructions (baseline version3)
-+(include "nds32v2.cpu") ; 32-bit instructions (baseline version2)
-+
-+(include "nds32pc.cpu") ; pseudo-code instructions
-+
-+(include "nds32a.cpu") ; extension instructions (audio)
-+(include "nds32f.cpu") ; extension instructions (floating-point)
-+(include "nds32s.cpu") ; extension instructions (string)
-+(include "nds32stat.cpu") ; extension instructions (saturation arithmetic)
-+(include "nds16ifc.cpu") ; extension instructions (16-bit inline function call)
-+(include "nds32ifc.cpu") ; extension instructions (32-bit inline function call)
-diff -Nur binutils-2.24.orig/cgen/cpu/nds32f.cpu binutils-2.24/cgen/cpu/nds32f.cpu
---- binutils-2.24.orig/cgen/cpu/nds32f.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds32f.cpu 2016-06-30 21:26:12.637892490 +0200
-@@ -0,0 +1,1370 @@
-+; ==============================================================================
-+; Andes NDS32 family CPU floating point extension -*- Scheme -*-
-+; Andes Technology Corporation
-+; ==============================================================================
-+
-+; ==============================================================================
-+; Instruction fields
-+; ==============================================================================
-+
-+; Physical fields
-+; ---------------
-+(dnf f-32tx-2_17 "2 bits from bit field 17" () 17 2)
-+(dnf f-32tx-3_17 "3 bits from bit field 17" () 17 3)
-+(dnf f-32tx-5_17 "5 bits from bit field 17" () 17 5)
-+(dnf f-32tx-1_19 "1 bit from bit field 19" () 19 1)
-+(dnf f-32tx-2_20 "2 bits from bit field 20" () 20 2)
-+(dnf f-32tx-12_20 "12 bits from bit field 20" () 20 12)
-+(dnf f-32tx-2_22 "2 bits from bit field 22" () 22 2)
-+(dnf f-32tx-3_22 "3 bits from bit field 22" () 22 3)
-+(dnf f-32tx-4_22 "4 bits from bit field 22" () 22 4)
-+(dnf f-32tx-1_24 "1 bit from bit field 24" () 24 1)
-+(dnf f-32tx-2_24 "2 bits from bit field 24" () 24 2)
-+(dnf f-32tx-2_26 "2 bits from bit field 26" () 26 2)
-+(dnf f-32tx-1_25 "1 bit from bit field 25" () 25 1)
-+(dnf f-32tx-2_28 "2 bits from bit field 28" () 28 2)
-+(dnf f-32tx-2_30 "2 bits from bit field 30" () 30 2)
-+(df f-32tx-slo12w "slo12w" () 20 12 INT
-+ ((value pc) (c-code SI "value; if (value&0x3) return BAD_WOFFSET; else value>>=2"))
-+ ((value pc) (sll SI value (const 2))))
-+(df f-32tx-slo12d "slo12d" () 20 12 INT
-+ ((value pc) (c-code SI "value; if (value&0x3) return BAD_WOFFSET; else value>>=2"))
-+ ((value pc) (sll SI value (const 2))))
-+
-+; ==============================================================================
-+; Instruction field enums
-+; ==============================================================================
-+; insn32-res1_25: reserved bit, bit 25 (1 bit)
-+(define-normal-insn-enum insn32-res1_25 "1-bit reserved field enums" () RES1_25_ f-32tx-1_25
-+ ("0")
-+)
-+
-+; insn32-sub1_25: sub code, bit 25 (1 bit)
-+(define-normal-insn-enum insn32-sub1_25 "1-bit sub code from bit field 25" () SUB1_25_ f-32tx-1_25
-+ ("0" "1")
-+)
-+
-+; insn32-sub3_22: sub code, bit 22 (3 bits)
-+(define-normal-insn-enum insn32-sub3_22 "3-bits sub code from bit field 22" () SUB3_22_ f-32tx-3_22
-+ ("EQ" "LT" "LE" "UN")
-+)
-+
-+; fpinsn-sub4-22: bits 22-25 (4 bits)
-+(define-normal-insn-enum fpinsn-sub4-22 "4-bits sub code enums for floating insn" () FP_SUB4_22_ f-32tx-4_22
-+ ( ("SR") ("DR") ("XR" #xc) )
-+)
-+
-+; fpinsn-sub5-17: bits 17-21 (5 bits)
-+(define-normal-insn-enum fpinsn-sub5-17 "5-bits sub code enums for floating insn" () FP_SUB5_17_ f-32tx-5_17
-+ ( ("CFG") ("CSR"))
-+)
-+
-+; fpu-sub1-24 : sub code, 1-bit code, bit 24 (1 bit)
-+(define-normal-insn-enum fpu-sub1-24 "1-bit subcode enums for floating point insn" () FPU_SUB1_24_ f-32tx-1_24
-+ ("0" "1")
-+)
-+
-+; fpu-sub1-19 : sub code, 1-bit code, bit 19 (1 bit)
-+(define-normal-insn-enum fpu-sub1-19 "1-bit subcode enums for floating point insn" () FPU_SUB1_19_ f-32tx-1_19
-+ ("0" "1")
-+)
-+
-+; f-32tx-2_26 : coprocessor number, bits 26-27 (2 bits)
-+(define-normal-insn-enum insn32-cop0-cp_26 "coprocessor enums" () COP_0_CP26_ f-32tx-2_26
-+ ("0" "1" "2" "3")
-+)
-+
-+; f-32tx-2_17 : coprocessor number, bits 17-18 (2 bits)
-+(define-normal-insn-enum insn32-cop0-cp_17 "coprocessor enums" () COP_0_CP17_ f-32tx-2_17
-+ ("0" "1" "2" "3")
-+)
-+
-+; f-32tx-2_28: cpe group, bits 28-29 (2 bits)
-+(define-normal-insn-enum COP_0_CPEG "cpe group enums" () COP_0_CPEG_ f-32tx-2_28
-+ ("0" "1" "2" "3")
-+)
-+
-+; f-32tx-2_30 : cpe code, bits 30-31 (2 bits)
-+(define-pmacro (cpec-op major group enum-list)
-+ (define-normal-insn-enum (.sym major group) (.str "cpe code enums in cpe group" group) () (.sym major group "_") f-32tx-2_30 enum-list)
-+)
-+(cpec-op COP_0_CPEG 0 ("FS1" "MFCP" "FLS" "FLD"))
-+(cpec-op COP_0_CPEG 1 ("FS2" "1" "2" "3"))
-+(cpec-op COP_0_CPEG 2 ("FD1" "MTCP" "FSS" "FSD"))
-+(cpec-op COP_0_CPEG 3 ("FD2" "1" "2" "3"))
-+
-+; f-32tx-2_22 : fs1 group, bits 22-23 (2 bits)
-+(define-normal-insn-enum COP_0_FS1G "fs1 group enums" () COP_0_FS1G_ f-32tx-2_22
-+ ("0" "1" "2" "3")
-+)
-+
-+; f-32tx-2_24 : fs1 code, bits 24-25 (2 bits)
-+(define-pmacro (fs1c-op major group enum-list)
-+ (define-normal-insn-enum (.sym major group) (.str "fs1 code enums in fs1 group" group) () (.sym major group "_") f-32tx-2_24 enum-list)
-+)
-+(fs1c-op COP_0_FS1G 0 ("FADDS" "FSUBS" "FCPYNSS" "FCPYSS"))
-+(fs1c-op COP_0_FS1G 1 ("FMADDS" "FMSUBS" "FCMOVNS" "FCMOVZS"))
-+(fs1c-op COP_0_FS1G 2 ("FNMADDS" "FNMSUBS" "2" "3"))
-+(fs1c-op COP_0_FS1G 3 ("FMULS" "FDIVS" "2" "F2OP"))
-+
-+; f-32tx-3_17 : fs1/f2op group, bits 17-19 (3 bits)
-+(define-normal-insn-enum COP_0_FS1_F2OPG "fs1/f2op group enums" () COP_0_FS1_F2OPG_ f-32tx-3_17
-+ ("0" "1" "2" "3" "4" "5" "6" "7")
-+)
-+
-+; f-32tx-2_20 : fs1_f2op code, bits 20-21 (1 bit)
-+(define-pmacro (fs1_f2opc-op major group enum-list)
-+ (define-normal-insn-enum (.sym major group) (.str "fs1/f2op code enums in fs1/f2op group" group) () (.sym major group "_") f-32tx-2_20 enum-list)
-+)
-+(fs1_f2opc-op COP_0_FS1_F2OPG 0 ("FS2D" "FSQRTS"))
-+(fs1_f2opc-op COP_0_FS1_F2OPG 1 ("0" "FABSS"))
-+(fs1_f2opc-op COP_0_FS1_F2OPG 2 ("FUI2S" "1"))
-+(fs1_f2opc-op COP_0_FS1_F2OPG 3 ("FSI2S" "1"))
-+(fs1_f2opc-op COP_0_FS1_F2OPG 4 ("FS2UI" "1"))
-+(fs1_f2opc-op COP_0_FS1_F2OPG 5 ("FS2UIZ" "1"))
-+(fs1_f2opc-op COP_0_FS1_F2OPG 6 ("FS2SI" "1"))
-+(fs1_f2opc-op COP_0_FS1_F2OPG 7 ("FS2SIZ" "1"))
-+
-+; f-32tx-3_22 : fs2 group, bits 22-24 (3 bits)
-+(define-normal-insn-enum COP_0_FS2G "fs2 group enums" () COP_0_FS2G_ f-32tx-3_22
-+ ("0" "1" "2" "3")
-+)
-+
-+; f-32tx-1_25 : fs2 code, bits 25 (1 bit)
-+(define-pmacro (fs2c-op major group enum-list)
-+ (define-normal-insn-enum (.sym major group) (.str "fs2 code enums in fs2 group" group) () (.sym major group "_") f-32tx-1_25 enum-list)
-+)
-+(fs2c-op COP_0_FS2G 0 ("FCMPEQS" "FCMPEQSE"))
-+(fs2c-op COP_0_FS2G 1 ("FCMPLTS" "FCMPLTSE"))
-+(fs2c-op COP_0_FS2G 2 ("FCMPLES" "FCMPLESE"))
-+(fs2c-op COP_0_FS2G 3 ("FCMPUNS" "FCMPUNSE"))
-+
-+; f-32tx-2_22 : fd1 group, bits 22-23 (2 bits)
-+(define-normal-insn-enum COP_0_FD1G "fd1 group enums" () COP_0_FD1G_ f-32tx-2_22
-+ ("0" "1" "2" "3")
-+)
-+
-+; f-32tx-2_24 : fd1 code, bits 24-25 (2 bits)
-+(define-pmacro (fd1c-op major group enum-list)
-+ (define-normal-insn-enum (.sym major group) (.str "fd1 code enums in fd1 group" group) () (.sym major group "_") f-32tx-2_24 enum-list)
-+)
-+(fd1c-op COP_0_FD1G 0 ("FADDD" "FSUBD" "FCPYNSD" "FCPYSD"))
-+(fd1c-op COP_0_FD1G 1 ("FMADDD" "FMSUBD" "FCMOVND" "FCMOVZD"))
-+(fd1c-op COP_0_FD1G 2 ("FNMADDD" "FNMSUBD" "2" "3"))
-+(fd1c-op COP_0_FD1G 3 ("FMULD" "FDIVD" "2" "F2OP"))
-+
-+; f-32tx-3_17 : fd1/f2op group, bits 17-19 (3 bits)
-+(define-normal-insn-enum COP_0_FD1_F2OPG "fd1/f2op group enums" () COP_0_FD1_F2OPG_ f-32tx-3_17
-+ ("0" "1" "2" "3" "4" "5" "6" "7")
-+)
-+
-+; f-32tx-2_20 : fd1/f2op code, bits 20-21 (2 bits)
-+(define-pmacro (fd1_f2opc-op major group enum-list)
-+ (define-normal-insn-enum (.sym major group) (.str "fd1 code enums in fd1 group" group) () (.sym major group "_") f-32tx-2_20 enum-list)
-+)
-+(fd1_f2opc-op COP_0_FD1_F2OPG 0 ("FD2S" "FSQRTD" "2" "3"))
-+(fd1_f2opc-op COP_0_FD1_F2OPG 1 ("0" "FABSD" "2" "3"))
-+(fd1_f2opc-op COP_0_FD1_F2OPG 2 ("FUI2D" "1" "2" "3"))
-+(fd1_f2opc-op COP_0_FD1_F2OPG 3 ("FSI2D" "1" "2" "3"))
-+(fd1_f2opc-op COP_0_FD1_F2OPG 4 ("FD2UI" "1" "2" "3"))
-+(fd1_f2opc-op COP_0_FD1_F2OPG 5 ("FD2UIZ" "1" "2" "3"))
-+(fd1_f2opc-op COP_0_FD1_F2OPG 6 ("FD2SI" "1" "2" "3"))
-+(fd1_f2opc-op COP_0_FD1_F2OPG 7 ("FD2SIZ" "1" "2" "3"))
-+
-+; f-32tx-3_22: fd2 group, bits 22-24 (3 bits)
-+(define-normal-insn-enum COP_0_FD2G "fd2 group enums" () COP_0_FD2G_ f-32tx-3_22
-+ ("0" "1" "2" "3")
-+)
-+
-+; f-32tx-1_25: fd2 code, bits 25 (1 bit)
-+(define-pmacro (fd2c-op major group enum-list)
-+ (define-normal-insn-enum (.sym major group) (.str "fd2 code enums in fd2 group" group) () (.sym major group "_") f-32tx-1_25 enum-list)
-+)
-+(fd2c-op COP_0_FD2G 0 ("FCMPEQD" "FCMPEQDE"))
-+(fd2c-op COP_0_FD2G 1 ("FCMPLTD" "FCMPLTDE"))
-+(fd2c-op COP_0_FD2G 2 ("FCMPLED" "FCMPLEDE"))
-+(fd2c-op COP_0_FD2G 3 ("FCMPUND" "FCMPUNDE"))
-+
-+; ==============================================================================
-+; Hardware pieces
-+; ==============================================================================
-+; Physical hardware
-+; -----------------
-+(dnh h-slo12 "signed low 12 bits" ()
-+ (immediate (INT 12))
-+ () () ()
-+)
-+
-+;This is Floating Point Internal system register, not ANDES CORE system register
-+(define-keyword
-+ (name fcsr-names)
-+ (print-name h-fcsr)
-+ (prefix "$")
-+ (values
-+ (FPCFG 0) (FPCSR 1)
-+ )
-+)
-+
-+(dnh h-conf-fpcfg "configured floating-point configuration register" ()
-+ (register (UINT 9))
-+ () () ()
-+)
-+
-+(define-hardware
-+ (name h-fcsr)
-+ (comment "floating point control system registers")
-+ (type register USI (2))
-+ (indices extern-keyword fcsr-names)
-+ (get (index) (c-call USI "nds32_h_fcsr_get_handler" index))
-+ (set (index newval) (c-call VOID "nds32_h_fcsr_set_handler" index newval))
-+)
-+
-+(define-hardware
-+ (name h-conf-fcsr)
-+ (comment "configured floating point control system registers")
-+ (type register USI (2))
-+ (indices extern-keyword fcsr-names)
-+)
-+
-+(define-hardware
-+ (name h-wtmsk-fcsr)
-+ (comment "write mask for floating point control system registers")
-+ (type register USI (2))
-+ (indices extern-keyword fcsr-names)
-+)
-+
-+(define-keyword
-+ (name fsr-names)
-+ (print-name h-fsr)
-+ (prefix "$")
-+ (values (fs0 0) (fs1 1) (fs2 2) (fs3 3) (fs4 4) (fs5 5) (fs6 6) (fs7 7)
-+ (fs8 8) (fs9 9) (fs10 10) (fs11 11) (fs12 12) (fs13 13) (fs14 14) (fs15 15)
-+ (fs16 16) (fs17 17) (fs18 18) (fs19 19) (fs20 20) (fs21 21) (fs22 22) (fs23 23)
-+ (fs24 24) (fs25 25) (fs26 26) (fs27 27) (fs28 28) (fs29 29) (fs30 30) (fs31 31)
-+ )
-+)
-+
-+(define-hardware
-+ (name h-fsr)
-+ (comment "floating point single-precision registers")
-+ (attrs PROFILE)
-+ (type register USI (32))
-+ (indices extern-keyword fsr-names)
-+)
-+
-+(define-keyword
-+ (name fdr-names)
-+ (print-name h-fdr)
-+ (prefix "$")
-+ (values (fd0 0) (fd1 1) (fd2 2) (fd3 3) (fd4 4) (fd5 5) (fd6 6) (fd7 7)
-+ (fd8 8) (fd9 9) (fd10 10) (fd11 11) (fd12 12) (fd13 13) (fd14 14) (fd15 15)
-+ )
-+)
-+
-+(define-pmacro (build-fdreg-name n) ((.sym fd n) n))
-+(define-hardware
-+ (name h-fdr)
-+ (comment "floating point double-precision registers")
-+ (attrs PROFILE)
-+ (type register UDI (32))
-+ ;(indices extern-keyword fdr-names)
-+ (indices keyword "$" (.map build-fdreg-name (.iota 32)))
-+)
-+
-+; Virtual hardware
-+; ----------------
-+
-+; ==============================================================================
-+; Opcode operands
-+; ==============================================================================
-+
-+(dnop fsrt5 "FPU destination register of SP" () h-fsr f-32-rt5)
-+(dnop fsra5 "FPU source register A" () h-fsr f-32-ra5)
-+(dnop fsrb5 "FPU source register B" () h-fsr f-32-rb5)
-+(dnop fdrt5 "FPU destination register A of DP" () h-fdr f-32-rt5)
-+(dnop fdra5 "FPU source register A of DP" () h-fdr f-32-ra5)
-+(dnop fdrb5 "FPU source register B of DP" () h-fdr f-32-rb5)
-+(dnop rth5 "destination register containing the high 32-bit of DR" () h-gr f-32-rt5)
-+(dnop rtl5 "destination register containing the low 32-bit of DR" () h-gr f-32-ra5)
-+
-+(define-operand
-+ (name slo12w)
-+ (comment "12-bit signed immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-slo12)
-+ (index f-32tx-slo12w)
-+ (handlers (parse "slo12w"))
-+)
-+
-+(define-operand
-+ (name slo12d)
-+ (comment "12-bit signed immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-slo12)
-+ (index f-32tx-slo12d)
-+ (handlers (parse "slo12d"))
-+)
-+
-+;; ==============================================================================
-+;; Instructions
-+;; ==============================================================================
-+
-+;;
-+;; Single Precision Part
-+;;
-+(dni fls "fls"
-+ (FPU_COM)
-+ "fls $fsrt5,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 ra5 rb5 si FPU_SUB1_24_0 RES1_25_0 COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FLS)
-+ (sequence()
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 1;\n")
-+ (c-call VOID "nds32_fls_handler" pc (const 0) (index-of fsrt5) (index-of ra5) (index-of rb5) si (const 0))
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 0;\n")
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (CPU_INT_ARGS_ICODE(current_cpu) != NDS32_ICODE_DNDEB_A) {\n")
-+ (c-code VOID " goto FLS_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+)
-+(dnmi fls1 "fls1"
-+ (FPU_COM)
-+ "fls $fsrt5,[$ra5+($rb5<<$si)]"
-+ (emit fls fsrt5 ra5 rb5 si)
-+)
-+(dnmi fls2 "fls2"
-+ (FPU_COM)
-+ "fls $fsrt5,[$ra5+$rb5]"
-+ (emit fls fsrt5 ra5 rb5 (f-32t3-sub10si 0))
-+)
-+
-+(dni fls.bi "fls.bi"
-+ (FPU_COM)
-+ "fls.bi $fsrt5,[$ra5],$rb5<<$si"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 ra5 rb5 si FPU_SUB1_24_1 RES1_25_0 COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FLS)
-+ (sequence()
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 1;\n")
-+ (c-call VOID "nds32_fls_handler" pc (const 0) (index-of fsrt5) (index-of ra5) (index-of rb5) si (const 1))
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 0;\n")
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (CPU_INT_ARGS_ICODE(current_cpu) != NDS32_ICODE_DNDEB_A) {\n")
-+ (c-code VOID " goto FLS_BI_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+)
-+(dnmi fls1.bi "fls1.bi"
-+ (FPU_COM)
-+ "fls.bi $fsrt5,[$ra5],($rb5<<$si)"
-+ (emit fls.bi fsrt5 ra5 rb5 si)
-+)
-+
-+(dnmi fls2.bi "fls2.bi"
-+ (FPU_COM)
-+ "fls.bi $fsrt5,[$ra5],$rb5"
-+ (emit fls.bi fsrt5 ra5 rb5 (f-32t3-sub10si 0))
-+)
-+
-+(dni flsi "flsi"
-+ (FPU_COM)
-+ "flsi $fsrt5,[$ra5+$slo12w]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_LWC fsrt5 ra5 COP_0_CP17_0 FPU_SUB1_19_0 slo12w)
-+ (sequence()
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 1;\n")
-+ (c-call VOID "nds32_flsi_handler" pc (const 0) (index-of fsrt5) (index-of ra5) slo12w (const 0))
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 0;\n")
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (CPU_INT_ARGS_ICODE(current_cpu) != NDS32_ICODE_DNDEB_A) {\n")
-+ (c-code VOID " goto FLSI_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+)
-+
-+(dnmi flsi1 "flsi1"
-+ (FPU_COM)
-+ "flsi $fsrt5,[$ra5]"
-+ (emit flsi fsrt5 ra5 (f-32tx-slo12w 0))
-+)
-+
-+(dni flsi.bi "flsi.bi"
-+ (FPU_COM)
-+ "flsi.bi $fsrt5,[$ra5],$slo12w"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_LWC fsrt5 ra5 COP_0_CP17_0 FPU_SUB1_19_1 slo12w)
-+ (sequence()
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 1;\n")
-+ (c-call VOID "nds32_flsi_handler" pc (const 0) (index-of fsrt5) (index-of ra5) slo12w (const 1))
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 0;\n")
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (CPU_INT_ARGS_ICODE(current_cpu) != NDS32_ICODE_DNDEB_A) {\n")
-+ (c-code VOID " goto FLSI_BI_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+)
-+
-+(dnmi flsi1.bi "flsi1.bi"
-+ (FPU_COM)
-+ "flsi1.bi $fsrt5,[$ra5]"
-+ (emit flsi.bi fsrt5 ra5 (f-32tx-slo12w 0))
-+)
-+
-+(dni fmfcfg "fmfcfg"
-+ (FPU_COM)
-+ "fmfcfg $rt5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP rt5 RES5_12_0 FP_SUB5_17_CFG FP_SUB4_22_XR COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_MFCP)
-+ (sequence()
-+ (c-call VOID "nds32_fmfcfg_handler" pc (index-of rt5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FMFCFG_interruption;\n"))
-+ ()
-+)
-+(dni fmfcsr "fmfcsr"
-+ (FPU_COM)
-+ "fmfcsr $rt5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP rt5 RES5_12_0 FP_SUB5_17_CSR FP_SUB4_22_XR COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_MFCP)
-+ (sequence()
-+ (c-call VOID "nds32_fmfcsr_handler" pc (index-of rt5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FMFCSR_interruption;\n"))
-+ ()
-+)
-+(dni fmtcsr "fmtcsr"
-+ (FPU_COM)
-+ "fmtcsr $rt5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP rt5 RES5_12_0 FP_SUB5_17_CSR FP_SUB4_22_XR COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_MTCP)
-+ (sequence()
-+ (c-call VOID "nds32_fmtcsr_handler" pc (index-of rt5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FMTCSR_interruption;\n"))
-+ ()
-+)
-+(dni fmfsr "fmfsr"
-+ (FPU_COM)
-+ "fmfsr $rt5,$fsra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP rt5 fsra5 RES5_17_0 FP_SUB4_22_SR COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_MFCP)
-+ (sequence()
-+ (c-call VOID "nds32_fmfsr_handler" pc (index-of rt5) (index-of fsra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FMFSR_interruption;\n"))
-+ ()
-+)
-+
-+(dni fmtsr "fmtsr"
-+ (FPU_COM)
-+ "fmtsr $rt5,$fsra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP rt5 fsra5 RES5_17_0 FP_SUB4_22_SR COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_MTCP)
-+ (sequence()
-+ (c-call VOID "nds32_fmtsr_handler" pc (index-of rt5) (index-of fsra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FMTSR_interruption;\n"))
-+ ()
-+)
-+(dni fss "fss"
-+ (FPU_COM)
-+ "fss $fsrt5,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 ra5 rb5 si FPU_SUB1_24_0 RES1_25_0 COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FSS)
-+ (sequence()
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 1;\n")
-+ (c-call VOID "nds32_fss_handler" pc (const 0) (index-of fsrt5) (index-of ra5) (index-of rb5) si (const 0))
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 0;\n")
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (!((CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_A)||(CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_V))) {\n")
-+ (c-code VOID " goto FSS_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+)
-+(dnmi fss1 "fss1"
-+ (FPU_COM)
-+ "fss $fsrt5,[$ra5+($rb5<<$si)]"
-+ (emit fss fsrt5 ra5 rb5 si)
-+)
-+
-+(dnmi fss2 "fss2"
-+ (FPU_COM)
-+ "fss $fsrt5,[$ra5+$rb5]"
-+ (emit fss fsrt5 ra5 rb5 (f-32t3-sub10si 0))
-+)
-+
-+(dni fss.bi "fss.bi"
-+ (FPU_COM)
-+ "fss.bi $fsrt5,[$ra5],$rb5<<$si"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 ra5 rb5 si FPU_SUB1_24_1 RES1_25_0 COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FSS)
-+ (sequence()
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 1;\n")
-+ (c-call VOID "nds32_fss_handler" pc (const 0) (index-of fsrt5) (index-of ra5) (index-of rb5) si (const 1))
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 0;\n")
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (!((CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_A)||(CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_V))) {\n")
-+ (c-code VOID " goto FSS_BI_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+)
-+
-+(dnmi fss.bi1 "fss.bi1"
-+ (FPU_COM)
-+ "fss.bi $fsrt5,[$ra5],($rb5<<$si)"
-+ (emit fss.bi fsrt5 ra5 rb5 si)
-+)
-+
-+(dnmi fss.bi2 "fss.bi2"
-+ (FPU_COM)
-+ "fss.bi $fsrt5,[$ra5],$rb5"
-+ (emit fss.bi fsrt5 ra5 rb5 (f-32t3-sub10si 0))
-+)
-+
-+(dni fssi "fssi"
-+ (FPU_COM)
-+ "fssi $fsrt5,[$ra5+$slo12w]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_SWC fsrt5 ra5 COP_0_CP17_0 FPU_SUB1_19_0 slo12w)
-+ (sequence()
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 1;\n")
-+ (c-call VOID "nds32_fssi_handler" pc (const 0) (index-of fsrt5) (index-of ra5) slo12w (const 0))
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 0;\n")
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (!((CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_A)||(CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_V))) {\n")
-+ (c-code VOID " goto FSSI_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+)
-+
-+(dni fssi.bi "fssi.bi"
-+ (FPU_COM)
-+ "fssi.bi $fsrt5,[$ra5],$slo12w"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_SWC fsrt5 ra5 COP_0_CP17_0 FPU_SUB1_19_1 slo12w)
-+ (sequence()
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 1;\n")
-+ (c-call VOID "nds32_fssi_handler" pc (const 0) (index-of fsrt5) (index-of ra5) slo12w (const 1))
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 0;\n")
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (!((CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_A)||(CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_V))) {\n")
-+ (c-code VOID " goto FSSI_BI_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+)
-+(dni fs2d "fs2d"
-+ (FPU_BOTH)
-+ "fs2d $fdrt5,$fsra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 fsra5 COP_0_FS1_F2OPG_0 COP_0_FS1_F2OPG0_FS2D COP_0_FS1G_3 COP_0_FS1G3_F2OP COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fs2d_handler" pc (index-of fdrt5) (index-of fsra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FS2D_interruption;\n"))
-+ ()
-+)
-+
-+(dni fabss "fabss"
-+ (FPU_SP)
-+ "fabss $fsrt5,$fsra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 COP_0_FS1_F2OPG_1 COP_0_FS1_F2OPG1_FABSS COP_0_FS1G_3 COP_0_FS1G3_F2OP COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fabss_handler" pc (index-of fsrt5) (index-of fsra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FABSS_interruption;\n"))
-+ ()
-+)
-+
-+(dni fadds "fadds"
-+ (FPU_SP)
-+ "fadds $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 COP_0_FS1G_0 COP_0_FS1G0_FADDS COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fadds_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FADDS_interruption;\n"))
-+ ()
-+)
-+
-+(dni fcmovns "fcmovns"
-+ (FPU_SP)
-+ "fcmovns $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 COP_0_FS1G_1 COP_0_FS1G1_FCMOVNS COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fcmovns_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMOVNS_interruption;\n"))
-+ ()
-+)
-+
-+(dni fcmovzs "fcmovzs"
-+ (FPU_SP)
-+ "fcmovzs $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 COP_0_FS1G_1 COP_0_FS1G1_FCMOVZS COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fcmovzs_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMOVZS_interruption;\n"))
-+ ()
-+)
-+(dni fcmpeqs "fcmpeqs"
-+ (FPU_SP)
-+ "fcmpeqs $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 SUB3_22_EQ SUB1_25_0 COP_0_CP26_0 COP_0_CPEG_1 COP_0_CPEG1_FS2)
-+ (sequence()
-+ (c-call VOID "nds32_fcmpeqs_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMPEQS_interruption;\n"))
-+ ()
-+)
-+(dni fcmpeqs.e "fcmpeqs.e"
-+ (FPU_SP)
-+ "fcmpeqs.e $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 SUB3_22_EQ SUB1_25_1 COP_0_CP26_0 COP_0_CPEG_1 COP_0_CPEG1_FS2)
-+ (sequence()
-+ (c-call VOID "nds32_fcmpeqs_e_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMPEQS_E_interruption;\n"))
-+ ()
-+)
-+(dni fcmplts "fcmplts"
-+ (FPU_SP)
-+ "fcmplts $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 SUB3_22_LT SUB1_25_0 COP_0_CP26_0 COP_0_CPEG_1 COP_0_CPEG1_FS2)
-+ (sequence()
-+ (c-call VOID "nds32_fcmplts_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMPLTS_interruption;\n"))
-+ ()
-+)
-+(dni fcmplts.e "fcmplts.e"
-+ (FPU_SP)
-+ "fcmplts.e $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 SUB3_22_LT SUB1_25_1 COP_0_CP26_0 COP_0_CPEG_1 COP_0_CPEG1_FS2)
-+ (sequence()
-+ (c-call VOID "nds32_fcmplts_e_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMPLTS_E_interruption;\n"))
-+ ()
-+)
-+(dni fcmples "fcmples"
-+ (FPU_SP)
-+ "fcmples $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 SUB3_22_LE SUB1_25_0 COP_0_CP26_0 COP_0_CPEG_1 COP_0_CPEG1_FS2)
-+ (sequence()
-+ (c-call VOID "nds32_fcmples_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMPLES_interruption;\n"))
-+ ()
-+)
-+(dni fcmples.e "fcmples.e"
-+ (FPU_SP)
-+ "fcmples.e $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 SUB3_22_LE SUB1_25_1 COP_0_CP26_0 COP_0_CPEG_1 COP_0_CPEG1_FS2)
-+ (sequence()
-+ (c-call VOID "nds32_fcmples_e_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMPLES_E_interruption;\n"))
-+ ()
-+)
-+(dni fcmpuns "fcmpuns"
-+ (FPU_SP)
-+ "fcmpuns $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 SUB3_22_UN SUB1_25_0 COP_0_CP26_0 COP_0_CPEG_1 COP_0_CPEG1_FS2)
-+ (sequence()
-+ (c-call VOID "nds32_fcmpuns_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMPUNS_interruption;\n"))
-+ ()
-+)
-+(dni fcmpuns.e "fcmpuns.e"
-+ (FPU_SP)
-+ "fcmpuns.e $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 SUB3_22_UN SUB1_25_1 COP_0_CP26_0 COP_0_CPEG_1 COP_0_CPEG1_FS2)
-+ (sequence()
-+ (c-call VOID "nds32_fcmpuns_e_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMPUNS_E_interruption;\n"))
-+ ()
-+)
-+(dni fcpynss "fcpynss"
-+ (FPU_SP)
-+ "fcpynss $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 COP_0_FS1G_0 COP_0_FS1G0_FCPYNSS COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fcpynss_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCPYNSS_interruption;\n"))
-+ ()
-+)
-+
-+(dni fcpyss "fcpyss"
-+ (FPU_SP)
-+ "fcpyss $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 COP_0_FS1G_0 COP_0_FS1G0_FCPYSS COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fcpyss_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCPYSS_interruption;\n"))
-+ ()
-+)
-+
-+(dni fdivs "fdivs"
-+ (FPU_SP)
-+ "fdivs $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 COP_0_FS1G_3 COP_0_FS1G3_FDIVS COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fdivs_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FDIVS_interruption;\n"))
-+ ()
-+)
-+
-+(dni fmadds "fmadds"
-+ (FPU_SP_MAC)
-+ "fmadds $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 COP_0_FS1G_1 COP_0_FS1G1_FMADDS COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fmadds_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FMADDS_interruption;\n"))
-+ ()
-+)
-+
-+(dni fmuls "fmuls"
-+ (FPU_SP)
-+ "fmuls $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 COP_0_FS1G_3 COP_0_FS1G3_FMULS COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fmuls_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FMULS_interruption;\n"))
-+ ()
-+)
-+
-+(dni fmsubs "fmsubs"
-+ (FPU_SP_MAC)
-+ "fmsubs $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 COP_0_FS1G_1 COP_0_FS1G1_FMSUBS COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fmsubs_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FMSUBS_interruption;\n"))
-+ ()
-+)
-+
-+(dni fnmadds "fnmadds"
-+ (FPU_SP_MAC)
-+ "fnmadds $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 COP_0_FS1G_2 COP_0_FS1G2_FNMADDS COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fnmadds_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FNMADDS_interruption;\n"))
-+ ()
-+)
-+
-+(dni fnmsubs "fnmsubs"
-+ (FPU_SP_MAC)
-+ "fnmsubs $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 COP_0_FS1G_2 COP_0_FS1G2_FNMSUBS COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fnmsubs_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FNMSUBS_interruption;\n"))
-+ ()
-+)
-+(dni fs2si "fs2si"
-+ (FPU_SP)
-+ "fs2si $fsrt5,$fsra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 COP_0_FS1_F2OPG_6 COP_0_FS1_F2OPG6_FS2SI COP_0_FS1G_3 COP_0_FS1G3_F2OP COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fs2si_handler" pc (index-of fsrt5) (index-of fsra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FS2SI_interruption;\n"))
-+ ()
-+)
-+
-+(dni fs2si.z "fs2si.z"
-+ (FPU_SP)
-+ "fs2si.z $fsrt5,$fsra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 COP_0_FS1_F2OPG_7 COP_0_FS1_F2OPG7_FS2SIZ COP_0_FS1G_3 COP_0_FS1G3_F2OP COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fs2si_z_handler" pc (index-of fsrt5) (index-of fsra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FS2SI_Z_interruption;\n"))
-+ ()
-+)
-+
-+(dni fs2ui "fs2ui"
-+ (FPU_SP)
-+ "fs2ui $fsrt5,$fsra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 COP_0_FS1_F2OPG_4 COP_0_FS1_F2OPG4_FS2UI COP_0_FS1G_3 COP_0_FS1G3_F2OP COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fs2ui_handler" pc (index-of fsrt5) (index-of fsra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FS2UI_interruption;\n"))
-+ ()
-+)
-+
-+(dni fs2ui.z "fs2ui.z"
-+ (FPU_SP)
-+ "fs2ui.z $fsrt5,$fsra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 COP_0_FS1_F2OPG_5 COP_0_FS1_F2OPG5_FS2UIZ COP_0_FS1G_3 COP_0_FS1G3_F2OP COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fs2ui_z_handler" pc (index-of fsrt5) (index-of fsra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FS2UI_Z_interruption;\n"))
-+ ()
-+)
-+
-+(dni fsi2s "fsi2s"
-+ (FPU_SP)
-+ "fsi2s $fsrt5,$fsra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 COP_0_FS1_F2OPG_3 COP_0_FS1_F2OPG3_FSI2S COP_0_FS1G_3 COP_0_FS1G3_F2OP COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fsi2s_handler" pc (index-of fsrt5) (index-of fsra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FSI2S_interruption;\n"))
-+ ()
-+)
-+
-+(dni fsqrts "fsqrts"
-+ (FPU_SP)
-+ "fsqrts $fsrt5,$fsra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 COP_0_FS1_F2OPG_0 COP_0_FS1_F2OPG0_FSQRTS COP_0_FS1G_3 COP_0_FS1G3_F2OP COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fsqrts_handler" pc (index-of fsrt5) (index-of fsra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FSQRTS_interruption;\n"))
-+ ()
-+)
-+
-+(dni fsubs "fsubs"
-+ (FPU_SP)
-+ "fsubs $fsrt5,$fsra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 COP_0_FS1G_0 COP_0_FS1G0_FSUBS COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fsubs_handler" pc (index-of fsrt5) (index-of fsra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FSUBS_interruption;\n"))
-+ ()
-+)
-+
-+(dni fui2s "fui2s"
-+ (FPU_SP)
-+ "fui2s $fsrt5,$fsra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 COP_0_FS1_F2OPG_2 COP_0_FS1_F2OPG2_FUI2S COP_0_FS1G_3 COP_0_FS1G3_F2OP COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FS1)
-+ (sequence()
-+ (c-call VOID "nds32_fui2s_handler" pc (index-of fsrt5) (index-of fsra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FUI2S_interruption;\n"))
-+ ()
-+)
-+;;
-+;; Double Precision Part
-+;;
-+(dni fabsd "fabsd"
-+ (FPU_DP)
-+ "fabsd $fdrt5,$fdra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 fdra5 COP_0_FD1_F2OPG_1 COP_0_FD1_F2OPG1_FABSD COP_0_FD1G_3 COP_0_FD1G3_F2OP COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fabsd_handler" pc (index-of fdrt5) (index-of fdra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FABSD_interruption;\n"))
-+ ()
-+)
-+
-+(dni faddd "faddd"
-+ (FPU_DP)
-+ "faddd $fdrt5,$fdra5,$fdrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 fdra5 fdrb5 COP_0_FD1G_0 COP_0_FD1G0_FADDD COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_faddd_handler" pc (index-of fdrt5) (index-of fdra5) (index-of fdrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FADDD_interruption;\n"))
-+ ()
-+)
-+
-+(dni fcmovnd "fcmovnd"
-+ (FPU_DP)
-+ "fcmovnd $fdrt5,$fdra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 fdra5 fsrb5 COP_0_FD1G_1 COP_0_FD1G1_FCMOVND COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fcmovnd_handler" pc (index-of fdrt5) (index-of fdra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMOVND_interruption;\n"))
-+ ()
-+)
-+
-+(dni fcmovzd "fcmovzd"
-+ (FPU_DP)
-+ "fcmovzd $fdrt5,$fdra5,$fsrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 fdra5 fsrb5 COP_0_FD1G_1 COP_0_FD1G1_FCMOVZD COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fcmovzd_handler" pc (index-of fdrt5) (index-of fdra5) (index-of fsrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMOVZD_interruption;\n"))
-+ ()
-+)
-+(dni fcmpeqd "fcmpeqd"
-+ (FPU_DP)
-+ "fcmpeqd $fsrt5,$fdra5,$fdrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 SUB3_22_EQ SUB1_25_0 COP_0_CP26_0 COP_0_CPEG_3 COP_0_CPEG3_FD2)
-+ (sequence()
-+ (c-call VOID "nds32_fcmpeqd_handler" pc (index-of fdrt5) (index-of fdra5) (index-of fdrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMPEQD_interruption;\n"))
-+ ()
-+)
-+(dni fcmpeqd.e "fcmpeqd.e"
-+ (FPU_DP)
-+ "fcmpeqd.e $fsrt5,$fdra5,$fdrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 SUB3_22_EQ SUB1_25_1 COP_0_CP26_0 COP_0_CPEG_3 COP_0_CPEG3_FD2)
-+ (sequence()
-+ (c-call VOID "nds32_fcmpeqd_e_handler" pc (index-of fsrt5) (index-of fdra5) (index-of fdrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMPEQD_E_interruption;\n"))
-+ ()
-+)
-+(dni fcmpltd "fcmpltd"
-+ (FPU_DP)
-+ "fcmpltd $fsrt5,$fdra5,$fdrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 SUB3_22_LT SUB1_25_0 COP_0_CP26_0 COP_0_CPEG_3 COP_0_CPEG3_FD2)
-+ (sequence()
-+ (c-call VOID "nds32_fcmpltd_handler" pc (index-of fsrt5) (index-of fdra5) (index-of fdrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMPLTD_interruption;\n"))
-+ ()
-+)
-+(dni fcmpltd.e "fcmpltd.e"
-+ (FPU_DP)
-+ "fcmpltd.e $fsrt5,$fdra5,$fdrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 SUB3_22_LT SUB1_25_1 COP_0_CP26_0 COP_0_CPEG_3 COP_0_CPEG3_FD2)
-+ (sequence()
-+ (c-call VOID "nds32_fcmpltd_e_handler" pc (index-of fsrt5) (index-of fdra5) (index-of fdrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMPLTD_E_interruption;\n"))
-+ ()
-+)
-+(dni fcmpled "fcmpled"
-+ (FPU_DP)
-+ "fcmpled $fsrt5,$fdra5,$fdrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 SUB3_22_LE SUB1_25_0 COP_0_CP26_0 COP_0_CPEG_3 COP_0_CPEG3_FD2)
-+ (sequence()
-+ (c-call VOID "nds32_fcmpled_handler" pc (index-of fsrt5) (index-of fdra5) (index-of fdrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMPLED_interruption;\n"))
-+ ()
-+)
-+(dni fcmpled.e "fcmpled.e"
-+ (FPU_DP)
-+ "fcmpled.e $fsrt5,$fdra5,$fdrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 SUB3_22_LE SUB1_25_1 COP_0_CP26_0 COP_0_CPEG_3 COP_0_CPEG3_FD2)
-+ (sequence()
-+ (c-call VOID "nds32_fcmpled_e_handler" pc (index-of fsrt5) (index-of fdra5) (index-of fdrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMPLED_E_interruption;\n"))
-+ ()
-+)
-+(dni fcmpund "fcmpund"
-+ (FPU_DP)
-+ "fcmpund $fsrt5,$fdra5,$fdrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 SUB3_22_UN SUB1_25_0 COP_0_CP26_0 COP_0_CPEG_3 COP_0_CPEG3_FD2)
-+ (sequence()
-+ (c-call VOID "nds32_fcmpund_handler" pc (index-of fsrt5) (index-of fdra5) (index-of fdrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMPUND_interruption;\n"))
-+ ()
-+)
-+(dni fcmpund.e "fcmpund.e"
-+ (FPU_DP)
-+ "fcmpund.e $fsrt5,$fdra5,$fdrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fsra5 fsrb5 SUB3_22_UN SUB1_25_1 COP_0_CP26_0 COP_0_CPEG_3 COP_0_CPEG3_FD2)
-+ (sequence()
-+ (c-call VOID "nds32_fcmpund_e_handler" pc (index-of fsrt5) (index-of fdra5) (index-of fdrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCMPUND_E_interruption;\n"))
-+ ()
-+)
-+(dni fcpynsd "fcpynsd"
-+ (FPU_DP)
-+ "fcpynsd $fdrt5,$fdra5,$fdrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 fdra5 fdrb5 COP_0_FD1G_0 COP_0_FD1G0_FCPYNSD COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fcpynsd_handler" pc (index-of fdrt5) (index-of fdra5) (index-of fdrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCPYNSD_interruption;\n"))
-+ ()
-+)
-+
-+(dni fcpysd "fcpysd"
-+ (FPU_COM)
-+ "fcpysd $fdrt5,$fdra5,$fdrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 fdra5 fdrb5 COP_0_FD1G_0 COP_0_FD1G0_FCPYSD COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fcpysd_handler" pc (index-of fdrt5) (index-of fdra5) (index-of fdrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FCPYSD_interruption;\n"))
-+ ()
-+)
-+(dni fd2s "fd2s"
-+ (FPU_BOTH)
-+ "fd2s $fsrt5,$fdra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fdra5 COP_0_FD1_F2OPG_0 COP_0_FD1_F2OPG0_FD2S COP_0_FD1G_3 COP_0_FD1G3_F2OP COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fd2s_handler" pc (index-of fsrt5) (index-of fdra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FD2S_interruption;\n"))
-+ ()
-+)
-+
-+(dni fd2si "fd2si"
-+ (FPU_DP)
-+ "fd2si $fsrt5,$fdra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fdra5 COP_0_FD1_F2OPG_6 COP_0_FD1_F2OPG6_FD2SI COP_0_FD1G_3 COP_0_FD1G3_F2OP COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fd2si_handler" pc (index-of fsrt5) (index-of fdra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FD2SI_interruption;\n"))
-+ ()
-+)
-+
-+(dni fd2si.z "fd2si.z"
-+ (FPU_DP)
-+ "fd2si.z $fsrt5,$fdra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fdra5 COP_0_FD1_F2OPG_7 COP_0_FD1_F2OPG7_FD2SIZ COP_0_FD1G_3 COP_0_FD1G3_F2OP COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fd2si_z_handler" pc (index-of fsrt5) (index-of fdra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FD2SI_Z_interruption;\n"))
-+ ()
-+)
-+
-+(dni fd2ui "fd2ui"
-+ (FPU_DP)
-+ "fd2ui $fsrt5,$fdra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fdra5 COP_0_FD1_F2OPG_4 COP_0_FD1_F2OPG4_FD2UI COP_0_FD1G_3 COP_0_FD1G3_F2OP COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fd2ui_handler" pc (index-of fsrt5) (index-of fdra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FD2UI_interruption;\n"))
-+ ()
-+)
-+
-+(dni fd2ui.z "fd2ui.z"
-+ (FPU_DP)
-+ "fd2ui.z $fsrt5,$fdra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fsrt5 fdra5 COP_0_FD1_F2OPG_5 COP_0_FD1_F2OPG5_FD2UIZ COP_0_FD1G_3 COP_0_FD1G3_F2OP COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fd2ui_z_handler" pc (index-of fsrt5) (index-of fdra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FD2UI_Z_interruption;\n"))
-+ ()
-+)
-+
-+(dni fdivd "fdivd"
-+ (FPU_DP)
-+ "fdivd $fdrt5,$fdra5,$fdrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 fdra5 fdrb5 COP_0_FD1G_3 COP_0_FD1G3_FDIVD COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fdivd_handler" pc (index-of fdrt5) (index-of fdra5) (index-of fdrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FDIVD_interruption;\n"))
-+ ()
-+)
-+(dni fld "fld"
-+ (FPU_COM)
-+ "fld $fdrt5,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 ra5 rb5 si FPU_SUB1_24_0 RES1_25_0 COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FLD)
-+ (sequence()
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 1;\n")
-+ (c-call VOID "nds32_fld_handler" pc (const 0) (index-of fdrt5) (index-of ra5) (index-of rb5) si (const 0))
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 0;\n")
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (CPU_INT_ARGS_ICODE(current_cpu) != NDS32_ICODE_DNDEB_A) {\n")
-+ (c-code VOID " goto FLD_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+)
-+(dnmi fld1 "fld1"
-+ (FPU_COM)
-+ "fld $fdrt5,[$ra5+($rb5<<$si)]"
-+ (emit fld fdrt5 ra5 rb5 si)
-+)
-+(dnmi fld2 "fld2"
-+ (FPU_COM)
-+ "fld $fdrt5,[$ra5+$rb5]"
-+ (emit fld fdrt5 ra5 rb5 (f-32t3-sub10si 0))
-+)
-+
-+(dni fld.bi "fld.bi"
-+ (FPU_COM)
-+ "fld.bi $fdrt5,[$ra5],$rb5<<$si"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 ra5 rb5 si FPU_SUB1_24_1 RES1_25_0 COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_FLD)
-+ (sequence()
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 1;\n")
-+ (c-call VOID "nds32_fld_handler" pc (const 0) (index-of fdrt5) (index-of ra5) (index-of rb5) si (const 1))
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 0;\n")
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (CPU_INT_ARGS_ICODE(current_cpu) != NDS32_ICODE_DNDEB_A) {\n")
-+ (c-code VOID " goto FLD_BI_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+)
-+(dnmi fld1.bi "fld1.bi"
-+ (FPU_COM)
-+ "fld.bi $fdrt5,[$ra5],($rb5<<$si)"
-+ (emit fld.bi fdrt5 ra5 rb5 si)
-+)
-+(dnmi fld2.bi "fld2.bi"
-+ (FPU_COM)
-+ "fld.bi $fdrt5,[$ra5],$rb5"
-+ (emit fld.bi fdrt5 ra5 rb5 (f-32t3-sub10si 0))
-+)
-+
-+(dni fldi "fldi"
-+ (FPU_COM)
-+ "fldi $fdrt5,[$ra5+$slo12d]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_LDC fdrt5 ra5 COP_0_CP17_0 FPU_SUB1_19_0 slo12d)
-+ (sequence()
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 1;\n")
-+ (c-call VOID "nds32_fldi_handler" pc (const 0) (index-of fdrt5) (index-of ra5) slo12d (const 0))
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 0;\n")
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (CPU_INT_ARGS_ICODE(current_cpu) != NDS32_ICODE_DNDEB_A) {\n")
-+ (c-code VOID " goto FLDI_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+)
-+(dnmi fldi1 "fldi1"
-+ (FPU_COM)
-+ "fldi $fdrt5,[$ra5]"
-+ (emit fldi fdrt5 ra5 (f-32tx-slo12d 0))
-+)
-+
-+(dni fldi.bi "fldi.bi"
-+ (FPU_COM)
-+ "fldi.bi $fdrt5,[$ra5],$slo12d"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_LDC fdrt5 ra5 COP_0_CP17_0 FPU_SUB1_19_1 slo12d)
-+ (sequence()
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 1;\n")
-+ (c-call VOID "nds32_fldi_handler" pc (const 0) (index-of fdrt5) (index-of ra5) slo12d (const 1))
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 0;\n")
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (CPU_INT_ARGS_ICODE(current_cpu) != NDS32_ICODE_DNDEB_A) {\n")
-+ (c-code VOID " goto FLDI_BI_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+)
-+
-+(dnmi fldi1.bi "fldi1.bi"
-+ (FPU_COM)
-+ "fldi.bi $fdrt5,[$ra5]"
-+ (emit fldi.bi fdrt5 ra5 (f-32tx-slo12d 0))
-+)
-+
-+(dni fmaddd "fmaddd"
-+ (FPU_DP_MAC)
-+ "fmaddd $fdrt5,$fdra5,$fdrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 fdra5 fdrb5 COP_0_FD1G_1 COP_0_FD1G1_FMADDD COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fmaddd_handler" pc (index-of fdrt5) (index-of fdra5) (index-of fdrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FMADDD_interruption;\n"))
-+ ()
-+)
-+
-+(dni fmfdr "fmfdr"
-+ (FPU_COM)
-+ "fmfdr $rt5,$fdra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP rt5 fdra5 RES5_17_0 FP_SUB4_22_DR COP_0_CP26_0 COP_0_CPEG_0 COP_0_CPEG0_MFCP)
-+ (sequence()
-+ (c-call VOID "nds32_fmfdr_handler" pc (index-of rt5) (index-of fdra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FMFDR_interruption;\n"))
-+ ()
-+)
-+
-+(dni fmsubd "fmsubd"
-+ (FPU_DP_MAC)
-+ "fmsubd $fdrt5,$fdra5,$fdrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 fdra5 fdrb5 COP_0_FD1G_1 COP_0_FD1G1_FMSUBD COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fmsubd_handler" pc (index-of fdrt5) (index-of fdra5) (index-of fdrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FMSUBD_interruption;\n"))
-+ ()
-+)
-+
-+(dni fmtdr "fmtdr"
-+ (FPU_COM)
-+ "fmtdr $rt5,$fdra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP rt5 fdra5 RES5_17_0 FP_SUB4_22_DR COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_MTCP)
-+ (sequence()
-+ (c-call VOID "nds32_fmtdr_handler" pc (index-of rt5) (index-of fdra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FMTDR_interruption;\n"))
-+ ()
-+)
-+
-+(dni fmuld "fmuld"
-+ (FPU_DP)
-+ "fmuld $fdrt5,$fdra5,$fdrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 fdra5 fdrb5 COP_0_FD1G_3 COP_0_FD1G3_FMULD COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fmuld_handler" pc (index-of fdrt5) (index-of fdra5) (index-of fdrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FMULD_interruption;\n"))
-+ ()
-+)
-+
-+(dni fnmaddd "fnmaddd"
-+ (FPU_DP_MAC)
-+ "fnmaddd $fdrt5,$fdra5,$fdrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 fdra5 fdrb5 COP_0_FD1G_2 COP_0_FD1G2_FNMADDD COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fnmaddd_handler" pc (index-of fdrt5) (index-of fdra5) (index-of fdrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FNMADDD_interruption;\n"))
-+ ()
-+)
-+(dni fnmsubd "fnmsubd"
-+ (FPU_DP_MAC)
-+ "fnmsubd $fdrt5,$fdra5,$fdrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 fdra5 fdrb5 COP_0_FD1G_2 COP_0_FD1G2_FNMSUBD COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fnmsubd_handler" pc (index-of fdrt5) (index-of fdra5) (index-of fdrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FNMSUBD_interruption;\n"))
-+ ()
-+)
-+(dni fsd "fsd"
-+ (FPU_COM)
-+ "fsd $fdrt5,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 ra5 rb5 si FPU_SUB1_24_0 RES1_25_0 COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FSD)
-+ (sequence()
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 1;\n")
-+ (c-call VOID "nds32_fsd_handler" pc (const 0) (index-of fdrt5) (index-of ra5) (index-of rb5) si (const 0))
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 0;\n")
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (!((CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_A)||(CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_V))) {\n")
-+ (c-code VOID " goto FSD_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+)
-+(dnmi fsd1 "fsd1"
-+ (FPU_COM)
-+ "fsd $fdrt5,[$ra5+($rb5<<$si)]"
-+ (emit fsd fdrt5 ra5 rb5 si)
-+)
-+
-+(dnmi fsd2 "fsd2"
-+ (FPU_COM)
-+ "fsd $fdrt5,[$ra5+$rb5]"
-+ (emit fsd fdrt5 ra5 rb5 (f-32t3-sub10si 0))
-+)
-+
-+(dni fsd.bi "fsd.bi"
-+ (FPU_COM)
-+ "fsd.bi $fdrt5,[$ra5],$rb5<<$si"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 ra5 rb5 si FPU_SUB1_24_1 RES1_25_0 COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FSD)
-+ (sequence()
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 1;\n")
-+ (c-call VOID "nds32_fsd_handler" pc (const 0) (index-of fdrt5) (index-of ra5) (index-of rb5) si (const 1))
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 0;\n")
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (!((CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_A)||(CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_V))) {\n")
-+ (c-code VOID " goto FSD_BI_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+)
-+
-+(dnmi fsd1.bi "fsd1.bi"
-+ (FPU_COM)
-+ "fsd.bi $fdrt5,[$ra5],($rb5<<$si)"
-+ (emit fsd.bi fdrt5 ra5 rb5 si)
-+)
-+
-+(dnmi fsd2.bi "fsd2.bi"
-+ (FPU_COM)
-+ "fsd.bi $fdrt5,[$ra5],$rb5"
-+ (emit fsd.bi fdrt5 ra5 rb5 (f-32t3-sub10si 0))
-+)
-+
-+(dni fsdi "fsdi"
-+ (FPU_COM)
-+ "fsdi $fdrt5,[$ra5+$slo12d]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_SDC fdrt5 ra5 COP_0_CP17_0 FPU_SUB1_19_0 slo12d)
-+ (sequence()
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 1;\n")
-+ (c-call VOID "nds32_fsdi_handler" pc (const 0) (index-of fdrt5) (index-of ra5) slo12d (const 0))
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 0;\n")
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (!((CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_A)||(CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_V))) {\n")
-+ (c-code VOID " goto FSDI_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+)
-+
-+(dni fsdi.bi "fsdi.bi"
-+ (FPU_COM)
-+ "fsdi.bi $fdrt5,[$ra5],$slo12d"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_SDC fdrt5 ra5 COP_0_CP17_0 FPU_SUB1_19_1 slo12d)
-+ (sequence()
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 1;\n")
-+ (c-call VOID "nds32_fsdi_handler" pc (const 0) (index-of fdrt5) (index-of ra5) slo12d (const 1))
-+ (c-code VOID "IS_FPU_INSN(current_cpu) = 0;\n")
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n")
-+ (c-code VOID " DBP_LOCK(current_cpu) = 0;\n")
-+ (c-code VOID " if (!((CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_A)||(CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_V))) {\n")
-+ (c-code VOID " goto FSDI_BI_interruption;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID " else {\n")
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu)=tpc;\n")
-+ (c-code VOID " }\n")
-+ (c-code VOID "}\n"))
-+ ()
-+)
-+(dni fsi2d "fsi2d"
-+ (FPU_DP)
-+ "fsi2d $fdrt5,$fsra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 fsra5 COP_0_FD1_F2OPG_3 COP_0_FD1_F2OPG3_FSI2D COP_0_FD1G_3 COP_0_FD1G3_F2OP COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fsi2d_handler" pc (index-of fdrt5) (index-of fsra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FSI2D_interruption;\n"))
-+ ()
-+)
-+
-+(dni fsqrtd "fsqrtd"
-+ (FPU_DP)
-+ "fsqrtd $fdrt5,$fdra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 fsra5 COP_0_FD1_F2OPG_0 COP_0_FD1_F2OPG0_FSQRTD COP_0_FD1G_3 COP_0_FD1G3_F2OP COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fsqrtd_handler" pc (index-of fdrt5) (index-of fdra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FSQRTD_interruption;\n"))
-+ ()
-+)
-+
-+(dni fsubd "fsubd"
-+ (FPU_DP)
-+ "fsubd $fdrt5,$fdra5,$fdrb5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 fdra5 fdrb5 COP_0_FD1G_0 COP_0_FD1G0_FSUBD COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fsubd_handler" pc (index-of fdrt5) (index-of fdra5) (index-of fdrb5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FSUBD_interruption;\n"))
-+ ()
-+)
-+
-+(dni fui2d "fui2d"
-+ (FPU_DP)
-+ "fui2d $fdrt5,$fsra5"
-+ (+ IFMT_32 OPC6G_6 OPC6C6_COP fdrt5 fsra5 COP_0_FD1_F2OPG_2 COP_0_FD1_F2OPG2_FUI2D COP_0_FD1G_3 COP_0_FD1G3_F2OP COP_0_CP26_0 COP_0_CPEG_2 COP_0_CPEG2_FD1)
-+ (sequence()
-+ (c-call VOID "nds32_fui2d_handler" pc (index-of fdrt5) (index-of fsra5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto FUI2D_interruption;\n"))
-+ ()
-+)
-+
-+
-+; coprocessor extension instructions
-+(include "nds32cop.cpu")
-diff -Nur binutils-2.24.orig/cgen/cpu/nds32ifc.cpu binutils-2.24/cgen/cpu/nds32ifc.cpu
---- binutils-2.24.orig/cgen/cpu/nds32ifc.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds32ifc.cpu 2016-06-30 21:26:12.637892490 +0200
-@@ -0,0 +1,71 @@
-+; ==============================================================================
-+; Andes NDS32 family Inline Function Call Extension -*- Scheme -*-
-+; Andes Technology Corporation
-+; ==============================================================================
-+; This file is included by nds32.cpu.
-+
-+
-+; ==============================================================================
-+; Instruction fields.
-+; ==============================================================================
-+
-+; ==============================================================================
-+; Enums.
-+; ==============================================================================
-+
-+; ==============================================================================
-+; Hardware pieces.
-+; ==============================================================================
-+(dnh h-ifc-lp "inline function call link register" () (register (UINT 32)) () () ())
-+(dnh h-conf-ifc-lp "configured inline function call link register" () (register (UINT 32)) () () ())
-+(dnh h-wtmsk-ifc-lp "write mask value for inline function call link register" () (register (UINT 32)) () () ())
-+
-+; ==============================================================================
-+; Instructions
-+; ==============================================================================
-+;IFCALL (Inline Function Call)
-+(dni ifcall "Inline Function Call"
-+ (IFCEXT V3)
-+ "ifcall $disp16"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_BR2 RES5_7_0 BR2_SUB4_IFCALL disp16)
-+ (sequence()
-+ (if (c-call USI "IFC_mode")
-+ (sequence ()
-+ (if (c-call USI "audio_exception_check")
-+ (c-code VOID "goto IFCALL_interruption;\n"))
-+ (if (c-code USI "!TEST_H_SR_FLD(PSW, IFCON)")
-+ (sequence ()
-+ (c-code VOID "H_IFC_LP() = GET_H_PC() + 4;\n")
-+ (c-code VOID "SET_H_SR_FLD(PSW, IFCON);\n")
-+ (if (c-code USI "current_cpu->debug.check(DT_TRACE_COSIM)" )
-+ (sequence ()
-+ (c-code VOID "CPU_PUSH_UPDATE_PAIR_USR(current_cpu, 29, H_IFC_LP());\n")
-+ (c-code VOID "CPU_PUSH_UPDATE_PAIR_SR(current_cpu, H_SR_PSW, PRI_GET_H_SR(H_SR_PSW));\n")))
-+ (if (c-code USI "current_cpu->debug.check(DT_TRACE)" )
-+ (sequence ()
-+ (c-code VOID "printf(\" pc=0x%08x regWr(ifc_lp)=0x%08x (ifcall)\\n\", pc, H_IFC_LP());\n")
-+ (c-code VOID "printf(\" pc=0x%08x regWr(sr)=%d/0x%08x (ifcall)\\n\", pc, H_SR_PSW, PRI_GET_H_SR(H_SR_PSW));\n")))))
-+ (set pc disp16)))
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu))\n")
-+ (c-code VOID " goto IFCALL_interruption;\n"))
-+ ())
-+
-+;IFRET (Inline Function Call Return)
-+(dni ifret "Inline Function Call Return"
-+ (IFCEXT V3)
-+ "ifret"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_JR RES10_7_0 RES5_17_0 SUB10D_1 SUB10G_RET RET_SUB10C0_IFRET)
-+ (sequence((USI addr))
-+ (if (c-call USI "audio_exception_check")
-+ (c-code VOID "goto IFRET_interruption;\n"))
-+ (c-call VOID "nds32_branch_target_alignment_check" pc (c-code USI "H_IFC_LP()"))
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto IFRET_interruption;\n\n")
-+ (if (c-code USI "current_cpu->IFC_clear()")
-+ (sequence ()
-+ (set pc (c-code USI "H_IFC_LP()"))
-+ (c-code VOID "SET_RET_CNT_COUNTER();\n")))
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu))\n")
-+ (c-code VOID " goto IFRET_interruption;\n"))
-+ ())
-+
-+
-diff -Nur binutils-2.24.orig/cgen/cpu/nds32.opc binutils-2.24/cgen/cpu/nds32.opc
---- binutils-2.24.orig/cgen/cpu/nds32.opc 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds32.opc 2016-06-30 21:26:12.637892490 +0200
-@@ -0,0 +1,2157 @@
-+/* nds32.opc -- Andes NDS32 family CPU opcode support
-+ Andes Technology Corporation
-+
-+ This file is used to complete the CGEN process. (really? NO! you dreamer!)
-+
-+ This file is an addendum to nds32.cpu. Heavy use of C code isn't
-+ appropriate in .cpu files, so it resides here. This especially applies
-+ to assembly/disassembly where parsing/printing can be quite involved.
-+ Such things aren't really part of the specification of the cpu, per se,
-+ so .cpu files provide the general framework and .opc files handle the
-+ nitty-gritty details as necessary.
-+
-+ Each section is delimited with start and end markers.
-+
-+ <arch>-opc.h additions use: "-- opc.h"
-+ <arch>-opc.c additions use: "-- opc.c"
-+ <arch>-asm.c additions use: "-- asm.c"
-+ <arch>-dis.c additions use: "-- dis.c"
-+ <arch>-ibd.h additions use: "-- ibd.h" */
-+
-+/* -- opc.h */
-+
-+/* Allows reason codes to be output when assembler errors occur. */
-+#define CGEN_VERBOSE_ASSEMBLER_ERRORS
-+
-+#undef CGEN_DIS_HASH_SIZE
-+#define CGEN_DIS_HASH_SIZE 128
-+#undef CGEN_DIS_HASH
-+#define CGEN_DIS_HASH(buffer, value) nds32_cgen_dis_hash(buffer, value)
-+extern unsigned int nds32_cgen_dis_hash (const char *, CGEN_INSN_INT);
-+
-+#define CGEN_VALIDATE_INSN_SUPPORTED
-+int nds32_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn);
-+
-+#define parse_insn_special0 nds32_parse_insn_mov55
-+#define parse_insn_special1 NULL
-+#define parse_insn_special21 NULL
-+#define parse_insn_special22 NULL
-+#define parse_insn_special23 NULL
-+#define parse_insn_special24 NULL
-+#define parse_insn_special3 NULL
-+#define parse_insn_special4 NULL
-+#define parse_insn_special5 NULL
-+#define parse_insn_special6 NULL
-+#define parse_insn_special7 NULL
-+#define parse_insn_special8 NULL
-+#define parse_insn_special9 NULL
-+#define parse_insn_special10 NULL
-+#define parse_insn_special11 NULL
-+#define parse_insn_special12 NULL
-+#define parse_insn_special13 NULL
-+#define parse_insn_special14 NULL
-+#define parse_insn_special15 NULL
-+#define parse_insn_special16 NULL
-+#define parse_insn_special17 NULL
-+#define parse_insn_special18 NULL
-+#define parse_insn_special19 NULL
-+#define parse_insn_special20 NULL
-+
-+#define parse_insn_special31 NULL
-+#define parse_insn_special32 NULL
-+#define parse_insn_special33 NULL
-+#define parse_insn_special34 NULL
-+#define parse_insn_special35 NULL
-+
-+#define print_insn_special0 nds32_print_insn_cctl
-+#define print_insn_special1 nds32_print_insn_tlbop
-+#define print_insn_special21 nds32_print_insn_cpe1
-+#define print_insn_special22 nds32_print_insn_cpe2
-+#define print_insn_special23 nds32_print_insn_cpe3
-+#define print_insn_special24 nds32_print_insn_cpe4
-+#define print_insn_special3 nds32_print_insn_mfcpw
-+#define print_insn_special4 nds32_print_insn_mfcpd
-+#define print_insn_special5 nds32_print_insn_mtcpw
-+#define print_insn_special6 nds32_print_insn_mtcpd
-+#define print_insn_special7 nds32_print_insn_mfcppw
-+#define print_insn_special8 nds32_print_insn_mtcppw
-+#define print_insn_special9 nds32_print_insn_shift_op
-+#define print_insn_special10 nds32_print_insn_srai45
-+#define print_insn_special11 nds32_print_insn_srli45
-+#define print_insn_special12 nds32_print_insn_slli333
-+#define print_insn_special13 nds32_print_insn_slti45
-+#define print_insn_special14 nds32_print_insn_sltsi45
-+#define print_insn_special15 nds32_print_insn_arith_op45
-+#define print_insn_special16 nds32_print_insn_arith_op333
-+#define print_insn_special17 nds32_print_insn_swid15
-+#define print_insn_special18 nds32_print_insn_swid15_reg
-+#define print_insn_special19 nds32_print_insn_swid9
-+#define print_insn_special20 nds32_print_insn_load_store_imm
-+
-+#define print_insn_special31 nds32_print_insn_cp_load_store_rr
-+#define print_insn_special32 nds32_print_insn_cp_load_store_rr_bi
-+#define print_insn_special33 nds32_print_insn_cp_load_store_ri
-+#define print_insn_special34 nds32_print_insn_cp_load_store_ri_bi
-+#define print_insn_special35 nds32_print_insn_swid5
-+
-+#define BAD_DWOFFSET "invalid offset - not double word aligned"
-+#define BAD_WOFFSET "invalid offset - not word aligned"
-+#define BAD_HWOFFSET "invalid offset - not half word aligned"
-+#define BAD_RANGEOFFSET "operand out of range (not between -4 and -128)"
-+#define BAD_SHIFTOFFSET "operand out of range (not between 16 and 47)"
-+
-+/* -- opc.c */
-+
-+/* We need to hash the instructions properly to disassemble. The way it works
-+ is to hash the 32-bit instructions to one half of the hash table and 16-bit
-+ instructions to the other half of the hash table. */
-+
-+unsigned int
-+nds32_cgen_dis_hash (const char *buffer, CGEN_INSN_INT value)
-+{
-+ /* Handles 32-bit and 16-bit instructions differently. */
-+ if ((buffer[0] & 0x80) == (IFMT_32 << 7))
-+ /* 7 MSBs for 32-bit instructions. */
-+ return (value >> 25) & 0x7f;
-+ else
-+ /* 5 MSBs for 16-bit instructions. */
-+ return (value >> 9) & 0x7c;
-+}
-+
-+/* Special check to ensure that instruction exists for given machine. */
-+
-+int
-+nds32_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
-+{
-+ int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
-+
-+ /* If attributes are absent, assume no restriction. */
-+ if (machs == 0)
-+ machs = ~0;
-+
-+ return (machs & cd->machs);
-+}
-+
-+/* -- asm.c */
-+
-+#include <ctype.h>
-+
-+static const char *MISSING_CLOSING_PARENTHESIS = N_("missing `)'");
-+
-+/* Handle '#' prefixes (i.e. skip over them). */
-+
-+static const char *
-+parse_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp,
-+ int opindex ATTRIBUTE_UNUSED, long *valuep ATTRIBUTE_UNUSED)
-+{
-+ if (**strp == '#')
-+ ++*strp;
-+ return NULL;
-+}
-+
-+#define INVALID_IMMEDIATE_SPECIFICATION "Invalid immediate specified."
-+
-+static const char *
-+parse_unsigned_immediate (CGEN_CPU_DESC cd, const char **strp, int opindex,
-+ unsigned long *valuep)
-+{
-+ /* Ignore leading #. */
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ /* A simple test to disable acceptance of register names as immediate. */
-+ if (ISALPHA (**strp) || **strp == '$')
-+ return INVALID_IMMEDIATE_SPECIFICATION;
-+ else
-+ return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
-+}
-+
-+static const char *
-+nds32_parse_signed_integer (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, long *valuep, int nbits)
-+{
-+ /* A simple test to disable acceptance of register names as immediate. */
-+ if (**strp == '$')
-+ return INVALID_IMMEDIATE_SPECIFICATION;
-+ else
-+ {
-+ bfd_vma value;
-+ enum cgen_parse_operand_result result;
-+ const char *errmsg;
-+
-+ errmsg = (*cd->parse_operand_fn)
-+ (cd, CGEN_PARSE_OPERAND_INTEGER, strp, opindex, BFD_RELOC_NONE,
-+ &result, &value);
-+ /* Examine `result'. */
-+ if (!errmsg)
-+ {
-+ *valuep = value;
-+ if (*valuep & 0x80000000)
-+ *valuep |= (long) -1 << 31;
-+ if (result == CGEN_PARSE_OPERAND_RESULT_QUEUED)
-+ errmsg = _("big number out of range");
-+ else if (result == CGEN_PARSE_OPERAND_RESULT_REGISTER)
-+ errmsg = _("immediate value expected - not register");
-+ else
-+ {
-+ if (*valuep >= (1 << nbits) || *valuep < -(1 << nbits))
-+ errmsg = _("number out of range");
-+ }
-+ }
-+
-+ return errmsg;
-+ }
-+}
-+
-+static const char *
-+nds32_parse_unsigned_integer (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, unsigned long *valuep,
-+ int nbits)
-+{
-+ /* A simple test to disable acceptance of register names as immediate. */
-+ if (**strp == '$')
-+ return INVALID_IMMEDIATE_SPECIFICATION;
-+ else
-+ {
-+ bfd_vma value;
-+ enum cgen_parse_operand_result result;
-+ const char *errmsg;
-+
-+ errmsg = (*cd->parse_operand_fn)
-+ (cd, CGEN_PARSE_OPERAND_INTEGER, strp, opindex, BFD_RELOC_NONE,
-+ &result, &value);
-+ /* Examine `result'. */
-+ if (!errmsg)
-+ {
-+ *valuep = value;
-+ if (result == CGEN_PARSE_OPERAND_RESULT_QUEUED)
-+ errmsg = _("big number out of range");
-+ else if (result == CGEN_PARSE_OPERAND_RESULT_REGISTER)
-+ errmsg = _("immediate value expected - not register");
-+ else
-+ {
-+ if ((*valuep >> nbits) > 0)
-+ errmsg = _("number out of range");
-+ }
-+ }
-+
-+ return errmsg;
-+ }
-+}
-+
-+/* This function handles PC-relative address. */
-+
-+static const char *
-+parse_nds32_address (CGEN_CPU_DESC cd, const char **strp, int opindex,
-+ long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ errmsg = cgen_parse_address (cd, strp, opindex, 0, &result_type, &value);
-+
-+ if (result_type == CGEN_PARSE_OPERAND_RESULT_REGISTER
-+ || result_type == CGEN_PARSE_OPERAND_RESULT_ERROR)
-+ {
-+ errmsg = _("immediate value expected - "
-+ "possibly use register as immediate value");
-+ }
-+ else
-+ {
-+ *valuep = value;
-+ }
-+
-+ return errmsg;
-+}
-+
-+
-+static const char *
-+nds32_parse_trunc_signed_integer (CGEN_CPU_DESC cd, const char **strp,
-+ int opindex, long *valuep, int nbits)
-+{
-+ /* A simple test to disable acceptance of register names as immediate. */
-+ if (**strp == '$')
-+ return INVALID_IMMEDIATE_SPECIFICATION;
-+ else
-+ {
-+ bfd_vma value;
-+ enum cgen_parse_operand_result result;
-+ const char *errmsg;
-+
-+ errmsg = (*cd->parse_operand_fn)
-+ (cd, CGEN_PARSE_OPERAND_INTEGER, strp, opindex, BFD_RELOC_NONE,
-+ &result, &value);
-+ /* Examine `result'. */
-+ if (!errmsg)
-+ {
-+ *valuep = value;
-+ if (result == CGEN_PARSE_OPERAND_RESULT_QUEUED)
-+ errmsg = _("big number out of range");
-+ else if (result == CGEN_PARSE_OPERAND_RESULT_REGISTER)
-+ errmsg = _("immediate value expected - not register");
-+ else
-+ {
-+ if (*valuep >= (1 << nbits) || *valuep < -(1 << nbits))
-+ {
-+ errmsg = _("number out of range");
-+ }
-+ }
-+ *valuep &= ((1 << (nbits + 1)) - 1);
-+ }
-+
-+ return errmsg;
-+ }
-+}
-+
-+/* This function handles hi20(). This part is simple - it just extracts
-+ the high 20 bits. */
-+
-+static const char *
-+parse_uhi20 (CGEN_CPU_DESC cd, const char **strp, int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ /* Ignore leading #. */
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ /* If user is using hi20(). */
-+ if (strncasecmp (*strp, "hi20(", 5) == 0)
-+ {
-+ *strp += 5;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_HI20,
-+ &result_type, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ {
-+ value >>= 12;
-+ value &= 0xfffff;
-+ }
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return nds32_parse_unsigned_integer (cd, strp, opindex, valuep, 20);
-+}
-+
-+/* This function handles lo20(). This part is simple - it just extracts the
-+ sign extended low 20 bits. */
-+
-+static const char *
-+parse_slo20 (CGEN_CPU_DESC cd, const char **strp, int opindex, long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ /* Ignore leading #. */
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ /* If user is using lo20(). */
-+ if (strncasecmp (*strp, "lo20(", 5) == 0)
-+ {
-+ long svalue;
-+
-+ *strp += 5;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_20,
-+ &result_type, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+
-+ ++*strp;
-+ *(unsigned long *) &svalue = value;
-+ if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ svalue = (svalue << 12) >> 12;
-+ *valuep = svalue;
-+ return errmsg;
-+ }
-+
-+ return nds32_parse_signed_integer (cd, strp, opindex, valuep, 19);
-+}
-+
-+/* This function handles lo12(). This part is not simple. If lo12() is
-+ found, it just extracts the low 12 bits and check used in what kind
-+ of instruction: li or la -
-+ should be translated into sethi and ori instruction pair
-+ {ls}b{i}{.p} or {l}bs{i}{.p} -
-+ should be translated into sethi and load/store instruction pair
-+ Otherwise, it is treated as an signed integer. */
-+
-+static const char *
-+parse_slo19 (CGEN_CPU_DESC cd, const char **strp, int opindex, long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result;
-+ bfd_vma value;
-+
-+ /* Ignore leading #. */
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ /* If user is using sda(). */
-+ if (strncasecmp (*strp, "sda(", 4) == 0)
-+ {
-+ *strp += 4;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_SDA19S0,
-+ NULL, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ /* jasonwu, for lbi.gp: if user is using symbol. */
-+ if (ISALPHA (**strp) || **strp == '_' || **strp == '.')
-+ {
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_SDA19S0,
-+ NULL, &value);
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return nds32_parse_signed_integer (cd, strp, opindex, valuep, 18);
-+}
-+
-+
-+/* This function handles lo12(). This part is not simple. If lo12() is
-+ found, it just extracts the low 12 bits and check used in what kind
-+ of instruction: li or la -
-+ should be translated into sethi and ori instruction pair
-+ {ls}h{i}{.p} or {l}hs{i}{.p} -
-+ should be translated into sethi and load/store instruction pair
-+ Otherwise, it is treated as an signed integer. */
-+
-+static const char *
-+parse_slo18h (CGEN_CPU_DESC cd, const char **strp, int opindex, long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result;
-+ bfd_vma value;
-+
-+ /* Ignore leading # */
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ /* If user is using sda(). */
-+ if (strncasecmp (*strp, "sda(", 4) == 0)
-+ {
-+ *strp += 4;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_SDA18S1,
-+ NULL, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ /* jasonwu, for lbi.gp: if user is using symbol. */
-+ if (ISALPHA (**strp) || **strp == '_' || **strp == '.')
-+ {
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_SDA18S1,
-+ NULL, &value);
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return nds32_parse_signed_integer (cd, strp, opindex, valuep, 17 + 1);
-+}
-+
-+/* This function handles lo12(). This part is not simple. If lo12() is
-+ found, it just extracts the low 12 bits and check used in what kind
-+ of instruction: li or la -
-+ should be translated into sethi and ori instruction pair
-+ {ls}w{i}{.p} -
-+ should be translated into sethi and load/store instruction pair.
-+ Otherwise, it is treated as an signed integer. */
-+
-+static const char *
-+parse_slo17w (CGEN_CPU_DESC cd, const char **strp, int opindex, long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result;
-+ bfd_vma value;
-+
-+ /* Ignore leading #. */
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ /* If user is using sda(). */
-+ if (strncasecmp (*strp, "sda(", 4) == 0)
-+ {
-+ *strp += 4;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_SDA17S2,
-+ NULL, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ /* jasonwu, for lbi.gp: if user is using symbol. */
-+ if (ISALPHA (**strp) || **strp == '_' || **strp == '.')
-+ {
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_SDA17S2,
-+ NULL, &value);
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return nds32_parse_signed_integer (cd, strp, opindex, valuep, 16 + 2);
-+}
-+
-+/* This function handles lo12(). This part is not simple. If lo12() is
-+ found, it just extracts the low 12 bits and check used in what kind
-+ of instruction: li or la -
-+ should be translated into sethi and ori instruction pair
-+ {ls}w{i}{.p} -
-+ should be translated into sethi and load/store instruction pair.
-+ Otherwise, it is treated as an unsigned integer. */
-+
-+static const char *
-+parse_ulo15d (CGEN_CPU_DESC cd, const char **strp, int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ /* Ignore leading #. */
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ /* If user is using lo12(). */
-+ if (strncasecmp (*strp, "lo12(", 5) == 0)
-+ {
-+ *strp += 5;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_LO12S3,
-+ &result_type, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value &= 0xfff;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return nds32_parse_unsigned_integer (cd, strp, opindex, valuep, 15 + 3);
-+}
-+
-+/* This function handles lo12(). This part is not simple. If lo12() is found,
-+ it just extracts the low 12 bits and check used in what kind of instruction:
-+ li or la -
-+ should be translated into sethi and ori instruction pair
-+ {ls}w{i}{.p} -
-+ should be translated into sethi and load/store instruction pair.
-+ Otherwise, it is treated as an signed integer. */
-+
-+static const char *
-+parse_slo15d (CGEN_CPU_DESC cd, const char **strp, int opindex, long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ /* Ignore leading #. */
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ /* If user is using lo12(). */
-+ if (strncasecmp (*strp, "lo12(", 5) == 0)
-+ {
-+ *strp += 5;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_LO12S3,
-+ &result_type, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value &= 0xfff;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ /* If user is using sda(); NOTE: we can't support sda(sym) + addend yet. */
-+ if (strncasecmp (*strp, "sda(", 4) == 0)
-+ {
-+ *strp += 4;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_SDA15S3,
-+ NULL, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ /* If user is using other symbol. */
-+ if (ISALPHA (**strp) || **strp == '_' || **strp == '.')
-+ {
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_SDA15S3,
-+ NULL, &value);
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return nds32_parse_signed_integer (cd, strp, opindex, valuep, 14 + 3);
-+}
-+
-+/* This function handles lo12(). This part is not simple. If lo12() is found,
-+ it just extracts the low 12 bits and check used in what kind of instruction:
-+ li or la -
-+ should be translated into sethi and ori instruction pair
-+ {ls}w{i}{.p} -
-+ should be translated into sethi and load/store instruction pair.
-+ Otherwise, it is treated as an unsigned integer. */
-+
-+static const char *
-+parse_ulo15w (CGEN_CPU_DESC cd, const char **strp, int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ /* Ignore leading #. */
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ /* If user is using lo12(). */
-+ if (strncasecmp (*strp, "lo12(", 5) == 0)
-+ {
-+ *strp += 5;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_LO12S2,
-+ &result_type, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value &= 0xfff;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return nds32_parse_unsigned_integer (cd, strp, opindex, valuep, 15 + 2);
-+}
-+
-+/* This function handles lo12(). This part is not simple. If lo12() is found,
-+ it just extracts the low 12 bits and check used in what kind of instruction:
-+ li or la -
-+ should be translated into sethi and ori instruction pair
-+ {ls}w{i}{.p} -
-+ should be translated into sethi and load/store instruction pair.
-+ Otherwise, it is treated as an signed integer. */
-+
-+static const char *
-+parse_slo15w (CGEN_CPU_DESC cd, const char **strp, int opindex, long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ /* Ignore leading # */
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ /* If user is using lo12(). */
-+ if (strncasecmp (*strp, "lo12(", 5) == 0)
-+ {
-+ *strp += 5;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_LO12S2,
-+ &result_type, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value &= 0xfff;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ /* If user is using sda(). */
-+ if (strncasecmp (*strp, "sda(", 4) == 0)
-+ {
-+ *strp += 4;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_SDA15S2,
-+ NULL, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ /* If user is using other symbol. */
-+ if (ISALPHA (**strp) || **strp == '_' || **strp == '.')
-+ {
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_SDA15S2,
-+ NULL, &value);
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return nds32_parse_signed_integer (cd, strp, opindex, valuep, 14 + 2);
-+}
-+
-+/* It just extracts the sign extended low 12 bits. */
-+
-+static const char *
-+parse_slo12w (CGEN_CPU_DESC cd, const char **strp, int opindex, long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ /* Ignore leading #. */
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ /* If user is using lo12(). */
-+ if (strncasecmp (*strp, "lo12(", 5) == 0)
-+ {
-+ *strp += 5;
-+ errmsg =
-+ cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_LO12S2_SP,
-+ &result_type, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value &= 0xfff;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ /* If user is using sda(). */
-+ if (strncasecmp (*strp, "sda(", 4) == 0)
-+ {
-+ *strp += 4;
-+ errmsg =
-+ cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_SDA12S2_SP,
-+ NULL, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ /* If user is using other symbol. */
-+ if (ISALPHA (**strp) || **strp == '_' || **strp == '.' || **strp == '$')
-+ {
-+ errmsg =
-+ cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_SDA12S2_SP,
-+ NULL, &value);
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return nds32_parse_signed_integer (cd, strp, opindex, valuep, 11 + 2);
-+}
-+
-+
-+/* It just extracts the sign extended low 12 bits. */
-+
-+static const char *
-+parse_slo12d (CGEN_CPU_DESC cd, const char **strp, int opindex, long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ /* Ignore leading #. */
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ /* If user is using lo12(). */
-+ if (strncasecmp (*strp, "lo12(", 5) == 0)
-+ {
-+ *strp += 5;
-+ errmsg = cgen_parse_address (cd, strp, opindex,
-+ BFD_RELOC_NDS32_LO12S2_DP,
-+ &result_type, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value &= 0xfff;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ /* If user is using sda(). */
-+ if (strncasecmp (*strp, "sda(", 4) == 0)
-+ {
-+ *strp += 4;
-+ errmsg =
-+ cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_SDA12S2_DP,
-+ NULL, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ /* If user is using other symbol. */
-+ if (ISALPHA (**strp) || **strp == '_' || **strp == '.' || **strp == '$')
-+ {
-+ errmsg =
-+ cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_SDA12S2_DP,
-+ NULL, &value);
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return nds32_parse_signed_integer (cd, strp, opindex, valuep, 11 + 2);
-+}
-+
-+
-+/* This function handles lo12(). This part is not simple. If lo12() is found,
-+ it just extracts the low 12 bits and check used in what kind of instruction:
-+ li or la -
-+ should be translated into sethi and ori instruction pair
-+ {ls}h{i}{.p} or {l}hs{i}{.p} -
-+ should be translated into sethi and load/store instruction pair
-+ Otherwise, it is treated as an unsigned integer. */
-+
-+static const char *
-+parse_ulo15h (CGEN_CPU_DESC cd,
-+ const char **strp, int opindex, unsigned long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ /* Ignore leading #. */
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ /* If user is using lo12(). */
-+ if (strncasecmp (*strp, "lo12(", 5) == 0)
-+ {
-+ *strp += 5;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_LO12S1,
-+ &result_type, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value &= 0xfff;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return nds32_parse_unsigned_integer (cd, strp, opindex, valuep, 15 + 1);
-+}
-+
-+/* This function handles lo12(). This part is not simple. If lo12() is found,
-+ it just extracts the low 12 bits and check used in what kind of instruction:
-+ li or la -
-+ should be translated into sethi and ori instruction pair
-+ {ls}h{i}{.p} or {l}hs{i}{.p} -
-+ should be translated into sethi and load/store instruction pair
-+ Otherwise, it is treated as an signed integer. */
-+
-+static const char *
-+parse_slo15h (CGEN_CPU_DESC cd, const char **strp, int opindex, long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ /* Ignore leading #. */
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ /* If user is using lo12(). */
-+ if (strncasecmp (*strp, "lo12(", 5) == 0)
-+ {
-+ *strp += 5;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_LO12S1,
-+ &result_type, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value &= 0xfff;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ /* If user is using sda(). */
-+ if (strncasecmp (*strp, "sda(", 4) == 0)
-+ {
-+ *strp += 4;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_SDA15S1,
-+ NULL, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ /* If user is using other symbol. */
-+ if (ISALPHA (**strp) || **strp == '_' || **strp == '.')
-+ {
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_SDA15S1,
-+ NULL, &value);
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return nds32_parse_signed_integer (cd, strp, opindex, valuep, 14 + 1);
-+}
-+
-+/* This function handles lo12(). This part is not simple. If lo12() is
-+ found, it just extracts the low 12 bits and check used in what kind
-+ of instruction: li or la -
-+ should be translated into sethi and ori instruction pair
-+ {ls}b{i}{.p} or {l}bs{i}{.p} -
-+ should be translated into sethi and load/store instruction pair
-+ Otherwise, it is treated as an unsigned integer. */
-+
-+static const char *
-+parse_ulo15 (CGEN_CPU_DESC cd,
-+ const char **strp, int opindex, unsigned long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ /* Ignore leading #. */
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ /* If user is using lo12(). */
-+ if (strncasecmp (*strp, "lo12(", 5) == 0)
-+ {
-+ *strp += 5;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_LO12S0,
-+ &result_type, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value &= 0xfff;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return nds32_parse_unsigned_integer (cd, strp, opindex, valuep, 15);
-+}
-+
-+/* This function handles lo12(). This part is not simple. If lo12() is
-+ found, it just extracts the low 12 bits and check used in what kind
-+ of instruction: li or la -
-+ should be translated into sethi and ori instruction pair
-+ {ls}b{i}{.p} or {l}bs{i}{.p} -
-+ should be translated into sethi and load/store instruction pair
-+ Otherwise, it is treated as an signed integer. */
-+
-+static const char *
-+parse_slo15 (CGEN_CPU_DESC cd, const char **strp, int opindex, long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ /* Ignore leading #. */
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ /* If user is using lo12(). */
-+ if (strncasecmp (*strp, "lo12(", 5) == 0)
-+ {
-+ *strp += 5;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_LO12S0,
-+ &result_type, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value &= 0xfff;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ /* If user is using sda(). */
-+ if (strncasecmp (*strp, "sda(", 4) == 0)
-+ {
-+ *strp += 4;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_SDA15S0,
-+ NULL, &value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ /* If user is using other symbol. */
-+ if (ISALPHA (**strp) || **strp == '_' || **strp == '.')
-+ {
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_NDS32_SDA15S0,
-+ NULL, &value);
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return nds32_parse_signed_integer (cd, strp, opindex, valuep, 14);
-+}
-+
-+/* This function treats the 16-bit immediate as unsigned/signed number
-+ for AMTARI instruction of audio extension. */
-+
-+static const char *
-+parse_imm16_a (CGEN_CPU_DESC cd, const char **strp, int opindex,
-+ unsigned long *valuep)
-+{
-+ /* Ignore leading #. */
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ /* A simple test to disable acceptance of register names as immediate. */
-+ if ((*(*strp - 3) == 'm') && (*(*strp + 1) != 'x'))
-+ return nds32_parse_trunc_signed_integer (cd, strp, opindex,
-+ (long *) valuep, 15);
-+ else
-+ return nds32_parse_unsigned_integer (cd, strp, opindex, valuep, 16);
-+}
-+
-+static const char *
-+nds32_parse_insn_mov55 (CGEN_CPU_DESC cd, const CGEN_INSN *insn,
-+ const char **strp, CGEN_FIELDS *fields)
-+{
-+ const char *msg;
-+
-+ msg = parse_insn_normal (cd, insn, strp, fields);
-+ if (msg)
-+ return msg;
-+
-+ /* At-least v3 and rt == ra == $sp.
-+ It is ifret16 in V3. */
-+ if ((cd->machs >> MACH_N1H_V3)
-+ && (fields->f_16_rt5h == fields->f_16_ra5h) && fields->f_16_rt5h == 31)
-+ return "rt == $sp and ra == $sp is not allowed in V3.";
-+ return NULL;
-+}
-+
-+/* -- dis.c */
-+int nds32_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
-+#include "safe-ctype.h"
-+
-+/* Immediate values are prefixed with '#'. */
-+
-+#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \
-+ do \
-+ { \
-+ if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX)) \
-+ (*info->fprintf_func)(info->stream, "#"); \
-+ } \
-+ while (0)
-+
-+/* Handle '#' prefixes as operands. */
-+
-+static void
-+print_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, void *dis_info,
-+ long value ATTRIBUTE_UNUSED,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED, int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ (*info->fprintf_func) (info->stream, "#");
-+}
-+
-+/* This function does the same as print_insn_normal but expects ignoring
-+ first 1 or first 2 operands depending on the 3rd operand. */
-+
-+static void
-+nds32_print_insn_cctl (CGEN_CPU_DESC cd, void *dis_info,
-+ const CGEN_INSN *insn, CGEN_FIELDS *fields,
-+ bfd_vma pc, int length)
-+{
-+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ const CGEN_SYNTAX_CHAR_TYPE *syn;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ /* Print instruction mneumonics and space followed. */
-+ syn = CGEN_SYNTAX_STRING (syntax);
-+ (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ /* cctlst: f_32t4_ext5 field. */
-+ switch (fields->f_32t4_ext5)
-+ {
-+ case 3:
-+ case 4:
-+ case 5:
-+ case 6:
-+ case 19:
-+ case 20:
-+ case 21:
-+ case 22:
-+ /* Print first 2 register operands. */
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+ break;
-+ case 0:
-+ case 1:
-+ case 2:
-+ case 11:
-+ case 12:
-+ case 16:
-+ case 27:
-+ case 28:
-+ /* Ignore first register operand. */
-+ syn += 3;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+ break;
-+ case 8:
-+ case 9:
-+ case 10:
-+ case 24:
-+ /* Ignore first register operand. */
-+ syn += 3;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+ break;
-+ case 7:
-+ /* Ignore first 2 register operands. */
-+ syn += 5;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+ break;
-+ case 15:
-+ /* Ignore first 2 register operands. */
-+ syn += 5;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+ break;
-+ default:
-+ /* Should never happen. */
-+ break;
-+ }
-+}
-+
-+static void
-+nds32_print_insn_tlbop (CGEN_CPU_DESC cd, void *dis_info, const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields, bfd_vma pc, int length)
-+{
-+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ const CGEN_SYNTAX_CHAR_TYPE *syn;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ /* Print instruction neumonics and space followed. */
-+ syn = CGEN_SYNTAX_STRING (syntax);
-+ (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ switch (fields->f_32t4_ext5)
-+ {
-+ case 5:
-+ /* Print first 2 register operands. */
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+ break;
-+ case 0:
-+ case 1:
-+ case 2:
-+ case 3:
-+ case 4:
-+ case 6:
-+ /* Ignore first register operand. */
-+ syn += 3;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+ break;
-+ case 7:
-+ /* Ignore first 2 register operands. */
-+ syn += 5;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+ break;
-+ default:
-+ /* Should never happen. */
-+ break;
-+ }
-+}
-+
-+static void
-+nds32_print_insn_shift_op (CGEN_CPU_DESC cd, void *dis_info,
-+ const CGEN_INSN *insn, CGEN_FIELDS *fields,
-+ bfd_vma pc, int length)
-+{
-+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ const CGEN_SYNTAX_CHAR_TYPE *syn;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ if (0 == strcmp (CGEN_INSN_MNEMONIC (insn), "srli") && 0 == fields->f_32_rt5
-+ && 0 == fields->f_32_ra5 && 0 == fields->f_32t3_uimm5)
-+ {
-+ (*info->fprintf_func) (info->stream, "%s", "nop");
-+ }
-+ else
-+ {
-+ /* Print instruction mneumonics and space followed. */
-+ syn = CGEN_SYNTAX_STRING (syntax);
-+ (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ /* Print first 2 register operands. */
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ print_normal (cd, info, fields->f_32t3_uimm5,
-+ 0 | (1 << CGEN_OPERAND_SIGNED)
-+ | (1 << CGEN_OPERAND_HASH_PREFIX),
-+ pc, length);
-+ }
-+}
-+
-+static void
-+nds32_print_insn_srai45 (CGEN_CPU_DESC cd, void *dis_info,
-+ const CGEN_INSN *insn, CGEN_FIELDS *fields,
-+ bfd_vma pc, int length)
-+{
-+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ const CGEN_SYNTAX_CHAR_TYPE *syn;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ /* Print instruction mneumonics and space followed. */
-+ syn = CGEN_SYNTAX_STRING (syntax);
-+ (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ /* Print first 1 register operands. */
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ print_normal (cd, info, fields->f_16_uimm5,
-+ 0 | (1 << CGEN_OPERAND_SIGNED)
-+ | (1 << CGEN_OPERAND_HASH_PREFIX),
-+ pc, length);
-+}
-+
-+static void
-+nds32_print_insn_srli45 (CGEN_CPU_DESC cd, void *dis_info,
-+ const CGEN_INSN *insn, CGEN_FIELDS *fields,
-+ bfd_vma pc, int length)
-+{
-+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ const CGEN_SYNTAX_CHAR_TYPE *syn;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ if (0 == fields->f_16_uimm5 && 0 == fields->f_16_rt4)
-+ {
-+ (*info->fprintf_func) (info->stream, "%s", "nop16");
-+ }
-+ else
-+ {
-+ /* Print instruction mneumonics and space followed. */
-+ syn = CGEN_SYNTAX_STRING (syntax);
-+ (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ /* Print first 1 register operands. */
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ print_normal (cd, info, fields->f_16_uimm5,
-+ 0 | (1 << CGEN_OPERAND_SIGNED)
-+ | (1 << CGEN_OPERAND_HASH_PREFIX),
-+ pc, length);
-+ }
-+}
-+
-+static void
-+nds32_print_insn_slli333 (CGEN_CPU_DESC cd, void *dis_info, const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields, bfd_vma pc, int length)
-+{
-+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ const CGEN_SYNTAX_CHAR_TYPE *syn;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ /* Print instruction mneumonics and space followed. */
-+ syn = CGEN_SYNTAX_STRING (syntax);
-+ (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ /* Print first 2 register operands. */
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ print_normal (cd, info, fields->f_16_uimm3,
-+ 0 | (1 << CGEN_OPERAND_SIGNED)
-+ | (1 << CGEN_OPERAND_HASH_PREFIX),
-+ pc, length);
-+}
-+
-+static void
-+nds32_print_insn_slti45 (CGEN_CPU_DESC cd, void *dis_info,
-+ const CGEN_INSN *insn, CGEN_FIELDS *fields,
-+ bfd_vma pc, int length)
-+{
-+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ const CGEN_SYNTAX_CHAR_TYPE *syn;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ /* Print instruction mneumonics and space followed. */
-+ syn = CGEN_SYNTAX_STRING (syntax);
-+ (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ /* Print first 1 register operands. */
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ print_normal (cd, info, fields->f_16_uimm5,
-+ 0 | (1 << CGEN_OPERAND_SIGNED)
-+ | (1 << CGEN_OPERAND_HASH_PREFIX),
-+ pc, length);
-+}
-+
-+static void
-+nds32_print_insn_sltsi45 (CGEN_CPU_DESC cd, void *dis_info,
-+ const CGEN_INSN *insn, CGEN_FIELDS *fields,
-+ bfd_vma pc, int length)
-+{
-+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ const CGEN_SYNTAX_CHAR_TYPE *syn;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ /* Print instruction mneumonics and space followed. */
-+ syn = CGEN_SYNTAX_STRING (syntax);
-+ (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ /* Print first 1 register operands. */
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ print_normal (cd, info, fields->f_16_uimm5,
-+ 0 | (1 << CGEN_OPERAND_SIGNED)
-+ | (1 << CGEN_OPERAND_HASH_PREFIX),
-+ pc, length);
-+}
-+
-+static void
-+nds32_print_insn_arith_op45 (CGEN_CPU_DESC cd, void *dis_info,
-+ const CGEN_INSN *insn, CGEN_FIELDS *fields,
-+ bfd_vma pc, int length)
-+{
-+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ const CGEN_SYNTAX_CHAR_TYPE *syn;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ /* Print instruction mneumonics and space followed. */
-+ syn = CGEN_SYNTAX_STRING (syntax);
-+ (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ /* Print first 1 register operands. */
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ print_normal (cd, info, fields->f_16_uimm5,
-+ 0 | (1 << CGEN_OPERAND_SIGNED)
-+ | (1 << CGEN_OPERAND_HASH_PREFIX),
-+ pc, length);
-+}
-+
-+static void
-+nds32_print_insn_arith_op333 (CGEN_CPU_DESC cd, void *dis_info,
-+ const CGEN_INSN *insn, CGEN_FIELDS *fields,
-+ bfd_vma pc, int length)
-+{
-+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ const CGEN_SYNTAX_CHAR_TYPE *syn;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ /* Print instruction mneumonics and space followed. */
-+ syn = CGEN_SYNTAX_STRING (syntax);
-+ (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ /* Print first 2 register operands. */
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ print_normal (cd, info, fields->f_16_uimm3,
-+ 1 << CGEN_OPERAND_SIGNED | 1 << CGEN_OPERAND_HASH_PREFIX, pc,
-+ length);
-+}
-+
-+static void
-+nds32_print_insn_swid15 (CGEN_CPU_DESC cd, void *dis_info, const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields, bfd_vma pc, int length)
-+{
-+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ const CGEN_SYNTAX_CHAR_TYPE *syn;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ /* Print instruction mneumonics and space followed. */
-+ syn = CGEN_SYNTAX_STRING (syntax);
-+ (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ print_normal (cd, info, fields->f_32t3_swid15,
-+ 0 | (1 << CGEN_OPERAND_SIGNED)
-+ | (1 << CGEN_OPERAND_HASH_PREFIX),
-+ pc, length);
-+}
-+
-+static void
-+nds32_print_insn_swid15_reg (CGEN_CPU_DESC cd, void *dis_info,
-+ const CGEN_INSN *insn, CGEN_FIELDS *fields,
-+ bfd_vma pc, int length)
-+{
-+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ const CGEN_SYNTAX_CHAR_TYPE *syn;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ /* Print instruction mneumonics and space followed. */
-+ syn = CGEN_SYNTAX_STRING (syntax);
-+ (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ /* Print first 1 register operands. */
-+ syn++;
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc, length);
-+
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ print_normal (cd, info, fields->f_32t3_swid15,
-+ 0 | (1 << CGEN_OPERAND_SIGNED) | (1 <<
-+ CGEN_OPERAND_HASH_PREFIX),
-+ pc, length);
-+}
-+
-+ATTRIBUTE_UNUSED static void
-+nds32_print_insn_swid5 (CGEN_CPU_DESC cd, void *dis_info, const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields, bfd_vma pc, int length)
-+{
-+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ const CGEN_SYNTAX_CHAR_TYPE *syn;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ /* Print instruction mneumonics and space followed. */
-+ syn = CGEN_SYNTAX_STRING (syntax);
-+ (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ print_normal (cd, info, fields->f_16_swid5,
-+ 0 | (1 << CGEN_OPERAND_SIGNED)
-+ | (1 << CGEN_OPERAND_HASH_PREFIX),
-+ pc, length);
-+}
-+
-+static void
-+print_unsigned_immediate (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void *dis_info, long value,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = dis_info;
-+ (*info->fprintf_func) (info->stream, "#%d", (int) value);
-+}
-+
-+ATTRIBUTE_UNUSED static void
-+nds32_print_insn_swid9 (CGEN_CPU_DESC cd, void *dis_info,
-+ const CGEN_INSN *insn, CGEN_FIELDS *fields,
-+ bfd_vma pc, int length)
-+{
-+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ const CGEN_SYNTAX_CHAR_TYPE *syn;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ /* Print instruction mneumonics and space followed. */
-+ syn = CGEN_SYNTAX_STRING (syntax);
-+ (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
-+ syn++;
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+
-+ print_normal (cd, info, fields->f_16_swid9,
-+ 0 | (1 << CGEN_OPERAND_SIGNED)
-+ | (1 << CGEN_OPERAND_HASH_PREFIX),
-+ pc, length);
-+}
-+
-+static void
-+nds32_print_insn_load_store_imm (CGEN_CPU_DESC cd, void *dis_info,
-+ const CGEN_INSN *insn, CGEN_FIELDS *fields,
-+ bfd_vma pc, int length)
-+{
-+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ const CGEN_SYNTAX_CHAR_TYPE *syn;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
-+ {
-+ if (CGEN_SYNTAX_MNEMONIC_P (*syn))
-+ {
-+ (*info->fprintf_func) (info->stream, "%s",
-+ CGEN_INSN_MNEMONIC (insn));
-+ continue;
-+ }
-+ if (CGEN_SYNTAX_CHAR_P (*syn))
-+ {
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+ continue;
-+ }
-+
-+ /* We have an operand. */
-+ if (NDS32_OPERAND_SLO15W == CGEN_SYNTAX_FIELD (*syn))
-+ {
-+ /* Immediate field. */
-+#ifdef CGEN_PRINT_NORMAL
-+ CGEN_PRINT_NORMAL (cd, info, fields->f_32t2_slo15w,
-+ 0 | (1 << CGEN_OPERAND_SIGNED)
-+ | (1 << CGEN_OPERAND_HASH_PREFIX),
-+ pc, length);
-+#endif
-+ if (fields->f_32t2_slo15w & 0x80000000)
-+ {
-+ long temp;
-+
-+ (*info->fprintf_func) (info->stream, "%s", "-0x");
-+ temp = fields->f_32t2_slo15w;
-+ temp = ~temp;
-+ temp++;
-+ (*info->fprintf_func) (info->stream, "%lx", temp);
-+ }
-+ else
-+ {
-+ (*info->fprintf_func) (info->stream, "%s", "0x");
-+ (*info->fprintf_func) (info->stream, "%lx",
-+ fields->f_32t2_slo15w);
-+ }
-+ }
-+ else if (NDS32_OPERAND_SLO15H == CGEN_SYNTAX_FIELD (*syn))
-+ {
-+ /* Immediate field. */
-+#ifdef CGEN_PRINT_NORMAL
-+ CGEN_PRINT_NORMAL (cd, info, fields->f_32t2_slo15h,
-+ 0 | (1 << CGEN_OPERAND_SIGNED)
-+ | (1 << CGEN_OPERAND_HASH_PREFIX),
-+ pc, length);
-+#endif
-+ if (fields->f_32t2_slo15h & 0x80000000)
-+ {
-+ long temp;
-+
-+ (*info->fprintf_func) (info->stream, "%s", "-0x");
-+ temp = fields->f_32t2_slo15h;
-+ temp = ~temp;
-+ temp++;
-+ (*info->fprintf_func) (info->stream, "%lx", temp);
-+ }
-+ else
-+ {
-+ (*info->fprintf_func) (info->stream, "%s", "0x");
-+ (*info->fprintf_func) (info->stream, "%lx",
-+ fields->f_32t2_slo15h);
-+ }
-+ }
-+ else if (NDS32_OPERAND_SLO15B == CGEN_SYNTAX_FIELD (*syn))
-+ {
-+ /* Immediate field. */
-+#ifdef CGEN_PRINT_NORMAL
-+ CGEN_PRINT_NORMAL (cd, info, fields->f_32t2_slo15b,
-+ 0 | (1 << CGEN_OPERAND_SIGNED)
-+ | (1 << CGEN_OPERAND_HASH_PREFIX),
-+ pc, length);
-+#endif
-+ if (fields->f_32t2_slo15b & 0x80000000)
-+ {
-+ long temp;
-+
-+ (*info->fprintf_func) (info->stream, "%s", "-0x");
-+ temp = fields->f_32t2_slo15b;
-+ temp = ~temp;
-+ temp++;
-+ (*info->fprintf_func) (info->stream, "%lx", temp);
-+ }
-+ else
-+ {
-+ (*info->fprintf_func) (info->stream, "%s", "0x");
-+ (*info->fprintf_func) (info->stream, "%lx",
-+ fields->f_32t2_slo15b);
-+ }
-+ }
-+ else
-+ {
-+ /* Register field. */
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc,
-+ length);
-+ }
-+ }
-+}
-+
-+static void
-+print_insn_lsmw (CGEN_CPU_DESC cd, void *dis_info,
-+ const CGEN_INSN *insn, CGEN_FIELDS *fields, bfd_vma pc,
-+ int length)
-+{
-+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ const CGEN_SYNTAX_CHAR_TYPE *syn;
-+ char forerunner = 0;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
-+ {
-+ if (CGEN_SYNTAX_MNEMONIC_P (*syn))
-+ (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
-+ else if (CGEN_SYNTAX_CHAR_P (*syn))
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+ else if (CGEN_SYNTAX_FIELD (*syn) == NDS32_OPERAND_MASK4)
-+ {
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc,
-+ length);
-+ }
-+ else
-+ {
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
-+ fields, CGEN_INSN_ATTRS (insn), pc,
-+ length);
-+ }
-+ }
-+
-+ (*info->fprintf_func) (info->stream, " ! {");
-+
-+ if (fields->f_32_rt5 == fields->f_32_rb5)
-+ {
-+ if (fields->f_32_rt5 != 31)
-+ {
-+ cd->print_operand (cd, NDS32_OPERAND_RT5, info, fields,
-+ CGEN_INSN_ATTRS (insn), pc, length);
-+ forerunner = 1;
-+ }
-+ }
-+ else
-+ {
-+ cd->print_operand (cd, NDS32_OPERAND_RT5, info, fields,
-+ CGEN_INSN_ATTRS (insn), pc, length);
-+ (*info->fprintf_func) (info->stream, "~");
-+ cd->print_operand (cd, NDS32_OPERAND_RB5, info, fields,
-+ CGEN_INSN_ATTRS (insn), pc, length);
-+ forerunner = 1;
-+ }
-+ if (0x8 & fields->f_32t5_mask4)
-+ {
-+ if (forerunner)
-+ (*info->fprintf_func) (info->stream, ", ");
-+ (*info->fprintf_func) (info->stream, "$fp");
-+ forerunner = 1;
-+ }
-+ if (0x4 & fields->f_32t5_mask4)
-+ {
-+ if (forerunner)
-+ (*info->fprintf_func) (info->stream, ", ");
-+ (*info->fprintf_func) (info->stream, "$gp");
-+ forerunner = 1;
-+ }
-+ if (0x2 & fields->f_32t5_mask4)
-+ {
-+ if (forerunner)
-+ (*info->fprintf_func) (info->stream, ", ");
-+ (*info->fprintf_func) (info->stream, "$lp");
-+ forerunner = 1;
-+ }
-+ if (0x1 & fields->f_32t5_mask4)
-+ {
-+ if (forerunner)
-+ (*info->fprintf_func) (info->stream, ", ");
-+ (*info->fprintf_func) (info->stream, "$sp");
-+ forerunner = 1;
-+ }
-+ (*info->fprintf_func) (info->stream, "}");
-+}
-+
-+static void
-+print_insn_push_pop (CGEN_CPU_DESC cd, void *dis_info, const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields, bfd_vma pc, int length)
-+{
-+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ const CGEN_SYNTAX_CHAR_TYPE *syn;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
-+ {
-+ if (CGEN_SYNTAX_MNEMONIC_P (*syn))
-+ (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
-+ else if (CGEN_SYNTAX_CHAR_P (*syn))
-+ (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
-+ else
-+ cd->print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info, fields,
-+ CGEN_INSN_ATTRS (insn), pc, length);
-+ }
-+
-+ (*info->fprintf_func) (info->stream, " ! {");
-+ if (fields->f_16_mask2 != 0)
-+ (*info->fprintf_func) (info->stream, "$r6~");
-+ cd->print_operand (cd, NDS32_OPERAND_REGLIST, info, fields,
-+ CGEN_INSN_ATTRS (insn), pc, length);
-+ (*info->fprintf_func) (info->stream, ", $fp, $gp, $lp}");
-+
-+}
-+
-+static void
-+print_insn_eit (CGEN_CPU_DESC cd, void *dis_info, const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields, bfd_vma pc, int length)
-+{
-+ static asymbol *itb = NULL;
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+ int idx;
-+ bfd_byte buffer[CGEN_MAX_INSN_SIZE];
-+ const CGEN_SYNTAX_CHAR_TYPE *syn;
-+
-+ print_insn_normal (cd, dis_info, insn, fields, pc, length);
-+
-+ /* Lookup itb symbol. */
-+ if (!itb)
-+ {
-+ int i;
-+
-+ for (i = 0; i < info->symtab_size; i++)
-+ if (bfd_asymbol_name (info->symtab[i])
-+ && strcmp (bfd_asymbol_name (info->symtab[i]), "_ITB_BASE_") == 0)
-+ {
-+ itb = info->symtab[i];
-+ }
-+
-+ /* Lookup it only once, in case _ITB_BASE_ doesn't exist at all. */
-+ if (itb == NULL)
-+ itb = (void *) -1;
-+ }
-+
-+ if (itb == (void *) -1)
-+ return;
-+
-+ /* Get ex9.it index value from first operand. */
-+ syn = CGEN_SYNTAX_STRING (CGEN_INSN_SYNTAX (insn));
-+ idx = nds32_cgen_get_int_operand (cd, CGEN_SYNTAX_FIELD (syn[2]), fields);
-+
-+ /* Print indentation. (We cannot get the value of SFILE.pos.) */
-+ if (idx > 9)
-+ (*info->fprintf_func) (info->stream, " ! ");
-+ else
-+ (*info->fprintf_func) (info->stream, " ! ");
-+ /* Fetch instruction. */
-+ bfd_get_section_contents (itb->section->owner, itb->section, buffer,
-+ idx * 4, CGEN_MAX_INSN_SIZE);
-+ print_insn (cd, bfd_asymbol_value (itb) + idx * 4, info,
-+ buffer, CGEN_MAX_INSN_SIZE);
-+}
-+
-+/* This function does the same as print_insn_normal but print out user
-+ defined syntax. */
-+
-+static void
-+nds32_print_insn_cpe1 (CGEN_CPU_DESC cd,
-+ void *dis_info,
-+ const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields, bfd_vma pc, int length)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ print_insn_normal (cd, info, insn, fields, pc, length);
-+}
-+
-+/* This function does the same as print_insn_normal but print out user
-+ defined syntax. */
-+
-+static void
-+nds32_print_insn_cpe2 (CGEN_CPU_DESC cd,
-+ void *dis_info,
-+ const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields, bfd_vma pc, int length)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ print_insn_normal (cd, info, insn, fields, pc, length);
-+}
-+
-+/* This function does the same as print_insn_normal but print out user
-+ defined syntax. */
-+
-+static void
-+nds32_print_insn_cpe3 (CGEN_CPU_DESC cd,
-+ void *dis_info,
-+ const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields, bfd_vma pc, int length)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ print_insn_normal (cd, info, insn, fields, pc, length);
-+}
-+
-+/* This function does the same as print_insn_normal but print out user
-+ defined syntax. */
-+
-+static void
-+nds32_print_insn_cpe4 (CGEN_CPU_DESC cd,
-+ void *dis_info,
-+ const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields, bfd_vma pc, int length)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ print_insn_normal (cd, info, insn, fields, pc, length);
-+}
-+
-+/* This function does the same as print_insn_normal but print out user
-+ defined syntax. */
-+
-+static void
-+nds32_print_insn_mfcpw (CGEN_CPU_DESC cd, void *dis_info, const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields, bfd_vma pc, int length)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ print_insn_normal (cd, info, insn, fields, pc, length);
-+}
-+
-+/* This function does the same as print_insn_normal but print out user
-+ defined syntax. */
-+
-+static void
-+nds32_print_insn_mfcppw (CGEN_CPU_DESC cd, void *dis_info, const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields, bfd_vma pc, int length)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ print_insn_normal (cd, info, insn, fields, pc, length);
-+}
-+
-+/* This function does the same as print_insn_normal but print out user
-+ defined syntax. */
-+
-+static void
-+nds32_print_insn_mfcpd (CGEN_CPU_DESC cd, void *dis_info, const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields, bfd_vma pc, int length)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ print_insn_normal (cd, info, insn, fields, pc, length);
-+}
-+
-+/* This function does the same as print_insn_normal but print out user
-+ defined syntax. */
-+
-+static void
-+nds32_print_insn_mtcpw (CGEN_CPU_DESC cd, void *dis_info, const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields, bfd_vma pc, int length)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ print_insn_normal (cd, info, insn, fields, pc, length);
-+}
-+
-+/* This function does the same as print_insn_normal but print out user
-+ defined syntax. */
-+
-+static void
-+nds32_print_insn_mtcppw (CGEN_CPU_DESC cd,
-+ void *dis_info,
-+ const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields, bfd_vma pc, int length)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ print_insn_normal (cd, info, insn, fields, pc, length);
-+}
-+
-+/* This function does the same as print_insn_normal but print out user
-+ defined syntax. */
-+
-+static void
-+nds32_print_insn_mtcpd (CGEN_CPU_DESC cd,
-+ void *dis_info,
-+ const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields, bfd_vma pc, int length)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ print_insn_normal (cd, info, insn, fields, pc, length);
-+}
-+
-+/* This function does the same as print_insn_normal but print out user
-+ defined syntax. */
-+
-+static void
-+nds32_print_insn_cp_load_store_rr (CGEN_CPU_DESC cd,
-+ void *dis_info,
-+ const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields,
-+ bfd_vma pc, int length)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ print_insn_normal (cd, info, insn, fields, pc, length);
-+}
-+
-+/* This function does the same as print_insn_normal but print out user
-+ defined syntax. */
-+
-+static void
-+nds32_print_insn_cp_load_store_rr_bi (CGEN_CPU_DESC cd,
-+ void *dis_info,
-+ const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields,
-+ bfd_vma pc, int length)
-+{
-+ nds32_print_insn_cp_load_store_rr (cd, dis_info, insn, fields, pc, length);
-+}
-+
-+/* This function does the same as print_insn_normal but print out user
-+ defined syntax. */
-+
-+static void
-+nds32_print_insn_cp_load_store_ri (CGEN_CPU_DESC cd, void *dis_info,
-+ const CGEN_INSN *insn, CGEN_FIELDS *fields,
-+ bfd_vma pc, int length)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ print_insn_normal (cd, info, insn, fields, pc, length);
-+}
-+
-+/* This function does the same as print_insn_normal but print out user
-+ defined syntax. */
-+
-+static void
-+nds32_print_insn_cp_load_store_ri_bi (CGEN_CPU_DESC cd, void *dis_info,
-+ const CGEN_INSN *insn,
-+ CGEN_FIELDS *fields,
-+ bfd_vma pc, int length)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ CGEN_INIT_PRINT (cd);
-+
-+ print_insn_normal (cd, info, insn, fields, pc, length);
-+}
-+
-+#undef CGEN_PRINT_INSN
-+#define CGEN_PRINT_INSN nds32_print_insn
-+
-+static int
-+nds32_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
-+{
-+ bfd_byte buffer[CGEN_MAX_INSN_SIZE];
-+ bfd_byte *buf = buffer;
-+ int status, buflen;
-+
-+ buflen = cd->base_insn_bitsize / 8;
-+
-+ /* Read the base part of the insn. */
-+ status = (*info->read_memory_func) (pc, buf, buflen, info);
-+
-+ if (status != 0)
-+ {
-+ /* Out of cound? Try half length instruction. */
-+ buflen >>= 1;
-+ status = (*info->read_memory_func) (pc, buf, buflen, info);
-+ if (status != 0)
-+ {
-+ (*info->memory_error_func) (status, pc, info);
-+ return -1;
-+ }
-+ }
-+ else if ((buffer[0] & 0x80) == 0x80)
-+ buflen = 2;
-+
-+ return print_insn (cd, pc, info, buf, buflen);
-+}
-+
-+/* -- */
-diff -Nur binutils-2.24.orig/cgen/cpu/nds32p2.cpu binutils-2.24/cgen/cpu/nds32p2.cpu
---- binutils-2.24.orig/cgen/cpu/nds32p2.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds32p2.cpu 2016-06-30 21:26:12.637892490 +0200
-@@ -0,0 +1,98 @@
-+; ==============================================================================
-+; Andes NDS32 family CPU floating point extension -*- Scheme -*-
-+; Andes Technology Corporation
-+; ==============================================================================
-+
-+
-+; ==============================================================================
-+; Instruction field enums
-+; ==============================================================================
-+; simd-ext5: bits 22-26 (5 bits)
-+(define-normal-insn-enum simd-ext5 "5-bit extended code enums for simd" () SIMD_EXT5_ f-32t4-ext5
-+ ("0")
-+)
-+; simd-sub5: bits 27-31 (5 bits)
-+(define-normal-insn-enum simd-sub5 "5-bit subcode enums for SIMD instructions" () SIMD_SUB5_ f-32t4-sub5
-+ ("PBSAD" "PBSADA")
-+)
-+
-+
-+; ==============================================================================
-+; 32 bit Version 2 Performance Extension Instructions.
-+; ==============================================================================
-+(dni bse "extract a number of bits from a register for bit stream extraction"
-+ ((PIPE OS) (IDOC ALU) EXT2)
-+ "bse $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_0 SUB10G_1 ALU_2_SUB10C1_BSE)
-+ (c-call VOID "nds32_bse_handler" pc (index-of rt5) ra5 (index-of rb5))
-+ ()
-+)
-+
-+(dni bsp "insert a number of bits to a register for bit stream packing"
-+ ((PIPE OS) (IDOC ALU) EXT2)
-+ "bsp $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_0 SUB10G_1 ALU_2_SUB10C1_BSP)
-+ (c-call VOID "nds32_bsp_handler" pc (index-of rt5) ra5 (index-of rb5))
-+ ()
-+)
-+
-+
-+
-+; PBSAD(Parallel Byte Sun of Absolute Difference)
-+; |31 |30 25|24 20|19 15|14 10|9 5|4 0|
-+; ----------------------------------------------------------------------------
-+; | 0 | SIMD | Rt | Ra | Rb | | PBSAD |
-+; | | 111000 | | | | 00000 | 00000 |
-+; ----------------------------------------------------------------------------
-+(dni pbsad "pbsad"
-+ (EXT2)
-+ "pbsad $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_7 OPC6C7_SIMD rt5 ra5 rb5 SIMD_EXT5_0 SIMD_SUB5_PBSAD)
-+ (set rt5
-+ (add
-+ (add
-+ (c-raw-call SI "abs" (ext SI (sub SI (and rb5 (const #x000000ff))
-+ (and ra5 (const #x000000ff)))))
-+ (c-raw-call SI "abs" (ext SI (sub SI (srl (and rb5 (const #x0000ff00)) (const 8))
-+ (srl (and ra5 (const #x0000ff00)) (const 8)))))
-+ )
-+ (add
-+ (c-raw-call SI "abs" (ext SI (sub SI (srl (and rb5 (const #x00ff0000)) (const 16))
-+ (srl (and ra5 (const #x00ff0000)) (const 16)))))
-+ (c-raw-call SI "abs" (ext SI (sub SI (srl (and rb5 (const #xff000000)) (const 24))
-+ (srl (and ra5 (const #xff000000)) (const 24)))))
-+ )
-+ )
-+ )
-+ ()
-+)
-+
-+
-+
-+; PBSADA(Parallel Byte Sun of Absolute Difference Accum)
-+; |31 |30 25|24 20|19 15|14 10|9 5|4 0|
-+; ----------------------------------------------------------------------------
-+; | 0 | SIMD | Rt | Ra | Rb | | PBSADA |
-+; | | 111000 | | | | 00000 | 00001 |
-+; ----------------------------------------------------------------------------
-+(dni pbsada "Calculate the sum of absolute difference of four unsignded 8-bit data elements and accumulate it into a register"
-+ (EXT2)
-+ "pbsada $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_7 OPC6C7_SIMD rt5 ra5 rb5 SIMD_EXT5_0 SIMD_SUB5_PBSADA)
-+ (set rt5 (add rt5
-+ (add
-+ (add
-+ (c-raw-call SI "abs" (ext SI (sub SI (and rb5 (const #x000000ff))
-+ (and ra5 (const #x000000ff)))))
-+ (c-raw-call SI "abs" (ext SI (sub SI (srl (and rb5 (const #x0000ff00)) (const 8))
-+ (srl (and ra5 (const #x0000ff00)) (const 8)))))
-+ )
-+ (add
-+ (c-raw-call SI "abs" (ext SI (sub SI (srl (and rb5 (const #x00ff0000)) (const 16)) (srl (and ra5 (const #x00ff0000)) (const 16)))))
-+ (c-raw-call SI "abs" (ext SI (sub SI (srl (and rb5 (const #xff000000)) (const 24))
-+ (srl (and ra5 (const #xff000000)) (const 24)))))
-+ )
-+ ))
-+ )
-+ ()
-+)
-diff -Nur binutils-2.24.orig/cgen/cpu/nds32pc.cpu binutils-2.24/cgen/cpu/nds32pc.cpu
---- binutils-2.24.orig/cgen/cpu/nds32pc.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds32pc.cpu 2016-06-30 21:26:12.637892490 +0200
-@@ -0,0 +1,164 @@
-+; ==============================================================================
-+; Andes NDS32 family CPU description. -*- Scheme -*-
-+; Andes Technology Corporation
-+; ==============================================================================
-+; This file is included by nds32.cpu.
-+
-+; ==============================================================================
-+; Pseudo-code definitions
-+; These are instructions assembly programmers and gcc C/C++ compiler would
-+; generate. However, only aliases of relaxable version are defined here and the
-+; others are defined in gas/config/tc-nds32.c.
-+; ==============================================================================
-+; -----------------------------------------------------------------------------
-+; relaxable aliases to conditional branch instructions
-+; -----------------------------------------------------------------------------
-+(dnmi beq_r "relaxable beq"
-+ (NO-DIS COND-CTI RELAXABLE (IDOC BR))
-+ "beq_r $rt5,$ra5,$disp14"
-+ (emit beq rt5 ra5 disp14)
-+)
-+
-+(dnmi bne_r "relaxable bne"
-+ (NO-DIS COND-CTI RELAXABLE (IDOC BR))
-+ "bne_r $rt5,$ra5,$disp14"
-+ (emit bne rt5 ra5 disp14)
-+)
-+
-+(dnmi beqz_r "relaxable beqz"
-+ (NO-DIS COND-CTI RELAXABLE (IDOC BR))
-+ "beqz_r $rt5,$disp16"
-+ (emit beqz rt5 disp16)
-+)
-+
-+(dnmi bnez_r "relaxable bnez"
-+ (NO-DIS COND-CTI RELAXABLE (IDOC BR))
-+ "bnez_r $rt5,$disp16"
-+ (emit bnez rt5 disp16)
-+)
-+
-+(dnmi bgez_r "relaxable bgez"
-+ (NO-DIS COND-CTI RELAXABLE (IDOC BR))
-+ "bgez_r $rt5,$disp16"
-+ (emit bgez rt5 disp16)
-+)
-+
-+(dnmi bltz_r "relaxable bltz"
-+ (NO-DIS COND-CTI RELAXABLE (IDOC BR))
-+ "bltz_r $rt5,$disp16"
-+ (emit bltz rt5 disp16)
-+)
-+
-+(dnmi bgtz_r "relaxable bgtz"
-+ (NO-DIS COND-CTI RELAXABLE (IDOC BR))
-+ "bgtz_r $rt5,$disp16"
-+ (emit bgtz rt5 disp16)
-+)
-+
-+(dnmi blez_r "relaxable blez"
-+ (NO-DIS COND-CTI RELAXABLE (IDOC BR))
-+ "blez_r $rt5,$disp16"
-+ (emit blez rt5 disp16)
-+)
-+
-+(dnmi beqs38_r "relaxable beqs38"
-+ (NO-DIS COND-CTI RELAXABLE (IDOC BR))
-+ "beqs38_r $rt3,$hsdisp8"
-+ (emit beqs38 rt3 hsdisp8)
-+)
-+
-+(dnmi bnes38_r "relaxable bnes38"
-+ (NO-DIS COND-CTI RELAXABLE (IDOC BR))
-+ "bnes38_r $rt3,$hsdisp8"
-+ (emit bnes38 rt3 hsdisp8)
-+)
-+
-+(dnmi beqz38_r "relaxable beqz38"
-+ (NO-DIS COND-CTI RELAXABLE (IDOC BR))
-+ "beqz38_r $rt3,$hsdisp8"
-+ (emit beqz38 rt3 hsdisp8)
-+)
-+
-+(dnmi bnez38_r "relaxable bnez38"
-+ (NO-DIS COND-CTI RELAXABLE (IDOC BR))
-+ "bnez38_r $rt3,$hsdisp8"
-+ (emit bnez38 rt3 hsdisp8)
-+)
-+
-+(dnmi beqzs8_r "relaxable beqzs8"
-+ (NO-DIS COND-CTI RELAXABLE (IDOC BR))
-+ "beqzs8_r $hsdisp8"
-+ (emit beqzs8 hsdisp8)
-+)
-+
-+(dnmi bnezs8_r "relaxable bnezs8"
-+ (NO-DIS COND-CTI RELAXABLE (IDOC BR))
-+ "bnezs8_r $hsdisp8"
-+ (emit bnezs8 hsdisp8)
-+)
-+
-+; -----------------------------------------------------------------------------
-+; relaxable aliases to conditional branch and link instructions
-+; -----------------------------------------------------------------------------
-+(dnmi bgezal_r "relaxable bgezal"
-+ (NO-DIS COND-CTI RELAXABLE (IDOC BR))
-+ "bgezal_r $rt5,$disp16"
-+ (emit bgezal rt5 disp16)
-+)
-+
-+(dnmi bltzal_r "relaxable bltzal"
-+ (NO-DIS COND-CTI RELAXABLE (IDOC BR))
-+ "bltzal_r $rt5,$disp16"
-+ (emit bltzal rt5 disp16)
-+)
-+
-+; -----------------------------------------------------------------------------
-+; relaxable aliases to unconditional branch instructions
-+; -----------------------------------------------------------------------------
-+(dnmi j_r "relaxable j"
-+ (NO-DIS UNCOND-CTI RELAXABLE (IDOC BR))
-+ "j_r $disp24"
-+ (emit j disp24)
-+)
-+
-+(dnmi j8_r "relaxable j8"
-+ (NO-DIS UNCOND-CTI RELAXABLE (IDOC BR))
-+ "j8_r $hsdisp8"
-+ (emit j8 hsdisp8)
-+)
-+
-+; -----------------------------------------------------------------------------
-+; relaxable aliases to unconditional branch and link instructions
-+; -----------------------------------------------------------------------------
-+(dnmi jal_r "relaxable jal"
-+ (NO-DIS UNCOND-CTI RELAXABLE (IDOC BR))
-+ "jal_r $disp24"
-+ (emit jal disp24)
-+)
-+
-+(dnmi jral_r "relaxable jral"
-+ (NO-DIS UNCOND-CTI RELAXABLE (IDOC BR))
-+ "jral_r $rt5,$rb5"
-+ (emit jral rt5 rb5)
-+)
-+
-+(dnmi jral5_r "relaxable jral5"
-+ (NO-DIS UNCOND-CTI RELAXABLE (IDOC BR))
-+ "jral5_r $rb5h"
-+ (emit jral5 rb5h)
-+)
-+
-+; -----------------------------------------------------------------------------
-+; relaxable aliases to V3 conditional branch instructions
-+; -----------------------------------------------------------------------------
-+(dnmi beqc_r "relaxable beqc"
-+ (NO-DIS COND-CTI RELAXABLE V3)
-+ "beqc_r $rt5,$simm11,$disp8"
-+ (emit beqc rt5 simm11 disp8)
-+)
-+
-+(dnmi bnec_r "relaxable bnec"
-+ (NO-DIS COND-CTI RELAXABLE V3)
-+ "bnec_r $rt5,$simm11,$disp8"
-+ (emit bnec rt5 simm11 disp8)
-+)
-diff -Nur binutils-2.24.orig/cgen/cpu/nds32p.cpu binutils-2.24/cgen/cpu/nds32p.cpu
---- binutils-2.24.orig/cgen/cpu/nds32p.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds32p.cpu 2016-06-30 21:26:12.637892490 +0200
-@@ -0,0 +1,324 @@
-+(dni abs "abs"
-+ ((PIPE OS) (IDOC ALU) EXT)
-+ "abs $rt5,$ra5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 RES5_17_0 SUB10D_0 SUB10G_0 ALU_2_SUB10C0_ABS)
-+ (if (c-code VOID "(current_cpu->cpu_model.group_N1213())")
-+ (sequence() ; then part
-+ (set rt5
-+ (cond USI
-+ ((and ra5 (const #x80000000)) ;negative number
-+ (neg SI ra5)
-+ )
-+ (else ra5) ;positive number
-+ );end of cond
-+ );end of set
-+ )
-+ (sequence() ; else part
-+ (set rt5
-+ (cond USI
-+ ((and ra5 (const #x80000000)) ;negative number
-+ (cond USI
-+ ((eq USI ra5 (const #x80000000))
-+ (const #x7fffffff)
-+ )
-+ (else (neg SI ra5))
-+ );end of cond
-+ )
-+ (else ra5) ;positive number
-+ );end of cond
-+ );end of set
-+ )
-+ )
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+)
-+
-+(dni ave "ave"
-+ ((PIPE OS) (IDOC ALU) EXT)
-+ "ave $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_0 SUB10G_0 ALU_2_SUB10C0_AVE)
-+ (set rt5 (c-call USI "@arch@_ave_handler"(index-of ra5)(index-of rb5)))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+)
-+
-+(define-pmacro (minmax-op mnemonic comp-op)
-+ (begin
-+ (dni mnemonic (.str mnemonic)
-+ ((PIPE OS) (IDOC ALU) EXT)
-+ (.str mnemonic " $rt5,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_0 SUB10G_0 (.sym "ALU_2_SUB10C0_" (.upcase mnemonic)))
-+ (if (comp-op SI ra5 rb5) (set rt5 ra5) (set rt5 rb5))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ )
-+ )
-+)
-+(minmax-op min le)
-+(minmax-op max ge)
-+
-+(define-pmacro (bit-op mnemonic sem-op)
-+ (begin
-+ (define-full-insn mnemonic (.str mnemonic)
-+ ((PIPE OS) (IDOC ALU) EXT)
-+ (.str mnemonic " $rt5,$ra5,$uimm5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 uimm5 SUB10D_0 SUB10G_1 (.sym "ALU_2_SUB10C1_" (.upcase mnemonic)))
-+ ()
-+ (set rt5 (sem-op ra5 (sll (const 1) uimm5)))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ ((print "insn-special9"))
-+ )
-+ )
-+)
-+(bit-op bset or)
-+(bit-op btgl xor)
-+
-+(define-full-insn bclr "bclr"
-+ ((PIPE OS) (IDOC ALU) EXT)
-+ "bclr $rt5,$ra5,$uimm5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 uimm5 SUB10D_0 SUB10G_1 ALU_2_SUB10C1_BCLR)
-+ ()
-+ (set rt5 (and ra5 (inv (sll (const 1) uimm5))))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ ((print "insn-special9"))
-+)
-+
-+(define-full-insn btst "btst"
-+ ((PIPE OS) (IDOC ALU) EXT)
-+ "btst $rt5,$ra5,$uimm5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 uimm5 SUB10D_0 SUB10G_1 ALU_2_SUB10C1_BTST)
-+ ()
-+ (set rt5 (and (srl ra5 uimm5) (const 1)))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ ((print "insn-special9"))
-+)
-+
-+;it is not described in Doc
-+;(dni bfexts "bfexts"
-+; ((PIPE OS) (IDOC ALU) EXT)
-+; "btst $rt5,$ra5,$uimm5"
-+; (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 uimm5 SUB10D_0 SUB10G_1 ALU_2_SUB10C1_BTST)
-+; (set rt5 (and (srl ra5 uimm5) (const 1)))
-+; (
-+; (n1hm (unit u-exec))
-+; )
-+;)
-+
-+;it is not described in Doc
-+;(dni bfext "bfext"
-+; ((PIPE OS) (IDOC ALU) EXT)
-+; "btst $rt5,$ra5,$uimm5"
-+; (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 uimm5 SUB10D_0 SUB10G_1 ALU_2_SUB10C1_BTST)
-+; (set rt5 (and (srl ra5 uimm5) (const 1)))
-+; (
-+; (n1hm (unit u-exec))
-+; )
-+;)
-+
-+;it is not described in Doc
-+;(dni bfins "bfins"
-+; ((PIPE OS) (IDOC ALU) EXT)
-+; "btst $rt5,$ra5,$uimm5"
-+; (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 uimm5 SUB10D_0 SUB10G_1 ALU_2_SUB10C1_BTST)
-+; (set rt5 (and (srl ra5 uimm5) (const 1)))
-+; (
-+; (n1hm (unit u-exec))
-+; )
-+;)
-+
-+;if MSB==0 && (ra&(0xffffffff<<(uimm5)))
-+; rt = 1<<(uimm5) - 1
-+;else if MSB==1 && ((inv(ra&(0xffffffff<<(uimm5))) > 0)
-+; rt = (-1)*(1<<(uimm5))
-+;else
-+; rt = ra
-+(define-full-insn clips "clips"
-+ ((PIPE OS) (IDOC ALU) EXT)
-+ "clips $rt5,$ra5,$uimm5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 uimm5 SUB10D_0 SUB10G_0 ALU_2_SUB10C0_CLIPS)
-+ ()
-+ (set rt5
-+ (cond SI
-+ ((andif (not(and ra5 (const #x80000000))) ;condition 1
-+ (and ra5 (sll (const #xffffffff) uimm5)))
-+ (sub (sll (const 1) uimm5 ) (const 1)));expression 1
-+ ((gt (inv (and ra5 (sll (const #xffffffff) uimm5)))
-+ (sub (sll (const 1) uimm5 ) (const 1))) ;condition 2
-+ (sll (const #xffffffff) uimm5 ));expression 2
-+ (else ra5);else expression
-+ );end of cond
-+ );end of set
-+; (set rt5 (c-call SI "@cpu@_clips_handler" (index-of ra5) uimm5))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ ((print "insn-special9"))
-+)
-+
-+;if MSB==0 && (ra&(0xffffffff<<uimm5))
-+; rt = (1<<uimm5) -1
-+;else if MSB==1
-+; rt = 0
-+;else
-+; rt = ra
-+(define-full-insn clip "clip"
-+ ((PIPE OS) (IDOC ALU) EXT)
-+ "clip $rt5,$ra5,$uimm5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 uimm5 SUB10D_0 SUB10G_0 ALU_2_SUB10C0_CLIP)
-+ ()
-+ (set rt5
-+ (cond USI
-+ ((andif (not(and ra5 (const #x80000000))) ;condition 1
-+ (and ra5 (sll (const #xffffffff) uimm5)))
-+ (sub (sll (const 1) uimm5) (const 1))) ;expression 1
-+ ((and ra5 (const #x80000000)) ;condition 2
-+ (const 0)) ;expression 2
-+ (else ra5)
-+ );end of cond
-+ );end of set
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+ ((print "insn-special9"))
-+)
-+
-+(dni clz "clz"
-+ ((PIPE OS) (IDOC ALU) EXT)
-+ "clz $rt5,$ra5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 RES5_17_0 SUB10D_0 SUB10G_0 ALU_2_SUB10C0_CLZ)
-+ (set rt5 (c-call USI "@arch@_clz_handler" ra5))
-+ (
-+ )
-+)
-+
-+(dni clo "clo"
-+ ((PIPE OS) (IDOC ALU) EXT)
-+ "clo $rt5,$ra5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 RES5_17_0 SUB10D_0 SUB10G_0 ALU_2_SUB10C0_CLO)
-+ (set rt5 (c-call USI "@arch@_clo_handler" (index-of ra5)))
-+ (
-+ (n1hm (unit u-exec))
-+ )
-+)
-+
-+
-+;it is not described in Doc
-+;(dni add.sc "add.sc"
-+; ((PIPE OS) (IDOC ALU) EXT)
-+; "btst $rt5,$ra5,$uimm5"
-+; (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 uimm5 SUB10D_0 SUB10G_1 ALU_2_SUB10C1_BTST)
-+; (set rt5 (and (srl ra5 uimm5) (const 1)))
-+; (
-+; (n1hm (unit u-exec))
-+; )
-+;)
-+
-+;it is not described in Doc
-+;(dni sub.sc "sub.sc"
-+; ((PIPE OS) (IDOC ALU) EXT)
-+; "btst $rt5,$ra5,$uimm5"
-+; (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 uimm5 SUB10D_0 SUB10G_1 ALU_2_SUB10C1_BTST)
-+; (set rt5 (and (srl ra5 uimm5) (const 1)))
-+; (
-+; (n1hm (unit u-exec))
-+; )
-+;)
-+
-+;it is not described in Doc
-+;(dni add.wc "add.wc"
-+; ((PIPE OS) (IDOC ALU) EXT)
-+; "btst $rt5,$ra5,$uimm5"
-+; (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 uimm5 SUB10D_0 SUB10G_1 ALU_2_SUB10C1_BTST)
-+; (set rt5 (and (srl ra5 uimm5) (const 1)))
-+; (
-+; (n1hm (unit u-exec))
-+; )
-+;)
-+
-+
-+;it is not described in Doc
-+;(dni sub.wc "sub.wc"
-+; ((PIPE OS) (IDOC ALU) EXT)
-+; "sub.wc $rt5,$ra5,$uimm5"
-+; (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 uimm5 SUB10D_0 SUB10G_1 ALU_2_SUB10C1_BTST)
-+; (set rt5 (and (srl ra5 uimm5) (const 1)))
-+; (
-+; (n1hm (unit u-exec))
-+; )
-+;)
-+
-+
-+;;; lwl/lwr/swl/swr are temporary patches for EEMBC program; it is good to leave them here for a while before completely remove
-+;;;(dni lwl "lwl"
-+;;; ((PIPE O) (IDOC MEM))
-+;;; "lwl $rt5,[$ra5+$slo15w]"
-+;;; (+ IFMT_32 OPC6G_6 OPC6C6_LWL rt5 ra5 slo15)
-+;;; (set rt5
-+;;; (or (and rt5 (inv (sll (const #xffffffff) (sll (and (add ra5 slo15) #x3) 3))))
-+;;; (sll (mem SI (and (add ra5 slo15) #xfffffffc)) (sll (and (add ra5 slo15) #x3) 3))
-+;;; ))
-+;;; (
-+;;; (n1hm (unit u-load))
-+;;; )
-+;;;);it is not specified in Andes spec
-+
-+;;;(dni lwr "lwr"
-+;;; ((PIPE O) (IDOC MEM))
-+;;; "lwr $rt5,[$ra5+$slo15]"
-+;;; (+ IFMT_32 OPC6G_6 OPC6C6_LWR rt5 ra5 slo15)
-+;;; (set rt5
-+;;; (or (and rt5 (sll (const #xffffff00) (sll (and (add ra5 slo15) #x3) 3)))
-+;;; (srl (mem SI (and (add ra5 slo15) #xfffffffc)) (sll (and (inv (add ra5 slo15)) #x3) 3))
-+;;; ))
-+;;; (
-+;;; (n1hm (unit u-load))
-+;;; )
-+;;;);it is not specified in Andes spec
-+
-+;;;(dni swl "swl"
-+;;; ((PIPE O) (IDOC MEM))
-+;;; "swl $rt5,[$ra5+$slo15]"
-+;;; (+ IFMT_32 OPC6G_6 OPC6C6_SWL rt5 ra5 slo15)
-+;;; (set SI (mem SI (and (add ra5 slo15) #xfffffffc))
-+;;; (or (srl rt5 (sll (and (add ra5 slo15) #x3) 3))
-+;;; (and (inv (srl (const #xffffffff) (sll (and (add ra5 slo15) #x3) 3))) (mem SI (and (add ra5 slo15) #xfffffffc)))
-+;;; ))
-+;;; (
-+;;; (n1hm (unit u-load))
-+;;; )
-+;;;);it is not specified in Andes spec
-+
-+;;;(dni swr "swr"
-+;;; ((PIPE O) (IDOC MEM))
-+;;; "swr $rt5,[$ra5+$slo15]"
-+;;; (+ IFMT_32 OPC6G_6 OPC6C6_SWR rt5 ra5 slo15)
-+;;; (set SI (mem SI (and (add ra5 slo15) #xfffffffc))
-+;;; (or (sll rt5 (sll (and (inv (add ra5 slo15)) #x3) 3))
-+;;; (and (srl (const #x00ffffff) (sll (and (add ra5 slo15) #x3) 3)) (mem SI (and (add ra5 slo15) #xfffffffc)))
-+;;; ))
-+;;; (
-+;;; (n1hm (unit u-load))
-+;;; )
-+;;;);it is not specified in Andes spec
-+
-+;(dni bnezd "bnezd"
-+; (COND-CTI (IDOC BR) EXT)
-+; "bnezd $rt5,$disp16"
-+; (+ IFMT_32 OPC6G_4 OPC6C4_BR2 rt5 BR2_SUB4_BNEZD disp16)
-+; (if (ne SI rt5 (const SI 0))
-+; (set pc disp16)
-+; (set rt5 (sub rt5 (const 1)))
-+; )
-+; (
-+; (n1hm (unit u-cti) (unit u-cmp (cycles 0)))
-+; )
-+;)
-diff -Nur binutils-2.24.orig/cgen/cpu/nds32s.cpu binutils-2.24/cgen/cpu/nds32s.cpu
---- binutils-2.24.orig/cgen/cpu/nds32s.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds32s.cpu 2016-06-30 21:26:12.637892490 +0200
-@@ -0,0 +1,124 @@
-+; ==============================================================================
-+; Andes NDS32 family CPU floating point extension -*- Scheme -*-
-+; Andes Technology Corporation
-+; ==============================================================================
-+
-+
-+; ==============================================================================
-+; Instruction fields
-+; ==============================================================================
-+(dnf f-32-op1-s "1 bit FFB field for STRING" () 25 1);
-+(dnf f-32-uimm8-s "8 bits unsigned immediate for STRING" () 17 8);
-+
-+
-+; ==============================================================================
-+; Instruction field enums
-+; ==============================================================================
-+; insn32-op1-s: bit 25 (1 bit)
-+(define-normal-insn-enum insn32-op1-s "1 bit enums for FFB field" () OP1_S_ f-32-op1-s
-+ ("0" "1")
-+)
-+
-+
-+; ==============================================================================
-+; Hardware pieces
-+; ==============================================================================
-+(dnh h-uimm8-s "unsigned 8 bits immediate for STRING" ()
-+ (immediate (UINT 8))
-+ () () ()
-+)
-+
-+
-+; ==============================================================================
-+; Opcode operands
-+; ==============================================================================
-+(define-operand
-+ (name uimm8_s)
-+ (comment "unsigned 8 bits immediate for STRING")
-+ (attrs HASH-PREFIX)
-+ (type h-uimm8-s)
-+ (index f-32-uimm8-s)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+
-+; ==============================================================================
-+; String instructions.
-+; ==============================================================================
-+
-+; FFB(Find First Byte)
-+; |31 |30 25|24 20|19 15|14 10|9 7| 6 |5 0|
-+; ----------------------------------------------------------------------------
-+; | 0 | ALU_2 | Rt | Ra | Rb |000| FFB | STR1 |
-+; | | 100001 | | | | | 0 | 001110 |
-+; ----------------------------------------------------------------------------
-+
-+
-+; FFBI(Find First Byte Immediate)
-+; |31 |30 25|24 20|19 15|14 7| 6 |5 0|
-+; ----------------------------------------------------------------------------
-+; | 0 | ALU_2 | Rt | Ra | imm8 | FFB | STR1 |
-+; | | 100001 | | | | 1 | 001110 |
-+; ----------------------------------------------------------------------------
-+
-+(dni ffb "ffb"
-+ (STRING)
-+ "ffb $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 RES3_22_0 OP1_S_0 SUB10G_1 ALU_2_SUB10C1_STR1)
-+ (set rt5(c-call SI "nds32_find_first_handler" ra5 (and rb5 (const #x000000ff))))
-+ ()
-+)
-+
-+(dni ffbi "ffbi"
-+ (STRING)
-+ "ffbi $rt5,$ra5,$uimm8_s"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 uimm8_s OP1_S_1 SUB10G_1 ALU_2_SUB10C1_STR1 )
-+ (set rt5 (c-call SI "nds32_find_first_handler" ra5 uimm8_s))
-+ ()
-+)
-+
-+
-+; FFMISM(Find First Mis-Match)
-+; |31 |30 25|24 20|19 15|14 10|9 7| 6 |5 0|
-+; ----------------------------------------------------------------------------
-+; | 0 | ALU_2 | Rt | Ra | Rb |000| FFB | STR2 |
-+; | | 100001 | | | | | 0 | 001111 |
-+; ----------------------------------------------------------------------------
-+
-+; internal instruction
-+; FFZMISM(Find First Zero or Mis-Match)
-+; |31 |30 25|24 20|19 15|14 10|9 7| 6 |5 0|
-+; ----------------------------------------------------------------------------
-+; | 0 | ALU_2 | Rt | Ra | Rb |000| FFB | FFZMISM |
-+; | | 100001 | | | | | 0 | 010111 |
-+; ----------------------------------------------------------------------------
-+
-+; FLMISM(Find Last Mis-Match)
-+; |31 |30 25|24 20|19 15|14 10|9 7| 6 |5 0|
-+; ----------------------------------------------------------------------------
-+; | 0 | ALU_2 | Rt | Ra | Rb |000| FFB | STR2 |
-+; | | 100001 | | | | | 1 | 001111 |
-+; ----------------------------------------------------------------------------
-+
-+(define-pmacro (string-g2 mnemonic group)
-+ (dni (.sym mnemonic "mism")
-+ (.str mnemonic "mism")
-+ (STRING)
-+ (.str mnemonic "mism $rt5,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 RES3_22_0 (.sym "OP1_S_" group) SUB10G_1 ALU_2_SUB10C1_STR2 )
-+ (set rt5 (c-call SI "nds32_find_mis_match_handler" ra5 rb5 group))
-+ ()
-+ )
-+)
-+(string-g2 ff 0)
-+(string-g2 fl 1)
-+
-+; 20090413, internal instruction
-+(dni ffzmism "ffzmism"
-+ (STRING A32V2)
-+ ("ffzmism $rt5,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 RES3_22_0 OP1_S_0 SUB10G_2 ALU_2_SUB10C2_FFZMISM )
-+ (set rt5 (c-call SI "nds32_find_mis_match_handler" ra5 rb5 2))
-+ ()
-+)
-+
-diff -Nur binutils-2.24.orig/cgen/cpu/nds32stat.cpu binutils-2.24/cgen/cpu/nds32stat.cpu
---- binutils-2.24.orig/cgen/cpu/nds32stat.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds32stat.cpu 2016-06-30 21:26:12.637892490 +0200
-@@ -0,0 +1,200 @@
-+; ==============================================================================
-+; Andes NDS32 family Saturatin Arithmetic Extension -*- Scheme -*-
-+; Andes Technology Corporation
-+; ==============================================================================
-+; This file is included by nds32.cpu.
-+
-+; ==============================================================================
-+; Hardware pieces.
-+; ==============================================================================
-+;removed since the overflow status bit is recorded in PSW.OV
-+;(define-hardware
-+; (name h-ustat)
-+; (comment "user saturation register")
-+; (attrs PROFILE)
-+; (type register USI)
-+;)
-+;(dnh h-conf-ustat "configured virtual ustat" () (register USI) () () ())
-+;(dnh h-wtmsk-ustat "write mask value for virtual ustat" () (register USI) () () ())
-+
-+; ==============================================================================
-+; Enums.
-+; ==============================================================================
-+; insn32-5_12: bits 12-16 (5 bits)
-+(define-normal-insn-enum insn32-5_12 "5-bit enums for USTAT1" () SUB5-12_ f-32-ra5
-+ (("USTAT" 30))
-+)
-+
-+; insn32-5_17: bits 17-21 (5 bits)
-+(define-normal-insn-enum insn32-5_17 "5-bit enums for USTAT2" () SUB5-17_ f-32-rb5
-+ ("0")
-+)
-+
-+
-+; ==============================================================================
-+; Instructions
-+; ==============================================================================
-+;KADDW (Signed Addition with Q31 Saturation)
-+(dni KADDW "Signed Addition with Q31 Saturation"
-+ (STAT)
-+ "kaddw $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_0 SUB10G_3 ALU_2_SUB10C3_KADDW)
-+ (sequence()
-+ (c-call VOID "nds32_kaddw_handler" pc (index-of rt5) ra5 rb5)
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto KADDW_interruption;\n"))
-+ ()
-+)
-+
-+;KSUBW (Signed Subtraction with Q31 Saturation)
-+(dni KSUBW "Signed Subtraction with Q31 Saturation"
-+ (STAT)
-+ "ksubw $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_0 SUB10G_3 ALU_2_SUB10C3_KSUBW)
-+ (sequence()
-+ (c-call VOID "nds32_ksubw_handler" pc (index-of rt5) ra5 rb5)
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto KSUBW_interruption;\n"))
-+ ()
-+)
-+
-+;KSLRAW (Shift Left Logical or Right Arithmetic with Q31 Saturation)
-+(dni KSLRAW "Shift Left Logical or Right Arithmetic with Q31 Saturation"
-+ (STAT)
-+ "kslraw $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_0 SUB10G_3 ALU_2_SUB10C3_KSLRAW)
-+ (sequence()
-+ (c-call VOID "nds32_kslraw_handler" pc (index-of rt5) ra5 rb5)
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto KSLRAW_interruption;\n"))
-+ ()
-+)
-+
-+;KADDH (Signed Addition with Q15 Saturation)
-+(dni KADDH "Signed Addition with Q15 Saturation"
-+ (STAT)
-+ "kaddh $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_1 SUB10G_3 ALU_2V2_SUB10C3_KADDH)
-+ (sequence()
-+ (c-call VOID "nds32_kaddh_handler" pc (index-of rt5) ra5 rb5)
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto KADDH_interruption;\n"))
-+ ()
-+)
-+
-+;KSUBH (Signed Subtraction with Q15 Saturation)
-+(dni KSUBH "Signed Subtraction with Q15 Saturation"
-+ (STAT)
-+ "ksubh $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_1 SUB10G_3 ALU_2V2_SUB10C3_KSUBH)
-+ (sequence()
-+ (c-call VOID "nds32_ksubh_handler" pc (index-of rt5) ra5 rb5)
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto KSUBH_interruption;\n"))
-+ ()
-+)
-+
-+;KDMBB (Signed Saturation Double Multiply B16*B16)
-+(dni KDMBB "Signed Saturation Double Multiply B16*B16"
-+ (STAT)
-+ "kdmbb $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_0 SUB10G_2 ALU_2_SUB10C2_KDMXY)
-+ (sequence()
-+ (c-call VOID "nds32_kdmbb_handler" pc (index-of rt5) ra5 rb5)
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto KDMBB_interruption;\n"))
-+ ()
-+)
-+
-+;KDMBT (Signed Saturation Double Multiply B16*T16)
-+(dni KDMBT "Signed Saturation Double Multiply B16*T16"
-+ (STAT)
-+ "kdmbt $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_1 SUB10G_2 ALU_2_SUB10C2_KDMXY)
-+ (sequence()
-+ (c-call VOID "nds32_kdmbt_handler" pc (index-of rt5) ra5 rb5)
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto KDMBT_interruption;\n"))
-+ ()
-+)
-+
-+;KDMTB (Signed Saturation Double Multiply T16*B16)
-+(dni KDMTB "Signed Saturation Double Multiply T16*B16"
-+ (STAT)
-+ "kdmtb $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_2 SUB10G_2 ALU_2_SUB10C2_KDMXY)
-+ (sequence()
-+ (c-call VOID "nds32_kdmtb_handler" pc (index-of rt5) ra5 rb5)
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto KDMTB_interruption;\n"))
-+ ()
-+)
-+
-+;KDMTT (Signed Saturation Double Multiply T16*T16)
-+(dni KDMTT "Signed Saturation Double Multiply T16*T16"
-+ (STAT)
-+ "kdmtt $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_3 SUB10G_2 ALU_2_SUB10C2_KDMXY)
-+ (sequence()
-+ (c-call VOID "nds32_kdmtt_handler" pc (index-of rt5) ra5 rb5)
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto KDMTT_interruption;\n"))
-+ ()
-+)
-+
-+;KHMBB (Signed Saturation Half Multiply B16*B16)
-+(dni KHMBB "Signed Saturation Half Multiply B16*B16"
-+ (STAT)
-+ "khmbb $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_4 SUB10G_2 ALU_2_SUB10C2_KDMXY)
-+ (sequence()
-+ (c-call VOID "nds32_khmbb_handler" pc (index-of rt5) ra5 rb5)
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto KHMBB_interruption;\n"))
-+ ()
-+)
-+
-+;KHMBT (Signed Saturation Half Multiply B16*T16)
-+(dni KHMBT "Signed Saturation Half Multiply B16*T16"
-+ (STAT)
-+ "khmbt $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_5 SUB10G_2 ALU_2_SUB10C2_KDMXY)
-+ (sequence()
-+ (c-call VOID "nds32_khmbt_handler" pc (index-of rt5) ra5 rb5)
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto KHMBT_interruption;\n"))
-+ ()
-+)
-+
-+;KHMTB (Signed Saturation Half Multiply T16*B16)
-+(dni KHMTB "Signed Saturation Half Multiply T16*B16"
-+ (STAT)
-+ "khmtb $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_6 SUB10G_2 ALU_2_SUB10C2_KDMXY)
-+ (sequence()
-+ (c-call VOID "nds32_khmtb_handler" pc (index-of rt5) ra5 rb5)
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto KHMTB_interruption;\n"))
-+ ()
-+)
-+
-+;KHMTT (Signed Saturation Half Multiply T16*T16)
-+(dni KHMTT "Signed Saturation Half Multiply T16*T16"
-+ (STAT)
-+ "khmtt $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_7 SUB10G_2 ALU_2_SUB10C2_KDMXY)
-+ (sequence()
-+ (c-call VOID "nds32_khmtt_handler" pc (index-of rt5) ra5 rb5)
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto KHMTT_interruption;\n"))
-+ ()
-+)
-+
-+;RDOV (Read from USTAT OV flag)
-+(dni RDOV "Read from USTAT OV flag"
-+ (STAT)
-+ "rdov $rt5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 SUB5-12_USTAT SUB5-17_0 SUB10D_1 SUB10G_4 ALU_2_SUB10C4_MFUSR)
-+ (sequence()
-+ (c-call VOID "nds32_rdov_handler" pc (index-of rt5))
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto RDOV_interruption;\n"))
-+ ()
-+)
-+
-+;CLROV (Clear USTAT OV flag)
-+(dni CLROV "Clear USTAT OV flag"
-+ (STAT)
-+ "clrov"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 SUB5-12_USTAT SUB5-17_0 SUB10D_1 SUB10G_4 ALU_2_SUB10C4_MTUSR)
-+ (sequence()
-+ (c-call VOID "nds32_clrov_handler" pc)
-+ (c-code VOID "if (NDS32_HAS_INTERRUPTION(current_cpu)) goto CLROV_interruption;\n"))
-+ ()
-+)
-diff -Nur binutils-2.24.orig/cgen/cpu/nds32v2.cpu binutils-2.24/cgen/cpu/nds32v2.cpu
---- binutils-2.24.orig/cgen/cpu/nds32v2.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds32v2.cpu 2016-06-30 21:26:12.637892490 +0200
-@@ -0,0 +1,562 @@
-+; ==============================================================================
-+; Andes NDS32 family CPU 32-bit instruction set version 2. -*- Scheme -*-
-+; Andes Technology Corporation
-+; ==============================================================================
-+; This file is included by nds32.cpu.
-+
-+; ==============================================================================
-+; Attributes.
-+; ==============================================================================
-+
-+; ==============================================================================
-+; 32-bit baseline version2 instructions fields
-+; ==============================================================================
-+(df f-32-slo19 "slo19s" () 13 19 INT #f #f)
-+
-+(df f-32-slo17w "slo17s" () 15 17 INT
-+ ((value pc) (c-code SI "value; if (value&0x3) return BAD_WOFFSET; else value>>=2"))
-+ ((value pc) (sll SI value (const 2))))
-+
-+(df f-32-slo18h "slo18h" () 14 18 INT
-+ ((value pc) (c-code SI "value; if (value&0x1) return BAD_HWOFFSET; else value>>=1"))
-+ ((value pc) (sll SI value (const 1))))
-+
-+(dnf f-32v2_19_1 "sub opcode of SBGP" () 12 1)
-+(dnf f-32v2_19_2 "sub opcode of HWGP" () 12 2)
-+(dnf f-32v2_17_1 "sub opcode of HWGP" () 14 1)
-+
-+; ==============================================================================
-+; Hardware pieces.
-+; ==============================================================================
-+(dnh h-slo19 "signed low 19 bits" ()
-+ (immediate (INT 19))
-+ () () ()
-+)
-+
-+(dnh h-slo18 "signed low 18 bits" ()
-+ (immediate (INT 18))
-+ () () ()
-+)
-+
-+(dnh h-slo17 "signed low 17 bits" ()
-+ (immediate (INT 17))
-+ () () ()
-+)
-+; ==============================================================================
-+; declare operands
-+; ==============================================================================
-+; For lo19
-+(define-operand
-+ (name slo19)
-+ (comment "19 bit signed immediate value")
-+ (attrs HASH-PREFIX)
-+ (type h-slo19)
-+ (index f-32-slo19)
-+ (handlers (parse "slo19"))
-+)
-+
-+(define-operand
-+ (name slo18h)
-+ (comment "18-bit signed immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-slo18)
-+ (index f-32-slo18h)
-+ (handlers (parse "slo18h"))
-+)
-+
-+(define-operand
-+ (name slo17w)
-+ (comment "17 bit signed immediate value")
-+ (attrs HASH-PREFIX)
-+ (type h-slo17)
-+ (index f-32-slo17w)
-+ (handlers (parse "slo17w"))
-+)
-+
-+(dnf f-32-rs5 "extended 5-bit code" () 22 5)
-+(dnop rs5 "destination register2" () h-gr f-32-rs5)
-+
-+; ==============================================================================
-+; Enums.
-+; ==============================================================================
-+; insn32-opc6c3_7: bits 19 (1 bits)
-+(define-normal-insn-enum insn32-opc6c3_7 "insn opcode group enums" () OPC6C3_7_ f-32v2_19_1
-+ ("SBI_GP" "ADDI_GP")
-+)
-+
-+; insn32-opc6c3_6: bits 19-18 (2 bits)
-+(define-normal-insn-enum insn32-opc6c3_6 "insn opcode group enums" () OPC6C3_6_ f-32v2_19_2
-+ ("LHI_GP" "LHSI_GP" "SHI_GP" "XWI_GP")
-+)
-+
-+; insn32-opc6c3_6_3: bits 17 (1 bits)
-+(define-normal-insn-enum insn32-opc6c3_6_3 "insn opcode group enums" () OPC6C3_6_3_ f-32v2_17_1
-+ ("LWI_GP" "SWI_GP")
-+)
-+
-+; insn32-opc6c2_7: bits 19 (1 bits)
-+(define-normal-insn-enum insn32-opc6c2_7 "insn opcode group enums" () OPC6C2_7_ f-32v2_19_1
-+ ("LBI_GP" "LBSI_GP")
-+)
-+
-+
-+; ==============================================================================
-+; Instructions
-+; ==============================================================================
-+;ADDI.gp (GP-implied Add Immediate)
-+(dni addi.gp "add the content of implied GP register with a signed constat"
-+ (A32V2)
-+ "addi.gp $rt5,$slo19"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_SBGP rt5 OPC6C3_7_ADDI_GP slo19)
-+ (set rt5 (add (reg h-gr (c-code SI "H_GR_GP")) slo19))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+;MADDR32 (Multiply and Add to 32-bit Register)
-+(dni maddr32 "Multiply the two 32-bit registers and add the lower 32-bit result with the destination"
-+ (A32V2 MAC)
-+ "maddr32 $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_1 SUB10G_6 ALU_2V2_SUB10C6_MADDR32)
-+ (set rt5 (add (trunc USI (mul (zext UDI ra5) (zext UDI rb5))) rt5))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+;MSUBR32 (Multiply and Subtract from 32-bit Register)
-+(dni msubr32 "Multiply the two 32-bit registers and sub the lower 32-bit result from the destination"
-+ (A32V2 MAC)
-+ "msubr32 $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_1 SUB10G_6 ALU_2V2_SUB10C6_MSUBR32)
-+ (set rt5 (sub rt5 (trunc USI (mul (zext UDI ra5) (zext UDI rb5)))))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+;MULR64 (Multiply Word Unsigned to Registers)
-+(dni mulr64 "Multiply the unsigned integer contents of two 32-bit registers and write the 64-bit result to an even/odd pair of 32-bit register"
-+ (A32V2 MAC NOT_V3M)
-+ "mulr64 $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_1 SUB10G_5 ALU_2V2_SUB10C5_MULT64)
-+ (sequence ((UDI product))
-+ (set product (mul (zext UDI ra5) (zext UDI rb5)))
-+ (if (eq (c-code USI "GET_H_SR_FLD(PSW,BE)") (const 1))
-+ (sequence ()
-+ (set (reg h-gr (or (index-of rt5) (const #x00000001))) (trunc SI product))
-+ (set (reg h-gr (and (index-of rt5) (const #xfffffffe))) (trunc SI (srl product (const 32)))))
-+
-+ (sequence ()
-+ (set (reg h-gr (or (index-of rt5) (const #x00000001))) (trunc SI (srl product (const 32))))
-+ (set (reg h-gr (and (index-of rt5) (const #xfffffffe))) (trunc SI product)))))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+;MULSR64 (Multiply Word Signed to Registers)
-+(dni mulsr64 "Multiply the signed integer contents of two 32-bit registers and write the 64-bit result to an even/odd pair of 32-bit register"
-+ (A32V2 MAC NOT_V3M)
-+ "mulsr64 $rt5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_2 rt5 ra5 rb5 SUB10D_1 SUB10G_5 ALU_2V2_SUB10C5_MULTS64)
-+ (sequence ((DI product))
-+ (set product (mul (ext DI ra5) (ext DI rb5)))
-+ (if (eq (c-code USI "GET_H_SR_FLD(PSW,BE)") (const 1))
-+ (sequence ()
-+ (set (reg h-gr (or (index-of rt5) (const #x00000001))) (trunc SI product))
-+ (set (reg h-gr (and (index-of rt5) (const #xfffffffe))) (trunc SI (srl product (const 32)))))
-+
-+ (sequence ()
-+ (set (reg h-gr (or (index-of rt5) (const #x00000001))) (trunc SI (srl product (const 32))))
-+ (set (reg h-gr (and (index-of rt5) (const #xfffffffe))) (trunc SI product)))))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+;SBI.gp (GP-implied Store Byt Immediate)
-+(dni sbi.gp "To store an 8-bit byte from a general register into a memory location"
-+ (A32V2)
-+ "sbi.gp $rt5,[+$slo19]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_SBGP rt5 OPC6C3_7_SBI_GP slo19)
-+ (sequence()
-+ (c-code VOID "if (DOES_USE_REG_VIEW_DATA_VALUE_WP(current_cpu)) {\n")
-+ (c-code VOID " IS_CORNER_CASE(current_cpu) = 1;\n")
-+ (c-call VOID " store_register_view_data =" rt5)
-+ (c-code VOID "}\n")
-+ (set (mem QI (add (reg h-gr (c-code SI "H_GR_GP")) slo19)) (trunc QI rt5))
-+ (c-code VOID "if (DOES_USE_REG_VIEW_DATA_VALUE_WP(current_cpu)) {\n")
-+ (c-code VOID " IS_CORNER_CASE(current_cpu) = 0;\n")
-+ (c-code VOID "}\n")
-+ )
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+;SHI.gp (GP-implied Store Halfword Immediate)
-+(dni shi.gp "To store a 16-bit halfword from a general register into a memory location"
-+ (A32V2)
-+ "shi.gp $rt5,[+$slo18h]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_HWGP rt5 OPC6C3_6_SHI_GP slo18h)
-+ (sequence()
-+ (c-code VOID "if (DOES_USE_REG_VIEW_DATA_VALUE_WP(current_cpu)) {\n")
-+ (c-code VOID " IS_CORNER_CASE(current_cpu) = 1;\n")
-+ (c-call VOID " store_register_view_data =" rt5)
-+ (c-code VOID "}\n")
-+ (set (mem HI (add (reg h-gr (c-code SI "H_GR_GP")) slo18h)) (trunc HI rt5))
-+ (c-code VOID "if (DOES_USE_REG_VIEW_DATA_VALUE_WP(current_cpu)) {\n")
-+ (c-code VOID " IS_CORNER_CASE(current_cpu) = 0;\n")
-+ (c-code VOID "}\n")
-+ )
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+;SWI.gp (GP-implied Store Word Immediate)
-+(dni swi.gp "To store a 32-bit word from a general register into a memory location"
-+ (A32V2)
-+ "swi.gp $rt5,[+$slo17w]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_HWGP rt5 OPC6C3_6_XWI_GP OPC6C3_6_3_SWI_GP slo17w)
-+ (set (mem SI (add (reg h-gr (c-code SI "H_GR_GP")) slo17w)) rt5)
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+;LBI.gp (GP-implied Load Byte Immediate)
-+(dni lbi.gp "To load a zero-extended 8-bit byte from memory into general register"
-+ (A32V2)
-+ "lbi.gp $rt5,[+$slo19]"
-+ (+ IFMT_32 OPC6G_2 OPC6C2_LBGP rt5 OPC6C2_7_LBI_GP slo19)
-+ (set rt5 (zext USI (mem UQI (add (reg h-gr (c-code SI "H_GR_GP")) slo19))))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+;LBSI.gp (GP-omplied Load Byte Signed Immediate)
-+(dni lbsi.gp "To load a sign-extended 8-bit byte from memory into general register"
-+ (A32V2)
-+ "lbsi.gp $rt5,[+$slo19]"
-+ (+ IFMT_32 OPC6G_2 OPC6C2_LBGP rt5 OPC6C2_7_LBSI_GP slo19)
-+ (set rt5 (ext SI (mem UQI (add (reg h-gr (c-code SI "H_GR_GP")) slo19))))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+;LHI.gp (GP-implied Load Halfword Immediate)
-+(dni lhi.gp "To load a zero-extended 16-bit helfword from memory into general register"
-+ (A32V2)
-+ "lhi.gp $rt5,[+$slo18h]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_HWGP rt5 OPC6C3_6_LHI_GP slo18h)
-+ (set rt5 (zext USI (mem UHI (add (reg h-gr (c-code SI "H_GR_GP")) slo18h))))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+;LHSI.gp (GP-implied Load Signed Halfword Immediate)
-+(dni lhsi.gp "To load a signed-extended 16-bit helfword from memory into general register"
-+ (A32V2)
-+ "lhsi.gp $rt5,[+$slo18h]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_HWGP rt5 OPC6C3_6_LHSI_GP slo18h)
-+ (set rt5 (ext SI (mem HI (add (reg h-gr (c-code SI "H_GR_GP")) slo18h))))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+;LWI.gp (GP-implied Load Halfword Immediate)
-+(dni lwi.gp "To load a 32-bit word from memory into general register"
-+ (A32V2)
-+ "lwi.gp $rt5,[+$slo17w]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_HWGP rt5 OPC6C3_6_XWI_GP OPC6C3_6_3_LWI_GP slo17w)
-+ (sequence ((SI data))
-+ (set data (mem SI (add (reg h-gr (c-code SI "H_GR_GP")) slo17w)))
-+ (set rt5 (c-code USI "nds32_baseline_am2gr_handler(current_cpu, tmp_data)")))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+;DIVR (Unsigned Integer Divide to Registers)
-+(dni divr "divide the unsigned integer content of one register with the unsigned integer content of another register"
-+ (A32V2 DIV)
-+ "divr $rt5,$rs5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 rs5 SUB10G2_2 ALU_1_SUB10C2_DIVR)
-+ (if (ne USI rb5 #x0)
-+ ;then part
-+ (sequence ((USI tmp_ra) (USI tmp_rb))
-+ (c-code VOID "\tDIVIDEND_VALUE(current_cpu) = *FLD(i_ra5); \n")
-+ (c-code VOID "\tDIVIDER_VALUE(current_cpu) = *FLD(i_rb5); \n")
-+ (set tmp_ra ra5)
-+ (set tmp_rb rb5)
-+ (if (ne (index-of rs5) (index-of rt5))
-+ (set rs5 (umod tmp_ra tmp_rb)))
-+ (set rt5 (udiv tmp_ra tmp_rb)))
-+
-+ ;else part
-+ (sequence ()
-+ (c-code VOID "if (!TEST_H_SR_FLD(INT_MASK,IDIVZE)){ \n")
-+ (set rs5 #x0)
-+ (set rt5 #x0)
-+ (c-code VOID "} else {\n")
-+
-+ ;Also update sub_type if it is arithmetic exception caused by 'divided by zero'
-+ ;However, sub_type is support only when spaV3 or latter
-+ (c-code VOID " if (2 <= GET_H_SR_FLD(MSC_CFG, BASEV)) {\n")
-+ (c-code VOID " CPU_INT_ARGS_SWID(current_cpu) = 1;\n")
-+ (c-code VOID " }\n")
-+
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_ARITH;\n")
-+ (c-code VOID " goto DIVR_interruption;\n")
-+ (c-code VOID "}\n")))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+;DIVSR (Signed Integer Divide to Registers)
-+(dni divsr "divide the signed integer content of one register with the signed integer content of another register"
-+ (A32V2 DIV)
-+ "divsr $rt5,$rs5,$ra5,$rb5"
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 rs5 SUB10G2_2 ALU_1_SUB10C2_DIVSR)
-+ (if (ne USI rb5 #x0)
-+ ;then part
-+ (if (eq USI (and (eq USI ra5 (const #x80000000)) (eq USI rb5 (const #xffffffff))) (const #x1))
-+
-+ ;then part
-+ (sequence ()
-+
-+ ;Also update sub_type if it is arithmetic exception caused by quotient overflow
-+ ;However, sub_type is support only when spaV3 or latter
-+ (c-code VOID " if (2 <= GET_H_SR_FLD(MSC_CFG, BASEV)) {\n")
-+ (c-code VOID " CPU_INT_ARGS_SWID(current_cpu) = 2;\n")
-+ (c-code VOID " }\n")
-+
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_ARITH;\n")
-+ (c-code VOID " goto DIVSR_interruption;\n"))
-+
-+ ;else part
-+ (sequence ((SI tmp_ra) (SI tmp_rb))
-+ (c-code VOID "\tDIVIDEND_VALUE(current_cpu) = *FLD(i_ra5); \n")
-+ (c-code VOID "\tDIVIDER_VALUE(current_cpu) = *FLD(i_rb5); \n")
-+ (set tmp_ra ra5)
-+ (set tmp_rb rb5)
-+ (if (ne (index-of rs5) (index-of rt5))
-+ (set rs5 ((.sym "mod") tmp_ra tmp_rb)))
-+ (set rt5 (div tmp_ra tmp_rb))))
-+
-+ ;else part
-+ (sequence ()
-+ (c-code VOID "if (!TEST_H_SR_FLD(INT_MASK,IDIVZE)){ \n")
-+ (set rs5 #x0)
-+ (set rt5 #x0)
-+ (c-code VOID "} else {\n")
-+
-+ ;Also update sub_type if it is arithmetic exception caused by 'divided by zero'
-+ ;However, sub_type is support only when spaV3 or latter
-+ (c-code VOID " if (2 <= GET_H_SR_FLD(MSC_CFG, BASEV)) {\n")
-+ (c-code VOID " CPU_INT_ARGS_SWID(current_cpu) = 1;\n")
-+ (c-code VOID " }\n")
-+
-+ (c-code VOID " CPU_INT_ARGS_IPC(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_EVA(current_cpu) = pc;\n")
-+ (c-code VOID " CPU_INT_ARGS_ICODE(current_cpu) = NDS32_ICODE_ARITH;\n")
-+ (c-code VOID " goto DIVSR_interruption;\n")
-+ (c-code VOID "}\n")))
-+ ((n1hm (unit u-exec))
-+ )
-+)
-+
-+;LMWA (Load Multiple Word with Alignment Check)
-+(define-pmacro (lmwa-op suffix0 suffix1 suffix2)
-+ (begin
-+ (define-full-insn (.sym "lmwa." suffix0 suffix1 suffix2) (.str "lmwa." suffix0 suffix1 suffix2)
-+ (A32V2 NOT_V3M)
-+ (.str "lmwa." suffix0 suffix1 suffix2 " $rt5,[$ra5],$rb5,$mask4")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_LSMW rt5 ra5 rb5 mask4 (.sym "LSMW_SUB4_LMW" suffix0 suffix1 suffix2) RES2_30_1)
-+ ()
-+ (sequence ()
-+ (c-call VOID " nds32_lmwa_handler" pc
-+ (enum SI (.sym "LSMW_SUB4_LMW" suffix0 suffix1 suffix2))
-+ (index-of rt5) (index-of ra5) (index-of rb5) mask4)
-+ (c-code VOID (.str " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto LMWA_" (.upcase suffix0) (.upcase suffix1) (.upcase suffix2) "_interruption;\n")))
-+ ((n1hm (unit u-load)))
-+ ((print "insn-lsmw"))
-+ )
-+ (dnmi (.sym "lmwa." suffix0 suffix1 suffix2 "2") (.str "lmwa." suffix0 suffix1 suffix2 "2")
-+ (A32V2)
-+ (.str "lmwa." suffix0 suffix1 suffix2 " $rt5,[$ra5],$rb5")
-+ (emit (.sym "lmwa." suffix0 suffix1 suffix2) rt5 ra5 rb5 (f-32t5-mask4 0)))
-+ )
-+)
-+(lmwa-op b i "")
-+(lmwa-op b i m)
-+(lmwa-op b d "")
-+(lmwa-op b d m)
-+(lmwa-op a i "")
-+(lmwa-op a i m)
-+(lmwa-op a d "")
-+(lmwa-op a d m)
-+
-+;SMWA (Store Multiple Word with Alignment Check)
-+(define-pmacro (smwa-op suffix0 suffix1 suffix2)
-+ (begin
-+ (define-full-insn (.sym "smwa." suffix0 suffix1 suffix2) (.str "smwa." suffix0 suffix1 suffix2)
-+ (A32V2 NOT_V3M)
-+ (.str "smwa." suffix0 suffix1 suffix2 " $rt5,[$ra5],$rb5,$mask4")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_LSMW rt5 ra5 rb5 mask4 (.sym "LSMW_SUB4_SMW" suffix0 suffix1 suffix2) RES2_30_1)
-+ ()
-+ (sequence ()
-+ (c-call VOID " nds32_smwa_handler" pc
-+ (enum SI (.sym "LSMW_SUB4_SMW" suffix0 suffix1 suffix2))
-+ (index-of rt5) (index-of ra5) (index-of rb5) mask4)
-+ (c-code VOID (.str " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto SMWA_" (.upcase suffix0) (.upcase suffix1) (.upcase suffix2) "_interruption;\n")))
-+ ((n1hm (unit u-store)))
-+ ((print "insn-lsmw"))
-+ )
-+ (dnmi (.sym "smwa." suffix0 suffix1 suffix2 "2") (.str "smwa." suffix0 suffix1 suffix2 "2")
-+ (A32V2)
-+ (.str "smwa." suffix0 suffix1 suffix2 " $rt5,[$ra5],$rb5")
-+ (emit (.sym "smwa." suffix0 suffix1 suffix2) rt5 ra5 rb5 (f-32t5-mask4 0)))
-+ )
-+)
-+(smwa-op b i "")
-+(smwa-op b i m)
-+(smwa-op b d "")
-+(smwa-op b d m)
-+(smwa-op a i "")
-+(smwa-op a i m)
-+(smwa-op a d "")
-+(smwa-op a d m)
-+
-+;LBUP (Load Byte with User Privilege Translation)
-+(dni lbup "load byte with user privilege"
-+ (A32V2 NOT_V3M)
-+ "lbup $rt5,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_4 MEM_SUB10C4_LBUP)
-+ (sequence ()
-+ (c-call VOID "set_user_privilege")
-+ (set rt5 (mem UQI (add ra5 (sll rb5 si))))
-+ (c-call VOID "clr_user_privilege")
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+)
-+(dnmi lbup1 "load byte with user privilege (1)"
-+ (A32V2 NOT_V3M)
-+ "lbup $rt5,[$ra5+($rb5<<$si)]"
-+ (emit lbup rt5 ra5 rb5 si)
-+)
-+(dnmi lbup2 "load byte with user privilege (2)"
-+ (A32V2 NOT_V3M)
-+ "lbup $rt5,[$ra5+$rb5]"
-+ (emit lbup rt5 ra5 rb5 (f-32t3-sub10si 0))
-+)
-+
-+;SBUP (Store Byte with User Privilege Translation)
-+(dni sbup "store byte with user privilege"
-+ (A32V2 NOT_V3M)
-+ "sbup $rt5,[$ra5+$rb5<<$si]"
-+ (+ IFMT_32 OPC6G_3 OPC6C3_MEM rt5 ra5 rb5 SUB10DSI_0 si SUB10G_5 MEM_SUB10C5_SBUP)
-+ (sequence ()
-+ (c-call VOID "set_user_privilege")
-+ (c-code VOID "if (DOES_USE_REG_VIEW_DATA_VALUE_WP(current_cpu)) {\n")
-+ (c-code VOID " IS_CORNER_CASE(current_cpu) = 1;\n")
-+ (c-call VOID " store_register_view_data =" rt5)
-+ (c-code VOID "}\n")
-+ (set UQI (mem UQI (add ra5 (sll rb5 si))) rt5)
-+ (c-code VOID "if (DOES_USE_REG_VIEW_DATA_VALUE_WP(current_cpu)) {\n")
-+ (c-code VOID " IS_CORNER_CASE(current_cpu) = 0;\n")
-+ (c-code VOID "}\n")
-+ (c-call VOID "clr_user_privilege")
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+)
-+(dnmi sbup1 "store byte with user privilege (1)"
-+ (A32V2 NOT_V3M)
-+ "sbup $rt5,[$ra5+($rb5<<$si)]"
-+ (emit sbup rt5 ra5 rb5 si)
-+)
-+(dnmi sbup2 "store byte with user privilege (2)"
-+ (A32V2 NOT_V3M)
-+ "sbup $rt5,[$ra5+$rb5]"
-+ (emit sbup rt5 ra5 rb5 (f-32t3-sub10si 0))
-+)
-+
-+;
-+; 20090413, internal instruction
-+;
-+(define-pmacro (lmwzb-op suffix0 suffix2)
-+ (begin
-+ (define-full-insn (.sym "lmwzb." suffix0 suffix2) (.str "lmwzb." suffix0 suffix2)
-+ (A32V2 STRING (PIPE O) (IDOC MEM))
-+ (.str "lmwzb." suffix0 suffix2 " $rt5,[$ra5],$rb5,$mask4")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_LSMW rt5 ra5 rb5 mask4 (.sym "LSMW_SUB4_LMW" suffix0 "i" suffix2) RES2_30_2)
-+ ()
-+ (sequence ()
-+ (c-call VOID " nds32_lmwzb_handler" pc
-+ (enum SI (.sym "LSMW_SUB4_LMW" suffix0 "i" suffix2))
-+ (index-of rt5) (index-of ra5) (index-of rb5) mask4)
-+ (c-code VOID (.str " if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n"))
-+ (c-code VOID (.str " DBP_LOCK(current_cpu) = 0;\n"))
-+ (c-code VOID (.str " if (CPU_INT_ARGS_ICODE(current_cpu) != NDS32_ICODE_DNDEB_A) { \n"))
-+ (c-code VOID (.str " goto LMWZB_" (.upcase suffix0) (.upcase suffix2) "_interruption;\n"))
-+ (c-code VOID (.str " }\n"))
-+ (c-code VOID (.str " }\n"))
-+ )
-+ (
-+ (n1hm (unit u-load))
-+ )
-+ ((print "insn-lsmw"))
-+ )
-+ (dnmi (.sym "lmwzb." suffix0 suffix2 "2") (.str "lmwzb." suffix0 suffix2 "2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "lmwzb." suffix0 suffix2 " $rt5,[$ra5],$rb5")
-+ (emit (.sym "lmwzb." suffix0 suffix2) rt5 ra5 rb5 (f-32t5-mask4 0))
-+ )
-+ )
-+)
-+(lmwzb-op b "")
-+(lmwzb-op b m)
-+(lmwzb-op a "")
-+(lmwzb-op a m)
-+
-+;
-+; 20090413, internal instruction
-+;
-+(define-pmacro (smwzb-op suffix0 suffix2)
-+ (begin
-+ (define-full-insn (.sym "smwzb." suffix0 suffix2) (.str "smwzb." suffix0 suffix2)
-+ (A32V2 STRING (PIPE O) (IDOC MEM))
-+ (.str "smwzb." suffix0 suffix2 " $rt5,[$ra5],$rb5,$mask4")
-+ (+ IFMT_32 OPC6G_3 OPC6C3_LSMW rt5 ra5 rb5 mask4 (.sym "LSMW_SUB4_SMW" suffix0 "i" suffix2) RES2_30_2)
-+ ()
-+ (sequence ()
-+ (c-call VOID " nds32_smwzb_handler" pc
-+ (enum SI (.sym "LSMW_SUB4_SMW" suffix0 "i" suffix2))
-+ (index-of rt5) (index-of ra5) (index-of rb5) mask4)
-+ (c-code VOID (.str " if (NDS32_HAS_INTERRUPTION(current_cpu)) {\n"))
-+ (c-code VOID (.str " DBP_LOCK(current_cpu) = 0;\n"))
-+ (c-code VOID (.str " if (!((CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_A)||(CPU_INT_ARGS_ICODE(current_cpu) == NDS32_ICODE_DNDEB_V))) { \n"))
-+ (c-code VOID (.str " goto SMWZB_" (.upcase suffix0) (.upcase suffix2) "_interruption;\n"))
-+ (c-code VOID (.str " }\n"))
-+ (c-code VOID (.str " }\n"))
-+ )
-+ (
-+ (n1hm (unit u-store))
-+ )
-+ ((print "insn-lsmw"))
-+ )
-+ (dnmi (.sym "smwzb." suffix0 suffix2 "2") (.str "smwzb." suffix0 suffix2 "2")
-+ (NO-DIS (PIPE O) (IDOC MEM))
-+ (.str "smwzb." suffix0 suffix2 " $rt5,[$ra5],$rb5")
-+ (emit (.sym "smwzb." suffix0 suffix2) rt5 ra5 rb5 (f-32t5-mask4 0))
-+ )
-+ )
-+)
-+(smwzb-op b "")
-+(smwzb-op b m)
-+(smwzb-op a "")
-+(smwzb-op a m)
-+
-+
-diff -Nur binutils-2.24.orig/cgen/cpu/nds32v3.cpu binutils-2.24/cgen/cpu/nds32v3.cpu
---- binutils-2.24.orig/cgen/cpu/nds32v3.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds32v3.cpu 2016-06-30 21:26:12.637892490 +0200
-@@ -0,0 +1,199 @@
-+; ==============================================================================
-+; Andes NDS32 family CPU 32-bit instruction set version 3. -*- Scheme -*-
-+; Andes Technology Corporation
-+; ==============================================================================
-+; This file is included by nds32.cpu.
-+
-+; ==============================================================================
-+; Attributes.
-+; ==============================================================================
-+; (V3) is already defined in nds32.cpu
-+
-+; ==============================================================================
-+; 32-bit baseline version2 instructions fields
-+; ==============================================================================
-+(df f-32t1-disp8 "disp8" (PCREL-ADDR RELOC) 24 8 INT
-+ ((value pc) (sra SI (sub SI value pc) (const 1)))
-+ ((value pc) (add SI (sll SI value (const 1)) pc)))
-+(dnf f-32t21-sub1 "sub11" () 12 1)
-+(df f-32t2-simm11 "simm11" () 13 11 INT #f #f)
-+(dnf f-32t21-ulo5 "uimm5" () 22 5)
-+(dnf f-32t21-subop "v3 subop" () 27 5)
-+
-+; ==============================================================================
-+; Hardware pieces.
-+; ==============================================================================
-+(dnh h-disp8 "8-bits displacement" ()
-+ (immediate (INT 8))
-+ () () ()
-+)
-+(dnh h-slo11 "signed low 11 bits" ()
-+ (immediate (INT 11))
-+ () () ()
-+)
-+
-+(dnh h-ulo5 "unsigned low 5 bits" ()
-+ (immediate (UINT 5))
-+ () () ()
-+)
-+
-+; ==============================================================================
-+; Instruction Operands.
-+; ==============================================================================
-+(define-operand
-+ (name disp8)
-+ (comment "8-bit displacement")
-+ (attrs RELAX)
-+ (type h-disp8)
-+ (index f-32t1-disp8)
-+ (handlers (parse "nds32_address") (print "address"))
-+)
-+
-+; For signed immediate 11 bits
-+(define-operand
-+ (name simm11)
-+ (comment "11-bit signed immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-slo11)
-+ (index f-32t2-simm11)
-+ (handlers (parse "slo15"))
-+)
-+
-+(define-operand
-+ (name ulo5)
-+ (comment "5-bit un-signed immediate")
-+ (attrs HASH-PREFIX)
-+ (type h-ulo5)
-+ (index f-32t21-ulo5)
-+ (handlers (parse "unsigned_immediate"))
-+)
-+
-+; ==============================================================================
-+; Enums.
-+; ==============================================================================
-+; insn32-subop: bits 27-31 (5 bits)
-+(define-normal-insn-enum insn32-subop "5-bit subcode domain enums" () SUB5BITS_OPC_ f-32t21-subop
-+ ("ADD_SLLI" "SUB_SLLI" "AND_SLLI" "XOR_SLLI" "OR_SLLI" "5" "6" "7"
-+ "8" "9" "10" "11" "12" "13" "14" "15"
-+ "16" "17" "18" "19" "20" "OR_SRLI" "22" "23"
-+ "24" "25" "26" "27" "ADD_SRLI" "SUB_SRLI" "AND_SRLI" "XOR_SRLI"
-+ )
-+)
-+
-+(define-normal-insn-enum insn32-3g5-br3-5g- "BR3" () OPC3G5_BR3_5G_ f-32t21-sub1
-+ ("BEQC" "BNEC" ))
-+; ==============================================================================
-+; Instruction definitions.
-+; ==============================================================================
-+
-+;BEQC, BNEC
-+(define-pmacro (branch-constant-op suffix comp-op)
-+ (begin
-+ (dni (.sym b suffix c) (.str "branch on " suffix " constant")
-+ (COND-CTI V3)
-+ (.str "b" suffix "c $rt5,$simm11,$disp8")
-+ (+ IFMT_32 OPC6G_5 OPC6C5_BR3 rt5 (.sym "OPC3G5_BR3_5G_B" (.upcase suffix) "C") simm11 disp8)
-+ (sequence ()
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID (.str "\t goto B" (.upcase suffix) "C_interruption;\n")))
-+ (if (comp-op SI rt5 simm11)
-+ (sequence ()
-+ (c-code VOID (.str "current_cpu->IFC_clear();\n"))
-+ (set pc disp8))))
-+ ((n1hm (unit u-cti) (unit u-cmp (cycles 0)))))))
-+
-+(branch-constant-op eq eq)
-+(branch-constant-op ne ne)
-+
-+
-+(dni jralnez "jump register and link on not equl"
-+ (V3 NOT_V3M)
-+ ("jralnez $rt5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_JR rt5 RES5_12_0 rb5 SUB10D_0 SUB10G_0 JR_SUB10C0_JRALNEZ)
-+ (sequence ()
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID " goto JRALNEZ_interruption;\n"))
-+ (if (ne rb5 (const #x0))
-+ (sequence()
-+ ;Used to check whether target instruction address is not half aligned
-+ (c-call VOID "nds32_branch_target_alignment_check" pc rb5)
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto JRALNEZ_interruption;\n")))
-+ (if (ne rb5 (const #x0))
-+ (sequence ((USI Jaddr))
-+ (set Jaddr rb5)
-+ (c-call VOID "link_and_IFC_clear" (index-of rt5))
-+ (set pc Jaddr))
-+ (c-call VOID "link" (index-of rt5))))
-+())
-+
-+(dnmi jralnez2 "jralnez2"
-+ (V3 NOT_V3M)
-+ "jralnez $rb5"
-+ (emit jralnez (f-32-rt5 30) rb5)
-+)
-+
-+(dni jrnez "jump register on not equl"
-+ (V3 NOT_V3M)
-+ ("jrnez $rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_JR RES10_7_0 rb5 SUB10D_NO_IDT SUB10G_0 JR_SUB10C0_JRNEZ)
-+ (sequence ()
-+ (if (c-call USI "audio_exception_check" )
-+ (c-code VOID "goto JRNEZ_interruption;\n"))
-+ (if (ne rb5 (const #x0))
-+ (sequence()
-+ ;Used to check whether target instruction address is not half aligned
-+ (c-call VOID "nds32_branch_target_alignment_check" pc rb5)
-+ (c-code VOID " if (NDS32_HAS_INTERRUPTION(current_cpu)) goto JRNEZ_interruption;\n")))
-+ (if (ne rb5 (const #x0))
-+ (sequence ()
-+ (c-code VOID "current_cpu->IFC_clear();")
-+ (set pc rb5)))
-+ )
-+ ()
-+)
-+
-+(define-pmacro (arith-op-v3 mnemonic sem-op shift-op)
-+ (begin
-+ (dni (.sym mnemonic "_" shift-op "i") (.str mnemonic "with logic shift")
-+ (V3 NOT_V3M)
-+ (.str mnemonic "_" shift-op "i $rt5,$ra5,$rb5,$ulo5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 ulo5 (.sym "SUB5BITS_OPC_" (.upcase mnemonic) "_" (.upcase shift-op) "I"))
-+ (set rt5 (sem-op ra5 (shift-op rb5 ulo5)))
-+ ()
-+ )
-+ )
-+)
-+(arith-op-v3 add add sll)
-+(arith-op-v3 add add srl)
-+(arith-op-v3 sub sub sll)
-+(arith-op-v3 sub sub srl)
-+(arith-op-v3 and and sll)
-+(arith-op-v3 and and srl)
-+(arith-op-v3 or or sll)
-+(arith-op-v3 or or srl)
-+(arith-op-v3 xor xor sll)
-+(arith-op-v3 xor xor srl)
-+
-+(dnmi cctl5 "cctl5"
-+ (NO-DIS (PIPE OS) (IDOC MISC) NOT_V3M)
-+ "cctl $cctlst,$cctllvl"
-+ (emit cctl (f-32-rt5 0) (f-32-ra5 0) cctlst cctllvl)
-+)
-+
-+(dni bitc "Bit clear of a register"
-+ (V3 NOT_V3M)
-+ ("bitc $rt5,$ra5,$rb5")
-+ (+ IFMT_32 OPC6G_4 OPC6C4_ALU_1 rt5 ra5 rb5 SUB10D_0 SUB10G_2 ALU_1_SUB10C2_BITC)
-+ (set rt5 (and USI ra5 (inv rb5)))
-+ ()
-+)
-+
-+(dni bitci "Bit clear immediate of a register"
-+ (V3 NOT_V3M)
-+ ("bitci $rt5,$ra5,$ulo15")
-+ (+ IFMT_32 OPC6G_6 OPC6C6_BITCI rt5 ra5 ulo15)
-+ (set rt5 (and USI ra5 (inv ulo15))
-+ )
-+ ()
-+)
-+
-diff -Nur binutils-2.24.orig/cgen/cpu/nds_eit.cpu binutils-2.24/cgen/cpu/nds_eit.cpu
---- binutils-2.24.orig/cgen/cpu/nds_eit.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/nds_eit.cpu 2016-06-30 21:26:12.641892646 +0200
-@@ -0,0 +1,52 @@
-+; ==============================================================================
-+; Andes NDS32 family Execution on Instruction Table(EIT) Extension -*- Scheme -*-
-+; Andes Technology Corporation
-+; ==============================================================================
-+; This file is included by nds32.cpu.
-+; ==============================================================================
-+; Instructions
-+; ==============================================================================
-+
-+(define-full-insn
-+ ex5_it
-+ "ex9.it with index 0 to 31"
-+ (UNCOND-CTI (IDOC MISC) A16 (MACH n1h_v3))
-+ "ex9.it $swid5"
-+ (+ IFMT_16 F16_OPC_4G11 F16_OPC_4G11_3G5 F16_OPC_4G11_3G5_EX5_IT swid5)
-+ ()
-+ (sequence ()
-+ (c-call VOID "nds32_ex9_handler");
-+ (c-code VOID "goto EX5_IT_interruption;\n"))
-+ ((n1hm (unit u-exec (cycles 0))))
-+ ((print "insn-eit"))
-+ )
-+
-+(define-full-insn
-+ ex9_it
-+ "ex9.it with index 32 to 511"
-+ (UNCOND-CTI (IDOC MISC) A16 (MACH n1h_v3))
-+ "ex9.it $swid9"
-+ (+ IFMT_16 F16_OPC_4G13 F16_OPC_4G13_2G1 swid9)
-+ ()
-+ (sequence ()
-+ (c-call VOID "nds32_ex9_handler");
-+ (c-code VOID "goto EX9_IT_interruption;\n"))
-+ ((n1hm (unit u-exec (cycles 0))))
-+ ((print "insn-eit"))
-+ )
-+
-+(dnmi
-+ j.it
-+ "j.it"
-+ (NO-DIS (PIPE OS) (IDOC MISC) A16)
-+ "j.it $concat24"
-+ (emit j disp24)
-+ )
-+
-+(dnmi
-+ jal.it
-+ "jal.it"
-+ (NO-DIS (PIPE OS) (IDOC MISC) A16)
-+ "jal.it $concat24"
-+ (emit jal disp24))
-+
-diff -Nur binutils-2.24.orig/cgen/cpu/openrisc.cpu binutils-2.24/cgen/cpu/openrisc.cpu
---- binutils-2.24.orig/cgen/cpu/openrisc.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/openrisc.cpu 2016-06-30 21:26:12.641892646 +0200
-@@ -0,0 +1,775 @@
-+; OpenRISC family. -*- Scheme -*-
-+; Copyright 2000, 2001 Free Software Foundation, Inc.
-+; Contributed by Johan Rydberg, jrydberg@opencores.org
-+;
-+; This program is free software; you can redistribute it and/or modify
-+; it under the terms of the GNU General Public License as published by
-+; the Free Software Foundation; either version 2 of the License, or
-+; (at your option) any later version.
-+;
-+; This program is distributed in the hope that it will be useful,
-+; but WITHOUT ANY WARRANTY; without even the implied warranty of
-+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+; GNU General Public License for more details.
-+;
-+; You should have received a copy of the GNU General Public License
-+; along with this program; if not, write to the Free Software
-+; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
-+;
-+
-+(include "simplify.inc")
-+
-+; OpenRISC 1000 is an architecture of a family of open source,
-+; synthesizeable RISC microprocessor cores. It is a 32-bit load
-+; and store RISC architecture designed with emphasis on speed,
-+; compact instruction set and scalability. OpenRISC 1000 targets
-+; wide range of embedded environments.
-+
-+(define-arch
-+ (name openrisc)
-+ (comment "OpenRISC 1000")
-+ (insn-lsb0? #t)
-+ (machs openrisc or1300)
-+ (isas or32)
-+)
-+
-+
-+; Attributes
-+
-+; An attribute to describe if a model has insn and/or data caches.
-+(define-attr
-+ (for model)
-+ (type enum)
-+ (name HAS-CACHE)
-+ (comment "if this model has caches")
-+ (values DATA-CACHE INSN-CACHE)
-+)
-+
-+; An attribute to describe if an insn can be in the delay slot or not.
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name NOT-IN-DELAY-SLOT)
-+ (comment "insn can't go in delay slot")
-+)
-+
-+; IDOC attribute for instruction documentation.
-+
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name IDOC)
-+ (comment "insn kind for documentation")
-+ (attrs META)
-+ (values
-+ (MEM - () "Memory")
-+ (ALU - () "ALU")
-+ (FPU - () "FPU")
-+ (BR - () "Branch")
-+ (PRIV - () "Priviledged")
-+ (MISC - () "Miscellaneous")
-+ )
-+)
-+
-+; Enum for exception vectors.
-+(define-enum
-+ (name e-exception)
-+ (comment "exception vectors")
-+ (attrs)
-+ (prefix E_)
-+ (values (("RESET") ("BUSERR" -) ("DPF" -) ("IPF" -) ("EXTINT" -) ("ALIGN" -)
-+ ("ILLEGAL" -) ("PEINT" -) ("DTLBMISS" -) ("ITLBMISS" -) ("RRANGE" -)
-+ ("SYSCALL" -) ("BREAK" -) ("RESERVED" -)))
-+)
-+
-+
-+; Instruction set parameters.
-+
-+(define-isa
-+ ; Name of the ISA.
-+ (name or32)
-+
-+ ; Base insturction length. The insns is always 32 bits wide.
-+ (base-insn-bitsize 32)
-+
-+ ; Address of insn in delay slot
-+ (setup-semantics (set-quiet (reg h-delay-insn) (add pc (attr (current-insn) 4))))
-+)
-+
-+
-+; CPU family definitions.
-+
-+(define-cpu
-+ ; CPU names must be distinct from the architecture name and machine names.
-+ ; The "b" suffix stands for "base" and is the convention.
-+ ; The "f" suffix stands for "family" and is the convention.
-+ (name openriscbf)
-+ (comment "OpenRISC base family")
-+ (endian big)
-+ (word-bitsize 32)
-+)
-+
-+; Generic machine
-+(define-mach
-+ (name openrisc)
-+ (comment "Generic OpenRISC cpu")
-+ (cpu openriscbf)
-+ (bfd-name "openrisc")
-+)
-+
-+; OpenRISC 1300 machine
-+(define-mach
-+ (name or1300)
-+ (comment "OpenRISC 1300")
-+ (cpu openriscbf)
-+ (bfd-name "openrisc:1300")
-+)
-+
-+
-+; Model descriptions
-+
-+; Generic OpenRISC model
-+(define-model
-+ (name openrisc-1) (comment "OpenRISC generic model") (attrs)
-+ (mach openrisc)
-+
-+ ; Nothing special about this.
-+ (unit u-exec "Execution Unit" () 1 1 () () () ())
-+)
-+
-+; OpenRISC 1320
-+(define-model
-+ (name or1320-1) (comment "OpenRISC 1320 model")
-+
-+ ; This model has both instruction and data cache
-+ (attrs (HAS-CACHE INSN-CACHE,DATA-CACHE))
-+ (mach or1300)
-+
-+ ; Nothing special about this.
-+ (unit u-exec "Execution Unit" () 1 1 () () () ())
-+)
-+
-+
-+; Instruction fields.
-+
-+; Attributes:
-+; . PCREL-ADDR pc relative value (for reloc and disassembly purposes)
-+; . ABS-ADDR absolute address (for reloc and disassembly purposes?)
-+; . RESERVED bits are not used to decode insn, must be all 0
-+
-+; Instruction classes.
-+(dnf f-class "insn class" () 31 2)
-+(dnf f-sub "sub class" () 29 4)
-+
-+; Register fields.
-+(dnf f-r1 "r1" () 25 5)
-+(dnf f-r2 "r2" () 20 5)
-+(dnf f-r3 "r3" () 15 5)
-+
-+; Immediates.
-+(df f-simm16 "signed imm (16)" () 15 16 INT #f #f)
-+(dnf f-uimm16 "unsigned imm (16)" () 15 16)
-+(dnf f-uimm5 "unsigned imm (5)" () 4 5)
-+(df f-hi16 "high 16" () 15 16 INT #f #f)
-+(df f-lo16 "low 16" () 15 16 INT #f #f)
-+
-+; Sub fields
-+(dnf f-op1 "op1" () 31 2)
-+(dnf f-op2 "op2" () 29 4)
-+(dnf f-op3 "op3" () 25 2)
-+(dnf f-op4 "op4" () 23 3)
-+(dnf f-op5 "op3" () 25 5)
-+(dnf f-op6 "op4" () 7 3)
-+(dnf f-op7 "op5" () 3 4)
-+
-+(dnf f-i16-1 "uimm16-1" () 10 11)
-+(dnf f-i16-2 "uimm16-2" () 25 5)
-+
-+; PC relative, 26-bit (2 shifted to right)
-+(df f-disp26 "disp26" (PCREL-ADDR) 25 26 INT
-+ ((value pc) (sra WI (sub WI value pc) (const 2)))
-+ ((value pc) (add WI (sll WI value (const 2)) pc)))
-+
-+; absolute, 26-bit (2 shifted to right)
-+(df f-abs26 "abs26" (ABS-ADDR) 25 26 INT
-+ ((value pc) (sra WI pc (const 2)))
-+ ((value pc) (sll WI value (const 2))))
-+
-+(define-multi-ifield
-+ (name f-i16nc)
-+ (comment "16 bit signed")
-+ (attrs SIGN-OPT)
-+ (mode HI)
-+ (subfields f-i16-1 f-i16-2)
-+ (insert (sequence ()
-+ (set (ifield f-i16-2) (and (sra (ifield f-i16nc)
-+ (const 11))
-+ (const #x1f)))
-+ (set (ifield f-i16-1) (and (ifield f-i16nc)
-+ (const #x7ff)))))
-+ (extract (sequence ()
-+ (set (ifield f-i16nc) (c-raw-call SI "@arch@_sign_extend_16bit"
-+ (or (sll (ifield f-i16-2)
-+ (const 11))
-+ (ifield f-i16-1))))))
-+)
-+
-+
-+; Enums.
-+
-+; insn-class: bits 31-30
-+(define-normal-insn-enum insn-class "FIXME" () OP1_ f-class
-+ (.map .str (.iota 4))
-+)
-+
-+(define-normal-insn-enum insn-sub "FIXME" () OP2_ f-sub
-+ (.map .str (.iota 16))
-+)
-+
-+(define-normal-insn-enum insn-op3 "FIXME" () OP3_ f-op3
-+ (.map .str (.iota 4))
-+)
-+
-+(define-normal-insn-enum insn-op4 "FIXME" () OP4_ f-op4
-+ (.map .str (.iota 8))
-+)
-+
-+(define-normal-insn-enum insn-op5 "FIXME" () OP5_ f-op5
-+ (.map .str (.iota 32))
-+)
-+
-+(define-normal-insn-enum insn-op6 "FIXME" () OP6_ f-op6
-+ (.map .str (.iota 8))
-+)
-+
-+(define-normal-insn-enum insn-op7 "FIXME" () OP7_ f-op7
-+ (.map .str (.iota 16))
-+)
-+
-+
-+
-+; Hardware pieces.
-+; These entries list the elements of the raw hardware.
-+; They're also used to provide tables and other elements of the assembly
-+; language.
-+
-+(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
-+
-+(define-hardware
-+ (name h-gr) (comment "general registers") (attrs PROFILE)
-+ (type register WI (32))
-+ (indices keyword ""
-+ ((r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)
-+ (r8 8) (r9 9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14)
-+ (r15 15) (r16 16) (r17 17) (r18 18) (r19 19) (r20 20)
-+ (r21 21) (r22 22) (r23 23) (r24 24) (r25 25) (r26 26)
-+ (r27 27) (r28 28) (r29 29) (r30 30) (r31 31) (lr 11)
-+ (sp 1) (fp 2)))
-+)
-+
-+(define-hardware
-+ (name h-sr) (comment "special registers")
-+ (type register WI (#x20000))
-+ (get (index) (c-call SI "@arch@_h_sr_get_handler" index))
-+ (set (index newval) (c-call VOID "@arch@_h_sr_set_handler" index newval))
-+)
-+
-+(dnh h-hi16 "high 16 bits" () (immediate (INT 16)) () () ())
-+(dnh h-lo16 "low 16 bits" () (immediate (INT 16)) () () ())
-+
-+(dsh h-cbit "condition bit" () (register BI))
-+(dsh h-delay-insn "delay insn addr" () (register SI))
-+
-+
-+; Instruction operands.
-+
-+(dnop sr "special register" (SEM-ONLY) h-sr f-nil)
-+(dnop cbit "condition bit" (SEM-ONLY) h-cbit f-nil)
-+(dnop simm-16 "16 bit signed immediate" () h-sint f-simm16)
-+(dnop uimm-16 "16 bit unsigned immediate" () h-uint f-uimm16)
-+(dnop disp-26 "pc-rel 26 bit" () h-iaddr f-disp26)
-+(dnop abs-26 "abs 26 bit" () h-iaddr f-abs26)
-+(dnop uimm-5 "imm5" () h-uint f-uimm5)
-+
-+(dnop rD "destination register" () h-gr f-r1)
-+(dnop rA "source register A" () h-gr f-r2)
-+(dnop rB "source register B" () h-gr f-r3)
-+
-+(dnop op-f-23 "f-op23" () h-uint f-op4)
-+(dnop op-f-3 "f-op3" () h-uint f-op5)
-+
-+; For hi(foo).
-+(define-operand
-+ (name hi16) (comment "high 16 bit immediate, sign optional")
-+ (attrs SIGN-OPT)
-+ (type h-hi16)
-+ (index f-simm16)
-+ (handlers (parse "hi16"))
-+)
-+
-+; For lo(foo)
-+(define-operand
-+ (name lo16) (comment "low 16 bit immediate, sign optional")
-+ (attrs SIGN-OPT)
-+ (type h-lo16)
-+ (index f-lo16)
-+ (handlers (parse "lo16"))
-+)
-+
-+(define-operand
-+ (name ui16nc)
-+ (comment "16 bit immediate, sign optional")
-+ (attrs)
-+ (type h-lo16)
-+ (index f-i16nc)
-+ (handlers (parse "lo16"))
-+)
-+
-+
-+; Instructions.
-+
-+; Branch releated instructions
-+
-+(dni l-j "jump (absolute iaddr)"
-+ ; This function may not be in delay slot
-+ (NOT-IN-DELAY-SLOT)
-+
-+ "l.j ${abs-26}"
-+ (+ OP1_0 OP2_0 abs-26)
-+
-+ ; We execute the delay slot before doin' the real branch
-+ (delay 1 (set pc abs-26))
-+ ()
-+)
-+
-+(dni l-jal "jump and link (absolute iaddr)"
-+ ; This function may not be in delay slot
-+ (NOT-IN-DELAY-SLOT)
-+
-+ "l.jal ${abs-26}"
-+ (+ OP1_0 OP2_1 abs-26)
-+
-+ ; We execute the delay slot before doin' the real branch
-+ ; Set LR to (delay insn addr + 4)
-+ (sequence ()
-+ (set (reg h-gr 11) (add (reg h-delay-insn) 4))
-+ (delay 1 (set pc abs-26)))
-+ ()
-+)
-+
-+(dni l-jr "jump register (absolute iaddr)"
-+ ; This function may not be in delay slot
-+ (NOT-IN-DELAY-SLOT)
-+
-+ "l.jr $rA"
-+ (+ OP1_0 OP2_5 OP3_0 OP4_0 rA uimm-16)
-+
-+ ; We execute the delay slot before doin' the real branch
-+ (delay 1 (set pc rA))
-+ ()
-+)
-+
-+(dni l-jalr "jump register and link (absolute iaddr)"
-+ ; This function may not be in delay slot
-+ (NOT-IN-DELAY-SLOT)
-+
-+ "l.jalr $rA"
-+ (+ OP1_0 OP2_5 OP3_0 OP4_1 rA uimm-16)
-+
-+ ; We save the value of rA in a temporary slot before setting
-+ ; the link register. This because "l.jalr r11" would cause
-+ ; a forever-and-ever loop otherwise.
-+ ;
-+ ; We execute the delay slot before doin' the real branch
-+ (sequence ((WI tmp-slot))
-+ (set tmp-slot rA)
-+ (set (reg h-gr 11) (add (reg h-delay-insn) 4))
-+ (delay 1 (set pc tmp-slot)))
-+ ()
-+)
-+
-+(dni l-bal "branch and link (pc relative iaddr)"
-+ ; This function may not be in delay slot
-+ (NOT-IN-DELAY-SLOT)
-+
-+ "l.bal ${disp-26}"
-+ (+ OP1_0 OP2_2 disp-26)
-+
-+ ; We execute the delay slot before doin' the real branch
-+ ; Set LR to (delay insn addr + 4)
-+ (sequence ()
-+ (set (reg h-gr 11) (add (reg h-delay-insn) 4))
-+ (delay 1 (set pc disp-26)))
-+ ()
-+)
-+
-+(dni l-bnf "branch if condition bit not set (pc relative iaddr)"
-+ ; This function may not be in delay slot
-+ (NOT-IN-DELAY-SLOT)
-+
-+ "l.bnf ${disp-26}"
-+ (+ OP1_0 OP2_3 disp-26)
-+
-+ ; We execute the delay slot before doin' the real branch
-+ (if (eq cbit 0)
-+ (sequence ()
-+ (delay 1 (set pc disp-26))))
-+ ()
-+)
-+
-+(dni l-bf "branch if condition bit is set (pc relative iaddr)"
-+ ; This function may not be in delay slot
-+ (NOT-IN-DELAY-SLOT)
-+
-+ "l.bf ${disp-26}"
-+ (+ OP1_0 OP2_4 disp-26)
-+
-+ ; We execute the delay slot before doin' the real branch
-+ (if (eq cbit 1)
-+ (sequence ()
-+ (delay 1 (set pc disp-26))))
-+ ()
-+)
-+
-+(dni l-brk "break (exception)"
-+ ; This function may not be in delay slot
-+ (NOT-IN-DELAY-SLOT)
-+
-+ "l.brk ${uimm-16}"
-+ (+ OP1_0 OP2_5 OP3_3 OP4_0 rA uimm-16)
-+
-+ ; FIXME should we do it like this ??
-+ (c-call VOID "@cpu@_cpu_brk" uimm-16)
-+ ()
-+)
-+
-+(dni l-rfe "return from exception"
-+ ; This function may not be in delay slot
-+ (NOT-IN-DELAY-SLOT)
-+
-+ "l.rfe $rA"
-+ (+ OP1_0 OP2_5 OP3_0 OP4_2 rA uimm-16)
-+ (sequence ()
-+ (delay 1 (set pc (c-call SI "@cpu@_cpu_rfe" rA))))
-+ ()
-+)
-+
-+(dni l-sys "syscall (exception)"
-+ ; This function may not be in delay slot
-+ (NOT-IN-DELAY-SLOT)
-+
-+ "l.sys ${uimm-16}"
-+ (+ OP1_0 OP2_5 OP3_2 OP4_0 rA uimm-16)
-+ (sequence()
-+ (delay 1 (set pc (c-call SI "@cpu@_except" pc
-+ #xc00 uimm-16))))
-+ ()
-+)
-+
-+
-+; Misc instructions
-+
-+(dni l-nop "nop"
-+ ()
-+ "l.nop"
-+ (+ OP1_0 OP2_5 OP3_1 OP4_0 rA uimm-16)
-+ (nop)
-+ ()
-+)
-+
-+(dnmi l-ret "ret" ()
-+ "l.ret"
-+ (emit l-jr (rA 11) (uimm-16 0))
-+)
-+
-+(dni l-movhi "movhi"
-+ (DELAY-SLOT)
-+ "l.movhi $rD,$hi16"
-+ (+ OP1_0 OP2_6 hi16 rD rA)
-+ (set rD (sll WI hi16 (const 16)))
-+ ()
-+)
-+
-+
-+; System releated instructions
-+
-+(dni l-mfsr "mfsr"
-+ (DELAY-SLOT)
-+ "l.mfsr $rD,$rA"
-+ (+ OP1_0 OP2_7 rD rA uimm-16)
-+ (set rD (c-call SI "@cpu@_cpu_mfsr" rA))
-+ ()
-+)
-+
-+(dni l-mtsr "mtsr"
-+ (DELAY-SLOT)
-+ "l.mtsr $rA,$rB"
-+ (+ OP1_1 OP2_0 rA rB rD (f-i16-1 0))
-+ (c-call VOID "@cpu@_cpu_mtsr" rA rB)
-+ ()
-+)
-+
-+
-+
-+; Load instructions
-+
-+(dni l-lw "load word"
-+ (DELAY-SLOT)
-+ "l.lw $rD,${simm-16}($rA)"
-+ (+ OP1_2 OP2_0 rD rA simm-16)
-+ (set rD (mem SI (add rA simm-16)))
-+ ()
-+)
-+
-+(dni l-lbz "load byte (zero extend)"
-+ (DELAY-SLOT)
-+ "l.lbz $rD,${simm-16}($rA)"
-+ (+ OP1_2 OP2_1 rD rA simm-16)
-+ (set rD (zext SI (mem QI (add rA simm-16))))
-+ ()
-+)
-+
-+(dni l-lbs "load byte (sign extend)"
-+ (DELAY-SLOT)
-+ "l.lbs $rD,${simm-16}($rA)"
-+ (+ OP1_2 OP2_2 rD rA simm-16)
-+ (set rD (ext SI (mem QI (add rA simm-16))))
-+ ()
-+)
-+
-+(dni l-lhz "load halfword (zero extend)"
-+ (DELAY-SLOT)
-+ "l.lhz $rD,${simm-16}($rA)"
-+ (+ OP1_2 OP2_3 rD simm-16 rA)
-+ (set rD (zext SI (mem HI (add rA simm-16))))
-+ ()
-+)
-+
-+(dni l-lhs "load halfword (sign extend)"
-+ (DELAY-SLOT)
-+ "l.lhs $rD,${simm-16}($rA)"
-+ (+ OP1_2 OP2_4 rD rA simm-16)
-+ (set rD (ext SI (mem HI (add rA simm-16))))
-+ ()
-+)
-+
-+
-+; Store instructions
-+;
-+; We have to use a multi field since the integer is splited over 2 fields
-+
-+(define-pmacro (store-insn mnemonic op2-op mode-op)
-+ (begin
-+ (dni (.sym l- mnemonic)
-+ (.str "l." mnemonic " imm(reg)/reg")
-+ (DELAY-SLOT)
-+ (.str "l." mnemonic " ${ui16nc}($rA),$rB")
-+ (+ OP1_3 op2-op rB rD ui16nc)
-+ (set (mem mode-op (add rA ui16nc)) rB)
-+ ()
-+ )
-+ )
-+)
-+
-+(store-insn sw OP2_5 SI)
-+(store-insn sb OP2_6 QI)
-+(store-insn sh OP2_7 HI)
-+
-+
-+
-+; Shift and rotate instructions
-+
-+; Reserved fields.
-+(dnf f-f-15-8 "nop" (RESERVED) 15 8)
-+(dnf f-f-10-3 "nop" (RESERVED) 10 3)
-+(dnf f-f-4-1 "nop" (RESERVED) 4 1)
-+(dnf f-f-7-3 "nop" (RESERVED) 7 3)
-+
-+(define-pmacro (shift-insn mnemonic op4-op)
-+ (begin
-+ (dni (.sym l- mnemonic)
-+ (.str "l." mnemonic " reg/reg/reg")
-+ ()
-+ (.str "l." mnemonic " $rD,$rA,$rB")
-+ (+ OP1_3 OP2_8 rD rA rB (f-f-10-3 0) op4-op (f-f-4-1 0) OP7_8)
-+ (set rD (mnemonic rA rB))
-+ ()
-+ )
-+ (dni (.sym l- mnemonic "i")
-+ (.str "l." mnemonic " reg/reg/imm")
-+ ()
-+ (.str "l." mnemonic "i $rD,$rA,${uimm-5}")
-+ (+ OP1_2 OP2_13 rD rA (f-f-15-8 0) op4-op uimm-5)
-+ (set rD (mnemonic rA uimm-5))
-+ ()
-+ )
-+ )
-+)
-+
-+(shift-insn sll OP6_0)
-+(shift-insn srl OP6_1)
-+(shift-insn sra OP6_2)
-+(shift-insn ror OP6_4)
-+
-+
-+; Arethmetic insns
-+
-+; Reserved fields.
-+(dnf f-f-10-7 "nop" (RESERVED) 10 7)
-+
-+(define-pmacro (ar-insn-u mnemonic op2-op op5-op)
-+ (begin
-+ (dni (.sym l- mnemonic)
-+ (.str "l." mnemonic " reg/reg/reg")
-+ ()
-+ (.str "l." mnemonic " $rD,$rA,$rB")
-+ (+ OP1_3 OP2_8 rD rA rB (f-f-10-7 0) op5-op)
-+ (set rD (mnemonic rA rB))
-+ ()
-+ )
-+ (dni (.sym l- mnemonic "i")
-+ (.str "l." mnemonic " reg/reg/lo16")
-+ ()
-+ (.str "l." mnemonic "i $rD,$rA,$lo16")
-+ (+ OP1_2 op2-op rD rA lo16)
-+ (set rD (mnemonic rA (and lo16 #xffff)))
-+ ()
-+ )
-+ )
-+)
-+
-+(define-pmacro (ar-insn-s mnemonic op2-op op5-op)
-+ (begin
-+ (dni (.sym l- mnemonic)
-+ (.str "l." mnemonic " reg/reg/reg")
-+ ()
-+ (.str "l." mnemonic " $rD,$rA,$rB")
-+ (+ OP1_3 OP2_8 rD rA rB (f-f-10-7 0) op5-op)
-+ (set rD (mnemonic rA rB))
-+ ()
-+ )
-+ (dni (.sym l- mnemonic "i")
-+ (.str "l." mnemonic " reg/reg/lo16")
-+ ()
-+ (.str "l." mnemonic "i $rD,$rA,$lo16")
-+ (+ OP1_2 op2-op rD rA lo16)
-+ (set rD (mnemonic rA lo16))
-+ ()
-+ )
-+ )
-+)
-+
-+(ar-insn-s add OP2_5 OP7_0)
-+;;(ar-op-s addc OP2_5 OP7_0)
-+(ar-insn-s sub OP2_7 OP7_2)
-+(ar-insn-u and OP2_8 OP7_3)
-+(ar-insn-u or OP2_9 OP7_4)
-+(ar-insn-u xor OP2_10 OP7_5)
-+(ar-insn-u mul OP2_11 OP7_6)
-+;;(ar-op-u mac OP2_12 OP7_7)
-+
-+
-+(dni l-div "divide (signed)"
-+ (DELAY-SLOT)
-+ "l.div $rD,$rA,$rB"
-+ (+ OP1_3 OP2_8 rD rA rB (f-f-10-7 0) OP7_9)
-+ (if VOID (eq rB (const 0))
-+ (c-call VOID "@arch@_cpu_trap" pc (enum SI E_ILLEGAL))
-+ (set rD (div rA rB)))
-+ ()
-+)
-+
-+(dni l-divu "divide (unsigned)"
-+ (DELAY-SLOT)
-+ "l.divu $rD,$rA,$rB"
-+ (+ OP1_3 OP2_8 rD rA rB (f-f-10-7 0) OP7_10)
-+ (if VOID (eq rB (const 0))
-+ (c-call VOID "@arch@_cpu_trap" pc (enum SI E_ILLEGAL))
-+ (set rD (udiv rA rB)))
-+ ()
-+)
-+
-+
-+; Compare instructions
-+
-+; Reserved fields.
-+(dnf f-f-10-11 "nop" (RESERVED) 10 11)
-+
-+; Register compare (both signed and unsigned)
-+(define-pmacro (sf-insn-r op1-op op2-op op3-op op3-op-2 sem-op)
-+ (begin
-+ (dni (.sym l- "sf" (.sym sem-op "s"))
-+ (.str "l." mnemonic " reg/reg")
-+ (DELAY-SLOT)
-+ (.str "l.sf" (.str sem-op) "s $rA,$rB")
-+ (+ op1-op op2-op op3-op-2 rA rB (f-f-10-11 0))
-+ (set cbit (sem-op rA rB))
-+ ()
-+ )
-+ (dni (.sym l- "sf" (.sym sem-op "u"))
-+ (.str "l." mnemonic " reg/reg")
-+ (DELAY-SLOT)
-+ (.str "l.sf" (.str sem-op) "u $rA,$rB")
-+ (+ op1-op op2-op op3-op rA rB (f-f-10-11 0))
-+ (set cbit (sem-op rA rB))
-+ ()
-+ )
-+ )
-+)
-+
-+; Immediate compare (both signed and unsigned)
-+(define-pmacro (sf-insn-i op1-op op2-op op3-op op3-op-2 sem-op)
-+ (begin
-+ (dni (.sym l- "sf" (.sym sem-op "si"))
-+ (.str "l." mnemonic "si reg/imm")
-+ (DELAY-SLOT)
-+ (.str "l.sf" (.str sem-op) "si $rA,${simm-16}")
-+ (+ op1-op op2-op op3-op-2 rA simm-16)
-+ (set cbit (sem-op rA simm-16))
-+ ()
-+ )
-+ (dni (.sym l- "sf" (.sym sem-op "ui"))
-+ (.str "l." mnemonic "ui reg/imm")
-+ (DELAY-SLOT)
-+ (.str "l.sf" (.str sem-op) "ui $rA,${uimm-16}")
-+ (+ op1-op op2-op op3-op rA uimm-16)
-+ (set cbit (sem-op rA uimm-16))
-+ ()
-+ )
-+ )
-+)
-+
-+(define-pmacro (sf-insn op5-op sem-op)
-+ (begin
-+ (dni (.sym l- "sf" sem-op)
-+ (.str "l." mnemonic " reg/reg")
-+ (DELAY-SLOT)
-+ (.str "l.sf" (.str sem-op) " $rA,$rB")
-+ (+ OP1_3 OP2_9 op5-op rA rB (f-f-10-11 0))
-+ (set cbit (sem-op rA rB))
-+ ()
-+ )
-+ (dni (.sym l- "sf" (.sym sem-op "i"))
-+ (.str "l." mnemonic "i reg/imm")
-+ (DELAY-SLOT)
-+ (.str "l.sf" (.str sem-op) "i $rA,${simm-16}")
-+ (+ OP1_2 OP2_14 op5-op rA simm-16)
-+ (set cbit (sem-op rA simm-16))
-+ ()
-+ )
-+ )
-+)
-+
-+
-+(sf-insn-r OP1_3 OP2_9 OP5_2 OP5_6 gt)
-+(sf-insn-r OP1_3 OP2_9 OP5_3 OP5_7 ge)
-+(sf-insn-r OP1_3 OP2_9 OP5_4 OP5_8 lt)
-+(sf-insn-r OP1_3 OP2_9 OP5_5 OP5_9 le)
-+
-+(sf-insn-i OP1_2 OP2_14 OP5_2 OP5_6 gt)
-+(sf-insn-i OP1_2 OP2_14 OP5_3 OP5_7 ge)
-+(sf-insn-i OP1_2 OP2_14 OP5_4 OP5_8 lt)
-+(sf-insn-i OP1_2 OP2_14 OP5_5 OP5_9 le)
-+
-+(sf-insn OP5_0 eq)
-+(sf-insn OP5_1 ne)
-diff -Nur binutils-2.24.orig/cgen/cpu/openrisc.opc binutils-2.24/cgen/cpu/openrisc.opc
---- binutils-2.24.orig/cgen/cpu/openrisc.opc 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/openrisc.opc 2016-06-30 21:26:12.641892646 +0200
-@@ -0,0 +1,147 @@
-+/* OpenRISC opcode support. -*- C -*-
-+ Copyright (C) 2000, 2001, 2003, 2005 Free Software Foundation
-+ Based upon work by Red Hat, Inc.
-+ This file is part of CGEN. */
-+
-+/* This file is an addendum to or32.cpu. Heavy use of C code isn't
-+ appropriate in .cpu files, so it resides here. This especially applies
-+ to assembly/disassembly where parsing/printing can be quite involved.
-+ Such things aren't really part of the specification of the cpu, per se,
-+ so .cpu files provide the general framework and .opc files handle the
-+ nitty-gritty details as necessary.
-+
-+ Each section is delimited with start and end markers.
-+
-+ <arch>-opc.h additions use: "-- opc.h"
-+ <arch>-opc.c additions use: "-- opc.c"
-+ <arch>-asm.c additions use: "-- asm.c"
-+ <arch>-dis.c additions use: "-- dis.c"
-+ <arch>-ibd.h additions use: "-- ibd.h" */
-+
-+/* -- opc.h */
-+#undef CGEN_DIS_HASH_SIZE
-+#define CGEN_DIS_HASH_SIZE 64
-+#undef CGEN_DIS_HASH
-+#define CGEN_DIS_HASH(buffer, value) (((unsigned char *) (buffer))[0] >> 2)
-+
-+extern long openrisc_sign_extend_16bit (long);
-+/* -- */
-+
-+/* -- opc.c */
-+/* -- */
-+
-+/* -- asm.c */
-+
-+static const char * MISSING_CLOSING_PARENTHESIS = N_("missing `)'");
-+
-+#define CGEN_VERBOSE_ASSEMBLER_ERRORS
-+
-+long
-+openrisc_sign_extend_16bit (long value)
-+{
-+ return ((value & 0xffff) ^ 0x8000) - 0x8000;
-+}
-+
-+/* Handle hi(). */
-+
-+static const char *
-+parse_hi16 (CGEN_CPU_DESC cd, const char ** strp, int opindex, long * valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ unsigned long ret;
-+
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ if (strncasecmp (*strp, "hi(", 3) == 0)
-+ {
-+ bfd_vma value;
-+
-+ *strp += 3;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+
-+ ++*strp;
-+ if (errmsg == NULL
-+ && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value >>= 16;
-+ ret = value;
-+ }
-+ else
-+ {
-+ if (**strp == '-')
-+ {
-+ long value;
-+
-+ errmsg = cgen_parse_signed_integer (cd, strp, opindex, &value);
-+ ret = value;
-+ }
-+ else
-+ {
-+ unsigned long value;
-+
-+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, &value);
-+ ret = value;
-+ }
-+ }
-+
-+ *valuep = ((ret & 0xffff) ^ 0x8000) - 0x8000;
-+ return errmsg;
-+}
-+
-+/* Handle lo(). */
-+
-+static const char *
-+parse_lo16 (CGEN_CPU_DESC cd, const char ** strp, int opindex, long * valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ unsigned long ret;
-+
-+ if (**strp == '#')
-+ ++*strp;
-+
-+ if (strncasecmp (*strp, "lo(", 3) == 0)
-+ {
-+ bfd_vma value;
-+
-+ *strp += 3;
-+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+
-+ ++*strp;
-+ ret = value;
-+ }
-+ else
-+ {
-+ if (**strp == '-')
-+ {
-+ long value;
-+
-+ errmsg = cgen_parse_signed_integer (cd, strp, opindex, &value);
-+ ret = value;
-+ }
-+ else
-+ {
-+ unsigned long value;
-+
-+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, &value);
-+ ret = value;
-+ }
-+ }
-+
-+ *valuep = ((ret & 0xffff) ^ 0x8000) - 0x8000;
-+ return errmsg;
-+}
-+
-+/* -- */
-+
-+/* -- ibd.h */
-+extern long openrisc_sign_extend_16bit (long);
-+
-+/* -- */
-diff -Nur binutils-2.24.orig/cgen/cpu/play.cpu binutils-2.24/cgen/cpu/play.cpu
---- binutils-2.24.orig/cgen/cpu/play.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/play.cpu 2016-06-30 21:26:12.641892646 +0200
-@@ -0,0 +1,317 @@
-+; cpu description for debugging and experimental purposes. -*- Scheme -*-
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+; Copyright (C) 2000 Red Hat, Inc.
-+;
-+; This file is for experimental purposes. Don't expect it to be correct
-+; or up to date.
-+
-+(include "simplify.inc")
-+
-+(define-arch
-+ (name play) ; name of cpu
-+ (comment "experimental .cpu file")
-+ (insn-lsb0? #t)
-+ (machs playb)
-+ (isas play)
-+)
-+
-+(define-isa
-+ (name play)
-+ (base-insn-bitsize 16)
-+ (decode-assist (0 1 2 3))
-+)
-+
-+(define-cpu
-+ (name cpuf)
-+ (comment "experimental cpu family")
-+ (endian little)
-+ (word-bitsize 32)
-+)
-+
-+(define-mach
-+ (name playb)
-+ (comment "experimental mach")
-+ (cpu cpuf)
-+)
-+
-+(define-model
-+ (name test) (comment "test") (attrs)
-+ (mach playb)
-+ ;(pipeline all "" () ((fetch) (decode) (execute) (writeback)))
-+ (unit u-exec "Execution Unit" () 1 1
-+ () () () ())
-+)
-+
-+; Instruction fields.
-+; Copies of all the variations.
-+
-+; little endian, lsb0? = #f
-+;(dnf f-op1 "op1" () 0 4)
-+;(dnf f-op2 "op2" () 4 4)
-+;(dnf f-op3 "op3" () 8 4)
-+;(dnf f-op4 "op4" () 12 4)
-+;(dnf f-r1 "r1" () 8 4)
-+;(dnf f-r2 "r2" () 12 4)
-+;(df f-simm16 "simm16" () 16 16 INT #f #f)
-+;(df f-simm16b "16 bit signed immediate after simm32" () 48 16 INT #f #f)
-+;(df f-simm32 "simm32" () 16 32 INT #f #f)
-+;(df f-simm32b "32 bit signed immediate after simm16" () 32 32 INT #f #f)
-+
-+; little endian, lsb0? = #t
-+(dnf f-op1 "op1" () 15 4)
-+(dnf f-op2 "op2" () 11 4)
-+(dnf f-op3 "op3" () 7 4)
-+(dnf f-op4 "op4" () 3 4)
-+(dnf f-r1 "r1" () 7 4)
-+(dnf f-r2 "r2" () 3 4)
-+(df f-simm16 "simm16" () 31 16 INT #f #f)
-+(df f-simm16b "16 bit signed immediate after simm32" () 63 16 INT #f #f)
-+(df f-simm32 "simm32" () 47 32 INT #f #f)
-+(df f-simm32b "32 bit signed immediate after simm16" () 63 32 INT #f #f)
-+
-+; big endian, lsb0? = #f
-+;(dnf f-op1 "op1" () 0 4)
-+;(dnf f-op2 "op2" () 4 4)
-+;(dnf f-op3 "op3" () 8 4)
-+;(dnf f-op4 "op4" () 12 4)
-+;(dnf f-r1 "r1" () 8 4)
-+;(dnf f-r2 "r2" () 12 4)
-+;(df f-simm16 "simm16" () 16 16 INT #f #f)
-+;(df f-simm16b "16 bit signed immediate after simm32" () 48 16 INT #f #f)
-+;(df f-simm32 "simm32" () 16 32 INT #f #f)
-+;(df f-simm32b "32 bit signed immediate after simm16" () 32 32 INT #f #f)
-+
-+; big endian, lsb0? = #t
-+;(dnf f-op1 "op1" () 15 4)
-+;(dnf f-op2 "op2" () 11 4)
-+;(dnf f-op3 "op3" () 7 4)
-+;(dnf f-op4 "op4" () 3 4)
-+;(dnf f-r1 "r1" () 7 4)
-+;(dnf f-r2 "r2" () 3 4)
-+;(df f-simm16 "simm16" () 31 16 INT #f #f)
-+;(df f-simm16b "16 bit signed immediate after simm32" () 63 16 INT #f #f)
-+;(df f-simm32 "simm32" () 47 32 INT #f #f)
-+;(df f-simm32b "32 bit signed immediate after simm16" () 63 32 INT #f #f)
-+
-+(define-normal-insn-enum insn-op1 "insn format enums" () OP1_ f-op1
-+ (.map .str (.iota 16))
-+)
-+
-+(define-normal-insn-enum insn-op2 "insn format enums (2)" () OP2_ f-op2
-+ (.map .str (.iota 16))
-+)
-+
-+(define-normal-insn-enum insn-op3 "insn format enums (3)" () OP3_ f-op3
-+ (.map .str (.iota 16))
-+)
-+
-+(define-normal-insn-enum insn-op4 "insn format enums (4)" () OP4_ f-op4
-+ (.map .str (.iota 16))
-+)
-+
-+; Hardware.
-+
-+(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
-+
-+(define-hardware
-+ (name h-gr)
-+ (comment "general registers")
-+ (attrs PROFILE );CACHE-ADDR)
-+ (type register WI (16))
-+ (indices keyword ""
-+ ( (fp 13) (lr 14) (sp 15)
-+ (r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)
-+ (r8 8) (r9 9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14) (r15 15)
-+ ))
-+)
-+
-+(define-hardware
-+ (name h-status)
-+ (comment "status reg")
-+ (type register SI)
-+ (get () (const 0))
-+ (set (newval) (nop))
-+)
-+
-+; These bits are actualy part of the PS register
-+(dsh h-nbit "negative bit" () (register BI))
-+(dsh h-zbit "zero bit" () (register BI))
-+(dsh h-vbit "overflow bit" () (register BI))
-+(dsh h-cbit "carry bit" () (register BI))
-+
-+(dsh h-df "df test" () (register DF))
-+(dsh h-tf "tf test" () (register TF))
-+
-+; Operand attributes.
-+
-+(define-attr
-+ (for operand)
-+ (type boolean)
-+ (name HASH-PREFIX)
-+ (comment "immediates have a '#' prefix")
-+)
-+
-+; Operands.
-+
-+(dnop nbit "negative bit" (SEM-ONLY) h-nbit f-nil)
-+(dnop vbit "overflow bit" (SEM-ONLY) h-vbit f-nil)
-+(dnop zbit "zero bit" (SEM-ONLY) h-zbit f-nil)
-+(dnop cbit "carry bit" (SEM-ONLY) h-cbit f-nil)
-+
-+(dnop dr "destination register" () h-gr f-r1)
-+(dnop sr "source register" () h-gr f-r2)
-+(dnop simm16 "16 bit signed immediate" (HASH-PREFIX) h-sint f-simm16)
-+(dnop simm16b "16 bit signed immediate after simm32" (HASH-PREFIX) h-sint f-simm16b)
-+(dnop simm32 "32 bit signed immediate" (HASH-PREFIX) h-sint f-simm32)
-+(dnop simm32b "32 bit signed immediate after simm16" (HASH-PREFIX) h-sint f-simm32b)
-+
-+; Note that `df' doesn't work as that is a pmacro.
-+(dnop df-reg "df reg" () h-df f-nil)
-+(dnop tf-reg "tf reg" () h-tf f-nil)
-+
-+; Instructions.
-+
-+(dni add "add"
-+ ()
-+ "add $dr,$sr"
-+ (+ OP1_4 OP2_0 dr sr)
-+ (sequence ()
-+ (set vbit (add-oflag dr sr (const 0)))
-+ (set cbit (add-cflag dr sr (const 0)))
-+ (set dr (add dr sr))
-+ (set zbit (zflag dr))
-+ (set nbit (nflag dr)))
-+ ()
-+)
-+
-+(dni addv2 "add version 2"
-+ ()
-+ "add $dr,$sr"
-+ (+ OP1_4 OP2_1 dr sr)
-+ (sequence ((WI tmp1))
-+ (parallel ()
-+ (set tmp1 (add dr sr))
-+ (set vbit (add-oflag dr sr (const 0)))
-+ (set cbit (add-cflag dr sr (const 0))))
-+ (set zbit (zflag tmp1))
-+ (set nbit (nflag tmp1))
-+ (set dr tmp1)
-+ )
-+ ()
-+)
-+
-+(dni addi16 "addi16"
-+ ()
-+ "addi16 $dr,$sr,$simm16"
-+ (+ OP1_4 OP2_2 dr sr simm16)
-+ (set dr (add sr simm16))
-+ ()
-+)
-+
-+(dni addi32 "addi32"
-+ ()
-+ "addi32 $dr,$sr,$simm32"
-+ (+ OP1_4 OP2_3 dr sr simm32)
-+ (set dr (add sr simm32))
-+ ()
-+)
-+
-+(define-pmacro (reg+ oprnd n)
-+ (reg h-gr (add (index-of oprnd) (const n)))
-+)
-+
-+(dni ldm "ldm"
-+ ()
-+ "ldm $dr,$sr"
-+ (+ OP1_5 OP2_2 dr sr)
-+ (sequence ()
-+ (set dr sr)
-+ (set (reg+ dr 1) (reg+ sr 1))
-+ )
-+ ()
-+)
-+
-+(dni use-ifield "use-ifield"
-+ ()
-+ "foo $dr,$sr"
-+ (+ OP1_5 OP2_3 dr sr)
-+ (sequence ()
-+ (set dr (ifield f-r2))
-+ )
-+ ()
-+)
-+
-+(dni use-index-of "index-of"
-+ ()
-+ "index-of $dr,$sr"
-+ (+ OP1_5 OP2_4 dr sr)
-+ (set dr (reg h-gr (add (index-of sr) (const 1))))
-+ ()
-+)
-+
-+(dni load-df "use df"
-+ ()
-+ "load-df df,[$sr]"
-+ (+ OP1_6 OP2_0 OP3_0 sr)
-+ (set df-reg (mem DF sr))
-+ ()
-+)
-+
-+(dni make-df "use df"
-+ ()
-+ "make-df df,[$sr]"
-+ (+ OP1_6 OP2_1 OP3_0 sr)
-+ (set df-reg (join DF SI (mem SI sr) (mem SI (add sr (const 4)))))
-+ ()
-+)
-+
-+(dni split-df "use df"
-+ ()
-+ "split-df df,[$sr]"
-+ (+ OP1_6 OP2_2 OP3_0 sr)
-+ (sequence ((DF temp))
-+ (set temp df-reg)
-+ (set (concat (SI SI)
-+ sr
-+ (reg h-gr (add (regno sr) (const 1))))
-+ (split DF SI temp))
-+ )
-+ ()
-+)
-+
-+(dni load-tf "use tf"
-+ ()
-+ "load-tf tf,[$sr]"
-+ (+ OP1_6 OP2_3 OP3_0 sr)
-+ (set tf-reg (mem TF sr))
-+ ()
-+)
-+
-+(dni make-tf "use tf"
-+ ()
-+ "make-tf tf,[$sr]"
-+ (+ OP1_6 OP2_4 OP3_0 sr)
-+ (set tf-reg (join TF SI
-+ sr
-+ (reg h-gr (add (regno sr) (const 1)))
-+ (reg h-gr (add (regno sr) (const 2)))
-+ (reg h-gr (add (regno sr) (const 3)))))
-+ ()
-+)
-+
-+(dni split-tf "use tf"
-+ ()
-+ "split-tf tf,[$sr]"
-+ (+ OP1_6 OP2_5 OP3_0 sr)
-+ (sequence ((TF temp))
-+ (set temp tf-reg)
-+ (set (concat (SI SI SI SI)
-+ sr
-+ (reg h-gr (add (regno sr) (const 1)))
-+ (reg h-gr (add (regno sr) (const 2)))
-+ (reg h-gr (add (regno sr) (const 3))))
-+ (split TF SI temp))
-+ )
-+ ()
-+)
-diff -Nur binutils-2.24.orig/cgen/cpu/powerpc.cpu binutils-2.24/cgen/cpu/powerpc.cpu
---- binutils-2.24.orig/cgen/cpu/powerpc.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/powerpc.cpu 2016-06-30 21:26:12.641892646 +0200
-@@ -0,0 +1,1381 @@
-+; CPU description for PowerPC family. -*- Scheme -*-
-+; Copyright (C) 2002 Red Hat, Inc.
-+; Written by Johan Rydberg, jrydberg@rtmk.org
-+;
-+; This program is free software; you can redistribute it and/or modify
-+; it under the terms of the GNU General Public License as published by
-+; the Free Software Foundation; either version 2 of the License, or
-+; (at your option) any later version.
-+;
-+; This program is distributed in the hope that it will be useful,
-+; but WITHOUT ANY WARRANTY; without even the implied warranty of
-+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+; GNU General Public License for more details.
-+;
-+; You should have received a copy of the GNU General Public License
-+; along with this program; if not, write to the Free Software
-+; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
-+
-+; Notes:
-+
-+; Remaining todo is to implement floating point insns.
-+; Remaining todo is to implement string integer insns.
-+; Remaining todo is to add timing/unit information.
-+; Remaining todo is to add insn-level attrs for insns. (partly done)
-+; Remaining todo is to add arch-level attrs for insns. (partly done)
-+; Remaining todo is to verify insns.
-+; Remaining todo is to clean up this file.
-+
-+(include "simplify.inc")
-+
-+(define-arch
-+ (name powerpc)
-+ (comment "PowerPC family")
-+ (insn-lsb0? #f)
-+ (machs ppc603)
-+ (isas ppcisa)
-+)
-+
-+(define-isa
-+ (name ppcisa)
-+ (base-insn-bitsize 32)
-+ (decode-assist (0 1 2 3 4 5))
-+)
-+
-+(define-cpu
-+ (name ppcbf)
-+ (comment "PowerPC family")
-+ (endian big)
-+ (word-bitsize 32)
-+)
-+
-+(define-mach
-+ (name ppc603)
-+ (comment "PowerPC 603")
-+ (cpu ppcbf)
-+ (bfd-name "powerpc:603")
-+)
-+
-+; ??? Incomplete. Pipeline and unit info wrong.
-+
-+(define-model
-+ (name ppc603e)
-+ (comment "PowerPC 603e")
-+ (attrs)
-+ (mach ppc603)
-+ ;(pipeline all "" () ((fetch) (decode) (execute) (writeback)))
-+
-+ (unit u-exec "Execution Unit" () 1 1 () () () ())
-+ (unit u-iu "Integer unit" () 1 1 () () () ())
-+ (unit u-sru "System Register Unit" () 1 1 () () () ())
-+ (unit u-fpu "Floating Point Unit" () 1 1 () () () ())
-+ (unit u-lsu "Load/Store Unit" () 1 1 () () () ())
-+ (unit u-bpu "Branch Unit" () 1 1 () () () ())
-+)
-+
-+; Attributes.
-+
-+; An attribute to describe which architecture level an insn belongs to.
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name ARCH-LEVEL)
-+ (comment "insn arch selection")
-+ (values UISA OEA VEA)
-+)
-+
-+; An attribute to describe if a insn is supervisor-level only.
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name INSN-LEVEL)
-+ (comment "insn level selection")
-+ (values USER SUPERVISOR)
-+)
-+
-+
-+; Instruction fields.
-+
-+; Attributes:
-+; PCREL-ADDR: pc relative value (for reloc and disassembly purposes)
-+; ABS-ADDR: absolute address (for reloc and disassembly purposes?)
-+; RESERVED: bits are not used to decode insn, must be all 0
-+
-+; All of the fields for a I-FORM format instruction.
-+
-+(dnf f-opcd "primary opcode field" () 0 6)
-+(dnf f-aa "aa bit" () 30 1)
-+(dnf f-lk "lk bit" () 31 1)
-+
-+; ??? encode/decode RTL for absolute-address?
-+(df f-li "li" (ABS-ADDR) 6 24 INT #f #f)
-+
-+; Extra fields needed for a B-FORM format instruction.
-+
-+(dnf f-bo "bo" () 6 5)
-+(dnf f-bi "bi" () 11 5)
-+(df f-bd "bd" (ABS-ADDR) 16 14 INT #f #f)
-+
-+; Extra fields needed for a D-FORM format instruction.
-+
-+(df f-simm "16-bit signed imm" () 16 16 INT #f #f)
-+(dnf f-uimm "16-bit unsigned imm" () 16 16)
-+(df f-d "16-bit signed disp" () 16 16 INT #f #f)
-+(dnf f-l "l" () 10 1)
-+
-+(dnf f-rd "gpr destination" () 6 5)
-+(dnf f-ra "gpr source/destination" () 11 5)
-+(dnf f-rs "gpr source" () 6 5)
-+(dnf f-crfd "crfd" () 6 3)
-+(dnf f-to "to" () 6 5)
-+
-+; Extra fields needed for a X-FORM instruction.
-+
-+(dnf f-xo "extended opcode field" () 22 9)
-+(dnf f-rb "gpr source" () 16 5)
-+(dnf f-oe "oe bit" () 21 1)
-+(dnf f-rc "rc bit" () 31 1)
-+(dnf f-mb "mask begin" () 21 5)
-+(dnf f-me "mask end" () 26 5)
-+(dnf f-sh "shift value" () 16 5)
-+(dnf f-crfs "crfs" () 6 3)
-+(dnf f-sr "sr" () 12 4)
-+
-+; FIXME Srm IMM, NB
-+
-+; Extra fields needed for a XL-FORM instruction.
-+
-+(dnf f-crba "cond bit a" () 11 5)
-+(dnf f-crbb "cond bit b" () 16 5)
-+(dnf f-crbd "cond bit d" () 6 5)
-+
-+; FIXME XFX-FORM, A-FORM, XFL-FORM
-+
-+(dnf f-tbr "tbr" () 11 10)
-+
-+(dnf f-spr/l "spr (low)" () 11 5)
-+(dnf f-spr/h "spr (high)" () 16 5)
-+
-+(define-multi-ifield
-+ (name f-spr)
-+ (comment "spr")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-spr/l f-spr/h)
-+ (insert (sequence ()
-+ (set (ifield f-spr/l) (and (ifield f-spr) (const #x1f)))
-+ (set (ifield f-spr/h) (srl (ifield f-spr) (const 5)))))
-+ (extract (sequence ()
-+ (set (ifield f-spr) (or (sll (ifield f-spr/h) (const 5))
-+ (ifield f-spr/l)))))
-+)
-+
-+; Rest;
-+(dnf f-res/9-1 "reserved" (RESERVED) 9 1)
-+(dnf f-res/9-2 "reserved" (RESERVED) 9 2)
-+(dnf f-res/14-2 "reserved" (RESERVED) 14 2)
-+(dnf f-res/11-1 "reserved" (RESERVED) 11 1)
-+
-+
-+; Enums.
-+
-+; insn-opcode
-+(define-normal-insn-enum insn-opcd "primary opcode" () OPCD_ f-opcd
-+ (.map .str (.iota 64))
-+)
-+
-+(define-normal-insn-enum insn-xof "extended opcode" () XOF_ f-xo
-+ (.map .str (.iota 1024))
-+)
-+
-+
-+; Hardware pieces
-+
-+(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
-+
-+(define-hardware
-+ (name h-gpr)
-+ (comment "general purpose registers")
-+ (attrs PROFILE)
-+ (type register WI (32))
-+ (indices keyword ""
-+ ; Normal register names
-+ ((r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)
-+ (r8 8) (r9 9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14) (r15 15)
-+ (r16 16) (r17 17) (r18 18) (r19 19) (r20 20) (r21 21) (r22 22) (r23 23)
-+ (r24 24) (r25 25) (r26 26) (r27 27) (r28 28) (r29 29) (r30 30) (r31 31)
-+
-+ ; We also support simple integers
-+ ("0" 0) ("1" 1) ("2" 2) ("3" 3) ("4" 4) ("5" 5) ("6" 6) ("7" 7)
-+ ("8" 8) ("9" 9) ("10" 10) ("11" 11) ("12" 12) ("13" 13) ("14" 14) ("15" 15)
-+ ("16" 16) ("17" 17) ("18" 18) ("19" 19) ("20" 20) ("21" 21) ("22" 22) ("23" 23)
-+ ("24" 24) ("25" 25) ("26" 26) ("27" 27) ("28" 28) ("29" 29) ("30" 30) ("31" 31)))
-+)
-+
-+(define-hardware
-+ (name h-spr)
-+ (comment "special purpose registers")
-+ (attrs PROFILE)
-+ (type register WI (1024))
-+
-+ ; ??? we must check if we're in supervisor mode for registers above
-+ ; 10. should we do it here? escape into C code?
-+ (get (index)
-+ (cond WI
-+ ((eq index (const 8)) (raw-reg h-lr))
-+ ((eq index (const 9)) (raw-reg h-ctr))
-+ (else (raw-reg h-spr index))))
-+
-+ (set (index value)
-+ (case VOID index
-+ ((8) (set (raw-reg h-lr) value))
-+ ((9) (set (raw-reg h-ctr) value))
-+ (else (set (raw-reg h-spr index) value))))
-+)
-+
-+(define-hardware
-+ (name h-tbr)
-+ (comment "time base registers")
-+ (attrs PROFILE)
-+ (type register WI (2)) ; ???
-+
-+ (get (index)
-+ (cond WI
-+ ((eq index (const 268)) (raw-reg h-spr 284))
-+ ((eq index (const 269)) (raw-reg h-spr 285))
-+ (else (const 0)))) ; ??? undefined result
-+ ; ??? NYI setter
-+)
-+
-+(define-hardware
-+ (name h-sr)
-+ (comment "segment registers")
-+ (attrs PROFILE)
-+ (type register WI (16))
-+)
-+
-+; ??? floating point insns is not yet implemented.
-+(define-hardware
-+ (name h-fpr)
-+ (comment "floating point registers")
-+ (attrs PROFILE)
-+ (type register DF (32))
-+)
-+
-+(define-hardware
-+ (name h-cr)
-+ (comment "condition register")
-+ (attrs PROFILE)
-+ (type register WI)
-+)
-+
-+(define-hardware
-+ (name h-cr/s)
-+ (comment "condition register split into 8 parts (cr0 ... cr7)")
-+ (attrs PROFILE)
-+ (type register QI (8))
-+ (indices keyword ""
-+ ((cr0 0) (cr1 1) (cr2 2) (cr3 3) (cr4 4) (cr5 5) (cr6 6) (cr7 7)
-+ ("0" 0) ("1" 1) ("2" 2) ("3" 3) ("4" 4) ("5" 5) ("6" 6) ("7" 7)))
-+
-+ ; CR fields (0-7) is located on reversed order in CR register; CR0...CR7.
-+ (get (index)
-+ (and (srl (reg h-cr) (mul (sub (const 7) index) (const 4))) #xf))
-+ (set (index value)
-+ (set (reg h-cr)
-+ (or (and (reg h-cr)
-+ (inv (sll #xf (mul (sub (const 7) index) (const 4)))))
-+ (sll value (mul (sub (const 7) index) (const 4))))))
-+)
-+
-+(define-hardware
-+ (name h-rc)
-+ (comment "record bit")
-+ (type immediate (UINT 1))
-+ (values keyword "" (("" 0) ("." 1)))
-+)
-+
-+(define-hardware
-+ (name h-oe)
-+ (comment "overflow bit")
-+ (type immediate (UINT 1))
-+ (values keyword "" (("" 0) ("o" 1)))
-+)
-+
-+(define-hardware
-+ (name h-aa)
-+ (comment "absolute address bit")
-+ (type immediate (UINT 1))
-+ (values keyword "" (("" 0) ("a" 1)))
-+)
-+
-+(define-hardware
-+ (name h-lk)
-+ (comment "link bit")
-+ (type immediate (UINT 1))
-+ (values keyword "" (("" 0) ("l" 1)))
-+)
-+
-+; ??? These are actually a part of the XER register.
-+(dsh h-xer-so "xer/so bit" () (register BI))
-+(dsh h-xer-ov "xer/ov bit" () (register BI))
-+(dsh h-xer-ca "xer/ca bit" () (register BI))
-+
-+; ??? These are actually special purpose registers.
-+(dsh h-lr "lr reg" () (register WI))
-+(dsh h-ctr "ctr reg" () (register WI))
-+
-+(dsh h-msr "msr reg" () (register WI))
-+
-+
-+; Instruction Operands.
-+; These entries provide a layer between the assembler and the raw hardware
-+; description, and are used to refer to hardware elements in the semantic
-+; code. Usually there's a bit of over-specification, but in more complicated
-+; instruction sets there isn't.
-+
-+; Operand fields for a I-FORM format instruction.
-+
-+(dnop lk "lk bit" () h-lk f-lk)
-+(dnop aa "aa bit" () h-aa f-aa)
-+(dnop li "li" () h-iaddr f-li)
-+
-+; Operand fields for a B-FORM format instruction.
-+
-+(dnop bo "???" () h-uint f-bo)
-+(dnop bi "???" () h-uint f-bi)
-+(dnop bd "bd" () h-iaddr f-bd)
-+
-+; Operand fields for a D-FORM format instruction.
-+
-+(dnop ra "source register" () h-gpr f-ra)
-+(dnop rd "destination register" () h-gpr f-rd)
-+(dnop rs "destination register" () h-gpr f-rs)
-+
-+(dnop simm "16 bit signed imm" () h-sint f-simm)
-+(dnop uimm "16 bit unsigned imm" () h-uint f-uimm)
-+(dnop crfd "cond reg dst" () h-cr/s f-crfd)
-+(dnop d "16-bit signed disp" () h-sint f-d)
-+(dnop l "???" () h-uint f-l)
-+(dnop to "to" () h-uint f-to)
-+
-+; Operand fields for a X-FORM format instruction.
-+
-+(dnop rb "source register" () h-gpr f-rb)
-+(dnop rc "rc bit" () h-rc f-rc) ; XXX
-+(dnop oe "oe bit" () h-oe f-oe) ; XXX
-+(dnop mb "mask begin" () h-uint f-mb)
-+(dnop me "mask end" () h-uint f-me)
-+(dnop sh "shift value" () h-uint f-sh)
-+(dnop crfs "cond reg src" () h-cr/s f-crfs)
-+(dnop sr "segment reg" () h-sr f-sr)
-+
-+; Operand fields for a XL-FORM format instruction.
-+
-+(dnop crba "crba" () h-uint f-crba)
-+(dnop crbb "crbb" () h-uint f-crbb)
-+(dnop crbd "crbd" () h-uint f-crbd)
-+
-+; Other operand fields.
-+
-+(dnop spr "spr" () h-spr f-spr)
-+(dnop tbr "tbr" () h-tbr f-tbr)
-+
-+(dnop xer-so "xer/so bit" () h-xer-so f-nil)
-+(dnop xer-ov "xer/ov bit" () h-xer-ov f-nil)
-+(dnop xer-ca "xer/ca bit" () h-xer-ca f-nil)
-+
-+(dnop lr "lr" () h-lr f-nil)
-+(dnop ctr "ctr" () h-ctr f-nil)
-+
-+
-+; Misc macros.
-+
-+(define-pmacro (bit-set? reg bit) (and (srl reg bit) #x1))
-+(define-pmacro (bit-set reg bit) (set reg (or reg (sll (const 1) bit))))
-+(define-pmacro (bit-clr reg bit) (set reg (and reg (inv (sll (const 1) bit)))))
-+
-+(define-pmacro (emit-exception exc) (set pc (c-call IAI "@cpu@_trap" pc exc)))
-+
-+; We do not use a get/set pair for GPRs, since sometimes register 0
-+; is not treated as zero.
-+; ??? this can be implemented in CGEN RTL (using (cond ...) and (regno ...)).
-+(define-pmacro (reg0? r) (c-call WI "@cpu@_get_reg_or_zero" (regno r)))
-+
-+; Macro for setting overflow bits in xer register.
-+(define-pmacro (set-ov-bits value)
-+ (sequence ()
-+ (if VOID (eq alu-ov (const 1))
-+ (if VOID (eq xer-so (const 0))
-+ (set-quiet xer-so alu-ov)))
-+ (set-quiet xer-ov alu-ov))
-+)
-+
-+; Macro for setting carry bit in xer register.
-+(define-pmacro (set-ca-bits value) (set-quiet xer-ca value))
-+
-+; Macro for setting condition bits in cr0 register.
-+(define-pmacro (set-cond-bits result)
-+ (sequence ((QI value))
-+ (set-quiet value #x0)
-+ (if (lt (ext SI result) (const 0)) (set value (or value #x8)))
-+ (if (gt (ext SI result) (const 0)) (set value (or value #x4)))
-+ (if (eq (ext SI result) (const 0)) (set value (or value #x2)))
-+ ; ??? xer-so?
-+ (set (reg h-cr/s 0) value))
-+
-+)
-+
-+(define-pmacro (align-check ea align)
-+ (if (ne (const 0) (and ea (sub align 1)))
-+ (emit-exception #x1)))
-+
-+
-+; Instruction definitions.
-+
-+(define-pmacro (alu-op3 name opcd xof sem-op)
-+ (dni name (.str name) ()
-+ (.str name "$oe$rc $rd,$ra,$rb")
-+ (+ opcd xof rd ra rb oe rc)
-+ (sequence ((BI alu-ov) (BI alu-ca))
-+ (sem-op rd ra rb)
-+ (if oe (set-ov-bits alu-ov))
-+ (if rc (set-cond-bits rd)))
-+ ()
-+ )
-+)
-+
-+(define-pmacro (alu-op2 name opcd xof sem-op)
-+ (dni name (.str name) ()
-+ (.str name "$oe$rc $rd,$ra")
-+ (+ opcd xof rd ra (f-rb 0) oe rc)
-+ (sequence ((BI alu-ov) (BI alu-ca))
-+ (sem-op rd ra)
-+ (if oe (set-ov-bits alu-ov))
-+ (if rc (set-cond-bits rd)))
-+ ()
-+ )
-+)
-+
-+(define-pmacro (alu-opimm name opcd sem-op)
-+ (dni (.sym name) (.str name) ()
-+ (.str name " $rd,$ra,$simm")
-+ (+ opcd rd ra simm)
-+ (sequence ((BI alu-ov) (BI alu-ca))
-+ (sem-op rd ra simm))
-+ ()
-+ )
-+)
-+
-+(define-pmacro (mult/reg-op name opcd xof sem-op)
-+ (dni name (.str name) ()
-+ (.str name "$rc $rd,$ra,$rb")
-+ (+ opcd xof rd ra rb (f-oe 0) rc)
-+ (sequence ()
-+ (sem-op rd ra rb)
-+ (if rc (set-cond-bits rd)))
-+ ()
-+ )
-+)
-+
-+(define-pmacro (mult/imm-op name opcd sem-op)
-+ (dni name (.str name) ()
-+ (.str name " $rd,$ra,$simm")
-+ (+ opcd rd ra simm)
-+ (sequence ()
-+ (sem-op rd ra simm)
-+ (if rc (set-cond-bits rd)))
-+ ()
-+ )
-+)
-+
-+(define-pmacro (alu-add dst src1 src2 src3)
-+ (sequence ()
-+ (set alu-ov (add-oflag src1 src2 src3))
-+ (set alu-ca (add-cflag src1 src2 src3))
-+ (set dst (addc src1 src2 src3)))
-+)
-+
-+(define-pmacro (alu-sub dst src1 src2 src3)
-+ (sequence ()
-+ (set alu-ca (sub-cflag src1 src2 src3))
-+ (set dst (subc src1 src2 src3)))
-+
-+)
-+
-+(define-pmacro (mulhw-expr dst expr1 expr2)
-+ (sequence ((DI res))
-+ (set res (mul (ext DI expr1) (ext DI expr2)))
-+ (set dst (trunc SI (srl res (const 32)))))
-+)
-+
-+(define-pmacro (mulhwu-expr dst expr1 expr2)
-+ (sequence ((DI res))
-+ (set res (mul (zext DI expr1) (zext DI expr2)))
-+ (set dst (trunc SI (srl res (const 32)))))
-+)
-+
-+(define-pmacro (mull-expr dst expr1 expr2)
-+ (sequence ()
-+ (set dst (mul expr1 expr2)))
-+)
-+
-+(define-pmacro (add-expr dst src1 src2) (alu-add dst src1 src2 (const 0)))
-+(define-pmacro (addc-expr dst src1 src2)
-+ (sequence () (alu-add dst src1 src2 (const 0)) (set-ca-bits alu-ca)))
-+(define-pmacro (adde-expr dst src1 src2)
-+ (sequence () (alu-add dst src1 src2 xer-ca) (set-ca-bits alu-ca)))
-+(define-pmacro (addme-expr dst src1)
-+ (sequence () (alu-add dst src1 (const -1) xer-ca) (set-ca-bits alu-ca)))
-+(define-pmacro (addze-expr dst src1)
-+ (sequence () (alu-add dst src1 (const 0) xer-ca) (set-ca-bits alu-ca)))
-+
-+(define-pmacro (addis-expr dst src imm)
-+ (alu-add dst (reg0? src) (sll imm (const 16)) (const 0)))
-+(define-pmacro (addi-expr dst src imm) (alu-add dst (reg0? src) imm (const 0)))
-+(define-pmacro (addic-expr dst src imm)
-+ (sequence () (alu-add dst src imm (const 0)) (set-ca-bits alu-ca)))
-+(define-pmacro (addicp-expr dst src imm)
-+ (sequence () (alu-add dst src imm (const 0))
-+ (set-ca-bits alu-ca) (set-cond-bits dst)))
-+
-+(define-pmacro (subf-expr dst src1 src2) (alu-add dst (inv src1) src2 (const 1)))
-+(define-pmacro (subfe-expr dst src1 src2)
-+ (sequence () (alu-add dst (inv src1) src2 xer-ca) (set-ca-bits alu-ca)))
-+(define-pmacro (subfc-expr dst src1 src2)
-+ (sequence () (alu-add dst (inv src1) src2 (const 1)) (set-ca-bits alu-ca)))
-+(define-pmacro (subfic-expr dst src imm)
-+ (sequence () (alu-add dst (inv src) (add imm (const 1)) (const 0)) (set-ca-bits alu-ca)))
-+(define-pmacro (subfme-expr dst src1)
-+ (sequence () (alu-add dst (inv src1) (const -1) xer-ca) (set-ca-bits alu-ca)))
-+(define-pmacro (subfze-expr dst src1)
-+ (sequence () (alu-add dst (inv src1) (const 0) xer-ca) (set-ca-bits alu-ca)))
-+
-+(define-pmacro (neg-expr dst src1) (alu-add dst (inv src1) (const 1) (const 0)))
-+
-+; ??? These two does not handle overflow as they should!
-+(define-pmacro (divw-expr dst src1 src2) (set dst (div src1 src2)))
-+(define-pmacro (divwu-expr dst src1 src2) (set dst (udiv src1 src2)))
-+
-+(alu-op3 add OPCD_31 XOF_266 add-expr)
-+(alu-op3 addc OPCD_31 XOF_10 addc-expr)
-+(alu-op3 adde OPCD_31 XOF_138 adde-expr)
-+
-+(alu-op2 addme OPCD_31 XOF_234 addme-expr)
-+(alu-op2 addze OPCD_31 XOF_202 addze-expr)
-+
-+(alu-opimm addic OPCD_12 addic-expr)
-+(alu-opimm addic. OPCD_13 addicp-expr)
-+(alu-opimm addi OPCD_14 addi-expr)
-+(alu-opimm addis OPCD_15 addis-expr)
-+
-+(alu-op2 neg OPCD_31 XOF_104 neg-expr)
-+
-+(alu-op3 subf OPCD_31 XOF_40 subf-expr)
-+(alu-op3 subfc OPCD_31 XOF_8 subfc-expr)
-+(alu-op3 subfe OPCD_31 XOF_136 subfe-expr)
-+(alu-op2 subfme OPCD_31 XOF_232 subfme-expr)
-+(alu-op2 subfze OPCD_31 XOF_200 subfze-expr)
-+
-+(alu-op3 divw OPCD_31 XOF_491 divw-expr)
-+(alu-op3 divwu OPCD_31 XOF_459 divwu-expr)
-+
-+(alu-opimm subfic OPCD_8 subfic-expr)
-+
-+(mult/reg-op mulhw OPCD_31 XOF_75 mulhw-expr)
-+(mult/reg-op mulhwu OPCD_31 XOF_11 mulhwu-expr)
-+(mult/imm-op mulli OPCD_7 mull-expr)
-+(alu-op3 mullw OPCD_31 XOF_235 mull-expr)
-+
-+; Simplified mnmemonics for addi:
-+(dnmi li "li" () "li $rd,$simm"
-+ (emit addi rd (ra 0) simm)) ; addi %rd,0,%simm
-+
-+(dnmi la "la" () "la $rd,$simm($ra)"
-+ (emit addi rd ra simm))
-+
-+(dnmi subi "subi" () "subi $rd,$ra,$simm"
-+ (emit addi rd ra simm))
-+
-+
-+; Compare insns
-+
-+(define-pmacro (cmp-norm name xof1 xof2 sem-op1 sem-op2)
-+ (begin
-+ (dni (.sym name) (.str name) ()
-+ (.str name " $crfd,$l,$ra,$rb")
-+ (+ OPCD_31 xof1 crfd (f-res/9-1 0) l ra rb (f-oe 0) (f-rc 0))
-+ (set crfd (sem-op1 ra rb)) ; FIXME xer-so
-+ ()
-+ )
-+
-+ (dni (.sym name l) (.str name l) ()
-+ (.str name "l $crfd,$l,$ra,$rb")
-+ (+ OPCD_31 xof2 crfd (f-res/9-1 0) l ra rb (f-oe 0) (f-rc 0))
-+ (set crfd (sem-op2 ra rb)) ; FIXME xer-so
-+ ()
-+ )
-+ )
-+)
-+
-+(define-pmacro (cmp-imm name1 name2 opcd1 opcd2 sem-op1 sem-op2)
-+ (begin
-+ (dni (.sym name1 x) (.str name1 x) ()
-+ (.str name1 " $crfd,$l,$ra,$simm")
-+ (+ opcd1 crfd (f-res/9-1 0) l ra simm)
-+ (set crfd (sem-op1 ra simm)) ; FIXME xer-so
-+ ()
-+ )
-+
-+ (dni (.sym name2 x) (.str name2 x) ()
-+ (.str name2 " $crfd,$l,$ra,$uimm")
-+ (+ opcd2 crfd (f-res/9-1 0) l ra uimm)
-+ (set crfd (sem-op2 ra uimm)) ; FIXME xer-so
-+ ()
-+ )
-+ )
-+)
-+
-+(define-pmacro (cmp-expr/s a b)
-+ (cond QI
-+ ((lt SI a b) (const #x8))
-+ ((gt SI a b) (const #x4))
-+ (else (const #x2))))
-+
-+(define-pmacro (cmp-expr/u a b)
-+ (cond QI
-+ ((ltu USI a b) (const #x8))
-+ ((gtu USI a b) (const #x4))
-+ (else (const #x2))))
-+
-+(cmp-imm cmpi cmpli OPCD_11 OPCD_10 cmp-expr/s cmp-expr/u)
-+(cmp-norm cmp XOF_0 XOF_32 cmp-expr/s cmp-expr/u)
-+
-+
-+; Logical insns
-+
-+(define-pmacro (logic-op3 name opcd xof sem-op)
-+ (dni name (.str name x) ()
-+ (.str name "$rc $ra,$rs,$rb")
-+ (+ opcd xof rs ra rb (f-oe 0) rc)
-+ (sequence ((BI alu-ov) (BI alu-ca))
-+ (sem-op ra rs rb)
-+ (if rc (set-cond-bits ra)))
-+ ()
-+ )
-+)
-+
-+(define-pmacro (ext-op2 name opcd xof sem-op)
-+ (dni name (.str name) ()
-+ (.str name "$rc $ra,$rs")
-+ (+ opcd xof rs ra (f-rb 0) (f-oe 0) rc)
-+ (sequence ((BI alu-ov) (BI alu-ca))
-+ (sem-op ra rs)
-+ (if rc (set-cond-bits ra)))
-+ ()
-+ )
-+)
-+
-+(define-pmacro (logic-opimm name opcd sem-op)
-+ (dni (.sym name) (.str name) ()
-+ (.str name " $ra,$rs,$uimm")
-+ (+ opcd rs ra uimm)
-+ (sequence ((BI alu-ov) (BI alu-ca))
-+ (sem-op ra rs uimm))
-+ ()
-+ )
-+)
-+
-+
-+(define-pmacro (and-expr dst src1 src2) (set dst (and src1 src2)))
-+(define-pmacro (andc-expr dst src1 src2) (set dst (and src1 (inv src2))))
-+(define-pmacro (andi-expr dst src1 src2)
-+ (sequence () (set dst (and src1 src2)) (set-cond-bits dst)))
-+(define-pmacro (andis-expr dst src1 src2)
-+ (sequence () (set dst (and src1 (sll src2 (const 16)))) (set-cond-bits dst)))
-+
-+(define-pmacro (or-expr dst src1 src2) (set dst (or src1 src2)))
-+(define-pmacro (orc-expr dst src1 src2) (set dst (or src1 (inv src2))))
-+(define-pmacro (ori-expr dst src1 src2) (set dst (or src1 src2)))
-+(define-pmacro (oris-expr dst src1 src2) (set dst (or src1 (sll src2 (const 16)))))
-+
-+(define-pmacro (nor-expr dst src1 src2) (set dst (inv (or src1 src2))))
-+(define-pmacro (nand-expr dst src1 src2) (set dst (inv (and src1 src2))))
-+(define-pmacro (eqv-expr dst src1 src2) (set dst (inv (xor src1 src2))))
-+
-+(define-pmacro (xor-expr dst src1 src2) (set dst (xor src1 src2)))
-+(define-pmacro (xori-expr dst src1 src2) (set dst (xor src1 src2)))
-+(define-pmacro (xoris-expr dst src1 src2) (set dst (xor src1 (sll src2 (const 16)))))
-+
-+(define-pmacro (extsb-expr dst src) (set dst (ext SI (trunc QI src))))
-+(define-pmacro (extsh-expr dst src) (set dst (ext SI (trunc HI src))))
-+
-+(logic-op3 and OPCD_31 XOF_28 and-expr)
-+(logic-op3 andc OPCD_31 XOF_60 andc-expr)
-+(logic-opimm andi. OPCD_28 andi-expr)
-+(logic-opimm andis. OPCD_29 andis-expr)
-+
-+(logic-op3 or OPCD_31 XOF_444 or-expr)
-+(logic-op3 orc OPCD_31 XOF_412 orc-expr)
-+(logic-op3 nor OPCD_31 XOF_124 nor-expr)
-+(logic-op3 nand OPCD_31 XOF_476 nand-expr)
-+(logic-op3 eqv OPCD_31 XOF_284 eqv-expr)
-+
-+(logic-op3 xor OPCD_31 XOF_316 xor-expr)
-+(logic-opimm xori OPCD_26 xori-expr)
-+(logic-opimm xoris OPCD_27 xoris-expr)
-+
-+(logic-opimm ori OPCD_24 ori-expr)
-+(logic-opimm oris OPCD_25 oris-expr)
-+
-+(ext-op2 extsb OPCD_31 XOF_954 extsb-expr)
-+(ext-op2 extsh OPCD_31 XOF_922 extsh-expr)
-+
-+; FIXME cntlzwx???
-+
-+
-+; Integer Rotate and Shift Instructions
-+
-+; The rotate and shift insns employ a mask generator. The mask is 32 bits
-+; long and consists of 1 bits from a start bit, MB, through and including
-+; a stop bit, ME, and 0 bits elsewhere. If MB > ME, the 1 bits wrap around
-+; from position 31 to 0.
-+
-+; ??? does this work?
-+(define-pmacro (gen-bit-mask mb me)
-+ (xor (sub (sll (const 1) mb) (const 1)) (sub (sll (const 2) me) (const 1))))
-+
-+;(define-pmacro (mask-gen mb me)
-+; (cond WI
-+; ; mb <= me
-+; ((le mb me) (gen-bit-mask mb me))
-+; ; else
-+; (else (or (gen-bit-mask mb 31) (gen-bit-mask 0 me)))))
-+
-+(define-pmacro (mask-gen mb me)
-+ (c-raw-call WI "MASK" (add mb (const 32)) (add me (const 32))))
-+
-+(define-pmacro (rotate/imm-op5 name opcd sem-op)
-+ (dni name (.str name) ()
-+ (.str name "$rc $ra,$rs,$sh,$mb,$me")
-+ (+ opcd rs ra sh mb me rc)
-+ (sequence ((BI alu-ov) (BI alu-ca))
-+ (sem-op ra rs sh mb me)
-+ (if rc (set-cond-bits ra)))
-+ ()
-+ )
-+)
-+
-+(define-pmacro (rotate/reg-op5 name opcd sem-op)
-+ (dni name (.str name) ()
-+ (.str name "$rc $ra,$rs,$rb,$mb,$me")
-+ (+ opcd rs ra rb mb me rc)
-+ (sequence ((BI alu-ov) (BI alu-ca))
-+ (sem-op ra rs (and rb #x1f) mb me)
-+ (if rc (set-cond-bits ra)))
-+ ()
-+ )
-+)
-+
-+(define-pmacro (shift/imm-op3 name opcd xof sem-op)
-+ (dni name (.str name) ()
-+ (.str name "$rc $ra,$rs,$sh")
-+ (+ opcd xof rs ra sh (f-oe 0) rc)
-+ (sequence ((BI alu-ov) (BI alu-ca))
-+ (set ra (sem-op rs sh))
-+ (if rc (set-cond-bits ra)))
-+ ()
-+ )
-+)
-+
-+(define-pmacro (shift/reg-op3 name opcd xof sem-op)
-+ (dni name (.str name) ()
-+ (.str name "$rc $ra,$rs,$rb")
-+ (+ opcd xof rs ra rb (f-oe 0) rc)
-+ (sequence ((BI alu-ov) (BI alu-ca))
-+ (set ra (sem-op rs (and rb #x3f)))
-+ (if rc (set-cond-bits ra)))
-+ ()
-+ )
-+)
-+
-+(define-pmacro (rlwimi-expr dst src sh mb me)
-+ (sequence ((WI m) (WI r))
-+ (set r (rol src sh))
-+ (set m (mask-gen mb me))
-+ (set dst (or (and r m) (and src (inv m))))))
-+
-+
-+(define-pmacro (rlwinm-expr dst src sh mb me)
-+ (sequence ((WI m) (WI r))
-+ (set r (rol src sh))
-+ (set m (mask-gen mb me))
-+ (set dst (and r m))))
-+
-+(rotate/imm-op5 rlwimi OPCD_20 rlwimi-expr)
-+(rotate/imm-op5 rlwinm OPCD_21 rlwinm-expr)
-+(rotate/reg-op5 rlwnm OPCD_23 rlwinm-expr)
-+
-+(shift/reg-op3 slw OPCD_31 XOF_24 sll)
-+(shift/reg-op3 sraw OPCD_31 XOF_792 sra)
-+(shift/imm-op3 srawi OPCD_31 XOF_824 sra)
-+(shift/imm-op3 srw OPCD_31 XOF_536 srl)
-+
-+
-+; Load insns.
-+
-+(define-pmacro (load/imm-op name opcd1 opcd2 mode sem)
-+ (begin
-+ (dni (.sym name) (.str name) ()
-+ (.str name " $rd,$d($ra)")
-+ (+ opcd1 rd ra d)
-+ (sequence ()
-+ (set rd (sem SI (mem mode (add (reg0? ra) d)))))
-+ ()
-+ )
-+ (dni (.sym name u) (.str name u) ()
-+ (.str name "u $rd,$d($ra)")
-+ (+ opcd2 rd ra d)
-+ (sequence ()
-+ (set rd (sem SI (mem mode (add ra d))))
-+ (set ra (add ra d)))
-+ ()
-+ )
-+ )
-+)
-+
-+(define-pmacro (load/reg-op name xof1 xof2 mode sem)
-+ (begin
-+ (dni (.sym name ux) (.str name u) ()
-+ (.str name "ux $rd,$ra,$rb")
-+ (+ OPCD_31 xof1 rd ra rb (f-oe 0) (f-rc 0))
-+ (sequence ()
-+ (set rd (sem SI (mem mode (add ra rb))))
-+ (set ra (add ra rb)))
-+ ()
-+ )
-+
-+ (dni (.sym name x) (.str name x) ()
-+ (.str name "x $rd,$ra,$rb")
-+ (+ OPCD_31 xof2 rd ra rb (f-oe 0) (f-rc 0))
-+ (sequence ()
-+ (set rd (sem SI (mem mode (add (reg0? ra) rb)))))
-+ ()
-+ )
-+ )
-+)
-+
-+(load/imm-op lbz OPCD_34 OPCD_35 QI zext)
-+(load/reg-op lbz XOF_119 XOF_87 QI zext)
-+
-+(load/imm-op lha OPCD_42 OPCD_43 HI ext)
-+(load/reg-op lha XOF_375 XOF_343 HI ext)
-+(load/imm-op lhz OPCD_40 OPCD_41 HI zext)
-+(load/reg-op lhz XOF_311 XOF_279 HI zext)
-+
-+(load/imm-op lwz OPCD_32 OPCD_33 SI zext)
-+(load/reg-op lwz XOF_55 XOF_23 SI zext)
-+
-+; ??? a pmacro for these?
-+
-+(define-pmacro (nop-mem-expr dst-expr ea-expr mode)
-+ (set dst-expr (mem mode ea-expr)))
-+
-+(define-pmacro (load/reverse name xof mode sem-op)
-+ (dni name (.str name) ()
-+ (.str name " $rd,$ra,$rb")
-+ (+ OPCD_31 xof rd ra rb (f-oe 0) (f-rc 0))
-+ (sem-op rd (add ra rb) mode)
-+ ()
-+ )
-+)
-+
-+(load/reverse lhbrx XOF_790 HI nop-mem-expr)
-+(load/reverse lwbrx XOF_534 WI nop-mem-expr)
-+(load/reverse lwarx XOF_20 WI nop-mem-expr)
-+
-+
-+(define-pmacro (lmw-sem-op ea n)
-+ (sequence ()
-+ (set (reg h-gpr n) (mem WI ea))
-+ (set ea (add ea (const 4)))
-+ (set n (add n (const 1))))
-+)
-+
-+(dni lmw "lmw" ()
-+ "lmw $rd,$d($ra)"
-+ (+ OPCD_46 rd ra d)
-+ (sequence ((AI ea) (SI n))
-+ (set ea (add ra d))
-+ (set n (regno rd))
-+
-+ (align-check ea #x4) ; EA must be aligned.
-+
-+ (if (ge n (const 0)) (lmw-sem-op ea n)) ; needed?
-+ (if (ge n (const 1)) (lmw-sem-op ea n))
-+ (if (ge n (const 2)) (lmw-sem-op ea n))
-+ (if (ge n (const 3)) (lmw-sem-op ea n))
-+ (if (ge n (const 4)) (lmw-sem-op ea n))
-+ (if (ge n (const 5)) (lmw-sem-op ea n))
-+ (if (ge n (const 6)) (lmw-sem-op ea n))
-+ (if (ge n (const 7)) (lmw-sem-op ea n))
-+ (if (ge n (const 8)) (lmw-sem-op ea n))
-+ (if (ge n (const 9)) (lmw-sem-op ea n))
-+ (if (ge n (const 10)) (lmw-sem-op ea n))
-+ (if (ge n (const 11)) (lmw-sem-op ea n))
-+ (if (ge n (const 12)) (lmw-sem-op ea n))
-+ (if (ge n (const 13)) (lmw-sem-op ea n))
-+ (if (ge n (const 14)) (lmw-sem-op ea n))
-+ (if (ge n (const 15)) (lmw-sem-op ea n))
-+ (if (ge n (const 16)) (lmw-sem-op ea n))
-+ (if (ge n (const 17)) (lmw-sem-op ea n))
-+ (if (ge n (const 18)) (lmw-sem-op ea n))
-+ (if (ge n (const 19)) (lmw-sem-op ea n))
-+ (if (ge n (const 20)) (lmw-sem-op ea n))
-+ (if (ge n (const 21)) (lmw-sem-op ea n))
-+ (if (ge n (const 22)) (lmw-sem-op ea n))
-+ (if (ge n (const 23)) (lmw-sem-op ea n))
-+ (if (ge n (const 24)) (lmw-sem-op ea n))
-+ (if (ge n (const 25)) (lmw-sem-op ea n))
-+ (if (ge n (const 26)) (lmw-sem-op ea n))
-+ (if (ge n (const 27)) (lmw-sem-op ea n))
-+ (if (ge n (const 28)) (lmw-sem-op ea n))
-+ (if (ge n (const 29)) (lmw-sem-op ea n))
-+ (if (ge n (const 30)) (lmw-sem-op ea n))
-+ (if (ge n (const 31)) (lmw-sem-op ea n)))
-+ ()
-+)
-+
-+; FIXME lswi
-+; FIXME lswx
-+
-+
-+; Store insns.
-+
-+(define-pmacro (store/imm-op name opcd1 opcd2 mode)
-+ (begin
-+ (dni (.sym name) (.str name) ()
-+ (.str name " $rs,$d($ra)")
-+ (+ opcd1 rs ra d)
-+ (sequence ()
-+ (set (mem mode (add (reg0? ra) d)) rs))
-+ ()
-+ )
-+ (dni (.sym name u) (.str name u) ()
-+ (.str name "u $rs,$d($ra)")
-+ (+ opcd2 rs ra d)
-+ (sequence ()
-+ (set (mem mode (add ra d)) rs)
-+ (set ra (add ra d)))
-+ ()
-+ )
-+ )
-+)
-+
-+(define-pmacro (store/reg-op name xof1 xof2 mode)
-+ (begin
-+ (dni (.sym name ux) (.str name u) ()
-+ (.str name "ux $rs,$ra,$rb")
-+ (+ OPCD_31 xof1 rs ra rb (f-oe 0) (f-rc 0))
-+ (sequence ()
-+ (set (mem mode (add ra rb)) rs)
-+ (set ra (add ra rb)))
-+ ()
-+ )
-+ (dni (.sym name x) (.str name x) ()
-+ (.str name "x $rd,$ra,$rb")
-+ (+ OPCD_31 xof2 rs ra rb (f-oe 0) (f-rc 0))
-+ (sequence ()
-+ (set (mem mode (add (reg0? ra) rb)) rs))
-+ ()
-+ )
-+ )
-+)
-+
-+(store/imm-op stb OPCD_38 OPCD_39 QI)
-+(store/reg-op stb XOF_247 XOF_215 QI)
-+
-+(store/imm-op sth OPCD_44 OPCD_45 HI)
-+(store/reg-op sth XOF_439 XOF_407 HI)
-+
-+; FIXME sthbrx
-+; FIXME stswi
-+; FIXME stswx
-+; FIXME stwbrx
-+; FIXME stwcx.
-+
-+(store/imm-op stw OPCD_36 OPCD_37 WI)
-+(store/reg-op stw XOF_183 XOF_151 WI)
-+
-+(define-pmacro (stmw-sem-op ea n)
-+ (sequence ()
-+ (set (mem WI ea) (reg h-gpr n))
-+ (set ea (add ea (const 4)))
-+ (set n (add n (const 1))))
-+)
-+
-+(dni stmw "stmw" ()
-+ "stmw $rs,$d($ra)"
-+ (+ OPCD_47 rs ra d)
-+ (sequence ((AI ea) (SI n))
-+ (set ea (add ra d))
-+ (set n (regno rs))
-+
-+ (align-check ea #x4) ; EA must be aligned.
-+
-+ (if (ge n (const 0)) (stmw-sem-op ea n)) ; needed?
-+ (if (ge n (const 1)) (stmw-sem-op ea n))
-+ (if (ge n (const 2)) (stmw-sem-op ea n))
-+ (if (ge n (const 3)) (stmw-sem-op ea n))
-+ (if (ge n (const 4)) (stmw-sem-op ea n))
-+ (if (ge n (const 5)) (stmw-sem-op ea n))
-+ (if (ge n (const 6)) (stmw-sem-op ea n))
-+ (if (ge n (const 7)) (stmw-sem-op ea n))
-+ (if (ge n (const 8)) (stmw-sem-op ea n))
-+ (if (ge n (const 9)) (stmw-sem-op ea n))
-+ (if (ge n (const 10)) (stmw-sem-op ea n))
-+ (if (ge n (const 11)) (stmw-sem-op ea n))
-+ (if (ge n (const 12)) (stmw-sem-op ea n))
-+ (if (ge n (const 13)) (stmw-sem-op ea n))
-+ (if (ge n (const 14)) (stmw-sem-op ea n))
-+ (if (ge n (const 15)) (stmw-sem-op ea n))
-+ (if (ge n (const 16)) (stmw-sem-op ea n))
-+ (if (ge n (const 17)) (stmw-sem-op ea n))
-+ (if (ge n (const 18)) (stmw-sem-op ea n))
-+ (if (ge n (const 19)) (stmw-sem-op ea n))
-+ (if (ge n (const 20)) (stmw-sem-op ea n))
-+ (if (ge n (const 21)) (stmw-sem-op ea n))
-+ (if (ge n (const 22)) (stmw-sem-op ea n))
-+ (if (ge n (const 23)) (stmw-sem-op ea n))
-+ (if (ge n (const 24)) (stmw-sem-op ea n))
-+ (if (ge n (const 25)) (stmw-sem-op ea n))
-+ (if (ge n (const 26)) (stmw-sem-op ea n))
-+ (if (ge n (const 27)) (stmw-sem-op ea n))
-+ (if (ge n (const 28)) (stmw-sem-op ea n))
-+ (if (ge n (const 29)) (stmw-sem-op ea n))
-+ (if (ge n (const 30)) (stmw-sem-op ea n))
-+ (if (ge n (const 31)) (stmw-sem-op ea n)))
-+ ()
-+)
-+
-+
-+
-+; Trap insns.
-+
-+(define-pmacro (trap/reg-op name opcd xof sem-op)
-+ (dni name (.str name) ()
-+ (.str name " $to,$ra,$rb")
-+ (+ opcd xof to ra rb (f-oe 0) (f-rc 0))
-+ (sem-op to ra rb)
-+ ()
-+ )
-+)
-+
-+(define-pmacro (trap/imm-op name opcd sem-op)
-+ (dni name (.str name) ()
-+ (.str name " $to,$ra,$simm")
-+ (+ opcd to ra simm)
-+ (sem-op to ra simm)
-+ ()
-+ )
-+)
-+
-+(define-pmacro (tw-expr to expr1 expr2)
-+ (sequence ()
-+ (if (lt expr1 expr2) (if (bit-set? to 0) (emit-exception #x7)))
-+ (if (gt expr1 expr2) (if (bit-set? to 1) (emit-exception #x7)))
-+ (if (eq expr1 expr2) (if (bit-set? to 2) (emit-exception #x7)))
-+ (if (ltu expr1 expr2) (if (bit-set? to 3) (emit-exception #x7)))
-+ (if (gtu expr1 expr2) (if (bit-set? to 4) (emit-exception #x7))))
-+)
-+
-+(trap/reg-op tw OPCD_31 XOF_4 tw-expr)
-+(trap/imm-op twi OPCD_3 tw-expr)
-+
-+(dni sc "sc" ((ARCH-LEVEL OEA))
-+ "sc"
-+ (+ OPCD_17 XOF_1 (f-rd 0) (f-ra 0) (f-rb 0) (f-oe 0) (f-rc 0))
-+ (emit-exception #xc)
-+ ()
-+)
-+
-+(dni rfi "rfi" ((ARCH-LEVEL OEA) (INSN-LEVEL SUPERVISOR))
-+ "rfi"
-+ (+ OPCD_19 XOF_50 (f-rd 0) (f-ra 0) (f-rb 0) (f-oe 0) (f-rc 0))
-+ (set pc (c-call IAI "@cpu@_rfi"))
-+ ()
-+)
-+
-+
-+; Branch insns.
-+
-+(define-pmacro (branch-via-reg reg)
-+ (sequence ((IAI nia))
-+ (set nia reg)
-+ (if lk (set lr (add pc 4)))
-+ (set pc nia))
-+)
-+
-+(define-pmacro (branch-via-addr taddr)
-+ (sequence ()
-+ (if lk (set lr (add pc 4)))
-+ (set pc
-+ (cond IAI
-+ ((eq (ifield f-aa) (const 1)) (sll taddr (const 2)))
-+ (else (add pc (sll taddr (const 2)))))))
-+)
-+
-+(dni b "b" ()
-+ "b${lk}${aa} $li"
-+ (+ OPCD_18 li aa lk)
-+ (branch-via-addr li)
-+ ()
-+)
-+
-+; FIXME These are not implemented yet!
-+
-+(define-pmacro (bc-expr bo bi bd)
-+ (sequence ((INT cond_ok) (INT ctr_ok))
-+ (if (not (bit-set? bo 2)) (set ctr (sub ctr (const 1))))
-+ (set ctr_ok (c-call INT "@cpu@_cti_resolv_ctr" bo bi))
-+ (set cond_ok (c-call INT "@cpu@_cti_resolv_cond" bo bi))
-+ (if (andif ctr_ok cond_ok)
-+ (branch-via-addr bd)))
-+)
-+
-+(define-pmacro (bctr-expr bo bi)
-+ (sequence ((INT cond_ok))
-+ (set cond_ok (c-call INT "@cpu@_cti_resolv_cond" bo bi))
-+ (if cond_ok
-+ (branch-via-reg ctr)))
-+)
-+
-+(define-pmacro (blr-expr bo bi)
-+ (sequence ((INT cond_ok) (INT ctr_ok))
-+ (if (not (bit-set? bo 2)) (set ctr (sub ctr (const 1))))
-+ (set ctr_ok (c-call INT "@cpu@_cti_resolv_ctr" bo bi))
-+ (set cond_ok (c-call INT "@cpu@_cti_resolv_cond" bo bi))
-+ (if (andif ctr_ok cond_ok)
-+ (branch-via-reg lr)))
-+)
-+
-+;(define-pmacro (bctr-expr bo bi) (sequence () (branch-via-reg ctr)))
-+;(define-pmacro (blr-expr bo bi) (sequence () (branch-via-reg lr)))
-+;(define-pmacro (bc-expr bo bi bd) (sequence () (branch-via-addr bd)))
-+
-+(define-pmacro (cond/reg-branch name xof sem-op)
-+ (dni (.sym name) (.str name) ()
-+ (.str name "${lk} $bo,$bi")
-+ (+ OPCD_19 xof bo bi (f-rb 0) (f-oe 0) lk) ; FIXME oe???
-+ (sequence ()
-+ (sem-op bo bi))
-+ ()
-+ )
-+)
-+
-+(define-pmacro (cond/disp-branch name opcd sem-op)
-+ (dni (.sym name) (.str name) ()
-+ (.str name "${lk}${aa} $bo,$bi,$bd")
-+ (+ opcd bo bi bd lk aa)
-+ (sequence ()
-+ (sem-op bo bi bd))
-+ ()
-+ )
-+)
-+
-+(cond/reg-branch bcctr XOF_528 bctr-expr)
-+(cond/reg-branch bclr XOF_16 blr-expr)
-+(cond/disp-branch bc OPCD_16 bc-expr)
-+
-+
-+; Condition register insns.
-+
-+(define-pmacro (cr-op name xof sem-op)
-+ (dni name (.str name) ()
-+ (.str name " $crbd,$crba,$crbb")
-+ (+ OPCD_19 xof crbd crba crbb (f-oe 0) (f-rc 0))
-+ (sequence ((BI result))
-+ (set result
-+ (sem-op (bit-set? (reg h-cr) crba)
-+ (bit-set? (reg h-cr) crbb)))
-+ (if result
-+ (bit-set (reg h-cr) crbd)
-+ (bit-clr (reg h-cr) crbd)))
-+ ()
-+ )
-+)
-+
-+(define-pmacro (move/cr-op name opcd xof sem-op)
-+ (dni name (.str name) ()
-+ (.str name " $crfd,$crfs")
-+ (+ opcd xof crfd crfs (f-res/9-2 0) (f-res/14-2 0) (f-rb 0) (f-oe 0) (f-rc 0))
-+ (sem-op crfd crfs)
-+ ()
-+ )
-+)
-+
-+(define-pmacro (move/xer-op name opcd xof sem-op)
-+ (dni name (.str name) ()
-+ (.str name " $crfd")
-+ (+ opcd xof crfd (f-ra 0) (f-res/9-2 0) (f-rb 0) (f-oe 0) (f-rc 0))
-+ (sem-op crfd)
-+ ()
-+ )
-+)
-+
-+(define-pmacro (crandc-expr a b) (and a (inv b)))
-+(define-pmacro (creqv-expr a b) (not (xor a b))) ; ???
-+;(define-pmacro (crandc-expr a b) (and a (inv b)))
-+(define-pmacro (crnand-expr a b) (inv (and a b)))
-+(define-pmacro (crnor-expr a b) (inv (or a b)))
-+(define-pmacro (crorc-expr a b) (or a (inv b)))
-+
-+(cr-op crand XOF_257 and)
-+(cr-op cror XOF_449 or)
-+(cr-op crxor XOF_193 xor)
-+(cr-op crandc XOF_129 crandc-expr)
-+(cr-op creqv XOF_289 creqv-expr)
-+(cr-op crnand XOF_225 crnand-expr)
-+(cr-op crnor XOF_33 crnor-expr)
-+(cr-op crorc XOF_417 crorc-expr)
-+
-+(define-pmacro (mcrf-expr dst src) (set dst src))
-+(define-pmacro (mcrxr-expr dst) (set dst (and (reg h-spr 1) #xf)))
-+
-+(move/cr-op mcrf OPCD_19 XOF_0 mcrf-expr)
-+(move/xer-op mcrxr OPCD_31 XOF_512 mcrxr-expr)
-+
-+(dni mfcr "mfcr" ()
-+ "mfcr $rd"
-+ (+ OPCD_31 XOF_19 rd (f-ra 0) (f-rb 0) (f-oe 0) (f-rc 0))
-+ (set rd (reg h-cr))
-+ ()
-+)
-+
-+
-+; Cache related insns.
-+
-+(define-pmacro (cache-op name xof attrs)
-+ (dni name (.str name) attrs
-+ (.str name " $ra,$rb")
-+ (+ OPCD_31 xof ra rb (f-rd 0) (f-oe 0) (f-rc 0))
-+ (nop)
-+ ()
-+ )
-+)
-+
-+(define-pmacro (sync-op name opcd xof attrs)
-+ (dni name (.str name) attrs
-+ (.str name)
-+ (+ opcd xof (f-ra 0) (f-rb 0) (f-rd 0) (f-oe 0) (f-rc 0))
-+ (nop)
-+ ()
-+ )
-+)
-+
-+(define-pmacro (tlb-op name xof)
-+ (dni name (.str name) ((ARCH-LEVEL OEA) (INSN-LEVEL SUPERVISOR))
-+ (.str name " $rb")
-+ (+ OPCD_31 xof (f-ra 0) (f-rd 0) rb (f-oe 0) (f-rc 0))
-+ (nop)
-+ ()
-+ )
-+)
-+
-+(cache-op dcba XOF_758 ((ARCH-LEVEL VEA)))
-+(cache-op dcbf XOF_86 ((ARCH-LEVEL VEA)))
-+(cache-op dcbi XOF_470 ((ARCH-LEVEL OEA) (INSN-LEVEL SUPERVISOR)))
-+(cache-op dcbst XOF_54 ((ARCH-LEVEL VEA)))
-+(cache-op dcbt XOF_278 ((ARCH-LEVEL VEA)))
-+(cache-op dcbtst XOF_246 ((ARCH-LEVEL VEA)))
-+(cache-op dcbz XOF_1014 ((ARCH-LEVEL VEA)))
-+(cache-op icbi XOF_982 ((ARCH-LEVEL VEA)))
-+
-+(sync-op isync OPCD_19 XOF_150 ((ARCH-LEVEL VEA)))
-+(sync-op sync OPCD_31 XOF_598 ((ARCH-LEVEL UISA)))
-+(sync-op tlbia OPCD_31 XOF_370 ((ARCH-LEVEL OEA) (INSN-LEVEL SUPERVISOR)))
-+(sync-op tlbsync OPCD_31 XOF_566 ((ARCH-LEVEL OEA) (INSN-LEVEL SUPERVISOR)))
-+(tlb-op tlbie XOF_306)
-+
-+
-+; External Control insns.
-+
-+(define-pmacro (extern-op name xof arg1)
-+ (dni name (.str name) ((ARCH-LEVEL VEA))
-+ (.str name " $" arg1 ",$ra,$rb")
-+ (+ OPCD_31 xof arg1 ra rb (f-oe 0) (f-rc 0))
-+ (nop)
-+ ()
-+ )
-+)
-+
-+(extern-op eciwx XOF_310 rd)
-+(extern-op ecowx XOF_438 rs)
-+
-+(dni eieio "eieio" ((ARCH-LEVEL VEA))
-+ "eieio"
-+ (+ OPCD_31 XOF_854 (f-rd 0) (f-ra 0) (f-rb 0) (f-oe 0) (f-rc 0))
-+ (nop)
-+ ()
-+)
-+
-+
-+; Special Register insns.
-+
-+; Move from/to Machine State Register
-+
-+(define-pmacro (move/msr-op name xof sem-op)
-+ (dni name (.str name) ((ARCH-LEVEL OEA))
-+ (.str name " $rd")
-+ (+ OPCD_31 xof rd (f-ra 0) (f-rb 0) (f-oe 0) (f-rc 0))
-+ (sem-op rd)
-+ ()
-+ )
-+)
-+
-+(define-pmacro (move/spr-op name xof arg1 sem-op)
-+ (dni name (.str name) ((ARCH-LEVEL OEA))
-+ (.str name " $" arg1 ",$spr") ; ???
-+ (+ OPCD_31 xof arg1 spr (f-oe 0) (f-rc 0))
-+ (sem-op arg1 spr)
-+ ()
-+ )
-+)
-+
-+(define-pmacro (move/sr-op name xof arg1 arg2 sem-op)
-+ (dni name (.str name) ((ARCH-LEVEL OEA) (INSN-LEVEL SUPERVISOR))
-+ (.str name " $" arg1 ",$" arg2)
-+ (+ OPCD_31 xof arg1 arg2 (f-res/11-1 0) (f-rb 0) (f-oe 0) (f-rc 0))
-+ (sem-op arg1 arg2)
-+ ()
-+ )
-+)
-+
-+(define-pmacro (move/tbr-op name xof sem-op)
-+ (dni name (.str name) ((ARCH-LEVEL VEA))
-+ (.str name " $rd,$tbr")
-+ (+ OPCD_31 xof rd tbr (f-oe 0) (f-rc 0))
-+ (sem-op rd tbr)
-+ ()
-+ )
-+)
-+
-+(define-pmacro (mfmsr-expr dst) (set dst (reg h-msr)))
-+(define-pmacro (mtmsr-expr src) (set (reg h-msr) src))
-+(define-pmacro (mfspr-expr dst spr) (set dst spr))
-+(define-pmacro (mtspr-expr src spr) (set spr src))
-+
-+(define-pmacro (mtsr-expr expr1 expr2) (set expr1 expr2))
-+(define-pmacro (mfsr-expr expr1 expr2) (set expr1 expr2))
-+
-+(move/msr-op mfmsr XOF_83 mfmsr-expr)
-+(move/msr-op mtmsr XOF_146 mtmsr-expr)
-+
-+(move/spr-op mfspr XOF_339 rd mfspr-expr)
-+(move/spr-op mtspr XOF_467 rs mtspr-expr)
-+
-+(move/sr-op mtsr XOF_210 sr rs mtsr-expr)
-+(move/sr-op mfsr XOF_595 rd sr mfsr-expr)
-+; ??? NYA mtsrin mfsrin
-+
-+(move/tbr-op mftb XOF_371 set)
-diff -Nur binutils-2.24.orig/cgen/cpu/sh64-compact.cpu binutils-2.24/cgen/cpu/sh64-compact.cpu
---- binutils-2.24.orig/cgen/cpu/sh64-compact.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/sh64-compact.cpu 2016-06-30 21:26:12.641892646 +0200
-@@ -0,0 +1,1729 @@
-+; SuperH SHcompact instruction set description. -*- Scheme -*-
-+; Copyright (C) 2000 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; dshcf -- define-normal-sh-compact-field
-+
-+(define-pmacro (dshcf xname xcomment ignored xstart xlength)
-+ (dnf xname xcomment ((ISA compact)) xstart xlength))
-+
-+; dshcop -- define-normal-sh-compact-operand
-+
-+(define-pmacro (dshcop xname xcomment ignored xhardware xfield)
-+ (dnop xname xcomment ((ISA compact)) xhardware xfield))
-+
-+
-+; SHcompact-specific attributes.
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name ILLSLOT)
-+ (comment "instruction may not appear in a delay slot")
-+)
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name FP-INSN)
-+ (comment "floating point instruction")
-+)
-+
-+(define-keyword
-+ (name frc-names)
-+ (attrs (ISA compact))
-+ (print-name h-frc)
-+ (values (fr0 0) (fr1 1) (fr2 2) (fr3 3) (fr4 4) (fr5 5)
-+ (fr6 6) (fr7 7) (fr8 8) (fr9 9) (fr10 10) (fr11 11)
-+ (fr12 12) (fr13 13) (fr14 14) (fr15 15))
-+)
-+
-+(define-keyword
-+ (name drc-names)
-+ (attrs (ISA compact))
-+ (print-name h-drc)
-+ (values (dr0 0) (dr2 2) (dr4 4) (dr6 6) (dr8 8) (dr10 10) (dr12 12) (dr14 14))
-+)
-+
-+(define-keyword
-+ (name xf-names)
-+ (attrs (ISA compact))
-+ (print-name h-xf)
-+ (values (xf0 0) (xf1 1) (xf2 2) (xf3 3) (xf4 4) (xf5 5)
-+ (xf6 6) (xf7 7) (xf8 8) (xf9 9) (xf10 10) (xf11 11)
-+ (xf12 12) (xf13 13) (xf14 14) (xf15 15))
-+)
-+
-+; Hardware specific to the SHcompact mode.
-+
-+(define-pmacro (front) (mul 16 frbit))
-+(define-pmacro (back) (mul 16 (not frbit)))
-+
-+(define-hardware
-+ (name h-frc)
-+ (comment "Single precision floating point registers")
-+ (attrs VIRTUAL (ISA compact))
-+ (indices extern-keyword frc-names)
-+ (type register SF (16))
-+ (get (index) (reg h-fr (add (front) index)))
-+ (set (index newval) (set (reg h-fr (add (front) index)) newval))
-+)
-+
-+(define-hardware
-+ (name h-drc)
-+ (comment "Double precision floating point registers")
-+ (attrs VIRTUAL (ISA compact))
-+ (indices extern-keyword drc-names)
-+ (type register DF (8))
-+ (get (index) (reg h-dr (add (front) index)))
-+ (set (index newval) (set (reg h-dr (add (front) index)) newval))
-+)
-+
-+(define-hardware
-+ (name h-xf)
-+ (comment "Extended single precision floating point registers")
-+ (attrs VIRTUAL (ISA compact))
-+ (indices extern-keyword xf-names)
-+ (type register SF (16))
-+ (get (index) (reg h-fr (add (back) index)))
-+ (set (index newval) (set (reg h-fr (add (back) index)) newval))
-+)
-+
-+(define-hardware
-+ (name h-xd)
-+ (comment "Extended double precision floating point registers")
-+ (attrs VIRTUAL (ISA compact))
-+ (indices extern-keyword frc-names)
-+ (type register DF (8))
-+ (get (index) (reg h-dr (add (back) index)))
-+ (set (index newval) (set (reg h-dr (add (back) index)) newval))
-+)
-+
-+(define-hardware
-+ (name h-fvc)
-+ (comment "Single precision floating point vectors")
-+ (attrs VIRTUAL (ISA compact))
-+ (indices keyword "" ((fv0 0) (fv4 4) (fv8 8) (fv12 12)))
-+ (type register SF (4))
-+ (get (index) (reg h-fr (add (front) index)))
-+ (set (index newval) (set (reg h-fr (add (front) index)) newval))
-+)
-+
-+(define-hardware
-+ (name h-fpccr)
-+ (comment "SHcompact floating point status/control register")
-+ (attrs VIRTUAL (ISA compact))
-+ (type register SI)
-+ (get () (or (or (or (raw-reg h-fpscr) (sll SI prbit 19)) (sll SI szbit 20)) (sll SI frbit 21)))
-+ (set (newvalue) (sequence ()
-+ (set (reg h-fpscr) newvalue)
-+ (set prbit (and (srl newvalue 19) 1))
-+ (set szbit (and (srl newvalue 20) 1))
-+ (set frbit (and (srl newvalue 21) 1))))
-+)
-+
-+(define-hardware
-+ (name h-gbr)
-+ (comment "Global base register")
-+ (attrs VIRTUAL (ISA compact))
-+ (type register SI)
-+ (get () (subword SI (raw-reg h-gr 16) 1))
-+ (set (newval) (set (raw-reg h-gr 16) (ext DI newval)))
-+)
-+
-+(define-hardware
-+ (name h-pr)
-+ (comment "Procedure link register")
-+ (attrs VIRTUAL (ISA compact))
-+ (type register SI)
-+ (get () (subword SI (raw-reg h-gr 18) 1))
-+ (set (newval) (set (raw-reg h-gr 18) (ext DI newval)))
-+)
-+
-+(define-hardware
-+ (name h-macl)
-+ (comment "Multiple-accumulate low register")
-+ (attrs VIRTUAL (ISA compact))
-+ (type register SI)
-+ (get () (subword SI (raw-reg h-gr 17) 1))
-+ (set (newval) (set (raw-reg h-gr 17) (-join-si (subword SI (raw-reg h-gr 17) 0) newval)))
-+)
-+
-+(define-hardware
-+ (name h-mach)
-+ (comment "Multiply-accumulate high register")
-+ (attrs VIRTUAL (ISA compact))
-+ (type register SI)
-+ (get () (subword SI (raw-reg h-gr 17) 0))
-+ (set (newval) (set (raw-reg h-gr 17) (-join-si newval (subword SI (raw-reg h-gr 17) 1))))
-+)
-+
-+(define-hardware
-+ (name h-tbit)
-+ (comment "Condition code flag")
-+ (attrs VIRTUAL (ISA compact))
-+ (type register BI)
-+ (get () (and BI (raw-reg h-gr 19) 1))
-+ (set (newval) (set (raw-reg h-gr 19) (or (and (raw-reg h-gr 19) (inv DI 1)) (zext DI newval))))
-+)
-+
-+
-+(dshcf f-op4 "Opcode (4 bits)" () 15 4)
-+(dshcf f-op8 "Opcode (8 bits)" () 15 8)
-+(dshcf f-op16 "Opcode (16 bits)" () 15 16)
-+
-+(dshcf f-sub4 "Sub opcode (4 bits)" () 3 4)
-+(dshcf f-sub8 "Sub opcode (8 bits)" () 7 8)
-+(dshcf f-sub10 "Sub opcode (10 bits)" () 9 10)
-+
-+(dshcf f-rn "Register selector n" () 11 4)
-+(dshcf f-rm "Register selector m" () 7 4)
-+
-+(dshcf f-8-1 "One bit at bit 8" () 8 1)
-+
-+(df f-disp8 "Displacement (8 bits)" ((ISA compact) PCREL-ADDR) 7 8 INT
-+ ((value pc) (sra SI value 1))
-+ ((value pc) (add SI (sll SI value 1) (add pc 4))))
-+
-+(df f-disp12 "Displacement (12 bits)" ((ISA compact) PCREL-ADDR) 11 12 INT
-+ ((value pc) (sra SI value 1))
-+ ((value pc) (add SI (sll SI value 1) (add pc 4))))
-+
-+(dshcf f-imm8 "Immediate (8 bits)" () 7 8)
-+(dshcf f-imm4 "Immediate (4 bits)" () 3 4)
-+
-+(df f-imm4x2 "Immediate (4 bits)" ((ISA compact)) 3 4 UINT
-+ ((value pc) (srl SI value 1))
-+ ((value pc) (sll SI value 1)))
-+
-+(df f-imm4x4 "Immediate (4 bits)" ((ISA compact)) 3 4 UINT
-+ ((value pc) (srl SI value 2))
-+ ((value pc) (sll SI value 2)))
-+
-+(df f-imm8x2 "Immediate (8 bits)" ((ISA compact)) 7 8 UINT
-+ ((value pc) (sra SI value 1))
-+ ((value pc) (sll SI value 1)))
-+
-+(df f-imm8x4 "Immediate (8 bits)" ((ISA compact)) 7 8 UINT
-+ ((value pc) (sra SI value 2))
-+ ((value pc) (sll SI value 2)))
-+
-+(df f-dn "Double selector n" ((ISA compact)) 11 3 UINT
-+ ((value pc) (srl SI value 1))
-+ ((value pc) (sll SI value 1)))
-+
-+(df f-dm "Double selector m" ((ISA compact)) 7 3 UINT
-+ ((value pc) (srl SI value 1))
-+ ((value pc) (sll SI value 1)))
-+
-+(df f-vn "Vector selector n" ((ISA compact)) 11 2 UINT
-+ ((value pc) (srl SI value 2))
-+ ((value pc) (sll SI value 2)))
-+
-+(df f-vm "Vector selector m" ((ISA compact)) 9 2 UINT
-+ ((value pc) (srl SI value 2))
-+ ((value pc) (sll SI value 2)))
-+
-+(df f-xn "Extended selector n" ((ISA compact)) 11 3 UINT
-+ ((value pc) (srl SI value 1))
-+ ((value pc) (add SI (sll SI value 1) 1)))
-+
-+(df f-xm "Extended selector m" ((ISA compact)) 7 3 UINT
-+ ((value pc) (srl SI value 1))
-+ ((value pc) (add SI (sll SI value 1) 1)))
-+
-+
-+; Operands.
-+
-+(dshcop rm "Left general purpose register" () h-grc f-rm)
-+(dshcop rn "Right general purpose register" () h-grc f-rn)
-+(dshcop r0 "Register 0" () h-grc 0)
-+
-+(dshcop frn "Single precision register" () h-frc f-rn)
-+(dshcop frm "Single precision register" () h-frc f-rm)
-+
-+(dshcop fvn "Left floating point vector" () h-fvc f-vn)
-+(dshcop fvm "Right floating point vector" () h-fvc f-vm)
-+
-+(dshcop drn "Left double precision register" () h-drc f-dn)
-+(dshcop drm "Right double precision register" () h-drc f-dm)
-+
-+(dshcop imm4 "Immediate value (4 bits)" () h-sint f-imm4)
-+(dshcop imm8 "Immediate value (8 bits)" () h-sint f-imm8)
-+(dshcop uimm8 "Immediate value (8 bits unsigned)" () h-uint f-imm8)
-+
-+(dshcop imm4x2 "Immediate value (4 bits, 2x scale)" () h-uint f-imm4x2)
-+(dshcop imm4x4 "Immediate value (4 bits, 4x scale)" () h-uint f-imm4x4)
-+(dshcop imm8x2 "Immediate value (8 bits, 2x scale)" () h-uint f-imm8x2)
-+(dshcop imm8x4 "Immediate value (8 bits, 4x scale)" () h-uint f-imm8x4)
-+
-+(dshcop disp8 "Displacement (8 bits)" () h-iaddr f-disp8)
-+(dshcop disp12 "Displacement (12 bits)" () h-iaddr f-disp12)
-+
-+(dshcop rm64 "Register m (64 bits)" () h-gr f-rm)
-+(dshcop rn64 "Register n (64 bits)" () h-gr f-rn)
-+
-+(dshcop gbr "Global base register" () h-gbr f-nil)
-+(dshcop pr "Procedure link register" () h-pr f-nil)
-+
-+(dshcop fpscr "Floating point status/control register" () h-fpccr f-nil)
-+
-+(dshcop tbit "Condition code flag" () h-tbit f-nil)
-+(dshcop sbit "Multiply-accumulate saturation flag" () h-sbit f-nil)
-+(dshcop mbit "Divide-step M flag" () h-mbit f-nil)
-+(dshcop qbit "Divide-step Q flag" () h-qbit f-nil)
-+(dshcop fpul "Floating point ???" () h-fr 32)
-+
-+(dshcop frbit "Floating point register bank bit" () h-frbit f-nil)
-+(dshcop szbit "Floating point transfer size bit" () h-szbit f-nil)
-+(dshcop prbit "Floating point precision bit" () h-prbit f-nil)
-+
-+(dshcop macl "Multiply-accumulate low register" () h-macl f-nil)
-+(dshcop mach "Multiply-accumulate high register" () h-mach f-nil)
-+
-+
-+(define-operand (name fsdm) (comment "bar")
-+ (attrs (ISA compact)) (type h-frc) (index f-rm) (handlers (parse "fsd")))
-+
-+(define-operand (name fsdn) (comment "bar")
-+ (attrs (ISA compact)) (type h-frc) (index f-rn))
-+
-+
-+; Cover macro to dni to indicate these are all SHcompact instructions.
-+; dshmi: define-normal-sh-compact-insn
-+
-+(define-pmacro (dshci xname xcomment xattrs xsyntax xformat xsemantics)
-+ (define-insn
-+ (name (.sym xname -compact))
-+ (comment xcomment)
-+ (.splice attrs (.unsplice xattrs) (ISA compact))
-+ (syntax xsyntax)
-+ (format xformat)
-+ (semantics xsemantics)))
-+
-+(define-pmacro (dr operand) (reg h-dr (index-of operand)))
-+(define-pmacro (xd x) (reg h-xd (and (index-of x) (inv QI 1))))
-+
-+(dshci add "Add"
-+ ()
-+ "add $rm, $rn"
-+ (+ (f-op4 3) rn rm (f-sub4 12))
-+ (set rn (add rn rm)))
-+
-+(dshci addi "Add immediate"
-+ ()
-+ "add #$imm8, $rn"
-+ (+ (f-op4 7) rn imm8)
-+ (set rn (add rn (ext SI (and QI imm8 255)))))
-+
-+(dshci addc "Add with carry"
-+ ()
-+ "addc $rm, $rn"
-+ (+ (f-op4 3) rn rm (f-sub4 14))
-+ (sequence ((BI flag))
-+ (set flag (add-cflag rn rm tbit))
-+ (set rn (addc rn rm tbit))
-+ (set tbit flag)))
-+
-+(dshci addv "Add with overflow"
-+ ()
-+ "addv $rm, $rn"
-+ (+ (f-op4 3) rn rm (f-sub4 15))
-+ (sequence ((BI t))
-+ (set t (add-oflag rn rm 0))
-+ (set rn (add rn rm))
-+ (set tbit t)))
-+
-+(dshci and "Bitwise AND"
-+ ()
-+ "and $rm64, $rn64"
-+ (+ (f-op4 2) rn64 rm64 (f-sub4 9))
-+ (set rn64 (and rm64 rn64)))
-+
-+(dshci andi "Bitwise AND immediate"
-+ ()
-+ "and #$uimm8, r0"
-+ (+ (f-op8 #xc9) uimm8)
-+ (set r0 (and r0 (zext DI uimm8))))
-+
-+(dshci andb "Bitwise AND memory byte"
-+ ()
-+ "and.b #$imm8, @(r0, gbr)"
-+ (+ (f-op8 #xcd) imm8)
-+ (sequence ((DI addr) (UQI data))
-+ (set addr (add r0 gbr))
-+ (set data (and (mem UQI addr) imm8))
-+ (set (mem UQI addr) data)))
-+
-+(dshci bf "Conditional branch"
-+ ()
-+ "bf $disp8"
-+ (+ (f-op8 #x8b) disp8)
-+ (if (not tbit)
-+ (set pc disp8)))
-+
-+(dshci bfs "Conditional branch with delay slot"
-+ ()
-+ "bf/s $disp8"
-+ (+ (f-op8 #x8f) disp8)
-+ (if (not tbit)
-+ (delay 1 (set pc disp8))))
-+
-+(dshci bra "Branch"
-+ ()
-+ "bra $disp12"
-+ (+ (f-op4 10) disp12)
-+ (delay 1 (set pc disp12)))
-+
-+(dshci braf "Branch far"
-+ ()
-+ "braf $rn"
-+ (+ (f-op4 0) rn (f-sub8 35))
-+ (delay 1 (set pc (add (ext DI rn) (add pc 4)))))
-+
-+(dshci brk "Breakpoint"
-+ ()
-+ "brk"
-+ (+ (f-op16 59))
-+ (c-call "sh64_break" pc))
-+
-+(dshci bsr "Branch to subroutine"
-+ ()
-+ "bsr $disp12"
-+ (+ (f-op4 11) disp12)
-+ (delay 1 (sequence ()
-+ (set pr (add pc 4))
-+ (set pc disp12))))
-+
-+(dshci bsrf "Branch to far subroutine"
-+ ()
-+ "bsrf $rn"
-+ (+ (f-op4 0) rn (f-sub8 3))
-+ (delay 1 (sequence ()
-+ (set pr (add pc 4))
-+ (set pc (add (ext DI rn) (add pc 4))))))
-+
-+(dshci bt "Conditional branch"
-+ ()
-+ "bt $disp8"
-+ (+ (f-op8 #x89) disp8)
-+ (if tbit
-+ (set pc disp8)))
-+
-+(dshci bts "Conditional branch with delay slot"
-+ ()
-+ "bt/s $disp8"
-+ (+ (f-op8 #x8d) disp8)
-+ (if tbit
-+ (delay 1 (set pc disp8))))
-+
-+(dshci clrmac "Clear MACL and MACH"
-+ ()
-+ "clrmac"
-+ (+ (f-op16 40))
-+ (sequence ()
-+ (set macl 0)
-+ (set mach 0)))
-+
-+(dshci clrs "Clear S-bit"
-+ ()
-+ "clrs"
-+ (+ (f-op16 72))
-+ (set sbit 0))
-+
-+(dshci clrt "Clear T-bit"
-+ ()
-+ "clrt"
-+ (+ (f-op16 8))
-+ (set tbit 0))
-+
-+(dshci cmpeq "Compare if equal"
-+ ()
-+ "cmp/eq $rm, $rn"
-+ (+ (f-op4 3) rn rm (f-sub4 0))
-+ (set tbit (eq rm rn)))
-+
-+(dshci cmpeqi "Compare if equal (immediate)"
-+ ()
-+ "cmp/eq #$imm8, r0"
-+ (+ (f-op8 #x88) imm8)
-+ (set tbit (eq r0 (ext SI (and QI imm8 255)))))
-+
-+(dshci cmpge "Compare if greater than or equal"
-+ ()
-+ "cmp/ge $rm, $rn"
-+ (+ (f-op4 3) rn rm (f-sub4 3))
-+ (set tbit (ge rn rm)))
-+
-+(dshci cmpgt "Compare if greater than"
-+ ()
-+ "cmp/gt $rm, $rn"
-+ (+ (f-op4 3) rn rm (f-sub4 7))
-+ (set tbit (gt rn rm)))
-+
-+(dshci cmphi "Compare if greater than (unsigned)"
-+ ()
-+ "cmp/hi $rm, $rn"
-+ (+ (f-op4 3) rn rm (f-sub4 6))
-+ (set tbit (gtu rn rm)))
-+
-+(dshci cmphs "Compare if greater than or equal (unsigned)"
-+ ()
-+ "cmp/hs $rm, $rn"
-+ (+ (f-op4 3) rn rm (f-sub4 2))
-+ (set tbit (geu rn rm)))
-+
-+(dshci cmppl "Compare if greater than zero"
-+ ()
-+ "cmp/pl $rn"
-+ (+ (f-op4 4) rn (f-sub8 21))
-+ (set tbit (gt rn 0)))
-+
-+(dshci cmppz "Compare if greater than or equal zero"
-+ ()
-+ "cmp/pz $rn"
-+ (+ (f-op4 4) rn (f-sub8 17))
-+ (set tbit (ge rn 0)))
-+
-+(dshci cmpstr "Compare bytes"
-+ ()
-+ "cmp/str $rm, $rn"
-+ (+ (f-op4 2) rn rm (f-sub4 12))
-+ (sequence ((BI t) (SI temp))
-+ (set temp (xor rm rn))
-+ (set t (eq (and temp #xff000000) 0))
-+ (set t (or (eq (and temp #xff0000) 0) t))
-+ (set t (or (eq (and temp #xff00) 0) t))
-+ (set t (or (eq (and temp #xff) 0) t))
-+ (set tbit (if BI (gtu t 0) 1 0))))
-+
-+(dshci div0s "Initialise divide-step state for signed division"
-+ ()
-+ "div0s $rm, $rn"
-+ (+ (f-op4 2) rn rm (f-sub4 7))
-+ (sequence ()
-+ (set qbit (srl rn 31))
-+ (set mbit (srl rm 31))
-+ (set tbit (if BI (eq (srl rm 31) (srl rn 31)) 0 1))))
-+
-+(dshci div0u "Initialise divide-step state for unsigned division"
-+ ()
-+ "div0u"
-+ (+ (f-op16 25))
-+ (sequence ()
-+ (set tbit 0)
-+ (set qbit 0)
-+ (set mbit 0)))
-+
-+(dshci div1 "Divide step"
-+ ()
-+ "div1 $rm, $rn"
-+ (+ (f-op4 3) rn rm (f-sub4 4))
-+ (sequence ((BI oldq) (SI tmp0) (UQI tmp1))
-+ (set oldq qbit)
-+ (set qbit (srl rn 31))
-+ (set rn (or (sll rn 1) (zext SI tbit)))
-+ (if (not oldq)
-+ (if (not mbit)
-+ (sequence ()
-+ (set tmp0 rn)
-+ (set rn (sub rn rm))
-+ (set tmp1 (gtu rn tmp0))
-+ (if (not qbit)
-+ (set qbit (if BI tmp1 1 0))
-+ (set qbit (if BI (eq tmp1 0) 1 0))))
-+ (sequence ()
-+ (set tmp0 rn)
-+ (set rn (add rn rm))
-+ (set tmp1 (ltu rn tmp0))
-+ (if (not qbit)
-+ (set qbit (if BI (eq tmp1 0) 1 0))
-+ (set qbit (if BI tmp1 1 0)))))
-+ (if (not mbit)
-+ (sequence ()
-+ (set tmp0 rn)
-+ (set rn (add rm rn))
-+ (set tmp1 (ltu rn tmp0))
-+ (if (not qbit)
-+ (set qbit (if BI tmp1 1 0))
-+ (set qbit (if BI (eq tmp1 0) 1 0))))
-+ (sequence ()
-+ (set tmp0 rn)
-+ (set rn (sub rn rm))
-+ (set tmp1 (gtu rn tmp0))
-+ (if (not qbit)
-+ (set qbit (if BI (eq tmp1 0) 1 0))
-+ (set qbit (if BI tmp1 1 0))))))
-+ (set tbit (if BI (eq qbit mbit) 1 0))))
-+
-+(dshci dmulsl "Multiply long (signed)"
-+ ()
-+ "dmuls.l $rm, $rn"
-+ (+ (f-op4 3) rn rm (f-sub4 13))
-+ (sequence ((DI result))
-+ (set result (mul (ext DI rm) (ext DI rn)))
-+ (set mach (subword SI result 0))
-+ (set macl (subword SI result 1))))
-+
-+(dshci dmulul "Multiply long (unsigned)"
-+ ()
-+ "dmulu.l $rm, $rn"
-+ (+ (f-op4 3) rn rm (f-sub4 5))
-+ (sequence ((DI result))
-+ (set result (mul (zext DI rm) (zext DI rn)))
-+ (set mach (subword SI result 0))
-+ (set macl (subword SI result 1))))
-+
-+(dshci dt "Decrement and set"
-+ ()
-+ "dt $rn"
-+ (+ (f-op4 4) rn (f-sub8 16))
-+ (sequence ()
-+ (set rn (sub rn 1))
-+ (set tbit (eq rn 0))))
-+
-+(dshci extsb "Sign extend byte"
-+ ()
-+ "exts.b $rm, $rn"
-+ (+ (f-op4 6) rn rm (f-sub4 14))
-+ (set rn (ext SI (subword QI rm 3))))
-+
-+(dshci extsw "Sign extend word"
-+ ()
-+ "exts.w $rm, $rn"
-+ (+ (f-op4 6) rn rm (f-sub4 15))
-+ (set rn (ext SI (subword HI rm 1))))
-+
-+(dshci extub "Zero extend byte"
-+ ()
-+ "extu.b $rm, $rn"
-+ (+ (f-op4 6) rn rm (f-sub4 12))
-+ (set rn (zext SI (subword QI rm 3))))
-+
-+(dshci extuw "Zero etxend word"
-+ ()
-+ "extu.w $rm, $rn"
-+ (+ (f-op4 6) rn rm (f-sub4 13))
-+ (set rn (zext SI (subword HI rm 1))))
-+
-+(dshci fabs "Floating point absolute"
-+ (FP-INSN)
-+ "fabs $fsdn"
-+ (+ (f-op4 15) fsdn (f-sub8 #x5d))
-+ (if prbit
-+ (set (dr fsdn) (c-call DF "sh64_fabsd" (dr fsdn)))
-+ (set fsdn (c-call SF "sh64_fabss" fsdn))))
-+
-+(dshci fadd "Floating point add"
-+ (FP-INSN)
-+ "fadd $fsdm, $fsdn"
-+ (+ (f-op4 15) fsdn fsdm (f-sub4 0))
-+ (if prbit
-+ (set (dr fsdn) (c-call DF "sh64_faddd" (dr fsdm) (dr fsdn)))
-+ (set fsdn (c-call SF "sh64_fadds" fsdm fsdn))))
-+
-+(dshci fcmpeq "Floating point compare equal"
-+ (FP-INSN)
-+ "fcmp/eq $fsdm, $fsdn"
-+ (+ (f-op4 15) fsdn fsdm (f-sub4 4))
-+ (if prbit
-+ (set tbit (c-call BI "sh64_fcmpeqd" (dr fsdm) (dr fsdn)))
-+ (set tbit (c-call BI "sh64_fcmpeqs" fsdm fsdn))))
-+
-+(dshci fcmpgt "Floating point compare greater than"
-+ (FP-INSN)
-+ "fcmp/gt $fsdm, $fsdn"
-+ (+ (f-op4 15) fsdn fsdm (f-sub4 5))
-+ (if prbit
-+ (set tbit (c-call BI "sh64_fcmpgtd" (dr fsdn) (dr fsdm)))
-+ (set tbit (c-call BI "sh64_fcmpgts" fsdn fsdm))))
-+
-+(dshci fcnvds "Floating point convert (double to single)"
-+ (FP-INSN)
-+ "fcnvds $drn, fpul"
-+ (+ (f-op4 15) drn (f-8-1 10) (f-sub8 #xbd))
-+ (set fpul (c-call SF "sh64_fcnvds" drn)))
-+
-+(dshci fcnvsd "Floating point convert (single to double)"
-+ (FP-INSN)
-+ "fcnvsd fpul, $drn"
-+ (+ (f-op4 15) drn (f-8-1 0) (f-sub8 #xad))
-+ (set drn (c-call DF "sh64_fcnvsd" fpul)))
-+
-+(dshci fdiv "Floating point divide"
-+ (FP-INSN)
-+ "fdiv $fsdm, $fsdn"
-+ (+ (f-op4 15) fsdn fsdm (f-sub4 3))
-+ (if prbit
-+ (set (dr fsdn) (c-call DF "sh64_fdivd" (dr fsdn) (dr fsdm)))
-+ (set fsdn (c-call SF "sh64_fdivs" fsdn fsdm))))
-+
-+(dshci fipr "Floating point inner product"
-+ (FP-INSN)
-+ "fipr $fvm, $fvn"
-+ (+ (f-op4 15) fvn fvm (f-sub8 #xed))
-+ (sequence ((QI m) (QI n) (SF res))
-+ (set m (index-of fvm))
-+ (set n (index-of fvn))
-+ (set res (c-call SF "sh64_fmuls" fvm fvn))
-+ (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-frc (add m 1)) (reg h-frc (add n 1)))))
-+ (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-frc (add m 2)) (reg h-frc (add n 2)))))
-+ (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-frc (add m 3)) (reg h-frc (add n 3)))))
-+ (set (reg h-frc (add n 3)) res)))
-+
-+(dshci flds "Floating point load status register"
-+ (FP-INSN)
-+ "flds $frn"
-+ (+ (f-op4 15) frn (f-sub8 #x1d))
-+ (set fpul frn))
-+
-+(dshci fldi0 "Floating point load immediate 0.0"
-+ (FP-INSN)
-+ "fldi0 $frn"
-+ (+ (f-op4 15) frn (f-sub8 #x8d))
-+ (set frn (c-call SF "sh64_fldi0")))
-+
-+(dshci fldi1 "Floating point load immediate 1.0"
-+ (FP-INSN)
-+ "fldi1 $frn"
-+ (+ (f-op4 15) frn (f-sub8 #x9d))
-+ (set frn (c-call SF "sh64_fldi1")))
-+
-+(dshci float "Floating point integer conversion"
-+ (FP-INSN)
-+ "float fpul, $fsdn"
-+ (+ (f-op4 15) fsdn (f-sub8 #x2d))
-+ (if prbit
-+ (set (dr fsdn) (c-call DF "sh64_floatld" fpul))
-+ (set fsdn (c-call SF "sh64_floatls" fpul))))
-+
-+(dshci fmac "Floating point multiply and accumulate"
-+ (FP-INSN)
-+ "fmac fr0, $frm, $frn"
-+ (+ (f-op4 15) frn frm (f-sub4 14))
-+ (set frn (c-call SF "sh64_fmacs" (reg h-frc 0) frm frn)))
-+
-+(define-pmacro (even x) (eq (and x 1) 0))
-+(define-pmacro (odd x) (eq (and x 1) 1))
-+(define-pmacro (extd x) (odd (index-of x)))
-+
-+(dshci fmov1 "Floating point move (register to register)"
-+ (FP-INSN)
-+ "fmov $frm, $frn"
-+ (+ (f-op4 15) frn frm (f-sub4 12))
-+ (if (not szbit)
-+ ; single precision operation
-+ (set frn frm)
-+ ; double or extended operation
-+ (if (extd frm)
-+ (if (extd frn)
-+ (set (xd frn) (xd frm))
-+ (set (dr frn) (xd frm)))
-+ (if (extd frn)
-+ (set (xd frn) (dr frm))
-+ (set (dr frn) (dr frm))))))
-+
-+(dshci fmov2 "Floating point load"
-+ (FP-INSN)
-+ "fmov @$rm, $frn"
-+ (+ (f-op4 15) frn rm (f-sub4 8))
-+ (if (not szbit)
-+ ; single precision operation
-+ (set frn (mem SF rm))
-+ ; double or extended operation
-+ (if (extd frn)
-+ (set (xd frn) (mem DF rm))
-+ (set (dr frn) (mem DF rm)))))
-+
-+(dshci fmov3 "Floating point load (post-increment)"
-+ (FP-INSN)
-+ "fmov @${rm}+, frn"
-+ (+ (f-op4 15) frn rm (f-sub4 9))
-+ (if (not szbit)
-+ ; single precision operation
-+ (sequence ()
-+ (set frn (mem SF rm))
-+ (set rm (add rm 4)))
-+ ; double or extended operation
-+ (sequence ()
-+ (if (extd frn)
-+ (set (xd frn) (mem DF rm))
-+ (set (dr frn) (mem DF rm)))
-+ (set rm (add rm 8)))))
-+
-+(dshci fmov4 "Floating point load (register/register indirect)"
-+ (FP-INSN)
-+ "fmov @(r0, $rm), $frn"
-+ (+ (f-op4 15) frn rm (f-sub4 6))
-+ (if (not szbit)
-+ ; single precision operation
-+ (set frn (mem SF (add r0 rm)))
-+ ; double or extended operation
-+ (if (extd frn)
-+ (set (xd frn) (mem DF (add r0 rm)))
-+ (set (dr frn) (mem DF (add r0 rm))))))
-+
-+(dshci fmov5 "Floating point store"
-+ (FP-INSN)
-+ "fmov $frm, @$rn"
-+ (+ (f-op4 15) rn frm (f-sub4 10))
-+ (if (not szbit)
-+ ; single precision operation
-+ (set (mem SF rn) frm)
-+ ; double or extended operation
-+ (if (extd frm)
-+ (set (mem DF rn) (xd frm))
-+ (set (mem DF rn) (dr frm)))))
-+
-+(dshci fmov6 "Floating point store (pre-decrement)"
-+ (FP-INSN)
-+ "fmov $frm, @-$rn"
-+ (+ (f-op4 15) rn frm (f-sub4 11))
-+ (if (not szbit)
-+ ; single precision operation
-+ (sequence ()
-+ (set rn (sub rn 4))
-+ (set (mem SF rn) frm))
-+ ; double or extended operation
-+ (sequence ()
-+ (set rn (sub rn 8))
-+ (if (extd frm)
-+ (set (mem DF rn) (xd frm))
-+ (set (mem DF rn) (dr frm))))))
-+
-+(dshci fmov7 "Floating point store (register/register indirect)"
-+ (FP-INSN)
-+ "fmov $frm, @(r0, $rn)"
-+ (+ (f-op4 15) rn frm (f-sub4 7))
-+ (if (not szbit)
-+ ; single precision operation
-+ (set (mem SF (add r0 rn)) frm)
-+ ; double or extended operation
-+ (if (extd frm)
-+ (set (mem DF (add r0 rn)) (xd frm))
-+ (set (mem DF (add r0 rn)) (dr frm)))))
-+
-+(dshci fmul "Floating point multiply"
-+ (FP-INSN)
-+ "fmul $fsdm, $fsdn"
-+ (+ (f-op4 15) fsdn fsdm (f-sub4 2))
-+ (if prbit
-+ (set (dr fsdn) (c-call DF "sh64_fmuld" (dr fsdm) (dr fsdn)))
-+ (set fsdn (c-call SF "sh64_fmuls" fsdm fsdn))))
-+
-+(dshci fneg "Floating point negate"
-+ (FP-INSN)
-+ "fneg $fsdn"
-+ (+ (f-op4 15) fsdn (f-sub8 #x4d))
-+ (if prbit
-+ (set (dr fsdn) (c-call DF "sh64_fnegd" (dr fsdn)))
-+ (set fsdn (c-call SF "sh64_fnegs" fsdn))))
-+
-+(dshci frchg "Toggle floating point register banks"
-+ (FP-INSN)
-+ "frchg"
-+ (+ (f-op16 #xfbfd))
-+ (set frbit (not frbit)))
-+
-+(dshci fschg "Set size of floating point transfers"
-+ (FP-INSN)
-+ "fschg"
-+ (+ (f-op16 #xf3fd))
-+ (set szbit (not szbit)))
-+
-+(dshci fsqrt "Floating point square root"
-+ (FP-INSN)
-+ "fsqrt $fsdn"
-+ (+ (f-op4 15) fsdn (f-sub8 #x6d))
-+ (if prbit
-+ (set (dr fsdn) (c-call DF "sh64_fsqrtd" (dr fsdn)))
-+ (set fsdn (c-call SF "sh64_fsqrts" fsdn))))
-+
-+(dshci fsts "Floating point store status register"
-+ (FP-INSN)
-+ "fsts fpul, $frn"
-+ (+ (f-op4 15) frn (f-sub8 13))
-+ (set frn fpul))
-+
-+(dshci fsub "Floating point subtract"
-+ (FP-INSN)
-+ "fsub $fsdm, $fsdn"
-+ (+ (f-op4 15) fsdn fsdm (f-sub4 1))
-+ (if prbit
-+ (set (dr fsdn) (c-call DF "sh64_fsubd" (dr fsdn) (dr fsdm)))
-+ (set fsdn (c-call SF "sh64_fsubs" fsdn fsdm))))
-+
-+(dshci ftrc "Floating point truncate"
-+ (FP-INSN)
-+ "ftrc $fsdn, fpul"
-+ (+ (f-op4 15) fsdn (f-sub8 #x3d))
-+ (set fpul (if SF prbit
-+ (c-call SF "sh64_ftrcdl" (dr fsdn))
-+ (c-call SF "sh64_ftrcsl" fsdn))))
-+
-+(dshci ftrv "Floating point transform vector"
-+ (FP-INSN)
-+ "ftrv xmtrx, $fvn"
-+ (+ (f-op4 15) fvn (f-sub10 #x1fd))
-+ (sequence ((QI n) (SF res))
-+ (set n (index-of fvn))
-+ (set res (c-call SF "sh64_fmuls" (reg h-xf 0) (reg h-frc n)))
-+ (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 4) (reg h-frc (add n 1)))))
-+ (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 8) (reg h-frc (add n 2)))))
-+ (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 12) (reg h-frc (add n 3)))))
-+ (set (reg h-frc n) res)
-+ (set res (c-call SF "sh64_fmuls" (reg h-xf 1) (reg h-frc n)))
-+ (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 5) (reg h-frc (add n 1)))))
-+ (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 9) (reg h-frc (add n 2)))))
-+ (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 13) (reg h-frc (add n 3)))))
-+ (set (reg h-frc (add n 1)) res)
-+ (set res (c-call SF "sh64_fmuls" (reg h-xf 2) (reg h-frc n)))
-+ (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 6) (reg h-frc (add n 1)))))
-+ (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 10) (reg h-frc (add n 2)))))
-+ (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 14) (reg h-frc (add n 3)))))
-+ (set (reg h-frc (add n 2)) res)
-+ (set res (c-call SF "sh64_fmuls" (reg h-xf 3) (reg h-frc n)))
-+ (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 7) (reg h-frc (add n 1)))))
-+ (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 11) (reg h-frc (add n 2)))))
-+ (set res (c-call SF "sh64_fadds" res (c-call SF "sh64_fmuls" (reg h-xf 15) (reg h-frc (add n 3)))))
-+ (set (reg h-frc (add n 3)) res)))
-+
-+(dshci jmp "Jump"
-+ ()
-+ "jmp @$rn"
-+ (+ (f-op4 4) rn (f-sub8 43))
-+ (delay 1 (set pc rn)))
-+
-+(dshci jsr "Jump to subroutine"
-+ ()
-+ "jsr @$rn"
-+ (+ (f-op4 4) rn (f-sub8 11))
-+ (delay 1 (sequence ()
-+ (set pr (add pc 4))
-+ (set pc rn))))
-+
-+(dshci ldc "Load control register (GBR)"
-+ ()
-+ "ldc $rn, gbr"
-+ (+ (f-op4 4) rn (f-sub8 30))
-+ (set gbr rn))
-+
-+(dshci ldcl "Load control register (GBR)"
-+ ()
-+ "ldc.l @${rn}+, gbr"
-+ (+ (f-op4 4) rn (f-sub8 23))
-+ (sequence ()
-+ (set gbr (mem SI rn))
-+ (set rn (add rn 4))))
-+
-+(dshci lds-fpscr "Load status register (FPSCR)"
-+ ()
-+ "lds $rn, fpscr"
-+ (+ (f-op4 4) rn (f-sub8 106))
-+ (set fpscr rn))
-+
-+(dshci ldsl-fpscr "Load status register (FPSCR)"
-+ ()
-+ "lds.l @${rn}+, fpscr"
-+ (+ (f-op4 4) rn (f-sub8 102))
-+ (sequence ()
-+ (set fpscr (mem SI rn))
-+ (set rn (add rn 4))))
-+
-+(dshci lds-fpul "Load status register (FPUL)"
-+ ()
-+ "lds $rn, fpul"
-+ (+ (f-op4 4) rn (f-sub8 90))
-+ ; Use subword to convert rn's mode.
-+ (set fpul (subword SF rn 0)))
-+
-+(dshci ldsl-fpul "Load status register (FPUL)"
-+ ()
-+ "lds.l @${rn}+, fpul"
-+ (+ (f-op4 4) rn (f-sub8 86))
-+ (sequence ()
-+ (set fpul (mem SF rn))
-+ (set rn (add rn 4))))
-+
-+(dshci lds-mach "Load status register (MACH)"
-+ ()
-+ "lds $rn, mach"
-+ (+ (f-op4 4) rn (f-sub8 10))
-+ (set mach rn))
-+
-+(dshci ldsl-mach "Load status register (MACH), post-increment"
-+ ()
-+ "lds.l @${rn}+, mach"
-+ (+ (f-op4 4) rn (f-sub8 6))
-+ (sequence ()
-+ (set mach (mem SI rn))
-+ (set rn (add rn 4))))
-+
-+(dshci lds-macl "Load status register (MACL)"
-+ ()
-+ "lds $rn, macl"
-+ (+ (f-op4 4) rn (f-sub8 26))
-+ (set macl rn))
-+
-+(dshci ldsl-macl "Load status register (MACL), post-increment"
-+ ()
-+ "lds.l @${rn}+, macl"
-+ (+ (f-op4 4) rn (f-sub8 22))
-+ (sequence ()
-+ (set macl (mem SI rn))
-+ (set rn (add rn 4))))
-+
-+(dshci lds-pr "Load status register (PR)"
-+ ()
-+ "lds $rn, pr"
-+ (+ (f-op4 4) rn (f-sub8 42))
-+ (set pr rn))
-+
-+(dshci ldsl-pr "Load status register (PR), post-increment"
-+ ()
-+ "lds.l @${rn}+, pr"
-+ (+ (f-op4 4) rn (f-sub8 38))
-+ (sequence ()
-+ (set pr (mem SI rn))
-+ (set rn (add rn 4))))
-+
-+(dshci macl "Multiply and accumulate (long)"
-+ ()
-+ "mac.l @${rm}+, @${rn}+"
-+ (+ (f-op4 0) rn rm (f-sub4 15))
-+ (sequence ((DI tmpry) (DI mac) (DI result) (SI x) (SI y))
-+ (set x (mem SI rn))
-+ (set rn (add rn 4))
-+ (if (eq (index-of rn) (index-of rm))
-+ (sequence ()
-+ (set rn (add rn 4))
-+ (set rm (add rm 4))))
-+ (set y (mem SI rm))
-+ (set rm (add rm 4))
-+ (set tmpry (mul (zext DI x) (zext DI y)))
-+ (set mac (or DI (sll (zext DI mach) 32) (zext DI macl)))
-+ (set result (add mac tmpry))
-+ (sequence ()
-+ (if sbit
-+ (sequence ((SI min) (SI max))
-+ (set max (srl (inv DI 0) 16))
-+ ; Preserve bit 48 for sign.
-+ (set min (srl (inv DI 0) 15))
-+ (if (gt result max)
-+ (set result max)
-+ (if (lt result min)
-+ (set result min)))))
-+ (set mach (subword SI result 0))
-+ (set macl (subword SI result 1)))))
-+
-+(dshci macw "Multiply and accumulate (word)"
-+ ()
-+ "mac.w @${rm}+, @${rn}+"
-+ (+ (f-op4 4) rn rm (f-sub4 15))
-+ (sequence ((SI tmpry) (DI mac) (DI result) (HI x) (HI y))
-+ (set x (mem HI rn))
-+ (set rn (add rn 2))
-+ (if (eq (index-of rn) (index-of rm))
-+ (sequence ()
-+ (set rn (add rn 2))
-+ (set rm (add rm 2))))
-+ (set y (mem HI rm))
-+ (set rm (add rm 2))
-+ (set tmpry (mul (zext SI x) (zext SI y)))
-+ (if sbit
-+ (sequence ()
-+ (if (add-oflag tmpry macl 0)
-+ (set mach 1))
-+ (set macl (add tmpry macl)))
-+ (sequence ()
-+ (set mac (or DI (sll (zext DI mach) 32) (zext DI macl)))
-+ (set result (add mac (ext DI tmpry)))
-+ (set mach (subword SI result 0))
-+ (set macl (subword SI result 1))))))
-+
-+(dshci mov "Move"
-+ ()
-+ "mov $rm64, $rn64"
-+ (+ (f-op4 6) rn64 rm64 (f-sub4 3))
-+ (set rn64 rm64))
-+
-+(dshci movi "Move immediate"
-+ ()
-+ "mov #$imm8, $rn"
-+ (+ (f-op4 14) rn imm8)
-+ (set rn (ext DI (and QI imm8 255))))
-+
-+(dshci movb1 "Store byte to memory (register indirect w/ zero displacement)"
-+ ()
-+ "mov.b $rm, @$rn"
-+ (+ (f-op4 2) rn rm (f-sub4 0))
-+ (set (mem UQI rn) (subword UQI rm 3)))
-+
-+(dshci movb2 "Store byte to memory (register indirect w/ pre-decrement)"
-+ ()
-+ "mov.b $rm, @-$rn"
-+ (+ (f-op4 2) rn rm (f-sub4 4))
-+ (sequence ((DI addr))
-+ (set addr (sub rn 1))
-+ (set (mem UQI addr) (subword UQI rm 3))
-+ (set rn addr)))
-+
-+(dshci movb3 "Store byte to memory (register/register indirect)"
-+ ()
-+ "mov.b $rm, @(r0,$rn)"
-+ (+ (f-op4 0) rn rm (f-sub4 4))
-+ (set (mem UQI (add r0 rn)) (subword UQI rm 3)))
-+
-+(dshci movb4 "Store byte to memory (GBR-relative w/ displacement)"
-+ ()
-+ "mov.b r0, @($imm8, gbr)"
-+ (+ (f-op8 #xc0) imm8)
-+ (sequence ((DI addr))
-+ (set addr (add gbr imm8))
-+ (set (mem UQI addr) (subword UQI r0 3))))
-+
-+(dshci movb5 "Store byte to memory (register indirect w/ displacement)"
-+ ()
-+ "mov.b r0, @($imm4, $rm)"
-+ (+ (f-op8 #x80) rm imm4)
-+ (sequence ((DI addr))
-+ (set addr (add rm imm4))
-+ (set (mem UQI addr) (subword UQI r0 3))))
-+
-+(dshci movb6 "Load byte from memory (register indirect w/ zero displacement)"
-+ ()
-+ "mov.b @$rm, $rn"
-+ (+ (f-op4 6) rn rm (f-sub4 0))
-+ (set rn (ext SI (mem QI rm))))
-+
-+(dshci movb7 "Load byte from memory (register indirect w/ post-increment)"
-+ ()
-+ "mov.b @${rm}+, $rn"
-+ (+ (f-op4 6) rn rm (f-sub4 4))
-+ (sequence ((QI data))
-+ (set data (mem QI rm))
-+ (if (eq (index-of rm) (index-of rn))
-+ (set rm (ext SI data))
-+ (set rm (add rm 1)))
-+ (set rn (ext SI data))))
-+
-+(dshci movb8 "Load byte from memory (register/register indirect)"
-+ ()
-+ "mov.b @(r0, $rm), $rn"
-+ (+ (f-op4 0) rn rm (f-sub4 12))
-+ (set rn (ext SI (mem QI (add r0 rm)))))
-+
-+(dshci movb9 "Load byte from memory (GBR-relative with displacement)"
-+ ()
-+ "mov.b @($imm8, gbr), r0"
-+ (+ (f-op8 #xc4) imm8)
-+ (set r0 (ext SI (mem QI (add gbr imm8)))))
-+
-+(dshci movb10 "Load byte from memory (register indirect w/ displacement)"
-+ ()
-+ "mov.b @($imm4, $rm), r0"
-+ (+ (f-op8 #x84) rm imm4)
-+ (set r0 (ext SI (mem QI (add rm imm4)))))
-+
-+(dshci movl1 "Store long word to memory (register indirect w/ zero displacement)"
-+ ()
-+ "mov.l $rm, @$rn"
-+ (+ (f-op4 2) rn rm (f-sub4 2))
-+ (set (mem SI rn) rm))
-+
-+(dshci movl2 "Store long word to memory (register indirect w/ pre-decrement)"
-+ ()
-+ "mov.l $rm, @-$rn"
-+ (+ (f-op4 2) rn rm (f-sub4 6))
-+ (sequence ((SI addr))
-+ (set addr (sub rn 4))
-+ (set (mem SI addr) rm)
-+ (set rn addr)))
-+
-+(dshci movl3 "Store long word to memory (register/register indirect)"
-+ ()
-+ "mov.l $rm, @(r0, $rn)"
-+ (+ (f-op4 0) rn rm (f-sub4 6))
-+ (set (mem SI (add r0 rn)) rm))
-+
-+(dshci movl4 "Store long word to memory (GBR-relative w/ displacement)"
-+ ()
-+ "mov.l r0, @($imm8x4, gbr)"
-+ (+ (f-op8 #xc2) imm8x4)
-+ (set (mem SI (add gbr imm8x4)) r0))
-+
-+(dshci movl5 "Store long word to memory (register indirect w/ displacement)"
-+ ()
-+ "mov.l $rm, @($imm4x4, $rn)"
-+ (+ (f-op4 1) rn rm imm4x4)
-+ (set (mem SI (add rn imm4x4)) rm))
-+
-+(dshci movl6 "Load long word to memory (register indirect w/ zero displacement)"
-+ ()
-+ "mov.l @$rm, $rn"
-+ (+ (f-op4 6) rn rm (f-sub4 2))
-+ (set rn (mem SI rm)))
-+
-+(dshci movl7 "Load long word from memory (register indirect w/ post-increment)"
-+ ()
-+ "mov.l @${rm}+, $rn"
-+ (+ (f-op4 6) rn rm (f-sub4 6))
-+ (sequence ()
-+ (set rn (mem SI rm))
-+ (if (eq (index-of rm) (index-of rn))
-+ (set rm rn)
-+ (set rm (add rm 4)))))
-+
-+(dshci movl8 "Load long word from memory (register/register indirect)"
-+ ()
-+ "mov.l @(r0, $rm), $rn"
-+ (+ (f-op4 0) rn rm (f-sub4 14))
-+ (set rn (mem SI (add r0 rm))))
-+
-+(dshci movl9 "Load long word from memory (GBR-relative w/ displacement)"
-+ ()
-+ "mov.l @($imm8x4, gbr), r0"
-+ (+ (f-op8 #xc6) imm8x4)
-+ (set r0 (mem SI (add gbr imm8x4))))
-+
-+(dshci movl10 "Load long word from memory (PC-relative w/ displacement)"
-+ (ILLSLOT)
-+ "mov.l @($imm8x4, pc), $rn"
-+ (+ (f-op4 13) rn imm8x4)
-+ (set rn (mem SI (add imm8x4 (and (add pc 4) (inv 3))))))
-+
-+(dshci movl11 "Load long word from memory (register indirect w/ displacement)"
-+ ()
-+ "mov.l @($imm4x4, $rm), $rn"
-+ (+ (f-op4 5) rn rm imm4x4)
-+ (set rn (mem SI (add rm imm4x4))))
-+
-+(dshci movw1 "Store word to memory (register indirect w/ zero displacement)"
-+ ()
-+ "mov.w $rm, @$rn"
-+ (+ (f-op4 2) rn rm (f-sub4 1))
-+ (set (mem HI rn) (subword HI rm 1)))
-+
-+(dshci movw2 "Store word to memory (register indirect w/ pre-decrement)"
-+ ()
-+ "mov.w $rm, @-$rn"
-+ (+ (f-op4 2) rn rm (f-sub4 5))
-+ (sequence ((DI addr))
-+ (set addr (sub rn 2))
-+ (set (mem HI addr) (subword HI rm 1))
-+ (set rn addr)))
-+
-+(dshci movw3 "Store word to memory (register/register indirect)"
-+ ()
-+ "mov.w $rm, @(r0, $rn)"
-+ (+ (f-op4 0) rn rm (f-sub4 5))
-+ (set (mem HI (add r0 rn)) (subword HI rm 1)))
-+
-+(dshci movw4 "Store word to memory (GBR-relative w/ displacement)"
-+ ()
-+ "mov.w r0, @($imm8x2, gbr)"
-+ (+ (f-op8 #xc1) imm8x2)
-+ (set (mem HI (add gbr imm8x2)) (subword HI r0 1)))
-+
-+(dshci movw5 "Store word to memory (register indirect w/ displacement)"
-+ ()
-+ "mov.w r0, @($imm4x2, $rm)"
-+ (+ (f-op8 #x81) rm imm4x2)
-+ (set (mem HI (add rm imm4x2)) (subword HI r0 1)))
-+
-+(dshci movw6 "Load word from memory (register indirect w/ zero displacement)"
-+ ()
-+ "mov.w @$rm, $rn"
-+ (+ (f-op4 6) rn rm (f-sub4 1))
-+ (set rn (ext SI (mem HI rm))))
-+
-+(dshci movw7 "Load word from memory (register indirect w/ post-increment)"
-+ ()
-+ "mov.w @${rm}+, $rn"
-+ (+ (f-op4 6) rn rm (f-sub4 5))
-+ (sequence ((HI data))
-+ (set data (mem HI rm))
-+ (if (eq (index-of rm) (index-of rn))
-+ (set rm (ext SI data))
-+ (set rm (add rm 2)))
-+ (set rn (ext SI data))))
-+
-+(dshci movw8 "Load word from memory (register/register indirect)"
-+ ()
-+ "mov.w @(r0, $rm), $rn"
-+ (+ (f-op4 0) rn rm (f-sub4 13))
-+ (set rn (ext SI (mem HI (add r0 rm)))))
-+
-+(dshci movw9 "Load word from memory (GBR-relative w/ displacement)"
-+ ()
-+ "mov.w @($imm8x2, gbr), r0"
-+ (+ (f-op8 #xc5) imm8x2)
-+ (set r0 (ext SI (mem HI (add gbr imm8x2)))))
-+
-+(dshci movw10 "Load word from memory (PC-relative w/ displacement)"
-+ (ILLSLOT)
-+ "mov.w @($imm8x2, pc), $rn"
-+ (+ (f-op4 9) rn imm8x2)
-+ (set rn (ext SI (mem HI (add (add pc 4) imm8x2)))))
-+
-+(dshci movw11 "Load word from memory (register indirect w/ displacement)"
-+ ()
-+ "mov.w @($imm4x2, $rm), r0"
-+ (+ (f-op8 #x85) rm imm4x2)
-+ (set r0 (ext SI (mem HI (add rm imm4x2)))))
-+
-+(dshci mova "Move effective address"
-+ (ILLSLOT)
-+ "mova @($imm8x4, pc), r0"
-+ (+ (f-op8 #xc7) imm8x4)
-+ (set r0 (add (and (add pc 4) (inv 3)) imm8x4)))
-+
-+(dshci movcal "Move with cache block allocation"
-+ ()
-+ "movca.l r0, @$rn"
-+ (+ (f-op4 0) rn (f-sub8 #xc3))
-+ (set (mem SI rn) r0))
-+
-+(dshci movt "Move t-bit"
-+ ()
-+ "movt $rn"
-+ (+ (f-op4 0) rn (f-sub8 41))
-+ (set rn (zext SI tbit)))
-+
-+(dshci mull "Multiply"
-+ ()
-+ "mul.l $rm, $rn"
-+ (+ (f-op4 0) rn rm (f-sub4 7))
-+ (set macl (mul rm rn)))
-+
-+(dshci mulsw "Multiply words (signed)"
-+ ()
-+ "muls.w $rm, $rn"
-+ (+ (f-op4 2) rn rm (f-sub4 15))
-+ (set macl (mul (ext SI (subword HI rm 1)) (ext SI (subword HI rn 1)))))
-+
-+(dshci muluw "Multiply words (unsigned)"
-+ ()
-+ "mulu.w $rm, $rn"
-+ (+ (f-op4 2) rn rm (f-sub4 14))
-+ (set macl (mul (zext SI (subword HI rm 1)) (zext SI (subword HI rn 1)))))
-+
-+(dshci neg "Negate"
-+ ()
-+ "neg $rm, $rn"
-+ (+ (f-op4 6) rn rm (f-sub4 11))
-+ (set rn (neg rm)))
-+
-+(dshci negc "Negate with carry"
-+ ()
-+ "negc $rm, $rn"
-+ (+ (f-op4 6) rn rm (f-sub4 10))
-+ (sequence ((BI flag))
-+ (set flag (sub-cflag 0 rm tbit))
-+ (set rn (subc 0 rm tbit))
-+ (set tbit flag)))
-+
-+(dshci nop "No operation"
-+ ()
-+ "nop"
-+ (+ (f-op16 9))
-+ (nop))
-+
-+(dshci not "Bitwise NOT"
-+ ()
-+ "not $rm64, $rn64"
-+ (+ (f-op4 6) rn64 rm64 (f-sub4 7))
-+ (set rn64 (inv rm64)))
-+
-+(dshci ocbi "Invalidate operand cache block"
-+ ()
-+ "ocbi @$rn"
-+ (+ (f-op4 0) rn (f-sub8 147))
-+ (unimp "ocbi"))
-+
-+(dshci ocbp "Purge operand cache block"
-+ ()
-+ "ocbp @$rn"
-+ (+ (f-op4 0) rn (f-sub8 163))
-+ (unimp "ocbp"))
-+
-+(dshci ocbwb "Write back operand cache block"
-+ ()
-+ "ocbwb @$rn"
-+ (+ (f-op4 0) rn (f-sub8 179))
-+ (unimp "ocbwb"))
-+
-+(dshci or "Bitwise OR"
-+ ()
-+ "or $rm64, $rn64"
-+ (+ (f-op4 2) rn64 rm64 (f-sub4 11))
-+ (set rn64 (or rm64 rn64)))
-+
-+(dshci ori "Bitwise OR immediate"
-+ ()
-+ "or #$uimm8, r0"
-+ (+ (f-op8 #xcb) uimm8)
-+ (set r0 (or r0 (zext DI uimm8))))
-+
-+(dshci orb "Bitwise OR immediate"
-+ ()
-+ "or.b #$imm8, @(r0, gbr)"
-+ (+ (f-op8 #xcf) imm8)
-+ (sequence ((DI addr) (UQI data))
-+ (set addr (add r0 gbr))
-+ (set data (or (mem UQI addr) imm8))
-+ (set (mem UQI addr) data)))
-+
-+(dshci pref "Prefetch data"
-+ ()
-+ "pref @$rn"
-+ (+ (f-op4 0) rn (f-sub8 131))
-+ (unimp "pref"))
-+
-+(dshci rotcl "Rotate with carry left"
-+ ()
-+ "rotcl $rn"
-+ (+ (f-op4 4) rn (f-sub8 36))
-+ (sequence ((BI temp))
-+ (set temp (srl rn 31))
-+ (set rn (or (sll rn 1) tbit))
-+ (set tbit (if BI temp 1 0))))
-+
-+(dshci rotcr "Rotate with carry right"
-+ ()
-+ "rotcr $rn"
-+ (+ (f-op4 4) rn (f-sub8 37))
-+ (sequence ((BI lsbit) (SI temp))
-+ (set lsbit (if BI (eq (and rn 1) 0) 0 1))
-+ (set temp tbit)
-+ (set rn (or (srl rn 1) (sll temp 31)))
-+ (set tbit (if BI lsbit 1 0))))
-+
-+(dshci rotl "Rotate left"
-+ ()
-+ "rotl $rn"
-+ (+ (f-op4 4) rn (f-sub8 4))
-+ (sequence ((BI temp))
-+ (set temp (srl rn 31))
-+ (set rn (or (sll rn 1) temp))
-+ (set tbit (if BI temp 1 0))))
-+
-+(dshci rotr "Rotate right"
-+ ()
-+ "rotr $rn"
-+ (+ (f-op4 4) rn (f-sub8 5))
-+ (sequence ((BI lsbit) (SI temp))
-+ (set lsbit (if BI (eq (and rn 1) 0) 0 1))
-+ (set temp lsbit)
-+ (set rn (or (srl rn 1) (sll temp 31)))
-+ (set tbit (if BI lsbit 1 0))))
-+
-+(dshci rts "Return from subroutine"
-+ ()
-+ "rts"
-+ (+ (f-op16 11))
-+ (delay 1 (set pc pr)))
-+
-+(dshci sets "Set S-bit"
-+ ()
-+ "sets"
-+ (+ (f-op16 88))
-+ (set sbit 1))
-+
-+(dshci sett "Set T-bit"
-+ ()
-+ "sett"
-+ (+ (f-op16 24))
-+ (set tbit 1))
-+
-+(dshci shad "Shift arithmetic dynamic"
-+ ()
-+ "shad $rm, $rn"
-+ (+ (f-op4 4) rn rm (f-sub4 12))
-+ (sequence ((QI shamt))
-+ (set shamt (and QI rm 31))
-+ (if (ge rm 0)
-+ (set rn (sll rn shamt))
-+ (if (ne shamt 0)
-+ (set rn (sra rn (sub 32 shamt)))
-+ (if (lt rn 0)
-+ (set rn (neg 1))
-+ (set rn 0))))))
-+
-+(dshci shal "Shift left arithmetic one bit"
-+ ()
-+ "shal $rn"
-+ (+ (f-op4 4) rn (f-sub8 32))
-+ (sequence ((BI t))
-+ (set t (srl rn 31))
-+ (set rn (sll rn 1))
-+ (set tbit (if BI t 1 0))))
-+
-+(dshci shar "Shift right arithmetic one bit"
-+ ()
-+ "shar $rn"
-+ (+ (f-op4 4) rn (f-sub8 33))
-+ (sequence ((BI t))
-+ (set t (and rn 1))
-+ (set rn (sra rn 1))
-+ (set tbit (if BI t 1 0))))
-+
-+(dshci shld "Shift logical dynamic"
-+ ()
-+ "shld $rm, $rn"
-+ (+ (f-op4 4) rn rm (f-sub4 13))
-+ (sequence ((QI shamt))
-+ (set shamt (and QI rm 31))
-+ (if (ge rm 0)
-+ (set rn (sll rn shamt))
-+ (if (ne shamt 0)
-+ (set rn (srl rn (sub 32 shamt)))
-+ (set rn 0)))))
-+
-+(dshci shll "Shift left logical one bit"
-+ ()
-+ "shll $rn"
-+ (+ (f-op4 4) rn (f-sub8 0))
-+ (sequence ((BI t))
-+ (set t (srl rn 31))
-+ (set rn (sll rn 1))
-+ (set tbit (if BI t 1 0))))
-+
-+(dshci shll2 "Shift left logical two bits"
-+ ()
-+ "shll2 $rn"
-+ (+ (f-op4 4) rn (f-sub8 8))
-+ (set rn (sll rn 2)))
-+
-+(dshci shll8 "Shift left logical eight bits"
-+ ()
-+ "shll8 $rn"
-+ (+ (f-op4 4) rn (f-sub8 24))
-+ (set rn (sll rn 8)))
-+
-+(dshci shll16 "Shift left logical sixteen bits"
-+ ()
-+ "shll16 $rn"
-+ (+ (f-op4 4) rn (f-sub8 40))
-+ (set rn (sll rn 16)))
-+
-+(dshci shlr "Shift right logical one bit"
-+ ()
-+ "shlr $rn"
-+ (+ (f-op4 4) rn (f-sub8 1))
-+ (sequence ((BI t))
-+ (set t (and rn 1))
-+ (set rn (srl rn 1))
-+ (set tbit (if BI t 1 0))))
-+
-+(dshci shlr2 "Shift right logical two bits"
-+ ()
-+ "shlr2 $rn"
-+ (+ (f-op4 4) rn (f-sub8 9))
-+ (set rn (srl rn 2)))
-+
-+(dshci shlr8 "Shift right logical eight bits"
-+ ()
-+ "shlr8 $rn"
-+ (+ (f-op4 4) rn (f-sub8 25))
-+ (set rn (srl rn 8)))
-+
-+(dshci shlr16 "Shift right logical sixteen bits"
-+ ()
-+ "shlr16 $rn"
-+ (+ (f-op4 4) rn (f-sub8 41))
-+ (set rn (srl rn 16)))
-+
-+(dshci stc-gbr "Store control register (GBR)"
-+ ()
-+ "stc gbr, $rn"
-+ (+ (f-op4 0) rn (f-sub8 18))
-+ (set rn gbr))
-+
-+(dshci stcl-gbr "Store control register (GBR)"
-+ ()
-+ "stc.l gbr, @-$rn"
-+ (+ (f-op4 4) rn (f-sub8 19))
-+ (sequence ((DI addr))
-+ (set addr (sub rn 4))
-+ (set (mem SI addr) gbr)
-+ (set rn addr)))
-+
-+(dshci sts-fpscr "Store status register (FPSCR)"
-+ ()
-+ "sts fpscr, $rn"
-+ (+ (f-op4 0) rn (f-sub8 106))
-+ (set rn fpscr))
-+
-+(dshci stsl-fpscr "Store status register (FPSCR)"
-+ ()
-+ "sts.l fpscr, @-$rn"
-+ (+ (f-op4 4) rn (f-sub8 98))
-+ (sequence ((DI addr))
-+ (set addr (sub rn 4))
-+ (set (mem SI addr) fpscr)
-+ (set rn addr)))
-+
-+(dshci sts-fpul "Store status register (FPUL)"
-+ ()
-+ "sts fpul, $rn"
-+ (+ (f-op4 0) rn (f-sub8 90))
-+ (set rn (subword SI fpul 0)))
-+
-+(dshci stsl-fpul "Store status register (FPUL)"
-+ ()
-+ "sts.l fpul, @-$rn"
-+ (+ (f-op4 4) rn (f-sub8 82))
-+ (sequence ((DI addr))
-+ (set addr (sub rn 4))
-+ (set (mem SF addr) fpul)
-+ (set rn addr)))
-+
-+(dshci sts-mach "Store status register (MACH)"
-+ ()
-+ "sts mach, $rn"
-+ (+ (f-op4 0) rn (f-sub8 10))
-+ (set rn mach))
-+
-+(dshci stsl-mach "Store status register (MACH)"
-+ ()
-+ "sts.l mach, @-$rn"
-+ (+ (f-op4 4) rn (f-sub8 2))
-+ (sequence ((DI addr))
-+ (set addr (sub rn 4))
-+ (set (mem SI addr) mach)
-+ (set rn addr)))
-+
-+(dshci sts-macl "Store status register (MACL)"
-+ ()
-+ "sts macl, $rn"
-+ (+ (f-op4 0) rn (f-sub8 26))
-+ (set rn macl))
-+
-+(dshci stsl-macl "Store status register (MACL)"
-+ ()
-+ "sts.l macl, @-$rn"
-+ (+ (f-op4 4) rn (f-sub8 18))
-+ (sequence ((DI addr))
-+ (set addr (sub rn 4))
-+ (set (mem SI addr) macl)
-+ (set rn addr)))
-+
-+(dshci sts-pr "Store status register (PR)"
-+ ()
-+ "sts pr, $rn"
-+ (+ (f-op4 0) rn (f-sub8 42))
-+ (set rn pr))
-+
-+(dshci stsl-pr "Store status register (PR)"
-+ ()
-+ "sts.l pr, @-$rn"
-+ (+ (f-op4 4) rn (f-sub8 34))
-+ (sequence ((DI addr))
-+ (set addr (sub rn 4))
-+ (set (mem SI addr) pr)
-+ (set rn addr)))
-+
-+(dshci sub "Subtract"
-+ ()
-+ "sub $rm, $rn"
-+ (+ (f-op4 3) rn rm (f-sub4 8))
-+ (set rn (sub rn rm)))
-+
-+(dshci subc "Subtract and detect carry"
-+ ()
-+ "subc $rm, $rn"
-+ (+ (f-op4 3) rn rm (f-sub4 10))
-+ (sequence ((BI flag))
-+ (set flag (sub-cflag rn rm tbit))
-+ (set rn (subc rn rm tbit))
-+ (set tbit flag)))
-+
-+(dshci subv "Subtract and detect overflow"
-+ ()
-+ "subv $rm, $rn"
-+ (+ (f-op4 3) rn rm (f-sub4 11))
-+ (sequence ((BI t))
-+ (set t (sub-oflag rn rm 0))
-+ (set rn (sub rn rm))
-+ (set tbit (if BI t 1 0))))
-+
-+(dshci swapb "Swap bytes"
-+ ()
-+ "swap.b $rm, $rn"
-+ (+ (f-op4 6) rn rm (f-sub4 8))
-+ (sequence ((UHI top-half) (UQI byte1) (UQI byte0))
-+ (set top-half (subword HI rm 0))
-+ (set byte1 (subword QI rm 2))
-+ (set byte0 (subword QI rm 3))
-+ (set rn (or SI (sll SI top-half 16) (or SI (sll SI byte0 8) byte1)))))
-+
-+(dshci swapw "Swap words"
-+ ()
-+ "swap.w $rm, $rn"
-+ (+ (f-op4 6) rn rm (f-sub4 9))
-+ (set rn (or (srl rm 16) (sll rm 16))))
-+
-+(dshci tasb "Test and set byte"
-+ ()
-+ "tas.b @$rn"
-+ (+ (f-op4 4) rn (f-sub8 27))
-+ (sequence ((UQI byte))
-+ (set byte (mem UQI rn))
-+ (set tbit (if BI (eq byte 0) 1 0))
-+ (set byte (or byte 128))
-+ (set (mem UQI rn) byte)))
-+
-+(dshci trapa "Trap"
-+ (ILLSLOT)
-+ "trapa #$uimm8"
-+ (+ (f-op8 #xc3) uimm8)
-+ (c-call "sh64_compact_trapa" uimm8 pc))
-+
-+(dshci tst "Test and set t-bit"
-+ ()
-+ "tst $rm, $rn"
-+ (+ (f-op4 2) rn rm (f-sub4 8))
-+ (set tbit (if BI (eq (and rm rn) 0) 1 0)))
-+
-+(dshci tsti "Test and set t-bit immediate"
-+ ()
-+ "tst #$uimm8, r0"
-+ (+ (f-op8 #xc8) uimm8)
-+ (set tbit (if BI (eq (and r0 (zext SI uimm8)) 0) 1 0)))
-+
-+(dshci tstb "Test and set t-bit immedate with memory byte"
-+ ()
-+ "tst.b #$imm8, @(r0, gbr)"
-+ (+ (f-op8 #xcc) imm8)
-+ (sequence ((DI addr))
-+ (set addr (add r0 gbr))
-+ (set tbit (if BI (eq (and (mem UQI addr) imm8) 0) 1 0))))
-+
-+(dshci xor "Exclusive OR"
-+ ()
-+ "xor $rm64, $rn64"
-+ (+ (f-op4 2) rn64 rm64 (f-sub4 10))
-+ (set rn64 (xor rn64 rm64)))
-+
-+(dshci xori "Exclusive OR immediate"
-+ ()
-+ "xor #$uimm8, r0"
-+ (+ (f-op8 #xca) uimm8)
-+ (set (reg h-gr 0) (xor (reg h-gr 0) (zext DI uimm8))))
-+
-+(dshci xorb "Exclusive OR immediate with memory byte"
-+ ()
-+ "xor.b #$imm8, @(r0, gbr)"
-+ (+ (f-op8 #xce) imm8)
-+ (sequence ((DI addr) (UQI data))
-+ (set addr (add r0 gbr))
-+ (set data (xor (mem UQI addr) imm8))
-+ (set (mem UQI addr) data)))
-+
-+(dshci xtrct "Extract"
-+ ()
-+ "xtrct $rm, $rn"
-+ (+ (f-op4 2) rn rm (f-sub4 13))
-+ (set rn (or (sll rm 16) (srl rn 16))))
-diff -Nur binutils-2.24.orig/cgen/cpu/sh64-media.cpu binutils-2.24/cgen/cpu/sh64-media.cpu
---- binutils-2.24.orig/cgen/cpu/sh64-media.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/sh64-media.cpu 2016-06-30 21:26:12.641892646 +0200
-@@ -0,0 +1,1863 @@
-+; SuperH SHmedia instruction set description. -*- Scheme -*-
-+; Copyright (C) 2000, 2001 Red Hat, Inc.
-+; Copyright (C) 2002 SuperH Ltd
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; dshmf -- define-normal-sh-media-field
-+
-+(define-pmacro (dshmf xname xcomment ignored xstart xlength)
-+ (dnf xname xcomment ((ISA media)) xstart xlength))
-+
-+; dshmop -- define-normal-sh-media-operand
-+
-+(define-pmacro (dshmop xname xcomment ignored xhardware xfield)
-+ (dnop xname xcomment ((ISA media)) xhardware xfield))
-+
-+; dnshmi -- define-normal-sh-media-insn
-+
-+(define-pmacro (dshmi xname xcomment xattrs xsyntax xformat xsemantics)
-+ (define-insn
-+ (name xname)
-+ (comment xcomment)
-+ (.splice attrs (.unsplice xattrs) (ISA media))
-+ (syntax xsyntax)
-+ (format xformat)
-+ (semantics xsemantics)))
-+
-+; Saturation functions.
-+; Force a value `i' into words `n' bits wide.
-+; See SuperH (SH) 64 bit RISC Series / SH-5 CPU Core, Volume 2,
-+; page 11 for details. (page number refers to 05-CC-10002 V1.0).
-+
-+; saturate -- signed saturatation function
-+
-+(define-pmacro (saturate mode n i)
-+ (if mode (lt i (neg DI (sll DI 1 (sub n 1))))
-+ (neg (sll mode 1 (sub n 1)))
-+ (if mode (lt i (sll DI 1 (sub n 1)))
-+ i
-+ (sub mode (sll mode 1 (sub n 1)) 1))))
-+
-+; usaturate -- unsigned saturation function
-+
-+(define-pmacro (usaturate mode n i)
-+ (if mode (lt i (const DI 0))
-+ (const mode 0)
-+ (if mode (lt i (sll DI 1 n))
-+ i
-+ (sub mode (sll mode 1 n) 1))))
-+
-+
-+; Ifields.
-+
-+(dshmf f-op "Opcode" () 31 6)
-+(dshmf f-ext "Extension opcode" () 19 4)
-+(dshmf f-rsvd "Reserved" (RESERVED) 3 4)
-+
-+(dshmf f-left "Left register" () 25 6)
-+(dshmf f-right "Right register" () 15 6)
-+(dshmf f-dest "Destination register" () 9 6)
-+
-+(define-multi-ifield
-+ (name f-left-right)
-+ (comment "Left and right matched register pair")
-+ (attrs (ISA media))
-+ (mode UINT)
-+ (subfields f-left f-right)
-+ (insert (sequence ()
-+ (set (ifield f-left)
-+ (and (ifield f-left-right) 63))
-+ (set (ifield f-right)
-+ (and (ifield f-left-right) 63))))
-+ (extract (set (ifield f-left-right) (ifield f-left)))
-+)
-+
-+(dshmf f-tra "Target register" () 6 3)
-+(dshmf f-trb "Target register" () 22 3)
-+(dshmf f-likely "Likely bit" () 9 1)
-+(dshmf f-25 "Three unused bits at bit 25" () 25 3)
-+(dshmf f-8-2 "Two unused bits at bit 8" () 8 2)
-+
-+(df f-imm6 "Immediate value (6 bits)" ((ISA media)) 15 6 INT #f #f)
-+(df f-imm10 "Immediate value (10 bits)" ((ISA media)) 19 10 INT #f #f)
-+(df f-imm16 "Immediate value (16 bits)" ((ISA media)) 25 16 INT #f #f)
-+
-+(dshmf f-uimm6 "Immediate value (6 bits)" () 15 6)
-+(dshmf f-uimm16 "Immediate value (16 bits)" () 25 16)
-+
-+; Various displacement fields.
-+; The 10 bit field, for example, has different scaling for displacements.
-+
-+(df f-disp6 "Displacement (6 bits)" ((ISA media)) 15 6 INT #f #f)
-+
-+(df f-disp6x32 "Displacement (6 bits)" ((ISA media)) 15 6 INT
-+ ((value pc) (sra SI value 5))
-+ ((value pc) (sll SI value 5)))
-+
-+(df f-disp10 "Displacement (10 bits)" ((ISA media)) 19 10 INT #f #f)
-+
-+(df f-disp10x8 "Displacement (10 bits)" ((ISA media)) 19 10 INT
-+ ((value pc) (sra SI value 3))
-+ ((value pc) (sll SI value 3)))
-+
-+(df f-disp10x4 "Displacement (10 bits)" ((ISA media)) 19 10 INT
-+ ((value pc) (sra SI value 2))
-+ ((value pc) (sll SI value 2)))
-+
-+(df f-disp10x2 "Displacement (10 bits)" ((ISA media)) 19 10 INT
-+ ((value pc) (sra SI value 1))
-+ ((value pc) (sll SI value 1)))
-+
-+(df f-disp16 "Displacement (16 bits)" ((ISA media) PCREL-ADDR) 25 16 INT
-+ ((value pc) (sra DI value 2))
-+ ((value pc) (add DI (sll DI value 2) pc)))
-+
-+
-+; Operands.
-+
-+(dshmop rm "Left general purpose reg" () h-gr f-left)
-+(dshmop rn "Right general purpose reg" () h-gr f-right)
-+(dshmop rd "Destination general purpose reg" () h-gr f-dest)
-+
-+(dshmop frg "Left single precision register" () h-fr f-left)
-+(dshmop frh "Right single precision register" () h-fr f-right)
-+(dshmop frf "Destination single precision reg" () h-fr f-dest)
-+(dshmop frgh "Single precision register pair" () h-fr f-left-right)
-+
-+(dshmop fpf "Pair of single precision registers" () h-fp f-dest)
-+
-+(dshmop fvg "Left single precision vector" () h-fv f-left)
-+(dshmop fvh "Right single precision vector" () h-fv f-right)
-+(dshmop fvf "Destination single precision vector" () h-fv f-dest)
-+(dshmop mtrxg "Left single precision matrix" () h-fmtx f-left)
-+
-+(dshmop drg "Left double precision register" () h-dr f-left)
-+(dshmop drh "Right double precision register" () h-dr f-right)
-+(dshmop drf "Destination double precision reg" () h-dr f-dest)
-+(dshmop drgh "Double precision register pair" () h-dr f-left-right)
-+
-+(dshmop fpscr "Floating point status register" () h-fpscr f-nil)
-+(dshmop crj "Control register j" () h-cr f-dest)
-+(dshmop crk "Control register k" () h-cr f-left)
-+
-+(dshmop tra "Target register a" () h-tr f-tra)
-+(dshmop trb "Target register b" () h-tr f-trb)
-+
-+(dshmop disp6 "Displacement (6 bits)" () h-sint f-disp6)
-+(dshmop disp6x32 "Displacement (6 bits, scale 32)" () h-sint f-disp6x32)
-+(dshmop disp10 "Displacement (10 bits)" () h-sint f-disp10)
-+(dshmop disp10x2 "Displacement (10 bits, scale 2)" () h-sint f-disp10x2)
-+(dshmop disp10x4 "Displacement (10 bits, scale 4)" () h-sint f-disp10x4)
-+(dshmop disp10x8 "Displacement (10 bits, scale 8)" () h-sint f-disp10x8)
-+(dshmop disp16 "Displacement (16 bits)" () h-sint f-disp16)
-+
-+(dshmop imm6 "Immediate (6 bits)" () h-sint f-imm6)
-+(dshmop imm10 "Immediate (10 bits)" () h-sint f-imm10)
-+(dshmop imm16 "Immediate (16 bits)" () h-sint f-imm16)
-+(dshmop uimm6 "Immediate (6 bits)" () h-uint f-uimm6)
-+(dshmop uimm16 "Unsigned immediate (16 bits)" () h-uint f-uimm16)
-+
-+; FIXME: provide these parse/print functions in `sh-media.opc'.
-+
-+(define-operand (name likely) (comment "Likely branch?") (attrs (ISA media))
-+ (type h-uint) (index f-likely) (handlers (parse "likely") (print "likely")))
-+
-+
-+; Instructions.
-+
-+(dshmi add "Add"
-+ ()
-+ "add $rm, $rn, $rd"
-+ (+ (f-op 0) rm (f-ext 9) rn rd (f-rsvd 0))
-+ (set rd (add rm rn)))
-+
-+(dshmi addl "Add long"
-+ ()
-+ "add.l $rm, $rn, $rd"
-+ (+ (f-op 0) rm (f-ext 8) rn rd (f-rsvd 0))
-+ (set rd (add (subword SI rm 1) (subword SI rn 1))))
-+
-+(dshmi addi "Add immediate"
-+ ()
-+ "addi $rm, $disp10, $rd"
-+ (+ (f-op 52) rm disp10 rd (f-rsvd 0))
-+ (set rd (add rm (ext DI disp10))))
-+
-+(dshmi addil "Add immediate long"
-+ ()
-+ "addi.l $rm, $disp10, $rd"
-+ (+ (f-op 53) rm disp10 rd (f-rsvd 0))
-+ (set rd (ext DI (add (ext SI disp10) (subword SI rm 1)))))
-+
-+(dshmi addzl "Add zero extended long"
-+ ()
-+ "addz.l $rm, $rn, $rd"
-+ (+ (f-op 0) rm (f-ext 12) rn rd (f-rsvd 0))
-+ (set rd (zext DI (add (subword SI rm 1) (subword SI rn 1)))))
-+
-+(dshmi alloco "Allocate operand cache block"
-+ ()
-+ "alloco $rm, $disp6x32"
-+ (+ (f-op 56) rm (f-ext 4) disp6x32 (f-dest 63) (f-rsvd 0))
-+ (unimp "alloco"))
-+
-+(dshmi and "AND"
-+ ()
-+ "and $rm, $rn, $rd"
-+ (+ (f-op 1) rm (f-ext 11) rn rd (f-rsvd 0))
-+ (set rd (and rm rn)))
-+
-+(dshmi andc "AND complement"
-+ ()
-+ "andc $rm, $rn, $rd"
-+ (+ (f-op 1) rm (f-ext 15) rn rd (f-rsvd 0))
-+ (set rd (and rm (inv rn))))
-+
-+(dshmi andi "AND immediate"
-+ ()
-+ "andi $rm, $disp10, $rd"
-+ (+ (f-op 54) rm disp10 rd (f-rsvd 0))
-+ (set rd (and rm (ext DI disp10))))
-+
-+(dshmi beq "Branch if equal"
-+ ()
-+ "beq$likely $rm, $rn, $tra"
-+ (+ (f-op 25) rm (f-ext 1) rn likely (f-8-2 0) tra (f-rsvd 0))
-+ (if (eq rm rn)
-+ (set pc tra)))
-+
-+(dshmi beqi "Branch if equal immediate"
-+ ()
-+ "beqi$likely $rm, $imm6, $tra"
-+ (+ (f-op 57) rm (f-ext 1) imm6 likely (f-8-2 0) tra (f-rsvd 0))
-+ (if (eq rm (ext DI imm6))
-+ (set pc tra)))
-+
-+(dshmi bge "Branch if greater than or equal"
-+ ()
-+ "bge$likely $rm, $rn, $tra"
-+ (+ (f-op 25) rm (f-ext 3) rn likely (f-8-2 0) tra (f-rsvd 0))
-+ (if (ge rm rn)
-+ (set pc tra)))
-+
-+(dshmi bgeu "Branch if greater than or equal (unsigned comparison)"
-+ ()
-+ "bgeu$likely $rm, $rn, $tra"
-+ (+ (f-op 25) rm (f-ext 11) rn likely (f-8-2 0) tra (f-rsvd 0))
-+ (if (geu rm rn)
-+ (set pc tra)))
-+
-+(dshmi bgt "Branch greater than"
-+ ()
-+ "bgt$likely $rm, $rn, $tra"
-+ (+ (f-op 25) rm (f-ext 7) rn likely (f-8-2 0) tra (f-rsvd 0))
-+ (if (gt rm rn)
-+ (set pc tra)))
-+
-+(dshmi bgtu "Branch greater than (unsigned comparison)"
-+ ()
-+ "bgtu$likely $rm, $rn, $tra"
-+ (+ (f-op 25) rm (f-ext 15) rn likely (f-8-2 0) tra (f-rsvd 0))
-+ (if (gtu rm rn)
-+ (set pc tra)))
-+
-+(dshmi blink "Branch and link"
-+ ()
-+ "blink $trb, $rd"
-+ (+ (f-op 17) (f-25 0) trb (f-ext 1) (f-right 63) rd (f-rsvd 0))
-+ (sequence ()
-+ (set rd (or (add pc 4) 1))
-+ (set pc trb)))
-+
-+(dshmi bne "Branch if not equal"
-+ ()
-+ "bne$likely $rm, $rn, $tra"
-+ (+ (f-op 25) rm (f-ext 5) rn likely (f-8-2 0) tra (f-rsvd 0))
-+ (if (ne rm rn)
-+ (set pc tra)))
-+
-+(dshmi bnei "Branch if not equal immediate"
-+ ()
-+ "bnei$likely $rm, $imm6, $tra"
-+ (+ (f-op 57) rm (f-ext 5) rn likely (f-8-2 0) tra (f-rsvd 0))
-+ (if (ne rm (ext DI imm6))
-+ (set pc tra)))
-+
-+(dshmi brk "Breakpoint instruction"
-+ ()
-+ "brk"
-+ (+ (f-op 27) (f-left 63) (f-ext 5) (f-right 63) (f-dest 63) (f-rsvd 0))
-+ (c-call "sh64_break" pc))
-+
-+(define-pmacro (-byterev-step)
-+ (sequence ()
-+ (set result (or (sll result 8) (and source 255)))
-+ (set source (srl source 8)))
-+)
-+
-+(dshmi byterev "Byte reverse"
-+ ()
-+ "byterev $rm, $rd"
-+ (+ (f-op 0) rm (f-ext 15) (f-right 63) rd (f-rsvd 0))
-+ (sequence ((DI source) (DI result))
-+ (set source rm)
-+ (set result 0)
-+ (-byterev-step)
-+ (-byterev-step)
-+ (-byterev-step)
-+ (-byterev-step)
-+ (-byterev-step)
-+ (-byterev-step)
-+ (-byterev-step)
-+ (-byterev-step)
-+ (set rd result)))
-+
-+(dshmi cmpeq "Compare equal"
-+ ()
-+ "cmpeq $rm, $rn, $rd"
-+ (+ (f-op 0) rm (f-ext 1) rn rd (f-rsvd 0))
-+ (set rd (if DI (eq rm rn) 1 0)))
-+
-+(dshmi cmpgt "Compare greater than"
-+ ()
-+ "cmpgt $rm, $rn, $rd"
-+ (+ (f-op 0) rm (f-ext 3) rn rd (f-rsvd 0))
-+ (set rd (if DI (gt rm rn) 1 0)))
-+
-+(dshmi cmpgtu "Compare greater than (unsigned comparison)"
-+ ()
-+ "cmpgtu $rm,$rn, $rd"
-+ (+ (f-op 0) rm (f-ext 7) rn rd (f-rsvd 0))
-+ (set rd (if DI (gtu rm rn) 1 0)))
-+
-+(dshmi cmveq "Conditional move if equal to zero"
-+ ()
-+ "cmveq $rm, $rn, $rd"
-+ (+ (f-op 8) rm (f-ext 1) rn rd (f-rsvd 0))
-+ (if (eq rm 0)
-+ (set rd rn)))
-+
-+(dshmi cmvne "Conditional move if not equal to zero"
-+ ()
-+ "cmvne $rm, $rn, $rd"
-+ (+ (f-op 8) rm (f-ext 5) rn rd (f-rsvd 0))
-+ (if (ne rm 0)
-+ (set rd rn)))
-+
-+(dshmi fabsd "Floating point absolute (double)"
-+ ()
-+ "fabs.d $drgh, $drf"
-+ (+ (f-op 6) drgh (f-ext 1) drf (f-rsvd 0))
-+ (set drf (c-call DF "sh64_fabsd" drgh)))
-+
-+(dshmi fabss "Floating point absolute (single)"
-+ ()
-+ "fabs.s $frgh, $frf"
-+ (+ (f-op 6) frgh (f-ext 0) frf (f-rsvd 0))
-+ (set frf (c-call SF "sh64_fabss" frgh)))
-+
-+(dshmi faddd "Floating point add (double)"
-+ ()
-+ "fadd.d $drg, $drh, $drf"
-+ (+ (f-op 13) drg (f-ext 1) drh drf (f-rsvd 0))
-+ (set drf (c-call DF "sh64_faddd" drg drh)))
-+
-+(dshmi fadds "Floating point add (single)"
-+ ()
-+ "fadd.s $frg, $frh, $frf"
-+ (+ (f-op 13) frg (f-ext 0) frh frf (f-rsvd 0))
-+ (set frf (c-call SF "sh64_fadds" frg frh)))
-+
-+(dshmi fcmpeqd "Floating point compare if equal (double)"
-+ ()
-+ "fcmpeq.d $drg, $drh, $rd"
-+ (+ (f-op 12) drg (f-ext 9) drh rd (f-rsvd 0))
-+ (set rd (zext DI (c-call BI "sh64_fcmpeqd" drg drh))))
-+
-+(dshmi fcmpeqs "Floating point compare if equal (single)"
-+ ()
-+ "fcmpeq.s $frg, $frh, $rd"
-+ (+ (f-op 12) frg (f-ext 8) frh rd (f-rsvd 0))
-+ (set rd (zext DI (c-call BI "sh64_fcmpeqs" frg frh))))
-+
-+(dshmi fcmpged "Floating compare compare if greater than or equal (double)"
-+ ()
-+ "fcmpge.d $drg, $drh, $rd"
-+ (+ (f-op 12) drg (f-ext 15) drh rd (f-rsvd 0))
-+ (set rd (zext DI (c-call BI "sh64_fcmpged" drg drh))))
-+
-+(dshmi fcmpges "Floating point compare if greater than or equal (single)"
-+ ()
-+ "fcmpge.s $frg, $frh, $rd"
-+ (+ (f-op 12) frg (f-ext 14) frh rd (f-rsvd 0))
-+ (set rd (zext DI (c-call BI "sh64_fcmpges" frg frh))))
-+
-+(dshmi fcmpgtd "Floating point compare if greater than (double)"
-+ ()
-+ "fcmpgt.d $drg, $drh, $rd"
-+ (+ (f-op 12) drg (f-ext 13) drh rd (f-rsvd 0))
-+ (set rd (zext DI (c-call BI "sh64_fcmpgtd" drg drh))))
-+
-+(dshmi fcmpgts "Floating point compare if greater than (single)"
-+ ()
-+ "fcmpgt.s $frg, $frh, $rd"
-+ (+ (f-op 12) frg (f-ext 12) frh rd (f-rsvd 0))
-+ (set rd (zext DI (c-call BI "sh64_fcmpgts" frg frh))))
-+
-+(dshmi fcmpund "Floating point unordered comparison (double)"
-+ ()
-+ "fcmpun.d $drg, $drh, $rd"
-+ (+ (f-op 12) drg (f-ext 11) drh rd (f-rsvd 0))
-+ (set rd (zext DI (c-call BI "sh64_fcmpund" drg drh))))
-+
-+(dshmi fcmpuns "Floating point unordered comparison (single)"
-+ ()
-+ "fcmpun.s $frg, $frh, $rd"
-+ (+ (f-op 12) frg (f-ext 10) frh rd (f-rsvd 0))
-+ (set rd (zext DI (c-call BI "sh64_fcmpuns" frg frh))))
-+
-+(dshmi fcnvds "Floating point coversion (double to single)"
-+ ()
-+ "fcnv.ds $drgh, $frf"
-+ (+ (f-op 14) drgh (f-ext 7) frf (f-rsvd 0))
-+ (set frf (c-call SF "sh64_fcnvds" drgh)))
-+
-+(dshmi fcnvsd "Floating point conversion (single to double)"
-+ ()
-+ "fcnv.sd $frgh, $drf"
-+ (+ (f-op 14) frgh (f-ext 6) drf (f-rsvd 0))
-+ (set drf (c-call DF "sh64_fcnvsd" frgh)))
-+
-+(dshmi fdivd "Floating point divide (double)"
-+ ()
-+ "fdiv.d $drg, $drh, $drf"
-+ (+ (f-op 13) drg (f-ext 5) drh drf (f-rsvd 0))
-+ (set drf (c-call DF "sh64_fdivd" drg drh)))
-+
-+(dshmi fdivs "Floating point divide (single)"
-+ ()
-+ "fdiv.s $frg, $frh, $frf"
-+ (+ (f-op 13) frg (f-ext 4) frh frf (f-rsvd 0))
-+ (set frf (c-call SF "sh64_fdivs" frg frh)))
-+
-+(dshmi fgetscr "Floating point get from FPSCR"
-+ ()
-+ "fgetscr $frf"
-+ (+ (f-op 7) (f-left 63) (f-ext 2) (f-right 63) frf (f-rsvd 0))
-+ (unimp "fputscr"))
-+ ; FIXME: this should work!
-+ ; (set frf fpscr))
-+
-+(dshmi fiprs "Floating point inner product (single)"
-+ ()
-+ "fipr.s $fvg, $fvh, $frf"
-+ (+ (f-op 5) fvg (f-ext 6) fvh frf (f-rsvd 0))
-+ (sequence ((UQI g) (UQI h) (SF temp))
-+ (set g (index-of fvg))
-+ (set h (index-of fvh))
-+ (set temp (c-call SF "sh64_fmuls" (reg h-fr g) (reg h-fr h)))
-+ (set temp (c-call SF "sh64_fadds" temp
-+ (c-call SF "sh64_fmuls" (reg h-fr (add g 1)) (reg h-fr (add h 1)))))
-+ (set temp (c-call SF "sh64_fadds" temp
-+ (c-call SF "sh64_fmuls" (reg h-fr (add g 2)) (reg h-fr (add h 2)))))
-+ (set temp (c-call SF "sh64_fadds" temp
-+ (c-call SF "sh64_fmuls" (reg h-fr (add g 3)) (reg h-fr (add h 3)))))
-+ (set frf temp)))
-+
-+(dshmi fldd "Floating point load (double)"
-+ ()
-+ "fld.d $rm, $disp10x8, $drf"
-+ (+ (f-op 39) rm disp10x8 drf (f-rsvd 0))
-+ (set drf (mem DF (add rm disp10x8))))
-+
-+(dshmi fldp "Floating point load (pair of singles)"
-+ ()
-+ "fld.p $rm, $disp10x8, $fpf"
-+ (+ (f-op 38) rm disp10x8 fpf (f-rsvd 0))
-+ (sequence ((QI f))
-+ (set f (index-of fpf))
-+ (set (reg h-fr f) (mem SF (add rm disp10x8)))
-+ (set (reg h-fr (add f 1)) (mem SF (add rm (add disp10x8 4))))))
-+
-+(dshmi flds "Floating point load (single)"
-+ ()
-+ "fld.s $rm, $disp10x4, $frf"
-+ (+ (f-op 37) rm disp10x4 frf (f-rsvd 0))
-+ (set frf (mem SF (add rm disp10x4))))
-+
-+(dshmi fldxd "Floating point extended load (double)"
-+ ()
-+ "fldx.d $rm, $rn, $drf"
-+ (+ (f-op 7) rm (f-ext 9) rn frf (f-rsvd 0))
-+ (set drf (mem DF (add rm rn))))
-+
-+(dshmi fldxp "Floating point extended load (pair of singles)"
-+ ()
-+ "fldx.p $rm, $rn, $fpf"
-+ (+ (f-op 7) rm (f-ext 13) rn fpf (f-rsvd 0))
-+ (sequence ((QI f))
-+ (set f (index-of fpf))
-+ (set (reg h-fr f) (mem SF (add rm rn)))
-+ (set (reg h-fr (add f 1)) (mem SF (add rm (add rn 4))))))
-+
-+(dshmi fldxs "Floating point extended load (single)"
-+ ()
-+ "fldx.s $rm, $rn, $frf"
-+ (+ (f-op 7) rm (f-ext 8) rn frf (f-rsvd 0))
-+ (set frf (mem SF (add rm rn))))
-+
-+(dshmi floatld "Floating point conversion (long to double)"
-+ ()
-+ "float.ld $frgh, $drf"
-+ (+ (f-op 14) frgh (f-ext 14) drf (f-rsvd 0))
-+ (set drf (c-call DF "sh64_floatld" frgh)))
-+
-+(dshmi floatls "Floating point conversion (long to single)"
-+ ()
-+ "float.ls $frgh, $frf"
-+ (+ (f-op 14) frgh (f-ext 12) frf (f-rsvd 0))
-+ (set frf (c-call SF "sh64_floatls" frgh)))
-+
-+(dshmi floatqd "Floating point conversion (quad to double)"
-+ ()
-+ "float.qd $drgh, $drf"
-+ (+ (f-op 14) drgh (f-ext 13) drf (f-rsvd 0))
-+ (set drf (c-call DF "sh64_floatqd" drgh)))
-+
-+(dshmi floatqs "Floating point conversion (quad to single)"
-+ ()
-+ "float.qs $drgh, $frf"
-+ (+ (f-op 14) drgh (f-ext 15) frf (f-rsvd 0))
-+ (set frf (c-call SF "sh64_floatqs" drgh)))
-+
-+(dshmi fmacs "Floating point multiply and accumulate (single)"
-+ ()
-+ "fmac.s $frg, $frh, $frf"
-+ (+ (f-op 13) frg (f-ext 14) frh frf (f-rsvd 0))
-+ (set frf (c-call SF "sh64_fadds" frf (c-call SF "sh64_fmuls" frg frh))))
-+
-+(dshmi fmovd "Floating point move double"
-+ ()
-+ "fmov.d $drgh, $drf"
-+ (+ (f-op 14) drgh (f-ext 1) drf (f-rsvd 0))
-+ (set drf drgh))
-+
-+(dshmi fmovdq "Floating point move (double to quad integer)"
-+ ()
-+ "fmov.dq $drgh, $rd"
-+ (+ (f-op 12) drgh (f-ext 1) rd (f-rsvd 0))
-+ (set rd (subword DI drgh 0)))
-+
-+(dshmi fmovls "Floating point move (lower to single)"
-+ ()
-+ "fmov.ls $rm, $frf"
-+ (+ (f-op 7) rm (f-ext 0) (f-right 63) frf (f-rsvd 0))
-+ (set frf (subword SF (subword SI rm 1) 0)))
-+
-+(dshmi fmovqd "Floating point move (quad to double)"
-+ ()
-+ "fmov.qd $rm, $drf"
-+ (+ (f-op 7) rm (f-ext 1) (f-right 63) frf (f-rsvd 0))
-+ (set drf (subword DF rm 0)))
-+
-+(dshmi fmovs "Floating point move (single)"
-+ ()
-+ "fmov.s $frgh, $frf"
-+ (+ (f-op 14) frgh (f-ext 0) frf (f-rsvd 0))
-+ (set frf frgh))
-+
-+(dshmi fmovsl "Floating point move (single to lower)"
-+ ()
-+ "fmov.sl $frgh, $rd"
-+ (+ (f-op 12) frgh (f-ext 0) rd (f-rsvd 0))
-+ (set rd (ext DI (subword SI frgh 1))))
-+
-+(dshmi fmuld "Floating point multiply (double)"
-+ ()
-+ "fmul.d $drg, $drh, $drf"
-+ (+ (f-op 13) drg (f-ext 7) drh drf (f-rsvd 0))
-+ (set drf (c-call DF "sh64_fmuld" drg drh)))
-+
-+(dshmi fmuls "Floating point multiply (single)"
-+ ()
-+ "fmul.s $frg, $frh, $frf"
-+ (+ (f-op 13) frg (f-ext 6) frh frf (f-rsvd 0))
-+ (set frf (c-call SF "sh64_fmuls" frg frh)))
-+
-+(dshmi fnegd "Floating point negate (double)"
-+ ()
-+ "fneg.d $drgh, $drf"
-+ (+ (f-op 6) drgh (f-ext 3) drf (f-rsvd 0))
-+ (set drf (c-call DF "sh64_fnegd" drgh)))
-+
-+(dshmi fnegs "Floating point negate (single)"
-+ ()
-+ "fneg.s $frgh, $frf"
-+ (+ (f-op 6) frgh (f-ext 2) frf (f-rsvd 0))
-+ (set frf (c-call SF "sh64_fnegs" frgh)))
-+
-+(dshmi fputscr "Floating point put to FPSCR"
-+ ()
-+ "fputscr $frgh"
-+ (+ (f-op 12) frgh (f-ext 2) (f-dest 63) (f-rsvd 0))
-+ (unimp "fputscr"))
-+ ; FIXME: this should work!
-+ ; (set fpscr (subword SI frgh 0)))
-+
-+(dshmi fsqrtd "Floating point square root (double)"
-+ ()
-+ "fsqrt.d $drgh, $drf"
-+ (+ (f-op 14) drgh (f-ext 5) drf (f-rsvd 0))
-+ (set drf (c-call DF "sh64_fsqrtd" drgh)))
-+
-+(dshmi fsqrts "Floating point squart root (single)"
-+ ()
-+ "fsqrt.s $frgh, $frf"
-+ (+ (f-op 14) frgh (f-ext 4) frf (f-rsvd 0))
-+ (set frf (c-call SF "sh64_fsqrts" frgh)))
-+
-+(dshmi fstd "Floating point store (double)"
-+ ()
-+ "fst.d $rm, $disp10x8, $drf"
-+ (+ (f-op 47) rm disp10x8 drf (f-rsvd 0))
-+ (set (mem DF (add rm disp10x8)) drf))
-+
-+(dshmi fstp "Floating point store (pair of singles)"
-+ ()
-+ "fst.p $rm, $disp10x8, $fpf"
-+ (+ (f-op 46) rm disp10x8 fpf (f-rsvd 0))
-+ (sequence ((QI f))
-+ (set f (index-of fpf))
-+ (set (mem SF (add rm disp10x8)) (reg h-fr f))
-+ (set (mem SF (add rm (add disp10x8 4))) (reg h-fr (add f 1)))))
-+
-+(dshmi fsts "Floating point store (single)"
-+ ()
-+ "fst.s $rm, $disp10x4, $frf"
-+ (+ (f-op 45) rm disp10x4 frf (f-rsvd 0))
-+ (set (mem SF (add rm disp10x4)) frf))
-+
-+(dshmi fstxd "Floating point extended store (double)"
-+ ()
-+ "fstx.d $rm, $rn, $drf"
-+ (+ (f-op 15) rm (f-ext 9) rn drf (f-rsvd 0))
-+ (set (mem DF (add rm rn)) drf))
-+
-+(dshmi fstxp "Floating point extended store (pair of singles)"
-+ ()
-+ "fstx.p $rm, $rn, $fpf"
-+ (+ (f-op 15) rm (f-ext 13) rn fpf (f-rsvd 0))
-+ (sequence ((QI f))
-+ (set f (index-of fpf))
-+ (set (mem SF (add rm rn)) (reg h-fr f))
-+ (set (mem SF (add rm (add rn 4))) (reg h-fr (add f 1)))))
-+
-+(dshmi fstxs "Floating point extended store (single)"
-+ ()
-+ "fstx.s $rm, $rn, $frf"
-+ (+ (f-op 15) rm (f-ext 8) rn frf (f-rsvd 0))
-+ (set (mem SF (add rm rn)) frf))
-+
-+(dshmi fsubd "Floating point subtract (double)"
-+ ()
-+ "fsub.d $drg, $drh, $drf"
-+ (+ (f-op 13) frg (f-ext 3) frh frf (f-rsvd 0))
-+ (set drf (c-call DF "sh64_fsubd" drg drh)))
-+
-+(dshmi fsubs "Floating point subtract (single)"
-+ ()
-+ "fsub.s $frg, $frh, $frf"
-+ (+ (f-op 13) frg (f-ext 2) frh frf (f-rsvd 0))
-+ (set frf (c-call SF "sh64_fsubs" frg frh)))
-+
-+(dshmi ftrcdl "Floating point conversion (double to long)"
-+ ()
-+ "ftrc.dl $drgh, $frf"
-+ (+ (f-op 14) drgh (f-ext 11) frf (f-rsvd 0))
-+ (set frf (c-call SF "sh64_ftrcdl" drgh)))
-+
-+(dshmi ftrcsl "Floating point conversion (single to long)"
-+ ()
-+ "ftrc.sl $frgh, $frf"
-+ (+ (f-op 14) frgh (f-ext 8) frf (f-rsvd 0))
-+ (set frf (c-call SF "sh64_ftrcsl" frgh)))
-+
-+(dshmi ftrcdq "Floating point conversion (double to quad)"
-+ ()
-+ "ftrc.dq $drgh, $drf"
-+ (+ (f-op 14) drgh (f-ext 9) frf (f-rsvd 0))
-+ (set drf (c-call DF "sh64_ftrcdq" drgh)))
-+
-+(dshmi ftrcsq "Floating point conversion (single to quad)"
-+ ()
-+ "ftrc.sq $frgh, $drf"
-+ (+ (f-op 14) frgh (f-ext 10) drf (f-rsvd 0))
-+ (set drf (c-call DF "sh64_ftrcsq" frgh)))
-+
-+(dshmi ftrvs "Floating point matrix multiply"
-+ ()
-+ "ftrv.s $mtrxg, $fvh, $fvf"
-+ (+ (f-op 5) mtrxg (f-ext 14) fvh fvf (f-rsvd 0))
-+ (c-call "sh64_ftrvs" (index-of mtrxg) (index-of fvh) (index-of fvf)))
-+
-+(dshmi getcfg "Get configuration register"
-+ ()
-+ "getcfg $rm, $disp6, $rd"
-+ (+ (f-op 48) rm (f-ext 15) disp6 rd (f-rsvd 0))
-+ (unimp "getcfg"))
-+
-+(dshmi getcon "Get control register"
-+ ()
-+ "getcon $crk, $rd"
-+ (+ (f-op 9) crk (f-ext 15) (f-right 63) rd (f-rsvd 0))
-+ (set rd crk))
-+
-+(dshmi gettr "Get target register"
-+ ()
-+ "gettr $trb, $rd"
-+ (+ (f-op 17) (f-25 0) trb (f-ext 5) (f-right 63) rd (f-rsvd 0))
-+ (set rd trb))
-+
-+(dshmi icbi "Invalidate instruction cache block"
-+ ()
-+ "icbi $rm, $disp6x32"
-+ (+ (f-op 56) rm (f-ext 5) disp6x32 (f-dest 63) (f-rsvd 0))
-+ (unimp "icbi"))
-+
-+(dshmi ldb "Load byte"
-+ ()
-+ "ld.b $rm, $disp10, $rd"
-+ (+ (f-op 32) rm disp10 rd (f-rsvd 0))
-+ (set rd (ext DI (mem QI (add rm (ext DI disp10))))))
-+
-+(dshmi ldl "Load long word"
-+ ()
-+ "ld.l $rm, $disp10x4, $rd"
-+ (+ (f-op 34) rm disp10x4 rd (f-rsvd 0))
-+ (set rd (ext DI (mem SI (add rm (ext DI disp10x4))))))
-+
-+(dshmi ldq "Load quad word"
-+ ()
-+ "ld.q $rm, $disp10x8, $rd"
-+ (+ (f-op 35) rm disp10x8 rd (f-rsvd 0))
-+ (set rd (mem DI (add rm (ext DI disp10x8)))))
-+
-+(dshmi ldub "Load unsigned byte"
-+ ()
-+ "ld.ub $rm, $disp10, $rd"
-+ (+ (f-op 36) rm disp10 rd (f-rsvd 0))
-+ (set rd (zext DI (mem QI (add rm (ext DI disp10))))))
-+
-+(dshmi lduw "Load unsigned word"
-+ ()
-+ "ld.uw $rm, $disp10x2, $rd"
-+ (+ (f-op 44) rm disp10 rd (f-rsvd 0))
-+ (set rd (zext DI (mem HI (add rm (ext DI disp10x2))))))
-+
-+(dshmi ldw "Load word"
-+ ()
-+ "ld.w $rm, $disp10x2, $rd"
-+ (+ (f-op 33) rm disp10 rd (f-rsvd 0))
-+ (set rd (ext DI (mem HI (add rm (ext DI disp10x2))))))
-+
-+(define-pmacro (-ldhi-byte)
-+ (if (and bytecount 1)
-+ (set val (add (sll val 8) (zext DI (mem QI addr))))))
-+
-+(define-pmacro (-ldhi-word)
-+ (if (and bytecount 2)
-+ (set val (add (sll val 16) (zext DI (mem HI (and addr -4)))))))
-+
-+(define-pmacro (-ldhi-long)
-+ (if (and bytecount 4)
-+ (set val (add (sll val 32) (zext DI (mem SI (and addr -8)))))))
-+
-+(dshmi ldhil "Load high part (long word)"
-+ ()
-+ "ldhi.l $rm, $disp6, $rd"
-+ (+ (f-op 48) rm (f-ext 6) disp6 rd (f-rsvd 0))
-+ (sequence ((DI addr) (QI bytecount) (SI val))
-+ (set addr (add rm disp6))
-+ (set bytecount (add (and addr 3) 1))
-+ (set val 0)
-+ (if (and bytecount 4)
-+ (set rd (ext DI (mem SI (and addr -4))))
-+ (if endian
-+ (sequence () ; Big endian.
-+ (-ldhi-word)
-+ (-ldhi-byte)
-+ (set rd (ext DI val)))
-+ (sequence () ; Little endian.
-+ (-ldhi-byte)
-+ (-ldhi-word)
-+ (set rd
-+ (ext DI
-+ (sll SI val
-+ (sub 32 (mul 8 bytecount))))))))))
-+
-+(dshmi ldhiq "Load high part (quad word)"
-+ ()
-+ "ldhi.q $rm, $disp6, $rd"
-+ (+ (f-op 48) rm (f-ext 7) disp6 rd (f-rsvd 0))
-+ (sequence ((DI addr) (QI bytecount) (DI val))
-+ (set addr (add rm disp6))
-+ (set bytecount (add (and addr 7) 1))
-+ (set val 0)
-+ (if (and bytecount 8)
-+ (set rd (mem DI (and addr -8)))
-+ (if endian
-+ (sequence () ; Big endian.
-+ (-ldhi-long)
-+ (-ldhi-word)
-+ (-ldhi-byte)
-+ (set rd val))
-+ (sequence () ; Little endian.
-+ (-ldhi-byte)
-+ (-ldhi-word)
-+ (-ldhi-long)
-+ (set rd
-+ (sll val
-+ (sub 64 (mul 8 bytecount)))))))))
-+
-+(define-pmacro (-ldlo-byte)
-+ (if (and bytecount 1)
-+ (set val (add (sll val 8) (zext DI (mem QI addr))))))
-+
-+(define-pmacro (-ldlo-word)
-+ (if (and bytecount 2)
-+ (set val (add (sll val 16) (zext DI (mem HI (and (add addr 1) -2)))))))
-+
-+(define-pmacro (-ldlo-long)
-+ (if (and bytecount 4)
-+ (set val (add (sll val 32) (zext DI (mem SI (and (add addr 3) -4)))))))
-+
-+(dshmi ldlol "Load low part (long word)"
-+ ()
-+ "ldlo.l $rm, $disp6, $rd"
-+ (+ (f-op 48) rm (f-ext 2) disp6 rd (f-rsvd 0))
-+ (sequence ((DI addr) (QI bytecount) (SI val))
-+ (set addr (add rm disp6))
-+ (set bytecount (sub 4 (and addr 3)))
-+ (set val 0)
-+ (if (and bytecount 4)
-+ (set rd (ext DI (mem SI addr)))
-+ (if endian
-+ (sequence () ; Big endian.
-+ (-ldlo-byte)
-+ (-ldlo-word)
-+ (set rd
-+ (ext DI
-+ (sll SI val
-+ (sub 32 (mul 8 bytecount))))))
-+ (sequence () ; Little endian.
-+ (-ldlo-word)
-+ (-ldlo-byte)
-+ (set rd (ext DI val)))))))
-+
-+(dshmi ldloq "Load low part (quad word)"
-+ ()
-+ "ldlo.q $rm, $disp6, $rd"
-+ (+ (f-op 48) rm (f-ext 3) disp6 rd (f-rsvd 0))
-+ (sequence ((DI addr) (QI bytecount) (DI val))
-+ (set addr (add rm disp6))
-+ (set bytecount (sub 8 (and addr 7)))
-+ (set val 0)
-+ (if (and bytecount 8)
-+ (set rd (mem DI addr))
-+ (if endian
-+ (sequence () ; Big endian.
-+ (-ldlo-byte)
-+ (-ldlo-word)
-+ (-ldlo-long)
-+ (set rd
-+ (sll val (sub 64 (mul 8 bytecount)))))
-+ (sequence () ; Little endian.
-+ (-ldlo-long)
-+ (-ldlo-word)
-+ (-ldlo-byte)
-+ (set rd val))))))
-+
-+(dshmi ldxb "Load byte (extended displacement)"
-+ ()
-+ "ldx.b $rm, $rn, $rd"
-+ (+ (f-op 16) rm (f-ext 0) rn rd (f-rsvd 0))
-+ (set rd (ext DI (mem QI (add rm rn)))))
-+
-+(dshmi ldxl "Load long word (extended displacement)"
-+ ()
-+ "ldx.l $rm, $rn, $rd"
-+ (+ (f-op 16) rm (f-ext 2) rn rd (f-rsvd 0))
-+ (set rd (ext DI (mem SI (add rm rn)))))
-+
-+(dshmi ldxq "Load quad word (extended displacement)"
-+ ()
-+ "ldx.q $rm, $rn, $rd"
-+ (+ (f-op 16) rm (f-ext 3) rn rd (f-rsvd 0))
-+ (set rd (mem DI (add rm rn))))
-+
-+(dshmi ldxub "Load unsigned byte (extended displacement)"
-+ ()
-+ "ldx.ub $rm, $rn, $rd"
-+ (+ (f-op 16) rm (f-ext 4) rn rd (f-rsvd 0))
-+ (set rd (zext DI (mem UQI (add rm rn)))))
-+
-+(dshmi ldxuw "Load unsigned word (extended displacement)"
-+ ()
-+ "ldx.uw $rm, $rn, $rd"
-+ (+ (f-op 16) rm (f-ext 5) rn rd (f-rsvd 0))
-+ (set rd (zext DI (mem UHI (add rm rn)))))
-+
-+(dshmi ldxw "Load word (extended displacement)"
-+ ()
-+ "ldx.w $rm, $rn, $rd"
-+ (+ (f-op 16) rm (f-ext 1) rn rd (f-rsvd 0))
-+ (set rd (ext DI (mem HI (add rm rn)))))
-+
-+
-+; Macros to facilitate multimedia instructions.
-+
-+(define-pmacro (slice-byte expr)
-+ (sequence ((QI result7) (QI result6) (QI result5) (QI result4)
-+ (QI result3) (QI result2) (QI result1) (QI result0))
-+ (set result0 (expr (subword QI rm 7) (subword QI rn 7)))
-+ (set result1 (expr (subword QI rm 6) (subword QI rn 6)))
-+ (set result2 (expr (subword QI rm 5) (subword QI rn 5)))
-+ (set result3 (expr (subword QI rm 4) (subword QI rn 4)))
-+ (set result4 (expr (subword QI rm 3) (subword QI rn 3)))
-+ (set result5 (expr (subword QI rm 2) (subword QI rn 2)))
-+ (set result6 (expr (subword QI rm 1) (subword QI rn 1)))
-+ (set result7 (expr (subword QI rm 0) (subword QI rn 0)))
-+ (set rd (-join-qi result7 result6 result5 result4 result3 result2
-+ result1 result0))))
-+
-+(define-pmacro (slice-word expr)
-+ (sequence ((HI result3) (HI result2) (HI result1) (HI result0))
-+ (set result0 (expr (subword HI rm 3) (subword HI rn 3)))
-+ (set result1 (expr (subword HI rm 2) (subword HI rn 2)))
-+ (set result2 (expr (subword HI rm 1) (subword HI rn 1)))
-+ (set result3 (expr (subword HI rm 0) (subword HI rn 0)))
-+ (set rd (-join-hi result3 result2 result1 result0))))
-+
-+(define-pmacro (slice-word-unop expr)
-+ (sequence ((HI result3) (HI result2) (HI result1) (HI result0))
-+ (set result0 (expr (subword HI rm 3)))
-+ (set result1 (expr (subword HI rm 2)))
-+ (set result2 (expr (subword HI rm 1)))
-+ (set result3 (expr (subword HI rm 0)))
-+ (set rd (-join-hi result3 result2 result1 result0))))
-+
-+(define-pmacro (slice-long expr)
-+ (sequence ((SI result1) (SI result0))
-+ (set result0 (expr (subword SI rm 1) (subword SI rn 1)))
-+ (set result1 (expr (subword SI rm 0) (subword SI rn 0)))
-+ (set rd (-join-si result1 result0))))
-+
-+(define-pmacro (slice-long-unop expr)
-+ (sequence ((SI result1) (SI result0))
-+ (set result0 (expr (subword SI rm 1)))
-+ (set result1 (expr (subword SI rm 0)))
-+ (set rd (-join-si result1 result0))))
-+
-+; Multimedia instructions.
-+
-+(dshmi mabsl "Multimedia absolute value (long word)"
-+ ()
-+ "mabs.l $rm, $rd"
-+ (+ (f-op 10) rm (f-ext 10) (f-right 63) rd (f-rsvd 0))
-+ (slice-long-unop abs))
-+
-+(dshmi mabsw "Multimedia absolute value (word)"
-+ ()
-+ "mabs.w $rm, $rd"
-+ (+ (f-op 10) rm (f-ext 9) (f-right 63) rd (f-rsvd 0))
-+ (slice-word-unop abs))
-+
-+(dshmi maddl "Multimedia add (long word)"
-+ ()
-+ "madd.l $rm, $rn, $rd"
-+ (+ (f-op 2) rm (f-ext 2) rn rd (f-rsvd 0))
-+ (slice-long add))
-+
-+(dshmi maddw "Multimedia add (word)"
-+ ()
-+ "madd.w $rm, $rn, $rd"
-+ (+ (f-op 2) rm (f-ext 1) rn rd (f-rsvd 0))
-+ (slice-word add))
-+
-+(define-pmacro (-maddsl arg1 arg2) (saturate SI 32 (add (ext DI arg1)
-+ (ext DI arg2))))
-+(dshmi maddsl "Multimedia add (saturating, long word)"
-+ ()
-+ "madds.l $rm, $rn, $rd"
-+ (+ (f-op 2) rm (f-ext 6) rn rd (f-rsvd 0))
-+ (slice-long -maddsl))
-+
-+(define-pmacro (-maddsub arg1 arg2) (usaturate QI 8 (add (zext DI arg1)
-+ (zext DI arg2))))
-+(dshmi maddsub "Multimedia add (saturating, unsigned byte)"
-+ ()
-+ "madds.ub $rm, $rn, $rd"
-+ (+ (f-op 2) rm (f-ext 4) rn rd (f-rsvd 0))
-+ (slice-byte -maddsub))
-+
-+(define-pmacro (-maddsw arg1 arg2) (saturate HI 16 (add (ext DI arg1)
-+ (ext DI arg2))))
-+(dshmi maddsw "Multimedia add (saturating, word)"
-+ ()
-+ "madds.w $rm, $rn, $rd"
-+ (+ (f-op 2) rm (f-ext 5) rn rd (f-rsvd 0))
-+ (slice-word -maddsw))
-+
-+(define-pmacro (-mcmpeq mode arg1 arg2)
-+ (if mode (eq arg1 arg2) (inv mode 0) (const mode 0)))
-+
-+(define-pmacro (-mcmpeqb arg1 arg2) (-mcmpeq QI arg1 arg2))
-+(dshmi mcmpeqb "Multimedia compare equal (byte)"
-+ ()
-+ "mcmpeq.b $rm, $rn, $rd"
-+ (+ (f-op 10) rm (f-ext 0) rn rd (f-rsvd 0))
-+ (slice-byte -mcmpeqb))
-+
-+(define-pmacro (-mcmpeql arg1 arg2) (-mcmpeq SI arg1 arg2))
-+(dshmi mcmpeql "Multimedia compare equal (long word)"
-+ ()
-+ "mcmpeq.l $rm, $rn, $rd"
-+ (+ (f-op 10) rm (f-ext 2) rn rd (f-rsvd 0))
-+ (slice-long -mcmpeql))
-+
-+(define-pmacro (-mcmpeqw arg1 arg2) (-mcmpeq HI arg1 arg2))
-+(dshmi mcmpeqw "Multimedia compare equal (word)"
-+ ()
-+ "mcmpeq.w $rm, $rn, $rd"
-+ (+ (f-op 10) rm (f-ext 1) rn rd (f-rsvd 0))
-+ (slice-word -mcmpeqw))
-+
-+(define-pmacro (-mcmpgt mode arg1 arg2)
-+ (if mode (gt arg1 arg2) (inv mode 0) (const mode 0)))
-+(define-pmacro (-mcmpgtu mode arg1 arg2)
-+ (if mode (gtu arg1 arg2) (inv mode 0) (const mode 0)))
-+
-+(define-pmacro (-mcmpgtl arg1 arg2) (-mcmpgt SI arg1 arg2))
-+(dshmi mcmpgtl "Multimedia compare greater than (long word)"
-+ ()
-+ "mcmpgt.l $rm, $rn, $rd"
-+ (+ (f-op 10) rm (f-ext 6) rn rd (f-rsvd 0))
-+ (slice-long -mcmpgtl))
-+
-+(define-pmacro (-mcmpgtub arg1 arg2) (-mcmpgtu QI arg1 arg2))
-+(dshmi mcmpgtub "Multimediate compare unsigned greater than (byte)"
-+ ()
-+ "mcmpgt.ub $rm, $rn, $rd"
-+ (+ (f-op 10) rm (f-ext 4) rn rd (f-rsvd 0))
-+ (slice-byte -mcmpgtub))
-+
-+(define-pmacro (-mcmpgtw arg1 arg2) (-mcmpgt HI arg1 arg2))
-+(dshmi mcmpgtw "Multimedia compare greater than (word)"
-+ ()
-+ "mcmpgt.w $rm, $rn, $rd"
-+ (+ (f-op 10) rm (f-ext 5) rn rd (f-rsvd 0))
-+ (slice-word -mcmpgtw))
-+
-+(dshmi mcmv "Multimedia conditional move"
-+ ()
-+ "mcmv $rm, $rn, $rd"
-+ (+ (f-op 18) rm (f-ext 3) rn rd (f-rsvd 0))
-+ (set rd (or (and rm rn) (and rd (inv rn)))))
-+
-+(dshmi mcnvslw "Multimedia convert/saturate (long to word)"
-+ ()
-+ "mcnvs.lw $rm, $rn, $rd"
-+ (+ (f-op 19) rm (f-ext 13) rn rd (f-rsvd 0))
-+ (sequence ((HI result3) (HI result2) (HI result1) (HI result0))
-+ (set result0 (saturate HI 16 (subword SI rm 1)))
-+ (set result1 (saturate HI 16 (subword SI rm 0)))
-+ (set result2 (saturate HI 16 (subword SI rn 1)))
-+ (set result3 (saturate HI 16 (subword SI rn 0)))
-+ (set rd (-join-hi result3 result2 result1 result0))))
-+
-+(dshmi mcnvswb "Multimedia convert/saturate (word to byte)"
-+ ()
-+ "mcnvs.wb $rm, $rn, $rd"
-+ (+ (f-op 19) rm (f-ext 8) rn rd (f-rsvd 0))
-+ (sequence ((QI result7) (QI result6) (QI result5) (QI result4)
-+ (QI result3) (QI result2) (QI result1) (QI result0))
-+ (set result0 (saturate QI 8 (subword HI rm 3)))
-+ (set result1 (saturate QI 8 (subword HI rm 2)))
-+ (set result2 (saturate QI 8 (subword HI rm 1)))
-+ (set result3 (saturate QI 8 (subword HI rm 0)))
-+ (set result4 (saturate QI 8 (subword HI rn 3)))
-+ (set result5 (saturate QI 8 (subword HI rn 2)))
-+ (set result6 (saturate QI 8 (subword HI rn 1)))
-+ (set result7 (saturate QI 8 (subword HI rn 0)))
-+ (set rd (-join-qi result7 result6 result5 result4
-+ result3 result2 result1 result0))))
-+
-+(dshmi mcnvswub "Multimedia convert/saturate (word to unsigned byte)"
-+ ()
-+ "mcnvs.wub $rm, $rn, $rd"
-+ (+ (f-op 19) rm (f-ext 12) rn rd (f-rsvd 0))
-+ (sequence ((QI result7) (QI result6) (QI result5) (QI result4)
-+ (QI result3) (QI result2) (QI result1) (QI result0))
-+ (set result0 (usaturate QI 8 (subword HI rm 3)))
-+ (set result1 (usaturate QI 8 (subword HI rm 2)))
-+ (set result2 (usaturate QI 8 (subword HI rm 1)))
-+ (set result3 (usaturate QI 8 (subword HI rm 0)))
-+ (set result4 (usaturate QI 8 (subword HI rn 3)))
-+ (set result5 (usaturate QI 8 (subword HI rn 2)))
-+ (set result6 (usaturate QI 8 (subword HI rn 1)))
-+ (set result7 (usaturate QI 8 (subword HI rn 0)))
-+ (set rd (-join-qi result7 result6 result5 result4 result3
-+ result2 result1 result0))))
-+
-+; mexter -- generate an mexterN instruction, where:
-+; op = primary opcode
-+; extop = extended opcode
-+
-+(define-pmacro (make-mextr n op extop)
-+ (dshmi (.sym mextr n)
-+ (.str "Multimedia extract 64-bit slice (from byte " n ")")
-+ ()
-+ (.str "mextr" n " $rm, $rn, $rd")
-+ (+ (f-op op) rm (f-ext extop) rn rd (f-rsvd 0))
-+ (sequence ((QI count) (DI mask) (DI rhs))
-+ (set count (mul QI 8 n))
-+ (set mask (sll DI (inv 0) count))
-+ (set rhs (srl (and rm mask) count))
-+ (set count (mul QI 8 (sub QI 8 n)))
-+ (set mask (srl DI (inv 0) count))
-+ (set rd (or DI rhs (sll DI (and rn mask) count))))))
-+
-+(make-mextr 1 10 7)
-+(make-mextr 2 10 11)
-+(make-mextr 3 10 15)
-+(make-mextr 4 11 3)
-+(make-mextr 5 11 7)
-+(make-mextr 6 11 11)
-+(make-mextr 7 11 15)
-+
-+(dshmi mmacfxwl "Multimedia fractional multiply (word to long)"
-+ ()
-+ "mmacfx.wl $rm, $rn, $rd"
-+ (+ (f-op 18) rm (f-ext 1) rn rd (f-rsvd 0))
-+ (sequence ((SI temp) (SI result1) (SI result0))
-+ (set result0 (subword SI rd 1))
-+ (set result1 (subword SI rd 0))
-+ (set temp (mul (zext SI (subword HI rm 3)) (zext SI (subword HI rn 3))))
-+ (set temp (saturate SI 32 (sll DI temp 1)))
-+ (set result0 (saturate SI 32 (add (ext DI result0)
-+ (ext DI temp))))
-+ (set temp (mul (zext SI (subword HI rm 2)) (zext SI (subword HI rn 2))))
-+ (set temp (saturate SI 32 (sll DI temp 1)))
-+ (set result1 (saturate SI 32 (add (ext DI result1)
-+ (ext DI temp))))
-+ (set rd (-join-si result1 result0))))
-+
-+(dshmi mmacnfx.wl "Multimedia fractional multiple (word to long)"
-+ ()
-+ "mmacnfx.wl $rm, $rn, $rd"
-+ (+ (f-op 18) rn (f-ext 5) rn rd (f-rsvd 0))
-+ (sequence ((SI temp) (SI result1) (SI result0))
-+ (set result0 (subword SI rd 1))
-+ (set result1 (subword SI rd 0))
-+ (set temp (mul (zext SI (subword HI rm 3)) (zext SI (subword HI rn 3))))
-+ (set temp (saturate SI 32 (sll DI temp 1)))
-+ (set result0 (saturate SI 32 (sub (ext DI result0)
-+ (ext DI temp))))
-+ (set temp (mul (zext SI (subword HI rm 2)) (zext SI (subword HI rn 2))))
-+ (set temp (saturate SI 32 (sll DI temp 1)))
-+ (set result1 (saturate SI 32 (sub (ext DI result1)
-+ (ext DI temp))))
-+ (set rd (-join-si result1 result0))))
-+
-+(dshmi mmull "Multimedia multiply (long word)"
-+ ()
-+ "mmul.l $rm, $rn, $rd"
-+ (+ (f-op 19) rm (f-ext 2) rn rd (f-rsvd 0))
-+ (slice-long mul))
-+
-+(dshmi mmulw "Multimedia multiply (word)"
-+ ()
-+ "mmul.w $rm, $rn, $rd"
-+ (+ (f-op 19) rm (f-ext 1) rn rd (f-rsvd 0))
-+ (slice-word mul))
-+
-+(dshmi mmulfxl "Multimedia fractional multiply (long word)"
-+ ()
-+ "mmulfx.l $rm, $rn, $rd"
-+ (+ (f-op 19) rm (f-ext 6) rn rd (f-rsvd 0))
-+ (sequence ((DI temp) (SI result0) (SI result1))
-+ (set temp (mul (zext DI (subword SI rm 1)) (zext DI (subword SI rn 1))))
-+ (set result0 (saturate SI 32 (sra temp 31)))
-+ (set temp (mul (zext DI (subword SI rm 0)) (zext DI (subword SI rn 0))))
-+ (set result1 (saturate SI 32 (sra temp 31)))
-+ (set rd (-join-si result1 result0))))
-+
-+(dshmi mmulfxw "Multimedia fractional multiply (word)"
-+ ()
-+ "mmulfx.w $rm, $rn, $rd"
-+ (+ (f-op 19) rm (f-ext 5) rn rd (f-rsvd 0))
-+ (sequence ((SI temp) (HI result0) (HI result1) (HI result2) (HI result3))
-+ (set temp (mul (zext SI (subword HI rm 3)) (zext SI (subword HI rn 3))))
-+ (set result0 (saturate HI 16 (sra temp 15)))
-+ (set temp (mul (zext SI (subword HI rm 2)) (zext SI (subword HI rn 2))))
-+ (set result1 (saturate HI 16 (sra temp 15)))
-+ (set temp (mul (zext SI (subword HI rm 1)) (zext SI (subword HI rn 1))))
-+ (set result2 (saturate HI 16 (sra temp 15)))
-+ (set temp (mul (zext SI (subword HI rm 0)) (zext SI (subword HI rn 0))))
-+ (set result3 (saturate HI 16 (sra temp 15)))
-+ (set rd (-join-hi result3 result2 result1 result0))))
-+
-+(dshmi mmulfxrpw "Multimedia fractional multiply round positive (word op)"
-+ ()
-+ "mmulfxrp.w $rm, $rn, $rd"
-+ (+ (f-op 19) rm (f-ext 9) rn rd (f-rsvd 0))
-+ (sequence ((SI temp) (HI result0) (HI result1) (HI result2) (HI result3) (HI c))
-+ (set c (sll 1 14))
-+ (set temp (mul (zext SI (subword HI rm 3)) (zext SI (subword HI rn 3))))
-+ (set result0 (saturate HI 16 (sra (add temp c) 15)))
-+ (set temp (mul (zext SI (subword HI rm 2)) (zext SI (subword HI rn 2))))
-+ (set result1 (saturate HI 16 (sra (add temp c) 15)))
-+ (set temp (mul (zext SI (subword HI rm 1)) (zext SI (subword HI rn 1))))
-+ (set result2 (saturate HI 16 (sra (add temp c) 15)))
-+ (set temp (mul (zext SI (subword HI rm 0)) (zext SI (subword HI rn 0))))
-+ (set result3 (saturate HI 16 (sra (add temp c) 15)))
-+ (set rd (-join-hi result3 result2 result1 result0))))
-+
-+(dshmi mmulhiwl "Multimedia multiply higher halves (word to long)"
-+ ()
-+ "mmulhi.wl $rm, $rn, $rd"
-+ (+ (f-op 19) rm (f-ext 14) rn rd (f-rsvd 0))
-+ (sequence ((SI result1) (SI result0))
-+ (set result0 (mul (zext SI (subword HI rm 1)) (zext SI (subword HI rn 1))))
-+ (set result1 (mul (zext SI (subword HI rm 0)) (zext SI (subword HI rn 0))))
-+ (set rd (-join-si result1 result0))))
-+
-+(dshmi mmullowl "Multimedia multiply lower halves (word to long)"
-+ ()
-+ "mmullo.wl $rm, $rn, $rd"
-+ (+ (f-op 19) rm (f-ext 10) rn rd (f-rsvd 0))
-+ (sequence ((SI result1) (SI result0))
-+ (set result0 (mul (zext SI (subword HI rm 3)) (zext SI (subword HI rn 3))))
-+ (set result1 (mul (zext SI (subword HI rm 2)) (zext SI (subword HI rn 2))))
-+ (set rd (-join-si result1 result0))))
-+
-+(dshmi mmulsumwq "Multimedia multiply and accumulate (word to quad)"
-+ ()
-+ "mmulsum.wq $rm, $rn, $rd"
-+ (+ (f-op 18) rm (f-ext 9) rn rd (f-rsvd 0))
-+ (sequence ((DI acc))
-+ (set acc (mul SI (zext SI (subword HI rm 0)) (zext SI (subword HI rn 0))))
-+ (set acc (add acc (mul SI (zext SI (subword HI rm 1)) (zext SI (subword HI rn 1)))))
-+ (set acc (add acc (mul SI (zext SI (subword HI rm 2)) (zext SI (subword HI rn 2)))))
-+ (set acc (add acc (mul SI (zext SI (subword HI rm 3)) (zext SI (subword HI rn 3)))))
-+ (set rd (add rd acc))))
-+
-+(dshmi movi "Move immediate"
-+ ()
-+ "movi $imm16, $rd"
-+ (+ (f-op 51) imm16 rd (f-rsvd 0))
-+ (set rd (ext DI imm16)))
-+
-+(dshmi mpermw "Multimedia permutate word"
-+ ()
-+ "mperm.w $rm, $rn, $rd"
-+ (+ (f-op 10) rm (f-ext 13) rn rd (f-rsvd 0))
-+ (sequence ((QI control) (HI result3) (HI result2) (HI result1) (HI result0))
-+ (set control (and QI rn #xff))
-+ (set result0 (subword HI rm (sub 3 (and control 3))))
-+ (set result1 (subword HI rm (sub 3 (and (srl control 2) 3))))
-+ (set result2 (subword HI rm (sub 3 (and (srl control 4) 3))))
-+ (set result3 (subword HI rm (sub 3 (and (srl control 6) 3))))
-+ (set rd (-join-hi result3 result2 result1 result0))))
-+
-+(dshmi msadubq "Multimedia absolute difference (byte)"
-+ ()
-+ "msad.ubq $rm, $rn, $rd"
-+ (+ (f-op 18) rm (f-ext 0) rn rd (f-rsvd 0))
-+ (sequence ((DI acc))
-+ (set acc (abs DI (sub (subword QI rm 0) (subword QI rn 0))))
-+ (set acc (add DI acc (abs (sub (subword QI rm 1) (subword QI rn 1)))))
-+ (set acc (add DI acc (abs (sub (subword QI rm 2) (subword QI rn 2)))))
-+ (set acc (add DI acc (abs (sub (subword QI rm 3) (subword QI rn 3)))))
-+ (set acc (add DI acc (abs (sub (subword QI rm 4) (subword QI rn 4)))))
-+ (set acc (add DI acc (abs (sub (subword QI rm 5) (subword QI rn 5)))))
-+ (set acc (add DI acc (abs (sub (subword QI rm 6) (subword QI rn 6)))))
-+ (set acc (add DI acc (abs (sub (subword QI rm 7) (subword QI rn 7)))))
-+ (set rd (add rd acc))))
-+
-+(define-pmacro (-mshaldsl arg) (saturate SI 32 (sll DI arg (and rn 31))))
-+(dshmi mshaldsl "Multimedia saturating arithmetic left shift (long word)"
-+ ()
-+ "mshalds.l $rm, $rn, $rd"
-+ (+ (f-op 3) rm (f-ext 6) rn rd (f-rsvd 0))
-+ (slice-long-unop -mshaldsl))
-+
-+(define-pmacro (-mshaldsw arg) (saturate HI 16 (sll DI arg (and rn 15))))
-+(dshmi mshaldsw "Multimedia saturating arithmetic left shift (word)"
-+ ()
-+ "mshalds.w $rm, $rn, $rd"
-+ (+ (f-op 3) rm (f-ext 5) rn rd (f-rsvd 0))
-+ (slice-word-unop -mshaldsw))
-+
-+(define-pmacro (-mshardl arg) (sra arg (and rn 31)))
-+(dshmi mshardl "Multimedia arithmetic right shift (long)"
-+ ()
-+ "mshard.l $rm, $rn, $rd"
-+ (+ (f-op 3) rm (f-ext 10) rn rd (f-rsvd 0))
-+ (slice-long-unop -mshardl))
-+
-+(define-pmacro (-mshardw arg) (sra arg (and rn 15)))
-+(dshmi mshardw "Multimedia arithmetic right shift (word)"
-+ ()
-+ "mshard.w $rm, $rn, $rd"
-+ (+ (f-op 3) rm (f-ext 9) rn rd (f-rsvd 0))
-+ (slice-word-unop -mshardw))
-+
-+(dshmi mshardsq "Multimedia saturating arithmetic right shift (quad word)"
-+ ()
-+ "mshards.q $rm, $rn, $rd"
-+ (+ (f-op 3) rm (f-ext 11) rn rd (f-rsvd 0))
-+ (set rd (saturate DI 16 (sra rm (and rn 63)))))
-+
-+(dshmi mshfhib "Multimedia shuffle higher-half (byte)"
-+ ()
-+ "mshfhi.b $rm, $rn, $rd"
-+ (+ (f-op 11) rm (f-ext 4) rn rd (f-rsvd 0))
-+ (sequence ((QI result7) (QI result6) (QI result5) (QI result4)
-+ (QI result3) (QI result2) (QI result1) (QI result0))
-+ (set result0 (subword QI rm 3))
-+ (set result1 (subword QI rn 3))
-+ (set result2 (subword QI rm 2))
-+ (set result3 (subword QI rn 2))
-+ (set result4 (subword QI rm 1))
-+ (set result5 (subword QI rn 1))
-+ (set result6 (subword QI rm 0))
-+ (set result7 (subword QI rn 0))
-+ (set rd (-join-qi result7 result6 result5 result4 result3
-+ result2 result1 result0))))
-+
-+(dshmi mshfhil "Multimedia shuffle higher-half (long)"
-+ ()
-+ "mshfhi.l $rm, $rn, $rd"
-+ (+ (f-op 11) rm (f-ext 6) rn rd (f-rsvd 0))
-+ (sequence ((SI result1) (SI result0))
-+ (set result0 (subword SI rm 0))
-+ (set result1 (subword SI rn 0))
-+ (set rd (-join-si result1 result0))))
-+
-+(dshmi mshfhiw "Multimedia shuffle higher-half (word)"
-+ ()
-+ "mshfhi.w $rm, $rn, $rd"
-+ (+ (f-op 11) rm (f-ext 5) rn rd (f-rsvd 0))
-+ (sequence ((HI result3) (HI result2) (HI result1) (HI result0))
-+ (set result0 (subword HI rm 1))
-+ (set result1 (subword HI rn 1))
-+ (set result2 (subword HI rm 0))
-+ (set result3 (subword HI rn 0))
-+ (set rd (-join-hi result3 result2 result1 result0))))
-+
-+(dshmi mshflob "Multimedia shuffle lower-half (byte)"
-+ ()
-+ "mshflo.b $rm, $rn, $rd"
-+ (+ (f-op 11) rm (f-ext 0) rn rd (f-rsvd 0))
-+ (sequence ((QI result7) (QI result6) (QI result5) (QI result4)
-+ (QI result3) (QI result2) (QI result1) (QI result0))
-+ (set result0 (subword QI rm 7))
-+ (set result1 (subword QI rn 7))
-+ (set result2 (subword QI rm 6))
-+ (set result3 (subword QI rn 6))
-+ (set result4 (subword QI rm 5))
-+ (set result5 (subword QI rn 5))
-+ (set result6 (subword QI rm 4))
-+ (set result7 (subword QI rn 4))
-+ (set rd (-join-qi result7 result6 result5 result4 result3
-+ result2 result1 result0))))
-+
-+(dshmi mshflol "Multimedia shuffle lower-half (long)"
-+ ()
-+ "mshflo.l $rm, $rn, $rd"
-+ (+ (f-op 11) rm (f-ext 2) rn rd (f-rsvd 0))
-+ (sequence ((SI result1) (SI result0))
-+ (set result0 (subword SI rm 1))
-+ (set result1 (subword SI rn 1))
-+ (set rd (-join-si result1 result0))))
-+
-+(dshmi mshflow "Multimedia shuffle lower-half (word)"
-+ ()
-+ "mshflo.w $rm, $rn, $rd"
-+ (+ (f-op 11) rm (f-ext 1) rn rd (f-rsvd 0))
-+ (sequence ((HI result3) (HI result2) (HI result1) (HI result0))
-+ (set result0 (subword HI rm 3))
-+ (set result1 (subword HI rn 3))
-+ (set result2 (subword HI rm 2))
-+ (set result3 (subword HI rn 2))
-+ (set rd (-join-hi result3 result2 result1 result0))))
-+
-+(define-pmacro (-mshlldl arg) (sll arg (and rn 31)))
-+(dshmi mshlldl "Multimedia logical left shift (long word)"
-+ ()
-+ "mshlld.l $rm, $rn, $rd"
-+ (+ (f-op 3) rm (f-ext 2) rn rd (f-rsvd 0))
-+ (slice-long-unop -mshlldl))
-+
-+(define-pmacro (-mshlldw arg) (sll arg (and rn 15)))
-+(dshmi mshlldw "Multimedia logical left shift (word)"
-+ ()
-+ "mshlld.w $rm, $rn, $rd"
-+ (+ (f-op 3) rm (f-ext 1) rn rd (f-rsvd 0))
-+ (slice-word-unop -mshlldw))
-+
-+(define-pmacro (-mshlrdl arg) (srl arg (and rn 31)))
-+(dshmi mshlrdl "Multimedia logical right shift (long word)"
-+ ()
-+ "mshlrd.l $rm, $rn, $rd"
-+ (+ (f-op 3) rm (f-ext 14) rn rd (f-rsvd 0))
-+ (slice-long-unop -mshlrdl))
-+
-+(define-pmacro (-mshlrdw arg) (srl arg (and rn 15)))
-+(dshmi mshlrdw "Multimedia logical right shift (word)"
-+ ()
-+ "mshlrd.w $rm, $rn, $rd"
-+ (+ (f-op 3) rm (f-ext 13) rn rd (f-rsvd 0))
-+ (slice-word-unop -mshlrdw))
-+
-+(dshmi msubl "Multimedia subtract (long word)"
-+ ()
-+ "msub.l $rm, $rn, $rd"
-+ (+ (f-op 2) rm (f-ext 10) rn rd (f-rsvd 0))
-+ (slice-long sub))
-+
-+(dshmi msubw "Multimedia add (word)"
-+ ()
-+ "msub.w $rm, $rn, $rd"
-+ (+ (f-op 2) rm (f-ext 9) rn rd (f-rsvd 0))
-+ (slice-word sub))
-+
-+(define-pmacro (-msubsl arg1 arg2) (saturate SI 32 (sub (ext DI arg1)
-+ (ext DI arg2))))
-+(dshmi msubsl "Multimedia subtract (saturating long)"
-+ ()
-+ "msubs.l $rm, $rn, $rd"
-+ (+ (f-op 2) rm (f-ext 14) rn rd (f-rsvd 0))
-+ (slice-long -msubsl))
-+
-+(define-pmacro (-msubsub arg1 arg2) (usaturate QI 8 (sub (zext DI arg1)
-+ (zext DI arg2))))
-+(dshmi msubsub "Multimedia subtract (saturating byte)"
-+ ()
-+ "msubs.ub $rm, $rn, $rd"
-+ (+ (f-op 2) rm (f-ext 12) rn rd (f-rsvd 0))
-+ (slice-byte -msubsub))
-+
-+(define-pmacro (-msubsw arg1 arg2) (saturate HI 16 (sub (ext DI arg1)
-+ (ext DI arg2))))
-+(dshmi msubsw "Multimedia subtract (saturating word)"
-+ ()
-+ "msubs.w $rm, $rn, $rd"
-+ (+ (f-op 2) rm (f-ext 13) rn rd (f-rsvd 0))
-+ (slice-byte -msubsw))
-+
-+(dshmi mulsl "Multiply signed long"
-+ ()
-+ "muls.l $rm, $rn, $rd"
-+ (+ (f-op 1) rm (f-ext 14) rn rd (f-rsvd 0))
-+ (set rd (mul (ext DI (subword SI rm 1)) (ext DI (subword SI rn 1)))))
-+
-+(dshmi mulul "Multiply unsigned long"
-+ ()
-+ "mulu.l $rm, $rn, $rd"
-+ (+ (f-op 0) rm (f-ext 14) rn rd (f-rsvd 0))
-+ (set rd (mul (zext DI (subword SI rm 1)) (zext DI (subword SI rn 1)))))
-+
-+(dshmi nop "No operation"
-+ ()
-+ "nop"
-+ (+ (f-op 27) (f-left 63) (f-ext 0) (f-right 63) (f-dest 63) (f-rsvd 0))
-+ (nop))
-+
-+(dshmi nsb "Number of consecutive sign bits"
-+ ()
-+ "nsb $rm, $rd"
-+ (+ (f-op 0) rm (f-ext 13) (f-right 63) rd (f-rsvd 0))
-+ ; Semantics requires a loop construct, so punt to C.
-+ (set rd (c-call DI "sh64_nsb" rm)))
-+
-+(dshmi ocbi "Invalidate operand cache block"
-+ ()
-+ "ocbi $rm, $disp6x32"
-+ (+ (f-op 56) rm (f-ext 9) disp6x32 (f-dest 63) (f-rsvd 0))
-+ (unimp "ocbi"))
-+
-+(dshmi ocbp "Purge operand cache block"
-+ ()
-+ "ocbp $rm, $disp6x32"
-+ (+ (f-op 56) rm (f-ext 8) disp6x32 (f-dest 63) (f-rsvd 0))
-+ (unimp "ocbp"))
-+
-+(dshmi ocbwb "Write-back operand cache block"
-+ ()
-+ "ocbwb $rm, $disp6x32"
-+ (+ (f-op 56) rm (f-ext 12) disp6x32 (f-dest 63) (f-rsvd 0))
-+ (unimp "ocbwb"))
-+
-+(dshmi or "OR"
-+ ()
-+ "or $rm, $rn, $rd"
-+ (+ (f-op 1) rm (f-ext 9) rn rd (f-rsvd 0))
-+ (set rd (or rm rn)))
-+
-+(dshmi ori "OR immediate"
-+ ()
-+ "ori $rm, $imm10, $rd"
-+ (+ (f-op 55) rm imm10 rd (f-rsvd 0))
-+ (set rd (or rm (ext DI imm10))))
-+
-+(dshmi prefi "Prefetch instruction"
-+ ()
-+ "prefi $rm, $disp6x32"
-+ (+ (f-op 56) rm (f-ext 1) disp6x32 (f-right 63) (f-rsvd 0))
-+ (unimp "prefi"))
-+
-+(dshmi pta "Prepare target register for SHmedia target"
-+ ()
-+ "pta$likely $disp16, $tra"
-+ (+ (f-op 58) disp16 likely (f-8-2 0) tra (f-rsvd 0))
-+ (set tra (add disp16 1)))
-+
-+(dshmi ptabs "Prepare target register with absolute value from register"
-+ ()
-+ "ptabs$likely $rn, $tra"
-+ (+ (f-op 26) (f-left 63) (f-ext 1) rn likely (f-8-2 0) tra (f-rsvd 0))
-+ (set tra rn))
-+
-+(dshmi ptb "Prepare target register for SHcompact target"
-+ ()
-+ "ptb$likely $disp16, $tra"
-+ (+ (f-op 59) disp16 likely (f-8-2 0) tra (f-rsvd 0))
-+ (set tra disp16))
-+
-+(dshmi ptrel "Prepare target register with relative value from register"
-+ ()
-+ "ptrel$likely $rn, $tra"
-+ (+ (f-op 26) (f-left 63) (f-ext 5) rn likely (f-8-2 0) tra (f-rsvd 0))
-+ (set tra (add pc rn)))
-+
-+(dshmi putcfg "Put configuration register"
-+ ()
-+ "putcfg $rm, $disp6, $rd"
-+ (+ (f-op 56) rm (f-ext 15) disp6 rd (f-rsvd 0))
-+ (unimp "putcfg"))
-+
-+(dshmi putcon "Put control register"
-+ ()
-+ "putcon $rm, $crj"
-+ (+ (f-op 27) rm (f-ext 15) (f-right 63) crj (f-rsvd 0))
-+ (set crj rm))
-+
-+(dshmi rte "Return from exception"
-+ ()
-+ "rte"
-+ (+ (f-op 27) (f-left 63) (f-ext 3) (f-right 63) (f-dest 63) (f-rsvd 0))
-+ (unimp "rte"))
-+
-+(dshmi shard "Arithmetic right shift"
-+ ()
-+ "shard $rm, $rn, $rd"
-+ (+ (f-op 1) rm (f-ext 7) rn rd (f-rsvd 0))
-+ (set rd (sra rm (and rn 63))))
-+
-+(dshmi shardl "Arithmetic right shift (long word)"
-+ ()
-+ "shard.l $rm, $rn, $rd"
-+ (+ (f-op 1) rm (f-ext 6) rn rd (f-rsvd 0))
-+ (set rd (ext DI (sra (subword SI rm 1) (and rn 63)))))
-+
-+(dshmi shari "Arithmetic right shift (immediate count)"
-+ ()
-+ "shari $rm, $uimm6, $rd"
-+ (+ (f-op 49) rm (f-ext 7) uimm6 rd (f-rsvd 0))
-+ (set rd (sra rm uimm6)))
-+
-+(dshmi sharil "Arithmetic right shift (long word, immediate count)"
-+ ()
-+ "shari.l $rm, $uimm6, $rd"
-+ (+ (f-op 49) rm (f-ext 6) uimm6 rd (f-rsvd 0))
-+ (set rd (ext DI (sra (subword SI rm 1) (and uimm6 63)))))
-+
-+(dshmi shlld "Logical left shift"
-+ ()
-+ "shlld $rm, $rn, $rd"
-+ (+ (f-op 1) rm (f-ext 1) rn rd (f-rsvd 0))
-+ (set rd (sll rm (and rn 63))))
-+
-+(dshmi shlldl "Logical left shift (long word)"
-+ ()
-+ "shlld.l $rm, $rn, $rd"
-+ (+ (f-op 1) rm (f-ext 0) rn rd (f-rsvd 0))
-+ (set rd (ext DI (sll (subword SI rm 1) (and rn 63)))))
-+
-+(dshmi shlli "Logical left shift (immediate count)"
-+ ()
-+ "shlli $rm, $uimm6, $rd"
-+ (+ (f-op 49) rm (f-ext 1) uimm6 rd (f-rsvd 0))
-+ (set rd (sll rm uimm6)))
-+
-+(dshmi shllil "Logical left shift (long word, immediate count)"
-+ ()
-+ "shlli.l $rm, $uimm6, $rd"
-+ (+ (f-op 49) rm (f-ext 0) uimm6 rd (f-rsvd 0))
-+ (set rd (ext DI (sll (subword SI rm 1) (and uimm6 63)))))
-+
-+(dshmi shlrd "Logical right shift"
-+ ()
-+ "shlrd $rm, $rn, $rd"
-+ (+ (f-op 1) rm (f-ext 3) rn rd (f-rsvd 0))
-+ (set rd (srl rm (and rn 63))))
-+
-+(dshmi shlrdl "Logical right shift (long word)"
-+ ()
-+ "shlrd.l $rm, $rn, $rd"
-+ (+ (f-op 1) rm (f-ext 2) rn rd (f-rsvd 0))
-+ (set rd (ext DI (srl (subword SI rm 1) (and rn 63)))))
-+
-+(dshmi shlri "Logical right shift (immediate count)"
-+ ()
-+ "shlri $rm, $uimm6, $rd"
-+ (+ (f-op 49) rm (f-ext 3) uimm6 rd (f-rsvd 0))
-+ (set rd (srl rm uimm6)))
-+
-+(dshmi shlril "Logical right shift (long word, immediate count)"
-+ ()
-+ "shlri.l $rm, $uimm6, $rd"
-+ (+ (f-op 49) rm (f-ext 2) uimm6 rd (f-rsvd 0))
-+ (set rd (ext DI (srl (subword SI rm 1) (and uimm6 63)))))
-+
-+(dshmi shori "Shift-or immediate"
-+ ()
-+ "shori $uimm16, $rd"
-+ (+ (f-op 50) uimm16 rd (f-rsvd 0))
-+ (set rd (or (sll rd 16) (zext DI uimm16))))
-+
-+(dshmi sleep "Sleep"
-+ ()
-+ "sleep"
-+ (+ (f-op 27) (f-left 63) (f-ext 7) (f-right 63) (f-dest 63) (f-rsvd 0))
-+ (unimp "sleep"))
-+
-+(dshmi stb "Store byte"
-+ ()
-+ "st.b $rm, $disp10, $rd"
-+ (+ (f-op 40) rm disp10 rd (f-rsvd 0))
-+ (set (mem UQI (add rm (ext DI disp10))) (and QI rd #xff)))
-+
-+(dshmi stl "Store long word"
-+ ()
-+ "st.l $rm, $disp10x4, $rd"
-+ (+ (f-op 42) rm disp10x4 rd (f-rsvd 0))
-+ (set (mem SI (add rm (ext DI disp10x4))) (and SI rd #xffffffff)))
-+
-+(dshmi stq "Store quad word"
-+ ()
-+ "st.q $rm, $disp10x8, $rd"
-+ (+ (f-op 43) rm disp10x8 rd (f-rsvd 0))
-+ (set (mem DI (add rm (ext DI disp10x8))) rd))
-+
-+(dshmi stw "Store word"
-+ ()
-+ "st.w $rm, $disp10x2, $rd"
-+ (+ (f-op 41) rm disp10x2 rd (f-rsvd 0))
-+ (set (mem HI (add rm (ext DI disp10x2))) (and HI rd #xffff)))
-+
-+(define-pmacro (-sthi-byte)
-+ (if (and bytecount 1)
-+ (sequence ()
-+ (set (mem UQI addr) (and QI val #xff))
-+ (set val (srl val 8)))))
-+
-+(define-pmacro (-sthi-word)
-+ (if (and bytecount 2)
-+ (sequence ()
-+ (set (mem HI (and addr -4)) (and HI val #xffff))
-+ (set val (srl val 16)))))
-+
-+(define-pmacro (-sthi-long)
-+ (if (and bytecount 4)
-+ (sequence ()
-+ (set (mem SI (and addr -8)) (and SI val #xffffffff))
-+ (set val (srl val 32)))))
-+
-+(dshmi sthil "Store high part (long word)"
-+ ()
-+ "sthi.l $rm, $disp6, $rd"
-+ (+ (f-op 56) rm (f-ext 6) disp6 rd (f-rsvd 0))
-+ (sequence ((DI addr) (QI bytecount) (DI val))
-+ (set addr (add rm disp6))
-+ (set bytecount (add (and addr 3) 1))
-+ (if (and bytecount 4)
-+ (set (mem SI (and addr -4)) rd)
-+ (if endian
-+ (sequence ()
-+ ; Big endian.
-+ (set val rd)
-+ (-sthi-byte)
-+ (-sthi-word))
-+ (sequence ()
-+ (set val (srl rd (sub 32 (mul 8 bytecount))))
-+ (-sthi-word)
-+ (-sthi-byte))))))
-+
-+(dshmi sthiq "Store high part (quad word)"
-+ ()
-+ "sthi.q $rm, $disp6, $rd"
-+ (+ (f-op 56) rm (f-ext 7) disp6 rd (f-rsvd 0))
-+ (sequence ((DI addr) (QI bytecount) (DI val))
-+ (set addr (add rm disp6))
-+ (set bytecount (add (and addr 7) 1))
-+ (if (and bytecount 8)
-+ (set (mem DI (and addr -8)) rd)
-+ (if endian
-+ (sequence ()
-+ (set val rd)
-+ (-sthi-byte)
-+ (-sthi-word)
-+ (-sthi-long))
-+ (sequence ()
-+ (set val (srl rd (sub 64 (mul 8 bytecount))))
-+ (-sthi-long)
-+ (-sthi-word)
-+ (-sthi-byte))))))
-+
-+(define-pmacro (-stlo-byte)
-+ (if (and bytecount 1)
-+ (sequence ()
-+ (set (mem UQI addr) (and QI val #xff))
-+ (set val (srl val 8)))))
-+
-+(define-pmacro (-stlo-word)
-+ (if (and bytecount 2)
-+ (sequence ()
-+ (set (mem UHI (and (add addr 1) -2)) (and HI val #xffff))
-+ (set val (srl val 16)))))
-+
-+(define-pmacro (-stlo-long)
-+ (if (and bytecount 4)
-+ (sequence ()
-+ (set (mem USI (and (add addr 3) -4)) (and SI val #xffffffff))
-+ (set val (srl val 32)))))
-+
-+(dshmi stlol "Store low part (long word)"
-+ ()
-+ "stlo.l $rm, $disp6, $rd"
-+ (+ (f-op 56) rm (f-ext 2) disp6 rd (f-rsvd 0))
-+ (sequence ((DI addr) (QI bytecount) (DI val))
-+ (set addr (add rm disp6))
-+ (set bytecount (sub 4 (and addr 3)))
-+ (if (and bytecount 4)
-+ (set (mem USI addr) rd)
-+ (if endian
-+ (sequence ()
-+ (set val (srl rd (sub 32 (mul 8 bytecount))))
-+ (-stlo-word)
-+ (-stlo-byte))
-+ (sequence ()
-+ (set val rd)
-+ (-stlo-byte)
-+ (-stlo-word))))))
-+
-+(dshmi stloq "Store low part (quad word)"
-+ ()
-+ "stlo.q $rm, $disp6, $rd"
-+ (+ (f-op 56) rm (f-ext 3) disp6 rd (f-rsvd 0))
-+ (sequence ((DI addr) (QI bytecount) (DI val))
-+ (set addr (add rm disp6))
-+ (set bytecount (sub 8 (and addr 7)))
-+ (if (and bytecount 8)
-+ (set (mem UDI addr) rd)
-+ (if endian
-+ (sequence ()
-+ (set val (srl rd (sub 64 (mul 8 bytecount))))
-+ (-stlo-long)
-+ (-stlo-word)
-+ (-stlo-byte))
-+ (sequence ()
-+ (set val rd)
-+ (-stlo-byte)
-+ (-stlo-word)
-+ (-stlo-long))))))
-+
-+(dshmi stxb "Store byte (extended displacement)"
-+ ()
-+ "stx.b $rm, $rn, $rd"
-+ (+ (f-op 24) rm (f-ext 0) rn rd (f-rsvd 0))
-+ (set (mem UQI (add rm rn)) (subword QI rd 7)))
-+
-+(dshmi stxl "Store long (extended displacement)"
-+ ()
-+ "stx.l $rm, $rn, $rd"
-+ (+ (f-op 24) rm (f-ext 2) rn rd (f-rsvd 0))
-+ (set (mem SI (add rm rn)) (subword SI rd 1)))
-+
-+(dshmi stxq "Store quad word (extended displacement)"
-+ ()
-+ "stx.q $rm, $rn, $rd"
-+ (+ (f-op 24) rm (f-ext 3) rn rd (f-rsvd 0))
-+ (set (mem DI (add rm rn)) rd))
-+
-+(dshmi stxw "Store word (extended displacement)"
-+ ()
-+ "stx.w $rm, $rn, $rd"
-+ (+ (f-op 24) rm (f-ext 1) rn rd (f-rsvd 0))
-+ (set (mem HI (add rm rn)) (subword HI rd 3)))
-+
-+(dshmi sub "Subtract"
-+ ()
-+ "sub $rm, $rn, $rd"
-+ (+ (f-op 0) rm (f-ext 11) rn rd (f-rsvd 0))
-+ (set rd (sub rm rn)))
-+
-+(dshmi subl "Subtract long"
-+ ()
-+ "sub.l $rm, $rn, $rd"
-+ (+ (f-op 0) rm (f-ext 10) rn rd (f-rsvd 0))
-+ (set rd (ext DI (sub (subword SI rm 1) (subword SI rn 1)))))
-+
-+(dshmi swapq "Swap quad words"
-+ ()
-+ "swap.q $rm, $rn, $rd"
-+ (+ (f-op 8) rm (f-ext 3) rn rd (f-rsvd 0))
-+ (sequence ((DI addr) (DI temp))
-+ (set addr (add rm rn))
-+ (set temp (mem DI addr))
-+ (set (mem DI addr) rd)
-+ (set rd temp)))
-+
-+(dshmi synci "Synchronise instruction fetch"
-+ ()
-+ "synci"
-+ (+ (f-op 27) (f-left 63) (f-ext 2) (f-right 63) (f-dest 63) (f-rsvd 0))
-+ (unimp "synci"))
-+
-+(dshmi synco "Synchronise data operations"
-+ ()
-+ "synco"
-+ (+ (f-op 27) (f-left 63) (f-ext 6) (f-right 63) (f-dest 63) (f-rsvd 0))
-+ (unimp "synco"))
-+
-+(dshmi trapa "Trap"
-+ ()
-+ "trapa $rm"
-+ (+ (f-op 27) rm (f-ext 1) (f-right 63) (f-dest 63) (f-rsvd 0))
-+ (c-call "sh64_trapa" rm pc))
-+
-+(dshmi xor "Exclusive OR"
-+ ()
-+ "xor $rm, $rn, $rd"
-+ (+ (f-op 1) rm (f-ext 13) rn rd (f-rsvd 0))
-+ (set rd (xor rm rn)))
-+
-+(dshmi xori "Exclusive OR immediate"
-+ ()
-+ "xori $rm, $imm6, $rd"
-+ (+ (f-op 49) rm (f-ext 13) rn rd (f-rsvd 0))
-+ (set rd (xor rm (ext DI imm6))))
-diff -Nur binutils-2.24.orig/cgen/cpu/sh.cpu binutils-2.24/cgen/cpu/sh.cpu
---- binutils-2.24.orig/cgen/cpu/sh.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/sh.cpu 2016-06-30 21:26:12.641892646 +0200
-@@ -0,0 +1,349 @@
-+; Renesas / SuperH SH architecture description. -*- Scheme -*-
-+; Copyright (C) 2000, 2001 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+(include "simplify.inc")
-+
-+(define-arch
-+ (name sh)
-+ (comment "Renesas / SuperH SuperH (SH)")
-+ (insn-lsb0? #t)
-+ (machs sh2 sh3 sh3e sh4 sh5)
-+ (isas compact media)
-+)
-+
-+
-+; Instruction sets.
-+
-+(define-isa
-+ (name media)
-+ (comment "SHmedia 32-bit instruction set")
-+ (base-insn-bitsize 32)
-+)
-+
-+(define-isa
-+ (name compact)
-+ (comment "SHcompact 16-bit instruction set")
-+ (base-insn-bitsize 16)
-+)
-+
-+
-+; CPU family.
-+
-+(define-cpu
-+ (name sh64)
-+ (comment "SH 64-bit family")
-+ (endian either)
-+ (word-bitsize 32)
-+)
-+
-+
-+(define-mach
-+ (name sh2)
-+ (comment "SH-2 CPU core")
-+ (cpu sh64)
-+ (isas compact)
-+)
-+
-+(define-mach
-+ (name sh3)
-+ (comment "SH-3 CPU core")
-+ (cpu sh64)
-+ (isas compact)
-+)
-+
-+(define-mach
-+ (name sh3e)
-+ (comment "SH-3e CPU core")
-+ (cpu sh64)
-+ (isas compact)
-+)
-+
-+(define-mach
-+ (name sh4)
-+ (comment "SH-4 CPU core")
-+ (cpu sh64)
-+ (isas compact)
-+)
-+
-+(define-mach
-+ (name sh5)
-+ (comment "SH-5 CPU core")
-+ (cpu sh64)
-+ (isas compact media)
-+)
-+
-+(define-model
-+ (name sh5)
-+ (comment "SH-5 reference implementation")
-+ (mach sh5)
-+ (unit u-exec "Execution unit" ()
-+ 1 1 ; issue done
-+ () () () ())
-+)
-+
-+; Hardware elements.
-+
-+(define-hardware
-+ (name h-pc)
-+ (comment "Program counter")
-+ (attrs PC (ISA compact,media))
-+ (type pc UDI)
-+ (get () (raw-reg h-pc))
-+ (set (newval) (sequence ()
-+ (set (raw-reg h-ism) (and newval 1))
-+ (set (raw-reg h-pc) (and newval (inv UDI 1)))))
-+)
-+
-+(define-pmacro (-build-greg-name n) ((.sym r n) n))
-+
-+(define-hardware
-+ (name h-gr)
-+ (comment "General purpose integer registers")
-+ (attrs (ISA media,compact))
-+ (type register DI (64))
-+ (indices keyword "" (.map -build-greg-name (.iota 64)))
-+ (get (index)
-+ (if DI (eq index 63)
-+ (const 0)
-+ (raw-reg h-gr index)))
-+ (set (index newval)
-+ (if (ne index 63)
-+ (set (raw-reg h-gr index) newval)
-+ (nop)))
-+)
-+
-+(define-hardware
-+ (name h-grc)
-+ (comment "General purpose integer registers (SHcompact view)")
-+ (attrs VIRTUAL (ISA compact))
-+ (type register SI (16))
-+ (indices keyword "" (.map -build-greg-name (.iota 16)))
-+ (get (index)
-+ (and (raw-reg h-gr index) (zext DI #xFFFFFFFF)))
-+ (set (index newval)
-+ (set (raw-reg h-gr index) (ext DI newval)))
-+)
-+
-+(define-pmacro (-build-creg-name n) ((.sym cr n) n))
-+
-+(define-hardware
-+ (name h-cr)
-+ (comment "Control registers")
-+ (attrs (ISA media))
-+ (type register DI (64))
-+ (indices keyword "" (.map -build-creg-name (.iota 64)))
-+ (get (index)
-+ (if DI (eq index 0)
-+ (zext DI (reg h-sr))
-+ (raw-reg h-cr index)))
-+ (set (index newval)
-+ (if (eq index 0)
-+ (set (reg h-sr) newval)
-+ (set (raw-reg h-cr index) newval)))
-+)
-+
-+(define-hardware
-+ (name h-sr)
-+ (comment "Status register")
-+ (attrs (ISA compact,media))
-+ (type register SI)
-+)
-+
-+(define-hardware
-+ (name h-fpscr)
-+ (comment "Floating point status and control register")
-+ (attrs (ISA compact,media))
-+ (type register SI)
-+)
-+
-+(define-hardware
-+ (name h-frbit)
-+ (comment "Floating point register file bit")
-+ (attrs (ISA media,compact) VIRTUAL)
-+ (type register BI)
-+ (get () (and (srl (reg h-sr) 14) 1))
-+ (set (newvalue) (set (reg h-sr) (or (and (reg h-sr) (inv (sll 1 14))) (sll SI newvalue 14))))
-+)
-+
-+(define-hardware
-+ (name h-szbit)
-+ (comment "Floating point transfer size bit")
-+ (attrs (ISA media,compact) VIRTUAL)
-+ (type register BI)
-+ (get () (and (srl (reg h-sr) 13) 1))
-+ (set (newvalue) (set (reg h-sr) (or (and (reg h-sr) (inv (sll 1 13))) (sll SI newvalue 13))))
-+)
-+
-+(define-hardware
-+ (name h-prbit)
-+ (comment "Floating point precision bit")
-+ (attrs (ISA media,compact) VIRTUAL)
-+ (type register BI)
-+ (get () (and (srl (reg h-sr) 12) 1))
-+ (set (newvalue) (set (reg h-sr) (or (and (reg h-sr) (inv (sll 1 12))) (sll SI newvalue 12))))
-+)
-+
-+(define-hardware
-+ (name h-sbit)
-+ (comment "Multiply-accumulate saturation flag")
-+ (attrs (ISA compact) VIRTUAL)
-+ (type register BI)
-+ (get () (and (srl (reg h-sr) 1) 1))
-+ (set (newvalue) (set (reg h-sr) (or (and (reg h-sr) (inv 2)) (sll SI newvalue 1))))
-+)
-+
-+(define-hardware
-+ (name h-mbit)
-+ (comment "Divide-step M flag")
-+ (attrs (ISA compact) VIRTUAL)
-+ (type register BI)
-+ (get () (and (srl (reg h-sr) 9) 1))
-+ (set (newvalue) (set (reg h-sr) (or (and (reg h-sr) (inv (sll 1 9))) (sll SI newvalue 9))))
-+)
-+
-+(define-hardware
-+ (name h-qbit)
-+ (comment "Divide-step Q flag")
-+ (attrs (ISA compact) VIRTUAL)
-+ (type register BI)
-+ (get () (and (srl (reg h-sr) 8) 1))
-+ (set (newvalue) (set (reg h-sr) (or (and (reg h-sr) (inv (sll 1 8))) (sll SI newvalue 8))))
-+)
-+
-+(define-pmacro (-build-freg-name n) ((.sym fr n) n))
-+
-+(define-hardware
-+ (name h-fr)
-+ (comment "Single precision floating point registers")
-+ (attrs (ISA media,compact))
-+ (type register SF (64))
-+ (indices keyword "" (.map -build-freg-name (.iota 64)))
-+)
-+
-+
-+(define-pmacro (-build-fpair-name n) ((.sym fp n) n))
-+
-+(define-hardware
-+ (name h-fp)
-+ (comment "Single precision floating point register pairs")
-+ (attrs (ISA media,compact))
-+ (type register DF (32))
-+ (indices keyword "" (.map -build-fpair-name (.iota 32)))
-+)
-+
-+(define-pmacro (-build-fvec-name n) ((.sym fv n) n))
-+
-+(define-hardware
-+ (name h-fv)
-+ (comment "Single precision floating point vectors")
-+ (attrs VIRTUAL (ISA media,compact))
-+ (type register SF (16))
-+ (indices keyword "" (.map -build-fvec-name (.iota 16)))
-+ ; Mask with $F to ensure 0 <= index < 15.
-+ (get (index) (reg h-fr (mul (and UQI index 15) 4)))
-+ (set (index newval) (set (reg h-fr (mul (and UQI index 15) 4)) newval))
-+)
-+
-+(define-hardware
-+ (name h-fmtx)
-+ (comment "Single precision floating point matrices")
-+ (attrs VIRTUAL (ISA media))
-+ (type register SF (4))
-+ (indices keyword "" ((mtrx0 0) (mtrx1 1) (mtrx2 2) (mtrx3 3)))
-+ ; Mask with $3 to ensure 0 <= index < 4.
-+ (get (index) (reg h-fr (mul (and UQI index 3) 16)))
-+ (set (index newval) (set (reg h-fr (mul (and UQI index 3) 16)) newval))
-+)
-+
-+(define-pmacro (-build-dreg-name n) ((.sym dr n) n))
-+
-+(define-hardware
-+ (name h-dr)
-+ (comment "Double precision floating point registers")
-+ (attrs (ISA media,compact) VIRTUAL)
-+ (type register DF (32))
-+ (indices keyword "" (.map -build-dreg-name (.iota 64)))
-+ (get (index)
-+ (subword DF
-+ (or
-+ (sll DI (zext DI (subword SI (reg h-fr index) 0)) 32)
-+ (zext DI (subword SI (reg h-fr (add index 1)) 0))) 0))
-+ (set (index newval)
-+ (sequence ()
-+ (set (reg h-fr index)
-+ (subword SF (subword SI newval 0) 0))
-+ (set (reg h-fr (add index 1))
-+ (subword SF (subword SI newval 1) 0))))
-+)
-+
-+(define-hardware
-+ (name h-tr)
-+ (comment "Branch target registers")
-+ (attrs (ISA media))
-+ (type register DI (8))
-+ (indices keyword "" ((tr0 0) (tr1 1) (tr2 2) (tr3 3) (tr4 4) (tr5 5) (tr6 6) (tr7 7)))
-+)
-+
-+(define-hardware
-+ (name h-endian)
-+ (comment "Current endian mode")
-+ (attrs (ISA compact,media) VIRTUAL)
-+ (type register BI)
-+ (get () (c-call BI "sh64_endian"))
-+ (set (newval) (error "cannot alter target byte order mid-program"))
-+)
-+
-+(define-hardware
-+ (name h-ism)
-+ (comment "Current instruction set mode")
-+ (attrs (ISA compact,media))
-+ (type register BI)
-+ (get () (raw-reg h-ism))
-+ (set (newval) (error "cannot set ism directly"))
-+)
-+
-+
-+; Operands.
-+
-+(dnop endian "Endian mode" ((ISA compact,media)) h-endian f-nil)
-+(dnop ism "Instruction set mode" ((ISA compact,media)) h-ism f-nil)
-+
-+; Universally useful macros.
-+
-+; A pmacro for use in semantic bodies of unimplemented insns.
-+(define-pmacro (unimp mnemonic) (nop))
-+
-+; Join 2 ints together in natural bit order.
-+(define-pmacro (-join-si s1 s0)
-+ (or (sll (zext DI s1) 32)
-+ (zext DI s0)))
-+
-+; Join 4 half-ints together in natural bit order.
-+(define-pmacro (-join-hi h3 h2 h1 h0)
-+ (or (sll (zext DI h3) 48)
-+ (or (sll (zext DI h2) 32)
-+ (or (sll (zext DI h1) 16)
-+ (zext DI h0)))))
-+
-+; Join 8 quarter-ints together in natural bit order.
-+(define-pmacro (-join-qi b7 b6 b5 b4 b3 b2 b1 b0)
-+ (or (sll (zext DI b7) 56)
-+ (or (sll (zext DI b6) 48)
-+ (or (sll (zext DI b5) 40)
-+ (or (sll (zext DI b4) 32)
-+ (or (sll (zext DI b3) 24)
-+ (or (sll (zext DI b2) 16)
-+ (or (sll (zext DI b1) 8)
-+ (zext DI b0)))))))))
-+
-+
-+; Include the two instruction set descriptions from their respective
-+; source files.
-+
-+(if (keep-isa? (compact))
-+ (include "sh64-compact.cpu"))
-+
-+(if (keep-isa? (media))
-+ (include "sh64-media.cpu"))
-diff -Nur binutils-2.24.orig/cgen/cpu/sh.opc binutils-2.24/cgen/cpu/sh.opc
---- binutils-2.24.orig/cgen/cpu/sh.opc 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/sh.opc 2016-06-30 21:26:12.641892646 +0200
-@@ -0,0 +1,56 @@
-+/* SHmedia opcode support. -*- C -*-
-+ Copyright (C) 2000, 2001, 2005 Red Hat, Inc.
-+ This file is part of CGEN. */
-+
-+/* This file is an addendum to sh-media.cpu. Heavy use of C code isn't
-+ appropriate in .cpu files, so it resides here. This especially applies
-+ to assembly/disassembly where parsing/printing can be quite involved.
-+ Such things aren't really part of the specification of the cpu, per se,
-+ so .cpu files provide the general framework and .opc files handle the
-+ nitty-gritty details as necessary.
-+
-+ Each section is delimited with start and end markers.
-+
-+ <arch>-opc.h additions use: "-- opc.h"
-+ <arch>-opc.c additions use: "-- opc.c"
-+ <arch>-asm.c additions use: "-- asm.c"
-+ <arch>-dis.c additions use: "-- dis.c"
-+ <arch>-ibd.h additions use: "-- ibd.h" */
-+
-+/* -- opc.h */
-+
-+/* Allows reason codes to be output when assembler errors occur. */
-+#define CGEN_VERBOSE_ASSEMBLER_ERRORS
-+
-+/* Override disassembly hashing - there are variable bits in the top
-+ byte of these instructions. */
-+#define CGEN_DIS_HASH_SIZE 8
-+#define CGEN_DIS_HASH(buf,value) (((* (unsigned char*) (buf)) >> 6) % CGEN_DIS_HASH_SIZE)
-+
-+/* -- asm.c */
-+
-+static const char *
-+parse_fsd (CGEN_CPU_DESC cd,
-+ const char ** strp,
-+ int opindex,
-+ long * valuep)
-+{
-+ abort ();
-+}
-+
-+/* -- dis.c */
-+
-+static void
-+print_likely (CGEN_CPU_DESC cd,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs,
-+ bfd_vma pc,
-+ int length)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ (*info->fprintf_func) (info->stream, (value) ? "/l" : "/u");
-+}
-+
-+/* -- */
-diff -Nur binutils-2.24.orig/cgen/cpu/simplify.inc binutils-2.24/cgen/cpu/simplify.inc
---- binutils-2.24.orig/cgen/cpu/simplify.inc 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/simplify.inc 2016-06-30 21:26:12.641892646 +0200
-@@ -0,0 +1,198 @@
-+; Collection of macros to simplify .cpu file writing. -*- Scheme -*-
-+; Copyright (C) 2000 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; Enums.
-+
-+; Define a normal enum without using name/value pairs.
-+; This is currently the same as define-full-enum but it needn't remain
-+; that way (it's define-full-enum that would change).
-+
-+(define-pmacro (define-normal-enum name comment attrs prefix vals)
-+ "\
-+Define a normal enum, fixed number of arguments.
-+"
-+ (define-full-enum name comment attrs prefix vals)
-+)
-+
-+; Define a normal insn enum.
-+
-+(define-pmacro (define-normal-insn-enum name comment attrs prefix fld vals)
-+ "\
-+Define a normal instruction opcode enum.
-+"
-+ (define-full-insn-enum name comment attrs prefix fld vals)
-+)
-+
-+; Instruction fields.
-+
-+; Normally, fields are unsigned have no encode/decode needs.
-+
-+(define-pmacro (define-normal-ifield name comment attrs start length)
-+ "Define a normal instruction field.\n"
-+ (define-full-ifield name comment attrs start length UINT #f #f)
-+)
-+
-+; For those who don't like typing.
-+
-+(define-pmacro df
-+ "Shorthand form of define-full-ifield.\n"
-+ define-full-ifield
-+)
-+(define-pmacro dnf
-+ "Shorthand form of define-normal-ifield.\n"
-+ define-normal-ifield
-+)
-+
-+; Define a normal multi-ifield.
-+; FIXME: The define-normal version for ifields doesn't include the mode.
-+
-+(define-pmacro (define-normal-multi-ifield name comment attrs
-+ mode subflds insert extract)
-+ "Define a normal multi-part instruction field.\n"
-+ (define-full-multi-ifield name comment attrs mode subflds insert extract)
-+)
-+
-+; For those who don't like typing.
-+
-+(define-pmacro dnmf
-+ "Shorthand form of define-normal-multi-ifield.\n"
-+ define-normal-multi-ifield
-+)
-+
-+; Simple multi-ifields: mode is UINT, default insert/extract support.
-+
-+(define-pmacro (dsmf name comment attrs subflds)
-+ "Define a simple multi-part instruction field.\n"
-+ (define-full-multi-ifield name comment attrs UINT subflds #f #f)
-+)
-+
-+; Hardware.
-+
-+; Simpler version for most hardware elements.
-+; Allow special assembler support specification but no semantic-name or
-+; get/set specs.
-+
-+(define-pmacro (define-normal-hardware name comment attrs type
-+ indices values handlers)
-+ "\
-+Define a normal hardware element.
-+"
-+ (define-full-hardware name comment attrs name type
-+ indices values handlers () () ())
-+)
-+
-+; For those who don't like typing.
-+
-+(define-pmacro dnh
-+ "Shorthand form of define-normal-hardware.\n"
-+ define-normal-hardware
-+)
-+
-+; Simpler version of dnh that leaves out the indices, values, handlers,
-+; get, set, and layout specs.
-+; This is useful for 1 bit registers.
-+; ??? While dsh and dnh aren't that distinguishable when perusing a .cpu file,
-+; they both take a fixed number of positional arguments, and dsh is a proper
-+; subset of dnh with all arguments in the same positions, so methinks things
-+; are ok.
-+
-+(define-pmacro (define-simple-hardware name comment attrs type)
-+ "\
-+Define a simple hardware element (usually a scalar register).
-+"
-+ (define-full-hardware name comment attrs name type () () () () () ())
-+)
-+
-+(define-pmacro dsh
-+ "Shorthand form of define-simple-hardware.\n"
-+ define-simple-hardware
-+)
-+
-+; Operands.
-+
-+(define-pmacro (define-normal-operand name comment attrs type index)
-+ "Define a normal operand.\n"
-+ (define-full-operand name comment attrs type DFLT index () () ())
-+)
-+
-+; For those who don't like typing.
-+; FIXME: dno?
-+
-+(define-pmacro dnop
-+ "Shorthand form of define-normal-operand.\n"
-+ define-normal-operand
-+)
-+
-+(define-pmacro (dndo x-name x-mode x-args
-+ x-syntax x-base-ifield x-encoding x-ifield-assertion
-+ x-getter x-setter)
-+ "Define a normal derived operand."
-+ (define-derived-operand
-+ (name x-name)
-+ (mode x-mode)
-+ (args x-args)
-+ (syntax x-syntax)
-+ (base-ifield x-base-ifield)
-+ (encoding x-encoding)
-+ (ifield-assertion x-ifield-assertion)
-+ (getter x-getter)
-+ (setter x-setter)
-+ )
-+)
-+
-+; Instructions.
-+
-+; Define an instruction object, normal version.
-+; At present all fields must be specified.
-+; Fields ifield-assertion is absent.
-+
-+(define-pmacro (define-normal-insn name comment attrs syntax fmt semantics timing)
-+ "Define a normal instruction.\n"
-+ (define-full-insn name comment attrs syntax fmt () semantics timing ())
-+)
-+
-+; To reduce the amount of typing.
-+; Note that this is the same name as the D'ni in MYST. Oooohhhh.....
-+; this must be the right way to go. :-)
-+
-+(define-pmacro dni
-+ "Shorthand form of define-normal-insn.\n"
-+ define-normal-insn
-+)
-+
-+; Macro instructions.
-+
-+; Define a macro-insn object, normal version.
-+; This only supports expanding to one real insn.
-+
-+(define-pmacro (define-normal-macro-insn name comment attrs syntax expansion)
-+ "Define a normal macro instruction.\n"
-+ (define-full-minsn name comment attrs syntax expansion)
-+)
-+
-+; To reduce the amount of typing.
-+
-+(define-pmacro dnmi
-+ "Shorthand form of define-normal-macro-insn.\n"
-+ define-normal-macro-insn
-+)
-+
-+; Modes.
-+; ??? Not currently available for use.
-+;
-+; Define Normal Mode
-+;
-+;(define-pmacro (define-normal-mode name comment attrs bits bytes
-+; non-mode-c-type printf-type sem-mode ptr-to host?)
-+; "Define a normal mode.\n"
-+; (define-full-mode name comment attrs bits bytes
-+; non-mode-c-type printf-type sem-mode ptr-to host?)
-+;)
-+;
-+; For those who don't like typing.
-+;(define-pmacro dnm
-+; "Shorthand form of define-normal-mode.\n"
-+; define-normal-mode
-+;)
-diff -Nur binutils-2.24.orig/cgen/cpu/sparc32.cpu binutils-2.24/cgen/cpu/sparc32.cpu
---- binutils-2.24.orig/cgen/cpu/sparc32.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/sparc32.cpu 2016-06-30 21:26:12.645892801 +0200
-@@ -0,0 +1,170 @@
-+; SPARC32 CPU description. -*- Scheme -*-
-+; This file contains elements specific to sparc32.
-+; Copyright (C) 2000 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; Notes:
-+; - sparc64 support wip
-+; - fp support todo
-+; - source file layout wip
-+; - cpu family layout wip
-+
-+; ??? For the nonce there is one cpu family to cover all 32 bit sparcs.
-+; It's not clear this will work, but following the goal of incremental
-+; complication ....
-+
-+(define-cpu
-+ (name sparc32)
-+ (comment "SPARC 32 bit architecture")
-+ (endian big)
-+ (word-bitsize 32)
-+ ; Generated files have a "32" suffix.
-+ (file-transform "32")
-+)
-+
-+(define-mach
-+ (name sparc-v8)
-+ (comment "sparc v8")
-+ (cpu sparc32)
-+ (bfd-name "sparc")
-+)
-+
-+(define-mach
-+ (name sparclite)
-+ (comment "Fujitsu sparclite")
-+ (cpu sparc32)
-+ (bfd-name "sparc_sparclite")
-+)
-+
-+; sparc32 models
-+
-+(define-model
-+ (name sparc32-def)
-+ (comment "sparc32 default")
-+ (attrs)
-+ (mach sparc-v8)
-+ ; wip
-+ (pipeline p-foo "" () ((fetch) (decode) (execute) (memory) (writeback)))
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () () () ())
-+)
-+
-+; sparc32 enums of opcodes, special insn values, etc.
-+
-+; sparc32 hardware pieces.
-+
-+; ??? impl,ver are left as part of h-psr (change maybe later)
-+(define-hardware
-+ (name h-psr)
-+ (comment "psr register")
-+ (type register USI)
-+ (get () (c-call USI "@cpu@_get_h_psr_handler"))
-+ (set (newval) (c-call VOID "@cpu@_set_h_psr_handler" newval))
-+)
-+
-+(dsh h-s "supervisor bit" () (register BI))
-+(dsh h-ps "previous supervisor bit" () (register BI))
-+
-+(dsh h-pil "processor interrupt level" () (register UQI))
-+
-+(dsh h-et "enable traps bit" () (register BI))
-+
-+(define-hardware
-+ (name h-tbr)
-+ (comment "trap base register")
-+ (type register WI)
-+ ;CPU (h_tbr) = (CPU (h_tbr) & 0xff0) | ((newval) & 0xfffff000);
-+ (set (newval) (set (raw-reg WI h-tbr)
-+ (or WI (and WI (raw-reg WI h-tbr) (const #xff0))
-+ (and WI newval (const #xfffff000)))))
-+)
-+
-+(define-hardware
-+ (name h-cwp)
-+ (comment "current window pointer")
-+ (type register UQI)
-+ (set (newval) (c-call VOID "@cpu@_set_h_cwp_handler" newval))
-+)
-+
-+(define-hardware
-+ (name h-wim)
-+ (comment "window invalid mask")
-+ (type register USI)
-+ ; ??? These just put ideas down so I can play with them. Ignore.
-+ ;(get (value index) (and SI value (c-code SI "((1 << NWINDOWS) - 1)")))
-+ ;(get (self mode index insn)
-+ ; (c-code USI "(CPU (h_wim) & ((1 << NWINDOWS) - 1))"))
-+ ;(set (self mode index insn newval)
-+ ; (s-eval `(set SI ,self (and SI ,newval (const #xff)))))
-+ (get () (and (raw-reg USI h-wim)
-+ (sub (sll (const 1) (c-raw-call SI "GET_NWINDOWS")) (const 1))))
-+)
-+
-+(dsh h-ag "alternate global indicator" () (register QI))
-+
-+; Coprocessor support.
-+
-+(dsh h-ec "enable coprocessor bit" () (register BI))
-+
-+; Floating point support.
-+; wip.
-+; - currently evaluating the various possibilities
-+
-+(dsh h-ef "enable fpu bit" () (register BI))
-+
-+(dsh h-fsr "floating point status register" () (register USI))
-+
-+; sparc32 instruction definitions.
-+
-+; Special register move operations.
-+
-+; %y is handled by the asr insns
-+
-+(dni rd-asr "read asr" ()
-+ "rd $rdasr,$rd" ; note: `rdasr' is for ReaD asr, `rd' is for Reg Dest.
-+ (+ OP_2 OP3_RDASR rd rdasr (f-i 0) (f-simm13 0))
-+ (set rd rdasr)
-+ ())
-+(dni wr-asr "write asr" ()
-+ "wr $rs1,$rs2,$wrasr"
-+ (+ OP_2 OP3_WRASR wrasr rs1 rs2 (f-i 0) (f-res-asi 0))
-+ (set wrasr (xor rs1 rs2))
-+ ())
-+(dni wr-asr-imm "write-imm asr" ()
-+ "wr $rs1,$simm13,$wrasr"
-+ (+ OP_2 OP3_WRASR wrasr rs1 (f-i 1) simm13)
-+ (set wrasr (xor rs1 simm13))
-+ ())
-+
-+(define-pmacro (rdwr-op name op3 asm-name reg-name)
-+ (begin
-+ (dni (.sym rd- name) (.str "read " name) ()
-+ (.str "rd " asm-name ",$rd")
-+ (+ OP_2 (.sym OP3_RD op3) rd (f-rs1 0) (f-i 0) (f-simm13 0))
-+ (set rd (reg WI reg-name))
-+ ())
-+ (dni (.sym wr- name) (.str "write " name) ()
-+ (.str "wr $rs1,$rs2," asm-name)
-+ (+ OP_2 (.sym OP3_WR op3) (f-rd 0) rs1 rs2 (f-i 0) (f-res-asi 0))
-+ (set (reg WI reg-name) (xor rs1 rs2))
-+ ())
-+ (dni (.sym wr- name -imm) (.str "write-imm " name) ()
-+ (.str "wr $rs1,$simm13," asm-name)
-+ (+ OP_2 (.sym OP3_WR op3) (f-rd 0) rs1 (f-i 1) simm13)
-+ (set (reg WI reg-name) (xor rs1 simm13))
-+ ())
-+ )
-+)
-+
-+(rdwr-op psr PSR "%psr" h-psr)
-+(rdwr-op wim WIM "%wim" h-wim)
-+(rdwr-op tbr TBR "%tbr" h-tbr)
-+
-+; TODO:
-+; - rdy,wry
-+; - stbar
-+; - flush
-+; - ldc, lddc, ldcsr, stc, stdc, stcsr, stdcq
-+; - cbccc, cpop
-diff -Nur binutils-2.24.orig/cgen/cpu/sparc64.cpu binutils-2.24/cgen/cpu/sparc64.cpu
---- binutils-2.24.orig/cgen/cpu/sparc64.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/sparc64.cpu 2016-06-30 21:26:12.645892801 +0200
-@@ -0,0 +1,422 @@
-+; SPARC64 CPU description. -*- Scheme -*-
-+; This file contains elements specific to sparc64.
-+; Copyright (C) 2000 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; Notes:
-+; - sparc64 support wip
-+; - fp support todo
-+; - source file layout wip
-+; - cpu family layout wip
-+
-+; ??? For the nonce there is one cpu family to cover all 64 bit sparcs.
-+; It's not clear this will work, but following the goal of incremental
-+; complication ....
-+
-+(define-cpu
-+ (name sparc64)
-+ (comment "SPARC 64 bit architecture")
-+ (endian big) ; ??? big insn, either data
-+ (word-bitsize 64)
-+ ; Generated files have a "64" suffix.
-+ (file-transform "64")
-+)
-+
-+(define-mach
-+ (name sparc-v9)
-+ (comment "sparc v9")
-+ ;(attrs S64-P)
-+ (cpu sparc64)
-+ (bfd-name "sparc_v9")
-+)
-+
-+(define-mach
-+ (name sparc-v9a)
-+ (comment "sparc v9a (sparc-v9 + vis)")
-+ ;(attrs S64-P)
-+ (cpu sparc64)
-+ (bfd-name "sparc_v9a")
-+)
-+
-+; sparc64 models
-+
-+(define-model
-+ (name sparc64-def)
-+ (comment "sparc64 default")
-+ (attrs)
-+ (mach sparc-v9)
-+ ; wip (Meaning, yes I know this is inaccurate, duh ...
-+ ; When I have time I'll finish this up right.
-+ ; Support for some of this isn't even implemented yet and support for the
-+ ; rest will be rewritten.)
-+ (pipeline p-foo "" () ((fetch) (decode) (execute) (memory) (writeback)))
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () () () ())
-+)
-+
-+; sparc64 instruction fields
-+
-+(dnf f-fmt2-cc1 "cc" ((MACH64)) 21 1)
-+(dnf f-fmt2-cc0 "cc" ((MACH64)) 20 1)
-+(dnf f-p "p" ((MACH64)) 19 1)
-+(dnf f-fmt2-rcond "fmt2 rcond" ((MACH64)) 27 3)
-+(df f-disp19 "disp19" (PCREL-ADDR (MACH64)) 13 19 INT #f #f)
-+(dnf f-fmt3-rcond "fmt3 rcond" ((MACH64)) 19 3)
-+(dnf f-shcnt64 "shcnt64" ((MACH64)) 5 6)
-+(dnf f-fmt4-cond "cond" ((MACH64)) 14 4)
-+(dnf f-fmt4-ccx-hi "ccx hi" ((MACH64)) 13 1)
-+(dnf f-fmt4-ccx-lo "ccx lo" ((MACH64)) 19 2)
-+(dnf f-fmt4-rcond "fmt4 rcond" ((MACH64)) 19 3)
-+(dnf f-fmt4-cc2 "fmt4 cc2" ((MACH64)) 18 1)
-+(dnf f-fmt4-cc1-0 "fmt4 cc1,cc0" ((MACH64)) 12 2)
-+(dnf f-fmt4-res10-6 "reserved bits in movcc insns" (RESERVED (MACH64)) 10 6)
-+
-+; The disp16 field requires a bit of special handling as it is split in two.
-+(df f-disp16-hi "disp16 hi" ((MACH64)) 10 2 INT #f #f)
-+(dnf f-disp16-lo "disp16 lo" ((MACH64)) 18 14)
-+(dnmf f-disp16 "disp16" (PCREL-ADDR (MACH64)) INT
-+ (f-disp16-hi f-disp16-lo)
-+ (sequence () ; insert
-+ (set (ifield f-disp16-hi) (srl (ifield f-disp16) (const 14)))
-+ (set (ifield f-disp16-lo) (and (ifield f-disp16) (const #x3fff)))
-+ )
-+ (sequence () ; extract
-+ ; ??? where will pc be added?
-+ (set (ifield f-disp16) (or (sll (ifield f-disp16-hi) (const 14))
-+ (ifield f-disp16-low)))
-+ )
-+)
-+
-+(dnf f-res-18-19 "reserved bits in done/retry" (RESERVED (MACH64)) 18 19)
-+
-+; sparc64 enums of opcodes, special insn values, etc.
-+
-+(define-normal-insn-enum insn-rcond "rcond op values" () RCOND_ f-fmt2-rcond
-+ (
-+ (BRZ 1)
-+ (BRLEZ 2)
-+ (BRLZ 3)
-+ (BRNZ 5)
-+ (BRGZ 6)
-+ (BRGEZ 7)
-+ )
-+)
-+
-+; sparc64 hardware pieces.
-+
-+(dsh h-ver "version" ((MACH64)) (register UDI))
-+
-+(dsh h-pstate "processor state" ((MACH64)) (register UDI))
-+
-+(dsh h-tba "trap base address" ((MACH64)) (register UDI))
-+
-+; FIXME: These are a stack of values.
-+(dsh h-tt "trap type" ((MACH64)) (register UDI))
-+(dsh h-tpc "trap pc" ((MACH64)) (register UDI))
-+(dsh h-tnpc "trap npc" ((MACH64)) (register UDI))
-+(dsh h-tstate "trap state" ((MACH64)) (register UDI))
-+
-+(dsh h-tl "trap level" ((MACH64)) (register UQI))
-+
-+(dsh h-asi "address space identifier" ((MACH64)) (register UQI))
-+
-+(dsh h-tick "tick counter" ((MACH64)) (register UDI))
-+
-+(dsh h-cansave "savable window registers" ((MACH64)) (register UDI))
-+(dsh h-canrestore "restorable window registers" ((MACH64)) (register UDI))
-+(dsh h-otherwin "other window registers" ((MACH64)) (register UDI))
-+(dsh h-cleanwin "clean window registers" ((MACH64)) (register UDI))
-+
-+(dsh h-wstate "window state" ((MACH64)) (register UDI))
-+
-+(define-hardware
-+ (name h-ixcc)
-+ (comment "condition code selector")
-+ (attrs (MACH64))
-+ (type immediate (UINT 1))
-+ (values keyword "%" (("icc" 0) ("xcc" 1)))
-+)
-+
-+(define-hardware
-+ (name h-p)
-+ (comment "prediction bit")
-+ (attrs (MACH64))
-+ (type immediate (UINT 1))
-+ (values keyword "" (("" 0) (",pf" 0) (",pt" 1)))
-+)
-+
-+; sparc64 operands
-+
-+(dnop ixcc "%icc,%xcc arg to bpcc insns" ((MACH64)) h-ixcc f-fmt2-cc1)
-+
-+(dnop p "prediction bit" ((MACH64)) h-p f-p)
-+
-+(dnop disp16 "16 bit displacement" ((MACH64)) h-iaddr f-disp16)
-+(dnop disp19 "19 bit displacement" ((MACH64)) h-iaddr f-disp19)
-+
-+; sparc64 branches
-+
-+(dnf f-bpr-res28-1 "reserved bit 28 in bpr insn" (RESERVED (MACH64)) 28 1)
-+
-+(define-pmacro (bpr-cbranch name comment rcond-op comp-op)
-+ (dni name (.str comment ", v9 page 136")
-+ ((MACH64))
-+ (.str name "$a$p $rs1,$disp16")
-+ (+ OP_0 a (f-bpr-res28-1 0) (.sym RCOND_ rcond-op)
-+ OP2_BPR p rs1 disp16)
-+ (delay (const 1)
-+ (if (comp-op rs1 (const 0))
-+ (set pc disp16)
-+ (annul a)))
-+ ())
-+)
-+(bpr-cbranch beqz "beqz" BRZ eq)
-+(bpr-cbranch bgez "bgez" BRGEZ ge)
-+(bpr-cbranch bgtz "bgtz" BRGZ gt)
-+(bpr-cbranch blez "blez" BRLEZ le)
-+(bpr-cbranch bltz "bltz" BRLZ lt)
-+(bpr-cbranch bnez "bnez" BRNZ ne)
-+
-+(define-pmacro (bpcc-branch bname comment cond test br-sem)
-+ (dni (.sym bpcc- bname)
-+ (.str "branch with prediction %icc " comment ", v9 page 146")
-+ ((MACH64))
-+ (.str bname "$a$p %icc,$disp19")
-+ (+ OP_0 a cond OP2_BPCC (f-fmt2-cc1 0) (f-fmt2-cc0 0) p disp19)
-+ (br-sem test icc)
-+ ())
-+ (dni (.sym bpcc- bname)
-+ (.str "branch with prediction %xcc " comment ", v9 page 146")
-+ ((MACH64))
-+ (.str bname "$a$p %xcc,$disp19")
-+ (+ OP_0 a cond OP2_BPCC (f-fmt2-cc1 1) (f-fmt2-cc0 0) p disp19)
-+ (br-sem test xcc)
-+ ())
-+)
-+; test-*,uncond-br-sem,cond-br-sem are defined in sparc.cpu.
-+(bpcc-branch ba "always" CC_A test-always uncond-br-sem)
-+(bpcc-branch bn "never" CC_N test-never uncond-br-sem)
-+(bpcc-branch bne "ne" CC_NE test-ne cond-br-sem)
-+(bpcc-branch be "eq" CC_E test-eq cond-br-sem)
-+(bpcc-branch bg "gt" CC_G test-gt cond-br-sem)
-+(bpcc-branch ble "le" CC_LE test-le cond-br-sem)
-+(bpcc-branch bge "ge" CC_GE test-ge cond-br-sem)
-+(bpcc-branch bl "lt" CC_L test-lt cond-br-sem)
-+(bpcc-branch bgu "gtu" CC_GU test-gtu cond-br-sem)
-+(bpcc-branch bleu "leu" CC_LEU test-leu cond-br-sem)
-+(bpcc-branch bcc "geu" CC_CC test-geu cond-br-sem)
-+(bpcc-branch bcs "ltu" CC_CS test-ltu cond-br-sem)
-+(bpcc-branch bpos "pos" CC_POS test-pos cond-br-sem)
-+(bpcc-branch bneg "neg" CC_NEG test-neg cond-br-sem)
-+(bpcc-branch bvc "vc" CC_VC test-vc cond-br-sem)
-+(bpcc-branch bvs "vs" CC_VS test-vs cond-br-sem)
-+
-+; Misc.
-+
-+(dni done "done, v9 page 155" ((MACH64))
-+ "done"
-+ (+ OP_2 (f-fcn 0) OP3_DONE_RETRY (f-res-18-19 0))
-+ (c-call "@cpu@_done" pc)
-+ ()
-+)
-+(dni retry "retry, v9 page 155" ((MACH64))
-+ "done"
-+ (+ OP_2 (f-fcn 1) OP3_DONE_RETRY (f-res-18-19 0))
-+ (c-call "@cpu@_retry" pc)
-+ ()
-+)
-+
-+(dni flush "flush instruction memory rs1+rs2, v9 page 165" ((MACH64))
-+ "flush"
-+ (+ OP_2 (f-rd 0) OP3_FLUSH rs1 (f-i 0) (f-res-asi 0) rs2)
-+ (c-call "@cpu@_flush" pc (add rs1 rs2))
-+ ()
-+)
-+(dni flush-imm "flush instruction memory rs1+simm13, v9 page 165" ((MACH64))
-+ "flush"
-+ (+ OP_2 (f-rd 0) OP3_FLUSH rs1 (f-i 1) simm13)
-+ (c-call "@cpu@_flush" pc (add rs1 simm13))
-+ ()
-+)
-+
-+(dni flushw "flush register windows, v9 page 167" ((MACH64))
-+ "flushw"
-+ (+ OP_2 (f-rd 0) OP3_FLUSHW (f-rs1 0) (f-i 0) (f-simm13 0))
-+ (c-call "@cpu@_flushw" pc)
-+ ()
-+)
-+
-+; On sparc64 unimp is called illtrap.
-+
-+(dnmi illtrap "illegal instruction trap, v9 page 168" ((MACH64))
-+ "illtrap $imm22"
-+ (emit unimp imm22)
-+)
-+
-+; Impdep insns
-+
-+(dnf f-impdep5 "5 bit field in impdep insns" ((MACH64)) 29 5)
-+(dnf f-impdep19 "19 bit field in impdep insns" ((MACH64)) 18 19)
-+
-+(dnop impdep5 "5 bit arg in impdep insns" ((MACH64)) h-uint f-impdep5)
-+(dnop impdep19 "19 bit arg in impdep insns" ((MACH64)) h-uint f-impdep19)
-+
-+(dni impdep1 "implementation dependent instruction 1, v9 page 169"
-+ ((MACH64))
-+ "impdep1 $impdep5,$impdep19"
-+ (+ OP_2 impdep5 OP3_IMPDEP1 impdep19)
-+ (c-call "@cpu@_impdep1" pc impdep5 impdep19)
-+ ()
-+)
-+(dni impdep2 "implementation dependent instruction 1, v9 page 169"
-+ ((MACH64))
-+ "impdep2 $impdep5,$impdep19"
-+ (+ OP_2 impdep5 OP3_IMPDEP2 impdep19)
-+ (c-call "@cpu@_impdep2" pc impdep5 impdep19)
-+ ()
-+)
-+
-+; Memory barrier insn
-+
-+(dnf f-membar-res12-6 "reserved bits 12-7 in membar insn"
-+ (RESERVED (MACH64)) 12 6)
-+(dnf f-cmask "cmask field in membar insn" ((MACH64)) 6 3)
-+(dnf f-mmask "mmask field in membar insn" ((MACH64)) 3 4)
-+(dnf f-membarmask "cmask+mmask field in membar insn" ((MACH64)) 6 7)
-+
-+(define-hardware
-+ (name h-membarmask)
-+ (comment "membar mask")
-+ (attrs (MACH64))
-+ (type immediate (UINT 7))
-+ (values keyword "" (
-+ ("#StoreStore" #x8)
-+ ("#LoadStore" #x4)
-+ ("#StoreLoad" #x2)
-+ ("#LoadLoad" #x1)
-+ ("#Sync" #x40)
-+ ("#MemIssue" #x20)
-+ ("#Lookaside" #x10)
-+ ))
-+)
-+
-+(define-operand
-+ (name membarmask)
-+ (comment "cmask+mmask arg in membar insn")
-+ (attrs (MACH64))
-+ (type h-membarmask)
-+ (index f-membarmask)
-+ (handlers (parse "membar_mask")
-+ (print "membar_mask"))
-+)
-+
-+(dni membar "memory barrier, v9 page 183"
-+ ((MACH64))
-+ "member $membarmask" ; ${membar-mask}
-+ (+ OP_2 (f-rd 0) OP3_MEMBAR (f-rs1 15) (f-i 1) (f-membar-res12-6 0)
-+ membarmask)
-+ (c-call "@cpu@_membar" pc membarmask)
-+ ()
-+)
-+
-+; Conditional move insns
-+
-+(df f-simm11 "11 bit signed immediate field" ((MACH64)) 10 11 INT #f #f)
-+
-+(dnop simm11 "11 bit signed immediate arg to condition move insns"
-+ ((MACH64)) h-sint f-simm11)
-+
-+(define-pmacro (cond-move-1 name comment mnemonic cc-prefix cc-name cc-opcode
-+ src-name src-opcode cond test)
-+ (dni name
-+ (.str "move %" cc-name " " comment ", v9 page 191")
-+ ((MACH64))
-+ (.str mnemonic " " cc-prefix cc-name ",$" src-name ",$rd")
-+ (.splice + OP_2 rd OP3_MOVCC cond
-+ (.unsplice cc-opcode) (.unsplice src-opcode))
-+ (if (test cc-name)
-+ (set rd src-name))
-+ ())
-+)
-+
-+(define-pmacro (cond-move name comment cond test)
-+ (begin
-+ (cond-move-1 (.sym name -icc) comment
-+ name "%" icc ((f-fmt4-cc2 1) (f-fmt4-cc1-0 0))
-+ rs2 ((f-i 0) (f-fmt4-res10-6 0) rs2)
-+ cond test)
-+ (cond-move-1 (.sym name -imm-icc) comment
-+ name "%" icc ((f-fmt4-cc2 1) (f-fmt4-cc1-0 0))
-+ simm11 ((f-i 1) simm11)
-+ cond test)
-+ (cond-move-1 (.sym name -xcc) comment
-+ name "%" xcc ((f-fmt4-cc2 1) (f-fmt4-cc1-0 2))
-+ rs2 ((f-i 0) (f-fmt4-res10-6 0) rs2)
-+ cond test)
-+ (cond-move-1 (.sym name -imm-xcc) comment
-+ name "%" xcc ((f-fmt4-cc2 1) (f-fmt4-cc1-0 2))
-+ simm11 ((f-i 1) simm11)
-+ cond test)
-+ )
-+)
-+; test-* are defined in sparc.cpu.
-+(cond-move mova "always" CC_A test-always)
-+(cond-move movn "never" CC_N test-never)
-+(cond-move movne "ne" CC_NE test-ne)
-+(cond-move move "eq" CC_E test-eq)
-+(cond-move movg "gt" CC_G test-gt)
-+(cond-move movle "le" CC_LE test-le)
-+(cond-move movge "ge" CC_GE test-ge)
-+(cond-move movl "lt" CC_L test-lt)
-+(cond-move movgu "gtu" CC_GU test-gtu)
-+(cond-move movleu "leu" CC_LEU test-leu)
-+(cond-move movcc "geu" CC_CC test-geu)
-+(cond-move movcs "ltu" CC_CS test-ltu)
-+(cond-move movpos "pos" CC_POS test-pos)
-+(cond-move movneg "neg" CC_NEG test-neg)
-+(cond-move movvc "vc" CC_VC test-vc)
-+(cond-move movvs "vs" CC_VS test-vs)
-+
-+; Arithmetic binary ops
-+
-+(define-pmacro (v8-addx-rename old new)
-+ (begin
-+ (dnmi new
-+ (.str old " in v8 is " new " in v9, v9 page 135") ()
-+ (.str new " $rs1,$rs2,$rd")
-+ (emit old rs1 rs2 rd))
-+ (dnmi (.sym new -imm)
-+ (.str old " in v8 is " new " in v9, v9 page 135") ()
-+ (.str new " $rs1,$simm13,$rd")
-+ (emit old rs1 simm13 rd))
-+ )
-+)
-+(v8-addx-rename addx addc)
-+(v8-addx-rename addxcc addccc)
-+
-+; Binary boolean ops
-+
-+(define-pmacro (s64-set-bool-flags x)
-+ (sequence ()
-+ (set icc-z (zflag (trunc SI x)))
-+ (set icc-n (nflag (trunc SI x)))
-+ (set icc-c (const 0))
-+ (set icc-v (const 0))
-+ (set xcc-z (zflag x))
-+ (set xcc-n (nflag x))
-+ (set xcc-c (const 0))
-+ (set xcc-v (const 0))
-+ )
-+)
-+
-+; Multiply/Divide
-+
-+; FIXME: flags handling incomplete
-+; FIXME: div-binop is in sparccom.cpu which is included later.
-+;(div-binop s64-sdiv "sdiv" MACH64 SDIV div ext: (s64-set-bool-flags rd))
-+;(div-binop s64-udiv "udiv" MACH64 UDIV div zext: (s64-set-bool-flags rd))
-+
-+; TODO
-+; - casa, casxa
-diff -Nur binutils-2.24.orig/cgen/cpu/sparccom.cpu binutils-2.24/cgen/cpu/sparccom.cpu
---- binutils-2.24.orig/cgen/cpu/sparccom.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/sparccom.cpu 2016-06-30 21:26:12.645892801 +0200
-@@ -0,0 +1,766 @@
-+; SPARC 32/64 CPU description. -*- Scheme -*-
-+; This file contains instructions common to both sparc32/sparc64.
-+; It also contains sparc32/64 specific insns, but only when they are a variant
-+; of a collection of common ones.
-+; Copyright (C) 2000 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; Notes:
-+; - sparc64 support wip
-+; - fp support todo
-+; - source file layout wip
-+; - cpu family layout wip
-+
-+; Lots of sparc insns have either reg/reg or reg/simm13 cases. */
-+
-+(define-pmacro (op3-reg-fmt op3-code)
-+ (+ OP_2 op3-code rd rs1 rs2 (f-i 0) (f-res-asi 0))
-+)
-+(define-pmacro (op3-imm-fmt op3-code)
-+ (+ OP_2 op3-code rd rs1 (f-i 1) simm13)
-+)
-+
-+; Load/Store ops
-+
-+(define-pmacro (ld-op name comment attrs op3 mode dest)
-+ (begin
-+ (dnmi (.sym name "-reg+g0") comment attrs
-+ (.str name " [$rs1],$" dest)
-+ (emit (.sym name -reg+reg) rs1 (rs2 0) dest))
-+ (dnmi (.sym name "-reg+0") comment attrs
-+ (.str name " [$rs1],$" dest)
-+ (emit (.sym name -reg+imm) rs1 (simm13 0) dest))
-+ (dni (.sym name "-reg+reg") comment attrs
-+ (.str name " [$rs1+$rs2],$" dest)
-+ (+ OP_3 op3 dest rs1 (f-i 0) (f-res-asi 0) rs2)
-+ (set mode dest (mem mode (add WI rs1 rs2)))
-+ ())
-+ (dni (.sym name "-reg+imm") comment attrs
-+ (.str name " [$rs1+$simm13],$" dest)
-+ (+ OP_3 op3 dest rs1 (f-i 1) simm13)
-+ (set mode dest (mem mode (add WI rs1 simm13)))
-+ ())
-+ (dnmi (.sym name "-reg/asi") comment attrs
-+ (.str name " [$rs1]$asi,$" dest)
-+ (emit (.sym name -reg+reg/asi) rs1 (rs2 0) asi dest))
-+ (dni (.sym name "-reg+reg/asi") comment attrs
-+ (.str name " [$rs1+$rs2]$asi,$" dest)
-+ (+ OP_3 (.sym op3 A) dest rs1 (f-i 0) asi rs2)
-+ (set mode dest (mem mode (add WI rs1 rs2)))
-+ ())
-+ )
-+)
-+(ld-op ldsb "load signed byte" () OP3_LDSB QI rd)
-+(ld-op ldub "load unsigned byte" () OP3_LDUB UQI rd)
-+(ld-op ldsh "load signed halfword" () OP3_LDSH HI rd)
-+(ld-op lduh "load unsigned halfword" () OP3_LDUH UHI rd)
-+(ld-op ldsw "load signed word" () OP3_LDSW SI rd)
-+(ld-op lduw "load unsigned word" () OP3_LDUW USI rd)
-+(ld-op ldx "load extended word" ((MACH64)) OP3_LDX DI rd)
-+
-+; Aliases are treated as such (ALIAS attribute) so we can use ld-op.
-+; ??? Perhaps lduw should be the alias. Let's leave it like this for now.
-+(ld-op ld "load word" (ALIAS) OP3_LDUW SI rd)
-+
-+; ??? This would work with special operand get/set support but
-+; it's not clear this case justifies implementing that yet.
-+;(ld-op ldd "load double reg" () OP3_LDD DI rdd)
-+
-+(dnmi ldd-reg+g0 "load double reg, reg+g0" ()
-+ "ldd [$rs1],$rdd"
-+ (emit ldd-reg+reg rs1 (rs2 0) rdd)
-+)
-+(dnmi ldd-reg+0 "load double reg, reg+0" ()
-+ "ldd [$rs1],$rdd"
-+ (emit ldd-reg+imm rs1 (simm13 0) rdd)
-+)
-+(dni ldd-reg+reg "load double reg, reg+reg" ()
-+ "ldd [$rs1+$rs2],$rdd"
-+ (+ OP_3 OP3_LDD rdd rs1 (f-i 0) (f-res-asi 0) rs2)
-+ (sequence ((DI temp))
-+ (set temp (mem DI (add WI rs1 rs2)))
-+ (set rdd (subword SI temp (const 0)))
-+ (set (reg h-gr (add (regno rdd) (const 1)))
-+ (subword SI temp (const 1))))
-+ ()
-+)
-+(dni ldd-reg+imm "load double reg, reg+imm" ()
-+ "ldd [$rs1+$simm13],$rdd"
-+ (+ OP_3 OP3_LDD rdd rs1 (f-i 1) simm13)
-+ (sequence ()
-+ (set rdd (mem SI (add WI rs1 simm13)))
-+ (set (reg h-gr (add (regno rdd) (const 1)))
-+ (mem SI (add rs1 (add simm13 (const 4))))))
-+ ()
-+)
-+(dnmi ldd-reg/asi "load double reg, reg+g0/asi" ()
-+ "ldd [$rs1]$asi,$rdd"
-+ (emit ldd-reg+reg/asi rs1 (rs2 0) asi rdd)
-+)
-+(dni ldd-reg+reg/asi "load double reg, reg+reg/asi" ()
-+ "ldd [$rs1+$rs2]$asi,$rdd"
-+ (+ OP_3 OP3_LDDA rdd rs1 (f-i 0) asi rs2)
-+ (sequence ()
-+ (set rdd (mem SI (add WI rs1 rs2)))
-+ (set (reg h-gr (add (regno rdd) (const 1)))
-+ (mem SI (add rs1 (add rs2 (const 4))))))
-+ ()
-+)
-+
-+(define-pmacro (st-op name comment attrs op3 mode src)
-+ (begin
-+ (dnmi (.sym name "-reg+g0") comment attrs
-+ (.str name " $" src ",[$rs1]")
-+ (emit (.sym name -reg+reg) src rs1 (rs2 0)))
-+ (dnmi (.sym name "-reg+0") comment attrs
-+ (.str name " $" src ",[$rs1]")
-+ (emit (.sym name -reg+imm) src rs1 (simm13 0)))
-+ (dni (.sym name "-reg+reg") comment attrs
-+ (.str name " $" src ",[$rs1+$rs2]")
-+ (+ OP_3 op3 src rs1 (f-i 0) (f-res-asi 0) rs2)
-+ (set mode (mem mode (add WI rs1 rs2)) src)
-+ ())
-+ (dni (.sym name "-reg+imm") comment attrs
-+ (.str name " $" src ",[$rs1+$simm13]")
-+ (+ OP_3 op3 src rs1 (f-i 1) simm13)
-+ (set mode (mem mode (add WI rs1 simm13)) src)
-+ ())
-+ (dnmi (.sym name "-reg/asi") comment attrs
-+ (.str name " $" src ",[$rs1]$asi")
-+ (emit (.sym name -reg+reg/asi) src rs1 (rs2 0) asi))
-+ (dni (.sym name "-reg+reg/asi") comment attrs
-+ (.str name " $" src ",[$rs1+$rs2]$asi")
-+ (+ OP_3 (.sym op3 A) src rs1 (f-i 0) asi rs2)
-+ (set mode (mem mode (add WI rs1 rs2)) src)
-+ ())
-+ )
-+)
-+(st-op stb "store byte" () OP3_STB QI rd)
-+(st-op sth "store halfword" () OP3_STH HI rd)
-+(st-op st "store word" () OP3_STW SI rd)
-+(st-op stx "store extended word" ((MACH64)) OP3_STX DI rd)
-+
-+; ??? This would work with special operand get/set support but
-+; it's not clear this case justifies implementing that yet.
-+;(st-op std "store double reg" () OP3_STD DI rdd)
-+
-+(dnmi std-reg+g0 "store double reg, reg+g0" ()
-+ "std $rdd,[$rs1]"
-+ (emit std-reg+reg rdd rs1 (rs2 0))
-+)
-+(dnmi std-reg+0 "store double reg, reg+0" ()
-+ "std $rdd,[$rs1]"
-+ (emit std-reg+imm rdd rs1 (simm13 0))
-+)
-+(dni std-reg+reg "store double reg, reg+reg" ()
-+ "std $rdd,[$rs1+$rs2]"
-+ (+ OP_3 OP3_STD rdd rs1 (f-i 0) (f-res-asi 0) rs2)
-+ (sequence ()
-+ (set (mem SI (add rs1 rs2)) rdd)
-+ (set (mem SI (add rs1 (add rs2 (const 4))))
-+ (reg h-gr (add (regno rdd) (const 1)))))
-+ ()
-+)
-+(dni std-reg+imm "store double reg, reg+imm" ()
-+ "std $rdd,[$rs1+$simm13]"
-+ (+ OP_3 OP3_STD rdd rs1 (f-i 1) simm13)
-+ (sequence ()
-+ (set (mem SI (add rs1 simm13)) rdd)
-+ (set (mem SI (add rs1 (add simm13 (const 4))))
-+ (reg h-gr (add (regno rdd) (const 1)))))
-+ ()
-+)
-+(dnmi std-reg/asi "store double reg, reg+g0/asi" ()
-+ "std $rdd,[$rs1]$asi"
-+ (emit std-reg+reg/asi rdd rs1 (rs2 0) asi)
-+)
-+(dni std-reg+reg/asi "store double reg, reg+reg/asi" ()
-+ "std $rdd,[$rs1+$rs2]$asi"
-+ (+ OP_3 OP3_STDA rdd rs1 (f-i 0) asi rs2)
-+ (sequence ()
-+ (set (mem SI (add rs1 rs2)) rdd)
-+ (set (mem SI (add rs1 (add rs2 (const 4))))
-+ (reg h-gr (add (regno rdd) (const 1)))))
-+ ()
-+)
-+
-+; nop
-+; A nop is defined to be a sethi of %g0.
-+; This needn't be a macro-insn, but making it one greatly simplifies decode.c
-+; as code needn't be generated to confirm hi22 == 0.
-+; On the other hand spending a little time in the decoder is often worth it.
-+
-+(dnmi nop "nop"
-+ ()
-+ "nop"
-+ (emit sethi (rd 0) (hi22 0))
-+)
-+
-+; sethi
-+
-+(dni sethi "sethi" ()
-+ "sethi $hi22,$rd"
-+ (+ OP_0 rd OP2_SETHI hi22)
-+ (set rd (sll USI hi22 (const 10))) ; (set SI rd hi22)
-+ ()
-+)
-+
-+; Add/Subtract
-+
-+(define-pmacro (s32-set-addc-flags a b carry)
-+ (sequence ((SI x))
-+ (set x (addc a b carry))
-+ (set icc-c (add-cflag a b carry))
-+ (set icc-v (add-oflag a b carry))
-+ (set icc-n (nflag x))
-+ (set icc-z (zflag x)))
-+)
-+(define-pmacro (s32-set-subc-flags a b carry)
-+ (sequence ((SI x))
-+ (set x (subc a b carry))
-+ (set icc-c (sub-cflag a b carry))
-+ (set icc-v (sub-oflag a b carry))
-+ (set icc-n (nflag x))
-+ (set icc-z (zflag x)))
-+)
-+
-+(define-pmacro (s64-set-addc-flags a b carry)
-+ (sequence ((SI x32) (DI x))
-+ (set x (addc a b carry))
-+ (set x32 x)
-+ (set icc-c (add-cflag SI a b carry))
-+ (set icc-v (add-oflag SI a b carry))
-+ (set icc-n (nflag x32))
-+ (set icc-z (zflag x32))
-+ (set xcc-c (add-cflag a b carry))
-+ (set xcc-v (add-oflag a b carry))
-+ (set xcc-n (nflag x))
-+ (set xcc-z (zflag x)))
-+)
-+(define-pmacro (s64-set-subc-flags a b carry)
-+ (sequence ((SI x32) (DI x))
-+ (set x (subc a b carry))
-+ (set x32 x)
-+ (set icc-c (sub-cflag SI a b carry))
-+ (set icc-v (sub-oflag SI a b carry))
-+ (set icc-n (nflag x32))
-+ (set icc-z (zflag x32))
-+ (set xcc-c (sub-cflag a b carry))
-+ (set xcc-v (sub-oflag a b carry))
-+ (set xcc-n (nflag x))
-+ (set xcc-z (zflag x)))
-+)
-+
-+(define-pmacro (arith-binop name comment page attrs op3 sem-op)
-+ (begin
-+ (dni name
-+ (.str comment ", " page)
-+ attrs
-+ (.str name " $rs1,$rs2,$rd")
-+ (+ OP_2 op3 rd rs1 rs2 (f-i 0) (f-res-asi 0))
-+ (set rd (sem-op rs1 rs2))
-+ ())
-+ (dni (.sym name -imm)
-+ (.str comment " immediate, " page)
-+ attrs
-+ (.str name " $rs1,$simm13,$rd")
-+ (+ OP_2 op3 rd rs1 (f-i 1) simm13)
-+ (set rd (sem-op rs1 simm13))
-+ ())
-+ )
-+)
-+(define-pmacro (arith-cc-binop name comment page attrs op3 sem-op
-+ s32-set-flags s64-set-flags)
-+ (begin
-+ (dni name
-+ (.str comment ", setting cc, " page)
-+ attrs
-+ (.str name " $rs1,$rs2,$rd")
-+ (+ OP_2 op3 rd rs1 rs2 (f-i 0) (f-res-asi 0))
-+ (sequence ()
-+ (if (eq-attr (current-mach) ARCH64 TRUE)
-+ (s64-set-flags rs1 rs2 (const 0))
-+ (s32-set-flags rs1 rs2 (const 0)))
-+ (set rd (sem-op rs1 rs2))
-+ )
-+ ())
-+ (dni (.sym name -imm)
-+ (.str comment " immediate, setting cc, " page)
-+ attrs
-+ (.str name " $rs1,$simm13,$rd")
-+ (+ OP_2 op3 rd rs1 (f-i 1) simm13)
-+ (sequence ()
-+ (if (eq-attr (current-mach) ARCH64 TRUE)
-+ (s64-set-flags rs1 simm13 (const 0))
-+ (s32-set-flags rs1 simm13 (const 0)))
-+ (set rd (sem-op rs1 simm13))
-+ )
-+ ())
-+ )
-+)
-+(arith-binop add "add" "v8 page ??, v9 page 135" () OP3_ADD add)
-+(arith-binop sub "subtract" "v8 page ??, v9 page 230" () OP3_SUB sub)
-+(arith-cc-binop addcc "add" "v8 page ??, v9 page 135" () OP3_ADDCC add
-+ s32-set-addc-flags s64-set-addc-flags)
-+(arith-cc-binop subcc "subtract" "v8 page ??, v9 page 230" () OP3_SUBCC sub
-+ s32-set-subc-flags s64-set-subc-flags)
-+
-+; Same except include carry bit.
-+
-+(define-pmacro (arith-carry-binop name comment page attrs op3 sem-op)
-+ (begin
-+ (dni name
-+ (.str comment " with carry, " page)
-+ attrs
-+ (.str name " $rs1,$rs2,$rd")
-+ (+ OP_2 op3 rd rs1 rs2 (f-i 0) (f-res-asi 0))
-+ (set rd (sem-op rs1 rs2 icc-c))
-+ ())
-+ (dni (.sym name -imm)
-+ (.str comment " immediate with carry, " page)
-+ attrs
-+ (.str name " $rs1,$simm13,$rd")
-+ (+ OP_2 op3 rd rs1 (f-i 1) simm13)
-+ (set rd (sem-op rs1 simm13 icc-c))
-+ ())
-+ )
-+)
-+(define-pmacro (arith-carry-cc-binop name comment page attrs op3 sem-op set-flags)
-+ (begin
-+ (dni name
-+ (.str comment " with carry, setting cc, " page)
-+ attrs
-+ (.str name " $rs1,$rs2,$rd")
-+ (+ OP_2 op3 rd rs1 rs2 (f-i 0) (f-res-asi 0))
-+ (sequence ()
-+ (set-flags rs1 rs2 icc-c)
-+ (set rd (sem-op rs1 rs2 icc-c))
-+ )
-+ ())
-+ (dni (.sym name -imm)
-+ (.str comment " immediate with carry, setting cc, " page)
-+ attrs
-+ (.str name " $rs1,$simm13,$rd")
-+ (+ OP_2 op3 rd rs1 (f-i 1) simm13)
-+ (sequence ()
-+ (set-flags rs1 simm13 icc-c)
-+ (set rd (sem-op rs1 simm13 icc-c))
-+ )
-+ ())
-+ )
-+)
-+; mach32 versions
-+(arith-carry-binop addx "add" "v8 page ??" ((MACH32)) OP3_ADDX addc)
-+(arith-carry-binop subx "subtract" "v8 page ??" ((MACH32)) OP3_SUBX subc)
-+(arith-carry-cc-binop addxcc "add" "v8 page ??" ((MACH32)) OP3_ADDXCC addc
-+ s32-set-addc-flags)
-+(arith-carry-cc-binop subxcc "subtract" "v8 page ??" ((MACH32)) OP3_SUBXCC subc
-+ s32-set-subc-flags)
-+; mach64 versions
-+; same as mach32 except mnemonic is different
-+(arith-carry-binop addc "add" "v9 page 135" ((MACH64)) OP3_ADDC addc)
-+(arith-carry-binop subc "subtract" "v9 page 230" ((MACH64)) OP3_SUBC subc)
-+(arith-carry-cc-binop addccc "add" "v9 page 135" ((MACH64)) OP3_ADDCCC addc
-+ s64-set-addc-flags)
-+(arith-carry-cc-binop subccc "subtract" "v9 page 230" ((MACH64)) OP3_SUBCCC subc
-+ s64-set-subc-flags)
-+
-+; Binary boolean ops
-+
-+(define-pmacro (s32-set-bool-flags x)
-+ (sequence ()
-+ (set icc-z (zflag x))
-+ (set icc-n (nflag x))
-+ (set icc-c (const 0))
-+ (set icc-v (const 0))
-+ )
-+)
-+(define-pmacro (s64-set-bool-flags x)
-+ (sequence ()
-+ (set icc-z (zflag (trunc SI x)))
-+ (set icc-n (nflag (trunc SI x)))
-+ (set icc-c (const 0))
-+ (set icc-v (const 0))
-+ (set xcc-z (zflag x))
-+ (set xcc-n (nflag x))
-+ (set xcc-c (const 0))
-+ (set xcc-v (const 0))
-+ )
-+)
-+
-+(define-pmacro (bool-binop name page op3 sem-op)
-+ (begin
-+ (dni name (.str name ", " page) ()
-+ (.str name " $rs1,$rs2,$rd")
-+ (+ OP_2 op3 rd rs1 rs2 (f-i 0) (f-res-asi 0))
-+ (set rd (sem-op rs1 rs2))
-+ ())
-+ (dni (.sym name -imm) (.str name " immediate, " page) ()
-+ (.str name " $rs1,$simm13,$rd")
-+ (+ OP_2 op3 rd rs1 (f-i 1) simm13)
-+ (set rd (sem-op rs1 simm13))
-+ ())
-+ (dni (.sym name cc) (.str name ", setting cc, " page) ()
-+ (.str name "cc $rs1,$rs2,$rd")
-+ (+ OP_2 (.sym op3 CC) rd rs1 rs2 (f-i 0) (f-res-asi 0))
-+ (sequence ()
-+ (if (eq-attr (current-mach) ARCH64 TRUE)
-+ (s64-set-bool-flags (sem-op rs1 rs2))
-+ (s32-set-bool-flags (sem-op rs1 rs2)))
-+ (set rd (sem-op rs1 rs2))
-+ )
-+ ())
-+ (dni (.sym name cc-imm) (.str name " immediate, setting cc, " page) ()
-+ (.str name "cc $rs1,$simm13,$rd")
-+ (+ OP_2 (.sym op3 CC) rd rs1 (f-i 1) simm13)
-+ (sequence ()
-+ (if (eq-attr (current-mach) ARCH64 TRUE)
-+ (s64-set-bool-flags (sem-op rs1 simm13))
-+ (s32-set-bool-flags (sem-op rs1 simm13)))
-+ (set rd (sem-op rs1 simm13))
-+ )
-+ ())
-+ )
-+)
-+(bool-binop and "v9 page 181" OP3_AND and)
-+(bool-binop or "v9 page 181" OP3_OR or)
-+(bool-binop xor "v9 page 181" OP3_XOR xor)
-+
-+; Early experiments.
-+;(dsmn (andn a b) (list 'and a (list 'inv b)))
-+;(dsmn (orn a b) (list 'or a (list 'inv b)))
-+;(dsmn (xorn a b) (list 'xor a (list 'inv b)))
-+
-+(define-pmacro (sem-andn a b) (and a (inv b)))
-+(define-pmacro (sem-orn a b) (or a (inv b)))
-+(define-pmacro (sem-xorn a b) (xor a (inv b)))
-+
-+(bool-binop andn "v9 page 181" OP3_ANDN sem-andn)
-+(bool-binop orn "v9 page 181" OP3_ORN sem-orn)
-+(bool-binop xnor "v9 page 181" OP3_XNOR sem-xorn)
-+
-+; Shifts
-+
-+(define-pmacro (shift-binop name comment op3 sem-op)
-+ (begin
-+ (dni name comment ()
-+ (.str name " $rs1,$rs2,$rd")
-+ (+ OP_2 op3 rd rs1 rs2 (f-i 0) (f-res-asi 0))
-+ (set rd (sem-op rs1 (and rs2 (const 31))))
-+ ())
-+ (dni (.sym name -imm) (.str comment -imm) ()
-+ (.str name " $rs1,$simm13,$rd")
-+ (+ OP_2 op3 rd rs1 (f-i 1) simm13)
-+ ; ??? v9 uses only the low bits. v8?
-+ (set rd (sem-op rs1 (and simm13 (const 31))))
-+ ())
-+ )
-+)
-+(shift-binop sll "shift left logical" OP3_SLL sll)
-+(shift-binop srl "shift right logical" OP3_SRL srl)
-+(shift-binop sra "shift right arithmetic" OP3_SRA sra)
-+
-+; Multiply/Divide
-+
-+(define-pmacro (mult-binop name comment op3 sem-op ext-op)
-+ (begin
-+ (dni name comment ()
-+ (.str name " $rs1,$rs2,$rd")
-+ (+ OP_2 op3 rd rs1 rs2 (f-i 0) (f-res-asi 0))
-+ (sequence ((DI res))
-+ (set res (sem-op (ext-op DI rs1) (ext-op DI rs2)))
-+ (set (reg WI h-y) (trunc SI (srl res (const 32))))
-+ (set rd (trunc SI res))
-+ )
-+ ())
-+ (dni (.sym name -imm) (.str comment -imm) ()
-+ (.str name " $rs1,$simm13,$rd")
-+ (+ OP_2 op3 rd rs1 (f-i 1) simm13)
-+ (sequence ((DI res))
-+ (set res (sem-op (ext-op DI rs1) (ext-op DI simm13)))
-+ (set (reg WI h-y) (trunc SI (srl res (const 32))))
-+ (set rd (trunc SI res))
-+ )
-+ ())
-+ (dni (.sym name -cc) (.str comment -cc) ()
-+ (.str name "cc $rs1,$rs2,$rd")
-+ (+ OP_2 (.sym op3 CC) rd rs1 rs2 (f-i 0) (f-res-asi 0))
-+ (sequence ((DI res))
-+ (set res (sem-op (ext-op DI rs1) (ext-op DI rs2)))
-+ (set (reg WI h-y) (trunc SI (srl res (const 32))))
-+ (set rd (trunc SI res))
-+ ; We use bool-flags here 'cus it works (FIXME:revisit).
-+ ; We can't use rd here 'cus it might be %g0.
-+ (s32-set-bool-flags (trunc SI res))
-+ )
-+ ())
-+ (dni (.sym name -cc-imm) (.str comment -cc-imm) ()
-+ (.str name "cc $rs1,$simm13,$rd")
-+ (+ OP_2 (.sym op3 CC) rd rs1 (f-i 1) simm13)
-+ (sequence ((DI res))
-+ (set res (sem-op (ext-op DI rs1) (ext-op DI simm13)))
-+ (set (reg WI h-y) (trunc SI (srl res (const 32))))
-+ (set rd (trunc SI res))
-+ ; We use bool-flags here 'cus it works (FIXME:revisit).
-+ ; We can't use rd here 'cus it might be %g0.
-+ (s32-set-bool-flags (trunc SI res))
-+ )
-+ ())
-+ )
-+)
-+(mult-binop smul "smul" OP3_SMUL mul ext)
-+(mult-binop umul "umul" OP3_UMUL mul zext)
-+
-+(define-pmacro (div-binop name comment mach-attrs op3 sem-op ext-op set-flags)
-+ (begin
-+ (dni name (.str comment ", v9 page 152") ((mach-attrs))
-+ (.str name " $rs1,$rs2,$rd")
-+ (+ OP_2 op3 rd rs1 rs2 (f-i 0) (f-res-asi 0))
-+ (sequence ((DI dividend))
-+ (set dividend (join DI SI (reg SI h-y) rs1))
-+ (set rd (trunc SI (sem-op dividend (ext-op DI rs2))))
-+ ; FIXME: Overflow,etc. handling.
-+ )
-+ ())
-+ (dni (.sym name -imm) (.str comment -imm ", v9 page 152") ((mach-attrs))
-+ (.str name " $rs1,$simm13,$rd")
-+ (+ OP_2 op3 rd rs1 (f-i 1) simm13)
-+ (sequence ((DI dividend))
-+ (set dividend (join DI SI (reg SI h-y) rs1))
-+ (set rd (trunc SI (sem-op dividend (ext-op DI simm13))))
-+ ; FIXME: Overflow,etc. handling.
-+ )
-+ ())
-+ (dni (.sym name -cc) (.str comment -cc ", v9 page 152") ((mach-attrs))
-+ (.str name "cc $rs1,$rs2,$rd")
-+ (+ OP_2 (.sym op3 CC) rd rs1 rs2 (f-i 0) (f-res-asi 0))
-+ (sequence ((DI dividend))
-+ (set dividend (join DI SI (reg SI h-y) rs1))
-+ (set rd (trunc SI (sem-op dividend (ext-op DI rs2))))
-+ ; FIXME: Overflow,etc. handling.
-+ set-flags
-+ )
-+ ())
-+ (dni (.sym name -cc-imm) (.str comment -cc-imm ", v9 page 152") ((mach-attrs))
-+ (.str name "cc $rs1,$simm13,$rd")
-+ (+ OP_2 (.sym op3 CC) rd rs1 (f-i 1) simm13)
-+ (sequence ((DI dividend))
-+ (set dividend (join DI SI (reg SI h-y) rs1))
-+ (set rd (trunc SI (sem-op dividend (ext-op DI simm13))))
-+ ; FIXME: Overflow,etc. handling.
-+ set-flags
-+ )
-+ ())
-+ )
-+)
-+(div-binop sdiv "sdiv" MACH32 OP3_SDIV div ext (s32-set-bool-flags rd))
-+(div-binop udiv "udiv" MACH32 OP3_UDIV div zext (s32-set-bool-flags rd))
-+
-+; Multiply/Step
-+
-+(dni mulscc "multiply step" ()
-+ "mulscc $rs1,$rs2,$rd"
-+ (+ OP_2 OP3_MULSCC rd rs1 rs2 (f-i 0) (f-res-asi 0))
-+ (sequence ((SI tmp) (SI add-tmp) (SI rd-tmp))
-+ ; v8 page 112, step 2
-+ (set tmp (srl SI rs1 (const 1)))
-+ (if (ne (xor BI (reg BI h-icc-n) (reg BI h-icc-v))
-+ (const 0))
-+ (set tmp (or SI tmp (const SI #x80000000))))
-+ ; step 3
-+ (if (ne (and SI (reg SI h-y) (const 1)) (const 0))
-+ (set add-tmp rs2)
-+ (set add-tmp (const 0)))
-+ ; step 4
-+ (set rd-tmp (add tmp add-tmp))
-+ ; step 5
-+ (s32-set-addc-flags tmp add-tmp (const 0))
-+ ;(set (reg UQI h-cc) (addc-cc tmp add-tmp (const 0)))
-+ ; step 6
-+ (set (reg SI h-y) (srl SI (reg SI h-y) (const 1)))
-+ (if (ne (and SI rs1 (const 1)) (const 0))
-+ (set (reg SI h-y) (or SI (reg SI h-y) (const SI #x80000000))))
-+ ; rd first created in rd-tmp so step 6 gets right value for rs1
-+ (set SI rd rd-tmp)
-+ )
-+ ()
-+)
-+
-+; Window ops
-+; V8 page 117
-+
-+(define-pmacro (window-binop name comment op3 handler)
-+ (begin
-+ (dni name comment ()
-+ (.str name " $rs1,$rs2,$rd")
-+ (+ OP_2 op3 rd rs1 rs2 (f-i 0) (f-res-asi 0))
-+ (set rd (c-call WI handler pc rs1 rs2))
-+ ())
-+ (dni (.sym name -imm) (.str comment -imm) ()
-+ (.str name " $rs1,$simm13,$rd")
-+ (+ OP_2 op3 rd rs1 (f-i 1) simm13)
-+ (set rd (c-call WI handler pc rs1 simm13))
-+ ())
-+ )
-+)
-+(window-binop save "save caller's window" OP3_SAVE "@cpu@_do_save")
-+(window-binop restore "restore caller's window" OP3_RESTORE "@cpu@_do_restore")
-+
-+; Trap stuff
-+
-+(dni rett "return from trap" ()
-+ "rett $rs1,$rs2"
-+ (+ OP_2 OP3_RETT (f-rd 0) rs1 rs2 (f-i 0) (f-res-asi 0))
-+ (delay (const 1)
-+ (set pc (c-call WI "@cpu@_do_rett" pc rs1 rs2)))
-+ ()
-+)
-+(dni rett-imm "return from trap, immediate" ()
-+ "rett $rs1,$simm13"
-+ (+ OP_2 OP3_RETT (f-rd 0) rs1 (f-i 1) simm13)
-+ (delay (const 1)
-+ (set pc (c-call WI "@cpu@_do_rett" pc rs1 simm13)))
-+ ()
-+)
-+
-+; Misc.
-+
-+(dni unimp "unimplemented" ()
-+ "unimp $imm22"
-+ (+ OP_0 (f-rd-res 0) OP2_UNIMP imm22)
-+ (c-call VOID "@arch@_do_unimp" pc imm22)
-+ ()
-+)
-+
-+; Subroutine calls, returns.
-+
-+(dnmi call-reg,0 "call reg,0" ()
-+ "call $rs1,0" ; FIXME: what's the ,0 suffix for?
-+ (emit jmpl rs1 (rd 15) (rs2 0))
-+)
-+
-+(dnmi call-reg "call reg" ()
-+ "call $rs1"
-+ (emit jmpl rs1 (rd 15) (rs2 0))
-+)
-+
-+(dnmi call,0 "call,0" ()
-+ "call $disp30,0" ; FIXME: what's the ,0 suffix for?
-+ (emit call disp30)
-+)
-+
-+(dni call "call" (DELAY-SLOT)
-+ "call $disp30"
-+ (+ OP_1 disp30)
-+ (sequence ()
-+ (set (reg h-gr 15) pc)
-+ (delay (const 1)
-+ (set pc disp30)))
-+ ()
-+)
-+
-+(dni jmpl "jmpl" (DELAY-SLOT)
-+ "jmpl $rs1+$rs2,$rd"
-+ (op3-reg-fmt OP3_JMPL)
-+ (sequence ()
-+ (set rd pc)
-+ (delay (const 1)
-+ (set pc (add WI rs1 rs2))))
-+ ()
-+)
-+
-+(dni jmpl-imm "jmpl" (DELAY-SLOT)
-+ "jmpl $rs1+$simm13,$rd"
-+ (op3-imm-fmt OP3_JMPL)
-+ (sequence ()
-+ (set rd pc)
-+ (delay (const 1)
-+ (set pc (add WI rs1 simm13))))
-+ ()
-+)
-+
-+;(dsn (icc-op op) (cx:make BI (string-append "icc (" op ")")))
-+;(dsn (icc-op op) (list 'c-call: 'BI "icc" (reg UQI h-cc) (.str op)))
-+;(dsmn (icc-op op) (list 'c-call: 'BI "icc" '(reg UQI h-cc) (.str op)))
-+;(define-pmacro (icc-op op) (c-call BI "icc" (reg UQI h-cc) (.str op)))
-+
-+; Branches
-+
-+(define-pmacro (bicc-branch bname tname comment cond test br-sem)
-+ (begin
-+ (dni bname (.str "branch " comment) (V9-DEPRECATED)
-+ (.str bname "$a $disp22")
-+ (+ OP_0 a cond OP2_BICC disp22)
-+ (br-sem test icc)
-+ ())
-+ (dni tname (.str "trap " comment) (TRAP)
-+ (.str tname " $rs1,$rs2")
-+ (+ OP_2 (f-a 0) cond (f-op3 #x3a) rs1 (f-i 0) (f-res-asi 0) rs2)
-+ (if (test icc)
-+ (set pc (c-call IAI "@cpu@_sw_trap" pc rs1 rs2)))
-+ ())
-+ (dni (.sym tname -imm) (.str "trap-imm " comment) (TRAP)
-+ (.str tname " $rs1,$simm13")
-+ (+ OP_2 (f-a 0) cond (f-op3 #x3a) rs1 (f-i 1) simm13)
-+ (if (test icc)
-+ (set pc (c-call IAI "@cpu@_sw_trap" pc rs1 simm13)))
-+ ())
-+ )
-+)
-+; test-*,uncond-br-sem,cond-br-sem are defined in sparc.cpu.
-+(bicc-branch ba ta "always" CC_A test-always uncond-br-sem)
-+(bicc-branch bn tn "never" CC_N test-never uncond-br-sem)
-+(bicc-branch bne tne "ne" CC_NE test-ne cond-br-sem)
-+(bicc-branch be te "eq" CC_E test-eq cond-br-sem)
-+(bicc-branch bg tg "gt" CC_G test-gt cond-br-sem)
-+(bicc-branch ble tle "le" CC_LE test-le cond-br-sem)
-+(bicc-branch bge tge "ge" CC_GE test-ge cond-br-sem)
-+(bicc-branch bl tl "lt" CC_L test-lt cond-br-sem)
-+(bicc-branch bgu tgu "gtu" CC_GU test-gtu cond-br-sem)
-+(bicc-branch bleu tleu "leu" CC_LEU test-leu cond-br-sem)
-+(bicc-branch bcc tcc "geu" CC_CC test-geu cond-br-sem)
-+(bicc-branch bcs tcs "ltu" CC_CS test-ltu cond-br-sem)
-+(bicc-branch bpos tpos "pos" CC_POS test-pos cond-br-sem)
-+(bicc-branch bneg tneg "neg" CC_NEG test-neg cond-br-sem)
-+(bicc-branch bvc tvc "vc" CC_VC test-vc cond-br-sem)
-+(bicc-branch bvs tvs "vs" CC_VS test-vs cond-br-sem)
-+
-+; Atomic load/stores.
-+
-+(define-pmacro (atomic-op name comment attrs op3 do_fn)
-+ (begin
-+ (dnmi (.sym name "-reg") comment attrs
-+ (.str name " [$rs1],$rd")
-+ (emit (.sym name -reg+reg) rs1 (rs2 0) rd))
-+ (dnmi (.sym name "-reg+0") comment attrs
-+ (.str name " [$rs1],$rd")
-+ (emit (.sym name -reg+imm) rs1 (simm13 0) rd))
-+ (dni (.sym name "-reg+reg") comment attrs
-+ (.str name " [$rs1+$rs2],$rd")
-+ (+ OP_3 op3 rd rs1 (f-i 0) (f-res-asi 0) rs2)
-+ (c-call do_fn pc (regno rd) rs1 rs2 (const -1))
-+ ())
-+ (dni (.sym name "-reg+imm") comment attrs
-+ (.str name " [$rs1+$simm13],$rd")
-+ (+ OP_3 op3 rd rs1 (f-i 1) simm13)
-+ (c-call do_fn pc (regno rd) rs1 simm13 (const -1))
-+ ())
-+ (dnmi (.sym name "-reg/asi") comment attrs
-+ (.str name " [$rs1]$asi,$rd")
-+ (emit (.sym name "-reg+reg/asi") rs1 (rs2 0) asi rd))
-+ (dni (.sym name "-reg+reg/asi") comment attrs
-+ (.str name " [$rs1+$rs2]$asi,$rd")
-+ (+ OP_3 (.sym op3 A) rd rs1 (f-i 0) asi rs2)
-+ (c-call do_fn pc (regno rd) rs1 rs2 asi)
-+ ())
-+ )
-+)
-+(atomic-op ldstub "atomic load-store unsigned byte, v9 page 179" ()
-+ OP3_LDSTUB "@cpu@_do_ldstub")
-+(atomic-op swap "atomic swap reg with mem" (V9-DEPRECATED)
-+ OP3_SWAP "@cpu@_do_swap")
-+
-+; TODO:
-+; - tagged add/sub
-+; - synthetic insns
-diff -Nur binutils-2.24.orig/cgen/cpu/sparc.cpu binutils-2.24/cgen/cpu/sparc.cpu
---- binutils-2.24.orig/cgen/cpu/sparc.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/sparc.cpu 2016-06-30 21:26:12.645892801 +0200
-@@ -0,0 +1,612 @@
-+; SPARC CPU description. -*- Scheme -*-
-+; Copyright (C) 2000 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; Notes:
-+; - sparc64 support wip
-+; - fp support todo
-+; - source file layout wip
-+; - cpu family layout wip
-+; - page numbers refered to here are to the sparc architecture reference
-+; manuals (v8,v9).
-+
-+(include "simplify.inc")
-+
-+(define-arch
-+ (name sparc)
-+ (comment "Sun SPARC architecture")
-+ (insn-lsb0? #t)
-+ ; This list isn't currently intended to be identical to BFD's sparc mach
-+ ; list. In time if and when there's a need.
-+ ; While following the goal of incremental complication, v6,v7,sparclet don't
-+ ; appear here either.
-+ (machs sparc-v8 sparclite sparc-v9 sparc-v9a)
-+ ;(default-mach sparc-v8)
-+ (isas sparc)
-+)
-+
-+; Macros to simplify MACH attribute specification.
-+(define-pmacro (MACH32) (MACH sparc-v8,sparclite))
-+(define-pmacro (MACH64) (MACH sparc-v9,sparc-v9a))
-+
-+; Attribute to simplify machine specific RTL.
-+(define-attr
-+ (type boolean)
-+ (name ARCH64)
-+ (comment "`true' for sparc64 machs")
-+)
-+
-+(define-isa
-+ (name sparc)
-+ (base-insn-bitsize 32) ; number of bits that can be initially fetched
-+ ; Initial bitnumbers to decode insns by.
-+ (decode-assist (31 30 24 23 22 21 20 19)) ; 0 1 7 8 9 10 11 12
-+)
-+
-+; The instruction fetch/execute cycle.
-+; This is split into two parts as sometimes more than one instruction is
-+; decoded at once.
-+; The `const 0' argument to decode/execute is used to distinguish
-+; multiple instructions processed at the same time (e.g. m32r).
-+;
-+; ??? This is wip, and not currently used.
-+; ??? To be moved into define-arch and define-cpu.
-+; ??? It might simplify things to separate the execute process from the
-+; one that updates the PC.
-+
-+; This is how to fetch and extract the fields of an instruction.
-+
-+;(define-extract
-+; (sequence ((USI insn))
-+; (set-quiet insn (ifetch: USI pc))
-+; (decode pc insn (const 0))
-+; )
-+;)
-+
-+; This is how to execute an extracted instruction.
-+
-+;(define-execute
-+; (sequence ((AI new_pc))
-+; (set-quiet new_pc (execute AI (const 0)))
-+; ; QI mode means just do an assignment, not a jump.
-+; ; FIXME: VOID also means something special. Perhaps there's a way
-+; ; to use a mode other than QI (WI?) and have something cleaner?
-+; (if (attr: HOSTINT insn (const 0) DELAY-SLOT)
-+; (if (andif (attr: BI insn (const 0) ANNUL) h-annul-p)
-+; (c-call "do_annul")
-+; (sequence () ; in delay slot
-+; (set-quiet QI pc h-npc)
-+; (set-quiet AI h-npc new_pc)))
-+; (sequence () ; not in delay slot
-+; (set-quiet QI pc h-npc)
-+; (set-quiet AI h-npc (add new_pc (const 4))))
-+; ))
-+;)
-+
-+; Instruction fields.
-+
-+(dnf f-op "op" () 31 2)
-+(dnf f-op2 "op2" () 24 3)
-+(dnf f-op3 "op3" () 24 6)
-+(dnf f-rs1 "rs1" () 18 5)
-+(dnf f-rs2 "rs2" () 4 5)
-+(dnf f-rd "rd" () 29 5)
-+(dnf f-rd-res "rd" (RESERVED) 29 5)
-+(dnf f-i "i" () 13 1)
-+(df f-simm13 "simm13" () 12 13 INT #f #f)
-+(dnf f-imm22 "imm22" () 21 22)
-+(define-ifield (name f-hi22) (comment "hi22") (attrs)
-+ (start 21) (length 22)
-+ ; shifting done elsewhere
-+ ;(encode (value pc) (srl WI value (const 10)))
-+ ;(decode (value pc) (sll WI value (const 10)))
-+)
-+(dnf f-a "a" () 29 1)
-+(dnf f-fmt2-cond "fmt2 cond" () 28 4)
-+(df f-disp22 "disp22" (PCREL-ADDR) 21 22 INT
-+ ((value pc) (sra WI (sub WI value pc) (const WI 2)))
-+ ((value pc) (add WI (sll WI value (const WI 2)) pc)))
-+(df f-disp30 "disp30" (PCREL-ADDR) 29 30 INT
-+ ((value pc) (sra WI (sub WI value pc) (const WI 2)))
-+ ((value pc) (add WI (sll WI value (const WI 2)) pc)))
-+(dnf f-opf "opf" () 13 9)
-+(dnf f-res-12-8 "reserved bits of simm13 field when i=0" (RESERVED) 12 8)
-+(dnf f-simm10 "simm10" () 9 10)
-+(dnf f-fmt2-cc "cc" () 21 2)
-+(dnf f-fmt3-cc "fmt3 cc" () 26 2)
-+(dnf f-x "x" () 12 1)
-+(dnf f-shcnt32 "shcnt32" () 4 5)
-+(dnf f-fcn "fcn" () 29 5)
-+(dnf f-imm-asi "asi" () 12 8)
-+(dnf f-asi "asi" () 12 8)
-+(dnf f-res-asi "reserved bits in asi position" (RESERVED) 12 8)
-+(dnf f-fmt4-cc "fmt4 cc" () 12 2)
-+(dnf f-soft-trap "soft trap" () 6 7)
-+(dnf f-opf-low5 "opf low5" () 9 5)
-+(dnf f-opf-low6 "opf low6" () 10 6)
-+(dnf f-opf-cc "cc" () 13 3)
-+
-+; Enums of opcodes, special insn values, etc.
-+; ??? Some of this to be moved and/or split up into sparc{32,64}.cpu.
-+
-+(define-normal-insn-enum insn-op
-+ "main insn opcode field, v8 page ???, v9 page 267"
-+ () OP_ f-op
-+ ; order is important, the numbers here are actually part of symbols
-+ ; (e.g. OP_0, OP_1, OP_2, OP_3) so they must be strings.
-+ ("0" "1" "2" "3")
-+)
-+
-+(define-normal-insn-enum insn-op2
-+ "op2 insn type, v8 page ???, v9 page 267"
-+ () OP2_ f-op2
-+ ; order is important
-+ ; ??? some of these are for v9 only (ok?)
-+ (UNIMP BPCC BICC BPR SETHI FBPFCC FBFCC RESERVED)
-+)
-+
-+(define-normal-insn-enum insn-fmt2
-+ "op=2 op3 values, v8 page ??, v9 page 268"
-+ () OP3_ f-op3
-+ (
-+ (ADD 0) (ADDCC 16) ; v9 page 135
-+ (ADDX 8) (ADDXCC 24) ; v8 page ??
-+ (ADDC 8 ARCH64) (ADDCCC 24 ARCH64) ; v9 page 135
-+ (SUB 4) (SUBCC 20) ; v9 page 230
-+ (SUBX 12) (SUBXCC 28) ; v8 page ??
-+ (SUBC 12 ARCH64) (SUBCCC 28 ARCH64) ; v9 page 230
-+ (AND 1) (ANDCC 17) (ANDN 5) (ANDNCC 21)
-+ (OR 2) (ORCC 18) (ORN 6) (ORNCC 22)
-+ (XOR 3) (XORCC 19) (XNOR 7) (XNORCC 23)
-+ (SLL #x25) (SRL #x26) (SRA #x27)
-+ (MULSCC #x24 !ARCH64) ; v8 page 112
-+ (UMUL #xa) (SMUL #xb) (UMULCC #x1a) (SMULCC #x1b) ; v8 page 113
-+ (UDIV #xe) (SDIV #xf) (UDIVCC #x1e) (SDIVCC #x1f)
-+
-+ (FPOPS1 #x34) (FPOPS2 #x35)
-+
-+ (SAVE #x3c) (RESTORE #x3d) ; v8 page 117
-+ (RETT #x39) ; v8 page 127
-+ (JMPL #x38) ; v8 page 126
-+
-+ (RDY #x28) (RDASR #x28) ; v8 page 131
-+ (WRY #x30) (WRASR #x30) ; v8 page 133
-+
-+ ; v8 page 131
-+ (RDPSR #x29 !ARCH64) (RDWIM #x2a !ARCH64) (RDTBR #x2b !ARCH64)
-+ ; v8 page 133
-+ (WRPSR #x31 !ARCH64) (WRWIM #x32 !ARCH64) (WRTBR #x33 !ARCH64)
-+
-+ ; v9 page 155
-+ (DONE_RETRY #x3e ARCH64)
-+ ; v9 page 165
-+ (FLUSH #x3b ARCH64)
-+ ; v9 page 167
-+ (FLUSHW #x2b ARCH64)
-+ ; v9 page 169
-+ (IMPDEP1 #x36 ARCH64) (IMPDEP2 #x37 ARCH64)
-+ ; v9 page 183
-+ (MEMBAR #x28 ARCH64)
-+ ; v9 page 191
-+ (MOVCC #x2c ARCH64)
-+ )
-+)
-+
-+(define-normal-insn-enum insn-fmt3
-+ "op=3 op3 values, v8 page ???, v9 page 269"
-+ () OP3_ f-op3
-+ (; order is important
-+ LDUW LDUB LDUH LDD
-+ STW STB STH STD
-+ (LDSW - ARCH64) LDSB LDSH (LDX - ARCH64)
-+ RES12 LDSTUB (STX - ARCH64) SWAP
-+
-+ LDUWA LDUBA LDUHA LDDA
-+ STWA STBA STHA STDA
-+ (LDSWA - ARCH64) LDSBA LDSHA (LDXA - ARCH64)
-+ RES28 LDSTUBA (STXA - ARCH64) SWAPA
-+
-+ LDF (LDFSR #x21) (LDXFSR #x21) LDQF LDDF
-+ STF (STFSR #x25) (STXFSR #x25) STQF STDF
-+ RES40 RES41 RES42 RES43
-+ RES44 PREFETCH RES46 RES47
-+
-+ LDFA RES49 LDQFA LDDFA
-+ STFA RES53 STQFA STDFA
-+ RES56 RES57 RES58 RES59
-+ (CASA - ARCH64) (PREFETCHA - ARCH64) (CASXA - ARCH64) RES63
-+ )
-+)
-+
-+(define-normal-insn-enum rd-insn
-+ "rd insn type"
-+ () RD_ f-rd
-+ (; order is important
-+ Y RES1 CCR ASI TICK PC FPRS ASR7
-+ ASR8 ASR9 ASR10 ASR11 ASR12 ASR13 ASR14 MEMBAR_STBAR
-+ )
-+)
-+
-+(define-normal-insn-enum wr-insn
-+ "wr insn type"
-+ () WR_ f-rd
-+ (; order is important
-+ Y RES1 CCR ASI ASR4 ASR5 FPRS ASR7
-+ ASR8 ASR9 ASR10 ASR11 ASR12 ASR13 ASR14 SIGM
-+ )
-+)
-+
-+; The standard condition code tests.
-+
-+(define-normal-insn-enum cc-tests
-+ "condition code tests, v8 page ???, v9 page 144"
-+ () "" f-fmt2-cond
-+ (
-+ (CC_A 8) ; always
-+ (CC_N 0) ; never
-+ (CC_NE 9) ; not equal
-+ (CC_NZ 9) ; not zero
-+ (CC_E 1) ; equal
-+ (CC_Z 1) ; zero
-+ (CC_G 10) ; greater
-+ (CC_LE 2) ; less or equal
-+ (CC_GE 11) ; greater or equal
-+ (CC_L 3) ; less
-+ (CC_GU 12) ; unsigned greater
-+ (CC_LEU 4) ; unsigned less or equal
-+ (CC_CC 13) ; carry clear
-+ (CC_GEU 13) ; unsigned greater or equal
-+ (CC_CS 5) ; carry set
-+ (CC_LU 5) ; unsigned less than
-+ (CC_POS 14) ; positive
-+ (CC_NEG 6) ; negative
-+ (CC_VC 15) ; overflow clear
-+ (CC_VS 7) ; overflow set
-+ )
-+)
-+
-+; Floating point condition code tests.
-+
-+(define-normal-insn-enum fcc-tests
-+ "condition code tests, v8 page ???, v9 page 138"
-+ () "FCOND_" f-fmt2-cond
-+ (
-+ (A 8) ; always
-+ (N 0) ; never
-+ (U 7) ; unordered
-+ (G 6) ; greater
-+ (UG 5) ; unordered or greater
-+ (L 4) ; less
-+ (UL 3) ; unordered or less
-+ (LG 2) ; less or greater
-+ (NE 1) ; less or greater or unordered (not equal)
-+ (E 9) ; equal
-+ (UE 10) ; unordered or equal
-+ (GE 11) ; greater or equal
-+ (UGE 12) ; unordered or greater or equal
-+ (LE 13) ; less or equal
-+ (ULE 14) ; unordered or less or equal
-+ (O 15) ; equal or less or greater (ordered)
-+ )
-+)
-+
-+(define-normal-insn-enum fcc-value "fcc value" () FCC_ f-fmt2-cc
-+ (EQ LT GT UN)
-+)
-+
-+(define-normal-insn-enum fpop1
-+ "fp op 1, v8 page ???, v9 page 270"
-+ () FPOPS1_ f-opf
-+ (
-+ (FMOVS 1) (FMOVD 2) (FMOVQ 3)
-+ (FNEGS 5) (FNEGD 6) (FNEGQ 7)
-+ (FABSS 9) (FABSD 10) (FABSQ 11)
-+ (FSQRTS #x29) (FSQRTD #x2a) (FSQRTQ #x2b)
-+ (FADDS #x41) (FADDD #x42) (FADDQ #x43)
-+ (FSUBS #x45) (FSUBD #x46) (FSUBQ #x47)
-+ (FMULS #x49) (FMULD #x4a) (FMULQ #x4b)
-+ (FDIVS #x4d) (FDIVD #x4e) (FDIVQ #x4f)
-+ (FSMULD #x69) (FDMULQ #x6e)
-+ (FSTOX #x81) (FDTOX #x82) (FQTOX #x83)
-+ (FXTOS #x84) (FXTOD #x88) (FXTOQ #x8c)
-+ (FITOS #xc4) (FDTOS #xc6) (FQTOS #xc7)
-+ (FITOD #xc8) (FSTOD #xc9) (FQTOD #xcb)
-+ (FITOQ #xcc) (FSTOQ #xcd) (FDTOQ #xce)
-+ (FSTOI #xd1) (FDTOI #xd2) (FQTOI #xd3)
-+ (MAX 511)
-+ )
-+)
-+
-+; ??? check MACH64, are all v9 only?
-+
-+(define-normal-insn-enum fpop2
-+ "fp op 2, v9 page 271"
-+ (ARCH64) FPOPS2_ f-opf
-+ (
-+ (FCMPS #x51) (FCMPD #x52) (FCMPQ #x53)
-+ (FCMPSE #x55) (FCMPDE #x56) (FCMPQE #x57)
-+ (FMOVSFCC0 #x01) (FMOVDFCC0 #x02) (FMOVQFCC0 #x03)
-+ (FMOVSFCC1 #x41) (FMOVDFCC1 #x42) (FMOVQFCC1 #x43)
-+ (FMOVSFCC2 #x81) (FMOVDFCC2 #x82) (FMOVQFCC2 #x83)
-+ (FMOVSFCC3 #xc1) (FMOVDFCC3 #xc2) (FMOVQFCC3 #xc3)
-+ (FMOVSICC #x101) (FMOVDICC #x102) (FMOVQICC #x103)
-+ (FMOVSXCC #x181) (FMOVDXCC #x182) (FMOVQXCC #x183)
-+ (FMOVRZS #x25) (FMOVRZD #x26) (FMOVRZQ #x27)
-+ (FMOVRLEZS #x45) (FMOVRLEZD #x46) (FMOVRLEZQ #x47)
-+ (FMOVRLZS #x65) (FMOVRLZD #x66) (FMOVRLZQ #x67)
-+ (FMOVRNZS #xa5) (FMOVRNZD #xa6) (FMOVRNZQ #xa7)
-+ (FMOVRGZS #xc5) (FMOVRGZD #xc6) (FMOVRGZQ #xc7)
-+ (FMOVRGEZS #xe5) (FMOVRGEZD #xe6) (FMOVRGEZQ #xe7)
-+ (MAX 511)
-+ )
-+)
-+
-+; Hardware pieces.
-+; These are common to all (or most all) machs.
-+
-+(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
-+
-+(define-hardware
-+ (name h-npc)
-+ (comment "next pc")
-+ (attrs PC)
-+ (type register WI)
-+)
-+
-+(define-keyword
-+ (name gr-names)
-+ (print-name h-gr)
-+ (prefix "%")
-+ (values (fp 30) (sp 14)
-+ (g0 0) (g1 1) (g2 2) (g3 3) (g4 4) (g5 5) (g6 6) (g7 7)
-+ (o0 8) (o1 9) (o2 10) (o3 11) (o4 12) (o5 13) (o6 14) (o7 15)
-+ (l0 16) (l1 17) (l2 18) (l3 19) (l4 20) (l5 21) (l6 22) (l7 23)
-+ (i0 24) (i1 25) (i2 26) (i3 27) (i4 28) (i5 29) (i6 30) (i7 31)
-+ )
-+)
-+
-+; The general registers are accessed via a level of indirection to handle
-+; the register windows. h-gr provides the top level entry point which is
-+; indirected through various means depending upon the register window
-+; implementation of the day. To be solidified in time.
-+;
-+; ??? Separation of h-gr for sparc32/64 is currently an experiment.
-+
-+(define-hardware
-+ (name h-gr) ; h-gr32
-+ ;(semantic-name h-gr)
-+ (comment "sparc32 general registers")
-+ (attrs PROFILE VIRTUAL (MACH32))
-+ (type register SI (32))
-+ (indices extern-keyword gr-names) ; keyword "%" (h-gr-indices))
-+ (get (index) (c-call SI "GET_H_GR_RAW" index))
-+ (set (index newval) (c-call VOID "SET_H_GR_RAW" index newval))
-+)
-+
-+(define-hardware
-+ (name h-gr) ; h-gr64
-+ ;(semantic-name h-gr)
-+ (comment "sparc64 general registers")
-+ (attrs PROFILE VIRTUAL (MACH64))
-+ (type register DI (32))
-+ (indices extern-keyword gr-names) ; keyword "%" (h-gr-indices))
-+ (get (index) (c-call SI "GET_H_GR_RAW" index))
-+ (set (index newval) (c-call VOID "SET_H_GR_RAW" index newval))
-+)
-+
-+(define-hardware
-+ (name h-a)
-+ (comment "annul bit")
-+ (type immediate (UINT 1))
-+ (values keyword "" (("" 0) (",a" 1)))
-+)
-+
-+; The condition code bits.
-+(dsh h-icc-c "icc carry bit" () (register BI))
-+(dsh h-icc-n "icc negative bit" () (register BI))
-+(dsh h-icc-v "icc overflow bit" () (register BI))
-+(dsh h-icc-z "icc zero bit" () (register BI))
-+
-+; The extended condition code bits of v9.
-+(dsh h-xcc-c "xcc carry bit" (ARCH64) (register BI))
-+(dsh h-xcc-n "xcc negative bit" (ARCH64) (register BI))
-+(dsh h-xcc-v "xcc overflow bit" (ARCH64) (register BI))
-+(dsh h-xcc-z "xcc zero bit" (ARCH64) (register BI))
-+
-+; Misc. regs.
-+
-+; h-y is virtual because the real value is kept in the asr array.
-+; ??? wip is get/set fields
-+(define-hardware
-+ (name h-y)
-+ (comment "y register")
-+ (attrs VIRTUAL)
-+ (type register WI)
-+ (get () (reg WI h-asr 0))
-+ (set (newval) (set (reg WI h-asr 0) newval))
-+)
-+
-+(dnh h-asr "ancilliary state registers" ()
-+ (register WI (32))
-+ (keyword "%"
-+ (
-+ (y 0)
-+ (asr0 0) (asr1 1) (asr2 2) (asr3 3)
-+ (asr4 4) (asr5 5) (asr6 6) (asr7 7)
-+ (asr8 8) (asr9 9) (asr10 10) (asr11 11)
-+ (asr12 12) (asr13 13) (asr14 14) (asr15 15)
-+ (asr16 16) (asr17 17) (asr18 18) (asr19 19)
-+ (asr20 20) (asr21 21) (asr22 22) (asr23 23)
-+ (asr24 24) (asr25 25) (asr26 26) (asr27 27)
-+ (asr28 28) (asr29 29) (asr30 30) (asr31 31)
-+ ))
-+ ()
-+ ()
-+) ; FIXME:wip
-+
-+; This assists the simulator engine, not part of the architecture.
-+; ??? There should be an attribute for these critters.
-+(dsh h-annul-p "annul next insn? - assists execution" () (register BI))
-+
-+; %lo,%hi,etc.
-+
-+(dnh h-lo10 "signed low 10 bits" ()
-+ (immediate (UINT 10)) ; integer (UNSIGNED) 10))
-+ () () ()
-+)
-+
-+(dnh h-lo13 "signed low 13 bits" ()
-+ (immediate (INT 13)) ; integer (SIGNED) 13))
-+ () () ()
-+)
-+
-+(dnh h-hi22 "unsigned high 22 bits" ()
-+ (immediate (UINT 22)) ; integer (UNSIGNED) 22))
-+ () () ()
-+)
-+
-+; Instruction Operands.
-+
-+(dnop rs1 "source register 1" () h-gr f-rs1)
-+(dnop rs2 "source register 2" () h-gr f-rs2)
-+(dnop rd "destination register" () h-gr f-rd)
-+
-+; double-reg args to ldd,std
-+
-+(define-operand
-+ (name rdd)
-+ (comment "rd as two registers")
-+ (type h-gr)
-+ (index f-rd)
-+; (get (args self index)
-+; (mode (DI)
-+; (eq (and index (const 1)) (const 0)) ; predicate, even regs only
-+; (make: DI SI
-+; (reg h-gr index)
-+; (reg h-gr (add index (const 1)))))
-+; )
-+; (set (args self index newval)
-+; (mode (DI)
-+; (eq (and index (const 1)) (const 0)) ; predicate, even regs only
-+; (sequence ()
-+; (set (reg h-gr index)
-+; (slice: SI DI newval (const 0)))
-+; (set (reg h-gr (add index (const 1)))
-+; (slice: SI DI newval (const 1)))))
-+; )
-+; (asm (parse "rdd"))
-+)
-+
-+(dnop simm13 "13 bit signed immediate" () h-lo13 f-simm13)
-+(dnop imm22 "22 bit unsigned immediate" () h-uint f-imm22)
-+
-+(dnop a "annul bit" () h-a f-a)
-+
-+(dnop icc-c "carry flag" (SEM-ONLY) h-icc-c f-nil)
-+(dnop icc-v "overflow flag" (SEM-ONLY) h-icc-v f-nil)
-+(dnop icc-n "negative flag" (SEM-ONLY) h-icc-n f-nil)
-+(dnop icc-z "zero flag" (SEM-ONLY) h-icc-z f-nil)
-+
-+(dnop xcc-c "extended carry flag" (SEM-ONLY) h-xcc-c f-nil)
-+(dnop xcc-v "extended overflow flag" (SEM-ONLY) h-xcc-v f-nil)
-+(dnop xcc-n "extended negative flag" (SEM-ONLY) h-xcc-n f-nil)
-+(dnop xcc-z "extended zero flag" (SEM-ONLY) h-xcc-z f-nil)
-+
-+; These two map h-asr to f-rs1 and f-rd so we have something to use in
-+; the assembler spec, insn format, and semantic fields.
-+; FIXME: 'twould be nice if we could do this mapping on the fly in the
-+; define-insn (i.e. the old (%0,%1 stuff)).
-+(dnop rdasr "read asr operand" () h-asr f-rs1)
-+(dnop wrasr "write asr operand" () h-asr f-rd)
-+
-+(dnop asi "asi field" () h-uint f-asi)
-+
-+(dnop disp22 "22 bit displacement" () h-iaddr f-disp22)
-+(dnop disp30 "30 bit displacement" () h-iaddr f-disp30)
-+
-+(define-operand
-+ (name lo10)
-+ (comment "10 bit signed immediate, for %lo()")
-+ (type h-lo10)
-+ (index f-simm10)
-+ (handlers (parse "lo10"))
-+)
-+(define-operand
-+ (name lo13)
-+ (comment "13 bit signed immediate, for %lo()")
-+ (type h-lo13)
-+ (index f-simm13)
-+ (handlers (parse "lo13"))
-+)
-+(define-operand
-+ (name hi22)
-+ (comment "22 bit unsigned immediate, for %hi()")
-+ (type h-hi22)
-+ (index f-hi22)
-+ (handlers (parse "hi22") (print "hi22"))
-+)
-+
-+; SPARC specific instruction attributes used:
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name TRAP)
-+ (comment "insn is a trap insn")
-+)
-+
-+(define-attr
-+ (for insn)
-+ (type boolean)
-+ (name V9-DEPRECATED)
-+ (comment "insn is deprecated in v9")
-+)
-+
-+; Globally useful macros.
-+
-+; CC is one of icc,xcc.
-+; ??? Might want canonical forms of these.
-+; ??? Maybe move this to a library.
-+; ??? bitfields still on todo list
-+(define-pmacro (test-always cc) (const 1))
-+(define-pmacro (test-never cc) (const 0))
-+(define-pmacro (test-ne cc) (not (.sym cc -z)))
-+(define-pmacro (test-eq cc) (.sym cc -z))
-+(define-pmacro (test-gt cc) (not (or (.sym cc -z) (xor (.sym cc -n) (.sym cc -v)))))
-+(define-pmacro (test-le cc) (or (.sym cc -z) (xor (.sym cc -n) (.sym cc -v))))
-+(define-pmacro (test-ge cc) (not (xor (.sym cc -n) (.sym cc -v))))
-+(define-pmacro (test-lt cc) (xor (.sym cc -n) (.sym cc -v)))
-+(define-pmacro (test-gtu cc) (not (or (.sym cc -c) (.sym cc -z))))
-+(define-pmacro (test-leu cc) (or (.sym cc -c) (.sym cc -z)))
-+(define-pmacro (test-geu cc) (not (.sym cc -c)))
-+(define-pmacro (test-ltu cc) (.sym cc -c))
-+(define-pmacro (test-pos cc) (not (.sym cc -n)))
-+(define-pmacro (test-neg cc) (.sym cc -n))
-+(define-pmacro (test-vc cc) (not (.sym cc -v)))
-+(define-pmacro (test-vs cc) (.sym cc -v))
-+
-+(define-pmacro (uncond-br-sem test cc)
-+ (delay (const 1)
-+ (sequence ()
-+ (if (test cc)
-+ (set pc disp22))
-+ (annul a)))
-+)
-+(define-pmacro (cond-br-sem test cc)
-+ (delay (const 1)
-+ (if (test cc)
-+ (set pc disp22)
-+ (annul a)))
-+)
-+
-+; The rest is broken out into various files.
-+
-+(if (keep-mach? (sparc-v8 sparclite))
-+ (include "sparc32.cpu"))
-+
-+(if (keep-mach? (sparc-v9 sparc-v9a))
-+ (include "sparc64.cpu"))
-+
-+(include "sparccom.cpu")
-+(include "sparcfpu.cpu")
-diff -Nur binutils-2.24.orig/cgen/cpu/sparcfpu.cpu binutils-2.24/cgen/cpu/sparcfpu.cpu
---- binutils-2.24.orig/cgen/cpu/sparcfpu.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/sparcfpu.cpu 2016-06-30 21:26:12.645892801 +0200
-@@ -0,0 +1,527 @@
-+; SPARC 32/64 FPU description. -*- Scheme -*-
-+; This file contains fpu instructions common to both sparc32/sparc64.
-+; It also contains sparc32/64 specific insns, but only when they are a variant
-+; of a collection of common ones (at least that's the current theory).
-+; Copyright (C) 2000 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; FP support is defined even for cpu's without an fpu as the instructions
-+; still have to be assembled and the simulator still has to recognize them
-+; so that the appropriate trap can be generated.
-+;
-+; The physical registers are stored as an array of SI values: here `SI'
-+; denotes "set of 32 bits" rather than "32 bit signed integer".
-+;
-+; wip: currently evaluating the various possibilities
-+
-+; Floating point hardware.
-+
-+; The description needs to know whether the fpu is present.
-+; Creating a utility register for this purposes seems reasonable.
-+; Might want an attribute to denote it as such.
-+
-+(dsh h-fpu? "h/w fpu present?" () (register BI))
-+(dnop fpu? "h/w fpu present?" () h-fpu? f-nil)
-+
-+(define-pmacro (build-freg-name n) ((.sym f n) n))
-+
-+(define-hardware
-+ (name h-fr32)
-+ (semantic-name h-fr)
-+ (comment "sparc32 floating point regs")
-+ (attrs (MACH32))
-+ (type register SI (32))
-+ (indices keyword "%" (.map build-freg-name (.iota 32)))
-+)
-+(define-hardware
-+ (name h-fr64)
-+ (semantic-name h-fr)
-+ (comment "sparc64 floating point regs")
-+ (attrs (MACH64))
-+ (type register SI (64))
-+ (indices keyword "%" (.map build-freg-name (.iota 64)))
-+)
-+
-+(define-hardware
-+ (name h-frd32)
-+ (semantic-name h-frd)
-+ (comment "sparc32 double precision floating point regs")
-+ (attrs VIRTUAL (MACH32))
-+ (type register DI (16))
-+ ; ??? This works, but multiple copies of all the register names might be
-+ ; unpalatable. Another way is to specify a register table plus a constraint.
-+ ;(indices keyword "%" (.map build-freg-name (.iota 16 0 2)))
-+ (get (index) (join DI SI
-+ (reg h-fr index)
-+ (reg h-fr (add index 1))))
-+ (set (index newval)
-+ (sequence ()
-+ (set (reg h-fr index) (subword SI newval 0))
-+ (set (reg h-fr (add index 1)) (subword SI newval 1))))
-+)
-+
-+(define-hardware
-+ (name h-frq32)
-+ (semantic-name h-frq)
-+ (comment "sparc32 quad precision floating point regs")
-+ (attrs VIRTUAL (MACH32))
-+ (type register TF (8))
-+ (indices keyword "%" (.map build-freg-name (.iota 8 0 4)))
-+ (get (index) (join TF SI
-+ (reg h-fr index)
-+ (reg h-fr (add index (const 1)))
-+ (reg h-fr (add index (const 2)))
-+ (reg h-fr (add index (const 3)))))
-+ (set (index newval)
-+ (sequence ()
-+ (set (reg h-fr index) (subword SI newval 0))
-+ (set (reg h-fr (add index (const 1))) (subword SI newval 1))
-+ (set (reg h-fr (add index (const 2))) (subword SI newval 2))
-+ (set (reg h-fr (add index (const 3))) (subword SI newval 3))))
-+)
-+
-+(define-hardware
-+ (name h-frd64)
-+ (semantic-name h-frd)
-+ (comment "sparc64 double precision floating point regs")
-+ (attrs VIRTUAL (MACH64))
-+ (type register DF (32))
-+ (indices keyword "%" (.map build-freg-name (.iota 32 0 2)))
-+ (get (index) (join DF SI
-+ (reg h-fr index)
-+ (reg h-fr (add index (const 1)))))
-+ (set (index newval)
-+ (sequence ()
-+ (set (reg h-fr index) (subword SI newval 0))
-+ (set (reg h-fr (add index (const 1))) (subword SI newval 1))))
-+)
-+
-+(define-hardware
-+ (name h-frq64)
-+ (semantic-name h-frq)
-+ (comment "sparc64 quad precision floating point regs")
-+ (attrs VIRTUAL (MACH64))
-+ (type register TF (16))
-+ (indices keyword "%" (.map build-freg-name (.iota 16 0 4)))
-+ (get (index) (join TF SI
-+ (reg h-fr index)
-+ (reg h-fr (add index (const 1)))
-+ (reg h-fr (add index (const 2)))
-+ (reg h-fr (add index (const 3)))))
-+ (set (index newval)
-+ (sequence ()
-+ (set (reg h-fr index) (subword SI newval 0))
-+ (set (reg h-fr (add index (const 1))) (subword SI newval 1))
-+ (set (reg h-fr (add index (const 2))) (subword SI newval 2))
-+ (set (reg h-fr (add index (const 3))) (subword SI newval 3))))
-+)
-+
-+; fp condition codes
-+
-+(dsh h-fcc0 "%fcc0" () (register (UINT 2)))
-+(dsh h-fcc1 "%fcc1" ((MACH64)) (register (UINT 2)))
-+(dsh h-fcc2 "%fcc2" ((MACH64)) (register (UINT 2)))
-+(dsh h-fcc3 "%fcc3" ((MACH64)) (register (UINT 2)))
-+
-+; sparc64 fpu control regs
-+
-+(dsh h-fsr-rd "fsr rounding direction" ((MACH64)) (register UQI))
-+(dsh h-fsr-tem "fsr trap enable mask" ((MACH64)) (register UQI))
-+(dsh h-fsr-ns "fsr nonstandard fp" ((MACH64)) (register BI))
-+(dsh h-fsr-ver "fsr version" ((MACH64)) (register UQI))
-+(dsh h-fsr-ftt "fsr fp trap type" ((MACH64)) (register UQI))
-+(dsh h-fsr-qne "fsr queue not empty" ((MACH64)) (register BI))
-+(dsh h-fsr-aexc "fsr accrued exception" ((MACH64)) (register UQI))
-+(dsh h-fsr-cexc "fsr current exception" ((MACH64)) (register UQI))
-+;(dsh h-fsr "floating point state" ((MACH64)) (register UDI))
-+
-+(dsh h-fpsr-fef "fpsr enable fp" ((MACH64)) (register BI))
-+(dsh h-fpsr-du "fpsr dirty upper" ((MACH64)) (register BI))
-+(dsh h-fpsr-dl "fpsr dirty lower" ((MACH64)) (register BI))
-+
-+(define-hardware
-+ (name h-fpsr)
-+ (comment "fp regs state")
-+ (attrs VIRTUAL (MACH64))
-+ (type register UQI)
-+ (get () (const 0)) ; FIXME
-+ (set (newval) (set (raw-reg UQI h-fpsr) (const 0))) ; FIXME
-+)
-+
-+; Floating point operands.
-+
-+(define-operand
-+ (name frs1s)
-+ (comment "single precision floating point source register 1")
-+ (type h-fr)
-+ (index f-rs1)
-+ (mode SF)
-+)
-+(define-operand
-+ (name frs2s)
-+ (comment "single precision floating point source register 2")
-+ (type h-fr)
-+ (index f-rs2)
-+ (mode SF)
-+)
-+(define-operand
-+ (name frds)
-+ (comment "single precision floating point dest'n register")
-+ (type h-fr)
-+ (index f-rd)
-+ (mode SF)
-+)
-+
-+(define-operand
-+ (name frs1d)
-+ (comment "double precision floating point source register 1")
-+ (attrs (MACH32))
-+ (type h-frd)
-+ (index f-rs1)
-+ (mode DF)
-+)
-+(define-operand
-+ (name frs2d)
-+ (comment "double precision floating point source register 2")
-+ (attrs (MACH32))
-+ (type h-frd)
-+ (index f-rs2)
-+ (mode DF)
-+)
-+(define-operand
-+ (name frdd)
-+ (comment "double precision floating point dest'n register")
-+ (attrs (MACH32))
-+ (type h-frd)
-+ (index f-rd)
-+ (mode DF)
-+)
-+
-+(dnop frs1q "quad precision floating point source register 1" ((MACH32))
-+ h-frq f-rs1)
-+(dnop frs2q "quad precision floating point source register 2" ((MACH32))
-+ h-frq f-rs2)
-+(dnop frdq "quad precision floating point dest'n register" ((MACH32))
-+ h-frq f-rd)
-+
-+; Encoding/decoding of field for sparc64 requires extra effort.
-+; See v9 page 40: 5.1.4.1 Floating-Point Register Number Encoding.
-+(df f-frs1d-64 "rs1 field for sparc64 DF regs" ((MACH64)) 18 5 UINT
-+ ((value pc) (or INT (srl value (const 5)) (and value (const #x1e))))
-+ ((value pc) (or INT (sll (and value (const 1)) (const 5))
-+ (and value (const #x1e))))
-+)
-+(df f-frs2d-64 "rs2 field for sparc64 DF regs" ((MACH64)) 4 5 UINT
-+ ((value pc) (or INT (srl value (const 5)) (and value (const #x1e))))
-+ ((value pc) (or INT (sll (and value (const 1)) (const 5))
-+ (and value (const #x1e))))
-+)
-+(df f-frdd-64 "rd field for sparc64 DF regs" ((MACH64)) 29 5 UINT
-+ ((value pc) (or INT (srl value (const 5)) (and value (const #x1e))))
-+ ((value pc) (or INT (sll (and value (const 1)) (const 5))
-+ (and value (const #x1e))))
-+)
-+(dnop frs1d "double precision floating point source register 1" ((MACH64))
-+ h-frd f-frs1d-64)
-+(dnop frs2d "double precision floating point source register 2" ((MACH64))
-+ h-frd f-frs2d-64)
-+(dnop frdd "double precision floating point dest'n register" ((MACH64))
-+ h-frd f-frdd-64)
-+
-+; Encoding/decoding of field for sparc64 requires extra effort.
-+; See v9 page 40: 5.1.4.1 Floating-Point Register Number Encoding.
-+(df f-frs1q-64 "rs1 field for sparc64 TF regs" ((MACH64)) 18 5 UINT
-+ ((value pc) (or INT (srl value (const 5)) (and value (const #x1e))))
-+ ((value pc) (or INT (sll (and value (const 1)) (const 5))
-+ (and value (const #x1e))))
-+)
-+(df f-frs2q-64 "rs2 field for sparc64 TF regs" ((MACH64)) 4 5 UINT
-+ ((value pc) (or INT (srl value (const 5)) (and value (const #x1e))))
-+ ((value pc) (or INT (sll (and value (const 1)) (const 5))
-+ (and value (const #x1e))))
-+)
-+(df f-frdq-64 "rd field for sparc64 TF regs" ((MACH64)) 29 5 UINT
-+ ((value pc) (or INT (srl value (const 5)) (and value (const #x1e))))
-+ ((value pc) (or INT (sll (and value (const 1)) (const 5))
-+ (and value (const #x1e))))
-+)
-+(dnop frs1q "quad precision floating point source register 1" ((MACH64))
-+ h-frq f-frs1q-64)
-+(dnop frs2q "quad precision floating point source register 2" ((MACH64))
-+ h-frq f-frs2q-64)
-+(dnop frdq "quad precision floating point dest'n register" ((MACH64))
-+ h-frq f-frdq-64)
-+
-+(dnop fcc0 "%fcc0" () h-fcc0 f-nil)
-+
-+; Misc. support macros.
-+; FIXME: TRAP32 wip
-+; FIXME: sparc32/sparc64 differences
-+; FIXME: trap handling in general (c-call's used until more thought invested)
-+
-+; Check if fpu is present and enabled.
-+
-+(define-pmacro (check-fp-enabled)
-+ ; FIXME: more things to check
-+ (if (not fpu?)
-+ (c-call VOID "@cpu@_hw_trap" pc (c-code INT "TRAP32_FP_DIS")))
-+)
-+
-+; Return pointer to FPU.
-+; ??? wip. maybe move `snan?' to language proper?
-+
-+(define-pmacro (current-fpu) (c-call PTR "CGEN_CPU_FPU"))
-+
-+; Issue appropriate trap if x is an snan.
-+
-+(define-pmacro (check-sf-snan x)
-+ (if (c-raw-call BI "cgen_sf_snan_p" (current-fpu) x)
-+ (c-call VOID "@cpu@_hw_trap" pc (c-code INT "TRAP32_FP_DIS"))) ; FIXME
-+)
-+
-+(define-pmacro (check-df-snan x)
-+ (if (c-raw-call BI "cgen_df_snan_p" (current-fpu) x)
-+ (c-call VOID "@cpu@_hw_trap" pc (c-code INT "TRAP32_FP_DIS"))) ; FIXME
-+)
-+
-+; Floating point memory ops.
-+
-+; Note: the startup code uses a load to %f0 to see if an fpu is present.
-+; Other startup code tries to set the EF bit in the PSR.
-+
-+(define-pmacro (fp-ld-op name comment op3 mode dest)
-+ (begin
-+ (dnmi (.sym name "f-reg") comment ()
-+ (.str name " [$rs1],$" dest)
-+ (emit (.sym name f-reg+reg) rs1 (rs2 0) dest))
-+ (dnmi (.sym name "f-reg+0") comment ()
-+ (.str name " [$rs1],$" dest)
-+ (emit (.sym name f-reg+imm) rs1 (simm13 0) dest))
-+ (dni (.sym name "f-reg+reg") comment ()
-+ (.str name " [$rs1+$rs2],$" dest)
-+ (+ OP_3 op3 dest rs1 (f-i 0) (f-res-asi 0) rs2)
-+ (sequence ()
-+ (check-fp-enabled)
-+ (set dest (mem mode (add WI rs1 rs2))))
-+ ())
-+ (dni (.sym name "f-reg+imm") comment ()
-+ (.str name " [$rs1+$simm13],$" dest)
-+ (+ OP_3 op3 dest rs1 (f-i 1) simm13)
-+ (sequence ()
-+ (check-fp-enabled)
-+ (set dest (mem mode (add WI rs1 simm13))))
-+ ())
-+ (dnmi (.sym name "f-reg/asi") comment ()
-+ (.str name " [$rs1]$asi,$" dest)
-+ (emit (.sym name f-reg+reg/asi) rs1 (rs2 0) asi dest))
-+ (dni (.sym name "f-reg+reg/asi") comment ()
-+ (.str name " [$rs1+$rs2]$asi,$" dest)
-+ (+ OP_3 (.sym op3 A) dest rs1 (f-i 0) asi rs2)
-+ (sequence ()
-+ (check-fp-enabled)
-+ (set dest (mem mode (add WI rs1 rs2))))
-+ ())
-+ )
-+)
-+(fp-ld-op ld "fp SF load" OP3_LDF SF frds)
-+(fp-ld-op ldd "fp DF load" OP3_LDDF DF frdd)
-+
-+(define-pmacro (fp-st-op name comment op3 mode src)
-+ (begin
-+ (dnmi (.sym name "f-reg") comment ()
-+ (.str name " $" src ",[$rs1]")
-+ (emit (.sym name f-reg+reg) rs1 (rs2 0) src))
-+ (dnmi (.sym name "f-reg+0") comment ()
-+ (.str name " $" src ",[$rs1]")
-+ (emit (.sym name f-reg+imm) rs1 (simm13 0) src))
-+ (dni (.sym name "f-reg+reg") comment ()
-+ (.str name " $" src ",[$rs1+$rs2]")
-+ (+ OP_3 op3 src rs1 (f-i 0) (f-res-asi 0) rs2)
-+ (sequence ()
-+ (check-fp-enabled)
-+ (set (mem mode (add WI rs1 rs2)) src))
-+ ())
-+ (dni (.sym name "f-reg+imm") comment ()
-+ (.str name " $" src ",[$rs1+$simm13]")
-+ (+ OP_3 op3 src rs1 (f-i 1) simm13)
-+ (sequence ()
-+ (check-fp-enabled)
-+ (set (mem mode (add WI rs1 simm13)) src))
-+ ())
-+ (dnmi (.sym name "f-reg/asi") comment ()
-+ (.str name " $" src ",[$rs1]$asi")
-+ (emit (.sym name -reg+reg/asi) rs1 (rs2 0) asi src))
-+ (dni (.sym name "f-reg+reg/asi") comment ()
-+ (.str name " $" src ",[$rs1+$rs2]$asi")
-+ (+ OP_3 (.sym op3 A) src rs1 (f-i 0) asi rs2)
-+ (sequence ()
-+ (check-fp-enabled)
-+ (set (mem mode (add WI rs1 rs2)) src))
-+ ())
-+ )
-+)
-+(fp-st-op st "fp SF store" OP3_STF SF frds)
-+(fp-st-op std "fp DF store" OP3_STDF DF frdd)
-+
-+; SF mode arithmetic ops.
-+
-+(define-pmacro (sf-unary-op name comment op3 fpop1 fn)
-+ (begin
-+ (dni name comment ()
-+ (.str name " $frs1s,$frds")
-+ (+ OP_2 op3 fpop1 frds frs1s (f-rs2 0))
-+ (sequence ()
-+ (check-fp-enabled)
-+ (set frds (fn frs1s))
-+ ; ??? dest is modified if snan, assign to tmp first?
-+ ; [grep for all check-*-snan's]
-+ (check-sf-snan frds))
-+ ())
-+ )
-+)
-+
-+(define-pmacro (sf-binary-op name comment op3 fpop1 fn)
-+ (begin
-+ (dni name comment ()
-+ (.str name " $frs1s,$frs2s,$frds")
-+ (+ OP_2 op3 fpop1 frds frs1s frs2s)
-+ (sequence ()
-+ (check-fp-enabled)
-+ (set frds (fn frs1s frs2s))
-+ (check-sf-snan frds))
-+ ())
-+ )
-+)
-+
-+(sf-unary-op fnegs "32 bit fp neg" OP3_FPOPS1 FPOPS1_FNEGS neg)
-+(sf-unary-op fabss "32 bit fp abs" OP3_FPOPS1 FPOPS1_FABSS abs)
-+
-+(sf-binary-op fadds "32 bit fp add" OP3_FPOPS1 FPOPS1_FADDS add)
-+(sf-binary-op fsubs "32 bit fp sub" OP3_FPOPS1 FPOPS1_FSUBS sub)
-+(sf-binary-op fmuls "32 bit fp mul" OP3_FPOPS1 FPOPS1_FMULS mul)
-+(sf-binary-op fdivs "32 bit fp div" OP3_FPOPS1 FPOPS1_FDIVS div)
-+
-+; ??? floating point compares are wip
-+
-+(dni fp-fcmps "32 bit compare" ()
-+ "fcmps $frs1s,$frs2s"
-+ (+ OP_2 OP3_FPOPS2 FPOPS2_FCMPS (f-rd 0) frs1s frs2s)
-+ (sequence ()
-+ (check-fp-enabled)
-+ (set fcc0 (c-call UINT "SFCMP" frs1s frs2s)))
-+ ()
-+)
-+
-+(dni fp-fcmpse "32 bit compare, signal if any nans" ()
-+ "fcmpse $frs1s,$frs2s"
-+ (+ OP_2 OP3_FPOPS2 FPOPS2_FCMPSE (f-rd 0) frs1s frs2s)
-+ (sequence ()
-+ (check-fp-enabled)
-+ (check-sf-snan frs1s)
-+ (check-sf-snan frs2s)
-+ (set fcc0 (c-call UINT "SFCMP" frs1s frs2s)))
-+ ()
-+)
-+
-+; DF mode arithmetic ops.
-+
-+(define-pmacro (df-unary-op name comment op3 fpop1 fn)
-+ (begin
-+ (dni name comment ()
-+ (.str name " $frs1d,$frdd")
-+ (+ OP_2 op3 fpop1 frdd frs1d (f-rs2 0))
-+ (sequence ()
-+ (check-fp-enabled)
-+ (set frdd (fn frs1d))
-+ (check-df-snan frdd))
-+ ())
-+ )
-+)
-+
-+(define-pmacro (df-binary-op name comment op3 fpop1 fn)
-+ (begin
-+ (dni name comment ()
-+ (.str name " $frs1d,$frs2d,$frdd")
-+ (+ OP_2 op3 fpop1 frdd frs1d frs2d)
-+ (sequence ()
-+ (check-fp-enabled)
-+ (set frdd (fn frs1d frs2d))
-+ (check-df-snan frdd))
-+ ())
-+ )
-+)
-+
-+(df-unary-op fnegd "64 bit fp neg" OP3_FPOPS1 FPOPS1_FNEGD neg)
-+(df-unary-op fabsd "64 bit fp abs" OP3_FPOPS1 FPOPS1_FABSD abs)
-+
-+(df-binary-op faddd "64 bit fp add" OP3_FPOPS1 FPOPS1_FADDD add)
-+(df-binary-op fsubd "64 bit fp sub" OP3_FPOPS1 FPOPS1_FSUBD sub)
-+(df-binary-op fmuld "64 bit fp mul" OP3_FPOPS1 FPOPS1_FMULD mul)
-+(df-binary-op fdivd "64 bit fp div" OP3_FPOPS1 FPOPS1_FDIVD div)
-+
-+; ??? floating point compares are wip
-+
-+(dni fp-fcmpd "64 bit compare" ()
-+ "fcmpd $frs1d,$frs2d"
-+ (+ OP_2 OP3_FPOPS2 FPOPS2_FCMPD (f-rd 0) frs1d frs2d)
-+ (sequence ()
-+ (check-fp-enabled)
-+ (set fcc0 (c-call UINT "DFCMP" frs1d frs2d)))
-+ ()
-+)
-+
-+(dni fp-fcmpde "64 bit compare, signal if any nans" ()
-+ "fcmpde $frs1d,$frs2d"
-+ (+ OP_2 OP3_FPOPS2 FPOPS2_FCMPDE (f-rd 0) frs1d frs2d)
-+ (sequence ()
-+ (check-fp-enabled)
-+ (check-df-snan frs1d)
-+ (check-df-snan frs2d)
-+ (set fcc0 (c-call UINT "DFCMP" frs1d frs2d)))
-+ ()
-+)
-+
-+; Branches
-+
-+; CC is one of fcc0,fcc
-+(define-pmacro (ftest-u cc) (eq cc FCC_UN))
-+(define-pmacro (ftest-g cc) (eq cc FCC_GT))
-+(define-pmacro (ftest-ug cc) (orif (eq cc FCC_UN) (eq cc FCC_GT)))
-+(define-pmacro (ftest-l cc) (eq cc FCC_LT))
-+(define-pmacro (ftest-ul cc) (orif (eq cc FCC_UN) (eq cc FCC_LT)))
-+(define-pmacro (ftest-lg cc) (orif (eq cc FCC_LT) (eq cc FCC_GT)))
-+(define-pmacro (ftest-ne cc) (ne cc FCC_EQ))
-+(define-pmacro (ftest-e cc) (eq cc FCC_EQ))
-+(define-pmacro (ftest-ue cc) (orif (eq cc FCC_UN) (eq cc FCC_EQ)))
-+(define-pmacro (ftest-ge cc) (orif (eq cc FCC_GT) (eq cc FCC_EQ)))
-+(define-pmacro (ftest-uge cc) (ne cc FCC_LT))
-+(define-pmacro (ftest-le cc) (orif (eq cc FCC_LT) (eq cc FCC_EQ)))
-+(define-pmacro (ftest-ule cc) (ne cc FCC_GT))
-+(define-pmacro (ftest-o cc) (ne cc FCC_UN))
-+
-+(define-pmacro (fbfcc-branch bname comment cond test br-sem)
-+ (begin
-+ (dni bname (.str "fp branch " comment) (V9-DEPRECATED)
-+ (.str bname "$a $disp22")
-+ (+ OP_0 a cond OP2_FBFCC disp22)
-+ (br-sem test fcc0)
-+ ())
-+ )
-+)
-+(fbfcc-branch fba "always" FCOND_A test-always uncond-br-sem)
-+(fbfcc-branch fbn "never" FCOND_N test-never uncond-br-sem)
-+(fbfcc-branch fbu "unordered" FCOND_U ftest-u cond-br-sem)
-+(fbfcc-branch fbg "greater" FCOND_G ftest-g cond-br-sem)
-+(fbfcc-branch fbug "unordered or greater" FCOND_UG ftest-ug cond-br-sem)
-+(fbfcc-branch fbl "less" FCOND_L ftest-l cond-br-sem)
-+(fbfcc-branch fbul "unordered or less" FCOND_UL ftest-ul cond-br-sem)
-+(fbfcc-branch fblg "less or greater" FCOND_LG ftest-lg cond-br-sem)
-+(fbfcc-branch fbne "not equal" FCOND_NE ftest-ne cond-br-sem)
-+(fbfcc-branch fbe "equal" FCOND_E ftest-e cond-br-sem)
-+(fbfcc-branch fbue "unordered or equal" FCOND_UE ftest-ue cond-br-sem)
-+(fbfcc-branch fbge "greater or equal" FCOND_GE ftest-ge cond-br-sem)
-+(fbfcc-branch fbuge "unordered or greater or equal" FCOND_UGE ftest-uge cond-br-sem)
-+(fbfcc-branch fble "less or equal" FCOND_LE ftest-le cond-br-sem)
-+(fbfcc-branch fbule "unordered or less or equal" FCOND_ULE ftest-ule cond-br-sem)
-+(fbfcc-branch fbo "ordered" FCOND_O ftest-o cond-br-sem)
-diff -Nur binutils-2.24.orig/cgen/cpu/sparc.opc binutils-2.24/cgen/cpu/sparc.opc
---- binutils-2.24.orig/cgen/cpu/sparc.opc 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/sparc.opc 2016-06-30 21:26:12.645892801 +0200
-@@ -0,0 +1,177 @@
-+/* SPARC opcode support. -*- C -*-
-+ Copyright (C) 2000, 2005 Red Hat, Inc.
-+ This file is part of CGEN.
-+ This file is copyrighted with the GNU General Public License.
-+ See file COPYING for details. */
-+
-+/* This file is an addendum to sparc.cpu. Heavy use of C code isn't
-+ appropriate in .cpu files, so it resides here. This especially applies
-+ to assembly/disassembly where parsing/printing can be quite involved.
-+ Such things aren't really part of the specification of the cpu, per se,
-+ so .cpu files provide the general framework and .opc files handle the
-+ nitty-gritty details as necessary.
-+
-+ Each section is delimited with start and end markers.
-+
-+ <cpu>-opc.h additions use: "-- opc.h"
-+ <cpu>-opc.c additions use: "-- opc.c"
-+ <cpu>-asm.c additions use: "-- asm.c"
-+ <cpu>-dis.c additions use: "-- dis.c" */
-+
-+/* -- opc.h */
-+
-+#undef CGEN_DIS_HASH_SIZE
-+#define CGEN_DIS_HASH_SIZE 256
-+#undef CGEN_DIS_HASH
-+extern const unsigned int sparc_cgen_opcode_bits[];
-+#define CGEN_DIS_HASH(buffer, insn) \
-+ ((((insn) >> 24) & 0xc0) \
-+ | (((insn) & sparc_cgen_opcode_bits[((insn) >> 30) & 3]) >> 19))
-+
-+/* -- */
-+
-+/* -- asm.c */
-+
-+static const char * MISSING_CLOSING_PARENTHESIS = N("missing `)'");
-+
-+/* It is important that we only look at insn code bits as that is how the
-+ opcode table is hashed. OPCODE_BITS is a table of valid bits for each
-+ of the main types (0,1,2,3). */
-+const unsigned int sparc_cgen_opcode_bits[4] =
-+{
-+ 0x01c00000, 0x0, 0x01f80000, 0x01f80000
-+};
-+
-+/* Handle %lo(). */
-+
-+static const char *
-+parse_lo10 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ if (strncasecmp (*strp, "%lo(", 4) == 0)
-+ {
-+ *strp += 4;
-+ errmsg = cgen_parse_address (od, strp, opindex, BFD_RELOC_LO10,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ value &= 0x3ff;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return cgen_parse_unsigned_integer (od, strp, opindex, valuep);
-+}
-+
-+static const char *
-+parse_lo13 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ if (strncasecmp (*strp, "%lo(", 4) == 0)
-+ {
-+ *strp += 4;
-+ errmsg = cgen_parse_address (od, strp, opindex, BFD_RELOC_LO10,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ value &= 0x3ff;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return cgen_parse_unsigned_integer (od, strp, opindex, valuep);
-+}
-+
-+/* Handle %hi(). */
-+
-+static const char *
-+parse_hi22 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result_type;
-+ bfd_vma value;
-+
-+ if (strncasecmp (*strp, "%hi(", 4) == 0)
-+ {
-+ *strp += 4;
-+ errmsg = cgen_parse_address (od, strp, opindex, BFD_RELOC_HI22,
-+ & result_type, & value);
-+ if (**strp != ')')
-+ return MISSING_CLOSING_PARENTHESIS;
-+ ++*strp;
-+ if (result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ value >>= 10;
-+ *valuep = value;
-+ return errmsg;
-+ }
-+
-+ return cgen_parse_unsigned_integer (od, strp, opindex, valuep);
-+}
-+
-+/* -- */
-+
-+/* -- dis.c */
-+
-+/* Include "%hi(foo)" in sethi output. */
-+
-+static void
-+print_hi22 (CGEN_CPU_DESC cd,
-+ void * dis_info,
-+ long value,
-+ unsigned int attrs,
-+ bfd_vma pc,
-+ int length)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ (*info->fprintf_func) (info->stream, "%%hi(0x%lx)", value << 10);
-+}
-+
-+#undef CGEN_PRINT_INSN
-+#define CGEN_PRINT_INSN sparc_print_insn
-+
-+static int
-+sparc_print_insn (CGEN_CPU_DESC cd,
-+ bfd_vma pc,
-+ disassemble_info *info)
-+{
-+ char buffer[CGEN_MAX_INSN_SIZE];
-+ char *buf = buffer;
-+ int status;
-+ unsigned long insn_value;
-+ int len;
-+
-+ /* Read the base part of the insn. */
-+ status = (*info->read_memory_func) (pc, buf, 4, info);
-+ if (status != 0)
-+ {
-+ (*info->memory_error_func) (status, pc, info);
-+ return -1;
-+ }
-+
-+ len = print_insn (od, pc, info, buf, 4);
-+ if (len != 0)
-+ return len;
-+
-+ /* CGEN doesn't handle this insn yet. Fall back on old way. */
-+ return old_print_insn_sparc (pc, info);
-+}
-+
-+/* -- */
-diff -Nur binutils-2.24.orig/cgen/cpu/thumb.cpu binutils-2.24/cgen/cpu/thumb.cpu
---- binutils-2.24.orig/cgen/cpu/thumb.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/thumb.cpu 2016-06-30 21:26:12.645892801 +0200
-@@ -0,0 +1,842 @@
-+; ARM/Thumb instructions. -*- Scheme -*-
-+; Copyright (C) 2000 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+;
-+; This file is included by arm.cpu.
-+
-+; Hardware elements.
-+
-+(define-hardware
-+ (name h-gr-t)
-+ (comment "Thumb's general purpose registers")
-+ (attrs (ISA thumb) VIRTUAL) ; ??? CACHE-ADDR should be doable
-+ (type register WI (8))
-+ (indices keyword ""
-+ ((r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)))
-+ (get (regno) (reg h-gr regno))
-+ (set (regno newval) (set (reg h-gr regno) newval))
-+)
-+
-+(define-hardware
-+ (name h-lr-t)
-+ (comment "Thumb's access to the LR register")
-+ (attrs (ISA thumb) VIRTUAL)
-+ (type register WI)
-+ (get () (reg h-gr 14))
-+ (set (newval) (set (reg h-gr 14) newval))
-+)
-+
-+(define-hardware
-+ (name h-sp-t)
-+ (comment "Thumb's access to the SP register")
-+ (attrs (ISA thumb) VIRTUAL)
-+ (type register WI)
-+ (get () (reg h-gr 13))
-+ (set (newval) (set (reg h-gr 13) newval))
-+)
-+
-+; Instruction fields.
-+
-+; define-normal-thumb-field
-+(define-pmacro (dntf name comment attrs start length)
-+ (dnf name comment (.splice (.unsplice attrs) (ISA thumb)) start length)
-+)
-+
-+; Main opcode fields.
-+(dntf f-op3 "First 3 bits of opcode" () 15 3)
-+(dntf f-op4 "First 4 bits of opcode" () 15 4)
-+(dntf f-op5 "First 5 bits of opcode" () 15 5)
-+(dntf f-op6 "First 6 bits of opcode" () 15 6)
-+(dntf f-op8 "First 8 bits of opcode" () 15 8)
-+
-+; Other opcode like fields with special names.
-+(dntf f-h1 "h1 field in hireg insns" () 7 1)
-+(dntf f-h2 "h2 field in hireg insns" () 6 1)
-+(dntf f-l "load/store indicator" () 11 1)
-+(dntf f-b "byte/word indicator" () 10 1)
-+(dntf f-h "byte/halfword indicator" () 11 1)
-+
-+; Misc. remaining opcode fields (constant values but unnamed).
-+(dntf f-bit9 "bit 9" () 9 1)
-+
-+; Data fields.
-+(dntf f-offset5 "5 bit unsigned immediate" () 10 5)
-+(dntf f-rs "Rs (source reg)" () 5 3)
-+(dntf f-rd "Rd (dest reg)" () 2 3)
-+(dntf f-rn "Rn (2nd source reg in add/sub insns" () 8 3)
-+(dntf f-offset3 "3 bit unsigned immediate in add/sub insns" () 8 3)
-+(dntf f-bit10-rd "Rd (dest reg) at bit 10" () 10 3)
-+(dntf f-offset8 "8 bit unsigned immediate" () 7 8)
-+(dntf f-ro "Ro (offset register)" () 8 3)
-+(dntf f-rb "Rb (base register)" () 5 3)
-+
-+; Instruction operands.
-+
-+; define-normal-thumb-operand
-+(define-pmacro (dntop name comment attrs hw indx)
-+ (dnop name comment (.splice (.unsplice attrs) (ISA thumb)) hw indx)
-+)
-+
-+(dntop sp "stack pointer" () h-sp-t f-nil)
-+(dntop lr "link register" () h-lr-t f-nil)
-+
-+(dntop rd "destination register" () h-gr-t f-rd)
-+(dntop rs "source register" () h-gr-t f-rs)
-+(dntop offset5 "5 bit unsigned immediate" () h-uint f-offset5)
-+(dntop rn "2nd source register" () h-gr-t f-rn)
-+(dntop offset3 "3 bit unsigned immediate" () h-uint f-offset3)
-+(dntop offset8 "8 bit unsigned immediate" () h-uint f-offset8)
-+
-+(dntop bit10-rd "rd in bits 10,9,8" () h-gr-t f-bit10-rd)
-+
-+(dntop ro "offset register" () h-gr-t f-ro)
-+(dntop rb "base register" () h-gr-t f-rb)
-+
-+; Instruction definitions.
-+
-+; Cover macro to dni to indicate these are all Thumb insns.
-+; dnti: define-normal-thumb-insn
-+
-+(define-pmacro (dnti xname xcomment xattrs xsyntax xformat xsemantics)
-+ (define-insn
-+ (name xname)
-+ (comment xcomment)
-+ (.splice attrs (.unsplice xattrs) (ISA thumb))
-+ (syntax xsyntax)
-+ (format xformat)
-+ (semantics xsemantics)
-+ )
-+)
-+
-+; Move shifted register insns.
-+
-+(dntf f-shift-op "Move shifted register opcode" () 12 2)
-+
-+(dnti lsl "logical shift left"
-+ ()
-+ "lsl $rd,$rs,#$offset5"
-+ (+ (f-op3 0) (f-shift-op 0) offset5 rs rd)
-+ (sequence ((BI carry-out))
-+ (set carry-out
-+ (c-call BI "compute_carry_out_immshift" rs
-+ SHIFT-TYPE-lsl offset5 cbit))
-+ (set rd (sll rs offset5))
-+ (set-logical-cc rd carry-out))
-+)
-+(dnti lsr "logical shift right"
-+ ()
-+ "lsr $rd,$rs,#$offset5"
-+ (+ (f-op3 0) (f-shift-op 1) offset5 rs rd)
-+ (sequence ((BI carry-out))
-+ (set carry-out
-+ (c-call BI "compute_carry_out_immshift" rs
-+ SHIFT-TYPE-lsr offset5 cbit))
-+ (set rd (srl rs offset5))
-+ (set-logical-cc rd carry-out))
-+)
-+(dnti asr "arithmetic shift right"
-+ ()
-+ "asr $rd,$rs,#$offset5"
-+ (+ (f-op3 0) (f-shift-op 2) offset5 rs rd)
-+ (sequence ((BI carry-out))
-+ (set carry-out
-+ (c-call BI "compute_carry_out_immshift" rs
-+ SHIFT-TYPE-asr offset5 cbit))
-+ (set rd (sra rs offset5))
-+ (set-logical-cc rd carry-out))
-+)
-+
-+; Add/subtract insns.
-+
-+(dntf f-i "immediate indicator in add/sub insns" () 10 1)
-+
-+(dntf f-addsub-op "Add/subtract opcode" () 9 1)
-+
-+(dnti add "add reg+reg"
-+ ()
-+ "add $rd,$rs,$rn"
-+ (+ (f-op5 3) (f-i 0) (f-addsub-op 0) rn rs rd)
-+ (sequence ()
-+ (set-add-flags rs rn 0)
-+ (set rd (add rs rn)))
-+)
-+(dnti addi "add reg+imm"
-+ ()
-+ "add $rd,$rs,#$offset3"
-+ (+ (f-op5 3) (f-i 1) (f-addsub-op 0) offset3 rs rd)
-+ (sequence ()
-+ (set-add-flags rs offset3 0)
-+ (set rd (add rs offset3)))
-+)
-+(dnti sub "sub reg+reg"
-+ ()
-+ "sub $rd,$rs,$rn"
-+ (+ (f-op5 3) (f-i 0) (f-addsub-op 1) rn rs rd)
-+ (sequence ()
-+ (set-sub-flags rs rn 1)
-+ (set rd (sub rs rn)))
-+)
-+(dnti subi "sub reg+imm"
-+ ()
-+ "sub $rd,$rs,#$offset3"
-+ (+ (f-op5 3) (f-i 1) (f-addsub-op 1) offset3 rs rd)
-+ (sequence ()
-+ (set-sub-flags rs offset3 1)
-+ (set rd (sub rs offset3)))
-+)
-+
-+; Move/compare/add/subtract immediate insns.
-+
-+(dntf f-mcasi-op "Move/compare/add/subtract immediate opcode" () 12 2)
-+
-+(dnti mov "move imm->reg"
-+ ()
-+ "mov ${bit10-rd},#$offset8"
-+ (+ (f-op3 1) (f-mcasi-op 0) bit10-rd offset8)
-+ (sequence ()
-+ (set bit10-rd offset8)
-+ (set-zn-flags bit10-rd))
-+)
-+(dnti cmp "cmp reg,imm"
-+ ()
-+ "cmp ${bit10-rd},#$offset8"
-+ (+ (f-op3 1) (f-mcasi-op 1) bit10-rd offset8)
-+ (set-sub-flags bit10-rd offset8 1)
-+)
-+(dnti addi8 "add 8 bit immediate"
-+ ()
-+ "add ${bit10-rd},#$offset8"
-+ (+ (f-op3 1) (f-mcasi-op 2) bit10-rd offset8)
-+ (sequence ()
-+ (set-add-flags bit10-rd offset8 0)
-+ (set bit10-rd (add bit10-rd offset8)))
-+)
-+(dnti subi8 "sub 8 bit immediate"
-+ ()
-+ "sub ${bit10-rd},#$offset8"
-+ (+ (f-op3 1) (f-mcasi-op 3) bit10-rd offset8)
-+ (sequence ()
-+ (set-sub-flags bit10-rd offset8 1)
-+ (set bit10-rd (sub bit10-rd offset8)))
-+)
-+
-+; ALU operations.
-+
-+(dntf f-alu-op "ALU opcode" () 9 4)
-+
-+(define-pmacro (alu-logical-op mnemonic comment alu-opcode sem-fn)
-+ (dnti (.sym alu- mnemonic) comment
-+ ()
-+ (.str mnemonic " $rd,$rs")
-+ (+ (f-op6 #x10) (f-alu-op alu-opcode) rs rd)
-+ (sequence ()
-+ (set rd (sem-fn rd rs))
-+ (set-zn-flags rd))
-+ )
-+)
-+
-+(define-pmacro (alu-arith-op mnemonic comment alu-opcode sem-fn set-flags)
-+ (dnti (.sym alu- mnemonic) comment
-+ ()
-+ (.str mnemonic " $rd,$rs")
-+ (+ (f-op6 #x10) (f-alu-op alu-opcode) rs rd)
-+ (sequence ((SI result))
-+ (set result (sem-fn rd rs cbit))
-+ (set-flags rd rs cbit)
-+ (set rd result))
-+ )
-+)
-+
-+(define-pmacro (alu-shift-op mnemonic comment alu-opcode sem-fn shift-type)
-+ (dnti (.sym alu- mnemonic) comment
-+ ()
-+ (.str mnemonic " $rd,$rs")
-+ (+ (f-op6 #x10) (f-alu-op alu-opcode) rs rd)
-+ (sequence ((BI carry-out) (SI result))
-+ (set carry-out
-+ (c-call BI "compute_carry_out_regshift"
-+ rd shift-type rs cbit))
-+ (set result (sem-fn rd rs))
-+ (set rd result)
-+ (set-logical-cc result carry-out))
-+ )
-+)
-+
-+(alu-logical-op and "and" 0 and)
-+(alu-logical-op eor "xor" 1 xor)
-+
-+(alu-shift-op lsl "logical shift left" 2 sll SHIFT-TYPE-lsl)
-+(alu-shift-op lsr "logical shift right" 3 srl SHIFT-TYPE-lsr)
-+(alu-shift-op asr "arithmetic shift right" 4 sra SHIFT-TYPE-asr)
-+(alu-shift-op ror "rotate right" 7 ror SHIFT-TYPE-ror)
-+
-+(alu-arith-op adc "add with carry" 5
-+ (.pmacro (rd rs cbit) (addc rd rs cbit))
-+ (.pmacro (rd rs cbit) (set-add-flags rd rs cbit)))
-+(alu-arith-op sbc "subtract with carry (borrow)" 6
-+ (.pmacro (rd rs cbit) (subc rd rs (not cbit)))
-+ (.pmacro (rd rs cbit) (set-sub-flags rd rs cbit)))
-+
-+(dnti alu-tst "test"
-+ ()
-+ "tst $rd,$rs"
-+ (+ (f-op6 #x10) (f-alu-op 8) rs rd)
-+ (sequence ((SI x))
-+ (set x (and rd rs))
-+ (set-zn-flags x))
-+)
-+
-+(alu-arith-op neg "negate" 9
-+ (.pmacro (rd rs cbit) (neg rs))
-+ (.pmacro (rd rs cbit) (set-sub-flags 0 rs 1)))
-+
-+(dnti alu-cmp "compare"
-+ ()
-+ "cmp $rd,$rs"
-+ (+ (f-op6 #x10) (f-alu-op 10) rs rd)
-+ (set-sub-flags rd rs 1)
-+)
-+(dnti alu-cmn "compare negative"
-+ ()
-+ "cmn $rd,$rs"
-+ (+ (f-op6 #x10) (f-alu-op 11) rs rd)
-+ (set-add-flags rd rs 0)
-+)
-+
-+(alu-logical-op orr "or" 12 or)
-+
-+; use alu-logical-op 'cus it sets the condition codes the way we want
-+(alu-logical-op mul "multiply" 13 mul)
-+
-+(alu-logical-op bic "bit clear" 14 (.pmacro (rd rs) (and rd (inv rs))))
-+
-+(alu-logical-op mvn "invert" 15 (.pmacro (rd rs) (inv rs)))
-+
-+; Hi register operations.
-+;
-+; R15 and PC are treated as two distinct registers. It is assumed that the
-+; execution environment ensures R15 = PC+4. All reads are taken from R15.
-+; All writes are written to PC.
-+
-+(define-hardware
-+ (name h-hiregs)
-+ (comment "High registers (R8-R15)")
-+ (attrs (ISA thumb) VIRTUAL)
-+ (type register WI (8))
-+ (indices keyword ""
-+ ((r8 0) (r9 1) (r10 2) (r11 3) (r12 4) (r13 5) (r14 6) (r15 7)))
-+ ; ??? Accesses won't be as efficient as possible as +8 calculation will
-+ ; get done at exec time (could be defered to extract phase), but that's an
-+ ; optimization that can be generally useful in the extract phase.
-+ (get (regno) (reg h-gr (add regno (const 8))))
-+ (set (regno newval) (set (reg h-gr (add regno (const 8))) newval))
-+)
-+
-+
-+(dntf f-hireg-op "Hi register opcode" () 9 2)
-+
-+(dntop hs "high source register" () h-hiregs f-rs)
-+(dntop hd "high destination register" () h-hiregs f-rd)
-+
-+(define-pmacro (hireg-op mnemonic
-+ lo-op-hi-comment
-+ hi-op-lo-comment
-+ hi1-op-hi2-comment
-+ opcode
-+ lo-dest-sem-fn
-+ hi-dest-sem-fn)
-+ (begin
-+ (dnti (.sym mnemonic -rd-hs)
-+ lo-op-hi-comment
-+ ()
-+ (.str mnemonic " $rd,$hs")
-+ (+ (f-op6 #x11) (f-hireg-op opcode) (f-h1 0) (f-h2 1) hs rd)
-+ (lo-dest-sem-fn rd hs)
-+ )
-+ (dnti (.sym mnemonic -hd-rs)
-+ hi-op-lo-comment
-+ ()
-+ (.str mnemonic " $hd,$rs")
-+ (+ (f-op6 #x11) (f-hireg-op opcode) (f-h1 1) (f-h2 0) hd rs)
-+ (hi-dest-sem-fn hd rs)
-+ )
-+ (dnti (.sym mnemonic -hd-hs)
-+ hi1-op-hi2-comment
-+ ()
-+ (.str mnemonic " $hd,$hs")
-+ (+ (f-op6 #x11) (f-hireg-op opcode) (f-h1 1) (f-h2 1) hd hs)
-+ (hi-dest-sem-fn hd hs)
-+ )
-+ )
-+)
-+
-+(hireg-op add "lo = lo + hi" "hi = hi + lo" "hi = hi + hi2" 0
-+ (.pmacro (src1-dest src2) (set src1-dest (add src1-dest src2)))
-+ (.pmacro (src1-dest src2)
-+ (if (eq (regno src1-dest) 7)
-+ (set pc (add src1-dest src2))
-+ (set src1-dest (add src1-dest src2))))
-+)
-+
-+(hireg-op cmp "compare lo,hi" "compare hi,lo" "compare hi1,hi2" 1
-+ (.pmacro (src1 src2) (set-sub-flags src1 src2 1))
-+ (.pmacro (src1 src2) (set-sub-flags src1 src2 1))
-+)
-+
-+(hireg-op mov "lo = hi" "hi = lo" "hi1 = hi2" 2
-+ (.pmacro (dest src) (set dest src))
-+ (.pmacro (dest src)
-+ (if (eq (regno dest) 7)
-+ (set pc src)
-+ (set dest src)))
-+)
-+
-+(dnti bx-rs "bx on lo reg"
-+ ()
-+ "bx $rs"
-+ (+ (f-op6 #x11) (f-hireg-op 3) (f-h1 0) (f-h2 0) (f-rd 0) rs)
-+ (sequence ()
-+ (set pc rs)
-+ (if (not (and rs 1))
-+ (set (reg h-tbit) 0)))
-+)
-+(dnti bx-hs "bx on hi reg"
-+ ()
-+ "bx $hs"
-+ (+ (f-op6 #x11) (f-hireg-op 3) (f-h1 0) (f-h2 1) (f-rd 0) hs)
-+ (sequence ()
-+ (set pc hs)
-+ (if (not (and hs 1))
-+ (set (reg h-tbit) 0)))
-+)
-+
-+; PC relative load.
-+
-+(df f-word8 "10 bit unsigned offset, right shifted by 2"
-+ ((ISA thumb))
-+ 7 8 UINT
-+ ((value pc) (srl WI value (const 2)))
-+ ((value pc) (sll WI value (const 2)))
-+)
-+
-+(dntop word8 "10 bit unsigned immediate" () h-uint f-word8)
-+
-+(dnti ldr-pc "pc relative load"
-+ ()
-+ "ldr ${bit10-rd},[pc,#$word8]"
-+ (+ (f-op5 9) bit10-rd word8)
-+ (set bit10-rd
-+ (mem WI (add (and (add pc (const 4)) (const WI -4)) word8)))
-+)
-+
-+; Load/store with register offset.
-+
-+(dnti str "store word"
-+ ()
-+ "str $rd,[$rb,$ro]"
-+ (+ (f-op4 5) (f-l 0) (f-b 0) (f-bit9 0) ro rb rd)
-+ (set (mem WI (add rb ro)) rd)
-+)
-+(dnti strb "store byte"
-+ ()
-+ "strb $rd,[$rb,$ro]"
-+ (+ (f-op4 5) (f-l 0) (f-b 1) (f-bit9 0) ro rb rd)
-+ (set (mem QI (add rb ro)) rd)
-+)
-+(dnti ldr "load word"
-+ ()
-+ "ldr $rd,[$rb,$ro]"
-+ (+ (f-op4 5) (f-l 1) (f-b 0) (f-bit9 0) ro rb rd)
-+ (set rd (mem WI (add rb ro)))
-+)
-+(dnti ldrb "load zero extended byte"
-+ ()
-+ "ldrb $rd,[$rb,$ro]"
-+ (+ (f-op4 5) (f-l 1) (f-b 1) (f-bit9 0) ro rb rd)
-+ (set rd (zext SI (mem QI (add rb ro))))
-+)
-+
-+; Load/store sign-extended byte/halfword.
-+
-+(dntf f-s "signed/unsigned indicator" () 10 1)
-+
-+(dnti strh "store halfword"
-+ ()
-+ "strh $rd,[$rb,$ro]"
-+ (+ (f-op4 5) (f-h 0) (f-s 0) (f-bit9 1) ro rb rd)
-+ (set (mem HI (add rb ro)) rd)
-+)
-+(dnti ldrh "load zero extended halfword"
-+ ()
-+ "ldrh $rd,[$rb,$ro]"
-+ (+ (f-op4 5) (f-h 1) (f-s 0) (f-bit9 1) ro rb rd)
-+ (set rd (zext SI (mem HI (add rb ro))))
-+)
-+(dnti ldsb "load sign extended byte"
-+ ()
-+ "ldsb $rd,[$rb,$ro]"
-+ (+ (f-op4 5) (f-h 0) (f-s 1) (f-bit9 1) ro rb rd)
-+ (set rd (ext SI (mem QI (add rb ro))))
-+)
-+(dnti ldsh "load sign extended halfword"
-+ ()
-+ "ldsh $rd,[$rb,$ro]"
-+ (+ (f-op4 5) (f-h 1) (f-s 1) (f-bit9 1) ro rb rd)
-+ (set rd (ext SI (mem HI (add rb ro))))
-+)
-+
-+; Load/store with immediate offset.
-+
-+(dntf f-b-imm "byte/word indicator in load/store with immediate offset insns" () 12 1)
-+
-+(df f-offset5-7 "offset5 field as 7 bit unsigned immediate"
-+ ((ISA thumb))
-+ 10 5 UINT
-+ ((value pc) (srl WI value (const 2)))
-+ ((value pc) (sll WI value (const 2)))
-+)
-+
-+(dntop offset5-7 "offset5 as 7 bit unsigned immediate" () h-uint f-offset5-7)
-+
-+(dnti str-imm "store word with immediate offset"
-+ ()
-+ "str $rd,[$rb,#${offset5-7}]"
-+ (+ (f-op3 3) (f-b-imm 0) (f-l 0) offset5-7 rb rd)
-+ (set (mem WI (add rb offset5-7)) rd)
-+)
-+(dnti ldr-imm "load word with immediate offset"
-+ ()
-+ "ldr $rd,[$rb,#${offset5-7}]"
-+ (+ (f-op3 3) (f-b-imm 0) (f-l 1) offset5-7 rb rd)
-+ (set rd (mem WI (add rb offset5-7)))
-+)
-+(dnti strb-imm "store byte with immediate offset"
-+ ()
-+ "strb $rd,[$rb,#$offset5]"
-+ (+ (f-op3 3) (f-b-imm 1) (f-l 0) offset5 rb rd)
-+ (set (mem QI (add rb offset5)) rd)
-+)
-+(dnti ldrb-imm "load zero extended byte with immediate offset"
-+ ()
-+ "ldrb $rd,[$rb,#$offset5]"
-+ (+ (f-op3 3) (f-b-imm 1) (f-l 1) offset5 rb rd)
-+ (set rd (zext SI (mem QI (add rb offset5))))
-+)
-+
-+; Load/store halfword with immediate offset.
-+
-+(df f-offset5-6 "offset5 field as 6 bit unsigned immediate"
-+ ((ISA thumb))
-+ 10 5 UINT
-+ ((value pc) (srl WI value (const 1)))
-+ ((value pc) (sll WI value (const 1)))
-+)
-+
-+(dntop offset5-6 "offset5 as 7 bit unsigned immediate" () h-uint f-offset5-6)
-+
-+(dnti strh-imm "store halfword with immediate offset"
-+ ()
-+ "strh $rd,[$rb,#${offset5-6}]"
-+ (+ (f-op4 8) (f-l 0) offset5-6 rb rd)
-+ (set (mem HI (add rb offset5-6)) rd)
-+)
-+(dnti ldrh-imm "load zero extended halfword with immediate offset"
-+ ()
-+ "ldrh $rd,[$rb,#${offset5-6}]"
-+ (+ (f-op4 8) (f-l 1) offset5-6 rb rd)
-+ (set rd (zext WI (mem HI (add rb offset5-6))))
-+)
-+
-+; SP-relative load/store
-+
-+(dnti str-sprel "store word, sp-relative"
-+ ()
-+ "str ${bit10-rd},[sp,#$word8]"
-+ (+ (f-op4 9) (f-l 0) bit10-rd word8)
-+ (set (mem WI (add sp word8)) bit10-rd)
-+)
-+(dnti ldr-sprel "load word, sp-relative"
-+ ()
-+ "ldr ${bit10-rd},[sp,#$word8]"
-+ (+ (f-op4 9) (f-l 1) bit10-rd word8)
-+ (set bit10-rd (mem WI (add sp word8)))
-+)
-+
-+; Load address
-+
-+(dntf f-sp "sp/pc indicator" () 11 1)
-+
-+(dnti lda-pc "load address from pc"
-+ ()
-+ "add ${bit10-rd},pc,$word8"
-+ (+ (f-op4 10) (f-sp 0) bit10-rd word8)
-+ (set bit10-rd (add (and (add pc (const 4)) (const WI -4)) word8))
-+)
-+(dnti lda-sp "load address from sp"
-+ ()
-+ "add ${bit10-rd},sp,$word8"
-+ (+ (f-op4 10) (f-sp 1) bit10-rd word8)
-+ (set bit10-rd (add sp word8))
-+)
-+
-+; Add offset to stack pointer.
-+; FIXME: Handling of sign+magnitude needs revisiting.
-+; If expressions are allowed here we can't assume "-" follows "#".
-+
-+(dntf f-addoff-s "s bit in add offset to sp insns" () 7 1)
-+
-+(df f-sword7 "7 bit magnitude, accompanies sign bit"
-+ ((ISA thumb))
-+ 6 7 UINT
-+ ((value pc) (srl WI value (const 2)))
-+ ((value pc) (sll WI value (const 2)))
-+)
-+
-+(dntop sword7 "7 bit magnitude, accompanies sign bit" () h-uint f-sword7)
-+
-+(dnti add-sp "add offset to sp"
-+ ()
-+ "add sp,#$sword7"
-+ (+ (f-op8 #xb0) (f-addoff-s 0) sword7)
-+ (set sp (add sp sword7))
-+)
-+(dnti sub-sp "subtract offset from sp"
-+ ()
-+ "add sp,#-$sword7"
-+ (+ (f-op8 #xb0) (f-addoff-s 1) sword7)
-+ (set sp (sub sp sword7))
-+)
-+
-+; Push/pop registers.
-+
-+; FIXME: Might be better to use sequence temp as address reg.
-+
-+(define-pmacro (push-reg regno)
-+ (if (and rlist (sll 1 regno))
-+ (sequence ()
-+ (set sp (sub sp 4))
-+ (set (mem WI sp) (reg WI h-gr-t regno))
-+ ))
-+)
-+(define-pmacro (pop-reg regno)
-+ (if (and rlist (sll 1 regno))
-+ (sequence ()
-+ (set (reg WI h-gr-t regno) (mem WI sp))
-+ (set sp (add sp 4))
-+ ))
-+)
-+
-+(dntf f-pushpop-op "opcode bits 10,9 in push/pop insns" () 10 2)
-+
-+(dntf f-r "register indicator in push/pop insns" () 8 1)
-+
-+(dntf f-rlist "register list" () 7 8)
-+
-+; ??? Print/parse handler specs missing. Later.
-+(dntop rlist "register list" () h-uint f-rlist)
-+(dntop rlist-lr "register list with lr" () h-uint f-rlist)
-+(dntop rlist-pc "register list with pc" () h-uint f-rlist)
-+
-+(dnti push "push registers"
-+ ()
-+ "push {$rlist}"
-+ (+ (f-op4 11) (f-l 0) (f-pushpop-op 2) (f-r 0) rlist)
-+ (.splice sequence () (.unsplice (.map push-reg (.iota 8 7 -1))))
-+)
-+(dnti push-lr "push registers and lr"
-+ ()
-+ "push {${rlist-lr}}"
-+ (+ (f-op4 11) (f-l 0) (f-pushpop-op 2) (f-r 1) rlist)
-+ (.splice sequence ()
-+ (set sp (sub sp 4))
-+ (set (mem WI sp) lr)
-+ (.unsplice (.map push-reg (.iota 8 7 -1)))
-+ )
-+)
-+
-+(dnti pop "pop registers"
-+ ()
-+ "pop {$rlist}"
-+ (+ (f-op4 11) (f-l 1) (f-pushpop-op 2) (f-r 0) rlist)
-+ (.splice sequence () (.unsplice (.map pop-reg (.iota 8))))
-+)
-+(dnti pop-pc "pop registers and pc"
-+ ()
-+ "pop {${rlist-pc}}"
-+ (+ (f-op4 11) (f-l 1) (f-pushpop-op 2) (f-r 1) rlist)
-+ (.splice sequence ()
-+ (.unsplice (.map pop-reg (.iota 8)))
-+ (set pc (mem WI sp))
-+ (set sp (add sp 4))
-+ )
-+)
-+
-+; Multiple load/store.
-+
-+; FIXME: Might be better to use sequence temp as address reg.
-+
-+(dntf f-bit10-rb "Rb at bit 10" () 10 3)
-+
-+(dntop bit10-rb "base reg at bit 10" () h-gr-t f-bit10-rb)
-+
-+(define-pmacro (save-reg-inc regno)
-+ (if (and rlist (sll 1 regno))
-+ (sequence ()
-+ (set (mem WI bit10-rb) (reg WI h-gr-t regno))
-+ (set bit10-rb (add bit10-rb 4))
-+ ))
-+)
-+(define-pmacro (load-reg-inc regno)
-+ (if (and rlist (sll 1 regno))
-+ (sequence ()
-+ (set (reg WI h-gr-t regno) (mem WI bit10-rb))
-+ (set bit10-rb (add bit10-rb 4))
-+ ))
-+)
-+
-+(dnti stmia "store multiple"
-+ ()
-+ "stmia $rb!,{$rlist}"
-+ (+ (f-op4 12) (f-l 0) bit10-rb rlist)
-+ (.splice sequence () (.unsplice (.map save-reg-inc (.iota 8))))
-+)
-+(dnti ldmia "load multiple"
-+ ()
-+ "ldmia $rb!,{$rlist}"
-+ (+ (f-op4 12) (f-l 1) bit10-rb rlist)
-+ (.splice sequence () (.unsplice (.map load-reg-inc (.iota 8))))
-+)
-+
-+; Conditional branches.
-+
-+(dntf f-cond "condition code spec" () 11 4)
-+
-+; The standard condition code tests.
-+
-+(define-normal-insn-enum cc-tests
-+ "condition code tests"
-+ ((ISA thumb)) "" f-cond
-+ (
-+ (CC_EQ 0) ; equal
-+ (CC_NE 1) ; not equal
-+ (CC_CS 2) ; carry set (unsigned greater or equal)
-+ (CC_CC 3) ; carry clear (unsigned less than)
-+ (CC_MI 4) ; minus (negative)
-+ (CC_PL 5) ; positive or zero
-+ (CC_VS 6) ; overflow set
-+ (CC_VC 7) ; overflow clear
-+ (CC_HI 8) ; higher (unsigned greater)
-+ (CC_LS 9) ; less or same (unsigned less or equal)
-+ (CC_GE 10) ; greater or equal
-+ (CC_LT 11) ; less
-+ (CC_GT 12) ; greater
-+ (CC_LE 13) ; less or equal
-+ )
-+)
-+
-+(df f-soffset8 "8 bit pc relative branch address"
-+ (PCREL-ADDR (ISA thumb))
-+ 7 8 INT
-+ ((value pc) (sra WI (sub WI value (add WI pc (const 4))) (const 1)))
-+ ((value pc) (add WI (sll WI value (const 1)) (add WI pc (const 4))))
-+)
-+
-+(dntop soffset8 "8 bit pc relative branch address" () h-iaddr f-soffset8)
-+
-+(define-pmacro (cbranch bname comment cond test)
-+ (dnti bname (.str "branch if " comment)
-+ ()
-+ (.str bname " $soffset8")
-+ (+ (f-op4 13) cond soffset8)
-+ (if (test)
-+ (set pc soffset8))
-+ )
-+)
-+(cbranch beq "eq" CC_EQ test-eq)
-+(cbranch bne "ne" CC_NE test-ne)
-+(cbranch bcs "cs (ltu)" CC_CS test-cs)
-+(cbranch bcc "cc (geu)" CC_CC test-cc)
-+(cbranch bmi "mi (negative)" CC_MI test-mi)
-+(cbranch bpl "pl (positive or zero)" CC_PL test-pl)
-+(cbranch bvs "vs (overflow set)" CC_VS test-vs)
-+(cbranch bvc "vc (overflow clear)" CC_VC test-vc)
-+(cbranch bhi "hi (gtu)" CC_HI test-hi)
-+(cbranch bls "ls (leu)" CC_LS test-ls)
-+(cbranch bge "ge" CC_GE test-ge)
-+(cbranch blt "lt" CC_LT test-lt)
-+(cbranch bgt "gt" CC_GT test-gt)
-+(cbranch ble "le" CC_LE test-le)
-+
-+; Software interrupt.
-+
-+(dntf f-value8 "8 bit value for swi" () 7 8)
-+
-+(dntop value8 "8 bit value for swi" () h-uint f-value8)
-+
-+(dnti swi "software interrupt"
-+ ()
-+ "swi $value8"
-+ (+ (f-op8 #xdf) value8)
-+ ; FIXME: for now
-+ (set pc (c-call WI "thumb_swi" pc value8))
-+)
-+
-+; Unconditional branch.
-+
-+(df f-offset11 "11 bit pc relative branch address"
-+ (PCREL-ADDR (ISA thumb))
-+ 10 11 INT
-+ ((value pc) (sra WI (sub value (add pc (const 4))) (const 1)))
-+ ((value pc) (add WI (sll value (const 1)) (add pc (const 4))))
-+)
-+
-+(dntop offset11 "11 bit pc relative branch address" () h-iaddr f-offset11)
-+
-+(dnti b "unconditional branch"
-+ ()
-+ "b $offset11"
-+ (+ (f-op5 #x1c) offset11)
-+ (set pc offset11)
-+)
-+
-+; Long branch with link.
-+; Two instructions that make up a subroutine call.
-+; FIXME: Assembler access is via one insn - macro-insn?
-+; Left for later, as is all assembly considerations.
-+
-+(dntf f-lbwl-h "long branch with link `h' field" () 11 1)
-+
-+; This one is signed.
-+(define-ifield
-+ (name f-lbwl-hi)
-+ (comment "long branch with link offset, high part")
-+ (attrs (ISA thumb))
-+ (mode INT)
-+ (start 10)
-+ (length 11)
-+)
-+(dntop lbwl-hi "long branch with link offset, high part" ()
-+ h-sint f-lbwl-hi)
-+
-+; This one is unsigned.
-+(dntf f-lbwl-lo "long branch with link offset, low part" () 10 11)
-+(dntop lbwl-lo "long branch with link offset, low part" ()
-+ h-uint f-lbwl-lo)
-+
-+(dnti bl-hi "branch link, high offset"
-+ ()
-+ "bl-hi ${lbwl-hi}"
-+ (+ (f-op4 15) (f-lbwl-h 0) lbwl-hi)
-+ (set lr (add (add pc 4) (sll lbwl-hi 12)))
-+)
-+
-+(dnti bl-lo "branch link, low offset"
-+ ()
-+ "bl-lo ${lbwl-lo}"
-+ (+ (f-op4 15) (f-lbwl-h 1) lbwl-lo)
-+ (sequence ((WI cur-pc))
-+ (set cur-pc pc)
-+ (set pc (add lr (sll lbwl-lo 1)))
-+ (set lr (or (add cur-pc 2) 1)))
-+)
-diff -Nur binutils-2.24.orig/cgen/cpu/xc16x.cpu binutils-2.24/cgen/cpu/xc16x.cpu
---- binutils-2.24.orig/cgen/cpu/xc16x.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/xc16x.cpu 2016-06-30 21:26:12.645892801 +0200
-@@ -0,0 +1,3129 @@
-+; Infineon XC16X CPU description. -*- Scheme -*-
-+;
-+; Copyright 2006 Free Software Foundation, Inc.
-+;
-+; Contributed by KPIT Cummins Infosystems Ltd.; developed under contract
-+; from Infineon Systems, GMBH , Germany.
-+;
-+; This file is part of the GNU Binutils.
-+;
-+; This program is free software; you can redistribute it and/or modify
-+; it under the terms of the GNU General Public License as published by
-+; the Free Software Foundation; either version 2 of the License, or
-+; (at your option) any later version.
-+;
-+; This program is distributed in the hope that it will be useful,
-+; but WITHOUT ANY WARRANTY; without even the implied warranty of
-+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+; GNU General Public License for more details.
-+;
-+; You should have received a copy of the GNU General Public License
-+; along with this program; if not, write to the Free Software
-+; Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
-+; 02110-1301, USA.
-+
-+(include "simplify.inc")
-+
-+; define-arch appears first
-+
-+(define-arch
-+ (name xc16x) ; name of cpu family
-+ (comment "Infineon XC16X")
-+ (default-alignment aligned)
-+ (insn-lsb0? #t)
-+ (machs xc16x)
-+ (isas xc16x)
-+)
-+
-+; Attributes.
-+; An attribute to describe which pipeline an insn runs in generally OS.
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name PIPE)
-+ (comment "parallel execution pipeline selection")
-+ (values NONE OS)
-+)
-+
-+; Instruction set parameters.
-+
-+(define-isa
-+ (name xc16x)
-+ (default-insn-bitsize 32)
-+ (base-insn-bitsize 32)
-+ (default-insn-word-bitsize 16)
-+ (decode-assist (15 14 13 12))
-+ ; The XC16X fetches 1 insn at a time.
-+ (liw-insns 1)
-+ (parallel-insns 1)
-+)
-+
-+; Cpu family definitions.
-+
-+(define-cpu
-+ ; cpu names must be distinct from the architecture name and machine names.
-+ ; The "b" suffix stands for "base" and is the convention.
-+ ; The "f" suffix stands for "family" and is the convention.
-+ (name xc16xbf)
-+ (comment "Infineon XC16X base family")
-+ (endian little)
-+ (insn-chunk-bitsize 32)
-+ (word-bitsize 16)
-+ (parallel-insns 1)
-+)
-+
-+(define-mach
-+ (name xc16x)
-+ (comment "Infineon XC16X cpu")
-+ (cpu xc16xbf)
-+)
-+
-+; Model descriptions.
-+
-+(define-model
-+ (name xc16x) (comment "XC16X") (attrs)
-+ (mach xc16x)
-+
-+ (pipeline p-mem "" () ((prefetch) (fetch) (decode) (address) (memory) (execute) (writeback)))
-+
-+ ; `state' is a list of variables for recording model state
-+ (state
-+ ; bit mask of h-gr registers, =1 means value being loaded from memory
-+ (h-gr UINT)
-+ )
-+
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((dr INT -1) (sr INT -1)) ; inputs
-+ ((dr INT -1)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-cmp "Compare Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((src1 INT -1) (src2 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-cti "Jump & Call Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((condbit) (sr INT -1)) ; inputs
-+ ((pc)) ; outputs
-+ () ; profile action (default)
-+ )
-+ (unit u-mov "Data Movement Unit" ()
-+ 1 1 ; issue done
-+ () ;state
-+ ((dr INT -1) (sr INT -1)) ; inputs
-+ ((dr INT -1)) ; output
-+ () ; profile action (default)
-+ )
-+ )
-+
-+; Instruction fields.
-+;
-+; Attributes:
-+; PCREL-ADDR: pc relative value (for reloc and disassembly purposes)
-+; ABS-ADDR: absolute address (for reloc and disassembly purposes)
-+; RELOC: there is a relocation associated with this field (experiment)
-+
-+(define-attr
-+ (for ifield operand)
-+ (type boolean)
-+ (name RELOC)
-+ (comment "there is a reloc associated with this field (experiment)")
-+)
-+
-+(dnf f-op1 "op1" () 7 4)
-+(dnf f-op2 "op2" () 3 4)
-+(dnf f-condcode "condcode" () 7 4) ;condition code required in other jmps and calls
-+(dnf f-icondcode "indrct condcode" () 15 4) ;condition code required in other jmpi and calli
-+(dnf f-rcond "relative-cond" () 7 4) ;condition code required in JMPR
-+(dnf f-qcond "qbit" () 7 4) ;used in enum of bset/bclear macro
-+(dnf f-extccode "extended condcode" () 15 5) ;condition code required in other jmpa and calla
-+(dnf f-r0 "r0" () 9 2) ;required where 2 bit register used(only R0-R3)
-+(dnf f-r1 "r1" () 15 4)
-+(dnf f-r2 "r2" () 11 4)
-+(dnf f-r3 "r3" () 12 4)
-+(dnf f-r4 "r4" () 11 4)
-+(dnf f-uimm2 "uimm2" () 13 2) ;used for immediate data,eg in ADD,MOV insns
-+(dnf f-uimm3 "uimm3" () 10 3) ;used for immediate data,eg in ADD,SUB insns
-+(dnf f-uimm4 "uimm4" () 15 4) ;used for immediate data,eg in MOV insns
-+(dnf f-uimm7 "uimm7" (PCREL-ADDR RELOC) 15 7) ;used in TRAP
-+(dnf f-uimm8 "uimm8" () 23 8) ;used in immediate byte data,eg in ADDB,MOVB insns
-+(dnf f-uimm16 "uimm16" () 31 16) ;used for immediate word data
-+(dnf f-memory "memory" () 31 16) ; used for memory operands
-+(dnf f-memgr8 "memory" () 31 16) ; memory location of gr
-+(dnf f-rel8 "rel8" (PCREL-ADDR RELOC) 15 8) ;used in JMPR,CALLR
-+(dnf f-relhi8 "relhi8" (PCREL-ADDR RELOC) 23 8) ;used in JB,JBC,JNB,JNBS
-+(dnf f-reg8 "reg8" () 15 8) ;required where 8bit gp register used
-+(dnf f-regmem8 "regmem8" () 15 8) ;required where 8bit register used
-+(dnf f-regoff8 "regoff8" () 15 8) ;required for offset calc
-+(dnf f-reghi8 "reghi8" () 23 8) ;required where 8bit register number used
-+(dnf f-regb8 "regb8" () 15 8) ;required for byte registers RL0,RH0, till RL8,RH8
-+(dnf f-seg8 "seg8" () 15 8) ;used as segment number in JMPS,CALLS
-+(dnf f-segnum8 "segnum8" () 23 8) ;used in EXTS,EXTSR
-+(dnf f-mask8 "mask8" () 23 8) ;used as mask in BFLDH,BFLDL insns
-+(dnf f-pagenum "page num" () 25 10);used in EXTP,EXTPR
-+(dnf f-datahi8 "datahi8" () 31 8) ;used for filling with const data
-+(dnf f-data8 "data8" () 23 8) ;used for filling with const data
-+(dnf f-offset16 "address offset16" (ABS-ADDR RELOC) 31 16) ;used in JMPS,JMPA,CALLA,CALLS
-+(dnf f-op-bit1 "gap of 1 bit" () 11 1) ;used for filling with const data
-+(dnf f-op-bit2 "gap of 2 bits" () 11 2) ;used for filling with const data
-+(dnf f-op-bit4 "gap of 4 bits" () 11 4) ;used for filling with const data
-+(dnf f-op-bit3 "gap of 3 bits" () 10 3) ;used in CALLA, JMPA
-+(dnf f-op-2bit "gap of 2 bits" () 10 2) ;used in CALLA
-+(dnf f-op-bitone "gap of 1 bit " () 10 1) ;used in JMPA
-+(dnf f-op-onebit "gap of 1 bit " () 9 1) ;used in JMPA
-+(dnf f-op-1bit "gap of 1 bit " () 8 1) ;used in JMPA, CALLA
-+(dnf f-op-lbit4 "gap of 4 bits" () 15 4) ;used for filling with const data
-+(dnf f-op-lbit2 "gap of 2 bits" () 15 2) ;used for filling with const data
-+(dnf f-op-bit8 "gap of 8 bits" () 31 8) ;used for filling with const data
-+(dnf f-op-bit16 "gap of 16 bits" () 31 16) ;used for filling with const data
-+(dnf f-qbit "qbit" () 7 4) ;used in bit field of bset/bclear
-+(dnf f-qlobit "qlobit" () 31 4) ;used for filling with const data
-+(dnf f-qhibit "qhibit" () 27 4) ;used for filling with const data
-+(dnf f-qlobit2 "qlobit2" () 27 2) ;used for filling with const data
-+(dnf f-pof "upof16" () 31 16) ; used for memory operands
-+
-+; Enums.
-+; insn-op1: bits 0-3
-+(define-normal-insn-enum insn-op1 "insn format enums" () OP1_ f-op1
-+ ("0" "1" "2" "3" "4" "5" "6" "7"
-+ "8" "9" "10" "11" "12" "13" "14" "15")
-+)
-+
-+; insn-op2: bits 4-7
-+(define-normal-insn-enum insn-op2 "op2 enums" () OP2_ f-op2
-+ ("0" "1" "2" "3" "4" "5" "6" "7"
-+ "8" "9" "10" "11" "12" "13" "14" "15")
-+)
-+
-+;/*for bclr/bset*/
-+; insn-rcond: bits 0-3
-+(define-normal-insn-enum insn-qcond "bit set/clear enums" () QBIT_ f-qcond
-+ (("0" 0) ("1" 1) ("2" 2) ("3" 3) ("4" 4) ("5" 5) ("6" 6) ("7" 7) ("8" 8) ("9" 9) ("10" 10)
-+ ("11" 11) ("12" 12) ("13" 13) ("14" 14) ("15" 15))
-+)
-+;/************/
-+; insn-rcond: bits 0-3
-+(define-normal-insn-enum insn-rcond "relative jump condition code op2 enums" () COND_ f-rcond
-+ (("UC" 0) ("NET" 1) ("Z" 2) ("NE_NZ" 3) ("V" 4) ("NV" 5) ("N" 6) ("NN" 7)
-+ ("C" 8) ("NC" 9) ("SGT" 10) ("SLE" 11) ("SLT" 12) ("SGE" 13) ("UGT" 14) ("ULE" 15)
-+ ("EQ" 2) ("NE" 3) ("ULT" 8) ("UGE" 9))
-+)
-+
-+
-+
-+; Hardware pieces.
-+; These entries list the elements of the raw hardware.
-+; They're also used to provide tables and other elements of the assembly
-+; language.
-+
-+(dnh h-pc "program counter" (PC) (pc) () () ())
-+
-+(define-keyword
-+ (name gr-names)
-+ (print-name h-gr)
-+ (prefix "")
-+ (values (r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)
-+ (r8 8) (r9 9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14) (r15 15))
-+
-+)
-+(define-hardware
-+ (name h-gr)
-+ (comment "general registers")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register HI (16))
-+ (indices extern-keyword gr-names)
-+)
-+
-+(define-keyword
-+ (name ext-names)
-+ (print-name h-ext)
-+ (prefix "")
-+ (values (0x1 0) (0x2 1) (0x3 2) (0x4 3)
-+ ("1" 0) ("2" 1) ("3" 2) ("4" 3))
-+
-+)
-+
-+(define-hardware
-+ (name h-ext)
-+ (comment "ext values")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register HI (8))
-+ (indices extern-keyword ext-names)
-+)
-+
-+(define-keyword
-+ (name psw-names)
-+ (print-name h-psw)
-+ (prefix "")
-+ (values ("IEN" 136) ("r0.11" 240) ("r1.11" 241) ("r2.11" 242) ("r3.11" 243) ("r4.11" 244)
-+ ("r5.11" 245) ("r6.11" 246) ("r7.11" 247) ("r8.11" 248)
-+ ("r9.11" 249) ("r10.11" 250) ("r11.11" 251) ("r12.11" 252)
-+ ("r13.11" 253) ("r14.11" 254) ("r15.11" 255))
-+)
-+
-+(define-hardware
-+ (name h-psw)
-+ (comment "ext values")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register HI (1))
-+ (indices extern-keyword psw-names)
-+)
-+
-+(define-keyword
-+ (name grb-names)
-+ (print-name h-grb)
-+ (prefix "")
-+ (values (rl0 0) (rh0 1) (rl1 2) (rh1 3) (rl2 4) (rh2 5) (rl3 6) (rh3 7)
-+ (rl4 8) (rh4 9) (rl5 10) (rh5 11) (rl6 12) (rh6 13) (rl7 14) (rh7 15))
-+)
-+
-+(define-hardware
-+ (name h-grb)
-+ (comment "general registers")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register QI (16))
-+ (indices extern-keyword grb-names)
-+)
-+
-+(define-keyword
-+ (name conditioncode-names)
-+ (print-name h-cc)
-+ (prefix "")
-+ (values (cc_UC 0) (cc_NET 1) (cc_Z 2) (cc_EQ 2) (cc_NZ 3) (cc_NE 3) (cc_V 4) (cc_NV 5) (cc_N 6) (cc_NN 7) (cc_ULT 8) (cc_UGE 9)
-+ (cc_C 8) (cc_NC 9) (cc_SGT 10) (cc_SLE 11) (cc_SLT 12) (cc_SGE 13) (cc_UGT 14)
-+ (cc_ULE 15))
-+)
-+(define-hardware
-+ (name h-cc)
-+ (comment "condition codes")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register QI (16))
-+ (indices extern-keyword conditioncode-names)
-+)
-+
-+(define-keyword
-+ (name extconditioncode-names)
-+ (print-name h-ecc)
-+ (prefix "")
-+ (values(cc_UC 0) (cc_NET 2) (cc_Z 4) (cc_EQ 4) (cc_NZ 6) (cc_NE 6) (cc_V 8) (cc_NV 10) (cc_N 12) (cc_NN 14) (cc_ULT 16) (cc_UGE 18) (cc_C 16) (cc_NC 18) (cc_SGT 20)
-+ (cc_SLE 22) (cc_SLT 24) (cc_SGE 26) (cc_UGT 28) (cc_ULE 30) (cc_nusr0 1)
-+ (cc_nusr1 3) (cc_usr0 5) (cc_usr1 7))
-+)
-+(define-hardware
-+ (name h-ecc)
-+ (comment "extended condition codes")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register QI (4))
-+ (indices extern-keyword extconditioncode-names)
-+)
-+
-+(define-keyword
-+ (name grb8-names)
-+ (print-name h-grb8)
-+ (prefix "")
-+ (values (dpp0 0) (dpp1 1) (dpp2 2) (dpp3 3)
-+ (psw 136) (cp 8) (mdl 7) (mdh 6)
-+ (mdc 135) (sp 9) (csp 4) (vecseg 137)
-+ (stkov 10) (stkun 11) (cpucon1 12) (cpucon2 13)
-+ (zeros 142) (ones 143) (spseg 134) (tfr 214)
-+ (rl0 240) (rh0 241) (rl1 242) (rh1 243) (rl2 244) (rh2 245) (rl3 246) (rh3 247)
-+ (rl4 248) (rh4 249) (rl5 250) (rh5 251) (rl6 252) (rh6 253) (rl7 254) (rh7 255))
-+)
-+
-+(define-hardware
-+ (name h-grb8)
-+ (comment "general byte registers")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register QI (36))
-+ (indices extern-keyword grb8-names)
-+)
-+
-+(define-keyword
-+ (name r8-names)
-+ (print-name h-r8)
-+ (prefix "")
-+ (values (dpp0 0) (dpp1 1) (dpp2 2) (dpp3 3)
-+ (psw 136) (cp 8) (mdl 7) (mdh 6)
-+ (mdc 135) (sp 9) (csp 4) (vecseg 137)
-+ (stkov 10) (stkun 11) (cpucon1 12) (cpucon2 13)
-+ (zeros 142) (ones 143) (spseg 134) (tfr 214)
-+ (r0 240) (r1 241) (r2 242) (r3 243) (r4 244) (r5 245) (r6 246) (r7 247)
-+ (r8 248) (r9 249) (r10 250) (r11 251) (r12 252) (r13 253) (r14 254) (r15 255))
-+)
-+
-+(define-hardware
-+ (name h-r8)
-+ (comment "registers")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register HI (36))
-+ (indices extern-keyword r8-names)
-+)
-+
-+(define-keyword
-+ (name regmem8-names)
-+ (print-name h-regmem8)
-+ (prefix "")
-+ (values (dpp0 0) (dpp1 1) (dpp2 2) (dpp3 3)
-+ (psw 136) (cp 8) (mdl 7) (mdh 6)
-+ (mdc 135) (sp 9) (csp 4) (vecseg 137)
-+ (stkov 10) (stkun 11) (cpucon1 12) (cpucon2 13)
-+ (zeros 142) (ones 143) (spseg 134) (tfr 214)
-+ (r0 240) (r1 241) (r2 242) (r3 243) (r4 244) (r5 245) (r6 246) (r7 247)
-+ (r8 248) (r9 249) (r10 250) (r11 251) (r12 252) (r13 253) (r14 254) (r15 255))
-+)
-+
-+(define-hardware
-+ (name h-regmem8)
-+ (comment "registers")
-+ (attrs )
-+ (type register HI (16))
-+ (indices extern-keyword regmem8-names)
-+)
-+
-+(define-keyword
-+ (name regdiv8-names)
-+ (print-name h-regdiv8)
-+ (prefix "")
-+ (values (r0 0) (r1 17) (r2 34) (r3 51) (r4 68) (r5 85) (r6 102) (r7 119)
-+ (r8 136) (r9 153) (r10 170) (r11 187) (r12 204) (r13 221) (r14 238) (r15 255))
-+)
-+
-+(define-hardware
-+ (name h-regdiv8)
-+ (comment "division insn registers")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register HI (16))
-+ (indices extern-keyword regdiv8-names)
-+)
-+
-+(define-keyword
-+ (name reg0-name)
-+ (print-name h-reg0)
-+ (prefix "")
-+ (values (0x1 1) (0x2 2) (0x3 3) (0x4 4) (0x5 5) (0x6 6) (0x7 7) (0x8 8) (0x9 9) (0xa 10) (0xb 11)
-+ (0xc 12) (0xd 13) (0xe 14) (0xf 15)
-+ ("1" 1) ("2" 2) ("3" 3) ("4" 4) ("5" 5) ("6" 6) ("7" 7) ("8" 8) ("9" 9) ("10" 10) ("11" 11)
-+ ("12" 12) ("13" 13) ("14" 14) ("15" 15))
-+)
-+
-+(define-hardware
-+ (name h-r0)
-+ (comment "for 4-bit data excuding 0")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register HI (30))
-+ (indices extern-keyword reg0-name)
-+)
-+
-+(define-keyword
-+ (name reg0-name1)
-+ (print-name h-reg01)
-+ (prefix "")
-+ (values (0x1 1) (0x2 2) (0x3 3) (0x4 4) (0x5 5) (0x6 6) (0x7 7)
-+ ("1" 1) ("2" 2) ("3" 3) ("4" 4) ("5" 5) ("6" 6) ("7" 7))
-+)
-+
-+(define-hardware
-+ (name h-r01)
-+ (comment "for 4-bit data excuding 0")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register HI (14))
-+ (indices extern-keyword reg0-name1)
-+)
-+
-+(define-keyword
-+ (name regbmem8-names)
-+ (print-name h-regbmem8)
-+ (prefix "")
-+ (values (dpp0 0) (dpp1 1) (dpp2 2) (dpp3 3)
-+ (psw 136) (cp 8) (mdl 7) (mdh 6)
-+ (mdc 135) (sp 9) (csp 4) (vecseg 137)
-+ (stkov 10) (stkun 11) (cpucon1 12) (cpucon2 13)
-+ (zeros 142) (ones 143) (spseg 134) (tfr 214)
-+ (rl0 240) (rh0 241) (rl1 242) (rh1 243) (rl2 244) (rh2 245) (rl3 246) (rh3 247)
-+ (rl4 248) (rh4 249) (rl5 250) (rh5 251) (rl6 252) (rh6 253) (rl7 254) (rh7 255))
-+)
-+
-+(define-hardware
-+ (name h-regbmem8)
-+ (comment "registers")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register HI (36))
-+ (indices extern-keyword regbmem8-names)
-+)
-+
-+(define-keyword
-+ (name memgr8-names)
-+ (print-name h-memgr8)
-+ (prefix "")
-+ (values (dpp0 65024) (dpp1 65026) (dpp2 65028) (dpp3 65030)
-+ (psw 65296) (cp 65040) (mdl 65038) (mdh 65036)
-+ (mdc 65294) (sp 65042) (csp 65032) (vecseg 65298)
-+ (stkov 65044) (stkun 65046) (cpucon1 65048) (cpucon2 65050)
-+ (zeros 65308) (ones 65310) (spseg 65292) (tfr 65452) )
-+)
-+
-+(define-hardware
-+ (name h-memgr8)
-+ (comment "memory location of registers")
-+ (attrs )
-+ (type register HI (20))
-+ (indices extern-keyword memgr8-names)
-+)
-+
-+(dsh h-cond "condition bit" () (register BI)) ;any bit from PSW while comparison
-+; This bit is part of the PSW register
-+(dsh h-cbit "carry bit" () (register BI))
-+
-+(dsh h-sgtdis "segmentation enable bit" () (register BI)) ;0 means segmentation enabled
-+
-+;Instruction operands
-+; -- layer between the assembler and the raw hardware description
-+; -- the main means of manipulating instruction fields in the semantic code
-+
-+; XC16X specific operand attributes:
-+
-+(define-attr
-+ (for operand)
-+ (type boolean)
-+ (name HASH-PREFIX)
-+ (comment "immediates have an optional '#' prefix")
-+)
-+
-+(define-attr
-+ (for operand)
-+ (type boolean)
-+ (name DOT-PREFIX)
-+ (comment "bit addr have an optional '.' prefix")
-+)
-+
-+(define-attr
-+ (for operand)
-+ (type boolean)
-+ (name POF-PREFIX)
-+ (comment "page offset ")
-+)
-+
-+(define-attr
-+ (for operand)
-+ (type boolean)
-+ (name PAG-PREFIX)
-+ (comment "page ")
-+)
-+
-+(define-attr
-+ (for operand)
-+ (type boolean)
-+ (name SOF-PREFIX)
-+ (comment "segment offset selection")
-+)
-+
-+(define-attr
-+ (for operand)
-+ (type boolean)
-+ (name SEG-PREFIX)
-+ (comment "segment")
-+)
-+
-+(dnop sr "source register" () h-gr f-r2)
-+(dnop dr "destination register" () h-gr f-r1)
-+(dnop dri "destination register" () h-gr f-r4)
-+(dnop srb "source register" () h-grb f-r2)
-+(dnop drb "destination register" () h-grb f-r1)
-+(dnop sr2 "2 bit source register" () h-gr f-r0)
-+(dnop src1 "source register 1" () h-gr f-r1)
-+(dnop src2 "source register 2" () h-gr f-r2)
-+(dnop srdiv "source register 2" () h-regdiv8 f-reg8)
-+(dnop RegNam "PSW bits" () h-psw f-reg8)
-+(dnop uimm2 "2 bit unsigned number" (HASH-PREFIX) h-ext f-uimm2)
-+(dnop uimm3 "3 bit unsigned number" (HASH-PREFIX) h-r01 f-uimm3)
-+(dnop uimm4 "4 bit unsigned number" (HASH-PREFIX) h-uint f-uimm4)
-+(dnop uimm7 "7 bit trap number" (HASH-PREFIX) h-uint f-uimm7)
-+(dnop uimm8 "8 bit unsigned immediate" (HASH-PREFIX) h-uint f-uimm8)
-+(dnop uimm16 "16 bit unsigned immediate" (HASH-PREFIX) h-uint f-uimm16)
-+(dnop upof16 "16 bit unsigned immediate" (POF-PREFIX) h-addr f-memory)
-+(dnop reg8 "8 bit word register number" () h-r8 f-reg8)
-+(dnop regmem8 "8 bit word register number" () h-regmem8 f-regmem8)
-+(dnop regbmem8 "8 bit byte register number" () h-regbmem8 f-regmem8)
-+(dnop regoff8 "8 bit word register number" () h-r8 f-regoff8)
-+(dnop reghi8 "8 bit word register number" () h-r8 f-reghi8)
-+(dnop regb8 "8 bit byte register number" () h-grb8 f-regb8)
-+(dnop genreg "8 bit word register number" () h-r8 f-regb8)
-+(dnop seg "8 bit segment number" () h-uint f-seg8)
-+(dnop seghi8 "8 bit hi segment number" () h-uint f-segnum8)
-+(dnop caddr "16 bit address offset" () h-addr f-offset16)
-+(dnop rel "8 bit signed relative offset" () h-sint f-rel8)
-+(dnop relhi "hi 8 bit signed relative offset" () h-sint f-relhi8)
-+(dnop condbit "condition bit" (SEM-ONLY) h-cond f-nil)
-+(dnop bit1 "gap of 1 bit" () h-uint f-op-bit1)
-+(dnop bit2 "gap of 2 bits" () h-uint f-op-bit2)
-+(dnop bit4 "gap of 4 bits" () h-uint f-op-bit4)
-+(dnop lbit4 "gap of 4 bits" () h-uint f-op-lbit4)
-+(dnop lbit2 "gap of 2 bits" () h-uint f-op-lbit2)
-+(dnop bit8 "gap of 8 bits" () h-uint f-op-bit8)
-+(dnop u4 "gap of 4 bits" () h-r0 f-uimm4)
-+(dnop bitone "field of 1 bit" () h-uint f-op-onebit)
-+(dnop bit01 "field of 1 bit" () h-uint f-op-1bit)
-+(dnop cond "condition code" () h-cc f-condcode)
-+(dnop icond "indirect condition code" () h-cc f-icondcode)
-+(dnop extcond "extended condition code" () h-ecc f-extccode)
-+(dnop memory "16 bit memory" () h-addr f-memory)
-+(dnop memgr8 "16 bit memory" () h-memgr8 f-memgr8)
-+(dnop cbit "carry bit" (SEM-ONLY) h-cbit f-nil)
-+(dnop qbit "bit addr" (DOT-PREFIX) h-uint f-qbit)
-+(dnop qlobit "bit addr" (DOT-PREFIX) h-uint f-qlobit)
-+(dnop qhibit "bit addr" (DOT-PREFIX) h-uint f-qhibit)
-+(dnop mask8 "8 bit mask" (HASH-PREFIX) h-uint f-mask8)
-+(dnop masklo8 "8 bit mask" (HASH-PREFIX) h-uint f-datahi8)
-+(dnop pagenum "10 bit page number" (HASH-PREFIX) h-uint f-pagenum)
-+(dnop data8 "8 bit data" (HASH-PREFIX) h-uint f-data8)
-+(dnop datahi8 "8 bit data" (HASH-PREFIX) h-uint f-datahi8)
-+(dnop sgtdisbit "segmentation enable bit" (SEM-ONLY) h-sgtdis f-nil)
-+(dnop upag16 "16 bit unsigned immediate" (PAG-PREFIX) h-uint f-uimm16)
-+(dnop useg8 "8 bit segment " (SEG-PREFIX) h-uint f-seg8)
-+(dnop useg16 "16 bit address offset" (SEG-PREFIX) h-uint f-offset16)
-+(dnop usof16 "16 bit address offset" (SOF-PREFIX) h-uint f-offset16)
-+
-+; define hash operator
-+(define-operand (name hash) (comment "# prefix") (attrs)
-+ (type h-sint)
-+ (index f-nil)
-+ (handlers (parse "hash") (print "hash"))
-+)
-+
-+; define dot operator
-+(define-operand (name dot) (comment ". prefix") (attrs)
-+ (type h-sint)
-+ (index f-nil)
-+ (handlers (parse "dot") (print "dot"))
-+)
-+
-+; define pof operator
-+(define-operand (name pof) (comment "pof: prefix") (attrs)
-+ (type h-sint)
-+ (index f-nil)
-+ (handlers (parse "pof") (print "pof"))
-+)
-+
-+; define pag operator
-+(define-operand (name pag) (comment "pag: prefix") (attrs)
-+ (type h-sint)
-+ (index f-nil)
-+ (handlers (parse "pag") (print "pag"))
-+)
-+
-+; define sof operator
-+(define-operand (name sof) (comment "sof: prefix") (attrs)
-+ (type h-sint)
-+ (index f-nil)
-+ (handlers (parse "sof") (print "sof"))
-+)
-+
-+; define seg operator
-+(define-operand (name segm) (comment "seg: prefix") (attrs)
-+ (type h-sint)
-+ (index f-nil)
-+ (handlers (parse "seg") (print "seg"))
-+)
-+
-+; IDOC attribute for instruction documentation.
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name IDOC)
-+ (comment "insn kind for documentation")
-+ (attrs META)
-+ (values
-+ (MOVE - () "Data Movement")
-+ (ALU - () "Arithmatic & logical")
-+ (CMP - () "Compare")
-+ (JMP - () "Jump & Call")
-+ (MISC - () "Miscellaneous")
-+ (SYSC - () "System control")
-+ )
-+)
-+
-+; Include the instruction set descriptions from their respective
-+; source files.
-+
-+;Arithmatic insns
-+;******************************************************************
-+
-+;add/sub register and immediate
-+(define-pmacro (arithmetic16 name insn insn1 opc1 opc2 op1 op2 mode dir)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$"dir"$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 (insn1 mode op1 (mem HI op2)))
-+ ()
-+ )
-+)
-+(arithmetic16 addrpof add add OP1_0 OP2_2 reg8 upof16 HI "pof")
-+(arithmetic16 subrpof sub sub OP1_2 OP2_2 reg8 upof16 HI "pof")
-+(arithmetic16 addbrpof addb add OP1_0 OP2_3 regb8 upof16 QI "pof")
-+(arithmetic16 subbrpof subb sub OP1_2 OP2_3 regb8 upof16 QI "pof")
-+(arithmetic16 addrpag add add OP1_0 OP2_2 reg8 upag16 HI "pag")
-+(arithmetic16 subrpag sub sub OP1_2 OP2_2 reg8 upag16 HI "pag")
-+(arithmetic16 addbrpag addb add OP1_0 OP2_3 regb8 upag16 QI "pag")
-+(arithmetic16 subbrpag subb sub OP1_2 OP2_3 regb8 upag16 QI "pag")
-+
-+;add/sub register and immediate
-+(define-pmacro (arithmetic17 name insn insn1 opc1 opc2 op1 op2 mode dir)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$"dir"$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 (insn1 mode op1 (mem HI op2) cbit))
-+ ()
-+ )
-+)
-+(arithmetic17 addcrpof addc addc OP1_1 OP2_2 reg8 upof16 HI "pof")
-+(arithmetic17 subcrpof subc subc OP1_3 OP2_2 reg8 upof16 HI "pof")
-+(arithmetic17 addcbrpof addcb addc OP1_1 OP2_3 regb8 upof16 QI "pof")
-+(arithmetic17 subcbrpof subcb subc OP1_3 OP2_3 regb8 upof16 QI "pof")
-+(arithmetic17 addcrpag addc addc OP1_1 OP2_2 reg8 upag16 HI "pag")
-+(arithmetic17 subcrpag subc subc OP1_3 OP2_2 reg8 upag16 HI "pag")
-+(arithmetic17 addcbrpag addcb addc OP1_1 OP2_3 regb8 upag16 QI "pag")
-+(arithmetic17 subcbrpag subcb subc OP1_3 OP2_3 regb8 upag16 QI "pag")
-+
-+;add/sub register and immediate
-+(define-pmacro (arithmetic18 name insn insn1 opc1 opc2 op1 op2 mode dir)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"dir"$"op1 ",$"op2)
-+ (+ opc1 opc2 op2 op1)
-+ (set (mem HI op1) (insn1 (mem HI op1) op2 ))
-+ ()
-+ )
-+)
-+(arithmetic18 addrpofr add add OP1_0 OP2_4 upof16 reg8 HI "pof")
-+(arithmetic18 subrpofr sub sub OP1_2 OP2_4 upof16 reg8 HI "pof")
-+(arithmetic18 addbrpofr addb add OP1_0 OP2_5 upof16 regb8 QI "pof")
-+(arithmetic18 subbrpofr subb sub OP1_2 OP2_5 upof16 regb8 QI "pof")
-+
-+;add/sub register and immediate
-+(define-pmacro (arithmetic19 name insn insn1 opc1 opc2 op1 op2 mode dir)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"dir"$"op1 ",$"op2)
-+ (+ opc1 opc2 op2 op1)
-+ (set (mem HI op1) (insn1 mode (mem HI op1) op2 cbit))
-+ ()
-+ )
-+)
-+(arithmetic19 addcrpofr addc addc OP1_1 OP2_4 upof16 reg8 HI "pof")
-+(arithmetic19 subcrpofr subc subc OP1_3 OP2_4 upof16 reg8 HI "pof")
-+(arithmetic19 addcbrpofr addcb addc OP1_1 OP2_5 upof16 regb8 QI "pof")
-+(arithmetic19 subcbrpofr subcb subc OP1_3 OP2_5 upof16 regb8 QI "pof")
-+
-+;add/sub register and immediate
-+(define-pmacro (arithmetic20 name insn insn1 opc1 opc2 op1 op2 mode dir)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$hash$"dir"$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 (insn1 mode op1 op2))
-+ ()
-+ )
-+)
-+(arithmetic20 addrhpof add add OP1_0 OP2_6 reg8 uimm16 HI "pof")
-+(arithmetic20 subrhpof sub sub OP1_2 OP2_6 reg8 uimm16 HI "pof")
-+(arithmetic20 addbrhpof add add OP1_0 OP2_6 reg8 uimm16 HI "pag")
-+(arithmetic20 subbrhpof sub sub OP1_2 OP2_6 reg8 uimm16 HI "pag")
-+
-+;add/sub register and immediate
-+(define-pmacro (arithmetic21 name insn insn1 opc1 opc2 op1 op2 mode dir)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$hash$"dir"$"op2)
-+ (+ opc1 opc2 op1 (f-op-bit1 0) op2)
-+ (set mode op1 (insn1 mode op1 op2))
-+ ()
-+ )
-+)
-+(arithmetic21 addrhpof3 add add OP1_0 OP2_8 dr uimm3 HI "pof")
-+(arithmetic21 subrhpof3 sub sub OP1_2 OP2_8 dr uimm3 HI "pof")
-+(arithmetic21 addbrhpag3 addb add OP1_0 OP2_9 drb uimm3 QI "pag")
-+(arithmetic21 subbrhpag3 subb sub OP1_2 OP2_9 drb uimm3 QI "pag")
-+(arithmetic21 addrhpag3 add add OP1_0 OP2_8 dr uimm3 HI "pag")
-+(arithmetic21 subrhpag3 sub sub OP1_2 OP2_8 dr uimm3 HI "pag")
-+(arithmetic21 addbrhpof3 addb add OP1_0 OP2_9 drb uimm3 QI "pof")
-+(arithmetic21 subbrhpof3 subb sub OP1_2 OP2_9 drb uimm3 QI "pof")
-+
-+;add/sub register and immediate
-+(define-pmacro (arithmetic22 name insn insn1 opc1 opc2 op1 op2 mode dir)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$hash$"dir"$"op2)
-+ (+ opc1 opc2 op1 op2 (f-op-bit8 0))
-+ (set mode op1 (insn1 mode op1 op2))
-+ ()
-+ )
-+)
-+(arithmetic22 addrbhpof addb add OP1_0 OP2_7 regb8 uimm8 QI "pof")
-+(arithmetic22 subrbhpof subb sub OP1_2 OP2_7 regb8 uimm8 QI "pof")
-+(arithmetic22 addbrhpag addb add OP1_0 OP2_7 regb8 uimm8 QI "pag")
-+(arithmetic22 subbrhpag subb sub OP1_2 OP2_7 regb8 uimm8 QI "pag")
-+
-+;add/sub register and immediate
-+(define-pmacro (arithmetic23 name insn insn1 opc1 opc2 op1 op2 mode dir)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$hash$"dir"$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 (insn1 mode op1 op2 cbit))
-+ ()
-+ )
-+)
-+(arithmetic23 addcrhpof addc addc OP1_1 OP2_6 reg8 uimm16 HI "pof")
-+(arithmetic23 subcrhpof subc subc OP1_3 OP2_6 reg8 uimm16 HI "pof")
-+(arithmetic23 addcbrhpof addc addc OP1_1 OP2_6 reg8 uimm16 HI "pag")
-+(arithmetic23 subcbrhpof subc subc OP1_3 OP2_6 reg8 uimm16 HI "pag")
-+
-+;add/sub register and immediate
-+(define-pmacro (arithmetic24 name insn insn1 opc1 opc2 op1 op2 mode dir)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$hash$"dir"$"op2)
-+ (+ opc1 opc2 op1 (f-op-bit1 0) op2)
-+ (set mode op1 (insn1 mode op1 op2 cbit))
-+ ()
-+ )
-+)
-+(arithmetic24 addcrhpof3 addc addc OP1_1 OP2_8 dr uimm3 HI "pof")
-+(arithmetic24 subcrhpof3 subc subc OP1_3 OP2_8 dr uimm3 HI "pof")
-+(arithmetic24 addcbrhpag3 addcb addc OP1_1 OP2_9 drb uimm3 QI "pag")
-+(arithmetic24 subcbrhpag3 subcb subc OP1_3 OP2_9 drb uimm3 QI "pag")
-+(arithmetic24 addcrhpag3 addc addc OP1_1 OP2_8 dr uimm3 HI "pag")
-+(arithmetic24 subcrhpag3 subc subc OP1_3 OP2_8 dr uimm3 HI "pag")
-+(arithmetic24 addcbrhpof3 addcb addc OP1_1 OP2_9 drb uimm3 QI "pof")
-+(arithmetic24 subcbrhpof3 subcb subc OP1_3 OP2_9 drb uimm3 QI "pof")
-+
-+;add/sub register and immediate
-+(define-pmacro (arithmetic25 name insn insn1 opc1 opc2 op1 op2 mode dir)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$hash$"dir"$"op2)
-+ (+ opc1 opc2 op1 op2 (f-op-bit8 0))
-+ (set mode op1 (insn1 mode op1 op2 cbit))
-+ ()
-+ )
-+)
-+(arithmetic25 addcrbhpof addcb addc OP1_1 OP2_7 regb8 uimm8 QI "pof")
-+(arithmetic25 subcrbhpof subcb subc OP1_3 OP2_7 regb8 uimm8 QI "pof")
-+(arithmetic25 addcbrhpag addcb addc OP1_1 OP2_7 regb8 uimm8 QI "pag")
-+(arithmetic25 subcbrhpag subcb subc OP1_3 OP2_7 regb8 uimm8 QI "pag")
-+
-+;add/sub register and immediate
-+(define-pmacro (arithmetic10 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$hash$"op2)
-+ (+ opc1 opc2 op1 (f-op-bit1 0) op2)
-+ (set mode op1 (insn1 mode op1 op2))
-+ ()
-+ )
-+)
-+(arithmetic10 addri add add OP1_0 OP2_8 dr uimm3 HI)
-+(arithmetic10 subri sub sub OP1_2 OP2_8 dr uimm3 HI)
-+(arithmetic10 addbri addb add OP1_0 OP2_9 drb uimm3 QI)
-+(arithmetic10 subbri subb sub OP1_2 OP2_9 drb uimm3 QI)
-+
-+;add/sub register and immediate
-+(define-pmacro (arithmetic11 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$hash$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 (insn1 mode op1 op2))
-+ ()
-+ )
-+)
-+(arithmetic11 addrim add add OP1_0 OP2_6 reg8 uimm16 HI)
-+(arithmetic11 subrim sub sub OP1_2 OP2_6 reg8 uimm16 HI)
-+
-+;add/sub register and immediate
-+(define-pmacro (arithmetic12 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$hash$"op2)
-+ (+ opc1 opc2 op1 op2 (f-op-bit8 0))
-+ (set mode op1 (insn1 mode op1 op2))
-+ ()
-+ )
-+)
-+(arithmetic12 addbrim addb add OP1_0 OP2_7 regb8 uimm8 QI)
-+(arithmetic12 subbrim subb sub OP1_2 OP2_7 regb8 uimm8 QI)
-+
-+;add/sub register and immediate with carry
-+(define-pmacro (arithmetic13 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$hash$"op2)
-+ (+ opc1 opc2 op1 (f-op-bit1 0) op2)
-+ (set mode op1 (insn1 mode op1 op2 cbit))
-+ ()
-+ )
-+)
-+(arithmetic13 addcri addc addc OP1_1 OP2_8 dr uimm3 HI)
-+(arithmetic13 subcri subc subc OP1_3 OP2_8 dr uimm3 HI)
-+(arithmetic13 addcbri addcb addc OP1_1 OP2_9 drb uimm3 QI)
-+(arithmetic13 subcbri subcb subc OP1_3 OP2_9 drb uimm3 QI)
-+
-+;add/sub register and immediate with carry
-+(define-pmacro (arithmetic14 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$hash$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 (insn1 mode op1 op2 cbit))
-+ ()
-+ )
-+)
-+(arithmetic14 addcrim addc addc OP1_1 OP2_6 reg8 uimm16 HI)
-+(arithmetic14 subcrim subc subc OP1_3 OP2_6 reg8 uimm16 HI)
-+
-+;add/sub register and immediate with carry
-+(define-pmacro (arithmetic15 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$hash$"op2)
-+ (+ opc1 opc2 op1 op2 (f-op-bit8 0))
-+ (set mode op1 (insn1 mode op1 op2 cbit))
-+ ()
-+ )
-+)
-+(arithmetic15 addcbrim addcb addc OP1_1 OP2_7 regb8 uimm8 QI)
-+(arithmetic15 subcbrim subcb subc OP1_3 OP2_7 regb8 uimm8 QI)
-+
-+
-+;add/sub registers
-+(define-pmacro (arithmetic name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 (insn1 mode op1 op2))
-+ ()
-+ )
-+)
-+(arithmetic addr add add OP1_0 OP2_0 dr sr HI)
-+(arithmetic subr sub sub OP1_2 OP2_0 dr sr HI)
-+(arithmetic addbr addb add OP1_0 OP2_1 drb srb QI)
-+(arithmetic subbr subb sub OP1_2 OP2_1 drb srb QI)
-+
-+;add/sub register and indirect memory
-+(define-pmacro (arithmetic1 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",[$"op2"]")
-+ (+ opc1 opc2 op1 (f-op-bit2 2) op2)
-+ (set mode op1 (insn1 mode op1 (mem HI op2)))
-+ ()
-+ )
-+)
-+(arithmetic1 add2 add add OP1_0 OP2_8 dr sr2 HI)
-+(arithmetic1 sub2 sub sub OP1_2 OP2_8 dr sr2 HI)
-+(arithmetic1 addb2 addb add OP1_0 OP2_9 drb sr2 QI)
-+(arithmetic1 subb2 subb sub OP1_2 OP2_9 drb sr2 QI)
-+
-+;add/sub register and indirect memory post increment
-+(define-pmacro (arithmetic2 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",[$"op2"+]")
-+ (+ opc1 opc2 op1 (f-op-bit2 3) op2)
-+ (sequence ()
-+ (set mode op1 (insn1 mode op1 (mem HI op2)))
-+ (set HI op2 (add HI op2 (const 2)))
-+ )
-+ ()
-+ )
-+)
-+(arithmetic2 add2i add add OP1_0 OP2_8 dr sr2 HI)
-+(arithmetic2 sub2i sub sub OP1_2 OP2_8 dr sr2 HI)
-+(arithmetic2 addb2i addb add OP1_0 OP2_9 drb sr2 QI)
-+(arithmetic2 subb2i subb sub OP1_2 OP2_9 drb sr2 QI)
-+
-+;add/sub registers with carry
-+(define-pmacro (arithmetic3 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 (insn1 mode op1 op2 cbit))
-+ ()
-+ )
-+)
-+(arithmetic3 addcr addc addc OP1_1 OP2_0 dr sr HI)
-+(arithmetic3 subcr subc subc OP1_3 OP2_0 dr sr HI)
-+(arithmetic3 addbcr addcb addc OP1_1 OP2_1 drb srb QI)
-+(arithmetic3 subbcr subcb subc OP1_3 OP2_1 drb srb QI)
-+
-+
-+;add/sub register and indirect memory
-+(define-pmacro (arithmetic4 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",[$"op2"]")
-+ (+ opc1 opc2 op1 (f-op-bit2 2) op2)
-+ (set mode op1 (insn1 mode op1 (mem HI op2) cbit))
-+ ()
-+ )
-+)
-+(arithmetic4 addcr2 addc addc OP1_1 OP2_8 dr sr2 HI)
-+(arithmetic4 subcr2 subc subc OP1_3 OP2_8 dr sr2 HI)
-+(arithmetic4 addbcr2 addcb addc OP1_1 OP2_9 drb sr2 QI)
-+(arithmetic4 subbcr2 subcb subc OP1_3 OP2_9 drb sr2 QI)
-+
-+;add/sub register and indirect memory post increment
-+(define-pmacro (arithmetic5 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",[$"op2"+]")
-+ (+ opc1 opc2 op1 (f-op-bit2 3) op2)
-+ (sequence ()
-+ (set mode op1 (insn1 mode op1 (mem HI op2) cbit))
-+ (set HI op2 (add HI op2 (const 2)))
-+ )
-+ ()
-+ )
-+)
-+(arithmetic5 addcr2i addc addc OP1_1 OP2_8 dr sr2 HI)
-+(arithmetic5 subcr2i subc subc OP1_3 OP2_8 dr sr2 HI)
-+(arithmetic5 addbcr2i addcb addc OP1_1 OP2_9 drb sr2 QI)
-+(arithmetic5 subbcr2i subcb subc OP1_3 OP2_9 drb sr2 QI)
-+
-+;add/sub register and direct memory
-+(define-pmacro (arithmetic6 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 (insn1 mode op1 op2))
-+ ()
-+ )
-+)
-+
-+;add/sub register and direct memory
-+(define-pmacro (arithmetic7 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$"op2)
-+ (+ opc1 opc2 op2 op1)
-+ (set (mem HI op1) (insn1 (mem HI op1) op2))
-+ ()
-+ )
-+)
-+(arithmetic6 addrm2 add add OP1_0 OP2_2 regmem8 memgr8 HI)
-+(arithmetic7 addrm3 add add OP1_0 OP2_4 memgr8 regmem8 HI)
-+(arithmetic6 addrm add add OP1_0 OP2_2 reg8 memory HI)
-+(arithmetic7 addrm1 add add OP1_0 OP2_4 memory reg8 HI)
-+(arithmetic6 subrm3 sub sub OP1_2 OP2_2 regmem8 memgr8 HI)
-+(arithmetic7 subrm2 sub sub OP1_2 OP2_4 memgr8 regmem8 HI)
-+(arithmetic6 subrm1 sub sub OP1_2 OP2_2 reg8 memory HI)
-+(arithmetic7 subrm sub sub OP1_2 OP2_4 memory reg8 HI)
-+(arithmetic6 addbrm2 addb add OP1_0 OP2_3 regbmem8 memgr8 QI)
-+(arithmetic7 addbrm3 addb add OP1_0 OP2_5 memgr8 regbmem8 QI)
-+(arithmetic6 addbrm addb add OP1_0 OP2_3 regb8 memory QI)
-+(arithmetic7 addbrm1 addb add OP1_0 OP2_5 memory regb8 QI)
-+(arithmetic6 subbrm3 subb sub OP1_2 OP2_3 regbmem8 memgr8 QI)
-+(arithmetic7 subbrm2 subb sub OP1_2 OP2_5 memgr8 regbmem8 QI)
-+(arithmetic6 subbrm1 subb sub OP1_2 OP2_3 regb8 memory QI)
-+(arithmetic7 subbrm subb sub OP1_2 OP2_5 memory regb8 QI)
-+
-+;add/sub registers with carry
-+(define-pmacro (arithmetic8 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 (insn1 mode op1 op2 cbit))
-+ ()
-+ )
-+)
-+
-+;add/sub registers with carry
-+(define-pmacro (arithmetic9 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$"op2)
-+ (+ opc1 opc2 op2 op1)
-+ (set (mem HI op1) (insn1 (mem HI op1) op2 cbit))
-+ ()
-+ )
-+)
-+(arithmetic8 addcrm2 addc addc OP1_1 OP2_2 regmem8 memgr8 HI)
-+(arithmetic9 addcrm3 addc addc OP1_1 OP2_4 memgr8 regmem8 HI)
-+(arithmetic8 addcrm addc addc OP1_1 OP2_2 reg8 memory HI)
-+(arithmetic9 addcrm1 addc addc OP1_1 OP2_4 memory reg8 HI)
-+(arithmetic8 subcrm3 subc subc OP1_3 OP2_2 regmem8 memgr8 HI)
-+(arithmetic9 subcrm2 subc subc OP1_3 OP2_4 memgr8 regmem8 HI)
-+(arithmetic8 subcrm1 subc subc OP1_3 OP2_2 reg8 memory HI)
-+(arithmetic9 subcrm subc subc OP1_3 OP2_4 memory reg8 HI)
-+(arithmetic8 addcbrm2 addcb addc OP1_1 OP2_3 regbmem8 memgr8 QI)
-+(arithmetic9 addcbrm3 addcb addc OP1_1 OP2_5 memgr8 regbmem8 QI)
-+(arithmetic8 addcbrm addcb addc OP1_1 OP2_3 regb8 memory QI)
-+(arithmetic9 addcbrm1 addcb addc OP1_1 OP2_5 memory regb8 QI)
-+(arithmetic8 subcbrm3 subcb subc OP1_3 OP2_3 regbmem8 memgr8 QI)
-+(arithmetic9 subcbrm2 subcb subc OP1_3 OP2_5 memgr8 regbmem8 QI)
-+(arithmetic8 subcbrm1 subcb subc OP1_3 OP2_3 regb8 memory QI)
-+(arithmetic9 subcbrm subcb subc OP1_3 OP2_5 memory regb8 QI)
-+
-+; MUL Rwn,Rwm
-+(dni muls "signed multiplication"
-+ ((PIPE OS) (IDOC ALU))
-+ "mul $src1,$src2"
-+ (+ OP1_0 OP2_11 src1 src2)
-+ (reg SI h-md 0)
-+ ()
-+)
-+; MULU Rwn,Rwm
-+(dni mulu "unsigned multiplication"
-+ ((PIPE OS) (IDOC ALU))
-+ "mulu $src1,$src2"
-+ (+ OP1_1 OP2_11 src1 src2)
-+ (reg SI h-md 0)
-+ ()
-+)
-+; DIV Rwn
-+(dni div "16-by-16 signed division"
-+ ((PIPE OS) (IDOC ALU))
-+ "div $srdiv"
-+ (+ OP1_4 OP2_11 srdiv )
-+ (sequence ()
-+ (set HI (reg HI h-cr 6) (div HI (reg HI h-cr 6) srdiv))
-+ (set HI (reg HI h-cr 7) (mod HI (reg HI h-cr 6) srdiv))
-+ )
-+ ()
-+)
-+; DIVL Rwn
-+(dni divl "32-by16 signed division"
-+ ((PIPE OS) (IDOC ALU))
-+ "divl $srdiv"
-+ (+ OP1_6 OP2_11 srdiv )
-+ (sequence ()
-+ (set HI (reg HI h-cr 6) (div SI (reg SI h-md 0) srdiv))
-+ (set HI (reg HI h-cr 7) (mod SI (reg SI h-md 0) srdiv))
-+ )
-+ ()
-+)
-+; DIVLU Rwn
-+(dni divlu "32-by16 unsigned division"
-+ ((PIPE OS) (IDOC ALU))
-+ "divlu $srdiv"
-+ (+ OP1_7 OP2_11 srdiv )
-+ (sequence ()
-+ (set HI (reg HI h-cr 6) (udiv SI (reg SI h-md 0) srdiv))
-+ (set HI (reg HI h-cr 7) (umod SI (reg SI h-md 0) srdiv))
-+ )
-+ ()
-+)
-+; DIVU Rwn
-+(dni divu "16-by-16 unsigned division"
-+ ((PIPE OS) (IDOC ALU))
-+ "divu $srdiv"
-+ (+ OP1_5 OP2_11 srdiv )
-+ (sequence ()
-+ (set HI (reg HI h-cr 6) (udiv HI (reg HI h-cr 6) srdiv))
-+ (set HI (reg HI h-cr 7) (umod HI (reg HI h-cr 6) srdiv))
-+ )
-+ ()
-+)
-+
-+;Integer one's complement
-+; CPL Rwn
-+(dni cpl "Integer Ones complement"
-+ ((PIPE OS) (IDOC MISC))
-+ "cpl $dr"
-+ (+ OP1_9 OP2_1 dr (f-op-bit4 0))
-+ (set dr (inv HI dr))
-+ ()
-+)
-+
-+;Bytes one's complement
-+; CPLB Rbn
-+(dni cplb "Byte Ones complement"
-+ ((PIPE OS) (IDOC MISC))
-+ "cplb $drb"
-+ (+ OP1_11 OP2_1 drb (f-op-bit4 0))
-+ (set drb (inv QI drb))
-+ ()
-+)
-+;Integer two's complement
-+; NEG Rwn
-+(dni neg "Integer two's complement"
-+ ((PIPE OS) (IDOC MISC))
-+ "neg $dr"
-+ (+ OP1_8 OP2_1 dr (f-op-bit4 0))
-+ (set dr (neg HI dr))
-+ ()
-+)
-+;Bytes two's complement
-+; NEGB Rbn
-+(dni negb "byte twos complement"
-+ ((PIPE OS) (IDOC MISC))
-+ "negb $drb"
-+ (+ OP1_10 OP2_1 drb (f-op-bit4 0))
-+ (set drb (neg QI drb))
-+ ()
-+)
-+
-+;****************************************************************
-+;logical insn
-+;****************************************************************
-+;and/or/xor registers
-+(define-pmacro (logical name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "logical" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 (insn1 mode op1 op2))
-+ ()
-+ )
-+)
-+
-+(logical andr and and OP1_6 OP2_0 dr sr HI)
-+(logical orr or or OP1_7 OP2_0 dr sr HI)
-+(logical xorr xor xor OP1_5 OP2_0 dr sr HI)
-+(logical andbr andb and OP1_6 OP2_1 drb srb QI)
-+(logical orbr orb or OP1_7 OP2_1 drb srb QI)
-+(logical xorbr xorb xor OP1_5 OP2_1 drb srb QI)
-+
-+;and/or/xor register and immediate
-+(define-pmacro (logical1 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "logical" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$hash$"op2)
-+ (+ opc1 opc2 op1 (f-op-bit1 0) op2)
-+ (set mode op1 (insn1 mode op1 op2))
-+ ()
-+ )
-+)
-+(logical1 andri and and OP1_6 OP2_8 dr uimm3 HI)
-+(logical1 orri or or OP1_7 OP2_8 dr uimm3 HI)
-+(logical1 xorri xor xor OP1_5 OP2_8 dr uimm3 HI)
-+(logical1 andbri andb and OP1_6 OP2_9 drb uimm3 QI)
-+(logical1 orbri orb or OP1_7 OP2_9 drb uimm3 QI)
-+(logical1 xorbri xorb xor OP1_5 OP2_9 drb uimm3 QI)
-+
-+;and/or/xor register and immediate
-+(define-pmacro (logical2 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "logical" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$hash$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 (insn1 mode op1 op2))
-+ ()
-+ )
-+)
-+(logical2 andrim and and OP1_6 OP2_6 reg8 uimm16 HI)
-+(logical2 orrim or or OP1_7 OP2_6 reg8 uimm16 HI)
-+(logical2 xorrim xor xor OP1_5 OP2_6 reg8 uimm16 HI)
-+
-+;and/or/xor register and immediate
-+(define-pmacro (logical3 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "logical" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$hash$"op2)
-+ (+ opc1 opc2 op1 op2 (f-op-bit8 0))
-+ (set mode op1 (insn1 mode op1 op2))
-+ ()
-+ )
-+)
-+(logical3 andbrim andb and OP1_6 OP2_7 regb8 uimm8 QI)
-+(logical3 orbrim orb or OP1_7 OP2_7 regb8 uimm8 QI)
-+(logical3 xorbrim xorb xor OP1_5 OP2_7 regb8 uimm8 QI)
-+
-+;and/or/xor register and indirect memory
-+(define-pmacro (logical4 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "logical" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",[$"op2"]")
-+ (+ opc1 opc2 op1 (f-op-bit2 2) op2)
-+ (set mode op1 (insn1 mode op1 (mem HI op2)))
-+ ()
-+ )
-+)
-+(logical4 and2 and and OP1_6 OP2_8 dr sr2 HI)
-+(logical4 or2 or or OP1_7 OP2_8 dr sr2 HI)
-+(logical4 xor2 xor xor OP1_5 OP2_8 dr sr2 HI)
-+(logical4 andb2 andb and OP1_6 OP2_9 drb sr2 QI)
-+(logical4 orb2 orb or OP1_7 OP2_9 drb sr2 QI)
-+(logical4 xorb2 xorb xor OP1_5 OP2_9 drb sr2 QI)
-+
-+;and/or/xor register and indirect memory post increment
-+(define-pmacro (logical5 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "logical" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",[$"op2"+]")
-+ (+ opc1 opc2 op1 (f-op-bit2 3) op2)
-+ (sequence ()
-+ (set mode op1 (insn1 mode op1 (mem HI op2)))
-+ (set HI op2 (add HI op2 (const 2)))
-+ )
-+ ()
-+ )
-+)
-+(logical5 and2i and and OP1_6 OP2_8 dr sr2 HI)
-+(logical5 or2i or or OP1_7 OP2_8 dr sr2 HI)
-+(logical5 xor2i xor xor OP1_5 OP2_8 dr sr2 HI)
-+(logical5 andb2i andb and OP1_6 OP2_9 drb sr2 QI)
-+(logical5 orb2i orb or OP1_7 OP2_9 drb sr2 QI)
-+(logical5 xorb2i xorb xor OP1_5 OP2_9 drb sr2 QI)
-+
-+;add/sub register and immediate
-+(define-pmacro (logical7 name insn insn1 opc1 opc2 op1 op2 mode dir)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"dir"$"op1 ",$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set (mem HI op1) (insn1 (mem HI op1) op2 ))
-+ ()
-+ )
-+)
-+(logical7 andpofr and and OP1_6 OP2_2 reg8 upof16 HI "pof")
-+(logical7 orpofr or or OP1_7 OP2_2 reg8 upof16 HI "pof")
-+(logical7 xorpofr xor xor OP1_5 OP2_2 reg8 upof16 HI "pof")
-+(logical7 andbpofr andb and OP1_6 OP2_3 regb8 upof16 QI "pof")
-+(logical7 orbpofr orb or OP1_7 OP2_3 regb8 upof16 QI "pof")
-+(logical7 xorbpofr xorb xor OP1_5 OP2_3 regb8 upof16 QI "pof")
-+
-+;add/sub register and immediate
-+(define-pmacro (logical8 name insn insn1 opc1 opc2 op1 op2 mode dir)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"dir"$"op1 ",$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set (mem HI op1) (insn1 (mem HI op1) op2 ))
-+ ()
-+ )
-+)
-+(logical8 andrpofr and and OP1_6 OP2_4 upof16 reg8 HI "pof")
-+(logical8 orrpofr or or OP1_7 OP2_4 upof16 reg8 HI "pof")
-+(logical8 xorrpofr xor xor OP1_5 OP2_4 upof16 reg8 HI "pof")
-+(logical8 andbrpofr andb and OP1_6 OP2_5 upof16 regb8 QI "pof")
-+(logical8 orbrpofr orb or OP1_7 OP2_5 upof16 regb8 QI "pof")
-+(logical8 xorbrpofr xorb xor OP1_5 OP2_5 upof16 regb8 QI "pof")
-+
-+;and/or/xor register and direct memory
-+(define-pmacro (logical6 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 (insn1 mode op1 op2))
-+ ()
-+ )
-+)
-+
-+;and/or/xor register and direct memory
-+(define-pmacro (logical7 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "arithmetic" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$"op2)
-+ (+ opc1 opc2 op2 op1)
-+ (set (mem HI op1) (insn1 (mem HI op1) op2))
-+ ()
-+ )
-+)
-+(logical6 andrm2 and and OP1_6 OP2_2 regmem8 memgr8 HI)
-+(logical7 andrm3 and and OP1_6 OP2_4 memgr8 regmem8 HI)
-+(logical6 andrm and and OP1_6 OP2_2 reg8 memory HI)
-+(logical7 andrm1 and and OP1_6 OP2_4 memory reg8 HI)
-+(logical6 orrm3 or or OP1_7 OP2_2 regmem8 memgr8 HI)
-+(logical7 orrm2 or or OP1_7 OP2_4 memgr8 regmem8 HI)
-+(logical6 orrm1 or or OP1_7 OP2_2 reg8 memory HI)
-+(logical7 orrm or or OP1_7 OP2_4 memory reg8 HI)
-+(logical6 xorrm3 xor xor OP1_5 OP2_2 regmem8 memgr8 HI)
-+(logical7 xorrm2 xor xor OP1_5 OP2_4 memgr8 regmem8 HI)
-+(logical6 xorrm1 xor xor OP1_5 OP2_2 reg8 memory HI)
-+(logical7 xorrm xor xor OP1_5 OP2_4 memory reg8 HI)
-+(logical6 andbrm2 andb and OP1_6 OP2_3 regbmem8 memgr8 QI)
-+(logical7 andbrm3 andb and OP1_6 OP2_5 memgr8 regbmem8 QI)
-+(logical6 andbrm andb and OP1_6 OP2_3 regb8 memory QI)
-+(logical7 andbrm1 andb and OP1_6 OP2_5 memory regb8 QI)
-+(logical6 orbrm3 orb or OP1_7 OP2_3 regbmem8 memgr8 QI)
-+(logical7 orbrm2 orb or OP1_7 OP2_5 memgr8 regbmem8 QI)
-+(logical6 orbrm1 orb or OP1_7 OP2_3 regb8 memory QI)
-+(logical7 orbrm orb or OP1_7 OP2_5 memory regb8 QI)
-+(logical6 xorbrm3 xorb xor OP1_5 OP2_3 regbmem8 memgr8 QI)
-+(logical7 xorbrm2 xorb xor OP1_5 OP2_5 memgr8 regbmem8 QI)
-+(logical6 xorbrm1 xorb xor OP1_5 OP2_3 regb8 memory QI)
-+(logical7 xorbrm xorb xor OP1_5 OP2_5 memory regb8 QI)
-+
-+;****************************************************************
-+;logical insn
-+;****************************************************************
-+;mov registers
-+(define-pmacro (move name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "mov registers" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " $"op1 ",$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 op2)
-+ ()
-+ )
-+)
-+(move movr mov OP1_15 OP2_0 dr sr HI)
-+(move movrb movb OP1_15 OP2_1 drb srb HI)
-+
-+;mov register and immediate
-+(define-pmacro (move1 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " $"op1 ",$hash$"op2)
-+ (+ opc1 opc2 op2 op1)
-+ (set mode op1 op2)
-+ ()
-+ )
-+)
-+(move1 movri mov OP1_14 OP2_0 dri u4 HI)
-+(move1 movbri movb OP1_14 OP2_1 srb u4 QI)
-+
-+; MOV Rwn,#data16
-+(dni movi "move immediate to register"
-+ ((PIPE OS) (IDOC MOVE))
-+ "mov $reg8,$hash$uimm16"
-+ (+ OP1_14 OP2_6 reg8 uimm16)
-+ (set HI reg8 uimm16)
-+ ()
-+)
-+
-+; MOVB reg,#data8
-+(dni movbi "move immediate to register"
-+ ((PIPE OS) (IDOC MOVE))
-+ "movb $regb8,$hash$uimm8"
-+ (+ OP1_14 OP2_7 regb8 uimm8 (f-op-bit8 0))
-+ (set QI regb8 uimm8)
-+ ()
-+)
-+
-+;move and indirect memory
-+(define-pmacro (mov2 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " $"op1 ",[$"op2"]")
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 (mem HI op2))
-+ ()
-+ )
-+)
-+(mov2 movr2 mov OP1_10 OP2_8 dr sr HI)
-+(mov2 movbr2 movb OP1_10 OP2_9 drb sr QI)
-+
-+;move and indirect memory
-+(define-pmacro (mov3 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " [$"op2 "],$"op1)
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 (mem HI op2))
-+ ()
-+ )
-+)
-+(mov3 movri2 mov OP1_11 OP2_8 dr sr HI)
-+(mov3 movbri2 movb OP1_11 OP2_9 drb sr QI)
-+
-+;move and indirect memory
-+(define-pmacro (mov4 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " [-$"op2 "],$"op1)
-+ (+ opc1 opc2 op1 op2)
-+ (sequence HI ()
-+ (set op1 (sub op2 (const HI 2)))
-+ (set HI (mem HI op2) op1)
-+ )
-+ ()
-+ )
-+)
-+(mov4 movri3 mov OP1_8 OP2_8 dr sr HI)
-+(mov4 movbri3 movb OP1_8 OP2_9 drb sr QI)
-+
-+;mov register and indirect memory post increment
-+(define-pmacro (mov5 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " $"op1 ",[$"op2"+]")
-+ (+ opc1 opc2 op1 op2)
-+ (sequence ()
-+ (set mode op1 (mem HI op2))
-+ (set HI op2 (add HI op2 (const 2)))
-+ )
-+ ()
-+ )
-+)
-+(mov5 mov2i mov OP1_9 OP2_8 dr sr HI)
-+(mov5 movb2i movb OP1_9 OP2_9 drb sr HI)
-+
-+;mov indirect memory
-+(define-pmacro (mov6 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " [$"op1 "],[$"op2"]")
-+ (+ opc1 opc2 op1 op2)
-+ (set HI (mem HI op1) (mem HI op2))
-+ ()
-+ )
-+)
-+(mov6 mov6i mov OP1_12 OP2_8 dr sr HI)
-+(mov6 movb6i movb OP1_12 OP2_9 dr sr HI)
-+
-+;mov indirect memory
-+(define-pmacro (mov7 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " [$"op1 "+],[$"op2"]")
-+ (+ opc1 opc2 op1 op2)
-+ (sequence ()
-+ (set mode (mem mode op1) (mem mode op2))
-+ (set mode op1 (add mode op1 (const mode 2)))
-+ )
-+ ()
-+ )
-+)
-+(mov7 mov7i mov OP1_13 OP2_8 dr sr HI)
-+(mov7 movb7i movb OP1_13 OP2_9 dr sr HI)
-+
-+;mov indirect memory
-+(define-pmacro (mov8 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " [$"op1 "],[$"op2"+]")
-+ (+ opc1 opc2 op1 op2)
-+ (sequence ()
-+ (set mode (mem mode op1) (mem mode op2))
-+ (set mode op2 (add mode op2 (const mode 2)))
-+ )
-+ ()
-+ )
-+)
-+(mov8 mov8i mov OP1_14 OP2_8 dr sr HI)
-+(mov8 movb8i movb OP1_14 OP2_9 dr sr HI)
-+
-+;mov indirect memory
-+(define-pmacro (mov9 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " $"op1 ",[$"op2"+$hash$"uimm16"]")
-+ (+ opc1 opc2 op1 op2 uimm16)
-+ (sequence mode ((mode tmp1))
-+ (set mode tmp1 (add HI op2 uimm16))
-+ (set mode op1 (mem HI tmp1))
-+ )
-+ ()
-+ )
-+)
-+(mov9 mov9i mov OP1_13 OP2_4 dr sr HI)
-+(mov9 movb9i movb OP1_15 OP2_4 drb sr QI)
-+
-+;mov indirect memory
-+(define-pmacro (mov10 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " [$"op2"+$hash$"uimm16 "],$"op1)
-+ (+ opc1 opc2 op1 op2 uimm16)
-+ (sequence mode ((mode tmp1))
-+ (set mode tmp1 (add HI op1 uimm16))
-+ (set mode (mem HI tmp1) op1)
-+ )
-+ ()
-+ )
-+)
-+(mov10 mov10i mov OP1_12 OP2_4 dr sr HI)
-+(mov10 movb10i movb OP1_14 OP2_4 drb sr QI)
-+
-+;move and indirect memory
-+(define-pmacro (mov11 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " [$"op1 "],$"op2)
-+ (+ opc1 opc2 (f-op-lbit4 0) op1 op2)
-+ (set (mem mode op1) (mem HI op2))
-+ ()
-+ )
-+)
-+(mov11 movri11 mov OP1_8 OP2_4 src2 memory HI)
-+(mov11 movbri11 movb OP1_10 OP2_4 src2 memory HI)
-+
-+;move and indirect memory
-+(define-pmacro (mov12 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " $"op2 ",[$"op1"]")
-+ (+ opc1 opc2 (f-op-lbit4 0) op1 op2)
-+ (set (mem HI op2) (mem mode op1))
-+ ()
-+ )
-+)
-+(mov12 movri12 mov OP1_9 OP2_4 src2 memory HI)
-+(mov12 movbri12 movb OP1_11 OP2_4 src2 memory HI)
-+
-+(define-pmacro (movemem3 name insn opc1 opc2 op1 op2 dir)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " $"op1 ",$hash$"dir"$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set HI op1 op2)
-+ ()
-+ )
-+)
-+(movemem3 movehm5 mov OP1_14 OP2_6 regoff8 upof16 "pof")
-+(movemem3 movehm6 mov OP1_14 OP2_6 regoff8 upag16 "pag")
-+(movemem3 movehm7 mov OP1_14 OP2_6 regoff8 useg16 "segm")
-+(movemem3 movehm8 mov OP1_14 OP2_6 regoff8 usof16 "sof")
-+
-+(define-pmacro (movemem4 name insn opc1 opc2 op1 op2 dir)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " $"op1 ",$hash$"dir"$"op2)
-+ (+ opc1 opc2 op1 op2 (f-op-bit8 0))
-+ (set QI op1 op2)
-+ ()
-+ )
-+)
-+(movemem4 movehm9 movb OP1_14 OP2_7 regb8 uimm8 "pof")
-+(movemem4 movehm10 movb OP1_14 OP2_7 regoff8 uimm8 "pag")
-+
-+(define-pmacro (movemem name insn opc1 opc2 op1 op2 mode dir)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " $"op1 ",$"dir"$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 (mem HI op2))
-+ ()
-+ )
-+)
-+(movemem movrmp mov OP1_15 OP2_2 regoff8 upof16 HI "pof")
-+(movemem movrmp1 movb OP1_15 OP2_3 regb8 upof16 QI "pof")
-+(movemem movrmp2 mov OP1_15 OP2_2 regoff8 upag16 HI "pag")
-+(movemem movrmp3 movb OP1_15 OP2_3 regb8 upag16 QI "pag")
-+
-+(define-pmacro (movemem1 name insn opc1 opc2 op1 op2 dir)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " $"dir"$"op1 ",$"op2)
-+ (+ opc1 opc2 op2 op1)
-+ (set (mem HI op1) op2 )
-+ ()
-+ )
-+)
-+(movemem1 movrmp4 mov OP1_15 OP2_6 upof16 regoff8 "pof")
-+(movemem1 movrmp5 movb OP1_15 OP2_7 upof16 regb8 "pof")
-+
-+(define-pmacro (movemem2 name insn opc1 opc2 op1 op2 mode dir)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " $"op1 ",$hash$"dir"$"op2)
-+ (+ opc1 opc2 op2 op1)
-+ (set mode op1 op2)
-+ ()
-+ )
-+)
-+(movemem2 movehm1 mov OP1_14 OP2_0 dri u4 HI "pof")
-+(movemem2 movehm2 movb OP1_14 OP2_1 srb u4 QI "pof")
-+(movemem2 movehm3 mov OP1_14 OP2_0 dri u4 HI "pag")
-+(movemem2 movehm4 movb OP1_14 OP2_1 srb u4 QI "pag")
-+
-+;move register and direct memory
-+(define-pmacro (move12 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " $"op1 ",$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 (mem HI op2))
-+ ()
-+ )
-+)
-+
-+;move register and direct memory
-+(define-pmacro (move13 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " $"op1 ",$"op2)
-+ (+ opc1 opc2 op2 op1)
-+ (set (mem HI op1) op2)
-+ ()
-+ )
-+)
-+(move12 mve12 mov OP1_15 OP2_2 regmem8 memgr8 HI)
-+(move13 mve13 mov OP1_15 OP2_6 memgr8 regmem8 HI)
-+(move12 mover12 mov OP1_15 OP2_2 reg8 memory HI)
-+(move13 mvr13 mov OP1_15 OP2_6 memory reg8 HI)
-+(move12 mver12 movb OP1_15 OP2_3 regbmem8 memgr8 QI)
-+(move13 mver13 movb OP1_15 OP2_7 memgr8 regbmem8 QI)
-+(move12 movr12 movb OP1_15 OP2_3 regb8 memory QI)
-+(move13 movr13 movb OP1_15 OP2_7 memory regb8 QI)
-+
-+; MOVBS Rw,Rb
-+(dni movbsrr "mov byte register with sign extension to word register"
-+ ((PIPE OS) (IDOC MOVE))
-+ "movbs $sr,$drb"
-+ (+ OP1_13 OP2_0 drb sr)
-+ (sequence ()
-+ (if QI (and QI drb (const 128))
-+ (set HI sr (or HI (const HI 65280) drb)))
-+ (set HI sr (and HI (const HI 255) drb))
-+ )
-+ ()
-+)
-+
-+; MOVBZ Rw,Rb
-+(dni movbzrr "mov byte register with zero extension to word register"
-+ ((PIPE OS) (IDOC MOVE))
-+ "movbz $sr,$drb"
-+ (+ OP1_12 OP2_0 drb sr)
-+ (set HI sr (and HI (const HI 255) drb))
-+ ()
-+)
-+
-+; MOVBS reg,POF mem
-+(dni movbsrpofm "mov memory to byte register"
-+ ((PIPE OS) (IDOC MOVE))
-+ "movbs $regmem8,$pof$upof16"
-+ (+ OP1_13 OP2_2 regmem8 upof16)
-+ (set QI regmem8 (mem HI upof16))
-+ ()
-+)
-+
-+; MOVBS pof,reg
-+(dni movbspofmr "mov memory to byte register"
-+ ((PIPE OS) (IDOC MOVE))
-+ "movbs $pof$upof16,$regbmem8"
-+ (+ OP1_13 OP2_5 upof16 regbmem8 )
-+ (set QI (mem HI upof16) regbmem8)
-+ ()
-+)
-+
-+; MOVBZ reg,POF mem
-+(dni movbzrpofm "mov memory to byte register"
-+ ((PIPE OS) (IDOC MOVE))
-+ "movbz $reg8,$pof$upof16"
-+ (+ OP1_12 OP2_2 reg8 upof16)
-+ (set QI reg8 (mem HI upof16))
-+ ()
-+)
-+
-+; MOVBZ pof,reg
-+(dni movbzpofmr "mov memory to byte register"
-+ ((PIPE OS) (IDOC MOVE))
-+ "movbz $pof$upof16,$regb8"
-+ (+ OP1_12 OP2_5 upof16 regb8 )
-+ (set QI (mem HI upof16) regb8)
-+ ()
-+)
-+
-+;move register and direct memory
-+(define-pmacro (move14 name insn opc1 opc2 op1 op2 )
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " $"op1 ",$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set HI op1 (and HI (const HI 255) (mem QI op2)))
-+ ()
-+ )
-+)
-+
-+;move register and direct memory
-+(define-pmacro (move15 name insn opc1 opc2 op1 op2 )
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " $"op1 ",$"op2)
-+ (+ opc1 opc2 op2 op1)
-+ (set HI (mem HI op1) (and HI (const HI 255) op2))
-+ ()
-+ )
-+)
-+(move14 movebs14 movbs OP1_13 OP2_2 regmem8 memgr8 )
-+(move15 movebs15 movbs OP1_13 OP2_5 memgr8 regbmem8 )
-+(move14 moverbs14 movbs OP1_13 OP2_2 reg8 memory )
-+(move15 movrbs15 movbs OP1_13 OP2_5 memory regb8 )
-+(move14 movebz14 movbz OP1_12 OP2_2 regmem8 memgr8 )
-+(move15 movebz15 movbz OP1_12 OP2_5 memgr8 regbmem8 )
-+(move14 moverbz14 movbz OP1_12 OP2_2 reg8 memory )
-+(move15 movrbz15 movbz OP1_12 OP2_5 memory regb8 )
-+
-+
-+;mov registers
-+(define-pmacro (moveb1 name insn opc1 opc2 op1 op2)
-+ (dni name
-+ (.str name "move" )
-+ ((PIPE OS) (IDOC MOVE))
-+ (.str insn " $"op2 ",$"op1)
-+ (+ opc1 opc2 op1 op2)
-+ (sequence ()
-+ (if QI (and QI op1 (const 128))
-+ (set HI op2 (or HI (const HI 65280) op1)))
-+ (set HI op2 (and HI (const HI 255) op1))
-+ )
-+ ()
-+ )
-+)
-+(moveb1 movrbs movbs OP1_13 OP2_0 drb sr )
-+(moveb1 movrbz movbz OP1_12 OP2_0 drb sr )
-+
-+
-+
-+;jump and call insns
-+;******************************************************************
-+;Absolute conditional jump
-+(define-pmacro (jmpabs name insn)
-+ (dni name
-+ (.str name "Absolute conditional jump" )
-+ ((PIPE OS) (IDOC JMP))
-+ (.str insn " $extcond,$caddr")
-+ (+ OP1_14 OP2_10 extcond (f-op-bitone 0) bitone bit01 caddr)
-+ (sequence ((HI tmp1) (HI tmp2))
-+ (set tmp1 (mem HI caddr))
-+ (set tmp2 (sub HI pc (mem HI caddr)))
-+ (if (gt tmp2 (const 0)) (lt tmp2 (const 32)) (eq tmp2 (const 32))
-+ (set bitone (const 1)))
-+ (if (lt tmp2 (const 0)) (eq tmp2 (const 0)) (gt tmp2 (const 32))
-+ (set bitone (const 0)))
-+ (if (eq extcond (const 1) (ne extcond cc_Z))
-+ (set bit01 (const 0))
-+ (set HI pc (mem HI caddr)))
-+ (if (ne extcond (const 1) (eq extcond cc_Z))
-+ (set bit01 (const 1))
-+ (set HI pc (add HI pc (const 2))))
-+ )
-+ ()
-+ )
-+)
-+
-+(jmpabs jmpa0 jmpa+)
-+(jmpabs jmpa1 jmpa)
-+
-+; JMPA- cc,caddr
-+(dni jmpa- "Absolute conditional jump"
-+ (COND-CTI (PIPE OS) (IDOC JMP))
-+ "jmpa- $extcond,$caddr"
-+ (+ OP1_14 OP2_10 extcond (f-op-bitone 0) bitone (f-op-1bit 1) caddr)
-+ (sequence ((HI tmp1) (HI tmp2))
-+ (set tmp1 (mem HI caddr))
-+ (set tmp2 (sub HI pc (mem HI caddr)))
-+ (if (gt tmp2 (const 0)) (lt tmp2 (const 32)) (eq tmp2 (const 32))
-+ (set bitone (const 1)))
-+ (if (lt tmp2 (const 0)) (eq tmp2 (const 0)) (gt tmp2 (const 32))
-+ (set bitone (const 0)))
-+ (set HI pc (add HI pc (const 2)))
-+ )
-+ ()
-+)
-+
-+; JMPI cc,[Rwn]
-+(dni jmpi "Indirect conditional jump"
-+ (COND-CTI (PIPE OS) (IDOC JMP))
-+ "jmpi $icond,[$sr]"
-+ (+ OP1_9 OP2_12 icond sr)
-+ (sequence ()
-+ (if (eq icond (const 1))
-+ (set HI pc (mem HI sr)))
-+ (set HI pc (add HI pc (const 2)))
-+ )
-+ ()
-+)
-+
-+(define-pmacro (jmprel name insn opc1)
-+ (dni name
-+ (.str name "conditional" )
-+ (COND-CTI (PIPE OS) (IDOC JMP))
-+ (.str insn " $cond,$rel")
-+ (+ opc1 OP2_13 rel)
-+ (sequence ()
-+ (if (eq cond (const 1))
-+ (sequence ()
-+ (if QI (lt QI rel (const 0))
-+ (sequence ()
-+ (neg QI rel)
-+ (add QI rel (const 1))
-+ (mul QI rel (const 2))
-+ (set HI pc (sub HI pc rel))
-+ ))
-+ (set HI pc (add HI pc (mul QI rel (const 2))))
-+ )
-+ )
-+ (set HI pc pc)
-+ )
-+ ()
-+ )
-+)
-+
-+(jmprel jmpr_nenz jmpr COND_NE_NZ )
-+(jmprel jmpr_sgt jmpr COND_SGT )
-+(jmprel jmpr_z jmpr COND_Z )
-+(jmprel jmpr_v jmpr COND_V )
-+(jmprel jmpr_nv jmpr COND_NV )
-+(jmprel jmpr_n jmpr COND_N )
-+(jmprel jmpr_nn jmpr COND_NN )
-+(jmprel jmpr_c jmpr COND_C )
-+(jmprel jmpr_nc jmpr COND_NC )
-+(jmprel jmpr_eq jmpr COND_EQ )
-+(jmprel jmpr_ne jmpr COND_NE )
-+(jmprel jmpr_ult jmpr COND_ULT )
-+(jmprel jmpr_ule jmpr COND_ULE )
-+(jmprel jmpr_uge jmpr COND_UGE )
-+(jmprel jmpr_ugt jmpr COND_UGT )
-+(jmprel jmpr_sle jmpr COND_SLE )
-+(jmprel jmpr_sge jmpr COND_SGE )
-+(jmprel jmpr_net jmpr COND_NET )
-+(jmprel jmpr_uc jmpr COND_UC )
-+(jmprel jmpr_slt jmpr COND_SLT )
-+
-+
-+
-+
-+; JMPS seg,caddr
-+(dni jmpseg "absolute inter-segment jump"
-+ (UNCOND-CTI(PIPE OS) (IDOC JMP))
-+ "jmps $hash$segm$useg8,$hash$sof$usof16"
-+ (+ OP1_15 OP2_10 seg usof16)
-+ (sequence ()
-+ (if QI (eq BI sgtdisbit (const BI 0))
-+ (set QI (reg h-cr 10) useg8))
-+ (nop)
-+ (set HI pc usof16)
-+ )
-+ ()
-+)
-+
-+; JMPS seg,caddr
-+(dni jmps "absolute inter-segment jump"
-+ (UNCOND-CTI(PIPE OS) (IDOC JMP))
-+ "jmps $seg,$caddr"
-+ (+ OP1_15 OP2_10 seg caddr)
-+ (sequence ()
-+ (if QI (eq BI sgtdisbit (const BI 0))
-+ (set QI (reg h-cr 10) seg))
-+ (nop)
-+ (set HI pc caddr)
-+ )
-+ ()
-+)
-+
-+
-+;relative jump if bit set
-+;JB bitaddrQ.q,rel
-+(dni jb "relative jump if bit set"
-+ ((PIPE OS) (IDOC JMP))
-+ "jb $genreg$dot$qlobit,$relhi"
-+ (+ OP1_8 OP2_10 genreg relhi qlobit (f-qhibit 0))
-+ (sequence ((HI tmp1) (HI tmp2))
-+ (set HI tmp1 genreg)
-+ (set HI tmp2 (const 1))
-+ (sll HI tmp2 qlobit)
-+ (set HI tmp2 (and tmp1 tmp2))
-+ (if (eq tmp2 (const 1))
-+ (sequence ()
-+ (if QI (lt QI relhi (const 0))
-+ (set HI pc (add HI pc (mul QI relhi (const 2)))))
-+ ))
-+ (set HI pc (add HI pc (const 4)))
-+ )
-+ ()
-+)
-+
-+;relative jump if bit set and clear bit
-+;JBC bitaddrQ.q,rel
-+(dni jbc "relative jump if bit set and clear bit"
-+ ((PIPE OS) (IDOC JMP))
-+ "jbc $genreg$dot$qlobit,$relhi"
-+ (+ OP1_10 OP2_10 genreg relhi qlobit (f-qhibit 0))
-+ (sequence ((HI tmp1) (HI tmp2))
-+ (set HI tmp1 genreg)
-+ (set HI tmp2 (const 1))
-+ (sll HI tmp2 qlobit)
-+ (set HI tmp2 (and tmp1 tmp2))
-+ (if (eq tmp2 (const 1))
-+ (sequence ()
-+ (if QI (lt QI relhi (const 0))
-+ (set tmp2 (const 1))
-+ (set tmp1 genreg)
-+ (sll tmp2 qlobit)
-+ (inv tmp2)
-+ (set HI tmp1(and tmp1 tmp2))
-+ (set HI genreg tmp1)
-+ (set HI pc (add HI pc (mul QI relhi (const 2)))))
-+ ))
-+ (set HI pc (add HI pc (const 4)))
-+ )
-+ ()
-+)
-+
-+;relative jump if bit set
-+;JNB bitaddrQ.q,rel
-+(dni jnb "relative jump if bit not set"
-+ ((PIPE OS) (IDOC JMP))
-+ "jnb $genreg$dot$qlobit,$relhi"
-+ (+ OP1_9 OP2_10 genreg relhi qlobit (f-qhibit 0))
-+ (sequence ((HI tmp1) (HI tmp2))
-+ (set HI tmp1 genreg)
-+ (set HI tmp2 (const 1))
-+ (sll HI tmp2 qlobit)
-+ (set HI tmp2 (and tmp1 tmp2))
-+ (if (eq tmp2 (const 0))
-+ (sequence ()
-+ (if QI (lt QI relhi (const 0))
-+ (set HI pc (add HI pc (mul QI relhi (const 2)))))
-+ ))
-+ (set HI pc (add HI pc (const 4)))
-+ )
-+ ()
-+)
-+
-+;relative jump if bit not set and set bit
-+;JNBS bitaddrQ.q,rel
-+(dni jnbs "relative jump if bit not set and set bit"
-+ ((PIPE OS) (IDOC JMP))
-+ "jnbs $genreg$dot$qlobit,$relhi"
-+ (+ OP1_11 OP2_10 genreg relhi qlobit (f-qhibit 0))
-+ (sequence ((HI tmp1) (HI tmp2))
-+ (set HI tmp1 genreg)
-+ (set HI tmp2 (const 1))
-+ (sll HI tmp2 qlobit)
-+ (set HI tmp2 (and tmp1 tmp2))
-+ (if (eq tmp2 (const 0))
-+ (sequence ()
-+ (if QI (lt QI relhi (const 0))
-+ (set tmp2 (const 1))
-+ (set tmp1 reg8)
-+ (sll tmp2 qbit)
-+ (set BI tmp1(or tmp1 tmp2))
-+ (set HI reg8 tmp1)
-+ (set HI pc (add HI pc (mul QI relhi (const 2)))))
-+ ))
-+ (set HI pc (add HI pc (const 4)))
-+ )
-+ ()
-+)
-+
-+
-+;Absolute conditional call
-+(define-pmacro (callabs name insn)
-+ (dni name
-+ (.str name "Absolute conditional call" )
-+ ((PIPE OS) (IDOC JMP))
-+ (.str insn " $extcond,$caddr")
-+ (+ OP1_12 OP2_10 extcond (f-op-2bit 0) bit01 caddr)
-+ (sequence ()
-+ (if (eq extcond (const 1))
-+ (set bit01 (const 0))
-+ (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2)))
-+ (set HI (mem HI (reg h-cr 9)) pc)
-+ (set HI pc (mem HI caddr)))
-+ (if (ne extcond (const 1))
-+ (set bit01 (const 1))
-+ (set HI pc (add HI pc (const 2))))
-+ )
-+ ()
-+ )
-+)
-+
-+(callabs calla0 calla+)
-+(callabs calla1 calla)
-+
-+; CALLA- cc,caddr
-+(dni calla- "Absolute conditional call"
-+ (COND-CTI (PIPE OS) (IDOC JMP))
-+ "calla- $extcond,$caddr"
-+ (+ OP1_12 OP2_10 extcond (f-op-bit3 1) caddr)
-+ (sequence ()
-+ (if (eq extcond (const 1))
-+ (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2)))
-+ (set HI (mem HI (reg h-cr 9)) pc)
-+ (set HI pc (mem HI caddr)))
-+ (set HI pc (add HI pc (const 2)))
-+ )
-+ ()
-+)
-+
-+; CALLI cc,[Rwn]
-+(dni calli "indirect subroutine call"
-+ (COND-CTI (PIPE OS) (IDOC JMP))
-+ "calli $icond,[$sr]"
-+ (+ OP1_10 OP2_11 icond sr)
-+ (sequence ()
-+ (if (eq icond (const 1))
-+ (sequence ()
-+ (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2)))
-+ (set HI (mem HI (reg h-cr 9)) pc)
-+ (set HI pc (mem HI sr))
-+ )
-+ )
-+ (set HI pc (add HI pc (const 2)))
-+ )
-+ ()
-+)
-+
-+; CALLR rel
-+(dni callr "Call subroutine with PC relative signed 8 bit offset"
-+ ( COND-CTI (PIPE OS) (IDOC JMP))
-+ "callr $rel"
-+ (+ OP1_11 OP2_11 rel)
-+ (sequence ()
-+ (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2)))
-+ (set HI (mem HI (reg h-cr 9)) pc)
-+ (sequence ()
-+ (if QI (lt QI rel (const 0))
-+ (sequence ()
-+ (neg QI rel)
-+ (add QI rel (const 1))
-+ (mul QI rel (const 2))
-+ (set HI pc (sub HI pc rel))
-+ ))
-+ (set HI pc (add HI pc (mul QI rel (const 2))))
-+ )
-+ )
-+ ()
-+)
-+
-+
-+; CALLS seg,caddr
-+(dni callseg "call inter-segment subroutine"
-+ (UNCOND-CTI (PIPE OS) (IDOC JMP))
-+ "calls $hash$segm$useg8,$hash$sof$usof16"
-+ (+ OP1_13 OP2_10 useg8 usof16)
-+ (sequence ()
-+ (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2)))
-+ (set HI (mem HI (reg h-cr 9)) (reg h-cr 10))
-+ (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2)))
-+ (set HI (mem HI (reg h-cr 9)) pc)
-+ (if QI (eq BI sgtdisbit (const BI 0))
-+ (set QI (reg h-cr 10) useg8))
-+ (nop)
-+ (set HI pc usof16)
-+ )
-+ ()
-+)
-+
-+; CALLS seg,caddr
-+(dni calls "call inter-segment subroutine"
-+ (UNCOND-CTI (PIPE OS) (IDOC JMP))
-+ "calls $seg,$caddr"
-+ (+ OP1_13 OP2_10 seg caddr)
-+ (sequence ()
-+ (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2)))
-+ (set HI (mem HI (reg h-cr 9)) (reg h-cr 10))
-+ (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2)))
-+ (set HI (mem HI (reg h-cr 9)) pc)
-+ (if QI (eq BI sgtdisbit (const BI 0))
-+ (set QI (reg h-cr 10) seg))
-+ (nop)
-+ (set HI pc caddr)
-+ )
-+ ()
-+)
-+
-+; PCALL reg,caddr
-+(dni pcall "push word and call absolute subroutine"
-+ (UNCOND-CTI (PIPE OS) (IDOC JMP))
-+ "pcall $reg8,$caddr"
-+ (+ OP1_14 OP2_2 reg8 caddr)
-+ (sequence ((HI tmp1))
-+ (set HI tmp1 reg8)
-+ (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2)))
-+ (set HI (mem HI (reg h-cr 9)) tmp1)
-+ (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2)))
-+ (set HI (mem HI (reg h-cr 9)) pc)
-+ (set HI pc caddr)
-+ )
-+ ()
-+)
-+
-+; TRAP #uimm7
-+(dni trap "software trap"
-+ (UNCOND-CTI (PIPE OS) (IDOC JMP))
-+ "trap $hash$uimm7"
-+ (+ OP1_9 OP2_11 uimm7 (f-op-1bit 0))
-+ (sequence ()
-+ (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2)))
-+ (set HI (mem HI (reg h-cr 9)) (reg h-cr 4))
-+ (if QI (eq BI sgtdisbit (const BI 0))
-+ (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2)))
-+ (set HI (mem HI (reg h-cr 9)) (reg h-cr 10) )
-+ )
-+ (nop)
-+ (set HI (reg h-cr 10) (reg h-cr 11))
-+ (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2)))
-+ (set HI (mem HI (reg h-cr 9)) pc)
-+ (set HI pc (mul QI uimm7 (const 4)))
-+ )
-+ ()
-+)
-+
-+;Return insns
-+; RET
-+(dni ret "return from subroutine"
-+ (UNCOND-CTI (PIPE OS) (IDOC JMP))
-+ "ret"
-+ (+ OP1_12 OP2_11 (f-op-bit8 0))
-+ (sequence ()
-+ (set HI pc (mem HI (reg h-cr 9)))
-+ (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2)))
-+ )
-+ ()
-+)
-+
-+; RETS
-+(dni rets "return from inter-segment sunroutine"
-+ (UNCOND-CTI (PIPE OS) (IDOC JMP))
-+ "rets"
-+ (+ OP1_13 OP2_11 (f-op-bit8 0))
-+ (sequence ()
-+ (set HI pc (mem HI (reg h-cr 9)))
-+ (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2)))
-+ (if QI (eq BI sgtdisbit (const BI 0))
-+ (set HI (reg h-cr 10) (mem HI (reg h-cr 9)))
-+ )
-+ (nop)
-+ (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2)))
-+ )
-+ ()
-+)
-+
-+; RETP reg
-+(dni retp "return from subroutine and pop word register"
-+ (UNCOND-CTI (PIPE OS) (IDOC JMP))
-+ "retp $reg8"
-+ (+ OP1_14 OP2_11 reg8)
-+ (sequence ((HI tmp1))
-+ (set HI pc (mem HI (reg h-cr 9)))
-+ (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2)))
-+ (set HI tmp1 (mem HI (reg h-cr 9)))
-+ (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2)))
-+ (set HI reg8 tmp1)
-+ )
-+ ()
-+)
-+
-+; RETI
-+(dni reti "return from ISR"
-+ (UNCOND-CTI (PIPE OS) (IDOC JMP))
-+ "reti"
-+ (+ OP1_15 OP2_11 (f-op-lbit4 8) (f-op-bit4 8))
-+ (sequence ()
-+ (set HI pc (mem HI (reg h-cr 9)))
-+ (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2)))
-+ (if QI (eq BI sgtdisbit (const BI 0))
-+ (sequence ()
-+ (set HI (reg h-cr 10) (mem HI (reg h-cr 9)))
-+ (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2)))
-+ )
-+ )
-+ (nop)
-+ (set HI (reg h-cr 4) (mem HI (reg h-cr 9)))
-+ (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2)))
-+ )
-+ ()
-+)
-+
-+;stack operation insn
-+;******************************************************************
-+; POP reg
-+(dni pop "restore register from system stack"
-+ ((PIPE OS) (IDOC MISC))
-+ "pop $reg8"
-+ (+ OP1_15 OP2_12 reg8)
-+ (sequence ((HI tmp1))
-+ (set HI tmp1 (mem HI (reg h-cr 9)))
-+ (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2)))
-+ (set HI reg8 tmp1)
-+ )
-+ ()
-+)
-+
-+; PUSH reg
-+(dni push "save register on system stack"
-+ ((PIPE OS) (IDOC MISC))
-+ "push $reg8"
-+ (+ OP1_14 OP2_12 reg8)
-+ (sequence ((HI tmp1))
-+ (set HI tmp1 reg8)
-+ (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2)))
-+ (set HI (mem HI (reg h-cr 9)) tmp1)
-+ )
-+ ()
-+)
-+
-+;context switching insns
-+; SCXT reg,#data16
-+(dni scxti "Push word register on stack and update same with immediate data"
-+ ((PIPE OS) (IDOC MISC))
-+ "scxt $reg8,$hash$uimm16"
-+ (+ OP1_12 OP2_6 reg8 uimm16)
-+ (sequence ((HI tmp1) (HI tmp2))
-+ (set HI tmp1 reg8)
-+ (set HI tmp2 uimm16)
-+ (sub HI (reg HI h-cr 9) (const 2))
-+ (set HI (reg HI h-cr 9) tmp1)
-+ (set HI reg8 tmp2)
-+ )
-+ ()
-+)
-+
-+; SCXT reg,POF mem
-+(dni scxtrpofm "mov memory to byte register"
-+ ((PIPE OS) (IDOC MOVE))
-+ "scxt $reg8,$pof$upof16"
-+ (+ OP1_13 OP2_6 reg8 upof16)
-+ (set QI reg8 (mem HI upof16))
-+ ()
-+)
-+
-+; SCXT regmem8,memgr8
-+(dni scxtmg "Push word register on stack and update same with direct memory"
-+ ((PIPE OS) (IDOC MISC))
-+ "scxt $regmem8,$memgr8"
-+ (+ OP1_13 OP2_6 regmem8 memgr8)
-+ (sequence ((HI tmp1) (HI tmp2))
-+ (set HI tmp1 regmem8)
-+ (set HI tmp2 memgr8)
-+ (sub HI (reg HI h-cr 9) (const 2))
-+ (set HI (reg HI h-cr 9) tmp1)
-+ (set HI regmem8 tmp2)
-+ )
-+ ()
-+)
-+
-+; SCXT reg,mem
-+(dni scxtm "Push word register on stack and update same with direct memory"
-+ ((PIPE OS) (IDOC MISC))
-+ "scxt $reg8,$memory"
-+ (+ OP1_13 OP2_6 reg8 memory)
-+ (sequence ((HI tmp1) (HI tmp2))
-+ (set HI tmp1 reg8)
-+ (set HI tmp2 memory)
-+ (sub HI (reg HI h-cr 9) (const 2))
-+ (set HI (reg HI h-cr 9) tmp1)
-+ (set HI reg8 tmp2)
-+ )
-+ ()
-+)
-+
-+;No operation
-+; NOP
-+(dni nop "nop"
-+ ((PIPE OS) (IDOC MISC))
-+ "nop"
-+ (+ OP1_12 OP2_12 (f-op-bit8 0))
-+ ()
-+ ()
-+)
-+
-+;*********system control instructions *********************/
-+
-+(define-pmacro (sysctrl name insn opc1 opc2 op1 op2 op3)
-+ (dni name
-+ (.str name "miscellaneous" )
-+ ((PIPE OS) (IDOC MISC))
-+ (.str insn )
-+ (+ opc1 opc2 (f-op-lbit4 op1) (f-op-bit4 op2) (f-data8 op3) (f-op-bit8 op3))
-+ ()
-+ ()
-+ )
-+)
-+(sysctrl srstm srst OP1_11 OP2_7 4 8 183 )
-+(sysctrl idlem idle OP1_8 OP2_7 7 8 135)
-+(sysctrl pwrdnm pwrdn OP1_9 OP2_7 6 8 151)
-+(sysctrl diswdtm diswdt OP1_10 OP2_5 5 10 165)
-+(sysctrl enwdtm enwdt OP1_8 OP2_5 7 10 133)
-+(sysctrl einitm einit OP1_11 OP2_5 4 10 181)
-+(sysctrl srvwdtm srvwdt OP1_10 OP2_7 5 8 167 )
-+
-+;s/w brk
-+; SBRK
-+(dni sbrk "sbrk"
-+ ((PIPE OS) (IDOC MISC))
-+ "sbrk"
-+ (+ OP1_8 OP2_12 (f-op-bit8 0))
-+ ()
-+ ()
-+)
-+
-+; atomic sequence
-+; ATOMIC #irang2
-+(dni atomic "begin atomic sequence"
-+ ((PIPE OS) (IDOC SYSC))
-+ "atomic $hash$uimm2"
-+ (+ OP1_13 OP2_1 (f-op-lbit2 0) uimm2 (f-op-bit4 0))
-+ (sequence ((HI count))
-+ (set HI count uimm2)
-+ (cond HI
-+ ((ne HI count (const 0))
-+ (sequence ()
-+ (set HI pc (add HI pc (const 2)))
-+ (set HI count (sub HI count (const 1)))
-+ ))
-+ )
-+ (set HI count (const 0))
-+ )
-+ ()
-+)
-+
-+;extended register sequence
-+; EXTR #irang2
-+(dni extr "begin extended register sequence"
-+ ((PIPE OS) (IDOC SYSC))
-+ "extr $hash$uimm2"
-+ (+ OP1_13 OP2_1 (f-op-lbit2 2) uimm2 (f-op-bit4 0))
-+ (sequence ((HI count))
-+ (set HI count uimm2)
-+ (cond HI
-+ ((ne HI count (const 0))
-+ (sequence ()
-+ (set HI pc (add HI pc (const 2)))
-+ (set HI count (sub HI count (const 1)))
-+ ))
-+ )
-+ (set HI count (const 0))
-+ )
-+ ()
-+)
-+
-+;extended page sequence
-+; EXTP Rw,#irang2
-+(dni extp "begin extended page sequence"
-+ ((PIPE OS) (IDOC SYSC))
-+ "extp $sr,$hash$uimm2"
-+ (+ OP1_13 OP2_12 (f-op-lbit2 1) uimm2 sr)
-+ (sequence ((HI count))
-+ (set HI count uimm2)
-+ (cond HI
-+ ((ne HI count (const 0))
-+ (sequence ()
-+ (set HI pc (add HI pc (const 2)))
-+ (set HI count (sub HI count (const 1)))
-+ ))
-+ )
-+ (set HI count (const 0))
-+ )
-+ ()
-+)
-+
-+;extended page sequence
-+; EXTP #pag10,#irang2
-+(dni extp1 "begin extended page sequence"
-+ ((PIPE OS) (IDOC SYSC))
-+ "extp $hash$pagenum,$hash$uimm2"
-+ (+ OP1_13 OP2_7 (f-op-lbit2 1) uimm2 (f-op-bit4 0) pagenum (f-qlobit 0) (f-qlobit2 0))
-+ (sequence ((HI count))
-+ (set HI count uimm2)
-+ (cond HI
-+ ((ne HI count (const 0))
-+ (sequence ()
-+ (set HI pc (add HI pc (const 2)))
-+ (set HI count (sub HI count (const 1)))
-+ ))
-+ )
-+ (set HI count (const 0))
-+ )
-+ ()
-+)
-+
-+; EXTP #pag10,#irang2
-+(dni extpg1 "begin extended page sequence"
-+ ((PIPE OS) (IDOC SYSC))
-+ "extp $hash$pag$upag16,$hash$uimm2"
-+ (+ OP1_13 OP2_7 (f-op-lbit2 1) uimm2 (f-op-bit4 0) upag16 )
-+ (sequence ((HI count))
-+ (set HI count uimm2)
-+ (cond HI
-+ ((ne HI count (const 0))
-+ (sequence ()
-+ (set HI pc (add HI pc (const 2)))
-+ (set HI count (sub HI count (const 1)))
-+ ))
-+ )
-+ (set HI count (const 0))
-+ )
-+ ()
-+)
-+
-+;extended page and register sequence
-+; EXTPR Rw,#irang2
-+(dni extpr "begin extended page and register sequence"
-+ ((PIPE OS) (IDOC SYSC))
-+ "extpr $sr,$hash$uimm2"
-+ (+ OP1_13 OP2_12 (f-op-lbit2 3) uimm2 sr)
-+ (sequence ((HI count))
-+ (set HI count uimm2)
-+ (cond HI
-+ ((ne HI count (const 0))
-+ (sequence ()
-+ (set HI pc (add HI pc (const 2)))
-+ (set HI count (sub HI count (const 1)))
-+ ))
-+ )
-+ (set HI count (const 0))
-+ )
-+ ()
-+)
-+
-+;extended page and register sequence
-+; EXTPR #pag10,#irang2
-+(dni extpr1 "begin extended page sequence"
-+ ((PIPE OS) (IDOC SYSC))
-+ "extpr $hash$pagenum,$hash$uimm2"
-+ (+ OP1_13 OP2_7 (f-op-lbit2 3) uimm2 (f-op-bit4 0) pagenum (f-qlobit 0) (f-qlobit2 0))
-+ (sequence ((HI count))
-+ (set HI count uimm2)
-+ (cond HI
-+ ((ne HI count (const 0))
-+ (sequence ()
-+ (set HI pc (add HI pc (const 2)))
-+ (set HI count (sub HI count (const 1)))
-+ ))
-+ )
-+ (set HI count (const 0))
-+ )
-+ ()
-+)
-+
-+;extended segment sequence
-+; EXTS Rw,#irang2
-+(dni exts "begin extended segment sequence"
-+ ((PIPE OS) (IDOC SYSC))
-+ "exts $sr,$hash$uimm2"
-+ (+ OP1_13 OP2_12 (f-op-lbit2 0) uimm2 sr)
-+ (sequence ((HI count))
-+ (set HI count uimm2)
-+ (cond HI
-+ ((ne HI count (const 0))
-+ (sequence ()
-+ (set HI pc (add HI pc (const 2)))
-+ (set HI count (sub HI count (const 1)))
-+ ))
-+ )
-+ (set HI count (const 0))
-+ )
-+ ()
-+)
-+
-+;extended segment sequence
-+; EXTS #seg8,#irang2
-+(dni exts1 "begin extended segment sequence"
-+ ((PIPE OS) (IDOC SYSC))
-+ "exts $hash$seghi8,$hash$uimm2"
-+ (+ OP1_13 OP2_7 (f-op-lbit2 0) uimm2 (f-op-bit4 0) seghi8 (f-op-bit8 0))
-+ (sequence ((HI count))
-+ (set HI count uimm2)
-+ (cond HI
-+ ((ne HI count (const 0))
-+ (sequence ()
-+ (set HI pc (add HI pc (const 2)))
-+ (set HI count (sub HI count (const 1)))
-+ ))
-+ )
-+ (set HI count (const 0))
-+ )
-+ ()
-+)
-+
-+;extended segment register sequence
-+; EXTSR Rwm,#irang2
-+(dni extsr "begin extended segment and register sequence"
-+ ((PIPE OS) (IDOC SYSC))
-+ "extsr $sr,$hash$uimm2"
-+ (+ OP1_13 OP2_12 (f-op-lbit2 2) uimm2 sr)
-+ (sequence ((HI count))
-+ (set HI count uimm2)
-+ (cond HI
-+ ((ne HI count (const 0))
-+ (sequence ()
-+ (set HI pc (add HI pc (const 2)))
-+ (set HI count (sub HI count (const 1)))
-+ ))
-+ )
-+ (set HI count (const 0))
-+ )
-+ ()
-+)
-+
-+;extended segment register sequence
-+; EXTSR #pag10,#irang2
-+(dni extsr1 "begin extended segment and register sequence"
-+ ((PIPE OS) (IDOC SYSC))
-+ "extsr $hash$seghi8,$hash$uimm2"
-+ (+ OP1_13 OP2_7 (f-op-lbit2 2) uimm2 (f-op-bit4 0) seghi8 (f-op-bit8 0))
-+ (sequence ((HI count))
-+ (set HI count uimm2)
-+ (cond HI
-+ ((ne HI count (const 0))
-+ (sequence ()
-+ (set HI pc (add HI pc (const 2)))
-+ (set HI count (sub HI count (const 1)))
-+ ))
-+ )
-+ (set HI count (const 0))
-+ )
-+ ()
-+)
-+
-+;prioritize register
-+;PRIOR Rwn,Rwm
-+(dni prior "add registers"
-+ ((PIPE OS) (IDOC ALU))
-+ "prior $dr,$sr"
-+ (+ OP1_2 OP2_11 dr sr)
-+ (sequence ((HI count) (HI tmp1) (HI tmp2))
-+ (set HI count (const 0))
-+ (set HI tmp1 sr)
-+ (set HI tmp2 (and tmp1 (const 32768)))
-+ (cond HI
-+ ((ne HI tmp2 (const 1)) (ne HI sr (const 0))
-+ (sll HI tmp1 (const 1))
-+ (set HI tmp2 (and tmp1 (const 32768)))
-+ (set HI count (add HI count (const 1)))
-+ )
-+ )
-+ (set HI dr count)
-+ )
-+ ()
-+)
-+
-+
-+;bit instructions
-+;******************************************************************
-+;bit clear
-+(define-pmacro (bclear name insn opc1)
-+ (dni name
-+ (.str name "bit clear" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $reg8$dot$qbit")
-+ (+ opc1 OP2_14 reg8)
-+ (sequence ((HI tmp1) (HI tmp2))
-+ (set tmp2 (const 1))
-+ (set tmp1 reg8)
-+ (sll tmp2 qbit)
-+ (inv tmp2)
-+ (set BI tmp1(and tmp1 tmp2))
-+ (set HI reg8 tmp1))
-+ ()
-+ )
-+)
-+
-+;clear direct bit
-+(dni bclr18 "bit logical MOVN"
-+ ((PIPE OS) (IDOC ALU))
-+ "bclr $RegNam"
-+ (+ OP1_11 OP2_14 RegNam)
-+ (sequence ((HI tmp1) (HI tmp2))
-+ (set tmp2 (const 1))
-+ (set tmp1 reg8)
-+ (sll tmp2 qbit)
-+ (inv tmp2)
-+ (set BI tmp1(and tmp1 tmp2))
-+ (set HI reg8 tmp1))
-+ ()
-+)
-+
-+
-+(bclear bclr0 bclr QBIT_0 )
-+(bclear bclr1 bclr QBIT_1 )
-+(bclear bclr2 bclr QBIT_2 )
-+(bclear bclr3 bclr QBIT_3 )
-+(bclear bclr4 bclr QBIT_4 )
-+(bclear bclr5 bclr QBIT_5 )
-+(bclear bclr6 bclr QBIT_6 )
-+(bclear bclr7 bclr QBIT_7 )
-+(bclear bclr8 bclr QBIT_8 )
-+(bclear bclr9 bclr QBIT_9 )
-+(bclear bclr10 bclr QBIT_10 )
-+(bclear bclr11 bclr QBIT_11 )
-+(bclear bclr12 bclr QBIT_12 )
-+(bclear bclr13 bclr QBIT_13 )
-+(bclear bclr14 bclr QBIT_14 )
-+(bclear bclr15 bclr QBIT_15 )
-+
-+;set direct bit
-+(dni bset19 "bit logical MOVN"
-+ ((PIPE OS) (IDOC ALU))
-+ "bset $RegNam"
-+ (+ OP1_11 OP2_15 RegNam)
-+ (sequence ((HI tmp1) (HI tmp2))
-+ (set tmp2 (const 1))
-+ (set tmp1 reg8)
-+ (sll tmp2 qbit)
-+ (set BI tmp1(or tmp1 tmp2))
-+ (set HI reg8 tmp1))
-+ ()
-+)
-+
-+;bit set
-+(define-pmacro (bitset name insn opc1)
-+ (dni name
-+ (.str name "bit set" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $reg8$dot$qbit")
-+ (+ opc1 OP2_15 reg8)
-+ (sequence ((HI tmp1) (HI tmp2))
-+ (set tmp2 (const 1))
-+ (set tmp1 reg8)
-+ (sll tmp2 qbit)
-+ (set BI tmp1(or tmp1 tmp2))
-+ (set HI reg8 tmp1))
-+ ()
-+ )
-+)
-+
-+
-+(bitset bset0 bset QBIT_0 )
-+(bitset bset1 bset QBIT_1 )
-+(bitset bset2 bset QBIT_2 )
-+(bitset bset3 bset QBIT_3 )
-+(bitset bset4 bset QBIT_4 )
-+(bitset bset5 bset QBIT_5 )
-+(bitset bset6 bset QBIT_6 )
-+(bitset bset7 bset QBIT_7 )
-+(bitset bset8 bset QBIT_8 )
-+(bitset bset9 bset QBIT_9 )
-+(bitset bset10 bset QBIT_10 )
-+(bitset bset11 bset QBIT_11 )
-+(bitset bset12 bset QBIT_12 )
-+(bitset bset13 bset QBIT_13 )
-+(bitset bset14 bset QBIT_14 )
-+(bitset bset15 bset QBIT_15 )
-+
-+;mov direct bit
-+;BMOV bitaddrZ.z,bitaddrQ.q
-+(dni bmov "bit logical MOV"
-+ ((PIPE OS) (IDOC ALU))
-+ "bmov $reghi8$dot$qhibit,$reg8$dot$qlobit"
-+ (+ OP1_4 OP2_10 reg8 reghi8 qhibit qlobit)
-+ (sequence ((HI tmp1) (HI tmp2) (HI tmp3) (HI tmp4))
-+ (set HI tmp1 reghi8)
-+ (set HI tmp2 reg8)
-+ (set tmp3 (const 1))
-+ (set tmp4 (const 1))
-+ (sll tmp3 qlobit)
-+ (sll tmp4 qhibit)
-+ (and tmp1 tmp3)
-+ (and tmp2 tmp4)
-+ (set BI tmp1 tmp2)
-+ (set HI reghi8 tmp1)
-+ (set HI reg8 tmp2))
-+ ()
-+)
-+
-+;movn direct bit
-+;BMOVN bitaddrZ.z,bitaddrQ.q
-+(dni bmovn "bit logical MOVN"
-+ ((PIPE OS) (IDOC ALU))
-+ "bmovn $reghi8$dot$qhibit,$reg8$dot$qlobit"
-+ (+ OP1_3 OP2_10 reg8 reghi8 qhibit qlobit)
-+ (sequence ((HI tmp1) (HI tmp2) (HI tmp3) (HI tmp4))
-+ (set HI tmp1 reghi8)
-+ (set HI tmp2 reg8)
-+ (set tmp3 (const 1))
-+ (set tmp4 (const 1))
-+ (sll tmp3 qlobit)
-+ (sll tmp4 qhibit)
-+ (and tmp1 tmp3)
-+ (and tmp2 tmp4)
-+ (inv HI tmp2)
-+ (set BI tmp1 tmp2)
-+ (set HI reghi8 tmp1)
-+ (set HI reg8 tmp2))
-+ ()
-+)
-+
-+;and direct bit
-+;BAND bitaddrZ.z,bitaddrQ.q
-+(dni band "bit logical AND"
-+ ((PIPE OS) (IDOC ALU))
-+ "band $reghi8$dot$qhibit,$reg8$dot$qlobit"
-+ (+ OP1_6 OP2_10 reg8 reghi8 qhibit qlobit)
-+ (sequence ((HI tmp1) (HI tmp2) (HI tmp3) (HI tmp4))
-+ (set HI tmp1 reghi8)
-+ (set HI tmp2 reg8)
-+ (set tmp3 (const 1))
-+ (set tmp4 (const 1))
-+ (sll tmp3 qlobit)
-+ (sll tmp4 qhibit)
-+ (and tmp1 tmp3)
-+ (and tmp2 tmp4)
-+ (set BI tmp1(and tmp1 tmp2))
-+ (set HI reghi8 tmp1)
-+ (set HI reg8 tmp2))
-+ ()
-+)
-+
-+;or direct bit
-+;BOR bitaddrZ.z,bitaddrQ.q
-+(dni bor "bit logical OR"
-+ ((PIPE OS) (IDOC ALU))
-+ "bor $reghi8$dot$qhibit,$reg8$dot$qlobit"
-+ (+ OP1_5 OP2_10 reg8 reghi8 qhibit qlobit)
-+ (sequence ((HI tmp1) (HI tmp2) (HI tmp3) (HI tmp4))
-+ (set HI tmp1 reghi8)
-+ (set HI tmp2 reg8)
-+ (set tmp3 (const 1))
-+ (set tmp4 (const 1))
-+ (sll tmp3 qlobit)
-+ (sll tmp4 qhibit)
-+ (and tmp1 tmp3)
-+ (and tmp2 tmp4)
-+ (set BI tmp1(or tmp1 tmp2))
-+ (set HI reghi8 tmp1)
-+ (set HI reg8 tmp2))
-+ ()
-+)
-+
-+;xor direct bit
-+;BXOR bitaddrZ.z,bitaddrQ.q
-+(dni bxor "bit logical XOR"
-+ ((PIPE OS) (IDOC ALU))
-+ "bxor $reghi8$dot$qhibit,$reg8$dot$qlobit"
-+ (+ OP1_7 OP2_10 reg8 reghi8 qhibit qlobit)
-+ (sequence ((HI tmp1) (HI tmp2) (HI tmp3) (HI tmp4))
-+ (set HI tmp1 reghi8)
-+ (set HI tmp2 reg8)
-+ (set tmp3 (const 1))
-+ (set tmp4 (const 1))
-+ (sll tmp3 qlobit)
-+ (sll tmp4 qhibit)
-+ (and tmp1 tmp3)
-+ (and tmp2 tmp4)
-+ (set BI tmp1(xor tmp1 tmp2))
-+ (set HI reghi8 tmp1)
-+ (set HI reg8 tmp2))
-+ ()
-+)
-+
-+;cmp direct bit to bit
-+;BCMP bitaddrZ.z,bitaddrQ.q
-+(dni bcmp "bit to bit compare"
-+ ((PIPE OS) (IDOC ALU))
-+ "bcmp $reghi8$dot$qhibit,$reg8$dot$qlobit"
-+ (+ OP1_2 OP2_10 reg8 reghi8 qhibit qlobit)
-+ (sequence ((HI tmp1) (HI tmp2) (HI tmp3) (HI tmp4))
-+ (set HI tmp1 reghi8)
-+ (set HI tmp2 reg8)
-+ (set tmp3 (const 1))
-+ (set tmp4 (const 1))
-+ (sll tmp3 qlobit)
-+ (sll tmp4 qhibit)
-+ (and tmp1 tmp3)
-+ (and tmp2 tmp4)
-+ (set BI tmp1(xor tmp1 tmp2))
-+ (set HI reghi8 tmp1)
-+ (set HI reg8 tmp2))
-+ ()
-+)
-+
-+;bit field low byte
-+;BFLDL op1,op2,op3
-+(dni bfldl "bit field low byte"
-+ ((PIPE OS) (IDOC MOVE))
-+ "bfldl $reg8,$hash$mask8,$hash$datahi8"
-+ (+ OP1_0 OP2_10 reg8 mask8 datahi8)
-+ (sequence ((HI tmp1) (QI tmp2) (QI tmp3))
-+ (set HI tmp1 reg8)
-+ (set QI tmp2 mask8)
-+ (set QI tmp3 datahi8)
-+ (inv QI tmp2)
-+ (set HI tmp1 (and tmp1 tmp2))
-+ (set HI tmp1 (or tmp1 tmp3))
-+ (set HI reg8 tmp1)
-+ )
-+ ()
-+)
-+
-+;bit field high byte
-+;BFLDH op1,op2,op3
-+(dni bfldh "bit field high byte"
-+ ((PIPE OS) (IDOC MOVE))
-+ "bfldh $reg8,$hash$masklo8,$hash$data8"
-+ (+ OP1_1 OP2_10 reg8 masklo8 data8)
-+ (sequence ((HI tmp1) (HI tmp2) (HI tmp3))
-+ (set HI tmp1 reg8)
-+ (set QI tmp2 masklo8)
-+ (set HI tmp3 data8)
-+ (sll tmp2 (const 8))
-+ (inv HI tmp2)
-+ (sll tmp3 (const 8))
-+ (set HI tmp1 (and tmp1 tmp2))
-+ (set HI tmp1 (or tmp1 tmp3))
-+ (set HI reg8 tmp1)
-+ )
-+ ()
-+)
-+
-+;/**********compare instructions******************
-+
-+;Compare register
-+;CMP Rwn,Rwm
-+(dni cmpr "compare two registers"
-+ ((PIPE OS) (IDOC CMP))
-+ "cmp $src1,$src2"
-+ (+ OP1_4 OP2_0 src1 src2)
-+ (set condbit (lt HI src1 src2))
-+ ()
-+)
-+
-+;Compare byte register
-+;CMPB Rbn,Rbm
-+(dni cmpbr "compare two byte registers"
-+ ((PIPE OS) (IDOC CMP))
-+ "cmpb $drb,$srb"
-+ (+ OP1_4 OP2_1 drb srb)
-+ (set condbit (lt QI drb srb))
-+ ()
-+)
-+
-+(define-pmacro (cmp1 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "compare" )
-+ ((PIPE OS) (IDOC CMP))
-+ (.str insn " $"op1 ",$hash$"op2)
-+ (+ opc1 opc2 op1 (f-op-bit1 0) op2)
-+ (set condbit (lt mode op1 op2))
-+ ()
-+ )
-+)
-+(cmp1 cmpri cmp OP1_4 OP2_8 src1 uimm3 HI)
-+(cmp1 cmpbri cmpb OP1_4 OP2_9 drb uimm3 QI)
-+
-+; CMP Rwn,#data16
-+(dni cmpi "compare"
-+ ((PIPE OS) (IDOC CMP))
-+ "cmp $reg8,$hash$uimm16"
-+ (+ OP1_4 OP2_6 reg8 uimm16)
-+ (set condbit (lt HI reg8 uimm16))
-+ ()
-+)
-+
-+; CMPB reg,#data8
-+(dni cmpbi "compare"
-+ ((PIPE OS) (IDOC CMP))
-+ "cmpb $regb8,$hash$uimm8"
-+ (+ OP1_4 OP2_7 regb8 uimm8 (f-op-bit8 0))
-+ (set condbit (lt QI regb8 uimm8))
-+ ()
-+)
-+
-+;compare reg and indirect memory
-+(define-pmacro (cmp2 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "compare" )
-+ ((PIPE OS) (IDOC CMP))
-+ (.str insn " $"op1 ",[$"op2"]")
-+ (+ opc1 opc2 op1 (f-op-bit2 2) op2)
-+ (set condbit (lt mode op1 op2))
-+ ()
-+ )
-+)
-+(cmp2 cmpr2 cmp OP1_4 OP2_8 dr sr2 HI)
-+(cmp2 cmpbr2 cmpb OP1_4 OP2_9 drb sr2 QI)
-+
-+;compare register and indirect memory post increment
-+(define-pmacro (cmp3 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "compare" )
-+ ((PIPE OS) (IDOC CMP))
-+ (.str insn " $"op1 ",[$"op2"+]")
-+ (+ opc1 opc2 op1 (f-op-bit2 3) op2)
-+ (sequence ()
-+ (set condbit (lt mode op1 op2))
-+ (set HI op2 (add HI op2 (const 2)))
-+ )
-+ ()
-+ )
-+)
-+(cmp3 cmp2i cmp OP1_4 OP2_8 dr sr2 HI)
-+(cmp3 cmpb2i cmpb OP1_4 OP2_9 drb sr2 QI)
-+
-+;compare register and direct memory
-+(define-pmacro (cmp4 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "compare" )
-+ ((PIPE OS) (IDOC CMP))
-+ (.str insn " $"op1 ",$pof$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set condbit (lt HI op1 (mem HI op2)))
-+ ()
-+ )
-+)
-+(cmp4 cmp04 cmp OP1_4 OP2_2 reg8 upof16 HI)
-+(cmp4 cmpb4 cmpb OP1_4 OP2_3 regb8 upof16 QI)
-+
-+;compare register and direct memory
-+(define-pmacro (cmp4 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "compare" )
-+ ((PIPE OS) (IDOC CMP))
-+ (.str insn " $"op1 ",$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set condbit (lt HI op1 (mem HI op2)))
-+ ()
-+ )
-+)
-+(cmp4 cmp004 cmp OP1_4 OP2_2 regmem8 memgr8 HI)
-+(cmp4 cmp0004 cmp OP1_4 OP2_2 reg8 memory HI)
-+(cmp4 cmpb04 cmpb OP1_4 OP2_3 regbmem8 memgr8 QI)
-+(cmp4 cmpb004 cmpb OP1_4 OP2_3 regb8 memory QI)
-+
-+;compare register and immediate
-+(define-pmacro (cmp5 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "compare" )
-+ ((PIPE OS) (IDOC CMP))
-+ (.str insn " $"op1 ",$hash$"op2)
-+ (+ opc1 opc2 op2 op1)
-+ (sequence ()
-+ (set condbit (lt HI op1 op2))
-+ (set mode op1 (sub HI op1 (const 1)))
-+ )
-+ ()
-+ )
-+)
-+(cmp5 cmpd1ri cmpd1 OP1_10 OP2_0 sr uimm4 HI)
-+(cmp5 cmpd2ri cmpd2 OP1_11 OP2_0 sr uimm4 HI)
-+(cmp5 cmpi1ri cmpi1 OP1_8 OP2_0 sr uimm4 HI)
-+(cmp5 cmpi2ri cmpi2 OP1_9 OP2_0 sr uimm4 HI)
-+(cmp5 cmpd1rim cmpd1 OP1_10 OP2_6 reg8 uimm16 HI)
-+(cmp5 cmpd2rim cmpd2 OP1_11 OP2_6 reg8 uimm16 HI)
-+(cmp5 cmpi1rim cmpi1 OP1_8 OP2_6 reg8 uimm16 HI)
-+(cmp5 cmpi2rim cmpi2 OP1_9 OP2_6 reg8 uimm16 HI)
-+
-+;compare register and direct memory
-+(define-pmacro (cmp6 name insn opc1 opc2 op1 op2 mode )
-+ (dni name
-+ (.str name "compare" )
-+ ((PIPE OS) (IDOC CMP))
-+ (.str insn " $"op1 ",$pof$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (sequence ()
-+ (set condbit (lt HI op1 (mem HI op2)))
-+ (set mode op1 (sub HI op1 (const 1)))
-+ )
-+ ()
-+ )
-+)
-+(cmp6 cmpd1rp cmpd1 OP1_10 OP2_2 reg8 upof16 HI )
-+(cmp6 cmpd2rp cmpd2 OP1_11 OP2_2 reg8 upof16 HI )
-+(cmp6 cmpi1rp cmpi1 OP1_8 OP2_2 reg8 upof16 HI )
-+(cmp6 cmpi2rp cmpi2 OP1_9 OP2_2 reg8 upof16 HI )
-+
-+;compare register and direct memory
-+(define-pmacro (cmp7 name insn opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "compare" )
-+ ((PIPE OS) (IDOC CMP))
-+ (.str insn " $"op1 ",$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (sequence ()
-+ (set condbit (lt HI op1 (mem HI op2)))
-+ (set mode op1 (sub HI op1 (const 1)))
-+ )
-+ ()
-+ )
-+)
-+(cmp7 cmpd1rm cmpd1 OP1_10 OP2_2 regmem8 memgr8 HI)
-+(cmp7 cmpd2rm cmpd2 OP1_11 OP2_2 regmem8 memgr8 HI)
-+(cmp7 cmpi1rm cmpi1 OP1_8 OP2_2 regmem8 memgr8 HI)
-+(cmp7 cmpi2rm cmpi2 OP1_9 OP2_2 regmem8 memgr8 HI)
-+(cmp7 cmpd1rmi cmpd1 OP1_10 OP2_2 reg8 memory HI)
-+(cmp7 cmpd2rmi cmpd2 OP1_11 OP2_2 reg8 memory HI)
-+(cmp7 cmpi1rmi cmpi1 OP1_8 OP2_2 reg8 memory HI)
-+(cmp7 cmpi2rmi cmpi2 OP1_9 OP2_2 reg8 memory HI)
-+
-+
-+;Shift and rotate insns
-+;****************************************************************
-+(define-pmacro (shift name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "shift" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$"op2)
-+ (+ opc1 opc2 op1 op2)
-+ (set mode op1 (insn1 mode op1 op2))
-+ ()
-+ )
-+)
-+(shift shlr shl sll OP1_4 OP2_12 dr sr HI)
-+(shift shrr shr srl OP1_6 OP2_12 dr sr HI)
-+(shift rolr rol rol OP1_0 OP2_12 dr sr HI)
-+(shift rorr ror ror OP1_2 OP2_12 dr sr HI)
-+(shift ashrr ashr sra OP1_10 OP2_12 dr sr HI)
-+
-+(define-pmacro (shift1 name insn insn1 opc1 opc2 op1 op2 mode)
-+ (dni name
-+ (.str name "shift" )
-+ ((PIPE OS) (IDOC ALU))
-+ (.str insn " $"op1 ",$hash$"op2)
-+ (+ opc1 opc2 op2 op1)
-+ (set mode op1 (insn1 mode op1 op2))
-+ ()
-+ )
-+)
-+(shift1 shlri shl sll OP1_5 OP2_12 sr uimm4 HI)
-+(shift1 shrri shr srl OP1_7 OP2_12 sr uimm4 HI)
-+(shift1 rolri rol rol OP1_1 OP2_12 sr uimm4 HI)
-+(shift1 rorri ror ror OP1_3 OP2_12 sr uimm4 HI)
-+(shift1 ashrri ashr sra OP1_11 OP2_12 sr uimm4 HI)
-diff -Nur binutils-2.24.orig/cgen/cpu/xc16x.opc binutils-2.24/cgen/cpu/xc16x.opc
---- binutils-2.24.orig/cgen/cpu/xc16x.opc 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/xc16x.opc 2016-06-30 21:26:12.645892801 +0200
-@@ -0,0 +1,225 @@
-+/* XC16X opcode support. -*- C -*-
-+
-+ Copyright 2006 Free Software Foundation, Inc.
-+
-+ Contributed by KPIT Cummins Infosystems Ltd.; developed under contract
-+ from Infineon Systems, GMBH , Germany.
-+
-+ This file is part of the GNU Binutils.
-+
-+ This program is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 2 of the License, or
-+ (at your option) any later version.
-+
-+ This program is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ You should have received a copy of the GNU General Public License
-+ along with this program; if not, write to the Free Software
-+ Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
-+ 02110-1301, USA. */
-+
-+
-+/* This file is an addendum to xc16x.cpu. Heavy use of C code isn't
-+ appropriate in .cpu files, so it resides here. This especially applies
-+ to assembly/disassembly where parsing/printing can be quite involved.
-+ Such things aren't really part of the specification of the cpu, per se,
-+ so .cpu files provide the general framework and .opc files handle the
-+ nitty-gritty details as necessary.
-+
-+ Each section is delimited with start and end markers.
-+
-+ <arch>-opc.h additions use: "-- opc.h"
-+ <arch>-opc.c additions use: "-- opc.c"
-+ <arch>-asm.c additions use: "-- asm.c"
-+ <arch>-dis.c additions use: "-- dis.c"
-+ <arch>-ibd.h additions use: "-- ibd.h" */
-+
-+/* -- opc.h */
-+
-+#define CGEN_DIS_HASH_SIZE 8
-+#define CGEN_DIS_HASH(buf,value) (((* (unsigned char*) (buf)) >> 3) % CGEN_DIS_HASH_SIZE)
-+
-+/* -- */
-+
-+/* -- opc.c */
-+
-+/* -- */
-+
-+/* -- asm.c */
-+/* Handle '#' prefixes (i.e. skip over them). */
-+
-+static const char *
-+parse_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ const char **strp,
-+ int opindex ATTRIBUTE_UNUSED,
-+ long *valuep ATTRIBUTE_UNUSED)
-+{
-+ if (**strp == '#')
-+ ++*strp;
-+ return NULL;
-+}
-+
-+/* Handle '.' prefixes (i.e. skip over them). */
-+
-+static const char *
-+parse_dot (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ const char **strp,
-+ int opindex ATTRIBUTE_UNUSED,
-+ long *valuep ATTRIBUTE_UNUSED)
-+{
-+ if (**strp == '.')
-+ ++*strp;
-+ return NULL;
-+}
-+
-+/* Handle '.' prefixes (i.e. skip over them). */
-+
-+static const char *
-+parse_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ const char **strp,
-+ int opindex ATTRIBUTE_UNUSED,
-+ long *valuep ATTRIBUTE_UNUSED)
-+{
-+ if (!strncasecmp (*strp, "pof:", 4))
-+ *strp += 4;
-+ return NULL;
-+}
-+
-+/* Handle '.' prefixes (i.e. skip over them). */
-+
-+static const char *
-+parse_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ const char **strp,
-+ int opindex ATTRIBUTE_UNUSED,
-+ long *valuep ATTRIBUTE_UNUSED)
-+{
-+ if (!strncasecmp (*strp, "pag:", 4))
-+ *strp += 4;
-+ return NULL;
-+}
-+
-+/* Handle 'sof' prefixes (i.e. skip over them). */
-+static const char *
-+parse_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ const char **strp,
-+ int opindex ATTRIBUTE_UNUSED,
-+ long *valuep ATTRIBUTE_UNUSED)
-+{
-+ if (!strncasecmp (*strp, "sof:", 4))
-+ *strp += 4;
-+ return NULL;
-+}
-+
-+/* Handle 'seg' prefixes (i.e. skip over them). */
-+static const char *
-+parse_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ const char **strp,
-+ int opindex ATTRIBUTE_UNUSED,
-+ long *valuep ATTRIBUTE_UNUSED)
-+{
-+ if (!strncasecmp (*strp, "seg:", 4))
-+ *strp += 4;
-+ return NULL;
-+}
-+/* -- */
-+
-+/* -- dis.c */
-+
-+#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \
-+ do \
-+ { \
-+ if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_DOT_PREFIX)) \
-+ info->fprintf_func (info->stream, "."); \
-+ if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_POF_PREFIX)) \
-+ info->fprintf_func (info->stream, "#pof:"); \
-+ if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_PAG_PREFIX)) \
-+ info->fprintf_func (info->stream, "#pag:"); \
-+ } \
-+ while (0)
-+
-+/* Handle '.' prefixes as operands. */
-+
-+static void
-+print_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info ATTRIBUTE_UNUSED,
-+ long value ATTRIBUTE_UNUSED,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+}
-+
-+/* Handle '.' prefixes as operands. */
-+
-+static void
-+print_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info ATTRIBUTE_UNUSED,
-+ long value ATTRIBUTE_UNUSED,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+}
-+
-+/* Handle '.' prefixes as operands. */
-+
-+static void
-+print_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value ATTRIBUTE_UNUSED,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ info->fprintf_func (info->stream, "sof:");
-+}
-+
-+/* Handle '.' prefixes as operands. */
-+
-+static void
-+print_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value ATTRIBUTE_UNUSED,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ info->fprintf_func (info->stream, "seg:");
-+}
-+
-+/* Handle '#' prefixes as operands. */
-+
-+static void
-+print_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info,
-+ long value ATTRIBUTE_UNUSED,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+ disassemble_info *info = (disassemble_info *) dis_info;
-+
-+ info->fprintf_func (info->stream, "#");
-+}
-+
-+/* Handle '.' prefixes as operands. */
-+
-+static void
-+print_dot (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ void * dis_info ATTRIBUTE_UNUSED,
-+ long value ATTRIBUTE_UNUSED,
-+ unsigned int attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc ATTRIBUTE_UNUSED,
-+ int length ATTRIBUTE_UNUSED)
-+{
-+}
-+
-+/* -- */
-diff -Nur binutils-2.24.orig/cgen/cpu/xstormy16.cpu binutils-2.24/cgen/cpu/xstormy16.cpu
---- binutils-2.24.orig/cgen/cpu/xstormy16.cpu 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/xstormy16.cpu 2016-06-30 21:26:12.649892956 +0200
-@@ -0,0 +1,1920 @@
-+; xstormy16 CPU core description. -*- Scheme -*-
-+; Copyright (C) 2001, 2002, 2003 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+(include "simplify.inc")
-+
-+(define-arch
-+ (name xstormy16)
-+ (comment "Xstormy16 architecture")
-+ (insn-lsb0? #f)
-+ (machs xstormy16)
-+ (isas xstormy16)
-+)
-+
-+(define-isa
-+ (name xstormy16)
-+ (comment "Xstormy16 instruction set")
-+ (default-insn-word-bitsize 32)
-+ (default-insn-bitsize 32)
-+ ; FIXME base-insn-bitsize should be 16 too, but at present CGEN has
-+ ; no support for instruction sets with opcode bits past
-+ ; base-insn-bitsize, so we must set it to at least 20.
-+ (base-insn-bitsize 32)
-+)
-+
-+(define-cpu
-+ (name xstormy16)
-+ (comment "Xstormy16 CPU core")
-+ (endian little)
-+ (insn-endian little)
-+ (insn-chunk-bitsize 16)
-+ (word-bitsize 32)
-+)
-+
-+(define-mach
-+ (name xstormy16)
-+ (comment "Xstormy16 CPU core")
-+ (cpu xstormy16)
-+ (isas xstormy16)
-+)
-+
-+(define-model
-+ (name xstormy16)
-+ (comment "Xstormy16 CPU core")
-+ (unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () () () ())
-+)
-+
-+; IDOC attribute for instruction documentation.
-+
-+(define-attr
-+ (for insn)
-+ (type enum)
-+ (name IDOC)
-+ (comment "insn kind for documentation")
-+ (attrs META)
-+ (values
-+ (MEM - () "Memory")
-+ (ALU - () "ALU")
-+ (FPU - () "FPU")
-+ (BR - () "Branch")
-+ (PRIV - () "Priviledged")
-+ (MISC - () "Miscellaneous")
-+ )
-+)
-+
-+; Hardware elements.
-+
-+(dsh h-pc "program counter" (PC) (pc))
-+
-+(define-keyword
-+ (name gr-names)
-+ (print-name h-gr)
-+ (values (r0 0) (r1 1) (r2 2) (r3 3)
-+ (r4 4) (r5 5) (r6 6) (r7 7)
-+ (r8 8) (r9 9) (r10 10) (r11 11)
-+ (r12 12) (r13 13) (r14 14) (r15 15)
-+ (psw 14) (sp 15)))
-+
-+(define-keyword
-+ (name gr-Rb-names)
-+ (print-name h-Rbj)
-+ (values (r8 0) (r9 1) (r10 2) (r11 3)
-+ (r12 4) (r13 5) (r14 6) (r15 7)
-+ (psw 6) (sp 7)))
-+
-+(define-hardware
-+ (name h-gr)
-+ (comment "registers")
-+ (type register WI (16))
-+ (indices extern-keyword gr-names)
-+ (get (index) (and #xFFFF (raw-reg h-gr index)))
-+ (set (index newval) (set (raw-reg h-gr index) (and #xFFFF newval)))
-+)
-+
-+(define-hardware
-+ (name h-Rb)
-+ (comment "Rb registers")
-+ (attrs VIRTUAL)
-+ (type register SI(8))
-+ (indices extern-keyword gr-Rb-names)
-+ (get (index) (reg h-gr (add index 8)))
-+ (set (index newval) (set (reg h-gr (add index 8)) newval))
-+)
-+
-+(define-hardware
-+ (name h-Rbj)
-+ (comment "Rbj registers")
-+ (attrs VIRTUAL)
-+ (type register SI(2))
-+ (indices extern-keyword gr-Rb-names)
-+ (get (index) (reg h-gr (add index 8)))
-+ (set (index newval) (set (reg h-gr (add index 8)) newval))
-+)
-+
-+(define-hardware
-+ (name h-Rpsw)
-+ (comment "Register number field of the PSW")
-+ (attrs VIRTUAL)
-+ (type register WI)
-+ (get () (and #xF (srl psw 12)))
-+ (set (newval) (set psw (or (and psw #xFFF)
-+ (sll HI newval 12)))))
-+
-+(define-pmacro (define-psw-field fnam hnam index)
-+ (define-hardware
-+ (name hnam)
-+ (attrs VIRTUAL)
-+ (type register SI)
-+ (get () (and 1 (srl psw index)))
-+ (set (newval) (set psw (or (and psw (inv (sll HI 1 index)))
-+ (sll HI newval index)))))
-+ ;(dnop fnam "" (SEM-ONLY) hnam f-nil)
-+)
-+(define-psw-field psw-z8 h-z8 0)
-+(dnop psw-z8 "" (SEM-ONLY) h-z8 f-nil)
-+(define-psw-field psw-z16 h-z16 1)
-+(dnop psw-z16 "" (SEM-ONLY) h-z16 f-nil)
-+(define-psw-field psw-cy h-cy 2)
-+(dnop psw-cy "" (SEM-ONLY) h-cy f-nil)
-+(define-psw-field psw-hc h-hc 3)
-+(dnop psw-hc "" (SEM-ONLY) h-hc f-nil)
-+(define-psw-field psw-ov h-ov 4)
-+(dnop psw-ov "" (SEM-ONLY) h-ov f-nil)
-+(define-psw-field psw-pt h-pt 5)
-+(dnop psw-pt "" (SEM-ONLY) h-pt f-nil)
-+(define-psw-field psw-s h-s 6)
-+(dnop psw-s "" (SEM-ONLY) h-s f-nil)
-+
-+(define-hardware
-+ (name h-branchcond)
-+ (comment "Condition of a branch instruction")
-+ (type immediate (UINT 4))
-+ (values keyword ""
-+ (("ge" 0) ("nc" 1) ("lt" 2) ("c" 3)
-+ ("gt" 4) ("hi" 5) ("le" 6) ("ls" 7)
-+ ("pl" 8) ("nv" 9) ("mi" 10) ("v" 11)
-+ ("nz.b" 12) ("nz" 13) ("z.b" 14) ("z" 15)))
-+)
-+
-+(define-hardware
-+ (name h-wordsize)
-+ (comment "Data size")
-+ (type immediate (UINT 1))
-+ (values keyword "" ((".b" 0) (".w" 1) ("" 1)))
-+)
-+
-+
-+; Instruction fields, and the corresponding operands.
-+; Register fields
-+
-+(dnf f-Rd "general register destination" () 12 4)
-+(dnop Rd "general register destination" () h-gr f-Rd)
-+
-+(dnf f-Rdm "general register destination" () 13 3)
-+(dnop Rdm "general register destination" () h-gr f-Rdm)
-+
-+(dnf f-Rm "general register for memory" () 4 3)
-+(dnop Rm "general register for memory" () h-gr f-Rm)
-+
-+(dnf f-Rs "general register source" () 8 4)
-+(dnop Rs "general register source" () h-gr f-Rs)
-+
-+(dnf f-Rb "base register" () 17 3)
-+(dnop Rb "base register" () h-Rb f-Rb)
-+
-+(dnf f-Rbj "base register for jump" () 11 1)
-+(dnop Rbj "base register for jump" () h-Rbj f-Rbj)
-+
-+; Main opcodes in 4 bit chunks
-+
-+(dnf f-op1 "opcode" () 0 4)
-+(define-normal-insn-enum insn-op1 "insn op enums" () OP1_ f-op1
-+ ( "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "A" "B" "C" "D" "E" "F" ))
-+
-+(dnf f-op2 "opcode" () 4 4)
-+(define-normal-insn-enum insn-op2 "insn op enums" () OP2_ f-op2
-+ ( "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "A" "B" "C" "D" "E" "F" ))
-+(dnop bcond2 "branch condition opcode" () h-branchcond f-op2)
-+
-+(dnf f-op2a "opcode" () 4 3)
-+(define-normal-insn-enum insn-op2a "insn op enums" () OP2A_ f-op2a
-+ ( "0" "2" "4" "6" "8" "A" "C" "E" ))
-+
-+(dnf f-op2m "opcode" () 7 1)
-+(define-normal-insn-enum insn-op2m "insn op enums" () OP2M_ f-op2m
-+ ( "0" "1" ))
-+(dnop ws2 "word size opcode" () h-wordsize f-op2m)
-+
-+(dnf f-op3 "opcode" () 8 4)
-+(define-normal-insn-enum insn-op3 "insn op enums" () OP3_ f-op3
-+ ( "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "A" "B" "C" "D" "E" "F" ))
-+
-+(dnf f-op3a "opcode" () 8 2)
-+(define-normal-insn-enum insn-op3a "insn op enums" () OP3A_ f-op3a
-+ ( "0" "1" "2" "3" ))
-+
-+(dnf f-op3b "opcode" () 8 3)
-+(define-normal-insn-enum insn-op3b "insn op enums" () OP3B_ f-op3b
-+ ( "0" "2" "4" "6" "8" "A" "C" "E" ))
-+
-+(dnf f-op4 "opcode" () 12 4)
-+(define-normal-insn-enum insn-op4 "insn op enums" () OP4_ f-op4
-+ ( "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "A" "B" "C" "D" "E" "F" ))
-+
-+(dnf f-op4m "opcode" () 12 1)
-+(define-normal-insn-enum insn-op4m "insn op enums" () OP4M_ f-op4m
-+ ( "0" "1" ))
-+
-+(dnf f-op4b "opcode" () 15 1)
-+(define-normal-insn-enum insn-op4b "insn op enums" () OP4B_ f-op4b
-+ ( "0" "1" ))
-+
-+(dnf f-op5 "opcode" () 16 4)
-+(define-normal-insn-enum insn-op5 "insn op enums" () OP5_ f-op5
-+ ( "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "A" "B" "C" "D" "E" "F" ))
-+(dnop bcond5 "branch condition opcode" () h-branchcond f-op5)
-+
-+(dnf f-op5a "opcode" () 16 1)
-+(define-normal-insn-enum insn-op5a "insn op enums" () OP5A_ f-op5a
-+ ( "0" "1" ))
-+
-+; The whole first word
-+(dnf f-op "opcode" () 0 16)
-+
-+; Immediate fields
-+
-+(dnf f-imm2 "2 bit unsigned" () 10 2)
-+(dnop imm2 "2 bit unsigned immediate" () h-uint f-imm2)
-+
-+(dnf f-imm3 "3 bit unsigned" () 4 3)
-+(dnop imm3 "3 bit unsigned immediate" () h-uint f-imm3)
-+(dnf f-imm3b "3 bit unsigned for bit tests" () 17 3)
-+(dnop imm3b "3 bit unsigned immediate for bit tests" () h-uint f-imm3b)
-+
-+(dnf f-imm4 "4 bit unsigned" () 8 4)
-+(define-operand
-+ (name imm4)
-+ (comment "4 bit unsigned immediate")
-+ (attrs)
-+ (type h-uint)
-+ (index f-imm4)
-+ (handlers (parse "small_immediate"))
-+)
-+
-+(dnf f-imm8 "8 bit unsigned" () 8 8)
-+(dnop imm8 "8 bit unsigned immediate" () h-uint f-imm8)
-+(define-operand
-+ (name imm8small)
-+ (comment "8 bit unsigned immediate")
-+ (attrs)
-+ (type h-uint)
-+ (index f-imm8)
-+ (handlers (parse "small_immediate"))
-+)
-+
-+(define-ifield
-+ (name f-imm12)
-+ (comment "12 bit signed")
-+ (attrs)
-+ (start 20)
-+ (length 12)
-+ (mode INT)
-+)
-+(dnop imm12 "12 bit signed immediate" () h-sint f-imm12)
-+
-+(dnf f-imm16 "16 bit" (SIGN-OPT) 16 16)
-+(define-operand
-+ (name imm16)
-+ (comment "16 bit immediate")
-+ (attrs)
-+ (type h-uint)
-+ (index f-imm16)
-+ (handlers (parse "immediate16"))
-+)
-+
-+(dnf f-lmem8 "8 bit unsigned low memory" (ABS-ADDR) 8 8)
-+(define-operand
-+ (name lmem8)
-+ (comment "8 bit unsigned immediate low memory")
-+ (attrs)
-+ (type h-uint)
-+ (index f-lmem8)
-+ (handlers (parse "mem8"))
-+)
-+(define-ifield
-+ (name f-hmem8)
-+ (comment "8 bit unsigned high memory")
-+ (attrs ABS-ADDR)
-+ (start 8)
-+ (length 8)
-+ (mode UINT)
-+ (encode (value pc) (sub HI value #x7F00))
-+ (decode (value pc) (add HI value #x7F00))
-+)
-+(define-operand
-+ (name hmem8)
-+ (comment "8 bit unsigned immediate high memory")
-+ (attrs)
-+ (type h-uint)
-+ (index f-hmem8)
-+ (handlers (parse "mem8"))
-+)
-+
-+(define-ifield
-+ (name f-rel8-2)
-+ (comment "8 bit relative address for 2-byte instruction")
-+ (attrs PCREL-ADDR)
-+ (start 8)
-+ (length 8)
-+ (mode INT)
-+ (encode (value pc) (sub SI value (add SI pc 2)))
-+ (decode (value pc) (add SI value (add SI pc 2)))
-+)
-+(dnop rel8-2 "8 bit relative address" () h-uint f-rel8-2)
-+
-+(define-ifield
-+ (name f-rel8-4)
-+ (comment "8 bit relative address for 4-byte instruction")
-+ (attrs PCREL-ADDR)
-+ (start 8)
-+ (length 8)
-+ (mode INT)
-+ (encode (value pc) (sub SI value (add SI pc 4)))
-+ (decode (value pc) (add SI value (add SI pc 4)))
-+)
-+(dnop rel8-4 "8 bit relative address" () h-uint f-rel8-4)
-+
-+(define-ifield
-+ (name f-rel12)
-+ (comment "12 bit relative address")
-+ (attrs PCREL-ADDR)
-+ (start 20)
-+ (length 12)
-+ (mode INT)
-+ (encode (value pc) (sub SI value (add SI pc 4)))
-+ (decode (value pc) (add SI value (add SI pc 4)))
-+)
-+(dnop rel12 "12 bit relative address" () h-uint f-rel12)
-+
-+(define-ifield
-+ (name f-rel12a)
-+ (comment "12 bit relative address")
-+ (attrs PCREL-ADDR)
-+ (start 4)
-+ (length 11)
-+ (mode INT)
-+ (encode (value pc) (sra SI (sub SI value (add SI pc 2)) 1))
-+ (decode (value pc) (add SI (sll value 1) (add SI pc 2)))
-+)
-+(dnop rel12a "12 bit relative address" () h-uint f-rel12a)
-+
-+(dnf f-abs24-1 "abs24 low part" () 8 8)
-+(dnf f-abs24-2 "abs24 high part" () 16 16)
-+(define-multi-ifield
-+ (name f-abs24)
-+ (comment "Absolute address for jmpf instruction")
-+ (attrs ABS-ADDR)
-+ (mode UINT)
-+ (subfields f-abs24-1 f-abs24-2)
-+ (insert (sequence ()
-+ (set (ifield f-abs24-1) (and (ifield f-abs24) #xFF))
-+ (set (ifield f-abs24-2) (srl (ifield f-abs24) 8))))
-+ (extract (set (ifield f-abs24) (or (sll (ifield f-abs24-2) 8) f-abs24-1)))
-+)
-+(dnop abs24 "24 bit absolute address" () h-uint f-abs24)
-+
-+; Names for registers
-+(dnop psw "program status word" (SEM-ONLY) h-gr 14)
-+(dnop Rpsw "N0-N3 of the program status word" (SEM-ONLY) h-Rpsw f-nil)
-+(dnop sp "stack pointer" (SEM-ONLY) h-gr 15)
-+(dnop R0 "R0" (SEM-ONLY) h-gr 0)
-+(dnop R1 "R1" (SEM-ONLY) h-gr 1)
-+(dnop R2 "R2" (SEM-ONLY) h-gr 2)
-+(dnop R8 "R8" (SEM-ONLY) h-gr 8)
-+
-+; Useful macros.
-+
-+; THe Z8, Z16, PT, and S flags of the PSW.
-+(define-pmacro (basic-psw value ws)
-+ (or (or (zflag (and value #xFF))
-+ (sll HI (zflag HI value) 1))
-+ (or (sll HI (c-call BI "parity" value) 5)
-+ (sll HI (nflag QI (srl value (mul ws 8))) 6))))
-+
-+
-+; Update the PSW for destination register Rd, set Rd to value.
-+(define-pmacro (set-psw Rd index value ws)
-+ (sequence ((HI nvalue))
-+ (set nvalue value)
-+ (set (reg HI h-gr index) nvalue)
-+ (set psw (or (and psw #x0F9C)
-+ (or (sll index 12)
-+ (basic-psw nvalue ws))))))
-+
-+; Update the PSW for destination register Rd.
-+(define-pmacro (set-psw-nowrite index value ws)
-+ (sequence ((HI nvalue))
-+ (set nvalue value)
-+ (set psw (or (and psw #x0F9C)
-+ (or (sll index 12)
-+ (basic-psw nvalue ws))))))
-+
-+; Update the PSW for destination non-register dest, set dest to value.
-+(define-pmacro (set-mem-psw dest value ws)
-+ (sequence ((HI nvalue))
-+ (set nvalue value)
-+ (set psw (or (and psw #xFF9C)
-+ (basic-psw nvalue ws)))
-+ (set dest nvalue)))
-+
-+; Update the PSW as with set-psw, but also set the carry flag.
-+(define-pmacro (set-psw-carry Rd index value carry ws)
-+ (sequence ((HI nvalue) (HI newpsw))
-+ (set nvalue value)
-+ (set newpsw (or (or (and psw #x0F98)
-+ (sll (and carry #x1) 2))
-+ (or (sll index 12)
-+ (basic-psw nvalue ws))))
-+ (set (reg HI h-gr index) nvalue)
-+ (set psw newpsw)
-+ ))
-+
-+; The all-purpose addition operation.
-+(define-pmacro (set-psw-add Rd index a b c)
-+ (sequence ((HI value) (HI newpsw))
-+ (set value (addc a b c))
-+ (set newpsw (or (or (and psw #x0F80)
-+ (basic-psw value 1))
-+ (or (or (sll HI (add-oflag HI a b c) 4)
-+ (sll HI (add-cflag HI a b c) 2))
-+ (or (and (srl HI (addc HI (and a #xF) (and b #xF) c)
-+ 1) #x8)
-+ (sll index 12)))))
-+ (set (reg HI h-gr index) value)
-+ (set psw newpsw)
-+ ))
-+
-+; Set the PSW for a subtraction of a-b into Rd, but don't actually
-+; do the subtract.
-+(define-pmacro (set-psw-cmp Rd index a b)
-+ (sequence ((HI value))
-+ (set value (sub a b))
-+ (set psw (or (or (and psw #x0F80)
-+ (basic-psw value 1))
-+ (or (or (sll HI (sub-oflag HI a b 0) 4)
-+ (sll HI (sub-cflag HI a b 0) 2))
-+ (or (and (srl HI (sub HI (and a #xF) (and b #xF))
-+ 1) #x8)
-+ (sll index 12)))))))
-+
-+; Likewise, for subtraction
-+; (this chip has a borrow for subtraction, rather than
-+; just using a carry for both).
-+(define-pmacro (set-psw-sub Rd index a b c)
-+ (sequence ((HI value) (HI newpsw))
-+ (set value (subc a b c))
-+ (set newpsw (or (or (and psw #x0F80)
-+ (basic-psw value 1))
-+ (or (or (sll HI (sub-oflag HI a b c) 4)
-+ (sll HI (sub-cflag HI a b c) 2))
-+ (or (and (srl HI (subc HI (and a #xF) (and b #xF) c)
-+ 1) #x8)
-+ (sll index 12)))))
-+ (set (reg HI h-gr index) value)
-+ (set psw newpsw)
-+ ))
-+
-+; A 17-bit rotate-left operation
-+(define-pmacro (set-psw-rotate17 Rd index src c rot)
-+ (sequence ((SI tmpfoo))
-+ (set tmpfoo (or (or (and (sll SI src 15) #x7FFE0000)
-+ src)
-+ (or (sll SI c 31)
-+ (sll SI c 16))))
-+ (set tmpfoo (rol tmpfoo (and rot #x1F)))
-+ (set-psw-carry (reg HI h-gr index) index (trunc HI tmpfoo) (and (srl tmpfoo 16) 1) 1)))
-+
-+; A 17-bit rotate-right operation
-+(define-pmacro (set-psw-rrotate17 Rd index src c rot)
-+ (sequence ((SI tmpfoo))
-+ (set tmpfoo (or (or (and (sll SI src 17) #xFFFE0000)
-+ src)
-+ (sll SI c 16)))
-+ (set tmpfoo (ror tmpfoo (and rot #x0F)))
-+ (set-psw-carry (reg HI h-gr index) index (trunc HI tmpfoo) (and (srl tmpfoo 16) 1) 1)))
-+
-+
-+; Move Operations
-+
-+(define-pmacro (alignfix-mem where)
-+ (mem HI (and where #xFFFE)))
-+
-+(define-pmacro (set-alignfix-mem where what)
-+ (set (mem HI (and where #xFFFE)) what))
-+
-+(dni movlmemimm
-+ "Move immediate to low memory"
-+ ()
-+ ("mov$ws2 $lmem8,#$imm16")
-+ (+ OP1_7 OP2A_8 ws2 lmem8 imm16)
-+ (if ws2
-+ (set-mem-psw (mem HI (and lmem8 #xFFFE)) imm16 ws2)
-+ (set-mem-psw (mem QI lmem8) (and imm16 #xFF) ws2))
-+ ()
-+)
-+(dni movhmemimm
-+ "Move immediate to high memory"
-+ ()
-+ ("mov$ws2 $hmem8,#$imm16")
-+ (+ OP1_7 OP2A_A ws2 hmem8 imm16)
-+ (if ws2
-+ (set-mem-psw (mem HI (and hmem8 #xFFFE)) imm16 ws2)
-+ (set-mem-psw (mem QI hmem8) (and imm16 #xFF) ws2))
-+ ()
-+)
-+
-+(dni movlgrmem
-+ "Move low memory to register"
-+ ()
-+ ("mov$ws2 $Rm,$lmem8")
-+ (+ OP1_8 Rm ws2 lmem8)
-+ (if ws2
-+ (set-psw Rm (index-of Rm) (alignfix-mem lmem8) ws2)
-+ (set-psw Rm (index-of Rm) (mem QI lmem8) ws2))
-+ ()
-+)
-+(dni movhgrmem
-+ "Move high memory to register"
-+ ()
-+ ("mov$ws2 $Rm,$hmem8")
-+ (+ OP1_A Rm ws2 hmem8)
-+ (if ws2
-+ (set-psw Rm (index-of Rm) (alignfix-mem hmem8) ws2)
-+ (set-psw Rm (index-of Rm) (mem QI hmem8) ws2))
-+ ()
-+)
-+
-+(dni movlmemgr
-+ "Move low memory register to byte"
-+ ()
-+ ("mov$ws2 $lmem8,$Rm")
-+ (+ OP1_9 Rm ws2 lmem8)
-+ (if ws2
-+ (set-mem-psw (mem HI (and lmem8 #xFFFE)) Rm ws2)
-+ (set-mem-psw (mem QI lmem8) Rm ws2))
-+ ()
-+)
-+(dni movhmemgr
-+ "Move high memory register to byte"
-+ ()
-+ ("mov$ws2 $hmem8,$Rm")
-+ (+ OP1_B Rm ws2 hmem8)
-+ (if ws2
-+ (set-mem-psw (mem HI (and hmem8 #xFFFE)) Rm ws2)
-+ (set-mem-psw (mem QI hmem8) Rm ws2))
-+ ()
-+)
-+
-+(dni movgrgri
-+ "Move memory addressed by register to register"
-+ ()
-+ ("mov$ws2 $Rdm,($Rs)")
-+ (+ OP1_7 OP2A_0 ws2 Rs OP4M_0 Rdm)
-+ (if ws2
-+ (set-psw Rdm (index-of Rdm) (alignfix-mem Rs) ws2)
-+ (set-psw Rdm (index-of Rdm) (and #xFF (mem QI Rs)) ws2))
-+ ()
-+)
-+
-+(dni movgrgripostinc
-+ "Move memory addressed by postincrement register to register"
-+ ()
-+ ("mov$ws2 $Rdm,($Rs++)")
-+ (+ OP1_6 OP2A_0 ws2 Rs OP4M_0 Rdm)
-+ (sequence ()
-+ (if ws2
-+ (set-psw Rdm (index-of Rdm) (alignfix-mem Rs) ws2)
-+ (set-psw Rdm (index-of Rdm) (and #xFF (mem QI Rs)) ws2))
-+ (set Rs (add Rs (add 1 ws2))))
-+ ()
-+)
-+
-+(dni movgrgripredec
-+ "Move memory addressed by predecrement register to register"
-+ ()
-+ ("mov$ws2 $Rdm,(--$Rs)")
-+ (+ OP1_6 OP2A_8 ws2 Rs OP4M_0 Rdm)
-+ (sequence ()
-+ (set Rs (sub Rs (add 1 ws2)))
-+ (if ws2
-+ (set-psw Rdm (index-of Rdm) (alignfix-mem Rs) ws2)
-+ (set-psw Rdm (index-of Rdm) (and #xFF (mem QI Rs)) ws2)))
-+ ()
-+)
-+
-+(dni movgrigr
-+ "Move register to memory addressed by register"
-+ ()
-+ ("mov$ws2 ($Rs),$Rdm")
-+ (+ OP1_7 OP2A_2 ws2 Rs OP4M_0 Rdm)
-+ (sequence ()
-+ (if ws2
-+ (set-alignfix-mem Rs Rdm)
-+ (set (mem QI Rs) Rdm))
-+ (set-psw-nowrite (index-of Rdm) Rdm ws2))
-+ ()
-+)
-+
-+(dni movgripostincgr
-+ "Move register to memory addressed by postincrement register"
-+ ()
-+ ("mov$ws2 ($Rs++),$Rdm")
-+ (+ OP1_6 OP2A_2 ws2 Rs OP4M_0 Rdm)
-+ (sequence ()
-+ (if ws2
-+ (set-alignfix-mem Rs Rdm)
-+ (set (mem QI Rs) Rdm))
-+ (set-psw-nowrite (index-of Rdm) Rdm ws2)
-+ (set Rs (add Rs (add ws2 1))))
-+ ()
-+)
-+
-+(dni movgripredecgr
-+ "Move register to memory addressed by predecrement register"
-+ ()
-+ ("mov$ws2 (--$Rs),$Rdm")
-+ (+ OP1_6 OP2A_A ws2 Rs OP4M_0 Rdm)
-+ (sequence ()
-+ (set Rs (sub Rs (add ws2 1)))
-+ (set-psw-nowrite (index-of Rdm) Rdm ws2)
-+ (if ws2
-+ (set-alignfix-mem Rs Rdm)
-+ (set (mem QI Rs) Rdm)))
-+ ()
-+)
-+
-+(dni movgrgrii
-+ "Move memory addressed by indexed register to register"
-+ ()
-+ ("mov$ws2 $Rdm,($Rs,$imm12)")
-+ (+ OP1_7 OP2A_0 ws2 Rs OP4M_1 Rdm OP5_0 imm12)
-+ (if ws2
-+ (set-psw Rdm (index-of Rdm) (alignfix-mem (add Rs imm12)) ws2)
-+ (set-psw Rdm (index-of Rdm) (and #xFF (mem QI (add Rs imm12))) ws2))
-+ ()
-+)
-+
-+(dni movgrgriipostinc
-+ "Move memory addressed by indexed register postincrement to register"
-+ ()
-+ ("mov$ws2 $Rdm,($Rs++,$imm12)")
-+ (+ OP1_6 OP2A_0 ws2 Rs OP4M_1 Rdm OP5_0 imm12)
-+ (sequence ()
-+ (if ws2
-+ (set-psw Rdm (index-of Rdm) (alignfix-mem (add Rs imm12)) ws2)
-+ (set-psw Rdm (index-of Rdm) (and #xFF (mem QI (add Rs imm12))) ws2))
-+ (set Rs (add Rs (add ws2 1))))
-+ ()
-+)
-+
-+(dni movgrgriipredec
-+ "Move memory addressed by indexed register predecrement to register"
-+ ()
-+ ("mov$ws2 $Rdm,(--$Rs,$imm12)")
-+ (+ OP1_6 OP2A_8 ws2 Rs OP4M_1 Rdm OP5_0 imm12)
-+ (sequence ()
-+ (set Rs (sub Rs (add ws2 1)))
-+ (if ws2
-+ (set-psw Rdm (index-of Rdm) (alignfix-mem (add Rs imm12)) ws2)
-+ (set-psw Rdm (index-of Rdm) (and #xFF (mem QI (add Rs imm12))) ws2)))
-+ ()
-+)
-+
-+(dni movgriigr
-+ "Move register to memory addressed by indexed register"
-+ ()
-+ ("mov$ws2 ($Rs,$imm12),$Rdm")
-+ (+ OP1_7 OP2A_2 ws2 Rs OP4M_1 Rdm OP5_0 imm12)
-+ (sequence ()
-+ (if ws2
-+ (set-alignfix-mem (add Rs imm12) Rdm)
-+ (set (mem QI (add Rs imm12)) Rdm))
-+ (set-psw-nowrite (index-of Rdm) Rdm ws2))
-+ ()
-+)
-+
-+(dni movgriipostincgr
-+ "Move register to memory addressed by indexed register postincrement"
-+ ()
-+ ("mov$ws2 ($Rs++,$imm12),$Rdm")
-+ (+ OP1_6 OP2A_2 ws2 Rs OP4M_1 Rdm OP5_0 imm12)
-+ (sequence ()
-+ (if ws2
-+ (set-alignfix-mem (add Rs imm12) Rdm)
-+ (set (mem QI (add Rs imm12)) Rdm))
-+ (set-psw-nowrite (index-of Rdm) Rdm ws2)
-+ (set Rs (add Rs 1)))
-+ ()
-+)
-+
-+(dni movgriipredecgr
-+ "Move register to memory addressed by indexed register predecrement"
-+ ()
-+ ("mov$ws2 (--$Rs,$imm12),$Rdm")
-+ (+ OP1_6 OP2A_A ws2 Rs OP4M_1 Rdm OP5_0 imm12)
-+ (sequence ()
-+ (set Rs (sub Rs 1))
-+ (set-psw-nowrite (index-of Rdm) Rdm ws2)
-+ (if ws2
-+ (set-alignfix-mem (add Rs imm12) Rdm)
-+ (set (mem QI (add Rs imm12)) Rdm)))
-+ ()
-+)
-+
-+(dni movgrgr
-+ "Move general register to general register"
-+ ()
-+ ("mov $Rd,$Rs")
-+ (+ OP1_4 OP2_6 Rs Rd)
-+ (set-psw Rd (index-of Rd) Rs 1)
-+ ()
-+)
-+
-+(dnmi movimm8
-+ "Move 8-bit immediate"
-+ ()
-+ ("mov Rx,#$imm8")
-+ (emit movwimm8 imm8)
-+)
-+
-+(dni movwimm8
-+ "Move 8-bit immediate"
-+ ()
-+ ("mov.w Rx,#$imm8")
-+ (+ OP1_4 OP2_7 imm8)
-+ (set-psw (reg HI h-gr Rpsw) Rpsw imm8 1)
-+ ()
-+)
-+
-+(dnmi movgrimm8
-+ "Move 8-bit immediate to general register"
-+ ()
-+ ("mov $Rm,#$imm8small")
-+ (emit movwgrimm8 Rm imm8small)
-+)
-+
-+(dni movwgrimm8
-+ "Move 8-bit immediate to general register"
-+ ()
-+ ("mov.w $Rm,#$imm8small")
-+ (+ OP1_2 Rm OP2M_1 imm8small)
-+ (set-psw Rm (index-of Rm) imm8small 1)
-+ ()
-+)
-+
-+(dnmi movgrimm16
-+ "Move 16-bit immediate to general register"
-+ ()
-+ ("mov $Rd,#$imm16")
-+ (emit movwgrimm16 Rd imm16)
-+)
-+
-+(dni movwgrimm16
-+ "Move 16-bit immediate to general register"
-+ ()
-+ ("mov.w $Rd,#$imm16")
-+ (+ OP1_3 OP2_1 OP3_3 Rd imm16)
-+ (set-psw Rd (index-of Rd) imm16 1)
-+ ()
-+)
-+
-+(dni movlowgr
-+ "Move 8 low bits to general register"
-+ ()
-+ ("mov.b $Rd,RxL")
-+ (+ OP1_3 OP2_0 OP3_C Rd)
-+ (set-psw Rd (index-of Rd) (or (and Rd #xFF00) (and (reg HI h-gr Rpsw) #xFF)) 0)
-+ ()
-+)
-+
-+(dni movhighgr
-+ "Move 8 high bits to general register"
-+ ()
-+ ("mov.b $Rd,RxH")
-+ (+ OP1_3 OP2_0 OP3_D Rd)
-+ (set-psw Rd (index-of Rd) (or (and Rd #x00FF) (and (reg HI h-gr Rpsw) #xFF00)) 1)
-+ ()
-+)
-+
-+(dni movfgrgri
-+ "Move far memory addressed by register to register"
-+ ()
-+ ("movf$ws2 $Rdm,($Rs)")
-+ (+ OP1_7 OP2A_4 ws2 Rs OP4M_0 Rdm)
-+ (if ws2
-+ (set-psw Rdm (index-of Rdm) (alignfix-mem (or (sll SI R8 16) Rs)) ws2)
-+ (set-psw Rdm (index-of Rdm) (and #xFF (mem QI (or (sll SI R8 16) Rs))) ws2))
-+ ()
-+)
-+
-+(dni movfgrgripostinc
-+ "Move far memory addressed by postincrement register to register"
-+ ()
-+ ("movf$ws2 $Rdm,($Rs++)")
-+ (+ OP1_6 OP2A_4 ws2 Rs OP4M_0 Rdm)
-+ (sequence ()
-+ (if ws2
-+ (set-psw Rdm (index-of Rdm) (alignfix-mem (join SI HI R8 Rs)) ws2)
-+ (set-psw Rdm (index-of Rdm) (and #xFF (mem QI (join SI HI R8 Rs))) ws2))
-+ (set Rs (add Rs (add ws2 1))))
-+ ()
-+)
-+
-+(dni movfgrgripredec
-+ "Move far memory addressed by predecrement register to register"
-+ ()
-+ ("movf$ws2 $Rdm,(--$Rs)")
-+ (+ OP1_6 OP2A_C ws2 Rs OP4M_0 Rdm)
-+ (sequence ()
-+ (set Rs (sub Rs (add ws2 1)))
-+ (if ws2
-+ (set-psw Rdm (index-of Rdm) (alignfix-mem (join SI HI R8 Rs)) ws2)
-+ (set-psw Rdm (index-of Rdm) (and #xFF (mem QI (join SI HI R8 Rs))) ws2)))
-+ ()
-+)
-+
-+(dni movfgrigr
-+ "Move far register to memory addressed by register"
-+ ()
-+ ("movf$ws2 ($Rs),$Rdm")
-+ (+ OP1_7 OP2A_6 ws2 Rs OP4M_0 Rdm)
-+ (sequence ()
-+ (if ws2
-+ (set-alignfix-mem (join SI HI R8 Rs) Rdm)
-+ (set (mem QI (join SI HI R8 Rs)) Rdm))
-+ (set-psw-nowrite (index-of Rdm) Rdm ws2))
-+ ()
-+)
-+
-+(dni movfgripostincgr
-+ "Move far register to memory addressed by postincrement register"
-+ ()
-+ ("movf$ws2 ($Rs++),$Rdm")
-+ (+ OP1_6 OP2A_6 ws2 Rs OP4M_0 Rdm)
-+ (sequence ()
-+ (if ws2
-+ (set-alignfix-mem (join SI HI R8 Rs) Rdm)
-+ (set (mem QI (join SI HI R8 Rs)) Rdm))
-+ (set-psw-nowrite (index-of Rdm) Rdm ws2)
-+ (set Rs (add Rs (add ws2 1))))
-+ ()
-+)
-+
-+(dni movfgripredecgr
-+ "Move far register to memory addressed by predecrement register"
-+ ()
-+ ("movf$ws2 (--$Rs),$Rdm")
-+ (+ OP1_6 OP2A_E ws2 Rs OP4M_0 Rdm)
-+ (sequence ()
-+ (set-psw-nowrite (index-of Rdm) Rdm ws2)
-+ (set Rs (sub Rs (add ws2 1)))
-+ (if ws2
-+ (set-alignfix-mem (join SI HI R8 Rs) Rdm)
-+ (set (mem QI (join SI HI R8 Rs)) Rdm)))
-+ ()
-+)
-+
-+(dni movfgrgrii
-+ "Move far memory addressed by indexed register to register"
-+ ()
-+ ("movf$ws2 $Rdm,($Rb,$Rs,$imm12)")
-+ (+ OP1_7 OP2A_4 ws2 Rs OP4M_1 Rdm OP5A_0 Rb imm12)
-+ (if ws2
-+ (set-psw Rdm (index-of Rdm) (alignfix-mem (add (join SI HI Rb Rs) imm12)) ws2)
-+ (set-psw Rdm (index-of Rdm) (and #xFF (mem QI (add (join SI HI Rb Rs) imm12))) ws2))
-+ ()
-+)
-+
-+(dni movfgrgriipostinc
-+ "Move far memory addressed by indexed register postincrement to register"
-+ ()
-+ ("movf$ws2 $Rdm,($Rb,$Rs++,$imm12)")
-+ (+ OP1_6 OP2A_4 ws2 Rs OP4M_1 Rdm OP5A_0 Rb imm12)
-+ (sequence ()
-+ (if ws2
-+ (set-psw Rdm (index-of Rdm) (alignfix-mem (add (join SI HI Rb Rs) imm12)) ws2)
-+ (set-psw Rdm (index-of Rdm) (and #xFF (mem QI (add (join SI HI Rb Rs) imm12))) ws2))
-+ (set Rs (add Rs (add ws2 1))))
-+ ()
-+)
-+
-+(dni movfgrgriipredec
-+ "Move far memory addressed by indexed register predecrement to register"
-+ ()
-+ ("movf$ws2 $Rdm,($Rb,--$Rs,$imm12)")
-+ (+ OP1_6 OP2A_C ws2 Rs OP4M_1 Rdm OP5A_0 Rb imm12)
-+ (sequence ()
-+ (set Rs (sub Rs (add ws2 1)))
-+ (if ws2
-+ (set-psw Rdm (index-of Rdm) (alignfix-mem (add (join SI HI Rb Rs) imm12)) ws2)
-+ (set-psw Rdm (index-of Rdm) (and #xFF (mem QI (add (join SI HI Rb Rs) imm12))) ws2)))
-+ ()
-+)
-+
-+(dni movfgriigr
-+ "Move far register to memory addressed by indexed register"
-+ ()
-+ ("movf$ws2 ($Rb,$Rs,$imm12),$Rdm")
-+ (+ OP1_7 OP2A_6 ws2 Rs OP4M_1 Rdm OP5A_0 Rb imm12)
-+ (sequence ()
-+ (if ws2
-+ (set (mem HI (and (add (join SI HI Rb Rs) imm12) #xFFFFFFFE))
-+ Rdm)
-+ (set (mem QI (add (join SI HI Rb Rs) imm12)) Rdm))
-+ (set-psw-nowrite (index-of Rdm) Rdm ws2))
-+ ()
-+)
-+
-+
-+(dni movfgriipostincgr
-+ "Move far register to memory addressed by indexed register postincrement"
-+ ()
-+ ("movf$ws2 ($Rb,$Rs++,$imm12),$Rdm")
-+ (+ OP1_6 OP2A_6 ws2 Rs OP4M_1 Rdm OP5A_0 Rb imm12)
-+ (sequence ()
-+ (if ws2
-+ (set (mem HI (and (add (join SI HI Rb Rs) imm12) #xFFFFFFFE)) Rdm)
-+ (set (mem QI (add (join SI HI Rb Rs) imm12)) Rdm))
-+ (set-psw-nowrite (index-of Rdm) Rdm ws2)
-+ (set Rs (add Rs (add ws2 1))))
-+ ()
-+)
-+
-+(dni movfgriipredecgr
-+ "Move far register to memory addressed by indexed register predecrement"
-+ ()
-+ ("movf$ws2 ($Rb,--$Rs,$imm12),$Rdm")
-+ (+ OP1_6 OP2A_E ws2 Rs OP4M_1 Rdm OP5A_0 Rb imm12)
-+ (sequence ()
-+ (set Rs (sub Rs 1))
-+ (set-psw-nowrite (index-of Rdm) Rdm ws2)
-+ (if ws2
-+ (set (mem HI (and (add (join SI HI Rb Rs) imm12) #xFFFFFFFE)) Rdm)
-+ (set (mem QI (add (join SI HI Rb Rs) imm12)) Rdm)))
-+ ()
-+)
-+
-+(dni maskgrgr
-+ "Mask insert controlled by general register"
-+ ()
-+ ("mask $Rd,$Rs")
-+ (+ OP1_3 OP2_3 Rs Rd)
-+ (set-psw Rd (index-of Rd) (or HI (and HI Rd (inv HI Rs)) (and (reg HI h-gr Rpsw) Rs)) 1)
-+ ()
-+)
-+
-+(dni maskgrimm16
-+ "Mask insert controlled by immediate value"
-+ ()
-+ ("mask $Rd,#$imm16")
-+ (+ OP1_3 OP2_0 OP3_E Rd imm16)
-+ (set-psw Rd (index-of Rd) (or (and Rd (inv imm16)) (and (reg HI h-gr Rpsw) imm16)) 1)
-+ ()
-+)
-+
-+; Push, Pop
-+(dni pushgr
-+ "Push register"
-+ ()
-+ ("push $Rd")
-+ (+ OP1_0 OP2_0 OP3_8 Rd)
-+ (sequence ()
-+ (set (mem HI sp) Rd)
-+ (set sp (add sp 2)))
-+ ()
-+)
-+
-+(dni popgr
-+ "Pop into a register"
-+ ()
-+ ("pop $Rd")
-+ (+ OP1_0 OP2_0 OP3_9 Rd)
-+ (sequence ()
-+ (set sp (add sp -2))
-+ (set Rd (mem HI sp)))
-+ ()
-+)
-+
-+; Swap
-+(dni swpn
-+ "Swap low nibbles"
-+ ()
-+ ("swpn $Rd")
-+ (+ OP1_3 OP2_0 OP3_9 Rd)
-+ (set-psw Rd (index-of Rd) (or (or (and (sll Rd 4) #xF0)
-+ (and (srl Rd 4) #x0F))
-+ (and Rd #xFF00)) 0)
-+ ()
-+)
-+
-+(dni swpb
-+ "Swap bytes"
-+ ()
-+ ("swpb $Rd")
-+ (+ OP1_3 OP2_0 OP3_8 Rd)
-+ (set-psw Rd (index-of Rd) (or (sll Rd 8) (srl Rd 8)) 1)
-+ ()
-+)
-+
-+(dni swpw
-+ "Swap words"
-+ ()
-+ ("swpw $Rd,$Rs")
-+ (+ OP1_3 OP2_2 Rs Rd)
-+ (sequence ((HI foo))
-+ (set foo Rs)
-+ (set Rs Rd)
-+ (set-psw Rd (index-of Rd) foo 1))
-+ ()
-+)
-+
-+; Logical Operations
-+(dni andgrgr
-+ "AND general register with general register"
-+ ()
-+ ("and $Rd,$Rs")
-+ (+ OP1_4 OP2_0 Rs Rd)
-+ (set-psw Rd (index-of Rd) (and Rd Rs) 1)
-+ ()
-+)
-+
-+(dni andimm8
-+ "AND with 8-bit immediate"
-+ ()
-+ ("and Rx,#$imm8")
-+ (+ OP1_4 OP2_1 imm8)
-+ (set-psw (reg HI h-gr Rpsw) Rpsw (and (reg HI h-gr Rpsw) imm8) 1)
-+ ()
-+)
-+
-+(dni andgrimm16
-+ "AND general register with 16-bit immediate"
-+ ()
-+ ("and $Rd,#$imm16")
-+ (+ OP1_3 OP2_1 OP3_0 Rd imm16)
-+ (set-psw Rd (index-of Rd) (and Rd imm16) 1)
-+ ()
-+)
-+
-+(dni orgrgr
-+ "OR general register with general register"
-+ ()
-+ ("or $Rd,$Rs")
-+ (+ OP1_4 OP2_2 Rs Rd)
-+ (set-psw Rd (index-of Rd) (or Rd Rs) 1)
-+ ()
-+)
-+
-+(dni orimm8
-+ "OR with 8-bit immediate"
-+ ()
-+ ("or Rx,#$imm8")
-+ (+ OP1_4 OP2_3 imm8)
-+ (set-psw (reg HI h-gr Rpsw) Rpsw (or (reg HI h-gr Rpsw) imm8) 1)
-+ ()
-+)
-+
-+(dni orgrimm16
-+ "OR general register with 16-bit immediate"
-+ ()
-+ ("or $Rd,#$imm16")
-+ (+ OP1_3 OP2_1 OP3_1 Rd imm16)
-+ (set-psw Rd (index-of Rd) (or Rd imm16) 1)
-+ ()
-+)
-+
-+(dni xorgrgr
-+ "XOR general register with general register"
-+ ()
-+ ("xor $Rd,$Rs")
-+ (+ OP1_4 OP2_4 Rs Rd)
-+ (set-psw Rd (index-of Rd) (xor Rd Rs) 1)
-+ ()
-+)
-+
-+(dni xorimm8
-+ "XOR with 8-bit immediate"
-+ ()
-+ ("xor Rx,#$imm8")
-+ (+ OP1_4 OP2_5 imm8)
-+ (set-psw (reg HI h-gr Rpsw) Rpsw (xor (reg HI h-gr Rpsw) imm8) 1)
-+ ()
-+)
-+
-+(dni xorgrimm16
-+ "XOR general register with 16-bit immediate"
-+ ()
-+ ("xor $Rd,#$imm16")
-+ (+ OP1_3 OP2_1 OP3_2 Rd imm16)
-+ (set-psw Rd (index-of Rd) (xor Rd imm16) 1)
-+ ()
-+)
-+
-+(dni notgr
-+ "NOT general register"
-+ ()
-+ ("not $Rd")
-+ (+ OP1_3 OP2_0 OP3_B Rd)
-+ (set-psw Rd (index-of Rd) (inv Rd) 1)
-+ ()
-+)
-+
-+; Arithmetic operations
-+(dni addgrgr
-+ "ADD general register to general register"
-+ ()
-+ ("add $Rd,$Rs")
-+ (+ OP1_4 OP2_9 Rs Rd)
-+ (set-psw-add Rd (index-of Rd) Rd Rs 0)
-+ ()
-+)
-+
-+(dni addgrimm4
-+ "ADD 4-bit immediate to general register"
-+ ()
-+ ("add $Rd,#$imm4")
-+ (+ OP1_5 OP2_1 imm4 Rd)
-+ (set-psw-add Rd (index-of Rd) Rd imm4 0)
-+ ()
-+)
-+
-+(dni addimm8
-+ "ADD 8-bit immediate"
-+ ()
-+ ("add Rx,#$imm8")
-+ (+ OP1_5 OP2_9 imm8)
-+ (set-psw-add (reg HI h-gr Rpsw) Rpsw (reg HI h-gr Rpsw) imm8 0)
-+ ()
-+)
-+
-+(dni addgrimm16
-+ "ADD 16-bit immediate to general register"
-+ ()
-+ ("add $Rd,#$imm16")
-+ (+ OP1_3 OP2_1 OP3_4 Rd imm16)
-+ (set-psw-add Rd (index-of Rd) Rd imm16 0)
-+ ()
-+)
-+
-+(dni adcgrgr
-+ "ADD carry and general register to general register"
-+ ()
-+ ("adc $Rd,$Rs")
-+ (+ OP1_4 OP2_B Rs Rd)
-+ (set-psw-add Rd (index-of Rd) Rd Rs psw-cy)
-+ ()
-+)
-+
-+(dni adcgrimm4
-+ "ADD carry and 4-bit immediate to general register"
-+ ()
-+ ("adc $Rd,#$imm4")
-+ (+ OP1_5 OP2_3 imm4 Rd)
-+ (set-psw-add Rd (index-of Rd) Rd imm4 psw-cy)
-+ ()
-+)
-+
-+(dni adcimm8
-+ "ADD carry and 8-bit immediate"
-+ ()
-+ ("adc Rx,#$imm8")
-+ (+ OP1_5 OP2_B imm8)
-+ (set-psw-add (reg HI h-gr Rpsw) Rpsw (reg HI h-gr Rpsw) imm8 psw-cy)
-+ ()
-+)
-+
-+(dni adcgrimm16
-+ "ADD carry and 16-bit immediate to general register"
-+ ()
-+ ("adc $Rd,#$imm16")
-+ (+ OP1_3 OP2_1 OP3_5 Rd imm16)
-+ (set-psw-add Rd (index-of Rd) Rd imm16 psw-cy)
-+ ()
-+)
-+
-+(dni subgrgr
-+ "SUB general register from general register"
-+ ()
-+ ("sub $Rd,$Rs")
-+ (+ OP1_4 OP2_D Rs Rd)
-+ (set-psw-sub Rd (index-of Rd) Rd Rs 0)
-+ ()
-+)
-+
-+(dni subgrimm4
-+ "SUB 4-bit immediate from general register"
-+ ()
-+ ("sub $Rd,#$imm4")
-+ (+ OP1_5 OP2_5 imm4 Rd)
-+ (set-psw-sub Rd (index-of Rd) Rd imm4 0)
-+ ()
-+)
-+
-+(dni subimm8
-+ "SUB 8-bit immediate"
-+ ()
-+ ("sub Rx,#$imm8")
-+ (+ OP1_5 OP2_D imm8)
-+ (set-psw-sub (reg HI h-gr Rpsw) Rpsw (reg HI h-gr Rpsw) imm8 0)
-+ ()
-+)
-+
-+(dni subgrimm16
-+ "SUB 16-bit immediate from general register"
-+ ()
-+ ("sub $Rd,#$imm16")
-+ (+ OP1_3 OP2_1 OP3_6 Rd imm16)
-+ (set-psw-sub Rd (index-of Rd) Rd imm16 0)
-+ ()
-+)
-+
-+(dni sbcgrgr
-+ "SUB carry and general register from general register"
-+ ()
-+ ("sbc $Rd,$Rs")
-+ (+ OP1_4 OP2_F Rs Rd)
-+ (set-psw-sub Rd (index-of Rd) Rd Rs psw-cy)
-+ ()
-+)
-+
-+(dni sbcgrimm4
-+ "SUB carry and 4-bit immediate from general register"
-+ ()
-+ ("sbc $Rd,#$imm4")
-+ (+ OP1_5 OP2_7 imm4 Rd)
-+ (set-psw-sub Rd (index-of Rd) Rd imm4 psw-cy)
-+ ()
-+)
-+
-+(dni sbcgrimm8
-+ "SUB carry and 8-bit immediate"
-+ ()
-+ ("sbc Rx,#$imm8")
-+ (+ OP1_5 OP2_F imm8)
-+ (set-psw-sub (reg HI h-gr Rpsw) Rpsw (reg HI h-gr Rpsw) imm8 psw-cy)
-+ ()
-+)
-+
-+(dni sbcgrimm16
-+ "SUB carry and 16-bit immediate from general register"
-+ ()
-+ ("sbc $Rd,#$imm16")
-+ (+ OP1_3 OP2_1 OP3_7 Rd imm16)
-+ (set-psw-sub Rd (index-of Rd) Rd imm16 psw-cy)
-+ ()
-+)
-+
-+(dnmi incgr
-+ "Increment general register"
-+ ()
-+ ("inc $Rd")
-+ (emit incgrimm2 Rd (imm2 0))
-+)
-+
-+(dni incgrimm2
-+ "Increment general register by 2-bit immediate"
-+ ()
-+ ("inc $Rd,#$imm2")
-+ (+ OP1_3 OP2_0 OP3A_0 imm2 Rd)
-+ (set-psw Rd (index-of Rd) (add Rd (add imm2 1)) 1)
-+ ()
-+)
-+
-+(dnmi decgr
-+ "Decrement general register"
-+ ()
-+ ("dec $Rd")
-+ (emit decgrimm2 Rd (imm2 0))
-+)
-+
-+(dni decgrimm2
-+ "Decrement general register by 2-bit immediate"
-+ ()
-+ ("dec $Rd,#$imm2")
-+ (+ OP1_3 OP2_0 OP3A_1 imm2 Rd)
-+ (set-psw Rd (index-of Rd) (sub Rd (add imm2 1)) 1)
-+ ()
-+)
-+
-+; Logical Shift
-+(dni rrcgrgr
-+ "Rotate right general register by general register"
-+ ()
-+ ("rrc $Rd,$Rs")
-+ (+ OP1_3 OP2_8 Rs Rd)
-+ (set-psw-rrotate17 Rd (index-of Rd) Rd psw-cy Rs)
-+ ()
-+)
-+
-+(dni rrcgrimm4
-+ "Rotate right general register by immediate"
-+ ()
-+ ("rrc $Rd,#$imm4")
-+ (+ OP1_3 OP2_9 imm4 Rd)
-+ (set-psw-rrotate17 Rd (index-of Rd) Rd psw-cy imm4)
-+ ()
-+)
-+
-+(dni rlcgrgr
-+ "Rotate left general register by general register"
-+ ()
-+ ("rlc $Rd,$Rs")
-+ (+ OP1_3 OP2_A Rs Rd)
-+ (set-psw-rotate17 Rd (index-of Rd) Rd psw-cy (and Rs #xF))
-+ ()
-+)
-+
-+(dni rlcgrimm4
-+ "Rotate left general register by immediate"
-+ ()
-+ ("rlc $Rd,#$imm4")
-+ (+ OP1_3 OP2_B imm4 Rd)
-+ (set-psw-rotate17 Rd (index-of Rd) Rd psw-cy imm4)
-+ ()
-+)
-+
-+(dni shrgrgr
-+ "Shift right general register by general register"
-+ ()
-+ ("shr $Rd,$Rs")
-+ (+ OP1_3 OP2_C Rs Rd)
-+ (set-psw-carry Rd (index-of Rd)
-+ (srl Rd (and Rs #xF))
-+ (and SI (if SI (eq (and Rs #xF) 0)
-+ psw-cy
-+ (srl Rd (sub (and Rs #xF) 1)))
-+ 1) 1)
-+ ()
-+)
-+
-+(dni shrgrimm
-+ "Shift right general register by immediate"
-+ ()
-+ ("shr $Rd,#$imm4")
-+ (+ OP1_3 OP2_D imm4 Rd)
-+ (set-psw-carry Rd (index-of Rd)
-+ (srl Rd imm4)
-+ (and SI (if SI (eq imm4 0)
-+ psw-cy
-+ (srl Rd (sub imm4 1)))
-+ 1) 1)
-+ ()
-+)
-+
-+(dni shlgrgr
-+ "Shift left general register by general register"
-+ ()
-+ ("shl $Rd,$Rs")
-+ (+ OP1_3 OP2_E Rs Rd)
-+ (set-psw-carry Rd (index-of Rd)
-+ (sll Rd (and Rs #xF))
-+ (srl SI (if SI (eq (and Rs #xF) 0)
-+ (sll psw-cy 15)
-+ (sll Rd (sub (and Rs #xF) 1)))
-+ 15) 1)
-+ ()
-+)
-+
-+(dni shlgrimm
-+ "Shift left general register by immediate"
-+ ()
-+ ("shl $Rd,#$imm4")
-+ (+ OP1_3 OP2_F imm4 Rd)
-+ (set-psw-carry Rd (index-of Rd)
-+ (sll Rd imm4)
-+ (srl SI (if SI (eq imm4 0)
-+ (sll psw-cy 15)
-+ (sll Rd (sub imm4 1)))
-+ 15) 1)
-+ ()
-+)
-+
-+(dni asrgrgr
-+ "Arithmetic shift right general register by general register"
-+ ()
-+ ("asr $Rd,$Rs")
-+ (+ OP1_3 OP2_6 Rs Rd)
-+ (set-psw-carry Rd (index-of Rd)
-+ (sra HI Rd (and Rs #xF))
-+ (and SI (if SI (eq (and Rs #xF) 0)
-+ psw-cy
-+ (srl Rd (sub (and Rs #xF) 1)))
-+ 1) 1)
-+ ()
-+)
-+
-+(dni asrgrimm
-+ "Arithmetic shift right general register by immediate"
-+ ()
-+ ("asr $Rd,#$imm4")
-+ (+ OP1_3 OP2_7 imm4 Rd)
-+ (set-psw-carry Rd (index-of Rd)
-+ (sra HI Rd imm4)
-+ (and SI (if SI (eq imm4 0)
-+ psw-cy
-+ (srl Rd (sub imm4 1)))
-+ 1) 1)
-+ ()
-+)
-+
-+; Bitwise operations
-+(dni set1grimm
-+ "Set bit in general register by immediate"
-+ ()
-+ ("set1 $Rd,#$imm4")
-+ (+ OP1_0 OP2_9 imm4 Rd)
-+ (set-psw Rd (index-of Rd) (or Rd (sll 1 imm4)) 1)
-+ ()
-+)
-+
-+(dni set1grgr
-+ "Set bit in general register by general register"
-+ ()
-+ ("set1 $Rd,$Rs")
-+ (+ OP1_0 OP2_B Rs Rd)
-+ (set-psw Rd (index-of Rd) (or Rd (sll 1 (and Rs #xF))) 1)
-+ ()
-+)
-+
-+(dni set1lmemimm
-+ "Set bit in low memory by immediate"
-+ ()
-+ ("set1 $lmem8,#$imm3")
-+ (+ OP1_E imm3 OP2M_1 lmem8)
-+ (set-mem-psw (mem QI lmem8) (or (mem QI lmem8) (sll 1 imm3)) 0)
-+ ()
-+)
-+(dni set1hmemimm
-+ "Set bit in high memory by immediate"
-+ ()
-+ ("set1 $hmem8,#$imm3")
-+ (+ OP1_F imm3 OP2M_1 hmem8)
-+ (set-mem-psw (mem QI hmem8) (or (mem QI hmem8) (sll 1 imm3)) 0)
-+ ()
-+)
-+
-+(dni clr1grimm
-+ "Clear bit in general register by immediate"
-+ ()
-+ ("clr1 $Rd,#$imm4")
-+ (+ OP1_0 OP2_8 imm4 Rd)
-+ (set-psw Rd (index-of Rd) (and Rd (inv (sll 1 imm4))) 1)
-+ ()
-+)
-+
-+(dni clr1grgr
-+ "Clear bit in general register by general register"
-+ ()
-+ ("clr1 $Rd,$Rs")
-+ (+ OP1_0 OP2_A Rs Rd)
-+ (set-psw Rd (index-of Rd) (and Rd (inv (sll 1 (and Rs #xF)))) 1)
-+ ()
-+)
-+
-+(dni clr1lmemimm
-+ "Clear bit in low memory"
-+ ()
-+ ("clr1 $lmem8,#$imm3")
-+ (+ OP1_E imm3 OP2M_0 lmem8)
-+ (set-mem-psw (mem QI lmem8) (and (mem QI lmem8) (inv (sll 1 imm3))) 0)
-+ ()
-+)
-+(dni clr1hmemimm
-+ "Clear bit in high memory"
-+ ()
-+ ("clr1 $hmem8,#$imm3")
-+ (+ OP1_F imm3 OP2M_0 hmem8)
-+ (set-mem-psw (mem QI hmem8) (and (mem QI hmem8) (inv (sll 1 imm3))) 0)
-+ ()
-+)
-+
-+; Data conversion
-+
-+(dni cbwgr
-+ "Sign-extend byte in general register"
-+ ()
-+ ("cbw $Rd")
-+ (+ OP1_3 OP2_0 OP3_A Rd)
-+ (set-psw Rd (index-of Rd) (ext HI (trunc QI Rd)) 1)
-+ ()
-+)
-+
-+(dni revgr
-+ "Reverse bit pattern in general register"
-+ ()
-+ ("rev $Rd")
-+ (+ OP1_3 OP2_0 OP3_F Rd)
-+ (set-psw Rd (index-of Rd)
-+ (or (sll (and Rd #x0001) 15)
-+ (or (sll (and Rd #x0002) 13)
-+ (or (sll (and Rd #x0004) 11)
-+ (or (sll (and Rd #x0008) 9)
-+ (or (sll (and Rd #x0010) 7)
-+ (or (sll (and Rd #x0020) 5)
-+ (or (sll (and Rd #x0040) 3)
-+ (or (sll (and Rd #x0080) 1)
-+ (or (srl (and Rd #x0100) 1)
-+ (or (srl (and Rd #x0200) 3)
-+ (or (srl (and Rd #x0400) 5)
-+ (or (srl (and Rd #x0800) 7)
-+ (or (srl (and Rd #x1000) 9)
-+ (or (srl (and Rd #x2000) 11)
-+ (or (srl (and Rd #x4000) 13)
-+ (srl (and Rd #x8000) 15))))))))))))))))
-+ 1)
-+ ()
-+)
-+
-+; Conditional Branches
-+
-+(define-pmacro (cbranch cond dest)
-+ (sequence ((BI tmp))
-+ (case cond
-+ ((0) (set tmp (not (xor psw-s psw-ov)))) ; ge
-+ ((1) (set tmp (not psw-cy))) ; nc
-+ ((2) (set tmp (xor psw-s psw-ov))) ; lt
-+ ((3) (set tmp psw-cy)) ; c
-+ ((4) (set tmp (not (or (xor psw-s psw-ov) psw-z16)))) ; gt
-+ ((5) (set tmp (not (or psw-cy psw-z16)))) ; hi
-+ ((6) (set tmp (or (xor psw-s psw-ov) psw-z16))) ; le
-+ ((7) (set tmp (or psw-cy psw-z16))) ; ls
-+ ((8) (set tmp (not psw-s))) ; pl
-+ ((9) (set tmp (not psw-ov))) ; nv
-+ ((10) (set tmp psw-s)) ; mi
-+ ((11) (set tmp psw-ov)) ; v
-+ ((12) (set tmp (not psw-z8))) ; nz.b
-+ ((13) (set tmp (not psw-z16))) ; nz
-+ ((14) (set tmp psw-z8)) ; z.b
-+ ((15) (set tmp psw-z16))) ; z
-+ (if tmp (set pc dest)))
-+)
-+
-+(dni bccgrgr
-+ "Conditional branch comparing general register with general register"
-+ ()
-+ ("b$bcond5 $Rd,$Rs,$rel12")
-+ (+ OP1_0 OP2_D Rs Rd bcond5 rel12)
-+ (sequence ()
-+ (set-psw-cmp Rd (index-of Rd) Rd Rs)
-+ (cbranch bcond5 rel12))
-+ ()
-+)
-+
-+; 4 bytes
-+(dni bccgrimm8
-+ "Conditional branch comparing general register with 8-bit immediate"
-+ ()
-+ ("b$bcond5 $Rm,#$imm8,$rel12")
-+ (+ OP1_2 OP2M_0 Rm imm8 bcond5 rel12)
-+ (sequence ()
-+ (set-psw-cmp Rm (index-of Rm) Rm imm8)
-+ (cbranch bcond5 rel12))
-+ ()
-+)
-+
-+; 4 bytes
-+(dni bccimm16
-+ "Conditional branch comparing general register with 16-bit immediate"
-+ ()
-+ ("b$bcond2 Rx,#$imm16,${rel8-4}")
-+ (+ OP1_C bcond2 rel8-4 imm16)
-+ (sequence ()
-+ (set-psw-cmp (reg HI h-gr Rpsw) Rpsw (reg HI h-gr Rpsw) imm16)
-+ (cbranch bcond2 rel8-4))
-+ ()
-+)
-+
-+(dni bngrimm4
-+ "Test bit in general register by immediate and branch if 0"
-+ ()
-+ ("bn $Rd,#$imm4,$rel12")
-+ (+ OP1_0 OP2_4 imm4 Rd OP5_0 rel12)
-+ (sequence ()
-+ (set Rpsw (index-of Rd))
-+ (if (eq (and Rd (sll 1 imm4)) 0)
-+ (set pc rel12)))
-+ ()
-+)
-+
-+(dni bngrgr
-+ "Test bit in general register by general register and branch if 0"
-+ ()
-+ ("bn $Rd,$Rs,$rel12")
-+ (+ OP1_0 OP2_6 Rs Rd OP5_0 rel12)
-+ (sequence ()
-+ (set Rpsw (index-of Rd))
-+ (if (eq (and Rd (sll 1 Rs)) 0)
-+ (set pc rel12)))
-+ ()
-+)
-+
-+(dni bnlmemimm
-+ "Test bit in memory by immediate and branch if 0"
-+ ()
-+ ("bn $lmem8,#$imm3b,$rel12")
-+ (+ OP1_7 OP2_C lmem8 OP5A_0 imm3b rel12)
-+ (if (eq (and (mem QI lmem8) (sll 1 imm3b)) 0)
-+ (set pc rel12))
-+ ()
-+)
-+
-+(dni bnhmemimm
-+ "Test bit in memory by immediate and branch if 0"
-+ ()
-+ ("bn $hmem8,#$imm3b,$rel12")
-+ (+ OP1_7 OP2_E hmem8 OP5A_0 imm3b rel12)
-+ (if (eq (and (mem QI hmem8) (sll 1 imm3b)) 0)
-+ (set pc rel12))
-+ ()
-+)
-+
-+(dni bpgrimm4
-+ "Test bit in general register by immediate and branch if 1"
-+ ()
-+ ("bp $Rd,#$imm4,$rel12")
-+ (+ OP1_0 OP2_5 imm4 Rd OP5_0 rel12)
-+ (sequence ()
-+ (set Rpsw (index-of Rd))
-+ (if (ne (and Rd (sll 1 imm4)) 0)
-+ (set pc rel12)))
-+ ()
-+)
-+
-+(dni bpgrgr
-+ "Test bit in general register by general register and branch if 1"
-+ ()
-+ ("bp $Rd,$Rs,$rel12")
-+ (+ OP1_0 OP2_7 Rs Rd OP5_0 rel12)
-+ (sequence ()
-+ (set Rpsw (index-of Rd))
-+ (if (ne (and Rd (sll 1 Rs)) 0)
-+ (set pc rel12)))
-+ ()
-+)
-+
-+(dni bplmemimm
-+ "Test bit in memory by immediate and branch if 1"
-+ ()
-+ ("bp $lmem8,#$imm3b,$rel12")
-+ (+ OP1_7 OP2_D lmem8 OP5A_0 imm3b rel12)
-+ (if (ne (and (mem QI lmem8) (sll 1 imm3b)) 0)
-+ (set pc rel12))
-+ ()
-+)
-+
-+(dni bphmemimm
-+ "Test bit in memory by immediate and branch if 1"
-+ ()
-+ ("bp $hmem8,#$imm3b,$rel12")
-+ (+ OP1_7 OP2_F hmem8 OP5A_0 imm3b rel12)
-+ (if (ne (and (mem QI hmem8) (sll 1 imm3b)) 0)
-+ (set pc rel12))
-+ ()
-+)
-+
-+(dni bcc
-+ "Conditional branch on flag registers"
-+ ()
-+ ("b$bcond2 ${rel8-2}")
-+ (+ OP1_D bcond2 rel8-2)
-+ (cbranch bcond2 rel8-2)
-+ ()
-+)
-+
-+; Unconditional Branching
-+
-+(dni bgr
-+ "Branch to register"
-+ ()
-+ ("br $Rd")
-+ (+ OP1_0 OP2_0 OP3_2 Rd)
-+ (set pc (add (add pc 2) Rd))
-+ ()
-+)
-+
-+(dni br
-+ "Branch"
-+ ()
-+ ("br $rel12a")
-+ (+ OP1_1 rel12a OP4B_0)
-+ (set pc rel12a)
-+ ()
-+)
-+
-+(dni jmp
-+ "Jump"
-+ ()
-+ ("jmp $Rbj,$Rd")
-+ (+ OP1_0 OP2_0 OP3B_4 Rbj Rd)
-+ (set pc (join SI HI Rbj Rd))
-+ ()
-+)
-+
-+(dni jmpf
-+ "Jump far"
-+ ()
-+ ("jmpf $abs24")
-+ (+ OP1_0 OP2_2 abs24)
-+ (set pc abs24)
-+ ()
-+)
-+
-+; Call instructions
-+(define-pmacro (do-call dest ilen)
-+ (sequence ()
-+ (set (mem SI sp) (add pc ilen))
-+ (set sp (add sp 4))
-+ (set pc dest)))
-+
-+(dni callrgr
-+ "Call relative to general register"
-+ ()
-+ ("callr $Rd")
-+ (+ OP1_0 OP2_0 OP3_1 Rd)
-+ (do-call (add Rd (add pc 2)) 2)
-+ ()
-+)
-+
-+(dni callrimm
-+ "Call relative to immediate address"
-+ ()
-+ ("callr $rel12a")
-+ (+ OP1_1 rel12a OP4B_1)
-+ (do-call rel12a 2)
-+ ()
-+)
-+
-+(dni callgr
-+ "Call to general registers"
-+ ()
-+ ("call $Rbj,$Rd")
-+ (+ OP1_0 OP2_0 OP3B_A Rbj Rd)
-+ (do-call (join SI HI Rbj Rd) 2)
-+ ()
-+)
-+
-+(dni callfimm
-+ "Call far to absolute address"
-+ ()
-+ ("callf $abs24")
-+ (+ OP1_0 OP2_1 abs24)
-+ (do-call abs24 4)
-+ ()
-+)
-+
-+(define-pmacro (do-calli dest ilen)
-+ (sequence ()
-+ (set (mem SI sp) (add pc ilen))
-+ (set (mem HI (add sp 4)) psw)
-+ (set sp (add sp 6))
-+ (set pc dest)))
-+
-+(dni icallrgr
-+ "Call interrupt to general registers pc-relative"
-+ ()
-+ ("icallr $Rd")
-+ (+ OP1_0 OP2_0 OP3_3 Rd)
-+ (do-calli (add Rd (add pc 2)) 2)
-+ ()
-+)
-+
-+(dni icallgr
-+ "Call interrupt to general registers"
-+ ()
-+ ("icall $Rbj,$Rd")
-+ (+ OP1_0 OP2_0 OP3B_6 Rbj Rd)
-+ (do-calli (join SI HI Rbj Rd) 2)
-+ ()
-+)
-+
-+(dni icallfimm
-+ "Call interrupt far to absolute address"
-+ ()
-+ ("icallf $abs24")
-+ (+ OP1_0 OP2_3 abs24)
-+ (do-calli abs24 4)
-+ ()
-+)
-+
-+; Return instructions
-+(dni iret
-+ "Return from interrupt"
-+ ()
-+ ("iret")
-+ (+ (f-op #x0002))
-+ (sequence ()
-+ (set sp (sub sp 6))
-+ (set pc (mem SI sp))
-+ (set psw (mem HI (add sp 4))))
-+ ()
-+)
-+
-+(dni ret
-+ "Return"
-+ ()
-+ ("ret")
-+ (+ (f-op #x0003))
-+ (sequence ()
-+ (set sp (sub sp 4))
-+ (set pc (mem SI sp)))
-+ ()
-+)
-+
-+; Multiply and Divide instructions
-+
-+(dni mul
-+ "Multiply"
-+ ()
-+ ("mul")
-+ (+ (f-op #x00D0))
-+ (sequence ((SI value))
-+ (set value (mul SI (and SI R0 #xFFFF) (and SI R2 #xFFFF)))
-+ (set psw (or (and psw #xFF9C)
-+ (basic-psw (trunc HI value) 1)))
-+ (set R0 (trunc HI value))
-+ (set R1 (trunc HI (srl value 16))))
-+ ()
-+)
-+(dni div
-+ "Divide"
-+ ()
-+ ("div")
-+ (+ (f-op #x00C0))
-+ (sequence ()
-+ (set R1 (umod R0 R2))
-+ (set-mem-psw R0 (udiv R0 R2) 1))
-+ ()
-+)
-+(dni sdiv
-+ "Signed Divide"
-+ ()
-+ ("sdiv")
-+ (+ (f-op #x00C8))
-+ (sequence ()
-+ (set R1 (mod HI R0 R2))
-+ (set-mem-psw R0 (div HI R0 R2) 1))
-+ ()
-+)
-+(dni sdivlh
-+ "Divide 32/16"
-+ ()
-+ ("sdivlh")
-+ (+ (f-op #x00E8))
-+ (sequence ((SI value))
-+ (set value (add SI (sll SI (and SI R1 #xffff) #x10) (and SI R0 #xffff)))
-+ (set R1 (mod SI value (ext SI (trunc HI R2))))
-+ (set-mem-psw R0 (div SI value (ext SI (trunc HI R2))) 1))
-+ ()
-+)
-+(dni divlh
-+ "Divide 32/16"
-+ ()
-+ ("divlh")
-+ (+ (f-op #x00E0))
-+ (sequence ((SI value))
-+ (set value (add SI (sll SI (and SI R1 #xffff) #x10) (and SI R0 #xffff)))
-+ (set R1 (umod SI value R2))
-+ (set-mem-psw R0 (udiv SI value R2) 1))
-+ ()
-+)
-+
-+; System Control
-+
-+; added per sanyo's req -- eq to nop for the moment, but can
-+; add function later
-+(dni reset "reset" () ("reset") (+ (f-op #x000f)) (nop) ())
-+
-+(dni nop "nop" () ("nop") (+ (f-op #x0000)) (nop) ())
-+
-+(dni halt "halt" () ("halt") (+ (f-op #x0008)) (c-call VOID "do_halt") ())
-+
-+(dni hold "hold" () ("hold") (+ (f-op #x000A)) (c-call VOID "do_hold") ())
-+
-+(dni holdx "holdx" () ("holdx") (+ (f-op #x000B)) (c-call VOID "do_holdx") ())
-+
-+(dni brk "brk" () ("brk") (+ (f-op #x0005)) (c-call VOID "do_brk") ())
-+
-+; An instruction for test instrumentation.
-+; Using a reserved opcode.
-+(dni syscall
-+ "simulator system call"
-+ ()
-+ ("--unused--")
-+ (+ (f-op #x0001))
-+ (c-call VOID "syscall")
-+ ()
-+)
-diff -Nur binutils-2.24.orig/cgen/cpu/xstormy16.opc binutils-2.24/cgen/cpu/xstormy16.opc
---- binutils-2.24.orig/cgen/cpu/xstormy16.opc 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/cpu/xstormy16.opc 2016-06-30 21:26:12.649892956 +0200
-@@ -0,0 +1,150 @@
-+/* XSTORMY16 opcode support. -*- C -*-
-+ Copyright (C) 2001, 2002, 2005 Red Hat, Inc.
-+ This file is part of CGEN. */
-+
-+/* This file is an addendum to xstormy16.cpu. Heavy use of C code isn't
-+ appropriate in .cpu files, so it resides here. This especially applies
-+ to assembly/disassembly where parsing/printing can be quite involved.
-+ Such things aren't really part of the specification of the cpu, per se,
-+ so .cpu files provide the general framework and .opc files handle the
-+ nitty-gritty details as necessary.
-+
-+ Each section is delimited with start and end markers.
-+
-+ <arch>-opc.h additions use: "-- opc.h"
-+ <arch>-opc.c additions use: "-- opc.c"
-+ <arch>-asm.c additions use: "-- asm.c"
-+ <arch>-dis.c additions use: "-- dis.c"
-+ <arch>-ibd.h additions use: "-- ibd.h". */
-+
-+/* -- opc.h */
-+
-+/* Allows reason codes to be output when assembler errors occur. */
-+#define CGEN_VERBOSE_ASSEMBLER_ERRORS
-+
-+/* We can't use the default hash size because many bits are used by
-+ operands. */
-+#define CGEN_DIS_HASH_SIZE 1
-+#define CGEN_DIS_HASH(buf, value) 0
-+/* -- */
-+
-+/* -- asm.c */
-+
-+/* The machine-independent code doesn't know how to disambiguate
-+ mov (foo),r3
-+ and
-+ mov (r2),r3
-+ where 'foo' is a label. This helps it out. */
-+
-+static const char *
-+parse_mem8 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ if (**strp == '(')
-+ {
-+ const char *s = *strp;
-+
-+ if (s[1] == '-' && s[2] == '-')
-+ return _("Bad register in preincrement");
-+
-+ while (ISALNUM (*++s))
-+ ;
-+ if (s[0] == '+' && s[1] == '+' && (s[2] == ')' || s[2] == ','))
-+ return _("Bad register in postincrement");
-+ if (s[0] == ',' || s[0] == ')')
-+ return _("Bad register name");
-+ }
-+ else if (cgen_parse_keyword (cd, strp, & xstormy16_cgen_opval_gr_names,
-+ (long *) valuep) == NULL)
-+ return _("Label conflicts with register name");
-+ else if (strncasecmp (*strp, "rx,", 3) == 0
-+ || strncasecmp (*strp, "rxl,", 3) == 0
-+ || strncasecmp (*strp, "rxh,", 3) == 0)
-+ return _("Label conflicts with `Rx'");
-+ else if (**strp == '#')
-+ return _("Bad immediate expression");
-+
-+ return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
-+}
-+
-+/* For the add and subtract instructions, there are two immediate forms,
-+ one for small operands and one for large ones. We want to use
-+ the small one when possible, but we do not want to generate relocs
-+ of the small size. This is somewhat tricky. */
-+
-+static const char *
-+parse_small_immediate (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ bfd_vma value;
-+ enum cgen_parse_operand_result result;
-+ const char *errmsg;
-+
-+ if (**strp == '@')
-+ return _("No relocation for small immediate");
-+
-+ errmsg = (* cd->parse_operand_fn)
-+ (cd, CGEN_PARSE_OPERAND_INTEGER, strp, opindex, BFD_RELOC_NONE,
-+ & result, & value);
-+
-+ if (errmsg)
-+ return errmsg;
-+
-+ if (result != CGEN_PARSE_OPERAND_RESULT_NUMBER)
-+ return _("Small operand was not an immediate number");
-+
-+ *valuep = value;
-+ return NULL;
-+}
-+
-+/* Literal scan be either a normal literal, a @hi() or @lo relocation. */
-+
-+static const char *
-+parse_immediate16 (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep)
-+{
-+ const char *errmsg;
-+ enum cgen_parse_operand_result result;
-+ bfd_reloc_code_real_type code = BFD_RELOC_NONE;
-+ bfd_vma value;
-+
-+ if (strncmp (*strp, "@hi(", 4) == 0)
-+ {
-+ *strp += 4;
-+ code = BFD_RELOC_HI16;
-+ }
-+ else
-+ if (strncmp (*strp, "@lo(", 4) == 0)
-+ {
-+ *strp += 4;
-+ code = BFD_RELOC_LO16;
-+ }
-+
-+ if (code == BFD_RELOC_NONE)
-+ errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
-+ else
-+ {
-+ errmsg = cgen_parse_address (cd, strp, opindex, code, &result, &value);
-+ if ((errmsg == NULL) &&
-+ (result != CGEN_PARSE_OPERAND_RESULT_QUEUED))
-+ errmsg = _("Operand is not a symbol");
-+
-+ *valuep = value;
-+ if ((code == BFD_RELOC_HI16 || code == BFD_RELOC_LO16)
-+ && **strp == ')')
-+ *strp += 1;
-+ else
-+ {
-+ errmsg = _("Syntax error: No trailing ')'");
-+ return errmsg;
-+ }
-+ }
-+ return errmsg;
-+}
-+/* -- */
-diff -Nur binutils-2.24.orig/cgen/decode.scm binutils-2.24/cgen/decode.scm
---- binutils-2.24.orig/cgen/decode.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/decode.scm 2016-06-30 21:26:12.649892956 +0200
-@@ -0,0 +1,761 @@
-+; Application independent decoder support.
-+; Copyright (C) 2000, 2004, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+;
-+; This file provides utilities for building instruction set decoders.
-+; At present its rather limited, and is geared towards the simulator
-+; where the goal is hyper-efficiency [not that there isn't room for much
-+; improvement, but rather that that's what the current focus is].
-+;
-+; The CPU description file provides the first pass's bit mask with the
-+; `decode-assist' spec. This gives the decoder a head start on how to
-+; efficiently decode the instruction set. The rest of the decoder is
-+; determined algorithmically.
-+; ??? Need to say more here.
-+;
-+; The main entry point is decode-build-table.
-+;
-+; Main procedure call tree:
-+; decode-build-table
-+; /build-slots
-+; /build-decode-table-guts
-+; /build-decode-table-entry
-+; /build-slots
-+; /build-decode-table-guts
-+;
-+; /build-slots//build-decode-table-guts are recursively called to construct a
-+; tree of "table-guts" elements, and then the application recurses on the
-+; result. For example see sim-decode.scm.
-+;
-+; The decoder exits when insns are unambiguously determined, even if there are
-+; more opcode bits to examine, leaving it to the caller to validate any
-+; remaining bits.
-+;
-+; FIXME: Don't create more than 3 shifts (i.e. no more than 3 groups).
-+
-+; Decoder data structures and accessors.
-+; The set of instruction is internally recorded as a tree of two data
-+; structures: "table-guts" and "table-entry".
-+; [The choice of "table-guts" is historical, a better name will come to mind
-+; eventually.]
-+
-+; Decoded tables data structure, termed "dtable-guts".
-+; A simple data structure of 4 elements:
-+; bitnums: list of bits that have been used thus far to decode the insn
-+; startbit: bit offset in instruction of value in C local variable `insn'
-+; (note that this is independent of LSB0?)
-+; bitsize: size of value in C local variable `insn'
-+; entries: list of insns that match the decoding thus far,
-+; each entry in the list is a `dtable-entry' record
-+
-+(define (dtable-guts-make bitnums startbit bitsize entries)
-+ (vector bitnums startbit bitsize entries)
-+)
-+
-+; Accessors.
-+(define (dtable-guts-bitnums tg) (vector-ref tg 0))
-+(define (dtable-guts-startbit tg) (vector-ref tg 1))
-+(define (dtable-guts-bitsize tg) (vector-ref tg 2))
-+(define (dtable-guts-entries tg) (vector-ref tg 3))
-+
-+; A decoded subtable.
-+; A simple data structure of 3 elements:
-+; key: name to distinguish this subtable from others, used for lookup
-+; table: a table-guts element
-+; name: name of C variable containing the table
-+;
-+; The implementation uses a list so the lookup can use assv.
-+
-+(define (subdtable-make key table name)
-+ (list key table name)
-+)
-+
-+; Accessors.
-+(define (subdtable-key st) (car st))
-+(define (subdtable-table st) (cadr st))
-+(define (subdtable-name st) (caddr st))
-+
-+; List of decode subtables.
-+(define /decode-subtables nil)
-+
-+(define (subdtable-lookup key) (assv key /decode-subtables))
-+
-+; Add SUBTABLE-GUTS to the subtables list if not already present.
-+; Result is the subtable entry already present, or new entry.
-+; The key is computed so as to make comparisons possible with assv.
-+
-+(define (subdtable-add subtable-guts name)
-+ (let* ((key (string->symbol
-+ (string-append
-+ (numbers->string (dtable-guts-bitnums subtable-guts) " ")
-+ " " (number->string (dtable-guts-bitsize subtable-guts))
-+ (string-map
-+ (lambda (elm)
-+ (case (dtable-entry-type elm)
-+ ((insn)
-+ (stringsym-append " " (obj:name (dtable-entry-value elm))))
-+ ((table)
-+ (stringsym-append " " (subdtable-name (dtable-entry-value elm))))
-+ ((expr)
-+ (stringsym-append " " (exprtable-name (dtable-entry-value elm))))
-+ (else (error "bad dtable entry type:"
-+ (dtable-entry-type elm)))))
-+ (dtable-guts-entries subtable-guts)))))
-+ (entry (subdtable-lookup key)))
-+ (if (not entry)
-+ (begin
-+ (set! /decode-subtables (cons (subdtable-make key subtable-guts name)
-+ /decode-subtables))
-+ (car /decode-subtables))
-+ entry))
-+)
-+
-+; An instruction and predicate for final matching.
-+
-+(define (exprtable-entry-make insn expr)
-+ (vector insn expr (rtl-find-ifields expr))
-+)
-+
-+; Accessors.
-+
-+(define (exprtable-entry-insn entry) (vector-ref entry 0))
-+(define (exprtable-entry-expr entry) (vector-ref entry 1))
-+(define (exprtable-entry-iflds entry) (vector-ref entry 2))
-+
-+; Return a pseudo-cost of processing exprentry X.
-+
-+(define (exprentry-cost x)
-+ (let ((expr (exprtable-entry-expr x)))
-+ (case (rtx-name expr)
-+ ((member) (length (rtx-member-set expr)))
-+ (else 4)))
-+)
-+
-+; Sort an exprtable, optimum choices first.
-+; Basically an optimum choice is a cheaper choice.
-+
-+(define (exprtable-sort expr-list)
-+ (sort expr-list
-+ (lambda (a b)
-+ (let ((costa (exprentry-cost a))
-+ (costb (exprentry-cost b)))
-+ (< costa costb))))
-+)
-+
-+; Return the name of the expr table for INSN-EXPRS,
-+; which is a list of exprtable-entry elements.
-+
-+(define (/gen-exprtable-name insn-exprs)
-+ (string-map (lambda (x)
-+ (string-append (obj:str-name (exprtable-entry-insn x))
-+ "-"
-+ (rtx-strdump (exprtable-entry-expr x))))
-+ insn-exprs)
-+)
-+
-+; A set of instructions that need expressions to distinguish.
-+; Typically the expressions are ifield-assertion specs.
-+; INSN-EXPRS is a sorted list of exprtable-entry elements.
-+; The list is considered sorted in the sense that the first insn to satisfy
-+; its predicate is chosen.
-+
-+(define (exprtable-make name insn-exprs)
-+ (vector name insn-exprs)
-+)
-+
-+; Accessors.
-+
-+(define (exprtable-name etable) (vector-ref etable 0))
-+(define (exprtable-insns etable) (vector-ref etable 1))
-+
-+; Decoded table entry data structure.
-+; A simple data structure of 3 elements:
-+; index: index in the parent table
-+; entry type indicator: 'insn or 'table or 'expr
-+; value: the insn or subtable or exprtable
-+
-+(define (dtable-entry-make index type value)
-+ (assert value)
-+ (vector index type value)
-+)
-+
-+; Accessors.
-+(define (dtable-entry-index te) (vector-ref te 0))
-+(define (dtable-entry-type te) (vector-ref te 1))
-+(define (dtable-entry-value te) (vector-ref te 2))
-+
-+; Return #t if BITNUM is a good bit to use for decoding.
-+; MASKS is a list of opcode masks.
-+; MASK-LENS is a list of lengths of each value in MASKS.
-+; BITNUM is the number of the bit to test. It's value depends on LSB0?.
-+; It can be no larger than the smallest element in MASKS.
-+; E.g. If MASK-LENS consists of 16 and 32 and LSB0? is #f, BITNUM must
-+; be from 0 to 15.
-+; FIXME: This isn't quite right. What if LSB0? = #t? Need decode-bitsize.
-+; LSB0? is non-#f if bit number 0 is the least significant bit.
-+;
-+; FIXME: This is just a first cut, but the governing intent is to not require
-+; targets to specify decode tables, hints, or algorithms.
-+; Certainly as it becomes useful they can supply such information.
-+; The point is to avoid having to as much as possible.
-+;
-+; FIXME: Bit numbers shouldn't be considered in isolation.
-+; It would be better to compute use counts of all of them and then see
-+; if there's a cluster of high use counts.
-+
-+(define (/usable-decode-bit? masks mask-lens bitnum lsb0?)
-+ (let* ((has-bit (map (lambda (msk len)
-+ (bit-set? msk (if lsb0? bitnum (- len bitnum 1))))
-+ masks mask-lens)))
-+ (or (all-true? has-bit)
-+ ; If half or more insns use the bit, it's a good one.
-+ ; FIXME: An empirical guess at best.
-+ (>= (count-true has-bit) (quotient (length has-bit) 2))
-+ ))
-+)
-+
-+; Compute population counts for each bit. Return it as a vector indexed by bit
-+; number. Rather than computing raw popularity, attempt to compute
-+; "disinguishing value" or inverse-entropy for each bit. The idea is that the
-+; larger the number for any particular bit slot, the more instructions it can
-+; be used to distinguish. Raw mask popularity is not enough -- popular masks
-+; may include useless "reserved" fields whose values don't change, and thus are
-+; useless in distinguishing.
-+;
-+; NOTE: mask-lens are not necessarily all the same value.
-+; E.g. for the m32r it can consist of both 16 and 32.
-+; But all masks must exist in the window specified by STARTBIT,DECODE-BITSIZE,
-+; and all bits in the result must live in that window.
-+; If no distinguishing bit fits in the window, return an empty vector.
-+
-+(define (/distinguishing-bit-population masks mask-lens values lsb0?)
-+ (let* ((max-length (apply max mask-lens))
-+ (0-population (make-vector max-length 0))
-+ (1-population (make-vector max-length 0))
-+ (num-insns (length masks)))
-+ ; Compute the 1- and 0-population vectors
-+ (for-each (lambda (mask len value)
-+ (logit 5 " population count mask=" (number->hex mask) " len=" len "\n")
-+ (for-each (lambda (bitno)
-+ (let ((lsb-bitno (if lsb0? bitno (- len bitno 1))))
-+ ; ignore this bit if it's not set in the mask
-+ (if (bit-set? mask lsb-bitno)
-+ (let ((chosen-pop-vector (if (bit-set? value lsb-bitno)
-+ 1-population 0-population)))
-+ (vector-set! chosen-pop-vector bitno
-+ (+ 1 (vector-ref chosen-pop-vector bitno)))))))
-+ (/range len)))
-+ masks mask-lens values)
-+ ; Compute an aggregate "distinguishing value" for each bit.
-+ (list->vector
-+ (map (lambda (p0 p1)
-+ (logit 4 p0 "/" p1 " ")
-+ ; The most useful bits for decoding are those with counts in both
-+ ; p0 and p1. These are the bits which distinguish one insn from
-+ ; another. Assign these bits a high value (greater than num-insns).
-+ ;
-+ ; The next most useful bits are those with counts in either p0
-+ ; or p1. These bits represent specializations of other insns.
-+ ; Assign these bits a value between 0 and (num-insns - 1). Note that
-+ ; p0 + p1 is guaranteed to be <= num-insns. The value 0 is assigned
-+ ; to bits for which p0 or p1 is equal to num_insns. These are bits
-+ ; which are always 1 or always 0 in the ISA and are useless for
-+ ; decoding purposes.
-+ ;
-+ ; Bits with no count in either p0 or p1 are useless for decoding
-+ ; and should never be considered. Assigning these bits a value of
-+ ; 0 ensures this.
-+ (cond
-+ ((= (+ p0 p1) 0) 0)
-+ ((= (* p0 p1) 0) (- num-insns (+ p0 p1)))
-+ (else (+ num-insns (sqrt (* p0 p1))))))
-+ (vector->list 0-population) (vector->list 1-population))))
-+)
-+
-+; Return a list (0 ... LIMIT-1).
-+
-+(define (/range limit)
-+ (let loop ((i 0)
-+ (indices (list)))
-+ (if (= i limit)
-+ (reverse! indices)
-+ (loop (+ i 1) (cons i indices))))
-+)
-+
-+; Return a list (BASE ... BASE+SIZE-1).
-+
-+(define (/range2 base size)
-+ (let loop ((i base)
-+ (indices (list)))
-+ (if (= i (+ base size))
-+ (reverse! indices)
-+ (loop (+ i 1) (cons i indices))))
-+)
-+
-+; Return a copy of VECTOR, with all entries with given INDICES set
-+; to VALUE.
-+
-+(define (/vector-copy-set-all vector indices value)
-+ (let ((new-vector (make-vector (vector-length vector))))
-+ (for-each (lambda (index)
-+ (vector-set! new-vector index (if (memq index indices)
-+ value
-+ (vector-ref vector index))))
-+ (/range (vector-length vector)))
-+ new-vector)
-+)
-+
-+; Return a list of indices whose counts in the given vector exceed the given
-+; threshold.
-+; Sort them in decreasing order of popularity.
-+
-+(define (/population-above-threshold population threshold)
-+ (let* ((unsorted
-+ (find (lambda (index) (if (vector-ref population index)
-+ (>= (vector-ref population index) threshold)
-+ #f))
-+ (/range (vector-length population))))
-+ (sorted
-+ (sort unsorted (lambda (i1 i2) (> (vector-ref population i1)
-+ (vector-ref population i2))))))
-+ sorted)
-+)
-+
-+; Return the top few most popular indices in the population vector,
-+; ignoring any that are already used (marked by #f). Don't exceed
-+; `size' unless the clustering is just too good to pass up.
-+
-+(define (/population-top-few population size)
-+ (let loop ((old-picks (list))
-+ (remaining-population population)
-+ (count-threshold (apply max (map (lambda (value) (or value 0))
-+ (vector->list population)))))
-+ (let* ((new-picks (/population-above-threshold remaining-population count-threshold)))
-+ (logit 4 "/population-top-few"
-+ " desired=" size
-+ " picks=(" old-picks ") pop=(" remaining-population ")"
-+ " threshold=" count-threshold " new-picks=(" new-picks ")\n")
-+ (cond
-+ ; No point picking bits with population count of zero. This leads to
-+ ; the generation of layers of subtables which resolve nothing. Generating
-+ ; these tables can slow the build by several orders of magnitude.
-+ ((= 0 count-threshold)
-+ (logit 2 "/population-top-few: count-threshold is zero!\n")
-+ old-picks)
-+ ; No new matches?
-+ ((null? new-picks)
-+ (if (null? old-picks)
-+ (logit 2 "/population-top-few: No bits left to pick from!\n"))
-+ old-picks)
-+ ; Way too many matches?
-+ ((> (+ (length new-picks) (length old-picks)) (+ size 3))
-+ (list-take (+ 3 size) (append old-picks new-picks))) ; prefer old-picks
-+ ; About right number of matches?
-+ ((> (+ (length new-picks) (length old-picks)) (- size 1))
-+ (append old-picks new-picks))
-+ ; Not enough? Lower the threshold a bit and try to add some more.
-+ (else
-+ (loop (append old-picks new-picks)
-+ (/vector-copy-set-all remaining-population new-picks #f)
-+ ; Notice magic clustering decay parameter
-+ ; vvvv
-+ (* 0.75 count-threshold))))))
-+)
-+
-+; Given list of insns, return list of bit numbers of constant bits in opcode
-+; that they all share (or mostly share), up to MAX elements.
-+; ALREADY-USED is a list of bitnums we can't use.
-+; STARTBIT is the bit offset of the instruction value that C variable `insn'
-+; holds (note that this is independent of LSB0?).
-+; DECODE-BITSIZE is the number of bits of the insn that `insn' holds.
-+; LSB0? is non-#f if bit number 0 is the least significant bit.
-+;
-+; Nil is returned if there are none, meaning that there is an ambiguity in
-+; the specification up to the current word as defined by startbit,
-+; decode-bitsize, and more bytes need to be fetched.
-+;
-+; We assume INSN-LIST matches all opcode bits before STARTBIT (if any).
-+; FIXME: Revisit, as a more optimal decoder is sometimes achieved by doing
-+; a cluster of opcode bits that appear later in the insn, and then coming
-+; back to earlier ones.
-+;
-+; All insns are assumed to start at the same address so we handle insns of
-+; varying lengths - we only analyze the common bits in all of them.
-+;
-+; Note that if we get called again to compute further opcode bits, we
-+; start looking at STARTBIT again (rather than keeping track of how far in
-+; the insn word we've progressed). We could do this as an optimization, but
-+; we also have to handle the case where the initial set of decode bits misses
-+; some and thus we have to go back and look at them. It may also turn out
-+; that an opcode bit is skipped over because it doesn't contribute much
-+; information to the decoding process (see /usable-decode-bit?). As the
-+; possible insn list gets wittled down, the bit will become significant. Thus
-+; the optimization is left for later.
-+; Also, see preceding FIXME: We can't proceed past startbit + decode-bitsize
-+; until we've processed all bits up to startbit + decode-bitsize.
-+
-+(define (decode-get-best-bits insn-list already-used startbit max decode-bitsize lsb0?)
-+ (let* ((raw-population (/distinguishing-bit-population (map insn-base-mask insn-list)
-+ (map insn-base-mask-length insn-list)
-+ (map insn-value insn-list)
-+ lsb0?))
-+ ;; (undecoded (if lsb0?
-+ ;; (/range2 startbit (+ startbit decode-bitsize))
-+ ;; (/range2 (- startbit decode-bitsize) startbit)))
-+ (used+undecoded already-used) ; (append already-used undecoded))
-+ (filtered-population (/vector-copy-set-all raw-population used+undecoded #f))
-+ (favorite-indices (/population-top-few filtered-population max))
-+ (sorted-indices (sort favorite-indices (lambda (a b)
-+ (if lsb0? (> a b) (< a b))))))
-+ (logit 3
-+ "Best decode bits (prev=" already-used " start=" startbit " decode=" decode-bitsize ")"
-+ "=>"
-+ "(" sorted-indices ")\n")
-+ sorted-indices)
-+)
-+
-+(define (OLDdecode-get-best-bits insn-list already-used startbit max decode-bitsize lsb0?)
-+ (let ((masks (map insn-base-mask insn-list))
-+ ; ??? We assume mask lengths are repeatedly used for insns longer
-+ ; than the base insn size.
-+ (mask-lens (map insn-base-mask-length insn-list))
-+ (endbit (if lsb0?
-+ -1 ; FIXME: for now (gets sparc port going)
-+ (+ startbit decode-bitsize)))
-+ (incr (if lsb0? -1 1)))
-+ (let loop ((result nil)
-+ (bitnum (if lsb0?
-+ (+ startbit (- decode-bitsize 1))
-+ startbit)))
-+ (if (or (= (length result) max) (= bitnum endbit))
-+ (reverse! result)
-+ (if (and (not (memq bitnum already-used))
-+ (/usable-decode-bit? masks mask-lens bitnum lsb0?))
-+ (loop (cons bitnum result) (+ bitnum incr))
-+ (loop result (+ bitnum incr))))
-+ ))
-+)
-+
-+;; Subroutine of /opcode-slots to simplify it.
-+;; Compute either the opcode value or mask for the bits in BITNUMS.
-+;; DEFAULT is 0 when computing the opcode value, 1 for the mask value.
-+;; DECODE-LEN is (length BITNUMS).
-+
-+(define (/get-subopcode-value value insn-len decode-len bitnums default lsb0?)
-+ ;;(display (list val insn-len decode-len bl)) (newline)
-+ ;; Oh My God. This isn't tail recursive.
-+ (letrec ((compute
-+ ;; BNS is the remaining elements of BITNUMS to examine.
-+ ;; THIS-BN ranges from (length bitnums), ..., 3, 2, 1.
-+ (lambda (bns this-bn)
-+ (if (null? bns)
-+ 0
-+ (let ((bn (car bns)))
-+ (+ (if (or (and (>= bn insn-len) (= default 1))
-+ (and (< bn insn-len)
-+ (bit-set? value
-+ (if lsb0?
-+ bn
-+ (- insn-len bn 1)))))
-+ (integer-expt 2 (- this-bn 1))
-+ 0)
-+ (compute (cdr bns) (- this-bn 1))))))))
-+ (compute bitnums decode-len))
-+)
-+
-+; Return list of decode table entry numbers for INSN's opcode bits BITNUMS.
-+; This is the indices into the decode table that match the instruction.
-+; LSB0? is non-#f if bit number 0 is the least significant bit.
-+;
-+; Example: If BITNUMS is (0 1 2 3 4 5), and the constant (i.e. opcode) part of
-+; the those bits of INSN is #b1100xx (where 'x' indicates a non-constant
-+; part), then the result is (#b110000 #b110001 #b110010 #b110011).
-+
-+(define (/opcode-slots insn bitnums lsb0?)
-+ (let ((opcode (insn-value insn)) ;; FIXME: unused, overridden below
-+ (insn-len (insn-base-mask-length insn))
-+ (decode-len (length bitnums)))
-+ (let* ((opcode (/get-subopcode-value (insn-value insn) insn-len decode-len bitnums 0 lsb0?))
-+ (opcode-mask (/get-subopcode-value (insn-base-mask insn) insn-len decode-len bitnums 1 lsb0?))
-+ (indices (missing-bit-indices opcode-mask (- (integer-expt 2 decode-len) 1))))
-+ (logit 3 "insn =" (obj:name insn)
-+ " insn-value=" (number->hex (insn-value insn))
-+ " insn-base-mask=" (number->hex (insn-base-mask insn))
-+ " insn-len=" insn-len
-+ " decode-len=" decode-len
-+ " opcode=" (number->hex opcode)
-+ " opcode-mask=" (number->hex opcode-mask)
-+ " indices=" indices "\n")
-+ (map (lambda (index) (+ opcode index)) indices)))
-+)
-+
-+; Subroutine of /build-slots.
-+; Fill slot in INSN-VEC that INSN goes into.
-+; BITNUMS is the list of opcode bits.
-+; LSB0? is non-#f if bit number 0 is the least significant bit.
-+;
-+; Example: If BITNUMS is (0 1 2 3 4 5) and the constant (i.e. opcode) part of
-+; the first six bits of INSN is #b1100xx (where 'x' indicates a non-constant
-+; part), then elements 48 49 50 51 of INSN-VEC are cons'd with INSN.
-+; Each "slot" is a list of matching instructions.
-+
-+(define (/fill-slot! insn-vec insn bitnums lsb0?)
-+ (logit 3 "Filling slots for " (obj:str-name insn)
-+ ", bitnums " bitnums "\n")
-+ (let ((slot-nums (/opcode-slots insn bitnums lsb0?)))
-+ ;(display (list "Filling slot(s)" slot-nums "...")) (newline)
-+ (for-each (lambda (slot-num)
-+ (vector-set! insn-vec slot-num
-+ (cons insn (vector-ref insn-vec slot-num))))
-+ slot-nums)
-+ *UNSPECIFIED*
-+ )
-+)
-+
-+; Given a list of constant bitnums (ones that are predominantly, though perhaps
-+; not always, in the opcode), record each insn in INSN-LIST in the proper slot.
-+; LSB0? is non-#f if bit number 0 is the least significant bit.
-+; The result is a vector of insn lists. Each slot is a list of insns
-+; that go in that slot.
-+
-+(define (/build-slots insn-list bitnums lsb0?)
-+ (let ((result (make-vector (integer-expt 2 (length bitnums)) nil)))
-+ ; Loop over each element, filling RESULT.
-+ (for-each (lambda (insn)
-+ (/fill-slot! result insn bitnums lsb0?))
-+ insn-list)
-+ result)
-+)
-+
-+; Compute the name of a decode table, prefixed with PREFIX.
-+; INDEX-LIST is a list of pairs: list of bitnums, table entry number,
-+; in reverse order of traversal (since they're built with cons).
-+; INDEX-LIST may be empty.
-+
-+(define (/gen-decode-table-name prefix index-list)
-+ (set! index-list (reverse index-list))
-+ (string-append
-+ prefix
-+ "table"
-+ (string-map (lambda (elm) (string-append "_" (number->string elm)))
-+ ; CDR of each element is the table index.
-+ (map cdr index-list)))
-+)
-+
-+; Generate one decode table entry for INSN-VEC at INDEX.
-+; INSN-VEC is a vector of slots where each slot is a list of instructions that
-+; map to that slot (opcode value). If a slot is nil, no insn has that opcode
-+; value so the decoder marks it as being invalid.
-+; STARTBIT is the bit offset of the instruction value that C variable `insn'
-+; holds (note that this is independent of LSB0?).
-+; DECODE-BITSIZE is the number of bits of the insn that `insn' holds.
-+; INDEX-LIST is a list of pairs: list of bitnums, table entry number.
-+; LSB0? is non-#f if bit number 0 is the least significant bit.
-+; INVALID-INSN is an <insn> object to use for invalid insns.
-+; The result is a dtable-entry element (or "slot").
-+
-+; ??? For debugging.
-+(define /build-decode-table-entry-args #f)
-+
-+(define (/build-decode-table-entry insn-vec startbit decode-bitsize index index-list lsb0? invalid-insn)
-+ (let ((slot (vector-ref insn-vec index)))
-+ (logit 2 "Processing decode entry "
-+ (number->string index)
-+ " in "
-+ (/gen-decode-table-name "decode_" index-list)
-+ ", "
-+ (cond ((null? slot) "invalid")
-+ ((= 1 (length slot)) (insn-syntax (car slot)))
-+ (else "subtable"))
-+ " ...\n")
-+
-+ (cond
-+ ; If no insns map to this value, mark it as invalid.
-+ ((null? slot) (dtable-entry-make index 'insn invalid-insn))
-+
-+ ; If only one insn maps to this value, that's it for this insn.
-+ ((= 1 (length slot))
-+ ; FIXME: Incomplete: need to check further opcode bits.
-+ (dtable-entry-make index 'insn (car slot)))
-+
-+ ; Otherwise more than one insn maps to this value and we need to look at
-+ ; further opcode bits.
-+ (else
-+ (logit 3 "Building subtable at index " (number->string index)
-+ ", decode-bitsize = " (number->string decode-bitsize)
-+ ", indices used thus far:"
-+ (string-map (lambda (i) (string-append " " (number->string i)))
-+ (apply append (map car index-list)))
-+ "\n")
-+
-+ (let ((bitnums (decode-get-best-bits slot
-+ (apply append (map car index-list))
-+ startbit 4
-+ decode-bitsize lsb0?)))
-+
-+ ; If bitnums is nil, either there is an ambiguity or we need to read
-+ ; more of the instruction in order to distinguish insns in SLOT.
-+ (if (and (null? bitnums)
-+ (< startbit (apply min (map insn-length slot))))
-+ (begin
-+ ; We might be able to resolve the ambiguity by reading more bits.
-+ ; We know from the < test that there are, indeed, more bits to
-+ ; be read.
-+ ; FIXME: It's technically possible that the next
-+ ; startbit+decode-bitsize chunk has no usable bits and we have to
-+ ; iterate, but rather unlikely.
-+ ; The calculation of the new startbit, decode-bitsize will
-+ ; undoubtedly need refinement.
-+ (set! startbit (+ startbit decode-bitsize))
-+ (set! decode-bitsize
-+ (min decode-bitsize
-+ (- (apply min (map insn-length slot))
-+ startbit)))
-+ (set! bitnums (decode-get-best-bits slot
-+ ;nil ; FIXME: what to put here?
-+ (apply append (map car index-list))
-+ startbit 4
-+ decode-bitsize lsb0?))))
-+
-+ ; If bitnums is still nil there is an ambiguity.
-+ (if (null? bitnums)
-+ (begin
-+ ; Try filtering out insns which are more general cases of
-+ ; other insns in the slot. The filtered insns will appear
-+ ; in other slots as appropriate.
-+ (set! slot (filter-non-specialized-ambiguous-insns slot))
-+
-+ (if (= 1 (length slot))
-+ ; Only 1 insn left in the slot, so take it.
-+ (dtable-entry-make index 'insn (car slot))
-+ ; There is still more than one insn in 'slot',
-+ ; so there is still an ambiguity.
-+ (begin
-+ ; If all insns are marked as DECODE-SPLIT, don't warn.
-+ (if (not (all-true? (map (lambda (insn)
-+ (obj-has-attr? insn 'DECODE-SPLIT))
-+ slot)))
-+ (message "WARNING: Decoder ambiguity detected: "
-+ (string-drop1 ; drop leading comma
-+ (string-map (lambda (insn)
-+ (string-append ", " (obj:str-name insn)))
-+ slot))
-+ "\n"))
-+ ; Things aren't entirely hopeless. We've warned about
-+ ; the ambiguity. Now, if there are any identical insns,
-+ ; filter them out. If only one remains, then use it.
-+ (set! slot (filter-identical-ambiguous-insns slot))
-+ (if (= 1 (length slot))
-+ ; Only 1 insn left in the slot, so take it.
-+ (dtable-entry-make index 'insn (car slot))
-+ ; Otherwise, see if any ifield-assertion
-+ ; specs are present.
-+ ; FIXME: For now we assume that if they all have an
-+ ; ifield-assertion spec, then there is no ambiguity (it's left
-+ ; to the programmer to get it right). This can be made more
-+ ; clever later.
-+ ; FIXME: May need to back up startbit if we've tried to read
-+ ; more of the instruction. We currently require that
-+ ; all bits get used before advancing startbit, so this
-+ ; shouldn't be necessary. Verify.
-+ (let ((assertions (map insn-ifield-assertion slot)))
-+ (if (not (all-true? assertions))
-+ (begin
-+ ; Save arguments for debugging purposes.
-+ (set! /build-decode-table-entry-args
-+ (list insn-vec startbit decode-bitsize index index-list lsb0? invalid-insn))
-+ (error "Unable to resolve ambiguity (maybe need some ifield-assertion specs?)")))
-+ ; FIXME: Punt on even simple cleverness for now.
-+ (let ((exprtable-entries
-+ (exprtable-sort (map exprtable-entry-make
-+ slot
-+ assertions))))
-+ (dtable-entry-make index 'expr
-+ (exprtable-make
-+ (/gen-exprtable-name exprtable-entries)
-+ exprtable-entries))))))))
-+
-+ ; There is no ambiguity so generate the subtable.
-+ ; Need to build `subtable' separately because we
-+ ; may be appending to /decode-subtables recursively.
-+ (let* ((insn-vec (/build-slots slot bitnums lsb0?))
-+ (subtable
-+ (/build-decode-table-guts insn-vec bitnums startbit
-+ decode-bitsize index-list lsb0?
-+ invalid-insn)))
-+ (dtable-entry-make index 'table
-+ (subdtable-add subtable
-+ (/gen-decode-table-name "" index-list)))))))
-+ )
-+ )
-+)
-+
-+; Given a vector of insn slots INSN-VEC, generate the guts of the decode table,
-+; recorded as a "dtable-guts" data structure.
-+;
-+; BITNUMS is the list of bit numbers used to build the slot table.
-+; I.e., (= (vector-length insn-vec) (ash 1 (length bitnums))).
-+; STARTBIT is the bit offset of the instruction value that C variable `insn'
-+; holds (note that this is independent of LSB0?).
-+; For example, it is initially zero. If DECODE-BITSIZE is 16 and after
-+; scanning the first fetched piece of the instruction, more decoding is
-+; needed, another piece will be fetched and STARTBIT will then be 16.
-+; DECODE-BITSIZE is the number of bits of the insn that `insn' holds.
-+; INDEX-LIST is a list of pairs: list of bitnums, table entry number.
-+; Decode tables consist of entries of two types: actual insns and
-+; pointers to other tables.
-+; LSB0? is non-#f if bit number 0 is the least significant bit.
-+; INVALID-INSN is an <insn> object representing invalid insns.
-+;
-+; BITNUMS is recorded with the guts so that tables whose contents are
-+; identical but are accessed by different bitnums are treated as separate in
-+; /decode-subtables. Not sure this will ever happen, but play it safe.
-+
-+(define (/build-decode-table-guts insn-vec bitnums startbit decode-bitsize index-list lsb0? invalid-insn)
-+ (logit 2 "Processing decoder for bits"
-+ (numbers->string bitnums " ")
-+ ", startbit " startbit
-+ ", decode-bitsize " decode-bitsize
-+ ", index-list " index-list
-+ " ...\n")
-+ (assert (= (vector-length insn-vec) (ash 1 (length bitnums))))
-+
-+ (dtable-guts-make
-+ bitnums startbit decode-bitsize
-+ (map (lambda (index)
-+ (/build-decode-table-entry insn-vec startbit decode-bitsize index
-+ (cons (cons bitnums index)
-+ index-list)
-+ lsb0? invalid-insn))
-+ (iota (vector-length insn-vec))))
-+)
-+
-+; Entry point.
-+; Return a table that efficiently decodes INSN-LIST.
-+; The table is a "dtable-guts" data structure, see dtable-guts-make.
-+;
-+; BITNUMS is the set of bits to initially key off of.
-+; DECODE-BITSIZE is the number of bits of the instruction that `insn' holds.
-+; LSB0? is non-#f if bit number 0 is the least significant bit.
-+; INVALID-INSN is an <insn> object representing the `invalid' insn (for
-+; instructions values that don't decode to any entry in INSN-LIST).
-+
-+(define (decode-build-table insn-list bitnums decode-bitsize lsb0? invalid-insn)
-+ ; Initialize the list of subtables computed.
-+ (set! /decode-subtables nil)
-+
-+ ; ??? Another way to handle simple forms of ifield-assertions (like those
-+ ; created by insn specialization) is to record a copy of the insn for each
-+ ; possible value of the ifield and modify its ifield list with the ifield's
-+ ; value. This would then let the decoder table builder handle it normally.
-+ ; I wouldn't create N insns, but would rather create an intermediary record
-+ ; that recorded the necessary bits (insn, ifield-list, remaining
-+ ; ifield-assertions).
-+
-+ (let ((insn-vec (/build-slots insn-list bitnums lsb0?)))
-+ (let ((table-guts (/build-decode-table-guts insn-vec bitnums
-+ 0 decode-bitsize
-+ nil lsb0?
-+ invalid-insn)))
-+ table-guts))
-+)
-diff -Nur binutils-2.24.orig/cgen/desc-cpu.scm binutils-2.24/cgen/desc-cpu.scm
---- binutils-2.24.orig/cgen/desc-cpu.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/desc-cpu.scm 2016-06-30 21:26:12.649892956 +0200
-@@ -0,0 +1,1052 @@
-+; Generate .c/.h versions of main elements of cpu description file.
-+; Copyright (C) 2000, 2001, 2002, 2003, 2005, 2009, 2010 Red Hat, Inc.
-+; This file is part of CGEN.
-+
-+; ISA support code.
-+
-+(define (/gen-isa-table-defns)
-+ (logit 2 "Generating isa table defns ...\n")
-+
-+ (string-list
-+ "\
-+/* Instruction set variants. */
-+
-+static const CGEN_ISA @arch@_cgen_isa_table[] = {
-+"
-+ (string-list-map (lambda (isa)
-+ (gen-obj-sanitize
-+ isa
-+ (string-append " { "
-+ "\"" (obj:str-name isa) "\", "
-+ (number->string
-+ (isa-default-insn-bitsize isa))
-+ ", "
-+ (number->string
-+ (isa-base-insn-bitsize isa))
-+ ", "
-+ (number->string
-+ (isa-min-insn-bitsize isa))
-+ ", "
-+ (number->string
-+ (isa-max-insn-bitsize isa))
-+ " },\n")))
-+ (current-isa-list))
-+ "\
-+ { 0, 0, 0, 0, 0 }
-+};
-+\n"
-+ )
-+)
-+
-+; Mach support code.
-+
-+; Return C code to describe the various cpu variants.
-+; Currently this is quite simple, the various cpu names and their mach numbers
-+; are recorded in a "keyword" table.
-+; ??? No longer used as there is the mach attribute.
-+;
-+;(set! mach-table (make <keyword> 'mach "machine list"
-+; (make <attr-list> "" nil) ; FIXME: sanitization?
-+; (map (lambda (elm) (list (obj:name elm) (mach-number elm)))
-+; (current-mach-list))))
-+
-+(define (/gen-mach-table-decls)
-+ (logit 2 "Generating machine table decls ...\n")
-+ "" ; (gen-decl mach-table)
-+)
-+
-+(define (/gen-mach-table-defns)
-+ (logit 2 "Generating machine table defns ...\n")
-+
-+ (string-list
-+ "\
-+/* Machine variants. */
-+
-+static const CGEN_MACH @arch@_cgen_mach_table[] = {
-+"
-+ (string-list-map (lambda (mach)
-+ (gen-obj-sanitize
-+ mach
-+ (string-append " { "
-+ "\"" (obj:str-name mach) "\", "
-+ "\"" (mach-bfd-name mach) "\", "
-+ (mach-enum mach) ", "
-+ (number->string (cpu-insn-chunk-bitsize (mach-cpu mach)))
-+ " },\n")))
-+ (current-mach-list))
-+ "\
-+ { 0, 0, 0, 0 }
-+};
-+\n"
-+ )
-+)
-+
-+; Attribute support code.
-+
-+; Return C code to describe the various attributes.
-+
-+(define (/gen-attr-table-decls)
-+ (logit 2 "Generating attribute table decls ...\n")
-+ (string-append
-+ "/* Attributes. */\n"
-+ "extern const CGEN_ATTR_TABLE @arch@_cgen_hardware_attr_table[];\n"
-+ "extern const CGEN_ATTR_TABLE @arch@_cgen_ifield_attr_table[];\n"
-+ "extern const CGEN_ATTR_TABLE @arch@_cgen_operand_attr_table[];\n"
-+ "extern const CGEN_ATTR_TABLE @arch@_cgen_insn_attr_table[];\n"
-+ "\n"
-+ )
-+)
-+
-+; Alternative GEN-MASK argument to gen-bool-attrs.
-+; This uses the `A' macro to abbreviate the attribute definition.
-+
-+(define (gen-A-attr-mask prefix name)
-+ (string-append "A(" (string-upcase (gen-c-symbol name)) ")")
-+)
-+
-+; Instruction fields support code.
-+
-+; Return C code to declare various ifield bits.
-+
-+(define (gen-ifld-decls)
-+ (logit 2 "Generating instruction field decls ...\n")
-+ (string-list
-+ "/* Ifield support. */\n\n"
-+ "/* Ifield attribute indices. */\n\n"
-+ (gen-attr-enum-decl "cgen_ifld" (current-ifld-attr-list))
-+ (gen-attr-accessors "cgen_ifld" (current-ifld-attr-list))
-+ (gen-enum-decl 'ifield_type "@arch@ ifield types"
-+ "@ARCH@_"
-+ (append (gen-obj-list-enums (non-derived-ifields (current-ifld-list)))
-+ '((f-max))))
-+ "#define MAX_IFLD ((int) @ARCH@_F_MAX)\n\n"
-+ )
-+)
-+
-+; Return C code to define the instruction field table,
-+; and any other ifield related definitions.
-+
-+(define (gen-ifld-defns)
-+ (logit 2 "Generating ifield table ...\n")
-+ (let* ((ifld-list (current-ifld-list))
-+ (all-attrs (current-ifld-attr-list))
-+ (num-non-bools (attr-count-non-bools all-attrs)))
-+ (string-list
-+ "
-+/* The instruction field table. */
-+
-+"
-+ (gen-define-with-symcat "A(a) (1 << CGEN_IFLD_" "a)")
-+ "
-+const CGEN_IFLD @arch@_cgen_ifld_table[] =
-+{
-+"
-+ (string-list-map
-+ (lambda (ifld)
-+ (gen-obj-sanitize ifld
-+ (string-append
-+ " { "
-+ (ifld-enum ifld) ", "
-+ "\"" (obj:str-name ifld) "\", "
-+ (if
-+ (or (has-attr? ifld 'VIRTUAL)
-+ (derived-ifield? ifld))
-+ "0, 0, 0, 0,"
-+ (string-append
-+ (number->string (ifld-word-offset ifld)) ", "
-+ (number->string (ifld-word-length ifld)) ", "
-+ (number->string (ifld-start ifld)) ", "
-+ (number->string (ifld-length ifld)) ", "))
-+ (gen-obj-attr-defn 'ifld ifld all-attrs
-+ num-non-bools gen-A-attr-mask)
-+ " },\n")))
-+ ifld-list)
-+ "\
-+ { 0, 0, 0, 0, 0, 0, " (gen-obj-attr-end-defn all-attrs num-non-bools) " }
-+};
-+
-+#undef A
-+
-+"
-+ ))
-+)
-+
-+; Hardware support.
-+
-+; Return C code to declare the various hardware bits
-+; that can be (or must be) defined before including opcode/cgen.h.
-+
-+(define (gen-hw-decls)
-+ (logit 2 "Generating hardware decls ...\n")
-+ (string-list
-+ "/* Hardware attribute indices. */\n\n"
-+ (gen-attr-enum-decl "cgen_hw" (current-hw-attr-list))
-+ (gen-attr-accessors "cgen_hw" (current-hw-attr-list))
-+ (gen-enum-decl 'cgen_hw_type "@arch@ hardware types"
-+ "HW_" ; FIXME: @ARCH@_
-+ (append (nub (map (lambda (hw)
-+ (cons (hw-sem-name hw)
-+ (cons '-
-+ (atlist-attrs
-+ (obj-atlist hw)))))
-+ (current-hw-list))
-+ (lambda (elm) (car elm)))
-+ '((max))))
-+ "#define MAX_HW ((int) HW_MAX)\n\n"
-+ )
-+)
-+
-+; Return declarations of variables tables used by HW.
-+
-+(define (/gen-hw-decl hw)
-+ (string-append
-+ (if (hw-indices hw)
-+ (gen-decl (hw-indices hw))
-+ "")
-+ (if (hw-values hw)
-+ (gen-decl (hw-values hw))
-+ "")
-+ )
-+)
-+
-+; Return C code to declare the various hardware bits
-+; that must be defined after including opcode/cgen.h.
-+
-+(define (gen-hw-table-decls)
-+ (logit 2 "Generating hardware table decls ...\n")
-+ (string-list
-+ "/* Hardware decls. */\n\n"
-+ (string-map /gen-hw-decl (current-hw-list))
-+ "\n"
-+ "extern const CGEN_HW_ENTRY @arch@_cgen_hw_table[];\n"
-+ )
-+)
-+
-+; Return definitions of variables tables used by HW.
-+; Only do this for `PRIVATE' elements. Public ones are emitted elsewhere.
-+
-+(define (/gen-hw-defn hw)
-+ (string-append
-+ (if (and (hw-indices hw)
-+ (obj-has-attr? (hw-indices hw) 'PRIVATE))
-+ (gen-defn (hw-indices hw))
-+ "")
-+ (if (and (hw-values hw)
-+ (obj-has-attr? (hw-values hw) 'PRIVATE))
-+ (gen-defn (hw-values hw))
-+ "")
-+ )
-+)
-+
-+; Generate the tables for the various hardware bits (register names, etc.).
-+; A table is generated for each element, and then another table is generated
-+; which collects them all together.
-+; Uses include looking up a particular register set so that a new reg
-+; can be added to it [at runtime].
-+
-+(define (gen-hw-table-defns)
-+ (logit 2 "Generating hardware table ...\n")
-+ (let* ((all-attrs (current-hw-attr-list))
-+ (num-non-bools (attr-count-non-bools all-attrs)))
-+ (string-list
-+ (string-list-map gen-defn (current-kw-list))
-+ (string-list-map /gen-hw-defn (current-hw-list))
-+ "
-+/* The hardware table. */
-+
-+"
-+ (gen-define-with-symcat "A(a) (1 << CGEN_HW_" "a)")
-+ "
-+const CGEN_HW_ENTRY @arch@_cgen_hw_table[] =
-+{
-+"
-+ (string-list-map
-+ (lambda (hw)
-+ (gen-obj-sanitize hw
-+ (string-list
-+ " { "
-+ "\"" (obj:str-name hw) "\", "
-+ (hw-enum hw) ", "
-+ ; ??? No element currently requires both indices and
-+ ; values specs so we only output the needed one.
-+ (or (and (hw-indices hw)
-+ (send (hw-indices hw) 'gen-table-entry))
-+ (and (hw-values hw)
-+ (send (hw-values hw) 'gen-table-entry))
-+ "CGEN_ASM_NONE, 0, ")
-+ (gen-obj-attr-defn 'hw hw all-attrs
-+ num-non-bools gen-A-attr-mask)
-+ " },\n")))
-+ (current-hw-list))
-+ "\
-+ { 0, 0, CGEN_ASM_NONE, 0, " (gen-obj-attr-end-defn all-attrs num-non-bools) " }
-+};
-+
-+#undef A
-+
-+"
-+ ))
-+)
-+
-+; Utilities of cgen-opc.h.
-+
-+; Return #define's of several constants.
-+; FIXME: Some of these to be moved into table of structs, one per cpu family.
-+
-+(define (/gen-hash-defines)
-+ (logit 2 "Generating #define's ...\n")
-+ (string-list
-+ "#define CGEN_ARCH @arch@\n\n"
-+ "/* Given symbol S, return @arch@_cgen_<S>. */\n"
-+ (gen-define-with-symcat "CGEN_SYM(s) @arch@" "_cgen_" "s")
-+ "\n\n/* Selected cpu families. */\n"
-+ ; FIXME: Move to sim's arch.h.
-+ (string-map (lambda (cpu)
-+ (gen-obj-sanitize cpu
-+ (string-append "#define HAVE_CPU_"
-+ (string-upcase (gen-sym cpu))
-+ "\n")))
-+ (current-cpu-list))
-+ "\n"
-+ "#define CGEN_INSN_LSB0_P " (if (current-arch-insn-lsb0?) "1" "0")
-+ "\n\n"
-+ "/* Minimum size of any insn (in bytes). */\n"
-+ "#define CGEN_MIN_INSN_SIZE "
-+ (number->string (bits->bytes
-+ (apply min (map isa-min-insn-bitsize (current-isa-list)))))
-+ "\n\n"
-+ "/* Maximum size of any insn (in bytes). */\n"
-+ "#define CGEN_MAX_INSN_SIZE "
-+ (number->string (bits->bytes
-+ (apply max (map isa-max-insn-bitsize (current-isa-list)))))
-+ "\n\n"
-+ ; This tells the assembler/disassembler whether or not it can use an int to
-+ ; record insns, which is faster. Since this controls the typedef of the
-+ ; insn buffer, only enable this if all isas support it.
-+ "#define CGEN_INT_INSN_P "
-+ (if (all-true? (map isa-integral-insn? (current-isa-list))) "1" "0")
-+ "\n"
-+ "\n"
-+ "/* Maximum number of syntax elements in an instruction. */\n"
-+ "#define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS "
-+ ; The +2 account for the leading "MNEM" and trailing 0.
-+ (number->string (+ 2 (apply max (map (lambda (insn)
-+ (length (syntax-break-out (insn-syntax insn)
-+ (obj-isa-list insn))))
-+ (current-insn-list)))))
-+ "\n"
-+ "\n"
-+ "/* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands.\n"
-+ " e.g. In \"b,a foo\" the \",a\" is an operand. If mnemonics have operands\n"
-+ " we can't hash on everything up to the space. */\n"
-+ (if strip-mnemonic?
-+ "/*#define CGEN_MNEMONIC_OPERANDS*/\n"
-+ "#define CGEN_MNEMONIC_OPERANDS\n")
-+ "\n"
-+ ; "/* Maximum number of operands any insn or macro-insn has. */\n"
-+ ; FIXME: Should compute.
-+ ; "#define CGEN_MAX_INSN_OPERANDS 16\n"
-+ ; "\n"
-+ "/* Maximum number of fields in an instruction. */\n"
-+ "#define CGEN_ACTUAL_MAX_IFMT_OPERANDS "
-+ (number->string (apply max (map (lambda (f) (length (ifmt-ifields f)))
-+ (current-ifmt-list))))
-+ "\n\n"
-+ )
-+)
-+
-+; Operand support.
-+
-+; Return C code to declare various operand bits.
-+
-+(define (gen-operand-decls)
-+ (logit 2 "Generating operand decls ...\n")
-+ (string-list
-+ "/* Operand attribute indices. */\n\n"
-+ (gen-attr-enum-decl "cgen_operand" (current-op-attr-list))
-+ (gen-attr-accessors "cgen_operand" (current-op-attr-list))
-+ (gen-enum-decl 'cgen_operand_type "@arch@ operand types"
-+ "@ARCH@_OPERAND_"
-+ (nub (append (gen-obj-list-enums (current-op-list))
-+ '((max)))
-+ car))
-+ "/* Number of operands types. */\n"
-+ "#define MAX_OPERANDS " (number->string (length (gen-obj-list-enums (current-op-list)))) "\n\n"
-+ ; was: "#define MAX_OPERANDS ((int) @ARCH@_OPERAND_MAX)\n\n"
-+ "/* Maximum number of operands referenced by any insn. */\n"
-+ "#define MAX_OPERAND_INSTANCES "
-+ (number->string (max-operand-instances))
-+ "\n\n"
-+ )
-+)
-+
-+; Generate C code to define the operand table.
-+
-+(define ifld-number-cache #f)
-+(define (ifld-number f)
-+ (if (not ifld-number-cache)
-+ (let* ((ls (find (lambda (f) (not (has-attr? f 'VIRTUAL)))
-+ (non-derived-ifields (current-ifld-list))))
-+ (numls (iota (length ls))))
-+ (set! ifld-number-cache
-+ (map (lambda (elt num) (cons (obj:name elt) num))
-+ ls numls))))
-+ (number->string (cdr (assoc (obj:name f) ifld-number-cache))))
-+
-+(define (gen-maybe-multi-ifld-of-op op)
-+ (let* ((idx (op:index op))
-+ (ty (hw-index:type idx))
-+ (fld (hw-index:value idx)))
-+ (gen-maybe-multi-ifld ty fld)))
-+
-+(define (gen-maybe-multi-ifld ty fld)
-+ (let* ((field-ref "0")
-+ (field-count "0"))
-+ (if (equal? ty 'ifield)
-+ (if (multi-ifield? fld)
-+ (begin
-+ (set! field-ref (string-append "&" (ifld-enum fld) "_MULTI_IFIELD[0]"))
-+ (set! field-count (number->string (length (elm-get fld 'subfields)))))
-+ ; else
-+ (set! field-ref (string-append "&@arch@_cgen_ifld_table[" (ifld-enum fld) "]"))))
-+ (string-append "{ " field-count ", { (const PTR) " field-ref " } }")))
-+
-+(define (gen-multi-ifield-nodes)
-+ (let ((multis (find multi-ifield? (current-ifld-list))))
-+ (apply string-append
-+ (append
-+
-+ '("\n\n/* multi ifield declarations */\n\n")
-+ (map
-+ (lambda (ifld)
-+ (string-append
-+ "const CGEN_MAYBE_MULTI_IFLD "
-+ (ifld-enum ifld) "_MULTI_IFIELD [];\n"))
-+ multis)
-+
-+ '("\n\n/* multi ifield definitions */\n\n")
-+ (map
-+ (lambda (ifld)
-+ (string-append
-+ "const CGEN_MAYBE_MULTI_IFLD "
-+ (ifld-enum ifld) "_MULTI_IFIELD [] =\n{"
-+ (apply string-append
-+ (map (lambda (x) (string-append "\n " (gen-maybe-multi-ifld 'ifield x) ","))
-+ (elm-get ifld 'subfields)))
-+ "\n { 0, { (const PTR) 0 } }\n};\n"))
-+ multis)))))
-+
-+(define (gen-operand-table)
-+ (logit 2 "Generating operand table ...\n")
-+ (let* ((all-attrs (current-op-attr-list))
-+ (num-non-bools (attr-count-non-bools all-attrs)))
-+ (string-list
-+ "
-+/* The operand table. */
-+
-+"
-+ (gen-define-with-symcat "A(a) (1 << CGEN_OPERAND_" "a)")
-+ (gen-define-with-symcat "OPERAND(op) @ARCH@_OPERAND_" "op")
-+"
-+const CGEN_OPERAND @arch@_cgen_operand_table[] =
-+{
-+"
-+ (string-list-map
-+ (lambda (op)
-+ (gen-obj-sanitize op
-+ (string-append
-+ "/* " (obj:str-name op) ": " (obj:comment op) " */\n"
-+ (if (or (derived-operand? op)
-+ (anyof-operand? op))
-+ ""
-+ (string-append
-+ " { "
-+ "\"" (obj:str-name op) "\", "
-+ (op-enum op) ", "
-+ (hw-enum (op:hw-name op)) ", "
-+ (number->string (op:start op)) ", "
-+ (number->string (op:length op)) ",\n"
-+ " "
-+ (gen-maybe-multi-ifld-of-op op) ", \n"
-+ " "
-+ (gen-obj-attr-defn 'operand op all-attrs
-+ num-non-bools gen-A-attr-mask)
-+ " },\n"
-+ )))))
-+ (current-op-list))
-+ "/* sentinel */\n\
-+ { 0, 0, 0, 0, 0,\n { 0, { (const PTR) 0 } },\n " (gen-obj-attr-end-defn all-attrs num-non-bools) " }
-+};
-+
-+#undef A
-+
-+"
-+ )
-+ )
-+)
-+
-+; Instruction table support.
-+
-+; Return C code to declare various insn bits.
-+
-+(define (gen-insn-decls)
-+ (logit 2 "Generating instruction decls ...\n")
-+ (string-list
-+ "/* Insn attribute indices. */\n\n"
-+ (gen-attr-enum-decl "cgen_insn" (current-insn-attr-list))
-+ (gen-attr-accessors "cgen_insn" (current-insn-attr-list))
-+ )
-+)
-+
-+; Generate an insn table entry for INSN.
-+; ALL-ATTRS is a list of all instruction attributes.
-+; NUM-NON-BOOLS is the number of non-boolean insn attributes.
-+
-+(define (gen-insn-table-entry insn all-attrs num-non-bools)
-+ (gen-obj-sanitize
-+ insn
-+ (string-list
-+ "/* " (insn-syntax insn) " */\n"
-+ " {\n"
-+ " "
-+ (if (has-attr? insn 'ALIAS) "-1" (insn-enum insn)) ", "
-+ "\"" (obj:str-name insn) "\", "
-+ "\"" (insn-mnemonic insn) "\", "
-+ ;(if (has-attr? insn 'ALIAS) "0" (number->string (insn-length insn))) ",\n"
-+ (number->string (insn-length insn)) ",\n"
-+; ??? There is currently a problem with embedded newlines, and this might
-+; best be put in another file [the table is already pretty big].
-+; Might also wish to output bytecodes instead.
-+; " "
-+; (if (insn-semantics insn)
-+; (string-append "\""
-+; (with-output-to-string
-+; ; ??? Should we do macro expansion here?
-+; (lambda () (display (insn-semantics insn))))
-+; "\"")
-+; "0")
-+; ",\n"
-+ ; ??? Might wish to output the raw format spec here instead
-+ ; (either as plain text or bytecodes).
-+ ; Values could be lazily computed and cached.
-+ " "
-+ (gen-obj-attr-defn 'insn insn all-attrs num-non-bools gen-A-attr-mask)
-+ "\n },\n"))
-+)
-+
-+; Generate insn table.
-+
-+(define (gen-insn-table)
-+ (logit 2 "Generating instruction table ...\n")
-+ (let* ((all-attrs (current-insn-attr-list))
-+ (num-non-bools (attr-count-non-bools all-attrs)))
-+ (string-write
-+ "
-+/* The instruction table. */
-+
-+#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
-+"
-+ (gen-define-with-symcat "A(a) (1 << CGEN_INSN_" "a)")
-+"
-+static const CGEN_IBASE @arch@_cgen_insn_table[MAX_INSNS] =
-+{
-+ /* Special null first entry.
-+ A `num' value of zero is thus invalid.
-+ Also, the special `invalid' insn resides here. */
-+ { 0, 0, 0, 0, " (gen-obj-attr-end-defn all-attrs num-non-bools) " },\n"
-+
-+ (lambda ()
-+ (string-write-map (lambda (insn)
-+ (logit 3 "Generating insn table entry for " (obj:name insn) " ...\n")
-+ (gen-insn-table-entry insn all-attrs num-non-bools))
-+ (non-multi-insns (current-insn-list))))
-+
-+ "\
-+};
-+
-+#undef OP
-+#undef A
-+
-+"
-+ )
-+ )
-+)
-+
-+; Cpu table handling support.
-+;
-+; ??? A lot of this can live in a machine independent file, but there's
-+; currently no place to put this file (there's no libcgen). libopcodes is the
-+; wrong place as some simulator ports use this but they don't use libopcodes.
-+
-+; Return C routines to open/close a cpu description table.
-+; This is defined here and not in cgen-opc.in because it refers to
-+; CGEN_{ASM,DIS}_HASH and insn_table/macro_insn_table which is defined
-+; earlier in the file. ??? Things can certainly be rearranged though
-+; and opcodes/cgen.sh modified to insert the generated part into the middle
-+; of the file like is done for assembler/disassembler support.
-+
-+(define (/gen-cpu-open)
-+ (string-append
-+ "\
-+static const CGEN_MACH * lookup_mach_via_bfd_name (const CGEN_MACH *, const char *);
-+static void build_hw_table (CGEN_CPU_TABLE *);
-+static void build_ifield_table (CGEN_CPU_TABLE *);
-+static void build_operand_table (CGEN_CPU_TABLE *);
-+static void build_insn_table (CGEN_CPU_TABLE *);
-+static void @arch@_cgen_rebuild_tables (CGEN_CPU_TABLE *);
-+
-+/* Subroutine of @arch@_cgen_cpu_open to look up a mach via its bfd name. */
-+
-+static const CGEN_MACH *
-+lookup_mach_via_bfd_name (const CGEN_MACH *table, const char *name)
-+{
-+ while (table->name)
-+ {
-+ if (strcmp (name, table->bfd_name) == 0)
-+ return table;
-+ ++table;
-+ }
-+ abort ();
-+}
-+
-+/* Subroutine of @arch@_cgen_cpu_open to build the hardware table. */
-+
-+static void
-+build_hw_table (CGEN_CPU_TABLE *cd)
-+{
-+ int i;
-+ int machs = cd->machs;
-+ const CGEN_HW_ENTRY *init = & @arch@_cgen_hw_table[0];
-+ /* MAX_HW is only an upper bound on the number of selected entries.
-+ However each entry is indexed by it's enum so there can be holes in
-+ the table. */
-+ const CGEN_HW_ENTRY **selected =
-+ (const CGEN_HW_ENTRY **) xmalloc (MAX_HW * sizeof (CGEN_HW_ENTRY *));
-+
-+ cd->hw_table.init_entries = init;
-+ cd->hw_table.entry_size = sizeof (CGEN_HW_ENTRY);
-+ memset (selected, 0, MAX_HW * sizeof (CGEN_HW_ENTRY *));
-+ /* ??? For now we just use machs to determine which ones we want. */
-+ for (i = 0; init[i].name != NULL; ++i)
-+ if (CGEN_HW_ATTR_VALUE (&init[i], CGEN_HW_MACH)
-+ & machs)
-+ selected[init[i].type] = &init[i];
-+ cd->hw_table.entries = selected;
-+ cd->hw_table.num_entries = MAX_HW;
-+}
-+
-+/* Subroutine of @arch@_cgen_cpu_open to build the hardware table. */
-+
-+static void
-+build_ifield_table (CGEN_CPU_TABLE *cd)
-+{
-+ cd->ifld_table = & @arch@_cgen_ifld_table[0];
-+}
-+
-+/* Subroutine of @arch@_cgen_cpu_open to build the hardware table. */
-+
-+static void
-+build_operand_table (CGEN_CPU_TABLE *cd)
-+{
-+ int i;
-+ int machs = cd->machs;
-+ const CGEN_OPERAND *init = & @arch@_cgen_operand_table[0];
-+ /* MAX_OPERANDS is only an upper bound on the number of selected entries.
-+ However each entry is indexed by it's enum so there can be holes in
-+ the table. */
-+ const CGEN_OPERAND **selected = xmalloc (MAX_OPERANDS * sizeof (* selected));
-+
-+ cd->operand_table.init_entries = init;
-+ cd->operand_table.entry_size = sizeof (CGEN_OPERAND);
-+ memset (selected, 0, MAX_OPERANDS * sizeof (CGEN_OPERAND *));
-+ /* ??? For now we just use mach to determine which ones we want. */
-+ for (i = 0; init[i].name != NULL; ++i)
-+ if (CGEN_OPERAND_ATTR_VALUE (&init[i], CGEN_OPERAND_MACH)
-+ & machs)
-+ selected[init[i].type] = &init[i];
-+ cd->operand_table.entries = selected;
-+ cd->operand_table.num_entries = MAX_OPERANDS;
-+}
-+
-+/* Subroutine of @arch@_cgen_cpu_open to build the hardware table.
-+ ??? This could leave out insns not supported by the specified mach/isa,
-+ but that would cause errors like \"foo only supported by bar\" to become
-+ \"unknown insn\", so for now we include all insns and require the app to
-+ do the checking later.
-+ ??? On the other hand, parsing of such insns may require their hardware or
-+ operand elements to be in the table [which they mightn't be]. */
-+
-+static void
-+build_insn_table (CGEN_CPU_TABLE *cd)
-+{
-+ int i;
-+ const CGEN_IBASE *ib = & @arch@_cgen_insn_table[0];
-+ CGEN_INSN *insns = xmalloc (MAX_INSNS * sizeof (CGEN_INSN));
-+
-+ memset (insns, 0, MAX_INSNS * sizeof (CGEN_INSN));
-+ for (i = 0; i < MAX_INSNS; ++i)
-+ insns[i].base = &ib[i];
-+ cd->insn_table.init_entries = insns;
-+ cd->insn_table.entry_size = sizeof (CGEN_IBASE);
-+ cd->insn_table.num_init_entries = MAX_INSNS;
-+}
-+
-+/* Subroutine of @arch@_cgen_cpu_open to rebuild the tables. */
-+
-+static void
-+@arch@_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
-+{
-+ int i;
-+ CGEN_BITSET *isas = cd->isas;
-+ unsigned int machs = cd->machs;
-+
-+ cd->int_insn_p = CGEN_INT_INSN_P;
-+
-+ /* Data derived from the isa spec. */
-+#define UNSET (CGEN_SIZE_UNKNOWN + 1)
-+ cd->default_insn_bitsize = UNSET;
-+ cd->base_insn_bitsize = UNSET;
-+ cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */
-+ cd->max_insn_bitsize = 0;
-+ for (i = 0; i < MAX_ISAS; ++i)
-+ if (cgen_bitset_contains (isas, i))
-+ {
-+ const CGEN_ISA *isa = & @arch@_cgen_isa_table[i];
-+
-+ /* Default insn sizes of all selected isas must be
-+ equal or we set the result to 0, meaning \"unknown\". */
-+ if (cd->default_insn_bitsize == UNSET)
-+ cd->default_insn_bitsize = isa->default_insn_bitsize;
-+ else if (isa->default_insn_bitsize == cd->default_insn_bitsize)
-+ ; /* This is ok. */
-+ else
-+ cd->default_insn_bitsize = CGEN_SIZE_UNKNOWN;
-+
-+ /* Base insn sizes of all selected isas must be equal
-+ or we set the result to 0, meaning \"unknown\". */
-+ if (cd->base_insn_bitsize == UNSET)
-+ cd->base_insn_bitsize = isa->base_insn_bitsize;
-+ else if (isa->base_insn_bitsize == cd->base_insn_bitsize)
-+ ; /* This is ok. */
-+ else
-+ cd->base_insn_bitsize = CGEN_SIZE_UNKNOWN;
-+
-+ /* Set min,max insn sizes. */
-+ if (isa->min_insn_bitsize < cd->min_insn_bitsize)
-+ cd->min_insn_bitsize = isa->min_insn_bitsize;
-+ if (isa->max_insn_bitsize > cd->max_insn_bitsize)
-+ cd->max_insn_bitsize = isa->max_insn_bitsize;
-+ }
-+
-+ /* Data derived from the mach spec. */
-+ for (i = 0; i < MAX_MACHS; ++i)
-+ if (((1 << i) & machs) != 0)
-+ {
-+ const CGEN_MACH *mach = & @arch@_cgen_mach_table[i];
-+
-+ if (mach->insn_chunk_bitsize != 0)
-+ {
-+ if (cd->insn_chunk_bitsize != 0 && cd->insn_chunk_bitsize != mach->insn_chunk_bitsize)
-+ {
-+ fprintf (stderr, \"@arch@_cgen_rebuild_tables: conflicting insn-chunk-bitsize values: `%d' vs. `%d'\\n\",
-+ cd->insn_chunk_bitsize, mach->insn_chunk_bitsize);
-+ abort ();
-+ }
-+
-+ cd->insn_chunk_bitsize = mach->insn_chunk_bitsize;
-+ }
-+ }
-+
-+ /* Determine which hw elements are used by MACH. */
-+ build_hw_table (cd);
-+
-+ /* Build the ifield table. */
-+ build_ifield_table (cd);
-+
-+ /* Determine which operands are used by MACH/ISA. */
-+ build_operand_table (cd);
-+
-+ /* Build the instruction table. */
-+ build_insn_table (cd);
-+}
-+
-+/* Initialize a cpu table and return a descriptor.
-+ It's much like opening a file, and must be the first function called.
-+ The arguments are a set of (type/value) pairs, terminated with
-+ CGEN_CPU_OPEN_END.
-+
-+ Currently supported values:
-+ CGEN_CPU_OPEN_ISAS: bitmap of values in enum isa_attr
-+ CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
-+ CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
-+ CGEN_CPU_OPEN_ENDIAN: specify endian choice
-+ CGEN_CPU_OPEN_END: terminates arguments
-+
-+ ??? Simultaneous multiple isas might not make sense, but it's not (yet)
-+ precluded. */
-+
-+CGEN_CPU_DESC
-+@arch@_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
-+{
-+ CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE));
-+ static int init_p;
-+ CGEN_BITSET *isas = 0; /* 0 = \"unspecified\" */
-+ unsigned int machs = 0; /* 0 = \"unspecified\" */
-+ enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
-+ va_list ap;
-+
-+ if (! init_p)
-+ {
-+ init_tables ();
-+ init_p = 1;
-+ }
-+
-+ memset (cd, 0, sizeof (*cd));
-+
-+ va_start (ap, arg_type);
-+ while (arg_type != CGEN_CPU_OPEN_END)
-+ {
-+ switch (arg_type)
-+ {
-+ case CGEN_CPU_OPEN_ISAS :
-+ isas = va_arg (ap, CGEN_BITSET *);
-+ break;
-+ case CGEN_CPU_OPEN_MACHS :
-+ machs = va_arg (ap, unsigned int);
-+ break;
-+ case CGEN_CPU_OPEN_BFDMACH :
-+ {
-+ const char *name = va_arg (ap, const char *);
-+ const CGEN_MACH *mach =
-+ lookup_mach_via_bfd_name (@arch@_cgen_mach_table, name);
-+
-+ machs |= 1 << mach->num;
-+ break;
-+ }
-+ case CGEN_CPU_OPEN_ENDIAN :
-+ endian = va_arg (ap, enum cgen_endian);
-+ break;
-+ default :
-+ fprintf (stderr, \"@arch@_cgen_cpu_open: unsupported argument `%d'\\n\",
-+ arg_type);
-+ abort (); /* ??? return NULL? */
-+ }
-+ arg_type = va_arg (ap, enum cgen_cpu_open_arg);
-+ }
-+ va_end (ap);
-+
-+ /* Mach unspecified means \"all\". */
-+ if (machs == 0)
-+ machs = (1 << MAX_MACHS) - 1;
-+ /* Base mach is always selected. */
-+ machs |= 1;
-+ if (endian == CGEN_ENDIAN_UNKNOWN)
-+ {
-+ /* ??? If target has only one, could have a default. */
-+ fprintf (stderr, \"@arch@_cgen_cpu_open: no endianness specified\\n\");
-+ abort ();
-+ }
-+
-+ cd->isas = cgen_bitset_copy (isas);
-+ cd->machs = machs;
-+ cd->endian = endian;
-+ /* FIXME: for the sparc case we can determine insn-endianness statically.
-+ The worry here is where both data and insn endian can be independently
-+ chosen, in which case this function will need another argument.
-+ Actually, will want to allow for more arguments in the future anyway. */
-+ cd->insn_endian = CGEN_ENDIAN_BIG;
-+
-+ /* Table (re)builder. */
-+ cd->rebuild_tables = @arch@_cgen_rebuild_tables;
-+ @arch@_cgen_rebuild_tables (cd);
-+
-+ /* Default to not allowing signed overflow. */
-+ cd->signed_overflow_ok_p = 0;
-+
-+ return (CGEN_CPU_DESC) cd;
-+}
-+
-+/* Cover fn to @arch@_cgen_cpu_open to handle the simple case of 1 isa, 1 mach.
-+ MACH_NAME is the bfd name of the mach. */
-+
-+CGEN_CPU_DESC
-+@arch@_cgen_cpu_open_1 (const char *mach_name, enum cgen_endian endian)
-+{
-+ return @arch@_cgen_cpu_open (CGEN_CPU_OPEN_BFDMACH, mach_name,
-+ CGEN_CPU_OPEN_ENDIAN, endian,
-+ CGEN_CPU_OPEN_END);
-+}
-+
-+/* Close a cpu table.
-+ ??? This can live in a machine independent file, but there's currently
-+ no place to put this file (there's no libcgen). libopcodes is the wrong
-+ place as some simulator ports use this but they don't use libopcodes. */
-+
-+void
-+@arch@_cgen_cpu_close (CGEN_CPU_DESC cd)
-+{
-+ unsigned int i;
-+ const CGEN_INSN *insns;
-+
-+ if (cd->macro_insn_table.init_entries)
-+ {
-+ insns = cd->macro_insn_table.init_entries;
-+ for (i = 0; i < cd->macro_insn_table.num_init_entries; ++i, ++insns)
-+ if (CGEN_INSN_RX ((insns)))
-+ regfree (CGEN_INSN_RX (insns));
-+ }
-+
-+ if (cd->insn_table.init_entries)
-+ {
-+ insns = cd->insn_table.init_entries;
-+ for (i = 0; i < cd->insn_table.num_init_entries; ++i, ++insns)
-+ if (CGEN_INSN_RX (insns))
-+ regfree (CGEN_INSN_RX (insns));
-+ }
-+
-+ if (cd->macro_insn_table.init_entries)
-+ free ((CGEN_INSN *) cd->macro_insn_table.init_entries);
-+
-+ if (cd->insn_table.init_entries)
-+ free ((CGEN_INSN *) cd->insn_table.init_entries);
-+
-+ if (cd->hw_table.entries)
-+ free ((CGEN_HW_ENTRY *) cd->hw_table.entries);
-+
-+ if (cd->operand_table.entries)
-+ free ((CGEN_HW_ENTRY *) cd->operand_table.entries);
-+
-+ free (cd);
-+}
-+
-+")
-+)
-+
-+; General initialization C code
-+; Code is appended during processing.
-+
-+(define /cputab-init-code "")
-+(define (cputab-add-init! code)
-+ (set! /cputab-init-code (string-append /cputab-init-code code))
-+)
-+
-+; Return the C code to define the various initialization functions.
-+; This does not include assembler/disassembler specific stuff.
-+; Generally, this function doesn't do anything.
-+; It exists to allow a global-static-constructor kind of thing should
-+; one ever be necessary.
-+
-+(define (gen-init-fns)
-+ (logit 2 "Generating init fns ...\n")
-+ (string-append
-+ "\
-+/* Initialize anything needed to be done once, before any cpu_open call. */
-+
-+static void
-+init_tables (void)
-+{\n"
-+ /cputab-init-code
-+ "}\n\n"
-+ )
-+)
-+
-+; Top level C code generators
-+
-+; FIXME: Create enum objects for all the enums we explicitly declare here.
-+; Then they'd be usable and we wouldn't have to special case them here.
-+
-+(define (cgen-desc.h)
-+ (logit 1 "Generating " (current-arch-name) "-desc.h ...\n")
-+ (string-write
-+ (gen-c-copyright "CPU data header for @arch@."
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "\
-+#ifndef @ARCH@_CPU_H
-+#define @ARCH@_CPU_H
-+
-+"
-+ /gen-hash-defines
-+ ; This is defined in arch.h. It's not defined here as there is yet to
-+ ; be a need for it in the assembler/disassembler.
-+ ;(gen-enum-decl 'model_type "model types"
-+ ; "MODEL_"
-+ ; (append (map list (map obj:name (current-model-list))) '((max))))
-+ ;"#define MAX_MODELS ((int) MODEL_MAX)\n\n"
-+ (let ((enums (find (lambda (obj) (not (obj-has-attr? obj 'VIRTUAL)))
-+ (current-enum-list))))
-+ (if (null? enums)
-+ ""
-+ (string-list
-+ "/* Enums. */\n\n"
-+ (string-map gen-decl enums))))
-+ "/* Attributes. */\n\n"
-+ (string-map gen-decl (current-attr-list))
-+ "/* Number of architecture variants. */\n"
-+ ; If there is only 1 isa, leave out special handling. */
-+ (if (= (length (current-isa-list)) 1)
-+ "#define MAX_ISAS 1\n"
-+ "#define MAX_ISAS ((int) ISA_MAX)\n")
-+ "#define MAX_MACHS ((int) MACH_MAX)\n\n"
-+ gen-ifld-decls
-+ gen-hw-decls
-+ gen-operand-decls
-+ gen-insn-decls
-+ "/* cgen.h uses things we just defined. */\n"
-+ "#include \"opcode/cgen.h\"\n\n"
-+ "extern const struct cgen_ifld @arch@_cgen_ifld_table[];\n\n"
-+ /gen-attr-table-decls
-+ /gen-mach-table-decls
-+ gen-hw-table-decls
-+ "\n"
-+ (lambda ()
-+ (if (opc-file-provided?)
-+ (gen-extra-cpu.h (opc-file-path) (current-arch-name))
-+ ""))
-+ "
-+
-+#endif /* @ARCH@_CPU_H */
-+"
-+ )
-+)
-+
-+; This file contains the "top level" definitions of the cpu.
-+; This includes various elements of the description file, expressed in C.
-+;
-+; ??? A lot of this file can go in a machine-independent file! However,
-+; some simulators don't use the cgen opcodes support so there is currently
-+; no place to put this file. To be revisited when we do have such a place.
-+
-+(define (cgen-desc.c)
-+ (logit 1 "Generating " (current-arch-name) "-desc.c ...\n")
-+ (string-write
-+ (gen-c-copyright "CPU data for @arch@."
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "\
-+#include \"sysdep.h\"
-+#include <stdio.h>
-+#include <stdarg.h>
-+#include \"ansidecl.h\"
-+#include \"bfd.h\"
-+#include \"symcat.h\"
-+#include \"@arch@-desc.h\"
-+#include \"@arch@-opc.h\"
-+#include \"opintl.h\"
-+#include \"libiberty.h\"
-+#include \"xregex.h\"
-+\n"
-+ (lambda ()
-+ (if (opc-file-provided?)
-+ (gen-extra-cpu.c (opc-file-path) (current-arch-name))
-+ ""))
-+ gen-attr-table-defns
-+ /gen-isa-table-defns
-+ /gen-mach-table-defns
-+ gen-hw-table-defns
-+ gen-ifld-defns
-+ gen-multi-ifield-nodes
-+ gen-operand-table
-+ gen-insn-table
-+ gen-init-fns
-+ /gen-cpu-open
-+ )
-+)
-diff -Nur binutils-2.24.orig/cgen/desc.scm binutils-2.24/cgen/desc.scm
---- binutils-2.24.orig/cgen/desc.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/desc.scm 2016-06-30 21:26:12.649892956 +0200
-@@ -0,0 +1,240 @@
-+; General cpu info generator support.
-+; Copyright (C) 2000, 2003, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+;
-+; This file generates C versions of the more salient parts of the description
-+; file. It's currently part of opcodes or simulator support,
-+; and doesn't exist as its own "application" (i.e. user of cgen),
-+; though that's not precluded.
-+
-+; strip-mnemonic?: If each mnemonic is constant, the insn table doesn't need
-+; to record them in the syntax field as the mnemonic field also contains it.
-+; Furthermore, the insn table can be hashed on complete mnemonic.
-+; ??? Should live in <derived-arch-data> or some such.
-+
-+(define strip-mnemonic? #f)
-+
-+; Attribute support code.
-+
-+(define (gen-attr-table-defn type attr-list)
-+ (string-append
-+ "const CGEN_ATTR_TABLE "
-+ "@arch@_cgen_" type "_attr_table[] =\n{\n"
-+ (string-map (lambda (attr)
-+ (gen-obj-sanitize
-+ attr
-+ (string-append " { "
-+ "\""
-+ (string-upcase (obj:str-name attr))
-+ "\", "
-+ (if (class-instance? <boolean-attribute> attr)
-+ "&bool_attr[0], &bool_attr[0]"
-+ (string-append "& " (gen-sym attr)
-+ "_attr[0], & "
-+ (gen-sym attr)
-+ "_attr[0]"))
-+ " },\n")))
-+ attr-list)
-+ " { 0, 0, 0 }\n"
-+ "};\n\n")
-+)
-+
-+(define (gen-attr-table-defns)
-+ (logit 2 "Generating attribute table defns ...\n")
-+ (string-append
-+ "\
-+/* Attributes. */
-+
-+static const CGEN_ATTR_ENTRY bool_attr[] =
-+{
-+ { \"#f\", 0 },
-+ { \"#t\", 1 },
-+ { 0, 0 }
-+};
-+
-+"
-+ ; Generate tables mapping names to values for all the non-boolean attrs.
-+ (string-map gen-defn (current-attr-list))
-+ ; Generate tables for each domain (ifld, insn, etc.) mapping attribute type
-+ ; to index.
-+ (gen-attr-table-defn "ifield" (current-ifld-attr-list))
-+ (gen-attr-table-defn "hardware" (current-hw-attr-list))
-+ (gen-attr-table-defn "operand" (current-op-attr-list))
-+ (gen-attr-table-defn "insn" (current-insn-attr-list))
-+ )
-+)
-+
-+; HW-ASM is the base class for supporting hardware elements in the opcode table
-+; (aka assembler/disassembler).
-+
-+; Return the C declaration.
-+; It is up to a derived class to redefine this as necessary.
-+
-+(method-make! <hw-asm> 'gen-decl (lambda (self) ""))
-+
-+; Return the C definition.
-+; It is up to a derived class to redefine this as necessary.
-+
-+(method-make! <hw-asm> 'gen-defn (lambda (self) ""))
-+
-+(method-make! <hw-asm> 'gen-ref (lambda (self) "0"))
-+
-+(method-make! <hw-asm> 'gen-init (lambda (self) ""))
-+
-+(method-make! <hw-asm> 'gen-table-entry (lambda (self) "CGEN_ASM_NONE, 0, "))
-+
-+; Prefix of global variables describing operand values.
-+
-+(define hw-asm-prefix "@arch@_cgen_opval_")
-+
-+; Emit a C reference to a value operand.
-+; Usually the operand's details are stored in a struct so in the default
-+; case return that struct (?correct?). The caller must add the "&" if desired.
-+
-+(define (gen-hw-asm-ref name)
-+ (string-append hw-asm-prefix (gen-c-symbol name))
-+)
-+
-+; Keyword support.
-+
-+; Keyword operands.
-+; Return the C declaration of a keyword list.
-+
-+(method-make!
-+ <keyword> 'gen-decl
-+ (lambda (self)
-+ (string-append
-+ "extern CGEN_KEYWORD "
-+ (gen-hw-asm-ref (elm-get self 'name))
-+ ";\n"))
-+)
-+
-+; Return the C definition of a keyword list.
-+
-+(method-make!
-+ <keyword> 'gen-defn
-+ (lambda (self)
-+ (string-append
-+ "static CGEN_KEYWORD_ENTRY "
-+ (gen-hw-asm-ref (elm-get self 'name)) "_entries"
-+ "[] =\n{\n"
-+ (string-drop -2 ; Delete trailing ",\n" [don't want the ,]
-+ (string-map (lambda (e)
-+ (string-append
-+ " { \""
-+ (->string (elm-get self 'name-prefix))
-+ (->string (car e)) ; operand name
-+ "\", "
-+ (if (string? (cadr e))
-+ (cadr e)
-+ (number->string (cadr e))) ; value
-+ ", {0, {{{0, 0}}}}, 0, 0"
-+ " },\n"
-+ ))
-+ (elm-get self 'values)))
-+ "\n};\n\n"
-+ "CGEN_KEYWORD "
-+ (gen-hw-asm-ref (elm-get self 'name))
-+ " =\n{\n"
-+ " & " (gen-hw-asm-ref (elm-get self 'name)) "_entries[0],\n"
-+ " " (number->string (length (elm-get self 'values))) ",\n"
-+ " 0, 0, 0, 0, \"\"\n"
-+ "};\n\n"
-+ )
-+ )
-+)
-+
-+; Return a reference to a keyword table.
-+
-+(method-make!
-+ <keyword> 'gen-ref
-+ (lambda (self) (string-append "& " (gen-hw-asm-ref (elm-get self 'name))))
-+)
-+
-+(method-make!
-+ <keyword> 'gen-table-entry
-+ (lambda (self)
-+ (string-append "CGEN_ASM_KEYWORD, (PTR) " (send self 'gen-ref) ", "))
-+)
-+
-+; Return the C code to initialize a keyword.
-+; If the `hash' attr is present, the values are hashed. Currently this is
-+; done by calling back to GAS to have it add the registers to its symbol table.
-+; FIXME: Currently unused. Should be done either in the open routine or
-+; lazily upon lookup.
-+
-+(method-make!
-+ <keyword> 'gen-init
-+ (lambda (self)
-+ (cond ((has-attr? self 'HASH)
-+ (string-append
-+ " @arch@_cgen_asm_hash_keywords ("
-+ (send self 'gen-ref)
-+ ");\n"
-+ ))
-+ (else ""))
-+ )
-+)
-+
-+; Operand support.
-+
-+; Return a reference to the operand's attributes.
-+
-+(method-make!
-+ <operand> 'gen-attr-ref
-+ (lambda (self)
-+ (string-append "& CGEN_OPERAND_ATTRS (CGEN_SYM (operand_table)) "
-+ "[" (op-enum self) "]"))
-+)
-+
-+; Name of C variable that is a pointer to the fields struct.
-+
-+(define ifields-var "fields")
-+
-+; Given FIELD, an `ifield' object, return an lvalue for the operand in
-+; IFIELDS-VAR.
-+
-+(define (gen-operand-result-var field)
-+ (string-append ifields-var "->" (gen-sym field))
-+)
-+
-+; Basic description init,finish,analyzer support.
-+
-+; Return a boolean indicating if all insns have a constant mnemonic
-+; (ie: no $'s in insn's name in `syntax' field).
-+; If constant, one can build the assembler hash table using the entire
-+; mnemonic.
-+
-+(define (constant-mnemonics?)
-+ #f ; FIXME
-+)
-+
-+; Initialize any "desc" specific things before loading the .cpu file.
-+; N.B. Since "desc" is always a part of another application, that
-+; application's init! routine must call this one.
-+
-+(define (desc-init!)
-+ *UNSPECIFIED*
-+)
-+
-+; Finish any "desc" specific things after loading the .cpu file.
-+; This is separate from analyze-data! as cpu-load performs some
-+; consistency checks in between.
-+; N.B. Since "desc" is always a part of another application, that
-+; application's finish! routine must call this one.
-+
-+(define (desc-finish!)
-+ *UNSPECIFIED*
-+)
-+
-+; Compute various needed globals and assign any computed fields of
-+; the various objects. This is the standard routine that is called after
-+; a .cpu file is loaded.
-+; N.B. Since "desc" is always a part of another application, that
-+; application's analyze! routine must call this one.
-+
-+(define (desc-analyze!)
-+ (set! strip-mnemonic? (constant-mnemonics?))
-+
-+ *UNSPECIFIED*
-+)
-diff -Nur binutils-2.24.orig/cgen/dev.scm binutils-2.24/cgen/dev.scm
---- binutils-2.24.orig/cgen/dev.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/dev.scm 2016-06-30 21:26:12.649892956 +0200
-@@ -0,0 +1,184 @@
-+; CGEN Debugging support.
-+; Copyright (C) 2000, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; This file is loaded in during an interactive guile session to
-+; develop and debug CGEN.
-+
-+; First load guile.scm to coerce guile into something we've been using.
-+; Guile is always in flux.
-+(load "guile.scm")
-+
-+(load "dev-utils.scm")
-+
-+; Also defined in read.scm, but we need it earlier.
-+(define APPLICATION 'UNKNOWN)
-+
-+(define dev-verbose-level 2)
-+
-+; Supply the path name and suffic for the .cpu file and delete the analyzer
-+; arg from cpu-load to lessen the typing.
-+
-+(define (cload . args)
-+ (set! verbose-level dev-verbose-level)
-+
-+ (let ((cpu-file #f)
-+ (keep-mach "all")
-+ (keep-isa "all")
-+ (options "")
-+ (trace-options "")
-+ (diagnostic-options ""))
-+
-+ ; Doesn't check if (cadr args) exists or if #:arch was specified, but
-+ ; this is a debugging tool!
-+ (let loop ((args args))
-+ (if (null? args)
-+ #f ; done
-+ (begin
-+ (case (car args)
-+ ((#:arch) (set! cpu-file (cadr args)))
-+ ((#:machs) (set! keep-mach (cadr args)))
-+ ((#:isas) (set! keep-isa (cadr args)))
-+ ((#:options) (set! options (cadr args)))
-+ ((#:trace) (set! trace-options (cadr args)))
-+ ((#:diag) (set! diagnostic-options (cadr args)))
-+ (else (error "unknown option:" (car args))))
-+ (loop (cddr args)))))
-+
-+ (case APPLICATION
-+ ((UNKNOWN) (error "application not loaded"))
-+ ((DESC) (cpu-load cpu-file
-+ keep-mach keep-isa options
-+ trace-options diagnostic-options
-+ desc-init!
-+ desc-finish!
-+ desc-analyze!))
-+ ((DOC) (cpu-load cpu-file
-+ keep-mach keep-isa options
-+ trace-options diagnostic-options
-+ doc-init!
-+ doc-finish!
-+ doc-analyze!))
-+ ((OPCODES) (cpu-load cpu-file
-+ keep-mach keep-isa options
-+ trace-options diagnostic-options
-+ opcodes-init!
-+ opcodes-finish!
-+ opcodes-analyze!))
-+ ((GAS-TEST) (cpu-load cpu-file
-+ keep-mach keep-isa options
-+ trace-options diagnostic-options
-+ gas-test-init!
-+ gas-test-finish!
-+ gas-test-analyze!))
-+ ((SIMULATOR) (cpu-load cpu-file
-+ keep-mach keep-isa options
-+ trace-options diagnostic-options
-+ sim-init!
-+ sim-finish!
-+ sim-analyze!))
-+ ((SID-SIMULATOR) (cpu-load cpu-file
-+ keep-mach keep-isa options
-+ trace-options diagnostic-options
-+ sim-init!
-+ sim-finish!
-+ sim-analyze!))
-+ ((SIM-TEST) (cpu-load cpu-file
-+ keep-mach keep-isa options
-+ trace-options diagnostic-options
-+ sim-test-init!
-+ sim-test-finish!
-+ sim-test-analyze!))
-+ ((TESTSUITE) (cpu-load cpu-file
-+ keep-mach keep-isa options
-+ trace-options diagnostic-options
-+ testsuite-init!
-+ testsuite-finish!
-+ testsuite-analyze!))
-+ (else (error "unknown application:" APPLICATION))))
-+)
-+
-+; Use the debugging evaluator.
-+(if (not (defined? 'DEBUG-EVAL))
-+ (define DEBUG-EVAL #t))
-+
-+; Tell maybe-load to always load the file.
-+(if (not (defined? 'CHECK-LOADED?))
-+ (define CHECK-LOADED? #f))
-+
-+(display "
-+
-+First choose the application via one of:
-+
-+(load-doc)
-+(load-opc)
-+(load-gtest)
-+(load-sim)
-+(load-stest)
-+(load-testsuite)
-+")
-+
-+(display "(load-sid)\n")
-+
-+(display "\
-+
-+Then load the .cpu file with:
-+
-+(cload #:arch \"path-to-cpu-file\" #:machs \"keep-mach\" #:isas \"keep-isa\"
-+ #:options \"options\" #:trace \"trace-options\" #:diag \"diagnostic-options\")
-+
-+Only the #:arch parameter is mandatory, the rest are optional.
-+
-+keep-mach:
-+comma separated list of machs to keep or `all'
-+
-+keep-isa:
-+comma separated list of isas to keep or `all'
-+
-+#:options specifies a list of application-specific options
-+
-+doc options:
-+[none yet]
-+
-+opcode options:
-+[none yet]
-+Remember to call (set-opc-file-path! \"/path/to/cpu.opc\").
-+
-+gas test options:
-+[none yet]
-+\n")
-+
-+(display "\
-+sim options:
-+with-scache
-+with-profile=fn
-+
-+sim test options:
-+[none yet]
-+\n")
-+
-+(display "\
-+sid options:
-+[wip]
-+\n")
-+
-+(display "\
-+trace-options: (comma-separated list of options)
-+commands - trace cgen command invocation
-+pmacros - trace pmacro expansion
-+all - trace everything
-+\n")
-+
-+(display "\
-+diagnostic-options: (comma-separated list of options)
-+iformat - do more diagnostics on instruction formats
-+all - do all diagnostics
-+\n")
-+
-+; If ~/.cgenrc exists, load it.
-+
-+(let ((cgenrc (string-append (getenv "HOME") "/.cgenrc")))
-+ (if (file-exists? cgenrc)
-+ (load cgenrc))
-+)
-diff -Nur binutils-2.24.orig/cgen/dev-utils.scm binutils-2.24/cgen/dev-utils.scm
---- binutils-2.24.orig/cgen/dev-utils.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/dev-utils.scm 2016-06-30 21:26:12.649892956 +0200
-@@ -0,0 +1,77 @@
-+;; CGEN Debugging support.
-+;; Copyright (C) 2000, 2009 Red Hat, Inc.
-+;; This file is part of CGEN.
-+;; See file COPYING.CGEN for details.
-+
-+;; This file contains a collection of utilities for use when
-+;; analyzing cpu files from Scheme.
-+
-+(define srcdir ".")
-+(set! %load-path (cons srcdir %load-path))
-+
-+(define (load-doc)
-+ (load "read")
-+ (load "desc")
-+ (load "desc-cpu")
-+ (load "html")
-+ ; ??? Necessary for the following case, dunno why.
-+ ; bash$ guile -l dev.scm
-+ ; guile> (load-doc)
-+ ; guile> (cload #:arch "./cpu/m32r.cpu")
-+ (set! APPLICATION 'DOC)
-+)
-+
-+(define (load-opc)
-+ (load "read")
-+ (load "desc")
-+ (load "desc-cpu")
-+ (load "opcodes")
-+ (load "opc-asmdis")
-+ (load "opc-ibld")
-+ (load "opc-itab")
-+ (load "opc-opinst")
-+ (set! APPLICATION 'OPCODES)
-+)
-+
-+(define (load-gtest)
-+ (load-opc)
-+ (load "gas-test")
-+ (set! APPLICATION 'GAS-TEST)
-+)
-+
-+(define (load-sid)
-+ (load "read")
-+ (load "utils-sim")
-+ (load "sid")
-+ (load "sid-cpu")
-+ (load "sid-model")
-+ (load "sid-decode")
-+ (set! APPLICATION 'SID-SIMULATOR)
-+)
-+
-+(define (load-sim)
-+ (load "read")
-+ (load "desc")
-+ (load "desc-cpu")
-+ (load "utils-sim")
-+ (load "sim")
-+ (load "sim-arch")
-+ (load "sim-cpu")
-+ (load "sim-model")
-+ (load "sim-decode")
-+ (set! APPLICATION 'SIMULATOR)
-+)
-+
-+(define (load-stest)
-+ (load-opc)
-+ (load "sim-test")
-+ (set! APPLICATION 'SIM-TEST)
-+)
-+
-+(define (load-testsuite)
-+ (load "read")
-+ (load "desc")
-+ (load "desc-cpu")
-+ (load "testsuite.scm")
-+ (set! APPLICATION 'TESTSUITE)
-+)
-diff -Nur binutils-2.24.orig/cgen/doc/app.texi binutils-2.24/cgen/doc/app.texi
---- binutils-2.24.orig/cgen/doc/app.texi 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/doc/app.texi 2016-06-30 21:26:12.649892956 +0200
-@@ -0,0 +1,430 @@
-+@c Copyright (C) 2000 Red Hat, Inc.
-+@c This file is part of the CGEN manual.
-+@c For copying conditions, see the file cgen.texi.
-+
-+@node Writing an application
-+@chapter Writing an application
-+@cindex Writing an application
-+
-+This chapter contains information for those wishing to write their own
-+CGEN application.
-+
-+@menu
-+* File Layout:: Organization of source files
-+* File Generation Process:: Workflow in cgen
-+* Coding Conventions:: Coding conventions
-+* Accessing Loaded Data:: Reading data from loaded .cpu files
-+* Name References:: Architecture names in generated code
-+* String Building:: Building long strings and writing them out
-+* COS:: Cgen's Object System
-+@end menu
-+
-+@node File Layout
-+@section File Layout
-+
-+Source files in cgen are organized in a very specific way.@footnote{As the
-+number of source files grows the entire layout may be changed, but until then
-+this is how things are.} It makes it easy to find things.
-+
-+@itemize @bullet
-+@item top level file is cgen-<app>.scm
-+The best way to create this file is to copy an existing application's file
-+(e.g. cgen-opc.scm) and modify to suit.
-+@item file <app>.scm contains general app-specific utilities
-+@item other files are <app>-foo.scm
-+@item add entry to dev.scm (load-<app>)
-+@end itemize
-+
-+@node File Generation Process
-+@section File Generation Process
-+
-+This is an overview of cgen workflow.
-+
-+@itemize @bullet
-+
-+@item cgen is started with list of files to generate and code generation
-+options
-+
-+@item source code is loaded
-+
-+@itemize @minus
-+@item application independent code is loaded if not compiled in
-+@item application specific code is loaded
-+
-+Currently app-specific code is never compiled in.
-+@itemize @minus
-+@item doesn't affect speed as much as application independent stuff
-+@item subject to more frequent changes
-+@item makes it easier to do application development if changes to .scm
-+files are "ready to use"
-+@end itemize
-+@end itemize
-+
-+@item ultimately procedure `cpu-load' is called which is the main driver for
-+loading .cpu files
-+
-+@item various data structures are initialized
-+
-+@item data files are loaded
-+
-+@itemize @minus
-+@item main <arch>.cpu file is loaded
-+
-+There is a #include-like mechanism for loading other files so big
-+architectures can be broken up into several files.
-+
-+While the architecture description is being loaded, entries not requested
-+are discarded. This happens, for example, when building a simulator:
-+there's no point in keeping instructions specific to a machine that is
-+not being generated. What to keep is based on the MACH and ISA attributes.
-+
-+@item application specific data files are loaded
-+
-+e.g. <arch>.sim
-+@end itemize
-+
-+@item builtin elements are created
-+
-+@item each requested file is generated by calling cgen-<file> generator
-+
-+The output is written to the output file with @code{with-output-to-file} so
-+the code must write to @code{(current-output-port)}.
-+
-+Some files require heavy duty processing of the cpu description.
-+For example the simulator computes the instruction formats from the
-+instruction field lists of each instruction. This computation is defered
-+to each cgen-<file> procedure that needs it and must be explicitly requested
-+by them. The results are cached so this is only done once of course.
-+
-+@item additional processing for some opcodes files
-+
-+Several opcodes files are built from three sources.
-+
-+@itemize @minus
-+@item generated code
-+
-+@item section in <arch>.opc file
-+
-+It's not appropriate to put large amounts of C (or perhaps any C) in
-+cgen description files, yet some things are best expressed in some
-+other language (e.g. assembler/disassembler operand parsing/printing).
-+
-+@item foo.in file
-+
-+It seems cleaner to put large amounts of non-machine-generated C
-+in separate files from code generator.
-+@end itemize
-+
-+@end itemize
-+
-+@node Coding Conventions
-+@section Coding Conventions
-+
-+@itemize @bullet
-+@item unless definition occupies one line, final trailing parenthesis is on
-+a line by itself beginning in column one
-+@item definitions internal to a source file begin with '-'
-+@item global state variables are named *foo-bar*
-+[FIXME: current code needs updating]
-+@item avoid uppercase (except for ???)
-+@item procedures that return a boolean result end in '?'
-+@item procedures that modify something end in '!'
-+@item classes are named <name>
-+@end itemize
-+
-+@node Accessing Loaded Data
-+@section Accessing Loaded Data
-+
-+Each kind of description file entry (defined with `define-foo') is recorded
-+in an object of class <foo>.@footnote{not true for <arch> but will be RSN}
-+All the data is collected together in an object of class
-+<system>.@footnote{got a better name?}
-+@footnote{modes aren't recorded here, should they be?}
-+
-+Data for the currently selected architecture is obtained with several
-+access functions.
-+
-+@smallexample
-+ (current-arch-name)
-+ - return symbol that is the name of the arch
-+ - this is the name specified with `define-arch'
-+
-+ (current-arch-comment)
-+ - return the comment specified with `define-arch'
-+
-+ (current-arch-atlist)
-+ - return the attributes specified with `define-arch'
-+
-+ (current-arch-default-alignment)
-+ - return a symbol indicated the default aligment
-+ - one of aligned, unaligned, forced
-+
-+ (current-arch-insn-lsb0?)
-+ - return a #t if the least significant bit in a word is numbered 0
-+ - return a #f if the most significant bit in a word is numbered 0
-+
-+ (current-arch-mach-name-list)
-+ - return a list of names (as symbols) of all machs in the architecture
-+
-+ (current-arch-isa-name-list)
-+ - return a list of names (as symbols) of all isas in the architecture
-+
-+ - for most of the remaining elements, there are three main accessors
-+ [foo is sometimes abbreviated]
-+ - current-foo-list - returns list of <foo> objects in the architecture
-+ - current-foo-add! - add a <foo> object to the architecture
-+ - current-foo-lookup - lookup the <foo> object based on its name
-+
-+ <atlist>
-+ (current-attr-list)
-+ (current-attr-add!)
-+ (current-attr-lookup)
-+
-+ <enum>
-+ (current-enum-list)
-+ (current-enum-add!)
-+ (current-enum-lookup)
-+
-+ <keyword>
-+ (current-kw-list)
-+ (current-kw-add!)
-+ (current-kw-lookup)
-+
-+ <isa>
-+ (current-isa-list)
-+ (current-isa-add!)
-+ (current-isa-lookup)
-+
-+ <cpu>
-+ (current-cpu-list)
-+ (current-cpu-add!)
-+ (current-cpu-lookup)
-+
-+ <mach>
-+ (current-mach-list)
-+ (current-mach-add!)
-+ (current-mach-lookup)
-+
-+ <model>
-+ (current-model-list)
-+ (current-model-add!)
-+ (current-model-lookup)
-+
-+ <hardware>
-+ (current-hw-list)
-+ (current-hw-add!)
-+ (current-hw-lookup)
-+
-+ <ifield>
-+ (current-ifld-list)
-+ (current-ifld-add!)
-+ (current-ifld-lookup)
-+
-+ <operand>
-+ (current-op-list)
-+ (current-op-add!)
-+ (current-op-lookup)
-+
-+ <insn>
-+ (current-insn-list)
-+ (current-insn-add!)
-+ (current-insn-lookup)
-+
-+ <macro-insn>
-+ (current-minsn-list)
-+ (current-minsn-add!)
-+ (current-minsn-lookup)
-+
-+ (current-ifmt-list)
-+ - return list of computed <iformat> objects
-+
-+ (current-sfmt-list)
-+ - return list of computed <sformat> objects
-+
-+ [there are a few more to be documented, not sure they'll remain as is]
-+@end smallexample
-+
-+@node Name References
-+@section Name References
-+
-+To simplify writing code generators, system names can be
-+specified with fixed strings rather than having to compute them.
-+The output is post-processed to convert the strings to the actual names.
-+Upper and lower case names are supported.
-+
-+@itemize @bullet
-+@item For the architecture name use @@arch@@, @@ARCH@@.
-+@item For the cpu family name use @@cpu@@, @@CPU@@.
-+@item For the prefix use @@prefix@@, @@PREFIX@@.
-+@end itemize
-+
-+The @samp{prefix} notion is to segregate different code for the same
-+cpu family. For example, this is used to segregate the ARM ISA from the
-+Thumb ISA.
-+
-+@node String Building
-+@section String Building
-+
-+Output generation uses a combination of writing text out as it is computed
-+and building text for later writing out.
-+
-+The top level file generator uses @code{string-write}. It takes string-lists
-+and thunks as arguments and writes each argument in turn to stdout.
-+String-lists are lists of strings (nested arbitrarily deep). It's cheaper
-+to @code{cons} long strings together than to use @code{string-append}.
-+Thunks return string-lists to write out, but isn't computed until all
-+preceeding arguments to `string-write' have been written out. This allows
-+defering building up of large amounts of text until it needs to be.
-+
-+The main procedures for building strings and writing them out are:
-+
-+@itemize @bullet
-+
-+@item (string-write string-list-or-thunk1 string-list-or-thunk2 ...)
-+
-+Loops over arguments writing them out in turn.
-+
-+@item (string-write-map proc string-list-or-thunk-list)
-+
-+Apply proc to each element in string-list-or-thunk-list and write out
-+the result.
-+
-+@item (string-list arg1 arg2 ...)
-+
-+Return list of arguments. This is identical to @code{list} except it
-+is intended to take string-lists as arguments.
-+
-+@item (string-list-map proc arg-list)
-+
-+Return list of @code{proc} applied to each element of @code{arg-list}.
-+This is identical to @code{map} except it is intended to take strings
-+as arguments.
-+
-+@item (string-append string1 string2 ...)
-+
-+For small arguments it's just as well to use @code{string-append}.
-+This is a standard Scheme procedure. The output is also easier to read
-+when developing interactively. And some subroutines are used in multiple
-+contexts including some where strings are required.
-+
-+@end itemize
-+
-+@node COS
-+@section COS
-+
-+COS is Cgen's Object System. It's a simple OO system for Guile that
-+was written to provide something useful until Guile had its own.
-+COS will be replaced with GOOPs if the Scheme implementation of cgen is kept.
-+
-+The pure Scheme implementation of COS uses vectors to record objects and
-+classes. The C implementation uses smobs (though classes are still
-+implemented with vectors).
-+
-+A complete list of user-visible functions is at the top of @file{cos.scm}.
-+
-+Here is a list of the frequently used ones.
-+
-+@itemize @bullet
-+
-+@item (class-make name parent-name-list element-list method-list)
-+
-+Use @code{class-make} to define a class.
-+
-+@smallexample
-+name: symbol, <name-of-class>
-+parent-name-list: list of symbols, names of each parent class
-+element-list: list of either symbols or (symbol . initial-value)
-+method-list: list of (symbol . lambda)
-+@end smallexample
-+
-+The result is the class's definition. It is usually assigned to a global
-+variable with same name as class's name. Current cgen code always does
-+this. It's not a requirement but it is convention.
-+
-+@item (new <class-name>)
-+
-+Create a new object with @code{new}.
-+@code{<class-name>} is typically the global variable that recorded
-+the results of @code{class-make}. The result is a new object of the
-+requested class. Class elements have either an "undefined" value
-+or an initial value if one was specified when the class was defined.
-+
-+@item (define-getters class-name prefix element-list)
-+
-+Elements (aka members) are read/written with "accessors".
-+Read accessors are defined with @code{define-getters}, which
-+creates one procedure for each element, each defined as
-+@code{(prefix-element-name object)}.
-+
-+This is a macro so don't quote anything.
-+
-+@item (define-setters class-name prefix element-list)
-+
-+Write accessors are defined with @code{define-setters}, which
-+creates one procedure for each element, each defined as
-+@code{(prefix-set-element-name! object new-value)}.
-+
-+This is a macro so don't quote anything.
-+
-+@item (elm-get object elm-name)
-+
-+This can only be used in method definitions (blech, blah blah blah).
-+
-+@item (elm-set! object elm-name new-value)
-+
-+This can only be used in method definitions (blech, blah blah blah).
-+
-+@item (send object method-name arg1 arg2)
-+
-+Invoke method @code{method-name} on @code{object}.
-+
-+The convention is to put this in a cover fn:
-+@code{(class-name-method-name object arg1 arg2)}.
-+
-+@item (send-next object method-name arg1 arg2)
-+
-+Same as @code{send} except only usable in methods and is used to invoke
-+the method in the parent class.
-+
-+@item (make object . args)
-+
-+One standard way to create a new object is with @code{make}.
-+It is a wrapper, defined as
-+
-+@smallexample
-+(define (make object . args)
-+ (apply send (cons (new object) (cons 'make! args)))
-+)
-+@end smallexample
-+
-+@item (vmake class . args)
-+
-+The other standard way to create objects is with @code{vmake}.
-+
-+@code{args} is a list of option names and arguments.
-+
-+??? Not completely implemented yet.
-+
-+@item (method-make! class method-name lambda)
-+
-+The normal way of creating methods is to use @code{method-make!}, not define
-+them with the class. It's just easier to define them separately.
-+
-+@item (method-make-virtual! class method-name lambda)
-+
-+Create virtual methods created with @code{method-make-virtual!}.
-+
-+@item (method-make-forward! class elm-name methods) -> unspecified
-+
-+Forwarding a method invocation on one object to another is extremely
-+useful so some utilities have been created to simplify creating forwarding
-+methods.
-+
-+@code{methods} is a list of method names. A method is created for each one
-+that forwards the method onto the object contained in element ELM-NAME.
-+
-+@item (method-make-virtual-forward!)
-+
-+Same as method-make-forward! except that it creates virtual methods.
-+
-+@end itemize
-diff -Nur binutils-2.24.orig/cgen/doc/cgen.texi binutils-2.24/cgen/doc/cgen.texi
---- binutils-2.24.orig/cgen/doc/cgen.texi 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/doc/cgen.texi 2016-06-30 21:26:12.649892956 +0200
-@@ -0,0 +1,118 @@
-+\input texinfo @c -*- Texinfo -*-
-+@setfilename cgen.info
-+
-+@include version.texi
-+
-+@ifinfo
-+@format
-+START-INFO-DIR-ENTRY
-+* Cgen: (cgen). The Cpu tools GENerator.
-+END-INFO-DIR-ENTRY
-+@end format
-+@end ifinfo
-+
-+@ifinfo
-+Copyright @copyright{} 2000 Red Hat, Inc.
-+
-+Permission is granted to make and distribute verbatim copies of
-+this manual provided the copyright notice and this permission notice
-+are preserved on all copies.
-+
-+@ignore
-+Permission is granted to process this file through TeX and print the
-+results, provided the printed document carries a copying permission
-+notice identical to this one except for the removal of this paragraph
-+(this paragraph not being relevant to the printed manual).
-+
-+@end ignore
-+
-+Permission is granted to copy and distribute modified versions of this
-+manual under the conditions for verbatim copying, provided also that
-+the entire resulting derived work is distributed under the terms of a
-+permission notice identical to this one.
-+
-+Permission is granted to copy and distribute translations of this manual
-+into another language, under the above conditions for modified versions.
-+@end ifinfo
-+
-+@synindex ky cp
-+@c
-+@c This file documents the Cpu tools GENerator, CGEN.
-+@c
-+@c Copyright (C) 2000 Red Hat, Inc.
-+@c
-+
-+@setchapternewpage odd
-+@settitle CGEN
-+@titlepage
-+@finalout
-+@title The Cpu tools GENerator, CGEN.
-+@subtitle Version @value{VERSION}
-+@sp 1
-+@subtitle @value{UPDATED}
-+@author Douglas J. Evans
-+@author Red Hat, Inc.
-+@page
-+
-+@tex
-+{\parskip=0pt \hfill Red Hat\par \hfill
-+\TeX{}info \texinfoversion\par }
-+@end tex
-+
-+@vskip 0pt plus 1filll
-+Copyright @copyright{} 2000 Red Hat, Inc.
-+
-+Permission is granted to make and distribute verbatim copies of
-+this manual provided the copyright notice and this permission notice
-+are preserved on all copies.
-+
-+Permission is granted to copy and distribute modified versions of this
-+manual under the conditions for verbatim copying, provided also that
-+the entire resulting derived work is distributed under the terms of a
-+permission notice identical to this one.
-+
-+Permission is granted to copy and distribute translations of this manual
-+into another language, under the above conditions for modified versions.
-+@end titlepage
-+
-+@node Top
-+@top Introduction
-+
-+@cindex version
-+This brief manual contains preliminary documentation for the CGEN program,
-+version @value{VERSION}.
-+
-+@menu
-+* Introduction:: Introduction
-+* Running CGEN:: How to run CGEN
-+* RTL:: The Register Transfer Language CGEN uses
-+* Preprocessor macros:: Macros to simplify description file writing
-+* Porting:: Porting
-+* Opcodes:: Assembler/disassembler support
-+* Simulation:: Simulation support
-+* Writing an application:: Writing your own CGEN application
-+* Glossary:: Glossary
-+* Miscellaneous notes:: Notes needing a better home
-+* Credits:: Credits
-+* Index:: Index
-+@end menu
-+
-+@include intro.texi
-+@include running.texi
-+@include rtl.texi
-+@include pmacros.texi
-+@include porting.texi
-+@include opcodes.texi
-+@include sim.texi
-+@include app.texi
-+@include glossary.texi
-+@include notes.texi
-+@include credits.texi
-+
-+@node Index
-+@unnumbered Index
-+
-+@printindex cp
-+
-+@contents
-+@bye
-diff -Nur binutils-2.24.orig/cgen/doc/credits.texi binutils-2.24/cgen/doc/credits.texi
---- binutils-2.24.orig/cgen/doc/credits.texi 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/doc/credits.texi 2016-06-30 21:26:12.649892956 +0200
-@@ -0,0 +1,30 @@
-+@c Copyright (C) 2000 Red Hat, Inc.
-+@c This file is part of the CGEN manual.
-+@c For copying conditions, see the file cgen.texi.
-+
-+@node Credits
-+@chapter Credits
-+
-+The following people, listed in alphabetical order, have contributed to
-+CGEN in their own way--thanks! If you feel your name has been wrongly
-+omitted from this list, please contact one of the maintainers.
-+
-+@itemize @minus
-+@item Dave Brolley
-+@item Andrew Cagney
-+@item Steve Chamberlain
-+@item Nick Clifton
-+@item Bob Cmelik
-+@item Frank Ch. Eigler
-+@item Ben Elliston
-+@item Matthew Green
-+@item Kim Knuttila
-+@item Greg McGary
-+@item Ken Raeburn
-+@item Jim Wilson
-+@end itemize
-+
-+There's a TV program I watched growing up called ``The Hilarious House
-+Of Frightenstein''. The credits at the end had a twist in that Billy
-+Van, who played most of the characters, appeared in them again and
-+again. I would do the same here for Ian Lance Taylor.
-diff -Nur binutils-2.24.orig/cgen/doc/glossary.texi binutils-2.24/cgen/doc/glossary.texi
---- binutils-2.24.orig/cgen/doc/glossary.texi 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/doc/glossary.texi 2016-06-30 21:26:12.649892956 +0200
-@@ -0,0 +1,29 @@
-+@c Copyright (C) 2000 Red Hat, Inc.
-+@c This file is part of the CGEN manual.
-+@c For copying conditions, see the file cgen.texi.
-+
-+@node Glossary
-+@chapter Glossary
-+
-+@table @asis
-+@item arch
-+This is the overall architecture. It is the same as BFD's use of
-+@emph{arch}.
-+
-+@item isa
-+Acronym for Instruction Set Architecture.
-+
-+@item mach
-+This is a variant of the architecture, short for machine. It is
-+essentially the same as BFD's use of @emph{mach}.
-+
-+@item CPU family
-+A group of related mach's. Simulator support is organized along ``CPU
-+family'' lines to keep related mach's together under one roof to
-+simplify things. The organization is semi-arbitrary and is up to the
-+programmer.
-+
-+@item model
-+An implementation of a mach. It is essentially akin to the argument
-+to @code{-mtune=} in SPARC GCC (and other GCC ports).
-+@end table
-diff -Nur binutils-2.24.orig/cgen/doc/internals.texi binutils-2.24/cgen/doc/internals.texi
---- binutils-2.24.orig/cgen/doc/internals.texi 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/doc/internals.texi 2016-06-30 21:26:12.649892956 +0200
-@@ -0,0 +1,393 @@
-+\input texinfo @c -*- Texinfo -*-
-+
-+@c This file is work in progress.
-+@c Don't expect it to go through texinfo just yet. --bje
-+
-+@include version.texi
-+
-+@ifinfo
-+Copyright @copyright{} 2000 Red Hat, Inc.
-+
-+Permission is granted to make and distribute verbatim copies of
-+this manual provided the copyright notice and this permission notice
-+are preserved on all copies.
-+
-+@ignore
-+Permission is granted to process this file through TeX and print the
-+results, provided the printed document carries a copying permission
-+notice identical to this one except for the removal of this paragraph
-+(this paragraph not being relevant to the printed manual).
-+
-+@end ignore
-+
-+Permission is granted to copy and distribute modified versions of this
-+manual under the conditions for verbatim copying, provided also that
-+the entire resulting derived work is distributed under the terms of a
-+permission notice identical to this one.
-+
-+Permission is granted to copy and distribute translations of this manual
-+into another language, under the above conditions for modified versions.
-+@end ifinfo
-+
-+@synindex ky cp
-+@c
-+@c This file documents the internals of the Cpu tools GENerator, CGEN.
-+@c
-+@c Copyright (C) 2000 Red Hat, Inc.
-+@c
-+
-+@setchapternewpage odd
-+@settitle CGEN
-+@titlepage
-+@finalout
-+@title The Cpu tools GENerator, CGEN.
-+@subtitle Version @value{VERSION}
-+@sp 1
-+@subtitle @value{UPDATED}
-+@author Ben Elliston
-+@author Red Hat, Inc.
-+@page
-+
-+@tex
-+{\parskip=0pt \hfill Red Hat, Inc.\par \hfill
-+\TeX{}info \texinfoversion\par }
-+@end tex
-+
-+@vskip 0pt plus 1filll
-+Copyright @copyright{} 2000 Red Hat, Inc.
-+
-+Permission is granted to make and distribute verbatim copies of
-+this manual provided the copyright notice and this permission notice
-+are preserved on all copies.
-+
-+Permission is granted to copy and distribute modified versions of this
-+manual under the conditions for verbatim copying, provided also that
-+the entire resulting derived work is distributed under the terms of a
-+permission notice identical to this one.
-+
-+Permission is granted to copy and distribute translations of this manual
-+into another language, under the above conditions for modified versions.
-+@end titlepage
-+
-+@node Top
-+@top Introduction
-+
-+@cindex version
-+This manual documents the internals of CGEN, version @value{VERSION}.
-+
-+@menu
-+* Introduction:: Introduction
-+* Guile::
-+* Conventions:: Coding conventions
-+* Applications::
-+* Source file overview::
-+* Option processing::
-+* Parsing::
-+* Debuging:: Debugging applications
-+* Version numbering::
-+* Glossary:: Glossary
-+* Index:: Index
-+@end menu
-+
-+@node Introduction
-+@chapter Introduction
-+
-+This document details the implementation and internals of CGEN, the
-+``Cpu tools GENerator''. It focuses on theory of operation and concepts
-+rather than extensive details of the implementation--these details
-+date too quickly.
-+
-+@node Conventions
-+@chapter Conventions
-+
-+There are a number of conventions used in the cgen source code. If you
-+take the time to absorb these now, the code will be much easier to
-+understand.
-+
-+@itemize @bullet
-+@item Procedures and variables local to a file are named @code{-foo}.
-+@item Only routines that emit application code begin with @code{gen-}.
-+@item Symbols beginning with @code{c-} are either variables containing C code
-+ or procedures that generate C code, similarily for C++ and @code{c++-}.
-+@item Variables containing C code begin with @code{c-}.
-+@item Only routines that emit an entire file begin with @code{cgen-}.
-+@item All @file{.cpu} file elements shall have @code{-foo-parse} and
-+ @code{-foo-read} procedures.
-+@item Global variables containing class definitions shall be named
-+ @code{<class-name>}.
-+@item Procedures related to a particular class shall be named
-+ @code{class-name-proc-name}, where @code{class-name} may be abbreviated.
-+@item Procedures that test whether something is an object of a
-+ particular class shall be named @code{class-name?}.
-+@item In keeping with Scheme conventions, predicates shall have a
-+ @code{?} suffix.
-+@item In keeping with Scheme conventions, methods and procedures that
-+ modify an argument or have other side effects shall have a
-+ @code{!} suffix, usually these procs return @code{*UNSPECIFIED*}.
-+@item All @code{-foo-parse}, @code{parse-foo} procs shall have @code{context}
-+ as the first argument. [FIXME: not all such procs have been
-+ converted]
-+@end itemize
-+
-+@node Applications
-+@chapter Applications
-+
-+One of the most importance concepts to grasp with CGEN is that it is not
-+a simulator generator. It's a generic tool generator--it can be used to
-+generate a simulator, an assembler, a disassembler and so on. These
-+``applications'' can then produce different outputs from the same CPU
-+description.
-+
-+When you want to run the cgen framework, an application-specific source
-+file is loaded into the Guile interpreter to get cgen running. This
-+source file loads in any other source files it needs and then, for
-+example, calls:
-+
-+@example
-+ (cgen #:argv argv
-+ #:app-name "sim"
-+ #:arg-spec sim-arguments
-+ #:init sim-init!
-+ #:finish sim-finish!
-+ #:analyze sim-analyze!)
-+ )
-+@end example
-+
-+This gets the whole framework started, in an application-specific way.
-+
-+node Source file overview
-+@chapter Source file overview
-+
-+@table @file
-+
-+@item *.cpu, *.opc, *.sim
-+Files belonging to each CPU description. .sim files are automatically
-+included if they are defined for the given architecture.
-+
-+@item doc/*.texi
-+Texinfo documentation for cgen.
-+
-+@item slib/*.scm
-+Third-party libraries written in Scheme. For example, sort.scm is a
-+collection of procedures to sort lists.
-+
-+@item Makefile.am
-+automake Makefile for cgen.
-+
-+@item NEWS
-+News about cgen.
-+
-+@item README
-+Notes to read abot cgen.
-+
-+@item attr.scm
-+Handling of cgen attributes.
-+
-+@item cgen-gas.scm
-+Top-level for GAS testsuite generation.
-+
-+@item cgen-opc.scm
-+Top-level for opcodes generation.
-+
-+@item cgen-sid.scm
-+Top-level for SID simulator generation.
-+
-+@item cgen-sim.scm
-+Top-level for older simulator generation.
-+
-+@item cgen-stest.scm
-+Top-level for simulator testsuite generation.
-+
-+@item configure.in
-+Template for `configure'--process with autoconf.
-+
-+@item cos.scm
-+cgen object system. Adds object oriented features to the Scheme
-+language. See the top of @file{cos.scm} for the user-visible
-+procedures.
-+
-+@item decode.scm
-+Generic decoder routines.
-+
-+@item desc-cpu.scm
-+???
-+
-+@item desc.scm
-+???
-+
-+@item dev.scm
-+Debugging support.
-+
-+@item enum.scm
-+Enumerations.
-+
-+@item fixup.scm
-+Some procedure definitions to patch up possible differences between
-+older and newer versions of Guile:
-+
-+ * define a (load..) procedure that uses
-+ primitive-load-path if load-from-path is not known.
-+
-+ * define =? and >=? if they aren't already known.
-+
-+ * define %stat, reverse! and debug-enable in terms of
-+ older equivalent procedures, if they aren't already
-+ known.
-+
-+@item gas-test.scm
-+GAS testsuite generator.
-+
-+@item hardware.scm
-+Hardware description routines.
-+
-+@item ifield.scm
-+Instruction fields.
-+
-+@item insn.scm
-+Instruction defintions.
-+
-+@item mach.scm
-+Architecture description routines.
-+
-+@item minsn.scm
-+Macro instructions.
-+
-+@item mode.scm
-+Modes.
-+
-+@item model.scm
-+Model specification.
-+
-+@item opc-asmdis.scm
-+For the opcodes applications.
-+
-+@item opc-ibld.scm
-+Ditto.
-+
-+@item opc-itab.scm
-+Ditto.
-+
-+@item opc-opinst.scm
-+Ditto.
-+
-+@item opcodes.scm
-+Ditto.
-+
-+@item operand.scm
-+Operands.
-+
-+@item pgmr-tools.scm
-+Programmer tools--debugging tools, mainly.
-+
-+@item pmacros.scm
-+Preprocessor macros.
-+
-+@item profile.scm
-+Unused?
-+
-+@item read.scm
-+Read and parse .cpu files. @code{maybe_load} is used to load in files
-+for required symbols if they are not already present in the environment
-+(say, because it was compiled).
-+
-+@item rtl-c.scm
-+RTL to C translation.
-+
-+@item rtl.scm
-+RTL support.
-+
-+@item rtx-funcs.scm
-+RTXs.
-+
-+@item sem-frags.scm
-+Semantic fragments.
-+
-+@item semantics.scm
-+Semantic analysis for the CPU descriptions.
-+
-+@item sid-cpu.scm
-+For the SID application.
-+
-+@item sid-decode.scm
-+Ditto.
-+
-+@item sid-model.scm
-+Ditto.
-+
-+@item sid.scm
-+Ditto.
-+
-+@item sim-arch.scm
-+For the simulator application.
-+
-+@item sim-cpu.scm
-+Ditto.
-+
-+@item sim-decode.scm
-+Ditto.
-+
-+@item sim-model.scm
-+Ditto.
-+
-+@item sim-test.scm
-+For the simulator testsuite application.
-+
-+@item sim.scm
-+For the simulator application.
-+
-+@item simplify.inc
-+Preprocessor macros to simplify CPU description files. This file is not
-+loaded by the Scheme interpreter, but is instead included by the .cpu
-+file.
-+
-+@item types.scm
-+Low-level types.
-+
-+@item utils-cgen.scm
-+cgen-specific utilities.
-+
-+@item utils-gen.scm
-+Code generation specific utilities.
-+
-+@item utils-sim.scm
-+Simulator specific utilities.
-+
-+@item utils.scm
-+Miscellaneous utilities.
-+
-+@end table
-+
-+@code{cgen} is the main entry point called by application file
-+generators. It just calls @code{-cgen}, but it does so wrapped inside a
-+@code{catch-with-backtrace} procedure to make debugging easier.
-+
-+@node Version numbering
-+@chapter Version numbering
-+
-+There are two version numbers: the version number of cgen itself and a
-+version number for the description language it accepts. These are kept
-+in the symbols @code{-CGEN-VERSION} and @code{-CGEN-LANG-VERSION} in
-+@file{read.scm}.
-+
-+@node Debugging
-+@chapter Debugging
-+
-+Debugging can be difficult in Guile. Guile 1.4 (configured with the
-+--enable-guile-debug option) seems unable to produce a stack backtrace
-+when errors are triggered in Scheme code. You should use Guile 1.3 in
-+the meantime. So far, the best way to debug your application is to
-+insert (error) function applications at select places to cause the
-+interpreter to output a stack backtrace. This can be useful for
-+answering the ``How did I get here?'' question.
-+
-+CGEN includes a (logit) function which logs error messages at different
-+diagnostic levels. If you want to produce debugging output, use
-+(logit).
-+
-+@node Index
-+@unnumbered Index
-+
-+@printindex cp
-+
-+@contents
-+@bye
-diff -Nur binutils-2.24.orig/cgen/doc/intro.texi binutils-2.24/cgen/doc/intro.texi
---- binutils-2.24.orig/cgen/doc/intro.texi 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/doc/intro.texi 2016-06-30 21:26:12.649892956 +0200
-@@ -0,0 +1,759 @@
-+@c Copyright (C) 2000 Red Hat, Inc.
-+@c This file is part of the CGEN manual.
-+@c For copying conditions, see the file cgen.texi.
-+
-+@node Introduction
-+@comment node-name, next, previous, up
-+@chapter Introduction to CGEN
-+
-+@menu
-+* Overview::
-+* CPU description language::
-+* Opcodes support::
-+* Simulator support::
-+* Testing support::
-+* Implementation language::
-+@end menu
-+
-+@node Overview
-+@section Overview
-+
-+CGEN is a project to provide a framework and toolkit for writing cpu tools.
-+
-+@menu
-+* Goal:: What CGEN tries to achieve.
-+* Why do it?::
-+* Maybe it should not be done?::
-+* How ambitious is CGEN?::
-+* What is missing that should be there soon?::
-+@end menu
-+
-+@node Goal
-+@subsection Goal
-+
-+The goal of CGEN (pronounced @emph{seejen}, and short for
-+"Cpu tools GENerator") is to provide a uniform framework and toolkit
-+for writing programs like assemblers, disassemblers, and
-+simulators without explicitly closing any doors on future things one
-+might wish to do. In the end, its scope is the things the software developer
-+cares about when writing software for the cpu (compilation, assembly,
-+linking, simulation, profiling, debugging, ???).
-+
-+Achieving the goal is centered around having an application independent
-+description of a CPU (plus environment, like ABI) that applications can then
-+make use of. In the end that's a lot to ask for from one language. What
-+applications can or should be able to use CGEN is left to evolve over time.
-+The description language itself is thus also left to evolve over time!
-+
-+Achieving the goal also involves having a toolkit, libcgen, that contains
-+a compiled form of the cpu description plus a suite of routines for working
-+with the data.
-+
-+CGEN is not a new idea. Some GNU ports have done something like this --
-+for example, the SH port in its early days. However, the idea never really
-+``caught on''. CGEN was started because I think it should.
-+
-+Since CGEN is a very ambitious project, there are currently lots of
-+things that aren't written down, let alone implemented. It will take
-+some time to flush all the details out, but in and of itself that doesn't
-+necessarily mean they can't be flushed out, or that they haven't been
-+considered.
-+
-+@node Why do it?
-+@subsection Why do it?
-+
-+I think it is important that GNU assembler/disassembler/simulator ports
-+be done from a common framework. On some level it's fun doing things
-+from scratch, which was and still is to a large extent current
-+practice, but this is not the place for that.
-+
-+@itemize @bullet
-+@item the more ports of something one has, the more important it is that they
-+be the same.
-+
-+@item the more complex each of them become, the more important it is
-+that they be the same.
-+
-+@item if they all are the same, a feature added to one is added to all
-+of them--within the context of their similarity, of course.
-+
-+@item with a common framework in place the planning of how to architect
-+a port is taken care of, the main part of what's left is simply writing
-+the CPU description.
-+
-+@item the more applications that use the common framework, the fewer
-+places the data needs to be typed in and maintained.
-+
-+@item new applications can take advantage of data and utilities that
-+already exist.
-+
-+@item a common framework provides a better launching point for bigger things.
-+@end itemize
-+
-+@node Maybe it should not be done?
-+@subsection Maybe it should not be done?
-+
-+However, no one has yet succeeded in pushing for such an extensive common
-+framework.@footnote{I'm just trying to solicit input here. Maybe these
-+questions will help get that input.}
-+
-+@itemize @bullet
-+@item maybe people think it's not worth it?
-+
-+@item maybe they just haven't had the inclination to see it through?
-+(where ``inclination'' includes everything from the time it would take
-+to the dealing with the various parties whose turf you would tread on)
-+
-+@item maybe in the case of assemblers and simulators they're not complex
-+enough to see much benefit?
-+
-+@item maybe the resulting tight coupling among the various applications
-+will cause problems that offset any gains?
-+
-+@item maybe there's too much variance to try to achieve a common
-+framework, so that all attempts are doomed to become overly complex?
-+
-+@item as a corollary of the previous item, maybe in the end trying to
-+combine ISA syntax (the assembly language), with ISA semantics (simulation),
-+with architecture implementation (performance), would become overly complex?
-+@end itemize
-+
-+@node How ambitious is CGEN?
-+@subsection How ambitious is CGEN?
-+
-+CGEN is a very ambitious project, as future projects can be:
-+
-+@menu
-+* More complicated simulators::
-+* Profiling tools::
-+* Program analysis tools::
-+* ABI description::
-+* Machine generated architecture reference material::
-+* Tools like what NJMCT provides::
-+* Input to a compiler backend::
-+* Hardware/software codesign::
-+@end menu
-+
-+@node More complicated simulators
-+@subsubsection More complicated simulators
-+
-+Current CGEN-based simulators achieve their speed by using GCC's
-+"computed goto" facility to implement a threaded interpreter.
-+The "main loop" of the cpu engine is contained within one function
-+and the administrivia of running the program is reduced to about three
-+host instructions per target instruction (one to increment a "virtual pc",
-+one to fetch the address of code that implements that next target instruction,
-+and one to branch to it). Target instructions can be simulated with as few as
-+seven@footnote{Actually, this can be reduced even more by creating copies of
-+an instruction specialized for all the various inputs.} instructions for an
-+"add" (load address of src1, load src1, load address of src2, load src2, add,
-+load address of result, store result). So ignoring overhead (which
-+is minimal for frequently executed code) that's ten host instructions per
-+"typical" target instruction. Pretty good.@footnote{The actual results
-+depend, of course, on the exact mix of target instructions in the application,
-+what instructions the host cpu has, and how efficiently the rest of the
-+simulator is (e.g. floating point and memory operations can require a hundred
-+or more host instructions).}
-+
-+However, things can still be better. There is still some implementation
-+related overhead that can be removed. The two instructions to branch
-+to the next instruction would be unnecessary if instruction executors
-+were concatenated together. The fetching and storing of target registers
-+can be reduced if target registers were kept in host registers across
-+instruction boundaries (and the longer one can keep them in host registers
-+the better). A consequence of both of these improvements is the number
-+of memory operations is drastically reduced. There isn't a lot of ILP
-+in the simulation of target instructions to hide memory latencies.
-+Another consequence of these improvements is the opportunity to perform
-+inter-target-instruction scheduling of the host instructions and other
-+optimizations.
-+
-+There are two ways to achieve these improvements. Both involve converting
-+basic blocks (or superblocks) in the target application into the host
-+instruction set and compiling that. The first way involves doing this
-+"offline". The target program is analyzed and each instruction is converted
-+into, for example, C code that implements the instruction. The result is
-+compiled and then the new version of the target program is run.
-+
-+The second way is to do the translation from target instruction set to
-+host instruction set while the target program is running. This is often
-+refered to as JIT (Just In Time) simulation (FIXME: proper phrasing here?).
-+One way to implement this is to simulate instructions the way existing
-+CGEN simulators do, but keep track of how frequently a basic block is
-+executed. If a block gets executed often enough, then compile a translation
-+of it to the host instruction set and switch to using that. This avoids
-+the overhead of doing the compilation on code that is rarely executed.
-+Note that here is one place where a dual cpu system can be put to good use.
-+One cpu handles the simulation and the other handles compilation (translating
-+target instructions to host instructions).
-+CGEN can@footnote{This hasn't actually been implemented so there is
-+some hand waving here.} handle a large part of building the JIT compiler
-+because both host and target architectures are recorded in a way that is
-+amenable to program manipulation.
-+
-+A hybrid of these two ways is to translate target basic blocks to
-+C code, compile it, and dynamically load the result into the running
-+simulation. Problems with this are that one must invoke an external program
-+(though one could dynamically load a special form of C compiler I suppose)
-+and there's a lot of overhead parsing and optimizing the C code. On the
-+other hand one gets to take full advantage of the compiler's optimization
-+technology. And if the application takes a long time to simulate, the
-+extra cost may be worthwhile. A dual cpu system is of benefit here too.
-+
-+@node Profiling tools
-+@subsubsection Profiling tools
-+
-+It is useful to know how well an architecture is being utilized.
-+For one, this helps build better architectures. It also helps determine
-+how well a compilation system is using an architecture.
-+
-+CGEN-based simulators already compute instruction frequency counts.
-+It's straightforward to add register frequency counts.
-+Monitoring other aspects of the ISA is also possible. The description
-+file provides all the necessary data, all that's needed is to write a
-+generator for an application that then performs the desired analysis.
-+
-+Function unit, pipeline, and other architecture implementation related items
-+requires a lot more effort but it is doable. The guideline for this effort
-+is again coming up with an application-independent specification of these
-+things.
-+
-+CGEN does not currently support memory or cache profiling.
-+Obviously they're important, and support may be added in the future.
-+One thing that would be straightforward to add is the building of
-+trace data for usage by cache and memory analysis tools.
-+The point though is that these tools won't benefit much from CGEN's
-+existence.
-+
-+Another kind of profiling tool is one that takes the program to
-+be profiled as input, inserts profiling code into it, and then generates
-+a new version of the program which is then run.@footnote{Note that there
-+are other uses for such a program modification tool besides profiling.}
-+Recorded in CGEN's description files should be all the necessary ISA related
-+data to do this. One thing that's missing is code to handle the file format
-+and relocations.@xref{ABI description}.
-+
-+@node Program analysis tools
-+@subsubsection Program analysis tools
-+
-+Related to profiling tools are static program analysis tools.
-+By this I mean taking machine code as input and analyzing it in some way.
-+Except for symbolic information (which could come from BFD or elsewhere),
-+CGEN provides enough information to analyze machine code, both the
-+the raw instructions *and* their semantics. Libcgen should contain
-+all the basic tools for doing this.
-+
-+@node ABI description
-+@subsubsection ABI description
-+
-+Several tools need knowledge of not only a cpu's ISA but also of the ABI
-+in use. I believe it makes sense to apply the same goals that went into
-+CGEN's architecture description language to an ABI description language:
-+specify the ABI in an application independent way and then have a basic
-+toolkit/library that uses that data and allow the writing of program
-+generators for applications that want more than what the toolkit/library
-+provides.
-+
-+Part of what an ABI defines is the file format and relocations.
-+This is something that BFD is built for. I think a BFD rewrite
-+should happen and should be based, at least in part, on a CGEN-style
-+ABI description. This rewrite would be one user of the ABI description,
-+but certainly not the only user.
-+One problem with this approach is that BFD requires a lot of file format
-+specific C code. I doubt all of this code is amenable to being described
-+in an application independent way. Careful separation of such things
-+will be necessary. It may even be useful to ignore old file formats
-+and limit such a BFD rewrite to ELF (not that ELF is free from such
-+warts, of course).
-+
-+@node Machine generated architecture reference material
-+@subsubsection Machine generated architecture reference material
-+
-+Engineers often need to refer to architecture documentation.
-+One problem is that there's often only so many hardcopy manuals
-+to go around. Since the CPU description contains a lot of the information
-+engineers need to find it makes sense to convert that information back
-+into a readable form. The manual can then be online available to everyone.
-+Furthermore, each architecture will be documented using the same style
-+making it easier to move from architecture to architecture.
-+
-+@node Tools like what NJMCT provides
-+@subsubsection Tools like what NJMCT provides
-+
-+NJMCT is the New Jersey Machine Code Toolkit.
-+It focuses exclusively on the encoding and decoding of instructions.
-+[FIXME: wip, need to say more].
-+
-+@node Input to a compiler backend
-+@subsubsection Input to a compiler backend
-+
-+One can define a GCC port to include these four things:
-+
-+@itemize @bullet
-+@item cpu architecture description
-+@item cpu implementation description
-+@item ABI description
-+@item miscellaneous
-+@end itemize
-+
-+The CGEN description provides all of the cpu architecture description
-+that the compiler needs.
-+However, the current design of the CPU description language is geared
-+towards going from machine instructions to semantic content, whereas
-+what a compiler wants is to do is go from semantic content to machine
-+instructions, so in the end this might not be a reasonable thing to
-+pursue. On the other hand, that problem can be solved in part by
-+specifying two sets of semantics for each instruction: one for the
-+compiler side of things, and one for the simulator side of things.
-+Frequently they will be the same thing and thus need only be specified once.
-+Though specifying them twice, for the two different contexts, is reasonable
-+I think. If the two versions of the semantics are used by multiple applications
-+this makes even more sense.
-+
-+The planned rewrite of model support in CGEN will support whatever the
-+compiler needs for the implementation description.
-+
-+Compilers also need to know the target's ABI, which isn't relevant for
-+an architecture description. On the other hand, more than just the
-+compiler needs knowledge of the ABI. Thus it makes sense to think about
-+how many tools there are that need this knowledge and whether one can
-+come up with a unifying description of the ABI. Hence one future
-+project is to add the ABI description to CGEN. This would encompass in
-+essence most of what is contained in the System V ABI documentation.
-+
-+That leaves the "miscellaneous" part. Essentially this is a catchall
-+for whatever else is needed. This would include things like
-+include file directory locations, ???. There's probably no need to
-+add these to the CGEN description language.
-+
-+One can even envision a day when GCC emits object files directly.
-+The instruction description contains enough information to build
-+the instructions and the ABI support would provide enough
-+information on relocations and object file formats.
-+Debugging information should be treated as an orthogonal concept.
-+At present it is outside the scope of CGEN, though clearly the same
-+reasoning behind CGEN applies to debugging support as well.
-+
-+@node Hardware/software codesign
-+@subsubsection Hardware/software codesign
-+
-+This section isn't very well thought out -- not much time has been put
-+into it. The thought is that some interface with VHDL/Verilog could
-+be created that would assist hw/sw codesign.
-+
-+Another related application is to have a feedback mechanism from the
-+compilation system that helps improve the architecture description
-+(both CGEN and HDL).
-+For example, the compiler could determine what instructions would have
-+made a significant benefit for a particular application. CGEN descriptions
-+for these instructions could be generated, resulting in a new set of
-+compilation tools from which the hypothesis of adding the new instructions
-+could then be validated. Note that adding these new instructions only
-+required writing CGEN descriptions of them (setting aside HDL concerns).
-+Once done, all relevant tools would be automagically updated to support
-+the new instructions.
-+
-+@node What is missing that should be there soon?
-+@subsection What's missing that should be there soon?
-+
-+@itemize @bullet
-+@item Support for complex ISA's (i386, m68k).
-+
-+Early versions had the framework of the support, but it's all bit-rotten.
-+
-+@item ABI description
-+
-+As discussed elsewhere, one thing that many tools need knowledge of besides
-+the ISA is the ABI. Clearly ABI's are orthogonal to ISA's and one cpu
-+may have multiple ABI's running on it. Thus the ABI description needs to
-+be independent of the architecture description. It would still be useful
-+for the ABI to refer to things in the architecture description.
-+
-+@item Model description
-+
-+The current design is enough to get reasonable cycle counts from
-+the simulator but it doesn't take into account all the uses one would
-+want to make of this data.
-+
-+@item File organization
-+
-+I believe a lot of what is in libopcodes should be moved to libcgen.
-+Libcgen will contain the bulk of the cpu description in processed form.
-+It will also contain a suite of utilities for accessing the data.
-+
-+ABI support could either live in libcgen or separately in libcgenabi.
-+libbfd would be a user of this library.
-+
-+Instruction semantics should also be recorded in libcgen, probably
-+in bytecode form. Operand usage tables, needed for example by the
-+m32r assembler, can be lazily computed at runtime.
-+
-+Applications can either make use of libcgen or given the application
-+independence of the description language they can write their won code
-+generators to tailor the output as needed.
-+
-+@end itemize
-+
-+@node CPU description language
-+@section CPU description language
-+
-+The goal of CGEN is to provide a uniform and extensible framework for
-+doing assemblers/disassemblers and simulators, as well as allowing
-+further tools to be developed as necessary.
-+
-+With that in mind I think the place to start is in defining a CPU
-+description language that is sufficiently powerful for all the current
-+and perceived future needs: an application independent description of
-+the CPU. From the CPU description, tables and code can be generated
-+that an application framework can then use (e.g. opcode table for
-+assembly/disassembly, decoder/executor for simulation).
-+
-+By "application independence" I mean the data is recorded in a way that
-+doesn't intentionally close any doors on uses of the data. One example of
-+this is using RTL to describe instruction semantics rather than, say, C.
-+The assembler can also make use of the instruction semantics. It doesn't
-+make use of the semantics, per se, but what it does use is the input and
-+output operand information that is machine generated from the semantics.
-+Groking operand usage from C is possible I guess, but a lot harder.
-+So by writing the semantics in RTL multiple applications can make use if it.
-+One can also generate from the RTL code in languages other than C.
-+
-+@menu
-+* Language requirements::
-+* Layout::
-+* Language problems::
-+@end menu
-+
-+@node Language requirements
-+@subsection Language requirements
-+
-+The CPU description file needs to provide at least the following:
-+
-+@itemize @bullet
-+@item elements of the CPU's architecture (registers, etc.)
-+@item elements of a CPU's implementation (e.g. pipeline)
-+@item how the bits of an instruction word map to the instruction's semantics
-+@item semantic specification in a way that is amenable to being
-+understood and manipulated
-+@item performance measurement parameters
-+@item support for multiple ISA variants
-+@item assembler syntax of the instruction set
-+@item how that syntax maps to the bits of the instruction word, and back
-+@item support for generating test files
-+@item ???
-+@end itemize
-+
-+In addition to this, elements of the particular ABI in use is also needed.
-+These things will obviously need to be defined separately from the cpu
-+for obvious reasons.
-+
-+@itemize @bullet
-+@item file format
-+@item relocations
-+@item function calling conventions
-+@item ???
-+@end itemize
-+
-+Some architectures require knowledge of the pipeline in order to do
-+accurate simulation (because, for example, some registers don't have
-+interlocks) so that will be required as well, as opposed to being solely
-+for performance measurement. Pipeline knowledge is also needed in order
-+to achieve accurate profiling information. However, I haven't spent
-+much time on this yet. The current design/implementation is a first
-+pass in order to get something working, and will be revisited.
-+
-+Support for generating test files is not complete. Currently the GAS
-+test suite generator gets by (barely) without them. The simulator test
-+suite generator just generates templates and leaves the programmer to
-+fill in the details. But I think this information should be present,
-+meaning that for situations where test vectors can't be derived from the
-+existing specs, new specs should be added as part of the description
-+language. This would make writing testcases an integral part of writing
-+the .cpu file. Clearly there is a risk in having machine generated
-+testcases - but there are ways to eliminate or control the risk.
-+
-+The syntax of a suitable description language needs to have these
-+properties:
-+
-+@itemize @bullet
-+@item simple
-+@item expressive
-+@item easily parsed
-+@item easy to learn
-+@item understandable by program generators
-+@item extensible
-+@end itemize
-+
-+It would also help to not start over completely from scratch. GCC's RTL
-+satisfies all these goals, and is used as the basis for the description
-+language used by CGEN.
-+
-+Extensibility is achieved by specifying everything as name/value pairs.
-+This allows new elements to be added and even CPU specific elements to
-+be added without complicating the language or requiring a new element in
-+a @code{define_insn} type entry to be added to each existing port.
-+Macros can be used to eliminate the verbosity of repetitively specifying
-+the ``name'' part, so one can have it both ways. Imagine GCC's
-+@file{.md} file elements specified as name/value pairs with macro's
-+called @code{define_expand}, @code{define_insn}, etc. that handle the
-+common cases and expand the entry to the full @code{(define_full_expand
-+(name addsi3) (template ...) (condition ...) ...)}.
-+
-+Scheme also uses @code{(foo :keyword1 value1 :keyword2 value2 ...)},
-+though that isn't implemented yet (or maybe @code{#:keyword} depending
-+upon what is enabled in Guile).
-+
-+@node Layout
-+@subsection Layout
-+
-+Here is a graphical layout of the hierarchy of elements of a @file{.cpu} file.
-+
-+@example
-+ architecture
-+ / \
-+ cpu-family1 cpu-family2 ...
-+ / \
-+ machine1 machine2 ...
-+ / \
-+ model1 model2 ...
-+@end example
-+
-+Each of these elements is explained in more detail in @ref{RTL}. The
-+@emph{architecture} is one of @samp{sparc}, @samp{m32r}, etc. Within
-+the @samp{sparc} architecture, the @emph{cpu-family} might be
-+@samp{sparc32} or @samp{sparc64}. Within the @samp{sparc32} CPU family,
-+the @emph{machine} might be @samp{sparc-v8}, @samp{sparclite}, etc.
-+Within the @samp{sparc-v8} machine classificiation, the @emph{model}
-+might be @samp{hypersparc} or @samp{supersparc}.
-+
-+Instructions form their own hierarchy as each instruction may be supported
-+by more than one machine. Also, some architectures can handle more than
-+one instruction set on one chip (e.g. ARM).
-+
-+@example
-+ isa
-+ |
-+ instruction
-+ / \
-+ operand1 operand2 ...
-+ | |
-+ hw1+ifield1 hw2+ifield2 ...
-+@end example
-+
-+Each of these elements is explained in more detail in @ref{RTL}.
-+
-+@node Language problems
-+@subsection Language problems
-+
-+There are at least two potential problem areas in the language's design.
-+
-+The first problem is variation in assembly language syntax. Examples of
-+this are Intel vs AT&T i386 syntax, and Motorola vs MIT M68k syntax.
-+I think there isn't a sufficient number of important cases to warrant
-+handling this efficiently. One could either ignore the issue for
-+situations where divergence is sufficient to dissuade one from handling
-+it in the existing design, or one could provide a front end or
-+use/extend the existing macro mechanism.
-+
-+One can certainly argue that description of assembler syntax should be
-+separated from the hardware description. Doing so would prevent
-+complications in supporting multiple or even difficult assembler
-+syntaxes from complicating the hardware description. On the other hand,
-+there is a lot of duplication, and in the end for the intended uses of
-+CGEN I think the benefits of combining assembler support with hardware
-+description outweigh the disadvantages. Note that the assembler
-+portions of the description aren't used by the simulator @footnote{The
-+simulator currently uses elements of the opcode table since the opcode
-+table is a nice central repository for such things. However, the
-+assembler/disassembler isn't part of the simulator, and the
-+portions of the opcode table can be generated and recorded elsewhere
-+should it prove reasonable to do so. The CPU description file won't
-+change, which is the important thing.}, so if one wanted to implement
-+the disassembler/assembler via other means one can.
-+
-+The other potential problem area is relocations. Clearly part of
-+processing assembly code is dealing with the relocations involved
-+(e.g. GOT table specification). Relocation support necessarily requires
-+BFD and GAS support, both of which need cleanup in this area. Rewriting
-+BFD to provide a better interface so reloc handling in GAS can be
-+cleaned up is believed to be something this project can and should take
-+advantage of, and that any attempt at adding relocation support should
-+be done by first cleaning up GAS/BFD. That can be left for another day
-+though. :-)
-+
-+One can certainly argue trying to combine an ABI description with a
-+hardware description is problematic as there can be more than one ABI.
-+However, there often isn't and in the cases where there isn't the
-+simplified porting and maintenance is worth it, in the author's opinion.
-+Furthermore, the current language doesn't embed ABI elements
-+with hardware description elements. Careful segregation of such things
-+might ameliorate any problems.
-+
-+@node Opcodes support
-+@section Opcodes support
-+
-+Opcodes support comes in the form of machine generated opcode tables as
-+well as supporting routines.
-+
-+@node Simulator support
-+@section Simulator support
-+
-+Simulator support comes in the form of machine generated the decoder/executer
-+as well as the structure that records CPU state information (ie. registers).
-+
-+@node Testing support
-+@section Testing support
-+
-+@menu
-+* Assembler/disassembler testing::
-+* Simulator testing::
-+@end menu
-+
-+Inherent in the design is the ability to machine generate test cases both
-+for the assembler/disassembler and for the simulator. Furthermore, it
-+is not unreasonable to add to the description file data specifically
-+intended to assist or guide the testing process. What kinds of
-+additions that will be needed is unknown at present.
-+
-+@node Assembler/disassembler testing
-+@subsection Assembler/disassembler testing
-+
-+The description of instructions and their fields contains to some extent
-+not only the syntax but the possible values for each field. For
-+example, in the specification of an immediate field, it is known what
-+the allowable range of values is. Thus it is possible to machine
-+generate test cases for such instructions. Obviously one wouldn't want
-+to test for each number that a number field can contain, however one can
-+generate a representative set of any size. Likewise with register
-+fields, mnemonic fields, etc. A good starting point would be the edge
-+cases, the values at either end of the range of allowable values.
-+
-+When I first raised the possibility of machine generated test cases the
-+first response I got was that this wouldn't be useful because the same
-+data was being used to generate both the program and the test cases. An
-+error might be propagated to both and thus nullify the test. For
-+example if an opcode field was supposed to have the value 1 and the
-+description file had the value 2, then this error wouldn't be caught.
-+However, this assumes test cases are generated during the testing run!
-+And it ignores the profound amount of typing that is saved by machine
-+generating test cases! (I discount the argument that this kind of
-+exhaustive testing is unnecessary).
-+
-+One solution to the above problem is to not generate the test cases
-+during the testing run (which was implicit in the proposal, but perhaps
-+should have been explicit). Another solution is to generate the
-+test cases during the test run but first verify them by some external
-+means before actually using them in any test. The latter solution is
-+only mentioned for completeness sake; its implementation is problematic
-+as any external means would necessarily be computer driven and the level
-+of confidence in the result isn't 100%.
-+
-+So how are machine generated test cases verified? By machine, by hand,
-+and by time. The test cases are checked into CVS and are not regenerated
-+without care. Every time the test cases are regenerated, the diffs are
-+examined to ensure the bug triggering the regeneration has been fixed
-+and that no new bugs have been introduced. In all likelihood once a
-+port is more or less done, regeneration of test cases would stop anyway,
-+and all further changes would be done manually.
-+
-+``By machine'' means that for example in the case of ports with a native
-+assembler one can run the test case through the native assembler and use
-+that as a good first pass.
-+
-+``By hand'' means one can go through each test case and verifying them
-+manually. This is what is done in the case of non-machine generated
-+test cases, the only difference is the perceived difference in quantity.
-+And in the case of machine generated test cases comments can be added to
-+each test to help with the manual verification (e.g. a comment can be
-+added that splits the instruction into its fields and shows their names
-+and values).
-+
-+``By time'' means that this process needn't be done instantaneously.
-+This is no different than the non-machine generated case again except in
-+the perceived difference in quantity of test cases.
-+
-+Note that no claim is made that manually generated test cases aren't
-+needed. Clearly there will be some cases that the description file
-+doesn't describe and thus can't machine generate.
-+
-+@node Simulator testing
-+@subsection Simulator testing
-+
-+Machine generation of simulator test cases is possible because the
-+semantics of each instruction is written in a way that is understandable
-+to the generator. At the very least, knowledge of what the instructions
-+are is present! Obviously there will be some instructions that can't
-+be adequately expressed in RTL and are thus not amenable to having a
-+test case being machine generated. There may even be some RTL'd
-+semantics that fall into this category. It is believed, however, that
-+there will still be a large percentage of instructions amenable to
-+having test cases machine generated for them. Such test cases can
-+certainly be hand generated, but it is believed that this is a large
-+amount of unnecessary typing that typically won't be done due to the
-+amount. Again, I discount the argument that this kind of exhaustive
-+testing isn't necessary.
-+
-+An example is the simple arithmetic instructions. These take zero, one,
-+or more arguments and produce a result. The description file contains
-+sufficient data to generate such an instruction, the hard part is in
-+providing the environment to set up the required inputs (e.g. loading
-+values into registers) and retrieve the output (e.g. retrieve a value
-+from a register).
-+
-+Certainly at the very least all the administrivia for each test case can
-+be machine generated (i.e. a template file can be generated for each
-+instruction, leaving the programmer to fill in the details).
-+
-+The strategy used for assembler/disassembler test cases is also used here.
-+Test cases are kept in CVS and are not regenerated without care.
-+
-+@node Implementation language
-+@section Implementation language
-+
-+The chosen implementation language is Scheme. The reasons for this are:
-+
-+@itemize @bullet
-+@item Parsing RTL in Scheme is real easy, though I did make some albeit
-+minor changes to make it easier. While it doesn't take more than a few
-+dozen lines of C to parse RTL, it doesn't take any lines of Scheme -
-+the parser is built into the interpreter.
-+
-+@item An interactive environment is a better environment to work in,
-+especially in the early stages of an ambitious project like this.
-+
-+@item Guile is developing as an embeddable interpreter.
-+I wanted room for growth in many dimensions, and having the implementation
-+language be an embeddable interpreter supports this.
-+
-+@item I wanted to learn Scheme (Yes, not a technical reason, blah blah blah).
-+
-+@item Numbers in Scheme can have arbitrary precision so representing 64
-+bit (or higher) numbers on a 32 bit host is well defined.
-+
-+@item It seemed useful to have an implementation language similar to the
-+CPU description language. The Scheme implementation seems simpler
-+than a C implementation would be.
-+@end itemize
-+
-+One issue that arises with the use of Scheme as the implementation
-+language is whether to generate files in the source tree, with the
-+issues that involves, or generate the files in the build tree (and thus
-+require Guile to build Binutils and the issues that involves). Trying
-+to develop something like this is easier in an interactive environment,
-+so Scheme as the first implementation language is, to me, a better
-+choice than C or C++. In such a big project it also helps to have a
-+more expressive language so relatively complex code and be written with
-+fewer lines of code.
-+
-+One consequence is maintenance is more difficult in that the
-+generated files (e.g. @file{opcodes/m32r-*.[ch]}) are checked into CVS
-+at Red Hat, and a change to a CPU description requires rebuilding the
-+generated files and checking them in as well. And a change that affects
-+each port requires each port to be regenerated and checked in.
-+This is more palatable for maintainer tools such as @code{bison},
-+@code{flex}, @code{autoconf} and @code{automake}, as their input files
-+don't change as often.
-+
-+
-+Whether to continue with Scheme, convert the code to a compiled
-+language, or have both is an important, open issue.
-diff -Nur binutils-2.24.orig/cgen/doc/Makefile.am binutils-2.24/cgen/doc/Makefile.am
---- binutils-2.24.orig/cgen/doc/Makefile.am 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/doc/Makefile.am 2016-06-30 21:26:12.653893112 +0200
-@@ -0,0 +1,17 @@
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-diff -Nur binutils-2.24.orig/cgen/doc/Makefile.in binutils-2.24/cgen/doc/Makefile.in
---- binutils-2.24.orig/cgen/doc/Makefile.in 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/doc/Makefile.in 2016-06-30 21:26:12.653893112 +0200
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-diff -Nur binutils-2.24.orig/cgen/doc/notes.texi binutils-2.24/cgen/doc/notes.texi
---- binutils-2.24.orig/cgen/doc/notes.texi 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/doc/notes.texi 2016-06-30 21:26:12.653893112 +0200
-@@ -0,0 +1,237 @@
-+@c Copyright (C) 2000 Red Hat, Inc.
-+@c This file is part of the CGEN manual.
-+@c For copying conditions, see the file cgen.texi.
-+
-+@node Miscellaneous notes
-+@chapter Miscellaneous notes
-+@cindex Miscellaneous notes
-+
-+This chapter is a repository of miscellaneous notes that belong elsewhere
-+or nowhere. They're here because I want them written down, for now anyway,
-+and I'm not sure where else to put them. There may be duplication here
-+with things elsewhere in the docs. I'm not bothering to ensure there isn't.
-+It's better to have things written down twice than not at all. If there
-+is a conflict between notes here and elsewhere, check the chronology.
-+I may have changed my mind. If not, the situation may be complicated and I
-+don't have a strong opinion on what's right. No claim is made that these
-+notes represent my complete opinion. (Hmmm... lessee what other caveats
-+I can throw in here ... :-)
-+
-+@c ??? Shouldn't have to append " notes" to every menu entry.
-+@c It's done because some entries collide with menu entries in other
-+@c chapters and texinfo doesn't like that (complains or crashes).
-+
-+@menu
-+* Description language notes::
-+* CGEN architecture notes::
-+* COS notes::
-+* RTL notes::
-+* Guile implementation notes::
-+* Code generation notes::
-+* Machine generated files notes::
-+* Implementation language notes::
-+@end menu
-+
-+@node Description language notes
-+@section Description language notes
-+
-+@itemize @minus
-+
-+@item timing support
-+
-+The current implementation of timing (aka pipeline, function units, etc.)
-+support is a quick hack in order to achieve useful numbers out of the
-+simulator. It is intended to be replaced with something a lot more
-+sophisticated. Remember to keep in mind cgen's goal of application
-+independence when designing the new version. For example, it must handle
-+things like code scheduling in a compiler (where speed of analysis is not
-+critical) to scheduling in a dynamic compiler (where speed of analysis is
-+critical). It must also handle semi-accurate to fully-accurate cycle
-+counting in simulators (where the former might trade off accuracy for speed
-+which one wouldn't do in the latter, assuming there is a trade-off to be
-+made). It must also handle the representation and handling of pipelines
-+with program visible hazards.
-+
-+@item organization of cpu description
-+
-+One thing that may not be apparent is that the description language
-+doesn't preclude one item (say an insn) from having its definition
-+spread over several files. One example would be to leave the timing
-+elements unspecified in the "main" entry of an insn, and then have
-+a machine-specific file providing timing characteristics, etc.
-+
-+One can even leave the semantics to be defined elsewhere.
-+The `=' insn format prefix is not currently used very much (no need).
-+It might also need better documentation.
-+
-+A possible break-up of an item's description into several files should be
-+generally supported (where reasonable).
-+
-+@end itemize
-+
-+@node CGEN architecture notes
-+@section CGEN architecture notes
-+
-+@itemize @minus
-+
-+@item compiled form of description in libcgen
-+
-+The current compiled form of the cpu description has been focused on
-+two applications: opcodes and simulator. No doubt there are things present
-+that will present problems to future applications.
-+One thing on the todo list has been to record semantics with the compiled
-+form, probably as bytecode. Maybe it would make sense to record the
-+entire cpu description as a kind of bytecode. This would allow apps to
-+instantiate it for the task at hand as they please.
-+
-+@item function-style attributes
-+
-+Attributes currently only support static (compile-time computed) notions.
-+They should also support run-time computed values. The way to do this is
-+to record such attributes as bytecode and lazily (or not lazily) evaluate
-+them at runtime, perhaps caching the results. It might make sense to
-+record all attributes this way (though I currently don't think so).
-+
-+@item importance of description language
-+
-+When hacking on cgen, the description language takes priority over
-+implementation. That cannot be stressed enough. When faced with
-+choices of what to do, put the elegance, maintainability, and application
-+independence of the description language first. Implementation will almost
-+always take shortcuts due to application specific requirements. Theoretically
-+the description language won't have to; at least that's where the effort
-+in application independence should be put.
-+
-+@end itemize
-+
-+@node COS notes
-+@section COS notes
-+
-+@itemize @minus
-+
-+@item elm-xget, elm-xset
-+
-+These procedures are quick hacks and should be avoided.
-+Existing uses should be replaced.
-+Where they're used it's either because of laziness or because
-+I wasn't sure whether I wanted to allow global access to the element,
-+so using an easily grep-able hack let's me find them and revisit them.
-+
-+@end itemize
-+
-+@node RTL notes
-+@section RTL notes
-+
-+@itemize @minus
-+
-+@item Where's strict_lowpart? Where's foo?
-+
-+Elements of gcc's rtl like strict_lowpart, pre_inc, etc. aren't in
-+cgen's rtl only because thus far there hasn't been a compelling need
-+for them. When there is a compelling need they'll be added.
-+
-+@item boolean values
-+
-+Sometimes #f/#t is used for boolean values.
-+However the "boolean" mode @code{BI} has values 0 and 1.
-+Which one is in use is context dependent.
-+Not sure there is a problem but it should be revisited.
-+
-+@item #f to denote "unspecified" values
-+
-+Sometimes () is used to specify "unspecified" values.
-+Other times #f is used. Should standardize in #f.
-+
-+@item ifield assertions
-+
-+Perhaps these should be renamed to "constraints".
-+"ifield-assertion" sounds clumsy.
-+
-+@end itemize
-+
-+@node Guile implementation notes
-+@section Guile implementation notes
-+
-+@itemize @minus
-+
-+@item
-+Remaining todo is to complete switchover from "errtxt" (a string)
-+in .cpu file reader support to "context" (a <context> object).
-+
-+@item
-+Remaining todo is to complete switchover of naming functions from
-+"prefix:function" to "prefix-function". One reasonable naming style
-+is "prefix-verb-noun". I like it.
-+
-+@item
-+Slib uses "prefix:foo" for "internal" routines. Maybe that would be
-+a better choice than the current "-prefix-foo" style.
-+
-+@end itemize
-+
-+@node Code generation notes
-+@section Code generation notes
-+
-+@itemize @minus
-+
-+@item foo
-+
-+@end itemize
-+
-+@node Machine generated files notes
-+@section Machine generated files notes
-+
-+@itemize @minus
-+
-+@item
-+In the end I think the best thing is to build the machine generated files
-+when the tools themselves are built (same as gcc's gen* -> insn* files).
-+
-+@end itemize
-+
-+@node Implementation language notes
-+@section Implementation language notes
-+
-+In the end I think the implementation language (or the Guile
-+implementation) will have to change.
-+If one compares the speed of gcc's gen* file generators vs cgen's,
-+and one envisions the day when machine generated files are
-+built at build time, then I think the user community will require
-+similar speed in file generation. Guile isn't fast enough.
-+And while Guile+Hobbit may be, for the one-time builder the time
-+taken to compile Hobbit, run it, and compile the result, will appear
-+to swamp any gains. There is also the additional burden of
-+building Guile first (though with my prefered Guile implementation
-+I'm _hoping_ that wouldn't be a problem).
-+
-+The pragmatic choice is C. Blech.
-+
-+A better choice would be C++ but then that would obviously place a
-+requirement on having a C++ compiler available in order to build binutils,
-+for example (assuming machine generated files are built at build time).
-+
-+Java would also be a better implementation language than C
-+[an interesting experiment would be Kawa]. But it's worse as a pragmatic
-+choice than C++.
-+
-+My prefered choice is a small-and-fast subset of Guile that gets
-+distributed with binutils, gdb, etc. IMO Guile is too bloated
-+and unmaintainable for the casual maintainer (hacking on its innards
-+requires too steep a learning curve, and is one that is easily slipped back
-+down should one step away from it for too long). If those can be fixed and
-+the speed of cgen's file generation can be made acceptable, then that
-+is the path I would choose.
-+
-+In making the choice people need to look forward rather than look backward.
-+We're finally switching the GNU tools to ANSI C. If the host doesn't provide
-+an ANSI C compiler the user is expected to get one (GCC).
-+Well, G++ is available on most if not all hosts of concern, so
-+in this day and age requiring C++ in order to build binutils isn't
-+as much of a burden as it use to be. Cgen is a forward looking design.
-+At its heart is a goal to close no doors on future uses. That's a
-+pretty lofty goal. Forcing people to achieve that goal with C because
-+of pragmatic concerns is unjustifiable, IMO.
-+
-+Note that changing the "implementation language" does _not_ mean
-+Guile cannot or will not be used for various things! I think Guile
-+should continue to be used for prototyping as well as certain applications.
-diff -Nur binutils-2.24.orig/cgen/doc/opcodes.texi binutils-2.24/cgen/doc/opcodes.texi
---- binutils-2.24.orig/cgen/doc/opcodes.texi 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/doc/opcodes.texi 2016-06-30 21:26:12.653893112 +0200
-@@ -0,0 +1,186 @@
-+@c Copyright (C) 2000 Red Hat, Inc.
-+@c This file is part of the CGEN manual.
-+@c For copying conditions, see the file cgen.texi.
-+
-+@node Opcodes
-+@chapter Opcodes support
-+@cindex Opcodes support
-+
-+Opcodes support comes in the form of machine generated opcode tables as
-+well as supporting routines.
-+
-+@menu
-+* Generated files:: List of generated files
-+* The .opc file:: Target specific C code
-+* Special assembler parsing needs::
-+@end menu
-+
-+@node Generated files
-+@section Generated files
-+
-+The basic interface is defined by
-+@file{include/opcode/cgen.h} which is included by the machine generated
-+@file{<arch>-desc.h}. @file{opcode/cgen.h} can stand on its own for the
-+target independent stuff, but to get target specific parts of the
-+interface use @file{<arch>-desc.h}.
-+
-+The generated files are:
-+
-+@table @file
-+@item <arch>-desc.h
-+Defines macros, enums, and types used to describe the chip.
-+@item <arch>-desc.c
-+Tables of various things describing the chip.
-+This does not include assembler syntax nor semantic information.
-+@item <arch>-ibld.c
-+Routines for constructing and deconstructing instructions.
-+@item <arch>-opc.h
-+Declarations necessary for assembly/disassembly that aren't used
-+elsewhere and thus left out of @file{<arch>-desc.h}.
-+@item <arch>-opc.c
-+Assembler syntax tables.
-+@item <arch>-asm.c
-+Assembler support routines.
-+@item <arch>-dis.c
-+Disassembler support routines.
-+@item <arch>-opinst.c
-+Operand instance tables.
-+These describe which hardware elements are read and which are written
-+for each instruction. This file isn't generated for all architectures,
-+only ones that can make use of the data. For example the M32R uses them
-+to emit warnings if the output of one parallel instruction is the input
-+of another, and to control creating parallel instructions during optimizing
-+assembly.
-+@end table
-+
-+@node The .opc file
-+@section The .opc file
-+
-+Files with suffix @file{.opc} (e.g. @file{m32r.opc}) contain target
-+specific C code that accompanies the cpu description file.
-+The @file{.opc} file is split into 4 sections:
-+
-+@itemize @minus
-+@item opc.h
-+
-+This section contains additions to the generated @file{$target-opc.h} file.
-+
-+Typically defined here are these macros:
-+
-+@itemize @bullet
-+@item #define CGEN_DIS_HASH_SIZE N
-+
-+Specifies the size of the hash table to use during disassembly.
-+A hash table is built of the selected mach's instructions in order to
-+speed up disassembly.
-+@item #define CGEN_DIS_HASH(buffer, value)
-+
-+Given BUFFER, a pointer to the instruction being disassembled and
-+VALUE, the value of the instruction as a host integer, return an
-+index into the hash chain for the instruction. The result must be
-+in the range 0 to CGEN_DIS_HASH_SIZE-1.
-+
-+VALUE is only usable if all instructions fit in a portable integer (32 bits).
-+
-+N.B. The result must depend on opcode portions of the instruction only.
-+Normally one wants to use between 6 and 8 bits of opcode info for the hash
-+table. However, some instruction sets don't use the same set of bits
-+for all insns. Certainly they'll have at least one opcode bit in common
-+with all insns, but beyond that it can vary. Here's a possible definition
-+for sparc.
-+
-+@example
-+#undef CGEN_DIS_HASH_SIZE
-+#define CGEN_DIS_HASH_SIZE 256
-+#undef CGEN_DIS_HASH
-+extern const unsigned int sparc_cgen_opcode_bits[];
-+#define CGEN_DIS_HASH(buffer, insn) \
-+((((insn) >> 24) & 0xc0) \
-+ | (((insn) & sparc_cgen_opcode_bits[((insn) >> 30) & 3]) >> 19))
-+@end example
-+
-+@code{sparc_cgen_opcode_bits} would be defined in the @samp{asm.c} section as
-+
-+@example
-+/* It is important that we only look at insn code bits
-+ as that is how the opcode table is hashed.
-+ OPCODE_BITS is a table of valid bits for each of the
-+ main types (0,1,2,3). */
-+const unsigned int sparc_cgen_opcode_bits[4] = @{
-+ 0x01c00000, 0x0, 0x01f80000, 0x01f80000
-+@};
-+@end example
-+@end itemize
-+
-+@item opc.c
-+
-+@item asm.c
-+
-+This section contains additions to the generated @file{$target-asm.c} file.
-+Typically defined here are functions used by operands with a @code{parse}
-+define-operand handler spec.
-+
-+@item dis.c
-+
-+This section contains additions to the generated @file{$target-dis.c} file.
-+
-+Typically defined here these macros:
-+
-+@itemize @bullet
-+@item #define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length)
-+@item #define CGEN_PRINT_ADDRESS(cd, info, value, attrs, pc, length)
-+@item #define CGEN_PRINT_INSN function_name
-+@c FIXME: should be CGEN_PRINT_INSN(cd, pc, info)
-+@item #define CGEN_BFD_ARCH bfd_arch_<name>
-+@item #define CGEN_COMPUTE_ISA(info)
-+@end itemize
-+
-+@end itemize
-+
-+@node Special assembler parsing needs
-+@section Special assembler parsing needs
-+
-+Often parsing of assembly instructions requires more than what
-+a program-generated assembler can handle. For example one version
-+of an instruction may only accept certain registers, rather than
-+the entire set.
-+
-+Here's an example taken from the @samp{m32r} architecture.
-+
-+32 bit addresses are built up with a two instruction sequence: one to
-+load the high 16 bits of a register, and another to @code{or}-in the
-+lower 16 bits.
-+
-+@example
-+seth r0,high(some_symbol)
-+or3 r0,r0,low(some_symbol)
-+@end example
-+
-+When assembling, special code must be called to recognize the
-+@code{high} and @code{low} pseudo-ops and generate the appropriate
-+relocations. This is indicated by specifying a "parse handler" for
-+the operand in question. Here is the @code{define-operand}
-+for the lower 16 bit operand.
-+
-+@example
-+(define-operand
-+ (name ulo16)
-+ (comment "16 bit unsigned immediate, for low()")
-+ (attrs)
-+ (type h-ulo16)
-+ (index f-uimm16)
-+ (handlers (parse "ulo16"))
-+)
-+@end example
-+
-+The generated parser will call a function named @code{parse_ulo16}
-+for the immediate operand of the @code{or3} instruction.
-+The name of the function is constructed by prepended "parse_" to the
-+argument of the @code{parse} spec.
-+
-+@example
-+errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, &fields->f_uimm16);
-+@end example
-+
-+But where does one put the @code{parse_ulo16} function?
-+Answer: in the @samp{asm.c} section of @file{m32r.opc}.
-diff -Nur binutils-2.24.orig/cgen/doc/pmacros.texi binutils-2.24/cgen/doc/pmacros.texi
---- binutils-2.24.orig/cgen/doc/pmacros.texi 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/doc/pmacros.texi 2016-06-30 21:26:12.653893112 +0200
-@@ -0,0 +1,463 @@
-+@c Copyright (C) 2000 Red Hat, Inc.
-+@c This file is part of the CGEN manual.
-+@c For copying conditions, see the file cgen.texi.
-+
-+@node Preprocessor macros
-+@chapter Preprocessor macros
-+@cindex Preprocessor macros
-+@cindex pmacros
-+
-+Preprocessor macros provide a way of simplifying the writing of
-+@file{.cpu} files and serve the same purpose that macros do in C.
-+
-+@menu
-+* Defining a preprocessor macro:: @code{define-pmacro}
-+* Using preprocessor macros::
-+* Macro expansion:: The @code{pmacro-expand} procedure
-+* Default argument values:: Specifying default values of arguments
-+* Multiple output expressions:: Using @code{begin}
-+* Symbol concatenation:: The @code{.sym} builtin
-+* String concatenation:: The @code{.str} builtin
-+* Convert a number to a hex:: The @code{.hex} builtin
-+* Convert a string to uppercase:: The @code{.upcase} builtin
-+* Convert a string to lowercase:: The @code{.downcase} builtin
-+* Getting part of a string:: The @code{.substring} builtin
-+* List splicing:: The @code{.splice} builtin
-+* Number generation:: The @code{.iota} builtin
-+* Mapping a macro over a list:: The @code{.map} builtin
-+* Applying a macro to a list:: The @code{.apply} builtin
-+* Defining a macro inline:: The @code{.pmacro} builtin
-+* Passing macros as arguments:: Passing a macro to another macro
-+@end menu
-+
-+@node Defining a preprocessor macro
-+@section Defining a preprocessor macro
-+@cindex define-pmacro
-+
-+Preprocessor macros are defined with:
-+
-+@smallexample
-+(define-pmacro (name parm1 parm2 ... parmN)
-+ expansion
-+)
-+@end smallexample
-+
-+The result is @samp{expansion} with parameters replaced with the actual
-+arguments of the macro invocation. Free variables are left unchanged.
-+[A "free variable", as defined here, is one that doesn't appear in the
-+parameter list.]
-+
-+@c ??? This used to be true, but currently isn't.
-+@c If the result is another macro invocation, it is expanded in turn.
-+
-+@samp{expansion} must be exactly one expression.
-+
-+@node Using preprocessor macros
-+@section Using preprocessor macros
-+
-+Preprocessor macros are invoked in either of two ways: positional arguments
-+and arguments by name.
-+@c Rather lame wording.
-+
-+@smallexample
-+(define-pmacro (foo arg1 arg2) (bar arg1 arg2))
-+
-+; Invoke by positional arguments.
-+
-+(foo abc def) ==> (bar abc def)
-+
-+; Invoke by naming arguments.
-+
-+(foo #:arg1 ghi #:arg2 jkl) ==> (bar ghi jkl)
-+@end smallexample
-+
-+@c If you think more should be said here, I agree.
-+@c Please think of something.
-+
-+@node Macro expansion
-+@section Macro expansion
-+
-+At the implementation level, pmacros are expand with the
-+@code{pmacro-expand} Scheme procedure.
-+
-+The following is executed from a Guile shell, as opposed to
-+appearing in a cpu description file, hence the extra quoting.
-+
-+@smallexample
-+guile> (define-pmacro '(foo a b) '(+ a b))
-+guile> (pmacro-expand '(foo 3 4))
-+(+ 3 4)
-+@end smallexample
-+
-+@node Default argument values
-+@section Default argument values
-+
-+Invoking pmacros by specifying argument names allows some, or all,
-+arguments to be elided and thus allows for arguments to have default values.
-+
-+Specify default values with the following syntax.
-+
-+@smallexample
-+(define-pmacro (macro-name (arg1 . default-value)
-+ (arg2 . default value) ...)
-+ ...
-+)
-+@end smallexample
-+
-+Example:
-+
-+@smallexample
-+(define-pmacro (foo (arg1 . 1) (arg2 . 2))
-+ (bar arg1 arg2)
-+)
-+
-+(foo #:arg2 33) ==> (bar 1 33)
-+@end smallexample
-+
-+@node Multiple output expressions
-+@section Multiple output expressions
-+@cindex begin
-+
-+The result of a preprocessor macro is exactly one expression.
-+It is often useful, however, to return multiple expressions, say for
-+example when you want one macro to define several instructions.
-+
-+The way to do this is to enclose all the expressions with @code{begin}.
-+@code{begin} is only valid at the top [definition] level.
-+
-+??? It's moderately clumsy to restrict @code{begin} like this.
-+Using @code{sequence} for this purpose might be cleaner except that
-+sequence locals don't make sense in this context (though perhaps that's
-+a lesser evil). In the end, @code{begin} can be shorthand for a void-mode
-+sequence with no locals so I haven't been in a rush to resolve this.
-+
-+@node Symbol concatenation
-+@section Symbol concatenation
-+@cindex .sym
-+
-+Symbol and string concatenation are supported. Symbol concatenation is
-+done with:
-+
-+@code{(.sym arg1 arg2 ...)}
-+
-+Acceptable arguments are symbols, strings, and numbers.
-+The result is a symbol with the arguments concatenated together.
-+Numbers are converted to a string, base 10, and then to a symbol.
-+The result must be a valid Scheme symbol with the additional restriction
-+that the first character must be a letter. The resulting symbol
-+is recursively macro-expanded.
-+
-+@node String concatenation
-+@section String concatenation
-+@cindex .str
-+
-+String concatenation is done with
-+
-+@code{(.str arg1 arg2 ...)}
-+
-+Acceptable arguments are symbols, strings, and numbers. The result is a
-+string with the arguments concatenated together.
-+Numbers are converted base 10.
-+
-+Example:
-+
-+@smallexample
-+(define-pmacro (bin-op mnemonic op2-op sem-op)
-+ (dni mnemonic
-+ (.str mnemonic " reg/reg")
-+ ()
-+ (.str mnemonic " $dr,$sr")
-+ (+ OP1_0 op2-op dr sr)
-+ (set dr (sem-op dr sr))
-+ ())
-+)
-+(bin-op and OP2_12 and)
-+(bin-op or OP2_14 or)
-+(bin-op xor OP2_13 xor)
-+@end smallexample
-+
-+@node Convert a number to a hex
-+@section Convert a number to a hex
-+@cindex .hex
-+
-+Convert a number to a lowercase hex string with @code{.hex}. If
-+@code{width} is present, the result is that many characters beginning
-+with the least significant digit. Zeros are prepended as necessary.
-+
-+Syntax: @code{(.hex number [width])}
-+
-+Examples:
-+
-+@smallexample
-+(.hex 42) --> "2a"
-+(.hex 42 1) --> "a"
-+(.hex 42 4) --> "002a"
-+@end smallexample
-+
-+@node Convert a string to uppercase
-+@section Convert a string to uppercase
-+@cindex .upcase
-+
-+Convert a string to uppercase with @code{.upcase}.
-+
-+Syntax: @code{(.upcase string)}
-+
-+Example:
-+
-+@smallexample
-+(.upcase "foo!") --> "FOO!"
-+@end smallexample
-+
-+@node Convert a string to lowercase
-+@section Convert a string to lowercase
-+
-+Convert a string to lowercase with @code{.downcase}.
-+
-+Syntax: @code{(.downcase string)}
-+
-+Example:
-+
-+@smallexample
-+(.downcase "BAR?") --> "bar?"
-+@end smallexample
-+
-+@node Getting part of a string
-+@section Getting part of a string
-+@cindex .substring
-+
-+Extract a part of a string with @code{.substring}.
-+
-+Syntax: @code{(.substring string start end)}
-+
-+where @samp{start} is the starting character, and @samp{end} is one past
-+the ending character. Character numbering begins at position 0.
-+If @samp{start} and @samp{end} are the same, and both valid, the empty
-+string is returned.
-+
-+Example:
-+
-+@smallexample
-+(.substring "howzitgoineh?" 2 6) --> "wzit"
-+@end smallexample
-+
-+@node List splicing
-+@section List splicing
-+@cindex .splice
-+
-+It is often useful to splice a list into a "parent" list.
-+This is best explained with an example.
-+
-+@smallexample
-+(define-pmacro (splice-test a b c)
-+ (.splice a (.unsplice b) c))
-+(pmacro-expand (splice-test (1 (2) 3)))
-+
-+--> (1 2 3)
-+@end smallexample
-+
-+Note that a level of parentheses around @code{2} has been removed.
-+
-+This is useful, for example, when one wants to pass a list of fields to
-+a macro that defines an instruction. For example:
-+
-+@smallexample
-+(define-pmacro (cond-move-1 name comment mnemonic cc-prefix cc-name cc-opcode
-+ src-name src-opcode cond test)
-+ (dni name
-+ (.str "move %" cc-name " " comment ", v9 page 191")
-+ ((MACH64))
-+ (.str mnemonic " " cc-prefix cc-name ",$" src-name ",$rd")
-+ (.splice + OP_2 rd OP3_MOVCC cond
-+ (.unsplice cc-opcode) (.unsplice src-opcode))
-+ (if (test cc-name)
-+ (set rd src-name))
-+ ())
-+)
-+@end smallexample
-+
-+This macro, taken from @file{sparc64.cpu}, defines a conditional move
-+instruction. Arguments @code{cc-opcode} and @code{src-opcode} are lists
-+of fields. The macro is invoked with (simplified from @file{sparc64.cpu}):
-+
-+@smallexample
-+(cond-move-1 mova-icc "blah ..." mova
-+ "%" icc ((f-fmt4-cc2 1) (f-fmt4-cc1-0 0))
-+ rs2 ((f-i 0) (f-fmt4-res10-6 0) rs2)
-+ CC_A test-always)
-+(cond-move-1 mova-imm-icc "blah ..." mova
-+ "%" icc ((f-fmt4-cc2 1) (f-fmt4-cc1-0 0))
-+ simm11 ((f-i 1) simm11)
-+ CC_A test-always)
-+@end smallexample
-+
-+Macro @code{cond-move-1} is being used here to define both the register
-+and the immediate value case. Each case has a slightly different list
-+of opcode fields. Without the use of @code{.splice}/@code{.unsplice},
-+the resulting formats would be:
-+
-+@smallexample
-+(+ OP_2 rd OP3_MOVCC CC_A ((f-fmt4-cc2-1) (f-fmt4-cc1-0 0))
-+ ((f-i 0) (f-fmt4-res10-6 0) rs2))
-+
-+and
-+
-+(+ OP_2 rd OP3_MOVCC CC_A ((f-fmt4-cc2-1) (f-fmt4-cc1-0 0))
-+ ((f-i 1) simm11))
-+@end smallexample
-+
-+respectively. This is not what is wanted. What is wanted is
-+
-+@smallexample
-+(+ OP_2 rd OP3_MOVCC CC_A (f-fmt4-cc2-1) (f-fmt4-cc1-0 0)
-+ (f-i 0) (f-fmt4-res10-6 0) rs2)
-+
-+and
-+
-+(+ OP_2 rd OP3_MOVCC CC_A (f-fmt4-cc2-1) (f-fmt4-cc1-0 0)
-+ (f-i 1) simm11)
-+@end smallexample
-+
-+respectively, which is what @code{.splice} achieves.
-+
-+@code{.unsplice} is a special reserved symbol that is only recognized inside
-+@code{.splice}.
-+
-+@node Number generation
-+@section Number generation
-+@cindex .iota
-+@cindex Number generation
-+
-+Machine descriptions often require a list of sequential numbers.
-+Generate a list of numbers with the @code{.iota} builtin macro.
-+
-+The syntax is @samp{(.iota count [start [incr]])}.
-+
-+Examples:
-+
-+@smallexample
-+(.iota 5) --> 0 1 2 3 4
-+(.iota 5 4) --> 4 5 6 7 8
-+(.iota 5 5 -1) --> 5 4 3 2 1
-+@end smallexample
-+
-+@node Mapping a macro over a list
-+@section Mapping a macro over a list
-+@cindex .map
-+
-+Apply a macro to each element of a list, or set of lists, with @code{.map}.
-+
-+The syntax is @samp{(.map macro-name list1 [list2 ...])}.
-+
-+The result is a list with @samp{macro-name} applied to each element of
-+@samp{listN}. @samp{macro-name} should take as many arguments as there
-+are lists. This is often useful in constructing enum and register name lists.
-+
-+Example:
-+
-+@smallexample
-+(define-pmacro (foo name number) ((.sym X name) number))
-+(.map foo (A B C D E) (.iota 5))
-+
-+-->
-+
-+((XA 0) (XB 1) (XC 2) (XD 3) (XE 4))
-+@end smallexample
-+
-+@node Applying a macro to a list
-+@section Applying a macro to a list
-+@cindex .apply
-+
-+Invoke a macro with each argument coming from an element of a list,
-+with @code{.apply}.
-+
-+The syntax is @samp{(.apply macro-name list)}.
-+
-+The result is the result of invoking macro @samp{macro-name}.
-+@samp{macro-name} should take as many arguments as there elements in
-+@samp{list}. If @samp{macro-name} takes a variable number of trailing
-+arguments, there must be at least as many list elements as there are
-+fixed arguments.
-+@c clumsily worded or what
-+
-+Example:
-+@c need a more useful example
-+
-+@smallexample
-+(.apply .str (.iota 5))
-+
-+-->
-+
-+"01234"
-+@end smallexample
-+
-+Note that @code{(.str (.iota 5))} is an error. Here the list
-+@samp{(0 1 2 3 4)} is passed as the first argument of @code{.str},
-+which is wrong.
-+
-+@node Defining a macro inline
-+@section Defining a macro inline
-+@cindex .pmacro
-+
-+Define a macro inline with @code{.pmacro}.
-+This is only supported when passing macros as arguments to other macros.
-+
-+@smallexample
-+(define-pmacro (load-op suffix op2-op mode ext-op)
-+ (begin
-+ (dni (.sym ld suffix) (.str "ld" suffix)
-+ ()
-+ (.str "ld" suffix " $dr,@@$sr")
-+ (+ OP1_2 op2-op dr sr)
-+ (set dr (ext-op WI (mem: mode sr)))
-+ ())
-+ )
-+)
-+
-+(load-op "" OP2_12 WI (.pmacro (mode expr) expr))
-+(load-op b OP2_8 QI (.pmacro (mode expr) (ext: mode expr)))
-+(load-op h OP2_10 HI (.pmacro (mode expr) (ext: mode expr)))
-+(load-op ub OP2_9 QI (.pmacro (mode expr) (zext: mode expr)))
-+(load-op uh OP2_11 HI (.pmacro (mode expr) (zext: mode expr)))
-+@end smallexample
-+
-+Currently, .pmacro's don't bind the way Scheme lambda expressions do.
-+For example, arg2 in the second pmacro is not bound to the arg2 argument
-+of the first pmacro.
-+
-+@smallexample
-+(define-pmacro (foo arg1 arg2) ((.pmacro (bar) (+ arg2 bar)) arg1))
-+(foo 3 4) ==> (+ arg2 3)
-+@end smallexample
-+
-+One can make an argument either way. I'm not sure what the right thing
-+to do here is (leave things as is, or have lexical binding like Scheme).
-+
-+@node Passing macros as arguments
-+@section Passing macros as arguments
-+
-+Macros may be passed to other macros.
-+
-+Example:
-+
-+@smallexample
-+(define-pmacro (no-ext-expr mode expr) expr)
-+(define-pmacro (ext-expr mode expr) (ext: mode expr))
-+(define-pmacro (zext-expr mode expr) (zext: mode expr))
-+
-+(define-pmacro (load-op suffix op2-op mode ext-op)
-+ (begin
-+ (dni (.sym ld suffix) (.str "ld" suffix)
-+ ()
-+ (.str "ld" suffix " $dr,@@$sr")
-+ (+ OP1_2 op2-op dr sr)
-+ (set dr (ext-op WI (mem: mode sr)))
-+ ())
-+ )
-+)
-+
-+(load-op "" OP2_12 WI no-ext-expr)
-+(load-op b OP2_8 QI ext-expr)
-+(load-op h OP2_10 HI ext-expr)
-+(load-op ub OP2_9 QI zext-expr)
-+(load-op uh OP2_11 HI zext-expr)
-+@end smallexample
-diff -Nur binutils-2.24.orig/cgen/doc/porting.texi binutils-2.24/cgen/doc/porting.texi
---- binutils-2.24.orig/cgen/doc/porting.texi 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/doc/porting.texi 2016-06-30 21:26:12.653893112 +0200
-@@ -0,0 +1,1077 @@
-+@c Copyright (C) 2000 Red Hat, Inc.
-+@c This file is part of the CGEN manual.
-+@c For copying conditions, see the file cgen.texi.
-+
-+@node Porting
-+@chapter Porting
-+@cindex Porting
-+
-+This chapter describes how to do a CGEN port.
-+It focuses on doing binutils and simulator ports, but the general
-+procedure should be generally applicable.
-+
-+@menu
-+* Introduction to porting::
-+* Supported Guile versions::
-+* Running configure::
-+* Writing a CPU description file::
-+* Doing an opcodes port::
-+* Doing a GAS port::
-+* Building a GAS test suite::
-+* Doing a simulator port::
-+* Building a simulator test suite::
-+@end menu
-+
-+@node Introduction to porting
-+@section Introduction to porting
-+
-+Doing a GNU tools port for a new processor basically consists of porting the
-+following components more or less in order. The order can be changed,
-+of course, but the following order is reasonable. Certainly things like
-+BFD and opcodes need to be finished earlier than others. Bugs in
-+earlier pieces are often not found until testing later pieces so each
-+piece isn't necessarily finished until they all are.
-+
-+@itemize @bullet
-+@item DejaGNU
-+@item BFD
-+@item CGEN
-+@item Opcodes
-+@item GAS
-+@item Binutils
-+@item Linker (@code{ld})
-+@item newlib
-+@item libgloss
-+@item simulator
-+@item GCC
-+@item GDB
-+@end itemize
-+
-+The use of CGEN affects the opcodes, GAS, and simulator portions only.
-+As always, the M32R port is a good reference base.
-+
-+One goal of CGEN is to describe the CPU in an application independent manner
-+so that program generators can do all the repetitive work of generating
-+code and tables for each CPU that is ported.
-+
-+For opcodes, several files are generated. No additional code need be
-+written in the opcodes directory although as an escape hatch the user
-+can add target specific code to file <arch>.opc in the CGEN cpu source
-+directory. These functions will be included in the relevant generated
-+files. An example of when you need to create an <arch>.opc file is when
-+there are special pseudo-ops that need to be parsed, for example the
-+high/shigh pseudo-ops of the M32R.
-+@xref{Doing an opcodes port}.
-+
-+For GAS, no files are generated (except test cases!) so the port is done
-+more or less like the other GAS ports except that the assembler uses the
-+CGEN-built opcode table plus @file{toplevel/gas/cgen.[ch]}.
-+
-+For the simulator, several files are built, and other support files need
-+to be written. @xref{Doing a simulator port}.
-+
-+@node Supported Guile versions
-+@section Supported Guile versions
-+
-+In order to avoid suffering from the bug of the day when using
-+snapshots, CGEN development has been confined to Guile releases only.
-+As of this writing (1999-04-26) only Guile 1.2 and 1.3 are supported.
-+At some point in the future older versions of Guile will no longer be
-+supported.
-+
-+If using Guile 1.2, configure it with @code{--enable-guile-debug
-+--enable-dynamic-linking} to work around an unknown bug in this version
-+of Guile. I ran into this on Solaris 2.6.
-+
-+@node Running configure
-+@section Running @code{configure}
-+
-+When doing porting or maintenance activity with CGEN, the build tree
-+must be configured with the @code{--enable-cgen-maint} option. This
-+adds the necessary dependencies to the @file{toplevel/opcodes} and
-+@file{toplevel/sim} directories.
-+
-+CGEN uses Guile so it must be installed. At present the CGEN configury
-+requires that if Guile isn't installed in @file{/usr/local} then the
-+@code{--with-guile=/guile/install/dir} option must be passed to
-+@file{configure} to specify where Guile is installed.
-+
-+@node Writing a CPU description file
-+@section Writing a CPU description file
-+
-+The first step in doing a CGEN port is writing a CPU description file.
-+The best way to do that is to take an existing file (such as the M32R)
-+and use it as a template.
-+
-+Writing a CPU description file generally involves writing each of the
-+following types of entries, in order. @xref{RTL}, for detailed
-+descriptions of each type of entry that appears in the description file.
-+
-+@menu
-+* Conventions:: Programming style conventions
-+* Writing define-arch:: Architecture wide specs
-+* Writing define-isa:: Instruction set characteristics
-+* Writing define-cpu:: CPU families
-+* Writing define-mach:: Machine variants
-+* Writing define-model:: Models of each machine variant
-+* Writing define-hardware:: Hardware elements
-+* Writing define-ifield:: Instruction fields
-+* Writing define-normal-insn-enum:: Instruction enums
-+* Writing define-operand:: Instruction operands
-+* Writing define-insn:: Instructions
-+* Writing define-macro-insn:: Macro instructions
-+* Using define-pmacro:: Preprocessor macros
-+* Splicing list arguments:: List arguments in macros
-+* Interactive development:: Useful things to do in a Guile shell
-+@end menu
-+
-+@node Conventions
-+@subsection Conventions
-+
-+First a digression on conventions and programming style.
-+
-+@enumerate 1
-+@item @code{define-foo} vs. @code{define-normal-foo}
-+
-+Each CPU description @code{define-} entry generally provides two forms:
-+the normal form and the general form. The normal form has a simple,
-+fixed-argument syntax that allows one to specify the most popular
-+elements. When one needs to specify more obscure elements of the
-+entry one uses the long form which is a list of name/value pairs. The
-+naming convention is to call the normal form @code{define-normal-foo}
-+and the general form @code{define-foo}.
-+
-+@item Parentheses placement
-+
-+Consider:
-+
-+@example
-+(define-normal-insn-enum
-+ insn-op1 "insn format enums" () f-op1 OP1_
-+ (ADD ADDC SUB SUBC
-+ AND OR XOR INV)
-+)
-+@end example
-+
-+All Lisp/Scheme code I've read puts the trailing parenthesis on the
-+previous line. CGEN programming style says the last trailing
-+parenthesis goes on a line by itself. If someone wants to put forth an
-+argument of why this should change, please do. I like putting the
-+very last parenthesis on a line by itself in column 1 because it makes
-+it easier to traverse the file with a parenthesis matching keystroke.
-+
-+@item @code{StudlyCaps} vs. @code{_} vs. @code{-}
-+
-+The convention is to have most things lowercase with words separated by
-+@samp{-}. Things that are uppercase are fixed and well defined: enum
-+values and mode names.
-+@c FIXME: Seems to me there's a few others.
-+This convention must be followed.
-+@end enumerate
-+
-+@node Writing define-arch
-+@subsection Writing define-arch
-+
-+Various simple and architecture-wide common things like the name of the
-+processor must be defined somewhere, so all of this stuff is put under
-+@code{define-arch}.
-+
-+This must be the first entry in the description file.
-+
-+@node Writing define-isa
-+@subsection Writing define-isa
-+
-+There are two purposes to @code{define-isa}.
-+The first is to specify parameters needed to decode instructions.
-+
-+The second is to give the instruction set a name. This is important for
-+architectures like the ARM where one CPU can execute multiple
-+instruction sets.
-+
-+@node Writing define-cpu
-+@subsection Writing define-cpu
-+
-+CPU families are an internal and artificial classification designed to
-+collect processor variants that are sufficiently similar together under
-+one roof for the simulator. What is ``sufficiently similar'' is up to
-+the programmer. For example, if the only difference between two
-+processor variants is that one has a few extra instructions, there's no
-+point in treating them separately in the simulator.
-+
-+When simulating the variant without the extra instructions, said
-+instructions are marked as ``invalid''. On the other hand, putting 32
-+and 64 bit variants of an architecture under one roof is problematic
-+since the word size is different. What ``under one roof'' means is left
-+fuzzy for now, but basically the simulator engine has a collection of
-+structures defining internal state, and ``CPU families'' minimize the
-+number of copies of generated code that manipulate this state.
-+
-+@node Writing define-mach
-+@subsection Writing define-mach
-+
-+CGEN uses ``mach'' in the same sense that BFD uses ``mach''.
-+``Mach'', which is short for `machine', defines a variant of
-+the architecture.
-+
-+@c There may be a need for a many-to-one correspondence between CGEN
-+@c machs and BFD machs.
-+
-+@node Writing define-model
-+@subsection Writing define-model
-+
-+When describing a CPU, in any context, there is ``architecture'' and
-+there is ``implementation''. In CGEN parlance a ``model'' is an
-+implementation of a ``mach''. Models specify pipeline and other
-+performance related characteristics of the implementation.
-+
-+Some architectures bring pipeline details up into the architecture
-+(rather than making them an implementation detail). It's not clear
-+yet how to handle all the various possibilities so at present this is
-+done on a case-by-case basis. Maybe a straightforward solution will
-+emerge.
-+
-+@node Writing define-hardware
-+@subsection Writing define-hardware
-+
-+The registers of the processor are specified with
-+@code{define-hardware}. Also, immediate constants and addresses are
-+defined to be ``hardware''. By convention, all hardware elements names
-+are prefaced with @samp{h-}. This convention must be followed.
-+
-+Pre-defined hardware elements are:
-+
-+@table @code
-+@item h-memory
-+Normal CPU memory@footnote{A temporary simplifying assumption is to treat all
-+memory identically. Being able to specify various kinds of memory
-+(e.g. on-chip RAM,ROM) is work-in-progress.}
-+@item h-sint
-+signed integer
-+@item h-uint
-+unsigned integer
-+@item h-addr
-+an address
-+@item h-iaddr
-+an instruction address
-+@end table
-+
-+Where are floats you ask? They'll be defined when the need arises.
-+
-+The program counter is named @samp{h-pc} and must be specified.
-+It is not a builtin element as sometimes architectures need to
-+modify its behaviour (in the get/set specs).
-+
-+@node Writing define-ifield
-+@subsection Writing define-ifield
-+
-+Writing instruction field entries involves analyzing the instruction set
-+and creating an entry for each field. If a field has multiple purposes,
-+one can create separate entries for each intended purpose. The names
-+should generally follow the names used by the architecture reference manual.
-+
-+By convention, all instruction field names are prefaced with @samp{f-}. This
-+convention must be followed.
-+
-+CGEN tries to allow the use of the bit numbering as found in the architecture
-+reference manual. This minimizes transcription errors both when writing the
-+@samp{.cpu} file and later when communicating field info to people.
-+
-+There are two key pieces of data that CGEN uses to organize field
-+specification: the default insn word size (in bits), and whether bit number
-+0 is the LSB (least significant bit) or the MSB (most significant bit).
-+
-+In the general case, fields are described with 4 numbers: word-offset,
-+word-length, start, and length.
-+All instruction fields (*) live in exactly one word and must be contiguous.
-+Non-contiguous fields are specified with ``multi-ifields'' which are fields
-+built up out of several smaller typically disjoint fields.
-+The size of the word depends on the context. @samp{word-offset} specifies
-+the offset in bits from the start of the insn to the word containing the field.
-+@samp{word-length} specifies the size in bits of the word containing the field.
-+@samp{start} specifies the position of the MSB of the field in the word.
-+@samp{length} specifies the size in bits of the field.
-+
-+Example.
-+
-+Suppose an ISA has instructions that are normally 16 bits,
-+but has instructions that may take an additional 32 bit immediate
-+and optionally an additional 16 bit immediate after that.
-+Also suppose the ISA numbers the bits starting from the LSB.
-+
-+default-insn-word-bitsize = 16, lsb0? = #t
-+
-+An instruction with four 4 bit fields and one 32 bit immediate might be:
-+
-+@example
-+
-+ +-----+-----+----+----+--------+--------+
-+ | op1 | op2 | r1 | r2 | simm32 | simm16 |
-+ +-----+-----+----+----+--------+--------+
-+
-+ word-offset word-length start length
-+f-op1: 0 16 15 4
-+f-op2: 0 16 11 4
-+f-r1: 0 16 7 4
-+f-r2: 0 16 3 4
-+f-simm32: 16 32 31 32
-+f-simm16: 48 16 15 16
-+
-+@end example
-+
-+If lsb0? = #f, then the example becomes:
-+
-+@example
-+
-+ word-offset word-length start length
-+f-op1: 0 16 0 4
-+f-op2: 0 16 4 4
-+f-r1: 0 16 8 4
-+f-r2: 0 16 12 4
-+f-simm32: 16 32 0 32
-+f-simm16: 48 16 0 16
-+
-+@end example
-+
-+Endianness for the purposes of this example is irrelevant.
-+In the word containing op1,op2,r1,r2, op1 is in the most significant nibble
-+and r2 is in the least significant nibble.
-+
-+For a large number of cases specifying all 4 numbers is excessive.
-+With careful redefinition of the starting bit number, one can get away with
-+only specifying start,length.
-+Imagine several words of the default insn word size laid out from the start of
-+the insn. On top of that lay the field. Now pick the minimal set of words
-+that are required to contain the field. That is the ``word'' we use.
-+The @samp{start} value is basically computed by adding the offset of the first
-+containing word to the starting bit of the field in the word. It's slightly
-+more complicated than that because lsb0? and the word's size must be taken
-+into account. This is best illustrated by rewriting the above example:
-+
-+@example
-+
-+lsb0? = #t
-+
-+ start length
-+f-op1: 15 4
-+f-op2: 11 4
-+f-r1: 7 4
-+f-r2: 3 4
-+f-simm32: 47 32
-+f-simm16: 63 16
-+
-+lsb0? = #f
-+
-+ start length
-+f-op1: 0 4
-+f-op2: 4 4
-+f-r1: 8 4
-+f-r2: 12 4
-+f-simm32: 16 32
-+f-simm16: 48 16
-+
-+@end example
-+
-+Note: This simpler definition doesn't work in all cases. Where it doesn't
-+the full-blown definition must be used.
-+
-+There are currently no shorthand macros for specifying the full-blown
-+definition. It is recommended that if you have to use one that you write
-+a macro to reduce typing.
-+
-+Written out the full blown way, the f-op1 field would be specified as:
-+
-+@example
-+
-+(define-ifield
-+ (name f-op1)
-+ (comment "f-op1")
-+ (attrs) ; no attributes, could be elided if one wants
-+ (word-offset 0)
-+ (word-length 16)
-+ (start 15)
-+ (length 4)
-+ (mode UINT)
-+ (encode #f) ; no special encoding, could be elided if one wants
-+ (decode #f) ; no special encoding, could be elided if one wants
-+)
-+
-+@end example
-+
-+A macro to simplify that could be written as:
-+
-+@example
-+
-+; dwf: define-word-field (??? pick a better name)
-+
-+(define-pmacro (dwf x-name x-comment x-attrs
-+ x-word-offset x-word-length x-start x-length
-+ x-mode x-encode x-decode)
-+ "Define a field including its containing word."
-+ (define-ifield
-+ (name x-name)
-+ (comment x-comment)
-+ (.splice attrs (.unsplice x-attrs))
-+ (word-offset x-word-offset)
-+ (word-length x-word-length)
-+ (start x-start)
-+ (length x-length)
-+ (mode x-mode)
-+ (.splice encode (.unsplice x-encode))
-+ (.splice decode (.unsplice x-decode))
-+ )
-+)
-+
-+@end example
-+
-+The @samp{.splice} is necessary because @samp{attrs}, @samp{encode},
-+and @samp{decode} take a list as an argument.
-+
-+One would then write f-op1 as:
-+
-+@example
-+
-+(dwf f-op1 "f-op1" () 0 16 15 4 UINT #f #f)
-+
-+@end example
-+
-+(*) This doesn't include fields like multi-ifields.
-+
-+@node Writing define-normal-insn-enum
-+@subsection Writing define-normal-insn-enum
-+
-+Writing instruction enum entries involves analyzing the instruction set
-+and attaching names to the opcode fields. For example, if a field named
-+@samp{op1} is used to select which of add, addc, sub, subc, and, or,
-+xor, and inv instructions, one would write something like the following:
-+
-+@example
-+(define-normal-insn-enum
-+ insn-op1 "insn format enums" () f-op1 OP1_
-+ (ADD ADDC SUB SUBC
-+ AND OR XOR INV)
-+)
-+@end example
-+
-+These entries simplify instruction definitions by giving a name to a
-+particular value for a particular instruction field. By convention,
-+enum names are uppercase. This convention must be followed.
-+
-+@node Writing define-operand
-+@subsection Writing define-operand
-+
-+Operands are what instruction semantics use to refer to hardware
-+elements. The typical use of an operand is to map instruction fields to
-+hardware. For example, if field @samp{f-r2} is used to specify one of
-+the registers defined by the @code{h-gr} hardware entry, one would
-+write:
-+
-+@code{(dnop sr "source register" () h-gr f-r2)}
-+
-+@code{dnop} is short for ``define normal operand'' @footnote{A profound
-+aversion to typing causes me to often provide brief names of things that
-+get typed a lot.}. @xref{RTL}, for more information.
-+
-+@node Writing define-insn
-+@subsection Writing define-insn
-+
-+This involves going through the CPU manual and writing an entry for each
-+instruction. Instructions specific to a particular machine variant are
-+indicated so with the `MACH' attribute. Example:
-+
-+@example
-+(define-normal-insn
-+ add "add instruction"
-+ ((MACH mach1)) ; or (MACH mach1,mach2,...) for multiple variants
-+ ...
-+)
-+@end example
-+
-+The `base' machine is a predefined machine variant that includes
-+instructions available to all variants, and is the default if no
-+`MACH' attribute is specified.
-+
-+When the @file{.cpu} file is processed, CGEN will analyze the semantics
-+to determine:
-+
-+@itemize @bullet
-+@item input operands
-+
-+The list of hardware elements read by the instruction.
-+
-+@item output operands
-+
-+The list of hardware elements written by the instruction.
-+
-+@item attributes
-+
-+Instruction attributes that can be computed from the semantics.
-+
-+CTI: control transfer instruction, generally a branch.
-+
-+@itemize @bullet
-+@item UNCOND-CTI
-+
-+The instruction unconditionally sets pc.
-+
-+@item COND-CTI
-+
-+The instruction conditionally sets pc.
-+
-+@item SKIP-CTI
-+
-+NB. This is an expermental attribute. Its usage needs to evolve.
-+
-+@item DELAY-SLOT
-+
-+NB. This is an expermental attribute. Its usage needs to evolve.
-+@end itemize
-+
-+@end itemize
-+
-+CGEN will also try to simplify the semantics as much as possible:
-+
-+@itemize @bullet
-+@item Constant folding
-+
-+Expressions involving constants are simplified and any resulting
-+non-taken paths of conditional expressions are discarded.
-+@end itemize
-+
-+@node Writing define-macro-insn
-+@subsection Writing define-macro-insn
-+
-+Some instructions are really aliases for other instructions, maybe even
-+a sequence of them. For example, an architecture that has a general
-+decrement-then-store instruction might have a specialized version of
-+this instruction called @code{push} supported by the assembler. These
-+are handled with ``macro instructions''. Macro instructions are used by
-+the assembler/disassembler only. They are not used by the simulator.
-+
-+@node Using define-pmacro
-+@subsection Using define-pmacro
-+
-+When a group of entries, say instructions, share similar information, a
-+macro (in the C preprocessor sense) can be used to simplify the
-+description. This can be used to save a lot of typing, which also
-+improves readability since often 1 page of code is easier to understand
-+than 4.
-+
-+Here is an example from the M32R port.
-+
-+@example
-+(define-pmacro (bin-op mnemonic op2-op sem-op imm-prefix imm)
-+ (begin
-+ (dni mnemonic
-+ (.str mnemonic " reg/reg")
-+ ()
-+ (.str mnemonic " $dr,$sr")
-+ (+ OP1_0 op2-op dr sr)
-+ (set dr (sem-op dr sr))
-+ ()
-+ )
-+ (dni (.sym mnemonic "3")
-+ (.str mnemonic " reg/" imm)
-+ ()
-+ (.str mnemonic "3 $dr,$sr," imm-prefix "$" imm)
-+ (+ OP1_8 op2-op dr sr imm)
-+ (set dr (sem-op sr imm))
-+ ()
-+ )
-+ )
-+)
-+(bin-op add OP2_10 add "$hash" slo16)
-+(bin-op and OP2_12 and "" uimm16)
-+(bin-op or OP2_14 or "$hash" ulo16)
-+(bin-op xor OP2_13 xor "" uimm16)
-+@end example
-+
-+@code{.sym/.str} are short for Scheme's @code{symbol-append} and
-+@code{string-append} operations and are conceptually the same as the C
-+preprocessor's @code{##} concatenation operator. @xref{Symbol
-+concatenation}, and @xref{String concatenation}, for details.
-+
-+@node Splicing list arguments
-+@subsection Splicing arguments
-+
-+Several cpu description elements take a list as an argument (as opposed
-+to a scalar).
-+When constructing a call to define-* in a pmacro, these elements must have
-+their arguments spliced in to achieve the proper syntax.
-+
-+This is best explained with an example.
-+Here's a simplifying macro for writing ifield definitions with every
-+element specified.
-+
-+@example
-+
-+; dwf: define-word-field (??? pick a better name)
-+
-+(define-pmacro (dwf x-name x-comment x-attrs
-+ x-word-offset x-word-length x-start x-length
-+ x-mode x-encode x-decode)
-+ "Define a field including its containing word."
-+ (define-ifield
-+ (name x-name)
-+ (comment x-comment)
-+ (.splice attrs (.unsplice x-attrs))
-+ (word-offset x-word-offset)
-+ (word-length x-word-length)
-+ (start x-start)
-+ (length x-length)
-+ (mode x-mode)
-+ (.splice encode (.unsplice x-encode))
-+ (.splice decode (.unsplice x-decode))
-+ )
-+)
-+
-+@end example
-+
-+The @samp{.splice} is necessary because @samp{attrs}, @samp{encode},
-+and @samp{decode} take a list as an argument.
-+
-+One would then write f-op1 as:
-+
-+@example
-+
-+(dwf f-op1 "f-op1" () 0 16 15 4 UINT #f #f)
-+
-+@end example
-+
-+@node Interactive development
-+@subsection Interactive development
-+
-+The normal way@footnote{Normal for me anyway, certainly each person will have
-+their own preference} of writing a CPU description file involves starting Guile
-+and developing the .CPU file interactively. The basic steps are
-+
-+@enumerate 1
-+@item Run @code{guile}.
-+@item @code{(load "dev.scm")}
-+@item Load application, e.g. @code{(load-opc)} or @code{(load-sim)}
-+@item Load CPU description file, e.g. @code{(cload #:arch "m32r")}
-+@item Run generators until output looks reasonable, e.g. @code{(cgen-opc.c)}
-+@end enumerate
-+
-+To assist in the development process and to cut down on some typing,
-+@file{dev.scm} looks for @file{$HOME/.cgenrc} and, if present, loads it.
-+Typical things that @file{.cgenrc} contains are definitions of procedures
-+that combine steps 3 and 4 above.
-+
-+Example:
-+
-+@example
-+(define (m32r-opc)
-+ (load-opc)
-+ (cload #:arch "m32r")
-+)
-+(define (m32r-sim)
-+ (load-sim)
-+ (cload #:arch "m32r" #:options "with-scache with-profile=fn")
-+)
-+(define (m32rbf-sim)
-+ (load-sim)
-+ (cload #:arch "m32r" #:machs "m32r" #:options "with-scache with-profile=fn")
-+)
-+(define (m32rxf-sim)
-+ (load-sim)
-+ (cload #:arch "m32r" #:machs "m32rx" #:options "with-scache with-profile=fn")
-+)
-+@end example
-+
-+CPU description files are loaded into an interactive guile session with
-+@code{cload}. The syntax is:
-+
-+@example
-+(cload #:arch arch
-+ [#:machs "mach-list"]
-+ [#:isas "isa-list"]
-+ [#:options "option-list"])
-+@end example
-+
-+Only the @code{#:arch} argument is mandatory.
-+
-+@samp{mach-list} is a comma separated string of machines to keep.
-+
-+@samp{isa-list} is a comma separated string of isas to keep.
-+
-+@samp{options} is a space separated string of options for the application.
-+
-+@node Doing an opcodes port
-+@section Doing an opcodes port
-+
-+The best way to begin a port is to take an existing one (preferably one
-+that is similar to the new port) and use it as a template.
-+
-+@enumerate 1
-+@item Run @code{guile}.
-+@item @code{(load "dev.scm")}. This loads in a set of interactive
-+development routines.
-+@item @code{(load-opc)}. Load the opcodes support.
-+@item Edit your @file{cpu/<arch>.cpu} and @file{cpu/<arch>.opc} files.
-+ @itemize @bullet
-+ @item The @file{.cpu} file is the main description file.
-+ @item The @file{.opc} file provides additional C support code.
-+ @end itemize
-+@item @code{(cload #:arch "cpu/<arch>")}
-+@item Run each of:
-+ @itemize @bullet
-+ @item @code{(cgen-desc.h)}
-+ @item @code{(cgen-desc.c)}
-+ @item @code{(cgen-opc.h)}
-+ @item @code{(cgen-opc.c)}
-+ @item @code{(cgen-ibld.in)}
-+ @item @code{(cgen-asm.in)}
-+ @item @code{(cgen-dis.in)}
-+ @item @code{(cgen-opinst.c)} -- [optional]
-+ @end itemize
-+@item Repeat steps 4, 5 and 6 until the output looks reasonable.
-+@item Add dependencies to @file{opcodes/Makefile.am} to generate the
-+eight opcodes files (use the M32R port as an example).
-+@item Run @code{make dep} from the @file{opcodes} build directory.
-+@item Run @code{make all-opcodes} from the top level build directory.
-+@end enumerate
-+
-+Note that Guile is not currently shipped with Binutils, etc. Until
-+Guile is shipped with Binutils, etc. or a C implementation of CGEN is
-+done, the generated files are installed in the source directory and
-+checked into CVS.
-+
-+@node Doing a GAS port
-+@section Doing a GAS port
-+
-+A GAS CGEN port is essentially no different than a normal port except
-+that the CGEN opcode table is used, and there are extra supporting
-+routines available in @file{gas/cgen.[ch]}. As always, a good way to
-+get started is to take the M32R port as a template and go from there.
-+
-+The important CGEN-specific things to keep in mind are:
-+@c to be expanded on as time permits
-+
-+@itemize @bullet
-+@item Several support routines are provided by @file{gas/cgen.c}. Some
-+must be used, others are available to use if you want to (in general
-+they should be used unless it's not possible).
-+
-+ @itemize @bullet
-+ @item @code{gas_cgen_init_parse}
-+ @itemize @minus
-+ @item Call from @code{md_assemble} before doing anything
-+ else.
-+ @item Must be used.
-+ @end itemize
-+ @item @code{gas_cgen_record_fixup}
-+ @itemize @minus
-+ @item Cover function to @code{fix_new}.
-+ @end itemize
-+ @item @code{gas_cgen_record_fixup_exp}
-+ @itemize @minus
-+ @item Cover function to @code{fix_new_exp}.
-+ @end itemize
-+ @item @code{gas_cgen_parse_operand}
-+ @itemize @minus
-+ @item Callback for opcode table based parser, set in
-+ @code{md_begin}.
-+ @end itemize
-+ @item @code{gas_cgen_finish_insn}
-+ @itemize @minus
-+ @item After parsing an instruction, call this to add the
-+ instruction to the frag and queue any fixups.
-+ @end itemize
-+ @item @code{gas_cgen_md_apply_fix}
-+ @itemize @minus
-+ @item Provides basic @code{md_apply_fix} support.
-+ @item @code{#define md_apply_fix
-+ gas_cgen_md_apply_fix} if you're able to use
-+ it.
-+ @end itemize
-+ @item @code{gas_cgen_tc_gen_reloc}
-+ @itemize @minus
-+ @item Provides basic @code{tc_gen_reloc} support in function.
-+ @item @code{#define tc_gen_reloc gas_cgen_tc_gen_reloc}
-+ if you're able to use it.
-+ @end itemize
-+ @end itemize
-+
-+@item @code{md_begin} should contain the following (plus anything else you
-+want of course):
-+
-+@example
-+ /* Set the machine number and endianness. */
-+ gas_cgen_opcode_desc =
-+ <arch>_cgen_cpu_open (CGEN_CPU_OPEN_MACHS,
-+ 0 /* mach number */,
-+ CGEN_CPU_OPEN_ENDIAN,
-+ (target_big_endian
-+ ? CGEN_ENDIAN_BIG
-+ : CGEN_ENDIAN_LITTLE),
-+ CGEN_CPU_OPEN_END);
-+
-+ <arch>_cgen_init_asm (gas_cgen_opcode_desc);
-+
-+ /* This is a callback from cgen to gas to parse operands. */
-+ cgen_set_parse_operand_fn (gas_cgen_opcode_desc, gas_cgen_parse_operand);
-+@end example
-+
-+@item @code{md_assemble} should contain the following basic framework:
-+
-+@example
-+@{
-+ const CGEN_INSN *insn;
-+ char *errmsg;
-+ CGEN_FIELDS fields;
-+#if CGEN_INT_INSN_P
-+ cgen_insn_t buffer[CGEN_MAX_INSN_SIZE / sizeof (CGEN_INSN_INT)];
-+#else
-+ char buffer[CGEN_MAX_INSN_SIZE];
-+#endif
-+
-+ gas_cgen_init_parse ();
-+
-+ insn = m32r_cgen_assemble_insn (gas_cgen_opcode_desc, str,
-+ &fields, buffer, &errmsg);
-+
-+ if (! insn)
-+ @{
-+ as_bad (errmsg);
-+ return;
-+ @}
-+
-+ gas_cgen_finish_insn (insn, buffer, CGEN_FIELDS_BITSIZE (&fields),
-+ relax_p, /* non-zero to allow relaxable insns */
-+ result); /* non-null if results needed for later */
-+@}
-+@end example
-+
-+@end itemize
-+
-+@node Building a GAS test suite
-+@section Building a GAS test suite
-+
-+CGEN can also build the template for test cases for all instructions. In
-+some cases it can also generate the actual instructions. The result is
-+then assembled, disassembled, verified, and checked into CVS. Further
-+changes are usually done by hand as it's easier. The goal here is to
-+save the enormous amount of initial typing that is required.
-+
-+@enumerate 1
-+@item @code{cd} to the CGEN build directory
-+@item @code{make gas-test}
-+
-+At this point two files have been created in the CGEN build directory:
-+@file{gas-allinsn.exp} and @file{gas-build.sh}. The @file{gas-build.sh}
-+script normally requires one command line argument: the location of your
-+@file{gas} build directory. If this argument is omitted, the script
-+searches in @file{../gas} automatically.
-+
-+@item Copy @file{gas-allinsn.exp} to @file{toplevel/gas/testsuite/gas/<arch>/allinsn.exp}.
-+@item @code{sh gas-build.sh}
-+
-+At this point directory tmpdir contains two files: @file{allinsn.s} and
-+@file{allinsn.d}. File @file{allinsn.d} usually needs a bit of massaging.
-+
-+@item Copy @file{tmpdir/allinsn.[sd]} to @file{toplevel/gas/testsuite/gas/<arch>}
-+@item Run @code{make check} in the @file{gas} build directory and
-+massage things until you're satisfied the files are correct.
-+@item Check files into CVS.
-+@end enumerate
-+
-+At this point further additions/modifications are usually done by hand.
-+
-+@node Doing a simulator port
-+@section Doing a simulator port
-+
-+The same basic procedure for opcodes porting applies here.
-+
-+@enumerate 1
-+@item Run @code{guile}.
-+@item @code{(load "dev.scm")}
-+@item @code{(load-sim)}
-+@item Edit your @file{cpu/<arch>.cpu} file.
-+@item @code{(cload #:arch "cpu/<arch>")}
-+@item Run each of:
-+ @itemize @bullet
-+ @item @code{(cgen-arch.h)}
-+ @item @code{(cgen-arch.c)}
-+ @item @code{(cgen-cpuall.h)}
-+ @end itemize
-+@item Repeat steps 4,5,6 until the output looks reasonable.
-+@item Edit your cpu/<arch>.cpu file.
-+@item @code{(cload #:arch "cpu/<arch>" #:machs "mach1[,mach2[,...]]")}
-+@item Run each of:
-+ @itemize @bullet
-+ @item @code{(cgen-cpu.h)}
-+ @item @code{(cgen-cpu.c)}
-+ @item @code{(cgen-decode.h)}
-+ @item @code{(cgen-decode.c)}
-+ @item @code{(cgen-semantics.c)}
-+ @item @code{(cgen-sem-switch.c)} -- only if using a switch()
-+ version of semantics.
-+ @item @code{(cgen-model.c)}
-+ @end itemize
-+@item Repeat steps 8, 9 and 10 until the output looks reasonable.
-+@end enumerate
-+
-+The following additional files are also needed. These live in the
-+@file{sim/<arch>} directory. Administrivia files like
-+@file{configure.in} and @file{Makefile.in} are omitted.
-+
-+@itemize @bullet
-+@item @file{sim-main.h}
-+
-+Main include file required by the ``common'' (@file{sim/common})
-+support, and by each target's @file{.c} file.
-+This file includes the relevant other headers.
-+The order is fairly important.
-+@file{m32r/sim-main.h} is a good starting point.
-+
-+@file{sim-main.h} also defines several types:
-+
-+@itemize @minus
-+@item @code{_sim_cpu} -- a struct containing all state for a
-+particular CPU.
-+@item @code{sim_state} -- contains all state of the simulator.
-+A @code{SIM_DESC} (which is the result of sim_open and is akin
-+to a file descriptor) points to one of these.
-+@item @code{sim_cia} -- type of an instruction address. For
-+CGEN this is generally ``word mode'', in GCC parlance.
-+@end itemize
-+
-+@file{sim-main.h} also defines several macros:
-+
-+@itemize @minus
-+@item @code{CIA_GET(cpu)} -- return ``cia'' of the CPU
-+@item @code{CIA_SET(cpu,cia)} -- set the ``cia'' of the CPU
-+@end itemize
-+
-+``cia'' is short for "current instruction address".
-+
-+The definition of @code{sim_state} is fairly simple. Just copy the M32R
-+case. The definition of @code{_sim_cpu} is not simple, so pay
-+attention. The complexity comes from trying to create a ``derived
-+class'' of @code{sim_cpu} for each CPU family. What is done is define a
-+different version of @code{sim_cpu} in each CPU family's set of files,
-+with a common ``base class'' structure ``leading part'' for each
-+@code{sim_cpu} definition used by non-CPU-family specific files. The
-+way this is done is by defining @code{WANT_CPU_<CPU-FAMILY-NAME>} at the
-+top of CPU family specific files. The definition of @code{_sim_cpu} is
-+then:
-+
-+@example
-+ struct _sim_cpu @{
-+ /* sim/common CPU base */
-+ sim_cpu_base base;
-+ /* Static parts of CGEN. */
-+ CGEN_CPU cgen_CPU;
-+ #if defined (WANT_CPU_CPUFAM1)
-+ CPUFAM1_CPU_DATA CPU_data;
-+ #elif defined (WANT_CPU_CPUFAM2)
-+ CPUFAM2_CPU_DATA CPU_data;
-+ #endif
-+ @};
-+@end example
-+
-+@item @file{tconfig.in}
-+
-+This file predates @file{sim-main.h} and was/is intended to contain
-+macros that configure the simulator sources.
-+
-+@itemize @bullet
-+@item @code{SIM_HAVE_MODEL} -- enable @file{common/sim-model.[ch]}
-+support.
-+@item @code{SIM_HANDLES_LMA} -- makes @file{sim-hload.c} do the right
-+thing.
-+@item @code{WITH_SCACHE_PBB} -- define this to 1 if using pbb scaching.
-+@end itemize
-+
-+@item @file{<arch>-sim.h}
-+
-+This file predates @file{sim-main.h} and contains miscellaneous macros
-+and definitions used by the simulator.
-+
-+@item @file{mloop.in}
-+
-+This file contains code to implement the fetch/execute process. There
-+are various ways to do this, and several are supported. Which one to
-+choose depends on the environment in which the CPU will be used. For
-+example when executing a program in a single-CPU environment without
-+devices, most or all available cycles can be devoted to simulation of the
-+atarget CPU. However, in an environment with devices or multiple cpus, one
-+may wish the CPU to execute one instruction then relinquish control so a
-+device operation may be done or an instruction can be simulated on a
-+second cpu. Efficient techniques for the former aren't necessarily the best
-+for the latter.
-+
-+Three versions are currently supported:
-+
-+@enumerate 1
-+@item simple -- fetch/decode/execute one insn
-+@item scache -- same as simple but results of decoding are cached
-+@item pbb -- same as scache but several insns are handled each iteration
-+pbb stands for pseudo basic block.
-+@end enumerate
-+
-+This file is processed by @file{common/genmloop.sh} at build time. The
-+result is two files: @file{mloop.c} and @file{eng.h}.
-+
-+@item @file{sim-if.c}
-+
-+By convention this file contains @code{sim_open}, @code{sim_close},
-+@code{sim_create_inferior}, @code{sim_do_command}. These functions can
-+live in any file of course. They're here because they're the parts of
-+the @code{remote-sim.h} interface that aren't provided by the common
-+directory.
-+
-+@item @file{<cpufam>.c}
-+
-+By convention this file contains register access and model support
-+functions for a CPU family (the name of this file is misnamed in the
-+M32R case). The register access functions implement the
-+@code{sim_fetch_register} and @code{sim_store_register} interface
-+functions (named @code{<cpufam>_@{fetch,store@}_register}), and support
-+code for register get/set rtl. The model support functions implement the
-+before/after handlers (functions that handle tracing/profiling) and
-+timing for each function unit.
-+
-+@item Other files
-+
-+The M32R port has two other handwritten files: @file{devices.c} and
-+@file{traps.c}. How you wish to organize this is up to you.
-+@end itemize
-+
-+@node Building a simulator test suite
-+@section Building a simulator test suite
-+
-+CGEN can also build the template for test cases for all instructions. In
-+some cases it can also generate the actual instructions
-+@footnote{Although this hasn't been implemented yet.}. The result is
-+then verified and checked into CVS. Further changes are usually done by
-+hand as it's easier. The goal here is to save the enormous amount of
-+initial typing that is required.
-+
-+@enumerate 1
-+@item @code{cd} to the CGEN build directory
-+@item @code{make sim-test ISA=<arch>}
-+
-+At this point two files have been created in the CGEN build directory:
-+@file{sim-allinsn.exp} and @file{sim-build.sh}.
-+
-+@item Copy @file{sim-allinsn.exp} to
-+@file{toplevel/sim/testsuite/sim/<arch>/allinsn.exp}.
-+@item @code{sh sim-build.sh}
-+
-+At this point a new subdirectory called @file{tmpdir} will be created
-+and will contain one test case for each instruction. The framework has
-+been filled in but not the actual test case. It's handy to write an
-+``include file'' containing assembler macros that simplify writing test
-+cases. See @file{toplevel/sim/testsuite/sim/m32r/testutils.inc} for an
-+example.
-+
-+@item write testutils.inc
-+@item finish each test case
-+@item copy @file{tmpdir/*.cgs} to @file{toplevel/sim/testsuite/sim/<arch>}
-+@item run @code{make check} in the sim build directory and massage things until you're satisfied the files are correct
-+@item Check files into CVS.
-+@end enumerate
-+
-+@noindent At this point further additions/modifications are usually done
-+by hand.
-diff -Nur binutils-2.24.orig/cgen/doc/rtl.texi binutils-2.24/cgen/doc/rtl.texi
---- binutils-2.24.orig/cgen/doc/rtl.texi 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/doc/rtl.texi 2016-06-30 21:26:12.653893112 +0200
-@@ -0,0 +1,2375 @@
-+@c Copyright (C) 2000, 2003 Red Hat, Inc.
-+@c This file is part of the CGEN manual.
-+@c For copying conditions, see the file cgen.texi.
-+
-+@node RTL
-+@chapter CGEN's Register Transfer Language
-+@cindex RTL
-+@cindex Register Transfer Language
-+
-+CGEN uses a variant of GCC's Register Transfer Language as the basis for
-+its CPU description language.
-+
-+@menu
-+* RTL Introduction:: Introduction to CGEN's RTL
-+* Trade-offs:: Various trade-offs in the design
-+* Rules and notes:: Rules and notes common to all entries
-+* Definitions:: Definitions in the description file
-+* Attributes:: Random data associated with any entry
-+* Architecture variants:: Specifying variations of a CPU
-+* Model variants:: Specifying variations of a CPU's implementation
-+* Hardware elements:: Elements of a CPU
-+* Instruction fields:: Fields of an instruction
-+* Enumerated constants:: Assigning useful names to important numbers
-+* Instruction operands::
-+* Derived operands:: Operands for CISC-like architectures
-+* Instructions::
-+* Macro-instructions::
-+* Modes::
-+* Expressions::
-+* Macro-expressions::
-+@end menu
-+
-+@node RTL Introduction
-+@section RTL Introduction
-+
-+The description language, or RTL
-+@footnote{While RTL stands for Register Transfer Language, it is also used
-+to denote the CPU description language as a whole.}, needs to support the
-+definition of all the
-+architectural and implementation features of a CPU, as well as enough
-+information for all intended applications. At present this is just the
-+opcodes table and an ISA level simulator, but it is not intended that
-+applications be restricted to these two areas. The goal is having an
-+application independent description of the CPU. In the end that's a lot to
-+ask for from one language. Certainly gate level specification of a CPU
-+is not attempted!
-+
-+The syntax of the language is inspired by GCC's RTL and by the Scheme
-+programming language, theoretically taking the best of both. To what
-+extent that is true, and to what extent that is sufficient inspiration
-+is certainly open to discussion. In actuality, there isn't much difference
-+here from GCC's RTL that is attributable to being Scheme-ish. One
-+important Scheme-derived concept is arbitrary precision of constants.
-+Sign or zero extension of constants in GCC has always been a source of
-+problems. In CGEN'S RTL constants have modes and there are both signed
-+and unsigned modes.
-+
-+Here is a graphical layout of the hierarchy of elements of a @file{.cpu}
-+file.
-+
-+@example
-+ architecture
-+ / \
-+ cpu-family1 cpu-family2 ...
-+ / \ / \
-+ machine1 machine2 machine3 ...
-+ / \
-+ model1 model2 ...
-+@end example
-+
-+Each of these elements is explained in more detail below. The
-+@emph{architecture} is one of @samp{sparc}, @samp{m32r}, etc. Within
-+the @samp{sparc} architecture, @emph{cpu-family} might be
-+@samp{sparc32}, @samp{sparc64}, etc. Within the @samp{sparc32} CPU
-+family, the @emph{machine} might be @samp{sparc-v8}, @samp{sparclite},
-+etc. Within the @samp{sparc-v8} machine classification, @emph{model}
-+might be @samp{hypersparc}, @samp{supersparc}, etc.
-+
-+Instructions form their own hierarchy as each instruction may be supported
-+by more than one machine. Also, some architectures can handle more than
-+one instruction set on one chip (e.g. ARM).
-+
-+@example
-+ isa
-+ |
-+ instruction
-+ / \
-+ operand1 operand2 ...
-+ | |
-+ hw1+ifield1 hw2+ifield2 ...
-+@end example
-+
-+Each of these elements is explained in more detail below.
-+
-+@node Trade-offs
-+@section Trade-offs
-+
-+While CGEN is written in Scheme, this is not a requirement. The
-+description language should be considered absent of any particular
-+implementation, though certainly some things were done to simplify
-+reading @file{.cpu} files with Scheme. Scheme related choices have been
-+made in areas that have no serious impact on the usefulness of the CPU
-+description language. Places where that is not the case need to be
-+revisited, though there currently are no known ones.
-+
-+One place where the Scheme implementation influenced the design of
-+CGEN's RTL is in the handling of modes. The Scheme implementation was
-+simplified by treating modes as an explicit argument, rather than as an
-+optional suffix of the operation name. For example, compare @code{(add
-+SI dr sr)} in CGEN versus @code{(add:SI dr sr)} in GCC RTL. The mode is
-+treated as optional so a shorthand form of @code{(add dr sr)} works.
-+
-+@node Rules and notes
-+@section Rules and notes
-+
-+A few basic guidelines for all entries:
-+
-+@itemize @bullet
-+@item names must be valid Scheme symbols.
-+@item comments are used, for example, to comment the generated C code
-+@footnote{It is possible to produce a reference manual from
-+@file{.cpu} files and such an application wouldn't be a bad idea.}.
-+@item comments may be any number of lines, though generally succinct comments
-+are preferable@footnote{It would be reasonable to have a short form
-+and a long form of comment. Either as two entries are as one entry with
-+the short form separated from the long form via some delimiter (say the
-+first newline).}.
-+@item everything is case sensitive.@footnote{??? This is true in RTL,
-+though some apps add symbols and convert case that can cause collisions.}
-+@item while "_" is a valid character to use in symbols, "-" is preferred
-+@item except for the @samp{comment} and @samp{attrs} fields and unless
-+otherwise specified all fields must be present.
-+@end itemize
-+
-+Symbols and strings
-+
-+Symbols in CGEN are the same as in Scheme.
-+Symbols can be used anywhere a string can be used.
-+The reverse is not true, and in general strings can't be used in place
-+of symbols.
-+
-+@node Definitions
-+@section Definitions
-+@cindex Definitions
-+
-+Each entry has the same format: @code{(define-foo arg1 arg2 ...)}, where
-+@samp{foo} designates the type of entry (e.g. @code{define-insn}). In
-+the general case each argument is a name/value pair expressed as
-+@code{(name value)}.
-+(*note: Another style in common use is `:name value' and doesn't require
-+parentheses. Maybe that would be a better way to go here. The current
-+style is easier to construct from macros though.)
-+
-+While the general case is flexible, it also is excessively verbose in
-+the normal case. To reduce this verbosity, a second version of most
-+define-foo's exists that takes positional arguments. To further reduce
-+this verbosity, preprocessor macros can be written to simplify things
-+further for the normal case. See sections titled ``Simplification
-+macros'' below.
-+
-+@node Attributes
-+@section Attributes
-+@cindex Attributes
-+
-+Attributes are used throughout for specifying various properties.
-+For portability reasons attributes can only have 32 bit integral values
-+(signed or unsigned).
-+@c How about an example?
-+
-+There are four kinds of attributes: boolean, integer, enumerated, and bitset.
-+Boolean attributes can be achieved via others, but they occur frequently
-+enough that they are special cased (and one bit can be used to record them).
-+Bitset attributes are a useful simplification when one wants to indicate an
-+object can be in one of many states (e.g. an instruction may be supported by
-+multiple machines).
-+
-+String attributes might be a useful addition.
-+Another useful addition might be functional attributes (the attribute
-+is computed at run-time - currently all attributes are computed at
-+compile time). One way to implement functional attributes would be to
-+record the attributes as byte-code and lazily evaluate them, caching the
-+results as appropriate. The syntax has been carefully done to not
-+preclude either as an upward compatible extension.
-+
-+Attributes must be defined before they can be used.
-+There are several predefined attributes for entry types that need them
-+(instruction field, hardware, operand, and instruction). Predefined
-+attributes are documented in each relevant section below.
-+
-+In C applications an enum is created that defines all the attributes.
-+Applications that wish to be architecture independent need the attribute
-+to have the same value across all architectures. This is achieved by
-+giving the attribute the INDEX attribute, which specifies the enum value
-+must be fixed across all architectures.
-+@c FIXME: Give an example here.
-+@c FIXME: Need a better name than `INDEX'.
-+
-+Convention requires attribute names consist of uppercase letters, numbers,
-+"-", and "_", and must begin with a letter.
-+To be consistent with Scheme, "-" is preferred over "_".
-+
-+@subsection Boolean Attributes
-+@cindex Attributes, boolean
-+
-+Boolean attributes are defined with:
-+
-+@example
-+(define-attr
-+ (type boolean)
-+ (for user-list)
-+ (name attribute-name)
-+ (comment "attribute comment")
-+ (attrs attribute-attributes)
-+)
-+@end example
-+
-+The default value of boolean attributes is always false. This can be
-+relaxed, but it's one extra complication that is currently unnecessary.
-+Boolean attributes are specified in either of two forms: (NAME expr),
-+and NAME, !NAME. The first form is the canonical form. The latter two
-+are shorthand versions. `NAME' means "true" and `!NAME' means "false".
-+@samp{expr} is an expression that evaluates to 0 for false and non-zero
-+for true @footnote{The details of @code{expr} is still undecided.}.
-+
-+@code{user-list} is a space separated list of entry types that will use
-+the attribute. Possible values are: @samp{attr}, @samp{enum},
-+@samp{cpu}, @samp{mach}, @samp{model}, @samp{ifield}, @samp{hardware},
-+@samp{operand}, @samp{insn} and @samp{macro-insn}. If omitted all are
-+considered users of the attribute.
-+
-+@subsection Integer Attributes
-+@cindex Attributes, integer
-+
-+Integer attributes are defined with:
-+
-+@example
-+(define-attr
-+ (type integer)
-+ (for user-list)
-+ (name attribute-name)
-+ (comment "attribute comment")
-+ (attrs attribute-attributes)
-+ (default expr)
-+)
-+@end example
-+
-+If omitted, the default is 0.
-+
-+(*note: The details of `expr' is still undecided. For now it must be
-+an integer.)
-+
-+Integer attributes are specified with (NAME expr).
-+
-+@subsection Enumerated Attributes
-+@cindex Attributes, enumerated
-+
-+Enumerated attributes are the same as integer attributes except the
-+range of possible values is restricted and each value has a name.
-+Enumerated attributes are defined with
-+
-+@example
-+(define-attr
-+ (type enum)
-+ (for user-list)
-+ (name attribute-name)
-+ (comment "attribute comment")
-+ (attrs attribute-attributes)
-+ (values enum-value1 enum-value2 ...)
-+ (default expr)
-+)
-+@end example
-+
-+If omitted, the default is the first specified value.
-+
-+(*note: The details of `expr' is still undecided. For now it must be the
-+name of one of the specified values.)
-+
-+Enum attributes are specified with (NAME expr).
-+
-+@subsection Bitset Attributes
-+@cindex Attributes, bitset
-+
-+Bitset attributes are for situations where you want to indicate something
-+is a subset of a small set of possibilities. The MACH attribute uses this
-+for example to allow specifying which of the various machines support a
-+particular insn.
-+(*note: At present the maximum number of possibilities is 32.
-+This is an implementation restriction which can be relaxed, but there's
-+currently no rush.)
-+
-+Bitset attributes are defined with:
-+
-+@example
-+(define-attr
-+ (type bitset)
-+ (for user-list)
-+ (name attribute-name)
-+ (comment "attribute comment")
-+ (attrs attribute-attributes)
-+ (values enum-value1 enum-value2 ...)
-+ (default default-name)
-+)
-+@end example
-+
-+@samp{default-name} must be the name of one of the specified values. If
-+omitted, it is the first value.
-+
-+Bitset attributes are specified with @code{(NAME val1,val2,...)}. There
-+must be no spaces in ``@code{val1,val2,...}'' and each value must be a
-+valid Scheme symbol.
-+
-+(*note: it's not clear whether allowing arbitrary expressions will be
-+useful here, but doing so is not precluded. For now each value must be
-+the name of one of the specified values.)
-+
-+@node Architecture variants
-+@section Architecture Variants
-+@cindex Architecture variants
-+
-+The base architecture and its variants are described in four parts:
-+@code{define-arch}, @code{define-isa}, @code{define-cpu}, and
-+@code{define-mach}.
-+
-+@menu
-+* define-arch::
-+* define-isa::
-+* define-cpu::
-+* define-mach::
-+@end menu
-+
-+@node define-arch
-+@subsection define-arch
-+@cindex define-arch
-+
-+@code{define-arch} describes the overall architecture, and must be
-+present.
-+
-+The syntax of @code{define-arch} is:
-+
-+@example
-+(define-arch
-+ (name architecture-name) ; e.g. m32r
-+ (comment "description") ; e.g. "Mitsubishi M32R"
-+ (attrs attribute-list)
-+ (default-alignment aligned|unaligned|forced)
-+ (insn-lsb0? #f|#t)
-+ (machs mach-name-list)
-+ (isas isa-name-list)
-+)
-+@end example
-+
-+@subsubsection default-alignment
-+
-+Specify the default alignment to use when fetching data (and
-+instructions) from memory. At present this can't be overridden, but
-+support can be added if necessary. The default is @code{aligned}.
-+
-+@subsubsection insn-lsb0?
-+@cindex insn-lsb0?
-+
-+Specifies whether the most significant or least significant bit in a
-+word is bit number 0. Generally this should conform to the convention
-+in the architecture manual. This is independent of endianness and is an
-+architecture wide specification. There is no support for using
-+different bit numbering conventions within an architecture.
-+@c Not that such support can't be added of course.
-+
-+Instruction fields are always numbered beginning with the most
-+significant bit. That is, the `start' of a field is always its most
-+significant bit. For example, a 4 bit field in the uppermost bits of a
-+32 bit instruction would have a start/length of (31 4) when insn-lsb0? =
-+@code{#t}, and (0 4) when insn-lsb0? = @code{#f}.
-+
-+@subsubsection mach-name-list
-+
-+The list of names of machines in the architecture.
-+There should be one entry for each @code{define-mach}.
-+
-+@subsubsection isa-name-list
-+
-+The list of names of instruction sets in the architecture.
-+There must be one for each @code{define-isa}.
-+An example of an architecture with more than one is the ARM which
-+has a 32 bit instruction set and a 16 bit "Thumb" instruction set
-+(the sizes here refer to instruction size).
-+
-+@node define-isa
-+@subsection define-isa
-+@cindex define-isa
-+
-+@code{define-isa} describes aspects of the instruction set.
-+A minimum of one ISA must be defined.
-+
-+The syntax of @code{define-isa} is:
-+
-+@example
-+(define-isa
-+ (name isa-name)
-+ (comment "description")
-+ (attrs attribute-list)
-+ (default-insn-word-bitsize n)
-+ (default-insn-bitsize n)
-+ (base-insn-bitsize n)
-+ ; (decode-assist (b0 b1 b2 ...)) ; generally unnecessary
-+ (liw-insns n)
-+ (parallel-insns n)
-+ (condition ifield-name expr)
-+ (setup-semantics expr)
-+ ; (decode-splits decode-split-list) ; support temporarily disabled
-+ ; ??? missing here are fetch/execute specs
-+)
-+@end example
-+
-+@subsubsection default-insn-word-bitsize
-+
-+Specifies the default size of an instruction word in bits.
-+This affects the numbering of field bits in words beyond the
-+base instruction.
-+@xref{Instruction fields}, for more information.
-+
-+??? There is currently no explicit way to specify a different instruction
-+word bitsize for particular instructions, it is derived from the instruction
-+field specs.
-+
-+@subsubsection default-insn-bitsize
-+
-+The default size of an instruction in bits. It is generally the size of
-+the smallest instruction. It is used when parsing instruction fields.
-+It is also used by the disassembler to know how many bytes to skip for
-+unrecognized instructions.
-+
-+@subsubsection base-insn-bitsize
-+
-+The minimum size of an instruction, in bits, to fetch during execution.
-+If the architecture has a variable length instruction set, this is the
-+size of the initial word to fetch. There is no need to specify the
-+maximum length of an instruction, that can be computed from the
-+instructions. Examples:
-+
-+@table @asis
-+@item i386
-+8
-+@item M68k
-+16
-+@item SPARC
-+32
-+@item M32R
-+32
-+@end table
-+
-+The M32R case is interesting because instructions can be 16 or 32 bits.
-+However instructions on 32 bit boundaries can always be fetched 32 bits
-+at a time as 16 bit instructions always come in pairs.
-+
-+@subsubsection decode-assist
-+@cindex decode-assist
-+
-+Override CGEN's heuristics about which bits to initially use to decode
-+instructions in a simulator. For example on the SPARC these are bits:
-+31 30 24 23 22 21 20 19. The entire decoder can be machine generated,
-+so this field is entirely optional. Since the heuristics are quite
-+good, you should only use this field if you have evidence that you
-+can pick a better set, in which case the CGEN developers would like to
-+hear from you!
-+
-+??? It might be useful to provide greater control, but this is sufficient
-+for now.
-+
-+It is okay if the opcode bits are over-specified for some instructions.
-+It is also okay if the opcode bits are under-specified for some instructions.
-+The machine generated decoder will properly handle both these situations.
-+Just pick a useful number of bits that distinguishes most instructions.
-+It is usually best to not pick more than 8 bits to keep the size of the
-+initial decode table down.
-+
-+Bit numbering is defined by the @code{insn-lsb0?} field.
-+
-+@subsubsection liw-insns
-+@cindex liw-insns
-+
-+The number of instructions the CPU always fetches at once. This is
-+intended for architectures like the M32R, and does not refer to a CPU's
-+ability to pre-fetch instructions. The default is 1.
-+
-+@subsubsection parallel-insns
-+@cindex parallel-insns
-+
-+The maximum number of instructions the CPU can execute in parallel. The
-+default is 1.
-+
-+??? Rename this to @code{max-parallel-insns}?
-+
-+@subsubsection condition
-+
-+Some architectures like ARM and ARC conditionally execute every instruction
-+based on the condition specified by one instruction field.
-+The @code{condition} spec exists to support these architectures.
-+@code{ifield-name} is the name of the instruction field denoting the
-+condition and @code{expression} is an RTL expressions that returns
-+the value of the condition (false=zero, true=non-zero).
-+
-+@subsubsection setup-semantics
-+
-+Specify a statement to be performed prior to executing particular instructions.
-+This is used, for example, on the ARM where the value of the program counter
-+(general register 15) is a function of the instruction (it is either
-+pc+8 or pc+12, depending on the instruction).
-+
-+@subsubsection decode-splits
-+
-+Specify a list of field names and values to split instructions up by.
-+This is used, for example, on the ARM where the behavior of some instructions
-+is quite different when the destination register is r15 (the pc).
-+
-+The syntax is:
-+
-+@example
-+(decode-splits
-+ (ifield1-name
-+ constraints
-+ ((split1-name (value1 value2 ...)) (split2-name ...)))
-+ (ifield2-name
-+ ...)
-+)
-+@end example
-+
-+@code{constraints} is work-in-progress and should be @code{()} for now.
-+
-+One copy of each instruction satisfying @code{constraint} is made
-+for each specified split. The semantics of each copy are then
-+simplified based on the known values of the specified instruction field.
-+
-+@node define-cpu
-+@subsection define-cpu
-+@cindex define-cpu
-+
-+@code{define-cpu} defines a ``CPU family'' which is a programmer
-+specified collection of related machines. What constitutes a family is
-+work-in-progress however it is intended to distinguish things like
-+sparc32 vs sparc64. Machines in a family are sufficiently similar that
-+the simulator semantic code can handle any differences at run time. At
-+least that's the current idea. A minimum of one CPU family must be
-+defined.
-+@footnote{FIXME: Using "cpu" in "cpu-family" here is confusing.
-+Need a better name. Maybe just "family"?}
-+
-+The syntax of @code{define-cpu} is:
-+
-+@example
-+(define-cpu
-+ (name cpu-name)
-+ (comment "description")
-+ (attrs attribute-list)
-+ (endian big|little|either)
-+ (insn-endian big|little|either)
-+ (data-endian big|little|either)
-+ (float-endian big|little|either)
-+ (word-bitsize n)
-+ (insn-chunk-bitsize n)
-+ (parallel-insns n)
-+ (file-transform transformation)
-+)
-+@end example
-+
-+@subsubsection endian
-+
-+The endianness of the architecture is one of three values: @code{big},
-+@code{little} and @code{either}.
-+
-+An architecture may have multiple endiannesses, including one for each
-+of: instructions, integers, and floats (not that that's intended to be the
-+complete list). These are specified with @code{insn-endian},
-+@code{data-endian}, and @code{float-endian} respectively.
-+
-+Possible values for @code{insn-endian} are: @code{big}, @code{little},
-+and @code{either}. If missing, the value is taken from @code{endian}.
-+
-+Possible values for @code{data-endian} and @code{float-endian} are: @code{big},
-+@code{big-words}, @code{little}, @code{little-words} and @code{either}.
-+If @code{big-words} then each word is little-endian.
-+If @code{little-words} then each word is big-endian.
-+If missing, the value is taken from @code{endian}.
-+
-+??? Support for these is work-in-progress. All forms are recognized
-+by the @file{.cpu} file reader, but not all are supported internally.
-+
-+@subsubsection word-bitsize
-+
-+The number of bits in a word. In GCC, this is @code{BITS_PER_WORD}.
-+
-+@subsubsection insn-chunk-bitsize
-+
-+The number of bits in an instruction word chunk, for purposes of
-+per-chunk endianness conversion. The default is zero, meaning
-+no chunking is required.
-+
-+@subsubsection parallel-insns
-+
-+This is the same as the @code{parallel-insns} spec of @code{define-isa}.
-+It allows a CPU family to override the value.
-+
-+@subsubsection file-transform
-+
-+Specify the file name transformation of generated code.
-+
-+Each generated file has a named related to the ISA or CPU family.
-+Sometimes generated code needs to know the name of another generated
-+file (e.g. #include's).
-+At present @code{file-transform} specifies the suffix.
-+
-+For example, M32R/x generated files have an `x' suffix, as in @file{cpux.h}
-+for the @file{cpu.h} header. This is indicated with
-+@code{(file-transform "x")}.
-+
-+??? Ideally generated code wouldn't need to know anything about file names.
-+This breaks down for #include's. It can be fixed with symlinks or other
-+means.
-+
-+@node define-mach
-+@subsection define-mach
-+@cindex define-mach
-+
-+@code{define-mach} defines a distinct variant of a CPU. It currently
-+has a one-to-one correspondence with BFD's "mach number". A minimum of
-+one mach must be defined.
-+
-+The syntax of @code{define-mach} is:
-+
-+@example
-+(define-mach
-+ (name mach-name)
-+ (comment "description")
-+ (attrs attribute-list)
-+ (cpu cpu-family-name)
-+ (bfd-name "bfd-name")
-+ (isas isa-name-list)
-+)
-+@end example
-+
-+@subsubsection bfd-name
-+@cindex bfd-name
-+
-+The name of the mach as used by BFD. If not specified the name of the
-+mach is used.
-+
-+@subsubsection isas
-+
-+List of names of ISA's the machine supports.
-+
-+@node Model variants
-+@section Model Variants
-+
-+For each `machine', as defined here, there is one or more `models'.
-+There must be at least one model for each machine.
-+(*note: There could be a default, but requiring one doesn't involve that much
-+extra typing and forces the programmer to at least think about such things.)
-+
-+@example
-+(define-model
-+ (name model-name)
-+ (comment "description")
-+ (attrs attribute-list)
-+ (mach machine-name)
-+ (state (variable-name-1 variable-mode-1) ...)
-+ (unit name "comment" (attributes)
-+ issue done state inputs outputs profile)
-+)
-+@end example
-+
-+@subsection mach
-+
-+The name of the machine the model is an implementation of.
-+
-+@subsection state
-+
-+A list of variable-name/mode pairs for recording global function unit
-+state. For example on the M32R the value is @code{(state (h-gr UINT))}
-+and is a bitmask of which register(s) are the targets of loads and thus
-+subject to load stalls.
-+
-+@subsection unit
-+
-+Specifies a function unit. Any number of function units may be specified.
-+The @code{u-exec} unit must be specified as it is the default.
-+
-+The syntax is:
-+
-+@example
-+ (unit name "comment" (attributes)
-+ issue done state inputs outputs profile)
-+@end example
-+
-+@samp{issue} is the number of operations that may be in progress.
-+It originates from GCC function unit specification. In general the
-+value should be 1.
-+
-+@samp{done} is the latency of the unit. The value is the number of cycles
-+until the result is ready.
-+
-+@samp{state} has the same syntax as the global model `state' and is a list of
-+variable-name/mode pairs.
-+
-+@samp{inputs} is a list of inputs to the function unit.
-+Each element is @code{(operand-name mode default-value)}.
-+
-+@samp{outputs} is a list of outputs of the function unit.
-+Each element is @code{(operand-name mode default-value)}.
-+
-+@samp{profile} is an rtl-code sequence that performs function unit
-+modeling. At present the only possible value is @code{()} meaning
-+invoke a user supplied function named @code{<cpu>_model_<mach>_<unit>}.
-+
-+The current function unit specification is a first pass in order to
-+achieve something that moderately works for the intended purpose (cycle
-+counting on the simulator). Something more elaborate is on the todo list
-+but there is currently no schedule for it. The new specification must
-+try to be application independent. Some known applications are:
-+cycle counting in the simulator, code scheduling in a compiler, and code
-+scheduling in a JIT simulator (where speed of analysis can be more
-+important than getting an optimum schedule).
-+
-+The inputs/outputs fields are how elements in the semantic code are mapped
-+to function units. Each input and output has a name that corresponds
-+with the name of the operand in the semantics. Where there is no
-+correspondence, a mapping can be made in the unit specification of the
-+instruction (see the subsection titled ``Timing'').
-+
-+Another way to achieve the correspondence is to create separate function
-+units that contain the desired input/output names. For example on the
-+M32R the u-exec unit is defined as:
-+
-+@example
-+(unit u-exec "Execution Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((sr INT -1) (sr2 INT -1)) ; inputs
-+ ((dr INT -1)) ; outputs
-+ () ; profile action (default)
-+)
-+@end example
-+
-+This handles instructions that use sr, sr2 and dr as operands. A second
-+function unit called @samp{u-cmp} is defined as:
-+
-+@example
-+(unit u-cmp "Compare Unit" ()
-+ 1 1 ; issue done
-+ () ; state
-+ ((src1 INT -1) (src2 INT -1)) ; inputs
-+ () ; outputs
-+ () ; profile action (default)
-+)
-+@end example
-+
-+This handles instructions that use src1 and src2 as operands. The
-+organization of units is arbitrary. On the M32R, src1/src2 instructions
-+are typically compare instructions so a separate function unit was
-+created for them. Current limitations require that each hardware item
-+behind the operands must be marked with the attribute @code{PROFILE} and
-+the hardware item must not be scalar.
-+
-+@node Hardware elements
-+@section Hardware Elements
-+
-+The elements of hardware that make up a CPU are defined with
-+@code{define-hardware}. Examples of hardware elements include
-+registers, condition bits, immediate constants and memory.
-+
-+Instruction fields that provide numerical values (``immediate
-+constants'') aren't really elements of the hardware, but it simplifies
-+things to think of them this way. Think of them as @emph{constant
-+generators}@footnote{A term borrowed from the book on the Bulldog
-+compiler and perhaps other sources.}.
-+
-+Hardware elements are defined with:
-+
-+@example
-+(define-hardware
-+ (name hardware-name)
-+ (comment "description")
-+ (attrs attribute-list)
-+ (semantic-name hardware-semantic-name)
-+ (type type-name type-arg1 type-arg2 ...)
-+ (indices index-type index-arg1 index-arg2 ...)
-+ (values values-type values-arg1 values-arg2 ...)
-+ (handlers handler1 handler2 ...)
-+ (get (args) (expression))
-+ (set (args) (expression))
-+)
-+@end example
-+
-+The only required members are @samp{name} and @samp{type}. Convention
-+requires @samp{hardware-name} begin with @samp{h-}.
-+
-+@subsection attrs
-+
-+List of attributes. There are several predefined hardware attributes:
-+
-+@itemize @minus
-+@item MACH
-+
-+A bitset attribute used to specify which machines have this hardware element.
-+Do not specify the MACH attribute if the value is "all machs".
-+
-+Usage: @code{(MACH mach1,mach2,...)}
-+There must be no spaces in ``@code{mach1,mach2,...}''.
-+
-+@item CACHE-ADDR
-+
-+A hint to the simulator semantic code generator to tell it it can record the
-+address of a selected register in an array of registers. This speeds up
-+simulation by moving the array computation to extraction time.
-+This attribute is only useful to register arrays and cannot be specified
-+with @code{VIRTUAL} (??? revisit).
-+
-+@item PROFILE
-+
-+This attribute must be present for hardware elements to which references
-+are profiled. Beware, this is work-in-progress. If you use this
-+attribute it is likely you have to hack CGEN. (Please submit patches.)
-+
-+@item VIRTUAL
-+
-+The hardware element doesn't require any storage.
-+This is used when you want a value that is derived from some other value.
-+If @code{VIRTUAL} is specified, @code{get} and @code{set} specs must be
-+provided.
-+@end itemize
-+
-+@subsection type
-+
-+This is the type of hardware. Current values are: @samp{register},
-+@samp{memory}, and @samp{immediate}.
-+
-+For registers the syntax is one of:
-+
-+@example
-+@code{(register mode [(number)])}
-+@code{(register (mode bits) [(number)])}
-+@end example
-+
-+where @samp{(number)} is the number of registers and is optional. If
-+omitted, the default is @samp{(1)}.
-+The second form is useful for describing registers with an odd (as in
-+unusual) number of bits.
-+@code{mode} for the second form must be one of @samp{INT} or @samp{UINT}.
-+Since these two modes don't have an implicit size, they cannot be used for
-+the first form.
-+
-+@c ??? Might wish to remove the mode here and just specify number of bits.
-+
-+For memory the syntax is:
-+
-+@example
-+@code{(memory mode (size))}
-+@end example
-+
-+where @samp{(size)} is the size of the memory in @samp{mode} units.
-+In general @samp{mode} should be @code{QI}.
-+
-+For immediates the syntax is one of
-+
-+@example
-+@code{(immediate mode)}
-+@code{(immediate (mode bits))}
-+@end example
-+
-+The second form is for values for which a mode of that size doesn't exist.
-+@samp{mode} for the second form must be one of @code{INT} or @code{UINT}.
-+Since these two modes don't have an implicit size, they cannot be used
-+for the first form.
-+
-+??? There's no real reason why a mode like SI can't be used
-+for odd-sized immediate values. The @samp{bits} field indicates the size
-+and the @samp{mode} field indicates the mode in which the value will be used,
-+as well as its signedness. This would allow removing INT/UINT for this
-+purpose. On the other hand, a non-width specific mode allows applications
-+to choose one (a simulator might prefer to store immediates in an `int'
-+rather than, say, char if the specified mode was @code{QI}).
-+
-+@subsection indices
-+
-+Specify names for individual elements with the @code{indices} spec.
-+It is only valid for registers with more than one element.
-+
-+The syntax is:
-+
-+@example
-+@code{(indices index-type arg1 arg2 ...)}
-+@end example
-+
-+where @samp{index-type} specifies the kind of index and @samp{arg1 arg2 ...}
-+are arguments to @samp{index-type}.
-+
-+The are two supported values for @samp{index-type}: @code{keyword}
-+and @code{extern-keyword}. The difference is that indices defined with
-+@code{keyword} are kept internal to the hardware element's definition
-+and are not usable elsewhere, whereas @code{extern-keyword} specifies
-+a set of indices defined elsewhere.
-+
-+@subsubsection keyword
-+
-+@example
-+@code{(indices keyword "prefix" ((name1 value1) (name2 value2) ...))}
-+@end example
-+
-+@samp{prefix} is the common prefix for each of the index names.
-+For example, SPARC registers usually begin with @samp{"%"}.
-+
-+Each @samp{(name value)} pair maps a name with an index number.
-+An index can be specified multiple times, for example, when a register
-+has multiple names.
-+
-+Example from Thumb:
-+
-+@example
-+(define-hardware
-+ (name h-gr-t)
-+ (comment "Thumb's general purpose registers")
-+ (attrs (ISA thumb) VIRTUAL) ; ??? CACHE-ADDR should be doable
-+ (type register WI (8))
-+ (indices keyword ""
-+ ((r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)))
-+ (get (regno) (reg h-gr regno))
-+ (set (regno newval) (set (reg h-gr regno) newval))
-+)
-+@end example
-+
-+@subsubsection extern-keyword
-+
-+@example
-+@code{(indices extern-keyword keyword-name)}
-+@end example
-+
-+Example from M32R:
-+
-+@example
-+(define-keyword
-+ (name gr-names)
-+ (print-name h-gr)
-+ (prefix "")
-+ (values (fp 13) (lr 14) (sp 15)
-+ (r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7)
-+ (r8 8) (r9 9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14) (r15 15))
-+)
-+
-+(define-hardware
-+ (name h-gr)
-+ (comment "general registers")
-+ (attrs PROFILE CACHE-ADDR)
-+ (type register WI (16))
-+ (indices extern-keyword gr-names)
-+)
-+@end example
-+
-+@subsection values
-+
-+Specify a list of valid values with the @code{values} spec.
-+@c Clumsy wording.
-+
-+The syntax is identical to the syntax for @code{indices}.
-+It is only valid for immediates.
-+
-+Example from sparc64:
-+
-+@example
-+(define-hardware
-+ (name h-p)
-+ (comment "prediction bit")
-+ (attrs (MACH64))
-+ (type immediate (UINT 1))
-+ (values keyword "" (("" 0) (",pf" 0) (",pt" 1)))
-+)
-+@end example
-+
-+@subsection handlers
-+
-+The @code{handlers} spec is an escape hatch for indicating when a
-+programmer supplied routine must be called to perform a function.
-+
-+The syntax is:
-+
-+@example
-+@samp{(handlers (handler-name1 "function_name1")
-+ (handler-name2 "function_name2")
-+ ...)}
-+@end example
-+
-+@samp{handler-name} must be one of @code{parse} or @code{print}.
-+How @samp{function_name} is used is application specific, but in
-+general it is the name of a function to call. The only application
-+that uses this at present is Opcodes. See the Opcodes documentation for
-+a description of each function's expected prototype.
-+
-+@subsection get
-+
-+Specify special processing to be performed when a value is read
-+with the @code{get} spec.
-+
-+The syntax for scalar registers is:
-+
-+@example
-+@samp{(get () (expression))}
-+@end example
-+
-+The syntax for vector registers is:
-+
-+@example
-+@samp{(get (index) (expression))}
-+@end example
-+
-+@code{expression} is an RTL expression that computes the value to return.
-+The mode of the result must be the mode of the register.
-+
-+@code{index} is the name of the index as it appears in @code{expression}.
-+
-+At present, @code{sequence}, @code{parallel}, and @code{case} expressions
-+are not allowed here.
-+
-+@subsection set
-+
-+Specify special processing to be performed when a value is written
-+with the @code{set} spec.
-+
-+The syntax for scalar registers is:
-+
-+@example
-+@samp{(set (newval) (expression))}
-+@end example
-+
-+The syntax for vector registers is:
-+
-+@example
-+@samp{(set (index newval) (expression))}
-+@end example
-+
-+@code{expression} is an RTL expression that stores @code{newval}
-+in the register. This may involve storing values in other registers as well.
-+@code{expression} must be one of @code{set}, @code{if}, @code{sequence}, or
-+@code{case}.
-+
-+@code{index} is the name of the index as it appears in @code{expression}.
-+
-+@subsection Predefined hardware elements
-+
-+Several hardware types are predefined:
-+
-+@table @code
-+@item h-uint
-+unsigned integer
-+@item h-sint
-+signed integer
-+@item h-memory
-+main memory, where ``main'' is loosely defined
-+@item h-addr
-+data address (data only)
-+@item h-iaddr
-+instruction address (instructions only)
-+@end table
-+
-+@subsection Program counter
-+
-+The program counter must be defined and is not a builtin.
-+If get/set specs are not required, define it as:
-+
-+@example
-+(dnh h-pc "program counter" (PC) (pc) () () ())
-+@end example
-+
-+If get/set specs are required, define it as:
-+
-+@example
-+(define-hardware
-+ (name h-pc)
-+ (comment "<ARCH> program counter")
-+ (attrs PC)
-+ (type pc)
-+ (get () <insert get code here>)
-+ (set (newval) <insert set code here>)
-+)
-+@end example
-+
-+If the architecture has multiple instruction sets, all must be specified.
-+If they're not, the default is the first one which is not what you want.
-+Here's an example from @file{arm.cpu}:
-+
-+@example
-+(define-hardware
-+ (name h-pc)
-+ (comment "ARM program counter (h-gr reg 15)")
-+ (attrs PC (ISA arm,thumb))
-+ (type pc)
-+ (set (newval)
-+ (if (reg h-tbit)
-+ (set (raw-reg SI h-pc) (and newval -2))
-+ (set (raw-reg SI h-pc) (and newval -4))))
-+)
-+@end example
-+
-+@subsection Simplification macros
-+
-+To simplify @file{.cpu} files, the @code{dnh}
-+(@code{define-normal-hardware}) macro exists that takes a fixed set of
-+positional arguments for the typical hardware element. The syntax of
-+@code{dnh} is:
-+
-+@code{(dnh name comment attributes type indices values handlers)}
-+
-+Example:
-+
-+@example
-+(dnh h-gr "general registers"
-+ () ; attributes
-+ (register WI (16))
-+ (keyword "" ((fp 13) (sp 15) (lr 14)
-+ (r0 0) (r1 1) (r2 2) (r3 3)
-+ (r4 4) (r5 5) (r6 6) (r7 7)
-+ (r8 8) (r9 9) (r10 10) (r11 11)
-+ (r12 12) (r13 13) (r14 14) (r15 15)))
-+ () ()
-+)
-+@end example
-+
-+This defines an array of 16 registers of mode @code{WI} ("word int").
-+The names of the registers are @code{r0...r15}, and registers 13, 14 and
-+15 also have the names @code{fp}, @code{lr} and @code{sp} respectively.
-+
-+Scalar registers with no special requirements occur frequently.
-+Macro @code{dsh} (@code{define-simple-hardware}) is identical to
-+@code{dnh} except does not include the @code{indices}, @code{values},
-+or @code{handlers} specs.
-+
-+@example
-+(dsh h-ibit "interrupt enable bit" () (register BI))
-+@end example
-+
-+@node Instruction fields
-+@section Instruction Fields
-+@cindex Fields, instruction
-+
-+Instruction fields define the raw bitfields of each instruction.
-+Minimal semantic meaning is attributed to them. Support is provided for
-+mapping to and from the raw bit pattern and the usable contents, and
-+other simple manipulations.
-+
-+The syntax for defining instruction fields is:
-+
-+@example
-+(define-ifield
-+ (name field-name)
-+ (comment "description")
-+ (attrs attribute-list)
-+ (word-offset word-offset-in-bits)
-+ (word-length word-length-in-bits)
-+ (start starting-bit-number)
-+ (length number-of-bits)
-+ (follows ifield-name)
-+ (mode mode-name)
-+ (encode (value pc) (rtx to describe encoding))
-+ (decode (value pc) (rtx to describe decoding))
-+)
-+@end example
-+
-+(*note: Whether to also provide a way to specify instruction formats is not yet
-+clear. Currently they are computed from the instructions, so there's no
-+current *need* to provided them. However, providing the ability as an
-+option may simplify other tools CGEN is used to generate. This
-+simplification would come in the form of giving known names to the formats
-+which CPU reference manuals often do. Pre-specified instruction formats
-+may also simplify expression of more complicated instruction sets.
-+Providing instruction formats may also simplify the support of really
-+complex ISAs like i386 and m68k).
-+
-+(*note: Positional specification simplifies instruction description somewhat
-+in that there is no required order of fields, and a disjunct set of fields can
-+be referred to as one. On the other hand it can require knowledge of the length
-+of the instruction which is inappropriate in cases like the M32R where
-+the main fields have the same name and "position" regardless of the length
-+of the instruction. Moving positional specification into instruction formats,
-+whether machine generated or programmer specified, may be done.)
-+
-+Convention requires @samp{field-name} begin with @samp{f-}.
-+
-+@subsection attrs
-+
-+There are several predefined instruction field attributes:
-+
-+@table @code
-+@item PCREL-ADDR
-+The field contains a PC relative address. Various CPUs have various
-+offsets from the PC from which the address is calculated. This is
-+specified in the encode and decode sections.
-+
-+@item ABS-ADDR
-+The field contains an absolute address.
-+
-+@item SIGN-OPT
-+The field has an optional sign. It is sign-extended during
-+extraction. Allowable values are -2^(n-1) to (2^n)-1.
-+
-+@item RESERVED
-+The field is marked as ``reserved'' by the architecture.
-+This is an informational attribute. Tools may use it
-+to validate programs, either statically or dynamically.
-+
-+@item VIRTUAL
-+The field does not directly contribute to the instruction's value. This
-+is used to simplify semantic or assembler descriptions where a fields
-+value is based on other values. Multi-ifields are always virtual.
-+@end table
-+
-+@subsection word-offset
-+The offset in bits from the start of the instruction to the word containing
-+the field.
-+
-+NOTE: Either both of @samp{word-offset} and @samp{word-length} must be
-+specified or neither of them must be specified. The presence of
-+@samp{word-offset} means the long form of specifying the field's position is
-+being used. If absent then the short form is being used and the value for
-+@samp{word-offset} is encoded in @samp{start}.
-+
-+@subsection word-length
-+The length in bits of the word containing the field.
-+
-+@subsection start
-+The bit number of the field's most significant bit in the instruction.
-+Bit numbering is determined by the @code{insn-lsb0?} field of
-+@code{define-arch}.
-+
-+NOTE: If using the long form of specifying the field's position
-+(@samp{word-offset} is present) then this value is the value within
-+the containing word. If using the short form then this value includes
-+the word offset. See the Porting document for more info
-+(@pxref{Writing define-ifield}).
-+
-+@subsection length
-+The number of bits in the field. The field must be contiguous. For
-+non-contiguous instruction fields use "multi-ifields"
-+(@pxref{Instruction fields}).
-+
-+@subsection follows
-+Optional. Experimental.
-+This should not be used for the specification of RISC-like architectures.
-+It is an experiment in supporting CISC-like architectures.
-+The argument is the name of the ifield or operand that immediately precedes
-+this one. In general the argument is an "anyof" operand. The @code{follows}
-+spec allows subsequent ifields to ``float''.
-+
-+@subsection mode
-+The mode the value is to be interpreted in.
-+Usually this is @code{INT} or @code{UINT}.
-+
-+@c ??? There's no real reason why modes like SI can't be used here.
-+The @samp{length} field specifies the number of bits in the field,
-+and the @samp{mode} field indicates the mode in which the value will be used,
-+as well as its signedness. This would allow removing INT/UINT for this
-+purpose. On the other hand, a non-width specific mode allows applications
-+to choose one (a simulator might prefer to store immediates in an `int'
-+rather than, say, char if the specified mode was @code{QI}).
-+
-+@subsection encode
-+An expression to apply to convert from usable values to raw field
-+values. The syntax is @code{(encode (value pc) expression)} or more
-+specifically @code{(encode ((<mode1> value) (IAI pc)) <expression>)},
-+where @code{<mode1>} is the mode of the the ``incoming'' value, and
-+@code{<expression>} is an rtx to convert @code{value} to something that
-+can be stored in the field.
-+
-+Example:
-+
-+@example
-+(encode ((SF value) (IAI pc))
-+ (cond WI
-+ ((eq value (const SF 1.0)) (const 0))
-+ ((eq value (const SF 0.5)) (const 1))
-+ ((eq value (const SF -1.0)) (const 2))
-+ ((eq value (const SF 2.0)) (const 3))
-+ (else (error "invalid floating point value for field foo"))))
-+@end example
-+
-+In this example four floating point immediate values are represented in a
-+field of two bits. The above might be expanded to a series of `if' statements
-+or the generator could determine a `switch' statement is more appropriate.
-+
-+@subsection decode
-+
-+An expression to apply to convert from raw field values to usable
-+values. The syntax is @code{(decode (value pc) expression)} or more
-+specifically @code{(decode ((WI value) (IAI pc)) <expression>)}, where
-+@code{<expression>} is an rtx to convert @code{value} to something
-+usable.
-+
-+Example:
-+
-+@example
-+(decode ((WI value) (IAI pc))
-+ (cond SF
-+ ((eq value 0) (const SF 1.0))
-+ ((eq value 1) (const SF 0.5))
-+ ((eq value 2) (const SF -1.0))
-+ ((eq value 3) (const SF 2.0))))
-+@end example
-+
-+There's no need to provide an error case as presumably @code{value}
-+would never have an invalid value, though certainly one could provide an
-+error case if one wanted to.
-+
-+@subsection Non-contiguous fields
-+@cindex Fields, non-contiguous
-+
-+Non-contiguous fields (e.g. sparc64's 16 bit displacement field) are
-+built on top of support for contiguous fields. The syntax for defining
-+such fields is:
-+
-+@example
-+(define-multi-ifield
-+ (name field-name)
-+ (comment "description")
-+ (attrs attribute-list)
-+ (mode mode-name)
-+ (subfields field1-name field2-name ...)
-+ (insert (code to set each subfield))
-+ (extract (code to set field from subfields))
-+)
-+@end example
-+
-+(*note: insert/extract are analogous to encode/decode so maybe these
-+fields are misnamed. The operations are subtly different though.)
-+
-+Example:
-+
-+@example
-+(define-multi-ifield
-+ (name f-i20)
-+ (comment "20 bit unsigned")
-+ (attrs)
-+ (mode UINT)
-+ (subfields f-i20-4 f-i20-16)
-+ (insert (sequence ()
-+ (set (ifield f-i20-4) (srl (ifield f-i20) (const 16)))
-+ (set (ifield f-i20-16) (and (ifield f-i20) (const #xffff)))
-+ ))
-+ (extract (sequence ()
-+ (set (ifield f-i20) (or (sll (ifield f-i20-4) (const 16))
-+ (ifield f-i20-16)))
-+ ))
-+)
-+@end example
-+
-+@subsection subfields
-+The names of the already defined fields that make up the multi-ifield.
-+
-+@subsection insert
-+Code to set the subfields from the multi-ifield. All fields are referred
-+to with @code{(ifield <name>)}.
-+
-+@subsection extract
-+Code to set the multi-ifield from the subfields. All fields are referred
-+to with @code{(ifield <name>)}.
-+
-+@subsection Simplification macros
-+To simplify @file{.cpu} files, the @code{dnf}, @code{df} and @code{dnmf}
-+macros have been created. Each takes a fixed set of positional arguments
-+for the typical instruction field. @code{dnf} is short for
-+@code{define-normal-field}, @code{df} is short for @code{define-field},
-+and @code{dnmf} is short for @code{define-normal-multi-ifield}.
-+
-+The syntax of @code{dnf} is:
-+
-+@code{(dnf name comment attributes start length)}
-+
-+Example:
-+
-+@code{(dnf f-r1 "register r1" () 4 4)}
-+
-+This defines a field called @samp{f-r1} that is an unsigned field of 4
-+bits beginning at bit 4. All fields defined with @code{dnf} are unsigned.
-+
-+The syntax of @code{df} is:
-+
-+@code{(df name comment attributes start length mode encode decode)}
-+
-+Example:
-+
-+@example
-+(df f-disp8
-+ "disp8, slot unknown" (PCREL-ADDR)
-+ 8 8 INT
-+ ((value pc) (sra WI (sub WI value (and WI pc (const -4))) (const 2)))
-+ ((value pc) (add WI (sll WI value (const 2)) (and WI pc (const -4)))))
-+@end example
-+
-+This defines a field called @samp{f-disp8} that is a signed PC-relative
-+address beginning at bit 8 of size 8 bits that is left shifted by 2.
-+
-+The syntax of @code{dnmf} is:
-+
-+@code{(dnmf name comment attributes mode subfields insert extract)}
-+
-+@node Enumerated constants
-+@section Enumerated constants
-+@cindex Enumerated constants
-+@cindex Enumerations
-+
-+Enumerated constants (@emph{enums}) are important enough in instruction
-+set descriptions that they are given special treatment. Enums are
-+defined with:
-+
-+@example
-+(define-enum
-+ (name enum-name)
-+ (comment "description")
-+ (attrs attribute-list)
-+ (prefix prefix)
-+ (values val1 val2 ...)
-+)
-+@end example
-+
-+Enums in opcode fields are further enhanced by specifying the opcode
-+field they are used in. This allows the enum's name to be specified
-+in an instruction's @code{format} entry.
-+
-+@example
-+(define-insn-enum
-+ (name enum-name)
-+ (comment "description")
-+ (attrs (attribute list))
-+ (prefix prefix)
-+ (ifield instruction-field-name)
-+ (values val1 val2 ...)
-+)
-+@end example
-+
-+(*note: @code{define-insn-enum} isn't implemented yet: use
-+@code{define-normal-insn-enum})
-+
-+Example:
-+
-+@example
-+(define-insn-enum
-+ (name insn-op1)
-+ (comment "op1 field values")
-+ (prefix OP1_)
-+ (ifield f-op1)
-+ (values "0" "1" "2" "3" "4" "5" "6" "7"
-+ "8" "9" "10" "11" "12" "13" "14" "15")
-+)
-+@end example
-+
-+@subsection prefix
-+Convention requires each enum value to be prefixed with the same text.
-+Rather than specifying the prefix in each entry, it is specified once, here.
-+Convention requires @samp{prefix} not contain any lowercase characters.
-+
-+@subsection ifield
-+The name of the instruction field that the enum is intended for. This
-+must be a simple ifield, not a multi-ifield.
-+
-+@subsection values
-+A list of possible values. Each element has one of the following forms:
-+
-+@itemize @bullet
-+@item @code{name}
-+@item @code{(name)}
-+@item @code{(name value)}
-+@item @code{(name - (attribute-list))}
-+@item @code{(name value (attribute-list))}
-+@end itemize
-+
-+The syntax for numbers is Scheme's, so hex numbers are @code{#xnnnn}.
-+A value of @code{-} means use the next value (previous value plus 1).
-+
-+Example:
-+
-+@example
-+(values "a" ("b") ("c" #x12)
-+ ("d" - (sanitize foo)) ("e" #x1234 (sanitize bar)))
-+@end example
-+
-+@subsection Simplification macros
-+
-+@code{(define-normal-enum name comment attrs prefix vals)}
-+
-+@code{(define-normal-insn-enum name comment attrs prefix ifield vals)}
-+
-+@node Instruction operands
-+@section Instruction Operands
-+@cindex Operands, instruction
-+
-+Instruction operands provide:
-+
-+@itemize @bullet
-+@item a layer between the assembler and the raw hardware description
-+@item the main means of manipulating instruction fields in the semantic code
-+@c More?
-+@end itemize
-+
-+The syntax is:
-+
-+@example
-+(define-operand
-+ (name operand-name)
-+ (comment "description")
-+ (attrs attribute-list)
-+ (type hardware-element)
-+ (index instruction-field)
-+ (asm asm-spec)
-+)
-+@end example
-+
-+@subsection name
-+
-+This is the name of the operand as a Scheme symbol.
-+The name choice is fairly important as it is used in instruction
-+syntax entries, instruction format entries, and semantic expressions.
-+It can't collide with symbols used in semantic expressions
-+(e.g. @code{and}, @code{set}, etc).
-+
-+The convention is that operands have no prefix (whereas ifields begin
-+with @samp{f-} and hardware elements begin with @samp{h-}). A prefix
-+like @samp{o-} would avoid collisions with other semantic elements, but
-+operands are used often enough that any prefix is a hassle.
-+
-+@subsection attrs
-+
-+A list of attributes. In addition to attributes defined for the operand,
-+an operand inherits the attributes of its instruction field. There are
-+several predefined operand attributes:
-+
-+@table @code
-+@item NEGATIVE
-+The operand contains negative values (not used yet so definition is
-+still nebulous.
-+
-+@item RELAX
-+This operand contains the changeable field (usually a branch address) of
-+a relaxable/relaxed instruction.
-+
-+@item SEM-ONLY
-+Use the SEM-ONLY attribute for cases where the operand will only be used
-+in semantic specification, and not assembly code specification. A
-+typical example is condition codes.
-+@end table
-+
-+To refer to a hardware element in semantic code one must either use an
-+operand or one of reg/mem/const. Operands generally exist to map
-+instruction fields to the selected hardware element and are easier to
-+use in semantic code than referring to the hardware element directly
-+(e.g. @code{sr} is easier to type and read than @code{(reg h-gr
-+<index>)}). Example:
-+
-+@example
-+ (dnop condbit "condition bit" (SEM-ONLY) h-cond f-nil)
-+@end example
-+
-+@code{f-nil} is the value to use when there is no instruction field
-+
-+@c There might be some language cleanup to be done here regarding f-nil.
-+@c It is kind of extraneous.
-+
-+@subsection type
-+The hardware element this operand applies to. This must be the name of a
-+hardware element.
-+
-+@subsection index
-+The index of the hardware element. This is used to mate the hardware
-+element with the instruction field that selects it, and must be the name
-+of an ifield entry. (*note: The index may be other things besides
-+ifields in the future.) It must not be a multi-ifield, currently.
-+
-+@subsection asm
-+Sometimes it's necessary to escape to C to parse assembler, or print
-+a value. This field is an escape hatch to implement this.
-+The current syntax is:
-+
-+@code{(asm asm-spec)}
-+
-+where @code{asm-spec} is one or more of:
-+
-+@code{(parse "function_suffix")} -- a call to function
-+@code{parse_<function_suffix>} is generated.
-+
-+@code{(print "function_suffix")} -- a call to function
-+@code{print_<function_suffix>} is generated.
-+
-+These functions are intended to be provided in a separate @file{.opc}
-+file. The prototype of a parse function depends on the hardware type.
-+See @file{cgen/*.opc} for examples.
-+
-+@c FIXME: The following needs review.
-+
-+For integer it is:
-+
-+@example
-+static const char *
-+parse_foo (CGEN_CPU_DESC cd,
-+ const char **strp,
-+ int opindex,
-+ unsigned long *valuep);
-+@end example
-+
-+@code{cd} is the result of @code{<arch>_cgen_cpu_open}.
-+@code{strp} is a pointer to a pointer to the assembler and is updated by
-+the function.
-+@c FIXME
-+@code{opindex} is ???.
-+@code{valuep} is a pointer to where to record the parsed value.
-+@c FIXME
-+If a relocation is needed, it is queued with a call to ???. Queued
-+relocations are processed after the instruction has been parsed.
-+
-+The result is an error message or NULL if successful.
-+
-+The prototype of a print function depends on the hardware type. See
-+@file{cgen/*.opc} for examples. For integers it is:
-+
-+@example
-+void print_foo (CGEN_CPU_DESC cd,
-+ PTR dis_info,
-+ long value,
-+ unsigned int attrs,
-+ bfd_vma pc,
-+ int length);
-+@end example
-+
-+@samp{cd} is the result of @code{<arch>_cgen_cpu_open}.
-+@samp{ptr} is the `info' argument to print_insn_<arch>.
-+@samp{value} is the value to be printed.
-+@samp{attrs} is the set of boolean attributes.
-+@samp{pc} is the PC value of the instruction.
-+@samp{length} is the length of the instruction.
-+
-+Actual printing is done by calling @code{((disassemble_info *)
-+dis_info)->fprintf_func}.
-+
-+@node Derived operands
-+@section Derived Operands
-+@cindex Derived operands
-+@cindex Operands, instruction
-+@cindex Operands, derived
-+
-+Derived operands are an experiment in supporting the addressing modes of
-+CISC-like architectures. Addressing modes are difficult to support as
-+they essentially increase the number of instructions in the architecture
-+by an order of magnitude. Defining all the variants requires something
-+in addition to the RISC-like architecture support. The theory is that
-+since CISC-like instructions are basically "normal" instructions with
-+complex operands the place to add the necessary support is in the
-+operands.
-+
-+Two kinds of operands exist to support CISC-like cpus, and they work
-+together. "derived-operands" describe one variant of a complex
-+argument, and "anyof" operands group them together.
-+
-+The syntax for defining derived operands is:
-+
-+@example
-+(define-derived-operand
-+ (name operand-name)
-+ (comment "description")
-+ (attrs attribute-list)
-+ (mode mode-name)
-+ (args arg1-operand-name arg2-operand-name ...)
-+ (syntax "syntax")
-+ (base-ifield ifield-name)
-+ (encoding (+ arg1-operand-name arg2-operand-name ...))
-+ (ifield-assertion expression)
-+ (getter expression)
-+ (setter expression)
-+)
-+@end example
-+
-+@cindex anyof operands
-+@cindex Operands, anyof
-+
-+The syntax for defining anyof operands is:
-+
-+@example
-+(define-anyof-operand
-+ (name operand-name)
-+ (comment "description")
-+ (attrs attribute-list)
-+ (mode mode-name)
-+ (base-ifield ifield-name)
-+ (choices derived-operand1-name derived-operand2-name ...)
-+)
-+@end example
-+
-+@subsection mode
-+
-+The name of the mode of the operand.
-+
-+@subsection args
-+
-+List of names of operands the derived operand uses.
-+The operands must already be defined.
-+The argument operands can be any kind of operand: normal, derived, anyof.
-+
-+@subsection syntax
-+
-+Assembler syntax of the operand.
-+
-+??? This part needs more work. Addressing mode specification in assembler
-+needn't be localized to the vicinity of the operand.
-+
-+@subsection base-ifield
-+
-+The name of the instruction field common to all related derived operands.
-+Here related means "used by the same `anyof' operand".
-+
-+@subsection encoding
-+
-+The machine encoding of the operand.
-+
-+@subsection ifield-assertion
-+
-+An assertion of what values any instruction fields will or will not have
-+in the containing instruction.
-+
-+??? A better name for this might be "constraint".
-+
-+@subsection getter
-+
-+RTL expression to get the value of the operand.
-+All operands refered to must be specified in @code{args}.
-+
-+@subsection setter
-+
-+RTL expression to set the value of the operand.
-+All operands refered to must be specified in @code{args}.
-+Use @code{newval} to refer to the value to be set.
-+
-+@subsection choices
-+
-+For anyof operands, the names of the derived operands.
-+The operand may be "any of" the specified choices.
-+
-+@node Instructions
-+@section Instructions
-+@cindex Instructions
-+
-+Each instruction in the instruction set has an entry in the description
-+file. For complicated instruction sets this is a lot of typing. However,
-+macros can reduce a lot of that typing. The real question is given the
-+amount of information that must be expressed, how succinct can one express
-+it and still be clean and usable? I'm open to opinions on how to improve
-+this, but such improvements must take everything CGEN wishes to be into
-+account.
-+(*note: Of course no claim is made that the current design is the
-+be-all and end-all or that there is one be-all and end-all.)
-+
-+The syntax for defining an instruction is:
-+
-+@example
-+(define-insn
-+ (name insn-name)
-+ (comment "description")
-+ (attrs attribute-list)
-+ (syntax "assembler syntax")
-+ (format (+ field-list))
-+ (semantics (semantic-expression))
-+ (timing timing-data)
-+)
-+@end example
-+
-+Instructions specific to a particular cpu variant are denoted as such with
-+the MACH attribute.
-+
-+Possible additions for the future:
-+
-+@itemize @bullet
-+@item a field to describe a final constraint for determining a match
-+@item choosing the output from a set of choices
-+@end itemize
-+
-+@subsection attrs
-+
-+A list of attributes, for which there are several predefined instruction
-+attributes:
-+
-+@table @code
-+@item MACH
-+A bitset attribute used to specify which machines have this hardware
-+element. Do not specify the MACH attribute if the value is for all
-+machines.
-+
-+Usage: @code{(MACH mach1,mach2,...)}
-+
-+There must be no spaces in ``@code{mach1,mach2,...}''.
-+
-+@item UNCOND-CTI
-+The instruction is an unconditional ``control transfer instruction''.
-+
-+(*note: This attribute is derived from the semantic code. However if the
-+computed value is wrong (dunno if it ever will be) the value can be
-+overridden by explicitly mentioning it.)
-+
-+@item COND-CTI
-+The instruction is an conditional "control transfer instruction".
-+
-+(*note: This attribute is derived from the semantic code. However if the
-+computed value is wrong (dunno if it ever will be) the value can be
-+overridden by explicitly mentioning it.)
-+
-+@item SKIP-CTI
-+The instruction can cause one or more insns to be skipped. This is
-+derived from the semantic code.
-+
-+@item DELAY-SLOT
-+The instruction has one or more delay slots. This is derived from the
-+semantic code.
-+
-+@item RELAXABLE
-+The instruction has one or more identical variants. The assembler tries
-+this one first and then the relaxation phases switches to larger ones as
-+necessary.
-+
-+@item RELAXED
-+The instruction is a non-minimal variant of a relaxable instruction. It
-+is avoided by the assembler in the first pass.
-+
-+@item ALIAS
-+Internal attribute set for macro-instructions that are an alias for one
-+real insn.
-+
-+@item NO-DIS
-+For macro-instructions, don't use during disassembly.
-+@end table
-+
-+@subsection syntax
-+
-+This is a character string consisting of raw characters and operands.
-+Fields are denoted by @code{$operand} or
-+@code{$@{operand@}}@footnote{Support for @code{$@{operand@}} is
-+work-in-progress.}. If a @samp{$} is required in the syntax, it is
-+specified with @samp{\$}. At most one white-space character may be
-+present and it must be a blank separating the instruction mnemonic from
-+the operands. This doesn't restrict the user's assembler, this is
-+@c Is this reasonable?
-+just a description file restriction to separate the mnemonic from the
-+operands@footnote{The restriction can be relaxed by saying the first
-+blank is the one that separates the mnemonic from its operands.}.
-+The assembly language accepted by the generated assembler does not
-+have to take exactly the same form as the syntax described in this
-+field--additional whitespace may be present in the input file.
-+
-+Operands can refer to registers, constants, and whatever else is necessary.
-+
-+Instruction mnemonics can take operands. For example, on the SPARC a
-+branch instruction can take @code{,a} as an argument to indicate the
-+instruction is being annulled (e.g. @code{bge$a $disp22}).
-+
-+@subsection format
-+
-+This is a complete list of fields that specify the instruction. At
-+present it must be prefaced with @code{+} to allow for future additions.
-+Reserved bits must also be specified, gaps are not allowed.
-+@c Well, actually I think they are and it could certainly be allowed.
-+@c Question: should they be allowed?
-+The ordering of the fields is not important.
-+
-+Format elements can be any of:
-+
-+@itemize @bullet
-+@item instruction field specifiers with a value (e.g. @code{(f-r1 14)})
-+@item an instruction field enum, as in @code{OP1_4}
-+@item an operand
-+@end itemize
-+
-+@subsection semantics
-+@cindex Semantics
-+
-+This field provides a mathematical description of what the instruction
-+does. Its syntax is GCC RTL-like on purpose since GCC's RTL is well
-+known by the intended audience. However, it is not intended that it be
-+precisely GCC RTL.
-+
-+Obviously there are some instructions that are difficult if not
-+impossible to provide a description for (e.g. I/O instructions). Rather
-+than create a new semantic function for each quirky operation, escape
-+hatches to C are provided to handle all such cases. The @code{c-code},
-+@code{c-call} and @code{c-raw-call} semantic functions provide an
-+escape-hatch to invoke C code to perform the
-+operation. @xref{Expressions}.
-+
-+@subsection timing
-+@cindex Timing
-+
-+A list of entries for each function unit the instruction uses on each machine
-+that supports the instruction. The default function unit is the u-exec unit.
-+
-+The syntax is:
-+
-+@example
-+(model-name (unit name (direction unit-var-name1 insn-operand-name1)
-+ (direction unit-var-name2 insn-operand-name2)
-+ ...
-+ (cycles cycle-count))
-+@end example
-+
-+direction/unit-var-name/insn-operand-name mappings are optional.
-+They map unit inputs/outputs to semantic elements. The
-+direction specifier can be @code{in} or @code{out} mapping the
-+name of a unit input or output, respectively, to an insn
-+operand.
-+
-+@code{cycles} overrides the @code{done} value (latency) of the function
-+unit and is optional.
-+
-+@subsection Simplification macros
-+
-+To simplify @file{.cpu} files, the @code{dni} macro has been created.
-+It takes a fixed set of positional arguments for the typical instruction
-+field. @code{dni} is short for @code{define-normal-insn}.
-+
-+The syntax of @code{dni} is:
-+
-+@code{(dni name comment attrs syntax format semantics timing)}
-+
-+Example:
-+
-+@example
-+(dni addi "add 8 bit signed immediate"
-+ ()
-+ "addi $dr,$simm8"
-+ (+ OP1_4 dr simm8)
-+ (set dr (add dr simm8))
-+ ()
-+)
-+@end example
-+
-+@node Macro-instructions
-+@section Macro-instructions
-+@cindex Macro-instructions
-+@cindex Instructions, macro
-+
-+Macro-instructions are for the assembler side of things and are not used
-+by the simulator. The syntax for defining a macro-instruction is:
-+
-+@example
-+(define-macro-insn
-+ (name macro-insn-name)
-+ (comment "description")
-+ (attrs attribute-list)
-+ (syntax "assembler syntax")
-+ (expansions expansion-spec)
-+)
-+@end example
-+
-+@subsection syntax
-+
-+Syntax of the macro-instruction. This has the same value as the
-+@code{syntax} field in @code{define-insn}.
-+
-+@subsection expansions
-+
-+An expression to emit code for the instruction. This is intended to be
-+general in nature, allowing tests to be done at runtime that choose the
-+form of the expansion. Currently the only supported form is:
-+
-+@code{(emit insn arg1 arg2 ...)}
-+
-+where @code{insn} is the name of an instruction defined with
-+@code{define-insn} and @emph{argn} is the set of operands to
-+@code{insn}'s syntax. Each argument is mapped in order to one operand
-+in @code{insn}'s syntax and may be any of:
-+
-+@itemize @bullet
-+@item operand specified in @code{syntax}
-+@item @code{(operand value)}
-+@end itemize
-+
-+Example:
-+
-+@example
-+(dni st-minus "st-" ()
-+ "st $src1,@-$src2"
-+ (+ OP1_2 OP2_7 src1 src2)
-+ (sequence ((WI new-src2))
-+ (set new-src2 (sub src2 (const 4)))
-+ (set (mem WI new-src2) src1)
-+ (set src2 new-src2))
-+ ()
-+)
-+@end example
-+
-+@example
-+(dnmi push "push" ()
-+ "push $src1"
-+ (emit st-minus src1 (src2 15)) ; "st %0,@-sp"
-+)
-+@end example
-+
-+In this example, the @code{st-minus} instruction is a general
-+store-and-decrement instruction and @code{push} is a specialized version
-+of it that uses the stack pointer.
-+
-+@node Modes
-+@section Modes
-+@cindex Modes
-+
-+Modes provide a simple and succinct way of specifying data types.
-+
-+(*note: Should more complex types will be needed (e.g. structs? unions?),
-+these can be handled by extending the definition of a mode to encompass them.)
-+
-+Modes are similar to their usage in GCC, but there are some differences:
-+
-+@itemize @bullet
-+@item modes for boolean values (i.e. bits) are also supported as they are
-+useful
-+@item integer modes exist in signed and unsigned versions
-+@item constants have modes
-+@end itemize
-+
-+Currently supported modes are:
-+
-+@table @code
-+@item VOID
-+VOIDmode in GCC.
-+
-+@item DFLT
-+Indicate the default mode is wanted, the value of which depends on context.
-+This is a pseudo-mode and never appears in generated code.
-+
-+@item BI
-+Boolean zero/one
-+
-+@item QI,HI,SI,DI
-+Same as GCC.
-+
-+QI is an 8 bit quantity ("quarter int").
-+HI is a 16 bit quantity ("half int").
-+SI is a 32 bit quantity ("single int").
-+DI is a 64 bit quantity ("double int").
-+
-+In cases where signedness matters, these modes are signed.
-+
-+@item UQI,UHI,USI,UDI
-+Unsigned versions of QI,HI,SI,DI.
-+
-+These modes do not appear in semantic RTL. Instead, the RTL function
-+specifies the signedness of its operands where necessary.
-+To a cpu, a 32 bit register is a 32 bit register.
-+Ditto for when the 32 bit quantity lives in memory.
-+It's only in how it is subsequently used or interpreted that
-+signedness might come into play.
-+When signedness comes into play on the chip, it's explicitly
-+specified in the operation, _not_ in the data.
-+Ergo from this perspective Umodes don't belong in .cpu files.
-+This is the perspective to use when writing .cpu files.
-+
-+??? I'm not entirely sure these unsigned modes are needed.
-+They are useful in removing any ambiguity in how to sign extend constants
-+which has been a source of problems in GCC.
-+OTOH, maybe adding uconst akin to const is the way to go?
-+
-+??? Some existing ports use these modes.
-+
-+@item WI,UWI
-+word int, unsigned word int (word_mode in gcc).
-+These are aliases for the real mode, typically either @code{SI} or @code{DI}.
-+
-+@item SF,DF,XF,TF
-+Same as GCC.
-+
-+SF is a 32 bit IEEE float ("single float").
-+DF is a 64 bit IEEE float ("double float").
-+XF is either an 80 or 96 bit IEEE float ("extended float").
-+(*note: XF values on m68k and i386 are different so may
-+wish to give them different names).
-+TF is a 128 bit IEEE float ("??? float").
-+
-+@item AI
-+Address integer
-+
-+@item IAI
-+Instruction address integer
-+
-+@item INT,UINT
-+Varying width int/unsigned-int. The width is specified by context,
-+usually in an instruction field definition.
-+
-+@end table
-+
-+@node Expressions
-+@section Expressions
-+@cindex Expressions
-+
-+The syntax of CGEN's RTL expressions (or @emph{rtx}) basically follows that of
-+GCC's RTL.
-+
-+The handling of modes is different to simplify the implementation.
-+Implementation shouldn't necessarily drive design, but it was a useful
-+simplification. Still, it needs to be reviewed. The difference is that
-+in GCC @code{(function:MODE arg1 ...)} is written in CGEN as
-+@code{(function MODE arg1 ...)}. Note the space after @samp{function}.
-+
-+GCC RTL allows flags to be recorded with RTL (e.g. MEM_VOLATILE_P).
-+This is supported in CGEN RTL by prefixing each RTL function's arguments
-+with an optional list of modifiers:
-+@code{(function (:mod1 :mod2) MODE arg1 ...)}.
-+The list is a set of modifier names prefixed with ':'. They can take
-+arguments.
-+??? Modifiers are supported by the RTL traversing code, but no use is
-+made of them yet.
-+
-+The currently defined semantic functions are:
-+
-+@table @code
-+@item (set mode destination source)
-+Assign @samp{source} to @samp{destination} reference in mode @samp{mode}.
-+
-+@item (set-quiet mode destination source)
-+Assign @samp{source} to @samp{destination} referenced in mode
-+@samp{mode}, but do not print any tracing message.
-+
-+@item (reg mode hw-name [index])
-+Return an `operand' of hardware element @samp{hw-name} in mode @samp{mode}.
-+If @samp{hw-name} is an array, @samp{index} selects which register.
-+
-+@item (raw-reg mode hw-name [index])
-+Return an `operand' of hardware element @samp{hw-name} in mode @samp{mode},
-+bypassing any @code{get} or @code{set} specs of the register.
-+If @samp{hw-name} is an array, @samp{index} selects which register.
-+This cannot be used with virtual registers (those specified with the
-+@samp{VIRTUAL} attribute).
-+
-+@code{raw-reg} is most often used in @code{get} and @code{set} specs
-+of a register: if it weren't read and write operations would infinitely
-+recurse.
-+
-+@item (mem mode address)
-+Return an `operand' of memory referenced at @samp{address} in mode
-+@samp{mode}.
-+
-+@item (const mode value)
-+Return an `operand' of constant @samp{value} in mode @samp{mode}.
-+
-+@item (enum mode value-name)
-+Return an `operand' of constant @samp{value-name} in mode @samp{mode}.
-+The value must be from a previously defined enum.
-+
-+@item (subword mode value word-num)
-+Return part of @samp{value}. Which part is determined by @samp{mode} and
-+@samp{word-num}. There are three cases.
-+
-+If @samp{mode} is the same size as the mode of @samp{value}, @samp{word-num}
-+must be @samp{0} and the result is @samp{value} recast in the new mode.
-+There is no change in the bits of @samp{value}, they're just interpreted in a
-+possibly different mode. This is most often used to interpret an integer
-+value as a float and vice versa.
-+
-+If @samp{mode} is smaller, @samp{value} is divided into N pieces and
-+@samp{word-num} picks which piece. All pieces have the size of @samp{mode}
-+except possibly the last. If the last piece has a different size,
-+it cannot be referenced.
-+This follows GCC and is byte order dependent.@footnote{To be
-+revisited}.
-+Word number 0 is the most significant word if big-endian-words.
-+Word number 0 is the least significant word if little-endian-words.
-+
-+If @samp{mode} is larger, @samp{value} is interpreted in the larger mode
-+with the upper most significant bits treated as garbage (their value is
-+assumed to be unimportant to the context in which the value will be used).
-+@samp{word-num} must be @samp{0}.
-+This case is byte order independent.
-+
-+@item (join out-mode in-mode arg1 . arg-rest)
-+Concatenate @samp{arg1[,arg2[,...]]} to create a value of mode @samp{out-mode}.
-+@samp{arg1} becomes the most significant part of the result.
-+Each argument is interpreted in mode @samp{in-mode}.
-+@samp{in-mode} must evenly divide @samp{out-mode}.
-+??? Endianness issues have yet to be decided.
-+
-+@item (sequence mode ((mode1 local1) ...) expr1 expr2 ...)
-+Execute @samp{expr1}, @samp{expr2}, etc. sequentially. @samp{mode} is the
-+mode of the result, which is defined to be that of the last expression.
-+`@code{((mode1 local1) ...)}' is a set of local variables.
-+
-+@item (parallel mode empty expr1 ...)
-+Execute @samp{expr1}, @samp{expr2}, etc. in parallel. All inputs are
-+read before any output is written. @samp{empty} must be @samp{()} and
-+is present for consistency with @samp{sequence}. @samp{mode} must be
-+@samp{VOID} (void mode).
-+
-+@item (unop mode operand)
-+Perform a unary arithmetic operation. @samp{unop} is one of @code{neg},
-+@code{abs}, @code{inv}, @code{not}, @code{zflag}, @code{nflag}.
-+@code{zflag} returns a bit indicating if @samp{operand} is
-+zero. @code{nflag} returns a bit indicating if @samp{operand} is
-+negative. @code{inv} returns the bitwise complement of @samp{operand},
-+whereas @code{not} returns its logical negation.
-+
-+@item (binop mode operand1 operand2)
-+Perform a binary arithmetic operation. @samp{binop} is one of
-+@code{add}, @code{sub}, @code{and}, @code{or}, @code{xor}, @code{mul},
-+@code{div}, @code{udiv}, @code{mod}, @code{umod}.
-+
-+@item (binop-with-bit mode operand1 operand2 operand3)
-+Same as @samp{binop}, except taking 3 operands. The third operand is
-+always a single bit. @samp{binop-with-bit} is one of @code{addc},
-+@code{add-cflag}, @code{add-oflag}, @code{subc}, @code{sub-cflag},
-+@code{sub-oflag}.
-+
-+@item (shiftop mode operand1 operand2)
-+Perform a shift operation. @samp{shiftop} is one of @code{sll},
-+@code{srl}, @code{sra}, @code{ror}, @code{rol}.
-+
-+@item (boolifop mode operand1 operand2)
-+Perform a sequential boolean operation. @samp{operand2} is not processed
-+if @samp{operand1} ``fails''. @samp{boolifop} is one of @code{andif},
-+@code{orif}.
-+
-+@item (convop mode operand)
-+Perform a mode->mode conversion operation. @samp{convop} is one of
-+@code{ext}, @code{zext}, @code{trunc}, @code{float}, @code{ufloat},
-+@code{fix}, @code{ufix}.
-+
-+@item (cmpop mode operand1 operand2)
-+Perform a comparison. @samp{cmpop} is one of @code{eq}, @code{ne},
-+@code{lt}, @code{le}, @code{gt}, @code{ge}, @code{ltu}, @code{leu},
-+@code{gtu}, @code{geu}.
-+
-+@item (mathop mode operand)
-+Perform a mathematical operation. @samp{mathop} is one of @code{sqrt},
-+@code{cos}, @code{sin}.
-+
-+@item (if mode condition then [else])
-+Standard @code{if} statement.
-+
-+@samp{condition} is any arithmetic expression.
-+If the value is non-zero the @samp{then} part is executed.
-+Otherwise, the @samp{else} part is executed (if present).
-+
-+@samp{mode} is the mode of the result, not of @samp{condition}.
-+If @samp{mode} is not @code{VOID} (void mode), @samp{else} must be present.
-+When the result is used, @samp{mode} must specified, and not be @code{VOID}.
-+
-+@item (cond mode (condition1 expr1a ...) (...) [(else exprNa...)])
-+From Scheme: keep testing conditions until one succeeds, and then
-+process the associated expressions.
-+
-+@item (case mode test ((case1 ..) expr1a ..) (..) [(else exprNa ..)])
-+From Scheme: Compare @samp{test} with @samp{case1}, @samp{case2},
-+etc. and process the associated expressions.
-+
-+@item (c-code mode "C expression")
-+An escape hook to insert arbitrary C code. @samp{mode} must the
-+compatible with the result of ``C expression''.
-+
-+@item (c-call mode symbol operand1 operand2 ...)
-+An escape hook to emit a subroutine call to function named @samp{symbol}
-+passing operands @samp{operand1}, @samp{operand2}, etc. An implicit
-+first argument of @code{current_cpu} is passed to @samp{symbol}.
-+@samp{mode} is the mode of the result. Be aware that @samp{symbol} will
-+be restricted by reserved words in the C programming language any by
-+existing symbols in the generated code.
-+
-+@item (c-raw-call mode symbol operand1 operand2 ...)
-+Same as @code{c-call}: except there is no implicit @code{current_cpu}
-+first argument.
-+@samp{mode} is the mode of the result.
-+
-+@item (clobber mode object)
-+Indicate that @samp{object} is written in mode @samp{mode}, without
-+saying how. This could be useful in conjunction with the C escape hooks.
-+
-+@item (delay mode num expr)
-+Indicate that there are @samp{num} delay slots in the processing of
-+@samp{expr}. When using this rtx in instruction semantics, CGEN will
-+infer that the instruction has the DELAY-SLOT attribute.
-+
-+@item (delay num expr)
-+In older "sim" simulators, indicates that there are @samp{num} delay
-+slots in the processing of @samp{expr}. When using this rtx in instruction
-+semantics, CGEN will infer that the instruction has the DELAY-SLOT
-+attribute.
-+
-+In newer "sid" simulators, evaluates to the writeback queue for hardware
-+operand @samp{expr}, at @samp{num} instruction cycles in the
-+future. @samp{expr} @emph{must} be a hardware operand in this case.
-+
-+For example, @code{(set (delay 3 pc) (+ pc 1))} will schedule write to
-+the @samp{pc} register in the writeback phase of the 3rd instruction
-+after the current. Alternatively, @code{(set gr1 (delay 3 gr2))} will
-+immediately update the @samp{gr1} register with the @emph{latest write}
-+to the @samp{gr2} register scheduled between the present and 3
-+instructions in the future. @code{(delay 0 ...)} refers to the
-+writeback phase of the current instruction.
-+
-+This effect is modeled with a circular buffer of "write stacks" for each
-+hardware element (register banks get a single stack). The size of the
-+circular buffer is calculated from the uses of @code{(delay ...)}
-+rtxs. When a delayed write occurs, the simulator pushes the write onto
-+the appropriate write stack in the "future" of the circular buffer for
-+the written-to hardware element. At the end of each instruction cycle,
-+the simulator executes all writes in all write stacks for the time slice
-+just ending. When a delayed read (essentially a pipeline bypass) occurs,
-+the simulator looks ahead in the circular buffer for any writes
-+scheduled in the future write stack. If it doesn't find one, it
-+progressively backs off towards the "current" instruction cycle's write
-+stack, and if it still finds no scheduled writes then it returns the
-+current state of the CPU. Thus while delayed writes are fast, delayed
-+reads are potentially slower in a simulator with long pipelines and very
-+large register banks.
-+
-+@item (annul yes?)
-+@c FIXME: put annul into the glossary.
-+Annul the following instruction if @samp{yes?} is non-zero. This rtx is
-+an experiment and will probably change.
-+
-+@item (skip yes?)
-+Skip the next instruction if @samp{yes?} is non-zero. This rtx is
-+an experiment and will probably change.
-+
-+@item (attr mode kind attr-name)
-+Return the value of attribute @samp{attr-name} in mode
-+@samp{mode}. @samp{kind} must currently be @samp{insn}: the current
-+instruction.
-+
-+@item (symbol name)
-+Return a symbol with value @samp{name}, for use in attribute
-+processing. This is equivalent to @samp{quote} in Scheme but
-+@samp{quote} sounds too jargonish.
-+
-+@item (eq-attr mode attr-name value)
-+Return non-zero if the value of attribute @samp{attr-name} is
-+@samp{value}. If @samp{value} is a list return ``true'' if
-+@samp{attr-name} is any of the listed values.
-+
-+@item (index-of operand)
-+Return the index of @samp{operand}. For registers this is the register number.
-+
-+@item (regno operand)
-+Same as @code{index-of}, but improves readability for registers
-+
-+@item (error mode message)
-+Emit an error message from CGEN RTL. Error message is specified by @samp{message}.
-+
-+@item (nop)
-+A no-op.
-+
-+@item (ifield field-name)
-+Return the value of field @samp{field-name}. @samp{field-name} must be a
-+field in the instruction. Operands can be any of:
-+@c ???
-+
-+@itemize @bullet
-+@item an operand defined in the description file
-+@item a register reference, created with (reg mode [index])
-+@item a memory reference, created with (mem mode address)
-+@item a constant, created with (const mode value)
-+@item a `sequence' local variable
-+@item another expression
-+@end itemize
-+
-+The @samp{symbol} in a @code{c-call} or @code{c-raw-call} function is
-+currently the name of a C function or macro that is invoked by the
-+generated semantic code.
-+@end table
-+
-+@node Macro-expressions
-+@section Macro-expressions
-+@cindex Macro-expressions
-+
-+Macro RTL expressions started out by wanting to not have to always
-+specify a mode for every expression (and sub-expression
-+thereof). Whereas the formal way to specify, say, an add is @code{(add
-+SI arg1 arg2)} if SI is the default mode of `arg1' then this can be
-+simply written as @code{(add arg1 arg2)}. This gets expanded to
-+@code{(add DFLT arg1 arg2)} where @code{DFLT} means ``default mode''.
-+
-+It might be possible to replace macro expressions with preprocessor macros,
-+however for the nonce there is no plan to do this.
-diff -Nur binutils-2.24.orig/cgen/doc/running.texi binutils-2.24/cgen/doc/running.texi
---- binutils-2.24.orig/cgen/doc/running.texi 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/doc/running.texi 2016-06-30 21:26:12.653893112 +0200
-@@ -0,0 +1,9 @@
-+@c Copyright (C) 2000 Red Hat, Inc.
-+@c This file is part of the CGEN manual.
-+@c For copying conditions, see the file cgen.texi.
-+
-+@node Running CGEN
-+@chapter Running CGEN
-+
-+This chapter needs to explain how to run CGEN, how it fits together, and
-+what to expect when you do run it (ie. output, resultant files, etc).
-diff -Nur binutils-2.24.orig/cgen/doc/sim.texi binutils-2.24/cgen/doc/sim.texi
---- binutils-2.24.orig/cgen/doc/sim.texi 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/doc/sim.texi 2016-06-30 21:26:12.653893112 +0200
-@@ -0,0 +1,45 @@
-+@c Copyright (C) 2000 Red Hat, Inc.
-+@c This file is part of the CGEN manual.
-+@c For copying conditions, see the file cgen.texi.
-+
-+@node Simulation
-+@chapter Simulation support
-+@cindex Simulation support
-+
-+Simulator support comes in the form of machine generated the decoder/executer
-+as well as the structure that records CPU state information (ie. registers).
-+
-+There are 3 architecture-wide generated files:
-+
-+@table @file
-+@item arch.h
-+Definitions and declarations common to the entire architecture.
-+@item arch.c
-+Tables and code common to the entire architecture, but which can't be
-+put in the common area.
-+@item cpuall.h
-+Pseudo base classes of various structures.
-+@end table
-+
-+Each ``CPU family'' has its own set of the following files:
-+
-+@table @file
-+@item cpu.h
-+Definitions and declarations specific to a particular CPU family.
-+@item cpu.c
-+Tables and code specific to a particular CPU family.
-+@item decode.h
-+Decoder definitions and declarations.
-+@item decode.c
-+Decoder tables and code.
-+@item model.c
-+Tables and code for each model in the CPU family.
-+@item semantics.c
-+Code to perform each instruction.
-+@item sem-switch.c
-+Same as @file{semantics.c} but as one giant @code{switch} statement.
-+@end table
-+
-+A ``CPU family'' is an artificial creation to sort architecture variants
-+along whatever lines seem useful. Additional hand-written files must be
-+provided. @xref{Porting}, for details.
-diff -Nur binutils-2.24.orig/cgen/doc/stamp-vti binutils-2.24/cgen/doc/stamp-vti
---- binutils-2.24.orig/cgen/doc/stamp-vti 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/doc/stamp-vti 2016-06-30 21:26:12.653893112 +0200
-@@ -0,0 +1,3 @@
-+@set UPDATED 28 March 2001
-+@set EDITION 1.1
-+@set VERSION 1.0
-diff -Nur binutils-2.24.orig/cgen/doc/version.texi binutils-2.24/cgen/doc/version.texi
---- binutils-2.24.orig/cgen/doc/version.texi 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/doc/version.texi 2016-06-30 21:26:12.653893112 +0200
-@@ -0,0 +1,3 @@
-+@set UPDATED 28 March 2001
-+@set EDITION 1.1
-+@set VERSION 1.0
-diff -Nur binutils-2.24.orig/cgen/enum.scm binutils-2.24/cgen/enum.scm
---- binutils-2.24.orig/cgen/enum.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/enum.scm 2016-06-30 21:26:12.653893112 +0200
-@@ -0,0 +1,441 @@
-+; Enums.
-+; Copyright (C) 2000, 2009, 2010 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; Enums having attribute PREFIX have their symbols prepended with
-+; the enum class' name + "_" in generated code. FIXME: deprecated
-+;
-+; Member PREFIX is prepended to the symbol names when the object is defined.
-+;
-+; Enum values are looked up with `enum-lookup-val'. The value to search for
-+; must already have PREFIX prepended.
-+;
-+; Enums always have mode INT.
-+
-+(define <enum>
-+ (class-make '<enum>
-+ '(<ident>)
-+ '(prefix vals)
-+ nil)
-+)
-+
-+; FIXME: this make! method is required by <insn-enum> for some reason.
-+
-+(method-make!
-+ <enum> 'make!
-+ (lambda (self name comment attrs prefix vals)
-+ (elm-set! self 'name name)
-+ (elm-set! self 'comment comment)
-+ (elm-set! self 'attrs attrs)
-+ (elm-set! self 'prefix prefix)
-+ (elm-set! self 'vals vals)
-+ self)
-+)
-+
-+(define enum-prefix (elm-make-getter <enum> 'prefix))
-+
-+(method-make! <enum> 'enum-values (lambda (self) (elm-get self 'vals)))
-+
-+; Parse a list of enum name/value entries.
-+; PREFIX is prepended to each name.
-+; Elements are any of: symbol, (symbol), (symbol value)
-+; (symbol - attrs), (symbol value attrs), (symbol - attrs comment),
-+; (symbol value attrs comment).
-+; The - or #f means "use the next value".
-+; SYMBOL may be - which means "skip this value".
-+; The result is the same list, except values are filled in where missing,
-+; and each symbol is prepended with `prefix'.
-+
-+(define (parse-enum-vals context prefix vals)
-+ ; Scan the value list, building up RESULT as we go.
-+ ; Each element's value is 1+ the previous, unless there's an explicit value.
-+ (let loop ((result nil) (last -1) (remaining vals))
-+ (if (null? remaining)
-+ (reverse! result)
-+ (let
-+ ; Compute the numeric value the next entry will have.
-+ ((val (if (and (pair? (car remaining))
-+ (not (null? (cdar remaining))))
-+ (if (eq? '- (cadar remaining))
-+ (+ last 1)
-+ (cadar remaining))
-+ (+ last 1))))
-+ (if (eq? (car remaining) '-)
-+ (loop result val (cdr remaining))
-+ (let ((name (symbolstr-append prefix
-+ (if (pair? (car remaining))
-+ (caar remaining)
-+ (car remaining))))
-+ (attrs (if (and (pair? (car remaining))
-+ (pair? (cdar remaining))
-+ (pair? (cddar remaining)))
-+ (caddar remaining)
-+ nil))
-+ (comment (if (and (pair? (car remaining))
-+ (pair? (cdar remaining))
-+ (pair? (cddar remaining))
-+ (pair? (cdddar remaining)))
-+ (car (cdddar remaining))
-+ "")))
-+ (loop (cons (list name val attrs comment) result)
-+ val
-+ (cdr remaining)))))))
-+)
-+
-+; Accessors for the various elements of an enum val.
-+
-+(define (enum-val-name ev) (list-ref ev 0))
-+(define (enum-val-value ev) (list-ref ev 1))
-+(define (enum-val-attrs ev) (list-ref ev 2))
-+(define (enum-val-comment ev) (list-ref ev 3))
-+
-+; Convert the names in the result of parse-enum-vals to uppercase.
-+
-+(define (enum-vals-upcase vals)
-+ (map (lambda (elm)
-+ (cons (symbol-upcase (car elm)) (cdr elm)))
-+ vals)
-+)
-+
-+; Parse an enum definition.
-+
-+; Utility of /enum-parse to parse the prefix.
-+
-+(define (/enum-parse-prefix context prefix)
-+ (if (symbol? prefix)
-+ (set! prefix (symbol->string prefix)))
-+
-+ (if (not (string? prefix))
-+ (parse-error context "prefix is not a string" prefix))
-+
-+ ; Prefix must not contain lowercase chars (enforced style rule, sue me).
-+ (if (any-true? (map char-lower-case? (string->list prefix)))
-+ (parse-error context "prefix must be uppercase" prefix))
-+
-+ prefix
-+)
-+
-+; This is the main routine for building an enum object from a
-+; description in the .cpu file.
-+; All arguments are in raw (non-evaluated) form.
-+
-+(define (/enum-parse context name comment attrs prefix vals)
-+ (logit 2 "Processing enum " name " ...\n")
-+
-+ ;; Pick out name first to augment the error context.
-+ (let* ((name (parse-name context name))
-+ (context (context-append-name context name)))
-+
-+ (make <enum>
-+ name
-+ (parse-comment context comment)
-+ (atlist-parse context attrs "enum")
-+ (/enum-parse-prefix context prefix)
-+ (parse-enum-vals context prefix vals)))
-+)
-+
-+;; Read an enum description
-+;; This is the main routine for analyzing enums in the .cpu file.
-+;; CONTEXT is a <context> object for error messages.
-+;; ARG-LIST is an associative list of field name and field value.
-+;; /enum-parse is invoked to create the `enum' object.
-+;;
-+;; FIXME: Change (values ((foo 42) (bar 43))) to (values (foo 42) (bar 43)).
-+
-+(define (/enum-read context . arg-list)
-+ (let (
-+ (name #f)
-+ (comment "")
-+ (attrs nil)
-+ (prefix "")
-+ (values nil)
-+ )
-+
-+ ; Loop over each element in ARG-LIST, recording what's found.
-+ (let loop ((arg-list arg-list))
-+ (if (null? arg-list)
-+ nil
-+ (let ((arg (car arg-list))
-+ (elm-name (caar arg-list)))
-+ (case elm-name
-+ ((name) (set! name (cadr arg)))
-+ ((comment) (set! comment (cadr arg)))
-+ ((attrs) (set! attrs (cdr arg)))
-+ ((prefix) (set! prefix (cadr arg)))
-+ ((values) (set! values (cadr arg)))
-+ (else (parse-error context "invalid enum arg" arg)))
-+ (loop (cdr arg-list)))))
-+
-+ ; Now that we've identified the elements, build the object.
-+ (/enum-parse context name comment attrs prefix values))
-+)
-+
-+; Define an enum object, name/value pair list version.
-+
-+(define define-enum
-+ (lambda arg-list
-+ (let ((e (apply /enum-read (cons (make-current-context "define-enum")
-+ arg-list))))
-+ (current-enum-add! e)
-+ e))
-+)
-+
-+; Define an enum object, all arguments specified.
-+
-+(define (define-full-enum name comment attrs prefix vals)
-+ (let ((e (/enum-parse (make-current-context "define-full-enum")
-+ name comment attrs prefix vals)))
-+ (current-enum-add! e)
-+ e)
-+)
-+
-+; Lookup SYM in all recorded enums.
-+; The result is (value . enum-obj) or #f if not found.
-+
-+(define (enum-lookup-val name)
-+ (let loop ((elist (current-enum-list)))
-+ (if (null? elist)
-+ #f
-+ (let ((e (assq name (send (car elist) 'enum-values))))
-+ ;(display e) (newline)
-+ (if e
-+ (begin
-+ ; sanity check, ensure the enum has a value
-+ (if (null? (cdr e)) (error "enum-lookup-val: enum missing value: " (car e)))
-+ (cons (cadr e) (car elist)))
-+ (loop (cdr elist)))
-+ )
-+ )
-+ )
-+)
-+
-+; Enums support code.
-+
-+; Return #t if VALS is a sequential list of enum values.
-+; VALS is a list of enums. e.g. ((sym1) (sym2 3) (sym3 - attr1 (attr2 4)))
-+; FIXME: Doesn't handle gaps in specified values.
-+; e.g. (sym1 val1) sym2 (sym3 val3)
-+
-+(define (enum-sequential? vals)
-+ (let loop ((last -1) (remaining vals))
-+ (if (null? remaining)
-+ #t
-+ (let ((val (if (and (pair? (car remaining))
-+ (not (null? (cdar remaining))))
-+ (cadar remaining)
-+ (+ last 1))))
-+ (if (eq? val '-)
-+ (loop (+ last 1) (cdr remaining))
-+ (if (not (= val (+ last 1)))
-+ #f
-+ (loop val (cdr remaining)))))))
-+)
-+
-+; Return C code to declare enum SYM with values VALS.
-+; COMMENT is inserted in "/* Enum declaration for <...>. */".
-+; PREFIX is added to each element of VALS (uppercased).
-+; All enum symbols are uppercase.
-+; If the list of vals is sequential beginning at 0, don't output them.
-+; This simplifies the output and is necessary for sanitized values where
-+; some values may be cut out.
-+; VALS may have '- for the value, signifying use the next value as in C.
-+
-+(define (gen-enum-decl name comment prefix vals)
-+ (logit 2 "Generating enum decl for " name " ...\n")
-+ ; Build result up as a list and then flatten it into a string.
-+ ; We could just return a string-list but that seems like too much to ask
-+ ; of callers.
-+ (string-list->string
-+ (append!
-+ (string-list
-+ "/* Enum declaration for " comment ". */\n"
-+ "typedef enum "
-+ (string-downcase (gen-c-symbol name))
-+ " {")
-+ (let loop ((n 0) ; `n' is used to track the number of entries per line only
-+ (sequential? (enum-sequential? vals))
-+ (vals vals)
-+ (result (list "")))
-+ (if (null? vals)
-+ result
-+ (let* ((e (car vals))
-+ (attrs (if (null? (cdr e)) nil (cddr e)))
-+ (san-code (attr-value attrs 'sanitize #f))
-+ (san? (and san-code (not (eq? san-code 'none)))))
-+ (loop
-+ (if san?
-+ 4 ; reset to beginning of line (but != 0)
-+ (+ n 1))
-+ sequential?
-+ (cdr vals)
-+ (append!
-+ result
-+ (string-list
-+ (if san?
-+ (string-append "\n"
-+ (if include-sanitize-marker?
-+ ; split string to avoid removal
-+ (string-append "/* start-"
-+ "sanitize-"
-+ san-code " */\n")
-+ "")
-+ " ")
-+ "")
-+ (string-upcase
-+ (string-append
-+ (if (and (not san?) (=? (remainder n 4) 0))
-+ "\n "
-+ "")
-+ (if (= n 0)
-+ " "
-+ ", ")
-+ (gen-c-symbol prefix)
-+ (gen-c-symbol (car e))
-+ (if (or sequential?
-+ (null? (cdr e))
-+ (eq? '- (cadr e)))
-+ ""
-+ (string-append " = "
-+ (if (number? (cadr e))
-+ (number->string (cadr e))
-+ (cadr e))))
-+ ))
-+ (if (and san? include-sanitize-marker?)
-+ ; split string to avoid removal
-+ (string-append "\n/* end-"
-+ "sanitize-" san-code " */")
-+ "")))))))
-+ (string-list
-+ "\n} "
-+ (string-upcase (gen-c-symbol name))
-+ ";\n\n")
-+ ))
-+)
-+
-+; Return a list of enum value definitions for gen-enum-decl.
-+; OBJ-LIST is a list of objects that support obj:name, obj-atlist.
-+
-+(define (gen-obj-list-enums obj-list)
-+ (map (lambda (o)
-+ (cons (obj:name o) (cons '- (atlist-attrs (obj-atlist o)))))
-+ obj-list)
-+)
-+
-+; Return C code that declares[/defines] an enum.
-+
-+(method-make!
-+ <enum> 'gen-decl
-+ (lambda (self)
-+ (gen-enum-decl (elm-get self 'name)
-+ (elm-get self 'comment)
-+ (if (has-attr? self 'PREFIX)
-+ (string-append (elm-get self 'name) "_")
-+ "")
-+ (elm-get self 'vals)))
-+)
-+
-+;; Return the C symbol of an enum value named VAL.
-+;; ENUM-OBJ is the <enum> object containing VAL.
-+
-+(define (gen-enum-sym enum-obj val)
-+ (string-upcase
-+ (string-append (if (has-attr? enum-obj 'PREFIX)
-+ (string-append (elm-xget enum-obj 'name) "_")
-+ "")
-+ (gen-c-symbol val)))
-+)
-+
-+; Instruction code enums.
-+; These associate an enum with an instruction field so that the enum values
-+; can be used in instruction field lists.
-+
-+(define <insn-enum> (class-make '<insn-enum> '(<enum>) '(fld) nil))
-+
-+(method-make!
-+ <insn-enum> 'make!
-+ (lambda (self name comment attrs prefix fld vals)
-+ (send-next self '<insn-enum> 'make! name comment attrs prefix vals)
-+ (elm-set! self 'fld fld)
-+ self
-+ )
-+)
-+
-+(define ienum:fld (elm-make-getter <insn-enum> 'fld))
-+
-+; Same as enum-lookup-val except returned enum must be an insn-enum.
-+
-+(define (ienum-lookup-val name)
-+ (let ((result (enum-lookup-val name)))
-+ (if (and result (eq? (object-class-name (cdr result)) '<insn-enum>))
-+ result
-+ #f))
-+)
-+
-+; Define an insn enum, all arguments specified.
-+
-+(define (define-full-insn-enum name comment attrs prefix fld vals)
-+ (let* ((context (make-current-context "define-full-insn-enum"))
-+ (atlist-obj (atlist-parse context attrs "insn-enum"))
-+ (isa-name-list (atlist-attr-value atlist-obj 'ISA #f))
-+ (fld-obj (current-ifld-lookup fld isa-name-list)))
-+
-+ (if (keep-isa-atlist? atlist-obj #f)
-+ (begin
-+ (if (not fld-obj)
-+ (parse-error context "unknown insn field" fld))
-+ ; Create enum object and add it to the list of enums.
-+ (let ((e (make <insn-enum>
-+ (parse-name context name)
-+ (parse-comment context comment)
-+ atlist-obj
-+ (/enum-parse-prefix context prefix)
-+ fld-obj
-+ (parse-enum-vals context prefix vals))))
-+ (current-enum-add! e)
-+ e))))
-+)
-+
-+(define (enum-init!)
-+
-+ (reader-add-command! 'define-enum
-+ "\
-+Define an enum, name/value pair list version.
-+"
-+ nil 'arg-list define-enum)
-+ (reader-add-command! 'define-full-enum
-+ "\
-+Define an enum, all arguments specified.
-+"
-+ nil '(name comment attrs prefix vals) define-full-enum)
-+ (reader-add-command! 'define-full-insn-enum
-+ "\
-+Define an instruction opcode enum, all arguments specified.
-+"
-+ nil '(name comment attrs prefix ifld vals)
-+ define-full-insn-enum)
-+
-+ *UNSPECIFIED*
-+)
-+
-+(define (enum-builtin!)
-+ ;; Provide FPCONV-DEFAULT == 0 as an enum constant to use as the `how'
-+ ;; parameter to the floating point conversion functions.
-+ ;; ??? Add standard IEEE rounding modes?
-+ (define-enum '(name fpconv-kind)
-+ '(comment "builtin floating point conversion kinds")
-+ '(attrs VIRTUAL) ;; let app provide def'n instead of each cpu's desc.h
-+ '(prefix FPCONV-)
-+ '(values ((DEFAULT 0)
-+ (TIES-TO-EVEN 1)
-+ (TIES-TO-AWAY 2)
-+ (TOWARD-ZERO 3)
-+ (TOWARD-POSITIVE 4)
-+ (TOWARD-NEGATIVE 5))))
-+
-+ *UNSPECIFIED*
-+)
-+
-+(define (enum-finish!)
-+ *UNSPECIFIED*
-+)
-diff -Nur binutils-2.24.orig/cgen/gas-test.scm binutils-2.24/cgen/gas-test.scm
---- binutils-2.24.orig/cgen/gas-test.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/gas-test.scm 2016-06-30 21:26:12.653893112 +0200
-@@ -0,0 +1,331 @@
-+; CPU description file generator for the GNU assembler testsuite.
-+; Copyright (C) 2000, 2001, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; This is invoked to build allinsn.exp and a script to run to
-+; generate allinsn.s and allinsn.d.
-+
-+; Specify which application.
-+(set! APPLICATION 'GAS-TEST)
-+
-+; Called before/after the .cpu file has been read.
-+
-+(define (gas-test-init!) (opcodes-init!))
-+(define (gas-test-finish!) (opcodes-finish!))
-+
-+; Called after .cpu file has been read and global error checks are done.
-+; We use the `tmp' member to record the syntax split up into its components.
-+
-+(define (gas-test-analyze!)
-+ (opcodes-analyze!)
-+ (map (lambda (insn)
-+ (elm-xset! insn 'tmp (syntax-break-out (insn-syntax insn)
-+ (obj-isa-list insn))))
-+ (non-multi-insns (current-insn-list)))
-+ *UNSPECIFIED*
-+)
-+
-+; Methods to compute test data.
-+; The result is a list of strings to be inserted in the assembler
-+; in the operand's position.
-+
-+; For a general assembler operand, just turn the value into a string.
-+
-+(method-make!
-+ <hw-asm> 'test-data
-+ (lambda (self ops)
-+ (map (lambda (op)
-+ (cond ((null? op) "")
-+ ((number? op) (number->string op))
-+ (else (error "unsupported assembler operand" op))))
-+ ops))
-+)
-+
-+; For a keyword operand, choose the appropriate keyword.
-+; OPS is a list of values, e.g. from an ifield.
-+
-+(method-make!
-+ <keyword> 'test-data
-+ (lambda (self ops)
-+ (let* ((test-cases (elm-get self 'values))
-+ (prefix (elm-get self 'name-prefix))
-+ (find-kw (lambda (val)
-+ (find-first (lambda (kw) (= (cadr kw) val)) test-cases))))
-+ (map (lambda (n)
-+ ;; If an ifield has, e.g., 2 bits (values 0,1,2,3) and the keyword
-+ ;; only has two values, e.g. (foo 0) (bar 1), then we can get
-+ ;; invalid requests, i.e. for ifield values of 2 and 3.
-+ ;; It's not clear what to do here, but it seems like this is an
-+ ;; error in the description file.
-+ ;; So it seems like we should flag an error for invalid requests.
-+ ;; OTOH, we're just generating testcases. So instead we just
-+ ;; flag a warning and cope by returning the first keyword in the
-+ ;; list.
-+ (let ((kw (find-kw n)))
-+ (if (not kw)
-+ (begin
-+ (message "WARNING: Invalid test data request for keyword "
-+ (obj:name self)
-+ ": "
-+ n
-+ ".\n"
-+ " Compensating by picking a different value.\n")
-+ (set! kw (car test-cases))))
-+ (string-append
-+ (if (and (not (string=? prefix ""))
-+ (eq? (string-ref prefix 0) #\$))
-+ "\\" "")
-+ prefix
-+ (->string (car kw)))))
-+ ops)))
-+)
-+
-+(method-make!
-+ <hw-address> 'test-data
-+ (lambda (self ops)
-+ (let* ((test-cases '("foodata" "4" "footext" "-4"))
-+ (nr-ops (length ops))
-+ (selection (map (lambda (z) (random (length test-cases)))
-+ (iota nr-ops))))
-+ (map (lambda (n) (list-ref test-cases n)) selection)))
-+)
-+
-+(method-make!
-+ <hw-iaddress> 'test-data
-+ (lambda (self ops)
-+ (let* ((test-cases '("footext" "4" "foodata" "-4"))
-+ (nr-ops (length ops))
-+ (selection (map (lambda (z) (random (length test-cases)))
-+ (iota nr-ops))))
-+ (map (lambda (n) (list-ref test-cases n)) selection)))
-+)
-+
-+(method-make-forward! <hw-register> 'indices '(test-data))
-+(method-make-forward! <hw-immediate> 'values '(test-data))
-+
-+; Test data for a field is chosen firstly out of some bit patterns,
-+; then randomly. It is then interpreted based on whether there
-+; is a decode method.
-+
-+(method-make!
-+ <ifield> 'test-data
-+ (lambda (self n)
-+ (let* ((bf-len (ifld-length self))
-+ (field-max (inexact->exact (round (expt 2 bf-len))))
-+ (highbit (quotient field-max 2))
-+ (values (map (lambda (n)
-+ (case n
-+ ((0) 0)
-+ ((1) (- field-max 1))
-+ ((2) highbit)
-+ ((3) (- highbit 1))
-+ ((4) 1)
-+ (else (random field-max))))
-+ (iota n)))
-+ (decode (ifld-decode self)))
-+ (if decode
-+ ; FIXME: need to run the decoder.
-+ values
-+ ; no decode method
-+ (case (mode:class (ifld-mode self))
-+ ((INT) (map (lambda (n) (if (>= n highbit) (- n field-max) n))
-+ values))
-+ ((UINT) values)
-+ (else (error "unsupported mode class"
-+ (mode:class (ifld-mode self))))))))
-+)
-+
-+;; Return N values for assembler test data, or nil if there are none
-+;; (e.g. scalars).
-+;; ??? This also returns nil for str-expr and rtx.
-+
-+(method-make!
-+ <hw-index> 'test-data
-+ (lambda (self n)
-+ (case (hw-index:type self)
-+ ((ifield operand) (send (hw-index:value self) 'test-data n))
-+ ((constant enum) (make-list n (hw-index-constant-value self)))
-+ ((scalar) (make-list n nil))
-+ ((str-expr rtx) (make-list n nil)) ;; ???
-+ (else (error "invalid hw-index type" (hw-index:type self)))))
-+)
-+
-+(method-make!
-+ <operand> 'test-data
-+ (lambda (self n)
-+ (send (op:type self) 'test-data (send (op:index self) 'test-data n)))
-+)
-+
-+; Given an operand, return a set of N test data.
-+; e.g. For a keyword operand, return a random subset.
-+; For a number, return N numbers.
-+
-+(define (operand-test-data op n)
-+ (send op 'test-data n)
-+)
-+
-+; Given the broken out assembler syntax string, return the list of operand
-+; objects.
-+
-+(define (extract-operands syntax-list)
-+ (let loop ((result nil) (l syntax-list))
-+ (cond ((null? l) (reverse! result))
-+ ((object? (car l)) (loop (cons (car l) result) (cdr l)))
-+ (else (loop result (cdr l)))))
-+)
-+
-+; Collate a list of operands into a test test.
-+; Input is a list of operand lists. Returns a collated set of test
-+; inputs. For example:
-+; ((r0 r1 r2) (r3 r4 r5) (2 3 8)) => ((r0 r3 2) (r1 r4 3) (r2 r5 8))
-+; L is a list of lists. All elements must have the same length.
-+
-+(define (/collate-test-set L)
-+ (if (= (length (car L)) 0)
-+ '()
-+ (cons (map car L)
-+ (/collate-test-set (map cdr L))))
-+)
-+
-+; Given a list of operands for an instruction, return the test set
-+; (all possible combinations).
-+; N is the number of testcases for each operand.
-+; The result has N to-the-power (length OP-LIST) elements.
-+
-+(define (build-test-set op-list n)
-+ (let ((test-data (map (lambda (op) (operand-test-data op n)) op-list))
-+ (len (length op-list)))
-+ (cond ((= len 0) (list (list)))
-+ (else (/collate-test-set test-data))))
-+)
-+
-+; Given an assembler expression and a set of operands build a testcase.
-+; TEST-DATA is a list of strings, one element per operand.
-+
-+(define (build-asm-testcase syntax-list test-data)
-+ (let loop ((result nil) (sl syntax-list) (td test-data))
-+ ;(display (list result sl td "\n"))
-+ (cond ((null? sl)
-+ (string-append "\t"
-+ (apply string-append (reverse result))
-+ "\n"))
-+ ((string? (car sl))
-+ (loop (cons (car sl) result) (cdr sl) td))
-+ (else (loop (cons (car td) result) (cdr sl) (cdr td)))))
-+)
-+
-+; Generate the testsuite for INSN.
-+; FIXME: make the number of cases an argument to this application.
-+
-+(define (gen-gas-test insn)
-+ (logit 2 "Generating gas test data for " (obj:name insn) " ...\n")
-+ (string-append
-+ "\t.text\n"
-+ "\t.global " (gen-sym insn) "\n"
-+ (gen-sym insn) ":\n"
-+ (let* ((syntax-list (insn-tmp insn))
-+ (op-list (extract-operands syntax-list))
-+ (test-set (build-test-set op-list 8)))
-+ (string-map (lambda (test-data)
-+ (build-asm-testcase syntax-list test-data))
-+ test-set))
-+ )
-+)
-+
-+; Generate the shell script that builds the .d file.
-+; .d files contain the objdump result that is used to see whether the
-+; testcase passed.
-+; We do this by running gas and objdump.
-+; Obviously this isn't quite right - bugs in gas or
-+; objdump - the things we're testing - will cause an incorrect testsuite to
-+; be built and thus the bugs will be missed. It is *not* intended that this
-+; be run immediately before running the testsuite! Rather, this is run to
-+; generate the testsuite which is then inspected for accuracy and checked
-+; into CVS. As bugs in the testsuite are found they are corrected by hand.
-+; Or if they're due to bugs in the generator the generator can be rerun and
-+; the output diff'd to ensure no errors have crept back in.
-+; The point of doing things this way is TO SAVE A HELL OF A LOT OF TYPING!
-+; Clearly some hand generated testcases will also be needed, but this
-+; provides a good test for each instruction.
-+
-+(define (cgen-build.sh)
-+ (logit 1 "Generating gas-build.sh ...\n")
-+ (string-append
-+ "\
-+#/bin/sh
-+# Generate test result data for " (->string (current-arch-name)) " GAS testing.
-+# This script is machine generated.
-+# It is intended to be run in the testsuite source directory.
-+#
-+# Syntax: build.sh /path/to/build/gas
-+
-+if [ $# = 0 ] ; then
-+ if [ ! -x ../gas/as-new ] ; then
-+ echo \"Usage: $0 [/path/to/gas/build]\"
-+ else
-+ BUILD=`pwd`/../gas
-+ fi
-+else
-+ BUILD=$1
-+fi
-+
-+if [ ! -x $BUILD/as-new ] ; then
-+ echo \"$BUILD is not a gas build directory\"
-+ exit 1
-+fi
-+
-+# Put results here, so we preserve the existing set for comparison.
-+rm -rf tmpdir
-+mkdir tmpdir
-+cd tmpdir
-+
-+function gentest {
-+ rm -f a.out
-+ $BUILD/as-new ${1}.s -o a.out
-+ echo \"#as:\" >${1}.d
-+ echo \"#objdump: -dr\" >>${1}.d
-+ echo \"#name: $1\" >>${1}.d
-+ $BUILD/../binutils/objdump -dr a.out | \
-+ sed -e 's/(/\\\\(/g' \
-+ -e 's/)/\\\\)/g' \
-+ -e 's/\\$/\\\\$/g' \
-+ -e 's/\\[/\\\\\\[/g' \
-+ -e 's/\\]/\\\\\\]/g' \
-+ -e 's/[+]/\\\\+/g' \
-+ -e 's/[.]/\\\\./g' \
-+ -e 's/[*]/\\\\*/g' | \
-+ sed -e 's/^.*file format.*$/.*: +file format .*/' \
-+ >>${1}.d
-+ rm -f a.out
-+}
-+
-+# Now come all the testcases.
-+cat > allinsn.s <<EOF
-+ .data
-+foodata: .word 42
-+ .text
-+footext:\n"
-+ (string-map (lambda (insn)
-+ (gen-gas-test insn))
-+ (non-multi-insns (current-insn-list)))
-+ "EOF\n"
-+ "\n"
-+ "# Finally, generate the .d file.\n"
-+ "gentest allinsn\n"
-+ )
-+)
-+
-+; Generate the dejagnu allinsn.exp file that drives the tests.
-+
-+(define (cgen-allinsn.exp)
-+ (logit 1 "Generating allinsn.exp ...\n")
-+ (string-append
-+ "\
-+# " (string-upcase (->string (current-arch-name))) " assembler testsuite. -*- Tcl -*-
-+
-+if [istarget " (->string (current-arch-name)) "*-*-*] {
-+ run_dump_test \"allinsn\"
-+}\n"
-+ )
-+)
-diff -Nur binutils-2.24.orig/cgen/gen-all-doc binutils-2.24/cgen/gen-all-doc
---- binutils-2.24.orig/cgen/gen-all-doc 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/gen-all-doc 2016-06-30 21:26:12.657893268 +0200
-@@ -0,0 +1,61 @@
-+#! /bin/sh
-+# Utility script to generate html docs for all ports.
-+
-+# Run this script in the src/cgen directory.
-+
-+# Exit on any error.
-+set -e
-+
-+# For debugging.
-+set -x
-+
-+# ??? Some are missing, need to add them after some research.
-+archs="arm frv i960 m32r nds32 openrisc xstormy16"
-+
-+if [ ! -f sim.scm ]
-+then
-+ echo "Not in the src/cgen directory." >& 2
-+ exit 1
-+fi
-+
-+builddir=tmp-doc
-+
-+rm -rf $builddir
-+mkdir $builddir
-+
-+export cgendir=`pwd`
-+
-+(
-+ set -e
-+ set -x
-+ cd $builddir
-+ $cgendir/configure --prefix /tmp/junk --target m32r-elf
-+
-+ for a in $archs
-+ do
-+ case $a in
-+ arm)
-+ make html ARCH=$a ISAS=arm INSN_FILE_NAME=arm-arm-insn.html
-+ mv arm.html arm-arm.html
-+ mv arm-insn.html arm-arm-insn.html
-+ make html ARCH=$a ISAS=thumb INSN_FILE_NAME=arm-thumb-insn.html
-+ mv arm.html arm-thumb.html
-+ mv arm-insn.html arm-thumb-insn.html
-+ ;;
-+ frv)
-+ make html ARCH=$a MACHS="frv,simple,tomcat,fr400" INSN_FILE_NAME=frv-1-insn.html
-+ mv frv.html frv-1.html
-+ mv frv-insn.html frv-1-insn.html
-+ make html ARCH=$a MACHS="fr500" INSN_FILE_NAME=frv-2-insn.html
-+ mv frv.html frv-2.html
-+ mv frv-insn.html frv-2-insn.html
-+ make html ARCH=$a MACHS="fr550" INSN_FILE_NAME=frv-3-insn.html
-+ mv frv.html frv-3.html
-+ mv frv-insn.html frv-3-insn.html
-+ ;;
-+ *)
-+ make html ARCH=$a
-+ ;;
-+ esac
-+ done
-+)
-diff -Nur binutils-2.24.orig/cgen/gen-all-opcodes binutils-2.24/cgen/gen-all-opcodes
---- binutils-2.24.orig/cgen/gen-all-opcodes 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/gen-all-opcodes 2016-06-30 21:26:12.657893268 +0200
-@@ -0,0 +1,28 @@
-+#! /bin/sh
-+# Utility script to generate the opcodes files.
-+# This is useful for verifying changes to the generated files.
-+#
-+# Run this script in the src/cgen directory.
-+
-+# Exit on any error.
-+set -e
-+
-+# For debugging.
-+set -x
-+
-+if [ ! -f sim.scm ]
-+then
-+ echo "Not in the src/cgen directory." >& 2
-+ exit 1
-+fi
-+
-+builddir=tmp-opc
-+
-+rm -rf $builddir
-+mkdir $builddir
-+
-+export cgendir=`pwd`
-+
-+cd $builddir
-+$cgendir/../opcodes/configure --prefix /tmp/junk --target m32r-elf --enable-targets=all
-+make run-cgen-all
-diff -Nur binutils-2.24.orig/cgen/gen-all-sid binutils-2.24/cgen/gen-all-sid
---- binutils-2.24.orig/cgen/gen-all-sid 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/gen-all-sid 2016-06-30 21:26:12.657893268 +0200
-@@ -0,0 +1,43 @@
-+#! /bin/sh
-+# Utility script to generate the generated sid files.
-+# This is useful for verifying changes to the generated files.
-+#
-+# Run this script in the src/cgen directory.
-+#
-+# Usage: gen-all-sid /path/to/sid/src
-+
-+# Exit on any error.
-+set -e
-+
-+# For debugging.
-+set -x
-+
-+if [ ! -f sim.scm ]
-+then
-+ echo "Not in the src/cgen directory." >& 2
-+ exit 1
-+fi
-+
-+if [ $# != 1 ]
-+then
-+ echo "Usage: gen-all-sid /path/to/sid/src" >& 2
-+ exit 1
-+fi
-+
-+siddir=$1
-+if [ ! -f $siddir/sid/COPYING.SID ]
-+then
-+ echo "unable to find sid sources in $siddir" >& 2
-+ exit 1
-+fi
-+
-+builddir=tmp-sid
-+
-+rm -rf $builddir
-+mkdir $builddir
-+
-+cd $builddir
-+$siddir/configure --prefix /tmp/junk --enable-ltdl-install
-+make configure-sid
-+cd sid/component/cgen-cpu
-+make cgen-all
-diff -Nur binutils-2.24.orig/cgen/gen-all-sim binutils-2.24/cgen/gen-all-sim
---- binutils-2.24.orig/cgen/gen-all-sim 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/gen-all-sim 2016-06-30 21:26:12.657893268 +0200
-@@ -0,0 +1,84 @@
-+#! /bin/sh
-+# Utility script to generate the sim files for several ports.
-+# This is useful for verifying changes to the generated files
-+# without having to build every tool chain.
-+#
-+# Run this script in the src/cgen directory.
-+
-+# Exit on any error.
-+set -e
-+
-+# For debugging.
-+set -x
-+
-+# fr30 not included, sim has been marked as obsolete.
-+# sh64 not included, not sure which configuration to use.
-+# i960 not included, it's being deleted.
-+cpus="m32r"
-+
-+if [ ! -f sim.scm ]
-+then
-+ echo "Not in the src/cgen directory." >& 2
-+ exit 1
-+fi
-+
-+builddir=tmp-sim
-+
-+export cgendir=`pwd`
-+
-+for c in $cpus
-+do
-+ rm -rf $builddir
-+ mkdir $builddir
-+
-+ case $c in
-+ i960)
-+ (
-+ set -e
-+ set -x
-+ cd $builddir
-+ $cgendir/../sim/i960/configure --prefix /tmp/junk --target i960-coff
-+ make stamp-arch stamp-cpu stamp-desc
-+ )
-+ test $? = 0 || exit 1
-+ ;;
-+
-+ m32r)
-+ (
-+ set -e
-+ set -x
-+ cd $builddir
-+ $cgendir/../sim/m32r/configure --prefix /tmp/junk --target m32r-elf
-+ make stamp-arch stamp-cpu stamp-xcpu
-+ )
-+ test $? = 0 || exit 1
-+ ;;
-+
-+ fr30)
-+ (
-+ set -e
-+ set -x
-+ cd $builddir
-+ $cgendir/../sim/fr30/configure --prefix /tmp/junk --target fr30-elf
-+ make stamp-arch stamp-cpu
-+ )
-+ test $? = 0 || exit 1
-+ ;;
-+
-+ sh64)
-+ (
-+ set -e
-+ set -x
-+ cd $builddir
-+ $cgendir/../sim/sh64/configure --prefix /tmp/junk --target ???
-+ make stamp-all
-+ )
-+ test $? = 0 || exit 1
-+ ;;
-+
-+ *)
-+ echo "unsupported cpu $c" >& 2
-+ exit 1
-+ ;;
-+ esac
-+done
-diff -Nur binutils-2.24.orig/cgen/guile.scm binutils-2.24/cgen/guile.scm
---- binutils-2.24.orig/cgen/guile.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/guile.scm 2016-06-30 21:26:12.657893268 +0200
-@@ -0,0 +1,152 @@
-+; Guile-specific functions.
-+; Copyright (C) 2000, 2004, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+(define *guile-major-version* (string->number (major-version)))
-+(define *guile-minor-version* (string->number (minor-version)))
-+
-+; eval takes a module argument in 1.6 and later
-+
-+(if (or (> *guile-major-version* 1)
-+ (>= *guile-minor-version* 6))
-+ (define (eval1 expr)
-+ (eval expr (current-module)))
-+ (define (eval1 expr)
-+ (eval expr))
-+)
-+
-+; symbol-bound? is deprecated in 1.6
-+
-+(if (or (> *guile-major-version* 1)
-+ (>= *guile-minor-version* 6))
-+ (define (symbol-bound? table s)
-+ (if table
-+ (error "must pass #f for symbol-bound? first arg"))
-+ ; FIXME: Not sure this is 100% correct.
-+ (module-defined? (current-module) s))
-+)
-+
-+(if (symbol-bound? #f 'load-from-path)
-+ (begin
-+ (define (load file)
-+ (begin
-+ ;(load-from-path file)
-+ (primitive-load-path file)
-+ ))
-+ )
-+)
-+
-+; FIXME: to be deleted
-+(define =? =)
-+(define >=? >=)
-+
-+(if (not (symbol-bound? #f '%stat))
-+ (begin
-+ (define %stat stat)
-+ )
-+)
-+
-+(if (symbol-bound? #f 'debug-enable)
-+ (debug-enable 'backtrace)
-+)
-+
-+; Guile 1.3 has reverse!, Guile 1.2 has list-reverse!.
-+; CGEN uses reverse!
-+(if (and (not (symbol-bound? #f 'reverse!))
-+ (symbol-bound? #f 'list-reverse!))
-+ (define reverse! list-reverse!)
-+)
-+
-+(define (debug-write . objs)
-+ (map (lambda (o)
-+ ((if (string? o) display write) o (current-error-port)))
-+ objs)
-+ (newline (current-error-port)))
-+
-+;; Guile 1.8 no longer has "." in %load-path so relative path loads
-+;; no longer work.
-+
-+(if (or (> *guile-major-version* 1)
-+ (>= *guile-minor-version* 8))
-+ (set! %load-path (append %load-path (list ".")))
-+)
-+
-+
-+;;; Enabling and disabling debugging features of the host Scheme.
-+
-+;;; For the initial load proces, turn everything on. We'll disable it
-+;;; before we start doing the heavy computation.
-+(if (memq 'debug-extensions *features*)
-+ (begin
-+ (debug-enable 'backtrace)
-+ (debug-enable 'debug)
-+ (debug-enable 'backwards)
-+ (debug-set! depth 2000)
-+ (debug-set! maxdepth 2000)
-+ (debug-set! stack 100000)
-+ (debug-set! frames 10)))
-+(read-enable 'positions)
-+
-+;;; Call THUNK, with debugging enabled if FLAG is true, or disabled if
-+;;; FLAG is false.
-+;;;
-+;;; (On systems other than Guile, this needn't actually do anything at
-+;;; all, beyond calling THUNK, so long as your backtraces are still
-+;;; helpful. In Guile, the debugging evaluator is slower, so we don't
-+;;; want to use it unless the user asked for it.)
-+(define (cgen-call-with-debugging flag thunk)
-+ (if (memq 'debug-extensions *features*)
-+ ((if flag debug-enable debug-disable) 'debug))
-+
-+ ;; Now, make that debugging / no-debugging setting actually take
-+ ;; effect.
-+ ;;
-+ ;; Guile has two separate evaluators, one that does the extra
-+ ;; bookkeeping for backtraces, and one which doesn't, but runs
-+ ;; faster. However, the evaluation process (in either evaluator)
-+ ;; ordinarily never consults the variable that says which evaluator
-+ ;; to use: whatever evaluator was running just keeps rolling along.
-+ ;; There are certain primitives, like some of the eval variants,
-+ ;; that do actually check. start-stack is one such primitive, but
-+ ;; we don't want to shadow whatever other stack id is there, so we
-+ ;; do all the real work in the ID argument, and do nothing in the
-+ ;; EXP argument. What a kludge.
-+ (start-stack (begin (thunk) #t) #f))
-+
-+
-+;;; Apply PROC to ARGS, marking that application as the bottom of the
-+;;; stack for error backtraces.
-+;;;
-+;;; (On systems other than Guile, this doesn't really need to do
-+;;; anything other than apply PROC to ARGS, as long as something
-+;;; ensures that backtraces will work right.)
-+(define (cgen-debugging-stack-start proc args)
-+
-+ ;; Naming this procedure, rather than using an anonymous lambda,
-+ ;; allows us to pass less fragile cut info to save-stack.
-+ (define (handler . args)
-+ ;;(display args (current-error-port))
-+ ;;(newline (current-error-port))
-+ ;; display-error takes 6 arguments.
-+ ;; If `quit' is called from elsewhere, it may not have 6
-+ ;; arguments. Not sure how best to handle this.
-+ (if (= (length args) 5)
-+ (begin
-+ (apply display-error #f (current-error-port) (cdr args))
-+ ;; Grab a copy of the current stack,
-+ (save-stack handler 0)
-+ (backtrace)))
-+ (quit 1))
-+
-+ ;; Apply proc to args, and if any uncaught exception is thrown, call
-+ ;; handler WITHOUT UNWINDING THE STACK (that's the 'lazy' part). We
-+ ;; need the stack left alone so we can produce a backtrace.
-+ (lazy-catch #t
-+ (lambda ()
-+ ;; I have no idea why the 'load-stack' stack mark is
-+ ;; not still present on the stack; we're still loading
-+ ;; cgen-APP.scm, aren't we? But stack-id returns #f
-+ ;; in handler if we don't do a start-stack here.
-+ (start-stack proc (apply proc args)))
-+ handler))
-diff -Nur binutils-2.24.orig/cgen/hardware.scm binutils-2.24/cgen/hardware.scm
---- binutils-2.24.orig/cgen/hardware.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/hardware.scm 2016-06-30 21:26:12.657893268 +0200
-@@ -0,0 +1,1256 @@
-+; Hardware descriptions.
-+; Copyright (C) 2000, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; This is the base class for all hardware descriptions.
-+; The actual hardware objects inherit from this (e.g. register, immediate).
-+; This is used to describe registers, memory, and immediates.
-+; ??? Maybe other things as well, but this is all that's needed at present.
-+; ??? Eventually rename to <hardware> but not yet.
-+
-+(define <hardware-base>
-+ (class-make '<hardware-base>
-+ '(<ident>)
-+ '(
-+ ; Name used in semantics.
-+ ; This is for cases where a particular hardware element is
-+ ; sufficiently different on different mach's of an architecture
-+ ; that it is defined separately for each case. The semantics
-+ ; refer to this name (which means that one must use a different
-+ ; mechanism if one wants both machs in the same semantic code).
-+ sem-name
-+
-+ ; The type, an object of class <array>.
-+ ; (mode + scalar or vector length)
-+ type
-+
-+ ; Indexing support.
-+ ; An object of class <hw-asm>, or a subclass of it, or
-+ ; #f if there is no special indexing support.
-+ ; For register banks, a table of register names.
-+ ; ??? Same class as VALUES.
-+ ; ??? There are currently no descriptions that require both an
-+ ; INDICES and a VALUES specification. It might make sense to
-+ ; combine them (which is how things used to be), but it is odd
-+ ; to have them combined.
-+ (indices . #f)
-+
-+ ; Table of values.
-+ ; An object of class <hw-asm>, or a subclass of it, or
-+ ; #f if there is no special values support.
-+ ; For immediates with special names, a table of names.
-+ ; ??? Same class as INDICES.
-+ (values . #f)
-+
-+ ; Associative list of (symbol . "handler") entries.
-+ ; Each entry maps an operation to its handler (which is up to
-+ ; the application but is generally a function name).
-+ (handlers . ())
-+
-+ ; Get/set handlers or #f to use the default.
-+ (get . #f)
-+ (set . #f)
-+
-+ ; Associative list of get/set handlers for each supported mode,
-+ ; or #f to use the default.
-+ ; ??? An interesting idea, but not sure it's the best way
-+ ; to go. Another way is to explicitly handle it in the insn
-+ ; [complicates the RTL]. Another way is to handle this in
-+ ; operand get/set handlers. Another way is to have virtual
-+ ; regs for each non-default mode. Not sure which is better.
-+ ;(getters . #f)
-+ ;(setters . #f)
-+
-+ ; List of <isa> objects that use this hardware element
-+ ; or #f if not computed yet.
-+ ; This is a derived from the ISA attribute and is for speed.
-+ (isas-cache . #f)
-+
-+ ; Flag indicates whether this hw has been used in a (delay ...)
-+ ; rtl expression
-+ (used-in-delay-rtl? . #f)
-+ )
-+ nil)
-+)
-+
-+; Accessors
-+
-+(define-getters <hardware-base> hw
-+ (sem-name type indices values handlers
-+ ; ??? These might be more properly named hw-get/hw-set, but those names
-+ ; seem ambiguous.
-+ (get . getter) (set . setter)
-+ isas-cache used-in-delay-rtl?)
-+)
-+
-+; Mode,rank,shape support.
-+
-+(method-make-forward! <hardware-base> 'type '(get-mode get-rank get-shape get-num-elms))
-+(define (hw-mode hw) (send hw 'get-mode))
-+(define (hw-rank hw) (send hw 'get-rank))
-+(define (hw-shape hw) (send hw 'get-shape))
-+(define (hw-num-elms hw) (send hw 'get-num-elms))
-+
-+; Return default mode to reference HW in.
-+
-+(define (hw-default-mode hw)
-+ (hw-mode hw)
-+)
-+
-+; Return a boolean indicating if X is a hardware object.
-+; ??? <hardware-base> to be renamed <hardware> in time.
-+
-+(define (hardware? x) (class-instance? <hardware-base> x))
-+
-+; Return #t if HW is a scalar.
-+
-+(define (hw-scalar? hw) (= (hw-rank hw) 0))
-+
-+; Return number of bits in an element of HW.
-+
-+(define (hw-bits hw)
-+ (type-bits (hw-type hw))
-+)
-+
-+; Generate the name of the enum for hardware object HW.
-+; This uses the semantic name, not obj:name.
-+; If HW is a symbol, it is already the semantic name.
-+
-+(define (hw-enum hw)
-+ (if (symbol? hw)
-+ (string-upcase (string-append "HW_" (gen-c-symbol hw)))
-+ (string-upcase (string-append "HW_" (gen-c-symbol (hw-sem-name hw)))))
-+)
-+
-+; Return a boolean indicating if it's ok to reference SELF in mode
-+; NEW-MODE-NAME, index INDEX.
-+; Hardware types are required to override this method.
-+; VOID and DFLT are never valid for NEW-MODE-NAME.
-+
-+(method-make!
-+ <hardware-base> 'mode-ok?
-+ (lambda (self new-mode-name index)
-+ (error "mode-ok? method not overridden:" (obj:name self)))
-+)
-+
-+(define (hw-mode-ok? hw new-mode-name index)
-+ (send hw 'mode-ok? new-mode-name index)
-+)
-+
-+; Return mode to use for the index or #f if scalar.
-+
-+(method-make!
-+ <hardware-base> 'get-index-mode
-+ (lambda (self)
-+ (error "get-index-mode method not overridden:" (obj:name self)))
-+)
-+
-+(define (hw-index-mode hw) (send hw 'get-index-mode))
-+
-+; Compute the isas used by HW and cache the results.
-+
-+(method-make!
-+ <hardware-base> 'get-isas
-+ (lambda (self)
-+ (or (elm-get self 'isas-cache)
-+ (let* ((isas (obj-attr-value self 'ISA))
-+ (isa-objs (if (equal? isas '(all)) (current-isa-list)
-+ (map current-isa-lookup isas))))
-+ (elm-set! self 'isas-cache isa-objs)
-+ isa-objs)))
-+)
-+
-+(define (hw-isas hw) (send hw 'get-isas))
-+
-+; Was this hardware used in a (delay ...) rtl expression?
-+
-+(method-make!
-+ <hardware-base> 'used-in-delay-rtl?
-+ (lambda (self) (elm-get self 'used-in-delay-rtl?))
-+)
-+
-+(define (hw-used-in-delay-rtl? hw) (send hw 'used-in-delay-rtl?))
-+
-+; FIXME: replace pc?,memory?,register?,iaddress? with just one method.
-+
-+; Return boolean indicating if hardware element is the PC.
-+
-+(method-make! <hardware-base> 'pc? (lambda (self) #f))
-+
-+; Return boolean indicating if hardware element is some kind of memory.
-+; ??? Need to allow multiple kinds of memory and therefore need to allow
-+; .cpu files to specify this (i.e. an attribute). We could use has-attr?
-+; here, or we could have the code that creates the object override this
-+; method if the MEMORY attribute is present.
-+; ??? Could also use a member instead of a method.
-+
-+(method-make! <hardware-base> 'memory? (lambda (self) #f))
-+(define (memory? hw) (send hw 'memory?))
-+
-+; Return boolean indicating if hardware element is some kind of register.
-+
-+(method-make! <hardware-base> 'register? (lambda (self) #f))
-+(define (register? hw) (send hw 'register?))
-+
-+; Return boolean indicating if hardware element is an address.
-+
-+(method-make! <hardware-base> 'address? (lambda (self) #f))
-+(method-make! <hardware-base> 'iaddress? (lambda (self) #f))
-+(define (address? hw) (send hw 'address?))
-+(define (iaddress? hw) (send hw 'iaddress?))
-+
-+; Assembler support.
-+
-+; Baseclass.
-+
-+(define <hw-asm>
-+ (class-make '<hw-asm> '(<ident>)
-+ '(
-+ ; The <mode> object of the mode to use.
-+ ; A copy of the object's mode if we're in the "values"
-+ ; member. If we're in the "indices" member this is typically
-+ ; UINT.
-+ mode
-+ )
-+ nil)
-+)
-+
-+; Keywords.
-+; Keyword lists associate a name with a number and are used for things
-+; like register name tables (the `indices' field of a hw spec) and
-+; immediate value tables (the `values' field of a hw spec).
-+;
-+; TODO: For things like the sparc fp regs, have a quasi-keyword that is
-+; prefix plus number. This will save having to create a table of each
-+; register name.
-+
-+(define <keyword>
-+ (class-make '<keyword> '(<hw-asm>)
-+ '(
-+ ; Prefix value to pass to the corresponding enum.
-+ enum-prefix
-+
-+ ; Prefix of each name in VALUES, as a string.
-+ ; This is *not* prepended to each name in the enum.
-+ name-prefix
-+
-+ ; Associative list of values.
-+ ; Each element is (name value [attrs]).
-+ ; ??? May wish to allow calling a function to compute the
-+ ; value at runtime.
-+ values
-+ )
-+ nil)
-+)
-+
-+; Accessors
-+
-+(define-getters <keyword> kw (mode enum-prefix name-prefix values))
-+
-+; Parse a keyword spec.
-+;
-+; ENUM-PREFIX is for the corresponding enum.
-+; The syntax of VALUES is: (prefix ((name1 [value1 [(attr-list1)]]) ...))
-+; NAME-PREFIX is a prefix added to each value's name in the generated
-+; lookup table.
-+; Each value is a number of mode MODE, the name of the mode.
-+; ??? We have no problem handling any kind of number, we're Scheme.
-+; However, it's not clear yet how applications will want to handle it, but
-+; that is left to the application. Still, it might be preferable to impose
-+; some restrictions which can later be relaxed as necessary.
-+; ??? It would be useful to have two names for each value: asm name, enum name.
-+
-+(define (/keyword-parse context name comment attrs mode enum-prefix
-+ name-prefix values)
-+ ;; Pick out name first to augment the error context.
-+ (let* ((name (parse-name context name))
-+ (context (context-append-name context name))
-+ (enum-prefix (or enum-prefix
-+ (if (equal? (cgen-rtl-version) '(0 7))
-+ (string-upcase (->string name))
-+ (string-append ;; default to NAME-
-+ (string-upcase (->string name))
-+ "-")))))
-+
-+ ;; FIXME: parse values.
-+ (let ((result (make <keyword>
-+ (parse-name context name)
-+ (parse-comment context comment)
-+ (atlist-parse context attrs "")
-+ (parse-mode-name (context-append context ": mode") mode)
-+ (parse-string (context-append context ": enum-prefix")
-+ enum-prefix)
-+ (parse-string (context-append context ": name-prefix")
-+ name-prefix)
-+ values)))
-+ result))
-+)
-+
-+; Read a keyword description
-+; This is the main routine for analyzing a keyword description in the .cpu
-+; file.
-+; CONTEXT is a <context> object for error messages.
-+; ARG-LIST is an associative list of field name and field value.
-+; /keyword-parse is invoked to create the <keyword> object.
-+
-+(define (/keyword-read context . arg-list)
-+ (let (
-+ (name #f)
-+ (comment "")
-+ (attrs nil)
-+ (mode 'INT)
-+ (enum-prefix #f) ;; #f indicates "not set"
-+ (name-prefix "")
-+ (values nil)
-+ )
-+
-+ ; Loop over each element in ARG-LIST, recording what's found.
-+ (let loop ((arg-list arg-list))
-+ (if (null? arg-list)
-+ nil
-+ (let ((arg (car arg-list))
-+ (elm-name (caar arg-list)))
-+ (case elm-name
-+ ((name) (set! name (cadr arg)))
-+ ((comment) (set! comment (cadr arg)))
-+ ((attrs) (set! attrs (cdr arg)))
-+ ((mode) (set! mode (cadr arg)))
-+ ((print-name)
-+ ;; Renamed to enum-prefix in rtl version 0.8.
-+ (if (not (equal? (cgen-rtl-version) '(0 7)))
-+ (parse-error context "print-name renamed to enum-prefix" arg))
-+ (set! enum-prefix (cadr arg)))
-+ ((enum-prefix)
-+ ;; enum-prefix added in rtl version 0.8.
-+ (if (and (= (cgen-rtl-major) 0)
-+ (< (cgen-rtl-minor) 8))
-+ (parse-error context "invalid hardware arg" arg))
-+ (set! enum-prefix (cadr arg)))
-+ ((prefix)
-+ ;; Renamed to name-prefix in rtl version 0.8.
-+ (if (not (equal? (cgen-rtl-version) '(0 7)))
-+ (parse-error context "prefix renamed to name-prefix" arg))
-+ (set! name-prefix (cadr arg)))
-+ ((name-prefix)
-+ ;; name-prefix added in rtl version 0.8.
-+ (if (and (= (cgen-rtl-major) 0)
-+ (< (cgen-rtl-minor) 8))
-+ (parse-error context "invalid hardware arg" arg))
-+ (set! name-prefix (cadr arg)))
-+ ((values) (set! values (cdr arg)))
-+ (else (parse-error context "invalid hardware arg" arg)))
-+ (loop (cdr arg-list)))))
-+
-+ ; Now that we've identified the elements, build the object.
-+ (/keyword-parse context name comment attrs mode
-+ enum-prefix name-prefix values))
-+)
-+
-+; Define a keyword object, name/value pair list version.
-+
-+(define define-keyword
-+ (lambda arg-list
-+ (let ((kw (apply /keyword-read (cons (make-current-context "define-keyword")
-+ arg-list))))
-+ (if kw
-+ (begin
-+ (current-kw-add! kw)
-+ ; Define an enum so the values are usable everywhere.
-+ ; One use is giving names to register numbers and special constants
-+ ; to make periphery C/C++ code more legible.
-+ ; FIXME: Should pass on mode to enum.
-+ (define-full-enum (obj:name kw) (obj:comment kw)
-+ (atlist-source-form (obj-atlist kw))
-+ (if (and (= (cgen-rtl-major) 0)
-+ (< (cgen-rtl-minor) 8))
-+ ;; Prior to rtl version 0.8 we up-cased the prefix here
-+ ;; and added the trailing - ourselves.
-+ (string-upcase (string-append (kw-enum-prefix kw) "-"))
-+ (kw-enum-prefix kw))
-+ (kw-values kw))))
-+ kw))
-+)
-+
-+; Parsing support.
-+
-+; List of hardware types.
-+; This maps names in the `type' entry of define-hardware to the class name.
-+
-+(define /hardware-types
-+ '((register . <hw-register>)
-+ (pc . <hw-pc>)
-+ (memory . <hw-memory>)
-+ (immediate . <hw-immediate>)
-+ (address . <hw-address>)
-+ (iaddress . <hw-iaddress>))
-+)
-+
-+; Parse an inline keyword spec.
-+; These are keywords defined inside something else.
-+; CONTAINER is the <ident> object of the container.
-+; MODE is the name of the mode.
-+
-+(define (/hw-parse-keyword context args container mode)
-+ (if (!= (length args) 2)
-+ (parse-error context "invalid keyword spec" args))
-+
-+ ; Name, comment, and attributes are copied from our container object.
-+ ; They're needed to output the table.
-+ ; ??? This isn't quite right as some day a container may contain multiple
-+ ; keyword instances. To be fixed in time.
-+ (/keyword-parse context (obj:name container) (obj:comment container)
-+ ;; PRIVATE: keyword table is implicitly defined, it isn't
-+ ;; accessible with current-kw-lookup.
-+ (cons 'PRIVATE (atlist-source-form (obj-atlist container)))
-+ mode
-+ ;; This is unused, use a magic value to catch any uses.
-+ "UNUSED"
-+ (car args) ; prefix
-+ (cadr args)) ; value
-+)
-+
-+; Parse an indices spec.
-+; CONTAINER is the <ident> object of the container.
-+; Currently there is only special support for keywords.
-+; Otherwise MODE is used. MODE is the name, not a <mode> object.
-+; The syntax is: (keyword keyword-spec) - see <keyword> for details.
-+
-+(define (/hw-parse-indices context indices container mode)
-+ (if (null? indices)
-+ (make <hw-asm>
-+ (obj:name container) (obj:comment container) (obj-atlist container)
-+ (parse-mode-name (context-append context ": mode") mode))
-+ (begin
-+ (if (not (list? indices))
-+ (parse-error context "invalid indices spec" indices))
-+ (case (car indices)
-+ ((keyword) (/hw-parse-keyword context (cdr indices) container mode))
-+ ((extern-keyword) (begin
-+ (if (null? (cdr indices))
-+ (parse-error context "missing keyword name"
-+ indices))
-+ (let ((kw (current-kw-lookup (cadr indices))))
-+ (if (not kw)
-+ (parse-error context "unknown keyword"
-+ indices))
-+ kw)))
-+ (else (parse-error context "unknown indices type" (car indices))))))
-+)
-+
-+; Parse a values spec.
-+; CONTAINER is the <ident> object of the container.
-+; Currently there is only special support for keywords.
-+; Otherwise MODE is used. MODE is the name, not a <mode> object.
-+; The syntax is: (keyword keyword-spec) - see <keyword> for details.
-+
-+(define (/hw-parse-values context values container mode)
-+ (if (null? values)
-+ (make <hw-asm>
-+ (obj:name container) (obj:comment container) (obj-atlist container)
-+ (parse-mode-name (context-append context ": mode") mode))
-+ (begin
-+ (if (not (list? values))
-+ (parse-error context "invalid values spec" values))
-+ (case (car values)
-+ ((keyword) (/hw-parse-keyword context (cdr values) container mode))
-+ ((extern-keyword) (begin
-+ (if (null? (cdr values))
-+ (parse-error context "missing keyword name"
-+ values))
-+ (let ((kw (current-kw-lookup (cadr values))))
-+ (if (not kw)
-+ (parse-error context "unknown keyword"
-+ values))
-+ kw)))
-+ (else (parse-error context "unknown values type" (car values))))))
-+)
-+
-+; Parse a handlers spec.
-+; Each element is (name "string").
-+
-+(define (/hw-parse-handlers context handlers)
-+ (parse-handlers context '(parse print) handlers)
-+)
-+
-+; Parse a getter spec.
-+; The syntax is (([index]) (expression)).
-+; Omit `index' for scalar objects.
-+; Externally they're specified as `get'. Internally we use `getter'.
-+
-+(define (/hw-parse-getter context getter scalar?)
-+ (if (null? getter)
-+ #f ; use default
-+ (let ((valid "((index) (expression))")
-+ (scalar-valid "(() (expression))"))
-+ (if (or (not (list? getter))
-+ (!= (length getter) 2)
-+ (not (and (list? (car getter))
-+ (= (length (car getter)) (if scalar? 0 1)))))
-+ (parse-error context
-+ (string-append "invalid getter, should be "
-+ (if scalar? scalar-valid valid))
-+ getter))
-+ (if (not (rtx? (cadr getter)))
-+ (parse-error context "invalid rtx expression" getter))
-+ getter))
-+)
-+
-+; Parse a setter spec.
-+; The syntax is (([index] newval) (expression)).
-+; Omit `index' for scalar objects.
-+; Externally they're specified as `set'. Internally we use `setter'.
-+
-+(define (/hw-parse-setter context setter scalar?)
-+ (if (null? setter)
-+ #f ; use default
-+ (let ((valid "((index newval) (expression))")
-+ (scalar-valid "((newval) (expression))"))
-+ (if (or (not (list? setter))
-+ (!= (length setter) 2)
-+ (not (and (list? (car setter))
-+ (= (length (car setter)) (if scalar? 1 2)))))
-+ (parse-error context
-+ (string-append "invalid setter, should be "
-+ (if scalar? scalar-valid valid))
-+ setter))
-+ (if (not (rtx? (cadr setter)))
-+ (parse-error context "invalid rtx expression" setter))
-+ setter))
-+)
-+
-+; Parse hardware description
-+; This is the main routine for building a hardware object from a hardware
-+; description in the .cpu file.
-+; All arguments are in raw (non-evaluated) form.
-+; The result is the parsed object or #f if object isn't for selected mach(s).
-+;
-+; ??? Might want to redo to handle hardware type specific specs more cleanly.
-+; E.g. <hw-immediate> shouldn't have to see get/set specs.
-+
-+(define (/hw-parse context name comment attrs semantic-name type
-+ indices values handlers get set layout)
-+ (logit 2 "Processing hardware element " name " ...\n")
-+
-+ (if (null? type)
-+ (parse-error context "missing hardware type" name))
-+
-+ ;; Pick out name first to augment the error context.
-+ (let* ((name (parse-name context name))
-+ (context (context-append-name context name))
-+ (class-name (assq-ref /hardware-types (car type)))
-+ (atlist-obj (atlist-parse context attrs "cgen_hw")))
-+
-+ (if (not class-name)
-+ (parse-error context "unknown hardware type" type))
-+
-+ (if (keep-atlist? atlist-obj #f)
-+
-+ (let ((result (new (class-lookup class-name))))
-+ (send result 'set-name! name)
-+ (send result 'set-comment! (parse-comment context comment))
-+ (send result 'set-atlist! atlist-obj)
-+ (elm-xset! result 'sem-name semantic-name)
-+ (send result 'parse! context
-+ (cdr type) indices values handlers get set layout)
-+ ; If this is a virtual reg, get/set specs must be provided.
-+ (if (and (obj-has-attr? result 'VIRTUAL)
-+ (not (and (hw-getter result) (hw-setter result))))
-+ (parse-error context "virtual reg requires get/set specs" name))
-+ ; If get or set specs are specified, can't have CACHE-ADDR.
-+ (if (and (obj-has-attr? result 'CACHE-ADDR)
-+ (or (hw-getter result) (hw-setter result)))
-+ (parse-error context "can't have CACHE-ADDR with get/set specs"
-+ name))
-+ result)
-+
-+ (begin
-+ (logit 2 "Ignoring " name ".\n")
-+ #f)))
-+)
-+
-+; Read a hardware description
-+; This is the main routine for analyzing a hardware description in the .cpu
-+; file.
-+; CONTEXT is a <context> object for error messages.
-+; ARG-LIST is an associative list of field name and field value.
-+; /hw-parse is invoked to create the <hardware> object.
-+
-+(define (/hw-read context . arg-list)
-+ (let (
-+ (name nil)
-+ (comment "")
-+ (attrs nil)
-+ (semantic-name nil) ; name used in semantics, default is `name'
-+ (type nil) ; hardware type (register, immediate, etc.)
-+ (indices nil)
-+ (values nil)
-+ (handlers nil)
-+ (get nil)
-+ (set nil)
-+ (layout nil)
-+ )
-+
-+ ; Loop over each element in ARG-LIST, recording what's found.
-+ (let loop ((arg-list arg-list))
-+ (if (null? arg-list)
-+ nil
-+ (let ((arg (car arg-list))
-+ (elm-name (caar arg-list)))
-+ (case elm-name
-+ ((name) (set! name (cadr arg)))
-+ ((comment) (set! comment (cadr arg)))
-+ ((attrs) (set! attrs (cdr arg)))
-+ ((semantic-name) (set! semantic-name (cadr arg)))
-+ ((type) (set! type (cdr arg)))
-+ ((indices) (set! indices (cdr arg)))
-+ ((values) (set! values (cdr arg)))
-+ ((handlers) (set! handlers (cdr arg)))
-+ ((get) (set! get (cdr arg)))
-+ ((set) (set! set (cdr arg)))
-+ ((layout) (set! layout (cdr arg)))
-+ (else (parse-error context "invalid hardware arg" arg)))
-+ (loop (cdr arg-list)))))
-+
-+ ; Now that we've identified the elements, build the object.
-+ (/hw-parse context name comment attrs
-+ (if (null? semantic-name) name semantic-name)
-+ type indices values handlers get set layout))
-+)
-+
-+; Define a hardware object, name/value pair list version.
-+
-+(define define-hardware
-+ (lambda arg-list
-+ (let ((hw (apply /hw-read (cons (make-current-context "define-hardware")
-+ arg-list))))
-+ (if hw
-+ (current-hw-add! hw))
-+ hw))
-+)
-+
-+; Define a hardware object, all arguments specified.
-+
-+(define (define-full-hardware name comment attrs semantic-name type
-+ indices values handlers get set layout)
-+ (let ((hw (/hw-parse (make-current-context "define-full-hardware")
-+ name comment attrs semantic-name type
-+ indices values handlers get set layout)))
-+ (if hw
-+ (current-hw-add! hw))
-+ hw)
-+)
-+
-+; Main routine for modifying existing definitions.
-+
-+(define modify-hardware
-+ (lambda arg-list
-+ (let ((context (make-current-context "modify-hardware")))
-+
-+ ; FIXME: Experiment. This implements the :name/value style by
-+ ; converting it to (name value). In the end there shouldn't be two
-+ ; styles. People might prefer :name/value, but it's not as amenable
-+ ; to macro processing (insert potshots regarding macro usage).
-+ (if (keyword-list? (car arg-list))
-+ (set! arg-list (keyword-list->arg-list arg-list)))
-+
-+ ; First find out which element.
-+ ; There's no requirement that the name be specified first.
-+ (let ((hw-spec (assq 'name arg-list)))
-+ (if (not hw-spec)
-+ (parse-error context "hardware name not specified" arg-list))
-+
-+ (let ((hw (current-hw-lookup (arg-list-symbol-arg context hw-spec))))
-+ (if (not hw)
-+ (parse-error context "undefined hardware element" hw-spec))
-+
-+ ; Process the rest of the args now that we have the affected object.
-+ (let loop ((args arg-list))
-+ (if (null? args)
-+ #f ; done
-+ (let ((arg-spec (car args)))
-+ (case (car arg-spec)
-+ ((name) #f) ; ignore, already processed
-+ ((add-attrs)
-+ (let ((atlist-obj (atlist-parse context (cdr arg-spec)
-+ "cgen_hw")))
-+ ; prepend attrs so new ones override existing ones
-+ (obj-prepend-atlist! hw atlist-obj)))
-+ (else
-+ (parse-error context "invalid/unsupported option"
-+ (car arg-spec))))
-+ (loop (cdr args))))))))
-+
-+ *UNSPECIFIED*)
-+)
-+
-+; Lookup a hardware object using its semantic name.
-+; The result is a list of elements with SEM-NAME.
-+; Callers must deal with cases where there is more than one.
-+
-+(define (current-hw-sem-lookup sem-name)
-+ (find (lambda (hw) (eq? (hw-sem-name hw) sem-name))
-+ (current-hw-list))
-+)
-+
-+; Same as current-hw-sem-lookup, but result is 1 hw element or #f if not
-+; found. An error is signalled if multiple hw elements are found.
-+
-+(define (current-hw-sem-lookup-1 sem-name)
-+ (let ((hw-objs (current-hw-sem-lookup sem-name)))
-+ (case (length hw-objs)
-+ ((0) #f)
-+ ((1) (car hw-objs))
-+ (else (error "ambiguous hardware reference" sem-name))))
-+)
-+
-+; Basic hardware types.
-+; These inherit from `hardware-base'.
-+; ??? Might wish to allow each target to add more, but we provide enough
-+; examples to cover most cpus.
-+
-+; A register (or an array of them).
-+
-+(define <hw-register> (class-make '<hw-register> '(<hardware-base>) nil nil))
-+
-+; Subroutine of -hw-create-[gs]etter-from-layout to validate a layout.
-+; Valid values:
-+; - 0 or 1
-+; - (value length)
-+; - hardware-name
-+
-+(define (/hw-validate-layout context layout width)
-+ (if (not (list? layout))
-+ (parse-error context "layout is not a list" layout))
-+
-+ (let loop ((layout layout) (shift 0))
-+ (if (null? layout)
-+ (begin
-+ ; Done. Now see if number of bits in layout matches total width.
-+ (if (not (= shift width))
-+ (parse-error context (string-append
-+ "insufficient number of bits (need "
-+ (number->string width)
-+ ")")
-+ shift)))
-+ ; Validate next entry.
-+ (let ((val (car layout)))
-+ (cond ((number? val)
-+ (if (not (memq val '(0 1)))
-+ (parse-error context
-+ "non 0/1 layout entry requires length"
-+ val))
-+ (loop (cdr layout) (1+ shift)))
-+ ((pair? val)
-+ (if (or (not (number? (car val)))
-+ (not (pair? (cdr val)))
-+ (not (number? (cadr val)))
-+ (not (null? (cddr val))))
-+ (parse-error context
-+ "syntax error in layout, expecting `(value length)'"
-+ val))
-+ (loop (cdr layout) (+ shift (cadr val))))
-+ ((symbol? val)
-+ (let ((hw (current-hw-lookup val)))
-+ (if (not hw)
-+ (parse-error context "unknown hardware element" val))
-+ (if (not (hw-scalar? hw))
-+ (parse-error context "non-scalar hardware element" val))
-+ (loop (cdr layout)
-+ (+ shift (hw-bits hw)))))
-+ (else
-+ (parse-error context "bad layout element" val))))))
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Return the getter spec to use for LAYOUT.
-+; WIDTH is the width of the combined value in bits.
-+;
-+; Example:
-+; Assuming h-hw[123] are 1 bit registers, and width is 32
-+; given ((0 29) h-hw1 h-hw2 h-hw3), return
-+; (()
-+; (or SI (sll SI (zext SI (reg h-hw1)) 2)
-+; (or SI (sll SI (zext SI (reg h-hw2)) 1)
-+; (zext SI (reg h-hw3)))))
-+
-+(define (/hw-create-getter-from-layout context layout width)
-+ (let ((add-to-res (lambda (result mode-name val shift)
-+ (if (null? result)
-+ (rtx-make 'sll mode-name val shift)
-+ (rtx-make 'or mode-name
-+ (rtx-make 'sll mode-name
-+ (rtx-make 'zext mode-name val)
-+ shift)
-+ result))))
-+ (mode-name (obj:name (mode-find width 'UINT))))
-+ (let loop ((result nil) (layout (reverse layout)) (shift 0))
-+ (if (null? layout)
-+ (list nil result) ; getter spec: (get () (expression))
-+ (let ((val (car layout)))
-+ (cond ((number? val)
-+ ; ignore if zero
-+ (if (= val 0)
-+ (loop result (cdr layout) (1+ shift))
-+ (loop (add-to-res result mode-name val shift)
-+ (cdr layout)
-+ (1+ shift))))
-+ ((pair? val)
-+ ; ignore if zero
-+ (if (= (car val) 0)
-+ (loop result (cdr layout) (+ shift (cadr val)))
-+ (loop (add-to-res result mode-name (car val) shift)
-+ (cdr layout)
-+ (+ shift (cadr val)))))
-+ ((symbol? val)
-+ (let ((hw (current-hw-lookup val)))
-+ (loop (add-to-res result mode-name
-+ (rtx-make 'reg val)
-+ shift)
-+ (cdr layout)
-+ (+ shift (hw-bits hw)))))
-+ (else
-+ (assert (begin "bad layout element" #f))))))))
-+)
-+
-+; Return the setter spec to use for LAYOUT.
-+; WIDTH is the width of the combined value in bits.
-+;
-+; Example:
-+; Assuming h-hw[123] are 1 bit registers,
-+; given (h-hw1 h-hw2 h-hw3), return
-+; ((val)
-+; (sequence ()
-+; (set (reg h-hw1) (and (srl val 2) 1))
-+; (set (reg h-hw2) (and (srl val 1) 1))
-+; (set (reg h-hw3) (and (srl val 0) 1))
-+; ))
-+
-+(define (/hw-create-setter-from-layout context layout width)
-+ (let ((mode-name (obj:name (mode-find width 'UINT))))
-+ (let loop ((sets nil) (layout (reverse layout)) (shift 0))
-+ (if (null? layout)
-+ (list '(val) ; setter spec: (set (val) (expression))
-+ (apply rtx-make (cons 'sequence (cons nil sets))))
-+ (let ((val (car layout)))
-+ (cond ((number? val)
-+ (loop sets (cdr layout) (1+ shift)))
-+ ((pair? val)
-+ (loop sets (cdr layout) (+ shift (cadr val))))
-+ ((symbol? val)
-+ (let ((hw (current-hw-lookup val)))
-+ (loop (cons (rtx-make 'set
-+ (rtx-make 'reg val)
-+ (rtx-make 'and
-+ (rtx-make 'srl 'val shift)
-+ (1- (logsll 1 (hw-bits hw)))))
-+ sets)
-+ (cdr layout)
-+ (+ shift (hw-bits hw)))))
-+ (else
-+ (assert (begin "bad layout element" #f))))))))
-+)
-+
-+; Parse a register spec.
-+; .cpu syntax: (register mode [(dimension)])
-+; or: (register (mode bits) [(dimension)])
-+
-+(method-make!
-+ <hw-register> 'parse!
-+ (lambda (self context type indices values handlers getter setter layout)
-+ (if (or (null? type)
-+ (> (length type) 2))
-+ (parse-error context "invalid register spec" type))
-+ (if (and (= (length type) 2)
-+ (or (not (list? (cadr type)))
-+ (> (length (cadr type)) 1)))
-+ (parse-error context "bad register dimension spec" type))
-+
-+ ; Must parse and set type before analyzing LAYOUT.
-+ (elm-set! self 'type (parse-type context type))
-+
-+ ; LAYOUT is a shorthand way of specifying getter/setter specs.
-+ ; For registers that are just a collection of other registers
-+ ; (e.g. the status register in mips), it's easier to specify the
-+ ; registers that make up the bigger register, rather than to specify
-+ ; get/set specs.
-+ ; We don't override any provided get/set specs though.
-+ (if (not (null? layout))
-+ (let ((width (hw-bits self)))
-+ (/hw-validate-layout context layout width)
-+ (if (null? getter)
-+ (set! getter
-+ (/hw-create-getter-from-layout context layout width)))
-+ (if (null? setter)
-+ (set! setter
-+ (/hw-create-setter-from-layout context layout width)))
-+ ))
-+
-+ (elm-set! self 'indices (/hw-parse-indices context indices self 'UINT))
-+ (elm-set! self 'values (/hw-parse-values context values self
-+ (obj:name (send (elm-get self 'type)
-+ 'get-mode))))
-+ (elm-set! self 'handlers (/hw-parse-handlers context handlers))
-+ (elm-set! self 'get (/hw-parse-getter context getter (hw-scalar? self)))
-+ (elm-set! self 'set (/hw-parse-setter context setter (hw-scalar? self)))
-+ *UNSPECIFIED*)
-+)
-+
-+; Return boolean indicating if hardware element is some kind of register.
-+
-+(method-make! <hw-register> 'register? (lambda (self) #t))
-+
-+; Return a boolean indicating if it's ok to reference SELF in mode
-+; NEW-MODE-NAME, index INDEX.
-+;
-+; ??? INDEX isn't currently used. The intent is to use it if it's a known
-+; value, and otherwise assume for our purposes it's valid and leave any
-+; further error checking to elsewhere.
-+;
-+; ??? This method makes more sense if we support multiple modes via
-+; getters/setters. Maybe we will some day, so this is left as is for now.
-+
-+(method-make!
-+ <hw-register> 'mode-ok?
-+ (lambda (self new-mode-name index)
-+ (let ((cur-mode (send self 'get-mode))
-+ (new-mode (mode:lookup new-mode-name)))
-+ (if (mode:eq? new-mode-name cur-mode)
-+ #t
-+ ; ??? Subject to revisiting.
-+ ; Only allow floats if same mode (which is handled above).
-+ ; Only allow non-widening if ints.
-+ ; On architectures where shortening/widening can refer to a
-+ ; quasi-different register, it is up to the target to handle this.
-+ ; See the comments for the getter/setter/getters/setters class
-+ ; members.
-+ (let ((cur-mode-class (mode:class cur-mode))
-+ (cur-bits (mode:bits cur-mode))
-+ (new-mode-class (mode:class new-mode))
-+ (new-bits (mode:bits new-mode)))
-+ ; Compensate for registers defined with an unsigned mode.
-+ (if (eq? cur-mode-class 'UINT)
-+ (set! cur-mode-class 'INT))
-+ (if (eq? new-mode-class 'UINT)
-+ (set! new-mode-class 'INT))
-+ (if (eq? cur-mode-class 'INT)
-+ (and (eq? new-mode-class cur-mode-class)
-+ (<= new-bits cur-bits))
-+ #f)))))
-+)
-+
-+; Return mode to use for the index or #f if scalar.
-+
-+(method-make!
-+ <hw-register> 'get-index-mode
-+ (lambda (self)
-+ (if (scalar? (hw-type self))
-+ #f
-+ UINT))
-+)
-+
-+; The program counter (PC) hardware register.
-+; This is a separate class as the simulator needs a place to put special
-+; get/set methods.
-+
-+(define <hw-pc> (class-make '<hw-pc> '(<hw-register>) nil nil))
-+
-+; Parse a pc spec.
-+
-+(method-make!
-+ <hw-pc> 'parse!
-+ (lambda (self context type indices values handlers getter setter layout)
-+ (if (not (null? type))
-+ (elm-set! self 'type (parse-type context type))
-+ (elm-set! self 'type (make <scalar> (mode:lookup 'IAI))))
-+ (if (not (null? indices))
-+ (parse-error context "indices specified for pc" indices))
-+ (if (not (null? values))
-+ (parse-error context "values specified for pc" values))
-+ (if (not (null? layout))
-+ (parse-error context "layout specified for pc" values))
-+ ; The initial value of INDICES, VALUES is #f which is what we want.
-+ (elm-set! self 'handlers (/hw-parse-handlers context handlers))
-+ (elm-set! self 'get (/hw-parse-getter context getter (hw-scalar? self)))
-+ (elm-set! self 'set (/hw-parse-setter context setter (hw-scalar? self)))
-+ *UNSPECIFIED*)
-+)
-+
-+; Indicate we're the pc.
-+
-+(method-make! <hw-pc> 'pc? (lambda (self) #t))
-+
-+(define (hw-pc? hw) (send hw 'pc?))
-+
-+; Memory.
-+
-+(define <hw-memory> (class-make '<hw-memory> '(<hardware-base>) nil nil))
-+
-+; Parse a memory spec.
-+; .cpu syntax: (memory mode [(dimension)])
-+; or: (memory (mode bits) [(dimension)])
-+
-+(method-make!
-+ <hw-memory> 'parse!
-+ (lambda (self context type indices values handlers getter setter layout)
-+ (if (or (null? type)
-+ (> (length type) 2))
-+ (parse-error context "invalid memory spec" type))
-+ (if (and (= (length type) 2)
-+ (or (not (list? (cadr type)))
-+ (> (length (cadr type)) 1)))
-+ (parse-error context "bad memory dimension spec" type))
-+ (if (not (null? layout))
-+ (parse-error context "layout specified for memory" values))
-+ (elm-set! self 'type (parse-type context type))
-+ ; Setting INDICES,VALUES here is mostly for experimentation at present.
-+ (elm-set! self 'indices (/hw-parse-indices context indices self 'AI))
-+ (elm-set! self 'values (/hw-parse-values context values self
-+ (obj:name (send (elm-get self 'type)
-+ 'get-mode))))
-+ (elm-set! self 'handlers (/hw-parse-handlers context handlers))
-+ (elm-set! self 'get (/hw-parse-getter context getter (hw-scalar? self)))
-+ (elm-set! self 'set (/hw-parse-setter context setter (hw-scalar? self)))
-+ *UNSPECIFIED*)
-+)
-+
-+; Return boolean indicating if hardware element is some kind of memory.
-+
-+(method-make! <hw-memory> 'memory? (lambda (self) #t))
-+
-+; Return a boolean indicating if it's ok to reference SELF in mode
-+; NEW-MODE-NAME, index INDEX.
-+
-+(method-make!
-+ <hw-memory> 'mode-ok?
-+ (lambda (self new-mode-name index)
-+ ; Allow any mode for now.
-+ #t)
-+)
-+
-+; Return mode to use for the index or #f if scalar.
-+
-+(method-make!
-+ <hw-memory> 'get-index-mode
-+ (lambda (self)
-+ AI)
-+)
-+
-+; Immediate values (numbers recorded in the insn).
-+
-+(define <hw-immediate> (class-make '<hw-immediate> '(<hardware-base>) nil nil))
-+
-+; Parse an immediate spec.
-+; .cpu syntax: (immediate mode)
-+; or: (immediate (mode bits))
-+
-+(method-make!
-+ <hw-immediate> 'parse!
-+ (lambda (self context type indices values handlers getter setter layout)
-+ (if (not (= (length type) 1))
-+ (parse-error context "invalid immediate spec" type))
-+ (elm-set! self 'type (parse-type context type))
-+ ; An array of immediates may be useful some day, but not yet.
-+ (if (not (null? indices))
-+ (parse-error context "indices specified for immediate" indices))
-+ (if (not (null? layout))
-+ (parse-error context "layout specified for immediate" values))
-+ (elm-set! self 'values (/hw-parse-values context values self
-+ (obj:name (send (elm-get self 'type)
-+ 'get-mode))))
-+ (elm-set! self 'handlers (/hw-parse-handlers context handlers))
-+ (if (not (null? getter))
-+ (parse-error context "getter specified for immediate" getter))
-+ (if (not (null? setter))
-+ (parse-error context "setter specified for immediate" setter))
-+ *UNSPECIFIED*)
-+)
-+
-+; Return a boolean indicating if it's ok to reference SELF in mode
-+; NEW-MODE-NAME, index INDEX.
-+
-+(method-make!
-+ <hw-immediate> 'mode-ok?
-+ (lambda (self new-mode-name index)
-+ (let ((cur-mode (send self 'get-mode))
-+ (new-mode (mode:lookup new-mode-name)))
-+ (if (mode:eq? new-mode-name cur-mode)
-+ #t
-+ ; ??? Subject to revisiting.
-+ ; Only allow floats if same mode (which is handled above).
-+ ; For ints allow anything.
-+ (let ((cur-mode-class (mode:class cur-mode))
-+ (new-mode-class (mode:class new-mode)))
-+ (->bool (and (memq cur-mode-class '(INT UINT))
-+ (memq new-mode-class '(INT UINT))))))))
-+)
-+
-+; These are scalars.
-+
-+(method-make!
-+ <hw-immediate> 'get-index-mode
-+ (lambda (self) #f)
-+)
-+
-+; Addresses.
-+; These are usually symbols.
-+
-+(define <hw-address> (class-make '<hw-address> '(<hardware-base>) nil nil))
-+
-+(method-make! <hw-address> 'address? (lambda (self) #t))
-+
-+; Parse an address spec.
-+
-+(method-make!
-+ <hw-address> 'parse!
-+ (lambda (self context type indices values handlers getter setter layout)
-+ (if (not (null? type))
-+ (parse-error context "invalid address spec" type))
-+ (elm-set! self 'type (make <scalar> AI))
-+ (if (not (null? indices))
-+ (parse-error context "indices specified for address" indices))
-+ (if (not (null? values))
-+ (parse-error context "values specified for address" values))
-+ (if (not (null? layout))
-+ (parse-error context "layout specified for address" values))
-+ (elm-set! self 'values (/hw-parse-values context values self
-+ (obj:name (send (elm-get self 'type)
-+ 'get-mode))))
-+ (elm-set! self 'handlers (/hw-parse-handlers context handlers))
-+ (if (not (null? getter))
-+ (parse-error context "getter specified for address" getter))
-+ (if (not (null? setter))
-+ (parse-error context "setter specified for address" setter))
-+ *UNSPECIFIED*)
-+)
-+
-+; Return a boolean indicating if it's ok to reference SELF in mode
-+; NEW-MODE-NAME, index INDEX.
-+
-+(method-make!
-+ <hw-address> 'mode-ok?
-+ (lambda (self new-mode-name index)
-+ ; We currently don't allow referencing an address in any mode other than
-+ ; the original mode.
-+ (mode-compatible? 'samesize new-mode-name (send self 'get-mode)))
-+)
-+
-+; Instruction addresses.
-+; These are treated separately from normal addresses as the simulator
-+; may wish to treat them specially.
-+; FIXME: Doesn't use mode IAI.
-+
-+(define <hw-iaddress> (class-make '<hw-iaddress> '(<hw-address>) nil nil))
-+
-+(method-make! <hw-iaddress> 'iaddress? (lambda (self) #t))
-+
-+; Misc. random hardware support.
-+
-+; Map a mode to a hardware object that can contain immediate values of that
-+; mode.
-+
-+(define (hardware-for-mode mode)
-+ (cond ((mode:eq? mode 'AI) h-addr)
-+ ((mode:eq? mode 'IAI) h-iaddr)
-+ ((mode-signed? mode) h-sint)
-+ ((mode-unsigned? mode) h-uint)
-+ (else (error "Don't know h-object for mode " mode)))
-+)
-+
-+; Called when a cpu-family is read in to set the word sizes.
-+; Must be called after mode-set-word-modes! has been called.
-+
-+(define (hw-update-word-modes!)
-+ (elm-xset! h-addr 'type (make <scalar> (mode:lookup 'AI)))
-+ (elm-xset! h-iaddr 'type (make <scalar> (mode:lookup 'IAI)))
-+)
-+
-+; Builtins, attributes, init/fini support.
-+
-+(define h-memory #f)
-+(define h-sint #f) ;; FIXME: convention says this should be named h-int
-+(define h-uint #f)
-+(define h-addr #f)
-+(define h-iaddr #f)
-+
-+; Called before reading a .cpu file in.
-+
-+(define (hardware-init!)
-+ (reader-add-command! 'define-keyword
-+ "\
-+Define a keyword, name/value pair list version.
-+"
-+ nil 'arg-list define-keyword)
-+ (reader-add-command! 'define-hardware
-+ "\
-+Define a hardware element, name/value pair list version.
-+"
-+ nil 'arg-list define-hardware)
-+ (reader-add-command! 'define-full-hardware
-+ "\
-+Define a hardware element, all arguments specified.
-+"
-+ nil '(name comment attrs semantic-name type
-+ indices values handlers get set layout)
-+ define-full-hardware)
-+ (reader-add-command! 'modify-hardware
-+ "\
-+Modify a hardware element, name/value pair list version.
-+"
-+ nil 'arg-list modify-hardware)
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Install builtin hardware objects.
-+
-+(define (hardware-builtin!)
-+ ; Standard h/w attributes.
-+ (define-attr '(for hardware) '(type boolean) '(name CACHE-ADDR)
-+ '(comment "cache register address during insn extraction"))
-+ ; FIXME: This should be deletable.
-+ (define-attr '(for hardware) '(type boolean) '(name PC)
-+ '(comment "the program counter"))
-+ (define-attr '(for hardware) '(type boolean) '(name PROFILE)
-+ '(comment "collect profiling data"))
-+
-+ (let ((all (all-isas-attr-value)))
-+ ; ??? The program counter, h-pc, used to be defined here.
-+ ; However, some targets need to modify it (e.g. provide special get/set
-+ ; specs). There's still an outstanding issue of how to add things to
-+ ; objects after the fact (e.g. model parameters to instructions), but
-+ ; that's further down the road.
-+ (set! h-memory (define-full-hardware 'h-memory "memory"
-+ `((ISA ,@all))
-+ ; Ensure memory not flagged as a scalar.
-+ 'h-memory '(memory UQI (1)) nil nil nil
-+ nil nil nil))
-+ (set! h-sint (define-full-hardware 'h-sint "signed integer"
-+ `((ISA ,@all))
-+ 'h-sint '(immediate (INT 32)) nil nil nil
-+ nil nil nil))
-+ (set! h-uint (define-full-hardware 'h-uint "unsigned integer"
-+ `((ISA ,@all))
-+ 'h-uint '(immediate (UINT 32)) nil nil nil
-+ nil nil nil))
-+ (set! h-addr (define-full-hardware 'h-addr "address"
-+ `((ISA ,@all))
-+ 'h-addr '(address) nil nil '((print "print_address"))
-+ nil nil nil))
-+ ; Instruction addresses.
-+ ; These are different because the simulator may want to do something
-+ ; special with them, and some architectures treat them differently.
-+ (set! h-iaddr (define-full-hardware 'h-iaddr "instruction address"
-+ `((ISA ,@all))
-+ 'h-iaddr '(iaddress) nil nil '((print "print_address"))
-+ nil nil nil)))
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Called after a .cpu file has been read in.
-+
-+(define (hardware-finish!)
-+ *UNSPECIFIED*
-+)
-diff -Nur binutils-2.24.orig/cgen/html.scm binutils-2.24/cgen/html.scm
---- binutils-2.24.orig/cgen/html.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/html.scm 2016-06-30 21:26:12.657893268 +0200
-@@ -0,0 +1,1054 @@
-+; CPU documentation generator, html output
-+; Copyright (C) 2003, 2009 Doug Evans
-+; This file is part of CGEN. See file COPYING.CGEN for details.
-+;
-+; TODO:
-+; - assumes names, comments, etc. don't interfere with html.
-+; Just like in generation of C there are routines to C-ize symbols,
-+; we need to pass output through an html-izer.
-+; - make generated html more readable, e.g. more indentation
-+; - should really print the semantics in pseudo-C, a much better form for
-+; the intended audience
-+; - registers that have multiple independent fields (like x86 eflags)
-+; need to be printed like instruction formats are
-+; - uses some deprecated html, use css at very least
-+; - multi-ifields ok?
-+; - mapping from operands to h/w isn't as clear as it needs to be
-+; - for insn formats, if field is large consider printing "n ... m",
-+; would want "n" left justified and "m" right justified though
-+; - for insn formats, consider printing them better,
-+; e.g. maybe generate image and include that instead
-+; - need ability to specify more prose for each architecture
-+; - assembler support
-+; - need to add docs to website that can be linked to here, rather than
-+; including generic cgen documentation here
-+; - function units, timing, etc.
-+; - instruction framing
-+
-+; Global state variables.
-+
-+; Specify which application.
-+(set! APPLICATION 'DOC)
-+
-+; String containing copyright text.
-+(define CURRENT-COPYRIGHT #f)
-+
-+; String containing text defining the package we're generating code for.
-+(define CURRENT-PACKAGE #f)
-+
-+(define copyright-doc
-+ (cons "\
-+THIS FILE IS MACHINE GENERATED WITH CGEN.
-+
-+See the input .cpu file(s) for copyright information.
-+"
-+ "\
-+"))
-+
-+; Initialize the options.
-+
-+(define (option-init!)
-+ (set! CURRENT-COPYRIGHT copyright-doc)
-+ (set! CURRENT-PACKAGE package-cgen)
-+ *UNSPECIFIED*
-+)
-+
-+; Handle an option passed in from the command line.
-+
-+(define (option-set! name value)
-+ (case name
-+ ((copyright) (cond ((equal? value '("doc"))
-+ (set! CURRENT-COPYRIGHT copyright-doc))
-+ (else (error "invalid copyright value" value))))
-+ ((package) (cond ((equal? value '("cgen"))
-+ (set! CURRENT-PACKAGE package-cgen))
-+ (else (error "invalid package value" value))))
-+ (else (error "unknown option" name))
-+ )
-+ *UNSPECIFIED*
-+)
-+
-+; Misc utilities.
-+
-+; Return COPYRIGHT, with FILE-DESC as the first line
-+; and PACKAGE as the name of the package which the file belongs in.
-+; COPYRIGHT is a pair of (header . trailer).
-+
-+(define (gen-html-copyright file-desc copyright package)
-+ (string-append "<! " file-desc "\n\n"
-+ (car copyright)
-+ "\n" package "\n"
-+ (cdr copyright)
-+ "\n>\n\n")
-+)
-+
-+; KIND is one of "Architecture" or "Instruction".
-+; TODO: Add author arg so all replies for this arch go to right person.
-+
-+(define (gen-html-header kind)
-+ (let* ((arch (symbol->string (current-arch-name)))
-+ (ARCH (string-upcase arch)))
-+ (string-list
-+ "<!doctype html public \"-//w3c//dtd html 4.0 transitional//en\">\n"
-+ "<html>\n"
-+ "<head>\n"
-+ " <meta http-equiv=\"Content-Type\" content=\"text/html; charset=iso-8859-1\">\n"
-+ " <meta name=\"description\" content=\"" ARCH " " kind " Documentation\">\n"
-+ " <meta name=\"language\" content=\"en-us\">\n"
-+ " <meta name=\"owner\" content=\"dje@sebabeach.org (Doug Evans)\">\n"
-+ " <meta name=\"reply-to\" content=\"dje@sebabeach.org (Doug Evans)\">\n"
-+ " <title>" ARCH " " kind " Documentation</title>\n"
-+ "</head>\n"
-+ "<body bgcolor=\"#F0F0F0\" TEXT=\"#003333\" LINK=\"#FF0000\" VLINK=\"#444444\" alink=\"#000000\">\n"
-+ )
-+ )
-+)
-+
-+(define (gen-html-trailer)
-+ (string-list
-+ "\n"
-+ "<p><hr><p>\n"
-+ "This documentation was machine generated from the cgen cpu description\n"
-+ "files for this architecture.\n"
-+ "<br>\n"
-+ "<a href=\"http://sources.redhat.com/cgen/\">http://sources.redhat.com/cgen/</a>\n"
-+ "</body>\n"
-+ "</html>\n"
-+ )
-+)
-+
-+; INSN-FILE is the name of the .html file containing instruction definitions.
-+
-+(define (gen-table-of-contents insn-file)
-+ (let ((ARCH (string-upcase (symbol->string (current-arch-name)))))
-+ (string-list
-+ "<h1>\n"
-+ (string-append ARCH " Architecture Documentation")
-+ "</h1>\n"
-+ "\n"
-+ "<br>\n"
-+ "DISCLAIMER: This documentation is derived from the cgen cpu description\n"
-+ "of this architecture, and does not represent official documentation\n"
-+ "of the chip maker.\n"
-+ "<p><hr><p>\n"
-+ "\n"
-+ "<ul>\n"
-+ "<li><a href=\"#arch\">Architecture</a></li>\n"
-+ "<li><a href=\"#machines\">Machine variants</a></li>\n"
-+ "<li><a href=\"#models\">Model variants</a></li>\n"
-+ "<li><a href=\"#registers\">Registers</a></li>\n"
-+ "<li><a href=\"" insn-file "#insns\">Instructions</a></li>\n"
-+ "<li><a href=\"" insn-file "#macro-insns\">Macro instructions</a></li>\n"
-+ "<li><a href=\"#assembler\">Assembler supplemental</a></li>\n"
-+ "</ul>\n"
-+ "<br>\n"
-+ ; TODO: Move this to the cgen website, and include a link here.
-+ "In cgen-parlance, an architecture consists of machines and models.\n"
-+ "A `machine' is the specification of a variant of the architecture,\n"
-+ "and a `model' is the implementation of that specification.\n"
-+ "Typically there is a one-to-one correspondance between machine and model.\n"
-+ "The distinction allows for separation of what application programs see\n"
-+ "(the machine), and how to tune for the chip (what the compiler sees).\n"
-+ "<br>\n"
-+ "A \"cpu family\" is a cgen concoction to help organize the generated code.\n"
-+ "Chip variants that are quite dissimilar can be treated separately by the\n"
-+ "generated code even though they're both members of the same architecture.\n"
-+ ))
-+)
-+
-+; Utility to print a list entry for NAME/COMMENT, kind KIND
-+; which is a link to the entry's description.
-+; KIND is one of "mach", "model", etc.
-+
-+(define (gen-list-entry name comment kind)
-+ (string-append "<li>"
-+ "<a href=\"#" kind "-" (->string name) "\">"
-+ (->string name)
-+ " - "
-+ comment
-+ "</a>\n"
-+ "</li>\n")
-+)
-+
-+; Cover-fn to gen-list-entry for use with objects.
-+
-+(define (gen-obj-list-entry o kind)
-+ (gen-list-entry (obj:name o) (obj:comment o) kind)
-+)
-+
-+; Utility to print the header for the description of TEXT.
-+
-+(define (gen-doc-header text anchor-name)
-+ (string-list
-+ "<a name=\"" anchor-name "\"></a>\n"
-+ "<h3>" text "</h3>\n"
-+ )
-+)
-+
-+; Cover-fn to gen-doc-header for use with objects.
-+; KIND is one of "mach", "model", etc.
-+
-+(define (gen-obj-doc-header o kind)
-+ (gen-doc-header (string-append (obj:str-name o) " - " (obj:comment o))
-+ (string-append kind "-" (obj:str-name o)))
-+)
-+
-+; Architecture page.
-+
-+(define (gen-cpu-intro cpu)
-+ (string-list
-+ "<li>\n"
-+ (obj:str-name cpu) " - " (obj:comment cpu) "\n"
-+ "<br>\n"
-+ "<br>\n"
-+ "Machines:\n"
-+ "<ul>\n"
-+ (string-list-map gen-mach-intro
-+ (alpha-sort-obj-list (machs-for-cpu cpu)))
-+ "</ul>\n"
-+ "</li>\n"
-+ "<br>\n"
-+ )
-+)
-+
-+(define (gen-mach-intro mach)
-+ (string-list
-+ "<li>\n"
-+ (obj:str-name mach) " - " (obj:comment mach) "\n"
-+ "<br>\n"
-+ "<br>\n"
-+ "Models:\n"
-+ "<ul>\n"
-+ (string-list-map gen-model-intro
-+ (alpha-sort-obj-list (models-for-mach mach)))
-+ "</ul>\n"
-+ "</li>\n"
-+ "<br>\n"
-+ )
-+)
-+
-+(define (gen-model-intro model)
-+ (string-list
-+ "<li>\n"
-+ (obj:str-name model) " - " (obj:comment model) "\n"
-+ "<br>\n"
-+ "</li>\n"
-+ )
-+)
-+
-+(define (gen-isa-intro isa)
-+ (string-list
-+ "<li>\n"
-+ (obj:str-name isa) " - " (obj:comment isa) "\n"
-+ "<br>\n"
-+ ; FIXME: wip
-+ ; I'd like to include the .cpu file tag here, but using English text
-+ ; feels more appropriate. Having both is excessive.
-+ ; Pick one, and have a link to its description/tag.
-+ ; I'm leaning toward using the cgen tag here as we'll probably want
-+ ; access (via an html tag) to more than one-liner descriptions.
-+ "<ul>\n"
-+ "<li>default-insn-word-bitsize: "
-+ (number->string (isa-default-insn-word-bitsize isa))
-+ "</li>\n"
-+ "<br>\n"
-+ "<li>default-insn-bitsize: "
-+ (number->string (isa-default-insn-bitsize isa))
-+ "</li>\n"
-+ "<br>\n"
-+ "<li>base-insn-bitsize: "
-+ (number->string (isa-base-insn-bitsize isa))
-+ "</li>\n"
-+ "<br>\n"
-+ "<li>decode-assist: "
-+ (string-map (lambda (n) (string-append " " (number->string n)))
-+ (isa-decode-assist isa))
-+ "</li>\n"
-+ "<br>\n"
-+ "<li>decode-splits: "
-+ (string-map (lambda (n) (string-append " " (number->string n)))
-+ (isa-decode-splits isa))
-+ "</li>\n"
-+ "<br>\n"
-+ (if (> (isa-liw-insns isa) 1)
-+ (string-append "<li>liw-insns: "
-+ (number->string (isa-liw-insns isa))
-+ "</li>\n"
-+ "<br>\n")
-+ "")
-+ (if (> (isa-parallel-insns isa) 1)
-+ (string-append "<li>parallel-insns: "
-+ (number->string (isa-parallel-insns isa))
-+ "</li>\n"
-+ "<br>\n")
-+ "")
-+ (if (isa-condition isa)
-+ (string-append "<li>condition-field: "
-+ (symbol->string (car (isa-condition isa)))
-+ "</li>\n"
-+ "<br>\n"
-+ "<li>condition:\n"
-+ "<font size=+2>\n"
-+ "<pre>" ; no trailing newline here on purpose
-+ (with-output-to-string
-+ (lambda ()
-+ (pretty-print (cadr (isa-condition isa)))))
-+ "</pre></font>\n"
-+ "</li>\n"
-+ "<br>\n")
-+ "")
-+ (if (isa-setup-semantics isa)
-+ (string-append "<li>setup-semantics:\n"
-+ "<font size=+2>\n"
-+ "<pre>" ; no trailing newline here on purpose
-+ (with-output-to-string
-+ (lambda ()
-+ (pretty-print (cdr (isa-setup-semantics isa)))))
-+ "</pre></font>\n"
-+ "</li>\n"
-+ "<br>\n")
-+ "")
-+ "</ul>\n"
-+ "</li>\n"
-+ )
-+)
-+
-+(define (gen-arch-intro)
-+ ; NOTE: This includes cpu families.
-+ (let ((ARCH (string-upcase (symbol->string (current-arch-name))))
-+ (isas (current-isa-list))
-+ (cpus (current-cpu-list))
-+ )
-+ (string-list
-+ "\n"
-+ "<hr>\n"
-+ "<a name=\"arch\"></a>\n"
-+ "<h2>" ARCH " Architecture</h2>\n"
-+ "<p>\n"
-+ "This section describes various things about the cgen description of\n"
-+ "the " ARCH " architecture. Familiarity with cgen cpu descriptions\n"
-+ "is assumed.\n"
-+ "<p>\n"
-+ "Bit number orientation (arch.lsb0?): "
-+ (if (current-arch-insn-lsb0?) "lsb = 0" "msb = 0")
-+ "\n"
-+ "<p>\n"
-+ "<h3>ISA description</h3>\n"
-+ ; NOTE: For the normal case there's only one isa, thus specifying it in
-+ ; a list is excessive. Later.
-+ "<p>\n"
-+ "<ul>\n"
-+ (string-list-map gen-isa-intro
-+ (alpha-sort-obj-list isas))
-+ "</ul>\n"
-+ "<p>\n"
-+ "<h3>CPU Families</h3>\n"
-+ "<ul>\n"
-+ (string-list-map gen-cpu-intro
-+ (alpha-sort-obj-list cpus))
-+ "</ul>\n"
-+ ))
-+)
-+
-+; Machine page.
-+
-+(define (gen-machine-doc-1 mach)
-+ (string-list
-+ (gen-obj-doc-header mach "mach")
-+ "<ul>\n"
-+ "<li>\n"
-+ "bfd-name: "
-+ (mach-bfd-name mach)
-+ "\n"
-+ "</li>\n"
-+ "<li>\n"
-+ "isas: "
-+ (string-map (lambda (isa)
-+ (string-append " " (obj:str-name isa)))
-+ (mach-isas mach))
-+ "\n"
-+ "</li>\n"
-+ "</ul>\n"
-+ )
-+)
-+
-+(define (gen-machine-docs)
-+ (let ((machs (alpha-sort-obj-list (current-mach-list))))
-+ (string-list
-+ "\n"
-+ "<hr>\n"
-+ "<a name=\"machines\"></a>\n"
-+ "<h2>Machine variants</h2>\n"
-+ "<ul>\n"
-+ (string-map (lambda (o)
-+ (gen-obj-list-entry o "mach"))
-+ machs)
-+ "</ul>\n"
-+ (string-list-map gen-machine-doc-1 machs)
-+ ))
-+)
-+
-+; Model page.
-+
-+(define (gen-model-doc-1 model)
-+ (string-list
-+ (gen-obj-doc-header model "model")
-+ "<ul>\n"
-+ "</ul>\n"
-+ )
-+)
-+
-+(define (gen-model-docs)
-+ (let ((models (alpha-sort-obj-list (current-model-list))))
-+ (string-list
-+ "\n"
-+ "<hr>\n"
-+ "<a name=\"models\"></a>\n"
-+ "<h2>Model variants</h2>\n"
-+ "<ul>\n"
-+ (string-map (lambda (o)
-+ (gen-obj-list-entry o "model"))
-+ models)
-+ "</ul>\n"
-+ (string-list-map gen-model-doc-1 models)
-+ ))
-+)
-+
-+; Register page.
-+;
-+; TODO: Provide tables of regs for each mach.
-+
-+; Subroutine of gen-reg-doc-1 to simplify it.
-+; Generate a list of names of registers in register array REG.
-+; The catch is that we want to shrink r0,r1,r2,...,r15 to r0...r15.
-+
-+(define (gen-pretty-reg-array-names reg)
-+ ; We currently only support arrays of rank 1 (vectors).
-+ (if (!= (hw-rank reg) 1)
-+ (error "gen-pretty-reg-array-names: unsupported rank" (hw-rank reg)))
-+ (let ((indices (hw-indices reg)))
-+ (if (class-instance? <keyword> indices)
-+ (let ((values (kw-values indices)))
-+ (string-list
-+ "<br>\n"
-+ "names:\n"
-+ "<br>\n"
-+ "<table frame=border border=2>\n"
-+ "<tr>\n"
-+ (string-list-map (lambda (v)
-+ (string-list "<tr>\n"
-+ "<td>"
-+ (car v)
-+ "</td>\n"
-+ "<td>"
-+ (number->string (cadr v))
-+ "</td>\n"
-+ "</tr>\n"))
-+ values)))
-+ ""))
-+)
-+
-+(define (gen-reg-doc-1 reg)
-+ (string-list
-+ (gen-obj-doc-header reg "reg")
-+ "<ul>\n"
-+ "<li>\n"
-+ "machines: "
-+ (string-map (lambda (mach)
-+ (string-append " " (symbol->string mach)))
-+ (obj-attr-value reg 'MACH))
-+ "\n"
-+ "</li>\n"
-+ "<li>\n"
-+ "bitsize: "
-+ (number->string (hw-bits reg))
-+ "\n"
-+ "</li>\n"
-+ (if (not (hw-scalar? reg))
-+ (string-list "<li>\n"
-+ "array: "
-+ (string-map (lambda (dim)
-+ (string-append "[" (number->string dim) "]"))
-+ (hw-shape reg))
-+ "\n"
-+ (gen-pretty-reg-array-names reg)
-+ "</li>\n")
-+ "")
-+ "</ul>\n"
-+ )
-+)
-+
-+(define (gen-register-docs)
-+ (let ((regs (alpha-sort-obj-list (find register? (current-hw-list)))))
-+ (string-list
-+ "\n"
-+ "<hr>\n"
-+ "<a name=\"registers\"></a>\n"
-+ "<h2>Registers</h2>\n"
-+ "<ul>\n"
-+ (string-map (lambda (o)
-+ (gen-obj-list-entry o "reg"))
-+ regs)
-+ "</ul>\n"
-+ (string-list-map gen-reg-doc-1 regs)
-+ ))
-+)
-+
-+; Instruction page.
-+
-+; Generate a diagram typically used to display instruction fields.
-+; OPERANDS is a list of numbers (for constant valued ifields)
-+; or operand names.
-+
-+(define (gen-iformat-table-1 bitnums names operands)
-+ (string-list
-+ "<table frame=border border=2>\n"
-+ "<tr>\n"
-+ (string-list-map (lambda (b)
-+ (string-list "<td>\n"
-+ (string-map (lambda (n)
-+ (string-append " "
-+ (number->string n)))
-+ b)
-+ "\n"
-+ "</td>\n"))
-+ bitnums)
-+ "</tr>\n"
-+ "<tr>\n"
-+ (string-list-map (lambda (n)
-+ (string-list "<td>\n"
-+ n
-+ "\n"
-+ "</td>\n"))
-+ names)
-+ "</tr>\n"
-+ "<tr>\n"
-+ (string-list-map (lambda (o)
-+ (string-list "<td>\n"
-+ (if (number? o)
-+ (string-append "0x"
-+ (number->string o 16))
-+ o)
-+ "\n"
-+ "</td>\n"))
-+ operands)
-+ "</tr>\n"
-+ "</table>\n")
-+)
-+
-+; Compute the list of field bit-numbers for each field.
-+
-+(define (get-ifield-bitnums widths lsb0?)
-+ (let* ((total-width (apply + widths))
-+ (bitnums (iota total-width
-+ (if lsb0? (1- total-width) 0)
-+ (if lsb0? -1 1))))
-+ (let loop ((result '()) (widths widths) (bitnums bitnums))
-+ (if (null? widths)
-+ (reverse! result)
-+ (loop (cons (list-take (car widths) bitnums)
-+ result)
-+ (cdr widths)
-+ (list-drop (car widths) bitnums)))))
-+)
-+
-+; Generate a diagram typically used to display instruction fields.
-+
-+(define (gen-iformat-table insn)
-+ (let* ((lsb0? (current-arch-insn-lsb0?))
-+ (sorted-iflds (sort-ifield-list (insn-iflds insn) (not lsb0?))))
-+ (let ((widths (map ifld-length sorted-iflds))
-+ (names (map obj:name sorted-iflds))
-+ (operands (map (lambda (f)
-+ (if (ifld-constant? f)
-+ (ifld-get-value f)
-+ (obj:name (ifld-get-value f))))
-+ sorted-iflds)))
-+ (gen-iformat-table-1 (get-ifield-bitnums widths lsb0?) names operands)))
-+)
-+
-+(define (gen-insn-doc-1 insn)
-+ (string-list
-+ (gen-obj-doc-header insn "insn")
-+ "<ul>\n"
-+ "<li>\n"
-+ "machines: "
-+ (string-map (lambda (mach)
-+ (string-append " " (symbol->string mach)))
-+ (obj-attr-value insn 'MACH))
-+ "\n"
-+ "</li>\n"
-+ "<br>\n"
-+ "<li>\n"
-+ "syntax: "
-+ "<tt><font size=+2>"
-+ (insn-syntax insn)
-+ "</font></tt>\n"
-+ "</li>\n"
-+ "<br>\n"
-+ "<li>\n"
-+ "format:\n"
-+ (gen-iformat-table insn)
-+ "</li>\n"
-+ "<br>\n"
-+ (if (insn-ifield-assertion insn)
-+ (string-append "<li>\n"
-+ "instruction field constraint:\n"
-+ "<font size=+2>\n"
-+ "<pre>" ; no trailing newline here on purpose
-+ (with-output-to-string
-+ (lambda ()
-+ (pretty-print (insn-ifield-assertion insn))))
-+ "</pre></font>\n"
-+ "</li>\n"
-+ "<br>\n")
-+ "")
-+ "<li>\n"
-+ "semantics:\n"
-+ "<font size=+2>\n"
-+ "<pre>" ; no trailing newline here on purpose
-+ (with-output-to-string
-+ (lambda ()
-+ ; Print the const-folded semantics, computed in `tmp'.
-+ (pretty-print (rtx-trim-for-doc (insn-tmp insn)))))
-+ "</pre></font>\n"
-+ "</li>\n"
-+ ; "<br>\n" ; not present on purpose
-+ (if (not (null? (insn-timing insn)))
-+ (string-list "<li>\n"
-+ "execution unit(s):\n"
-+ "<br>\n"
-+ "<br>\n"
-+ "<ul>\n"
-+ (string-list-map
-+ (lambda (t)
-+ (string-append "<li>\n"
-+ (->string (car t))
-+ ": "
-+ (string-map (lambda (u)
-+ (string-append " "
-+ (obj:str-name (iunit:unit u))))
-+ (timing:units (cdr t)))
-+ "\n"
-+ "</li>\n"))
-+ ; ignore timings for discarded
-+ (find (lambda (t) (not (null? (cdr t))))
-+ (insn-timing insn)))
-+ "</ul>\n"
-+ "</li>\n"
-+ "<br>\n")
-+ "")
-+ "</ul>\n"
-+ )
-+)
-+
-+(define (gen-insn-doc-list mach name comment insns)
-+ (string-list
-+ "<hr>\n"
-+ (gen-doc-header (string-append (obj:str-name mach)
-+ " "
-+ (->string name)
-+ (if (string=? comment "")
-+ ""
-+ (string-append " - " comment)))
-+ (string-append "mach-insns-"
-+ (obj:str-name mach)
-+ "-"
-+ (->string name)))
-+ "<ul>\n"
-+ (string-list-map (lambda (o)
-+ (gen-obj-list-entry o "insn"))
-+ insns)
-+ "</ul>\n"
-+ )
-+)
-+
-+; Return boolean indicating if INSN sets the pc.
-+
-+(define (insn-sets-pc? insn)
-+ (or (obj-has-attr? insn 'COND-CTI)
-+ (obj-has-attr? insn 'UNCOND-CTI)
-+ (obj-has-attr? insn 'SKIP-CTI))
-+)
-+
-+; Traverse the semantics of INSN and return a list of symbols
-+; indicating various interesting properties we find.
-+; This is taken from `semantic-attrs' which does the same thing to find the
-+; CTI attributes.
-+; The result is list of properties computed from the semantics.
-+; The possibilities are: MEM, FPU.
-+
-+(define (get-insn-properties insn)
-+ (logit 2 "Collecting properties of insn " (obj:name insn) " ...\n")
-+
-+ (let*
-+ ((context #f) ; ??? do we need a better context?
-+
-+ ; List of attributes computed from SEM-CODE-LIST.
-+ ; The first element is just a dummy so that append! always works.
-+ (sem-attrs (list #f))
-+
-+ ; Called for expressions encountered in SEM-CODE-LIST.
-+ (process-expr!
-+ (lambda (rtx-obj expr parent-expr op-pos tstate appstuff)
-+ (case (car expr)
-+
-+ ((operand) (if (memory? (op:type (current-op-lookup (rtx-arg1 expr)
-+ (obj-isa-list insn))))
-+ ; Don't change to '(MEM), since we use append!.
-+ (append! sem-attrs (list 'MEM)))
-+ (if (mode-float? (mode:lookup (rtx-mode expr)))
-+ ; Don't change to '(FPU), since we use append!.
-+ (append! sem-attrs (list 'FPU)))
-+ )
-+
-+ ((mem) (append! sem-attrs (list 'MEM)))
-+
-+ ; If this is a syntax expression, the operands won't have been
-+ ; processed, so tell our caller we want it to by returning #f.
-+ ; We do the same for non-syntax expressions to keep things
-+ ; simple. This requires collaboration with the traversal
-+ ; handlers which are defined to do what we want if we return #f.
-+ (else #f))))
-+ )
-+
-+ ; Traverse the expression recording the attributes.
-+ ; We just want the side-effects of computing various properties
-+ ; so we discard the result.
-+
-+ (rtx-traverse context
-+ insn
-+ ; Simplified semantics recorded in the `tmp' field.
-+ (insn-tmp insn)
-+ process-expr!
-+ #f)
-+
-+ ; Drop dummy first arg and remove duplicates.
-+ (nub (cdr sem-attrs) identity))
-+)
-+
-+; Return boolean indicating if PROPS indicates INSN references memory.
-+
-+(define (insn-refs-mem? insn props)
-+ (->bool (memq 'MEM props))
-+)
-+
-+; Return boolean indicating if PROPS indicates INSN uses the fpu.
-+
-+(define (insn-uses-fpu? insn props)
-+ (->bool (memq 'FPU props))
-+)
-+
-+; Ensure INSN has attribute IDOC.
-+; If not specified, guess(?).
-+
-+(define (guess-insn-idoc-attr! insn)
-+ (if (not (obj-attr-present? insn 'IDOC))
-+ (let ((attr #f)
-+ (props (get-insn-properties insn)))
-+ ; Try various heuristics.
-+ (if (and (not attr)
-+ (insn-sets-pc? insn))
-+ (set! attr 'BR))
-+ (if (and (not attr)
-+ (insn-refs-mem? insn props))
-+ (set! attr 'MEM))
-+ (if (and (not attr)
-+ (insn-uses-fpu? insn props))
-+ (set! attr 'FPU))
-+ ; If nothing else works, assume ALU.
-+ (if (not attr)
-+ (set! attr 'ALU))
-+ (obj-cons-attr! insn (enum-attr-make 'IDOC attr))))
-+ *UNSPECIFIED*
-+)
-+
-+; Return subset of insns in IDOC category CAT-NAME.
-+
-+(define (get-insns-for-category insns cat-name)
-+ (find (lambda (insn)
-+ (obj-has-attr-value-no-default? insn 'IDOC cat-name))
-+ insns)
-+)
-+
-+; CATEGORIES is a list of "enum value" elements for each category.
-+; See <enum-attribute> for the definition.
-+; INSNS is already alphabetically sorted and selected for just MACH.
-+
-+(define (gen-categories-insn-lists mach categories insns)
-+ (string-list
-+ ; generate a table of insns for each category
-+ (string-list-map (lambda (c)
-+ (let ((cat-insns (get-insns-for-category insns (enum-val-name c)))
-+ (comment (enum-val-comment c)))
-+ (if (null? cat-insns)
-+ ""
-+ (gen-insn-doc-list mach (enum-val-name c) comment cat-insns))))
-+ categories)
-+ ; lastly, the alphabetical list
-+ (gen-insn-doc-list mach (obj:name mach) (obj:comment mach) insns)
-+ )
-+)
-+
-+; CATEGORIES is a list of "enum value" elements for each category.
-+; See <enum-attribute> for the definition.
-+; INSNS is already alphabetically sorted and selected for just MACH.
-+
-+(define (gen-insn-categories mach categories insns)
-+ (string-list
-+ "<ul>\n"
-+ (string-list-map (lambda (c)
-+ (let ((cat-insns (get-insns-for-category insns (enum-val-name c)))
-+ (comment (enum-val-comment c)))
-+ (if (null? cat-insns)
-+ ""
-+ (string-list
-+ "<li><a href=\"#mach-insns-"
-+ (obj:str-name mach)
-+ "-"
-+ (->string (enum-val-name c))
-+ "\">"
-+ (->string (enum-val-name c))
-+ (if (string=? comment "")
-+ ""
-+ (string-append " - " comment))
-+ "</a></li>\n"
-+ ))))
-+ categories)
-+ "<li><a href=\"#mach-insns-"
-+ (obj:str-name mach)
-+ "-"
-+ (obj:str-name mach)
-+ "\">alphabetically</a></li>\n"
-+ "</ul>\n"
-+ )
-+)
-+
-+; ??? There's an inefficiency here, we compute insns for each mach for each
-+; category twice. Left for later if warranted.
-+
-+(define (gen-insn-docs)
-+ ; First simplify the semantics, e.g. do constant folding.
-+ ; For insns built up from macros, often this will remove a lot of clutter.
-+ (for-each (lambda (insn)
-+ (logit 2 "Simplifying the rtl for insn " (obj:name insn) " ...\n")
-+ (insn-set-tmp! insn (rtx-simplify-insn #f insn)))
-+ (current-insn-list))
-+
-+ (let ((machs (current-mach-list))
-+ (insns (alpha-sort-obj-list (current-insn-list)))
-+ (categories (attr-values (current-attr-lookup 'IDOC))))
-+ ; First, install IDOC attributes for insns that don't specify one.
-+ (for-each guess-insn-idoc-attr! insns)
-+ (string-list
-+ "\n"
-+ "<hr>\n"
-+ "<a name=\"insns\"></a>\n"
-+ "<h2>Instructions</h2>\n"
-+ "Instructions for each machine:\n"
-+ "<ul>\n"
-+; (string-map (lambda (o)
-+; (gen-obj-list-entry o "mach-insns"))
-+; machs)
-+ (string-list-map (lambda (m)
-+ (let ((mach-insns (find (lambda (insn)
-+ (mach-supports? m insn))
-+ insns)))
-+ (string-list "<li>"
-+ (obj:str-name m)
-+ " - "
-+ (obj:comment m)
-+ "</li>\n"
-+ (gen-insn-categories m categories mach-insns)
-+ )))
-+ machs)
-+ "</ul>\n"
-+; (string-list-map (lambda (m)
-+; (gen-insn-doc-list m insns))
-+; machs)
-+ (string-list-map (lambda (m)
-+ (let ((mach-insns (find (lambda (insn)
-+ (mach-supports? m insn))
-+ insns)))
-+ (gen-categories-insn-lists m categories mach-insns)))
-+ machs)
-+ "<hr>\n"
-+ "<h2>Individual instructions descriptions</h2>\n"
-+ "<br>\n"
-+ (string-list-map gen-insn-doc-1 insns)
-+ ))
-+)
-+
-+; Macro-instruction page.
-+
-+(define (gen-macro-insn-doc-1 minsn)
-+ (string-list
-+ (gen-obj-doc-header minsn "macro-insn")
-+ "<ul>\n"
-+ "<li>\n"
-+ "syntax: "
-+ "<tt><font size=+2>"
-+ (minsn-syntax minsn)
-+ "</font></tt>\n"
-+ "</li>\n"
-+ "<br>\n"
-+ "<li>\n"
-+ "transformation:\n"
-+ "<font size=+2>\n"
-+ "<pre>" ; no trailing newline here on purpose
-+ (with-output-to-string
-+ (lambda ()
-+ (pretty-print (minsn-expansions minsn))))
-+ "</pre></font>\n"
-+ "</li>\n"
-+ "</ul>\n"
-+ )
-+)
-+
-+(define (gen-macro-insn-doc-list mach)
-+ (let ((minsns (find (lambda (minsn)
-+ (mach-supports? mach minsn))
-+ (current-minsn-list))))
-+ (string-list
-+ (gen-obj-doc-header mach "mach-macro-insns")
-+ "<ul>\n"
-+ (string-map (lambda (o)
-+ (gen-obj-list-entry o "macro-insn"))
-+ minsns)
-+ "</ul>\n"
-+ ))
-+)
-+
-+(define (gen-macro-insn-docs)
-+ (let ((machs (current-mach-list))
-+ (minsns (alpha-sort-obj-list (current-minsn-list))))
-+ (string-list
-+ "\n"
-+ "<hr>\n"
-+ "<a name=\"macro-insns\"></a>\n"
-+ "<h2>Macro Instructions</h2>\n"
-+ "Macro instructions for each machine:\n"
-+ "<ul>\n"
-+ (string-map (lambda (o)
-+ (gen-obj-list-entry o "mach-macro-insns"))
-+ machs)
-+ "</ul>\n"
-+ (string-list-map gen-macro-insn-doc-list machs)
-+ "<p>\n"
-+ "<h2>Individual macro-instructions descriptions</h2>\n"
-+ "<br>\n"
-+ (string-list-map gen-macro-insn-doc-1 minsns)
-+ ))
-+)
-+
-+; Assembler page.
-+
-+(define (gen-asm-docs)
-+ (string-list
-+ "\n"
-+ "<hr>\n"
-+ "<a name=\"assembler\"></a>\n"
-+ "<h2>Assembler supplemental</h2>\n"
-+ )
-+)
-+
-+; Documentation init,finish,analyzer support.
-+
-+; Initialize any doc specific things before loading the .cpu file.
-+
-+(define (doc-init!)
-+ (desc-init!)
-+ (mode-set-biggest-word-bitsizes!)
-+ *UNSPECIFIED*
-+)
-+
-+; Finish any doc specific things after loading the .cpu file.
-+; This is separate from analyze-data! as cpu-load performs some
-+; consistency checks in between.
-+
-+(define (doc-finish!)
-+ (desc-finish!)
-+ *UNSPECIFIED*
-+)
-+
-+; Compute various needed globals and assign any computed fields of
-+; the various objects. This is the standard routine that is called after
-+; a .cpu file is loaded.
-+
-+(define (doc-analyze!)
-+ (desc-analyze!)
-+
-+ ; If the IDOC attribute isn't defined, provide a default one.
-+ (if (not (current-attr-lookup 'IDOC))
-+ (define-attr
-+ '(for insn)
-+ '(type enum)
-+ '(name IDOC)
-+ '(comment "insn kind for documentation")
-+ '(attrs META)
-+ '(values
-+ (MEM - () "Memory")
-+ (ALU - () "ALU")
-+ (FPU - () "FPU")
-+ (BR - () "Branch")
-+ (MISC - () "Miscellaneous"))))
-+
-+ ; Initialize the rtl->c translator.
-+ (rtl-c-config!)
-+
-+ ; Only include semantic operands when computing the format tables if we're
-+ ; generating operand instance tables.
-+ ; ??? Actually, may always be able to exclude the semantic operands.
-+ ; Still need to traverse the semantics to derive machine computed attributes.
-+ (arch-analyze-insns! CURRENT-ARCH
-+ #t ; include aliases?
-+ #f) ; analyze semantics?
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Top level C code generators
-+
-+; Set by the -N argument.
-+(define *insn-html-file-name* "unspecified.html")
-+
-+(define (cgen.html)
-+ (logit 1 "Generating " (current-arch-name) ".html ...\n")
-+ (string-write
-+ (gen-html-copyright (string-append "Architecture documentation for "
-+ (symbol->string (current-arch-name))
-+ ".")
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ (gen-html-header "Architecture")
-+ (gen-table-of-contents *insn-html-file-name*)
-+ gen-arch-intro
-+ gen-machine-docs
-+ gen-model-docs
-+ gen-register-docs
-+ gen-asm-docs
-+ gen-html-trailer
-+ )
-+)
-+
-+(define (cgen-insn.html)
-+ (logit 1 "Generating " (current-arch-name) "-insn.html ...\n")
-+ (string-write
-+ (gen-html-copyright (string-append "Instruction documentation for "
-+ (symbol->string (current-arch-name))
-+ ".")
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ (gen-html-header "Instruction")
-+ gen-insn-docs
-+ gen-macro-insn-docs
-+ gen-html-trailer
-+ )
-+)
-+
-+; For debugging.
-+
-+(define (cgen-all)
-+ (string-write
-+ cgen.html
-+ cgen-insn.html
-+ )
-+)
-diff -Nur binutils-2.24.orig/cgen/ifield.scm binutils-2.24/cgen/ifield.scm
---- binutils-2.24.orig/cgen/ifield.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/ifield.scm 2016-06-30 21:26:12.657893268 +0200
-@@ -0,0 +1,1255 @@
-+; Instruction fields.
-+; Copyright (C) 2000, 2002, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; The `<ifield>' class.
-+; (pronounced "I-field")
-+;
-+; These describe raw data, little semantic content is attributed to them.
-+; The goal being to avoid interfering with future applications.
-+;
-+; FIXME: Move start, word-offset, word-length into the instruction format?
-+; - would require proper ordering of fields in insns, but that's ok.
-+; (??? though the sparc64 description shows a case where its useful to
-+; not have to worry about instruction ordering - different versions of an
-+; insn take different fields and these fields are passed via a macro)
-+;
-+; ??? One could treat all ifields as being unsigned. They could be thought of
-+; as indices into a table of values, be they signed, unsigned, floating point,
-+; whatever. Just an idea.
-+;
-+; ??? Split into two? One for definition, and one for value.
-+
-+(define <ifield>
-+ (class-make '<ifield>
-+ '(<source-ident>)
-+ '(
-+ ; The mode the raw value is to be interpreted in.
-+ ; This is a <mode> object.
-+ mode
-+
-+ ; A <bitrange> object.
-+ ; This contains the field's offset, start, length, word-length,
-+ ; and orientation (msb==0, lsb==0). The orientation is
-+ ; recorded to keep the <bitrange> object self-contained.
-+ ; Endianness is not recorded.
-+ bitrange
-+
-+ ; Argument to :follows, as an object.
-+ ; FIXME: wip
-+ (follows . #f)
-+
-+ ; ENCODE/DECODE operate on the raw value, absent of any context
-+ ; save `pc' and mode of field.
-+ ; If #f, no special processing is required.
-+ ; ??? It's not clear where the best place to process fields is.
-+ ; An earlier version had insert/extract fields in operands to
-+ ; handle more complicated cases. Following the goal of
-+ ; incremental complication, the special handling for m32r's
-+ ; f-disp8 field is handled entirely here, rather than partially
-+ ; here and partially in the operand.
-+ encode decode
-+
-+ ; Value of field, if there is one, or #f.
-+ ; Possible types are: integer, <operand>, ???
-+ (value . #f)
-+ )
-+ nil)
-+)
-+
-+; {ordinal} is missing on purpose, it's handled at a higher level.
-+; {value},{follows} are missing on purpose.
-+; {value} is handled specially.
-+; {follows} is rarely used.
-+(method-make-make! <ifield>
-+ '(location name comment attrs mode bitrange encode decode))
-+
-+; Accessor fns
-+; ??? `value' is treated specially, needed anymore?
-+
-+(define-getters <ifield> ifld (mode encode decode follows))
-+
-+(define-setters <ifield> ifld (follows))
-+
-+; internal fn
-+(define /ifld-bitrange (elm-make-getter <ifield> 'bitrange))
-+
-+(define (ifld-word-offset f) (bitrange-word-offset (/ifld-bitrange f)))
-+(define (ifld-word-length f) (bitrange-word-length (/ifld-bitrange f)))
-+
-+; Return the mode of the decoded value of <ifield> F.
-+; ??? This is made easy because we require the decode expression to have
-+; an explicit mode.
-+
-+(define (ifld-decode-mode f)
-+ (assert (elm-bound? f 'decode))
-+ (let ((d (ifld-decode f)))
-+ (if d
-+ ;; FIXME: Does this work with canonicalized rtl?
-+ (mode:lookup (cadr (cadr d)))
-+ (ifld-mode f)))
-+)
-+
-+; Return start of ifield.
-+
-+(method-make!
-+ <ifield> 'field-start
-+ (lambda (self)
-+ (bitrange-start (/ifld-bitrange self)))
-+)
-+
-+(define (ifld-start ifld)
-+ (send ifld 'field-start)
-+)
-+
-+(method-make!
-+ <ifield> 'field-length
-+ (lambda (self)
-+ (bitrange-length (elm-get self 'bitrange)))
-+)
-+
-+(define (ifld-length f) (send f 'field-length))
-+
-+; FIXME: It might make things more "readable" if enum values were preserved in
-+; their symbolic form and the get-field-value method did the lookup.
-+
-+(method-make!
-+ <ifield> 'get-field-value
-+ (lambda (self)
-+ (elm-get self 'value))
-+)
-+(define (ifld-get-value self)
-+ (send self 'get-field-value)
-+)
-+(method-make!
-+ <ifield> 'set-field-value!
-+ (lambda (self new-val)
-+ (elm-set! self 'value new-val))
-+)
-+(define (ifld-set-value! self new-val)
-+ (send self 'set-field-value! new-val)
-+)
-+
-+; Return a boolean indicating if X is an <ifield>.
-+
-+(define (ifield? x) (class-instance? <ifield> x))
-+
-+; Return ilk of field as a string.
-+; ("ilk" sounds klunky but "type" is too ambiguous. Here "ilk" means
-+; the kind of the hardware element, enum, etc.)
-+; The result is a character string naming the field type.
-+
-+(define (ifld-ilk fld)
-+ (let ((value (elm-xget fld 'value)))
-+ ; ??? One could require that the `value' field always be an object.
-+ ; I can't get too worked up over it yet.
-+ (if (object? value)
-+ (symbol->string (obj:name value)) ; send 'get-name to fetch the name
-+ "#")) ; # -> "it's a number"
-+)
-+
-+; Generate the name of the enum for instruction field ifld.
-+; If PREFIX? is present and #f, the @ARCH@_ prefix is omitted.
-+
-+(define (ifld-enum ifld . prefix?)
-+ (string-upcase (string-append (if (or (null? prefix?) (car prefix?))
-+ "@ARCH@_"
-+ "")
-+ (gen-sym ifld)))
-+)
-+
-+; Return a boolean indicating if ifield F is an opcode field
-+; (has a constant value).
-+
-+(define (ifld-constant? f)
-+ (number? (ifld-get-value f))
-+; (and (number? (ifld-get-value f))
-+; (if option:reserved-as-opcode?
-+; #t
-+; (not (has-attr? f 'RESERVED))))
-+)
-+
-+; Return a boolean indicating if ifield F is signed.
-+
-+(define (ifld-signed? f)
-+ (eq? (mode:class (ifld-mode f)) 'INT)
-+)
-+
-+; Return a boolean indicating if ifield F is an operand.
-+; FIXME: Should check for operand? or some such.
-+
-+(define (ifld-operand? f) (not (number? (ifld-get-value f))))
-+
-+; Return known value table for rtx-simplify of <ifield> list ifld-list.
-+
-+(define (ifld-known-values ifld-list)
-+ (let ((constant-iflds (find ifld-constant? (ifields-base-ifields ifld-list))))
-+ (map (lambda (f)
-+ (cons (obj:name f)
-+ (rtx-make-const 'INT (ifld-get-value f))))
-+ constant-iflds))
-+)
-+
-+; Return mask to use for a field in <bitrange> CONTAINER.
-+; If the bitrange is outside the range of the field, return 0.
-+; If CONTAINER is #f, use the recorded bitrange.
-+; BASE-LEN, if non-#f, overrides the base insn length of the insn.
-+; BASE-LEN is present for architectures like the m32r where there are insns
-+; smaller than the base insn size (LIW).
-+;
-+; Simplifying restrictions [to be relaxed as necessary]:
-+; - the field must either be totally contained within CONTAINER or totally
-+; outside it, partial overlaps aren't handled
-+; - CONTAINER must be an integral number of bytes, beginning on a
-+; byte boundary [simplifies things]
-+; - both SELF's bitrange and CONTAINER must have the same word length
-+; - LSB0? of SELF's bitrange and CONTAINER must be the same
-+
-+(method-make!
-+ <ifield> 'field-mask
-+ (lambda (self base-len container)
-+ (let* ((container (or container (/ifld-bitrange self)))
-+ (bitrange (/ifld-bitrange self))
-+ (recorded-word-length (bitrange-word-length bitrange))
-+ (word-offset (bitrange-word-offset bitrange)))
-+ (let ((lsb0? (bitrange-lsb0? bitrange))
-+ (start (bitrange-start bitrange))
-+ (length (bitrange-length bitrange))
-+ (word-length (or (and (= word-offset 0) base-len)
-+ recorded-word-length))
-+ (container-word-offset (bitrange-word-offset container))
-+ (container-word-length (bitrange-word-length container)))
-+ (cond
-+ ; must be same lsb0
-+ ((not (eq? lsb0? (bitrange-lsb0? container)))
-+ (error "field-mask: different lsb0? values"))
-+ ((not (= word-length container-word-length))
-+ 0)
-+ ; container occurs after?
-+ ((<= (+ word-offset word-length) container-word-offset)
-+ 0)
-+ ; container occurs before?
-+ ((>= word-offset (+ container-word-offset container-word-length))
-+ 0)
-+ (else
-+ (word-mask start length word-length lsb0? #f))))))
-+)
-+
-+(define (ifld-mask ifld base-len container)
-+ (send ifld 'field-mask base-len container)
-+)
-+
-+; Return VALUE inserted into the field's position.
-+; BASE-LEN, if non-#f, overrides the base insn length of the insn.
-+; BASE-LEN is present for architectures like the m32r where there are insns
-+; smaller than the base insn size (LIW).
-+
-+(method-make!
-+ <ifield> 'field-value
-+ (lambda (self base-len value)
-+ (let* ((bitrange (/ifld-bitrange self))
-+ (recorded-word-length (bitrange-word-length bitrange))
-+ (word-offset (bitrange-word-offset bitrange))
-+ (word-length (or (and (= word-offset 0) base-len)
-+ recorded-word-length)))
-+ (word-value (ifld-start self)
-+ (bitrange-length bitrange)
-+ word-length
-+ (bitrange-lsb0? bitrange) #f
-+ value)))
-+)
-+
-+; FIXME: confusion with ifld-get-value.
-+(define (ifld-value f base-len value)
-+ (send f 'field-value base-len value)
-+)
-+
-+; Return a list of ifields required to compute <ifield> F's value.
-+; Normally this is just F itself. For multi-ifields it will be more.
-+; ??? It can also be more if F's value is derived from other fields but
-+; that isn't supported yet.
-+
-+(method-make!
-+ <ifield> 'needed-iflds
-+ (lambda (self)
-+ (list self))
-+)
-+
-+(define (ifld-needed-iflds f)
-+ (send f 'needed-iflds)
-+)
-+
-+; Extract <ifield> IFLD's value out of VALUE in <insn> INSN.
-+; VALUE is the entire insn's value if it fits in a word, or is a list
-+; of values, one per word (not implemented, sigh).
-+; ??? The instruction's format should specify where the word boundaries are.
-+
-+(method-make!
-+ <ifield> 'field-extract
-+ (lambda (self insn value)
-+ (let ((base-len (insn-base-mask-length insn)))
-+ (word-extract (ifld-start self)
-+ (ifld-length self)
-+ base-len
-+ (ifld-lsb0? self)
-+ #f ; start is msb
-+ value)))
-+)
-+
-+(define (ifld-extract ifld value insn)
-+ (send ifld 'field-extract value insn)
-+)
-+
-+; Return a boolean indicating if bit 0 is the least significant bit.
-+
-+(method-make!
-+ <ifield> 'field-lsb0?
-+ (lambda (self)
-+ (bitrange-lsb0? (/ifld-bitrange self)))
-+)
-+
-+(define (ifld-lsb0? f) (send f 'field-lsb0?))
-+
-+; Return the minimum value of a field.
-+
-+(method-make!
-+ <ifield> 'min-value
-+ (lambda (self)
-+ (case (mode:class (ifld-mode self))
-+ ((INT) (- (integer-expt 2 (- (ifld-length self) 1))))
-+ ((UINT) 0)
-+ (else (error "unsupported mode class" (mode:class (ifld-mode self))))))
-+)
-+
-+; Return the maximum value of a field.
-+
-+(method-make!
-+ <ifield> 'max-value
-+ (lambda (self)
-+ (case (mode:class (ifld-mode self))
-+ ((INT) (- (integer-expt 2 (- (ifld-length self) 1)) 1))
-+ ((UINT) (- (integer-expt 2 (ifld-length self)) 1))
-+ (else (error "unsupported mode class" (mode:class (ifld-mode self))))))
-+)
-+
-+; Create a copy of field F with value VALUE.
-+; VALUE is either ... ???
-+
-+(define (ifld-new-value f value)
-+ (let ((new-f (object-copy f)))
-+ (ifld-set-value! new-f value)
-+ new-f)
-+)
-+
-+; Change the offset of the word containing an ifield to {word-offset}.
-+
-+(method-make!
-+ <ifield> 'set-word-offset!
-+ (lambda (self word-offset)
-+ (let ((bitrange (object-copy (/ifld-bitrange self))))
-+ (bitrange-set-word-offset! bitrange word-offset)
-+ (elm-set! self 'bitrange bitrange)
-+ *UNSPECIFIED*))
-+)
-+(define (ifld-set-word-offset! f word-offset)
-+ (send f 'set-word-offset! word-offset)
-+)
-+
-+; Return a copy of F with new {word-offset}.
-+
-+(define (ifld-new-word-offset f word-offset)
-+ (let ((new-f (object-copy f)))
-+ (ifld-set-word-offset! new-f word-offset)
-+ new-f)
-+)
-+
-+; Return the bit offset of the word after the word <ifield> F is in.
-+; What a `word' here is defined by F in its bitrange.
-+
-+(method-make!
-+ <ifield> 'next-word
-+ (lambda (self)
-+ (let ((br (/ifld-bitrange f)))
-+ (bitrange-next-word br)))
-+)
-+
-+(define (ifld-next-word f) (send f 'next-word))
-+
-+; Return a boolean indicating if <ifield> F1 precedes <ifield> F2.
-+; FIXME: Move into a method as different subclasses will need
-+; different handling.
-+
-+(define (ifld-precedes? f1 f2)
-+ (let ((br1 (/ifld-bitrange f1))
-+ (br2 (/ifld-bitrange f2)))
-+ (cond ((< (bitrange-word-offset br1) (bitrange-word-offset br2))
-+ #t)
-+ ((= (bitrange-word-offset br1) (bitrange-word-offset br2))
-+ (begin
-+ (assert (eq? (bitrange-lsb0? br1) (bitrange-lsb0? br2)))
-+ (assert (= (bitrange-word-length br1) (bitrange-word-length br1)))
-+ ; ??? revisit
-+ (if (bitrange-lsb0? br1)
-+ (> (bitrange-start br1) (bitrange-start br2))
-+ (< (bitrange-start br1) (bitrange-start br2)))))
-+ (else
-+ #f)))
-+)
-+
-+;; Pretty print an ifield, typically for error messages.
-+
-+(method-make!
-+ <ifield> 'pretty-print
-+ (lambda (self)
-+ (string-append "(" (obj:str-name self)
-+ " " (number->string (ifld-start self))
-+ " " (number->string (ifld-length self))
-+ ")"))
-+)
-+
-+(define (ifld-pretty-print f)
-+ (send f 'pretty-print)
-+)
-+
-+; Parse an ifield definition.
-+; This is the main routine for building an ifield object from a
-+; description in the .cpu file.
-+; All arguments are in raw (non-evaluated) form.
-+; The result is the parsed object or #f if object isn't for selected mach(s).
-+;
-+; Two forms of specification are supported, loosely defined as the RISC way
-+; and the CISC way. The reason for the distinction is to simplify ifield
-+; specification of RISC-like cpus.
-+; Note that VLIW's are another way. These are handled like the RISC way, with
-+; the possible addition of instruction framing (which is, surprise surprise,
-+; wip).
-+;
-+; RISC:
-+; WORD-OFFSET and WORD-LENGTH are #f. Insns are assumed to be N copies of
-+; (isa-default-insn-word-bitsize). WORD-OFFSET is computed from START.
-+; START is the offset in bits from the start of the insn.
-+; FLENGTH is the length of the field in bits.
-+;
-+; CISC:
-+; WORD-OFFSET is the offset in bits from the start to the first byte of the
-+; word containing the ifield.
-+; WORD-LENGTH is the length in bits of the word containing the ifield.
-+; START is the starting bit number in the word. Bit numbering is taken from
-+; (current-arch-insn-lsb0?).
-+; FLENGTH is the length in bits of the ifield. It is named that way to avoid
-+; collision with the proc named `length'.
-+;
-+; FIXME: More error checking.
-+
-+(define (/ifield-parse context name comment attrs
-+ word-offset word-length start flength follows
-+ mode encode decode)
-+ (logit 2 "Processing ifield " name " ...\n")
-+
-+ ;; Pick out name first to augment the error context.
-+ (let* ((name (parse-name context name))
-+ (context (context-append-name context name))
-+ (atlist (atlist-parse context attrs "cgen_ifld"))
-+ (isas (atlist-attr-value atlist 'ISA #f)))
-+
-+ ; No longer ensure only one isa specified.
-+ ;(if (!= (length isas) 1)
-+ ; (parse-error context "can only specify 1 isa" attrs))
-+
-+ (if (not (eq? (->bool word-offset)
-+ (->bool word-length)))
-+ (parse-error context "either both or neither of word-offset,word-length can be specified"))
-+
-+ (if (keep-isa-atlist? atlist #f)
-+
-+ (let ((isa (current-isa-lookup (car isas)))
-+ (word-offset (and word-offset
-+ (parse-number context word-offset '(0 . 256))))
-+ (word-length (and word-length
-+ (parse-number context word-length '(0 . 128))))
-+ ; ??? 0.127 for now
-+ (start (parse-number context start '(0 . 127)))
-+ ; ??? 0.127 for now
-+ (flength (parse-number context flength '(0 . 127)))
-+ (lsb0? (current-arch-insn-lsb0?))
-+ (mode-obj (parse-mode-name context mode))
-+ (follows-obj (/ifld-parse-follows context follows isas))
-+ )
-+
-+ ; Calculate the <bitrange> object.
-+ ; ??? Move positional info to format?
-+ (let ((bitrange
-+ (if word-offset
-+
-+ ; CISC-like. Easy. Everything must be specified.
-+ (make <bitrange>
-+ word-offset start flength word-length lsb0?)
-+
-+ ; RISC-like. Hard. Have to make best choice of start,
-+ ; flength. This doesn't have to be perfect, just easily
-+ ; explainable. Cases this doesn't handle can explicitly
-+ ; specify word-offset,word-length.
-+ ; One can certainly argue the choice of the term
-+ ; "RISC-like" is inaccurate. Perhaps.
-+ (let* ((diwb (isa-default-insn-word-bitsize isa))
-+ (word-offset (/get-ifld-word-offset start flength diwb lsb0?))
-+ (word-length (/get-ifld-word-length start flength diwb lsb0?))
-+ (start (- start word-offset))
-+ )
-+ (make <bitrange>
-+ word-offset
-+ start
-+ flength
-+ word-length
-+ lsb0?))))
-+ )
-+
-+ (let ((result
-+ (make <ifield>
-+ (context-location context)
-+ name
-+ (parse-comment context comment)
-+ atlist
-+ mode-obj
-+ bitrange
-+ (/ifld-parse-encode context encode)
-+ (/ifld-parse-decode context decode))))
-+ (if follows-obj
-+ (ifld-set-follows! result follows-obj))
-+ result)))
-+
-+ ; Else ignore entry.
-+ (begin
-+ (logit 2 "Ignoring " name ".\n")
-+ #f)))
-+)
-+
-+; Subroutine of /ifield-parse to simplify it.
-+; Given START,FLENGTH, return the "best" choice for the offset to the word
-+; containing the ifield.
-+; This is easy to visualize, hard to put into words.
-+; Imagine several words of size DIWB laid out from the start of the insn.
-+; On top of that lay the ifield.
-+; Now pick the minimal set of words that are required to contain the ifield.
-+; That's what we want.
-+; No claim is made that this is always the correct choice for any
-+; particular architecture. For those where this isn't correct, the ifield
-+; must be fully specified (i.e. word-offset,word-length explicitly specified).
-+
-+(define (/get-ifld-word-offset start flength diwb lsb0?)
-+ (if lsb0?
-+ ; Convert to non-lsb0 case, then it's easy.
-+ ; NOTE: The conversion is seemingly wrong because `start' is misnamed.
-+ ; It's now `end'.
-+ (set! start (+ (- start flength) 1)))
-+ (- start (remainder start diwb))
-+)
-+
-+; Subroutine of /ifield-parse to simplify it.
-+; Given START,FLENGTH, return the "best" choice for the length of the word
-+; containing the ifield.
-+; DIWB = default insn word bitsize
-+; See -get-ifld-word-offset for more info.
-+
-+(define (/get-ifld-word-length start flength diwb lsb0?)
-+ (if lsb0?
-+ ; Convert to non-lsb0 case, then it's easy.
-+ ; NOTE: The conversion is seemingly wrong because `start' is misnamed.
-+ ; It's now `end'.
-+ (set! start (+ (- start flength) 1)))
-+ (* (quotient (+ (remainder start diwb) flength (- diwb 1))
-+ diwb)
-+ diwb)
-+)
-+
-+; Read an instruction field description.
-+; This is the main routine for analyzing instruction fields in the .cpu file.
-+; CONTEXT is a <context> object for error messages.
-+; ARG-LIST is an associative list of field name and field value.
-+; /ifield-parse is invoked to create the <ifield> object.
-+
-+(define (/ifield-read context . arg-list)
-+ (let (
-+ (name #f)
-+ (comment "")
-+ (attrs nil)
-+ (word-offset #f)
-+ (word-length #f)
-+ (start 0)
-+ ; FIXME: Hobbit computes the wrong symbol for `length'
-+ ; in the `case' expression below because there is a local var
-+ ; of the same name ("__1" gets appended to the symbol name).
-+ ; As a workaround we name it "length-".
-+ (length- 0)
-+ (follows #f)
-+ (mode 'UINT)
-+ (encode #f)
-+ (decode #f)
-+ )
-+
-+ ; Loop over each element in ARG-LIST, recording what's found.
-+ (let loop ((arg-list arg-list))
-+ (if (null? arg-list)
-+ nil
-+ (let ((arg (car arg-list))
-+ (elm-name (caar arg-list)))
-+ (case elm-name
-+ ((name) (set! name (cadr arg)))
-+ ((comment) (set! comment (cadr arg)))
-+ ((attrs) (set! attrs (cdr arg)))
-+ ((mode) (set! mode (cadr arg)))
-+ ((word-offset) (set! word-offset (cadr arg)))
-+ ((word-length) (set! word-length (cadr arg)))
-+ ((start) (set! start (cadr arg)))
-+ ((length) (set! length- (cadr arg)))
-+ ((follows) (set! follows (cadr arg)))
-+ ((encode) (set! encode (cdr arg)))
-+ ((decode) (set! decode (cdr arg)))
-+ (else (parse-error context "invalid ifield arg" arg)))
-+ (loop (cdr arg-list)))))
-+
-+ ; See if encode/decode were specified as "unspecified".
-+ ; This happens with shorthand macros.
-+ (if (and (pair? encode)
-+ (eq? (car encode) #f))
-+ (set! encode #f))
-+ (if (and (pair? decode)
-+ (eq? (car decode) #f))
-+ (set! decode #f))
-+
-+ ; Now that we've identified the elements, build the object.
-+ (/ifield-parse context name comment attrs
-+ word-offset word-length start length- follows
-+ mode encode decode))
-+)
-+
-+; Parse a `follows' spec.
-+
-+(define (/ifld-parse-follows context follows isas)
-+ (if follows
-+ (let ((follows-obj (current-op-lookup follows isas)))
-+ (if (not follows-obj)
-+ (parse-error context "unknown operand to follow" follows))
-+ follows-obj)
-+ #f)
-+)
-+
-+; Do common parts of <ifield> encode/decode processing.
-+
-+(define (/ifld-parse-encode-decode context which value)
-+ (if value
-+ (begin
-+ (if (or (not (list? value))
-+ (not (= (length value) 2))
-+ (not (list? (car value)))
-+ (not (= (length (car value)) 2))
-+ (not (list? (cadr value))))
-+ (parse-error context
-+ (string-append "bad ifield " which " spec")
-+ value))
-+ (if (or (not (> (length (cadr value)) 2))
-+ (not (mode:lookup (cadr (cadr value)))))
-+ (parse-error context
-+ (string-append which " expression must have a mode")
-+ value))))
-+ value
-+)
-+
-+; Parse an <ifield> encode spec.
-+
-+(define (/ifld-parse-encode context encode)
-+ (/ifld-parse-encode-decode context "encode" encode)
-+)
-+
-+; Parse an <ifield> decode spec.
-+
-+(define (/ifld-parse-decode context decode)
-+ (/ifld-parse-encode-decode context "decode" decode)
-+)
-+
-+; Define an instruction field object, name/value pair list version.
-+
-+(define define-ifield
-+ (lambda arg-list
-+ (let ((f (apply /ifield-read (cons (make-current-context "define-ifield")
-+ arg-list))))
-+ (if f
-+ (current-ifld-add! f))
-+ f))
-+)
-+
-+; Define an instruction field object, all arguments specified.
-+; ??? Leave out word-offset,word-length,follows for now (RISC version).
-+; FIXME: Eventually this should be fixed to take *all* arguments.
-+
-+(define (define-full-ifield name comment attrs start length mode encode decode)
-+ (let ((f (/ifield-parse (make-current-context "define-full-ifield")
-+ name comment attrs
-+ #f #f start length #f mode encode decode)))
-+ (if f
-+ (current-ifld-add! f))
-+ f)
-+)
-+
-+(define (/ifield-add-commands!)
-+ (reader-add-command! 'define-ifield
-+ "\
-+Define an instruction field, name/value pair list version.
-+"
-+ nil 'arg-list define-ifield)
-+ (reader-add-command! 'define-full-ifield
-+ "\
-+Define an instruction field, all arguments specified.
-+"
-+ nil '(name comment attrs start length mode encode decode)
-+ define-full-ifield)
-+ (reader-add-command! 'define-multi-ifield
-+ "\
-+Define an instruction multi-field, name/value pair list version.
-+"
-+ nil 'arg-list define-multi-ifield)
-+ (reader-add-command! 'define-full-multi-ifield
-+ "\
-+Define an instruction multi-field, all arguments specified.
-+"
-+ nil '(name comment attrs mode subflds insert extract)
-+ define-full-multi-ifield)
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Instruction fields consisting of multiple parts.
-+
-+(define <multi-ifield>
-+ (class-make '<multi-ifield>
-+ '(<ifield>)
-+ '(
-+ ; List of <ifield> objects.
-+ subfields
-+ ; rtl to set SUBFIELDS from self
-+ insert
-+ ; rtl to set self from SUBFIELDS
-+ extract
-+ )
-+ nil)
-+)
-+
-+(method-make-make! <multi-ifield> '(name comment attrs
-+ mode bitrange encode decode
-+ subfields insert extract))
-+
-+; Accessors
-+
-+(define-getters <multi-ifield> multi-ifld
-+ (subfields insert extract)
-+)
-+
-+; Return a boolean indicating if X is an <ifield>.
-+
-+(define (multi-ifield? x) (class-instance? <multi-ifield> x))
-+
-+(define (non-multi-ifields ifld-list)
-+ (find (lambda (ifld) (not (multi-ifield? ifld))) ifld-list)
-+)
-+
-+(define (non-derived-ifields ifld-list)
-+ (find (lambda (ifld) (not (derived-ifield? ifld))) ifld-list)
-+)
-+
-+; Return the starting bit number of the first field.
-+
-+(method-make!
-+ <multi-ifield> 'field-start
-+ (lambda (self)
-+ (apply min (map (lambda (f) (ifld-start f)) (elm-get self 'subfields))))
-+)
-+
-+; Return the total length.
-+
-+(method-make!
-+ <multi-ifield> 'field-length
-+ (lambda (self)
-+ (apply + (map ifld-length (elm-get self 'subfields))))
-+)
-+
-+; Return the bit offset of the word after the last word SELF is in.
-+; What a `word' here is defined by subfields in their bitranges.
-+
-+(method-make!
-+ <multi-ifield> 'next-word
-+ (lambda (self)
-+ (apply max (map (lambda (f)
-+ (bitrange-next-word (/ifld-bitrange f)))
-+ (multi-ifld-subfields self))))
-+)
-+
-+; Return mask of field in bitrange CONTAINER.
-+
-+(method-make!
-+ <multi-ifield> 'field-mask
-+ (lambda (self base-len container)
-+ (apply + (map (lambda (f) (ifld-mask f base-len container)) (elm-get self 'subfields))))
-+)
-+
-+; Return VALUE inserted into the field's position.
-+; The value is spread out over the various subfields in sorted order.
-+; We assume the subfields have been sorted by starting bit position.
-+
-+(method-make!
-+ <multi-ifield> 'field-value
-+ (lambda (self base-len value)
-+ (apply + (map (lambda (f) (ifld-value f base-len value)) (elm-get self 'subfields))))
-+)
-+
-+; Return a list of ifields required to compute the field's value.
-+
-+(method-make!
-+ <multi-ifield> 'needed-iflds
-+ (lambda (self)
-+ (cons self (elm-get self 'subfields)))
-+)
-+
-+; Extract <ifield> IFLD's value out of VALUE in <insn> INSN.
-+; VALUE is the entire insn's value if it fits in a word, or is a list
-+; of values, one per word (not implemented, sigh).
-+; ??? The instruction's format should specify where the word boundaries are.
-+
-+(method-make!
-+ <multi-ifield> 'field-extract
-+ (lambda (self insn value)
-+ (let* ((subflds (sort-ifield-list (elm-get self 'subfields)
-+ (not (ifld-lsb0? self))))
-+ (subvals (map (lambda (subfld)
-+ (ifld-extract subfld insn value))
-+ subflds))
-+ )
-+ ; We have each subfield's value, now concatenate them.
-+ (letrec ((plus-scan (lambda (lengths current)
-+ ; do the -1 drop here as it's easier
-+ (if (null? (cdr lengths))
-+ nil
-+ (cons current
-+ (plus-scan (cdr lengths)
-+ (+ current (car lengths))))))))
-+ (apply + (map logsll
-+ subvals
-+ (plus-scan (map ifld-length subflds) 0))))))
-+)
-+
-+; Return a boolean indicating if bit 0 is the least significant bit.
-+
-+(method-make!
-+ <multi-ifield> 'field-lsb0?
-+ (lambda (self)
-+ (ifld-lsb0? (car (elm-get self 'subfields))))
-+)
-+
-+;; Pretty print a multi-ifield, typically for error messages.
-+
-+(method-make!
-+ <multi-ifield> 'pretty-print
-+ (lambda (self)
-+ (string-append "(" (obj:str-name self)
-+ (string-map (lambda (f)
-+ (string-append " " (ifld-pretty-print f)))
-+ (elm-get self 'subfields))
-+ ")"))
-+)
-+
-+; Multi-ifield parsing.
-+
-+; Subroutine of /multi-ifield-parse to build the default insert expression.
-+
-+(define (/multi-ifield-make-default-insert container-name subfields)
-+ (let* ((lengths (map ifld-length subfields))
-+ (shifts (list-tail-drop 1 (plus-scan (cons 0 lengths)))))
-+ ; Build RTL expression to shift and mask each ifield into right spot.
-+ (let ((exprs (map (lambda (f length shift)
-+ (rtx-make 'and (rtx-make 'srl container-name shift)
-+ (mask length)))
-+ subfields lengths shifts)))
-+ ; Now set each ifield with their respective values.
-+ (apply rtx-make (cons 'sequence
-+ (cons nil
-+ (map (lambda (f expr)
-+ (rtx-make-set f expr))
-+ subfields exprs))))))
-+)
-+
-+; Subroutine of /multi-ifield-parse to build the default extract expression.
-+
-+(define (/multi-ifield-make-default-extract container-name subfields)
-+ (let* ((lengths (map ifld-length subfields))
-+ (shifts (list-tail-drop 1 (plus-scan (cons 0 lengths)))))
-+ ; Build RTL expression to shift and mask each ifield into right spot.
-+ (let ((exprs (map (lambda (f length shift)
-+ (rtx-make 'sll (rtx-make 'and (obj:name f)
-+ (mask length))
-+ shift))
-+ subfields lengths shifts)))
-+ ; Now set {container-name} with all the values or'd together.
-+ (rtx-make-set container-name
-+ (rtx-combine 'or exprs))))
-+)
-+
-+; Parse a multi-ifield spec.
-+; This is the main routine for building the object from the .cpu file.
-+; All arguments are in raw (non-evaluated) form.
-+; The result is the parsed object or #f if object isn't for selected mach(s).
-+
-+(define (/multi-ifield-parse context name comment attrs mode
-+ subfields insert extract encode decode)
-+ (logit 2 "Processing multi-ifield element " name " ...\n")
-+
-+ (if (null? subfields)
-+ (parse-error context "empty subfield list" subfields))
-+
-+ ;; Pick out name first to augment the error context.
-+ (let* ((name (parse-name context name))
-+ (context (context-append-name context name))
-+ (atlist (atlist-parse context attrs "cgen_ifld"))
-+ (isas (atlist-attr-value atlist 'ISA #f)))
-+
-+ ; No longer ensure only one isa specified.
-+ ; (if (!= (length isas) 1)
-+ ; (parse-error context "can only specify 1 isa" attrs))
-+
-+ (if (keep-isa-atlist? atlist #f)
-+
-+ (begin
-+ (let ((result (new <multi-ifield>))
-+ (subfields (map (lambda (subfld)
-+ (let ((f (current-ifld-lookup subfld)))
-+ (if (not f)
-+ (parse-error context "unknown ifield"
-+ subfld))
-+ f))
-+ subfields)))
-+
-+ (elm-xset! result 'name name)
-+ (elm-xset! result 'comment (parse-comment context comment))
-+ (elm-xset! result 'attrs
-+ ;; multi-ifields are always VIRTUAL
-+ (atlist-parse context (cons 'VIRTUAL attrs)
-+ "multi-ifield"))
-+ (elm-xset! result 'mode (parse-mode-name context mode))
-+ (elm-xset! result 'encode (/ifld-parse-encode context encode))
-+ (elm-xset! result 'decode (/ifld-parse-encode context decode))
-+ (elm-xset! result 'bitrange "multi-ifields don't have bitranges") ;; FIXME
-+ (if insert
-+ (elm-xset! result 'insert insert)
-+ (elm-xset! result 'insert
-+ (/multi-ifield-make-default-insert name subfields)))
-+ (if extract
-+ (elm-xset! result 'extract extract)
-+ (elm-xset! result 'extract
-+ (/multi-ifield-make-default-extract name subfields)))
-+ (elm-xset! result 'subfields subfields)
-+ result))
-+
-+ ; else don't keep isa
-+ #f))
-+)
-+
-+; Read an instruction multi-ifield.
-+; This is the main routine for analyzing multi-ifields in the .cpu file.
-+; CONTEXT is a <context> object for error messages.
-+; ARG-LIST is an associative list of field name and field value.
-+; /multi-ifield-parse is invoked to create the `multi-ifield' object.
-+
-+(define (/multi-ifield-read context . arg-list)
-+ (let (
-+ (name nil)
-+ (comment "")
-+ (attrs nil)
-+ (mode 'UINT)
-+ (subflds nil)
-+ (insert #f)
-+ (extract #f)
-+ (encode #f)
-+ (decode #f)
-+ )
-+
-+ ; Loop over each element in ARG-LIST, recording what's found.
-+ (let loop ((arg-list arg-list))
-+ (if (null? arg-list)
-+ nil
-+ (let ((arg (car arg-list))
-+ (elm-name (caar arg-list)))
-+ (case elm-name
-+ ((name) (set! name (cadr arg)))
-+ ((comment) (set! comment (cadr arg)))
-+ ((attrs) (set! attrs (cdr arg)))
-+ ((mode) (set! mode (cadr arg)))
-+ ((subfields) (set! subflds (cdr arg)))
-+ ((insert) (set! insert (cadr arg)))
-+ ((extract) (set! extract (cadr arg)))
-+ ((encode) (set! encode (cdr arg)))
-+ ((decode) (set! decode (cdr arg)))
-+ (else (parse-error context "invalid ifield arg" arg)))
-+ (loop (cdr arg-list)))))
-+
-+ ; Now that we've identified the elements, build the object.
-+ (/multi-ifield-parse context name comment attrs mode subflds
-+ insert extract encode decode))
-+)
-+
-+; Define an instruction multi-field object, name/value pair list version.
-+
-+(define define-multi-ifield
-+ (lambda arg-list
-+ (let ((f (apply /multi-ifield-read (cons (make-current-context "define-multi-ifield")
-+ arg-list))))
-+ (if f
-+ (current-ifld-add! f))
-+ f))
-+)
-+
-+; Define an instruction multi-field object, all arguments specified.
-+; FIXME: encode/decode arguments are missing.
-+
-+(define (define-full-multi-ifield name comment attrs mode subflds insert extract)
-+ (let ((f (/multi-ifield-parse (make-current-context "define-full-multi-ifield")
-+ name comment attrs
-+ mode subflds insert extract #f #f)))
-+ (current-ifld-add! f)
-+ f)
-+)
-+
-+; Derived ifields (ifields based on one or more other ifields).
-+; These support the complicated requirements of CISC instructions
-+; where one "ifield" is actually a placeholder for an addressing mode
-+; which can consist of several ifields.
-+; These are also intended to support other complex ifield usage.
-+;
-+; Derived ifields are (currently) always machine generated from other
-+; elements of the description file so there is no reader support.
-+;
-+; ??? experimental and wip!
-+; ??? These are kind of like multi-ifields but I don't want to disturb them
-+; while this is still experimental.
-+
-+(define <derived-ifield>
-+ (class-make '<derived-ifield>
-+ '(<ifield>)
-+ '(
-+ ; Operand that uses this ifield.
-+ ; Unlike other ifields, derived ifields have a one-to-one
-+ ; correspondence with the operand that uses them.
-+ ; ??? Not true in -anyof-merge-subchoices.
-+ owner
-+
-+ ; List of ifields that make up this ifield.
-+ subfields
-+ )
-+ nil)
-+)
-+
-+(method-make!
-+ <derived-ifield> 'needed-iflds
-+ (lambda (self)
-+ (find (lambda (ifld) (not (ifld-constant? ifld)))
-+ (elm-get self 'subfields)))
-+)
-+
-+(method-make!
-+ <derived-ifield> 'make!
-+ (lambda (self name comment attrs owner subfields)
-+ (elm-set! self 'name name)
-+ (elm-set! self 'comment comment)
-+ (elm-set! self 'attrs attrs)
-+ (elm-set! self 'mode UINT)
-+ (elm-set! self 'bitrange (make <bitrange> 0 0 0 0 #f))
-+ (elm-set! self 'encode #f)
-+ (elm-set! self 'decode #f)
-+ (elm-set! self 'owner owner)
-+ (elm-set! self 'subfields subfields)
-+ self)
-+)
-+
-+; Accessors.
-+
-+(define-getters <derived-ifield> derived-ifield (owner subfields))
-+
-+(define-setters <derived-ifield> derived-ifield (owner subfields))
-+
-+(define (derived-ifield? x) (class-instance? <derived-ifield> x))
-+
-+; Return a boolean indicating if F is a derived ifield with a derived operand
-+; for a value.
-+; ??? The former might imply the latter so some simplification may be possible.
-+
-+(define (ifld-derived-operand? f)
-+ (and (derived-ifield? f)
-+ (derived-operand? (ifld-get-value f)))
-+)
-+
-+; Return the bit offset of the word after the last word SELF is in.
-+; What a `word' here is defined by subfields in their bitranges.
-+
-+(method-make!
-+ <derived-ifield> 'next-word
-+ (lambda (self)
-+ (apply max (map (lambda (f)
-+ (bitrange-next-word (/ifld-bitrange f)))
-+ (derived-ifield-subfields self))))
-+)
-+
-+; Return a list of all base (non-derived) ifields in IFLD.
-+; NOTE: multi-ifields are *not* reduced to their sub-ifields.
-+
-+(define (ifld-base-ifields ifld)
-+ (cond ((derived-ifield? ifld) (ifields-base-ifields (derived-ifield-subfields ifld)))
-+ ;;((multi-ifield? ifld) (ifields-base-ifields (multi-ifld-subfields ifld)))
-+ (else (list ifld)))
-+)
-+
-+; Collect all base (non-derived) ifields in IFLD-LIST.
-+; NOTE: multi-ifields are *not* reduced to their sub-ifields.
-+
-+(define (ifields-base-ifields ifld-list)
-+ (collect ifld-base-ifields ifld-list)
-+)
-+
-+; Return a list of all simple ifields in IFLD.
-+; NOTE: multi-ifields *are* reduced to their sub-ifields.
-+
-+(define (ifld-simple-ifields ifld)
-+ (cond ((derived-ifield? ifld) (ifields-simple-ifields (derived-ifield-subfields ifld)))
-+ ((multi-ifield? ifld) (ifields-simple-ifields (multi-ifld-subfields ifld)))
-+ (else (list ifld)))
-+)
-+
-+; Collect all simple ifields in IFLD-LIST.
-+; NOTE: multi-ifields *are* reduced to their sub-ifields.
-+
-+(define (ifields-simple-ifields ifld-list)
-+ (collect ifld-simple-ifields ifld-list)
-+)
-+
-+; Misc. utilities.
-+
-+; Sort a list of fields (sorted by the starting bit number).
-+; This must be carefully defined to pass through Hobbit.
-+; (define foo (if x bar baz)) is ok.
-+; (if x (define foo bar) (define foo baz)) is not ok.
-+;
-+; ??? Usually there aren't that many fields and the range of values is fixed,
-+; so I think this needn't use a general purpose sort routine (should it become
-+; an issue).
-+
-+(define sort-ifield-list
-+ (if (and (defined? 'cgh-qsort) (defined? 'cgh-qsort-int-cmp))
-+ (lambda (fld-list up?)
-+ (cgh-qsort fld-list
-+ (if up?
-+ (lambda (a b)
-+ (cgh-qsort-int-cmp (ifld-start a)
-+ (ifld-start b)))
-+ (lambda (a b)
-+ (- (cgh-qsort-int-cmp (ifld-start a)
-+ (ifld-start b)))))))
-+ (lambda (fld-list up?)
-+ (sort fld-list
-+ (if up?
-+ (lambda (a b) (< (ifld-start a)
-+ (ifld-start b)))
-+ (lambda (a b) (> (ifld-start a)
-+ (ifld-start b)))))))
-+)
-+
-+; Return a boolean indicating if field F extends beyond the base insn.
-+
-+(define (ifld-beyond-base? f)
-+ (> (ifld-word-offset f) 0)
-+)
-+
-+; Return <hardware> object to use to hold value of <ifield> F.
-+; i.e. one of h-uint, h-sint.
-+; NB: Should be defined in terms of `hardware-for-mode'.
-+(define (ifld-hw-type f)
-+ (case (mode:class (ifld-mode f))
-+ ((INT) h-sint)
-+ ((UINT) h-uint)
-+ (else (error "unsupported mode class" (mode:class (ifld-mode f)))))
-+)
-+
-+; Builtin fields, attributes, init/fini support.
-+
-+; The f-nil field is a placeholder when building operands out of hardware
-+; elements that aren't indexed by an instruction field (scalars).
-+(define f-nil #f)
-+
-+(define (ifld-nil? f)
-+ (eq? (obj:name f) 'f-nil)
-+)
-+
-+; The f-anyof field is a placeholder when building "anyof" operands.
-+(define f-anyof #f)
-+
-+(define (ifld-anyof? f)
-+ (eq? (obj:name f) 'f-anyof)
-+)
-+
-+; Return a boolean indicating if F is an anyof ifield with an anyof operand
-+; for a value.
-+; ??? The former implies the latter so some simplification is possible.
-+
-+(define (ifld-anyof-operand? f)
-+ (and (ifld-anyof? f)
-+ (anyof-operand? (ifld-get-value f)))
-+)
-+
-+; Called before loading the .cpu file to initialize.
-+
-+(define (ifield-init!)
-+ (/ifield-add-commands!)
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Called before loading the .cpu file to create any builtins.
-+
-+(define (ifield-builtin!)
-+ ; Standard ifield attributes.
-+ ; ??? Some of these can be combined into one, booleans are easier to
-+ ; work with.
-+ (define-attr '(for ifield operand) '(type boolean) '(name PCREL-ADDR)
-+ '(comment "pc relative address"))
-+ (define-attr '(for ifield operand) '(type boolean) '(name ABS-ADDR)
-+ '(comment "absolute address"))
-+ (define-attr '(for ifield) '(type boolean) '(name RESERVED)
-+ '(comment "field is reserved"))
-+ (define-attr '(for ifield operand) '(type boolean) '(name SIGN-OPT)
-+ '(comment "value is signed or unsigned"))
-+ ; ??? This is an internal attribute for implementation purposes only.
-+ ; To be revisited.
-+ (define-attr '(for ifield operand) '(type boolean) '(name SIGNED)
-+ '(comment "value is unsigned"))
-+ ; Also (defined elsewhere): VIRTUAL
-+
-+ (set! f-nil (make <ifield> (builtin-location)
-+ 'f-nil "empty ifield"
-+ (atlist-cons (all-isas-attr) nil)
-+ UINT
-+ (make <bitrange> 0 0 0 0 #f)
-+ #f #f)) ; encode/decode
-+ (current-ifld-add! f-nil)
-+
-+ (set! f-anyof (make <ifield> (builtin-location)
-+ 'f-anyof "placeholder for anyof operands"
-+ (atlist-cons (all-isas-attr) nil)
-+ UINT
-+ (make <bitrange> 0 0 0 0 #f)
-+ #f #f)) ; encode/decode
-+ (current-ifld-add! f-anyof)
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Called after the .cpu file has been read in.
-+
-+(define (ifield-finish!)
-+ *UNSPECIFIED*
-+)
-diff -Nur binutils-2.24.orig/cgen/iformat.scm binutils-2.24/cgen/iformat.scm
---- binutils-2.24.orig/cgen/iformat.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/iformat.scm 2016-06-30 21:26:12.657893268 +0200
-@@ -0,0 +1,624 @@
-+; Instruction formats.
-+; Copyright (C) 2000, 2009, 2010 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; Instruction formats are computed after the .cpu file has been read in.
-+; ??? May also wish to allow programmer to specify formats, but not sure this
-+; will complicate things more than it simplifies them, so it's defered.
-+;
-+; Two kinds of formats are defined here: iformat and sformat.
-+; (pronounced "I-format" and "S-format")
-+;
-+; Iformats are the instruction format as specified by the instructions' fields,
-+; and are the machine computed version of the generally known notion of an
-+; "instruction format". No semantic information is attributed to iformats.
-+;
-+; Sformats are the same as iformats except that semantics are used to
-+; distinguish them. For example, if an operand is refered to in one mode by
-+; one instruction and in a different mode by another instruction, then these
-+; two insns would have different sformats but the same iformat. Sformats
-+; are used in simulator extraction code to collapse the number of cases that
-+; must be handled. They can also be used to collapse the number of cases
-+; in the modeling code.
-+;
-+; The "base length" is the length of the insn that is initially fetched for
-+; decoding purposes.
-+; Formats are fixed in length. For variable instruction length architectures
-+; there are separate formats for each insn's possible length.
-+
-+(define <iformat>
-+ (class-make '<iformat>
-+ '(<ident>)
-+ ; From <ident>:
-+ ; - NAME is derived from number, but we might have user
-+ ; specified formats someday [though I wouldn't add them
-+ ; without a clear need].
-+ ; - COMMENT is the assembler syntax of an example insn that
-+ ; uses the format.
-+ '(
-+ ; Index into the iformat table.
-+ number
-+
-+ ; Sort key, used to determine insns with identical formats.
-+ key
-+
-+ ; List of <ifield> objects.
-+ ifields
-+
-+ ; min (insn-length, base-insn-size)
-+ mask-length
-+
-+ ; total length of insns with this format
-+ length
-+
-+ ; mask of base part
-+ mask
-+
-+ ; An example insn that uses the format.
-+ eg-insn
-+ )
-+ nil)
-+)
-+
-+; Accessor fns.
-+
-+(define-getters <iformat> ifmt
-+ (number key ifields mask-length length mask eg-insn)
-+)
-+
-+; Return enum cgen_fmt_type value for FMT.
-+; ??? Not currently used.
-+
-+(define (ifmt-enum fmt)
-+ (string-append "@CPU@_" (string-upcase (gen-sym fmt)))
-+)
-+
-+; Given FLD-LIST, compute the length of the insn in bits.
-+; This is done by adding up all the field sizes.
-+; All bits must be represent exactly once.
-+
-+(define (compute-insn-length fld-list)
-+ (apply + (map ifld-length (ifields-base-ifields fld-list)))
-+)
-+
-+; Given FLD-LIST, compute the base length in bits.
-+;
-+; For variable length instruction sets, or with cpus with multiple
-+; instruction sets, compute the base appropriate for this set of
-+; ifields. Check that ifields are not shared among isas with
-+; inconsistent base insn lengths.
-+;
-+; ??? The algorithm here is a bit odd. [Though there is value in verifying
-+; ifields are from consistent ISAs.]
-+
-+(define (compute-insn-base-mask-length fld-list)
-+ (let* ((isa-base-bitsizes
-+ (remove-duplicates
-+ (map isa-base-insn-bitsize
-+ (map current-isa-lookup
-+ (collect (lambda (ifld)
-+ (atlist-attr-value (obj-atlist ifld) 'ISA #f))
-+ fld-list))))))
-+ (if (= 1 (length isa-base-bitsizes))
-+ (min (car isa-base-bitsizes) (compute-insn-length fld-list))
-+ (error "ifields have inconsistent isa/base-insn-size values:" isa-base-bitsizes)))
-+)
-+
-+; Given FLD-LIST, compute the bitmask of constant values in the base part
-+; of the insn (i.e. the opcode field).
-+;
-+; FIXME: Need to add support for constant fields appearing outside the base
-+; insn. One way would be to record with each insn the value for each constant
-+; field. That would allow code to straightforwardly fetch it. Another would
-+; be to only record constant values appearing outside the base insn.
-+;
-+; See also (insn-value).
-+;
-+(define (compute-insn-base-mask fld-list)
-+ (let* ((mask-len (compute-insn-base-mask-length fld-list))
-+ (lsb0? (ifld-lsb0? (car fld-list)))
-+ (mask-bitrange (make <bitrange>
-+ 0 ; word-offset
-+ (if lsb0? (- mask-len 1) 0) ; start
-+ mask-len ; length
-+ mask-len ; word-length
-+ lsb0?)))
-+ (apply +
-+ (map (lambda (fld) (ifld-mask fld mask-len mask-bitrange))
-+ ; Find the fields that have constant values.
-+ (find ifld-constant? (ifields-base-ifields fld-list)))))
-+)
-+
-+; Return the <iformat> search key for a sorted field list.
-+; This determines how iformats differ from each other.
-+; It also speeds up searching as the search key can be anything
-+; (though at present searching isn't as fast as it could be).
-+; INSN is passed so that we can include its sanytize attribute, if present,
-+; so sanytized sources work (needed formats don't disappear).
-+
-+(define (/ifmt-search-key insn sorted-ifld-list)
-+ (string-map (lambda (ifld)
-+ (string-append " ("
-+ (or (->string (obj-attr-value insn 'sanitize))
-+ "-nosan-")
-+ " "
-+ (obj:str-name ifld)
-+ " "
-+ (ifld-ilk ifld)
-+ ")"))
-+ sorted-ifld-list)
-+)
-+
-+; Create an <iformat> object for INSN.
-+; INDEX is the ordinal to assign to the result or -1 if unknown.
-+; SEARCH-KEY is the search key used to determine the iformat's uniqueness.
-+; IFLDS is a sorted list of INSN's ifields.
-+
-+(define (ifmt-build insn index search-key iflds)
-+ (make <iformat>
-+ (symbol-append 'ifmt- (obj:name insn))
-+ (string-append "e.g. " (insn-syntax insn))
-+ atlist-empty
-+ index
-+ search-key
-+ iflds
-+ (compute-insn-base-mask-length iflds)
-+ (compute-insn-length iflds)
-+ (compute-insn-base-mask iflds)
-+ insn)
-+)
-+
-+; Sformats.
-+
-+(define <sformat>
-+ (class-make '<sformat>
-+ '(<ident>)
-+ ; From <ident>:
-+ ; - NAME is derived from number.
-+ ; - COMMENT is the assembler syntax of an example insn that
-+ ; uses the format.
-+ '(
-+ ; Index into the sformat table.
-+ number
-+
-+ ; Sort key, used to determine insns with identical formats.
-+ key
-+
-+ ; Non-#f if insns with this format are cti insns.
-+ cti?
-+
-+ ; IN-OPS is a list of input operands.
-+ ; OUT-OPS is a list of output operands.
-+ ; These are used to distinguish the format from others,
-+ ; so that the extract and read operations can be based on the
-+ ; sformat.
-+ ; The extract fns use this data to record the necessary
-+ ; information for profiling [which isn't necessarily a property
-+ ; of the field list]. We could have one extraction function
-+ ; per instruction, but there's a *lot* of duplicated code, and
-+ ; the semantic operands rarely contribute to extra formats.
-+ ; The parallel execution support uses this data to record the
-+ ; input (or output) values based on the instruction format,
-+ ; again cutting down on duplicated code.
-+ in-ops
-+ out-ops
-+
-+ ; Length of all insns with this format.
-+ ; Since insns with different iformats can have the same sformat
-+ ; we need to ensure ifield extraction works among the various
-+ ; iformats. We do this by ensuring all insns with the same
-+ ; sformat have the same length.
-+ length
-+
-+ ; Cached list of all ifields used.
-+ ; This can be derived from IN-OPS/OUT-OPS but is computed once
-+ ; and cached here for speed.
-+ iflds
-+
-+ ; An example insn that uses the format.
-+ ; This is used for debugging purposes, but also to help get
-+ ; sanytization (spelled wrong on purpose) right.
-+ eg-insn
-+
-+ ; <sformat-argbuf> entry
-+ ; FIXME: Temporary location, to be moved elsewhere
-+ (sbuf . #f)
-+ )
-+ nil)
-+)
-+
-+; Accessor fns.
-+
-+(define-getters <sformat> sfmt
-+ (number key cti? in-ops out-ops length iflds eg-insn sbuf)
-+)
-+
-+(define-setters <sformat> sfmt (sbuf))
-+
-+(method-make-make! <sformat>
-+ '(name comment attrs
-+ number key cti? in-ops out-ops length iflds eg-insn)
-+)
-+
-+; Return the <sformat> search key for a sorted field list and semantic
-+; operands.
-+; This determines how sformats differ from each other.
-+; It also speeds up searching as the search key can be anything
-+; (though at present searching isn't as fast as it could be).
-+;
-+; INSN is passed so that we can include its sanytize attribute, if present,
-+; so sanytized sources work (needed formats don't disappear).
-+; SORTED-USED-IFLDS is a sorted list of ifields used by SEM-{IN,OUT}-OPS.
-+; Note that it is not the complete set of ifields used by INSN.
-+;
-+; We assume INSN's <iformat> has been recorded.
-+;
-+; Note: It's important to minimize the number of created sformats. It keeps
-+; the generated code smaller (and sometimes faster - more usable common
-+; fragments in pbb simulators). Don't cause spurious differences.
-+
-+(define (/sfmt-search-key insn cti? sorted-used-iflds sem-in-ops sem-out-ops)
-+ (assert (insn-ifmt insn))
-+
-+ (let ((op-key (lambda (op)
-+ (string-append " ("
-+ (or (->string (obj-attr-value insn 'sanitize))
-+ "-nosan-")
-+ " "
-+ (obj:str-name op)
-+ ; ??? Including memory operands currently
-+ ; isn't necessary and it can account for some
-+ ; spurious differences. On the other hand
-+ ; leaving it out doesn't seem like the right
-+ ; thing to do.
-+ (if (memory? (op:type op))
-+ ""
-+ (string-append " "
-+ (obj:str-name (op:mode op))))
-+ ; CGEN_OPERAND_INSTANCE_COND_REF is stored
-+ ; with the operand in the operand instance
-+ ; table thus formats must be distinguished
-+ ; by this.
-+ (if (op:cond? op) " cond" "")
-+ ")")))
-+ )
-+ (list
-+ ;; Use the iformat key so that each sformat maps to only one iformat.
-+ (if (= (length sorted-used-iflds) 0)
-+ "no-used-ifields"
-+ (ifmt-key (insn-ifmt insn)))
-+ cti?
-+ (string-map op-key
-+ sem-in-ops)
-+ (string-map op-key
-+ sem-out-ops)
-+ ))
-+)
-+
-+; Create an <sformat> object for INSN.
-+; INDEX is the ordinal to assign to the result or -1 if unknown.
-+; SEARCH-KEY is the search key used to determine the sformat's uniqueness.
-+; {IN,OUT}-OPS are lists of INSN's input/output operands.
-+; SORTED-USED-IFLDS is a sorted list of ifields used by {IN,OUT}-OPS.
-+; Note that it is not the complete set of ifields used by INSN.
-+;
-+; We assume INSN's <iformat> has already been recorded.
-+
-+(define (sfmt-build insn index search-key cti? in-ops out-ops sorted-used-iflds)
-+ (make <sformat>
-+ (symbol-append 'sfmt- (obj:name insn))
-+ (string-append "e.g. " (insn-syntax insn))
-+ atlist-empty
-+ index
-+ search-key
-+ cti?
-+ in-ops
-+ out-ops
-+ (insn-length insn)
-+ sorted-used-iflds
-+ insn)
-+)
-+
-+; Sort IFLDS by dependencies and then by starting bit number.
-+
-+(define (/sfmt-order-iflds iflds)
-+ (let ((up?
-+ ; ??? Something like this is preferable.
-+ ;(not (ifld-lsb0? (car ifld-list)))
-+ (not (current-arch-insn-lsb0?))))
-+ (let loop ((independent nil) (dependent nil) (iflds iflds))
-+ (cond ((null? iflds)
-+ (append (sort-ifield-list independent up?)
-+ (sort-ifield-list dependent up?)))
-+ ; FIXME: quick hack.
-+ ((multi-ifield? (car iflds))
-+ (loop independent (cons (car iflds) dependent) (cdr iflds)))
-+ (else
-+ (loop (cons (car iflds) independent) dependent (cdr iflds))))))
-+)
-+
-+; Return a sorted list of ifields used by IN-OPS, OUT-OPS.
-+; The ifields are sorted by dependencies and then by start bit.
-+; The important points are to help distinguish sformat's by the ifields used
-+; and to put ifields that others depend on first.
-+
-+(define (/sfmt-used-iflds in-ops out-ops)
-+ (let ((in-iflds (map op-iflds-used in-ops))
-+ (out-iflds (map op-iflds-used out-ops)))
-+ (let ((all-iflds (nub (append (apply append in-iflds)
-+ (apply append out-iflds))
-+ obj:name)))
-+ (/sfmt-order-iflds all-iflds)))
-+)
-+
-+; The format descriptor is used to sort formats.
-+; This is a utility class internal to this file.
-+; There is one instance per insn.
-+
-+(define <fmt-desc>
-+ (class-make '<fmt-desc>
-+ nil
-+ '(
-+ ; #t if insn is a cti insn
-+ cti?
-+
-+ ; sorted list of insn's ifields
-+ iflds
-+
-+ ; computed set of input/output operands
-+ in-ops out-ops
-+
-+ ; set of ifields used by IN-OPS,OUT-OPS.
-+ used-iflds
-+
-+ ; computed set of attributes
-+ attrs
-+ )
-+ nil)
-+)
-+
-+; Accessors.
-+
-+(define-getters <fmt-desc> -fmt-desc
-+ (cti? iflds in-ops out-ops used-iflds attrs)
-+)
-+
-+; Compute an iformat descriptor used to build an <iformat> object for INSN.
-+;
-+; If COMPUTE-SFORMAT? is #t compute the semantic format
-+; (same as instruction format except that operands are used to
-+; distinguish insns).
-+; Attributes derivable from the semantics are also computed.
-+; This is all done at the same time to minimize the number of times the
-+; semantic code is traversed.
-+; The semantics of INSN must already be canonicalized and stored in
-+; canonical-semantics.
-+;
-+; The result is (descriptor compiled-semantics attrs).
-+; `descriptor' and `compiled-semantics' are #f for insns with an empty
-+; field list. This happens for virtual insns.
-+; `attrs' is an <attr-list> object of attributes derived from the semantics.
-+;
-+; ??? We never traverse the semantics of virtual insns.
-+
-+(define (ifmt-analyze insn compute-sformat?)
-+ ; First sort by starting bit number the list of fields in INSN.
-+ (let ((sorted-ifields
-+ (sort-ifield-list (insn-iflds insn)
-+ ; ??? Something like this is preferable, but
-+ ; if the first insn is a virtual insn there are
-+ ; no fields.
-+ ;(not (ifld-lsb0? (car (insn-iflds insn))))
-+ (not (current-arch-insn-lsb0?))
-+ )))
-+
-+ (if (null? sorted-ifields)
-+
-+ ; Field list is unspecified.
-+ (list #f #f atlist-empty)
-+
-+ (let* ((sem (insn-canonical-semantics insn))
-+ ; Compute list of input and output operands if asked for.
-+ (sem-ops (if compute-sformat?
-+ (semantic-compile #f ; FIXME: context
-+ insn sem)
-+ (csem-make #f #f #f
-+ (if sem
-+ (semantic-attrs #f ; FIXME: context
-+ insn sem)
-+ atlist-empty)))))
-+
-+ (let ((compiled-sem (csem-code sem-ops))
-+ (in-ops (csem-inputs sem-ops))
-+ (out-ops (csem-outputs sem-ops))
-+ (attrs (csem-attrs sem-ops))
-+ (cti? (or (atlist-cti? (csem-attrs sem-ops))
-+ (insn-cti-attr? insn))))
-+
-+ (list (make <fmt-desc>
-+ cti? sorted-ifields in-ops out-ops
-+ (if (and in-ops out-ops)
-+ (/sfmt-used-iflds in-ops out-ops)
-+ #f)
-+ attrs)
-+ compiled-sem
-+ attrs)))))
-+)
-+
-+; Subroutine of ifmt-compute!, to simplify it.
-+; Lookup INSN's iformat in IFMT-LIST and if not found add it.
-+; FMT-DESC is INSN's <fmt-desc> object.
-+; IFMT-LIST is append!'d to and the found iformat is stored in INSN.
-+
-+(define (/ifmt-lookup-ifmt! insn fmt-desc ifmt-list)
-+ (let* ((search-key (/ifmt-search-key insn (-fmt-desc-iflds fmt-desc)))
-+ (ifmt (find-first (lambda (elm)
-+ (equal? (ifmt-key elm) search-key))
-+ ifmt-list)))
-+
-+ (if ifmt
-+
-+ ; Format was found, use it.
-+ (begin
-+ (logit 3 "Using iformat " (number->string (ifmt-number ifmt)) ".\n")
-+ (insn-set-ifmt! insn ifmt)
-+ )
-+
-+ ; Format wasn't found, create new entry.
-+ (let* ((ifmt-index (length ifmt-list))
-+ (ifmt (ifmt-build insn ifmt-index search-key
-+ (ifields-base-ifields (-fmt-desc-iflds fmt-desc)))))
-+ (logit 3 "Creating iformat " (number->string ifmt-index) ".\n")
-+ (insn-set-ifmt! insn ifmt)
-+ (append! ifmt-list (list ifmt))
-+ )
-+ ))
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Subroutine of ifmt-compute!, to simplify it.
-+; Lookup INSN's sformat in SFMT-LIST and if not found add it.
-+; FMT-DESC is INSN's <fmt-desc> object.
-+; SFMT-LIST is append!'d to and the found sformat is stored in INSN.
-+;
-+; We assume INSN's <iformat> has already been recorded.
-+
-+(define (/ifmt-lookup-sfmt! insn fmt-desc sfmt-list)
-+ (assert (insn-ifmt insn))
-+
-+ (let* ((search-key (/sfmt-search-key insn (-fmt-desc-cti? fmt-desc)
-+ (-fmt-desc-used-iflds fmt-desc)
-+ (-fmt-desc-in-ops fmt-desc)
-+ (-fmt-desc-out-ops fmt-desc)))
-+ (sfmt (find-first (lambda (elm)
-+ (equal? (sfmt-key elm) search-key))
-+ sfmt-list)))
-+
-+ (if sfmt
-+
-+ ; Format was found, use it.
-+ (begin
-+ (logit 3 "Using sformat " (number->string (sfmt-number sfmt)) ".\n")
-+ (insn-set-sfmt! insn sfmt)
-+ )
-+
-+ ; Format wasn't found, create new entry.
-+ (let* ((sfmt-index (length sfmt-list))
-+ (sfmt (sfmt-build insn sfmt-index search-key
-+ (-fmt-desc-cti? fmt-desc)
-+ (-fmt-desc-in-ops fmt-desc)
-+ (-fmt-desc-out-ops fmt-desc)
-+ (ifields-base-ifields (-fmt-desc-used-iflds fmt-desc)))))
-+ (logit 3 "Creating sformat " (number->string sfmt-index) ".\n")
-+ (insn-set-sfmt! insn sfmt)
-+ (append! sfmt-list (list sfmt))
-+ )
-+ ))
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Main entry point.
-+
-+; Given a list of insns, compute the set of instruction formats, semantic
-+; formats, semantic attributes, and compiled semantics for each insn.
-+;
-+; The computed <iformat> object is stored in the `ifmt' field of each insn.
-+;
-+; Attributes derived from the semantic code are added to the insn's attributes,
-+; but they don't override any prespecified values.
-+;
-+; If COMPUTE-SFORMAT? is #t, the computed <sformat> object is stored in the
-+; `sfmt' field of each insn, and the processed semantic code is stored in the
-+; `compiled-semantics' field of each insn.
-+;
-+; The `fmt-desc' field of each insn is used to store an <fmt-desc> object
-+; which contains the search keys, sorted field list, input-operands, and
-+; output-operands, and is not used outside this procedure.
-+;
-+; The result is a list of two lists: the set of computed iformats, and the
-+; set of computed sformats.
-+;
-+; *** This is the most expensive calculation in CGEN. ***
-+; *** (mainly because of the detailed semantic parsing) ***
-+
-+(define (ifmt-compute! insn-list compute-sformat?)
-+ (logit 2 "Computing instruction formats and analyzing semantics ...\n")
-+
-+ ; First analyze each insn, storing the result in fmt-desc.
-+ ; If asked to, convert the semantic code to a compiled form to simplify more
-+ ; intelligent processing of it later.
-+
-+ (for-each (lambda (insn)
-+ (logit 2 "Scanning operands of " (obj:name insn) ": "
-+ (insn-syntax insn) " ...\n")
-+ (let ((sem-ops (ifmt-analyze insn compute-sformat?)))
-+ (insn-set-fmt-desc! insn (car sem-ops))
-+ (if (and compute-sformat? (cadr sem-ops))
-+ (let ((compiled-sem (cadr sem-ops)))
-+ (insn-set-compiled-semantics! insn compiled-sem)))
-+ (obj-set-atlist! insn
-+ (atlist-append (obj-atlist insn)
-+ (caddr sem-ops)))
-+ ))
-+ insn-list)
-+
-+ ; Now for each insn, look up the ifield list in the format table (and if not
-+ ; found add it), and set the ifmt/sfmt elements of the insn.
-+
-+ (let* ((empty-ifmt (make <iformat>
-+ 'ifmt-empty
-+ "empty iformat for unspecified field list"
-+ atlist-empty ; attrs
-+ -1 ; number
-+ #f ; key
-+ nil ; fields
-+ 0 ; mask-length
-+ 0 ; length
-+ 0 ; mask
-+ #f)) ; eg-insn
-+ (empty-sfmt (make <sformat>
-+ 'sfmt-empty
-+ "empty sformat for unspecified field list"
-+ atlist-empty ; attrs
-+ -1 ; number
-+ #f ; key
-+ #f ; cti?
-+ nil ; sem-in-ops
-+ nil ; sem-out-ops
-+ 0 ; length
-+ nil ; used iflds
-+ #f)) ; eg-insn
-+ (ifmt-list (list empty-ifmt))
-+ (sfmt-list (list empty-sfmt))
-+ )
-+
-+ (for-each (lambda (insn)
-+ (logit 2 "Processing format for " (obj:name insn) ": "
-+ (insn-syntax insn) " ...\n")
-+
-+ (let ((fmt-desc (insn-fmt-desc insn)))
-+
-+ (if fmt-desc
-+
-+ (begin
-+ ; Must compute <iformat> before <sformat>, the latter
-+ ; needs the former.
-+ (/ifmt-lookup-ifmt! insn fmt-desc ifmt-list)
-+ (if compute-sformat?
-+ (/ifmt-lookup-sfmt! insn fmt-desc sfmt-list)))
-+
-+ ; No field list present, use empty format.
-+ (begin
-+ (insn-set-ifmt! insn empty-ifmt)
-+ (if compute-sformat?
-+ (insn-set-sfmt! insn empty-sfmt))))))
-+
-+ (non-multi-insns insn-list))
-+
-+ ; Done. Return the computed iformat and sformat lists.
-+ (list ifmt-list sfmt-list)
-+ )
-+)
-diff -Nur binutils-2.24.orig/cgen/insn.scm binutils-2.24/cgen/insn.scm
---- binutils-2.24.orig/cgen/insn.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/insn.scm 2016-06-30 21:26:12.657893268 +0200
-@@ -0,0 +1,1156 @@
-+; Instruction definitions.
-+; Copyright (C) 2000, 2009, 2010 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; Class to hold an insn.
-+
-+(define <insn>
-+ (class-make '<insn>
-+ '(<source-ident>)
-+ '(
-+ ; Used to explicitly specify mnemonic, now it's computed from
-+ ; syntax string. ??? Might be useful as an override someday.
-+ ;mnemonic
-+
-+ ; Instruction syntax string.
-+ syntax
-+
-+ ; The insn fields as specified in the .cpu file.
-+ ; Also contains values for constant fields.
-+ iflds
-+ (/insn-value . #f) ; Lazily computed cache
-+ (/insn-base-value . #f) ; Lazily computed cache
-+
-+ ; RTL source of assertions of ifield values or #f if none.
-+ ; This is used, for example, by the decoder to help
-+ ; distinguish what would otherwise be an ambiguity in the
-+ ; specification. It is also used by decode-split support.
-+ ; ??? It could also be used the the assembler/disassembler
-+ ; some day.
-+ (ifield-assertion . #f)
-+
-+ ; The <fmt-desc> of the insn.
-+ ; This is used to help calculate the ifmt,sfmt members.
-+ (fmt-desc . #f)
-+
-+ ; The <iformat> of the insn.
-+ (ifmt . #f)
-+
-+ ; The <sformat> of the insn.
-+ (sfmt . #f)
-+
-+ ; Temp slot for use by applications.
-+ (tmp . #f)
-+
-+ ; Instruction semantics.
-+ ; This is the rtl in source form, as provided in the
-+ ; description file, or #f if there is none.
-+ ;
-+ ; There are a few issues (ick, I hate that word) to consider
-+ ; here:
-+ ; - some apps don't need the trap checks (e.g. SIGSEGV)
-+ ; - some apps treat the pieces in different ways
-+ ; - the simulator tries to merge common fragments among insns
-+ ; to reduce code size in a pbb simulator
-+ ;
-+ ; Some insns don't have any semantics at all, they are defined
-+ ; in another insn [akin to anonymous patterns in gcc]. wip.
-+ ;
-+ ; ??? GCC-like apps will need a new field to allow specifying
-+ ; the semantics if a different value is needed. wip.
-+ ; ??? May wish to put this and the compiled forms in a
-+ ; separate class.
-+ ; ??? Contents of trap expressions is wip. It will probably
-+ ; be a sequence with an #:errchk modifier or some such.
-+ semantics
-+
-+ ; The processed form of the semantics.
-+ ; This remains #f for virtual insns (FIXME: keep?).
-+ (canonical-semantics . #f)
-+
-+ ; The processed form of the semantics.
-+ ; This remains #f for virtual insns (FIXME: keep?).
-+ (compiled-semantics . #f)
-+
-+ ; The mapping of the semantics onto the host.
-+ ; FIXME: Not sure what its value will be.
-+ ; Another thing that will be needed is [in some cases] a more
-+ ; simplified version of the RTL for use by apps like compilers.
-+ ; Perhaps that's what this will become.
-+ ;host-semantics
-+
-+ ; The function unit usage of the instruction.
-+ timing
-+
-+ (handlers . ())
-+ )
-+ nil)
-+)
-+
-+(method-make-make! <insn>
-+ '(location name comment attrs syntax iflds ifield-assertion
-+ semantics timing handlers)
-+)
-+
-+; Accessor fns
-+
-+(define-getters <insn> insn
-+ (syntax iflds ifield-assertion fmt-desc ifmt sfmt tmp
-+ semantics canonical-semantics compiled-semantics timing handlers)
-+)
-+
-+(define-setters <insn> insn
-+ (fmt-desc ifmt sfmt tmp ifield-assertion
-+ canonical-semantics compiled-semantics)
-+)
-+
-+; Return a boolean indicating if X is an <insn>.
-+
-+(define (insn? x) (class-instance? <insn> x))
-+
-+; Return a list of the machs that support INSN.
-+
-+(define (insn-machs insn)
-+ nil ; ??? wip
-+)
-+
-+; Return the length of INSN in bits.
-+
-+(define (insn-length insn)
-+ (ifmt-length (insn-ifmt insn))
-+)
-+
-+; Return the length of INSN in bytes.
-+
-+(define (insn-length-bytes insn)
-+ (bits->bytes (insn-length insn))
-+)
-+
-+; Return instruction mnemonic.
-+; This is computed from the syntax string.
-+; The mnemonic, as we define it, is everything up to, but not including, the
-+; first space or '$'.
-+; FIXME: Rename to syntax-mnemonic, and take a syntax string argument.
-+; FIXME: Doesn't handle \$ to indicate a $ is actually in the mnemonic.
-+
-+(define (insn-mnemonic insn)
-+ (letrec ((mnem-len (lambda (str len)
-+ (cond ((= (string-length str) 0) len)
-+ ((char=? #\space (string-ref str 0)) len)
-+ ((char=? #\$ (string-ref str 0)) len)
-+ (else (mnem-len (string-drop1 str) (+ len 1)))))))
-+ (string-take (mnem-len (insn-syntax insn) 0) (insn-syntax insn)))
-+)
-+
-+; Return enum cgen_insn_types value for INSN.
-+
-+(define (insn-enum insn)
-+ (string-upcase (string-append "@ARCH@_INSN_" (gen-sym insn)))
-+)
-+
-+; Return insn handler of specified type.
-+
-+(define (insn-handler type insn)
-+ ; (logit 2 "type=" type ", insn=" insn " ...\n")
-+ (let ((handler (find (lambda (h)
-+ (equal? (car h) type))
-+ (elm-get insn 'handlers))))
-+ (logit 2 "handler=" handler "...\n")
-+ (if (null? handler)
-+ 'insn-normal
-+ (string->symbol (cadar handler)))
-+ )
-+)
-+
-+; Return enum for insn named INSN-NAME.
-+; This is needed for the `invalid' insn, there is no object for it.
-+; [Though obviously having such an object seems like a good idea.]
-+
-+(define (gen-insn-enum insn-name)
-+ (string-upcase (string-append "@ARCH@_INSN_" (gen-c-symbol insn-name)))
-+)
-+
-+; Insns with derived operands (see define-derived-operand).
-+; ??? These are [currently] recorded separately to minimize impact on existing
-+; code while the design is worked out.
-+;
-+; The class is called <multi-insn> because the insn has multiple variants,
-+; one for each combination of "anyof" alternatives.
-+; Internally we create one <insn> per alternative. The theory is that this
-+; will remain an internal implementation issue. When appropriate applications
-+; will collapse the number of insns in a way that is appropriate for them.
-+;
-+; ??? Another way to do this is with insn templates. One problem the current
-+; way has is that it requires each operand's assembler syntax to be self
-+; contained (one way to fix this is to use "fake" operands like before).
-+; Insn templates needn't have this problem. On the other hand insn templates
-+; [seem to] require more description file entries.
-+;
-+; ??? This doesn't use all of the members of <insn>.
-+; The <multi-insn> class is wip, but should eventually reorganize <insn>.
-+; This reorganization might also take into account real, virtual, etc. insns.
-+
-+(define <multi-insn>
-+ (class-make '<multi-insn>
-+ '(<insn>)
-+ '(
-+ ; An <insn> is created for each combination of "anyof"
-+ ; alternatives. They are recorded with other insns, but a
-+ ; list of them is recorded here as well.
-+ ; This is #f if the sub-insns haven't been instantiated yet.
-+ (sub-insns . #f)
-+ )
-+ nil)
-+)
-+
-+(method-make-make! <multi-insn>
-+ '(location name comment attrs syntax iflds ifield-assertion
-+ semantics timing)
-+)
-+
-+(define-getters <multi-insn> multi-insn (sub-insns))
-+
-+; Return a boolean indicating if X is a <multi-insn>.
-+
-+(define (multi-insn? x) (class-instance? <multi-insn> x))
-+
-+; Subroutine of /sub-insn-make! to create the ifield list.
-+; Return encoding of {insn} with each element of {anyof-operands} replaced
-+; with {new-values}.
-+; {value-names} is a list of names of {anyof-operands}.
-+
-+(define (/sub-insn-ifields insn anyof-operands value-names new-values)
-+ ; Delete ifields of {anyof-operands} and add those for {new-values}.
-+ (let ((iflds
-+ (append!
-+ ; Delete ifields in {anyof-operands}.
-+ (find (lambda (f)
-+ (not (and (ifld-anyof-operand? f)
-+ (memq (obj:name (ifld-get-value f))
-+ value-names))))
-+ (insn-iflds insn))
-+ ; Add ifields for {new-values}.
-+ (map derived-encoding new-values)))
-+
-+ ; Return the last ifield of OWNER in IFLD-LIST.
-+ ; OWNER is the object that owns the <ifield> we want.
-+ ; For ifields, the owner is the ifield itself.
-+ ; For operands, the owner is the operand.
-+ ; For derived operands, the owner is the "anyof" parent.
-+ ; IFLD-LIST is an unsorted list of <ifield> elements.
-+ (find-preceder
-+ (lambda (ifld-list owner)
-+ (cond ((ifield? owner)
-+ owner)
-+ ((anyof-operand? owner)
-+ ; This is the interesting case. The instantiated choice of
-+ ; {owner} is in {ifld-list}. We have to find it.
-+ (let* ((name (obj:name owner))
-+ (result
-+ (find-first (lambda (f)
-+ (and (derived-ifield? f)
-+ (anyof-instance? (derived-ifield-owner f))
-+ (eq? name (obj:name (anyof-instance-parent (derived-ifield-owner f))))))
-+ ifld-list)))
-+ (assert result)
-+ result))
-+ ((operand? owner) ; derived operands are handled here too
-+ (let ((result (op-ifield owner)))
-+ (assert result)
-+ result))
-+ (else
-+ (error "`owner' not <ifield>, <operand>, or <derived-operand>")))))
-+ )
-+
-+ ; Resolve any `follows' specs.
-+ ; Bad worst case performance but ifield lists aren't usually that long.
-+ ; FIXME: Doesn't handle A following B following C.
-+ (map (lambda (f)
-+ (let ((follows (ifld-follows f)))
-+ (if follows
-+ (let ((preceder (find-preceder iflds follows)))
-+ (ifld-new-word-offset f (ifld-next-word preceder)))
-+ f)))
-+ iflds))
-+)
-+
-+
-+; Subroutine of multi-insn-instantiate! to instantiate one insn.
-+; INSN is the parent insn.
-+; ANYOF-OPERANDS is a list of the <anyof-operand>'s of INSN.
-+; NEW-VALUES is a list of the value to use for each corresponding element in
-+; ANYOF-OPERANDS. Each element is a <derived-operand>.
-+
-+(define (/sub-insn-make! insn anyof-operands new-values)
-+ (assert (= (length anyof-operands) (length new-values)))
-+ (assert (all-true? (map anyof-operand? anyof-operands)))
-+ (assert (all-true? (map derived-operand? new-values)))
-+ (logit 3 "Instantiating "
-+ (obj:name insn)
-+ ":"
-+ (string-map (lambda (op newval)
-+ (string/symbol-append " "
-+ (obj:name op)
-+ "="
-+ (obj:name newval)))
-+ anyof-operands new-values)
-+ " ...\n")
-+
-+ (let* ((value-names (map obj:name anyof-operands))
-+ (ifields (/sub-insn-ifields insn anyof-operands value-names new-values))
-+ (known-values (ifld-known-values ifields)))
-+
-+ ; Don't create insn if ifield assertions fail.
-+ (if (all-true? (map (lambda (op)
-+ (anyof-satisfies-assertions? op known-values))
-+ new-values))
-+
-+ (let ((sub-insn
-+ (make <insn>
-+ (obj-location insn)
-+ (apply symbol-append
-+ (cons (obj:name insn)
-+ (map (lambda (anyof)
-+ (symbol-append '- (obj:name anyof)))
-+ new-values)))
-+ (obj:comment insn)
-+ (obj-atlist insn)
-+ (/anyof-merge-syntax (insn-syntax insn)
-+ value-names new-values insn)
-+ ifields
-+ (insn-ifield-assertion insn) ; FIXME
-+ (anyof-merge-semantics (insn-semantics insn)
-+ value-names new-values)
-+ (insn-timing insn)
-+ )))
-+ (logit 3 " instantiated.\n")
-+ (current-insn-add! sub-insn)
-+
-+ ;; FIXME: Hack to remove differences in generated code when we
-+ ;; switched to recording insns in hash tables.
-+ ;; See similar comment in arch-analyze-insns!.
-+ ;; Make the ordinals count backwards.
-+ ;; Subtract 2 because mach.scm:-get-next-ordinal! adds 1.
-+ (arch-set-next-ordinal! CURRENT-ARCH
-+ (- (arch-next-ordinal CURRENT-ARCH) 2))
-+ )
-+
-+ (begin
-+ logit 3 " failed ifield assertions.\n")))
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Instantiate all sub-insns of MULTI-INSN.
-+; ??? Might be better to return the list of insns, rather than add them to
-+; the global list, and leave it to the caller to add them.
-+
-+(define (multi-insn-instantiate! multi-insn)
-+ ; We shouldn't get called more than once.
-+ (assert (not (multi-insn-sub-insns multi-insn)))
-+
-+ (let ((iflds (insn-iflds multi-insn)))
-+
-+ ; What we want to create here is the set of all "anyof" alternatives.
-+ ; From that we create one <insn> per alternative.
-+
-+ (let* ((anyof-iflds (find ifld-anyof-operand? iflds))
-+ (anyof-operands (map ifld-get-value anyof-iflds)))
-+
-+ (assert (all-true? (map anyof-operand? anyof-operands)))
-+ (logit 4 " anyof: " (map obj:name anyof-operands) "\n")
-+ (logit 4 " choices: "
-+ (map (lambda (l) (map obj:name l))
-+ (map anyof-choices anyof-operands))
-+ "\n")
-+
-+ ; Iterate over all combinations.
-+ ; TODO is a list with one element for each <anyof-operand>.
-+ ; Each element is in turn a list of all choices (<derived-operands>'s)
-+ ; for the <anyof-operand>. Note that some of these values may be
-+ ; derived from nested <anyof-operand>'s.
-+ ; ??? anyof-all-choices should cache the results. [Still useful?]
-+ ; ??? Need to cache results of assertion processing in addition or
-+ ; instead of anyof-all-choices. [Still useful?]
-+
-+ (let* ((todo (map anyof-all-choices anyof-operands))
-+ (lengths (map length todo))
-+ (total (apply * lengths)))
-+
-+ (logit 2 "Instantiating " total " multi-insns for "
-+ (obj:name multi-insn) " ...\n")
-+
-+ ; ??? One might prefer a `do' loop here, but every time I see one I
-+ ; have to spend too long remembering its syntax.
-+ (let loop ((i 0))
-+ (if (< i total)
-+ (let* ((indices (split-value lengths i))
-+ (anyof-instances (map list-ref todo indices)))
-+ (logit 4 "Derived: " (map obj:name anyof-instances) "\n")
-+ (/sub-insn-make! multi-insn anyof-operands anyof-instances)
-+ (loop (+ i 1))))))))
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Parse an instruction description.
-+; This is the main routine for building an insn object from a
-+; description in the .cpu file.
-+; All arguments are in raw (non-evaluated) form.
-+; The result is the parsed object or #f if insn isn't for selected mach(s).
-+
-+(define (/insn-parse context name comment attrs syntax fmt ifield-assertion
-+ semantics timing handlers)
-+ (logit 2 "Processing insn " name " ...\n")
-+
-+ ;; Pick out name first to augment the error context.
-+ (let* ((name (parse-name context name))
-+ (context (context-append-name context name))
-+ (atlist-obj (atlist-parse context attrs "cgen_insn"))
-+ (isa-name-list (atlist-attr-value atlist-obj 'ISA #f)))
-+
-+ ;; Verify all specified ISAs are valid.
-+ (if (not (all-true? (map current-isa-lookup isa-name-list)))
-+ (parse-error context "unknown isa in isa list" isa-name-list))
-+
-+ (if (keep-atlist? atlist-obj #f)
-+
-+ (let ((ifield-assertion (if (and ifield-assertion
-+ (not (null? ifield-assertion)))
-+ (rtx-canonicalize context
-+ 'DFLT ;; BI?
-+ isa-name-list nil
-+ ifield-assertion)
-+ #f))
-+ (semantics (if (not (null? semantics))
-+ semantics
-+ #f))
-+ (format (/parse-insn-format
-+ (context-append context " format")
-+ (and (not (atlist-has-attr? atlist-obj 'VIRTUAL))
-+ (reader-verify-iformat? CURRENT-READER))
-+ isa-name-list
-+ fmt))
-+ (comment (parse-comment context comment))
-+ ; If there are no semantics, mark this as an alias.
-+ ; ??? Not sure this makes sense for multi-insns.
-+ (atlist-obj (if semantics
-+ atlist-obj
-+ (atlist-cons (bool-attr-make 'ALIAS #t)
-+ atlist-obj)))
-+ (syntax (parse-syntax context syntax))
-+ (timing (parse-insn-timing context timing))
-+ (handlers (parse-insn-handlers context handlers))
-+ )
-+
-+ (if (anyof-operand-format? format)
-+
-+ (make <multi-insn>
-+ (context-location context)
-+ name comment atlist-obj
-+ syntax
-+ format
-+ ifield-assertion
-+ semantics
-+ timing
-+ handlers)
-+
-+ (make <insn>
-+ (context-location context)
-+ name comment atlist-obj
-+ syntax
-+ format
-+ ifield-assertion
-+ semantics
-+ timing
-+ handlers)))
-+
-+ (begin
-+ (logit 2 "Ignoring " name ".\n")
-+ #f)))
-+)
-+
-+; Read an instruction description.
-+; This is the main routine for analyzing instructions in the .cpu file.
-+; This is also used to create virtual insns by apps like simulators.
-+; CONTEXT is a <context> object for error messages.
-+; ARG-LIST is an associative list of field name and field value.
-+; /insn-parse is invoked to create the <insn> object.
-+
-+(define (insn-read context . arg-list)
-+ (let (
-+ (name nil)
-+ (comment "")
-+ (attrs nil)
-+ (syntax nil)
-+ (fmt nil)
-+ (ifield-assertion nil)
-+ (semantics nil)
-+ (timing nil)
-+ (handlers nil)
-+ )
-+
-+ ; Loop over each element in ARG-LIST, recording what's found.
-+ (let loop ((arg-list arg-list))
-+ (if (null? arg-list)
-+ nil
-+ (let ((arg (car arg-list))
-+ (elm-name (caar arg-list)))
-+ (case elm-name
-+ ((name) (set! name (cadr arg)))
-+ ((comment) (set! comment (cadr arg)))
-+ ((attrs) (set! attrs (cdr arg)))
-+ ((syntax) (set! syntax (cadr arg)))
-+ ((format) (set! fmt (cadr arg)))
-+ ((ifield-assertion) (set! ifield-assertion (cadr arg)))
-+ ((semantics) (set! semantics (cadr arg)))
-+ ((timing) (set! timing (cdr arg)))
-+ ((handlers) (set! handlers (cdr arg)))
-+ (else (parse-error context "invalid insn arg" arg)))
-+ (loop (cdr arg-list)))))
-+
-+ ; Now that we've identified the elements, build the object.
-+ (/insn-parse context name comment attrs syntax fmt ifield-assertion
-+ semantics timing handlers))
-+)
-+
-+; Define an instruction object, name/value pair list version.
-+
-+(define define-insn
-+ (lambda arg-list
-+ (let ((i (apply insn-read (cons (make-current-context "define-insn")
-+ arg-list))))
-+ (if i
-+ (current-insn-add! i))
-+ i))
-+)
-+
-+; Define an instruction object, all arguments specified.
-+
-+(define (define-full-insn name comment attrs syntax fmt ifield-assertion
-+ semantics timing handlers)
-+ (let ((i (/insn-parse (make-current-context "define-full-insn")
-+ name comment attrs
-+ syntax fmt ifield-assertion
-+ semantics timing handlers)))
-+ (if i
-+ (current-insn-add! i))
-+ i)
-+)
-+
-+; Parsing support.
-+
-+; Parse an insn syntax field.
-+; SYNTAX is either a string or a list of strings, each element of which may
-+; in turn be a list of strings.
-+; ??? Not sure this extra flexibility is worth it yet.
-+
-+(define (parse-syntax context syntax)
-+ (cond ((list? syntax)
-+ (string-map (lambda (elm) (parse-syntax context elm)) syntax))
-+ ((or (string? syntax) (symbol? syntax))
-+ syntax)
-+ (else (parse-error context "improper syntax" syntax)))
-+)
-+
-+; Subroutine of /parse-insn-format to parse a symbol ifield spec.
-+
-+(define (/parse-insn-format-symbol context isa-name-list sym)
-+ (let ((op (current-op-lookup sym isa-name-list)))
-+ (if op
-+ (cond ((derived-operand? op)
-+ ; There is a one-to-one relationship b/w derived operands and
-+ ; the associated derived ifield.
-+ (let ((ifld (op-ifield op)))
-+ (assert (derived-ifield? ifld))
-+ ifld))
-+ ((anyof-operand? op)
-+ (ifld-new-value f-anyof op))
-+ (else
-+ (let ((ifld (op-ifield op)))
-+ (ifld-new-value ifld op))))
-+ ; An insn-enum?
-+ (let ((e (ienum-lookup-val sym)))
-+ (if e
-+ (ifld-new-value (ienum:fld (cdr e)) (car e))
-+ (parse-error context "bad format element, expecting symbol to be operand or insn enum" sym)))))
-+)
-+
-+; Subroutine of /parse-insn-format to parse an (ifield-name value) ifield spec.
-+;
-+; The last element is the ifield's value. It must be an integer.
-+; ??? Whether it can be negative is still unspecified.
-+; ??? While there might be a case where allowing floating point values is
-+; desirable, supporting them would require precise conversion routines.
-+; They should be rare enough that we instead punt.
-+;
-+; ??? May wish to support something like "(% startbit bitsize value)".
-+;
-+; ??? Error messages need improvement, but that's generally true of cgen.
-+
-+(define (/parse-insn-format-ifield-spec context ifld ifld-spec)
-+ (if (!= (length ifld-spec) 2)
-+ (parse-error context "bad ifield format, should be (ifield-name value)" ifld-spec))
-+
-+ (let ((value (cadr ifld-spec)))
-+ ; ??? This use to allow (ifield-name operand-name). That's how
-+ ; `operand-name' elements are handled, but there's no current need
-+ ; to handle (ifield-name operand-name).
-+ (cond ((integer? value)
-+ (ifld-new-value ifld value))
-+ ((symbol? value)
-+ (let ((e (enum-lookup-val value)))
-+ (if (not e)
-+ (parse-error context "symbolic ifield value not an enum" ifld-spec))
-+ (ifld-new-value ifld (car e))))
-+ (else
-+ (parse-error context "ifield value not an integer or enum" ifld-spec))))
-+)
-+
-+; Subroutine of /parse-insn-format to parse an
-+; (ifield-name value) ifield spec.
-+; ??? There is room for growth in the specification syntax here.
-+; Possibilities are (ifield-name|operand-name [options] [value]).
-+
-+(define (/parse-insn-format-list context isa-name-list spec)
-+ (let ((ifld (current-ifld-lookup (car spec) isa-name-list)))
-+ (if ifld
-+ (/parse-insn-format-ifield-spec context ifld spec)
-+ (parse-error context "unknown ifield" spec)))
-+)
-+
-+; Subroutine of /parse-insn-format to simplify it.
-+; Parse the provided iformat spec and return the list of ifields.
-+; ISA-NAME-lIST is the ISA attribute of the containing insn.
-+
-+(define (/parse-insn-iformat-iflds context isa-name-list fld-list)
-+ (if (null? fld-list)
-+ nil ; field list unspecified
-+ (case (car fld-list)
-+ ((+) (map (lambda (fld)
-+ (let ((f (if (string? fld)
-+ (string->symbol fld)
-+ fld)))
-+ (cond ((symbol? f)
-+ (/parse-insn-format-symbol context isa-name-list f))
-+ ((and (list? f)
-+ ; ??? This use to allow <ifield> objects
-+ ; in the `car' position. Checked for below.
-+ (symbol? (car f)))
-+ (/parse-insn-format-list context isa-name-list f))
-+ (else
-+ (if (and (list? f)
-+ (ifield? (car f)))
-+ (parse-error context "FIXME: <ifield> object in format spec" f))
-+ (parse-error context "bad format element, neither symbol nor ifield spec" f)))))
-+ (cdr fld-list)))
-+ ((=) (begin
-+ (if (or (!= (length fld-list) 2)
-+ (not (symbol? (cadr fld-list))))
-+ (parse-error context
-+ "bad `=' format spec, should be `(= insn-name)'"
-+ fld-list))
-+ (let ((insn (current-insn-lookup (cadr fld-list) isa-name-list)))
-+ (if (not insn)
-+ (parse-error context "unknown insn" (cadr fld-list)))
-+ (insn-iflds insn))))
-+ (else
-+ (parse-error context "format must begin with `+' or `='" fld-list))
-+ ))
-+)
-+
-+; Given an insn format field from a .cpu file, replace it with a list of
-+; ifield objects with the values assigned.
-+; ISA-NAME-LIST is the ISA attribute of the containing insn.
-+; If VERIFY? is non-#f, perform various checks on the format.
-+;
-+; An insn format field is a list of ifields that make up the instruction.
-+; All bits must be specified, including reserved bits
-+; [at present little checking is made of this, but the rule still holds].
-+;
-+; A normal entry begins with `+' and then consist of the following:
-+; - operand name
-+; - (ifield-name [options] value)
-+; - (operand-name [options] [value])
-+; - insn ifield enum
-+;
-+; Example: (+ OP1_ADD (f-res2 0) dr src1 (f-src2 1) (f-res1 #xea))
-+;
-+; where OP1_ADD is an enum, dr and src1 are operands, and f-src2 and f-res1
-+; are ifield's. The `+' allows for future extension.
-+;
-+; The other form of entry begins with `=' and is followed by an instruction
-+; name that has the same format. The specified instruction must already be
-+; defined. Instructions with this form typically also include an
-+; `ifield-assertion' spec to keep them separate.
-+;
-+; An empty field list is ok. This means it's unspecified.
-+; VIRTUAL insns have this.
-+;
-+; This is one of the more important routines to be efficient.
-+; It's called for each instruction, and is one of the more expensive routines
-+; in insn parsing.
-+
-+(define (/parse-insn-format context verify? isa-name-list ifld-list)
-+ (let* ((parsed-ifld-list
-+ (/parse-insn-iformat-iflds context isa-name-list ifld-list)))
-+
-+ ;; NOTE: We could sort the fields here, but it introduces differences
-+ ;; in the generated opcodes files. Later it might be a good thing to do
-+ ;; but keeping the output consistent is important right now.
-+ ;; (sorted-ifld-list (sort-ifield-list parsed-ifld-list
-+ ;; (not (current-arch-insn-lsb0?))))
-+ ;; The rest of the code assumes the list isn't sorted.
-+ ;; Is there a benefit to removing this assumption? Note that
-+ ;; multi-ifields can be discontiguous, so the sorting isn't perfect.
-+
-+ (if verify?
-+
-+ ;; Just pick the first ISA, the base len for each should be the same.
-+ ;; If not this is caught by compute-insn-base-mask-length.
-+ (let* ((isa (current-isa-lookup (car isa-name-list)))
-+ (base-len (isa-base-insn-bitsize isa))
-+ (pretty-print-iflds (lambda (iflds)
-+ (if (null? iflds)
-+ " none provided"
-+ (string-map (lambda (f)
-+ (string-append " "
-+ (ifld-pretty-print f)))
-+ iflds)))))
-+
-+ ;; Perform some error checking.
-+ ;; Look for overlapping ifields and missing bits.
-+ ;; With derived ifields this is really hard, so only do the base insn
-+ ;; for now. Do the simple test for now, it doesn't catch everything,
-+ ;; but it should catch a lot.
-+ ;; ??? One thing we don't catch yet is overlapping bits.
-+
-+ (let* ((base-iflds (find (lambda (f)
-+ (not (ifld-beyond-base? f)))
-+ (ifields-simple-ifields parsed-ifld-list)))
-+ (base-iflds-length (apply + (map ifld-length base-iflds))))
-+
-+ ;; FIXME: We don't use parse-error here because some existing ports
-+ ;; have problems, and I don't have time to fix them right now.
-+ (cond ((< base-iflds-length base-len)
-+ (parse-warning context
-+ (string-append
-+ "insufficient number of bits specified in base insn\n"
-+ "ifields:"
-+ (pretty-print-iflds parsed-ifld-list)
-+ "\nprovided spec")
-+ ifld-list))
-+ ((> base-iflds-length base-len)
-+ (parse-warning context
-+ (string-append
-+ "too many or duplicated bits specified in base insn\n"
-+ "ifields:"
-+ (pretty-print-iflds parsed-ifld-list)
-+ "\nprovided spec")
-+ ifld-list)))
-+
-+ ;; Detect duplicate ifields.
-+ (if (!= (length base-iflds)
-+ (length (obj-list-nub base-iflds)))
-+ (parse-error-continuable context
-+ "duplicate ifields present"
-+ ifld-list))
-+ )
-+ ))
-+
-+ parsed-ifld-list)
-+)
-+
-+; Return a boolean indicating if IFLD-LIST contains anyof operands.
-+
-+(define (anyof-operand-format? ifld-list)
-+ (any-true? (map (lambda (f)
-+ (or (ifld-anyof? f)
-+ (derived-ifield? f)))
-+ ifld-list))
-+)
-+
-+; Insn utilities.
-+; ??? multi-insn support wip, may require changes here.
-+
-+; Return a boolean indicating if INSN is an alias insn.
-+
-+(define (insn-alias? insn)
-+ (obj-has-attr? insn 'ALIAS)
-+)
-+
-+; Return a list of instructions that are not aliases in INSN-LIST.
-+
-+(define (non-alias-insns insn-list)
-+ (find (lambda (insn)
-+ (not (insn-alias? insn)))
-+ insn-list)
-+)
-+
-+; Return a boolean indicating if INSN is a "real" INSN
-+; (not ALIAS and not VIRTUAL and not a <multi-insn>).
-+
-+(define (insn-real? insn)
-+ (let ((atlist (obj-atlist insn)))
-+ (and (not (atlist-has-attr? atlist 'ALIAS))
-+ (not (atlist-has-attr? atlist 'VIRTUAL))
-+ (not (multi-insn? insn))))
-+)
-+
-+; Return a list of real instructions in INSN-LIST.
-+
-+(define (real-insns insn-list)
-+ (find insn-real? insn-list)
-+)
-+
-+; Return a boolean indicating if INSN is a virtual insn.
-+
-+(define (insn-virtual? insn)
-+ (obj-has-attr? insn 'VIRTUAL)
-+)
-+
-+; Return a list of virtual instructions in INSN-LIST.
-+
-+(define (virtual-insns insn-list)
-+ (find insn-virtual? insn-list)
-+)
-+
-+; Return a list of non-alias/non-pbb insns in INSN-LIST.
-+
-+(define (non-alias-pbb-insns insn-list)
-+ (find (lambda (insn)
-+ (let ((atlist (obj-atlist insn)))
-+ (and (not (atlist-has-attr? atlist 'ALIAS))
-+ (not (atlist-has-attr? atlist 'PBB)))))
-+ insn-list)
-+)
-+
-+; Return a list of multi-insns in INSN-LIST.
-+
-+(define (multi-insns insn-list)
-+ (find multi-insn? insn-list)
-+)
-+
-+; And the opposite:
-+
-+(define (non-multi-insns insn-list)
-+ (find (lambda (insn) (not (multi-insn? insn))) insn-list)
-+)
-+
-+; Filter out instructions whose ifield patterns are strict supersets of
-+; another, keeping the less general cousin. Used to resolve ambiguity
-+; when there are no more bits to consider.
-+
-+(define (filter-non-specialized-ambiguous-insns insn-list)
-+ (logit 3 "Filtering " (length insn-list) " instructions for non specializations.\n")
-+ (find (lambda (insn)
-+ (let* ((i-mask (insn-base-mask insn))
-+ (i-mask-len (insn-base-mask-length insn))
-+ (i-value (insn-value insn))
-+ (subset-insn (find-first
-+ (lambda (insn2) ; insn2: possible submatch (more mask bits)
-+ (let ((i2-mask (insn-base-mask insn2))
-+ (i2-mask-len (insn-base-mask-length insn2))
-+ (i2-value (insn-value insn2)))
-+ (and (not (eq? insn insn2))
-+ (= i-mask-len i2-mask-len)
-+ (mask-superset? i-mask i-value i2-mask i2-value))))
-+ insn-list))
-+ (keep? (not subset-insn)))
-+ (if (not keep?)
-+ (logit 2
-+ "Instruction " (obj:name insn) " specialization-filtered by "
-+ (obj:name subset-insn) "\n"))
-+ keep?))
-+ insn-list)
-+)
-+
-+; Filter out instructions whose ifield patterns are identical.
-+
-+(define (filter-identical-ambiguous-insns insn-list)
-+ (logit 3 "Filtering " (length insn-list) " instructions for identical variants.\n")
-+ (let loop ((l insn-list) (result nil))
-+ (cond ((null? l) (reverse! result))
-+ ((find-identical-insn (car l) (cdr l)) (loop (cdr l) result))
-+ (else (loop (cdr l) (cons (car l) result)))
-+ )
-+ )
-+)
-+
-+(define (find-identical-insn insn insn-list)
-+ (let ((i-mask (insn-base-mask insn))
-+ (i-mask-len (insn-base-mask-length insn))
-+ (i-value (insn-value insn)))
-+ (find-first
-+ (lambda (insn2)
-+ (let ((i2-mask (insn-base-mask insn2))
-+ (i2-mask-len (insn-base-mask-length insn2))
-+ (i2-value (insn-value insn2)))
-+ (and (= i-mask-len i2-mask-len)
-+ (= i-mask i2-mask)
-+ (= i-value i2-value))))
-+ insn-list))
-+)
-+
-+; Helper function for above: does (m1,v1) match a STRICT superset of (m2,v2) ?
-+;
-+; eg> mask-superset? #b1100 #b1000 #b1110 #b1010 -> #t
-+; eg> mask-superset? #b1100 #b1000 #b1010 #b1010 -> #f
-+; eg> mask-superset? #b1100 #b1000 #b1110 #b1100 -> #f
-+; eg> mask-superset? #b1100 #b1000 #b1100 #b1000 -> #f
-+
-+(define (mask-superset? m1 v1 m2 v2)
-+ (let ((result
-+ (and (= (cg-logand m1 m2) m1)
-+ (= (cg-logand m1 v1) (cg-logand m1 v2))
-+ (not (and (= m1 m2) (= v1 v2))))))
-+ (if result (logit 4
-+ "(" (number->string m1 16) "," (number->string v1 16) ")"
-+ " contains "
-+ "(" (number->string m2 16) "," (number->string v2 16) ")"
-+ "\n"))
-+ result)
-+)
-+
-+;; Return a boolean indicating if INSN is a cti [control transfer insn]
-+;; according the its attributes.
-+;;
-+;; N.B. This only looks at the insn's atlist, which only contains what was
-+;; specified in the .cpu file. .cpu files are not required to manually mark
-+;; CTI insns. Basically this exists as an escape hatch in case semantic-attrs
-+;; gets it wrong.
-+
-+(define (insn-cti-attr? insn)
-+ (atlist-cti? (obj-atlist insn))
-+)
-+
-+;; Return a boolean indicating if INSN is a cti [control transfer insn].
-+;; This includes SKIP-CTI insns even though they don't terminate a basic block.
-+;; ??? SKIP-CTI insns are wip, waiting for more examples of how they're used.
-+;;
-+;; N.B. This requires the <sformat> of INSN.
-+
-+(define (insn-cti? insn)
-+ (or (insn-cti-attr? insn)
-+ (sfmt-cti? (insn-sfmt insn)))
-+)
-+
-+; Return a boolean indicating if INSN can be executed in parallel.
-+; Such insns are required to have enum attribute PARALLEL != NO.
-+; This is worded specifically to allow the PARALLEL attribute to have more
-+; than just NO/YES values (should a target want to do so).
-+; This specification may not be sufficient, but the intent is explicit.
-+
-+(define (insn-parallel? insn)
-+ (let ((atval (obj-attr-value insn 'PARALLEL)))
-+ (and atval (not (eq? atval 'NO))))
-+)
-+
-+; Return a list of the insns that support parallel execution in INSN-LIST.
-+
-+(define (parallel-insns insn-list)
-+ (find insn-parallel? insn-list)
-+)
-+
-+; Instruction field utilities.
-+
-+; Return a boolean indicating if INSN has ifield named F-NAME.
-+
-+(define (insn-has-ifield? insn f-name)
-+ (->bool (object-assq f-name (insn-iflds insn)))
-+)
-+
-+; Insn opcode value utilities.
-+
-+; Given INSN, return the length in bits of the base mask (insn-base-mask).
-+
-+(define (insn-base-mask-length insn)
-+ (ifmt-mask-length (insn-ifmt insn))
-+)
-+
-+; Given INSN, return the bitmask of constant values (the opcode field)
-+; in the base part.
-+
-+(define (insn-base-mask insn)
-+ (ifmt-mask (insn-ifmt insn))
-+)
-+
-+; Given INSN, return the sum of the constant values in the insn
-+; (i.e. the opcode field).
-+;
-+; See also (compute-insn-base-mask).
-+;
-+; FIXME: For non-fixed-length ISAs, using this doesn't feel right.
-+
-+(define (insn-value insn)
-+ (if (elm-get insn '/insn-value)
-+ (elm-get insn '/insn-value)
-+ (let* ((base-len (insn-base-mask-length insn))
-+ (value (apply +
-+ (map (lambda (fld) (ifld-value fld base-len (ifld-get-value fld)))
-+ (find ifld-constant?
-+ (ifields-base-ifields (insn-iflds insn))))
-+ )))
-+ (elm-set! insn '/insn-value value)
-+ value))
-+)
-+
-+;; Return the base value of INSN.
-+
-+(define (insn-base-value insn)
-+ (if (elm-get insn '/insn-base-value)
-+ (elm-get insn '/insn-base-value)
-+ (let* ((base-len (insn-base-mask-length insn))
-+ (constant-base-iflds
-+ (find (lambda (f)
-+ (and (ifld-constant? f)
-+ (not (ifld-beyond-base? f))))
-+ (ifields-base-ifields (insn-iflds insn))))
-+ (base-value (apply +
-+ (map (lambda (f)
-+ (ifld-value f base-len (ifld-get-value f)))
-+ constant-base-iflds))))
-+ (elm-set! insn '/insn-base-value base-value)
-+ base-value))
-+)
-+
-+; Insn operand utilities.
-+
-+; Lookup operand SEM-NAME in INSN.
-+
-+(define (insn-lookup-op insn sem-name)
-+ (or (op:lookup-sem-name (sfmt-in-ops (insn-sfmt insn)) sem-name)
-+ (op:lookup-sem-name (sfmt-out-ops (insn-sfmt insn)) sem-name))
-+)
-+
-+; Insn syntax utilities.
-+
-+; Create a list of syntax strings broken up into a list of characters and
-+; operand objects.
-+
-+(define (syntax-break-out syntax isa-name-list)
-+ (let ((result nil))
-+ ; ??? The style of the following could be more Scheme-like. Later.
-+ (let loop ()
-+ (if (> (string-length syntax) 0)
-+ (begin
-+ (cond
-+ ; Handle escaped syntax metacharacters.
-+ ((char=? #\\ (string-ref syntax 0))
-+ (begin
-+ (if (= (string-length syntax) 1)
-+ (parse-error context "syntax-break-out: missing char after '\\' in " syntax))
-+ (set! result (cons (substring syntax 1 2) result))
-+ (set! syntax (string-drop 2 syntax))))
-+ ; Handle operand reference.
-+ ((char=? #\$ (string-ref syntax 0))
-+ ; Extract the symbol from the string, get the operand.
-+ ; FIXME: Will crash if $ is last char in string.
-+ (if (char=? #\{ (string-ref syntax 1))
-+ (let ((n (string-index syntax #\})))
-+ (set! result (cons (current-op-lookup
-+ (string->symbol
-+ (substring syntax 2 n))
-+ isa-name-list)
-+ result))
-+ (set! syntax (string-drop (+ 1 n) syntax)))
-+ (let ((n (id-len (string-drop1 syntax))))
-+ (set! result (cons (current-op-lookup
-+ (string->symbol
-+ (substring syntax 1 (+ 1 n)))
-+ isa-name-list)
-+ result))
-+ (set! syntax (string-drop (+ 1 n) syntax)))))
-+ ; Handle everything else.
-+ (else (set! result (cons (substring syntax 0 1) result))
-+ (set! syntax (string-drop1 syntax))))
-+ (loop))))
-+ (reverse result))
-+)
-+
-+; Given a list of syntax elements (e.g. the result of syntax-break-out),
-+; create a syntax string.
-+
-+(define (syntax-make elements)
-+ (apply string-append
-+ (map (lambda (e)
-+ (cond ((char? e)
-+ (string "\\" e))
-+ ((string? e)
-+ e)
-+ (else
-+ (assert (operand? e))
-+ (string-append "${" (obj:str-name e) "}"))))
-+ elements))
-+)
-+
-+; Called before a .cpu file is read in.
-+
-+(define (insn-init!)
-+ (reader-add-command! 'define-insn
-+ "\
-+Define an instruction, name/value pair list version.
-+"
-+ nil 'arg-list define-insn)
-+ (reader-add-command! 'define-full-insn
-+ "\
-+Define an instruction, all arguments specified.
-+"
-+ nil '(name comment attrs syntax fmt ifield-assertion semantics timing handlers)
-+ define-full-insn)
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Called before a .cpu file is read in to install any builtins.
-+
-+(define (insn-builtin!)
-+ ; Standard insn attributes.
-+ ; ??? Some of these can be combined into one.
-+
-+ (define-attr '(for insn) '(type boolean) '(name UNCOND-CTI) '(comment "unconditional cti"))
-+
-+ (define-attr '(for insn) '(type boolean) '(name COND-CTI) '(comment "conditional cti"))
-+
-+ ; SKIP-CTI: one or more immediately following instructions are conditionally
-+ ; executed (or skipped)
-+ (define-attr '(for insn) '(type boolean) '(name SKIP-CTI) '(comment "skip cti"))
-+
-+ ; DELAY-SLOT: insn has one or more delay slots (wip)
-+ (define-attr '(for insn) '(type boolean) '(name DELAY-SLOT) '(comment "insn has a delay slot"))
-+
-+ ; RELAXABLE: Insn has one or more identical but larger variants.
-+ ; The assembler tries this one first and then the relaxation phase
-+ ; switches to the larger ones as necessary.
-+ ; All insns of identical behaviour have a RELAX_FOO attribute that groups
-+ ; them together.
-+ ; FIXME: This is a case where we need one attribute with several values.
-+ ; Presently each RELAX_FOO will use up a bit.
-+ (define-attr '(for insn) '(type boolean) '(name RELAXABLE)
-+ '(comment "insn is relaxable"))
-+
-+ ; RELAXED: Large relaxable variant. Avoided by assembler in first pass.
-+ (define-attr '(for insn) '(type boolean) '(name RELAXED)
-+ '(comment "relaxed form of insn"))
-+
-+ ; NO-DIS: For macro insns, do not use during disassembly.
-+ (define-attr '(for insn) '(type boolean) '(name NO-DIS) '(comment "don't use for disassembly"))
-+
-+ ; PBB: Virtual insn used for PBB support.
-+ (define-attr '(for insn) '(type boolean) '(name PBB) '(comment "virtual insn used for PBB support"))
-+
-+ ; DECODE-SPLIT: insn resulted from decode-split processing
-+ (define-attr '(for insn) '(type boolean) '(name DECODE-SPLIT) '(comment "insn split from another insn for decoding purposes") '(attrs META))
-+
-+ ; Also (defined elsewhere):
-+ ; VIRTUAL: Helper insn used by the simulator.
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Called after the .cpu file has been read in.
-+
-+(define (insn-finish!)
-+ *UNSPECIFIED*
-+)
-diff -Nur binutils-2.24.orig/cgen/INSTALL binutils-2.24/cgen/INSTALL
---- binutils-2.24.orig/cgen/INSTALL 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/INSTALL 2016-06-30 21:26:12.657893268 +0200
-@@ -0,0 +1,182 @@
-+Basic Installation
-+==================
-+
-+ These are generic installation instructions.
-+
-+ The `configure' shell script attempts to guess correct values for
-+various system-dependent variables used during compilation. It uses
-+those values to create a `Makefile' in each directory of the package.
-+It may also create one or more `.h' files containing system-dependent
-+definitions. Finally, it creates a shell script `config.status' that
-+you can run in the future to recreate the current configuration, a file
-+`config.cache' that saves the results of its tests to speed up
-+reconfiguring, and a file `config.log' containing compiler output
-+(useful mainly for debugging `configure').
-+
-+ If you need to do unusual things to compile the package, please try
-+to figure out how `configure' could check whether to do them, and mail
-+diffs or instructions to the address given in the `README' so they can
-+be considered for the next release. If at some point `config.cache'
-+contains results you don't want to keep, you may remove or edit it.
-+
-+ The file `configure.in' is used to create `configure' by a program
-+called `autoconf'. You only need `configure.in' if you want to change
-+it or regenerate `configure' using a newer version of `autoconf'.
-+
-+The simplest way to compile this package is:
-+
-+ 1. `cd' to the directory containing the package's source code and type
-+ `./configure' to configure the package for your system. If you're
-+ using `csh' on an old version of System V, you might need to type
-+ `sh ./configure' instead to prevent `csh' from trying to execute
-+ `configure' itself.
-+
-+ Running `configure' takes awhile. While running, it prints some
-+ messages telling which features it is checking for.
-+
-+ 2. Type `make' to compile the package.
-+
-+ 3. Optionally, type `make check' to run any self-tests that come with
-+ the package.
-+
-+ 4. Type `make install' to install the programs and any data files and
-+ documentation.
-+
-+ 5. You can remove the program binaries and object files from the
-+ source code directory by typing `make clean'. To also remove the
-+ files that `configure' created (so you can compile the package for
-+ a different kind of computer), type `make distclean'. There is
-+ also a `make maintainer-clean' target, but that is intended mainly
-+ for the package's developers. If you use it, you may have to get
-+ all sorts of other programs in order to regenerate files that came
-+ with the distribution.
-+
-+Compilers and Options
-+=====================
-+
-+ Some systems require unusual options for compilation or linking that
-+the `configure' script does not know about. You can give `configure'
-+initial values for variables by setting them in the environment. Using
-+a Bourne-compatible shell, you can do that on the command line like
-+this:
-+ CC=c89 CFLAGS=-O2 LIBS=-lposix ./configure
-+
-+Or on systems that have the `env' program, you can do it like this:
-+ env CPPFLAGS=-I/usr/local/include LDFLAGS=-s ./configure
-+
-+Compiling For Multiple Architectures
-+====================================
-+
-+ You can compile the package for more than one kind of computer at the
-+same time, by placing the object files for each architecture in their
-+own directory. To do this, you must use a version of `make' that
-+supports the `VPATH' variable, such as GNU `make'. `cd' to the
-+directory where you want the object files and executables to go and run
-+the `configure' script. `configure' automatically checks for the
-+source code in the directory that `configure' is in and in `..'.
-+
-+ If you have to use a `make' that does not supports the `VPATH'
-+variable, you have to compile the package for one architecture at a time
-+in the source code directory. After you have installed the package for
-+one architecture, use `make distclean' before reconfiguring for another
-+architecture.
-+
-+Installation Names
-+==================
-+
-+ By default, `make install' will install the package's files in
-+`/usr/local/bin', `/usr/local/man', etc. You can specify an
-+installation prefix other than `/usr/local' by giving `configure' the
-+option `--prefix=PATH'.
-+
-+ You can specify separate installation prefixes for
-+architecture-specific files and architecture-independent files. If you
-+give `configure' the option `--exec-prefix=PATH', the package will use
-+PATH as the prefix for installing programs and libraries.
-+Documentation and other data files will still use the regular prefix.
-+
-+ In addition, if you use an unusual directory layout you can give
-+options like `--bindir=PATH' to specify different values for particular
-+kinds of files. Run `configure --help' for a list of the directories
-+you can set and what kinds of files go in them.
-+
-+ If the package supports it, you can cause programs to be installed
-+with an extra prefix or suffix on their names by giving `configure' the
-+option `--program-prefix=PREFIX' or `--program-suffix=SUFFIX'.
-+
-+Optional Features
-+=================
-+
-+ Some packages pay attention to `--enable-FEATURE' options to
-+`configure', where FEATURE indicates an optional part of the package.
-+They may also pay attention to `--with-PACKAGE' options, where PACKAGE
-+is something like `gnu-as' or `x' (for the X Window System). The
-+`README' should mention any `--enable-' and `--with-' options that the
-+package recognizes.
-+
-+ For packages that use the X Window System, `configure' can usually
-+find the X include and library files automatically, but if it doesn't,
-+you can use the `configure' options `--x-includes=DIR' and
-+`--x-libraries=DIR' to specify their locations.
-+
-+Specifying the System Type
-+==========================
-+
-+ There may be some features `configure' can not figure out
-+automatically, but needs to determine by the type of host the package
-+will run on. Usually `configure' can figure that out, but if it prints
-+a message saying it can not guess the host type, give it the
-+`--host=TYPE' option. TYPE can either be a short name for the system
-+type, such as `sun4', or a canonical name with three fields:
-+ CPU-COMPANY-SYSTEM
-+
-+See the file `config.sub' for the possible values of each field. If
-+`config.sub' isn't included in this package, then this package doesn't
-+need to know the host type.
-+
-+ If you are building compiler tools for cross-compiling, you can also
-+use the `--target=TYPE' option to select the type of system they will
-+produce code for and the `--build=TYPE' option to select the type of
-+system on which you are compiling the package.
-+
-+Sharing Defaults
-+================
-+
-+ If you want to set default values for `configure' scripts to share,
-+you can create a site shell script called `config.site' that gives
-+default values for variables like `CC', `cache_file', and `prefix'.
-+`configure' looks for `PREFIX/share/config.site' if it exists, then
-+`PREFIX/etc/config.site' if it exists. Or, you can set the
-+`CONFIG_SITE' environment variable to the location of the site script.
-+A warning: not all `configure' scripts look for a site script.
-+
-+Operation Controls
-+==================
-+
-+ `configure' recognizes the following options to control how it
-+operates.
-+
-+`--cache-file=FILE'
-+ Use and save the results of the tests in FILE instead of
-+ `./config.cache'. Set FILE to `/dev/null' to disable caching, for
-+ debugging `configure'.
-+
-+`--help'
-+ Print a summary of the options to `configure', and exit.
-+
-+`--quiet'
-+`--silent'
-+`-q'
-+ Do not print messages saying which checks are being made. To
-+ suppress all normal output, redirect it to `/dev/null' (any error
-+ messages will still be shown).
-+
-+`--srcdir=DIR'
-+ Look for the package's source code in directory DIR. Usually
-+ `configure' can determine that directory automatically.
-+
-+`--version'
-+ Print the version of Autoconf used to generate the `configure'
-+ script, and exit.
-+
-+`configure' also accepts some other, not widely useful, options.
-diff -Nur binutils-2.24.orig/cgen/intrinsics.scm binutils-2.24/cgen/intrinsics.scm
---- binutils-2.24.orig/cgen/intrinsics.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/intrinsics.scm 2016-06-30 21:26:12.661893424 +0200
-@@ -0,0 +1,1716 @@
-+; intrinsics support generator support routines.
-+;
-+; This entire file is deeply littered with mep-specific logic. You have
-+; been warned.
-+;
-+; Copyright (C) 2000, 2001, 2002, 2003, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+
-+; Specify which application.
-+(set! APPLICATION 'INTRINSICS)
-+
-+(debug-enable 'backtrace)
-+
-+; String containing copyright text.
-+(define CURRENT-COPYRIGHT #f)
-+
-+; String containing text defining the package we're generating code for.
-+(define CURRENT-PACKAGE #f)
-+
-+; Initialize the options.
-+(define (option-init!)
-+ (set! CURRENT-COPYRIGHT copyright-fsf)
-+ (set! CURRENT-PACKAGE package-gnu-simulators)
-+ *UNSPECIFIED*
-+ )
-+
-+(define (intrinsics-analyze!)
-+ (arch-analyze-insns! CURRENT-ARCH
-+ #t ; include aliases
-+ #t) ; do analyze the semantics
-+ )
-+
-+;; Shortcuts for commonly-used functions.
-+(define sa string-append)
-+(define (st x) (stringize x " "))
-+
-+;; HELPER FUNCTIONS
-+;; ----------------
-+
-+;; True if FN returns the same value for FIRST and SECOND.
-+(define (same? fn first second)
-+ (equal? (fn first) (fn second)))
-+
-+;; True if predicate FN holds for both FIRST and SECOND.
-+(define (both? fn first second)
-+ (and (fn first) (fn second)))
-+
-+;; True if FN holds for every element of LIST.
-+(define (for-all? fn list)
-+ (let loop ((list list))
-+ (or (null? list)
-+ (and (fn (car list))
-+ (loop (cdr list))))))
-+
-+;; True if FN holds for one element of LIST.
-+(define (exists? fn list)
-+ (let loop ((list list))
-+ (and (pair? list)
-+ (or (fn (car list))
-+ (loop (cdr list))))))
-+
-+;; True if LIST1 and LIST2 are the same length and (FN X Y) holds for
-+;; each (X Y) in the zipped list.
-+(define (for-all-pairs? fn list1 list2)
-+ (let loop ((list1 list1) (list2 list2))
-+ (or (both? null? list1 list2)
-+ (and (both? pair? list1 list2)
-+ (fn (car list1) (car list2))
-+ (loop (cdr list1) (cdr list2))))))
-+
-+;; Use (SETTER ELEM INDEX) to assign some number INDEX to each element
-+;; ELEM of LIST. BASE is the index of the first element; other elements
-+;; are numbered incrementally. Return the first unused index value.
-+(define (number-list setter list base)
-+ (let loop ((list list) (index base))
-+ (if (null? list)
-+ index
-+ (begin
-+ (setter (car list) index)
-+ (loop (cdr list) (+ index 1))))))
-+
-+;; Apply FN to every list of arguments in ARGS.
-+(define (apply-list fn args)
-+ (for-each (lambda (list) (apply fn list)) args))
-+
-+;; Sort list ELEMS with partial order FN, where (FN X Y) is true iff X "<=" Y.
-+(define (sort-partial elems fn)
-+ (if (null? elems)
-+ elems
-+ (let ((sorted (list (car elems))))
-+ (for-each
-+ (lambda (elem)
-+ (let loop ((pos sorted))
-+ (if (fn elem (car pos))
-+ (begin
-+ (set-cdr! pos (cons (car pos) (cdr pos)))
-+ (set-car! pos elem))
-+ (if (null? (cdr pos))
-+ (set-cdr! pos (list elem))
-+ (loop (cdr pos))))))
-+ (cdr elems))
-+ sorted)))
-+
-+;; Generate preprocessor macro names, suitable for use as bitmasks.
-+(define (bitmask-name prefix name)
-+ (string-upcase (sa prefix "_" (gen-c-symbol name))))
-+
-+;; Return an inclusive OR of every bitmask member in NAMES.
-+(define (bitmask prefix names)
-+ (if (null? names)
-+ "0"
-+ (stringize (map (lambda (x) (bitmask-name prefix x)) names) "|")))
-+
-+;; Assign values to every bitmask in NAMES.
-+(define (define-bitmasks prefix names)
-+ (number-list
-+ (lambda (name index)
-+ (string-write "#define " (bitmask-name prefix name)
-+ " " (st (logsll 1 index)) "\n"))
-+ names 0)
-+ (string-write "\n"))
-+
-+;; Convert ISA symbol ISA into a target-frobbed string
-+(define (convert-isa isa)
-+ (target:frob-isa-name (symbol->string isa)))
-+
-+;; PRETTY-PRINTER SUPPORT
-+;; ----------------------
-+
-+;; How many spaces to indent the next line.
-+(define indentation 0)
-+
-+;; End the current line and indent the new one.
-+(define (line-break)
-+ (string-write "\n" (make-string indentation #\space)))
-+
-+;; Helper functions, useful as arguments to WRITE-LIST.
-+(define (comma-break)
-+ (string-write ", "))
-+
-+(define (comma-line-break)
-+ (string-write ",")
-+ (line-break))
-+
-+;; Execute BODY so that every call to LINE-BREAK will indent by
-+;; INDENT more spaces than it does now.
-+(defmacro write-with-indent (indent . body)
-+ `(begin
-+ (set! indentation (+ indentation ,indent))
-+ ,(cons 'begin body)
-+ (set! indentation (- indentation ,indent))))
-+
-+;; Write PREFIX, then execute BODY so that every call to LINE-BREAK
-+;; will indent to the end of the prefix. Write SUFFIX afterwards.
-+;;
-+;; This function should only be called at the start of a new line.
-+(defmacro write-construct (prefix suffix . body)
-+ `(begin
-+ (string-write ,prefix)
-+ (write-with-indent (string-length ,prefix) ,(cons 'begin body))
-+ (string-write ,suffix)))
-+
-+;; Write out each element of LIST individually using WRITE. Use (BREAK)
-+;; to separate the elements.
-+(define (write-list break list write)
-+ (if (pair? list)
-+ (begin
-+ (write (car list))
-+ (for-each (lambda (x) (break) (write x)) (cdr list)))))
-+
-+;; Like WRITE-LIST, but write DUMMY if the list is empty.
-+(define (write-nonempty-list break list write dummy)
-+ (if (null? list)
-+ (string-write dummy)
-+ (write-list break list write)))
-+
-+;; MACROS
-+;; ------
-+
-+;; little macro for making assoc tables with nice names
-+(defmacro deftable (basename)
-+ (let* ((table (symbol-append basename '-table))
-+ (initializer (symbol-append 'init- basename '!))
-+ (keys (symbol-append basename '-keys))
-+ (getter (symbol-append 'get- basename))
-+ (setter (symbol-append 'set- basename '!)))
-+ `(begin
-+ (define ,table '())
-+ (define (,initializer) (set! ,table '()))
-+ (define (,keys) (map car ,table))
-+ (define (,getter k)
-+ (let ((pair (assoc k ,table)))
-+ (if pair (cdr pair) pair)))
-+ (define (,setter k v)
-+ (let ((pair (assoc k ,table)))
-+ (if pair
-+ (set-cdr! pair v)
-+ (set! ,table (cons (cons k v) ,table))))))))
-+
-+;; Make a very simple structure interface. NAME is the structure's name
-+;; and FIELDS is a list of its fields.
-+;;
-+;; (make-struct foo (f1 f2 f3 ...))
-+;;
-+;; defines the following functions:
-+;;
-+;; (foo:make f1 f2 f3 ...)
-+;; Create a new object with the given values for fields F1, F2, F3...
-+;;
-+;; (foo:f1 object)
-+;; Return the value of OBJECT's F1 field, or #f if OBJECT itself is #f.
-+;;
-+;; (foo:set-f1! object value)
-+;; Set OBJECT's F1 field to VALUE.
-+;;
-+;; ... and likewise for the other fields. Each structure is represented
-+;; as a vector of its elements.
-+(defmacro make-struct (name fields)
-+ (let ((commands (list `(define ,(symbol-append name ':make)
-+ (lambda ,fields ,(cons 'vector fields))))))
-+ (number-list
-+ (lambda (field index)
-+ (let* ((setname (symbol-append name ':set- field '!))
-+ (getname (symbol-append name ': field))
-+ (setter `(define (,setname x val) (vector-set! x ,index val)))
-+ (getter `(define (,getname x) (and x (vector-ref x ,index)))))
-+ (set! commands (cons setter (cons getter commands)))))
-+ fields
-+ 0)
-+ (cons 'begin commands)))
-+
-+
-+;; MEP-SPECIFIC DETAILS
-+;; --------------------
-+
-+;; Predicates for recognizing coprocessor register set hardware names.
-+;; HW is the hardware name: a symbol, or #:unbound in some cases.
-+;;
-+;; At the moment, we do this by looking at the hardware's name as a
-+;; string; it would be more graceful to handle this with an attribute.
-+;;
-+;; Older MeP .cpu files call the coprocessor register sets h-cr,
-+;; h-cr64, and h-ccr. Newer versions of a2cgen suffix the hardware
-+;; names for the coprocessor's registers with the name of the
-+;; coprocessor, and the me_module number. So, for example, if
-+;; me_module 3 has an rhcop coprocessor, its register sets will be
-+;; called h-cr64-rhcop-3, h-cr-rhcop-3, and h-ccr-rhcop-3.
-+
-+;; Return a predicate that recognizes hardware names that start with
-+;; PREFIX. PREFIX is a string, like "h-cr"; the returned predicate
-+;; will return true if its argument is the symbol whose name is
-+;; PREFIX, (e.g. 'h-cr), or any symbol whose name begins with PREFIX
-+;; followed by a hyphen (e.g. 'h-cr-rhcop-1).
-+(define (suffixed-hardware-recognizer prefix)
-+ ;; Precompute some stuff.
-+ (let* ((no-hyphen-sym (string->symbol prefix))
-+ (hyphenated (string-append prefix "-"))
-+ (hyphenated-len (string-length hyphenated)))
-+ (lambda (obj)
-+ (or (eq? obj no-hyphen-sym)
-+ (and (symbol? obj)
-+ (let ((name (symbol->string obj)))
-+ (and (>= (string-length name) hyphenated-len)
-+ (string=? (substring name 0 hyphenated-len)
-+ hyphenated))))))))
-+
-+(define is-h-cr64? (suffixed-hardware-recognizer "h-cr64"))
-+(define is-h-cr? (suffixed-hardware-recognizer "h-cr"))
-+(define is-h-ccr? (suffixed-hardware-recognizer "h-ccr"))
-+
-+;; Return the gcc rtl mode that should be used for operand OP.
-+;; Return #f to use the default, target-independent choice.
-+(define (target:guess-mode op)
-+ (cond
-+ ((equal? (md-operand:cdata op) 'FMAX_INT) "SI")
-+ ((equal? (md-operand:cdata op) 'FMAX_FLOAT) "SF")
-+ ((is-h-cr64? (md-operand:hw op)) "DI")
-+ ((is-h-cr? (md-operand:hw op)) "SI")
-+ ((not (memory? (md-operand:type op))) "SI")
-+ (else #f)))
-+
-+;; Return the list of arguments for an intrinsic function. ARGUMENTS is
-+;; a list of the operands found in the instruction's syntax string, in the
-+;; order they appear. OUTPUT-OPERANDS is a list of all the instruction's
-+;; output operands (no particular order). Both lists contain md-operands.
-+;;
-+;; Normally ARGUMENTS itself is the correct return value, but we
-+;; need a couple of MeP-specific hacks:
-+;;
-+;; - Instructions that write to r0 do not make r0 a syntactic
-+;; operand. Instead, they embed "\\$0" in the syntax string.
-+;; Cope with this by adding $0 to the beginning of the list
-+;; if written.
-+;;
-+;; - $spr and $tpr can appear in the syntax string but are
-+;; not supposed to be treated as arguments to the intrinsic.
-+(define (target:frob-arguments arguments output-operands)
-+ (set! arguments (find (lambda (op)
-+ (not (member (md-operand:name op) '(tpr spr))))
-+ arguments))
-+ (let ((r0-writes (find (lambda (op)
-+ (equal? (md-operand:fixed-register op) 0))
-+ output-operands)))
-+ (if (pair? r0-writes)
-+ (set! arguments (cons (car r0-writes) arguments))))
-+ arguments)
-+
-+;; Convert the given cgen ISA name into its gcc equivalent.
-+;; cgen names such as 'ext_core<X>' and 'ext_cop<X>_YY' become 'ext<X>'.
-+(define (target:frob-isa-name isa)
-+ (cond
-+ ((equal? "ext_cop" (string-take 7 isa))
-+ (sa "ext" (string-drop 7 (string-drop -3 isa))))
-+
-+ ((equal? "ext_core" (string-take 8 isa))
-+ (sa "ext" (string-drop 8 isa)))
-+
-+ (else isa)))
-+
-+;; Apply FN once for each ISA. The first argument to FN is a user-readable
-+;; string that describes the ISA. The second argument is the ISA name
-+;; returned by frob-isa-name.
-+(define (target:for-each-isa! fn)
-+ (for-each (lambda (entry)
-+ (apply fn (car entry) (sa "ext" (st (cadr entry))) '()))
-+ (cdr (attr-values (current-attr-lookup 'CONFIG)))))
-+
-+;; Return the number of the first register belonging to the given
-+;; hardware element.
-+(define (target:base-reg hw)
-+ (cond
-+ ((eq? hw 'h-gpr) 0) ; core registers
-+ ((eq? hw 'h-csr) 16) ; control registers
-+ ((is-h-cr? hw) 48) ; 32-bit coprocessor registers
-+ ((is-h-cr64? hw) 48) ; 64-bit coprocessor registers (same)
-+ ((is-h-ccr? hw) 80) ; coprocessor control registers
-+ (else 0)))
-+
-+;; Return the constraint string for register operand OP.
-+(define (target:reg-constraint op)
-+ (case (md-operand:fixed-register op)
-+ ((0) "z")
-+ ((23) "h") ;; hi
-+ ((24) "l") ;; lo
-+ (else
-+ (cond
-+ ;; "tiny" registers, in the range 0..7
-+ ((equal? (md-operand:ifield op) 'f-rn3) "t")
-+
-+ (else
-+ (let ((hw (md-operand:hw op)))
-+ (cond
-+ ((eq? hw 'h-gpr) "r") ; core registers
-+ ((eq? hw 'h-csr) "c") ; control registers
-+ ((or (is-h-cr64? hw) ; 32-bit coprocessor registers
-+ (is-h-cr? hw)) ; 64-bit coprocessor registers
-+ (if (equal? (md-operand:length op) 4) "em" "x"))
-+ ((is-h-ccr? hw) "y") ; coprocessor control registers
-+ (else "r"))))))))
-+
-+;; The first hard register available to the intrinsics generator.
-+(define target:first-unused-register 113)
-+
-+;; The instructions mapped to a particular intrinsic can be subdivided
-+;; into groups, each representing a particular form of code generation.
-+;; In the MeP case, we have one group for __vliw functions and one group
-+;; for normal functions.
-+(define target:groups '(normal vliw))
-+
-+;; True if INSN belongs to GROUP, where GROUP is a member of TARGET:GROUPS.
-+(define (target:belongs-to-group? insn group)
-+ (case (obj-attr-value (md-insn:cgen-insn insn) 'SLOT)
-+ ((NONE)
-+ (let ((slots (obj-attr-value (md-insn:cgen-insn insn) 'SLOTS)))
-+ (cond ((not slots) (equal? group 'normal))
-+ ((memq 'CORE slots) #t)
-+ ((memq 'C3 slots) (equal? group 'normal))
-+ (else (equal? group 'vliw)))))
-+ ((C3) (equal? group 'normal))
-+ ((V1 V3) (equal? group 'vliw))))
-+
-+;; Convert an intrinsic's cgen name into the name of its builtin function.
-+(define (target:builtin-name name)
-+ (string-append "mep_" (gen-c-symbol name)))
-+
-+;; Helper functions for getting the values of certain mep-specific gcc
-+;; attributes. In each case INSN is a cgen instruction (not an md-insn).
-+(define (/may-trap-attribute insn)
-+ (if (obj-has-attr? insn 'MAY_TRAP) "yes" "no"))
-+
-+(define (/slot-attribute insn)
-+ (if (exists? (lambda (isa)
-+ (or (equal? isa 'mep)
-+ (equal? (string-take 8 (st isa)) "ext_core")))
-+ (obj-attr-value insn 'ISA))
-+ "core"
-+ "cop"))
-+
-+(define (/latency-attribute insn)
-+ (if (obj-attr-value insn 'LATENCY)
-+ (st (obj-attr-value insn 'LATENCY))
-+ "0"))
-+
-+(define (/length-attribute insn)
-+ (st (/ (insn-length insn) 8)))
-+
-+(define (/stall-attribute insn)
-+ (string-downcase (st (obj-attr-value insn 'STALL))))
-+
-+(define (/slots-attribute insn)
-+ (let ((slots (obj-attr-value insn 'SLOTS)))
-+ (if slots
-+ (string-downcase (gen-c-symbol (st slots)))
-+ "core")))
-+
-+;; Return the define_insn attributes for INSN as a list of (NAME . VALUE)
-+;; pairs.
-+(define (target:attributes insn)
-+ (let ((cgen-insn (md-insn:cgen-insn insn)))
-+ (list (cons 'may_trap (/may-trap-attribute cgen-insn))
-+ (cons 'latency (/latency-attribute cgen-insn))
-+ (cons 'length (/length-attribute cgen-insn))
-+ (cons 'slot (/slot-attribute cgen-insn))
-+ (cons 'slots (/slots-attribute cgen-insn))
-+ (if (eq? (obj-attr-value cgen-insn 'STALL) 'SHIFTI)
-+ (cons 'shiftop "operand2")
-+ (cons 'stall (/stall-attribute cgen-insn))))))
-+
-+;; Define target-specific fields of cgen_insn. In the MeP case, we want
-+;; to record how long the intruction is.
-+(define (target:declare-fields)
-+ (sa "\n"
-+ " /* The length of the instruction, in bytes. */\n"
-+ " int length;\n"))
-+
-+;; Initialize the fields described above.
-+(define (target:initialize-fields insn)
-+ (comma-line-break)
-+ (string-write (/length-attribute (md-insn:cgen-insn insn))))
-+
-+;; Use WELL-KNOWN-INTRINSIC to define the names of builtins that
-+;; gcc might treat specially.
-+(define (target:add-well-known-intrinsics)
-+ (apply-list (lambda args
-+ (apply well-known-intrinsic args)
-+ (apply well-known-intrinsic (sa (car args) "3") (cdr args))
-+ (apply well-known-intrinsic (sa (car args) "i") (cdr args))
-+ (apply well-known-intrinsic (sa (car args) "i3") (cdr args)))
-+ `(("cadd" plus)
-+ ("csub" minus)
-+ ("cand" and)
-+ ("cor" ior)
-+ ("cnor" nor)
-+ ("cxor" xor)
-+ ("csll" ashift)
-+ ("csrl" lshiftrt)
-+ ("csra" ashiftrt)))
-+
-+ (apply-list well-known-intrinsic
-+ `(("cmov")
-+ ("cpmov")
-+ ("cmovi" set)
-+ ("cmov1")
-+ ("cmov2")
-+ ("cmovc1")
-+ ("cmovc2")
-+ ("cmovh1")
-+ ("cmovh2")
-+ ("cneg" neg)
-+ ("cmula0")
-+ ("xmula0")
-+ ("cextuh")
-+ ("cextub")
-+ ("cexth")
-+ ("cextb")
-+ ("fmovs")
-+ ("fadds" plus "TARGET_FMAX")
-+ ("fsubs" minus "TARGET_FMAX")
-+ ("fmuls" mult "TARGET_FMAX")
-+ ("fdivs" div "TARGET_FMAX")
-+ ("fsqrts" sqrt "TARGET_FMAX")
-+ ("fabss" abs "TARGET_FMAX")
-+ ("fnegs" neg "TARGET_FMAX")
-+ ("ftruncws" fix "TARGET_FMAX")
-+ ("fcvtsw" float "TARGET_FMAX")
-+ ("fcmpus" unordered "TARGET_FMAX")
-+ ("fcmpues" uneq "TARGET_FMAX")
-+ ("fcmpuls" unlt "TARGET_FMAX")
-+ ("fcmpules" unle "TARGET_FMAX")
-+ ("fcmpes" eq "TARGET_FMAX")
-+ ("fcmplis" lt "TARGET_FMAX")
-+ ("fcmpleis" le "TARGET_FMAX"))))
-+
-+;; INTRINSIC OPERANDS
-+;; ------------------
-+;;
-+;; Each intrinsic operand is represented by a unique MD-OPERAND.
-+;; These objects refer back to normal cgen operands but add the extra
-+;; information needed for intrinsics support. Each MD-OPERAND belongs
-+;; to exactly one MD-INSN.
-+;;
-+;; OP is the cgen operand
-+;;
-+;; IFIELD-VALUE is the constant value that the instruction assigns
-+;; to the operand's field, or #f if the field isn't constant.
-+;;
-+;; ARG-INDEX is the position of this operand in the intrinsic's
-+;; argument list, or #f if the operand is not an argument.
-+;;
-+;; READ-INDEX is the match_operand number assigned to this operand
-+;; when it appears in a right-hand context. The value is #f if we
-+;; never generate such a match_operand, either because the operand
-+;; is a strict lvalue or because ARG-INDEX is #f.
-+;;
-+;; WRITE-INDEX is like READ-INDEX but is used for left-hand contexts.
-+;;
-+;; MODE is the operand's gcc mode (SI, etc.).
-+(make-struct md-operand (op ifield-value arg-index
-+ read-index write-index mode))
-+
-+;; Helper functions to extract commonly-used fields from the
-+;; underlying cgen operand.
-+(define (md-operand:name op) (op:sem-name (md-operand:op op)))
-+(define (md-operand:type op) (op:type (md-operand:op op)))
-+(define (md-operand:register? op) (register? (md-operand:type op)))
-+(define (md-operand:index op) (op:index (md-operand:op op)))
-+(define (md-operand:length op) (op:length (md-operand:op op)))
-+(define (md-operand:hw op) (op:hw-name (md-operand:op op)))
-+(define (md-operand:ifield op)
-+ (let ((ifield (op-ifield (md-operand:op op))))
-+ (and ifield (obj:name ifield))))
-+
-+;; Functions to access well-known operand attributes.
-+(define (md-operand:cdata op) (obj-attr-value (md-operand:op op) 'CDATA))
-+(define (md-operand:alignment op) (obj-attr-value (md-operand:op op) 'ALIGN))
-+(define (md-operand:sem-only? op) (obj-has-attr? (md-operand:op op) 'SEM-ONLY))
-+
-+;; Return true if operand OP represents the program counter.
-+(define (md-operand:pc? op)
-+ (or (equal? (md-operand:name op) 'pc)
-+ (pc? (md-operand:type op))))
-+
-+;; Return true if operand OP must be mapped to a label. This is only
-+;; ever true of argument operands.
-+(define (md-operand:label? op)
-+ (and (class-instance? <hw-immediate> (md-operand:type op))
-+ (equal? (md-operand:cdata op) 'LABEL)))
-+
-+;; Return true if OP is an immediate operand.
-+(define (md-operand:immediate? op)
-+ (class-instance? <hw-immediate> (md-operand:type op)))
-+
-+;; Return true if operand OP is an index into a register file. gcc will
-+;; convert them into REG rtxes.
-+(define (md-operand:regnum? op)
-+ (equal? (md-operand:cdata op) 'REGNUM))
-+
-+;; If operand OP is a fixed hard register, return the number GCC assigns
-+;; to it, otherwise return #f.
-+(define (md-operand:fixed-register op)
-+ (and (not (md-operand:pc? op))
-+ (md-operand:register? op)
-+ (let ((constant (if (hw-index-constant? (md-operand:index op))
-+ (hw-index-constant-value (md-operand:index op))
-+ (md-operand:ifield-value op))))
-+ (and constant
-+ (+ constant (target:base-reg (md-operand:hw op)))))))
-+
-+;; SPECIFIC TO 32-BIT TARGETS
-+;; Guess the gcc rtl mode for operand OP. First see whether it uses
-+;; a known hardware element, then try the CDATA attribute.
-+(define (md-operand:guess-mode op)
-+ (or (target:guess-mode op)
-+ (case (md-operand:cdata op)
-+ ((SHORT USHORT) "HI")
-+ ((CHAR UCHAR) "QI")
-+ (else "SI"))))
-+
-+;; Return true if operand OP is a signed immediate.
-+(define (md-operand:signed? op)
-+ (equal? (md-operand:hw op) 'h-sint))
-+
-+;; If OP accepts only CONST_INTs, return the lowest value it accepts.
-+(define (md-operand:lower-bound op)
-+ (if (md-operand:signed? op)
-+ (- (logsll 1 (+ (md-operand:alignment op)
-+ (md-operand:length op)
-+ -2)))
-+ 0))
-+
-+;; Likewise the highest value + 1.
-+(define (md-operand:upper-bound op)
-+ (logsll 1 (+ (md-operand:alignment op)
-+ (md-operand:length op)
-+ (if (md-operand:signed? op) -2 -1))))
-+
-+;; Return the name of an immediate predicate for operand OP, assuming
-+;; that OP should accept only CONST_INTs. We define these predicates
-+;; in the gcc include file.
-+(define (md-operand:immediate-predicate op)
-+ (gen-c-symbol (sa "cgen_" (st (md-operand:hw op)) "_"
-+ (st (md-operand:length op))
-+ "a" (st (md-operand:alignment op))
-+ "_immediate")))
-+
-+;; Return the match_operand predicate for operand OP.
-+(define (md-operand:predicate op lvalue?)
-+ (cond
-+ ((memory? (md-operand:type op)) "memory_operand")
-+ ((md-operand:label? op) "immediate_operand")
-+ ((md-operand:immediate? op) (md-operand:immediate-predicate op))
-+ (lvalue? "nonimmediate_operand")
-+ (else "general_operand")))
-+
-+
-+;; Return the gcc rtx for non-argument operand OP.
-+(define (md-operand:fixed-rtx op)
-+ (cond
-+ ((memory? (md-operand:type op))
-+ (sa "(mem:" (md-operand:mode op) " (scratch:SI))"))
-+
-+ ((md-operand:fixed-register op)
-+ (sa "(reg:" (md-operand:mode op) " "
-+ (st (md-operand:fixed-register op)) ")"))
-+
-+ (else
-+ (error (sa "bad intrinsic operand \"" (st (md-operand:name op))
-+ "\": need constant or ifield indexed register, got "
-+ (st (hw-index:type (md-operand:index op))))))))
-+
-+;; Return the constraint string for operand OP. LVALUE? is true if the
-+;; operand is appearing in a left-hand context. For read-write operands,
-+;; the rvalue operand should have a numerical constraint giving the
-+;; number of the lvalue.
-+(define (md-operand:constraint lvalue? op)
-+ (cond
-+ ((and (not lvalue?) (md-operand:write-index op))
-+ (st (md-operand:write-index op)))
-+ ((md-operand:immediate? op) "")
-+ (else (target:reg-constraint op))))
-+
-+;; Return the rtl pattern for operand OP. CONTEXT is LHS if the operand
-+;; is being used as an lvalue, RHS if it is being used as an rvalue in the
-+;; first set of a pattern and RHS-COPY if it is being used as an rvalue
-+;; in subsequent sets.
-+(define (md-operand:to-string context op)
-+ (cond
-+ ((md-operand:pc? op) "(pc)")
-+ (else
-+ (let* ((lvalue? (equal? context 'lhs))
-+ (index (if lvalue?
-+ (md-operand:write-index op)
-+ (md-operand:read-index op))))
-+ (cond
-+ ((not index) (md-operand:fixed-rtx op))
-+ ((equal? context 'rhs-copy) (sa "(match_dup " (st index) ")"))
-+ (else
-+ (sa "(match_operand:"
-+ (md-operand:mode op) " " (st index) " \""
-+ (md-operand:predicate op lvalue?) "\" \"" (if lvalue? "=" "")
-+ (md-operand:constraint lvalue? op) "\")")))))))
-+
-+
-+;; GCC INSTRUCTION PATTERNS
-+;; ------------------------
-+;;
-+;; If we need to generate a define_insn pattern for a particular cgen
-+;; instruction, we will create a unique MD-INSN for it. Each MD-INSN
-+;; is associated with a (shared) INTRINSIC object.
-+;;
-+;; MD-NAME is the name of the define_insn pattern
-+;;
-+;; INDEX is a unique number given to this instruction. Instructions
-+;; are numbered according to their position in the .md output file,
-+;; the first instruction having index 0.
-+;;
-+;; INTRINSIC is the intrinsic object to which this instruction belongs.
-+;;
-+;; CGEN-INSN is the underlying cgen insn.
-+;;
-+;; SYNTAX is the output of syntax-break-out with cgen operands
-+;; converted to md-operands.
-+;;
-+;; ARGUMENTS is a list of the operands that act as formal arguments
-+;; to the intrinsic function. Usually this is the same as SYNTAX
-+;; with strings removed, but there can be target-specific reasons
-+;; for using a different argument list.
-+;;
-+;; INPUTS is a list of the operands that appear in a right-hand
-+;; context within the define_insn pattern. If a member of this
-+;; list is also in ARGUMENTS, it will have a valid READ-INDEX.
-+;;
-+;; OUTPUTS is like INPUTS except that it lists the operands that
-+;; appear in a left-hand context. Argument operands in this list
-+;; will have a valid WRITE-INDEX.
-+;;
-+;; OPERANDS is a concatenation of OUTPUTS and INPUTS.
-+;;
-+;; CPTYPE is the type to use for coprocessor operands (like V4HI)
-+;;
-+;; CRET? is set if the first argument is returned rather than passed.
-+
-+(make-struct md-insn (md-name index intrinsic cgen-insn syntax arguments
-+ inputs outputs operands cptype cret?))
-+
-+;; Return the name of the underlying cgen insn, mostly used for
-+;; error reporting.
-+(define (md-insn:cgen-name insn) (obj:name (md-insn:cgen-insn insn)))
-+
-+;; Return true if INSN is inherently volatile, meaning that it has
-+;; important effects that are not described by its gcc rtx pattern.
-+;; This is true for any instruction with the VOLATILE attribute,
-+;; any instruction without output operands (including those with
-+;; no semantics at all) and any instruction that reads from or
-+;; writes to a REGNUM operand.
-+(define (md-insn:volatile? insn)
-+ (or (null? (md-insn:outputs insn))
-+ (exists? md-operand:regnum? (md-insn:operands insn))
-+ (obj-has-attr? (md-insn:cgen-insn insn) 'VOLATILE)))
-+
-+;; Return the list of ISAs that implement INSN. Ignore those that
-+;; were excluded on the command line.
-+(define (md-insn:isas insn)
-+ (map convert-isa
-+ (find (lambda (isa) (member isa intrinsics-isas))
-+ (obj-attr-value (md-insn:cgen-insn insn) 'ISA))))
-+
-+;; The full list of instruction groups. As well target-specific groups,
-+;; this includes "known-code", meaning that the instruction uses a specific
-+;; rtl code instead of an unspec.
-+(define md-insn-groups (cons 'known-code target:groups))
-+
-+;; Return the list of groups to which INSN belongs.
-+(define (md-insn:groups insn)
-+ (let ((target-groups (find (lambda (group)
-+ (target:belongs-to-group? insn group))
-+ target:groups)))
-+ (if (intrinsic:unspec-version (md-insn:intrinsic insn))
-+ (cons 'known-code target-groups)
-+ target-groups)))
-+
-+;; Partial ordering of syntax elements. Return true if ELEM1 and ELEM2
-+;; are compatible and ELEM2's range is a superset of ELEM1's. The rules
-+;; are that:
-+;;
-+;; - Identical syntax strings are compatible.
-+;;
-+;; - Immediate operands are compatible if the range of one is contained
-+;; within the range of the other.
-+;;
-+;; - Other types of operand are compatible if they use the same
-+;; hardware element and have the same length.
-+(define (syntax<=? elem1 elem2)
-+ (or (and (both? vector? elem1 elem2)
-+ (if (both? md-operand:immediate? elem1 elem2)
-+ (and (>= (md-operand:alignment elem1)
-+ (md-operand:alignment elem2))
-+ (>= (md-operand:lower-bound elem1)
-+ (md-operand:lower-bound elem2))
-+ (<= (md-operand:upper-bound elem1)
-+ (md-operand:upper-bound elem2)))
-+ (and (same? md-operand:hw elem1 elem2)
-+ (same? md-operand:length elem1 elem2))))
-+ (and (both? string? elem1 elem2)
-+ (string=? elem1 elem2))))
-+
-+;; Helper functions for comparing lists of operands or lists of syntax
-+;; pieces using the above ordering.
-+(define (md-insn:operands<=? insn1 insn2)
-+ (for-all-pairs? syntax<=?
-+ (md-insn:operands insn1)
-+ (md-insn:operands insn2)))
-+
-+(define (md-insn:syntax<=? insn1 insn2)
-+ (for-all-pairs? syntax<=?
-+ (md-insn:syntax insn1)
-+ (md-insn:syntax insn2)))
-+
-+
-+;; INTRINSICS
-+;; ----------
-+;;
-+;; Intrinsics have two names, the one that appears in the cgen file
-+;; and the one that is given to the builtin function. The former is
-+;; its "cgen name" and is only relevant during the analysis phase.
-+;;
-+;; NAME is the name of the intrinsic's builtin function. It is
-+;; generated from the cgen name by TARGET:BUILTIN-NAME.
-+;;
-+;; INDEX is the index of this intrinsic in the global INTRINSICS list.
-+;;
-+;; UNSPEC is the unspec number to use for the right hand side of the
-+;; first SET pattern. Add 2 for each subsequent output (so that real
-+;; and shadow registers can use different unspec numbers).
-+;;
-+;; HOOK is the gcc-hook object associated with this intrinsic,
-+;; or #f if none.
-+;;
-+;; ISAS maps ISA names to the most general implementation of the
-+;; intrinsic for that ISA. Used for error checking.
-+(make-struct intrinsic (name index unspec hook isas))
-+
-+;; Short-cut functions
-+(define (intrinsic:unspec-version intrinsic)
-+ (gcc-hook:unspec-version (intrinsic:hook intrinsic)))
-+
-+;; Return the maximum of HIGHEST and the length of insn property PROPERTY
-+;; for any implementation of INSTRINSIC. PROPERTY can the something
-+;; like MD-INSN:INPUTS or MD-INSN:OUTPUTS.
-+(define (intrinsic:max highest property intrinsic)
-+ (for-each
-+ (lambda (isa)
-+ (set! highest (max highest (length (apply property (cdr isa) '())))))
-+ (intrinsic:isas intrinsic))
-+ highest)
-+
-+;; GLOBAL VARIABLES
-+;; ----------------
-+
-+;; Maps cgen intrinsic names to intrinsic objects.
-+(deftable intrinsic)
-+
-+;; The list of all intrinsics. After the analysis phase, this list
-+;; is in index order.
-+(define intrinsics '())
-+
-+;; The list of all instructions, in the order they appear in the .md file.
-+;; When two instructions are compatible, but one is more general than
-+;; the other, the more general one will come after the less general one.
-+(define md-insns '())
-+
-+;; Maps fixed hard registers onto shadow global registers.
-+(define shadow-registers '())
-+
-+;; Create an intrinsic with the given cgen name and gcc hook. Add it to
-+;; INTRINSICS and INTRINSIC-TABLE.
-+(define (add-intrinsic name hook)
-+ (let ((intrinsic (intrinsic:make (target:builtin-name name) #f #f hook '())))
-+ (set! intrinsics (cons intrinsic intrinsics))
-+ (set-intrinsic! name intrinsic)
-+ intrinsic))
-+
-+;; Return a shadow version of hard register REG.
-+(define (get-shadow reg)
-+ (or (assoc-ref shadow-registers reg)
-+ (let ((retval (+ target:first-unused-register
-+ (length shadow-registers))))
-+ (set! shadow-registers
-+ (append! shadow-registers (list (cons reg retval))))
-+ retval)))
-+
-+;; WELL-KNOWN INTRINSICS
-+;; ---------------------
-+
-+;; gcc might have a special use for certain intrinsics. Such intrinsics
-+;; have a GCC-HOOK structure attached.
-+;;
-+;; RTL-CODE is an rtl code that can be used in the define_insn
-+;; pattern instead of usual unspec or unspec_volatile. Usually
-+;; the field is an arithmetic or logic code, but it can also be:
-+;;
-+;; - 'set': the intrinsic implements a move of some sort.
-+;; - 'nor': represented in gcc as (and (not X) (not Y)).
-+;; - #f: use unspecs as normal.
-+;;
-+;; CONDITION is a condition that must be true for the RTL-CODE
-+;; version of the instruction to be available.
-+;;
-+;; UNSPEC-VERSION is a version of the same intrinsic that has no
-+;; gcc-hook structure. It is sometimes useful to have two versions
-+;; of the same instrinsic, one with a specific rtl-code and one
-+;; with a general unspec. The former will allow more optimisations
-+;; while the latter will act more like an inline asm statement.
-+(make-struct gcc-hook (rtl-code condition unspec-version))
-+
-+;; Declare a well-known intrinsic with the given cgen name and
-+;; gcc-hook fields.
-+(define (well-known-intrinsic name . args)
-+ (let* ((rtl-code (and (> (length args) 0) (car args)))
-+ (condition (and (> (length args) 1) (cadr args)))
-+ (unspec-version (and rtl-code (add-intrinsic name #f))))
-+ (add-intrinsic name (gcc-hook:make rtl-code condition unspec-version))))
-+
-+(target:add-well-known-intrinsics)
-+
-+
-+;; ANALYSIS PHASE
-+;; --------------
-+
-+;; The next available unspec number.
-+(define next-unspec 1000)
-+
-+;; Given cgen instruction INSN, return the cgen name of its intrinsic.
-+(define (intrinsic-name insn)
-+ (let ((name (obj-attr-value insn 'INTRINSIC)))
-+ (if (equal? name "") (symbol->string (obj:name insn)) name)))
-+
-+;; Look up an intrinsic by its cgen name. Create a new intrinsic
-+;; if the name hasn't been used yet.
-+(define (find-intrinsic name)
-+ (or (get-intrinsic name)
-+ (add-intrinsic name #f)))
-+
-+;; If instruction INSN assigns to a constant value to OP's field,
-+;; record it in IFIELD-VALUE.
-+(define (check-ifield-value op insn)
-+ (let* ((name (md-operand:ifield op))
-+ (ifield (and name (object-assq name (insn-iflds insn)))))
-+ (if (and ifield (ifld-constant? ifield))
-+ (md-operand:set-ifield-value! op (ifld-get-value ifield)))))
-+
-+;; Create an md-insn from the given cgen instruction and add it to MD-INSNS.
-+(define (add-md-insn insn intrinsic md-prefix)
-+ (let* ((sfmt (insn-sfmt insn))
-+ (operands '())
-+
-+ ;; Create a new md-operand for OP.
-+ (new-operand (lambda (op)
-+ (let ((created (md-operand:make op #f #f #f #f #f)))
-+ (set! operands (cons created operands))
-+ (check-ifield-value created insn)
-+ created)))
-+
-+ ;; Find an md-operand for OP, create a new one if we
-+ ;; haven't seen it before.
-+ (make-operand (lambda (op)
-+ (let loop ((entry operands))
-+ (if (null? entry)
-+ (new-operand op)
-+ (if (equal? (op:sem-name op)
-+ (md-operand:name (car entry)))
-+ (car entry)
-+ (loop (cdr entry)))))))
-+
-+ ;; A partial order on md-operands. Sort them by their position
-+ ;; in the argument list, putting non-argument operands last.
-+ ;;
-+ ;; This ordering is needed when non-commutative intrinsics
-+ ;; use a specific gcc rtl code. For example, if we have
-+ ;; an intrinsic:
-+ ;;
-+ ;; sub (op0, op1, op2)
-+ ;;
-+ ;; which is known to do subtraction, we might use the MINUS
-+ ;; rtl code in the define_insn pattern. op1 must then be
-+ ;; the first input operand and op2 must be the second:
-+ ;;
-+ ;; (set op0 (minus op1 op2))
-+ (op<= (lambda (x y)
-+ (let ((xpos (md-operand:arg-index x))
-+ (ypos (md-operand:arg-index y)))
-+ (or (not ypos) (and xpos (<= xpos ypos))))))
-+
-+ ;; Create a version of the broken-out syntax in which
-+ ;; each cgen operand is replaced by an md-operand.
-+ (syntax (map (lambda (x)
-+ (if (operand? x) (make-operand x) x))
-+ (syntax-break-out (insn-syntax insn)
-+ (obj-isa-list insn))))
-+
-+ ;; All relevant outputs.
-+ (outputs (find (lambda (op)
-+ (or (md-operand:pc? op)
-+ (md-operand:fixed-register op)
-+ (not (md-operand:sem-only? op))))
-+ (map make-operand (sfmt-out-ops sfmt))))
-+
-+ ;; The arguments to the intrinsic function, represented as
-+ ;; a list of operands. Usually this is taken directly from
-+ ;; the assembler syntax, but allow machine-specific hacks
-+ ;; to modify the list.
-+ (arguments (target:frob-arguments (find vector? syntax) outputs))
-+
-+ ;; The operands that we know to be inputs. For tidiness' sake,
-+ ;; remove (pc), which was no real meaning inside an unspec or
-+ ;; unspec_volatile.
-+ (inputs (find (lambda (op)
-+ (and (not (md-operand:pc? op))
-+ (or (md-operand:fixed-register op)
-+ (not (md-operand:sem-only? op)))))
-+ (map make-operand (sfmt-in-ops sfmt))))
-+
-+ ;; If an argument has not been classified as an input
-+ ;; or an output, treat it as an input. This helps us to
-+ ;; deal with insns whose semantics have not been given.
-+ (quiet-inputs (find (lambda (op)
-+ (and (not (memq op inputs))
-+ (not (memq op outputs))))
-+ arguments))
-+
-+ ;; Allow an intrinsic to specify a type for coprocessor
-+ ;; operands, as they tend to be insn-specific vector types.
-+ (cptype (obj-attr-value insn 'CPTYPE))
-+
-+ (cret? (equal? (obj-attr-value insn 'CRET) 'FIRST))
-+ )
-+
-+ ;; Number each argument operand according to its position in the list.
-+ (number-list md-operand:set-arg-index! arguments 0)
-+
-+ ;; Sort the inputs and outputs as described above.
-+ (set! inputs (sort-partial (append inputs quiet-inputs) op<=))
-+ (set! outputs (sort-partial outputs op<=))
-+
-+ ;; Assign match_operand numbers to each argument. Outputs should
-+ ;; have lower numbers than inputs.
-+ (number-list md-operand:set-read-index!
-+ (find md-operand:arg-index inputs)
-+ (number-list md-operand:set-write-index!
-+ (find md-operand:arg-index outputs)
-+ 0))
-+
-+ ;; Assign a mode to each operand. If we have an output operand,
-+ ;; use its mode for all immediate operands. This is mainly for
-+ ;; intrinsics which use rtl codes like 'plus': the source operands
-+ ;; are then expected to have the same mode as the destination.
-+ (for-each (lambda (op)
-+ (if (and (pair? outputs) (md-operand:immediate? op))
-+ (md-operand:set-mode! op (md-operand:mode (car outputs)))
-+ (md-operand:set-mode! op (md-operand:guess-mode op))))
-+ (append outputs inputs))
-+
-+ (set! md-insns
-+ (cons (md-insn:make (sa md-prefix (gen-c-symbol (obj:name insn)))
-+ #f intrinsic insn syntax
-+ arguments inputs outputs
-+ (append outputs inputs) cptype cret?)
-+ md-insns))))
-+
-+;; Make INSN available when generating code for ISA, updating INSN's
-+;; intrinsic structure accordingly. Insns are passed to this function
-+;; in .md file order.
-+(define (add-intrinsic-for-isa insn isa)
-+ (let* ((intrinsic (md-insn:intrinsic insn))
-+ (entry (assoc isa (intrinsic:isas intrinsic))))
-+ (if (not entry)
-+ ;; We haven't yet seen an implementation of this intrinsic for ISA.
-+ (intrinsic:set-isas! intrinsic
-+ (cons (cons isa insn)
-+ (intrinsic:isas intrinsic)))
-+
-+ ;; The intrinsic has already been implemented for ISA.
-+ ;; Check whether INSN is at least as general as the bellwether
-+ ;; implementation. If it isn't, report an error, otherwise
-+ ;; use INSN as the new bellwether.
-+ (let ((bellwether (cdr entry)))
-+
-+;; This is temporarily disabled as some IVC2 intrinsics *do* have the
-+;; same actual signature and operands, but different bit encodings
-+;; depending on the slot. This different syntax makes them not match.
-+
-+;; (if (not (md-insn:syntax<=? bellwether insn))
-+;; (error (sa "instructions \"" (md-insn:cgen-name insn)
-+;; "\" and \"" (md-insn:cgen-name bellwether)
-+;; "\" are both mapped to intrinsic \""
-+;; (intrinsic:name intrinsic)
-+;; "\" but do not have a compatible syntax")))
-+
-+;; (if (not (md-insn:operands<=? bellwether insn))
-+;; (error (sa "instructions \"" (md-insn:cgen-name insn)
-+;; "\" and \"" (md-insn:cgen-name bellwether)
-+;; "\" are both mapped to intrinsic \""
-+;; (intrinsic:name intrinsic)
-+;; "\" but do not have compatible semantics")))
-+
-+ (set-cdr! entry insn)))))
-+
-+;; Return true if the given insn should be included in the output files.
-+(define (need-insn? insn)
-+ (not (member (insn-mnemonic insn) '("--unused--" "--reserved--" "--syscall--"))))
-+
-+;; Set up global variables, if we haven't already.
-+(define (analyze-intrinsics!)
-+ (if (null? md-insns)
-+ (begin
-+ (message "Analyzing intrinsics...\n")
-+
-+ ;; Set up the global lists.
-+ (for-each
-+ (lambda (insn)
-+ (if (need-insn? insn)
-+ (let ((intrinsic (find-intrinsic (intrinsic-name insn))))
-+ (add-md-insn insn intrinsic "cgen_intrinsic_")
-+ (if (intrinsic:unspec-version intrinsic)
-+ (add-md-insn insn (intrinsic:unspec-version intrinsic)
-+ "cgen_intrinsic_unspec_")))))
-+ (current-insn-list))
-+
-+ (set! md-insns (sort-partial md-insns md-insn:syntax<=?))
-+
-+ ;; Tell each object what position it has in its respective list.
-+ (number-list md-insn:set-index! md-insns 0)
-+ (number-list intrinsic:set-index! intrinsics 0)
-+
-+ ;; Check whether the mapping of instructions to intrinsics is OK.
-+ (for-each
-+ (lambda (insn)
-+ (for-each
-+ (lambda (isa) (add-intrinsic-for-isa insn isa))
-+ (md-insn:isas insn)))
-+ md-insns)
-+
-+ ;; Assign unspec numbers to each intrinsic.
-+ (for-each
-+ (lambda (intrinsic)
-+ (intrinsic:set-unspec! intrinsic next-unspec)
-+ (set! next-unspec
-+ (+ next-unspec
-+ (* 2 (intrinsic:max 1 md-insn:outputs intrinsic)))))
-+ intrinsics))))
-+
-+
-+;; ITERATION FUNCTIONS
-+;; -------------------
-+
-+(define (for-each-md-insn fn)
-+ (for-each fn md-insns))
-+
-+(define (for-each-argument fn)
-+ (for-each-md-insn
-+ (lambda (insn)
-+ (for-each (lambda (op) (fn insn op))
-+ (md-insn:arguments insn)))))
-+
-+;; .MD GENERATOR
-+;; -------------
-+
-+;; Write the output template for INSN's define_insn.
-+;; ??? Still MeP-specific.
-+(define (write-syntax insn)
-+ (let ((in-mnemonic? #t))
-+ (for-each
-+ (lambda (part)
-+ (cond
-+ ((vector? part)
-+ (let* ((name (md-operand:name part))
-+ (pos (lambda () (st (or (md-operand:read-index part)
-+ (md-operand:write-index part))))))
-+ (cond
-+ ((equal? name 'tpr) (string-write "$tp"))
-+ ((equal? name 'spr) (string-write "$sp"))
-+ ((equal? name 'csrn) (string-write "%" (pos)))
-+ ((md-operand:label? part) (string-write "%l" (pos)))
-+ (else (string-write "%" (pos))))))
-+
-+ ((and in-mnemonic? (equal? " " part))
-+ (set! in-mnemonic? #f)
-+ (string-write "\\\\t"))
-+
-+ (else (string-write part))))
-+ (md-insn:syntax insn))))
-+
-+;; Write the inputs to INSN, wrapped in an unspec, unspec_volatile,
-+;; or intrinsic-specific rtl code. MODE is the mode should go after
-+;; the wrapper's rtl-code, such as "" or ":SI". UNSPEC is the unspec
-+;; number to use, if an unspec is needed, and CONTEXT is as for
-+;; MD-OPERAND:TO-STRING.
-+(define (write-inputs context insn mode unspec)
-+ (let* ((code (gcc-hook:rtl-code (intrinsic:hook (md-insn:intrinsic insn))))
-+ (inputs (map (lambda (op)
-+ (md-operand:to-string context op))
-+ (md-insn:inputs insn))))
-+ (if (not code)
-+ (begin
-+ (string-write (if (md-insn:volatile? insn)
-+ "(unspec_volatile"
-+ "(unspec")
-+ mode " [")
-+ (write-with-indent 2
-+ (line-break)
-+ (if (null? inputs)
-+ (string-write "(const_int 0)")
-+ (write-list line-break inputs string-write)))
-+ (line-break)
-+ (string-write "] " (st unspec) ")"))
-+ (cond
-+ ((equal? code 'set)
-+ (string-write (car inputs)))
-+
-+ ((equal? code 'nor)
-+ (write-construct (sa "(and" mode " ") ")"
-+ (write-list line-break inputs
-+ (lambda (op)
-+ (string-write "(not" mode " " op ")")))))
-+
-+ (else
-+ (write-construct (sa "(" (st code) mode " ") ")"
-+ (write-list line-break inputs string-write)))))))
-+
-+;; Write a "(set ...)" pattern for the given output. CONTEXT is RHS
-+;; for the first output and RHS-COPY for the rest. UNSPEC is an unspec
-+;; number to use for this output.
-+(define (write-to-one-output context insn output unspec)
-+ (write-construct "(set " ")"
-+ (string-write (md-operand:to-string 'lhs output))
-+ (line-break)
-+ (let ((branch-labels (and (md-operand:pc? output)
-+ (find md-operand:label?
-+ (md-insn:inputs insn)))))
-+ (if (pair? branch-labels)
-+ (write-construct "(if_then_else " ")"
-+ (write-construct "(eq " ")"
-+ (write-inputs context insn "" unspec)
-+ (line-break)
-+ (string-write "(const_int 0)"))
-+ (line-break)
-+ (string-write "(match_dup "
-+ (st (md-operand:read-index (car branch-labels)))
-+ ")")
-+ (line-break)
-+ (string-write "(pc)"))
-+ (let ((mode (md-operand:mode output)))
-+ (write-inputs context insn (sa ":" mode) unspec)))))
-+ ;; If this instruction is used for expanding intrinsics, and if the
-+ ;; output is a fixed register that is not mapped to an intrinsic
-+ ;; argument, treat the instruction as setting a global register.
-+ ;; This isn't necessary for volatile instructions since gcc will
-+ ;; not try to second-guess what they do.
-+ (if (and (not (intrinsic:unspec-version (md-insn:intrinsic insn)))
-+ (not (md-insn:volatile? insn))
-+ (not (md-operand:write-index output))
-+ (md-operand:fixed-register output))
-+ (let ((reg (get-shadow (md-operand:fixed-register output))))
-+ (line-break)
-+ (write-construct "(set " ")"
-+ (string-write "(reg:SI " (st reg) ")")
-+ (line-break)
-+ (write-inputs 'rhs-copy insn ":SI" (+ unspec 1))))))
-+
-+
-+;; Write a define_insn for INSN.
-+(define (write-insn insn)
-+ (string-write "\n\n(define_insn \"" (md-insn:md-name insn) "\"\n")
-+ (write-construct " [" "]"
-+ (let ((outputs (md-insn:outputs insn))
-+ (unspec (intrinsic:unspec (md-insn:intrinsic insn))))
-+ (if (null? outputs)
-+ (write-inputs 'rhs insn "" unspec)
-+ (begin
-+ (write-to-one-output 'rhs insn (car outputs) unspec)
-+ (number-list
-+ (lambda (output index)
-+ (line-break)
-+ (write-to-one-output 'rhs-copy insn output
-+ (+ unspec (* 2 index))))
-+ (cdr outputs) 1)))))
-+ (line-break)
-+
-+ ;; C predicate.
-+ (string-write " \"CGEN_ENABLE_INSN_P (" (st (md-insn:index insn)) ")")
-+ (let ((hook (intrinsic:hook (md-insn:intrinsic insn))))
-+ (if (gcc-hook:condition hook)
-+ (string-write " && (" (gcc-hook:condition hook) ")")))
-+ (string-write "\"\n")
-+
-+ ;; assembly syntax
-+ (string-write " \"")
-+ (write-syntax insn)
-+ (string-write "\"\n")
-+
-+ ;; attributes
-+ (write-construct " [" "]"
-+ (write-list line-break (target:attributes insn)
-+ (lambda (attribute)
-+ (string-write "(set_attr \"" (car attribute)
-+ "\" \"" (cdr attribute) "\")"))))
-+ (string-write ")\n"))
-+
-+(define (insns.md)
-+ (string-write
-+ "\n\n"
-+ ";; DO NOT EDIT: This file is automatically generated by CGEN.\n"
-+ ";; Any changes you make will be discarded when it is next regenerated.\n"
-+ "\n\n")
-+ (analyze-intrinsics!)
-+ (message "Generating .md file...\n")
-+
-+ (init-immediate-predicate!)
-+ (for-each-argument note-immediates)
-+
-+ ;; Define the immediate predicates.
-+ (for-each
-+ (lambda (entry)
-+ (let* ((op (cdr entry))
-+ (align-mask (- (md-operand:alignment op) 1)))
-+ (string-write
-+ "(define_predicate \""
-+ (car entry) "\"\n"
-+ " (and (match_code \"const_int\")\n"
-+ " (match_test \"(INTVAL (op) & " (st align-mask) ") == 0\n"
-+ " && INTVAL (op) >= " (st (md-operand:lower-bound op)) "\n"
-+ " && INTVAL (op) < " (st (md-operand:upper-bound op)) "\")))\n"
-+ "\n")))
-+ immediate-predicate-table)
-+
-+ (for-each-md-insn write-insn)
-+ (string-write "\n")
-+ "")
-+
-+
-+;; GCC SOURCE CODE GENERATOR
-+;; -------------------------
-+
-+;; Maps the names of immediate predicates to an example of an operand
-+;; which needs it.
-+(deftable immediate-predicate)
-+
-+;; If OP is an immediate predicate, make sure that it has an entry
-+;; in IMMEDIATE-PREDICATES.
-+(define (note-immediates insn op)
-+ (if (and (md-operand:immediate? op)
-+ (not (md-operand:label? op)))
-+ (let ((name (md-operand:immediate-predicate op)))
-+ (if (not (get-immediate-predicate name))
-+ (set-immediate-predicate! name op)))))
-+
-+(define (enum-type op cptype)
-+ (cond
-+ ((is-h-cr64? (md-operand:hw op))
-+ (case cptype
-+ ((V8QI) "cgen_regnum_operand_type_V8QI")
-+ ((V4HI) "cgen_regnum_operand_type_V4HI")
-+ ((V2SI) "cgen_regnum_operand_type_V2SI")
-+ ((V8UQI) "cgen_regnum_operand_type_V8UQI")
-+ ((V4UHI) "cgen_regnum_operand_type_V4UHI")
-+ ((V2USI) "cgen_regnum_operand_type_V2USI")
-+ ((VECT) "cgen_regnum_operand_type_VECTOR")
-+ ((CP_DATA_BUS_INT) "cgen_regnum_operand_type_CP_DATA_BUS_INT")
-+ (else "cgen_regnum_operand_type_DI")))
-+ ((is-h-cr? (md-operand:hw op))
-+ "cgen_regnum_operand_type_SI")
-+ (else
-+ (case (md-operand:cdata op)
-+ ((POINTER) "cgen_regnum_operand_type_POINTER")
-+ ((LABEL) "cgen_regnum_operand_type_LABEL")
-+ ((LONG) "cgen_regnum_operand_type_LONG")
-+ ((ULONG) "cgen_regnum_operand_type_ULONG")
-+ ((SHORT) "cgen_regnum_operand_type_SHORT")
-+ ((USHORT) "cgen_regnum_operand_type_USHORT")
-+ ((CHAR) "cgen_regnum_operand_type_CHAR")
-+ ((UCHAR) "cgen_regnum_operand_type_UCHAR")
-+ (else "cgen_regnum_operand_type_DEFAULT")))))
-+
-+;; Write out the cgen_insn initialiser for INSN.
-+(define (write-cgen-insn insn)
-+ (write-construct " { " " }"
-+ (string-write (st (intrinsic:index (md-insn:intrinsic insn))))
-+
-+ (comma-line-break)
-+ (string-write (bitmask "ISA" (md-insn:isas insn)))
-+
-+ (comma-line-break)
-+ (string-write (bitmask "GROUP" (md-insn:groups insn)))
-+
-+ (comma-line-break)
-+ (string-write "CODE_FOR_" (md-insn:md-name insn))
-+
-+ (comma-line-break)
-+ (string-write (st (length (md-insn:arguments insn))))
-+
-+ (comma-line-break)
-+ (string-write (if (md-insn:cret? insn) "1" "0"))
-+
-+ (comma-line-break)
-+ (write-construct "{ " " }"
-+ (write-nonempty-list
-+ comma-break
-+ (find md-operand:arg-index (md-insn:operands insn))
-+ (lambda (op) (string-write (st (md-operand:arg-index op))))
-+ "0"))
-+
-+ (comma-line-break)
-+ (write-construct "{ " " }"
-+ (write-nonempty-list
-+ comma-break
-+ (md-insn:arguments insn)
-+ (lambda (op)
-+ (if (md-operand:regnum? op)
-+ (string-write
-+ "{ " (st (md-operand:upper-bound op))
-+ ", " (st (target:base-reg (md-operand:hw op))))
-+ (string-write "{ 0, 0"))
-+ (string-write ", " (enum-type op (md-insn:cptype insn))
-+ ", " (if (and (not (equal? (md-operand:cdata op) 'REGNUM))
-+ (md-operand:write-index op))
-+ "1" "0")
-+ " }"))
-+ "{ 0, 0, cgen_regnum_operand_type_DEFAULT, 0}"))
-+
-+ (target:initialize-fields insn)))
-+
-+(define (intrinsics.h) ; i.e., mep-intrin.h
-+ (string-write
-+ "\n\n"
-+ "/* DO NOT EDIT: This file is automatically generated by CGEN.\n"
-+ " Any changes you make will be discarded when it is next regenerated. */\n"
-+ "\n")
-+ (analyze-intrinsics!)
-+ (message "Generating gcc include file...\n")
-+ (init-immediate-predicate!)
-+ (for-each-argument note-immediates)
-+
-+ (string-write "#ifdef WANT_GCC_DECLARATIONS\n")
-+
-+ ;; Declare the range of shadow registers
-+ (string-write "#define FIRST_SHADOW_REGISTER "
-+ (st target:first-unused-register) "\n")
-+ (string-write "#define LAST_SHADOW_REGISTER "
-+ (st (+ target:first-unused-register
-+ (length shadow-registers)
-+ -1)) "\n")
-+ (string-write "#define FIXED_SHADOW_REGISTERS \\\n ")
-+ (write-list comma-break
-+ shadow-registers
-+ (lambda (entry) (string-write "1")))
-+ (string-write "\n")
-+ (string-write "#define CALL_USED_SHADOW_REGISTERS FIXED_SHADOW_REGISTERS\n")
-+ (string-write "#define SHADOW_REG_ALLOC_ORDER \\\n ")
-+ (write-list comma-break
-+ shadow-registers
-+ (lambda (entry) (string-write (st (cdr entry)))))
-+ (string-write "\n")
-+ (string-write "#define SHADOW_REGISTER_NAMES \\\n ")
-+ (write-list comma-break
-+ shadow-registers
-+ (lambda (entry)
-+ (string-write "\"$shadow" (st (car entry)) "\"")))
-+ (string-write "\n\n")
-+
-+ ;; Declare the index values for well-known intrinsics.
-+ (string-write "\n\n#ifndef __MEP__\n")
-+ (string-write "enum {\n")
-+ (write-list comma-line-break
-+ (find intrinsic:hook intrinsics)
-+ (lambda (intrinsic)
-+ (string-write " " (intrinsic:name intrinsic)
-+ " = " (st (intrinsic:index intrinsic)))))
-+ (string-write "\n};\n")
-+ (string-write "#endif /* ! defined (__MEP__) */\n")
-+
-+ ;; Define the structure used to describe intrinsic insns.
-+ (string-write
-+ "\n\n"
-+ "enum cgen_regnum_operand_type {\n"
-+ " cgen_regnum_operand_type_POINTER, /* long * */\n"
-+ " cgen_regnum_operand_type_LABEL, /* void * */\n"
-+ " cgen_regnum_operand_type_LONG, /* long */\n"
-+ " cgen_regnum_operand_type_ULONG, /* unsigned long */\n"
-+ " cgen_regnum_operand_type_SHORT, /* short */\n"
-+ " cgen_regnum_operand_type_USHORT, /* unsigned short */\n"
-+ " cgen_regnum_operand_type_CHAR, /* char */\n"
-+ " cgen_regnum_operand_type_UCHAR, /* unsigned char */\n"
-+ " cgen_regnum_operand_type_SI, /* __cop long */\n"
-+ " cgen_regnum_operand_type_DI, /* __cop long long */\n"
-+ " cgen_regnum_operand_type_CP_DATA_BUS_INT, /* cp_data_bus_int */\n"
-+ " cgen_regnum_operand_type_VECTOR, /* opaque vector type */\n"
-+ " cgen_regnum_operand_type_V8QI, /* V8QI vector type */\n"
-+ " cgen_regnum_operand_type_V4HI, /* V4HI vector type */\n"
-+ " cgen_regnum_operand_type_V2SI, /* V2SI vector type */\n"
-+ " cgen_regnum_operand_type_V8UQI, /* V8UQI vector type */\n"
-+ " cgen_regnum_operand_type_V4UHI, /* V4UHI vector type */\n"
-+ " cgen_regnum_operand_type_V2USI, /* V2USI vector type */\n"
-+ " cgen_regnum_operand_type_DEFAULT = cgen_regnum_operand_type_LONG\n"
-+ "};\n"
-+ "\n"
-+ "struct cgen_regnum_operand {\n"
-+ " /* The number of addressable registers, 0 for non-regnum operands. */\n"
-+ " unsigned char count;\n"
-+ "\n"
-+ " /* The first register. */\n"
-+ " unsigned char base;\n"
-+ "\n"
-+ " /* The type of the operand. */\n"
-+ " enum cgen_regnum_operand_type type;\n"
-+ "\n"
-+ " /* Is it passed by reference? */\n"
-+ " int reference_p;\n"
-+ "};\n\n"
-+ "struct cgen_insn {\n"
-+ " /* An index into cgen_intrinsics[]. */\n"
-+ " unsigned int intrinsic;\n"
-+ "\n"
-+ " /* A bitmask of the ISAs which include this instruction. */\n"
-+ " unsigned int isas;\n"
-+ "\n"
-+ " /* A bitmask of the target-specific groups to which this instruction\n"
-+ " belongs. */\n"
-+ " unsigned int groups;\n"
-+ "\n"
-+ " /* The insn_code for this instruction. */\n"
-+ " int icode;\n"
-+ "\n"
-+ " /* The number of arguments to the intrinsic function. */\n"
-+ " unsigned int num_args;\n"
-+ "\n"
-+ " /* If true, the first argument is the return value. */\n"
-+ " unsigned int cret_p;\n"
-+ "\n"
-+ " /* Maps operand numbers to argument numbers. */\n"
-+ " unsigned int op_mapping[10];\n"
-+ "\n"
-+ " /* Array of regnum properties, indexed by argument number. */\n"
-+ " struct cgen_regnum_operand regnums[10];\n"
-+ (target:declare-fields)
-+ "};\n")
-+
-+ ;; Declare the arrays that we define later.
-+ (string-write
-+ "\n"
-+ "extern const struct cgen_insn cgen_insns[];\n"
-+ "extern const char *const cgen_intrinsics[];\n")
-+
-+ ;; Macro used by the .md file.
-+ (string-write
-+ "\n"
-+ "/* Is the instruction described by cgen_insns[INDEX] enabled? */\n"
-+ "#define CGEN_ENABLE_INSN_P(INDEX) \\\n"
-+ " ((CGEN_CURRENT_ISAS & cgen_insns[INDEX].isas) != 0 \\\n"
-+ " && (CGEN_CURRENT_GROUP & cgen_insns[INDEX].groups) != 0)\n\n")
-+
-+ (define-bitmasks "ISA"
-+ (remove-duplicates (sort (map convert-isa intrinsics-isas) string<?)))
-+
-+ (define-bitmasks "GROUP" md-insn-groups)
-+
-+ (string-write "#endif\n")
-+
-+ (string-write "#ifdef WANT_GCC_DEFINITIONS\n")
-+
-+ ;; Create an array describing the range and alignment of immediate
-+ ;; predicates.
-+ (string-write
-+ "struct cgen_immediate_predicate {\n"
-+ " insn_operand_predicate_fn predicate;\n"
-+ " int lower, upper, align;\n"
-+ "};\n\n"
-+ "const struct cgen_immediate_predicate cgen_immediate_predicates[] = {\n")
-+
-+ (write-list comma-line-break immediate-predicate-table
-+ (lambda (entry)
-+ (let ((op (cdr entry)))
-+ (string-write
-+ " { " (car entry)
-+ ", " (st (md-operand:lower-bound op))
-+ ", " (st (md-operand:upper-bound op))
-+ ", " (st (md-operand:alignment op)) " }"))))
-+
-+ (string-write "\n};\n\n")
-+
-+ ;; Create an array containing the names of all the available intrinsinics.
-+ (string-write "const char *const cgen_intrinsics[] = {\n")
-+ (write-list comma-line-break intrinsics
-+ (lambda (intrinsic)
-+ (string-write " \"" (intrinsic:name intrinsic) "\"")))
-+ (string-write "\n};\n\n")
-+
-+ ;; Create an array describing each .md file instruction.
-+ (string-write "const struct cgen_insn cgen_insns[] = {\n")
-+ (write-list comma-line-break md-insns write-cgen-insn)
-+ (string-write "\n};\n")
-+
-+ (string-write "#endif\n"))
-+
-+
-+;; PROTOTYPE GENERATOR
-+;; -------------------
-+
-+(define (runtime-type op cptype retval)
-+ (sa (case (md-operand:cdata op)
-+ ((POINTER) "long *")
-+ ((LABEL) "void *")
-+ ((LONG) "long")
-+ ((ULONG) "unsigned long")
-+ ((SHORT) "short")
-+ ((USHORT) "unsigned short")
-+ ((CHAR) "char")
-+ ((UCHAR) "unsigned char")
-+ ((CP_DATA_BUS_INT)
-+ ;;(logit 0 "op " (md-operand:cdata op) " cptype " cptype "\n")
-+ (case cptype
-+ ((V2SI) "cp_v2si")
-+ ((V4HI) "cp_v4hi")
-+ ((V8QI) "cp_v8qi")
-+ ((V2USI) "cp_v2usi")
-+ ((V4UHI) "cp_v4uhi")
-+ ((V8UQI) "cp_v8uqi")
-+ ((VECT) "cp_vector")
-+ (else "cp_data_bus_int")))
-+ (else "long"))
-+ (if (and (not (equal? (md-operand:cdata op) 'REGNUM))
-+ (md-operand:write-index op)
-+ (not retval))
-+ "*" "")))
-+
-+(define (intrinsic-protos.h) ; i.e., intrinsics.h
-+ (string-write
-+ "\n\n"
-+ "/* DO NOT EDIT: This file is automatically generated by CGEN.\n"
-+ " Any changes you make will be discarded when it is next regenerated.\n"
-+ "*/\n\n"
-+ "/* GCC defines these internally, as follows... \n";
-+ "#if __MEP_CONFIG_CP_DATA_BUS_WIDTH == 64\n"
-+ " typedef long long cp_data_bus_int;\n"
-+ "#else\n"
-+ " typedef long cp_data_bus_int;\n"
-+ "#endif\n"
-+ "typedef char cp_v8qi __attribute__((vector_size(8)));\n"
-+ "typedef unsigned char cp_v8uqi __attribute__((vector_size(8)));\n"
-+ "typedef short cp_v4hi __attribute__((vector_size(8)));\n"
-+ "typedef unsigned short cp_v4uhi __attribute__((vector_size(8)));\n"
-+ "typedef int cp_v2si __attribute__((vector_size(8)));\n"
-+ "typedef unsigned int cp_v2usi __attribute__((vector_size(8)));\n"
-+ "*/\n\n")
-+ (analyze-intrinsics!)
-+ (message "Generating prototype file...\n")
-+ (target:for-each-isa!
-+ (lambda (name isa)
-+ (string-write "\n// " name "\n")
-+ (for-each
-+ (lambda (intrinsic)
-+ (let ((entry (assoc isa (intrinsic:isas intrinsic))))
-+ (if entry
-+ (let* ((insn (cdr entry))
-+ (arguments (md-insn:arguments insn))
-+ (retval (if (md-insn:cret? insn)
-+ (runtime-type (car arguments) (md-insn:cptype insn) #t)
-+ "void"))
-+ (proto (sa retval " " (intrinsic:name intrinsic)
-+ " (" (stringize (map (lambda (arg)
-+ (runtime-type arg
-+ (md-insn:cptype insn) #f))
-+ (if (md-insn:cret? insn)
-+ (cdr arguments)
-+ arguments)
-+ )
-+ ", ")
-+ ");"))
-+ (proto-len (string-length proto))
-+ (attrs '()))
-+
-+ (if (md-insn:volatile? insn)
-+ (set! attrs (cons "volatile" attrs)))
-+
-+ (string-write proto)
-+ (if (pair? attrs)
-+ (string-write (make-string (max 1 (- 40 proto-len))
-+ #\space)
-+ "// " (stringize attrs " ")))
-+ (string-write "\n")))))
-+ intrinsics)))
-+ "")
-+
-+
-+;; The rest of this file has not been converted to use the INTRINSICS
-+;; attribute. The code isn't used at the moment anyway.
-+
-+(define (intrinsic-testsuite.c)
-+ (map-intrinsics!)
-+ (for-each (maybe-do-all declare-intrinsic-test) intrinsic-insns)
-+ (string-write "\n")
-+ "")
-+
-+(define (test-val is-retval? op vbase)
-+ (let ((mode (op:mode op))
-+ (cdata (obj-attr-value op 'CDATA)))
-+ (cond
-+ ((equal? cdata 'REGNUM) "7")
-+ ((equal? cdata 'LABEL) "&&lab")
-+ ((treat-op-as-immediate? op)
-+ (let* ((field (fetch-ifield-for-op-in-current-insn op))
-+ (align-bits (case (obj:name field)
-+ ((f-8s8a2 f-12s4a2 f-17s16a2 f-24s5a2n f-24u5a2n f-7u9a2 f-8s24a2) 1)
-+ ((f-7u9a4 f-8s24a4 f-24u8a4n) 2)
-+ ((f-8s24a8) 3)
-+ (else 0)))
-+ (val (ash (send field 'max-value) align-bits)))
-+ (string-append "0x" (number->string val 16))))
-+ (else (let* ((expr-suffix (if is-retval? ""
-+ (if (get-gcc-write-index op) "" " + 1")))
-+ (val
-+ (case cdata
-+ ((POINTER) "p")
-+ ((LONG) "l")
-+ ((ULONG) "ul")
-+ ((SHORT) "s")
-+ ((USHORT) "us")
-+ ((CHAR) "c")
-+ ((UCHAR) "uc")
-+ ((CP_DATA_BUS_INT) "cpdbi")
-+ (else "l"))))
-+ (sa vbase val expr-suffix))))))
-+
-+(define (declare-intrinsic-test name insn others)
-+ (set! curr-insn insn)
-+ (scan-syntax insn)
-+ (scan-read-write insn)
-+
-+ (let* ((mnem (insn-mnemonic insn))
-+ (syntax (insn-syntax insn))
-+ (first #t)
-+ (comma-not-first (lambda () (if first (begin (set! first #f) "") ", ")))
-+ (vars '("x" "y" "z" "t" "w"))
-+ (operands syntactic-operands))
-+
-+ (cond ((equal? mnem "--unused--") '())
-+ ((equal? mnem "--reserved--") '())
-+ (else
-+ (begin
-+ (string-write (target:builtin-name (intrinsic-name insn)) " (")
-+ (for-each (lambda (operand)
-+ (string-write (sa (comma-not-first)
-+ (test-val #f operand (car vars))
-+ ))
-+ (set! vars (cdr vars))) operands)
-+ (string-write ");\n")))
-+ )))
-diff -Nur binutils-2.24.orig/cgen/mach.scm binutils-2.24/cgen/mach.scm
---- binutils-2.24.orig/cgen/mach.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/mach.scm 2016-06-30 21:26:12.661893424 +0200
-@@ -0,0 +1,2061 @@
-+;; CPU architecture description.
-+;; Copyright (C) 2000, 2003, 2009, 2010 Red Hat, Inc.
-+;; This file is part of CGEN.
-+;; See file COPYING.CGEN for details.
-+
-+;; Top level class that records everything about a cpu.
-+;; FIXME: Rename this to something else and rename <arch-data> to <arch>
-+;; for consistency with other classes (define-foo -> <foo> object).
-+
-+(define <arch>
-+ (class-make '<arch>
-+ nil
-+ '(
-+ ;; An object of type <arch-data>.
-+ data
-+
-+ ;; ??? All should really be assumed to be a black-box table.
-+ (attr-list . (() . ()))
-+ (enum-list . ())
-+ (kw-list . ())
-+ (isa-list . ())
-+ (cpu-list . ())
-+ (mach-list . ())
-+ (model-list . ())
-+ (ifld-table . ())
-+ (hw-list . ())
-+ (op-table . ())
-+ (ifmt-list . ())
-+ (sfmt-list . ())
-+ (insn-table . ())
-+ (minsn-table . ())
-+ (subr-list . ())
-+
-+ (insn-extract . #f) ;; FIXME: wip (and move elsewhere)
-+ (insn-execute . #f) ;; FIXME: wip (and move elsewhere)
-+
-+ ;; standard values derived from the input data
-+ derived
-+
-+ ;; #t if multi-insns have been instantiated
-+ (multi-insns-instantiated? . #f)
-+ ;; #t if instructions have been analyzed
-+ (insns-analyzed? . #f)
-+ ;; #t if semantics were included in the analysis
-+ (semantics-analyzed? . #f)
-+ ;; #t if alias insns were included in the analysis
-+ (aliases-analyzed? . #f)
-+
-+ ;; ordinal of next object that needs one
-+ (next-ordinal . 0)
-+ )
-+ nil)
-+)
-+
-+;; Accessors.
-+;; Each getter is arch-foo.
-+;; Each setter is arch-set-foo!.
-+
-+(define-getters <arch> arch
-+ (data
-+ attr-list enum-list kw-list
-+ isa-list cpu-list mach-list model-list
-+ ifld-table hw-list op-table ifmt-list sfmt-list
-+ insn-table minsn-table subr-list
-+ derived
-+ multi-insns-instantiated?
-+ insns-analyzed? semantics-analyzed? aliases-analyzed?
-+ next-ordinal
-+ )
-+)
-+
-+(define-setters <arch> arch
-+ (data
-+ attr-list enum-list kw-list
-+ isa-list cpu-list mach-list model-list
-+ ifld-table hw-list op-table ifmt-list sfmt-list
-+ insn-table minsn-table subr-list
-+ derived
-+ multi-insns-instantiated?
-+ insns-analyzed? semantics-analyzed? aliases-analyzed?
-+ next-ordinal
-+ )
-+)
-+
-+;; For elements recorded as a table, return a sorted list.
-+;; ??? All elements should really be assumed to be a black-box table.
-+
-+(define (arch-ifld-list arch)
-+ (/ident-object-table->list (arch-ifld-table arch))
-+)
-+
-+(define (arch-op-list arch)
-+ (/ident-object-table->list (arch-op-table arch))
-+)
-+
-+(define (arch-insn-list arch)
-+ (/ident-object-table->list (arch-insn-table arch))
-+)
-+
-+(define (arch-minsn-list arch)
-+ (/ident-object-table->list (arch-minsn-table arch))
-+)
-+
-+;; Get the next ordinal and increment it for the next time.
-+
-+(define (/get-next-ordinal! arch)
-+ (let ((ordinal (arch-next-ordinal arch)))
-+ (arch-set-next-ordinal! arch (+ ordinal 1))
-+ ordinal)
-+)
-+
-+;; FIXME: temp hack for current-ifld-lookup, current-op-lookup.
-+;; Return the element of list L with the lowest ordinal.
-+
-+(define (/get-lowest-ordinal l)
-+ (let ((lowest-obj #f)
-+ (lowest-ord (/get-next-ordinal! CURRENT-ARCH)))
-+ (for-each (lambda (elm)
-+ (if (< (obj-ordinal elm) lowest-ord)
-+ (begin
-+ (set! lowest-obj elm)
-+ (set! lowest-ord (obj-ordinal elm)))))
-+ l)
-+ lowest-obj)
-+)
-+
-+;; Table of <source-ident> objects with two access styles:
-+;; hash lookup, ordered list.
-+;; The main table is the hash table, the list is lazily created and cached.
-+;; The table is recorded as (hash-table . list).
-+;; The list is #f if it needs to be computed.
-+;; Each entry in the hash table is a list, multiple objects can have the same
-+;; key (e.g. insns from different isas can have the same name).
-+;;
-+;; This relies on the ordinal element of <source-ident> objects to build the
-+;; ordered list.
-+
-+(define (/make-ident-object-table hash-size)
-+ (cons (make-hash-table hash-size) #f)
-+)
-+
-+;; Return ordered list.
-+;;
-+;; To allow splicing in new objects we recognize two kinds of ordinal numbers:
-+;; integer and (integer . integer) where the latter is a pair of
-+;; major-ordinal-number and minor-ordinal-number.
-+
-+(define (/ident-object-table->list iot)
-+ (if (cdr iot)
-+ (cdr iot)
-+ (let ((unsorted (hash-fold (lambda (key value prior)
-+ ;; NOTE: {value} usually contains just
-+ ;; one element.
-+ (append value prior))
-+ '()
-+ (car iot))))
-+ (set-cdr! iot
-+ (sort unsorted (lambda (a b)
-+ ;; Ordinals are either an integer or
-+ ;; (major . minor).
-+ (let ((oa (obj-ordinal a))
-+ (ob (obj-ordinal b)))
-+ ;; Quick test for common case.
-+ (if (and (number? oa) (number? ob))
-+ (< oa ob)
-+ (let ((maj-a (if (pair? oa) (car oa) oa))
-+ (maj-b (if (pair? ob) (car ob) ob))
-+ (min-a (if (pair? oa) (cdr oa) 0))
-+ (min-b (if (pair? ob) (cdr ob) 0)))
-+ (cond ((< maj-a maj-b) #t)
-+ ((= maj-a maj-b) (< min-a min-b))
-+ (else #f))))))))
-+ (cdr iot)))
-+)
-+
-+;; Add an entry to an ident-object-table.
-+
-+(define (/ident-object-table-add! arch iot key object)
-+ ;; Give OBJECT an ordinal if it doesn't have one already.
-+ (if (not (obj-ordinal object))
-+ (obj-set-ordinal! object (/get-next-ordinal! arch)))
-+
-+ ;; Remember: Elements in the hash table are lists of objects, this is because
-+ ;; multiple objects can have the same key if they come from different isas.
-+ (let ((elm (hashq-ref (car iot) key)))
-+ (if elm
-+ (hashq-set! (car iot) key (cons object elm))
-+ (hashq-set! (car iot) key (cons object nil))))
-+
-+ ;; Need to recompute the sorted list.
-+ (set-cdr! iot #f)
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; Look up KEY in an ident-object-table.
-+
-+(define (/ident-object-table-lookup iot key)
-+ (hashq-ref iot key)
-+)
-+
-+;; Class for recording things specified in `define-arch'.
-+;; This simplifies define-arch as the global arch object CURRENT-ARCH
-+;; must exist before loading the .cpu file.
-+
-+(define <arch-data>
-+ (class-make '<arch-data>
-+ '(<ident>)
-+ '(
-+ ;; Default alignment of memory operations.
-+ ;; One of aligned, unaligned, forced.
-+ default-alignment
-+
-+ ;; Orientation of insn bit numbering (#f->msb=0, #t->lsb=0).
-+ insn-lsb0?
-+
-+ ;; List of all machs.
-+ ;; Each element is pair of (mach-name . sanitize-key)
-+ ;; where sanitize-key is #f if there is none.
-+ ;; blah blah blah ... ooohhh, evil sanitize key, blah blah blah
-+ machs
-+
-+ ;; List of all isas (instruction set architecture).
-+ ;; Each element is a pair of (isa-name . sanitize-key)
-+ ;; where sanitize-key is #f if there is none.
-+ ;; There is usually just one. ARM has two (arm, thumb).
-+ ;; blah blah blah ... ooohhh, evil sanitize key, blah blah blah
-+ isas
-+
-+ ;; ??? Defaults for other things should be here.
-+ )
-+ nil)
-+)
-+
-+(define-getters <arch-data> adata
-+ (default-alignment insn-lsb0? machs isas)
-+)
-+
-+;; Add, list, lookup accessors for <arch>.
-+;;
-+;; For the lookup routines, the result is the object or #f if not found.
-+;; For some, if X is already an object, return that.
-+
-+(define (current-arch-name) (obj:name (arch-data CURRENT-ARCH)))
-+
-+(define (current-arch-comment) (obj:comment (arch-data CURRENT-ARCH)))
-+
-+(define (current-arch-atlist) (obj-atlist (arch-data CURRENT-ARCH)))
-+
-+(define (current-arch-default-alignment)
-+ (adata-default-alignment (arch-data CURRENT-ARCH)))
-+
-+(define (current-arch-insn-lsb0?)
-+ (adata-insn-lsb0? (arch-data CURRENT-ARCH)))
-+
-+(define (current-arch-mach-name-list)
-+ (map car (adata-machs (arch-data CURRENT-ARCH)))
-+)
-+
-+(define (current-arch-isa-name-list)
-+ (map car (adata-isas (arch-data CURRENT-ARCH)))
-+)
-+
-+;; Attributes.
-+;; Recorded as a pair of lists.
-+;; The car is a list of <attribute> objects.
-+;; The cdr is an associative list of (name . <attribute>) elements, for lookup.
-+;; Could use a hash table except that there currently aren't that many.
-+
-+(define (current-attr-list) (car (arch-attr-list CURRENT-ARCH)))
-+
-+(define (current-attr-add! a)
-+ ;; NOTE: While putting this test in define-attr feels better, having it here
-+ ;; is more robust, internal calls get checked too. Thus it's here.
-+ ;; Ditto for all the other such tests in this file.
-+ (if (current-attr-lookup (obj:name a))
-+ (parse-error (make-current-context "define-attr")
-+ "attribute already defined" (obj:name a)))
-+ (let ((adata (arch-attr-list CURRENT-ARCH)))
-+ ;; Build list in normal order so we don't have to reverse it at the end
-+ ;; (since our format is non-trivial).
-+ (if (null? (car adata))
-+ (arch-set-attr-list! CURRENT-ARCH
-+ (cons (cons a nil)
-+ (acons (obj:name a) a nil)))
-+ (begin
-+ (append! (car adata) (cons a nil))
-+ (append! (cdr adata) (acons (obj:name a) a nil)))))
-+ *UNSPECIFIED*
-+)
-+
-+(define (current-attr-lookup attr-name)
-+ (assq-ref (cdr (arch-attr-list CURRENT-ARCH)) attr-name)
-+)
-+
-+;; Enums.
-+
-+(define (current-enum-list) (arch-enum-list CURRENT-ARCH))
-+
-+(define (current-enum-add! e)
-+ (if (current-enum-lookup (obj:name e))
-+ (parse-error (make-current-context "define-enum")
-+ "enum already defined" (obj:name e)))
-+ (arch-set-enum-list! CURRENT-ARCH (cons e (arch-enum-list CURRENT-ARCH)))
-+ *UNSPECIFIED*
-+)
-+
-+(define (current-enum-lookup enum-name)
-+ (object-assq enum-name (current-enum-list))
-+)
-+
-+;; Keywords.
-+
-+(define (current-kw-list) (arch-kw-list CURRENT-ARCH))
-+
-+(define (current-kw-add! kw)
-+ (if (current-kw-lookup (obj:name kw))
-+ (parse-error (make-current-context "define-keyword")
-+ "keyword already defined" (obj:name kw)))
-+ (arch-set-kw-list! CURRENT-ARCH (cons kw (arch-kw-list CURRENT-ARCH)))
-+ *UNSPECIFIED*
-+)
-+
-+(define (current-kw-lookup kw-name)
-+ (object-assq kw-name (current-kw-list))
-+)
-+
-+;; Instruction sets.
-+
-+(define (current-isa-list) (arch-isa-list CURRENT-ARCH))
-+
-+(define (current-isa-add! i)
-+ (if (current-isa-lookup (obj:name i))
-+ (parse-error (make-current-context "define-isa")
-+ "isa already defined" (obj:name i)))
-+ (arch-set-isa-list! CURRENT-ARCH (cons i (arch-isa-list CURRENT-ARCH)))
-+ *UNSPECIFIED*
-+)
-+
-+(define (current-isa-lookup isa-name)
-+ (object-assq isa-name (current-isa-list))
-+)
-+
-+;; Given a list of objects OBJ-LIST, return those objects that are from the
-+;; ISA(s) in ISA-NAME-LIST.
-+;; ISA-NAME-LIST may be (all) or #f (which also means (all)).
-+
-+(define (obj-filter-by-isa obj-list isa-name-list)
-+ (if (or (eq? isa-name-list #f)
-+ (memq 'all isa-name-list))
-+ obj-list
-+ (find (lambda (obj)
-+ (let ((obj-isas (obj-attr-value obj 'ISA)))
-+ (non-null-intersection? obj-isas isa-name-list)))
-+ obj-list))
-+)
-+
-+;; Cpu families.
-+
-+(define (current-cpu-list) (arch-cpu-list CURRENT-ARCH))
-+
-+(define (current-cpu-add! c)
-+ (if (current-cpu-lookup (obj:name c))
-+ (parse-error (make-current-context "define-cpu")
-+ "cpu already defined" (obj:name c)))
-+ (arch-set-cpu-list! CURRENT-ARCH (cons c (arch-cpu-list CURRENT-ARCH)))
-+ *UNSPECIFIED*
-+)
-+
-+(define (current-cpu-lookup cpu-name)
-+ (object-assq cpu-name (current-cpu-list))
-+)
-+
-+;; Machines.
-+
-+(define (current-mach-list) (arch-mach-list CURRENT-ARCH))
-+
-+(define (current-mach-add! m)
-+ (if (current-mach-lookup (obj:name m))
-+ (parse-error (make-current-context "define-mach")
-+ "mach already defined" (obj:name m)))
-+ (arch-set-mach-list! CURRENT-ARCH (cons m (arch-mach-list CURRENT-ARCH)))
-+ *UNSPECIFIED*
-+)
-+
-+(define (current-mach-lookup mach-name)
-+ (object-assq mach-name (current-mach-list))
-+)
-+
-+;; Models.
-+
-+(define (current-model-list) (arch-model-list CURRENT-ARCH))
-+
-+(define (current-model-add! m)
-+ (if (current-model-lookup (obj:name m))
-+ (parse-error (make-current-context "define-model")
-+ "model already defined" (obj:name m)))
-+ (arch-set-model-list! CURRENT-ARCH (cons m (arch-model-list CURRENT-ARCH)))
-+ *UNSPECIFIED*
-+)
-+
-+(define (current-model-lookup model-name)
-+ (object-assq model-name (current-model-list))
-+)
-+
-+;; Hardware elements.
-+;;
-+;; NOTE: Hardware elements must be uniquely named across all machs and isas.
-+
-+(define (current-hw-list) (arch-hw-list CURRENT-ARCH))
-+
-+(define (current-hw-add! hw)
-+ (if (current-hw-lookup (obj:name hw))
-+ (parse-error (make-current-context "define-hardware")
-+ "hardware already defined" (obj:name hw)))
-+ (arch-set-hw-list! CURRENT-ARCH (cons hw (arch-hw-list CURRENT-ARCH)))
-+ *UNSPECIFIED*
-+)
-+
-+(define (current-hw-lookup hw)
-+ (if (object? hw)
-+ hw
-+ ;; This doesn't use object-assq on purpose. Hardware objects handle
-+ ;; get-name specially.
-+ (find-first (lambda (hw-obj) (eq? (send hw-obj 'get-name) hw))
-+ (current-hw-list)))
-+)
-+
-+;; Instruction fields.
-+;;
-+;; NOTE: Instruction fields must be uniquely named across all machs,
-+;; but isas may share ifields with the same name.
-+
-+(define (current-ifld-list)
-+ (/ident-object-table->list (arch-ifld-table CURRENT-ARCH))
-+)
-+
-+(define (current-ifld-add! f)
-+ (if (/ifld-already-defined? f)
-+ (parse-error (make-obj-context f "define-ifield")
-+ "ifield already defined" (obj:name f)))
-+ (/ident-object-table-add! CURRENT-ARCH (arch-ifld-table CURRENT-ARCH)
-+ (obj:name f) f)
-+ *UNSPECIFIED*
-+)
-+
-+;; Look up ifield X in the current architecture.
-+;; Returns the <ifield> object or #f if not found.
-+;; If there is an ambiguity (i.e. the ifield is in multiple ISAs and
-+;; MAYBE-ISA-NAME-LIST doesn't disambiguate the choice) an error is signalled.
-+;;
-+;; If X is an <ifield> object, just return it.
-+;; This is to handle ???
-+;; Otherwise X is the name of the ifield to look up.
-+;; If MAYBE-ISA-NAME-LIST is provided, the car is a list of ISAs to look in.
-+;; If the specified isa list is #f, look in all ISAs.
-+
-+(define (current-ifld-lookup x . maybe-isa-name-list)
-+ (if (ifield? x)
-+ x
-+ (let ((f-list (/ident-object-table-lookup (car (arch-ifld-table CURRENT-ARCH))
-+ x)))
-+ (if f-list
-+ (let* ((isas (if (not (null? maybe-isa-name-list)) (car maybe-isa-name-list) #f))
-+ (filtered-f-list (obj-filter-by-isa f-list isas)))
-+ (case (length filtered-f-list)
-+ ((0) (error "Ifield not in specified ISA:" x))
-+ ((1) (car filtered-f-list))
-+ (else (error "Ambiguous ifield lookup:" x))))
-+ #f)))
-+)
-+
-+;; Return a boolean indicating if <ifield> F is currently defined.
-+;; This is slightly complicated because multiple isas can have different
-+;; ifields with the same name.
-+
-+(define (/ifld-already-defined? f)
-+ (let ((iflds (/ident-object-table-lookup (car (arch-ifld-table CURRENT-ARCH))
-+ (obj:name f))))
-+ ;; We've got all the ifields with the same name,
-+ ;; now see if any have the same ISA as F.
-+ (if iflds
-+ (let ((result #f)
-+ (f-isas (obj-isa-list f)))
-+ (for-each (lambda (ff)
-+ (if (non-null-intersection? f-isas (obj-isa-list ff))
-+ (set! result #t)))
-+ iflds)
-+ result)
-+ #f))
-+)
-+
-+;; Operands.
-+;;
-+;; NOTE: Operands must be uniquely named across all machs,
-+;; but isas may share operands with the same name.
-+
-+(define (current-op-list)
-+ (/ident-object-table->list (arch-op-table CURRENT-ARCH))
-+)
-+
-+(define (current-op-add! op)
-+ (if (/op-already-defined? op)
-+ (parse-error (make-obj-context op "define-operand")
-+ "operand already defined" (obj:name op)))
-+ (/ident-object-table-add! CURRENT-ARCH (arch-op-table CURRENT-ARCH)
-+ (obj:name op) op)
-+ *UNSPECIFIED*
-+)
-+
-+;; Look up operand NAME in the current architecture.
-+;; Returns the <operand> object or #f if not found.
-+;; If there is an ambiguity (i.e. the operand is in multiple ISAs and
-+;; MAYBE-ISA-NAME-LIST doesn't disambiguate the choice) an error is signalled.
-+;;
-+;; If MAYBE-ISA-NAME-LIST is provided, the car is a list of ISAs to look in.
-+;; If the specified isa list is #f, look in all ISAs.
-+
-+(define (current-op-lookup name . maybe-isa-name-list)
-+ (let ((op-list (/ident-object-table-lookup (car (arch-op-table CURRENT-ARCH))
-+ name)))
-+ (if op-list
-+ (let* ((isas (if (not (null? maybe-isa-name-list)) (car maybe-isa-name-list) #f))
-+ (filtered-o-list (obj-filter-by-isa op-list isas)))
-+ (case (length filtered-o-list)
-+ ((0) (error "Operand not in specified ISA:" name))
-+ ((1) (car filtered-o-list))
-+ (else (error "Ambiguous operand lookup:" name))))
-+ #f))
-+)
-+
-+;; Return a boolean indicating if <operand> OP is currently defined.
-+;; This is slightly complicated because multiple isas can have different
-+;; operands with the same name.
-+
-+(define (/op-already-defined? op)
-+ (let ((ops (/ident-object-table-lookup (car (arch-op-table CURRENT-ARCH))
-+ (obj:name op))))
-+ ;; We've got all the operands with the same name,
-+ ;; now see if any have the same ISA as OP.
-+ (if ops
-+ (let ((result #f)
-+ (op-isas (obj-isa-list op)))
-+ (for-each (lambda (o)
-+ (if (non-null-intersection? op-isas (obj-isa-list o))
-+ (set! result #t)))
-+ ops)
-+ result)
-+ #f))
-+)
-+
-+;; Instruction field formats.
-+
-+(define (current-ifmt-list) (arch-ifmt-list CURRENT-ARCH))
-+
-+;; Semantic formats (akin to ifmt's, except includes semantics to distinguish
-+;; insns).
-+
-+(define (current-sfmt-list) (arch-sfmt-list CURRENT-ARCH))
-+
-+;; Instructions.
-+;;
-+;; NOTE: Instructions must be uniquely named across all machs,
-+;; but isas may share instructions with the same name.
-+
-+(define (current-insn-list)
-+ (/ident-object-table->list (arch-insn-table CURRENT-ARCH))
-+)
-+
-+(define (current-insn-add! i)
-+ (if (/insn-already-defined? i)
-+ (parse-error (make-obj-context i "define-insn")
-+ "insn already defined" (obj:name i)))
-+ (/ident-object-table-add! CURRENT-ARCH (arch-insn-table CURRENT-ARCH)
-+ (obj:name i) i)
-+ *UNSPECIFIED*
-+)
-+
-+;; Look up insn NAME in the current architecture.
-+;; Returns the <insn> object or #f if not found.
-+;; If there is an ambiguity (i.e. the insn is in multiple ISAs and
-+;; ISA-NAME-LIST doesn't disambiguate the choice) an error is signalled.
-+;; If the specified isa list is #f, look in all ISAs.
-+
-+(define (current-insn-lookup name isa-name-list)
-+ (let ((i-list (/ident-object-table-lookup (car (arch-insn-table CURRENT-ARCH))
-+ name)))
-+ (if i-list
-+ (let ((filtered-i-list (obj-filter-by-isa i-list isa-name-list)))
-+ (case (length filtered-i-list)
-+ ((0) (error "Insn not in specified ISA:" name))
-+ ((1) (car filtered-i-list))
-+ (else (error "Ambiguous insn lookup:" name))))
-+ #f))
-+)
-+
-+;; Return a boolean indicating if <insn> INSN is currently defined.
-+;; This is slightly complicated because multiple isas can have different
-+;; insns with the same name.
-+
-+(define (/insn-already-defined? insn)
-+ (let ((insns (/ident-object-table-lookup (car (arch-insn-table CURRENT-ARCH))
-+ (obj:name insn))))
-+ ;; We've got all the insns with the same name,
-+ ;; now see if any have the same ISA as INSN.
-+ (if insns
-+ (let ((result #f)
-+ (insn-isas (obj-isa-list insn)))
-+ (for-each (lambda (i)
-+ (if (non-null-intersection? insn-isas (obj-isa-list i))
-+ (set! result #t)))
-+ insns)
-+ result)
-+ #f))
-+)
-+
-+;; Macro instructions.
-+;;
-+;; NOTE: Instructions must be uniquely named across all machs,
-+;; but isas may share instructions with the same name.
-+
-+(define (current-minsn-list)
-+ (/ident-object-table->list (arch-minsn-table CURRENT-ARCH))
-+)
-+
-+(define (current-minsn-add! m)
-+ (if (/minsn-already-defined? m)
-+ (parse-error (make-obj-context m "define-minsn")
-+ "macro-insn already defined" (obj:name m)))
-+ (/ident-object-table-add! CURRENT-ARCH (arch-minsn-table CURRENT-ARCH)
-+ (obj:name m) m)
-+ *UNSPECIFIED*
-+)
-+
-+;; Look up minsn NAME in the current architecture.
-+;; Returns the <macro-insn> object or #f if not found.
-+;; If there is an ambiguity (i.e. the minsn is in multiple ISAs and
-+;; ISA-NAME-LIST doesn't disambiguate the choice) an error is signalled.
-+;; If the specified isa list is #f, look in all ISAs.
-+
-+(define (current-minsn-lookup name isa-name-list)
-+ (let ((m-list (/ident-object-table-lookup (car (arch-minsn-table CURRENT-ARCH))
-+ name)))
-+ (if m-list
-+ (let ((filtered-m-list (obj-filter-by-isa m-list isa-name-list)))
-+ (case (length filtered-m-list)
-+ ((0) (error "Macro-insn not in specified ISA:" name))
-+ ((1) (car filtered-m-list))
-+ (else (error "Ambiguous macro-insn lookup:" name))))
-+ #f))
-+)
-+
-+;; Return a boolean indicating if <macro-insn> MINSN is currently defined.
-+;; This is slightly complicated because multiple isas can have different
-+;; macro-insns with the same name.
-+
-+(define (/minsn-already-defined? m)
-+ (let ((minsns (/ident-object-table-lookup (car (arch-minsn-table CURRENT-ARCH))
-+ (obj:name m))))
-+ ;; We've got all the macro-insns with the same name,
-+ ;; now see if any have the same ISA as M.
-+ (if minsns
-+ (let ((result #f)
-+ (m-isas (obj-isa-list m)))
-+ (for-each (lambda (mm)
-+ (if (non-null-intersection? m-isas (obj-isa-list mm))
-+ (set! result #t)))
-+ minsns)
-+ result)
-+ #f))
-+)
-+
-+;; rtx subroutines.
-+
-+(define (current-subr-list) (map cdr (arch-subr-list CURRENT-ARCH)))
-+
-+(define (current-subr-add! s)
-+ (if (current-subr-lookup (obj:name s))
-+ (parse-error (make-current-context "define-subr")
-+ "subroutine already defined" (obj:name s)))
-+ (arch-set-subr-list! CURRENT-ARCH
-+ (acons (obj:name s) s (arch-subr-list CURRENT-ARCH)))
-+ *UNSPECIFIED*
-+)
-+
-+(define (current-subr-lookup name)
-+ (assq-ref (arch-subr-list CURRENT-ARCH) name)
-+)
-+
-+;; Arch parsing support.
-+
-+;; Parse an alignment spec.
-+
-+(define (/arch-parse-alignment context alignment)
-+ (if (memq alignment '(aligned unaligned forced))
-+ alignment
-+ (parse-error context "invalid alignment" alignment))
-+)
-+
-+;; Parse an arch mach spec.
-+;; The value is a list of mach names or (mach-name sanitize-key) elements.
-+;; The result is a list of (mach-name . sanitize-key) elements.
-+
-+(define (/arch-parse-machs context machs)
-+ (for-each (lambda (m)
-+ (if (or (symbol? m)
-+ (and (list? m) (= (length m) 2)
-+ (symbol? (car m)) (symbol? (cadr m))))
-+ #t ;; ok
-+ (parse-error context "bad arch mach spec" m)))
-+ machs)
-+ (map (lambda (m)
-+ (if (symbol? m)
-+ (cons m #f)
-+ (cons (car m) (cadr m))))
-+ machs)
-+)
-+
-+;; Parse an arch isa spec.
-+;; The value is a list of isa names or (isa-name sanitize-key) elements.
-+;; The result is a list of (isa-name . sanitize-key) elements.
-+
-+(define (/arch-parse-isas context isas)
-+ (for-each (lambda (m)
-+ (if (or (symbol? m)
-+ (and (list? m) (= (length m) 2)
-+ (symbol? (car m)) (symbol? (cadr m))))
-+ #t ;; ok
-+ (parse-error context "bad arch isa spec" m)))
-+ isas)
-+ (map (lambda (m)
-+ (if (symbol? m)
-+ (cons m #f)
-+ (cons (car m) (cadr m))))
-+ isas)
-+)
-+
-+;; Parse an architecture description
-+;; This is the main routine for building an arch object from a cpu
-+;; description in the .cpu file.
-+;; All arguments are in raw (non-evaluated) form.
-+
-+(define (/arch-parse context name comment attrs
-+ default-alignment insn-lsb0?
-+ machs isas)
-+ (logit 2 "Processing arch " name " ...\n")
-+ (make <arch-data>
-+ (parse-name context name)
-+ (parse-comment context comment)
-+ (atlist-parse context attrs "arch")
-+ (/arch-parse-alignment context default-alignment)
-+ (parse-boolean context insn-lsb0?)
-+ (/arch-parse-machs context machs)
-+ (/arch-parse-isas context isas))
-+)
-+
-+;; Read an architecture description.
-+;; This is the main routine for analyzing an arch description in the .cpu file.
-+;; ARG-LIST is an associative list of field name and field value.
-+;; parse-arch is invoked to create the `arch' object.
-+
-+(define /arch-read
-+ (lambda arg-list
-+ (let ((context "arch-read")
-+ ;; <arch-data> object members and default values
-+ (name "unknown")
-+ (comment "")
-+ (attrs nil)
-+ (default-alignment 'aligned)
-+ (insn-lsb0? #f)
-+ (machs #f)
-+ (isas #f)
-+ )
-+ ;; Loop over each element in ARG-LIST, recording what's found.
-+ (let loop ((arg-list arg-list))
-+ (if (null? arg-list)
-+ nil
-+ (let ((arg (car arg-list))
-+ (elm-name (caar arg-list)))
-+ (case elm-name
-+ ((name) (set! name (cadr arg)))
-+ ((comment) (set! comment (cadr arg)))
-+ ((attrs) (set! attrs (cdr arg)))
-+ ((default-alignment) (set! default-alignment (cadr arg)))
-+ ((insn-lsb0?) (set! insn-lsb0? (cadr arg)))
-+ ((machs) (set! machs (cdr arg)))
-+ ((isas) (set! isas (cdr arg)))
-+ (else (parse-error context "invalid arch arg" arg)))
-+ (loop (cdr arg-list)))))
-+ ;; Ensure required fields are present.
-+ (if (not machs)
-+ (parse-error context "missing machs spec"))
-+ (if (not isas)
-+ (parse-error context "missing isas spec"))
-+ ;; Now that we've identified the elements, build the object.
-+ (/arch-parse context name comment attrs default-alignment insn-lsb0?
-+ machs isas)
-+ )
-+ )
-+)
-+
-+;; Define an arch object, name/value pair list version.
-+
-+(define define-arch
-+ (lambda arg-list
-+ (let ((a (apply /arch-read arg-list)))
-+ (arch-set-data! CURRENT-ARCH a)
-+ (def-mach-attr! (adata-machs a))
-+ (keep-mach-validate!)
-+ (def-isa-attr! (adata-isas a))
-+ (keep-isa-validate!)
-+ ;; Install the builtin objects now that we have an arch, and now that
-+ ;; attributes MACH and ISA exist, and now that we know the rtl version.
-+ (reader-install-builtin!)
-+ a))
-+)
-+
-+;; Mach/isa processing.
-+
-+;; Create the MACH attribute.
-+;; MACHS is the canonicalized machs spec to define-arch: (name . sanitize-key).
-+
-+(define (def-mach-attr! machs)
-+ (let ((mach-enums (append
-+ '((base))
-+ (map (lambda (mach)
-+ (cons (car mach)
-+ (cons '-
-+ (if (cdr mach)
-+ (list (cons 'sanitize (cdr mach)))
-+ nil))))
-+ machs)
-+ '((max)))))
-+ (define-attr '(type bitset) '(name MACH)
-+ '(comment "machine type selection")
-+ '(default base) (cons 'values mach-enums))
-+ )
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; Return #t if MACH is supported by OBJ.
-+;; This is done by looking for the MACH attribute in OBJ.
-+;; By definition, objects that support the default (base) mach support
-+;; all machs.
-+
-+(define (mach-supports? mach obj)
-+ (let ((machs (obj-attr-value obj 'MACH))
-+ (name (obj:name mach)))
-+ (or (memq name machs)
-+ (memq 'base machs)))
-+ ;;(let ((deflt (attr-lookup-default 'MACH obj)))
-+ ;; (any-true? (map (lambda (m) (memq m deflt)) machs)))))
-+)
-+
-+;; Create the ISA attribute.
-+;; ISAS is the canonicalized isas spec to define-arch: (name . sanitize-key).
-+;; ISAS is a list of isa names.
-+
-+(define (def-isa-attr! isas)
-+ (let ((isa-enums (append
-+ (map (lambda (isa)
-+ (cons (car isa)
-+ (cons '-
-+ (if (cdr isa)
-+ (list (cons 'sanitize (cdr isa)))
-+ nil))))
-+ isas)
-+ '((max)))))
-+ (define-attr '(type bitset) '(name ISA)
-+ '(comment "instruction set selection")
-+ ;; If there's only one isa, don't (yet) pollute the tables with a value
-+ ;; for it.
-+ (if (= (length isas) 1)
-+ '(for)
-+ '(for ifield operand insn hardware))
-+ (cons 'default (list (caar isa-enums)))
-+ (cons 'values isa-enums))
-+ )
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; Return the bitset attr value for all isas.
-+
-+(define (all-isas-attr-value)
-+ (current-arch-isa-name-list)
-+)
-+
-+;; Return an ISA attribute of all isas.
-+;; This is useful for things like f-nil which exist across all isas.
-+
-+(define (all-isas-attr)
-+ (bitset-attr-make 'ISA (all-isas-attr-value))
-+)
-+
-+;; Return list of ISA names specified by attribute object ATLIST.
-+
-+(define (attr-isa-list atlist)
-+ (atlist-attr-value atlist 'ISA #f)
-+)
-+
-+;; Return list of ISA names specified by OBJ.
-+
-+(define (obj-isa-list obj)
-+ (obj-attr-value obj 'ISA)
-+)
-+
-+;; Return #t if <isa> ISA is supported by OBJ.
-+;; This is done by looking for the ISA attribute in OBJ.
-+
-+(define (isa-supports? isa obj)
-+ (let ((isas (obj-isa-list obj))
-+ (name (obj:name isa)))
-+ (->bool (memq name isas)))
-+)
-+
-+;; The fetch/decode/execute process.
-+;; "extract" is a fancy word for fetch/decode.
-+;; FIXME: wip, not currently used.
-+;; FIXME: move to inside define-isa, and maybe elsewhere.
-+;;
-+;(defmacro
-+;; define-extract (code)
-+;; ;;(arch-set-insn-extract! CURRENT-ARCH code)
-+;; *UNSPECIFIED*
-+;)
-+;;
-+;(defmacro
-+;; define-execute (code)
-+;; ;;(arch-set-insn-execute! CURRENT-ARCH code)
-+;; *UNSPECIFIED*
-+;;)
-+
-+;; ISA specification.
-+;; Each architecture is generally one isa, but in the case of ARM (and a few
-+;; others) there is more than one.
-+;;
-+;; ??? "ISA" has a very well defined meaning, and our usage of it one might
-+;; want to quibble over. A better name would be welcome.
-+
-+;; Associated with an instruction set is its framing.
-+;; This refers to how instructions are laid out at the liw level (where several
-+;; insns are framed together and executed sequentially or in parallel).
-+;; ??? If one defines the term "format" as being how an individual instruction
-+;; is laid out then formatting can be thought of as being different from
-+;; framing. However, it's possible for a particular ISA to intertwine the two.
-+;; Thus this will need to evolve.
-+;; ??? Not used yet, wip.
-+
-+(define <iframe> ;; pronounced I-frame
-+ (class-make '<iframe> '(<ident>)
-+ '(
-+ ;; list of <itype> objects that make up the frame
-+ insns
-+
-+ ;; assembler syntax
-+ syntax
-+
-+ ;; list of (length value) elements that make up the format
-+ ;; Length is in bits. Value is either a number or a $number
-+ ;; symbol refering to the insn specified in `insns'.
-+ value
-+
-+ ;; Initial bitnumbers to decode insns by.
-+ ;; ??? At present the rest of the decoding is determined
-+ ;; algorithmically. May wish to give the user more control
-+ ;; [like psim].
-+ decode-assist
-+
-+ ;; rtl that executes instructions in `value'
-+ ;; Fields specified in `value' can be used here.
-+ action
-+ )
-+ nil)
-+)
-+
-+;; Accessors.
-+
-+(define-getters <iframe> iframe (insns syntax value decode-assist action))
-+
-+;; Instruction types, recorded in <iframe>.
-+;; ??? Not used yet, wip.
-+
-+(define <itype>
-+ (class-make '<itype> '(<ident>)
-+ '(
-+ ;; length in bits, or initial part if variable length (wip)
-+ length
-+
-+ ;; constraint specifying which insns are included
-+ constraint
-+
-+ ;; Initial bitnumbers to decode insns by.
-+ ;; ??? At present the rest of the decoding is determined
-+ ;; algorithmically. May wish to give the user more control
-+ ;; [like psim].
-+ decode-assist
-+ )
-+ nil)
-+)
-+
-+;; Accessors.
-+
-+(define-getters <itype> itype (length constraint decode-assist))
-+
-+;; Simulator instruction decode splitting.
-+;; FIXME: Should live in simulator specific code. Requires class handling
-+;; cleanup first.
-+;;
-+;; Instructions can be split by particular values for an ifield.
-+;; The ARM port uses this to split insns into those that set the pc and
-+;; those that don't.
-+
-+(define <decode-split>
-+ (class-make '<decode-split> '()
-+ '(
-+ ;; Name of ifield to split on.
-+ name
-+
-+ ;; Constraint. Only insns satifying this constraint are
-+ ;; split. #f if no constraint.
-+ constraint
-+
-+ ;; List of ifield splits.
-+ ;; Each element is one of (name value) or (name (values)).
-+ values
-+ )
-+ nil
-+ )
-+)
-+
-+;; Accessors.
-+
-+(define-getters <decode-split> decode-split (name constraint values))
-+
-+;; Parse a decode-split spec.
-+;; SPEC is (ifield-name constraint value-list).
-+;; CONSTRAINT is an rtl expression. Only insns satifying the constraint
-+;; are split.
-+;; Each element of VALUE-LIST is one of (name value) or (name (values)).
-+;; FIXME: All possible values must be specified. Need an `else' clause.
-+;; Ranges would also be useful.
-+
-+(define (/isa-parse-decode-split context spec)
-+ (if (!= (length spec) 3)
-+ (parse-error context "decode-split spec is (ifield-name constraint value-list)" spec))
-+
-+ (let ((name (parse-name (car spec) context))
-+ (constraint (cadr spec))
-+ (value-list (caddr spec)))
-+
-+ ;; FIXME: more error checking.
-+
-+ (make <decode-split>
-+ name
-+ (if (null? constraint) #f constraint)
-+ value-list))
-+)
-+
-+;; Parse a list of decode-split specs.
-+
-+(define (/isa-parse-decode-splits context spec-list)
-+ (map (lambda (spec)
-+ (/isa-parse-decode-split context spec))
-+ spec-list)
-+)
-+
-+;; Top level class to describe an isa.
-+
-+(define <isa>
-+ (class-make '<isa> '(<ident>)
-+ '(
-+ ;; Default length to record in ifields.
-+ ;; This is used in calculations involving bit numbers.
-+ default-insn-word-bitsize
-+
-+ ;; Length of an unknown instruction. Used by disassembly
-+ ;; and by the simulator's invalid insn handler.
-+ default-insn-bitsize
-+
-+ ;; Number of bytes of insn that can be initially fetched.
-+ ;; In non-LIW isas this would be the length of the smallest
-+ ;; insn. For LIW isas it depends - only one LIW isa is
-+ ;; currently supported (m32r).
-+ base-insn-bitsize
-+
-+ ;; Initial bitnumbers to decode insns by.
-+ ;; ??? At present the rest of the decoding is determined
-+ ;; algorithmically. May wish to give the user more control
-+ ;; [like psim].
-+ decode-assist
-+
-+ ;; Number of instructions that can be fetched at a time
-+ ;; [e.g. 2 on m32r].
-+ liw-insns
-+
-+ ;; Maximum number of instructions the cpu can execute in
-+ ;; parallel.
-+ ;; FIXME: Rename to max-parallel-insns.
-+ parallel-insns
-+
-+ ;; List of <iframe> objects.
-+ ;frames
-+
-+ ;; Condition tested before execution of any instruction or
-+ ;; #f if there is none. For architectures like ARM, ARC.
-+ ;; If specified it is a pair of
-+ ;; (condition-field-name . rtl-for-condition)
-+ (condition . #f)
-+
-+ ;; Code to execute after CONDITION and prior to SEMANTICS.
-+ ;; This is rtl in source form or #f if there is none.
-+ ;; This is generally unused. It is used on the ARM to set
-+ ;; R15 to the correct value.
-+ ;; The reason it's not specified with SEMANTICS is that it is
-+ ;; believed some applications won't need/want this.
-+ ;; ??? It is a bit of a hack though, as it is used to aid
-+ ;; implementation of apps (e.g. simulator). Arguably something
-+ ;; that doesn't belong here. Maybe as more architectures are
-+ ;; ported that have the PC as a general register, a better way
-+ ;; to do this will arise.
-+ (setup-semantics . #f)
-+
-+ ;; list of simulator instruction splits
-+ ;; FIXME: should live in simulator file (needs class cleanup).
-+ (decode-splits . ())
-+
-+ ;; ??? More may need to migrate here.
-+ )
-+ nil)
-+)
-+
-+;; Accessors.
-+
-+(define-getters <isa> isa
-+ (base-insn-bitsize default-insn-bitsize default-insn-word-bitsize
-+ decode-assist liw-insns parallel-insns condition
-+ setup-semantics decode-splits)
-+)
-+
-+(define-setters <isa> isa
-+ (decode-splits)
-+)
-+
-+(define (isa-enum isa) (string-append "ISA_" (string-upcase (gen-sym isa))))
-+
-+;; Return minimum/maximum size in bits of all insns in the isa.
-+
-+(define (isa-min-insn-bitsize isa)
-+ ;; add `65535' in case list is nil (avoids crash)
-+ ;; [a language with infinite precision can't have min-reduce-iota-0 :-)]
-+ (apply min (cons 65535
-+ (map insn-length (find (lambda (insn)
-+ (and (not (has-attr? insn 'ALIAS))
-+ (isa-supports? isa insn)))
-+ (non-multi-insns (current-insn-list))))))
-+)
-+
-+(define (isa-max-insn-bitsize isa)
-+ ;; add `0' in case list is nil (avoids crash)
-+ ;; [a language with infinite precision can't have max-reduce-iota-0 :-)]
-+ (apply max (cons 0
-+ (map insn-length (find (lambda (insn)
-+ (and (not (has-attr? insn 'ALIAS))
-+ (isa-supports? isa insn)))
-+ (non-multi-insns (current-insn-list))))))
-+)
-+
-+;; Return a boolean indicating if instructions in ISA can be kept in a
-+;; portable int.
-+
-+(define (isa-integral-insn? isa)
-+ (<= (isa-max-insn-bitsize isa) 32)
-+)
-+
-+;; Parse an isa decode-assist spec.
-+
-+(define (/isa-parse-decode-assist context spec)
-+ (if (not (all-true? (map non-negative-integer? spec)))
-+ (parse-error context
-+ "spec must consist of non-negative-integers"
-+ spec))
-+ (if (not (= (length spec) (length (nub spec identity))))
-+ (parse-error context
-+ "duplicate elements"
-+ spec))
-+ spec
-+)
-+
-+;; Parse an isa condition spec.
-+;; `condition' here refers to the condition performed by architectures like
-+;; ARM and ARC before each insn.
-+
-+(define (/isa-parse-condition context spec)
-+ (if (null? spec)
-+ #f
-+ (begin
-+ (if (or (!= (length spec) 2)
-+ (not (symbol? (car spec)))
-+ (not (form? (cadr spec))))
-+ (parse-error context
-+ "condition spec not `(ifield-name rtl-code)'" spec))
-+ spec))
-+)
-+
-+;; Parse a setup-semantics spec.
-+
-+(define (/isa-parse-setup-semantics context spec)
-+ (if (not (null? spec))
-+ spec
-+ #f)
-+)
-+
-+;; Parse an isa spec.
-+;; The result is the <isa> object.
-+;; All arguments are in raw (non-evaluated) form.
-+
-+(define (/isa-parse context name comment attrs
-+ base-insn-bitsize default-insn-bitsize default-insn-word-bitsize
-+ decode-assist liw-insns parallel-insns condition
-+ setup-semantics decode-splits)
-+ (logit 2 "Processing isa " name " ...\n")
-+
-+ ;; Pick out name first to augment the error context.
-+ (let* ((name (parse-name context name))
-+ (context (context-append-name context name)))
-+
-+ (if (not (memq name (current-arch-isa-name-list)))
-+ (parse-error context "isa name is not present in `define-arch'" name))
-+
-+ ;; Isa's are always kept - we need them to validate later uses, even if
-+ ;; the then resulting object won't be kept. All isas are also needed to
-+ ;; compute a proper value for the isas-cache member of <hardware-base>
-+ ;; for builtin objects.
-+ (make <isa>
-+ name
-+ (parse-comment context comment)
-+ (atlist-parse context attrs "isa")
-+ (parse-number (context-append context
-+ ": default-insn-word-bitsize")
-+ default-insn-word-bitsize '(8 . 128))
-+ (parse-number (context-append context
-+ ": default-insn-bitsize")
-+ default-insn-bitsize '(8 . 128))
-+ (parse-number (context-append context
-+ ": base-insn-bitsize")
-+ base-insn-bitsize '(8 . 128))
-+ (/isa-parse-decode-assist (context-append context
-+ ": decode-assist")
-+ decode-assist)
-+ liw-insns
-+ parallel-insns
-+ (/isa-parse-condition context condition)
-+ (/isa-parse-setup-semantics context setup-semantics)
-+ (/isa-parse-decode-splits context decode-splits)
-+ ))
-+)
-+
-+;; Read an isa entry.
-+;; ARG-LIST is an associative list of field name and field value.
-+
-+(define (/isa-read context . arg-list)
-+ (let (
-+ (name #f)
-+ (attrs nil)
-+ (comment "")
-+ (base-insn-bitsize #f)
-+ (default-insn-bitsize #f)
-+ (default-insn-word-bitsize #f)
-+ (decode-assist nil)
-+ (liw-insns 1)
-+ ;; FIXME: Hobbit computes the wrong symbol for `parallel-insns'
-+ ;; in the `case' expression below because there is a local var
-+ ;; of the same name ("__1" gets appended to the symbol name).
-+ (parallel-insns- 1)
-+ (condition nil)
-+ (setup-semantics nil)
-+ (decode-splits nil)
-+ )
-+
-+ (let loop ((arg-list arg-list))
-+ (if (null? arg-list)
-+ nil
-+ (let ((arg (car arg-list))
-+ (elm-name (caar arg-list)))
-+ (case elm-name
-+ ((name) (set! name (cadr arg)))
-+ ((comment) (set! comment (cadr arg)))
-+ ((attrs) (set! attrs (cdr arg)))
-+ ((default-insn-word-bitsize)
-+ (set! default-insn-word-bitsize (cadr arg)))
-+ ((default-insn-bitsize) (set! default-insn-bitsize (cadr arg)))
-+ ((base-insn-bitsize) (set! base-insn-bitsize (cadr arg)))
-+ ((decode-assist) (set! decode-assist (cadr arg)))
-+ ((liw-insns) (set! liw-insns (cadr arg)))
-+ ((parallel-insns) (set! parallel-insns- (cadr arg)))
-+ ((condition) (set! condition (cdr arg)))
-+ ((setup-semantics) (set! setup-semantics (cadr arg)))
-+ ((decode-splits) (set! decode-splits (cdr arg)))
-+ ((insn-types) #t) ;; ignore for now
-+ ((frame) #t) ;; ignore for now
-+ (else (parse-error context "invalid isa arg" arg)))
-+ (loop (cdr arg-list)))))
-+
-+ ;; Now that we've identified the elements, build the object.
-+ (/isa-parse context name comment attrs
-+ base-insn-bitsize
-+ (if default-insn-word-bitsize
-+ default-insn-word-bitsize
-+ base-insn-bitsize)
-+ (if default-insn-bitsize
-+ default-insn-bitsize
-+ base-insn-bitsize)
-+ decode-assist liw-insns parallel-insns- condition
-+ setup-semantics decode-splits))
-+)
-+
-+;; Define a <isa> object, name/value pair list version.
-+
-+(define define-isa
-+ (lambda arg-list
-+ (let ((i (apply /isa-read (cons (make-current-context "define-isa")
-+ arg-list))))
-+ (if i
-+ (current-isa-add! i))
-+ i))
-+)
-+
-+;; Subroutine of modify-isa to process one add-decode-split spec.
-+
-+(define (/isa-add-decode-split! context isa spec)
-+ (let ((decode-split (/isa-parse-decode-split context spec)))
-+ (isa-set-decode-splits! (cons decode-split (isa-decode-splits isa)))
-+ *UNSPECIFIED*)
-+)
-+
-+;; Main routine for modifying existing isa definitions
-+
-+(define modify-isa
-+ (lambda arg-list
-+ (let ((context (make-current-context "modify-isa"))
-+ (isa-spec (assq 'name arg-list)))
-+ (if (not isa-spec)
-+ (parse-error context "isa name not specified"))
-+
-+ (let ((isa (current-isa-lookup (arg-list-symbol-arg context isa-spec))))
-+ (if (not isa)
-+ (parse-error context "undefined isa" isa-spec))
-+
-+ (let loop ((args arg-list))
-+ (if (null? args)
-+ #f ;; done
-+ (let ((arg-spec (car args)))
-+ (case (car arg-spec)
-+ ((name) #f) ;; ignore, already processed
-+ ((add-decode-split)
-+ (/isa-add-decode-split! context isa (cdr arg-spec)))
-+ (else
-+ (parse-error context "invalid/unsupported option" (car arg-spec))))
-+ (loop (cdr args)))))))
-+
-+ *UNSPECIFIED*)
-+)
-+
-+;; Return boolean indicating if ISA supports parallel execution.
-+
-+(define (isa-parallel-exec? isa) (> (isa-parallel-insns isa) 1))
-+
-+;; Return a boolean indicating if ISA supports conditional execution
-+;; of all instructions.
-+
-+(define (isa-conditional-exec? isa) (->bool (isa-condition isa)))
-+
-+;; The `<cpu>' object collects together various details about a particular
-+;; subset of the architecture (e.g. perhaps all 32 bit variants of the sparc
-+;; architecture).
-+;; This is called a "cpu-family".
-+;; ??? May be renamed to <family> (both internally and in the .cpu file).
-+;; ??? Another way to do this would be to discard the family notion and allow
-+;; machs to inherit from other machs, as well as use isas to distinguish
-+;; sufficiently dissimilar machs. This would remove a fuzzy illspecified
-+;; notion with a concrete one.
-+;; ??? Maybe a better way to organize sparc32 vs sparc64 is via an isa.
-+
-+(define <cpu>
-+ (class-make '<cpu>
-+ '(<ident>)
-+ '(
-+ ;; one of big/little/either/#f.
-+ ;; If #f, then {insn,data,float}-endian are used.
-+ ;; Otherwise they're ignored.
-+ endian
-+
-+ ;; one of big/little/either.
-+ insn-endian
-+
-+ ;; one of big/little/either/big-words/little-words.
-+ ;; If big-words then each word is little-endian.
-+ ;; If little-words then each word is big-endian.
-+ data-endian
-+
-+ ;; one of big/little/either/big-words/little-words.
-+ float-endian
-+
-+ ;; number of bits in a word.
-+ word-bitsize
-+
-+ ;; number of bits in a chunk of an instruction word, for
-+ ;; endianness conversion purposes; 0 = no chunking
-+ insn-chunk-bitsize
-+
-+ ;; Transformation to use in generated files should one be
-+ ;; needed. At present the only supported value is a string
-+ ;; which is the file suffix.
-+ ;; ??? A dubious element of the description language, but given
-+ ;; the quantity of generated files, some machine generated
-+ ;; headers may need to #include other machine generated headers
-+ ;; (e.g. cpuall.h).
-+ file-transform
-+
-+ ;; Allow a cpu family to override the isa parallel-insns spec.
-+ ;; ??? Concession to the m32r port which can go away, in time.
-+ parallel-insns
-+
-+ ;; Computed: maximum number of insns which may pass before there
-+ ;; an insn writes back its output operands.
-+ max-delay
-+
-+ )
-+ nil)
-+)
-+
-+;; Accessors.
-+
-+(define-getters <cpu> cpu (word-bitsize insn-chunk-bitsize file-transform parallel-insns max-delay))
-+(define-setters <cpu> cpu (max-delay))
-+
-+;; Return endianness of instructions.
-+
-+(define (cpu-insn-endian cpu)
-+ (let ((endian (elm-xget cpu 'endian)))
-+ (if endian
-+ endian
-+ (elm-xget cpu 'insn-endian)))
-+)
-+
-+;; Return endianness of data.
-+
-+(define (cpu-data-endian cpu)
-+ (let ((endian (elm-xget cpu 'endian)))
-+ (if endian
-+ endian
-+ (elm-xget cpu 'data-endian)))
-+)
-+
-+;; Return endianness of floats.
-+
-+(define (cpu-float-endian cpu)
-+ (let ((endian (elm-xget cpu 'endian)))
-+ (if endian
-+ endian
-+ (elm-xget cpu 'float-endian)))
-+)
-+
-+;; Parse a cpu family description
-+;; This is the main routine for building a <cpu> object from a cpu
-+;; description in the .cpu file.
-+;; All arguments are in raw (non-evaluated) form.
-+
-+(define (/cpu-parse context name comment attrs
-+ endian insn-endian data-endian float-endian
-+ word-bitsize insn-chunk-bitsize file-transform parallel-insns)
-+ (logit 2 "Processing cpu family " name " ...\n")
-+
-+ ;; Pick out name first to augment the error context.
-+ (let* ((name (parse-name context name))
-+ (context (context-append-name context name)))
-+
-+ (if (keep-cpu? name)
-+ (make <cpu>
-+ name
-+ (parse-comment context comment)
-+ (atlist-parse context attrs "cpu")
-+ endian insn-endian data-endian float-endian
-+ word-bitsize
-+ insn-chunk-bitsize
-+ file-transform
-+ parallel-insns
-+ 0 ;; default max-delay. will compute correct value
-+ )
-+ (begin
-+ (logit 2 "Ignoring " name ".\n")
-+ #f))) ;; cpu is not to be kept
-+)
-+
-+;; Read a cpu family description
-+;; This is the main routine for analyzing a cpu description in the .cpu file.
-+;; CONTEXT is a <context> object for error messages.
-+;; ARG-LIST is an associative list of field name and field value.
-+;; /cpu-parse is invoked to create the <cpu> object.
-+
-+(define (/cpu-read context . arg-list)
-+ (let (
-+ (name nil)
-+ (comment nil)
-+ (attrs nil)
-+ (endian #f)
-+ (insn-endian #f)
-+ (data-endian #f)
-+ (float-endian #f)
-+ (word-bitsize #f)
-+ (insn-chunk-bitsize 0)
-+ (file-transform "")
-+ ;; FIXME: Hobbit computes the wrong symbol for `parallel-insns'
-+ ;; in the `case' expression below because there is a local var
-+ ;; of the same name ("__1" gets appended to the symbol name).
-+ (parallel-insns- #f)
-+ )
-+
-+ ;; Loop over each element in ARG-LIST, recording what's found.
-+ (let loop ((arg-list arg-list))
-+ (if (null? arg-list)
-+ nil
-+ (let ((arg (car arg-list))
-+ (elm-name (caar arg-list)))
-+ (case elm-name
-+ ((name) (set! name (cadr arg)))
-+ ((comment) (set! comment (cadr arg)))
-+ ((attrs) (set! attrs (cdr arg)))
-+ ((endian) (set! endian (cadr arg)))
-+ ((insn-endian) (set! insn-endian (cadr arg)))
-+ ((data-endian) (set! data-endian (cadr arg)))
-+ ((float-endian) (set! float-endian (cadr arg)))
-+ ((word-bitsize) (set! word-bitsize (cadr arg)))
-+ ((insn-chunk-bitsize) (set! insn-chunk-bitsize (cadr arg)))
-+ ((file-transform) (set! file-transform (cadr arg)))
-+ ((parallel-insns) (set! parallel-insns- (cadr arg)))
-+ (else (parse-error context "invalid cpu arg" arg)))
-+ (loop (cdr arg-list)))))
-+
-+ ;; Now that we've identified the elements, build the object.
-+ (/cpu-parse context name comment attrs
-+ endian insn-endian data-endian float-endian
-+ word-bitsize insn-chunk-bitsize file-transform parallel-insns-))
-+)
-+
-+;; Define a cpu family object, name/value pair list version.
-+
-+(define define-cpu
-+ (lambda arg-list
-+ (let ((c (apply /cpu-read (cons (make-current-context "define-cpu")
-+ arg-list))))
-+ (if c
-+ (begin
-+ (current-cpu-add! c)
-+ (mode-set-word-modes! (cpu-word-bitsize c))
-+ (hw-update-word-modes!)
-+ ))
-+ c))
-+)
-+
-+;; The `<mach>' object describes one member of a `cpu' family.
-+
-+(define <mach>
-+ (class-make '<mach> '(<ident>)
-+ '(
-+ ;; cpu family this mach is a member of
-+ cpu
-+ ;; bfd name of mach
-+ bfd-name
-+ ;; list of <isa> objects
-+ isas
-+ )
-+ nil)
-+)
-+
-+;; Accessors.
-+
-+(define-getters <mach> mach (cpu bfd-name isas))
-+
-+(define (mach-enum obj)
-+ (string-append "MACH_" (string-upcase (gen-sym obj)))
-+)
-+
-+(define (mach-number obj) (mach-enum obj))
-+
-+(define (machs-for-cpu cpu)
-+ (let ((cpu-name (obj:name cpu)))
-+ (find (lambda (mach)
-+ (eq? (obj:name (mach-cpu mach)) cpu-name))
-+ (current-mach-list)))
-+)
-+
-+;; Parse a machine entry.
-+;; The result is a <mach> object or #f if the mach isn't to be kept.
-+;; All arguments are in raw (non-evaluated) form.
-+
-+(define (/mach-parse context name comment attrs cpu bfd-name isas)
-+ (logit 2 "Processing mach " name " ...\n")
-+
-+ ;; Pick out name first to augment the error context.
-+ (let* ((name (parse-name context name))
-+ (context (context-append-name context name)))
-+
-+ (if (not (list? isas))
-+ (parse-error context "isa spec not a list" isas))
-+ (let ((cpu-obj (current-cpu-lookup cpu))
-+ (isa-list (map current-isa-lookup isas)))
-+ (if (not (memq name (current-arch-mach-name-list)))
-+ (parse-error context "mach name is not present in `define-arch'" name))
-+ (if (null? cpu)
-+ (parse-error context "missing cpu spec" cpu))
-+ (if (not cpu-obj)
-+ (parse-error context "unknown cpu" cpu))
-+ (if (null? isas)
-+ (parse-error context "missing isas spec" isas))
-+ (if (not (all-true? isa-list))
-+ (parse-error context "unknown isa in" isas))
-+ (if (not (string? bfd-name))
-+ (parse-error context "bfd-name not a string" bfd-name))
-+
-+ (if (keep-mach? (list name))
-+
-+ (make <mach>
-+ name
-+ (parse-comment context comment)
-+ (atlist-parse context attrs "mach")
-+ cpu-obj
-+ bfd-name
-+ isa-list)
-+
-+ (begin
-+ (logit 2 "Ignoring " name ".\n")
-+ #f)))) ;; mach is not to be kept
-+)
-+
-+;; Read a mach entry.
-+;; CONTEXT is a <context> object for error messages.
-+;; ARG-LIST is an associative list of field name and field value.
-+
-+(define (/mach-read context . arg-list)
-+ (let (
-+ (name nil)
-+ (attrs nil)
-+ (comment nil)
-+ (cpu nil)
-+ (bfd-name #f)
-+ (isas #f)
-+ )
-+
-+ (let loop ((arg-list arg-list))
-+ (if (null? arg-list)
-+ nil
-+ (let ((arg (car arg-list))
-+ (elm-name (caar arg-list)))
-+ (case elm-name
-+ ((name) (set! name (cadr arg)))
-+ ((comment) (set! comment (cadr arg)))
-+ ((attrs) (set! attrs (cdr arg)))
-+ ((cpu) (set! cpu (cadr arg)))
-+ ((bfd-name) (set! bfd-name (cadr arg)))
-+ ((isas) (set! isas (cdr arg)))
-+ (else (parse-error context "invalid mach arg" arg)))
-+ (loop (cdr arg-list)))))
-+
-+ ;; Now that we've identified the elements, build the object.
-+ (/mach-parse context name comment attrs cpu
-+ ;; Default bfd-name is same as object's name.
-+ (if bfd-name bfd-name (symbol->string name))
-+ ;; Default isa is the first one.
-+ (if isas isas (list (obj:name (car (current-isa-list)))))))
-+)
-+
-+;; Define a <mach> object, name/value pair list version.
-+
-+(define define-mach
-+ (lambda arg-list
-+ (let ((m (apply /mach-read (cons (make-current-context "define-mach")
-+ arg-list))))
-+ (if m
-+ (current-mach-add! m))
-+ m))
-+)
-+
-+;; Miscellaneous state derived from the input data.
-+;; FIXME: being redone
-+
-+;; Size of a word in bits.
-+;; All selected cpu families must have same value or error.
-+;; Ergo, don't use this if multiple word-bitsize values are expected.
-+;; E.g. opcodes support for architectures with both 32 and 64 variants.
-+
-+(define (state-word-bitsize)
-+ (let* ((wb-list (map cpu-word-bitsize (current-cpu-list)))
-+ (result (car wb-list)))
-+ (for-each (lambda (wb)
-+ (if (!= result wb)
-+ (error "multiple word-bitsize values" wb-list)))
-+ wb-list)
-+ result)
-+)
-+
-+;; Return maximum word bitsize.
-+
-+(define (state-max-word-bitsize)
-+ (apply max (map cpu-word-bitsize (current-cpu-list)))
-+)
-+
-+;; Size of normal instruction.
-+;; All selected isas must have same value or error.
-+
-+(define (state-default-insn-bitsize)
-+ (let ((dib (map isa-default-insn-bitsize (current-isa-list))))
-+ ;; FIXME: ensure all have same value.
-+ (car dib))
-+)
-+
-+;; Number of bytes of insn we can initially fetch.
-+;; All selected isas must have same value or error.
-+
-+(define (state-base-insn-bitsize)
-+ (let ((bib (map isa-base-insn-bitsize (current-isa-list))))
-+ ;; FIXME: ensure all have same value.
-+ (car bib))
-+)
-+
-+;; Return parallel-insns spec.
-+
-+(define (state-parallel-insns)
-+ ;; Assert only one cpu family has been selected.
-+ (assert-keep-one)
-+
-+ (let ((par-insns (map isa-parallel-insns (current-isa-list)))
-+ (cpu-par-insns (cpu-parallel-insns (current-cpu))))
-+ ;; ??? The m32r does have parallel execution, but to keep support for the
-+ ;; base mach simpler, a cpu family is allowed to override the isa spec.
-+ (or cpu-par-insns
-+ ;; FIXME: ensure all have same value.
-+ (car par-insns)))
-+)
-+
-+;; Return boolean indicating if parallel execution support is required.
-+
-+(define (state-parallel-exec?)
-+ (> (state-parallel-insns) 1)
-+)
-+
-+;; Return liw-insns spec.
-+
-+(define (state-liw-insns)
-+ (let ((liw-insns (map isa-liw-insns (current-isa-list))))
-+ ;; FIXME: ensure all have same value.
-+ (car liw-insns))
-+)
-+
-+;; Return decode-assist spec.
-+
-+(define (state-decode-assist)
-+ (isa-decode-assist (current-isa))
-+)
-+
-+;; Return boolean indicating if current isa conditionally executes all insn.
-+
-+(define (state-conditional-exec?)
-+ (isa-conditional-exec? (current-isa))
-+)
-+
-+;; Architecture or cpu wide values derived from other data.
-+
-+(define <derived-arch-data>
-+ (class-make '<derived-arch-data>
-+ nil
-+ '(
-+ ;; whether all insns can be recorded in a host int
-+ integral-insn?
-+
-+ ;; whether a large int is needed for insns
-+ large-insn-word?
-+ )
-+ nil)
-+)
-+
-+;; Called after the .cpu file has been read in to prime derived value
-+;; computation.
-+;; Often this data isn't needed so we only computed it if we have to.
-+;; The computation can require a single selected ISA; if we don't require
-+;; the data don't unnecessarily flag an error.
-+
-+(define (/adata-set-derived! arch)
-+ ;; Don't compute this data unless we need to.
-+ (arch-set-derived!
-+ arch
-+ (make <derived-arch-data>
-+ ;; integral-insn?
-+ (delay (isa-integral-insn? (current-isa)))
-+ ;; insn-word-bitsize
-+ (> (apply max (map isa-base-insn-bitsize (current-isa-list))) 32)
-+ ))
-+)
-+
-+;; Accessors.
-+
-+(define (adata-integral-insn? arch)
-+ (force (elm-xget (arch-derived arch) 'integral-insn?))
-+)
-+
-+(define (adata-large-insn-word? arch)
-+ (elm-xget (arch-derived arch) 'large-insn-word?)
-+)
-+
-+;; Instruction analysis control.
-+
-+;; The maximum number of virtual insns.
-+;; They can be recorded with negative ordinals, and multi-insns are currently
-+;; also recorded as negative numbers, so leave enough space.
-+(define MAX-VIRTUAL-INSNS 100)
-+
-+;; Subroutine of arch-analyze-insns! to simplify it.
-+;; Sanity check the instruction set.
-+
-+(define (/sanity-check-insns arch)
-+ (let ((insn-list (arch-insn-list arch)))
-+
-+ ;; Ensure instruction base values agree with their masks.
-+ ;; Errors can come from bad .cpu files, bugs, or both.
-+ ;; It's better to catch such errors early.
-+ ;; If it is an error in the .cpu file, we don't want to crash
-+ ;; on a Guile error.
-+
-+ (for-each
-+
-+ (lambda (insn)
-+
-+ (let ((base-len (insn-base-mask-length insn))
-+ (base-mask (insn-base-mask insn))
-+ (base-value (insn-base-value insn)))
-+ (if (not (= (cg-logand (cg-logxor base-mask (mask base-len))
-+ base-value)
-+ 0))
-+ (context-owner-error
-+ #f insn
-+ "While performing sanity checks"
-+ (string-append "Instruction has opcode bits outside of its mask.\n"
-+ "This usually means some kind of error in the instruction's ifield list.\n"
-+ "base mask: 0x" (number->hex base-mask)
-+ ", base value: 0x" (number->hex base-value)
-+ "\nfield list:"
-+ (string-map (lambda (f)
-+ (string-append " "
-+ (ifld-pretty-print f)))
-+ (insn-iflds insn))
-+ )))
-+
-+ ;; Insert more checks here.
-+
-+ ))
-+
-+ (non-multi-insns (non-alias-insns insn-list))))
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; Instantiate the multi-insns of ARCH (if there are any).
-+
-+(define (/instantiate-multi-insns! arch)
-+ ;; Skip if already done, we don't want to create duplicates.
-+
-+ (if (not (arch-multi-insns-instantiated? arch))
-+ (begin
-+
-+ (if (any-true? (map multi-insn? (arch-insn-list arch)))
-+
-+ (begin
-+ ;; Instantiate sub-insns of all multi-insns.
-+ (logit 1 "Instantiating multi-insns ...\n")
-+
-+ ;; FIXME: Hack to remove differences in generated code when we
-+ ;; switched to recording insns in hash tables.
-+ ;; Multi-insn got instantiated after the list of insns had been
-+ ;; reversed and they got added to the front of the list, in
-+ ;; reverse order. Blech!
-+ ;; Eventually remove this, have a flag day, and check in the
-+ ;; updated files.
-+ ;; NOTE: This causes major diffs to opcodes/m32c-*.[ch].
-+ (let ((orig-ord (arch-next-ordinal arch)))
-+ (arch-set-next-ordinal! arch (- MAX-VIRTUAL-INSNS))
-+ (for-each (lambda (insn)
-+ (multi-insn-instantiate! insn))
-+ (multi-insns (arch-insn-list arch)))
-+ (arch-set-next-ordinal! arch orig-ord))
-+
-+ (logit 1 "Done instantiating multi-insns.\n")
-+ ))
-+
-+ (arch-set-multi-insns-instantiated?! arch #t)
-+ ))
-+)
-+
-+;; Subroutine of arch-analyze-insns! to simplify it.
-+;; Canonicalize INSNS of ARCH.
-+
-+(define (/canonicalize-insns! arch insn-list)
-+ (logit 1 "Canonicalizing instruction semantics ...\n")
-+
-+ (for-each (lambda (insn)
-+ (cond ((insn-canonical-semantics insn)
-+ #t) ;; already done
-+ ((insn-semantics insn)
-+ (logit 2 "Canonicalizing semantics for " (obj:name insn) " ...\n")
-+ (let ((canon-sem
-+ (rtx-canonicalize
-+ (make-obj-context insn
-+ (string-append "canonicalizing semantics of "
-+ (obj:str-name insn)))
-+ 'VOID (obj-isa-list insn) nil
-+ (insn-semantics insn))))
-+ (insn-set-canonical-semantics! insn canon-sem)))
-+ (else
-+ (logit 2 "Skipping instruction " (obj:name insn) ", no semantics ...\n"))))
-+ insn-list)
-+
-+ (logit 1 "Done canonicalization.\n")
-+)
-+
-+;; Analyze the instruction set.
-+;; The name is explicitly vague because it's intended that all insn analysis
-+;; would be controlled here.
-+;; If the instruction set has already been sufficiently analyzed, do nothing.
-+;; INCLUDE-ALIASES? is #t if alias insns are to be included.
-+;; ANALYZE-SEMANTICS? is #t if insn semantics are to be analyzed.
-+;;
-+;; This is a very expensive operation, so we only do it as necessary.
-+;; There are (currently) two different kinds of users: assemblers and
-+;; simulators. Assembler style apps don't always need to analyze the semantics.
-+;; Simulator style apps don't want to include the alias insns.
-+
-+(define (arch-analyze-insns! arch include-aliases? analyze-semantics?)
-+ ;; Catch apps that haven't set word sizes yet.
-+ (mode-ensure-word-sizes-defined)
-+
-+ (if (or (not (arch-insns-analyzed? arch))
-+ (not (eq? analyze-semantics? (arch-semantics-analyzed? arch)))
-+ (not (eq? include-aliases? (arch-aliases-analyzed? arch))))
-+
-+ (begin
-+
-+ (/instantiate-multi-insns! arch)
-+
-+ (let ((insn-list (non-multi-insns
-+ (if include-aliases?
-+ (arch-insn-list arch)
-+ (non-alias-insns (arch-insn-list arch))))))
-+
-+ ;; Compile each insns semantics, traversers/evaluators require it.
-+ (/canonicalize-insns! arch insn-list)
-+
-+ ;; This is expensive so indicate start/finish.
-+ (logit 1 "Analyzing instruction set ...\n")
-+
-+ (let ((fmt-lists
-+ (ifmt-compute! insn-list
-+ analyze-semantics?)))
-+
-+ (arch-set-ifmt-list! arch (car fmt-lists))
-+ (arch-set-sfmt-list! arch (cadr fmt-lists))
-+ (arch-set-insns-analyzed?! arch #t)
-+ (arch-set-semantics-analyzed?! arch analyze-semantics?)
-+ (arch-set-aliases-analyzed?! arch include-aliases?)
-+
-+ ;; Now that the instruction formats are computed,
-+ ;; do some sanity checks.
-+ (logit 1 "Performing sanity checks ...\n")
-+ (/sanity-check-insns arch)
-+
-+ (logit 1 "Done analysis.\n")
-+ ))
-+ ))
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; Called before a .cpu file is read in.
-+
-+(define (arch-init!)
-+
-+ (reader-add-command! 'define-arch
-+ "\
-+Define an architecture, name/value pair list version.
-+"
-+ nil 'arg-list define-arch)
-+
-+ (reader-add-command! 'define-isa
-+ "\
-+Define an instruction set architecture, name/value pair list version.
-+"
-+ nil 'arg-list define-isa)
-+ (reader-add-command! 'modify-isa
-+ "\
-+Modify an isa, name/value pair list version.
-+"
-+ nil 'arg-list modify-isa)
-+
-+ (reader-add-command! 'define-cpu
-+ "\
-+Define a cpu family, name/value pair list version.
-+"
-+ nil 'arg-list define-cpu)
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; Called before a .cpu file is read in.
-+
-+(define (mach-init!)
-+ (let ((arch CURRENT-ARCH))
-+ (arch-set-ifld-table! arch (/make-ident-object-table 127))
-+ (arch-set-op-table! arch (/make-ident-object-table 127))
-+ (arch-set-insn-table! arch (/make-ident-object-table 509))
-+ (arch-set-minsn-table! arch (/make-ident-object-table 127))
-+ )
-+
-+ (reader-add-command! 'define-mach
-+ "\
-+Define a machine, name/value pair list version.
-+"
-+ nil 'arg-list define-mach)
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; Called after .cpu file is read in.
-+
-+(define (arch-finish!)
-+ (let ((arch CURRENT-ARCH))
-+
-+ ;; Lists are constructed in the reverse order they appear in the file
-+ ;; [for simplicity and efficiency]. Restore them to file order for the
-+ ;; human reader/debugger.
-+ ;; We don't need to do this for ifld, op, insn, minsn lists because
-+ ;; they are handled differently.
-+ (arch-set-enum-list! arch (reverse (arch-enum-list arch)))
-+ (arch-set-kw-list! arch (reverse (arch-kw-list arch)))
-+ (arch-set-isa-list! arch (reverse (arch-isa-list arch)))
-+ (arch-set-cpu-list! arch (reverse (arch-cpu-list arch)))
-+ (arch-set-mach-list! arch (reverse (arch-mach-list arch)))
-+ (arch-set-model-list! arch (reverse (arch-model-list arch)))
-+ (arch-set-hw-list! arch (reverse (arch-hw-list arch)))
-+ (arch-set-subr-list! arch (reverse (arch-subr-list arch)))
-+ )
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; Called after .cpu file is read in.
-+
-+(define (mach-finish!)
-+ (/adata-set-derived! CURRENT-ARCH)
-+
-+ *UNSPECIFIED*
-+)
-diff -Nur binutils-2.24.orig/cgen/Makefile.am binutils-2.24/cgen/Makefile.am
---- binutils-2.24.orig/cgen/Makefile.am 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/Makefile.am 2016-06-30 21:26:12.661893424 +0200
-@@ -0,0 +1,165 @@
-+# Process this file with "automake --cygnus Makefile" to generate Makefile.in
-+
-+AUTOMAKE_OPTIONS = cygnus
-+
-+SUBDIRS = doc
-+
-+GUILE = "`if test -f ../guile/libguile/guile ; then echo ../guile/libguile/guile; else echo guile ; fi` -l guile -s"
-+CGENFLAGS = -v
-+ARCH = @arch@
-+ARCHFILE = $(srcroot)/../cpu/$(ARCH).cpu
-+
-+# for various utility rules
-+MACHS = all
-+ISAS = all
-+
-+# for the html rule
-+INSN_FILE_NAME = $(ARCH)-insn.html
-+
-+srcroot = $(srcdir)/..
-+
-+# Applications depend on stamp-cgen to tell them when .scm files have
-+# been changed (so files need to be regenerated).
-+# ??? Application specific files are kept with cgen for now, but may
-+# eventually go with the app. stamp-cgen might still be useful to track
-+# app-independent files.
-+
-+all-local: stamp-cgen
-+
-+stamp-cgen: $(CGENFILES)
-+ rm -f stamp-cgen
-+ echo timestamp > stamp-cgen
-+
-+# Phony targets to run each of the applications,
-+# though most of these are for development purposes only.
-+# When actually building the toolchain, the Makefile in the appropriate
-+# directory will run cgen.
-+#
-+# NOTE: If running for a cpu other than the configured one you may wish to
-+# override ISAS and MACHS.
-+
-+# Build the basic description support.
-+# We just stuff them in tmp-* files.
-+# Usage: make desc [ARCHFILE=<arch-file>] OPTIONS="<option list>"
-+
-+.PHONY: desc
-+# FIXME: needs more dependencies
-+desc: desc.scm
-+ rm -f tmp-desc.h tmp-desc.c tmp-opinst.c
-+ $(GUILE) $(srcdir)/cgen-opc.scm \
-+ -s $(srcdir) \
-+ $(CGENFLAGS) \
-+ -f "$(OPTIONS)" \
-+ -a $(ARCHFILE) \
-+ -i "$(ISAS)" \
-+ -m "$(MACHS)" \
-+ -H tmp-desc.h -C tmp-desc.c
-+
-+# Build the machine generated cpu documentation.
-+# Usage: make html [ARCH=<arch>] [ARCHFILE=<arch-file>]
-+.PHONY: html
-+html: desc.scm html.scm cgen-doc.scm
-+ rm -f tmp-doc.html
-+ $(GUILE) $(srcdir)/cgen-doc.scm \
-+ -s $(srcdir) \
-+ $(CGENFLAGS) \
-+ -f "$(OPTIONS)" \
-+ -a $(ARCHFILE) \
-+ -i "$(ISAS)" \
-+ -m "$(MACHS)" \
-+ -N $(INSN_FILE_NAME) \
-+ -H tmp.html \
-+ -I tmp-insn.html
-+ $(SHELL) $(srcroot)/move-if-change tmp.html $(ARCH).html
-+ $(SHELL) $(srcroot)/move-if-change tmp-insn.html $(ARCH)-insn.html
-+
-+# Build the opcodes files.
-+# We just stuff them in tmp-* files.
-+# Usage: make opcodes [ARCHFILE=<arch-file>] OPTIONS="<option list>"
-+
-+.PHONY: opcodes
-+# FIXME: needs more dependencies
-+opcodes: opcodes.scm
-+ rm -f tmp-opc.h tmp-itab.c
-+ rm -f tmp-asm.in tmp-dis.in tmp-ibld.h tmp-ibld.in
-+ $(GUILE) $(srcdir)/cgen-opc.scm \
-+ -s $(srcdir) \
-+ $(CGENFLAGS) \
-+ -f "$(OPTIONS) opinst" \
-+ -a $(ARCHFILE) \
-+ -i "$(ISAS)" \
-+ -m "$(MACHS)" \
-+ -O tmp-opc.h -P tmp-opc.c -Q tmp-opinst.c \
-+ -B tmp-ibld.h -L tmp-ibld.in \
-+ -A tmp-asm.in -D tmp-dis.in
-+
-+# Build the simulator files.
-+# We just stuff them in tmp-* files.
-+# Usage: make sim-arch [ARCHFILE=<arch-file>] OPTIONS="<option list>"
-+# make sim-cpu [ARCHFILE=<arch-file>] ISAS="<isa>" MACHS="<mach list>" \
-+# OPTIONS="<option list>"
-+
-+.PHONY: sim-arch sim-cpu
-+# FIXME: needs more dependencies
-+sim-arch: sim.scm
-+ rm -f tmp-arch.h tmp-arch.c tmp-cpuall.h
-+ $(GUILE) $(srcdir)/cgen-sim.scm \
-+ -s $(srcdir) \
-+ $(CGENFLAGS) \
-+ -f "$(OPTIONS)" \
-+ -a $(ARCHFILE) \
-+ -i "$(ISAS)" \
-+ -m "$(MACHS)" \
-+ -A tmp-arch.h -B tmp-arch.c -N tmp-cpuall.h
-+sim-cpu: sim.scm
-+ rm -f tmp-cpu.h tmp-cpu.c tmp-decode.h tmp-decode.c
-+ rm -f tmp-model.c tmp-sem.c tmp-sem-switch.c
-+ $(GUILE) $(srcdir)/cgen-sim.scm \
-+ -s $(srcdir) \
-+ $(CGENFLAGS) \
-+ -f "$(OPTIONS)" \
-+ -a $(ARCHFILE) \
-+ -i "$(ISAS)" \
-+ -m "$(MACHS)" \
-+ -C tmp-cpu.h -U tmp-cpu.c \
-+ -T tmp-decode.h -D tmp-decode.c \
-+ -M tmp-model.c \
-+ -S tmp-semantics.c -X tmp-sem-switch.c
-+
-+# Build GAS testcase generator.
-+# Usage: make gas-test [ARCHFILE=<arch-file>]
-+
-+.PHONY: gas-test
-+gas-test: gas-test.scm cgen-gas.scm
-+ @if test -z "$(ISAS)" ; then \
-+ echo "ISAS not specified!" ;\
-+ exit 1 ;\
-+ fi
-+ $(GUILE) $(srcdir)/cgen-gas.scm \
-+ -s $(srcdir) \
-+ $(CGENFLAGS) \
-+ -a $(ARCHFILE) \
-+ -i "$(ISAS)" \
-+ -m "$(MACHS)" \
-+ -B gas-build.sh \
-+ -E gas-allinsn.exp
-+
-+# Build simulator testcase generator.
-+# Usage: make sim-test [ARCHFILE=<arch-file>]
-+
-+.PHONY: sim-test
-+sim-test: sim-test.scm cgen-stest.scm
-+ @if test -z "$(ISAS)" ; then \
-+ echo "ISAS not specified!" ;\
-+ exit 1 ;\
-+ fi
-+ $(GUILE) $(srcdir)/cgen-stest.scm \
-+ -s $(srcdir) \
-+ $(CGENFLAGS) \
-+ -a $(ARCHFILE) \
-+ -i "$(ISAS)" \
-+ -m "$(MACHS)" \
-+ -B sim-build.sh \
-+ -E sim-allinsn.exp
-+
-+CLEANFILES = tmp-*
-diff -Nur binutils-2.24.orig/cgen/Makefile.in binutils-2.24/cgen/Makefile.in
---- binutils-2.24.orig/cgen/Makefile.in 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/Makefile.in 2016-06-30 21:26:12.661893424 +0200
-@@ -0,0 +1,490 @@
-+# Makefile.in generated automatically by automake 1.4-p6 from Makefile.am
-+
-+# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
-+# This Makefile.in is free software; the Free Software Foundation
-+# gives unlimited permission to copy and/or distribute it,
-+# with or without modifications, as long as this notice is preserved.
-+
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
-+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
-+# PARTICULAR PURPOSE.
-+
-+# Process this file with "automake --cygnus Makefile" to generate Makefile.in
-+
-+
-+SHELL = @SHELL@
-+
-+srcdir = @srcdir@
-+top_srcdir = @top_srcdir@
-+VPATH = @srcdir@
-+prefix = @prefix@
-+exec_prefix = @exec_prefix@
-+
-+bindir = @bindir@
-+sbindir = @sbindir@
-+libexecdir = @libexecdir@
-+datadir = @datadir@
-+sysconfdir = @sysconfdir@
-+sharedstatedir = @sharedstatedir@
-+localstatedir = @localstatedir@
-+libdir = @libdir@
-+infodir = @infodir@
-+mandir = @mandir@
-+includedir = @includedir@
-+oldincludedir = /usr/include
-+
-+DESTDIR =
-+
-+pkgdatadir = $(datadir)/@PACKAGE@
-+pkglibdir = $(libdir)/@PACKAGE@
-+pkgincludedir = $(includedir)/@PACKAGE@
-+
-+top_builddir = .
-+
-+ACLOCAL = @ACLOCAL@
-+AUTOCONF = @AUTOCONF@
-+AUTOMAKE = @AUTOMAKE@
-+AUTOHEADER = @AUTOHEADER@
-+
-+INSTALL = @INSTALL@
-+INSTALL_PROGRAM = @INSTALL_PROGRAM@ $(AM_INSTALL_PROGRAM_FLAGS)
-+INSTALL_DATA = @INSTALL_DATA@
-+INSTALL_SCRIPT = @INSTALL_SCRIPT@
-+transform = @program_transform_name@
-+
-+NORMAL_INSTALL = :
-+PRE_INSTALL = :
-+POST_INSTALL = :
-+NORMAL_UNINSTALL = :
-+PRE_UNINSTALL = :
-+POST_UNINSTALL = :
-+build_alias = @build_alias@
-+build_triplet = @build@
-+host_alias = @host_alias@
-+host_triplet = @host@
-+target_alias = @target_alias@
-+target_triplet = @target@
-+EXEEXT = @EXEEXT@
-+MAINT = @MAINT@
-+MAKEINFO = @MAKEINFO@
-+PACKAGE = @PACKAGE@
-+VERSION = @VERSION@
-+arch = @arch@
-+
-+AUTOMAKE_OPTIONS = cygnus
-+
-+SUBDIRS = doc
-+
-+GUILE = "`if test -f ../guile/libguile/guile ; then echo ../guile/libguile/guile; else echo guile ; fi` -l guile -s"
-+CGENFLAGS = -v
-+ARCH = @arch@
-+ARCHFILE = $(srcroot)/../cpu/$(ARCH).cpu
-+
-+# for various utility rules
-+MACHS = all
-+ISAS = all
-+
-+# for the html rule
-+INSN_FILE_NAME = $(ARCH)-insn.html
-+
-+srcroot = $(srcdir)/..
-+
-+CLEANFILES = tmp-*
-+ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
-+mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs
-+CONFIG_CLEAN_FILES =
-+DIST_COMMON = README AUTHORS ChangeLog INSTALL Makefile.am Makefile.in \
-+NEWS aclocal.m4 configure configure.in
-+
-+
-+DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST)
-+
-+TAR = gtar
-+GZIP_ENV = --best
-+all: all-redirect
-+.SUFFIXES:
-+$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ Makefile.am $(top_srcdir)/configure.in $(ACLOCAL_M4)
-+ cd $(top_srcdir) && $(AUTOMAKE) --cygnus Makefile
-+
-+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
-+ cd $(top_builddir) \
-+ && CONFIG_FILES=$@ CONFIG_HEADERS= $(SHELL) ./config.status
-+
-+$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ configure.in
-+ cd $(srcdir) && $(ACLOCAL)
-+
-+config.status: $(srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
-+ $(SHELL) ./config.status --recheck
-+$(srcdir)/configure: @MAINTAINER_MODE_TRUE@$(srcdir)/configure.in $(ACLOCAL_M4) $(CONFIGURE_DEPENDENCIES)
-+ cd $(srcdir) && $(AUTOCONF)
-+
-+# This directory's subdirectories are mostly independent; you can cd
-+# into them and run `make' without going through this Makefile.
-+# To change the values of `make' variables: instead of editing Makefiles,
-+# (1) if the variable is set in `config.status', edit `config.status'
-+# (which will cause the Makefiles to be regenerated when you run `make');
-+# (2) otherwise, pass the desired values on the `make' command line.
-+
-+@SET_MAKE@
-+
-+all-recursive install-data-recursive install-exec-recursive \
-+installdirs-recursive install-recursive uninstall-recursive install-info-recursive \
-+check-recursive installcheck-recursive info-recursive dvi-recursive:
-+ @set fnord $$MAKEFLAGS; amf=$$2; \
-+ dot_seen=no; \
-+ target=`echo $@ | sed s/-recursive//`; \
-+ list='$(SUBDIRS)'; for subdir in $$list; do \
-+ echo "Making $$target in $$subdir"; \
-+ if test "$$subdir" = "."; then \
-+ dot_seen=yes; \
-+ local_target="$$target-am"; \
-+ else \
-+ local_target="$$target"; \
-+ fi; \
-+ (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
-+ || case "$$amf" in *=*) exit 1;; *k*) fail=yes;; *) exit 1;; esac; \
-+ done; \
-+ if test "$$dot_seen" = "no"; then \
-+ $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
-+ fi; test -z "$$fail"
-+
-+mostlyclean-recursive clean-recursive distclean-recursive \
-+maintainer-clean-recursive:
-+ @set fnord $$MAKEFLAGS; amf=$$2; \
-+ dot_seen=no; \
-+ rev=''; list='$(SUBDIRS)'; for subdir in $$list; do \
-+ rev="$$subdir $$rev"; \
-+ test "$$subdir" != "." || dot_seen=yes; \
-+ done; \
-+ test "$$dot_seen" = "no" && rev=". $$rev"; \
-+ target=`echo $@ | sed s/-recursive//`; \
-+ for subdir in $$rev; do \
-+ echo "Making $$target in $$subdir"; \
-+ if test "$$subdir" = "."; then \
-+ local_target="$$target-am"; \
-+ else \
-+ local_target="$$target"; \
-+ fi; \
-+ (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
-+ || case "$$amf" in *=*) exit 1;; *k*) fail=yes;; *) exit 1;; esac; \
-+ done && test -z "$$fail"
-+tags-recursive:
-+ list='$(SUBDIRS)'; for subdir in $$list; do \
-+ test "$$subdir" = . || (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) tags); \
-+ done
-+
-+tags: TAGS
-+
-+ID: $(HEADERS) $(SOURCES) $(LISP)
-+ list='$(SOURCES) $(HEADERS)'; \
-+ unique=`for i in $$list; do echo $$i; done | \
-+ awk ' { files[$$0] = 1; } \
-+ END { for (i in files) print i; }'`; \
-+ here=`pwd` && cd $(srcdir) \
-+ && mkid -f$$here/ID $$unique $(LISP)
-+
-+TAGS: tags-recursive $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) $(LISP)
-+ tags=; \
-+ here=`pwd`; \
-+ list='$(SUBDIRS)'; for subdir in $$list; do \
-+ if test "$$subdir" = .; then :; else \
-+ test -f $$subdir/TAGS && tags="$$tags -i $$here/$$subdir/TAGS"; \
-+ fi; \
-+ done; \
-+ list='$(SOURCES) $(HEADERS)'; \
-+ unique=`for i in $$list; do echo $$i; done | \
-+ awk ' { files[$$0] = 1; } \
-+ END { for (i in files) print i; }'`; \
-+ test -z "$(ETAGS_ARGS)$$unique$(LISP)$$tags" \
-+ || (cd $(srcdir) && etags $(ETAGS_ARGS) $$tags $$unique $(LISP) -o $$here/TAGS)
-+
-+mostlyclean-tags:
-+
-+clean-tags:
-+
-+distclean-tags:
-+ -rm -f TAGS ID
-+
-+maintainer-clean-tags:
-+
-+distdir = $(PACKAGE)-$(VERSION)
-+top_distdir = $(distdir)
-+
-+# This target untars the dist file and tries a VPATH configuration. Then
-+# it guarantees that the distribution is self-contained by making another
-+# tarfile.
-+distcheck: dist
-+ -rm -rf $(distdir)
-+ GZIP=$(GZIP_ENV) $(TAR) zxf $(distdir).tar.gz
-+ mkdir $(distdir)/=build
-+ mkdir $(distdir)/=inst
-+ dc_install_base=`cd $(distdir)/=inst && pwd`; \
-+ cd $(distdir)/=build \
-+ && ../configure --srcdir=.. --prefix=$$dc_install_base \
-+ && $(MAKE) $(AM_MAKEFLAGS) \
-+ && $(MAKE) $(AM_MAKEFLAGS) dvi \
-+ && $(MAKE) $(AM_MAKEFLAGS) check \
-+ && $(MAKE) $(AM_MAKEFLAGS) install \
-+ && $(MAKE) $(AM_MAKEFLAGS) installcheck \
-+ && $(MAKE) $(AM_MAKEFLAGS) dist
-+ -rm -rf $(distdir)
-+ @banner="$(distdir).tar.gz is ready for distribution"; \
-+ dashes=`echo "$$banner" | sed s/./=/g`; \
-+ echo "$$dashes"; \
-+ echo "$$banner"; \
-+ echo "$$dashes"
-+dist: distdir
-+ -chmod -R a+r $(distdir)
-+ GZIP=$(GZIP_ENV) $(TAR) chozf $(distdir).tar.gz $(distdir)
-+ -rm -rf $(distdir)
-+dist-all: distdir
-+ -chmod -R a+r $(distdir)
-+ GZIP=$(GZIP_ENV) $(TAR) chozf $(distdir).tar.gz $(distdir)
-+ -rm -rf $(distdir)
-+distdir: $(DISTFILES)
-+ -rm -rf $(distdir)
-+ mkdir $(distdir)
-+ -chmod 777 $(distdir)
-+ @for file in $(DISTFILES); do \
-+ if test -f $$file; then d=.; else d=$(srcdir); fi; \
-+ if test -d $$d/$$file; then \
-+ cp -pr $$d/$$file $(distdir)/$$file; \
-+ else \
-+ test -f $(distdir)/$$file \
-+ || ln $$d/$$file $(distdir)/$$file 2> /dev/null \
-+ || cp -p $$d/$$file $(distdir)/$$file || :; \
-+ fi; \
-+ done
-+ for subdir in $(SUBDIRS); do \
-+ if test "$$subdir" = .; then :; else \
-+ test -d $(distdir)/$$subdir \
-+ || mkdir $(distdir)/$$subdir \
-+ || exit 1; \
-+ chmod 777 $(distdir)/$$subdir; \
-+ (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) top_distdir=../$(distdir) distdir=../$(distdir)/$$subdir distdir) \
-+ || exit 1; \
-+ fi; \
-+ done
-+info-am:
-+info: info-recursive
-+dvi-am:
-+dvi: dvi-recursive
-+check-am:
-+check: check-recursive
-+installcheck-am:
-+installcheck: installcheck-recursive
-+install-info-am:
-+install-info: install-info-recursive
-+install-exec-am:
-+install-exec: install-exec-recursive
-+
-+install-data-am:
-+install-data: install-data-recursive
-+
-+install-am: all-am
-+ @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
-+install: install-recursive
-+uninstall-am:
-+uninstall: uninstall-recursive
-+all-am: Makefile all-local
-+all-redirect: all-recursive
-+install-strip:
-+ $(MAKE) $(AM_MAKEFLAGS) AM_INSTALL_PROGRAM_FLAGS=-s install
-+installdirs: installdirs-recursive
-+installdirs-am:
-+
-+
-+mostlyclean-generic:
-+
-+clean-generic:
-+ -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES)
-+
-+distclean-generic:
-+ -rm -f Makefile $(CONFIG_CLEAN_FILES)
-+ -rm -f config.cache config.log stamp-h stamp-h[0-9]*
-+
-+maintainer-clean-generic:
-+mostlyclean-am: mostlyclean-tags mostlyclean-generic
-+
-+mostlyclean: mostlyclean-recursive
-+
-+clean-am: clean-tags clean-generic mostlyclean-am
-+
-+clean: clean-recursive
-+
-+distclean-am: distclean-tags distclean-generic clean-am
-+
-+distclean: distclean-recursive
-+ -rm -f config.status
-+
-+maintainer-clean-am: maintainer-clean-tags maintainer-clean-generic \
-+ distclean-am
-+ @echo "This command is intended for maintainers to use;"
-+ @echo "it deletes files that may require special tools to rebuild."
-+
-+maintainer-clean: maintainer-clean-recursive
-+ -rm -f config.status
-+
-+.PHONY: install-data-recursive uninstall-data-recursive \
-+install-exec-recursive uninstall-exec-recursive installdirs-recursive \
-+uninstalldirs-recursive all-recursive check-recursive \
-+installcheck-recursive info-recursive dvi-recursive \
-+mostlyclean-recursive distclean-recursive clean-recursive \
-+maintainer-clean-recursive tags tags-recursive mostlyclean-tags \
-+distclean-tags clean-tags maintainer-clean-tags distdir info-am info \
-+dvi-am dvi check check-am installcheck-am installcheck install-info-am \
-+install-info install-exec-am install-exec install-data-am install-data \
-+install-am install uninstall-am uninstall all-local all-redirect all-am \
-+all installdirs-am installdirs mostlyclean-generic distclean-generic \
-+clean-generic maintainer-clean-generic clean mostlyclean distclean \
-+maintainer-clean
-+
-+
-+# Applications depend on stamp-cgen to tell them when .scm files have
-+# been changed (so files need to be regenerated).
-+# ??? Application specific files are kept with cgen for now, but may
-+# eventually go with the app. stamp-cgen might still be useful to track
-+# app-independent files.
-+
-+all-local: stamp-cgen
-+
-+stamp-cgen: $(CGENFILES)
-+ rm -f stamp-cgen
-+ echo timestamp > stamp-cgen
-+
-+# Phony targets to run each of the applications,
-+# though most of these are for development purposes only.
-+# When actually building the toolchain, the Makefile in the appropriate
-+# directory will run cgen.
-+#
-+# NOTE: If running for a cpu other than the configured one you may wish to
-+# override ISAS and MACHS.
-+
-+# Build the basic description support.
-+# We just stuff them in tmp-* files.
-+# Usage: make desc [ARCHFILE=<arch-file>] OPTIONS="<option list>"
-+
-+.PHONY: desc
-+# FIXME: needs more dependencies
-+desc: desc.scm
-+ rm -f tmp-desc.h tmp-desc.c tmp-opinst.c
-+ $(GUILE) $(srcdir)/cgen-opc.scm \
-+ -s $(srcdir) \
-+ $(CGENFLAGS) \
-+ -f "$(OPTIONS)" \
-+ -a $(ARCHFILE) \
-+ -i "$(ISAS)" \
-+ -m "$(MACHS)" \
-+ -H tmp-desc.h -C tmp-desc.c
-+
-+# Build the machine generated cpu documentation.
-+# Usage: make html [ARCH=<arch>] [ARCHFILE=<arch-file>]
-+.PHONY: html
-+html: desc.scm html.scm cgen-doc.scm
-+ rm -f tmp-doc.html
-+ $(GUILE) $(srcdir)/cgen-doc.scm \
-+ -s $(srcdir) \
-+ $(CGENFLAGS) \
-+ -f "$(OPTIONS)" \
-+ -a $(ARCHFILE) \
-+ -i "$(ISAS)" \
-+ -m "$(MACHS)" \
-+ -N $(INSN_FILE_NAME) \
-+ -H tmp.html \
-+ -I tmp-insn.html
-+ $(SHELL) $(srcroot)/move-if-change tmp.html $(ARCH).html
-+ $(SHELL) $(srcroot)/move-if-change tmp-insn.html $(ARCH)-insn.html
-+
-+# Build the opcodes files.
-+# We just stuff them in tmp-* files.
-+# Usage: make opcodes [ARCHFILE=<arch-file>] OPTIONS="<option list>"
-+
-+.PHONY: opcodes
-+# FIXME: needs more dependencies
-+opcodes: opcodes.scm
-+ rm -f tmp-opc.h tmp-itab.c
-+ rm -f tmp-asm.in tmp-dis.in tmp-ibld.h tmp-ibld.in
-+ $(GUILE) $(srcdir)/cgen-opc.scm \
-+ -s $(srcdir) \
-+ $(CGENFLAGS) \
-+ -f "$(OPTIONS) opinst" \
-+ -a $(ARCHFILE) \
-+ -i "$(ISAS)" \
-+ -m "$(MACHS)" \
-+ -O tmp-opc.h -P tmp-opc.c -Q tmp-opinst.c \
-+ -B tmp-ibld.h -L tmp-ibld.in \
-+ -A tmp-asm.in -D tmp-dis.in
-+
-+# Build the simulator files.
-+# We just stuff them in tmp-* files.
-+# Usage: make sim-arch [ARCHFILE=<arch-file>] OPTIONS="<option list>"
-+# make sim-cpu [ARCHFILE=<arch-file>] ISAS="<isa>" MACHS="<mach list>" \
-+# OPTIONS="<option list>"
-+
-+.PHONY: sim-arch sim-cpu
-+# FIXME: needs more dependencies
-+sim-arch: sim.scm
-+ rm -f tmp-arch.h tmp-arch.c tmp-cpuall.h
-+ $(GUILE) $(srcdir)/cgen-sim.scm \
-+ -s $(srcdir) \
-+ $(CGENFLAGS) \
-+ -f "$(OPTIONS)" \
-+ -a $(ARCHFILE) \
-+ -i "$(ISAS)" \
-+ -m "$(MACHS)" \
-+ -A tmp-arch.h -B tmp-arch.c -N tmp-cpuall.h
-+sim-cpu: sim.scm
-+ rm -f tmp-cpu.h tmp-cpu.c tmp-decode.h tmp-decode.c
-+ rm -f tmp-model.c tmp-sem.c tmp-sem-switch.c
-+ $(GUILE) $(srcdir)/cgen-sim.scm \
-+ -s $(srcdir) \
-+ $(CGENFLAGS) \
-+ -f "$(OPTIONS)" \
-+ -a $(ARCHFILE) \
-+ -i "$(ISAS)" \
-+ -m "$(MACHS)" \
-+ -C tmp-cpu.h -U tmp-cpu.c \
-+ -T tmp-decode.h -D tmp-decode.c \
-+ -M tmp-model.c \
-+ -S tmp-semantics.c -X tmp-sem-switch.c
-+
-+# Build GAS testcase generator.
-+# Usage: make gas-test [ARCHFILE=<arch-file>]
-+
-+.PHONY: gas-test
-+gas-test: gas-test.scm cgen-gas.scm
-+ @if test -z "$(ISAS)" ; then \
-+ echo "ISAS not specified!" ;\
-+ exit 1 ;\
-+ fi
-+ $(GUILE) $(srcdir)/cgen-gas.scm \
-+ -s $(srcdir) \
-+ $(CGENFLAGS) \
-+ -a $(ARCHFILE) \
-+ -i "$(ISAS)" \
-+ -m "$(MACHS)" \
-+ -B gas-build.sh \
-+ -E gas-allinsn.exp
-+
-+# Build simulator testcase generator.
-+# Usage: make sim-test [ARCHFILE=<arch-file>]
-+
-+.PHONY: sim-test
-+sim-test: sim-test.scm cgen-stest.scm
-+ @if test -z "$(ISAS)" ; then \
-+ echo "ISAS not specified!" ;\
-+ exit 1 ;\
-+ fi
-+ $(GUILE) $(srcdir)/cgen-stest.scm \
-+ -s $(srcdir) \
-+ $(CGENFLAGS) \
-+ -a $(ARCHFILE) \
-+ -i "$(ISAS)" \
-+ -m "$(MACHS)" \
-+ -B sim-build.sh \
-+ -E sim-allinsn.exp
-+
-+# Tell versions [3.59,3.63) of GNU make to not export all variables.
-+# Otherwise a system limit (for SysV at least) may be exceeded.
-+.NOEXPORT:
-diff -Nur binutils-2.24.orig/cgen/minsn.scm binutils-2.24/cgen/minsn.scm
---- binutils-2.24.orig/cgen/minsn.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/minsn.scm 2016-06-30 21:26:12.661893424 +0200
-@@ -0,0 +1,271 @@
-+; Macro instruction definitions.
-+; Copyright (C) 2000, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; Expansion:
-+; If the macro expands to a string, arguments in the input string
-+; are refered to with %N. Multiple insns are separated with '\n'.
-+; String expansion is a special case of the normal form which is a Scheme
-+; expression that controls the expansion. The Scheme expression will be able
-+; to refer to the current assembly state to decide how to perform the
-+; expansion. Special expression `emit' is used to call the assembler emitter
-+; for a particular insn. Special expression `expand' is used to return a
-+; string to be reparsed (which is special cased).
-+
-+; Parse a list of macro-instruction expansion descriptions.
-+; This is the main routine for building an minsn-expansion object from a
-+; description in the .cpu file.
-+; All arguments are in raw (non-evaluated) form.
-+
-+; ??? At present we only support macros that are aliases of one real insn.
-+
-+; Object to describe a macro-insn.
-+
-+(define <macro-insn>
-+ (class-make '<macro-insn>
-+ '(<source-ident>)
-+ '(
-+ ; syntax of the macro
-+ syntax
-+ ; list of expansion expressions
-+ expansions
-+ )
-+ nil)
-+)
-+
-+(method-make-make! <macro-insn>
-+ '(location name comment attrs syntax expansions))
-+
-+; Accessor fns
-+
-+(define minsn-syntax (elm-make-getter <macro-insn> 'syntax))
-+(define minsn-expansions (elm-make-getter <macro-insn> 'expansions))
-+
-+; Return a list of the machs that support MINSN.
-+
-+(define (minsn-machs minsn)
-+ nil
-+)
-+
-+; Return macro-instruction mnemonic.
-+; This is computed from the syntax string.
-+
-+(define minsn-mnemonic insn-mnemonic)
-+
-+; Return enum cgen_minsn_types value for MINSN.
-+
-+(define (minsn-enum minsn)
-+ (string-upcase (string-append "@ARCH@_MINSN_" (gen-sym minsn)))
-+)
-+
-+; Parse a macro-insn expansion description.
-+; ??? At present we only support unconditional simple expansion.
-+
-+(define (/minsn-parse-expansion context expn)
-+ (if (not (form? expn))
-+ (parse-error context "invalid macro expansion" expn))
-+ (if (not (eq? 'emit (car expn)))
-+ (parse-error context "invalid macro expansion, must be `(emit ...)'" expn))
-+ expn
-+)
-+
-+; Parse a macro-instruction description.
-+; This is the main routine for building a macro-insn object from a
-+; description in the .cpu file.
-+; All arguments are in raw (non-evaluated) form.
-+; The result is the parsed object or #f if object isn't for selected mach(s).
-+
-+(define (/minsn-parse context name comment attrs syntax expansions)
-+ (logit 2 "Processing macro-insn " name " ...\n")
-+
-+ (if (not (list? expansions))
-+ (parse-error context "invalid macro expansion list" expansions))
-+
-+ ;; Pick out name first to augment the error context.
-+ (let* ((name (parse-name context name))
-+ (context (context-append-name context name))
-+ (atlist-obj (atlist-parse context attrs "cgen_minsn")))
-+
-+ (if (keep-atlist? atlist-obj #f)
-+
-+ (let ((result (make <macro-insn>
-+ (context-location context)
-+ name
-+ (parse-comment context comment)
-+ atlist-obj
-+ (parse-syntax context syntax)
-+ (map (lambda (e) (/minsn-parse-expansion context e))
-+ expansions))))
-+ result)
-+
-+ (begin
-+ (logit 2 "Ignoring " name ".\n")
-+ #f)))
-+)
-+
-+; Read a macro-insn description
-+; This is the main routine for analyzing macro-insns in the .cpu file.
-+; CONTEXT is a <context> object for error messages.
-+; ARG-LIST is an associative list of field name and field value.
-+; /minsn-parse is invoked to create the `macro-insn' object.
-+
-+(define (/minsn-read context . arg-list)
-+ (let (
-+ (name nil)
-+ (comment "")
-+ (attrs nil)
-+ (syntax "")
-+ (expansions nil)
-+ )
-+
-+ ; Loop over each element in ARG-LIST, recording what's found.
-+ (let loop ((arg-list arg-list))
-+ (if (null? arg-list)
-+ nil
-+ (let ((arg (car arg-list))
-+ (elm-name (caar arg-list)))
-+ (case elm-name
-+ ((name) (set! name (cadr arg)))
-+ ((comment) (set! comment (cadr arg)))
-+ ((attrs) (set! attrs (cdr arg)))
-+ ((syntax) (set! syntax (cadr arg)))
-+ ((expansions) (set! expansions (cdr arg)))
-+ (else (parse-error context "invalid macro-insn arg" arg)))
-+ (loop (cdr arg-list)))))
-+
-+ ; Now that we've identified the elements, build the object.
-+ (/minsn-parse context name comment attrs syntax expansions))
-+)
-+
-+; Define a macro-insn object, name/value pair list version.
-+
-+(define define-minsn
-+ (lambda arg-list
-+ (if (eq? APPLICATION 'SIMULATOR)
-+ #f ; don't waste time if simulator
-+ (let ((m (apply /minsn-read (cons (make-current-context "define-minsn")
-+ arg-list))))
-+ (if m
-+ (current-minsn-add! m))
-+ m)))
-+)
-+
-+; Define a macro-insn object, all arguments specified.
-+; This only supports one expansion.
-+; Use define-minsn for the general case (??? which is of course not implemented
-+; yet :-).
-+
-+(define (define-full-minsn name comment attrs syntax expansion)
-+ (if (eq? APPLICATION 'SIMULATOR)
-+ #f ; don't waste time if simulator
-+ (let ((m (/minsn-parse (make-current-context "define-full-minsn")
-+ name comment
-+ (cons 'ALIAS attrs)
-+ syntax (list expansion))))
-+ (if m
-+ (current-minsn-add! m))
-+ m))
-+)
-+
-+; Compute the ifield list for an alias macro-insn.
-+; This involves making a copy of REAL-INSN's ifield list and assigning
-+; known quantities to operands that have fixed values in the macro-insn.
-+
-+(define (/minsn-compute-iflds context minsn-iflds real-insn)
-+ (let* ((iflds (list-copy (insn-iflds real-insn)))
-+ ; List of "free variables", i.e. operands.
-+ (ifld-ops (find ifld-operand? iflds))
-+ ; Names of fields in `ifld-ops'. As elements of minsn-iflds are
-+ ; parsed the associated element in ifld-names is deleted. At the
-+ ; end ifld-names must be empty. delq! can't delete the first
-+ ; element in a list, so we insert a fencepost.
-+ (ifld-names (cons #f (map obj:name ifld-ops)))
-+ (isa-name-list (obj-isa-list real-insn)))
-+ ;(logit 3 "Computing ifld list, operand field names: " ifld-names "\n")
-+ ; For each macro-insn ifield expression, look it up in the real insn's
-+ ; ifield list. If an operand without a prespecified value, leave
-+ ; unchanged. If an operand or ifield with a value, assign the value to
-+ ; the ifield entry.
-+ (for-each (lambda (f)
-+ (let* ((op-name (if (pair? f) (car f) f))
-+ (op-obj (current-op-lookup op-name isa-name-list))
-+ ; If `op-name' is an operand, use its ifield.
-+ ; Otherwise `op-name' must be an ifield name.
-+ (f-name (if op-obj
-+ (obj:name (hw-index:value (op:index op-obj)))
-+ op-name))
-+ (ifld-pair (object-memq f-name iflds)))
-+ ;(logit 3 "Processing ifield " f-name " ...\n")
-+ (if (not ifld-pair)
-+ (parse-error context "unknown operand" f))
-+ ; Ensure `f' is an operand.
-+ (if (not (memq f-name ifld-names))
-+ (parse-error context "not an operand" f))
-+ (if (pair? f)
-+ (set-car! ifld-pair (ifld-new-value (car ifld-pair) (cadr f))))
-+ (delq! f-name ifld-names)))
-+ minsn-iflds)
-+ (if (not (equal? ifld-names '(#f)))
-+ (parse-error context "incomplete operand list, missing: " (cdr ifld-names)))
-+ iflds)
-+)
-+
-+; Create an aliased real insn from an alias macro-insn.
-+
-+(define (minsn-make-alias context minsn)
-+ (if (or (not (has-attr? minsn 'ALIAS))
-+ ; Must emit exactly one real insn.
-+ (not (eq? 'emit (caar (minsn-expansions minsn)))))
-+ (parse-error context "not an alias macro-insn" minsn))
-+
-+ (let* ((expn (car (minsn-expansions minsn)))
-+ (alias-of (current-insn-lookup (cadr expn) (obj-isa-list minsn))))
-+
-+ (if (not alias-of)
-+ (parse-error context "unknown real insn in expansion" minsn))
-+
-+ (let ((i (make <insn>
-+ (context-location context)
-+ (obj:name minsn)
-+ (obj:comment minsn)
-+ (obj-atlist minsn)
-+ (minsn-syntax minsn)
-+ (/minsn-compute-iflds (context-append context
-+ (string-append ": " (obj:str-name minsn)))
-+ (cddr expn) alias-of)
-+ #f ; ifield-assertion
-+ #f ; semantics
-+ #f ; timing
-+ nil ; handlers
-+ )))
-+ ; FIXME: use same format entry as real insn,
-+ ; build mask and test value at run time.
-+ (insn-set-ifmt! i (ifmt-build i -1 #f (insn-iflds i))) ; (car (ifmt-analyze i #f))))
-+ ;(insn-set-ifmt! i (insn-ifmt alias-of))
-+ i))
-+)
-+
-+; Called before a .cpu file is read in.
-+
-+(define (minsn-init!)
-+ (reader-add-command! 'define-minsn
-+ "\
-+Define a macro instruction, name/value pair list version.
-+"
-+ nil 'arg-list define-minsn)
-+ (reader-add-command! 'define-full-minsn
-+ "\
-+Define a macro instruction, all arguments specified.
-+"
-+ nil '(name comment attrs syntax expansion)
-+ define-full-minsn)
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Called after the .cpu file has been read in.
-+
-+(define (minsn-finish!)
-+ *UNSPECIFIED*
-+)
-diff -Nur binutils-2.24.orig/cgen/model.scm binutils-2.24/cgen/model.scm
---- binutils-2.24.orig/cgen/model.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/model.scm 2016-06-30 21:26:12.661893424 +0200
-@@ -0,0 +1,339 @@
-+; CPU implementation description.
-+; Copyright (C) 2000, 2003, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; A model is an implementation of a mach.
-+; NOTE: wip [with all the caveats that implies].
-+; The intent here is to define the aspects of a CPU that affect performance,
-+; usable by any tool (but for the immediate future a simulator).
-+
-+; Pipeline specification.
-+
-+(define <pipeline>
-+ (class-make '<pipeline> nil '(name comment atlist elms) nil))
-+
-+(define (pipeline:length p) (length (elm-xget p 'elms)))
-+
-+; Function unit specification.
-+
-+; FIXME: Might wish to record which pipeline element(s) the unit is associated
-+; with. At the moment pipeline data isn't used, but later.
-+
-+(define <unit>
-+ (class-make '<unit>
-+ '(<ident>)
-+ '(
-+ ; wip
-+ issue done
-+ ; Lists of (name mode) pairs that record unit state.
-+ state
-+ ; Lists of (name mode [default-value]).
-+ inputs outputs
-+ ; RTL of code to invoke to do profiling.
-+ ; `nil' means use the default
-+ ; ??? Not currently used since all profiling handlers
-+ ; are user-written.
-+ profile
-+ ; Model this unit is associated with.
-+ model-name
-+ )
-+ nil))
-+
-+; ??? Rather than create a circularity, we record the model's symbol in
-+; the `model' element.
-+; FIXME: Shouldn't use current-model-lookup. Guile is better at printing
-+; things with circularities now, so should probably put back the circularity
-+; and delete the current-model-lookup reference.
-+(define (unit:model u) (current-model-lookup (elm-xget u 'model-name)))
-+(define unit:issue (elm-make-getter <unit> 'issue))
-+(define unit:done (elm-make-getter <unit> 'done))
-+(define unit:state (elm-make-getter <unit> 'state))
-+(define unit:inputs (elm-make-getter <unit> 'inputs))
-+(define unit:outputs (elm-make-getter <unit> 'outputs))
-+(define unit:profile (elm-make-getter <unit> 'profile))
-+
-+; Create a copy of unit U with new values for ISSUE and DONE.
-+; This is used when recording an instruction's timing information.
-+; ??? This might be better recorded in a different class from UNIT
-+; since we're not creating a new unit, we're just special casing it for
-+; one instruction.
-+; FIXME: No longer used.
-+
-+(define (unit:make-insn-timing u issue done)
-+ (let ((result (object-copy u)))
-+ (elm-xset! result 'issue issue)
-+ (elm-xset! result 'done done)
-+ result)
-+)
-+
-+; The `<model>' class.
-+;
-+; FETCH is the instruction fetch process as it relates to the implementation.
-+; e.g.
-+; - how many instructions are fetched at once
-+; - how those instructions are initially processed for delivery to the
-+; appropriate pipeline
-+; RETIRE is used to specify any final processing needed to complete an insn.
-+; PIPELINES is a list of pipeline objects.
-+; UNITS is a list of function units.
-+; STATE is a list of (var mode) pairs.
-+;
-+; For the more complicated cpus this can get really complicated really fast.
-+; No intent is made to get there in one day.
-+
-+(define <model>
-+ (class-make '<model>
-+ '(<ident>)
-+ '(mach prefetch retire pipelines state units)
-+ nil))
-+
-+(define model:mach (elm-make-getter <model> 'mach))
-+(define model:prefetch (elm-make-getter <model> 'prefetch))
-+(define model:retire (elm-make-getter <model> 'retire))
-+(define model:pipelines (elm-make-getter <model> 'pipelines))
-+(define model:state (elm-make-getter <model> 'state))
-+(define model:units (elm-make-getter <model> 'units))
-+
-+(define (model:enum m)
-+ (gen-c-symbol (string-append "MODEL_" (string-upcase (obj:str-name m))))
-+)
-+
-+(define (models-for-mach mach)
-+ (let ((mach-name (obj:name mach)))
-+ (find (lambda (model)
-+ (eq? (obj:name (model:mach model)) mach-name))
-+ (current-model-list)))
-+)
-+
-+; Parse a `prefetch' spec.
-+
-+(define (/prefetch-parse context expr)
-+ nil
-+)
-+
-+; Parse a `retire' spec.
-+
-+(define (/retire-parse context expr)
-+ nil
-+)
-+
-+; Parse a `pipeline' spec.
-+; ??? Perhaps we should also use name/value pairs here, but that's an
-+; unnecessary complication at this point in time.
-+
-+(define (/pipeline-parse context model-name spec) ; name comments attrs elements)
-+ (if (not (= (length spec) 4))
-+ (parse-error context "pipeline spec not `name comment attrs elements'" spec))
-+ (apply make (cons <pipeline> spec))
-+)
-+
-+; Parse a function `unit' spec.
-+; ??? Perhaps we should also use name/value pairs here, but that's an
-+; unnecessary complication at this point in time.
-+
-+(define (/unit-parse context model-name spec) ; name comments attrs elements)
-+ (if (not (= (length spec) 9))
-+ (parse-error context "unit spec not `name comment attrs issue done state inputs outputs profile'" spec))
-+ (apply make (append (cons <unit> spec) (list model-name)))
-+)
-+
-+; Parse a model definition.
-+; This is the main routine for building a model object from a
-+; description in the .cpu file.
-+; All arguments are in raw (non-evaluated) form.
-+
-+(define (/model-parse context name comment attrs mach-name prefetch retire pipelines state units)
-+ (logit 2 "Processing model " name " ...\n")
-+
-+ ;; Pick out name first to augment the error context.
-+ (let* ((name (parse-name context name))
-+ (context (context-append-name context name))
-+ (mach (current-mach-lookup mach-name)))
-+
-+ (if (null? units)
-+ (parse-error context "there must be at least one function unit" name))
-+
-+ (if mach ; is `mach' being "kept"?
-+ (let ((model-obj
-+ (make <model>
-+ name
-+ (parse-comment context comment)
-+ (atlist-parse context attrs "cpu")
-+ mach
-+ (/prefetch-parse context prefetch)
-+ (/retire-parse context retire)
-+ (map (lambda (p) (/pipeline-parse context name p)) pipelines)
-+ state
-+ (map (lambda (u) (/unit-parse context name u)) units))))
-+ model-obj)
-+
-+ (begin
-+ ; MACH wasn't found, ignore this model.
-+ (logit 2 "Nonexistant mach " mach-name ", ignoring " name ".\n")
-+ #f)))
-+)
-+
-+; Read a model description.
-+; This is the main routine for analyzing models in the .cpu file.
-+; CONTEXT is a <context> object for error messages.
-+; ARG-LIST is an associative list of field name and field value.
-+; /model-parse is invoked to create the `model' object.
-+
-+(define (/model-read context . arg-list)
-+ (let (
-+ (name nil) ; name of model
-+ (comment nil) ; description of model
-+ (attrs nil) ; attributes
-+ (mach nil) ; mach this model implements
-+ (prefetch nil) ; instruction prefetch handling
-+ (retire nil) ; instruction completion handling
-+ (pipelines nil) ; list of pipelines
-+ (state nil) ; list of (name mode) pairs to record state
-+ (units nil) ; list of function units
-+ )
-+
-+ (let loop ((arg-list arg-list))
-+ (if (null? arg-list)
-+ nil
-+ (let ((arg (car arg-list))
-+ (elm-name (caar arg-list)))
-+ (case elm-name
-+ ((name) (set! name (cadr arg)))
-+ ((comment) (set! comment (cadr arg)))
-+ ((attrs) (set! attrs (cdr arg)))
-+ ((mach) (set! mach (cadr arg)))
-+ ((prefetch) (set! prefetch (cadr arg)))
-+ ((retire) (set! retire (cadr arg)))
-+ ((pipeline) (set! pipelines (cons (cdr arg) pipelines)))
-+ ((state) (set! state (cdr arg)))
-+ ((unit) (set! units (cons (cdr arg) units)))
-+ (else (parse-error context "invalid model arg" arg)))
-+ (loop (cdr arg-list)))))
-+
-+ ; Now that we've identified the elements, build the object.
-+ (/model-parse context name comment attrs mach prefetch retire pipelines state units))
-+)
-+
-+; Define a cpu model object, name/value pair list version.
-+
-+(define define-model
-+ (lambda arg-list
-+ (let ((m (apply /model-read (cons (make-current-context "define-model")
-+ arg-list))))
-+ (if m
-+ (current-model-add! m))
-+ m))
-+)
-+
-+; Instruction timing.
-+
-+; There is one of these for each model timing description per instruction.
-+
-+(define <timing> (class-make '<timing> nil '(model units) nil))
-+
-+(define timing:model (elm-make-getter <timing> 'model))
-+(define timing:units (elm-make-getter <timing> 'units))
-+
-+; timing:units is a list of these.
-+; ARGS is a list of (name value) pairs.
-+
-+(define <iunit> (class-make '<iunit> nil '(unit args) nil))
-+
-+(define iunit:unit (elm-make-getter <iunit> 'unit))
-+(define iunit:args (elm-make-getter <iunit> 'args))
-+
-+; Return the default unit used by MODEL.
-+; ??? For now this is always u-exec.
-+
-+(define (model-default-unit model)
-+ (object-assq 'u-exec (model:units model))
-+)
-+
-+; Subroutine of parse-insn-timing to parse the timing spec for MODEL.
-+; The result is a <timing> object.
-+
-+(define (/insn-timing-parse-model context model spec)
-+ (make <timing> model
-+ (map (lambda (unit-timing-desc)
-+ (let ((type (car unit-timing-desc))
-+ (args (cdr unit-timing-desc)))
-+ (case type
-+ ((unit) ; syntax is `unit name (arg1 val1) ...'
-+ (let ((unit (object-assq (car args)
-+ (model:units model))))
-+ (if (not unit)
-+ (parse-error context "unknown function unit" args))
-+ (make <iunit> unit (cdr args))))
-+ (else (parse-error context "bad unit timing spec"
-+ unit-timing-desc)))))
-+ spec))
-+)
-+
-+; Given the timing information for an instruction return an associative
-+; list of timing objects (one for each specified model).
-+; INSN-TIMING-DESC is a list of
-+; (model1 (unit unit1-name ...) ...) (model2 (unit unit1-name ...) ...) ...
-+; Entries for models not included (because the machine wasn't selected)
-+; are returned as (model1), i.e. an empty unit list.
-+
-+(define (parse-insn-timing context insn-timing-desc)
-+ (logit 3 " parse-insn-timing: context= " (context-prefix context)
-+ ", desc= " insn-timing-desc "\n")
-+ (map (lambda (model-timing-desc)
-+ (let* ((model-name (car model-timing-desc))
-+ (model (current-model-lookup model-name)))
-+ (cons model-name
-+ (if model
-+ (/insn-timing-parse-model context model
-+ (cdr model-timing-desc))
-+ '()))))
-+ insn-timing-desc)
-+)
-+
-+; (number->string (assq-lookup-index (insn-handler 'parse insn) opc-parse-handlers 0))
-+
-+; Add handlers in corresponding opc-*-handlers list,
-+; so we can look up them later in cgen-asmdis and opc-itab.
-+; parse-handlers in cgen-utils.scm is not used.
-+
-+(define (parse-insn-handlers context insn-handlers-desc)
-+ (logit 2 "parse-insn-handlers... " insn-handlers-desc "\n")
-+ (if (not (list? insn-handlers-desc))
-+ (parse-error context "bad handler spec" insn-handlers-desc))
-+ (for-each (lambda (arg)
-+ (if (not (list-elements-ok? arg (list symbol? string?)))
-+ (parse-error context "bad handler spec" arg))
-+ (let ((h (string->symbol (cadr arg))))
-+ (cond ((eqv? 'print (car arg))
-+ (if (not (assq-lookup-index h opc-print-handlers 0))
-+ (set! opc-print-handlers (append opc-print-handlers (list (list h))))))
-+ ((eqv? 'parse (car arg)) '()
-+ (if (not (assq-lookup-index h opc-parse-handlers 0))
-+ (set! opc-parse-handlers (append opc-parse-handlers (list (list h))))))
-+ (else (parse-error context "unknown handler type" (car arg)))))
-+ )
-+ insn-handlers-desc)
-+ insn-handlers-desc
-+)
-+
-+
-+; Called before a .cpu file is read in.
-+
-+(define (model-init!)
-+
-+ (reader-add-command! 'define-model
-+ "\
-+Define a cpu model, name/value pair list version.
-+"
-+ nil 'arg-list define-model
-+ )
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Called after a .cpu file has been read in.
-+
-+(define (model-finish!)
-+ *UNSPECIFIED*
-+)
-diff -Nur binutils-2.24.orig/cgen/mode.scm binutils-2.24/cgen/mode.scm
---- binutils-2.24.orig/cgen/mode.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/mode.scm 2016-06-30 21:26:12.661893424 +0200
-@@ -0,0 +1,640 @@
-+; Mode objects.
-+; Copyright (C) 2000, 2009, 2010 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; FIXME: Later allow target to add new modes.
-+
-+(define <mode>
-+ (class-make '<mode>
-+ '(<ident>)
-+ '(
-+ ; One of RANDOM, INT, UINT, FLOAT.
-+ class
-+
-+ ; size in bits
-+ bits
-+
-+ ; size in bytes
-+ bytes
-+
-+ ; The C type to use or #f if there is no such C type.
-+ ; This is generally the name of the mode.
-+ c-type
-+
-+ ; PRINTF-TYPE is the %<letter> arg to printf-like functions,
-+ ; however we define our own extensions for non-portable modes.
-+ ; Values not understood by printf aren't intended to be used
-+ ; with printf.
-+ ;
-+ ; Possible values:
-+ ; %x - as always
-+ ; %D - DI mode (8 bytes)
-+ ; %T - TI mode (16 bytes)
-+ ; %O - OI mode (32 bytes)
-+ ; %f - SF,DF modes
-+ ; %F - XF,TF modes
-+ printf-type
-+
-+ ; SEM-MODE is the mode to use for semantic operations.
-+ ; Unsigned modes are not part of the semantic language proper,
-+ ; but they can be used in hardware descriptions. This maps
-+ ; unusable -> usable modes. It is #f if the mode is usable by
-+ ; itself. This prevents circular data structures and makes it
-+ ; easy to define since the object doesn't exist before it's
-+ ; defined.
-+ ; ??? May wish to later remove SEM-MODE (e.g. mips signed add
-+ ; is different than mips unsigned add). However for now it keeps
-+ ; things simpler, and prevents being wildly dissimilar from
-+ ; GCC-RTL. And the mips case needn't be handled with different
-+ ; adds anyway.
-+ sem-mode
-+
-+ ; PTR-TO, if non-#f, is the mode being pointed to.
-+ ptr-to
-+
-+ ; HOST? is non-#f if the mode is a portable int for hosts,
-+ ; or other host-related value.
-+ ; This is used for things like register numbers and small
-+ ; odd-sized immediates and registers.
-+ ; ??? Not my favorite word choice here, but it's close.
-+ host?
-+ )
-+ nil)
-+)
-+
-+; Accessor fns
-+
-+(define mode:class (elm-make-getter <mode> 'class))
-+(define mode:bits (elm-make-getter <mode> 'bits))
-+(define mode:bytes (elm-make-getter <mode> 'bytes))
-+(define mode:c-type (elm-make-getter <mode> 'c-type))
-+(define mode:printf-type (elm-make-getter <mode> 'printf-type))
-+(define mode:sem-mode (elm-make-getter <mode> 'sem-mode))
-+; ptr-to is currently private so there is no accessor.
-+(define mode:host? (elm-make-getter <mode> 'host?))
-+
-+;; Utility to set the parameters of WI/UWI/AI/IAI modes.
-+
-+(define (/mode-set-word-params! dst src)
-+ (assert (mode? dst))
-+ (assert (mode? src))
-+ (object-assign! dst src)
-+ *UNSPECIFIED*
-+)
-+
-+; CM is short for "concat mode". It is a list of modes of the elements
-+; of a `concat'.
-+; ??? Experiment. Not currently used.
-+
-+(define <concat-mode>
-+ (class-make '<concat-mode> '(<mode>)
-+ '(
-+ ; List of element modes
-+ elm-modes
-+ )
-+ nil)
-+)
-+
-+; Accessors.
-+
-+(define cmode-elm-modes (elm-make-getter <concat-mode> 'elm-modes))
-+
-+;; Table of all modes.
-+(define /mode-table nil)
-+
-+;; This exists to simplify mode-find.
-+(define /mode-class-table nil)
-+
-+; Return list of real mode objects (no aliases).
-+
-+(define (mode-list-non-alias-values)
-+ (hash-fold (lambda (key value prior)
-+ (if (eq? key (obj:name value))
-+ (append value prior)
-+ prior))
-+ '()
-+ /mode-table)
-+)
-+
-+; Return a boolean indicating if X is a <mode> object.
-+
-+(define (mode? x) (class-instance? <mode> x))
-+
-+; Return enum cgen_mode_types value for M.
-+
-+(define (mode:enum m)
-+ (gen-c-symbol (string-append "MODE_" (string-upcase (obj:str-name m))))
-+)
-+
-+; Return a boolean indicating if MODE1 is equal to MODE2
-+; Either may be the name of a mode or a <mode> object.
-+; Aliases are handled by refering to their real name.
-+; ??? Might be useful to restrict this to <mode> objects only.
-+
-+(define (mode:eq? mode1 mode2)
-+ (let ((mode1-name (mode-real-name (mode-maybe-lookup mode1)))
-+ (mode2-name (mode-real-name (mode-maybe-lookup mode2))))
-+ (eq? mode1-name mode2-name))
-+)
-+
-+; Return a boolean indicating if CLASS is one of INT/UINT.
-+
-+(define (mode-class-integral? class) (memq class '(INT UINT)))
-+(define (mode-class-signed? class) (eq? class 'INT))
-+(define (mode-class-unsigned? class) (eq? class 'UINT))
-+
-+; Return a boolean indicating if CLASS is floating point.
-+
-+(define (mode-class-float? class) (memq class '(FLOAT)))
-+
-+; Return a boolean indicating if CLASS is numeric.
-+
-+(define (mode-class-numeric? class) (memq class '(INT UINT FLOAT)))
-+
-+; Return a boolean indicating if <mode> MODE has an integral mode class.
-+; Similarily for signed/unsigned.
-+
-+(define (mode-integral? mode) (mode-class-integral? (mode:class mode)))
-+(define (mode-signed? mode) (mode-class-signed? (mode:class mode)))
-+(define (mode-unsigned? mode) (mode-class-unsigned? (mode:class mode)))
-+
-+; Return a boolean indicating if <mode> MODE has a floating point mode class.
-+
-+(define (mode-float? mode) (mode-class-float? (mode:class mode)))
-+
-+; Return a boolean indicating if <mode> MODE has a numeric mode class.
-+
-+(define (mode-numeric? mode) (mode-class-numeric? (mode:class mode)))
-+
-+;; Return a boolean indicating if <mode> MODE is VOID.
-+
-+(define (mode-void? mode)
-+ (eq? mode VOID)
-+)
-+
-+; Return a boolean indicating if MODE1 is compatible with MODE2.
-+; MODE[12] are either names or <mode> objects.
-+; HOW is a symbol indicating how the test is performed:
-+; strict: modes must have same name
-+; samesize: modes must be both float, or both integer (int or uint),
-+; or both VOID and have same size
-+; sameclass: modes must be both float, or both integer (int or uint),
-+; or both VOID
-+; numeric: modes must be both numeric
-+
-+(define (mode-compatible? how mode1 mode2)
-+ (let ((m1 (mode-maybe-lookup mode1))
-+ (m2 (mode-maybe-lookup mode2)))
-+ (case how
-+ ((strict)
-+ (eq? (obj:name m1) (obj:name m2)))
-+ ((samesize)
-+ (cond ((mode-integral? m1)
-+ (and (mode-integral? m2)
-+ (= (mode:bits m1) (mode:bits m2))))
-+ ((mode-float? m1)
-+ (and (mode-float? m2)
-+ (= (mode:bits m1) (mode:bits m2))))
-+ ((mode-void? m1)
-+ (mode-void? m2))
-+ (else #f)))
-+ ((sameclass)
-+ (cond ((mode-integral? m1) (mode-integral? m2))
-+ ((mode-float? m1) (mode-float? m2))
-+ ((mode-void? m1) (mode-void? m2))
-+ (else #f)))
-+ ((numeric)
-+ (and (mode-numeric? m1) (mode-numeric? m2)))
-+ (else (error "bad `how' arg to mode-compatible?" how))))
-+)
-+
-+; Add MODE named NAME to the table of recognized modes.
-+; If NAME is already present, replace it with MODE.
-+; MODE is a mode object.
-+; NAME exists to allow aliases of modes [e.g. WI, UWI, AI, IAI].
-+;
-+; No attempt to preserve any particular order of entries is done here.
-+; That is up to the caller.
-+
-+(define (mode:add! name mode)
-+ (hashq-set! /mode-table name mode)
-+
-+ ;; Add the mode to its mode class.
-+ ;; There's no point in building this list in any particular order,
-+ ;; if the user adds some they could be of any size.
-+ ;; So build the list the simple way (in reverse).
-+ ;; The list is sorted in mode-finish!.
-+ (let ((class (mode:class mode)))
-+ (hashq-set! /mode-class-table class
-+ (cons mode (hashq-ref /mode-class-table class))))
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Parse a mode.
-+; This is the main routine for building a mode object.
-+; All arguments are in raw (non-evaluated) form.
-+
-+(define (/mode-parse context name comment attrs class bits bytes
-+ c-type printf-type sem-mode ptr-to host?)
-+ (logit 2 "Processing mode " name " ...\n")
-+
-+ ;; Pick out name first to augment the error context.
-+ (let* ((name (parse-name context name))
-+ (context (context-append-name context name)))
-+
-+ (make <mode>
-+ name
-+ (parse-comment context comment)
-+ (atlist-parse context attrs "mode")
-+ class bits bytes c-type printf-type
-+ sem-mode ptr-to host?))
-+)
-+
-+; ??? At present there is no define-mode that takes an associative list
-+; of arguments.
-+
-+; Define a mode object, all arguments specified.
-+
-+(define (define-full-mode name comment attrs class bits bytes
-+ c-type printf-type sem-mode ptr-to host?)
-+ (let ((m (/mode-parse (make-current-context "define-full-mode")
-+ name comment attrs
-+ class bits bytes
-+ c-type printf-type sem-mode ptr-to host?)))
-+ ; Add it to the list of insn modes.
-+ (mode:add! name m)
-+ m)
-+)
-+
-+; Lookup the mode named X.
-+; Return the found object or #f.
-+; If X is already a mode object, return that.
-+
-+(define (mode:lookup mode-name)
-+; (if (mode? x)
-+; x
-+; (let ((result (assq x mode-list)))
-+; (if result
-+; (cdr result)
-+; #f)))
-+ (hashq-ref /mode-table mode-name)
-+)
-+
-+;; Same as mode:lookup except MODE is either the mode name or a <mode> object.
-+
-+(define (mode-maybe-lookup mode)
-+ (if (symbol? mode)
-+ (hashq-ref /mode-table mode)
-+ mode)
-+)
-+
-+; Return a boolean indicating if X is a valid mode name.
-+
-+(define (mode-name? x)
-+ (and (symbol? x)
-+ (->bool (mode:lookup x)))
-+)
-+
-+; Return the name of the real mode of MODE, a <mode> object.
-+; This is a no-op unless M is an alias in which case we return the
-+; real mode of the alias.
-+
-+(define (mode-real-name mode)
-+ (obj:name mode)
-+)
-+
-+; Return the real mode of MODE, a <mode> object.
-+; This is a no-op unless M is an alias in which case we return the
-+; real mode of the alias.
-+
-+(define (mode-real-mode mode)
-+ ;; Lookups of aliases return its real mode, so this function is a no-op.
-+ ;; But that's an implementation detail, so I'm not ready to delete this
-+ ;; function.
-+ mode
-+)
-+
-+; Return the version of MODE to use in semantic expressions.
-+; MODE is a <mode> object.
-+; This (essentially) converts aliases to their real value and then uses
-+; mode:sem-mode. The implementation is the opposite but the effect is the
-+; same.
-+; ??? Less efficient than it should be. One improvement would be to
-+; disallow unsigned modes from being aliased and set sem-mode for aliased
-+; modes.
-+
-+(define (mode-sem-mode mode)
-+ (let ((sm (mode:sem-mode mode)))
-+ (if sm
-+ sm
-+ (mode-real-mode mode)))
-+)
-+
-+; Return #t if mode M1 is bigger than mode M2.
-+; Both are <mode> objects.
-+
-+(define (mode-bigger? m1 m2)
-+ (> (mode:bits m1)
-+ (mode:bits m2))
-+)
-+
-+; Return a mode in mode class CLASS wide enough to hold BITS.
-+; This ignores "host" modes (e.g. INT,UINT).
-+
-+(define (mode-find bits class)
-+ (let* ((class-modes (hashq-ref /mode-class-table class))
-+ (modes (find (lambda (mode) (not (mode:host? mode)))
-+ (or class-modes nil))))
-+ (if (null? modes)
-+ (error "invalid mode class" class))
-+ (let loop ((modes modes))
-+ (cond ((null? modes) (error "no modes for bits" bits))
-+ ((<= bits (mode:bits (car modes))) (car modes))
-+ (else (loop (cdr modes))))))
-+)
-+
-+; Parse MODE-NAME and return the mode object.
-+; CONTEXT is a <context> object for error messages.
-+; An error is signalled if MODE isn't valid.
-+
-+(define (parse-mode-name context mode-name)
-+ (let ((m (mode:lookup mode-name)))
-+ (if (not m)
-+ (parse-error context "not a valid mode" mode-name))
-+ m)
-+)
-+
-+; Make a new INT/UINT mode.
-+; These have a variable number of bits (1-64).
-+
-+(define (mode-make-int bits)
-+ (if (or (<= bits 0) (> bits 64))
-+ (error "unsupported number of bits" bits))
-+ (let ((result (object-copy INT)))
-+ (elm-xset! result 'bits bits)
-+ (elm-xset! result 'bytes (bits->bytes bits))
-+ result)
-+)
-+
-+(define (mode-make-uint bits)
-+ (if (or (<= bits 0) (> bits 64))
-+ (error "unsupported number of bits" bits))
-+ (let ((result (object-copy UINT)))
-+ (elm-xset! result 'bits bits)
-+ (elm-xset! result 'bytes (bits->bytes bits))
-+ result)
-+)
-+
-+; WI/UWI/AI/IAI modes
-+; These are aliases for other modes, e.g. SI,DI.
-+; Final values are defered until all cpu family definitions have been
-+; read in so that we know the word size, etc.
-+;
-+; NOTE: We currently assume WI/AI/IAI all have the same size: cpu:word-bitsize.
-+; If we ever add an architecture that needs different modes for WI/AI/IAI,
-+; we can add the support then.
-+
-+; This is defined by the target in define-cpu:word-bitsize.
-+(define WI #f)
-+(define UWI #f)
-+
-+; An "address int". This is recorded in addition to a "word int" because it
-+; is believed that some target will need it. It also stays consistent with
-+; what BFD does. It also allows one to write rtl without having to care
-+; what the real mode actually is.
-+; ??? These are currently set from define-cpu:word-bitsize but that's just
-+; laziness. If an architecture comes along that has different values,
-+; add the support then.
-+(define AI #f)
-+(define IAI #f)
-+
-+; Kind of word size handling wanted.
-+; BIGGEST: pick the largest word size
-+; IDENTICAL: all word sizes must be identical
-+(define /mode-word-sizes-kind #f)
-+
-+;; Set to true if mode-set-word-modes! has been called.
-+(define /mode-word-sizes-defined? #f)
-+
-+; Called when a cpu-family is read in to set the word sizes.
-+
-+(define (mode-set-word-modes! bitsize)
-+ (let ((current-word-bitsize (mode:bits WI))
-+ (word-mode (mode-find bitsize 'INT))
-+ (uword-mode (mode-find bitsize 'UINT))
-+ (ignore? #f))
-+
-+ ; Ensure we found a precise match.
-+ (if (!= bitsize (mode:bits word-mode))
-+ (error "unable to find precise mode to match cpu word-bitsize" bitsize))
-+
-+ ; Enforce word size kind.
-+ (if /mode-word-sizes-defined?
-+ (case /mode-word-sizes-kind
-+ ((IDENTICAL)
-+ (if (!= current-word-bitsize (mode:bits word-mode))
-+ (error "app requires all selected cpu families to have same word size"))
-+ (set! ignore? #t))
-+ ((BIGGEST)
-+ (if (>= current-word-bitsize (mode:bits word-mode))
-+ (set! ignore? #t)))
-+ ))
-+
-+ (if (not ignore?)
-+ (begin
-+ (/mode-set-word-params! WI word-mode)
-+ (/mode-set-word-params! UWI uword-mode)
-+ (/mode-set-word-params! AI uword-mode)
-+ (/mode-set-word-params! IAI uword-mode)
-+ ))
-+ )
-+
-+ (set! /mode-word-sizes-defined? #t)
-+)
-+
-+; Called by apps to indicate cpu:word-bitsize always has one value.
-+; It is an error to call this if the selected cpu families have
-+; different word sizes.
-+; Must be called before loading .cpu files.
-+
-+(define (mode-set-identical-word-bitsizes!)
-+ (set! /mode-word-sizes-kind 'IDENTICAL)
-+)
-+
-+; Called by apps to indicate using the biggest cpu:word-bitsize of all
-+; selected cpu families.
-+; Must be called before loading .cpu files.
-+
-+(define (mode-set-biggest-word-bitsizes!)
-+ (set! /mode-word-sizes-kind 'BIGGEST)
-+)
-+
-+; Ensure word sizes have been defined.
-+; This must be called after all cpu families have been defined
-+; and before any ifields, hardware, operand or insns have been read.
-+; FIXME: sparc.cpu breaks this
-+
-+(define (mode-ensure-word-sizes-defined)
-+ (if (not /mode-word-sizes-defined?)
-+ (error "word sizes must be defined"))
-+)
-+
-+; Initialization.
-+
-+; Some modes are refered to by the Scheme code.
-+; These have global bindings, but we try not to make this the general rule.
-+; [Actually I don't think this is all that bad, but it seems reasonable to
-+; not create global bindings that we don't have to.]
-+
-+(define VOID #f)
-+(define DFLT #f)
-+
-+; Variable sized portable ints.
-+(define INT #f)
-+(define UINT #f)
-+
-+;; Sort the modes for each class.
-+
-+(define (/sort-mode-classes!)
-+ (for-each (lambda (class-name)
-+ (hashq-set! /mode-class-table class-name
-+ (sort (hashq-ref /mode-class-table class-name)
-+ (lambda (a b)
-+ (< (mode:bits a)
-+ (mode:bits b))))))
-+ '(RANDOM INT UINT FLOAT))
-+
-+ *UNSPECIFIED*
-+)
-+
-+(define (mode-init!)
-+ (set! /mode-word-sizes-kind 'IDENTICAL)
-+ (set! /mode-word-sizes-defined? #f)
-+
-+ (reader-add-command! 'define-full-mode
-+ "\
-+Define a mode, all arguments specified.
-+"
-+ nil '(name commment attrs class bits bytes
-+ non-c-mode-type printf-type sem-mode ptr-to host?)
-+ define-full-mode)
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Called before a . cpu file is read in to install any builtins.
-+
-+(define (mode-builtin!)
-+ ; FN-SUPPORT: In sem-ops.h file, include prototypes as well as macros.
-+ ; Elsewhere, functions are defined to perform the operation.
-+ (define-attr '(for mode) '(type boolean) '(name FN-SUPPORT))
-+
-+ (set! /mode-class-table (make-hash-table 7))
-+ (hashq-set! /mode-class-table 'RANDOM '())
-+ (hashq-set! /mode-class-table 'INT '())
-+ (hashq-set! /mode-class-table 'UINT '())
-+ (hashq-set! /mode-class-table 'FLOAT '())
-+
-+ (set! /mode-table (make-hash-table 41))
-+
-+ (let ((dfm define-full-mode))
-+ ; This list must be defined in order of increasing size among each type.
-+ ; FIXME: still true?
-+
-+ (dfm 'VOID "void" '() 'RANDOM 0 0 "void" "" #f #f #f) ; VOIDmode
-+
-+ ; Special marker to indicate "use the default mode".
-+ (dfm 'DFLT "default mode" '() 'RANDOM 0 0 #f "" #f #f #f)
-+
-+ ; Mode used in `symbol' rtxs.
-+ (dfm 'SYM "symbol" '() 'RANDOM 0 0 #f "" #f #f #f)
-+
-+ ; Mode used in `current-insn' rtxs.
-+ (dfm 'INSN "insn" '() 'RANDOM 0 0 #f "" #f #f #f)
-+
-+ ; Mode used in `current-mach' rtxs.
-+ (dfm 'MACH "mach" '() 'RANDOM 0 0 #f "" #f #f #f)
-+
-+ ; Not UINT on purpose.
-+ (dfm 'BI "one bit (0,1 not 0,-1)" '() 'INT 1 1 "BI" "'x'" #f #f #f)
-+
-+ (dfm 'QI "8 bit byte" '() 'INT 8 1 "QI" "'x'" #f #f #f)
-+ (dfm 'HI "16 bit int" '() 'INT 16 2 "HI" "'x'" #f #f #f)
-+ (dfm 'SI "32 bit int" '() 'INT 32 4 "SI" "'x'" #f #f #f)
-+ (dfm 'DI "64 bit int" '(FN-SUPPORT) 'INT 64 8 "DI" "'D'" #f #f #f)
-+
-+ ; No unsigned versions on purpose for now.
-+ (dfm 'TI "128 bit int" '(FN-SUPPORT) 'INT 128 16 "TI" "'T'" #f #f #f)
-+ (dfm 'OI "256 bit int" '(FN-SUPPORT) 'INT 256 32 "OI" "'O'" #f #f #f)
-+
-+ (dfm 'UQI "8 bit unsigned byte" '() 'UINT
-+ 8 1 "UQI" "'x'" (mode:lookup 'QI) #f #f)
-+ (dfm 'UHI "16 bit unsigned int" '() 'UINT
-+ 16 2 "UHI" "'x'" (mode:lookup 'HI) #f #f)
-+ (dfm 'USI "32 bit unsigned int" '() 'UINT
-+ 32 4 "USI" "'x'" (mode:lookup 'SI) #f #f)
-+ (dfm 'UDI "64 bit unsigned int" '(FN-SUPPORT) 'UINT
-+ 64 8 "UDI" "'D'" (mode:lookup 'DI) #f #f)
-+
-+ ; Floating point values.
-+ (dfm 'SF "32 bit float" '(FN-SUPPORT) 'FLOAT
-+ 32 4 "SF" "'f'" #f #f #f)
-+ (dfm 'DF "64 bit float" '(FN-SUPPORT) 'FLOAT
-+ 64 8 "DF" "'f'" #f #f #f)
-+ (dfm 'XF "80/96 bit float" '(FN-SUPPORT) 'FLOAT
-+ 96 12 "XF" "'F'" #f #f #f)
-+ (dfm 'TF "128 bit float" '(FN-SUPPORT) 'FLOAT
-+ 128 16 "TF" "'F'" #f #f #f)
-+
-+ ; These are useful modes that represent host values.
-+ ; For INT/UINT the sizes indicate maximum portable values.
-+ ; These are also used for random width hardware elements (e.g. immediates
-+ ; and registers).
-+ ; FIXME: Can't be used to represent both host and target values.
-+ ; Either remove the distinction or add new modes with the distinction.
-+ ; FIXME: IWBN to specify #f for sem-mode, but that means we'd need
-+ ; TRUNCINTQI,etc.
-+ (dfm 'INT "portable int" '() 'INT 32 4 "INT" "'x'"
-+ (mode:lookup 'SI) #f #t)
-+ (dfm 'UINT "portable unsigned int" '() 'UINT 32 4 "UINT" "'x'"
-+ (mode:lookup 'SI) #f #t)
-+
-+ ; ??? Experimental.
-+ (dfm 'PTR "host pointer" '() 'RANDOM 0 0 "void*" "'x'"
-+ #f (mode:lookup 'VOID) #t)
-+ )
-+
-+ (set! VOID (mode:lookup 'VOID))
-+ (set! DFLT (mode:lookup 'DFLT))
-+
-+ (set! INT (mode:lookup 'INT))
-+ (set! UINT (mode:lookup 'UINT))
-+
-+ ;; While setting the real values of WI/UWI/AI/IAI is defered to
-+ ;; mode-set-word-modes!, create usable entries in the table.
-+ ;; The entries must be usable as h/w elements may be defined that use them.
-+ (set! WI (object-copy (mode:lookup 'SI)))
-+ (set! UWI (object-copy (mode:lookup 'USI)))
-+ (set! AI (object-copy (mode:lookup 'USI)))
-+ (set! IAI (object-copy (mode:lookup 'USI)))
-+ (mode:add! 'WI WI)
-+ (mode:add! 'UWI UWI)
-+ (mode:add! 'AI AI)
-+ (mode:add! 'IAI IAI)
-+
-+ ;; Need to have usable mode classes at this point as define-cpu
-+ ;; calls mode-set-word-modes!.
-+ (/sort-mode-classes!)
-+
-+ *UNSPECIFIED*
-+)
-+
-+(define (mode-finish!)
-+ ;; FIXME: mode:add! should keep the class sorted.
-+ ;; It's a cleaner way to handle modes from the .cpu file.
-+ (/sort-mode-classes!)
-+
-+ *UNSPECIFIED*
-+)
-diff -Nur binutils-2.24.orig/cgen/NEWS binutils-2.24/cgen/NEWS
---- binutils-2.24.orig/cgen/NEWS 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/NEWS 2016-06-30 21:26:12.661893424 +0200
-@@ -0,0 +1,17 @@
-+Support for the Ubicom IP2K processor contributed by Red Hat and Ubicom, Inc.
-+
-+Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400 and
-+FR500 included.
-+
-+Major features in release 1.0:
-+
-+This is the first release of CGEN. It includes the most important
-+applications, including the assembler, disassembler and simulator
-+generators. A handful of CPU descriptions are also included:
-+
-+ * ARM7T
-+ * Intel i960 [incomplete]
-+ * Intel IA-32 and IA-64 [incomplete]
-+ * Fujitsu FR-30
-+ * Mitsubishi M32R/D
-+ * SPARC [incomplete]
-diff -Nur binutils-2.24.orig/cgen/opc-asmdis.scm binutils-2.24/cgen/opc-asmdis.scm
---- binutils-2.24.orig/cgen/opc-asmdis.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/opc-asmdis.scm 2016-06-30 21:26:12.661893424 +0200
-@@ -0,0 +1,185 @@
-+; Assembler/disassembler support generator.
-+; Copyright (C) 2000, 2001, 2005, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+
-+; Assembler support.
-+
-+(define (/gen-parse-switch)
-+ (logit 2 "Generating parse switch ...\n")
-+ (string-list
-+ "\
-+const char * @arch@_cgen_parse_operand
-+ (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
-+
-+/* Main entry point for operand parsing.
-+
-+ This function is basically just a big switch statement. Earlier versions
-+ used tables to look up the function to use, but
-+ - if the table contains both assembler and disassembler functions then
-+ the disassembler contains much of the assembler and vice-versa,
-+ - there's a lot of inlining possibilities as things grow,
-+ - using a switch statement avoids the function call overhead.
-+
-+ This function could be moved into `parse_insn_normal', but keeping it
-+ separate makes clear the interface between `parse_insn_normal' and each of
-+ the handlers. */
-+
-+const char *
-+@arch@_cgen_parse_operand (CGEN_CPU_DESC cd,
-+ int opindex,
-+ const char ** strp,
-+ CGEN_FIELDS * fields)
-+{
-+ const char * errmsg = NULL;
-+ /* Used by scalar operands that still need to be parsed. */
-+ " (gen-ifield-default-type) " junk ATTRIBUTE_UNUSED;
-+
-+ switch (opindex)
-+ {
-+"
-+ (gen-switch 'parse)
-+"
-+ default :
-+ /* xgettext:c-format */
-+ fprintf (stderr, _(\"Unrecognized field %d while parsing.\\n\"), opindex);
-+ abort ();
-+ }
-+
-+ return errmsg;
-+}\n\n")
-+)
-+
-+; Assembler initialization C code
-+; Code is appended during processing.
-+
-+(define /asm-init-code "")
-+(define (add-asm-init code)
-+ (set! /asm-init-code (string-append /asm-init-code code))
-+)
-+
-+; Return C code to define the assembler init function.
-+; This is called after opcode_open.
-+
-+(define (/gen-init-asm-fn)
-+ (string-append
-+ "\
-+void
-+@arch@_cgen_init_asm (CGEN_CPU_DESC cd)
-+{
-+ @arch@_cgen_init_opcode_table (cd);
-+ @arch@_cgen_init_ibld_table (cd);
-+ cd->parse_handlers = & @arch@_cgen_parse_handlers[0];
-+ cd->parse_operand = @arch@_cgen_parse_operand;
-+#ifdef CGEN_ASM_INIT_HOOK
-+CGEN_ASM_INIT_HOOK
-+#endif
-+"
-+ /asm-init-code
-+"}\n\n"
-+ )
-+)
-+
-+; Generate C code that is inserted into the assembler source.
-+
-+(define (cgen-asm.in)
-+ (logit 1 "Generating " (current-arch-name) "-asm.in ...\n")
-+ (string-write
-+ ; No need for copyright, appended to file with one.
-+ "\n"
-+ (lambda () (gen-extra-asm.c (opc-file-path) (current-arch-name)))
-+ "\n"
-+ /gen-parse-switch
-+ (lambda () (gen-handler-table "parse" opc-parse-handlers))
-+ /gen-init-asm-fn
-+ )
-+)
-+
-+; Disassembler support.
-+
-+(define (/gen-print-switch)
-+ (logit 2 "Generating print switch ...\n")
-+ (string-list
-+ "\
-+void @arch@_cgen_print_operand
-+ (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
-+
-+/* Main entry point for printing operands.
-+ XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
-+ of dis-asm.h on cgen.h.
-+
-+ This function is basically just a big switch statement. Earlier versions
-+ used tables to look up the function to use, but
-+ - if the table contains both assembler and disassembler functions then
-+ the disassembler contains much of the assembler and vice-versa,
-+ - there's a lot of inlining possibilities as things grow,
-+ - using a switch statement avoids the function call overhead.
-+
-+ This function could be moved into `print_insn_normal', but keeping it
-+ separate makes clear the interface between `print_insn_normal' and each of
-+ the handlers. */
-+
-+void
-+@arch@_cgen_print_operand (CGEN_CPU_DESC cd,
-+ int opindex,
-+ void * xinfo,
-+ CGEN_FIELDS *fields,
-+ void const *attrs ATTRIBUTE_UNUSED,
-+ bfd_vma pc,
-+ int length)
-+{
-+ disassemble_info *info = (disassemble_info *) xinfo;
-+
-+ switch (opindex)
-+ {
-+"
-+ (gen-switch 'print)
-+"
-+ default :
-+ /* xgettext:c-format */
-+ fprintf (stderr, _(\"Unrecognized field %d while printing insn.\\n\"),
-+ opindex);
-+ abort ();
-+ }
-+}\n\n")
-+)
-+
-+; Disassembler initialization C code.
-+; Code is appended during processing.
-+
-+(define /dis-init-code "")
-+(define (add-dis-init code)
-+ (set! /dis-init-code (string-append /dis-init-code code))
-+)
-+
-+; Return C code to define the disassembler init function.
-+
-+(define (/gen-init-dis-fn)
-+ (string-append
-+ "
-+void
-+@arch@_cgen_init_dis (CGEN_CPU_DESC cd)
-+{
-+ @arch@_cgen_init_opcode_table (cd);
-+ @arch@_cgen_init_ibld_table (cd);
-+ cd->print_handlers = & @arch@_cgen_print_handlers[0];
-+ cd->print_operand = @arch@_cgen_print_operand;
-+"
-+ /dis-init-code
-+"}\n\n"
-+ )
-+)
-+
-+; Generate C code that is inserted into the disassembler source.
-+
-+(define (cgen-dis.in)
-+ (logit 1 "Generating " (current-arch-name) "-dis.in ...\n")
-+ (string-write
-+ ; No need for copyright, appended to file with one.
-+ "\n"
-+ (lambda () (gen-extra-dis.c (opc-file-path) (current-arch-name)))
-+ "\n"
-+ /gen-print-switch
-+ (lambda () (gen-handler-table "print" opc-print-handlers))
-+ /gen-init-dis-fn
-+ )
-+)
-diff -Nur binutils-2.24.orig/cgen/opc-ibld.scm binutils-2.24/cgen/opc-ibld.scm
---- binutils-2.24.orig/cgen/opc-ibld.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/opc-ibld.scm 2016-06-30 21:26:12.661893424 +0200
-@@ -0,0 +1,322 @@
-+; Instruction builder support.
-+; Copyright (C) 2000, 2001, 2005, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+
-+; Instruction field support.
-+
-+(define (/gen-fget-switch)
-+ (logit 2 "Generating field get switch ...\n")
-+ (string-list
-+ "\
-+int @arch@_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
-+bfd_vma @arch@_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
-+
-+/* Getting values from cgen_fields is handled by a collection of functions.
-+ They are distinguished by the type of the VALUE argument they return.
-+ TODO: floating point, inlining support, remove cases where result type
-+ not appropriate. */
-+
-+int
-+@arch@_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ int opindex,
-+ const CGEN_FIELDS * fields)
-+{
-+ int value;
-+
-+ switch (opindex)
-+ {
-+"
-+ (gen-switch 'fget)
-+"
-+ default :
-+ /* xgettext:c-format */
-+ fprintf (stderr, _(\"Unrecognized field %d while getting int operand.\\n\"),
-+ opindex);
-+ abort ();
-+ }
-+
-+ return value;
-+}
-+
-+bfd_vma
-+@arch@_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ int opindex,
-+ const CGEN_FIELDS * fields)
-+{
-+ bfd_vma value;
-+
-+ switch (opindex)
-+ {
-+"
-+ (gen-switch 'fget)
-+"
-+ default :
-+ /* xgettext:c-format */
-+ fprintf (stderr, _(\"Unrecognized field %d while getting vma operand.\\n\"),
-+ opindex);
-+ abort ();
-+ }
-+
-+ return value;
-+}
-+\n")
-+)
-+
-+(define (/gen-fset-switch)
-+ (logit 2 "Generating field set switch ...\n")
-+ (string-list
-+ "\
-+void @arch@_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
-+void @arch@_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
-+
-+/* Stuffing values in cgen_fields is handled by a collection of functions.
-+ They are distinguished by the type of the VALUE argument they accept.
-+ TODO: floating point, inlining support, remove cases where argument type
-+ not appropriate. */
-+
-+void
-+@arch@_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ int opindex,
-+ CGEN_FIELDS * fields,
-+ int value)
-+{
-+ switch (opindex)
-+ {
-+"
-+ (gen-switch 'fset)
-+"
-+ default :
-+ /* xgettext:c-format */
-+ fprintf (stderr, _(\"Unrecognized field %d while setting int operand.\\n\"),
-+ opindex);
-+ abort ();
-+ }
-+}
-+
-+void
-+@arch@_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
-+ int opindex,
-+ CGEN_FIELDS * fields,
-+ bfd_vma value)
-+{
-+ switch (opindex)
-+ {
-+"
-+ (gen-switch 'fset)
-+"
-+ default :
-+ /* xgettext:c-format */
-+ fprintf (stderr, _(\"Unrecognized field %d while setting vma operand.\\n\"),
-+ opindex);
-+ abort ();
-+ }
-+}
-+\n")
-+)
-+
-+; Utilities of cgen-ibld.h.
-+
-+; Return a list of operands the assembler syntax uses.
-+; This is a subset of the fields of the insn.
-+
-+(define (ifmt-opcode-operands ifmt)
-+ (map ifld-get-value
-+ (find (lambda (elm) (not (number? (ifld-get-value elm))))
-+ (ifmt-ifields ifmt)))
-+)
-+
-+; Subroutine of gen-insn-builders to generate the builder for one insn.
-+; FIXME: wip.
-+
-+(define (gen-insn-builder insn)
-+ (let* ((ifmt (insn-ifmt insn))
-+ (operands (ifmt-opcode-operands ifmt))
-+ (length (ifmt-length ifmt)))
-+ (gen-obj-sanitize
-+ insn
-+ (string-append
-+ "#define @ARCH@_IBLD_"
-+ (string-upcase (gen-sym insn))
-+ "(endian, buf, lenp"
-+ (gen-c-args (map gen-sym operands))
-+ ")\n"
-+ "\n")))
-+)
-+
-+(define (gen-insn-builders)
-+ (string-write
-+ "\
-+/* For each insn there is an @ARCH@_IBLD_<NAME> macro that builds the
-+ instruction in the supplied buffer. For architectures where it's
-+ possible to represent all machine codes as host integer values it
-+ would be nicer to have these return the instruction rather than store
-+ it in BUF. For consistency with variable length ISA's this does not. */
-+
-+"
-+ (lambda () (string-write-map gen-insn-builder (current-insn-list)))
-+ )
-+)
-+
-+; Generate the C code for dealing with operands.
-+
-+(define (/gen-insert-switch)
-+ (logit 2 "Generating insert switch ...\n")
-+ (string-list
-+ "\
-+const char * @arch@_cgen_insert_operand
-+ (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
-+
-+/* Main entry point for operand insertion.
-+
-+ This function is basically just a big switch statement. Earlier versions
-+ used tables to look up the function to use, but
-+ - if the table contains both assembler and disassembler functions then
-+ the disassembler contains much of the assembler and vice-versa,
-+ - there's a lot of inlining possibilities as things grow,
-+ - using a switch statement avoids the function call overhead.
-+
-+ This function could be moved into `parse_insn_normal', but keeping it
-+ separate makes clear the interface between `parse_insn_normal' and each of
-+ the handlers. It's also needed by GAS to insert operands that couldn't be
-+ resolved during parsing. */
-+
-+const char *
-+@arch@_cgen_insert_operand (CGEN_CPU_DESC cd,
-+ int opindex,
-+ CGEN_FIELDS * fields,
-+ CGEN_INSN_BYTES_PTR buffer,
-+ bfd_vma pc ATTRIBUTE_UNUSED)
-+{
-+ const char * errmsg = NULL;
-+ unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
-+
-+ switch (opindex)
-+ {
-+"
-+ (gen-switch 'insert)
-+"
-+ default :
-+ /* xgettext:c-format */
-+ fprintf (stderr, _(\"Unrecognized field %d while building insn.\\n\"),
-+ opindex);
-+ abort ();
-+ }
-+
-+ return errmsg;
-+}\n\n")
-+)
-+
-+(define (/gen-extract-switch)
-+ (logit 2 "Generating extract switch ...\n")
-+ (string-list
-+ "\
-+int @arch@_cgen_extract_operand
-+ (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
-+
-+/* Main entry point for operand extraction.
-+ The result is <= 0 for error, >0 for success.
-+ ??? Actual values aren't well defined right now.
-+
-+ This function is basically just a big switch statement. Earlier versions
-+ used tables to look up the function to use, but
-+ - if the table contains both assembler and disassembler functions then
-+ the disassembler contains much of the assembler and vice-versa,
-+ - there's a lot of inlining possibilities as things grow,
-+ - using a switch statement avoids the function call overhead.
-+
-+ This function could be moved into `print_insn_normal', but keeping it
-+ separate makes clear the interface between `print_insn_normal' and each of
-+ the handlers. */
-+
-+int
-+@arch@_cgen_extract_operand (CGEN_CPU_DESC cd,
-+ int opindex,
-+ CGEN_EXTRACT_INFO *ex_info,
-+ CGEN_INSN_INT insn_value,
-+ CGEN_FIELDS * fields,
-+ bfd_vma pc)
-+{
-+ /* Assume success (for those operands that are nops). */
-+ int length = 1;
-+ unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
-+
-+ switch (opindex)
-+ {
-+"
-+ (gen-switch 'extract)
-+"
-+ default :
-+ /* xgettext:c-format */
-+ fprintf (stderr, _(\"Unrecognized field %d while decoding insn.\\n\"),
-+ opindex);
-+ abort ();
-+ }
-+
-+ return length;
-+}\n\n")
-+)
-+
-+; Utilities of cgen-ibld.in.
-+
-+; Emit a function to call to initialize the ibld tables.
-+
-+(define (/gen-ibld-init-fn)
-+ (string-write
-+ "\
-+/* Function to call before using the instruction builder tables. */
-+
-+void
-+@arch@_cgen_init_ibld_table (CGEN_CPU_DESC cd)
-+{
-+ cd->insert_handlers = & @arch@_cgen_insert_handlers[0];
-+ cd->extract_handlers = & @arch@_cgen_extract_handlers[0];
-+
-+ cd->insert_operand = @arch@_cgen_insert_operand;
-+ cd->extract_operand = @arch@_cgen_extract_operand;
-+
-+ cd->get_int_operand = @arch@_cgen_get_int_operand;
-+ cd->set_int_operand = @arch@_cgen_set_int_operand;
-+ cd->get_vma_operand = @arch@_cgen_get_vma_operand;
-+ cd->set_vma_operand = @arch@_cgen_set_vma_operand;
-+}
-+"
-+ )
-+)
-+
-+; Generate the C header for building instructions.
-+
-+(define (cgen-ibld.h)
-+ (logit 1 "Generating " (current-arch-name) "-ibld.h ...\n")
-+ (string-write
-+ (gen-c-copyright "Instruction builder for @arch@."
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "\
-+#ifndef @ARCH@_IBLD_H
-+#define @ARCH@_IBLD_H
-+
-+"
-+ (lambda () (gen-extra-ibld.h (opc-file-path) (current-arch-name)))
-+ "\n"
-+ gen-insn-builders
-+ "
-+#endif /* @ARCH@_IBLD_H */
-+"
-+ )
-+)
-+
-+; Generate the C support for building instructions.
-+
-+(define (cgen-ibld.in)
-+ (logit 1 "Generating " (current-arch-name) "-ibld.in ...\n")
-+ (string-write
-+ ; No need for copyright, appended to file with one.
-+ "\n"
-+ /gen-insert-switch
-+ /gen-extract-switch
-+ (lambda () (gen-handler-table "insert" opc-insert-handlers))
-+ (lambda () (gen-handler-table "extract" opc-extract-handlers))
-+ /gen-fget-switch
-+ /gen-fset-switch
-+ /gen-ibld-init-fn
-+ )
-+)
-diff -Nur binutils-2.24.orig/cgen/opc-itab.scm binutils-2.24/cgen/opc-itab.scm
---- binutils-2.24.orig/cgen/opc-itab.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/opc-itab.scm 2016-06-30 21:26:12.661893424 +0200
-@@ -0,0 +1,748 @@
-+; Opcode table support.
-+; Copyright (C) 2000, 2005, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+
-+; Append code here to be run before insn parsing/etc.
-+; These are for internal use and aren't intended to appear in .cpu files.
-+; ??? Nothing currently uses them but that might change.
-+
-+(define parse-init-code "")
-+(define insert-init-code "")
-+(define extract-init-code "")
-+(define print-init-code "")
-+
-+; Define CGEN_INIT_{PARSE,INSERT,EXTRACT,PRINT} macros.
-+; ??? These were early escape hatches. Not currently used.
-+
-+(define (/gen-init-macros)
-+ (logit 2 "Generating init macros ...\n")
-+ (string-append
-+ "#define CGEN_INIT_PARSE(od) \\
-+{\\\n"
-+ parse-init-code
-+ "}\n"
-+ "#define CGEN_INIT_INSERT(od) \\
-+{\\\n"
-+ insert-init-code
-+ "}\n"
-+ "#define CGEN_INIT_EXTRACT(od) \\
-+{\\\n"
-+ extract-init-code
-+ "}\n"
-+ "#define CGEN_INIT_PRINT(od) \\
-+{\\\n"
-+ print-init-code
-+ "}\n"
-+ )
-+)
-+
-+; Instruction field support.
-+
-+; Return C code to declare various ifield types,decls.
-+
-+(define (/gen-ifield-decls)
-+ (logit 2 "Generating instruction field decls ...\n")
-+ (string-append
-+ "/* This struct records data prior to insertion or after extraction. */\n"
-+ "struct cgen_fields\n{\n"
-+ ; A special member `length' is used to record the length.
-+ " int length;\n"
-+ (string-map gen-ifield-value-decl (non-derived-ifields (current-ifld-list)))
-+ "};\n\n"
-+ )
-+)
-+
-+; Instruction syntax support.
-+
-+; Extract the operand fields in SYNTAX-STRING.
-+; The result is a list of operand names.
-+; ??? Not currently used, but keep awhile.
-+
-+(define (extract-syntax-operands syntax)
-+ (let loop ((syn syntax) (result nil))
-+
-+ (cond ((= (string-length syn) 0)
-+ (reverse! result))
-+
-+ ((char=? #\\ (string-ref syn 0))
-+ (if (= (string-length syn) 1)
-+ (error "missing char after '\\'" syntax))
-+ (loop (string-drop 2 syn) result))
-+
-+ ((char=? #\$ (string-ref syn 0))
-+ ; Extract the symbol from the string, which will be the name of
-+ ; an operand. Append it to the result.
-+ (if (= (string-length syn) 1)
-+ (error "missing operand name" syntax))
-+ (if (char=? (string-ref syn 1) #\{)
-+ (let ((n (chars-until-delimiter syn #\})))
-+ ; Note that 'n' includes the leading ${.
-+ (case n
-+ ((0) (error "empty operand name" syntax))
-+ ((#f) (error "missing '}'" syntax))
-+ (else (loop (string-drop (+ n 1) syn)
-+ (cons (string->symbol (substring syn 2 n))
-+ result)))))
-+ (let ((n (id-len (string-drop1 syn))))
-+ (if (= n 0)
-+ (error "empty or invalid operand name" syntax))
-+ (loop (string-drop (1+ n) syn)
-+ (cons (string->symbol (substring syn 1 (1+ n)))
-+ result)))))
-+
-+ (else (loop (string-drop1 syn) result))))
-+)
-+
-+; Strip the mnemonic part from SYNTAX.
-+; (ie: everything up to but not including the first space or '$')
-+; If STRIP-MNEM-OPERANDS?, strip them too.
-+
-+(define (strip-mnemonic strip-mnem-operands? syntax)
-+ (let ((space (string-index syntax #\space)))
-+ (if strip-mnem-operands?
-+ (if space
-+ (string-drop space syntax)
-+ "")
-+ (let loop ((syn syntax))
-+ (if (= (string-length syn) 0)
-+ ""
-+ (case (string-ref syn 0)
-+ ((#\space) syn)
-+ ((#\\) (loop (string-drop 2 syn)))
-+ ((#\$) syn)
-+ (else (loop (string-drop1 syn))))))))
-+)
-+
-+; Compute the sequence of syntax bytes for SYNTAX.
-+; STRIP-MNEMONIC? is #t if the mnemonic part is to be stripped off.
-+; STRIP-MNEM-OPERANDS? is #t if any mnemonic operands are to be stripped off.
-+; SYNTAX is a string of text and operands.
-+; OP-MACRO is the macro to call that computes an operand's value.
-+; The resulting syntax is expressed as a sequence of bytes.
-+; Values < 128 are characters that must be matched.
-+; Values >= 128 are 128 + the index into the operand table.
-+
-+(define (compute-syntax strip-mnemonic? strip-mnem-operands? syntax op-macro
-+ isa-name-list)
-+ (let ((context (make-prefix-context "syntax computation"))
-+ (syntax (if strip-mnemonic?
-+ (strip-mnemonic strip-mnem-operands? syntax)
-+ syntax)))
-+
-+ (let loop ((syn syntax) (result ""))
-+ (logit 2 "syn=" syn "\n")
-+ (cond ((= (string-length syn) 0)
-+ (string-append result "0"))
-+
-+ ((char=? #\\ (string-ref syn 0))
-+ (if (= (string-length syn) 1)
-+ (parse-error context "missing char after '\\'" syntax))
-+ (let ((escaped-char (string-ref syn 1))
-+ (remainder (string-drop 2 syn)))
-+ (if (char=? #\\ escaped-char)
-+ (loop remainder (string-append result "'\\\\', "))
-+ (loop remainder (string-append result "'" (string escaped-char) "', ")))))
-+
-+ ((char=? #\$ (string-ref syn 0))
-+ ; Extract the symbol from the string, which will be the name of
-+ ; an operand. Append it to the result.
-+ (if (= (string-length syn) 1)
-+ (parse-error context "missing operand name" syntax))
-+ ; Is it $foo or ${foo}?
-+ (if (char=? (string-ref syn 1) #\{)
-+ (let ((n (chars-until-delimiter syn #\})))
-+ ; Note that 'n' includes the leading ${.
-+ ; FIXME: \} not implemented yet.
-+ (case n
-+ ((0) (parse-error context "empty operand name" syntax))
-+ ((#f) (parse-error context "missing '}'" syntax))
-+ (else (loop (string-drop (+ n 1) syn)
-+ (string-append result op-macro " ("
-+ (string-upcase
-+ (gen-c-symbol
-+ (substring syn 2 n)))
-+ "), ")))))
-+ (let ((n (id-len (string-drop1 syn))))
-+ (if (= n 0)
-+ (parse-error context "empty or invalid operand name" syntax))
-+ (let ((operand (string->symbol (substring syn 1 (1+ n)))))
-+ (if (not (current-op-lookup operand isa-name-list))
-+ (parse-error context "undefined operand " operand syntax)))
-+ (loop (string-drop (1+ n) syn)
-+ (string-append result op-macro " ("
-+ (string-upcase
-+ (gen-c-symbol
-+ (substring syn 1 (1+ n))))
-+ "), ")))))
-+
-+ ; Append the character to the result.
-+ (else (loop (string-drop1 syn)
-+ (string-append result
-+ "'" (string-take1 syn) "', "))))))
-+)
-+
-+; Return C code to define the syntax string for SYNTAX
-+; MNEM is the C value to use to represent the instruction's mnemonic.
-+; OP is the C macro to use to compute an operand's syntax value.
-+; ISA-NAME-LIST is the list of ISA names in which the owning insn lives.
-+
-+(define (gen-syntax-entry mnem op syntax isa-name-list)
-+ (string-append
-+ "{ { "
-+ mnem ", "
-+ ; `mnem' is used to represent the mnemonic, so we always want to strip it
-+ ; from the syntax string, regardless of the setting of `strip-mnemonic?'.
-+ (compute-syntax #t #f syntax op isa-name-list)
-+ " } }")
-+)
-+
-+; Instruction format table support.
-+
-+; Return the table for IFMT, an <iformat> object.
-+
-+(define (/gen-ifmt-table-1 ifmt)
-+ (gen-obj-sanitize
-+ (ifmt-eg-insn ifmt) ; sanitize based on the example insn
-+ (string-list
-+ "static const CGEN_IFMT " (gen-sym ifmt) " ATTRIBUTE_UNUSED = {\n"
-+ " "
-+ (number->string (ifmt-mask-length ifmt)) ", "
-+ (number->string (ifmt-length ifmt)) ", "
-+ "0x" (number->string (ifmt-mask ifmt) 16) ", "
-+ "{ "
-+ (string-list-map (lambda (ifld)
-+ (string-list "{ F (" (ifld-enum ifld #f) ") }, "))
-+ (ifmt-ifields ifmt))
-+ "{ 0 } }\n};\n\n"))
-+)
-+
-+; Generate the insn format table.
-+
-+(define (/gen-ifmt-table)
-+ (string-write
-+ "/* Instruction formats. */\n\n"
-+ (gen-define-with-symcat "F(f) & @arch@_cgen_ifld_table[@ARCH@_" "f]")
-+ (string-list-map /gen-ifmt-table-1 (current-ifmt-list))
-+ "#undef F\n\n"
-+ )
-+)
-+
-+; Parse/insert/extract/print handlers.
-+; Each handler type is recorded in the assembler/disassembler as an array of
-+; pointers to functions. The value recorded in the operand table is the index
-+; into this array. The first element in the array is reserved as index 0 is
-+; special (the "default").
-+;
-+; The handlers are recorded here as associative lists in case we ever want
-+; to record more than just the name.
-+;
-+; Adding a new handler involves
-+; - specifying its name in the .cpu file
-+; - getting its name appended to these tables
-+; - writing the C code
-+;
-+; ??? It might be useful to define the handler in Scheme. Later.
-+
-+(define opc-parse-handlers '((insn-normal)))
-+; (define opc-parse-handlers '((insn-normal) (insn-special0) (insn-special1) (insn-special21) (insn-special22) (insn-special23) (insn-special24) (insn-special3) (insn-special4) (insn-special5) (insn-special6) (insn-special7) (insn-special8)))
-+(define opc-insert-handlers '((insn-normal)))
-+(define opc-extract-handlers '((insn-normal)))
-+(define opc-print-handlers '((insn-normal)))
-+; (define opc-print-handlers '((insn-normal) (insn-special0) (insn-special1) (insn-special21) (insn-special22) (insn-special23) (insn-special24) (insn-special3) (insn-special4) (insn-special5) (insn-special6) (insn-special7) (insn-special8) (insn-special9) (insn-special9) (insn-special10) (insn-special11) (insn-special12) (insn-special13) (insn-special14) (insn-special15) (insn-special16) (insn-special17) (insn-special18) (insn-special19) (insn-special20) (insn-lsmw) (insn-special31) (insn-push-pop)))
-+
-+; FIXME: There currently isn't a spot for specifying special handlers for
-+; each instruction. For now assume we always use the same ones.
-+
-+(define (insn-handlers insn)
-+ (string-append
-+ ; (number->string (assq-lookup-index 'insn-normal opc-parse-handlers 0))
-+ (number->string (assq-lookup-index (insn-handler 'parse insn) opc-parse-handlers 0))
-+ ", "
-+ (number->string (assq-lookup-index 'insn-normal opc-insert-handlers 0))
-+ ", "
-+ (number->string (assq-lookup-index 'insn-normal opc-extract-handlers 0))
-+ ", "
-+ ; (number->string (assq-lookup-index 'insn-normal opc-print-handlers 0))
-+ (number->string (assq-lookup-index (insn-handler 'print insn) opc-print-handlers 0))
-+ )
-+)
-+
-+; Return C code to define the cgen_opcode_handler struct for INSN.
-+; This is intended to be the ultimate escape hatch for the parse/insert/
-+; extract/print handlers. Each entry is an index into a table of handlers.
-+; The escape hatch isn't used yet.
-+
-+(define (gen-insn-handlers insn)
-+ (string-append
-+ "{ "
-+ (insn-handlers insn)
-+ " }"
-+ )
-+)
-+
-+; Handler table support.
-+; There are tables for each of parse/insert/extract/print.
-+
-+; Return C code to define the handler table for NAME with values VALUES.
-+
-+(define (gen-handler-table name values)
-+ (string-append
-+ "cgen_" name "_fn * const @arch@_cgen_" name "_handlers[] = \n{\n"
-+ (string-map (lambda (elm)
-+ (string-append " " name "_"
-+ (gen-c-symbol (car elm))
-+ ",\n"))
-+ values)
-+ "};\n\n"
-+ )
-+)
-+
-+; Instruction table support.
-+
-+; Return a declaration of an enum for all insns.
-+
-+(define (/gen-insn-enum)
-+ (logit 2 "Generating instruction enum ...\n")
-+ (let ((insns (gen-obj-list-enums (non-multi-insns (current-insn-list)))))
-+ (string-list
-+ (gen-enum-decl 'cgen_insn_type "@arch@ instruction types"
-+ "@ARCH@_INSN_"
-+ (cons '(invalid) insns))
-+ "/* Index of `invalid' insn place holder. */\n"
-+ "#define CGEN_INSN_INVALID @ARCH@_INSN_INVALID\n\n"
-+ "/* Total number of insns in table. */\n"
-+ "#define MAX_INSNS ((int) @ARCH@_INSN_"
-+ (string-upcase (gen-c-symbol (caar (list-take -1 insns)))) " + 1)\n\n"
-+ )
-+ )
-+)
-+
-+; Return a reference to the format table entry of INSN.
-+
-+(define (gen-ifmt-entry insn)
-+ (string-append "& " (gen-sym (insn-ifmt insn)))
-+)
-+
-+; Return the definition of an instruction value entry.
-+
-+(define (gen-ivalue-entry insn)
-+ (string-list "{ "
-+ "0x" (number->string (insn-value insn) 16)
-+ (if #f ; (ifmt-opcodes-beyond-base? (insn-ifmt insn))
-+ (string-list ", { "
-+ ; ??? wip: opcode values beyond the base insn
-+ "0 }")
-+ "")
-+ " }")
-+)
-+
-+; Generate an insn opcode entry for INSN.
-+; ALL-ATTRS is a list of all instruction attributes.
-+; NUM-NON-BOOLS is the number of non-boolean insn attributes.
-+
-+(define (/gen-insn-opcode-entry insn all-attrs num-non-bools)
-+ (gen-obj-sanitize
-+ insn
-+ (string-list
-+ "/* " (insn-syntax insn) " */\n"
-+ " {\n"
-+ " " (gen-insn-handlers insn) ",\n"
-+ " "
-+ (gen-syntax-entry "MNEM" "OP" (insn-syntax insn) (obj-isa-list insn))
-+ ",\n"
-+ ; ??? 'twould save space to put a pointer here and record format separately
-+ " " (gen-ifmt-entry insn) ", "
-+ ;"0x" (number->string (insn-value insn) 16) ",\n"
-+ (gen-ivalue-entry insn) "\n"
-+ " },\n"))
-+)
-+
-+; Generate insn table.
-+
-+(define (/gen-insn-opcode-table)
-+ (logit 2 "Generating instruction opcode table ...\n")
-+ (let* ((all-attrs (current-insn-attr-list))
-+ (num-non-bools (attr-count-non-bools all-attrs)))
-+ (string-write
-+ (gen-define-with-symcat "A(a) (1 << CGEN_INSN_" "a)")
-+ (gen-define-with-symcat "OPERAND(op) @ARCH@_OPERAND_" "op")
-+ "\
-+#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
-+#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
-+
-+/* The instruction table. */
-+
-+static const CGEN_OPCODE @arch@_cgen_insn_opcode_table[MAX_INSNS] =
-+{
-+ /* Special null first entry.
-+ A `num' value of zero is thus invalid.
-+ Also, the special `invalid' insn resides here. */
-+ { { 0, 0, 0, 0 }, {{0}}, 0, {0}},\n"
-+
-+ (lambda ()
-+ (string-write-map (lambda (insn)
-+ (logit 3 "Generating insn opcode entry for " (obj:name insn) " ...\n")
-+ (/gen-insn-opcode-entry insn all-attrs
-+ num-non-bools))
-+ (non-multi-insns (current-insn-list))))
-+
-+ "\
-+};
-+
-+#undef A
-+#undef OPERAND
-+#undef MNEM
-+#undef OP
-+
-+"
-+ )
-+ )
-+)
-+
-+; Return assembly/disassembly hashing support.
-+
-+(define (/gen-hash-fns)
-+ (string-list
-+ "\
-+#ifndef CGEN_ASM_HASH_P
-+#define CGEN_ASM_HASH_P(insn) 1
-+#endif
-+
-+#ifndef CGEN_DIS_HASH_P
-+#define CGEN_DIS_HASH_P(insn) 1
-+#endif
-+
-+/* Return non-zero if INSN is to be added to the hash table.
-+ Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
-+
-+static int
-+asm_hash_insn_p (insn)
-+ const CGEN_INSN *insn ATTRIBUTE_UNUSED;
-+{
-+ return CGEN_ASM_HASH_P (insn);
-+}
-+
-+static int
-+dis_hash_insn_p (insn)
-+ const CGEN_INSN *insn;
-+{
-+ /* If building the hash table and the NO-DIS attribute is present,
-+ ignore. */
-+ if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
-+ return 0;
-+ return CGEN_DIS_HASH_P (insn);
-+}
-+
-+#ifndef CGEN_ASM_HASH
-+#define CGEN_ASM_HASH_SIZE 127
-+#ifdef CGEN_MNEMONIC_OPERANDS
-+#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
-+#else
-+#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
-+#endif
-+#endif
-+
-+/* It doesn't make much sense to provide a default here,
-+ but while this is under development we do.
-+ BUFFER is a pointer to the bytes of the insn, target order.
-+ VALUE is the first base_insn_bitsize bits as an int in host order. */
-+
-+#ifndef CGEN_DIS_HASH
-+#define CGEN_DIS_HASH_SIZE 256
-+#define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
-+#endif
-+
-+/* The result is the hash value of the insn.
-+ Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
-+
-+static unsigned int
-+asm_hash_insn (mnem)
-+ const char * mnem;
-+{
-+ return CGEN_ASM_HASH (mnem);
-+}
-+
-+/* BUF is a pointer to the bytes of the insn, target order.
-+ VALUE is the first base_insn_bitsize bits as an int in host order. */
-+
-+static unsigned int
-+dis_hash_insn (buf, value)
-+ const char * buf ATTRIBUTE_UNUSED;
-+ CGEN_INSN_INT value ATTRIBUTE_UNUSED;
-+{
-+ return CGEN_DIS_HASH (buf, value);
-+}
-+\n"
-+ )
-+)
-+
-+; Hash support decls.
-+
-+(define (/gen-hash-decls)
-+ (string-list
-+ "\
-+/* The hash functions are recorded here to help keep assembler code out of
-+ the disassembler and vice versa. */
-+
-+static int asm_hash_insn_p (const CGEN_INSN *);
-+static unsigned int asm_hash_insn (const char *);
-+static int dis_hash_insn_p (const CGEN_INSN *);
-+static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
-+\n"
-+ )
-+)
-+
-+; Macro insn support.
-+
-+; Return a macro-insn expansion entry.
-+
-+(define (/gen-miexpn-entry entry)
-+ ; FIXME: wip
-+ "0, "
-+)
-+
-+; Return a macro-insn table entry.
-+; ??? wip, not currently used.
-+
-+(define (/gen-minsn-table-entry minsn all-attrs num-non-bools)
-+ (gen-obj-sanitize
-+ minsn
-+ (string-list
-+ " /* " (minsn-syntax minsn) " */\n"
-+ " {\n"
-+ " "
-+ "-1, " ; macro-insns are not currently enumerated, no current need to
-+ "\"" (obj:str-name minsn) "\", "
-+ "\"" (minsn-mnemonic minsn) "\",\n"
-+ " "
-+ (gen-syntax-entry "MNEM" "OP" (minsn-syntax minsn) (obj-isa-list minsn))
-+ ",\n"
-+ " (PTR) & macro_" (gen-sym minsn) "_expansions[0],\n"
-+ " "
-+ (gen-obj-attr-defn 'minsn minsn all-attrs num-non-bools gen-insn-attr-mask)
-+ "\n"
-+ " },\n"))
-+)
-+
-+; Return a macro-insn opcode table entry.
-+; ??? wip, not currently used.
-+
-+(define (/gen-minsn-opcode-entry minsn all-attrs num-non-bools)
-+ (gen-obj-sanitize
-+ minsn
-+ (string-list
-+ " /* " (minsn-syntax minsn) " */\n"
-+ " {\n"
-+ " "
-+ "-1, " ; macro-insns are not currently enumerated, no current need to
-+ "\"" (obj:str-name minsn) "\", "
-+ "\"" (minsn-mnemonic minsn) "\",\n"
-+ " "
-+ (gen-syntax-entry "MNEM" "OP" (minsn-syntax minsn) (obj-isa-list minsn))
-+ ",\n"
-+ " (PTR) & macro_" (gen-sym minsn) "_expansions[0],\n"
-+ " "
-+ (gen-obj-attr-defn 'minsn minsn all-attrs num-non-bools gen-insn-attr-mask)
-+ "\n"
-+ " },\n"))
-+)
-+
-+; Macro insn expansion has one basic form, but we optimize the common case
-+; of unconditionally expanding the input text to one instruction.
-+; The general form is a Scheme expression that is interpreted at runtime to
-+; decide how to perform the expansion. Yes, that means having a (perhaps
-+; minimal) Scheme interpreter in the assembler.
-+; Another thing to do is have a builder for each real insn so instead of
-+; expanding to text, the macro-expansion could invoke the builder for each
-+; expanded-to insn.
-+
-+(define (/gen-macro-insn-table)
-+ (logit 2 "Generating macro-instruction table ...\n")
-+ (let* ((minsn-list (map (lambda (minsn)
-+ (if (has-attr? minsn 'ALIAS)
-+ (minsn-make-alias (make-prefix-context "gen-macro-insn-table")
-+ minsn)
-+ minsn))
-+ (current-minsn-list)))
-+ (all-attrs (current-insn-attr-list))
-+ (num-non-bools (attr-count-non-bools all-attrs)))
-+ (string-write
-+ "/* Formats for ALIAS macro-insns. */\n\n"
-+ (gen-define-with-symcat "F(f) & @arch@_cgen_ifld_table[@ARCH@_" "f]")
-+ (lambda ()
-+ (string-write-map /gen-ifmt-table-1
-+ (map insn-ifmt (find (lambda (minsn)
-+ (has-attr? minsn 'ALIAS))
-+ minsn-list))))
-+ "#undef F\n\n"
-+ "/* Each non-simple macro entry points to an array of expansion possibilities. */\n\n"
-+ (lambda ()
-+ (string-write-map (lambda (minsn)
-+ (if (has-attr? minsn 'ALIAS)
-+ ""
-+ (string-append
-+ "static const CGEN_MINSN_EXPANSION macro_" (gen-sym minsn) "_expansions[] =\n"
-+ "{\n"
-+ (string-map /gen-miexpn-entry
-+ (minsn-expansions minsn))
-+ " { 0, 0 }\n};\n\n")))
-+ minsn-list))
-+ (gen-define-with-symcat "A(a) (1 << CGEN_INSN_" "a)")
-+ (gen-define-with-symcat "OPERAND(op) @ARCH@_OPERAND_" "op")
-+ "\
-+#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
-+#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
-+
-+/* The macro instruction table. */
-+
-+static const CGEN_IBASE @arch@_cgen_macro_insn_table[] =
-+{
-+"
-+ (lambda ()
-+ (string-write-map (lambda (minsn)
-+ (logit 3 "Generating macro-insn table entry for " (obj:name minsn) " ...\n")
-+ ; Simple macro-insns are emitted as aliases of real insns.
-+ (if (has-attr? minsn 'ALIAS)
-+ (gen-insn-table-entry minsn all-attrs num-non-bools)
-+ (/gen-minsn-table-entry minsn all-attrs num-non-bools)))
-+ minsn-list))
-+ "\
-+};
-+
-+/* The macro instruction opcode table. */
-+
-+static const CGEN_OPCODE @arch@_cgen_macro_insn_opcode_table[] =
-+{\n"
-+ (lambda ()
-+ (string-write-map (lambda (minsn)
-+ (logit 3 "Generating macro-insn table entry for " (obj:name minsn) " ...\n")
-+ ; Simple macro-insns are emitted as aliases of real insns.
-+ (if (has-attr? minsn 'ALIAS)
-+ (/gen-insn-opcode-entry minsn all-attrs num-non-bools)
-+ (/gen-minsn-opcode-entry minsn all-attrs num-non-bools)))
-+ minsn-list))
-+ "\
-+};
-+
-+#undef A
-+#undef OPERAND
-+#undef MNEM
-+#undef OP
-+\n"
-+ ))
-+)
-+
-+; Emit a function to call to initialize the opcode table.
-+
-+(define (/gen-opcode-init-fn)
-+ (string-write
-+ "\
-+/* Set the recorded length of the insn in the CGEN_FIELDS struct. */
-+
-+static void
-+set_fields_bitsize (CGEN_FIELDS *fields, int size)
-+{
-+ CGEN_FIELDS_BITSIZE (fields) = size;
-+}
-+
-+/* Function to call before using the operand instance table.
-+ This plugs the opcode entries and macro instructions into the cpu table. */
-+
-+void
-+@arch@_cgen_init_opcode_table (CGEN_CPU_DESC cd)
-+{
-+ int i;
-+ int num_macros = (sizeof (@arch@_cgen_macro_insn_table) /
-+ sizeof (@arch@_cgen_macro_insn_table[0]));
-+ const CGEN_IBASE *ib = & @arch@_cgen_macro_insn_table[0];
-+ const CGEN_OPCODE *oc = & @arch@_cgen_macro_insn_opcode_table[0];
-+ CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
-+
-+ /* This test has been added to avoid a warning generated
-+ if memset is called with a third argument of value zero. */
-+ if (num_macros >= 1)
-+ memset (insns, 0, num_macros * sizeof (CGEN_INSN));
-+ for (i = 0; i < num_macros; ++i)
-+ {
-+ insns[i].base = &ib[i];
-+ insns[i].opcode = &oc[i];
-+ @arch@_cgen_build_insn_regex (& insns[i]);
-+ }
-+ cd->macro_insn_table.init_entries = insns;
-+ cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
-+ cd->macro_insn_table.num_init_entries = num_macros;
-+
-+ oc = & @arch@_cgen_insn_opcode_table[0];
-+ insns = (CGEN_INSN *) cd->insn_table.init_entries;
-+ for (i = 0; i < MAX_INSNS; ++i)
-+ {
-+ insns[i].opcode = &oc[i];
-+ @arch@_cgen_build_insn_regex (& insns[i]);
-+ }
-+
-+ cd->sizeof_fields = sizeof (CGEN_FIELDS);
-+ cd->set_fields_bitsize = set_fields_bitsize;
-+
-+ cd->asm_hash_p = asm_hash_insn_p;
-+ cd->asm_hash = asm_hash_insn;
-+ cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
-+
-+ cd->dis_hash_p = dis_hash_insn_p;
-+ cd->dis_hash = dis_hash_insn;
-+ cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
-+}
-+"
-+ )
-+)
-+
-+; Top level C code generators
-+
-+; FIXME: Create enum objects for all the enums we explicitly declare here.
-+; Then they'd be usable and we wouldn't have to special case them here.
-+
-+(define (cgen-opc.h)
-+ (logit 1 "Generating " (current-arch-name) "-opc.h ...\n")
-+ (string-write
-+ (gen-c-copyright "Instruction opcode header for @arch@."
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "\
-+#ifndef @ARCH@_OPC_H
-+#define @ARCH@_OPC_H
-+
-+"
-+ (lambda () (gen-extra-opc.h (opc-file-path) (current-arch-name)))
-+ /gen-insn-enum
-+ /gen-ifield-decls
-+ /gen-init-macros
-+ "
-+
-+#endif /* @ARCH@_OPC_H */
-+"
-+ )
-+)
-+
-+; This file contains the instruction opcode table.
-+
-+(define (cgen-opc.c)
-+ (logit 1 "Generating " (current-arch-name) "-opc.c ...\n")
-+ (string-write
-+ (gen-c-copyright "Instruction opcode table for @arch@."
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "\
-+#include \"sysdep.h\"
-+#include \"ansidecl.h\"
-+#include \"bfd.h\"
-+#include \"symcat.h\"
-+#include \"@prefix@-desc.h\"
-+#include \"@prefix@-opc.h\"
-+#include \"libiberty.h\"
-+\n"
-+ (lambda () (gen-extra-opc.c (opc-file-path) (current-arch-name)))
-+ /gen-hash-decls
-+ /gen-ifmt-table
-+ /gen-insn-opcode-table
-+ /gen-macro-insn-table
-+ /gen-hash-fns
-+ /gen-opcode-init-fn
-+ )
-+)
-diff -Nur binutils-2.24.orig/cgen/opcodes.scm binutils-2.24/cgen/opcodes.scm
---- binutils-2.24.orig/cgen/opcodes.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/opcodes.scm 2016-06-30 21:26:12.665893579 +0200
-@@ -0,0 +1,843 @@
-+; General cpu info generator support.
-+; Copyright (C) 2000, 2002, 2005, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+
-+; Global state variables.
-+
-+; Specify which application.
-+(set! APPLICATION 'OPCODES)
-+
-+; Records the -OPC arg which specifies the path to the .opc file.
-+(define /opc-file-path #f)
-+(define (opc-file-path)
-+ (if /opc-file-path
-+ /opc-file-path
-+ (error ".opc file unspecified, missing -OPC argument"))
-+)
-+(define (set-opc-file-path! path)
-+ (set! /opc-file-path path)
-+)
-+
-+; Return #t if the -OPC parameter was specified.
-+
-+(define (opc-file-provided?)
-+ (and /opc-file-path #t)
-+)
-+
-+; Boolean indicating if we're to build the operand instance table.
-+; The default is no, since only the m32r uses it at present.
-+; ??? Simulator tracing support could use it.
-+; ??? Might be lazily built at runtime by parsing the semantic code
-+; (which would be recorded in the insn table).
-+; FIXME: Referenced outside this file in opc-opinst.scm.
-+(define /opcodes-build-operand-instance-table? #f)
-+
-+; String containing copyright text.
-+(define CURRENT-COPYRIGHT #f)
-+
-+; String containing text defining the package we're generating code for.
-+(define CURRENT-PACKAGE #f)
-+
-+; Initialize the options.
-+
-+(define (option-init!)
-+ (set! /opcodes-build-operand-instance-table? #f)
-+ (set! CURRENT-COPYRIGHT copyright-fsf)
-+ (set! CURRENT-PACKAGE package-gnu-binutils-gdb)
-+ *UNSPECIFIED*
-+)
-+
-+; Handle an option passed in from the command line.
-+
-+(define (option-set! name value)
-+ (case name
-+ ((opinst) (set! /opcodes-build-operand-instance-table? #t))
-+ ((copyright) (cond ((equal? value '("fsf"))
-+ (set! CURRENT-COPYRIGHT copyright-fsf))
-+ ((equal? value '("redhat"))
-+ (set! CURRENT-COPYRIGHT copyright-red-hat))
-+ (else (error "invalid copyright value" value))))
-+ ((package) (cond ((equal? value '("binutils"))
-+ (set! CURRENT-PACKAGE package-gnu-binutils-gdb))
-+ ((equal? value '("gnusim"))
-+ (set! CURRENT-PACKAGE package-gnu-simulators))
-+ ((equal? value '("cygsim"))
-+ (set! CURRENT-PACKAGE package-red-hat-simulators))
-+ (else (error "invalid package value" value))))
-+ (else (error "unknown option" name))
-+ )
-+ *UNSPECIFIED*
-+)
-+
-+; Instruction fields support code.
-+
-+; Default type of variable to use to hold ifield value.
-+
-+(define (gen-ifield-default-type)
-+ ; FIXME: Use long for now.
-+ "long"
-+)
-+
-+; Given field F, return a C definition of a variable big enough to hold
-+; its value.
-+
-+(define (gen-ifield-value-decl f)
-+ (gen-obj-sanitize f (string-append " "
-+ (gen-ifield-default-type)
-+ " " (gen-sym f) ";\n"))
-+)
-+
-+; Return name of function to call to insert the value of <ifield> F
-+; into an insn.
-+
-+(define (ifld-insert-fn-name f)
-+ "insert_normal"
-+)
-+
-+; Return name of function to call to extract the value of <ifield> F
-+; into an insn.
-+
-+(define (ifld-extract-fn-name f)
-+ "extract_normal"
-+)
-+
-+; Default routine to emit C code to insert a field in an insn.
-+
-+(method-make!
-+ <ifield> 'gen-insert
-+ (lambda (self operand)
-+ (let* ((encode (elm-get self 'encode))
-+ (need-extra? encode) ; use to also handle operand's `insert' field
-+ (varname (gen-operand-result-var self)))
-+ (string-append
-+ (if need-extra?
-+ (string-append " {\n"
-+ " "
-+ (gen-ifield-default-type)
-+ " value = " varname ";\n")
-+ "")
-+ (if encode
-+ (string-append " value = "
-+ ;; NOTE: ENCODE is either, e.g.,
-+ ;; ((value pc) (sra <mode> value 1))
-+ ;; or
-+ ;; (((<mode> value) (<mode> pc)) (sra <mode> value 1))
-+ (let ((expr (cadr encode))
-+ (value (if (symbol? (caar encode)) (caar encode) (cadr (caar encode))))
-+ (pc (if (symbol? (cadar encode)) (cadar encode) (cadr (cadar encode)))))
-+ (rtl-c DFLT
-+ (obj-isa-list self)
-+ (list (list value (obj:name (ifld-decode-mode self)) "value")
-+ (list pc 'IAI "pc"))
-+ expr))
-+ ";\n")
-+ "")
-+ (if need-extra?
-+ " "
-+ "")
-+ " errmsg = "
-+ (ifld-insert-fn-name self)
-+ " (cd, "
-+ (if need-extra?
-+ "value"
-+ varname)
-+ ", "
-+ ; We explicitly pass the attributes here rather than look them up
-+ ; to give the code more optimization opportunities.
-+ ; ??? Maybe when fields are recorded in opc.c, stop doing this, and
-+ ; pass a pointer to the recorded attributes instead.
-+ (gen-bool-attrs (if (eq? (mode:class (ifld-mode self)) 'INT)
-+ (atlist-cons (bool-attr-make 'SIGNED #t)
-+ (obj-atlist self))
-+ (obj-atlist self))
-+ gen-attr-mask)
-+ ", " (number->string (ifld-word-offset self))
-+ ", " (number->string (ifld-start self))
-+ ", " (number->string (ifld-length self))
-+ ", " (number->string (ifld-word-length self))
-+ ", total_length"
-+ ", buffer"
-+ ");\n"
-+ (if need-extra?
-+ " }\n"
-+ "")
-+ )))
-+)
-+
-+; Default routine to emit C code to extract a field from an insn.
-+
-+(method-make!
-+ <ifield> 'gen-extract
-+ (lambda (self operand)
-+ (let* ((decode (elm-get self 'decode))
-+ (need-extra? decode) ; use to also handle operand's `extract' field
-+ (varname (gen-operand-result-var self)))
-+ (string-append
-+ (if need-extra?
-+ (string-append " {\n "
-+ (gen-ifield-default-type)
-+ " value;\n ")
-+ "")
-+ " length = "
-+ (ifld-extract-fn-name self)
-+ " (cd, ex_info, insn_value, "
-+ ; We explicitly pass the attributes here rather than look them up
-+ ; to give the code more optimization opportunities.
-+ ; ??? Maybe when fields are recorded in opc.c, stop doing this, and
-+ ; pass a pointer to the recorded attributes instead.
-+ (gen-bool-attrs (if (eq? (mode:class (ifld-mode self)) 'INT)
-+ (atlist-cons (bool-attr-make 'SIGNED #t)
-+ (obj-atlist self))
-+ (obj-atlist self))
-+ gen-attr-mask)
-+ ", " (number->string (ifld-word-offset self))
-+ ", " (number->string (ifld-start self))
-+ ", " (number->string (ifld-length self))
-+ ", " (number->string (ifld-word-length self))
-+ ", total_length"
-+ ", pc"
-+ ", & "
-+ (if need-extra?
-+ "value"
-+ varname)
-+ ");\n"
-+ (if decode
-+ (string-append " value = "
-+ ;; NOTE: DECODE is either, e.g.,
-+ ;; ((value pc) (sll DI value 1))
-+ ;; or
-+ ;; (((<mode> value) (<mode> pc)) (sll DI value 1))
-+ (let ((expr (cadr decode))
-+ (value (if (symbol? (caar decode)) (caar decode) (cadr (caar decode))))
-+ (pc (if (symbol? (cadar decode)) (cadar decode) (cadr (cadar decode)))))
-+ (rtl-c DFLT
-+ (obj-isa-list self)
-+ (list (list value (obj:name (ifld-decode-mode self)) "value")
-+ (list pc 'IAI "pc"))
-+ expr))
-+ ";\n")
-+ "")
-+ (if need-extra?
-+ (string-append " " varname " = value;\n"
-+ " }\n")
-+ "")
-+ )))
-+)
-+
-+; gen-insert of multi-ifields
-+
-+(method-make!
-+ <multi-ifield> 'gen-insert
-+ (lambda (self operand)
-+ (let* ((varname (gen-operand-result-var self))
-+ (encode (elm-get self 'encode))
-+ (need-extra? encode))
-+ (string-list
-+ " {\n"
-+ (if need-extra?
-+ (string-append " " varname " = "
-+ (let ((expr (cadr encode))
-+ (value (caar encode))
-+ (pc (cadar encode)))
-+ (rtl-c DFLT
-+ (obj-isa-list self)
-+ (list (list value (obj:name (ifld-decode-mode self)) varname)
-+ (list pc 'IAI "pc"))
-+ expr))
-+ ";\n")
-+ "")
-+ (let ((expr (elm-get self 'insert)))
-+ (rtl-c VOID (obj-isa-list self) nil expr))
-+ (string-list-map (lambda (subfld)
-+ (string-list
-+ " "
-+ (send subfld 'gen-insert operand)
-+ " if (errmsg)\n"
-+ " break;\n"))
-+ (elm-get self 'subfields))
-+ " }\n"
-+ )))
-+)
-+
-+; gen-insert of derived-operands
-+
-+(method-make!
-+ <derived-operand> 'gen-insert
-+ (lambda (self operand)
-+ " abort();\n")
-+)
-+
-+; gen-extract of multi-ifields
-+
-+(method-make!
-+ <multi-ifield> 'gen-extract
-+ (lambda (self operand)
-+ (let* ((varname (gen-operand-result-var self))
-+ (decode (elm-get self 'decode))
-+ (need-extra? decode))
-+ (string-list
-+ " {\n"
-+ (string-list-map (lambda (subfld)
-+ (string-list
-+ " "
-+ (send subfld 'gen-extract operand)
-+ " if (length <= 0) break;\n"
-+ ))
-+ (elm-get self 'subfields))
-+ (let ((expr (elm-get self 'extract)))
-+ (rtl-c VOID (obj-isa-list self) nil expr))
-+ (if need-extra?
-+ (string-append " " varname " = "
-+ (let ((expr (cadr decode))
-+ (value (caar decode))
-+ (pc (cadar decode)))
-+ (rtl-c DFLT
-+ (obj-isa-list self)
-+ (list (list value (obj:name (ifld-decode-mode self)) varname)
-+ (list pc 'IAI "pc"))
-+ expr))
-+ ";\n")
-+ "")
-+ " }\n"
-+ )))
-+)
-+
-+
-+(method-make!
-+ <derived-operand> 'gen-extract
-+ (lambda (self operand)
-+ " abort();\n")
-+)
-+
-+;(method-make!
-+; <derived-operand> 'gen-extract
-+; (lambda (self operand)
-+; (string-list
-+; " {\n"
-+; (string-list-map (lambda (subop)
-+; (string-list
-+; " " (send subop 'gen-extract operand)
-+; " if (length <= 0)\n"
-+; " break;\n"))
-+; (elm-get self 'args))
-+; " }\n"
-+; ))
-+;)
-+
-+
-+; Hardware index support code.
-+
-+(method-make!
-+ <hw-index> 'gen-insert
-+ (lambda (self operand)
-+ (case (hw-index:type self)
-+ ((ifield)
-+ (send (hw-index:value self) 'gen-insert operand))
-+ (else
-+ "")))
-+)
-+
-+(method-make!
-+ <hw-index> 'gen-extract
-+ (lambda (self operand)
-+ (case (hw-index:type self)
-+ ((ifield)
-+ (send (hw-index:value self) 'gen-extract operand))
-+ (else
-+ ""))))
-+
-+; HW-ASM is the base class for supporting hardware elements in the opcode table
-+; (aka assembler/disassembler).
-+
-+; Utility to return C code to parse a number of <mode> MODE for an operand.
-+; RESULT-VAR-NAME is a string containing the variable to store the
-+; parsed number in.
-+; PARSE-FN is the name of the function to call or #f to use the default.
-+; OP-ENUM is the enum of the operand.
-+
-+(define (/gen-parse-number mode parse-fn op-enum result-var-name)
-+ (string-append
-+ " errmsg = "
-+ ; Use operand's special parse function if there is one, otherwise compute
-+ ; the function's name from the mode.
-+ (or parse-fn
-+ (case (obj:name mode)
-+ ((QI HI SI INT) "cgen_parse_signed_integer")
-+ ((BI UQI UHI USI UINT) "cgen_parse_unsigned_integer")
-+ (else (error "unsupported (as yet) mode for parsing"
-+ (obj:name mode)))))
-+ " (cd, strp, "
-+ op-enum
-+ ", "
-+ ; This is to pacify gcc 4.x which will complain about
-+ ; incorrect signed-ness of pointers passed to functions.
-+ (case (obj:name mode)
-+ ((QI HI SI INT) "(long *)")
-+ ((BI UQI UHI USI UINT) "(unsigned long *)")
-+ )
-+ " (& " result-var-name
-+ "));\n"
-+ )
-+)
-+
-+; Utility to return C code to parse an address.
-+; RESULT-VAR-NAME is a string containing the variable to store the
-+; parsed number in.
-+; PARSE-FN is the name of the function to call or #f to use the default.
-+; OP-ENUM is the enum of the operand.
-+
-+(define (/gen-parse-address parse-fn op-enum result-var-name)
-+ (string-append
-+ " {\n"
-+ " bfd_vma value = 0;\n"
-+ " errmsg = "
-+ ; Use operand's special parse function if there is one.
-+ (or parse-fn
-+ "cgen_parse_address")
-+ " (cd, strp, "
-+ op-enum
-+ ", 0, " ; opinfo arg
-+ "NULL, " ; result_type arg (FIXME)
-+ " & value);\n"
-+ " " result-var-name " = value;\n"
-+ " }\n"
-+ )
-+)
-+
-+; Return C code to parse an expression.
-+
-+(method-make!
-+ <hw-asm> 'gen-parse
-+ (lambda (self operand)
-+ (let ((mode (elm-get self 'mode))
-+ (result-var
-+ (case (hw-index:type (op:index operand))
-+ ((ifield) (gen-operand-result-var (op-ifield operand)))
-+ (else "junk"))))
-+ (if (address? (op:type operand))
-+ (/gen-parse-address (send operand 'gen-function-name 'parse)
-+ (op-enum operand)
-+ result-var)
-+ (/gen-parse-number mode (send operand 'gen-function-name 'parse)
-+ (op-enum operand)
-+ result-var))))
-+)
-+
-+; Default method to emit C code to print a hardware element.
-+
-+(method-make!
-+ <hw-asm> 'gen-print
-+ (lambda (self operand)
-+ (let ((value
-+ (case (hw-index:type (op:index operand))
-+ ((ifield) (gen-operand-result-var (op-ifield operand)))
-+ (else "0"))))
-+ (string-append
-+ " "
-+ (or (send operand 'gen-function-name 'print)
-+ (and (address? (op:type operand))
-+ "print_address")
-+ "print_normal")
-+; (or (send operand 'gen-function-name 'print)
-+; (case (obj:name (elm-get self 'mode))
-+; ((QI HI SI INT) "print_signed")
-+; ((BI UQI UHI USI UINT) "print_unsigned")
-+; (else (error "unsupported (as yet) mode for printing"
-+; (obj:name (elm-get self 'mode))))))
-+ " (cd, info, "
-+ value
-+ ", "
-+ ; We explicitly pass the attributes here rather than look them up
-+ ; to give the code more optimization opportunities.
-+ (gen-bool-attrs (if (eq? (mode:class (elm-get self 'mode)) 'INT)
-+ (atlist-cons (bool-attr-make 'SIGNED #t)
-+ (obj-atlist operand))
-+ (obj-atlist operand))
-+ gen-attr-mask)
-+ ;(gen-bool-attrs (obj-atlist operand) gen-attr-mask)
-+ ", pc, length"
-+ ");\n"
-+ )))
-+)
-+
-+; Keyword support.
-+
-+; Return C code to parse a keyword.
-+
-+(method-make!
-+ <keyword> 'gen-parse
-+ (lambda (self operand)
-+ (let ((result-var
-+ (case (hw-index:type (op:index operand))
-+ ((ifield) (gen-operand-result-var (op-ifield operand)))
-+ (else "junk"))))
-+ (string-append
-+ " errmsg = "
-+ (or (send operand 'gen-function-name 'parse)
-+ "cgen_parse_keyword")
-+ " (cd, strp, "
-+ (send self 'gen-ref) ", "
-+ ;(op-enum operand) ", "
-+ "& " result-var
-+ ");\n"
-+ )))
-+)
-+
-+; Return C code to print a keyword.
-+
-+(method-make!
-+ <keyword> 'gen-print
-+ (lambda (self operand)
-+ (let ((value
-+ (case (hw-index:type (op:index operand))
-+ ((ifield) (gen-operand-result-var (op-ifield operand)))
-+ (else "0"))))
-+ (string-append
-+ " "
-+ (or (send operand 'gen-function-name 'print)
-+ "print_keyword")
-+ " (cd, "
-+ "info" ; The disassemble_info argument to print_insn.
-+ ", "
-+ (send self 'gen-ref)
-+ ", " value
-+ ", "
-+ ; We explicitly pass the attributes here rather than look them up
-+ ; to give the code more optimization opportunities.
-+ (gen-bool-attrs (obj-atlist operand) gen-attr-mask)
-+ ");\n"
-+ )))
-+)
-+
-+; Hardware support.
-+
-+; For registers, use the indices field. Ignore values.
-+; ??? Not that that will always be the case.
-+
-+(method-make-forward! <hw-register> 'indices '(gen-parse gen-print))
-+
-+; No such support for memory yet.
-+
-+(method-make!
-+ <hw-memory> 'gen-parse
-+ (lambda (self operand)
-+ (error "gen-parse of memory not supported yet"))
-+)
-+
-+(method-make!
-+ <hw-memory> 'gen-print
-+ (lambda (self operand)
-+ (error "gen-print of memory not supported yet"))
-+)
-+
-+; For immediates, use the values field. Ignore indices.
-+; ??? Not that that will always be the case.
-+
-+(method-make-forward! <hw-immediate> 'values '(gen-parse gen-print))
-+
-+; For addresses, use the values field. Ignore indices.
-+
-+(method-make-forward! <hw-address> 'values '(gen-parse gen-print))
-+
-+; Generate the C code for dealing with operands.
-+; This code is inserted into cgen-{ibld,asm,dis}.in above the insn routines
-+; so that it can be inlined if desired. ??? Actually this isn't always the
-+; case but this is minutiae to be dealt with much later.
-+
-+; Generate the guts of a C switch to handle an operation for all operands.
-+; WHAT is one of fget/fset/parse/insert/extract/print.
-+;
-+; The "f" prefix (e.g. set -> fset) is for "field" to distinguish the
-+; operations from similar ones in other contexts. ??? I'd prefer to come
-+; up with better names for fget/fset but I haven't come up with anything
-+; satisfactory yet.
-+
-+(define (gen-switch what)
-+ (string-list-map
-+ (lambda (ops)
-+ ; OPS is a list of operands with the same name that for whatever reason
-+ ; were defined separately.
-+ (logit 3 (string/symbol-append
-+ "Processing " (obj:str-name (car ops)) " " what " ...\n"))
-+ (if (= (length ops) 1)
-+ (gen-obj-sanitize
-+ (car ops)
-+ (string-list
-+ " case @ARCH@_OPERAND_"
-+ (string-upcase (gen-sym (car ops)))
-+ " :\n"
-+ (send (car ops) (symbol-append 'gen- what) (car ops))
-+ " break;\n"))
-+ (string-list
-+ ; FIXME: operand name doesn't get sanitized.
-+ " case @ARCH@_OPERAND_"
-+ (string-upcase (gen-sym (car ops)))
-+ " :\n"
-+ ; There's more than one operand defined with this name, so we
-+ ; have to distinguish them.
-+ ; FIXME: Unfinished.
-+ (string-list-map (lambda (op)
-+ (gen-obj-sanitize
-+ op
-+ (string-list
-+ (send op (symbol-append 'gen- what) op)
-+ )))
-+ ops)
-+ " break;\n"
-+ )))
-+ (op-sort (find (lambda (op) (and (not (has-attr? op 'SEM-ONLY))
-+ (not (anyof-operand? op))
-+ (not (derived-operand? op))))
-+ (current-op-list))))
-+)
-+
-+; Operand support.
-+
-+; Return the function name to use for WHAT or #f if there isn't a special one.
-+; WHAT is one of fget/fset/parse/insert/extract/print.
-+
-+(method-make!
-+ <operand> 'gen-function-name
-+ (lambda (self what)
-+ (let ((handlers (elm-get self 'handlers)))
-+ (let ((fn (assq-ref handlers what)))
-+ (and fn (string-append (symbol->string what) "_" (car fn))))))
-+)
-+
-+; Interface fns.
-+; The default is to forward the request onto TYPE.
-+; OP is a copy of SELF so the method we forward to sees it.
-+; There is one case in the fget/fset/parse/insert/extract/print
-+; switches for each operand.
-+; These are invoked via gen-switch.
-+
-+; Emit C code to get an operand value from the fields struct.
-+; Operand values are stored in a struct "indexed" by field name.
-+;
-+; The "f" prefix (e.g. set -> fset) is for "field" to distinguish the
-+; operations from similar ones in other contexts. ??? I'd prefer to come
-+; up with better names for fget/fset but I haven't come up with anything
-+; satisfactory yet.
-+
-+(method-make!
-+ <operand> 'gen-fget
-+ (lambda (self operand)
-+ (case (hw-index:type (op:index self))
-+ ((ifield)
-+ (string-append " value = "
-+ (gen-operand-result-var (op-ifield self))
-+ ";\n"))
-+ (else
-+ " value = 0;\n")))
-+)
-+
-+(method-make!
-+ <derived-operand> 'gen-fget
-+ (lambda (self operand)
-+ " abort();\n") ; should never be called
-+)
-+
-+; Emit C code to save an operand value in the fields struct.
-+
-+(method-make!
-+ <operand> 'gen-fset
-+ (lambda (self operand)
-+ (case (hw-index:type (op:index self))
-+ ((ifield)
-+ (string-append " "
-+ (gen-operand-result-var (op-ifield self))
-+ " = value;\n"))
-+ (else
-+ ""))) ; ignore
-+)
-+
-+(method-make!
-+ <derived-operand> 'gen-fset
-+ (lambda (self operand)
-+ " abort();\n") ; should never be called
-+)
-+
-+; Need to call op:type to resolve the hardware reference.
-+;(method-make-forward! <operand> 'type '(gen-parse gen-print))
-+
-+(method-make!
-+ <operand> 'gen-parse
-+ (lambda (self operand)
-+ (send (op:type self) 'gen-parse operand))
-+)
-+
-+(method-make!
-+ <derived-operand> 'gen-parse
-+ (lambda (self operand)
-+ " abort();\n") ; should never be called
-+)
-+
-+(method-make!
-+ <operand> 'gen-print
-+ (lambda (self operand)
-+ (send (op:type self) 'gen-print operand))
-+)
-+
-+(method-make!
-+ <derived-operand> 'gen-print
-+ (lambda (self operand)
-+ " abort();\n") ; should never be called
-+)
-+
-+(method-make-forward! <operand> 'index '(gen-insert gen-extract))
-+; But: <derived-operand> has its own gen-insert / gen-extract.
-+
-+; Return the value of PC.
-+; Used by insert/extract fields.
-+
-+(method-make!
-+ <pc> 'cxmake-get
-+ (lambda (self estate mode index selector)
-+ (cx:make IAI "pc"))
-+)
-+
-+; Opcodes init,finish,analyzer support.
-+
-+; Initialize any opcodes specific things before loading the .cpu file.
-+
-+(define (opcodes-init!)
-+ (desc-init!)
-+ (mode-set-biggest-word-bitsizes!)
-+ *UNSPECIFIED*
-+)
-+
-+; Finish any opcodes specific things after loading the .cpu file.
-+; This is separate from analyze-data! as cpu-load performs some
-+; consistency checks in between.
-+
-+(define (opcodes-finish!)
-+ (desc-finish!)
-+ *UNSPECIFIED*
-+)
-+
-+; Compute various needed globals and assign any computed fields of
-+; the various objects. This is the standard routine that is called after
-+; a .cpu file is loaded.
-+
-+(define (opcodes-analyze!)
-+ (desc-analyze!)
-+
-+ ; Initialize the rtl->c translator.
-+ (rtl-c-config!)
-+
-+ ; Only include semantic operands when computing the format tables if we're
-+ ; generating operand instance tables.
-+ ; ??? Actually, may always be able to exclude the semantic operands.
-+ ; Still need to traverse the semantics to derive machine computed attributes.
-+ (arch-analyze-insns! CURRENT-ARCH
-+ #t ; include aliases
-+ /opcodes-build-operand-instance-table?)
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Extra target specific code generation.
-+
-+; Pick out a section from the .opc file.
-+; The section is delimited with:
-+; /* -- name ... */
-+; ...
-+; /* -- ... */
-+;
-+; FIXME: This is a pretty involved bit of code. 'twould be nice to split
-+; it up into manageable chunks.
-+
-+(define (read-cpu.opc opc-file delim)
-+ (let ((file opc-file)
-+ (start-delim (string-append "/* -- " delim))
-+ (end-delim "/* -- "))
-+ (if (file-exists? file)
-+ (let ((port (open-file file "r"))
-+ ; Extra amount is added to SIZE so substring's to fetch possible
-+ ; delim won't fail, even at end of file
-+ (size (+ (file-size file) (string-length start-delim))))
-+ (if port
-+ (let ((result (make-string size #\space)))
-+ (let loop ((start -1) (line 0) (index 0))
-+ (let ((char (read-char port)))
-+ (if (not (eof-object? char))
-+ (string-set! result index char))
-+ (cond ((eof-object? char)
-+ (begin
-+ (close-port port)
-+ ; End of file, did we find the text?
-+ (if (=? start -1)
-+ ""
-+ (substring result start index))))
-+ ((char=? char #\newline)
-+ ; Check for start delim or end delim?
-+ (if (=? start -1)
-+ (if (string=? (substring result line
-+ (+ (string-length start-delim)
-+ line))
-+ start-delim)
-+ (loop line (+ index 1) (+ index 1))
-+ (loop -1 (+ index 1) (+ index 1)))
-+ (if (string=? (substring result line
-+ (+ (string-length end-delim)
-+ line))
-+ end-delim)
-+ (begin
-+ (close-port port)
-+ (substring result start (+ index 1)))
-+ (loop start (+ index 1) (+ index 1)))))
-+ (else
-+ (loop start line (+ index 1)))))))
-+ (error "Unable to open:" file)))
-+ "" ; file doesn't exist
-+ ))
-+)
-+
-+(define (gen-extra-cpu.h opc-file arch)
-+ (logit 2 "Generating extra cpu.h stuff from " arch ".opc ...\n")
-+ (read-cpu.opc opc-file "cpu.h")
-+)
-+(define (gen-extra-cpu.c opc-file arch)
-+ (logit 2 "Generating extra cpu.c stuff from " arch ".opc ...\n")
-+ (read-cpu.opc opc-file "cpu.c")
-+)
-+(define (gen-extra-opc.h opc-file arch)
-+ (logit 2 "Generating extra opc.h stuff from " arch ".opc ...\n")
-+ (read-cpu.opc opc-file "opc.h")
-+)
-+(define (gen-extra-opc.c opc-file arch)
-+ (logit 2 "Generating extra opc.c stuff from " arch ".opc ...\n")
-+ (read-cpu.opc opc-file "opc.c")
-+)
-+(define (gen-extra-asm.c opc-file arch)
-+ (logit 2 "Generating extra asm.c stuff from " arch ".opc ...\n")
-+ (read-cpu.opc opc-file "asm.c")
-+)
-+(define (gen-extra-dis.c opc-file arch)
-+ (logit 2 "Generating extra dis.c stuff from " arch ".opc ...\n")
-+ (read-cpu.opc opc-file "dis.c")
-+)
-+(define (gen-extra-ibld.h opc-file arch)
-+ (logit 2 "Generating extra ibld.h stuff from " arch ".opc ...\n")
-+ (read-cpu.opc opc-file "ibld.h")
-+)
-+(define (gen-extra-ibld.c opc-file arch)
-+ (logit 2 "Generating extra ibld.c stuff from " arch ".opc ...\n")
-+ (read-cpu.opc opc-file "ibld.c")
-+)
-+
-+; For debugging.
-+
-+(define (cgen-all)
-+ (string-write
-+ cgen-desc.h
-+ cgen-desc.c
-+ cgen-opinst.c
-+ cgen-opc.h
-+ cgen-opc.c
-+ cgen-ibld.h
-+ cgen-ibld.in
-+ cgen-asm.in
-+ cgen-dis.in
-+ )
-+)
-diff -Nur binutils-2.24.orig/cgen/opc-opinst.scm binutils-2.24/cgen/opc-opinst.scm
---- binutils-2.24.orig/cgen/opc-opinst.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/opc-opinst.scm 2016-06-30 21:26:12.665893579 +0200
-@@ -0,0 +1,175 @@
-+; Operand instance support.
-+; Copyright (C) 2000, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+
-+; Return C code to define one instance of operand object OP.
-+; TYPE is one of "INPUT" or "OUTPUT".
-+
-+(define (/gen-operand-instance op type)
-+ (let ((index (op:index op)))
-+ (string-append " { "
-+ type ", "
-+ "\"" (gen-sym op) "\", "
-+ (hw-enum (op:type op)) ", "
-+ ; FIXME: Revisit CGEN_ prefix, use MODE (FOO) instead.
-+ "CGEN_" (mode:enum (op:mode op)) ", "
-+ ; FIXME: We don't handle memory properly yet. Later.
-+ (cond ((memory? (op:type op))
-+ "0, 0")
-+ ((has-attr? op 'SEM-ONLY)
-+ "0, 0")
-+ ((eq? (hw-index:type index) 'ifield)
-+ (if (= (ifld-length (hw-index:value index)) 0)
-+ "0, 0"
-+ (string-append "OP_ENT ("
-+ (string-upcase (gen-sym op))
-+ "), 0")))
-+ ((eq? (hw-index:type index) 'constant)
-+ (string-append "0, "
-+ (number->string (hw-index:value index))))
-+ ((eq? (hw-index:type index) 'enum)
-+ (let ((sym (hw-index-enum-name index))
-+ (obj (hw-index-enum-obj index)))
-+ (string-append "0, "
-+ (gen-enum-sym obj sym))))
-+ (else "0, 0"))
-+ ", " (if (op:cond? op) "COND_REF" "0")
-+ " },\n"))
-+)
-+
-+; Return C code to define arrays of operand instances read from and written
-+; to by <sformat> SFMT.
-+; This is based on the semantics of the instruction.
-+; ??? All runtime chosen values (e.g. a particular register in a register bank)
-+; is assumed to be selected statically by the instruction. When some cpu
-+; violates this assumption (say because a previous instruction determines
-+; which register(s) the next instruction operates on), this will need
-+; additional support.
-+
-+(define (/gen-operand-instance-table sfmt)
-+ (let ((ins (sfmt-in-ops sfmt))
-+ (outs (sfmt-out-ops sfmt)))
-+ ; This used to exclude outputing anything if there were no ins or outs.
-+ (gen-obj-sanitize
-+ (sfmt-eg-insn sfmt) ; sanitize based on the example insn
-+ (string-append
-+ "static const CGEN_OPINST "
-+ (gen-sym sfmt) "_ops[] ATTRIBUTE_UNUSED = {\n"
-+ (string-map (lambda (op) (/gen-operand-instance op "INPUT"))
-+ ins)
-+ (string-map (lambda (op) (/gen-operand-instance op "OUTPUT"))
-+ outs)
-+ " { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }\n};\n\n")))
-+)
-+
-+(define (/gen-operand-instance-tables)
-+ (string-write
-+ "\
-+/* Operand references. */
-+
-+"
-+ (gen-define-with-symcat "OP_ENT(op) @ARCH@_OPERAND_" "op")
-+"\
-+#define INPUT CGEN_OPINST_INPUT
-+#define OUTPUT CGEN_OPINST_OUTPUT
-+#define END CGEN_OPINST_END
-+#define COND_REF CGEN_OPINST_COND_REF
-+
-+"
-+ (lambda () (string-write-map /gen-operand-instance-table (current-sfmt-list)))
-+ "\
-+#undef OP_ENT
-+#undef INPUT
-+#undef OUTPUT
-+#undef END
-+#undef COND_REF
-+
-+"
-+ )
-+)
-+
-+; Return C code for INSN's operand instance table.
-+
-+(define (gen-operand-instance-ref insn)
-+ (let* ((sfmt (insn-sfmt insn))
-+ (ins (sfmt-in-ops sfmt))
-+ (outs (sfmt-out-ops sfmt)))
-+ (if (and (null? ins) (null? outs))
-+ "0"
-+ (string-append "& " (gen-sym sfmt) "_ops[0]")))
-+)
-+
-+; Return C code to define a table to lookup an insn's operand instance table.
-+
-+(define (/gen-insn-opinst-lookup-table)
-+ (string-list
-+ "/* Operand instance lookup table. */\n\n"
-+ "static const CGEN_OPINST *@arch@_cgen_opinst_table[MAX_INSNS] = {\n"
-+ " 0,\n" ; null first entry
-+ (string-list-map
-+ (lambda (insn)
-+ (gen-obj-sanitize
-+ insn
-+ (string-append " & " (gen-sym (insn-sfmt insn)) "_ops[0],\n")))
-+ (current-insn-list))
-+ "};\n\n"
-+ "\
-+/* Function to call before using the operand instance table. */
-+
-+void
-+@arch@_cgen_init_opinst_table (cd)
-+ CGEN_CPU_DESC cd;
-+{
-+ int i;
-+ const CGEN_OPINST **oi = & @arch@_cgen_opinst_table[0];
-+ CGEN_INSN *insns = (CGEN_INSN *) cd->insn_table.init_entries;
-+ for (i = 0; i < MAX_INSNS; ++i)
-+ insns[i].opinst = oi[i];
-+}
-+"
-+ )
-+)
-+
-+; Return the maximum number of operand instances used by any insn.
-+; If not generating the operand instance table, use a heuristic.
-+
-+(define (max-operand-instances)
-+ (if /opcodes-build-operand-instance-table?
-+ (apply max
-+ (map (lambda (insn)
-+ (+ (length (sfmt-in-ops (insn-sfmt insn)))
-+ (length (sfmt-out-ops (insn-sfmt insn)))))
-+ (current-insn-list)))
-+ 8) ; FIXME: for now
-+)
-+
-+; Generate $arch-opinst.c.
-+
-+(define (cgen-opinst.c)
-+ (logit 1 "Generating " (current-arch-name) "-opinst.c ...\n")
-+
-+ ; If instruction semantics haven't been analyzed, do that now.
-+ (if (not (arch-semantics-analyzed? CURRENT-ARCH))
-+ (begin
-+ (logit 1 "Instruction semantics weren't analyzed when .cpu file was loaded.\n")
-+ (logit 1 "Doing so now ...\n")
-+ (arch-analyze-insns! CURRENT-ARCH
-+ #t ; include aliases
-+ #t) ; /opcodes-build-operand-instance-table?
-+ ))
-+
-+ (string-write
-+ (gen-c-copyright "Semantic operand instances for @arch@."
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "\
-+#include \"sysdep.h\"
-+#include \"ansidecl.h\"
-+#include \"bfd.h\"
-+#include \"symcat.h\"
-+#include \"@prefix@-desc.h\"
-+#include \"@prefix@-opc.h\"
-+\n"
-+ /gen-operand-instance-tables
-+ /gen-insn-opinst-lookup-table
-+ )
-+)
-diff -Nur binutils-2.24.orig/cgen/operand.scm binutils-2.24/cgen/operand.scm
---- binutils-2.24.orig/cgen/operand.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/operand.scm 2016-06-30 21:26:12.665893579 +0200
-@@ -0,0 +1,1702 @@
-+; Operands
-+; Copyright (C) 2000, 2001, 2005, 2009, 2010 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; Operands map a set of values (registers, whatever) to an instruction field
-+; or other indexing mechanism. Operands are also how the semantic code refers
-+; to hardware elements.
-+
-+; The `<operand>' class.
-+;
-+; ??? Need a new lighterweight version for instances in semantics.
-+; This should only contain the static elements from the description file.
-+;
-+; ??? Derived operands don't use all the current class members. Perhaps
-+; split <operand> into two.
-+
-+(define <operand>
-+ (class-make '<operand>
-+ '(<source-ident>)
-+ '(
-+ ; Name as used in semantic code.
-+ ; Generally this is the same as NAME. It is changed by the
-+ ; `operand:' rtx function. One reason is to set a "pretty"
-+ ; name in tracing output (most useful in memory operands).
-+ ; A more important reason is to help match semantic operands
-+ ; with function unit input/output arguments.
-+ sem-name
-+
-+ ; Pretty name as used in tracing code.
-+ ; Generally this is the same as the hardware element's name.
-+ pretty-sem-name
-+
-+ ; Semantic name of hardware element refered to by this operand.
-+ hw-name
-+
-+ ; Hardware type of operand, a subclass of <hardware-base>.
-+ ; This is computed lazily from HW-NAME as many hardware
-+ ; elements can have the same semantic name. Applications
-+ ; that require a unique hardware element to be refered to are
-+ ; required to ensure duplicates are discarded (usually done
-+ ; by keeping the appropriate machs).
-+ ; All h/w elements with the same semantic name are required
-+ ; to be the same kind (register, immediate, etc.).
-+ ; FIXME: Rename to hw.
-+ (type . #f)
-+
-+ ; Name of mode, as specified in description file.
-+ ; This needn't be the actual mode, as WI will get coerced
-+ ; to the actual word int mode.
-+ mode-name
-+
-+ ; The mode TYPE is being referenced in.
-+ ; This is also looked up lazily for the same reasons as TYPE.
-+ (mode . #f)
-+
-+ ; Selector.
-+ ; A number or #f used to select a variant of the hardware
-+ ; element. An example is ASI's on sparc.
-+ ; ??? I really need to be better at picking names.
-+ (selector . #f)
-+
-+ ; Index into type, class <hw-index>.
-+ ; For example in the case of an array of registers
-+ ; it can be an instruction field or in the case of a memory
-+ ; reference it can be a register operand (or general rtx).
-+ ; ??? At present <hw-index> is a facade over the real index
-+ ; type. Not sure what the best way to do this is.
-+ (index . #f)
-+
-+ ; Code to run when the operand is read or #f meaning pass
-+ ; the request on to the hardware object.
-+ (getter . #f)
-+
-+ ; Code to run when the operand is written or #f meaning pass
-+ ; the request on to the hardware object.
-+ (setter . #f)
-+
-+ ; Associative list of (symbol . "handler") entries.
-+ ; Each entry maps an operation to its handler (which is up to
-+ ; the application but is generally a function name).
-+ (handlers . ())
-+
-+ ; Ordinal number of the operand in an insn's semantic
-+ ; description. There is no relation between the number and
-+ ; where in the semantics the operand appears. An operand that
-+ ; is both read and written are given separate ordinal numbers
-+ ; (inputs are treated separately from outputs).
-+ (num . -1)
-+
-+ ; Boolean indicating if the operand is conditionally
-+ ; referenced. #f means the operand is always referenced by
-+ ; the instruction.
-+ (cond? . #f)
-+
-+ ; whether (and by how much) this instance of the operand is
-+ ; delayed.
-+ (delayed . #f)
-+ )
-+ nil)
-+)
-+
-+; The default make! assigns the default h/w selector.
-+
-+(method-make!
-+ <operand> 'make!
-+ (lambda (self location name comment attrs
-+ hw-name mode-name index handlers getter setter)
-+ (elm-set! self 'location location)
-+ (elm-set! self 'name name)
-+ (elm-set! self 'sem-name name)
-+ (elm-set! self 'pretty-sem-name hw-name)
-+ (elm-set! self 'comment comment)
-+ (elm-set! self 'attrs attrs)
-+ (elm-set! self 'hw-name hw-name)
-+ (elm-set! self 'mode-name mode-name)
-+ (elm-set! self 'selector hw-selector-default)
-+ (elm-set! self 'index index)
-+ (elm-set! self 'handlers handlers)
-+ (elm-set! self 'getter getter)
-+ (elm-set! self 'setter setter)
-+ self)
-+)
-+
-+; FIXME: The prefix field- doesn't seem right. Indices needn't be
-+; ifields, though for operands defined in .cpu files they usually are.
-+(method-make-forward! <operand> 'index '(field-start field-length))
-+
-+; Accessor fns
-+
-+(define op:sem-name (elm-make-getter <operand> 'sem-name))
-+(define op:set-sem-name! (elm-make-setter <operand> 'sem-name))
-+(define op:set-pretty-sem-name! (elm-make-setter <operand> 'pretty-sem-name))
-+(define op:hw-name (elm-make-getter <operand> 'hw-name))
-+(define op:mode-name (elm-make-getter <operand> 'mode-name))
-+(define op:selector (elm-make-getter <operand> 'selector))
-+; FIXME: op:index should be named op:hwindex.
-+(define op:index (elm-make-getter <operand> 'index))
-+(define op:handlers (elm-make-getter <operand> 'handlers))
-+(define op:getter (elm-make-getter <operand> 'getter))
-+(define op:setter (elm-make-getter <operand> 'setter))
-+(define op:num (elm-make-getter <operand> 'num))
-+(define op:set-num! (elm-make-setter <operand> 'num))
-+(define op:cond? (elm-make-getter <operand> 'cond?))
-+(define op:set-cond?! (elm-make-setter <operand> 'cond?))
-+(define op:delay (elm-make-getter <operand> 'delayed))
-+(define op:set-delay! (elm-make-setter <operand> 'delayed))
-+
-+; Compute the hardware type lazily.
-+; FIXME: op:type should be named op:hwtype or some such.
-+
-+(define op:type
-+ (let ((getter (elm-make-getter <operand> 'type)))
-+ (lambda (op)
-+ (let ((type (getter op)))
-+ (if type
-+ type
-+ (let* ((hw-name (op:hw-name op))
-+ (hw-objs (current-hw-sem-lookup hw-name)))
-+ (if (!= (length hw-objs) 1)
-+ (error "cannot resolve h/w reference" hw-name))
-+ ((elm-make-setter <operand> 'type) op (car hw-objs))
-+ (car hw-objs))))))
-+)
-+
-+; Compute the operand's mode lazily (depends on hardware type which is
-+; computed lazily).
-+
-+(define op:mode
-+ (let ((getter (elm-make-getter <operand> 'mode)))
-+ (lambda (op)
-+ (let ((mode (getter op)))
-+ (if mode
-+ mode
-+ (let ((mode-name (op:mode-name op))
-+ (type (op:type op)))
-+ (let ((mode (if (eq? mode-name 'DFLT)
-+ (hw-default-mode type)
-+ (mode:lookup mode-name))))
-+ ((elm-make-setter <operand> 'mode) op mode)
-+ mode))))))
-+)
-+
-+(method-make! <operand> 'get-mode (lambda (self) (op:mode self)))
-+
-+; FIXME: wip
-+; Result is the <ifield> object or #f if there is none.
-+
-+(define (op-ifield op)
-+ (logit 4 " op-ifield op= " (obj:name op)
-+ ", indx= " (obj:name (op:index op)) "\n")
-+ (let ((indx (op:index op)))
-+ (if indx
-+ (let ((maybe-ifld (hw-index:value (op:index op))))
-+ (logit 4 " ifld=" (obj:name maybe-ifld) "\n")
-+ (cond ((ifield? maybe-ifld) maybe-ifld)
-+ ((derived-ifield? maybe-ifld) maybe-ifld)
-+ ((ifield? indx) indx)
-+ ((derived-ifield? indx) indx)
-+ (else #f)))
-+ #f))
-+)
-+
-+; Return mode to use for index or #f if scalar.
-+; This can't use method-make-forward! as we need to call op:type to
-+; resolve the hardware reference.
-+
-+(method-make!
-+ <operand> 'get-index-mode
-+ (lambda (self) (send (op:type self) 'get-index-mode))
-+)
-+
-+; Return the operand's enum.
-+
-+(define (op-enum op)
-+ (string-upcase (string-append "@ARCH@_OPERAND_" (gen-sym op)))
-+)
-+
-+; Return a boolean indicating if X is an operand.
-+
-+(define (operand? x) (class-instance? <operand> x))
-+
-+; Default gen-pretty-name method.
-+; Return a C string of the name intended for users.
-+;
-+; FIXME: The current implementation is a quick hack. Parallel execution
-+; support can create operands with long names. e.g. h-memory-add-WI-src2-slo16
-+; The eventual way this will be handled is to record with each operand the
-+; entry number (or some such) in the operand instance table so that for
-+; registers we can compute the register's name.
-+
-+(method-make!
-+ <operand> 'gen-pretty-name
-+ (lambda (self mode)
-+ (let* ((name (->string (if (elm-bound? self 'pretty-sem-name)
-+ (elm-get self 'pretty-sem-name)
-+ (if (elm-bound? self 'sem-name)
-+ (elm-get self 'sem-name)
-+ (obj:name self)))))
-+ (pname (cond ((string=? "h-memory" (string-take 8 name)) "memory")
-+ ((string=? "h-" (string-take 2 name)) (string-drop 2 name))
-+ (else name))))
-+ (string-append "\"" pname "\"")))
-+)
-+
-+; Mode support.
-+
-+; Create a copy of operand OP in mode NEW-MODE-NAME.
-+; NOTE: Even if the mode isn't changing this creates a copy.
-+; If OP has been subclassed the result must contain the complete class
-+; (e.g. the behaviour of `object-copy').
-+; NEW-MODE-NAME must be a valid numeric mode.
-+
-+(define (op:new-mode op new-mode-name)
-+ (let ((result (object-copy op)))
-+ ; (logit 1 "op:new-mode op=" (op:sem-name op)
-+ ; " class=" (object-class-name op)
-+ ; " hw-name=" (op:hw-name op)
-+ ; " mode=" (op:mode op)
-+ ; " newmode=" new-mode-name)
-+; (if (or (eq? new-mode-name 'DFLT)
-+; (eq? new-mode-name 'VOID) ; temporary: for upward compatibility
-+; (mode:eq? new-mode-name (op:mode op)))
-+; ; Mode isn't changing.
-+; result
-+ (if #t ;; FIXME
-+ ; See if new mode is supported by the hardware.
-+ (if (hw-mode-ok? (op:type op) new-mode-name (op:index op))
-+ (let ((new-mode (mode:lookup new-mode-name)))
-+ (if (not new-mode)
-+ (error "op:new-mode: internal error, bad mode"
-+ new-mode-name))
-+ (elm-xset! result 'mode-name new-mode-name)
-+ (elm-xset! result 'mode new-mode)
-+ result)
-+ (parse-error (make-obj-context op "op:new-mode")
-+ (string-append "invalid mode for operand `"
-+ (->string (obj:name op))
-+ "'")
-+ new-mode-name))))
-+)
-+
-+; Return #t if operand OP references its h/w element in its natural mode.
-+
-+(define (op-natural-mode? op)
-+ (or (eq? (op:mode-name op) 'DFLT)
-+ (mode-compatible? 'samesize (op:mode op) (hw-default-mode (op:type op))))
-+)
-+
-+; Ifield support.
-+
-+; Return list of ifields used by OP.
-+
-+(define (op-iflds-used op)
-+ (if (derived-operand? op)
-+ (collect op-iflds-used (derived-args op))
-+ ; else
-+ (let ((indx (op:index op)))
-+ (if (and (eq? (hw-index:type indx) 'ifield)
-+ (not (= (ifld-length (hw-index:value indx)) 0)))
-+ (ifld-needed-iflds (hw-index:value indx))
-+ nil)))
-+)
-+
-+; The `hw-index' class.
-+; [Was named `index' but that conflicts with the C library function and caused
-+; problems when using Hobbit. And `index' is too generic a name anyway.]
-+;
-+; An operand combines a hardware object with its index.
-+; e.g. in an array of registers an operand serves to combine the register bank
-+; with the instruction field that chooses which one.
-+; Hardware elements are accessed via other means as well besides instruction
-+; fields so we need a way to designate something as being an index.
-+; The `hw-index' class does that. It serves as a facade to the underlying
-+; details.
-+; ??? Not sure whether this is the best way to handle this or not.
-+;
-+; NAME is the name of the index or 'anonymous.
-+; This is used, for example, to give a name to the simulator extraction
-+; structure member.
-+; TYPE is a symbol that indicates what VALUE is.
-+; scalar: the hardware object is a scalar, no index is required
-+; [MODE and VALUE are #f to denote "undefined" in this case]
-+; constant: a (non-negative) integer (FIXME: rename to const)
-+; enum: an enum value stored as (enum-name . (enum-lookup-val enum-name)),
-+; i.e. (name value . enum-obj)
-+; str-expr: a C expression as a string
-+; rtx: an rtx to be expanded
-+; ifield: an <ifield> object
-+; derived-ifield: a <derived-ifield> object ???
-+; operand: an <operand> object
-+; ??? A useful simplification may be to always record the value as an rtx
-+; [which may require extensions to rtl so is deferred].
-+; ??? We could use runtime type identification, but doing things this way
-+; adds more structure.
-+;
-+; MODE is the mode of VALUE, as a <mode> object.
-+; If DFLT, mode must be obtained from VALUE.
-+; DFLT is only allowable for rtx and operand types.
-+
-+(define <hw-index> (class-make '<hw-index> nil '(name type mode value) nil))
-+
-+; Accessors.
-+; Use obj:name for `name'.
-+(define hw-index:type (elm-make-getter <hw-index> 'type))
-+(define hw-index:mode (elm-make-getter <hw-index> 'mode))
-+(define hw-index:value (elm-make-getter <hw-index> 'value))
-+
-+; Allow the mode to be specified by its name.
-+(method-make!
-+ <hw-index> 'make!
-+ (lambda (self name type mode value)
-+ (elm-set! self 'name name)
-+ (elm-set! self 'type type)
-+ (elm-set! self 'mode (mode-maybe-lookup mode))
-+ (elm-set! self 'value value)
-+ self)
-+)
-+
-+; get-name handler
-+(method-make!
-+ <hw-index> 'get-name
-+ (lambda (self)
-+ (elm-get self 'name))
-+)
-+
-+; get-atlist handler
-+(method-make!
-+ <hw-index> 'get-atlist
-+ (lambda (self)
-+ (case (hw-index:type self)
-+ ((ifield) (obj-atlist (hw-index:value self)))
-+ (else atlist-empty)))
-+)
-+
-+; ??? Until other things settle.
-+(method-make!
-+ <hw-index> 'field-start
-+ (lambda (self)
-+ (if (eq? (hw-index:type self) 'ifield)
-+ (send (hw-index:value self) 'field-start)
-+ 0))
-+)
-+(method-make!
-+ <hw-index> 'field-length
-+ (lambda (self)
-+ (if (eq? (hw-index:type self) 'ifield)
-+ (send (hw-index:value self) 'field-length)
-+ 0))
-+)
-+
-+;; Return #t if index is a constant.
-+
-+(define (hw-index-constant? hw-index)
-+ (memq (hw-index:type hw-index) '(constant enum))
-+)
-+
-+;; Given that (hw-index-constant? hw-index) is true, return the value.
-+
-+(define (hw-index-constant-value hw-index)
-+ (case (hw-index:type hw-index)
-+ ((constant) (hw-index:value hw-index))
-+ ((enum) (hw-index-enum-value hw-index))
-+ (else (error "invalid constant hw-index" hw-index)))
-+)
-+
-+;; Make an enum <hw-index> given the enum's name.
-+
-+(define (make-enum-hw-index name enum-name)
-+ (make <hw-index> name 'enum UINT
-+ (cons enum-name (enum-lookup-val enum-name)))
-+)
-+
-+;; Given an enum <hw-index>, return the enum's name.
-+
-+(define (hw-index-enum-name hw-index)
-+ (car (hw-index:value hw-index))
-+)
-+
-+;; Given an enum <hw-index>, return the enum's value.
-+
-+(define (hw-index-enum-value hw-index)
-+ (cadr (hw-index:value hw-index))
-+)
-+
-+;; Given an enum <hw-index>, return the enum's object.
-+
-+(define (hw-index-enum-obj hw-index)
-+ (cddr (hw-index:value hw-index))
-+)
-+
-+; There only ever needs to be one of these objects, so create one.
-+
-+(define hw-index-scalar
-+ ; We can't use `make' here as the make! method calls mode:lookup which
-+ ; (a) doesn't exist if we're compiled with Hobbit and mode.scm isn't
-+ ; and (b) will fail anyway since #f isn't a valid mode.
-+ (let ((scalar-index (new <hw-index>)))
-+ (elm-xset! scalar-index 'name 'hw-index-scalar)
-+ (elm-xset! scalar-index 'type 'scalar)
-+ (elm-xset! scalar-index 'mode #f)
-+ (elm-xset! scalar-index 'value #f)
-+ (lambda () scalar-index))
-+)
-+
-+; Placeholder for indices of "anyof" operands.
-+; There only needs to be one of these, so we create one and always use that.
-+
-+(define hw-index-anyof
-+ ; We can't use `make' here as the make! method calls mode:lookup which
-+ ; (a) doesn't exist if we're compiled with Hobbit and mode.scm isn't
-+ ; and (b) will fail anyway since #f isn't a valid mode.
-+ (let ((anyof-index (new <hw-index>)))
-+ (elm-xset! anyof-index 'name 'hw-index-anyof)
-+ (elm-xset! anyof-index 'type 'scalar)
-+ (elm-xset! anyof-index 'mode #f)
-+ (elm-xset! anyof-index 'value #f)
-+ (lambda () anyof-index))
-+)
-+
-+(define hw-index-derived
-+ ; We can't use `make' here as the make! method calls mode:lookup which
-+ ; (a) doesn't exist if we're compiled with Hobbit and mode.scm isn't
-+ ; and (b) will fail anyway since #f isn't a valid mode.
-+ (let ((derived-index (new <hw-index>)))
-+ (elm-xset! derived-index 'name 'hw-index-derived)
-+ (elm-xset! derived-index 'type 'scalar)
-+ (elm-xset! derived-index 'mode #f)
-+ (elm-xset! derived-index 'value #f)
-+ (lambda () derived-index))
-+)
-+
-+; Hardware selector support.
-+;
-+; A hardware "selector" is like an index except is along an atypical axis
-+; and thus is rarely used. It exists to support things like ASI's on Sparc.
-+
-+; What to pass to indicate "default selector".
-+; (??? value is temporary choice to be revisited).
-+(define hw-selector-default '(symbol NONE))
-+
-+(define (hw-selector-default? sel) (equal? sel hw-selector-default))
-+
-+; Hardware support.
-+
-+; Return list of hardware elements refered to in OP-LIST
-+; with no duplicates.
-+
-+(define (op-nub-hw op-list)
-+ ; Build a list of hw elements.
-+ (let ((hw-list (map (lambda (op)
-+ (if (hw-ref? op) ; FIXME: hw-ref? is undefined
-+ op
-+ (op:type op)))
-+ op-list)))
-+ ; Now build an alist of (name . obj) elements, take the nub, then the cdr.
-+ ; ??? These lists tend to be small so sorting first is probably overkill.
-+ (map cdr
-+ (alist-nub (alist-sort (map (lambda (hw) (cons (obj:name hw) hw))
-+ hw-list)))))
-+)
-+
-+; Parsing support.
-+
-+; Utility of /operand-parse-[gs]etter to build the expected syntax,
-+; for use in error messages.
-+
-+(define (/operand-g/setter-syntax rank setter?)
-+ (string-append "("
-+ (string-drop1
-+ (numbers->string (iota rank) " index"))
-+ (if setter?
-+ (if (>= rank 1)
-+ " newval"
-+ "newval")
-+ "")
-+ ") (expression)")
-+)
-+
-+; Parse a getter spec.
-+; The syntax is (([index-names]) (... code ...)).
-+; Omit `index-names' for scalar objects.
-+; {rank} is the required number of elements in {index-names}.
-+
-+(define (/operand-parse-getter context getter rank)
-+ (if (null? getter)
-+ #f ; use default
-+ (let ()
-+ (if (or (not (list? getter))
-+ (!= (length getter) 2)
-+ (not (and (list? (car getter))
-+ (= (length (car getter)) rank))))
-+ (parse-error context
-+ (string-append "invalid getter, should be "
-+ (/operand-g/setter-syntax rank #f))
-+ getter))
-+ (if (not (rtx? (cadr getter)))
-+ (parse-error context "invalid rtx expression" getter))
-+ getter))
-+)
-+
-+; Parse a setter spec.
-+; The syntax is (([index-names] newval) (... code ...)).
-+; Omit `index-names' for scalar objects.
-+; {rank} is the required number of elements in {index-names}.
-+
-+(define (/operand-parse-setter context setter rank)
-+ (if (null? setter)
-+ #f ; use default
-+ (let ()
-+ (if (or (not (list? setter))
-+ (!= (length setter) 2)
-+ (not (and (list? (car setter))
-+ (= (+ 1 (length (car setter)) rank)))))
-+ (parse-error context
-+ (string-append "invalid setter, should be "
-+ (/operand-g/setter-syntax rank #t))
-+ setter))
-+ (if (not (rtx? (cadr setter)))
-+ (parse-error context "invalid rtx expression" setter))
-+ setter))
-+)
-+
-+; Parse an operand definition.
-+; This is the main routine for building an operand object from a
-+; description in the .cpu file.
-+; All arguments are in raw (non-evaluated) form.
-+; The result is the parsed object or #f if object isn't for selected mach(s).
-+; ??? This only takes insn fields as the index. May need another proc (or an
-+; enhancement of this one) that takes other kinds of indices.
-+
-+(define (/operand-parse context name comment attrs hw mode index handlers getter setter)
-+ (logit 2 "Processing operand " name " ...\n")
-+
-+ ;; Pick out name first to augment the error context.
-+ (let* ((name (parse-name context name))
-+ (context (context-append-name context name))
-+ (atlist-obj (atlist-parse context attrs "cgen_operand"))
-+ (isa-name-list (atlist-attr-value atlist-obj 'ISA #f)))
-+
-+ ;; Verify all specified ISAs are valid.
-+ (if (not (all-true? (map current-isa-lookup isa-name-list)))
-+ (parse-error context "unknown isa in isa list" isa-name-list))
-+
-+ (if (keep-atlist? atlist-obj #f)
-+
-+ (let ((hw-objs (current-hw-sem-lookup hw))
-+ (mode-obj (parse-mode-name context mode))
-+ (index-val (cond ((integer? index)
-+ index)
-+ ((and (symbol? index) (enum-lookup-val index))
-+ => (lambda (x) x))
-+ ((and (symbol? index) (current-ifld-lookup index isa-name-list))
-+ => (lambda (x) x))
-+ (else
-+ (if (symbol? index)
-+ (parse-error context "unknown enum or ifield" index)
-+ (parse-error context "invalid operand index" index))))))
-+
-+ (if (not mode-obj)
-+ (parse-error context "unknown mode" mode))
-+ ;; Disallow some obviously invalid numeric indices.
-+ (if (and (number? index-val)
-+ (or (not (integer? index-val))
-+ (< index-val 0)))
-+ (parse-error context "invalid integer index" index))
-+ ;; If an enum is used, it must be non-negative.
-+ (if (and (pair? index-val)
-+ (< (car index-val) 0))
-+ (parse-error context "negative enum value" index))
-+ ;; NOTE: Don't validate HW until we know whether this operand
-+ ;; will be kept or not. If not, HW may have been discarded too.
-+ (if (null? hw-objs)
-+ (parse-error context "unknown hardware element" hw))
-+
-+ ;; At this point INDEX-VAL is either an integer, (value . enum-obj),
-+ ;; or an <ifield> object.
-+ ;; Since we can't look up the hardware element at this time
-+ ;; [well, actually we should be able to with a bit of work],
-+ ;; we determine scalarness from an index of f-nil.
-+ (let ((hw-index
-+ (cond ((integer? index-val)
-+ (make <hw-index> (symbol-append 'i- name)
-+ ;; FIXME: constant -> const
-+ 'constant UINT index-val))
-+ ((pair? index-val) ;; enum?
-+ (make <hw-index> (symbol-append 'i- name)
-+ 'enum UINT (cons index index-val)))
-+ ((ifld-nil? index-val)
-+ (hw-index-scalar))
-+ (else
-+ (make <hw-index> (symbol-append 'i- name)
-+ 'ifield UINT index-val)))))
-+ (make <operand>
-+ (context-location context)
-+ name
-+ (parse-comment context comment)
-+ ;; Copy FLD's attributes so one needn't duplicate attrs like
-+ ;; PCREL-ADDR, etc. An operand inherits the attributes of
-+ ;; its field. They are overridable of course, which is why we use
-+ ;; `atlist-append' here.
-+ (if (ifield? index-val)
-+ (atlist-append atlist-obj (obj-atlist index-val))
-+ atlist-obj)
-+ hw ;; note that this is the hw's name, not an object
-+ mode ;; ditto, this is a name, not an object
-+ hw-index
-+ (parse-handlers context '(parse print) handlers)
-+ (/operand-parse-getter context getter (if scalar? 0 1))
-+ (/operand-parse-setter context setter (if scalar? 0 1))
-+ )))
-+
-+ (begin
-+ (logit 2 "Ignoring " name ".\n")
-+ #f)))
-+)
-+
-+; Read an operand description.
-+; This is the main routine for analyzing operands in the .cpu file.
-+; CONTEXT is a <context> object for error messages.
-+; ARG-LIST is an associative list of field name and field value.
-+; /operand-parse is invoked to create the <operand> object.
-+
-+(define (/operand-read context . arg-list)
-+ (let (
-+ (name nil)
-+ (comment nil)
-+ (attrs nil)
-+ (type nil)
-+ (mode 'DFLT) ; use default mode of TYPE
-+ (index nil)
-+ (handlers nil)
-+ (getter nil)
-+ (setter nil)
-+ )
-+
-+ (let loop ((arg-list arg-list))
-+ (if (null? arg-list)
-+ nil
-+ (let ((arg (car arg-list))
-+ (elm-name (caar arg-list)))
-+ (case elm-name
-+ ((name) (set! name (cadr arg)))
-+ ((comment) (set! comment (cadr arg)))
-+ ((attrs) (set! attrs (cdr arg)))
-+ ((type) (set! type (cadr arg)))
-+ ((mode) (set! mode (cadr arg)))
-+ ((index) (set! index (cadr arg)))
-+ ((handlers) (set! handlers (cdr arg)))
-+ ((getter) (set! getter (cdr arg)))
-+ ((setter) (set! setter (cdr arg)))
-+ (else (parse-error context "invalid operand arg" arg)))
-+ (loop (cdr arg-list)))))
-+
-+ ; Now that we've identified the elements, build the object.
-+ (/operand-parse context name comment attrs type mode index handlers
-+ getter setter))
-+)
-+
-+; Define an operand object, name/value pair list version.
-+
-+(define define-operand
-+ (lambda arg-list
-+ (let ((op (apply /operand-read (cons (make-current-context "define-operand")
-+ arg-list))))
-+ (if op
-+ (current-op-add! op))
-+ op))
-+)
-+
-+; Define an operand object, all arguments specified.
-+
-+(define (define-full-operand name comment attrs type mode index handlers getter setter)
-+ (let ((op (/operand-parse (make-current-context "define-full-operand")
-+ name comment attrs
-+ type mode index handlers getter setter)))
-+ (if op
-+ (current-op-add! op))
-+ op)
-+)
-+
-+; Derived operands.
-+;
-+; Derived operands are used to implement operands more complex than just
-+; the mapping of an instruction field to a register bank. Their present
-+; raison d'etre is to create a new axis on which to implement the complex
-+; addressing modes of the i386 and m68k. The brute force way of describing
-+; these instruction sets would be to have one `dni' per addressing mode
-+; per instruction. What's needed is to abstract away the various addressing
-+; modes within something like operands.
-+;
-+; ??? While internally we end up with the "brute force" approach, in and of
-+; itself that's ok because it's an internal implementation issue.
-+; See <multi-insn>.
-+;
-+; ??? Another way to go is to have one dni per addressing mode. That seems
-+; less clean though as one dni would be any of add, sub, and, or, xor, etc.
-+;
-+; ??? Some addressing modes have side-effects (e.g. pre-dec, etc. like insns).
-+; This can be represented, but if two operands have side-effects special
-+; trickery may be required to get the order of side-effects right. Need to
-+; avoid any "trickery" at all.
-+;
-+; ??? Not yet handled are modelling parameters.
-+; ??? Not yet handled are the handlers,getter,setter spec of normal operands.
-+;
-+; ??? Division of class members b/w <operand> and <derived-operand> is wip.
-+; ??? As is potential introduction of other classes to properly organize
-+; things.
-+
-+(define <derived-operand>
-+ (class-make '<derived-operand>
-+ '(<operand>)
-+ '(
-+ ; Args (list of <operands> objects).
-+ args
-+
-+ ; Syntax string.
-+ syntax
-+
-+ ; Base ifield, common to all choices.
-+ ; ??? experiment
-+ base-ifield
-+
-+ ; <derived-ifield> object.
-+ encoding
-+
-+ ; Assertions of any ifield values or #f if none.
-+ (ifield-assertion . #f)
-+ )
-+ '())
-+)
-+
-+;; <derived-operand> constructor.
-+;; MODE is a <mode> object.
-+
-+(method-make!
-+ <derived-operand> 'make!
-+ (lambda (self name comment attrs mode
-+ args syntax base-ifield encoding ifield-assertion
-+ getter setter)
-+ (elm-set! self 'name name)
-+ (elm-set! self 'comment comment)
-+ (elm-set! self 'attrs attrs)
-+ (elm-set! self 'sem-name name)
-+ (elm-set! self 'pretty-sem-name #f) ;; FIXME
-+ (elm-set! self 'hw-name #f) ;; FIXME
-+ (elm-set! self 'mode mode)
-+ (elm-set! self 'mode-name (obj:name mode))
-+ (elm-set! self 'getter getter)
-+ (elm-set! self 'setter setter)
-+ ;; These are the additional fields in <derived-operand>.
-+ (elm-set! self 'args args)
-+ (elm-set! self 'syntax syntax)
-+ (elm-set! self 'base-ifield base-ifield)
-+ (elm-set! self 'encoding encoding)
-+ (elm-set! self 'ifield-assertion ifield-assertion)
-+ self)
-+)
-+
-+(define (derived-operand? x) (class-instance? <derived-operand> x))
-+
-+(define-getters <derived-operand> derived
-+ (args syntax base-ifield encoding ifield-assertion)
-+)
-+
-+; "anyof" operands are subclassed from derived operands.
-+; They typically handle multiple addressing modes of CISC architectures.
-+
-+(define <anyof-operand>
-+ (class-make '<anyof-operand>
-+ '(<operand>)
-+ '(
-+ ; Base ifield, common to all choices.
-+ ; FIXME: wip
-+ base-ifield
-+
-+ ; List of <derived-operand> objects.
-+ ; ??? Maybe allow <operand>'s too?
-+ choices
-+ )
-+ '())
-+)
-+
-+(define (anyof-operand? x) (class-instance? <anyof-operand> x))
-+
-+(method-make!
-+ <anyof-operand> 'make!
-+ (lambda (self name comment attrs mode-name base-ifield choices)
-+ (elm-set! self 'name name)
-+ (elm-set! self 'comment comment)
-+ (elm-set! self 'attrs attrs)
-+ (elm-set! self 'sem-name name)
-+ (elm-set! self 'pretty-sem-name #f) ;; FIXME
-+ (elm-set! self 'hw-name #f) ;; FIXME
-+ (elm-set! self 'mode-name mode-name)
-+ (elm-set! self 'base-ifield base-ifield)
-+ (elm-set! self 'choices choices)
-+ ; Set index to a special marker value.
-+ (elm-set! self 'index (hw-index-anyof))
-+ self)
-+)
-+
-+(define-getters <anyof-operand> anyof (choices))
-+
-+; Derived/Anyof parsing support.
-+
-+; Subroutine of /derived-operand-parse to parse the encoding.
-+; The result is a <derived-ifield> object.
-+; The {owner} member still needs to be set!
-+
-+(define (/derived-parse-encoding context isa-name-list operand-name encoding)
-+ (if (or (null? encoding)
-+ (not (list? encoding)))
-+ (parse-error context "encoding not a list" encoding))
-+ (if (not (eq? (car encoding) '+))
-+ (parse-error context "encoding must begin with `+'" encoding))
-+
-+ ; ??? Calling /parse-insn-format is a quick hack.
-+ ; It's an internal routine of some other file.
-+ (let ((iflds (/parse-insn-format context #f isa-name-list encoding)))
-+ (make <derived-ifield>
-+ operand-name
-+ 'derived-ifield ; (string-append "<derived-ifield> for " operand-name)
-+ atlist-empty
-+ #f ; owner
-+ iflds ; subfields
-+ ))
-+)
-+
-+;; Subroutine of /derived-operand-parse to parse the ifield assertion.
-+;; The ifield assertion is either () or a (restricted) RTL expression
-+;; asserting something about the ifield values of the containing insn.
-+;; The result is #f if the assertion is (), or the canonical rtl.
-+
-+(define (/derived-parse-ifield-assertion context isa-name-list ifield-assertion)
-+ (if (null? ifield-assertion)
-+ #f
-+ (rtx-canonicalize context 'INT isa-name-list nil ifield-assertion))
-+)
-+
-+; Parse a derived operand definition.
-+; This is the main routine for building a derived operand object from a
-+; description in the .cpu file.
-+; All arguments are in raw (non-evaluated) form.
-+; The result is the parsed object or #f if object isn't for selected mach(s).
-+;
-+; ??? Currently no support for handlers(,???) found in normal operands.
-+; Later, when necessary.
-+
-+(define (/derived-operand-parse context name comment attrs mode
-+ args syntax
-+ base-ifield encoding ifield-assertion
-+ getter setter)
-+ (logit 2 "Processing derived operand " name " ...\n")
-+
-+ ;; Pick out name first to augment the error context.
-+ (let* ((name (parse-name context name))
-+ (context (context-append-name context name))
-+ (atlist-obj (atlist-parse context attrs "cgen_operand"))
-+ (isa-name-list (atlist-attr-value atlist-obj 'ISA #f)))
-+
-+ ;; Verify all specified ISAs are valid.
-+ (if (not (all-true? (map current-isa-lookup isa-name-list)))
-+ (parse-error context "unknown isa in isa list" isa-name-list))
-+
-+ (if (keep-atlist? atlist-obj #f)
-+
-+ (let* ((mode-obj (parse-mode-name context mode))
-+ (parsed-encoding (/derived-parse-encoding context isa-name-list
-+ name encoding)))
-+
-+ (if (not mode-obj)
-+ (parse-error context "unknown mode" mode))
-+
-+ (let ((result
-+ (make <derived-operand>
-+ name
-+ (parse-comment context comment)
-+ atlist-obj
-+ mode-obj
-+ (map (lambda (a)
-+ (if (not (symbol? a))
-+ (parse-error context "arg not a symbol" a))
-+ (let ((op (current-op-lookup a isa-name-list)))
-+ (if (not op)
-+ (parse-error context "not an operand" a))
-+ op))
-+ args)
-+ syntax
-+ base-ifield ; FIXME: validate
-+ parsed-encoding
-+ (/derived-parse-ifield-assertion context isa-name-list
-+ ifield-assertion)
-+ (if (null? getter)
-+ #f
-+ (/operand-parse-getter
-+ context
-+ (list args
-+ (rtx-canonicalize context mode
-+ isa-name-list nil
-+ getter))
-+ (length args)))
-+ (if (null? setter)
-+ #f
-+ (/operand-parse-setter
-+ context
-+ (list (append args '(newval))
-+ (rtx-canonicalize context 'VOID
-+ isa-name-list
-+ (list (list 'newval mode #f))
-+ setter))
-+ (length args)))
-+ )))
-+ (elm-set! result 'hw-name (obj:name (hardware-for-mode mode-obj)))
-+ ;(elm-set! result 'hw-name (obj:name parsed-encoding))
-+ ;(elm-set! result 'hw-name base-ifield)
-+ (elm-set! result 'index parsed-encoding)
-+ ; (elm-set! result 'index (hw-index-derived)) ; A temporary dummy
-+ (logit 2 " new derived-operand; name= " name
-+ ", hw-name= " (op:hw-name result)
-+ ", index=" (obj:name parsed-encoding) "\n")
-+ (derived-ifield-set-owner! parsed-encoding result)
-+ result))
-+
-+ (begin
-+ (logit 2 "Ignoring " name ".\n")
-+ #f)))
-+)
-+
-+; Read a derived operand description.
-+; This is the main routine for analyzing derived operands in the .cpu file.
-+; CONTEXT is a <context> object for error messages.
-+; ARG-LIST is an associative list of field name and field value.
-+; /derived-operand-parse is invoked to create the <derived-operand> object.
-+
-+(define (/derived-operand-read context . arg-list)
-+ (let (
-+ (name nil)
-+ (comment nil)
-+ (attrs nil)
-+ (mode 'DFLT) ; use default mode of TYPE
-+ (args nil)
-+ (syntax nil)
-+ (base-ifield nil)
-+ (encoding nil)
-+ (ifield-assertion nil)
-+ (getter nil)
-+ (setter nil)
-+ )
-+
-+ (let loop ((arg-list arg-list))
-+ (if (null? arg-list)
-+ nil
-+ (let ((arg (car arg-list))
-+ (elm-name (caar arg-list)))
-+ (case elm-name
-+ ((name) (set! name (cadr arg)))
-+ ((comment) (set! comment (cadr arg)))
-+ ((attrs) (set! attrs (cdr arg)))
-+ ((mode) (set! mode (cadr arg)))
-+ ((args) (set! args (cadr arg)))
-+ ((syntax) (set! syntax (cadr arg)))
-+ ((base-ifield) (set! base-ifield (cadr arg)))
-+ ((encoding) (set! encoding (cadr arg)))
-+ ((ifield-assertion) (set! ifield-assertion (cadr arg)))
-+ ((getter) (set! getter (cadr arg)))
-+ ((setter) (set! setter (cadr arg)))
-+ (else (parse-error context "invalid derived-operand arg" arg)))
-+ (loop (cdr arg-list)))))
-+
-+ ; Now that we've identified the elements, build the object.
-+ (/derived-operand-parse context name comment attrs mode args
-+ syntax base-ifield encoding ifield-assertion
-+ getter setter))
-+)
-+
-+; Define a derived operand object, name/value pair list version.
-+
-+(define define-derived-operand
-+ (lambda arg-list
-+ (let ((op (apply /derived-operand-read
-+ (cons (make-current-context "define-derived-operand")
-+ arg-list))))
-+ (if op
-+ (current-op-add! op))
-+ op))
-+)
-+
-+; Define a derived operand object, all arguments specified.
-+; ??? Not supported (yet).
-+;
-+;(define (define-full-derived-operand name comment attrs mode ...)
-+; (let ((op (/derived-operand-parse (make-current-context "define-full-derived-operand")
-+; name comment attrs
-+; mode ...)))
-+; (if op
-+; (current-op-add! op))
-+; op)
-+;)
-+
-+; Parse an "anyof" choice, which is a derived-operand name.
-+; The result is {choice} unchanged.
-+
-+(define (/anyof-parse-choice context choice isa-name-list)
-+ (if (not (symbol? choice))
-+ (parse-error context "anyof choice not a symbol" choice))
-+ (let ((op (current-op-lookup choice isa-name-list)))
-+ (if (not (derived-operand? op))
-+ (parse-error context "anyof choice not a derived-operand" choice))
-+ op)
-+)
-+
-+; Parse an "anyof" derived operand.
-+; This is the main routine for building a derived operand object from a
-+; description in the .cpu file.
-+; All arguments are in raw (non-evaluated) form.
-+; The result is the parsed object or #f if object isn't for selected mach(s).
-+;
-+; ??? Currently no support for handlers(,???) found in normal operands.
-+; Later, when necessary.
-+
-+(define (/anyof-operand-parse context name comment attrs mode
-+ base-ifield choices)
-+ (logit 2 "Processing anyof operand " name " ...\n")
-+
-+ ;; Pick out name first to augment the error context.
-+ (let* ((name (parse-name context name))
-+ (context (context-append-name context name))
-+ (atlist-obj (atlist-parse context attrs "cgen_operand")))
-+
-+ (if (keep-atlist? atlist-obj #f)
-+
-+ (let ((mode-obj (parse-mode-name context mode))
-+ (isa-name-list (atlist-attr-value atlist-obj 'ISA #f)))
-+ (if (not mode-obj)
-+ (parse-error context "unknown mode" mode))
-+
-+ (make <anyof-operand>
-+ name
-+ (parse-comment context comment)
-+ atlist-obj
-+ mode
-+ base-ifield
-+ (map (lambda (c)
-+ (/anyof-parse-choice context c isa-name-list))
-+ choices)))
-+
-+ (begin
-+ (logit 2 "Ignoring " name ".\n")
-+ #f)))
-+)
-+
-+; Read an anyof operand description.
-+; This is the main routine for analyzing anyof operands in the .cpu file.
-+; CONTEXT is a <context> object for error messages.
-+; ARG-LIST is an associative list of field name and field value.
-+; /anyof-operand-parse is invoked to create the <anyof-operand> object.
-+
-+(define (/anyof-operand-read context . arg-list)
-+ (let (
-+ (name nil)
-+ (comment nil)
-+ (attrs nil)
-+ (mode 'DFLT) ; use default mode of TYPE
-+ (base-ifield nil)
-+ (choices nil)
-+ )
-+
-+ (let loop ((arg-list arg-list))
-+ (if (null? arg-list)
-+ nil
-+ (let ((arg (car arg-list))
-+ (elm-name (caar arg-list)))
-+ (case elm-name
-+ ((name) (set! name (cadr arg)))
-+ ((comment) (set! comment (cadr arg)))
-+ ((attrs) (set! attrs (cdr arg)))
-+ ((mode) (set! mode (cadr arg)))
-+ ((base-ifield) (set! base-ifield (cadr arg)))
-+ ((choices) (set! choices (cdr arg)))
-+ (else (parse-error context "invalid anyof-operand arg" arg)))
-+ (loop (cdr arg-list)))))
-+
-+ ; Now that we've identified the elements, build the object.
-+ (/anyof-operand-parse context name comment attrs mode base-ifield choices))
-+)
-+
-+; Define an anyof operand object, name/value pair list version.
-+
-+(define define-anyof-operand
-+ (lambda arg-list
-+ (let ((op (apply /anyof-operand-read
-+ (cons (make-current-context "define-anyof-operand")
-+ arg-list))))
-+ (if op
-+ (current-op-add! op))
-+ op))
-+)
-+
-+; Utilities to flatten out the <anyof-operand> derivation heirarchy.
-+
-+; Utility class used when instantiating insns with derived operands.
-+; This collects together in one place all the appropriate data of an
-+; instantiated "anyof" operand.
-+
-+(define <anyof-instance>
-+ (class-make '<anyof-instance>
-+ '(<derived-operand>)
-+ '(
-+ ; <anyof-operand> object we were instantiated from.
-+ parent
-+ )
-+ nil)
-+)
-+
-+(method-make-make! <anyof-instance>
-+ '(name comment attrs mode
-+ args syntax base-ifield encoding ifield-assertion
-+ getter setter parent)
-+)
-+
-+(define-getters <anyof-instance> anyof-instance (parent))
-+
-+(define (anyof-instance? x) (class-instance? <anyof-instance> x))
-+
-+; Return initial list of known ifield values in {anyof-instance}.
-+
-+(define (/anyof-initial-known anyof-instance)
-+ (assert (derived-operand? anyof-instance))
-+ (let ((encoding (derived-encoding anyof-instance)))
-+ (assert (derived-ifield? encoding))
-+ (ifld-known-values (derived-ifield-subfields encoding)))
-+)
-+
-+; Return true if {anyof-instance} satisfies its ifield assertions.
-+; {known-values} is the {known} argument to rtx-solve.
-+
-+(define (anyof-satisfies-assertions? anyof-instance known-values)
-+ (assert (derived-operand? anyof-instance))
-+ (let ((assertion (derived-ifield-assertion anyof-instance)))
-+ (if assertion
-+ (rtx-solve (make-obj-context anyof-instance #f)
-+ anyof-instance ; owner
-+ assertion
-+ known-values)
-+ #t))
-+)
-+
-+; Subroutine of /anyof-merge-subchoices.
-+; Merge syntaxes of VALUE-NAMES/VALUES into SYNTAX.
-+;
-+; Example:
-+; If SYNTAX is "$a+$b", and VALUE-NAMES is (b), and VALUES is
-+; ("$c+$d"-object), then return "$a+$c+$d".
-+
-+(define (/anyof-syntax anyof-instance)
-+ (elm-get anyof-instance 'syntax)
-+)
-+
-+(define (/anyof-name anyof-instance)
-+ (elm-get anyof-instance 'name)
-+)
-+
-+; CONTAINER is the <anyof-operand> containing SYNTAX.
-+
-+(define (/anyof-merge-syntax syntax value-names values container)
-+ (let* ((isa-name-list (obj-isa-list container))
-+ (syntax-elements (syntax-break-out syntax isa-name-list)))
-+ (syntax-make (map (lambda (e)
-+ (if (anyof-operand? e)
-+ (let* ((name (obj:name e))
-+ (indx (element-lookup-index name value-names 0)))
-+ (if (not indx)
-+ (error "Name " name " not one of " values)
-+ )
-+ (/anyof-syntax (list-ref values indx)))
-+ e))
-+ syntax-elements)))
-+)
-+
-+; Subroutine of /anyof-merge-subchoices.
-+; Merge syntaxes of {value-names}/{values} into <derived-ifield> {encoding}.
-+; The result is a new <derived-ifield> object with subfields matching
-+; {value-names} replaced with {values}.
-+; {container} is the containing <anyof-operand>.
-+;
-+; Example:
-+; If {encoding} is (a-ifield-object b-anyof-ifield-object), and {value-names}
-+; is (b), and {values} is (c-choice-of-b-object), then return
-+; (a-ifield-object c-choice-of-b-ifield-object).
-+
-+(define (/anyof-merge-encoding container encoding value-names values)
-+ (assert (derived-ifield? encoding))
-+ (let ((subfields (derived-ifield-subfields encoding))
-+ (result (object-copy encoding)))
-+ ; Delete all the elements that are being replaced with ifields from
-+ ; {values} and add the new ifields.
-+ (derived-ifield-set-subfields! result
-+ (append
-+ (find (lambda (f)
-+ (not (memq (obj:name f) value-names)))
-+ subfields)
-+ (map derived-encoding values)))
-+ result)
-+)
-+
-+; Subroutine of /anyof-merge-subchoices.
-+; Merge semantics of VALUE-NAMES/VALUES into GETTER.
-+;
-+; Example:
-+; If GETTER is (mem QI foo), and VALUE-NAMES is (foo), and VALUES is
-+; ((add a b)-object), then return (mem QI (add a b)).
-+
-+(define (/anyof-merge-getter getter value-names values)
-+ ; ??? This implementation is a quick hack, intended to evolve or be replaced.
-+ (cond ((not getter)
-+ #f)
-+ (else
-+ (map (lambda (e)
-+ (cond ((symbol? e)
-+ (let ((indx (element-lookup-index e value-names 0)))
-+ (if indx
-+ (op:getter (list-ref values indx))
-+ e)))
-+ ((pair? e) ; pair? -> cheap non-null-list?
-+ (/anyof-merge-getter e value-names values))
-+ (else
-+ e)))
-+ getter)))
-+)
-+
-+; Subroutine of /anyof-merge-subchoices.
-+; Merge semantics of VALUE-NAMES/VALUES into SETTER.
-+;
-+; Example:
-+; If SETTER is (set (mem QI foo) newval), and VALUE-NAMES is (foo),
-+; and VALUES is ((add a b)-object), then return
-+; (set (mem QI (add a b)) newval).
-+;
-+; ??? `newval' in this context is a reserved word.
-+
-+(define (/anyof-merge-setter setter value-names values)
-+ ; ??? This implementation is a quick hack, intended to evolve or be replaced.
-+ (cond ((not setter)
-+ #f)
-+ ((rtx-single-set? setter)
-+ (let ((src (rtx-set-src setter))
-+ (dest (rtx-set-dest setter))
-+ (mode (rtx-mode setter))
-+ (options (rtx-options setter))
-+ (name (rtx-name setter)))
-+ (if (rtx-kind 'mem dest)
-+ (set! dest
-+ (rtx-change-address dest
-+ (/anyof-merge-getter
-+ (rtx-mem-addr dest)
-+ value-names values))))
-+ (set! src (/anyof-merge-getter src value-names values))
-+ (rtx-make name options mode dest src)))
-+ (else
-+ (error "/anyof-merge-setter: unsupported form" (car setter))))
-+)
-+
-+; Subroutine of -sub-insn-make!.
-+; Merge semantics of VALUE-NAMES/VALUES into SEMANTICS.
-+; Defined here and not in insn.scm to keep it with the getter/setter mergers.
-+;
-+; Example:
-+; If SEMANTICS is (mem QI foo), and VALUE-NAMES is (foo), and VALUES is
-+; ((add a b)-object), then return (mem QI (add a b)).
-+
-+(define (anyof-merge-semantics semantics value-names values)
-+ ; ??? This implementation is a quick hack, intended to evolve or be replaced.
-+ (let ((result
-+ (cond ((not semantics)
-+ #f)
-+ (else
-+ (map (lambda (e)
-+ (cond ((symbol? e)
-+ (let ((indx (element-lookup-index e value-names 0)))
-+ (if indx
-+ (/anyof-name (list-ref values indx))
-+ ; (op:sem-name (list-ref values indx))
-+ e)))
-+ ((pair? e) ; pair? -> cheap non-null-list?
-+ (anyof-merge-semantics e value-names values))
-+ (else
-+ e)))
-+ semantics)))))
-+ (logit 4 " merged semantics: [" semantics "] -> [" result "]\n")
-+ result)
-+)
-+
-+; Subroutine of /anyof-merge-subchoices.
-+; Merge assertion of VALUE-NAMES/VALUES into ASSERTION.
-+;
-+; Example:
-+; If ASSERTION is (ne f-base-reg 5), and VALUE-NAMES is
-+; (foo), and VALUES is ((ne f-mod 0)), then return
-+; (andif (ne f-base-reg 5) (ne f-mod 0)).
-+;
-+; FIXME: Perform simplification pass, based on combined set of known
-+; ifield values.
-+
-+(define (/anyof-merge-ifield-assertion assertion value-names values)
-+ (let ((assertions (find identity
-+ (cons assertion
-+ (map derived-ifield-assertion values)))))
-+ (if (null? assertions)
-+ #f
-+ (rtx-combine 'andif assertions)))
-+)
-+
-+; Subroutine of /anyof-all-subchoices.
-+; Return a copy of <derived-operand> CHOICE with NEW-ARGS from ANYOF-ARGS
-+; merged in. This is for when a derived operand is itself composed of
-+; anyof operands.
-+; ANYOF-ARGS is a list of <anyof-operand>'s to be replaced in CHOICE.
-+; NEW-ARGS is a corresponding list of values (<derived-operands>'s) of each
-+; element in ANYOF-ARGS.
-+; CONTAINER is the <anyof-operand> containing CHOICE.
-+
-+(define (/anyof-merge-subchoices container choice anyof-args new-args)
-+ (assert (all-true? (map anyof-operand? anyof-args)))
-+ (assert (all-true? (map derived-operand? new-args)))
-+
-+ (let* ((arg-names (map obj:name anyof-args))
-+ (encoding (/anyof-merge-encoding container (derived-encoding choice)
-+ arg-names new-args))
-+ (result
-+ (make <anyof-instance>
-+ (apply symbol-append
-+ (cons (obj:name choice)
-+ (map (lambda (anyof)
-+ (symbol-append '- (obj:name anyof)))
-+ new-args)))
-+ (obj:comment choice)
-+ (obj-atlist choice)
-+ (op:mode choice)
-+ (derived-args choice)
-+ (/anyof-merge-syntax (derived-syntax choice)
-+ arg-names new-args
-+ container)
-+ (derived-base-ifield choice)
-+ encoding
-+ (/anyof-merge-ifield-assertion (derived-ifield-assertion choice)
-+ anyof-args new-args)
-+ (/anyof-merge-getter (op:getter choice)
-+ arg-names new-args)
-+ (/anyof-merge-setter (op:setter choice)
-+ arg-names new-args)
-+ container)))
-+
-+ (elm-set! result 'index encoding)
-+ ; Creating the link from {encoding} to {result}.
-+ (derived-ifield-set-owner! encoding result)
-+ result)
-+)
-+
-+; Subroutine of /anyof-all-choices-1.
-+; Return a list of all possible subchoices of <derived-operand> ANYOF-CHOICE,
-+; known to use <anyof-operand>'s itself.
-+; CONTAINER is the containing <anyof-operand>.
-+
-+(define (/anyof-all-subchoices container anyof-choice)
-+ ; Split args into anyof and non-anyof elements.
-+ (let* ((args (derived-args anyof-choice))
-+ (anyof-args (find anyof-operand? args)))
-+
-+ (assert (not (null? anyof-args)))
-+
-+ ; Iterate over all combinations.
-+ ; {todo} is a list with one element for each anyof argument.
-+ ; Each element is in turn a list of all <derived-operand> choices for the
-+ ; <anyof-operand>. The result we want is every possible combination.
-+ ; Example:
-+ ; If {todo} is ((1 2 3) (a) (B C)) the result we want is
-+ ; ((1 a B) (1 a C) (2 a B) (2 a C) (3 a B) (3 a C)).
-+ ;
-+ ; Note that some of these values may be derived from nested
-+ ; <anyof-operand>'s which is why we recursively call /anyof-all-choices-1.
-+ ; ??? /anyof-all-choices-1 should cache the results.
-+
-+ (let* ((todo (map /anyof-all-choices-1 anyof-args))
-+ (lengths (map length todo))
-+ (total (apply * lengths))
-+ (result nil))
-+
-+ ; ??? One might prefer a `do' loop here, but every time I see one I
-+ ; have to spend too long remembering its syntax.
-+ (let loop ((i 0))
-+ (if (< i total)
-+ (let* ((indices (split-value lengths i))
-+ (new-args (map list-ref todo indices)))
-+ ;(display "new-args: " (current-error-port))
-+ ;(display (map obj:name new-args) (current-error-port))
-+ ;(newline (current-error-port))
-+ (set! result
-+ (cons (/anyof-merge-subchoices container
-+ anyof-choice
-+ anyof-args
-+ new-args)
-+ result))
-+ (loop (+ i 1)))))
-+
-+ result))
-+)
-+
-+; Return an <anyof-instance> object from <derived-operand> {derop}, which is a
-+; choice of {anyof-operand}.
-+
-+(define (/anyof-instance-from-derived anyof-operand derop)
-+ (let* ((encoding (object-copy (derived-encoding derop)))
-+ (result
-+ (make <anyof-instance>
-+ (obj:name derop)
-+ (obj:comment derop)
-+ (obj-atlist derop)
-+ (op:mode derop)
-+ (derived-args derop)
-+ (derived-syntax derop)
-+ (derived-base-ifield derop)
-+ encoding
-+ (derived-ifield-assertion derop)
-+ (op:getter derop)
-+ (op:setter derop)
-+ anyof-operand)))
-+ ; Creating the link from {encoding} to {result}.
-+ (derived-ifield-set-owner! encoding result)
-+ result)
-+)
-+
-+; Return list of <anyof-instance> objects, one for each possible variant of
-+; ANYOF-OPERAND.
-+;
-+; One could move this up into the cpu description file using pmacros.
-+; However, that's not the right way to go. How we currently implement
-+; the notion of derived operands is separate from the notion of having them
-+; in the description language. pmacros are not "in" the language (to the
-+; extent that the cpu description file reader "sees" them), they live
-+; above it. And the right way to do this is with something "in" the language.
-+; Derived operands are the first cut at it. They'll evolve or be replaced
-+; (and it's the implementation of them that will evolve first).
-+
-+(define (/anyof-all-choices-1 anyof-operand)
-+ (assert (anyof-operand? anyof-operand))
-+
-+ (let ((result nil))
-+
-+ ; For each choice, scan the operands for further derived operands.
-+ ; If found, replace the choice with the list of its subchoices.
-+ ; If not found, create an <anyof-instance> object for it. This is
-+ ; basically just a copy of the object, but {anyof-operand} is recorded
-+ ; with it so that we can later resolve `follows' specs.
-+
-+ (let loop ((choices (anyof-choices anyof-operand)))
-+ (if (not (null? choices))
-+ (let* ((this (car choices))
-+ (args (derived-args this)))
-+
-+ (if (any-true? (map anyof-operand? args))
-+
-+ ; This operand has "anyof" operands so we need to turn this
-+ ; choice into a list of all possible subchoices.
-+ (let ((subchoices (/anyof-all-subchoices anyof-operand this)))
-+ (set! result
-+ (append subchoices result)))
-+
-+ ; No <anyof-operand> arguments.
-+ (set! result
-+ (cons (/anyof-instance-from-derived anyof-operand this)
-+ result)))
-+
-+ (loop (cdr choices)))))
-+
-+ (assert (all-true? (map anyof-instance? result)))
-+ result)
-+)
-+
-+; Cover fn of /anyof-all-choices-1.
-+; Return list of <anyof-instance> objects, one for each possible variant of
-+; ANYOF-OPERAND.
-+; We want to delete choices that fail their ifield assertions, but since
-+; /anyof-all-choices-1 can recursively call itself, assertion checking is
-+; defered until it returns.
-+
-+(define (anyof-all-choices anyof-operand)
-+ (let ((all-choices (/anyof-all-choices-1 anyof-operand)))
-+
-+ ; Delete ones that fail their ifield assertions.
-+ ; Sometimes there isn't enough information yet to completely do this.
-+ ; When that happens it is the caller's responsibility to deal with it.
-+ ; However, it is our responsibility to assert as much as we can.
-+ (find (lambda (op)
-+ (anyof-satisfies-assertions? op
-+ (/anyof-initial-known op)))
-+ all-choices))
-+)
-+
-+; Operand utilities.
-+
-+; Look up operand NAME in the operand table.
-+; This proc isolates the strategy we use to record operand objects.
-+
-+; Look up an operand via SEM-NAME.
-+
-+(define (op:lookup-sem-name op-list sem-name)
-+ (let loop ((op-list op-list))
-+ (cond ((null? op-list) #f)
-+ ((eq? sem-name (op:sem-name (car op-list))) (car op-list))
-+ (else (loop (cdr op-list)))))
-+)
-+
-+; Given an operand, return the starting bit number.
-+; Note that the field isn't necessarily contiguous.
-+
-+(define (op:start operand) (send operand 'field-start))
-+
-+; Given an operand, return the total length in bits.
-+; Note that the field isn't necessarily contiguous.
-+
-+(define (op:length operand) (send operand 'field-length))
-+
-+; Return a sorted list of operand lists.
-+; Each element in the inner list is an operand with the same name, but for
-+; whatever reason were defined separately.
-+; The outer list is sorted by name.
-+
-+(define (op-sort op-list)
-+ ; We assume there is at least one operand.
-+ (if (null? op-list)
-+ (error "op-sort: no operands!"))
-+ ; First sort by name.
-+ (let ((sorted-ops (alpha-sort-obj-list op-list)))
-+ (let loop ((result nil)
-+ ; Current set of operands with same name.
-+ (this-elm (list (car sorted-ops)))
-+ (ops (cdr sorted-ops))
-+ )
-+ (if (null? ops)
-+ ; Reverse things to keep them in file order (minimizes random
-+ ; changes in generated files).
-+ (reverse! (cons (reverse! this-elm) result))
-+ ; Not done. Check for new set.
-+ (if (eq? (obj:name (car ops)) (obj:name (car this-elm)))
-+ (loop result (cons (car ops) this-elm) (cdr ops))
-+ (loop (cons (reverse! this-elm) result) (list (car ops))
-+ (cdr ops))))))
-+)
-+
-+; FIXME: Not used anymore but leave in for now.
-+; Objects used in assembler syntax ($0, $1, ...).
-+;
-+;(define <syntax-operand>
-+; (class-make '<syntax-operand> nil '(number value) nil))
-+;(method-make-make! <syntax-operand> '(number))
-+;
-+;(define $0 (make <syntax-operand> 0))
-+;(define $1 (make <syntax-operand> 1))
-+;(define $2 (make <syntax-operand> 2))
-+;(define $3 (make <syntax-operand> 3))
-+
-+;; PC support.
-+;; This is a subclass of <operand>, used to give the simulator a place to
-+;; hang a couple of methods.
-+;; At the moment we only support one pc, a reasonable place to stop for now.
-+
-+(define <pc> (class-make '<pc> '(<operand>) nil nil))
-+
-+(method-make!
-+ <pc> 'make!
-+ (lambda (self)
-+ (send-next self '<pc> 'make!
-+ (builtin-location) 'pc "program counter"
-+ (atlist-parse (make-prefix-context "make! of pc")
-+ '(SEM-ONLY) "cgen_operand")
-+ 'h-pc ;; FIXME: keep name h-pc hardwired?
-+ 'DFLT
-+ ;;(hw-index-scalar) ;; FIXME: change to this
-+ (make <hw-index> 'anonymous
-+ 'ifield 'UINT (current-ifld-lookup 'f-nil))
-+ nil ;; handlers
-+ #f #f) ;; getter setter
-+ self)
-+)
-+
-+; Return a boolean indicating if operand op is the pc.
-+; This must not call op:type. op:type will try to resolve a hardware
-+; element that may be multiply specified, and this is used in contexts
-+; where that's not possible.
-+
-+(define (pc? op) (class-instance? <pc> op))
-+
-+; Called before/after loading the .cpu file to initialize/finalize.
-+
-+; Builtins.
-+; The pc operand used in rtl expressions.
-+(define pc nil)
-+
-+; Called before reading a .cpu file in.
-+
-+(define (operand-init!)
-+ (reader-add-command! 'define-operand
-+ "\
-+Define an operand, name/value pair list version.
-+"
-+ nil 'arg-list define-operand)
-+ (reader-add-command! 'define-full-operand
-+ "\
-+Define an operand, all arguments specified.
-+"
-+ nil '(name comment attrs hw-type mode hw-index handlers getter setter)
-+ define-full-operand)
-+
-+ (reader-add-command! 'define-derived-operand
-+ "\
-+Define a derived operand, name/value pair list version.
-+"
-+ nil 'arg-list define-derived-operand)
-+
-+ (reader-add-command! 'define-anyof-operand
-+ "\
-+Define an anyof operand, name/value pair list version.
-+"
-+ nil 'arg-list define-anyof-operand)
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Install builtin operands.
-+
-+(define (operand-builtin!)
-+ ; Standard operand attributes.
-+ ; ??? Some of these can be combined into one.
-+
-+ (define-attr '(for operand) '(type boolean) '(name NEGATIVE)
-+ '(comment "value is negative"))
-+
-+ ; Operand plays a part in RELAXABLE/RELAXED insns.
-+ (define-attr '(for operand) '(type boolean) '(name RELAX)
-+ '(comment "operand is the relax participant"))
-+
-+ ; ??? Might be able to make SEM-ONLY go away (or machine compute it)
-+ ; by scanning which operands are refered to by the insn syntax strings.
-+ (define-attr '(for operand) '(type boolean) '(name SEM-ONLY)
-+ '(comment "operand is for semantic use only"))
-+
-+ ; Also (defined elsewhere): PCREL-ADDR ABS-ADDR.
-+
-+ (set! pc (make <pc>))
-+ (obj-cons-attr! pc (all-isas-attr))
-+ (current-op-add! pc)
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Called after a .cpu file has been read in.
-+
-+(define (operand-finish!)
-+ *UNSPECIFIED*
-+)
-diff -Nur binutils-2.24.orig/cgen/pgmr-tools.scm binutils-2.24/cgen/pgmr-tools.scm
---- binutils-2.24.orig/cgen/pgmr-tools.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/pgmr-tools.scm 2016-06-30 21:26:12.665893579 +0200
-@@ -0,0 +1,183 @@
-+; Programmer development tools.
-+; Copyright (C) 2000, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+;
-+; This file contains a collection of programmer debugging tools.
-+; They're mainly intended for using cgen to debug other things,
-+; but any kind of debugging tool can go here.
-+; All routines require the application independent part of cgen to be loaded
-+; and the .cpu file to be loaded. They do not require any particular
-+; application though (opcodes, simulator, etc.). If they do, that's a bug.
-+; It may be that the appication has a generally useful routine that should
-+; live elsewhere, but that's it.
-+;
-+; These tools don't have to be particularily efficient (within reason).
-+; It's more important that they be simple and clear.
-+;
-+; Some tools require ifmt-compute! to be run.
-+; They will run it if necessary.
-+;
-+; Table of contents:
-+;
-+; pgmr-pretty-print-insn-format
-+; cgen debugging tool, pretty prints the iformat of an <insn> object
-+;
-+; pgmr-pretty-print-insn-value
-+; break out an instruction's value into its component fields
-+;
-+; pgmr-lookup-insn
-+; given a random bit pattern for an instruction, lookup the insn and return
-+; its <insn> object
-+
-+; Pretty print the instruction's opcode value, for debugging.
-+; INSN is an <insn> object.
-+
-+(define (pgmr-pretty-print-insn-format insn)
-+
-+ (define (to-width width n-str)
-+ (string-take-with-filler (- width)
-+ n-str
-+ #\0))
-+
-+ (define (dump-insn-mask mask insn-length)
-+ (string-append "0x" (to-width (quotient insn-length 4)
-+ (number->string mask 16))
-+ ", "
-+ (string-map
-+ (lambda (n)
-+ (string-append " " (to-width 4 (number->string n 2))))
-+ (reverse
-+ (split-bits (make-list (quotient insn-length 4) 4)
-+ mask)))))
-+
-+ ; Print VALUE with digits not in MASK printed as "X".
-+ (define (dump-insn-value value mask insn-length)
-+ (string-append "0x" (to-width (quotient insn-length 4)
-+ (number->string value 16))
-+ ", "
-+ (string-map
-+ (lambda (n mask)
-+ (string-append
-+ " "
-+ (list->string
-+ (map (lambda (char in-mask?)
-+ (if in-mask? char #\X))
-+ (string->list (to-width 4 (number->string n 2)))
-+ (bits->bools mask 4)))))
-+ (reverse
-+ (split-bits (make-list (quotient insn-length 4) 4)
-+ value))
-+ (reverse
-+ (split-bits (make-list (quotient insn-length 4) 4)
-+ mask)))))
-+
-+ (define (dump-ifield f)
-+ (string-append " Name: "
-+ (obj:name f)
-+ ", "
-+ "Start: "
-+ (number->string
-+ (+ (bitrange-word-offset (-ifld-bitrange f))
-+ (bitrange-start (-ifld-bitrange f))))
-+ ", "
-+ "Length: "
-+ (number->string (ifld-length f))
-+ "\n"))
-+
-+ (let* ((iflds (sort-ifield-list (insn-iflds insn)
-+ (not (current-arch-insn-lsb0?))))
-+ (mask (compute-insn-base-mask iflds))
-+ (mask-length (compute-insn-base-mask-length iflds)))
-+
-+ (display
-+ (string-append
-+ "Instruction: " (obj:name insn)
-+ "\n"
-+ "Syntax: "
-+ (insn-syntax insn)
-+ "\n"
-+ "Fields:\n"
-+ (string-map dump-ifield iflds)
-+ "Instruction length (computed from ifield list): "
-+ (number->string (apply + (map ifld-length iflds)))
-+ "\n"
-+ "Mask: "
-+ (dump-insn-mask mask mask-length)
-+ "\n"
-+ "Value: "
-+ (let ((value (apply +
-+ (map (lambda (fld)
-+ (ifld-value fld mask-length
-+ (ifld-get-value fld)))
-+ (find ifld-constant? (ifields-base-ifields (insn-iflds insn)))))))
-+ (dump-insn-value value mask mask-length))
-+ ; TODO: Print value spaced according to fields.
-+ "\n"
-+ )))
-+)
-+
-+; Pretty print an instruction's value.
-+
-+(define (pgmr-pretty-print-insn-value insn value)
-+ (define (dump-ifield ifld value name-width)
-+ (string-append
-+ (string-take name-width (obj:str-name ifld))
-+ ": "
-+ (number->string value)
-+ ", 0x"
-+ (number->hex value)
-+ "\n"))
-+
-+ (let ((ifld-values (map (lambda (ifld)
-+ (ifld-extract ifld insn value))
-+ (insn-iflds insn)))
-+ (max-name-length (apply max
-+ (map string-length
-+ (map obj:name
-+ (insn-iflds insn)))))
-+ )
-+
-+ (display
-+ (string-append
-+ "Instruction: " (obj:name insn)
-+ "\n"
-+ "Fields:\n"
-+ (string-map (lambda (ifld value)
-+ (dump-ifield ifld value max-name-length))
-+ (insn-iflds insn)
-+ ifld-values)
-+ )))
-+)
-+
-+; Return the <insn> object matching VALUE.
-+; VALUE is either a single number of size base-insn-bitsize,
-+; or a list of numbers for variable length ISAs.
-+; LENGTH is the total length of VALUE in bits.
-+
-+(define (pgmr-lookup-insn length value)
-+ (arch-analyze-insns! CURRENT-ARCH
-+ #t ; include aliases
-+ #f) ; don't need to analyze semantics
-+
-+ ; Return a boolean indicating if BASE matches the base part of <insn> INSN.
-+ (define (match-base base insn)
-+ (let ((mask (compute-insn-base-mask (insn-iflds insn)))
-+ (ivalue (insn-value insn)))
-+ ; return (value & mask) == ivalue
-+ (= (logand base mask) ivalue)))
-+
-+ (define (match-rest value insn)
-+ #t)
-+
-+ (let ((base (if (list? value) (car value) value)))
-+ (let loop ((insns (current-insn-list)))
-+ (if (null? insns)
-+ #f
-+ (let ((insn (car insns)))
-+ (if (and (= length (insn-length insn))
-+ (match-base base insn)
-+ (match-rest value insn))
-+ insn
-+ (loop (cdr insns)))))))
-+)
-diff -Nur binutils-2.24.orig/cgen/pmacros.scm binutils-2.24/cgen/pmacros.scm
---- binutils-2.24.orig/cgen/pmacros.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/pmacros.scm 2016-06-30 21:26:12.665893579 +0200
-@@ -0,0 +1,1435 @@
-+;; Preprocessor-like macro support.
-+;; Copyright (C) 2000, 2009, 2010 Red Hat, Inc.
-+;; This file is part of CGEN.
-+;; See file COPYING.CGEN for details.
-+
-+;; TODO:
-+;; - Like C preprocessor macros, there is no scoping [one can argue
-+;; there should be]. Maybe in time (??? Hmmm... done?)
-+;; - Support for multiple macro tables.
-+
-+;; Non-standard required routines:
-+;; Provided by Guile:
-+;; make-hash-table, hashq-ref, hashq-set!, symbol-append,
-+;; source-properties
-+;; Provided by CGEN:
-+;; location-property, location-property-set!,
-+;; source-properties-location->string,
-+;; single-location->string, location-top, unspecified-location,
-+;; reader-process-expanded!, num-args-ok?, *UNSPECIFIED*.
-+
-+;; The convention we use says `-' begins "local" objects.
-+;; At some point this might also use the Guile module system.
-+
-+;; This uses Guile's source-properties system to track source location.
-+;; The chain of macro invocations is tracked and stored in the result as
-+;; object property "location-property".
-+
-+;; Exported routines:
-+;;
-+;; pmacro-init! - initialize the pmacro system
-+;;
-+;; define-pmacro - define a symbolic or procedural pmacro
-+;;
-+;; (define-pmacro symbol ["comment"] expansion)
-+;; (define-pmacro (symbol [args]) ["comment"] (expansion))
-+;;
-+;; ARGS is a list of `symbol' or `(symbol default-value)' elements.
-+;;
-+;; pmacro-expand - expand all pmacros in an expression
-+;;
-+;; (pmacro-expand expression loc)
-+;;
-+;; pmacro-trace - same as pmacro-expand, but trace macro expansion
-+;; Output is sent to current-error-port.
-+;;
-+;; (pmacro-trace expression loc)
-+;;
-+;; pmacro-dump - expand all pmacros in an expression, for debugging purposes
-+;;
-+;; (pmacro-dump expression)
-+
-+;; pmacro-debug - expand all pmacros in an expression,
-+;; printing various debugging messages.
-+;; This does not process %exec.
-+;;
-+;; (pmacro-debug expression)
-+
-+;; Builtin pmacros:
-+;;
-+;; (%sym symbol1 symbol2 ...) - symbolstr-append
-+;; (%str string1 string2 ...) - stringsym-append
-+;; (%hex number [width]) - convert to hex string
-+;; (%upcase string)
-+;; (%downcase string)
-+;; (%substring string start end) - get part of a string
-+;; (%splice a b (%unsplice c) d e ...) - splice list into another list
-+;; (%iota count [start [increment]]) - number generator
-+;; (%map pmacro arg1 . arg-rest)
-+;; (%for-each pmacro arg1 . arg-rest)
-+;; (%eval expr) - expand (or evaluate it) expr
-+;; (%exec expr) - execute expr immediately
-+;; (%apply pmacro-name arg)
-+;; (%pmacro (arg-list) expansion) - akin go lambda in Scheme
-+;; (%pmacro? arg)
-+;; (%let (var-list) expr1 . expr-rest) - akin to let in Scheme
-+;; (%let* (var-list) expr1 . expr-rest) - akin to let* in Scheme
-+;; (%if expr then [else])
-+;; (%case expr ((case-list1) stmt) [case-expr-stmt-list] [(else stmt)])
-+;; (%cond (expr stmt) [(cond-expr-stmt-list)] [(else stmt)])
-+;; (%begin . stmt-list)
-+;; (%print . exprs) - for debugging messages
-+;; (%dump expr) - dump expr in readable format
-+;; (%error . message) - print error message and exit
-+;; (%list . exprs)
-+;; (%ref l n) - extract the n'th element of list l
-+;; (%length x) - length of symbol, string, or list
-+;; (%replicate n expr) - return list of expr replicated n times
-+;; (%find pred l) - return elements of list l matching pred
-+;; (%equal? x y) - deep comparison
-+;; (%andif expr . rest) - && in C
-+;; (%orif expr . rest) - || in C
-+;; (%not expr) - ! in C
-+;; (%eq x y)
-+;; (%ne x y)
-+;; (%lt x y)
-+;; (%gt x y)
-+;; (%le x y)
-+;; (%ge x y)
-+;; (%add x y)
-+;; (%sub x y)
-+;; (%mul x y)
-+;; (%div x y) - integer division
-+;; (%rem x y) - integer remainder
-+;; (%sll x n) - shift left logical
-+;; (%srl x n) - shift right logical
-+;; (%sra x n) - shift right arithmetic
-+;; (%and x y) - bitwise and
-+;; (%or x y) - bitwise or
-+;; (%xor x y) - bitwise xor
-+;; (%inv x) - bitwise invert
-+;; (%car l)
-+;; (%cdr l)
-+;; (%caar l)
-+;; (%cadr l)
-+;; (%cdar l)
-+;; (%cddr l)
-+;; (%internal-test expr) - testsuite internal use only
-+;;
-+;; NOTE: %cons currently absent on purpose
-+;;
-+;; %sym and %str convert numbers to symbols/strings as necessary (base 10).
-+;;
-+;; %pmacro is for constructing pmacros on-the-fly, like lambda, and is currently
-+;; only valid as arguments to other pmacros or assigned to a local in a {%let}
-+;; or {%let*}.
-+;;
-+;; NOTE: While Scheme requires tail recursion to be implemented as a loop,
-+;; we do not. We might some day, but not today.
-+;;
-+;; ??? Methinks .foo isn't a valid R5RS symbol. May need to change
-+;; to something else.
-+
-+;; True if doing pmacro expansion via pmacro-debug.
-+(define /pmacro-debug? #f)
-+;; True if doing pmacro expansion via pmacro-trace.
-+(define /pmacro-trace? #f)
-+
-+;; The original prefix to pmacro names.
-+(define /pmacro-orig-prefix ".")
-+
-+;; The prefix to pmacro names.
-+(define /pmacro-prefix "%")
-+
-+;; The pmacro table.
-+(define /pmacro-table #f)
-+(define (/pmacro-lookup name) (hashq-ref /pmacro-table name #f))
-+(define (/pmacro-set! name val) (hashq-set! /pmacro-table name val))
-+
-+;; A copy of syntactic pmacros is kept separately.
-+(define /smacro-table #f)
-+(define (/smacro-lookup name) (hashq-ref /smacro-table name #f))
-+(define (/smacro-set! name val) (hashq-set! /smacro-table name val))
-+
-+;; Marker to indicate a value is a pmacro.
-+;; NOTE: Naming this "<pmacro>" is intentional. It makes them look like
-+;; objects of class <pmacro>. However we don't use COS in part to avoid
-+;; a dependency on COS and in part because displaying COS objects isn't well
-+;; supported (displaying them in debugging dumps adds a lot of noise).
-+(define /pmacro-marker '<pmacro>)
-+
-+;; Utilities to create and access pmacros.
-+(define (/pmacro-make name arg-spec default-values
-+ syntactic-form? transformer comment)
-+ (vector /pmacro-marker name arg-spec default-values
-+ syntactic-form? transformer comment)
-+)
-+(define (/pmacro? x) (and (vector? x) (eq? (vector-ref x 0) /pmacro-marker)))
-+(define (/pmacro-name pmac) (vector-ref pmac 1))
-+(define (/pmacro-arg-spec pmac) (vector-ref pmac 2))
-+(define (/pmacro-default-values pmac) (vector-ref pmac 3))
-+(define (/pmacro-syntactic-form? pmac) (vector-ref pmac 4))
-+(define (/pmacro-transformer pmac) (vector-ref pmac 5))
-+(define (/pmacro-comment pmac) (vector-ref pmac 6))
-+
-+;; Create a new environment, prepending NAMES to PREV-ENV.
-+
-+(define (/pmacro-env-make loc prev-env names values)
-+ (if (= (length names) (length values))
-+ (append! (map cons names values) prev-env)
-+ (/pmacro-loc-error loc
-+ (string-append "invalid number of parameters, expected "
-+ (number->string (length names)))
-+ values))
-+)
-+
-+;; Look up NAME in ENV.
-+
-+(define (/pmacro-env-ref env name) (assq name env))
-+
-+;; Error message generator.
-+
-+(define (/pmacro-error msg expr)
-+ (error (string-append
-+ (or (port-filename (current-input-port)) "<input>")
-+ ":"
-+ (number->string (port-line (current-input-port)))
-+ ":"
-+ msg
-+ ":")
-+ expr)
-+)
-+
-+;; Error message generator when we have a location.
-+
-+(define (/pmacro-loc-error loc errmsg expr)
-+ (let* ((top-sloc (location-top loc))
-+ (intro "During pmacro expansion")
-+ (text (string-append "Error: " errmsg)))
-+ (error (simple-format
-+ #f
-+ "\n~A:\n@ ~A:\n\n~A: ~A:"
-+ intro
-+ (location->string loc)
-+ (single-location->simple-string top-sloc)
-+ text)
-+ expr))
-+)
-+
-+;; Issue an error where a number was expected.
-+
-+(define (/pmacro-expected-number op n)
-+ (/pmacro-error (string-append "invalid arg for " op ", expected number") n)
-+)
-+
-+;; Verify N is a number.
-+
-+(define (/pmacro-verify-number op n)
-+ (if (not (number? n))
-+ (/pmacro-expected-number op n))
-+)
-+
-+;; Issue an error where an integer was expected.
-+
-+(define (/pmacro-expected-integer op n)
-+ (/pmacro-error (string-append "invalid arg for " op ", expected integer") n)
-+)
-+
-+;; Verify N is an integer.
-+
-+(define (/pmacro-verify-integer op n)
-+ (if (not (integer? n))
-+ (/pmacro-expected-integer op n))
-+)
-+
-+;; Issue an error where a non-negative integer was expected.
-+
-+(define (/pmacro-expected-non-negative-integer op n)
-+ (/pmacro-error (string-append "invalid arg for " op ", expected non-negative integer") n)
-+)
-+
-+;; Verify N is a non-negative integer.
-+
-+(define (/pmacro-verify-non-negative-integer op n)
-+ (if (or (not (integer? n))
-+ (< n 0))
-+ (/pmacro-expected-non-negative-integer op n))
-+)
-+
-+;; Expand a list of expressions, in order.
-+;; The result is the value of the last one.
-+
-+(define (/pmacro-expand-expr-list exprs env loc)
-+ (let ((result nil))
-+ (for-each (lambda (expr)
-+ (set! result (/pmacro-expand expr env loc)))
-+ exprs)
-+ result)
-+)
-+
-+;; Process list of keyword/value specified arguments.
-+
-+(define (/pmacro-process-keyworded-args arg-spec default-values args)
-+ ;; Build a list of default values, then override ones specified in ARGS,
-+ (let ((result-alist (alist-copy default-values)))
-+ (let loop ((args args))
-+ (cond ((null? args)
-+ #f) ;; done
-+ ((and (pair? args) (keyword? (car args)))
-+ (let ((elm (assq (car args) result-alist)))
-+ (if (not elm)
-+ (/pmacro-error "not an argument name" (car args)))
-+ (if (null? (cdr args))
-+ (/pmacro-error "missing argument to #:keyword" (car args)))
-+ (set-cdr! elm (cadr args))
-+ (loop (cddr args))))
-+ (else
-+ (/pmacro-error "bad keyword/value argument list" args))))
-+
-+ ;; Ensure each element has a value.
-+ (let loop ((to-scan result-alist))
-+ (if (null? to-scan)
-+ #f ;; done
-+ (begin
-+ (if (not (cdar to-scan))
-+ (/pmacro-error "argument value not specified" (caar to-scan)))
-+ (loop (cdr to-scan)))))
-+
-+ ;; If varargs pmacro, adjust result.
-+ (if (list? arg-spec)
-+ (map cdr result-alist) ;; not varargs
-+ (let ((nr-args (length (result-alist))))
-+ (append! (map cdr (list-head result-alist (- nr-args 1)))
-+ (cdr (list-tail result-alist (- nr-args 1)))))))
-+)
-+
-+;; Process a pmacro argument list.
-+;; ARGS is either a fully specified position dependent argument list,
-+;; or is a list of keyword/value pairs with missing values coming from
-+;; DEFAULT-VALUES.
-+
-+(define (/pmacro-process-args-1 arg-spec default-values args)
-+ (if (and (pair? args) (keyword? (car args)))
-+ (/pmacro-process-keyworded-args arg-spec default-values args)
-+ args)
-+)
-+
-+;; Subroutine of /pmacro-apply,/smacro-apply to simplify them.
-+;; Process the arguments, verify the correct number is present.
-+
-+(define (/pmacro-process-args macro args)
-+ (let ((arg-spec (/pmacro-arg-spec macro))
-+ (default-values (/pmacro-default-values macro)))
-+ (let ((processed-args (/pmacro-process-args-1 arg-spec default-values args)))
-+ (if (not (num-args-ok? (length processed-args) arg-spec))
-+ (/pmacro-error (string-append
-+ "wrong number of arguments to pmacro "
-+ (with-output-to-string
-+ (lambda ()
-+ (write (cons (/pmacro-name macro)
-+ (/pmacro-arg-spec macro))))))
-+ args))
-+ processed-args))
-+)
-+
-+;; Invoke a pmacro.
-+
-+(define (/pmacro-apply macro args)
-+ (apply (/pmacro-transformer macro)
-+ (/pmacro-process-args macro args))
-+)
-+
-+;; Invoke a syntactic-form pmacro.
-+;; ENV, LOC are handed down from /pmacro-expand.
-+
-+(define (/smacro-apply macro args env loc)
-+ (apply (/pmacro-transformer macro)
-+ (cons loc (cons env (/pmacro-process-args macro args))))
-+)
-+
-+;; Expand expression EXP using ENV, an alist of variable assignments.
-+;; LOC is the location stack thus far.
-+
-+(define (/pmacro-expand exp env loc)
-+
-+ (define cep (current-error-port))
-+
-+ ;; If the symbol is in `env', return its value.
-+ ;; Otherwise see if symbol is a globally defined pmacro.
-+ ;; Otherwise return the symbol unchanged.
-+
-+ (define (scan-symbol sym)
-+ (let ((val (/pmacro-env-ref env sym)))
-+ (if val
-+ (cdr val) ;; cdr is value of (name . value) pair
-+ (let ((val (/pmacro-lookup sym)))
-+ (if val
-+ ;; Symbol is a pmacro.
-+ ;; If this is a procedural pmacro, let caller perform expansion.
-+ ;; Otherwise, return the pmacro's value.
-+ (if (procedure? (/pmacro-transformer val))
-+ val
-+ (/pmacro-transformer val))
-+ ;; Return symbol unchanged.
-+ sym)))))
-+
-+ ;; See if (car exp) is a pmacro.
-+ ;; Return pmacro or #f.
-+
-+ (define (check-pmacro exp)
-+ (if /pmacro-debug?
-+ (begin
-+ (display "Checking for pmacro: " cep)
-+ (write exp cep)
-+ (newline cep)))
-+ (and (/pmacro? (car exp)) (car exp)))
-+
-+ ;; Subroutine of scan-list to simplify it.
-+ ;; Macro expand EXP which is known to be a non-null list.
-+ ;; LOC is the location stack thus far.
-+
-+ (define (scan-list1 exp loc)
-+ ;; Check for syntactic forms.
-+ ;; They are handled differently in that we leave it to the transformer
-+ ;; routine to evaluate the arguments.
-+ ;; Note that we also don't support passing syntactic form functions
-+ ;; as arguments: We look up (car exp) here, not its expansion.
-+ (let ((sform (/smacro-lookup (car exp))))
-+ (if sform
-+ (begin
-+ ;; ??? Is it useful to trace these?
-+ (/smacro-apply sform (cdr exp) env loc))
-+ ;; Not a syntactic form.
-+ ;; See if we have a pmacro. Do this before evaluating all the
-+ ;; arguments (even though we will eventually evaluate all the
-+ ;; arguments before invoking the pmacro) so that tracing is more
-+ ;; legible (we print the expression we're about to evaluate *before*
-+ ;; we evaluate its arguments).
-+ (let ((scanned-car (scan (car exp) loc)))
-+ (if (/pmacro? scanned-car)
-+ (begin
-+ ;; Trace expansion here, we know we have a pmacro.
-+ (if /pmacro-trace?
-+ (let ((src-props (source-properties exp))
-+ (indent (spaces (* 2 (length (location-list loc))))))
-+ ;; We use `write' to display `exp' to see strings quoted.
-+ (display indent cep)
-+ (display "Expanding: " cep)
-+ (write exp cep)
-+ (newline cep)
-+ (display indent cep)
-+ (display " env: " cep)
-+ (write env cep)
-+ (newline cep)
-+ (if (not (null? src-props))
-+ (begin
-+ (display indent cep)
-+ (display " location: " cep)
-+ (display (source-properties-location->string src-props) cep)
-+ (newline cep)))))
-+ ;; Evaluate all the arguments before invoking the pmacro.
-+ (let* ((scanned-args (map (lambda (e) (scan e loc))
-+ (cdr exp)))
-+ (result (if (procedure? (/pmacro-transformer scanned-car))
-+ (/pmacro-apply scanned-car scanned-args)
-+ (cons (/pmacro-transformer scanned-car) scanned-args))))
-+ (if /pmacro-trace?
-+ (let ((indent (spaces (* 2 (length (location-list loc))))))
-+ (display indent cep)
-+ (display " result: " cep)
-+ (write result cep)
-+ (newline cep)))
-+ result))
-+ ;; Not a pmacro.
-+ (cons scanned-car (map (lambda (e) (scan e loc))
-+ (cdr exp))))))))
-+
-+ ;; Macro expand EXP which is known to be a non-null list.
-+ ;; LOC is the location stack thus far.
-+ ;;
-+ ;; This uses scan-list1 to do the real work, this handles location tracking.
-+
-+ (define (scan-list exp loc)
-+ (let ((src-props (source-properties exp))
-+ (new-loc loc))
-+ (if (not (null? src-props))
-+ (let ((file (assq-ref src-props 'filename))
-+ (line (assq-ref src-props 'line))
-+ (column (assq-ref src-props 'column)))
-+ (set! new-loc (location-push-single loc file line column #f))))
-+ (let ((result (scan-list1 exp new-loc)))
-+ (if (pair? result) ;; pair? -> cheap non-null-list?
-+ (begin
-+ ;; Copy source location to new expression.
-+ (if (null? (source-properties result))
-+ (set-source-properties! result src-props))
-+ (let ((loc-prop (location-property result)))
-+ (if loc-prop
-+ (location-property-set! result (location-push new-loc loc-prop))
-+ (location-property-set! result new-loc)))))
-+ result)))
-+
-+ ;; Scan EXP, an arbitrary value.
-+ ;; LOC is the location stack thus far.
-+
-+ (define (scan exp loc)
-+ (let ((result (cond ((symbol? exp)
-+ (scan-symbol exp))
-+ ((pair? exp) ;; pair? -> cheap non-null-list?
-+ (scan-list exp loc))
-+ ;; Not a symbol or expression, return unchanged.
-+ (else
-+ exp))))
-+ ;; Re-examining `result' to see if it is another pmacro invocation
-+ ;; allows doing things like ((%sym a b c) arg1 arg2)
-+ ;; where `abc' is a pmacro. Scheme doesn't work this way, but then
-+ ;; this is CGEN.
-+ (if (symbol? result) (scan-symbol result) result)))
-+
-+ (scan exp loc)
-+)
-+
-+;; Return the argument spec from ARGS.
-+;; ARGS is a [possibly improper] list of `symbol' or `(symbol default-value)'
-+;; elements. For varargs pmacros, ARGS must be an improper list
-+;; (e.g. (a b . c)) with the last element being a symbol.
-+
-+(define (/pmacro-get-arg-spec args)
-+ (let ((parse-arg
-+ (lambda (arg)
-+ (cond ((symbol? arg)
-+ arg)
-+ ((and (pair? arg) (symbol? (car arg)))
-+ (car arg))
-+ (else
-+ (/pmacro-error "argument not `symbol' or `(symbol . default-value)'"
-+ arg))))))
-+ (if (list? args)
-+ (map parse-arg args)
-+ (letrec ((parse-improper-list
-+ (lambda (args)
-+ (cond ((symbol? args)
-+ args)
-+ ((pair? args)
-+ (cons (parse-arg (car args))
-+ (parse-improper-list (cdr args))))
-+ (else
-+ (/pmacro-error "argument not `symbol' or `(symbol . default-value)'"
-+ args))))))
-+ (parse-improper-list args))))
-+)
-+
-+;; Return the default values specified in ARGS.
-+;; The result is an alist of (#:arg-name . default-value) elements.
-+;; ARGS is a [possibly improper] list of `symbol' or `(symbol . default-value)'
-+;; elements. For varargs pmacros, ARGS must be an improper list
-+;; (e.g. (a b . c)) with the last element being a symbol.
-+;; Unspecified default values are recorded as #f.
-+
-+(define (/pmacro-get-default-values args)
-+ (let ((parse-arg
-+ (lambda (arg)
-+ (cond ((symbol? arg)
-+ (cons (symbol->keyword arg) #f))
-+ ((and (pair? arg) (symbol? (car arg)))
-+ (cons (symbol->keyword (car arg)) (cdr arg)))
-+ (else
-+ (/pmacro-error "argument not `symbol' or `(symbol . default-value)'"
-+ arg))))))
-+ (if (list? args)
-+ (map parse-arg args)
-+ (letrec ((parse-improper-list
-+ (lambda (args)
-+ (cond ((symbol? args)
-+ (cons (parse-arg args) nil))
-+ ((pair? args)
-+ (cons (parse-arg (car args))
-+ (parse-improper-list (cdr args))))
-+ (else
-+ (/pmacro-error "argument not `symbol' or `(symbol . default-value)'"
-+ args))))))
-+ (parse-improper-list args))))
-+)
-+
-+;; Build a procedure that performs a pmacro expansion.
-+
-+;; Earlier version, doesn't work with LOC as a <location> object,
-+;; COS objects don't pass through eval1.
-+;(define (/pmacro-build-lambda prev-env params expansion)
-+;; (eval1 `(lambda ,params
-+;; (/pmacro-expand ',expansion
-+;; (/pmacro-env-make ',prev-env
-+;; ',params (list ,@params))))
-+;;)
-+
-+(define (/pmacro-build-lambda loc prev-env params expansion)
-+ (lambda args
-+ (/pmacro-expand expansion
-+ (/pmacro-env-make loc prev-env params args)
-+ loc))
-+)
-+
-+;; While using `define-macro' seems preferable, boot-9.scm uses it and
-+;; I'd rather not risk a collision. I could of course make the association
-+;; during parsing, maybe later.
-+;; On the other hand, calling them pmacros removes all ambiguity.
-+;; In the end the ambiguity removal is the deciding win.
-+;;
-+;; The syntax is one of:
-+;; (define-pmacro symbol expansion)
-+;; (define-pmacro symbol ["comment"] expansion)
-+;; (define-pmacro (name args ...) expansion)
-+;; (define-pmacro (name args ...) "documentation" expansion)
-+;;
-+;; If `expansion' is the name of a pmacro, its value is used (rather than its
-+;; name).
-+;; ??? The goal here is to follow Scheme's define/lambda, but not all variants
-+;; are supported yet. There's also the difference that we treat undefined
-+;; symbols as being themselves (i.e. "self quoting" so-to-speak).
-+;;
-+;; ??? We may want user-definable "syntactic" pmacros some day. Later.
-+
-+(define (define-pmacro header arg1 . arg-rest)
-+ (if (and (not (symbol? header))
-+ (not (list? header)))
-+ (/pmacro-error "invalid pmacro header" header))
-+ (let ((name (if (symbol? header) header (car header)))
-+ (arg-spec (if (symbol? header) #f (/pmacro-get-arg-spec (cdr header))))
-+ (default-values (if (symbol? header) #f (/pmacro-get-default-values (cdr header))))
-+ (comment (if (null? arg-rest) "" arg1))
-+ (expansion (if (null? arg-rest) arg1 (car arg-rest))))
-+ ;;(if (> (length arg-rest) 1)
-+ ;;(/pmacro-error "extraneous arguments to define-pmacro" (cdr arg-rest)))
-+ ;;(if (not (string? comment))
-+ ;;(/pmacro-error "invalid pmacro comment, expected string" comment))
-+ (if (symbol? header)
-+ (if (symbol? expansion)
-+ (let ((maybe-pmacro (/pmacro-lookup expansion)))
-+ (if maybe-pmacro
-+ (/pmacro-set! name
-+ (/pmacro-make name
-+ (/pmacro-arg-spec maybe-pmacro)
-+ (/pmacro-default-values maybe-pmacro)
-+ #f ;; syntactic-form?
-+ (/pmacro-transformer maybe-pmacro)
-+ comment))
-+ (/pmacro-set! name (/pmacro-make name #f #f #f expansion comment))))
-+ (/pmacro-set! name (/pmacro-make name #f #f #f expansion comment)))
-+ (/pmacro-set! name
-+ (/pmacro-make name arg-spec default-values #f
-+ (/pmacro-build-lambda (current-reader-location)
-+ nil
-+ arg-spec
-+ expansion)
-+ comment))))
-+ *UNSPECIFIED*
-+)
-+
-+;; Expand any pmacros in EXPR.
-+;; LOC is the <location> of EXPR.
-+
-+(define (pmacro-expand expr loc)
-+ (/pmacro-expand expr '() loc)
-+)
-+
-+;; Debugging routine to trace pmacro expansion.
-+
-+(define (pmacro-trace expr loc)
-+ ;; FIXME: Need unwind protection.
-+ (let ((old-trace /pmacro-trace?)
-+ (src-props (and (pair? expr) (source-properties expr)))
-+ (cep (current-error-port)))
-+ (set! /pmacro-trace? #t)
-+ ;; We use `write' to display `expr' to see strings quoted.
-+ (display "Pmacro expanding: " cep) (write expr cep) (newline cep)
-+ ;;(display "Top level env: " cep) (display nil cep) (newline cep)
-+ (display "Pmacro location: " cep)
-+ (if (and src-props (not (null? src-props)))
-+ (display (source-properties-location->string src-props) cep)
-+ (display (single-location->string (location-top loc)) cep))
-+ (newline cep)
-+ (let ((result (/pmacro-expand expr '() loc)))
-+ (display "Pmacro result: " cep) (write result cep) (newline cep)
-+ (set! /pmacro-trace? old-trace)
-+ result))
-+)
-+
-+;; Debugging utility to expand a pmacro, with no initial source location.
-+
-+(define (pmacro-dump expr)
-+ (/pmacro-expand expr '() (unspecified-location))
-+)
-+
-+;; Expand any pmacros in EXPR, printing various debugging messages.
-+;; This does not process %exec.
-+
-+(define (pmacro-debug expr)
-+ ;; FIXME: Need unwind protection.
-+ (let ((old-debug /pmacro-debug?))
-+ (set! /pmacro-debug? #t)
-+ (let ((result (pmacro-trace expr (unspecified-location))))
-+ (set! /pmacro-debug? old-debug)
-+ result))
-+)
-+
-+;; Builtin pmacros.
-+
-+;; (%sym symbol1 symbol2 ...) - symbol-append, auto-convert numbers
-+
-+(define /pmacro-builtin-sym
-+ (lambda args
-+ (string->symbol
-+ (apply string-append
-+ (map (lambda (elm)
-+ (cond ((number? elm) (number->string elm))
-+ ((symbol? elm) (symbol->string elm))
-+ ((string? elm) elm)
-+ (else
-+ (/pmacro-error "invalid argument to %sym" elm))))
-+ args))))
-+)
-+
-+;; (%str string1 string2 ...) - string-append, auto-convert numbers
-+
-+(define /pmacro-builtin-str
-+ (lambda args
-+ (apply string-append
-+ (map (lambda (elm)
-+ (cond ((number? elm) (number->string elm))
-+ ((symbol? elm) (symbol->string elm))
-+ ((string? elm) elm)
-+ (else
-+ (/pmacro-error "invalid argument to %str" elm))))
-+ args)))
-+)
-+
-+;; (%hex number [width]) - convert number to hex string
-+;; WIDTH, if present, is the number of characters in the result, beginning
-+;; from the least significant digit.
-+
-+(define (/pmacro-builtin-hex num . width)
-+ (if (> (length width) 1)
-+ (/pmacro-error "wrong number of arguments to %hex"
-+ (cons '%hex (cons num width))))
-+ (let ((str (number->string num 16)))
-+ (if (null? width)
-+ str
-+ (let ((len (string-length str)))
-+ (substring (string-append (make-string (car width) #\0) str)
-+ len (+ len (car width))))))
-+)
-+
-+;; (%upcase string) - convert a string or symbol to uppercase
-+
-+(define (/pmacro-builtin-upcase str)
-+ (cond
-+ ((string? str) (string-upcase str))
-+ ((symbol? str) (string->symbol (string-upcase (symbol->string str))))
-+ (else (/pmacro-error "invalid argument to %upcase" str)))
-+)
-+
-+;; (%downcase string) - convert a string or symbol to lowercase
-+
-+(define (/pmacro-builtin-downcase str)
-+ (cond
-+ ((string? str) (string-downcase str))
-+ ((symbol? str) (string->symbol (string-downcase (symbol->string str))))
-+ (else (/pmacro-error "invalid argument to %downcase" str)))
-+)
-+
-+;; (%substring string start end) - get part of a string
-+;; `end' can be the symbol `end'.
-+
-+(define (/pmacro-builtin-substring str start end)
-+ (if (not (integer? start)) ;; FIXME: non-negative-integer
-+ (/pmacro-error "start not an integer" start))
-+ (if (and (not (integer? end))
-+ (not (eq? end 'end)))
-+ (/pmacro-error "end not an integer nor symbol `end'" end))
-+ (cond ((string? str)
-+ (if (eq? end 'end)
-+ (substring str start)
-+ (substring str start end)))
-+ ((symbol? str)
-+ (if (eq? end 'end)
-+ (string->symbol (substring (symbol->string str) start))
-+ (string->symbol (substring (symbol->string str) start end))))
-+ (else
-+ (/pmacro-error "invalid argument to %substring" str)))
-+)
-+
-+;; %splice - splicing support
-+;; Splice lists into the outer list.
-+;;
-+;; E.g. (define-pmacro '(splice-test a b c) '(%splice a (%unsplice b) c))
-+;; (pmacro-expand '(splice-test (1 (2) 3))) --> (1 2 3)
-+;;
-+;; Similar to `(1 ,@'(2) 3) in Scheme, though the terminology is slightly
-+;; different (??? may need to revisit). In Scheme there's quasi-quote,
-+;; unquote, unquote-splicing. Here we have splice, unsplice; with the proviso
-+;; that pmacros don't have the concept of "quoting", thus all subexpressions
-+;; are macro-expanded first, before performing any unsplicing.
-+;; [??? Some may want a quoting facility, but I'd like to defer adding it as
-+;; long as possible (and ideally never add it).]
-+;;
-+;; NOTE: The implementation relies on %unsplice being undefined so that
-+;; (%unsplice (42)) is expanded unchanged.
-+
-+(define /pmacro-builtin-splice
-+ (lambda arg-list
-+ ;; ??? Not the most efficient implementation.
-+ (let* ((unsplice-str (if (rtl-version-at-least? 0 9) "%unsplice" ".unsplice"))
-+ (unsplice-sym (string->symbol unsplice-str)))
-+ (let loop ((arg-list arg-list) (result '()))
-+ (cond ((null? arg-list) result)
-+ ((and (pair? (car arg-list)) (eq? unsplice-sym (caar arg-list)))
-+ (if (= (length (car arg-list)) 2)
-+ (if (list? (cadar arg-list))
-+ (loop (cdr arg-list) (append result (cadar arg-list)))
-+ (/pmacro-error (string-append "argument to " unsplice-str " must be a list")
-+ (car arg-list)))
-+ (/pmacro-error (string-append "wrong number of arguments to " unsplice-str)
-+ (car arg-list))))
-+ (else
-+ (loop (cdr arg-list) (append result (list (car arg-list)))))))))
-+)
-+
-+;; %iota
-+;; Usage:
-+;; (%iota count) ;; start=0, incr=1
-+;; (%iota count start) ;; incr=1
-+;; (%iota count start incr)
-+
-+(define (/pmacro-builtin-iota count . start-incr)
-+ (if (> (length start-incr) 2)
-+ (/pmacro-error "wrong number of arguments to %iota"
-+ (cons '%iota (cons count start-incr))))
-+ (if (< count 0)
-+ (/pmacro-error "count must be non-negative"
-+ (cons '%iota (cons count start-incr))))
-+ (let ((start (if (pair? start-incr) (car start-incr) 0))
-+ (incr (if (= (length start-incr) 2) (cadr start-incr) 1)))
-+ (let loop ((i start) (count count) (result '()))
-+ (if (= count 0)
-+ (reverse! result)
-+ (loop (+ i incr) (- count 1) (cons i result)))))
-+)
-+
-+;; (%map pmacro arg1 . arg-rest)
-+
-+(define (/pmacro-builtin-map pmacro arg1 . arg-rest)
-+ (if (not (/pmacro? pmacro))
-+ (/pmacro-error "not a pmacro" pmacro))
-+ (let ((transformer (/pmacro-transformer pmacro)))
-+ (if (not (procedure? transformer))
-+ (/pmacro-error "not a procedural pmacro" pmacro))
-+ (apply map (cons transformer (cons arg1 arg-rest))))
-+)
-+
-+;; (%for-each pmacro arg1 . arg-rest)
-+
-+(define (/pmacro-builtin-for-each pmacro arg1 . arg-rest)
-+ (if (not (/pmacro? pmacro))
-+ (/pmacro-error "not a pmacro" pmacro))
-+ (let ((transformer (/pmacro-transformer pmacro)))
-+ (if (not (procedure? transformer))
-+ (/pmacro-error "not a procedural pmacro" pmacro))
-+ (apply for-each (cons transformer (cons arg1 arg-rest)))
-+ nil) ;; need to return something the reader will accept and ignore
-+)
-+
-+;; (%eval expr)
-+;; NOTE: This is implemented as a syntactic form in order to get ENV and LOC.
-+;; That's an implementation detail, and this is not really a syntactic form.
-+;;
-+;; ??? I debated whether to call this %expand, %eval has been a source of
-+;; confusion/headaches.
-+
-+(define (/pmacro-builtin-eval loc env expr)
-+ ;; /pmacro-expand is invoked twice because we're implemented as a syntactic
-+ ;; form: We *want* to be passed an evaluated expression, and then we
-+ ;; re-evaluate it. But syntactic forms pass parameters unevaluated, so we
-+ ;; have to do the first one ourselves.
-+ (/pmacro-expand (/pmacro-expand expr env loc) env loc)
-+)
-+
-+;; (%exec expr)
-+
-+(define (/pmacro-builtin-exec expr)
-+ ;; If we're expanding pmacros for debugging purposes, don't execute,
-+ ;; just return unchanged.
-+ (if /pmacro-debug?
-+ (list '%exec expr)
-+ (begin
-+ (reader-process-expanded! expr)
-+ nil)) ;; need to return something the reader will accept and ignore
-+)
-+
-+;; (%apply pmacro-name arg)
-+
-+(define (/pmacro-builtin-apply pmacro arg-list)
-+ (if (not (/pmacro? pmacro))
-+ (/pmacro-error "not a pmacro" pmacro))
-+ (let ((transformer (/pmacro-transformer pmacro)))
-+ (if (not (procedure? transformer))
-+ (/pmacro-error "not a procedural pmacro" pmacro))
-+ (apply transformer arg-list))
-+)
-+
-+;; (%pmacro (arg-list) expansion)
-+;; NOTE: syntactic form
-+
-+(define (/pmacro-builtin-pmacro loc env params expansion)
-+ ;; ??? Prohibiting improper lists seems unnecessarily restrictive here.
-+ ;; e.g. (define (foo bar . baz) ...)
-+ (if (not (list? params))
-+ (/pmacro-error "%pmacro parameter-spec is not a list" params))
-+ (/pmacro-make '%anonymous params #f #f
-+ (/pmacro-build-lambda loc env params expansion) "")
-+)
-+
-+;; (%pmacro? arg)
-+
-+(define (/pmacro-builtin-pmacro? arg)
-+ (/pmacro? arg)
-+)
-+
-+;; (%let (var-list) expr1 . expr-rest)
-+;; NOTE: syntactic form
-+
-+(define (/pmacro-builtin-let loc env locals expr1 . expr-rest)
-+ (if (not (list? locals))
-+ (/pmacro-error "locals is not a list" locals))
-+ (if (not (all-true? (map (lambda (l)
-+ (and (list? l)
-+ (= (length l) 2)
-+ (symbol? (car l))))
-+ locals)))
-+ (/pmacro-error "syntax error in locals list" locals))
-+ (let* ((evald-locals (map (lambda (l)
-+ (cons (car l) (/pmacro-expand (cadr l) env loc)))
-+ locals))
-+ (new-env (append! evald-locals env)))
-+ (/pmacro-expand-expr-list (cons expr1 expr-rest) new-env loc))
-+)
-+
-+;; (%let* (var-list) expr1 . expr-rest)
-+;; NOTE: syntactic form
-+
-+(define (/pmacro-builtin-let* loc env locals expr1 . expr-rest)
-+ (if (not (list? locals))
-+ (/pmacro-error "locals is not a list" locals))
-+ (if (not (all-true? (map (lambda (l)
-+ (and (list? l)
-+ (= (length l) 2)
-+ (symbol? (car l))))
-+ locals)))
-+ (/pmacro-error "syntax error in locals list" locals))
-+ (let loop ((locals locals) (new-env env))
-+ (if (null? locals)
-+ (/pmacro-expand-expr-list (cons expr1 expr-rest) new-env loc)
-+ (loop (cdr locals) (acons (caar locals)
-+ (/pmacro-expand (cadar locals) new-env loc)
-+ new-env))))
-+)
-+
-+;; (%if expr then [else])
-+;; NOTE: syntactic form
-+
-+(define (/pmacro-builtin-if loc env expr then-clause . else-clause)
-+ (case (length else-clause)
-+ ((0) (if (/pmacro-expand expr env loc)
-+ (/pmacro-expand then-clause env loc)
-+ nil))
-+ ((1) (if (/pmacro-expand expr env loc)
-+ (/pmacro-expand then-clause env loc)
-+ (/pmacro-expand (car else-clause) env loc)))
-+ (else (/pmacro-error "too many elements in else-clause, expecting 0 or 1" else-clause)))
-+)
-+
-+;; (%case expr ((case-list1) stmt) [case-expr-stmt-list] [(else stmt)])
-+;; NOTE: syntactic form
-+;; NOTE: this uses "member" for case comparison (Scheme uses memq I think)
-+
-+(define (/pmacro-builtin-case loc env expr case1 . rest)
-+ (let ((evald-expr (/pmacro-expand expr env loc)))
-+ (let loop ((cases (cons case1 rest)))
-+ (if (null? cases)
-+ nil
-+ (begin
-+ (if (not (list? (car cases)))
-+ (/pmacro-error "case statement not a list" (car cases)))
-+ (if (= (length (car cases)) 1)
-+ (/pmacro-error "case statement has case but no expr" (car cases)))
-+ (if (and (not (eq? (caar cases) 'else))
-+ (not (list? (caar cases))))
-+ (/pmacro-error "case must be \"else\" or list of choices" (caar cases)))
-+ (cond ((eq? (caar cases) 'else)
-+ (/pmacro-expand-expr-list (cdar cases) env loc))
-+ ((member evald-expr (caar cases))
-+ (/pmacro-expand-expr-list (cdar cases) env loc))
-+ (else
-+ (loop (cdr cases))))))))
-+)
-+
-+;; (%cond (expr stmt) [(cond-expr-stmt-list)] [(else stmt)])
-+;; NOTE: syntactic form
-+
-+(define (/pmacro-builtin-cond loc env expr1 . rest)
-+ (let loop ((exprs (cons expr1 rest)))
-+ (cond ((null? exprs)
-+ nil)
-+ ((eq? (car exprs) 'else)
-+ (/pmacro-expand-expr-list (cdar exprs) env loc))
-+ (else
-+ (let ((evald-expr (/pmacro-expand (caar exprs) env loc)))
-+ (if evald-expr
-+ (/pmacro-expand-expr-list (cdar exprs) env loc)
-+ (loop (cdr exprs)))))))
-+)
-+
-+;; (%begin . stmt-list)
-+;; NOTE: syntactic form
-+
-+(define (/pmacro-builtin-begin loc env . rest)
-+ (/pmacro-expand-expr-list rest env loc)
-+)
-+
-+;; (%print . expr)
-+;; Strings have quotes removed.
-+
-+(define (/pmacro-builtin-print . exprs)
-+ (apply message exprs)
-+ nil ;; need to return something the reader will accept and ignore
-+)
-+
-+;; (%dump expr)
-+;; Strings do not have quotes removed.
-+
-+(define (/pmacro-builtin-dump expr)
-+ (write expr (current-error-port))
-+ nil ;; need to return something the reader will accept and ignore
-+)
-+
-+;; (%error . expr)
-+
-+(define (/pmacro-builtin-error . exprs)
-+ (apply error exprs)
-+)
-+
-+;; (%list expr1 ...)
-+
-+(define (/pmacro-builtin-list . exprs)
-+ exprs
-+)
-+
-+;; (%ref expr index)
-+
-+(define (/pmacro-builtin-ref l n)
-+ (if (not (list? l))
-+ (/pmacro-error "invalid arg for %ref, expected list" l))
-+ (if (not (integer? n)) ;; FIXME: call non-negative-integer?
-+ (/pmacro-error "invalid arg for %ref, expected non-negative integer" n))
-+ (list-ref l n)
-+)
-+
-+;; (%length x)
-+
-+(define (/pmacro-builtin-length x)
-+ (cond ((symbol? x) (string-length (symbol->string x)))
-+ ((string? x) (string-length x))
-+ ((list? x) (length x))
-+ (else
-+ (/pmacro-error "invalid arg for %length, expected symbol, string, or list" x)))
-+)
-+
-+;; (%replicate n expr)
-+
-+(define (/pmacro-builtin-replicate n expr)
-+ (if (not (integer? n)) ;; FIXME: call non-negative-integer?
-+ (/pmacro-error "invalid arg for %replicate, expected non-negative integer" n))
-+ (make-list n expr)
-+)
-+
-+;; (%find pred l)
-+
-+(define (/pmacro-builtin-find pred l)
-+ (if (not (/pmacro? pred))
-+ (/pmacro-error "not a pmacro" pred))
-+ (if (not (list? l))
-+ (/pmacro-error "not a list" l))
-+ (let ((transformer (/pmacro-transformer pred)))
-+ (if (not (procedure? transformer))
-+ (/pmacro-error "not a procedural macro" pred))
-+ (find transformer l))
-+)
-+
-+;; (%equal? x y)
-+
-+(define (/pmacro-builtin-equal? x y)
-+ (equal? x y)
-+)
-+
-+;; (%andif . rest)
-+;; NOTE: syntactic form
-+;; Elements of EXPRS are evaluated one at a time.
-+;; Unprocessed elements are not evaluated.
-+
-+(define (/pmacro-builtin-andif loc env . exprs)
-+ (if (null? exprs)
-+ #t
-+ (let loop ((exprs exprs))
-+ (let ((evald-expr (/pmacro-expand (car exprs) env loc)))
-+ (cond ((null? (cdr exprs)) evald-expr)
-+ (evald-expr (loop (cdr exprs)))
-+ (else #f)))))
-+)
-+
-+;; (%orif . rest)
-+;; NOTE: syntactic form
-+;; Elements of EXPRS are evaluated one at a time.
-+;; Unprocessed elements are not evaluated.
-+
-+(define (/pmacro-builtin-orif loc env . exprs)
-+ (let loop ((exprs exprs))
-+ (if (null? exprs)
-+ #f
-+ (let ((evald-expr (/pmacro-expand (car exprs) env loc)))
-+ (if evald-expr
-+ evald-expr
-+ (loop (cdr exprs))))))
-+)
-+
-+;; (%not expr)
-+
-+(define (/pmacro-builtin-not x)
-+ (not x)
-+)
-+
-+;; Verify x,y are compatible for eq/ne comparisons.
-+
-+(define (/pmacro-compatible-for-equality x y)
-+ (or (and (symbol? x) (symbol? y))
-+ (and (string? x) (string? y))
-+ (and (number? x) (number? y)))
-+)
-+
-+;; (%eq expr)
-+
-+(define (/pmacro-builtin-eq x y)
-+ (cond ((symbol? x)
-+ (if (symbol? y)
-+ (eq? x y)
-+ (/pmacro-error "incompatible args for %eq, expected symbol" y)))
-+ ((string? x)
-+ (if (string? y)
-+ (string=? x y)
-+ (/pmacro-error "incompatible args for %eq, expected string" y)))
-+ ((number? x)
-+ (if (number? y)
-+ (= x y)
-+ (/pmacro-error "incompatible args for %eq, expected number" y)))
-+ (else
-+ (/pmacro-error "unsupported args for %eq" (list x y))))
-+)
-+
-+;; (%ne expr)
-+
-+(define (/pmacro-builtin-ne x y)
-+ (cond ((symbol? x)
-+ (if (symbol? y)
-+ (not (eq? x y))
-+ (/pmacro-error "incompatible args for %ne, expected symbol" y)))
-+ ((string? x)
-+ (if (string? y)
-+ (not (string=? x y))
-+ (/pmacro-error "incompatible args for %ne, expected string" y)))
-+ ((number? x)
-+ (if (number? y)
-+ (not (= x y))
-+ (/pmacro-error "incompatible args for %ne, expected number" y)))
-+ (else
-+ (/pmacro-error "unsupported args for %ne" (list x y))))
-+)
-+
-+;; (%lt expr)
-+
-+(define (/pmacro-builtin-lt x y)
-+ (/pmacro-verify-number "%lt" x)
-+ (/pmacro-verify-number "%lt" y)
-+ (< x y)
-+)
-+
-+;; (%gt expr)
-+
-+(define (/pmacro-builtin-gt x y)
-+ (/pmacro-verify-number "%gt" x)
-+ (/pmacro-verify-number "%gt" y)
-+ (> x y)
-+)
-+
-+;; (%le expr)
-+
-+(define (/pmacro-builtin-le x y)
-+ (/pmacro-verify-number "%le" x)
-+ (/pmacro-verify-number "%le" y)
-+ (<= x y)
-+)
-+
-+;; (%ge expr)
-+
-+(define (/pmacro-builtin-ge x y)
-+ (/pmacro-verify-number "%ge" x)
-+ (/pmacro-verify-number "%ge" y)
-+ (>= x y)
-+)
-+
-+;; (%add x y)
-+
-+(define (/pmacro-builtin-add x y)
-+ (/pmacro-verify-number "%add" x)
-+ (/pmacro-verify-number "%add" y)
-+ (+ x y)
-+)
-+
-+;; (%sub x y)
-+
-+(define (/pmacro-builtin-sub x y)
-+ (/pmacro-verify-number "%sub" x)
-+ (/pmacro-verify-number "%sub" y)
-+ (- x y)
-+)
-+
-+;; (%mul x y)
-+
-+(define (/pmacro-builtin-mul x y)
-+ (/pmacro-verify-number "%mul" x)
-+ (/pmacro-verify-number "%mul" y)
-+ (* x y)
-+)
-+
-+;; (%div x y) - integer division
-+
-+(define (/pmacro-builtin-div x y)
-+ (/pmacro-verify-integer "%div" x)
-+ (/pmacro-verify-integer "%div" y)
-+ (quotient x y)
-+)
-+
-+;; (%rem x y) - integer remainder
-+;; ??? Need to decide behavior.
-+
-+(define (/pmacro-builtin-rem x y)
-+ (/pmacro-verify-integer "%rem" x)
-+ (/pmacro-verify-integer "%rem" y)
-+ (remainder x y)
-+)
-+
-+;; (%sll x n) - shift left logical
-+
-+(define (/pmacro-builtin-sll x n)
-+ (/pmacro-verify-integer "%sll" x)
-+ (/pmacro-verify-non-negative-integer "%sll" n)
-+ (ash x n)
-+)
-+
-+;; (%srl x n) - shift right logical
-+;; X must be non-negative, otherwise behavior is undefined.
-+;; [Unless we introduce a size argument: How do you logical shift right
-+;; an arbitrary precision negative number?]
-+
-+(define (/pmacro-builtin-srl x n)
-+ (/pmacro-verify-non-negative-integer "%srl" x)
-+ (/pmacro-verify-non-negative-integer "%srl" n)
-+ (ash x (- n))
-+)
-+
-+;; (%sra x n) - shift right arithmetic
-+
-+(define (/pmacro-builtin-sra x n)
-+ (/pmacro-verify-integer "%sra" x)
-+ (/pmacro-verify-non-negative-integer "%sra" n)
-+ (ash x (- n))
-+)
-+
-+;; (%and x y) - bitwise and
-+
-+(define (/pmacro-builtin-and x y)
-+ (/pmacro-verify-integer "%and" x)
-+ (/pmacro-verify-integer "%and" y)
-+ (logand x y)
-+)
-+
-+;; (%or x y) - bitwise or
-+
-+(define (/pmacro-builtin-or x y)
-+ (/pmacro-verify-integer "%or" x)
-+ (/pmacro-verify-integer "%or" y)
-+ (logior x y)
-+)
-+
-+;; (%xor x y) - bitwise xor
-+
-+(define (/pmacro-builtin-xor x y)
-+ (/pmacro-verify-integer "%xor" x)
-+ (/pmacro-verify-integer "%xor" y)
-+ (logxor x y)
-+)
-+
-+;; (%inv x) - bitwise invert
-+
-+(define (/pmacro-builtin-inv x)
-+ (/pmacro-verify-integer "%inv" x)
-+ (lognot x)
-+)
-+
-+;; (%car expr)
-+
-+(define (/pmacro-builtin-car l)
-+ (if (pair? l)
-+ (car l)
-+ (/pmacro-error "invalid arg for %car, expected pair" l))
-+)
-+
-+;; (%cdr expr)
-+
-+(define (/pmacro-builtin-cdr l)
-+ (if (pair? l)
-+ (cdr l)
-+ (/pmacro-error "invalid arg for %cdr, expected pair" l))
-+)
-+
-+;; (%caar expr)
-+
-+(define (/pmacro-builtin-caar l)
-+ (if (and (pair? l) (pair? (car l)))
-+ (caar l)
-+ (/pmacro-error "invalid arg for %caar" l))
-+)
-+
-+;; (%cadr expr)
-+
-+(define (/pmacro-builtin-cadr l)
-+ (if (and (pair? l) (pair? (cdr l)))
-+ (cadr l)
-+ (/pmacro-error "invalid arg for %cadr" l))
-+)
-+
-+;; (%cdar expr)
-+
-+(define (/pmacro-builtin-cdar l)
-+ (if (and (pair? l) (pair? (car l)))
-+ (cdar l)
-+ (/pmacro-error "invalid arg for %cdar" l))
-+)
-+
-+;; (%cddr expr)
-+
-+(define (/pmacro-builtin-cddr l)
-+ (if (and (pair? l) (pair? (cdr l)))
-+ (cddr l)
-+ (/pmacro-error "invalid arg for %cddr" l))
-+)
-+
-+;; (%internal-test expr)
-+;; This is an internal builtin for use by the testsuite.
-+;; EXPR is a Scheme expression that is executed to verify proper
-+;; behaviour of something. It must return #f for FAIL, non-#f for PASS.
-+;; The result is #f for FAIL, #t for PASS.
-+;; This must be used in an expression, it is not sufficient to do
-+;; (%internal-test mumble) because the reader will see #f or #t and complain.
-+
-+(define (/pmacro-builtin-internal-test expr)
-+ (and (eval1 expr) #t)
-+)
-+
-+;; Initialization.
-+;; If RTL-VERSION >= (0 9), install %pmacros, otherwise install .pmacros.
-+
-+(define (pmacros-init! rtl-version)
-+ (set! /pmacro-table (make-hash-table 127))
-+ (set! /smacro-table (make-hash-table 41))
-+
-+ ;; Predefined pmacros.
-+
-+ (let ((macros
-+ ;; name arg-spec syntactic? function description
-+ (list
-+ (list 'sym 'symbols #f /pmacro-builtin-sym "symbol-append")
-+ (list 'str 'strings #f /pmacro-builtin-str "string-append")
-+ (list 'hex '(number . width) #f /pmacro-builtin-hex "convert to -hex, with optional width")
-+ (list 'upcase '(string) #f /pmacro-builtin-upcase "string-upcase")
-+ (list 'downcase '(string) #f /pmacro-builtin-downcase "string-downcase")
-+ (list 'substring '(string start end) #f /pmacro-builtin-substring "get start of a string")
-+ (list 'splice 'arg-list #f /pmacro-builtin-splice "splice lists into the outer list")
-+ (list 'iota '(count . start-incr) #f /pmacro-builtin-iota "iota number generator")
-+ (list 'map '(pmacro list1 . rest) #f /pmacro-builtin-map "map a pmacro over a list of arguments")
-+ (list 'for-each '(pmacro list1 . rest) #f /pmacro-builtin-for-each "execute a pmacro over a list of arguments")
-+ (list 'eval '(expr) #t /pmacro-builtin-eval "expand(evaluate) expr")
-+ (list 'exec '(expr) #f /pmacro-builtin-exec "execute expr immediately")
-+ (list 'apply '(pmacro arg-list) #f /pmacro-builtin-apply "apply a pmacro to a list of arguments")
-+ (list 'pmacro '(params expansion) #t /pmacro-builtin-pmacro "create a pmacro on-the-fly")
-+ (list 'pmacro? '(arg) #f /pmacro-builtin-pmacro? "return true if arg is a pmacro")
-+ (list 'let '(locals expr1 . rest) #t /pmacro-builtin-let "create a binding context, let-style")
-+ (list 'let* '(locals expr1 . rest) #t /pmacro-builtin-let* "create a binding context, let*-style")
-+ (list 'if '(expr then . else) #t /pmacro-builtin-if "if expr is true, process then, else else")
-+ (list 'case '(expr case1 . rest) #t /pmacro-builtin-case "process statement that matches expr")
-+ (list 'cond '(expr1 . rest) #t /pmacro-builtin-cond "process first statement whose expr succeeds")
-+ (list 'begin 'rest #t /pmacro-builtin-begin "process a sequence of statements")
-+ (list 'print 'exprs #f /pmacro-builtin-print "print exprs, for debugging purposes")
-+ (list 'dump '(expr) #f /pmacro-builtin-dump "dump expr, for debugging purposes")
-+ (list 'error 'message #f /pmacro-builtin-error "print error message and exit")
-+ (list 'list 'exprs #f /pmacro-builtin-list "return a list of exprs")
-+ (list 'ref '(l n) #f /pmacro-builtin-ref "return n'th element of list l")
-+ (list 'length '(x) #f /pmacro-builtin-length "return length of symbol, string, or list")
-+ (list 'replicate '(n expr) #f /pmacro-builtin-replicate "return list of expr replicated n times")
-+ (list 'find '(pred l) #f /pmacro-builtin-find "return elements of list l matching pred")
-+ (list 'equal? '(x y) #f /pmacro-builtin-equal? "deep comparison of x and y")
-+ (list 'andif 'rest #t /pmacro-builtin-andif "return first #f element, otherwise return last element")
-+ (list 'orif 'rest #t /pmacro-builtin-orif "return first non-#f element found, otherwise #f")
-+ (list 'not '(x) #f /pmacro-builtin-not "return !x")
-+ (list 'eq '(x y) #f /pmacro-builtin-eq "return true if x == y")
-+ (list 'ne '(x y) #f /pmacro-builtin-ne "return true if x != y")
-+ (list 'lt '(x y) #f /pmacro-builtin-lt "return true if x < y")
-+ (list 'gt '(x y) #f /pmacro-builtin-gt "return true if x > y")
-+ (list 'le '(x y) #f /pmacro-builtin-le "return true if x <= y")
-+ (list 'ge '(x y) #f /pmacro-builtin-ge "return true if x >= y")
-+ (list 'add '(x y) #f /pmacro-builtin-add "return x + y")
-+ (list 'sub '(x y) #f /pmacro-builtin-sub "return x - y")
-+ (list 'mul '(x y) #f /pmacro-builtin-mul "return x * y")
-+ (list 'div '(x y) #f /pmacro-builtin-div "return x / y")
-+ (list 'rem '(x y) #f /pmacro-builtin-rem "return x % y")
-+ (list 'sll '(x n) #f /pmacro-builtin-sll "return logical x << n")
-+ (list 'srl '(x n) #f /pmacro-builtin-srl "return logical x >> n")
-+ (list 'sra '(x n) #f /pmacro-builtin-sra "return arithmetic x >> n")
-+ (list 'and '(x y) #f /pmacro-builtin-and "return x & y")
-+ (list 'or '(x y) #f /pmacro-builtin-or "return x | y")
-+ (list 'xor '(x y) #f /pmacro-builtin-xor "return x ^ y")
-+ (list 'inv '(x) #f /pmacro-builtin-inv "return ~x")
-+ (list 'car '(x) #f /pmacro-builtin-car "return (car x)")
-+ (list 'cdr '(x) #f /pmacro-builtin-cdr "return (cdr x)")
-+ (list 'caar '(x) #f /pmacro-builtin-caar "return (caar x)")
-+ (list 'cadr '(x) #f /pmacro-builtin-cadr "return (cadr x)")
-+ (list 'cdar '(x) #f /pmacro-builtin-cdar "return (cdar x)")
-+ (list 'cddr '(x) #f /pmacro-builtin-cddr "return (cddr x)")
-+ (list 'internal-test '(expr) #f /pmacro-builtin-internal-test "testsuite use only")
-+ ))
-+ (prefix (if (member rtl-version '((0 7) (0 8)))
-+ /pmacro-orig-prefix
-+ /pmacro-prefix)))
-+
-+ (for-each (lambda (x)
-+ (let ((name (list-ref x 0))
-+ (arg-spec (list-ref x 1))
-+ (syntactic? (list-ref x 2))
-+ (pmacro (list-ref x 3))
-+ (comment (list-ref x 4)))
-+ (let ((full-name (string->symbol (string-append prefix (symbol->string name)))))
-+ (/pmacro-set! full-name
-+ (/pmacro-make full-name arg-spec #f syntactic? pmacro comment))
-+ (if syntactic?
-+ (/smacro-set! full-name
-+ (/pmacro-make full-name arg-spec #f syntactic? pmacro comment))))))
-+
-+ macros))
-+)
-diff -Nur binutils-2.24.orig/cgen/pprint.scm binutils-2.24/cgen/pprint.scm
---- binutils-2.24.orig/cgen/pprint.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/pprint.scm 2016-06-30 21:26:12.665893579 +0200
-@@ -0,0 +1,212 @@
-+;;;; pprint.scm --- pretty-printing objects for CGEN
-+;;;; Copyright (C) 2005, 2009 Red Hat, Inc.
-+;;;; This file is part of CGEN.
-+;;;; See file COPYING.CGEN for details.
-+
-+;;; This file defines a printing function PPRINT, and some hooks to
-+;;; let you print certain kind of objects in a summary way, and get at
-+;;; their full values later.
-+
-+;;; PPRINT is a printer for Scheme objects that prints lists or
-+;;; vectors that contain shared structure or cycles and prints them in
-+;;; a finite, legible way.
-+;;;
-+;;; Ordinary values print in the usual way:
-+;;;
-+;;; guile> (pprint '(1 #(2 3) 4))
-+;;; (1 #(2 3) 4)
-+;;;
-+;;; Values can share structure:
-+;;;
-+;;; guile> (let* ((c (list 1 2))
-+;;; (d (list c c)))
-+;;; (write d)
-+;;; (newline))
-+;;; ((1 2) (1 2))
-+;;;
-+;;; In that list, the two instances of (1 2) are actually the same object;
-+;;; the top-level list refers to the same object twice.
-+;;;
-+;;; Printing that structure with PPRINT shows the sharing:
-+;;;
-+;;; guile> (let* ((c (list 1 2))
-+;;; (d (list c c)))
-+;;; (pprint d))
-+;;; (#0=(1 2) #0#)
-+;;;
-+;;; Here the "#0=" before the list (1 2) labels it with the number
-+;;; zero. Then, the "#0#" as the second element of the top-level list
-+;;; indicates that the object appears here, too, referring to it by
-+;;; its label.
-+;;;
-+;;; If you have several objects that appear more than once, they each
-+;;; get a separate label:
-+;;;
-+;;; guile> (let* ((a (list 1 2))
-+;;; (b (list 3 4))
-+;;; (c (list a b a b)))
-+;;; (pprint c))
-+;;; (#0=(1 2) #1=(3 4) #0# #1#)
-+;;;
-+;;; Cyclic values just share structure with themselves:
-+;;;
-+;;; guile> (let* ((a (list 1 #f)))
-+;;; (set-cdr! a a)
-+;;; (pprint a))
-+;;; #0=(1 . #0#)
-+;;;
-+;;;
-+;;; PPRINT also consults the function ELIDE? and ELIDED-NAME to see
-+;;; whether it should print a value in a summary form. You can
-+;;; re-define those functions to customize PPRINT's behavior;
-+;;; cos-pprint.scm defines them to handle COS objects and classes
-+;;; nicely.
-+;;;
-+;;; (ELIDE? OBJ) should return true if OBJ should be elided.
-+;;; (ELIDED-NAME OBJ) should return a (non-cyclic!) object to be used
-+;;; as OBJ's abbreviated form.
-+;;;
-+;;; PPRINT prints an elided object as a list ($ N NAME), where NAME is
-+;;; the value returned by ELIDED-NAME to stand for the object, and N
-+;;; is a number; each elided object gets its own number. You can refer
-+;;; to the elided object number N as ($ N).
-+;;;
-+;;; For example, if you've loaded CGEN, pprint.scm, and cos-pprint.scm
-+;;; (you must load cos-pprint.scm *after* loading pprint.scm), you can
-+;;; print a list containing the <insn> and <ident> classes:
-+;;;
-+;;; guile> (pprint (list <insn> <ident>))
-+;;; (($ 1 (class <insn>)) ($ 2 (class <ident>)))
-+;;; guile> (class-name ($ 1))
-+;;; <insn>
-+;;; guile> (class-name ($ 2))
-+;;; <ident>
-+;;;
-+;;; As a special case, PPRINT never elides the object that was passed
-+;;; to it directly. So you can look inside an elided object by doing
-+;;; just that:
-+;;;
-+;;; guile> (pprint ($ 2))
-+;;; #0=#("class" <ident> () ((name #:unbound #f . 0) ...
-+;;;
-+
-+
-+;;; A list of elided objects, larger numbers first, and the number of
-+;;; the first element.
-+(define elide-table '())
-+(define elide-table-last -1)
-+
-+;;; Add OBJ to the elided object list, and return its number.
-+(define (add-elided-object obj)
-+ (set! elide-table (cons obj elide-table))
-+ (set! elide-table-last (+ elide-table-last 1))
-+ elide-table-last)
-+
-+;;; Referencing elided objects.
-+(define ($ n)
-+ (if (<= 0 n elide-table-last)
-+ (list-ref elide-table (- elide-table-last n))
-+ "no such object"))
-+
-+;;; A default predicate for elision.
-+(define (elide? obj) #f)
-+
-+;;; If (elide? OBJ) is true, return some sort of abbreviated list
-+;;; structure that might be helpful to the user in identifying the
-+;;; elided object.
-+;;; A default definition.
-+(define (elided-name obj) "")
-+
-+;;; This is a pretty-printer that handles cyclic and shared structure.
-+(define (pprint original-obj)
-+
-+ ;; Return true if OBJ should be elided in this call to pprint.
-+ ;; (We never elide the object we were passed itself.)
-+ (define (elide-this-call? obj)
-+ (and (not (eq? obj original-obj))
-+ (elide? obj)))
-+
-+ ;; First, traverse OBJ and build a hash table mapping objects
-+ ;; referenced more than once to #t, and everything else to #f.
-+ ;; (Only include entries for objects that might be interior nodes:
-+ ;; pairs and vectors.)
-+ (let ((shared
-+ ;; Guile's stupid hash tables don't resize the table; the
-+ ;; chains just get longer and longer. So we need a big value here.
-+ (let ((seen (make-hash-table 65521))
-+ (shared (make-hash-table 4093)))
-+ (define (walk! obj)
-+ (if (or (pair? obj) (vector? obj))
-+ (if (hashq-ref seen obj)
-+ (hashq-set! shared obj #t)
-+ (begin
-+ (hashq-set! seen obj #t)
-+ (cond ((elide-this-call? obj))
-+ ((pair? obj) (begin (walk! (car obj))
-+ (walk! (cdr obj))))
-+ ((vector? obj) (do ((i 0 (+ i 1)))
-+ ((>= i (vector-length obj)))
-+ (walk! (vector-ref obj i))))
-+ (else (error "unhandled interior type")))))))
-+ (walk! original-obj)
-+ shared)))
-+
-+ ;; A counter for shared structure labels.
-+ (define fresh-shared-label
-+ (let ((n 0))
-+ (lambda ()
-+ (let ((l n))
-+ (set! n (+ n 1))
-+ l))))
-+
-+ (define (print obj)
-+ (print-with-label obj (hashq-ref shared obj)))
-+
-+ ;; Print an object OBJ, which SHARED maps to L.
-+ ;; L is always (hashq-ref shared obj), but we have that value handy
-+ ;; at times, so this entry point lets us avoid looking it up again.
-+ (define (print-with-label obj label)
-+ (if (number? label)
-+ ;; If we've already visited this object, just print a
-+ ;; reference to its label.
-+ (map display `("#" ,label "#"))
-+ (begin
-+ ;; If it needs a label, attach one now.
-+ (if (eqv? label #t) (let ((label (fresh-shared-label)))
-+ (hashq-set! shared obj label)
-+ (map display `("#" ,label "="))))
-+ ;; Print the object.
-+ (cond ((elide-this-call? obj)
-+ (write (list '$ (add-elided-object obj) (elided-name obj))))
-+ ((pair? obj) (begin (display "(")
-+ (print-tail obj)))
-+ ((vector? obj) (begin (display "#(")
-+ (do ((i 0 (+ i 1)))
-+ ((>= i (vector-length obj)))
-+ (print (vector-ref obj i))
-+ (if (< (+ i 1) (vector-length obj))
-+ (display " ")))
-+ (display ")")))
-+ (else (write obj))))))
-+
-+ ;; Print a pair P as if it were the tail of a list; assume the
-+ ;; opening paren and any previous elements have been printed.
-+ (define (print-tail obj)
-+ (print (car obj))
-+ (force-output)
-+ (let ((tail (cdr obj)))
-+ (if (null? tail)
-+ (display ")")
-+ ;; We use the dotted pair syntax if the cdr isn't a pair, but
-+ ;; also if it needs to be labeled.
-+ (let ((tail-label (hashq-ref shared tail)))
-+ (if (or (not (pair? tail)) tail-label)
-+ (begin (display " . ")
-+ (print-with-label tail tail-label)
-+ (display ")"))
-+ (begin (display " ")
-+ (print-tail tail)))))))
-+
-+ (print original-obj)
-+ (newline)))
-+
-diff -Nur binutils-2.24.orig/cgen/profile.scm binutils-2.24/cgen/profile.scm
---- binutils-2.24.orig/cgen/profile.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/profile.scm 2016-06-30 21:26:12.665893579 +0200
-@@ -0,0 +1,183 @@
-+;;; {Profile}
-+;;; Copyright (C) 2009 Red Hat, Inc.
-+;;; This file is part of CGEN.
-+;;; See file COPYING.CGEN for details.
-+;;;
-+;;; This code is just an experimental prototype (e. g., it is not
-+;;; thread safe), but since it's at the same time useful, it's
-+;;; included anyway.
-+;;;
-+;;; This is copied from the tracing support in debug.scm.
-+;;; If merged into the main distribution it will need an efficiency
-+;;; and layout cleanup pass.
-+
-+; FIXME: Prefix "proc-" added to not collide with cgen stuff.
-+
-+; Put this stuff in the debug module since we need the trace facilities.
-+(define-module (ice-9 profile) :use-module (ice-9 debug))
-+
-+(define profiled-procedures '())
-+
-+(define-public (profile-enable . args)
-+ (if (null? args)
-+ (nameify profiled-procedures)
-+ (begin
-+ (for-each (lambda (proc)
-+ (if (not (procedure? proc))
-+ (error "profile: Wrong type argument:" proc))
-+ ; `trace' is a magic property understood by guile
-+ (set-procedure-property! proc 'trace #t)
-+ (if (not (memq proc profiled-procedures))
-+ (set! profiled-procedures
-+ (cons proc profiled-procedures))))
-+ args)
-+ (set! apply-frame-handler profile-entry)
-+ (set! exit-frame-handler profile-exit)
-+ (debug-enable 'trace)
-+ (nameify args))))
-+
-+(define-public (profile-disable . args)
-+ (if (and (null? args)
-+ (not (null? profiled-procedures)))
-+ (apply profile-disable profiled-procedures)
-+ (begin
-+ (for-each (lambda (proc)
-+ (set-procedure-property! proc 'trace #f)
-+ (set! profiled-procedures (delq! proc profiled-procedures)))
-+ args)
-+ (if (null? profiled-procedures)
-+ (debug-disable 'trace))
-+ (nameify args))))
-+
-+(define (nameify ls)
-+ (map (lambda (proc)
-+ (let ((name (procedure-name proc)))
-+ (or name proc)))
-+ ls))
-+
-+; Subroutine of profile-entry to find the calling procedure.
-+; Result is name of calling procedure or #f.
-+
-+(define (find-caller frame)
-+ (let ((prev (frame-previous frame)))
-+ (if prev
-+ ; ??? Not sure this is right. The goal is to find the real "caller".
-+ (if (and (frame-procedure? prev)
-+ ;(or (frame-real? prev) (not (frame-evaluating-args? prev)))
-+ (not (frame-evaluating-args? prev))
-+ )
-+ (let ((name (procedure-name (frame-procedure prev))))
-+ (if name name 'lambda))
-+ (find-caller prev))
-+ 'top-level))
-+)
-+
-+; Return the current time.
-+; The result is a black box understood only by elapsed-time.
-+
-+(define (current-time) (gettimeofday))
-+
-+; Return the elapsed time in milliseconds since START.
-+
-+(define (elapsed-time start)
-+ (let ((now (gettimeofday)))
-+ (+ (* (- (car now) (car start)) 1000)
-+ (quotient (- (cdr now) (cdr start)) 1000)))
-+)
-+
-+; Handle invocation of profiled procedures.
-+
-+(define (profile-entry key cont tail)
-+ (if (eq? (stack-id cont) 'repl-stack)
-+ (let* ((stack (make-stack cont))
-+ (frame (stack-ref stack 0))
-+ (proc (frame-procedure frame)))
-+ (if proc
-+ ; procedure-property returns #f if property not present
-+ (let ((counts (procedure-property proc 'profile-count)))
-+ (set-procedure-property! proc 'entry-time (current-time))
-+ (if counts
-+ (let* ((caller (find-caller frame))
-+ (count-elm (assq caller counts)))
-+ (if count-elm
-+ (set-cdr! count-elm (1+ (cdr count-elm)))
-+ (set-procedure-property! proc 'profile-count
-+ (acons caller 1 counts)))))))))
-+
-+ ; SCM_TRACE_P is reset each time by the interpreter
-+ ;(display "entry\n" (current-error-port))
-+ (debug-enable 'trace)
-+ ;; It's not necessary to call the continuation since
-+ ;; execution will continue if the handler returns
-+ ;(cont #f)
-+)
-+
-+; Handle exiting of profiled procedures.
-+
-+(define (profile-exit key cont retval)
-+ ;(display "exit\n" (current-error-port))
-+ (display (list key cont retval)) (newline)
-+ (display (stack-id cont)) (newline)
-+ (if (eq? (stack-id cont) 'repl-stack)
-+ (let* ((stack (make-stack cont))
-+ (frame (stack-ref stack 0))
-+ (proc (frame-procedure frame)))
-+ (display stack) (newline)
-+ (display frame) (newline)
-+ (if proc
-+ (set-procedure-property!
-+ proc 'total-time
-+ (+ (procedure-property proc 'total-time)
-+ (elapsed-time (procedure-property proc 'entry-time)))))))
-+
-+ ; ??? Need to research if we have to do this or not.
-+ ; SCM_TRACE_P is reset each time by the interpreter
-+ (debug-enable 'trace)
-+)
-+
-+; Called before something is to be profiled.
-+; All desired procedures to be profiled must have been previously selected.
-+; Property `profile-count' is an association list of caller name and call
-+; count.
-+; ??? Will eventually want to use a hash table or some such.
-+
-+(define-public (profile-init)
-+ (for-each (lambda (proc)
-+ (set-procedure-property! proc 'profile-count '())
-+ (set-procedure-property! proc 'total-time 0))
-+ profiled-procedures)
-+)
-+
-+; Called after execution to print profile counts.
-+; If ARGS contains 'all, stats on all profiled procs are printed, not just
-+; those that were actually called.
-+
-+(define-public (profile-stats . args)
-+ (let ((stats (map (lambda (proc)
-+ (cons (procedure-name proc)
-+ (procedure-property proc 'profile-count)))
-+ profiled-procedures))
-+ (all? (memq 'all args))
-+ (sort (if (defined? 'sort) (local-ref '(sort)) (lambda args args))))
-+
-+ (display "Profiling results:\n\n")
-+
-+ ; Print the procs in sorted order.
-+ (let ((stats (sort stats (lambda (a b) (string<? (car a) (car b))))))
-+ (for-each (lambda (proc-stats)
-+ (if (or all? (not (null? (cdr proc-stats))))
-+ ; Print by decreasing frequency.
-+ (let ((calls (sort (cdr proc-stats) (lambda (a b) (> (cdr a) (cdr b))))))
-+ (display (string-append (car proc-stats) "\n"))
-+ (for-each (lambda (call)
-+ (display (string-append " "
-+ (number->string (cdr call))
-+ " "
-+ (car call)
-+ "\n")))
-+ calls)
-+ (display " ")
-+ (display (apply + (map cdr calls)))
-+ (display " -- total\n\n"))))
-+ stats)))
-+)
-diff -Nur binutils-2.24.orig/cgen/README binutils-2.24/cgen/README
---- binutils-2.24.orig/cgen/README 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/README 2016-06-30 21:26:12.665893579 +0200
-@@ -0,0 +1,185 @@
-+This is the README for CGEN 1.0.
-+
-+If you just want to read up on cgen, I suggest going directly to the
-+doc directory, and in particular doc/intro.texi.
-+
-+What is it?
-+-----------
-+
-+In a nutshell, CGEN is a project to provide a uniform framework for doing
-+binutils and simulator ports without explicitly closing any doors on anything
-+else one might want to do with the cpu description (i.e. application
-+independence). The "cpu description" as defined here includes anything useful.
-+To this end CGEN is a very open-ended and ambitious project.
-+
-+The core of CGEN is a cpu description file and code to slurp it in and
-+build a database describing the cpu. From this the Binutils opcodes table
-+can be generated for example, as well as an ISA simulator decoder/executor.
-+
-+CGEN is not a new idea. Other GNU ports have done this (e.g. `sh' in its
-+early days). However, the idea never really "caught on". CGEN was started
-+because I think it should be.
-+
-+CGEN is short for "Cpu tools GENerator". It's not a very good name.
-+I'm not very good at picking names. An early version of the name was
-+"GENCPU"! So give me a better one.
-+
-+Copyright
-+--------
-+
-+CGEN is Copyright 2000 Red Hat, Inc.
-+
-+The full text of the copyright for CGEN is contained in the file
-+COPYING.CGEN. The copyright of CGEN uses the Autoconf copyright
-+as a guide. The intent is to have CGEN under a GNU-style copyright but
-+place no restrictions on the output of CGEN.
-+
-+Installation
-+------------
-+
-+CGEN 0.7.1 can be used with GNU Binutils snapshots as of ??????
-+and GNU GDB snapshots as of ??????.
-+GNU Binutils/GDB users will never "use" CGEN. The generated sources
-+are shipped with GNU Binutils/GDB releases.
-+Binutils/GDB developers wishing to use CGEN must configure Binutils/GDB with
-+--enable-cgen-maint. This will add the necessary dependencies to
-+opcodes/Makefile and sim/<arch>/Makefile for the supported processors, which
-+at this point is M32R and FR30.
-+
-+CGEN uses Guile so Guile must be installed.
-+Guile 1.2 and 1.3 are supported.
-+2)
-+
-+Source Layout
-+-------------
-+
-+CGEN sources are divided into several categories:
-+
-+- documentation
-+- code to read .cpu files
-+- opcode table generator
-+- gas testsuite generator
-+- simulator generator
-+- misc support scripts
-+- cpu specific files
-+- C support code
-+
-+File naming rules:
-+
-+1. The top level script for each application shall be named
-+ cgen-<appl>.scm. No other files shall be named cgen-*.scm.
-+
-+2. Files implementing a particular class (or related collection of
-+ classes) shall be named <class-name>.scm, or a reasonable
-+ abbreviation thereof.
-+
-+3. CPU description files shall be named <arch>.cpu and placed in the
-+ `cpu' sub-directory.
-+
-+4. CPU opcode support files shall be named <arch>.opc and similarly
-+ placed in the `cpu' sub-directory.
-+
-+??? May wish to change (1) to <appl>-cgen.scm so that each application's
-+files will be collected together in `ls' output by the <appl>- prefix.
-+
-+
-+Documentation
-+-------------
-+
-+doc/cgen.texi - top level .texi file, includes the others
-+doc/rtl.texi - cpu description language (based on GCC's RTL)
-+doc/intro.texi - global overview of cgen
-+doc/opcodes.texi - opcode table usage of cgen
-+doc/porting.texi - porting guide for new ports
-+doc/sim.texi - simulator usage of cgen
-+doc/credits.texi - inspiration and contributors
-+
-+code to read .cpu files
-+-----------------------
-+
-+These files provide the basic support for reading in .cpu files. They contain
-+no application specific code (and ideally as little C generating code as
-+possible too), they are intended to be application independent. Applications
-+(e.g. the opcode table generator and the simulator support generator) are
-+built on top of these files.
-+
-+attr.scm - attribute support
-+read.scm - top level script for .cpu file reading
-+enum.scm - enum support
-+hardware.scm - hardware description reader
-+ifield.scm - instruction field reader
-+iformat.scm - computes instruction formats
-+insn.scm - instruction description reader
-+mach.scm - architecture/cpu/machine reader
-+minsn.scm - macro-instruction description reader
-+mode.scm - mode support
-+model.scm - model reader
-+operand.scm - instruction operand reader
-+rtl.scm - basic rtl support
-+rtx-funcs.scm - defines all standard rtx functions
-+types.scm - type system
-+
-+opcode table generator
-+---------------------
-+
-+cgen-opc.scm - top level script to generate the opcode table + support
-+opcodes.scm - opcode table generator
-+opc-asmdis.scm
-+opc-ibld.scm
-+opc-itab.scm
-+opc-opinst.scm
-+
-+Additional support lives in the opcodes directory.
-+
-+opcodes/cgen-ibld.in - input file for <arch>-ibld.c
-+opcodes/cgen-asm.in - input file for <arch>-asm.c
-+opcodes/cgen-dis.in - input file for <arch>-dis.c
-+opcodes/cgen-opc.c - architecture independent opcode table support
-+opcodes/cgen-asm.c - architecture independent assembler support
-+opcodes/cgen-dis.c - architecture independent disassembler support
-+opcodes/cgen.sh - shell script invoked by opcodes/Makefile to build
-+ <arch>-opc.h, <arch>-opc.c, <arch>-asm.c, <arch>-dis.c.
-+
-+The header file that defines the interface to the opcodes table is
-+include/opcode/cgen.h.
-+
-+gas testsuite generator
-+-----------------------
-+
-+cgen-gas.scm - top level script to generate gas testcases
-+gas-test.scm - generate gas testcases
-+
-+simulator generator
-+-------------------
-+
-+cgen-sim.scm - top level script to generate simulator files
-+sim-arch.scm - generator for architecture-wide support files
-+sim-cpu.scm - generator for cpu specific simulator files
-+sim-decode.scm - decoder generator
-+sim-model.scm - generates model support
-+sim.scm - interface between simulator generator and cpu database
-+
-+Additional support lives in sim/common/cgen-*.[ch].
-+Architectures specific files live in sim/<arch>.
-+
-+misc. support scripts
-+---------------------
-+
-+dev.scm - top level script for doing interactive development
-+guile.scm - Guile-specific definitions, and adaptations to specific
-+ versions of Guile
-+cos.scm - OOP implementation
-+pmacros.scm - preprocessor-style macro package
-+profile.scm - Guile profiling tool [eventually wish to move this to
-+ Guile distribution when finished]
-+sort.scm - sort routine, from slib
-+utils-cgen.scm - various utilities specific to cgen
-+utils.scm - generic Scheme utilities [non cgen specific]
-+
-+cpu specific files
-+------------------
-+
-+<arch>.cpu - <arch> description file
-+<arch>.opc - <arch> opcode support
-+
-+null.cpu - minimal .cpu file for debugging purposes
-diff -Nur binutils-2.24.orig/cgen/read.scm binutils-2.24/cgen/read.scm
---- binutils-2.24.orig/cgen/read.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/read.scm 2016-06-30 21:26:12.665893579 +0200
-@@ -0,0 +1,1433 @@
-+;; Top level file for reading and recording .cpu file contents.
-+;; Copyright (C) 2000, 2001, 2006, 2009, 2010 Red Hat, Inc.
-+;; This file is part of CGEN.
-+;; See file COPYING.CGEN for details.
-+
-+;; This file [and its subordinates] contain no C code (well, as little as
-+;; possible). That lives at a layer above us.
-+
-+;; A .cpu file consists of several sections:
-+;;
-+;; - basic definitions (e.g. cpu variants, word size, endianness, etc.)
-+;; - enums (enums are used throughout so by convention there is a special
-+;; section in which they're defined)
-+;; - attributes
-+;; - instruction fields and formats
-+;; - hardware descriptions (e.g. registers, allowable immediate values)
-+;; - model descriptions (e.g. pipelines, latencies, etc.)
-+;; - instruction operands (mapping of insn fields to associated hardware)
-+;; - instruction definitions
-+;; - macro instruction definitions
-+
-+;; TODO:
-+;; - memory access, layout, etc.
-+;; - floating point quirks
-+;; - ability to describe an ABI
-+;; - anything else that comes along
-+
-+;; Notes:
-+;; - by convention most objects are subclasses of <ident> (having name, comment,
-+;; and attrs elements and they are the first three elements of any .cpu file
-+;; entry
-+
-+;; Guidelines:
-+;; - Try to conform to R5RS, try to limit guile-ness.
-+;; The current code is undoubtedly off in many places.
-+
-+;; Conventions:
-+;; [I want there to be a plethora of conventions and I want them strictly
-+;; adhered to. ??? There's probably a few violations here and there.
-+;; No big deal - fix them!]
-+;; These conventions are subject to revision.
-+;;
-+;; - procs/vars local to a file are named "-foo"
-+;; - only routines that emit application code begin with "gen-"
-+;; - symbols beginning with "c-" are either variables containing C code
-+;; or procedures that generate C code, similarily for C++ and "c++-"
-+;; - variables containing C code begin with "c-"
-+;; - only routines that emit an entire file begin with "cgen-"
-+;; - all .cpu file elements shall have -foo-parse and -foo-read procedures
-+;; - global vars containing class definitions shall be named "<class-name>"
-+;; - procs related to a particular class shall be named "class-name-proc-name",
-+;; class-name may be abbreviated
-+;; - procs that test whether something is an object of a particular class
-+;; shall be named "class-name?"
-+;; - in keeping with Scheme conventions, predicates shall have a "?" suffix
-+;; - in keeping with Scheme conventions, methods and procedures that modify an
-+;; argument or have other side effects shall have a "!" suffix,
-+;; usually these procs return "*UNSPECIFIED*"
-+;; - all -foo-parse,parse-foo procs shall have `context' as the first arg
-+;; [FIXME: not all such procs have been converted]
-+;; - stay away from non-portable C symbols.
-+
-+;; Variables representing misc. global constants.
-+
-+;; A list of three numbers designating the cgen version: major minor fixlevel.
-+;; The "50" is a generic indicator that we're between 1.1 and 1.2.
-+(define /CGEN-VERSION '(1 1 50))
-+(define (cgen-major) (car /CGEN-VERSION))
-+(define (cgen-minor) (cadr /CGEN-VERSION))
-+(define (cgen-fixlevel) (caddr /CGEN-VERSION))
-+
-+;; A list of two numbers designating the description language version.
-+;; Note that this is different from /CGEN-VERSION.
-+;; See section "RTL Versions" of the docs.
-+(define /CGEN-RTL-VERSION #f)
-+(define /default-rtl-version '(0 7))
-+(define (cgen-rtl-version) /CGEN-RTL-VERSION)
-+(define (cgen-rtl-major) (car /CGEN-RTL-VERSION))
-+(define (cgen-rtl-minor) (cadr /CGEN-RTL-VERSION))
-+
-+;; Utilities for testing the rtl version.
-+(define (rtl-version-equal? major minor)
-+ (equal? (cgen-rtl-version) (list major minor))
-+)
-+(define (rtl-version-at-least? major minor)
-+ (let ((rmajor (cgen-rtl-major))
-+ (rminor (cgen-rtl-minor)))
-+ (or (> rmajor major)
-+ (and (= rmajor major)
-+ (>= rminor minor))))
-+)
-+(define (rtl-version-older? major minor)
-+ (not (rtl-version-at-least? major minor))
-+)
-+
-+;; List of supported versions
-+(define /supported-rtl-versions '((0 7) (0 8) (0 9)))
-+
-+;; Return a boolean indicating if VERSION is valid.
-+
-+(define (/rtl-version-valid? version) (member version /supported-rtl-versions))
-+
-+(define (/cmd-define-rtl-version major minor)
-+ (if (not (non-negative-integer? major))
-+ (parse-error #f "Invalid major version number" major))
-+ (if (not (non-negative-integer? minor))
-+ (parse-error #f "Invalid minor version number" minor))
-+
-+ (let ((new-version (list major minor)))
-+ (if (not (member new-version /supported-rtl-versions))
-+ (parse-error #f "Unsupported/invalid rtl version" new-version))
-+ (if (not (equal? new-version /CGEN-RTL-VERSION))
-+ (begin
-+ (logit 1 "Setting RTL version to " major "." minor " ...\n")
-+ ;; Pmacros are rtl-version-dependent. If we've changed the RTL
-+ ;; version, re-initialize.
-+ (pmacros-init! new-version)
-+ (set! /CGEN-RTL-VERSION new-version))))
-+)
-+
-+;; Which application is in use (UNKNOWN, DESC, OPCODES, SIMULATOR, ???).
-+;; This is mostly for descriptive purposes.
-+(define APPLICATION 'UNKNOWN)
-+
-+;; Load the base cgen files.
-+
-+(load "pmacros")
-+(load "cos")
-+(load "slib/logical")
-+(load "slib/sort")
-+;; Used to pretty-print debugging messages.
-+(load "slib/pp")
-+;; Used by pretty-print.
-+(load "slib/random")
-+(load "slib/genwrite")
-+(load "utils")
-+(load "utils-cgen")
-+(load "attr")
-+(load "enum")
-+(load "mach")
-+(load "model")
-+(load "types")
-+(load "mode")
-+(load "ifield")
-+(load "iformat")
-+(load "hardware")
-+(load "operand")
-+(load "insn")
-+(load "minsn")
-+(load "decode")
-+(load "rtl")
-+(load "rtl-traverse")
-+(load "rtl-xform")
-+(load "rtx-funcs")
-+(load "rtl-c")
-+(load "semantics")
-+(load "sem-frags")
-+(load "utils-gen")
-+(load "pgmr-tools")
-+
-+;; Reader state data.
-+;; All state regarding the reading of a .cpu file is kept in an object of
-+;; class <reader>.
-+
-+;; Class to record info for each top-level `command' (for lack of a better
-+;; word) in the description file.
-+;; Top level commands are things like define-*.
-+
-+(define <command>
-+ (class-make '<command>
-+ '(<ident>)
-+ '(
-+ ;; argument spec to `lambda'
-+ arg-spec
-+ ;; lambda that processes the entry
-+ handler
-+ )
-+ nil)
-+)
-+
-+(define command-arg-spec (elm-make-getter <command> 'arg-spec))
-+(define command-handler (elm-make-getter <command> 'handler))
-+
-+;; Return help text for COMMAND.
-+
-+(define (command-help cmd)
-+ (string-append
-+ (obj:comment cmd)
-+ "Arguments: "
-+ (with-output-to-string (lambda () (write (command-arg-spec cmd))))
-+ "\n")
-+)
-+
-+;; A pair of two lists: machs to keep, machs to drop.
-+;; The default is "keep all machs", "drop none".
-+
-+(define /keep-all-machs '((all)))
-+
-+;; Main reader state class.
-+
-+(define <reader>
-+ (class-make '<reader>
-+ nil
-+ (list
-+ ;; Selected machs to keep.
-+ ;; A pair of two lists: the car lists the machs to keep, the cdr
-+ ;; lists the machs to drop. Two special entries are `all' and
-+ ;; `base'. Both are only valid in the keep list. `base' is a
-+ ;; place holder for objects that are common to all machine
-+ ;; variants in the architecture, it is the default value of the
-+ ;; MACH attribute. If `all' is present the drop list is still
-+ ;; processed.
-+ (cons 'keep-mach /keep-all-machs)
-+
-+ ;; Selected isas to keep or `all'.
-+ '(keep-isa . (all))
-+
-+ ;; Boolean indicating if command tracing is on.
-+ (cons 'trace-commands? #f)
-+
-+ ;; Boolean indicating if pmacro tracing is on.
-+ (cons 'trace-pmacros? #f)
-+
-+ ;; Issue diagnostics for instruction format issues.
-+ (cons 'verify-iformat? #f)
-+
-+ ;; Currently select cpu family, computed from `keep-mach'.
-+ ;; Some applications don't care, and this is moderately
-+ ;; expensive to compute so we use delay/force.
-+ 'current-cpu
-+
-+ ;; Associative list of file entry commands
-+ ;; (e.g. define-insn, etc.).
-+ ;; Each entry is (name . command-object).
-+ (cons 'commands nil)
-+
-+ ;; The current source location.
-+ ;; This is recorded here by the higher level reader and is
-+ ;; fetched by commands as necessary.
-+ 'location
-+ )
-+ nil)
-+)
-+
-+;; Accessors.
-+
-+(define-getters <reader> reader
-+ (keep-mach keep-isa
-+ trace-commands? trace-pmacros? verify-iformat?
-+ current-cpu commands location))
-+(define-setters <reader> reader
-+ (keep-mach keep-isa
-+ trace-commands? trace-pmacros? verify-iformat?
-+ current-cpu commands location))
-+
-+(define (reader-add-command! name comment attrs arg-spec handler)
-+ (reader-set-commands! CURRENT-READER
-+ (acons name
-+ (make <command> name comment attrs
-+ arg-spec handler)
-+ (reader-commands CURRENT-READER)))
-+)
-+
-+(define (/reader-lookup-command name)
-+ (assq-ref (reader-commands CURRENT-READER) name)
-+)
-+
-+;; Reader state for current .cpu file.
-+
-+(define CURRENT-READER #f)
-+
-+;; Return the current source location in readable form.
-+;; FIXME: Currently unused, keep for reference for awhile.
-+
-+(define (/readable-current-location)
-+ (let ((loc (current-reader-location)))
-+ (if loc
-+ (location->string loc)
-+ ;; Blech, we don't have a current reader location. That's odd.
-+ ;; Fall back to the current input port's location.
-+ (string-append (or (port-filename (current-input-port))
-+ "<input>")
-+ ":"
-+ (number->string (port-line (current-input-port)))
-+ ":")))
-+)
-+
-+;; Subroutine of parse-error, parse-warning to simplify them.
-+;; Flag an error or a warning.
-+;; EMITTER is a function of one argument, the message to print.
-+
-+(define (/parse-diagnostic emitter context message expr maybe-help-text)
-+ (if (not context)
-+ (set! context (make <context> (current-reader-location) #f)))
-+
-+ (let* ((loc (or (context-location context) (unspecified-location)))
-+ (top-sloc (location-top loc))
-+ (intro "While reading description")
-+ (prefix (or (context-prefix context) "Error"))
-+ (text (string-append prefix ": " message)))
-+
-+ (emitter
-+ (simple-format
-+ #f
-+ "\n~A:\n@ ~A:\n\n~A: ~A: ~S~A"
-+ intro
-+ (location->string loc)
-+ (single-location->simple-string top-sloc)
-+ text
-+ expr
-+ (if maybe-help-text
-+ (string-append "\n\n" maybe-help-text)
-+ ""))))
-+)
-+
-+;; Signal a parse error while reading a .cpu file.
-+;; Processing stops immediately.
-+;; If CONTEXT is #f, use a default context of the current reader location
-+;; and an empty prefix.
-+;; If MAYBE-HELP-TEXT is specified, elide the last trailing \n.
-+;; Multiple lines of help text need embedded newlines, and should be no longer
-+;; than 79 characters.
-+
-+(define (parse-error context errmsg expr . maybe-help-text)
-+ (/parse-diagnostic error
-+ context
-+ errmsg
-+ expr
-+ (if (null? maybe-help-text) "" (car maybe-help-text)))
-+)
-+
-+;; Same as parse-error, but continue processing.
-+
-+(define (parse-error-continuable context errmsg expr . maybe-help-text)
-+ (set! /continuable-error-found? #t)
-+ (/parse-diagnostic (lambda (text) (message "Error: " text "\n"))
-+ context
-+ errmsg
-+ expr
-+ (if (null? maybe-help-text) #f (car maybe-help-text)))
-+)
-+
-+;; Signal a parse warning while reading a .cpu file.
-+;; If CONTEXT is #f, use a default context of the current reader location
-+;; and an empty prefix.
-+;; If MAYBE-HELP-TEXT is specified, elide the last trailing \n.
-+;; Multiple lines of help text need embedded newlines, and should be no longer
-+;; than 79 characters.
-+
-+(define (parse-warning context errmsg expr . maybe-help-text)
-+ (/parse-diagnostic (lambda (text) (message "Warning: " text "\n"))
-+ context
-+ errmsg
-+ expr
-+ (if (null? maybe-help-text) #f (car maybe-help-text)))
-+)
-+
-+;; Return the current source location.
-+;;
-+;; If CURRENT-READER is uninitialized, return "unspecified" location.
-+;; This is done so that things like define-pmacro work in interactive mode.
-+
-+(define (current-reader-location)
-+ (if CURRENT-READER
-+ (reader-location CURRENT-READER)
-+ (unspecified-location))
-+)
-+
-+;; Pmacro-expand EXPR.
-+
-+(define (/reader-expand expr loc)
-+ (if (reader-trace-pmacros? CURRENT-READER)
-+ (pmacro-trace expr loc)
-+ (pmacro-expand expr loc))
-+)
-+
-+;; Process a pmacro-expanded entry.
-+
-+(define (/reader-process-expanded-1! entry)
-+ (let ((location (location-property entry)))
-+
-+ (if (not (form? entry))
-+ (parse-error location "improperly formed entry" entry))
-+
-+ ;; Set the current source location for better diagnostics.
-+ ;; Access with current-reader-location.
-+ (reader-set-location! CURRENT-READER location)
-+
-+ (if (reader-trace-commands? CURRENT-READER)
-+ (message "Processing command:\n @ "
-+ (if location (location->string location) "location unknown")
-+ "\n"
-+ (with-output-to-string (lambda () (pretty-print entry)))))
-+
-+ (let ((command (/reader-lookup-command (car entry)))
-+ (context (make-current-context #f)))
-+
-+ (if command
-+
-+ (let* ((handler (command-handler command))
-+ (arg-spec (command-arg-spec command))
-+ (num-args (num-args arg-spec)))
-+ (if (cdr num-args)
-+ ;; Variable number of trailing arguments.
-+ (if (< (length (cdr entry)) (car num-args))
-+ (parse-error context
-+ (string-append "Incorrect number of arguments to "
-+ (symbol->string (car entry))
-+ ", expecting at least "
-+ (number->string (car num-args)))
-+ entry
-+ (command-help command))
-+ (apply handler (cdr entry)))
-+ ;; Fixed number of arguments.
-+ (if (!= (length (cdr entry)) (car num-args))
-+ (parse-error context
-+ (string-append "Incorrect number of arguments to "
-+ (symbol->string (car entry))
-+ ", expecting "
-+ (number->string (car num-args)))
-+ entry
-+ (command-help command))
-+ (apply handler (cdr entry)))))
-+
-+ (parse-error context "unknown entry type" entry))))
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; Process one or more pmacro-expanded entries.
-+;; ENTRY is expected to have a location-property object property.
-+
-+(define (reader-process-expanded! entry)
-+ ;; () is used to indicate a no-op
-+ (cond ((null? entry)
-+ #f) ;; nothing to do
-+ ;; `begin' is used to group a collection of entries into one,
-+ ;; since pmacro can only return one expression (borrowed from
-+ ;; Scheme of course).
-+ ;; Recurse in case there are nested begins.
-+ ((eq? (car entry) 'begin)
-+ (for-each reader-process-expanded!
-+ (cdr entry)))
-+ (else
-+ (/reader-process-expanded-1! entry)))
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; Process ENTRY, which is not yet pmacro-expanded.
-+
-+(define (reader-process! entry)
-+ (/reader-process-with-loc! entry
-+ (or (location-property entry)
-+ (unspecified-location)))
-+)
-+
-+;; Process file entry ENTRY.
-+;; LOC is a <location> object for ENTRY.
-+
-+(define (/reader-process-with-loc! entry loc)
-+ ;; () is used to indicate a no-op
-+ (cond ((null? entry)
-+ #f) ;; nothing to do
-+ ;; `begin' is used to group a collection of entries into one,
-+ ;; since pmacro can only return one expression (borrowed from
-+ ;; Scheme of course).
-+ ;; Recurse in case there are nested begins.
-+ ((eq? (car entry) 'begin)
-+ (for-each (lambda (e) (/reader-process-with-loc! e loc))
-+ (cdr entry)))
-+ ;; Don't do pmacro-expansion for `define-pmacro'.
-+ ;; ??? Singling out define-pmacro this way seems a bit odd. The way to
-+ ;; look at it, I guess, is to think of define-pmacro as (currently) the
-+ ;; only "syntactic" command (it doesn't pre-evaluate its arguments).
-+ ;; Defer pmacro-expansion for `if' too.
-+ ((memq (car entry) '(define-pmacro if))
-+ (location-property-set! entry loc)
-+ (/reader-process-expanded-1! entry))
-+ (else
-+ ;; First do pmacro expansion.
-+ (let ((expansion (/reader-expand entry loc)))
-+ (reader-process-expanded! expansion))))
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; Read in and process FILE.
-+;;
-+;; It would be nice to get the line number of the beginning of the object,
-+;; but that's extra work, so for now we do the simple thing and use
-+;; port-line after we've read an entry.
-+
-+(define (reader-read-file! file)
-+ (let ((readit (lambda ()
-+ (let loop ((entry (read)))
-+ (if (eof-object? entry)
-+ #t ;; done
-+ (begin
-+ ;; ??? The location we pass here isn't ideal.
-+ ;; Ideally we'd pass the start location of the
-+ ;; expression, instead we currently pass the end
-+ ;; location (it's easier).
-+ ;; ??? Use source-properties of entry, and only if
-+ ;; not present fall back on current-input-location.
-+ (/reader-process-with-loc! entry (current-input-location #t))
-+ (loop (read)))))))
-+ )
-+
-+ (with-input-from-file file readit))
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; Cpu data is recorded in an object of class <arch>.
-+;; This is necessary as we need to allow recording of multiple cpu descriptions
-+;; simultaneously.
-+;; Class <arch> is defined in mach.scm.
-+
-+;; Global containing all data of the currently selected architecture.
-+
-+(define CURRENT-ARCH #f)
-+
-+;; `keep-mach' processing.
-+
-+;; Return the currently selected cpu family.
-+;; If a specific cpu family has been selected, each machine that is kept must
-+;; be in that cpu family [so there's no ambiguity in the result].
-+;; This is a moderately expensive computation so use delay/force.
-+
-+(define (current-cpu) (force (reader-current-cpu CURRENT-READER)))
-+
-+;; Return a boolean indicating if CPU-NAME is to be kept.
-+;; ??? Currently this is always true. Note that this doesn't necessarily apply
-+;; to machs in CPU-NAME.
-+
-+(define (keep-cpu? cpu-name) #t)
-+
-+;; Cover proc to set `keep-mach'.
-+;; MACH-NAME-LIST is a comma separated string of machines to keep and drop
-+;; (if prefixed with !).
-+
-+(define (/keep-mach-set! mach-name-list)
-+ (let* ((mach-name-list (string-cut mach-name-list #\,))
-+ (keep (find (lambda (name) (not (char=? (string-ref name 0) #\!)))
-+ mach-name-list))
-+ (drop (map (lambda (name) (string->symbol (string-drop 1 name)))
-+ (find (lambda (name) (char=? (string-ref name 0) #\!))
-+ mach-name-list))))
-+ (reader-set-keep-mach! CURRENT-READER
-+ (cons (map string->symbol keep)
-+ (map string->symbol drop)))
-+ ;; Reset current-cpu.
-+ (reader-set-current-cpu!
-+ CURRENT-READER
-+ (delay (let ((selected-machs (find (lambda (mach)
-+ (keep-mach? (list (obj:name mach))))
-+ (current-mach-list))))
-+ (if (= (length selected-machs) 0)
-+ (error "no machs selected"))
-+ (if (not (all-true? (map (lambda (mach)
-+ (eq? (obj:name (mach-cpu mach))
-+ (obj:name (mach-cpu (car selected-machs)))))
-+ selected-machs)))
-+ (error "machs from different cpu families selected"))
-+ (mach-cpu (car selected-machs)))))
-+
-+ *UNSPECIFIED*)
-+)
-+
-+;; Validate the user-provided keep-mach list against the list of machs
-+;; specified in the .cpu file (in define-arch).
-+
-+(define (keep-mach-validate!)
-+ (let ((mach-names (cons 'all (current-arch-mach-name-list)))
-+ (keep-mach (reader-keep-mach CURRENT-READER)))
-+ (for-each (lambda (mach)
-+ (if (not (memq mach mach-names))
-+ (error "unknown mach to keep:" mach)))
-+ (car keep-mach))
-+ (for-each (lambda (mach)
-+ (if (not (memq mach mach-names))
-+ (error "unknown mach to drop:" mach)))
-+ (cdr keep-mach))
-+ )
-+ *UNSPECIFIED*
-+)
-+
-+;; Return #t if a machine in MACH-LIST, a list of symbols, is to be kept.
-+;; If any machine in MACH-LIST is to be kept, the result is #t.
-+;; If MACH-LIST is the empty list (no particular mach specified, thus the base
-+;; mach), the result is #t.
-+
-+(define (keep-mach? mach-list)
-+ (if (null? mach-list)
-+ #t
-+ (let* ((keep-mach (reader-keep-mach CURRENT-READER))
-+ (keep (cons 'base (car keep-mach)))
-+ (drop (cdr keep-mach))
-+ (keep? (map (lambda (m) (memq m keep)) mach-list))
-+ (all? (memq 'all keep))
-+ (drop? (map (lambda (m) (memq m drop)) mach-list)))
-+ (any-true? (map (lambda (k d)
-+ ;; keep if K(ept) or ALL? and not D(ropped)
-+ (->bool (and (or k all?) (not d))))
-+ keep? drop?))))
-+)
-+
-+;; Return non-#f if the object containing ATLIST is to be kept.
-+;; OBJ is the container object or #f if there is none.
-+;; The object is kept if its attribute list specifies a `MACH' that is
-+;; kept (and not dropped) or does not have the `MACH' attribute (which means
-+;; it has the default value which means it's for use with all machines).
-+
-+(define (keep-mach-atlist? atlist obj)
-+ ;; The MACH attribute is not created until the .cpu file is read in which
-+ ;; is too late for us [we will get called for builtin objects].
-+ ;; Thus we peek inside the attribute list directly.
-+ ;; ??? Maybe postpone creation of builtins until after define-arch?
-+ (let ((machs (atlist-attr-value-no-default atlist 'MACH obj)))
-+ (if (null? machs)
-+ #t
-+ (keep-mach? machs)))
-+)
-+
-+;; Return a boolean indicating if the object containing ATLIST is to be kept.
-+;; OBJ is the container object or #f if there is none.
-+;; The object is kept if both its isa and its mach are kept.
-+
-+(define (keep-atlist? atlist obj)
-+ (and (keep-mach-atlist? atlist obj)
-+ (keep-isa-atlist? atlist obj))
-+)
-+
-+;; Return a boolean indicating if multiple cpu families are being kept.
-+
-+(define (keep-multiple?)
-+ (let ((selected-machs (find (lambda (mach)
-+ (keep-mach? (list (obj:name mach))))
-+ (current-mach-list))))
-+ (not (all-true? (map (lambda (mach)
-+ (eq? (obj:name (mach-cpu mach))
-+ (obj:name (mach-cpu (car selected-machs)))))
-+ selected-machs))))
-+)
-+
-+;; Return a boolean indicating if everything is kept.
-+
-+(define (keep-all?)
-+ (equal? (reader-keep-mach CURRENT-READER) /keep-all-machs)
-+)
-+
-+;; Ensure all cpu families were kept, necessary for generating files that
-+;; encompass the entire architecture.
-+
-+(define (assert-keep-all)
-+ (if (not (keep-all?))
-+ (error "no can do, all cpu families not selected"))
-+ *UNSPECIFIED*
-+)
-+
-+;; Ensure exactly one cpu family was kept, necessary for generating files that
-+;; are specific to one cpu family.
-+
-+(define (assert-keep-one)
-+ (if (keep-multiple?)
-+ (error "no can do, multiple cpu families selected"))
-+ *UNSPECIFIED*
-+)
-+
-+;; `keep-isa' processing.
-+
-+;; Cover proc to set `keep-isa'.
-+;; ISA-NAME-LIST is a comma separated string of isas to keep.
-+;; ??? We don't support the !drop notation of keep-mach processing.
-+;; Perhaps we should as otherwise there are two different styles the user
-+;; has to remember. On the other hand, !drop support is moderately complicated,
-+;; and it can be added in an upward compatible manner later.
-+
-+(define (/keep-isa-set! isa-name-list)
-+ (let ((isa-name-list (map string->symbol (string-cut isa-name-list #\,))))
-+ (reader-set-keep-isa! CURRENT-READER isa-name-list)
-+ )
-+ *UNSPECIFIED*
-+)
-+
-+;; Validate the user-provided keep-isa list against the list of isas
-+;; specified in the .cpu file (in define-arch).
-+
-+(define (keep-isa-validate!)
-+ (let ((isa-names (cons 'all (current-arch-isa-name-list)))
-+ (keep-isa (reader-keep-isa CURRENT-READER)))
-+ (for-each (lambda (isa)
-+ (if (not (memq isa isa-names))
-+ (error "unknown isa to keep:" isa)))
-+ keep-isa)
-+ )
-+ *UNSPECIFIED*
-+)
-+
-+;; Return currently selected isa (there must be exactly one).
-+
-+(define (current-isa)
-+ (let ((keep-isa (reader-keep-isa CURRENT-READER)))
-+ (if (equal? keep-isa '(all))
-+ (let ((isas (current-isa-list)))
-+ (if (= (length isas) 1)
-+ (car isas)
-+ (error "multiple isas selected" keep-isa)))
-+ (if (= (length keep-isa) 1)
-+ (current-isa-lookup (car keep-isa))
-+ (error "multiple isas selected" keep-isa))))
-+)
-+
-+;; Return #t if an isa in ISA-LIST, a list of symbols, is to be kept.
-+;; If any isa in ISA-LIST is to be kept, the result is #t.
-+;; If ISA-LIST is the empty list (no particular isa specified) use the default
-+;; isa.
-+
-+(define (keep-isa? isa-list)
-+ ;; If unspecified, the default is the first one in the list.
-+ (if (null? isa-list)
-+ (set! isa-list (list (car (current-arch-isa-name-list)))))
-+
-+ (let* ((keep (reader-keep-isa CURRENT-READER))
-+ (keep? (map (lambda (i)
-+ (or (memq i keep)
-+ (memq 'all keep)))
-+ isa-list)))
-+ (any-true? keep?))
-+)
-+
-+;; Return #t if the object containing ATLIST is to be kept.
-+;; OBJ is the container object or #f if there is none.
-+;; The object is kept if its attribute list specifies an `ISA' that is
-+;; kept or does not have the `ISA' attribute (which means it has the default
-+;; value) and the default isa is being kept.
-+
-+(define (keep-isa-atlist? atlist obj)
-+ (let ((isas (atlist-attr-value atlist 'ISA obj)))
-+ (keep-isa? isas))
-+)
-+
-+;; Return non-#f if object OBJ is to be kept, according to its ISA attribute.
-+
-+(define (keep-isa-obj? obj)
-+ (keep-isa-atlist? (obj-atlist obj) obj)
-+)
-+
-+;; Return a boolean indicating if multiple isas are being kept.
-+
-+(define (keep-isa-multiple?)
-+ (let ((keep (reader-keep-isa CURRENT-READER)))
-+ (or (> (length keep) 1)
-+ (and (memq 'all keep)
-+ (> (length (current-arch-isa-name-list)) 1))))
-+)
-+
-+;; Return list of isa names currently being kept.
-+
-+(define (current-keep-isa-name-list)
-+ (reader-keep-isa CURRENT-READER)
-+)
-+
-+;; Tracing support.
-+;; This is akin to the "logit" support, but is for specific things that
-+;; can be named (whereas logit support is based on a simple integer verbosity
-+;; level).
-+
-+;;; Enable the specified tracing.
-+;;; TRACE-OPTIONS is a comma-separated list of things to trace.
-+;;;
-+;;; Currently supported tracing:
-+;;; commands - trace invocation of description file commands (e.g. define-insn)
-+;;; pmacros - trace pmacro expansion
-+;;; all - trace everything
-+;;;
-+;;; [If we later need to support disabling some tracing, one way is to
-+;;; recognize an "-" in front of an option.]
-+
-+(define (/set-trace-options! trace-options)
-+ (let ((all (list "commands" "pmacros"))
-+ (requests (string-cut trace-options #\,)))
-+ (if (member "all" requests)
-+ (append! requests all))
-+ (for-each (lambda (item)
-+ (cond ((string=? "commands" item)
-+ (reader-set-trace-commands?! CURRENT-READER #t))
-+ ((string=? "pmacros" item)
-+ (reader-set-trace-pmacros?! CURRENT-READER #t))
-+ ((string=? "all" item)
-+ #t) ;; handled above
-+ (else
-+ (cgen-usage 'unknown (string-append "-t " item)
-+ common-arguments))))
-+ requests))
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; Diagnostic support.
-+
-+;;; Enable the specified diagnostics.
-+;;; DIAGNOSTIC-OPTIONS is a comma-separated list of things to trace.
-+;;;
-+;;; Currently supported diagnostics:
-+;;; iformat - issue diagnostics for iformat issues
-+;;; all - turn on all diagnostics
-+;;;
-+;;; [If we later need to support disabling some diagnostic, one way is to
-+;;; recognize an "-" in front of an option.]
-+
-+(define (/set-diagnostic-options! diagnostic-options)
-+ (let ((all (list "iformat"))
-+ (requests (string-cut diagnostic-options #\,)))
-+ (if (member "all" requests)
-+ (append! requests all))
-+ (for-each (lambda (item)
-+ (cond ((string=? "iformat" item)
-+ (reader-set-verify-iformat?! CURRENT-READER #t))
-+ ((string=? "all" item)
-+ #t) ;; handled above
-+ (else
-+ (cgen-usage 'unknown (string-append "-w " item)
-+ common-arguments))))
-+ requests))
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; If #f, treat reserved fields as operands and extract them with the insn.
-+;; Code can then be emitted in the extraction routines to validate them.
-+;; If #t, treat reserved fields as part of the opcode.
-+;; This complicates the decoding process as these fields have to be
-+;; checked too.
-+;; ??? Unimplemented.
-+
-+(define option:reserved-as-opcode? #f)
-+
-+;; Process options passed in on the command line.
-+;; OPTIONS is a space separated string of name=value values.
-+;; Each application is required to provide: option-init!, option-set!.
-+
-+(define (set-cgen-options! options)
-+ (option-init!)
-+ (for-each (lambda (opt)
-+ (if (null? opt)
-+ #t ;; ignore extraneous spaces
-+ (let ((name (string->symbol (car opt)))
-+ (value (cdr opt)))
-+ (logit 1 "Setting option `" name "' to \""
-+ (apply string-append value) "\".\n")
-+ (option-set! name value))))
-+ (map (lambda (opt) (string-cut opt #\=))
-+ (string-cut options #\space)))
-+)
-+
-+;; Application specific object creation support.
-+;;
-+;; Each entry in the .cpu file has a basic container class.
-+;; Each application adds functionality by subclassing the container
-+;; and registering with set-for-new! the proper class to create.
-+;; ??? Not sure this is the best way to handle this, but it does keep the
-+;; complexity down while not requiring as dynamic a language as I had before.
-+;; ??? Class local variables would provide a more efficient way to do this.
-+;; Assuming one wants to continue on this route.
-+
-+(define /cpu-new-class-list nil)
-+
-+(define (set-for-new! parent child)
-+ (set! /cpu-new-class-list (acons parent child /cpu-new-class-list))
-+)
-+
-+;; Lookup the class registered with set-for-new!
-+;; If none registered, return PARENT.
-+
-+(define (lookup-for-new parent)
-+ (let ((child (assq-ref /cpu-new-class-list parent)))
-+ (if child
-+ child
-+ parent))
-+)
-+
-+;; .cpu file loader support
-+
-+;; #t if an error was found (but processing continued)
-+(define /continuable-error-found? #f)
-+
-+;; Initialize a new <reader> object.
-+;; This doesn't add cgen-specific commands, leaving each element (ifield,
-+;; hardware, etc.) to add their own.
-+;; The "result" is stored in global CURRENT-READER.
-+
-+(define (/init-reader!)
-+ (set! CURRENT-READER (new <reader>))
-+
-+ (set! /CGEN-RTL-VERSION /default-rtl-version)
-+
-+ (set! /continuable-error-found? #f)
-+
-+ (reader-add-command! 'define-rtl-version
-+ "Specify the RTL version being used.\n"
-+ nil '(major minor) /cmd-define-rtl-version)
-+
-+ (reader-add-command! 'include
-+ "Include a file.\n"
-+ nil '(file) /cmd-include)
-+ (reader-add-command! 'if
-+ "(if test then . else)\n"
-+ nil '(test then . else) /cmd-if)
-+
-+ ;; Rather than add cgen-internal specific stuff to pmacros.scm, we create
-+ ;; the pmacro commands here.
-+ (pmacros-init! /default-rtl-version)
-+ (reader-add-command! 'define-pmacro
-+ "\
-+Define a preprocessor-style macro.
-+"
-+ nil '(name arg1 . arg-rest) define-pmacro)
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; Called at the end of .cpu file loading.
-+
-+(define (/finish-reader! file)
-+ (if /continuable-error-found?
-+ (error (string-append "Error loading " file)))
-+ *UNSPECIFIED*
-+)
-+
-+;; Prepare to parse a .cpu file.
-+;; This initializes the application independent tables.
-+;; KEEP-MACH specifies what machs to keep.
-+;; KEEP-ISA specifies what isas to keep.
-+;; OPTIONS is a list of options to control code generation.
-+;; The values are application dependent.
-+
-+(define (/init-parse-cpu! keep-mach keep-isa options)
-+ (set! /cpu-new-class-list nil)
-+
-+ (set! CURRENT-ARCH (new <arch>))
-+ (/keep-mach-set! keep-mach)
-+ (/keep-isa-set! keep-isa)
-+ (set-cgen-options! options)
-+
-+ ;; The order here is important.
-+ (arch-init!) ;; Must be done first.
-+ (enum-init!)
-+ (attr-init!)
-+ (types-init!)
-+ (mach-init!)
-+ (model-init!)
-+ (mode-init!)
-+ (ifield-init!)
-+ (hardware-init!)
-+ (operand-init!)
-+ (insn-init!)
-+ (minsn-init!)
-+ (rtl-init!)
-+ (rtl-c-init!)
-+ (utils-init!)
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; Install any builtin objects.
-+;; This is deferred until define-arch is read.
-+;; One reason is that attributes MACH and ISA don't exist until then.
-+
-+(define (reader-install-builtin!)
-+ ;; The order here is important.
-+ (attr-builtin!)
-+ (enum-builtin!)
-+ (mode-builtin!)
-+ (ifield-builtin!)
-+ (hardware-builtin!)
-+ (operand-builtin!)
-+ ;; This is mainly for the insn attributes.
-+ (insn-builtin!)
-+ (rtl-builtin!)
-+ *UNSPECIFIED*
-+)
-+
-+;; Do anything necessary for the application independent parts after parsing
-+;; a .cpu file.
-+;; The lists get cons'd in reverse order. One thing this does is change them
-+;; back to file order, it makes things easier for the human viewer.
-+
-+(define (/finish-parse-cpu!)
-+ ;; The order here is generally the reverse of init-parse-cpu!.
-+ (rtl-finish!)
-+ (minsn-finish!)
-+ (insn-finish!)
-+ (operand-finish!)
-+ (hardware-finish!)
-+ (ifield-finish!)
-+ (mode-finish!)
-+ (model-finish!)
-+ (mach-finish!)
-+ (types-finish!)
-+ (attr-finish!)
-+ (enum-finish!)
-+ (arch-finish!) ;; Must be done last.
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; Perform a global error checking pass after the .cpu file has been read in.
-+
-+(define (/global-error-checks)
-+ ;; ??? None yet.
-+ ;; TODO:
-+ ;; - all hardware elements with same name must have same rank and
-+ ;; compatible modes (which for now means same float mode or all int modes)
-+ #f
-+)
-+
-+;; .cpu file include mechanism
-+;; If FILE is not an absolute path, prepend ARCH-PATH.
-+
-+(define (/cmd-include file)
-+ (let ((full-path (if (eq? (string-ref file 0) #\/)
-+ file
-+ (string-append arch-path "/" file))))
-+ (logit 1 "Including file " full-path " ...\n")
-+ (reader-read-file! full-path)
-+ (logit 2 "Resuming previous file ...\n"))
-+ *UNSPECIFIED*
-+)
-+
-+;; Version of `if' invokable at the top level of a description file.
-+;; This is a work-in-progress. Its presence in the description file is ok,
-+;; but the implementation will need to evolve.
-+
-+(define (/cmd-if test then . else)
-+ (if (> (length else) 1)
-+ (parse-error #f
-+ "wrong number of arguments to `if'"
-+ (cons 'if (cons test (cons then else)))))
-+
-+ (let ((etest (/reader-expand test (or (location-property test)
-+ (unspecified-location)))))
-+
-+ ;; ??? rtx-eval etest
-+ (if (or (not (pair? etest))
-+ (not (memq (car etest)
-+ '(keep-isa? keep-mach? application-is? rtl-version-equal? rtl-version-at-least?))))
-+ (parse-error #f
-+ "only (if (keep-mach?|keep-isa?|application-is?|rtl-version-equal?|rtl-version-at-least? ...) ...) are currently supported"
-+ etest))
-+
-+ (let ((do-then
-+ (case (car etest)
-+ ((keep-isa?) (keep-isa? (cadr etest)))
-+ ((keep-mach?) (keep-mach? (cadr etest)))
-+ ((application-is?) (eq? APPLICATION (cadr etest)))
-+ ((rtl-version-equal?)
-+ (if (/rtl-version-valid? (cdr etest))
-+ (rtl-version-equal? (cadr etest) (caddr etest))
-+ (parse-error #f "invalid rtl version" (cdr etest))))
-+ ((rtl-version-at-least?)
-+ (if (/rtl-version-valid? (cdr etest))
-+ (rtl-version-at-least? (cadr etest) (caddr etest))
-+ (parse-error #f "invalid rtl version" (cdr etest)))))))
-+
-+ (if do-then
-+ (begin
-+ (logit 3 "Processing then clause: " then "\n")
-+ (reader-process! then))
-+ (if (null? else)
-+ *UNSPECIFIED*
-+ (begin
-+ (logit 3 "Processing else clause: " (car else) "\n")
-+ (reader-process! (car else)))))))
-+)
-+
-+;; Top level routine for loading .cpu files.
-+;; FILE is the name of the .cpu file to load.
-+;; KEEP-MACH is a string of comma separated machines to keep
-+;; (or not keep if prefixed with !).
-+;; KEEP-ISA is a string of comma separated isas to keep.
-+;; OPTIONS is the OPTIONS argument to -init-parse-cpu!.
-+;; TRACE-OPTIONS is a random list of things to trace.
-+;; DIAGNOSTIC-OPTIONS is a random list of things to warn/error about.
-+;; APP-INITER! is an application specific zero argument proc (thunk)
-+;; to call after -init-parse-cpu!
-+;; APP-FINISHER! is an application specific zero argument proc to call after
-+;; -finish-parse-cpu!
-+;; ANALYZER! is a zero argument proc to call after loading the .cpu file.
-+;; It is expected to set up various tables and things useful for the application
-+;; in question.
-+;;
-+;; This function isn't local because it's used by dev.scm.
-+
-+(define (cpu-load file keep-mach keep-isa options
-+ trace-options diagnostic-options
-+ app-initer! app-finisher! analyzer!)
-+ (/init-reader!)
-+ (/init-parse-cpu! keep-mach keep-isa options)
-+ (/set-trace-options! trace-options)
-+ (/set-diagnostic-options! diagnostic-options)
-+ (app-initer!)
-+ (logit 1 "Loading cpu description " file " ...\n")
-+ (logit 1 "machs: " keep-mach "\n")
-+ (logit 1 "isas: " keep-isa "\n")
-+ (logit 1 "options: " options "\n")
-+ (logit 1 "trace: " trace-options "\n")
-+ (logit 1 "diags: " diagnostic-options "\n")
-+ (set! arch-path (dirname file))
-+ (reader-read-file! file)
-+ (/finish-parse-cpu!)
-+ (/finish-reader! file)
-+ (logit 1 "Processing cpu description " file " ...\n")
-+ (app-finisher!)
-+ (/global-error-checks)
-+ (analyzer!)
-+ *UNSPECIFIED*
-+)
-+
-+;; Argument parsing utilities.
-+
-+;; Generate a usage message.
-+;; ERRTYPE is one of 'help, 'unknown, 'missing.
-+;; OPTION is the option that had the error or "" if ERRTYPE is 'help.
-+
-+(define (cgen-usage errtype option arguments)
-+ (let ((cep (current-error-port)))
-+ (case errtype
-+ ((help) #f)
-+ ((unknown) (display (string-append "Unknown option: " option "\n") cep))
-+ ((missing) (display (string-append "Missing argument: " option "\n") cep))
-+ (else (display "Unknown error!\n" cep)))
-+ (display "Usage: cgen arguments ...\n" cep)
-+ (for-each (lambda (arg)
-+ (display (string-append
-+ (let ((arg-str (string-append (car arg) " "
-+ (or (cadr arg) ""))))
-+ (if (< (string-length arg-str) 16)
-+ (string-take 16 arg-str)
-+ arg-str))
-+ " - " (caddr arg)
-+ (apply string-append
-+ (map (lambda (text)
-+ (string-append "\n"
-+ (string-take 20 "")
-+ text))
-+ (cdddr arg)))
-+ "\n")
-+ cep))
-+ arguments)
-+ (display "...\n" cep)
-+ (case errtype
-+ ((help) (quit 0))
-+ ((unknown missing) (quit 1))
-+ (else (quit 2))))
-+)
-+
-+;; Poor man's getopt.
-+;; [We don't know where to find the real one until we've parsed the args,
-+;; and this isn't something we need to get too fancy about anyways.]
-+;; The result is always ((a . b) . c).
-+;; If the argument is valid, the result is ((opt-spec . arg) . remaining-argv),
-+;; or (('unknown . option) . remaining-argv) if `option' isn't recognized,
-+;; or (('missing . option) . remaining argv) if `option' is missing a required
-+;; argument,
-+;; or ((#f . #f) . #f) if there are no more arguments.
-+;; OPT-SPEC is a list of option specs.
-+;; Each element is an alist of at least 3 elements: option argument help-text.
-+;; `option' is a string or symbol naming the option. e.g. -a, --help, "-i".
-+;; symbols are supported for backward compatibility, -i is a complex number.
-+;; `argument' is a string naming the argument or #f if the option takes no
-+;; arguments.
-+;; `help-text' is a string that is printed with the usage information.
-+;; Elements beyond `help-text' are ignored.
-+
-+(define (/getopt argv opt-spec)
-+ (if (null? argv)
-+ (cons (cons #f #f) #f)
-+ (let ((opt (assoc (car argv) opt-spec)))
-+ (cond ((not opt) (cons (cons 'unknown (car argv)) (cdr argv)))
-+ ((and (cadr opt) (null? (cdr argv)))
-+ (cons (cons 'missing (car argv)) (cdr argv)))
-+ ((cadr opt) (cons (cons opt (cadr argv)) (cddr argv)))
-+ (else ;; must be option that doesn't take an argument
-+ (cons (cons opt #f) (cdr argv))))))
-+)
-+
-+;; Return (cadr args) or print a pretty error message if not possible.
-+
-+(define (option-arg args)
-+ (if (and (pair? args) (pair? (cdr args)))
-+ (cadr args)
-+ (parse-error (make-prefix-context "option processing")
-+ "missing argument to"
-+ (car args)))
-+)
-+
-+;; List of common arguments.
-+;;
-+;; ??? Another useful arg would be one that says "do file generation with
-+;; arguments specified up til now, then continue with next batch of args".
-+
-+(define common-arguments
-+ '(("-a" "arch-file" "specify path of .cpu file to load")
-+ ("-b" #f "use debugging evaluator, for backtraces")
-+ ("-d" #f "start interactive debugging session")
-+ ("-f" "flags" "specify a set of flags to control code generation")
-+ ("-h" #f "print usage information")
-+ ("--help" #f "print usage information")
-+ ("-i" "isa-list" "specify isa-list entries to keep")
-+ ("-m" "mach-list" "specify mach-list entries to keep")
-+ ("-s" "srcdir" "set srcdir")
-+ ("-t" "trace-options" "specify list of things to trace"
-+ "Options:"
-+ "commands - trace cgen commands (e.g. define-insn)"
-+ "pmacros - trace pmacro expansion"
-+ "all - trace everything")
-+ ("-v" #f "increment verbosity level")
-+ ("-w" "diagnostic-options" "specify list of things to issue diagnostics about"
-+ "Options:"
-+ "iformat - verify instruction formats are valid"
-+ "all - turn on all diagnostics")
-+
-+ ("--version" #f "print version info")
-+ )
-+)
-+
-+;; Default place to look.
-+;; This gets overridden to point to the directory of the loaded .cpu file.
-+;; ??? Ideally this would be local to this file.
-+
-+(define arch-path (string-append srcdir "/cpu"))
-+
-+;; Accessors for application option specs
-+
-+(define (opt-get-first-pass opt)
-+ (or (list-ref opt 3) (lambda args #f)))
-+(define (opt-get-second-pass opt)
-+ (or (list-ref opt 4) (lambda args #f)))
-+
-+;; Parse options and call generators.
-+;; ARGS is a #:keyword delimited list of arguments.
-+;; #:app-name name
-+;; #:arg-spec optspec ;; FIXME: rename to #:opt-spec
-+;; #:init init-routine
-+;; #:finish finish-routine
-+;; #:analyze analysis-routine
-+;; #:argv command-line-arguments
-+;;
-+;; ARGSPEC is a list of (option option-arg comment option-handler) elements.
-+;; OPTION-HANDLER is either (lambda () ...) or (lambda (arg) ...) and
-+;; processes the option.
-+
-+(define /cgen
-+ (lambda args
-+ (let ((app-name "unknown")
-+ (opt-spec nil)
-+ (app-init! (lambda () #f))
-+ (app-finish! (lambda () #f))
-+ (app-analyze! (lambda () #f))
-+ (argv (list "cgen"))
-+ )
-+ (let loop ((args args))
-+ (if (not (null? args))
-+ (case (car args)
-+ ((#:app-name) (begin
-+ (set! app-name (option-arg args))
-+ (loop (cddr args))))
-+ ((#:arg-spec) (begin
-+ (set! opt-spec (option-arg args))
-+ (loop (cddr args))))
-+ ((#:init) (begin
-+ (set! app-init! (option-arg args))
-+ (loop (cddr args))))
-+ ((#:finish) (begin
-+ (set! app-finish! (option-arg args))
-+ (loop (cddr args))))
-+ ((#:analyze) (begin
-+ (set! app-analyze! (option-arg args))
-+ (loop (cddr args))))
-+ ((#:argv) (begin
-+ (set! argv (option-arg args))
-+ (loop (cddr args))))
-+ (else (error "cgen: unknown argument" (car args))))))
-+
-+ ;; ARGS has been processed, now we can process ARGV.
-+
-+ (let (
-+ (opt-spec (append common-arguments opt-spec))
-+ (app-args nil) ;; application's args are queued here
-+ (repl? #f)
-+ (arch-file #f)
-+ (keep-mach "all") ;; default is all machs
-+ (keep-isa "all") ;; default is all isas
-+ (flags "")
-+ (moreopts? #t)
-+ (debugging #f) ;; default is off, for speed
-+ (trace-options "")
-+ (diagnostic-options "")
-+ (cep (current-error-port))
-+ (str=? string=?)
-+ )
-+
-+ (let loop ((argv (cdr argv)))
-+ (let* ((new-argv (/getopt argv opt-spec))
-+ (opt (caar new-argv))
-+ (arg (cdar new-argv)))
-+ (case opt
-+ ((#f) (set! moreopts? #f))
-+ ((unknown) (cgen-usage 'unknown arg opt-spec))
-+ ((missing) (cgen-usage 'missing arg opt-spec))
-+ (else
-+ (cond ((str=? "-a" (car opt))
-+ (set! arch-file arg)
-+ )
-+ ((str=? "-b" (car opt))
-+ (set! debugging #t)
-+ )
-+ ((str=? "-d" (car opt))
-+ (let ((prompt (string-append "cgen-" app-name "> ")))
-+ (set! repl? #t)
-+ (set-repl-prompt! prompt)
-+ (if (feature? 'readline)
-+ (set-readline-prompt! prompt))
-+ ))
-+ ((str=? "-f" (car opt))
-+ (set! flags arg)
-+ )
-+ ((str=? "-h" (car opt))
-+ (cgen-usage 'help "" opt-spec)
-+ )
-+ ((str=? "--help" (car opt))
-+ (cgen-usage 'help "" opt-spec)
-+ )
-+ ((str=? "-i" (car opt))
-+ (set! keep-isa arg)
-+ )
-+ ((str=? "-m" (car opt))
-+ (set! keep-mach arg)
-+ )
-+ ((str=? "-s" (car opt))
-+ #f ;; ignore, already processed by caller
-+ )
-+ ((str=? "-t" (car opt))
-+ (set! trace-options arg)
-+ )
-+ ((str=? "-v" (car opt))
-+ (verbose-inc!)
-+ )
-+ ((str=? "-w" (car opt))
-+ (set! diagnostic-options arg)
-+ )
-+ ((str=? "--version" (car opt))
-+ (begin
-+ (display "Cpu tools GENerator version ")
-+ (display (cgen-major))
-+ (display ".")
-+ (display (cgen-minor))
-+ (display ".")
-+ (display (cgen-fixlevel))
-+ (newline)
-+ (display "RTL version ")
-+ (display (cgen-rtl-major))
-+ (display ".")
-+ (display (cgen-rtl-minor))
-+ (newline)
-+ (quit 0)
-+ ))
-+ ;; Else this is an application specific option.
-+ (else
-+ ;; Record it for later processing. Note that they're
-+ ;; recorded in reverse order (easier). This is undone
-+ ;; later.
-+ (set! app-args (acons opt arg app-args)))
-+ )))
-+ (if moreopts? (loop (cdr new-argv)))
-+ )
-+ ) ;; end of loop
-+
-+ ;; All arguments have been parsed.
-+
-+ (cgen-call-with-debugging
-+ debugging
-+ (lambda ()
-+
-+ (if (not arch-file)
-+ (error "-a option missing, no architecture specified"))
-+
-+ (if repl?
-+ (debug-repl nil))
-+
-+ (cpu-load arch-file
-+ keep-mach keep-isa flags
-+ trace-options diagnostic-options
-+ app-init! app-finish! app-analyze!)
-+
-+ ;; Start another repl loop if -d.
-+ ;; Awkward. Both places are useful, though this is more useful.
-+ (if repl?
-+ (debug-repl nil))
-+
-+ ;; Done with processing the arguments. Application arguments
-+ ;; are processed in two passes. This is because the app may
-+ ;; have arguments that specify things that affect file
-+ ;; generation (e.g. to specify another input file) and we
-+ ;; don't want to require an ordering of the options.
-+ (for-each (lambda (opt-arg)
-+ (let ((opt (car opt-arg))
-+ (arg (cdr opt-arg)))
-+ (if (cadr opt)
-+ ((opt-get-first-pass opt) arg)
-+ ((opt-get-first-pass opt)))))
-+ (reverse app-args))
-+
-+ (for-each (lambda (opt-arg)
-+ (let ((opt (car opt-arg))
-+ (arg (cdr opt-arg)))
-+ (if (cadr opt)
-+ ((opt-get-second-pass opt) arg)
-+ ((opt-get-second-pass opt)))))
-+ (reverse app-args))))
-+ )
-+ )
-+ #f) ;; end of lambda
-+)
-+
-+;; Main entry point called by application file generators.
-+
-+(define cgen
-+ (lambda args
-+ (cgen-debugging-stack-start /cgen args))
-+)
-diff -Nur binutils-2.24.orig/cgen/rtl-c.scm binutils-2.24/cgen/rtl-c.scm
---- binutils-2.24.orig/cgen/rtl-c.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/rtl-c.scm 2016-06-30 21:26:12.669893734 +0200
-@@ -0,0 +1,1948 @@
-+; RTL->C translation support.
-+; Copyright (C) 2000, 2005, 2009, 2010 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; Generating C from RTL
-+; ---------------------
-+; The main way to generate C code from an RTL expression is:
-+;
-+; (rtl-c-parsed mode isa-name-list nil '(func mode ...))
-+;
-+; E.g.
-+; (rtl-c-parsed SI (all) nil '(add () SI (const () SI 1) (const () SI 2)))
-+; -->
-+; "ADDSI (1, 2)"
-+;
-+; The expression is in source form and must be already canonicalized (with
-+; rtx-canonicalize). There is also rtl-c for the occasions where the rtl
-+; isn't already canonicalized.
-+;
-+; The `set' rtx needs to be handled a little carefully.
-+; Both the dest and src are processed first, and then code to perform the
-+; assignment is computed. However, the dest may require more than a simple
-+; C assignment. Therefore set dests are converted to the specified object
-+; (e.g. a hardware operand) and then a message is sent to this object to
-+; perform the actual code generation.
-+;
-+; All interesting operands (e.g. regs, mem) are `operand' objects.
-+; The following messages must be supported by operand objects.
-+; - get-mode - return mode of operand
-+; - cxmake-get - return <c-expr> object containing operand's value
-+; - gen-set-quiet - return string of C code to set operand's value (no tracing)
-+; - gen-set-trace - return string of C code to set operand's value
-+;
-+; Instruction fields are refered to by name.
-+; Instruction ifields must have these methods:
-+; - get-mode
-+; - cxmake-get
-+;
-+; Conventions used in this file:
-+; - see rtl.scm
-+
-+; The <c-expr> object.
-+; This is a fully translated expression (i.e. C code).
-+
-+(define <c-expr>
-+ (class-make '<c-expr> nil
-+ '(
-+ ; The mode of C-CODE.
-+ mode
-+ ; The translated C code.
-+ c-code
-+ ; The source expression, for debugging.
-+ expr
-+ ; Attributes of the expression.
-+ atlist
-+ ; List of temporaries required to compute the expression.
-+ ; ??? wip. These would be combined as the expression is
-+ ; built up. Then in sets and other statements, the temporaries
-+ ; would be declared.
-+ ;(tmps . nil)
-+ )
-+ nil)
-+)
-+
-+(method-make!
-+ <c-expr> 'make!
-+ (lambda (self mode c-code atlist)
-+ ; FIXME: Extend COS to allow specifying member predicates.
-+ (assert (mode? mode))
-+ (assert (string? c-code))
-+ ;(assert (atlist? atlist)) ; FIXME: What should this be?
-+ (elm-set! self 'mode mode)
-+ (elm-set! self 'c-code c-code)
-+ (elm-set! self 'atlist atlist)
-+ self)
-+)
-+
-+; Accessor fns
-+
-+(define cx:mode (elm-make-getter <c-expr> 'mode))
-+(define cx:c-code (elm-make-getter <c-expr> 'c-code))
-+(define cx:expr (elm-make-getter <c-expr> 'expr))
-+(define cx:atlist (elm-make-getter <c-expr> 'atlist))
-+;(define cx:tmps (elm-make-getter <c-expr> 'tmps))
-+
-+; Any object with attributes requires the get-atlist method.
-+
-+(method-make! <c-expr> 'get-atlist (lambda (self) (elm-get self 'atlist)))
-+
-+; Respond to 'get-mode messages.
-+
-+(method-make! <c-expr> 'get-mode (lambda (self) (elm-get self 'mode)))
-+
-+; Respond to 'get-name messages for rtx-dump.
-+
-+(method-make!
-+ <c-expr> 'get-name
-+ (lambda (self)
-+ (string-append "(" (obj:str-name (elm-get self 'mode)) ") "
-+ (cx:c self)))
-+)
-+
-+; Return C code to perform an assignment.
-+; NEWVAL is a <c-expr> object of the value to be assigned to SELF.
-+
-+(method-make! <c-expr> 'gen-set-quiet
-+ (lambda (self estate mode indx selector newval)
-+ (string-append " " (cx:c self) " = " (cx:c newval) ";\n"))
-+)
-+
-+(method-make! <c-expr> 'gen-set-trace
-+ (lambda (self estate mode indx selector newval)
-+ (string-append " " (cx:c self) " = " (cx:c newval) ";\n"))
-+)
-+
-+; Return the C code of CX.
-+; ??? This used to handle lazy evaluation of the expression.
-+; Maybe it will again, so it's left in, as a cover fn to cx:c-code.
-+
-+(define (cx:c cx)
-+ (cx:c-code cx)
-+)
-+
-+; Main routine to create a <c-expr> node object.
-+; MODE is either the mode's symbol (e.g. 'QI) or a <mode> object.
-+; CODE is a string of C code.
-+
-+(define (cx:make mode code)
-+ (make <c-expr> (mode-maybe-lookup mode) code nil)
-+)
-+
-+; Make copy of CX in new mode MODE.
-+; MODE must be a <mode> object.
-+
-+(define (cx-new-mode mode cx)
-+ (make <c-expr> mode (cx:c cx) (cx:atlist cx))
-+)
-+
-+; Same as cx:make except with attributes.
-+
-+(define (cx:make-with-atlist mode code atlist)
-+ (make <c-expr> (mode-maybe-lookup mode) code atlist)
-+)
-+
-+; Return a boolean indicated if X is a <c-expr> object.
-+
-+(define (c-expr? x) (class-instance? <c-expr> x))
-+
-+; RTX environment support.
-+
-+(method-make!
-+ <rtx-temp> 'cxmake-get
-+ (lambda (self estate mode indx selector)
-+ (cx:make mode (rtx-temp-value self)))
-+)
-+
-+(method-make!
-+ <rtx-temp> 'gen-set-quiet
-+ (lambda (self estate mode indx selector src)
-+ (string-append " " (rtx-temp-value self) " = " (cx:c src) ";\n"))
-+)
-+
-+(method-make!
-+ <rtx-temp> 'gen-set-trace
-+ (lambda (self estate mode indx selector src)
-+ (string-append " " (rtx-temp-value self) " = " (cx:c src) ";\n"))
-+)
-+
-+(define (gen-temp-defs estate env)
-+ (string-map (lambda (temp)
-+ (let ((temp-obj (cdr temp)))
-+ (string-append " " (mode:c-type (rtx-temp-mode temp-obj))
-+ " " (rtx-temp-value temp-obj) ";\n")))
-+ env)
-+)
-+
-+; Top level routines to handle rtl->c translation.
-+
-+; rtl->c configuration parameters
-+
-+; #t -> emit calls to rtl cover fns, otherwise emit plain C where possible.
-+(define /rtl-c-rtl-cover-fns? #f)
-+
-+; Called before emitting code to configure the generator.
-+; ??? I think this can go away now (since cover-fn specification is also
-+; done at each call to rtl-c).
-+
-+(define (rtl-c-config! . args)
-+ (set! /rtl-c-rtl-cover-fns? #f)
-+ (let loop ((args args))
-+ (if (null? args)
-+ #f ; done
-+ (begin
-+ (case (car args)
-+ ((#:rtl-cover-fns?)
-+ (set! /rtl-c-rtl-cover-fns? (cadr args)))
-+ (else (error "rtl-c-config: unknown option:" (car args))))
-+ (loop (cddr args)))))
-+ *UNSPECIFIED*
-+)
-+
-+; Subclass of <eval-state> to record additional things needed for rtl->c.
-+
-+(define <rtl-c-eval-state>
-+ (class-make '<rtl-c-eval-state> '(<eval-state>)
-+ '(
-+ ; #t -> emit calls to rtl cover fns.
-+ (rtl-cover-fns? . #f)
-+
-+ ; name of output language, "c" or "c++"
-+ (output-language . "c")
-+
-+ ; #t if generating code for a macro.
-+ ; Each newline is then preceeded with '\\'.
-+ (macro? . #f)
-+
-+ ; Boolean indicating if evaluation is for an instruction.
-+ ; It's not always possible to look at OWNER, e.g. when we're
-+ ; processing semantic fragments.
-+ (for-insn? . #f)
-+
-+ ; #f -> reference ifield values using FLD macro.
-+ ; #t -> use C variables.
-+ ; ??? This is only needed to get correct ifield references
-+ ; in opcodes, decoder, and semantics. Maybe a better way to
-+ ; go would be to specify the caller's name so there'd be just
-+ ; one of these, rather than an increasing number. However,
-+ ; for now either way is the same.
-+ ; An alternative is to specify a callback to try first.
-+ (ifield-var? . #f)
-+ )
-+ nil)
-+)
-+
-+; FIXME: involves upcasting.
-+(define-getters <rtl-c-eval-state> estate
-+ (rtl-cover-fns? output-language macro? for-insn? ifield-var?)
-+)
-+
-+; Return booleans indicating if output language is C/C++.
-+
-+(define (estate-output-language-c? estate)
-+ (string=? (estate-output-language estate) "c")
-+)
-+(define (estate-output-language-c++? estate)
-+ (string=? (estate-output-language estate) "c++")
-+)
-+
-+(method-make!
-+ <rtl-c-eval-state> 'vmake!
-+ (lambda (self args)
-+ ; Initialize parent class first.
-+ (let loop ((args (send-next self '<rtl-c-eval-state> 'vmake! args))
-+ (unrecognized nil))
-+ (if (null? args)
-+ (reverse! unrecognized) ; ??? Could invoke method to initialize here.
-+ (begin
-+ (case (car args)
-+ ((#:rtl-cover-fns?)
-+ (elm-set! self 'rtl-cover-fns? (cadr args)))
-+ ((#:output-language)
-+ (elm-set! self 'output-language (cadr args)))
-+ ((#:macro?)
-+ (elm-set! self 'macro? (cadr args)))
-+ ((#:for-insn?)
-+ (elm-set! self 'for-insn? (cadr args)))
-+ ((#:ifield-var?)
-+ (elm-set! self 'ifield-var? (cadr args)))
-+ (else
-+ ; Build in reverse order, as we reverse it back when we're done.
-+ (set! unrecognized
-+ (cons (cadr args) (cons (car args) unrecognized)))))
-+ (loop (cddr args) unrecognized)))))
-+)
-+
-+;; Build an estate for use in generating C.
-+;; OVERRIDES is a #:keyword/value list of parameters to apply last.
-+
-+(define (estate-make-for-rtl-c overrides)
-+ (apply vmake
-+ (append!
-+ (list
-+ <rtl-c-eval-state>
-+ #:expr-fn (lambda (rtx-obj expr mode estate)
-+ (rtl-c-generator rtx-obj))
-+ #:rtl-cover-fns? /rtl-c-rtl-cover-fns?)
-+ overrides))
-+)
-+
-+; Translate RTL expression EXPR to C.
-+; ESTATE is the current rtx evaluation state.
-+; MODE is a <mode> object.
-+
-+(define (rtl-c-with-estate estate mode expr)
-+ (cx:c (rtl-c-get estate mode (rtx-eval-with-estate expr mode estate)))
-+)
-+
-+; Translate parsed RTL expression X to a string of C code.
-+; EXPR must have already been fed through rtx-canonicalize.
-+; MODE is the desired mode of the value or DFLT for "natural mode".
-+; MODE is a <mode> object.
-+; OVERRIDES is a #:keyword/value list of arguments to build the eval state
-+; with.
-+
-+(define (rtl-c-parsed mode expr . overrides)
-+ ;; ??? If we're passed insn-compiled-semantics the output of xops is
-+ ;; confusing. Fix by subclassing <operand> -> <xoperand>, and
-+ ;; have <xoperand> provide original source expr.
-+ (let ((estate (estate-make-for-rtl-c (cons #:outer-expr
-+ (cons expr overrides)))))
-+ (rtl-c-with-estate estate mode expr))
-+)
-+
-+; Same as rtl-c-parsed but EXPR is unparsed.
-+; ISA-NAME-LIST is the list of ISA(s) in which to evaluate EXPR.
-+; EXTRA-VARS-ALIST is an association list of extra (symbol <mode> value)
-+; elements to be used during value lookup.
-+; MODE is a <mode> object.
-+
-+(define (rtl-c mode isa-name-list extra-vars-alist expr . overrides)
-+ (let* ((canonical-rtl (rtx-canonicalize #f (obj:name mode)
-+ isa-name-list extra-vars-alist expr))
-+ (estate (estate-make-for-rtl-c (cons #:outer-expr
-+ (cons canonical-rtl overrides)))))
-+ (rtl-c-with-estate estate mode canonical-rtl))
-+)
-+
-+; Same as rtl-c-with-estate except return a <c-expr> object.
-+; MODE is a <mode> object.
-+
-+(define (rtl-c-expr-with-estate estate mode expr)
-+ (rtl-c-get estate mode (rtx-eval-with-estate expr mode estate))
-+)
-+
-+; Same as rtl-c-parsed except return a <c-expr> object.
-+; MODE is a <mode> object.
-+
-+(define (rtl-c-expr-parsed mode expr . overrides)
-+ ;; ??? If we're passed insn-compiled-semantics the output of xops is
-+ ;; confusing. Fix by subclassing <operand> -> <xoperand>, and
-+ ;; have <xoperand> provide original source expr.
-+ (let ((estate (estate-make-for-rtl-c (cons #:outer-expr
-+ (cons expr overrides)))))
-+ (rtl-c-expr-with-estate estate mode expr))
-+)
-+
-+; Same as rtl-c-expr-parsed but EXPR is unparsed.
-+; MODE is a <mode> object.
-+
-+(define (rtl-c-expr mode isa-name-list extra-vars-alist expr . overrides)
-+ (let* ((canonical-rtl (rtx-canonicalize #f (obj:name mode)
-+ isa-name-list extra-vars-alist expr))
-+ (estate (estate-make-for-rtl-c (cons #:outer-expr
-+ (cons canonical-rtl overrides)))))
-+ (rtl-c-expr-with-estate estate mode canonical-rtl))
-+)
-+
-+; C++ versions of rtl-c routines.
-+
-+; Build an estate for use in generating C++.
-+; OVERRIDES is a #:keyword/value list of parameters to apply last.
-+
-+(define (estate-make-for-rtl-c++ overrides)
-+ (estate-make-for-rtl-c (cons #:output-language (cons "c++" overrides)))
-+)
-+
-+; Translate parsed RTL expression X to a string of C++ code.
-+; EXPR must have already been fed through rtx-canonicalize.
-+; MODE is the desired mode of the value or DFLT for "natural mode".
-+; MODE is a <mode> object.
-+; OVERRIDES is a #:keyword/value list of arguments to build the eval state
-+; with.
-+
-+(define (rtl-c++-parsed mode expr . overrides)
-+ ;; ??? If we're passed insn-compiled-semantics the output of xops is
-+ ;; confusing. Fix by subclassing <operand> -> <xoperand>, and
-+ ;; have <xoperand> provide original source expr.
-+ (let ((estate (estate-make-for-rtl-c++ (cons #:outer-expr
-+ (cons expr overrides)))))
-+ (rtl-c-with-estate estate mode expr))
-+)
-+
-+; Same as rtl-c++-parsed but EXPR is unparsed.
-+; MODE is a <mode> object.
-+
-+(define (rtl-c++ mode isa-name-list extra-vars-alist expr . overrides)
-+ (let* ((canonical-rtl (rtx-canonicalize #f (obj:name mode)
-+ isa-name-list extra-vars-alist expr))
-+ (estate (estate-make-for-rtl-c++ (cons #:outer-expr
-+ (cons canonical-rtl overrides)))))
-+ (rtl-c-with-estate estate mode canonical-rtl))
-+)
-+
-+; Top level routines for getting/setting values.
-+
-+; Return a <c-expr> node to get the value of SRC in mode MODE.
-+; ESTATE is the current rtl evaluation state.
-+; MODE is a <mode> object.
-+; SRC is one of:
-+; - <c-expr> node
-+; - rtl expression (e.g. '(add WI dr sr))
-+; - sequence's local variable name
-+; - sequence's local variable object
-+; - operand name
-+; - operand object
-+; - an integer
-+; - a string of C code
-+; FIXME: Reduce acceptable values of SRC.
-+; The result has mode MODE, unless MODE is the "default mode indicator"
-+; (DFLT) in which case the mode of the result is derived from SRC.
-+;
-+; ??? mode compatibility checks are wip
-+
-+(define (/rtl-c-get estate mode src)
-+ (let ((mode mode)) ;;(mode:lookup mode)))
-+
-+ (cond ((c-expr? src)
-+ (cond ((or (mode:eq? 'VOID mode)
-+ (mode:eq? 'DFLT mode)
-+ (mode:eq? (cx:mode src) mode))
-+ src)
-+ ((rtx-mode-compatible? mode (cx:mode src))
-+ (cx-new-mode mode src))
-+ (else
-+ (estate-error
-+ estate
-+ (string-append "incompatible mode: "
-+ "(" (obj:str-name (cx:mode src)) " vs "
-+ (obj:str-name mode) ") in "
-+ "\"" (cx:c src) "\"")
-+ (obj:name mode)))))
-+
-+ ; The recursive call to /rtl-c-get is in case the result of rtx-eval
-+ ; is a hardware object, rtx-func object, or another rtl expression.
-+ ; FIXME: simplify
-+ ((rtx? src)
-+ (let ((evald-src (rtx-eval-with-estate src mode estate)))
-+ ; There must have been some change, otherwise we'll loop forever.
-+ (assert (not (eq? src evald-src)))
-+ (/rtl-c-get estate mode evald-src)))
-+
-+ ;; FIXME: Can we ever get a symbol here?
-+ ((or (and (symbol? src) (current-op-lookup src))
-+ (operand? src))
-+ (begin
-+ (if (symbol? src)
-+ (set! src (current-op-lookup src)))
-+ (cond ((mode:eq? 'DFLT mode)
-+ ; FIXME: Can we get called with 'DFLT anymore?
-+ ; FIXME: If we fetch the mode here, operands can assume
-+ ; they never get called with "default mode".
-+ (send src 'cxmake-get estate mode #f #f))
-+ ((rtx-mode-compatible? mode (op:mode src))
-+ (let ((mode (op:mode src))) ;; FIXME: (rtx-sem-mode mode)))
-+ (send src 'cxmake-get estate mode #f #f)))
-+ (else
-+ ;; FIXME: canonicalization should have already caught this
-+ (estate-error
-+ estate
-+ (string-append "operand " (obj:str-name src)
-+ " referenced in incompatible mode")
-+ (obj:name mode))))))
-+
-+ ;; FIXME: Can we ever get a symbol here?
-+ ((or (and (symbol? src) (rtx-temp-lookup (estate-env-stack estate) src))
-+ (rtx-temp? src))
-+ (begin
-+ (if (symbol? src)
-+ (set! src (rtx-temp-lookup (estate-env-stack estate) src)))
-+ (cond ((mode:eq? 'DFLT mode)
-+ (send src 'cxmake-get estate (rtx-temp-mode src) #f #f))
-+ ((rtx-mode-compatible? mode (rtx-temp-mode src))
-+ (let ((mode (rtx-temp-mode src))) ;; FIXME: (rtx-sem-mode mode)))
-+ (send src 'cxmake-get estate mode #f #f)))
-+ (else
-+ ;; FIXME: canonicalization should have already caught this
-+ (estate-error
-+ estate
-+ (string-append "sequence temp " (rtx-temp-name src)
-+ " referenced in incompatible mode")
-+ (obj:name mode))))))
-+
-+ ((integer? src)
-+ ; Default mode of integer argument is INT.
-+ (if (or (mode:eq? 'DFLT mode) (mode:eq? 'VOID mode))
-+ (cx:make INT (number->string src))
-+ (cx:make mode (number->string src))))
-+
-+ ((string? src)
-+ ; Default mode of string argument is INT.
-+ (if (or (mode:eq? 'DFLT mode) (mode:eq? 'VOID mode))
-+ (cx:make INT src)
-+ (cx:make mode src)))
-+
-+ (else (estate-error estate "/rtl-c-get: invalid argument" src))))
-+)
-+
-+;; MODE is either a <mode> object or the mode name.
-+
-+(define (rtl-c-get estate mode src)
-+ (let ((mode (mode-maybe-lookup mode)))
-+ (logit 4 (spaces (estate-depth estate))
-+ "(rtl-c-get " (mode-real-name mode) " " (rtx-strdump src) ")\n")
-+ (let ((result (/rtl-c-get estate mode src)))
-+ (logit 4 (spaces (estate-depth estate))
-+ "(rtl-c-get " (mode-real-name mode) " " (rtx-strdump src) ") => "
-+ (cx:c result) "\n")
-+ result))
-+)
-+
-+; Return a <c-expr> object to set the value of DEST to SRC.
-+; ESTATE is the current rtl evaluation state.
-+; MODE is the mode of DEST or DFLT which means fetch the real mode from DEST.
-+; MODE is either a <mode> object or the mode name.
-+; DEST is one of:
-+; - <c-expr> node
-+; - rtl expression (e.g. '(mem QI dr))
-+; SRC is an RTX expression. It is important that we evaluate it, instead of
-+; our caller, because only we know the mode of DEST (which we need to pass
-+; when evaluating SRC if MODE is DFLT). ??? Can no longer get DFLT, but
-+; it feels right to continue to evaluate SRC here.
-+; The mode of the result is always VOID (void).
-+;
-+; ??? One possible optimization is to pass the address of the result
-+; to the computation of SRC. Seems dodgey though.
-+
-+(define (rtl-c-set-quiet estate mode dest src)
-+ ;(display (list 'rtl-c-set-quiet mode dest src)) (newline)
-+ (let* ((mode (mode-maybe-lookup mode))
-+ (xdest (cond ((c-expr? dest)
-+ dest)
-+ ((rtx? dest)
-+ (rtx-eval-with-estate dest mode estate))
-+ (else
-+ (estate-error estate
-+ "rtl-c-set-quiet: invalid dest"
-+ dest)))))
-+ (assert (mode? mode))
-+ (if (not (object? xdest))
-+ (estate-error estate "rtl-c-set-quiet: invalid dest" dest))
-+ (cx:make VOID (send xdest 'gen-set-quiet
-+ estate mode #f #f
-+ (rtl-c-get estate mode src))))
-+)
-+
-+; Same as rtl-c-set-quiet except also print TRACE_RESULT message.
-+; MODE is either a <mode> object or the mode name.
-+; ??? One possible change is to defer the (rtl-c-get src) call to dest's
-+; set handler. Such sources would be marked accordingly and rtl-c-get
-+; would recognize them. This would allow, for example, passing the address
-+; of the result to the computation.
-+
-+(define (rtl-c-set-trace estate mode dest src)
-+ ;(display (list 'rtl-c-set-trace mode dest src)) (newline)
-+ (let* ((mode (mode-maybe-lookup mode))
-+ (xdest (cond ((c-expr? dest)
-+ dest)
-+ ((rtx? dest)
-+ (rtx-eval-with-estate dest mode estate))
-+ (else
-+ (estate-error estate
-+ "rtl-c-set-trace: invalid dest"
-+ dest)))))
-+ (assert (mode? mode))
-+ (if (not (object? xdest))
-+ (estate-error estate "rtl-c-set-trace: invalid dest" dest))
-+ (cx:make VOID (send xdest 'gen-set-trace
-+ estate mode #f #f
-+ (rtl-c-get estate mode src))))
-+)
-+
-+; Emit C code for each rtx function.
-+
-+; Table mapping rtx function to C generator.
-+
-+(define /rtl-c-gen-table #f)
-+
-+; Return the C generator for <rtx-func> F.
-+
-+(define (rtl-c-generator f)
-+ (vector-ref /rtl-c-gen-table (rtx-num f))
-+)
-+
-+; Support for explicit C/C++ code.
-+; MODE is the mode name.
-+; ??? Actually, "support for explicit foreign language code".
-+; s-c-call needs a better name but "unspec" seems like obfuscation.
-+; ??? Need to distinguish owner of call (cpu, ???).
-+
-+(define (s-c-call estate mode name . args)
-+ (cx:make mode
-+ (string-append
-+ (if (estate-output-language-c++? estate)
-+ (string-append "current_cpu->" name " (")
-+ ; FIXME: Prepend @cpu@_ to name here, and delete @cpu@_ from
-+ ; description file.
-+ (string-append name " (current_cpu"))
-+ (let ((c-args
-+ (string-map (lambda (arg)
-+ (string-append
-+ ", "
-+ (cx:c (rtl-c-get estate DFLT arg))))
-+ args)))
-+ (if (estate-output-language-c++? estate)
-+ (string-drop 2 c-args)
-+ c-args))
-+ ; If the mode is VOID, this is a statement.
-+ ; Otherwise it's an expression.
-+ ; ??? Bad assumption! VOID expressions may be used
-+ ; within sequences without local vars, which are translated
-+ ; to comma-expressions.
-+ (if (or (mode:eq? 'DFLT mode) ;; FIXME: can't get DFLT anymore
-+ (mode:eq? 'VOID mode))
-+ ");\n"
-+ ")")
-+ ))
-+)
-+
-+; Same as c-call except there is no particular owner of the call.
-+; In general this means making a call to a non-member function,
-+; whereas c-call makes calls to member functions (in C++ parlance).
-+; MODE is the mode name.
-+
-+(define (s-c-raw-call estate mode name . args)
-+ (cx:make mode
-+ (string-append
-+ name " ("
-+ (string-drop 2
-+ (string-map (lambda (elm)
-+ (string-append
-+ ", " (cx:c (rtl-c-get estate DFLT elm))))
-+ args))
-+ ; If the mode is VOID, this is a statement.
-+ ; Otherwise it's an expression.
-+ ; ??? Bad assumption! VOID expressions may be used
-+ ; within sequences without local vars, which are translated
-+ ; to comma-expressions.
-+ (if (or (mode:eq? 'DFLT mode) ;; FIXME: can't get DFLT anymore
-+ (mode:eq? 'VOID mode))
-+ ");\n"
-+ ")")
-+ ))
-+)
-+
-+; Standard arithmetic operations.
-+
-+; Return a boolean indicating if a cover function/macro should be emitted
-+; to perform an operation.
-+; C-OP is a string containing the C operation or #f if there is none.
-+; MODE is the mode of the operation.
-+
-+(define (/rtx-use-sem-fn? estate c-op mode)
-+ ; If no C operation has been provided, use a macro, or
-+ ; if this is the simulator and MODE is not a host mode, use a macro.
-+; (or (not c-op)
-+; (and (estate-rtl-cover-fns? estate)
-+; (not (mode:host? mode))))
-+ ; FIXME: The current definition is a temporary hack while host/target-ness
-+ ; of INT/UINT is unresolved.
-+ (and (not (obj-has-attr? mode 'FORCE-C))
-+ (or (not c-op)
-+ (and (estate-rtl-cover-fns? estate)
-+ ;; NOTE: We can't check (insn? (estate-owner estate)) here.
-+ ;; It's not necessarily present for semantic fragments.
-+ (or (estate-for-insn? estate)
-+ (not (mode:host? mode))))))
-+)
-+
-+; One operand referenced, result is in same mode.
-+; MODE is the mode name.
-+
-+(define (s-unop estate name c-op mode src)
-+ (let* ((val (rtl-c-get estate mode src))
-+ ; Refetch mode in case it was DFLT and ensure unsigned->signed.
-+ (mode (mode:lookup mode)) ;;(cx:mode val)) ;; FIXME: can't get DFLT anymore
-+ (sem-mode (rtx-sem-mode mode)))
-+ ; FIXME: Argument checking.
-+
-+ (if (/rtx-use-sem-fn? estate c-op mode)
-+ (if (mode-float? mode)
-+ (cx:make sem-mode
-+ (string-append "CGEN_CPU_FPU (current_cpu)->ops->"
-+ (string-downcase name)
-+ (string-downcase (obj:str-name sem-mode))
-+ " (CGEN_CPU_FPU (current_cpu), "
-+ (cx:c val) ")"))
-+ (cx:make sem-mode
-+ (string-append name (obj:str-name sem-mode)
-+ " (" (cx:c val) ")")))
-+ (cx:make mode ; not sem-mode on purpose
-+ (string-append "(" c-op " ("
-+ (cx:c val) "))"))))
-+)
-+
-+; Two operands referenced in the same mode producing a result in the same mode.
-+; MODE is the mode name.
-+;
-+; ??? Will eventually want to handle floating point modes specially. Since
-+; bigger modes may get clumsily passed (there is no pass by reference in C) and
-+; since we want to eventually handle lazy transformation, FP values could be
-+; passed by reference. This is easy in C++. C requires more work and is
-+; defered until it's warranted.
-+; Implementing this should probably be via a new cxmake-get-ref method,
-+; rather then complicating cxmake-get. Ditto for rtl-c-get-ref/rtl-c-get.
-+
-+(define (s-binop estate name c-op mode src1 src2)
-+ ;(display (list "binop " name ", mode " mode)) (newline)
-+ (let* ((val1 (rtl-c-get estate mode src1))
-+ ; Refetch mode in case it was DFLT and ensure unsigned->signed.
-+ (mode (mode:lookup mode)) ;;(cx:mode val1)) ;; FIXME: can't get DFLT anymore
-+ (sem-mode (rtx-sem-mode mode))
-+ (val2 (rtl-c-get estate mode src2)))
-+ ; FIXME: Argument checking.
-+
-+ (if (/rtx-use-sem-fn? estate c-op mode)
-+ (if (mode-float? mode)
-+ (cx:make sem-mode
-+ (string-append "CGEN_CPU_FPU (current_cpu)->ops->"
-+ (string-downcase name)
-+ (string-downcase (obj:str-name sem-mode))
-+ " (CGEN_CPU_FPU (current_cpu), "
-+ (cx:c val1) ", "
-+ (cx:c val2) ")"))
-+ (cx:make sem-mode
-+ (string-append name (obj:str-name sem-mode)
-+ " (" (cx:c val1) ", "
-+ (cx:c val2) ")")))
-+ (cx:make mode ; not sem-mode on purpose
-+ (string-append "(("
-+ (cx:c val1)
-+ ") " c-op " ("
-+ (cx:c val2)
-+ "))"))))
-+)
-+
-+; Same as s-binop except there's a third argument which is always one bit.
-+; MODE is the mode name.
-+
-+(define (s-binop-with-bit estate name mode src1 src2 src3)
-+ (let* ((val1 (rtl-c-get estate mode src1))
-+ ; Refetch mode in case it was DFLT and ensure unsigned->signed.
-+ (mode (mode:lookup mode)) ;;(cx:mode val1)) ;; FIXME: can't get DFLT anymore
-+ (sem-mode (rtx-sem-mode mode))
-+ (val2 (rtl-c-get estate mode src2))
-+ (val3 (rtl-c-get estate 'BI src3)))
-+ ; FIXME: Argument checking.
-+
-+ (cx:make mode
-+ (string-append name (obj:str-name sem-mode)
-+ " ("
-+ (cx:c val1) ", "
-+ (cx:c val2) ", "
-+ (cx:c val3)
-+ ")")))
-+)
-+
-+; Shift operations are slightly different than binary operations:
-+; the mode of src2 is any integral mode.
-+; MODE is the mode name.
-+; ??? Note that some cpus have a signed shift left that is semantically
-+; different from a logical one. May need to create `sla' some day. Later.
-+
-+(define (s-shop estate name c-op mode src1 src2)
-+ ;(display (list "shop " name ", mode " mode)) (newline)
-+ (let* ((val1 (rtl-c-get estate mode src1))
-+ ; Refetch mode in case it was DFLT and ensure unsigned->signed
-+ ; [sign of operation is determined from operation name, not mode].
-+ (mode (mode:lookup mode)) ;;(cx:mode val1)) ;; FIXME: can't get DFLT anymore
-+ (sem-mode (rtx-sem-mode mode))
-+ (val2 (rtl-c-get estate mode src2)))
-+ ; FIXME: Argument checking.
-+
-+ (if (/rtx-use-sem-fn? estate c-op mode)
-+ (cx:make sem-mode
-+ (string-append name (obj:str-name sem-mode)
-+ " (" (cx:c val1) ", "
-+ (cx:c val2) ")"))
-+ (cx:make mode ; not sem-mode on purpose
-+ (string-append "("
-+ ;; Ensure correct sign of shift.
-+ (cond ((equal? name "SRL")
-+ (string-append
-+ "("
-+ (cond ((mode-unsigned? mode) (mode:c-type mode))
-+ ((mode:eq? mode 'INT) (mode:c-type UINT))
-+ (else (mode:c-type (mode-find (mode:bits mode) 'UINT))))
-+ ") "))
-+ ((equal? name "SRA")
-+ (string-append
-+ "("
-+ (cond ((mode-signed? mode) (mode:c-type mode))
-+ ((mode:eq? mode 'UINT) (mode:c-type INT))
-+ (else (mode:c-type (mode-find (mode:bits mode) 'INT))))
-+ ") "))
-+ ;; May wish to make this unsigned if not
-+ ;; already. Later.
-+ (else ""))
-+ "(" (cx:c val1) ") "
-+ c-op
-+ " (" (cx:c val2) "))"))))
-+)
-+
-+; Process andif, orif.
-+; SRC1 and SRC2 have any arithmetic mode.
-+; MODE is the mode name.
-+; The result has mode BI.
-+; ??? May want to use INT as BI may introduce some slowness
-+; in the generated code.
-+
-+(define (s-boolifop estate name c-op src1 src2)
-+ (let* ((val1 (rtl-c-get estate DFLT src1))
-+ (val2 (rtl-c-get estate DFLT src2)))
-+ ; FIXME: Argument checking.
-+
-+ ; If this is the simulator and MODE is not a host mode, use a macro.
-+ ; ??? MODE here being the mode of SRC1. Maybe later.
-+ (if (estate-rtl-cover-fns? estate)
-+ (cx:make (mode:lookup 'BI)
-+ (string-append name ; "BI", leave off mode, no need for it
-+ " (" (cx:c val1) ", "
-+ (cx:c val2) ")"))
-+ (cx:make (mode:lookup 'BI)
-+ (string-append "(("
-+ (cx:c val1)
-+ ") " c-op " ("
-+ (cx:c val2)
-+ "))"))))
-+)
-+
-+;; Process fp predicates, e.g. nan, qnan, snan.
-+;; SRC-MODE is the mode name of SRC.
-+;; The result has mode BI.
-+
-+(define (s-float-predop estate name src-mode src)
-+ (let* ((val (rtl-c-get estate src-mode src))
-+ (mode (cx:mode val))
-+ (sem-mode (rtx-sem-mode mode)))
-+ ;; FIXME: Argument checking.
-+
-+ (if (not (mode-float? mode))
-+ (estate-error estate "non floating-point mode" src-mode))
-+
-+ (cx:make (mode:lookup 'BI)
-+ (string-append "CGEN_CPU_FPU (current_cpu)->ops->"
-+ (string-downcase name)
-+ (string-downcase (obj:str-name sem-mode))
-+ " (CGEN_CPU_FPU (current_cpu), "
-+ (cx:c val) ")")))
-+)
-+
-+;; Integer mode conversions.
-+;; MODE is the mode name.
-+
-+(define (s-int-convop estate name mode s1)
-+ ;; Get S1 in its normal mode, then convert.
-+ (let ((s (rtl-c-get estate DFLT s1))
-+ (mode (mode:lookup mode)))
-+ (if (and (not (estate-rtl-cover-fns? estate))
-+ (mode:host? (cx:mode s)))
-+ (cx:make mode
-+ (string-append "((" (obj:str-name mode) ")"
-+ " (" (obj:str-name (cx:mode s)) ")"
-+ " (" (cx:c s) "))"))
-+ (cx:make mode
-+ (string-append name
-+ (obj:str-name (rtx-sem-mode (cx:mode s)))
-+ (obj:str-name (rtx-sem-mode mode))
-+ " (" (cx:c s) ")"))))
-+)
-+
-+;; Floating point mode conversions.
-+;; MODE is the mode name.
-+
-+(define (s-float-convop estate name mode how1 s1)
-+ ;; Get S1 in its normal mode, then convert.
-+ (let ((s (rtl-c-get estate DFLT s1))
-+ (mode (mode:lookup mode))
-+ (how (rtl-c-get estate DFLT how1)))
-+ (if (and (not (estate-rtl-cover-fns? estate))
-+ (mode:host? (cx:mode s)))
-+ (cx:make mode
-+ (string-append "((" (obj:str-name mode) ")"
-+ " (" (obj:str-name (cx:mode s)) ")"
-+ " (" (cx:c s) "))"))
-+ (cx:make mode
-+ (string-append "CGEN_CPU_FPU (current_cpu)->ops->"
-+ (string-downcase name)
-+ (string-downcase (obj:str-name (rtx-sem-mode (cx:mode s))))
-+ (string-downcase (obj:str-name (rtx-sem-mode mode)))
-+ " (CGEN_CPU_FPU (current_cpu), "
-+ (cx:c how) ", "
-+ (cx:c s) ")"))))
-+)
-+
-+; Compare SRC1 and SRC2 in mode MODE.
-+; NAME is one of eq,ne,lt,le,gt,ge,ltu,leu,gtu,geu.
-+; MODE is the mode name.
-+; The result has mode BI.
-+; ??? May want a host int mode result as BI may introduce some slowness
-+; in the generated code.
-+
-+(define (s-cmpop estate name c-op mode src1 src2)
-+ (let* ((val1 (rtl-c-get estate mode src1))
-+ ; Refetch mode in case it was DFLT.
-+ (mode (mode:lookup mode)) ;;(cx:mode val1)) ;; FIXME: can't get DFLT anymore
-+ (val2 (rtl-c-get estate mode src2)))
-+ ; FIXME: Argument checking.
-+
-+ ; If no C operation has been provided, use a macro, or
-+ ; if this is the simulator and MODE is not a host mode, use a macro.
-+ (if (/rtx-use-sem-fn? estate c-op mode)
-+ (if (mode-float? mode)
-+ (cx:make (mode:lookup 'BI)
-+ (string-append "CGEN_CPU_FPU (current_cpu)->ops->"
-+ (string-downcase (symbol->string name))
-+ (string-downcase (obj:str-name (rtx-sem-mode mode)))
-+ " (CGEN_CPU_FPU (current_cpu), "
-+ (cx:c val1) ", "
-+ (cx:c val2) ")"))
-+ (cx:make (mode:lookup 'BI)
-+ (string-append (string-upcase (symbol->string name))
-+ (if (memq name '(eq ne))
-+ (obj:str-name (rtx-sem-mode mode))
-+ (obj:str-name mode))
-+ " (" (cx:c val1) ", "
-+ (cx:c val2) ")")))
-+ (cx:make (mode:lookup 'BI)
-+ (string-append "(("
-+ (cx:c val1)
-+ ") " c-op " ("
-+ (cx:c val2)
-+ "))"))))
-+)
-+
-+; Conditional execution.
-+
-+; `if' in RTL has a result, like ?: in C.
-+; We support both: one with a result (non VOID mode), and one without (VOID mode).
-+; The non-VOID case must have an else part.
-+; MODE is the mode of the result, not the comparison.
-+; MODE is the mode name.
-+; The comparison is expected to return a zero/non-zero value.
-+; ??? Perhaps this should be a syntax-expr. Later.
-+
-+(define (s-if estate mode cond then . else)
-+ (if (> (length else) 1)
-+ (estate-error estate "if: too many elements in `else' part" else))
-+ (let ()
-+ (if (or (mode:eq? 'DFLT mode) ;; FIXME: can't get DFLT anymore
-+ (mode:eq? 'VOID mode))
-+ (cx:make mode
-+ (string-append "if (" (cx:c (rtl-c-get estate DFLT cond)) ")"
-+ " {\n" (cx:c (rtl-c-get estate mode then)) "}"
-+ (if (not (null? else))
-+ (string-append " else {\n"
-+ (cx:c (rtl-c-get estate mode (car else)))
-+ "}\n")
-+ "\n")
-+ ))
-+ (if (= (length else) 1)
-+ (cx:make mode
-+ (string-append "(("
-+ (cx:c (rtl-c-get estate DFLT cond))
-+ ") ? ("
-+ (cx:c (rtl-c-get estate mode then))
-+ ") : ("
-+ (cx:c (rtl-c-get estate mode (car else)))
-+ "))"))
-+ (estate-error estate "non-void-mode `if' must have `else' part"))))
-+)
-+
-+; A multiway `if'.
-+; MODE is the mode name.
-+; If MODE is VOID emit a series of if/else's.
-+; If MODE is not VOID, emit a series of ?:'s.
-+; COND-CODE-LIST is a list of lists, each sublist is a list of two elements:
-+; condition, code. The condition part must return a zero/non-zero value, and
-+; the code part is treated as a `sequence'.
-+; This defer argument evaluation, the syntax
-+; ((... condition ...) ... action ...)
-+; needs special parsing.
-+; FIXME: Need more error checking of arguments.
-+
-+(define (s-cond estate mode . cond-code-list)
-+ ;; FIXME: can't get DFLT anymore
-+ (let ((vm? (or (mode:eq? 'DFLT mode) (mode:eq? 'VOID mode))))
-+ (if (null? cond-code-list)
-+ (estate-error estate "empty `cond'"))
-+ (let ((if-part (if vm? "if (" "("))
-+ (then-part (if vm? ") " ") ? "))
-+ (elseif-part (if vm? " else if (" " : ("))
-+ (else-part (if vm? " else " " : "))
-+ (fi-part (if vm? "" ")")))
-+ (let loop ((result
-+ (string-append
-+ if-part
-+ (cx:c (rtl-c-get estate DFLT (caar cond-code-list)))
-+ then-part
-+ (cx:c (apply s-sequence
-+ (cons estate
-+ (cons mode
-+ (cons nil
-+ (cdar cond-code-list))))))))
-+ (ccl (cdr cond-code-list)))
-+ (cond ((null? ccl) (cx:make mode result))
-+ ((eq? (caar ccl) 'else)
-+ (cx:make mode
-+ (string-append
-+ result
-+ else-part
-+ (cx:c (apply s-sequence
-+ (cons estate
-+ (cons mode
-+ (cons nil
-+ (cdar ccl)))))))))
-+ (else (loop (string-append
-+ result
-+ elseif-part
-+ (cx:c (rtl-c-get estate DFLT (caar ccl)))
-+ then-part
-+ (cx:c (apply s-sequence
-+ (cons estate
-+ (cons mode
-+ (cons nil
-+ (cdar ccl)))))))
-+ (cdr ccl)))))))
-+)
-+
-+; Utility of s-case to print a case prefix (for lack of a better term).
-+
-+(define (/gen-case-prefix val)
-+ (string-append " case "
-+ (cond ((number? val)
-+ (number->string val))
-+ ((symbol? val)
-+ (string-upcase (gen-c-symbol val))) ; yes, upcase
-+ ((string? val) val)
-+ (else
-+ (parse-error (make-prefix-context "case:")
-+ "bad case" val)))
-+ " : ")
-+)
-+
-+; Utility of s-case to handle a void result.
-+
-+(define (s-case-vm estate test case-list)
-+ (cx:make
-+ VOID
-+ (string-append
-+ " switch ("
-+ (cx:c (rtl-c-get estate DFLT test))
-+ ")\n"
-+ " {\n"
-+ (string-map (lambda (case-entry)
-+ (let ((caseval (car case-entry))
-+ (code (cdr case-entry)))
-+ (string-append
-+ (cond ((list? caseval)
-+ (string-map /gen-case-prefix caseval))
-+ ((eq? 'else caseval)
-+ (string-append " default : "))
-+ (else
-+ (/gen-case-prefix caseval)))
-+ (cx:c (apply s-sequence
-+ (cons estate (cons VOID (cons nil code)))))
-+ " break;\n")))
-+ case-list)
-+ " }\n"))
-+)
-+
-+; Utility of s-case-non-vm to generate code to perform the test.
-+; MODE is the mode name.
-+
-+(define (/gen-non-vm-case-test estate mode test cases)
-+ (assert (not (null? cases)))
-+ (let loop ((result "") (cases cases))
-+ (if (null? cases)
-+ result
-+ (let ((case (cond ((number? (car cases))
-+ (car cases))
-+ ((symbol? (car cases))
-+ (if (enum-lookup-val (car cases))
-+ (rtx-make 'enum mode (car cases))
-+ (estate-error estate
-+ "symbol not an enum"
-+ (car cases))))
-+ (else
-+ (estate-error estate "invalid case" (car cases))))))
-+ (loop (string-append
-+ result
-+ (if (= (string-length result) 0)
-+ ""
-+ " || ")
-+ (cx:c (rtl-c-get estate mode test))
-+ " == "
-+ (cx:c (rtl-c-get estate mode case)))
-+ (cdr cases)))))
-+)
-+
-+; Utility of s-case to handle a non-void result.
-+; This is expanded as a series of ?:'s.
-+; MODE is the mode name.
-+
-+(define (s-case-non-vm estate mode test case-list)
-+ (let ((if-part "(")
-+ (then-part ") ? ")
-+ (elseif-part " : (")
-+ (else-part " : ")
-+ (fi-part ")"))
-+ (let loop ((result
-+ (string-append
-+ if-part
-+ (/gen-non-vm-case-test estate mode test (caar case-list))
-+ then-part
-+ (cx:c (apply s-sequence
-+ (cons estate
-+ (cons mode
-+ (cons nil
-+ (cdar case-list))))))))
-+ (cl (cdr case-list)))
-+ (cond ((null? cl) (cx:make mode result))
-+ ((eq? (caar cl) 'else)
-+ (cx:make mode
-+ (string-append
-+ result
-+ else-part
-+ (cx:c (apply s-sequence
-+ (cons estate
-+ (cons mode
-+ (cons nil
-+ (cdar cl)))))))))
-+ (else (loop (string-append
-+ result
-+ elseif-part
-+ (/gen-non-vm-case-test estate mode test (caar cl))
-+ then-part
-+ (cx:c (apply s-sequence
-+ (cons estate
-+ (cons mode
-+ (cons nil
-+ (cdar cl)))))))
-+ (cdr cl))))))
-+)
-+
-+; C switch statement
-+; To follow convention, MODE is the first arg.
-+; MODE is the mode name.
-+; FIXME: What to allow for case choices is wip.
-+
-+(define (s-case estate mode test . case-list)
-+ ;; FIXME: can't get DFLT anymore
-+ (if (or (mode:eq? 'DFLT mode) (mode:eq? 'VOID mode))
-+ (s-case-vm estate test case-list)
-+ (s-case-non-vm estate mode test case-list))
-+)
-+
-+; Parallels and Sequences
-+
-+; Temps for `parallel' are recorded differently than for `sequence'.
-+; ??? I believe this is because there was an interaction between the two.
-+
-+(define /par-temp-list nil)
-+
-+; Record a temporary needed for a parallel in mode MODE.
-+; We just need to record the mode with a unique name so we use a <c-expr>
-+; object where the "expression" is the variable's name.
-+
-+(define (/par-new-temp! mode)
-+ (set! /par-temp-list
-+ (cons (cx:make mode (string-append "temp"
-+ (number->string
-+ (length /par-temp-list))))
-+ /par-temp-list))
-+ (car /par-temp-list)
-+)
-+
-+; Return the next temp from the list, and leave the list pointing to the
-+; next one.
-+
-+(define (/par-next-temp!)
-+ (let ((result (car /par-temp-list)))
-+ (set! /par-temp-list (cdr /par-temp-list))
-+ result)
-+)
-+
-+(define (/gen-par-temp-defns temp-list)
-+ ;(display temp-list) (newline)
-+ (string-append
-+ " "
-+ ; ??? mode:c-type
-+ (string-map (lambda (temp) (string-append (obj:str-name (cx:mode temp))
-+ " " (cx:c temp) ";"))
-+ temp-list)
-+ "\n")
-+)
-+
-+;; Parallels are handled by converting them into two sequences. The first has
-+;; all set destinations replaced with temps, and the second has all set sources
-+;; replaced with those temps.
-+
-+;; rtl-traverse expr-fn to replace the dest of sets with the parallel temp.
-+
-+(define (/par-replace-set-dest-expr-fn rtx-obj expr parent-expr op-pos
-+ tstate appstuff)
-+ (case (car expr)
-+ ((set set-quiet)
-+ (let ((name (rtx-name expr))
-+ (options (rtx-options expr))
-+ (mode (rtx-mode expr))
-+ (dest (rtx-set-dest expr))
-+ (src (rtx-set-src expr)))
-+ (list name options mode (/par-new-temp! mode) src)))
-+ (else #f))
-+)
-+
-+;; rtl-traverse expr-fn to replace the src of sets with the parallel temp.
-+;; This must process expressions in the same order as /par-replace-set-dests.
-+
-+(define (/par-replace-set-src-expr-fn rtx-obj expr parent-expr op-pos
-+ tstate appstuff)
-+ (case (car expr)
-+ ((set set-quiet)
-+ (let ((name (rtx-name expr))
-+ (options (rtx-options expr))
-+ (mode (rtx-mode expr))
-+ (dest (rtx-set-dest expr))
-+ (src (rtx-set-src expr)))
-+ (list name options mode dest (/par-next-temp!))))
-+ (else #f))
-+)
-+
-+;; Return a <c-expr> node for a `parallel'.
-+
-+(define (s-parallel estate . exprs)
-+ (begin
-+
-+ ;; Initialize /par-temp-list for /par-replace-set-dests.
-+ (set! /par-temp-list nil)
-+
-+ (let* ((set-dest-exprs
-+ ;; Use map-in-order because we need temp creation and usage to
-+ ;; follow the same order.
-+ (map-in-order (lambda (expr)
-+ (rtx-traverse (estate-context estate)
-+ (estate-owner estate)
-+ expr
-+ /par-replace-set-dest-expr-fn
-+ #f))
-+ exprs))
-+ (set-dests (string-map (lambda (expr)
-+ (rtl-c-with-estate estate VOID expr))
-+ set-dest-exprs))
-+ (temps (reverse! /par-temp-list)))
-+
-+ ;; Initialize /par-temp-list for /par-replace-set-srcs.
-+ (set! /par-temp-list temps)
-+
-+ (let* ((set-src-exprs
-+ ;; Use map-in-order because we need temp creation and usage to
-+ ;; follow the same order.
-+ (map-in-order (lambda (expr)
-+ (rtx-traverse (estate-context estate)
-+ (estate-owner estate)
-+ expr
-+ /par-replace-set-src-expr-fn
-+ #f))
-+ exprs))
-+ (set-srcs (string-map (lambda (expr)
-+ (rtl-c-with-estate estate VOID expr))
-+ set-src-exprs)))
-+
-+ (cx:make VOID
-+ (string-append
-+ ;; ??? do {} while (0); doesn't get "optimized out"
-+ ;; internally by gcc, meaning two labels and a loop are
-+ ;; created for it to have to process. We can generate pretty
-+ ;; big files and can cause gcc to require *lots* of memory.
-+ ;; So let's try just {} ...
-+ "{\n"
-+ (/gen-par-temp-defns temps)
-+ set-dests
-+ set-srcs
-+ "}\n")
-+ ))))
-+)
-+
-+;; Subroutine of s-sequence to simplify it.
-+;; Return a boolean indicating if GCC's "statement expression" extension
-+;; is necessary to implement (sequence MODE ENV EXPR-LIST).
-+;; Only use GCC "statement expression" extension if necessary.
-+;;
-+;; Avoid using statement expressions for
-+;; (sequence non-VOID-mode (error "mumble") expr).
-+;; Some targets, e.g. cris, use this.
-+
-+(define (/use-gcc-stmt-expr? mode env expr-list)
-+ (if (not (rtx-env-empty? env))
-+ #t
-+ (case (length expr-list)
-+ ((1) #f)
-+ ((2) (if (eq? (rtx-name (car expr-list)) 'error)
-+ #f
-+ #t))
-+ (else #t)))
-+)
-+
-+;; Return a <c-expr> node for a `sequence'.
-+;; MODE is the mode name.
-+
-+(define (s-sequence estate mode env . exprs)
-+ (let* ((env (rtx-env-make-locals env)) ;; compile env
-+ (estate (estate-push-env estate env)))
-+
-+ (if (or (mode:eq? 'DFLT mode) ;; FIXME: DFLT can't appear anymore
-+ (mode:eq? 'VOID mode))
-+
-+ (cx:make VOID
-+ (string-append
-+ ;; ??? do {} while (0); doesn't get "optimized out"
-+ ;; internally by gcc, meaning two labels and a loop are
-+ ;; created for it to have to process. We can generate pretty
-+ ;; big files and can cause gcc to require *lots* of memory.
-+ ;; So let's try just {} ...
-+ "{\n"
-+ (gen-temp-defs estate env)
-+ (string-map (lambda (e)
-+ (rtl-c-with-estate estate VOID e))
-+ exprs)
-+ "}\n"))
-+
-+ (let ((use-stmt-expr? (/use-gcc-stmt-expr? mode env exprs)))
-+ (cx:make mode
-+ (string-append
-+ (if use-stmt-expr? "({ " "(")
-+ (gen-temp-defs estate env)
-+ (string-drop 2
-+ (string-map
-+ (lambda (e)
-+ (string-append
-+ (if use-stmt-expr? "; " ", ")
-+ ;; Strip off gratuitous ";\n" at end of expressions that
-+ ;; misguessed themselves to be in statement context.
-+ ;; See s-c-call, s-c-call-raw above.
-+ (let ((substmt (rtl-c-with-estate estate DFLT e)))
-+ (if (and (not use-stmt-expr?)
-+ (string=? (string-take -2 substmt) ";\n"))
-+ (string-drop -2 substmt)
-+ substmt))))
-+ exprs))
-+ (if use-stmt-expr? "; })" ")"))))))
-+)
-+
-+; Return a <c-expr> node for a `do-count'.
-+
-+(define (s-do-count estate iter-var nr-times . exprs)
-+ (let* ((limit-var (rtx-make-iteration-limit-var iter-var))
-+ (env (rtx-env-make-iteration-locals iter-var))
-+ (estate (estate-push-env estate env))
-+ (temp-iter (rtx-temp-lookup (estate-env-stack estate) iter-var))
-+ (temp-limit (rtx-temp-lookup (estate-env-stack estate) limit-var))
-+ (c-iter-var (rtx-temp-value temp-iter))
-+ (c-limit-var (rtx-temp-value temp-limit)))
-+ (cx:make VOID
-+ (string-append
-+ "{\n"
-+ (gen-temp-defs estate env)
-+ " " c-limit-var " = "
-+ (cx:c (rtl-c-get estate (rtx-temp-mode temp-limit) nr-times))
-+ ";\n"
-+ " for (" c-iter-var " = 0;\n"
-+ " " c-iter-var " < " c-limit-var ";\n"
-+ " ++" c-iter-var ")\n"
-+ " {\n"
-+ (string-map (lambda (e)
-+ (rtl-c-with-estate estate VOID e))
-+ exprs)
-+ " }\n"
-+ "}\n"))
-+ )
-+)
-+
-+; *****************************************************************************
-+;
-+; RTL->C generators for each rtx function.
-+
-+; Return code to set FN as the generator for RTX.
-+
-+(defmacro define-fn (rtx args expr . rest)
-+ `(begin
-+ (assert (rtx-lookup (quote ,rtx)))
-+ (vector-set! table (rtx-num (rtx-lookup (quote ,rtx)))
-+ (lambda ,args ,@(cons expr rest))))
-+)
-+
-+(define (rtl-c-init!)
-+ (set! /rtl-c-gen-table (/rtl-c-build-table))
-+ *UNSPECIFIED*
-+)
-+
-+; The rest of this file is one big function to return the rtl->c lookup table.
-+; For each of these functions, MODE is the name of the mode.
-+
-+(define (/rtl-c-build-table)
-+ (let ((table (make-vector (rtx-max-num) #f)))
-+
-+; Error generation
-+
-+(define-fn error (*estate* options mode message)
-+ (let ((c-call (s-c-call *estate* mode "cgen_rtx_error"
-+ (string-append "\""
-+ (backslash "\"" message)
-+ "\""))))
-+ (if (mode:eq? mode VOID)
-+ c-call
-+ (cx:make mode (string-append "(" (cx:c c-call) ", 0)"))))
-+)
-+
-+; Enum support
-+
-+(define-fn enum (*estate* options mode name)
-+ (cx:make mode (string-upcase (gen-c-symbol name)))
-+)
-+
-+; Instruction field support.
-+; ??? This should build an operand object like -build-ifield-operand! does
-+; in semantics.scm.
-+
-+(define-fn ifield (*estate* options mode ifld-name)
-+ (if (estate-ifield-var? *estate*)
-+ (cx:make mode (gen-c-symbol ifld-name))
-+ (cx:make mode (string-append "FLD (" (gen-c-symbol ifld-name) ")")))
-+; (let ((f (current-ifld-lookup ifld-name)))
-+; (make <operand> (obj-location f) ifld-name ifld-name
-+; (atlist-cons (bool-attr-make 'SEM-ONLY #t)
-+; (obj-atlist f))
-+; (obj:name (ifld-hw-type f))
-+; (obj:name (ifld-mode f))
-+; (make <hw-index> 'anonymous
-+; 'ifield (ifld-mode f) f)
-+; nil #f #f))
-+)
-+
-+;; Operand support.
-+
-+(define-fn operand (*estate* options mode object-or-name)
-+ (cond ((operand? object-or-name)
-+ ;; FIXME: <operand> objects is what xop is for
-+ ;; mode checking to be done during canonicalization
-+ object-or-name)
-+ ((symbol? object-or-name)
-+ (let ((object (current-op-lookup object-or-name)))
-+ (if (not object)
-+ (estate-error *estate* "undefined operand" object-or-name))
-+ ;; mode checking to be done during canonicalization
-+ object))
-+ (else
-+ (estate-error *estate* "bad arg to `operand'" object-or-name)))
-+)
-+
-+(define-fn xop (*estate* options mode object)
-+ (let ((delayed (assoc '#:delay (estate-modifiers *estate*))))
-+ (if (and delayed
-+ (equal? APPLICATION 'SID-SIMULATOR)
-+ (operand? object))
-+ ;; if we're looking at an operand inside a (delay ...) rtx, then we
-+ ;; are talking about a _delayed_ operand, which is a different
-+ ;; beast. rather than try to work out what context we were
-+ ;; constructed within, we just clone the operand instance and set
-+ ;; the new one to have a delayed value. the setters and getters
-+ ;; will work it out.
-+ (let ((obj (object-copy object))
-+ (amount (cadr delayed)))
-+ (op:set-delay! obj amount)
-+ obj)
-+ ;; else return the normal object
-+ object)))
-+
-+(define-fn local (*estate* options mode object-or-name)
-+ (cond ((rtx-temp? object-or-name)
-+ object-or-name)
-+ ((symbol? object-or-name)
-+ (let ((object (rtx-temp-lookup (estate-env-stack *estate*) object-or-name)))
-+ (if (not object)
-+ (estate-error *estate* "undefined local" object-or-name))
-+ object))
-+ (else
-+ (estate-error *estate* "bad arg to `local'" object-or-name)))
-+)
-+
-+(define-fn reg (*estate* options mode hw-elm . indx-sel)
-+ (let ((indx (or (list-maybe-ref indx-sel 0) 0))
-+ (sel (or (list-maybe-ref indx-sel 1) hw-selector-default)))
-+ (s-hw *estate* mode hw-elm indx sel))
-+)
-+
-+(define-fn raw-reg (*estate* options mode hw-elm . indx-sel)
-+ (let ((indx (or (list-maybe-ref indx-sel 0) 0))
-+ (sel (or (list-maybe-ref indx-sel 1) hw-selector-default)))
-+ (let ((result (s-hw *estate* mode hw-elm indx sel)))
-+ (obj-cons-attr! result (bool-attr-make 'RAW #t))
-+ result))
-+)
-+
-+(define-fn mem (*estate* options mode addr . sel)
-+ (s-hw *estate* mode 'h-memory addr
-+ (if (pair? sel) (car sel) hw-selector-default))
-+)
-+
-+; ??? Hmmm... needed? The pc is usually specified as `pc' which is shorthand
-+; for (operand pc).
-+;(define-fn pc (*estate* options mode)
-+; s-pc
-+;)
-+
-+(define-fn ref (*estate* options mode name)
-+ (if (not (insn? (estate-owner *estate*)))
-+ (estate-error *estate* "ref: not processing an insn"
-+ (obj:name (estate-owner *estate*))))
-+ (cx:make 'UINT
-+ (string-append
-+ "(referenced & (1 << "
-+ (number->string
-+ (op:num (insn-lookup-op (estate-owner *estate*) name)))
-+ "))"))
-+)
-+
-+; ??? Maybe this should return an operand object.
-+(define-fn index-of (*estate* options mode op)
-+ (send (op:index (rtx-eval-with-estate op DFLT *estate*))
-+ 'cxmake-get *estate* (mode:lookup mode))
-+)
-+
-+(define-fn clobber (*estate* options mode object)
-+ (cx:make VOID "; /*clobber*/\n")
-+)
-+
-+(define-fn delay (*estate* options mode num-node rtx)
-+ ;; FIXME: Try to move SID stuff into sid-foo.scm.
-+ (case APPLICATION
-+ ((SID-SIMULATOR)
-+ (let* ((n (cadddr num-node))
-+ (old-delay (let ((old (assoc '#:delay (estate-modifiers *estate*))))
-+ (if old (cadr old) 0)))
-+ (new-delay (+ n old-delay)))
-+ (begin
-+ ;; check for proper usage
-+ (if (let* ((hw (case (car rtx)
-+ ((operand) (op:type (current-op-lookup (rtx-arg1 rtx))))
-+ ((xop) (op:type (rtx-xop-obj rtx)))
-+ (else #f))))
-+ (not (and hw (or (pc? hw) (memory? hw) (register? hw)))))
-+ (estate-error
-+ *estate*
-+ "(delay ...) rtx applied to wrong type of operand, should be pc, register or memory"
-+ (car rtx)))
-+ ;; signal an error if we're delayed and not in a "parallel-insns" CPU
-+ (if (not (with-parallel?))
-+ (estate-error *estate* "delayed operand in a non-parallel cpu"
-+ (car rtx)))
-+ ;; update cpu-global pipeline bound
-+ (cpu-set-max-delay! (current-cpu) (max (cpu-max-delay (current-cpu)) new-delay))
-+ ;; pass along new delay to embedded rtx
-+ (rtx-eval-with-estate rtx (mode:lookup mode)
-+ (estate-with-modifiers *estate* `((#:delay ,new-delay)))))))
-+
-+ ;; not in sid-land
-+ (else (s-sequence (estate-with-modifiers *estate* '((#:delay))) VOID '() rtx)))
-+)
-+
-+; Gets expanded as a macro.
-+;(define-fn annul (*estate* yes?)
-+; (s-c-call *estate* 'VOID "SEM_ANNUL_INSN" "pc" yes?)
-+;)
-+
-+(define-fn skip (*estate* options mode yes?)
-+ (send pc 'cxmake-skip *estate* yes?)
-+ ;(s-c-call *estate* 'VOID "SEM_SKIP_INSN" "pc" yes?)
-+)
-+
-+(define-fn eq-attr (*estate* options mode obj attr-name value)
-+ (cx:make 'INT
-+ (string-append "(GET_ATTR ("
-+ (gen-c-symbol attr-name)
-+ ") == "
-+ (gen-c-symbol value)
-+ ")"))
-+)
-+
-+(define-fn int-attr (*estate* options mode owner attr-name)
-+ (cond ((or (equal? owner '(current-insn () DFLT)) ;; FIXME: delete in time
-+ (equal? owner '(current-insn () INSN)))
-+ (s-c-raw-call *estate* 'INT "GET_ATTR"
-+ (string-upcase (gen-c-symbol attr-name))))
-+ (else
-+ (estate-error *estate* "attr: unsupported object type" owner)))
-+)
-+
-+(define-fn const (*estate* options mode c)
-+ (assert (not (mode:eq? 'VOID mode)))
-+ (if (mode:eq? 'DFLT mode) ;; FIXME: can't get DFLT anymore
-+ (set! mode 'INT))
-+ (let ((mode (mode:lookup mode)))
-+ (cx:make mode
-+ (cond ((or (mode:eq? 'DI mode)
-+ (mode:eq? 'UDI mode)
-+ (< #xffffffff c)
-+ (> #x-80000000 c))
-+ (string-append "MAKEDI ("
-+ (gen-integer (high-part c)) ", "
-+ (gen-integer (low-part c))
-+ ")"))
-+ ((and (<= #x-80000000 c) (> #x80000000 c))
-+ (number->string c))
-+ ((and (<= #x80000000 c) (>= #xffffffff c))
-+ ; ??? GCC complains if not affixed with "U" but that's not k&r.
-+ ;(string-append (number->string val) "U"))
-+ (string-append "0x" (number->string c 16)))
-+ ; Else punt.
-+ (else (number->string c)))))
-+)
-+
-+(define-fn join (*estate* options out-mode in-mode arg1 . arg-rest)
-+ ; FIXME: Endianness issues undecided.
-+ ; FIXME: Ensure correct number of args for in/out modes.
-+ ; Ensure compatible modes.
-+ (apply s-c-raw-call (cons *estate*
-+ (cons out-mode
-+ (cons (stringsym-append "JOIN"
-+ in-mode
-+ out-mode)
-+ (cons arg1 arg-rest)))))
-+)
-+
-+(define-fn subword (*estate* options mode value word-num)
-+ (let* ((mode (mode:lookup mode))
-+ (val (rtl-c-get *estate* DFLT value))
-+ (val-mode (cx:mode val)))
-+ (cx:make mode
-+ (string-append "SUBWORD"
-+ (obj:str-name val-mode) (obj:str-name mode)
-+ " (" (cx:c val)
-+ (if (mode-bigger? val-mode mode)
-+ (string-append
-+ ", "
-+ (if (number? word-num)
-+ (number->string word-num)
-+ (cx:c (rtl-c-get *estate* DFLT word-num))))
-+ "")
-+ ")")))
-+)
-+
-+(define-fn c-code (*estate* options mode text)
-+ (cx:make mode text)
-+)
-+
-+(define-fn c-call (*estate* options mode name . args)
-+ (apply s-c-call (cons *estate* (cons mode (cons name args))))
-+)
-+
-+(define-fn c-raw-call (*estate* options mode name . args)
-+ (apply s-c-raw-call (cons *estate* (cons mode (cons name args))))
-+)
-+
-+(define-fn nop (*estate* options mode)
-+ (cx:make VOID "((void) 0); /*nop*/\n")
-+)
-+
-+(define-fn set (*estate* options mode dst src)
-+ (if (estate-for-insn? *estate*)
-+ (rtl-c-set-trace *estate* mode dst src)
-+ (rtl-c-set-quiet *estate* mode dst src))
-+)
-+
-+(define-fn set-quiet (*estate* options mode dst src)
-+ (rtl-c-set-quiet *estate* mode dst src)
-+)
-+
-+(define-fn neg (*estate* options mode s1)
-+ (s-unop *estate* "NEG" "-" mode s1)
-+)
-+
-+(define-fn abs (*estate* options mode s1)
-+ (s-unop *estate* "ABS" #f mode s1)
-+)
-+
-+(define-fn inv (*estate* options mode s1)
-+ (s-unop *estate* "INV" "~" mode s1)
-+)
-+
-+(define-fn not (*estate* options mode s1)
-+ (s-unop *estate* "NOT" "!" mode s1)
-+)
-+
-+(define-fn add (*estate* options mode s1 s2)
-+ (s-binop *estate* "ADD" "+" mode s1 s2)
-+)
-+(define-fn sub (*estate* options mode s1 s2)
-+ (s-binop *estate* "SUB" "-" mode s1 s2)
-+)
-+
-+(define-fn addc (*estate* options mode s1 s2 s3)
-+ (s-binop-with-bit *estate* "ADDC" mode s1 s2 s3)
-+)
-+;; ??? Whether to rename ADDCF/ADDOF -> ADDCCF/ADDCOF is debatable.
-+(define-fn addc-cflag (*estate* options mode s1 s2 s3)
-+ (s-binop-with-bit *estate* "ADDCF" mode s1 s2 s3)
-+)
-+(define-fn addc-oflag (*estate* options mode s1 s2 s3)
-+ (s-binop-with-bit *estate* "ADDOF" mode s1 s2 s3)
-+)
-+
-+(define-fn subc (*estate* options mode s1 s2 s3)
-+ (s-binop-with-bit *estate* "SUBC" mode s1 s2 s3)
-+)
-+;; ??? Whether to rename SUBCF/SUBOF -> SUBCCF/SUBCOF is debatable.
-+(define-fn subc-cflag (*estate* options mode s1 s2 s3)
-+ (s-binop-with-bit *estate* "SUBCF" mode s1 s2 s3)
-+)
-+(define-fn subc-oflag (*estate* options mode s1 s2 s3)
-+ (s-binop-with-bit *estate* "SUBOF" mode s1 s2 s3)
-+)
-+
-+;; ??? These are deprecated. Delete in time.
-+(define-fn add-cflag (*estate* options mode s1 s2 s3)
-+ (s-binop-with-bit *estate* "ADDCF" mode s1 s2 s3)
-+)
-+(define-fn add-oflag (*estate* options mode s1 s2 s3)
-+ (s-binop-with-bit *estate* "ADDOF" mode s1 s2 s3)
-+)
-+(define-fn sub-cflag (*estate* options mode s1 s2 s3)
-+ (s-binop-with-bit *estate* "SUBCF" mode s1 s2 s3)
-+)
-+(define-fn sub-oflag (*estate* options mode s1 s2 s3)
-+ (s-binop-with-bit *estate* "SUBOF" mode s1 s2 s3)
-+)
-+
-+;(define-fn zflag (*estate* options mode value)
-+; (list 'eq mode value (list 'const mode 0))
-+;)
-+
-+;(define-fn nflag (*estate* options mode value)
-+; (list 'lt mode value (list 'const mode 0))
-+;)
-+
-+(define-fn mul (*estate* options mode s1 s2)
-+ (s-binop *estate* "MUL" "*" mode s1 s2)
-+)
-+(define-fn div (*estate* options mode s1 s2)
-+ (s-binop *estate* "DIV" "/" mode s1 s2)
-+)
-+(define-fn udiv (*estate* options mode s1 s2)
-+ (s-binop *estate* "UDIV" "/" mode s1 s2)
-+)
-+(define-fn mod (*estate* options mode s1 s2)
-+ (s-binop *estate* "MOD" "%" mode s1 s2)
-+)
-+(define-fn umod (*estate* options mode s1 s2)
-+ (s-binop *estate* "UMOD" "%" mode s1 s2)
-+)
-+
-+(define-fn sqrt (*estate* options mode s1)
-+ (s-unop *estate* "SQRT" #f mode s1)
-+)
-+(define-fn cos (*estate* options mode s1)
-+ (s-unop *estate* "COS" #f mode s1)
-+)
-+(define-fn sin (*estate* options mode s1)
-+ (s-unop *estate* "SIN" #f mode s1)
-+)
-+
-+(define-fn nan (*estate* options mode s1)
-+ (s-float-predop *estate* "NAN" mode s1)
-+)
-+(define-fn qnan (*estate* options mode s1)
-+ (s-float-predop *estate* "QNAN" mode s1)
-+)
-+(define-fn snan (*estate* options mode s1)
-+ (s-float-predop *estate* "SNAN" mode s1)
-+)
-+
-+(define-fn min (*estate* options mode s1 s2)
-+ (s-binop *estate* "MIN" #f mode s1 s2)
-+)
-+(define-fn max (*estate* options mode s1 s2)
-+ (s-binop *estate* "MAX" #f mode s1 s2)
-+)
-+(define-fn umin (*estate* options mode s1 s2)
-+ (s-binop *estate* "UMIN" #f mode s1 s2)
-+)
-+(define-fn umax (*estate* options mode s1 s2)
-+ (s-binop *estate* "UMAX" #f mode s1 s2)
-+)
-+
-+(define-fn and (*estate* options mode s1 s2)
-+ (s-binop *estate* "AND" "&" mode s1 s2)
-+)
-+(define-fn or (*estate* options mode s1 s2)
-+ (s-binop *estate* "OR" "|" mode s1 s2)
-+)
-+(define-fn xor (*estate* options mode s1 s2)
-+ (s-binop *estate* "XOR" "^" mode s1 s2)
-+)
-+
-+(define-fn sll (*estate* options mode s1 s2)
-+ (s-shop *estate* "SLL" "<<" mode s1 s2)
-+)
-+(define-fn srl (*estate* options mode s1 s2)
-+ (s-shop *estate* "SRL" ">>" mode s1 s2)
-+)
-+(define-fn sra (*estate* options mode s1 s2)
-+ (s-shop *estate* "SRA" ">>" mode s1 s2)
-+)
-+(define-fn ror (*estate* options mode s1 s2)
-+ (s-shop *estate* "ROR" #f mode s1 s2)
-+)
-+(define-fn rol (*estate* options mode s1 s2)
-+ (s-shop *estate* "ROL" #f mode s1 s2)
-+)
-+
-+(define-fn andif (*estate* options mode s1 s2)
-+ (s-boolifop *estate* "ANDIF" "&&" s1 s2)
-+)
-+(define-fn orif (*estate* options mode s1 s2)
-+ (s-boolifop *estate* "ORIF" "||" s1 s2)
-+)
-+
-+(define-fn ext (*estate* options mode s1)
-+ (s-int-convop *estate* "EXT" mode s1)
-+)
-+(define-fn zext (*estate* options mode s1)
-+ (s-int-convop *estate* "ZEXT" mode s1)
-+)
-+(define-fn trunc (*estate* options mode s1)
-+ (s-int-convop *estate* "TRUNC" mode s1)
-+)
-+
-+(define-fn fext (*estate* options mode how s1)
-+ (s-float-convop *estate* "FEXT" mode how s1)
-+)
-+(define-fn ftrunc (*estate* options mode how s1)
-+ (s-float-convop *estate* "FTRUNC" mode how s1)
-+)
-+(define-fn float (*estate* options mode how s1)
-+ (s-float-convop *estate* "FLOAT" mode how s1)
-+)
-+(define-fn ufloat (*estate* options mode how s1)
-+ (s-float-convop *estate* "UFLOAT" mode how s1)
-+)
-+(define-fn fix (*estate* options mode how s1)
-+ (s-float-convop *estate* "FIX" mode how s1)
-+)
-+(define-fn ufix (*estate* options mode how s1)
-+ (s-float-convop *estate* "UFIX" mode how s1)
-+)
-+
-+(define-fn eq (*estate* options mode s1 s2)
-+ (s-cmpop *estate* 'eq "==" mode s1 s2)
-+)
-+(define-fn ne (*estate* options mode s1 s2)
-+ (s-cmpop *estate* 'ne "!=" mode s1 s2)
-+)
-+
-+(define-fn lt (*estate* options mode s1 s2)
-+ (s-cmpop *estate* 'lt "<" mode s1 s2)
-+)
-+(define-fn le (*estate* options mode s1 s2)
-+ (s-cmpop *estate* 'le "<=" mode s1 s2)
-+)
-+(define-fn gt (*estate* options mode s1 s2)
-+ (s-cmpop *estate* 'gt ">" mode s1 s2)
-+)
-+(define-fn ge (*estate* options mode s1 s2)
-+ (s-cmpop *estate* 'ge ">=" mode s1 s2)
-+)
-+
-+(define-fn ltu (*estate* options mode s1 s2)
-+ (s-cmpop *estate* 'ltu "<" mode s1 s2)
-+)
-+(define-fn leu (*estate* options mode s1 s2)
-+ (s-cmpop *estate* 'leu "<=" mode s1 s2)
-+)
-+(define-fn gtu (*estate* options mode s1 s2)
-+ (s-cmpop *estate* 'gtu ">" mode s1 s2)
-+)
-+(define-fn geu (*estate* options mode s1 s2)
-+ (s-cmpop *estate* 'geu ">=" mode s1 s2)
-+)
-+
-+(define-fn member (*estate* options mode value set)
-+ ;; NOTE: There are multiple evalutions of VALUE in the generated code.
-+ ;; It's probably ok, this comment is more for completeness sake.
-+ (let ((c-value (rtl-c-get *estate* mode value))
-+ (set (rtx-number-list-values set)))
-+ (let loop ((set (cdr set))
-+ (code (string-append "(" (cx:c c-value)
-+ " == "
-+ (gen-integer (car set))
-+ ")")))
-+ (if (null? set)
-+ (cx:make (mode:lookup 'BI) (string-append "(" code ")"))
-+ (loop (cdr set)
-+ (string-append code
-+ " || ("
-+ (cx:c c-value)
-+ " == "
-+ (gen-integer (car set))
-+ ")")))))
-+)
-+
-+(define-fn if (*estate* options mode cond then . else)
-+ (apply s-if (append! (list *estate* mode cond then) else))
-+)
-+
-+(define-fn cond (*estate* options mode . cond-code-list)
-+ (apply s-cond (cons *estate* (cons mode cond-code-list)))
-+)
-+
-+(define-fn case (*estate* options mode test . case-list)
-+ (apply s-case (cons *estate* (cons mode (cons test case-list))))
-+)
-+
-+(define-fn parallel (*estate* options mode ignore expr . exprs)
-+ (apply s-parallel (cons *estate* (cons expr exprs)))
-+)
-+
-+(define-fn sequence (*estate* options mode locals expr . exprs)
-+ (apply s-sequence
-+ (cons *estate* (cons mode (cons locals (cons expr exprs)))))
-+)
-+
-+(define-fn do-count (*estate* options mode iter-var nr-times expr . exprs)
-+ (apply s-do-count
-+ (cons *estate* (cons iter-var (cons nr-times (cons expr exprs)))))
-+)
-+
-+(define-fn closure (*estate* options mode isa-name-list env-stack expr)
-+ (rtl-c-with-estate (estate-make-closure *estate* isa-name-list
-+ (rtx-make-env-stack env-stack))
-+ (mode:lookup mode) expr)
-+)
-+
-+;; The result is the rtl->c generator table.
-+;; FIXME: verify all elements are filled
-+
-+table
-+
-+)) ;; End of /rtl-c-build-table
-diff -Nur binutils-2.24.orig/cgen/rtl.scm binutils-2.24/cgen/rtl.scm
---- binutils-2.24.orig/cgen/rtl.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/rtl.scm 2016-06-30 21:26:12.669893734 +0200
-@@ -0,0 +1,1284 @@
-+; Basic RTL support.
-+; Copyright (C) 2000, 2001, 2009, 2010 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; The name for the description language has been changed a couple of times.
-+; RTL isn't my favorite because of perceived confusion with GCC
-+; (and perceived misinterpretation of intentions!).
-+; On the other hand my other choices were taken (and believed to be
-+; more confusing).
-+;
-+; RTL functions are described by class <rtx-func>.
-+; The complete list of rtl functions is defined in doc/rtl.texi.
-+
-+; Conventions used in this file:
-+; - procs that perform the basic rtl or semantic expression manipulation that
-+; is for public use shall be prefixed with "s-" or "rtl-" or "rtx-"
-+; - no other procs shall be so prefixed
-+; - rtl globals and other rtx-func object support shall be prefixed with
-+; "-rtx[-:]"
-+; - no other procs shall be so prefixed
-+
-+; Class for defining rtx nodes.
-+
-+; FIXME: Add new members that are lambda's to perform the argument checking
-+; specified by `arg-types' and `arg-modes'. This will save a lookup during
-+; traversing. It will also allow custom versions for oddballs (e.g. for
-+; `member' we want to verify the 2nd arg is a `number-list' rtx).
-+; ??? Still useful?
-+
-+(define <rtx-func>
-+ (class-make '<rtx-func> nil
-+ '(
-+ ; name as it appears in RTL
-+ ; must be accessed via obj:name
-+ name
-+
-+ ; argument list
-+ ; ??? Not used I think, but keep.
-+ args
-+
-+ ; result mode, or #f if from arg 2
-+ ; (or the containing expression when canonicalizing)
-+ result-mode
-+
-+ ; types of each argument, as symbols
-+ ; This is #f for macros.
-+ ; Possible values:
-+ ; OPTIONS - optional list of keyword-prefixed options
-+ ; ANYINTMODE - any integer mode
-+ ; ANYFLOATMODE - any floating point mode
-+ ; ANYNUMMODE - any numeric mode
-+ ; ANYEXPRMODE - VOID, PTR, SYM, or any numeric mode
-+ ; ANYCEXPRMODE - VOID, PTR, or any numeric mode
-+ ; EXPLNUMMODE - explicit numeric mode, can't be DFLT or VOID
-+ ; VOIDORNUMMODE - VOID or any numeric mode
-+ ; VOIDMODE - must be `VOID'
-+ ; BIMODE - BI (boolean or bit int)
-+ ; INTMODE - must be `INT'
-+ ; SYMMODE - must be SYM
-+ ; INSNMODE - must be INSN
-+ ; MACHMODE - must be MACH
-+ ; RTX - any rtx
-+ ; SETRTX - any rtx allowed to be `set'
-+ ; TESTRTX - the test of an `if'
-+ ; CONDRTX - a cond expression ((test) rtx ... rtx)
-+ ; CASERTX - a case expression ((symbol .. symbol) rtx ... rtx)
-+ ; LOCALS - the locals list of a sequence
-+ ; ITERATION - the iteration
-+ ; SYMBOLLIST - used for ISA name lists
-+ ; ENVSTACK - environment stack
-+ ; ATTRS - attribute list
-+ ; SYMBOL - arg must be a symbol
-+ ; STRING - arg must be a string
-+ ; NUMBER - arg must be a number
-+ ; SYMORNUM - arg must be a symbol or number
-+ ; OBJECT - arg is an object (FIXME: restrict to <operand>?)
-+ arg-types
-+
-+ ; required mode of each argument
-+ ; This is #f for macros.
-+ ; Possible values include any mode name and:
-+ ; ANY - any mode
-+ ; ANYINT - any integer mode
-+ ; NA - not applicable
-+ ; MATCHEXPR - mode has to match the mode specified in the
-+ ; containing expression
-+ ; NOTE: This isn't necessarily the mode of the
-+ ; result of the expression. E.g. in `set', the
-+ ; result always has mode VOID, but the mode
-+ ; specified in the expression is the mode of the
-+ ; set destination.
-+ ; MATCHSEQ - for sequences
-+ ; last expression has to match mode of sequence,
-+ ; preceding expressions must be VOID
-+ ; MATCH2 - must match mode of arg 2
-+ ; MATCH3 - must match mode of arg 3
-+ ; <MODE-NAME> - must match specified mode
-+ arg-modes
-+
-+ ; arg number of the MATCHEXPR arg,
-+ ; or #f if there is none
-+ matchexpr-index
-+
-+ ; The class of rtx.
-+ ; This is #f for macros.
-+ ; ARG - operand, local, const
-+ ; SET - set, set-quiet
-+ ; UNARY - not, inv, etc.
-+ ; BINARY - add, sub, etc.
-+ ; TRINARY - addc, subc, etc.
-+ ; COMPARE - eq, ne, etc.
-+ ; IF - if
-+ ; COND - cond, case
-+ ; SEQUENCE - sequence, parallel
-+ ; UNSPEC - c-call
-+ ; MISC - everything else
-+ class
-+
-+ ; A symbol indicating the flavour of rtx node this is.
-+ ; FUNCTION - normal function
-+ ; SYNTAX - don't pre-eval arguments
-+ ; OPERAND - result is an operand
-+ ; MACRO - converts one rtx expression to another
-+ ; The word "style" was chosen to be sufficiently different
-+ ; from "type", "kind", and "class".
-+ style
-+
-+ ; A function to perform the rtx.
-+ evaluator
-+
-+ ; Ordinal number of rtx. Used to index into tables.
-+ num
-+ )
-+ nil)
-+)
-+
-+; Predicate.
-+
-+(define (rtx-func? x) (class-instance? <rtx-func> x))
-+
-+; Accessor fns
-+
-+(define-getters <rtx-func> rtx
-+ (result-mode arg-types arg-modes matchexpr-index class style evaluator num)
-+)
-+
-+(define (rtx-style-syntax? rtx) (eq? (rtx-style rtx) 'syntax))
-+
-+; Add standard `get-name' method since this isn't a subclass of <ident>.
-+
-+(method-make! <rtx-func> 'get-name (lambda (self) (elm-get self 'name)))
-+
-+; List of mode types for arg-types.
-+
-+(define /rtx-valid-mode-types
-+ '(
-+ ANYINTMODE ANYFLOATMODE ANYNUMMODE ANYEXPRMODE ANYCEXPRMODE EXPLNUMMODE
-+ VOIDORNUMMODE VOIDMODE BIMODE INTMODE SYMMODE INSNMODE MACHMODE
-+ )
-+)
-+
-+; List of valid values for arg-types, not including mode names.
-+
-+(define /rtx-valid-types
-+ (append
-+ '(OPTIONS)
-+ /rtx-valid-mode-types
-+ '(RTX SETRTX TESTRTX CONDRTX CASERTX)
-+ '(LOCALS ITERATION SYMBOLLIST ENVSTACK ATTRS)
-+ '(SYMBOL STRING NUMBER SYMORNUM OBJECT)
-+ )
-+)
-+
-+; List of valid mode matchers, excluding mode names.
-+
-+(define /rtx-valid-matches
-+ '(ANY ANYINT NA MATCHEXPR MATCHSEQ MATCH2 MATCH3)
-+)
-+
-+;; Return arg number of MATCHEXPR in ARG-MODES or #f if not present.
-+
-+(define (/rtx-find-matchexpr-index arg-modes)
-+ ;; We can't use find-first-index here because arg-modes can be an
-+ ;; improper list (a b c . d).
-+ ;;(find-first-index 0 (lambda (t) (eq? t 'MATCHEXPR)) arg-modes)
-+ (define (improper-find-first-index i pred l)
-+ (cond ((null? l) #f)
-+ ((pair? l)
-+ (cond ((pred (car l)) i)
-+ (else (improper-find-first-index (+ 1 i) pred (cdr l)))))
-+ ((pred l) i)
-+ (else #f)))
-+ (improper-find-first-index 0 (lambda (t) (eq? t 'MATCHEXPR)) arg-modes)
-+)
-+
-+; List of all defined rtx names. This can be map'd over without having
-+; to know the innards of /rtx-func-table (which is a hash table).
-+
-+(define /rtx-name-list nil)
-+(define (rtx-name-list) /rtx-name-list)
-+
-+; Table of rtx function objects.
-+; This is set in rtl-init!.
-+
-+(define /rtx-func-table nil)
-+
-+; Look up the <rtx-func> object for RTX-KIND.
-+; Returns the object or #f if not found.
-+; RTX-KIND is the name of the rtx function.
-+
-+(define (rtx-lookup rtx-kind)
-+ (assert (symbol? rtx-kind))
-+ (hashq-ref /rtx-func-table rtx-kind)
-+)
-+
-+; Table of rtx macro objects.
-+; This is set in rtl-init!.
-+
-+(define /rtx-macro-table nil)
-+
-+; Table of operands, modes, and other non-functional aspects of RTL.
-+; This is defined in rtl-finish!, after all operands have been read in.
-+
-+(define /rtx-operand-table nil)
-+
-+; Number of next rtx to be defined.
-+
-+(define /rtx-num-next #f)
-+
-+; Return the number of rtx's.
-+
-+(define (rtx-max-num)
-+ /rtx-num-next
-+)
-+
-+; Define Rtx Node
-+;
-+; Add an entry to the rtx function table.
-+; NAME-ARGS is a list of the operation name and arguments.
-+; The mode of the result must be the first element in `args' (if there are
-+; any arguments).
-+; ARG-TYPES is a list of argument types (/rtx-valid-types).
-+; ARG-MODES is a list of mode matchers (/rtx-valid-matches).
-+; CLASS is the class of the rtx to be created.
-+; ACTION is a list of Scheme expressions to perform the operation.
-+;
-+; ??? Note that we can support variables. Not sure it should be done.
-+
-+(define (def-rtx-node name-args result-mode arg-types arg-modes class action)
-+ (let* ((name (car name-args))
-+ (args (cdr name-args))
-+ (context (make-prefix-context (string-append "defining rtx "
-+ (symbol->string name))))
-+ (matchexpr-index (/rtx-find-matchexpr-index arg-modes)))
-+
-+; (map1-improper (lambda (arg-type)
-+; (if (not (memq arg-type /rtx-valid-types))
-+; (context-error context "While defining rtx functions"
-+; "invalid arg type" arg-type)))
-+; arg-types)
-+; (map1-improper (lambda (arg-mode)
-+; (if (and (not (memq arg-mode /rtx-valid-matches))
-+; (not (symbol? arg-mode))) ;; FIXME: mode-name?
-+; (context-error context "While defining rtx functions"
-+; "invalid arg mode match" arg-mode)))
-+; arg-modes)
-+
-+ (let ((rtx (make <rtx-func> name args
-+ result-mode arg-types arg-modes matchexpr-index
-+ class
-+ 'function
-+ (if action
-+ (eval1 (list 'lambda
-+ (cons '*estate* args)
-+ action))
-+ #f)
-+ /rtx-num-next)))
-+ ; Add it to the table of rtx handlers.
-+ (hashq-set! /rtx-func-table name rtx)
-+ (set! /rtx-num-next (+ /rtx-num-next 1))
-+ (set! /rtx-name-list (cons name /rtx-name-list))
-+ *UNSPECIFIED*))
-+)
-+
-+(define define-rtx-node
-+ ; Written this way so Hobbit can handle it.
-+ (defmacro:syntax-transformer (lambda arg-list
-+ (apply def-rtx-node arg-list)
-+ nil))
-+)
-+
-+; Same as define-rtx-node but don't pre-evaluate the arguments.
-+; Remember that `mode' must be the first argument.
-+
-+(define (def-rtx-syntax-node name-args result-mode arg-types arg-modes class action)
-+ (let ((name (car name-args))
-+ (args (cdr name-args))
-+ (matchexpr-index (/rtx-find-matchexpr-index arg-modes)))
-+ (let ((rtx (make <rtx-func> name args
-+ result-mode arg-types arg-modes matchexpr-index
-+ class
-+ 'syntax
-+ (if action
-+ (eval1 (list 'lambda
-+ (cons '*estate* args)
-+ action))
-+ #f)
-+ /rtx-num-next)))
-+ ; Add it to the table of rtx handlers.
-+ (hashq-set! /rtx-func-table name rtx)
-+ (set! /rtx-num-next (+ /rtx-num-next 1))
-+ (set! /rtx-name-list (cons name /rtx-name-list))
-+ *UNSPECIFIED*))
-+)
-+
-+(define define-rtx-syntax-node
-+ ; Written this way so Hobbit can handle it.
-+ (defmacro:syntax-transformer (lambda arg-list
-+ (apply def-rtx-syntax-node arg-list)
-+ nil))
-+)
-+
-+; Same as define-rtx-node but return an operand (usually an <operand> object).
-+; ??? `mode' must be the first argument?
-+
-+(define (def-rtx-operand-node name-args result-mode arg-types arg-modes class action)
-+ ; Operand nodes must specify an action.
-+ (assert action)
-+ (let ((name (car name-args))
-+ (args (cdr name-args))
-+ (matchexpr-index (/rtx-find-matchexpr-index arg-modes)))
-+ (let ((rtx (make <rtx-func> name args
-+ result-mode arg-types arg-modes matchexpr-index
-+ class
-+ 'operand
-+ (eval1 (list 'lambda
-+ (cons '*estate* args)
-+ action))
-+ /rtx-num-next)))
-+ ; Add it to the table of rtx handlers.
-+ (hashq-set! /rtx-func-table name rtx)
-+ (set! /rtx-num-next (+ /rtx-num-next 1))
-+ (set! /rtx-name-list (cons name /rtx-name-list))
-+ *UNSPECIFIED*))
-+)
-+
-+(define define-rtx-operand-node
-+ ; Written this way so Hobbit can handle it.
-+ (defmacro:syntax-transformer (lambda arg-list
-+ (apply def-rtx-operand-node arg-list)
-+ nil))
-+)
-+
-+; Convert one rtx expression into another.
-+; NAME-ARGS is a list of the operation name and arguments.
-+; ACTION is a list of Scheme expressions to perform the operation.
-+; The result of ACTION must be another rtx expression (a list).
-+
-+(define (def-rtx-macro-node name-args action)
-+ ; macro nodes must specify an action
-+ (assert action)
-+ (let ((name (car name-args))
-+ (args (cdr name-args)))
-+ (let ((rtx (make <rtx-func> name args #f #f #f #f
-+ #f ; class
-+ 'macro
-+ (eval1 (list 'lambda args action))
-+ /rtx-num-next)))
-+ ; Add it to the table of rtx macros.
-+ (hashq-set! /rtx-macro-table name rtx)
-+ (set! /rtx-num-next (+ /rtx-num-next 1))
-+ (set! /rtx-name-list (cons name /rtx-name-list))
-+ *UNSPECIFIED*))
-+)
-+
-+(define define-rtx-macro-node
-+ ; Written this way so Hobbit can handle it.
-+ (defmacro:syntax-transformer (lambda arg-list
-+ (apply def-rtx-macro-node arg-list)
-+ nil))
-+)
-+
-+; RTL macro expansion.
-+; RTL macros are different than pmacros. The difference is that the expansion
-+; happens internally, RTL macros are part of the language.
-+
-+; Lookup MACRO-NAME and return its <rtx-func> object or #f if not found.
-+
-+(define (/rtx-macro-lookup macro-name)
-+ (hashq-ref /rtx-macro-table macro-name)
-+)
-+
-+; Lookup (car exp) and return the macro's lambda if it is one or #f.
-+
-+(define (/rtx-macro-check exp fn-getter)
-+ (let ((macro (hashq-ref /rtx-macro-table (car exp))))
-+ (if macro
-+ (fn-getter macro)
-+ #f))
-+)
-+
-+; Expand a list.
-+
-+(define (/rtx-macro-expand-list exp fn-getter)
-+ (let ((macro (/rtx-macro-check exp fn-getter)))
-+ (if macro
-+ (apply macro (map (lambda (x) (/rtx-macro-expand x fn-getter))
-+ (cdr exp)))
-+ (map (lambda (x) (/rtx-macro-expand x fn-getter))
-+ exp)))
-+)
-+
-+; Main entry point to expand a macro invocation.
-+
-+(define (/rtx-macro-expand exp fn-getter)
-+ (if (pair? exp) ; pair? -> cheap (and (not (null? exp)) (list? exp))
-+ (let ((result (/rtx-macro-expand-list exp fn-getter)))
-+ ; If the result is a new macro invocation, recurse.
-+ (if (pair? result)
-+ (let ((macro (/rtx-macro-check result fn-getter)))
-+ (if macro
-+ (/rtx-macro-expand (apply macro (cdr result)) fn-getter)
-+ result))
-+ result))
-+ exp)
-+)
-+
-+; Publically accessible version.
-+
-+(define rtx-macro-expand /rtx-macro-expand)
-+
-+; RTX mode support.
-+
-+; Get implied mode of X, either an operand expression, sequence temp, or
-+; a hardware reference expression.
-+; The result is the name of the mode.
-+
-+(define (rtx-lvalue-mode-name estate x)
-+ (assert (rtx? x))
-+ (case (car x)
-+; ((operand) (obj:name (op:mode (current-op-lookup (cadr x) (obj-isa-list (estate-owner estate))))))
-+ ((xop) (obj:name (send (rtx-xop-obj x) 'get-mode)))
-+; ((opspec)
-+; (if (eq? (rtx-opspec-mode x) 'VOID)
-+; (rtx-lvalue-mode-name estate (rtx-opspec-hw-ref x))
-+; (rtx-opspec-mode x)))
-+; ((reg mem) (cadr x))
-+ ((local) ;; (local options mode name)
-+ (let* ((name (cadddr x))
-+ (temp (rtx-temp-lookup (estate-env-stack estate) name)))
-+ (if (not temp)
-+ (estate-error estate "unknown local" name))
-+ (obj:name (rtx-temp-mode temp))))
-+ (else
-+ (estate-error error
-+ "rtx-lvalue-mode-name: not an operand or hardware reference:"
-+ x)))
-+)
-+
-+; Lookup the mode to use for semantic operations (unsigned modes aren't
-+; allowed since we don't have ANDUSI, etc.).
-+; MODE is a <mode> object.
-+; ??? I have actually implemented both ways (full use of unsigned modes
-+; and mostly hidden use of unsigned modes). Neither makes me real
-+; comfortable, though I liked bringing unsigned modes out into the open
-+; even if it doubled the number of semantic operations.
-+
-+(define (rtx-sem-mode mode) (or (mode:sem-mode mode) mode))
-+
-+; Return the mode of object OBJ.
-+
-+(define (rtx-obj-mode obj) (send obj 'get-mode))
-+
-+; Return a boolean indicating of modes M1,M2 are compatible.
-+; M1,M2 are <mode> objects.
-+
-+(define (rtx-mode-compatible? m1 m2)
-+ ;; ??? This is more permissive than is perhaps proper.
-+ (let ((mode1 (rtx-sem-mode m1))
-+ (mode2 (rtx-sem-mode m2)))
-+ ;;(eq? (obj:name mode1) (obj:name mode2)))
-+ (mode-compatible? 'sameclass mode1 mode2))
-+)
-+
-+; Environments (sequences with local variables).
-+
-+; Temporaries are created within a sequence.
-+; MODE is a <mode> object.
-+; VALUE is #f if not set yet.
-+; e.g. (sequence ((WI tmp)) (set tmp reg0) ...)
-+; ??? Perhaps what we want here is `let' but for now I prefer `sequence'.
-+; This isn't exactly `let' either as no initial value is specified.
-+; Environments are also used to specify incoming values from the top level.
-+
-+(define <rtx-temp> (class-make '<rtx-temp> nil '(name mode value) nil))
-+
-+;(define cx-temp:name (elm-make-getter <c-expr-temp> 'name))
-+;(define cx-temp:mode (elm-make-getter <c-expr-temp> 'mode))
-+;(define cx-temp:value (elm-make-getter <c-expr-temp> 'value))
-+
-+(define-getters <rtx-temp> rtx-temp (name mode value))
-+
-+(method-make!
-+ <rtx-temp> 'make!
-+ (lambda (self name mode value)
-+ (assert (mode? mode))
-+ (elm-set! self 'name name)
-+ (elm-set! self 'mode mode)
-+ (elm-set! self 'value (if value value (gen-temp name)))
-+ self)
-+)
-+
-+(define (gen-temp name)
-+ ; ??? calls to gen-c-symbol don't belong here
-+ (string-append "tmp_" (gen-c-symbol name))
-+)
-+
-+; Return a boolean indicating if X is an <rtx-temp>.
-+
-+(define (rtx-temp? x) (class-instance? <rtx-temp> x))
-+
-+; Respond to 'get-mode messages.
-+
-+(method-make! <rtx-temp> 'get-mode (lambda (self) (elm-get self 'mode)))
-+
-+; Respond to 'get-name messages.
-+
-+(method-make! <rtx-temp> 'get-name (lambda (self) (elm-get self 'name)))
-+
-+; An environment is a list of <rtx-temp> objects.
-+; An environment stack is a list of environments.
-+
-+(define (rtx-env-stack-empty? env-stack) (null? env-stack))
-+(define (rtx-env-stack-head env-stack) (car env-stack))
-+(define (rtx-env-empty-stack) nil)
-+(define (rtx-env-init-stack1 vars-alist)
-+ (if (null? vars-alist)
-+ nil
-+ (cons (rtx-env-make vars-alist) nil))
-+)
-+(define (rtx-env-empty? env) (null? env))
-+
-+;; Create an environment from VAR-ALIST,
-+;; an alist of (name <mode>-or-mode-name value) elements,
-+;; or, in the case of /rtx-closure-make, a list of (name . <rtx-temp>).
-+
-+(define (rtx-env-make var-alist)
-+ ;; Check for an already-compiled environment, for /rtx-closure-make's sake.
-+ (if (and (pair? var-alist)
-+ (rtx-temp? (cdar var-alist)))
-+ var-alist
-+ ;; Convert VAR-ALIST to an associative list of <rtx-temp> objects.
-+ (map (lambda (var-spec)
-+ (cons (car var-spec)
-+ (make <rtx-temp>
-+ (car var-spec)
-+ (mode-maybe-lookup (cadr var-spec))
-+ (caddr var-spec))))
-+ var-alist))
-+)
-+
-+; Create an initial environment with local variables.
-+; VAR-LIST is a list of (mode-name name) elements, i.e. the locals argument to
-+; `sequence' or equivalent thereof.
-+
-+(define (rtx-env-make-locals var-list)
-+ ; Convert VAR-LIST to an associative list of <rtx-temp> objects.
-+ (map (lambda (var-spec)
-+ (cons (cadr var-spec)
-+ (make <rtx-temp>
-+ (cadr var-spec) (mode:lookup (car var-spec)) #f)))
-+ var-list)
-+)
-+
-+; Return the symbol name of the limit variable of `do-count'
-+; given iteration-variable ITER-VAR.
-+; ??? We don't publish that this variable is available to use, but we could.
-+
-+(define (rtx-make-iteration-limit-var iter-var)
-+ (symbol-append iter-var '-limit)
-+)
-+
-+; Create an environment with the iteration local variables of `do-count'.
-+
-+(define (rtx-env-make-iteration-locals iter-var)
-+ (rtx-env-make-locals (list (list 'INT iter-var)
-+ (list 'INT (rtx-make-iteration-limit-var iter-var))))
-+)
-+
-+;; Convert an alist of (name <mode>-object-or-name value) to
-+;; an environment.
-+
-+(define (rtx-var-alist-to-env var-alist) var-alist)
-+
-+;; Convert an alist of (name <mode>-object-or-name value) to
-+;; an environment stack.
-+
-+(define (rtx-var-alist-to-closure-env-stack var-alist)
-+ ;; Preserve emptiness so (null? env-stack) works.
-+ (if (null? var-alist)
-+ nil
-+ (list var-alist))
-+)
-+
-+;; Convert the source form of an env-stack, e.g. as used in a closure,
-+;; to the internal form, which is (name <rtx-temp>-object).
-+
-+(define (rtx-make-env-stack closure-env-stack)
-+ (map rtx-env-make closure-env-stack)
-+)
-+
-+; Push environment ENV onto the front of environment stack ENV-STACK,
-+; returning a new object. ENV-STACK is not modified.
-+
-+(define (rtx-env-push env-stack env)
-+ (cons env env-stack)
-+)
-+
-+; Lookup variable NAME in environment stack ENV-STACK.
-+; The result is the <rtx-temp> object.
-+
-+(define (rtx-temp-lookup env-stack name)
-+ (let loop ((stack env-stack))
-+ (if (null? stack)
-+ #f
-+ (let ((temp (assq-ref (car stack) name)))
-+ (if temp
-+ temp
-+ (loop (cdr stack))))))
-+)
-+
-+; Create a "closure" of EXPR using the current ISA list and temp stack.
-+; MODE is the mode name.
-+
-+(define (/rtx-closure-make estate mode expr)
-+ ;; NOTE: This records the "compiled" environment stack in the closure.
-+ (rtx-make 'closure mode (estate-isas estate) (estate-env-stack estate)
-+ expr)
-+)
-+
-+(define (rtx-env-stack-dump env-stack)
-+ (let ((stack env-stack))
-+ (if (rtx-env-stack-empty? stack)
-+ (display "rtx-env stack (empty):\n")
-+ (let loop ((stack stack) (level 0))
-+ (if (null? stack)
-+ #f ; done
-+ (begin
-+ (display "rtx-env stack, level ")
-+ (display level)
-+ (display ":\n")
-+ (for-each (lambda (var)
-+ (display " ")
-+ ;(display (obj:name (rtx-temp-mode (cdr var))))
-+ ;(display " ")
-+ (display (rtx-temp-name (cdr var)))
-+ (newline))
-+ (car stack))
-+ (loop (cdr stack) (+ level 1)))))))
-+)
-+
-+; Build, test, and analyze various kinds of rtx's.
-+; ??? A lot of this could be machine generated except that I don't yet need
-+; that much.
-+
-+(define (rtx-make kind . args)
-+ (cons kind (rtx-munge-mode&options (rtx-lookup kind) 'DFLT kind args))
-+)
-+
-+(define rtx-name car)
-+(define (rtx-kind? kind rtx) (eq? kind (rtx-name rtx)))
-+
-+(define (rtx-make-const mode value) (rtx-make 'const mode value))
-+(define (rtx-make-enum mode value) (rtx-make 'enum mode value))
-+
-+(define (rtx-constant? rtx) (memq (rtx-name rtx) '(const enum)))
-+
-+; Return value of constant RTX (either const or enum).
-+(define (rtx-constant-value rtx)
-+ (case (rtx-name rtx)
-+ ((const) (rtx-const-value rtx))
-+ ((enum) (car (enum-lookup-val (rtx-enum-value rtx))))
-+ (else (error "rtx-constant-value: not const or enum" rtx)))
-+)
-+
-+(define rtx-options cadr)
-+(define rtx-mode caddr)
-+(define rtx-args cdddr)
-+(define rtx-arg1 cadddr)
-+(define (rtx-arg2 rtx) (car (cddddr rtx)))
-+
-+(define rtx-const-value rtx-arg1)
-+(define rtx-enum-value rtx-arg1)
-+
-+(define rtx-reg-name rtx-arg1)
-+
-+; Return register number or #f if absent.
-+; (reg options mode hw-name [regno [selector]])
-+(define (rtx-reg-number rtx) (list-maybe-ref rtx 4))
-+
-+; Return register selector or #f if absent.
-+(define (rtx-reg-selector rtx) (list-maybe-ref rtx 5))
-+
-+; Return both register number and selector.
-+(define rtx-reg-index-sel cddddr)
-+
-+; Return memory address.
-+(define rtx-mem-addr rtx-arg1)
-+
-+; Return memory selector or #f if absent.
-+(define (rtx-mem-sel mem) (list-maybe-ref mem 4))
-+
-+; Return both memory address and selector.
-+(define rtx-mem-index-sel cdddr)
-+
-+; Return MEM with new address NEW-ADDR.
-+; ??? Complicate as necessary.
-+(define (rtx-change-address mem new-addr)
-+ (rtx-make 'mem
-+ (rtx-options mem)
-+ (rtx-mode mem)
-+ new-addr
-+ (rtx-mem-sel mem))
-+)
-+
-+; Return argument to `symbol' rtx.
-+(define rtx-symbol-name rtx-arg1)
-+
-+(define (rtx-make-ifield mode-name ifield-name)
-+ (rtx-make 'ifield mode-name ifield-name)
-+)
-+(define (rtx-ifield? rtx) (eq? 'ifield (rtx-name rtx)))
-+(define (rtx-ifield-name rtx)
-+ (let ((ifield (rtx-arg1 rtx)))
-+ (if (symbol? ifield)
-+ ifield
-+ (obj:name ifield)))
-+)
-+(define (rtx-ifield-obj rtx)
-+ (let ((ifield (rtx-arg1 rtx)))
-+ (if (symbol? ifield)
-+ (current-ifld-lookup ifield)
-+ ifield))
-+)
-+
-+(define (rtx-make-operand mode-name op-name)
-+ (rtx-make 'operand mode-name op-name)
-+)
-+(define (rtx-operand? rtx) (eq? 'operand (rtx-name rtx)))
-+;; FIXME: This should just fetch rtx-arg1,
-+;; operand rtxes shouldn't have objects, that's what xop is for.
-+(define (rtx-operand-name rtx)
-+ (let ((operand (rtx-arg1 rtx)))
-+ (if (symbol? operand)
-+ operand
-+ (obj:name operand)))
-+)
-+
-+;; Given an operand rtx, return the <operand> object.
-+;; RTX must be canonical rtl.
-+;; ISA-NAME-LIST is the list of ISAs to look the operand up in.
-+;;
-+;; NOTE: op:mode-name can be DFLT, which means use the mode of the type.
-+;; It is up to the caller to deal with it.
-+
-+(define (rtx-operand-obj rtx isa-name-list)
-+ (let ((op (current-op-lookup (rtx-arg1 rtx) isa-name-list))
-+ (mode-name (rtx-mode rtx)))
-+ (assert op)
-+ (assert (not (eq? mode-name 'DFLT)))
-+ ;; Ensure requested mode is supported by the hardware.
-+ ;; rtx-canonicalize should have verified this already (I think).
-+ (assert (hw-mode-ok? (op:type op) mode-name (op:index op)))
-+ op)
-+)
-+
-+(define (rtx-make-local mode-name local-name)
-+ (rtx-make 'local mode-name local-name)
-+)
-+(define (rtx-local? rtx) (eq? 'local (rtx-name rtx)))
-+(define (rtx-local-name rtx)
-+ (let ((local (rtx-arg1 rtx)))
-+ (if (symbol? local)
-+ local
-+ (obj:name local)))
-+)
-+(define (rtx-local-obj rtx)
-+ (let ((local (rtx-arg1 rtx)))
-+ (if (symbol? local)
-+ (error "can't use rtx-local-obj on local name")
-+ local))
-+)
-+
-+(define (rtx-make-xop op)
-+ (rtx-make 'xop (op:mode-name op) op)
-+)
-+(define rtx-xop-obj rtx-arg1)
-+
-+;(define (rtx-opspec? rtx) (eq? 'opspec (rtx-name rtx)))
-+;(define (rtx-opspec-mode rtx) (rtx-mode rtx))
-+;(define (rtx-opspec-hw-ref rtx) (list-ref rtx 5))
-+;(define (rtx-opspec-set-op-num! rtx num) (set-car! (cddddr rtx) num))
-+
-+(define rtx-index-of-value rtx-arg1)
-+
-+(define (rtx-make-set dest src) (rtx-make 'set dest src))
-+(define rtx-set-dest rtx-arg1)
-+(define rtx-set-src rtx-arg2)
-+(define (rtx-single-set? rtx) (memq (car rtx) '(set set-quiet)))
-+
-+(define rtx-alu-op-mode rtx-mode)
-+(define (rtx-alu-op-arg rtx n) (list-ref rtx (+ n 3)))
-+
-+(define (rtx-boolif-op-arg rtx n) (list-ref rtx (+ n 3)))
-+
-+(define rtx-cmp-op-mode rtx-mode)
-+(define (rtx-cmp-op-arg rtx n) (list-ref rtx (+ n 3)))
-+
-+(define rtx-number-list-values cdddr)
-+
-+(define rtx-member-value rtx-arg1)
-+(define (rtx-member-set rtx) (list-ref rtx 4))
-+
-+(define rtx-if-mode rtx-mode)
-+(define (rtx-if-test rtx) (rtx-arg1 rtx))
-+(define (rtx-if-then rtx) (list-ref rtx 4))
-+; If `else' clause is missing the result is #f.
-+(define (rtx-if-else rtx) (list-maybe-ref rtx 5))
-+
-+(define (rtx-eq-attr-owner rtx) (list-ref rtx 3))
-+(define (rtx-eq-attr-attr rtx) (list-ref rtx 4))
-+(define (rtx-eq-attr-value rtx) (list-ref rtx 5))
-+
-+(define (rtx-sequence-locals rtx) (cadddr rtx))
-+(define (rtx-sequence-exprs rtx) (cddddr rtx))
-+
-+; Same as rtx-sequence-locals except return in assq'able form.
-+; ??? Sometimes I think it should have been (sequence ((name MODE)) ...)
-+; instead of (sequence ((MODE name)) ...) from the beginning, sigh.
-+
-+(define (rtx-sequence-assq-locals rtx)
-+ (let ((locals (rtx-sequence-locals rtx)))
-+ (map (lambda (local)
-+ (list (cadr local) (car local)))
-+ locals))
-+)
-+
-+(define (rtx-closure-isas rtx) (list-ref rtx 3))
-+(define (rtx-closure-env-stack rtx) (list-ref rtx 4))
-+(define (rtx-closure-expr rtx) (list-ref rtx 5))
-+
-+; Return a semi-pretty string describing RTX.
-+; This is used by hw to include the index in the element's name.
-+
-+(define (rtx-pretty-name rtx)
-+ (if (pair? rtx)
-+ (case (car rtx)
-+ ((const) (number->string (rtx-const-value rtx)))
-+ ((operand) (symbol->string (rtx-operand-name rtx)))
-+ ((local) (symbol->string (rtx-local-name rtx)))
-+ ((xop) (symbol->string (obj:name (rtx-xop-obj rtx))))
-+ (else
-+ (if (null? (cdr rtx))
-+ (rtx-pretty-name (car rtx))
-+ (apply stringsym-append
-+ (cons (rtx-pretty-name (car rtx))
-+ (map (lambda (elm)
-+ (string-append "-" (rtx-pretty-name elm)))
-+ (cdr rtx)))))))
-+ (stringize rtx "-"))
-+)
-+
-+; Various rtx utilities.
-+
-+; Dump an rtx expression.
-+
-+(define (rtx-dump rtx)
-+ (cond ((list? rtx) (map rtx-dump rtx))
-+ ((object? rtx) (string/symbol-append "#<object "
-+ (object-class-name rtx)
-+ " "
-+ (obj:name rtx)
-+ ">"))
-+ (else rtx))
-+)
-+
-+; Dump an expression to a string.
-+
-+(define (rtx-strdump rtx)
-+ (with-output-to-string
-+ (lambda ()
-+ ;; Use write instead of display, we want strings displayed with quotes.
-+ (write (rtx-dump rtx))))
-+)
-+
-+;; Return the pretty-printed from of RTX.
-+
-+(define (rtx-pretty-strdump rtx)
-+ (with-output-to-string
-+ (lambda ()
-+ (pretty-print (rtx-dump rtx))))
-+)
-+
-+; Return a boolean indicating if EXPR is known to be a compile-time constant.
-+
-+(define (rtx-compile-time-constant? expr)
-+ (cond ((pair? expr)
-+ (case (car expr)
-+ ((const enum) #t)
-+ (else #f)))
-+ ((memq expr '(FALSE TRUE)) #t)
-+ (else #f))
-+)
-+
-+; Return boolean indicating if EXPR has side-effects.
-+; FIXME: for now punt.
-+
-+(define (rtx-side-effects? expr)
-+ #f
-+)
-+
-+; Return a boolean indicating if EXPR is a "true" boolean value.
-+;
-+; ??? In RTL, #t is a synonym for (const 1). This is confusing for Schemers,
-+; so maybe RTL's #t should be renamed to TRUE.
-+
-+(define (rtx-true? expr)
-+ (cond ((pair? expr)
-+ (case (car expr)
-+ ((const enum) (!= (rtx-constant-value expr) 0))
-+ (else #f)))
-+ ((eq? expr 'TRUE) #t)
-+ (else #f))
-+)
-+
-+; Return a boolean indicating if EXPR is a "false" boolean value.
-+;
-+; ??? In RTL, #f is a synonym for (const 0). This is confusing for Schemers,
-+; so maybe RTL's #f should be renamed to FALSE.
-+
-+(define (rtx-false? expr)
-+ (cond ((pair? expr)
-+ (case (car expr)
-+ ((const enum) (= (rtx-constant-value expr) 0))
-+ (else #f)))
-+ ((eq? expr 'FALSE) #t)
-+ (else #f))
-+)
-+
-+; Return canonical boolean values.
-+
-+(define (rtx-false) (rtx-make-const 'BI 0))
-+(define (rtx-true) (rtx-make-const 'BI 1))
-+
-+; Convert EXPR to a canonical boolean if possible.
-+
-+(define (rtx-canonical-bool expr)
-+ (cond ((rtx-side-effects? expr) expr)
-+ ((rtx-false? expr) (rtx-false))
-+ ((rtx-true? expr) (rtx-true))
-+ (else expr))
-+)
-+
-+; Return rtx values for #f/#t.
-+
-+(define (rtx-make-bool value)
-+ (if value
-+ (rtx-true)
-+ (rtx-false))
-+)
-+
-+; Return #t if X is an rtl expression.
-+; e.g. '(add WI dr simm8);
-+
-+(define (rtx? x)
-+ (->bool
-+ (and (pair? x) ; pair? -> cheap non-null-list?
-+ (or (hashq-ref /rtx-func-table (car x))
-+ (hashq-ref /rtx-macro-table (car x)))))
-+)
-+
-+; Instruction field support.
-+
-+; Return list of ifield names refered to in EXPR.
-+; Assumes EXPR is more than just (ifield x).
-+
-+(define (rtl-find-ifields expr)
-+ (let ((ifields nil))
-+ (letrec ((scan! (lambda (arg-list)
-+ (for-each (lambda (arg)
-+ (if (pair? arg)
-+ (if (eq? (car arg) 'ifield)
-+ (set! ifields
-+ (cons (rtx-ifield-name arg)
-+ ifields))
-+ (scan! (cdr arg)))))
-+ arg-list))))
-+ (scan! (cdr expr))
-+ (nub ifields identity)))
-+)
-+
-+; Hardware rtx handlers.
-+
-+; Subroutine of hw to compute the object's name.
-+; The name of the operand must include the index so that multiple copies
-+; of a hardware object (e.g. h-gr[0], h-gr[14]) can be distinguished.
-+; We make some attempt to make the name pretty as it appears in generated
-+; files.
-+
-+(define (/rtx-hw-name hw hw-name index-arg)
-+ (cond ((hw-scalar? hw)
-+ hw-name)
-+ ((rtx? index-arg)
-+ (symbolstr-append hw-name '- (rtx-pretty-name index-arg)))
-+ (else
-+ (symbolstr-append hw-name ; (obj:name (op:type self))
-+ '-
-+ ; (obj:name (op:index self)))))
-+ (stringize index-arg "-"))))
-+)
-+
-+; Return the <operand> object described by
-+; HW-NAME/MODE-NAME/SELECTOR/INDEX-ARG.
-+;
-+; HW-NAME is the name of the hardware element.
-+; MODE-NAME is the name of the mode.
-+; INDEX-ARG is an rtx or number of the index.
-+; In the case of scalar hardware elements, pass 0 for INDEX-ARG.
-+; In the case of a vector of registers, INDEX-ARG is the vector index.
-+; SELECTOR is an rtx or number and is passed to HW-NAME to allow selection of a
-+; particular variant of the hardware. It's kind of like an INDEX, but along
-+; an atypical axis. An example is memory ASI's on Sparc. Pass
-+; hw-selector-default if there is no selector.
-+; ESTATE is the current rtx evaluation state.
-+;
-+; *** The index is passed unevaluated because for parallel execution support
-+; *** a variable is created with a name based on the hardware element and
-+; *** index, and we want a reasonably simple and stable name. We get this by
-+; *** stringize-ing it.
-+; *** ??? Though this needs to be redone anyway.
-+;
-+; ??? The specified hardware element must be either a scalar or a vector.
-+; Maybe in the future allow arrays although there's significant utility in
-+; allowing only at most a scalar index.
-+
-+(define (/hw estate mode-name hw-name index-arg selector)
-+ ; Enforce some rules to keep things in line with the current design.
-+ (if (not (symbol? mode-name))
-+ (parse-error (estate-context estate) "invalid mode name" mode-name))
-+ (if (not (symbol? hw-name))
-+ (parse-error (estate-context estate) "invalid hw name" hw-name))
-+ (if (not (or (number? index-arg)
-+ (rtx? index-arg)))
-+ (parse-error (estate-context estate) "invalid index" index-arg))
-+ (if (not (or (number? selector)
-+ (rtx? selector)))
-+ (parse-error (estate-context estate) "invalid selector" selector))
-+
-+ (let ((hw (current-hw-sem-lookup-1 hw-name)))
-+ (if (not hw)
-+ (parse-error (estate-context estate) "invalid hardware element" hw-name))
-+
-+ (let* ((mode (if (eq? mode-name 'DFLT) (hw-mode hw) (mode:lookup mode-name)))
-+ (hw-name-with-mode (symbol-append hw-name '- (obj:name mode)))
-+ (index-mode (if (eq? hw-name 'h-memory) 'AI 'INT))
-+ (result (if (hw-pc? hw)
-+ (new <pc>)
-+ (new <operand>)))) ; ??? lookup-for-new?
-+
-+ (if (not mode)
-+ (parse-error (estate-context estate) "invalid mode" mode-name))
-+
-+ ; Record the selector.
-+ (elm-xset! result 'selector selector)
-+
-+ ; Create the index object.
-+ (elm-xset! result 'index
-+ (cond ((number? index-arg)
-+ (make <hw-index> 'anonymous 'constant UINT index-arg))
-+ ((rtx? index-arg)
-+ ; Make sure constant indices are recorded as such.
-+ (case (rtx-name index-arg)
-+ ((const)
-+ (make <hw-index> 'anonymous 'constant UINT
-+ (rtx-constant-value index-arg)))
-+ ((enum)
-+ (make-enum-hw-index 'anonymous (rtx-enum-value index-arg)))
-+ (else
-+ (make <hw-index> 'anonymous 'rtx (mode:lookup index-mode)
-+ (/rtx-closure-make estate index-mode index-arg)))))
-+ (else (parse-error (estate-context estate)
-+ "invalid index" index-arg))))
-+
-+ (if (not (hw-mode-ok? hw (obj:name mode) (elm-xget result 'index)))
-+ (parse-error (estate-context estate)
-+ "invalid mode for hardware" mode-name))
-+
-+ (elm-xset! result 'hw-name hw-name)
-+ (elm-xset! result 'type hw)
-+ (elm-xset! result 'mode-name mode-name)
-+ (elm-xset! result 'mode mode)
-+
-+ (op:set-pretty-sem-name! result hw-name)
-+
-+ ; The name of the operand must include the index so that multiple copies
-+ ; of a hardware object (e.g. h-gr[0], h-gr[14]) can be distinguished.
-+ (let ((name (if (hw-pc? hw)
-+ 'pc
-+ (/rtx-hw-name hw hw-name-with-mode index-arg))))
-+ (send result 'set-name! name)
-+ (op:set-sem-name! result name))
-+
-+ ; Empty comment and attribute.
-+ ; ??? Stick the arguments in the comment for debugging purposes?
-+ (send result 'set-comment! "")
-+ (send result 'set-atlist! atlist-empty)
-+
-+ result))
-+)
-+
-+; This is shorthand for (hw estate mode hw-name regno selector).
-+; ESTATE is the current rtx evaluation state.
-+; INDX-SEL is an optional register number and possible selector.
-+; The register number, if present, is (car indx-sel) and must be a number or
-+; unevaluated canonical RTX expression.
-+; The selector, if present, is (cadr indx-sel) and must be a number or
-+; unevaluated canonical RTX expression.
-+; ??? A register selector isn't supported yet. It's just an idea that's
-+; been put down on paper for future reference.
-+
-+(define (reg estate mode-name hw-name . indx-sel)
-+ (s-hw estate mode-name hw-name
-+ (if (pair? indx-sel) (car indx-sel) 0)
-+ (if (and (pair? indx-sel) (pair? (cdr indx-sel)))
-+ (cadr indx-sel)
-+ hw-selector-default))
-+)
-+
-+; This is shorthand for (hw estate mode-name h-memory addr selector).
-+; ADDR must be an unevaluated canonical RTX expression.
-+; If present (car sel) must be a number or unevaluated canonical
-+; RTX expression.
-+
-+(define (mem estate mode-name addr . sel)
-+ (s-hw estate mode-name 'h-memory addr
-+ (if (pair? sel) (car sel) hw-selector-default))
-+)
-+
-+; For the rtx nodes to use.
-+
-+(define s-hw /hw)
-+
-+; The program counter.
-+; When this code is loaded, global `pc' is nil, it hasn't been set to the
-+; pc operand yet (see operand-init!). We can't use `pc' inside the drn as the
-+; value is itself. So we use s-pc. rtl-finish! must be called after
-+; operand-init!.
-+
-+(define s-pc pc)
-+
-+; Conditional execution.
-+
-+; `if' in RTL has a result, like ?: in C.
-+; We support both: one with a result (non VOID mode), and one without (VOID mode).
-+; The non-VOID case must have an else part.
-+; MODE is the mode of the result, not the comparison.
-+; The comparison is expected to return a zero/non-zero value.
-+; ??? Perhaps this should be a syntax-expr. Later.
-+
-+(define (e-if estate mode cond then . else)
-+ (if (> (length else) 1)
-+ (estate-error estate "if: too many elements in `else' part" else))
-+ (if (null? else)
-+ (if cond then)
-+ (if cond then (car else)))
-+)
-+
-+; Subroutines.
-+; ??? Not sure this should live here.
-+
-+(define (/subr-read context . arg-list)
-+ #f
-+)
-+
-+(define define-subr
-+ (lambda arg-list
-+ (let ((s (apply /subr-read (cons "define-subr" arg-list))))
-+ (if s
-+ (current-subr-add! s))
-+ s))
-+)
-+
-+; Misc. utilities.
-+
-+; The argument to drn,drmn,drsn must be Scheme code (or a fixed subset
-+; thereof). .str/.sym are used in pmacros so it makes sense to include them
-+; in the subset.
-+; FIXME: Huh?
-+(define .str string-append)
-+(define .sym symbol-append)
-+
-+; Given (expr1 expr2 expr3 expr4), for example,
-+; return (fn (fn (fn expr1 expr2) expr3) expr4).
-+
-+(define (rtx-combine fn exprs)
-+ (assert (not (null? exprs)))
-+ (letrec ((-rtx-combine (lambda (fn exprs result)
-+ (if (null? exprs)
-+ result
-+ (-rtx-combine fn
-+ (cdr exprs)
-+ (rtx-make fn
-+ result
-+ (car exprs)))))))
-+ (-rtx-combine fn (cdr exprs) (car exprs)))
-+)
-+
-+; Called before a .cpu file is read in.
-+
-+(define (rtl-init!)
-+ (set! /rtx-func-table (make-hash-table 127))
-+ (set! /rtx-macro-table (make-hash-table 127))
-+ (set! /rtx-num-next 0)
-+ (def-rtx-funcs)
-+
-+ ; Sanity checks.
-+ ; All rtx take options for the first arg and a mode for the second.
-+ (for-each (lambda (rtx-name)
-+ (let ((rtx (rtx-lookup rtx-name)))
-+ (if rtx
-+ (begin
-+ (if (null? (rtx-arg-types rtx))
-+ #f ; pc is the one exception, blech
-+ (begin
-+ (assert (eq? (car (rtx-arg-types rtx)) 'OPTIONS))
-+ (assert (memq (cadr (rtx-arg-types rtx)) /rtx-valid-mode-types)))))
-+ #f) ; else a macro
-+ ))
-+ /rtx-name-list)
-+
-+ (reader-add-command! 'define-subr
-+ "\
-+Define an rtx subroutine, name/value pair list version.
-+"
-+ nil 'arg-list define-subr)
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; Install builtins
-+
-+(define (rtl-builtin!)
-+ (rtx-init-traversal-tables!)
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Called after cpu files are loaded to add misc. remaining entries to the
-+; rtx handler table for use during evaluation.
-+; rtl-finish! must be done before ifmt-compute!, the latter will
-+; construct hardware objects which is done by rtx evaluation.
-+
-+(define (rtl-finish!)
-+ (logit 2 "Building rtx operand table ...\n")
-+
-+ ; Update s-pc, must be called after operand-init!.
-+ (set! s-pc pc)
-+
-+ ; Initialize the operand hash table.
-+ (set! /rtx-operand-table (make-hash-table 127))
-+
-+ ; Add the operands to the eval symbol table.
-+ (for-each (lambda (op)
-+ (hashq-set! /rtx-operand-table (obj:name op) op))
-+ (current-op-list))
-+
-+ ; Add ifields to the eval symbol table.
-+ (for-each (lambda (f)
-+ (hashq-set! /rtx-operand-table (obj:name f) f))
-+ (non-derived-ifields (current-ifld-list)))
-+
-+ *UNSPECIFIED*
-+)
-diff -Nur binutils-2.24.orig/cgen/rtl-traverse.scm binutils-2.24/cgen/rtl-traverse.scm
---- binutils-2.24.orig/cgen/rtl-traverse.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/rtl-traverse.scm 2016-06-30 21:26:12.669893734 +0200
-@@ -0,0 +1,2222 @@
-+;; RTL traversing support.
-+;; Copyright (C) 2000, 2001, 2009, 2010 Red Hat, Inc.
-+;; This file is part of CGEN.
-+;; See file COPYING.CGEN for details.
-+
-+;; Canonicalization support.
-+;; Canonicalizing an rtl expression involves adding possibly missing options
-+;; and mode, and converting occurrences of DFLT into usable modes.
-+;; Various error checks are done as well.
-+;; This is done differently than traversal support because it has a more
-+;; specific purpose, it doesn't need to support arbitrary "expr-fns".
-+;; ??? At present the internal form is also the source form (easier debugging).
-+
-+(define /rtx-canon-debug? #f)
-+
-+;; Canonicalization state.
-+;; This carries the immutable elements only!
-+;; OUTER-EXPR is the EXPR argument to rtx-canonicalize.
-+
-+(define (/make-cstate context isa-name-list outer-expr)
-+ (vector context isa-name-list outer-expr)
-+)
-+
-+(define (/cstate-context cstate) (vector-ref cstate 0))
-+(define (/cstate-isas cstate) (vector-ref cstate 1))
-+(define (/cstate-outer-expr cstate) (vector-ref cstate 2))
-+
-+;; Flag an error while canonicalizing rtl.
-+
-+(define (/rtx-canon-error cstate errmsg expr parent-expr op-num)
-+ (let* ((pretty-parent-expr (rtx-pretty-strdump (/cstate-outer-expr cstate)))
-+ (intro (if parent-expr
-+ (string-append "While canonicalizing "
-+ (rtx-strdump parent-expr)
-+ (if op-num
-+ (string-append ", operand #"
-+ (number->string op-num))
-+ "")
-+ " of:\n"
-+ pretty-parent-expr)
-+ (string-append "While canonicalizing:\n" pretty-parent-expr))))
-+ (context-error (/cstate-context cstate) intro errmsg (rtx-dump expr)))
-+)
-+
-+;; Lookup h/w object HW-NAME and return it (as a <hardware-base> object).
-+;; If multiple h/w objects with the same name are defined, require
-+;; all to have the same mode.
-+;; CHECK-KIND is a function of one argument to verify the h/w objects
-+;; are valid and if not flag an error.
-+
-+(define (/rtx-lookup-hw cstate hw-name parent-expr check-kind)
-+ (let ((hw-objs (current-hw-sem-lookup hw-name)))
-+
-+ (if (null? hw-objs)
-+ (/rtx-canon-error cstate "unknown h/w object"
-+ hw-name parent-expr #f))
-+
-+ ;; Just check the first one with CHECK-KIND.
-+ (check-kind (car hw-objs))
-+
-+ (let* ((hw1 (car hw-objs))
-+ (hw1-mode (hw-mode hw1))
-+ (hw1-mode-name (obj:name hw1-mode)))
-+
-+ ;; Allow multiple h/w objects with the same name
-+ ;; as long has they have the same mode.
-+ (if (> (length hw-objs) 1)
-+ (let ((other-hw-mode-names (map (lambda (hw)
-+ (obj:name (hw-mode hw)))
-+ (cdr hw-objs))))
-+ (if (not (all-true? (map (lambda (mode-name)
-+ (eq? mode-name hw1-mode-name))
-+ other-hw-mode-names)))
-+ (/rtx-canon-error cstate "multiple h/w objects with different modes selected"
-+ hw-name parent-expr #f))))
-+
-+ hw1))
-+)
-+
-+;; Return the mode name to use in an expression given the requested mode
-+;; and the mode used in the expression.
-+;; If both are DFLT, leave it alone and hope the expression provides
-+;; enough info to pick a usable mode.
-+;; If both are provided, prefer the mode used in the expression.
-+;; If the modes are incompatible, return #f.
-+
-+(define (/rtx-pick-mode cstate requested-mode-name expr-mode-name)
-+ (cond ((eq? requested-mode-name 'DFLT)
-+ expr-mode-name)
-+ ((eq? expr-mode-name 'DFLT)
-+ requested-mode-name)
-+ (else
-+ (let ((requested-mode (mode:lookup requested-mode-name))
-+ (expr-mode (mode:lookup expr-mode-name)))
-+ (if (not requested-mode)
-+ (/rtx-canon-error cstate "invalid mode" requested-mode-name #f #f))
-+ (if (not expr-mode)
-+ (/rtx-canon-error cstate "invalid mode" expr-mode-name #f #f))
-+ ;; FIXME: 'would prefer samesize or "no precision lost", sigh
-+ (if (mode-compatible? 'sameclass requested-mode expr-mode)
-+ expr-mode-name
-+ expr-mode-name)))) ;; FIXME: should be #f, disabled pending completion of rtl mode handling rewrite
-+)
-+
-+;; Return the mode name (as a symbol) to use in an object's rtl given
-+;; the requested mode, the mode used in the expression, and the object's
-+;; real mode.
-+;; If both requested mode and expr mode are DFLT, use the real mode.
-+;; If requested mode is DFLT, prefer expr mode.
-+;; If expr mode is DFLT, prefer the real mode.
-+;; If both requested mode and expr mode are specified, prefer expr-mode.
-+;; If there's an error the result is the error message (as a string).
-+;;
-+;; E.g. in (set SI dest (ifield DFLT f-r1)), the mode of the ifield's
-+;; expression is DFLT, the requested mode is SI, and the real mode of f-r1
-+;; may be INT.
-+;;
-+;; REAL-MODE is a <mode> object.
-+
-+(define (/rtx-pick-mode3 requested-mode-name expr-mode-name real-mode)
-+ ;; Leave checking for (symbol? requested-mode-name) to caller (or higher).
-+ (let ((expr-mode (mode:lookup expr-mode-name)))
-+ (cond ((not expr-mode)
-+ "unknown mode")
-+ ((eq? requested-mode-name 'DFLT)
-+ (if (eq? expr-mode-name 'DFLT)
-+ (obj:name real-mode)
-+ (if (rtx-mode-compatible? expr-mode real-mode)
-+ expr-mode-name
-+ (string-append "expression mode "
-+ (symbol->string expr-mode-name)
-+ " is incompatible with real mode "
-+ (obj:str-name real-mode)))))
-+ ((eq? expr-mode-name 'DFLT)
-+ (if (rtx-mode-compatible? (mode:lookup requested-mode-name)
-+ real-mode)
-+ (obj:name real-mode)
-+ (string-append "mode of containing expression "
-+ (symbol->string requested-mode-name)
-+ " is incompatible with real mode "
-+ (obj:str-name real-mode))))
-+ (else
-+ (let ((requested-mode (mode:lookup requested-mode-name)))
-+ (cond ((not (rtx-mode-compatible? requested-mode expr-mode))
-+ (string-append "mode of containing expression "
-+ (symbol->string requested-mode-name)
-+ " is incompatible with expression mode "
-+ (symbol->string expr-mode-name)))
-+ ((not (rtx-mode-compatible? expr-mode real-mode))
-+ (string-append "expression mode "
-+ (symbol->string expr-mode-name)
-+ " is incompatible with real mode "
-+ (obj:str-name real-mode)))
-+ (else
-+ expr-mode-name))))))
-+)
-+
-+;; Return the mode name (as a symbol) to use in an operand's rtl given
-+;; the requested mode, the mode used in the expression, and the operand's
-+;; real mode.
-+;; If both requested mode and expr mode are DFLT, use the real mode.
-+;; If requested mode is DFLT, prefer expr mode.
-+;; If expr mode is DFLT, prefer the real mode.
-+;; If both requested mode and expr mode are specified, prefer expr-mode.
-+;; If the modes are incompatible an error is signalled.
-+;;
-+;; E.g. in (set QI (mem QI src2) src1), the mode to set is QI, but if src1
-+;; is a 32-bit (SI) register we want QI.
-+;; OTOH, in (set QI (mem QI src2) uimm8), the mode to set is QI, but we want
-+;; the real mode of uimm8.
-+;;
-+;; ??? This is different from /rtx-pick-mode3 for compatibility with
-+;; pre-full-canonicalization versions.
-+; It's currently a toss-up on whether it improves things.
-+;;
-+;; OP is an <operand> object.
-+;;
-+;; Things are complicated because multiple versions of a h/w object can be
-+;; defined, and the operand refers to the h/w by name.
-+;; op:type, which op:mode calls, will flag an error if multiple versions of
-+;; a h/w object are defined - only one should have been kept during .cpu
-+;; file loading. This is for semantic code generation, but for generating
-+;; files covering the entire architecture we need to keep all the versions.
-+;; Things are ok, as far as canonicalization is concerned, if all h/w versions
-+;; have the same mode (which could be WI for 32/64 arches).
-+
-+(define (/rtx-pick-op-mode cstate requested-mode-name expr-mode-name op
-+ parent-expr)
-+ ;; Leave checking for (symbol? requested-mode-name) to caller (or higher).
-+ (let* ((op-mode-name (op:mode-name op))
-+ (hw (/rtx-lookup-hw cstate (op:hw-name op) parent-expr
-+ (lambda (hw) *UNSPECIFIED*)))
-+ (op-mode (if (eq? op-mode-name 'DFLT)
-+ (hw-mode hw)
-+ (mode:lookup op-mode-name)))
-+ (expr-mode (mode:lookup expr-mode-name)))
-+ (cond ((not expr-mode)
-+ (/rtx-canon-error cstate "unknown mode" expr-mode-name
-+ parent-expr #f))
-+ ((eq? requested-mode-name 'DFLT)
-+ (if (eq? expr-mode-name 'DFLT)
-+ (obj:name op-mode)
-+ (if (rtx-mode-compatible? expr-mode op-mode)
-+ expr-mode-name
-+ (/rtx-canon-error cstate
-+ (string-append
-+ "expression mode "
-+ (symbol->string expr-mode-name)
-+ " is incompatible with operand mode "
-+ (obj:str-name op-mode))
-+ expr-mode-name parent-expr #f))))
-+ ((eq? expr-mode-name 'DFLT)
-+ (if (rtx-mode-compatible? (mode:lookup requested-mode-name)
-+ op-mode)
-+; FIXME: Experiment. It's currently a toss-up on whether it improves things.
-+; (cond ((pc? op)
-+; (obj:name op-mode))
-+; ((register? hw)
-+; requested-mode-name)
-+; (else
-+; (obj:name op-mode)))
-+ (obj:name op-mode)
-+ (/rtx-canon-error cstate
-+ (string-append
-+ "mode of containing expression "
-+ (symbol->string requested-mode-name)
-+ " is incompatible with operand mode "
-+ (obj:str-name op-mode))
-+ requested-mode-name parent-expr #f)))
-+ (else
-+ (let ((requested-mode (mode:lookup requested-mode-name)))
-+ (cond ((not (rtx-mode-compatible? requested-mode expr-mode))
-+ (/rtx-canon-error cstate
-+ (string-append
-+ "mode of containing expression "
-+ (symbol->string requested-mode-name)
-+ " is incompatible with expression mode "
-+ (symbol->string expr-mode-name))
-+ requested-mode-name parent-expr #f))
-+ ((not (rtx-mode-compatible? expr-mode op-mode))
-+ (/rtx-canon-error cstate
-+ (string-append
-+ "expression mode "
-+ (symbol->string expr-mode-name)
-+ " is incompatible with operand mode "
-+ (obj:str-name op-mode))
-+ expr-mode-name parent-expr #f))
-+ (else
-+ expr-mode-name))))))
-+)
-+
-+;; Return the last rtx in cond or case expression EXPR.
-+
-+(define (/rtx-get-last-cond-case-rtx expr)
-+ (let ((len (length expr)))
-+ (list-ref expr (- len 1)))
-+)
-+
-+;; Canonicalize a list of rtx's.
-+;; The mode of rtxes prior to the last one must be VOID.
-+
-+(define (/rtx-canon-rtx-list rtx-list mode parent-expr op-num cstate env depth)
-+ (let* ((nr-rtxes (length rtx-list))
-+ (last-op-num (- nr-rtxes 1)))
-+ (map (lambda (rtx op-num)
-+ (/rtx-canon rtx 'RTX
-+ (if (= op-num last-op-num) mode 'VOID)
-+ parent-expr op-num cstate env depth))
-+ rtx-list (iota nr-rtxes)))
-+)
-+
-+;; Rtx canonicalizers.
-+;; These are defined as individual functions that are then built into a table
-+;; mostly for simplicity.
-+;
-+;; The result is either a pair of the parsed VAL and new environment,
-+;; or #f meaning there is no change (saves lots of unnecessarying cons'ing).
-+
-+(define (/rtx-canon-options val mode parent-expr op-num cstate env depth)
-+ #f
-+)
-+
-+(define (/rtx-canon-anyintmode val mode parent-expr op-num cstate env depth)
-+ (let ((val-obj (mode:lookup val)))
-+ (if (and val-obj
-+ (or (memq (mode:class val-obj) '(INT UINT))
-+ (eq? val 'DFLT)))
-+ #f
-+ (/rtx-canon-error cstate "expecting an integer mode"
-+ val parent-expr op-num)))
-+)
-+
-+(define (/rtx-canon-anyfloatmode val mode parent-expr op-num cstate env depth)
-+ (let ((val-obj (mode:lookup val)))
-+ (if (and val-obj
-+ (or (memq (mode:class val-obj) '(FLOAT))
-+ (eq? val 'DFLT)))
-+ #f
-+ (/rtx-canon-error cstate "expecting a float mode"
-+ val parent-expr op-num)))
-+)
-+
-+(define (/rtx-canon-anynummode val mode parent-expr op-num cstate env depth)
-+ (let ((val-obj (mode:lookup val)))
-+ (if (and val-obj
-+ (or (memq (mode:class val-obj) '(INT UINT FLOAT))
-+ (eq? val 'DFLT)))
-+ #f
-+ (/rtx-canon-error cstate "expecting a numeric mode"
-+ val parent-expr op-num)))
-+)
-+
-+(define (/rtx-canon-anyexprmode val mode parent-expr op-num cstate env depth)
-+ (let ((val-obj (mode:lookup val)))
-+ (if (and val-obj
-+ (or (memq (mode:class val-obj) '(INT UINT FLOAT))
-+ (memq val '(DFLT PTR VOID SYM))))
-+ #f
-+ (/rtx-canon-error cstate "expecting a numeric mode, PTR, VOID, or SYM"
-+ val parent-expr op-num)))
-+)
-+
-+(define (/rtx-canon-anycexprmode val mode parent-expr op-num cstate env depth)
-+ (let ((val-obj (mode:lookup val)))
-+ (if (and val-obj
-+ (or (memq (mode:class val-obj) '(INT UINT FLOAT))
-+ (memq val '(DFLT PTR VOID))))
-+ #f
-+ (/rtx-canon-error cstate "expecting a numeric mode, PTR, or VOID"
-+ val parent-expr op-num)))
-+)
-+
-+(define (/rtx-canon-explnummode val mode parent-expr op-num cstate env depth)
-+ (let ((val-obj (mode:lookup val)))
-+ (if (and val-obj
-+ (memq (mode:class val-obj) '(INT UINT FLOAT)))
-+ #f
-+ (/rtx-canon-error cstate "expecting an explicit numeric mode"
-+ val parent-expr op-num)))
-+)
-+
-+(define (/rtx-canon-voidornummode val mode parent-expr op-num cstate env depth)
-+ (let ((val-obj (mode:lookup val)))
-+ (if (and val-obj
-+ (or (memq (mode:class val-obj) '(INT UINT FLOAT))
-+ (memq val '(DFLT VOID))))
-+ #f
-+ (/rtx-canon-error cstate "expecting void or a numeric mode"
-+ val parent-expr op-num)))
-+)
-+
-+(define (/rtx-canon-voidmode val mode parent-expr op-num cstate env depth)
-+ (if (memq val '(DFLT VOID))
-+ (cons 'VOID env)
-+ (/rtx-canon-error cstate "expecting VOID mode"
-+ val parent-expr op-num))
-+)
-+
-+(define (/rtx-canon-bimode val mode parent-expr op-num cstate env depth)
-+ (if (memq val '(DFLT BI))
-+ (cons 'BI env)
-+ (/rtx-canon-error cstate "expecting BI mode"
-+ val parent-expr op-num))
-+)
-+
-+(define (/rtx-canon-intmode val mode parent-expr op-num cstate env depth)
-+ (if (memq val '(DFLT INT))
-+ (cons 'INT env)
-+ (/rtx-canon-error cstate "expecting INT mode"
-+ val parent-expr op-num))
-+)
-+
-+(define (/rtx-canon-symmode val mode parent-expr op-num cstate env depth)
-+ (if (memq val '(DFLT SYM))
-+ (cons 'SYM env)
-+ (/rtx-canon-error cstate "expecting SYM mode"
-+ val parent-expr op-num))
-+)
-+
-+(define (/rtx-canon-insnmode val mode parent-expr op-num cstate env depth)
-+ (if (memq val '(DFLT INSN))
-+ (cons 'INSN env)
-+ (/rtx-canon-error cstate "expecting INSN mode"
-+ val parent-expr op-num))
-+)
-+
-+(define (/rtx-canon-machmode val mode parent-expr op-num cstate env depth)
-+ (if (memq val '(DFLT MACH))
-+ (cons 'MACH env)
-+ (/rtx-canon-error cstate "expecting MACH mode"
-+ val parent-expr op-num))
-+)
-+
-+(define (/rtx-canon-rtx val mode parent-expr op-num cstate env depth)
-+; Commented out 'cus it doesn't quite work yet.
-+; (if (not (rtx? val))
-+; (/rtx-canon-error cstate "expecting an rtx" val parent-expr op-num))
-+ (cons (/rtx-canon val 'RTX mode parent-expr op-num cstate env depth)
-+ env)
-+)
-+
-+(define (/rtx-canon-setrtx val mode parent-expr op-num cstate env depth)
-+; Commented out 'cus it doesn't quite work yet.
-+; (if (not (rtx? val))
-+; (/rtx-canon-error cstate "expecting an rtx" val parent-expr op-num))
-+ (let ((dest (/rtx-canon val 'SETRTX mode parent-expr op-num cstate env depth)))
-+ (cons dest env))
-+)
-+
-+;; This is the test of an `if'.
-+
-+(define (/rtx-canon-testrtx val mode parent-expr op-num cstate env depth)
-+; Commented out 'cus it doesn't quite work yet.
-+; (if (not (rtx? val))
-+; (/rtx-canon-error cstate "expecting an rtx"
-+; val parent-expr op-num))
-+ (cons (/rtx-canon val 'RTX mode parent-expr op-num cstate env depth)
-+ env)
-+)
-+
-+(define (/rtx-canon-condrtx val mode parent-expr op-num cstate env depth)
-+ (if (not (pair? val))
-+ (/rtx-canon-error cstate "expecting an expression"
-+ val parent-expr op-num))
-+ (if (eq? (car val) 'else)
-+ (begin
-+ (if (!= (+ op-num 2) (length parent-expr))
-+ (/rtx-canon-error cstate "`else' clause not last"
-+ val parent-expr op-num))
-+ (cons (cons 'else
-+ (/rtx-canon-rtx-list
-+ (cdr val) mode parent-expr op-num cstate env depth))
-+ env))
-+ (cons (cons
-+ ;; ??? Entries after the first are conditional.
-+ (/rtx-canon (car val) 'RTX 'INT parent-expr op-num cstate env depth)
-+ (/rtx-canon-rtx-list
-+ (cdr val) mode parent-expr op-num cstate env depth))
-+ env))
-+)
-+
-+(define (/rtx-canon-casertx val mode parent-expr op-num cstate env depth)
-+ (if (or (not (list? val))
-+ (< (length val) 2))
-+ (/rtx-canon-error cstate "invalid `case' expression"
-+ val parent-expr op-num))
-+ ;; car is either 'else or list of symbols/numbers
-+ (if (not (or (eq? (car val) 'else)
-+ (and (list? (car val))
-+ (not (null? (car val)))
-+ (all-true? (map /rtx-symornum?
-+ (car val))))))
-+ (/rtx-canon-error cstate "invalid `case' choice"
-+ val parent-expr op-num))
-+ (if (and (eq? (car val) 'else)
-+ (!= (+ op-num 2) (length parent-expr)))
-+ (/rtx-canon-error cstate "`else' clause not last"
-+ val parent-expr op-num))
-+ (cons (cons (car val)
-+ (/rtx-canon-rtx-list
-+ (cdr val) mode parent-expr op-num cstate env depth))
-+ env)
-+)
-+
-+(define (/rtx-canon-locals val mode parent-expr op-num cstate env depth)
-+ (if (not (list? val))
-+ (/rtx-canon-error cstate "bad locals list"
-+ val parent-expr op-num))
-+ (for-each (lambda (var)
-+ (if (or (not (list? var))
-+ (!= (length var) 2)
-+ (not (/rtx-any-mode? (car var)))
-+ (not (symbol? (cadr var))))
-+ (/rtx-canon-error cstate "bad locals list"
-+ val parent-expr op-num)))
-+ val)
-+ (let ((new-env (rtx-env-make-locals val)))
-+ (cons val (cons new-env env)))
-+)
-+
-+(define (/rtx-canon-iteration val mode parent-expr op-num cstate env depth)
-+ (if (not (symbol? val))
-+ (/rtx-canon-error cstate "bad iteration variable name"
-+ val parent-expr op-num))
-+ (let ((new-env (rtx-env-make-iteration-locals val)))
-+ (cons val (cons new-env env)))
-+)
-+
-+(define (/rtx-canon-symbol-list val mode parent-expr op-num cstate env depth)
-+ (if (or (not (list? val))
-+ (not (all-true? (map symbol? val))))
-+ (/rtx-canon-error cstate "bad symbol list"
-+ val parent-expr op-num))
-+ #f
-+)
-+
-+(define (/rtx-canon-env-stack val mode parent-expr op-num cstate env depth)
-+ ;; VAL is an environment stack.
-+ (if (not (list? val))
-+ (/rtx-canon-error cstate "environment not a list"
-+ val parent-expr op-num))
-+ ;; FIXME: Shouldn't this push VAL onto ENV?
-+ (cons val env)
-+)
-+
-+(define (/rtx-canon-attrs val mode parent-expr op-num cstate env depth)
-+; (cons val ; (atlist-source-form (atlist-parse (make-prefix-cstate "with-attr") val ""))
-+; env)
-+ #f
-+)
-+
-+(define (/rtx-canon-symbol val mode parent-expr op-num cstate env depth)
-+ (if (not (symbol? val))
-+ (/rtx-canon-error cstate "expecting a symbol"
-+ val parent-expr op-num))
-+ #f
-+)
-+
-+(define (/rtx-canon-string val mode parent-expr op-num cstate env depth)
-+ (if (not (string? val))
-+ (/rtx-canon-error cstate "expecting a string"
-+ val parent-expr op-num))
-+ #f
-+)
-+
-+(define (/rtx-canon-number val mode parent-expr op-num cstate env depth)
-+ (if (not (number? val))
-+ (/rtx-canon-error cstate "expecting a number"
-+ val parent-expr op-num))
-+ #f
-+)
-+
-+(define (/rtx-canon-symornum val mode parent-expr op-num cstate env depth)
-+ (if (not (or (symbol? val) (number? val)))
-+ (/rtx-canon-error cstate "expecting a symbol or number"
-+ val parent-expr op-num))
-+ #f
-+)
-+
-+(define (/rtx-canon-object val mode parent-expr op-num cstate env depth)
-+ #f
-+)
-+
-+;; Table of rtx canonicalizers.
-+;; This is a vector of size rtx-max-num.
-+;; Each entry is a list of (arg-type-name . canonicalizer) elements
-+;; for rtx-arg-types.
-+;; FIXME: Initialized in rtl.scm (i.e. outside this file).
-+
-+(define /rtx-canoner-table #f)
-+
-+;; Return a hash table of standard operand canonicalizers.
-+;; The result of each canonicalizer is a pair of the canonical form
-+;; of `val' and a possibly new environment or #f if there is no change.
-+
-+(define (/rtx-make-canon-table)
-+ (let ((hash-tab (make-hash-table 31))
-+ (canoners
-+ (list
-+ (cons 'OPTIONS /rtx-canon-options)
-+ (cons 'ANYINTMODE /rtx-canon-anyintmode)
-+ (cons 'ANYFLOATMODE /rtx-canon-anyfloatmode)
-+ (cons 'ANYNUMMODE /rtx-canon-anynummode)
-+ (cons 'ANYEXPRMODE /rtx-canon-anyexprmode)
-+ (cons 'ANYCEXPRMODE /rtx-canon-anycexprmode)
-+ (cons 'EXPLNUMMODE /rtx-canon-explnummode)
-+ (cons 'VOIDORNUMMODE /rtx-canon-voidornummode)
-+ (cons 'VOIDMODE /rtx-canon-voidmode)
-+ (cons 'BIMODE /rtx-canon-bimode)
-+ (cons 'INTMODE /rtx-canon-intmode)
-+ (cons 'SYMMODE /rtx-canon-symmode)
-+ (cons 'INSNMODE /rtx-canon-insnmode)
-+ (cons 'MACHMODE /rtx-canon-machmode)
-+ (cons 'RTX /rtx-canon-rtx)
-+ (cons 'SETRTX /rtx-canon-setrtx)
-+ (cons 'TESTRTX /rtx-canon-testrtx)
-+ (cons 'CONDRTX /rtx-canon-condrtx)
-+ (cons 'CASERTX /rtx-canon-casertx)
-+ (cons 'LOCALS /rtx-canon-locals)
-+ (cons 'ITERATION /rtx-canon-iteration)
-+ (cons 'SYMBOLLIST /rtx-canon-symbol-list)
-+ (cons 'ENVSTACK /rtx-canon-env-stack)
-+ (cons 'ATTRS /rtx-canon-attrs)
-+ (cons 'SYMBOL /rtx-canon-symbol)
-+ (cons 'STRING /rtx-canon-string)
-+ (cons 'NUMBER /rtx-canon-number)
-+ (cons 'SYMORNUM /rtx-canon-symornum)
-+ (cons 'OBJECT /rtx-canon-object)
-+ )))
-+
-+ (for-each (lambda (canoner)
-+ (hashq-set! hash-tab (car canoner) (cdr canoner)))
-+ canoners)
-+
-+ hash-tab)
-+)
-+
-+;; Standard expression operand canonicalizer.
-+;; Loop over the operands, verifying them according to the argument type
-+;; and mode matcher, and replace DFLT with a usable mode.
-+
-+(define (/rtx-canon-operands rtx-obj requested-mode-name
-+ func args parent-expr parent-op-num
-+ cstate env depth)
-+ ;; ??? Might want to just leave operands as a list.
-+ (let* ((operands (list->vector args))
-+ (nr-operands (vector-length operands))
-+ (this-expr (cons func args)) ;; For error messages.
-+ (expr-mode
-+ ;; For sets, the requested mode is DFLT or VOID (the mode of the
-+ ;; result), but the mode we want is the mode of the set destination.
-+ (if (rtx-result-mode rtx-obj)
-+ (cadr args) ;; mode of arg2 doesn't come from containing expr
-+ (/rtx-pick-mode cstate requested-mode-name (cadr args))))
-+ (all-arg-types (vector-ref /rtx-canoner-table (rtx-num rtx-obj))))
-+
-+ (if (not expr-mode)
-+ (/rtx-canon-error cstate
-+ (string-append "requested mode "
-+ (symbol->string requested-mode-name)
-+ " is incompatible with expression mode "
-+ (symbol->string (cadr args)))
-+ this-expr parent-expr #f))
-+
-+ (if /rtx-canon-debug?
-+ (begin
-+ (display (spaces (* 4 depth)))
-+ (display "expr-mode ")
-+ (display expr-mode)
-+ (newline)
-+ (force-output)))
-+
-+ (let loop ((env env)
-+ (op-num 0)
-+ (arg-types all-arg-types)
-+ (arg-modes (rtx-arg-modes rtx-obj)))
-+
-+ (let ((varargs? (and (pair? arg-types) (symbol? (car arg-types)))))
-+
-+ (if /rtx-canon-debug?
-+ (begin
-+ (display (spaces (* 4 depth)))
-+ (if (= op-num nr-operands)
-+ (display "end of operands")
-+ (begin
-+ (display "op-num ") (display op-num) (display ": ")
-+ (display (rtx-dump (vector-ref operands op-num)))
-+ (display ", ")
-+ (display (if varargs? (car arg-types) (caar arg-types)))
-+ (display ", ")
-+ (display (if varargs? arg-modes (car arg-modes)))
-+ ))
-+ (newline)
-+ (force-output)))
-+
-+ (cond ((= op-num nr-operands)
-+
-+ ;; Out of operands, check if we have the expected number.
-+ (if (or (null? arg-types)
-+ varargs?)
-+
-+ ;; We're theoretically done.
-+ (let ((set-mode-from-arg!
-+ (lambda (arg-num)
-+ (if /rtx-canon-debug?
-+ (begin
-+ (display (spaces (* 4 depth)))
-+ (display "Computing expr mode from arguments.")
-+ (newline)))
-+ (let* ((expr-to-match
-+ (case func
-+ ((cond case)
-+ (/rtx-get-last-cond-case-rtx (vector-ref operands arg-num)))
-+ (else
-+ (vector-ref operands arg-num))))
-+ (expr-to-match-obj (rtx-lookup (rtx-name expr-to-match)))
-+ (new-expr-mode (or (rtx-result-mode expr-to-match-obj)
-+ (let ((expr-mode (rtx-mode expr-to-match)))
-+ (if (eq? expr-mode 'DFLT)
-+ (if (eq? requested-mode-name 'DFLT)
-+ (/rtx-canon-error cstate
-+ "unable to determine mode of expression from arguments, please specify a mode"
-+ this-expr parent-expr #f)
-+ requested-mode-name)
-+ expr-mode)))))
-+ ;; Verify the mode to be recorded matches the spec.
-+ (let* ((expr-mode-spec (cadr all-arg-types))
-+ (canoner (cdr expr-mode-spec)))
-+ ;; Ignore the result of the canoner, we just
-+ ;; want the error checking.
-+ (canoner new-expr-mode #f this-expr 1
-+ cstate env depth))
-+ (vector-set! operands 1 new-expr-mode)))))
-+
-+ ;; The expression's mode might still be DFLT.
-+ ;; If it is, fetch the mode of the MATCHEXPR operand,
-+ ;; or MATCHSEQ operand, or containing expression.
-+ ;; If it's still DFLT, flag an error.
-+ (if (eq? (vector-ref operands 1) 'DFLT)
-+ (cond ((rtx-matchexpr-index rtx-obj)
-+ => (lambda (matchexpr-index)
-+ (set-mode-from-arg! matchexpr-index)))
-+ ((eq? func 'sequence)
-+ (set-mode-from-arg! (- nr-operands 1)))
-+ (else
-+ (if /rtx-canon-debug?
-+ (begin
-+ (display (spaces (* 4 depth)))
-+ (display "Computing expr mode from containing expression.")
-+ (newline)))
-+ (if (or (eq? requested-mode-name 'DFLT)
-+ (rtx-result-mode rtx-obj))
-+ (/rtx-canon-error cstate
-+ "unable to determine mode of expression, please specify a mode"
-+ this-expr parent-expr #f)
-+ (vector-set! operands 1 requested-mode-name)))))
-+ (vector->list operands))
-+
-+ (/rtx-canon-error cstate "missing operands"
-+ this-expr parent-expr #f)))
-+
-+ ((null? arg-types)
-+ (/rtx-canon-error cstate "too many operands"
-+ this-expr parent-expr #f))
-+
-+ (else
-+ (let ((type (if varargs? arg-types (car arg-types)))
-+ (mode (let ((mode-spec (if varargs?
-+ arg-modes
-+ (car arg-modes))))
-+ ;; We don't necessarily have enough information
-+ ;; at this point. Just propagate what we do know,
-+ ;; and leave it for final processing to fix up what
-+ ;; we missed.
-+ ;; This is small enough that case is fast enough,
-+ ;; and the number of entries should be stable.
-+ (case mode-spec
-+ ((ANY) 'DFLT)
-+ ((ANYINT) 'DFLT) ;; FIXME
-+ ((NA) #f)
-+ ((MATCHEXPR) expr-mode)
-+ ((MATCHSEQ)
-+ (if (= (+ op-num 1) nr-operands) ;; last one?
-+ expr-mode
-+ 'VOID))
-+ ((MATCH2)
-+ ;; This is complicated by the fact that some
-+ ;; rtx have a different result mode than what
-+ ;; is specified in the rtl (e.g. set, eq).
-+ ;; ??? Make these rtx specify both modes?
-+ (let* ((op2 (vector-ref operands 2))
-+ (op2-obj (rtx-lookup (rtx-name op2))))
-+ (or (rtx-result-mode op2-obj)
-+ (rtx-mode op2))))
-+ ((MATCH3)
-+ ;; This is complicated by the fact that some
-+ ;; rtx have a different result mode than what
-+ ;; is specified in the rtl (e.g. set, eq).
-+ ;; ??? Make these rtx specify both modes?
-+ (let* ((op2 (vector-ref operands 3))
-+ (op2-obj (rtx-lookup (rtx-name op2))))
-+ (or (rtx-result-mode op2-obj)
-+ (rtx-mode op2))))
-+ ;; Otherwise mode-spec is the mode to use.
-+ (else mode-spec))))
-+ (val (vector-ref operands op-num))
-+ )
-+
-+ ;; Look up the canoner for this operand and perform it.
-+ ;; FIXME: This would benefit from returning multiple values.
-+ (let ((canoner (cdr type)))
-+ (let ((canon-val (canoner val mode this-expr op-num
-+ cstate env depth)))
-+ (if canon-val
-+ (begin
-+ (set! val (car canon-val))
-+ (set! env (cdr canon-val))))))
-+
-+ (vector-set! operands op-num val)
-+
-+ ;; Done with this operand, proceed to the next.
-+ (loop env
-+ (+ op-num 1)
-+ (if varargs? arg-types (cdr arg-types))
-+ (if varargs? arg-modes (cdr arg-modes)))))))))
-+)
-+
-+(define (/rtx-canon-rtx-enum rtx-obj requested-mode-name
-+ func args parent-expr parent-op-num
-+ cstate env depth)
-+ (if (!= (length args) 3)
-+ (/rtx-canon-error cstate "wrong number of operands to enum, expecting 3"
-+ (cons func args) parent-expr #f))
-+
-+ (let ((mode-name (cadr args))
-+ (enum-name (caddr args)))
-+ (let ((mode-obj (mode:lookup mode-name))
-+ (enum-val-and-obj (enum-lookup-val enum-name)))
-+
-+ (if (not enum-val-and-obj)
-+ (/rtx-canon-error cstate "unknown enum value"
-+ enum-name parent-expr #f))
-+
-+ (let ((expr-mode-or-errmsg (/rtx-pick-mode3 requested-mode-name mode-name INT)))
-+ (if (symbol? expr-mode-or-errmsg)
-+ (list (car args) expr-mode-or-errmsg enum-name)
-+ (/rtx-canon-error cstate expr-mode-or-errmsg
-+ enum-name parent-expr #f)))))
-+)
-+
-+(define (/rtx-canon-rtx-ifield rtx-obj requested-mode-name
-+ func args parent-expr parent-op-num
-+ cstate env depth)
-+ (if (!= (length args) 3)
-+ (/rtx-canon-error cstate "wrong number of operands to ifield, expecting 3"
-+ (cons func args) parent-expr #f))
-+
-+ (let ((expr-mode-name (cadr args))
-+ (ifld-name (caddr args)))
-+ (let ((ifld-obj (current-ifld-lookup ifld-name)))
-+
-+ (if ifld-obj
-+
-+ (let ((mode-or-errmsg (/rtx-pick-mode3 requested-mode-name
-+ expr-mode-name
-+ (ifld-mode ifld-obj))))
-+ (if (symbol? mode-or-errmsg)
-+ (list (car args) mode-or-errmsg ifld-name)
-+ (/rtx-canon-error cstate mode-or-errmsg expr-mode-name
-+ parent-expr parent-op-num)))
-+
-+ (/rtx-canon-error cstate "unknown ifield"
-+ ifld-name parent-expr #f))))
-+)
-+
-+(define (/rtx-canon-rtx-operand rtx-obj requested-mode-name
-+ func args parent-expr parent-op-num
-+ cstate env depth)
-+ (if (!= (length args) 3)
-+ (/rtx-canon-error cstate "wrong number of operands to operand, expecting 3"
-+ (cons func args) parent-expr #f))
-+
-+ (let ((expr-mode-name (cadr args))
-+ (op-name (caddr args)))
-+ (let ((op-obj (current-op-lookup op-name (/cstate-isas cstate))))
-+
-+ (if op-obj
-+
-+ (let ((mode (/rtx-pick-op-mode cstate requested-mode-name
-+ expr-mode-name op-obj parent-expr)))
-+ (list (car args) mode op-name))
-+
-+ (/rtx-canon-error cstate "unknown operand"
-+ op-name parent-expr #f))))
-+)
-+
-+(define (/rtx-canon-rtx-xop rtx-obj requested-mode-name
-+ func args parent-expr parent-op-num
-+ cstate env depth)
-+ (if (!= (length args) 3)
-+ (/rtx-canon-error cstate "wrong number of operands to xop, expecting 3"
-+ (cons func args) parent-expr #f))
-+
-+ (let ((expr-mode-name (cadr args))
-+ (xop-obj (caddr args)))
-+
-+ (if (operand? xop-obj)
-+
-+ (let ((mode-or-errmsg (/rtx-pick-mode3 requested-mode-name
-+ expr-mode-name
-+ (op:mode xop-obj))))
-+ (if (symbol? mode-or-errmsg)
-+ (list (car args) mode-or-errmsg xop-obj)
-+ (/rtx-canon-error cstate mode-or-errmsg expr-mode-name
-+ parent-expr parent-op-num)))
-+
-+ (/rtx-canon-error cstate "xop operand #2 not an operand"
-+ (obj:name xop-obj) parent-expr #f)))
-+)
-+
-+(define (/rtx-canon-rtx-local rtx-obj requested-mode-name
-+ func args parent-expr parent-op-num
-+ cstate env depth)
-+ (if (!= (length args) 3)
-+ (/rtx-canon-error cstate "wrong number of operands to local, expecting 3"
-+ (cons func args) parent-expr #f))
-+
-+ (let ((expr-mode-name (cadr args))
-+ (local-name (caddr args)))
-+ (let ((local-obj (rtx-temp-lookup env local-name)))
-+
-+ (if local-obj
-+
-+ (let ((mode-or-errmsg (/rtx-pick-mode3 requested-mode-name
-+ expr-mode-name
-+ (rtx-temp-mode local-obj))))
-+ (if (symbol? mode-or-errmsg)
-+ (list (car args) mode-or-errmsg local-name)
-+ (/rtx-canon-error cstate mode-or-errmsg expr-mode-name
-+ parent-expr parent-op-num)))
-+
-+ (/rtx-canon-error cstate "unknown local"
-+ local-name parent-expr #f))))
-+)
-+
-+(define (/rtx-canon-rtx-ref rtx-obj requested-mode-name
-+ func args parent-expr parent-op-num
-+ cstate env depth)
-+ (if (!= (length args) 3)
-+ (/rtx-canon-error cstate "wrong number of operands to ref, expecting 3"
-+ (cons func args) parent-expr #f))
-+
-+ (let ((expr-mode-name (cadr args))
-+ (ref-name (caddr args)))
-+ ;; FIXME: Will current-op-lookup find named operands?
-+ (let ((op-obj (current-op-lookup ref-name (/cstate-isas cstate))))
-+
-+ (if op-obj
-+
-+ ;; The result of "ref" is canonically an INT.
-+ (let ((mode-or-errmsg (/rtx-pick-mode3 requested-mode-name
-+ expr-mode-name
-+ INT)))
-+ (if (symbol? mode-or-errmsg)
-+ (list (car args) mode-or-errmsg ref-name)
-+ (/rtx-canon-error cstate mode-or-errmsg expr-mode-name
-+ parent-expr parent-op-num)))
-+
-+ (/rtx-canon-error cstate "unknown operand"
-+ ref-name parent-expr #f))))
-+)
-+
-+(define (/rtx-canon-rtx-reg rtx-obj requested-mode-name
-+ func args parent-expr parent-op-num
-+ cstate env depth)
-+ (let ((len (length args)))
-+ (if (or (< len 3) (> len 5))
-+ (/rtx-canon-error cstate
-+ ;; TODO: be more firm on expected number of args
-+ (string-append
-+ "wrong number of operands to "
-+ (symbol->string func)
-+ ", expecting 3 (or possibly 4,5)")
-+ (cons func args) parent-expr #f))
-+
-+ (let ((expr-mode-name (cadr args))
-+ (hw-name (caddr args))
-+ (this-expr (cons func args)))
-+ (let* ((hw (/rtx-lookup-hw cstate hw-name parent-expr
-+ (lambda (hw)
-+ (if (not (register? hw))
-+ (/rtx-canon-error cstate "not a register" hw-name
-+ parent-expr parent-op-num))
-+ *UNSPECIFIED*)))
-+ (hw-mode-obj (hw-mode hw)))
-+
-+ (let ((mode-or-errmsg (/rtx-pick-mode3 requested-mode-name
-+ expr-mode-name
-+ hw-mode-obj)))
-+
-+ (if (symbol? mode-or-errmsg)
-+
-+ ;; Canonicalizing optional index/selector.
-+ (let ((index (if (>= len 4)
-+ (let ((canon (/rtx-canon-rtx
-+ (list-ref args 3) 'INT
-+ this-expr 3 cstate env depth)))
-+ (car canon)) ;; discard env
-+ #f))
-+ (sel (if (= len 5)
-+ (let ((canon (/rtx-canon-rtx
-+ (list-ref args 4) 'INT
-+ this-expr 4 cstate env depth)))
-+ (car canon)) ;; discard env
-+ #f)))
-+ (if sel
-+ (begin
-+ (assert index)
-+ (list (car args) mode-or-errmsg hw-name index sel))
-+ (if index
-+ (list (car args) mode-or-errmsg hw-name index)
-+ (list (car args) mode-or-errmsg hw-name))))
-+
-+ (/rtx-canon-error cstate mode-or-errmsg expr-mode-name
-+ parent-expr parent-op-num))))))
-+)
-+
-+(define (/rtx-canon-rtx-mem rtx-obj requested-mode-name
-+ func args parent-expr parent-op-num
-+ cstate env depth)
-+ (let ((len (length args)))
-+ (if (or (< len 3) (> len 4))
-+ (/rtx-canon-error cstate
-+ "wrong number of operands to mem, expecting 3 (or possibly 4)"
-+ (cons func args) parent-expr #f))
-+
-+ (let ((expr-mode-name (cadr args))
-+ (addr-expr (caddr args))
-+ (this-expr (cons func args)))
-+
-+ ;; Call /rtx-canon-explnummode just for the error checking.
-+ (/rtx-canon-explnummode expr-mode-name #f this-expr 1 cstate env depth)
-+
-+ (if (and (not (eq? requested-mode-name 'DFLT))
-+ ;; FIXME: 'would prefer samesize or "no precision lost", sigh
-+ (not (mode-compatible? 'sameclass
-+ requested-mode-name expr-mode-name)))
-+ (/rtx-canon-error cstate
-+ (string-append "requested mode "
-+ (symbol->string requested-mode-name)
-+ " is incompatible with expression mode "
-+ (symbol->string expr-mode-name))
-+ this-expr parent-expr #f))
-+
-+ (let ((addr (car ;; discard env
-+ (/rtx-canon-rtx (list-ref args 2) 'AI
-+ this-expr 2 cstate env depth)))
-+ (sel (if (= len 4)
-+ (let ((canon (/rtx-canon-rtx (list-ref args 3) 'INT
-+ this-expr 3 cstate env depth)))
-+ (car canon)) ;; discard env
-+ #f)))
-+ (if sel
-+ (list (car args) expr-mode-name addr sel)
-+ (list (car args) expr-mode-name addr)))))
-+)
-+
-+(define (/rtx-canon-rtx-const rtx-obj requested-mode-name
-+ func args parent-expr parent-op-num
-+ cstate env depth)
-+ (if (!= (length args) 3)
-+ (/rtx-canon-error cstate "wrong number of operands to const, expecting 3"
-+ (cons func args) parent-expr #f))
-+
-+ ;; ??? floating point support is wip
-+ ;; NOTE: (integer? 1.0) == #t, but (inexact? 1.0) ==> #t too.
-+
-+ (let ((expr-mode-name1 (if (and (eq? requested-mode-name 'DFLT)
-+ (eq? (cadr args) 'DFLT))
-+ 'INT
-+ (cadr args)))
-+ (value (caddr args))
-+ (this-expr (cons func args)))
-+
-+ (let ((expr-mode-name (/rtx-pick-mode cstate requested-mode-name
-+ expr-mode-name1)))
-+
-+ (if (not expr-mode-name)
-+ (/rtx-canon-error cstate
-+ (string-append "requested mode "
-+ (symbol->string requested-mode-name)
-+ " is incompatible with expression mode "
-+ (symbol->string expr-mode-name1))
-+ this-expr parent-expr #f))
-+
-+ (let ((expr-mode (mode:lookup expr-mode-name)))
-+
-+ (cond ((integer? value)
-+ (if (not (memq (mode:class expr-mode) '(INT UINT FLOAT)))
-+ (/rtx-canon-error cstate "integer value incompatible with mode"
-+ value this-expr 2)))
-+ ((inexact? value)
-+ (if (not (memq (mode:class expr-mode) '(FLOAT)))
-+ (/rtx-canon-error cstate "floating point value incompatible with mode"
-+ value this-expr 2)))
-+ (else
-+ (/rtx-canon-error cstate
-+ (string-append "expecting a"
-+ (if (eq? (mode:class expr-mode) 'FLOAT)
-+ " floating point"
-+ "n integer")
-+ " constant")
-+ value this-expr 2)))
-+
-+ (list (car args) expr-mode-name value))))
-+)
-+
-+;; Table of operand canonicalizers.
-+;; The main one is /rtx-traverse-operands, but a few rtx functions are simple
-+;; and special-purpose enough that it's simpler to have specific traversers.
-+
-+(define /rtx-operand-canoners #f)
-+
-+;; Return list of rtx functions that have special purpose canoners.
-+
-+(define (/rtx-special-expr-canoners)
-+ (list
-+ (cons 'enum /rtx-canon-rtx-enum)
-+ (cons 'ifield /rtx-canon-rtx-ifield)
-+ (cons 'operand /rtx-canon-rtx-operand)
-+ ;;(cons 'name /rtx-canon-rtx-name) ;; ??? needed?
-+ (cons 'xop /rtx-canon-rtx-xop) ;; yes, it can appear
-+ (cons 'local /rtx-canon-rtx-local)
-+ (cons 'ref /rtx-canon-rtx-ref)
-+ ;;(cons 'index-of /rtx-canon-rtx-index-of) ;; ??? needed?
-+ (cons 'reg /rtx-canon-rtx-reg)
-+ (cons 'raw-reg /rtx-canon-rtx-reg)
-+ (cons 'mem /rtx-canon-rtx-mem)
-+ (cons 'const /rtx-canon-rtx-const)
-+ )
-+)
-+
-+;; Subroutine of rtx-munge-mode&options.
-+;; Return boolean indicating if X is an rtx option.
-+
-+(define (/rtx-option? x)
-+ (keyword? x)
-+)
-+
-+;; Subroutine of rtx-munge-mode&options.
-+;; Return boolean indicating if X is an rtx option list.
-+
-+(define (/rtx-option-list? x)
-+ (or (null? x)
-+ (and (pair? x)
-+ (/rtx-option? (car x))))
-+)
-+
-+;; Subroutine of /rtx-canon-expr to fill in the options and mode if absent.
-+;; The result is the canonical form of ARGS.
-+;;
-+;; "munge" is an awkward name to use here, but I like it for now because
-+;; it's easy to grep for.
-+;; An empty option list requires a mode to be present so that the empty
-+;; list in `(sequence () foo bar)' is unambiguously recognized as the locals
-+;; list. Icky, sure, but less icky than the alternatives thus far.
-+
-+(define (rtx-munge-mode&options rtx-obj requested-mode-name func args)
-+ (let ((orig-args args)
-+ (options #f)
-+ (mode-name #f)
-+ ;; The mode in a `set' is the mode of the destination,
-+ ;; whereas the mode of the result is VOID.
-+ ;; The mode in a compare (e.g. `eq') is the mode of the operands,
-+ ;; but the mode of the result is BI.
-+ (requested-mode-name (if (rtx-result-mode rtx-obj)
-+ 'DFLT ;; mode of args doesn't come from containing expr
-+ 'DFLT))) ;; FIXME: requested-mode-name)))
-+
-+ ;; Pick off the option list if present.
-+ (if (and (pair? args)
-+ (/rtx-option-list? (car args))
-+ ;; Handle `(sequence () foo bar)'. If empty list isn't followed
-+ ;; by a mode, it is not an option list.
-+ (or (not (null? (car args)))
-+ (and (pair? (cdr args))
-+ (mode-name? (cadr args)))))
-+ (begin
-+ (set! options (car args))
-+ (set! args (cdr args))))
-+
-+ ;; Pick off the mode if present.
-+ (if (and (pair? args)
-+ (mode-name? (car args)))
-+ (begin
-+ (set! mode-name (car args))
-+ (set! args (cdr args))))
-+
-+ ;; Now put option list and mode back.
-+ ;; But don't do unnecessary consing.
-+ (if options
-+ (if (and mode-name (not (eq? mode-name 'DFLT)))
-+ orig-args ;; can return ARGS unchanged
-+ (cons options (cons requested-mode-name args)))
-+ (if (and mode-name (not (eq? mode-name 'DFLT)))
-+ (cons nil orig-args) ;; just need to insert options
-+ (cons nil (cons requested-mode-name args)))))
-+)
-+
-+;; Subroutine of /rtx-canon to simplify it.
-+
-+(define (/rtx-canon-expr rtx-obj requested-mode-name
-+ func args parent-expr op-num cstate env depth)
-+ (let ((args2 (rtx-munge-mode&options rtx-obj requested-mode-name func args)))
-+
-+ (if /rtx-canon-debug?
-+ (begin
-+ (display (spaces (* 4 depth)))
-+ (display "Traversing operands of: ")
-+ (display (rtx-dump (cons func args)))
-+ (newline)
-+ (display (spaces (* 4 depth)))
-+ (display "Requested mode: ")
-+ (display requested-mode-name)
-+ (newline)
-+ (display (spaces (* 4 depth)))
-+ (rtx-env-stack-dump env)
-+ (force-output)))
-+
-+ (let* ((canoner (vector-ref /rtx-operand-canoners (rtx-num rtx-obj)))
-+ (operands (canoner rtx-obj requested-mode-name
-+ func args2 parent-expr op-num
-+ cstate env (+ depth 1))))
-+ (cons func operands)))
-+)
-+
-+;; Convert rtl expression EXPR from source form to canonical form.
-+;; The expression is validated and rtx macros are expanded as well.
-+;; Plus DFLT mode is converted to a useful mode.
-+;; The result is EXPR in canonical form.
-+;;
-+;; CSTATE is a <cstate> object or #f if there is none.
-+;; It is used in error messages.
-+
-+(define (/rtx-canon expr expected mode parent-expr op-num cstate env depth)
-+ (if /rtx-canon-debug?
-+ (begin
-+ (display (spaces (* 4 depth)))
-+ (display "Canonicalizing (")
-+ (display mode)
-+ (display "): ")
-+ (display (rtx-dump expr))
-+ (newline)
-+ (display (spaces (* 4 depth)))
-+ (rtx-env-stack-dump env)
-+ (force-output)
-+ ))
-+
-+ (let ((result
-+ (if (pair? expr) ;; pair? -> cheap non-null-list?
-+
-+ (let ((rtx-name (car expr)))
-+ (if (not (symbol? rtx-name))
-+ (/rtx-canon-error cstate "invalid rtx function name"
-+ expr parent-expr op-num))
-+ (let ((rtx-obj (rtx-lookup rtx-name)))
-+ (if rtx-obj
-+ (let ((canon-expr
-+ (/rtx-canon-expr rtx-obj mode rtx-name (cdr expr)
-+ parent-expr op-num cstate env depth)))
-+ (if (eq? mode 'VOID)
-+ (let ((expr-mode (or (rtx-result-mode rtx-obj)
-+ (rtx-mode canon-expr))))
-+ (if (not (eq? expr-mode 'VOID))
-+ (/rtx-canon-error cstate "non-VOID-mode expression"
-+ expr parent-expr op-num))))
-+ canon-expr)
-+ (let ((rtx-obj (/rtx-macro-lookup rtx-name)))
-+ (if rtx-obj
-+ (/rtx-canon (/rtx-macro-expand expr rtx-evaluator)
-+ expected mode parent-expr op-num cstate env (+ depth 1))
-+ (/rtx-canon-error cstate "unknown rtx function"
-+ expr parent-expr op-num))))))
-+
-+ ;; EXPR is not a list.
-+ ;; See if it's an operand shortcut.
-+ (if (memq expected '(RTX SETRTX))
-+
-+ (begin
-+ (if (eq? mode 'VOID)
-+ (/rtx-canon-error cstate "non-VOID-mode expression"
-+ expr parent-expr op-num))
-+ (cond ((symbol? expr)
-+ (cond ((current-op-lookup expr (/cstate-isas cstate))
-+ => (lambda (op)
-+ ;; NOTE: We can't simply call
-+ ;; op:mode-name here, we need the real
-+ ;; mode, not (potentially) DFLT.
-+ ;; See /rtx-pick-op-mode.
-+ (rtx-make-operand (/rtx-pick-op-mode cstate mode 'DFLT op parent-expr)
-+ expr)))
-+ ((rtx-temp-lookup env expr)
-+ => (lambda (tmp)
-+ (rtx-make-local (obj:name (rtx-temp-mode tmp)) expr)))
-+ ((current-ifld-lookup expr)
-+ => (lambda (f)
-+ (rtx-make-ifield (obj:name (ifld-mode f)) expr)))
-+ ((enum-lookup-val expr)
-+ ;; ??? If enums could have modes other than INT,
-+ ;; we'd want to propagate that mode here.
-+ (rtx-make-enum 'INT expr))
-+ (else
-+ (/rtx-canon-error cstate "unknown operand"
-+ expr parent-expr op-num))))
-+ ((integer? expr)
-+ (rtx-make-const 'INT expr))
-+ (else
-+ (/rtx-canon-error cstate "unexpected operand"
-+ expr parent-expr op-num))))
-+
-+ ;; Not expecting RTX or SETRTX.
-+ (/rtx-canon-error cstate "unexpected operand"
-+ expr parent-expr op-num)))))
-+
-+ (if /rtx-canon-debug?
-+ (begin
-+ (display (spaces (* 4 depth)))
-+ (display "Result: ")
-+ (display (rtx-dump result))
-+ (newline)
-+ (force-output)
-+ ))
-+
-+ result)
-+)
-+
-+;; Public entry point.
-+;; Convert rtl expression EXPR from source form to canonical form.
-+;; The expression is validated and rtx macros are expanded as well.
-+;; Plus operand shortcuts are expanded:
-+;; - numbers -> (const number)
-+;; - operand-name -> (operand operand-name)
-+;; - ifield-name -> (ifield ifield-name)
-+;; Plus an absent option list is replaced with ().
-+;; Plus DFLT mode is converted to a useful mode.
-+;; Plus the specified isa-name-list is recorded in the RTL.
-+;;
-+;; The result is EXPR in canonical form.
-+;;
-+;; CONTEXT is a <context> object or #f if there is none.
-+;; It is used in error messages.
-+;;
-+;; ISA-NAME-LIST is a list of ISAs in which to evaluate the expression,
-+;; e.g. to do operand lookups.
-+;; The ISAs must be compatible, e.g. operand lookups must be unambiguous.
-+;;
-+;; MODE-NAME is the requested mode of the result, or DFLT.
-+;;
-+;; EXTRA-VARS-ALIST is an association list of extra (symbol <mode> value)
-+;; elements to be used during value lookup.
-+;; VALUE can be #f which means the value is assumed to be known, but is
-+;; currently unrepresentable. This is used, for example, when representing
-+;; ifield setters: we don't know the new value, but it will be known when the
-+;; rtx is evaluated (??? Sigh, this is a bit of a cheat, closures have no
-+;; such thing, but it's useful here because we don't necessarily know what
-+;; the value will be in the application side of things).
-+
-+(define (rtx-canonicalize context mode-name isa-name-list extra-vars-alist expr)
-+ (let ((result
-+ (/rtx-canon expr 'RTX mode-name #f 0
-+ (/make-cstate context isa-name-list expr)
-+ (rtx-env-init-stack1 extra-vars-alist) 0)))
-+ (rtx-verify-no-dflt-modes context result)
-+ (rtx-make 'closure mode-name isa-name-list
-+ (rtx-var-alist-to-closure-env-stack extra-vars-alist)
-+ result))
-+)
-+
-+;; RTL expression traversal support.
-+;; This is for analyzing the semantics in some way.
-+;; The rtl must already be in canonical form.
-+
-+;; Set to #t to debug rtx traversal.
-+
-+(define /rtx-traverse-debug? #f)
-+
-+; Container to record the current state of traversal.
-+; This is initialized before traversal, and modified (in a copy) as the
-+; traversal state changes.
-+; This doesn't record all traversal state, just the more static elements.
-+; There's no point in recording things like the parent expression and operand
-+; position as they change for every sub-traversal.
-+; The main raison d'etre for this class is so we can add more state without
-+; having to modify all the traversal handlers.
-+; ??? At present it's not a proper "class" as there's no real need.
-+;
-+; CONTEXT is a <context> object or #f if there is none.
-+; It is used for error messages.
-+;
-+; EXPR-FN is a dual-purpose beast. The first purpose is to just process
-+; the current expression and return the result. The second purpose is to
-+; lookup the function which will then process the expression.
-+; It is applied recursively to the expression and each sub-expression.
-+; It must be defined as
-+; (lambda (rtx-obj expr parent-expr op-pos tstate appstuff) ...).
-+; If the result of EXPR-FN is a lambda, it is applied to
-+; (cons TSTATE EXPR), TSTATE is prepended to the arguments.
-+; For syntax expressions if the result of EXPR-FN is #f, the operands are
-+; processed using the builtin traverser.
-+; So to repeat: EXPR-FN can process the expression, and if its result is a
-+; lambda then it also processes the expression. The arguments to EXPR-FN
-+; are (rtx-obj expr parent-expr op-pos tstate appstuff). The format
-+; of the result of EXPR-FN are (cons TSTATE EXPR).
-+; The reason for the duality is that when trying to understand EXPR (e.g. when
-+; computing the insn format) EXPR-FN processes the expression itself, and
-+; when evaluating EXPR it's the result of EXPR-FN that computes the value.
-+;
-+; ISAS is a list of ISA name(s) in which to evaluate the expression.
-+;
-+; ENV is the current environment. This is a stack of sequence locals.
-+;
-+; COND? is a boolean indicating if the current expression is on a conditional
-+; execution path. This is for optimization purposes only and it is always ok
-+; to pass #t, except for the top-level caller which must pass #f (since the top
-+; level expression obviously isn't subject to any condition).
-+; It is used, for example, to speed up the simulator: there's no need to keep
-+; track of whether an operand has been assigned to (or potentially read from)
-+; if it's known it's always assigned to.
-+;
-+; OWNER is the owner of the expression or #f if there is none.
-+; Typically it is an <insn> object.
-+;
-+; KNOWN is an alist of known values. This is used by rtx-simplify.
-+; Each element is (name . value) where
-+; NAME is a scalar ifield name (in the future it might be an operand name or
-+; sequence local name), and
-+; VALUE is a const rtx, (const () mode value),
-+; or a number-list rtx, (number-list () mode value1 [value2 ...]).
-+; A "scalar ifield" is a simple ifield (not a multi or derived ifield),
-+; or a multi-ifield consisting of only simple ifields.
-+;
-+; DEPTH is the current traversal depth.
-+
-+(define (tstate-make context owner expr-fn isas env cond? known depth)
-+ (vector context owner expr-fn isas env cond? known depth)
-+)
-+
-+(define (tstate-context state) (vector-ref state 0))
-+(define (tstate-set-context! state newval) (vector-set! state 0 newval))
-+(define (tstate-owner state) (vector-ref state 1))
-+(define (tstate-set-owner! state newval) (vector-set! state 1 newval))
-+(define (tstate-expr-fn state) (vector-ref state 2))
-+(define (tstate-set-expr-fn! state newval) (vector-set! state 2 newval))
-+(define (tstate-isas state) (vector-ref state 3))
-+(define (tstate-set-isas! state newval) (vector-set! state 3 newval))
-+(define (tstate-env-stack state) (vector-ref state 4))
-+(define (tstate-set-env-stack! state newval) (vector-set! state 4 newval))
-+(define (tstate-cond? state) (vector-ref state 5))
-+(define (tstate-set-cond?! state newval) (vector-set! state 5 newval))
-+(define (tstate-known state) (vector-ref state 6))
-+(define (tstate-set-known! state newval) (vector-set! state 6 newval))
-+(define (tstate-depth state) (vector-ref state 7))
-+(define (tstate-set-depth! state newval) (vector-set! state 7 newval))
-+
-+; Create a copy of STATE.
-+
-+(define (tstate-copy state)
-+ ; A fast vector-copy would be nice, but this is simple and portable.
-+ (list->vector (vector->list state))
-+)
-+
-+;; Create a copy of STATE with environment stack ENV-STACK added,
-+;; and the ISA(s) set to ISA-NAME-LIST.
-+
-+(define (tstate-make-closure state isa-name-list env-stack)
-+ (let ((result (tstate-copy state)))
-+ (tstate-set-isas! result isa-name-list)
-+ (tstate-set-env-stack! result (append env-stack (tstate-env-stack result)))
-+ result)
-+)
-+
-+; Create a copy of STATE with environment ENV pushed onto the existing
-+; environment list.
-+; There's no routine to pop the environment list as there's no current
-+; need for it: we make a copy of the state when we push.
-+
-+(define (tstate-push-env state env)
-+ (let ((result (tstate-copy state)))
-+ (tstate-set-env-stack! result (cons env (tstate-env-stack result)))
-+ result)
-+)
-+
-+; Create a copy of STATE with a new COND? value.
-+
-+(define (tstate-new-cond? state cond?)
-+ (let ((result (tstate-copy state)))
-+ (tstate-set-cond?! result cond?)
-+ result)
-+)
-+
-+; Lookup NAME in the known value table.
-+; Returns the value or #f if not found.
-+; The value is either a const rtx or a number-list rtx.
-+
-+(define (tstate-known-lookup tstate name)
-+ (let ((known (tstate-known tstate)))
-+ (assq-ref known name))
-+)
-+
-+; Increment the recorded traversal depth of TSTATE.
-+
-+(define (tstate-incr-depth! tstate)
-+ (tstate-set-depth! tstate (1+ (tstate-depth tstate)))
-+)
-+
-+; Decrement the recorded traversal depth of TSTATE.
-+
-+(define (tstate-decr-depth! tstate)
-+ (tstate-set-depth! tstate (1- (tstate-depth tstate)))
-+)
-+
-+; Issue an error given a tstate.
-+
-+(define (tstate-error tstate errmsg . expr)
-+ (apply context-owner-error
-+ (cons (tstate-context tstate)
-+ (cons (tstate-owner tstate)
-+ (cons "During rtx traversal"
-+ (cons errmsg expr)))))
-+)
-+
-+; Traversal support.
-+
-+; Return a boolean indicating if X is a mode.
-+
-+(define (/rtx-any-mode? x)
-+ (->bool (mode:lookup x))
-+)
-+
-+; Return a boolean indicating if X is a symbol or rtx.
-+
-+(define (/rtx-symornum? x)
-+ (or (symbol? x) (number? x))
-+)
-+
-+; Traverse a list of rtx's.
-+
-+(define (/rtx-traverse-rtx-list rtx-list expr op-num tstate appstuff)
-+ (map (lambda (rtx)
-+ ; ??? Shouldn't OP-NUM change for each element?
-+ (/rtx-traverse rtx 'RTX expr op-num tstate appstuff))
-+ rtx-list)
-+)
-+
-+; Cover-fn to tstate-error for signalling an error during rtx traversal
-+; of operand OP-NUM.
-+; RTL-EXPR must be an rtl expression.
-+
-+(define (/rtx-traverse-error tstate errmsg rtl-expr op-num)
-+ (tstate-error tstate
-+ (string-append errmsg ", operand #" (number->string op-num))
-+ (rtx-dump rtl-expr))
-+)
-+
-+; Rtx traversers.
-+;
-+; The result is either a pair of the parsed VAL and new TSTATE,
-+; or #f meaning there is no change (saves lots of unnecessarying cons'ing).
-+
-+(define (/rtx-traverse-normal-operand val expr op-num tstate appstuff)
-+ #f
-+)
-+
-+(define (/rtx-traverse-rtx val expr op-num tstate appstuff)
-+ (cons (/rtx-traverse val 'RTX expr op-num tstate appstuff)
-+ tstate)
-+)
-+
-+(define (/rtx-traverse-setrtx val expr op-num tstate appstuff)
-+ (cons (/rtx-traverse val 'SETRTX expr op-num tstate appstuff)
-+ tstate)
-+)
-+
-+; This is the test of an `if'.
-+
-+(define (/rtx-traverse-testrtx val expr op-num tstate appstuff)
-+ (cons (/rtx-traverse val 'RTX expr op-num tstate appstuff)
-+ (tstate-new-cond?
-+ tstate
-+ (not (rtx-compile-time-constant? val))))
-+)
-+
-+(define (/rtx-traverse-condrtx val expr op-num tstate appstuff)
-+ (if (eq? (car val) 'else)
-+ (cons (cons 'else
-+ (/rtx-traverse-rtx-list
-+ (cdr val) expr op-num
-+ (tstate-new-cond? tstate #t)
-+ appstuff))
-+ (tstate-new-cond? tstate #t))
-+ (cons (cons
-+ ; ??? Entries after the first are conditional.
-+ (/rtx-traverse (car val) 'RTX expr op-num tstate appstuff)
-+ (/rtx-traverse-rtx-list
-+ (cdr val) expr op-num
-+ (tstate-new-cond? tstate #t)
-+ appstuff))
-+ (tstate-new-cond? tstate #t)))
-+)
-+
-+(define (/rtx-traverse-casertx val expr op-num tstate appstuff)
-+ (cons (cons (car val)
-+ (/rtx-traverse-rtx-list
-+ (cdr val) expr op-num
-+ (tstate-new-cond? tstate #t)
-+ appstuff))
-+ (tstate-new-cond? tstate #t))
-+)
-+
-+(define (/rtx-traverse-locals val expr op-num tstate appstuff)
-+ (let ((env (rtx-env-make-locals val)))
-+ (cons val (tstate-push-env tstate env)))
-+)
-+
-+(define (/rtx-traverse-iteration val expr op-num tstate appstuff)
-+ (let ((env (rtx-env-make-iteration-locals val)))
-+ (cons val (tstate-push-env tstate env)))
-+)
-+
-+(define (/rtx-traverse-attrs val expr op-num tstate appstuff)
-+; (cons val ; (atlist-source-form (atlist-parse (make-prefix-context "with-attr") val ""))
-+; tstate)
-+ #f
-+)
-+
-+; Table of rtx traversers.
-+; This is a vector of size rtx-max-num.
-+; Each entry is a list of (arg-type-name . traverser) elements
-+; for rtx-arg-types.
-+; FIXME: Initialized in rtl.scm (i.e. outside this file).
-+
-+(define /rtx-traverser-table #f)
-+
-+; Return a hash table of standard operand traversers.
-+; The result of each traverser is a pair of the compiled form of `val' and
-+; a possibly new traversal state or #f if there is no change.
-+
-+(define (/rtx-make-traverser-table)
-+ (let ((hash-tab (make-hash-table 31))
-+ (traversers
-+ (list
-+ (cons 'OPTIONS /rtx-traverse-normal-operand)
-+ (cons 'ANYINTMODE /rtx-traverse-normal-operand)
-+ (cons 'ANYFLOATMODE /rtx-traverse-normal-operand)
-+ (cons 'ANYNUMMODE /rtx-traverse-normal-operand)
-+ (cons 'ANYEXPRMODE /rtx-traverse-normal-operand)
-+ (cons 'ANYCEXPRMODE /rtx-traverse-normal-operand)
-+ (cons 'EXPLNUMMODE /rtx-traverse-normal-operand)
-+ (cons 'VOIDORNUMMODE /rtx-traverse-normal-operand)
-+ (cons 'VOIDMODE /rtx-traverse-normal-operand)
-+ (cons 'BIMODE /rtx-traverse-normal-operand)
-+ (cons 'INTMODE /rtx-traverse-normal-operand)
-+ (cons 'SYMMODE /rtx-traverse-normal-operand)
-+ (cons 'INSNMODE /rtx-traverse-normal-operand)
-+ (cons 'MACHMODE /rtx-traverse-normal-operand)
-+ (cons 'RTX /rtx-traverse-rtx)
-+ (cons 'SETRTX /rtx-traverse-setrtx)
-+ (cons 'TESTRTX /rtx-traverse-testrtx)
-+ (cons 'CONDRTX /rtx-traverse-condrtx)
-+ (cons 'CASERTX /rtx-traverse-casertx)
-+ (cons 'LOCALS /rtx-traverse-locals)
-+ (cons 'ITERATION /rtx-traverse-iteration)
-+ ;; NOTE: Closure isas and env are handled in /rtx-traverse.
-+ (cons 'SYMBOLLIST /rtx-traverse-normal-operand)
-+ (cons 'ENVSTACK /rtx-traverse-normal-operand)
-+ (cons 'ATTRS /rtx-traverse-attrs)
-+ (cons 'SYMBOL /rtx-traverse-normal-operand)
-+ (cons 'STRING /rtx-traverse-normal-operand)
-+ (cons 'NUMBER /rtx-traverse-normal-operand)
-+ (cons 'SYMORNUM /rtx-traverse-normal-operand)
-+ (cons 'OBJECT /rtx-traverse-normal-operand)
-+ )))
-+
-+ (for-each (lambda (traverser)
-+ (hashq-set! hash-tab (car traverser) (cdr traverser)))
-+ traversers)
-+
-+ hash-tab)
-+)
-+
-+; Traverse the operands of EXPR, a canonicalized RTL expression.
-+; Here "canonicalized" means that EXPR has been run through rtx-canonicalize.
-+; Note that this means that, yes, the options and mode are "traversed" too.
-+
-+(define (/rtx-traverse-operands rtx-obj expr tstate appstuff)
-+ (if /rtx-traverse-debug?
-+ (begin
-+ (display (spaces (* 4 (tstate-depth tstate))))
-+ (display "Traversing operands of: ")
-+ (display (rtx-dump expr))
-+ (newline)
-+ (rtx-env-stack-dump (tstate-env-stack tstate))
-+ (force-output)))
-+
-+ (let loop ((operands (cdr expr))
-+ (op-num 0)
-+ (arg-types (vector-ref /rtx-traverser-table (rtx-num rtx-obj)))
-+ (arg-modes (rtx-arg-modes rtx-obj))
-+ (result nil))
-+
-+ (let ((varargs? (and (pair? arg-types) (symbol? (car arg-types)))))
-+
-+ (if /rtx-traverse-debug?
-+ (begin
-+ (display (spaces (* 4 (tstate-depth tstate))))
-+ (if (null? operands)
-+ (display "end of operands")
-+ (begin
-+ (display "op-num ") (display op-num) (display ": ")
-+ (display (rtx-dump (car operands)))
-+ (display ", ")
-+ (display (if varargs? (car arg-types) (caar arg-types)))
-+ (display ", ")
-+ (display (if varargs? arg-modes (car arg-modes)))
-+ ))
-+ (newline)
-+ (force-output)))
-+
-+ (cond ((null? operands)
-+ ;; Out of operands, check if we have the expected number.
-+ (if (or (null? arg-types)
-+ varargs?)
-+ (reverse! result)
-+ (tstate-error tstate "missing operands" (rtx-dump expr))))
-+
-+ ((null? arg-types)
-+ (tstate-error tstate "too many operands" (rtx-dump expr)))
-+
-+ (else
-+ (let* ((val (car operands))
-+ (type (if varargs? arg-types (car arg-types))))
-+
-+ ;; Look up the traverser for this kind of operand and perform it.
-+ ;; FIXME: This would benefit from returning multiple values.
-+ (let ((traverser (cdr type)))
-+ (let ((traversed-val (traverser val expr op-num tstate appstuff)))
-+ (if traversed-val
-+ (begin
-+ (set! val (car traversed-val))
-+ (set! tstate (cdr traversed-val))))))
-+
-+ ;; Done with this operand, proceed to the next.
-+ (loop (cdr operands)
-+ (+ op-num 1)
-+ (if varargs? arg-types (cdr arg-types))
-+ (if varargs? arg-modes (cdr arg-modes))
-+ (cons val result)))))))
-+)
-+
-+; Publically accessible version of /rtx-traverse-operands as EXPR-FN may
-+; need to call it.
-+
-+(define rtx-traverse-operands /rtx-traverse-operands)
-+
-+; Subroutine of /rtx-traverse to traverse an expression.
-+;
-+; RTX-OBJ is the <rtx-func> object of the (outer) expression being traversed.
-+;
-+; EXPR is the expression to be traversed.
-+; It must be fully canonical.
-+;
-+; PARENT-EXPR is the expression EXPR is contained in. The top-level
-+; caller must pass #f for it.
-+;
-+; OP-POS is the position EXPR appears in PARENT-EXPR. The
-+; top-level caller must pass 0 for it.
-+;
-+; TSTATE is the current traversal state.
-+;
-+; APPSTUFF is for application specific use.
-+;
-+; For syntax expressions arguments are not pre-evaluated before calling the
-+; user's expression handler. Otherwise they are.
-+;
-+; If (tstate-expr-fn TSTATE) wants to just scan the operands, rather than
-+; evaluating them, one thing it can do is call back to rtx-traverse-operands.
-+; If (tstate-expr-fn TSTATE) returns #f, traverse the operands normally and
-+; return (rtx's-name ([options]) mode traversed-operand1 ...),
-+; i.e., the canonicalized form.
-+; This is for semantic-compile's sake and all traversal handlers are
-+; required to do this if the expr-fn returns #f.
-+
-+(define (/rtx-traverse-expr rtx-obj expr parent-expr op-pos tstate appstuff)
-+ (let ((fn ((tstate-expr-fn tstate)
-+ rtx-obj expr parent-expr op-pos tstate appstuff)))
-+ (if fn
-+ (if (procedure? fn)
-+ ; Don't traverse operands for syntax expressions.
-+ (if (eq? (rtx-style rtx-obj) 'SYNTAX)
-+ (apply fn (cons tstate cdr expr))
-+ (let ((operands (/rtx-traverse-operands rtx-obj expr tstate appstuff)))
-+ (apply fn (cons tstate operands))))
-+ fn)
-+ (let ((operands (/rtx-traverse-operands rtx-obj expr tstate appstuff)))
-+ (cons (car expr) operands))))
-+)
-+
-+; Main entry point for expression traversal.
-+; (Actually rtx-traverse is, but it's just a cover function for this.)
-+;
-+; The result is the result of the lambda (tstate-expr-fn TSTATE) looks up
-+; in the case of expressions, or an operand object (usually <operand>)
-+; in the case of operands.
-+;
-+; EXPR is the expression to be traversed.
-+; It must be fully canonical.
-+;
-+; EXPECTED is one of `-rtx-valid-types' and indicates the expected rtx type
-+; or #f if it doesn't matter.
-+;
-+; PARENT-EXPR is the expression EXPR is contained in. The top-level
-+; caller must pass #f for it.
-+;
-+; OP-POS is the position EXPR appears in PARENT-EXPR. The
-+; top-level caller must pass 0 for it.
-+;
-+; TSTATE is the current traversal state.
-+;
-+; APPSTUFF is for application specific use.
-+
-+(define (/rtx-traverse expr expected parent-expr op-pos tstate appstuff)
-+ (if /rtx-traverse-debug?
-+ (begin
-+ (display (spaces (* 4 (tstate-depth tstate))))
-+ (display "Traversing expr: ")
-+ (display expr)
-+ (newline)
-+ (display (spaces (* 4 (tstate-depth tstate))))
-+ (display "-expected: ")
-+ (display expected)
-+ (newline)
-+ (display (spaces (* 4 (tstate-depth tstate))))
-+ (display "-conditional: ")
-+ (display (tstate-cond? tstate))
-+ (newline)
-+ (force-output)
-+ ))
-+
-+ ;; FIXME: error checking here should be deleteable.
-+
-+ (if (pair? expr) ; pair? -> cheap non-null-list?
-+
-+ (let* ((rtx-name (car expr))
-+ (rtx-obj (rtx-lookup rtx-name))
-+ ;; If this is a closure, update tstate.
-+ ;; ??? This is a bit of a wart. All other rtxes handle their
-+ ;; special args/needs via rtx-arg-types. Left as is to simmer.
-+ (tstate (if (eq? rtx-name 'closure)
-+ (tstate-make-closure tstate
-+ (rtx-closure-isas expr)
-+ (rtx-make-env-stack (rtx-closure-env-stack expr)))
-+ tstate)))
-+ (tstate-incr-depth! tstate)
-+ (let ((result
-+ (if rtx-obj
-+ (/rtx-traverse-expr rtx-obj expr parent-expr op-pos tstate appstuff)
-+ (let ((rtx-obj (/rtx-macro-lookup rtx-name)))
-+ (if rtx-obj
-+ (/rtx-traverse (/rtx-macro-expand expr rtx-evaluator)
-+ expected parent-expr op-pos tstate appstuff)
-+ (tstate-error tstate "unknown rtx function" expr))))))
-+ (tstate-decr-depth! tstate)
-+ result))
-+
-+ ; EXPR is not a list.
-+ ; See if it's an operand shortcut.
-+ ; FIXME: Can we get here any more? [now that EXPR is already canonical]
-+ (if (memq expected '(RTX SETRTX))
-+
-+ (cond ((symbol? expr)
-+ (cond ((current-op-lookup expr (tstate-isas tstate))
-+ => (lambda (op)
-+ (/rtx-traverse
-+ ;; NOTE: Can't call op:mode-name here, we need
-+ ;; the real mode, not (potentially) DFLT.
-+ (rtx-make-operand (obj:name (op:mode op)) expr)
-+ expected parent-expr op-pos tstate appstuff)))
-+ ((rtx-temp-lookup (tstate-env-stack tstate) expr)
-+ => (lambda (tmp)
-+ (/rtx-traverse
-+ (rtx-make-local (rtx-temp-mode tmp) expr)
-+ expected parent-expr op-pos tstate appstuff)))
-+ ((current-ifld-lookup expr)
-+ => (lambda (f)
-+ (/rtx-traverse
-+ (rtx-make-ifield (obj:name (ifld-mode f)) expr)
-+ expected parent-expr op-pos tstate appstuff)))
-+ ((enum-lookup-val expr)
-+ ;; ??? If enums could have modes other than INT,
-+ ;; we'd want to propagate that mode here.
-+ (/rtx-traverse
-+ (rtx-make-enum 'INT expr)
-+ expected parent-expr op-pos tstate appstuff))
-+ (else
-+ (tstate-error tstate "unknown operand" expr))))
-+ ((integer? expr)
-+ (/rtx-traverse (rtx-make-const 'INT expr)
-+ expected parent-expr op-pos tstate appstuff))
-+ (else
-+ (tstate-error tstate "unexpected operand" expr)))
-+
-+ ; Not expecting RTX or SETRTX.
-+ (tstate-error tstate "unexpected operand" expr)))
-+)
-+
-+; User visible procedures to traverse an rtl expression.
-+; EXPR must be fully canonical.
-+; These calls /rtx-traverse to do most of the work.
-+; See tstate-make for explanations of OWNER, EXPR-FN.
-+; CONTEXT is a <context> object or #f if there is none.
-+; LOCALS is a list of (mode . name) elements (the locals arg to `sequence').
-+; APPSTUFF is for application specific use.
-+
-+(define (rtx-traverse context owner expr expr-fn appstuff)
-+ (/rtx-traverse expr #f #f 0
-+ (tstate-make context owner expr-fn
-+ #f ;; ok since EXPR is fully canonical
-+ (rtx-env-empty-stack)
-+ #f nil 0)
-+ appstuff)
-+)
-+
-+(define (rtx-traverse-with-locals context owner expr expr-fn locals appstuff)
-+ (/rtx-traverse expr #f #f 0
-+ (tstate-make context owner expr-fn
-+ #f ;; ok since EXPR is fully canonical
-+ (rtx-env-push (rtx-env-empty-stack)
-+ (rtx-env-make-locals locals))
-+ #f nil 0)
-+ appstuff)
-+)
-+
-+; Traverser debugger.
-+; This just traverses EXPR printing everything it sees.
-+
-+(define (rtx-traverse-debug expr)
-+ (rtx-traverse
-+ #f #f expr
-+ (lambda (rtx-obj expr parent-expr op-pos tstate appstuff)
-+ (display "-expr: ")
-+ (display (string-append "rtx=" (obj:str-name rtx-obj)))
-+ (display " expr=")
-+ (display expr)
-+ (display " parent=")
-+ (display parent-expr)
-+ (display " op-pos=")
-+ (display op-pos)
-+ (display " cond?=")
-+ (display (tstate-cond? tstate))
-+ (newline)
-+ #f)
-+ #f
-+ )
-+)
-+
-+; RTL evaluation state.
-+; Applications may subclass <eval-state> if they need to add things.
-+;
-+; This is initialized before evaluation, and modified (in a copy) as the
-+; evaluation state changes.
-+; This doesn't record all evaluation state, just the less dynamic elements.
-+; There's no point in recording things like the parent expression and operand
-+; position as they change for every sub-eval.
-+; The main raison d'etre for this class is so we can add more state without
-+; having to modify all the eval handlers.
-+
-+(define <eval-state>
-+ (class-make '<eval-state> nil
-+ '(
-+ ; <context> object or #f if there is none
-+ (context . #f)
-+
-+ ; Current object rtl is being evaluated for.
-+ ; We need to be able to access the current instruction while
-+ ; generating semantic code. However, the semantic description
-+ ; doesn't specify it as an argument to anything (and we don't
-+ ; want it to). So we record the value here.
-+ (owner . #f)
-+
-+ ;; The outer expr being evaluated, for error messages.
-+ ;; #f if there is none.
-+ (outer-expr . #f)
-+
-+ ; EXPR-FN is a dual-purpose beast. The first purpose is to
-+ ; just process the current expression and return the result.
-+ ; The second purpose is to lookup the function which will then
-+ ; process the expression. It is applied recursively to the
-+ ; expression and each sub-expression. It must be defined as
-+ ; (lambda (rtx-obj expr mode estate) ...).
-+ ; If the result of EXPR-FN is a lambda, it is applied to
-+ ; (cons ESTATE (cdr EXPR)). ESTATE is prepended to the
-+ ; arguments.
-+ ; For syntax expressions if the result of EXPR-FN is #f,
-+ ; the operands are processed using the builtin evaluator.
-+ ; FIXME: This special handling of syntax expressions is
-+ ; not currently done.
-+ ; So to repeat: EXPR-FN can process the expression, and if its
-+ ; result is a lambda then it also processes the expression.
-+ ; The arguments to EXPR-FN are
-+ ; (rtx-obj expr mode estate).
-+ ; The arguments to the result of EXPR-FN are
-+ ; (cons ESTATE (cdr EXPR)).
-+ ; The reason for the duality is mostly history.
-+ ; In time things should be simplified.
-+ (expr-fn . #f)
-+
-+ ; List of ISA name(s) in which to evaluate the expression.
-+ ; This is used for example during operand lookups.
-+ ; All specified ISAs must be compatible,
-+ ; e.g. operand lookups must be unambiguous.
-+ ; A value of #f means "all ISAs".
-+ (isas . #f)
-+
-+ ; Current environment. This is a stack of sequence locals,
-+ ; e.g. made with rtx-env-init-stack1.
-+ (env-stack . ())
-+
-+ ; Current evaluation depth. This is used, for example, to
-+ ; control indentation in generated output.
-+ (depth . 0)
-+
-+ ; Associative list of modifiers.
-+ ; This is here to support things like `delay'.
-+ (modifiers . ())
-+ )
-+ nil)
-+)
-+
-+; Create an <eval-state> object using a list of keyword/value elements.
-+; ARGS is a list of #:keyword/value elements.
-+; The result is a list of the unrecognized elements.
-+; Subclasses should override this method and send-next it first, then
-+; see if they recognize anything in the result, returning what isn't
-+; recognized.
-+
-+(method-make!
-+ <eval-state> 'vmake!
-+ (lambda (self args)
-+ (let loop ((args args) (unrecognized nil))
-+ (if (null? args)
-+ (reverse! unrecognized) ; ??? Could invoke method to initialize here.
-+ (begin
-+ (case (car args)
-+ ((#:context)
-+ (elm-set! self 'context (cadr args)))
-+ ((#:owner)
-+ (elm-set! self 'owner (cadr args)))
-+ ((#:outer-expr)
-+ (elm-set! self 'outer-expr (cadr args)))
-+ ((#:expr-fn)
-+ (elm-set! self 'expr-fn (cadr args)))
-+ ((#:env-stack)
-+ (elm-set! self 'env-stack (cadr args)))
-+ ((#:isas)
-+ (elm-set! self 'isas (cadr args)))
-+ ((#:depth)
-+ (elm-set! self 'depth (cadr args)))
-+ ((#:modifiers)
-+ (elm-set! self 'modifiers (cadr args)))
-+ (else
-+ ; Build in reverse order, as we reverse it back when we're done.
-+ (set! unrecognized
-+ (cons (cadr args) (cons (car args) unrecognized)))))
-+ (loop (cddr args) unrecognized)))))
-+)
-+
-+; Accessors.
-+
-+(define-getters <eval-state> estate
-+ (context owner outer-expr expr-fn isas env-stack depth modifiers)
-+)
-+(define-setters <eval-state> estate
-+ (isas env-stack depth modifiers)
-+)
-+
-+; Build an estate for use in producing a value from rtl.
-+; CONTEXT is a <context> object or #f if there is none.
-+; OWNER is the owner of the expression or #f if there is none.
-+
-+(define (estate-make-for-eval context owner)
-+ (vmake <eval-state>
-+ #:context context
-+ #:owner owner
-+ #:expr-fn (lambda (rtx-obj expr mode estate)
-+ (rtx-evaluator rtx-obj))
-+ #:isas (and owner (obj-isa-list owner)))
-+)
-+
-+; Create a copy of ESTATE.
-+
-+(define (estate-copy estate)
-+ (object-copy estate)
-+)
-+
-+;; Create a copy of ESTATE with environment stack ENV-STACK added,
-+;; and the ISA(s) set to ISA-NAME-LIST.
-+
-+(define (estate-make-closure estate isa-name-list env-stack)
-+ (let ((result (estate-copy estate)))
-+ (estate-set-isas! result isa-name-list)
-+ (estate-set-env-stack! result (append env-stack (estate-env-stack result)))
-+ result)
-+)
-+
-+; Create a copy of ESTATE with environment ENV pushed onto the existing
-+; environment list.
-+; There's no routine to pop the environment list as there's no current
-+; need for it: we make a copy of the state when we push.
-+
-+(define (estate-push-env estate env)
-+ (let ((result (estate-copy estate)))
-+ (estate-set-env-stack! result (cons env (estate-env-stack result)))
-+ result)
-+)
-+
-+; Create a copy of ESTATE with the depth incremented by one.
-+
-+(define (estate-deepen estate)
-+ (let ((result (estate-copy estate)))
-+ (estate-set-depth! result (1+ (estate-depth estate)))
-+ result)
-+)
-+
-+; Create a copy of ESTATE with modifiers MODS.
-+
-+(define (estate-with-modifiers estate mods)
-+ (let ((result (estate-copy estate)))
-+ (estate-set-modifiers! result (append mods (estate-modifiers result)))
-+ result)
-+)
-+
-+; Convert a tstate to an estate.
-+
-+(define (tstate->estate t)
-+ (vmake <eval-state>
-+ #:context (tstate-context t)
-+ #:env-stack (tstate-env-stack t))
-+)
-+
-+; Issue an error given an estate.
-+
-+(define (estate-error estate errmsg . expr)
-+ (apply context-owner-error
-+ (cons (estate-context estate)
-+ (cons (estate-owner estate)
-+ (cons (string-append "During rtx evalution"
-+ (if (estate-outer-expr estate)
-+ (string-append " of\n"
-+ (rtx-pretty-strdump (estate-outer-expr estate))
-+ "\n")
-+ ""))
-+ (cons errmsg expr)))))
-+)
-+
-+; RTL expression evaluation.
-+;
-+; ??? These used eval2 at one point. Not sure which is faster but I suspect
-+; eval2 is by far. On the otherhand this has yet to be compiled. And this way
-+; is more portable, more flexible, and works with guile 1.2 (which has
-+; problems with eval'ing self referential vectors, though that's one reason to
-+; use smobs).
-+
-+; Set to #t to debug rtx evaluation.
-+
-+(define /rtx-eval-debug? #f)
-+
-+; RTX expression evaluator.
-+;
-+; EXPR is the expression to be eval'd. It must be in compiled(canonical) form.
-+; MODE is the desired mode of EXPR, a <mode> object.
-+; ESTATE is the current evaluation state.
-+
-+(define (rtx-eval-with-estate expr mode estate)
-+ (if /rtx-eval-debug?
-+ (begin
-+ (display "Evaluating expr with mode ")
-+ (display (if (symbol? mode) mode (obj:name mode)))
-+ (newline)
-+ (display (rtx-dump expr))
-+ (newline)
-+ (rtx-env-stack-dump (estate-env-stack estate))
-+ ))
-+
-+ (if (pair? expr) ; pair? -> cheap non-null-list?
-+
-+ (let* ((rtx-obj (rtx-lookup (car expr)))
-+ (fn ((estate-expr-fn estate) rtx-obj expr mode estate)))
-+ (if fn
-+ (if (procedure? fn)
-+ (apply fn (cons estate (cdr expr)))
-+; ; Don't eval operands for syntax expressions.
-+; (if (eq? (rtx-style rtx-obj) 'SYNTAX)
-+; (apply fn (cons estate (cdr expr)))
-+; (let ((operands
-+; (/rtx-eval-operands rtx-obj expr estate)))
-+; (apply fn (cons estate operands))))
-+ fn)
-+ ; Leave expr unchanged.
-+ expr))
-+; (let ((operands
-+; (/rtx-traverse-operands rtx-obj expr estate)))
-+; (cons rtx-obj operands))))
-+
-+ ; EXPR is not a list
-+ (error "argument to rtx-eval-with-estate is not a list" expr))
-+)
-+
-+; Evaluate rtx expression EXPR and return the computed value.
-+; EXPR must already be in canonical form (the result of rtx-canonicalize).
-+; OWNER is the owner of the value, used for attribute computation
-+; and to get the ISA name list.
-+; OWNER is #f if there isn't one.
-+; FIXME: context?
-+
-+(define (rtx-value expr owner)
-+ (rtx-eval-with-estate expr DFLT (estate-make-for-eval #f owner))
-+)
-+
-+;; Initialize the tables.
-+
-+(define (rtx-init-traversal-tables!)
-+ (let ((compiler-hash-table (/rtx-make-canon-table))
-+ (traverser-hash-table (/rtx-make-traverser-table)))
-+
-+ (set! /rtx-canoner-table (make-vector (rtx-max-num) #f))
-+ (set! /rtx-traverser-table (make-vector (rtx-max-num) #f))
-+
-+ (for-each (lambda (rtx-name)
-+ (let ((rtx (rtx-lookup rtx-name)))
-+ (if rtx
-+ (let ((num (rtx-num rtx))
-+ (arg-types (rtx-arg-types rtx)))
-+ (vector-set! /rtx-canoner-table num
-+ (map1-improper
-+ (lambda (arg-type)
-+ (cons arg-type
-+ (hashq-ref compiler-hash-table arg-type)))
-+ arg-types))
-+ (vector-set! /rtx-traverser-table num
-+ (map1-improper
-+ (lambda (arg-type)
-+ (cons arg-type
-+ (hashq-ref traverser-hash-table arg-type)))
-+ arg-types))))))
-+ (rtx-name-list)))
-+
-+ (set! /rtx-operand-canoners (make-vector (rtx-max-num) /rtx-canon-operands))
-+ (for-each (lambda (rtx-canoner)
-+ (let ((rtx-obj (rtx-lookup (car rtx-canoner))))
-+ (vector-set! /rtx-operand-canoners (rtx-num rtx-obj) (cdr rtx-canoner))))
-+ (/rtx-special-expr-canoners))
-+)
-diff -Nur binutils-2.24.orig/cgen/rtl-xform.scm binutils-2.24/cgen/rtl-xform.scm
---- binutils-2.24.orig/cgen/rtl-xform.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/rtl-xform.scm 2016-06-30 21:26:12.669893734 +0200
-@@ -0,0 +1,562 @@
-+;; Various RTL transformations.
-+;;
-+;; Copyright (C) 2000, 2009, 2010 Red Hat, Inc.
-+;; This file is part of CGEN.
-+;; See file COPYING.CGEN for details.
-+;;
-+;; In particular:
-+;; rtx-simplify
-+;; rtx-solve
-+;; rtx-trim-for-doc
-+
-+;; Utility to verify there are no DFLT modes present in EXPR
-+
-+;; Subroutine of rtx-verify-no-dflt-modes to simplify it.
-+;; This is the EXPR-FN argument to rtl-traverse.
-+
-+(define (/rtx-verify-no-dflt-modes-expr-fn rtx-obj expr parent-expr op-pos
-+ tstate appstuff)
-+ (if (eq? (rtx-mode expr) 'DFLT)
-+ (tstate-error tstate "DFLT mode present" expr))
-+
-+ ;; Leave EXPR unchanged and continue.
-+ #f
-+)
-+
-+;; Entry point. Verify there are no DFLT modes in EXPR.
-+
-+(define (rtx-verify-no-dflt-modes context expr)
-+ (rtx-traverse context #f expr /rtx-verify-no-dflt-modes-expr-fn #f)
-+)
-+
-+;; rtx-simplify (and supporting cast)
-+
-+; Subroutine of /rtx-simplify-expr-fn to compare two values for equality.
-+; If both are constants and they're equal return #f/#t.
-+; INVERT? = #f -> return #t if equal, #t -> return #f if equal.
-+; Returns 'unknown if either argument is not a constant.
-+
-+(define (/rtx-const-equal arg0 arg1 invert?)
-+ (if (and (rtx-constant? arg0)
-+ (rtx-constant? arg1))
-+ (if invert?
-+ (!= (rtx-constant-value arg0)
-+ (rtx-constant-value arg1))
-+ (= (rtx-constant-value arg0)
-+ (rtx-constant-value arg1)))
-+ 'unknown)
-+)
-+
-+; Subroutine of /rtx-simplify-expr-fn to see if MAYBE-CONST is
-+; an element of NUMBER-LIST.
-+; NUMBER-LIST is a `number-list' rtx.
-+; INVERT? is #t if looking for non-membership.
-+; #f/#t is only returned for definitive answers.
-+; If INVERT? is #f:
-+; - return #f if MAYBE-CONST is not in NUMBER-LIST
-+; - return #t if MAYBE-CONST is in NUMBER-LIST and it has only one member
-+; - return 'member if MAYBE-CONST is in NUMBER-LIST and it has many members
-+; - otherwise return 'unknown
-+; If INVERT? is #t:
-+; - return #t if MAYBE-CONST is not in NUMBER-LIST
-+; - return #f if MAYBE-CONST is in NUMBER-LIST and it has only one member
-+; - return 'member if MAYBE-CONST is in NUMBER-LIST and it has many members
-+; - otherwise return 'unknown
-+
-+(define (/rtx-const-list-equal maybe-const number-list invert?)
-+ (assert (rtx-kind? 'number-list number-list))
-+ (if (rtx-constant? maybe-const)
-+ (let ((values (rtx-number-list-values number-list)))
-+ (if invert?
-+ (if (memq (rtx-constant-value maybe-const) values)
-+ (if (= (length values) 1)
-+ #f
-+ 'member)
-+ #t)
-+ (if (memq (rtx-constant-value maybe-const) values)
-+ (if (= (length values) 1)
-+ #t
-+ 'member)
-+ #f)))
-+ 'unknown)
-+)
-+
-+; Subroutine of /rtx-simplify-expr-fn to simplify an eq-attr of (current-mach).
-+; CONTEXT is a <context> object or #f if there is none.
-+
-+(define (/rtx-simplify-eq-attr-mach rtx context)
-+ (let ((attr (rtx-eq-attr-attr rtx))
-+ (value (rtx-eq-attr-value rtx)))
-+ ; If all currently selected machs will yield the same value
-+ ; for the attribute, we can simplify.
-+ (let ((values (map (lambda (m)
-+ (obj-attr-value m attr))
-+ (current-mach-list))))
-+ ; Ensure at least one mach is selected.
-+ (if (null? values)
-+ (context-error context
-+ "While simplifying rtl"
-+ "no machs selected"
-+ (rtx-strdump rtx)))
-+ ; All values equal to the first one?
-+ (if (all-true? (map (lambda (val)
-+ (equal? val (car values)))
-+ values))
-+ (if (equal? value
-+ ; Convert internal boolean attribute value
-+ ; #f/#t to external value FALSE/TRUE.
-+ ; FIXME:revisit.
-+ (case (car values)
-+ ((#f) 'FALSE)
-+ ((#t) 'TRUE)
-+ (else (car values))))
-+ (rtx-true)
-+ (rtx-false))
-+ ; couldn't simplify
-+ rtx)))
-+)
-+
-+; Subroutine of /rtx-simplify-expr-fn to simplify an eq-attr of (current-insn).
-+
-+(define (/rtx-simplify-eq-attr-insn rtx insn context)
-+ (let ((attr (rtx-eq-attr-attr rtx))
-+ (value (rtx-eq-attr-value rtx)))
-+ (if (not (insn? insn))
-+ (context-error context
-+ "While simplifying rtl"
-+ "No current insn for `(current-insn)'"
-+ (rtx-strdump rtx)))
-+ (let ((attr-value (obj-attr-value insn attr)))
-+ (if (eq? value attr-value)
-+ (rtx-true)
-+ (rtx-false))))
-+)
-+
-+; Subroutine of rtx-simplify.
-+; This is the EXPR-FN argument to rtx-traverse.
-+
-+(define (/rtx-simplify-expr-fn rtx-obj expr parent-expr op-pos
-+ tstate appstuff)
-+
-+ ;(display "Processing ") (display (rtx-dump expr)) (newline)
-+
-+ (case (rtx-name expr)
-+
-+ ((not)
-+ (let* ((arg (/rtx-traverse (rtx-alu-op-arg expr 0)
-+ 'RTX expr 1 tstate appstuff))
-+ (no-side-effects? (not (rtx-side-effects? arg))))
-+ (cond ((and no-side-effects? (rtx-false? arg))
-+ (rtx-true))
-+ ((and no-side-effects? (rtx-true? arg))
-+ (rtx-false))
-+ (else (rtx-make 'not (rtx-alu-op-mode expr) arg)))))
-+
-+ ((orif)
-+ (let ((arg0 (/rtx-traverse (rtx-boolif-op-arg expr 0)
-+ 'RTX expr 0 tstate appstuff))
-+ (arg1 (/rtx-traverse (rtx-boolif-op-arg expr 1)
-+ 'RTX expr 1 tstate appstuff)))
-+ (let ((no-side-effects-0? (not (rtx-side-effects? arg0)))
-+ (no-side-effects-1? (not (rtx-side-effects? arg1))))
-+ (cond ((and no-side-effects-0? (rtx-true? arg0))
-+ (rtx-true))
-+ ((and no-side-effects-0? (rtx-false? arg0))
-+ (rtx-canonical-bool arg1))
-+ ; Value of arg0 is unknown or has side-effects.
-+ ((and no-side-effects-1? (rtx-true? arg1))
-+ (if no-side-effects-0?
-+ (rtx-true)
-+ (rtx-make 'orif arg0 (rtx-true))))
-+ ((and no-side-effects-1? (rtx-false? arg1))
-+ arg0)
-+ (else
-+ (rtx-make 'orif arg0 arg1))))))
-+
-+ ((andif)
-+ (let ((arg0 (/rtx-traverse (rtx-boolif-op-arg expr 0)
-+ 'RTX expr 0 tstate appstuff))
-+ (arg1 (/rtx-traverse (rtx-boolif-op-arg expr 1)
-+ 'RTX expr 1 tstate appstuff)))
-+ (let ((no-side-effects-0? (not (rtx-side-effects? arg0)))
-+ (no-side-effects-1? (not (rtx-side-effects? arg1))))
-+ (cond ((and no-side-effects-0? (rtx-false? arg0))
-+ (rtx-false))
-+ ((and no-side-effects-0? (rtx-true? arg0))
-+ (rtx-canonical-bool arg1))
-+ ; Value of arg0 is unknown or has side-effects.
-+ ((and no-side-effects-1? (rtx-false? arg1))
-+ (if no-side-effects-0?
-+ (rtx-false)
-+ (rtx-make 'andif arg0 (rtx-false))))
-+ ((and no-side-effects-1? (rtx-true? arg1))
-+ arg0)
-+ (else
-+ (rtx-make 'andif arg0 arg1))))))
-+
-+ ; Fold if's to their then or else part if we can determine the
-+ ; result of the test.
-+ ((if)
-+ (let ((test
-+ ; ??? Was this but that calls rtx-traverse again which
-+ ; resets the temp stack!
-+ ; (rtx-simplify context (caddr expr))))
-+ (/rtx-traverse (rtx-if-test expr) 'RTX expr 1 tstate appstuff)))
-+ (cond ((rtx-true? test)
-+ (/rtx-traverse (rtx-if-then expr) 'RTX expr 2 tstate appstuff))
-+ ((rtx-false? test)
-+ (if (rtx-if-else expr)
-+ (/rtx-traverse (rtx-if-else expr) 'RTX expr 3 tstate appstuff)
-+ ; Sanity check, mode must be VOID.
-+ ; FIXME: DFLT can no longer appear
-+ (if (or (mode:eq? 'DFLT (rtx-mode expr))
-+ (mode:eq? 'VOID (rtx-mode expr)))
-+ (rtx-make 'nop 'VOID)
-+ (error "rtx-simplify: non-void-mode `if' missing `else' part" expr))))
-+ ; Can't simplify.
-+ ; We could traverse the then/else clauses here, but it's simpler
-+ ; to have our caller do it (by returning #f).
-+ ; The cost is retraversing `test'.
-+ (else #f))))
-+
-+ ((eq ne)
-+ (let ((name (rtx-name expr))
-+ (cmp-mode (rtx-cmp-op-mode expr))
-+ (arg0 (/rtx-traverse (rtx-cmp-op-arg expr 0) 'RTX
-+ expr 1 tstate appstuff))
-+ (arg1 (/rtx-traverse (rtx-cmp-op-arg expr 1) 'RTX
-+ expr 2 tstate appstuff)))
-+ (if (or (rtx-side-effects? arg0) (rtx-side-effects? arg1))
-+ (rtx-make name cmp-mode arg0 arg1)
-+ (case (/rtx-const-equal arg0 arg1 (rtx-kind? 'ne expr))
-+ ((#f) (rtx-false))
-+ ((#t) (rtx-true))
-+ (else
-+ ; That didn't work. See if we have an ifield/operand with a
-+ ; known range of values. We don't need to check for a known
-+ ; single value, that is handled below.
-+ (case (rtx-name arg0)
-+ ((ifield)
-+ (let ((known-val (tstate-known-lookup tstate
-+ (rtx-ifield-name arg0))))
-+ (if (and known-val (rtx-kind? 'number-list known-val))
-+ (case (/rtx-const-list-equal arg1 known-val
-+ (rtx-kind? 'ne expr))
-+ ((#f) (rtx-false))
-+ ((#t) (rtx-true))
-+ (else
-+ (rtx-make name cmp-mode arg0 arg1)))
-+ (rtx-make name cmp-mode arg0 arg1))))
-+ ((operand)
-+ (let ((known-val (tstate-known-lookup tstate
-+ (rtx-operand-name arg0))))
-+ (if (and known-val (rtx-kind? 'number-list known-val))
-+ (case (/rtx-const-list-equal arg1 known-val
-+ (rtx-kind? 'ne expr))
-+ ((#f) (rtx-false))
-+ ((#t) (rtx-true))
-+ (else
-+ (rtx-make name cmp-mode arg0 arg1)))
-+ (rtx-make name cmp-mode arg0 arg1))))
-+ (else
-+ (rtx-make name cmp-mode arg0 arg1))))))))
-+
-+ ; Recognize attribute requests of current-insn, current-mach.
-+ ((eq-attr)
-+ (cond ((rtx-kind? 'current-mach (rtx-eq-attr-owner expr))
-+ (/rtx-simplify-eq-attr-mach expr (tstate-context tstate)))
-+ ((rtx-kind? 'current-insn (rtx-eq-attr-owner expr))
-+ (/rtx-simplify-eq-attr-insn expr (tstate-owner tstate) (tstate-context tstate)))
-+ (else expr)))
-+
-+ ((ifield)
-+ (let ((known-val (tstate-known-lookup tstate (rtx-ifield-name expr))))
-+ ; If the value is a single number, return that.
-+ ; It can be one of several, represented as a number list.
-+ (if (and known-val (rtx-constant? known-val))
-+ known-val ; (rtx-make 'const 'INT known-val)
-+ #f)))
-+
-+ ((operand)
-+ (let ((known-val (tstate-known-lookup tstate (rtx-operand-name expr))))
-+ ; If the value is a single number, return that.
-+ ; It can be one of several, represented as a number list.
-+ (if (and known-val (rtx-constant? known-val))
-+ known-val ; (rtx-make 'const 'INT known-val)
-+ #f)))
-+
-+ ((closure)
-+ (let ((simplified-expr (/rtx-traverse (rtx-closure-expr expr)
-+ 'RTX expr 2 tstate appstuff)))
-+ simplified-expr))
-+
-+ ; Leave EXPR unchanged and continue.
-+ (else #f))
-+)
-+
-+; Simplify an rtl expression.
-+;
-+; EXPR must be in canonical source form.
-+; The result is a possibly simplified EXPR, still in source form.
-+;
-+; CONTEXT is a <context> object or #f, used for error messages.
-+; OWNER is the owner of the expression (e.g. <insn>) or #f if there is none.
-+;
-+; KNOWN is an alist of known values. Each element is (name . value) where
-+; NAME is an ifield/operand name and VALUE is a const/number-list rtx.
-+; FIXME: Need ranges, later.
-+;
-+; The following operations are performed:
-+; - unselected machine dependent code is removed (eq-attr of (current-mach))
-+; - if's are reduced to either then/else if we can determine that the test is
-+; a compile-time constant
-+; - orif/andif
-+; - eq/ne
-+; - not
-+;
-+; ??? Will become more intelligent as needed.
-+
-+(define (rtx-simplify context owner expr known)
-+ (/rtx-traverse expr #f #f 0
-+ (tstate-make context owner
-+ /rtx-simplify-expr-fn
-+ #f ;; ok since EXPR is fully canonical
-+ (rtx-env-empty-stack)
-+ #f known 0)
-+ #f)
-+)
-+
-+;; Return an insn's semantics simplified.
-+;; CONTEXT is a <context> object or #f, used for error messages.
-+
-+(define (rtx-simplify-insn context insn)
-+ (rtx-simplify context insn (insn-canonical-semantics insn)
-+ (insn-build-known-values insn))
-+)
-+
-+;; rtx-solve (and supporting cast)
-+
-+; Utilities for equation solving.
-+; ??? At the moment this is only focused on ifield assertions.
-+; ??? That there exist more sophisticated versions than this one can take
-+; as a given. This works for the task at hand and will evolve or be replaced
-+; as necessary.
-+; ??? This makes the simplifying assumption that no expr has side-effects.
-+
-+; Subroutine of rtx-solve.
-+; This is the EXPR-FN argument to rtx-traverse.
-+
-+(define (/solve-expr-fn rtx-obj expr parent-expr op-pos tstate appstuff)
-+ #f ; wip
-+)
-+
-+; Return a boolean indicating if {expr} equates to "true".
-+; If the expression can't be reduced to #f/#t, return '?.
-+; ??? Use rtx-eval instead of rtx-traverse?
-+;
-+; EXPR must be in source form.
-+; CONTEXT is a <context> object, used for error messages.
-+; OWNER is the owner of the expression (e.g. <insn>) or #f if there is none.
-+; KNOWN is an alist of known values. Each element is (name . value) where
-+; NAME is an ifield/operand name and VALUE is a const/number-list rtx.
-+; FIXME: Need ranges, later.
-+;
-+; This is akin to rtx-simplify except it's geared towards solving ifield
-+; assertions. It's not unreasonable to combine them. The worry is the
-+; efficiency lost.
-+; ??? Will become more intelligent as needed.
-+
-+(define (rtx-solve context owner expr known)
-+ ; First simplify, then solve.
-+ (let* ((simplified-expr (rtx-simplify context owner expr known))
-+ (maybe-solved-expr
-+ simplified-expr) ; FIXME: for now
-+; (/rtx-traverse simplified-expr #f #f 0
-+; (tstate-make context owner
-+; /solve-expr-fn
-+; #f (rtx-env-empty-stack)
-+; #f known 0)
-+; #f))
-+ )
-+ (cond ((rtx-true? maybe-solved-expr) #t)
-+ ((rtx-false? maybe-solved-expr) #f)
-+ (else '?)))
-+)
-+
-+;; rtx-trim-for-doc (and supporting cast)
-+;; RTX trimming (removing fluff not normally needed for the human viewer).
-+
-+;; Subroutine of /rtx-trim-args to simplify it.
-+;; Trim a list of rtxes.
-+
-+(define (/rtx-trim-rtx-list rtx-list)
-+ (map /rtx-rtim-for-doc rtx-list)
-+)
-+
-+; Subroutine of /rtx-trim-for-doc to simplify it.
-+; Trim the arguments of rtx NAME.
-+; ARGS has already had options,mode removed.
-+
-+(define (/rtx-trim-args name args)
-+ (logit 4 "Trimming args of " name ": " args "\n")
-+ (let* ((rtx-obj (rtx-lookup name))
-+ (arg-types (rtx-arg-types rtx-obj)))
-+
-+ (let loop ((args args)
-+ (types (cddr arg-types)) ; skip options, mode
-+ (result nil))
-+
-+ (if (null? args)
-+
-+ (reverse! result)
-+
-+ (let ((arg (car args))
-+ ; Remember, types may be an improper list.
-+ (type (if (pair? types) (car types) types))
-+ (new-arg (car args)))
-+
-+ ;(display arg (current-error-port)) (newline (current-error-port))
-+ ;(display type (current-error-port)) (newline (current-error-port))
-+
-+ (case type
-+ ((OPTIONS)
-+ (assert #f)) ; shouldn't get here
-+
-+ ((ANYINTMODE ANYFLOATMODE ANYNUMMODE ANYEXPRMODE ANYCEXPRMODE
-+ EXPLNUMMODE VOIDORNUMMODE VOIDMODE BIMODE INTMODE
-+ SYMMODE INSNMODE MACHMODE)
-+ #f) ; leave arg untouched
-+
-+ ((RTX SETRTX TESTRTX)
-+ (set! new-arg (/rtx-trim-for-doc arg)))
-+
-+ ((CONDRTX)
-+ (assert (= (length arg) 2))
-+ (if (eq? (car arg) 'else)
-+ (set! new-arg (cons 'else (/rtx-trim-for-doc (cadr arg))))
-+ (set! new-arg (list (/rtx-trim-for-doc (car arg))
-+ (/rtx-trim-for-doc (cadr arg)))))
-+ )
-+
-+ ((CASERTX)
-+ (assert (= (length arg) 2))
-+ (set! new-arg (list (car arg) (/rtx-trim-for-doc (cadr arg))))
-+ )
-+
-+ ((LOCALS)
-+ #f) ; leave arg untouched
-+
-+ ((ITERATION SYMBOLLIST ENVSTACK)
-+ #f) ; leave arg untouched for now
-+
-+ ((ATTRS)
-+ #f) ; leave arg untouched for now
-+
-+ ((SYMBOL STRING NUMBER SYMORNUM)
-+ #f) ; leave arg untouched
-+
-+ ((OBJECT)
-+ (assert #f)) ; hopefully(wip!) shouldn't get here
-+
-+ (else
-+ (assert #f))) ; unknown arg type
-+
-+ (loop (cdr args)
-+ (if (pair? types) (cdr types) types)
-+ (cons new-arg result))))))
-+)
-+
-+; Given a canonical rtl expression, usually the result of rtx-simplify,
-+; remove bits unnecessary for documentation purposes.
-+; Canonical rtl too verbose for docs.
-+; Examples of things to remove:
-+; - empty options list
-+; - ifield/operand/local/const wrappers
-+; - modes of operations that don't need them to convey meaning
-+;
-+; NOTE: While having to trim the result of rtx-simplify may seem ironic,
-+; it isn't. You need to keep separate the notions of simplifying "1+1" to "2"
-+; and trimming the clutter from "(const () BI 0)" yielding "0".
-+
-+(define (/rtx-trim-for-doc rtx)
-+ (if (pair? rtx) ; ??? cheap rtx?
-+
-+ (let ((name (car rtx))
-+ (options (cadr rtx))
-+ (mode (caddr rtx))
-+ (rest (cdddr rtx)))
-+
-+ (case name
-+
-+ ((const ifield operand local)
-+ (if (null? options)
-+ (car rest)
-+ rtx))
-+
-+ ((set set-quiet)
-+ (let ((trimmed-args (/rtx-trim-args name rest)))
-+ (if (null? options)
-+ (cons name trimmed-args)
-+ (cons name (cons options (cons mode trimmed-args))))))
-+
-+ ((eq ne lt le gt ge ltu leu gtu geu index-of)
-+ (let ((trimmed-args (/rtx-trim-args name rest)))
-+ (if (null? options)
-+ (cons name trimmed-args)
-+ (cons name (cons options (cons mode trimmed-args))))))
-+
-+ ((if)
-+ (let ((trimmed-args (/rtx-trim-args name rest)))
-+ (if (null? options)
-+ (if (eq? mode 'VOID)
-+ (cons name trimmed-args)
-+ (cons name (cons mode trimmed-args)))
-+ (cons name (cons options (cons mode trimmed-args))))))
-+
-+ ((sequence parallel)
-+ ; No special support is needed, except it's nice to remove nop
-+ ; statements. These can be created when an `if' get simplified.
-+ (let ((trimmed-args (/rtx-trim-args name rest))
-+ (result nil))
-+ (for-each (lambda (rtx)
-+ (if (equal? rtx '(nop))
-+ #f ; ignore
-+ (set! result (cons rtx result))))
-+ trimmed-args)
-+ (if (null? options)
-+ (if (eq? mode 'VOID)
-+ (cons name (reverse result))
-+ (cons name (cons mode (reverse result))))
-+ (cons name (cons options (cons mode (reverse result)))))))
-+
-+ ((nop)
-+ (list 'nop))
-+
-+ ((closure)
-+ ;; Remove outer closures, they are artificially added, and are
-+ ;; basically noise to the human trying to understand the semantics.
-+ ;; ??? Since we currently can't distinguish outer closures,
-+ ;; just remove them all.
-+ (let ((trimmed-expr (/rtx-trim-for-doc (rtx-closure-expr rtx))))
-+ (if (and (null? options) (null? (rtx-closure-env-stack rtx)))
-+ trimmed-expr
-+ (rtx-make 'closure options mode
-+ (rtx-closure-isas rtx)
-+ (rtx-closure-env-stack rtx)
-+ trimmed-expr))))
-+
-+ (else
-+ (let ((trimmed-args (/rtx-trim-args name rest)))
-+ (if (null? options)
-+ (if (eq? mode 'DFLT) ;; FIXME: DFLT can no longer appear
-+ (cons name trimmed-args)
-+ (cons name (cons mode trimmed-args)))
-+ (cons name (cons options (cons mode trimmed-args))))))))
-+
-+ ; Not an rtx expression, must be number, symbol, string.
-+ rtx)
-+)
-+
-+(define (rtx-trim-for-doc rtx)
-+ (/rtx-trim-for-doc rtx)
-+)
-diff -Nur binutils-2.24.orig/cgen/rtx-funcs.scm binutils-2.24/cgen/rtx-funcs.scm
---- binutils-2.24.orig/cgen/rtx-funcs.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/rtx-funcs.scm 2016-06-30 21:26:12.669893734 +0200
-@@ -0,0 +1,1181 @@
-+; Standard RTL functions.
-+; Copyright (C) 2000, 2009, 2010 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; THIS FILE CONTAINS ONE BIG FUNCTION: def-rtx-funcs.
-+;
-+; It is ok for this file to use procs "internal" to rtl.scm.
-+;
-+; Each rtx functions has two leading operands: &options, &mode;
-+; though `&mode' may be spelled differently.
-+; The "&" prefix is to indicate that the parsing of these operands is handled
-+; differently. They are optional and are written with leading colons
-+; (e.g. :SI). The leading ":" is to help the parser - all leading optional
-+; operands begin with ":". The order of the arguments is &options then &mode
-+; though there is no imposed order in written RTL.
-+
-+(define (def-rtx-funcs)
-+
-+; Do not change the indentation here.
-+(let
-+(
-+ ; These are defined in rtl.scm.
-+ (drn define-rtx-node)
-+ (drsn define-rtx-syntax-node)
-+ (dron define-rtx-operand-node)
-+ (drmn define-rtx-macro-node)
-+)
-+
-+; The reason for the odd indenting above is so that emacs begins indenting the
-+; following code at column 1.
-+
-+; Error reporting.
-+; MODE is present for use in situations like non-VOID mode cond's.
-+; The code will expect the mode to be compatible even though `error'
-+; "doesn't return". A small concession for simpler code.
-+
-+(drn (error &options &mode message)
-+ #f
-+ (OPTIONS VOIDORNUMMODE STRING) (NA NA NA)
-+ MISC
-+ (estate-error *estate* "error in rtl" message)
-+)
-+
-+; Enums
-+; Default mode is INT.
-+
-+(drn (enum &options &mode enum-name)
-+ #f
-+ (OPTIONS ANYINTMODE SYMBOL) (NA NA NA) ;; ??? s/SYMBOL/ENUM-NAME/ ?
-+ ARG
-+ ;; When computing a value, return the enum's value.
-+ ;; Canonicalization should have already caught bad values.
-+ (car (enum-lookup-val enum-name))
-+)
-+
-+; Instruction fields
-+; These are used in the encode/decode specs of other ifields as well as in
-+; instruction semantics.
-+; Ifields are normally specified by name, but they are subsequently wrapped
-+; in this.
-+
-+(dron (ifield &options &mode ifld-name)
-+ #f
-+ (OPTIONS ANYNUMMODE SYMBOL) (NA NA NA) ;; ??? s/SYMBOL/IFIELD-NAME/ ?
-+ ARG
-+ (let ((f (current-ifld-lookup ifld-name)))
-+ (make <operand> (obj-location f)
-+ ifld-name (string-append ifld-name " used as operand")
-+ (atlist-cons (bool-attr-make 'SEM-ONLY #t)
-+ (obj-atlist f))
-+ (obj:name (ifld-hw-type f))
-+ (obj:name (ifld-mode f))
-+ (make <hw-index> 'anonymous 'ifield (ifld-mode f) f)
-+ nil #f #f))
-+)
-+
-+; Specify an operand.
-+; Operands are normally specified by name, but they are subsequently wrapped
-+; in this.
-+
-+(dron (operand &options &mode op-name)
-+ #f
-+ (OPTIONS ANYNUMMODE SYMBOL) (NA NA NA) ;; ??? s/SYMBOL/OPERAND-NAME/ ?
-+ ARG
-+ (current-op-lookup op-name)
-+)
-+
-+; Operand naming/numbering.
-+; Operands are given names so that the operands as used in the semantics can
-+; be matched with arguments of function units. With good name choices of
-+; operands and function unit arguments, this is rarely necessary, but
-+; sometimes it is.
-+;
-+; ??? This obfuscates the semantic code a fair bit. Another way to do this
-+; would be to add new elements to <insn> to specify operands outside of
-+; the semantic code. E.g.
-+; (define-insn ...
-+; (inputs (in-gr1 src1) (in-gr2 src2))
-+; (outputs (out-pc pc) (out-gr dr) (reg-14 (reg WI h-gr 14)))
-+; ...)
-+; The intent here is to continue to allow the semantic code to use names
-+; of operands, and not overly complicate the input/output description.
-+;
-+; In instructions, operand numbers are recorded as well, to implement
-+; profiling and result writeback of parallel insns.
-+
-+; Rename operand VALUE to NEW-NAME.
-+; VALUE is an expression whose result is an object of type <operand>.
-+; It can be the name of an existing operand.
-+; ??? Might also support numbering by allowing NEW-NAME to be a number.
-+
-+(drsn (name &options &mode new-name value)
-+ #f
-+ (OPTIONS ANYNUMMODE SYMBOL RTX) (NA NA NA ANY)
-+ ARG
-+ ;; FIXME: s/DFLT/&mode/ ?
-+ (let ((result (object-copy (rtx-get 'DFLT value))))
-+ (op:set-sem-name! result new-name)
-+ result)
-+)
-+
-+; Operands are generally compiled to an internal form first.
-+; There is a fair bit of state associated with them, and it's easier to
-+; work with an object than source [which might get fairly complicated if
-+; it expresses all the state].
-+; Compiled operands are wrapped in this so that they still look like rtx.
-+
-+(dron (xop &options &mode object)
-+ #f
-+ (OPTIONS ANYNUMMODE OBJECT) (NA NA NA) ;; ??? s/OBJECT/OPERAND/ ?
-+ ARG
-+ object
-+)
-+
-+;(dron (opspec: &options &mode op-name op-num hw-ref attrs)
-+; (OPTIONS ANYNUMMODE SYMBOL NUMBER RTX ATTRS) (NA NA NA NA ANY NA)
-+; ARG
-+; (let ((opval (rtx-eval-with-estate hw-ref (mode:lookup &mode) *estate*)))
-+; (assert (operand? opval))
-+; ; Set the specified mode, ensuring it's ok.
-+; ; This also makes a copy as we don't want to modify predefined
-+; ; operands.
-+; (let ((operand (op:new-mode opval mode)))
-+; (op:set-sem-name! operand op-name)
-+; (op:set-num! operand op-num)
-+; (op:set-cond?! operand (attr-value attrs 'COND-REF #f))
-+; operand))
-+;)
-+
-+; Specify a reference to a local variable.
-+; Local variables are normally specified by name, but they are subsequently
-+; wrapped in this.
-+
-+(dron (local &options &mode local-name)
-+ #f
-+ (OPTIONS ANYNUMMODE SYMBOL) (NA NA NA) ;; ??? s/SYMBOL/LOCAL-NAME/ ?
-+ ARG
-+ (rtx-temp-lookup (tstate-env *tstate*) local-name)
-+)
-+
-+; FIXME: This doesn't work. See s-operand.
-+;(define (s-dup estate op-name)
-+; (if (not (insn? (estate-owner estate)))
-+; (error "dup: not processing an insn"))
-+; (vector-ref (insn:operands (current-current-context))
-+; (op:lookup-num (insn:operands (estate-owner estate)) op-name))
-+;)
-+;
-+; ??? Since operands are given names and not numbers this isn't currently used.
-+;
-+;(drsn (dup &options &mode op-name)
-+; #f
-+; (OPTIONS ANYNUMMODE SYMBOL) (NA NA NA)
-+; ;(s-dup *estate* op-name)
-+; (begin
-+; (if (not (insn? (estate-owner *estate*)))
-+; (error "dup: not processing an insn"))
-+; (vector-ref (insn:operands (estate-owner *estate*))
-+; (op:lookup-num (insn:operands (estate-owner *estate*)) op-name)))
-+; #f
-+;)
-+
-+; Returns non-zero if operand NAME was referenced (read if input operand
-+; and written if output operand).
-+; ??? What about input/output operands.
-+
-+(drsn (ref &options &mode name)
-+ BI
-+ (OPTIONS BIMODE SYMBOL) (NA NA NA) ;; ??? s/SYMBOL/OPERAND-NAME/ ?
-+ ARG
-+ #f
-+)
-+
-+; Return the index of an operand.
-+; For registers this is the register number.
-+; ??? Mode handling incomplete, this doesn't handle mem, which it could.
-+; Until then we fix the mode of the result to INT.
-+
-+(dron (index-of &options &mode op-rtx)
-+ INT
-+ (OPTIONS INTMODE RTX) (NA NA ANY)
-+ ARG
-+ ;; FIXME: s/DFLT/&mode/ ?
-+ (let* ((operand (rtx-eval-with-estate op-rtx DFLT *estate*))
-+ (f (hw-index:value (op:index operand)))
-+ (f-name (obj:name f)))
-+ (make <operand> (if (source-ident? f) (obj-location f) #f)
-+ f-name f-name
-+ (atlist-cons (bool-attr-make 'SEM-ONLY #t)
-+ (obj-atlist f))
-+ (obj:name (ifld-hw-type f))
-+ (obj:name (ifld-mode f))
-+ (make <hw-index> 'anonymous
-+ 'ifield
-+ (ifld-mode f)
-+ ; (send (op:type op) 'get-index-mode)
-+ f)
-+ nil #f #f))
-+)
-+
-+; Same as index-of, but improves readability for registers.
-+
-+(drmn (regno reg)
-+ (list 'index-of reg)
-+)
-+
-+; Hardware elements.
-+
-+; Describe a random hardware object.
-+; If INDX is missing, assume the element is a scalar. We pass 0 so s-hw
-+; doesn't have to unpack the list that would be passed if it were defined as
-+; (hw mode hw-name . indx). This is an internal implementation detail
-+; and thus harmless to the description language.
-+; These are implemented as syntax nodes as we must pass INDX to `s-hw'
-+; unevaluated.
-+; ??? Not currently supported. Not sure whether it should be.
-+;(drsn (hw &options &mode hw-elm . indx-sel)
-+; (OPTIONS ANYNUMMODE SYMBOL . RTX) (NA NA NA . INT)
-+; ARG
-+; (let ((indx (if (pair? indx-sel) (car indx-sel) 0))
-+; (selector (if (and (pair? indx-sel) (pair? (cdr indx-sel)))
-+; (cadr indx-sel)
-+; hw-selector-default))))
-+; (s-hw *estate* mode hw-elm indx selector)
-+;)
-+
-+; Register accesses.
-+; INDX-SEL is an optional index and possible selector.
-+(dron (reg &options &mode hw-elm . indx-sel)
-+ #f
-+ (OPTIONS ANYNUMMODE SYMBOL . RTX) (NA NA NA . INT) ;; ??? s/SYMBOL/HW-NAME/ ?
-+ ARG
-+ (let ((indx (if (pair? indx-sel) (car indx-sel) 0))
-+ (selector (if (and (pair? indx-sel) (pair? (cdr indx-sel)))
-+ (cadr indx-sel)
-+ hw-selector-default)))
-+ (s-hw *estate* mode hw-elm indx selector))
-+)
-+
-+; A raw-reg bypasses the getter/setter stuff. It's usually used in
-+; getter/setter definitions.
-+
-+(dron (raw-reg &options &mode hw-elm . indx-sel)
-+ #f
-+ (OPTIONS ANYNUMMODE SYMBOL . RTX) (NA NA NA . INT) ;; ??? s/SYMBOL/HW-NAME/ ?
-+ ARG
-+ (let ((indx (if (pair? indx-sel) (car indx-sel) 0))
-+ (selector (if (and (pair? indx-sel) (pair? (cdr indx-sel)))
-+ (cadr indx-sel)
-+ hw-selector-default)))
-+ (let ((result (s-hw *estate* mode hw-elm indx selector)))
-+ (obj-cons-attr! result (bool-attr-make 'RAW #t))
-+ result))
-+)
-+
-+; Memory accesses.
-+(dron (mem &options &mode addr . sel)
-+ #f
-+ (OPTIONS EXPLNUMMODE RTX . RTX) (NA NA AI . INT)
-+ ARG
-+ (s-hw *estate* mode 'h-memory addr
-+ (if (pair? sel) (car sel) hw-selector-default))
-+)
-+
-+; Instruction execution support.
-+; There are no jumps, per se. A jump is a set of `pc'.
-+
-+; The program counter.
-+; ??? Hmmm... needed? The pc is usually specified as `pc' which is shorthand
-+; for (operand pc).
-+;(dron (pc) () () ARG s-pc)
-+
-+; Fetch bytes from the instruction stream of size MODE.
-+; FIXME: Later need to augment this by passing an indicator to the mem-fetch
-+; routines that we're doing an ifetch.
-+; ??? wip!
-+
-+(drmn (ifetch mode pc)
-+ (list 'mem mode pc) ; hw-selector-ispace
-+)
-+
-+; NUM is the instruction number. Generally it is zero but if more than one
-+; insn is decoded at a time, it is non-zero. This is used, for example, to
-+; index into the scache [as an offset from the first insn].
-+; ??? wip!
-+
-+(drmn (decode mode pc insn num)
-+ (list 'c-call mode 'EXTRACT pc insn num)
-+)
-+
-+; NUM is the same number passed to `decode'.
-+; ??? wip!
-+
-+(drmn (execute mode num)
-+ (list 'c-call mode 'EXECUTE num)
-+)
-+
-+; Control Transfer Instructions
-+
-+; Sets of pc are handled like other sets so there are no branch rtx's.
-+
-+; Indicate there are N delay slots in the processing of RTX.
-+; N is a `const' node.
-+; The mode of the result is the mode of RTX.
-+; ??? wip!
-+
-+(drn (delay &options &mode n rtx)
-+ #f
-+ (OPTIONS VOIDORNUMMODE RTX RTX) (NA NA INT MATCHEXPR)
-+ MISC
-+ #f ; (s-sequence *estate* VOID '() rtx) ; wip!
-+)
-+
-+; Annul the following insn if YES? is non-zero.
-+; PC is the address of the annuling insn.
-+; The target is required to define SEM_ANNUL_INSN.
-+; ??? wip!
-+
-+(drmn (annul yes?)
-+ ; The pc reference here is hidden in c-code to not generate a spurious
-+ ; pc input operand.
-+ (list 'c-call 'VOID "SEM_ANNUL_INSN" (list 'c-code 'IAI "pc") yes?)
-+)
-+
-+; Skip the following insn if YES? is non-zero.
-+; The target is required to define SEM_SKIP_INSN.
-+; ??? This is similar to annul. Deletion of one of them defered.
-+; ??? wip!
-+
-+(drn (skip &options &mode yes?)
-+ VOID
-+ (OPTIONS VOIDMODE RTX) (NA NA INT)
-+ MISC
-+ #f
-+)
-+
-+; Attribute support.
-+
-+; Return a boolean indicating if attribute named ATTR is VALUE in OWNER.
-+; If VALUE is a list, return "true" if ATTR is any of the listed values.
-+; ??? Don't yet support !VALUE.
-+; OWNER is the result of either (current-insn) or (current-mach)
-+; [note that canonicalization will turn them into
-+; (current-{insn,mach} () DFLT)].
-+; The result is always of mode BI.
-+; FIXME: wip
-+;
-+; This is a syntax node so the args are not pre-evaluated.
-+; We just want the symbols.
-+; FIXME: Hmmm... it currently isn't a syntax node.
-+
-+(drn (eq-attr &options &mode owner attr value)
-+ BI
-+ (OPTIONS BIMODE RTX SYMBOL SYMORNUM) (NA NA ANY NA NA)
-+ MISC
-+ (let ((atval (if owner
-+ (obj-attr-value owner attr)
-+ (attr-lookup-default attr #f))))
-+ (if (list? value)
-+ (->bool (memq atval value))
-+ (eq? atval value)))
-+)
-+
-+; Get the value of attribute ATTR-NAME, expressable as an integer.
-+; OBJ is the result of either (current-insn) or (current-mach).
-+; Note that canonicalization will turn them into
-+; (current-{insn,mach} () {INSN,MACH}MODE).
-+; FIXME:wip
-+; This uses INTMODE because we can't otherwise determine the
-+; mode of the result (if elided).
-+
-+(drn (int-attr &options &mode obj attr-name)
-+ #f
-+ (OPTIONS INTMODE RTX SYMBOL) (NA NA ANY NA)
-+ MISC
-+ #f
-+)
-+
-+;; Deprecated alias for int-attr.
-+
-+(drmn (attr arg1 . rest)
-+ (cons 'int-attr (cons arg1 rest))
-+)
-+
-+; Same as `quote', for use in attributes cus "quote" sounds too jargonish.
-+; [Ok, not a strong argument for using "symbol", but so what?]
-+
-+(drsn (symbol &options &mode name)
-+ SYM
-+ (OPTIONS SYMMODE SYMBOL) (NA NA NA)
-+ ARG
-+ name
-+)
-+
-+; Return the current instruction.
-+
-+(drn (current-insn &options &mode)
-+ INSN
-+ (OPTIONS INSNMODE) (NA NA)
-+ MISC
-+ (let ((obj (estate-owner *estate*)))
-+ (if (not (insn? obj))
-+ (error "current context not an insn"))
-+ obj)
-+)
-+
-+; Return the currently selected machine.
-+; This can either be a compile-time or run-time value.
-+
-+(drn (current-mach &options &mode)
-+ MACH
-+ (OPTIONS MACHMODE) (NA NA)
-+ MISC
-+ -rtx-current-mach
-+)
-+
-+; Constants.
-+
-+; FIXME: Need to consider 64 bit hosts.
-+(drn (const &options &mode c)
-+ #f
-+ (OPTIONS ANYNUMMODE NUMBER) (NA NA NA)
-+ ARG
-+ ; When computing a value, just return the constant unchanged.
-+ c
-+)
-+
-+; Large mode support.
-+
-+; Combine smaller modes into a larger one.
-+; Arguments are specified most significant to least significant.
-+; ??? Not all of the combinations are supported in the simulator.
-+; They'll get added as necessary.
-+(drn (join &options &out-mode in-mode arg1 . arg-rest)
-+ #f
-+ (OPTIONS ANYNUMMODE ANYNUMMODE RTX . RTX) (NA NA NA ANY . ANY)
-+ MISC
-+ ; FIXME: Ensure correct number of args for in/out modes.
-+ ; FIXME: Ensure compatible modes.
-+ #f
-+)
-+
-+; GCC's subreg.
-+; Called subword 'cus it's not exactly subreg.
-+; Word numbering is word-order dependent.
-+; Word number 0 is the most significant word if big-endian-words.
-+; Word number 0 is the least significant word if little-endian-words.
-+; ??? GCC plans to switch to SUBREG_BYTE. Keep an eye out for the switch
-+; (which is extensive so probably won't happen anytime soon).
-+; MODE is the mode of the result, not operand0.
-+;
-+; The mode spec of operand0 use to be MATCHEXPR, but subword is not a normal rtx.
-+; The mode of operand0 is not necessarily the same as the mode of the result,
-+; and code which analyzes it would otherwise use the result mode (specified by
-+; `&mode') for the mode of operand0.
-+
-+(drn (subword &options &mode value word-num)
-+ #f
-+ (OPTIONS ANYNUMMODE RTX RTX) (NA NA ANY INT)
-+ ARG
-+ #f
-+)
-+
-+; ??? The split and concat stuff is just an experiment and should not be used.
-+; What's there now is just "thoughts put down on paper."
-+
-+(drmn (split split-mode in-mode di)
-+ ; FIXME: Ensure compatible modes
-+ ;(list 'c-raw-call 'BLK (string-append "SPLIT" in-mode split-mode) di)
-+ '(const 0)
-+)
-+
-+(drmn (concat modes arg1 . arg-rest)
-+ ; FIXME: Here might be the place to ensure
-+ ; (= (length modes) (length (cons arg1 arg-rest))).
-+ ;(cons 'c-raw-call (cons modes (cons "CONCAT" (cons arg1 arg-rest))))
-+ '(const 0)
-+)
-+
-+; Support for explicit C code.
-+; ??? GCC RTL calls this "unspec" which is arguably a more application
-+; independent name.
-+
-+(drn (c-code &options &mode text)
-+ #f
-+ (OPTIONS ANYCEXPRMODE STRING) (NA NA NA)
-+ UNSPEC
-+ #f
-+)
-+
-+; Invoke C functions passing them arguments from the semantic code.
-+; The arguments are passed as is, no conversion is done here.
-+; Usage is:
-+; (c-call mode name arg1 arg2 ...)
-+; which is converted into a C function call:
-+; name (current_cpu, arg1, arg2, ...)
-+; MODE is the mode of the result.
-+; If it is VOID this call is a statement and ';' is appended.
-+; Otherwise it is part of an expression.
-+
-+(drn (c-call &options &mode name . args)
-+ #f
-+ (OPTIONS ANYCEXPRMODE STRING . RTX) (NA NA NA . ANY)
-+ UNSPEC
-+ #f
-+)
-+
-+; Same as c-call but without implicit first arg of `current_cpu'.
-+
-+(drn (c-raw-call &options &mode name . args)
-+ #f
-+ (OPTIONS ANYCEXPRMODE STRING . RTX) (NA NA NA . ANY)
-+ UNSPEC
-+ #f
-+)
-+
-+; Set/get/miscellaneous
-+
-+(drn (nop &options &mode)
-+ VOID
-+ (OPTIONS VOIDMODE) (NA NA)
-+ MISC
-+ #f
-+)
-+
-+; Clobber - mark an object as modified without explaining why or how.
-+
-+(drn (clobber &options &mode object)
-+ VOID
-+ (OPTIONS VOIDORNUMMODE RTX) (NA NA MATCHEXPR)
-+ MISC
-+ #f
-+)
-+
-+; The `set' rtx.
-+; MODE is the mode of DST. If DFLT, use DST's default mode.
-+; The mode of the result is always VOID.
-+;
-+; ??? It might be more consistent to rename set -> set-trace, but that's
-+; too wordy. The `set' rtx is the normal one and we want the normal one to
-+; be the verbose one (prints result tracing messages). `set-quiet' is the
-+; atypical one, it doesn't print tracing messages. It may also turn out that
-+; a different mechanism (rather than the name "set-quiet") is used some day.
-+; One way would be to record the "quietness" state with the traversal state and
-+; use something like (with-quiet (set foo bar)) akin to with-output-to-string
-+; in Guile.
-+;
-+; i.e. set -> gen-set-trace
-+; set-quiet -> gen-set-quiet
-+;
-+; ??? One might want a `!' suffix as in `set!', but methinks that's following
-+; Scheme too closely.
-+
-+(drn (set &options &mode dst src)
-+ VOID
-+ (OPTIONS ANYNUMMODE SETRTX RTX) (NA NA MATCHEXPR MATCH2)
-+ SET
-+ #f
-+)
-+
-+(drn (set-quiet &options &mode dst src)
-+ VOID
-+ (OPTIONS ANYNUMMODE SETRTX RTX) (NA NA MATCHEXPR MATCH2)
-+ SET
-+ #f
-+)
-+
-+; Standard arithmetic operations.
-+
-+; It's nice emitting macro calls to the actual C operation in that the RTX
-+; expression is preserved, albeit in C. On the one hand it's one extra thing
-+; the programmer has to know when looking at the code. But on the other it's
-+; trivial stuff, and having a layer between RTX and C allows the
-+; macros/functions to be modified to handle unexpected situations.
-+;
-+; We do emit C directly for cases other than cpu semantics
-+; (e.g. the assembler).
-+;
-+; The language is defined such that we assume ANSI C semantics while avoiding
-+; implementation defined areas, with as few exceptions as possible.
-+;
-+; Current exceptions:
-+; - signed shift right assumes the sign bit is replicated.
-+;
-+; Additional notes [perhaps repeating what's in ANSI C for emphasis]:
-+; - callers of division and modulus fns must test for 0 beforehand
-+; if necessary
-+; - division and modulus fns have unspecified behavior for negative args
-+; [yes I know the C standard says implementation defined, here its
-+; unspecified]
-+; - later add versions of div/mod that have an explicit behaviour for -ve args
-+; - signedness is part of the rtx operation name, and is not determined
-+; from the arguments [elsewhere is a description of the tradeoffs]
-+; - ???
-+
-+(drn (neg &options &mode s1)
-+ #f
-+ (OPTIONS ANYNUMMODE RTX) (NA NA MATCHEXPR)
-+ UNARY
-+ #f
-+)
-+
-+(drn (abs &options &mode s1)
-+ #f
-+ (OPTIONS ANYNUMMODE RTX) (NA NA MATCHEXPR)
-+ UNARY
-+ #f
-+)
-+
-+; For integer values this is a bitwise operation (each bit inverted).
-+; For floating point values this produces 1/x.
-+; ??? Might want different names.
-+(drn (inv &options &mode s1)
-+ #f
-+ (OPTIONS ANYINTMODE RTX) (NA NA MATCHEXPR)
-+ UNARY
-+ #f
-+)
-+
-+; This is a boolean operation.
-+; MODE is the mode of S1. The result always has mode BI.
-+; ??? Perhaps `mode' shouldn't be here.
-+(drn (not &options &mode s1)
-+ BI
-+ (OPTIONS ANYINTMODE RTX) (NA NA MATCHEXPR)
-+ UNARY
-+ #f
-+)
-+
-+(drn (add &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYNUMMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ BINARY
-+ #f
-+)
-+(drn (sub &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYNUMMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ BINARY
-+ #f
-+)
-+
-+; "OF" for "overflow flag", "CF" for "carry flag",
-+; "s3" here must have type BI.
-+; For the *flag rtx's, MODE is the mode of S1,S2; the result always has
-+; mode BI.
-+(drn (addc &options &mode s1 s2 s3)
-+ #f
-+ (OPTIONS ANYINTMODE RTX RTX RTX) (NA NA MATCHEXPR MATCH2 BI)
-+ TRINARY
-+ #f
-+)
-+(drn (addc-cflag &options &mode s1 s2 s3)
-+ BI
-+ (OPTIONS ANYINTMODE RTX RTX RTX) (NA NA MATCHEXPR MATCH2 BI)
-+ TRINARY
-+ #f
-+)
-+(drn (addc-oflag &options &mode s1 s2 s3)
-+ BI
-+ (OPTIONS ANYINTMODE RTX RTX RTX) (NA NA MATCHEXPR MATCH2 BI)
-+ TRINARY
-+ #f
-+)
-+(drn (subc &options &mode s1 s2 s3)
-+ #f
-+ (OPTIONS ANYINTMODE RTX RTX RTX) (NA NA MATCHEXPR MATCH2 BI)
-+ TRINARY
-+ #f
-+)
-+(drn (subc-cflag &options &mode s1 s2 s3)
-+ BI
-+ (OPTIONS ANYINTMODE RTX RTX RTX) (NA NA MATCHEXPR MATCH2 BI)
-+ TRINARY
-+ #f
-+)
-+(drn (subc-oflag &options &mode s1 s2 s3)
-+ BI
-+ (OPTIONS ANYINTMODE RTX RTX RTX) (NA NA MATCHEXPR MATCH2 BI)
-+ TRINARY
-+ #f
-+)
-+
-+;; ??? These are deprecated. Delete in time.
-+(drn (add-cflag &options &mode s1 s2 s3)
-+ BI
-+ (OPTIONS ANYINTMODE RTX RTX RTX) (NA NA MATCHEXPR MATCH2 BI)
-+ TRINARY
-+ #f
-+)
-+(drn (add-oflag &options &mode s1 s2 s3)
-+ BI
-+ (OPTIONS ANYINTMODE RTX RTX RTX) (NA NA MATCHEXPR MATCH2 BI)
-+ TRINARY
-+ #f
-+)
-+(drn (sub-cflag &options &mode s1 s2 s3)
-+ BI
-+ (OPTIONS ANYINTMODE RTX RTX RTX) (NA NA MATCHEXPR MATCH2 BI)
-+ TRINARY
-+ #f
-+)
-+(drn (sub-oflag &options &mode s1 s2 s3)
-+ BI
-+ (OPTIONS ANYINTMODE RTX RTX RTX) (NA NA MATCHEXPR MATCH2 BI)
-+ TRINARY
-+ #f
-+)
-+
-+; Usurp these names so that we have consistent rtl should a program generator
-+; ever want to infer more about what the semantics are doing.
-+; For now these are just macros that expand to real rtl to perform the
-+; operation.
-+
-+; Return bit indicating if VALUE is zero/non-zero.
-+(drmn (zflag arg1 . rest) ; mode value)
-+ (if (null? rest) ; mode missing?
-+ (list 'eq 'DFLT arg1 0)
-+ (list 'eq arg1 (car rest) 0))
-+)
-+
-+; Return bit indicating if VALUE is negative/non-negative.
-+(drmn (nflag arg1 . rest) ; mode value)
-+ (if (null? rest) ; mode missing?
-+ (list 'lt 'DFLT arg1 0)
-+ (list 'lt arg1 (car rest) 0))
-+)
-+
-+; Multiply/divide.
-+
-+(drn (mul &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYNUMMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ BINARY
-+ #f
-+)
-+; ??? In non-sim case, ensure s1,s2 is in right C type for right result.
-+; ??? Need two variants, one that avoids implementation defined situations
-+; [both host and target], and one that specifies implementation defined
-+; situations [target].
-+(drn (div &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYNUMMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ BINARY
-+ #f
-+)
-+(drn (udiv &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYINTMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ BINARY
-+ #f
-+)
-+(drn (mod &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYNUMMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ BINARY
-+ #f
-+)
-+(drn (umod &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYINTMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ BINARY
-+ #f
-+)
-+
-+; wip: mixed mode mul/div
-+
-+; various floating point routines
-+
-+(drn (sqrt &options &mode s1)
-+ #f
-+ (OPTIONS ANYFLOATMODE RTX) (NA NA MATCHEXPR)
-+ UNARY
-+ #f
-+)
-+
-+(drn (cos &options &mode s1)
-+ #f
-+ (OPTIONS ANYFLOATMODE RTX) (NA NA MATCHEXPR)
-+ UNARY
-+ #f
-+)
-+
-+(drn (sin &options &mode s1)
-+ #f
-+ (OPTIONS ANYFLOATMODE RTX) (NA NA MATCHEXPR)
-+ UNARY
-+ #f
-+)
-+
-+(drn (nan &options &mode s1)
-+ BI
-+ (OPTIONS ANYFLOATMODE RTX) (NA NA MATCHEXPR)
-+ UNARY
-+ #f
-+)
-+(drn (qnan &options &mode s1)
-+ BI
-+ (OPTIONS ANYFLOATMODE RTX) (NA NA MATCHEXPR)
-+ UNARY
-+ #f
-+)
-+(drn (snan &options &mode s1)
-+ BI
-+ (OPTIONS ANYFLOATMODE RTX) (NA NA MATCHEXPR)
-+ UNARY
-+ #f
-+)
-+
-+; min/max
-+
-+(drn (min &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYNUMMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ BINARY
-+ #f
-+)
-+
-+(drn (max &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYNUMMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ BINARY
-+ #f
-+)
-+
-+(drn (umin &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYINTMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ BINARY
-+ #f
-+)
-+
-+(drn (umax &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYINTMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ BINARY
-+ #f
-+)
-+
-+; These are bitwise operations.
-+(drn (and &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYINTMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ BINARY
-+ #f
-+)
-+(drn (or &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYINTMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ BINARY
-+ #f
-+)
-+(drn (xor &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYINTMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ BINARY
-+ #f
-+)
-+
-+; Shift operations.
-+
-+(drn (sll &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYINTMODE RTX RTX) (NA NA MATCHEXPR INT)
-+ BINARY
-+ #f
-+)
-+(drn (srl &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYINTMODE RTX RTX) (NA NA MATCHEXPR INT)
-+ BINARY
-+ #f
-+)
-+; ??? In non-sim case, ensure s1 is in right C type for right result.
-+(drn (sra &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYINTMODE RTX RTX) (NA NA MATCHEXPR INT)
-+ BINARY
-+ #f
-+)
-+; Rotates don't really have a sign, so doesn't matter what we say.
-+(drn (ror &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYINTMODE RTX RTX) (NA NA MATCHEXPR INT)
-+ BINARY
-+ #f
-+)
-+(drn (rol &options &mode s1 s2)
-+ #f
-+ (OPTIONS ANYINTMODE RTX RTX) (NA NA MATCHEXPR INT)
-+ BINARY
-+ #f
-+)
-+; ??? Will also need rotate-with-carry [duh...].
-+
-+; These are boolean operations (e.g. C &&, ||).
-+; The result always has mode BI.
-+; ??? 'twould be more Schemey to take a variable number of args.
-+; ??? 'twould also simplify several .cpu description entries.
-+; On the other hand, handling an arbitrary number of args isn't supported by
-+; ISA's, which the main goal of what we're trying to represent.
-+(drn (andif &options &mode s1 s2)
-+ BI
-+ (OPTIONS BIMODE RTX RTX) (NA NA ANYINT ANYINT)
-+ BINARY ; IF?
-+ #f
-+)
-+(drn (orif &options &mode s1 s2)
-+ BI
-+ (OPTIONS BIMODE RTX RTX) (NA NA ANYINT ANYINT)
-+ BINARY ; IF?
-+ #f
-+)
-+
-+; `bitfield' is an experimental operation.
-+; It's not really needed but it might help simplify some things.
-+;
-+;(drn (bitfield mode src start length)
-+; ...
-+; ...
-+;)
-+
-+;; Integer conversions.
-+
-+(drn (ext &options &mode s1)
-+ #f
-+ (OPTIONS ANYINTMODE RTX) (NA NA ANY)
-+ UNARY
-+ #f
-+)
-+(drn (zext &options &mode s1)
-+ #f
-+ (OPTIONS ANYINTMODE RTX) (NA NA ANY)
-+ UNARY
-+ #f
-+)
-+(drn (trunc &options &mode s1)
-+ #f
-+ (OPTIONS ANYINTMODE RTX) (NA NA ANY)
-+ UNARY
-+ #f
-+)
-+
-+;; Conversions involving floating point values.
-+
-+(drn (fext &options &mode how s1)
-+ #f
-+ (OPTIONS ANYFLOATMODE RTX RTX) (NA NA INT ANY)
-+ UNARY
-+ #f
-+)
-+(drn (ftrunc &options &mode how s1)
-+ #f
-+ (OPTIONS ANYFLOATMODE RTX RTX) (NA NA INT ANY)
-+ UNARY
-+ #f
-+)
-+(drn (float &options &mode how s1)
-+ #f
-+ (OPTIONS ANYFLOATMODE RTX RTX) (NA NA INT ANY)
-+ UNARY
-+ #f
-+)
-+(drn (ufloat &options &mode how s1)
-+ #f
-+ (OPTIONS ANYFLOATMODE RTX RTX) (NA NA INT ANY)
-+ UNARY
-+ #f
-+)
-+(drn (fix &options &mode how s1)
-+ #f
-+ (OPTIONS ANYINTMODE RTX RTX) (NA NA INT ANY)
-+ UNARY
-+ #f
-+)
-+(drn (ufix &options &mode how s1)
-+ #f
-+ (OPTIONS ANYINTMODE RTX RTX) (NA NA INT ANY)
-+ UNARY
-+ #f
-+)
-+
-+; Comparisons.
-+; MODE is the mode of S1,S2. The result always has mode BI.
-+
-+(drn (eq &options &mode s1 s2)
-+ BI
-+ (OPTIONS ANYNUMMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ COMPARE
-+ #f
-+)
-+(drn (ne &options &mode s1 s2)
-+ BI
-+ (OPTIONS ANYNUMMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ COMPARE
-+ #f
-+)
-+; ??? In non-sim case, ensure s1,s2 is in right C type for right result.
-+(drn (lt &options &mode s1 s2)
-+ BI
-+ (OPTIONS ANYNUMMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ COMPARE
-+ #f
-+)
-+(drn (le &options &mode s1 s2)
-+ BI
-+ (OPTIONS ANYNUMMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ COMPARE
-+ #f
-+)
-+(drn (gt &options &mode s1 s2)
-+ BI
-+ (OPTIONS ANYNUMMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ COMPARE
-+ #f
-+)
-+(drn (ge &options &mode s1 s2)
-+ BI
-+ (OPTIONS ANYNUMMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ COMPARE
-+ #f
-+)
-+; ??? In non-sim case, ensure s1,s2 is in right C type for right result.
-+(drn (ltu &options &mode s1 s2)
-+ BI
-+ (OPTIONS ANYNUMMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ COMPARE
-+ #f
-+)
-+(drn (leu &options &mode s1 s2)
-+ BI
-+ (OPTIONS ANYNUMMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ COMPARE
-+ #f
-+)
-+(drn (gtu &options &mode s1 s2)
-+ BI
-+ (OPTIONS ANYNUMMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ COMPARE
-+ #f
-+)
-+(drn (geu &options &mode s1 s2)
-+ BI
-+ (OPTIONS ANYNUMMODE RTX RTX) (NA NA MATCHEXPR MATCH2)
-+ COMPARE
-+ #f
-+)
-+
-+; Set membership.
-+; Useful in ifield assertions.
-+
-+; Return a boolean (BI mode) indicating if VALUE is in SET.
-+; VALUE is any constant rtx. SET is a `number-list' rtx.
-+
-+(drn (member &options &mode value set)
-+ #f
-+ (OPTIONS BIMODE RTX RTX) (NA NA INT INT)
-+ MISC
-+ (begin
-+ (if (not (rtx-constant? value))
-+ (estate-error *estate* "`member rtx'"
-+ "value is not a constant" value))
-+ (if (not (rtx-kind? 'number-list set))
-+ (estate-error *estate* "`member' rtx"
-+ "set is not a `number-list' rtx" set))
-+ (if (memq (rtx-constant-value value) (rtx-number-list-values set))
-+ (rtx-true)
-+ (rtx-false)))
-+)
-+
-+;; FIXME: "number" in "number-list" implies floats are ok.
-+;; Rename to integer-list, int-list, or some such.
-+
-+(drn (number-list &options &mode value-list)
-+ #f
-+ (OPTIONS INTMODE NUMBER . NUMBER) (NA NA NA . NA)
-+ MISC
-+ #f
-+)
-+
-+; Conditional execution.
-+
-+; FIXME: make syntax node?
-+(drn (if &options &mode cond then . else)
-+ #f
-+ ;; ??? It would be cleaner if TESTRTX had to have BI mode.
-+ (OPTIONS ANYEXPRMODE TESTRTX RTX . RTX) (NA NA ANYINT MATCHEXPR . MATCH3)
-+ IF
-+ (apply e-if (append! (list *estate* mode cond then) else))
-+)
-+
-+; ??? The syntax here isn't quite that of Scheme. A condition must be
-+; followed by a result expression.
-+; ??? The syntax here isn't quite right, there must be at least one cond rtx.
-+; ??? Intermediate expressions (the ones before the last one) needn't have
-+; the same mode as the result.
-+(drsn (cond &options &mode . cond-code-list)
-+ #f
-+ (OPTIONS ANYEXPRMODE . CONDRTX) (NA NA . MATCHEXPR)
-+ COND
-+ #f
-+)
-+
-+; ??? The syntax here isn't quite right, there must be at least one case.
-+; ??? Intermediate expressions (the ones before the last one) needn't have
-+; the same mode as the result.
-+(drn (case &options &mode test . case-list)
-+ #f
-+ (OPTIONS ANYEXPRMODE RTX . CASERTX) (NA NA ANY . MATCHEXPR)
-+ COND
-+ #f
-+)
-+
-+; parallel, sequence, do-count, closure
-+
-+; This has to be a syntax node as we don't want EXPRS to be pre-evaluated.
-+; All semantic ops must have a mode, though here it must be VOID.
-+; IGNORE is for consistency with sequence. ??? Delete some day.
-+; ??? There's no real need for mode either, but convention requires it.
-+
-+(drsn (parallel &options &mode ignore expr . exprs)
-+ #f
-+ (OPTIONS VOIDMODE LOCALS RTX . RTX) (NA NA NA VOID . VOID)
-+ SEQUENCE
-+ #f
-+)
-+
-+; This has to be a syntax node to handle locals properly: they're not defined
-+; yet and thus pre-evaluating the expressions doesn't work.
-+
-+(drsn (sequence &options &mode locals expr . exprs)
-+ #f
-+ (OPTIONS VOIDORNUMMODE LOCALS RTX . RTX) (NA NA NA MATCHSEQ . MATCHSEQ)
-+ SEQUENCE
-+ #f
-+)
-+
-+; This has to be a syntax node to handle iter-var properly: it's not defined
-+; yet and thus pre-evaluating the expressions doesn't work.
-+
-+(drsn (do-count &options &mode iter-var nr-times expr . exprs)
-+ #f
-+ (OPTIONS VOIDMODE ITERATION RTX RTX . RTX) (NA NA NA INT VOID . VOID)
-+ SEQUENCE
-+ #f
-+)
-+
-+; Internal rtx to create a closure.
-+; Internal, so it does not appear in rtl.texi (at least not yet).
-+; ??? Maybe closures shouldn't be separate from sequences,
-+; but I'm less convinced these days.
-+
-+(drsn (closure &options &mode isa-name-list env-stack expr)
-+ #f
-+ (OPTIONS VOIDORNUMMODE SYMBOLLIST ENVSTACK RTX) (NA NA NA NA MATCHEXPR)
-+ MISC
-+ #f
-+)
-+
-+)) ; End of def-rtx-funcs
-diff -Nur binutils-2.24.orig/cgen/semantics.scm binutils-2.24/cgen/semantics.scm
---- binutils-2.24.orig/cgen/semantics.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/semantics.scm 2016-06-30 21:26:12.669893734 +0200
-@@ -0,0 +1,569 @@
-+; Routines for instruction semantic analysis.
-+; Copyright (C) 2000, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+;
-+; Semantic expression compilation.
-+; This is more involved than normal rtx compilation as we need to keep
-+; track of the inputs and outputs. Various attributes that can be derived
-+; from the code are also computed.
-+
-+; Subroutine of -rtx-find-op to determine if two modes are equivalent.
-+; Two modes are equivalent if they're equal, or if their sem-mode fields
-+; are equal.
-+; M1 and M2 are mode names.
-+
-+(define (/rtx-mode-equiv? m1 m2)
-+ (or (eq? m1 m2)
-+ (let ((mode1 (mode:lookup m1))
-+ (mode2 (mode:lookup m2)))
-+ (let ((s1 (mode:sem-mode mode1))
-+ (s2 (mode:sem-mode mode2)))
-+ (eq? (if s1 (obj:name s1) m1) (if s2 (obj:name s2) m2)))))
-+)
-+
-+; Subroutine of semantic-compile to find OP in OP-LIST.
-+; OP-LIST is a list of operand expressions: (type expr mode name indx-sel).
-+; The result is the list element or #f if not found.
-+; TYPE is one of -op- reg mem.
-+; EXPR is the constructed `xop' rtx expression for the operand,
-+; ignored in the search.
-+; MODE must match, as defined by /rtx-mode-equiv?.
-+; NAME is the hardware element name, ifield name, or '-op-'.
-+; INDX-SEL must match if present in either.
-+;
-+; ??? Does this need to take "conditionally-referenced" into account?
-+
-+(define (/rtx-find-op op op-list)
-+ (let ((type (car op))
-+ (mode (caddr op))
-+ (name (cadddr op))
-+ (indx-sel (car (cddddr op))))
-+ ; The first cdr is to drop the dummy first arg.
-+ (let loop ((op-list (cdr op-list)))
-+ (cond ((null? op-list) #f)
-+ ((eq? type (caar op-list))
-+ (let ((try (car op-list)))
-+ (if (and (eq? name (cadddr try))
-+ (/rtx-mode-equiv? mode (caddr try))
-+ (equal? indx-sel (car (cddddr try))))
-+ try
-+ (loop (cdr op-list)))))
-+ (else (loop (cdr op-list))))))
-+)
-+
-+; Subroutine of semantic-compile to determine how the operand in
-+; position OP-POS of EXPR is used.
-+; The result is one of 'use, 'set, 'set-quiet.
-+; "use" means "input operand".
-+
-+(define (/rtx-ref-type expr op-pos)
-+ ; operand 0 is the option list, operand 1 is the mode
-+ ; (if you want to complain, fine, it's not like it would be unexpected)
-+ (if (= op-pos 2)
-+ (case (car expr)
-+ ((set) 'set)
-+ ((set-quiet clobber) 'set-quiet)
-+ (else 'use))
-+ 'use)
-+)
-+
-+; Subroutine of semantic-compile:process-expr!, to simplify it.
-+; Looks up the operand in the current set, returns it if found,
-+; otherwise adds it.
-+; REF-TYPE is one of 'use, 'set, 'set-quiet.
-+; Adds COND-CTI/UNCOND-CTI to SEM-ATTRS if the operand is a set of the pc.
-+
-+(define (/build-operand! op-expr tstate ref-type op-list sem-attrs)
-+ (let* ((orig-op (rtx-operand-obj op-expr (obj-isa-list (tstate-owner tstate))))
-+ (mode (rtx-mode op-expr))
-+ ;; We need a copy as we'll be modifying it.
-+ (op (op:new-mode orig-op mode))
-+ ;; The first #f is a placeholder for the object.
-+ (try (list '-op- #f mode (rtx-arg1 op-expr) #f))
-+ (existing-op (/rtx-find-op try op-list)))
-+
-+ (assert (not (eq? (op:mode-name op) 'DFLT)))
-+
-+ (if (and (pc? op)
-+ (memq ref-type '(set set-quiet)))
-+ (append! sem-attrs
-+ (list (if (tstate-cond? tstate) 'COND-CTI 'UNCOND-CTI))))
-+
-+ ; If already present, return the object, otherwise add it.
-+ (if existing-op
-+
-+ (cadr existing-op)
-+
-+ ; We can't set the operand number yet 'cus we don't know it.
-+ ; However, when it's computed we'll need to set all associated
-+ ; operands. This is done by creating shared rtx (a la gcc) - the
-+ ; operand number then need only be updated in one place.
-+
-+ (begin
-+ (op:set-cond?! op (tstate-cond? tstate))
-+ ; Set the object rtx in `try', now that we have it.
-+ (set-car! (cdr try) (rtx-make-xop op))
-+ ; Add the operand to in/out-ops.
-+ (append! op-list (list try))
-+ (cadr try))))
-+)
-+
-+; Subroutine of semantic-compile:process-expr!, to simplify it.
-+; REF-TYPE is one of 'use, 'set, 'set-quiet.
-+; Adds COND-CTI/UNCOND-CTI to SEM-ATTRS if the operand is a set of the pc.
-+
-+(define (/build-reg-operand! expr tstate ref-type op-list sem-attrs)
-+ (let* ((hw-name (rtx-reg-name expr))
-+ (hw (current-hw-sem-lookup-1 hw-name)))
-+
-+ (if hw
-+
-+ (let* ((mode (rtx-mode expr))
-+ (indx-sel (rtx-reg-index-sel expr))
-+ ; #f is a place-holder for the object (filled in later)
-+ (try (list 'reg #f mode hw-name indx-sel))
-+ (existing-op (/rtx-find-op try op-list)))
-+
-+ ;; FIXME: keep name h-pc hardwired?
-+ (if (and (eq? 'h-pc hw-name)
-+ (memq ref-type '(set set-quiet)))
-+ (append! sem-attrs
-+ (list (if (tstate-cond? tstate) 'COND-CTI 'UNCOND-CTI))))
-+
-+ ; If already present, return the object, otherwise add it.
-+ (if existing-op
-+
-+ (cadr existing-op)
-+
-+ (let ((xop (apply reg (cons (tstate->estate tstate)
-+ (cons mode
-+ (cons hw-name indx-sel))))))
-+ (op:set-cond?! xop (tstate-cond? tstate))
-+ ; Set the object rtx in `try', now that we have it.
-+ (set-car! (cdr try) (rtx-make-xop xop))
-+ ; Add the operand to in/out-ops.
-+ (append! op-list (list try))
-+ (cadr try))))
-+
-+ (parse-error (tstate-context tstate) "unknown reg" expr)))
-+)
-+
-+; Subroutine of semantic-compile:process-expr!, to simplify it.
-+
-+(define (/build-mem-operand! expr tstate op-list)
-+ (let ((mode (rtx-mode expr))
-+ (indx-sel (rtx-mem-index-sel expr)))
-+
-+ (let* ((try (list 'mem #f mode 'h-memory indx-sel))
-+ (existing-op (/rtx-find-op try op-list)))
-+
-+ ; If already present, return the object, otherwise add it.
-+ (if existing-op
-+
-+ (cadr existing-op)
-+
-+ (let ((xop (apply mem (cons (tstate->estate tstate)
-+ (cons mode indx-sel)))))
-+ (op:set-cond?! xop (tstate-cond? tstate))
-+ ; Set the object in `try', now that we have it.
-+ (set-car! (cdr try) (rtx-make-xop xop))
-+ ; Add the operand to in/out-ops.
-+ (append! op-list (list try))
-+ (cadr try)))))
-+)
-+
-+; Subroutine of semantic-compile:process-expr!, to simplify it.
-+
-+(define (/build-ifield-operand! expr tstate op-list)
-+ (let* ((f-name (rtx-ifield-name expr))
-+ (f (current-ifld-lookup f-name)))
-+
-+ (if (not f)
-+ (parse-error (tstate-context tstate) "unknown ifield" f-name))
-+
-+ (let* ((mode (obj:name (ifld-mode f)))
-+ (try (list '-op- #f mode f-name #f))
-+ (existing-op (/rtx-find-op try op-list)))
-+
-+ ; If already present, return the object, otherwise add it.
-+ (if existing-op
-+
-+ (cadr existing-op)
-+
-+ (let ((xop (make <operand> (obj-location f)
-+ f-name f-name
-+ (atlist-cons (bool-attr-make 'SEM-ONLY #t)
-+ (obj-atlist f))
-+ (obj:name (ifld-hw-type f))
-+ mode
-+ (make <hw-index> 'anonymous
-+ 'ifield (ifld-mode f) f)
-+ nil #f #f)))
-+ (set-car! (cdr try) (rtx-make-xop xop))
-+ (append! op-list (list try))
-+ (cadr try)))))
-+)
-+
-+; Subroutine of semantic-compile:process-expr!, to simplify it.
-+;
-+; ??? There are various optimizations (both space usage in ARGBUF and time
-+; spent in semantic code) that can be done on code that uses index-of
-+; (see i960's movq insn). Later.
-+
-+(define (/build-index-of-operand! expr tstate op-list)
-+ (if (not (and (rtx? (rtx-index-of-value expr))
-+ (rtx-kind? 'operand (rtx-index-of-value expr))))
-+ (parse-error (tstate-context tstate)
-+ "only `(index-of operand)' is currently supported"
-+ expr))
-+
-+ (let ((op (rtx-operand-obj (rtx-index-of-value expr)
-+ (obj-isa-list (tstate-owner tstate)))))
-+ (let ((indx (op:index op)))
-+ (if (not (eq? (hw-index:type indx) 'ifield))
-+ (parse-error (tstate-context tstate)
-+ "only ifield indices are currently supported"
-+ expr))
-+ (let* ((f (hw-index:value indx))
-+ (f-name (obj:name f)))
-+ ; The rest of this is identical to /build-ifield-operand!.
-+ (let* ((mode (obj:name (ifld-mode f)))
-+ (try (list '-op- #f mode f-name #f))
-+ (existing-op (/rtx-find-op try op-list)))
-+
-+ ; If already present, return the object, otherwise add it.
-+ (if existing-op
-+
-+ (cadr existing-op)
-+
-+ (let ((xop (make <operand> (if (source-ident? f) (obj-location f) #f)
-+ f-name f-name
-+ (atlist-cons (bool-attr-make 'SEM-ONLY #t)
-+ (obj-atlist f))
-+ (obj:name (ifld-hw-type f))
-+ mode
-+ (make <hw-index> 'anonymous
-+ 'ifield
-+ (ifld-mode f)
-+ ; (send (op:type op) 'get-index-mode)
-+ f)
-+ nil #f #f)))
-+ (set-car! (cdr try) (rtx-make-xop xop))
-+ (append! op-list (list try))
-+ (cadr try)))))))
-+)
-+
-+; Build the tstate known value list for INSN.
-+; This is built from the ifield-assertion list.
-+
-+(define (insn-build-known-values insn)
-+ (let ((expr (insn-ifield-assertion insn)))
-+ (if expr
-+ (case (rtx-name expr)
-+ ((eq)
-+ (if (and (rtx-kind? 'ifield (rtx-cmp-op-arg expr 0))
-+ (rtx-constant? (rtx-cmp-op-arg expr 1)))
-+ (list (cons (rtx-ifield-name (rtx-cmp-op-arg expr 0))
-+ (rtx-cmp-op-arg expr 1)))
-+ nil))
-+ ((member)
-+ (if (rtx-kind? 'ifield (rtx-member-value expr))
-+ (list (cons (rtx-ifield-name (rtx-member-value expr))
-+ (rtx-member-set expr)))
-+ nil))
-+ (else nil))
-+ nil))
-+)
-+
-+; Structure to record the result of semantic-compile.
-+
-+(define (csem-make compiled-code inputs outputs attributes)
-+ (vector compiled-code inputs outputs attributes)
-+)
-+
-+; Accessors.
-+
-+(define (csem-code csem) (vector-ref csem 0))
-+(define (csem-inputs csem) (vector-ref csem 1))
-+(define (csem-outputs csem) (vector-ref csem 2))
-+(define (csem-attrs csem) (vector-ref csem 3))
-+
-+; Traverse SEM-CODE, computing the input and output operands.
-+; The result is an object of four elements (built with csem-make).
-+; The first is a list of the canonical form of each element in SEM-CODE:
-+; operand and ifield elements specified without `operand' or `ifield' have it
-+; prepended, and operand numbers are computed for each operand.
-+; Operand numbers are needed when emitting "write" handlers for LIW cpus.
-+; Having the operand numbers available is also useful for efficient
-+; modeling: recording operand references can be done with a bitmask (one host
-+; insn), and the code to do the modeling can be kept out of the code that
-+; performs the insn.
-+; The second is the list of input <operand> objects.
-+; The third is the list of output <operand> objects.
-+; The fourth is an <attr-list> object of attributes that can be computed from
-+; the semantics.
-+; The possibilities are: UNCOND-CTI, COND-CTI, SKIP-CTI, DELAY-SLOT.
-+; ??? Combine *-CTI into an enum attribute.
-+;
-+; CONTEXT is a <context> object or #f if there is none.
-+; INSN is the <insn> object.
-+; SEM-CODE must be canonicalized rtl.
-+;
-+; ??? Specifying operand ordinals in the source would simplify this and speed
-+; it up. On the other hand that makes the source form more complex. Maybe the
-+; complexity will prove necessary, but following the goal of "incremental
-+; complication", we don't do this yet.
-+; Another way to simplify this and speed it up would be to add lists of
-+; input/output operands to the instruction description.
-+;
-+; ??? This calls rtx-simplify which calls rtx-traverse as it's simpler to
-+; simplify EXPR first, and then compile it. On the other hand it's slower
-+; (two calls to rtx-traverse!).
-+
-+(define (semantic-compile context insn sem-code)
-+ (assert (rtx? sem-code))
-+
-+ (let*
-+ (
-+ ; These record the result of traversing SEM-CODE.
-+ ; They're lists of (type object mode name [args ...]).
-+ ; TYPE is one of: -op- reg mem.
-+ ; `-op-' is just something unique and is only used internally.
-+ ; OBJECT is the constructed <operand> object.
-+ ; The first element is just a dummy so that append! always works.
-+ (in-ops (list (list #f)))
-+ (out-ops (list (list #f)))
-+
-+ ; List of attributes computed from SEM-CODE.
-+ ; The first element is just a dummy so that append! always works.
-+ (sem-attrs (list #f))
-+
-+ ; Called for expressions encountered in SEM-CODE.
-+ ; Don't waste cpu here, this is part of the slowest piece in CGEN.
-+ (process-expr!
-+ (lambda (rtx-obj expr parent-expr op-pos tstate appstuff)
-+ (case (car expr)
-+
-+ ;; NOTE: Despite the ! in, e.g., /build-reg-operand!,
-+ ;; it does return a result.
-+
-+ ; Registers.
-+ ((reg) (let ((ref-type (/rtx-ref-type parent-expr op-pos))
-+ ; ??? could verify reg is a scalar
-+ (regno (or (rtx-reg-number expr) 0)))
-+ ; The register number is either a number or an
-+ ; expression.
-+ ; ??? This is a departure from GCC RTL that might have
-+ ; significant ramifications. On the other hand in cases
-+ ; where it matters the expression could always be
-+ ; required to reduce to a constant (or some such).
-+ (cond ((number? regno) #t)
-+ ((form? regno)
-+ (rtx-traverse-operands rtx-obj expr tstate appstuff))
-+ (else (parse-error (tstate-context tstate)
-+ "invalid register number"
-+ regno)))
-+ (/build-reg-operand! expr tstate ref-type
-+ (if (eq? ref-type 'use)
-+ in-ops
-+ out-ops)
-+ sem-attrs)))
-+
-+ ; Memory.
-+ ((mem) (let ((ref-type (/rtx-ref-type parent-expr op-pos)))
-+ (rtx-traverse-operands rtx-obj expr tstate appstuff)
-+ (/build-mem-operand! expr tstate
-+ (if (eq? ref-type 'use)
-+ in-ops
-+ out-ops))))
-+
-+ ; Operands.
-+ ((operand) (let ((ref-type (/rtx-ref-type parent-expr op-pos)))
-+ (/build-operand! expr tstate ref-type
-+ (if (eq? ref-type 'use)
-+ in-ops
-+ out-ops)
-+ sem-attrs)))
-+
-+ ; Give operand new name.
-+ ((name) (let ((result (/rtx-traverse (caddr expr) 'RTX
-+ parent-expr op-pos tstate appstuff)))
-+ (if (not (operand? result))
-+ (error "name: invalid argument:" expr result))
-+ (op:set-sem-name! result (cadr expr))
-+ ; (op:set-num! result (caddr expr))
-+ result))
-+
-+ ; Specify a reference to a local variable
-+ ((local) expr) ; nothing to do
-+
-+ ; Instruction fields.
-+ ((ifield) (let ((ref-type (/rtx-ref-type parent-expr op-pos)))
-+ (if (not (eq? ref-type 'use))
-+ (parse-error (tstate-context tstate)
-+ "can't set an `ifield'" expr))
-+ (/build-ifield-operand! expr tstate in-ops)))
-+
-+ ; Hardware indices.
-+ ; For registers this is the register number.
-+ ; For memory this is the address.
-+ ; For constants, this is the constant.
-+ ((index-of) (let ((ref-type (/rtx-ref-type parent-expr op-pos)))
-+ (if (not (eq? ref-type 'use))
-+ (parse-error (tstate-context tstate)
-+ "can't set an `index-of'" expr))
-+ (/build-index-of-operand! expr tstate in-ops)))
-+
-+ ; Machine generate the SKIP-CTI attribute.
-+ ((skip) (append! sem-attrs (list 'SKIP-CTI)) #f)
-+
-+ ; Machine generate the DELAY-SLOT attribute.
-+ ((delay) (append! sem-attrs (list 'DELAY-SLOT)) #f)
-+
-+ ; If this is a syntax expression, the operands won't have been
-+ ; processed, so tell our caller we want it to by returning #f.
-+ ; We do the same for non-syntax expressions to keep things
-+ ; simple. This requires collaboration with the traversal
-+ ; handlers which are defined to do what we want if we return #f.
-+ (else #f))))
-+
-+ ; Whew. We're now ready to traverse the expression.
-+ ; Traverse the expression recording the operands and building objects
-+ ; for most elements in the source representation.
-+ ; This also performs various simplifications.
-+ ; In particular machine dependent code for non-selected machines
-+ ; is discarded.
-+ (compiled-expr (rtx-traverse
-+ context
-+ insn
-+ (rtx-simplify context insn sem-code
-+ (insn-build-known-values insn))
-+ process-expr!
-+ #f))
-+ )
-+
-+ ;(display "in: ") (display in-ops) (newline)
-+ ;(display "out: ") (display out-ops) (newline)
-+ ;(force-output)
-+
-+ ; Now that we have the nub of all input and output operands,
-+ ; we can assign operand numbers. Inputs and outputs are not defined
-+ ; separately, output operand numbers follow inputs. This simplifies the
-+ ; code which keeps track of such things: it can use one variable.
-+ ; The assignment is defined to be arbitrary. If there comes a day
-+ ; when we need to prespecify operand numbers, revisit.
-+ ; The operand lists are sorted to avoid spurious differences in generated
-+ ; code (for example unnecessary extra entries can be created in the
-+ ; ARGBUF struct).
-+
-+ ; Drop dummy first arg and sort operand lists.
-+ (let ((sorted-ins
-+ (alpha-sort-obj-list (map (lambda (op)
-+ (rtx-xop-obj (cadr op)))
-+ (cdr in-ops))))
-+ (sorted-outs
-+ (alpha-sort-obj-list (map (lambda (op)
-+ (rtx-xop-obj (cadr op)))
-+ (cdr out-ops))))
-+ (sem-attrs (cdr sem-attrs)))
-+
-+ (let ((in-op-nums (iota (length sorted-ins)))
-+ (out-op-nums (iota (length sorted-outs) (length sorted-ins))))
-+
-+ (for-each (lambda (op num) (op:set-num! op num))
-+ sorted-ins in-op-nums)
-+ (for-each (lambda (op num) (op:set-num! op num))
-+ sorted-outs out-op-nums)
-+
-+ (let ((dump (lambda (op)
-+ (string/symbol-append " "
-+ (obj:name op)
-+ " "
-+ (number->string (op:num op))
-+ "\n"))))
-+ (logit 4
-+ "Input operands:\n"
-+ (map dump sorted-ins)
-+ "Output operands:\n"
-+ (map dump sorted-outs)
-+ "End of operands.\n"))
-+
-+ (csem-make compiled-expr sorted-ins sorted-outs
-+ (atlist-parse context sem-attrs "")))))
-+)
-+
-+; Traverse SEM-CODE, computing attributes derivable from it.
-+; The result is an <attr-list> object of attributes that can be computed from
-+; the semantics.
-+; The possibilities are: UNCOND-CTI, COND-CTI, SKIP-CTI, DELAY-SLOT.
-+; This computes the same values as semantic-compile, but for speed is
-+; focused on attributes only.
-+; ??? Combine *-CTI into an enum attribute.
-+;
-+; CONTEXT is a <context> object or #f if there is none.
-+; INSN is the <insn> object.
-+; SEM-CODE must be canonicalized rtl.
-+
-+(define (semantic-attrs context insn sem-code)
-+ (assert (rtx? sem-code))
-+
-+ (let*
-+ (
-+ ; List of attributes computed from SEM-CODE.
-+ ; The first element is just a dummy so that append! always works.
-+ (sem-attrs (list #f))
-+
-+ ; Called for expressions encountered in SEM-CODE.
-+ (process-expr!
-+ (lambda (rtx-obj expr parent-expr op-pos tstate appstuff)
-+ (case (car expr)
-+
-+ ;; FIXME: What's the result for the operand case?
-+ ((operand) (if (and (eq? 'pc (rtx-operand-name expr))
-+ (memq (/rtx-ref-type parent-expr op-pos)
-+ '(set set-quiet)))
-+ (append! sem-attrs
-+ (if (tstate-cond? tstate)
-+ ;; Don't change these to '(FOO), since
-+ ;; we use append!.
-+ (list 'COND-CTI)
-+ (list 'UNCOND-CTI)))))
-+
-+ ;; FIXME: keep name h-pc hardwired?
-+ ((reg) (if (and (eq? 'h-pc (rtx-reg-name expr))
-+ (memq (/rtx-ref-type parent-expr op-pos)
-+ '(set set-quiet)))
-+ (append! sem-attrs
-+ (if (tstate-cond? tstate)
-+ ;; Don't change these to '(FOO), since
-+ ;; we use append!.
-+ (list 'COND-CTI)
-+ (list 'UNCOND-CTI)))))
-+
-+ ((skip) (append! sem-attrs (list 'SKIP-CTI)) #f)
-+
-+ ((delay) (append! sem-attrs (list 'DELAY-SLOT)) #f)
-+
-+ ; If this is a syntax expression, the operands won't have been
-+ ; processed, so tell our caller we want it to by returning #f.
-+ ; We do the same for non-syntax expressions to keep things
-+ ; simple. This requires collaboration with the traversal
-+ ; handlers which are defined to do what we want if we return #f.
-+ (else #f))))
-+
-+ ; Traverse the expression recording the attributes.
-+ (traversed-expr (rtx-traverse
-+ context
-+ insn
-+ (rtx-simplify context insn sem-code
-+ (insn-build-known-values insn))
-+ process-expr!
-+ #f))
-+ )
-+
-+ (let
-+ ; Drop dummy first arg.
-+ ((sem-attrs (cdr sem-attrs)))
-+ (atlist-parse context sem-attrs "")))
-+)
-diff -Nur binutils-2.24.orig/cgen/sem-frags.scm binutils-2.24/cgen/sem-frags.scm
---- binutils-2.24.orig/cgen/sem-frags.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/sem-frags.scm 2016-06-30 21:26:12.673893890 +0200
-@@ -0,0 +1,1248 @@
-+; Semantic fragments.
-+; Copyright (C) 2000, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; Background info:
-+; Some improvement in pbb simulator efficiency is obtained in cases like
-+; the ARM where for example operand2 computation is expensive in terms of
-+; cpu cost, code size, and subroutine call overhead if the code is put in
-+; a subroutine. It could be inlined, but there are numerous occurences
-+; resulting in poor icache usage.
-+; If the computation is put in its own fragment then code size is reduced
-+; [improving icache usage] and subroutine call overhead is removed in a
-+; computed-goto simulator [arguments are passed in machine generated local
-+; variables].
-+;
-+; The basic procedure here is to:
-+; - break all insns up into a set of statements
-+; This is either one statement in the case of insns that don't begin with a
-+; sequence, or a list of statements, one for each element in the sequence.
-+; - find a profitable set of common leading statements (called the "header")
-+; and a profitable set of common trailing statements (called the "trailer")
-+; What is "profitable" depends on
-+; - how expensive the statement is
-+; - how long the statement is
-+; - the number of insns using the statement
-+; - what fraction of the total insn the statement is
-+; - rewrite insn semantics in terms of the new header and trailer fragments
-+; plus a "middle" part that is whatever is left over
-+; - there is always a header, the middle and trailer parts are optional
-+; - cti insns require a header and trailer, though they can be the same
-+; fragment
-+;
-+; TODO:
-+; - check ARM orr insns which come out as header, tiny middle, trailer
-+; - the tiny middle seems like a waste (combine with trailer?)
-+; - there are 8 trailers consisting of just `nop' for ARM
-+; - rearranging statements to increase number and length of common sets
-+; - combine common middle fragments
-+; - parallel's not handled yet (only have to handle parallel's at the
-+; top level)
-+; - insns can also be split on timing-sensitive boundaries (pipeline, memory,
-+; whatever) though that is not implemented yet. This may involve rtl
-+; additions.
-+;
-+; Usage:
-+; - call sim-sfrag-init! first, to initialize
-+; - call sim-sfrag-analyze-insns! to create the semantic fragments
-+; - afterwards, call
-+; - sim-sfrag-insn-list
-+; - sim-sfrag-frag-table
-+; - sim-sfrag-usage-table
-+; - sim-sfrag-locals-list
-+
-+; Statement computation.
-+
-+; Set to #t to collect various statistics.
-+
-+(define /stmt-stats? #f)
-+
-+; Collection of computed stats. Only set if /stmt-stats? = #t.
-+
-+(define /stmt-stats #f)
-+
-+; Collection of computed statement data. Only set if /stmt-stats? = #t.
-+
-+(define /stmt-stats-data #f)
-+
-+; Create a structure recording data of all statements.
-+; A pair of (next-ordinal . table).
-+
-+(define (/stmt-data-make hash-size)
-+ (cons 0 (make-vector hash-size nil))
-+)
-+
-+; Accessors.
-+
-+(define (/stmt-data-table data) (cdr data))
-+(define (/stmt-data-next-num data) (car data))
-+(define (/stmt-data-set-next-num! data newval) (set-car! data newval))
-+(define (/stmt-data-hash-size data) (vector-length (cdr data)))
-+
-+; A single statement.
-+; INSN semantics either consist of a single statement or a sequence of them.
-+
-+(define <statement>
-+ (class-make '<statement> nil
-+ '(
-+ ; RTL code
-+ expr
-+
-+ ; Local variables of the sequence `expr' is in.
-+ ; This is recorded in the same form as the sequence,
-+ ; i.e. (MODE name).
-+ locals
-+
-+ ; Ordinal of the statement.
-+ num
-+
-+ ; Costs.
-+ ; SPEED-COST is the cost of executing fragment, relative to a
-+ ; simple add.
-+ ; SIZE-COST is the size of the fragment, relative to a simple
-+ ; add.
-+ ; ??? The cost numbers are somewhat arbitrary and subject to
-+ ; review.
-+ speed-cost
-+ size-cost
-+
-+ ; Users of this statement.
-+ ; Each element is (owner-number . owner-object),
-+ ; where owner-number is an index into the initial insn table
-+ ; (e.g. insn-list arg of /sfrag-create-cse-mapping), and
-+ ; owner-object is the corresponding object.
-+ users
-+ )
-+ nil)
-+)
-+
-+(define-getters <statement> -stmt (expr locals num speed-cost size-cost users))
-+
-+(define-setters <statement> -stmt (users))
-+
-+; Make a <statement> object of EXPR.
-+; LOCALS is a list of local variables of the sequence EXPR is in.
-+; NUM is the ordinal of EXPR.
-+; SPEED-COST is the cost of executing the statement, relative to a simple add.
-+; SIZE-COST is the size of the fragment, relative to a simple add.
-+; ??? The cost numbers are somewhat arbitrary and subject to review.
-+;
-+; The user list is set to nil.
-+
-+(define (/stmt-make expr locals num speed-cost size-cost)
-+ (make <statement> expr locals num speed-cost size-cost nil)
-+)
-+
-+; Add a user of STMT.
-+
-+(define (/stmt-add-user! stmt user-num user-obj)
-+ (-stmt-set-users! stmt (cons (cons user-num user-obj) (-stmt-users stmt)))
-+ *UNSPECIFIED*
-+)
-+
-+; Lookup STMT in DATA.
-+; CHAIN-NUM is an argument so it need only be computed once.
-+; The result is the found <statement> object or #f.
-+
-+(define (/frag-lookup-stmt data chain-num stmt)
-+ (let ((table (/stmt-data-table data)))
-+ (let loop ((stmts (vector-ref table chain-num)))
-+ (cond ((null? stmts)
-+ #f)
-+ ; ??? equal? should be appropriate rtx-equal?, blah blah blah.
-+ ((equal? (-stmt-expr (car stmts)) stmt)
-+ (car stmts))
-+ (else
-+ (loop (cdr stmts))))))
-+)
-+
-+; Hash a statement.
-+
-+; Computed hash value.
-+; Global 'cus /frag-hash-compute! is defined globally so we can use
-+; /fastcall (FIXME: Need /fastcall to work on non-global procs).
-+
-+(define /frag-hash-value-tmp 0)
-+
-+(define (/frag-hash-string str)
-+ (let loop ((chars (map char->integer (string->list str))) (result 0))
-+ (if (null? chars)
-+ result
-+ (loop (cdr chars) (modulo (+ (* result 7) (car chars)) #xfffffff))))
-+)
-+
-+;; MODE is the name of the mode.
-+
-+(define (/frag-hash-compute! rtx-obj expr parent-expr op-pos tstate appstuff)
-+ (let ((h 0))
-+ (case (rtx-name expr)
-+ ((operand)
-+ (set! h (/frag-hash-string (symbol->string (rtx-operand-name expr)))))
-+ ((local)
-+ (set! h (/frag-hash-string (symbol->string (rtx-local-name expr)))))
-+ ((const)
-+ (set! h (rtx-const-value expr)))
-+ (else
-+ (set! h (rtx-num rtx-obj))))
-+ (set! /frag-hash-value-tmp
-+ ; Keep number small.
-+ (modulo (+ (* /frag-hash-value-tmp 3) h op-pos)
-+ #xfffffff)))
-+
-+ ; #f -> "continue with normal traversing"
-+ #f
-+)
-+
-+(define (/frag-hash-stmt stmt locals size)
-+ (set! /frag-hash-value-tmp 0)
-+ (rtx-traverse-with-locals #f #f stmt /frag-hash-compute! locals #f)
-+ (modulo /frag-hash-value-tmp size)
-+)
-+
-+; Compute the speed/size costs of a statement.
-+
-+; Compute speed/size costs.
-+; Global 'cus /frag-cost-compute! is defined globally so we can use
-+; /fastcall (FIXME: Need /fastcall to work on non-global procs).
-+
-+(define /frag-speed-cost-tmp 0)
-+(define /frag-size-cost-tmp 0)
-+
-+;; MODE is the name of the mode.
-+
-+(define (/frag-cost-compute! rtx-obj expr parent-expr op-pos tstate appstuff)
-+ ; FIXME: wip
-+ (let ((speed 0)
-+ (size 0))
-+ (case (rtx-class rtx-obj)
-+ ((ARG)
-+ #f) ; these don't contribute to costs (at least for now)
-+ ((SET)
-+ ; FIXME: speed/size = 0?
-+ (set! speed 1)
-+ (set! size 1))
-+ ((UNARY BINARY TRINARY COMPARE)
-+ (set! speed 1)
-+ (set! size 1))
-+ ((IF)
-+ (set! speed 2)
-+ (set! size 2))
-+ (else
-+ (set! speed 4)
-+ (set! size 4)))
-+ (set! /frag-speed-cost-tmp (+ /frag-speed-cost-tmp speed))
-+ (set! /frag-size-cost-tmp (+ /frag-size-cost-tmp size)))
-+
-+ ; #f -> "continue with normal traversing"
-+ #f
-+)
-+
-+(define (/frag-stmt-cost stmt locals)
-+ (set! /frag-speed-cost-tmp 0)
-+ (set! /frag-size-cost-tmp 0)
-+ (rtx-traverse-with-locals #f #f stmt /frag-cost-compute! locals #f)
-+ (cons /frag-speed-cost-tmp /frag-size-cost-tmp)
-+)
-+
-+; Add STMT to statement table DATA.
-+; CHAIN-NUM is the chain in the hash table to add STMT to.
-+; {SPEED,SIZE}-COST are passed through to /stmt-make.
-+; The result is the newly created <statement> object.
-+
-+(define (/frag-add-stmt! data chain-num stmt locals speed-cost size-cost)
-+ (let ((stmt (/stmt-make stmt locals (/stmt-data-next-num data) speed-cost size-cost))
-+ (table (/stmt-data-table data)))
-+ (vector-set! table chain-num (cons stmt (vector-ref table chain-num)))
-+ (/stmt-data-set-next-num! data (+ 1 (/stmt-data-next-num data)))
-+ stmt)
-+)
-+
-+; Return the locals in EXPR.
-+; If a sequence, return locals.
-+; Otherwise, return nil.
-+; The result is in assq'able form.
-+
-+(define (/frag-expr-locals expr)
-+ (if (rtx-kind? 'sequence expr)
-+ (rtx-sequence-locals expr)
-+ nil)
-+)
-+
-+; Return the locals in EXPR in assq-able form, i.e. (name MODE).
-+; If a sequence, return locals.
-+; Otherwise, return nil.
-+; The result is in assq'able form.
-+
-+(define (/frag-expr-assq-locals expr)
-+ (if (rtx-kind? 'sequence expr)
-+ (rtx-sequence-assq-locals expr)
-+ nil)
-+)
-+
-+; Return the statements in EXPR.
-+; If a sequence, return the sequence's expressions.
-+; Otherwise, return (list expr).
-+
-+(define (/frag-expr-stmts expr)
-+ (if (rtx-kind? 'sequence expr)
-+ (rtx-sequence-exprs expr)
-+ (list expr))
-+)
-+
-+; Analyze statement STMT.
-+; If STMT is already in STMT-DATA increment its frequency count.
-+; Otherwise add it.
-+; LOCALS are locals of the sequence STMT is in.
-+; USAGE-TABLE is a vector of statement index lists for each expression.
-+; USAGE-INDEX is the index of USAGE-TABLE to use.
-+; OWNER is the object of the owner of the statement.
-+
-+(define (/frag-analyze-expr-stmt! locals stmt stmt-data usage-table expr-num owner)
-+ (logit 3 "Analyzing statement: " (rtx-strdump stmt) "\n")
-+ (let* ((chain-num
-+ (/frag-hash-stmt stmt locals (/stmt-data-hash-size stmt-data)))
-+ (stmt-obj (/frag-lookup-stmt stmt-data chain-num stmt)))
-+
-+ (logit 3 " chain #" chain-num "\n")
-+
-+ (if (not stmt-obj)
-+ (let* ((costs (/frag-stmt-cost stmt locals))
-+ (speed-cost (car costs))
-+ (size-cost (cdr costs)))
-+ (set! stmt-obj (/frag-add-stmt! stmt-data chain-num stmt locals
-+ speed-cost size-cost))
-+ (logit 3 " new statement, #" (-stmt-num stmt-obj) "\n"))
-+ (logit 3 " existing statement, #" (-stmt-num stmt-obj) "\n"))
-+
-+ (/stmt-add-user! stmt-obj expr-num owner)
-+
-+ ; If first entry, initialize list, otherwise append to existing list.
-+ (if (null? (vector-ref usage-table expr-num))
-+ (vector-set! usage-table expr-num (list (-stmt-num stmt-obj)))
-+ (append! (vector-ref usage-table expr-num)
-+ (list (-stmt-num stmt-obj)))))
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Analyze each statement in EXPR and add it to STMT-DATA.
-+; OWNER is the object of the owner of the expression.
-+; USAGE-TABLE is a vector of statement index lists for each expression.
-+; USAGE-INDEX is the index of the USAGE-TABLE entry to use.
-+; As each statement's ordinal is computed it is added to the usage list.
-+
-+(define (/frag-analyze-expr! expr owner stmt-data usage-table usage-index)
-+ (logit 3 "Analyzing " (obj:name owner) ": " (rtx-strdump expr) "\n")
-+ (let ((locals (/frag-expr-locals expr))
-+ (stmt-list (/frag-expr-stmts expr)))
-+ (for-each (lambda (stmt)
-+ (/frag-analyze-expr-stmt! locals stmt stmt-data
-+ usage-table usage-index owner))
-+ stmt-list))
-+ *UNSPECIFIED*
-+)
-+
-+; Compute statement data from EXPRS, a list of expressions.
-+; OWNERS is a vector of objects that "own" each corresponding element in EXPRS.
-+; The owner is usually an <insn> object. Actually it'll probably always be
-+; an <insn> object but for now I want the disassociation.
-+;
-+; The result contains:
-+; - vector of statement lists of each expression
-+; - each element is (stmt1-index stmt2-index ...) where each stmtN-index is
-+; an index into the statement table
-+; - vector of statements (the statement table of the previous item)
-+; - each element is a <statement> object
-+
-+(define (/frag-compute-statements exprs owners)
-+ (logit 2 "Computing statement table ...\n")
-+ (let* ((num-exprs (length exprs))
-+ (hash-size
-+ ; FIXME: This is just a quick hack to put something down on paper.
-+ ; blah blah blah. Revisit as necessary.
-+ (cond ((> num-exprs 300) 1019)
-+ ((> num-exprs 100) 511)
-+ (else 127))))
-+
-+ (let (; Hash table of expressions.
-+ (stmt-data (/stmt-data-make hash-size))
-+ ; Statement index lists for each expression.
-+ (usage-table (make-vector num-exprs nil)))
-+
-+ ; Scan each expr, filling in stmt-data and usage-table.
-+ (let loop ((exprs exprs) (exprnum 0))
-+ (if (not (null? exprs))
-+ (let ((expr (car exprs))
-+ (owner (vector-ref owners exprnum)))
-+ (/frag-analyze-expr! expr owner stmt-data usage-table exprnum)
-+ (loop (cdr exprs) (+ exprnum 1)))))
-+
-+ ; Convert statement hash table to vector.
-+ (let ((stmt-hash-table (/stmt-data-table stmt-data))
-+ (end (vector-length (/stmt-data-table stmt-data)))
-+ (stmt-table (make-vector (/stmt-data-next-num stmt-data) #f)))
-+ (let loop ((i 0))
-+ (if (< i end)
-+ (begin
-+ (map (lambda (stmt)
-+ (vector-set! stmt-table (-stmt-num stmt) stmt))
-+ (vector-ref stmt-hash-table i))
-+ (loop (+ i 1)))))
-+
-+ ; All done. Compute stats if asked to.
-+ (if /stmt-stats?
-+ (begin
-+ ; See how well the hashing worked.
-+ (set! /stmt-stats-data stmt-data)
-+ (set! /stmt-stats
-+ (make-vector (vector-length stmt-hash-table) #f))
-+ (let loop ((i 0))
-+ (if (< i end)
-+ (begin
-+ (vector-set! /stmt-stats i
-+ (length (vector-ref stmt-hash-table i)))
-+ (loop (+ i 1)))))))
-+
-+ ; Result.
-+ (cons usage-table stmt-table))))
-+)
-+
-+; Semantic fragment selection.
-+;
-+; "semantic fragment" is the name assigned to each header/middle/trailer
-+; "fragment" as each may consist of more than one statement, though not
-+; necessarily all statements of the original sequence.
-+
-+(define <sfrag>
-+ (class-make '<sfrag> '(<ident>)
-+ '(
-+ ; List of insn's using this frag.
-+ users
-+
-+ ; Ordinal's of each element of `users'.
-+ user-nums
-+
-+ ; Semantic format of insns using this fragment.
-+ sfmt
-+
-+ ; List of statement numbers that make up `semantics'.
-+ ; Each element is an index into the stmt-table arg of
-+ ; /frag-pick-best.
-+ ; This is #f if the sfrag wasn't derived from some set of
-+ ; statements.
-+ stmt-numbers
-+
-+ ; rtl source of fragment.
-+ semantics
-+
-+ ; Boolean indicating if this frag is for parallel exec support.
-+ parallel?
-+
-+ ; Boolean indicating if this is a header frag.
-+ ; This includes all frags that begin a sequence.
-+ header?
-+
-+ ; Boolean indicating if this is a trailer frag.
-+ ; This includes all frags that end a sequence.
-+ trailer?
-+ )
-+ nil)
-+)
-+
-+(define-getters <sfrag> sfrag
-+ (users user-nums sfmt stmt-numbers semantics
-+ parallel? header? trailer?)
-+)
-+
-+(define-setters <sfrag> sfrag
-+ (header? trailer?)
-+)
-+
-+; Sorter to merge common fragments together.
-+; A and B are lists of statement numbers.
-+
-+(define (/frag-sort a b)
-+ (cond ((null? a)
-+ (not (null? b)))
-+ ((null? b)
-+ #f)
-+ ((< (car a) (car b))
-+ #t)
-+ ((> (car a) (car b))
-+ #f)
-+ (else ; =
-+ (/frag-sort (cdr a) (cdr b))))
-+)
-+
-+; Return a boolean indicating if L1,L2 match in the first LEN elements.
-+; Each element is an integer.
-+
-+(define (/frag-list-match? l1 l2 len)
-+ (cond ((= len 0)
-+ #t)
-+ ((or (null? l1) (null? l2))
-+ #f)
-+ ((= (car l1) (car l2))
-+ (/frag-list-match? (cdr l1) (cdr l2) (- len 1)))
-+ (else
-+ #f))
-+)
-+
-+; Return the number of expressions that match in the first LEN statements.
-+
-+(define (/frag-find-matching expr-table indices stmt-list len)
-+ (let loop ((num-exprs 0) (indices indices))
-+ (cond ((null? indices)
-+ num-exprs)
-+ ((/frag-list-match? stmt-list
-+ (vector-ref expr-table (car indices)) len)
-+ (loop (+ num-exprs 1) (cdr indices)))
-+ (else
-+ num-exprs)))
-+)
-+
-+; Return a boolean indicating if making STMT-LIST a common fragment
-+; among several owners is profitable.
-+; STMT-LIST is a list of statement numbers, indices into STMT-TABLE.
-+; NUM-EXPRS is the number of expressions with STMT-LIST in common.
-+
-+(define (/frag-merge-profitable? stmt-table stmt-list num-exprs)
-+ ; FIXME: wip
-+ (and (>= num-exprs 2)
-+ (or ; No need to include speed costs yet.
-+ ;(>= (/frag-list-speed-cost stmt-table stmt-list) 10)
-+ (>= (/frag-list-size-cost stmt-table stmt-list) 4)))
-+)
-+
-+; Return the cost of executing STMT-LIST.
-+; STMT-LIST is a list of statment numbers, indices into STMT-TABLE.
-+;
-+; FIXME: The yardstick to use is wip. Currently we measure things relative
-+; to a simple add insn which is given the value 1.
-+
-+(define (/frag-list-speed-cost stmt-table stmt-list)
-+ ; FIXME: wip
-+ (apply + (map (lambda (stmt-num)
-+ (-stmt-speed-cost (vector-ref stmt-table stmt-num)))
-+ stmt-list))
-+)
-+
-+(define (/frag-list-size-cost stmt-table stmt-list)
-+ ; FIXME: wip
-+ (apply + (map (lambda (stmt-num)
-+ (-stmt-size-cost (vector-ref stmt-table stmt-num)))
-+ stmt-list))
-+)
-+
-+; Compute the longest set of fragments it is desirable/profitable to create.
-+; The result is (number-of-matching-exprs . stmt-number-list)
-+; or #f if there isn't one (the longest set is the empty set).
-+;
-+; What is desirable depends on a few things:
-+; - how often is it used?
-+; - how expensive is it (size-wise and speed-wise)
-+; - relationship to other frags
-+;
-+; STMT-TABLE is a vector of all statements.
-+; STMT-USAGE-TABLE is a vector of all expressions. Each element is a list of
-+; statement numbers (indices into STMT-TABLE).
-+; INDICES is a sorted list of indices into STMT-USAGE-TABLE.
-+; STMT-USAGE-TABLE is processed in the order specified by INDICES.
-+;
-+; FIXME: Choosing a statement list should depend on whether there are existing
-+; chosen statement lists only slightly shorter.
-+
-+(define (/frag-longest-desired stmt-table stmt-usage-table indices)
-+ ; STMT-LIST is the list of statements in the first expression.
-+ (let ((stmt-list (vector-ref stmt-usage-table (car indices))))
-+
-+ (let loop ((len 1) (prev-num-exprs 0))
-+
-+ ; See how many subsequent expressions match at length LEN.
-+ (let ((num-exprs (/frag-find-matching stmt-usage-table (cdr indices)
-+ stmt-list len)))
-+ ; If there aren't any, we're done.
-+ ; If LEN-1 is usable, return that.
-+ ; Otherwise there is no profitable list of fragments.
-+ (if (= num-exprs 0)
-+
-+ (let ((matching-stmt-list (list-take (- len 1) stmt-list)))
-+ (if (/frag-merge-profitable? stmt-table matching-stmt-list
-+ prev-num-exprs)
-+ (cons prev-num-exprs matching-stmt-list)
-+ #f))
-+
-+ ; Found at least 1 subsequent matching expression.
-+ ; Extend LEN and see if we still find matching expressions.
-+ (loop (+ len 1) num-exprs)))))
-+)
-+
-+; Return list of lists of objects for each unique <sformat-argbuf> in
-+; USER-LIST.
-+; Each element of USER-LIST is (insn-num . <insn> object).
-+; The result is a list of lists. Each element in the top level list is
-+; a list of elements of USER-LIST that have the same <sformat-argbuf>.
-+; Insns are also distinguished by being a CTI insn vs a non-CTI insn.
-+; CTI insns require special handling in the semantics.
-+
-+(define (/frag-split-by-sbuf user-list)
-+ ; Sanity check.
-+ (if (not (elm-bound? (cdar user-list) 'sfmt))
-+ (error "sformats not computed"))
-+ (if (not (elm-bound? (insn-sfmt (cdar user-list)) 'sbuf))
-+ (error "sformat argbufs not computed"))
-+
-+ (let ((result nil)
-+ ; Find INSN in SFMT-LIST. The result is the list INSN belongs in
-+ ; or #f.
-+ (find-obj (lambda (sbuf-list insn)
-+ (let ((name (obj:name (sfmt-sbuf (insn-sfmt insn)))))
-+ (let loop ((sbuf-list sbuf-list))
-+ (cond ((null? sbuf-list)
-+ #f)
-+ ((and (eq? name
-+ (obj:name (sfmt-sbuf (insn-sfmt (cdaar sbuf-list)))))
-+ (eq? (insn-cti? insn)
-+ (insn-cti? (cdaar sbuf-list))))
-+ (car sbuf-list))
-+ (else
-+ (loop (cdr sbuf-list))))))))
-+ )
-+ (let loop ((users user-list))
-+ (if (not (null? users))
-+ (let ((try (find-obj result (cdar users))))
-+ (if try
-+ (append! try (list (car users)))
-+ (set! result (cons (list (car users)) result)))
-+ (loop (cdr users)))))
-+
-+ ; Done
-+ result)
-+)
-+
-+; Return a list of desired fragments to create.
-+; These consist of the longest set of profitable leading statements in EXPRS.
-+; Each element of the result is an <sfrag> object.
-+;
-+; STMT-TABLE is a vector of all statements.
-+; STMT-USAGE-TABLE is a vector of statement number lists of each expression.
-+; OWNER-TABLE is a vector of owner objects of each corresponding expression
-+; in STMT-USAGE-TABLE.
-+; KIND is one of 'header or 'trailer.
-+;
-+; This works for trailing fragments too as we do the computation based on the
-+; reversed statement lists.
-+
-+(define (/frag-compute-desired-frags stmt-table stmt-usage-table owner-table kind)
-+ (logit 2 "Computing desired " kind " frags ...\n")
-+
-+ (let* (
-+ (stmt-usage-list
-+ (if (eq? kind 'header)
-+ (vector->list stmt-usage-table)
-+ (map reverse (vector->list stmt-usage-table))))
-+ ; Sort STMT-USAGE-TABLE. That will bring exprs with common fragments
-+ ; together.
-+ (sorted-indices (sort-grade stmt-usage-list /frag-sort))
-+ ; List of statement lists that together yield the fragment to create,
-+ ; plus associated users.
-+ (desired-frags nil)
-+ )
-+
-+ ; Update STMT-USAGE-TABLE in case we reversed the contents.
-+ (set! stmt-usage-table (list->vector stmt-usage-list))
-+
-+ (let loop ((indices sorted-indices) (iteration 1))
-+ (logit 3 "Iteration " iteration "\n")
-+ (if (not (null? indices))
-+ (let ((longest (/frag-longest-desired stmt-table stmt-usage-table indices)))
-+
-+ (if longest
-+
-+ ; Found an acceptable frag to create.
-+ (let* ((num-exprs (car longest))
-+ ; Reverse statement numbers back if trailer.
-+ (stmt-list (if (eq? kind 'header)
-+ (cdr longest)
-+ (reverse (cdr longest))))
-+ (picked-indices (list-take num-exprs indices))
-+ ; Need one copy of the frag for each sbuf, as structure
-+ ; offsets will be different in generated C/C++ code.
-+ (sfmt-users (/frag-split-by-sbuf
-+ (map (lambda (expr-num)
-+ (cons expr-num
-+ (vector-ref owner-table
-+ expr-num)))
-+ picked-indices))))
-+
-+ (logit 3 "Creating frag of length " (length stmt-list) ", " num-exprs " users\n")
-+ (logit 3 "Indices: " picked-indices "\n")
-+
-+ ; Create an sfrag for each sbuf.
-+ (for-each
-+ (lambda (users)
-+ (let* ((first-owner (cdar users))
-+ (context (make-obj-context first-owner "While building sfrags"))
-+ (rtl (apply
-+ rtx-make
-+ (cons 'sequence
-+ (cons 'VOID
-+ (cons nil
-+ (map (lambda (stmt-num)
-+ (-stmt-expr
-+ (vector-ref stmt-table
-+ stmt-num)))
-+ stmt-list))))))
-+ (sfrag
-+ (make <sfrag>
-+ (symbol-append (obj:name first-owner)
-+ (if (eq? kind 'header)
-+ '-hdr
-+ '-trlr))
-+ ""
-+ atlist-empty
-+ (map cdr users)
-+ (map car users)
-+ (insn-sfmt first-owner)
-+ stmt-list
-+ rtl
-+ #f ; parallel?
-+ (eq? kind 'header)
-+ (eq? kind 'trailer)
-+ )))
-+ (set! desired-frags (cons sfrag desired-frags))))
-+ sfmt-users)
-+
-+ ; Continue, dropping statements we've put into the frag.
-+ (loop (list-drop num-exprs indices) (+ iteration 1)))
-+
-+ ; Couldn't find an acceptable statement list.
-+ ; Try again with next one.
-+ (begin
-+ (logit 3 "No acceptable frag found.\n")
-+ (loop (cdr indices) (+ iteration 1)))))))
-+
-+ ; Done.
-+ desired-frags)
-+)
-+
-+; Return the set of desired fragments to create.
-+; STMT-TABLE is a vector of each statement.
-+; STMT-USAGE-TABLE is a vector of (stmt1-index stmt2-index ...) elements for
-+; each expression, where each stmtN-index is an index into STMT-TABLE.
-+; OWNER-TABLE is a vector of owner objects of each corresponding expression
-+; in STMT-USAGE-TABLE.
-+;
-+; Each expression is split in up to three pieces: header, middle, trailer.
-+; This computes pseudo-optimal headers and trailers (if they exist).
-+; The "middle" part is whatever is leftover.
-+;
-+; The result is a vector of 4 elements:
-+; - vector of (header middle trailer) semantic fragments for each expression
-+; - each element is an index into the respective table or #f if not present
-+; - list of header fragments, each element is an <sfrag> object
-+; - same but for trailer fragments
-+; - same but for middle fragments
-+;
-+; ??? While this is a big function, each piece is simple and straightforward.
-+; It's kept as one big function so we can compute each expression's sfrag list
-+; as we go. Though it's not much extra expense to not do this.
-+
-+(define (/frag-pick-best stmt-table stmt-usage-table owner-table)
-+ (let (
-+ (num-stmts (vector-length stmt-table))
-+ (num-exprs (vector-length stmt-usage-table))
-+ ; FIXME: Shouldn't have to do vector->list.
-+ (stmt-usage-list (vector->list stmt-usage-table))
-+ ; Specify result holders here, simplifies code.
-+ (desired-header-frags #f)
-+ (desired-trailer-frags #f)
-+ (middle-frags #f)
-+ ; Also allocate space for expression sfrag usage table.
-+ ; We compute it as we go to save scanning the header and trailer
-+ ; lists twice.
-+ ; copy-tree is needed to avoid shared storage.
-+ (expr-sfrags (copy-tree (make-vector (vector-length stmt-usage-table)
-+ #(#f #f #f))))
-+ )
-+
-+ ; Compute desired headers.
-+ (set! desired-header-frags
-+ (/frag-compute-desired-frags stmt-table stmt-usage-table owner-table
-+ 'header))
-+
-+ ; Compute the header used by each expression.
-+ (let ((expr-hdrs-v (make-vector num-exprs #f))
-+ (num-hdrs (length desired-header-frags)))
-+ (let loop ((hdrs desired-header-frags) (hdrnum 0))
-+ (if (< hdrnum num-hdrs)
-+ (let ((hdr (car hdrs)))
-+ (for-each (lambda (expr-num)
-+ (vector-set! (vector-ref expr-sfrags expr-num) 0
-+ hdrnum)
-+ (vector-set! expr-hdrs-v expr-num hdr))
-+ (sfrag-user-nums hdr))
-+ (loop (cdr hdrs) (+ hdrnum 1)))))
-+
-+ ; Truncate each expression by the header it will use and then find
-+ ; the set of desired trailers.
-+ (let ((expr-hdrs (vector->list expr-hdrs-v)))
-+
-+ (set! desired-trailer-frags
-+ (/frag-compute-desired-frags
-+ stmt-table
-+ ; FIXME: Shouldn't have to use list->vector.
-+ ; [still pass a vector, but use vector-map here instead of map]
-+ (list->vector
-+ (map (lambda (expr hdr)
-+ (if hdr
-+ (list-drop (length (sfrag-stmt-numbers hdr)) expr)
-+ expr))
-+ stmt-usage-list expr-hdrs))
-+ owner-table
-+ 'trailer))
-+
-+ ; Record the trailer used by each expression.
-+ (let ((expr-trlrs-v (make-vector num-exprs #f))
-+ (num-trlrs (length desired-trailer-frags)))
-+ (let loop ((trlrs desired-trailer-frags) (trlrnum 0))
-+ (if (< trlrnum num-trlrs)
-+ (let ((trlr (car trlrs)))
-+ (for-each (lambda (expr-num)
-+ (vector-set! (vector-ref expr-sfrags expr-num) 2
-+ trlrnum)
-+ (vector-set! expr-trlrs-v expr-num trlr))
-+ (sfrag-user-nums trlr))
-+ (loop (cdr trlrs) (+ trlrnum 1)))))
-+
-+ ; We have the desired headers and trailers, now compute the middle
-+ ; part for each expression. This is just what's left over.
-+ ; ??? We don't try to cse the middle part. Though we can in the
-+ ; future should it prove useful enough.
-+ (logit 2 "Computing middle frags ...\n")
-+ (let* ((expr-trlrs (vector->list expr-trlrs-v))
-+ (expr-middle-stmts
-+ (map (lambda (expr hdr trlr)
-+ (list-tail-drop
-+ (if trlr (length (sfrag-stmt-numbers trlr)) 0)
-+ (list-drop
-+ (if hdr (length (sfrag-stmt-numbers hdr)) 0)
-+ expr)))
-+ stmt-usage-list expr-hdrs expr-trlrs)))
-+
-+ ; Finally, record the middle sfrags used by each expression.
-+ (let loop ((tmp-middle-frags nil)
-+ (next-middle-frag-num 0)
-+ (expr-num 0)
-+ (expr-middle-stmts expr-middle-stmts))
-+
-+ (if (null? expr-middle-stmts)
-+
-+ ; Done!
-+ ; [The next statement executed after this is the one at the
-+ ; end that builds the result. Maybe it should be built here
-+ ; and this should be the last statement, but I'm trying this
-+ ; style out for awhile.]
-+ (set! middle-frags (reverse! tmp-middle-frags))
-+
-+ ; Does this expr have a middle sfrag?
-+ (if (null? (car expr-middle-stmts))
-+ ; Nope.
-+ (loop tmp-middle-frags
-+ next-middle-frag-num
-+ (+ expr-num 1)
-+ (cdr expr-middle-stmts))
-+ ; Yep.
-+ (let* ((owner (vector-ref owner-table expr-num))
-+ (context (make-obj-context owner "While building sfrags"))
-+ (rtl (apply
-+ rtx-make
-+ (cons 'sequence
-+ (cons 'VOID
-+ (cons nil
-+ (map (lambda (stmt-num)
-+ (-stmt-expr
-+ (vector-ref stmt-table stmt-num)))
-+ (car expr-middle-stmts))))))))
-+ (vector-set! (vector-ref expr-sfrags expr-num)
-+ 1 next-middle-frag-num)
-+ (loop (cons (make <sfrag>
-+ (symbol-append (obj:name owner) '-mid)
-+ (string-append (obj:comment owner)
-+ ", middle part")
-+ (obj-atlist owner)
-+ (list owner)
-+ (list expr-num)
-+ (insn-sfmt owner)
-+ (car expr-middle-stmts)
-+ rtl
-+ #f ; parallel?
-+ #f ; header?
-+ #f ; trailer?
-+ )
-+ tmp-middle-frags)
-+ (+ next-middle-frag-num 1)
-+ (+ expr-num 1)
-+ (cdr expr-middle-stmts))))))))))
-+
-+ ; Result.
-+ (vector expr-sfrags
-+ desired-header-frags
-+ desired-trailer-frags
-+ middle-frags))
-+)
-+
-+; Given a list of expressions, return list of locals in top level sequences.
-+; ??? Collisions will be handled by rewriting rtl (renaming locals).
-+;
-+; This has to be done now as the cse pass must (currently) take into account
-+; the rewritten rtl.
-+; ??? This can be done later, with an appropriate enhancement to rtx-equal?
-+; ??? cse can be improved by ignoring local variable name (of course).
-+
-+(define (/frag-compute-locals! expr-list)
-+ (logit 2 "Computing common locals ...\n")
-+ (let ((result nil)
-+ (lookup-local (lambda (local local-list)
-+ (assq (car local) local-list)))
-+ (local-equal? (lambda (l1 l2)
-+ (and (eq? (car l1) (car l2))
-+ (mode:eq? (cadr l1) (cadr l2)))))
-+ )
-+ (for-each (lambda (expr)
-+ (let ((locals (/frag-expr-assq-locals expr)))
-+ (for-each (lambda (local)
-+ (let ((entry (lookup-local local result)))
-+ (if (and entry
-+ (local-equal? local entry))
-+ #f ; already present
-+ (set! result (cons local result)))))
-+ locals)))
-+ expr-list)
-+ ; Done.
-+ result)
-+)
-+
-+; Common subexpression computation.
-+
-+; Given a list of rtl expressions and their owners, return a pseudo-optimal
-+; set of fragments and a usage list for each owner.
-+; Common fragments are combined and the original expressions become a sequence
-+; of these fragments. The result is "pseudo-optimal" in the sense that the
-+; desired result is somewhat optimal, though no attempt is made at precise
-+; optimality.
-+;
-+; OWNERS is a list of objects that "own" each corresponding element in EXPRS.
-+; The owner is usually an <insn> object. Actually it'll probably always be
-+; an <insn> object but for now I want the disassociation.
-+;
-+; The result is a vector of six elements:
-+; - sfrag usage table for each owner #(header middle trailer)
-+; - statement table (vector of all statements, made with /stmt-make)
-+; - list of sequence locals used by header sfrags
-+; - these locals are defined at the top level so that all fragments have
-+; access to them
-+; - ??? Need to handle collisions among incompatible types.
-+; - header sfrags
-+; - trailer sfrags
-+; - middle sfrags
-+
-+(define (/sem-find-common-frags-1 exprs owners)
-+ ; Sanity check.
-+ (if (not (elm-bound? (car owners) 'sfmt))
-+ (error "sformats not computed"))
-+
-+ ; A simple procedure that calls, in order:
-+ ; /frag-compute-locals!
-+ ; /frag-compute-statements
-+ ; /frag-pick-best
-+ ; The rest is shuffling of results.
-+
-+ ; Internally it's easier if OWNERS is a vector.
-+ (let ((owners (list->vector owners))
-+ (locals (/frag-compute-locals! exprs)))
-+
-+ ; Collect statement usage data.
-+ (let ((stmt-usage (/frag-compute-statements exprs owners)))
-+ (let ((stmt-usage-table (car stmt-usage))
-+ (stmt-table (cdr stmt-usage)))
-+
-+ ; Compute the frags we want to create.
-+ ; These are in general sequences of statements.
-+ (let ((desired-frags
-+ (/frag-pick-best stmt-table stmt-usage-table owners)))
-+ (let (
-+ (expr-sfrags (vector-ref desired-frags 0))
-+ (headers (vector-ref desired-frags 1))
-+ (trailers (vector-ref desired-frags 2))
-+ (middles (vector-ref desired-frags 3))
-+ )
-+ ; Result.
-+ (vector expr-sfrags stmt-table locals
-+ headers trailers middles))))))
-+)
-+
-+; Cover proc of /sem-find-common-frags-1.
-+; See its documentation.
-+
-+(define (sem-find-common-frags insn-list)
-+ (/sem-find-common-frags-1
-+ (begin
-+ (logit 2 "Simplifying rtl ...\n")
-+ (map (lambda (insn)
-+ (rtx-simplify-insn #f insn))
-+ insn-list))
-+ insn-list)
-+)
-+
-+; Subroutine of /sfrag-create-cse-mapping to compute INSN's fragment list.
-+; FRAG-USAGE is a vector of 3 elements: #(header middle trailer).
-+; Each element is a fragment number or #f if not present.
-+; Numbers in FRAG-USAGE are indices relative to their respective subtables
-+; of FRAG-TABLE (which is a vector of all 3 tables concatenated together).
-+; NUM-HEADERS,NUM-TRAILERS are used to compute absolute indices.
-+;
-+; No header may have been created. This happens when
-+; it's not profitable (or possible) to merge this insn's
-+; leading statements with other insns. Ditto for
-+; trailer. However, each cti insn must have a header
-+; and a trailer (for pc handling setup and change).
-+; Try to use the middle fragment if present. Otherwise,
-+; use the x-header,x-trailer virtual insns.
-+
-+(define (/sfrag-compute-frag-list! insn frag-usage frag-table num-headers num-trailers x-header-relnum x-trailer-relnum)
-+ ; `(list #f)' is so append! works. The #f is deleted before returning.
-+ (let ((result (list #f))
-+ (header (vector-ref frag-usage 0))
-+ (middle (and (vector-ref frag-usage 1)
-+ (+ (vector-ref frag-usage 1)
-+ num-headers num-trailers)))
-+ (trailer (and (vector-ref frag-usage 2)
-+ (+ (vector-ref frag-usage 2)
-+ num-headers)))
-+ (x-header-num x-header-relnum)
-+ (x-trailer-num (+ x-trailer-relnum num-headers))
-+ )
-+
-+ ; cse'd header created?
-+ (if header
-+ ; Yep.
-+ (append! result (list header))
-+ ; Nope. Use the middle frag if present, otherwise use x-header.
-+ ; Can't use the trailer fragment because by definition it is shared
-+ ; among several insns.
-+ (if middle
-+ ; Mark the middle frag as the header frag.
-+ (sfrag-set-header?! (vector-ref frag-table middle) #t)
-+ ; No middle, use x-header.
-+ (append! result (list x-header-num))))
-+
-+ ; middle fragment present?
-+ (if middle
-+ (append! result (list middle)))
-+
-+ ; cse'd trailer created?
-+ (if trailer
-+ ; Yep.
-+ (append! result (list trailer))
-+ ; Nope. Use the middle frag if present, otherwise use x-trailer.
-+ ; Can't use the header fragment because by definition it is shared
-+ ; among several insns.
-+ (if middle
-+ ; Mark the middle frag as the trailer frag.
-+ (sfrag-set-trailer?! (vector-ref frag-table middle) #t)
-+ ; No middle, use x-trailer.
-+ (append! result (list x-trailer-num))))
-+
-+ ; Done.
-+ (cdr result))
-+)
-+
-+; Subroutine of /sfrag-create-cse-mapping to find the fragment number of the
-+; x-header/x-trailer virtual frags.
-+
-+(define (/frag-lookup-virtual frag-list name)
-+ (let loop ((i 0) (frag-list frag-list))
-+ (if (null? frag-list)
-+ (assert (not "expected virtual insn not present"))
-+ (if (eq? name (obj:name (car frag-list)))
-+ i
-+ (loop (+ i 1) (cdr frag-list)))))
-+)
-+
-+; Handle complex case, find set of common header and trailer fragments.
-+; The result is a vector of:
-+; - fragment table (a vector)
-+; - table mapping used fragments for each insn (a list)
-+; - locals list
-+
-+(define (/sfrag-create-cse-mapping insn-list)
-+ (logit 1 "Creating semantic fragments for pbb engine ...\n")
-+
-+ (let ((cse-data (sem-find-common-frags insn-list)))
-+
-+ ; Extract the results of sem-find-common-frags.
-+ (let ((sfrag-usage-table (vector-ref cse-data 0))
-+ (stmt-table (vector-ref cse-data 1))
-+ (locals-list (vector-ref cse-data 2))
-+ (header-list1 (vector-ref cse-data 3))
-+ (trailer-list1 (vector-ref cse-data 4))
-+ (middle-list (vector-ref cse-data 5)))
-+
-+ ; Create two special frags: x-header, x-trailer.
-+ ; These are used by insns that don't have one or the other.
-+ ; Header/trailer table indices are already computed for each insn
-+ ; so append x-header/x-trailer to the end.
-+ (let ((header-list
-+ (append header-list1
-+ (list
-+ (make <sfrag>
-+ 'x-header
-+ "header fragment for insns without one"
-+ (atlist-parse (make-prefix-context "semantic frag computation")
-+ '(VIRTUAL) "")
-+ nil ; users
-+ nil ; user ordinals
-+ (insn-sfmt (current-insn-lookup 'x-before #f))
-+ #f ; stmt-numbers
-+ (rtx-make 'nop)
-+ #f ; parallel?
-+ #t ; header?
-+ #f ; trailer?
-+ ))))
-+ (trailer-list
-+ (append trailer-list1
-+ (list
-+ (make <sfrag>
-+ 'x-trailer
-+ "trailer fragment for insns without one"
-+ (atlist-parse (make-prefix-context "semantic frag computation")
-+ '(VIRTUAL) "")
-+ nil ; users
-+ nil ; user ordinals
-+ (insn-sfmt (current-insn-lookup 'x-before #f))
-+ #f ; stmt-numbers
-+ (rtx-make 'nop)
-+ #f ; parallel?
-+ #f ; header?
-+ #t ; trailer?
-+ )))))
-+
-+ (let ((num-headers (length header-list))
-+ (num-trailers (length trailer-list))
-+ (num-middles (length middle-list)))
-+
-+ ; Combine the three sfrag tables (headers, trailers, middles) into
-+ ; one big one.
-+ (let ((frag-table (list->vector (append header-list
-+ trailer-list
-+ middle-list)))
-+ (x-header-relnum (/frag-lookup-virtual header-list 'x-header))
-+ (x-trailer-relnum (/frag-lookup-virtual trailer-list 'x-trailer))
-+ )
-+ ; Convert sfrag-usage-table to one that refers to the one big
-+ ; sfrag table.
-+ (logit 2 "Computing insn frag usage ...\n")
-+ (let ((insn-frags
-+ (map (lambda (insn frag-usage)
-+ (/sfrag-compute-frag-list! insn frag-usage
-+ frag-table
-+ num-headers num-trailers
-+ x-header-relnum
-+ x-trailer-relnum))
-+ insn-list
-+ ; FIXME: vector->list
-+ (vector->list sfrag-usage-table)))
-+ )
-+ (logit 1 "Done fragment creation.\n")
-+ (vector frag-table insn-frags locals-list)))))))
-+)
-+
-+; Data analysis interface.
-+
-+(define /sim-sfrag-init? #f)
-+(define (sim-sfrag-init?) /sim-sfrag-init?)
-+
-+; Keep in globals for now, simplifies debugging.
-+; evil globals, blah blah blah.
-+(define /sim-sfrag-insn-list #f)
-+(define /sim-sfrag-frag-table #f)
-+(define /sim-sfrag-usage-table #f)
-+(define /sim-sfrag-locals-list #f)
-+
-+(define (sim-sfrag-insn-list)
-+ (assert /sim-sfrag-init?)
-+ /sim-sfrag-insn-list
-+)
-+(define (sim-sfrag-frag-table)
-+ (assert /sim-sfrag-init?)
-+ /sim-sfrag-frag-table
-+)
-+(define (sim-sfrag-usage-table)
-+ (assert /sim-sfrag-init?)
-+ /sim-sfrag-usage-table
-+)
-+(define (sim-sfrag-locals-list)
-+ (assert /sim-sfrag-init?)
-+ /sim-sfrag-locals-list
-+)
-+
-+(define (sim-sfrag-init!)
-+ (set! /sim-sfrag-init? #f)
-+ (set! /sim-sfrag-insn-list #f)
-+ (set! /sim-sfrag-frag-table #f)
-+ (set! /sim-sfrag-usage-table #f)
-+ (set! /sim-sfrag-locals-list #f)
-+)
-+
-+(define (sim-sfrag-analyze-insns!)
-+ (if (not /sim-sfrag-init?)
-+ (begin
-+ (set! /sim-sfrag-insn-list (non-multi-insns (non-alias-insns (current-insn-list))))
-+ (let ((frag-data (/sfrag-create-cse-mapping /sim-sfrag-insn-list)))
-+ (set! /sim-sfrag-frag-table (vector-ref frag-data 0))
-+ (set! /sim-sfrag-usage-table (vector-ref frag-data 1))
-+ (set! /sim-sfrag-locals-list (vector-ref frag-data 2)))
-+ (set! /sim-sfrag-init? #t)))
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Testing support.
-+
-+(define (/frag-small-test-data)
-+ '(
-+ (a . (sequence VOID ((SI tmp)) (set DFLT tmp rm) (set DFLT rd rm)))
-+ (b . (sequence VOID ((SI tmp)) (set DFLT tmp rm) (set DFLT rd rm)))
-+ (c . (set DFLT rd rm))
-+ )
-+)
-+
-+(define (/frag-test-data)
-+ (cons
-+ (map (lambda (insn)
-+ (rtx-simplify-insn #f insn))
-+ (non-multi-insns (non-alias-insns (current-insn-list))))
-+ (non-multi-insns (non-alias-insns (current-insn-list))))
-+)
-+
-+(define test-sfrag-table #f)
-+(define test-stmt-table #f)
-+(define test-locals-list #f)
-+(define test-header-list #f)
-+(define test-trailer-list #f)
-+(define test-middle-list #f)
-+
-+(define (frag-test-run)
-+ (let* ((test-data (/frag-test-data))
-+ (frag-data (sem-find-common-frags (car test-data) (cdr test-data))))
-+ (set! test-sfrag-table (vector-ref frag-data 0))
-+ (set! test-stmt-table (vector-ref frag-data 1))
-+ (set! test-locals-list (vector-ref frag-data 2))
-+ (set! test-header-list (vector-ref frag-data 3))
-+ (set! test-trailer-list (vector-ref frag-data 4))
-+ (set! test-middle-list (vector-ref frag-data 5))
-+ )
-+ *UNSPECIFIED*
-+)
-diff -Nur binutils-2.24.orig/cgen/sid-cpu.scm binutils-2.24/cgen/sid-cpu.scm
---- binutils-2.24.orig/cgen/sid-cpu.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/sid-cpu.scm 2016-06-30 21:26:12.673893890 +0200
-@@ -0,0 +1,1458 @@
-+; CPU family related simulator generator, excluding decoding and model support.
-+; Copyright (C) 2000, 2002, 2003, 2005, 2006, 2009, 2010 Red Hat, Inc.
-+; This file is part of CGEN.
-+
-+; ***********
-+; cgen-desc.h
-+
-+(define (/last-insn)
-+ (string-upcase (gen-c-symbol (caar (list-take -1
-+ (gen-obj-list-enums (non-multi-insns (current-insn-list))))))))
-+
-+; Declare the attributes.
-+
-+(define (/gen-attr-decls)
-+ (string-list
-+ "// Insn attribute indices.\n\n"
-+ (gen-attr-enum-decl "cgen_insn" (current-insn-attr-list))
-+ "// Attributes.\n\n"
-+ (string-list-map gen-decl (current-attr-list))
-+ )
-+)
-+
-+; Generate class to hold an instruction's attributes.
-+
-+(define (/gen-insn-attr-decls)
-+ (let ((attrs (current-insn-attr-list)))
-+ (string-append
-+ "// Insn attributes.\n\n"
-+ ; FIXME: maybe make class, but that'll require a constructor. Later.
-+ "struct @arch@_insn_attr {\n"
-+ " unsigned int bools;\n"
-+ (string-map (lambda (attr)
-+ (if (bool-attr? attr)
-+ ""
-+ (string-append " "
-+ (gen-attr-type attr)
-+ " "
-+ (string-downcase (gen-sym attr))
-+ ";\n")))
-+ attrs)
-+ ;"public:\n"
-+ (string-map (lambda (attr)
-+ (string-append
-+ " inline "
-+ (gen-attr-type attr)
-+ " get_" (string-downcase (gen-sym attr)) "_attr"
-+ " () { return "
-+ (if (bool-attr? attr)
-+ (string-append "(bools & "
-+ (gen-attr-mask "cgen_insn" (obj:name attr))
-+ ") != 0")
-+ (string-downcase (gen-sym attr)))
-+ "; }\n"))
-+ attrs)
-+
-+ "};\n\n"
-+ ))
-+)
-+
-+
-+; Emit a macro that specifies the word-bitsize for each machine.
-+(define (/gen-mach-params)
-+ (string-map (lambda (mach)
-+ (string-append
-+ "#define MACH_" (string-upcase (gen-sym mach)) "_INSN_CHUNK_BITSIZE "
-+ (number->string (cpu-insn-chunk-bitsize (mach-cpu mach))) "\n"))
-+ (current-mach-list))
-+)
-+
-+
-+; Generate <cpu>-desc.h.
-+
-+(define (cgen-desc.h)
-+ (logit 1 "Generating " (gen-cpu-name) "-desc.h ...\n")
-+
-+ (string-write
-+ (gen-c-copyright "Misc. entries in the @arch@ description file."
-+ copyright-red-hat package-red-hat-simulators)
-+ "\
-+#ifndef DESC_@ARCH@_H
-+#define DESC_@ARCH@_H
-+
-+#include \"cgen/bitset.h\"
-+
-+namespace @arch@ {
-+\n"
-+
-+ (let ((enums (find (lambda (obj) (not (obj-has-attr? obj 'VIRTUAL)))
-+ (current-enum-list))))
-+ (if (null? enums)
-+ ""
-+ (string-list
-+ "// Enums.\n\n"
-+ (string-map gen-decl enums))))
-+
-+ /gen-attr-decls
-+ /gen-insn-attr-decls
-+ /gen-mach-params
-+
-+ "
-+} // end @arch@ namespace
-+
-+#endif /* DESC_@ARCH@_H */\n"
-+ )
-+)
-+
-+; **********
-+; cgen-cpu.h
-+
-+; Print out file containing elements to add to cpu class.
-+
-+; Get/set fns for hardware element HW.
-+
-+(define (/gen-reg-access-defns hw)
-+ (let ((scalar? (hw-scalar? hw))
-+ (name (obj:name hw))
-+ (getter (hw-getter hw))
-+ (setter (hw-setter hw))
-+ (type (gen-type hw)))
-+ (let ((get-code (if getter
-+ (let ((mode (hw-mode hw))
-+ (args (car getter))
-+ (expr (cadr getter)))
-+ (string-append
-+ "return "
-+ (rtl-c++ mode
-+ #f ;; h/w is not ISA-specific
-+ (if scalar?
-+ nil
-+ (list (list (car args) 'UINT "regno")))
-+ expr
-+ #:rtl-cover-fns? #t)
-+ ";"))
-+ (string-append
-+ "return this->hardware."
-+ (gen-c-symbol name)
-+ (if scalar? "" "[regno]")
-+ ";")))
-+ (set-code (if setter
-+ (let ((args (car setter))
-+ (expr (cadr setter)))
-+ (rtl-c++
-+ VOID ; not `mode', sets have mode VOID
-+ #f ;; h/w is not ISA-specific
-+ (if scalar?
-+ (list (list (car args) (hw-mode hw) "newval"))
-+ (list (list (car args) 'UINT "regno")
-+ (list (cadr args) (hw-mode hw) "newval")))
-+ expr
-+ #:rtl-cover-fns? #t))
-+ (string-append
-+ "this->hardware."
-+ (gen-c-symbol name)
-+ (if scalar? "" "[regno]")
-+ " = newval;"))))
-+ (string-append
-+ " inline " type " "
-+ (gen-reg-get-fun-name hw)
-+ " ("
-+ (if scalar? "" "UINT regno")
-+ ") const"
-+ " { " get-code " }"
-+ "\n"
-+ " inline void "
-+ (gen-reg-set-fun-name hw)
-+ " ("
-+ (if scalar? "" "UINT regno, ")
-+ type " newval)"
-+ " { " set-code " }"
-+ "\n\n")))
-+)
-+
-+; Return a boolean indicating if hardware element HW needs storage allocated
-+; for it in the SIM_CPU struct.
-+
-+(define (hw-need-storage? hw)
-+ (and (register? hw)
-+ (not (obj-has-attr? hw 'VIRTUAL)))
-+)
-+
-+(define (hw-need-write-stack? hw)
-+ (and (register? hw) (hw-used-in-delay-rtl? hw))
-+)
-+
-+; Subroutine of /gen-hardware-types to generate the struct containing
-+; hardware elements of one isa.
-+
-+(define (/gen-hardware-struct prefix hw-list)
-+ (if (null? hw-list)
-+ ; If struct is empty, leave it out to simplify generated code.
-+ ""
-+ (string-list
-+ (if prefix
-+ (string-append " // Hardware elements for " prefix ".\n")
-+ " // Hardware elements.\n")
-+ " struct {\n"
-+ (string-list-map gen-defn hw-list)
-+ " } "
-+ (if prefix
-+ (string-append prefix "_")
-+ "")
-+ "hardware;\n\n"
-+ ))
-+)
-+
-+; Return C type declarations of all of the hardware elements.
-+; The name of the type is prepended with the cpu family name.
-+
-+(define (/gen-hardware-types)
-+ (string-list
-+ "// CPU state information.\n\n"
-+ (/gen-hardware-struct #f (find hw-need-storage? (current-hw-list))))
-+)
-+
-+(define (/gen-hw-stream-and-destream-fns)
-+ (let* ((sa string-append)
-+ (regs (find hw-need-storage? (current-hw-list)))
-+ (stack-regs (find hw-need-write-stack? (current-hw-list)))
-+ (reg-dim (lambda (r)
-+ (let ((dims (/hw-vector-dims r)))
-+ (if (equal? 0 (length dims))
-+ "0"
-+ (number->string (car dims))))))
-+ (write-stacks
-+ (map (lambda (n) (sa n "_writes"))
-+ (append (map (lambda (r) (gen-c-symbol (obj:name r))) stack-regs)
-+ (map (lambda (m) (sa (symbol->string m) "_memory")) write-stack-memory-mode-names))))
-+ (stream-reg (lambda (r)
-+ (let ((rname (sa "hardware." (gen-c-symbol (obj:name r)))))
-+ (if (hw-scalar? r)
-+ (sa " ost << " rname " << ' ';\n")
-+ (sa " for (int i = 0; i < " (reg-dim r)
-+ "; i++)\n ost << " rname "[i] << ' ';\n")))))
-+ (destream-reg (lambda (r)
-+ (let ((rname (sa "hardware." (gen-c-symbol (obj:name r)))))
-+ (if (hw-scalar? r)
-+ (sa " ist >> " rname ";\n")
-+ (sa " for (int i = 0; i < " (reg-dim r)
-+ "; i++)\n ist >> " rname "[i];\n")))))
-+ (stream-stacks (lambda (s) (sa " stream_stacks ( stacks." s ", ost);\n")))
-+ (destream-stacks (lambda (s) (sa " destream_stacks ( stacks." s ", ist);\n")))
-+ (stack-boilerplate
-+ (sa
-+ " template <typename ST> \n"
-+ " void stream_stacks (const ST &st, std::ostream &ost) const\n"
-+ " {\n"
-+ " for (int i = 0; i < @prefix@::pipe_sz; i++)\n"
-+ " {\n"
-+ " ost << st[i].t << ' ';\n"
-+ " for (int j = 0; j <= st[i].t; j++)\n"
-+ " {\n"
-+ " ost << st[i].buf[j].pc << ' ';\n"
-+ " ost << st[i].buf[j].val << ' ';\n"
-+ " ost << st[i].buf[j].idx0 << ' ';\n"
-+ " }\n"
-+ " }\n"
-+ " }\n"
-+ " \n"
-+ " template <typename ST> \n"
-+ " void destream_stacks (ST &st, std::istream &ist)\n"
-+ " {\n"
-+ " for (int i = 0; i < @prefix@::pipe_sz; i++)\n"
-+ " {\n"
-+ " ist >> st[i].t;\n"
-+ " for (int j = 0; j <= st[i].t; j++)\n"
-+ " {\n"
-+ " ist >> st[i].buf[j].pc;\n"
-+ " ist >> st[i].buf[j].val;\n"
-+ " ist >> st[i].buf[j].idx0;\n"
-+ " }\n"
-+ " }\n"
-+ " }\n"
-+ " \n")))
-+ (sa
-+ " void stream_cgen_hardware (std::ostream &ost) const \n {\n"
-+ (string-map stream-reg regs)
-+ " }\n"
-+ " void destream_cgen_hardware (std::istream &ist) \n {\n"
-+ (string-map destream-reg regs)
-+ " }\n"
-+ (if (with-parallel?)
-+ (sa stack-boilerplate
-+ " void stream_cgen_write_stacks (std::ostream &ost, "
-+ "const @prefix@::write_stacks &stacks) const \n {\n"
-+ (string-map stream-stacks write-stacks)
-+ " }\n"
-+ " void destream_cgen_write_stacks (std::istream &ist, "
-+ "@prefix@::write_stacks &stacks) \n {\n"
-+ (string-map destream-stacks write-stacks)
-+ " }\n")
-+ ""))))
-+
-+
-+; Generate <cpu>-cpu.h
-+
-+(define (cgen-cpu.h)
-+ (logit 1 "Generating " (gen-cpu-name) "-cpu.h ...\n")
-+ (assert-keep-one)
-+
-+ ; Turn parallel execution support on if cpu needs it.
-+ (set-with-parallel?! (state-parallel-exec?))
-+
-+ ; Initialize rtl->c generation.
-+ (rtl-c-config! #:rtl-cover-fns? #t)
-+
-+ (string-write
-+ (gen-c-copyright "CPU class elements for @cpu@."
-+ copyright-red-hat package-red-hat-simulators)
-+ "\
-+// This file is included in the middle of the cpu class struct.
-+
-+public:
-+\n"
-+
-+ /gen-hardware-types
-+
-+ /gen-hw-stream-and-destream-fns
-+
-+ " // C++ register access function templates\n"
-+ "#define current_cpu this\n\n"
-+ (lambda ()
-+ (string-list-map /gen-reg-access-defns
-+ (find register? (current-hw-list))))
-+ "#undef current_cpu\n\n"
-+ )
-+)
-+
-+; **********
-+; cgen-defs.h
-+
-+; Print various parameters of the cpu family.
-+; A "cpu family" here is a collection of variants of a particular architecture
-+; that share sufficient commonality that they can be handled together.
-+
-+(define (/gen-cpu-defines)
-+ (string-append
-+ "\
-+/* Maximum number of instructions that are fetched at a time.
-+ This is for LIW type instructions sets (e.g. m32r). */\n"
-+ "#define @CPU@_MAX_LIW_INSNS " (number->string (cpu-liw-insns (current-cpu))) "\n\n"
-+ "/* Maximum number of instructions that can be executed in parallel. */\n"
-+ "#define @CPU@_MAX_PARALLEL_INSNS " (number->string (cpu-parallel-insns (current-cpu))) "\n"
-+ "\n"
-+; (gen-enum-decl '@prefix@_virtual
-+; "@prefix@ virtual insns"
-+; "@ARCH@_INSN_" ; not @CPU@ to match CGEN_INSN_TYPE in opc.h
-+; '((x-invalid 0)
-+; (x-before -1) (x-after -2)
-+; (x-begin -3) (x-chain -4) (x-cti-chain -5)))
-+ )
-+)
-+
-+; Generate type of struct holding model state while executing.
-+
-+(define (/gen-model-decls)
-+ (logit 2 "Generating model decls ...\n")
-+ (string-list
-+ (string-list-map
-+ (lambda (model)
-+ (string-list
-+ "typedef struct {\n"
-+ (if (null? (model:state model))
-+ " int empty;\n"
-+ (string-map (lambda (var)
-+ (string-append " "
-+ (mode:c-type (mode:lookup (cadr var)))
-+ " "
-+ (gen-c-symbol (car var))
-+ ";\n"))
-+ (model:state model)))
-+ "} "
-+ (if (null? (model:state model)) "BLANK" "@CPU@") "_MODEL_DATA;\n\n"
-+ ))
-+ (current-model-list))
-+ "
-+typedef int (@CPU@_MODEL_FN) (struct @cpu@_cpu*, void*);
-+
-+typedef struct {
-+ /* This is an integer that identifies this insn.
-+ How this works is up to the target. */
-+ int num;
-+
-+ /* Function to handle insn-specific profiling. */
-+ @CPU@_MODEL_FN *model_fn;
-+
-+ /* Array of function units used by this insn. */
-+ UNIT units[MAX_UNITS];
-+} @CPU@_INSN_TIMING;"
-+ )
-+)
-+
-+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-+;;; begin stack-based write schedule
-+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-+
-+(define write-stack-memory-mode-names '())
-+
-+(define (/calculated-memory-write-buffer-size)
-+ (let* ((is-mem? (lambda (op) (eq? (hw-sem-name (op:type op)) 'h-memory)))
-+ (count-mem-writes
-+ (lambda (sfmt) (length (find is-mem? (sfmt-out-ops sfmt))))))
-+ (apply max (append '(0) (map count-mem-writes (current-sfmt-list))))))
-+
-+
-+;; note: this doesn't really correctly approximate the worst case. user-supplied functions
-+;; might rewrite the pipeline extensively while it's running.
-+;(define (/worst-case-number-of-writes-to hw-name)
-+; (let* ((sfmts (current-sfmt-list))
-+; (out-ops (map sfmt-out-ops sfmts))
-+; (pred (lambda (op) (equal? hw-name (gen-c-symbol (obj:name (op:type op))))))
-+; (filtered-ops (map (lambda (ops) (find pred ops)) out-ops)))
-+; (apply max (cons 0 (map (lambda (ops) (length ops)) filtered-ops)))))
-+
-+(define (/hw-gen-write-stack-decl nm mode)
-+ (let* (
-+; for the time being, we're disabling this size-estimation stuff and just
-+; requiring the user to supply a parameter WRITE_BUF_SZ before they include -defs.h
-+; (pipe-sz (+ 1 (max-delay (cpu-max-delay (current-cpu)))))
-+; (sz (* pipe-sz (/worst-case-number-of-writes-to nm))))
-+
-+ (mode-pad (spaces (- 4 (string-length (symbol->string mode)))))
-+ (stack-name (string-append nm "_writes")))
-+ (string-append
-+ " write_stack< write<" (symbol->string mode) "> >" mode-pad "\t" stack-name "\t[pipe_sz];\n")))
-+
-+
-+(define (/hw-gen-write-struct-decl)
-+ (let* ((dims (/worst-case-index-dims))
-+ (sa string-append)
-+ (ns number->string)
-+ (idxs (iota dims))
-+ (ctor (sa "write (PCADDR _pc, MODE _val"
-+ (string-map (lambda (x) (sa ", USI _idx" (ns x) "=0")) idxs)
-+ ") : pc(_pc), val(_val)"
-+ (string-map (lambda (x) (sa ", idx" (ns x) "(_idx" (ns x) ")")) idxs)
-+ " {} \n"))
-+ (idx-fields (string-map (lambda (x) (sa " USI idx" (ns x) ";\n")) idxs)))
-+ (sa
-+ "\n\n"
-+ " template <typename MODE>\n"
-+ " struct write\n"
-+ " {\n"
-+ " USI pc;\n"
-+ " MODE val;\n"
-+ idx-fields
-+ " " ctor
-+ " write() {}\n"
-+ " };\n" )))
-+
-+(define (/hw-vector-dims hw) (elm-get (hw-type hw) 'dimensions))
-+(define (/worst-case-index-dims)
-+ (apply max
-+ (append '(1) ; for memory accesses
-+ (map (lambda (hw) (length (/hw-vector-dims hw)))
-+ (find (lambda (hw) (not (scalar? hw))) (current-hw-list))))))
-+
-+
-+(define (/gen-writestacks)
-+ (let* ((hw (find hw-need-write-stack? (current-hw-list)))
-+ (modes write-stack-memory-mode-names)
-+ (hw-pairs (map (lambda (h) (list (gen-c-symbol (obj:name h))
-+ (obj:name (hw-mode h))))
-+ hw))
-+ (mem-pairs (map (lambda (m) (list (string-append (symbol->string m)
-+ "_memory") m))
-+ modes))
-+ (all-pairs (append mem-pairs hw-pairs))
-+
-+ (h1 "\n\n// write stacks used in parallel execution\n\n struct write_stacks\n {\n // types of stacks\n\n")
-+ (wb (string-append
-+ "\n\n // unified writeback function (defined in @prefix@-write.cc)"
-+ "\n void writeback (int tick, @cpu@::@cpu@_cpu* current_cpu);"
-+ "\n // unified write-stack clearing function (defined in @prefix@-write.cc)"
-+ "\n void reset ();"))
-+ (zz "\n\n }; // end struct @prefix@::write_stacks \n\n"))
-+ (string-append
-+ (/hw-gen-write-struct-decl)
-+ (foldl (lambda (s pair) (string-append s (apply /hw-gen-write-stack-decl pair))) h1 all-pairs)
-+ wb
-+ zz)))
-+
-+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-+;;; end stack-based write schedule
-+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-+
-+
-+; Generate the definition of the structure that holds register values, etc.
-+; for use during parallel execution.
-+
-+(define (gen-write-stack-structure)
-+ (let ((membuf-sz (/calculated-memory-write-buffer-size))
-+ (max-delay (cpu-max-delay (current-cpu))))
-+ (logit 2 "Generating write stack structure ...\n")
-+ (string-append
-+ " static const int max_delay = "
-+ (number->string max-delay) ";\n"
-+ " static const int pipe_sz = "
-+ (number->string (+ 1 max-delay)) "; // max_delay + 1\n"
-+
-+"
-+ template <typename ELT>
-+ struct write_stack
-+ {
-+ int t;
-+ const int sz;
-+ ELT buf[WRITE_BUF_SZ];
-+
-+ write_stack () : t(-1), sz(WRITE_BUF_SZ) {}
-+ inline bool empty () { return (t == -1); }
-+ inline void clear () { t = -1; }
-+ inline void pop () { if (t > -1) t--;}
-+ inline void push (const ELT &e) { if (t+1 < sz) buf [++t] = e;}
-+ inline ELT &top () { return buf [t>0 ? ( t<sz ? t : sz-1) : 0];}
-+ };
-+
-+ // look ahead for latest write with index = idx, where time of write is
-+ // <= dist steps from base (present) in write_stack array st.
-+ // returning def if no scheduled write is found.
-+
-+ template <typename STKS, typename VAL>
-+ inline VAL lookahead (int dist, int base, STKS &st, VAL def, int idx=0)
-+ {
-+ for (; dist > 0; --dist)
-+ {
-+ write_stack <VAL> &v = st [(base + dist) % pipe_sz];
-+ for (int i = v.t; i > 0; --i)
-+ if (v.buf [i].idx0 == idx) return v.buf [i];
-+ }
-+ return def;
-+ }
-+
-+"
-+
-+ (/gen-writestacks)
-+ )))
-+
-+; Generate the TRACE_RECORD struct definition.
-+
-+(define (/gen-trace-record-type)
-+ (string-list
-+ "\
-+/* Collection of various things for the trace handler to use. */
-+
-+typedef struct @prefix@_trace_record {
-+ PCADDR pc;
-+ /* FIXME:wip */
-+} @CPU@_TRACE_RECORD;
-+\n"
-+ )
-+)
-+
-+; Generate <cpu>-defs.h
-+
-+(define (cgen-defs.h)
-+ (logit 1 "Generating " (gen-cpu-name) "-defs.h ...\n")
-+ (assert-keep-one)
-+
-+ ; Turn parallel execution support on if cpu needs it.
-+ (set-with-parallel?! (state-parallel-exec?))
-+
-+ ; Initialize rtl->c generation.
-+ (rtl-c-config! #:rtl-cover-fns? #t)
-+
-+ (string-write
-+ (gen-c-copyright "CPU family header for @cpu@ / @prefix@."
-+ copyright-red-hat package-red-hat-simulators)
-+ "\
-+#ifndef DEFS_@PREFIX@_H
-+#define DEFS_@PREFIX@_H
-+
-+")
-+ (if (with-parallel?)
-+ (string-write "\
-+#include <stack>
-+#include \"cgen-types.h\"
-+
-+// forward declaration\n\n
-+namespace @cpu@ {
-+struct @cpu@_cpu;
-+}
-+
-+namespace @prefix@ {
-+
-+using namespace cgen;
-+
-+"
-+ gen-write-stack-structure
-+ "\
-+} // end @prefix@ namespace
-+"))
-+ (string-write "\
-+
-+#endif /* DEFS_@PREFIX@_H */\n"
-+ )
-+)
-+
-+; **************
-+; cgen-write.cxx
-+
-+; This is the other way of implementing parallel execution support.
-+; Instead of fetching all the input operands first, write all the output
-+; operands and their addresses to holding variables, and then run a
-+; post-processing pass to update the cpu state.
-+
-+; Return C code to fetch and save all output operands to instructions with
-+; <sformat> SFMT.
-+
-+
-+; Generate <cpu>-write.cxx.
-+
-+(define (/gen-register-writer nm mode dims)
-+ (let* ((pad " ")
-+ (sa string-append)
-+ (mode (symbol->string mode))
-+ (idx-args (string-map (lambda (x) (sa "w.idx" (number->string x) ", "))
-+ (iota dims))))
-+ (sa pad "while (! " nm "_writes[tick].empty())\n"
-+ pad "{\n"
-+ pad " write<" mode "> &w = " nm "_writes[tick].top();\n"
-+ pad " current_cpu->" nm "_set(" idx-args "w.val);\n"
-+ pad " " nm "_writes[tick].pop();\n"
-+ pad "}\n\n")))
-+
-+(define (/gen-memory-writer nm mode dims)
-+ (let* ((pad " ")
-+ (sa string-append)
-+ (mode (symbol->string mode))
-+ (idx-args (string-map (lambda (x) (sa ", w.idx" (number->string x) ""))
-+ (iota dims))))
-+ (sa pad "while (! " nm "_writes[tick].empty())\n"
-+ pad "{\n"
-+ pad " write<" mode "> &w = " nm "_writes[tick].top();\n"
-+ pad " current_cpu->SETMEM" mode " (w.pc" idx-args ", w.val);\n"
-+ pad " " nm "_writes[tick].pop();\n"
-+ pad "}\n\n")))
-+
-+
-+(define (/gen-reset-fn)
-+ (let* ((sa string-append)
-+ (objs (append (map (lambda (h) (gen-c-symbol (obj:name h)))
-+ (find hw-need-write-stack? (current-hw-list)))
-+ (map (lambda (m) (sa (symbol->string m) "_memory"))
-+ write-stack-memory-mode-names)))
-+ (clr (lambda (elt) (sa " clear_stacks (" elt "_writes);\n"))))
-+ (sa
-+ " template <typename ST> \n"
-+ " static void clear_stacks (ST &st)\n"
-+ " {\n"
-+ " for (int i = 0; i < @prefix@::pipe_sz; i++)\n"
-+ " st[i].clear();\n"
-+ " }\n\n"
-+ " void @prefix@::write_stacks::reset ()\n {\n"
-+ (string-map clr objs)
-+ " }")))
-+
-+(define (/gen-unified-write-fn)
-+ (let* ((hw (find hw-need-write-stack? (current-hw-list)))
-+ (modes write-stack-memory-mode-names)
-+ (hw-triples (map (lambda (h) (list (gen-c-symbol (obj:name h))
-+ (obj:name (hw-mode h))
-+ (length (/hw-vector-dims h))))
-+ hw))
-+ (mem-triples (map (lambda (m) (list (string-append (symbol->string m)
-+ "_memory")
-+ m 1))
-+ modes)))
-+ (logit 2 "Generating writer function ...\n")
-+ (string-append
-+ "
-+ void @prefix@::write_stacks::writeback (int tick, @cpu@::@cpu@_cpu* current_cpu)
-+ {
-+"
-+ "\n // register writeback loops\n"
-+ (string-map (lambda (t) (apply /gen-register-writer t)) hw-triples)
-+ "\n // memory writeback loops\n"
-+ (string-map (lambda (t) (apply /gen-memory-writer t)) mem-triples)
-+"
-+ }
-+")))
-+
-+(define (cgen-write.cxx)
-+ (logit 1 "Generating " (gen-cpu-name) "-write.cxx ...\n")
-+ (assert-keep-one)
-+
-+ (sim-analyze-insns!)
-+
-+ ; Turn parallel execution support off.
-+ (set-with-parallel?! #f)
-+
-+ ; Tell the rtx->c translator we are the simulator.
-+ (rtl-c-config! #:rtl-cover-fns? #t)
-+
-+ (string-write
-+ (gen-c-copyright (string-append "Simulator instruction operand writer for "
-+ (symbol->string (current-arch-name))
-+ ".")
-+ copyright-red-hat package-red-hat-simulators)
-+ "\
-+
-+#include \"@cpu@.h\"
-+
-+"
-+ /gen-reset-fn
-+ /gen-unified-write-fn
-+ )
-+)
-+
-+; ******************
-+; cgen-semantics.cxx
-+
-+; Return C code to perform the semantics of INSN.
-+
-+(define (gen-semantic-code insn)
-+ (cond ((insn-compiled-semantics insn)
-+ => (lambda (sem)
-+ (rtl-c++-parsed VOID sem
-+ #:for-insn? #t
-+ #:rtl-cover-fns? #t
-+ #:owner insn)))
-+ ((insn-canonical-semantics insn)
-+ => (lambda (sem)
-+ (rtl-c++-parsed VOID sem
-+ #:for-insn? #t
-+ #:rtl-cover-fns? #t
-+ #:owner insn)))
-+ (else
-+ (context-error (make-obj-context insn #f)
-+ "While generating semantic code"
-+ "semantics of insn are not canonicalized")))
-+)
-+
-+; Return definition of C function to perform INSN.
-+; This version handles the with-scache case.
-+
-+(define (/gen-scache-semantic-fn insn)
-+ (logit 2 "Processing semantics for " (obj:name insn) ": \"" (insn-syntax insn) "\" ...\n")
-+ (set! /with-profile? /with-profile-fn?)
-+ (let ((cti? (insn-cti? insn))
-+ (insn-len (insn-length-bytes insn)))
-+ (string-list
-+ "// ********** " (obj:name insn) ": " (insn-syntax insn) "\n\n"
-+ (if (with-parallel?)
-+ "void\n"
-+ "sem_status\n")
-+ "@prefix@_sem_" (gen-sym insn)
-+ (if (with-parallel?)
-+ (string-append " (@cpu@_cpu* current_cpu, @prefix@_scache* sem, const int tick, \n\t"
-+ "@prefix@::write_stacks &buf)\n")
-+ " (@cpu@_cpu* current_cpu, @prefix@_scache* sem)\n")
-+ "{\n"
-+ (gen-define-field-macro (insn-sfmt insn))
-+ " sem_status status = SEM_STATUS_NORMAL;\n"
-+ " @prefix@_scache* abuf = sem;\n"
-+ ; Unconditionally written operands are not recorded here.
-+ (if (or (with-profile?) (with-parallel-write?))
-+ " unsigned long long written = 0;\n"
-+ "")
-+ ; The address of this insn, needed by extraction and semantic code.
-+ ; Note that the address recorded in the cpu state struct is not used.
-+ ; For faster engines that copy will be out of date.
-+ " PCADDR pc = abuf->addr;\n"
-+ " PCADDR npc = pc + " (number->string insn-len) ";\n"
-+ "\n"
-+ (gen-semantic-code insn)
-+ "\n"
-+ ; Only update what's been written if some are conditionally written.
-+ ; Otherwise we know they're all written so there's no point in
-+ ; keeping track.
-+ (if (or (with-profile?) (with-parallel-write?))
-+ (if (/any-cond-written? (insn-sfmt insn))
-+ " abuf->written = written;\n"
-+ "")
-+ "")
-+ (if cti?
-+ " current_cpu->done_cti_insn (npc, status);\n"
-+ " current_cpu->done_insn (npc, status);\n")
-+ (if (with-parallel?)
-+ ""
-+ " return status;\n")
-+ (gen-undef-field-macro (insn-sfmt insn))
-+ "}\n\n"
-+ ))
-+)
-+
-+(define (/gen-all-semantic-fns)
-+ (logit 2 "Processing semantics ...\n")
-+ (let ((insns (scache-engine-insns)))
-+ (if (with-scache?)
-+ (string-write-map /gen-scache-semantic-fn insns)
-+ (error "must specify `with-scache'")))
-+)
-+
-+; Generate <cpu>-sem.cxx.
-+; Each instruction is implemented in its own function.
-+
-+(define (cgen-semantics.cxx)
-+ (logit 1 "Generating " (gen-cpu-name) "-semantics.cxx ...\n")
-+ (assert-keep-one)
-+
-+ (sim-analyze-insns!)
-+
-+ ; Turn parallel execution support on if cpu needs it.
-+ (set-with-parallel?! (state-parallel-exec?))
-+
-+ ; Tell the rtx->c translator we are the simulator.
-+ (rtl-c-config! #:rtl-cover-fns? #t)
-+
-+ ; Indicate we're currently not generating a pbb engine.
-+ (set-current-pbb-engine?! #f)
-+
-+ (string-write
-+ (gen-c-copyright "Simulator instruction semantics for @prefix@."
-+ copyright-red-hat package-red-hat-simulators)
-+ "\
-+
-+#if HAVE_CONFIG_H
-+#include \"config.h\"
-+#endif
-+#include \"@cpu@.h\"
-+
-+using namespace @cpu@; // FIXME: namespace organization still wip\n")
-+ (if (with-parallel?)
-+ (string-write "\
-+using namespace @prefix@; // FIXME: namespace organization still wip\n"))
-+ (string-write "\
-+#define GET_ATTR(name) GET_ATTR_##name ()
-+
-+\n"
-+
-+ /gen-all-semantic-fns
-+ )
-+)
-+
-+; *******************
-+; cgen-sem-switch.cxx
-+;
-+; The semantic switch engine has two flavors: one case per insn, and one
-+; case per "frag" (where each insn is split into one or more fragments).
-+
-+; Utility of /gen-sem-case to return the mask of operands always written
-+; to in <sformat> SFMT.
-+; ??? Not currently used.
-+
-+(define (/uncond-written-mask sfmt)
-+ (apply + (map (lambda (op)
-+ (if (op:cond? op)
-+ 0
-+ (logsll 1 (op:num op))))
-+ (sfmt-out-ops sfmt)))
-+)
-+
-+; Utility of /gen-sem-case to return #t if any operand in <sformat> SFMT is
-+; conditionally written to.
-+
-+(define (/any-cond-written? sfmt)
-+ (any-true? (map op:cond? (sfmt-out-ops sfmt)))
-+)
-+
-+; One case per insn version.
-+
-+; Generate a switch case to perform INSN.
-+
-+(define (/gen-sem-case insn parallel?)
-+ (logit 2 "Processing "
-+ (if parallel? "parallel " "")
-+ "semantic switch case for " (obj:name insn) ": \""
-+ (insn-syntax insn) "\" ...\n")
-+ (set! /with-profile? /with-profile-sw?)
-+ (let ((cti? (insn-cti? insn))
-+ (insn-len (insn-length-bytes insn)))
-+ (string-list
-+ ; INSN_ is prepended here and not elsewhere to avoid name collisions
-+ ; with symbols like AND, etc.
-+ "\
-+// ********** " (insn-syntax insn) "
-+
-+ CASE (INSN_" (if parallel? "PAR_" "") (string-upcase (gen-sym insn)) "):
-+ {
-+ @prefix@_scache* abuf = vpc;\n"
-+ (if (with-scache?)
-+ (gen-define-field-macro (insn-sfmt insn))
-+ "")
-+ ; Unconditionally written operands are not recorded here.
-+ (if (or (with-profile?) (with-parallel-write?))
-+ " unsigned long long written = 0;\n"
-+ "")
-+ ; The address of this insn, needed by extraction and semantic code.
-+ ; Note that the address recorded in the cpu state struct is not used.
-+ " PCADDR pc = abuf->addr;\n"
-+ (if (and cti? (not parallel?))
-+ (string-append " PCADDR npc;\n"
-+ " branch_status br_status = BRANCH_UNTAKEN;\n")
-+ "")
-+ (string-list " vpc = vpc + 1;\n")
-+ ; Emit setup-semantics code for real insns.
-+ (if (and (insn-real? insn)
-+ (isa-setup-semantics (current-isa)))
-+ (string-append
-+ " "
-+ (rtl-c++ VOID (obj-isa-list insn) nil
-+ (isa-setup-semantics (current-isa))
-+ #:for-insn? #t
-+ #:rtl-cover-fns? #t
-+ #:owner insn))
-+ "")
-+ "\n"
-+ (gen-semantic-code insn)
-+ "\n"
-+ ; Only update what's been written if some are conditionally written.
-+ ; Otherwise we know they're all written so there's no point in
-+ ; keeping track.
-+ (if (or (with-profile?) (with-parallel-write?))
-+ (if (/any-cond-written? (insn-sfmt insn))
-+ " abuf->written = written;\n"
-+ "")
-+ "")
-+ (if (and cti? (not parallel?))
-+ (string-append " pbb_br_npc = npc;\n"
-+ " pbb_br_status = br_status;\n")
-+ "")
-+ (if (with-scache?)
-+ (gen-undef-field-macro (insn-sfmt insn))
-+ "")
-+ " }\n"
-+ " NEXT (vpc);\n\n"
-+ ))
-+)
-+
-+(define (/gen-sem-switch)
-+ (logit 2 "Processing semantic switch ...\n")
-+ ; Turn parallel execution support off.
-+ (set-with-parallel?! #f)
-+ (string-write-map (lambda (insn) (/gen-sem-case insn #f))
-+ (non-multi-insns (non-alias-insns (current-insn-list))))
-+)
-+
-+; Generate the guts of a C switch statement to execute parallel instructions.
-+; This switch is included after the non-parallel instructions in the semantic
-+; switch.
-+;
-+; ??? We duplicate the writeback case for each insn, even though we only need
-+; one case per insn format. The former keeps the code for each insn
-+; together and might improve cache usage. On the other hand the latter
-+; reduces the amount of code, though it is believed that in this particular
-+; instance the win isn't big enough.
-+
-+(define (/gen-parallel-sem-switch)
-+ (logit 2 "Processing parallel insn semantic switch ...\n")
-+ ; Turn parallel execution support on.
-+ (set-with-parallel?! #t)
-+ (string-write-map (lambda (insn)
-+ (string-list (/gen-sem-case insn #t)
-+ (/gen-write-case (insn-sfmt insn) insn)))
-+ (parallel-insns (current-insn-list)))
-+)
-+
-+; Return computed-goto engine.
-+
-+(define (/gen-sem-switch-engine)
-+ (string-write
-+ "\
-+void
-+@cpu@_cpu::@prefix@_pbb_run ()
-+{
-+ @cpu@_cpu* current_cpu = this;
-+ @prefix@_scache* vpc;
-+ // These two are used to pass data from cti insns to the cti-chain insn.
-+ PCADDR pbb_br_npc;
-+ branch_status pbb_br_status;
-+
-+#ifdef __GNUC__
-+{
-+ static const struct sem_labels
-+ {
-+ enum @prefix@_insn_type insn;
-+ void *label;
-+ }
-+ labels[] =
-+ {\n"
-+
-+ (lambda ()
-+ (string-write-map (lambda (insn)
-+ (string-append " { "
-+ "@PREFIX@_INSN_"
-+ (string-upcase (gen-sym insn))
-+ ", && case_INSN_"
-+ (string-upcase (gen-sym insn))
-+ " },\n"))
-+ (non-multi-insns (non-alias-insns (current-insn-list)))))
-+
-+ (if (state-parallel-exec?)
-+ (lambda ()
-+ (string-write-map (lambda (insn)
-+ (string-append " { "
-+ "@PREFIX@_INSN_PAR_"
-+ (string-upcase (gen-sym insn))
-+ ", && case_INSN_PAR_"
-+ (string-upcase (gen-sym insn))
-+ " },\n"
-+ " { "
-+ "@PREFIX@_INSN_WRITE_"
-+ (string-upcase (gen-sym insn))
-+ ", && case_INSN_WRITE_"
-+ (string-upcase (gen-sym insn))
-+ " },\n"))
-+ (parallel-insns (current-insn-list))))
-+ "")
-+
-+ " { (@prefix@_insn_type) 0, 0 }
-+ };
-+
-+ if (! @prefix@_idesc::idesc_table_initialized_p)
-+ {
-+ for (int i=0; labels[i].label != 0; i++)
-+ @prefix@_idesc::idesc_table[labels[i].insn].cgoto.label = labels[i].label;
-+
-+ // confirm that table is all filled up
-+ for (int i = 0; i <= @PREFIX@_INSN_" (/last-insn) "; i++)
-+ assert (@prefix@_idesc::idesc_table[i].cgoto.label != 0);
-+
-+ // Initialize the compiler virtual insn.
-+ current_cpu->@prefix@_engine.compile_begin_insn (current_cpu);
-+
-+ @prefix@_idesc::idesc_table_initialized_p = true;
-+ }
-+}
-+#endif
-+
-+#ifdef __GNUC__
-+#define CASE(X) case_##X
-+// Branch to next handler without going around main loop.
-+#define NEXT(vpc) goto * vpc->execute.cgoto.label;
-+// Break out of threaded interpreter and return to \"main loop\".
-+#define BREAK(vpc) goto end_switch
-+#else
-+#define CASE(X) case @PREFIX@_##X
-+#define NEXT(vpc) goto restart
-+#define BREAK(vpc) break
-+#endif
-+
-+ // Get next insn to execute.
-+ vpc = current_cpu->@prefix@_engine.get_next_vpc (current_cpu->h_pc_get ());
-+
-+restart:
-+#ifdef __GNUC__
-+ goto * vpc->execute.cgoto.label;
-+#else
-+ switch (vpc->idesc->sem_index)
-+#endif
-+
-+ {
-+"
-+
-+ /gen-sem-switch
-+
-+ (if (state-parallel-exec?)
-+ /gen-parallel-sem-switch
-+ "")
-+
-+"
-+#ifdef __GNUC__
-+ end_switch: ;
-+#else
-+ default: abort();
-+#endif
-+ }
-+
-+ // Save vpc for next time.
-+ current_cpu->@prefix@_engine.set_next_vpc (vpc);
-+}
-+\n"
-+ )
-+)
-+
-+; Semantic frag version.
-+
-+; Return declaration of frag enum.
-+
-+(define (/gen-sfrag-enum-decl frag-list)
-+ (gen-enum-decl "@prefix@_frag_type"
-+ "semantic fragments in cpu family @prefix@"
-+ "@PREFIX@_FRAG_"
-+ (append '((list-end))
-+ (map (lambda (i)
-+ (cons (obj:name i)
-+ (cons '-
-+ (atlist-attrs (obj-atlist i)))))
-+ frag-list)
-+ '((max))))
-+)
-+
-+; Return header file decls for semantic frag threaded engine.
-+
-+(define (/gen-sfrag-engine-decls)
-+ (string-write
-+ "namespace @cpu@ {\n\n"
-+
-+ ; FIXME: vector->list
-+ (/gen-sfrag-enum-decl (vector->list (sim-sfrag-frag-table)))
-+
-+ "\
-+struct @prefix@_insn_frag {
-+ @PREFIX@_INSN_TYPE itype;
-+ // 4: header+middle+trailer+delimiter
-+ @PREFIX@_FRAG_TYPE ftype[4];
-+};
-+
-+struct @prefix@_pbb_label {
-+ @PREFIX@_FRAG_TYPE frag;
-+ void *label;
-+};
-+
-+} // end @cpu@ namespace
-+\n")
-+)
-+
-+; Return C code to perform the semantics of FRAG.
-+; LOCALS is a list of sequence locals made global to all frags.
-+; Each element is (symbol <mode> "c-var-name").
-+
-+(define (/gen-sfrag-code frag locals)
-+ (let ((sem (sfrag-semantics frag))
-+ ; If the frag has one owner, use it. Otherwise indicate the owner is
-+ ; unknown. In cases where the owner is needed by the semantics, the
-+ ; frag should have only one owner. In practice this means that frags
-+ ; with the ref,current-insn rtx cannot be used by multiple insns.
-+ (owner (if (= (length (sfrag-users frag)) 1)
-+ (car (sfrag-users frag))
-+ #f)))
-+ ;; NOTE: (sfrag-users frag) is nil for the x-header and x-trailer frags.
-+ ;; They are just nops.
-+ (rtl-c++ VOID (and owner (obj-isa-list owner)) locals sem
-+ #:for-insn? #t
-+ #:rtl-cover-fns? #t
-+ #:owner owner))
-+)
-+
-+; Generate a switch case to perform FRAG.
-+; LOCALS is a list of sequence locals made global to all frags.
-+; Each element is (symbol <mode> "c-var-name").
-+
-+(define (/gen-sfrag-case frag locals)
-+ (set! /with-profile? /with-profile-sw?)
-+ (let ((cti? (sfmt-cti? (sfrag-sfmt frag)))
-+ (parallel? (sfrag-parallel? frag)))
-+ (logit 2 "Processing "
-+ (if parallel? "parallel " "")
-+ "semantic switch case for " (obj:name frag) " ...\n")
-+ (string-list
-+ ; FRAG_ is prepended here and not elsewhere to avoid name collisions
-+ ; with symbols like AND, etc.
-+ "\
-+// ********** "
-+ (if (= (length (sfrag-users frag)) 1)
-+ "used only by:"
-+ "used by:")
-+ (string-drop1
-+ (string-map (lambda (user)
-+ (string-append ", " (obj:str-name user)))
-+ (sfrag-users frag)))
-+ "
-+
-+ CASE (FRAG_" (string-upcase (gen-sym frag)) "):
-+ {\n"
-+ (if (sfrag-header? frag)
-+ (string-append " abuf = vpc;\n"
-+ " vpc = vpc + 1;\n")
-+ "")
-+ (gen-define-field-macro (sfrag-sfmt frag))
-+ ; Unconditionally written operands are not recorded here.
-+ (if (or (with-profile?) (with-parallel-write?))
-+ " unsigned long long written = 0;\n"
-+ "")
-+ ; The address of this insn, needed by extraction and semantic code.
-+ ; Note that the address recorded in the cpu state struct is not used.
-+ " PCADDR pc = abuf->addr;\n"
-+ (if (and cti?
-+ (not parallel?)
-+ (sfrag-header? frag))
-+ (string-append ; " npc = 0;\n" ??? needed?
-+ " br_status = BRANCH_UNTAKEN;\n")
-+ "")
-+ ; Emit setup-semantics code for headers of real insns.
-+ (if (and (sfrag-header? frag)
-+ (not (obj-has-attr? frag 'VIRTUAL))
-+ (isa-setup-semantics (current-isa)))
-+ (string-append
-+ " "
-+ (rtl-c++ VOID (list (obj:name (current-isa))) nil
-+ (isa-setup-semantics (current-isa))
-+ #:rtl-cover-fns? #t
-+ #:owner #f))
-+ "")
-+ "\n"
-+ (/gen-sfrag-code frag locals)
-+ "\n"
-+ ; Only update what's been written if some are conditionally written.
-+ ; Otherwise we know they're all written so there's no point in
-+ ; keeping track.
-+ (if (or (with-profile?) (with-parallel-write?))
-+ (if (/any-cond-written? (sfrag-sfmt frag))
-+ " abuf->written = written;\n"
-+ "")
-+ "")
-+ (if (and cti?
-+ (not parallel?)
-+ (sfrag-trailer? frag))
-+ (string-append " pbb_br_npc = npc;\n"
-+ " pbb_br_status = br_status;\n")
-+ "")
-+ (gen-undef-field-macro (sfrag-sfmt frag))
-+ " }\n"
-+ (if (sfrag-trailer? frag)
-+ " NEXT_INSN (vpc, fragpc);\n"
-+ " NEXT_FRAG (fragpc);\n")
-+ "\n"
-+ ))
-+)
-+
-+; Convert locals from form computed by sem-find-common-frags to that needed by
-+; /gen-sfrag-engine-code (and ultimately rtl-c++).
-+
-+(define (/frag-convert-c-locals locals)
-+ (map (lambda (local)
-+ (list (car local) (mode:lookup (cadr local))
-+ (gen-c-symbol (car local))))
-+ locals)
-+)
-+
-+; Return definition of insn frag usage table.
-+
-+(define (/gen-sfrag-engine-frag-table insn-list frag-table frag-usage)
-+ (string-write
-+ "\
-+// Table of frags used by each insn.
-+
-+const @prefix@_insn_frag @prefix@_frag_usage[] = {\n"
-+
-+ (lambda ()
-+ (for-each (lambda (insn frag-nums)
-+ (string-write " { "
-+ "@PREFIX@_INSN_"
-+ (string-upcase (gen-sym insn))
-+ (string-map (lambda (frag-num)
-+ (string-append ", @PREFIX@_FRAG_"
-+ (string-upcase (gen-sym (vector-ref frag-table frag-num)))))
-+ frag-nums)
-+ ", @PREFIX@_FRAG_LIST_END },\n"))
-+ insn-list frag-usage)
-+ "")
-+ "};\n\n")
-+)
-+
-+; Return sfrag computed-goto engine.
-+; LOCALS is a list of sequence locals made global to all frags.
-+; Each element is (symbol <mode> "c-var-name").
-+
-+(define (/gen-sfrag-engine-fn frag-table locals)
-+ (string-write
-+ "\
-+void
-+@cpu@_cpu::@prefix@_pbb_run ()
-+{
-+ @cpu@_cpu* current_cpu = this;
-+ @prefix@_scache* vpc;
-+ @prefix@_scache* abuf;
-+#ifdef __GNUC__
-+ void** fragpc;
-+#else
-+ ARM_FRAG_TYPE* fragpc;
-+#endif
-+
-+#ifdef __GNUC__
-+{
-+ static const @prefix@_pbb_label labels[] =
-+ {
-+ { @PREFIX@_FRAG_LIST_END, 0 },
-+"
-+
-+ (lambda ()
-+ (string-write-map (lambda (frag)
-+ (string-append " { "
-+ "@PREFIX@_FRAG_"
-+ (string-upcase (gen-sym frag))
-+ ", && case_FRAG_"
-+ (string-upcase (gen-sym frag))
-+ " },\n"))
-+ ; FIXME: vector->list
-+ (vector->list frag-table)))
-+
-+ "\
-+ { @PREFIX@_FRAG_MAX, 0 }
-+ };
-+
-+ if (! @prefix@_idesc::idesc_table_initialized_p)
-+ {
-+ // Several tables are in play here:
-+ // idesc table: const table of misc things for each insn
-+ // frag usage table: const set of frags used by each insn
-+ // frag label table: same as frag usage table, but contains labels
-+ // selected insn frag table: table of pointers to either the frag usage
-+ // table (if !gnuc) or frag label table (if gnuc) for the currently
-+ // selected ISA. Insns not in the ISA are redirected to the `invalid'
-+ // insn handler. FIXME: This one isn't implemented yet.
-+
-+ // Allocate frag label table and point idesc table entries at it.
-+ // FIXME: Temporary hack, to be redone.
-+ static void** frag_label_table;
-+ int max_insns = @PREFIX@_INSN_" (/last-insn) " + 1;
-+ int tabsize = max_insns * 4;
-+ frag_label_table = new void* [tabsize];
-+ memset (frag_label_table, 0, sizeof (void*) * tabsize);
-+ int i;
-+ void** v;
-+ for (i = 0, v = frag_label_table; i < max_insns; ++i)
-+ {
-+ @prefix@_idesc::idesc_table[@prefix@_frag_usage[i].itype].cgoto.frags = v;
-+ for (int j = 0; @prefix@_frag_usage[i].ftype[j] != @PREFIX@_FRAG_LIST_END; ++j)
-+ *v++ = labels[@prefix@_frag_usage[i].ftype[j]].label;
-+ }
-+
-+ // Initialize the compiler virtual insn.
-+ // FIXME: Also needed if !gnuc.
-+ current_cpu->@prefix@_engine.compile_begin_insn (current_cpu);
-+
-+ @prefix@_idesc::idesc_table_initialized_p = true;
-+ }
-+}
-+#endif
-+
-+#ifdef __GNUC__
-+#define CASE(X) case_##X
-+// Branch to next handler without going around main loop.
-+#define NEXT_INSN(vpc, fragpc) fragpc = vpc->execute.cgoto.frags; goto * *fragpc
-+#define NEXT_FRAG(fragpc) ++fragpc; goto * *fragpc
-+// Break out of threaded interpreter and return to \"main loop\".
-+#define BREAK(vpc) goto end_switch
-+#else
-+#define CASE(X) case @PREFIX@_##X
-+#define NEXT_INSN(vpc, fragpc) fragpc = vpc->idesc->frags; goto restart
-+#define NEXT_FRAG(fragpc) ++fragpc; goto restart
-+#define BREAK(vpc) break
-+#endif
-+
-+ // Get next insn to execute.
-+ vpc = current_cpu->@prefix@_engine.get_next_vpc (current_cpu->h_pc_get ());
-+
-+ {
-+ // These two are used to pass data from cti insns to the cti-chain insn.
-+ PCADDR pbb_br_npc;
-+ branch_status pbb_br_status;
-+ // These two are used to build up values of the previous two.
-+ PCADDR npc;
-+ branch_status br_status;
-+ // Top level locals moved here so they're usable by multiple fragments.
-+"
-+
-+ (lambda ()
-+ (string-write-map (lambda (local)
-+ (string-append " "
-+ (mode:c-type (cadr local))
-+ " "
-+ (caddr local)
-+ ";\n"))
-+ locals))
-+
-+ "\
-+
-+restart:
-+#ifdef __GNUC__
-+ fragpc = vpc->execute.cgoto.frags;
-+ goto * *fragpc;
-+#else
-+ fragpc = vpc->idesc->frags;
-+ switch (*fragpc)
-+#endif
-+
-+ {
-+
-+"
-+
-+ (lambda ()
-+ ; Turn parallel execution support off.
-+ ; ??? Still needed?
-+ (set-with-parallel?! #f)
-+ (string-write-map (lambda (frag)
-+ (/gen-sfrag-case frag locals))
-+ ; FIXME: vector->list
-+ (vector->list frag-table)))
-+
-+ "
-+#ifdef __GNUC__
-+ end_switch: ;
-+#else
-+ default: abort ();
-+#endif
-+ }
-+ }
-+
-+ // Save vpc for next time.
-+ current_cpu->@prefix@_engine.set_next_vpc (vpc);
-+}
-+\n")
-+)
-+
-+(define (/gen-sfrag-engine)
-+ (string-write
-+ (lambda ()
-+ (/gen-sfrag-engine-frag-table (sim-sfrag-insn-list)
-+ (sim-sfrag-frag-table)
-+ (sim-sfrag-usage-table)))
-+ (lambda ()
-+ (/gen-sfrag-engine-fn (sim-sfrag-frag-table)
-+ (/frag-convert-c-locals (sim-sfrag-locals-list))))
-+ )
-+)
-+
-+; Generate sem-switch.cxx.
-+
-+(define (cgen-sem-switch.cxx)
-+ (logit 1 "Generating " (gen-cpu-name) "-sem-switch.cxx ...\n")
-+
-+ (sim-analyze-insns!)
-+ (if (with-sem-frags?)
-+ (sim-sfrag-analyze-insns!))
-+
-+ ; Turn parallel execution support off.
-+ ; It is later turned on/off when generating the actual semantic code.
-+ (set-with-parallel?! #f)
-+
-+ ; Tell the rtx->c translator we are the simulator.
-+ (rtl-c-config! #:rtl-cover-fns? #t)
-+
-+ ; Indicate we're currently generating a pbb engine.
-+ (set-current-pbb-engine?! #t)
-+
-+ (string-write
-+ (gen-c-copyright "Simulator instruction semantics for @prefix@."
-+ copyright-red-hat package-red-hat-simulators)
-+ "\
-+
-+#include \"@cpu@.h\"
-+
-+using namespace @cpu@; // FIXME: namespace organization still wip
-+
-+#define GET_ATTR(name) GET_ATTR_##name ()
-+
-+\n"
-+
-+ (if (with-sem-frags?)
-+ /gen-sfrag-engine-decls
-+ "")
-+
-+ (if (with-sem-frags?)
-+ /gen-sfrag-engine
-+ /gen-sem-switch-engine)
-+ )
-+)
-diff -Nur binutils-2.24.orig/cgen/sid-decode.scm binutils-2.24/cgen/sid-decode.scm
---- binutils-2.24.orig/cgen/sid-decode.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/sid-decode.scm 2016-06-30 21:26:12.673893890 +0200
-@@ -0,0 +1,755 @@
-+; Decoder generation.
-+; Copyright (C) 2000, 2002, 2003, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+
-+; Return decode entries for each insn.
-+; ??? At one point we generated one variable per instruction rather than one
-+; big array. It doesn't matter too much (yet). Generating one big array is
-+; simpler.
-+
-+(define (/gen-decode-insn-globals insn-list)
-+ ; Print the higher detailed stuff at higher verbosity.
-+ (logit 2 "Processing decode insn globals ...\n")
-+
-+ (let* ((all-attrs (current-insn-attr-list))
-+ (last-insn (string-upcase (gen-c-symbol (caar (list-take -1
-+ (gen-obj-list-enums (non-multi-insns (current-insn-list)))))))))
-+
-+ (string-write
-+ "
-+// The instruction descriptor array.
-+\n"
-+
-+ (if (with-pbb?)
-+ "\
-+// Have label pointers been initialized?
-+// XXX: Note that this is also needed by when semantics are implemented as
-+// functions to handle machine variants.
-+bool @prefix@_idesc::idesc_table_initialized_p = false;\n\n"
-+ "")
-+
-+ "\
-+@prefix@_idesc @prefix@_idesc::idesc_table[@PREFIX@_INSN_" last-insn " + 1] =
-+{\n"
-+
-+ (string-map
-+ (lambda (insn)
-+ (let ((name (gen-sym insn))
-+ (sfmt (insn-sfmt insn))
-+ (pbb? (obj-has-attr? insn 'PBB))
-+ (virtual? (obj-has-attr? insn 'VIRTUAL)))
-+ (string-append
-+ " { "
-+ (if (with-pbb?)
-+ "0, "
-+ "")
-+ (if (with-scache?)
-+ (if pbb?
-+ "0, "
-+ (string-append (/gen-sem-fn-name insn) ", "))
-+ "")
-+ "\"" (string-upcase name) "\", "
-+ (gen-cpu-insn-enum (current-cpu) insn)
-+ ", "
-+ (gen-obj-attr-sid-defn 'insn insn all-attrs)
-+ " },\n")))
-+ insn-list)
-+
-+ "\n};\n\n"
-+ ))
-+)
-+
-+; Return a function that lookups up virtual insns.
-+
-+(define (/gen-virtual-insn-finder)
-+ (string-list
-+ "\
-+// Given a canonical virtual insn id, return the target specific one.
-+
-+@prefix@_insn_type
-+@prefix@_idesc::lookup_virtual (virtual_insn_type vit)
-+{
-+ switch (vit)
-+ {
-+ case VIRTUAL_INSN_INVALID: return @PREFIX@_INSN_X_INVALID;
-+"
-+
-+ (if (with-pbb?)
-+ "\
-+ case VIRTUAL_INSN_BEGIN: return @PREFIX@_INSN_X_BEGIN;
-+ case VIRTUAL_INSN_CHAIN: return @PREFIX@_INSN_X_CHAIN;
-+ case VIRTUAL_INSN_CTI_CHAIN: return @PREFIX@_INSN_X_CTI_CHAIN;
-+ case VIRTUAL_INSN_BEFORE: return @PREFIX@_INSN_X_BEFORE;
-+ case VIRTUAL_INSN_AFTER: return @PREFIX@_INSN_X_AFTER;
-+"
-+ "")
-+ (if (and (with-pbb?)
-+ (state-conditional-exec?))
-+ "\
-+ case VIRTUAL_INSN_COND: return @PREFIX@_INSN_X_COND;
-+"
-+ ; Unused, but may still be requested. Just return X_INVALID.
-+ "\
-+ case VIRTUAL_INSN_COND: return @PREFIX@_INSN_X_INVALID;
-+")
-+ "\
-+ }
-+ abort ();
-+}\n\n"
-+ )
-+)
-+
-+; Return enum name of format FMT.
-+
-+(define (/gen-fmt-enum fmt)
-+ (string-upcase (gen-sym fmt))
-+)
-+
-+; Return names of semantic fns for INSN.
-+; ??? Make global, call from gen-semantic-fn, blah blah blah.
-+
-+(define (/gen-sem-fn-name insn)
-+ (string-append "@prefix@_sem_" (gen-sym insn))
-+)
-+
-+; Return decls of each semantic fn.
-+
-+(define (/gen-sem-fn-decls)
-+ (string-write
-+ "// Decls of each semantic fn.\n\n"
-+ "using @cpu@::@prefix@_sem_fn;\n"
-+ (string-list-map (lambda (insn)
-+ (string-list "extern @prefix@_sem_fn "
-+ (/gen-sem-fn-name insn)
-+ ";\n"))
-+ (scache-engine-insns))
-+ "\n"
-+ )
-+)
-+
-+
-+
-+
-+; idesc, argbuf, and scache types
-+
-+; Generate decls for the insn descriptor table type IDESC.
-+
-+(define (/gen-idesc-decls)
-+ (string-append
-+ "
-+// Forward decls.
-+struct @cpu@_cpu;
-+struct @prefix@_scache;
-+"
-+ (if (with-parallel?)
-+ "typedef void (@prefix@_sem_fn) (@cpu@_cpu* cpu, @prefix@_scache* sem, int tick, @prefix@::write_stacks &buf);"
-+ "typedef sem_status (@prefix@_sem_fn) (@cpu@_cpu* cpu, @prefix@_scache* sem);")
-+ "\n"
-+ "\n"
-+"
-+// Instruction descriptor.
-+
-+struct @prefix@_idesc {
-+\n"
-+
-+ (if (with-pbb?)
-+ "\
-+ // computed-goto label pointer (pbb engine)
-+ // FIXME: frag case to be redone (should instead point to usage table).
-+ cgoto_label cgoto;\n\n"
-+ "")
-+
-+ (if (with-scache?)
-+ "\
-+ // scache engine executor for this insn
-+ @prefix@_sem_fn* execute;\n\n"
-+ "")
-+
-+ "\
-+ const char* insn_name;
-+ enum @prefix@_insn_type sem_index;
-+ @arch@_insn_attr attrs;
-+
-+ // idesc table: indexed by sem_index
-+ static @prefix@_idesc idesc_table[];
-+"
-+
-+ (if (with-pbb?)
-+ "\
-+
-+ // semantic label pointers filled_in?
-+ static bool idesc_table_initialized_p;\n"
-+ "")
-+
-+ "\
-+
-+ static @prefix@_insn_type lookup_virtual (virtual_insn_type vit);
-+};
-+
-+")
-+)
-+
-+; Utility of /gen-argbuf-fields-union to generate the definition for
-+; <sformat-abuf> SBUF.
-+
-+(define (/gen-argbuf-elm sbuf)
-+ (logit 2 "Processing sbuf format " (obj:name sbuf) " ...\n")
-+ (string-list
-+ " struct { /* " (obj:comment sbuf) " */\n"
-+ (let ((elms (sbuf-elms sbuf)))
-+ (if (null? elms)
-+ " int empty;\n"
-+ (string-list-map (lambda (elm)
-+ (string-append " "
-+ (cadr elm)
-+ " "
-+ (car elm)
-+ ";\n"))
-+ (sbuf-elms sbuf))))
-+ " } " (gen-sym sbuf) ";\n")
-+)
-+
-+; Utility of /gen-scache-decls to generate the union of extracted ifields.
-+
-+(define (/gen-argbuf-fields-union)
-+ (string-list
-+ "\
-+// Instruction argument buffer.
-+
-+union @prefix@_sem_fields {\n"
-+ (string-list-map /gen-argbuf-elm (current-sbuf-list))
-+ "\
-+ // This one is for chain/cti-chain virtual insns.
-+ struct {
-+ // Number of insns in pbb.
-+ unsigned insn_count;
-+ // This is used by chain insns and by untaken conditional branches.
-+ @prefix@_scache* next;
-+ @prefix@_scache* branch_target;
-+ } chain;
-+ // This one is for `before' virtual insns.
-+ struct {
-+ // The cache entry of the real insn.
-+ @prefix@_scache* insn;
-+ } before;
-+};\n\n"
-+ )
-+)
-+
-+(define (/gen-scache-decls)
-+ (string-list
-+ (/gen-argbuf-fields-union)
-+ "\
-+// Simulator instruction cache.
-+
-+struct @prefix@_scache {
-+ // executor
-+ union {
-+ cgoto_label cgoto;
-+ @prefix@_sem_fn* fn;
-+ } execute;
-+\n"
-+
-+ (if (state-conditional-exec?)
-+ "\
-+ // condition
-+ UINT cond;
-+\n"
-+ "")
-+
-+ "\
-+ // PC of this instruction.
-+ PCADDR addr;
-+
-+ // instruction class
-+ @prefix@_idesc* idesc;
-+
-+ // argument buffer
-+ @prefix@_sem_fields fields;
-+
-+" (if (with-any-profile?)
-+ (string-append "
-+ // writeback flags
-+ // Only used if profiling or parallel execution support enabled during
-+ // file generation.
-+ unsigned long long written;
-+")
-+ "") "
-+
-+ // decode given instruction
-+ void decode (@cpu@_cpu* current_cpu, PCADDR pc, @prefix@_insn_word base_insn, @prefix@_insn_word entire_insn);
-+};
-+
-+")
-+)
-+
-+; Instruction field extraction support.
-+; Two implementations are provided, one for !with-scache and one for
-+; with-scache.
-+;
-+; Extracting ifields is a three phase process. First the ifields are
-+; extracted and stored in local variables. Then any ifields requiring
-+; additional processing for operands are handled. Then in the with-scache
-+; case the results are stored in a struct for later retrieval by the semantic
-+; code.
-+;
-+; The !with-scache case does this processing in the semantic function,
-+; except it doesn't need the last step (it doesn't need to store the results
-+; in a struct for later use).
-+;
-+; The with-scache case extracts the ifields in the decode function.
-+; Furthermore, we use <sformat-argbuf> to reduce the quantity of structures
-+; created (this helps semantic-fragment pbb engines).
-+
-+; Return C code to record <ifield> F for the semantic handler
-+; in a local variable rather than an ARGBUF struct.
-+
-+(define (/gen-record-argbuf-ifld f sfmt)
-+ (string-append " " (gen-ifld-argbuf-ref f)
-+ " = " (gen-extracted-ifld-value f) ";\n")
-+)
-+
-+; Return three of arguments to TRACE:
-+; string argument to fprintf, character indicating type of third arg, value.
-+; The type is one of: x.
-+
-+(define (/gen-trace-argbuf-ifld f sfmt)
-+ (string-append
-+ ; FIXME: Add method to return fprintf format string.
-+ ", \"" (gen-sym f) " 0x%x\""
-+ ", 'x'"
-+ ", " (gen-extracted-ifld-value f))
-+)
-+
-+; Instruction field extraction support cont'd.
-+; Hardware support.
-+
-+; gen-extract method.
-+; For the default case we use the ifield as is, which is output elsewhere.
-+
-+(method-make!
-+ <hardware-base> 'gen-extract
-+ (lambda (self op sfmt local?)
-+ "")
-+)
-+
-+; gen-trace-extract method.
-+; Return appropriate arguments for TRACE_EXTRACT.
-+
-+(method-make!
-+ <hardware-base> 'gen-trace-extract
-+ (lambda (self op sfmt)
-+ "")
-+)
-+
-+; Extract the necessary fields into ARGBUF.
-+
-+(method-make!
-+ <hw-register> 'gen-extract
-+ (lambda (self op sfmt local?)
-+ (if (hw-cache-addr? self)
-+ (string-append " "
-+ (if local?
-+ (gen-hw-index-argbuf-name (op:index op))
-+ (gen-hw-index-argbuf-ref (op:index op)))
-+ " = & "
-+ (gen-cpu-ref (hw-isas self) (gen-sym (op:type op)))
-+ (gen-array-ref (gen-extracted-ifld-value (op-ifield op)))
-+ ";\n")
-+ ""))
-+)
-+
-+; Return appropriate arguments for TRACE_EXTRACT.
-+
-+(method-make!
-+ <hw-register> 'gen-trace-extract
-+ (lambda (self op sfmt)
-+ (if (hw-cache-addr? self)
-+ (string-append
-+ ; FIXME: Add method to return fprintf format string.
-+ ", \"" (gen-sym op) " 0x%x\""
-+ ", 'x'"
-+ ", " (gen-extracted-ifld-value (op-ifield op)))
-+ ""))
-+)
-+
-+; Extract the necessary fields into ARGBUF.
-+
-+(method-make!
-+ <hw-address> 'gen-extract
-+ (lambda (self op sfmt local?)
-+ (string-append " "
-+ (if local?
-+ (gen-hw-index-argbuf-name (op:index op))
-+ (gen-hw-index-argbuf-ref (op:index op)))
-+ " = "
-+ (gen-extracted-ifld-value (op-ifield op))
-+ ";\n"))
-+)
-+
-+; Return appropriate arguments for TRACE_EXTRACT.
-+
-+(method-make!
-+ <hw-address> 'gen-trace-extract
-+ (lambda (self op sfmt)
-+ (string-append
-+ ; FIXME: Add method to return fprintf format string.
-+ ", \"" (gen-sym op) " 0x%x\""
-+ ", 'x'"
-+ ", " (gen-extracted-ifld-value (op-ifield op))))
-+)
-+
-+; Instruction field extraction support cont'd.
-+; Operand support.
-+
-+; Return C code to record the field for the semantic handler.
-+; In the case of a register, this is usually the address of the register's
-+; value (if CACHE-ADDR).
-+; LOCAL? indicates whether to record the value in a local variable or in
-+; the ARGBUF struct.
-+; ??? Later allow target to provide an `extract' expression.
-+
-+(define (/gen-op-extract op sfmt local?)
-+ (send (op:type op) 'gen-extract op sfmt local?)
-+)
-+
-+; Return three of arguments to TRACE_EXTRACT:
-+; string argument to fprintf, character indicating type of third arg, value.
-+; The type is one of: x.
-+
-+(define (/gen-op-trace-extract op sfmt)
-+ (send (op:type op) 'gen-trace-extract op sfmt)
-+)
-+
-+; Return C code to define local vars to hold processed ifield data for
-+; <sformat> SFMT.
-+; This is used when !with-scache.
-+; Definitions of the extracted ifields is handled elsewhere.
-+
-+(define (gen-sfmt-op-argbuf-defns sfmt)
-+ (let ((operands (sfmt-extracted-operands sfmt)))
-+ (logit 3 "sfmt = " (obj:name sfmt) " operands=" (string-map obj:name operands))
-+ (string-list-map (lambda (op)
-+ (let ((var-spec (sfmt-op-sbuf-elm op sfmt)))
-+ (if var-spec
-+ (string-append " "
-+ (cadr var-spec)
-+ " "
-+ (car var-spec)
-+ ";\n")
-+ "")))
-+ operands))
-+)
-+
-+; Return C code to assign values to the local vars that hold processed ifield
-+; data for <sformat> SFMT.
-+; This is used when !with-scache.
-+; Assignment of the extracted ifields is handled elsewhere.
-+
-+(define (gen-sfmt-op-argbuf-assigns sfmt)
-+ (let ((operands (sfmt-extracted-operands sfmt)))
-+ (string-list-map (lambda (op)
-+ (/gen-op-extract op sfmt #t))
-+ operands))
-+)
-+
-+; Instruction field extraction support cont'd.
-+; Emit extraction section of decode function.
-+
-+; Return C code to record insn field data for <sformat> SFMT.
-+; This is used when with-scache.
-+
-+(define (/gen-record-args sfmt)
-+ (let ((operands (sfmt-extracted-operands sfmt))
-+ (iflds (sfmt-needed-iflds sfmt)))
-+ (string-list
-+ " /* Record the fields for the semantic handler. */\n"
-+ (string-list-map (lambda (f) (/gen-record-argbuf-ifld f sfmt))
-+ iflds)
-+ (string-list-map (lambda (op) (/gen-op-extract op sfmt #f))
-+ operands)
-+ " if (UNLIKELY(current_cpu->trace_extract_p))\n"
-+ " {\n"
-+ " current_cpu->trace_stream \n"
-+ " << \"0x\" << hex << pc << dec << \" (" (gen-sym sfmt) ")\\t\"\n"
-+ ; NB: The following is not necessary any more, as the ifield list
-+ ; is a subset of the operand list.
-+ ; (string-list-map (lambda (f)
-+ ; (string-list
-+ ; " << \" " (gen-sym f) ":0x\" << hex << " (gen-sym f) " << dec\n"))
-+ ; iflds)
-+ (string-list-map (lambda (ifld)
-+ (string-list
-+ " << \" " (gen-extracted-ifld-value ifld) ":0x\" << hex << "
-+ ; Add (SI) or (USI) cast for byte-wide data, to prevent C++ iostreams
-+ ; from printing byte as plain raw char.
-+ (cond ((not ifld) "")
-+ ((mode:eq? 'QI (ifld-decode-mode ifld)) "(SI) ")
-+ ((mode:eq? 'UQI (ifld-decode-mode ifld)) "(USI) ")
-+ (else ""))
-+ (gen-extracted-ifld-value ifld)
-+ " << dec\n"))
-+ iflds)
-+ " << endl;\n"
-+ " }\n"
-+ ))
-+)
-+
-+; Return C code to record insn field data for profiling.
-+; Also recorded are operands not mentioned in the fields but mentioned
-+; in the semantic code.
-+;
-+; FIXME: Register usage may need to be tracked as an array of longs.
-+; If there are more than 32 regs, we can't know which until build time.
-+; ??? For now we only handle reg sets of 32 or less.
-+;
-+; ??? The other way to obtain register numbers is to defer computing them
-+; until they're actually needed. It will speed up execution when not doing
-+; profiling, though the speed up is only for the extraction phase.
-+; On the other hand the current way has one memory reference per register
-+; number in the profiling routines. For RISC this can be a lose, though for
-+; more complicated instruction sets it could be a win as all the computation
-+; is kept to the extraction phase. If someone wants to put forth some real
-+; data, this might then be changed (or at least noted).
-+
-+(define (/gen-record-profile-args sfmt)
-+ (let ((in-ops (find op-profilable? (sfmt-in-ops sfmt)))
-+ (out-ops (find op-profilable? (sfmt-out-ops sfmt)))
-+ )
-+ (if (or (not (with-any-profile?)) (and (null? in-ops) (null? out-ops)))
-+ ""
-+ (string-list
-+ " /* Record the fields for profiling. */\n"
-+ " if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p))\n"
-+ " {\n"
-+ (string-list-map (lambda (op) (op:record-profile op sfmt #f))
-+ in-ops)
-+ (string-list-map (lambda (op) (op:record-profile op sfmt #t))
-+ out-ops)
-+ " }\n"
-+ )))
-+)
-+
-+; Return C code that extracts the fields of <sformat> SFMT.
-+;
-+; Extraction is based on formats to reduce the amount of code generated.
-+; However, we also need to emit code which records the hardware elements used
-+; by the semantic code. This is currently done by recording this information
-+; with the format.
-+
-+(define (/gen-extract-fn sfmt)
-+ (logit 2 "Processing extractor for \"" (sfmt-key sfmt) "\" ...\n")
-+ (string-list
-+ "void
-+@prefix@_extract_" (gen-sym sfmt) " (@prefix@_scache* abuf, @cpu@_cpu* current_cpu, PCADDR pc, @prefix@_insn_word base_insn, @prefix@_insn_word entire_insn)"
-+ "{\n"
-+ " @prefix@_insn_word insn = "
-+ (if (adata-integral-insn? CURRENT-ARCH)
-+ "entire_insn;\n"
-+ "base_insn;\n")
-+ (gen-define-field-macro sfmt)
-+ (gen-define-ifields (sfmt-iflds sfmt) (sfmt-length sfmt) " " #f)
-+ "\n"
-+ (gen-extract-ifields (sfmt-iflds sfmt) (sfmt-length sfmt) " " #f)
-+ "\n"
-+ (/gen-record-args sfmt)
-+ "\n"
-+ (/gen-record-profile-args sfmt)
-+ (gen-undef-field-macro sfmt)
-+ "}\n\n"
-+ )
-+)
-+
-+; For each format, return its extraction function.
-+
-+(define (/define-all-extractor-fns)
-+ (logit 2 "Processing extractor fn bodies ...\n")
-+ (string-list-map /gen-extract-fn (current-sfmt-list))
-+)
-+
-+(define (/declare-all-extractor-fns)
-+ (logit 2 "Processing extractor fn declarations ...\n")
-+ (string-map (lambda (sfmt)
-+ (string-append "
-+static void
-+@prefix@_extract_" (gen-sym sfmt) " (@prefix@_scache* abuf, @cpu@_cpu* current_cpu, PCADDR pc, @prefix@_insn_word base_insn, @prefix@_insn_word entire_insn);"))
-+ (current-sfmt-list))
-+)
-+
-+
-+; Generate top level decoder.
-+; INITIAL-BITNUMS is a target supplied list of bit numbers to use to
-+; build the first decode table. If nil, we compute 8 bits of it (FIXME)
-+; ourselves.
-+; LSB0? is non-#f if bit number 0 is the least significant bit.
-+
-+(define (/gen-decode-fn insn-list initial-bitnums lsb0?)
-+ (assert (with-scache?))
-+
-+ ; Compute the initial DECODE-BITSIZE as the minimum of all insn lengths.
-+ ; The caller of @prefix@_decode must fetch and pass exactly this number of bits
-+ ; of the instruction.
-+ ; ??? Make this a parameter later but only if necessary.
-+
-+ (let ((decode-bitsize (state-base-insn-bitsize)))
-+
-+ ; Compute INITIAL-BITNUMS if not supplied.
-+ ; 0 is passed for the start bit (it is independent of lsb0?)
-+ (if (null? initial-bitnums)
-+ (set! initial-bitnums
-+ (if (= 0 (length insn-list))
-+ (list 0) ; dummy value
-+ (decode-get-best-bits insn-list nil
-+ 0 ; startbit
-+ 8 ; max
-+ decode-bitsize
-+ lsb0?))))
-+
-+ ; All set. gen-decoder does the hard part, we just print out the result.
-+ (let ((decode-code (gen-decoder insn-list initial-bitnums
-+ decode-bitsize
-+ " " lsb0?
-+ (current-insn-lookup 'x-invalid #f)
-+ #t)))
-+
-+ (string-write
-+ "
-+// Declare extractor functions
-+"
-+ /declare-all-extractor-fns
-+
-+ "
-+
-+// Fetch & decode instruction
-+void
-+@prefix@_scache::decode (@cpu@_cpu* current_cpu, PCADDR pc, @prefix@_insn_word base_insn, @prefix@_insn_word entire_insn)
-+{
-+ /* Result of decoder. */
-+ @PREFIX@_INSN_TYPE itype;
-+
-+ {
-+ @prefix@_insn_word insn = base_insn;
-+\n"
-+ decode-code
-+ "
-+ }
-+
-+ /* The instruction has been decoded and fields extracted. */
-+ done:
-+"
-+ (if (state-conditional-exec?)
-+ (let ((cond-ifld (current-ifld-lookup (car (isa-condition (current-isa))))))
-+ (string-append
-+ " {\n"
-+ (gen-ifld-extract-decl cond-ifld " " #f)
-+ (gen-ifld-extract cond-ifld " "
-+ (state-base-insn-bitsize)
-+ (state-base-insn-bitsize)
-+ "base_insn" nil #f)
-+ " this->cond = " (gen-sym cond-ifld) ";\n"
-+ " }\n"))
-+ "")
-+
-+ "
-+ this->addr = pc;
-+ // FIXME: To be redone (to handle ISA variants).
-+ this->idesc = & @prefix@_idesc::idesc_table[itype];
-+ // ??? record semantic handler?
-+ assert(this->idesc->sem_index == itype);
-+}
-+
-+"
-+
-+ /define-all-extractor-fns
-+ )))
-+)
-+
-+; Entry point. Generate decode.h.
-+
-+(define (cgen-decode.h)
-+ (logit 1 "Generating " (gen-cpu-name) "-decode.h ...\n")
-+
-+ (sim-analyze-insns!)
-+
-+ ; Turn parallel execution support on if cpu needs it.
-+ (set-with-parallel?! (state-parallel-exec?))
-+
-+ (string-write
-+ (gen-c-copyright "Decode header for @prefix@."
-+ copyright-red-hat package-red-hat-simulators)
-+ "\
-+#ifndef @PREFIX@_DECODE_H
-+#define @PREFIX@_DECODE_H
-+
-+"
-+ (if (with-parallel?)
-+ "\
-+namespace @prefix@ {
-+// forward declaration of struct in -defs.h
-+struct write_stacks;
-+}
-+
-+"
-+ "")
-+"\
-+namespace @cpu@ {
-+
-+using namespace cgen;
-+using namespace @arch@;
-+
-+typedef UINT @prefix@_insn_word;
-+
-+"
-+ (lambda () (gen-cpu-insn-enum-decl (current-cpu)
-+ (non-multi-insns (non-alias-insns (current-insn-list)))))
-+ /gen-idesc-decls
-+ /gen-scache-decls
-+
-+ "\
-+} // end @cpu@ namespace
-+\n"
-+
-+ ; ??? The semantic functions could go in the cpu's namespace.
-+ ; There's no pressing need for it though.
-+ (if (with-scache?)
-+ /gen-sem-fn-decls
-+ "")
-+
-+ "\
-+#endif /* @PREFIX@_DECODE_H */\n"
-+ )
-+)
-+
-+; Entry point. Generate decode.cxx.
-+
-+(define (cgen-decode.cxx)
-+ (logit 1 "Generating " (gen-cpu-name) "-decode.cxx ...\n")
-+
-+ (sim-analyze-insns!)
-+
-+ ; Turn parallel execution support on if cpu needs it.
-+ (set-with-parallel?! (state-parallel-exec?))
-+
-+ ; Tell the rtx->c translator we are the simulator.
-+ (rtl-c-config! #:rtl-cover-fns? #t)
-+
-+ (string-write
-+ (gen-c-copyright "Simulator instruction decoder for @prefix@."
-+ copyright-red-hat package-red-hat-simulators)
-+ "\
-+
-+#if HAVE_CONFIG_H
-+#include \"config.h\"
-+#endif
-+#include \"@cpu@.h\"
-+
-+using namespace @cpu@; // FIXME: namespace organization still wip
-+\n"
-+
-+ (lambda () (/gen-decode-insn-globals (non-multi-insns (non-alias-insns (current-insn-list)))))
-+ /gen-virtual-insn-finder
-+ (lambda () (/gen-decode-fn (real-insns (current-insn-list))
-+ (state-decode-assist)
-+ (current-arch-insn-lsb0?)))
-+ )
-+)
-diff -Nur binutils-2.24.orig/cgen/sid-model.scm binutils-2.24/cgen/sid-model.scm
---- binutils-2.24.orig/cgen/sid-model.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/sid-model.scm 2016-06-30 21:26:12.673893890 +0200
-@@ -0,0 +1,548 @@
-+; Simulator model support, plus misc. things associated with a cpu family.
-+; Copyright (C) 2000, 2002, 2003, 2006, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+
-+(define (unit:enum u)
-+ (gen-c-symbol (string-append "UNIT_"
-+ (string-upcase (obj:str-name u))))
-+)
-+
-+; Return C code to define cpu implementation properties.
-+
-+(define (/gen-cpu-imp-properties)
-+ (string-list
-+ "\
-+/* The properties of this cpu's implementation. */
-+
-+static const MACH_IMP_PROPERTIES @cpu@_imp_properties =
-+{
-+ sizeof (@cpu@_cpu),
-+#if WITH_SCACHE
-+ sizeof (SCACHE)
-+#else
-+ 0
-+#endif
-+};\n\n"
-+ )
-+)
-+
-+; Insn modeling support.
-+
-+; Generate code to profile hardware elements.
-+; ??? Not currently used.
-+
-+(define (/gen-hw-profile-code)
-+ ; Fetch profilable input and output operands of the semantic code.
-+ (let ((in-ops (find op-profilable? (sfmt-in-ops (insn-sfmt insn))))
-+ (out-ops (find op-profilable? (sfmt-out-ops (insn-sfmt insn)))))
-+ (string-list
-+ ; For each operand, record its being get/set.
-+ (string-list-map (lambda (op) (send op 'gen-profile-code insn #f))
-+ in-ops)
-+ (string-list-map (lambda (op) (send op 'gen-profile-code insn #t))
-+ out-ops)
-+ ))
-+)
-+
-+; Return decls of hardware element profilers.
-+; ??? Not currently used.
-+
-+(define (/gen-hw-profile-decls)
-+ (string-list
-+ "/* Hardware profiling handlers. */\n\n"
-+ (string-list-map (lambda (hw)
-+ (string-append "extern void @prefix@_model_mark_get_"
-+ (gen-sym hw) " (@cpu@_cpu *"
-+ (if (hw-scalar? hw)
-+ ""
-+ ", int") ; FIXME: get index type
-+ ");\n"
-+ "extern void @prefix@_model_mark_set_"
-+ (gen-sym hw) " (@cpu@_cpu *"
-+ (if (hw-scalar? hw)
-+ ""
-+ ", int") ; FIXME: get index type
-+ ");\n"))
-+ (find hw-profilable? (current-hw-list)))
-+ "\n"
-+ )
-+)
-+
-+; Return the name of the class representing the given MODEL.
-+(define (gen-model-class-name model)
-+ (string-append "@prefix@_" (gen-sym model) "_model")
-+)
-+
-+; Return name of profiling handler for MODEL, UNIT.
-+; Also called by sim.scm.
-+
-+(define (gen-model-unit-fn-name model unit when)
-+ (string-append "model_" (gen-sym unit) "_" (symbol->string when))
-+)
-+
-+(define (gen-model-unit-fn-decl model unit when)
-+ (let ((gen-args (lambda (args)
-+ (gen-c-args (map (lambda (arg)
-+ (string-append
-+ (mode:c-type (mode:lookup (cadr arg)))
-+ " /*" (symbol->string (car arg)) "*/"))
-+ (find (lambda (arg)
-+ ; Indices of scalars not passed.
-+ (not (null? (cdr arg))))
-+ args)))))
-+ )
-+ (string-append
-+ " virtual UINT "
-+ (gen-model-unit-fn-name model unit when)
-+ " (@cpu@_cpu *cpu, const struct @prefix@_idesc *idesc,"
-+ " int unit_num"
-+ (if (equal? when 'after)
-+ ", unsigned long long referenced" "")
-+ (gen-args (unit:inputs unit))
-+ (gen-args (unit:outputs unit))
-+ ")\n"))
-+)
-+
-+; Return decls of all insn model handlers.
-+
-+(define (gen-model-fn-decls model)
-+ (string-list
-+ "\n"
-+ "// Function unit handlers\n"
-+ "// To be overridden as needed.\n"
-+ (string-list-map (lambda (unit)
-+ (string-append
-+ (gen-model-unit-fn-decl model unit 'before)
-+ " {\n"
-+ " return 0;\n"
-+ " }\n"
-+ (gen-model-unit-fn-decl model unit 'after)
-+ " {\n"
-+ " return timing[idesc->sem_index].units[unit_num].done;\n"
-+ " }\n"))
-+ (model:units model))
-+ )
-+)
-+
-+; Return name of profile handler for INSN, MODEL.
-+
-+(define (/gen-model-insn-fn-name model insn when)
-+ (string-append "model_" (gen-sym insn) "_" (symbol->string when))
-+)
-+
-+(define (/gen-model-insn-qualified-fn-name model insn when)
-+ (string-append (gen-model-class-name model) "::" (/gen-model-insn-fn-name model insn when))
-+)
-+
-+; Return declaration of function to model INSN.
-+
-+(define (/gen-model-insn-fn-decl model insn when)
-+ (string-list
-+ "UINT "
-+ (/gen-model-insn-fn-name model insn when)
-+ " (@cpu@_cpu *current_cpu, @prefix@_scache *sem);\n"
-+ )
-+)
-+
-+(define (/gen-model-insn-fn-decls model)
-+ (string-list
-+ " // These methods call the appropriate unit modeller(s) for each insn.\n"
-+ (string-list-map
-+ (lambda (insn)
-+ (string-list
-+ " " (/gen-model-insn-fn-decl model insn 'before)
-+ " " (/gen-model-insn-fn-decl model insn 'after)))
-+ (real-insns (current-insn-list)))
-+ )
-+)
-+
-+; Return function to model INSN.
-+
-+(define (/gen-model-insn-fn model insn when)
-+ (logit 2 "Processing modeling for " (obj:name insn) ": \"" (insn-syntax insn) "\" ...\n")
-+ (let ((sfmt (insn-sfmt insn)))
-+ (string-list
-+ "UINT\n"
-+ (/gen-model-insn-qualified-fn-name model insn when)
-+ " (@cpu@_cpu *current_cpu, @prefix@_scache *sem)\n"
-+ "{\n"
-+ (if (with-scache?)
-+ (gen-define-field-macro sfmt)
-+ "")
-+ " const @prefix@_scache* abuf = sem;\n"
-+ " const @prefix@_idesc* idesc = abuf->idesc;\n"
-+ ; or: idesc = & CPU_IDESC (current_cpu) ["
-+ ; (gen-cpu-insn-enum (mach-cpu (model:mach model)) insn)
-+ ; "];\n"
-+ " int cycles = 0;\n"
-+ (send insn 'gen-profile-locals model)
-+ (if (with-scache?)
-+ ""
-+ (string-list
-+ " PCADDR UNUSED pc = current_cpu->hardware.h_pc;\n"
-+ " @prefix@_insn_word insn = abuf->insn;\n"
-+ (gen-define-ifields (sfmt-iflds sfmt) (sfmt-length sfmt) " " #f)
-+ (gen-sfmt-argvars-defns sfmt)
-+ (gen-extract-ifields (sfmt-iflds sfmt) (sfmt-length sfmt) " " #f)
-+ (gen-sfmt-argvars-assigns sfmt)))
-+ ; Emit code to model the insn. Function units are handled here.
-+ (send insn 'gen-profile-code model when "cycles")
-+ " return cycles;\n"
-+ (if (with-scache?)
-+ (gen-undef-field-macro sfmt)
-+ "")
-+ "}\n\n"))
-+)
-+
-+
-+; Return insn modeling handlers.
-+; ??? Might wish to reduce the amount of output by combining identical cases.
-+; ??? Modelling of insns could be table driven, but that puts constraints on
-+; generality.
-+
-+(define (/gen-model-insn-fns)
-+ (string-write
-+ "/* Model handlers for each insn. */\n\n"
-+ (lambda () (string-write-map
-+ (lambda (model)
-+ (string-write
-+ ; Generate the model constructor.
-+ (gen-model-class-name model) "::" (gen-model-class-name model) " (@cpu@_cpu *cpu)\n"
-+ " : cgen_model (cpu)\n"
-+ "{\n"
-+ "}\n"
-+ "\n")
-+ (string-write-map
-+ (lambda (insn)
-+ (string-list
-+ (/gen-model-insn-fn model insn 'before)
-+ (/gen-model-insn-fn model insn 'after)))
-+ (real-insns (current-insn-list))))
-+ (current-model-list)))
-+ )
-+)
-+
-+(define (/gen-model-class-decls model)
-+ (string-append
-+ "\n"
-+ " "
-+ (gen-enum-decl 'unit_number "unit types"
-+ "UNIT_"
-+ (cons '(none)
-+ (append
-+ ; "apply append" squeezes out nils.
-+ (apply append
-+ (list
-+ ; create <model_name>-<unit-name> for each unit
-+ (let ((units (model:units model)))
-+ (if (null? units)
-+ nil
-+ (map (lambda (unit)
-+ (cons (obj:name unit)
-+ (cons '- (atlist-attrs (obj-atlist model)))))
-+ units)))))
-+ '((max)))))
-+ " struct unit {\n"
-+ " unit_number unit;\n"
-+ " UINT issue;\n"
-+ " UINT done;\n"
-+ " };\n\n"
-+
-+ ; FIXME: revisit MAX_UNITS
-+ " static const int MAX_UNITS = "
-+ (number->string
-+ (let ((insn-list (real-insns (current-insn-list))))
-+ (if (null? insn-list)
-+ 1
-+ (apply max
-+ (map (lambda (lengths) (apply max lengths))
-+ (map (lambda (insn)
-+ (let ((timing (insn-timing insn)))
-+ (if (null? timing)
-+ '(1)
-+ (map (lambda (insn-timing)
-+ (if (null? (cdr insn-timing))
-+ '1
-+ (length (timing:units (cdr insn-timing)))))
-+ timing))))
-+ insn-list))))))
-+ ";\n"
-+ )
-+)
-+
-+; Return the C++ class representing the given model.
-+(define (gen-model-class model)
-+ (string-list
-+ "\
-+class " (gen-model-class-name model) " : public cgen_model
-+{
-+public:
-+ " (gen-model-class-name model) " (@cpu@_cpu *cpu);
-+
-+ // Call the proper unit modelling function for the given insn.
-+ UINT model_before (@cpu@_cpu *current_cpu, @prefix@_scache* sem)
-+ {
-+ return (this->*(timing[sem->idesc->sem_index].model_before)) (current_cpu, sem);
-+ }
-+ UINT model_after (@cpu@_cpu *current_cpu, @prefix@_scache* sem)
-+ {
-+ return (this->*(timing[sem->idesc->sem_index].model_after)) (current_cpu, sem);
-+ }
-+"
-+ (gen-model-fn-decls model)
-+ "\
-+
-+protected:
-+"
-+ (/gen-model-insn-fn-decls model)
-+ (/gen-model-class-decls model)
-+"\
-+
-+ typedef UINT (" (gen-model-class-name model) "::*model_function) (@cpu@_cpu* current_cpu, @prefix@_scache* sem);
-+
-+ struct insn_timing {
-+ // This is an integer that identifies this insn.
-+ UINT num;
-+ // Functions to handle insn-specific profiling.
-+ model_function model_before;
-+ model_function model_after;
-+ // Array of function units used by this insn.
-+ unit units[MAX_UNITS];
-+ };
-+
-+ static const insn_timing timing[];
-+};
-+"
-+ )
-+)
-+
-+; Return the C++ classes representing the current list of models.
-+(define (gen-model-classes)
-+ (string-list-map
-+ (lambda (model)
-+ (string-list
-+ "\n"
-+ (gen-model-class model)))
-+ (current-model-list))
-+)
-+
-+; Generate timing table entry for function unit U while executing INSN.
-+; U is a <unit> object.
-+; ARGS is a list of overriding arguments from INSN.
-+
-+(define (/gen-insn-unit-timing model insn u args)
-+ (string-append
-+ "{ "
-+ (gen-model-class-name model) "::" (unit:enum u) ", "
-+ (number->string (unit:issue u)) ", "
-+ (let ((cycles (assq-ref args 'cycles)))
-+ (if cycles
-+ (number->string (car cycles))
-+ (number->string (unit:done u))))
-+ " }, "
-+ )
-+)
-+
-+; Generate timing table entry for MODEL for INSN.
-+
-+(define (/gen-insn-timing model insn)
-+ ; Instruction timing is stored as an associative list based on the model.
-+ (let ((timing (assq (obj:name model) (insn-timing insn))))
-+ ;(display timing) (newline)
-+ (string-list
-+ " { "
-+ (gen-cpu-insn-enum (mach-cpu (model:mach model)) insn)
-+ ", "
-+ (if (obj-has-attr? insn 'VIRTUAL)
-+ "0, 0"
-+ (string-append
-+ "& " (/gen-model-insn-qualified-fn-name model insn 'before) ", "
-+ "& " (/gen-model-insn-qualified-fn-name model insn 'after)))
-+ ", { "
-+ (string-drop
-+ -2
-+ (if (not timing)
-+ (/gen-insn-unit-timing model insn (model-default-unit model) nil)
-+ (let ((units (timing:units (cdr timing))))
-+ (string-map (lambda (iunit)
-+ (/gen-insn-unit-timing model insn
-+ (iunit:unit iunit)
-+ (iunit:args iunit)))
-+ units))))
-+ " } },\n"
-+ ))
-+)
-+
-+; Generate model timing table for MODEL.
-+
-+(define (/gen-model-timing-table model)
-+ (string-write
-+ "/* Model timing data for `" (obj:name model) "'. */\n\n"
-+ "const " (gen-model-class-name model) "::insn_timing " (gen-model-class-name model) "::timing[] = {\n"
-+ (lambda () (string-write-map (lambda (insn) (/gen-insn-timing model insn))
-+ (non-multi-insns (non-alias-insns (current-insn-list)))))
-+ "};\n\n"
-+ )
-+)
-+
-+; Return C code to define model profiling support stuff.
-+
-+(define (/gen-model-profile-data)
-+ (string-write
-+ "/* We assume UNIT_NONE == 0 because the tables don't always terminate\n"
-+ " entries with it. */\n\n"
-+ (lambda () (string-write-map /gen-model-timing-table (current-model-list)))
-+ )
-+)
-+
-+; Return C code to define the model table for MACH.
-+
-+(define (/gen-mach-model-table mach)
-+ (string-list
-+ "\
-+static const MODEL " (gen-sym mach) "_models[] =\n{\n"
-+ (string-list-map (lambda (model)
-+ (string-list " { "
-+ "\"" (obj:name model) "\", "
-+ "& " (gen-sym (model:mach model)) "_mach, "
-+ (model:enum model) ", "
-+ "TIMING_DATA (& "
-+ (gen-sym model)
-+ "_timing[0]), "
-+ (gen-sym model) "_model_init"
-+ " },\n"))
-+ (find (lambda (model) (eq? (obj:name mach)
-+ (obj:name (model:mach model))))
-+ (current-model-list)))
-+ " { 0 }\n"
-+ "};\n\n"
-+ )
-+)
-+
-+; Return C code to define model init fn.
-+
-+(define (/gen-model-init-fn model)
-+ (string-list "\
-+static void\n"
-+(gen-sym model) "_model_init (@cpu@_cpu *cpu)
-+{
-+ cpu->model_data = new @PREFIX@_MODEL_DATA;
-+}\n\n"
-+ )
-+)
-+
-+; Return C code to define model data and support fns.
-+
-+(define (/gen-model-defns)
-+ (string-write
-+ (lambda () (string-write-map /gen-model-init-fn (current-model-list)))
-+ "#if WITH_PROFILE_MODEL_P
-+#define TIMING_DATA(td) td
-+#else
-+#define TIMING_DATA(td) 0
-+#endif\n\n"
-+ (lambda () (string-write-map /gen-mach-model-table (current-mach-list)))
-+ )
-+)
-+
-+; Return C definitions for this cpu family variant.
-+
-+(define (/gen-cpu-defns)
-+ ""
-+)
-+
-+; Return C code to define the machine data.
-+
-+(define (/gen-mach-defns)
-+ (string-list-map
-+ (lambda (mach)
-+ (gen-obj-sanitize
-+ mach
-+ (string-list "\
-+static void\n"
-+(gen-sym mach) "_init_cpu (@cpu@_cpu *cpu)
-+{
-+ @prefix@_init_idesc_table (cpu);
-+}
-+
-+const MACH " (gen-sym mach) "_mach =
-+{
-+ \"" (obj:name mach) "\", "
-+ "\"" (mach-bfd-name mach) "\",
-+ " (number->string (cpu-word-bitsize (mach-cpu mach))) ", "
-+ ; FIXME: addr-bitsize: delete
-+ (number->string (cpu-word-bitsize (mach-cpu mach))) ", "
-+ "& " (gen-sym mach) "_models[0], "
-+ "& " (gen-sym (mach-cpu mach)) "_imp_properties,
-+ " (gen-sym mach) "_init_cpu
-+};
-+
-+")))
-+
-+ (current-mach-list))
-+)
-+
-+; Top level file generators.
-+
-+; Generate model.cxx
-+
-+(define (cgen-model.cxx)
-+ (logit 1 "Generating " (gen-cpu-name) "-model.cxx ...\n")
-+ (assert-keep-one)
-+
-+ ; Turn parallel execution support on if cpu needs it.
-+ (set-with-parallel?! (state-parallel-exec?))
-+
-+ (string-write
-+ (gen-c-copyright "Simulator model support for @prefix@."
-+ copyright-red-hat package-red-hat-simulators)
-+ "\
-+
-+#if HAVE_CONFIG_H
-+#include \"config.h\"
-+#endif
-+#include \"@cpu@.h\"
-+
-+using namespace @cpu@; // FIXME: namespace organization still wip
-+
-+/* The profiling data is recorded here, but is accessed via the profiling
-+ mechanism. After all, this is information for profiling. */
-+
-+"
-+ /gen-model-insn-fns
-+ /gen-model-profile-data
-+; not adapted for sid yet
-+; /gen-model-defns
-+; /gen-cpu-imp-properties
-+; /gen-cpu-defns
-+; /gen-mach-defns
-+ )
-+)
-+
-+(define (cgen-model.h)
-+ (logit 1 "Generating " (gen-cpu-name) "-model.h ...\n")
-+ (assert-keep-one)
-+
-+ (string-write
-+ (gen-c-copyright "Simulator model support for @prefix@."
-+ copyright-red-hat package-red-hat-simulators)
-+ "\
-+#ifndef @PREFIX@_MODEL_H
-+#define @PREFIX@_MODEL_H
-+
-+#include \"cgen-cpu.h\"
-+#include \"cgen-model.h\"
-+
-+namespace @cpu@
-+{
-+using namespace cgen;
-+"
-+ (gen-model-classes)
-+ "\
-+
-+} // namespace @cpu@
-+
-+#endif // @PREFIX@_MODEL_H
-+"
-+ )
-+)
-diff -Nur binutils-2.24.orig/cgen/sid.scm binutils-2.24/cgen/sid.scm
---- binutils-2.24.orig/cgen/sid.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/sid.scm 2016-06-30 21:26:12.673893890 +0200
-@@ -0,0 +1,2035 @@
-+; Simulator generator support routines.
-+; Copyright (C) 2000, 2005, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+
-+; One goal of this file is to provide cover functions for all methods.
-+; i.e. this file fills in the missing pieces of the interface between
-+; the application independent part of CGEN (i.e. the code loaded by read.scm)
-+; and the application dependent part (i.e. sim-*.scm).
-+; `send' is not intended to appear in sim-*.scm.
-+; [It still does but that's to be fixed.]
-+
-+; Specify which application.
-+(set! APPLICATION 'SID-SIMULATOR)
-+
-+; Misc. state info.
-+
-+; Currently supported options:
-+; with-scache
-+; generate code to use the scache engine
-+; with-pbb
-+; generate code to use the pbb engine
-+; with-sem-frags
-+; generate semantic fragment engine (requires with-pbb)
-+; with-profile fn|sw
-+; generate code to do profiling in the semantic function
-+; code (fn) or in the semantic switch (sw)
-+; with-multiple-isa
-+; enable multiple-isa support (e.g. arm+thumb)
-+; ??? wip.
-+; copyright fsf|redhat
-+; emit an FSF or Red Hat copyright (temporary, pending decision)
-+; package gnusim|cygsim
-+; indicate the software package
-+
-+; #t if the scache is being used
-+(define /with-scache? #f)
-+(define (with-scache?) /with-scache?)
-+
-+; #t if we're generating profiling code
-+; Each of the function and switch semantic code can have profiling.
-+; The options as passed are stored in /with-profile-{fn,sw}?, and
-+; /with-profile? is set at code generation time.
-+(define /with-profile-fn? #f)
-+(define /with-profile-sw? #f)
-+(define /with-profile? #f)
-+(define (with-profile?) /with-profile?)
-+(define (with-any-profile?) (or /with-profile-fn? /with-profile-sw?))
-+
-+; #t if multiple isa support is enabled
-+(define /with-multiple-isa? #f)
-+(define (with-multiple-isa?) /with-multiple-isa?)
-+
-+; #t if semantics are generated as pbb computed-goto engine
-+(define /with-pbb? #f)
-+(define (with-pbb?) /with-pbb?)
-+
-+; #t if the semantic fragment engine is to be used.
-+; This involves combining common fragments of each insn into one.
-+(define /with-sem-frags? #f)
-+(define (with-sem-frags?) /with-sem-frags?)
-+
-+; String containing copyright text.
-+(define CURRENT-COPYRIGHT #f)
-+
-+; String containing text defining the package we're generating code for.
-+(define CURRENT-PACKAGE #f)
-+
-+; Initialize the options.
-+
-+(define (option-init!)
-+ (set! /with-scache? #f)
-+ (set! /with-pbb? #f)
-+ (set! /with-sem-frags? #f)
-+ (set! /with-profile-fn? #f)
-+ (set! /with-profile-sw? #f)
-+ (set! /with-multiple-isa? #f)
-+ (set! CURRENT-COPYRIGHT copyright-fsf)
-+ (set! CURRENT-PACKAGE package-gnu-simulators)
-+ *UNSPECIFIED*
-+)
-+
-+; Handle an option passed in from the command line.
-+
-+(define (option-set! name value)
-+ (case name
-+ ((with-scache) (set! /with-scache? #t))
-+ ((with-pbb) (set! /with-pbb? #t))
-+ ((with-sem-frags) (set! /with-sem-frags? #t))
-+ ((with-profile) (cond ((equal? value '("fn"))
-+ (set! /with-profile-fn? #t))
-+ ((equal? value '("sw"))
-+ (set! /with-profile-sw? #t))
-+ (else (error "invalid with-profile value" value))))
-+ ((with-multiple-isa) (set! /with-multiple-isa? #t))
-+ ((copyright) (cond ((equal? value '("fsf"))
-+ (set! CURRENT-COPYRIGHT copyright-fsf))
-+ ((equal? value '("redhat"))
-+ (set! CURRENT-COPYRIGHT copyright-red-hat))
-+ (else (error "invalid copyright value" value))))
-+ ((package) (cond ((equal? value '("gnusim"))
-+ (set! CURRENT-PACKAGE package-gnu-simulators))
-+ ((equal? value '("cygsim"))
-+ (set! CURRENT-PACKAGE package-red-hat-simulators))
-+ (else (error "invalid package value" value))))
-+ (else (error "unknown option" name))
-+ )
-+ *UNSPECIFIED*
-+)
-+
-+; #t if we're currently generating a pbb engine.
-+(define /current-pbb-engine? #f)
-+(define (current-pbb-engine?) /current-pbb-engine?)
-+(define (set-current-pbb-engine?! flag) (set! /current-pbb-engine? flag))
-+
-+; #t if the cpu can execute insns parallely.
-+; This one isn't passed on the command line, but we follow the convention
-+; of prefixing these things with `with-'.
-+; While processing operand reading (or writing), parallel execution support
-+; needs to be turned off, so it is up to the appropriate cgen-foo.c proc to
-+; set-with-parallel?! appropriately.
-+(define /with-parallel? #f)
-+(define (with-parallel?) /with-parallel?)
-+(define (set-with-parallel?! flag) (set! /with-parallel? flag))
-+
-+; Kind of parallel support.
-+; If 'read, read pre-processing is done.
-+; If 'write, write post-processing is done.
-+; ??? At present we always use write post-processing, though the previous
-+; version used read pre-processing. Not sure supporting both is useful
-+; in the long run.
-+(define /with-parallel-kind 'write)
-+; #t if parallel support is provided by read pre-processing.
-+(define (with-parallel-read?)
-+ (and /with-parallel? (eq? /with-parallel-kind 'read))
-+)
-+; #t if parallel support is provided by write post-processing.
-+(define (with-parallel-write?)
-+ (and /with-parallel? (eq? /with-parallel-kind 'write))
-+)
-+
-+; Cover functions for various methods.
-+
-+; Return the C type of something. This isn't always a mode.
-+
-+(define (gen-type self) (send self 'gen-type))
-+
-+; Return the C type of an index's value or #f if not needed (scalar).
-+
-+(define (gen-index-type op sfmt)
-+ (let ((index-mode (send op 'get-index-mode)))
-+ (if index-mode
-+ (mode:c-type index-mode)
-+ #f))
-+)
-+
-+; Misc. utilities.
-+
-+; Return reference to hardware element SYM.
-+; ISAS is a list of <isa> objects.
-+; The idea is that in multiple isa architectures (e.g. arm) the elements
-+; common to all isas are kept in one class and the elements specific to each
-+; isa are kept in separate classes.
-+
-+(define (gen-cpu-ref isas sym)
-+ (if (and (with-multiple-isa?)
-+ (= (length isas) 1))
-+ (string-append "current_cpu->@cpu@_hardware." sym)
-+ (string-append "current_cpu->hardware." sym))
-+)
-+
-+; Attribute support.
-+
-+; Return C code to fetch a value from instruction memory.
-+; PC-VAR is the C expression containing the address of the start of the
-+; instruction.
-+;
-+; We don't bother trying to handle bitsizes that don't have a
-+; corresponding GETIMEM method. Doing so would require us to take
-+; endianness into account just to ensure that the requested bits end
-+; up at the proper place in the result. It's easier just to make the
-+; caller ask us for something we can do directly.
-+;
-+; ??? Aligned/unaligned support?
-+
-+(define (gen-ifetch pc-var bitoffset bitsize)
-+ (string-append "current_cpu->GETIMEM"
-+ (case bitsize
-+ ((8) "UQI")
-+ ((16) "UHI")
-+ ((32) "USI")
-+ (else (error "bad bitsize argument to gen-ifetch" bitsize)))
-+ " (pc, "
-+ pc-var " + " (number->string (quotient bitoffset 8))
-+ ")")
-+)
-+
-+; Return definition of an object's attributes.
-+; This is like gen-obj-attr-defn, except split for sid.
-+; TYPE is one of 'ifld, 'hw, 'operand, 'insn.
-+; [Only 'insn is currently needed.]
-+; ALL-ATTRS is an ordered alist of all attributes.
-+; "ordered" means all the non-boolean attributes are at the front and
-+; duplicate entries have been removed.
-+
-+(define (gen-obj-attr-sid-defn type obj all-attrs)
-+ (let* ((attrs (obj-atlist obj))
-+ (non-bools (attr-non-bool-attrs (atlist-attrs attrs)))
-+ (all-non-bools (list-take (attr-count-non-bools all-attrs) all-attrs))
-+ )
-+ (string-append
-+ "{ "
-+ (gen-bool-attrs attrs gen-attr-mask)
-+ ","
-+ (if (null? all-non-bools)
-+ " 0"
-+ (string-drop1 ; drop the leading ","
-+ (string-map (lambda (attr)
-+ (let ((val (or (assq-ref non-bools (obj:name attr))
-+ (attr-default attr))))
-+ ; FIXME: Are we missing attr-prefix here?
-+ (string-append ", "
-+ (send attr 'gen-value-for-defn-raw val))))
-+ all-non-bools)))
-+ " }"))
-+)
-+
-+; Instruction field support code.
-+
-+; Return a <c-expr> object of the value of an ifield.
-+
-+(define (/cxmake-ifld-val mode f)
-+ (if (with-scache?)
-+ ; ??? Perhaps a better way would be to defer evaluating the src of a
-+ ; set until the method processing the dest.
-+ (cx:make-with-atlist mode (gen-ifld-argbuf-ref f)
-+ (atlist-make "" (bool-attr-make 'CACHED #t)))
-+ (cx:make mode (gen-extracted-ifld-value f)))
-+)
-+
-+; Type system.
-+
-+; Methods:
-+; gen-type - return C code representing the type
-+; gen-sym-defn - generate definition using the provided symbol
-+; gen-sym-get-macro - generate GET macro for accessing CPU elements
-+; gen-sym-set-macro - generate SET macro for accessing CPU elements
-+
-+; Scalar type
-+
-+(method-make!
-+ <scalar> 'gen-type
-+ (lambda (self) (mode:c-type (elm-get self 'mode)))
-+)
-+
-+(method-make!
-+ <scalar> 'gen-sym-defn
-+ (lambda (self sym comment)
-+ (string-append
-+ " /* " comment " */\n"
-+ " " (send self 'gen-type) " "
-+ (gen-c-symbol sym) ";\n"))
-+)
-+
-+(method-make! <scalar> 'gen-ref (lambda (self sym index estate) sym))
-+
-+; Array type
-+
-+(method-make!
-+ <array> 'gen-type
-+ (lambda (self) (mode:c-type (elm-get self 'mode)))
-+)
-+
-+(method-make!
-+ <array> 'gen-sym-defn
-+ (lambda (self sym comment)
-+ (string-append
-+ " /* " comment " */\n"
-+ " " (send self 'gen-type) " "
-+ (gen-c-symbol sym)
-+ (gen-array-ref (elm-get self 'dimensions))
-+ ";\n")
-+ )
-+)
-+
-+; Return a reference to the array.
-+; SYM is the name of the array.
-+; INDEX is either a single index object or a (possibly empty) list of objects,
-+; one object per dimension.
-+
-+(method-make!
-+ <array> 'gen-ref
-+ (lambda (self sym index estate)
-+ (let ((gen-index1 (lambda (idx)
-+ (string-append "["
-+ (/gen-hw-index idx estate)
-+ "]"))))
-+ (string-append sym
-+ (cond ((list? index) (string-map gen-index1 index))
-+ (else (gen-index1 index))))))
-+)
-+
-+; Integers
-+;
-+;(method-make!
-+; <integer> 'gen-type
-+; (lambda (self)
-+; (mode:c-type (mode-find (elm-get self 'bits)
-+; (if (has-attr? self 'UNSIGNED)
-+; 'UINT 'INT)))
-+; )
-+;)
-+;
-+;(method-make! <integer> 'gen-sym-defn (lambda (self sym comment) ""))
-+;(method-make! <integer> 'gen-sym-get-macro (lambda (self sym comment) ""))
-+;(method-make! <integer> 'gen-sym-set-macro (lambda (self sym comment) ""))
-+
-+; Hardware descriptions support code.
-+;
-+; Various operations are required for each h/w object to support the various
-+; things the simulator will want to do with it.
-+;
-+; Methods:
-+; gen-type - C type to use to record value.
-+; ??? Delete and just use get-mode?
-+; gen-defn - generate a definition of the h/w element
-+; gen-write - Same as gen-read except done on output operands
-+; cxmake-get - Return a <c-expr> object to fetch the value.
-+; gen-set-quiet - Set the value.
-+; ??? Could just call this gen-set as there is no gen-set-trace
-+; but for consistency with the messages passed to operands
-+; we use this same.
-+; save-index? - return #t if an index needs to be saved for parallel
-+; execution post-write processing
-+; gen-profile-decl
-+; gen-record-profile
-+; get-mode
-+; gen-profile-locals
-+; gen-sym-get-macro - Generate default GET access macro.
-+; gen-sym-set-macro - Generate default SET access macro.
-+; gen-ref - Return a C reference to the object.
-+
-+; gen-type handler, must be overridden
-+
-+(method-make!
-+ <hardware-base> 'gen-type
-+ (lambda (self) (error "gen-type not overridden:" self))
-+)
-+
-+; Generate CPU state struct entries, must be overridden.
-+
-+(method-make!
-+ <hardware-base> 'gen-defn
-+ (lambda (self) (error "gen-defn not overridden:" self))
-+)
-+
-+; Return a C reference to a hardware object.
-+
-+(method-make! <hardware-base> 'gen-ref (lambda (self sym index estate) sym))
-+
-+; Each hardware type must provide its own gen-write method.
-+
-+(method-make!
-+ <hardware-base> 'gen-write
-+ (lambda (self estate index mode sfmt op access-macro)
-+ (error "gen-write method not overridden:" self))
-+)
-+
-+(method-make! <hardware-base> 'gen-profile-decl (lambda (self) ""))
-+
-+; Default gen-record-profile method.
-+
-+(method-make!
-+ <hardware-base> 'gen-record-profile
-+ (lambda (self index sfmt estate)
-+ "") ; nothing to do
-+)
-+
-+; Default cxmake-get method.
-+; Return a <c-expr> object of the value of SELF.
-+; ESTATE is the current rtl evaluator state.
-+; INDEX is a <hw-index> object. It must be an ifield.
-+; SELECTOR is a hardware selector RTX.
-+
-+(method-make!
-+ <hardware-base> 'cxmake-get
-+ (lambda (self estate mode index selector)
-+ (if (not (eq? 'ifield (hw-index:type index)))
-+ (error "not an ifield hw-index" index))
-+ (/cxmake-ifld-val mode (hw-index:value index)))
-+)
-+
-+; PC support
-+
-+; 'gen-set-quiet helper for PC values.
-+; NEWVAL is a <c-expr> object of the value to be assigned.
-+; If OPTIONS contains #:direct, set the PC directly, bypassing semantic
-+; code considerations.
-+; ??? OPTIONS support wip. Probably want a new form (or extend existing form)
-+; of rtx: that takes a variable number of named arguments.
-+; ??? Another way to get #:direct might be (raw-reg h-pc).
-+
-+(define (/hw-gen-set-quiet-pc self estate mode index selector newval . options)
-+ (if (not (send self 'pc?)) (error "Not a PC:" self))
-+ (cond ((memq #:direct options)
-+ (/hw-gen-set-quiet self estate mode index selector newval))
-+ ((current-pbb-engine?)
-+ (string-append "npc = " (cx:c newval) ";"
-+ (if (obj-has-attr? newval 'CACHED)
-+ " br_status = BRANCH_CACHEABLE;"
-+ " br_status = BRANCH_UNCACHEABLE;")
-+ (if (assq #:delay (estate-modifiers estate))
-+ (string-append " current_cpu->delay_slot_p = true;"
-+ " current_cpu->delayed_branch_address = npc;\n")
-+ "\n")
-+ ))
-+ ((assq #:delay (estate-modifiers estate))
-+ (string-append "current_cpu->delayed_branch (" (cx:c newval) ", npc, status);\n"))
-+ (else
-+ (string-append "current_cpu->branch (" (cx:c newval) ", npc, status);\n")))
-+)
-+
-+(method-make! <hw-pc> 'gen-set-quiet /hw-gen-set-quiet-pc)
-+
-+; Handle updates of the pc during parallel execution.
-+; This is done in a post-processing pass after semantic evaluation.
-+; SFMT is the <sformat>.
-+; OP is the operand.
-+; ACCESS-MACRO is the runtime C macro to use to fetch indices computed
-+; during semantic evaluation.
-+;
-+; ??? This wouldn't be necessary if gen-set-quiet were a virtual method.
-+; At this point I'm reluctant to willy nilly make methods virtual.
-+
-+(method-make!
-+ <hw-pc> 'gen-write
-+ (lambda (self estate index mode sfmt op access-macro)
-+ (string-append " "
-+ (send self 'gen-set-quiet estate VOID index hw-selector-default
-+ (cx:make VOID (string-append access-macro
-+ " (" (gen-sym op) ")")))))
-+)
-+
-+(method-make!
-+ <hw-pc> 'cxmake-skip
-+ (lambda (self estate yes?)
-+ (cx:make VOID
-+ (string-append "if ("
-+ yes?
-+ ") {\n"
-+ (if (current-pbb-engine?)
-+ (string-append " vpc = current_cpu->skip (vpc);\n")
-+ (string-append " npc = current_cpu->skip (pc);\n"))
-+ "}\n")))
-+)
-+
-+; Registers.
-+
-+(method-make-forward! <hw-register> 'type '(gen-type))
-+
-+(method-make!
-+ <hw-register> 'gen-defn
-+ (lambda (self)
-+ (send (elm-get self 'type) 'gen-sym-defn (obj:name self) (obj:comment self)))
-+)
-+
-+(method-make-forward! <hw-register> 'type '(gen-ref
-+ gen-sym-get-macro
-+ gen-sym-set-macro))
-+
-+; For parallel instructions supported by queueing outputs for later update,
-+; return a boolean indicating if an index needs to be recorded.
-+; An example of when the index isn't needed is if the index can be determined
-+; during extraction.
-+
-+(method-make!
-+ <hw-register> 'save-index?
-+ (lambda (self op)
-+ ; For array registers, we need to store away the index.
-+ (if (hw-scalar? (op:type op))
-+ #f
-+ UINT))
-+)
-+
-+; Handle updates of registers during parallel execution.
-+; This is done in a post-processing pass after semantic evaluation.
-+; SFMT is the <sformat>.
-+; OP is the <operand>.
-+; ACCESS-MACRO is the runtime C macro to use to fetch indices computed
-+; during semantic evaluation.
-+; FIXME: May need mode of OP.
-+
-+(method-make!
-+ <hw-register> 'gen-write
-+ (lambda (self estate index mode sfmt op access-macro)
-+ ; First get a hw-index object to use during indexing.
-+ ; Some indices, e.g. memory addresses, are computed during semantic
-+ ; evaluation. Others are computed during the extraction phase.
-+ (let ((index (send index 'get-write-index self sfmt op access-macro)))
-+ (string-append " "
-+ (send self 'gen-set-quiet estate mode index hw-selector-default
-+ (cx:make VOID (string-append access-macro
-+ " (" (gen-sym op) ")"))))))
-+)
-+
-+(method-make!
-+ <hw-register> 'gen-profile-decl
-+ (lambda (self)
-+ (string-append
-+ " /* " (obj:comment self) " */\n"
-+ " unsigned long " (gen-c-symbol (obj:name self)) ";\n"))
-+)
-+
-+(method-make!
-+ <hw-register> 'gen-record-profile
-+ (lambda (self index sfmt estate)
-+ ; FIXME: Need to handle scalars.
-+ (/gen-hw-index-raw index estate)
-+ ;(send index 'gen-extracted-field-value)
-+ )
-+)
-+
-+; Utilities to generate register accesses via cover functions.
-+
-+(define (/hw-gen-fun-get reg estate mode index)
-+ (let ((scalar? (hw-scalar? reg))
-+ (c-index (/gen-hw-index index estate)))
-+ (string-append "current_cpu->"
-+ (gen-reg-get-fun-name reg)
-+ " ("
-+ (if scalar? "" (string-drop 2 (gen-c-args c-index)))
-+ ")"))
-+)
-+
-+(define (/hw-gen-fun-set reg estate mode index newval)
-+ (let ((scalar? (hw-scalar? reg))
-+ (c-index (/gen-hw-index index estate)))
-+ (string-append "current_cpu->"
-+ (gen-reg-set-fun-name reg)
-+ " ("
-+ (if scalar? "" (string-append (string-drop 2 (gen-c-args c-index)) ", "))
-+ (cx:c newval)
-+ ");\n"))
-+)
-+
-+; Utility to build a <c-expr> object to fetch the value of a register.
-+
-+(define (/hw-cxmake-get hw estate mode index selector)
-+ (let ((mode (if (mode:eq? 'DFLT mode)
-+ (send hw 'get-mode)
-+ mode)))
-+ ; If the register is accessed via a cover function/macro, do it.
-+ ; Otherwise fetch the value from the cached address or from the CPU struct.
-+ (cx:make mode
-+ (cond ((or (hw-getter hw)
-+ (obj-has-attr? hw 'FUN-GET))
-+ (/hw-gen-fun-get hw estate mode index))
-+ ((and (hw-cache-addr? hw) ; FIXME: redo test
-+ (eq? 'ifield (hw-index:type index)))
-+ (string-append
-+ "* "
-+ (if (with-scache?)
-+ (gen-hw-index-argbuf-ref index)
-+ (gen-hw-index-argbuf-name index))))
-+ (else (gen-cpu-ref (hw-isas hw)
-+ (send hw 'gen-ref
-+ (gen-sym hw) index estate))))))
-+)
-+
-+(method-make! <hw-register> 'cxmake-get /hw-cxmake-get)
-+
-+; raw-reg: support
-+; ??? raw-reg: support is wip
-+
-+(method-make!
-+ <hw-register> 'cxmake-get-raw
-+ (lambda (self estate mode index selector)
-+ (let ((mode (if (mode:eq? 'DFLT mode)
-+ (send self 'get-mode)
-+ mode)))
-+ (cx:make mode (gen-cpu-ref (hw-isas self)
-+ (send self 'gen-ref
-+ (gen-sym self) index estate)))))
-+)
-+
-+; Utilities to generate C code to assign a variable to a register.
-+
-+(define (/hw-gen-set-quiet hw estate mode index selector newval)
-+ (cond ((or (hw-setter hw)
-+ (obj-has-attr? hw 'FUN-SET))
-+ (/hw-gen-fun-set hw estate mode index newval))
-+ ((and (hw-cache-addr? hw) ; FIXME: redo test
-+ (eq? 'ifield (hw-index:type index)))
-+ (string-append "* "
-+ (if (with-scache?)
-+ (gen-hw-index-argbuf-ref index)
-+ (gen-hw-index-argbuf-name index))
-+ " = " (cx:c newval) ";\n"))
-+ (else (string-append (gen-cpu-ref (hw-isas hw)
-+ (send hw 'gen-ref
-+ (gen-sym hw) index estate))
-+ " = " (cx:c newval) ";\n")))
-+)
-+
-+(method-make! <hw-register> 'gen-set-quiet /hw-gen-set-quiet)
-+
-+; raw-reg: support
-+; ??? wip
-+
-+(method-make!
-+ <hw-register> 'gen-set-quiet-raw
-+ (lambda (self estate mode index selector newval)
-+ (string-append (gen-cpu-ref (hw-isas self)
-+ (send self 'gen-ref
-+ (gen-sym self) index estate))
-+ " = " (cx:c newval) ";\n"))
-+)
-+
-+; Return method name of access function.
-+; Common elements have no prefix.
-+; Elements specific to a particular isa are prefixed with @prefix@_.
-+
-+(define (gen-reg-get-fun-name hw)
-+ (string-append (if (and (with-multiple-isa?)
-+ (= (length (hw-isas hw)) 1))
-+ (string-append (gen-sym (car (hw-isas hw))) "_")
-+ "")
-+ (gen-sym hw)
-+ "_get")
-+)
-+
-+(define (gen-reg-set-fun-name hw)
-+ (string-append (if (and (with-multiple-isa?)
-+ (= (length (hw-isas hw)) 1))
-+ (string-append (gen-sym (car (hw-isas hw))) "_")
-+ "")
-+ (gen-sym hw)
-+ "_set")
-+)
-+
-+; Memory support.
-+
-+(method-make!
-+ <hw-memory> 'cxmake-get
-+ (lambda (self estate mode index selector)
-+ (let ((mode (if (mode:eq? 'DFLT mode) ;; FIXME: delete, DFLT
-+ (hw-mode self)
-+ mode))
-+ (default-selector? (hw-selector-default? selector)))
-+ (cx:make mode
-+ (string-append "current_cpu->GETMEM" (obj:str-name mode)
-+ (if default-selector? "" "ASI")
-+ " ("
-+ "pc, "
-+ (/gen-hw-index index estate)
-+ (if default-selector?
-+ ""
-+ (string-append ", "
-+ (/gen-hw-selector selector)))
-+ ")"))))
-+)
-+
-+(method-make!
-+ <hw-memory> 'gen-set-quiet
-+ (lambda (self estate mode index selector newval)
-+ (let ((mode (if (mode:eq? 'DFLT mode)
-+ (hw-mode self)
-+ mode))
-+ (default-selector? (hw-selector-default? selector)))
-+ (string-append "current_cpu->SETMEM" (obj:str-name mode)
-+ (if default-selector? "" "ASI")
-+ " ("
-+ "pc, "
-+ (/gen-hw-index index estate)
-+ (if default-selector?
-+ ""
-+ (string-append ", "
-+ (/gen-hw-selector selector)))
-+ ", " (cx:c newval) ");\n")))
-+)
-+
-+(method-make-forward! <hw-memory> 'type '(gen-type))
-+(method-make! <hw-memory> 'gen-defn (lambda (self) ""))
-+(method-make! <hw-memory> 'gen-sym-get-macro (lambda (self sym comment) ""))
-+(method-make! <hw-memory> 'gen-sym-set-macro (lambda (self sym comment) ""))
-+
-+; For parallel instructions supported by queueing outputs for later update,
-+; return the type of the index or #f if not needed.
-+
-+(method-make!
-+ <hw-memory> 'save-index?
-+ (lambda (self op)
-+ ; In the case of the complete memory address being an immediate
-+ ; argument, we can return #f (later).
-+ AI)
-+)
-+
-+(method-make!
-+ <hw-memory> 'gen-write
-+ (lambda (self estate index mode sfmt op access-macro)
-+ (let ((index (send index 'get-write-index self sfmt op access-macro)))
-+ (string-append " "
-+ (send self 'gen-set-quiet estate mode index
-+ hw-selector-default
-+ (cx:make DFLT (string-append access-macro " ("
-+ (gen-sym op)
-+ ")"))))))
-+)
-+
-+; Immediates, addresses.
-+
-+(method-make-forward! <hw-immediate> 'type '(gen-type))
-+
-+(method-make!
-+ <hw-immediate> 'gen-defn
-+ (lambda (self)
-+ (send (elm-get self 'type) 'gen-sym-defn (obj:name self) (obj:comment self)))
-+)
-+
-+(method-make-forward! <hw-immediate> 'type '(gen-sym-get-macro
-+ gen-sym-set-macro))
-+
-+(method-make!
-+ <hw-immediate> 'gen-write
-+ (lambda (self estate index mode sfmt op access-macro)
-+ (error "gen-write of <hw-immediate> shouldn't happen"))
-+)
-+
-+;; FIXME
-+(method-make! <hw-address> 'gen-type (lambda (self) "ADDR"))
-+(method-make! <hw-address> 'gen-defn (lambda (self) ""))
-+(method-make! <hw-address> 'gen-sym-get-macro (lambda (self sym comment) ""))
-+(method-make! <hw-address> 'gen-sym-set-macro (lambda (self sym comment) ""))
-+
-+; Return a <c-expr> object of the value of SELF.
-+; ESTATE is the current rtl evaluator state.
-+; INDEX is a hw-index object. It must be an ifield.
-+; Needed because we record our own copy of the ifield in ARGBUF.
-+; SELECTOR is a hardware selector RTX.
-+
-+(method-make!
-+ <hw-address> 'cxmake-get
-+ (lambda (self estate mode index selector)
-+ (if (not (eq? 'ifield (hw-index:type index)))
-+ (error "not an ifield hw-index" index))
-+ (if (with-scache?)
-+ (cx:make mode (gen-hw-index-argbuf-ref index))
-+ (cx:make mode (gen-hw-index-argbuf-name index))))
-+)
-+
-+(method-make!
-+ <hw-address> 'gen-write
-+ (lambda (self estate index mode sfmt op access-macro)
-+ (error "gen-write of <hw-address> shouldn't happen"))
-+)
-+
-+;; FIXME: consistency says there should be gen-defn, gen-sym-[gs]et-macro
-+(method-make! <hw-iaddress> 'gen-type (lambda (self) "IADDR"))
-+
-+; Return a <c-expr> object of the value of SELF.
-+; ESTATE is the current rtl evaluator state.
-+; INDEX is a <hw-index> object. It must be an ifield.
-+; Needed because we record our own copy of the ifield in ARGBUF,
-+; *and* because we want to record in the result the 'CACHED attribute
-+; since instruction addresses based on ifields are fixed [and thus cacheable].
-+; SELECTOR is a hardware selector RTX.
-+
-+(method-make!
-+ <hw-iaddress> 'cxmake-get
-+ (lambda (self estate mode index selector)
-+ (if (not (eq? 'ifield (hw-index:type index)))
-+ (error "not an ifield hw-index" index))
-+ (if (with-scache?)
-+ ; ??? Perhaps a better way would be to defer evaluating the src of a
-+ ; set until the method processing the dest.
-+ (cx:make-with-atlist mode (gen-hw-index-argbuf-ref index)
-+ (atlist-make "" (bool-attr-make 'CACHED #t)))
-+ (cx:make mode (gen-hw-index-argbuf-name index))))
-+)
-+
-+; Hardware index support code.
-+
-+; Return the index to use by the gen-write method.
-+; In the cases where this is needed (the index isn't known until insn
-+; execution time), the index is computed along with the value to be stored,
-+; so this is easy.
-+
-+(method-make!
-+ <hw-index> 'get-write-index
-+ (lambda (self hw sfmt op access-macro)
-+ (if (memq (hw-index:type self) '(scalar constant enum str-expr ifield))
-+ self
-+ (let ((index-mode (send hw 'get-index-mode)))
-+ (if index-mode
-+ (make <hw-index> 'anonymous 'str-expr index-mode
-+ (string-append access-macro " (" (/op-index-name op) ")"))
-+ (hw-index-scalar)))))
-+)
-+
-+; Return the name of the PAREXEC structure member holding a hardware index
-+; for operand OP.
-+
-+(define (/op-index-name op)
-+ (string-append (gen-sym op) "_idx")
-+)
-+
-+; Cover fn to hardware indices to generate the actual C code.
-+; INDEX is the hw-index object (i.e. op:index).
-+; The result is a string of C code.
-+; FIXME:wip
-+
-+(define (/gen-hw-index-raw index estate)
-+ (let ((type (hw-index:type index))
-+ (mode (hw-index:mode index))
-+ (value (hw-index:value index)))
-+ (case type
-+ ((scalar) "")
-+ ; special case UINT to cut down on unnecessary verbosity.
-+ ; ??? May wish to handle more similarily.
-+ ((constant) (if (mode:eq? 'UINT mode)
-+ (number->string value)
-+ (string-append "((" (mode:c-type mode) ") "
-+ (number->string value)
-+ ")")))
-+ ((enum) (let ((sym (hw-index-enum-name index))
-+ (obj (hw-index-enum-obj index)))
-+ (gen-enum-sym obj sym)))
-+ ((str-expr) value)
-+ ((rtx) (rtl-c-with-estate estate mode value))
-+ ((ifield) (if (= (ifld-length value) 0)
-+ ""
-+ (gen-extracted-ifld-value value)))
-+ ((operand) (cx:c (send value 'cxmake-get estate mode (op:index value)
-+ (op:selector value) #f)))
-+ (else (error "/gen-hw-index-raw: invalid index:" index))))
-+)
-+
-+; Same as /gen-hw-index-raw except used where speedups are possible.
-+; e.g. doing array index calcs at extraction time.
-+
-+(define (/gen-hw-index index estate)
-+ (let ((type (hw-index:type index))
-+ (mode (hw-index:mode index))
-+ (value (hw-index:value index)))
-+ (case type
-+ ((scalar) "")
-+ ((constant) (string-append "((" (mode:c-type mode) ") "
-+ (number->string value)
-+ ")"))
-+ ((enum) (let ((sym (hw-index-enum-name index))
-+ (obj (hw-index-enum-obj index)))
-+ (gen-enum-sym obj sym)))
-+ ((str-expr) value)
-+ ((rtx) (rtl-c-with-estate estate mode value))
-+ ((ifield) (if (= (ifld-length value) 0)
-+ ""
-+ (cx:c (/cxmake-ifld-val mode value))))
-+ ((operand) (cx:c (send value 'cxmake-get estate mode (op:index value)
-+ (op:selector value))))
-+ (else (error "/gen-hw-index: invalid index:" index))))
-+)
-+
-+; Return a <c-expr> object of the value of a hardware index.
-+
-+(method-make!
-+ <hw-index> 'cxmake-get
-+ (lambda (self estate mode)
-+ (let ((mode (if (mode:eq? 'DFLT mode) (elm-get self 'mode) mode)))
-+ ; If MODE is VOID, abort.
-+ (if (mode:eq? 'VOID mode)
-+ (error "hw-index:cxmake-get: result needs a mode" self))
-+ (cx:make (if (mode:host? mode)
-+ ; FIXME: Temporary hack to generate same code as before.
-+ (let ((xmode (object-copy mode)))
-+ (obj-cons-attr! xmode (bool-attr-make 'FORCE-C #t))
-+ xmode)
-+ mode)
-+ (/gen-hw-index self estate))))
-+)
-+
-+; Hardware selector support code.
-+
-+; Generate C code for SEL.
-+
-+(define (/gen-hw-selector sel)
-+ (rtl-c++ INT #f nil sel)
-+)
-+
-+; Instruction operand support code.
-+
-+; Methods:
-+; gen-type - Return C type to use to hold operand's value.
-+; gen-read - Record an operand's value prior to parallely executing
-+; several instructions. Not used if gen-write used.
-+; gen-write - Write back an operand's value after parallely executing
-+; several instructions. Not used if gen-read used.
-+; cxmake-get - Return C code to fetch the value of an operand.
-+; gen-set-quiet - Return C code to set the value of an operand.
-+; gen-set-trace - Return C code to set the value of an operand, and print
-+; a result trace message. ??? Ideally this will go away when
-+; trace record support is complete.
-+
-+; Return the C type of an operand.
-+; Generally we forward things on to TYPE, but for the actual type we need to
-+; use the get-mode method.
-+
-+;(method-make-forward! <operand> 'type '(gen-type))
-+(method-make!
-+ <operand> 'gen-type
-+ (lambda (self)
-+ ; First get the mode.
-+ (let ((mode (send self 'get-mode)))
-+ ; If default mode, use the type's type.
-+ (if (mode:eq? 'DFLT mode)
-+ (send (op:type self) 'gen-type)
-+ (mode:c-type mode))))
-+)
-+
-+; Extra pc operand methods.
-+
-+(method-make!
-+ <pc> 'cxmake-get
-+ (lambda (self estate mode index selector)
-+ (let ((mode (if (mode:eq? 'DFLT mode)
-+ (send self 'get-mode)
-+ mode)))
-+
-+ (logit 4 "<pc> cxmake-get self=" (obj:name self) " mode=" (obj:name mode) "\n")
-+
-+ (if (obj-has-attr? self 'RAW)
-+ (let ((hw (op:type self))
-+ ;; For consistency with <operand> process index,selector similarly.
-+ (index (if index index (op:index self)))
-+ (selector (if selector selector (op:selector self))))
-+ (send hw 'cxmake-get-raw estate mode index selector))
-+ ;; The enclosing function must set `pc' to the correct value.
-+ (cx:make mode "pc"))))
-+)
-+
-+(method-make!
-+ <pc> 'cxmake-skip
-+ (lambda (self estate yes?)
-+ (send (op:type self) 'cxmake-skip estate
-+ (rtl-c++ INT (obj-isa-list self) nil yes? #:rtl-cover-fns? #t)))
-+)
-+
-+; Default gen-read method.
-+; This is used to help support targets with parallel insns.
-+; Either this or gen-write (but not both) is used.
-+
-+(method-make!
-+ <operand> 'gen-read
-+ (lambda (self estate sfmt access-macro)
-+ (string-append " "
-+ access-macro " ("
-+ (gen-sym self)
-+ ") = "
-+ ; Pass #f for the index -> use the operand's builtin index.
-+ ; Ditto for the selector.
-+ (cx:c (send self 'cxmake-get estate DFLT #f #f))
-+ ";\n"))
-+)
-+
-+; Forward gen-write onto the <hardware> object.
-+
-+(method-make!
-+ <operand> 'gen-write
-+ (lambda (self estate sfmt access-macro)
-+ (let ((write-back-code (send (op:type self) 'gen-write estate
-+ (op:index self) (op:mode self)
-+ sfmt self access-macro)))
-+ ; If operand is conditionally written, we have to check that first.
-+ ; ??? If two (or more) operands are written based on the same condition,
-+ ; all the tests can be collapsed together. Not sure that's a big
-+ ; enough win yet.
-+ (if (op:cond? self)
-+ (string-append " if (written & (1ULL << "
-+ (number->string (op:num self))
-+ "))\n"
-+ " {\n"
-+ " " write-back-code
-+ " }\n")
-+ write-back-code)))
-+)
-+
-+; Return <c-expr> object to get the value of an operand.
-+; ESTATE is the current rtl evaluator state.
-+; If INDEX is non-#f use it, otherwise use (op:index self).
-+; This special handling of #f for INDEX is *only* supported for operands
-+; in cxmake-get, gen-set-quiet, and gen-set-trace.
-+; Ditto for SELECTOR.
-+
-+(method-make!
-+ <operand> 'cxmake-get
-+ (lambda (self estate mode index selector)
-+ (let* ((mode (if (mode:eq? 'DFLT mode)
-+ (send self 'get-mode)
-+ mode))
-+ (hw (op:type self))
-+ (index (if index index (op:index self)))
-+ (idx (if index (/gen-hw-index index estate) ""))
-+ (idx-args (if (equal? idx "") "" (string-append ", " idx)))
-+ (selector (if selector selector (op:selector self)))
-+ (delayval (op:delay self))
-+ (md (mode:c-type mode))
-+ (name (if
-+ (eq? (obj:name hw) 'h-memory)
-+ (string-append md "_memory")
-+ (gen-c-symbol (obj:name hw))))
-+ (getter (op:getter self))
-+ (def-val (cond ((obj-has-attr? self 'RAW)
-+ (send hw 'cxmake-get-raw estate mode index selector))
-+ (getter
-+ (let ((args (car getter))
-+ (expr (cadr getter)))
-+ (rtl-c-expr mode
-+ (obj-isa-list self)
-+ (if (= (length args) 0) nil
-+ (list (list (car args) 'UINT index)))
-+ expr
-+ #:rtl-cover-fns? #t
-+ #:output-language (estate-output-language estate))))
-+ (else
-+ (send hw 'cxmake-get estate mode index selector)))))
-+
-+ (logit 4 "<operand> cxmake-get self=" (obj:name self) " mode=" (obj:name mode)
-+ " index=" (obj:name index) " selector=" selector "\n")
-+
-+ (if delayval
-+ (cx:make mode (string-append "lookahead ("
-+ (number->string delayval)
-+ ", tick, "
-+ "buf." name "_writes, "
-+ (cx:c def-val)
-+ idx-args ")"))
-+ def-val)))
-+)
-+
-+
-+; Utilities to implement gen-set-quiet/gen-set-trace.
-+
-+(define (/op-gen-set-quiet op estate mode index selector newval)
-+ (send (op:type op) 'gen-set-quiet estate mode index selector newval)
-+)
-+
-+(define (/op-gen-delayed-set-quiet op estate mode index selector newval)
-+ (/op-gen-delayed-set-maybe-trace op estate mode index selector newval #f))
-+
-+
-+(define (/op-gen-set-trace1 op estate mode index selector newval)
-+ (string-append
-+ " {\n"
-+ " " (mode:c-type mode) " opval = " (cx:c newval) ";\n"
-+ (if (and (with-profile?)
-+ (op:cond? op))
-+ (string-append " written |= (1ULL << "
-+ (number->string (op:num op))
-+ ");\n")
-+ "")
-+; TRACE_RESULT_<MODE> (cpu, abuf, hwnum, opnum, value);
-+; For each insn record array of operand numbers [or indices into
-+; operand instance table].
-+; Could just scan the operand table for the operand or hardware number,
-+; assuming the operand number is stored in `op'.
-+ (if (current-pbb-engine?)
-+ ""
-+ (string-append
-+ " if (UNLIKELY(current_cpu->trace_result_p))\n"
-+ " current_cpu->trace_stream << "
-+ (send op 'gen-pretty-name mode)
-+ (if (send op 'get-index-mode)
-+ (string-append
-+ " << '['"
-+ " << "
-+ ; print memory addresses in hex
-+ (if (string=? (send op 'gen-pretty-name mode) "\"memory\"")
-+ " \"0x\" << hex << (UDI) "
-+ "")
-+ (/gen-hw-index index estate)
-+ (if (string=? (send op 'gen-pretty-name mode) "\"memory\"")
-+ " << dec"
-+ "")
-+ " << ']'")
-+ "")
-+ " << \":=0x\" << hex << "
-+ ; Add (SI) or (USI) cast for byte-wide data, to prevent C++ iostreams
-+ ; from printing byte as plain raw char.
-+ (if (mode:eq? 'QI mode)
-+ "(SI) "
-+ (if (mode:eq? 'UQI mode)
-+ "(USI) "
-+ ""))
-+ "opval << dec << \" \";\n"))
-+ ; Dispatch to setter code if appropriate
-+ " "
-+ (if (op:setter op)
-+ (let ((args (car (op:setter op)))
-+ (expr (cadr (op:setter op))))
-+ (rtl-c VOID
-+ (obj-isa-list op)
-+ (if (= (length args) 0)
-+ (list (list 'newval mode "opval"))
-+ (list (list (car args) 'UINT index)
-+ (list 'newval mode "opval")))
-+ expr
-+ #:rtl-cover-fns? #t
-+ #:output-language (estate-output-language estate)))
-+ ;else
-+ (send (op:type op) 'gen-set-quiet estate mode index selector
-+ (cx:make-with-atlist mode "opval" (cx:atlist newval))))
-+ " }\n")
-+)
-+
-+(define (/op-gen-set-trace op estate mode index selector newval)
-+ ;; If tracing hasn't been enabled, use gen-set-quiet, mostly to reduce
-+ ;; diffs in the generated source from pre-full-canonicalization cgen.
-+ (if (or (and (with-profile?)
-+ (op:cond? op))
-+ (not (current-pbb-engine?))
-+ ;; FIXME: Why doesn't gen-set-quiet check op:setter?
-+ (op:setter op))
-+ (/op-gen-set-trace1 op estate mode index selector newval)
-+ (/op-gen-set-quiet op estate mode index selector newval))
-+)
-+
-+(define (/op-gen-delayed-set-trace op estate mode index selector newval)
-+ (/op-gen-delayed-set-maybe-trace op estate mode index selector newval #t))
-+
-+(define (/op-gen-delayed-set-maybe-trace op estate mode index selector newval do-trace?)
-+ (let* ((pad " ")
-+ (hw (op:type op))
-+ (delayval (op:delay op))
-+ (md (mode:c-type mode))
-+ (name (if
-+ (eq? (obj:name hw) 'h-memory)
-+ (string-append md "_memory")
-+ (gen-c-symbol (obj:name hw))))
-+ (val (cx:c newval))
-+ (idx (if index (/gen-hw-index index estate) ""))
-+ (idx-args (if (equal? idx "") "" (string-append ", " idx)))
-+ )
-+
-+ (if delayval
-+ (if (eq? (obj:name hw) 'h-memory)
-+ (set write-stack-memory-mode-names (cons md write-stack-memory-mode-names))
-+ (elm-set! hw 'used-in-delay-rtl? #t)))
-+
-+ (string-append
-+ " {\n"
-+
-+ (if delayval
-+
-+ ;; delayed write: push it to the appropriate buffer
-+ (string-append
-+ pad md " opval = " val ";\n"
-+ pad "buf." name "_writes [(tick + " (number->string delayval)
-+ ") % @prefix@::pipe_sz].push (@prefix@::write<" md ">(pc, opval" idx-args "));\n")
-+
-+ ;; else, uh, we should never have been called!
-+ (error "/op-gen-delayed-set-maybe-trace called on non-delayed operand"))
-+
-+
-+ (if do-trace?
-+
-+ (string-append
-+; TRACE_RESULT_<MODE> (cpu, abuf, hwnum, opnum, value);
-+; For each insn record array of operand numbers [or indices into
-+; operand instance table].
-+; Could just scan the operand table for the operand or hardware number,
-+; assuming the operand number is stored in `op'.
-+ " if (UNLIKELY(current_cpu->trace_result_p))\n"
-+ " current_cpu->trace_stream << "
-+ (send op 'gen-pretty-name mode)
-+ (if (send op 'get-index-mode)
-+ (string-append
-+ " << '['"
-+ " << "
-+ ; print memory addresses in hex
-+ (if (string=? (send op 'gen-pretty-name mode) "\"memory\"")
-+ " \"0x\" << hex << (UDI) "
-+ "")
-+ (/gen-hw-index index estate)
-+ (if (string=? (send op 'gen-pretty-name mode) "\"memory\"")
-+ " << dec"
-+ "")
-+ " << ']'")
-+ "")
-+ " << \":=0x\" << hex << "
-+ ;; Add (SI) or (USI) cast for byte-wide data, to prevent C++ iostreams
-+ ;; from printing byte as plain raw char.
-+ (if (mode:eq? 'QI mode)
-+ "(SI) "
-+ (if (mode:eq? 'UQI mode)
-+ "(USI) "
-+ ""))
-+ "opval << dec << \" \";\n"
-+ " }\n")
-+ ;; else no tracing is emitted
-+ ""))))
-+
-+; Return C code to set the value of an operand.
-+; NEWVAL is a <c-expr> object of the value to store.
-+; If INDEX is non-#f use it, otherwise use (op:index self).
-+; This special handling of #f for INDEX is *only* supported for operands
-+; in cxmake-get, gen-set-quiet, and gen-set-trace.
-+; Ditto for SELECTOR.
-+
-+(method-make!
-+ <operand> 'gen-set-quiet
-+ (lambda (self estate mode index selector newval)
-+ (let ((mode (if (mode:eq? 'DFLT mode)
-+ (send self 'get-mode)
-+ mode))
-+ (index (if index index (op:index self)))
-+ (selector (if selector selector (op:selector self))))
-+ (cond ((obj-has-attr? self 'RAW)
-+ (send (op:type self) 'gen-set-quiet-raw estate mode index selector newval))
-+ ((op:delay self)
-+ (/op-gen-delayed-set-quiet self estate mode index selector newval))
-+ (else
-+ (/op-gen-set-quiet self estate mode index selector newval)))))
-+)
-+
-+; Return C code to set the value of an operand and print TRACE_RESULT message.
-+; NEWVAL is a <c-expr> object of the value to store.
-+; If INDEX is non-#f use it, otherwise use (op:index self).
-+; This special handling of #f for INDEX is *only* supported for operands
-+; in cxmake-get, gen-set-quiet, and gen-set-trace.
-+; Ditto for SELECTOR.
-+
-+(method-make!
-+ <operand> 'gen-set-trace
-+ (lambda (self estate mode index selector newval)
-+ (let ((mode (if (mode:eq? 'DFLT mode)
-+ (send self 'get-mode)
-+ mode))
-+ (index (if index index (op:index self)))
-+ (selector (if selector selector (op:selector self))))
-+ (cond ((obj-has-attr? self 'RAW)
-+ (send (op:type self) 'gen-set-quiet-raw estate mode index selector newval))
-+ ((op:delay self)
-+ (/op-gen-delayed-set-trace self estate mode index selector newval))
-+ (else
-+ (/op-gen-set-trace self estate mode index selector newval)))))
-+)
-+
-+
-+; Operand profiling and parallel execution support.
-+
-+(method-make!
-+ <operand> 'save-index?
-+ (lambda (self) (send (op:type self) 'save-index? self))
-+)
-+
-+; Return boolean indicating if operand OP needs its index saved
-+; (for parallel write post-processing support).
-+
-+(define (op-save-index? op)
-+ (send op 'save-index?)
-+)
-+
-+; Return C code to record profile data for modeling use.
-+; In the case of a register, this is usually the register's number.
-+; This shouldn't be called in the case of a scalar, the code should be
-+; smart enough to know there is no need.
-+
-+(define (op:record-profile op sfmt out?)
-+ (let ((estate (vmake <rtl-c-eval-state>
-+ #:rtl-cover-fns? #t
-+ #:output-language "c++")))
-+ (send op 'gen-record-profile sfmt out? estate))
-+)
-+
-+; Return C code to record the data needed for profiling operand SELF.
-+; This is done during extraction.
-+
-+(method-make!
-+ <operand> 'gen-record-profile
-+ (lambda (self sfmt out? estate)
-+ (if (hw-scalar? (op:type self))
-+ ""
-+ (string-append " "
-+ (gen-argbuf-ref (string-append (if out? "out_" "in_")
-+ (gen-sym self)))
-+ " = "
-+ (send (op:type self) 'gen-record-profile
-+ (op:index self) sfmt estate)
-+ ";\n")))
-+)
-+
-+; Return C code to track profiling of operand SELF.
-+; This is usually called by the x-after handler.
-+
-+(method-make!
-+ <operand> 'gen-profile-code
-+ (lambda (self insn when out?)
-+ (string-append " "
-+ "@prefix@_model_mark_"
-+ (if out? "set_" "get_")
-+ (gen-sym (op:type self))
-+ "_" when
-+ " (current_cpu"
-+ (if (hw-scalar? (op:type self))
-+ ""
-+ (string-append ", "
-+ (gen-argbuf-ref
-+ (string-append (if out? "out_" "in_")
-+ (gen-sym self)))))
-+ ");\n"))
-+)
-+
-+; CPU, mach, model support.
-+
-+; Return the declaration of the cpu/insn enum.
-+
-+(define (gen-cpu-insn-enum-decl cpu insn-list)
-+ (gen-enum-decl "@prefix@_insn_type"
-+ "instructions in cpu family @prefix@"
-+ "@PREFIX@_INSN_"
-+ (append (map (lambda (i)
-+ (cons (obj:name i)
-+ (cons '-
-+ (atlist-attrs (obj-atlist i)))))
-+ insn-list)
-+ (if (with-parallel?)
-+ (apply append
-+ (map (lambda (i)
-+ (list
-+ (cons (symbol-append 'par- (obj:name i))
-+ (cons '-
-+ (atlist-attrs (obj-atlist i))))
-+ (cons (symbol-append 'write- (obj:name i))
-+ (cons '-
-+ (atlist-attrs (obj-atlist i))))))
-+ (parallel-insns insn-list)))
-+ nil)))
-+)
-+
-+; Return the enum of INSN in cpu family CPU.
-+; In addition to CGEN_INSN_TYPE, an enum is created for each insn in each
-+; cpu family. This collapses the insn enum space for each cpu to increase
-+; cache efficiently (since the IDESC table is similarily collapsed).
-+
-+(define (gen-cpu-insn-enum cpu insn)
-+ (string-append "@PREFIX@_INSN_" (string-upcase (gen-sym insn)))
-+)
-+
-+; Return C code to declare the machine data.
-+
-+(define (/gen-mach-decls)
-+ (string-append
-+ (string-map (lambda (mach)
-+ (gen-obj-sanitize mach
-+ (string-append "extern const MACH "
-+ (gen-sym mach)
-+ "_mach;\n")))
-+ (current-mach-list))
-+ "\n")
-+)
-+
-+; Return C code to define the machine data.
-+
-+(define (/gen-mach-data)
-+ (string-append
-+ "const MACH *sim_machs[] =\n{\n"
-+ (string-map (lambda (mach)
-+ (gen-obj-sanitize
-+ mach
-+ (string-append "#ifdef " (gen-have-cpu (mach-cpu mach)) "\n"
-+ " & " (gen-sym mach) "_mach,\n"
-+ "#endif\n")))
-+ (current-mach-list))
-+ " 0\n"
-+ "};\n\n"
-+ )
-+)
-+
-+; Return C declarations of cpu model support stuff.
-+; ??? This goes in arch.h but a better place is each cpu.h.
-+
-+(define (/gen-arch-model-decls)
-+ (string-append
-+ (gen-enum-decl 'model_type "model types"
-+ "MODEL_"
-+ (append (map (lambda (model)
-+ (cons (obj:name model)
-+ (cons '-
-+ (atlist-attrs (obj-atlist model)))))
-+ (current-model-list))
-+ '((max))))
-+ "#define MAX_MODELS ((int) MODEL_MAX)\n\n"
-+ )
-+)
-+
-+; Function units.
-+
-+(method-make! <unit> 'gen-decl (lambda (self) ""))
-+
-+; Lookup operand named OP-NAME in INSN.
-+; Returns #f if OP-NAME is not an operand of INSN.
-+; IN-OUT is 'in to request an input operand, 'out to request an output operand,
-+; and 'in-out to request either (though if an operand is used for input and
-+; output then the input version is returned).
-+; FIXME: Move elsewhere.
-+
-+(define (insn-op-lookup op-name insn in-out)
-+ (letrec ((lookup (lambda (op-list)
-+ (cond ((null? op-list) #f)
-+ ((eq? op-name (op:sem-name (car op-list))) (car op-list))
-+ (else (lookup (cdr op-list)))))))
-+ (case in-out
-+ ((in) (lookup (sfmt-in-ops (insn-sfmt insn))))
-+ ((out) (lookup (sfmt-out-ops (insn-sfmt insn))))
-+ ((in-out) (or (lookup (sfmt-in-ops (insn-sfmt insn)))
-+ (lookup (sfmt-out-ops (insn-sfmt insn)))))
-+ (else (error "insn-op-lookup: bad arg:" in-out))))
-+)
-+
-+; Return C code to profile a unit's usage.
-+; UNIT-NUM is number of the unit in INSN.
-+; OVERRIDES is a list of (name value) pairs, where
-+; - NAME is a spec name, one of cycles, pred, in, out.
-+; The only ones we're concerned with are in,out. They map operand names
-+; as they appear in the semantic code to operand names as they appear in
-+; the function unit spec.
-+; - VALUE is the operand to NAME. For in,out it is (NAME VALUE) where
-+; - NAME is the name of an input/output arg of the unit.
-+; - VALUE is the name of the operand as it appears in semantic code.
-+;
-+; ??? This is a big sucker, though half of it is just the definitions
-+; of utility fns.
-+
-+(method-make!
-+ <unit> 'gen-profile-code
-+ (lambda (self unit-num insn when overrides cycles-var-name)
-+ (logit 3 " 'gen-profile-code\n")
-+ (let (
-+ (inputs (unit:inputs self))
-+ (outputs (unit:outputs self))
-+
-+ ; Return C code to initialize UNIT-REFERENCED-VAR to be a bit mask
-+ ; of operands of UNIT that were read/written by INSN.
-+ ; INSN-REFERENCED-VAR is a bitmask of operands read/written by INSN.
-+ ; All we have to do is map INSN-REFERENCED-VAR to
-+ ; UNIT-REFERENCED-VAR.
-+ ; ??? For now we assume all input operands are read.
-+ (gen-ref-arg (lambda (arg num in-out)
-+ (logit 3 " gen-ref-arg\n")
-+ (let* ((op-name (assq-ref overrides (car arg)))
-+ (op (insn-op-lookup (if op-name
-+ (car op-name)
-+ (car arg))
-+ insn in-out))
-+ (insn-referenced-var "insn_referenced")
-+ (unit-referenced-var "referenced"))
-+ (if op
-+ (if (op:cond? op)
-+ (string-append " "
-+ "if ("
-+ insn-referenced-var
-+ " & (1 << "
-+ (number->string (op:num op))
-+ ")) "
-+ unit-referenced-var
-+ " |= 1 << "
-+ (number->string num)
-+ ";\n")
-+ (string-append " "
-+ unit-referenced-var
-+ " |= 1 << "
-+ (number->string num)
-+ ";\n"))
-+ ""))))
-+
-+ ; Initialize unit argument ARG.
-+ ; OUT? is #f for input args, #t for output args.
-+ (gen-arg-init (lambda (arg out?)
-+ (logit 3 " gen-arg-unit\n")
-+ (if (or
-+ ; Ignore scalars.
-+ (null? (cdr arg))
-+ ; Ignore remapped arg, handled elsewhere.
-+ (assq (car arg) overrides)
-+ ; Ignore operands not in INSN.
-+ (not (insn-op-lookup (car arg) insn
-+ (if out? 'out 'in))))
-+ ""
-+ (string-append " "
-+ (if out? "out_" "in_")
-+ (gen-c-symbol (car arg))
-+ " = "
-+ (gen-argbuf-ref
-+ (string-append (if out? "out_" "in_")
-+ (gen-c-symbol (car arg))))
-+ ";\n"))))
-+
-+ ; Return C code to declare variable to hold unit argument ARG.
-+ ; OUT? is #f for input args, #t for output args.
-+ (gen-arg-decl (lambda (arg out?)
-+ (logit 3 " gen-arg-decl " arg out? "\n")
-+ (if (null? (cdr arg)) ; ignore scalars
-+ ""
-+ (string-append " "
-+ (mode:c-type (mode:lookup (cadr arg)))
-+ " "
-+ (if out? "out_" "in_")
-+ (gen-c-symbol (car arg))
-+ " = "
-+ (if (null? (cddr arg))
-+ "0"
-+ (number->string (caddr arg)))
-+ ";\n"))))
-+
-+ ; Return C code to pass unit argument ARG to the handler.
-+ ; OUT? is #f for input args, #t for output args.
-+ (gen-arg-arg (lambda (arg out?)
-+ (logit 3 " gen-arg-arg\n")
-+ (if (null? (cdr arg)) ; ignore scalars
-+ ""
-+ (string-append ", "
-+ (if out? "out_" "in_")
-+ (gen-c-symbol (car arg))))))
-+ )
-+
-+ (string-append
-+ " {\n"
-+ (if (equal? when 'after)
-+ (string-append
-+ " int referenced = 0;\n"
-+ " unsigned long long insn_referenced = abuf->written;\n")
-+ "")
-+ ; Declare variables to hold unit arguments.
-+ (string-map (lambda (arg) (gen-arg-decl arg #f))
-+ inputs)
-+ (string-map (lambda (arg) (gen-arg-decl arg #t))
-+ outputs)
-+ ; Initialize 'em, being careful not to initialize an operand that
-+ ; has an override.
-+ (let (; Make a list of names of in/out overrides.
-+ (in-overrides (find-apply cadr
-+ (lambda (elm) (eq? (car elm) 'in))
-+ overrides))
-+ (out-overrides (find-apply cadr
-+ (lambda (elm) (eq? (car elm) 'out))
-+ overrides)))
-+ (string-append
-+ (string-map (lambda (arg)
-+ (if (memq (car arg) in-overrides)
-+ ""
-+ (gen-arg-init arg #f)))
-+ inputs)
-+ (string-map (lambda (arg)
-+ (if (memq (car arg) out-overrides)
-+ ""
-+ (gen-arg-init arg #t)))
-+ outputs)))
-+ (string-map (lambda (arg)
-+ (case (car arg)
-+ ((pred) "")
-+ ((cycles) "")
-+ ((in)
-+ (if (caddr arg)
-+ (string-append " in_"
-+ (gen-c-symbol (cadr arg))
-+ " = "
-+ (gen-argbuf-ref
-+ (string-append
-+ "in_"
-+ (gen-c-symbol (caddr arg))))
-+ ";\n")
-+ ""))
-+ ((out)
-+ (if (caddr arg)
-+ (string-append " out_"
-+ (gen-c-symbol (cadr arg))
-+ " = "
-+ (gen-argbuf-ref
-+ (string-append
-+ "out_"
-+ (gen-c-symbol (caddr arg))))
-+ ";\n")
-+ ""))
-+ (else
-+ (parse-error (make-prefix-context "insn function unit spec")
-+ "invalid spec" arg))))
-+ overrides)
-+ ; Create bitmask indicating which args were referenced.
-+ (if (equal? when 'after)
-+ (string-append
-+ (string-map (lambda (arg num) (gen-ref-arg arg num 'in))
-+ inputs
-+ (iota (length inputs)))
-+ (string-map (lambda (arg num) (gen-ref-arg arg num 'out))
-+ outputs
-+ (iota (length outputs)
-+ (length inputs))))
-+ "")
-+ ; Emit the call to the handler.
-+ " " cycles-var-name " += "
-+ (gen-model-unit-fn-name (unit:model self) self when)
-+ " (current_cpu, idesc"
-+ ", " (number->string unit-num)
-+ (if (equal? when 'after) ", referenced" "")
-+ (string-map (lambda (arg) (gen-arg-arg arg #f))
-+ inputs)
-+ (string-map (lambda (arg) (gen-arg-arg arg #t))
-+ outputs)
-+ ");\n"
-+ " }\n"
-+ )))
-+)
-+
-+; Return C code to profile an insn-specific unit's usage.
-+; UNIT-NUM is number of the unit in INSN.
-+
-+(method-make!
-+ <iunit> 'gen-profile-code
-+ (lambda (self unit-num insn when cycles-var-name)
-+ (let ((args (iunit:args self))
-+ (unit (iunit:unit self)))
-+ (send unit 'gen-profile-code unit-num insn when args cycles-var-name)))
-+)
-+
-+; Mode support.
-+
-+; Generate a table of mode data.
-+; For now all we need is the names.
-+
-+(define (gen-mode-defs)
-+ (string-append
-+ "const char *mode_names[] = {\n"
-+ (string-map (lambda (m)
-+ (string-append " \"" (string-upcase (obj:str-name m)) "\",\n"))
-+ ; We don't treat aliases as being different from the real
-+ ; mode here, so ignore them.
-+ (mode-list-non-alias-values))
-+ "};\n\n"
-+ )
-+)
-+
-+; Insn profiling support.
-+
-+; Generate declarations for local variables needed for modelling code.
-+
-+(method-make!
-+ <insn> 'gen-profile-locals
-+ (lambda (self model)
-+; (let ((cti? (or (has-attr? self 'UNCOND-CTI)
-+; (has-attr? self 'COND-CTI))))
-+; (string-append
-+; (if cti? " int UNUSED taken_p = 0;\n" "")
-+; ))
-+ "")
-+)
-+
-+; Generate C code to profile INSN.
-+
-+(method-make!
-+ <insn> 'gen-profile-code
-+ (lambda (self model when cycles-var-name)
-+ (string-append
-+ (let ((timing (assq-ref (insn-timing self) (obj:name model))))
-+ (if timing
-+ (string-map (lambda (iunit unit-num)
-+ (send iunit 'gen-profile-code unit-num self when cycles-var-name))
-+ (timing:units timing)
-+ (iota (length (timing:units timing))))
-+ (send (model-default-unit model) 'gen-profile-code 0 self when nil cycles-var-name)))
-+ ))
-+)
-+
-+; Instruction support.
-+
-+; Return list of all instructions to use for scache engine.
-+; This is all real insns plus the `invalid' and `cond' virtual insns.
-+; It does not include the pbb virtual insns.
-+
-+(define (scache-engine-insns)
-+ (non-multi-insns (non-alias-pbb-insns (current-insn-list)))
-+)
-+
-+; Return list of all instructions to use for pbb engine.
-+; This is all real insns plus the `invalid' and `cond' virtual insns.
-+
-+(define (pbb-engine-insns)
-+ (real-insns (current-insn-list))
-+)
-+
-+;; Subroutine of /create-virtual-insns!.
-+;; Add virtual insn INSN to the database.
-+;; We put virtual insns ahead of normal insns because they're kind of special,
-+;; and it helps to see them first in lists.
-+;; ORDINAL is a used to place the insn ahead of normal insns;
-+;; it is a pair so we can do the update for the next virtual insn here.
-+
-+(define (/virtual-insn-add! ordinal insn)
-+ (obj-set-ordinal! insn (cdr ordinal))
-+ (current-insn-add! insn)
-+ (set-cdr! ordinal (- (cdr ordinal) 1))
-+)
-+
-+; Create the virtual insns.
-+
-+(define (/create-virtual-insns! isa)
-+ (let ((isa-name (obj:name isa))
-+ (context (make-prefix-context "virtual insns"))
-+ ;; Record as a pair so /virtual-insn-add! can update it.
-+ (ordinal (cons #f -1)))
-+
-+ (/virtual-insn-add!
-+ ordinal
-+ (insn-read context
-+ '(name x-invalid)
-+ '(comment "invalid insn handler")
-+ `(attrs VIRTUAL (ISA ,isa-name))
-+ '(syntax "--invalid--")
-+ '(semantics (c-code VOID "\
-+ {
-+ current_cpu->invalid_insn (pc);
-+ assert (0);
-+ /* NOTREACHED */
-+ }
-+"))
-+ ))
-+
-+ (if (with-pbb?)
-+ (begin
-+ (/virtual-insn-add!
-+ ordinal
-+ (insn-read context
-+ '(name x-begin)
-+ '(comment "pbb begin handler")
-+ `(attrs VIRTUAL PBB (ISA ,isa-name))
-+ '(syntax "--begin--")
-+ '(semantics (c-code VOID "\
-+ {
-+ vpc = current_cpu->@prefix@_pbb_begin (current_cpu->h_pc_get ());
-+ }
-+"))
-+ ))
-+
-+ (/virtual-insn-add!
-+ ordinal
-+ (insn-read context
-+ '(name x-chain)
-+ '(comment "pbb chain handler")
-+ `(attrs VIRTUAL PBB (ISA ,isa-name))
-+ '(syntax "--chain--")
-+ '(semantics (c-code VOID "\
-+ {
-+ vpc = current_cpu->@prefix@_engine.pbb_chain (current_cpu, abuf);
-+ // If we don't have to give up control, don't.
-+ // Note that we may overrun step_insn_count since we do the test at the
-+ // end of the block. This is defined to be ok.
-+ if (UNLIKELY(current_cpu->stop_after_insns_p (abuf->fields.chain.insn_count)))
-+ BREAK (vpc);
-+ }
-+"))
-+ ))
-+
-+ (/virtual-insn-add!
-+ ordinal
-+ (insn-read context
-+ '(name x-cti-chain)
-+ '(comment "pbb cti-chain handler")
-+ `(attrs VIRTUAL PBB (ISA ,isa-name))
-+ '(syntax "--cti-chain--")
-+ '(semantics (c-code VOID "\
-+ {
-+ vpc = current_cpu->@prefix@_engine.pbb_cti_chain (current_cpu, abuf, pbb_br_status, pbb_br_npc);
-+ // If we don't have to give up control, don't.
-+ // Note that we may overrun step_insn_count since we do the test at the
-+ // end of the block. This is defined to be ok.
-+ if (UNLIKELY(current_cpu->stop_after_insns_p (abuf->fields.chain.insn_count)))
-+ BREAK (vpc);
-+ }
-+"))
-+ ))
-+
-+ (/virtual-insn-add!
-+ ordinal
-+ (insn-read context
-+ '(name x-before)
-+ '(comment "pbb before handler")
-+ `(attrs VIRTUAL PBB (ISA ,isa-name))
-+ '(syntax "--before--")
-+ '(semantics (c-code VOID "\
-+ {
-+ current_cpu->@prefix@_engine.pbb_before (current_cpu, abuf);
-+ }
-+"))
-+ ))
-+
-+ (/virtual-insn-add!
-+ ordinal
-+ (insn-read context
-+ '(name x-after)
-+ '(comment "pbb after handler")
-+ `(attrs VIRTUAL PBB (ISA ,isa-name))
-+ '(syntax "--after--")
-+ '(semantics (c-code VOID "\
-+ {
-+ current_cpu->@prefix@_engine.pbb_after (current_cpu, abuf);
-+ }
-+"))
-+ ))
-+
-+ ))
-+
-+ ; If entire instruction set is conditionally executed, create a virtual
-+ ; insn to handle that.
-+ (if (and (with-pbb?)
-+ (isa-conditional-exec? isa))
-+ (/virtual-insn-add!
-+ ordinal
-+ (insn-read context
-+ '(name x-cond)
-+ '(syntax "conditional exec test")
-+ `(attrs VIRTUAL PBB (ISA ,isa-name))
-+ '(syntax "--cond--")
-+ (list 'semantics (list 'c-code 'VOID
-+ (string-append "\
-+ {
-+ // Assume branch not taken.
-+ pbb_br_status = BRANCH_UNTAKEN;
-+ UINT cond_code = abuf->cond;
-+ BI exec_p = "
-+ (rtl-c++ DFLT
-+ (list (obj:name isa))
-+ '((cond-code UINT "cond_code"))
-+ (cadr (isa-condition isa))
-+ #:rtl-cover-fns? #t)
-+ ";
-+ if (! exec_p)
-+ ++vpc;
-+ }
-+")))
-+ )))
-+ )
-+)
-+
-+; Return a boolean indicating if INSN should be split.
-+
-+(define (/decode-split-insn? insn isa)
-+ (let loop ((split-specs (isa-decode-splits isa)))
-+ (cond ((null? split-specs)
-+ #f)
-+ ((let ((f-name (decode-split-name (car split-specs))))
-+ (and (insn-has-ifield? insn f-name)
-+ (let ((constraint
-+ (decode-split-constraint (car split-specs))))
-+ (or (not constraint)
-+ (rtl-eval -FIXME-unfinished-)))))
-+ #t)
-+ (else (loop (cdr split-specs)))))
-+)
-+
-+; Subroutine of /decode-split-insn-1.
-+; Build the ifield-assertion for ifield F-NAME.
-+; VALUE is either a number or a non-empty list of numbers.
-+
-+(define (/decode-split-build-assertion f-name value)
-+ (if (number? value)
-+ (rtx-make 'eq 'INT (rtx-make 'ifield f-name) (rtx-make 'const 'INT value))
-+ (rtx-make 'member (rtx-make 'ifield f-name)
-+ (apply rtx-make (cons 'number-list (cons 'INT value)))))
-+)
-+
-+; Subroutine of /decode-split-insn.
-+; Specialize INSN according to <decode-split> dspec.
-+
-+(define (/decode-split-insn-1 insn dspec)
-+ (let ((f-name (decode-split-name dspec))
-+ (values (decode-split-values dspec)))
-+ (let ((result (map object-copy (make-list (length values) insn))))
-+ (for-each (lambda (insn-copy value)
-+ (obj-set-name! insn-copy
-+ (symbol-append (obj:name insn-copy)
-+ '-
-+ (car value)))
-+ (obj-cons-attr! insn-copy (bool-attr-make 'DECODE-SPLIT #t))
-+ (let ((existing-assertion (insn-ifield-assertion insn-copy))
-+ (split-assertion
-+ (/decode-split-build-assertion f-name (cadr value))))
-+ (insn-set-ifield-assertion!
-+ insn-copy
-+ (if existing-assertion
-+ (rtx-make 'andif split-assertion existing-assertion)
-+ split-assertion)))
-+ )
-+ result values)
-+ result))
-+)
-+
-+; Split INSN.
-+; The result is a list of the split copies of INSN.
-+
-+(define (/decode-split-insn insn isa)
-+ (logit 3 "Splitting " (obj:name insn) " ...\n")
-+ (let loop ((splits (isa-decode-splits isa)) (result nil))
-+ (cond ((null? splits)
-+ result)
-+ ; FIXME: check constraint
-+ ((insn-has-ifield? insn (decode-split-name (car splits)))
-+ ; At each iteration, split the result of the previous.
-+ (loop (cdr splits)
-+ (if (null? result)
-+ (/decode-split-insn-1 insn (car splits))
-+ (apply append
-+ (map (lambda (insn)
-+ (/decode-split-insn-1 insn (car splits)))
-+ result)))))
-+ (else
-+ (loop (cdr splits) result))))
-+)
-+
-+; Create copies of insns to be split.
-+; ??? better phrase needed? Possible confusion with gcc's define-split.
-+; The original insns are then marked as aliases so the simulator ignores them.
-+
-+(define (/fill-sim-insn-list!)
-+ (let ((isa (current-isa)))
-+
-+ (if (not (null? (isa-decode-splits isa)))
-+
-+ (begin
-+ (logit 1 "Splitting instructions ...\n")
-+ (for-each (lambda (insn)
-+ (if (and (insn-real? insn)
-+ (insn-semantics insn)
-+ (/decode-split-insn? insn isa))
-+ (let ((ord (obj-ordinal insn))
-+ (sub-ord 1))
-+ (for-each (lambda (new-insn)
-+ ;; Splice new insns next to original.
-+ ;; Keeps things tidy and generated code
-+ ;; easier to read for human viewer.
-+ ;; This is done by using an ordinal of
-+ ;; (major . minor).
-+ (obj-set-ordinal! new-insn
-+ (cons ord sub-ord))
-+ (current-insn-add! new-insn)
-+ (set! sub-ord (+ sub-ord 1)))
-+ (/decode-split-insn insn isa))
-+ (obj-cons-attr! insn (bool-attr-make 'ALIAS #t)))))
-+ (current-insn-list))
-+ (logit 1 "Done splitting.\n"))
-+ ))
-+
-+ *UNSPECIFIED*
-+)
-+
-+; .cpu file loading support
-+
-+; Only run sim-analyze-insns! once.
-+(define /sim-insns-analyzed? #f)
-+
-+; List of computed sformat argument buffers.
-+(define /sim-sformat-argbuf-list #f)
-+(define (current-sbuf-list) /sim-sformat-argbuf-list)
-+
-+; Called before the .cpu file has been read in.
-+
-+(define (sim-init!)
-+ (set! /sim-insns-analyzed? #f)
-+ (set! /sim-sformat-argbuf-list #f)
-+ (if (with-sem-frags?)
-+ (sim-sfrag-init!))
-+ *UNSPECIFIED*
-+)
-+
-+; Called after the .cpu file has been read in.
-+
-+(define (sim-finish!)
-+ ; Specify FUN-GET/SET in the .sim file to cause all hardware references to
-+ ; go through methods, thus allowing the programmer to override them.
-+ (define-attr '(for hardware) '(type boolean) '(name FUN-GET)
-+ '(comment "read hardware elements via cover functions/methods"))
-+ (define-attr '(for hardware) '(type boolean) '(name FUN-SET)
-+ '(comment "write hardware elements via cover functions/methods"))
-+
-+ ; If there is a .sim file, load it.
-+ (let ((sim-file (string-append srcdir "/cpu/"
-+ (symbol->string (current-arch-name))
-+ ".sim")))
-+ (if (file-exists? sim-file)
-+ (begin
-+ (display (string-append "Loading sim file " sim-file " ...\n"))
-+ (reader-read-file! sim-file))))
-+
-+ ; If we're building files for an isa, create the virtual insns.
-+ (if (not (keep-isa-multiple?))
-+ (/create-virtual-insns! (current-isa)))
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Called after file is read in and global error checks are done
-+; to initialize tables.
-+
-+(define (sim-analyze!)
-+ *UNSPECIFIED*
-+)
-+
-+; Scan insns, copying them to the simulator insn list, splitting the
-+; requested insns, then analyze the semantics and compute instruction formats.
-+; 'twould be nice to do this in sim-analyze! but it doesn't know whether this
-+; needs to be done or not (which is determined by what files are being
-+; generated). Since this is an expensive operation, we defer doing this
-+; to the files that need it.
-+
-+(define (sim-analyze-insns!)
-+ ; This can only be done if one isa and one cpu family is being kept.
-+ (assert-keep-one)
-+
-+ (if (not /sim-insns-analyzed?)
-+
-+ (begin
-+ (/fill-sim-insn-list!)
-+
-+ (arch-analyze-insns! CURRENT-ARCH
-+ #f ; don't include aliases
-+ #t) ; do analyze the semantics
-+
-+ ; Compute the set of sformat argument buffers.
-+ (set! /sim-sformat-argbuf-list
-+ (compute-sformat-argbufs! (current-sfmt-list)))
-+
-+ (set! /sim-insns-analyzed? #t)
-+ ))
-+
-+ ; Do our own error checking.
-+ (assert (current-insn-lookup 'x-invalid #f))
-+
-+ *UNSPECIFIED*
-+)
-diff -Nur binutils-2.24.orig/cgen/sim-arch.scm binutils-2.24/cgen/sim-arch.scm
---- binutils-2.24.orig/cgen/sim-arch.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/sim-arch.scm 2016-06-30 21:26:12.673893890 +0200
-@@ -0,0 +1,180 @@
-+; Simulator generator support routines.
-+; Copyright (C) 2000, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+
-+; Utilities of cgen-arch.h.
-+
-+; Return C macro definitions of the various supported cpus.
-+
-+(define (/gen-cpuall-defines)
-+ "" ; nothing yet
-+)
-+
-+; Return C declarations of misc. support stuff.
-+; ??? Modes are now defined in sim/common/cgen-types.h but we will need
-+; target specific modes.
-+
-+(define (/gen-support-decls)
-+ (string-append
-+; (gen-enum-decl 'mode_type "mode types"
-+; "MODE_"
-+; ; Aliases are not distinct from their real mode so ignore
-+; ; them here.
-+; (append (map list (map obj:name
-+; (mode-list-non-alias-values)))
-+; '((max))))
-+; "#define MAX_MODES ((int) MODE_MAX)\n\n"
-+ )
-+)
-+
-+; Utilities of cgen-cpuall.h.
-+
-+; Subroutine of /gen-cpuall-includes.
-+
-+(define (/gen-cpu-header cpu prefix)
-+ (string-append "#include \"" prefix (cpu-file-transform cpu) ".h\"\n")
-+)
-+
-+; Return C code to include all the relevant headers for each cpu family,
-+; conditioned on ifdef WANT_CPU_@CPU@.
-+
-+(define (/gen-cpuall-includes)
-+ (string-list
-+ "/* Include files for each cpu family. */\n\n"
-+ (string-list-map
-+ (lambda (cpu)
-+ (let* ((cpu-name (gen-sym cpu))
-+ (CPU-NAME (string-upcase cpu-name)))
-+ (string-list "#ifdef WANT_CPU_" CPU-NAME "\n"
-+ (/gen-cpu-header cpu "eng")
-+ (/gen-cpu-header cpu "cpu")
-+ (/gen-cpu-header cpu "decode")
-+ "#endif\n\n")))
-+ (current-cpu-list))
-+ )
-+)
-+
-+; Subroutine of /gen-cpuall-decls to generate cpu-specific structure entries.
-+; The result is "struct <cpu>_<type-name> <member-name>;".
-+; INDENT is the amount to indent by.
-+; CPU is the cpu object.
-+
-+(define (/gen-cpu-specific-decl indent cpu type-name member-name)
-+ (let* ((cpu-name (gen-sym cpu))
-+ (CPU-NAME (string-upcase cpu-name)))
-+ (string-append
-+ "#ifdef WANT_CPU_" CPU-NAME "\n"
-+ (spaces indent)
-+ "struct " cpu-name "_" type-name " " member-name ";\n"
-+ "#endif\n"))
-+)
-+
-+; Return C declarations of cpu-specific structs.
-+; These are defined here to achieve a simple and moderately type-safe
-+; inheritance. In the non-cpu-specific files, these structs consist of
-+; just the baseclass. In cpu-specific files, the baseclass is augmented
-+; with the cpu-specific data.
-+
-+(define (/gen-cpuall-decls)
-+ (string-list
-+ (gen-argbuf-type #f)
-+ (gen-scache-type #f)
-+ )
-+)
-+
-+; Top level generators for non-cpu-specific files.
-+
-+; Generate arch.h
-+; This file defines non cpu family specific data about the architecture
-+; and also data structures that combine all variants (e.g. cpu struct).
-+; It is intended to be included before sim-basics.h and sim-base.h.
-+
-+(define (cgen-arch.h)
-+ (logit 1 "Generating " (current-arch-name) "'s arch.h ...\n")
-+
-+ (string-write
-+ (gen-c-copyright "Simulator header for @arch@."
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "#ifndef @ARCH@_ARCH_H\n"
-+ "#define @ARCH@_ARCH_H\n"
-+ "\n"
-+ "#define TARGET_BIG_ENDIAN 1\n\n" ; FIXME
-+ ;(gen-mem-macros)
-+ ;"/* FIXME: split into 32/64 parts */\n"
-+ ;"#define WI SI\n"
-+ ;"#define UWI USI\n"
-+ ;"#define AI USI\n\n"
-+ /gen-cpuall-defines
-+ /gen-support-decls
-+ /gen-arch-model-decls
-+ "#endif /* @ARCH@_ARCH_H */\n"
-+ )
-+)
-+
-+; Generate arch.c
-+; This file defines non cpu family specific data about the architecture.
-+
-+(define (cgen-arch.c)
-+ (logit 1 "Generating " (current-arch-name) "'s arch.c ...\n")
-+
-+ (string-write
-+ (gen-c-copyright "Simulator support for @arch@."
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "\
-+#include \"sim-main.h\"
-+#include \"bfd.h\"
-+
-+"
-+ /gen-mach-data
-+ )
-+)
-+
-+; Generate cpuall.h
-+; This file pulls together all of the cpu variants .h's.
-+; It is intended to be included after sim-base.h/cgen-sim.h.
-+
-+(define (cgen-cpuall.h)
-+ (logit 1 "Generating " (current-arch-name) "'s cpuall.h ...\n")
-+
-+ (string-write
-+ (gen-c-copyright "Simulator CPU header for @arch@."
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "#ifndef @ARCH@_CPUALL_H\n"
-+ "#define @ARCH@_CPUALL_H\n"
-+ "\n"
-+ /gen-cpuall-includes
-+ /gen-mach-decls
-+ /gen-cpuall-decls
-+ "#endif /* @ARCH@_CPUALL_H */\n"
-+ )
-+)
-+
-+; Generate ops.c
-+; No longer used.
-+
-+(define (cgen-ops.c)
-+ (logit 1 "Generating " (current-arch-name) "'s ops.c ...\n")
-+
-+ (string-write
-+ (gen-c-copyright "Simulator operational support for @arch@."
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "\
-+#define MEMOPS_DEFINE_INLINE
-+
-+#include \"config.h\"
-+#include <signal.h>
-+#include \"ansidecl.h\"
-+#include \"bfd.h\"
-+#include \"tconfig.h\"
-+#include \"cgen-sim.h\"
-+#include \"memops.h\"
-+
-+/* FIXME: wip */
-+int pow2masks[] = {
-+ 0, 0, 1, -1, 3, -1, -1, -1, 7, -1, -1, -1, -1, -1, -1, -1, 15
-+};
-+
-+"
-+ gen-mode-defs
-+ )
-+)
-diff -Nur binutils-2.24.orig/cgen/sim-cpu.scm binutils-2.24/cgen/sim-cpu.scm
---- binutils-2.24.orig/cgen/sim-cpu.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/sim-cpu.scm 2016-06-30 21:26:12.673893890 +0200
-@@ -0,0 +1,1313 @@
-+; CPU family related simulator generator, excluding decoding and model support.
-+; Copyright (C) 2000, 2001, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+
-+; Notes:
-+; - Add support to generate copies of semantic code and perform constant
-+; folding based on selected mach. This would collapse out untaken branches
-+; of tests on (current-mach).
-+
-+; Utilities of cgen-cpu.h.
-+
-+; Print various parameters of the cpu family.
-+; A "cpu family" here is a collection of variants of a particular architecture
-+; that share sufficient commonality that they can be handled together.
-+
-+(define (/gen-cpu-defines)
-+ (string-append
-+ "\
-+/* Maximum number of instructions that are fetched at a time.
-+ This is for LIW type instructions sets (e.g. m32r). */
-+#define MAX_LIW_INSNS " (number->string (state-liw-insns))
-+ "\n\
-+
-+/* Maximum number of instructions that can be executed in parallel. */
-+#define MAX_PARALLEL_INSNS " (number->string (state-parallel-insns))
-+ "\n\
-+
-+/* The size of an \"int\" needed to hold an instruction word.
-+ This is usually 32 bits, but some architectures needs 64 bits. */
-+typedef "
-+ (if (adata-large-insn-word? CURRENT-ARCH)
-+ "CGEN_INSN_LGUINT"
-+ "CGEN_INSN_INT")
-+ " CGEN_INSN_WORD;\n\n"
-+; (gen-enum-decl '@cpu@_virtual
-+; "@cpu@ virtual insns"
-+; "@ARCH@_INSN_" ; not @CPU@ to match CGEN_INSN_TYPE in opc.h
-+; '((x-invalid 0)
-+; (x-before -1) (x-after -2)
-+; (x-begin -3) (x-chain -4) (x-cti-chain -5)))
-+ )
-+)
-+
-+; Return a boolean indicating if hardware element HW needs storage allocated
-+; for it in the SIM_CPU struct.
-+
-+(define (hw-need-storage? hw)
-+ (and (register? hw) (not (obj-has-attr? hw 'VIRTUAL)))
-+)
-+
-+; Subroutine of /gen-hardware-types to generate the struct containing
-+; hardware elements of one isa.
-+
-+(define (/gen-hardware-struct hw-list)
-+ (if (null? hw-list)
-+ ; If struct is empty, leave it out to simplify generated code.
-+ ""
-+ (string-list-map (lambda (hw)
-+ (string-list
-+ (gen-defn hw)
-+ (gen-obj-sanitize hw
-+ (string-list
-+ (send hw 'gen-get-macro)
-+ (send hw 'gen-set-macro)))))
-+ (find hw-need-storage? hw-list)))
-+ )
-+
-+; Return C type declarations of all of the hardware elements.
-+; The name of the type is prepended with the cpu family name.
-+
-+(define (/gen-hardware-types)
-+ (string-list
-+ "/* CPU state information. */\n"
-+ "typedef struct {\n"
-+ " /* Hardware elements. */\n"
-+ " struct {\n"
-+ (/gen-hardware-struct
-+ (find (lambda (hw)
-+ (or (not (with-multiple-isa?))
-+ (>= (count-common
-+ (current-keep-isa-name-list)
-+ (obj-attr-value hw 'ISA))
-+ 1)))
-+ (current-hw-list))
-+ )
-+ " } hardware;\n"
-+ "#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)\n"
-+ ;" /* CPU profiling state information. */\n"
-+ ;" struct {\n"
-+ ;(string-list-map (lambda (hw) (send hw 'gen-profile-decl))
-+ ; (find hw-profilable? (current-hw-list)))
-+ ;" } profile;\n"
-+ ;"#define CPU_CGEN_PROFILE(cpu) (& (cpu)->cpu_data.profile)\n"
-+ "} @CPU@_CPU_DATA;\n\n"
-+ ; If there are any virtual regs, output get/set macros for them.
-+ (let ((virtual-regs (find (lambda (hw)
-+ (and (register? hw)
-+ (obj-has-attr? hw 'VIRTUAL)))
-+ (current-hw-list)))
-+ (orig-with-parallel? (with-parallel?))
-+ (result ""))
-+ (set-with-parallel?! #f)
-+ (if (not (null? virtual-regs))
-+ (set! result
-+ (string-list
-+ "/* Virtual regs. */\n\n"
-+ (string-list-map (lambda (hw)
-+ (logit 3 "Generating get/set for " (obj:name hw)
-+ " ...\n")
-+ (gen-obj-sanitize hw
-+ (string-list
-+ (send hw 'gen-get-macro)
-+ (send hw 'gen-set-macro))))
-+ virtual-regs)
-+ "\n"
-+ )))
-+ (set-with-parallel?! orig-with-parallel?)
-+ result)
-+ )
-+)
-+
-+; Return the declaration of register access functions.
-+
-+(define (/gen-cpu-reg-access-decls)
-+ (string-list
-+ "/* Cover fns for register access. */\n"
-+ (string-list-map (lambda (hw)
-+ (gen-reg-access-decl hw
-+ "@cpu@"
-+ (gen-type hw)
-+ (hw-scalar? hw)))
-+ (find register? (current-hw-list)))
-+ "\n"
-+ "/* These must be hand-written. */\n"
-+ "extern CPUREG_FETCH_FN @cpu@_fetch_register;\n"
-+ "extern CPUREG_STORE_FN @cpu@_store_register;\n"
-+ "\n")
-+)
-+
-+; Generate type of struct holding model state while executing.
-+
-+(define (/gen-model-decls)
-+ (logit 2 "Generating model decls ...\n")
-+ (string-list
-+ (string-list-map
-+ (lambda (model)
-+ (string-list
-+ "typedef struct {\n"
-+ (if (null? (model:state model))
-+ " int empty;\n" ; ensure struct isn't empty so it compiles
-+ (string-map (lambda (var)
-+ (string-append " "
-+ (mode:c-type (mode:lookup (cadr var)))
-+ " "
-+ (gen-c-symbol (car var))
-+ ";\n"))
-+ (model:state model)))
-+ "} MODEL_" (string-upcase (gen-sym model)) "_DATA;\n\n"
-+ ))
-+ (current-model-list))
-+ )
-+)
-+
-+; Utility of /gen-extract-macros to generate a macro to define the local
-+; vars to contain extracted field values and the code to assign them
-+; for <iformat> IFMT.
-+
-+(define (/gen-extract-ifmt-macro ifmt)
-+ (logit 2 "Processing format " (obj:name ifmt) " ...\n")
-+ (string-list
-+ (gen-define-ifmt-ifields ifmt "" #t #f)
-+ (gen-extract-ifmt-ifields ifmt "" #t #f)
-+ ; We don't need an extra blank line here as gen-extract-ifields adds one.
-+ )
-+)
-+
-+; Generate macros to extract instruction fields.
-+
-+(define (/gen-extract-macros)
-+ (logit 2 "Generating extraction macros ...\n")
-+ (string-list
-+ "\
-+/* Macros to simplify extraction, reading and semantic code.
-+ These define and assign the local vars that contain the insn's fields. */
-+\n"
-+ (string-list-map /gen-extract-ifmt-macro (current-ifmt-list))
-+ )
-+)
-+
-+; Utility of /gen-parallel-exec-type to generate the definition of one
-+; structure in PAREXEC.
-+; SFMT is an <sformat> object.
-+
-+(define (/gen-parallel-exec-elm sfmt)
-+ (string-append
-+ " struct { /* " (obj:comment sfmt) " */\n"
-+ (let ((sem-ops
-+ ((if (with-parallel-write?) sfmt-out-ops sfmt-in-ops) sfmt)))
-+ (if (null? sem-ops)
-+ " int empty;\n" ; ensure struct isn't empty so it compiles
-+ (string-map
-+ (lambda (op)
-+ (logit 2 "Processing operand " (obj:name op) " of format "
-+ (obj:name sfmt) " ...\n")
-+ (if (with-parallel-write?)
-+ (let ((index-type (and (op-save-index? op)
-+ (gen-index-type op sfmt))))
-+ (string-append " " (gen-type op)
-+ " " (gen-sym op) ";\n"
-+ (if index-type
-+ (string-append " " index-type
-+ " " (gen-sym op) "_idx;\n")
-+ "")))
-+ (string-append " "
-+ (gen-type op)
-+ " "
-+ (gen-sym op)
-+ ";\n")))
-+ sem-ops)))
-+ " } " (gen-sym sfmt) ";\n"
-+ )
-+)
-+
-+; Generate the definition of the structure that holds register values, etc.
-+; for use during parallel execution. When instructions are executed parallelly
-+; either
-+; - their inputs are read before their outputs are written. Thus we have to
-+; fetch the input values of several instructions before executing any of them.
-+; - or their outputs are queued here first and then written out after all insns
-+; have executed.
-+; The fetched/queued values are stored in an array of PAREXEC structs, one
-+; element per instruction.
-+
-+(define (/gen-parallel-exec-type)
-+ (logit 2 "Generating PAREXEC type ...\n")
-+ (string-append
-+ (if (with-parallel-write?)
-+ "/* Queued output values of an instruction. */\n"
-+ "/* Fetched input values of an instruction. */\n")
-+ "\
-+
-+struct parexec {
-+ union {\n"
-+ (string-map /gen-parallel-exec-elm (current-sfmt-list))
-+ "\
-+ } operands;
-+ /* For conditionally written operands, bitmask of which ones were. */
-+ int written;
-+};\n\n"
-+ )
-+)
-+
-+; Generate the TRACE_RECORD struct definition.
-+; This struct will hold all necessary data for doing tracing and profiling
-+; (e.g. register numbers). The goal is to remove all tracing code from the
-+; semantic code. Then the fast/full distinction needn't use conditionals to
-+; discard/include the tracing/profiling code.
-+
-+(define (/gen-trace-record-type)
-+ (string-list
-+ "\
-+/* Collection of various things for the trace handler to use. */
-+
-+typedef struct trace_record {
-+ IADDR pc;
-+ /* FIXME:wip */
-+} TRACE_RECORD;
-+\n"
-+ )
-+)
-+
-+; Utilities of cgen-cpu.c
-+
-+; Get/set fns for every register.
-+
-+(define (/gen-cpu-reg-access-defns)
-+ (string-list-map
-+ (lambda (hw)
-+ (let ((scalar? (hw-scalar? hw))
-+ (name (obj:name hw))
-+ (getter (hw-getter hw))
-+ (setter (hw-setter hw)))
-+ (gen-reg-access-defn hw
-+ "@cpu@"
-+ (gen-type hw)
-+ scalar?
-+ (if getter
-+ (string-append
-+ " return GET_"
-+ (string-upcase (gen-c-symbol name))
-+ " ("
-+ (if scalar? "" "regno")
-+ ");\n")
-+ (string-append
-+ " return CPU ("
-+ (gen-c-symbol name)
-+ (if scalar? "" "[regno]")
-+ ");\n"))
-+ (if setter
-+ (string-append
-+ " SET_"
-+ (string-upcase (gen-c-symbol name))
-+ " ("
-+ (if scalar? "" "regno, ")
-+ "newval);\n")
-+ (string-append
-+ " CPU ("
-+ (gen-c-symbol name)
-+ (if scalar? "" "[regno]")
-+ ") = newval;\n")))))
-+ (find (lambda (hw) (register? hw))
-+ (current-hw-list)))
-+)
-+
-+; Generate a function to record trace results in a trace record.
-+
-+(define (/gen-cpu-record-results)
-+ (string-list
-+ "\
-+/* Record trace results for INSN. */
-+
-+void
-+@cpu@_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
-+ int *indices, TRACE_RECORD *tr)
-+{\n"
-+ "}\n"
-+ )
-+)
-+
-+; Utilities of cgen-read.c.
-+; Parallel-read support is not currently used by any port and this code
-+; has been left to bitrot. Don't delete it just yet.
-+
-+; Return C code to fetch and save all input operands to instructions with
-+; <sformat> SFMT.
-+
-+(define (/gen-read-args sfmt)
-+ (string-map (lambda (op) (op:read op sfmt))
-+ (sfmt-in-ops sfmt))
-+)
-+
-+; Utility of /gen-read-switch to generate a switch case for <sformat> SFMT.
-+
-+(define (/gen-read-case sfmt)
-+ (logit 2 "Processing read switch case for \"" (obj:name sfmt) "\" ...\n")
-+ (string-list
-+ " CASE (read, READ_" (string-upcase (gen-sym sfmt)) ") : "
-+ "/* " (obj:comment sfmt) " */\n"
-+ " {\n"
-+ (gen-define-field-macro (if (with-scache?) sfmt #f))
-+ (gen-define-parallel-operand-macro sfmt)
-+ (gen-define-ifields (sfmt-iflds sfmt) (sfmt-length sfmt) " " #f)
-+ (gen-extract-ifields (sfmt-iflds sfmt) (sfmt-length sfmt) " " #f)
-+ (/gen-read-args sfmt)
-+ (gen-undef-parallel-operand-macro sfmt)
-+ (gen-undef-field-macro sfmt)
-+ " }\n"
-+ " BREAK (read);\n\n"
-+ )
-+)
-+
-+; Generate the guts of a C switch statement to read insn operands.
-+; The switch is based on instruction formats.
-+
-+(define (/gen-read-switch)
-+ (logit 2 "Processing readers ...\n")
-+ (string-write-map /gen-read-case (current-sfmt-list))
-+)
-+
-+; Utilities of cgen-write.c.
-+
-+; This is the other way of implementing parallel execution support.
-+; Instead of fetching all the input operands first, write all the output
-+; operands and their addresses to holding variables, and then run a
-+; post-processing pass to update the cpu state.
-+;
-+; There are separate implementations for semantics as functions and semantics
-+; as one big switch. For the function case we create a function that is a
-+; switch on each semantic format and loops writing each insn's results back.
-+; For the switch case we add cases to the switch to handle the write back,
-+; and it is up to the pbb compiler to include them in the generated "code".
-+
-+; Return C code to fetch and save all output operands to instructions with
-+; <sformat> SFMT.
-+
-+(define (/gen-write-args sfmt)
-+ (string-map (lambda (op) (op:write op sfmt))
-+ (sfmt-out-ops sfmt))
-+)
-+
-+; Utility of gen-write-switch to generate a switch case for <sformat> SFMT.
-+; If INSN is non-#f, it is the <insn> object of the insn in which case
-+; the case is named after the insn not the format. This is done because
-+; current sem-switch support emits one handler per insn instead of per sfmt.
-+
-+(define (/gen-write-case sfmt insn)
-+ (logit 2 "Processing write switch case for \"" (obj:name sfmt) "\" ...\n")
-+ (string-list
-+ (if insn
-+ (string-list /indent
-+ "CASE (sem, INSN_WRITE_"
-+ (string-upcase (gen-sym insn)) ") : ")
-+ (string-list /indent
-+ "case @CPU@_"
-+ (string-upcase (gen-sym sfmt)) " : "))
-+ "/* "
-+ (if insn
-+ (string-list (insn-syntax insn))
-+ (obj:comment sfmt))
-+ " */\n"
-+ /indent " {\n"
-+ (if insn
-+ (string-list
-+ /indent
-+ " SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);\n"
-+ /indent
-+ " const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;\n")
-+ "")
-+ (gen-define-field-macro (if (with-scache?) sfmt #f))
-+ (gen-define-parallel-operand-macro sfmt)
-+ /indent
-+ " int UNUSED written = abuf->written;\n"
-+ ;(gen-define-ifields (sfmt-iflds sfmt) (sfmt-length sfmt) " " #f) - used by cgen-read.c
-+ ;(gen-extract-ifields (sfmt-iflds sfmt) (sfmt-length sfmt) " " #f) - used by cgen-read.c
-+ (if insn
-+ (string-list /indent " IADDR UNUSED pc = abuf->addr;\n")
-+ "")
-+ (if (and insn (insn-cti? insn))
-+ (string-list /indent
-+ " SEM_BRANCH_INIT\n") ; no trailing `;' on purpose
-+ "")
-+ (if insn
-+ (string-list /indent " vpc = SEM_NEXT_VPC (sem_arg, pc, 0);\n")
-+ "")
-+ "\n"
-+ (/indent-add 4)
-+ (/gen-write-args sfmt)
-+ (/indent-add -4)
-+ "\n"
-+ (if (and insn (insn-cti? insn))
-+ (string-list /indent " SEM_BRANCH_FINI (vpc);\n")
-+ "")
-+ (gen-undef-parallel-operand-macro sfmt)
-+ (gen-undef-field-macro sfmt)
-+ /indent " }\n"
-+ (if insn
-+ (string-list /indent " NEXT (vpc);\n")
-+ (string-list /indent " break;\n"))
-+ "\n"
-+ )
-+)
-+
-+; Generate the guts of a C switch statement to write insn operands.
-+; The switch is based on instruction formats.
-+; ??? This will generate cases for formats that don't need it.
-+; E.g. on the m32r all 32 bit insns can't be executed in parallel.
-+; It's easier to generate the code anyway so we do.
-+
-+(define (/gen-write-switch)
-+ (logit 2 "Processing writers ...\n")
-+ (string-write-map (lambda (sfmt)
-+ (/gen-write-case sfmt #f))
-+ (current-sfmt-list))
-+)
-+
-+; Utilities of cgen-semantics.c.
-+
-+; Return name of semantic fn for INSN.
-+
-+(define (/gen-sem-fn-name insn)
-+ ;(string-append "sem_" (gen-sym insn))
-+ (gen-sym insn)
-+)
-+
-+; Return semantic fn table entry for INSN.
-+
-+(define (/gen-sem-fn-table-entry insn)
-+ (string-list
-+ " { "
-+ "@PREFIX@_INSN_"
-+ (string-upcase (gen-sym insn))
-+ ", "
-+ "SEM_FN_NAME (@prefix@," (/gen-sem-fn-name insn) ")"
-+ " },\n"
-+ )
-+)
-+
-+; Return C code to define a table of all semantic fns and a function to
-+; add the info to the insn descriptor table.
-+
-+(define (/gen-semantic-fn-table)
-+ (string-write
-+ "\
-+/* Table of all semantic fns. */
-+
-+static const struct sem_fn_desc sem_fns[] = {\n"
-+
-+ (lambda ()
-+ (string-write-map /gen-sem-fn-table-entry
-+ (non-alias-insns (current-insn-list))))
-+
-+ "\
-+ { 0, 0 }
-+};
-+
-+/* Add the semantic fns to IDESC_TABLE. */
-+
-+void
-+SEM_FN_NAME (@prefix@,init_idesc_table) (SIM_CPU *current_cpu)
-+{
-+ IDESC *idesc_table = CPU_IDESC (current_cpu);
-+ const struct sem_fn_desc *sf;
-+ int mach_num = MACH_NUM (CPU_MACH (current_cpu));
-+
-+ for (sf = &sem_fns[0]; sf->fn != 0; ++sf)
-+ {
-+ const CGEN_INSN *insn = idesc_table[sf->index].idata;
-+ int valid_p = (CGEN_INSN_VIRTUAL_P (insn)
-+ || CGEN_INSN_MACH_HAS_P (insn, mach_num));
-+#if FAST_P
-+ if (valid_p)
-+ idesc_table[sf->index].sem_fast = sf->fn;
-+ else
-+ idesc_table[sf->index].sem_fast = SEM_FN_NAME (@prefix@,x_invalid);
-+#else
-+ if (valid_p)
-+ idesc_table[sf->index].sem_full = sf->fn;
-+ else
-+ idesc_table[sf->index].sem_full = SEM_FN_NAME (@prefix@,x_invalid);
-+#endif
-+ }
-+}
-+\n"
-+ )
-+)
-+
-+; Return C code to perform the semantics of INSN.
-+
-+(define (gen-semantic-code insn)
-+ (string-append
-+ (if (and (insn-real? insn)
-+ (isa-setup-semantics (current-isa)))
-+ (string-append
-+ " "
-+ (rtl-c VOID (obj-isa-list insn) nil
-+ (isa-setup-semantics (current-isa))
-+ #:for-insn? #t
-+ #:rtl-cover-fns? #t
-+ #:owner insn)
-+ "\n")
-+ "")
-+
-+ ; Indicate generating code for INSN.
-+ ; Use the compiled form if available.
-+ ; The case when they're not available is for virtual insns. xxx Still true?
-+ (cond ((insn-compiled-semantics insn)
-+ => (lambda (sem)
-+ (rtl-c-parsed VOID sem
-+ #:for-insn? #t
-+ #:rtl-cover-fns? #t
-+ #:owner insn)))
-+ ((insn-canonical-semantics insn)
-+ => (lambda (sem)
-+ (rtl-c-parsed VOID sem
-+ #:for-insn? #t
-+ #:rtl-cover-fns? #t
-+ #:owner insn)))
-+ (else
-+ (context-error (make-obj-context insn #f)
-+ "While generating semantic code"
-+ "semantics of insn are not canonicalized"))))
-+)
-+
-+; Return definition of C function to perform INSN.
-+; This version handles the with-scache case.
-+
-+(define (/gen-scache-semantic-fn insn)
-+ (logit 2 "Processing semantics for " (obj:name insn) ": \"" (insn-syntax insn) "\" ...\n")
-+ (set! /with-profile? /with-profile-fn?)
-+ (let ((profile? (and (with-profile?)
-+ (not (obj-has-attr? insn 'VIRTUAL))))
-+ (parallel? (with-parallel?))
-+ (cti? (insn-cti? insn))
-+ (insn-len (insn-length-bytes insn)))
-+ (string-list
-+ "/* " (obj:str-name insn) ": " (insn-syntax insn) " */\n\n"
-+ "static SEM_PC\n"
-+ "SEM_FN_NAME (@prefix@," (gen-sym insn) ")"
-+ (if (and parallel? (not (with-generic-write?)))
-+ " (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)\n"
-+ " (SIM_CPU *current_cpu, SEM_ARG sem_arg)\n")
-+ "{\n"
-+ (gen-define-field-macro (insn-sfmt insn))
-+ (if (and parallel? (not (with-generic-write?)))
-+ (gen-define-parallel-operand-macro (insn-sfmt insn))
-+ "")
-+ " ARGBUF *abuf = SEM_ARGBUF (sem_arg);\n"
-+ ; Unconditionally written operands are not recorded here.
-+ " int UNUSED written = 0;\n"
-+ ; The address of this insn, needed by extraction and semantic code.
-+ ; Note that the address recorded in the cpu state struct is not used.
-+ ; For faster engines that copy will be out of date.
-+ " IADDR UNUSED pc = abuf->addr;\n"
-+ (if (and cti? (not parallel?))
-+ " SEM_BRANCH_INIT\n" ; no trailing `;' on purpose
-+ "")
-+ (string-list " SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, "
-+ (number->string insn-len)
-+ ");\n")
-+ "\n"
-+ (gen-semantic-code insn) "\n"
-+ ; Only update what's been written if some are conditionally written.
-+ ; Otherwise we know they're all written so there's no point in
-+ ; keeping track.
-+ (if (/any-cond-written? (insn-sfmt insn))
-+ " abuf->written = written;\n"
-+ "")
-+ (if (and cti? (not parallel?))
-+ " SEM_BRANCH_FINI (vpc);\n"
-+ "")
-+ " return vpc;\n"
-+ (if (and parallel? (not (with-generic-write?)))
-+ (gen-undef-parallel-operand-macro (insn-sfmt insn))
-+ "")
-+ (gen-undef-field-macro (insn-sfmt insn))
-+ "}\n\n"
-+ ))
-+)
-+
-+; Return definition of C function to perform INSN.
-+; This version handles the without-scache case.
-+; ??? TODO: multiword insns.
-+
-+(define (/gen-no-scache-semantic-fn insn)
-+ (logit 2 "Processing semantics for " (obj:name insn) ": \"" (insn-syntax insn) "\" ...\n")
-+ (set! /with-profile? /with-profile-fn?)
-+ (let ((profile? (and (with-profile?)
-+ (not (obj-has-attr? insn 'VIRTUAL))))
-+ (parallel? (with-parallel?))
-+ (cti? (insn-cti? insn))
-+ (insn-len (insn-length-bytes insn)))
-+ (string-list
-+ "/* " (obj:str-name insn) ": " (insn-syntax insn) " */\n\n"
-+ "static SEM_STATUS\n"
-+ "SEM_FN_NAME (@prefix@," (gen-sym insn) ")"
-+ (if (and parallel? (not (with-generic-write?)))
-+ " (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec, CGEN_INSN_WORD insn)\n"
-+ " (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_WORD insn)\n")
-+ "{\n"
-+ (if (and parallel? (not (with-generic-write?)))
-+ (gen-define-parallel-operand-macro (insn-sfmt insn))
-+ "")
-+ " SEM_STATUS status = 0;\n" ; ??? wip
-+ " ARGBUF *abuf = SEM_ARGBUF (sem_arg);\n"
-+ (gen-define-field-macro (if (with-scache?) (insn-sfmt insn) #f))
-+ ; Unconditionally written operands are not recorded here.
-+ " int UNUSED written = 0;\n"
-+ " IADDR UNUSED pc = GET_H_PC ();\n"
-+ (if (and cti? (not parallel?))
-+ " SEM_BRANCH_INIT\n" ; no trailing `;' on purpose
-+ "")
-+ (string-list " SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, "
-+ (number->string insn-len)
-+ ");\n")
-+ (string-list (gen-define-ifmt-ifields (insn-ifmt insn) " " #f #t)
-+ (gen-sfmt-op-argbuf-defns (insn-sfmt insn))
-+ (gen-extract-ifmt-ifields (insn-ifmt insn) " " #f #t)
-+ (gen-sfmt-op-argbuf-assigns (insn-sfmt insn)))
-+ "\n"
-+ (gen-semantic-code insn) "\n"
-+ ; Only update what's been written if some are conditionally written.
-+ ; Otherwise we know they're all written so there's no point in
-+ ; keeping track.
-+ (if (/any-cond-written? (insn-sfmt insn))
-+ " abuf->written = written;\n"
-+ "")
-+ ; SEM_{,N}BRANCH_FINI are user-supplied macros.
-+ (if (not parallel?)
-+ (string-list
-+ (if cti?
-+ " SEM_BRANCH_FINI (vpc, "
-+ " SEM_NBRANCH_FINI (vpc, ")
-+ (gen-bool-attrs (obj-atlist insn) gen-attr-mask)
-+ ");\n")
-+ "")
-+ (gen-undef-field-macro (insn-sfmt insn))
-+ " return status;\n"
-+ (if (and parallel? (not (with-generic-write?)))
-+ (gen-undef-parallel-operand-macro (insn-sfmt insn))
-+ "")
-+ "}\n\n"
-+ ))
-+)
-+
-+(define (/gen-all-semantic-fns)
-+ (logit 2 "Processing semantics ...\n")
-+ (let ((insns (non-alias-insns (current-insn-list))))
-+ (if (with-scache?)
-+ (string-write-map /gen-scache-semantic-fn insns)
-+ (string-write-map /gen-no-scache-semantic-fn insns)))
-+)
-+
-+; Utility of /gen-sem-case to return the mask of operands always written
-+; to in <sformat> SFMT.
-+; ??? Not currently used.
-+
-+(define (/uncond-written-mask sfmt)
-+ (apply + (map (lambda (op)
-+ (if (op:cond? op)
-+ 0
-+ (logsll 1 (op:num op))))
-+ (sfmt-out-ops sfmt)))
-+)
-+
-+; Utility of /gen-sem-case to return #t if any operand in <sformat> SFMT is
-+; conditionally written to.
-+
-+(define (/any-cond-written? sfmt)
-+ (any-true? (map op:cond? (sfmt-out-ops sfmt)))
-+)
-+
-+; Generate a switch case to perform INSN.
-+
-+(define (/gen-sem-case insn parallel?)
-+ (logit 2 "Processing "
-+ (if parallel? "parallel " "")
-+ "semantic switch case for " (obj:name insn) ": \""
-+ (insn-syntax insn) "\" ...\n")
-+ (set! /with-profile? /with-profile-sw?)
-+ (let ((cti? (insn-cti? insn))
-+ (insn-len (insn-length-bytes insn)))
-+ (string-list
-+ ; INSN_ is prepended here and not elsewhere to avoid name collisions
-+ ; with symbols like AND, etc.
-+ " CASE (sem, "
-+ "INSN_"
-+ (if parallel? "PAR_" "")
-+ (string-upcase (gen-sym insn)) ") : "
-+ "/* " (insn-syntax insn) " */\n"
-+ "{\n"
-+ " SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);\n"
-+ " ARGBUF *abuf = SEM_ARGBUF (sem_arg);\n"
-+ (gen-define-field-macro (if (with-scache?) (insn-sfmt insn) #f))
-+ (if (and parallel? (not (with-generic-write?)))
-+ (gen-define-parallel-operand-macro (insn-sfmt insn))
-+ "")
-+ ; Unconditionally written operands are not recorded here.
-+ " int UNUSED written = 0;\n"
-+ ; The address of this insn, needed by extraction and semantic code.
-+ ; Note that the address recorded in the cpu state struct is not used.
-+ " IADDR UNUSED pc = abuf->addr;\n"
-+ (if (and cti? (not parallel?))
-+ " SEM_BRANCH_INIT\n" ; no trailing `;' on purpose
-+ "")
-+ (if (with-scache?)
-+ ""
-+ (string-list (gen-define-ifmt-ifields (insn-ifmt insn) " " #f #t)
-+ (gen-extract-ifmt-ifields (insn-ifmt insn) " " #f #t)
-+ "\n"))
-+ (string-list " vpc = SEM_NEXT_VPC (sem_arg, pc, "
-+ (number->string insn-len)
-+ ");\n")
-+ "\n"
-+ (gen-semantic-code insn) "\n"
-+ ; Only update what's been written if some are conditionally written.
-+ ; Otherwise we know they're all written so there's no point in
-+ ; keeping track.
-+ (if (/any-cond-written? (insn-sfmt insn))
-+ " abuf->written = written;\n"
-+ "")
-+ (if (and cti? (not parallel?))
-+ " SEM_BRANCH_FINI (vpc);\n"
-+ "")
-+ (if (and parallel? (not (with-generic-write?)))
-+ (gen-undef-parallel-operand-macro (insn-sfmt insn))
-+ "")
-+ (gen-undef-field-macro (insn-sfmt insn))
-+ "}\n"
-+ " NEXT (vpc);\n\n"
-+ ))
-+)
-+
-+(define (/gen-sem-switch)
-+ (logit 2 "Processing semantic switch ...\n")
-+ ; Turn parallel execution support off.
-+ (let ((orig-with-parallel? (with-parallel?)))
-+ (set-with-parallel?! #f)
-+ (let ((result
-+ (string-write-map (lambda (insn) (/gen-sem-case insn #f))
-+ (non-alias-insns (current-insn-list)))))
-+ (set-with-parallel?! orig-with-parallel?)
-+ result))
-+)
-+
-+; Generate the guts of a C switch statement to execute parallel instructions.
-+; This switch is included after the non-parallel instructions in the semantic
-+; switch.
-+;
-+; ??? We duplicate the writeback case for each insn, even though we only need
-+; one case per insn format. The former keeps the code for each insn
-+; together and might improve cache usage. On the other hand the latter
-+; reduces the amount of code, though it is believed that in this particular
-+; instance the win isn't big enough.
-+
-+(define (/gen-parallel-sem-switch)
-+ (logit 2 "Processing parallel insn semantic switch ...\n")
-+ ; Turn parallel execution support on.
-+ (let ((orig-with-parallel? (with-parallel?)))
-+ (set-with-parallel?! #t)
-+ (let ((result
-+ (string-write-map (lambda (insn)
-+ (string-list (/gen-sem-case insn #t)
-+ (/gen-write-case (insn-sfmt insn) insn)))
-+ (parallel-insns (current-insn-list)))))
-+ (set-with-parallel?! orig-with-parallel?)
-+ result))
-+)
-+
-+; Top level file generators.
-+
-+; Generate cpu-<cpu>.h
-+
-+(define (cgen-cpu.h)
-+ (logit 1 "Generating " (gen-cpu-name) "'s cpu.h ...\n")
-+
-+ (sim-analyze-insns!)
-+
-+ ; Turn parallel execution support on if cpu needs it.
-+ (set-with-parallel?! (state-parallel-exec?))
-+
-+ ; Tell the rtl->c translator we're not the simulator.
-+ ; ??? Minimizes changes in generated code until this is changed.
-+ ; RTL->C happens for field decoding.
-+ (rtl-c-config! #:rtl-cover-fns? #f)
-+
-+ (string-write
-+ (gen-c-copyright "CPU family header for @cpu@."
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "\
-+#ifndef CPU_@CPU@_H
-+#define CPU_@CPU@_H
-+
-+"
-+ /gen-cpu-defines
-+ ;; After CGEN_INSN_WORD is defined we can include cgen-engine.h.
-+ ;; We need to include it here (or thereabouts) because cgen-engine.h
-+ ;; needs CGEN_INSN_WORD and parts of the remainder of this file need
-+ ;; cgen-engine.h.
-+ "#include \"cgen-engine.h\"\n\n"
-+ /gen-hardware-types
-+ /gen-cpu-reg-access-decls
-+ /gen-model-decls
-+
-+ (if (not (with-multiple-isa?))
-+ (string-list
-+ (lambda () (gen-argbuf-type #t))
-+ (lambda () (gen-scache-type #t))
-+ /gen-extract-macros)
-+ "")
-+
-+ (if (and (with-parallel?) (not (with-generic-write?)))
-+ /gen-parallel-exec-type
-+ "")
-+ /gen-trace-record-type
-+ "#endif /* CPU_@CPU@_H */\n"
-+ )
-+)
-+
-+; Generate defs-<isa>.h.
-+
-+(define (cgen-defs.h)
-+ (logit 1 "Generating " (obj:name (current-isa)) "'s defs.h ...\n")
-+
-+ (sim-analyze-insns!)
-+
-+ ; Tell the rtl->c translator we're not the simulator.
-+ ; ??? Minimizes changes in generated code until this is changed.
-+ ; RTL->C happens for field decoding.
-+ (rtl-c-config! #:rtl-cover-fns? #f)
-+
-+ (string-write
-+ (gen-c-copyright (string-append
-+ "ISA definitions header for "
-+ (obj:str-name (current-isa))
-+ ".")
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "\
-+#ifndef DEFS_@PREFIX@_H
-+#define DEFS_@PREFIX@_H
-+
-+"
-+ (lambda () (gen-argbuf-type #t))
-+ (lambda () (gen-scache-type #t))
-+ /gen-extract-macros
-+
-+ "#endif /* DEFS_@PREFIX@_H */\n"
-+ )
-+)
-+
-+; Generate cpu-<cpu>.c
-+
-+(define (cgen-cpu.c)
-+ (logit 1 "Generating " (gen-cpu-name) "'s cpu.c ...\n")
-+
-+ (sim-analyze-insns!)
-+
-+ ; Turn parallel execution support on if cpu needs it.
-+ (set-with-parallel?! (state-parallel-exec?))
-+
-+ ; Initialize rtl generation.
-+ (rtl-c-config! #:rtl-cover-fns? #t)
-+
-+ (string-write
-+ (gen-c-copyright "Misc. support for CPU family @cpu@."
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "\
-+#define WANT_CPU @cpu@
-+#define WANT_CPU_@CPU@
-+
-+#include \"sim-main.h\"
-+#include \"cgen-ops.h\"
-+
-+"
-+ /gen-cpu-reg-access-defns
-+ /gen-cpu-record-results
-+ )
-+)
-+
-+; Generate read.c
-+
-+(define (cgen-read.c)
-+ (logit 1 "Generating " (gen-cpu-name) "'s read.c ...\n")
-+
-+ (sim-analyze-insns!)
-+
-+ ; Turn parallel execution support off.
-+ (set-with-parallel?! #f)
-+
-+ ; Tell the rtx->c translator we are the simulator.
-+ (rtl-c-config! #:rtl-cover-fns? #t)
-+
-+ (string-write
-+ (gen-c-copyright (string-append "Simulator instruction operand reader for "
-+ (symbol->string (current-arch-name)) ".")
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "\
-+#ifdef DEFINE_LABELS
-+
-+ /* The labels have the case they have because the enum of insn types
-+ is all uppercase and in the non-stdc case the fmt symbol is built
-+ into the enum name. */
-+
-+ static struct {
-+ int index;
-+ void *label;
-+ } labels[] = {\n"
-+
-+ (lambda ()
-+ (string-write-map (lambda (insn)
-+ (string-append " { "
-+ "@PREFIX@_INSN_"
-+ (string-upcase (gen-sym insn))
-+ ", && case_read_READ_"
-+ (string-upcase (gen-sym (insn-sfmt insn)))
-+ " },\n"))
-+ (non-alias-insns (current-insn-list))))
-+
-+ " { 0, 0 }
-+ };
-+ int i;
-+
-+ for (i = 0; labels[i].label != 0; ++i)
-+ CPU_IDESC (current_cpu) [labels[i].index].read = labels[i].label;
-+
-+#undef DEFINE_LABELS
-+#endif /* DEFINE_LABELS */
-+
-+#ifdef DEFINE_SWITCH
-+
-+{\n"
-+ (if (with-scache?)
-+ "\
-+ SEM_ARG sem_arg = sc;
-+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-+
-+ SWITCH (read, sem_arg->read)\n"
-+ "\
-+ SWITCH (read, decode->read)\n")
-+ "\
-+ {
-+
-+"
-+
-+ /gen-read-switch
-+
-+ "\
-+ }
-+ ENDSWITCH (read) /* End of read switch. */
-+}
-+
-+#undef DEFINE_SWITCH
-+#endif /* DEFINE_SWITCH */
-+"
-+ )
-+)
-+
-+; Generate write.c
-+
-+(define (cgen-write.c)
-+ (logit 1 "Generating " (gen-cpu-name) "'s write.c ...\n")
-+
-+ (sim-analyze-insns!)
-+
-+ ; Turn parallel execution support off.
-+ (set-with-parallel?! #f)
-+
-+ ; Tell the rtx->c translator we are the simulator.
-+ (rtl-c-config! #:rtl-cover-fns? #t)
-+
-+ (string-write
-+ (gen-c-copyright (string-append "Simulator instruction operand writer for "
-+ (symbol->string (current-arch-name)) ".")
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "\
-+/* Write cached results of 1 or more insns executed in parallel. */
-+
-+void
-+@cpu@_parallel_write (SIM_CPU *cpu, SCACHE *sbufs, PAREXEC *pbufs, int ninsns)
-+{\n"
-+ (if (with-scache?)
-+ "\
-+ SEM_ARG sem_arg = sc;
-+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);\n"
-+ "")
-+ "\
-+
-+ do
-+ {
-+ ARGBUF *abuf = SEM_ARGBUF (sbufs);
-+
-+ switch (abuf->idesc->write)
-+ {
-+\n"
-+
-+ ;(/indent-add 8)
-+ /gen-write-switch
-+ ;(/indent-add -8)
-+
-+ "\
-+ }
-+ }
-+ while (--ninsns > 0);
-+}
-+"
-+ )
-+)
-+
-+; Generate semantics.c
-+; Each instruction is implemented in its own function.
-+
-+(define (cgen-semantics.c)
-+ (logit 1 "Generating " (gen-cpu-name) "'s semantics.c ...\n")
-+
-+ (sim-analyze-insns!)
-+
-+ ; Turn parallel execution support on if cpu needs it.
-+ (set-with-parallel?! (state-parallel-exec?))
-+
-+ ; Tell the rtx->c translator we are the simulator.
-+ (rtl-c-config! #:rtl-cover-fns? #t)
-+
-+ (string-write
-+ (gen-c-copyright "Simulator instruction semantics for @cpu@."
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "\
-+#define WANT_CPU @cpu@
-+#define WANT_CPU_@CPU@
-+
-+#include \"sim-main.h\"
-+#include \"cgen-mem.h\"
-+#include \"cgen-ops.h\"
-+
-+#undef GET_ATTR
-+"
-+ (gen-define-with-symcat "GET_ATTR(cpu, num, attr) \
-+CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_" "attr)")
-+"
-+/* This is used so that we can compile two copies of the semantic code,
-+ one with full feature support and one without that runs fast(er).
-+ FAST_P, when desired, is defined on the command line, -DFAST_P=1. */
-+#if FAST_P
-+#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn)
-+#undef TRACE_RESULT
-+#define TRACE_RESULT(cpu, abuf, name, type, val)
-+#else
-+#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn)
-+#endif
-+\n"
-+
-+ /gen-all-semantic-fns
-+ ; Put the table at the end so we don't have to declare all the sem fns.
-+ /gen-semantic-fn-table
-+ )
-+)
-+
-+; Generate sem-switch.c.
-+; Each instruction is a case in a switch().
-+; This file consists of just the switch(). It is included by mainloop.c.
-+
-+(define (cgen-sem-switch.c)
-+ (logit 1 "Generating " (gen-cpu-name) "'s sem-switch.c ...\n")
-+
-+ (sim-analyze-insns!)
-+
-+ ; Turn parallel execution support off.
-+ ; It is later turned on/off when generating the actual semantic code.
-+ (set-with-parallel?! #f)
-+
-+ ; Tell the rtx->c translator we are the simulator.
-+ (rtl-c-config! #:rtl-cover-fns? #t)
-+
-+ (string-write
-+ (gen-c-copyright "Simulator instruction semantics for @cpu@."
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+
-+ "\
-+#ifdef DEFINE_LABELS
-+
-+ /* The labels have the case they have because the enum of insn types
-+ is all uppercase and in the non-stdc case the insn symbol is built
-+ into the enum name. */
-+
-+ static struct {
-+ int index;
-+ void *label;
-+ } labels[] = {\n"
-+
-+ (lambda ()
-+ (string-write-map (lambda (insn)
-+ (string-append " { "
-+ "@PREFIX@_INSN_"
-+ (string-upcase (gen-sym insn))
-+ ", && case_sem_INSN_"
-+ (string-upcase (gen-sym insn))
-+ " },\n"))
-+ (non-alias-insns (current-insn-list))))
-+
-+ (if (state-parallel-exec?)
-+ (lambda ()
-+ (string-write-map (lambda (insn)
-+ (string-append " { "
-+ "@CPU@_INSN_PAR_"
-+ (string-upcase (gen-sym insn))
-+ ", && case_sem_INSN_PAR_"
-+ (string-upcase (gen-sym insn))
-+ " },\n"
-+ " { "
-+ "@CPU@_INSN_WRITE_"
-+ (string-upcase (gen-sym insn))
-+ ", && case_sem_INSN_WRITE_"
-+ (string-upcase (gen-sym insn))
-+ " },\n"))
-+ (parallel-insns (current-insn-list))))
-+ "")
-+
-+ " { 0, 0 }
-+ };
-+ int i;
-+
-+ for (i = 0; labels[i].label != 0; ++i)
-+ {
-+#if FAST_P
-+ CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
-+#else
-+ CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
-+#endif
-+ }
-+
-+#undef DEFINE_LABELS
-+#endif /* DEFINE_LABELS */
-+
-+#ifdef DEFINE_SWITCH
-+
-+/* If hyper-fast [well not unnecessarily slow] execution is selected, turn
-+ off frills like tracing and profiling. */
-+/* FIXME: A better way would be to have TRACE_RESULT check for something
-+ that can cause it to be optimized out. Another way would be to emit
-+ special handlers into the instruction \"stream\". */
-+
-+#if FAST_P
-+#undef TRACE_RESULT
-+#define TRACE_RESULT(cpu, abuf, name, type, val)
-+#endif
-+
-+#undef GET_ATTR
-+"
-+ (gen-define-with-symcat "GET_ATTR(cpu, num, attr) \
-+CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_" "attr)")
-+"
-+{
-+
-+#if WITH_SCACHE_PBB
-+
-+/* Branch to next handler without going around main loop. */
-+#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
-+SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
-+
-+#else /* ! WITH_SCACHE_PBB */
-+
-+#define NEXT(vpc) BREAK (sem)
-+#ifdef __GNUC__
-+#if FAST_P
-+ SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
-+#else
-+ SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
-+#endif
-+#else
-+ SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
-+#endif
-+
-+#endif /* ! WITH_SCACHE_PBB */
-+
-+ {
-+
-+"
-+
-+ /gen-sem-switch
-+
-+ (if (state-parallel-exec?)
-+ /gen-parallel-sem-switch
-+ "")
-+
-+ "
-+ }
-+ ENDSWITCH (sem) /* End of semantic switch. */
-+
-+ /* At this point `vpc' contains the next insn to execute. */
-+}
-+
-+#undef DEFINE_SWITCH
-+#endif /* DEFINE_SWITCH */
-+"
-+ )
-+)
-+
-+; Generate mainloop.in.
-+; ??? Not currently used.
-+
-+(define (cgen-mainloop.in)
-+ (logit 1 "Generating mainloop.in ...\n")
-+
-+ (string-write
-+ "cat <<EOF >/dev/null\n"
-+ (gen-c-copyright "Simulator main loop for @arch@."
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "EOF\n"
-+ "\
-+
-+# Syntax:
-+# /bin/sh mainloop.in init|support|{full,fast}-{extract,exec}-{scache,nocache}
-+
-+# ??? There's lots of conditional compilation here.
-+# After a few more ports are done, revisit.
-+
-+case \"x$1\" in
-+
-+xsupport)
-+
-+cat <<EOF
-+/*xsupport*/
-+EOF
-+
-+;;
-+
-+xinit)
-+
-+cat <<EOF
-+/*xinit*/
-+EOF
-+
-+;;
-+
-+xfull-extract-* | xfast-extract-*)
-+
-+cat <<EOF
-+{
-+"
-+ (rtl-c VOID #f nil insn-extract #:rtl-cover-fns? #t)
-+"}
-+EOF
-+
-+;;
-+
-+xfull-exec-* | xfast-exec-*)
-+
-+cat <<EOF
-+{
-+"
-+ (rtl-c VOID #f nil insn-execute #:rtl-cover-fns? #t)
-+"}
-+EOF
-+
-+;;
-+
-+*)
-+ echo \"Invalid argument to mainloop.in: $1\" >&2
-+ exit 1
-+ ;;
-+
-+esac
-+"
-+ )
-+)
-diff -Nur binutils-2.24.orig/cgen/sim-decode.scm binutils-2.24/cgen/sim-decode.scm
---- binutils-2.24.orig/cgen/sim-decode.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/sim-decode.scm 2016-06-30 21:26:12.677894046 +0200
-@@ -0,0 +1,594 @@
-+; Decoder generation.
-+; Copyright (C) 2000, 2001, 2009, 2010 Red Hat, Inc.
-+; This file is part of CGEN.
-+
-+; Names of various global vars.
-+
-+; Name of insn descriptor table var.
-+(define IDESC-TABLE-VAR "@prefix@_insn_data")
-+
-+; Return decode entries for each insn.
-+; ??? At one point we generated one variable per instruction rather than one
-+; big array. It doesn't matter too much (yet). Generating one big array is
-+; simpler.
-+
-+(define (/gen-decode-insn-globals insn-list)
-+ ; Print the higher detailed stuff at higher verbosity.
-+ (logit 2 "Processing decode insn globals ...\n")
-+
-+ (string-write
-+
-+ (if (and (with-parallel?) (not (with-parallel-only?)))
-+ "\
-+/* Insn can't be executed in parallel.
-+ Or is that \"do NOt Pass to Air defense Radar\"? :-) */
-+#define NOPAR (-1)
-+\n"
-+ "")
-+
-+ "\
-+/* The instruction descriptor array.
-+ This is computed at runtime. Space for it is not malloc'd to save a
-+ teensy bit of cpu in the decoder. Moving it to malloc space is trivial
-+ but won't be done until necessary (we don't currently support the runtime
-+ addition of instructions nor an SMP machine with different cpus). */
-+static IDESC " IDESC-TABLE-VAR "[@PREFIX@_INSN__MAX];
-+
-+/* Commas between elements are contained in the macros.
-+ Some of these are conditionally compiled out. */
-+
-+static const struct insn_sem @prefix@_insn_sem[] =
-+{\n"
-+
-+ (string-list-map
-+ (lambda (insn)
-+ (let ((name (gen-sym insn))
-+ (pbb? (obj-has-attr? insn 'PBB))
-+ (virtual? (insn-virtual? insn)))
-+ (string-list
-+ " { "
-+ (if virtual?
-+ (string-append "VIRTUAL_INSN_" (string-upcase name) ", ")
-+ (string-append "@ARCH@_INSN_" (string-upcase name) ", "))
-+ (string-append "@PREFIX@_INSN_" (string-upcase name) ", ")
-+ "@PREFIX@_" (/gen-fmt-enum (insn-sfmt insn))
-+ (if (and (with-parallel?) (not (with-parallel-only?)))
-+ (string-list
-+ (if (insn-parallel? insn)
-+ (string-append ", @PREFIX@_INSN_PAR_"
-+ (string-upcase name)
-+ ", "
-+ (if (with-parallel-read?)
-+ "@PREFIX@_INSN_READ_"
-+ "@PREFIX@_INSN_WRITE_")
-+ (string-upcase name))
-+ ", NOPAR, NOPAR "))
-+ "")
-+ " },\n")))
-+ insn-list)
-+
-+ "\
-+};
-+
-+static const struct insn_sem @prefix@_insn_sem_invalid =
-+{
-+ VIRTUAL_INSN_X_INVALID, @PREFIX@_INSN_X_INVALID, @PREFIX@_SFMT_EMPTY"
-+ (if (and (with-parallel?) (not (with-parallel-only?)))
-+ ", NOPAR, NOPAR"
-+ "")
-+ "
-+};
-+\n"
-+ )
-+)
-+
-+; Return enum name of format FMT.
-+
-+(define (/gen-fmt-enum fmt)
-+ (string-upcase (gen-sym fmt))
-+)
-+
-+; Generate decls for the insn descriptor table type IDESC.
-+
-+(define (/gen-idesc-decls)
-+ (string-append "\
-+extern const IDESC *@prefix@_decode (SIM_CPU *, IADDR,
-+ CGEN_INSN_WORD,"
-+ (if (adata-integral-insn? CURRENT-ARCH)
-+ " CGEN_INSN_WORD,\n"
-+ "\n")
-+ "\
-+ ARGBUF *);
-+extern void @prefix@_init_idesc_table (SIM_CPU *);
-+extern void @prefix@_sem_init_idesc_table (SIM_CPU *);
-+extern void @prefix@_semf_init_idesc_table (SIM_CPU *);
-+\n")
-+)
-+
-+; Return definition of C function to initialize the IDESC table.
-+; @prefix@_init_idesc_table is defined here as it depends on with-parallel?
-+; and thus can't be defined in sim/common.
-+
-+(define (/gen-idesc-init-fn)
-+ (string-append "\
-+/* Initialize an IDESC from the compile-time computable parts. */
-+
-+static INLINE void
-+init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t)
-+{
-+ const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries;
-+
-+ id->num = t->index;
-+ id->sfmt = t->sfmt;
-+ if ((int) t->type <= 0)
-+ id->idata = & cgen_virtual_insn_table[- (int) t->type];
-+ else
-+ id->idata = & insn_table[t->type];
-+ id->attrs = CGEN_INSN_ATTRS (id->idata);
-+ /* Oh my god, a magic number. */
-+ id->length = CGEN_INSN_BITSIZE (id->idata) / 8;
-+
-+#if WITH_PROFILE_MODEL_P
-+ id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index];
-+ {
-+ SIM_DESC sd = CPU_STATE (cpu);
-+ SIM_ASSERT (t->index == id->timing->num);
-+ }
-+#endif
-+
-+ /* Semantic pointers are initialized elsewhere. */
-+}
-+
-+/* Initialize the instruction descriptor table. */
-+
-+void
-+@prefix@_init_idesc_table (SIM_CPU *cpu)
-+{
-+ IDESC *id,*tabend;
-+ const struct insn_sem *t,*tend;
-+ int tabsize = @PREFIX@_INSN__MAX;
-+ IDESC *table = " IDESC-TABLE-VAR ";
-+
-+ memset (table, 0, tabsize * sizeof (IDESC));
-+
-+ /* First set all entries to the `invalid insn'. */
-+ t = & @prefix@_insn_sem_invalid;
-+ for (id = table, tabend = table + tabsize; id < tabend; ++id)
-+ init_idesc (cpu, id, t);
-+
-+ /* Now fill in the values for the chosen cpu. */
-+ for (t = @prefix@_insn_sem, tend = t + sizeof (@prefix@_insn_sem) / sizeof (*t);
-+ t != tend; ++t)
-+ {
-+ init_idesc (cpu, & table[t->index], t);\n"
-+
-+ (if (and (with-parallel?) (not (with-parallel-only?)))
-+ "\
-+ if (t->par_index != NOPAR)
-+ {
-+ init_idesc (cpu, &table[t->par_index], t);
-+ table[t->index].par_idesc = &table[t->par_index];
-+ }\n"
-+ "")
-+
-+ (if (and (with-parallel-write?) (not (with-parallel-only?)))
-+ "\
-+ if (t->par_index != NOPAR)
-+ {
-+ init_idesc (cpu, &table[t->write_index], t);
-+ table[t->par_index].par_idesc = &table[t->write_index];
-+ }\n"
-+ "")
-+
-+ "\
-+ }
-+
-+ /* Link the IDESC table into the cpu. */
-+ CPU_IDESC (cpu) = table;
-+}
-+
-+")
-+)
-+
-+; Instruction field extraction support.
-+; Two implementations are provided, one for !with-scache and one for
-+; with-scache.
-+;
-+; Extracting ifields is a three phase process. First the ifields are
-+; extracted and stored in local variables. Then any ifields requiring
-+; additional processing for operands are handled. Then in the with-scache
-+; case the results are stored in a struct for later retrieval by the semantic
-+; code.
-+;
-+; The !with-scache case does this processing in the semantic function,
-+; except it doesn't need the last step (it doesn't need to store the results
-+; in a struct for later use).
-+;
-+; The with-scache case extracts the ifields in the decode function.
-+; Furthermore, we use <sformat-argbuf> to reduce the quantity of structures
-+; created (this helps semantic-fragment pbb engines).
-+
-+; Return C code to record <ifield> F for the semantic handler
-+; in a local variable rather than an ARGBUF struct.
-+
-+(define (/gen-record-argbuf-ifld f sfmt)
-+ (string-append " " (gen-ifld-argbuf-ref f)
-+ " = " (gen-extracted-ifld-value f) ";\n")
-+)
-+
-+; Return three of arguments to TRACE:
-+; string argument to fprintf, character indicating type of third arg, value.
-+; The type is one of: x.
-+
-+(define (/gen-trace-argbuf-ifld f sfmt)
-+ (string-append
-+ ; FIXME: Add method to return fprintf format string.
-+ ", \"" (gen-sym f) " 0x%x\""
-+ ", 'x'"
-+ ", " (gen-extracted-ifld-value f))
-+)
-+
-+; Instruction field extraction support cont'd.
-+; Hardware support.
-+
-+; gen-extract method.
-+; For the default case we use the ifield as is, which is output elsewhere.
-+
-+(method-make!
-+ <hardware-base> 'gen-extract
-+ (lambda (self op sfmt local?)
-+ "")
-+)
-+
-+; gen-trace-extract method.
-+; Return appropriate arguments for TRACE_EXTRACT.
-+
-+(method-make!
-+ <hardware-base> 'gen-trace-extract
-+ (lambda (self op sfmt)
-+ "")
-+)
-+
-+; Extract the necessary fields into ARGBUF.
-+
-+(method-make!
-+ <hw-register> 'gen-extract
-+ (lambda (self op sfmt local?)
-+ (if (hw-cache-addr? self)
-+ (string-append " "
-+ (if local?
-+ (gen-hw-index-argbuf-name (op:index op))
-+ (gen-hw-index-argbuf-ref (op:index op)))
-+ " = & "
-+ (gen-cpu-ref (gen-sym (op:type op)))
-+ (gen-array-ref (gen-extracted-ifld-value (op-ifield op)))
-+ ";\n")
-+ ""))
-+)
-+
-+; Return appropriate arguments for TRACE_EXTRACT.
-+
-+(method-make!
-+ <hw-register> 'gen-trace-extract
-+ (lambda (self op sfmt)
-+ (if (hw-cache-addr? self)
-+ (string-append
-+ ; FIXME: Add method to return fprintf format string.
-+ ", \"" (gen-sym op) " 0x%x\""
-+ ", 'x'"
-+ ", " (gen-extracted-ifld-value (op-ifield op)))
-+ ""))
-+)
-+
-+; Extract the necessary fields into ARGBUF.
-+
-+(method-make!
-+ <hw-address> 'gen-extract
-+ (lambda (self op sfmt local?)
-+ (string-append " "
-+ (if local?
-+ (gen-hw-index-argbuf-name (op:index op))
-+ (gen-hw-index-argbuf-ref (op:index op)))
-+ " = "
-+ (gen-extracted-ifld-value (op-ifield op))
-+ ";\n"))
-+)
-+
-+; Return appropriate arguments for TRACE_EXTRACT.
-+
-+(method-make!
-+ <hw-address> 'gen-trace-extract
-+ (lambda (self op sfmt)
-+ (string-append
-+ ; FIXME: Add method to return fprintf format string.
-+ ", \"" (gen-sym op) " 0x%x\""
-+ ", 'x'"
-+ ", " (gen-extracted-ifld-value (op-ifield op))))
-+)
-+
-+; Instruction field extraction support cont'd.
-+; Operand support.
-+
-+; Return C code to record the field for the semantic handler.
-+; In the case of a register, this is usually the address of the register's
-+; value (if CACHE-ADDR).
-+; LOCAL? indicates whether to record the value in a local variable or in
-+; the ARGBUF struct.
-+; ??? Later allow target to provide an `extract' expression.
-+
-+(define (/gen-op-extract op sfmt local?)
-+ (send (op:type op) 'gen-extract op sfmt local?)
-+)
-+
-+; Return three of arguments to TRACE_EXTRACT:
-+; string argument to fprintf, character indicating type of third arg, value.
-+; The type is one of: x.
-+
-+(define (/gen-op-trace-extract op sfmt)
-+ (send (op:type op) 'gen-trace-extract op sfmt)
-+)
-+
-+; Return C code to define local vars to hold processed ifield data for
-+; <sformat> SFMT.
-+; This is used when !with-scache.
-+; Definitions of the extracted ifields is handled elsewhere.
-+
-+(define (gen-sfmt-op-argbuf-defns sfmt)
-+ (let ((operands (sfmt-extracted-operands sfmt)))
-+ (string-list-map (lambda (op)
-+ (let ((var-spec (sfmt-op-sbuf-elm op sfmt)))
-+ (if var-spec
-+ (string-append " "
-+ (cadr var-spec)
-+ " "
-+ (car var-spec)
-+ ";\n")
-+ "")))
-+ operands))
-+)
-+
-+; Return C code to assign values to the local vars that hold processed ifield
-+; data for <sformat> SFMT.
-+; This is used when !with-scache.
-+; Assignment of the extracted ifields is handled elsewhere.
-+
-+(define (gen-sfmt-op-argbuf-assigns sfmt)
-+ (let ((operands (sfmt-extracted-operands sfmt)))
-+ (string-list-map (lambda (op)
-+ (/gen-op-extract op sfmt #t))
-+ operands))
-+)
-+
-+; Instruction field extraction support cont'd.
-+; Emit extraction section of decode function.
-+
-+; Return C code to record insn field data for <sformat> SFMT.
-+; This is used when with-scache.
-+
-+(define (/gen-record-args sfmt)
-+ (let ((operands (sfmt-extracted-operands sfmt))
-+ (iflds (sfmt-needed-iflds sfmt)))
-+ (string-list
-+ " /* Record the fields for the semantic handler. */\n"
-+ (string-list-map (lambda (f) (/gen-record-argbuf-ifld f sfmt))
-+ iflds)
-+ (string-list-map (lambda (op) (/gen-op-extract op sfmt #f))
-+ operands)
-+ " TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "
-+ "\"" (gen-sym sfmt) "\""
-+ (string-list-map (lambda (f) (/gen-trace-argbuf-ifld f sfmt))
-+ iflds)
-+ (string-list-map (lambda (op) (/gen-op-trace-extract op sfmt))
-+ operands)
-+ ", (char *) 0));\n"
-+ ))
-+)
-+
-+; Return C code to record insn field data for profiling.
-+; Also recorded are operands not mentioned in the fields but mentioned
-+; in the semantic code.
-+;
-+; FIXME: Register usage may need to be tracked as an array of longs.
-+; If there are more than 32 regs, we can't know which until build time.
-+; ??? For now we only handle reg sets of 32 or less.
-+;
-+; ??? The other way to obtain register numbers is to defer computing them
-+; until they're actually needed. It will speed up execution when not doing
-+; profiling, though the speed up is only for the extraction phase.
-+; On the other hand the current way has one memory reference per register
-+; number in the profiling routines. For RISC this can be a lose, though for
-+; more complicated instruction sets it could be a win as all the computation
-+; is kept to the extraction phase. If someone wants to put forth some real
-+; data, this might then be changed (or at least noted).
-+
-+(define (/gen-record-profile-args sfmt)
-+ (let ((in-ops (find op-profilable? (sfmt-in-ops sfmt)))
-+ (out-ops (find op-profilable? (sfmt-out-ops sfmt)))
-+ )
-+ (if (and (null? in-ops) (null? out-ops))
-+ ""
-+ (string-list
-+ "#if WITH_PROFILE_MODEL_P\n"
-+ " /* Record the fields for profiling. */\n"
-+ " if (PROFILE_MODEL_P (current_cpu))\n"
-+ " {\n"
-+ (string-list-map (lambda (op) (op:record-profile op sfmt #f))
-+ in-ops)
-+ (string-list-map (lambda (op) (op:record-profile op sfmt #t))
-+ out-ops)
-+ " }\n"
-+ "#endif\n"
-+ )))
-+)
-+
-+; Return C code that extracts the fields of <sformat> SFMT.
-+;
-+; Extraction is based on formats to reduce the amount of code generated.
-+; However, we also need to emit code which records the hardware elements used
-+; by the semantic code. This is currently done by recording this information
-+; with the format.
-+
-+(define (/gen-extract-case sfmt)
-+ (logit 2 "Processing extractor for \"" (sfmt-key sfmt) "\" ...\n")
-+ (string-list
-+ " extract_" (gen-sym sfmt) ":\n"
-+ " {\n"
-+ " const IDESC *idesc = &" IDESC-TABLE-VAR "[itype];\n"
-+ (if (> (length (sfmt-iflds sfmt)) 0)
-+ (string-append
-+ " CGEN_INSN_WORD insn = "
-+ (if (adata-integral-insn? CURRENT-ARCH)
-+ "entire_insn;\n"
-+ "base_insn;\n"))
-+ "")
-+ (gen-define-field-macro sfmt)
-+ (gen-define-ifields (sfmt-iflds sfmt) (sfmt-length sfmt) " " #f)
-+ "\n"
-+ (gen-extract-ifields (sfmt-iflds sfmt) (sfmt-length sfmt) " " #f)
-+ "\n"
-+ (/gen-record-args sfmt)
-+ "\n"
-+ (/gen-record-profile-args sfmt)
-+ (gen-undef-field-macro sfmt)
-+ " return idesc;\n"
-+ " }\n\n"
-+ )
-+)
-+
-+; For each format, return its extraction function.
-+
-+(define (/gen-all-extractors)
-+ (logit 2 "Processing extractors ...\n")
-+ (string-list-map /gen-extract-case (current-sfmt-list))
-+)
-+
-+; Generate top level decoder.
-+; INITIAL-BITNUMS is a target supplied list of bit numbers to use to
-+; build the first decode table. If nil, we compute 8 bits of it (FIXME)
-+; ourselves.
-+; LSB0? is non-#f if bit number 0 is the least significant bit.
-+
-+(define (/gen-decode-fn insn-list initial-bitnums lsb0?)
-+
-+ ; Compute the initial DECODE-BITSIZE as the minimum of all insn lengths.
-+ ; The caller of @prefix@_decode must fetch and pass exactly this number of bits
-+ ; of the instruction.
-+ ; ??? Make this a parameter later but only if necessary.
-+
-+ (let ((decode-bitsize (apply min (map insn-base-mask-length insn-list))))
-+
-+ ; Compute INITIAL-BITNUMS if not supplied.
-+ ; 0 is passed for the start bit (it is independent of lsb0?)
-+ (if (null? initial-bitnums)
-+ (set! initial-bitnums (decode-get-best-bits insn-list nil
-+ 0 ; startbit
-+ 8 ; max
-+ decode-bitsize
-+ lsb0?)))
-+
-+ ; All set. gen-decoder does the hard part, we just print out the result.
-+ (let ((decode-code (gen-decoder insn-list initial-bitnums
-+ decode-bitsize
-+ " " lsb0?
-+ (current-insn-lookup 'x-invalid #f)
-+ #f)))
-+
-+ (string-write
-+ "\
-+/* Given an instruction, return a pointer to its IDESC entry. */
-+
-+const IDESC *
-+@prefix@_decode (SIM_CPU *current_cpu, IADDR pc,
-+ CGEN_INSN_WORD base_insn,"
-+ (if (adata-integral-insn? CURRENT-ARCH)
-+ " CGEN_INSN_WORD entire_insn,\n"
-+ "\n")
-+ "\
-+ ARGBUF *abuf)
-+{
-+ /* Result of decoder. */
-+ @PREFIX@_INSN_TYPE itype;
-+
-+ {
-+ CGEN_INSN_WORD insn = base_insn;
-+\n"
-+
-+ decode-code
-+
-+ "\
-+ }
-+\n"
-+
-+ (if (with-scache?)
-+ (string-list "\
-+ /* The instruction has been decoded, now extract the fields. */\n\n"
-+ /gen-all-extractors)
-+ ; Without the scache, extraction is defered until the semantic code.
-+ (string-list "\
-+ /* Extraction is defered until the semantic code. */
-+
-+ done:
-+ return &" IDESC-TABLE-VAR "[itype];\n"))
-+
-+ "\
-+}\n"
-+ )))
-+)
-+
-+; Entry point. Generate decode.h.
-+
-+(define (cgen-decode.h)
-+ (logit 1 "Generating " (gen-cpu-name) "'s decode.h ...\n")
-+
-+ (sim-analyze-insns!)
-+
-+ ; Turn parallel execution support on if cpu needs it.
-+ (set-with-parallel?! (state-parallel-exec?))
-+
-+ (string-write
-+ (gen-c-copyright "Decode header for @prefix@."
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "\
-+#ifndef @PREFIX@_DECODE_H
-+#define @PREFIX@_DECODE_H
-+
-+"
-+ /gen-idesc-decls
-+ (lambda () (gen-cpu-insn-enum-decl (current-cpu)
-+ (non-multi-insns (non-alias-insns (current-insn-list)))))
-+ (lambda () (gen-sfmt-enum-decl (current-sfmt-list)))
-+ gen-model-fn-decls
-+ "#endif /* @PREFIX@_DECODE_H */\n"
-+ )
-+)
-+
-+; Entry point. Generate decode.c.
-+
-+(define (cgen-decode.c)
-+ (logit 1 "Generating " (gen-cpu-name) "'s decode.c ...\n")
-+
-+ (sim-analyze-insns!)
-+
-+ ; Turn parallel execution support on if cpu needs it.
-+ (set-with-parallel?! (state-parallel-exec?))
-+
-+ ; Tell the rtx->c translator we are the simulator.
-+ (rtl-c-config! #:rtl-cover-fns? #t)
-+
-+ (string-write
-+ (gen-c-copyright "Simulator instruction decoder for @prefix@."
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "\
-+#define WANT_CPU @cpu@
-+#define WANT_CPU_@CPU@
-+
-+#include \"sim-main.h\"
-+#include \"sim-assert.h\"\n\n"
-+
-+ (lambda () (/gen-decode-insn-globals (non-multi-insns (non-alias-insns (current-insn-list)))))
-+ /gen-idesc-init-fn
-+ (lambda () (/gen-decode-fn (real-insns (current-insn-list))
-+ (state-decode-assist)
-+ (current-arch-insn-lsb0?)))
-+ )
-+)
-diff -Nur binutils-2.24.orig/cgen/sim-model.scm binutils-2.24/cgen/sim-model.scm
---- binutils-2.24.orig/cgen/sim-model.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/sim-model.scm 2016-06-30 21:26:12.677894046 +0200
-@@ -0,0 +1,401 @@
-+; Simulator model support, plus misc. things associated with a cpu family.
-+; Copyright (C) 2000, 2003, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+
-+; Return C code to define cpu implementation properties.
-+
-+(define (unit:enum u)
-+ (gen-c-symbol (string-append "UNIT_"
-+ (string-upcase (obj:str-name (unit:model u)))
-+ "_"
-+ (string-upcase (obj:str-name u))))
-+)
-+
-+(define (/gen-cpu-imp-properties)
-+ (string-list
-+ "\
-+/* The properties of this cpu's implementation. */
-+
-+static const MACH_IMP_PROPERTIES @cpu@_imp_properties =
-+{
-+ sizeof (SIM_CPU),
-+#if WITH_SCACHE
-+ sizeof (SCACHE)
-+#else
-+ 0
-+#endif
-+};\n\n"
-+ )
-+)
-+
-+; Insn modeling support.
-+
-+; Generate code to profile hardware elements.
-+; ??? Not currently used.
-+
-+(define (/gen-hw-profile-code)
-+ ; Fetch profilable input and output operands of the semantic code.
-+ (let ((in-ops (find op-profilable? (sfmt-in-ops (insn-sfmt insn))))
-+ (out-ops (find op-profilable? (sfmt-out-ops (insn-sfmt insn)))))
-+ (string-list
-+ ; For each operand, record its being get/set.
-+ (string-list-map (lambda (op) (send op 'gen-profile-code insn #f))
-+ in-ops)
-+ (string-list-map (lambda (op) (send op 'gen-profile-code insn #t))
-+ out-ops)
-+ ))
-+)
-+
-+; Return decls of hardware element profilers.
-+; ??? Not currently used.
-+
-+(define (/gen-hw-profile-decls)
-+ (string-list
-+ "/* Hardware profiling handlers. */\n\n"
-+ (string-list-map (lambda (hw)
-+ (string-append "extern void @cpu@_model_mark_get_"
-+ (gen-sym hw) " (SIM_CPU *"
-+ (if (hw-scalar? hw)
-+ ""
-+ ", int") ; FIXME: get index type
-+ ");\n"
-+ "extern void @cpu@_model_mark_set_"
-+ (gen-sym hw) " (SIM_CPU *"
-+ (if (hw-scalar? hw)
-+ ""
-+ ", int") ; FIXME: get index type
-+ ");\n"))
-+ (find hw-profilable? (current-hw-list)))
-+ "\n"
-+ )
-+)
-+
-+; Return name of profiling handler for MODEL, UNIT.
-+; Also called by sim.scm.
-+
-+(define (gen-model-unit-fn-name model unit)
-+ (string-append "@cpu@_model_" (gen-sym model) "_" (gen-sym unit))
-+)
-+
-+; Return decls of all insn model handlers.
-+; This is called from sim-decode.scm.
-+
-+(define (gen-model-fn-decls)
-+ (let ((gen-args (lambda (args)
-+ (gen-c-args (map (lambda (arg)
-+ (stringsym-append
-+ (mode:c-type (mode:lookup (cadr arg)))
-+ " /*" (car arg) "*/"))
-+ (find (lambda (arg)
-+ ; Indices of scalars not passed.
-+ (not (null? (cdr arg))))
-+ args)))))
-+ )
-+
-+ (string-list
-+ ; /gen-hw-profile-decls
-+ "/* Function unit handlers (user written). */\n\n"
-+ (string-list-map
-+ (lambda (model)
-+ (string-list-map (lambda (unit)
-+ (stringsym-append
-+ "extern int "
-+ (gen-model-unit-fn-name model unit)
-+ " (SIM_CPU *, const IDESC *,"
-+ " int /*unit_num*/, int /*referenced*/"
-+ (gen-args (unit:inputs unit))
-+ (gen-args (unit:outputs unit))
-+ ");\n"))
-+ (model:units model)))
-+ (current-model-list))
-+ "\n"
-+ "/* Profiling before/after handlers (user written) */\n\n"
-+ "extern void @cpu@_model_insn_before (SIM_CPU *, int /*first_p*/);\n"
-+ "extern void @cpu@_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/);\n"
-+ "\n"
-+ ))
-+)
-+
-+; Return name of profile handler for INSN, MODEL.
-+
-+(define (/gen-model-insn-fn-name model insn)
-+ (string-append "model_" (gen-sym model) "_" (gen-sym insn))
-+)
-+
-+; Return function to model INSN.
-+
-+(define (/gen-model-insn-fn model insn)
-+ (logit 2 "Processing modeling for " (obj:name insn) ": \"" (insn-syntax insn) "\" ...\n")
-+ (string-list
-+ "static int\n"
-+ (/gen-model-insn-fn-name model insn)
-+ ; sem_arg is a void * to keep cgen specific stuff out of sim-model.h
-+ " (SIM_CPU *current_cpu, void *sem_arg)\n"
-+ "{\n"
-+ (if (with-scache?)
-+ (gen-define-field-macro (insn-sfmt insn))
-+ "")
-+ " const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);\n"
-+ " const IDESC * UNUSED idesc = abuf->idesc;\n"
-+ ; or: idesc = & CPU_IDESC (current_cpu) ["
-+ ; (gen-cpu-insn-enum (mach-cpu (model:mach model)) insn)
-+ ; "];\n"
-+ " int cycles = 0;\n"
-+ (send insn 'gen-profile-locals model)
-+ (if (with-scache?)
-+ ""
-+ (string-list
-+ " IADDR UNUSED pc = GET_H_PC ();\n"
-+ " CGEN_INSN_WORD insn = abuf->insn;\n"
-+ (gen-define-ifmt-ifields (insn-ifmt insn) " " #f #t)
-+ (gen-sfmt-op-argbuf-defns (insn-sfmt insn))
-+ (gen-extract-ifmt-ifields (insn-ifmt insn) " " #f #t)
-+ (gen-sfmt-op-argbuf-assigns (insn-sfmt insn))))
-+ ; Emit code to model the insn. Function units are handled here.
-+ (send insn 'gen-profile-code model "cycles")
-+ " return cycles;\n"
-+ (if (with-scache?)
-+ (gen-undef-field-macro (insn-sfmt insn))
-+ "")
-+ "}\n\n")
-+)
-+
-+; Return insn modeling handlers.
-+; ??? Might wish to reduce the amount of output by combining identical cases.
-+; ??? Modelling of insns could be table driven, but that puts constraints on
-+; generality.
-+
-+(define (/gen-model-insn-fns)
-+ (string-write
-+ "/* Model handlers for each insn. */\n\n"
-+ (lambda () (string-write-map
-+ (lambda (model)
-+ (string-write-map
-+ (lambda (insn) (/gen-model-insn-fn model insn))
-+ (real-insns (current-insn-list))))
-+ (current-model-list)))
-+ )
-+)
-+
-+; Generate timing table entry for function unit U while executing INSN.
-+; U is a <unit> object.
-+; ARGS is a list of overriding arguments from INSN.
-+
-+(define (/gen-insn-unit-timing model insn u args)
-+ (string-append
-+ "{ "
-+ "(int) " (unit:enum u) ", "
-+ (number->string (unit:issue u)) ", "
-+ (let ((cycles (assq-ref args 'cycles)))
-+ (if cycles
-+ (number->string (car cycles))
-+ (number->string (unit:done u))))
-+ " }, "
-+ )
-+)
-+
-+; Generate timing table entry for MODEL for INSN.
-+
-+(define (/gen-insn-timing model insn)
-+ ; Instruction timing is stored as an associative list based on the model.
-+ (let ((timing (assq (obj:name model) (insn-timing insn))))
-+ ;(display timing) (newline)
-+ (string-list
-+ " { "
-+ (gen-cpu-insn-enum (mach-cpu (model:mach model)) insn)
-+ ", "
-+ (if (obj-has-attr? insn 'VIRTUAL)
-+ "0"
-+ (/gen-model-insn-fn-name model insn))
-+ ", { "
-+ (string-drop
-+ -2
-+ (if (not timing)
-+ (/gen-insn-unit-timing model insn (model-default-unit model) nil)
-+ (let ((units (timing:units (cdr timing))))
-+ (string-map (lambda (iunit)
-+ (/gen-insn-unit-timing model insn
-+ (iunit:unit iunit)
-+ (iunit:args iunit)))
-+ units))))
-+ " } },\n"
-+ ))
-+)
-+
-+; Generate model timing table for MODEL.
-+
-+(define (/gen-model-timing-table model)
-+ (string-write
-+ "/* Model timing data for `" (obj:str-name model) "'. */\n\n"
-+ "static const INSN_TIMING " (gen-sym model) "_timing[] = {\n"
-+ (lambda () (string-write-map (lambda (insn) (/gen-insn-timing model insn))
-+ (non-alias-insns (current-insn-list))))
-+ "};\n\n"
-+ )
-+)
-+
-+; Return C code to define model profiling support stuff.
-+
-+(define (/gen-model-profile-data)
-+ (string-write
-+ "/* We assume UNIT_NONE == 0 because the tables don't always terminate\n"
-+ " entries with it. */\n\n"
-+ (lambda () (string-write-map /gen-model-timing-table (current-model-list)))
-+ )
-+)
-+
-+; Return C code to define the model table for MACH.
-+
-+(define (/gen-mach-model-table mach)
-+ (string-list
-+ "\
-+static const MODEL " (gen-sym mach) "_models[] =\n{\n"
-+ (string-list-map (lambda (model)
-+ (string-list " { "
-+ "\"" (obj:str-name model) "\", "
-+ "& " (gen-sym (model:mach model)) "_mach, "
-+ (model:enum model) ", "
-+ "TIMING_DATA (& "
-+ (gen-sym model)
-+ "_timing[0]), "
-+ (gen-sym model) "_model_init"
-+ " },\n"))
-+ (find (lambda (model) (eq? (obj:name mach)
-+ (obj:name (model:mach model))))
-+ (current-model-list)))
-+ " { 0 }\n"
-+ "};\n\n"
-+ )
-+)
-+
-+; Return C code to define model init fn.
-+
-+(define (/gen-model-init-fn model)
-+ (string-list "\
-+static void\n"
-+(gen-sym model) "_model_init (SIM_CPU *cpu)
-+{
-+ CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_"
-+ (string-upcase (gen-sym model))
-+ "_DATA));
-+}\n\n"
-+ )
-+)
-+
-+; Return C code to define model data and support fns.
-+
-+(define (/gen-model-defns)
-+ (string-write
-+ (lambda () (string-write-map /gen-model-init-fn (current-model-list)))
-+ "#if WITH_PROFILE_MODEL_P
-+#define TIMING_DATA(td) td
-+#else
-+#define TIMING_DATA(td) 0
-+#endif\n\n"
-+ (lambda () (string-write-map /gen-mach-model-table (current-mach-list)))
-+ )
-+)
-+
-+; Return C definitions for this cpu family variant.
-+
-+(define (/gen-cpu-defns)
-+ (string-list "\
-+
-+static void
-+@cpu@_prepare_run (SIM_CPU *cpu)
-+{
-+ if (CPU_IDESC (cpu) == NULL)
-+ @prefix@_init_idesc_table (cpu);
-+}
-+
-+static const CGEN_INSN *
-+@cpu@_get_idata (SIM_CPU *cpu, int inum)
-+{
-+ return CPU_IDESC (cpu) [inum].idata;
-+}
-+
-+")
-+)
-+
-+; Return C code to define the machine data.
-+
-+(define (/gen-mach-defns)
-+ (string-list-map
-+ (lambda (mach)
-+ (gen-obj-sanitize
-+ mach
-+ (string-list "\
-+static void\n"
-+(gen-sym mach) "_init_cpu (SIM_CPU *cpu)
-+{
-+ CPU_REG_FETCH (cpu) = " (gen-sym (mach-cpu mach)) "_fetch_register;
-+ CPU_REG_STORE (cpu) = " (gen-sym (mach-cpu mach)) "_store_register;
-+ CPU_PC_FETCH (cpu) = " (gen-sym (mach-cpu mach)) "_h_pc_get;
-+ CPU_PC_STORE (cpu) = " (gen-sym (mach-cpu mach)) "_h_pc_set;
-+ CPU_GET_IDATA (cpu) = @cpu@_get_idata;
-+ CPU_MAX_INSNS (cpu) = @PREFIX@_INSN__MAX;
-+ CPU_INSN_NAME (cpu) = cgen_insn_name;
-+ CPU_FULL_ENGINE_FN (cpu) = @prefix@_engine_run_full;
-+#if WITH_FAST
-+ CPU_FAST_ENGINE_FN (cpu) = @prefix@_engine_run_fast;
-+#else
-+ CPU_FAST_ENGINE_FN (cpu) = @prefix@_engine_run_full;
-+#endif
-+}
-+
-+const MACH " (gen-sym mach) "_mach =
-+{
-+ \"" (obj:str-name mach) "\", "
-+ "\"" (mach-bfd-name mach) "\", "
-+ (mach-enum mach) ",\n"
-+ " " (number->string (cpu-word-bitsize (mach-cpu mach))) ", "
-+ ; FIXME: addr-bitsize: delete
-+ (number->string (cpu-word-bitsize (mach-cpu mach))) ", "
-+ "& " (gen-sym mach) "_models[0], "
-+ "& " (gen-sym (mach-cpu mach)) "_imp_properties,
-+ " (gen-sym mach) "_init_cpu,
-+ @cpu@_prepare_run
-+};
-+
-+")))
-+
-+ (current-mach-list))
-+)
-+
-+; Top level file generators.
-+
-+; Generate model.c
-+
-+(define (cgen-model.c)
-+ (logit 1 "Generating " (gen-cpu-name) "'s model.c ...\n")
-+
-+ (sim-analyze-insns!)
-+
-+ ; Turn parallel execution support on if cpu needs it.
-+ (set-with-parallel?! (state-parallel-exec?))
-+
-+ (string-write
-+ (gen-c-copyright "Simulator model support for @cpu@."
-+ CURRENT-COPYRIGHT CURRENT-PACKAGE)
-+ "\
-+#define WANT_CPU @cpu@
-+#define WANT_CPU_@CPU@
-+
-+#include \"sim-main.h\"
-+
-+/* The profiling data is recorded here, but is accessed via the profiling
-+ mechanism. After all, this is information for profiling. */
-+
-+#if WITH_PROFILE_MODEL_P
-+
-+"
-+ /gen-model-insn-fns
-+ /gen-model-profile-data
-+"#endif /* WITH_PROFILE_MODEL_P */\n\n"
-+
-+ /gen-model-defns
-+ /gen-cpu-imp-properties
-+ /gen-cpu-defns
-+ /gen-mach-defns
-+ )
-+)
-diff -Nur binutils-2.24.orig/cgen/sim.scm binutils-2.24/cgen/sim.scm
---- binutils-2.24.orig/cgen/sim.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/sim.scm 2016-06-30 21:26:12.677894046 +0200
-@@ -0,0 +1,2168 @@
-+; Simulator generator support routines.
-+; Copyright (C) 2000, 2001, 2002, 2006, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+
-+; One goal of this file is to provide cover functions for all methods.
-+; i.e. this file fills in the missing pieces of the interface between
-+; the application independent part of CGEN (i.e. the code loaded by read.scm)
-+; and the application dependent part (i.e. sim-*.scm).
-+; `send' is not intended to appear in sim-*.scm.
-+; [It still does but that's to be fixed.]
-+
-+; Specify which application.
-+(set! APPLICATION 'SIMULATOR)
-+
-+; Cover functions for various methods.
-+
-+; Return the C type of something. This isn't always a mode.
-+
-+(define (gen-type self) (send self 'gen-type))
-+
-+; Return the C type of an index's value or #f if not needed (scalar).
-+
-+(define (gen-index-type op sfmt)
-+ (let ((index-mode (send op 'get-index-mode)))
-+ (if index-mode
-+ (mode:c-type index-mode)
-+ #f))
-+)
-+
-+; Misc. state info.
-+
-+; Currently supported options:
-+; with-scache
-+; generate code to use the scache
-+; This is an all or nothing option, either scache is used or it's not.
-+; with-profile fn|sw
-+; generate code to do profiling in the semantic function
-+; code (fn) or in the semantic switch (sw)
-+; with-generic-write
-+; For architectures that have parallel execution.
-+; Execute the semantics by recording the results in a generic buffer,
-+; and doing a post-semantics writeback pass.
-+; with-parallel-only
-+; Only generate parallel versions of each insn.
-+; with-multiple-isa
-+; Enable multiple-isa support (eg. arm+thumb).
-+; copyright fsf|redhat
-+; emit an FSF or Cygnus copyright (temporary, pending decision)
-+; package gnusim|cygsim
-+; indicate the software package
-+
-+; #t if the scache is being used
-+(define /with-scache? #f)
-+(define (with-scache?) /with-scache?)
-+
-+; #t if we're generating profiling code
-+; Each of the function and switch semantic code can have profiling.
-+; The options as passed are stored in /with-profile-{fn,sw}?, and
-+; /with-profile? is set at code generation time.
-+(define /with-profile-fn? #f)
-+(define /with-profile-sw? #f)
-+(define /with-profile? #f)
-+(define (with-profile?) /with-profile?)
-+(define (with-any-profile?) (or /with-profile-fn? /with-profile-sw?))
-+
-+; #t if multiple isa support is enabled
-+(define /with-multiple-isa? #f)
-+(define (with-multiple-isa?) /with-multiple-isa?)
-+
-+; Handle parallel execution with generic writeback pass.
-+(define /with-generic-write? #f)
-+(define (with-generic-write?) /with-generic-write?)
-+
-+; Only generate parallel versions of each insn.
-+(define /with-parallel-only? #f)
-+(define (with-parallel-only?) /with-parallel-only?)
-+
-+; String containing copyright text.
-+(define CURRENT-COPYRIGHT #f)
-+
-+; String containing text defining the package we're generating code for.
-+(define CURRENT-PACKAGE #f)
-+
-+; Initialize the options.
-+
-+(define (option-init!)
-+ (set! /with-scache? #f)
-+ (set! /with-profile-fn? #f)
-+ (set! /with-profile-sw? #f)
-+ (set! /with-multiple-isa? #f)
-+ (set! /with-generic-write? #f)
-+ (set! /with-parallel-only? #f)
-+ (set! CURRENT-COPYRIGHT copyright-fsf)
-+ (set! CURRENT-PACKAGE package-gnu-simulators)
-+ *UNSPECIFIED*
-+)
-+
-+; Handle an option passed in from the command line.
-+
-+(define (option-set! name value)
-+ (case name
-+ ((with-scache) (set! /with-scache? #t))
-+ ((with-profile) (cond ((equal? value '("fn"))
-+ (set! /with-profile-fn? #t))
-+ ((equal? value '("sw"))
-+ (set! /with-profile-sw? #t))
-+ (else (error "invalid with-profile value" value))))
-+ ((with-multiple-isa) (set! /with-multiple-isa? #t))
-+ ((with-generic-write) (set! /with-generic-write? #t))
-+ ((with-parallel-only) (set! /with-parallel-only? #t))
-+ ((copyright) (cond ((equal? value '("fsf"))
-+ (set! CURRENT-COPYRIGHT copyright-fsf))
-+ ((equal? value '("redhat"))
-+ (set! CURRENT-COPYRIGHT copyright-red-hat))
-+ (else (error "invalid copyright value" value))))
-+ ((package) (cond ((equal? value '("gnusim"))
-+ (set! CURRENT-PACKAGE package-gnu-simulators))
-+ ((equal? value '("cygsim"))
-+ (set! CURRENT-PACKAGE package-red-hat-simulators))
-+ (else (error "invalid package value" value))))
-+ (else (error "unknown option" name))
-+ )
-+ *UNSPECIFIED*
-+)
-+
-+; #t if the cpu can execute insns parallely.
-+; This one isn't passed on the command line, but we follow the convention
-+; of prefixing these things with `with-'.
-+; While processing operand reading (or writing), parallel execution support
-+; needs to be turned off, so it is up to the appropriate cgen-foo.c proc to
-+; set-with-parallel?! appropriately.
-+(define /with-parallel? #f)
-+(define (with-parallel?) /with-parallel?)
-+(define (set-with-parallel?! flag) (set! /with-parallel? flag))
-+
-+; Kind of parallel support.
-+; If 'read, read pre-processing is done.
-+; If 'write, write post-processing is done.
-+; ??? At present we always use write post-processing, though the previous
-+; version used read pre-processing. Not sure supporting both is useful
-+; in the long run.
-+(define /with-parallel-kind 'write)
-+; #t if parallel support is provided by read pre-processing.
-+(define (with-parallel-read?)
-+ (and /with-parallel? (eq? /with-parallel-kind 'read))
-+)
-+; #t if parallel support is provided by write post-processing.
-+(define (with-parallel-write?)
-+ (and /with-parallel? (eq? /with-parallel-kind 'write))
-+)
-+
-+; Misc. utilities.
-+
-+; All machine generated cpu elements are accessed through a cover macro
-+; to hide the details of the underlying implementation.
-+
-+(define c-cpu-macro "CPU")
-+
-+(define (gen-cpu-ref sym)
-+ (string-append c-cpu-macro " (" sym ")")
-+)
-+
-+
-+; Return C code to fetch a value from instruction memory.
-+; PC-VAR is the C expression containing the address of the start of the
-+; instruction.
-+; ??? Aligned/unaligned support?
-+
-+(define (gen-ifetch pc-var bitoffset bitsize)
-+ (string-append "GETIMEM"
-+ (case bitsize
-+ ((8) "UQI")
-+ ((16) "UHI")
-+ ((32) "USI")
-+ (else (error "bad bitsize argument to gen-ifetch" bitsize)))
-+ " (current_cpu, "
-+ pc-var " + " (number->string (quotient bitoffset 8))
-+ ")")
-+)
-+
-+; Instruction field support code.
-+
-+; Return a <c-expr> object of the value of an ifield.
-+
-+(define (/cxmake-ifld-val mode f)
-+ (if (with-scache?)
-+ ; ??? Perhaps a better way would be to defer evaluating the src of a
-+ ; set until the method processing the dest.
-+ (cx:make-with-atlist mode (gen-ifld-argbuf-ref f)
-+ (atlist-make "" (bool-attr-make 'CACHED #t)))
-+ (cx:make mode (gen-extracted-ifld-value f)))
-+)
-+
-+; Type system.
-+
-+; Methods:
-+; gen-type - return C code representing the type
-+; gen-sym-defn - generate decl using the provided symbol
-+; gen-sym-get-macro - generate GET macro for accessing CPU elements
-+; gen-sym-set-macro - generate SET macro for accessing CPU elements
-+
-+; Scalar type
-+
-+(method-make!
-+ <scalar> 'gen-type
-+ (lambda (self) (mode:c-type (elm-get self 'mode)))
-+)
-+
-+(method-make!
-+ <scalar> 'gen-sym-defn
-+ (lambda (self sym comment)
-+ (string-append
-+ " /* " comment " */\n"
-+ " " (send self 'gen-type) " "
-+ (gen-c-symbol sym) ";\n"))
-+)
-+
-+(method-make!
-+ <scalar> 'gen-sym-get-macro
-+ (lambda (self sym comment)
-+ (let ((sym (gen-c-symbol sym)))
-+ (gen-get-macro sym "" (gen-cpu-ref sym))))
-+)
-+
-+(method-make!
-+ <scalar> 'gen-sym-set-macro
-+ (lambda (self sym comment)
-+ (let ((sym (gen-c-symbol sym)))
-+ (gen-set-macro sym "" (gen-cpu-ref sym))))
-+)
-+
-+(method-make! <scalar> 'gen-ref (lambda (self sym index estate) sym))
-+
-+; Array type
-+
-+(method-make!
-+ <array> 'gen-type
-+ (lambda (self) (mode:c-type (elm-get self 'mode)))
-+)
-+
-+(method-make!
-+ <array> 'gen-sym-defn
-+ (lambda (self sym comment)
-+ (string-append
-+ " /* " comment " */\n"
-+ " " (send self 'gen-type) " "
-+ (gen-c-symbol sym)
-+ (gen-array-ref (elm-get self 'dimensions))
-+ ";\n")
-+ )
-+)
-+
-+(method-make!
-+ <array> 'gen-sym-get-macro
-+ (lambda (self sym comment)
-+ (let ((sym (gen-c-symbol sym))
-+ (rank (length (elm-get self 'dimensions))))
-+ (string-append
-+ "#define GET_" (string-upcase sym)
-+ "(" (string-drop 2 (gen-macro-args rank)) ") "
-+ (gen-cpu-ref sym) (gen-array-ref (macro-args rank)) "\n"
-+ )))
-+)
-+
-+(method-make!
-+ <array> 'gen-sym-set-macro
-+ (lambda (self sym comment)
-+ (let ((sym (gen-c-symbol sym))
-+ (rank (length (elm-get self 'dimensions))))
-+ (string-append
-+ "#define SET_" (string-upcase sym)
-+ "(" (string-drop 2 (gen-macro-args rank)) ", x) "
-+ "(" (gen-cpu-ref sym) (gen-array-ref (macro-args rank))
-+ " = (x))\n"
-+ )))
-+)
-+
-+; Return a reference to the array.
-+; SYM is the name of the array.
-+; INDEX is either a single index object or a (possibly empty) list of objects,
-+; one object per dimension.
-+
-+(method-make!
-+ <array> 'gen-ref
-+ (lambda (self sym index estate)
-+ (let ((gen-index1 (lambda (idx)
-+ (string-append "["
-+ (/gen-hw-index idx estate)
-+ "]"))))
-+ (string-append sym
-+ (cond ((list? index) (string-map gen-index1 index))
-+ (else (gen-index1 index))))))
-+)
-+
-+; Integers
-+;
-+;(method-make!
-+; <integer> 'gen-type
-+; (lambda (self)
-+; (mode:c-type (mode-find (elm-get self 'bits)
-+; (if (has-attr? self 'UNSIGNED)
-+; 'UINT 'INT)))
-+; )
-+;)
-+;
-+;(method-make! <integer> 'gen-sym-defn (lambda (self sym comment) ""))
-+;(method-make! <integer> 'gen-sym-get-macro (lambda (self sym comment) ""))
-+;(method-make! <integer> 'gen-sym-set-macro (lambda (self sym comment) ""))
-+
-+; Hardware descriptions support code.
-+;
-+; Various operations are required for each h/w object to support the various
-+; things the simulator will want to do with it.
-+;
-+; Methods:
-+; gen-type - C type to use to record value, as a string.
-+; ??? Delete and just use get-mode?
-+; gen-defn - generate a definition of the h/w element
-+; gen-get-macro - Generate definition of the GET access macro.
-+; gen-set-macro - Generate definition of the SET access macro.
-+; gen-write - Same as gen-read except done on output operands
-+; cxmake-get - Return a <c-expr> object to fetch the value.
-+; gen-set-quiet - Set the value.
-+; ??? Could just call this gen-set as there is no gen-set-trace
-+; but for consistency with the messages passed to operands
-+; we use this same.
-+; save-index? - return #t if an index needs to be saved for parallel
-+; execution post-write processing
-+; gen-profile-decl
-+; gen-record-profile
-+; get-mode
-+; gen-profile-locals
-+; gen-sym-get-macro - Generate default GET access macro.
-+; gen-sym-set-macro - Generate default SET access macro.
-+; gen-ref - Return a C reference to the object.
-+
-+; gen-type handler, must be overridden.
-+
-+(method-make!
-+ <hardware-base> 'gen-type
-+ (lambda (self) (error "gen-type not overridden:" self))
-+)
-+
-+; Generate CPU state struct entries, must be overridden.
-+
-+(method-make!
-+ <hardware-base> 'gen-defn
-+ (lambda (self) (error "gen-defn not overridden:" self))
-+)
-+
-+(method-make! <hardware-base> 'gen-sym-decl (lambda (self sym comment) ""))
-+
-+; Return a C reference to a hardware object.
-+
-+(method-make! <hardware-base> 'gen-ref (lambda (self sym index estate) sym))
-+
-+; Each hardware type must provide its own gen-write method.
-+
-+(method-make!
-+ <hardware-base> 'gen-write
-+ (lambda (self estate index mode sfmt op access-macro)
-+ (error "gen-write method not overridden:" self))
-+)
-+
-+(method-make! <hardware-base> 'gen-profile-decl (lambda (self) ""))
-+
-+; Default gen-record-profile method.
-+
-+(method-make!
-+ <hardware-base> 'gen-record-profile
-+ (lambda (self index sfmt estate)
-+ "") ; nothing to do
-+)
-+
-+; Default cxmake-get method.
-+; Return a <c-expr> object of the value of SELF.
-+; ESTATE is the current rtl evaluator state.
-+; INDEX is a <hw-index> object. It must be an ifield.
-+; SELECTOR is a hardware selector RTX.
-+
-+(method-make!
-+ <hardware-base> 'cxmake-get
-+ (lambda (self estate mode index selector)
-+ (if (not (eq? 'ifield (hw-index:type index)))
-+ (error "not an ifield hw-index" index))
-+ (/cxmake-ifld-val mode (hw-index:value index)))
-+)
-+
-+; Handle gen-get-macro/gen-set-macro.
-+
-+(method-make!
-+ <hardware-base> 'gen-get-macro
-+ (lambda (self)
-+ "")
-+)
-+
-+(method-make!
-+ <hardware-base> 'gen-set-macro
-+ (lambda (self)
-+ "")
-+)
-+
-+; PC support
-+
-+; 'gen-set-quiet helper for PC values.
-+; NEWVAL is a <c-expr> object of the value to be assigned.
-+; If OPTIONS contains #:direct, set the PC directly, bypassing semantic
-+; code considerations.
-+; ??? OPTIONS support wip. Probably want a new form (or extend existing form)
-+; of rtx: that takes a variable number of named arguments.
-+; ??? Another way to get #:direct might be (raw-reg h-pc).
-+
-+(define (/hw-gen-set-quiet-pc self estate mode index selector newval . options)
-+ (if (not (send self 'pc?)) (error "Not a PC:" self))
-+ (cond ((memq #:direct options)
-+ (/hw-gen-set-quiet self estate mode index selector newval))
-+ ((has-attr? newval 'CACHED)
-+ (string-append "SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, "
-+ (cx:c newval)
-+ ", vpc);\n"))
-+ (else
-+ (string-append "SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, "
-+ (cx:c newval)
-+ ", vpc);\n")))
-+)
-+
-+(method-make! <hw-pc> 'gen-set-quiet /hw-gen-set-quiet-pc)
-+
-+; Handle updates of the pc during parallel execution.
-+; This is done in a post-processing pass after semantic evaluation.
-+; SFMT is the <sformat>.
-+; OP is the operand.
-+; ACCESS-MACRO is the runtime C macro to use to fetch indices computed
-+; during semantic evaluation.
-+;
-+; ??? This wouldn't be necessary if gen-set-quiet were a virtual method.
-+; At this point I'm reluctant to willy nilly make methods virtual.
-+
-+(method-make!
-+ <hw-pc> 'gen-write
-+ (lambda (self estate index mode sfmt op access-macro)
-+ (string-append " "
-+ (send self 'gen-set-quiet estate VOID index hw-selector-default
-+ (cx:make DFLT (string-append access-macro
-+ " (" (gen-sym op) ")")))))
-+)
-+
-+(method-make!
-+ <hw-pc> 'cxmake-skip
-+ (lambda (self estate yes?)
-+ (cx:make VOID
-+ (string-append "if ("
-+ yes?
-+ ")\n"
-+ " SEM_SKIP_INSN (current_cpu, sem_arg, vpc);\n")))
-+)
-+
-+; Registers.
-+
-+(method-make-forward! <hw-register> 'type '(gen-type))
-+
-+(method-make!
-+ <hw-register> 'gen-defn
-+ (lambda (self)
-+ (send (elm-get self 'type) 'gen-sym-defn (obj:name self) (obj:comment self)))
-+)
-+
-+(method-make-forward! <hw-register> 'type '(gen-ref
-+ gen-sym-get-macro
-+ gen-sym-set-macro))
-+
-+; For parallel instructions supported by queueing outputs for later update,
-+; return a boolean indicating if an index needs to be recorded.
-+; An example of when the index isn't needed is if the index can be determined
-+; during extraction.
-+
-+(method-make!
-+ <hw-register> 'save-index?
-+ (lambda (self op)
-+ ; FIXME: Later handle case where register number is determined at runtime.
-+ #f)
-+)
-+
-+; Handle updates of registers during parallel execution.
-+; This is done in a post-processing pass after semantic evaluation.
-+; SFMT is the <sformat>.
-+; OP is the <operand>.
-+; ACCESS-MACRO is the runtime C macro to use to fetch indices computed
-+; during semantic evaluation.
-+; FIXME: May need mode of OP.
-+
-+(method-make!
-+ <hw-register> 'gen-write
-+ (lambda (self estate index mode sfmt op access-macro)
-+ ; First get a hw-index object to use during indexing.
-+ ; Some indices, e.g. memory addresses, are computed during semantic
-+ ; evaluation. Others are computed during the extraction phase.
-+ (let ((index (send index 'get-write-index self sfmt op access-macro)))
-+ (string-append " "
-+ (send self 'gen-set-quiet estate mode index hw-selector-default
-+ (cx:make DFLT (string-append access-macro
-+ " (" (gen-sym op) ")"))))))
-+)
-+
-+(method-make!
-+ <hw-register> 'gen-profile-decl
-+ (lambda (self)
-+ (string-append
-+ " /* " (obj:comment self) " */\n"
-+ " unsigned long " (gen-c-symbol (obj:name self)) ";\n"))
-+)
-+
-+(method-make!
-+ <hw-register> 'gen-record-profile
-+ (lambda (self index sfmt estate)
-+ ; FIXME: Need to handle scalars.
-+ (/gen-hw-index-raw index estate))
-+)
-+
-+(method-make!
-+ <hw-register> 'gen-get-macro
-+ (lambda (self)
-+ (let ((getter (elm-get self 'get))
-+ (mode (send self 'get-mode)))
-+ (if getter
-+ (let ((args (car getter))
-+ (expr (cadr getter)))
-+ (gen-get-macro2 (gen-sym self)
-+ (if (hw-scalar? self) "" "index")
-+ (rtl-c mode
-+ #f ;; h/w is not ISA-specific
-+ (if (hw-scalar? self)
-+ nil
-+ (list (list (car args) 'UINT "index")))
-+ expr
-+ #:rtl-cover-fns? #t #:macro? #t)))
-+ (send self 'gen-sym-get-macro
-+ (obj:name self) (obj:comment self)))))
-+)
-+
-+(method-make!
-+ <hw-register> 'gen-set-macro
-+ (lambda (self)
-+ (let ((setter (elm-get self 'set))
-+ (mode (send self 'get-mode)))
-+ (if setter
-+ (let ((args (car setter))
-+ (expr (cadr setter)))
-+ (gen-set-macro2 (gen-sym self)
-+ (if (hw-scalar? self) "" "index")
-+ "x"
-+ (rtl-c VOID ;; not `mode', sets have mode VOID
-+ #f ;; h/w is not ISA-specific
-+ (if (hw-scalar? self)
-+ (list (list (car args) (hw-mode self) "(x)"))
-+ (list (list (car args) 'UINT "(index)")
-+ (list (cadr args) (hw-mode self) "(x)")))
-+ expr
-+ #:rtl-cover-fns? #t #:macro? #t)))
-+ (send self 'gen-sym-set-macro
-+ (obj:name self) (obj:comment self)))))
-+)
-+
-+; Utility to build a <c-expr> object to fetch the value of a register.
-+
-+(define (/hw-cxmake-get hw estate mode index selector)
-+ (let ((mode (if (mode:eq? 'DFLT mode)
-+ (send hw 'get-mode)
-+ mode))
-+ (getter (hw-getter hw)))
-+ ; If the register is accessed via a cover function/macro, do it.
-+ ; Otherwise fetch the value from the cached address or from the CPU struct.
-+ (cx:make mode
-+ (cond (getter
-+ (let ((scalar? (hw-scalar? hw))
-+ (c-index (/gen-hw-index index estate)))
-+ (string-append "GET_"
-+ (string-upcase (gen-sym hw))
-+ " ("
-+ (if scalar? "" c-index)
-+ ")")))
-+ ((and (hw-cache-addr? hw) ; FIXME: redo test
-+ (eq? 'ifield (hw-index:type index)))
-+ (string-append
-+ "* "
-+ (if (with-scache?)
-+ (gen-hw-index-argbuf-ref index)
-+ (gen-hw-index-argbuf-name index))))
-+ (else (gen-cpu-ref (send hw 'gen-ref
-+ (gen-sym hw) index estate))))))
-+)
-+
-+(method-make! <hw-register> 'cxmake-get /hw-cxmake-get)
-+
-+; raw-reg: support
-+; ??? raw-reg: support is wip
-+
-+(method-make!
-+ <hw-register> 'cxmake-get-raw
-+ (lambda (self estate mode index selector)
-+ (let ((mode (if (mode:eq? 'DFLT mode)
-+ (send self 'get-mode)
-+ mode)))
-+ (cx:make mode (gen-cpu-ref (send self 'gen-ref
-+ (gen-sym self) index estate)))))
-+)
-+
-+; Utilities to generate C code to assign a variable to a register.
-+
-+(define (/hw-gen-set-quiet hw estate mode index selector newval)
-+ (let ((setter (hw-setter hw)))
-+ (cond (setter
-+ (let ((scalar? (hw-scalar? hw))
-+ (c-index (/gen-hw-index index estate)))
-+ (string-append "SET_"
-+ (string-upcase (gen-sym hw))
-+ " ("
-+ (if scalar? "" (string-append c-index ", "))
-+ (cx:c newval)
-+ ");\n")))
-+ ((and (hw-cache-addr? hw) ; FIXME: redo test
-+ (eq? 'ifield (hw-index:type index)))
-+ (string-append "* "
-+ (if (with-scache?)
-+ (gen-hw-index-argbuf-ref index)
-+ (gen-hw-index-argbuf-name index))
-+ " = " (cx:c newval) ";\n"))
-+ (else (string-append (gen-cpu-ref (send hw 'gen-ref
-+ (gen-sym hw) index estate))
-+ " = " (cx:c newval) ";\n"))))
-+)
-+
-+(method-make! <hw-register> 'gen-set-quiet /hw-gen-set-quiet)
-+
-+; raw-reg: support
-+; ??? wip
-+
-+(method-make!
-+ <hw-register> 'gen-set-quiet-raw
-+ (lambda (self estate mode index selector newval)
-+ (string-append (gen-cpu-ref (send self 'gen-ref
-+ (gen-sym self) index estate))
-+ " = " (cx:c newval) ";\n"))
-+)
-+
-+; Return name of C access function for getting/setting a register.
-+
-+(define (gen-reg-getter-fn hw prefix)
-+ (string-append prefix "_" (gen-sym hw) "_get")
-+)
-+
-+(define (gen-reg-setter-fn hw prefix)
-+ (string-append prefix "_" (gen-sym hw) "_set")
-+)
-+
-+; Generate decls for access fns of register HW, beginning with
-+; PREFIX, using C type TYPE.
-+; SCALAR? is #t if the register is a scalar. Otherwise it is #f and the
-+; register is a bank of registers.
-+
-+(define (gen-reg-access-decl hw prefix type scalar?)
-+ (string-append
-+ type " "
-+ (gen-reg-getter-fn hw prefix)
-+ " (SIM_CPU *"
-+ (if scalar? "" ", UINT")
-+ ");\n"
-+ "void "
-+ (gen-reg-setter-fn hw prefix)
-+ " (SIM_CPU *, "
-+ (if scalar? "" "UINT, ")
-+ type ");\n"
-+ )
-+)
-+
-+; Generate defns of access fns of register HW, beginning with
-+; PREFIX, using C type TYPE.
-+; SCALAR? is #t if the register is a scalar. Otherwise it is #f and the
-+; register is a bank of registers.
-+; GET/SET-CODE are C fragments to get/set the value.
-+; ??? Inlining left for later.
-+
-+(define (gen-reg-access-defn hw prefix type scalar? get-code set-code)
-+ (string-append
-+ "/* Get the value of " (obj:str-name hw) ". */\n\n"
-+ type "\n"
-+ (gen-reg-getter-fn hw prefix)
-+ " (SIM_CPU *current_cpu"
-+ (if scalar? "" ", UINT regno")
-+ ")\n{\n"
-+ get-code
-+ "}\n\n"
-+ "/* Set a value for " (obj:str-name hw) ". */\n\n"
-+ "void\n"
-+ (gen-reg-setter-fn hw prefix)
-+ " (SIM_CPU *current_cpu, "
-+ (if scalar? "" "UINT regno, ")
-+ type " newval)\n"
-+ "{\n"
-+ set-code
-+ "}\n\n")
-+)
-+
-+; Memory support.
-+
-+(method-make!
-+ <hw-memory> 'cxmake-get
-+ (lambda (self estate mode index selector)
-+ (let ((mode (if (mode:eq? 'DFLT mode)
-+ (hw-mode self)
-+ mode))
-+ (default-selector? (hw-selector-default? selector)))
-+ (cx:make mode
-+ (string-append "GETMEM" (obj:str-name mode)
-+ (if default-selector? "" "ASI")
-+ " ("
-+ "current_cpu, pc, "
-+ (/gen-hw-index index estate)
-+ (if default-selector?
-+ ""
-+ (string-append ", "
-+ (/gen-hw-selector selector)))
-+ ")"))))
-+)
-+
-+(method-make!
-+ <hw-memory> 'gen-set-quiet
-+ (lambda (self estate mode index selector newval)
-+ (let ((mode (if (mode:eq? 'DFLT mode)
-+ (hw-mode self)
-+ mode))
-+ (default-selector? (hw-selector-default? selector)))
-+ (string-append "SETMEM" (obj:str-name mode)
-+ (if default-selector? "" "ASI")
-+ " ("
-+ "current_cpu, pc, "
-+ (/gen-hw-index index estate)
-+ (if default-selector?
-+ ""
-+ (string-append ", "
-+ (/gen-hw-selector selector)))
-+ ", " (cx:c newval) ");\n")))
-+)
-+
-+(method-make-forward! <hw-memory> 'type '(gen-type))
-+(method-make! <hw-memory> 'gen-defn (lambda (self sym comment) ""))
-+(method-make! <hw-memory> 'gen-sym-get-macro (lambda (self sym comment) ""))
-+(method-make! <hw-memory> 'gen-sym-set-macro (lambda (self sym comment) ""))
-+
-+; For parallel instructions supported by queueing outputs for later update,
-+; return the type of the index or #f if not needed.
-+
-+(method-make!
-+ <hw-memory> 'save-index?
-+ (lambda (self op)
-+ ; In the case of the complete memory address being an immediate
-+ ; argument, we can return #f (later).
-+ AI)
-+)
-+
-+(method-make!
-+ <hw-memory> 'gen-write
-+ (lambda (self estate index mode sfmt op access-macro)
-+ (let ((index (send index 'get-write-index self sfmt op access-macro)))
-+ (string-append " "
-+ (send self 'gen-set-quiet estate mode index
-+ hw-selector-default
-+ (cx:make DFLT (string-append access-macro " ("
-+ (gen-sym op)
-+ ")"))))))
-+)
-+
-+; Immediates, addresses.
-+
-+(method-make-forward! <hw-immediate> 'type '(gen-type))
-+
-+(method-make!
-+ <hw-immediate> 'gen-defn
-+ (lambda (self)
-+ (send (elm-get self 'type) 'gen-sym-defn (obj:name self) (obj:comment self)))
-+)
-+
-+(method-make-forward! <hw-immediate> 'type '(gen-sym-get-macro
-+ gen-sym-set-macro))
-+
-+(method-make!
-+ <hw-immediate> 'gen-write
-+ (lambda (self estate index mode sfmt op access-macro)
-+ (error "gen-write of <hw-immediate> shouldn't happen"))
-+)
-+
-+;; FIXME
-+(method-make! <hw-address> 'gen-type (lambda (self) "ADDR"))
-+(method-make! <hw-address> 'gen-defn (lambda (self sym comment) ""))
-+(method-make! <hw-address> 'gen-sym-get-macro (lambda (self sym comment) ""))
-+(method-make! <hw-address> 'gen-sym-set-macro (lambda (self sym comment) ""))
-+
-+; Return a <c-expr> object of the value of SELF.
-+; ESTATE is the current rtl evaluator state.
-+; INDEX is a hw-index object. It must be an ifield.
-+; Needed because we record our own copy of the ifield in ARGBUF.
-+; SELECTOR is a hardware selector RTX.
-+
-+(method-make!
-+ <hw-address> 'cxmake-get
-+ (lambda (self estate mode index selector)
-+ (if (not (eq? 'ifield (hw-index:type index)))
-+ (error "not an ifield hw-index" index))
-+ (if (with-scache?)
-+ (cx:make mode (gen-hw-index-argbuf-ref index))
-+ (cx:make mode (gen-hw-index-argbuf-name index))))
-+)
-+
-+(method-make!
-+ <hw-address> 'gen-write
-+ (lambda (self estate index mode sfmt op access-macro)
-+ (error "gen-write of <hw-address> shouldn't happen"))
-+)
-+
-+;; FIXME: consistency says there should be gen-defn, gen-sym-[gs]et-macro
-+(method-make! <hw-iaddress> 'gen-type (lambda (self) "IADDR"))
-+
-+; Return a <c-expr> object of the value of SELF.
-+; ESTATE is the current rtl evaluator state.
-+; INDEX is a <hw-index> object. It must be an ifield.
-+; Needed because we record our own copy of the ifield in ARGBUF,
-+; *and* because we want to record in the result the 'CACHED attribute
-+; since instruction addresses based on ifields are fixed [and thus cacheable].
-+; SELECTOR is a hardware selector RTX.
-+
-+(method-make!
-+ <hw-iaddress> 'cxmake-get
-+ (lambda (self estate mode index selector)
-+ (if (not (eq? 'ifield (hw-index:type index)))
-+ (error "not an ifield hw-index" index))
-+ (if (with-scache?)
-+ ; ??? Perhaps a better way would be to defer evaluating the src of a
-+ ; set until the method processing the dest.
-+ (cx:make-with-atlist mode (gen-hw-index-argbuf-ref index)
-+ (atlist-make "" (bool-attr-make 'CACHED #t)))
-+ (cx:make mode (gen-hw-index-argbuf-name index))))
-+)
-+
-+; Hardware index support code.
-+
-+; Return the index to use by the gen-write method.
-+; In the cases where this is needed (the index isn't known until insn
-+; execution time), the index is computed along with the value to be stored,
-+; so this is easy.
-+
-+(method-make!
-+ <hw-index> 'get-write-index
-+ (lambda (self hw sfmt op access-macro)
-+ (if (memq (hw-index:type self) '(scalar constant enum str-expr ifield))
-+ self
-+ (let ((index-mode (send hw 'get-index-mode)))
-+ (if index-mode
-+ (make <hw-index> 'anonymous 'str-expr index-mode
-+ (string-append access-macro " (" (/op-index-name op) ")"))
-+ (hw-index-scalar)))))
-+)
-+
-+; Return the name of the PAREXEC structure member holding a hardware index
-+; for operand OP.
-+
-+(define (/op-index-name op)
-+ (string-append (gen-sym op) "_idx")
-+)
-+
-+; Cover fn to hardware indices to generate the actual C code.
-+; INDEX is the hw-index object (i.e. op:index).
-+; The result is a string of C code.
-+; FIXME:wip
-+
-+(define (/gen-hw-index-raw index estate)
-+ (let ((type (hw-index:type index))
-+ (mode (hw-index:mode index))
-+ (value (hw-index:value index)))
-+ (case type
-+ ((scalar) "")
-+ ; special case UINT to cut down on unnecessary verbosity.
-+ ; ??? May wish to handle more similarily.
-+ ((constant) (if (mode:eq? 'UINT mode)
-+ (number->string value)
-+ (string-append "((" (mode:c-type mode) ") "
-+ (number->string value)
-+ ")")))
-+ ((enum) (let ((sym (hw-index-enum-name index))
-+ (obj (hw-index-enum-obj index)))
-+ (gen-enum-sym obj sym)))
-+ ((str-expr) value)
-+ ((rtx) (rtl-c-with-estate estate mode value))
-+ ((ifield) (if (= (ifld-length value) 0)
-+ ""
-+ (gen-extracted-ifld-value value)))
-+ ((operand) (cx:c (send value 'cxmake-get estate mode (op:index value)
-+ (op:selector value) #f)))
-+ (else (error "/gen-hw-index-raw: invalid index:" index))))
-+)
-+
-+; Same as /gen-hw-index-raw except used where speedups are possible.
-+; e.g. doing array index calcs at extraction time.
-+
-+(define (/gen-hw-index index estate)
-+ (let ((type (hw-index:type index))
-+ (mode (hw-index:mode index))
-+ (value (hw-index:value index)))
-+ (case type
-+ ((scalar) "")
-+ ((constant) (string-append "((" (mode:c-type mode) ") "
-+ (number->string value)
-+ ")"))
-+ ((enum) (let ((sym (hw-index-enum-name index))
-+ (obj (hw-index-enum-obj index)))
-+ (gen-enum-sym obj sym)))
-+ ((str-expr) value)
-+ ((rtx) (rtl-c-with-estate estate mode value))
-+ ((ifield) (if (= (ifld-length value) 0)
-+ ""
-+ (cx:c (/cxmake-ifld-val mode value))))
-+ ((operand) (cx:c (send value 'cxmake-get estate mode (op:index value)
-+ (op:selector value))))
-+ (else (error "/gen-hw-index: invalid index:" index))))
-+)
-+
-+; Return address where HW is stored.
-+
-+(define (/gen-hw-addr hw estate index)
-+ (let ((setter (hw-setter hw)))
-+ (cond ((and (hw-cache-addr? hw) ; FIXME: redo test
-+ (eq? 'ifield (hw-index:type index)))
-+ (if (with-scache?)
-+ (gen-hw-index-argbuf-ref index)
-+ (gen-hw-index-argbuf-name index)))
-+ (else
-+ (string-append "& "
-+ (gen-cpu-ref (send hw 'gen-ref
-+ (gen-sym hw) index estate))))))
-+)
-+
-+; Return a <c-expr> object of the value of a hardware index.
-+
-+(method-make!
-+ <hw-index> 'cxmake-get
-+ (lambda (self estate mode)
-+ (let ((mode (if (mode:eq? 'DFLT mode) (elm-get self 'mode) mode)))
-+ ; If MODE is VOID, abort.
-+ (if (mode:eq? 'VOID mode)
-+ (error "hw-index:cxmake-get: result needs a mode" self))
-+ (cx:make (if (mode:host? mode)
-+ ; FIXME: Temporary hack to generate same code as before.
-+ (let ((xmode (object-copy mode)))
-+ (obj-cons-attr! xmode (bool-attr-make 'FORCE-C #t))
-+ xmode)
-+ mode)
-+ (/gen-hw-index self estate))))
-+)
-+
-+; Hardware selector support code.
-+
-+; Generate C code for SEL.
-+
-+(define (/gen-hw-selector sel)
-+ (rtl-c INT #f nil sel)
-+)
-+
-+; Instruction operand support code.
-+
-+; Methods:
-+; gen-type - Return C type to use to hold operand's value.
-+; gen-read - Record an operand's value prior to parallely executing
-+; several instructions. Not used if gen-write used.
-+; gen-write - Write back an operand's value after parallely executing
-+; several instructions. Not used if gen-read used.
-+; cxmake-get - Return C code to fetch the value of an operand.
-+; gen-set-quiet - Return C code to set the value of an operand.
-+; gen-set-trace - Return C code to set the value of an operand, and print
-+; a result trace message. ??? Ideally this will go away when
-+; trace record support is complete.
-+
-+; Return the C type of an operand.
-+; Generally we forward things on to TYPE, but for the actual type we need to
-+; use the get-mode method.
-+
-+;(method-make-forward! <operand> 'type '(gen-type))
-+(method-make!
-+ <operand> 'gen-type
-+ (lambda (self)
-+ ; First get the mode.
-+ (let ((mode (send self 'get-mode)))
-+ ; If it's VOID use the type's type.
-+ (if (mode:eq? 'DFLT mode)
-+ (send (op:type self) 'gen-type)
-+ (mode:c-type mode))))
-+)
-+
-+; Extra pc operand methods.
-+
-+(method-make!
-+ <pc> 'cxmake-get
-+ (lambda (self estate mode index selector)
-+ (let ((mode (if (mode:eq? 'DFLT mode)
-+ (send self 'get-mode)
-+ mode)))
-+
-+ (logit 4 "<pc> cxmake-get self=" (obj:name self) " mode=" (obj:name mode) "\n")
-+
-+ (if (obj-has-attr? self 'RAW)
-+ (let ((hw (op:type self))
-+ ;; For consistency with <operand> process index,selector similarly.
-+ (index (if index index (op:index self)))
-+ (selector (if selector selector (op:selector self))))
-+ (send hw 'cxmake-get-raw estate mode index selector))
-+ ;; The enclosing function must set `pc' to the correct value.
-+ (cx:make mode "pc"))))
-+)
-+
-+(method-make!
-+ <pc> 'cxmake-skip
-+ (lambda (self estate yes?)
-+ (send (op:type self) 'cxmake-skip estate
-+ (rtl-c INT (obj-isa-list self) nil yes? #:rtl-cover-fns? #t)))
-+)
-+
-+; For parallel write post-processing, we don't want to defer setting the pc.
-+; ??? Not sure anymore.
-+;(method-make!
-+; <pc> 'gen-set-quiet
-+; (lambda (self estate mode index selector newval)
-+; (/op-gen-set-quiet self estate mode index selector newval)))
-+;(method-make!
-+; <pc> 'gen-set-trace
-+; (lambda (self estate mode index selector newval)
-+; (/op-gen-set-trace self estate mode index selector newval)))
-+
-+; Name of C macro to access parallel execution operand support.
-+
-+(define /par-operand-macro "OPRND")
-+
-+; Return C code to fetch an operand's value and save it away for the
-+; semantic handler. This is used to handle parallel execution of several
-+; instructions where all inputs of all insns are read before any outputs are
-+; written.
-+; For operands, the word `read' is only used in this context.
-+
-+(define (op:read op sfmt)
-+ (let ((estate (estate-make-for-rtl-c nil)))
-+ (send op 'gen-read estate sfmt /par-operand-macro))
-+)
-+
-+; Return C code to write an operand's value.
-+; This is used to handle parallel execution of several instructions where all
-+; outputs are written to temporary spots first, and then a final
-+; post-processing pass is run to update cpu state.
-+; For operands, the word `write' is only used in this context.
-+
-+(define (op:write op sfmt)
-+ (let ((estate (estate-make-for-rtl-c nil)))
-+ (send op 'gen-write estate sfmt /par-operand-macro))
-+)
-+
-+; Default gen-read method.
-+; This is used to help support targets with parallel insns.
-+; Either this or gen-write (but not both) is used.
-+
-+(method-make!
-+ <operand> 'gen-read
-+ (lambda (self estate sfmt access-macro)
-+ (string-append " "
-+ access-macro " ("
-+ (gen-sym self)
-+ ") = "
-+ ; Pass #f for the index -> use the operand's builtin index.
-+ ; Ditto for the selector.
-+ (cx:c (send self 'cxmake-get estate DFLT #f #f))
-+ ";\n"))
-+)
-+
-+; Forward gen-write onto the <hardware> object.
-+
-+(method-make!
-+ <operand> 'gen-write
-+ (lambda (self estate sfmt access-macro)
-+ (let ((write-back-code (send (op:type self) 'gen-write estate
-+ (op:index self) (op:mode self)
-+ sfmt self access-macro)))
-+ ; If operand is conditionally written, we have to check that first.
-+ ; ??? If two (or more) operands are written based on the same condition,
-+ ; all the tests can be collapsed together. Not sure that's a big
-+ ; enough win yet.
-+ (if (op:cond? self)
-+ (string-append " if (written & (1 << "
-+ (number->string (op:num self))
-+ "))\n"
-+ " {\n"
-+ " " write-back-code
-+ " }\n")
-+ write-back-code)))
-+)
-+
-+; Return <c-expr> object to get the value of an operand.
-+; ESTATE is the current rtl evaluator state.
-+; If INDEX is non-#f use it, otherwise use (op:index self).
-+; This special handling of #f for INDEX is *only* supported for operands
-+; in cxmake-get, gen-set-quiet, and gen-set-trace.
-+; Ditto for SELECTOR.
-+
-+(method-make!
-+ <operand> 'cxmake-get
-+ (lambda (self estate mode index selector)
-+ (let ((mode (if (mode:eq? 'DFLT mode)
-+ (send self 'get-mode)
-+ mode))
-+ (index (if index index (op:index self)))
-+ (selector (if selector selector (op:selector self))))
-+ ;; If the instruction could be parallely executed with others and we're
-+ ;; doing read pre-processing, the operand has already been fetched, we
-+ ;; just have to grab the cached value.
-+ (let ((result
-+ (cond ((obj-has-attr? self 'RAW)
-+ (send (op:type self) 'cxmake-get-raw estate mode index selector))
-+ ((with-parallel-read?)
-+ (cx:make-with-atlist mode
-+ (string-append /par-operand-macro
-+ " (" (gen-sym self) ")")
-+ nil)) ;; FIXME: want CACHED attr if present
-+ ((op:getter self)
-+ (let ((args (car (op:getter self)))
-+ (expr (cadr (op:getter self))))
-+ (rtl-c-expr mode
-+ (obj-isa-list self)
-+ (if (= (length args) 0)
-+ nil
-+ (list (list (car args) 'UINT index)))
-+ expr
-+ #:rtl-cover-fns? #t)))
-+ (else
-+ (send (op:type self) 'cxmake-get estate mode index selector)))))
-+
-+ (logit 4 "<operand> cxmake-get self=" (obj:name self) " mode=" (obj:name mode)
-+ " index=" (obj:name index) " selector=" selector "\n")
-+
-+ result)))
-+)
-+
-+; Utilities to implement gen-set-quiet/gen-set-trace.
-+
-+(define (/op-gen-set-quiet op estate mode index selector newval)
-+ (send (op:type op) 'gen-set-quiet estate mode index selector newval)
-+)
-+
-+; Return C code to call the appropriate queued-write handler.
-+; ??? wip
-+
-+(define (/op-gen-queued-write op estate mode index selector newval)
-+ (let* ((hw (op:type op))
-+ (setter (hw-setter hw))
-+ (sem-mode (mode:sem-mode mode)))
-+ (string-append
-+ " "
-+ "sim_queue_"
-+ ; FIXME: clean up (pc? op) vs (memory? hw)
-+ ; FIXME: (send 'pc?) is a temporary hack, (pc? op) didn't work
-+ (cond ((send hw 'pc?)
-+ (string-append
-+ (if setter
-+ "fn_"
-+ "")
-+ "pc"))
-+ (else
-+ (string-append
-+ (cond ((memory? hw)
-+ "mem_")
-+ ((hw-scalar? hw)
-+ "scalar_")
-+ (else ""))
-+ (if setter
-+ "fn_"
-+ "")
-+ (string-downcase (symbol->string (if sem-mode
-+ (mode-real-name sem-mode)
-+ (mode-real-name mode)))))))
-+ "_write (current_cpu"
-+ ; ??? May need to include h/w id some day.
-+ (if setter
-+ (string-append ", " (gen-reg-setter-fn hw "@cpu@"))
-+ "")
-+ (cond ((hw-scalar? hw)
-+ "")
-+ (setter
-+ (string-append ", " (/gen-hw-index index estate)))
-+ ((memory? hw)
-+ (string-append ", " (/gen-hw-index index estate)))
-+ (else
-+ (string-append ", " (/gen-hw-addr (op:type op) estate index))))
-+ ", "
-+ newval
-+ ");\n"))
-+)
-+
-+(define (/op-gen-set-quiet-parallel op estate mode index selector newval)
-+ (if (with-generic-write?)
-+ (/op-gen-queued-write op estate mode index selector (cx:c newval))
-+ (string-append
-+ (if (op-save-index? op)
-+ (string-append " "
-+ /par-operand-macro " (" (/op-index-name op) ")"
-+ " = " (/gen-hw-index index estate) ";\n")
-+ "")
-+ " "
-+ /par-operand-macro " (" (gen-sym op) ")"
-+ " = " (cx:c newval) ";\n"))
-+)
-+
-+(define /operand-number-elaboration-written? #f)
-+
-+;; Return code to update `written'.
-+
-+(define (/op-gen-written-update op)
-+ (if (op:cond? op)
-+ ;; FIXME: we don't yet handle a large number of operands
-+ (if (< (op:num op) 32)
-+ (string-append " written |= (1 << "
-+ (number->string (op:num op))
-+ ");\n")
-+ (begin
-+ ;; FIXME: This creates broken simulators if with-parallel-write?.
-+;; (message (if (with-parallel-write?) "Error: " "Warning: ")
-+;; (obj:name op)
-+;; " operand number " (op:num op)
-+;; " is too large (>= 32)\n")
-+ (if (not /operand-number-elaboration-written?)
-+ (begin
-+ (message "This is a current internal cgen limitation.\n")
-+ (if (not (with-parallel-write?))
-+ (message "The only effect is a loss in profiling capability.\n"))
-+ (set! /operand-number-elaboration-written? #t)))
-+ ""))
-+ "")
-+)
-+
-+(define (/op-gen-set-trace op estate mode index selector newval)
-+ (string-append
-+ " {\n"
-+ " " (mode:c-type mode) " opval = " (cx:c newval) ";\n"
-+ ; Dispatch to setter code if appropriate
-+ " "
-+ (if (op:setter op)
-+ (let ((args (car (op:setter op)))
-+ (expr (cadr (op:setter op))))
-+ (rtl-c VOID
-+ (obj-isa-list op)
-+ (if (= (length args) 0)
-+ (list (list 'newval mode "opval"))
-+ (list (list (car args) 'UINT index)
-+ (list 'newval mode "opval")))
-+ expr
-+ #:rtl-cover-fns? #t))
-+ ;else
-+ (send (op:type op) 'gen-set-quiet estate mode index selector
-+ (cx:make-with-atlist mode "opval" (cx:atlist newval))))
-+ (/op-gen-written-update op)
-+; TRACE_RESULT_<MODE> (cpu, abuf, hwnum, opnum, value);
-+; For each insn record array of operand numbers [or indices into
-+; operand instance table].
-+; Could just scan the operand table for the operand or hardware number,
-+; assuming the operand number is stored in `op'.
-+ " TRACE_RESULT (current_cpu, abuf"
-+ ", " (send op 'gen-pretty-name mode)
-+ ", " (mode:printf-type mode)
-+ ", opval);\n"
-+ " }\n")
-+)
-+
-+(define (/op-gen-set-trace-parallel op estate mode index selector newval)
-+ (string-append
-+ " {\n"
-+ " " (mode:c-type mode) " opval = " (cx:c newval) ";\n"
-+ (if (with-generic-write?)
-+ (/op-gen-queued-write op estate mode index selector "opval")
-+ (string-append
-+ (if (op-save-index? op)
-+ (string-append " "
-+ /par-operand-macro " (" (/op-index-name op) ")"
-+ " = " (/gen-hw-index index estate) ";\n")
-+ "")
-+ " " /par-operand-macro " (" (gen-sym op) ")"
-+ " = opval;\n"))
-+ (/op-gen-written-update op)
-+; TRACE_RESULT_<MODE> (cpu, abuf, hwnum, opnum, value);
-+; For each insn record array of operand numbers [or indices into
-+; operand instance table].
-+; Could just scan the operand table for the operand or hardware number,
-+; assuming the operand number is stored in `op'.
-+ " TRACE_RESULT (current_cpu, abuf"
-+ ", " (send op 'gen-pretty-name mode)
-+ ", " (mode:printf-type mode)
-+ ", opval);\n"
-+ " }\n")
-+)
-+
-+; Return C code to set the value of an operand.
-+; NEWVAL is a <c-expr> object of the value to store.
-+; If INDEX is non-#f use it, otherwise use (op:index self).
-+; This special handling of #f for INDEX is *only* supported for operands
-+; in cxmake-get, gen-set-quiet, and gen-set-trace.
-+; Ditto for SELECTOR.
-+
-+(method-make!
-+ <operand> 'gen-set-quiet
-+ (lambda (self estate mode index selector newval)
-+ (let ((mode (if (mode:eq? 'DFLT mode)
-+ (send self 'get-mode)
-+ mode))
-+ (index (if index index (op:index self)))
-+ (selector (if selector selector (op:selector self))))
-+ ; ??? raw-reg: support wip
-+ (cond ((obj-has-attr? self 'RAW)
-+ (send (op:type self) 'gen-set-quiet-raw estate mode index selector newval))
-+ ((with-parallel-write?)
-+ (/op-gen-set-quiet-parallel self estate mode index selector newval))
-+ (else
-+ (/op-gen-set-quiet self estate mode index selector newval)))))
-+)
-+
-+; Return C code to set the value of an operand and print TRACE_RESULT message.
-+; NEWVAL is a <c-expr> object of the value to store.
-+; If INDEX is non-#f use it, otherwise use (op:index self).
-+; This special handling of #f for INDEX is *only* supported for operands
-+; in cxmake-get, gen-set-quiet, and gen-set-trace.
-+; Ditto for SELECTOR.
-+
-+(method-make!
-+ <operand> 'gen-set-trace
-+ (lambda (self estate mode index selector newval)
-+ (let ((mode (if (mode:eq? 'DFLT mode)
-+ (send self 'get-mode)
-+ mode))
-+ (index (if index index (op:index self)))
-+ (selector (if selector selector (op:selector self))))
-+ ; ??? raw-reg: support wip
-+ (cond ((obj-has-attr? self 'RAW)
-+ (send (op:type self) 'gen-set-quiet-raw estate mode index selector newval))
-+ ((with-parallel-write?)
-+ (/op-gen-set-trace-parallel self estate mode index selector newval))
-+ (else
-+ (/op-gen-set-trace self estate mode index selector newval)))))
-+)
-+
-+; Define and undefine C macros to tuck away details of instruction format used
-+; in the parallel execution functions. See gen-define-field-macro for a
-+; similar thing done for extraction/semantic functions.
-+
-+(define (gen-define-parallel-operand-macro sfmt)
-+ (string-append "#define " /par-operand-macro "(f) "
-+ "par_exec->operands."
-+ (gen-sym sfmt)
-+ ".f\n")
-+)
-+
-+(define (gen-undef-parallel-operand-macro sfmt)
-+ (string-append "#undef " /par-operand-macro "\n")
-+)
-+
-+; Operand profiling and parallel execution support.
-+
-+(method-make!
-+ <operand> 'save-index?
-+ (lambda (self) (send (op:type self) 'save-index? self))
-+)
-+
-+; Return boolean indicating if operand OP needs its index saved
-+; (for parallel write post-processing support).
-+
-+(define (op-save-index? op)
-+ (send op 'save-index?)
-+)
-+
-+; Return C code to record profile data for modeling use.
-+; In the case of a register, this is usually the register's number.
-+; This shouldn't be called in the case of a scalar, the code should be
-+; smart enough to know there is no need.
-+
-+(define (op:record-profile op sfmt out?)
-+ (let ((estate (estate-make-for-rtl-c nil)))
-+ (send op 'gen-record-profile sfmt out? estate))
-+)
-+
-+; Return C code to record the data needed for profiling operand SELF.
-+; This is done during extraction.
-+
-+(method-make!
-+ <operand> 'gen-record-profile
-+ (lambda (self sfmt out? estate)
-+ (if (hw-scalar? (op:type self))
-+ ""
-+ (string-append " "
-+ (gen-argbuf-ref (send self 'sbuf-profile-sym out?))
-+ " = "
-+ (send (op:type self) 'gen-record-profile
-+ (op:index self) sfmt estate)
-+ ";\n")))
-+)
-+
-+; Return C code to track profiling of operand SELF.
-+; This is usually called by the x-after handler.
-+
-+(method-make!
-+ <operand> 'gen-profile-code
-+ (lambda (self insn out?)
-+ (string-append " "
-+ "@cpu@_model_mark_"
-+ (if out? "set_" "get_")
-+ (gen-sym (op:type self))
-+ " (current_cpu"
-+ (if (hw-scalar? (op:type self))
-+ ""
-+ (string-append ", "
-+ (gen-argbuf-ref
-+ (send self 'sbuf-profile-sym out?))))
-+ ");\n"))
-+)
-+
-+; CPU, mach, model support.
-+
-+; Return the declaration of the cpu/insn enum.
-+
-+(define (gen-cpu-insn-enum-decl cpu insn-list)
-+ (gen-enum-decl "@prefix@_insn_type"
-+ "instructions in cpu family @cpu@"
-+ "@PREFIX@_INSN_"
-+ (append! (map (lambda (i)
-+ (cons (obj:name i)
-+ (cons '-
-+ (atlist-attrs (obj-atlist i)))))
-+ insn-list)
-+ (if (with-parallel?)
-+ (apply append!
-+ (map (lambda (i)
-+ (list
-+ (cons (symbol-append 'par- (obj:name i))
-+ (cons '-
-+ (atlist-attrs (obj-atlist i))))
-+ (cons (symbol-append 'write- (obj:name i))
-+ (cons '-
-+ (atlist-attrs (obj-atlist i))))))
-+ (parallel-insns insn-list)))
-+ nil)
-+ (list '(-max))))
-+)
-+
-+; Return the enum of INSN in cpu family CPU.
-+; In addition to CGEN_INSN_TYPE, an enum is created for each insn in each
-+; cpu family. This collapses the insn enum space for each cpu to increase
-+; cache efficiently (since the IDESC table is similarily collapsed).
-+
-+(define (gen-cpu-insn-enum cpu insn)
-+ (string-upcase (string-append "@PREFIX@_INSN_" (gen-sym insn)))
-+)
-+
-+; Return C code to declare the machine data.
-+
-+(define (/gen-mach-decls)
-+ (string-append
-+ (string-map (lambda (mach)
-+ (gen-obj-sanitize mach
-+ (string-append "extern const MACH "
-+ (gen-sym mach)
-+ "_mach;\n")))
-+ (current-mach-list))
-+ "\n")
-+)
-+
-+; Return C code to define the machine data.
-+
-+(define (/gen-mach-data)
-+ (string-append
-+ "const MACH *sim_machs[] =\n{\n"
-+ (string-map (lambda (mach)
-+ (gen-obj-sanitize
-+ mach
-+ (string-append "#ifdef " (gen-have-cpu (mach-cpu mach)) "\n"
-+ " & " (gen-sym mach) "_mach,\n"
-+ "#endif\n")))
-+ (current-mach-list))
-+ " 0\n"
-+ "};\n\n"
-+ )
-+)
-+
-+; Return C declarations of cpu model support stuff.
-+; ??? This goes in arch.h but a better place is each cpu.h.
-+
-+(define (/gen-arch-model-decls)
-+ (string-append
-+ (gen-enum-decl 'model_type "model types"
-+ "MODEL_"
-+ (append (map (lambda (model)
-+ (cons (obj:name model)
-+ (cons '-
-+ (atlist-attrs (obj-atlist model)))))
-+ (current-model-list))
-+ '((max))))
-+ "#define MAX_MODELS ((int) MODEL_MAX)\n\n"
-+ (gen-enum-decl 'unit_type "unit types"
-+ "UNIT_"
-+ (cons '(none)
-+ (append
-+ ; "apply append" squeezes out nils.
-+ (apply append
-+ ; create <model_name>-<unit-name> for each unit
-+ (map (lambda (model)
-+ (let ((units (model:units model)))
-+ (if (null? units)
-+ nil
-+ (map (lambda (unit)
-+ (cons (symbol-append (obj:name model) '-
-+ (obj:name unit))
-+ (cons '- (atlist-attrs (obj-atlist model)))))
-+ units))))
-+ (current-model-list)))
-+ '((max)))))
-+ ; FIXME: revisit MAX_UNITS
-+ "#define MAX_UNITS ("
-+ (number->string
-+ (apply max
-+ (map (lambda (lengths) (apply max lengths))
-+ (map (lambda (insn)
-+ (let ((timing (insn-timing insn)))
-+ (if (null? timing)
-+ '(1)
-+ (map (lambda (insn-timing)
-+ (if (null? (cdr insn-timing))
-+ '1
-+ (length (timing:units (cdr insn-timing)))))
-+ timing))))
-+ (current-insn-list)))))
-+ ")\n\n"
-+ )
-+)
-+
-+; Function units.
-+
-+(method-make! <unit> 'gen-decl (lambda (self) ""))
-+
-+; Lookup operand named OP-NAME in INSN.
-+; Returns #f if OP-NAME is not an operand of INSN.
-+; IN-OUT is 'in to request an input operand, 'out to request an output operand,
-+; and 'in-out to request either (though if an operand is used for input and
-+; output then the input version is returned).
-+; FIXME: Move elsewhere.
-+
-+(define (insn-op-lookup op-name insn in-out)
-+ (letrec ((lookup (lambda (op-list)
-+ (cond ((null? op-list) #f)
-+ ((eq? op-name (op:sem-name (car op-list))) (car op-list))
-+ (else (lookup (cdr op-list)))))))
-+ (case in-out
-+ ((in) (lookup (sfmt-in-ops (insn-sfmt insn))))
-+ ((out) (lookup (sfmt-out-ops (insn-sfmt insn))))
-+ ((in-out) (or (lookup (sfmt-in-ops (insn-sfmt insn)))
-+ (lookup (sfmt-out-ops (insn-sfmt insn)))))
-+ (else (error "insn-op-lookup: bad arg:" in-out))))
-+)
-+
-+; Return C code to profile a unit's usage.
-+; UNIT-NUM is number of the unit in INSN.
-+; OVERRIDES is a list of (name value) pairs, where
-+; - NAME is a spec name, one of cycles, pred, in, out.
-+; The only ones we're concerned with are in,out. They map operand names
-+; as they appear in the semantic code to operand names as they appear in
-+; the function unit spec.
-+; - VALUE is the operand to NAME. For in,out it is (NAME VALUE) where
-+; - NAME is the name of an input/output arg of the unit.
-+; - VALUE is the name of the operand as it appears in semantic code.
-+;
-+; ??? This is a big sucker, though half of it is just the definitions
-+; of utility fns.
-+
-+(method-make!
-+ <unit> 'gen-profile-code
-+ (lambda (self unit-num insn overrides cycles-var-name)
-+ (let (
-+ (inputs (unit:inputs self))
-+ (outputs (unit:outputs self))
-+
-+ ; Return C code to initialize UNIT-REFERENCED-VAR to be a bit mask
-+ ; of operands of UNIT that were read/written by INSN.
-+ ; INSN-REFERENCED-VAR is a bitmask of operands read/written by INSN.
-+ ; All we have to do is map INSN-REFERENCED-VAR to
-+ ; UNIT-REFERENCED-VAR.
-+ ; ??? For now we assume all input operands are read.
-+ (gen-ref-arg (lambda (arg num in-out)
-+ (let* ((op-name (assq-ref overrides (car arg)))
-+ (op (insn-op-lookup (if op-name
-+ (car op-name)
-+ (car arg))
-+ insn in-out))
-+ (insn-referenced-var "insn_referenced")
-+ (unit-referenced-var "referenced"))
-+ (if op
-+ (if (op:cond? op)
-+ (string-append " "
-+ "if ("
-+ insn-referenced-var
-+ " & (1 << "
-+ (number->string (op:num op))
-+ ")) "
-+ unit-referenced-var
-+ " |= 1 << "
-+ (number->string num)
-+ ";\n")
-+ (string-append " "
-+ unit-referenced-var
-+ " |= 1 << "
-+ (number->string num)
-+ ";\n"))
-+ ""))))
-+
-+ ; Initialize unit argument ARG.
-+ ; OUT? is #f for input args, #t for output args.
-+ (gen-arg-init (lambda (arg out?)
-+ (if (or
-+ ; Ignore scalars.
-+ (null? (cdr arg))
-+ ; Ignore remapped arg, handled elsewhere.
-+ (assq (car arg) overrides)
-+ ; Ignore operands not in INSN.
-+ (not (insn-op-lookup (car arg) insn
-+ (if out? 'out 'in))))
-+ ""
-+ (let ((sym (gen-profile-sym (gen-c-symbol (car arg))
-+ out?)))
-+ (string-append " "
-+ sym
-+ " = "
-+ (gen-argbuf-ref sym)
-+ ";\n")))))
-+
-+ ; Return C code to declare variable to hold unit argument ARG.
-+ ; OUT? is #f for input args, #t for output args.
-+ (gen-arg-decl (lambda (arg out?)
-+ (if (null? (cdr arg)) ; ignore scalars
-+ ""
-+ (string-append " "
-+ (mode:c-type (mode:lookup (cadr arg)))
-+ " "
-+ (gen-profile-sym (gen-c-symbol (car arg))
-+ out?)
-+ " = "
-+ (if (null? (cddr arg))
-+ "0"
-+ (number->string (caddr arg)))
-+ ";\n"))))
-+
-+ ; Return C code to pass unit argument ARG to the handler.
-+ ; OUT? is #f for input args, #t for output args.
-+ (gen-arg-arg (lambda (arg out?)
-+ (if (null? (cdr arg)) ; ignore scalars
-+ ""
-+ (string-append ", "
-+ (gen-profile-sym (gen-c-symbol (car arg))
-+ out?)))))
-+ )
-+
-+ (string-list
-+ " {\n"
-+ " int referenced = 0;\n"
-+ " int UNUSED insn_referenced = abuf->written;\n"
-+ ; Declare variables to hold unit arguments.
-+ (string-map (lambda (arg) (gen-arg-decl arg #f))
-+ inputs)
-+ (string-map (lambda (arg) (gen-arg-decl arg #t))
-+ outputs)
-+ ; Initialize 'em, being careful not to initialize an operand that
-+ ; has an override.
-+ (let (; Make a list of names of in/out overrides.
-+ (in-overrides (find-apply cadr
-+ (lambda (elm) (eq? (car elm) 'in))
-+ overrides))
-+ (out-overrides (find-apply cadr
-+ (lambda (elm) (eq? (car elm) 'out))
-+ overrides)))
-+ (string-list
-+ (string-map (lambda (arg)
-+ (if (memq (car arg) in-overrides)
-+ ""
-+ (gen-arg-init arg #f)))
-+ inputs)
-+ (string-map (lambda (arg)
-+ (if (memq (car arg) out-overrides)
-+ ""
-+ (gen-arg-init arg #t)))
-+ outputs)))
-+ (string-map (lambda (arg)
-+ (case (car arg)
-+ ((pred) "")
-+ ((cycles) "")
-+ ((in)
-+ (if (caddr arg)
-+ (string-append " "
-+ (gen-profile-sym (gen-c-symbol (cadr arg)) #f)
-+ " = "
-+ (gen-argbuf-ref
-+ (gen-profile-sym (gen-c-symbol (caddr arg)) #f))
-+ ";\n")
-+ ""))
-+ ((out)
-+ (if (caddr arg)
-+ (string-append " "
-+ (gen-profile-sym (gen-c-symbol (cadr arg)) #t)
-+ " = "
-+ (gen-argbuf-ref
-+ (gen-profile-sym (gen-c-symbol (caddr arg)) #t))
-+ ";\n")
-+ ""))
-+ (else
-+ (parse-error (make-prefix-context "insn function unit spec")
-+ "invalid spec" arg))))
-+ overrides)
-+ ; Create bitmask indicating which args were referenced.
-+ (string-map (lambda (arg num) (gen-ref-arg arg num 'in))
-+ inputs
-+ (iota (length inputs)))
-+ (string-map (lambda (arg num) (gen-ref-arg arg num 'out))
-+ outputs
-+ (iota (length outputs)
-+ (length inputs)))
-+ ; Emit the call to the handler.
-+ " " cycles-var-name " += "
-+ (gen-model-unit-fn-name (unit:model self) self)
-+ " (current_cpu, idesc"
-+ ", " (number->string unit-num)
-+ ", referenced"
-+ (string-map (lambda (arg) (gen-arg-arg arg #f))
-+ inputs)
-+ (string-map (lambda (arg) (gen-arg-arg arg #t))
-+ outputs)
-+ ");\n"
-+ " }\n"
-+ )))
-+)
-+
-+; Return C code to profile an insn-specific unit's usage.
-+; UNIT-NUM is number of the unit in INSN.
-+
-+(method-make!
-+ <iunit> 'gen-profile-code
-+ (lambda (self unit-num insn cycles-var-name)
-+ (let ((args (iunit:args self))
-+ (unit (iunit:unit self)))
-+ (send unit 'gen-profile-code unit-num insn args cycles-var-name)))
-+)
-+
-+; ARGBUF generation.
-+; ARGBUF support is put in cpuall.h, which doesn't depend on sim-cpu.scm,
-+; so this support is here.
-+
-+; Utility of /gen-argbuf-fields-union to generate the definition for
-+; <sformat-abuf> SBUF.
-+
-+(define (/gen-argbuf-elm sbuf)
-+ (logit 2 "Processing sbuf format " (obj:name sbuf) " ...\n")
-+ (string-list
-+ " struct { /* " (obj:comment sbuf) " */\n"
-+ (let ((elms (sbuf-elms sbuf)))
-+ (if (null? elms)
-+ " int empty;\n"
-+ (string-list-map (lambda (elm)
-+ (string-append " "
-+ (cadr elm)
-+ " "
-+ (car elm)
-+ ";\n"))
-+ (sbuf-elms sbuf))))
-+ " } " (gen-sym sbuf) ";\n")
-+)
-+
-+; Utility of gen-argbuf-type to generate the union of extracted ifields.
-+
-+(define (/gen-argbuf-fields-union)
-+ (string-list
-+ "\
-+/* Instruction argument buffer. */
-+
-+union sem_fields {\n"
-+ (string-list-map /gen-argbuf-elm (current-sbuf-list))
-+ "\
-+#if WITH_SCACHE_PBB
-+ /* Writeback handler. */
-+ struct {
-+ /* Pointer to argbuf entry for insn whose results need writing back. */
-+ const struct argbuf *abuf;
-+ } write;
-+ /* x-before handler */
-+ struct {
-+ /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/
-+ int first_p;
-+ } before;
-+ /* x-after handler */
-+ struct {
-+ int empty;
-+ } after;
-+ /* This entry is used to terminate each pbb. */
-+ struct {
-+ /* Number of insns in pbb. */
-+ int insn_count;
-+ /* Next pbb to execute. */
-+ SCACHE *next;
-+ SCACHE *branch_target;
-+ } chain;
-+#endif
-+};\n\n"
-+ )
-+)
-+
-+; Generate the definition of the structure that records arguments.
-+; This is a union of structures with one structure for each insn format.
-+; It also includes hardware profiling information and miscellaneous
-+; administrivia.
-+; CPU-DATA? is #t if data for the currently selected cpu is to be included.
-+
-+(define (gen-argbuf-type cpu-data?)
-+ (logit 2 "Generating ARGBUF type ...\n")
-+ (string-list
-+ (if (and cpu-data? (with-scache?))
-+ (/gen-argbuf-fields-union)
-+ "")
-+ (if cpu-data? "" "#ifndef WANT_CPU\n")
-+ "\
-+/* The ARGBUF struct. */
-+struct argbuf {
-+ /* These are the baseclass definitions. */
-+ IADDR addr;
-+ const IDESC *idesc;
-+ char trace_p;
-+ char profile_p;
-+ /* ??? Temporary hack for skip insns. */
-+ char skip_count;
-+ char unused;
-+ /* cpu specific data follows */\n"
-+ (if cpu-data?
-+ (if (with-scache?)
-+ "\
-+ union sem semantic;
-+ int written;
-+ union sem_fields fields;\n"
-+ "\
-+ CGEN_INSN_WORD insn;
-+ int written;\n")
-+ "")
-+ "};\n"
-+ (if cpu-data? "" "#endif\n")
-+ "\n"
-+ )
-+)
-+
-+; Generate the definition of the structure that records a cached insn.
-+; This is cpu family specific (member `argbuf' is) so it is machine generated.
-+; CPU-DATA? is #t if data for the currently selected cpu is to be included.
-+
-+(define (gen-scache-type cpu-data?)
-+ (logit 2 "Generating SCACHE type ...\n")
-+ (string-append
-+ (if cpu-data? "" "#ifndef WANT_CPU\n")
-+ "\
-+/* A cached insn.
-+
-+ ??? SCACHE used to contain more than just argbuf. We could delete the
-+ type entirely and always just use ARGBUF, but for future concerns and as
-+ a level of abstraction it is left in. */
-+
-+struct scache {
-+ struct argbuf argbuf;\n"
-+ (if (with-generic-write?) "\
-+ int first_insn_p;
-+ int last_insn_p;\n" "")
-+ "};\n"
-+ (if cpu-data? "" "#endif\n")
-+ "\n"
-+ )
-+)
-+
-+; Mode support.
-+
-+; Generate a table of mode data.
-+; For now all we need is the names.
-+
-+(define (gen-mode-defs)
-+ (string-append
-+ "const char *mode_names[] = {\n"
-+ (string-map (lambda (m)
-+ (string-append " \"" (string-upcase (obj:str-name m)) "\",\n"))
-+ ; We don't treat aliases as being different from the real
-+ ; mode here, so ignore them.
-+ (mode-list-non-alias-values))
-+ "};\n\n"
-+ )
-+)
-+
-+; Insn profiling support.
-+
-+; Generate declarations for local variables needed for modelling code.
-+
-+(method-make!
-+ <insn> 'gen-profile-locals
-+ (lambda (self model)
-+; (let ((cti? (or (has-attr? self 'UNCOND-CTI)
-+; (has-attr? self 'COND-CTI))))
-+; (string-append
-+; (if cti? " int UNUSED taken_p = 0;\n" "")
-+; ))
-+ "")
-+)
-+
-+; Generate C code to profile INSN.
-+
-+(method-make!
-+ <insn> 'gen-profile-code
-+ (lambda (self model cycles-var-name)
-+ (string-list
-+ (let ((timing (assq-ref (insn-timing self) (obj:name model))))
-+ (if timing
-+ (string-list-map (lambda (iunit unit-num)
-+ (send iunit 'gen-profile-code unit-num self cycles-var-name))
-+ (timing:units timing)
-+ (iota (length (timing:units timing))))
-+ (send (model-default-unit model) 'gen-profile-code 0 self nil cycles-var-name)))
-+ ))
-+)
-+
-+; .cpu file loading support
-+
-+; Only run sim-analyze-insns! once.
-+(define /sim-insns-analyzed? #f)
-+
-+; List of computed sformat argument buffers.
-+(define /sim-sformat-abuf-list #f)
-+(define (current-sbuf-list) /sim-sformat-abuf-list)
-+
-+; Called before/after the .cpu file has been read in.
-+
-+(define (sim-init!)
-+ (set! /sim-insns-analyzed? #f)
-+ (set! /sim-sformat-abuf-list #f)
-+ *UNSPECIFIED*
-+)
-+
-+;; Subroutine of /create-virtual-insns!.
-+;; Add virtual insn INSN to the database.
-+;; We put virtual insns ahead of normal insns because they're kind of special,
-+;; and it helps to see them first in lists.
-+;; ORDINAL is a used to place the insn ahead of normal insns;
-+;; it is a pair so we can do the update for the next virtual insn here.
-+
-+(define (/virtual-insn-add! ordinal insn)
-+ (obj-set-ordinal! insn (cdr ordinal))
-+ (current-insn-add! insn)
-+ (set-cdr! ordinal (- (cdr ordinal) 1))
-+)
-+
-+; Create the virtual insns.
-+
-+(define (/create-virtual-insns!)
-+ (let ((all (all-isas-attr-value))
-+ (context (make-prefix-context "virtual insns"))
-+ ;; Record as a pair so /virtual-insn-add! can update it.
-+ (ordinal (cons #f -1)))
-+
-+ (/virtual-insn-add!
-+ ordinal
-+ (insn-read context
-+ '(name x-begin)
-+ '(comment "pbb begin handler")
-+ `(attrs VIRTUAL PBB (ISA ,@all))
-+ '(syntax "--begin--")
-+ '(semantics (c-code VOID "\
-+ {
-+#if WITH_SCACHE_PBB_@PREFIX@
-+#if defined DEFINE_SWITCH || defined FAST_P
-+ /* In the switch case FAST_P is a constant, allowing several optimizations
-+ in any called inline functions. */
-+ vpc = @prefix@_pbb_begin (current_cpu, FAST_P);
-+#else
-+#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */
-+ vpc = @prefix@_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
-+#else
-+ vpc = @prefix@_pbb_begin (current_cpu, 0);
-+#endif
-+#endif
-+#endif
-+ }
-+"))
-+ ))
-+
-+ (/virtual-insn-add!
-+ ordinal
-+ (insn-read context
-+ '(name x-chain)
-+ '(comment "pbb chain handler")
-+ `(attrs VIRTUAL PBB (ISA ,@all))
-+ '(syntax "--chain--")
-+ '(semantics (c-code VOID "\
-+ {
-+#if WITH_SCACHE_PBB_@PREFIX@
-+ vpc = @prefix@_pbb_chain (current_cpu, sem_arg);
-+#ifdef DEFINE_SWITCH
-+ BREAK (sem);
-+#endif
-+#endif
-+ }
-+"))
-+ ))
-+
-+ (/virtual-insn-add!
-+ ordinal
-+ (insn-read context
-+ '(name x-cti-chain)
-+ '(comment "pbb cti-chain handler")
-+ `(attrs VIRTUAL PBB (ISA ,@all))
-+ '(syntax "--cti-chain--")
-+ '(semantics (c-code VOID "\
-+ {
-+#if WITH_SCACHE_PBB_@PREFIX@
-+#ifdef DEFINE_SWITCH
-+ vpc = @prefix@_pbb_cti_chain (current_cpu, sem_arg,
-+ pbb_br_type, pbb_br_npc);
-+ BREAK (sem);
-+#else
-+ /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
-+ vpc = @prefix@_pbb_cti_chain (current_cpu, sem_arg,
-+ CPU_PBB_BR_TYPE (current_cpu),
-+ CPU_PBB_BR_NPC (current_cpu));
-+#endif
-+#endif
-+ }
-+"))
-+ ))
-+
-+ (/virtual-insn-add!
-+ ordinal
-+ (insn-read context
-+ '(name x-before)
-+ '(comment "pbb begin handler")
-+ `(attrs VIRTUAL PBB (ISA ,@all))
-+ '(syntax "--before--")
-+ '(semantics (c-code VOID "\
-+ {
-+#if WITH_SCACHE_PBB_@PREFIX@
-+ @prefix@_pbb_before (current_cpu, sem_arg);
-+#endif
-+ }
-+"))
-+ ))
-+
-+ (/virtual-insn-add!
-+ ordinal
-+ (insn-read context
-+ '(name x-after)
-+ '(comment "pbb after handler")
-+ `(attrs VIRTUAL PBB (ISA ,@all))
-+ '(syntax "--after--")
-+ '(semantics (c-code VOID "\
-+ {
-+#if WITH_SCACHE_PBB_@PREFIX@
-+ @prefix@_pbb_after (current_cpu, sem_arg);
-+#endif
-+ }
-+"))
-+ ))
-+
-+ (/virtual-insn-add!
-+ ordinal
-+ (insn-read context
-+ '(name x-invalid)
-+ '(comment "invalid insn handler")
-+ `(attrs VIRTUAL (ISA ,@all))
-+ '(syntax "--invalid--")
-+ (list 'semantics (list 'c-code 'VOID (string-append "\
-+ {
-+ /* Update the recorded pc in the cpu state struct.
-+ Only necessary for WITH_SCACHE case, but to avoid the
-+ conditional compilation .... */
-+ SET_H_PC (pc);
-+ /* Virtual insns have zero size. Overwrite vpc with address of next insn
-+ using the default-insn-bitsize spec. When executing insns in parallel
-+ we may want to queue the fault and continue execution. */
-+ vpc = SEM_NEXT_VPC (sem_arg, pc, " (number->string (bits->bytes (state-default-insn-bitsize))) ");
-+ vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
-+ }
-+")))
-+ ))
-+ )
-+)
-+
-+(define (sim-finish!)
-+ ; Add begin,chain,before,after,invalid handlers if not provided.
-+ ; The code generators should first look for x-foo-@prefix@, then for x-foo.
-+ ; ??? This is good enough for the first pass. Will eventually need to use
-+ ; less C and more RTL.
-+ (/create-virtual-insns!)
-+
-+ *UNSPECIFIED*
-+)
-+
-+; Called after file is read in and global error checks are done
-+; to initialize tables.
-+
-+(define (sim-analyze!)
-+ *UNSPECIFIED*
-+)
-+
-+; Scan insns, analyzing semantics and computing instruction formats.
-+; 'twould be nice to do this in sim-analyze! but it doesn't know whether this
-+; needs to be done or not (which is determined by what files are being
-+; generated). Since this is an expensive operation, we defer doing this
-+; to the files that need it.
-+
-+(define (sim-analyze-insns!)
-+ ; This can only be done if one isa and one cpu family is being kept.
-+ (assert-keep-one)
-+
-+ (if (not /sim-insns-analyzed?)
-+
-+ (begin
-+ (arch-analyze-insns! CURRENT-ARCH
-+ #f ; don't include aliases
-+ #t) ; do analyze the semantics
-+
-+ ; Compute the set of sformat argument buffers.
-+ (set! /sim-sformat-abuf-list (compute-sformat-argbufs! (current-sfmt-list)))
-+
-+ (set! /sim-insns-analyzed? #t)))
-+
-+ ; Do our own error checking.
-+ (assert (current-insn-lookup 'x-invalid #f))
-+
-+ *UNSPECIFIED*
-+)
-+
-+; For debugging.
-+
-+(define (cgen-all-arch)
-+ (string-write
-+ cgen-arch.h
-+ cgen-arch.c
-+ cgen-cpuall.h
-+ ;cgen-mem-ops.h
-+ ;cgen-sem-ops.h
-+ ;cgen-ops.c
-+ )
-+)
-+
-+(define (cgen-all-cpu)
-+ (string-write
-+ cgen-cpu.h
-+ cgen-cpu.c
-+ cgen-decode.h
-+ cgen-decode.c
-+ ;cgen-extract.c
-+ cgen-read.c
-+ cgen-write.c
-+ cgen-semantics.c
-+ cgen-sem-switch.c
-+ cgen-model.c
-+ ;cgen-mainloop.in
-+ )
-+)
-diff -Nur binutils-2.24.orig/cgen/sim-test.scm binutils-2.24/cgen/sim-test.scm
---- binutils-2.24.orig/cgen/sim-test.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/sim-test.scm 2016-06-30 21:26:12.677894046 +0200
-@@ -0,0 +1,251 @@
-+; CPU description file generator for the simulator testsuite.
-+; Copyright (C) 2000, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; This is invoked to build allinsn.exp and a script to run to
-+; generate allinsn.s and allinsn.d.
-+
-+; Specify which application.
-+(set! APPLICATION 'SIM-TEST)
-+
-+; Called before/after the .cpu file has been read.
-+
-+(define (sim-test-init!) (opcodes-init!))
-+(define (sim-test-finish!) (opcodes-finish!))
-+
-+; Called after .cpu file has been read and global error checks are done.
-+; We use the `tmp' member to record the syntax split up into its components.
-+
-+(define (sim-test-analyze!)
-+ (opcodes-analyze!)
-+ (map (lambda
-+ (insn) (elm-xset! insn 'tmp (syntax-break-out (insn-syntax insn)
-+ (obj-isa-list insn))))
-+ (current-insn-list))
-+ *UNSPECIFIED*
-+)
-+
-+; Methods to compute test data.
-+; The result is a list of strings to be inserted in the assembler
-+; in the operand's position.
-+
-+(method-make!
-+ <hw-asm> 'test-data
-+ (lambda (self n)
-+ ; FIXME: floating point support
-+ (let ((signed (list 0 1 -1 2 -2))
-+ (unsigned (list 0 1 2 3 4))
-+ (mode (elm-get self 'mode)))
-+ (map number->string
-+ (list-take n
-+ (if (eq? (mode:class mode) 'UINT)
-+ unsigned
-+ signed)))))
-+)
-+
-+(method-make!
-+ <keyword> 'test-data
-+ (lambda (self n)
-+ (let* ((values (elm-get self 'values))
-+ (n (min n (length values))))
-+ ; FIXME: Need to handle mach variants.
-+ (map car (list-take n values))))
-+)
-+
-+(method-make!
-+ <hw-address> 'test-data
-+ (lambda (self n)
-+ (let ((test-data '("foodata" "4" "footext" "-4")))
-+ (list-take n test-data)))
-+)
-+
-+(method-make!
-+ <hw-iaddress> 'test-data
-+ (lambda (self n)
-+ (let ((test-data '("footext" "4" "foodata" "-4")))
-+ (list-take n test-data)))
-+)
-+
-+(method-make-forward! <hw-register> 'indices '(test-data))
-+(method-make-forward! <hw-immediate> 'values '(test-data))
-+
-+; This can't use method-make-forward! as we need to call op:type to
-+; resolve the hardware reference.
-+
-+(method-make!
-+ <operand> 'test-data
-+ (lambda (self n)
-+ (send (op:type self) 'test-data n))
-+)
-+
-+; Given an operand, return a set of N test data.
-+; e.g. For a keyword operand, return a random subset.
-+; For a number, return N numbers.
-+
-+(define (operand-test-data op n)
-+ (send op 'test-data n)
-+)
-+
-+; Given the broken out assembler syntax string, return the list of operand
-+; objects.
-+
-+(define (extract-operands syntax-list)
-+ (let loop ((result nil) (l syntax-list))
-+ (cond ((null? l) (reverse result))
-+ ((object? (car l)) (loop (cons (car l) result) (cdr l)))
-+ (else (loop result (cdr l)))))
-+)
-+
-+; Given a list of operands for an instruction, return the test set
-+; (all possible combinations).
-+; N is the number of testcases for each operand.
-+; The result has N to-the-power (length OP-LIST) elements.
-+
-+(define (build-test-set op-list n)
-+ (let ((test-data (map (lambda (op) (operand-test-data op n)) op-list))
-+ (len (length op-list)))
-+ ; FIXME: Make slicker later.
-+ (cond ((=? len 0) (list (list)))
-+ ((=? len 1) test-data)
-+ (else (list (map car test-data)))))
-+)
-+
-+; Given an assembler expression and a set of operands build a testcase.
-+; SYNTAX-LIST is a list of syntax elements (characters) and <operand> objects.
-+; TEST-DATA is a list of strings, one element per operand.
-+; FIXME: wip
-+
-+(define (build-sim-testcase syntax-list test-data)
-+ (logit 3 "Building a testcase for: "
-+ (map (lambda (sl)
-+ (string-append " "
-+ (cond ((string? sl)
-+ sl)
-+ ((operand? sl)
-+ (obj:str-name sl))
-+ (else
-+ (with-output-to-string
-+ (lambda () (display sl)))))))
-+ syntax-list)
-+ ", test data: "
-+ (map (lambda (td) (list " " td))
-+ test-data)
-+ "\n")
-+ (let loop ((result nil) (sl syntax-list) (td test-data))
-+ ;(display (list result sl td "\n"))
-+ (cond ((null? sl)
-+ (string-append "\t"
-+ (apply string-append (reverse result))
-+ "\n"))
-+ ((string? (car sl))
-+ (loop (cons (car sl) result) (cdr sl) td))
-+ (else (loop (cons (->string (car td)) result) (cdr sl) (cdr td)))))
-+)
-+
-+; Generate a set of testcases for INSN.
-+; FIXME: wip
-+
-+(define (gen-sim-test insn)
-+ (logit 2 "Generating sim test set for " (obj:name insn) " ...\n")
-+ (string-append
-+ "\t.global " (gen-sym insn) "\n"
-+ (gen-sym insn) ":\n"
-+ (let* ((syntax-list (insn-tmp insn))
-+ (op-list (extract-operands syntax-list))
-+ (test-set (build-test-set op-list 2)))
-+ (string-map (lambda (test-data)
-+ (build-sim-testcase syntax-list test-data))
-+ test-set))
-+ )
-+)
-+
-+; Generate the shell script that builds the .cgs files.
-+; .cgs are .s files except that there may be other .s files in the directory
-+; and we want the .exp driver script to easily find the files.
-+;
-+; Eventually it would be nice to generate as much of the testcase as possible.
-+; For now we just generate the template and leave the programmer to fill in
-+; the guts of the test (i.e. set up various registers, execute the insn to be
-+; tested, and then verify the results).
-+; Clearly some hand generated testcases will also be needed, but this
-+; provides a good start for each instruction.
-+
-+(define (cgen-build.sh)
-+ (logit 1 "Generating sim-build.sh ...\n")
-+ (string-append
-+ "\
-+#/bin/sh
-+# Generate test result data for "
-+(symbol->string (current-arch-name))
-+" simulator testing.
-+# This script is machine generated.
-+# It is intended to be run in the testsuite source directory.
-+#
-+# Syntax: /bin/sh sim-build.sh
-+
-+# Put results here, so we preserve the existing set for comparison.
-+rm -rf tmpdir
-+mkdir tmpdir
-+cd tmpdir
-+\n"
-+
-+ (string-map (lambda (insn)
-+ (string-append
-+ "cat <<EOF > " (gen-file-name (obj:name insn)) ".cgs\n"
-+ ; FIXME: Need to record assembler line comment char in .cpu.
-+ "# "
-+ (symbol->string (current-arch-name))
-+ " testcase for " (backslash "$" (insn-syntax insn))
-+ " -*- Asm -*-\n"
-+ "# mach: "
-+ (let ((machs (insn-machs insn)))
-+ (if (null? machs)
-+ "all"
-+ (string-drop1
-+ (string-map (lambda (mach)
-+ (string-append "," (symbol->string mach)))
-+ machs))))
-+ "\n\n"
-+ "\t.include \"testutils.inc\"\n\n"
-+ "\tstart\n\n"
-+ (gen-sim-test insn)
-+ "\n\tpass\n"
-+ "EOF\n\n"))
-+ (non-alias-insns (current-insn-list)))
-+ )
-+)
-+
-+; Generate the dejagnu allinsn.exp file that drives the tests.
-+
-+(define (cgen-allinsn.exp)
-+ (logit 1 "Generating sim-allinsn.exp ...\n")
-+ (string-append
-+ "\
-+# " (string-upcase (symbol->string (current-arch-name))) " simulator testsuite.
-+
-+if [istarget " (symbol->string (current-arch-name)) "*-*-*] {
-+ # load support procs (none yet)
-+ # load_lib cgen.exp
-+
-+ # all machines
-+ set all_machs \""
-+ (string-drop1 (string-map (lambda (m)
-+ (string-append " "
-+ (gen-sym m)))
-+ (current-mach-list)))
-+ "\"
-+
-+ # The .cgs suffix is for \"cgen .s\".
-+ foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.cgs]] {
-+ # If we're only testing specific files and this isn't one of them,
-+ # skip it.
-+ if ![runtest_file_p $runtests $src] {
-+ continue
-+ }
-+
-+ run_sim_test $src $all_machs
-+ }
-+}\n"
-+ )
-+)
-diff -Nur binutils-2.24.orig/cgen/slib/genwrite.scm binutils-2.24/cgen/slib/genwrite.scm
---- binutils-2.24.orig/cgen/slib/genwrite.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/slib/genwrite.scm 2016-06-30 21:26:12.677894046 +0200
-@@ -0,0 +1,270 @@
-+;;"genwrite.scm" generic write used by pretty-print and truncated-print.
-+;; Copyright (c) 1991, Marc Feeley
-+;; Author: Marc Feeley (feeley@iro.umontreal.ca)
-+;; Distribution restrictions: none
-+
-+(define (generic-write obj display? width output)
-+
-+ (define (read-macro? l)
-+ (define (length1? l) (and (pair? l) (null? (cdr l))))
-+ (let ((head (car l)) (tail (cdr l)))
-+ (case head
-+ ((QUOTE QUASIQUOTE UNQUOTE UNQUOTE-SPLICING) (length1? tail))
-+ (else #f))))
-+
-+ (define (read-macro-body l)
-+ (cadr l))
-+
-+ (define (read-macro-prefix l)
-+ (let ((head (car l)) (tail (cdr l)))
-+ (case head
-+ ((QUOTE) "'")
-+ ((QUASIQUOTE) "`")
-+ ((UNQUOTE) ",")
-+ ((UNQUOTE-SPLICING) ",@"))))
-+
-+ (define (out str col)
-+ (and col (output str) (+ col (string-length str))))
-+
-+ (define (wr obj col)
-+
-+ (define (wr-expr expr col)
-+ (if (read-macro? expr)
-+ (wr (read-macro-body expr) (out (read-macro-prefix expr) col))
-+ (wr-lst expr col)))
-+
-+ (define (wr-lst l col)
-+ (if (pair? l)
-+ (let loop ((l (cdr l))
-+ (col (and col (wr (car l) (out "(" col)))))
-+ (cond ((not col) col)
-+ ((pair? l)
-+ (loop (cdr l) (wr (car l) (out " " col))))
-+ ((null? l) (out ")" col))
-+ (else (out ")" (wr l (out " . " col))))))
-+ (out "()" col)))
-+
-+ (cond ((pair? obj) (wr-expr obj col))
-+ ((null? obj) (wr-lst obj col))
-+ ((vector? obj) (wr-lst (vector->list obj) (out "#" col)))
-+ ((boolean? obj) (out (if obj "#t" "#f") col))
-+ ((number? obj) (out (number->string obj) col))
-+ ((symbol? obj) (out (symbol->string obj) col))
-+ ((procedure? obj) (out "#[procedure]" col))
-+ ((string? obj) (if display?
-+ (out obj col)
-+ (let loop ((i 0) (j 0) (col (out "\"" col)))
-+ (if (and col (< j (string-length obj)))
-+ (let ((c (string-ref obj j)))
-+ (if (or (char=? c #\\)
-+ (char=? c #\"))
-+ (loop j
-+ (+ j 1)
-+ (out "\\"
-+ (out (substring obj i j)
-+ col)))
-+ (loop i (+ j 1) col)))
-+ (out "\""
-+ (out (substring obj i j) col))))))
-+ ((char? obj) (if display?
-+ (out (make-string 1 obj) col)
-+ (out (case obj
-+ ((#\space) "space")
-+ ((#\newline) "newline")
-+ (else (make-string 1 obj)))
-+ (out "#\\" col))))
-+ ((input-port? obj) (out "#[input-port]" col))
-+ ((output-port? obj) (out "#[output-port]" col))
-+ ((eof-object? obj) (out "#[eof-object]" col))
-+ ((keyword? obj) (let* ((o (symbol->string
-+ (keyword-dash-symbol obj)))
-+ (oo (list->string
-+ (append (list #\# #\:)
-+ (cdr (string->list o))))))
-+ (out oo col)))
-+ (else (out "#[unknown]" col))))
-+
-+ (define (pp obj col)
-+
-+ (define (spaces n col)
-+ (if (> n 0)
-+ (if (> n 7)
-+ (spaces (- n 8) (out " " col))
-+ (out (substring " " 0 n) col))
-+ col))
-+
-+ (define (indent to col)
-+ (and col
-+ (if (< to col)
-+ (and (out (make-string 1 #\newline) col) (spaces to 0))
-+ (spaces (- to col) col))))
-+
-+ (define (pr obj col extra pp-pair)
-+ (if (or (pair? obj) (vector? obj)) ; may have to split on multiple lines
-+ (let ((result '())
-+ (left (min (+ (- (- width col) extra) 1) max-expr-width)))
-+ (generic-write obj display? #f
-+ (lambda (str)
-+ (set! result (cons str result))
-+ (set! left (- left (string-length str)))
-+ (> left 0)))
-+ (if (> left 0) ; all can be printed on one line
-+ (out (reverse-string-append result) col)
-+ (if (pair? obj)
-+ (pp-pair obj col extra)
-+ (pp-list (vector->list obj) (out "#" col) extra pp-expr))))
-+ (wr obj col)))
-+
-+ (define (pp-expr expr col extra)
-+ (if (read-macro? expr)
-+ (pr (read-macro-body expr)
-+ (out (read-macro-prefix expr) col)
-+ extra
-+ pp-expr)
-+ (let ((head (car expr)))
-+ (if (symbol? head)
-+ (let ((proc (style head)))
-+ (if proc
-+ (proc expr col extra)
-+ (if (> (string-length (symbol->string head))
-+ max-call-head-width)
-+ (pp-general expr col extra #f #f #f pp-expr)
-+ (pp-call expr col extra pp-expr))))
-+ (pp-list expr col extra pp-expr)))))
-+
-+ ; (head item1
-+ ; item2
-+ ; item3)
-+ (define (pp-call expr col extra pp-item)
-+ (let ((col* (wr (car expr) (out "(" col))))
-+ (and col
-+ (pp-down (cdr expr) col* (+ col* 1) extra pp-item))))
-+
-+ ; (item1
-+ ; item2
-+ ; item3)
-+ (define (pp-list l col extra pp-item)
-+ (let ((col (out "(" col)))
-+ (pp-down l col col extra pp-item)))
-+
-+ (define (pp-down l col1 col2 extra pp-item)
-+ (let loop ((l l) (col col1))
-+ (and col
-+ (cond ((pair? l)
-+ (let ((rest (cdr l)))
-+ (let ((extra (if (null? rest) (+ extra 1) 0)))
-+ (loop rest
-+ (pr (car l) (indent col2 col) extra pp-item)))))
-+ ((null? l)
-+ (out ")" col))
-+ (else
-+ (out ")"
-+ (pr l
-+ (indent col2 (out "." (indent col2 col)))
-+ (+ extra 1)
-+ pp-item)))))))
-+
-+ (define (pp-general expr col extra named? pp-1 pp-2 pp-3)
-+
-+ (define (tail1 rest col1 col2 col3)
-+ (if (and pp-1 (pair? rest))
-+ (let* ((val1 (car rest))
-+ (rest (cdr rest))
-+ (extra (if (null? rest) (+ extra 1) 0)))
-+ (tail2 rest col1 (pr val1 (indent col3 col2) extra pp-1) col3))
-+ (tail2 rest col1 col2 col3)))
-+
-+ (define (tail2 rest col1 col2 col3)
-+ (if (and pp-2 (pair? rest))
-+ (let* ((val1 (car rest))
-+ (rest (cdr rest))
-+ (extra (if (null? rest) (+ extra 1) 0)))
-+ (tail3 rest col1 (pr val1 (indent col3 col2) extra pp-2)))
-+ (tail3 rest col1 col2)))
-+
-+ (define (tail3 rest col1 col2)
-+ (pp-down rest col2 col1 extra pp-3))
-+
-+ (let* ((head (car expr))
-+ (rest (cdr expr))
-+ (col* (wr head (out "(" col))))
-+ (if (and named? (pair? rest))
-+ (let* ((name (car rest))
-+ (rest (cdr rest))
-+ (col** (wr name (out " " col*))))
-+ (tail1 rest (+ col indent-general) col** (+ col** 1)))
-+ (tail1 rest (+ col indent-general) col* (+ col* 1)))))
-+
-+ (define (pp-expr-list l col extra)
-+ (pp-list l col extra pp-expr))
-+
-+ (define (pp-LAMBDA expr col extra)
-+ (pp-general expr col extra #f pp-expr-list #f pp-expr))
-+
-+ (define (pp-IF expr col extra)
-+ (pp-general expr col extra #f pp-expr #f pp-expr))
-+
-+ (define (pp-COND expr col extra)
-+ (pp-call expr col extra pp-expr-list))
-+
-+ (define (pp-CASE expr col extra)
-+ (pp-general expr col extra #f pp-expr #f pp-expr-list))
-+
-+ (define (pp-AND expr col extra)
-+ (pp-call expr col extra pp-expr))
-+
-+ (define (pp-LET expr col extra)
-+ (let* ((rest (cdr expr))
-+ (named? (and (pair? rest) (symbol? (car rest)))))
-+ (pp-general expr col extra named? pp-expr-list #f pp-expr)))
-+
-+ (define (pp-BEGIN expr col extra)
-+ (pp-general expr col extra #f #f #f pp-expr))
-+
-+ (define (pp-DO expr col extra)
-+ (pp-general expr col extra #f pp-expr-list pp-expr-list pp-expr))
-+
-+ ; define formatting style (change these to suit your style)
-+
-+ (define indent-general 2)
-+
-+ (define max-call-head-width 5)
-+
-+ (define max-expr-width 50)
-+
-+ (define (style head)
-+ (case head
-+ ((LAMBDA LET* LETREC DEFINE) pp-LAMBDA)
-+ ((IF SET!) pp-IF)
-+ ((COND) pp-COND)
-+ ((CASE) pp-CASE)
-+ ((AND OR) pp-AND)
-+ ((LET) pp-LET)
-+ ((BEGIN) pp-BEGIN)
-+ ((DO) pp-DO)
-+ (else #f)))
-+
-+ (pr obj col 0 pp-expr))
-+
-+ (if width
-+ (out (make-string 1 #\newline) (pp obj 0))
-+ (wr obj 0)))
-+
-+; (reverse-string-append l) = (apply string-append (reverse l))
-+
-+(define (reverse-string-append l)
-+
-+ (define (rev-string-append l i)
-+ (if (pair? l)
-+ (let* ((str (car l))
-+ (len (string-length str))
-+ (result (rev-string-append (cdr l) (+ i len))))
-+ (let loop ((j 0) (k (- (- (string-length result) i) len)))
-+ (if (< j len)
-+ (begin
-+ (string-set! result k (string-ref str j))
-+ (loop (+ j 1) (+ k 1)))
-+ result)))
-+ (make-string i)))
-+
-+ (rev-string-append l 0))
-diff -Nur binutils-2.24.orig/cgen/slib/logical.scm binutils-2.24/cgen/slib/logical.scm
---- binutils-2.24.orig/cgen/slib/logical.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/slib/logical.scm 2016-06-30 21:26:12.677894046 +0200
-@@ -0,0 +1,168 @@
-+;;;; "logical.scm", bit access and operations for integers for Scheme
-+;;; Copyright (C) 1991, 1993 Aubrey Jaffer.
-+;
-+;Permission to copy this software, to redistribute it, and to use it
-+;for any purpose is granted, subject to the following restrictions and
-+;understandings.
-+;
-+;1. Any copy made of this software must include this copyright notice
-+;in full.
-+;
-+;2. I have made no warrantee or representation that the operation of
-+;this software will be error-free, and I am under no obligation to
-+;provide any services, by way of maintenance, update, or otherwise.
-+;
-+;3. In conjunction with products arising from the use of this
-+;material, there shall be no use of my name in any advertising,
-+;promotional, or sales literature without prior written consent in
-+;each case.
-+
-+(define logical:integer-expt
-+ (if (defined? 'inexact)
-+ expt
-+ (lambda (n k)
-+ (logical:ipow-by-squaring n k 1 *))))
-+
-+(define (logical:ipow-by-squaring x k acc proc)
-+ (cond ((zero? k) acc)
-+ ((= 1 k) (proc acc x))
-+ (else (logical:ipow-by-squaring (proc x x)
-+ (quotient k 2)
-+ (if (even? k) acc (proc acc x))
-+ proc))))
-+
-+(define (logical:logand n1 n2)
-+ (cond ((= n1 n2) n1)
-+ ((zero? n1) 0)
-+ ((zero? n2) 0)
-+ (else
-+ (+ (* (logical:logand (logical:ash-4 n1) (logical:ash-4 n2)) 16)
-+ (vector-ref (vector-ref logical:boole-and (modulo n1 16))
-+ (modulo n2 16))))))
-+
-+(define (logical:logior n1 n2)
-+ (cond ((= n1 n2) n1)
-+ ((zero? n1) n2)
-+ ((zero? n2) n1)
-+ (else
-+ (+ (* (logical:logior (logical:ash-4 n1) (logical:ash-4 n2)) 16)
-+ (- 15 (vector-ref (vector-ref logical:boole-and
-+ (- 15 (modulo n1 16)))
-+ (- 15 (modulo n2 16))))))))
-+
-+(define (logical:logxor n1 n2)
-+ (cond ((= n1 n2) 0)
-+ ((zero? n1) n2)
-+ ((zero? n2) n1)
-+ (else
-+ (+ (* (logical:logxor (logical:ash-4 n1) (logical:ash-4 n2)) 16)
-+ (vector-ref (vector-ref logical:boole-xor (modulo n1 16))
-+ (modulo n2 16))))))
-+
-+(define (logical:lognot n) (- -1 n))
-+
-+(define (logical:logtest int1 int2)
-+ (not (zero? (logical:logand int1 int2))))
-+
-+(define (logical:logbit? index int)
-+ (logical:logtest (logical:integer-expt 2 index) int))
-+
-+(define (logical:copy-bit index to bool)
-+ (if bool
-+ (logical:logior to (logical:ash 1 index))
-+ (logical:logand to (logical:lognot (logical:ash 1 index)))))
-+
-+(define (logical:bit-field n start end)
-+ (logical:logand (- (logical:integer-expt 2 (- end start)) 1)
-+ (logical:ash n (- start))))
-+
-+(define (logical:bitwise-if mask n0 n1)
-+ (logical:logior (logical:logand mask n0)
-+ (logical:logand (logical:lognot mask) n1)))
-+
-+(define (logical:copy-bit-field to start end from)
-+ (logical:bitwise-if
-+ (logical:ash (- (logical:integer-expt 2 (- end start)) 1) start)
-+ (logical:ash from start)
-+ to))
-+
-+(define (logical:ash int cnt)
-+ (if (negative? cnt)
-+ (let ((n (logical:integer-expt 2 (- cnt))))
-+ (if (negative? int)
-+ (+ -1 (quotient (+ 1 int) n))
-+ (quotient int n)))
-+ (* (logical:integer-expt 2 cnt) int)))
-+
-+(define (logical:ash-4 x)
-+ (if (negative? x)
-+ (+ -1 (quotient (+ 1 x) 16))
-+ (quotient x 16)))
-+
-+(define (logical:logcount n)
-+ (cond ((zero? n) 0)
-+ ((negative? n) (logical:logcount (logical:lognot n)))
-+ (else
-+ (+ (logical:logcount (logical:ash-4 n))
-+ (vector-ref '#(0 1 1 2 1 2 2 3 1 2 2 3 2 3 3 4)
-+ (modulo n 16))))))
-+
-+(define (logical:integer-length n)
-+ (case n
-+ ((0 -1) 0)
-+ ((1 -2) 1)
-+ ((2 3 -3 -4) 2)
-+ ((4 5 6 7 -5 -6 -7 -8) 3)
-+ (else (+ 4 (logical:integer-length (logical:ash-4 n))))))
-+
-+(define logical:boole-xor
-+ '#(#(0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)
-+ #(1 0 3 2 5 4 7 6 9 8 11 10 13 12 15 14)
-+ #(2 3 0 1 6 7 4 5 10 11 8 9 14 15 12 13)
-+ #(3 2 1 0 7 6 5 4 11 10 9 8 15 14 13 12)
-+ #(4 5 6 7 0 1 2 3 12 13 14 15 8 9 10 11)
-+ #(5 4 7 6 1 0 3 2 13 12 15 14 9 8 11 10)
-+ #(6 7 4 5 2 3 0 1 14 15 12 13 10 11 8 9)
-+ #(7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8)
-+ #(8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7)
-+ #(9 8 11 10 13 12 15 14 1 0 3 2 5 4 7 6)
-+ #(10 11 8 9 14 15 12 13 2 3 0 1 6 7 4 5)
-+ #(11 10 9 8 15 14 13 12 3 2 1 0 7 6 5 4)
-+ #(12 13 14 15 8 9 10 11 4 5 6 7 0 1 2 3)
-+ #(13 12 15 14 9 8 11 10 5 4 7 6 1 0 3 2)
-+ #(14 15 12 13 10 11 8 9 6 7 4 5 2 3 0 1)
-+ #(15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0)))
-+
-+(define logical:boole-and
-+ '#(#(0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
-+ #(0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1)
-+ #(0 0 2 2 0 0 2 2 0 0 2 2 0 0 2 2)
-+ #(0 1 2 3 0 1 2 3 0 1 2 3 0 1 2 3)
-+ #(0 0 0 0 4 4 4 4 0 0 0 0 4 4 4 4)
-+ #(0 1 0 1 4 5 4 5 0 1 0 1 4 5 4 5)
-+ #(0 0 2 2 4 4 6 6 0 0 2 2 4 4 6 6)
-+ #(0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7)
-+ #(0 0 0 0 0 0 0 0 8 8 8 8 8 8 8 8)
-+ #(0 1 0 1 0 1 0 1 8 9 8 9 8 9 8 9)
-+ #(0 0 2 2 0 0 2 2 8 8 10 10 8 8 10 10)
-+ #(0 1 2 3 0 1 2 3 8 9 10 11 8 9 10 11)
-+ #(0 0 0 0 4 4 4 4 8 8 8 8 12 12 12 12)
-+ #(0 1 0 1 4 5 4 5 8 9 8 9 12 13 12 13)
-+ #(0 0 2 2 4 4 6 6 8 8 10 10 12 12 14 14)
-+ #(0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)))
-+
-+(define logand logical:logand)
-+(define logior logical:logior)
-+(define logxor logical:logxor)
-+(define lognot logical:lognot)
-+(define logtest logical:logtest)
-+(define logbit? logical:logbit?)
-+(define copy-bit logical:copy-bit)
-+(define ash logical:ash)
-+(define logcount logical:logcount)
-+(define integer-length logical:integer-length)
-+(define bit-field logical:bit-field)
-+(define bit-extract logical:bit-field)
-+(define copy-bit-field logical:copy-bit-field)
-+(define ipow-by-squaring logical:ipow-by-squaring)
-+(define integer-expt logical:integer-expt)
-diff -Nur binutils-2.24.orig/cgen/slib/pp.scm binutils-2.24/cgen/slib/pp.scm
---- binutils-2.24.orig/cgen/slib/pp.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/slib/pp.scm 2016-06-30 21:26:12.677894046 +0200
-@@ -0,0 +1,10 @@
-+;"pp.scm" Pretty-print
-+
-+; (pretty-print obj port) pretty prints 'obj' on 'port'. The current
-+; output port is used if 'port' is not specified.
-+
-+(define (pp:pretty-print obj . opt)
-+ (let ((port (if (pair? opt) (car opt) (current-output-port))))
-+ (generic-write obj #f 79 (lambda (s) (display s port) #t))))
-+
-+(define pretty-print pp:pretty-print)
-diff -Nur binutils-2.24.orig/cgen/slib/random.scm binutils-2.24/cgen/slib/random.scm
---- binutils-2.24.orig/cgen/slib/random.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/slib/random.scm 2016-06-30 21:26:12.677894046 +0200
-@@ -0,0 +1,117 @@
-+;;; random-maker: constructs a random-number generator
-+;;; Copyright (c) 2001 John David Stone
-+
-+;;; This program is free software; you can redistribute it and/or modify it
-+;;; under the terms of the GNU General Public License as published by the
-+;;; Free Software Foundation; either version 2 of the License, or (at your
-+;;; option) any later version.
-+;;;
-+;;; This program is distributed in the hope that it will be useful, but
-+;;; WITHOUT ANY WARRANTY; without even the implied warranty of
-+;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+;;; General Public License for more details.
-+;;;
-+;;; You should have received a copy of the GNU General Public License along
-+;;; with this program; if not, write to the Free Software Foundation, Inc.,
-+;;; 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
-+
-+;;; John David Stone
-+;;; Department of Mathematics and Computer Science
-+;;; Grinnell College
-+;;; Grinnell, Iowa 50112
-+;;; stone@cs.grinnell.edu
-+
-+;;; created July 10, 1995
-+;;; last revised March 23, 2001
-+
-+;;; A call to the RANDOM-MAKER procedure presented here yields a
-+;;; dynamically constructed procedure that acts as a random-number
-+;;; generator. When the dynamically constructed procedure is invoked with
-+;;; no arguments, it returns a pseudo-random real value evenly distributed
-+;;; in the range [0.0, 1.0); when it is invoked with one argument (which
-+;;; should be a positive integer N), it returns a pseudo-random integer
-+;;; value evenly distributed in the range [0, N); when it is invoked with
-+;;; two arguments, the first of which should be a positive integer and the
-+;;; second the symbol RESET, it changes the seed of the random-number
-+;;; generator to the value of the first argument.
-+
-+;;; The generator employs the linear-congruential method, and specifically
-+;;; uses a choice of multiplier that was proposed as a standard by Stephen
-+;;; K. Park _et al._ in ``Technical correspondence,'' _Communications of
-+;;; the ACM_ 36 (1993), number 7, 108--110.
-+
-+(define random-maker
-+ (let* ((multiplier 48271)
-+ (modulus 2147483647)
-+ (apply-congruence
-+ (lambda (current-seed)
-+ (let ((candidate (modulo (* current-seed multiplier)
-+ modulus)))
-+ (if (zero? candidate)
-+ modulus
-+ candidate))))
-+ (coerce
-+ (lambda (proposed-seed)
-+ (if (integer? proposed-seed)
-+ (- modulus (modulo proposed-seed modulus))
-+ 19860617)))) ;; an arbitrarily chosen birthday
-+ (lambda (initial-seed)
-+ (let ((seed (coerce initial-seed)))
-+ (lambda args
-+ (cond ((null? args)
-+ (set! seed (apply-congruence seed))
-+ (/ (- modulus seed) modulus))
-+ ((null? (cdr args))
-+ (let* ((proposed-top
-+ (ceiling (abs (car args))))
-+ (exact-top
-+ (if (inexact? proposed-top)
-+ (inexact->exact proposed-top)
-+ proposed-top))
-+ (top
-+ (if (zero? exact-top)
-+ 1
-+ exact-top)))
-+ (set! seed (apply-congruence seed))
-+ (inexact->exact (floor (* top (/ seed modulus))))))
-+ ((eq? (cadr args) 'reset)
-+ (set! seed (coerce (car args))))
-+ (else
-+ (display "random: unrecognized message")
-+ (newline))))))))
-+
-+(define random
-+ (random-maker 19781116)) ;; another arbitrarily chosen birthday
-+
-+;;; The RANDOM procedure added at the end shows how to call
-+;;; RANDOM-MAKER to get a random-number generator with a specific seed.
-+;;; The random-number generator itself is invoked as described above, by
-+;;; such calls as (RANDOM), to get a real number between 0 and 1, and
-+;;; (RANDOM N), to get an integer in the range from 0 to N - 1.
-+
-+;;; The location of the binding of SEED -- inside the body of RANDOM-MAKER,
-+;;; but outside the LAMBDA-expression that denotes the dynamically
-+;;; allocated procedure -- ensures that the storage location containing the
-+;;; seed will be different for each invocation of RANDOM-MAKER (so that
-+;;; every generator that is constructed will have an independently settable
-+;;; seed), yet inaccessible except through invocations to the dynamically
-+;;; allocated procedure itself. In effect, random-number generators in
-+;;; this implementation constitute an abstract data type with the
-+;;; constructor RANDOM-MAKER and exactly three operations, corresponding to
-+;;; the three possible arities of a call to the generator.
-+
-+;;; When calling this procedure, the programmer must supply an initial
-+;;; value for the seed. This should be an integer (if it is not, an
-+;;; arbitrary default seed is silently substituted). The value supplied is
-+;;; forced into the range (0, MODULUS], since it is an invariant of the
-+;;; procedure that the seed must always be in this range.
-+
-+;;; To obtain an initial seed that is likely to be different each time a
-+;;; new generator is constructed, use some combination of the program's
-+;;; running time and the wall-clock time. (Most Scheme implementations
-+;;; provide procedures that return one or both of these quantities. For
-+;;; instance, in SCM, the call
-+;;;
-+;;; (RANDOM-MAKER (+ (* 100000 (GET-INTERNAL-RUN-TIME)) (CURRENT-TIME)))
-+;;;
-+;;; yields a generator with an effectively random seed.)
-diff -Nur binutils-2.24.orig/cgen/slib/sort.scm binutils-2.24/cgen/slib/sort.scm
---- binutils-2.24.orig/cgen/slib/sort.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/slib/sort.scm 2016-06-30 21:26:12.677894046 +0200
-@@ -0,0 +1,151 @@
-+;;; "sort.scm" Defines: sorted?, merge, merge!, sort, sort!
-+;;; Author : Richard A. O'Keefe (based on Prolog code by D.H.D.Warren)
-+
-+;;; Updated: 11 June 1991
-+;;; Modified for scheme library: Aubrey Jaffer 19 Sept. 1991
-+
-+;;; (sorted? sequence less?)
-+;;; is true when sequence is a list (x0 x1 ... xm) or a vector #(x0 ... xm)
-+;;; such that for all 1 <= i <= m,
-+;;; (not (less? (list-ref list i) (list-ref list (- i 1)))).
-+
-+(define (sort:sorted? seq less?)
-+ (cond
-+ ((null? seq)
-+ #t)
-+ ((vector? seq)
-+ (let ((n (vector-length seq)))
-+ (if (<= n 1)
-+ #t
-+ (do ((i 1 (+ i 1)))
-+ ((or (= i n)
-+ (less? (vector-ref seq (- i 1))
-+ (vector-ref seq i)))
-+ (= i n)) )) ))
-+ (else
-+ (let loop ((last (car seq)) (next (cdr seq)))
-+ (or (null? next)
-+ (and (not (less? (car next) last))
-+ (loop (car next) (cdr next)) )) )) ))
-+
-+
-+;;; (merge a b less?)
-+;;; takes two lists a and b such that (sorted? a less?) and (sorted? b less?)
-+;;; and returns a new list in which the elements of a and b have been stably
-+;;; interleaved so that (sorted? (merge a b less?) less?).
-+;;; Note: this does _not_ accept vectors. See below.
-+
-+(define (sort:merge a b less?)
-+ (cond
-+ ((null? a) b)
-+ ((null? b) a)
-+ (else (let loop ((x (car a)) (a (cdr a)) (y (car b)) (b (cdr b)))
-+ ;; The loop handles the merging of non-empty lists. It has
-+ ;; been written this way to save testing and car/cdring.
-+ (if (less? y x)
-+ (if (null? b)
-+ (cons y (cons x a))
-+ (cons y (loop x a (car b) (cdr b)) ))
-+ ;; x <= y
-+ (if (null? a)
-+ (cons x (cons y b))
-+ (cons x (loop (car a) (cdr a) y b)) )) )) ))
-+
-+
-+;;; (merge! a b less?)
-+;;; takes two sorted lists a and b and smashes their cdr fields to form a
-+;;; single sorted list including the elements of both.
-+;;; Note: this does _not_ accept vectors.
-+
-+(define (sort:merge! a b less?)
-+ (define (loop r a b)
-+ (if (less? (car b) (car a))
-+ (begin
-+ (set-cdr! r b)
-+ (if (null? (cdr b))
-+ (set-cdr! b a)
-+ (loop b a (cdr b)) ))
-+ ;; (car a) <= (car b)
-+ (begin
-+ (set-cdr! r a)
-+ (if (null? (cdr a))
-+ (set-cdr! a b)
-+ (loop a (cdr a) b)) )) )
-+ (cond
-+ ((null? a) b)
-+ ((null? b) a)
-+ ((less? (car b) (car a))
-+ (if (null? (cdr b))
-+ (set-cdr! b a)
-+ (loop b a (cdr b)))
-+ b)
-+ (else ; (car a) <= (car b)
-+ (if (null? (cdr a))
-+ (set-cdr! a b)
-+ (loop a (cdr a) b))
-+ a)))
-+
-+
-+
-+;;; (sort! sequence less?)
-+;;; sorts the list or vector sequence destructively. It uses a version
-+;;; of merge-sort invented, to the best of my knowledge, by David H. D.
-+;;; Warren, and first used in the DEC-10 Prolog system. R. A. O'Keefe
-+;;; adapted it to work destructively in Scheme.
-+
-+(define (sort:sort! seq less?)
-+ (define (step n)
-+ (cond
-+ ((> n 2)
-+ (let* ((j (quotient n 2))
-+ (a (step j))
-+ (k (- n j))
-+ (b (step k)))
-+ (sort:merge! a b less?)))
-+ ((= n 2)
-+ (let ((x (car seq))
-+ (y (cadr seq))
-+ (p seq))
-+ (set! seq (cddr seq))
-+ (if (less? y x) (begin
-+ (set-car! p y)
-+ (set-car! (cdr p) x)))
-+ (set-cdr! (cdr p) '())
-+ p))
-+ ((= n 1)
-+ (let ((p seq))
-+ (set! seq (cdr seq))
-+ (set-cdr! p '())
-+ p))
-+ (else
-+ '()) ))
-+ (if (vector? seq)
-+ (let ((n (vector-length seq))
-+ (vec seq))
-+ (set! seq (vector->list seq))
-+ (do ((p (step n) (cdr p))
-+ (i 0 (+ i 1)))
-+ ((null? p) vec)
-+ (vector-set! vec i (car p)) ))
-+ ;; otherwise, assume it is a list
-+ (step (length seq)) ))
-+
-+;;; (sort sequence less?)
-+;;; sorts a vector or list non-destructively. It does this by sorting a
-+;;; copy of the sequence. My understanding is that the Standard says
-+;;; that the result of append is always "newly allocated" except for
-+;;; sharing structure with "the last argument", so (append x '()) ought
-+;;; to be a standard way of copying a list x.
-+
-+(define (sort:sort seq less?)
-+ (if (vector? seq)
-+ (list->vector (sort:sort! (vector->list seq) less?))
-+ (sort:sort! (append seq '()) less?)))
-+
-+;;; eof
-+
-+(define sorted? sort:sorted?)
-+(define merge sort:merge)
-+(define merge! sort:merge!)
-+(define sort sort:sort)
-+(define sort! sort:sort!)
-diff -Nur binutils-2.24.orig/cgen/stamp-h.in binutils-2.24/cgen/stamp-h.in
---- binutils-2.24.orig/cgen/stamp-h.in 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/stamp-h.in 2016-06-30 21:26:12.677894046 +0200
-@@ -0,0 +1 @@
-+timestamp
-diff -Nur binutils-2.24.orig/cgen/testsuite.scm binutils-2.24/cgen/testsuite.scm
---- binutils-2.24.orig/cgen/testsuite.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/testsuite.scm 2016-06-30 21:26:12.677894046 +0200
-@@ -0,0 +1,64 @@
-+; CGEN testsuite driver.
-+; Copyright (C) 2009 Doug Evans
-+; This file is part of CGEN.
-+
-+; Global state variables.
-+
-+; Specify which application.
-+(set! APPLICATION 'TESTSUITE)
-+
-+; Initialize the options.
-+
-+(define (option-init!)
-+ ;;(set! CURRENT-COPYRIGHT copyright-fsf)
-+ ;;(set! CURRENT-PACKAGE package-cgen)
-+ *UNSPECIFIED*
-+)
-+
-+; Testsuite init,finish,analyzer support.
-+
-+; Initialize any testsuite specific things before loading the .cpu file.
-+
-+(define (testsuite-init!)
-+ (desc-init!)
-+ (mode-set-biggest-word-bitsizes!)
-+ *UNSPECIFIED*
-+)
-+
-+; Finish any testsuite specific things after loading the .cpu file.
-+; This is separate from analyze-data! as cpu-load performs some
-+; consistency checks in between.
-+
-+(define (testsuite-finish!)
-+ (desc-finish!)
-+ *UNSPECIFIED*
-+)
-+
-+; Compute various needed globals and assign any computed fields of
-+; the various objects. This is the standard routine that is called after
-+; a .cpu file is loaded.
-+
-+(define (testsuite-analyze!)
-+ (desc-analyze!)
-+
-+ ; Initialize the rtl->c translator.
-+ (rtl-c-config!)
-+
-+ ; Only include semantic operands when computing the format tables if we're
-+ ; generating operand instance tables.
-+ ; ??? Actually, may always be able to exclude the semantic operands.
-+ ; Still need to traverse the semantics to derive machine computed attributes.
-+;; (arch-analyze-insns! CURRENT-ARCH
-+;; #t ; include aliases?
-+;; #f ; build operand instance table?
-+;; )
-+
-+ *UNSPECIFIED*
-+)
-+
-+;;
-+
-+(define (cgen-test.h)
-+ (logit 1 "Generating testsuite.out ...\n")
-+ (string-write "CGEN Testsuite")
-+)
-diff -Nur binutils-2.24.orig/cgen/types.scm binutils-2.24/cgen/types.scm
---- binutils-2.24.orig/cgen/types.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/types.scm 2016-06-30 21:26:12.677894046 +0200
-@@ -0,0 +1,317 @@
-+; Type system.
-+; This provides the low level classes for describing data, except for
-+; the actual type (confusingly enough) which is described in mode.scm.
-+; Copyright (C) 2000, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; Array type.
-+; DIMENSIONS has a suitable initial value so (new <scalar>) to works.
-+
-+(define <array> (class-make '<array> nil '(mode (dimensions . ())) nil))
-+
-+; Return number of elements in array.
-+
-+(method-make!
-+ <array> 'get-num-elms
-+ (lambda (self)
-+ (apply * (elm-get self 'dimensions)))
-+)
-+
-+; Return mode of the array.
-+
-+(method-make! <array> 'get-mode (lambda (self) (elm-get self 'mode)))
-+
-+; Return the rank of the array (number of dimensions).
-+
-+(method-make! <array> 'get-rank (lambda (self) (length (elm-get self 'dimensions)))
-+)
-+
-+; Return shape of array
-+
-+(method-make! <array> 'get-shape (lambda (self) (elm-get self 'dimensions))
-+)
-+
-+; Return #t if X is an array.
-+
-+(define (array? x) (class-instance? <array> x))
-+
-+; Scalar type.
-+
-+(define <scalar> (class-make '<scalar> '(<array>) nil nil))
-+
-+(method-make-make! <scalar> '(mode))
-+
-+; Return #t if X is a scalar.
-+
-+(define (scalar? x) (and (array? x) (= (send x 'get-rank) 0)))
-+
-+; Return number of bits in an element of TYPE.
-+
-+(define (type-bits type)
-+ (mode:bits (send type 'get-mode))
-+)
-+
-+; Integers.
-+; These are like scalars but are specified in bits.
-+; BITS is the size in bits.
-+; ATTRS contains !UNSIGNED [or nothing] or UNSIGNED.
-+;
-+; A mode is needed so we know how big a field is needed to record the value.
-+; It might be more appropriate to use a host mode though.
-+;
-+; FIXME: Need to separate rank from type. scalar/array are not types.
-+;
-+;(define <integer> (class-make '<integer> nil '(attrs bits) nil))
-+;
-+;(method-make! <integer> 'get-atlist (lambda (self) (elm-get self 'attrs)))
-+;
-+;(method-make!
-+; <integer> 'get-mode
-+; (lambda (self)
-+; (mode-find (elm-get self 'bits)
-+; (if (has-attr? self 'UNSIGNED) 'UINT 'INT))
-+; )
-+;)
-+;
-+; FIXME: Quick hack. Revisit.
-+;
-+;(method-make! <integer> 'get-rank (lambda (self) 0))
-+
-+; Parse a type spec.
-+; TYPE-SPEC is: (mode [(dimensions ...)])
-+; or: ((mode bits) [(dimensions ...)])
-+
-+(define (parse-type context type-spec)
-+ ; Preliminary error checking.
-+ (let ((expected
-+ ", expected (mode [(dimensions)]) or ((mode bits) [(dimensions)])"))
-+ (if (not (list? type-spec))
-+ (parse-error context (string-append "invalid type spec" expected)
-+ type-spec))
-+ (let ((len (length type-spec)))
-+ (if (or (< len 1)
-+ (> len 2))
-+ (parse-error context (string-append "invalid type spec" expected)
-+ type-spec))
-+ ; Validate the mode spec.
-+ (cond ((symbol? (car type-spec))
-+ #t) ; ok
-+ ((list? (car type-spec))
-+ (begin
-+ (if (not (= (length (car type-spec)) 2))
-+ (parse-error context
-+ (string-append "invalid mode in type spec"
-+ expected)
-+ type-spec))
-+ (if (not (symbol? (caar type-spec)))
-+ (parse-error context
-+ (string-append "invalid mode in type spec"
-+ expected)
-+ type-spec))
-+ (if (not (integer? (cadar type-spec)))
-+ (parse-error context
-+ (string-append "invalid #bits in type spec"
-+ expected)
-+ type-spec))
-+ ))
-+ (else
-+ (parse-error context
-+ (string-append "invalid mode in type spec" expected)
-+ type-spec)))
-+ ; Validate the dimension list if present.
-+ (if (= len 2)
-+ (if (or (not (list? (cadr type-spec)))
-+ (not (all-true? (map non-negative-integer?
-+ (cadr type-spec)))))
-+ (parse-error context
-+ (string-append "invalid dimension spec in type spec"
-+ expected)
-+ type-spec)))
-+ ))
-+
-+ ; Pick out the arguments.
-+ (let ((mode (if (list? (car type-spec)) (caar type-spec) (car type-spec)))
-+ (bits (if (list? (car type-spec)) (cadar type-spec) #f))
-+ (dims (if (> (length type-spec) 1) (cadr type-spec) nil)))
-+
-+ ; Look up the mode and create the mode object.
-+ (let* ((base-mode (parse-mode-name context mode))
-+ (mode-obj
-+ (cond ((eq? mode 'INT)
-+ (mode-make-int bits))
-+ ((eq? mode 'UINT)
-+ (mode-make-uint bits))
-+ (else
-+ (if (and bits (!= bits (mode:bits base-mode)))
-+ (parse-error context "wrong number of bits for mode"
-+ bits))
-+ base-mode))))
-+
-+ ; All done, create the <array> object.
-+ ; ??? Special casing scalars is a concession for apps that think
-+ ; scalars aren't arrays. Not sure it should stay.
-+ (if (null? dims)
-+ (make <scalar> mode-obj)
-+ (make <array> mode-obj dims))))
-+)
-+
-+; Bit ranges.
-+; ??? Perhaps this should live in a different source file, but for now
-+; it's here.
-+;
-+; Endianness is not recorded with the bitrange.
-+; Values are operated on a "word" at a time.
-+; This is to handle bi-endian systems: we don't want two copies of
-+; every bitrange.
-+;
-+; Instruction word sizes are based on the "base insn length" which is the
-+; number of bytes the cpu first looks at to decode an insn. In cases where
-+; the total length is longer than the base insn length, the word length
-+; for the rest of the insn is the base insn length replicated as many times
-+; as necessary. The trailing part [last few bytes] of the insn may not fill
-+; the entire word, in which case the numbering is adjusted for it.
-+; ??? Might need to have an insn-base-length and an insn-word-length.
-+;
-+; Instructions that have words of one endianness and sub-words of a different
-+; endianness are handled at a higher level.
-+;
-+; Bit numbering examples:
-+; [each byte is represented MSB to LSB, low address to high address]
-+;
-+; lsb0? = #f
-+; insn-word-length = 2
-+; endian = little
-+; | 8 ... 15 | 0 ... 7 | 24 ... 31 | 16 ... 23 | 40 ... 47 | 32 ... 39 |
-+;
-+; lsb0? = #t
-+; insn-word-length = 2
-+; endian = little
-+; [note that this is the little endian canonical form (*)
-+; - word length is irrelevant]
-+; | 7 ... 0 | 15 ... 8 | 23 ... 16 | 31 ... 24 | 39 ... 32 | 47 ... 40 |
-+;
-+; lsb0? = #f
-+; insn-word-length = 2
-+; endian = big
-+; [note that this is the big endian canonical form (*)
-+; - word length is irrelevant]
-+; | 0 ... 7 | 8 ... 15 | 16 ... 23 | 24 ... 31 | 32 ... 39 | 40 ... 47 |
-+;
-+; lsb0? = #t
-+; insn-word-length = 2
-+; endian = big
-+; | 15 ... 8 | 7 ... 0 | 31 ... 24 | 23 ... 16 | 47 ... 40 | 39 ... 32 |
-+;
-+; (*) NOTE: This canonical form should not be confused with what might be
-+; called the canonical form when writing .cpu ifield descriptions: lsb0? = #f.
-+; The ifield canonical form is lsb0? = #f because the starting bit number of
-+; ifields is defined to be the MSB.
-+; ---
-+; At the bitrange level, insns with different sized words is supported.
-+; This is because each <bitrange> contains the specs of the word it resides in.
-+; For example a 48 bit insn with a 16 bit opcode and a 32 bit immediate value
-+; might [but not necessarily] consist of one 16 bit "word" and one 32 bit
-+; "word".
-+;
-+; Examples:
-+;
-+; lsb0? = #f
-+; insn-word-length = 2, 4
-+; endian = little
-+; | 8 ... 15 | 0 ... 7 | 40 ... 47 | 32 ... 39 | 24 ... 31 | 16 ... 23 |
-+;
-+; lsb0? = #t
-+; insn-word-length = 2, 4
-+; endian = little
-+; | 7 ... 0 | 15 ... 8 | 23 ... 16 | 31 ... 24 | 39 ... 32 | 47 ... 40 |
-+;
-+; lsb0? = #f
-+; insn-word-length = 2, 4
-+; endian = big
-+; | 0 ... 7 | 8 ... 15 | 16 ... 23 | 24 ... 31 | 32 ... 39 | 40 ... 47 |
-+;
-+; lsb0? = #t
-+; insn-word-length = 2, 4
-+; endian = big
-+; | 15 ... 8 | 7 ... 0 | 47 ... 40 | 39 ... 32 | 31 ... 24 | 23 ... 16 |
-+
-+(define <bitrange>
-+ (class-make '<bitrange>
-+ nil
-+ '(
-+ ; offset in bits from the start of the insn of the word
-+ ; in which the value resides [must be divisible by 8]
-+ ; [this allows the bitrange to be independent of the lengths
-+ ; of words preceding this one]
-+ word-offset
-+ ; starting bit number within the word,
-+ ; this is the MSB of the bitrange within the word
-+ ; [externally, = word-offset + start]
-+ start
-+ ; number of bits in the value
-+ length
-+ ; length of word in which the value resides
-+ word-length
-+ ; lsb = bit number 0?
-+ lsb0?
-+ )
-+ nil)
-+)
-+
-+; Accessor fns.
-+
-+(define-getters <bitrange> bitrange
-+ (word-offset start length word-length lsb0?)
-+)
-+
-+(define-setters <bitrange> bitrange
-+ ; lsb0? left out on purpose: not sure changing it should be allowed
-+ (word-offset start length word-length)
-+)
-+
-+; Return a boolean indicating if two bitranges overlap.
-+;
-+; lsb0? = #t: 31 ... 0
-+; lsb0? = #f: 0 ... 31
-+
-+(define (bitrange-overlap? start1 length1 start2 length2 lsb0?)
-+ (if lsb0?
-+ (let ((end1 (- start1 length1))
-+ (end2 (- start2 length2)))
-+ (and (< end1 start2)
-+ (> start1 end2)))
-+ (let ((end1 (+ start1 length1))
-+ (end2 (+ start2 length2)))
-+ (and (> end1 start2)
-+ (< start1 end2))))
-+)
-+
-+; Return a boolean indicating if BITPOS is beyond bitrange START,LEN.
-+; ??? This needs more thought.
-+
-+(define (bitpos-beyond? bitpos start length word-length lsb0?)
-+ (>= bitpos (+ start length))
-+)
-+
-+; Return the offset of the word after <bitrange> br.
-+
-+(define (bitrange-next-word br)
-+ (let ((word-offset (bitrange-word-offset br))
-+ (start (bitrange-start br))
-+ (length (bitrange-length br))
-+ (word-length (bitrange-word-length br))
-+ (lsb0? (bitrange-lsb0? br)))
-+ ; ??? revisit
-+ (+ word-offset word-length))
-+)
-+
-+; Initialize/finalize support.
-+
-+(define (types-init!)
-+ *UNSPECIFIED*
-+)
-+
-+(define (types-finish!)
-+ *UNSPECIFIED*
-+)
-diff -Nur binutils-2.24.orig/cgen/utils-cgen.scm binutils-2.24/cgen/utils-cgen.scm
---- binutils-2.24.orig/cgen/utils-cgen.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/utils-cgen.scm 2016-06-30 21:26:12.677894046 +0200
-@@ -0,0 +1,975 @@
-+;; CGEN Utilities.
-+;; Copyright (C) 2000, 2002, 2003, 2009, 2010 Red Hat, Inc.
-+;; This file is part of CGEN.
-+;; See file COPYING.CGEN for details.
-+;;
-+;; This file contains utilities specific to cgen.
-+;; Generic utilities should go in utils.scm.
-+
-+;; True if text of sanitize markers are to be emitted.
-+;; This is a debugging tool only, though it could have use in sanitized trees.
-+(define include-sanitize-marker? #t)
-+
-+;; Utility to display command line invocation for debugging purposes.
-+
-+(define (display-argv argv)
-+ (let ((cep (current-error-port)))
-+ (display "cgen -s " cep)
-+ (for-each (lambda (arg)
-+ ;; Output double-quotes if string has a space for better
-+ ;; correspondence to how to specify string to shell.
-+ (if (string-index arg #\space)
-+ (write arg cep)
-+ (display arg cep))
-+ (display " " cep))
-+ argv)
-+ (newline cep))
-+)
-+
-+;; Source locations are recorded as a stack, with (ideally) one extra level
-+;; for each macro invocation.
-+
-+(define-class <location> location- ()
-+ (
-+ ;; A list of "single-location" objects,
-+ ;; sorted by most recent location first.
-+ !list
-+ )
-+)
-+
-+;; A single source location.
-+;; This is recorded as a vector for simplicity.
-+;; END? is true if the location marks the end of the expression.
-+;; NOTE: LINE and COLUMN are origin-0 (the first line is line 0).
-+
-+(define (make-single-location file line column end?)
-+ (vector file line column end?)
-+)
-+
-+(define (single-location-file sloc) (vector-ref sloc 0))
-+(define (single-location-line sloc) (vector-ref sloc 1))
-+(define (single-location-column sloc) (vector-ref sloc 2))
-+(define (single-location-end? sloc) (vector-ref sloc 3))
-+
-+;; Return a single-location in a readable form.
-+
-+(define (single-location->string sloc)
-+ ;; +1: numbers are recorded origin-0
-+ (string-append (single-location-file sloc)
-+ ":"
-+ (number->string (+ (single-location-line sloc) 1))
-+ ":"
-+ (number->string (+ (single-location-column sloc) 1))
-+ (if (single-location-end? sloc) "(end)" ""))
-+)
-+
-+;; Same as single-location->string, except omit any directory info in
-+;; the file name.
-+
-+(define (single-location->simple-string sloc)
-+ ;; +1: numbers are recorded origin-0
-+ (string-append (basename (single-location-file sloc))
-+ ":"
-+ (number->string (+ (single-location-line sloc) 1))
-+ ":"
-+ (number->string (+ (single-location-column sloc) 1))
-+ (if (single-location-end? sloc) "(end)" ""))
-+)
-+
-+;; Return a location in a readable form.
-+
-+(define (location->string loc)
-+ (let ((ref-from " referenced from:"))
-+ (string-drop
-+ (- 0 (string-length ref-from) 1)
-+ (string-drop1
-+ (apply string-append
-+ (map (lambda (sloc)
-+ (string-append "\n"
-+ (single-location->string sloc)
-+ ":"
-+ ref-from))
-+ (location-list loc))))))
-+)
-+
-+;; Return the location information in Guile's source-properties
-+;; in a readable form.
-+
-+(define (source-properties-location->string src-props)
-+ (let ((file (assq-ref src-props 'filename))
-+ (line (assq-ref src-props 'line))
-+ (column (assq-ref src-props 'column)))
-+ (string-append file
-+ ":"
-+ (number->string (+ line 1))
-+ ":"
-+ (number->string (+ column 1))))
-+)
-+
-+;; Return the top location on LOC's stack.
-+
-+(define (location-top loc)
-+ (car (location-list loc))
-+)
-+
-+;; Return a new <location> with FILE, LINE pushed onto the stack.
-+
-+(define (location-push-single loc file line column end?)
-+ (make <location> (cons (make-single-location file line column end?)
-+ (location-list loc)))
-+)
-+
-+;; Return a new <location> with NEW-LOC preappended to LOC.
-+
-+(define (location-push loc new-loc)
-+ (make <location> (append (location-list new-loc)
-+ (location-list loc)))
-+)
-+
-+;; Return an unspecified <location>.
-+;; This is mainly for use in debugging utilities.
-+;; Ideally for .cpu-file related stuff we always have a location,
-+;; but that's not always true.
-+
-+(define (unspecified-location)
-+ (make <location> (list (make-single-location "unspecified" 0 0 #f)))
-+)
-+
-+;; Return a location denoting a builtin object.
-+
-+(define (builtin-location)
-+ (make <location> (list (make-single-location "builtin" 0 0 #f)))
-+)
-+
-+;; Return a <location> object for the current input port.
-+;; END? is true if the location marks the end of the expression.
-+
-+(define (current-input-location end?)
-+ (let ((cip (current-input-port)))
-+ (make <location> (list (make-single-location (port-filename cip)
-+ (port-line cip)
-+ (port-column cip)
-+ end?))))
-+)
-+
-+;; An object property for tracking source locations during macro expansion.
-+
-+(define location-property (make-object-property))
-+
-+;; Set FORM's location to LOC.
-+
-+(define (location-property-set! form loc)
-+ (set! (location-property form) loc)
-+ *UNSPECIFIED*
-+)
-+
-+;; Each named entry in the description file typically has these three members:
-+;; name, comment attrs.
-+
-+(define-class <ident> ident- () (!name !comment !attrs))
-+
-+;; All objects defined in the .cpu file have name, comment, attrs elements.
-+;; Where in the class hierarchy they're recorded depends on the object.
-+;; Each object is required to provide these interfaces.
-+
-+(define-interface obj-name get-name)
-+(define-interface obj-comment get-comment)
-+;; FIXME: See definition of obj-atlist.
-+(define-interface obj-atlist1 get-atlist)
-+
-+(define-interface obj-set-name! set-name! newval)
-+(define-interface obj-set-comment! set-comment! newval)
-+(define-interface obj-set-atlist! set-atlist! newval)
-+
-+;; Get/set attributes of OBJ.
-+;; OBJ is any object which supports the get-atlist interface.
-+
-+(define (obj-atlist obj)
-+ (let ((result (obj-atlist1 obj)))
-+ ;; As a speed up, we allow objects to specify an empty attribute list
-+ ;; with #f or (), rather than creating an attr-list object.
-+ ;; ??? There is atlist-empty now which should be used directly, after
-+ ;; which we can delete use and rename obj-atlist1 -> obj-atlist.
-+ (if (or (null? result) (not result))
-+ atlist-empty
-+ result))
-+)
-+
-+(define-method <ident> get-name (self)
-+ (ident-name self))
-+(define-method <ident> get-comment (self)
-+ (ident-comment self))
-+(define-method <ident> get-atlist (self)
-+ (ident-attrs self))
-+
-+(define-method <ident> set-name! (self newval)
-+ (ident-set-name! self newval))
-+(define-method <ident> set-comment! (self newval)
-+ (ident-set-comment! self newval))
-+(define-method <ident> set-atlist! (self newval)
-+ (ident-set-attrs! self newval))
-+
-+;; FIXME: Delete and replace with the above interfaces.
-+(define (obj:name obj) (obj-name obj))
-+(define (obj:comment obj) (obj-comment obj))
-+
-+;; Utility to return the name as a string.
-+
-+(define (obj:str-name obj) (symbol->string (obj:name obj)))
-+
-+;; Given a list of named objects, return a string of comma-separated names.
-+
-+(define (obj-csv-names obj-list)
-+ (string-drop1
-+ (string-map (lambda (o)
-+ (string-append ","
-+ (obj:str-name o)))
-+ obj-list))
-+)
-+
-+;; Subclass of <ident> for use by description file objects.
-+;;
-+;; Records the source location of the object.
-+;;
-+;; We also record an internally generated entry, ordinal, to record the
-+;; relative position within the description file. It's generally more efficient
-+;; to record some kinds of objects (e.g. insns) in a hash table. But we also
-+;; want to emit these objects in file order. Recording the object's relative
-+;; position lets us generate an ordered list when we need to.
-+;; We can't just use the line number because we want an ordering over multiple
-+;; input files.
-+
-+(define-class <source-ident> source-ident- (<ident>)
-+ (
-+ ;; A <location> object.
-+ (/!location . #f)
-+ ;; #f for ordinal means "unassigned"
-+ (/!ordinal . #f)
-+ )
-+)
-+
-+(define-interface obj-location get-location)
-+(define-interface obj-set-location! set-location! newval)
-+
-+(define-method <source-ident> get-location (self)
-+ (/source-ident-location self))
-+(define-method <source-ident> set-location! (self newval)
-+ (/source-ident-set-location! self newval))
-+
-+(define-interface obj-ordinal get-ordinal)
-+(define-interface obj-set-ordinal! set-ordinal! newval)
-+
-+(define-method <source-ident> get-ordinal (self)
-+ (/source-ident-ordinal self))
-+(define-method <source-ident> set-ordinal! (self newval)
-+ (/source-ident-set-ordinal! self newval))
-+
-+;; Parsing utilities
-+
-+;; A parsing/processing context, used to give better error messages.
-+;; LOCATION must be an object created with make-location.
-+
-+(define-class <context> context- ()
-+ (
-+ ;; Location of the object being processed,
-+ ;; or #f if unknown (or there is none).
-+ (location . #f)
-+ ;; Error message prefix or #f if there is none.
-+ (prefix . #f)
-+ )
-+)
-+
-+;; Create a <context> object that is just a prefix.
-+
-+(define (make-prefix-context prefix)
-+ (make <context> #f prefix)
-+)
-+
-+;; Create a <context> object that (current-reader-location) with PREFIX.
-+
-+(define (make-current-context prefix)
-+ (make <context> (current-reader-location) prefix)
-+)
-+
-+;; Create a <context> object from <source-ident> object OBJ.
-+
-+(define (make-obj-context obj prefix)
-+ (make <context> (obj-location obj) prefix)
-+)
-+
-+;; Create a new context from CONTEXT with TEXT appended to the prefix.
-+
-+(define (context-append context text)
-+ (make <context> (context-location context)
-+ (string-append (context-prefix context) text))
-+)
-+
-+;; Create a new context from CONTEXT with NAME appended to the prefix.
-+
-+(define (context-append-name context name)
-+ (context-append context (stringsym-append ":" name))
-+)
-+
-+;; Call this to issue an error message when all you have is a context.
-+;; CONTEXT is a <context> object or #f if there is none.
-+;; INTRO is a general introduction to what cgen was doing.
-+;; ERRMSG is, yes, you guessed it, the error message.
-+;; EXPR is the value that had the error if there is one.
-+
-+(define (context-error context intro errmsg . expr)
-+ (apply context-owner-error
-+ (cons context
-+ (cons #f
-+ (cons intro
-+ (cons errmsg expr)))))
-+)
-+
-+;; Call this to issue an error message when you have a context and an
-+;; <ident> or <source-ident> object (we call the "owner").
-+;; CONTEXT is a <context> object or #f if there is none.
-+;; OWNER is an <ident> or <source-ident> object or #f if there is none.
-+;; INTRO is a general introduction to what cgen was doing.
-+;; If OWNER is non-#f, the text " of <object-name>" is appended.
-+;; ERRMSG is, yes, you guessed it, the error message.
-+;; EXPR is the value that had the error if there is one.
-+
-+(define (context-owner-error context owner intro errmsg . expr)
-+ ;; If we don't have a context, look at the owner to try to find one.
-+ ;; We want to include the source location in the error if we can.
-+ (if (and (not context)
-+ owner
-+ (source-ident? owner))
-+ (set! context (make-obj-context owner #f)))
-+ (if (not context)
-+ (set! context (make-prefix-context #f)))
-+
-+ (let* ((loc (context-location context))
-+ (top-sloc (and loc (location-top loc)))
-+ (intro (string-append intro
-+ (if owner
-+ (string-append " of "
-+ (obj:str-name owner))
-+ "")))
-+ (prefix (or (context-prefix context) "Error"))
-+ (text (string-append prefix ": " errmsg)))
-+
-+ (if loc
-+
-+ (apply error
-+ (cons
-+ (simple-format
-+ #f
-+ "\n~A:\n@ ~A:\n\n~A: ~A:"
-+ intro
-+ (location->string loc)
-+ (single-location->simple-string top-sloc)
-+ text)
-+ expr))
-+
-+ (apply error
-+ (cons
-+ (simple-format
-+ #f
-+ "\n~A:\n~A:"
-+ intro
-+ text)
-+ expr))))
-+)
-+
-+;; Parse an object name.
-+;; NAME is either a symbol or a list of symbols which are concatenated
-+;; together. Each element can in turn be a list of symbols, and so on.
-+;; This supports symbol concatenation in the description file without having
-+;; to using string-append or some such.
-+
-+(define (parse-name context name)
-+ (string->symbol
-+ (let parse ((name name))
-+ (cond
-+ ((symbol? name) (symbol->string name))
-+ ((string? name) name)
-+ ((number? name) (number->string name))
-+ ((list? name) (string-map parse name))
-+ (else (parse-error context "improper name" name)))))
-+)
-+
-+;; Parse an object comment.
-+;; COMMENT is either a string or a list of strings, each element of which may
-+;; in turn be a list of strings.
-+
-+(define (parse-comment context comment)
-+ (cond ((string? comment) comment)
-+ ((symbol? comment) (symbol->string comment))
-+ ((number? comment) (number->string comment))
-+ ((list? comment)
-+ (string-map (lambda (elm) (parse-comment context elm)) comment))
-+ (else (parse-error context "improper comment" comment)))
-+)
-+
-+;; Parse a symbol.
-+
-+(define (parse-symbol context value)
-+ (if (and (not (symbol? value)) (not (string? value)))
-+ (parse-error context "not a symbol or string" value))
-+ (->symbol value)
-+)
-+
-+;; Parse a string.
-+
-+(define (parse-string context value)
-+ (if (and (not (symbol? value)) (not (string? value)))
-+ (parse-error context "not a string or symbol" value))
-+ (->string value)
-+)
-+
-+;; Parse a number.
-+;; VALID-VALUES is a list of numbers and (min . max) pairs.
-+
-+(define (parse-number context value . valid-values)
-+ (if (not (number? value))
-+ (parse-error context "not a number" value))
-+ (if (any-true? (map (lambda (test)
-+ (if (pair? test)
-+ (and (>= value (car test))
-+ (<= value (cdr test)))
-+ (= value test)))
-+ valid-values))
-+ value
-+ (parse-error context "invalid number" value valid-values))
-+)
-+
-+;; Parse a boolean value
-+
-+(define (parse-boolean context value)
-+ (if (boolean? value)
-+ value
-+ (parse-error context "not a boolean (#f/#t)" value))
-+)
-+
-+;; Parse a list of handlers.
-+;; Each entry is (symbol "string").
-+;; These map function to a handler for it.
-+;; The meaning is up to the application but generally the handler is a
-+;; C/C++ function name.
-+;; ALLOWED is a list valid values for the symbol or #f if anything is allowed.
-+;; The result is handlers unchanged.
-+
-+(define (parse-handlers context allowed handlers)
-+ (if (not (list? handlers))
-+ (parse-error context "bad handler spec" handlers))
-+ (for-each (lambda (arg)
-+ (if (not (list-elements-ok? arg (list symbol? string?)))
-+ (parse-error context "bad handler spec" arg))
-+ (if (and allowed (not (memq (car arg) allowed)))
-+ (parse-error context "unknown handler type" (car arg))))
-+ handlers)
-+ handlers
-+)
-+
-+;; Return a boolean indicating if X is a keyword.
-+;; This also handles symbols named :foo because Guile doesn't stablely support
-+;; :keywords (how does one enable :keywords? read-options doesn't appear to
-+;; work).
-+
-+(define (keyword-list? x)
-+ (and (list? x)
-+ (not (null? x))
-+ (or (keyword? (car x))
-+ (and (symbol? (car x))
-+ (char=? (string-ref (symbol->string (car x)) 0) #\:))))
-+)
-+
-+;; Convert a list like (#:key1 val1 #:key2 val2 ...) to
-+;; ((#:key1 val1) (#:key2 val2) ...).
-+;; Missing values are specified with an empty list.
-+;; This also supports (:sym1 val1 ...) because Guile doesn't stablely support
-+;; :keywords (#:keywords work, but #:foo shouldn't appear in the description
-+;; language).
-+
-+(define (keyword-list->arg-list kl)
-+ ;; Scan KL backwards, building up each element as we go.
-+ (let loop ((result nil) (current nil) (rkl (reverse kl)))
-+ (cond ((null? rkl)
-+ result)
-+ ((keyword? (car rkl))
-+ (loop (acons (keyword->symbol (car rkl)) current result)
-+ nil
-+ (cdr rkl)))
-+ ((and (symbol? (car rkl))
-+ (char=? (string-ref (symbol->string (car rkl)) 0) #\:))
-+ (loop (acons (string->symbol
-+ (substring (car rkl) 1 (string-length (car rkl))))
-+ current result)
-+ nil
-+ (cdr rkl)))
-+ (else
-+ (loop result
-+ (cons (car rkl) current)
-+ (cdr rkl)))))
-+)
-+
-+;; Signal an error if the argument name is not a symbol.
-+;; This is done by each of the argument validation routines so the caller
-+;; doesn't need to make two calls.
-+
-+(define (arg-list-validate-name context arg-spec)
-+ (if (null? arg-spec)
-+ (parse-error context "empty argument spec" arg-spec))
-+ (if (not (symbol? (car arg-spec)))
-+ (parse-error context "argument name not a symbol" arg-spec))
-+ *UNSPECIFIED*
-+)
-+
-+;; Signal a parse error if an argument was specified with a value.
-+;; ARG-SPEC is (name value).
-+
-+(define (arg-list-check-no-args context arg-spec)
-+ (arg-list-validate-name context arg-spec)
-+ (if (not (null? (cdr arg-spec)))
-+ (parse-error context (string-append (car arg-spec)
-+ " takes zero arguments")))
-+ *UNSPECIFIED*
-+)
-+
-+;; Validate and return a symbol argument.
-+;; ARG-SPEC is (name value).
-+
-+(define (arg-list-symbol-arg context arg-spec)
-+ (arg-list-validate-name context arg-spec)
-+ (if (or (!= (length (cdr arg-spec)) 1)
-+ (not (symbol? (cadr arg-spec))))
-+ (parse-error context (string-append (car arg-spec)
-+ ": argument not a symbol")))
-+ (cadr arg-spec)
-+)
-+
-+;; Sanitization
-+
-+;; Sanitization is handled via attributes. Anything that must be sanitized
-+;; has a `sanitize' attribute with the value being the keyword to sanitize on.
-+;; Ideally most, if not all, of the guts of the generated sanitization is here.
-+
-+;; Utility to simplify expression in .cpu file.
-+;; Usage: (sanitize isa-name-list keyword entry-type entry-name1 [entry-name2 ...])
-+;; Enum attribute `(sanitize keyword)' is added to the entry.
-+
-+(define (sanitize isa-name-list keyword entry-type . entry-names)
-+ (for-each (lambda (entry-name)
-+ (let ((entry #f))
-+ (case entry-type
-+ ((attr) (set! entry (current-attr-lookup entry-name)))
-+ ((enum) (set! entry (current-enum-lookup entry-name)))
-+ ((isa) (set! entry (current-isa-lookup entry-name)))
-+ ((cpu) (set! entry (current-cpu-lookup entry-name)))
-+ ((mach) (set! entry (current-mach-lookup entry-name)))
-+ ((model) (set! entry (current-model-lookup entry-name)))
-+ ((ifield) (set! entry (current-ifld-lookup entry-name isa-name-list)))
-+ ((hardware) (set! entry (current-hw-lookup entry-name)))
-+ ((operand) (set! entry (current-op-lookup entry-name isa-name-list)))
-+ ((insn) (set! entry (current-insn-lookup entry-name isa-name-list)))
-+ ((macro-insn) (set! entry (current-minsn-lookup entry-name isa-name-list)))
-+ (else (parse-error (make-prefix-context "sanitize")
-+ "unknown entry type" entry-type)))
-+
-+ ;; ENTRY is #f in the case where the element was discarded
-+ ;; because its mach wasn't selected. But in the case where
-+ ;; we're keeping everything, ensure ENTRY is not #f to
-+ ;; catch spelling errors.
-+
-+ (if entry
-+
-+ (begin
-+ (obj-cons-attr! entry (enum-attr-make 'sanitize keyword))
-+ ;; Propagate the sanitize attribute to class members
-+ ;; as necessary.
-+ (case entry-type
-+ ((hardware)
-+ (if (hw-indices entry)
-+ (obj-cons-attr! (hw-indices entry)
-+ (enum-attr-make 'sanitize
-+ keyword)))
-+ (if (hw-values entry)
-+ (obj-cons-attr! (hw-values entry)
-+ (enum-attr-make 'sanitize
-+ keyword))))
-+ ))
-+
-+ (if (and (eq? APPLICATION 'OPCODES) (keep-all?))
-+ (parse-error (make-prefix-context "sanitize")
-+ (string-append "unknown " entry-type)
-+ entry-name)))))
-+ entry-names)
-+
-+ #f ;; caller eval's our result, so return a no-op
-+)
-+
-+;; Return TEXT sanitized with KEYWORD.
-+;; TEXT must exist on a line (or lines) by itself.
-+;; i.e. it is assumed that it begins at column 1 and ends with a newline.
-+;; If KEYWORD is #f, no sanitization is generated.
-+
-+(define (gen-sanitize keyword text)
-+ (cond ((null? text) "")
-+ ((pair? text) ;; pair? -> cheap list?
-+ (if (and keyword include-sanitize-marker?)
-+ (string-list
-+ ;; split string to avoid removal
-+ "/* start-"
-+ "sanitize-" keyword " */\n"
-+ text
-+ "/* end-"
-+ "sanitize-" keyword " */\n")
-+ text))
-+ (else
-+ (if (= (string-length text) 0)
-+ ""
-+ (if (and keyword include-sanitize-marker?)
-+ (string-append
-+ ;; split string to avoid removal
-+ "/* start-"
-+ "sanitize-" keyword " */\n"
-+ text
-+ "/* end-"
-+ "sanitize-" keyword " */\n")
-+ text))))
-+)
-+
-+;; Return TEXT sanitized with OBJ's sanitization, if it has any.
-+;; OBJ may be #f.
-+
-+(define (gen-obj-sanitize obj text)
-+ (if obj
-+ (let ((san (obj-attr-value obj 'sanitize)))
-+ (gen-sanitize (if (or (not san) (eq? san 'none)) #f san)
-+ text))
-+ (gen-sanitize #f text))
-+)
-+
-+;; Cover procs to handle generation of object declarations and definitions.
-+;; All object output should be routed through gen-decl and gen-defn.
-+
-+;; Send the gen-decl message to OBJ, and sanitize the output if necessary.
-+
-+(define (gen-decl obj)
-+ (logit 3 "Generating decl for "
-+ (cond ((method-present? obj 'get-name) (send obj 'get-name))
-+ ((elm-present? obj 'name) (elm-get obj 'name))
-+ (else "unknown"))
-+ " ...\n")
-+ (cond ((and (method-present? obj 'gen-decl) (not (has-attr? obj 'META)))
-+ (gen-obj-sanitize obj (send obj 'gen-decl)))
-+ (else ""))
-+)
-+
-+;; Send the gen-defn message to OBJ, and sanitize the output if necessary.
-+
-+(define (gen-defn obj)
-+ (logit 3 "Generating defn for "
-+ (cond ((method-present? obj 'get-name) (send obj 'get-name))
-+ ((elm-present? obj 'name) (elm-xget obj 'name))
-+ (else "unknown"))
-+ " ...\n")
-+ (cond ((and (method-present? obj 'gen-defn) (not (has-attr? obj 'META)))
-+ (gen-obj-sanitize obj (send obj 'gen-defn)))
-+ (else ""))
-+)
-+
-+;; Attributes
-+
-+;; Return the C/C++ type to use to hold a value for attribute ATTR.
-+
-+(define (gen-attr-type attr)
-+ (if (string=? (string-downcase (gen-sym attr)) "isa")
-+ "CGEN_BITSET"
-+ (case (attr-kind attr)
-+ ((boolean) "int")
-+ ((bitset) "unsigned int")
-+ ((integer) "int")
-+ ((enum) (string-append "enum " (string-downcase (gen-sym attr)) "_attr"))
-+ ))
-+)
-+
-+;; Return C macros for accessing an object's attributes ATTRS.
-+;; PREFIX is one of "cgen_ifld", "cgen_hw", "cgen_operand", "cgen_insn".
-+;; ATTRS is an alist of attribute values. The value is unimportant except that
-+;; it is used to determine bool/non-bool.
-+;; Non-bools need to be separated from bools as they're each recorded
-+;; differently. Non-bools are recorded in an int for each. All bools are
-+;; combined into one int to save space.
-+;; ??? We assume there is at least one bool.
-+
-+(define (gen-attr-accessors prefix attrs)
-+ (string-append
-+ "/* " prefix " attribute accessor macros. */\n"
-+ (string-map (lambda (attr)
-+ (string-append
-+ "#define CGEN_ATTR_"
-+ (string-upcase prefix)
-+ "_"
-+ (string-upcase (gen-sym attr))
-+ "_VALUE(attrs) "
-+ (if (bool-attr? attr)
-+ (string-append
-+ "(((attrs)->bool_ & (1 << "
-+ (string-upcase prefix)
-+ "_"
-+ (string-upcase (gen-sym attr))
-+ ")) != 0)")
-+ (string-append
-+ "((attrs)->nonbool["
-+ (string-upcase prefix)
-+ "_"
-+ (string-upcase (gen-sym attr))
-+ "-"
-+ (string-upcase prefix)
-+ "_START_NBOOLS-1]."
-+ (case (attr-kind attr)
-+ ((bitset)
-+ (if (string=? (string-downcase (gen-sym attr)) "isa")
-+ ""
-+ "non"))
-+ (else "non"))
-+ "bitset)"))
-+ "\n"))
-+ attrs)
-+ "\n")
-+)
-+
-+;; Return C code to declare an enum of attributes ATTRS.
-+;; PREFIX is one of "cgen_ifld", "cgen_hw", "cgen_operand", "cgen_insn".
-+;; ATTRS is an alist of attribute values. The value is unimportant except that
-+;; it is used to determine bool/non-bool.
-+;; Non-bools need to be separated from bools as they're each recorded
-+;; differently. Non-bools are recorded in an int for each. All bools are
-+;; combined into one int to save space.
-+;; ??? We assume there is at least one bool.
-+
-+(define (gen-attr-enum-decl prefix attrs)
-+ (string-append
-+ (gen-enum-decl (string-append prefix "_attr")
-+ (string-append prefix " attrs")
-+ (string-append prefix "_")
-+ (attr-list-enum-list attrs))
-+ "/* Number of non-boolean elements in " prefix "_attr. */\n"
-+ "#define " (string-upcase prefix) "_NBOOL_ATTRS "
-+ "(" (string-upcase prefix) "_END_NBOOLS - "
-+ (string-upcase prefix) "_START_NBOOLS - 1)\n"
-+ "\n")
-+)
-+
-+;; Return name of symbol ATTR-NAME.
-+;; PREFIX is the prefix arg to gen-attr-enum-decl.
-+
-+(define (gen-attr-name prefix attr-name)
-+ (string-upcase (gen-c-symbol (string-append prefix "_"
-+ (symbol->string attr-name))))
-+)
-+
-+;; Normal gen-mask argument to gen-bool-attrs.
-+;; Returns "(1<< PREFIX_NAME)" where PREFIX is from atlist-prefix and
-+;; NAME is the name of the attribute.
-+;; ??? This used to return PREFIX_NAME-CGEN_ATTR_BOOL_OFFSET.
-+;; The tradeoff is simplicity vs perceived maximum number of boolean attributes
-+;; needed. In the end the maximum number needn't be fixed, and the simplicity
-+;; of the current way is good.
-+
-+(define (gen-attr-mask prefix name)
-+ (string-append "(1<<" (gen-attr-name prefix name) ")")
-+)
-+
-+;; Return C expression of bitmasks of boolean attributes in ATTRS.
-+;; ATTRS is an <attr-list> object, it need not be pre-sorted.
-+;; GEN-MASK is a procedure that returns the C code of the mask.
-+
-+(define (gen-bool-attrs attrs gen-mask)
-+ (let loop ((result "0")
-+ (alist (attr-remove-meta-attrs-alist
-+ (attr-nub (atlist-attrs attrs)))))
-+ (cond ((null? alist) result)
-+ ((and (boolean? (cdar alist)) (cdar alist))
-+ (loop (string-append result
-+ ;; `|' is used here instead of `+' so we don't
-+ ;; have to care about duplicates.
-+ "|" (gen-mask (atlist-prefix attrs)
-+ (caar alist)))
-+ (cdr alist)))
-+ (else (loop result (cdr alist)))))
-+)
-+
-+;; Return the C definition of OBJ's attributes.
-+;; TYPE is one of 'ifld, 'hw, 'operand, 'insn.
-+;; [Other objects have attributes but these are the only ones we currently
-+;; emit definitions for.]
-+;; OBJ is any object that supports the 'get-atlist message.
-+;; ALL-ATTRS is an ordered alist of all attributes.
-+;; "ordered" means all the non-boolean attributes are at the front and
-+;; duplicate entries have been removed.
-+;; GEN-MASK is the gen-mask arg to gen-bool-attrs.
-+
-+(define (gen-obj-attr-defn type obj all-attrs num-non-bools gen-mask)
-+ (let* ((attrs (obj-atlist obj))
-+ (non-bools (attr-non-bool-attrs (atlist-attrs attrs)))
-+ (all-non-bools (list-take num-non-bools all-attrs)))
-+ (string-append
-+ "{ "
-+ (gen-bool-attrs attrs gen-mask)
-+ ", {"
-+ ;; For the boolean case, we can (currently) get away with only specifying
-+ ;; the attributes that are used since they all fit in one int and the
-+ ;; default is currently always #f (and won't be changed without good
-+ ;; reason). In the non-boolean case order is important since each value
-+ ;; has a specific spot in an array, all of them must be specified.
-+ (if (null? all-non-bools)
-+ " 0"
-+ (string-drop1 ;; drop the leading ","
-+ (string-map (lambda (attr)
-+ (let ((val (or (assq-ref non-bools (obj:name attr))
-+ (attr-default attr))))
-+ ;; FIXME: Are we missing attr-prefix here?
-+ (string-append ", "
-+ (send attr 'gen-value-for-defn val))))
-+ all-non-bools)))
-+ " } }"
-+ ))
-+)
-+
-+;; Return the C definition of the terminating entry of an object's attributes.
-+;; ALL-ATTRS is an ordered alist of all attributes.
-+;; "ordered" means all the non-boolean attributes are at the front and
-+;; duplicate entries have been removed.
-+
-+(define (gen-obj-attr-end-defn all-attrs num-non-bools)
-+ (let ((all-non-bools (list-take num-non-bools all-attrs)))
-+ (string-append
-+ "{ 0, {"
-+ (if (null? all-non-bools)
-+ " { 0, 0 }"
-+ (string-drop1 ;; drop the leading ","
-+ (string-map (lambda (attr)
-+ (let ((val (attr-default attr)))
-+ ;; FIXME: Are we missing attr-prefix here?
-+ (string-append ", "
-+ (send attr 'gen-value-for-defn val))))
-+ all-non-bools)))
-+ " } }"
-+ ))
-+)
-+
-+;; Return a boolean indicating if ATLIST indicates a CTI insn.
-+
-+(define (atlist-cti? atlist)
-+ (or (atlist-has-attr? atlist 'UNCOND-CTI)
-+ (atlist-has-attr? atlist 'COND-CTI))
-+)
-+
-+;; Misc. gen-* procs
-+
-+;; Return name of obj as a C symbol.
-+
-+(define (gen-sym obj) (gen-c-symbol (obj:name obj)))
-+
-+;; Return the name of the selected cpu family.
-+;; An error is signalled if more than one has been selected.
-+
-+(define (gen-cpu-name)
-+ ;; FIXME: error checking
-+ (gen-sym (current-cpu))
-+)
-+
-+;; Return HAVE_CPU_<CPU>.
-+
-+(define (gen-have-cpu cpu)
-+ (string-append "HAVE_CPU_"
-+ (string-upcase (gen-sym cpu)))
-+)
-+
-+;; Return the bfd mach name for MACH.
-+
-+(define (gen-mach-bfd-name mach)
-+ (string-append "bfd_mach_" (gen-c-symbol (mach-bfd-name mach)))
-+)
-+
-+;; Return definition of C macro to get the value of SYM.
-+;; INDEX-ARGS, EXPR must not have any newlines.
-+
-+(define (gen-get-macro sym index-args expr)
-+ (string-append
-+ "#define GET_" (string-upcase sym) "(" index-args ") " expr "\n")
-+)
-+
-+;; Return definition of C macro to get the value of SYM, version 2.
-+;; EXPR is a C expression *without* proper \newline handling,
-+;; we prepend \ to each line.
-+;; INDEX-ARGS, EXPR must not have any newlines.
-+
-+(define (gen-get-macro2 sym index-args expr)
-+ (string-append
-+ "#define GET_" (string-upcase sym) "(" index-args ") "
-+ (backslash "\n" expr)
-+ "\n")
-+)
-+
-+;; Return definition of C macro to set the value of SYM.
-+;; INDEX-ARGS, EXPR, LVALUE must not have any newlines.
-+
-+(define (gen-set-macro sym index-args lvalue)
-+ (string-append
-+ "#define SET_" (string-upcase sym)
-+ "(" index-args
-+ (if (equal? index-args "") "" ", ")
-+ "x) (" lvalue " = (x))\n")
-+)
-+
-+;; Return definition of C macro to set the value of SYM, version 2.
-+;; EXPR is one or more C statements *without* proper \newline handling,
-+;; we prepend \ to each line.
-+;; INDEX-ARGS, NEWVAL-ARG must not have any newlines.
-+
-+(define (gen-set-macro2 sym index-args newval-arg expr)
-+ (string-append
-+ "#define SET_" (string-upcase sym)
-+ "(" index-args
-+ (if (equal? index-args "") "" ", ")
-+ newval-arg ") \\\n"
-+ "do { \\\n"
-+ (backslash "\n" expr)
-+ ";} while (0)\n")
-+)
-+
-+;; Misc. object utilities.
-+
-+;; Return the nub of a list of objects.
-+
-+(define (obj-list-nub obj-list)
-+ (nub obj-list obj:name)
-+)
-+
-+;; Sort a list of objects with get-name methods alphabetically.
-+
-+(define (alpha-sort-obj-list l)
-+ (sort l
-+ (lambda (o1 o2)
-+ (symbol<? (obj:name o1) (obj:name o2))))
-+)
-+
-+;; Called before loading the .cpu file to initialize.
-+
-+(define (utils-init!)
-+ (reader-add-command! 'sanitize
-+ "\
-+Mark an entry as being sanitized.
-+"
-+ nil '(keyword entry-type . entry-names) sanitize)
-+
-+ *UNSPECIFIED*
-+)
-+
-+;; Return the definition of a C macro that concatenates its argument symbols.
-+
-+(define (gen-define-with-symcat head . args)
-+ (string-append
-+ "#define "
-+ head
-+ (string-map (lambda (elm) (string-append "##" elm)) args)
-+ "\n")
-+)
-diff -Nur binutils-2.24.orig/cgen/utils-gen.scm binutils-2.24/cgen/utils-gen.scm
---- binutils-2.24.orig/cgen/utils-gen.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/utils-gen.scm 2016-06-30 21:26:12.677894046 +0200
-@@ -0,0 +1,551 @@
-+; Application independent utilities for C/C++ code generation.
-+; Copyright (C) 2000, 2001, 2005, 2009 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; Attributes.
-+
-+(define (attr-bool-gen-decl attr) "")
-+
-+(define (attr-bool-gen-defn attr) "")
-+
-+(define (attr-int-gen-decl attr) "")
-+
-+(define (attr-int-gen-defn attr)
-+ (string-append
-+ "static const CGEN_ATTR_ENTRY " (gen-sym attr)
-+ "_attr [] ATTRIBUTE_UNUSED = \n{\n {\"integer\", " (number->string (attr-default attr)) "},\n { 0, 0 }\n};\n\n" ))
-+
-+(define (attr-gen-decl attr)
-+ (gen-enum-decl (symbol-append (obj:name attr) '-attr)
-+ (obj:comment attr)
-+ (string-append (obj:str-name attr) "_")
-+ (attr-values attr))
-+)
-+
-+(define (attr-gen-defn attr)
-+ (string-append
-+ "static const CGEN_ATTR_ENTRY "
-+ (gen-sym attr) "_attr"
-+ "[] ATTRIBUTE_UNUSED =\n{\n"
-+ (string-map (lambda (elm)
-+ (let* ((san (and (pair? elm) (pair? (cdr elm))
-+ (attr-value (cddr elm) 'sanitize #f))))
-+ (gen-sanitize
-+ (if (and san (not (eq? san 'none)))
-+ san
-+ #f)
-+ (string-append " { "
-+ "\""
-+ (gen-c-symbol (car elm))
-+ "\", "
-+ (string-upcase (gen-sym attr))
-+ "_"
-+ (string-upcase (gen-c-symbol (car elm)))
-+ " },\n"))))
-+ (attr-values attr))
-+ " { 0, 0 }\n"
-+ "};\n\n")
-+)
-+
-+(method-make! <boolean-attribute> 'gen-decl attr-bool-gen-decl)
-+(method-make! <bitset-attribute> 'gen-decl attr-gen-decl)
-+(method-make! <integer-attribute> 'gen-decl attr-int-gen-decl)
-+(method-make! <enum-attribute> 'gen-decl attr-gen-decl)
-+
-+(method-make! <boolean-attribute> 'gen-defn attr-bool-gen-defn)
-+(method-make! <bitset-attribute> 'gen-defn attr-gen-defn)
-+(method-make! <integer-attribute> 'gen-defn attr-int-gen-defn)
-+(method-make! <enum-attribute> 'gen-defn attr-gen-defn)
-+
-+; Ifield extraction utilities.
-+
-+; Return the C data type to use to hold an extracted and decoded
-+; <ifield> from an insn. Usually this is just an int, but for register
-+; numbers or large unsigned immediates, an unsigned int may be preferable.
-+; Then there's floats (??? which aren't handled yet).
-+
-+(define (gen-ifld-type f)
-+ (mode:c-type (ifld-decode-mode f))
-+)
-+
-+; Return C declaration of variable(s) to hold <ifield> F.
-+; MACRO? is #t if the result is part of a macro.
-+
-+(define (gen-ifld-extract-decl f indent macro?)
-+ (string-append indent (gen-ifld-type f) " " (gen-sym f) ";"
-+ (if macro? " \\\n" "\n"))
-+)
-+
-+; Return C code to extract a field from the base part of an insn.
-+;
-+; TOTAL-LENGTH is the total length of the value in VAL.
-+; BASE-VALUE is a C expression (string) containing the base part of the insn.
-+
-+(define (/gen-ifld-extract-base f total-length base-value)
-+ (let ((extraction
-+ (string-append "EXTRACT_"
-+ (if (current-arch-insn-lsb0?) "LSB0_" "MSB0_")
-+ (if (> total-length 32) "LG" "")
-+ (case (mode:class (ifld-mode f))
-+ ((INT) "SINT")
-+ ((UINT) "UINT")
-+ (else (error "unsupported mode class"
-+ (mode:class (ifld-mode f)))))
-+ " ("
-+ base-value ", "
-+ (number->string total-length) ", "
-+ (number->string (+ (ifld-start f)
-+ (ifld-word-offset f))) ", "
-+ (number->string (ifld-length f))
-+ ")"))
-+ (decode (ifld-decode f)))
-+ ; If the field doesn't have a special decode expression,
-+ ; just return the raw extracted value. Otherwise, emit
-+ ; the expression.
-+ (if (not decode)
-+ extraction
-+ ; cadr: fetches expression to be evaluated
-+ ; caar: fetches symbol in arglist
-+ ; cadar: fetches `pc' symbol in arglist
-+ (rtl-c DFLT
-+ (obj-isa-list f)
-+ (list (list (caar decode) 'UINT extraction)
-+ (list (cadar decode) 'IAI "pc"))
-+ (cadr decode)
-+ #:rtl-cover-fns? #f #:ifield-var? #t)))
-+)
-+
-+; Subroutine of /gen-ifld-extract-beyond to extract the relevant value
-+; from WORD-NAME and move it into place.
-+
-+(define (/gen-extract-word word-name word-start word-length
-+ field-start field-length
-+ unsigned? lsb0?)
-+ (let* ((word-end (+ word-start word-length))
-+ (start (if lsb0? (+ 1 (- field-start field-length)) field-start))
-+ (end (+ start field-length))
-+ (base (if (< start word-start) word-start start)))
-+ (string-append "("
-+ "EXTRACT_"
-+ (if lsb0? "LSB0_" "MSB0_")
-+ (if (> word-length 32) "LG" "")
-+ (if (and (not unsigned?)
-+ ; Only want sign extension for word with sign bit.
-+ (bitrange-overlap? field-start 1
-+ word-start word-length
-+ lsb0?))
-+ "SINT"
-+ "UINT")
-+ " ("
-+ ; What to extract from.
-+ word-name
-+ ", "
-+ ; Size of this chunk.
-+ (number->string word-length)
-+ ", "
-+ ; MSB of this chunk.
-+ (number->string
-+ (if lsb0?
-+ (if (> end word-end)
-+ (- word-end 1)
-+ (- end word-start 1))
-+ (if (< start word-start)
-+ 0
-+ (- start word-start))))
-+ ", "
-+ ; Length of field within this chunk.
-+ (number->string (if (< end word-end)
-+ (- end base)
-+ (- word-end base)))
-+ ") << "
-+ ; Adjustment for this chunk within a full field.
-+ (number->string (if (> end word-end)
-+ (- end word-end)
-+ 0))
-+ ")"))
-+)
-+
-+; Return C code to extract a field that extends beyond the base insn.
-+;
-+; Things get tricky in the non-integral-insn case (no kidding).
-+; This case includes every architecture with at least one insn larger
-+; than 32 bits, and all architectures where insns smaller than 32 bits
-+; can't be interpreted as an int.
-+; ??? And maybe other architectures not considered yet.
-+; We want to handle these reasonably fast as this includes architectures like
-+; the ARC and I960 where 99% of the insns are 32 bits, with a few insns that
-+; take a 32 bit immediate. It would be a real shame to unnecessarily slow down
-+; handling of 99% of the instruction set just for a few insns. Fortunately
-+; for these chips base-insn includes these insns, so things fall out naturally.
-+;
-+; BASE-LENGTH is base-insn-bitsize.
-+; TOTAL-LENGTH is the total length of the insn.
-+; VAR-LIST is a list of variables containing the insn.
-+; Each element in VAR-LIST is (name start length).
-+; The contents of the insn are in several variables: insn, word_[123...],
-+; where `insn' contains the "base insn" and `word_N' is a set of variables
-+; recording the rest of the insn, 32 bits at a time (with the last one
-+; containing whatever is left over).
-+
-+(define (/gen-ifld-extract-beyond f base-length total-length var-list)
-+ ; First compute the list of variables that contains pieces of the
-+ ; desired value.
-+ (let ((start (+ (ifld-start f) (ifld-word-offset f)))
-+ (length (ifld-length f))
-+ ;(word-start (ifld-word-offset f))
-+ ;(word-length (ifld-word-length f))
-+ ; extraction code
-+ (extraction #f)
-+ ; extra processing to perform on extracted value
-+ (decode (ifld-decode f))
-+ (lsb0? (current-arch-insn-lsb0?)))
-+ ; Find which vars are needed and move the value into place.
-+ (let loop ((var-list var-list) (result (list ")")))
-+ (if (null? var-list)
-+ (set! extraction (apply string-append (cons "(0" result)))
-+ (let ((var-name (caar var-list))
-+ (var-start (cadar var-list))
-+ (var-length (caddar var-list)))
-+ (if (bitrange-overlap? start length
-+ var-start var-length
-+ lsb0?)
-+ (loop (cdr var-list)
-+ (cons "|"
-+ (cons (/gen-extract-word var-name
-+ var-start
-+ var-length
-+ start length
-+ (eq? (mode:class (ifld-mode f))
-+ 'UINT)
-+ lsb0?)
-+ result)))
-+ (loop (cdr var-list) result)))))
-+ ; If the field doesn't have a special decode expression, just return the
-+ ; raw extracted value. Otherwise, emit the expression.
-+ (if (not decode)
-+ extraction
-+ ; cadr: fetches expression to be evaluated
-+ ; caar: fetches symbol in arglist
-+ ; cadar: fetches `pc' symbol in arglist
-+ (rtl-c DFLT
-+ (obj-isa-list f)
-+ (list (list (caar decode) 'UINT extraction)
-+ (list (cadar decode) 'IAI "pc"))
-+ (cadr decode)
-+ #:rtl-cover-fns? #f #:ifield-var? #t)))
-+)
-+
-+; Return C code to extract <ifield> F.
-+
-+(define (gen-ifld-extract f indent base-length total-length base-value var-list macro?)
-+ (string-append
-+ indent
-+ (gen-sym f)
-+ " = "
-+ (if (adata-integral-insn? CURRENT-ARCH)
-+ (/gen-ifld-extract-base f total-length base-value)
-+ (if (ifld-beyond-base? f)
-+ (/gen-ifld-extract-beyond f base-length total-length var-list)
-+ (/gen-ifld-extract-base f base-length base-value)))
-+ ";"
-+ (if macro? " \\\n" "\n")
-+ )
-+)
-+
-+; Return C code to extract a <multi-ifield> from an insn.
-+; This must have the same signature as gen-ifld-extract as both can be
-+; made methods in application code.
-+
-+(define (gen-multi-ifld-extract f indent base-length total-length base-value var-list macro?)
-+ ; The subfields must have already been extracted.
-+ (let* ((decode-proc (ifld-decode f))
-+ (varname (gen-sym f))
-+ (decode (string-list
-+ ;; First, the block that extract the multi-ifield into the ifld variable.
-+ (rtl-c VOID (obj-isa-list f) nil
-+ (multi-ifld-extract f)
-+ #:rtl-cover-fns? #f #:ifield-var? #t)
-+ ;; Next, the decode routine that modifies it.
-+ (if decode-proc
-+ (string-append
-+ " " varname " = "
-+ (rtl-c DFLT
-+ (obj-isa-list f)
-+ (list (list (caar decode-proc) 'UINT varname)
-+ (list (cadar decode-proc) 'IAI "pc"))
-+ (cadr decode-proc)
-+ #:rtl-cover-fns? #f #:ifield-var? #t)
-+ ";\n")
-+ "")
-+ )))
-+ (if macro?
-+ (backslash "\n" decode)
-+ decode))
-+)
-+
-+; Return C symbol of variable containing the extracted field value
-+; in the extraction code. E.g. f_rd = EXTRACT_UINT (insn, ...).
-+
-+(define (gen-extracted-ifld-value f)
-+ (gen-sym f)
-+)
-+
-+; Subroutine of gen-extract-ifields to compute arguments for /extract-chunk
-+; to extract values beyond the base insn.
-+; This is also used by gen-define-ifields to know how many vars are needed.
-+;
-+; The result is a list of (offset . length) pairs.
-+;
-+; ??? Here's a case where explicitly defined instruction formats can
-+; help - without them we can only use heuristics (which must evolve).
-+; At least all the details are tucked away here.
-+
-+(define (/extract-chunk-specs base-length total-length alignment)
-+ (let ((chunk-length
-+ (case alignment
-+ ; For the aligned and forced case split the insn up into base-insn
-+ ; sized chunks. For the unaligned case, use a chunk-length of 32.
-+ ; 32 was chosen because the values are extracted into portable ints.
-+ ((aligned forced) (min base-length 32))
-+ ((unaligned) 32)
-+ (else (error "unknown alignment" alignment)))))
-+ (let loop ((start base-length)
-+ (remaining (- total-length base-length))
-+ (result nil))
-+ (if (<= remaining 0)
-+ (reverse! result)
-+ (loop (+ start chunk-length)
-+ (- remaining chunk-length)
-+ ; Always fetch full CHUNK-LENGTH-sized chunks here,
-+ ; even if we don't actually need that many bytes.
-+ ; gen-ifetch only handles "normal" fetch sizes,
-+ ; and /gen-extract-word already knows how to find what
-+ ; it needs if we give it too much.
-+ (cons (cons start chunk-length)
-+ result)))))
-+)
-+
-+; Subroutine of gen-define-ifmt-ifields and gen-extract-ifmt-ifields to
-+; insert the subfields of any multi-ifields present into IFLDS.
-+; Subfields are inserted before their corresponding multi-ifield as they
-+; are initialized in order.
-+
-+(define (/extract-insert-subfields iflds)
-+ (let loop ((result nil) (iflds iflds))
-+ (cond ((null? iflds)
-+ (reverse! result))
-+ ((multi-ifield? (car iflds))
-+ (loop (cons (car iflds)
-+ ; There's no real need to reverse the subfields here
-+ ; other than to keep them in order.
-+ (append (reverse (multi-ifld-subfields (car iflds)))
-+ result))
-+ (cdr iflds)))
-+ (else
-+ (loop (cons (car iflds) result) (cdr iflds)))))
-+)
-+
-+; Return C code to define local vars to contain IFIELDS.
-+; All insns using the result have the same TOTAL-LENGTH (in bits).
-+; INDENT is a string prepended to each line.
-+; MACRO? is #t if the code is part of a macro (and thus '\\' must be appended
-+; to each line).
-+
-+(define (gen-define-ifields ifields total-length indent macro?)
-+ (let* ((base-length (if (adata-integral-insn? CURRENT-ARCH)
-+ 32
-+ (state-base-insn-bitsize)))
-+ (chunk-specs (/extract-chunk-specs base-length total-length
-+ (current-arch-default-alignment))))
-+ (string-list
-+ (string-list-map (lambda (f)
-+ (gen-ifld-extract-decl f indent macro?))
-+ ifields)
-+ ; Define enough ints to hold the trailing part of the insn,
-+ ; N bits at a time.
-+ ; ??? This could be more intelligent of course. Later.
-+ ; ??? Making these global to us would allow filling them during
-+ ; decoding.
-+ (if (> total-length base-length)
-+ (string-list
-+ indent
-+ "/* Contents of trailing part of insn. */"
-+ (if macro? " \\\n" "\n")
-+ (string-list-map (lambda (chunk-num)
-+ (string-list indent
-+ "UINT word_"
-+ (number->string chunk-num)
-+ (if macro? "; \\\n" ";\n")))
-+ (iota (length chunk-specs) 1)))
-+ "")))
-+)
-+
-+; Return C code to define local vars to contain IFIELDS of <iformat> IFMT.
-+; INDENT is a string prepended to each line.
-+; MACRO? is #t if the code is part of a macro (and thus '\\' must be appended
-+; to each line).
-+; USE-MACRO? is #t if instead of generating the fields, we return the macro
-+; that does that.
-+
-+(define (gen-define-ifmt-ifields ifmt indent macro? use-macro?)
-+ (let ((macro-name (string-append
-+ "EXTRACT_" (string-upcase (gen-sym ifmt))
-+ "_VARS"))
-+ (ifields (/extract-insert-subfields (ifmt-ifields ifmt))))
-+ (if use-macro?
-+ (string-list indent macro-name
-+ " /*"
-+ (string-list-map (lambda (fld)
-+ (string-append " " (obj:str-name fld)))
-+ ifields)
-+ " */\n")
-+ (let ((indent (if macro? (string-append indent " ") indent)))
-+ (string-list
-+ (if macro?
-+ (string-list "#define " macro-name " \\\n")
-+ (string-list indent "/* Instruction fields. */\n"))
-+ (gen-define-ifields ifields (ifmt-length ifmt) indent macro?)
-+ indent "unsigned int length;"
-+ ; The last line doesn't have a trailing '\\'.
-+ "\n"
-+ ))))
-+)
-+
-+; Subroutine of gen-extract-ifields to fetch one value into VAR-NAME.
-+
-+(define (/extract-chunk offset bits var-name macro?)
-+ (string-append
-+ " "
-+ var-name
-+ " = "
-+ (gen-ifetch "pc" offset bits)
-+ ";"
-+ (if macro? " \\\n" "\n"))
-+)
-+
-+; Subroutine of gen-extract-ifields to compute the var-list arg to
-+; gen-ifld-extract-beyond.
-+; The result is a list of `(name start length)' elements describing the
-+; variables holding the parts of the insn.
-+; CHUNK-SPECS is a list of (offset . length) pairs.
-+
-+(define (/gen-extract-beyond-var-list base-length var-prefix chunk-specs lsb0?)
-+ ; ??? lsb0? support ok?
-+ (cons (list "insn" 0 base-length)
-+ (map (lambda (chunk-num chunk-spec)
-+ (list (string-append var-prefix (number->string chunk-num))
-+ (car chunk-spec)
-+ (cdr chunk-spec)))
-+ (iota (length chunk-specs) 1)
-+ chunk-specs))
-+)
-+
-+; Return C code to extract IFIELDS.
-+; All insns using the result have the same TOTAL-LENGTH (in bits).
-+; MACRO? is #t if the code is part of a macro (and thus '\\' must be appended
-+; to each line).
-+;
-+; Here is where we handle integral-insn vs non-integeral-insn architectures.
-+;
-+; Examples of architectures that can be handled as integral-insns are:
-+; sparc, m32r, mips, etc.
-+;
-+; Examples of architectures that can't be handled as integral insns are:
-+; arc, i960, fr30, i386, m68k.
-+; [i386,m68k are only mentioned for completeness. cgen ports of these
-+; would be great, but more thought is needed first]
-+;
-+; C variable `insn' is assumed to contain the base part of the insn
-+; (max base-insn-bitsize insn-bitsize). In the m32r case insn-bitsize
-+; can be less than base-insn-bitsize.
-+;
-+; ??? Need to see how well gcc optimizes this.
-+;
-+; ??? Another way to do this is to put this code in an inline function that
-+; gets passed pointers to each ifield variable. GCC is smart enough to
-+; produce optimal code for this, but other compilers may not have inlining
-+; or the indirection removal. I think the slowdown for a non-scache simulator
-+; would be phenomenal and while one can say "too bad, use gcc", I'm defering
-+; doing this for now.
-+
-+(define (gen-extract-ifields ifields total-length indent macro?)
-+ (let* ((base-length (if (adata-integral-insn? CURRENT-ARCH)
-+ 32
-+ (state-base-insn-bitsize)))
-+ (chunk-specs (/extract-chunk-specs base-length total-length
-+ (current-arch-default-alignment))))
-+ (string-list
-+ ; If the insn has a trailing part, fetch it.
-+ ; ??? Could have more intelligence here. Later.
-+ (if (> total-length base-length)
-+ (let ()
-+ (string-list-map (lambda (chunk-spec chunk-num)
-+ (/extract-chunk (car chunk-spec)
-+ (cdr chunk-spec)
-+ (string-append
-+ "word_"
-+ (number->string chunk-num))
-+ macro?))
-+ chunk-specs
-+ (iota (length chunk-specs) 1)))
-+ "")
-+ (string-list-map
-+ (lambda (f)
-+ ; Dispatching on a method works better, as would a generic fn.
-+ ; ??? Written this way to pass through Hobbit, doesn't handle
-+ ; ((if foo a b) (arg1 arg2)).
-+ (if (multi-ifield? f)
-+ (gen-multi-ifld-extract
-+ f indent base-length total-length "insn"
-+ (/gen-extract-beyond-var-list base-length "word_"
-+ chunk-specs
-+ (current-arch-insn-lsb0?))
-+ macro?)
-+ (gen-ifld-extract
-+ f indent base-length total-length "insn"
-+ (/gen-extract-beyond-var-list base-length "word_"
-+ chunk-specs
-+ (current-arch-insn-lsb0?))
-+ macro?)))
-+ ifields)
-+ ))
-+)
-+
-+; Return C code to extract the fields of <iformat> IFMT.
-+; MACRO? is #t if the code is part of a macro (and thus '\\' must be appended
-+; to each line).
-+; USE-MACRO? is #t if instead of generating the fields, we return the macro
-+; that does that.
-+
-+(define (gen-extract-ifmt-ifields ifmt indent macro? use-macro?)
-+ (let ((macro-name (string-append
-+ "EXTRACT_" (string-upcase (gen-sym ifmt))
-+ "_CODE"))
-+ (ifields (/extract-insert-subfields (ifmt-ifields ifmt))))
-+ (if use-macro?
-+ (string-list indent macro-name "\n")
-+ (let ((indent (if macro? (string-append indent " ") indent)))
-+ (string-list
-+ (if macro?
-+ (string-list "#define " macro-name " \\\n")
-+ "")
-+ indent "length = "
-+ (number->string (bits->bytes (ifmt-length ifmt)))
-+ ";"
-+ (if macro? " \\\n" "\n")
-+ (gen-extract-ifields ifields (ifmt-length ifmt) indent macro?)
-+ ; The last line doesn't have a trailing '\\'.
-+ "\n"
-+ ))))
-+)
-+
-+; Instruction format utilities.
-+
-+(define (gen-sfmt-enum-decl sfmt-list)
-+ (gen-enum-decl "@prefix@_sfmt_type"
-+ "semantic formats in cpu family @cpu@"
-+ "@PREFIX@_"
-+ (map (lambda (sfmt) (cons (obj:name sfmt) nil))
-+ sfmt-list))
-+)
-diff -Nur binutils-2.24.orig/cgen/utils.scm binutils-2.24/cgen/utils.scm
---- binutils-2.24.orig/cgen/utils.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/utils.scm 2016-06-30 21:26:12.681894201 +0200
-@@ -0,0 +1,1504 @@
-+; Generic Utilities.
-+; Copyright (C) 2000, 2005, 2006, 2007, 2009, 2010 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; These utilities are neither object nor cgen centric.
-+; They're generic, non application-specific utilities.
-+; There are a few exceptions, keep them to a minimum.
-+;
-+; Conventions:
-+; - the prefix "gen-" comes from cgen's convention that procs that return C
-+; code, and only those procs, are prefixed with "gen-"
-+
-+(define nil '())
-+
-+; Hobbit support code; for when not using hobbit.
-+; FIXME: eliminate this stuff ASAP.
-+
-+(defmacro /fastcall-make (proc) proc)
-+
-+(defmacro fastcall4 (proc arg1 arg2 arg3 arg4)
-+ (list proc arg1 arg2 arg3 arg4)
-+)
-+
-+(defmacro fastcall5 (proc arg1 arg2 arg3 arg4 arg5)
-+ (list proc arg1 arg2 arg3 arg4 arg5)
-+)
-+
-+(defmacro fastcall6 (proc arg1 arg2 arg3 arg4 arg5 arg6)
-+ (list proc arg1 arg2 arg3 arg4 arg5 arg6)
-+)
-+
-+(defmacro fastcall7 (proc arg1 arg2 arg3 arg4 arg5 arg6 arg7)
-+ (list proc arg1 arg2 arg3 arg4 arg5 arg6 arg7)
-+)
-+
-+; Value doesn't matter too much here, just ensure it's portable.
-+(define *UNSPECIFIED* (if #f 1))
-+
-+(define assert-fail-msg "assertion failure:")
-+
-+(defmacro assert (expr)
-+ `(if (not ,expr)
-+ (error assert-fail-msg ',expr))
-+)
-+
-+(define verbose-level 0)
-+
-+(define (verbose-inc!)
-+ (set! verbose-level (+ verbose-level 1))
-+)
-+
-+(define (verbose? level) (>= verbose-level level))
-+
-+; Print to stderr, takes an arbitrary number of objects, possibly nested.
-+; ??? Audit callers, can we maybe just use "display" here (except that
-+; we still might want some control over the output).
-+
-+(define message
-+ (lambda args
-+ (for-each (lambda (str)
-+ (if (pair? str)
-+ (if (list? str)
-+ ;; ??? Incorrect for improper lists, later.
-+ (begin
-+ (message "(")
-+ (for-each (lambda (s) (message s " ")) str)
-+ (message ")"))
-+ (message "(" (car str) " . " (cdr str) ")"))
-+ (display str (current-error-port))))
-+ args))
-+)
-+
-+; Print a message if the verbosity level calls for it.
-+; This is a macro as a bit of cpu may be spent computing args,
-+; and we only want to spend it if the result will be printed.
-+
-+(defmacro logit (level . args)
-+ `(if (>= verbose-level ,level) (message ,@args))
-+)
-+
-+; Return a string of N spaces.
-+
-+(define (spaces n) (make-string n #\space))
-+
-+; Write N spaces to PORT, or the current output port if elided.
-+
-+(define (write-spaces n . port)
-+ (let ((port (if (null? port) (current-output-port) (car port))))
-+ (write (spaces n) port))
-+)
-+
-+; Concatenate all the arguments and make a string. Symbols are
-+; converted to strings.
-+(define (string/symbol-append . sequences)
-+ (define (sequence->string o) (if (symbol? o) (symbol->string o) o))
-+ (apply string-append (map sequence->string sequences)))
-+
-+; Often used idiom.
-+
-+(define (string-map fn . args) (apply string-append (apply map (cons fn args))))
-+
-+; Collect a flat list of returned sublists from the lambda fn applied over args.
-+
-+(define (collect fn . args) (apply append (apply map (cons fn args))))
-+
-+; Map over value entries in an alist.
-+; 'twould be nice if this were a primitive.
-+
-+(define (amap fn args)
-+ (map fn (map cdr args))
-+)
-+
-+; Like map but accept a proper or improper list.
-+; An improper list is (a b c . d).
-+; FN must be a proc of one argument.
-+
-+(define (map1-improper fn l)
-+ (let ((result nil))
-+ (let loop ((last #f) (l l))
-+ (cond ((null? l)
-+ result)
-+ ((pair? l)
-+ (if last
-+ (begin
-+ (set-cdr! last (cons (fn (car l)) nil))
-+ (loop (cdr last) (cdr l)))
-+ (begin
-+ (set! result (cons (fn (car l)) nil))
-+ (loop result (cdr l)))))
-+ (else
-+ (if last
-+ (begin
-+ (set-cdr! last (fn l))
-+ result)
-+ (fn l))))))
-+)
-+
-+; Turn string or symbol STR into a proper C symbol.
-+; The result is a string.
-+; We assume STR has no leading digits.
-+; All invalid characters are turned into '_'.
-+; FIXME: Turn trailing "?" into "_p".
-+
-+(define (gen-c-symbol str)
-+ (if (not (or (string? str) (symbol? str)))
-+ (error "gen-c-symbol: not symbol or string:" str))
-+ (map-over-string (lambda (c) (if (id-char? c) c #\_))
-+ (->string str))
-+)
-+
-+; Turn string or symbol STR into a proper file name, which is
-+; defined to be the same as gen-c-symbol except use -'s instead of _'s.
-+; The result is a string.
-+
-+(define (gen-file-name str)
-+ (if (not (or (string? str) (symbol? str)))
-+ (error "gen-file-name: not symbol or string:" str))
-+ (map-over-string (lambda (c) (if (id-char? c) c #\-))
-+ (->string str))
-+)
-+
-+; Turn STR into lowercase.
-+
-+(define (string-downcase str)
-+ (map-over-string (lambda (c) (char-downcase c)) str)
-+)
-+
-+; Turn STR into uppercase.
-+
-+(define (string-upcase str)
-+ (map-over-string (lambda (c) (char-upcase c)) str)
-+)
-+
-+; Turn SYM into lowercase.
-+
-+(define (symbol-downcase sym)
-+ (string->symbol (string-downcase (symbol->string sym)))
-+)
-+
-+; Turn SYM into uppercase.
-+
-+(define (symbol-upcase sym)
-+ (string->symbol (string-upcase (symbol->string sym)))
-+)
-+
-+; Symbol sorter.
-+
-+(define (symbol<? a b)
-+ (string<? (symbol->string a) (symbol->string b))
-+)
-+
-+; Drop N chars from string S.
-+; If N is negative, drop chars from the end.
-+; It is ok to drop more characters than are in the string, the result is "".
-+
-+(define (string-drop n s)
-+ (cond ((>= n (string-length s)) "")
-+ ((< n 0) (substring s 0 (+ (string-length s) n)))
-+ (else (substring s n (string-length s))))
-+)
-+
-+; Drop the leading char from string S (assumed to have at least 1 char).
-+
-+(define (string-drop1 s)
-+ (string-drop 1 s)
-+)
-+
-+; Return the leading N chars from string STR.
-+; This has APL semantics:
-+; N > length: FILLER chars are appended
-+; N < 0: take from the end of the string and prepend FILLER if necessary
-+
-+(define (string-take-with-filler n str filler)
-+ (let ((len (string-length str)))
-+ (if (< n 0)
-+ (let ((n (- n)))
-+ (string-append (if (> n len)
-+ (make-string (- n len) filler)
-+ "")
-+ (substring str (max 0 (- len n)) len)))
-+ (string-append (substring str 0 (min len n))
-+ (if (> n len)
-+ (make-string (- n len) filler)
-+ ""))))
-+)
-+
-+(define (string-take n str)
-+ (string-take-with-filler n str #\space)
-+)
-+
-+; Return the leading char from string S (assumed to have at least 1 char).
-+
-+(define (string-take1 s)
-+ (substring s 0 1)
-+)
-+
-+; Return the index of char C in string S or #f if not found.
-+
-+(define (string-index s c)
-+ (let loop ((i 0))
-+ (cond ((= i (string-length s)) #f)
-+ ((char=? c (string-ref s i)) i)
-+ (else (loop (1+ i)))))
-+)
-+
-+; Cut string S into a list of strings using delimiter DELIM (a character).
-+
-+(define (string-cut s delim)
-+ (let loop ((start 0)
-+ (end 0)
-+ (length (string-length s))
-+ (result nil))
-+ (cond ((= end length)
-+ (if (> end start)
-+ (reverse! (cons (substring s start end) result))
-+ (reverse! result)))
-+ ((char=? (string-ref s end) delim)
-+ (loop (1+ end) (1+ end) length (cons (substring s start end) result)))
-+ (else (loop start (1+ end) length result))))
-+)
-+
-+; Convert a list of elements to a string, inserting DELIM (a string)
-+; between elements.
-+; L can also be a string or a number.
-+
-+(define (stringize l delim)
-+ (cond ((string? l) l)
-+ ((number? l) (number->string l))
-+ ((symbol? l) (symbol->string l))
-+ ((list? l)
-+ (string-drop
-+ (string-length delim)
-+ (string-map (lambda (elm)
-+ (string-append delim
-+ (stringize elm delim)))
-+ l)))
-+ (else (error "stringize: can't handle:" l)))
-+)
-+
-+; Same as string-append, but accepts symbols too.
-+; PERF: This implementation may be unacceptably slow. Revisit.
-+
-+(define stringsym-append
-+ (lambda args
-+ (apply string-append
-+ (map (lambda (s)
-+ (if (symbol? s)
-+ (symbol->string s)
-+ s))
-+ args)))
-+)
-+
-+; Same as symbol-append, but accepts strings too.
-+
-+(define symbolstr-append
-+ (lambda args
-+ (string->symbol (apply stringsym-append args)))
-+)
-+
-+; Given a symbol or a string, return the string form.
-+
-+(define (->string s)
-+ (if (symbol? s)
-+ (symbol->string s)
-+ s)
-+)
-+
-+; Given a symbol or a string, return the symbol form.
-+
-+(define (->symbol s)
-+ (if (string? s)
-+ (string->symbol s)
-+ s)
-+)
-+
-+; Output routines.
-+
-+;; Given some state that has a setter function (SETTER NEW-VALUE) and
-+;; a getter function (GETTER), call THUNK with the state set to VALUE,
-+;; and restore the original value when THUNK returns. Ensure that the
-+;; original value is restored whether THUNK returns normally, throws
-+;; an exception, or invokes a continuation that leaves the call's
-+;; dynamic scope.
-+
-+(define (setter-getter-fluid-let setter getter value thunk)
-+ (let ((swap (lambda ()
-+ (let ((temp (getter)))
-+ (setter value)
-+ (set! value temp)))))
-+ (dynamic-wind swap thunk swap)))
-+
-+
-+;; Call THUNK with the current input and output ports set to PORT, and
-+;; then restore the current ports to their original values.
-+;;
-+;; This ensures the current ports get restored whether THUNK exits
-+;; normally, throws an exception, or leaves the call's dynamic scope
-+;; by applying a continuation.
-+
-+(define (with-input-and-output-to port thunk)
-+ (setter-getter-fluid-let
-+ set-current-input-port current-input-port port
-+ (lambda ()
-+ (setter-getter-fluid-let
-+ set-current-output-port current-output-port port
-+ thunk))))
-+
-+
-+; Extension to the current-output-port.
-+; Only valid inside string-write.
-+
-+(define /current-print-state #f)
-+
-+; Create a print-state object.
-+; This is written in portable Scheme so we don't use COS objects, etc.
-+
-+(define (make-print-state)
-+ (vector 'print-state 0)
-+)
-+
-+; print-state accessors.
-+
-+(define (pstate-indent pstate) (vector-ref pstate 1))
-+(define (pstate-set-indent! pstate indent) (vector-set! pstate 1 indent))
-+
-+; Special print commands (embedded in args).
-+
-+(define (pstate-cmd? x) (and (vector? x) (eq? (vector-ref x 0) 'pstate)))
-+
-+;(define /endl (vector 'pstate '/endl)) ; ??? needed?
-+(define /indent (vector 'pstate '/indent))
-+(define (/indent-set n) (vector 'pstate '/indent-set n))
-+(define (/indent-add n) (vector 'pstate '/indent-add n))
-+
-+; Process a pstate command.
-+
-+(define (pstate-cmd-do pstate cmd)
-+ (assert (pstate-cmd? cmd))
-+ (case (vector-ref cmd 1)
-+ ((/endl)
-+ "\n")
-+ ((/indent)
-+ (let ((indent (pstate-indent pstate)))
-+ (string-append (make-string (quotient indent 8) #\tab)
-+ (make-string (remainder indent 8) #\space))))
-+ ((/indent-set)
-+ (pstate-set-indent! pstate (vector-ref cmd 2))
-+ "")
-+ ((/indent-add)
-+ (pstate-set-indent! pstate (+ (pstate-indent pstate)
-+ (vector-ref cmd 2)))
-+ "")
-+ (else
-+ (error "unknown pstate command" (vector-ref cmd 1))))
-+)
-+
-+; Write STRINGS to current-output-port.
-+; STRINGS is a list of things to write. Supported types are strings, symbols,
-+; lists, procedures. Lists are printed by applying string-write recursively.
-+; Procedures are thunks that return the string to write.
-+;
-+; The result is the empty string. This is for debugging where this
-+; procedure is modified to return its args, rather than write them out.
-+
-+(define string-write
-+ (lambda strings
-+ (let ((pstate (make-print-state)))
-+ (set! /current-print-state pstate)
-+ (for-each (lambda (elm) (/string-write pstate elm))
-+ strings)
-+ (set! /current-print-state #f)
-+ ""))
-+)
-+
-+; Subroutine of string-write and string-write-map.
-+
-+(define (/string-write pstate expr)
-+ (cond ((string? expr) (display expr)) ; not write, we want raw text
-+ ((symbol? expr) (display expr))
-+ ((procedure? expr) (/string-write pstate (expr)))
-+ ((pstate-cmd? expr) (display (pstate-cmd-do pstate expr)))
-+ ((list? expr) (for-each (lambda (x) (/string-write pstate x)) expr))
-+ (else (error "string-write: bad arg:" expr)))
-+ *UNSPECIFIED*
-+)
-+
-+; Combination of string-map and string-write.
-+
-+(define (string-write-map proc arglist)
-+ (let ((pstate /current-print-state))
-+ (for-each (lambda (arg) (/string-write pstate (proc arg)))
-+ arglist))
-+ ""
-+)
-+
-+; Build up an argument for string-write.
-+
-+(define string-list list)
-+(define string-list-map map)
-+
-+; Subroutine of string-list->string. Does same thing /string-write does.
-+
-+(define (/string-list-flatten pstate strlist)
-+ (cond ((string? strlist) strlist)
-+ ((symbol? strlist) strlist)
-+ ((procedure? strlist) (/string-list-flatten pstate (strlist)))
-+ ((pstate-cmd? strlist) (pstate-cmd-do pstate strlist))
-+ ((list? strlist) (apply string-append
-+ (map (lambda (str)
-+ (/string-list-flatten pstate str))
-+ strlist)))
-+ (else (error "string-list->string: bad arg:" strlist)))
-+)
-+
-+; Flatten out a string list.
-+
-+(define (string-list->string strlist)
-+ (/string-list-flatten (make-print-state) strlist)
-+)
-+
-+; Prefix CHARS, a string of characters, with backslash in STR.
-+; STR is either a string or list of strings (to any depth).
-+; ??? Quick-n-dirty implementation.
-+
-+(define (backslash chars str)
-+ (if (string? str)
-+ ; quick check for any work to do
-+ (if (any-true? (map (lambda (c)
-+ (string-index str c))
-+ (string->list chars)))
-+ (let loop ((result "") (str str))
-+ (if (= (string-length str) 0)
-+ result
-+ (loop (string-append result
-+ (if (string-index chars (string-ref str 0))
-+ "\\"
-+ "")
-+ (substring str 0 1))
-+ (substring str 1 (string-length str)))))
-+ str)
-+ ; must be a list
-+ (if (null? str)
-+ nil
-+ (cons (backslash chars (car str))
-+ (backslash chars (cdr str)))))
-+)
-+
-+; Return a boolean indicating if S is bound to a value.
-+;(define old-symbol-bound? symbol-bound?)
-+;(define (symbol-bound? s) (old-symbol-bound? #f s))
-+
-+; Return a boolean indicating if S is a symbol and is bound to a value.
-+
-+(define (bound-symbol? s)
-+ (and (symbol? s)
-+ (or (symbol-bound? #f s)
-+ ;(module-bound? cgen-module s)
-+ ))
-+)
-+
-+; Return X.
-+
-+(define (identity x) x)
-+
-+; Test whether X is a `form' (non-empty list).
-+; ??? Is `form' the right word to use here?
-+; One can argue we should also test for a valid car. If so, it's the
-+; name that's wrong not the code (because the code is what I want).
-+
-+(define (form? x) (and (not (null? x)) (list? x)))
-+
-+; Return the number of arguments to ARG-SPEC, a valid argument list
-+; of `lambda'.
-+; The result is a pair: number of fixed arguments, varargs indicator (#f/#t).
-+
-+(define (num-args arg-spec)
-+ (if (symbol? arg-spec)
-+ '(0 . #t)
-+ (let loop ((count 0) (arg-spec arg-spec))
-+ (cond ((null? arg-spec) (cons count #f))
-+ ((null? (cdr arg-spec)) (cons (+ count 1) #f))
-+ ((pair? (cdr arg-spec)) (loop (+ count 1) (cdr arg-spec)))
-+ (else (cons (+ count 1) #t)))))
-+)
-+
-+; Return a boolean indicating if N args is ok to pass to a proc with
-+; an argument specification of ARG-SPEC (a valid argument list of `lambda').
-+
-+(define (num-args-ok? n arg-spec)
-+ (let ((processed-spec (num-args arg-spec)))
-+ (and
-+ ; Ensure enough fixed arguments.
-+ (>= n (car processed-spec))
-+ ; If more args than fixed args, ensure varargs.
-+ (or (= n (car processed-spec))
-+ (cdr processed-spec))))
-+)
-+
-+; Take N elements from list L.
-+; If N is negative, take elements from the end.
-+; If N is larger than the length, the extra elements are NIL.
-+; FIXME: incomplete
-+; FIXME: list-tail has args reversed (we should conform)
-+
-+(define (list-take n l)
-+ (let ((len (length l)))
-+ (if (< n 0)
-+ (list-tail l (+ len n))
-+ (let loop ((result nil) (l l) (i 0))
-+ (if (= i n)
-+ (reverse! result)
-+ (loop (cons (car l) result) (cdr l) (+ i 1))))))
-+)
-+
-+; Drop N elements from list L.
-+; FIXME: list-tail has args reversed (we should conform)
-+
-+(define (list-drop n l)
-+ (let loop ((n n) (l l))
-+ (if (> n 0)
-+ (loop (- n 1) (cdr l))
-+ l))
-+)
-+
-+; Drop N elements from the end of L.
-+; FIXME: list-tail has args reversed (we should conform)
-+
-+(define (list-tail-drop n l)
-+ (reverse! (list-drop n (reverse l)))
-+)
-+
-+;; left fold
-+
-+(define (foldl kons accum lis)
-+ (if (null? lis) accum
-+ (foldl kons (kons accum (car lis)) (cdr lis))))
-+
-+;; right fold
-+
-+(define (foldr kons knil lis)
-+ (if (null? lis) knil
-+ (kons (car lis) (foldr kons knil (cdr lis)))))
-+
-+;; filter list on predicate
-+
-+(define (filter p ls)
-+ (foldr (lambda (x a) (if (p x) (cons x a) a))
-+ '() ls))
-+
-+; APL's +\ operation on a vector of numbers.
-+
-+(define (plus-scan l)
-+ (letrec ((-plus-scan (lambda (l result)
-+ (if (null? l)
-+ result
-+ (-plus-scan (cdr l)
-+ (cons (if (null? result)
-+ (car l)
-+ (+ (car l) (car result)))
-+ result))))))
-+ (reverse! (-plus-scan l nil)))
-+)
-+
-+; Remove duplicate elements from sorted list L.
-+; Currently supported elements are symbols (a b c) and lists ((a) (b) (c)).
-+; NOTE: Uses equal? for comparisons.
-+
-+(define (remove-duplicates l)
-+ (let loop ((l l) (result nil))
-+ (cond ((null? l) (reverse! result))
-+ ((null? result) (loop (cdr l) (cons (car l) result)))
-+ ((equal? (car l) (car result)) (loop (cdr l) result))
-+ (else (loop (cdr l) (cons (car l) result)))
-+ )
-+ )
-+)
-+
-+; Return a boolean indicating if each element of list satisfies its
-+; corresponding predicates. The length of L must be equal to the length
-+; of PREDS.
-+
-+(define (list-elements-ok? l preds)
-+ (and (list? l)
-+ (= (length l) (length preds))
-+ (all-true? (map (lambda (pred elm) (pred elm)) preds l)))
-+)
-+
-+; Remove duplicates from unsorted list L.
-+; KEY-GENERATOR is a lambda that takes a list element as input and returns
-+; an equal? key to use to determine duplicates.
-+; The first instance in a set of duplicates is always used.
-+; This is not intended to be applied to large lists with an expected large
-+; result (where sorting the list first would be faster), though one could
-+; add such support later.
-+;
-+; ??? Rename to follow memq/memv/member naming convention.
-+
-+(define (nub l key-generator)
-+ (let loop ((l l) (keys (map key-generator l)) (result nil))
-+ (if (null? l)
-+ (reverse! (map cdr result))
-+ (if (assv (car keys) result)
-+ (loop (cdr l) (cdr keys) result)
-+ (loop (cdr l) (cdr keys) (acons (car keys) (car l)
-+ result)))))
-+)
-+
-+; Return a boolean indicating if list L1 is a subset of L2.
-+; Uses memq.
-+
-+(define (subset? l1 l2)
-+ (let loop ((l1 l1))
-+ (if (null? l1)
-+ #t
-+ (if (memq (car l1) l2)
-+ (loop (cdr l1))
-+ #f)))
-+)
-+
-+; Return intersection of two lists.
-+
-+(define (intersection a b)
-+ (foldl (lambda (l e) (if (memq e a) (cons e l) l)) '() b))
-+
-+; Return #t if the intersection of A and B is non-null.
-+
-+(define (non-null-intersection? a b)
-+ (let loop ((todo a))
-+ (cond ((null? todo)
-+ #f)
-+ ((memq (car todo) b)
-+ #t)
-+ (else
-+ (loop (cdr todo)))))
-+)
-+
-+; Return union of two lists.
-+
-+(define (union a b)
-+ (foldl (lambda (l e) (if (memq e l) l (cons e l))) a b))
-+
-+; Return a count of the number of elements of list L1 that are in list L2.
-+; Uses memq.
-+
-+(define (count-common l1 l2)
-+ (let loop ((result 0) (l1 l1))
-+ (if (null? l1)
-+ result
-+ (if (memq (car l1) l2)
-+ (loop (+ result 1) (cdr l1))
-+ (loop result (cdr l1)))))
-+)
-+
-+; Remove duplicate elements from sorted alist L.
-+; L must be sorted by name.
-+
-+(define (alist-nub l)
-+ (let loop ((l l) (result nil))
-+ (cond ((null? l) (reverse! result))
-+ ((null? result) (loop (cdr l) (cons (car l) result)))
-+ ((eq? (caar l) (caar result)) (loop (cdr l) result))
-+ (else (loop (cdr l) (cons (car l) result)))
-+ )
-+ )
-+)
-+
-+; Return a copy of alist L.
-+
-+(define (alist-copy l)
-+ ; (map cons (map car l) (map cdr l)) ; simple way
-+ ; presumably more efficient way (less cons cells created)
-+ (map (lambda (elm)
-+ (cons (car elm) (cdr elm)))
-+ l)
-+)
-+
-+; Return the order in which to select elements of L sorted by SORT-FN.
-+; The result is origin 0.
-+
-+(define (sort-grade l sort-fn)
-+ (let ((sorted (sort (map cons (iota (length l)) l)
-+ (lambda (a b) (sort-fn (cdr a) (cdr b))))))
-+ (map car sorted))
-+)
-+
-+; Return ALIST sorted on the name in ascending order.
-+
-+(define (alist-sort alist)
-+ (sort alist
-+ (lambda (a b)
-+ (string<? (symbol->string (car a))
-+ (symbol->string (car b)))))
-+)
-+
-+; Return a boolean indicating if C is a leading id char.
-+; '@' is treated as an id-char as it's used to delimit something that
-+; sed will alter.
-+
-+(define (leading-id-char? c)
-+ (or (char-alphabetic? c)
-+ (char=? c #\_)
-+ (char=? c #\@))
-+)
-+
-+; Return a boolean indicating if C is an id char.
-+; '@' is treated as an id-char as it's used to delimit something that
-+; sed will alter.
-+
-+(define (id-char? c)
-+ (or (leading-id-char? c)
-+ (char-numeric? c))
-+)
-+
-+; Return the length of the identifier that begins S.
-+; Identifiers are any of letter, digit, _, @.
-+; The first character must not be a digit.
-+; ??? The convention is to use "-" between cgen symbols, not "_".
-+; Try to handle "-" here as well.
-+
-+(define (id-len s)
-+ (if (leading-id-char? (string-ref s 0))
-+ (let ((len (string-length s)))
-+ (let loop ((n 0))
-+ (if (and (< n len)
-+ (id-char? (string-ref s n)))
-+ (loop (1+ n))
-+ n)))
-+ 0)
-+)
-+
-+; Return number of characters in STRING until DELIMITER.
-+; Returns #f if DELIMITER not present.
-+; FIXME: Doesn't yet support \-prefixed delimiter (doesn't terminate scan).
-+
-+(define (chars-until-delimiter string delimiter)
-+ (let loop ((str string) (result 0))
-+ (cond ((= (string-length str) 0)
-+ #f)
-+ ((char=? (string-ref str 0) delimiter)
-+ result)
-+ (else (loop (string-drop1 str) (1+ result)))))
-+)
-+
-+; Apply FN to each char of STR.
-+
-+(define (map-over-string fn str)
-+ (do ((tmp (string-copy (if (symbol? str) (symbol->string str) str)))
-+ (i (- (string-length str) 1) (- i 1)))
-+ ((< i 0) tmp)
-+ (string-set! tmp i (fn (string-ref tmp i)))
-+ )
-+)
-+
-+; Return a range.
-+; It must be distinguishable from a list of numbers.
-+
-+(define (minmax min max) (cons min max))
-+
-+; Move VALUE of LENGTH bits to position START in a word of SIZE bits.
-+; LSB0? is non-#f if bit numbering goes LSB->MSB.
-+; Otherwise it goes MSB->LSB.
-+; START-LSB? is non-#f if START denotes the least significant bit.
-+; Otherwise START denotes the most significant bit.
-+; N is assumed to fit in the field.
-+
-+(define (word-value start length size lsb0? start-lsb? value)
-+ (if lsb0?
-+ (if start-lsb?
-+ (logsll value start)
-+ (logsll value (+ (- start length) 1)))
-+ (if start-lsb?
-+ (logsll value (- size start 1))
-+ (logsll value (- size (+ start length)))))
-+)
-+
-+; Return a bit mask of LENGTH bits in a word of SIZE bits starting at START.
-+; LSB0? is non-#f if bit numbering goes LSB->MSB.
-+; Otherwise it goes MSB->LSB.
-+; START-LSB? is non-#f if START denotes the least significant bit.
-+; Otherwise START denotes the most significant bit.
-+
-+(define (word-mask start length size lsb0? start-lsb?)
-+ (if lsb0?
-+ (if start-lsb?
-+ (logsll (mask length) start)
-+ (logsll (mask length) (+ (- start length) 1)))
-+ (if start-lsb?
-+ (logsll (mask length) (- size start 1))
-+ (logsll (mask length) (- size (+ start length)))))
-+)
-+
-+; Extract LENGTH bits at bit number START in a word of SIZE bits from VALUE.
-+; LSB0? is non-#f if bit numbering goes LSB->MSB.
-+; Otherwise it goes MSB->LSB.
-+; START-LSB? is non-#f if START denotes the least significant bit.
-+; Otherwise START denotes the most significant bit.
-+;
-+; ??? bit-extract takes a big-number argument but still uses logand
-+; which doesn't so we don't use it
-+
-+(define (word-extract start length size lsb0? start-lsb? value)
-+ (if lsb0?
-+ (if start-lsb?
-+ (remainder (logslr value start) (integer-expt 2 length))
-+ (remainder (logslr value (+ (- start length) 1)) (integer-expt 2 length)))
-+ (if start-lsb?
-+ (remainder (logslr value (- size start 1)) (integer-expt 2 length))
-+ (remainder (logslr value (- size (+ start length))) (integer-expt 2 length))))
-+)
-+
-+; Return numeric value of bit N in a word of size WORD-BITSIZE.
-+
-+(define (word-bit-value bitnum word-bitsize lsb0?)
-+ (assert (< bitnum word-bitsize))
-+ (if lsb0?
-+ (ash 1 bitnum)
-+ (ash 1 (- word-bitsize bitnum 1)))
-+)
-+
-+; Return a bit mask of size SIZE beginning at the LSB.
-+
-+(define (mask size)
-+ (- (logsll 1 size) 1)
-+)
-+
-+; Split VAL into pieces of bit size LENGTHS.
-+; e.g. (split-bits '(8 2) 997) -> (229 3)
-+; There are as many elements in the result as there are in LENGTHS.
-+; Note that this can result in a loss of information.
-+
-+(define (split-bits lengths val)
-+ (letrec ((split1
-+ (lambda (lengths val result)
-+ (if (null? lengths)
-+ result
-+ (split1 (cdr lengths)
-+ (quotient val (integer-expt 2 (car lengths)))
-+ (cons (remainder val (integer-expt 2 (car lengths)))
-+ result))))))
-+ (reverse! (split1 lengths val nil)))
-+)
-+
-+; Generalized version of split-bits.
-+; e.g. (split-value '(10 10 10) 1234) -> (4 3 2 1) ; ??? -> (1 2 3 4) ?
-+; (split-value '(10 10) 1234) -> (4 3)
-+; There are as many elements in the result as there are in BASES.
-+; Note that this can result in a loss of information.
-+
-+(define (split-value bases val)
-+ (letrec ((split1
-+ (lambda (bases val result)
-+ (if (null? bases)
-+ result
-+ (split1 (cdr bases)
-+ (quotient val (car bases))
-+ (cons (remainder val (car bases))
-+ result))))))
-+ (reverse! (split1 bases val nil)))
-+)
-+
-+; Convert bits to bytes.
-+
-+(define (bits->bytes bits) (quotient (+ 7 bits) 8))
-+
-+; Convert bytes to bits.
-+
-+(define (bytes->bits bytes) (* bytes 8))
-+
-+; Return a list of integers.
-+; Usage:
-+; (.iota count) ; start=0, incr=1
-+; (.iota count start) ; incr=1
-+; (.iota count start incr)
-+
-+(define (iota count . start-incr)
-+ (if (> (length start-incr) 2)
-+ (error "iota: wrong number of arguments:" start-incr))
-+ (if (< count 0)
-+ (error "iota: count must be non-negative:" n))
-+ (let ((start (if (pair? start-incr) (car start-incr) 0))
-+ (incr (if (= (length start-incr) 2) (cadr start-incr) 1)))
-+ (let loop ((i start) (count count) (result '()))
-+ (if (= count 0)
-+ (reverse! result)
-+ (loop (+ i incr) (- count 1) (cons i result)))))
-+)
-+
-+; Return a list of the first N powers of 2.
-+
-+(define (powers-of-2 n)
-+ (cond ((= n 0) nil)
-+ (else (cons (integer-expt 2 (1- n)) (powers-of-2 (1- n))))
-+ )
-+ ; Another way: (map (lambda (n) (ash 1 n)) (iota n))
-+)
-+
-+; I'm tired of writing (not (= foo bar)).
-+
-+(define (!= a b) (not (= a b)))
-+
-+; Return #t if BIT-NUM (which is starting from LSB), is set in the binary
-+; representation of non-negative integer N.
-+
-+(define (bit-set? n bit-num)
-+ ; ??? Quick hack to work around missing bignum support.
-+ ;(= 1 (cg-logand (logslr n bit-num) 1))
-+ (if (>= n #x20000000)
-+ (if (>= bit-num 16)
-+ (logbit? (- bit-num 16) (logslr n 16))
-+ (logbit? bit-num (remainder n 65536)))
-+ (logbit? bit-num n))
-+)
-+
-+; Return #t if each element of bools is #t. Since Scheme considers any
-+; non-#f value as #t we do too.
-+; (all-true? '()) is #t since that is the identity element.
-+
-+(define (all-true? bools)
-+ (cond ((null? bools) #t)
-+ ((car bools) (all-true? (cdr bools)))
-+ (else #f))
-+)
-+
-+; Return #t if any element of BOOLS is #t.
-+; If BOOLS is empty, return #f.
-+
-+(define (any-true? bools)
-+ (cond ((null? bools) #f)
-+ ((car bools) #t)
-+ (else (any-true? (cdr bools))))
-+)
-+
-+; Return count of true values.
-+
-+(define (count-true flags)
-+ (let loop ((result 0) (flags flags))
-+ (if (null? flags)
-+ result
-+ (loop (+ result (if (car flags) 1 0))
-+ (cdr flags))))
-+)
-+
-+; Return count of all ones in BITS.
-+
-+(define (count-bits bits)
-+ (let loop ((result 0) (bits bits))
-+ (if (= bits 0)
-+ result
-+ (loop (+ result (remainder bits 2)) (quotient bits 2))))
-+)
-+
-+; Convert bits in N #f/#t.
-+; LENGTH is the length of N in bits.
-+
-+(define (bits->bools n length)
-+ (do ((result (make-list length #f))
-+ (i 0 (+ i 1)))
-+ ((= i length) (reverse! result))
-+ (list-set! result i (if (bit-set? n i) #t #f))
-+ )
-+)
-+
-+; Print a C integer.
-+
-+(define (gen-integer val)
-+ (cond ((and (<= #x-80000000 val) (> #x80000000 val))
-+ (number->string val))
-+ ((and (<= #x80000000 val) (>= #xffffffff val))
-+ ; ??? GCC complains if not affixed with "U" but that's not k&r.
-+ ;(string-append (number->string val) "U"))
-+ (string-append "0x" (number->string val 16)))
-+ (else (error "Number too large for gen-integer:" val)))
-+)
-+
-+; Return higher/lower part of double word integer.
-+
-+(define (high-part val)
-+ (logslr val 32)
-+)
-+(define (low-part val)
-+ (remainder val #x100000000)
-+)
-+
-+; Logical operations.
-+
-+(define (logslr val shift) (ash val (- shift)))
-+(define logsll ash) ; (logsll val shift) (ash val shift))
-+
-+; logand, logior, logxor defined by guile so we don't need to
-+; (define (logand a b) ...)
-+; (define (logxor a b) ...)
-+; (define (logior a b) ...)
-+;
-+; On the other hand they didn't support bignums, so the cgen-binary
-+; defines cg-log* that does. These are just a quick hack that only
-+; handle what currently needs handling.
-+
-+(define (cg-logand a b)
-+ (if (or (>= a #x20000000)
-+ (>= b #x20000000))
-+ (+ (logsll (logand (logslr a 16) (logslr b 16)) 16)
-+ (logand (remainder a 65536) (remainder b 65536)))
-+ (logand a b))
-+)
-+
-+(define (cg-logxor a b)
-+ (if (or (>= a #x20000000)
-+ (>= b #x20000000))
-+ (+ (logsll (logxor (logslr a 16) (logslr b 16)) 16)
-+ (logxor (remainder a 65536) (remainder b 65536)))
-+ (logxor a b))
-+)
-+
-+; Return list of bit values for the 1's in X.
-+
-+(define (bit-vals x)
-+ (let loop ((result nil) (mask 65536))
-+ (cond ((= mask 0) result)
-+ ((> (logand x mask) 0) (loop (cons mask result) (logslr mask 1)))
-+ (else (loop result (logslr mask 1)))))
-+)
-+
-+; Return bit representation of N in LEN bits.
-+; e.g. (bit-rep 6 3) -> (1 1 0)
-+
-+(define (bit-rep n len)
-+ (cond ((= len 0) nil)
-+ ((> (logand n (logsll 1 (- len 1))) 0)
-+ (cons 1 (bit-rep n (- len 1))))
-+ (else (cons 0 (bit-rep n (- len 1))))))
-+
-+; Return list of all bit values from 0 to N.
-+; e.g. (bit-patterns 3) -> ((0 0 0) (0 0 1) (0 1 0) ... (1 1 1))
-+
-+(define (bit-patterns len)
-+ (map (lambda (x) (bit-rep x len)) (iota (logsll 1 len)))
-+)
-+
-+; Compute the list of all indices from bits missing in MASK.
-+; e.g. (missing-bit-indices #xff00 #xffff) -> (0 1 2 3 ... 255)
-+
-+(define (missing-bit-indices mask full-mask)
-+ (let* ((bitvals (bit-vals (logxor mask full-mask)))
-+ (selectors (bit-patterns (length bitvals)))
-+ (map-star (lambda (sel) (map * sel bitvals)))
-+ (compute-indices (lambda (sel) (apply + (map-star sel)))))
-+ (map compute-indices selectors))
-+)
-+
-+; Return #t if n is a non-negative integer.
-+
-+(define (non-negative-integer? n)
-+ (and (integer? n)
-+ (>= n 0))
-+)
-+
-+; Convert a list of numbers to a string, separated by SEP.
-+; The result is prefixed by SEP too.
-+
-+(define (numbers->string nums sep)
-+ (string-map (lambda (elm) (string-append sep (number->string elm))) nums)
-+)
-+
-+; Convert a number to a hex string.
-+
-+(define (number->hex num)
-+ (number->string num 16)
-+)
-+
-+; Convert a number to a hex C constant,
-+; taking care to handle large numbers.
-+; If NUM won't fit in a portable int (32-bits), cast it to BIG-NUM-TYPE.
-+
-+(define (gen-c-hex-constant num big-num-type)
-+ (cond ((< num (- (ash 1 31)))
-+ ;; Skip outputting -ve numbers in hex for now.
-+ (string-append "((" big-num-type ") " (number->string num) "LL)"))
-+ ((> num (- (ash 1 32) 1))
-+ (string-append "((" big-num-type ") 0x" (number->string num 16) "LL)"))
-+ (else
-+ (string-append "0x" (number->string num 16))))
-+)
-+
-+; Given a list of numbers NUMS, generate text to pass them as arguments to a
-+; C function. We assume they're not the first argument and thus have a
-+; leading comma.
-+
-+(define (gen-int-args nums)
-+ (numbers->string nums ", ")
-+)
-+
-+; Given a C expression or a list of C expressions, return a comma separated
-+; list of them.
-+; In the case of more than 0 elements the leading ", " is present so that
-+; there is no edge case in the case of 0 elements when the caller is appending
-+; the result to an initial set of arguments (the number of commas equals the
-+; number of elements). The caller is responsible for dropping the leading
-+; ", " if necessary. Note that `string-drop' can handle the case where more
-+; characters are dropped than are present.
-+
-+(define (gen-c-args exprs)
-+ (cond ((null? exprs) "")
-+ ((pair? exprs) (string-map (lambda (elm) (string-append ", " elm))
-+ exprs))
-+ ((equal? exprs "") "")
-+ (else (string-append ", " exprs)))
-+)
-+
-+; Return a list of N macro argument names.
-+
-+(define (macro-args n)
-+ (map (lambda (i) (string-append "a" (number->string i)))
-+ (map 1+ (iota n)))
-+)
-+
-+; Return C code for N macro argument names.
-+; (gen-macro-args 4) -> ", a1, a2, a3, a4"
-+
-+(define (gen-macro-args n)
-+ (gen-c-args (macro-args n))
-+)
-+
-+; Return a string to reference an array.
-+; INDICES is either a (possibly empty) list of indices or a single index.
-+; The values can either be numbers or strings (/symbols).
-+
-+(define (gen-array-ref indices)
-+ (let ((gen-index (lambda (idx)
-+ (string-append "["
-+ (cond ((number? idx) (number->string idx))
-+ (else idx))
-+ "]"))))
-+ (cond ((null? indices) "")
-+ ((pair? indices) ; list of indices?
-+ (string-map gen-index indices))
-+ (else (gen-index indices))))
-+)
-+
-+; Return list element N or #f if list L is too short.
-+
-+(define (list-maybe-ref l n)
-+ (if (> (length l) n)
-+ (list-ref l n)
-+ #f)
-+)
-+
-+; Return list of index numbers of elements in list L that satisfy PRED.
-+; I is added to each index, it's usually 0.
-+
-+(define (find-index i pred l)
-+ (define (find1 i pred l result)
-+ (cond ((null? l) result)
-+ ((pred (car l)) (find1 (+ 1 i) pred (cdr l) (cons i result)))
-+ (else (find1 (+ 1 i) pred (cdr l) result))))
-+ (reverse! (find1 i pred l nil))
-+)
-+
-+; Return index number of first element in list L that satisfy PRED.
-+; Returns #f if not present.
-+; I is added to the result, it's usually 0.
-+
-+(define (find-first-index i pred l)
-+ (cond ((null? l) #f)
-+ ((pred (car l)) i)
-+ (else (find-first-index (+ 1 i) pred (cdr l))))
-+)
-+
-+; Return list of elements of L that satisfy PRED.
-+
-+(define (find pred l)
-+ (define (find1 pred l result)
-+ (cond ((null? l) result)
-+ ((pred (car l)) (find1 pred (cdr l) (cons (car l) result)))
-+ (else (find1 pred (cdr l) result))))
-+ (reverse! (find1 pred l nil))
-+)
-+
-+; Return first element of L that satisfies PRED or #f if there is none.
-+
-+(define (find-first pred l)
-+ (cond ((null? l) #f)
-+ ((pred (car l)) (car l))
-+ (else (find-first pred (cdr l))))
-+)
-+
-+; Return list of FN applied to elements of L that satisfy PRED.
-+
-+(define (find-apply fn pred l)
-+ (cond ((null? l) nil)
-+ ((pred (car l)) (cons (fn (car l)) (find-apply fn pred (cdr l))))
-+ (else (find-apply fn pred (cdr l))))
-+)
-+
-+; Given a list L, look up element ELM and return its index.
-+; If not found, return #f.
-+; I is added to the result.
-+; (Yes, in one sense I is present to simplify the implementation. Sue me.)
-+
-+(define (eqv-lookup-index elm l i)
-+ (cond ((null? l) #f)
-+ ((eqv? elm (car l)) i)
-+ (else (eqv-lookup-index elm (cdr l) (1+ i))))
-+)
-+
-+; Given an associative list L, look up entry for symbol S and return its index.
-+; If not found, return #f.
-+; Eg: (lookup 'element2 '((element1 1) (element2 2)))
-+; I is added to the result.
-+; (Yes, in one sense I is present to simplify the implementation. Sue me.)
-+; NOTE: Uses eq? for comparisons.
-+
-+(define (assq-lookup-index s l i)
-+ (cond ((null? l) #f)
-+ ((eqv? s (caar l)) i)
-+ (else (assq-lookup-index s (cdr l) (1+ i))))
-+)
-+
-+; Return the index of element ELM in list L or #f if not found.
-+; If found, I is added to the result.
-+; (Yes, in one sense I is present to simplify the implementation. Sue me.)
-+; NOTE: Uses equal? for comparisons.
-+
-+(define (element-lookup-index elm l i)
-+ (cond ((null? l) #f)
-+ ((equal? elm (car l)) i)
-+ (else (element-lookup-index elm (cdr l) (1+ i))))
-+)
-+
-+; Return #t if ELM is in ELM-LIST.
-+; NOTE: Uses equal? for comparisons (via `member').
-+
-+(define (element? elm elm-list)
-+ (->bool (member elm elm-list))
-+)
-+
-+; Return the set of all possible combinations of elements in list L
-+; according to the following rules:
-+; - each element of L is either an atom (non-list) or a list
-+; - each list element is (recursively) interpreted as a set of choices
-+; - the result is a list of all possible combinations of elements
-+;
-+; Example: (list-expand '(a b (1 2 (3 4)) c (5 6)))
-+; --> ((a b 1 c d 5)
-+; (a b 1 c d 6)
-+; (a b 2 c d 5)
-+; (a b 2 c d 6)
-+; (a b 3 c d 5)
-+; (a b 3 c d 6)
-+; (a b 4 c d 5)
-+; (a b 4 c d 6))
-+
-+(define (list-expand l)
-+ (error "wip")
-+)
-+
-+; If OBJ has a dump method call it, otherwise return OBJ untouched.
-+
-+(define (dump obj)
-+ (if (method-present? obj 'dump)
-+ (send obj 'dump)
-+ obj)
-+)
-+
-+; Copyright messages.
-+
-+; Pair of header,trailer parts of copyright.
-+
-+(define copyright-fsf
-+ (cons "\
-+THIS FILE IS MACHINE GENERATED WITH CGEN.
-+
-+Copyright 1996-2010 Free Software Foundation, Inc.
-+"
-+ "\
-+ This file is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 3, or (at your option)
-+ any later version.
-+
-+ It is distributed in the hope that it will be useful, but WITHOUT
-+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
-+ License for more details.
-+
-+ You should have received a copy of the GNU General Public License along
-+ with this program; if not, write to the Free Software Foundation, Inc.,
-+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
-+"
-+))
-+
-+; Pair of header,trailer parts of copyright.
-+
-+(define copyright-red-hat
-+ (cons "\
-+THIS FILE IS MACHINE GENERATED WITH CGEN.
-+
-+Copyright (C) 2000-2010 Red Hat, Inc.
-+"
-+ "\
-+"))
-+
-+; Set this to one of copyright-fsf, copyright-red-hat.
-+
-+(define CURRENT-COPYRIGHT copyright-fsf)
-+
-+; Packages.
-+
-+(define package-gnu-binutils-gdb "\
-+This file is part of the GNU Binutils and/or GDB, the GNU debugger.
-+")
-+
-+(define package-gnu-simulators "\
-+This file is part of the GNU simulators.
-+")
-+
-+(define package-red-hat-simulators "\
-+This file is part of the Red Hat simulators.
-+")
-+
-+(define package-cgen "\
-+This file is part of CGEN.
-+")
-+
-+; Return COPYRIGHT, with FILE-DESC as the first line
-+; and PACKAGE as the name of the package which the file belongs in.
-+; COPYRIGHT is a pair of (header . trailer).
-+
-+(define (gen-c-copyright file-desc copyright package)
-+ (string-append "/* " file-desc "\n\n"
-+ (car copyright)
-+ "\n" package "\n"
-+ (cdr copyright)
-+ "\n*/\n\n")
-+)
-+
-+; File operations.
-+
-+; Delete FILE, handling the case where it doesn't exist.
-+
-+(define (delete-file-noerr file)
-+ ; This could also use file-exists?, but it's nice to have a few examples
-+ ; of how to use `catch' lying around.
-+ (catch 'system-error (lambda () (delete-file file))
-+ (lambda args #f))
-+)
-+
-+; Create FILE, point current-output-port to it, and call WRITE-FN.
-+; FILE is always overwritten.
-+; GEN-FN either writes output to stdout or returns the text to write,
-+; the last thing we do is write the text returned by WRITE-FN to FILE.
-+
-+(define (file-write file write-fn)
-+ (delete-file-noerr file)
-+ (let ((left-over-text (with-output-to-file file write-fn)))
-+ (let ((port (open-file file "a")))
-+ (display left-over-text port)
-+ (close-port port))
-+ #t)
-+)
-+
-+; Return the size in bytes of FILE.
-+
-+(define (file-size file)
-+ (let ((stat (%stat file)))
-+ (if stat
-+ (vector-ref (%stat file) 7)
-+ -1))
-+)
-+
-+; Time operations.
-+
-+; Return the current time.
-+; The result is a black box understood only by time-elapsed.
-+
-+(define (time-current) (gettimeofday))
-+
-+; Return the elapsed time in milliseconds since START.
-+
-+(define (time-elapsed start)
-+ (let ((now (gettimeofday)))
-+ (+ (* (- (car now) (car start)) 1000)
-+ (quotient (- (cdr now) (cdr start)) 1000)))
-+)
-+
-+; Run PROC and return the number of milliseconds it took to execute it N times.
-+
-+(define (time-proc n proc)
-+ (let ((now (time-current)))
-+ (do ((i 0 (+ i 1))) ((= i n) (time-elapsed now))
-+ (proc)))
-+)
-+
-+;; Debugging repls.
-+
-+; Record of arguments passed to debug-repl, so they can be accessed in
-+; the repl loop.
-+
-+(define debug-env #f)
-+
-+; Return list of recorded variables for debugging.
-+
-+(define (debug-var-names) (map car debug-env))
-+
-+; Return value of recorded var NAME.
-+
-+(define (debug-var name) (assq-ref debug-env name))
-+
-+; A handle on /dev/tty, so we can be sure we're talking with the user.
-+; We open this the first time we actually need it.
-+
-+(define debug-tty #f)
-+
-+; Return the port we should use for interacting with the user,
-+; opening it if necessary.
-+
-+(define (debug-tty-port)
-+ (if (not debug-tty)
-+ (set! debug-tty (open-file "/dev/tty" "r+")))
-+ debug-tty)
-+
-+; Enter a repl loop for debugging purposes.
-+; Use (quit) to exit cgen completely.
-+; Use (debug-quit) or (quit 0) to exit the debugging session and
-+; resume argument processing.
-+;
-+; ENV-ALIST can be anything, but it is intended to be an alist of values
-+; the caller will want to be able to access in the repl loop.
-+; It is stored in global `debug-env'.
-+
-+(define (debug-repl env-alist)
-+ (with-input-and-output-to
-+ (debug-tty-port)
-+ (lambda ()
-+ (set! debug-env env-alist)
-+ (let loop ()
-+ (let ((rc (top-repl)))
-+ (if (null? rc)
-+ (quit 1)) ; indicate error to `make'
-+ (if (not (equal? rc '(0)))
-+ (loop))))))
-+)
-+
-+; Utility for debug-repl.
-+
-+(define (debug-quit)
-+ ; Keep around for later debugging.
-+ ;(set! debug-env #f)
-+
-+ (quit 0)
-+)
-+
-+; Macro to simplify calling debug-repl.
-+; Usage: (debug-repl-env var-name1 var-name2 ...)
-+;
-+; This is for debugging cgen itself, and is inserted into code at the point
-+; where one wants to start a repl.
-+
-+(defmacro debug-repl-env var-names
-+ (let ((env (map (lambda (var-name)
-+ (list 'cons (list 'quote var-name) var-name))
-+ var-names)))
-+ (list 'debug-repl (cons 'list env)))
-+)
-diff -Nur binutils-2.24.orig/cgen/utils-sim.scm binutils-2.24/cgen/utils-sim.scm
---- binutils-2.24.orig/cgen/utils-sim.scm 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/cgen/utils-sim.scm 2016-06-30 21:26:12.681894201 +0200
-@@ -0,0 +1,1111 @@
-+; Generic simulator application utilities.
-+; Copyright (C) 2000, 2005, 2006, 2009, 2010 Red Hat, Inc.
-+; This file is part of CGEN.
-+; See file COPYING.CGEN for details.
-+
-+; The cache-addr? method.
-+; Return #t if the hardware element's address is stored in the scache buffer.
-+; This saves doing the index calculation during semantic processing.
-+
-+(method-make!
-+ <hardware-base> 'cache-addr?
-+ (lambda (self)
-+ (and (with-scache?)
-+ (has-attr? self 'CACHE-ADDR)))
-+)
-+
-+(define (hw-cache-addr? hw) (send hw 'cache-addr?))
-+
-+; The needed-iflds method.
-+; Return list of ifields needed during semantic execution by hardware element
-+; SELF referenced by <operand> OP in <sformat> SFMT.
-+
-+(method-make!
-+ <hardware-base> 'needed-iflds
-+ (lambda (self op sfmt)
-+ (list (op-ifield op)))
-+)
-+
-+(method-make!
-+ <hw-register> 'needed-iflds
-+ (lambda (self op sfmt)
-+ (list (op-ifield op)))
-+; Instead of the following, we now arrange to store the ifield in the
-+; argbuf, even for CACHE-ADDR operands. This way, the ifield values
-+; (register numbers, etc.) remain available during semantics tracing.
-+; (if (hw-cache-addr? self)
-+; nil
-+; (list (op-ifield op))))
-+)
-+
-+; For addresses this is none because we make our own copy of the ifield
-+; [because we want to use a special type].
-+
-+(method-make!
-+ <hw-address> 'needed-iflds
-+ (lambda (self op sfmt)
-+ nil)
-+)
-+
-+(define (hw-needed-iflds hw op sfmt) (send hw 'needed-iflds op sfmt))
-+
-+; Return a list of ifields of <operand> OP that must be recorded in ARGBUF
-+; for <sformat> SFMT.
-+; ??? At the moment there can only be at most one, but callers must not
-+; assume this.
-+
-+(define (op-needed-iflds op sfmt)
-+ (let ((indx (op:index op)))
-+ (logit 4 "op-needed-iflds op=" (obj:name op) " indx=" (obj:name indx)
-+ " indx-type=" (hw-index:type indx) " sfmt=" (obj:name sfmt) "\n")
-+ (cond
-+ ((and
-+ (eq? (hw-index:type indx) 'ifield)
-+ (not (= (ifld-length (hw-index:value indx)) 0)))
-+ (hw-needed-iflds (op:type op) op sfmt))
-+ ((eq? (hw-index:type indx) 'derived-ifield)
-+ (ifld-needed-iflds indx))
-+ (else nil)))
-+ )
-+
-+; Operand extraction (ARGBUF) support code.
-+;
-+; Any operand that uses a non-empty ifield needs extraction support.
-+; Normally we just record the ifield's value. However, in cases where
-+; hardware elements have CACHE-ADDR specified or where the mode of the
-+; hardware index isn't compatible with the mode of the decoded ifield
-+; (this can happen for pc-relative instruction address), we need to record
-+; something else.
-+
-+; Return a boolean indicating if <operand> OP needs any extraction processing.
-+
-+(define (op-extract? op)
-+ (let* ((indx (op:index op))
-+ (extract?
-+ (if (derived-operand? op)
-+ (any-true? (map op-extract? (derived-args op)))
-+ (and (eq? (hw-index:type indx) 'ifield)
-+ (not (= (ifld-length (hw-index:value indx)) 0))))))
-+ (logit 4 "op-extract? op=" (obj:name op) " =>" extract? "\n")
-+ extract?)
-+)
-+
-+; Return a list of operands that need special extraction processing.
-+; SFMT is an <sformat> object.
-+
-+(define (sfmt-extracted-operands sfmt)
-+ (let ((in-ops (sfmt-in-ops sfmt))
-+ (out-ops (sfmt-out-ops sfmt)))
-+ (let ((ops (append (find op-extract? in-ops)
-+ (find op-extract? out-ops))))
-+ (nub ops obj:name)))
-+)
-+
-+; Return a list of ifields that are needed by the semantic code.
-+; SFMT is an <sformat> object.
-+; ??? This redoes a lot of the calculation that sfmt-extracted-operands does.
-+
-+(define (sfmt-needed-iflds sfmt)
-+ (let ((in-ops (sfmt-in-ops sfmt))
-+ (out-ops (sfmt-out-ops sfmt)))
-+ (let ((ops (append (find op-extract? in-ops)
-+ (find op-extract? out-ops))))
-+ (nub (apply append (map (lambda (op)
-+ (op-needed-iflds op sfmt))
-+ ops))
-+ obj:name)))
-+)
-+
-+; Sformat argument buffer.
-+;
-+; This contains the details needed to create an argument buffer `fields' union
-+; entry for the containing sformats.
-+
-+(define <sformat-argbuf>
-+ (class-make '<sformat-argbuf>
-+ '(<ident>)
-+ ; From <ident>:
-+ ; - NAME is derived from one of the containing sformats.
-+ '(
-+ ; List of structure elements.
-+ ; Each element is ("var name" "C type" bitsize).
-+ ; The list is sorted by decreasing size, then C type,
-+ ; then var name.
-+ elms
-+ )
-+ nil)
-+)
-+
-+(define-getters <sformat-argbuf> sbuf (sfmts elms))
-+
-+; Subroutine of /sfmt-contents to return an ifield element.
-+; The result is ("var-name" "C-type" bitsize).
-+
-+(define (/sfmt-ifld-elm f sfmt)
-+ (let ((real-mode (mode-real-mode (ifld-decode-mode f))))
-+ (list (gen-sym f)
-+ (mode:c-type real-mode)
-+ (mode:bits real-mode)))
-+)
-+
-+; sbuf-elm method.
-+; The result is ("var-name" "C-type" approx-bitsize) or #f if unneeded.
-+; For the default case we use the ifield as is, which is computed elsewhere.
-+
-+(method-make!
-+ <hardware-base> 'sbuf-elm
-+ (lambda (self op ifmt)
-+ #f)
-+)
-+
-+(method-make!
-+ <hw-register> 'sbuf-elm
-+ (lambda (self op ifmt)
-+ (if (hw-cache-addr? self)
-+ (list (gen-sym (op:index op))
-+ (string-append (gen-type self) "*")
-+ ; Use 64 bits for size. Doesn't really matter, just put them
-+ ; near the front.
-+ 64)
-+ #f))
-+)
-+
-+; We want to use ADDR/IADDR in ARGBUF for addresses
-+
-+(method-make!
-+ <hw-address> 'sbuf-elm
-+ (lambda (self op ifmt)
-+ (list (gen-sym (op:index op))
-+ "ADDR"
-+ ; Use 64 bits for size. Doesn't really matter, just put them
-+ ; near the front.
-+ 64))
-+)
-+
-+(method-make!
-+ <hw-iaddress> 'sbuf-elm
-+ (lambda (self op ifmt)
-+ (list (gen-sym (op:index op))
-+ "IADDR"
-+ ; Use 64 bits for size. Doesn't really matter, just put them
-+ ; near the front.
-+ 64))
-+)
-+
-+; Subroutine of /sfmt-contents to return an operand element.
-+; These are in addition (or instead of) the actual ifields.
-+; This is also used to compute definitions of local vars needed in the
-+; !with-scache case.
-+; The result is ("var-name" "C-type" approx-bitsize) or #f if unneeded.
-+
-+(define (sfmt-op-sbuf-elm op sfmt)
-+ (send (op:type op) 'sbuf-elm op sfmt)
-+)
-+
-+; Subroutine of compute-sformat-bufs! to compute list of structure elements
-+; needed by <sformat> SFMT.
-+; The result is
-+; (SFMT ("var-name1" "C-type1" size1) ("var-name2" "C-type2" size2) ...)
-+; and is sorted by decreasing size, then C type, then variable name
-+; (as <sformat-argbuf> wants it).
-+
-+(define (/sfmt-contents sfmt)
-+ (let ((needed-iflds (sfmt-needed-iflds sfmt))
-+ (extracted-ops (sfmt-extracted-operands sfmt))
-+ (in-ops (sfmt-in-ops sfmt))
-+ (out-ops (sfmt-out-ops sfmt))
-+ (sort-elms (lambda (a b)
-+ ; Sort by descending size, then ascending C type name,
-+ ; then ascending name.
-+ (cond ((> (caddr a) (caddr b))
-+ #t)
-+ ((= (caddr a) (caddr b))
-+ (cond ((string<? (cadr a) (cadr b))
-+ #t)
-+ ((string=? (cadr a) (cadr b))
-+ (string<? (car a) (car b)))
-+ (else
-+ #f)))
-+ (else
-+ #f))))
-+ )
-+ (logit 4
-+ "/sfmt-contents sfmt=" (obj:name sfmt)
-+ " needed-iflds=" (obj-csv-names needed-iflds)
-+ " extracted-ops=" (obj-csv-names extracted-ops)
-+ " in-ops=" (obj-csv-names in-ops)
-+ " out-ops=" (obj-csv-names out-ops)
-+ "\n")
-+ (cons sfmt
-+ (sort
-+ ; Compute list of all things we need to record at extraction time.
-+ (find (lambda (x)
-+ ; Discard #f entries, they indicate "unneeded".
-+ x)
-+ (append
-+ (map (lambda (f)
-+ (/sfmt-ifld-elm f sfmt))
-+ needed-iflds)
-+ (map (lambda (op)
-+ (sfmt-op-sbuf-elm op sfmt))
-+ extracted-ops)
-+ (cond ((with-any-profile?)
-+ (append
-+ ; Profiling support. ??? This stuff is in flux.
-+ (map (lambda (op)
-+ (sfmt-op-profile-elm op sfmt #f))
-+ (find op-profilable? in-ops))
-+ (map (lambda (op)
-+ (sfmt-op-profile-elm op sfmt #t))
-+ (find op-profilable? out-ops))))
-+ (else
-+ (append)))))
-+ sort-elms)))
-+)
-+
-+; Return #t if ELM-LIST is a subset of SBUF.
-+; SBUF is an <sformat-argbuf> object.
-+
-+(define (/sbuf-subset? elm-list sbuf)
-+ ; We take advantage of the fact that elements in each are already sorted.
-+ ; FIXME: Can speed up.
-+ (let loop ((elm-list elm-list) (sbuf-elm-list (sbuf-elms sbuf)))
-+ (cond ((null? elm-list)
-+ #t)
-+ ((null? sbuf-elm-list)
-+ #f)
-+ ((equal? (car elm-list) (car sbuf-elm-list))
-+ (loop (cdr elm-list) (cdr sbuf-elm-list)))
-+ (else
-+ (loop elm-list (cdr sbuf-elm-list)))))
-+)
-+
-+; Subroutine of compute-sformat-bufs!.
-+; Lookup ELM-LIST in SBUF-LIST. A match is found if ELM-LIST
-+; is a subset of one in SBUF-LIST.
-+; Return the containing <sformat-argbuf> object if found, otherwise return #f.
-+; SBUF-LIST is a list of <sformat-argbuf> objects.
-+; ELM-LIST is (elm1 elm2 ...).
-+
-+(define (/sbuf-lookup elm-list sbuf-list)
-+ (let loop ((sbuf-list sbuf-list))
-+ (cond ((null? sbuf-list)
-+ #f)
-+ ((/sbuf-subset? elm-list (car sbuf-list))
-+ (car sbuf-list))
-+ (else
-+ (loop (cdr sbuf-list)))))
-+)
-+
-+; Compute and record the set of <sformat-argbuf> objects needed for SFMT-LIST,
-+; a list of all sformats.
-+; The result is the computed list of <sformat-argbuf> objects.
-+;
-+; This is used to further reduce the number of entries in the argument buffer's
-+; `fields' union. Some sformats have structs with the same contents or one is
-+; a subset of another's, thus there is no need to distinguish them as far as
-+; the struct is concerned (there may be other reasons to distinguish them of
-+; course).
-+; The consequence of this is fewer semantic fragments created in with-sem-frags
-+; pbb engines.
-+
-+(define (compute-sformat-argbufs! sfmt-list)
-+ (logit 1 "Computing sformat argument buffers ...\n")
-+
-+ (let ((sfmt-contents
-+ ; Sort by descending length. This helps building the result: while
-+ ; iterating over each element, its sbuf is either a subset of a
-+ ; previous entry or requires a new entry.
-+ (sort (map /sfmt-contents sfmt-list)
-+ (lambda (a b)
-+ (> (length a) (length b)))))
-+ ; Build an <sformat-argbuf> object.
-+ (build-sbuf (lambda (sfmt-data)
-+ (make <sformat-argbuf>
-+ (obj:name (car sfmt-data))
-+ ""
-+ atlist-empty
-+ (cdr sfmt-data))))
-+ )
-+ ; Start off with the first sfmt.
-+ ; Also build an empty sbuf. Which sbuf to use for an empty argument list
-+ ; is rather arbitrary. Rather than pick one, keep the empty sbuf unto
-+ ; itself.
-+ (let ((nub-sbufs (list (build-sbuf (car sfmt-contents))))
-+ (empty-sbuf (make <sformat-argbuf>
-+ 'sfmt-empty "no operands" atlist-empty
-+ nil))
-+ )
-+ (sfmt-set-sbuf! (caar sfmt-contents) (car nub-sbufs))
-+
-+ ; Now loop over the remaining sfmts.
-+ (let loop ((sfmt-contents (cdr sfmt-contents)))
-+ (if (not (null? sfmt-contents))
-+ (let ((sfmt-data (car sfmt-contents)))
-+ (if (null? (cdr sfmt-data))
-+ (sfmt-set-sbuf! (car sfmt-data) empty-sbuf)
-+ (let ((sbuf (/sbuf-lookup (cdr sfmt-data) nub-sbufs)))
-+ (if (not sbuf)
-+ (begin
-+ (set! sbuf (build-sbuf sfmt-data))
-+ (set! nub-sbufs (cons sbuf nub-sbufs))))
-+ (sfmt-set-sbuf! (car sfmt-data) sbuf)))
-+ (loop (cdr sfmt-contents)))))
-+
-+ ; Done.
-+ ; Note that the result will be sorted by ascending number of elements
-+ ; (because the search list was sorted by descending length and the result
-+ ; is built up in reverse order of that).
-+ ; Not that it matters, but that's kinda nice.
-+ (cons empty-sbuf nub-sbufs)))
-+)
-+
-+; Profiling support.
-+
-+; By default hardware elements are not profilable.
-+
-+(method-make! <hardware-base> 'profilable? (lambda (self) #f))
-+
-+(method-make!
-+ <hw-register> 'profilable?
-+ (lambda (self) (has-attr? self 'PROFILE))
-+)
-+
-+; Return boolean indicating if HW is profilable.
-+
-+(define (hw-profilable? hw) (send hw 'profilable?))
-+
-+; Return a boolean indicating if OP is profilable.
-+
-+(define (op-profilable? op)
-+ (hw-profilable? (op:type op))
-+)
-+
-+; sbuf-profile-data method.
-+; Return a list of C type and size to use in an sformat's argument buffer.
-+
-+(method-make!
-+ <hardware-base> 'sbuf-profile-data
-+ (lambda (self)
-+ (error "sbuf-profile-elm not supported for this hw type"))
-+)
-+
-+(method-make!
-+ <hw-register> 'sbuf-profile-data
-+ (lambda (self)
-+ ; Don't unnecessarily bloat size of argument buffer.
-+ (if (<= (hw-num-elms self) 255)
-+ (list "unsigned char" 8)
-+ (list "unsigned short" 16)))
-+)
-+
-+; Utility to return name of variable/structure-member to use to record
-+; profiling data for SYM.
-+
-+(define (gen-profile-sym sym out?)
-+ (string-append (if out? "out_" "in_")
-+ (if (symbol? sym) (symbol->string sym) sym))
-+)
-+
-+; Return name of variable/structure-member to use to record data needed for
-+; profiling operand SELF.
-+
-+(method-make!
-+ <operand> 'sbuf-profile-sym
-+ (lambda (self out?)
-+ (gen-profile-sym (gen-sym self) out?))
-+)
-+
-+; sbuf-profile-elm method.
-+; Return the ARGBUF member needed for profiling SELF in <sformat> SFMT.
-+; The result is (var-name "C-type" approx-bitsize) or #f if unneeded.
-+
-+(method-make!
-+ <operand> 'sbuf-profile-elm
-+ (lambda (self sfmt out?)
-+ (if (hw-scalar? (op:type self))
-+ #f
-+ (cons (send self 'sbuf-profile-sym out?)
-+ (send (op:type self) 'sbuf-profile-data))))
-+)
-+
-+; Subroutine of /sfmt-contents to return an operand's profile element.
-+; The result is (var-name "C-type" approx-bitsize) or #f if unneeded.
-+
-+(define (sfmt-op-profile-elm op sfmt out?)
-+ (send op 'sbuf-profile-elm sfmt out?)
-+)
-+
-+; ARGBUF accessor support.
-+
-+; Define and undefine C macros to tuck away details of instruction format used
-+; in the extraction and semantic code. Instruction format names can
-+; change frequently and this can result in unnecessarily large diffs from one
-+; generated version of the file to the next. Secondly, tucking away details of
-+; the extracted argument structure from the extraction code is a good thing.
-+
-+; Name of macro to access fields in ARGBUF.
-+(define c-argbuf-macro "FLD")
-+
-+; NB: If sfmt is #f, then define the macro to pass through the argument
-+; symbol. This is appropriate for "simple" (non-scache) simulators
-+; that have no abuf/scache in the sem.c routines, but rather plain
-+; local variables.
-+(define (gen-define-argbuf-macro sfmt)
-+ (string-append "#define " c-argbuf-macro "(f) "
-+ (if sfmt
-+ (string-append
-+ "abuf->fields."
-+ (gen-sym (sfmt-sbuf sfmt))
-+ ".f\n")
-+ "f\n"))
-+)
-+
-+(define (gen-undef-argbuf-macro sfmt)
-+ (string-append "#undef " c-argbuf-macro "\n")
-+)
-+
-+; For old code. Delete in time.
-+(define gen-define-field-macro gen-define-argbuf-macro)
-+(define gen-undef-field-macro gen-undef-argbuf-macro)
-+
-+; Return a C reference to an ARGBUF field value.
-+
-+(define (gen-argbuf-ref name)
-+ (string-append c-argbuf-macro " (" name ")")
-+)
-+
-+; Return name of ARGBUF member for extracted <field> F.
-+
-+(define (gen-ifld-argbuf-name f)
-+ (gen-sym f)
-+)
-+
-+; Return the C reference to a cached ifield.
-+
-+(define (gen-ifld-argbuf-ref f)
-+ (gen-argbuf-ref (gen-ifld-argbuf-name f))
-+)
-+
-+; Return name of ARGBUF member holding processed from of extracted
-+; ifield value for <hw-index> index.
-+
-+(define (gen-hw-index-argbuf-name index)
-+ (gen-sym index)
-+)
-+
-+; Return C reference to a processed <hw-index> in ARGBUF.
-+
-+(define (gen-hw-index-argbuf-ref index)
-+ (gen-argbuf-ref (gen-hw-index-argbuf-name index))
-+)
-+
-+; Decode support.
-+
-+; Main procedure call tree:
-+; cgen-decode.{c,cxx}
-+; /gen-decode-fn
-+; gen-decoder [our entry point]
-+; decode-build-table
-+; /gen-decoder-switch
-+; /gen-decode-table-entry
-+; /gen-decoder-switch
-+;
-+; decode-build-table is called to construct a tree of "table-guts" elements
-+; (??? Need better name obviously),
-+; and then gen-decoder is recursively called on each of these elements.
-+
-+; Return C/C++ code that fetches the desired decode bits from C value VAL.
-+; SIZE is the size in bits of val (the MSB is 1 << (size - 1)) which we
-+; treat as bitnum 0.
-+; BITNUMS must be monotonically increasing.
-+; LSB0? is non-#f if bit number 0 is the least significant bit.
-+; FIXME: START may not be handled right in words beyond first.
-+;
-+; ENTIRE-VAL is passed as a hack for cgen 1.1 which would previously generate
-+; negative shifts. FIXME: Revisit for 1.2.
-+;
-+; e.g. (/gen-decode-bits '(0 1 2 3 8 9 10 11) 0 16 "insn" #f)
-+; --> "(((insn >> 8) & 0xf0) | ((insn >> 4) & 0xf))"
-+; FIXME: The generated code has some inefficiencies in edge cases. Later.
-+
-+(define (/gen-decode-bits bitnums start size val entire-val lsb0?)
-+
-+ ; Compute a list of lists of three numbers:
-+ ; (first bitnum in group, position in result (0=LSB), bits in result)
-+
-+ (let ((groups
-+ ; POS = starting bit position of current group.
-+ ; COUNT = number of bits in group.
-+ ; Work from least to most significant bit so reverse bitnums.
-+ (let loop ((result nil) (pos 0) (count 0) (bitnums (reverse bitnums)))
-+ ;(display (list result pos count bitnums)) (newline)
-+ (if (null? bitnums)
-+ result
-+ (if (or (= (length bitnums) 1)
-+ ; Are numbers not next to each other?
-+ (not (= (- (car bitnums) (if lsb0? -1 1))
-+ (cadr bitnums))))
-+ (loop (cons (list (car bitnums) pos (+ 1 count))
-+ result)
-+ (+ pos count 1) 0
-+ (cdr bitnums))
-+ (loop result
-+ pos (+ 1 count)
-+ (cdr bitnums)))))))
-+ (string-append
-+ ; While we could just always emit "(0" to handle the case of an empty set,
-+ ; keeping the code more readable for the normal case is important.
-+ (if (< (length groups) 1)
-+ "(0"
-+ "(")
-+ (string-drop 3
-+ (string-map
-+ (lambda (group)
-+ (let* ((first (car group))
-+ (pos (cadr group))
-+ (bits (caddr group))
-+ ; Difference between where value is and where
-+ ; it needs to be.
-+ (shift (- (if lsb0?
-+ (- first bits -1)
-+ (- (+ start size) (+ first bits)))
-+ pos)))
-+ ; FIXME: There should never be a -ve shift here,
-+ ; but it can occur on the m32r. Compensate here
-+ ; with hack and fix in 1.2.
-+ (if (< shift 0)
-+ (begin
-+ (set! val entire-val)
-+ (set! shift (+ shift size))))
-+ ; END-FIXME
-+ (string-append
-+ " | ((" val " >> " (number->string shift)
-+ ") & ("
-+ (number->string (- (integer-expt 2 bits) 1))
-+ " << " (number->string pos) "))")))
-+ groups))
-+ ")"))
-+)
-+
-+; Return code to set `itype' and branch to the extraction phase.
-+
-+(define (/gen-set-itype-and-extract insn-enum fmt-name fn?)
-+ (string-append
-+ "itype = "
-+ insn-enum
-+ "; "
-+ (if (with-scache?)
-+ (if fn?
-+ (string-append "@prefix@_extract_" fmt-name
-+ " (this, current_cpu, pc, base_insn, entire_insn);"
-+ " goto done;")
-+ (string-append "goto extract_" fmt-name ";"))
-+ "goto done;"))
-+)
-+
-+;; Return code to set `itype' and branch to the extraction phase,
-+;; bracketed in { } and indented by INDENT.
-+
-+(define (/gen-bracketed-set-itype-and-extract indent insn-enum fmt-name fn?)
-+ (string-append
-+ indent "{ "
-+ (/gen-set-itype-and-extract insn-enum fmt-name fn?)
-+ " }\n")
-+)
-+
-+; Return code for the default entry of each switch table
-+
-+(define (/gen-decode-default-entry invalid-insn fn?)
-+ (/gen-set-itype-and-extract (gen-cpu-insn-enum (current-cpu) invalid-insn)
-+ "sfmt_empty"
-+ fn?)
-+)
-+
-+;; Subroutine of /all-opcode-bits-used? to simplify it.
-+;; Given TABLE-GUTS-THUS-FAR return the mask of base its that have been
-+;; examined.
-+;; TABLE-GUTS-THUS-FAR is a list of dtable-guts objects.
-+;; PERF: Don't compute this for each insn, but that has to wait on the
-+;; base-insn-bitsize cleanup (m32r).
-+
-+(define (/table-guts-to-mask table-guts-thus-far base-bitsize lsb0?)
-+ ;;(logit 2 "/table-guts-to-mask " (map dtable-guts-bitnums table-guts-thus-far) "\n")
-+ (let guts-loop ((mask 0) (guts-list table-guts-thus-far))
-+ (if (null? guts-list)
-+ mask
-+ (let bits-loop ((mask mask) (bits (dtable-guts-bitnums (car guts-list))))
-+ (if (null? bits)
-+ (guts-loop mask (cdr guts-list))
-+ (bits-loop (+ mask (word-bit-value (car bits) base-bitsize lsb0?))
-+ (cdr bits))))))
-+)
-+
-+;; Subroutine of /gen-decode-insn-entry to simplify it.
-+;; Return a boolean indicating if all opcode bits of INSN have been
-+;; examined given TABLE-GUTS-THUS-FAR.
-+;; FIXME: Examine entire insn's opcode bits.
-+
-+(define (/all-opcode-bits-used? insn table-guts-thus-far lsb0?)
-+ (let* ((base-mask (insn-base-mask insn))
-+ ;; FIXME: This can go away when base-insn-bitsize is fixed (m32r).
-+ (base-bitsize (min (insn-base-mask-length insn) (state-base-insn-bitsize)))
-+ (table-guts-base-mask (/table-guts-to-mask table-guts-thus-far
-+ base-bitsize
-+ lsb0?)))
-+ (= (cg-logand base-mask table-guts-base-mask) base-mask))
-+)
-+
-+; Return code for one insn entry, ENTRY.
-+; REST is the remaining entries.
-+; TABLE-GUTS-THUS-FAR is the list of dtable-guts objects that led to this insn.
-+
-+(define (/gen-decode-insn-entry entry rest table-guts-thus-far
-+ indent lsb0? invalid-insn fn?)
-+ (assert (eq? 'insn (dtable-entry-type entry)))
-+ (logit 3 "Generating decode insn entry for " (obj:name (dtable-entry-value entry)) " ...\n")
-+
-+ (let* ((insn (dtable-entry-value entry))
-+ (fmt-name (gen-sym (insn-sfmt insn))))
-+
-+ (cond
-+
-+ ; Leave invalids to the default case.
-+ ((eq? (obj:name insn) 'x-invalid)
-+ "")
-+
-+ ; If same contents as next case, fall through.
-+ ; FIXME: Can reduce more by sorting cases. Much later.
-+ ((and (not (null? rest))
-+ ; Ensure both insns.
-+ (eq? 'insn (dtable-entry-type (car rest)))
-+ ; Ensure same insn.
-+ (eq? (obj:name insn)
-+ (obj:name (dtable-entry-value (car rest)))))
-+ (string-append indent " case "
-+ (number->string (dtable-entry-index entry))
-+ " : /* fall through */\n"))
-+
-+ (else
-+ (let ((consistent-base-insn? (and (equal? APPLICATION 'SID-SIMULATOR)
-+ (> (state-base-insn-bitsize)
-+ (insn-length insn)))))
-+ (string-append indent " case "
-+ (number->string (dtable-entry-index entry)) " :"
-+ ;; Compensate for base-insn-size > current-insn-size by
-+ ;; adjusting entire_insn.
-+ ;; Activate this logic only for sid simulators; they are
-+ ;; consistent in interpreting base-insn-bitsize this way.
-+ (if consistent-base-insn?
-+ (string-append
-+ "\n"
-+ indent " entire_insn = entire_insn >> "
-+ (number->string (- (state-base-insn-bitsize) (insn-length insn)))
-+ ";\n")
-+ "")
-+ ;; If necessary, generate code to check that all of the
-+ ;; opcode bits for this insn match.
-+ (if (/all-opcode-bits-used? insn table-guts-thus-far lsb0?)
-+ (string-append
-+ (if consistent-base-insn?
-+ (string-append indent " ")
-+ " ")
-+ (/gen-set-itype-and-extract (gen-cpu-insn-enum (current-cpu) insn)
-+ fmt-name fn?)
-+ "\n")
-+ (string-append
-+ (if consistent-base-insn?
-+ ""
-+ "\n")
-+ indent " if (("
-+ (if (adata-integral-insn? CURRENT-ARCH) "entire_insn" "base_insn")
-+ " & " (gen-c-hex-constant (insn-base-mask insn) "CGEN_INSN_LGUINT")
-+ ") == " (gen-c-hex-constant (insn-value insn) "CGEN_INSN_LGUINT") ")\n"
-+ (/gen-bracketed-set-itype-and-extract (string-append indent " ")
-+ (gen-cpu-insn-enum (current-cpu) insn)
-+ fmt-name fn?)
-+ indent " "
-+ (/gen-decode-default-entry invalid-insn fn?)
-+ "\n")))))))
-+)
-+
-+; Subroutine of /decode-expr-ifield-tracking.
-+; Return a list of all possible values for ifield IFLD-NAME.
-+; FIXME: Quick-n-dirty implementation. Should use bit arrays.
-+
-+(define (/decode-expr-ifield-values ifld-name)
-+ (let* ((ifld (current-ifld-lookup ifld-name))
-+ (bits (ifld-length ifld)))
-+ (if (mode-unsigned? (ifld-mode ifld))
-+ (iota (logsll 1 bits))
-+ (iota (logsll 1 bits) (- (logsll 1 (- bits 1))))))
-+)
-+
-+; Subroutine of /decode-expr-ifield-tracking,/decode-expr-ifield-mark-used.
-+; Create the search key for tracking table lookup.
-+
-+(define (/decode-expr-ifield-tracking-key insn ifld-name)
-+ (symbol-append (obj:name (insn-ifmt insn)) '-x- ifld-name)
-+)
-+
-+; Subroutine of /gen-decode-expr-entry.
-+; Return a table to track used ifield values.
-+; The table is an associative list of (key . value-list).
-+; KEY is "iformat-name-x-ifield-name".
-+; VALUE-LIST is a list of the unused values.
-+
-+(define (/decode-expr-ifield-tracking expr-list)
-+ (let ((table1
-+ (apply append
-+ (map (lambda (entry)
-+ (map (lambda (ifld-name)
-+ (cons (exprtable-entry-insn entry)
-+ (cons ifld-name
-+ (/decode-expr-ifield-values ifld-name))))
-+ (exprtable-entry-iflds entry)))
-+ expr-list))))
-+ ; TABLE1 is a list of (insn ifld-name value1 value2 ...).
-+ (nub (map (lambda (elm)
-+ (cons
-+ (/decode-expr-ifield-tracking-key (car elm) (cadr elm))
-+ (cddr elm)))
-+ table1)
-+ car))
-+)
-+
-+; Subroutine of /decode-expr-ifield-mark-used!.
-+; Return list of values completely used for ifield IFLD-NAME in EXPR.
-+; "completely used" here means the value won't appear elsewhere.
-+; e.g. in (andif (eq f-rd 15) (eq f-rx 14)) we don't know what happens
-+; for the (ne f-rx 14) case.
-+
-+(define (/decode-expr-ifield-values-used ifld-name expr)
-+ (case (rtx-name expr)
-+ ((eq)
-+ (if (and (rtx-kind? 'ifield (rtx-cmp-op-arg expr 0))
-+ (rtx-constant? (rtx-cmp-op-arg expr 1)))
-+ (list (rtx-constant-value (rtx-cmp-op-arg expr 1)))
-+ nil))
-+ ((member)
-+ (if (rtx-kind? 'ifield (rtx-member-value expr))
-+ (rtx-member-set expr)
-+ nil))
-+ ; FIXME: more needed
-+ (else nil))
-+)
-+
-+; Subroutine of /gen-decode-expr-entry.
-+; Mark ifield values used by EXPR-ENTRY in TRACKING-TABLE.
-+
-+(define (/decode-expr-ifield-mark-used! tracking-table expr-entry)
-+ (let ((insn (exprtable-entry-insn expr-entry))
-+ (expr (exprtable-entry-expr expr-entry))
-+ (ifld-names (exprtable-entry-iflds expr-entry)))
-+ (for-each (lambda (ifld-name)
-+ (let ((table-entry
-+ (assq (/decode-expr-ifield-tracking-key insn ifld-name)
-+ tracking-table))
-+ (used (/decode-expr-ifield-values-used ifld-name expr)))
-+ (for-each (lambda (value)
-+ (delq! value table-entry))
-+ used)
-+ ))
-+ ifld-names))
-+ *UNSPECIFIED*
-+)
-+
-+; Generate code to decode the expression table in ENTRY.
-+; INVALID-INSN is the <insn> object of the pseudo insn to handle invalid ones.
-+
-+(define (/gen-decode-expr-entry entry indent invalid-insn fn?)
-+ (assert (eq? 'expr (dtable-entry-type entry)))
-+ (logit 3 "Generating decode expr entry for " (exprtable-name (dtable-entry-value entry)) " ...\n")
-+
-+ (let ((expr-list (exprtable-insns (dtable-entry-value entry))))
-+ (string-list
-+ indent " case "
-+ (number->string (dtable-entry-index entry))
-+ " :\n"
-+
-+ (let ((iflds-tracking (/decode-expr-ifield-tracking expr-list))
-+ (indent (string-append indent " ")))
-+
-+ (let loop ((expr-list expr-list) (code nil))
-+
-+ (if (null? expr-list)
-+
-+ ; All done. If we used up all field values we don't need to
-+ ; "fall through" and select the invalid insn marker.
-+
-+ (if (all-true? (map null? (map cdr iflds-tracking)))
-+ code
-+ (append! code
-+ (list
-+ (/gen-bracketed-set-itype-and-extract
-+ indent
-+ (gen-cpu-insn-enum (current-cpu) invalid-insn)
-+ "sfmt_empty"
-+ fn?))))
-+
-+ ; Not all done, process next expr.
-+
-+ (let ((insn (exprtable-entry-insn (car expr-list)))
-+ (expr (exprtable-entry-expr (car expr-list)))
-+ (ifld-names (exprtable-entry-iflds (car expr-list))))
-+
-+ ; Mark of those ifield values we use first.
-+ ; If there are none left afterwards, we can unconditionally
-+ ; choose this insn.
-+ (/decode-expr-ifield-mark-used! iflds-tracking (car expr-list))
-+
-+ (let ((next-code
-+ ; If this is the last expression, and it uses up all
-+ ; remaining ifield values, there's no need to perform any
-+ ; test.
-+ (if (and (null? (cdr expr-list))
-+ (all-true? (map null? (map cdr iflds-tracking))))
-+
-+ ; Need this in a list for a later append!.
-+ (string-list
-+ (/gen-bracketed-set-itype-and-extract
-+ indent
-+ (gen-cpu-insn-enum (current-cpu) insn)
-+ (gen-sym (insn-sfmt insn))
-+ fn?))
-+
-+ ; We don't use up all ifield values, so emit a test.
-+ (let ((iflds (map current-ifld-lookup ifld-names)))
-+ (string-list
-+ indent "{\n"
-+ (gen-define-ifields iflds
-+ (insn-length insn)
-+ (string-append indent " ")
-+ #f)
-+ (gen-extract-ifields iflds
-+ (insn-length insn)
-+ (string-append indent " ")
-+ #f)
-+ indent " if ("
-+ (rtl-c 'BI expr nil #:ifield-var? #t)
-+ ")\n"
-+ (/gen-bracketed-set-itype-and-extract
-+ (string-append indent " ")
-+ (gen-cpu-insn-enum (current-cpu) insn)
-+ (gen-sym (insn-sfmt insn))
-+ fn?)
-+ indent "}\n")))))
-+
-+ (loop (cdr expr-list)
-+ (append! code next-code)))))))
-+ ))
-+)
-+
-+; Generate code to decode TABLE.
-+; REST is the remaining entries.
-+; SWITCH-NUM, STARTBIT, DECODE-BITSIZE, TABLE-GUTS-THUS-FAR,
-+; INDENT, LSB0?, INVALID-INSN are the same as for /gen-decoder-switch.
-+
-+(define (/gen-decode-table-entry table rest switch-num startbit decode-bitsize
-+ table-guts-thus-far
-+ indent lsb0? invalid-insn fn?)
-+ (assert (eq? 'table (dtable-entry-type table)))
-+ (logit 3 "Generating decode table entry for case " (dtable-entry-index table) " ...\n")
-+
-+ (string-list
-+ indent " case "
-+ (number->string (dtable-entry-index table))
-+ " :"
-+ ; If table is same as next, just emit a "fall through" to cut down on
-+ ; generated code.
-+ (if (and (not (null? rest))
-+ ; Ensure both tables.
-+ (eq? 'table (dtable-entry-type (car rest)))
-+ ; Ensure same table.
-+ (eqv? (subdtable-key (dtable-entry-value table))
-+ (subdtable-key (dtable-entry-value (car rest)))))
-+ " /* fall through */\n"
-+ (string-list
-+ "\n"
-+ (/gen-decoder-switch switch-num
-+ startbit
-+ decode-bitsize
-+ (subdtable-table (dtable-entry-value table))
-+ table-guts-thus-far
-+ (string-append indent " ")
-+ lsb0?
-+ invalid-insn
-+ fn?))))
-+)
-+
-+; Subroutine of /decode-sort-entries.
-+; Return a boolean indicating if A,B are equivalent entries.
-+
-+(define (/decode-equiv-entries? a b)
-+ (let ((a-type (dtable-entry-type a))
-+ (b-type (dtable-entry-type b)))
-+ (if (eq? a-type b-type)
-+ (case a-type
-+ ((insn)
-+ (let ((a-name (obj:name (dtable-entry-value a)))
-+ (b-name (obj:name (dtable-entry-value b))))
-+ (eq? a-name b-name)))
-+ ((expr)
-+ ; Ignore expr entries for now.
-+ #f)
-+ ((table)
-+ (let ((a-name (subdtable-key (dtable-entry-value a)))
-+ (b-name (subdtable-key (dtable-entry-value b))))
-+ (eq? a-name b-name))))
-+ ; A and B are not the same type.
-+ #f))
-+)
-+
-+; Subroutine of /gen-decoder-switch, sort ENTRIES according to desired
-+; print order (maximizes amount of fall-throughs, but maintains numerical
-+; order as much as possible).
-+; ??? This is an O(n^2) algorithm. An O(n Log(n)) algorithm can be done
-+; but it seemed more complicated than necessary for now.
-+
-+(define (/decode-sort-entries entries)
-+ (let ((find-equiv!
-+ ; Return list of entries in non-empty list L that have the same decode
-+ ; entry as the first entry. Entries found are marked with #f so
-+ ; they're not processed again.
-+ (lambda (l)
-+ ; Start off the result with the first entry, then see if the
-+ ; remaining ones match it.
-+ (let ((first (car l)))
-+ (let loop ((l (cdr l)) (result (cons first nil)))
-+ (if (null? l)
-+ (reverse! result)
-+ (if (and (car l) (/decode-equiv-entries? first (car l)))
-+ (let ((lval (car l)))
-+ (set-car! l #f)
-+ (loop (cdr l) (cons lval result)))
-+ (loop (cdr l) result)))))))
-+ )
-+ (let loop ((entries (list-copy entries)) (result nil))
-+ (if (null? entries)
-+ (apply append (reverse! result))
-+ (if (car entries)
-+ (loop (cdr entries)
-+ (cons (find-equiv! entries)
-+ result))
-+ (loop (cdr entries) result)))))
-+)
-+
-+; Generate switch statement to decode TABLE-GUTS.
-+; SWITCH-NUM is for compatibility with the computed goto decoder and
-+; isn't used.
-+; STARTBIT is the bit offset of the instruction value that C variable `insn'
-+; holds (note that this is independent of LSB0?).
-+; DECODE-BITSIZE is the number of bits of the insn that `insn' holds.
-+; TABLE-GUTS-THUS-FAR is a list of the table-guts that got us here,
-+; excluding TABLE-GUTS. It is used to decide whether insns have been
-+; fully decoded (i.e. all opcode bits have been examined).
-+; LSB0? is non-#f if bit number 0 is the least significant bit.
-+; INVALID-INSN is the <insn> object of the pseudo insn to handle invalid ones.
-+
-+; FIXME: for the few-alternative case (say, 2), generating
-+; if (0) {}
-+; else if (val == 0) { ... }
-+; else if (val == 1) { ... }
-+; else {}
-+; may well be less stressful on the compiler to optimize than small switch() stmts.
-+
-+(define (/gen-decoder-switch switch-num startbit decode-bitsize
-+ table-guts table-guts-thus-far
-+ indent lsb0? invalid-insn fn?)
-+
-+ (let ((new-table-guts-thus-far (append table-guts-thus-far (list table-guts))))
-+
-+ (string-list
-+ indent "{\n"
-+ ;; Are we at the next word?
-+ (if (not (= startbit (dtable-guts-startbit table-guts)))
-+ (begin
-+ (set! startbit (dtable-guts-startbit table-guts))
-+ (set! decode-bitsize (dtable-guts-bitsize table-guts))
-+ ;; FIXME: Bits may get fetched again during extraction.
-+ (string-append indent " unsigned int val;\n"
-+ indent " /* Must fetch more bits. */\n"
-+ indent " insn = "
-+ (gen-ifetch "pc" startbit decode-bitsize)
-+ ";\n"
-+ indent " val = "))
-+ (string-append indent " unsigned int val = "))
-+ (/gen-decode-bits (dtable-guts-bitnums table-guts)
-+ (dtable-guts-startbit table-guts)
-+ (dtable-guts-bitsize table-guts)
-+ "insn" "entire_insn" lsb0?)
-+ ";\n"
-+ indent " switch (val)\n"
-+ indent " {\n"
-+
-+ ;; The code is more readable, and icache use is improved, if we collapse
-+ ;; common code into one case and use "fall throughs" for all but the last
-+ ;; of a set of common cases.
-+ ;; FIXME: We currently rely on /gen-decode-foo-entry to recognize the fall
-+ ;; through. We should take care of it ourselves.
-+
-+ (let loop ((entries (/decode-sort-entries (dtable-guts-entries table-guts)))
-+ (result nil))
-+
-+ (if (null? entries)
-+
-+ (reverse! result)
-+
-+ (loop
-+ (cdr entries)
-+ ;; For entries that are a single insn, we're done, otherwise recurse.
-+ (cons (case (dtable-entry-type (car entries))
-+ ((insn)
-+ (/gen-decode-insn-entry (car entries) (cdr entries)
-+ new-table-guts-thus-far
-+ indent lsb0? invalid-insn fn?))
-+ ((expr)
-+ (/gen-decode-expr-entry (car entries) indent invalid-insn fn?))
-+ ((table)
-+ (/gen-decode-table-entry (car entries) (cdr entries)
-+ switch-num startbit decode-bitsize
-+ new-table-guts-thus-far
-+ indent lsb0? invalid-insn fn?))
-+ )
-+ result))))
-+
-+ ;; ??? Can delete if all cases are present.
-+ indent " default : "
-+ (/gen-decode-default-entry invalid-insn fn?) "\n"
-+ indent " }\n"
-+ indent "}\n"
-+ ))
-+)
-+
-+; Decoder generation entry point.
-+; Generate code to decode INSN-LIST.
-+; BITNUMS is the set of bits to initially key off of.
-+; DECODE-BITSIZE is the number of bits of the instruction that `insn' holds.
-+; LSB0? is non-#f if bit number 0 is the least significant bit.
-+; INVALID-INSN is the <insn> object of the pseudo insn to handle invalid ones.
-+; FN? is non-#f if the extractors are functions rather than inline code
-+
-+(define (gen-decoder insn-list bitnums decode-bitsize indent lsb0? invalid-insn fn?)
-+ (logit 3 "Building decode tree.\n"
-+ "bitnums = " (stringize bitnums " ") "\n"
-+ "decode-bitsize = " (number->string decode-bitsize) "\n"
-+ "lsb0? = " (if lsb0? "#t" "#f") "\n"
-+ "fn? = " (if fn? "#t" "#f") "\n"
-+ )
-+
-+ ; First build a table that decodes the instruction set.
-+
-+ (let ((table-guts (decode-build-table insn-list bitnums
-+ decode-bitsize lsb0?
-+ invalid-insn)))
-+
-+ ; Now print it out.
-+
-+ (/gen-decoder-switch "0" 0 decode-bitsize
-+ table-guts nil
-+ indent lsb0? invalid-insn fn?))
-+)
-diff -Nur binutils-2.24.orig/configure.ac binutils-2.24/configure.ac
---- binutils-2.24.orig/configure.ac 2013-12-02 10:32:22.000000000 +0100
-+++ binutils-2.24/configure.ac 2016-06-30 21:26:12.681894201 +0200
-@@ -141,7 +141,7 @@
- # binutils, gas and ld appear in that order because it makes sense to run
- # "make check" in that particular order.
- # If --enable-gold is used, "gold" may replace "ld".
--host_tools="flex bison binutils gas ld fixincludes gcc cgen sid sim gdb gprof etc expect dejagnu m4 utils guile fastjar gnattools"
-+host_tools="texinfo flex bison binutils gas ld fixincludes gcc cgen sid sim gdb gprof etc expect dejagnu m4 utils guile fastjar gnattools"
-
- # libgcj represents the runtime libraries only used by gcj.
- libgcj="target-libffi \
-diff -Nur binutils-2.24.orig/COPYING.LIBGLOSS binutils-2.24/COPYING.LIBGLOSS
---- binutils-2.24.orig/COPYING.LIBGLOSS 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/COPYING.LIBGLOSS 2016-06-30 21:26:12.681894201 +0200
-@@ -0,0 +1,354 @@
-+The libgloss subdirectory is a collection of software from several sources.
-+
-+Each file may have its own copyright/license that is embedded in the source
-+file. Unless otherwise noted in the body of the source file(s), the following copyright
-+notices will apply to the contents of the libgloss subdirectory:
-+
-+(1) Red Hat Incorporated
-+
-+Copyright (c) 1994-2009 Red Hat, Inc. All rights reserved.
-+
-+This copyrighted material is made available to anyone wishing to use, modify,
-+copy, or redistribute it subject to the terms and conditions of the BSD
-+License. This program is distributed in the hope that it will be useful,
-+but WITHOUT ANY WARRANTY expressed or implied, including the implied warranties
-+of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. A copy of this license
-+is available at http://www.opensource.org/licenses. Any Red Hat trademarks that
-+are incorporated in the source code or documentation are not subject to the BSD
-+License and may only be used or replicated with the express permission of
-+Red Hat, Inc.
-+
-+(2) University of California, Berkeley
-+
-+Copyright (c) 1981-2000 The Regents of the University of California.
-+All rights reserved.
-+
-+Redistribution and use in source and binary forms, with or without modification,
-+are permitted provided that the following conditions are met:
-+
-+ * Redistributions of source code must retain the above copyright notice,
-+ this list of conditions and the following disclaimer.
-+ * Redistributions in binary form must reproduce the above copyright notice,
-+ this list of conditions and the following disclaimer in the documentation
-+ and/or other materials provided with the distribution.
-+ * Neither the name of the University nor the names of its contributors may
-+ be used to endorse or promote products derived from this software without
-+ specific prior written permission.
-+
-+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
-+IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
-+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
-+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
-+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
-+OF SUCH DAMAGE.
-+
-+(3) DJ Delorie
-+
-+Copyright (C) 1993 DJ Delorie
-+All rights reserved.
-+
-+Redistribution, modification, and use in source and binary forms is permitted
-+provided that the above copyright notice and following paragraph are
-+duplicated in all such forms.
-+
-+This file is distributed WITHOUT ANY WARRANTY; without even the implied
-+warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-+
-+(4) (formerly GPL for fr30)
-+
-+The GPL is no longer applicable to the fr30 platform. The piece of
-+code (syscalls.c) referencing the GPL has been officially relicensed.
-+
-+(5) Advanced Micro Devices
-+
-+Copyright 1989, 1990 Advanced Micro Devices, Inc.
-+
-+This software is the property of Advanced Micro Devices, Inc (AMD) which
-+specifically grants the user the right to modify, use and distribute this
-+software provided this notice is not removed or altered. All other rights
-+are reserved by AMD.
-+
-+AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
-+SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
-+DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
-+USE OF THIS SOFTWARE.
-+
-+So that all may benefit from your experience, please report any problems
-+or suggestions about this software to the 29K Technical Support Center at
-+800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
-+0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
-+
-+Advanced Micro Devices, Inc.
-+29K Support Products
-+Mail Stop 573
-+5900 E. Ben White Blvd.
-+Austin, TX 78741
-+800-292-9263
-+
-+(6) - Analog Devices, Inc. (bfin-* targets)
-+
-+Copyright (C) 2006, 2008, 2009, 2011, 2012 Analog Devices, Inc.
-+
-+The authors hereby grant permission to use, copy, modify, distribute,
-+and license this software and its documentation for any purpose, provided
-+that existing copyright notices are retained in all copies and that this
-+notice is included verbatim in any distributions. No written agreement,
-+license, or royalty fee is required for any of the authorized uses.
-+Modifications to this software may be copyrighted by their authors
-+and need not follow the licensing terms described here, provided that
-+the new terms are clearly indicated on the first page of each file where
-+they apply.
-+
-+(7) University of Utah and the Computer Systems Laboratory (CSL)
-+ [applies only to hppa*-*-pro* targets]
-+Copyright (c) 1990,1994 The University of Utah and
-+the Computer Systems Laboratory (CSL). All rights reserved.
-+
-+Permission to use, copy, modify and distribute this software is hereby
-+granted provided that (1) source code retains these copyright, permission,
-+and disclaimer notices, and (2) redistributions including binaries
-+reproduce the notices in supporting documentation, and (3) all advertising
-+materials mentioning features or use of this software display the following
-+acknowledgement: ``This product includes software developed by the
-+Computer Systems Laboratory at the University of Utah.''
-+
-+THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
-+IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
-+ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
-+
-+CSL requests users of this software to return to csl-dist@cs.utah.edu any
-+improvements that they make and grant CSL redistribution rights.
-+
-+(8) Sun Microsystems
-+
-+Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
-+
-+Developed at SunPro, a Sun Microsystems, Inc. business.
-+Permission to use, copy, modify, and distribute this
-+software is freely granted, provided that this notice is preserved.
-+
-+(9) Hewlett Packard
-+
-+(c) Copyright 1986 HEWLETT-PACKARD COMPANY
-+
-+To anyone who acknowledges that this file is provided "AS IS"
-+without any express or implied warranty:
-+
-+permission to use, copy, modify, and distribute this file
-+for any purpose is hereby granted without fee, provided that
-+the above copyright notice and this notice appears in all
-+copies, and that the name of Hewlett-Packard Company not be
-+used in advertising or publicity pertaining to distribution
-+of the software without specific, written prior permission.
-+Hewlett-Packard Company makes no representations about the
-+suitability of this software for any purpose.
-+
-+(10) Hans-Peter Nilsson
-+
-+Copyright (C) 2001 Hans-Peter Nilsson
-+
-+Permission to use, copy, modify, and distribute this software is
-+freely granted, provided that the above copyright notice, this notice
-+and the following disclaimer are preserved with no changes.
-+
-+THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
-+IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
-+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-+PURPOSE.
-+
-+(11) IBM Corp. spu processor (only spu-* targets)
-+
-+(C) Copyright IBM Corp. 2005, 2006
-+
-+All rights reserved.
-+
-+Redistribution and use in source and binary forms, with or without
-+modification, are permitted provided that the following conditions are met:
-+
-+ * Redistributions of source code must retain the above copyright notice,
-+this list of conditions and the following disclaimer.
-+ * Redistributions in binary form must reproduce the above copyright
-+notice, this list of conditions and the following disclaimer in the
-+documentation and/or other materials provided with the distribution.
-+ * Neither the name of IBM nor the names of its contributors may be
-+used to endorse or promote products derived from this software without
-+specific prior written permission.
-+
-+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
-+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-+POSSIBILITY OF SUCH DAMAGE.
-+
-+(12) Jon Beniston (only lm32-* targets)
-+
-+ Contributed by Jon Beniston <jon@beniston.com>
-+
-+ Redistribution and use in source and binary forms, with or without
-+ modification, are permitted provided that the following conditions
-+ are met:
-+ 1. Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+ 2. Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+
-+ THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-+ OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-+ HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-+ LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-+ OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-+ SUCH DAMAGE.
-+
-+(13) - Xilinx, Inc. (microblaze-* and powerpc-* targets)
-+
-+Copyright (c) 2004, 2009 Xilinx, Inc. All rights reserved.
-+
-+Redistribution and use in source and binary forms, with or without
-+modification, are permitted provided that the following conditions are
-+met:
-+
-+1. Redistributions source code must retain the above copyright notice,
-+this list of conditions and the following disclaimer.
-+
-+2. Redistributions in binary form must reproduce the above copyright
-+notice, this list of conditions and the following disclaimer in the
-+documentation and/or other materials provided with the distribution.
-+
-+3. Neither the name of Xilinx nor the names of its contributors may be
-+used to endorse or promote products derived from this software without
-+specific prior written permission.
-+
-+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS "AS
-+IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-+HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
-+TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
-+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+
-+
-+(14) - National Semiconductor Corporation
-+
-+Copyright (c) 2004 National Semiconductor Corporation
-+
-+The authors hereby grant permission to use, copy, modify, distribute,
-+and license this software and its documentation for any purpose, provided
-+that existing copyright notices are retained in all copies and that this
-+notice is included verbatim in any distributions. No written agreement,
-+license, or royalty fee is required for any of the authorized uses.
-+Modifications to this software may be copyrighted by their authors
-+and need not follow the licensing terms described here, provided that
-+the new terms are clearly indicated on the first page of each file where
-+they apply.
-+
-+
-+(15) - CodeSourcery, Inc. (tic6x-* targets)
-+
-+Copyright (c) 2010 CodeSourcery, Inc.
-+All rights reserved.
-+
-+Redistribution and use in source and binary forms, with or without
-+modification, are permitted provided that the following conditions are met:
-+ * Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+ * Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+ * Neither the name of CodeSourcery nor the
-+ names of its contributors may be used to endorse or promote products
-+ derived from this software without specific prior written permission.
-+
-+THIS SOFTWARE IS PROVIDED BY CODESOURCERY, INC. ``AS IS'' AND ANY
-+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-+DISCLAIMED. IN NO EVENT SHALL CODESOURCERY BE LIABLE FOR ANY
-+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+
-+
-+(16) - GPL with exception (sparc-*leon*, crx-*, cr16-* targets only)
-+
-+ Copyright (C) 1992 Free Software Foundation, Inc.
-+ Written By David Vinayak Henkel-Wallace, June 1992
-+
-+This file is free software; you can redistribute it and/or modify it
-+under the terms of the GNU General Public License as published by the
-+Free Software Foundation; either version 2, or (at your option) any
-+later version.
-+
-+In addition to the permissions in the GNU General Public License, the
-+Free Software Foundation gives you unlimited permission to link the
-+compiled version of this file with other programs, and to distribute
-+those programs without any restriction coming from the use of this
-+file. (The General Public License restrictions do apply in other
-+respects; for example, they cover modification of the file, and
-+distribution when not linked into another program.)
-+
-+This file is distributed in the hope that it will be useful, but
-+WITHOUT ANY WARRANTY; without even the implied warranty of
-+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+General Public License for more details.
-+
-+You should have received a copy of the GNU General Public License
-+along with this program; see the file COPYING. If not, write to
-+the Free Software Foundation, 59 Temple Place - Suite 330,
-+Boston, MA 02111-1307, USA.
-+
-+ As a special exception, if you link this library with files
-+ compiled with GCC to produce an executable, this does not cause
-+ the resulting executable to be covered by the GNU General Public License.
-+ This exception does not however invalidate any other reasons why
-+ the executable file might be covered by the GNU General Public License.
-+
-+
-+(17) - Adapteva, Inc. (epiphany-* targets)
-+
-+Copyright (c) 2011, Adapteva, Inc.
-+All rights reserved.
-+
-+Redistribution and use in source and binary forms, with or without
-+modification, are permitted provided that the following conditions are met:
-+ * Redistributions of source code must retain the above copyright notice, this
-+ list of conditions and the following disclaimer.
-+ * Redistributions in binary form must reproduce the above copyright notice,
-+ this list of conditions and the following disclaimer in the documentation
-+ and/or other materials provided with the distribution.
-+ * Neither the name of Adapteva nor the names of its contributors may be used
-+ to endorse or promote products derived from this software without specific
-+ prior written permission.
-+
-+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-+SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-+CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-+OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+
-diff -Nur binutils-2.24.orig/COPYING.NEWLIB binutils-2.24/COPYING.NEWLIB
---- binutils-2.24.orig/COPYING.NEWLIB 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/COPYING.NEWLIB 2016-06-30 21:26:12.681894201 +0200
-@@ -0,0 +1,927 @@
-+The newlib subdirectory is a collection of software from several sources.
-+
-+Each file may have its own copyright/license that is embedded in the source
-+file. Unless otherwise noted in the body of the source file(s), the following copyright
-+notices will apply to the contents of the newlib subdirectory:
-+
-+(1) Red Hat Incorporated
-+
-+Copyright (c) 1994-2009 Red Hat, Inc. All rights reserved.
-+
-+This copyrighted material is made available to anyone wishing to use,
-+modify, copy, or redistribute it subject to the terms and conditions
-+of the BSD License. This program is distributed in the hope that
-+it will be useful, but WITHOUT ANY WARRANTY expressed or implied,
-+including the implied warranties of MERCHANTABILITY or FITNESS FOR
-+A PARTICULAR PURPOSE. A copy of this license is available at
-+http://www.opensource.org/licenses. Any Red Hat trademarks that are
-+incorporated in the source code or documentation are not subject to
-+the BSD License and may only be used or replicated with the express
-+permission of Red Hat, Inc.
-+
-+(2) University of California, Berkeley
-+
-+Copyright (c) 1981-2000 The Regents of the University of California.
-+All rights reserved.
-+
-+Redistribution and use in source and binary forms, with or without modification,
-+are permitted provided that the following conditions are met:
-+
-+ * Redistributions of source code must retain the above copyright notice,
-+ this list of conditions and the following disclaimer.
-+ * Redistributions in binary form must reproduce the above copyright notice,
-+ this list of conditions and the following disclaimer in the documentation
-+ and/or other materials provided with the distribution.
-+ * Neither the name of the University nor the names of its contributors
-+ may be used to endorse or promote products derived from this software
-+ without specific prior written permission.
-+
-+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
-+IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
-+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
-+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
-+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
-+OF SUCH DAMAGE.
-+
-+(3) David M. Gay (AT&T 1991, Lucent 1998)
-+
-+The author of this software is David M. Gay.
-+
-+Copyright (c) 1991 by AT&T.
-+
-+Permission to use, copy, modify, and distribute this software for any
-+purpose without fee is hereby granted, provided that this entire notice
-+is included in all copies of any software which is or includes a copy
-+or modification of this software and in all copies of the supporting
-+documentation for such software.
-+
-+THIS SOFTWARE IS BEING PROVIDED "AS IS", WITHOUT ANY EXPRESS OR IMPLIED
-+WARRANTY. IN PARTICULAR, NEITHER THE AUTHOR NOR AT&T MAKES ANY
-+REPRESENTATION OR WARRANTY OF ANY KIND CONCERNING THE MERCHANTABILITY
-+OF THIS SOFTWARE OR ITS FITNESS FOR ANY PARTICULAR PURPOSE.
-+
-+-------------------------------------------------------------------
-+
-+The author of this software is David M. Gay.
-+
-+Copyright (C) 1998-2001 by Lucent Technologies
-+All Rights Reserved
-+
-+Permission to use, copy, modify, and distribute this software and
-+its documentation for any purpose and without fee is hereby
-+granted, provided that the above copyright notice appear in all
-+copies and that both that the copyright notice and this
-+permission notice and warranty disclaimer appear in supporting
-+documentation, and that the name of Lucent or any of its entities
-+not be used in advertising or publicity pertaining to
-+distribution of the software without specific, written prior
-+permission.
-+
-+LUCENT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-+INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS.
-+IN NO EVENT SHALL LUCENT OR ANY OF ITS ENTITIES BE LIABLE FOR ANY
-+SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-+WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER
-+IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
-+ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF
-+THIS SOFTWARE.
-+
-+
-+(4) Advanced Micro Devices
-+
-+Copyright 1989, 1990 Advanced Micro Devices, Inc.
-+
-+This software is the property of Advanced Micro Devices, Inc (AMD) which
-+specifically grants the user the right to modify, use and distribute this
-+software provided this notice is not removed or altered. All other rights
-+are reserved by AMD.
-+
-+AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS
-+SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL
-+DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR
-+USE OF THIS SOFTWARE.
-+
-+So that all may benefit from your experience, please report any problems
-+or suggestions about this software to the 29K Technical Support Center at
-+800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or
-+0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118.
-+
-+Advanced Micro Devices, Inc.
-+29K Support Products
-+Mail Stop 573
-+5900 E. Ben White Blvd.
-+Austin, TX 78741
-+800-292-9263
-+
-+(5)
-+
-+(6)
-+
-+(7) Sun Microsystems
-+
-+Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
-+
-+Developed at SunPro, a Sun Microsystems, Inc. business.
-+Permission to use, copy, modify, and distribute this
-+software is freely granted, provided that this notice is preserved.
-+
-+(8) Hewlett Packard
-+
-+(c) Copyright 1986 HEWLETT-PACKARD COMPANY
-+
-+To anyone who acknowledges that this file is provided "AS IS"
-+without any express or implied warranty:
-+ permission to use, copy, modify, and distribute this file
-+for any purpose is hereby granted without fee, provided that
-+the above copyright notice and this notice appears in all
-+copies, and that the name of Hewlett-Packard Company not be
-+used in advertising or publicity pertaining to distribution
-+of the software without specific, written prior permission.
-+Hewlett-Packard Company makes no representations about the
-+suitability of this software for any purpose.
-+
-+(9) Hans-Peter Nilsson
-+
-+Copyright (C) 2001 Hans-Peter Nilsson
-+
-+Permission to use, copy, modify, and distribute this software is
-+freely granted, provided that the above copyright notice, this notice
-+and the following disclaimer are preserved with no changes.
-+
-+THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
-+IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
-+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-+PURPOSE.
-+
-+(10) Stephane Carrez (m68hc11-elf/m68hc12-elf targets only)
-+
-+Copyright (C) 1999, 2000, 2001, 2002 Stephane Carrez (stcarrez@nerim.fr)
-+
-+The authors hereby grant permission to use, copy, modify, distribute,
-+and license this software and its documentation for any purpose, provided
-+that existing copyright notices are retained in all copies and that this
-+notice is included verbatim in any distributions. No written agreement,
-+license, or royalty fee is required for any of the authorized uses.
-+Modifications to this software may be copyrighted by their authors
-+and need not follow the licensing terms described here, provided that
-+the new terms are clearly indicated on the first page of each file where
-+they apply.
-+
-+(11) Christopher G. Demetriou
-+
-+Copyright (c) 2001 Christopher G. Demetriou
-+All rights reserved.
-+
-+Redistribution and use in source and binary forms, with or without
-+modification, are permitted provided that the following conditions
-+are met:
-+1. Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+2. Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+3. The name of the author may not be used to endorse or promote products
-+ derived from this software without specific prior written permission.
-+
-+THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
-+IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
-+OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
-+IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
-+INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-+THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-+THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+
-+(12) SuperH, Inc.
-+
-+Copyright 2002 SuperH, Inc. All rights reserved
-+
-+This software is the property of SuperH, Inc (SuperH) which specifically
-+grants the user the right to modify, use and distribute this software
-+provided this notice is not removed or altered. All other rights are
-+reserved by SuperH.
-+
-+SUPERH MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO
-+THIS SOFTWARE. IN NO EVENT SHALL SUPERH BE LIABLE FOR INDIRECT, SPECIAL,
-+INCIDENTAL OR CONSEQUENTIAL DAMAGES IN CONNECTION WITH OR ARISING FROM
-+THE FURNISHING, PERFORMANCE, OR USE OF THIS SOFTWARE.
-+
-+So that all may benefit from your experience, please report any problems
-+or suggestions about this software to the SuperH Support Center via
-+e-mail at softwaresupport@superh.com .
-+
-+SuperH, Inc.
-+405 River Oaks Parkway
-+San Jose
-+CA 95134
-+USA
-+
-+(13) Royal Institute of Technology
-+
-+Copyright (c) 1999 Kungliga Tekniska Högskolan
-+(Royal Institute of Technology, Stockholm, Sweden).
-+All rights reserved.
-+
-+Redistribution and use in source and binary forms, with or without
-+modification, are permitted provided that the following conditions
-+are met:
-+
-+1. Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+
-+2. Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+
-+3. Neither the name of KTH nor the names of its contributors may be
-+ used to endorse or promote products derived from this software without
-+ specific prior written permission.
-+
-+THIS SOFTWARE IS PROVIDED BY KTH AND ITS CONTRIBUTORS ``AS IS'' AND ANY
-+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-+PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL KTH OR ITS CONTRIBUTORS BE
-+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
-+BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
-+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
-+OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-+ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+
-+(14) Alexey Zelkin
-+
-+Copyright (c) 2000, 2001 Alexey Zelkin <phantom@FreeBSD.org>
-+All rights reserved.
-+
-+Redistribution and use in source and binary forms, with or without
-+modification, are permitted provided that the following conditions
-+are met:
-+1. Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+2. Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+
-+THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-+OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-+OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-+SUCH DAMAGE.
-+
-+(15) Andrey A. Chernov
-+
-+Copyright (C) 1997 by Andrey A. Chernov, Moscow, Russia.
-+All rights reserved.
-+
-+Redistribution and use in source and binary forms, with or without
-+modification, are permitted provided that the following conditions
-+are met:
-+1. Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+2. Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+
-+THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
-+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
-+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-+OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-+OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-+SUCH DAMAGE.
-+
-+(16) FreeBSD
-+
-+Copyright (c) 1997-2002 FreeBSD Project.
-+All rights reserved.
-+
-+Redistribution and use in source and binary forms, with or without
-+modification, are permitted provided that the following conditions
-+are met:
-+1. Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+2. Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+
-+THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-+OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-+OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-+SUCH DAMAGE.
-+
-+(17) S. L. Moshier
-+
-+Author: S. L. Moshier.
-+
-+Copyright (c) 1984,2000 S.L. Moshier
-+
-+Permission to use, copy, modify, and distribute this software for any
-+purpose without fee is hereby granted, provided that this entire notice
-+is included in all copies of any software which is or includes a copy
-+or modification of this software and in all copies of the supporting
-+documentation for such software.
-+
-+THIS SOFTWARE IS BEING PROVIDED "AS IS", WITHOUT ANY EXPRESS OR IMPLIED
-+WARRANTY. IN PARTICULAR, THE AUTHOR MAKES NO REPRESENTATION
-+OR WARRANTY OF ANY KIND CONCERNING THE MERCHANTABILITY OF THIS
-+SOFTWARE OR ITS FITNESS FOR ANY PARTICULAR PURPOSE.
-+
-+(18) Citrus Project
-+
-+Copyright (c)1999 Citrus Project,
-+All rights reserved.
-+
-+Redistribution and use in source and binary forms, with or without
-+modification, are permitted provided that the following conditions
-+are met:
-+1. Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+2. Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+
-+THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-+OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-+OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-+SUCH DAMAGE.
-+
-+(19) Todd C. Miller
-+
-+Copyright (c) 1998 Todd C. Miller <Todd.Miller@courtesan.com>
-+All rights reserved.
-+
-+Redistribution and use in source and binary forms, with or without
-+modification, are permitted provided that the following conditions
-+are met:
-+1. Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+2. Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+3. The name of the author may not be used to endorse or promote products
-+ derived from this software without specific prior written permission.
-+
-+THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
-+INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
-+AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
-+THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
-+EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
-+PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
-+OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
-+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
-+OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-+ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+
-+(20) DJ Delorie (i386)
-+Copyright (C) 1991 DJ Delorie
-+All rights reserved.
-+
-+Redistribution, modification, and use in source and binary forms is permitted
-+provided that the above copyright notice and following paragraph are
-+duplicated in all such forms.
-+
-+This file is distributed WITHOUT ANY WARRANTY; without even the implied
-+warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-+
-+(21) Free Software Foundation LGPL License (*-linux* targets only)
-+
-+ Copyright (C) 1990-1999, 2000, 2001 Free Software Foundation, Inc.
-+ This file is part of the GNU C Library.
-+ Contributed by Mark Kettenis <kettenis@phys.uva.nl>, 1997.
-+
-+ The GNU C Library is free software; you can redistribute it and/or
-+ modify it under the terms of the GNU Lesser General Public
-+ License as published by the Free Software Foundation; either
-+ version 2.1 of the License, or (at your option) any later version.
-+
-+ The GNU C Library is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ Lesser General Public License for more details.
-+
-+ You should have received a copy of the GNU Lesser General Public
-+ License along with the GNU C Library; if not, write to the Free
-+ Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-+ 02110-1301 USA.
-+
-+(22) Xavier Leroy LGPL License (i[3456]86-*-linux* targets only)
-+
-+Copyright (C) 1996 Xavier Leroy (Xavier.Leroy@inria.fr)
-+
-+This program is free software; you can redistribute it and/or
-+modify it under the terms of the GNU Library General Public License
-+as published by the Free Software Foundation; either version 2
-+of the License, or (at your option) any later version.
-+
-+This program is distributed in the hope that it will be useful,
-+but WITHOUT ANY WARRANTY; without even the implied warranty of
-+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+GNU Library General Public License for more details.
-+
-+(23) Intel (i960)
-+
-+Copyright (c) 1993 Intel Corporation
-+
-+Intel hereby grants you permission to copy, modify, and distribute this
-+software and its documentation. Intel grants this permission provided
-+that the above copyright notice appears in all copies and that both the
-+copyright notice and this permission notice appear in supporting
-+documentation. In addition, Intel grants this permission provided that
-+you prominently mark as "not part of the original" any modifications
-+made to this software or documentation, and that the name of Intel
-+Corporation not be used in advertising or publicity pertaining to
-+distribution of the software or the documentation without specific,
-+written prior permission.
-+
-+Intel Corporation provides this AS IS, WITHOUT ANY WARRANTY, EXPRESS OR
-+IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY
-+OR FITNESS FOR A PARTICULAR PURPOSE. Intel makes no guarantee or
-+representations regarding the use of, or the results of the use of,
-+the software and documentation in terms of correctness, accuracy,
-+reliability, currentness, or otherwise; and you rely on the software,
-+documentation and results solely at your own risk.
-+
-+IN NO EVENT SHALL INTEL BE LIABLE FOR ANY LOSS OF USE, LOSS OF BUSINESS,
-+LOSS OF PROFITS, INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES
-+OF ANY KIND. IN NO EVENT SHALL INTEL'S TOTAL LIABILITY EXCEED THE SUM
-+PAID TO INTEL FOR THE PRODUCT LICENSED HEREUNDER.
-+
-+(24) Hewlett-Packard (hppa targets only)
-+
-+(c) Copyright 1986 HEWLETT-PACKARD COMPANY
-+
-+To anyone who acknowledges that this file is provided "AS IS"
-+without any express or implied warranty:
-+ permission to use, copy, modify, and distribute this file
-+for any purpose is hereby granted without fee, provided that
-+the above copyright notice and this notice appears in all
-+copies, and that the name of Hewlett-Packard Company not be
-+used in advertising or publicity pertaining to distribution
-+of the software without specific, written prior permission.
-+Hewlett-Packard Company makes no representations about the
-+suitability of this software for any purpose.
-+
-+(25) Henry Spencer (only *-linux targets)
-+
-+Copyright 1992, 1993, 1994 Henry Spencer. All rights reserved.
-+This software is not subject to any license of the American Telephone
-+and Telegraph Company or of the Regents of the University of California.
-+
-+Permission is granted to anyone to use this software for any purpose on
-+any computer system, and to alter it and redistribute it, subject
-+to the following restrictions:
-+
-+1. The author is not responsible for the consequences of use of this
-+ software, no matter how awful, even if they arise from flaws in it.
-+
-+2. The origin of this software must not be misrepresented, either by
-+ explicit claim or by omission. Since few users ever read sources,
-+ credits must appear in the documentation.
-+
-+3. Altered versions must be plainly marked as such, and must not be
-+ misrepresented as being the original software. Since few users
-+ ever read sources, credits must appear in the documentation.
-+
-+4. This notice may not be removed or altered.
-+
-+(26) Mike Barcroft
-+
-+Copyright (c) 2001 Mike Barcroft <mike@FreeBSD.org>
-+All rights reserved.
-+
-+Redistribution and use in source and binary forms, with or without
-+modification, are permitted provided that the following conditions
-+are met:
-+1. Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+2. Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+
-+THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-+OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-+OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-+SUCH DAMAGE.
-+
-+(27) Konstantin Chuguev (--enable-newlib-iconv)
-+
-+Copyright (c) 1999, 2000
-+ Konstantin Chuguev. All rights reserved.
-+
-+Redistribution and use in source and binary forms, with or without
-+modification, are permitted provided that the following conditions
-+are met:
-+1. Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+2. Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+
-+THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-+OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-+OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-+SUCH DAMAGE.
-+
-+ iconv (Charset Conversion Library) v2.0
-+
-+(28) Artem Bityuckiy (--enable-newlib-iconv)
-+
-+Copyright (c) 2003, Artem B. Bityuckiy, SoftMine Corporation.
-+Rights transferred to Franklin Electronic Publishers.
-+
-+Redistribution and use in source and binary forms, with or without
-+modification, are permitted provided that the following conditions
-+are met:
-+1. Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+2. Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+
-+THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-+OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-+OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-+SUCH DAMAGE.
-+
-+(29) IBM, Sony, Toshiba (only spu-* targets)
-+
-+ (C) Copyright 2001,2006,
-+ International Business Machines Corporation,
-+ Sony Computer Entertainment, Incorporated,
-+ Toshiba Corporation,
-+
-+ All rights reserved.
-+
-+ Redistribution and use in source and binary forms, with or without
-+ modification, are permitted provided that the following conditions are met:
-+
-+ * Redistributions of source code must retain the above copyright notice,
-+ this list of conditions and the following disclaimer.
-+ * Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+ * Neither the names of the copyright holders nor the names of their
-+ contributors may be used to endorse or promote products derived from this
-+ software without specific prior written permission.
-+
-+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
-+ LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-+ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-+ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-+ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-+ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-+ POSSIBILITY OF SUCH DAMAGE.
-+
-+(30) - Alex Tatmanjants (targets using libc/posix)
-+
-+ Copyright (c) 1995 Alex Tatmanjants <alex@elvisti.kiev.ua>
-+ at Electronni Visti IA, Kiev, Ukraine.
-+ All rights reserved.
-+
-+ Redistribution and use in source and binary forms, with or without
-+ modification, are permitted provided that the following conditions
-+ are met:
-+ 1. Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+ 2. Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+
-+ THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
-+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
-+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-+ OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-+ HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-+ LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-+ OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-+ SUCH DAMAGE.
-+
-+(31) - M. Warner Losh (targets using libc/posix)
-+
-+ Copyright (c) 1998, M. Warner Losh <imp@freebsd.org>
-+ All rights reserved.
-+
-+ Redistribution and use in source and binary forms, with or without
-+ modification, are permitted provided that the following conditions
-+ are met:
-+ 1. Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+ 2. Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+
-+ THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-+ OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-+ HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-+ LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-+ OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-+ SUCH DAMAGE.
-+
-+(32) - Andrey A. Chernov (targets using libc/posix)
-+
-+ Copyright (C) 1996 by Andrey A. Chernov, Moscow, Russia.
-+ All rights reserved.
-+
-+ Redistribution and use in source and binary forms, with or without
-+ modification, are permitted provided that the following conditions
-+ are met:
-+ 1. Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+ 2. Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+
-+ THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
-+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
-+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-+ OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-+ HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-+ LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-+ OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-+ SUCH DAMAGE.
-+
-+(33) - Daniel Eischen (targets using libc/posix)
-+
-+ Copyright (c) 2001 Daniel Eischen <deischen@FreeBSD.org>.
-+ All rights reserved.
-+
-+ Redistribution and use in source and binary forms, with or without
-+ modification, are permitted provided that the following conditions
-+ are met:
-+ 1. Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+ 2. Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+
-+ THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
-+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-+ OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-+ HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-+ LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-+ OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-+ SUCH DAMAGE.
-+
-+
-+(34) - Jon Beniston (only lm32-* targets)
-+
-+ Contributed by Jon Beniston <jon@beniston.com>
-+
-+ Redistribution and use in source and binary forms, with or without
-+ modification, are permitted provided that the following conditions
-+ are met:
-+ 1. Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+ 2. Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+
-+ THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-+ ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-+ OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-+ HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-+ LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-+ OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-+ SUCH DAMAGE.
-+
-+
-+(35) - ARM Ltd (arm and thumb variant targets only)
-+
-+ Copyright (c) 2009 ARM Ltd
-+ All rights reserved.
-+
-+ Redistribution and use in source and binary forms, with or without
-+ modification, are permitted provided that the following conditions
-+ are met:
-+ 1. Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+ 2. Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+ 3. The name of the company may not be used to endorse or promote
-+ products derived from this software without specific prior written
-+ permission.
-+
-+ THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
-+ WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-+ MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
-+ IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
-+ TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
-+ PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+ LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+
-+(36) - Xilinx, Inc. (microblaze-* and powerpc-* targets)
-+
-+Copyright (c) 2004, 2009 Xilinx, Inc. All rights reserved.
-+
-+Redistribution and use in source and binary forms, with or without
-+modification, are permitted provided that the following conditions are
-+met:
-+
-+1. Redistributions source code must retain the above copyright notice,
-+this list of conditions and the following disclaimer.
-+
-+2. Redistributions in binary form must reproduce the above copyright
-+notice, this list of conditions and the following disclaimer in the
-+documentation and/or other materials provided with the distribution.
-+
-+3. Neither the name of Xilinx nor the names of its contributors may be
-+used to endorse or promote products derived from this software without
-+specific prior written permission.
-+
-+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS "AS
-+IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-+TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-+PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-+HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
-+TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
-+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-+NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+
-+
-+(37) Texas Instruments Incorporated (tic6x-* targets)
-+
-+Copyright (c) 1996-2010 Texas Instruments Incorporated
-+http://www.ti.com/
-+
-+ Redistribution and use in source and binary forms, with or without
-+ modification, are permitted provided that the following conditions
-+ are met:
-+
-+ Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+
-+ Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in
-+ the documentation and/or other materials provided with the
-+ distribution.
-+
-+ Neither the name of Texas Instruments Incorporated nor the names
-+ of its contributors may be used to endorse or promote products
-+ derived from this software without specific prior written
-+ permission.
-+
-+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-+ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-+ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-+ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-+ OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-+ DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-+ THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+
-+(38) National Semiconductor (cr16-* and crx-* targets)
-+
-+Copyright (c) 2004 National Semiconductor Corporation
-+
-+The authors hereby grant permission to use, copy, modify, distribute,
-+and license this software and its documentation for any purpose, provided
-+that existing copyright notices are retained in all copies and that this
-+notice is included verbatim in any distributions. No written agreement,
-+license, or royalty fee is required for any of the authorized uses.
-+Modifications to this software may be copyrighted by their authors
-+and need not follow the licensing terms described here, provided that
-+the new terms are clearly indicated on the first page of each file where
-+they apply.
-+
-+(39) - Adapteva, Inc. (epiphany-* targets)
-+
-+Copyright (c) 2011, Adapteva, Inc.
-+All rights reserved.
-+
-+Redistribution and use in source and binary forms, with or without
-+modification, are permitted provided that the following conditions are met:
-+ * Redistributions of source code must retain the above copyright notice, this
-+ list of conditions and the following disclaimer.
-+ * Redistributions in binary form must reproduce the above copyright notice,
-+ this list of conditions and the following disclaimer in the documentation
-+ and/or other materials provided with the distribution.
-+ * Neither the name of Adapteva nor the names of its contributors may be used
-+ to endorse or promote products derived from this software without specific
-+ prior written permission.
-+
-+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-+SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-+CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-+OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+
-+(40) - Altera Corportion (nios2-* targets)
-+
-+Copyright (c) 2003 Altera Corporation
-+All rights reserved.
-+
-+Redistribution and use in source and binary forms, with or without
-+modification, are permitted provided that the following conditions
-+are met:
-+
-+ o Redistributions of source code must retain the above copyright
-+ notice, this list of conditions and the following disclaimer.
-+ o Redistributions in binary form must reproduce the above copyright
-+ notice, this list of conditions and the following disclaimer in the
-+ documentation and/or other materials provided with the distribution.
-+ o Neither the name of Altera Corporation nor the names of its
-+ contributors may be used to endorse or promote products derived from
-+ this software without specific prior written permission.
-+
-+THIS SOFTWARE IS PROVIDED BY ALTERA CORPORATION, THE COPYRIGHT HOLDER,
-+AND ITS CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
-+INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
-+AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
-+THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-+INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-+BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-+OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
-+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
-+TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
-+USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+
-diff -Nur binutils-2.24.orig/etc/add-log.el binutils-2.24/etc/add-log.el
---- binutils-2.24.orig/etc/add-log.el 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/etc/add-log.el 2016-06-30 21:26:12.681894201 +0200
-@@ -0,0 +1,573 @@
-+;;; ============ NOTE WELL! =============
-+;;;
-+;;; You only need to use this file if you're using a version of Emacs
-+;;; prior to 20.1 to work on GDB. The only difference between this
-+;;; and the standard add-log.el provided with 19.34 is that it
-+;;; generates dates using the terser format used by Emacs 20. This is
-+;;; the format recommended for use in GDB ChangeLogs.
-+;;;
-+;;; To use this code, you should create a directory `~/elisp', save the code
-+;;; below in `~/elisp/add-log.el', and then put something like this in
-+;;; your `~/.emacs' file, to tell Emacs where to find it:
-+;;;
-+;;; (setq load-path
-+;;; (cons (expand-file-name "~/elisp")
-+;;; load-path))
-+;;;
-+;;; If you want, you can also byte-compile it --- it'll run a little
-+;;; faster, and use a little less memory. (Not that those matter much for
-+;;; this file.) To do that, after you've saved the text as
-+;;; ~/elisp/add-log.el, bring it up in Emacs, and type
-+;;;
-+;;; C-u M-x byte-compile-file
-+;;;
-+;;; --- Jim Blandy
-+
-+;;; add-log.el --- change log maintenance commands for Emacs
-+
-+;; Copyright (C) 1985, 1986, 1988, 1993, 1994 Free Software Foundation, Inc.
-+
-+;; Keywords: maint
-+
-+;; This file is part of GNU Emacs.
-+
-+;; GNU Emacs is free software; you can redistribute it and/or modify
-+;; it under the terms of the GNU General Public License as published by
-+;; the Free Software Foundation; either version 2, or (at your option)
-+;; any later version.
-+
-+;; GNU Emacs is distributed in the hope that it will be useful,
-+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
-+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+;; GNU General Public License for more details.
-+
-+;; You should have received a copy of the GNU General Public License
-+;; along with GNU Emacs; see the file COPYING. If not, write to the
-+;; Free Software Foundation, Inc., 59 Temple Place - Suite 330,
-+;; Boston, MA 02111-1307, USA.
-+
-+;;; Commentary:
-+
-+;; This facility is documented in the Emacs Manual.
-+
-+;;; Code:
-+
-+(defvar change-log-default-name nil
-+ "*Name of a change log file for \\[add-change-log-entry].")
-+
-+(defvar add-log-current-defun-function nil
-+ "\
-+*If non-nil, function to guess name of current function from surrounding text.
-+\\[add-change-log-entry] calls this function (if nil, `add-log-current-defun'
-+instead) with no arguments. It returns a string or nil if it cannot guess.")
-+
-+;;;###autoload
-+(defvar add-log-full-name nil
-+ "*Full name of user, for inclusion in ChangeLog daily headers.
-+This defaults to the value returned by the `user-full-name' function.")
-+
-+;;;###autoload
-+(defvar add-log-mailing-address nil
-+ "*Electronic mail address of user, for inclusion in ChangeLog daily headers.
-+This defaults to the value of `user-mail-address'.")
-+
-+(defvar change-log-font-lock-keywords
-+ '(("^[SMTWF].+" . font-lock-function-name-face) ; Date line.
-+ ("^\t\\* \\([^ :\n]+\\)" 1 font-lock-comment-face) ; File name.
-+ ("(\\([^)\n]+\\)):" 1 font-lock-keyword-face)) ; Function name.
-+ "Additional expressions to highlight in Change Log mode.")
-+
-+(defvar change-log-mode-map nil
-+ "Keymap for Change Log major mode.")
-+(if change-log-mode-map
-+ nil
-+ (setq change-log-mode-map (make-sparse-keymap))
-+ (define-key change-log-mode-map "\M-q" 'change-log-fill-paragraph))
-+
-+(defun change-log-name ()
-+ (or change-log-default-name
-+ (if (eq system-type 'vax-vms)
-+ "$CHANGE_LOG$.TXT"
-+ (if (or (eq system-type 'ms-dos) (eq system-type 'windows-nt))
-+ "changelo"
-+ "ChangeLog"))))
-+
-+;;;###autoload
-+(defun prompt-for-change-log-name ()
-+ "Prompt for a change log name."
-+ (let* ((default (change-log-name))
-+ (name (expand-file-name
-+ (read-file-name (format "Log file (default %s): " default)
-+ nil default))))
-+ ;; Handle something that is syntactically a directory name.
-+ ;; Look for ChangeLog or whatever in that directory.
-+ (if (string= (file-name-nondirectory name) "")
-+ (expand-file-name (file-name-nondirectory default)
-+ name)
-+ ;; Handle specifying a file that is a directory.
-+ (if (file-directory-p name)
-+ (expand-file-name (file-name-nondirectory default)
-+ (file-name-as-directory name))
-+ name))))
-+
-+;;;###autoload
-+(defun find-change-log (&optional file-name)
-+ "Find a change log file for \\[add-change-log-entry] and return the name.
-+
-+Optional arg FILE-NAME specifies the file to use.
-+If FILE-NAME is nil, use the value of `change-log-default-name'.
-+If 'change-log-default-name' is nil, behave as though it were 'ChangeLog'
-+\(or whatever we use on this operating system).
-+
-+If 'change-log-default-name' contains a leading directory component, then
-+simply find it in the current directory. Otherwise, search in the current
-+directory and its successive parents for a file so named.
-+
-+Once a file is found, `change-log-default-name' is set locally in the
-+current buffer to the complete file name."
-+ ;; If user specified a file name or if this buffer knows which one to use,
-+ ;; just use that.
-+ (or file-name
-+ (setq file-name (and change-log-default-name
-+ (file-name-directory change-log-default-name)
-+ change-log-default-name))
-+ (progn
-+ ;; Chase links in the source file
-+ ;; and use the change log in the dir where it points.
-+ (setq file-name (or (and buffer-file-name
-+ (file-name-directory
-+ (file-chase-links buffer-file-name)))
-+ default-directory))
-+ (if (file-directory-p file-name)
-+ (setq file-name (expand-file-name (change-log-name) file-name)))
-+ ;; Chase links before visiting the file.
-+ ;; This makes it easier to use a single change log file
-+ ;; for several related directories.
-+ (setq file-name (file-chase-links file-name))
-+ (setq file-name (expand-file-name file-name))
-+ ;; Move up in the dir hierarchy till we find a change log file.
-+ (let ((file1 file-name)
-+ parent-dir)
-+ (while (and (not (or (get-file-buffer file1) (file-exists-p file1)))
-+ (progn (setq parent-dir
-+ (file-name-directory
-+ (directory-file-name
-+ (file-name-directory file1))))
-+ ;; Give up if we are already at the root dir.
-+ (not (string= (file-name-directory file1)
-+ parent-dir))))
-+ ;; Move up to the parent dir and try again.
-+ (setq file1 (expand-file-name
-+ (file-name-nondirectory (change-log-name))
-+ parent-dir)))
-+ ;; If we found a change log in a parent, use that.
-+ (if (or (get-file-buffer file1) (file-exists-p file1))
-+ (setq file-name file1)))))
-+ ;; Make a local variable in this buffer so we needn't search again.
-+ (set (make-local-variable 'change-log-default-name) file-name)
-+ file-name)
-+
-+;;;###autoload
-+(defun add-change-log-entry (&optional whoami file-name other-window new-entry)
-+ "Find change log file and add an entry for today.
-+Optional arg (interactive prefix) non-nil means prompt for user name and site.
-+Second arg is file name of change log. If nil, uses `change-log-default-name'.
-+Third arg OTHER-WINDOW non-nil means visit in other window.
-+Fourth arg NEW-ENTRY non-nil means always create a new entry at the front;
-+never append to an existing entry."
-+ (interactive (list current-prefix-arg
-+ (prompt-for-change-log-name)))
-+ (or add-log-full-name
-+ (setq add-log-full-name (user-full-name)))
-+ (or add-log-mailing-address
-+ (setq add-log-mailing-address user-mail-address))
-+ (if whoami
-+ (progn
-+ (setq add-log-full-name (read-input "Full name: " add-log-full-name))
-+ ;; Note that some sites have room and phone number fields in
-+ ;; full name which look silly when inserted. Rather than do
-+ ;; anything about that here, let user give prefix argument so that
-+ ;; s/he can edit the full name field in prompter if s/he wants.
-+ (setq add-log-mailing-address
-+ (read-input "Mailing address: " add-log-mailing-address))))
-+ (let ((defun (funcall (or add-log-current-defun-function
-+ 'add-log-current-defun)))
-+ paragraph-end entry)
-+
-+ (setq file-name (expand-file-name (find-change-log file-name)))
-+
-+ ;; Set ENTRY to the file name to use in the new entry.
-+ (and buffer-file-name
-+ ;; Never want to add a change log entry for the ChangeLog file itself.
-+ (not (string= buffer-file-name file-name))
-+ (setq entry (if (string-match
-+ (concat "^" (regexp-quote (file-name-directory
-+ file-name)))
-+ buffer-file-name)
-+ (substring buffer-file-name (match-end 0))
-+ (file-name-nondirectory buffer-file-name))))
-+
-+ (if (and other-window (not (equal file-name buffer-file-name)))
-+ (find-file-other-window file-name)
-+ (find-file file-name))
-+ (or (eq major-mode 'change-log-mode)
-+ (change-log-mode))
-+ (undo-boundary)
-+ (goto-char (point-min))
-+ (let ((heading (format "%s %s <%s>"
-+ (format-time-string "%Y-%m-%d")
-+ add-log-full-name
-+ add-log-mailing-address)))
-+ (if (looking-at (regexp-quote heading))
-+ (forward-line 1)
-+ (insert heading "\n\n")))
-+
-+ ;; Search only within the first paragraph.
-+ (if (looking-at "\n*[^\n* \t]")
-+ (skip-chars-forward "\n")
-+ (forward-paragraph 1))
-+ (setq paragraph-end (point))
-+ (goto-char (point-min))
-+
-+ ;; Now insert the new line for this entry.
-+ (cond ((re-search-forward "^\\s *\\*\\s *$" paragraph-end t)
-+ ;; Put this file name into the existing empty entry.
-+ (if entry
-+ (insert entry)))
-+ ((and (not new-entry)
-+ (let (case-fold-search)
-+ (re-search-forward
-+ (concat (regexp-quote (concat "* " entry))
-+ ;; Don't accept `foo.bar' when
-+ ;; looking for `foo':
-+ "\\(\\s \\|[(),:]\\)")
-+ paragraph-end t)))
-+ ;; Add to the existing entry for the same file.
-+ (re-search-forward "^\\s *$\\|^\\s \\*")
-+ (goto-char (match-beginning 0))
-+ ;; Delete excess empty lines; make just 2.
-+ (while (and (not (eobp)) (looking-at "^\\s *$"))
-+ (delete-region (point) (save-excursion (forward-line 1) (point))))
-+ (insert "\n\n")
-+ (forward-line -2)
-+ (indent-relative-maybe))
-+ (t
-+ ;; Make a new entry.
-+ (forward-line 1)
-+ (while (looking-at "\\sW")
-+ (forward-line 1))
-+ (while (and (not (eobp)) (looking-at "^\\s *$"))
-+ (delete-region (point) (save-excursion (forward-line 1) (point))))
-+ (insert "\n\n\n")
-+ (forward-line -2)
-+ (indent-to left-margin)
-+ (insert "* " (or entry ""))))
-+ ;; Now insert the function name, if we have one.
-+ ;; Point is at the entry for this file,
-+ ;; either at the end of the line or at the first blank line.
-+ (if defun
-+ (progn
-+ ;; Make it easy to get rid of the function name.
-+ (undo-boundary)
-+ (insert (if (save-excursion
-+ (beginning-of-line 1)
-+ (looking-at "\\s *$"))
-+ ""
-+ " ")
-+ "(" defun "): "))
-+ ;; No function name, so put in a colon unless we have just a star.
-+ (if (not (save-excursion
-+ (beginning-of-line 1)
-+ (looking-at "\\s *\\(\\*\\s *\\)?$")))
-+ (insert ": ")))))
-+
-+;;;###autoload
-+(defun add-change-log-entry-other-window (&optional whoami file-name)
-+ "Find change log file in other window and add an entry for today.
-+Optional arg (interactive prefix) non-nil means prompt for user name and site.
-+Second arg is file name of change log. \
-+If nil, uses `change-log-default-name'."
-+ (interactive (if current-prefix-arg
-+ (list current-prefix-arg
-+ (prompt-for-change-log-name))))
-+ (add-change-log-entry whoami file-name t))
-+;;;###autoload (define-key ctl-x-4-map "a" 'add-change-log-entry-other-window)
-+
-+;;;###autoload
-+(defun change-log-mode ()
-+ "Major mode for editing change logs; like Indented Text Mode.
-+Prevents numeric backups and sets `left-margin' to 8 and `fill-column' to 74.
-+New log entries are usually made with \\[add-change-log-entry] or \\[add-change-log-entry-other-window].
-+Each entry behaves as a paragraph, and the entries for one day as a page.
-+Runs `change-log-mode-hook'."
-+ (interactive)
-+ (kill-all-local-variables)
-+ (indented-text-mode)
-+ (setq major-mode 'change-log-mode
-+ mode-name "Change Log"
-+ left-margin 8
-+ fill-column 74
-+ indent-tabs-mode t
-+ tab-width 8)
-+ (use-local-map change-log-mode-map)
-+ ;; Let each entry behave as one paragraph:
-+ ;; We really do want "^" in paragraph-start below: it is only the lines that
-+ ;; begin at column 0 (despite the left-margin of 8) that we are looking for.
-+ (set (make-local-variable 'paragraph-start) "\\s *$\\|\f\\|^\\sw")
-+ (set (make-local-variable 'paragraph-separate) "\\s *$\\|\f\\|^\\sw")
-+ ;; Let all entries for one day behave as one page.
-+ ;; Match null string on the date-line so that the date-line
-+ ;; is grouped with what follows.
-+ (set (make-local-variable 'page-delimiter) "^\\<\\|^\f")
-+ (set (make-local-variable 'version-control) 'never)
-+ (set (make-local-variable 'adaptive-fill-regexp) "\\s *")
-+ (set (make-local-variable 'font-lock-defaults)
-+ '(change-log-font-lock-keywords t))
-+ (run-hooks 'change-log-mode-hook))
-+
-+;; It might be nice to have a general feature to replace this. The idea I
-+;; have is a variable giving a regexp matching text which should not be
-+;; moved from bol by filling. change-log-mode would set this to "^\\s *\\s(".
-+;; But I don't feel up to implementing that today.
-+(defun change-log-fill-paragraph (&optional justify)
-+ "Fill the paragraph, but preserve open parentheses at beginning of lines.
-+Prefix arg means justify as well."
-+ (interactive "P")
-+ (let ((end (save-excursion (forward-paragraph) (point)))
-+ (beg (save-excursion (backward-paragraph)(point)))
-+ (paragraph-start (concat paragraph-start "\\|\\s *\\s(")))
-+ (fill-region beg end justify)))
-+
-+(defvar add-log-current-defun-header-regexp
-+ "^\\([A-Z][A-Z_ ]*[A-Z_]\\|[-_a-zA-Z]+\\)[ \t]*[:=]"
-+ "*Heuristic regexp used by `add-log-current-defun' for unknown major modes.")
-+
-+;;;###autoload
-+(defun add-log-current-defun ()
-+ "Return name of function definition point is in, or nil.
-+
-+Understands C, Lisp, LaTeX (\"functions\" are chapters, sections, ...),
-+Texinfo (@node titles), Perl, and Fortran.
-+
-+Other modes are handled by a heuristic that looks in the 10K before
-+point for uppercase headings starting in the first column or
-+identifiers followed by `:' or `=', see variable
-+`add-log-current-defun-header-regexp'.
-+
-+Has a preference of looking backwards."
-+ (condition-case nil
-+ (save-excursion
-+ (let ((location (point)))
-+ (cond ((memq major-mode '(emacs-lisp-mode lisp-mode scheme-mode
-+ lisp-interaction-mode))
-+ ;; If we are now precisely at the beginning of a defun,
-+ ;; make sure beginning-of-defun finds that one
-+ ;; rather than the previous one.
-+ (or (eobp) (forward-char 1))
-+ (beginning-of-defun)
-+ ;; Make sure we are really inside the defun found, not after it.
-+ (if (and (looking-at "\\s(")
-+ (progn (end-of-defun)
-+ (< location (point)))
-+ (progn (forward-sexp -1)
-+ (>= location (point))))
-+ (progn
-+ (if (looking-at "\\s(")
-+ (forward-char 1))
-+ (forward-sexp 1)
-+ (skip-chars-forward " '")
-+ (buffer-substring (point)
-+ (progn (forward-sexp 1) (point))))))
-+ ((and (memq major-mode '(c-mode c++-mode c++-c-mode objc-mode))
-+ (save-excursion (beginning-of-line)
-+ ;; Use eq instead of = here to avoid
-+ ;; error when at bob and char-after
-+ ;; returns nil.
-+ (while (eq (char-after (- (point) 2)) ?\\)
-+ (forward-line -1))
-+ (looking-at "[ \t]*#[ \t]*define[ \t]")))
-+ ;; Handle a C macro definition.
-+ (beginning-of-line)
-+ (while (eq (char-after (- (point) 2)) ?\\) ;not =; note above
-+ (forward-line -1))
-+ (search-forward "define")
-+ (skip-chars-forward " \t")
-+ (buffer-substring (point)
-+ (progn (forward-sexp 1) (point))))
-+ ((memq major-mode '(c-mode c++-mode c++-c-mode objc-mode))
-+ (beginning-of-line)
-+ ;; See if we are in the beginning part of a function,
-+ ;; before the open brace. If so, advance forward.
-+ (while (not (looking-at "{\\|\\(\\s *$\\)"))
-+ (forward-line 1))
-+ (or (eobp)
-+ (forward-char 1))
-+ (beginning-of-defun)
-+ (if (progn (end-of-defun)
-+ (< location (point)))
-+ (progn
-+ (backward-sexp 1)
-+ (let (beg tem)
-+
-+ (forward-line -1)
-+ ;; Skip back over typedefs of arglist.
-+ (while (and (not (bobp))
-+ (looking-at "[ \t\n]"))
-+ (forward-line -1))
-+ ;; See if this is using the DEFUN macro used in Emacs,
-+ ;; or the DEFUN macro used by the C library.
-+ (if (condition-case nil
-+ (and (save-excursion
-+ (end-of-line)
-+ (while (= (preceding-char) ?\\)
-+ (end-of-line 2))
-+ (backward-sexp 1)
-+ (beginning-of-line)
-+ (setq tem (point))
-+ (looking-at "DEFUN\\b"))
-+ (>= location tem))
-+ (error nil))
-+ (progn
-+ (goto-char tem)
-+ (down-list 1)
-+ (if (= (char-after (point)) ?\")
-+ (progn
-+ (forward-sexp 1)
-+ (skip-chars-forward " ,")))
-+ (buffer-substring (point)
-+ (progn (forward-sexp 1) (point))))
-+ (if (looking-at "^[+-]")
-+ (get-method-definition)
-+ ;; Ordinary C function syntax.
-+ (setq beg (point))
-+ (if (and (condition-case nil
-+ ;; Protect against "Unbalanced parens" error.
-+ (progn
-+ (down-list 1) ; into arglist
-+ (backward-up-list 1)
-+ (skip-chars-backward " \t")
-+ t)
-+ (error nil))
-+ ;; Verify initial pos was after
-+ ;; real start of function.
-+ (save-excursion
-+ (goto-char beg)
-+ ;; For this purpose, include the line
-+ ;; that has the decl keywords. This
-+ ;; may also include some of the
-+ ;; comments before the function.
-+ (while (and (not (bobp))
-+ (save-excursion
-+ (forward-line -1)
-+ (looking-at "[^\n\f]")))
-+ (forward-line -1))
-+ (>= location (point)))
-+ ;; Consistency check: going down and up
-+ ;; shouldn't take us back before BEG.
-+ (> (point) beg))
-+ (let (end middle)
-+ ;; Don't include any final newline
-+ ;; in the name we use.
-+ (if (= (preceding-char) ?\n)
-+ (forward-char -1))
-+ (setq end (point))
-+ (backward-sexp 1)
-+ ;; Now find the right beginning of the name.
-+ ;; Include certain keywords if they
-+ ;; precede the name.
-+ (setq middle (point))
-+ (forward-word -1)
-+ ;; Ignore these subparts of a class decl
-+ ;; and move back to the class name itself.
-+ (while (looking-at "public \\|private ")
-+ (skip-chars-backward " \t:")
-+ (setq end (point))
-+ (backward-sexp 1)
-+ (setq middle (point))
-+ (forward-word -1))
-+ (and (bolp)
-+ (looking-at "struct \\|union \\|class ")
-+ (setq middle (point)))
-+ (buffer-substring middle end)))))))))
-+ ((memq major-mode
-+ '(TeX-mode plain-TeX-mode LaTeX-mode;; tex-mode.el
-+ plain-tex-mode latex-mode;; cmutex.el
-+ ))
-+ (if (re-search-backward
-+ "\\\\\\(sub\\)*\\(section\\|paragraph\\|chapter\\)" nil t)
-+ (progn
-+ (goto-char (match-beginning 0))
-+ (buffer-substring (1+ (point));; without initial backslash
-+ (progn
-+ (end-of-line)
-+ (point))))))
-+ ((eq major-mode 'texinfo-mode)
-+ (if (re-search-backward "^@node[ \t]+\\([^,\n]+\\)" nil t)
-+ (buffer-substring (match-beginning 1)
-+ (match-end 1))))
-+ ((eq major-mode 'perl-mode)
-+ (if (re-search-backward "^sub[ \t]+\\([^ \t\n]+\\)" nil t)
-+ (buffer-substring (match-beginning 1)
-+ (match-end 1))))
-+ ((eq major-mode 'fortran-mode)
-+ ;; must be inside function body for this to work
-+ (beginning-of-fortran-subprogram)
-+ (let ((case-fold-search t)) ; case-insensitive
-+ ;; search for fortran subprogram start
-+ (if (re-search-forward
-+ "^[ \t]*\\(program\\|subroutine\\|function\
-+\\|[ \ta-z0-9*]*[ \t]+function\\)"
-+ nil t)
-+ (progn
-+ ;; move to EOL or before first left paren
-+ (if (re-search-forward "[(\n]" nil t)
-+ (progn (forward-char -1)
-+ (skip-chars-backward " \t"))
-+ (end-of-line))
-+ ;; Use the name preceding that.
-+ (buffer-substring (point)
-+ (progn (forward-sexp -1)
-+ (point)))))))
-+ (t
-+ ;; If all else fails, try heuristics
-+ (let (case-fold-search)
-+ (end-of-line)
-+ (if (re-search-backward add-log-current-defun-header-regexp
-+ (- (point) 10000)
-+ t)
-+ (buffer-substring (match-beginning 1)
-+ (match-end 1))))))))
-+ (error nil)))
-+
-+(defvar get-method-definition-md)
-+
-+;; Subroutine used within get-method-definition.
-+;; Add the last match in the buffer to the end of `md',
-+;; followed by the string END; move to the end of that match.
-+(defun get-method-definition-1 (end)
-+ (setq get-method-definition-md
-+ (concat get-method-definition-md
-+ (buffer-substring (match-beginning 1) (match-end 1))
-+ end))
-+ (goto-char (match-end 0)))
-+
-+;; For objective C, return the method name if we are in a method.
-+(defun get-method-definition ()
-+ (let ((get-method-definition-md "["))
-+ (save-excursion
-+ (if (re-search-backward "^@implementation\\s-*\\([A-Za-z_]*\\)" nil t)
-+ (get-method-definition-1 " ")))
-+ (save-excursion
-+ (cond
-+ ((re-search-forward "^\\([-+]\\)[ \t\n\f\r]*\\(([^)]*)\\)?\\s-*" nil t)
-+ (get-method-definition-1 "")
-+ (while (not (looking-at "[{;]"))
-+ (looking-at
-+ "\\([A-Za-z_]*:?\\)\\s-*\\(([^)]*)\\)?[A-Za-z_]*[ \t\n\f\r]*")
-+ (get-method-definition-1 ""))
-+ (concat get-method-definition-md "]"))))))
-+
-+
-+(provide 'add-log)
-+
-+;;; add-log.el ends here
-diff -Nur binutils-2.24.orig/etc/add-log.vi binutils-2.24/etc/add-log.vi
---- binutils-2.24.orig/etc/add-log.vi 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/etc/add-log.vi 2016-06-30 21:26:12.681894201 +0200
-@@ -0,0 +1,11 @@
-+Here is a vi macro to create entries in the recommended format for
-+GDB's ChangeLogs.
-+
-+map  1GO:r !date '+\%Y-\%m-\%d'2GA Jason Molenda (:r !whoamikJxA@:r !hostnameA)kJxkddjO * k$
-+
-+It contains control and escape sequences, so don't just cut and paste it.
-+You'll need to change the "Jason Molenda" bit, of course. :-) Put this
-+in your $HOME/.exrc and when you type control-X in move-around-mode,
-+you'll have a changelog template inserted.
-+
-+--- Jason Molenda
-diff -Nur binutils-2.24.orig/etc/configure.info binutils-2.24/etc/configure.info
---- binutils-2.24.orig/etc/configure.info 2013-11-18 09:49:32.000000000 +0100
-+++ binutils-2.24/etc/configure.info 1970-01-01 01:00:00.000000000 +0100
-@@ -1,2773 +0,0 @@
--This is configure.info, produced by makeinfo version 4.8 from
--./configure.texi.
--
--INFO-DIR-SECTION GNU admin
--START-INFO-DIR-ENTRY
--* configure: (configure). The GNU configure and build system
--END-INFO-DIR-ENTRY
--
-- This file documents the GNU configure and build system.
--
-- Copyright (C) 1998 Cygnus Solutions.
--
-- Permission is granted to make and distribute verbatim copies of this
--manual provided the copyright notice and this permission notice are
--preserved on all copies.
--
-- Permission is granted to copy and distribute modified versions of
--this manual under the conditions for verbatim copying, provided that
--the entire resulting derived work is distributed under the terms of a
--permission notice identical to this one.
--
-- Permission is granted to copy and distribute translations of this
--manual into another language, under the above conditions for modified
--versions, except that this permission notice may be stated in a
--translation approved by the Foundation.
--
--
--File: configure.info, Node: Top, Next: Introduction, Up: (dir)
--
--GNU configure and build system
--******************************
--
--The GNU configure and build system.
--
--* Menu:
--
--* Introduction:: Introduction.
--* Getting Started:: Getting Started.
--* Files:: Files.
--* Configuration Names:: Configuration Names.
--* Cross Compilation Tools:: Cross Compilation Tools.
--* Canadian Cross:: Canadian Cross.
--* Cygnus Configure:: Cygnus Configure.
--* Multilibs:: Multilibs.
--* FAQ:: Frequently Asked Questions.
--* Index:: Index.
--
--
--File: configure.info, Node: Introduction, Next: Getting Started, Prev: Top, Up: Top
--
--1 Introduction
--**************
--
--This document describes the GNU configure and build systems. It
--describes how autoconf, automake, libtool, and make fit together. It
--also includes a discussion of the older Cygnus configure system.
--
-- This document does not describe in detail how to use each of the
--tools; see the respective manuals for that. Instead, it describes
--which files the developer must write, which files are machine generated
--and how they are generated, and where certain common problems should be
--addressed.
--
-- This document draws on several sources, including the autoconf
--manual by David MacKenzie (*note autoconf overview: (autoconf)Top.),
--the automake manual by David MacKenzie and Tom Tromey (*note automake
--overview: (automake)Top.), the libtool manual by Gordon Matzigkeit
--(*note libtool overview: (libtool)Top.), and the Cygnus configure
--manual by K. Richard Pixley.
--
--* Menu:
--
--* Goals:: Goals.
--* Tools:: The tools.
--* History:: History.
--* Building:: Building.
--
--
--File: configure.info, Node: Goals, Next: Tools, Up: Introduction
--
--1.1 Goals
--=========
--
--The GNU configure and build system has two main goals.
--
-- The first is to simplify the development of portable programs. The
--system permits the developer to concentrate on writing the program,
--simplifying many details of portability across Unix and even Windows
--systems, and permitting the developer to describe how to build the
--program using simple rules rather than complex Makefiles.
--
-- The second is to simplify the building of programs distributed as
--source code. All programs are built using a simple, standardized, two
--step process. The program builder need not install any special tools in
--order to build the program.
--
--
--File: configure.info, Node: Tools, Next: History, Prev: Goals, Up: Introduction
--
--1.2 Tools
--=========
--
--The GNU configure and build system is comprised of several different
--tools. Program developers must build and install all of these tools.
--
-- People who just want to build programs from distributed sources
--normally do not need any special tools beyond a Unix shell, a make
--program, and a C compiler.
--
--autoconf
-- provides a general portability framework, based on testing the
-- features of the host system at build time.
--
--automake
-- a system for describing how to build a program, permitting the
-- developer to write a simplified `Makefile'.
--
--libtool
-- a standardized approach to building shared libraries.
--
--gettext
-- provides a framework for translation of text messages into other
-- languages; not really discussed in this document.
--
--m4
-- autoconf requires the GNU version of m4; the standard Unix m4 does
-- not suffice.
--
--perl
-- automake requires perl.
--
--
--File: configure.info, Node: History, Next: Building, Prev: Tools, Up: Introduction
--
--1.3 History
--===========
--
--This is a very brief and probably inaccurate history.
--
-- As the number of Unix variants increased during the 1980s, it became
--harder to write programs which could run on all variants. While it was
--often possible to use `#ifdef' to identify particular systems,
--developers frequently did not have access to every system, and the
--characteristics of some systems changed from version to version.
--
-- By 1992, at least three different approaches had been developed:
-- * The Metaconfig program, by Larry Wall, Harlan Stenn, and Raphael
-- Manfredi.
--
-- * The Cygnus configure script, by K. Richard Pixley, and the gcc
-- configure script, by Richard Stallman. These use essentially the
-- same approach, and the developers communicated regularly.
--
-- * The autoconf program, by David MacKenzie.
--
-- The Metaconfig program is still used for Perl and a few other
--programs. It is part of the Dist package. I do not know if it is
--being developed.
--
-- In 1994, David MacKenzie and others modified autoconf to incorporate
--all the features of Cygnus configure. Since then, there has been a
--slow but steady conversion of GNU programs from Cygnus configure to
--autoconf. gcc has been converted, eliminating the gcc configure script.
--
-- GNU autoconf was regularly maintained until late 1996. As of this
--writing in June, 1998, it has no public maintainer.
--
-- Most programs are built using the make program, which requires the
--developer to write Makefiles describing how to build the programs.
--Since most programs are built in pretty much the same way, this led to a
--lot of duplication.
--
-- The X Window system is built using the imake tool, which uses a
--database of rules to eliminate the duplication. However, building a
--tool which was developed using imake requires that the builder have
--imake installed, violating one of the goals of the GNU system.
--
-- The new BSD make provides a standard library of Makefile fragments,
--which permits developers to write very simple Makefiles. However, this
--requires that the builder install the new BSD make program.
--
-- In 1994, David MacKenzie wrote the first version of automake, which
--permitted writing a simple build description which was converted into a
--Makefile which could be used by the standard make program. In 1995, Tom
--Tromey completely rewrote automake in Perl, and he continues to enhance
--it.
--
-- Various free packages built libraries, and by around 1995 several
--included support to build shared libraries on various platforms.
--However, there was no consistent approach. In early 1996, Gordon
--Matzigkeit began working on libtool, which provided a standardized
--approach to building shared libraries. This was integrated into
--automake from the start.
--
-- The development of automake and libtool was driven by the GNITS
--project, a group of GNU maintainers who designed standardized tools to
--help meet the GNU coding standards.
--
--
--File: configure.info, Node: Building, Prev: History, Up: Introduction
--
--1.4 Building
--============
--
--Most readers of this document should already know how to build a tool by
--running `configure' and `make'. This section may serve as a quick
--introduction or reminder.
--
-- Building a tool is normally as simple as running `configure'
--followed by `make'. You should normally run `configure' from an empty
--directory, using some path to refer to the `configure' script in the
--source directory. The directory in which you run `configure' is called
--the "object directory".
--
-- In order to use a object directory which is different from the source
--directory, you must be using the GNU version of `make', which has the
--required `VPATH' support. Despite this restriction, using a different
--object directory is highly recommended:
-- * It keeps the files generated during the build from cluttering up
-- your sources.
--
-- * It permits you to remove the built files by simply removing the
-- entire build directory.
--
-- * It permits you to build from the same sources with several sets of
-- configure options simultaneously.
--
-- If you don't have GNU `make', you will have to run `configure' in
--the source directory. All GNU packages should support this; in
--particular, GNU packages should not assume the presence of GNU `make'.
--
-- After running `configure', you can build the tools by running `make'.
--
-- To install the tools, run `make install'. Installing the tools will
--copy the programs and any required support files to the "installation
--directory". The location of the installation directory is controlled
--by `configure' options, as described below.
--
-- In the Cygnus tree at present, the info files are built and
--installed as a separate step. To build them, run `make info'. To
--install them, run `make install-info'. The equivalent html files are
--also built and installed in a separate step. To build the html files,
--run `make html'. To install the html files run `make install-html'.
--
-- All `configure' scripts support a wide variety of options. The most
--interesting ones are `--with' and `--enable' options which are
--generally specific to particular tools. You can usually use the
--`--help' option to get a list of interesting options for a particular
--configure script.
--
-- The only generic options you are likely to use are the `--prefix'
--and `--exec-prefix' options. These options are used to specify the
--installation directory.
--
-- The directory named by the `--prefix' option will hold machine
--independent files such as info files.
--
-- The directory named by the `--exec-prefix' option, which is normally
--a subdirectory of the `--prefix' directory, will hold machine dependent
--files such as executables.
--
-- The default for `--prefix' is `/usr/local'. The default for
--`--exec-prefix' is the value used for `--prefix'.
--
-- The convention used in Cygnus releases is to use a `--prefix' option
--of `/usr/cygnus/RELEASE', where RELEASE is the name of the release, and
--to use a `--exec-prefix' option of `/usr/cygnus/RELEASE/H-HOST', where
--HOST is the configuration name of the host system (*note Configuration
--Names::).
--
-- Do not use either the source or the object directory as the
--installation directory. That will just lead to confusion.
--
--
--File: configure.info, Node: Getting Started, Next: Files, Prev: Introduction, Up: Top
--
--2 Getting Started
--*****************
--
--To start using the GNU configure and build system with your software
--package, you must write three files, and you must run some tools to
--manually generate additional files.
--
--* Menu:
--
--* Write configure.in:: Write configure.in.
--* Write Makefile.am:: Write Makefile.am.
--* Write acconfig.h:: Write acconfig.h.
--* Generate files:: Generate files.
--* Getting Started Example:: Example.
--
--
--File: configure.info, Node: Write configure.in, Next: Write Makefile.am, Up: Getting Started
--
--2.1 Write configure.in
--======================
--
--You must first write the file `configure.in'. This is an autoconf
--input file, and the autoconf manual describes in detail what this file
--should look like.
--
-- You will write tests in your `configure.in' file to check for
--conditions that may change from one system to another, such as the
--presence of particular header files or functions.
--
-- For example, not all systems support the `gettimeofday' function.
--If you want to use the `gettimeofday' function when it is available,
--and to use some other function when it is not, you would check for this
--by putting `AC_CHECK_FUNCS(gettimeofday)' in `configure.in'.
--
-- When the configure script is run at build time, this will arrange to
--define the preprocessor macro `HAVE_GETTIMEOFDAY' to the value 1 if the
--`gettimeofday' function is available, and to not define the macro at
--all if the function is not available. Your code can then use `#ifdef'
--to test whether it is safe to call `gettimeofday'.
--
-- If you have an existing body of code, the `autoscan' program may
--help identify potential portability problems, and hence configure tests
--that you will want to use. *Note Invoking autoscan: (autoconf)Invoking
--autoscan.
--
-- Another handy tool for an existing body of code is `ifnames'. This
--will show you all the preprocessor conditionals that the code already
--uses. *Note Invoking ifnames: (autoconf)Invoking ifnames.
--
-- Besides the portability tests which are specific to your particular
--package, every `configure.in' file should contain the following macros.
--
--`AC_INIT'
-- This macro takes a single argument, which is the name of a file in
-- your package. For example, `AC_INIT(foo.c)'.
--
--`AC_PREREQ(VERSION)'
-- This macro is optional. It may be used to indicate the version of
-- `autoconf' that you are using. This will prevent users from
-- running an earlier version of `autoconf' and perhaps getting an
-- invalid `configure' script. For example, `AC_PREREQ(2.12)'.
--
--`AM_INIT_AUTOMAKE'
-- This macro takes two arguments: the name of the package, and a
-- version number. For example, `AM_INIT_AUTOMAKE(foo, 1.0)'. (This
-- macro is not needed if you are not using automake).
--
--`AM_CONFIG_HEADER'
-- This macro names the header file which will hold the preprocessor
-- macro definitions at run time. Normally this should be
-- `config.h'. Your sources would then use `#include "config.h"' to
-- include it.
--
-- This macro may optionally name the input file for that header
-- file; by default, this is `config.h.in', but that file name works
-- poorly on DOS filesystems. Therefore, it is often better to name
-- it explicitly as `config.in'.
--
-- This is what you should normally put in `configure.in':
-- AM_CONFIG_HEADER(config.h:config.in)
--
-- (If you are not using automake, use `AC_CONFIG_HEADER' rather than
-- `AM_CONFIG_HEADER').
--
--`AM_MAINTAINER_MODE'
-- This macro always appears in Cygnus configure scripts. Other
-- programs may or may not use it.
--
-- If this macro is used, the `--enable-maintainer-mode' option is
-- required to enable automatic rebuilding of generated files used by
-- the configure system. This of course requires that developers be
-- aware of, and use, that option.
--
-- If this macro is not used, then the generated files will always be
-- rebuilt automatically. This will cause problems if the wrong
-- versions of autoconf, automake, or others are in the builder's
-- `PATH'.
--
-- (If you are not using automake, you do not need to use this macro).
--
--`AC_EXEEXT'
-- Either this macro or `AM_EXEEXT' always appears in Cygnus configure
-- files. Other programs may or may not use one of them.
--
-- This macro looks for the executable suffix used on the host
-- system. On Unix systems, this is the empty string. On Windows
-- systems, this is `.exe'. This macro directs automake to use the
-- executable suffix as appropriate when creating programs. This
-- macro does not take any arguments.
--
-- The `AC_EXEEXT' form is new, and is part of a Cygnus patch to
-- autoconf to support compiling with Visual C++. Older programs use
-- `AM_EXEEXT' instead.
--
-- (Programs which do not use automake use neither `AC_EXEEXT' nor
-- `AM_EXEEXT').
--
--`AC_PROG_CC'
-- If you are writing C code, you will normally want to use this
-- macro. It locates the C compiler to use. It does not take any
-- arguments.
--
-- However, if this `configure.in' file is for a library which is to
-- be compiled by a cross compiler which may not fully work, then you
-- will not want to use `AC_PROG_CC'. Instead, you will want to use a
-- variant which does not call the macro `AC_PROG_CC_WORKS'. Examples
-- can be found in various `configure.in' files for libraries that are
-- compiled with cross compilers, such as libiberty or libgloss.
-- This is essentially a bug in autoconf, and there will probably be
-- a better workaround at some point.
--
--`AC_PROG_CXX'
-- If you are writing C++ code, you will want to use this macro. It
-- locates the C++ compiler to use. It does not take any arguments.
-- The same cross compiler comments apply as for `AC_PROG_CC'.
--
--`AM_PROG_LIBTOOL'
-- If you want to build libraries, and you want to permit them to be
-- shared, or you want to link against libraries which were built
-- using libtool, then you will need this macro. This macro is
-- required in order to use libtool.
--
-- By default, this will cause all libraries to be built as shared
-- libraries. To prevent this-to change the default-use
-- `AM_DISABLE_SHARED' before `AM_PROG_LIBTOOL'. The configure
-- options `--enable-shared' and `--disable-shared' may be used to
-- override the default at build time.
--
--`AC_DEFINE(_GNU_SOURCE)'
-- GNU packages should normally include this line before any other
-- feature tests. This defines the macro `_GNU_SOURCE' when
-- compiling, which directs the libc header files to provide the
-- standard GNU system interfaces including all GNU extensions. If
-- this macro is not defined, certain GNU extensions may not be
-- available.
--
--`AC_OUTPUT'
-- This macro takes a list of file names which the configure process
-- should produce. This is normally a list of one or more `Makefile'
-- files in different directories. If your package lives entirely in
-- a single directory, you would use simply `AC_OUTPUT(Makefile)'.
-- If you also have, for example, a `lib' subdirectory, you would use
-- `AC_OUTPUT(Makefile lib/Makefile)'.
--
-- If you want to use locally defined macros in your `configure.in'
--file, then you will need to write a `acinclude.m4' file which defines
--them (if not using automake, this file is called `aclocal.m4').
--Alternatively, you can put separate macros in an `m4' subdirectory, and
--put `ACLOCAL_AMFLAGS = -I m4' in your `Makefile.am' file so that the
--`aclocal' program will be able to find them.
--
-- The different macro prefixes indicate which tool defines the macro.
--Macros which start with `AC_' are part of autoconf. Macros which start
--with `AM_' are provided by automake or libtool.
--
--
--File: configure.info, Node: Write Makefile.am, Next: Write acconfig.h, Prev: Write configure.in, Up: Getting Started
--
--2.2 Write Makefile.am
--=====================
--
--You must write the file `Makefile.am'. This is an automake input file,
--and the automake manual describes in detail what this file should look
--like.
--
-- The automake commands in `Makefile.am' mostly look like variable
--assignments in a `Makefile'. automake recognizes special variable
--names, and automatically add make rules to the output as needed.
--
-- There will be one `Makefile.am' file for each directory in your
--package. For each directory with subdirectories, the `Makefile.am'
--file should contain the line
-- SUBDIRS = DIR DIR ...
-- where each DIR is the name of a subdirectory.
--
-- For each `Makefile.am', there should be a corresponding `Makefile'
--in the `AC_OUTPUT' macro in `configure.in'.
--
-- Every `Makefile.am' written at Cygnus should contain the line
-- AUTOMAKE_OPTIONS = cygnus
-- This puts automake into Cygnus mode. See the automake manual for
--details.
--
-- You may to include the version number of `automake' that you are
--using on the `AUTOMAKE_OPTIONS' line. For example,
-- AUTOMAKE_OPTIONS = cygnus 1.3
-- This will prevent users from running an earlier version of
--`automake' and perhaps getting an invalid `Makefile.in'.
--
-- If your package builds a program, then in the directory where that
--program is built you will normally want a line like
-- bin_PROGRAMS = PROGRAM
-- where PROGRAM is the name of the program. You will then want a line
--like
-- PROGRAM_SOURCES = FILE FILE ...
-- where each FILE is the name of a source file to link into the
--program (e.g., `foo.c').
--
-- If your package builds a library, and you do not want the library to
--ever be built as a shared library, then in the directory where that
--library is built you will normally want a line like
-- lib_LIBRARIES = libNAME.a
-- where `libNAME.a' is the name of the library. You will then want a
--line like
-- libNAME_a_SOURCES = FILE FILE ...
-- where each FILE is the name of a source file to add to the library.
--
-- If your package builds a library, and you want to permit building the
--library as a shared library, then in the directory where that library is
--built you will normally want a line like
-- lib_LTLIBRARIES = libNAME.la
-- The use of `LTLIBRARIES', and the `.la' extension, indicate a
--library to be built using libtool. As usual, you will then want a line
--like
-- libNAME_la_SOURCES = FILE FILE ...
--
-- The strings `bin' and `lib' that appear above in `bin_PROGRAMS' and
--`lib_LIBRARIES' are not arbitrary. They refer to particular
--directories, which may be set by the `--bindir' and `--libdir' options
--to `configure'. If those options are not used, the default values are
--based on the `--prefix' or `--exec-prefix' options to `configure'. It
--is possible to use other names if the program or library should be
--installed in some other directory.
--
-- The `Makefile.am' file may also contain almost anything that may
--appear in a normal `Makefile'. automake also supports many other
--special variables, as well as conditionals.
--
-- See the automake manual for more information.
--
--
--File: configure.info, Node: Write acconfig.h, Next: Generate files, Prev: Write Makefile.am, Up: Getting Started
--
--2.3 Write acconfig.h
--====================
--
--If you are generating a portability header file, (i.e., you are using
--`AM_CONFIG_HEADER' in `configure.in'), then you will have to write a
--`acconfig.h' file. It will have to contain the following lines.
--
-- /* Name of package. */
-- #undef PACKAGE
--
-- /* Version of package. */
-- #undef VERSION
--
-- This requirement is really a bug in the system, and the requirement
--may be eliminated at some later date.
--
-- The `acconfig.h' file will also similar comment and `#undef' lines
--for any unusual macros in the `configure.in' file, including any macro
--which appears in a `AC_DEFINE' macro.
--
-- In particular, if you are writing a GNU package and therefore include
--`AC_DEFINE(_GNU_SOURCE)' in `configure.in' as suggested above, you will
--need lines like this in `acconfig.h':
-- /* Enable GNU extensions. */
-- #undef _GNU_SOURCE
--
-- Normally the `autoheader' program will inform you of any such
--requirements by printing an error message when it is run. However, if
--you do anything particular odd in your `configure.in' file, you will
--have to make sure that the right entries appear in `acconfig.h', since
--otherwise the results of the tests may not be available in the
--`config.h' file which your code will use.
--
-- (Thee `PACKAGE' and `VERSION' lines are not required if you are not
--using automake, and in that case you may not need a `acconfig.h' file
--at all).
--
--
--File: configure.info, Node: Generate files, Next: Getting Started Example, Prev: Write acconfig.h, Up: Getting Started
--
--2.4 Generate files
--==================
--
--Once you have written `configure.in', `Makefile.am', `acconfig.h', and
--possibly `acinclude.m4', you must use autoconf and automake programs to
--produce the first versions of the generated files. This is done by
--executing the following sequence of commands.
--
-- aclocal
-- autoconf
-- autoheader
-- automake
--
-- The `aclocal' and `automake' commands are part of the automake
--package, and the `autoconf' and `autoheader' commands are part of the
--autoconf package.
--
-- If you are using a `m4' subdirectory for your macros, you will need
--to use the `-I m4' option when you run `aclocal'.
--
-- If you are not using the Cygnus tree, use the `-a' option when
--running `automake' command in order to copy the required support files
--into your source directory.
--
-- If you are using libtool, you must build and install the libtool
--package with the same `--prefix' and `--exec-prefix' options as you
--used with the autoconf and automake packages. You must do this before
--running any of the above commands. If you are not using the Cygnus
--tree, you will need to run the `libtoolize' program to copy the libtool
--support files into your directory.
--
-- Once you have managed to run these commands without getting any
--errors, you should create a new empty directory, and run the `configure'
--script which will have been created by `autoconf' with the
--`--enable-maintainer-mode' option. This will give you a set of
--Makefiles which will include rules to automatically rebuild all the
--generated files.
--
-- After doing that, whenever you have changed some of the input files
--and want to regenerated the other files, go to your object directory
--and run `make'. Doing this is more reliable than trying to rebuild the
--files manually, because there are complex order dependencies and it is
--easy to forget something.
--
--
--File: configure.info, Node: Getting Started Example, Prev: Generate files, Up: Getting Started
--
--2.5 Example
--===========
--
--Let's consider a trivial example.
--
-- Suppose we want to write a simple version of `touch'. Our program,
--which we will call `poke', will take a single file name argument, and
--use the `utime' system call to set the modification and access times of
--the file to the current time. We want this program to be highly
--portable.
--
-- We'll first see what this looks like without using autoconf and
--automake, and then see what it looks like with them.
--
--* Menu:
--
--* Getting Started Example 1:: First Try.
--* Getting Started Example 2:: Second Try.
--* Getting Started Example 3:: Third Try.
--* Generate Files in Example:: Generate Files.
--
--
--File: configure.info, Node: Getting Started Example 1, Next: Getting Started Example 2, Up: Getting Started Example
--
--2.5.1 First Try
-----------------
--
--Here is our first try at `poke.c'. Note that we've written it without
--ANSI/ISO C prototypes, since we want it to be highly portable.
--
-- #include <stdio.h>
-- #include <stdlib.h>
-- #include <sys/types.h>
-- #include <utime.h>
--
-- int
-- main (argc, argv)
-- int argc;
-- char **argv;
-- {
-- if (argc != 2)
-- {
-- fprintf (stderr, "Usage: poke file\n");
-- exit (1);
-- }
--
-- if (utime (argv[1], NULL) < 0)
-- {
-- perror ("utime");
-- exit (1);
-- }
--
-- exit (0);
-- }
--
-- We also write a simple `Makefile'.
--
-- CC = gcc
-- CFLAGS = -g -O2
--
-- all: poke
--
-- poke: poke.o
-- $(CC) -o poke $(CFLAGS) $(LDFLAGS) poke.o
--
-- So far, so good.
--
-- Unfortunately, there are a few problems.
--
-- On older Unix systems derived from BSD 4.3, the `utime' system call
--does not accept a second argument of `NULL'. On those systems, we need
--to pass a pointer to `struct utimbuf' structure. Unfortunately, even
--older systems don't define that structure; on those systems, we need to
--pass an array of two `long' values.
--
-- The header file `stdlib.h' was invented by ANSI C, and older systems
--don't have a copy. We included it above to get a declaration of `exit'.
--
-- We can find some of these portability problems by running
--`autoscan', which will create a `configure.scan' file which we can use
--as a prototype for our `configure.in' file. I won't show the output,
--but it will notice the potential problems with `utime' and `stdlib.h'.
--
-- In our `Makefile', we don't provide any way to install the program.
--This doesn't matter much for such a simple example, but a real program
--will need an `install' target. For that matter, we will also want a
--`clean' target.
--
--
--File: configure.info, Node: Getting Started Example 2, Next: Getting Started Example 3, Prev: Getting Started Example 1, Up: Getting Started Example
--
--2.5.2 Second Try
------------------
--
--Here is our second try at this program.
--
-- We modify `poke.c' to use preprocessor macros to control what
--features are available. (I've cheated a bit by using the same macro
--names which autoconf will use).
--
-- #include <stdio.h>
--
-- #ifdef STDC_HEADERS
-- #include <stdlib.h>
-- #endif
--
-- #include <sys/types.h>
--
-- #ifdef HAVE_UTIME_H
-- #include <utime.h>
-- #endif
--
-- #ifndef HAVE_UTIME_NULL
--
-- #include <time.h>
--
-- #ifndef HAVE_STRUCT_UTIMBUF
--
-- struct utimbuf
-- {
-- long actime;
-- long modtime;
-- };
--
-- #endif
--
-- static int
-- utime_now (file)
-- char *file;
-- {
-- struct utimbuf now;
--
-- now.actime = now.modtime = time (NULL);
-- return utime (file, &now);
-- }
--
-- #define utime(f, p) utime_now (f)
--
-- #endif /* HAVE_UTIME_NULL */
--
-- int
-- main (argc, argv)
-- int argc;
-- char **argv;
-- {
-- if (argc != 2)
-- {
-- fprintf (stderr, "Usage: poke file\n");
-- exit (1);
-- }
--
-- if (utime (argv[1], NULL) < 0)
-- {
-- perror ("utime");
-- exit (1);
-- }
--
-- exit (0);
-- }
--
-- Here is the associated `Makefile'. We've added support for the
--preprocessor flags we use. We've also added `install' and `clean'
--targets.
--
-- # Set this to your installation directory.
-- bindir = /usr/local/bin
--
-- # Uncomment this if you have the standard ANSI/ISO C header files.
-- # STDC_HDRS = -DSTDC_HEADERS
--
-- # Uncomment this if you have utime.h.
-- # UTIME_H = -DHAVE_UTIME_H
--
-- # Uncomment this if utime (FILE, NULL) works on your system.
-- # UTIME_NULL = -DHAVE_UTIME_NULL
--
-- # Uncomment this if struct utimbuf is defined in utime.h.
-- # UTIMBUF = -DHAVE_STRUCT_UTIMBUF
--
-- CC = gcc
-- CFLAGS = -g -O2
--
-- ALL_CFLAGS = $(STDC_HDRS) $(UTIME_H) $(UTIME_NULL) $(UTIMBUF) $(CFLAGS)
--
-- all: poke
--
-- poke: poke.o
-- $(CC) -o poke $(ALL_CFLAGS) $(LDFLAGS) poke.o
--
-- .c.o:
-- $(CC) -c $(ALL_CFLAGS) poke.c
--
-- install: poke
-- cp poke $(bindir)/poke
--
-- clean:
-- rm poke poke.o
--
-- Some problems with this approach should be clear.
--
-- Users who want to compile poke will have to know how `utime' works
--on their systems, so that they can uncomment the `Makefile' correctly.
--
-- The installation is done using `cp', but many systems have an
--`install' program which may be used, and which supports optional
--features such as stripping debugging information out of the installed
--binary.
--
-- The use of `Makefile' variables like `CC', `CFLAGS' and `LDFLAGS'
--follows the requirements of the GNU standards. This is convenient for
--all packages, since it reduces surprises for users. However, it is
--easy to get the details wrong, and wind up with a slightly nonstandard
--distribution.
--
--
--File: configure.info, Node: Getting Started Example 3, Next: Generate Files in Example, Prev: Getting Started Example 2, Up: Getting Started Example
--
--2.5.3 Third Try
-----------------
--
--For our third try at this program, we will write a `configure.in'
--script to discover the configuration features on the host system, rather
--than requiring the user to edit the `Makefile'. We will also write a
--`Makefile.am' rather than a `Makefile'.
--
-- The only change to `poke.c' is to add a line at the start of the
--file:
-- #include "config.h"
--
-- The new `configure.in' file is as follows.
--
-- AC_INIT(poke.c)
-- AM_INIT_AUTOMAKE(poke, 1.0)
-- AM_CONFIG_HEADER(config.h:config.in)
-- AC_PROG_CC
-- AC_HEADER_STDC
-- AC_CHECK_HEADERS(utime.h)
-- AC_EGREP_HEADER(utimbuf, utime.h, AC_DEFINE(HAVE_STRUCT_UTIMBUF))
-- AC_FUNC_UTIME_NULL
-- AC_OUTPUT(Makefile)
--
-- The first four macros in this file, and the last one, were described
--above; see *Note Write configure.in::. If we omit these macros, then
--when we run `automake' we will get a reminder that we need them.
--
-- The other macros are standard autoconf macros.
--
--`AC_HEADER_STDC'
-- Check for standard C headers.
--
--`AC_CHECK_HEADERS'
-- Check whether a particular header file exists.
--
--`AC_EGREP_HEADER'
-- Check for a particular string in a particular header file, in this
-- case checking for `utimbuf' in `utime.h'.
--
--`AC_FUNC_UTIME_NULL'
-- Check whether `utime' accepts a NULL second argument to set the
-- file change time to the current time.
--
-- See the autoconf manual for a more complete description.
--
-- The new `Makefile.am' file is as follows. Note how simple this is
--compared to our earlier `Makefile'.
--
-- bin_PROGRAMS = poke
--
-- poke_SOURCES = poke.c
--
-- This means that we should build a single program name `poke'. It
--should be installed in the binary directory, which we called `bindir'
--earlier. The program `poke' is built from the source file `poke.c'.
--
-- We must also write a `acconfig.h' file. Besides `PACKAGE' and
--`VERSION', which must be mentioned for all packages which use automake,
--we must include `HAVE_STRUCT_UTIMBUF', since we mentioned it in an
--`AC_DEFINE'.
--
-- /* Name of package. */
-- #undef PACKAGE
--
-- /* Version of package. */
-- #undef VERSION
--
-- /* Whether utime.h defines struct utimbuf. */
-- #undef HAVE_STRUCT_UTIMBUF
--
--
--File: configure.info, Node: Generate Files in Example, Prev: Getting Started Example 3, Up: Getting Started Example
--
--2.5.4 Generate Files
----------------------
--
--We must now generate the other files, using the following commands.
--
-- aclocal
-- autoconf
-- autoheader
-- automake
--
-- When we run `autoheader', it will remind us of any macros we forgot
--to add to `acconfig.h'.
--
-- When we run `automake', it will want to add some files to our
--distribution. It will add them automatically if we use the
--`--add-missing' option.
--
-- By default, `automake' will run in GNU mode, which means that it
--will want us to create certain additional files; as of this writing, it
--will want `NEWS', `README', `AUTHORS', and `ChangeLog', all of which
--are files which should appear in a standard GNU distribution. We can
--either add those files, or run `automake' with the `--foreign' option.
--
-- Running these tools will generate the following files, all of which
--are described in the next chapter.
--
-- * `aclocal.m4'
--
-- * `configure'
--
-- * `config.in'
--
-- * `Makefile.in'
--
-- * `stamp-h.in'
--
--
--File: configure.info, Node: Files, Next: Configuration Names, Prev: Getting Started, Up: Top
--
--3 Files
--*******
--
--As was seen in the previous chapter, the GNU configure and build system
--uses a number of different files. The developer must write a few files.
--The others are generated by various tools.
--
-- The system is rather flexible, and can be used in many different
--ways. In describing the files that it uses, I will describe the common
--case, and mention some other cases that may arise.
--
--* Menu:
--
--* Developer Files:: Developer Files.
--* Build Files:: Build Files.
--* Support Files:: Support Files.
--
--
--File: configure.info, Node: Developer Files, Next: Build Files, Up: Files
--
--3.1 Developer Files
--===================
--
--This section describes the files written or generated by the developer
--of a package.
--
--* Menu:
--
--* Developer Files Picture:: Developer Files Picture.
--* Written Developer Files:: Written Developer Files.
--* Generated Developer Files:: Generated Developer Files.
--
--
--File: configure.info, Node: Developer Files Picture, Next: Written Developer Files, Up: Developer Files
--
--3.1.1 Developer Files Picture
-------------------------------
--
--Here is a picture of the files which are written by the developer, the
--generated files which would be included with a complete source
--distribution, and the tools which create those files. The file names
--are plain text and the tool names are enclosed by `*' characters (e.g.,
--`autoheader' is the name of a tool, not the name of a file).
--
-- acconfig.h configure.in Makefile.am
-- | | |
-- | --------------+---------------------- |
-- | | | | |
-- v v | acinclude.m4 | |
-- *autoheader* | | v v
-- | | v --->*automake*
-- v |--->*aclocal* | |
-- config.in | | | v
-- | v | Makefile.in
-- | aclocal.m4---
-- | |
-- v v
-- *autoconf*
-- |
-- v
-- configure
--
--
--File: configure.info, Node: Written Developer Files, Next: Generated Developer Files, Prev: Developer Files Picture, Up: Developer Files
--
--3.1.2 Written Developer Files
-------------------------------
--
--The following files would be written by the developer.
--
--`configure.in'
-- This is the configuration script. This script contains
-- invocations of autoconf macros. It may also contain ordinary
-- shell script code. This file will contain feature tests for
-- portability issues. The last thing in the file will normally be
-- an `AC_OUTPUT' macro listing which files to create when the
-- builder runs the configure script. This file is always required
-- when using the GNU configure system. *Note Write configure.in::.
--
--`Makefile.am'
-- This is the automake input file. It describes how the code should
-- be built. It consists of definitions of automake variables. It
-- may also contain ordinary Makefile targets. This file is only
-- needed when using automake (newer tools normally use automake, but
-- there are still older tools which have not been converted, in
-- which the developer writes `Makefile.in' directly). *Note Write
-- Makefile.am::.
--
--`acconfig.h'
-- When the configure script creates a portability header file, by
-- using `AM_CONFIG_HEADER' (or, if not using automake,
-- `AC_CONFIG_HEADER'), this file is used to describe macros which are
-- not recognized by the `autoheader' command. This is normally a
-- fairly uninteresting file, consisting of a collection of `#undef'
-- lines with comments. Normally any call to `AC_DEFINE' in
-- `configure.in' will require a line in this file. *Note Write
-- acconfig.h::.
--
--`acinclude.m4'
-- This file is not always required. It defines local autoconf
-- macros. These macros may then be used in `configure.in'. If you
-- don't need any local autoconf macros, then you don't need this
-- file at all. In fact, in general, you never need local autoconf
-- macros, since you can put everything in `configure.in', but
-- sometimes a local macro is convenient.
--
-- Newer tools may omit `acinclude.m4', and instead use a
-- subdirectory, typically named `m4', and define `ACLOCAL_AMFLAGS =
-- -I m4' in `Makefile.am' to force `aclocal' to look there for macro
-- definitions. The macro definitions are then placed in separate
-- files in that directory.
--
-- The `acinclude.m4' file is only used when using automake; in older
-- tools, the developer writes `aclocal.m4' directly, if it is needed.
--
--
--File: configure.info, Node: Generated Developer Files, Prev: Written Developer Files, Up: Developer Files
--
--3.1.3 Generated Developer Files
---------------------------------
--
--The following files would be generated by the developer.
--
-- When using automake, these files are normally not generated manually
--after the first time. Instead, the generated `Makefile' contains rules
--to automatically rebuild the files as required. When
--`AM_MAINTAINER_MODE' is used in `configure.in' (the normal case in
--Cygnus code), the automatic rebuilding rules will only be defined if
--you configure using the `--enable-maintainer-mode' option.
--
-- When using automatic rebuilding, it is important to ensure that all
--the various tools have been built and installed on your `PATH'. Using
--automatic rebuilding is highly recommended, so much so that I'm not
--going to explain what you have to do if you don't use it.
--
--`configure'
-- This is the configure script which will be run when building the
-- package. This is generated by `autoconf' from `configure.in' and
-- `aclocal.m4'. This is a shell script.
--
--`Makefile.in'
-- This is the file which the configure script will turn into the
-- `Makefile' at build time. This file is generated by `automake'
-- from `Makefile.am'. If you aren't using automake, you must write
-- this file yourself. This file is pretty much a normal `Makefile',
-- with some configure substitutions for certain variables.
--
--`aclocal.m4'
-- This file is created by the `aclocal' program, based on the
-- contents of `configure.in' and `acinclude.m4' (or, as noted in the
-- description of `acinclude.m4' above, on the contents of an `m4'
-- subdirectory). This file contains definitions of autoconf macros
-- which `autoconf' will use when generating the file `configure'.
-- These autoconf macros may be defined by you in `acinclude.m4' or
-- they may be defined by other packages such as automake, libtool or
-- gettext. If you aren't using automake, you will normally write
-- this file yourself; in that case, if `configure.in' uses only
-- standard autoconf macros, this file will not be needed at all.
--
--`config.in'
-- This file is created by `autoheader' based on `acconfig.h' and
-- `configure.in'. At build time, the configure script will define
-- some of the macros in it to create `config.h', which may then be
-- included by your program. This permits your C code to use
-- preprocessor conditionals to change its behaviour based on the
-- characteristics of the host system. This file may also be called
-- `config.h.in'.
--
--`stamp.h-in'
-- This rather uninteresting file, which I omitted from the picture,
-- is generated by `automake'. It always contains the string
-- `timestamp'. It is used as a timestamp file indicating whether
-- `config.in' is up to date. Using a timestamp file means that
-- `config.in' can be marked as up to date without actually changing
-- its modification time. This is useful since `config.in' depends
-- upon `configure.in', but it is easy to change `configure.in' in a
-- way which does not affect `config.in'.
--
--
--File: configure.info, Node: Build Files, Next: Support Files, Prev: Developer Files, Up: Files
--
--3.2 Build Files
--===============
--
--This section describes the files which are created at configure and
--build time. These are the files which somebody who builds the package
--will see.
--
-- Of course, the developer will also build the package. The
--distinction between developer files and build files is not that the
--developer does not see the build files, but that somebody who only
--builds the package does not have to worry about the developer files.
--
--* Menu:
--
--* Build Files Picture:: Build Files Picture.
--* Build Files Description:: Build Files Description.
--
--
--File: configure.info, Node: Build Files Picture, Next: Build Files Description, Up: Build Files
--
--3.2.1 Build Files Picture
---------------------------
--
--Here is a picture of the files which will be created at build time.
--`config.status' is both a created file and a shell script which is run
--to create other files, and the picture attempts to show that.
--
-- config.in *configure* Makefile.in
-- | | |
-- | v |
-- | config.status |
-- | | |
-- *config.status*<======+==========>*config.status*
-- | |
-- v v
-- config.h Makefile
--
--
--File: configure.info, Node: Build Files Description, Prev: Build Files Picture, Up: Build Files
--
--3.2.2 Build Files Description
-------------------------------
--
--This is a description of the files which are created at build time.
--
--`config.status'
-- The first step in building a package is to run the `configure'
-- script. The `configure' script will create the file
-- `config.status', which is itself a shell script. When you first
-- run `configure', it will automatically run `config.status'. An
-- `Makefile' derived from an automake generated `Makefile.in' will
-- contain rules to automatically run `config.status' again when
-- necessary to recreate certain files if their inputs change.
--
--`Makefile'
-- This is the file which make will read to build the program. The
-- `config.status' script will transform `Makefile.in' into
-- `Makefile'.
--
--`config.h'
-- This file defines C preprocessor macros which C code can use to
-- adjust its behaviour on different systems. The `config.status'
-- script will transform `config.in' into `config.h'.
--
--`config.cache'
-- This file did not fit neatly into the picture, and I omitted it.
-- It is used by the `configure' script to cache results between
-- runs. This can be an important speedup. If you modify
-- `configure.in' in such a way that the results of old tests should
-- change (perhaps you have added a new library to `LDFLAGS'), then
-- you will have to remove `config.cache' to force the tests to be
-- rerun.
--
-- The autoconf manual explains how to set up a site specific cache
-- file. This can speed up running `configure' scripts on your
-- system.
--
--`stamp.h'
-- This file, which I omitted from the picture, is similar to
-- `stamp-h.in'. It is used as a timestamp file indicating whether
-- `config.h' is up to date. This is useful since `config.h' depends
-- upon `config.status', but it is easy for `config.status' to change
-- in a way which does not affect `config.h'.
--
--
--File: configure.info, Node: Support Files, Prev: Build Files, Up: Files
--
--3.3 Support Files
--=================
--
--The GNU configure and build system requires several support files to be
--included with your distribution. You do not normally need to concern
--yourself with these. If you are using the Cygnus tree, most are already
--present. Otherwise, they will be installed with your source by
--`automake' (with the `--add-missing' option) and `libtoolize'.
--
-- You don't have to put the support files in the top level directory.
--You can put them in a subdirectory, and use the `AC_CONFIG_AUX_DIR'
--macro in `configure.in' to tell `automake' and the `configure' script
--where they are.
--
-- In this section, I describe the support files, so that you can know
--what they are and why they are there.
--
--`ABOUT-NLS'
-- Added by automake if you are using gettext. This is a
-- documentation file about the gettext project.
--
--`ansi2knr.c'
-- Used by an automake generated `Makefile' if you put `ansi2knr' in
-- `AUTOMAKE_OPTIONS' in `Makefile.am'. This permits compiling ANSI
-- C code with a K&R C compiler.
--
--`ansi2knr.1'
-- The man page which goes with `ansi2knr.c'.
--
--`config.guess'
-- A shell script which determines the configuration name for the
-- system on which it is run.
--
--`config.sub'
-- A shell script which canonicalizes a configuration name entered by
-- a user.
--
--`elisp-comp'
-- Used to compile Emacs LISP files.
--
--`install-sh'
-- A shell script which installs a program. This is used if the
-- configure script can not find an install binary.
--
--`ltconfig'
-- Used by libtool. This is a shell script which configures libtool
-- for the particular system on which it is used.
--
--`ltmain.sh'
-- Used by libtool. This is the actual libtool script which is used,
-- after it is configured by `ltconfig' to build a library.
--
--`mdate-sh'
-- A shell script used by an automake generated `Makefile' to pretty
-- print the modification time of a file. This is used to maintain
-- version numbers for texinfo files.
--
--`missing'
-- A shell script used if some tool is missing entirely. This is
-- used by an automake generated `Makefile' to avoid certain sorts of
-- timestamp problems.
--
--`mkinstalldirs'
-- A shell script which creates a directory, including all parent
-- directories. This is used by an automake generated `Makefile'
-- during installation.
--
--`texinfo.tex'
-- Required if you have any texinfo files. This is used when
-- converting Texinfo files into DVI using `texi2dvi' and TeX.
--
--`ylwrap'
-- A shell script used by an automake generated `Makefile' to run
-- programs like `bison', `yacc', `flex', and `lex'. These programs
-- default to producing output files with a fixed name, and the
-- `ylwrap' script runs them in a subdirectory to avoid file name
-- conflicts when using a parallel make program.
--
--
--File: configure.info, Node: Configuration Names, Next: Cross Compilation Tools, Prev: Files, Up: Top
--
--4 Configuration Names
--*********************
--
--The GNU configure system names all systems using a "configuration
--name". All such names used to be triplets (they may now contain four
--parts in certain cases), and the term "configuration triplet" is still
--seen.
--
--* Menu:
--
--* Configuration Name Definition:: Configuration Name Definition.
--* Using Configuration Names:: Using Configuration Names.
--
--
--File: configure.info, Node: Configuration Name Definition, Next: Using Configuration Names, Up: Configuration Names
--
--4.1 Configuration Name Definition
--=================================
--
--This is a string of the form CPU-MANUFACTURER-OPERATING_SYSTEM. In
--some cases, this is extended to a four part form:
--CPU-MANUFACTURER-KERNEL-OPERATING_SYSTEM.
--
-- When using a configuration name in a configure option, it is normally
--not necessary to specify an entire name. In particular, the
--MANUFACTURER field is often omitted, leading to strings such as
--`i386-linux' or `sparc-sunos'. The shell script `config.sub' will
--translate these shortened strings into the canonical form. autoconf
--will arrange for `config.sub' to be run automatically when it is needed.
--
-- The fields of a configuration name are as follows:
--
--CPU
-- The type of processor. This is typically something like `i386' or
-- `sparc'. More specific variants are used as well, such as
-- `mipsel' to indicate a little endian MIPS processor.
--
--MANUFACTURER
-- A somewhat freeform field which indicates the manufacturer of the
-- system. This is often simply `unknown'. Other common strings are
-- `pc' for an IBM PC compatible system, or the name of a workstation
-- vendor, such as `sun'.
--
--OPERATING_SYSTEM
-- The name of the operating system which is run on the system. This
-- will be something like `solaris2.5' or `irix6.3'. There is no
-- particular restriction on the version number, and strings like
-- `aix4.1.4.0' are seen. For an embedded system, which has no
-- operating system, this field normally indicates the type of object
-- file format, such as `elf' or `coff'.
--
--KERNEL
-- This is used mainly for GNU/Linux. A typical GNU/Linux
-- configuration name is `i586-pc-linux-gnulibc1'. In this case the
-- kernel, `linux', is separated from the operating system,
-- `gnulibc1'.
--
-- The shell script `config.guess' will normally print the correct
--configuration name for the system on which it is run. It does by
--running `uname' and by examining other characteristics of the system.
--
-- Because `config.guess' can normally determine the configuration name
--for a machine, it is normally only necessary to specify a configuration
--name when building a cross-compiler or when building using a
--cross-compiler.
--
--
--File: configure.info, Node: Using Configuration Names, Prev: Configuration Name Definition, Up: Configuration Names
--
--4.2 Using Configuration Names
--=============================
--
--A configure script will sometimes have to make a decision based on a
--configuration name. You will need to do this if you have to compile
--code differently based on something which can not be tested using a
--standard autoconf feature test.
--
-- It is normally better to test for particular features, rather than to
--test for a particular system. This is because as Unix evolves,
--different systems copy features from one another. Even if you need to
--determine whether the feature is supported based on a configuration
--name, you should define a macro which describes the feature, rather than
--defining a macro which describes the particular system you are on.
--
-- Testing for a particular system is normally done using a case
--statement in `configure.in'. The case statement might look something
--like the following, assuming that `host' is a shell variable holding a
--canonical configuration name (which will be the case if `configure.in'
--uses the `AC_CANONICAL_HOST' or `AC_CANONICAL_SYSTEM' macro).
--
-- case "${host}" in
-- i[3-7]86-*-linux-gnu*) do something ;;
-- sparc*-sun-solaris2.[56789]*) do something ;;
-- sparc*-sun-solaris*) do something ;;
-- mips*-*-elf*) do something ;;
-- esac
--
-- It is particularly important to use `*' after the operating system
--field, in order to match the version number which will be generated by
--`config.guess'.
--
-- In most cases you must be careful to match a range of processor
--types. For most processor families, a trailing `*' suffices, as in
--`mips*' above. For the i386 family, something along the lines of
--`i[3-7]86' suffices at present. For the m68k family, you will need
--something like `m68*'. Of course, if you do not need to match on the
--processor, it is simpler to just replace the entire field by a `*', as
--in `*-*-irix*'.
--
--
--File: configure.info, Node: Cross Compilation Tools, Next: Canadian Cross, Prev: Configuration Names, Up: Top
--
--5 Cross Compilation Tools
--*************************
--
--The GNU configure and build system can be used to build "cross
--compilation" tools. A cross compilation tool is a tool which runs on
--one system and produces code which runs on another system.
--
--* Menu:
--
--* Cross Compilation Concepts:: Cross Compilation Concepts.
--* Host and Target:: Host and Target.
--* Using the Host Type:: Using the Host Type.
--* Specifying the Target:: Specifying the Target.
--* Using the Target Type:: Using the Target Type.
--* Cross Tools in the Cygnus Tree:: Cross Tools in the Cygnus Tree
--
--
--File: configure.info, Node: Cross Compilation Concepts, Next: Host and Target, Up: Cross Compilation Tools
--
--5.1 Cross Compilation Concepts
--==============================
--
--A compiler which produces programs which run on a different system is a
--cross compilation compiler, or simply a "cross compiler". Similarly,
--we speak of cross assemblers, cross linkers, etc.
--
-- In the normal case, a compiler produces code which runs on the same
--system as the one on which the compiler runs. When it is necessary to
--distinguish this case from the cross compilation case, such a compiler
--is called a "native compiler". Similarly, we speak of native
--assemblers, etc.
--
-- Although the debugger is not strictly speaking a compilation tool,
--it is nevertheless meaningful to speak of a cross debugger: a debugger
--which is used to debug code which runs on another system. Everything
--that is said below about configuring cross compilation tools applies to
--the debugger as well.
--
--
--File: configure.info, Node: Host and Target, Next: Using the Host Type, Prev: Cross Compilation Concepts, Up: Cross Compilation Tools
--
--5.2 Host and Target
--===================
--
--When building cross compilation tools, there are two different systems
--involved: the system on which the tools will run, and the system for
--which the tools generate code.
--
-- The system on which the tools will run is called the "host" system.
--
-- The system for which the tools generate code is called the "target"
--system.
--
-- For example, suppose you have a compiler which runs on a GNU/Linux
--system and generates ELF programs for a MIPS embedded system. In this
--case the GNU/Linux system is the host, and the MIPS ELF system is the
--target. Such a compiler could be called a GNU/Linux cross MIPS ELF
--compiler, or, equivalently, a `i386-linux-gnu' cross `mips-elf'
--compiler.
--
-- Naturally, most programs are not cross compilation tools. For those
--programs, it does not make sense to speak of a target. It only makes
--sense to speak of a target for tools like `gcc' or the `binutils' which
--actually produce running code. For example, it does not make sense to
--speak of the target of a tool like `bison' or `make'.
--
-- Most cross compilation tools can also serve as native tools. For a
--native compilation tool, it is still meaningful to speak of a target.
--For a native tool, the target is the same as the host. For example, for
--a GNU/Linux native compiler, the host is GNU/Linux, and the target is
--also GNU/Linux.
--
--
--File: configure.info, Node: Using the Host Type, Next: Specifying the Target, Prev: Host and Target, Up: Cross Compilation Tools
--
--5.3 Using the Host Type
--=======================
--
--In almost all cases the host system is the system on which you run the
--`configure' script, and on which you build the tools (for the case when
--they differ, *note Canadian Cross::).
--
-- If your configure script needs to know the configuration name of the
--host system, and the package is not a cross compilation tool and
--therefore does not have a target, put `AC_CANONICAL_HOST' in
--`configure.in'. This macro will arrange to define a few shell
--variables when the `configure' script is run.
--
--`host'
-- The canonical configuration name of the host. This will normally
-- be determined by running the `config.guess' shell script, although
-- the user is permitted to override this by using an explicit
-- `--host' option.
--
--`host_alias'
-- In the unusual case that the user used an explicit `--host' option,
-- this will be the argument to `--host'. In the normal case, this
-- will be the same as the `host' variable.
--
--`host_cpu'
--`host_vendor'
--`host_os'
-- The first three parts of the canonical configuration name.
--
-- The shell variables may be used by putting shell code in
--`configure.in'. For an example, see *Note Using Configuration Names::.
--
--
--File: configure.info, Node: Specifying the Target, Next: Using the Target Type, Prev: Using the Host Type, Up: Cross Compilation Tools
--
--5.4 Specifying the Target
--=========================
--
--By default, the `configure' script will assume that the target is the
--same as the host. This is the more common case; for example, it leads
--to a native compiler rather than a cross compiler.
--
-- If you want to build a cross compilation tool, you must specify the
--target explicitly by using the `--target' option when you run
--`configure'. The argument to `--target' is the configuration name of
--the system for which you wish to generate code. *Note Configuration
--Names::.
--
-- For example, to build tools which generate code for a MIPS ELF
--embedded system, you would use `--target mips-elf'.
--
--
--File: configure.info, Node: Using the Target Type, Next: Cross Tools in the Cygnus Tree, Prev: Specifying the Target, Up: Cross Compilation Tools
--
--5.5 Using the Target Type
--=========================
--
--When writing `configure.in' for a cross compilation tool, you will need
--to use information about the target. To do this, put
--`AC_CANONICAL_SYSTEM' in `configure.in'.
--
-- `AC_CANONICAL_SYSTEM' will look for a `--target' option and
--canonicalize it using the `config.sub' shell script. It will also run
--`AC_CANONICAL_HOST' (*note Using the Host Type::).
--
-- The target type will be recorded in the following shell variables.
--Note that the host versions of these variables will also be defined by
--`AC_CANONICAL_HOST'.
--
--`target'
-- The canonical configuration name of the target.
--
--`target_alias'
-- The argument to the `--target' option. If the user did not specify
-- a `--target' option, this will be the same as `host_alias'.
--
--`target_cpu'
--`target_vendor'
--`target_os'
-- The first three parts of the canonical target configuration name.
--
-- Note that if `host' and `target' are the same string, you can assume
--a native configuration. If they are different, you can assume a cross
--configuration.
--
-- It is arguably possible for `host' and `target' to represent the
--same system, but for the strings to not be identical. For example, if
--`config.guess' returns `sparc-sun-sunos4.1.4', and somebody configures
--with `--target sparc-sun-sunos4.1', then the slight differences between
--the two versions of SunOS may be unimportant for your tool. However,
--in the general case it can be quite difficult to determine whether the
--differences between two configuration names are significant or not.
--Therefore, by convention, if the user specifies a `--target' option
--without specifying a `--host' option, it is assumed that the user wants
--to configure a cross compilation tool.
--
-- The variables `target' and `target_alias' should be handled
--differently.
--
-- In general, whenever the user may actually see a string,
--`target_alias' should be used. This includes anything which may appear
--in the file system, such as a directory name or part of a tool name.
--It also includes any tool output, unless it is clearly labelled as the
--canonical target configuration name. This permits the user to use the
--`--target' option to specify how the tool will appear to the outside
--world.
--
-- On the other hand, when checking for characteristics of the target
--system, `target' should be used. This is because a wide variety of
--`--target' options may map into the same canonical configuration name.
--You should not attempt to duplicate the canonicalization done by
--`config.sub' in your own code.
--
-- By convention, cross tools are installed with a prefix of the
--argument used with the `--target' option, also known as `target_alias'
--(*note Using the Target Type::). If the user does not use the
--`--target' option, and thus is building a native tool, no prefix is
--used.
--
-- For example, if gcc is configured with `--target mips-elf', then the
--installed binary will be named `mips-elf-gcc'. If gcc is configured
--without a `--target' option, then the installed binary will be named
--`gcc'.
--
-- The autoconf macro `AC_ARG_PROGRAM' will handle this for you. If
--you are using automake, no more need be done; the programs will
--automatically be installed with the correct prefixes. Otherwise, see
--the autoconf documentation for `AC_ARG_PROGRAM'.
--
--
--File: configure.info, Node: Cross Tools in the Cygnus Tree, Prev: Using the Target Type, Up: Cross Compilation Tools
--
--5.6 Cross Tools in the Cygnus Tree
--==================================
--
--The Cygnus tree is used for various packages including gdb, the GNU
--binutils, and egcs. It is also, of course, used for Cygnus releases.
--
-- In the Cygnus tree, the top level `configure' script uses the old
--Cygnus configure system, not autoconf. The top level `Makefile.in' is
--written to build packages based on what is in the source tree, and
--supports building a large number of tools in a single
--`configure'/`make' step.
--
-- The Cygnus tree may be configured with a `--target' option. The
--`--target' option applies recursively to every subdirectory, and
--permits building an entire set of cross tools at once.
--
--* Menu:
--
--* Host and Target Libraries:: Host and Target Libraries.
--* Target Library Configure Scripts:: Target Library Configure Scripts.
--* Make Targets in Cygnus Tree:: Make Targets in Cygnus Tree.
--* Target libiberty:: Target libiberty
--
--
--File: configure.info, Node: Host and Target Libraries, Next: Target Library Configure Scripts, Up: Cross Tools in the Cygnus Tree
--
--5.6.1 Host and Target Libraries
---------------------------------
--
--The Cygnus tree distinguishes host libraries from target libraries.
--
-- Host libraries are built with the compiler used to build the programs
--which run on the host, which is called the host compiler. This includes
--libraries such as `bfd' and `tcl'. These libraries are built with the
--host compiler, and are linked into programs like the binutils or gcc
--which run on the host.
--
-- Target libraries are built with the target compiler. If gcc is
--present in the source tree, then the target compiler is the gcc that is
--built using the host compiler. Target libraries are libraries such as
--`newlib' and `libstdc++'. These libraries are not linked into the host
--programs, but are instead made available for use with programs built
--with the target compiler.
--
-- For the rest of this section, assume that gcc is present in the
--source tree, so that it will be used to build the target libraries.
--
-- There is a complication here. The configure process needs to know
--which compiler you are going to use to build a tool; otherwise, the
--feature tests will not work correctly. The Cygnus tree handles this by
--not configuring the target libraries until the target compiler is
--built. In order to permit everything to build using a single
--`configure'/`make', the configuration of the target libraries is
--actually triggered during the make step.
--
-- When the target libraries are configured, the `--target' option is
--not used. Instead, the `--host' option is used with the argument of
--the `--target' option for the overall configuration. If no `--target'
--option was used for the overall configuration, the `--host' option will
--be passed with the output of the `config.guess' shell script. Any
--`--build' option is passed down unchanged.
--
-- This translation of configuration options is done because since the
--target libraries are compiled with the target compiler, they are being
--built in order to run on the target of the overall configuration. By
--the definition of host, this means that their host system is the same as
--the target system of the overall configuration.
--
-- The same process is used for both a native configuration and a cross
--configuration. Even when using a native configuration, the target
--libraries will be configured and built using the newly built compiler.
--This is particularly important for the C++ libraries, since there is no
--reason to assume that the C++ compiler used to build the host tools (if
--there even is one) uses the same ABI as the g++ compiler which will be
--used to build the target libraries.
--
-- There is one difference between a native configuration and a cross
--configuration. In a native configuration, the target libraries are
--normally configured and built as siblings of the host tools. In a cross
--configuration, the target libraries are normally built in a subdirectory
--whose name is the argument to `--target'. This is mainly for
--historical reasons.
--
-- To summarize, running `configure' in the Cygnus tree configures all
--the host libraries and tools, but does not configure any of the target
--libraries. Running `make' then does the following steps:
--
-- * Build the host libraries.
--
-- * Build the host programs, including gcc. Note that we call gcc
-- both a host program (since it runs on the host) and a target
-- compiler (since it generates code for the target).
--
-- * Using the newly built target compiler, configure the target
-- libraries.
--
-- * Build the target libraries.
--
-- The steps need not be done in precisely this order, since they are
--actually controlled by `Makefile' targets.
--
--
--File: configure.info, Node: Target Library Configure Scripts, Next: Make Targets in Cygnus Tree, Prev: Host and Target Libraries, Up: Cross Tools in the Cygnus Tree
--
--5.6.2 Target Library Configure Scripts
----------------------------------------
--
--There are a few things you must know in order to write a configure
--script for a target library. This is just a quick sketch, and beginners
--shouldn't worry if they don't follow everything here.
--
-- The target libraries are configured and built using a newly built
--target compiler. There may not be any startup files or libraries for
--this target compiler. In fact, those files will probably be built as
--part of some target library, which naturally means that they will not
--exist when your target library is configured.
--
-- This means that the configure script for a target library may not use
--any test which requires doing a link. This unfortunately includes many
--useful autoconf macros, such as `AC_CHECK_FUNCS'. autoconf macros
--which do a compile but not a link, such as `AC_CHECK_HEADERS', may be
--used.
--
-- This is a severe restriction, but normally not a fatal one, as target
--libraries can often assume the presence of other target libraries, and
--thus know which functions will be available.
--
-- As of this writing, the autoconf macro `AC_PROG_CC' does a link to
--make sure that the compiler works. This may fail in a target library,
--so target libraries must use a different set of macros to locate the
--compiler. See the `configure.in' file in a directory like `libiberty'
--or `libgloss' for an example.
--
-- As noted in the previous section, target libraries are sometimes
--built in directories which are siblings to the host tools, and are
--sometimes built in a subdirectory. The `--with-target-subdir' configure
--option will be passed when the library is configured. Its value will be
--an empty string if the target library is a sibling. Its value will be
--the name of the subdirectory if the target library is in a subdirectory.
--
-- If the overall build is not a native build (i.e., the overall
--configure used the `--target' option), then the library will be
--configured with the `--with-cross-host' option. The value of this
--option will be the host system of the overall build. Recall that the
--host system of the library will be the target of the overall build. If
--the overall build is a native build, the `--with-cross-host' option
--will not be used.
--
-- A library which can be built both standalone and as a target library
--may want to install itself into different directories depending upon the
--case. When built standalone, or when built native, the library should
--be installed in `$(libdir)'. When built as a target library which is
--not native, the library should be installed in `$(tooldir)/lib'. The
--`--with-cross-host' option may be used to distinguish these cases.
--
-- This same test of `--with-cross-host' may be used to see whether it
--is OK to use link tests in the configure script. If the
--`--with-cross-host' option is not used, then the library is being built
--either standalone or native, and a link should work.
--
--
--File: configure.info, Node: Make Targets in Cygnus Tree, Next: Target libiberty, Prev: Target Library Configure Scripts, Up: Cross Tools in the Cygnus Tree
--
--5.6.3 Make Targets in Cygnus Tree
-----------------------------------
--
--The top level `Makefile' in the Cygnus tree defines targets for every
--known subdirectory.
--
-- For every subdirectory DIR which holds a host library or program,
--the `Makefile' target `all-DIR' will build that library or program.
--
-- There are dependencies among host tools. For example, building gcc
--requires first building gas, because the gcc build process invokes the
--target assembler. These dependencies are reflected in the top level
--`Makefile'.
--
-- For every subdirectory DIR which holds a target library, the
--`Makefile' target `configure-target-DIR' will configure that library.
--The `Makefile' target `all-target-DIR' will build that library.
--
-- Every `configure-target-DIR' target depends upon `all-gcc', since
--gcc, the target compiler, is required to configure the tool. Every
--`all-target-DIR' target depends upon the corresponding
--`configure-target-DIR' target.
--
-- There are several other targets which may be of interest for each
--directory: `install-DIR', `clean-DIR', and `check-DIR'. There are also
--corresponding `target' versions of these for the target libraries ,
--such as `install-target-DIR'.
--
--
--File: configure.info, Node: Target libiberty, Prev: Make Targets in Cygnus Tree, Up: Cross Tools in the Cygnus Tree
--
--5.6.4 Target libiberty
------------------------
--
--The `libiberty' subdirectory is currently a special case, in that it is
--the only directory which is built both using the host compiler and
--using the target compiler.
--
-- This is because the files in `libiberty' are used when building the
--host tools, and they are also incorporated into the `libstdc++' target
--library as support code.
--
-- This duality does not pose any particular difficulties. It means
--that there are targets for both `all-libiberty' and
--`all-target-libiberty'.
--
-- In a native configuration, when target libraries are not built in a
--subdirectory, the same objects are normally used as both the host build
--and the target build. This is normally OK, since libiberty contains
--only C code, and in a native configuration the results of the host
--compiler and the target compiler are normally interoperable.
--
-- Irix 6 is again an exception here, since the SGI native compiler
--defaults to using the `O32' ABI, and gcc defaults to using the `N32'
--ABI. On Irix 6, the target libraries are built in a subdirectory even
--for a native configuration, avoiding this problem.
--
-- There are currently no other libraries built for both the host and
--the target, but there is no conceptual problem with adding more.
--
--
--File: configure.info, Node: Canadian Cross, Next: Cygnus Configure, Prev: Cross Compilation Tools, Up: Top
--
--6 Canadian Cross
--****************
--
--It is possible to use the GNU configure and build system to build a
--program which will run on a system which is different from the system on
--which the tools are built. In other words, it is possible to build
--programs using a cross compiler.
--
-- This is referred to as a "Canadian Cross".
--
--* Menu:
--
--* Canadian Cross Example:: Canadian Cross Example.
--* Canadian Cross Concepts:: Canadian Cross Concepts.
--* Build Cross Host Tools:: Build Cross Host Tools.
--* Build and Host Options:: Build and Host Options.
--* CCross not in Cygnus Tree:: Canadian Cross not in Cygnus Tree.
--* CCross in Cygnus Tree:: Canadian Cross in Cygnus Tree.
--* Supporting Canadian Cross:: Supporting Canadian Cross.
--
--
--File: configure.info, Node: Canadian Cross Example, Next: Canadian Cross Concepts, Up: Canadian Cross
--
--6.1 Canadian Cross Example
--==========================
--
--Here is an example of a Canadian Cross.
--
-- While running on a GNU/Linux, you can build a program which will run
--on a Solaris system. You would use a GNU/Linux cross Solaris compiler
--to build the program.
--
-- Of course, you could not run the resulting program on your GNU/Linux
--system. You would have to copy it over to a Solaris system before you
--would run it.
--
-- Of course, you could also simply build the programs on the Solaris
--system in the first place. However, perhaps the Solaris system is not
--available for some reason; perhaps you actually don't have one, but you
--want to build the tools for somebody else to use. Or perhaps your
--GNU/Linux system is much faster than your Solaris system.
--
-- A Canadian Cross build is most frequently used when building
--programs to run on a non-Unix system, such as DOS or Windows. It may
--be simpler to configure and build on a Unix system than to support the
--configuration machinery on a non-Unix system.
--
--
--File: configure.info, Node: Canadian Cross Concepts, Next: Build Cross Host Tools, Prev: Canadian Cross Example, Up: Canadian Cross
--
--6.2 Canadian Cross Concepts
--===========================
--
--When building a Canadian Cross, there are at least two different systems
--involved: the system on which the tools are being built, and the system
--on which the tools will run.
--
-- The system on which the tools are being built is called the "build"
--system.
--
-- The system on which the tools will run is called the host system.
--
-- For example, if you are building a Solaris program on a GNU/Linux
--system, as in the previous section, the build system would be GNU/Linux,
--and the host system would be Solaris.
--
-- It is, of course, possible to build a cross compiler using a Canadian
--Cross (i.e., build a cross compiler using a cross compiler). In this
--case, the system for which the resulting cross compiler generates code
--is called the target system. (For a more complete discussion of host
--and target systems, *note Host and Target::).
--
-- An example of building a cross compiler using a Canadian Cross would
--be building a Windows cross MIPS ELF compiler on a GNU/Linux system. In
--this case the build system would be GNU/Linux, the host system would be
--Windows, and the target system would be MIPS ELF.
--
-- The name Canadian Cross comes from the case when the build, host, and
--target systems are all different. At the time that these issues were
--all being hashed out, Canada had three national political parties.
--
--
--File: configure.info, Node: Build Cross Host Tools, Next: Build and Host Options, Prev: Canadian Cross Concepts, Up: Canadian Cross
--
--6.3 Build Cross Host Tools
--==========================
--
--In order to configure a program for a Canadian Cross build, you must
--first build and install the set of cross tools you will use to build the
--program.
--
-- These tools will be build cross host tools. That is, they will run
--on the build system, and will produce code that runs on the host system.
--
-- It is easy to confuse the meaning of build and host here. Always
--remember that the build system is where you are doing the build, and the
--host system is where the resulting program will run. Therefore, you
--need a build cross host compiler.
--
-- In general, you must have a complete cross environment in order to do
--the build. This normally means a cross compiler, cross assembler, and
--so forth, as well as libraries and include files for the host system.
--
--
--File: configure.info, Node: Build and Host Options, Next: CCross not in Cygnus Tree, Prev: Build Cross Host Tools, Up: Canadian Cross
--
--6.4 Build and Host Options
--==========================
--
--When you run `configure', you must use both the `--build' and `--host'
--options.
--
-- The `--build' option is used to specify the configuration name of
--the build system. This can normally be the result of running the
--`config.guess' shell script, and it is reasonable to use
--`--build=`config.guess`'.
--
-- The `--host' option is used to specify the configuration name of the
--host system.
--
-- As we explained earlier, `config.guess' is used to set the default
--value for the `--host' option (*note Using the Host Type::). We can
--now see that since `config.guess' returns the type of system on which
--it is run, it really identifies the build system. Since the host
--system is normally the same as the build system (i.e., people do not
--normally build using a cross compiler), it is reasonable to use the
--result of `config.guess' as the default for the host system when the
--`--host' option is not used.
--
-- It might seem that if the `--host' option were used without the
--`--build' option that the configure script could run `config.guess' to
--determine the build system, and presume a Canadian Cross if the result
--of `config.guess' differed from the `--host' option. However, for
--historical reasons, some configure scripts are routinely run using an
--explicit `--host' option, rather than using the default from
--`config.guess'. As noted earlier, it is difficult or impossible to
--reliably compare configuration names (*note Using the Target Type::).
--Therefore, by convention, if the `--host' option is used, but the
--`--build' option is not used, then the build system defaults to the
--host system.
--
--
--File: configure.info, Node: CCross not in Cygnus Tree, Next: CCross in Cygnus Tree, Prev: Build and Host Options, Up: Canadian Cross
--
--6.5 Canadian Cross not in Cygnus Tree.
--======================================
--
--If you are not using the Cygnus tree, you must explicitly specify the
--cross tools which you want to use to build the program. This is done by
--setting environment variables before running the `configure' script.
--
-- You must normally set at least the environment variables `CC', `AR',
--and `RANLIB' to the cross tools which you want to use to build.
--
-- For some programs, you must set additional cross tools as well, such
--as `AS', `LD', or `NM'.
--
-- You would set these environment variables to the build cross tools
--which you are going to use.
--
-- For example, if you are building a Solaris program on a GNU/Linux
--system, and your GNU/Linux cross Solaris compiler were named
--`solaris-gcc', then you would set the environment variable `CC' to
--`solaris-gcc'.
--
--
--File: configure.info, Node: CCross in Cygnus Tree, Next: Supporting Canadian Cross, Prev: CCross not in Cygnus Tree, Up: Canadian Cross
--
--6.6 Canadian Cross in Cygnus Tree
--=================================
--
--This section describes configuring and building a Canadian Cross when
--using the Cygnus tree.
--
--* Menu:
--
--* Standard Cygnus CCross:: Building a Normal Program.
--* Cross Cygnus CCross:: Building a Cross Program.
--
--
--File: configure.info, Node: Standard Cygnus CCross, Next: Cross Cygnus CCross, Up: CCross in Cygnus Tree
--
--6.6.1 Building a Normal Program
---------------------------------
--
--When configuring a Canadian Cross in the Cygnus tree, all the
--appropriate environment variables are automatically set to `HOST-TOOL',
--where HOST is the value used for the `--host' option, and TOOL is the
--name of the tool (e.g., `gcc', `as', etc.). These tools must be on
--your `PATH'.
--
-- Adding a prefix of HOST will give the usual name for the build cross
--host tools. To see this, consider that when these cross tools were
--built, they were configured to run on the build system and to produce
--code for the host system. That is, they were configured with a
--`--target' option that is the same as the system which we are now
--calling the host. Recall that the default name for installed cross
--tools uses the target system as a prefix (*note Using the Target
--Type::). Since that is the system which we are now calling the host,
--HOST is the right prefix to use.
--
-- For example, if you configure with `--build=i386-linux-gnu' and
--`--host=solaris', then the Cygnus tree will automatically default to
--using the compiler `solaris-gcc'. You must have previously built and
--installed this compiler, probably by doing a build with no `--host'
--option and with a `--target' option of `solaris'.
--
--
--File: configure.info, Node: Cross Cygnus CCross, Prev: Standard Cygnus CCross, Up: CCross in Cygnus Tree
--
--6.6.2 Building a Cross Program
--------------------------------
--
--There are additional considerations if you want to build a cross
--compiler, rather than a native compiler, in the Cygnus tree using a
--Canadian Cross.
--
-- When you build a cross compiler using the Cygnus tree, then the
--target libraries will normally be built with the newly built target
--compiler (*note Host and Target Libraries::). However, this will not
--work when building with a Canadian Cross. This is because the newly
--built target compiler will be a program which runs on the host system,
--and therefore will not be able to run on the build system.
--
-- Therefore, when building a cross compiler with the Cygnus tree, you
--must first install a set of build cross target tools. These tools will
--be used when building the target libraries.
--
-- Note that this is not a requirement of a Canadian Cross in general.
--For example, it would be possible to build just the host cross target
--tools on the build system, to copy the tools to the host system, and to
--build the target libraries on the host system. The requirement for
--build cross target tools is imposed by the Cygnus tree, which expects
--to be able to build both host programs and target libraries in a single
--`configure'/`make' step. Because it builds these in a single step, it
--expects to be able to build the target libraries on the build system,
--which means that it must use a build cross target toolchain.
--
-- For example, suppose you want to build a Windows cross MIPS ELF
--compiler on a GNU/Linux system. You must have previously installed
--both a GNU/Linux cross Windows compiler and a GNU/Linux cross MIPS ELF
--compiler.
--
-- In order to build the Windows (configuration name `i386-cygwin32')
--cross MIPS ELF (configure name `mips-elf') compiler, you might execute
--the following commands (long command lines are broken across lines with
--a trailing backslash as a continuation character).
--
-- mkdir linux-x-cygwin32
-- cd linux-x-cygwin32
-- SRCDIR/configure --target i386-cygwin32 --prefix=INSTALLDIR \
-- --exec-prefix=INSTALLDIR/H-i386-linux
-- make
-- make install
-- cd ..
-- mkdir linux-x-mips-elf
-- cd linux-x-mips-elf
-- SRCDIR/configure --target mips-elf --prefix=INSTALLDIR \
-- --exec-prefix=INSTALLDIR/H-i386-linux
-- make
-- make install
-- cd ..
-- mkdir cygwin32-x-mips-elf
-- cd cygwin32-x-mips-elf
-- SRCDIR/configure --build=i386-linux-gnu --host=i386-cygwin32 \
-- --target=mips-elf --prefix=WININSTALLDIR \
-- --exec-prefix=WININSTALLDIR/H-i386-cygwin32
-- make
-- make install
--
-- You would then copy the contents of WININSTALLDIR over to the
--Windows machine, and run the resulting programs.
--
--
--File: configure.info, Node: Supporting Canadian Cross, Prev: CCross in Cygnus Tree, Up: Canadian Cross
--
--6.7 Supporting Canadian Cross
--=============================
--
--If you want to make it possible to build a program you are developing
--using a Canadian Cross, you must take some care when writing your
--configure and make rules. Simple cases will normally work correctly.
--However, it is not hard to write configure and make tests which will
--fail in a Canadian Cross.
--
--* Menu:
--
--* CCross in Configure:: Supporting Canadian Cross in Configure Scripts.
--* CCross in Make:: Supporting Canadian Cross in Makefiles.
--
--
--File: configure.info, Node: CCross in Configure, Next: CCross in Make, Up: Supporting Canadian Cross
--
--6.7.1 Supporting Canadian Cross in Configure Scripts
------------------------------------------------------
--
--In a `configure.in' file, after calling `AC_PROG_CC', you can find out
--whether this is a Canadian Cross configure by examining the shell
--variable `cross_compiling'. In a Canadian Cross, which means that the
--compiler is a cross compiler, `cross_compiling' will be `yes'. In a
--normal configuration, `cross_compiling' will be `no'.
--
-- You ordinarily do not need to know the type of the build system in a
--configure script. However, if you do need that information, you can get
--it by using the macro `AC_CANONICAL_SYSTEM', the same macro that is
--used to determine the target system. This macro will set the variables
--`build', `build_alias', `build_cpu', `build_vendor', and `build_os',
--which correspond to the similar `target' and `host' variables, except
--that they describe the build system.
--
-- When writing tests in `configure.in', you must remember that you
--want to test the host environment, not the build environment.
--
-- Macros like `AC_CHECK_FUNCS' which use the compiler will test the
--host environment. That is because the tests will be done by running the
--compiler, which is actually a build cross host compiler. If the
--compiler can find the function, that means that the function is present
--in the host environment.
--
-- Tests like `test -f /dev/ptyp0', on the other hand, will test the
--build environment. Remember that the configure script is running on the
--build system, not the host system. If your configure scripts examines
--files, those files will be on the build system. Whatever you determine
--based on those files may or may not be the case on the host system.
--
-- Most autoconf macros will work correctly for a Canadian Cross. The
--main exception is `AC_TRY_RUN'. This macro tries to compile and run a
--test program. This will fail in a Canadian Cross, because the program
--will be compiled for the host system, which means that it will not run
--on the build system.
--
-- The `AC_TRY_RUN' macro provides an optional argument to tell the
--configure script what to do in a Canadian Cross. If that argument is
--not present, you will get a warning when you run `autoconf':
-- warning: AC_TRY_RUN called without default to allow cross compiling
-- This tells you that the resulting `configure' script will not work
--with a Canadian Cross.
--
-- In some cases while it may better to perform a test at configure
--time, it is also possible to perform the test at run time. In such a
--case you can use the cross compiling argument to `AC_TRY_RUN' to tell
--your program that the test could not be performed at configure time.
--
-- There are a few other autoconf macros which will not work correctly
--with a Canadian Cross: a partial list is `AC_FUNC_GETPGRP',
--`AC_FUNC_SETPGRP', `AC_FUNC_SETVBUF_REVERSED', and
--`AC_SYS_RESTARTABLE_SYSCALLS'. The `AC_CHECK_SIZEOF' macro is
--generally not very useful with a Canadian Cross; it permits an optional
--argument indicating the default size, but there is no way to know what
--the correct default should be.
--
--
--File: configure.info, Node: CCross in Make, Prev: CCross in Configure, Up: Supporting Canadian Cross
--
--6.7.2 Supporting Canadian Cross in Makefiles.
-----------------------------------------------
--
--The main Canadian Cross issue in a `Makefile' arises when you want to
--use a subsidiary program to generate code or data which you will then
--include in your real program.
--
-- If you compile this subsidiary program using `$(CC)' in the usual
--way, you will not be able to run it. This is because `$(CC)' will
--build a program for the host system, but the program is being built on
--the build system.
--
-- You must instead use a compiler for the build system, rather than the
--host system. In the Cygnus tree, this make variable `$(CC_FOR_BUILD)'
--will hold a compiler for the build system.
--
-- Note that you should not include `config.h' in a file you are
--compiling with `$(CC_FOR_BUILD)'. The `configure' script will build
--`config.h' with information for the host system. However, you are
--compiling the file using a compiler for the build system (a native
--compiler). Subsidiary programs are normally simple filters which do no
--user interaction, and it is normally possible to write them in a highly
--portable fashion so that the absence of `config.h' is not crucial.
--
-- The gcc `Makefile.in' shows a complex situation in which certain
--files, such as `rtl.c', must be compiled into both subsidiary programs
--run on the build system and into the final program. This approach may
--be of interest for advanced build system hackers. Note that the build
--system compiler is rather confusingly called `HOST_CC'.
--
--
--File: configure.info, Node: Cygnus Configure, Next: Multilibs, Prev: Canadian Cross, Up: Top
--
--7 Cygnus Configure
--******************
--
--The Cygnus configure script predates autoconf. All of its interesting
--features have been incorporated into autoconf. No new programs should
--be written to use the Cygnus configure script.
--
-- However, the Cygnus configure script is still used in a few places:
--at the top of the Cygnus tree and in a few target libraries in the
--Cygnus tree. Until those uses have been replaced with autoconf, some
--brief notes are appropriate here. This is not complete documentation,
--but it should be possible to use this as a guide while examining the
--scripts themselves.
--
--* Menu:
--
--* Cygnus Configure Basics:: Cygnus Configure Basics.
--* Cygnus Configure in C++ Libraries:: Cygnus Configure in C++ Libraries.
--
--
--File: configure.info, Node: Cygnus Configure Basics, Next: Cygnus Configure in C++ Libraries, Up: Cygnus Configure
--
--7.1 Cygnus Configure Basics
--===========================
--
--Cygnus configure does not use any generated files; there is no program
--corresponding to `autoconf'. Instead, there is a single shell script
--named `configure' which may be found at the top of the Cygnus tree.
--This shell script was written by hand; it was not generated by
--autoconf, and it is incorrect, and indeed harmful, to run `autoconf' in
--the top level of a Cygnus tree.
--
-- Cygnus configure works in a particular directory by examining the
--file `configure.in' in that directory. That file is broken into four
--separate shell scripts.
--
-- The first is the contents of `configure.in' up to a line that starts
--with `# per-host:'. This is the common part.
--
-- The second is the rest of `configure.in' up to a line that starts
--with `# per-target:'. This is the per host part.
--
-- The third is the rest of `configure.in' up to a line that starts
--with `# post-target:'. This is the per target part.
--
-- The fourth is the remainder of `configure.in'. This is the post
--target part.
--
-- If any of these comment lines are missing, the corresponding shell
--script is empty.
--
-- Cygnus configure will first execute the common part. This must set
--the shell variable `srctrigger' to the name of a source file, to
--confirm that Cygnus configure is looking at the right directory. This
--may set the shell variables `package_makefile_frag' and
--`package_makefile_rules_frag'.
--
-- Cygnus configure will next set the `build' and `host' shell
--variables, and execute the per host part. This may set the shell
--variable `host_makefile_frag'.
--
-- Cygnus configure will next set the `target' variable, and execute
--the per target part. This may set the shell variable
--`target_makefile_frag'.
--
-- Any of these scripts may set the `subdirs' shell variable. This
--variable is a list of subdirectories where a `Makefile.in' file may be
--found. Cygnus configure will automatically look for a `Makefile.in'
--file in the current directory. The `subdirs' shell variable is not
--normally used, and I believe that the only directory which uses it at
--present is `newlib'.
--
-- For each `Makefile.in', Cygnus configure will automatically create a
--`Makefile' by adding definitions for `make' variables such as `host'
--and `target', and automatically editing the values of `make' variables
--such as `prefix' if they are present.
--
-- Also, if any of the `makefile_frag' shell variables are set, Cygnus
--configure will interpret them as file names relative to either the
--working directory or the source directory, and will read the contents of
--the file into the generated `Makefile'. The file contents will be read
--in after the first line in `Makefile.in' which starts with `####'.
--
-- These `Makefile' fragments are used to customize behaviour for a
--particular host or target. They serve to select particular files to
--compile, and to define particular preprocessor macros by providing
--values for `make' variables which are then used during compilation.
--Cygnus configure, unlike autoconf, normally does not do feature tests,
--and normally requires support to be added manually for each new host.
--
-- The `Makefile' fragment support is similar to the autoconf
--`AC_SUBST_FILE' macro.
--
-- After creating each `Makefile', the post target script will be run
--(i.e., it may be run several times). This script may further customize
--the `Makefile'. When it is run, the shell variable `Makefile' will
--hold the name of the `Makefile', including the appropriate directory
--component.
--
-- Like an autoconf generated `configure' script, Cygnus configure will
--create a file named `config.status' which, when run, will automatically
--recreate the configuration. The `config.status' file will simply
--execute the Cygnus configure script again with the appropriate
--arguments.
--
-- Any of the parts of `configure.in' may set the shell variables
--`files' and `links'. Cygnus configure will set up symlinks from the
--names in `links' to the files named in `files'. This is similar to the
--autoconf `AC_LINK_FILES' macro.
--
-- Finally, any of the parts of `configure.in' may set the shell
--variable `configdirs' to a set of subdirectories. If it is set, Cygnus
--configure will recursively run the configure process in each
--subdirectory. If the subdirectory uses Cygnus configure, it will
--contain a `configure.in' file but no `configure' file, in which case
--Cygnus configure will invoke itself recursively. If the subdirectory
--has a `configure' file, Cygnus configure assumes that it is an autoconf
--generated `configure' script, and simply invokes it directly.
--
--
--File: configure.info, Node: Cygnus Configure in C++ Libraries, Prev: Cygnus Configure Basics, Up: Cygnus Configure
--
--7.2 Cygnus Configure in C++ Libraries
--=====================================
--
--The C++ library configure system, written by Per Bothner, deserves
--special mention. It uses Cygnus configure, but it does feature testing
--like that done by autoconf generated `configure' scripts. This
--approach is used in the libraries `libio', `libstdc++', and `libg++'.
--
-- Most of the `Makefile' information is written out by the shell
--script `libio/config.shared'. Each `configure.in' file sets certain
--shell variables, and then invokes `config.shared' to create two package
--`Makefile' fragments. These fragments are then incorporated into the
--resulting `Makefile' by the Cygnus configure script.
--
-- The file `_G_config.h' is created in the `libio' object directory by
--running the shell script `libio/gen-params'. This shell script uses
--feature tests to define macros and typedefs in `_G_config.h'.
--
--
--File: configure.info, Node: Multilibs, Next: FAQ, Prev: Cygnus Configure, Up: Top
--
--8 Multilibs
--***********
--
--For some targets gcc may have different processor requirements depending
--upon command line options. An obvious example is the `-msoft-float'
--option supported on several processors. This option means that the
--floating point registers are not available, which means that floating
--point operations must be done by calling an emulation subroutine rather
--than by using machine instructions.
--
-- For such options, gcc is often configured to compile target libraries
--twice: once with `-msoft-float' and once without. When gcc compiles
--target libraries more than once, the resulting libraries are called
--"multilibs".
--
-- Multilibs are not really part of the GNU configure and build system,
--but we discuss them here since they require support in the `configure'
--scripts and `Makefile's used for target libraries.
--
--* Menu:
--
--* Multilibs in gcc:: Multilibs in gcc.
--* Multilibs in Target Libraries:: Multilibs in Target Libraries.
--
--
--File: configure.info, Node: Multilibs in gcc, Next: Multilibs in Target Libraries, Up: Multilibs
--
--8.1 Multilibs in gcc
--====================
--
--In gcc, multilibs are defined by setting the variable
--`MULTILIB_OPTIONS' in the target `Makefile' fragment. Several other
--`MULTILIB' variables may also be defined there. *Note The Target
--Makefile Fragment: (gcc)Target Fragment.
--
-- If you have built gcc, you can see what multilibs it uses by running
--it with the `-print-multi-lib' option. The output `.;' means that no
--multilibs are used. In general, the output is a sequence of lines, one
--per multilib. The first part of each line, up to the `;', is the name
--of the multilib directory. The second part is a list of compiler
--options separated by `@' characters.
--
-- Multilibs are built in a tree of directories. The top of the tree,
--represented by `.' in the list of multilib directories, is the default
--library to use when no special compiler options are used. The
--subdirectories of the tree hold versions of the library to use when
--particular compiler options are used.
--
--
--File: configure.info, Node: Multilibs in Target Libraries, Prev: Multilibs in gcc, Up: Multilibs
--
--8.2 Multilibs in Target Libraries
--=================================
--
--The target libraries in the Cygnus tree are automatically built with
--multilibs. That means that each library is built multiple times.
--
-- This default is set in the top level `configure.in' file, by adding
--`--enable-multilib' to the list of arguments passed to configure when
--it is run for the target libraries (*note Host and Target Libraries::).
--
-- Each target library uses the shell script `config-ml.in', written by
--Doug Evans, to prepare to build target libraries. This shell script is
--invoked after the `Makefile' has been created by the `configure'
--script. If multilibs are not enabled, it does nothing, otherwise it
--modifies the `Makefile' to support multilibs.
--
-- The `config-ml.in' script makes one copy of the `Makefile' for each
--multilib in the appropriate subdirectory. When configuring in the
--source directory (which is not recommended), it will build a symlink
--tree of the sources in each subdirectory.
--
-- The `config-ml.in' script sets several variables in the various
--`Makefile's. The `Makefile.in' must have definitions for these
--variables already; `config-ml.in' simply changes the existing values.
--The `Makefile' should use default values for these variables which will
--do the right thing in the subdirectories.
--
--`MULTISRCTOP'
-- `config-ml.in' will set this to a sequence of `../' strings, where
-- the number of strings is the number of multilib levels in the
-- source tree. The default value should be the empty string.
--
--`MULTIBUILDTOP'
-- `config-ml.in' will set this to a sequence of `../' strings, where
-- the number of strings is number of multilib levels in the object
-- directory. The default value should be the empty string. This
-- will differ from `MULTISRCTOP' when configuring in the source tree
-- (which is not recommended).
--
--`MULTIDIRS'
-- In the top level `Makefile' only, `config-ml.in' will set this to
-- the list of multilib subdirectories. The default value should be
-- the empty string.
--
--`MULTISUBDIR'
-- `config-ml.in' will set this to the installed subdirectory name to
-- use for this subdirectory, with a leading `/'. The default value
-- shold be the empty string.
--
--`MULTIDO'
--`MULTICLEAN'
-- In the top level `Makefile' only, `config-ml.in' will set these
-- variables to commands to use when doing a recursive make. These
-- variables should both default to the string `true', so that by
-- default nothing happens.
--
-- All references to the parent of the source directory should use the
--variable `MULTISRCTOP'. Instead of writing `$(srcdir)/..', you must
--write `$(srcdir)/$(MULTISRCTOP)..'.
--
-- Similarly, references to the parent of the object directory should
--use the variable `MULTIBUILDTOP'.
--
-- In the installation target, the libraries should be installed in the
--subdirectory `MULTISUBDIR'. Instead of installing
--`$(libdir)/libfoo.a', install `$(libdir)$(MULTISUBDIR)/libfoo.a'.
--
-- The `config-ml.in' script also modifies the top level `Makefile' to
--add `multi-do' and `multi-clean' targets which are used when building
--multilibs.
--
-- The default target of the `Makefile' should include the following
--command:
-- @$(MULTIDO) $(FLAGS_TO_PASS) DO=all multi-do
-- This assumes that `$(FLAGS_TO_PASS)' is defined as a set of
--variables to pass to a recursive invocation of `make'. This will build
--all the multilibs. Note that the default value of `MULTIDO' is `true',
--so by default this command will do nothing. It will only do something
--in the top level `Makefile' if multilibs were enabled.
--
-- The `install' target of the `Makefile' should include the following
--command:
-- @$(MULTIDO) $(FLAGS_TO_PASS) DO=install multi-do
--
-- In general, any operation, other than clean, which should be
--performed on all the multilibs should use a `$(MULTIDO)' line, setting
--the variable `DO' to the target of each recursive call to `make'.
--
-- The `clean' targets (`clean', `mostlyclean', etc.) should use
--`$(MULTICLEAN)'. For example, the `clean' target should do this:
-- @$(MULTICLEAN) DO=clean multi-clean
--
--
--File: configure.info, Node: FAQ, Next: Index, Prev: Multilibs, Up: Top
--
--9 Frequently Asked Questions
--****************************
--
--Which do I run first, `autoconf' or `automake'?
-- Except when you first add autoconf or automake support to a
-- package, you shouldn't run either by hand. Instead, configure
-- with the `--enable-maintainer-mode' option, and let `make' take
-- care of it.
--
--`autoconf' says something about undefined macros.
-- This means that you have macros in your `configure.in' which are
-- not defined by `autoconf'. You may be using an old version of
-- `autoconf'; try building and installing a newer one. Make sure the
-- newly installled `autoconf' is first on your `PATH'. Also, see
-- the next question.
--
--My `configure' script has stuff like `CY_GNU_GETTEXT' in it.
-- This means that you have macros in your `configure.in' which should
-- be defined in your `aclocal.m4' file, but aren't. This usually
-- means that `aclocal' was not able to appropriate definitions of the
-- macros. Make sure that you have installed all the packages you
-- need. In particular, make sure that you have installed libtool
-- (this is where `AM_PROG_LIBTOOL' is defined) and gettext (this is
-- where `CY_GNU_GETTEXT' is defined, at least in the Cygnus version
-- of gettext).
--
--My `Makefile' has `@' characters in it.
-- This may mean that you tried to use an autoconf substitution in
-- your `Makefile.in' without adding the appropriate `AC_SUBST' call
-- to your `configure' script. Or it may just mean that you need to
-- rebuild `Makefile' in your build directory. To rebuild `Makefile'
-- from `Makefile.in', run the shell script `config.status' with no
-- arguments. If you need to force `configure' to run again, first
-- run `config.status --recheck'. These runs are normally done
-- automatically by `Makefile' targets, but if your `Makefile' has
-- gotten messed up you'll need to help them along.
--
--Why do I have to run both `config.status --recheck' and `config.status'?
-- Normally, you don't; they will be run automatically by `Makefile'
-- targets. If you do need to run them, use `config.status --recheck'
-- to run the `configure' script again with the same arguments as the
-- first time you ran it. Use `config.status' (with no arguments) to
-- regenerate all files (`Makefile', `config.h', etc.) based on the
-- results of the configure script. The two cases are separate
-- because it isn't always necessary to regenerate all the files
-- after running `config.status --recheck'. The `Makefile' targets
-- generated by automake will use the environment variables
-- `CONFIG_FILES' and `CONFIG_HEADERS' to only regenerate files as
-- they are needed.
--
--What is the Cygnus tree?
-- The Cygnus tree is used for various packages including gdb, the GNU
-- binutils, and egcs. It is also, of course, used for Cygnus
-- releases. It is the build system which was developed at Cygnus,
-- using the Cygnus configure script. It permits building many
-- different packages with a single configure and make. The
-- configure scripts in the tree are being converted to autoconf, but
-- the general build structure remains intact.
--
--Why do I have to keep rebuilding and reinstalling the tools?
-- I know, it's a pain. Unfortunately, there are bugs in the tools
-- themselves which need to be fixed, and each time that happens
-- everybody who uses the tools need to reinstall new versions of
-- them. I don't know if there is going to be a clever fix until the
-- tools stabilize.
--
--Why not just have a Cygnus tree `make' target to update the tools?
-- The tools unfortunately need to be installed before they can be
-- used. That means that they must be built using an appropriate
-- prefix, and it seems unwise to assume that every configuration
-- uses an appropriate prefix. It might be possible to make them
-- work in place, or it might be possible to install them in some
-- subdirectory; so far these approaches have not been implemented.
--
--
--File: configure.info, Node: Index, Prev: FAQ, Up: Top
--
--Index
--*****
--
--
--* Menu:
--
--* --build option: Build and Host Options.
-- (line 9)
--* --host option: Build and Host Options.
-- (line 14)
--* --target option: Specifying the Target.
-- (line 10)
--* _GNU_SOURCE: Write configure.in. (line 134)
--* AC_CANONICAL_HOST: Using the Host Type. (line 10)
--* AC_CANONICAL_SYSTEM: Using the Target Type.
-- (line 6)
--* AC_CONFIG_HEADER: Write configure.in. (line 66)
--* AC_EXEEXT: Write configure.in. (line 86)
--* AC_INIT: Write configure.in. (line 38)
--* AC_OUTPUT: Write configure.in. (line 142)
--* AC_PREREQ: Write configure.in. (line 42)
--* AC_PROG_CC: Write configure.in. (line 103)
--* AC_PROG_CXX: Write configure.in. (line 117)
--* acconfig.h: Written Developer Files.
-- (line 27)
--* acconfig.h, writing: Write acconfig.h. (line 6)
--* acinclude.m4: Written Developer Files.
-- (line 37)
--* aclocal.m4: Generated Developer Files.
-- (line 33)
--* AM_CONFIG_HEADER: Write configure.in. (line 53)
--* AM_DISABLE_SHARED: Write configure.in. (line 127)
--* AM_EXEEXT: Write configure.in. (line 86)
--* AM_INIT_AUTOMAKE: Write configure.in. (line 48)
--* AM_MAINTAINER_MODE: Write configure.in. (line 70)
--* AM_PROG_LIBTOOL: Write configure.in. (line 122)
--* AM_PROG_LIBTOOL in configure: FAQ. (line 19)
--* build option: Build and Host Options.
-- (line 9)
--* building with a cross compiler: Canadian Cross. (line 6)
--* canadian cross: Canadian Cross. (line 6)
--* canadian cross in configure: CCross in Configure. (line 6)
--* canadian cross in cygnus tree: CCross in Cygnus Tree.
-- (line 6)
--* canadian cross in makefile: CCross in Make. (line 6)
--* canadian cross, configuring: Build and Host Options.
-- (line 6)
--* canonical system names: Configuration Names. (line 6)
--* config.cache: Build Files Description.
-- (line 28)
--* config.h: Build Files Description.
-- (line 23)
--* config.h.in: Generated Developer Files.
-- (line 45)
--* config.in: Generated Developer Files.
-- (line 45)
--* config.status: Build Files Description.
-- (line 9)
--* config.status --recheck: FAQ. (line 40)
--* configuration names: Configuration Names. (line 6)
--* configuration triplets: Configuration Names. (line 6)
--* configure: Generated Developer Files.
-- (line 21)
--* configure build system: Build and Host Options.
-- (line 9)
--* configure host: Build and Host Options.
-- (line 14)
--* configure target: Specifying the Target.
-- (line 10)
--* configure.in: Written Developer Files.
-- (line 9)
--* configure.in, writing: Write configure.in. (line 6)
--* configuring a canadian cross: Build and Host Options.
-- (line 6)
--* cross compiler: Cross Compilation Concepts.
-- (line 6)
--* cross compiler, building with: Canadian Cross. (line 6)
--* cross tools: Cross Compilation Tools.
-- (line 6)
--* CY_GNU_GETTEXT in configure: FAQ. (line 19)
--* cygnus configure: Cygnus Configure. (line 6)
--* goals: Goals. (line 6)
--* history: History. (line 6)
--* host names: Configuration Names. (line 6)
--* host option: Build and Host Options.
-- (line 14)
--* host system: Host and Target. (line 6)
--* host triplets: Configuration Names. (line 6)
--* HOST_CC: CCross in Make. (line 27)
--* libg++ configure: Cygnus Configure in C++ Libraries.
-- (line 6)
--* libio configure: Cygnus Configure in C++ Libraries.
-- (line 6)
--* libstdc++ configure: Cygnus Configure in C++ Libraries.
-- (line 6)
--* Makefile: Build Files Description.
-- (line 18)
--* Makefile, garbage characters: FAQ. (line 29)
--* Makefile.am: Written Developer Files.
-- (line 18)
--* Makefile.am, writing: Write Makefile.am. (line 6)
--* Makefile.in: Generated Developer Files.
-- (line 26)
--* multilibs: Multilibs. (line 6)
--* stamp-h: Build Files Description.
-- (line 41)
--* stamp-h.in: Generated Developer Files.
-- (line 54)
--* system names: Configuration Names. (line 6)
--* system types: Configuration Names. (line 6)
--* target option: Specifying the Target.
-- (line 10)
--* target system: Host and Target. (line 6)
--* triplets: Configuration Names. (line 6)
--* undefined macros: FAQ. (line 12)
--
--
--
--Tag Table:
--Node: Top971
--Node: Introduction1499
--Node: Goals2581
--Node: Tools3305
--Node: History4299
--Node: Building7297
--Node: Getting Started10560
--Node: Write configure.in11073
--Node: Write Makefile.am18324
--Node: Write acconfig.h21501
--Node: Generate files23038
--Node: Getting Started Example25004
--Node: Getting Started Example 125759
--Node: Getting Started Example 227680
--Node: Getting Started Example 330675
--Node: Generate Files in Example33039
--Node: Files34129
--Node: Developer Files34740
--Node: Developer Files Picture35120
--Node: Written Developer Files36408
--Node: Generated Developer Files38960
--Node: Build Files42104
--Node: Build Files Picture42765
--Node: Build Files Description43529
--Node: Support Files45535
--Node: Configuration Names48417
--Node: Configuration Name Definition48917
--Node: Using Configuration Names51240
--Node: Cross Compilation Tools53210
--Node: Cross Compilation Concepts53901
--Node: Host and Target54869
--Node: Using the Host Type56370
--Node: Specifying the Target57719
--Node: Using the Target Type58508
--Node: Cross Tools in the Cygnus Tree61939
--Node: Host and Target Libraries62996
--Node: Target Library Configure Scripts66745
--Node: Make Targets in Cygnus Tree69837
--Node: Target libiberty71185
--Node: Canadian Cross72572
--Node: Canadian Cross Example73413
--Node: Canadian Cross Concepts74532
--Node: Build Cross Host Tools76044
--Node: Build and Host Options76996
--Node: CCross not in Cygnus Tree78782
--Node: CCross in Cygnus Tree79760
--Node: Standard Cygnus CCross80181
--Node: Cross Cygnus CCross81545
--Node: Supporting Canadian Cross84345
--Node: CCross in Configure84960
--Node: CCross in Make88128
--Node: Cygnus Configure89731
--Node: Cygnus Configure Basics90566
--Node: Cygnus Configure in C++ Libraries95244
--Node: Multilibs96251
--Node: Multilibs in gcc97296
--Node: Multilibs in Target Libraries98374
--Node: FAQ102565
--Node: Index106665
--
--End Tag Table
-diff -Nur binutils-2.24.orig/etc/standards.info binutils-2.24/etc/standards.info
---- binutils-2.24.orig/etc/standards.info 2013-11-18 09:49:32.000000000 +0100
-+++ binutils-2.24/etc/standards.info 1970-01-01 01:00:00.000000000 +0100
-@@ -1,5744 +0,0 @@
--This is standards.info, produced by makeinfo version 4.8 from
--./standards.texi.
--
--INFO-DIR-SECTION GNU organization
--START-INFO-DIR-ENTRY
--* Standards: (standards). GNU coding standards.
--END-INFO-DIR-ENTRY
--
-- The GNU coding standards, last updated April 12, 2010.
--
-- Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
--2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software
--Foundation, Inc.
--
-- Permission is granted to copy, distribute and/or modify this document
--under the terms of the GNU Free Documentation License, Version 1.3 or
--any later version published by the Free Software Foundation; with no
--Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
--Texts. A copy of the license is included in the section entitled "GNU
--Free Documentation License".
--
--
--File: standards.info, Node: Top, Next: Preface, Prev: (dir), Up: (dir)
--
--Version
--*******
--
--The GNU coding standards, last updated April 12, 2010.
--
-- Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
--2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software
--Foundation, Inc.
--
-- Permission is granted to copy, distribute and/or modify this document
--under the terms of the GNU Free Documentation License, Version 1.3 or
--any later version published by the Free Software Foundation; with no
--Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
--Texts. A copy of the license is included in the section entitled "GNU
--Free Documentation License".
--
--* Menu:
--
--* Preface:: About the GNU Coding Standards.
--* Legal Issues:: Keeping free software free.
--* Design Advice:: General program design.
--* Program Behavior:: Program behavior for all programs
--* Writing C:: Making the best use of C.
--* Documentation:: Documenting programs.
--* Managing Releases:: The release process.
--* References:: Mentioning non-free software or documentation.
--* GNU Free Documentation License:: Copying and sharing this manual.
--* Index::
--
--
--File: standards.info, Node: Preface, Next: Legal Issues, Prev: Top, Up: Top
--
--1 About the GNU Coding Standards
--********************************
--
--The GNU Coding Standards were written by Richard Stallman and other GNU
--Project volunteers. Their purpose is to make the GNU system clean,
--consistent, and easy to install. This document can also be read as a
--guide to writing portable, robust and reliable programs. It focuses on
--programs written in C, but many of the rules and principles are useful
--even if you write in another programming language. The rules often
--state reasons for writing in a certain way.
--
-- If you did not obtain this file directly from the GNU project and
--recently, please check for a newer version. You can get the GNU Coding
--Standards from the GNU web server in many different formats, including
--the Texinfo source, PDF, HTML, DVI, plain text, and more, at:
--`http://www.gnu.org/prep/standards/'.
--
-- If you are maintaining an official GNU package, in addition to this
--document, please read and follow the GNU maintainer information (*note
--Contents: (maintain)Top.).
--
-- If you want to receive diffs for every change to these GNU documents,
--join the mailing list `gnustandards-commit@gnu.org', via the web
--interface at
--`http://lists.gnu.org/mailman/listinfo/gnustandards-commit'. Archives
--are also available there.
--
-- Please send corrections or suggestions for this document to
--<bug-standards@gnu.org>. If you make a suggestion, please include a
--suggested new wording for it, to help us consider the suggestion
--efficiently. We prefer a context diff to the Texinfo source, but if
--that's difficult for you, you can make a context diff for some other
--version of this document, or propose it in any way that makes it clear.
--The source repository for this document can be found at
--`http://savannah.gnu.org/projects/gnustandards'.
--
-- These standards cover the minimum of what is important when writing a
--GNU package. Likely, the need for additional standards will come up.
--Sometimes, you might suggest that such standards be added to this
--document. If you think your standards would be generally useful, please
--do suggest them.
--
-- You should also set standards for your package on many questions not
--addressed or not firmly specified here. The most important point is to
--be self-consistent--try to stick to the conventions you pick, and try
--to document them as much as possible. That way, your program will be
--more maintainable by others.
--
-- The GNU Hello program serves as an example of how to follow the GNU
--coding standards for a trivial program.
--`http://www.gnu.org/software/hello/hello.html'.
--
-- This release of the GNU Coding Standards was last updated April 12,
--2010.
--
--
--File: standards.info, Node: Legal Issues, Next: Design Advice, Prev: Preface, Up: Top
--
--2 Keeping Free Software Free
--****************************
--
--This chapter discusses how you can make sure that GNU software avoids
--legal difficulties, and other related issues.
--
--* Menu:
--
--* Reading Non-Free Code:: Referring to proprietary programs.
--* Contributions:: Accepting contributions.
--* Trademarks:: How we deal with trademark issues.
--
--
--File: standards.info, Node: Reading Non-Free Code, Next: Contributions, Up: Legal Issues
--
--2.1 Referring to Proprietary Programs
--=====================================
--
--Don't in any circumstances refer to Unix source code for or during your
--work on GNU! (Or to any other proprietary programs.)
--
-- If you have a vague recollection of the internals of a Unix program,
--this does not absolutely mean you can't write an imitation of it, but
--do try to organize the imitation internally along different lines,
--because this is likely to make the details of the Unix version
--irrelevant and dissimilar to your results.
--
-- For example, Unix utilities were generally optimized to minimize
--memory use; if you go for speed instead, your program will be very
--different. You could keep the entire input file in memory and scan it
--there instead of using stdio. Use a smarter algorithm discovered more
--recently than the Unix program. Eliminate use of temporary files. Do
--it in one pass instead of two (we did this in the assembler).
--
-- Or, on the contrary, emphasize simplicity instead of speed. For some
--applications, the speed of today's computers makes simpler algorithms
--adequate.
--
-- Or go for generality. For example, Unix programs often have static
--tables or fixed-size strings, which make for arbitrary limits; use
--dynamic allocation instead. Make sure your program handles NULs and
--other funny characters in the input files. Add a programming language
--for extensibility and write part of the program in that language.
--
-- Or turn some parts of the program into independently usable
--libraries. Or use a simple garbage collector instead of tracking
--precisely when to free memory, or use a new GNU facility such as
--obstacks.
--
--
--File: standards.info, Node: Contributions, Next: Trademarks, Prev: Reading Non-Free Code, Up: Legal Issues
--
--2.2 Accepting Contributions
--===========================
--
--If the program you are working on is copyrighted by the Free Software
--Foundation, then when someone else sends you a piece of code to add to
--the program, we need legal papers to use it--just as we asked you to
--sign papers initially. _Each_ person who makes a nontrivial
--contribution to a program must sign some sort of legal papers in order
--for us to have clear title to the program; the main author alone is not
--enough.
--
-- So, before adding in any contributions from other people, please tell
--us, so we can arrange to get the papers. Then wait until we tell you
--that we have received the signed papers, before you actually use the
--contribution.
--
-- This applies both before you release the program and afterward. If
--you receive diffs to fix a bug, and they make significant changes, we
--need legal papers for that change.
--
-- This also applies to comments and documentation files. For copyright
--law, comments and code are just text. Copyright applies to all kinds of
--text, so we need legal papers for all kinds.
--
-- We know it is frustrating to ask for legal papers; it's frustrating
--for us as well. But if you don't wait, you are going out on a limb--for
--example, what if the contributor's employer won't sign a disclaimer?
--You might have to take that code out again!
--
-- You don't need papers for changes of a few lines here or there, since
--they are not significant for copyright purposes. Also, you don't need
--papers if all you get from the suggestion is some ideas, not actual code
--which you use. For example, if someone sent you one implementation, but
--you write a different implementation of the same idea, you don't need to
--get papers.
--
-- The very worst thing is if you forget to tell us about the other
--contributor. We could be very embarrassed in court some day as a
--result.
--
-- We have more detailed advice for maintainers of programs; if you have
--reached the stage of actually maintaining a program for GNU (whether
--released or not), please ask us for a copy. It is also available
--online for your perusal: `http://www.gnu.org/prep/maintain/'.
--
--
--File: standards.info, Node: Trademarks, Prev: Contributions, Up: Legal Issues
--
--2.3 Trademarks
--==============
--
--Please do not include any trademark acknowledgements in GNU software
--packages or documentation.
--
-- Trademark acknowledgements are the statements that such-and-such is a
--trademark of so-and-so. The GNU Project has no objection to the basic
--idea of trademarks, but these acknowledgements feel like kowtowing, and
--there is no legal requirement for them, so we don't use them.
--
-- What is legally required, as regards other people's trademarks, is to
--avoid using them in ways which a reader might reasonably understand as
--naming or labeling our own programs or activities. For example, since
--"Objective C" is (or at least was) a trademark, we made sure to say
--that we provide a "compiler for the Objective C language" rather than
--an "Objective C compiler". The latter would have been meant as a
--shorter way of saying the former, but it does not explicitly state the
--relationship, so it could be misinterpreted as using "Objective C" as a
--label for the compiler rather than for the language.
--
-- Please don't use "win" as an abbreviation for Microsoft Windows in
--GNU software or documentation. In hacker terminology, calling
--something a "win" is a form of praise. If you wish to praise Microsoft
--Windows when speaking on your own, by all means do so, but not in GNU
--software. Usually we write the name "Windows" in full, but when
--brevity is very important (as in file names and sometimes symbol
--names), we abbreviate it to "w". For instance, the files and functions
--in Emacs that deal with Windows start with `w32'.
--
--
--File: standards.info, Node: Design Advice, Next: Program Behavior, Prev: Legal Issues, Up: Top
--
--3 General Program Design
--************************
--
--This chapter discusses some of the issues you should take into account
--when designing your program.
--
--* Menu:
--
--* Source Language:: Which languages to use.
--* Compatibility:: Compatibility with other implementations.
--* Using Extensions:: Using non-standard features.
--* Standard C:: Using standard C features.
--* Conditional Compilation:: Compiling code only if a conditional is true.
--
--
--File: standards.info, Node: Source Language, Next: Compatibility, Up: Design Advice
--
--3.1 Which Languages to Use
--==========================
--
--When you want to use a language that gets compiled and runs at high
--speed, the best language to use is C. Using another language is like
--using a non-standard feature: it will cause trouble for users. Even if
--GCC supports the other language, users may find it inconvenient to have
--to install the compiler for that other language in order to build your
--program. For example, if you write your program in C++, people will
--have to install the GNU C++ compiler in order to compile your program.
--
-- C has one other advantage over C++ and other compiled languages: more
--people know C, so more people will find it easy to read and modify the
--program if it is written in C.
--
-- So in general it is much better to use C, rather than the comparable
--alternatives.
--
-- But there are two exceptions to that conclusion:
--
-- * It is no problem to use another language to write a tool
-- specifically intended for use with that language. That is because
-- the only people who want to build the tool will be those who have
-- installed the other language anyway.
--
-- * If an application is of interest only to a narrow part of the
-- community, then the question of which language it is written in
-- has less effect on other people, so you may as well please
-- yourself.
--
-- Many programs are designed to be extensible: they include an
--interpreter for a language that is higher level than C. Often much of
--the program is written in that language, too. The Emacs editor
--pioneered this technique.
--
-- The standard extensibility interpreter for GNU software is Guile
--(`http://www.gnu.org/software/guile/'), which implements the language
--Scheme (an especially clean and simple dialect of Lisp). Guile also
--includes bindings for GTK+/GNOME, making it practical to write modern
--GUI functionality within Guile. We don't reject programs written in
--other "scripting languages" such as Perl and Python, but using Guile is
--very important for the overall consistency of the GNU system.
--
--
--File: standards.info, Node: Compatibility, Next: Using Extensions, Prev: Source Language, Up: Design Advice
--
--3.2 Compatibility with Other Implementations
--============================================
--
--With occasional exceptions, utility programs and libraries for GNU
--should be upward compatible with those in Berkeley Unix, and upward
--compatible with Standard C if Standard C specifies their behavior, and
--upward compatible with POSIX if POSIX specifies their behavior.
--
-- When these standards conflict, it is useful to offer compatibility
--modes for each of them.
--
-- Standard C and POSIX prohibit many kinds of extensions. Feel free
--to make the extensions anyway, and include a `--ansi', `--posix', or
--`--compatible' option to turn them off. However, if the extension has
--a significant chance of breaking any real programs or scripts, then it
--is not really upward compatible. So you should try to redesign its
--interface to make it upward compatible.
--
-- Many GNU programs suppress extensions that conflict with POSIX if the
--environment variable `POSIXLY_CORRECT' is defined (even if it is
--defined with a null value). Please make your program recognize this
--variable if appropriate.
--
-- When a feature is used only by users (not by programs or command
--files), and it is done poorly in Unix, feel free to replace it
--completely with something totally different and better. (For example,
--`vi' is replaced with Emacs.) But it is nice to offer a compatible
--feature as well. (There is a free `vi' clone, so we offer it.)
--
-- Additional useful features are welcome regardless of whether there
--is any precedent for them.
--
--
--File: standards.info, Node: Using Extensions, Next: Standard C, Prev: Compatibility, Up: Design Advice
--
--3.3 Using Non-standard Features
--===============================
--
--Many GNU facilities that already exist support a number of convenient
--extensions over the comparable Unix facilities. Whether to use these
--extensions in implementing your program is a difficult question.
--
-- On the one hand, using the extensions can make a cleaner program.
--On the other hand, people will not be able to build the program unless
--the other GNU tools are available. This might cause the program to
--work on fewer kinds of machines.
--
-- With some extensions, it might be easy to provide both alternatives.
--For example, you can define functions with a "keyword" `INLINE' and
--define that as a macro to expand into either `inline' or nothing,
--depending on the compiler.
--
-- In general, perhaps it is best not to use the extensions if you can
--straightforwardly do without them, but to use the extensions if they
--are a big improvement.
--
-- An exception to this rule are the large, established programs (such
--as Emacs) which run on a great variety of systems. Using GNU
--extensions in such programs would make many users unhappy, so we don't
--do that.
--
-- Another exception is for programs that are used as part of
--compilation: anything that must be compiled with other compilers in
--order to bootstrap the GNU compilation facilities. If these require
--the GNU compiler, then no one can compile them without having them
--installed already. That would be extremely troublesome in certain
--cases.
--
--
--File: standards.info, Node: Standard C, Next: Conditional Compilation, Prev: Using Extensions, Up: Design Advice
--
--3.4 Standard C and Pre-Standard C
--=================================
--
--1989 Standard C is widespread enough now that it is ok to use its
--features in new programs. There is one exception: do not ever use the
--"trigraph" feature of Standard C.
--
-- 1999 Standard C is not widespread yet, so please do not require its
--features in programs. It is ok to use its features if they are present.
--
-- However, it is easy to support pre-standard compilers in most
--programs, so if you know how to do that, feel free. If a program you
--are maintaining has such support, you should try to keep it working.
--
-- To support pre-standard C, instead of writing function definitions in
--standard prototype form,
--
-- int
-- foo (int x, int y)
-- ...
--
--write the definition in pre-standard style like this,
--
-- int
-- foo (x, y)
-- int x, y;
-- ...
--
--and use a separate declaration to specify the argument prototype:
--
-- int foo (int, int);
--
-- You need such a declaration anyway, in a header file, to get the
--benefit of prototypes in all the files where the function is called.
--And once you have the declaration, you normally lose nothing by writing
--the function definition in the pre-standard style.
--
-- This technique does not work for integer types narrower than `int'.
--If you think of an argument as being of a type narrower than `int',
--declare it as `int' instead.
--
-- There are a few special cases where this technique is hard to use.
--For example, if a function argument needs to hold the system type
--`dev_t', you run into trouble, because `dev_t' is shorter than `int' on
--some machines; but you cannot use `int' instead, because `dev_t' is
--wider than `int' on some machines. There is no type you can safely use
--on all machines in a non-standard definition. The only way to support
--non-standard C and pass such an argument is to check the width of
--`dev_t' using Autoconf and choose the argument type accordingly. This
--may not be worth the trouble.
--
-- In order to support pre-standard compilers that do not recognize
--prototypes, you may want to use a preprocessor macro like this:
--
-- /* Declare the prototype for a general external function. */
-- #if defined (__STDC__) || defined (WINDOWSNT)
-- #define P_(proto) proto
-- #else
-- #define P_(proto) ()
-- #endif
--
--
--File: standards.info, Node: Conditional Compilation, Prev: Standard C, Up: Design Advice
--
--3.5 Conditional Compilation
--===========================
--
--When supporting configuration options already known when building your
--program we prefer using `if (... )' over conditional compilation, as in
--the former case the compiler is able to perform more extensive checking
--of all possible code paths.
--
-- For example, please write
--
-- if (HAS_FOO)
-- ...
-- else
-- ...
--
--instead of:
--
-- #ifdef HAS_FOO
-- ...
-- #else
-- ...
-- #endif
--
-- A modern compiler such as GCC will generate exactly the same code in
--both cases, and we have been using similar techniques with good success
--in several projects. Of course, the former method assumes that
--`HAS_FOO' is defined as either 0 or 1.
--
-- While this is not a silver bullet solving all portability problems,
--and is not always appropriate, following this policy would have saved
--GCC developers many hours, or even days, per year.
--
-- In the case of function-like macros like `REVERSIBLE_CC_MODE' in GCC
--which cannot be simply used in `if (...)' statements, there is an easy
--workaround. Simply introduce another macro `HAS_REVERSIBLE_CC_MODE' as
--in the following example:
--
-- #ifdef REVERSIBLE_CC_MODE
-- #define HAS_REVERSIBLE_CC_MODE 1
-- #else
-- #define HAS_REVERSIBLE_CC_MODE 0
-- #endif
--
--
--File: standards.info, Node: Program Behavior, Next: Writing C, Prev: Design Advice, Up: Top
--
--4 Program Behavior for All Programs
--***********************************
--
--This chapter describes conventions for writing robust software. It
--also describes general standards for error messages, the command line
--interface, and how libraries should behave.
--
--* Menu:
--
--* Non-GNU Standards:: We consider standards such as POSIX;
-- we don't "obey" them.
--* Semantics:: Writing robust programs.
--* Libraries:: Library behavior.
--* Errors:: Formatting error messages.
--* User Interfaces:: Standards about interfaces generally.
--* Graphical Interfaces:: Standards for graphical interfaces.
--* Command-Line Interfaces:: Standards for command line interfaces.
--* Option Table:: Table of long options.
--* OID Allocations:: Table of OID slots for GNU.
--* Memory Usage:: When and how to care about memory needs.
--* File Usage:: Which files to use, and where.
--
--
--File: standards.info, Node: Non-GNU Standards, Next: Semantics, Up: Program Behavior
--
--4.1 Non-GNU Standards
--=====================
--
--The GNU Project regards standards published by other organizations as
--suggestions, not orders. We consider those standards, but we do not
--"obey" them. In developing a GNU program, you should implement an
--outside standard's specifications when that makes the GNU system better
--overall in an objective sense. When it doesn't, you shouldn't.
--
-- In most cases, following published standards is convenient for
--users--it means that their programs or scripts will work more portably.
--For instance, GCC implements nearly all the features of Standard C as
--specified by that standard. C program developers would be unhappy if
--it did not. And GNU utilities mostly follow specifications of POSIX.2;
--shell script writers and users would be unhappy if our programs were
--incompatible.
--
-- But we do not follow either of these specifications rigidly, and
--there are specific points on which we decided not to follow them, so as
--to make the GNU system better for users.
--
-- For instance, Standard C says that nearly all extensions to C are
--prohibited. How silly! GCC implements many extensions, some of which
--were later adopted as part of the standard. If you want these
--constructs to give an error message as "required" by the standard, you
--must specify `--pedantic', which was implemented only so that we can
--say "GCC is a 100% implementation of the standard," not because there
--is any reason to actually use it.
--
-- POSIX.2 specifies that `df' and `du' must output sizes by default in
--units of 512 bytes. What users want is units of 1k, so that is what we
--do by default. If you want the ridiculous behavior "required" by
--POSIX, you must set the environment variable `POSIXLY_CORRECT' (which
--was originally going to be named `POSIX_ME_HARDER').
--
-- GNU utilities also depart from the letter of the POSIX.2
--specification when they support long-named command-line options, and
--intermixing options with ordinary arguments. This minor
--incompatibility with POSIX is never a problem in practice, and it is
--very useful.
--
-- In particular, don't reject a new feature, or remove an old one,
--merely because a standard says it is "forbidden" or "deprecated."
--
--
--File: standards.info, Node: Semantics, Next: Libraries, Prev: Non-GNU Standards, Up: Program Behavior
--
--4.2 Writing Robust Programs
--===========================
--
--Avoid arbitrary limits on the length or number of _any_ data structure,
--including file names, lines, files, and symbols, by allocating all data
--structures dynamically. In most Unix utilities, "long lines are
--silently truncated". This is not acceptable in a GNU utility.
--
-- Utilities reading files should not drop NUL characters, or any other
--nonprinting characters _including those with codes above 0177_. The
--only sensible exceptions would be utilities specifically intended for
--interface to certain types of terminals or printers that can't handle
--those characters. Whenever possible, try to make programs work
--properly with sequences of bytes that represent multibyte characters,
--using encodings such as UTF-8 and others.
--
-- Check every system call for an error return, unless you know you
--wish to ignore errors. Include the system error text (from `perror' or
--equivalent) in _every_ error message resulting from a failing system
--call, as well as the name of the file if any and the name of the
--utility. Just "cannot open foo.c" or "stat failed" is not sufficient.
--
-- Check every call to `malloc' or `realloc' to see if it returned
--zero. Check `realloc' even if you are making the block smaller; in a
--system that rounds block sizes to a power of 2, `realloc' may get a
--different block if you ask for less space.
--
-- In Unix, `realloc' can destroy the storage block if it returns zero.
--GNU `realloc' does not have this bug: if it fails, the original block
--is unchanged. Feel free to assume the bug is fixed. If you wish to
--run your program on Unix, and wish to avoid lossage in this case, you
--can use the GNU `malloc'.
--
-- You must expect `free' to alter the contents of the block that was
--freed. Anything you want to fetch from the block, you must fetch before
--calling `free'.
--
-- If `malloc' fails in a noninteractive program, make that a fatal
--error. In an interactive program (one that reads commands from the
--user), it is better to abort the command and return to the command
--reader loop. This allows the user to kill other processes to free up
--virtual memory, and then try the command again.
--
-- Use `getopt_long' to decode arguments, unless the argument syntax
--makes this unreasonable.
--
-- When static storage is to be written in during program execution, use
--explicit C code to initialize it. Reserve C initialized declarations
--for data that will not be changed.
--
-- Try to avoid low-level interfaces to obscure Unix data structures
--(such as file directories, utmp, or the layout of kernel memory), since
--these are less likely to work compatibly. If you need to find all the
--files in a directory, use `readdir' or some other high-level interface.
--These are supported compatibly by GNU.
--
-- The preferred signal handling facilities are the BSD variant of
--`signal', and the POSIX `sigaction' function; the alternative USG
--`signal' interface is an inferior design.
--
-- Nowadays, using the POSIX signal functions may be the easiest way to
--make a program portable. If you use `signal', then on GNU/Linux
--systems running GNU libc version 1, you should include `bsd/signal.h'
--instead of `signal.h', so as to get BSD behavior. It is up to you
--whether to support systems where `signal' has only the USG behavior, or
--give up on them.
--
-- In error checks that detect "impossible" conditions, just abort.
--There is usually no point in printing any message. These checks
--indicate the existence of bugs. Whoever wants to fix the bugs will have
--to read the source code and run a debugger. So explain the problem with
--comments in the source. The relevant data will be in variables, which
--are easy to examine with the debugger, so there is no point moving them
--elsewhere.
--
-- Do not use a count of errors as the exit status for a program.
--_That does not work_, because exit status values are limited to 8 bits
--(0 through 255). A single run of the program might have 256 errors; if
--you try to return 256 as the exit status, the parent process will see 0
--as the status, and it will appear that the program succeeded.
--
-- If you make temporary files, check the `TMPDIR' environment
--variable; if that variable is defined, use the specified directory
--instead of `/tmp'.
--
-- In addition, be aware that there is a possible security problem when
--creating temporary files in world-writable directories. In C, you can
--avoid this problem by creating temporary files in this manner:
--
-- fd = open (filename, O_WRONLY | O_CREAT | O_EXCL, 0600);
--
--or by using the `mkstemps' function from libiberty.
--
-- In bash, use `set -C' to avoid this problem.
--
--
--File: standards.info, Node: Libraries, Next: Errors, Prev: Semantics, Up: Program Behavior
--
--4.3 Library Behavior
--====================
--
--Try to make library functions reentrant. If they need to do dynamic
--storage allocation, at least try to avoid any nonreentrancy aside from
--that of `malloc' itself.
--
-- Here are certain name conventions for libraries, to avoid name
--conflicts.
--
-- Choose a name prefix for the library, more than two characters long.
--All external function and variable names should start with this prefix.
--In addition, there should only be one of these in any given library
--member. This usually means putting each one in a separate source file.
--
-- An exception can be made when two external symbols are always used
--together, so that no reasonable program could use one without the
--other; then they can both go in the same file.
--
-- External symbols that are not documented entry points for the user
--should have names beginning with `_'. The `_' should be followed by
--the chosen name prefix for the library, to prevent collisions with
--other libraries. These can go in the same files with user entry points
--if you like.
--
-- Static functions and variables can be used as you like and need not
--fit any naming convention.
--
--
--File: standards.info, Node: Errors, Next: User Interfaces, Prev: Libraries, Up: Program Behavior
--
--4.4 Formatting Error Messages
--=============================
--
--Error messages from compilers should look like this:
--
-- SOURCE-FILE-NAME:LINENO: MESSAGE
--
--If you want to mention the column number, use one of these formats:
--
-- SOURCE-FILE-NAME:LINENO:COLUMN: MESSAGE
-- SOURCE-FILE-NAME:LINENO.COLUMN: MESSAGE
--
--Line numbers should start from 1 at the beginning of the file, and
--column numbers should start from 1 at the beginning of the line. (Both
--of these conventions are chosen for compatibility.) Calculate column
--numbers assuming that space and all ASCII printing characters have
--equal width, and assuming tab stops every 8 columns.
--
-- The error message can also give both the starting and ending
--positions of the erroneous text. There are several formats so that you
--can avoid redundant information such as a duplicate line number. Here
--are the possible formats:
--
-- SOURCE-FILE-NAME:LINENO-1.COLUMN-1-LINENO-2.COLUMN-2: MESSAGE
-- SOURCE-FILE-NAME:LINENO-1.COLUMN-1-COLUMN-2: MESSAGE
-- SOURCE-FILE-NAME:LINENO-1-LINENO-2: MESSAGE
--
--When an error is spread over several files, you can use this format:
--
-- FILE-1:LINENO-1.COLUMN-1-FILE-2:LINENO-2.COLUMN-2: MESSAGE
--
-- Error messages from other noninteractive programs should look like
--this:
--
-- PROGRAM:SOURCE-FILE-NAME:LINENO: MESSAGE
--
--when there is an appropriate source file, or like this:
--
-- PROGRAM: MESSAGE
--
--when there is no relevant source file.
--
-- If you want to mention the column number, use this format:
--
-- PROGRAM:SOURCE-FILE-NAME:LINENO:COLUMN: MESSAGE
--
-- In an interactive program (one that is reading commands from a
--terminal), it is better not to include the program name in an error
--message. The place to indicate which program is running is in the
--prompt or with the screen layout. (When the same program runs with
--input from a source other than a terminal, it is not interactive and
--would do best to print error messages using the noninteractive style.)
--
-- The string MESSAGE should not begin with a capital letter when it
--follows a program name and/or file name, because that isn't the
--beginning of a sentence. (The sentence conceptually starts at the
--beginning of the line.) Also, it should not end with a period.
--
-- Error messages from interactive programs, and other messages such as
--usage messages, should start with a capital letter. But they should not
--end with a period.
--
--
--File: standards.info, Node: User Interfaces, Next: Graphical Interfaces, Prev: Errors, Up: Program Behavior
--
--4.5 Standards for Interfaces Generally
--======================================
--
--Please don't make the behavior of a utility depend on the name used to
--invoke it. It is useful sometimes to make a link to a utility with a
--different name, and that should not change what it does.
--
-- Instead, use a run time option or a compilation switch or both to
--select among the alternate behaviors.
--
-- Likewise, please don't make the behavior of the program depend on the
--type of output device it is used with. Device independence is an
--important principle of the system's design; do not compromise it merely
--to save someone from typing an option now and then. (Variation in error
--message syntax when using a terminal is ok, because that is a side issue
--that people do not depend on.)
--
-- If you think one behavior is most useful when the output is to a
--terminal, and another is most useful when the output is a file or a
--pipe, then it is usually best to make the default behavior the one that
--is useful with output to a terminal, and have an option for the other
--behavior.
--
-- Compatibility requires certain programs to depend on the type of
--output device. It would be disastrous if `ls' or `sh' did not do so in
--the way all users expect. In some of these cases, we supplement the
--program with a preferred alternate version that does not depend on the
--output device type. For example, we provide a `dir' program much like
--`ls' except that its default output format is always multi-column
--format.
--
--
--File: standards.info, Node: Graphical Interfaces, Next: Command-Line Interfaces, Prev: User Interfaces, Up: Program Behavior
--
--4.6 Standards for Graphical Interfaces
--======================================
--
--When you write a program that provides a graphical user interface,
--please make it work with the X Window System and the GTK+ toolkit
--unless the functionality specifically requires some alternative (for
--example, "displaying jpeg images while in console mode").
--
-- In addition, please provide a command-line interface to control the
--functionality. (In many cases, the graphical user interface can be a
--separate program which invokes the command-line program.) This is so
--that the same jobs can be done from scripts.
--
-- Please also consider providing a D-bus interface for use from other
--running programs, such as within GNOME. (GNOME used to use CORBA for
--this, but that is being phased out.) In addition, consider providing a
--library interface (for use from C), and perhaps a keyboard-driven
--console interface (for use by users from console mode). Once you are
--doing the work to provide the functionality and the graphical
--interface, these won't be much extra work.
--
--
--File: standards.info, Node: Command-Line Interfaces, Next: Option Table, Prev: Graphical Interfaces, Up: Program Behavior
--
--4.7 Standards for Command Line Interfaces
--=========================================
--
--It is a good idea to follow the POSIX guidelines for the command-line
--options of a program. The easiest way to do this is to use `getopt' to
--parse them. Note that the GNU version of `getopt' will normally permit
--options anywhere among the arguments unless the special argument `--'
--is used. This is not what POSIX specifies; it is a GNU extension.
--
-- Please define long-named options that are equivalent to the
--single-letter Unix-style options. We hope to make GNU more user
--friendly this way. This is easy to do with the GNU function
--`getopt_long'.
--
-- One of the advantages of long-named options is that they can be
--consistent from program to program. For example, users should be able
--to expect the "verbose" option of any GNU program which has one, to be
--spelled precisely `--verbose'. To achieve this uniformity, look at the
--table of common long-option names when you choose the option names for
--your program (*note Option Table::).
--
-- It is usually a good idea for file names given as ordinary arguments
--to be input files only; any output files would be specified using
--options (preferably `-o' or `--output'). Even if you allow an output
--file name as an ordinary argument for compatibility, try to provide an
--option as another way to specify it. This will lead to more consistency
--among GNU utilities, and fewer idiosyncrasies for users to remember.
--
-- All programs should support two standard options: `--version' and
--`--help'. CGI programs should accept these as command-line options,
--and also if given as the `PATH_INFO'; for instance, visiting
--`http://example.org/p.cgi/--help' in a browser should output the same
--information as invoking `p.cgi --help' from the command line.
--
--* Menu:
--
--* --version:: The standard output for --version.
--* --help:: The standard output for --help.
--
--
--File: standards.info, Node: --version, Next: --help, Up: Command-Line Interfaces
--
--4.7.1 `--version'
-------------------
--
--The standard `--version' option should direct the program to print
--information about its name, version, origin and legal status, all on
--standard output, and then exit successfully. Other options and
--arguments should be ignored once this is seen, and the program should
--not perform its normal function.
--
-- The first line is meant to be easy for a program to parse; the
--version number proper starts after the last space. In addition, it
--contains the canonical name for this program, in this format:
--
-- GNU Emacs 19.30
--
--The program's name should be a constant string; _don't_ compute it from
--`argv[0]'. The idea is to state the standard or canonical name for the
--program, not its file name. There are other ways to find out the
--precise file name where a command is found in `PATH'.
--
-- If the program is a subsidiary part of a larger package, mention the
--package name in parentheses, like this:
--
-- emacsserver (GNU Emacs) 19.30
--
--If the package has a version number which is different from this
--program's version number, you can mention the package version number
--just before the close-parenthesis.
--
-- If you _need_ to mention the version numbers of libraries which are
--distributed separately from the package which contains this program,
--you can do so by printing an additional line of version info for each
--library you want to mention. Use the same format for these lines as for
--the first line.
--
-- Please do not mention all of the libraries that the program uses
--"just for completeness"--that would produce a lot of unhelpful clutter.
--Please mention library version numbers only if you find in practice that
--they are very important to you in debugging.
--
-- The following line, after the version number line or lines, should
--be a copyright notice. If more than one copyright notice is called
--for, put each on a separate line.
--
-- Next should follow a line stating the license, preferably using one
--of abbrevations below, and a brief statement that the program is free
--software, and that users are free to copy and change it. Also mention
--that there is no warranty, to the extent permitted by law. See
--recommended wording below.
--
-- It is ok to finish the output with a list of the major authors of the
--program, as a way of giving credit.
--
-- Here's an example of output that follows these rules:
--
-- GNU hello 2.3
-- Copyright (C) 2007 Free Software Foundation, Inc.
-- License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
-- This is free software: you are free to change and redistribute it.
-- There is NO WARRANTY, to the extent permitted by law.
--
-- You should adapt this to your program, of course, filling in the
--proper year, copyright holder, name of program, and the references to
--distribution terms, and changing the rest of the wording as necessary.
--
-- This copyright notice only needs to mention the most recent year in
--which changes were made--there's no need to list the years for previous
--versions' changes. You don't have to mention the name of the program in
--these notices, if that is inconvenient, since it appeared in the first
--line. (The rules are different for copyright notices in source files;
--*note Copyright Notices: (maintain)Copyright Notices.)
--
-- Translations of the above lines must preserve the validity of the
--copyright notices (*note Internationalization::). If the translation's
--character set supports it, the `(C)' should be replaced with the
--copyright symbol, as follows:
--
-- (the official copyright symbol, which is the letter C in a circle);
--
-- Write the word "Copyright" exactly like that, in English. Do not
--translate it into another language. International treaties recognize
--the English word "Copyright"; translations into other languages do not
--have legal significance.
--
-- Finally, here is the table of our suggested license abbreviations.
--Any abbreviation can be followed by `vVERSION[+]', meaning that
--particular version, or later versions with the `+', as shown above.
--
-- In the case of exceptions for extra permissions with the GPL, we use
--`/' for a separator; the version number can follow the license
--abbreviation as usual, as in the examples below.
--
--GPL
-- GNU General Public License, `http://www.gnu.org/licenses/gpl.html'.
--
--LGPL
-- GNU Lesser General Public License,
-- `http://www.gnu.org/licenses/lgpl.html'.
--
--GPL/Ada
-- GNU GPL with the exception for Ada.
--
--Apache
-- The Apache Software Foundation license,
-- `http://www.apache.org/licenses'.
--
--Artistic
-- The Artistic license used for Perl,
-- `http://www.perlfoundation.org/legal'.
--
--Expat
-- The Expat license, `http://www.jclark.com/xml/copying.txt'.
--
--MPL
-- The Mozilla Public License, `http://www.mozilla.org/MPL/'.
--
--OBSD
-- The original (4-clause) BSD license, incompatible with the GNU GPL
-- `http://www.xfree86.org/3.3.6/COPYRIGHT2.html#6'.
--
--PHP
-- The license used for PHP, `http://www.php.net/license/'.
--
--public domain
-- The non-license that is being in the public domain,
-- `http://www.gnu.org/licenses/license-list.html#PublicDomain'.
--
--Python
-- The license for Python, `http://www.python.org/2.0.1/license.html'.
--
--RBSD
-- The revised (3-clause) BSD, compatible with the GNU GPL,
-- `http://www.xfree86.org/3.3.6/COPYRIGHT2.html#5'.
--
--X11
-- The simple non-copyleft license used for most versions of the X
-- Window System, `http://www.xfree86.org/3.3.6/COPYRIGHT2.html#3'.
--
--Zlib
-- The license for Zlib, `http://www.gzip.org/zlib/zlib_license.html'.
--
--
-- More information about these licenses and many more are on the GNU
--licensing web pages, `http://www.gnu.org/licenses/license-list.html'.
--
--
--File: standards.info, Node: --help, Prev: --version, Up: Command-Line Interfaces
--
--4.7.2 `--help'
----------------
--
--The standard `--help' option should output brief documentation for how
--to invoke the program, on standard output, then exit successfully.
--Other options and arguments should be ignored once this is seen, and
--the program should not perform its normal function.
--
-- Near the end of the `--help' option's output, please place lines
--giving the email address for bug reports, the package's home page
--(normally <http://www.gnu.org/software/PKG>, and the general page for
--help using GNU programs. The format should be like this:
--
-- Report bugs to: MAILING-ADDRESS
-- PKG home page: <http://www.gnu.org/software/PKG/>
-- General help using GNU software: <http://www.gnu.org/gethelp/>
--
-- It is ok to mention other appropriate mailing lists and web pages.
--
--
--File: standards.info, Node: Option Table, Next: OID Allocations, Prev: Command-Line Interfaces, Up: Program Behavior
--
--4.8 Table of Long Options
--=========================
--
--Here is a table of long options used by GNU programs. It is surely
--incomplete, but we aim to list all the options that a new program might
--want to be compatible with. If you use names not already in the table,
--please send <bug-standards@gnu.org> a list of them, with their
--meanings, so we can update the table.
--
--`after-date'
-- `-N' in `tar'.
--
--`all'
-- `-a' in `du', `ls', `nm', `stty', `uname', and `unexpand'.
--
--`all-text'
-- `-a' in `diff'.
--
--`almost-all'
-- `-A' in `ls'.
--
--`append'
-- `-a' in `etags', `tee', `time'; `-r' in `tar'.
--
--`archive'
-- `-a' in `cp'.
--
--`archive-name'
-- `-n' in `shar'.
--
--`arglength'
-- `-l' in `m4'.
--
--`ascii'
-- `-a' in `diff'.
--
--`assign'
-- `-v' in `gawk'.
--
--`assume-new'
-- `-W' in `make'.
--
--`assume-old'
-- `-o' in `make'.
--
--`auto-check'
-- `-a' in `recode'.
--
--`auto-pager'
-- `-a' in `wdiff'.
--
--`auto-reference'
-- `-A' in `ptx'.
--
--`avoid-wraps'
-- `-n' in `wdiff'.
--
--`background'
-- For server programs, run in the background.
--
--`backward-search'
-- `-B' in `ctags'.
--
--`basename'
-- `-f' in `shar'.
--
--`batch'
-- Used in GDB.
--
--`baud'
-- Used in GDB.
--
--`before'
-- `-b' in `tac'.
--
--`binary'
-- `-b' in `cpio' and `diff'.
--
--`bits-per-code'
-- `-b' in `shar'.
--
--`block-size'
-- Used in `cpio' and `tar'.
--
--`blocks'
-- `-b' in `head' and `tail'.
--
--`break-file'
-- `-b' in `ptx'.
--
--`brief'
-- Used in various programs to make output shorter.
--
--`bytes'
-- `-c' in `head', `split', and `tail'.
--
--`c++'
-- `-C' in `etags'.
--
--`catenate'
-- `-A' in `tar'.
--
--`cd'
-- Used in various programs to specify the directory to use.
--
--`changes'
-- `-c' in `chgrp' and `chown'.
--
--`classify'
-- `-F' in `ls'.
--
--`colons'
-- `-c' in `recode'.
--
--`command'
-- `-c' in `su'; `-x' in GDB.
--
--`compare'
-- `-d' in `tar'.
--
--`compat'
-- Used in `gawk'.
--
--`compress'
-- `-Z' in `tar' and `shar'.
--
--`concatenate'
-- `-A' in `tar'.
--
--`confirmation'
-- `-w' in `tar'.
--
--`context'
-- Used in `diff'.
--
--`copyleft'
-- `-W copyleft' in `gawk'.
--
--`copyright'
-- `-C' in `ptx', `recode', and `wdiff'; `-W copyright' in `gawk'.
--
--`core'
-- Used in GDB.
--
--`count'
-- `-q' in `who'.
--
--`count-links'
-- `-l' in `du'.
--
--`create'
-- Used in `tar' and `cpio'.
--
--`cut-mark'
-- `-c' in `shar'.
--
--`cxref'
-- `-x' in `ctags'.
--
--`date'
-- `-d' in `touch'.
--
--`debug'
-- `-d' in `make' and `m4'; `-t' in Bison.
--
--`define'
-- `-D' in `m4'.
--
--`defines'
-- `-d' in Bison and `ctags'.
--
--`delete'
-- `-D' in `tar'.
--
--`dereference'
-- `-L' in `chgrp', `chown', `cpio', `du', `ls', and `tar'.
--
--`dereference-args'
-- `-D' in `du'.
--
--`device'
-- Specify an I/O device (special file name).
--
--`diacritics'
-- `-d' in `recode'.
--
--`dictionary-order'
-- `-d' in `look'.
--
--`diff'
-- `-d' in `tar'.
--
--`digits'
-- `-n' in `csplit'.
--
--`directory'
-- Specify the directory to use, in various programs. In `ls', it
-- means to show directories themselves rather than their contents.
-- In `rm' and `ln', it means to not treat links to directories
-- specially.
--
--`discard-all'
-- `-x' in `strip'.
--
--`discard-locals'
-- `-X' in `strip'.
--
--`dry-run'
-- `-n' in `make'.
--
--`ed'
-- `-e' in `diff'.
--
--`elide-empty-files'
-- `-z' in `csplit'.
--
--`end-delete'
-- `-x' in `wdiff'.
--
--`end-insert'
-- `-z' in `wdiff'.
--
--`entire-new-file'
-- `-N' in `diff'.
--
--`environment-overrides'
-- `-e' in `make'.
--
--`eof'
-- `-e' in `xargs'.
--
--`epoch'
-- Used in GDB.
--
--`error-limit'
-- Used in `makeinfo'.
--
--`error-output'
-- `-o' in `m4'.
--
--`escape'
-- `-b' in `ls'.
--
--`exclude-from'
-- `-X' in `tar'.
--
--`exec'
-- Used in GDB.
--
--`exit'
-- `-x' in `xargs'.
--
--`exit-0'
-- `-e' in `unshar'.
--
--`expand-tabs'
-- `-t' in `diff'.
--
--`expression'
-- `-e' in `sed'.
--
--`extern-only'
-- `-g' in `nm'.
--
--`extract'
-- `-i' in `cpio'; `-x' in `tar'.
--
--`faces'
-- `-f' in `finger'.
--
--`fast'
-- `-f' in `su'.
--
--`fatal-warnings'
-- `-E' in `m4'.
--
--`file'
-- `-f' in `gawk', `info', `make', `mt', `sed', and `tar'.
--
--`field-separator'
-- `-F' in `gawk'.
--
--`file-prefix'
-- `-b' in Bison.
--
--`file-type'
-- `-F' in `ls'.
--
--`files-from'
-- `-T' in `tar'.
--
--`fill-column'
-- Used in `makeinfo'.
--
--`flag-truncation'
-- `-F' in `ptx'.
--
--`fixed-output-files'
-- `-y' in Bison.
--
--`follow'
-- `-f' in `tail'.
--
--`footnote-style'
-- Used in `makeinfo'.
--
--`force'
-- `-f' in `cp', `ln', `mv', and `rm'.
--
--`force-prefix'
-- `-F' in `shar'.
--
--`foreground'
-- For server programs, run in the foreground; in other words, don't
-- do anything special to run the server in the background.
--
--`format'
-- Used in `ls', `time', and `ptx'.
--
--`freeze-state'
-- `-F' in `m4'.
--
--`fullname'
-- Used in GDB.
--
--`gap-size'
-- `-g' in `ptx'.
--
--`get'
-- `-x' in `tar'.
--
--`graphic'
-- `-i' in `ul'.
--
--`graphics'
-- `-g' in `recode'.
--
--`group'
-- `-g' in `install'.
--
--`gzip'
-- `-z' in `tar' and `shar'.
--
--`hashsize'
-- `-H' in `m4'.
--
--`header'
-- `-h' in `objdump' and `recode'
--
--`heading'
-- `-H' in `who'.
--
--`help'
-- Used to ask for brief usage information.
--
--`here-delimiter'
-- `-d' in `shar'.
--
--`hide-control-chars'
-- `-q' in `ls'.
--
--`html'
-- In `makeinfo', output HTML.
--
--`idle'
-- `-u' in `who'.
--
--`ifdef'
-- `-D' in `diff'.
--
--`ignore'
-- `-I' in `ls'; `-x' in `recode'.
--
--`ignore-all-space'
-- `-w' in `diff'.
--
--`ignore-backups'
-- `-B' in `ls'.
--
--`ignore-blank-lines'
-- `-B' in `diff'.
--
--`ignore-case'
-- `-f' in `look' and `ptx'; `-i' in `diff' and `wdiff'.
--
--`ignore-errors'
-- `-i' in `make'.
--
--`ignore-file'
-- `-i' in `ptx'.
--
--`ignore-indentation'
-- `-I' in `etags'.
--
--`ignore-init-file'
-- `-f' in Oleo.
--
--`ignore-interrupts'
-- `-i' in `tee'.
--
--`ignore-matching-lines'
-- `-I' in `diff'.
--
--`ignore-space-change'
-- `-b' in `diff'.
--
--`ignore-zeros'
-- `-i' in `tar'.
--
--`include'
-- `-i' in `etags'; `-I' in `m4'.
--
--`include-dir'
-- `-I' in `make'.
--
--`incremental'
-- `-G' in `tar'.
--
--`info'
-- `-i', `-l', and `-m' in Finger.
--
--`init-file'
-- In some programs, specify the name of the file to read as the
-- user's init file.
--
--`initial'
-- `-i' in `expand'.
--
--`initial-tab'
-- `-T' in `diff'.
--
--`inode'
-- `-i' in `ls'.
--
--`interactive'
-- `-i' in `cp', `ln', `mv', `rm'; `-e' in `m4'; `-p' in `xargs';
-- `-w' in `tar'.
--
--`intermix-type'
-- `-p' in `shar'.
--
--`iso-8601'
-- Used in `date'
--
--`jobs'
-- `-j' in `make'.
--
--`just-print'
-- `-n' in `make'.
--
--`keep-going'
-- `-k' in `make'.
--
--`keep-files'
-- `-k' in `csplit'.
--
--`kilobytes'
-- `-k' in `du' and `ls'.
--
--`language'
-- `-l' in `etags'.
--
--`less-mode'
-- `-l' in `wdiff'.
--
--`level-for-gzip'
-- `-g' in `shar'.
--
--`line-bytes'
-- `-C' in `split'.
--
--`lines'
-- Used in `split', `head', and `tail'.
--
--`link'
-- `-l' in `cpio'.
--
--`lint'
--`lint-old'
-- Used in `gawk'.
--
--`list'
-- `-t' in `cpio'; `-l' in `recode'.
--
--`list'
-- `-t' in `tar'.
--
--`literal'
-- `-N' in `ls'.
--
--`load-average'
-- `-l' in `make'.
--
--`login'
-- Used in `su'.
--
--`machine'
-- Used in `uname'.
--
--`macro-name'
-- `-M' in `ptx'.
--
--`mail'
-- `-m' in `hello' and `uname'.
--
--`make-directories'
-- `-d' in `cpio'.
--
--`makefile'
-- `-f' in `make'.
--
--`mapped'
-- Used in GDB.
--
--`max-args'
-- `-n' in `xargs'.
--
--`max-chars'
-- `-n' in `xargs'.
--
--`max-lines'
-- `-l' in `xargs'.
--
--`max-load'
-- `-l' in `make'.
--
--`max-procs'
-- `-P' in `xargs'.
--
--`mesg'
-- `-T' in `who'.
--
--`message'
-- `-T' in `who'.
--
--`minimal'
-- `-d' in `diff'.
--
--`mixed-uuencode'
-- `-M' in `shar'.
--
--`mode'
-- `-m' in `install', `mkdir', and `mkfifo'.
--
--`modification-time'
-- `-m' in `tar'.
--
--`multi-volume'
-- `-M' in `tar'.
--
--`name-prefix'
-- `-a' in Bison.
--
--`nesting-limit'
-- `-L' in `m4'.
--
--`net-headers'
-- `-a' in `shar'.
--
--`new-file'
-- `-W' in `make'.
--
--`no-builtin-rules'
-- `-r' in `make'.
--
--`no-character-count'
-- `-w' in `shar'.
--
--`no-check-existing'
-- `-x' in `shar'.
--
--`no-common'
-- `-3' in `wdiff'.
--
--`no-create'
-- `-c' in `touch'.
--
--`no-defines'
-- `-D' in `etags'.
--
--`no-deleted'
-- `-1' in `wdiff'.
--
--`no-dereference'
-- `-d' in `cp'.
--
--`no-inserted'
-- `-2' in `wdiff'.
--
--`no-keep-going'
-- `-S' in `make'.
--
--`no-lines'
-- `-l' in Bison.
--
--`no-piping'
-- `-P' in `shar'.
--
--`no-prof'
-- `-e' in `gprof'.
--
--`no-regex'
-- `-R' in `etags'.
--
--`no-sort'
-- `-p' in `nm'.
--
--`no-splash'
-- Don't print a startup splash screen.
--
--`no-split'
-- Used in `makeinfo'.
--
--`no-static'
-- `-a' in `gprof'.
--
--`no-time'
-- `-E' in `gprof'.
--
--`no-timestamp'
-- `-m' in `shar'.
--
--`no-validate'
-- Used in `makeinfo'.
--
--`no-wait'
-- Used in `emacsclient'.
--
--`no-warn'
-- Used in various programs to inhibit warnings.
--
--`node'
-- `-n' in `info'.
--
--`nodename'
-- `-n' in `uname'.
--
--`nonmatching'
-- `-f' in `cpio'.
--
--`nstuff'
-- `-n' in `objdump'.
--
--`null'
-- `-0' in `xargs'.
--
--`number'
-- `-n' in `cat'.
--
--`number-nonblank'
-- `-b' in `cat'.
--
--`numeric-sort'
-- `-n' in `nm'.
--
--`numeric-uid-gid'
-- `-n' in `cpio' and `ls'.
--
--`nx'
-- Used in GDB.
--
--`old-archive'
-- `-o' in `tar'.
--
--`old-file'
-- `-o' in `make'.
--
--`one-file-system'
-- `-l' in `tar', `cp', and `du'.
--
--`only-file'
-- `-o' in `ptx'.
--
--`only-prof'
-- `-f' in `gprof'.
--
--`only-time'
-- `-F' in `gprof'.
--
--`options'
-- `-o' in `getopt', `fdlist', `fdmount', `fdmountd', and `fdumount'.
--
--`output'
-- In various programs, specify the output file name.
--
--`output-prefix'
-- `-o' in `shar'.
--
--`override'
-- `-o' in `rm'.
--
--`overwrite'
-- `-c' in `unshar'.
--
--`owner'
-- `-o' in `install'.
--
--`paginate'
-- `-l' in `diff'.
--
--`paragraph-indent'
-- Used in `makeinfo'.
--
--`parents'
-- `-p' in `mkdir' and `rmdir'.
--
--`pass-all'
-- `-p' in `ul'.
--
--`pass-through'
-- `-p' in `cpio'.
--
--`port'
-- `-P' in `finger'.
--
--`portability'
-- `-c' in `cpio' and `tar'.
--
--`posix'
-- Used in `gawk'.
--
--`prefix-builtins'
-- `-P' in `m4'.
--
--`prefix'
-- `-f' in `csplit'.
--
--`preserve'
-- Used in `tar' and `cp'.
--
--`preserve-environment'
-- `-p' in `su'.
--
--`preserve-modification-time'
-- `-m' in `cpio'.
--
--`preserve-order'
-- `-s' in `tar'.
--
--`preserve-permissions'
-- `-p' in `tar'.
--
--`print'
-- `-l' in `diff'.
--
--`print-chars'
-- `-L' in `cmp'.
--
--`print-data-base'
-- `-p' in `make'.
--
--`print-directory'
-- `-w' in `make'.
--
--`print-file-name'
-- `-o' in `nm'.
--
--`print-symdefs'
-- `-s' in `nm'.
--
--`printer'
-- `-p' in `wdiff'.
--
--`prompt'
-- `-p' in `ed'.
--
--`proxy'
-- Specify an HTTP proxy.
--
--`query-user'
-- `-X' in `shar'.
--
--`question'
-- `-q' in `make'.
--
--`quiet'
-- Used in many programs to inhibit the usual output. Every program
-- accepting `--quiet' should accept `--silent' as a synonym.
--
--`quiet-unshar'
-- `-Q' in `shar'
--
--`quote-name'
-- `-Q' in `ls'.
--
--`rcs'
-- `-n' in `diff'.
--
--`re-interval'
-- Used in `gawk'.
--
--`read-full-blocks'
-- `-B' in `tar'.
--
--`readnow'
-- Used in GDB.
--
--`recon'
-- `-n' in `make'.
--
--`record-number'
-- `-R' in `tar'.
--
--`recursive'
-- Used in `chgrp', `chown', `cp', `ls', `diff', and `rm'.
--
--`reference'
-- `-r' in `touch'.
--
--`references'
-- `-r' in `ptx'.
--
--`regex'
-- `-r' in `tac' and `etags'.
--
--`release'
-- `-r' in `uname'.
--
--`reload-state'
-- `-R' in `m4'.
--
--`relocation'
-- `-r' in `objdump'.
--
--`rename'
-- `-r' in `cpio'.
--
--`replace'
-- `-i' in `xargs'.
--
--`report-identical-files'
-- `-s' in `diff'.
--
--`reset-access-time'
-- `-a' in `cpio'.
--
--`reverse'
-- `-r' in `ls' and `nm'.
--
--`reversed-ed'
-- `-f' in `diff'.
--
--`right-side-defs'
-- `-R' in `ptx'.
--
--`same-order'
-- `-s' in `tar'.
--
--`same-permissions'
-- `-p' in `tar'.
--
--`save'
-- `-g' in `stty'.
--
--`se'
-- Used in GDB.
--
--`sentence-regexp'
-- `-S' in `ptx'.
--
--`separate-dirs'
-- `-S' in `du'.
--
--`separator'
-- `-s' in `tac'.
--
--`sequence'
-- Used by `recode' to chose files or pipes for sequencing passes.
--
--`shell'
-- `-s' in `su'.
--
--`show-all'
-- `-A' in `cat'.
--
--`show-c-function'
-- `-p' in `diff'.
--
--`show-ends'
-- `-E' in `cat'.
--
--`show-function-line'
-- `-F' in `diff'.
--
--`show-tabs'
-- `-T' in `cat'.
--
--`silent'
-- Used in many programs to inhibit the usual output. Every program
-- accepting `--silent' should accept `--quiet' as a synonym.
--
--`size'
-- `-s' in `ls'.
--
--`socket'
-- Specify a file descriptor for a network server to use for its
-- socket, instead of opening and binding a new socket. This
-- provides a way to run, in a non-privileged process, a server that
-- normally needs a reserved port number.
--
--`sort'
-- Used in `ls'.
--
--`source'
-- `-W source' in `gawk'.
--
--`sparse'
-- `-S' in `tar'.
--
--`speed-large-files'
-- `-H' in `diff'.
--
--`split-at'
-- `-E' in `unshar'.
--
--`split-size-limit'
-- `-L' in `shar'.
--
--`squeeze-blank'
-- `-s' in `cat'.
--
--`start-delete'
-- `-w' in `wdiff'.
--
--`start-insert'
-- `-y' in `wdiff'.
--
--`starting-file'
-- Used in `tar' and `diff' to specify which file within a directory
-- to start processing with.
--
--`statistics'
-- `-s' in `wdiff'.
--
--`stdin-file-list'
-- `-S' in `shar'.
--
--`stop'
-- `-S' in `make'.
--
--`strict'
-- `-s' in `recode'.
--
--`strip'
-- `-s' in `install'.
--
--`strip-all'
-- `-s' in `strip'.
--
--`strip-debug'
-- `-S' in `strip'.
--
--`submitter'
-- `-s' in `shar'.
--
--`suffix'
-- `-S' in `cp', `ln', `mv'.
--
--`suffix-format'
-- `-b' in `csplit'.
--
--`sum'
-- `-s' in `gprof'.
--
--`summarize'
-- `-s' in `du'.
--
--`symbolic'
-- `-s' in `ln'.
--
--`symbols'
-- Used in GDB and `objdump'.
--
--`synclines'
-- `-s' in `m4'.
--
--`sysname'
-- `-s' in `uname'.
--
--`tabs'
-- `-t' in `expand' and `unexpand'.
--
--`tabsize'
-- `-T' in `ls'.
--
--`terminal'
-- `-T' in `tput' and `ul'. `-t' in `wdiff'.
--
--`text'
-- `-a' in `diff'.
--
--`text-files'
-- `-T' in `shar'.
--
--`time'
-- Used in `ls' and `touch'.
--
--`timeout'
-- Specify how long to wait before giving up on some operation.
--
--`to-stdout'
-- `-O' in `tar'.
--
--`total'
-- `-c' in `du'.
--
--`touch'
-- `-t' in `make', `ranlib', and `recode'.
--
--`trace'
-- `-t' in `m4'.
--
--`traditional'
-- `-t' in `hello'; `-W traditional' in `gawk'; `-G' in `ed', `m4',
-- and `ptx'.
--
--`tty'
-- Used in GDB.
--
--`typedefs'
-- `-t' in `ctags'.
--
--`typedefs-and-c++'
-- `-T' in `ctags'.
--
--`typeset-mode'
-- `-t' in `ptx'.
--
--`uncompress'
-- `-z' in `tar'.
--
--`unconditional'
-- `-u' in `cpio'.
--
--`undefine'
-- `-U' in `m4'.
--
--`undefined-only'
-- `-u' in `nm'.
--
--`update'
-- `-u' in `cp', `ctags', `mv', `tar'.
--
--`usage'
-- Used in `gawk'; same as `--help'.
--
--`uuencode'
-- `-B' in `shar'.
--
--`vanilla-operation'
-- `-V' in `shar'.
--
--`verbose'
-- Print more information about progress. Many programs support this.
--
--`verify'
-- `-W' in `tar'.
--
--`version'
-- Print the version number.
--
--`version-control'
-- `-V' in `cp', `ln', `mv'.
--
--`vgrind'
-- `-v' in `ctags'.
--
--`volume'
-- `-V' in `tar'.
--
--`what-if'
-- `-W' in `make'.
--
--`whole-size-limit'
-- `-l' in `shar'.
--
--`width'
-- `-w' in `ls' and `ptx'.
--
--`word-regexp'
-- `-W' in `ptx'.
--
--`writable'
-- `-T' in `who'.
--
--`zeros'
-- `-z' in `gprof'.
--
--
--File: standards.info, Node: OID Allocations, Next: Memory Usage, Prev: Option Table, Up: Program Behavior
--
--4.9 OID Allocations
--===================
--
--The OID (object identifier) 1.3.6.1.4.1.11591 has been assigned to the
--GNU Project (thanks to Werner Koch). These are used for SNMP, LDAP,
--X.509 certificates, and so on. The web site
--`http://www.alvestrand.no/objectid' has a (voluntary) listing of many
--OID assignments.
--
-- If you need a new slot for your GNU package, write
--<maintainers@gnu.org>. Here is a list of arcs currently assigned:
--
--
-- 1.3.6.1.4.1.11591 GNU
--
-- 1.3.6.1.4.1.11591.1 GNU Radius
--
-- 1.3.6.1.4.1.11591.2 GnuPG
-- 1.3.6.1.4.1.11591.2.1 notation
-- 1.3.6.1.4.1.11591.2.1.1 pkaAddress
--
-- 1.3.6.1.4.1.11591.3 GNU Radar
--
-- 1.3.6.1.4.1.11591.4 GNU GSS
--
-- 1.3.6.1.4.1.11591.5 GNU Mailutils
--
-- 1.3.6.1.4.1.11591.6 GNU Shishi
--
-- 1.3.6.1.4.1.11591.7 GNU Radio
--
-- 1.3.6.1.4.1.11591.12 digestAlgorithm
-- 1.3.6.1.4.1.11591.12.2 TIGER/192
-- 1.3.6.1.4.1.11591.13 encryptionAlgorithm
-- 1.3.6.1.4.1.11591.13.2 Serpent
-- 1.3.6.1.4.1.11591.13.2.1 Serpent-128-ECB
-- 1.3.6.1.4.1.11591.13.2.2 Serpent-128-CBC
-- 1.3.6.1.4.1.11591.13.2.3 Serpent-128-OFB
-- 1.3.6.1.4.1.11591.13.2.4 Serpent-128-CFB
-- 1.3.6.1.4.1.11591.13.2.21 Serpent-192-ECB
-- 1.3.6.1.4.1.11591.13.2.22 Serpent-192-CBC
-- 1.3.6.1.4.1.11591.13.2.23 Serpent-192-OFB
-- 1.3.6.1.4.1.11591.13.2.24 Serpent-192-CFB
-- 1.3.6.1.4.1.11591.13.2.41 Serpent-256-ECB
-- 1.3.6.1.4.1.11591.13.2.42 Serpent-256-CBC
-- 1.3.6.1.4.1.11591.13.2.43 Serpent-256-OFB
-- 1.3.6.1.4.1.11591.13.2.44 Serpent-256-CFB
-- 1.3.6.1.4.1.11591.14 CRC algorithms
-- 1.3.6.1.4.1.11591.14.1 CRC 32
--
--
--File: standards.info, Node: Memory Usage, Next: File Usage, Prev: OID Allocations, Up: Program Behavior
--
--4.10 Memory Usage
--=================
--
--If a program typically uses just a few meg of memory, don't bother
--making any effort to reduce memory usage. For example, if it is
--impractical for other reasons to operate on files more than a few meg
--long, it is reasonable to read entire input files into memory to
--operate on them.
--
-- However, for programs such as `cat' or `tail', that can usefully
--operate on very large files, it is important to avoid using a technique
--that would artificially limit the size of files it can handle. If a
--program works by lines and could be applied to arbitrary user-supplied
--input files, it should keep only a line in memory, because this is not
--very hard and users will want to be able to operate on input files that
--are bigger than will fit in memory all at once.
--
-- If your program creates complicated data structures, just make them
--in memory and give a fatal error if `malloc' returns zero.
--
--
--File: standards.info, Node: File Usage, Prev: Memory Usage, Up: Program Behavior
--
--4.11 File Usage
--===============
--
--Programs should be prepared to operate when `/usr' and `/etc' are
--read-only file systems. Thus, if the program manages log files, lock
--files, backup files, score files, or any other files which are modified
--for internal purposes, these files should not be stored in `/usr' or
--`/etc'.
--
-- There are two exceptions. `/etc' is used to store system
--configuration information; it is reasonable for a program to modify
--files in `/etc' when its job is to update the system configuration.
--Also, if the user explicitly asks to modify one file in a directory, it
--is reasonable for the program to store other files in the same
--directory.
--
--
--File: standards.info, Node: Writing C, Next: Documentation, Prev: Program Behavior, Up: Top
--
--5 Making The Best Use of C
--**************************
--
--This chapter provides advice on how best to use the C language when
--writing GNU software.
--
--* Menu:
--
--* Formatting:: Formatting your source code.
--* Comments:: Commenting your work.
--* Syntactic Conventions:: Clean use of C constructs.
--* Names:: Naming variables, functions, and files.
--* System Portability:: Portability among different operating systems.
--* CPU Portability:: Supporting the range of CPU types.
--* System Functions:: Portability and ``standard'' library functions.
--* Internationalization:: Techniques for internationalization.
--* Character Set:: Use ASCII by default.
--* Quote Characters:: Use `...' in the C locale.
--* Mmap:: How you can safely use `mmap'.
--
--
--File: standards.info, Node: Formatting, Next: Comments, Up: Writing C
--
--5.1 Formatting Your Source Code
--===============================
--
--It is important to put the open-brace that starts the body of a C
--function in column one, so that they will start a defun. Several tools
--look for open-braces in column one to find the beginnings of C
--functions. These tools will not work on code not formatted that way.
--
-- Avoid putting open-brace, open-parenthesis or open-bracket in column
--one when they are inside a function, so that they won't start a defun.
--The open-brace that starts a `struct' body can go in column one if you
--find it useful to treat that definition as a defun.
--
-- It is also important for function definitions to start the name of
--the function in column one. This helps people to search for function
--definitions, and may also help certain tools recognize them. Thus,
--using Standard C syntax, the format is this:
--
-- static char *
-- concat (char *s1, char *s2)
-- {
-- ...
-- }
--
--or, if you want to use traditional C syntax, format the definition like
--this:
--
-- static char *
-- concat (s1, s2) /* Name starts in column one here */
-- char *s1, *s2;
-- { /* Open brace in column one here */
-- ...
-- }
--
-- In Standard C, if the arguments don't fit nicely on one line, split
--it like this:
--
-- int
-- lots_of_args (int an_integer, long a_long, short a_short,
-- double a_double, float a_float)
-- ...
--
-- The rest of this section gives our recommendations for other aspects
--of C formatting style, which is also the default style of the `indent'
--program in version 1.2 and newer. It corresponds to the options
--
-- -nbad -bap -nbc -bbo -bl -bli2 -bls -ncdb -nce -cp1 -cs -di2
-- -ndj -nfc1 -nfca -hnl -i2 -ip5 -lp -pcs -psl -nsc -nsob
--
-- We don't think of these recommendations as requirements, because it
--causes no problems for users if two different programs have different
--formatting styles.
--
-- But whatever style you use, please use it consistently, since a
--mixture of styles within one program tends to look ugly. If you are
--contributing changes to an existing program, please follow the style of
--that program.
--
-- For the body of the function, our recommended style looks like this:
--
-- if (x < foo (y, z))
-- haha = bar[4] + 5;
-- else
-- {
-- while (z)
-- {
-- haha += foo (z, z);
-- z--;
-- }
-- return ++x + bar ();
-- }
--
-- We find it easier to read a program when it has spaces before the
--open-parentheses and after the commas. Especially after the commas.
--
-- When you split an expression into multiple lines, split it before an
--operator, not after one. Here is the right way:
--
-- if (foo_this_is_long && bar > win (x, y, z)
-- && remaining_condition)
--
-- Try to avoid having two operators of different precedence at the same
--level of indentation. For example, don't write this:
--
-- mode = (inmode[j] == VOIDmode
-- || GET_MODE_SIZE (outmode[j]) > GET_MODE_SIZE (inmode[j])
-- ? outmode[j] : inmode[j]);
--
-- Instead, use extra parentheses so that the indentation shows the
--nesting:
--
-- mode = ((inmode[j] == VOIDmode
-- || (GET_MODE_SIZE (outmode[j]) > GET_MODE_SIZE (inmode[j])))
-- ? outmode[j] : inmode[j]);
--
-- Insert extra parentheses so that Emacs will indent the code properly.
--For example, the following indentation looks nice if you do it by hand,
--
-- v = rup->ru_utime.tv_sec*1000 + rup->ru_utime.tv_usec/1000
-- + rup->ru_stime.tv_sec*1000 + rup->ru_stime.tv_usec/1000;
--
--but Emacs would alter it. Adding a set of parentheses produces
--something that looks equally nice, and which Emacs will preserve:
--
-- v = (rup->ru_utime.tv_sec*1000 + rup->ru_utime.tv_usec/1000
-- + rup->ru_stime.tv_sec*1000 + rup->ru_stime.tv_usec/1000);
--
-- Format do-while statements like this:
--
-- do
-- {
-- a = foo (a);
-- }
-- while (a > 0);
--
-- Please use formfeed characters (control-L) to divide the program into
--pages at logical places (but not within a function). It does not matter
--just how long the pages are, since they do not have to fit on a printed
--page. The formfeeds should appear alone on lines by themselves.
--
--
--File: standards.info, Node: Comments, Next: Syntactic Conventions, Prev: Formatting, Up: Writing C
--
--5.2 Commenting Your Work
--========================
--
--Every program should start with a comment saying briefly what it is for.
--Example: `fmt - filter for simple filling of text'. This comment
--should be at the top of the source file containing the `main' function
--of the program.
--
-- Also, please write a brief comment at the start of each source file,
--with the file name and a line or two about the overall purpose of the
--file.
--
-- Please write the comments in a GNU program in English, because
--English is the one language that nearly all programmers in all
--countries can read. If you do not write English well, please write
--comments in English as well as you can, then ask other people to help
--rewrite them. If you can't write comments in English, please find
--someone to work with you and translate your comments into English.
--
-- Please put a comment on each function saying what the function does,
--what sorts of arguments it gets, and what the possible values of
--arguments mean and are used for. It is not necessary to duplicate in
--words the meaning of the C argument declarations, if a C type is being
--used in its customary fashion. If there is anything nonstandard about
--its use (such as an argument of type `char *' which is really the
--address of the second character of a string, not the first), or any
--possible values that would not work the way one would expect (such as,
--that strings containing newlines are not guaranteed to work), be sure
--to say so.
--
-- Also explain the significance of the return value, if there is one.
--
-- Please put two spaces after the end of a sentence in your comments,
--so that the Emacs sentence commands will work. Also, please write
--complete sentences and capitalize the first word. If a lower-case
--identifier comes at the beginning of a sentence, don't capitalize it!
--Changing the spelling makes it a different identifier. If you don't
--like starting a sentence with a lower case letter, write the sentence
--differently (e.g., "The identifier lower-case is ...").
--
-- The comment on a function is much clearer if you use the argument
--names to speak about the argument values. The variable name itself
--should be lower case, but write it in upper case when you are speaking
--about the value rather than the variable itself. Thus, "the inode
--number NODE_NUM" rather than "an inode".
--
-- There is usually no purpose in restating the name of the function in
--the comment before it, because the reader can see that for himself.
--There might be an exception when the comment is so long that the
--function itself would be off the bottom of the screen.
--
-- There should be a comment on each static variable as well, like this:
--
-- /* Nonzero means truncate lines in the display;
-- zero means continue them. */
-- int truncate_lines;
--
-- Every `#endif' should have a comment, except in the case of short
--conditionals (just a few lines) that are not nested. The comment should
--state the condition of the conditional that is ending, _including its
--sense_. `#else' should have a comment describing the condition _and
--sense_ of the code that follows. For example:
--
-- #ifdef foo
-- ...
-- #else /* not foo */
-- ...
-- #endif /* not foo */
-- #ifdef foo
-- ...
-- #endif /* foo */
--
--but, by contrast, write the comments this way for a `#ifndef':
--
-- #ifndef foo
-- ...
-- #else /* foo */
-- ...
-- #endif /* foo */
-- #ifndef foo
-- ...
-- #endif /* not foo */
--
--
--File: standards.info, Node: Syntactic Conventions, Next: Names, Prev: Comments, Up: Writing C
--
--5.3 Clean Use of C Constructs
--=============================
--
--Please explicitly declare the types of all objects. For example, you
--should explicitly declare all arguments to functions, and you should
--declare functions to return `int' rather than omitting the `int'.
--
-- Some programmers like to use the GCC `-Wall' option, and change the
--code whenever it issues a warning. If you want to do this, then do.
--Other programmers prefer not to use `-Wall', because it gives warnings
--for valid and legitimate code which they do not want to change. If you
--want to do this, then do. The compiler should be your servant, not
--your master.
--
-- Declarations of external functions and functions to appear later in
--the source file should all go in one place near the beginning of the
--file (somewhere before the first function definition in the file), or
--else should go in a header file. Don't put `extern' declarations inside
--functions.
--
-- It used to be common practice to use the same local variables (with
--names like `tem') over and over for different values within one
--function. Instead of doing this, it is better to declare a separate
--local variable for each distinct purpose, and give it a name which is
--meaningful. This not only makes programs easier to understand, it also
--facilitates optimization by good compilers. You can also move the
--declaration of each local variable into the smallest scope that includes
--all its uses. This makes the program even cleaner.
--
-- Don't use local variables or parameters that shadow global
--identifiers.
--
-- Don't declare multiple variables in one declaration that spans lines.
--Start a new declaration on each line, instead. For example, instead of
--this:
--
-- int foo,
-- bar;
--
--write either this:
--
-- int foo, bar;
--
--or this:
--
-- int foo;
-- int bar;
--
--(If they are global variables, each should have a comment preceding it
--anyway.)
--
-- When you have an `if'-`else' statement nested in another `if'
--statement, always put braces around the `if'-`else'. Thus, never write
--like this:
--
-- if (foo)
-- if (bar)
-- win ();
-- else
-- lose ();
--
--always like this:
--
-- if (foo)
-- {
-- if (bar)
-- win ();
-- else
-- lose ();
-- }
--
-- If you have an `if' statement nested inside of an `else' statement,
--either write `else if' on one line, like this,
--
-- if (foo)
-- ...
-- else if (bar)
-- ...
--
--with its `then'-part indented like the preceding `then'-part, or write
--the nested `if' within braces like this:
--
-- if (foo)
-- ...
-- else
-- {
-- if (bar)
-- ...
-- }
--
-- Don't declare both a structure tag and variables or typedefs in the
--same declaration. Instead, declare the structure tag separately and
--then use it to declare the variables or typedefs.
--
-- Try to avoid assignments inside `if'-conditions (assignments inside
--`while'-conditions are ok). For example, don't write this:
--
-- if ((foo = (char *) malloc (sizeof *foo)) == 0)
-- fatal ("virtual memory exhausted");
--
--instead, write this:
--
-- foo = (char *) malloc (sizeof *foo);
-- if (foo == 0)
-- fatal ("virtual memory exhausted");
--
-- Don't make the program ugly to placate `lint'. Please don't insert
--any casts to `void'. Zero without a cast is perfectly fine as a null
--pointer constant, except when calling a varargs function.
--
--
--File: standards.info, Node: Names, Next: System Portability, Prev: Syntactic Conventions, Up: Writing C
--
--5.4 Naming Variables, Functions, and Files
--==========================================
--
--The names of global variables and functions in a program serve as
--comments of a sort. So don't choose terse names--instead, look for
--names that give useful information about the meaning of the variable or
--function. In a GNU program, names should be English, like other
--comments.
--
-- Local variable names can be shorter, because they are used only
--within one context, where (presumably) comments explain their purpose.
--
-- Try to limit your use of abbreviations in symbol names. It is ok to
--make a few abbreviations, explain what they mean, and then use them
--frequently, but don't use lots of obscure abbreviations.
--
-- Please use underscores to separate words in a name, so that the Emacs
--word commands can be useful within them. Stick to lower case; reserve
--upper case for macros and `enum' constants, and for name-prefixes that
--follow a uniform convention.
--
-- For example, you should use names like `ignore_space_change_flag';
--don't use names like `iCantReadThis'.
--
-- Variables that indicate whether command-line options have been
--specified should be named after the meaning of the option, not after
--the option-letter. A comment should state both the exact meaning of
--the option and its letter. For example,
--
-- /* Ignore changes in horizontal whitespace (-b). */
-- int ignore_space_change_flag;
--
-- When you want to define names with constant integer values, use
--`enum' rather than `#define'. GDB knows about enumeration constants.
--
-- You might want to make sure that none of the file names would
--conflict if the files were loaded onto an MS-DOS file system which
--shortens the names. You can use the program `doschk' to test for this.
--
-- Some GNU programs were designed to limit themselves to file names of
--14 characters or less, to avoid file name conflicts if they are read
--into older System V systems. Please preserve this feature in the
--existing GNU programs that have it, but there is no need to do this in
--new GNU programs. `doschk' also reports file names longer than 14
--characters.
--
--
--File: standards.info, Node: System Portability, Next: CPU Portability, Prev: Names, Up: Writing C
--
--5.5 Portability between System Types
--====================================
--
--In the Unix world, "portability" refers to porting to different Unix
--versions. For a GNU program, this kind of portability is desirable, but
--not paramount.
--
-- The primary purpose of GNU software is to run on top of the GNU
--kernel, compiled with the GNU C compiler, on various types of CPU. So
--the kinds of portability that are absolutely necessary are quite
--limited. But it is important to support Linux-based GNU systems, since
--they are the form of GNU that is popular.
--
-- Beyond that, it is good to support the other free operating systems
--(*BSD), and it is nice to support other Unix-like systems if you want
--to. Supporting a variety of Unix-like systems is desirable, although
--not paramount. It is usually not too hard, so you may as well do it.
--But you don't have to consider it an obligation, if it does turn out to
--be hard.
--
-- The easiest way to achieve portability to most Unix-like systems is
--to use Autoconf. It's unlikely that your program needs to know more
--information about the host platform than Autoconf can provide, simply
--because most of the programs that need such knowledge have already been
--written.
--
-- Avoid using the format of semi-internal data bases (e.g.,
--directories) when there is a higher-level alternative (`readdir').
--
-- As for systems that are not like Unix, such as MSDOS, Windows, VMS,
--MVS, and older Macintosh systems, supporting them is often a lot of
--work. When that is the case, it is better to spend your time adding
--features that will be useful on GNU and GNU/Linux, rather than on
--supporting other incompatible systems.
--
-- If you do support Windows, please do not abbreviate it as "win". In
--hacker terminology, calling something a "win" is a form of praise.
--You're free to praise Microsoft Windows on your own if you want, but
--please don't do this in GNU packages. Instead of abbreviating
--"Windows" to "win", you can write it in full or abbreviate it to "woe"
--or "w". In GNU Emacs, for instance, we use `w32' in file names of
--Windows-specific files, but the macro for Windows conditionals is
--called `WINDOWSNT'.
--
-- It is a good idea to define the "feature test macro" `_GNU_SOURCE'
--when compiling your C files. When you compile on GNU or GNU/Linux,
--this will enable the declarations of GNU library extension functions,
--and that will usually give you a compiler error message if you define
--the same function names in some other way in your program. (You don't
--have to actually _use_ these functions, if you prefer to make the
--program more portable to other systems.)
--
-- But whether or not you use these GNU extensions, you should avoid
--using their names for any other meanings. Doing so would make it hard
--to move your code into other GNU programs.
--
--
--File: standards.info, Node: CPU Portability, Next: System Functions, Prev: System Portability, Up: Writing C
--
--5.6 Portability between CPUs
--============================
--
--Even GNU systems will differ because of differences among CPU
--types--for example, difference in byte ordering and alignment
--requirements. It is absolutely essential to handle these differences.
--However, don't make any effort to cater to the possibility that an
--`int' will be less than 32 bits. We don't support 16-bit machines in
--GNU.
--
-- Similarly, don't make any effort to cater to the possibility that
--`long' will be smaller than predefined types like `size_t'. For
--example, the following code is ok:
--
-- printf ("size = %lu\n", (unsigned long) sizeof array);
-- printf ("diff = %ld\n", (long) (pointer2 - pointer1));
--
-- 1989 Standard C requires this to work, and we know of only one
--counterexample: 64-bit programs on Microsoft Windows. We will leave it
--to those who want to port GNU programs to that environment to figure
--out how to do it.
--
-- Predefined file-size types like `off_t' are an exception: they are
--longer than `long' on many platforms, so code like the above won't work
--with them. One way to print an `off_t' value portably is to print its
--digits yourself, one by one.
--
-- Don't assume that the address of an `int' object is also the address
--of its least-significant byte. This is false on big-endian machines.
--Thus, don't make the following mistake:
--
-- int c;
-- ...
-- while ((c = getchar ()) != EOF)
-- write (file_descriptor, &c, 1);
--
--Instead, use `unsigned char' as follows. (The `unsigned' is for
--portability to unusual systems where `char' is signed and where there
--is integer overflow checking.)
--
-- int c;
-- while ((c = getchar ()) != EOF)
-- {
-- unsigned char u = c;
-- write (file_descriptor, &u, 1);
-- }
--
-- It used to be ok to not worry about the difference between pointers
--and integers when passing arguments to functions. However, on most
--modern 64-bit machines pointers are wider than `int'. Conversely,
--integer types like `long long int' and `off_t' are wider than pointers
--on most modern 32-bit machines. Hence it's often better nowadays to
--use prototypes to define functions whose argument types are not trivial.
--
-- In particular, if functions accept varying argument counts or types
--they should be declared using prototypes containing `...' and defined
--using `stdarg.h'. For an example of this, please see the Gnulib
--(http://www.gnu.org/software/gnulib/) error module, which declares and
--defines the following function:
--
-- /* Print a message with `fprintf (stderr, FORMAT, ...)';
-- if ERRNUM is nonzero, follow it with ": " and strerror (ERRNUM).
-- If STATUS is nonzero, terminate the program with `exit (STATUS)'. */
--
-- void error (int status, int errnum, const char *format, ...);
--
-- A simple way to use the Gnulib error module is to obtain the two
--source files `error.c' and `error.h' from the Gnulib library source
--code repository at `http://git.savannah.gnu.org/gitweb/?p=gnulib.git'.
--Here's a sample use:
--
-- #include "error.h"
-- #include <errno.h>
-- #include <stdio.h>
--
-- char *program_name = "myprogram";
--
-- FILE *
-- xfopen (char const *name)
-- {
-- FILE *fp = fopen (name, "r");
-- if (! fp)
-- error (1, errno, "cannot read %s", name);
-- return fp;
-- }
--
-- Avoid casting pointers to integers if you can. Such casts greatly
--reduce portability, and in most programs they are easy to avoid. In the
--cases where casting pointers to integers is essential--such as, a Lisp
--interpreter which stores type information as well as an address in one
--word--you'll have to make explicit provisions to handle different word
--sizes. You will also need to make provision for systems in which the
--normal range of addresses you can get from `malloc' starts far away
--from zero.
--
--
--File: standards.info, Node: System Functions, Next: Internationalization, Prev: CPU Portability, Up: Writing C
--
--5.7 Calling System Functions
--============================
--
--C implementations differ substantially. Standard C reduces but does
--not eliminate the incompatibilities; meanwhile, many GNU packages still
--support pre-standard compilers because this is not hard to do. This
--chapter gives recommendations for how to use the more-or-less standard C
--library functions to avoid unnecessary loss of portability.
--
-- * Don't use the return value of `sprintf'. It returns the number of
-- characters written on some systems, but not on all systems.
--
-- * Be aware that `vfprintf' is not always available.
--
-- * `main' should be declared to return type `int'. It should
-- terminate either by calling `exit' or by returning the integer
-- status code; make sure it cannot ever return an undefined value.
--
-- * Don't declare system functions explicitly.
--
-- Almost any declaration for a system function is wrong on some
-- system. To minimize conflicts, leave it to the system header
-- files to declare system functions. If the headers don't declare a
-- function, let it remain undeclared.
--
-- While it may seem unclean to use a function without declaring it,
-- in practice this works fine for most system library functions on
-- the systems where this really happens; thus, the disadvantage is
-- only theoretical. By contrast, actual declarations have
-- frequently caused actual conflicts.
--
-- * If you must declare a system function, don't specify the argument
-- types. Use an old-style declaration, not a Standard C prototype.
-- The more you specify about the function, the more likely a
-- conflict.
--
-- * In particular, don't unconditionally declare `malloc' or `realloc'.
--
-- Most GNU programs use those functions just once, in functions
-- conventionally named `xmalloc' and `xrealloc'. These functions
-- call `malloc' and `realloc', respectively, and check the results.
--
-- Because `xmalloc' and `xrealloc' are defined in your program, you
-- can declare them in other files without any risk of type conflict.
--
-- On most systems, `int' is the same length as a pointer; thus, the
-- calls to `malloc' and `realloc' work fine. For the few
-- exceptional systems (mostly 64-bit machines), you can use
-- *conditionalized* declarations of `malloc' and `realloc'--or put
-- these declarations in configuration files specific to those
-- systems.
--
-- * The string functions require special treatment. Some Unix systems
-- have a header file `string.h'; others have `strings.h'. Neither
-- file name is portable. There are two things you can do: use
-- Autoconf to figure out which file to include, or don't include
-- either file.
--
-- * If you don't include either strings file, you can't get
-- declarations for the string functions from the header file in the
-- usual way.
--
-- That causes less of a problem than you might think. The newer
-- standard string functions should be avoided anyway because many
-- systems still don't support them. The string functions you can
-- use are these:
--
-- strcpy strncpy strcat strncat
-- strlen strcmp strncmp
-- strchr strrchr
--
-- The copy and concatenate functions work fine without a declaration
-- as long as you don't use their values. Using their values without
-- a declaration fails on systems where the width of a pointer
-- differs from the width of `int', and perhaps in other cases. It
-- is trivial to avoid using their values, so do that.
--
-- The compare functions and `strlen' work fine without a declaration
-- on most systems, possibly all the ones that GNU software runs on.
-- You may find it necessary to declare them *conditionally* on a few
-- systems.
--
-- The search functions must be declared to return `char *'. Luckily,
-- there is no variation in the data type they return. But there is
-- variation in their names. Some systems give these functions the
-- names `index' and `rindex'; other systems use the names `strchr'
-- and `strrchr'. Some systems support both pairs of names, but
-- neither pair works on all systems.
--
-- You should pick a single pair of names and use it throughout your
-- program. (Nowadays, it is better to choose `strchr' and `strrchr'
-- for new programs, since those are the standard names.) Declare
-- both of those names as functions returning `char *'. On systems
-- which don't support those names, define them as macros in terms of
-- the other pair. For example, here is what to put at the beginning
-- of your file (or in a header) if you want to use the names
-- `strchr' and `strrchr' throughout:
--
-- #ifndef HAVE_STRCHR
-- #define strchr index
-- #endif
-- #ifndef HAVE_STRRCHR
-- #define strrchr rindex
-- #endif
--
-- char *strchr ();
-- char *strrchr ();
--
-- Here we assume that `HAVE_STRCHR' and `HAVE_STRRCHR' are macros
--defined in systems where the corresponding functions exist. One way to
--get them properly defined is to use Autoconf.
--
--
--File: standards.info, Node: Internationalization, Next: Character Set, Prev: System Functions, Up: Writing C
--
--5.8 Internationalization
--========================
--
--GNU has a library called GNU gettext that makes it easy to translate the
--messages in a program into various languages. You should use this
--library in every program. Use English for the messages as they appear
--in the program, and let gettext provide the way to translate them into
--other languages.
--
-- Using GNU gettext involves putting a call to the `gettext' macro
--around each string that might need translation--like this:
--
-- printf (gettext ("Processing file `%s'..."));
--
--This permits GNU gettext to replace the string `"Processing file
--`%s'..."' with a translated version.
--
-- Once a program uses gettext, please make a point of writing calls to
--`gettext' when you add new strings that call for translation.
--
-- Using GNU gettext in a package involves specifying a "text domain
--name" for the package. The text domain name is used to separate the
--translations for this package from the translations for other packages.
--Normally, the text domain name should be the same as the name of the
--package--for example, `coreutils' for the GNU core utilities.
--
-- To enable gettext to work well, avoid writing code that makes
--assumptions about the structure of words or sentences. When you want
--the precise text of a sentence to vary depending on the data, use two or
--more alternative string constants each containing a complete sentences,
--rather than inserting conditionalized words or phrases into a single
--sentence framework.
--
-- Here is an example of what not to do:
--
-- printf ("%s is full", capacity > 5000000 ? "disk" : "floppy disk");
--
-- If you apply gettext to all strings, like this,
--
-- printf (gettext ("%s is full"),
-- capacity > 5000000 ? gettext ("disk") : gettext ("floppy disk"));
--
--the translator will hardly know that "disk" and "floppy disk" are meant
--to be substituted in the other string. Worse, in some languages (like
--French) the construction will not work: the translation of the word
--"full" depends on the gender of the first part of the sentence; it
--happens to be not the same for "disk" as for "floppy disk".
--
-- Complete sentences can be translated without problems:
--
-- printf (capacity > 5000000 ? gettext ("disk is full")
-- : gettext ("floppy disk is full"));
--
-- A similar problem appears at the level of sentence structure with
--this code:
--
-- printf ("# Implicit rule search has%s been done.\n",
-- f->tried_implicit ? "" : " not");
--
--Adding `gettext' calls to this code cannot give correct results for all
--languages, because negation in some languages requires adding words at
--more than one place in the sentence. By contrast, adding `gettext'
--calls does the job straightforwardly if the code starts out like this:
--
-- printf (f->tried_implicit
-- ? "# Implicit rule search has been done.\n",
-- : "# Implicit rule search has not been done.\n");
--
-- Another example is this one:
--
-- printf ("%d file%s processed", nfiles,
-- nfiles != 1 ? "s" : "");
--
--The problem with this example is that it assumes that plurals are made
--by adding `s'. If you apply gettext to the format string, like this,
--
-- printf (gettext ("%d file%s processed"), nfiles,
-- nfiles != 1 ? "s" : "");
--
--the message can use different words, but it will still be forced to use
--`s' for the plural. Here is a better way, with gettext being applied to
--the two strings independently:
--
-- printf ((nfiles != 1 ? gettext ("%d files processed")
-- : gettext ("%d file processed")),
-- nfiles);
--
--But this still doesn't work for languages like Polish, which has three
--plural forms: one for nfiles == 1, one for nfiles == 2, 3, 4, 22, 23,
--24, ... and one for the rest. The GNU `ngettext' function solves this
--problem:
--
-- printf (ngettext ("%d files processed", "%d file processed", nfiles),
-- nfiles);
--
--
--File: standards.info, Node: Character Set, Next: Quote Characters, Prev: Internationalization, Up: Writing C
--
--5.9 Character Set
--=================
--
--Sticking to the ASCII character set (plain text, 7-bit characters) is
--preferred in GNU source code comments, text documents, and other
--contexts, unless there is good reason to do something else because of
--the application domain. For example, if source code deals with the
--French Revolutionary calendar, it is OK if its literal strings contain
--accented characters in month names like "Flore'al". Also, it is OK to
--use non-ASCII characters to represent proper names of contributors in
--change logs (*note Change Logs::).
--
-- If you need to use non-ASCII characters, you should normally stick
--with one encoding, as one cannot in general mix encodings reliably.
--
--
--File: standards.info, Node: Quote Characters, Next: Mmap, Prev: Character Set, Up: Writing C
--
--5.10 Quote Characters
--=====================
--
--In the C locale, GNU programs should stick to plain ASCII for quotation
--characters in messages to users: preferably 0x60 (``') for left quotes
--and 0x27 (`'') for right quotes. It is ok, but not required, to use
--locale-specific quotes in other locales.
--
-- The Gnulib (http://www.gnu.org/software/gnulib/) `quote' and
--`quotearg' modules provide a reasonably straightforward way to support
--locale-specific quote characters, as well as taking care of other
--issues, such as quoting a filename that itself contains a quote
--character. See the Gnulib documentation for usage details.
--
-- In any case, the documentation for your program should clearly
--specify how it does quoting, if different than the preferred method of
--``' and `''. This is especially important if the output of your
--program is ever likely to be parsed by another program.
--
-- Quotation characters are a difficult area in the computing world at
--this time: there are no true left or right quote characters in Latin1;
--the ``' character we use was standardized there as a grave accent.
--Moreover, Latin1 is still not universally usable.
--
-- Unicode contains the unambiguous quote characters required, and its
--common encoding UTF-8 is upward compatible with Latin1. However,
--Unicode and UTF-8 are not universally well-supported, either.
--
-- This may change over the next few years, and then we will revisit
--this.
--
--
--File: standards.info, Node: Mmap, Prev: Quote Characters, Up: Writing C
--
--5.11 Mmap
--=========
--
--Don't assume that `mmap' either works on all files or fails for all
--files. It may work on some files and fail on others.
--
-- The proper way to use `mmap' is to try it on the specific file for
--which you want to use it--and if `mmap' doesn't work, fall back on
--doing the job in another way using `read' and `write'.
--
-- The reason this precaution is needed is that the GNU kernel (the
--HURD) provides a user-extensible file system, in which there can be many
--different kinds of "ordinary files." Many of them support `mmap', but
--some do not. It is important to make programs handle all these kinds
--of files.
--
--
--File: standards.info, Node: Documentation, Next: Managing Releases, Prev: Writing C, Up: Top
--
--6 Documenting Programs
--**********************
--
--A GNU program should ideally come with full free documentation, adequate
--for both reference and tutorial purposes. If the package can be
--programmed or extended, the documentation should cover programming or
--extending it, as well as just using it.
--
--* Menu:
--
--* GNU Manuals:: Writing proper manuals.
--* Doc Strings and Manuals:: Compiling doc strings doesn't make a manual.
--* Manual Structure Details:: Specific structure conventions.
--* License for Manuals:: Writing the distribution terms for a manual.
--* Manual Credits:: Giving credit to documentation contributors.
--* Printed Manuals:: Mentioning the printed manual.
--* NEWS File:: NEWS files supplement manuals.
--* Change Logs:: Recording changes.
--* Man Pages:: Man pages are secondary.
--* Reading other Manuals:: How far you can go in learning
-- from other manuals.
--
--
--File: standards.info, Node: GNU Manuals, Next: Doc Strings and Manuals, Up: Documentation
--
--6.1 GNU Manuals
--===============
--
--The preferred document format for the GNU system is the Texinfo
--formatting language. Every GNU package should (ideally) have
--documentation in Texinfo both for reference and for learners. Texinfo
--makes it possible to produce a good quality formatted book, using TeX,
--and to generate an Info file. It is also possible to generate HTML
--output from Texinfo source. See the Texinfo manual, either the
--hardcopy, or the on-line version available through `info' or the Emacs
--Info subsystem (`C-h i').
--
-- Nowadays some other formats such as Docbook and Sgmltexi can be
--converted automatically into Texinfo. It is ok to produce the Texinfo
--documentation by conversion this way, as long as it gives good results.
--
-- Make sure your manual is clear to a reader who knows nothing about
--the topic and reads it straight through. This means covering basic
--topics at the beginning, and advanced topics only later. This also
--means defining every specialized term when it is first used.
--
-- Programmers tend to carry over the structure of the program as the
--structure for its documentation. But this structure is not necessarily
--good for explaining how to use the program; it may be irrelevant and
--confusing for a user.
--
-- Instead, the right way to structure documentation is according to the
--concepts and questions that a user will have in mind when reading it.
--This principle applies at every level, from the lowest (ordering
--sentences in a paragraph) to the highest (ordering of chapter topics
--within the manual). Sometimes this structure of ideas matches the
--structure of the implementation of the software being documented--but
--often they are different. An important part of learning to write good
--documentation is to learn to notice when you have unthinkingly
--structured the documentation like the implementation, stop yourself,
--and look for better alternatives.
--
-- For example, each program in the GNU system probably ought to be
--documented in one manual; but this does not mean each program should
--have its own manual. That would be following the structure of the
--implementation, rather than the structure that helps the user
--understand.
--
-- Instead, each manual should cover a coherent _topic_. For example,
--instead of a manual for `diff' and a manual for `diff3', we have one
--manual for "comparison of files" which covers both of those programs,
--as well as `cmp'. By documenting these programs together, we can make
--the whole subject clearer.
--
-- The manual which discusses a program should certainly document all of
--the program's command-line options and all of its commands. It should
--give examples of their use. But don't organize the manual as a list of
--features. Instead, organize it logically, by subtopics. Address the
--questions that a user will ask when thinking about the job that the
--program does. Don't just tell the reader what each feature can do--say
--what jobs it is good for, and show how to use it for those jobs.
--Explain what is recommended usage, and what kinds of usage users should
--avoid.
--
-- In general, a GNU manual should serve both as tutorial and reference.
--It should be set up for convenient access to each topic through Info,
--and for reading straight through (appendixes aside). A GNU manual
--should give a good introduction to a beginner reading through from the
--start, and should also provide all the details that hackers want. The
--Bison manual is a good example of this--please take a look at it to see
--what we mean.
--
-- That is not as hard as it first sounds. Arrange each chapter as a
--logical breakdown of its topic, but order the sections, and write their
--text, so that reading the chapter straight through makes sense. Do
--likewise when structuring the book into chapters, and when structuring a
--section into paragraphs. The watchword is, _at each point, address the
--most fundamental and important issue raised by the preceding text._
--
-- If necessary, add extra chapters at the beginning of the manual which
--are purely tutorial and cover the basics of the subject. These provide
--the framework for a beginner to understand the rest of the manual. The
--Bison manual provides a good example of how to do this.
--
-- To serve as a reference, a manual should have an Index that list all
--the functions, variables, options, and important concepts that are part
--of the program. One combined Index should do for a short manual, but
--sometimes for a complex package it is better to use multiple indices.
--The Texinfo manual includes advice on preparing good index entries, see
--*Note Making Index Entries: (texinfo)Index Entries, and see *Note
--Defining the Entries of an Index: (texinfo)Indexing Commands.
--
-- Don't use Unix man pages as a model for how to write GNU
--documentation; most of them are terse, badly structured, and give
--inadequate explanation of the underlying concepts. (There are, of
--course, some exceptions.) Also, Unix man pages use a particular format
--which is different from what we use in GNU manuals.
--
-- Please include an email address in the manual for where to report
--bugs _in the text of the manual_.
--
-- Please do not use the term "pathname" that is used in Unix
--documentation; use "file name" (two words) instead. We use the term
--"path" only for search paths, which are lists of directory names.
--
-- Please do not use the term "illegal" to refer to erroneous input to
--a computer program. Please use "invalid" for this, and reserve the
--term "illegal" for activities prohibited by law.
--
-- Please do not write `()' after a function name just to indicate it
--is a function. `foo ()' is not a function, it is a function call with
--no arguments.
--
--
--File: standards.info, Node: Doc Strings and Manuals, Next: Manual Structure Details, Prev: GNU Manuals, Up: Documentation
--
--6.2 Doc Strings and Manuals
--===========================
--
--Some programming systems, such as Emacs, provide a documentation string
--for each function, command or variable. You may be tempted to write a
--reference manual by compiling the documentation strings and writing a
--little additional text to go around them--but you must not do it. That
--approach is a fundamental mistake. The text of well-written
--documentation strings will be entirely wrong for a manual.
--
-- A documentation string needs to stand alone--when it appears on the
--screen, there will be no other text to introduce or explain it.
--Meanwhile, it can be rather informal in style.
--
-- The text describing a function or variable in a manual must not stand
--alone; it appears in the context of a section or subsection. Other text
--at the beginning of the section should explain some of the concepts, and
--should often make some general points that apply to several functions or
--variables. The previous descriptions of functions and variables in the
--section will also have given information about the topic. A description
--written to stand alone would repeat some of that information; this
--redundancy looks bad. Meanwhile, the informality that is acceptable in
--a documentation string is totally unacceptable in a manual.
--
-- The only good way to use documentation strings in writing a good
--manual is to use them as a source of information for writing good text.
--
--
--File: standards.info, Node: Manual Structure Details, Next: License for Manuals, Prev: Doc Strings and Manuals, Up: Documentation
--
--6.3 Manual Structure Details
--============================
--
--The title page of the manual should state the version of the programs or
--packages documented in the manual. The Top node of the manual should
--also contain this information. If the manual is changing more
--frequently than or independent of the program, also state a version
--number for the manual in both of these places.
--
-- Each program documented in the manual should have a node named
--`PROGRAM Invocation' or `Invoking PROGRAM'. This node (together with
--its subnodes, if any) should describe the program's command line
--arguments and how to run it (the sort of information people would look
--for in a man page). Start with an `@example' containing a template for
--all the options and arguments that the program uses.
--
-- Alternatively, put a menu item in some menu whose item name fits one
--of the above patterns. This identifies the node which that item points
--to as the node for this purpose, regardless of the node's actual name.
--
-- The `--usage' feature of the Info reader looks for such a node or
--menu item in order to find the relevant text, so it is essential for
--every Texinfo file to have one.
--
-- If one manual describes several programs, it should have such a node
--for each program described in the manual.
--
--
--File: standards.info, Node: License for Manuals, Next: Manual Credits, Prev: Manual Structure Details, Up: Documentation
--
--6.4 License for Manuals
--=======================
--
--Please use the GNU Free Documentation License for all GNU manuals that
--are more than a few pages long. Likewise for a collection of short
--documents--you only need one copy of the GNU FDL for the whole
--collection. For a single short document, you can use a very permissive
--non-copyleft license, to avoid taking up space with a long license.
--
-- See `http://www.gnu.org/copyleft/fdl-howto.html' for more explanation
--of how to employ the GFDL.
--
-- Note that it is not obligatory to include a copy of the GNU GPL or
--GNU LGPL in a manual whose license is neither the GPL nor the LGPL. It
--can be a good idea to include the program's license in a large manual;
--in a short manual, whose size would be increased considerably by
--including the program's license, it is probably better not to include
--it.
--
--
--File: standards.info, Node: Manual Credits, Next: Printed Manuals, Prev: License for Manuals, Up: Documentation
--
--6.5 Manual Credits
--==================
--
--Please credit the principal human writers of the manual as the authors,
--on the title page of the manual. If a company sponsored the work, thank
--the company in a suitable place in the manual, but do not cite the
--company as an author.
--
--
--File: standards.info, Node: Printed Manuals, Next: NEWS File, Prev: Manual Credits, Up: Documentation
--
--6.6 Printed Manuals
--===================
--
--The FSF publishes some GNU manuals in printed form. To encourage sales
--of these manuals, the on-line versions of the manual should mention at
--the very start that the printed manual is available and should point at
--information for getting it--for instance, with a link to the page
--`http://www.gnu.org/order/order.html'. This should not be included in
--the printed manual, though, because there it is redundant.
--
-- It is also useful to explain in the on-line forms of the manual how
--the user can print out the manual from the sources.
--
--
--File: standards.info, Node: NEWS File, Next: Change Logs, Prev: Printed Manuals, Up: Documentation
--
--6.7 The NEWS File
--=================
--
--In addition to its manual, the package should have a file named `NEWS'
--which contains a list of user-visible changes worth mentioning. In
--each new release, add items to the front of the file and identify the
--version they pertain to. Don't discard old items; leave them in the
--file after the newer items. This way, a user upgrading from any
--previous version can see what is new.
--
-- If the `NEWS' file gets very long, move some of the older items into
--a file named `ONEWS' and put a note at the end referring the user to
--that file.
--
--
--File: standards.info, Node: Change Logs, Next: Man Pages, Prev: NEWS File, Up: Documentation
--
--6.8 Change Logs
--===============
--
--Keep a change log to describe all the changes made to program source
--files. The purpose of this is so that people investigating bugs in the
--future will know about the changes that might have introduced the bug.
--Often a new bug can be found by looking at what was recently changed.
--More importantly, change logs can help you eliminate conceptual
--inconsistencies between different parts of a program, by giving you a
--history of how the conflicting concepts arose and who they came from.
--
--* Menu:
--
--* Change Log Concepts::
--* Style of Change Logs::
--* Simple Changes::
--* Conditional Changes::
--* Indicating the Part Changed::
--
--
--File: standards.info, Node: Change Log Concepts, Next: Style of Change Logs, Up: Change Logs
--
--6.8.1 Change Log Concepts
---------------------------
--
--You can think of the change log as a conceptual "undo list" which
--explains how earlier versions were different from the current version.
--People can see the current version; they don't need the change log to
--tell them what is in it. What they want from a change log is a clear
--explanation of how the earlier version differed.
--
-- The change log file is normally called `ChangeLog' and covers an
--entire directory. Each directory can have its own change log, or a
--directory can use the change log of its parent directory--it's up to
--you.
--
-- Another alternative is to record change log information with a
--version control system such as RCS or CVS. This can be converted
--automatically to a `ChangeLog' file using `rcs2log'; in Emacs, the
--command `C-x v a' (`vc-update-change-log') does the job.
--
-- There's no need to describe the full purpose of the changes or how
--they work together. However, sometimes it is useful to write one line
--to describe the overall purpose of a change or a batch of changes. If
--you think that a change calls for explanation, you're probably right.
--Please do explain it--but please put the full explanation in comments
--in the code, where people will see it whenever they see the code. For
--example, "New function" is enough for the change log when you add a
--function, because there should be a comment before the function
--definition to explain what it does.
--
-- In the past, we recommended not mentioning changes in non-software
--files (manuals, help files, etc.) in change logs. However, we've been
--advised that it is a good idea to include them, for the sake of
--copyright records.
--
-- The easiest way to add an entry to `ChangeLog' is with the Emacs
--command `M-x add-change-log-entry'. An entry should have an asterisk,
--the name of the changed file, and then in parentheses the name of the
--changed functions, variables or whatever, followed by a colon. Then
--describe the changes you made to that function or variable.
--
--
--File: standards.info, Node: Style of Change Logs, Next: Simple Changes, Prev: Change Log Concepts, Up: Change Logs
--
--6.8.2 Style of Change Logs
----------------------------
--
--Here are some simple examples of change log entries, starting with the
--header line that says who made the change and when it was installed,
--followed by descriptions of specific changes. (These examples are
--drawn from Emacs and GCC.)
--
-- 1998-08-17 Richard Stallman <rms@gnu.org>
--
-- * register.el (insert-register): Return nil.
-- (jump-to-register): Likewise.
--
-- * sort.el (sort-subr): Return nil.
--
-- * tex-mode.el (tex-bibtex-file, tex-file, tex-region):
-- Restart the tex shell if process is gone or stopped.
-- (tex-shell-running): New function.
--
-- * expr.c (store_one_arg): Round size up for move_block_to_reg.
-- (expand_call): Round up when emitting USE insns.
-- * stmt.c (assign_parms): Round size up for move_block_from_reg.
--
-- It's important to name the changed function or variable in full.
--Don't abbreviate function or variable names, and don't combine them.
--Subsequent maintainers will often search for a function name to find all
--the change log entries that pertain to it; if you abbreviate the name,
--they won't find it when they search.
--
-- For example, some people are tempted to abbreviate groups of function
--names by writing `* register.el ({insert,jump-to}-register)'; this is
--not a good idea, since searching for `jump-to-register' or
--`insert-register' would not find that entry.
--
-- Separate unrelated change log entries with blank lines. When two
--entries represent parts of the same change, so that they work together,
--then don't put blank lines between them. Then you can omit the file
--name and the asterisk when successive entries are in the same file.
--
-- Break long lists of function names by closing continued lines with
--`)', rather than `,', and opening the continuation with `(' as in this
--example:
--
-- * keyboard.c (menu_bar_items, tool_bar_items)
-- (Fexecute_extended_command): Deal with `keymap' property.
--
-- When you install someone else's changes, put the contributor's name
--in the change log entry rather than in the text of the entry. In other
--words, write this:
--
-- 2002-07-14 John Doe <jdoe@gnu.org>
--
-- * sewing.c: Make it sew.
--
--rather than this:
--
-- 2002-07-14 Usual Maintainer <usual@gnu.org>
--
-- * sewing.c: Make it sew. Patch by jdoe@gnu.org.
--
-- As for the date, that should be the date you applied the change.
--
--
--File: standards.info, Node: Simple Changes, Next: Conditional Changes, Prev: Style of Change Logs, Up: Change Logs
--
--6.8.3 Simple Changes
----------------------
--
--Certain simple kinds of changes don't need much detail in the change
--log.
--
-- When you change the calling sequence of a function in a simple
--fashion, and you change all the callers of the function to use the new
--calling sequence, there is no need to make individual entries for all
--the callers that you changed. Just write in the entry for the function
--being called, "All callers changed"--like this:
--
-- * keyboard.c (Fcommand_execute): New arg SPECIAL.
-- All callers changed.
--
-- When you change just comments or doc strings, it is enough to write
--an entry for the file, without mentioning the functions. Just "Doc
--fixes" is enough for the change log.
--
-- There's no technical need to make change log entries for
--documentation files. This is because documentation is not susceptible
--to bugs that are hard to fix. Documentation does not consist of parts
--that must interact in a precisely engineered fashion. To correct an
--error, you need not know the history of the erroneous passage; it is
--enough to compare what the documentation says with the way the program
--actually works.
--
-- However, you should keep change logs for documentation files when the
--project gets copyright assignments from its contributors, so as to make
--the records of authorship more accurate.
--
--
--File: standards.info, Node: Conditional Changes, Next: Indicating the Part Changed, Prev: Simple Changes, Up: Change Logs
--
--6.8.4 Conditional Changes
---------------------------
--
--C programs often contain compile-time `#if' conditionals. Many changes
--are conditional; sometimes you add a new definition which is entirely
--contained in a conditional. It is very useful to indicate in the
--change log the conditions for which the change applies.
--
-- Our convention for indicating conditional changes is to use square
--brackets around the name of the condition.
--
-- Here is a simple example, describing a change which is conditional
--but does not have a function or entity name associated with it:
--
-- * xterm.c [SOLARIS2]: Include string.h.
--
-- Here is an entry describing a new definition which is entirely
--conditional. This new definition for the macro `FRAME_WINDOW_P' is
--used only when `HAVE_X_WINDOWS' is defined:
--
-- * frame.h [HAVE_X_WINDOWS] (FRAME_WINDOW_P): Macro defined.
--
-- Here is an entry for a change within the function `init_display',
--whose definition as a whole is unconditional, but the changes themselves
--are contained in a `#ifdef HAVE_LIBNCURSES' conditional:
--
-- * dispnew.c (init_display) [HAVE_LIBNCURSES]: If X, call tgetent.
--
-- Here is an entry for a change that takes affect only when a certain
--macro is _not_ defined:
--
-- (gethostname) [!HAVE_SOCKETS]: Replace with winsock version.
--
--
--File: standards.info, Node: Indicating the Part Changed, Prev: Conditional Changes, Up: Change Logs
--
--6.8.5 Indicating the Part Changed
-----------------------------------
--
--Indicate the part of a function which changed by using angle brackets
--enclosing an indication of what the changed part does. Here is an entry
--for a change in the part of the function `sh-while-getopts' that deals
--with `sh' commands:
--
-- * progmodes/sh-script.el (sh-while-getopts) <sh>: Handle case that
-- user-specified option string is empty.
--
--
--File: standards.info, Node: Man Pages, Next: Reading other Manuals, Prev: Change Logs, Up: Documentation
--
--6.9 Man Pages
--=============
--
--In the GNU project, man pages are secondary. It is not necessary or
--expected for every GNU program to have a man page, but some of them do.
--It's your choice whether to include a man page in your program.
--
-- When you make this decision, consider that supporting a man page
--requires continual effort each time the program is changed. The time
--you spend on the man page is time taken away from more useful work.
--
-- For a simple program which changes little, updating the man page may
--be a small job. Then there is little reason not to include a man page,
--if you have one.
--
-- For a large program that changes a great deal, updating a man page
--may be a substantial burden. If a user offers to donate a man page,
--you may find this gift costly to accept. It may be better to refuse
--the man page unless the same person agrees to take full responsibility
--for maintaining it--so that you can wash your hands of it entirely. If
--this volunteer later ceases to do the job, then don't feel obliged to
--pick it up yourself; it may be better to withdraw the man page from the
--distribution until someone else agrees to update it.
--
-- When a program changes only a little, you may feel that the
--discrepancies are small enough that the man page remains useful without
--updating. If so, put a prominent note near the beginning of the man
--page explaining that you don't maintain it and that the Texinfo manual
--is more authoritative. The note should say how to access the Texinfo
--documentation.
--
-- Be sure that man pages include a copyright statement and free
--license. The simple all-permissive license is appropriate for simple
--man pages (*note License Notices for Other Files: (maintain)License
--Notices for Other Files.).
--
-- For long man pages, with enough explanation and documentation that
--they can be considered true manuals, use the GFDL (*note License for
--Manuals::).
--
-- Finally, the GNU help2man program
--(`http://www.gnu.org/software/help2man/') is one way to automate
--generation of a man page, in this case from `--help' output. This is
--sufficient in many cases.
--
--
--File: standards.info, Node: Reading other Manuals, Prev: Man Pages, Up: Documentation
--
--6.10 Reading other Manuals
--==========================
--
--There may be non-free books or documentation files that describe the
--program you are documenting.
--
-- It is ok to use these documents for reference, just as the author of
--a new algebra textbook can read other books on algebra. A large portion
--of any non-fiction book consists of facts, in this case facts about how
--a certain program works, and these facts are necessarily the same for
--everyone who writes about the subject. But be careful not to copy your
--outline structure, wording, tables or examples from preexisting non-free
--documentation. Copying from free documentation may be ok; please check
--with the FSF about the individual case.
--
--
--File: standards.info, Node: Managing Releases, Next: References, Prev: Documentation, Up: Top
--
--7 The Release Process
--*********************
--
--Making a release is more than just bundling up your source files in a
--tar file and putting it up for FTP. You should set up your software so
--that it can be configured to run on a variety of systems. Your Makefile
--should conform to the GNU standards described below, and your directory
--layout should also conform to the standards discussed below. Doing so
--makes it easy to include your package into the larger framework of all
--GNU software.
--
--* Menu:
--
--* Configuration:: How configuration of GNU packages should work.
--* Makefile Conventions:: Makefile conventions.
--* Releases:: Making releases
--
--
--File: standards.info, Node: Configuration, Next: Makefile Conventions, Up: Managing Releases
--
--7.1 How Configuration Should Work
--=================================
--
--Each GNU distribution should come with a shell script named
--`configure'. This script is given arguments which describe the kind of
--machine and system you want to compile the program for. The
--`configure' script must record the configuration options so that they
--affect compilation.
--
-- The description here is the specification of the interface for the
--`configure' script in GNU packages. Many packages implement it using
--GNU Autoconf (*note Introduction: (autoconf)Top.) and/or GNU Automake
--(*note Introduction: (automake)Top.), but you do not have to use these
--tools. You can implement it any way you like; for instance, by making
--`configure' be a wrapper around a completely different configuration
--system.
--
-- Another way for the `configure' script to operate is to make a link
--from a standard name such as `config.h' to the proper configuration
--file for the chosen system. If you use this technique, the
--distribution should _not_ contain a file named `config.h'. This is so
--that people won't be able to build the program without configuring it
--first.
--
-- Another thing that `configure' can do is to edit the Makefile. If
--you do this, the distribution should _not_ contain a file named
--`Makefile'. Instead, it should include a file `Makefile.in' which
--contains the input used for editing. Once again, this is so that people
--won't be able to build the program without configuring it first.
--
-- If `configure' does write the `Makefile', then `Makefile' should
--have a target named `Makefile' which causes `configure' to be rerun,
--setting up the same configuration that was set up last time. The files
--that `configure' reads should be listed as dependencies of `Makefile'.
--
-- All the files which are output from the `configure' script should
--have comments at the beginning explaining that they were generated
--automatically using `configure'. This is so that users won't think of
--trying to edit them by hand.
--
-- The `configure' script should write a file named `config.status'
--which describes which configuration options were specified when the
--program was last configured. This file should be a shell script which,
--if run, will recreate the same configuration.
--
-- The `configure' script should accept an option of the form
--`--srcdir=DIRNAME' to specify the directory where sources are found (if
--it is not the current directory). This makes it possible to build the
--program in a separate directory, so that the actual source directory is
--not modified.
--
-- If the user does not specify `--srcdir', then `configure' should
--check both `.' and `..' to see if it can find the sources. If it finds
--the sources in one of these places, it should use them from there.
--Otherwise, it should report that it cannot find the sources, and should
--exit with nonzero status.
--
-- Usually the easy way to support `--srcdir' is by editing a
--definition of `VPATH' into the Makefile. Some rules may need to refer
--explicitly to the specified source directory. To make this possible,
--`configure' can add to the Makefile a variable named `srcdir' whose
--value is precisely the specified directory.
--
-- In addition, the `configure' script should take options
--corresponding to most of the standard directory variables (*note
--Directory Variables::). Here is the list:
--
-- --prefix --exec-prefix --bindir --sbindir --libexecdir --sysconfdir
-- --sharedstatedir --localstatedir --libdir --includedir --oldincludedir
-- --datarootdir --datadir --infodir --localedir --mandir --docdir
-- --htmldir --dvidir --pdfdir --psdir
--
-- The `configure' script should also take an argument which specifies
--the type of system to build the program for. This argument should look
--like this:
--
-- CPU-COMPANY-SYSTEM
--
-- For example, an Athlon-based GNU/Linux system might be
--`i686-pc-linux-gnu'.
--
-- The `configure' script needs to be able to decode all plausible
--alternatives for how to describe a machine. Thus,
--`athlon-pc-gnu/linux' would be a valid alias. There is a shell script
--called `config.sub'
--(http://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.sub;hb=HEAD)
--that you can use as a subroutine to validate system types and
--canonicalize aliases.
--
-- The `configure' script should also take the option
--`--build=BUILDTYPE', which should be equivalent to a plain BUILDTYPE
--argument. For example, `configure --build=i686-pc-linux-gnu' is
--equivalent to `configure i686-pc-linux-gnu'. When the build type is
--not specified by an option or argument, the `configure' script should
--normally guess it using the shell script `config.guess'
--(http://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.guess;hb=HEAD).
--
-- Other options are permitted to specify in more detail the software
--or hardware present on the machine, to include or exclude optional parts
--of the package, or to adjust the name of some tools or arguments to
--them:
--
--`--enable-FEATURE[=PARAMETER]'
-- Configure the package to build and install an optional user-level
-- facility called FEATURE. This allows users to choose which
-- optional features to include. Giving an optional PARAMETER of
-- `no' should omit FEATURE, if it is built by default.
--
-- No `--enable' option should *ever* cause one feature to replace
-- another. No `--enable' option should ever substitute one useful
-- behavior for another useful behavior. The only proper use for
-- `--enable' is for questions of whether to build part of the program
-- or exclude it.
--
--`--with-PACKAGE'
-- The package PACKAGE will be installed, so configure this package
-- to work with PACKAGE.
--
-- Possible values of PACKAGE include `gnu-as' (or `gas'), `gnu-ld',
-- `gnu-libc', `gdb', `x', and `x-toolkit'.
--
-- Do not use a `--with' option to specify the file name to use to
-- find certain files. That is outside the scope of what `--with'
-- options are for.
--
--`VARIABLE=VALUE'
-- Set the value of the variable VARIABLE to VALUE. This is used to
-- override the default values of commands or arguments in the build
-- process. For example, the user could issue `configure CFLAGS=-g
-- CXXFLAGS=-g' to build with debugging information and without the
-- default optimization.
--
-- Specifying variables as arguments to `configure', like this:
-- ./configure CC=gcc
-- is preferable to setting them in environment variables:
-- CC=gcc ./configure
-- as it helps to recreate the same configuration later with
-- `config.status'. However, both methods should be supported.
--
-- All `configure' scripts should accept all of the "detail" options
--and the variable settings, whether or not they make any difference to
--the particular package at hand. In particular, they should accept any
--option that starts with `--with-' or `--enable-'. This is so users
--will be able to configure an entire GNU source tree at once with a
--single set of options.
--
-- You will note that the categories `--with-' and `--enable-' are
--narrow: they *do not* provide a place for any sort of option you might
--think of. That is deliberate. We want to limit the possible
--configuration options in GNU software. We do not want GNU programs to
--have idiosyncratic configuration options.
--
-- Packages that perform part of the compilation process may support
--cross-compilation. In such a case, the host and target machines for the
--program may be different.
--
-- The `configure' script should normally treat the specified type of
--system as both the host and the target, thus producing a program which
--works for the same type of machine that it runs on.
--
-- To compile a program to run on a host type that differs from the
--build type, use the configure option `--host=HOSTTYPE', where HOSTTYPE
--uses the same syntax as BUILDTYPE. The host type normally defaults to
--the build type.
--
-- To configure a cross-compiler, cross-assembler, or what have you, you
--should specify a target different from the host, using the configure
--option `--target=TARGETTYPE'. The syntax for TARGETTYPE is the same as
--for the host type. So the command would look like this:
--
-- ./configure --host=HOSTTYPE --target=TARGETTYPE
--
-- The target type normally defaults to the host type. Programs for
--which cross-operation is not meaningful need not accept the `--target'
--option, because configuring an entire operating system for
--cross-operation is not a meaningful operation.
--
-- Some programs have ways of configuring themselves automatically. If
--your program is set up to do this, your `configure' script can simply
--ignore most of its arguments.
--
--
--File: standards.info, Node: Makefile Conventions, Next: Releases, Prev: Configuration, Up: Managing Releases
--
--7.2 Makefile Conventions
--========================
--
--This node describes conventions for writing the Makefiles for GNU
--programs. Using Automake will help you write a Makefile that follows
--these conventions.
--
--* Menu:
--
--* Makefile Basics:: General conventions for Makefiles.
--* Utilities in Makefiles:: Utilities to be used in Makefiles.
--* Command Variables:: Variables for specifying commands.
--* DESTDIR:: Supporting staged installs.
--* Directory Variables:: Variables for installation directories.
--* Standard Targets:: Standard targets for users.
--* Install Command Categories:: Three categories of commands in the `install'
-- rule: normal, pre-install and post-install.
--
--
--File: standards.info, Node: Makefile Basics, Next: Utilities in Makefiles, Up: Makefile Conventions
--
--7.2.1 General Conventions for Makefiles
-----------------------------------------
--
--Every Makefile should contain this line:
--
-- SHELL = /bin/sh
--
--to avoid trouble on systems where the `SHELL' variable might be
--inherited from the environment. (This is never a problem with GNU
--`make'.)
--
-- Different `make' programs have incompatible suffix lists and
--implicit rules, and this sometimes creates confusion or misbehavior. So
--it is a good idea to set the suffix list explicitly using only the
--suffixes you need in the particular Makefile, like this:
--
-- .SUFFIXES:
-- .SUFFIXES: .c .o
--
--The first line clears out the suffix list, the second introduces all
--suffixes which may be subject to implicit rules in this Makefile.
--
-- Don't assume that `.' is in the path for command execution. When
--you need to run programs that are a part of your package during the
--make, please make sure that it uses `./' if the program is built as
--part of the make or `$(srcdir)/' if the file is an unchanging part of
--the source code. Without one of these prefixes, the current search
--path is used.
--
-- The distinction between `./' (the "build directory") and
--`$(srcdir)/' (the "source directory") is important because users can
--build in a separate directory using the `--srcdir' option to
--`configure'. A rule of the form:
--
-- foo.1 : foo.man sedscript
-- sed -e sedscript foo.man > foo.1
--
--will fail when the build directory is not the source directory, because
--`foo.man' and `sedscript' are in the source directory.
--
-- When using GNU `make', relying on `VPATH' to find the source file
--will work in the case where there is a single dependency file, since
--the `make' automatic variable `$<' will represent the source file
--wherever it is. (Many versions of `make' set `$<' only in implicit
--rules.) A Makefile target like
--
-- foo.o : bar.c
-- $(CC) -I. -I$(srcdir) $(CFLAGS) -c bar.c -o foo.o
--
--should instead be written as
--
-- foo.o : bar.c
-- $(CC) -I. -I$(srcdir) $(CFLAGS) -c $< -o $@
--
--in order to allow `VPATH' to work correctly. When the target has
--multiple dependencies, using an explicit `$(srcdir)' is the easiest way
--to make the rule work well. For example, the target above for `foo.1'
--is best written as:
--
-- foo.1 : foo.man sedscript
-- sed -e $(srcdir)/sedscript $(srcdir)/foo.man > $@
--
-- GNU distributions usually contain some files which are not source
--files--for example, Info files, and the output from Autoconf, Automake,
--Bison or Flex. Since these files normally appear in the source
--directory, they should always appear in the source directory, not in the
--build directory. So Makefile rules to update them should put the
--updated files in the source directory.
--
-- However, if a file does not appear in the distribution, then the
--Makefile should not put it in the source directory, because building a
--program in ordinary circumstances should not modify the source directory
--in any way.
--
-- Try to make the build and installation targets, at least (and all
--their subtargets) work correctly with a parallel `make'.
--
--
--File: standards.info, Node: Utilities in Makefiles, Next: Command Variables, Prev: Makefile Basics, Up: Makefile Conventions
--
--7.2.2 Utilities in Makefiles
------------------------------
--
--Write the Makefile commands (and any shell scripts, such as
--`configure') to run in `sh', not in `csh'. Don't use any special
--features of `ksh' or `bash'.
--
-- The `configure' script and the Makefile rules for building and
--installation should not use any utilities directly except these:
--
-- cat cmp cp diff echo egrep expr false grep install-info
-- ln ls mkdir mv pwd rm rmdir sed sleep sort tar test touch true
--
-- The compression program `gzip' can be used in the `dist' rule.
--
-- Stick to the generally supported options for these programs. For
--example, don't use `mkdir -p', convenient as it may be, because most
--systems don't support it.
--
-- It is a good idea to avoid creating symbolic links in makefiles,
--since a few systems don't support them.
--
-- The Makefile rules for building and installation can also use
--compilers and related programs, but should do so via `make' variables
--so that the user can substitute alternatives. Here are some of the
--programs we mean:
--
-- ar bison cc flex install ld ldconfig lex
-- make makeinfo ranlib texi2dvi yacc
--
-- Use the following `make' variables to run those programs:
--
-- $(AR) $(BISON) $(CC) $(FLEX) $(INSTALL) $(LD) $(LDCONFIG) $(LEX)
-- $(MAKE) $(MAKEINFO) $(RANLIB) $(TEXI2DVI) $(YACC)
--
-- When you use `ranlib' or `ldconfig', you should make sure nothing
--bad happens if the system does not have the program in question.
--Arrange to ignore an error from that command, and print a message before
--the command to tell the user that failure of this command does not mean
--a problem. (The Autoconf `AC_PROG_RANLIB' macro can help with this.)
--
-- If you use symbolic links, you should implement a fallback for
--systems that don't have symbolic links.
--
-- Additional utilities that can be used via Make variables are:
--
-- chgrp chmod chown mknod
--
-- It is ok to use other utilities in Makefile portions (or scripts)
--intended only for particular systems where you know those utilities
--exist.
--
--
--File: standards.info, Node: Command Variables, Next: DESTDIR, Prev: Utilities in Makefiles, Up: Makefile Conventions
--
--7.2.3 Variables for Specifying Commands
-----------------------------------------
--
--Makefiles should provide variables for overriding certain commands,
--options, and so on.
--
-- In particular, you should run most utility programs via variables.
--Thus, if you use Bison, have a variable named `BISON' whose default
--value is set with `BISON = bison', and refer to it with `$(BISON)'
--whenever you need to use Bison.
--
-- File management utilities such as `ln', `rm', `mv', and so on, need
--not be referred to through variables in this way, since users don't
--need to replace them with other programs.
--
-- Each program-name variable should come with an options variable that
--is used to supply options to the program. Append `FLAGS' to the
--program-name variable name to get the options variable name--for
--example, `BISONFLAGS'. (The names `CFLAGS' for the C compiler,
--`YFLAGS' for yacc, and `LFLAGS' for lex, are exceptions to this rule,
--but we keep them because they are standard.) Use `CPPFLAGS' in any
--compilation command that runs the preprocessor, and use `LDFLAGS' in
--any compilation command that does linking as well as in any direct use
--of `ld'.
--
-- If there are C compiler options that _must_ be used for proper
--compilation of certain files, do not include them in `CFLAGS'. Users
--expect to be able to specify `CFLAGS' freely themselves. Instead,
--arrange to pass the necessary options to the C compiler independently
--of `CFLAGS', by writing them explicitly in the compilation commands or
--by defining an implicit rule, like this:
--
-- CFLAGS = -g
-- ALL_CFLAGS = -I. $(CFLAGS)
-- .c.o:
-- $(CC) -c $(CPPFLAGS) $(ALL_CFLAGS) $<
--
-- Do include the `-g' option in `CFLAGS', because that is not
--_required_ for proper compilation. You can consider it a default that
--is only recommended. If the package is set up so that it is compiled
--with GCC by default, then you might as well include `-O' in the default
--value of `CFLAGS' as well.
--
-- Put `CFLAGS' last in the compilation command, after other variables
--containing compiler options, so the user can use `CFLAGS' to override
--the others.
--
-- `CFLAGS' should be used in every invocation of the C compiler, both
--those which do compilation and those which do linking.
--
-- Every Makefile should define the variable `INSTALL', which is the
--basic command for installing a file into the system.
--
-- Every Makefile should also define the variables `INSTALL_PROGRAM'
--and `INSTALL_DATA'. (The default for `INSTALL_PROGRAM' should be
--`$(INSTALL)'; the default for `INSTALL_DATA' should be `${INSTALL} -m
--644'.) Then it should use those variables as the commands for actual
--installation, for executables and non-executables respectively.
--Minimal use of these variables is as follows:
--
-- $(INSTALL_PROGRAM) foo $(bindir)/foo
-- $(INSTALL_DATA) libfoo.a $(libdir)/libfoo.a
--
-- However, it is preferable to support a `DESTDIR' prefix on the
--target files, as explained in the next section.
--
--Always use a file name, not a directory name, as the second argument of
--the installation commands. Use a separate command for each file to be
--installed.
--
--
--File: standards.info, Node: DESTDIR, Next: Directory Variables, Prev: Command Variables, Up: Makefile Conventions
--
--7.2.4 `DESTDIR': support for staged installs
----------------------------------------------
--
--`DESTDIR' is a variable prepended to each installed target file, like
--this:
--
-- $(INSTALL_PROGRAM) foo $(DESTDIR)$(bindir)/foo
-- $(INSTALL_DATA) libfoo.a $(DESTDIR)$(libdir)/libfoo.a
--
-- The `DESTDIR' variable is specified by the user on the `make'
--command line. For example:
--
-- make DESTDIR=/tmp/stage install
--
--`DESTDIR' should be supported only in the `install*' and `uninstall*'
--targets, as those are the only targets where it is useful.
--
-- If your installation step would normally install
--`/usr/local/bin/foo' and `/usr/local/lib/libfoo.a', then an
--installation invoked as in the example above would install
--`/tmp/stage/usr/local/bin/foo' and `/tmp/stage/usr/local/lib/libfoo.a'
--instead.
--
-- Prepending the variable `DESTDIR' to each target in this way
--provides for "staged installs", where the installed files are not
--placed directly into their expected location but are instead copied
--into a temporary location (`DESTDIR'). However, installed files
--maintain their relative directory structure and any embedded file names
--will not be modified.
--
-- You should not set the value of `DESTDIR' in your `Makefile' at all;
--then the files are installed into their expected locations by default.
--Also, specifying `DESTDIR' should not change the operation of the
--software in any way, so its value should not be included in any file
--contents.
--
-- `DESTDIR' support is commonly used in package creation. It is also
--helpful to users who want to understand what a given package will
--install where, and to allow users who don't normally have permissions
--to install into protected areas to build and install before gaining
--those permissions. Finally, it can be useful with tools such as
--`stow', where code is installed in one place but made to appear to be
--installed somewhere else using symbolic links or special mount
--operations. So, we strongly recommend GNU packages support `DESTDIR',
--though it is not an absolute requirement.
--
--
--File: standards.info, Node: Directory Variables, Next: Standard Targets, Prev: DESTDIR, Up: Makefile Conventions
--
--7.2.5 Variables for Installation Directories
----------------------------------------------
--
--Installation directories should always be named by variables, so it is
--easy to install in a nonstandard place. The standard names for these
--variables and the values they should have in GNU packages are described
--below. They are based on a standard file system layout; variants of it
--are used in GNU/Linux and other modern operating systems.
--
-- Installers are expected to override these values when calling `make'
--(e.g., `make prefix=/usr install' or `configure' (e.g., `configure
----prefix=/usr'). GNU packages should not try to guess which value
--should be appropriate for these variables on the system they are being
--installed onto: use the default settings specified here so that all GNU
--packages behave identically, allowing the installer to achieve any
--desired layout.
--
-- These first two variables set the root for the installation. All the
--other installation directories should be subdirectories of one of these
--two, and nothing should be directly installed into these two
--directories.
--
--`prefix'
-- A prefix used in constructing the default values of the variables
-- listed below. The default value of `prefix' should be
-- `/usr/local'. When building the complete GNU system, the prefix
-- will be empty and `/usr' will be a symbolic link to `/'. (If you
-- are using Autoconf, write it as `@prefix@'.)
--
-- Running `make install' with a different value of `prefix' from the
-- one used to build the program should _not_ recompile the program.
--
--`exec_prefix'
-- A prefix used in constructing the default values of some of the
-- variables listed below. The default value of `exec_prefix' should
-- be `$(prefix)'. (If you are using Autoconf, write it as
-- `@exec_prefix@'.)
--
-- Generally, `$(exec_prefix)' is used for directories that contain
-- machine-specific files (such as executables and subroutine
-- libraries), while `$(prefix)' is used directly for other
-- directories.
--
-- Running `make install' with a different value of `exec_prefix'
-- from the one used to build the program should _not_ recompile the
-- program.
--
-- Executable programs are installed in one of the following
--directories.
--
--`bindir'
-- The directory for installing executable programs that users can
-- run. This should normally be `/usr/local/bin', but write it as
-- `$(exec_prefix)/bin'. (If you are using Autoconf, write it as
-- `@bindir@'.)
--
--`sbindir'
-- The directory for installing executable programs that can be run
-- from the shell, but are only generally useful to system
-- administrators. This should normally be `/usr/local/sbin', but
-- write it as `$(exec_prefix)/sbin'. (If you are using Autoconf,
-- write it as `@sbindir@'.)
--
--`libexecdir'
-- The directory for installing executable programs to be run by other
-- programs rather than by users. This directory should normally be
-- `/usr/local/libexec', but write it as `$(exec_prefix)/libexec'.
-- (If you are using Autoconf, write it as `@libexecdir@'.)
--
-- The definition of `libexecdir' is the same for all packages, so
-- you should install your data in a subdirectory thereof. Most
-- packages install their data under `$(libexecdir)/PACKAGE-NAME/',
-- possibly within additional subdirectories thereof, such as
-- `$(libexecdir)/PACKAGE-NAME/MACHINE/VERSION'.
--
-- Data files used by the program during its execution are divided into
--categories in two ways.
--
-- * Some files are normally modified by programs; others are never
-- normally modified (though users may edit some of these).
--
-- * Some files are architecture-independent and can be shared by all
-- machines at a site; some are architecture-dependent and can be
-- shared only by machines of the same kind and operating system;
-- others may never be shared between two machines.
--
-- This makes for six different possibilities. However, we want to
--discourage the use of architecture-dependent files, aside from object
--files and libraries. It is much cleaner to make other data files
--architecture-independent, and it is generally not hard.
--
-- Here are the variables Makefiles should use to specify directories
--to put these various kinds of files in:
--
--`datarootdir'
-- The root of the directory tree for read-only
-- architecture-independent data files. This should normally be
-- `/usr/local/share', but write it as `$(prefix)/share'. (If you
-- are using Autoconf, write it as `@datarootdir@'.) `datadir''s
-- default value is based on this variable; so are `infodir',
-- `mandir', and others.
--
--`datadir'
-- The directory for installing idiosyncratic read-only
-- architecture-independent data files for this program. This is
-- usually the same place as `datarootdir', but we use the two
-- separate variables so that you can move these program-specific
-- files without altering the location for Info files, man pages, etc.
--
-- This should normally be `/usr/local/share', but write it as
-- `$(datarootdir)'. (If you are using Autoconf, write it as
-- `@datadir@'.)
--
-- The definition of `datadir' is the same for all packages, so you
-- should install your data in a subdirectory thereof. Most packages
-- install their data under `$(datadir)/PACKAGE-NAME/'.
--
--`sysconfdir'
-- The directory for installing read-only data files that pertain to a
-- single machine-that is to say, files for configuring a host.
-- Mailer and network configuration files, `/etc/passwd', and so
-- forth belong here. All the files in this directory should be
-- ordinary ASCII text files. This directory should normally be
-- `/usr/local/etc', but write it as `$(prefix)/etc'. (If you are
-- using Autoconf, write it as `@sysconfdir@'.)
--
-- Do not install executables here in this directory (they probably
-- belong in `$(libexecdir)' or `$(sbindir)'). Also do not install
-- files that are modified in the normal course of their use (programs
-- whose purpose is to change the configuration of the system
-- excluded). Those probably belong in `$(localstatedir)'.
--
--`sharedstatedir'
-- The directory for installing architecture-independent data files
-- which the programs modify while they run. This should normally be
-- `/usr/local/com', but write it as `$(prefix)/com'. (If you are
-- using Autoconf, write it as `@sharedstatedir@'.)
--
--`localstatedir'
-- The directory for installing data files which the programs modify
-- while they run, and that pertain to one specific machine. Users
-- should never need to modify files in this directory to configure
-- the package's operation; put such configuration information in
-- separate files that go in `$(datadir)' or `$(sysconfdir)'.
-- `$(localstatedir)' should normally be `/usr/local/var', but write
-- it as `$(prefix)/var'. (If you are using Autoconf, write it as
-- `@localstatedir@'.)
--
-- These variables specify the directory for installing certain specific
--types of files, if your program has them. Every GNU package should
--have Info files, so every program needs `infodir', but not all need
--`libdir' or `lispdir'.
--
--`includedir'
-- The directory for installing header files to be included by user
-- programs with the C `#include' preprocessor directive. This
-- should normally be `/usr/local/include', but write it as
-- `$(prefix)/include'. (If you are using Autoconf, write it as
-- `@includedir@'.)
--
-- Most compilers other than GCC do not look for header files in
-- directory `/usr/local/include'. So installing the header files
-- this way is only useful with GCC. Sometimes this is not a problem
-- because some libraries are only really intended to work with GCC.
-- But some libraries are intended to work with other compilers.
-- They should install their header files in two places, one
-- specified by `includedir' and one specified by `oldincludedir'.
--
--`oldincludedir'
-- The directory for installing `#include' header files for use with
-- compilers other than GCC. This should normally be `/usr/include'.
-- (If you are using Autoconf, you can write it as `@oldincludedir@'.)
--
-- The Makefile commands should check whether the value of
-- `oldincludedir' is empty. If it is, they should not try to use
-- it; they should cancel the second installation of the header files.
--
-- A package should not replace an existing header in this directory
-- unless the header came from the same package. Thus, if your Foo
-- package provides a header file `foo.h', then it should install the
-- header file in the `oldincludedir' directory if either (1) there
-- is no `foo.h' there or (2) the `foo.h' that exists came from the
-- Foo package.
--
-- To tell whether `foo.h' came from the Foo package, put a magic
-- string in the file--part of a comment--and `grep' for that string.
--
--`docdir'
-- The directory for installing documentation files (other than Info)
-- for this package. By default, it should be
-- `/usr/local/share/doc/YOURPKG', but it should be written as
-- `$(datarootdir)/doc/YOURPKG'. (If you are using Autoconf, write
-- it as `@docdir@'.) The YOURPKG subdirectory, which may include a
-- version number, prevents collisions among files with common names,
-- such as `README'.
--
--`infodir'
-- The directory for installing the Info files for this package. By
-- default, it should be `/usr/local/share/info', but it should be
-- written as `$(datarootdir)/info'. (If you are using Autoconf,
-- write it as `@infodir@'.) `infodir' is separate from `docdir' for
-- compatibility with existing practice.
--
--`htmldir'
--`dvidir'
--`pdfdir'
--`psdir'
-- Directories for installing documentation files in the particular
-- format. They should all be set to `$(docdir)' by default. (If
-- you are using Autoconf, write them as `@htmldir@', `@dvidir@',
-- etc.) Packages which supply several translations of their
-- documentation should install them in `$(htmldir)/'LL,
-- `$(pdfdir)/'LL, etc. where LL is a locale abbreviation such as
-- `en' or `pt_BR'.
--
--`libdir'
-- The directory for object files and libraries of object code. Do
-- not install executables here, they probably ought to go in
-- `$(libexecdir)' instead. The value of `libdir' should normally be
-- `/usr/local/lib', but write it as `$(exec_prefix)/lib'. (If you
-- are using Autoconf, write it as `@libdir@'.)
--
--`lispdir'
-- The directory for installing any Emacs Lisp files in this package.
-- By default, it should be `/usr/local/share/emacs/site-lisp', but
-- it should be written as `$(datarootdir)/emacs/site-lisp'.
--
-- If you are using Autoconf, write the default as `@lispdir@'. In
-- order to make `@lispdir@' work, you need the following lines in
-- your `configure.in' file:
--
-- lispdir='${datarootdir}/emacs/site-lisp'
-- AC_SUBST(lispdir)
--
--`localedir'
-- The directory for installing locale-specific message catalogs for
-- this package. By default, it should be `/usr/local/share/locale',
-- but it should be written as `$(datarootdir)/locale'. (If you are
-- using Autoconf, write it as `@localedir@'.) This directory
-- usually has a subdirectory per locale.
--
-- Unix-style man pages are installed in one of the following:
--
--`mandir'
-- The top-level directory for installing the man pages (if any) for
-- this package. It will normally be `/usr/local/share/man', but you
-- should write it as `$(datarootdir)/man'. (If you are using
-- Autoconf, write it as `@mandir@'.)
--
--`man1dir'
-- The directory for installing section 1 man pages. Write it as
-- `$(mandir)/man1'.
--
--`man2dir'
-- The directory for installing section 2 man pages. Write it as
-- `$(mandir)/man2'
--
--`...'
-- *Don't make the primary documentation for any GNU software be a
-- man page. Write a manual in Texinfo instead. Man pages are just
-- for the sake of people running GNU software on Unix, which is a
-- secondary application only.*
--
--`manext'
-- The file name extension for the installed man page. This should
-- contain a period followed by the appropriate digit; it should
-- normally be `.1'.
--
--`man1ext'
-- The file name extension for installed section 1 man pages.
--
--`man2ext'
-- The file name extension for installed section 2 man pages.
--
--`...'
-- Use these names instead of `manext' if the package needs to
-- install man pages in more than one section of the manual.
--
-- And finally, you should set the following variable:
--
--`srcdir'
-- The directory for the sources being compiled. The value of this
-- variable is normally inserted by the `configure' shell script.
-- (If you are using Autoconf, use `srcdir = @srcdir@'.)
--
-- For example:
--
-- # Common prefix for installation directories.
-- # NOTE: This directory must exist when you start the install.
-- prefix = /usr/local
-- datarootdir = $(prefix)/share
-- datadir = $(datarootdir)
-- exec_prefix = $(prefix)
-- # Where to put the executable for the command `gcc'.
-- bindir = $(exec_prefix)/bin
-- # Where to put the directories used by the compiler.
-- libexecdir = $(exec_prefix)/libexec
-- # Where to put the Info files.
-- infodir = $(datarootdir)/info
--
-- If your program installs a large number of files into one of the
--standard user-specified directories, it might be useful to group them
--into a subdirectory particular to that program. If you do this, you
--should write the `install' rule to create these subdirectories.
--
-- Do not expect the user to include the subdirectory name in the value
--of any of the variables listed above. The idea of having a uniform set
--of variable names for installation directories is to enable the user to
--specify the exact same values for several different GNU packages. In
--order for this to be useful, all the packages must be designed so that
--they will work sensibly when the user does so.
--
-- At times, not all of these variables may be implemented in the
--current release of Autoconf and/or Automake; but as of Autoconf 2.60, we
--believe all of them are. When any are missing, the descriptions here
--serve as specifications for what Autoconf will implement. As a
--programmer, you can either use a development version of Autoconf or
--avoid using these variables until a stable release is made which
--supports them.
--
--
--File: standards.info, Node: Standard Targets, Next: Install Command Categories, Prev: Directory Variables, Up: Makefile Conventions
--
--7.2.6 Standard Targets for Users
----------------------------------
--
--All GNU programs should have the following targets in their Makefiles:
--
--`all'
-- Compile the entire program. This should be the default target.
-- This target need not rebuild any documentation files; Info files
-- should normally be included in the distribution, and DVI (and other
-- documentation format) files should be made only when explicitly
-- asked for.
--
-- By default, the Make rules should compile and link with `-g', so
-- that executable programs have debugging symbols. Users who don't
-- mind being helpless can strip the executables later if they wish.
--
--`install'
-- Compile the program and copy the executables, libraries, and so on
-- to the file names where they should reside for actual use. If
-- there is a simple test to verify that a program is properly
-- installed, this target should run that test.
--
-- Do not strip executables when installing them. Devil-may-care
-- users can use the `install-strip' target to do that.
--
-- If possible, write the `install' target rule so that it does not
-- modify anything in the directory where the program was built,
-- provided `make all' has just been done. This is convenient for
-- building the program under one user name and installing it under
-- another.
--
-- The commands should create all the directories in which files are
-- to be installed, if they don't already exist. This includes the
-- directories specified as the values of the variables `prefix' and
-- `exec_prefix', as well as all subdirectories that are needed. One
-- way to do this is by means of an `installdirs' target as described
-- below.
--
-- Use `-' before any command for installing a man page, so that
-- `make' will ignore any errors. This is in case there are systems
-- that don't have the Unix man page documentation system installed.
--
-- The way to install Info files is to copy them into `$(infodir)'
-- with `$(INSTALL_DATA)' (*note Command Variables::), and then run
-- the `install-info' program if it is present. `install-info' is a
-- program that edits the Info `dir' file to add or update the menu
-- entry for the given Info file; it is part of the Texinfo package.
-- Here is a sample rule to install an Info file:
--
-- $(DESTDIR)$(infodir)/foo.info: foo.info
-- $(POST_INSTALL)
-- # There may be a newer info file in . than in srcdir.
-- -if test -f foo.info; then d=.; \
-- else d=$(srcdir); fi; \
-- $(INSTALL_DATA) $$d/foo.info $(DESTDIR)$@; \
-- # Run install-info only if it exists.
-- # Use `if' instead of just prepending `-' to the
-- # line so we notice real errors from install-info.
-- # We use `$(SHELL) -c' because some shells do not
-- # fail gracefully when there is an unknown command.
-- if $(SHELL) -c 'install-info --version' \
-- >/dev/null 2>&1; then \
-- install-info --dir-file=$(DESTDIR)$(infodir)/dir \
-- $(DESTDIR)$(infodir)/foo.info; \
-- else true; fi
--
-- When writing the `install' target, you must classify all the
-- commands into three categories: normal ones, "pre-installation"
-- commands and "post-installation" commands. *Note Install Command
-- Categories::.
--
--`install-html'
--`install-dvi'
--`install-pdf'
--`install-ps'
-- These targets install documentation in formats other than Info;
-- they're intended to be called explicitly by the person installing
-- the package, if that format is desired. GNU prefers Info files,
-- so these must be installed by the `install' target.
--
-- When you have many documentation files to install, we recommend
-- that you avoid collisions and clutter by arranging for these
-- targets to install in subdirectories of the appropriate
-- installation directory, such as `htmldir'. As one example, if
-- your package has multiple manuals, and you wish to install HTML
-- documentation with many files (such as the "split" mode output by
-- `makeinfo --html'), you'll certainly want to use subdirectories,
-- or two nodes with the same name in different manuals will
-- overwrite each other.
--
-- Please make these `install-FORMAT' targets invoke the commands for
-- the FORMAT target, for example, by making FORMAT a dependency.
--
--`uninstall'
-- Delete all the installed files--the copies that the `install' and
-- `install-*' targets create.
--
-- This rule should not modify the directories where compilation is
-- done, only the directories where files are installed.
--
-- The uninstallation commands are divided into three categories,
-- just like the installation commands. *Note Install Command
-- Categories::.
--
--`install-strip'
-- Like `install', but strip the executable files while installing
-- them. In simple cases, this target can use the `install' target in
-- a simple way:
--
-- install-strip:
-- $(MAKE) INSTALL_PROGRAM='$(INSTALL_PROGRAM) -s' \
-- install
--
-- But if the package installs scripts as well as real executables,
-- the `install-strip' target can't just refer to the `install'
-- target; it has to strip the executables but not the scripts.
--
-- `install-strip' should not strip the executables in the build
-- directory which are being copied for installation. It should only
-- strip the copies that are installed.
--
-- Normally we do not recommend stripping an executable unless you
-- are sure the program has no bugs. However, it can be reasonable
-- to install a stripped executable for actual execution while saving
-- the unstripped executable elsewhere in case there is a bug.
--
--`clean'
-- Delete all files in the current directory that are normally
-- created by building the program. Also delete files in other
-- directories if they are created by this makefile. However, don't
-- delete the files that record the configuration. Also preserve
-- files that could be made by building, but normally aren't because
-- the distribution comes with them. There is no need to delete
-- parent directories that were created with `mkdir -p', since they
-- could have existed anyway.
--
-- Delete `.dvi' files here if they are not part of the distribution.
--
--`distclean'
-- Delete all files in the current directory (or created by this
-- makefile) that are created by configuring or building the program.
-- If you have unpacked the source and built the program without
-- creating any other files, `make distclean' should leave only the
-- files that were in the distribution. However, there is no need to
-- delete parent directories that were created with `mkdir -p', since
-- they could have existed anyway.
--
--`mostlyclean'
-- Like `clean', but may refrain from deleting a few files that people
-- normally don't want to recompile. For example, the `mostlyclean'
-- target for GCC does not delete `libgcc.a', because recompiling it
-- is rarely necessary and takes a lot of time.
--
--`maintainer-clean'
-- Delete almost everything that can be reconstructed with this
-- Makefile. This typically includes everything deleted by
-- `distclean', plus more: C source files produced by Bison, tags
-- tables, Info files, and so on.
--
-- The reason we say "almost everything" is that running the command
-- `make maintainer-clean' should not delete `configure' even if
-- `configure' can be remade using a rule in the Makefile. More
-- generally, `make maintainer-clean' should not delete anything that
-- needs to exist in order to run `configure' and then begin to build
-- the program. Also, there is no need to delete parent directories
-- that were created with `mkdir -p', since they could have existed
-- anyway. These are the only exceptions; `maintainer-clean' should
-- delete everything else that can be rebuilt.
--
-- The `maintainer-clean' target is intended to be used by a
-- maintainer of the package, not by ordinary users. You may need
-- special tools to reconstruct some of the files that `make
-- maintainer-clean' deletes. Since these files are normally
-- included in the distribution, we don't take care to make them easy
-- to reconstruct. If you find you need to unpack the full
-- distribution again, don't blame us.
--
-- To help make users aware of this, the commands for the special
-- `maintainer-clean' target should start with these two:
--
-- @echo 'This command is intended for maintainers to use; it'
-- @echo 'deletes files that may need special tools to rebuild.'
--
--`TAGS'
-- Update a tags table for this program.
--
--`info'
-- Generate any Info files needed. The best way to write the rules
-- is as follows:
--
-- info: foo.info
--
-- foo.info: foo.texi chap1.texi chap2.texi
-- $(MAKEINFO) $(srcdir)/foo.texi
--
-- You must define the variable `MAKEINFO' in the Makefile. It should
-- run the `makeinfo' program, which is part of the Texinfo
-- distribution.
--
-- Normally a GNU distribution comes with Info files, and that means
-- the Info files are present in the source directory. Therefore,
-- the Make rule for an info file should update it in the source
-- directory. When users build the package, ordinarily Make will not
-- update the Info files because they will already be up to date.
--
--`dvi'
--`html'
--`pdf'
--`ps'
-- Generate documentation files in the given format. These targets
-- should always exist, but any or all can be a no-op if the given
-- output format cannot be generated. These targets should not be
-- dependencies of the `all' target; the user must manually invoke
-- them.
--
-- Here's an example rule for generating DVI files from Texinfo:
--
-- dvi: foo.dvi
--
-- foo.dvi: foo.texi chap1.texi chap2.texi
-- $(TEXI2DVI) $(srcdir)/foo.texi
--
-- You must define the variable `TEXI2DVI' in the Makefile. It should
-- run the program `texi2dvi', which is part of the Texinfo
-- distribution.(1) Alternatively, write just the dependencies, and
-- allow GNU `make' to provide the command.
--
-- Here's another example, this one for generating HTML from Texinfo:
--
-- html: foo.html
--
-- foo.html: foo.texi chap1.texi chap2.texi
-- $(TEXI2HTML) $(srcdir)/foo.texi
--
-- Again, you would define the variable `TEXI2HTML' in the Makefile;
-- for example, it might run `makeinfo --no-split --html' (`makeinfo'
-- is part of the Texinfo distribution).
--
--`dist'
-- Create a distribution tar file for this program. The tar file
-- should be set up so that the file names in the tar file start with
-- a subdirectory name which is the name of the package it is a
-- distribution for. This name can include the version number.
--
-- For example, the distribution tar file of GCC version 1.40 unpacks
-- into a subdirectory named `gcc-1.40'.
--
-- The easiest way to do this is to create a subdirectory
-- appropriately named, use `ln' or `cp' to install the proper files
-- in it, and then `tar' that subdirectory.
--
-- Compress the tar file with `gzip'. For example, the actual
-- distribution file for GCC version 1.40 is called `gcc-1.40.tar.gz'.
--
-- The `dist' target should explicitly depend on all non-source files
-- that are in the distribution, to make sure they are up to date in
-- the distribution. *Note Making Releases: Releases.
--
--`check'
-- Perform self-tests (if any). The user must build the program
-- before running the tests, but need not install the program; you
-- should write the self-tests so that they work when the program is
-- built but not installed.
--
-- The following targets are suggested as conventional names, for
--programs in which they are useful.
--
--`installcheck'
-- Perform installation tests (if any). The user must build and
-- install the program before running the tests. You should not
-- assume that `$(bindir)' is in the search path.
--
--`installdirs'
-- It's useful to add a target named `installdirs' to create the
-- directories where files are installed, and their parent
-- directories. There is a script called `mkinstalldirs' which is
-- convenient for this; you can find it in the Texinfo package. You
-- can use a rule like this:
--
-- # Make sure all installation directories (e.g. $(bindir))
-- # actually exist by making them if necessary.
-- installdirs: mkinstalldirs
-- $(srcdir)/mkinstalldirs $(bindir) $(datadir) \
-- $(libdir) $(infodir) \
-- $(mandir)
--
-- or, if you wish to support `DESTDIR',
--
-- # Make sure all installation directories (e.g. $(bindir))
-- # actually exist by making them if necessary.
-- installdirs: mkinstalldirs
-- $(srcdir)/mkinstalldirs \
-- $(DESTDIR)$(bindir) $(DESTDIR)$(datadir) \
-- $(DESTDIR)$(libdir) $(DESTDIR)$(infodir) \
-- $(DESTDIR)$(mandir)
--
-- This rule should not modify the directories where compilation is
-- done. It should do nothing but create installation directories.
--
-- ---------- Footnotes ----------
--
-- (1) `texi2dvi' uses TeX to do the real work of formatting. TeX is
--not distributed with Texinfo.
--
--
--File: standards.info, Node: Install Command Categories, Prev: Standard Targets, Up: Makefile Conventions
--
--7.2.7 Install Command Categories
----------------------------------
--
--When writing the `install' target, you must classify all the commands
--into three categories: normal ones, "pre-installation" commands and
--"post-installation" commands.
--
-- Normal commands move files into their proper places, and set their
--modes. They may not alter any files except the ones that come entirely
--from the package they belong to.
--
-- Pre-installation and post-installation commands may alter other
--files; in particular, they can edit global configuration files or data
--bases.
--
-- Pre-installation commands are typically executed before the normal
--commands, and post-installation commands are typically run after the
--normal commands.
--
-- The most common use for a post-installation command is to run
--`install-info'. This cannot be done with a normal command, since it
--alters a file (the Info directory) which does not come entirely and
--solely from the package being installed. It is a post-installation
--command because it needs to be done after the normal command which
--installs the package's Info files.
--
-- Most programs don't need any pre-installation commands, but we have
--the feature just in case it is needed.
--
-- To classify the commands in the `install' rule into these three
--categories, insert "category lines" among them. A category line
--specifies the category for the commands that follow.
--
-- A category line consists of a tab and a reference to a special Make
--variable, plus an optional comment at the end. There are three
--variables you can use, one for each category; the variable name
--specifies the category. Category lines are no-ops in ordinary execution
--because these three Make variables are normally undefined (and you
--_should not_ define them in the makefile).
--
-- Here are the three possible category lines, each with a comment that
--explains what it means:
--
-- $(PRE_INSTALL) # Pre-install commands follow.
-- $(POST_INSTALL) # Post-install commands follow.
-- $(NORMAL_INSTALL) # Normal commands follow.
--
-- If you don't use a category line at the beginning of the `install'
--rule, all the commands are classified as normal until the first category
--line. If you don't use any category lines, all the commands are
--classified as normal.
--
-- These are the category lines for `uninstall':
--
-- $(PRE_UNINSTALL) # Pre-uninstall commands follow.
-- $(POST_UNINSTALL) # Post-uninstall commands follow.
-- $(NORMAL_UNINSTALL) # Normal commands follow.
--
-- Typically, a pre-uninstall command would be used for deleting entries
--from the Info directory.
--
-- If the `install' or `uninstall' target has any dependencies which
--act as subroutines of installation, then you should start _each_
--dependency's commands with a category line, and start the main target's
--commands with a category line also. This way, you can ensure that each
--command is placed in the right category regardless of which of the
--dependencies actually run.
--
-- Pre-installation and post-installation commands should not run any
--programs except for these:
--
-- [ basename bash cat chgrp chmod chown cmp cp dd diff echo
-- egrep expand expr false fgrep find getopt grep gunzip gzip
-- hostname install install-info kill ldconfig ln ls md5sum
-- mkdir mkfifo mknod mv printenv pwd rm rmdir sed sort tee
-- test touch true uname xargs yes
--
-- The reason for distinguishing the commands in this way is for the
--sake of making binary packages. Typically a binary package contains
--all the executables and other files that need to be installed, and has
--its own method of installing them--so it does not need to run the normal
--installation commands. But installing the binary package does need to
--execute the pre-installation and post-installation commands.
--
-- Programs to build binary packages work by extracting the
--pre-installation and post-installation commands. Here is one way of
--extracting the pre-installation commands (the `-s' option to `make' is
--needed to silence messages about entering subdirectories):
--
-- make -s -n install -o all \
-- PRE_INSTALL=pre-install \
-- POST_INSTALL=post-install \
-- NORMAL_INSTALL=normal-install \
-- | gawk -f pre-install.awk
--
--where the file `pre-install.awk' could contain this:
--
-- $0 ~ /^(normal-install|post-install)[ \t]*$/ {on = 0}
-- on {print $0}
-- $0 ~ /^pre-install[ \t]*$/ {on = 1}
--
--
--File: standards.info, Node: Releases, Prev: Makefile Conventions, Up: Managing Releases
--
--7.3 Making Releases
--===================
--
--You should identify each release with a pair of version numbers, a
--major version and a minor. We have no objection to using more than two
--numbers, but it is very unlikely that you really need them.
--
-- Package the distribution of `Foo version 69.96' up in a gzipped tar
--file with the name `foo-69.96.tar.gz'. It should unpack into a
--subdirectory named `foo-69.96'.
--
-- Building and installing the program should never modify any of the
--files contained in the distribution. This means that all the files
--that form part of the program in any way must be classified into "source
--files" and "non-source files". Source files are written by humans and
--never changed automatically; non-source files are produced from source
--files by programs under the control of the Makefile.
--
-- The distribution should contain a file named `README' which gives
--the name of the package, and a general description of what it does. It
--is also good to explain the purpose of each of the first-level
--subdirectories in the package, if there are any. The `README' file
--should either state the version number of the package, or refer to where
--in the package it can be found.
--
-- The `README' file should refer to the file `INSTALL', which should
--contain an explanation of the installation procedure.
--
-- The `README' file should also refer to the file which contains the
--copying conditions. The GNU GPL, if used, should be in a file called
--`COPYING'. If the GNU LGPL is used, it should be in a file called
--`COPYING.LESSER'.
--
-- Naturally, all the source files must be in the distribution. It is
--okay to include non-source files in the distribution, provided they are
--up-to-date and machine-independent, so that building the distribution
--normally will never modify them. We commonly include non-source files
--produced by Bison, `lex', TeX, and `makeinfo'; this helps avoid
--unnecessary dependencies between our distributions, so that users can
--install whichever packages they want to install.
--
-- Non-source files that might actually be modified by building and
--installing the program should *never* be included in the distribution.
--So if you do distribute non-source files, always make sure they are up
--to date when you make a new distribution.
--
-- Make sure that all the files in the distribution are world-readable,
--and that directories are world-readable and world-searchable (octal
--mode 755). We used to recommend that all directories in the
--distribution also be world-writable (octal mode 777), because ancient
--versions of `tar' would otherwise not cope when extracting the archive
--as an unprivileged user. That can easily lead to security issues when
--creating the archive, however, so now we recommend against that.
--
-- Don't include any symbolic links in the distribution itself. If the
--tar file contains symbolic links, then people cannot even unpack it on
--systems that don't support symbolic links. Also, don't use multiple
--names for one file in different directories, because certain file
--systems cannot handle this and that prevents unpacking the distribution.
--
-- Try to make sure that all the file names will be unique on MS-DOS. A
--name on MS-DOS consists of up to 8 characters, optionally followed by a
--period and up to three characters. MS-DOS will truncate extra
--characters both before and after the period. Thus, `foobarhacker.c'
--and `foobarhacker.o' are not ambiguous; they are truncated to
--`foobarha.c' and `foobarha.o', which are distinct.
--
-- Include in your distribution a copy of the `texinfo.tex' you used to
--test print any `*.texinfo' or `*.texi' files.
--
-- Likewise, if your program uses small GNU software packages like
--regex, getopt, obstack, or termcap, include them in the distribution
--file. Leaving them out would make the distribution file a little
--smaller at the expense of possible inconvenience to a user who doesn't
--know what other files to get.
--
--
--File: standards.info, Node: References, Next: GNU Free Documentation License, Prev: Managing Releases, Up: Top
--
--8 References to Non-Free Software and Documentation
--***************************************************
--
--A GNU program should not recommend, promote, or grant legitimacy to the
--use of any non-free program. Proprietary software is a social and
--ethical problem, and our aim is to put an end to that problem. We
--can't stop some people from writing proprietary programs, or stop other
--people from using them, but we can and should refuse to advertise them
--to new potential customers, or to give the public the idea that their
--existence is ethical.
--
-- The GNU definition of free software is found on the GNU web site at
--`http://www.gnu.org/philosophy/free-sw.html', and the definition of
--free documentation is found at
--`http://www.gnu.org/philosophy/free-doc.html'. The terms "free" and
--"non-free", used in this document, refer to those definitions.
--
-- A list of important licenses and whether they qualify as free is in
--`http://www.gnu.org/licenses/license-list.html'. If it is not clear
--whether a license qualifies as free, please ask the GNU Project by
--writing to <licensing@gnu.org>. We will answer, and if the license is
--an important one, we will add it to the list.
--
-- When a non-free program or system is well known, you can mention it
--in passing--that is harmless, since users who might want to use it
--probably already know about it. For instance, it is fine to explain
--how to build your package on top of some widely used non-free operating
--system, or how to use it together with some widely used non-free
--program.
--
-- However, you should give only the necessary information to help those
--who already use the non-free program to use your program with it--don't
--give, or refer to, any further information about the proprietary
--program, and don't imply that the proprietary program enhances your
--program, or that its existence is in any way a good thing. The goal
--should be that people already using the proprietary program will get
--the advice they need about how to use your free program with it, while
--people who don't already use the proprietary program will not see
--anything likely to lead them to take an interest in it.
--
-- If a non-free program or system is obscure in your program's domain,
--your program should not mention or support it at all, since doing so
--would tend to popularize the non-free program more than it popularizes
--your program. (You cannot hope to find many additional users for your
--program among the users of Foobar, if the existence of Foobar is not
--generally known among people who might want to use your program.)
--
-- Sometimes a program is free software in itself but depends on a
--non-free platform in order to run. For instance, many Java programs
--depend on some non-free Java libraries. To recommend or promote such a
--program is to promote the other programs it needs. This is why we are
--careful about listing Java programs in the Free Software Directory: we
--don't want to promote the non-free Java libraries.
--
-- We hope this particular problem with Java will be gone by and by, as
--we replace the remaining non-free standard Java libraries with free
--software, but the general principle will remain the same: don't
--recommend, promote or legitimize programs that depend on non-free
--software to run.
--
-- Some free programs strongly encourage the use of non-free software.
--A typical example is `mplayer'. It is free software in itself, and the
--free code can handle some kinds of files. However, `mplayer'
--recommends use of non-free codecs for other kinds of files, and users
--that install `mplayer' are very likely to install those codecs along
--with it. To recommend `mplayer' is, in effect, to promote use of the
--non-free codecs.
--
-- Thus, you should not recommend programs that strongly encourage the
--use of non-free software. This is why we do not list `mplayer' in the
--Free Software Directory.
--
-- A GNU package should not refer the user to any non-free documentation
--for free software. Free documentation that can be included in free
--operating systems is essential for completing the GNU system, or any
--free operating system, so encouraging it is a priority; to recommend
--use of documentation that we are not allowed to include undermines the
--impetus for the community to produce documentation that we can include.
--So GNU packages should never recommend non-free documentation.
--
-- By contrast, it is ok to refer to journal articles and textbooks in
--the comments of a program for explanation of how it functions, even
--though they are non-free. This is because we don't include such things
--in the GNU system even they are free--they are outside the scope of
--what a software distribution needs to include.
--
-- Referring to a web site that describes or recommends a non-free
--program is promoting that program, so please do not make links (or
--mention by name) web sites that contain such material. This policy is
--relevant particularly for the web pages for a GNU package.
--
-- Following links from nearly any web site can lead eventually to
--non-free software; this is inherent in the nature of the web. So it
--makes no sense to criticize a site for having such links. As long as
--the site does not itself recommend a non-free program, there is no need
--to consider the question of the sites that it links to for other
--reasons.
--
-- Thus, for example, you should not refer to AT&T's web site if that
--recommends AT&T's non-free software packages; you should not refer to a
--site that links to AT&T's site presenting it as a place to get some
--non-free program, because that link recommends and legitimizes the
--non-free program. However, that a site contains a link to AT&T's web
--site for some other purpose (such as long-distance telephone service)
--is not an objection against it.
--
--
--File: standards.info, Node: GNU Free Documentation License, Next: Index, Prev: References, Up: Top
--
--Appendix A GNU Free Documentation License
--*****************************************
--
-- Version 1.3, 3 November 2008
--
-- Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
-- `http://fsf.org/'
--
-- Everyone is permitted to copy and distribute verbatim copies
-- of this license document, but changing it is not allowed.
--
-- 0. PREAMBLE
--
-- The purpose of this License is to make a manual, textbook, or other
-- functional and useful document "free" in the sense of freedom: to
-- assure everyone the effective freedom to copy and redistribute it,
-- with or without modifying it, either commercially or
-- noncommercially. Secondarily, this License preserves for the
-- author and publisher a way to get credit for their work, while not
-- being considered responsible for modifications made by others.
--
-- This License is a kind of "copyleft", which means that derivative
-- works of the document must themselves be free in the same sense.
-- It complements the GNU General Public License, which is a copyleft
-- license designed for free software.
--
-- We have designed this License in order to use it for manuals for
-- free software, because free software needs free documentation: a
-- free program should come with manuals providing the same freedoms
-- that the software does. But this License is not limited to
-- software manuals; it can be used for any textual work, regardless
-- of subject matter or whether it is published as a printed book.
-- We recommend this License principally for works whose purpose is
-- instruction or reference.
--
-- 1. APPLICABILITY AND DEFINITIONS
--
-- This License applies to any manual or other work, in any medium,
-- that contains a notice placed by the copyright holder saying it
-- can be distributed under the terms of this License. Such a notice
-- grants a world-wide, royalty-free license, unlimited in duration,
-- to use that work under the conditions stated herein. The
-- "Document", below, refers to any such manual or work. Any member
-- of the public is a licensee, and is addressed as "you". You
-- accept the license if you copy, modify or distribute the work in a
-- way requiring permission under copyright law.
--
-- A "Modified Version" of the Document means any work containing the
-- Document or a portion of it, either copied verbatim, or with
-- modifications and/or translated into another language.
--
-- A "Secondary Section" is a named appendix or a front-matter section
-- of the Document that deals exclusively with the relationship of the
-- publishers or authors of the Document to the Document's overall
-- subject (or to related matters) and contains nothing that could
-- fall directly within that overall subject. (Thus, if the Document
-- is in part a textbook of mathematics, a Secondary Section may not
-- explain any mathematics.) The relationship could be a matter of
-- historical connection with the subject or with related matters, or
-- of legal, commercial, philosophical, ethical or political position
-- regarding them.
--
-- The "Invariant Sections" are certain Secondary Sections whose
-- titles are designated, as being those of Invariant Sections, in
-- the notice that says that the Document is released under this
-- License. If a section does not fit the above definition of
-- Secondary then it is not allowed to be designated as Invariant.
-- The Document may contain zero Invariant Sections. If the Document
-- does not identify any Invariant Sections then there are none.
--
-- The "Cover Texts" are certain short passages of text that are
-- listed, as Front-Cover Texts or Back-Cover Texts, in the notice
-- that says that the Document is released under this License. A
-- Front-Cover Text may be at most 5 words, and a Back-Cover Text may
-- be at most 25 words.
--
-- A "Transparent" copy of the Document means a machine-readable copy,
-- represented in a format whose specification is available to the
-- general public, that is suitable for revising the document
-- straightforwardly with generic text editors or (for images
-- composed of pixels) generic paint programs or (for drawings) some
-- widely available drawing editor, and that is suitable for input to
-- text formatters or for automatic translation to a variety of
-- formats suitable for input to text formatters. A copy made in an
-- otherwise Transparent file format whose markup, or absence of
-- markup, has been arranged to thwart or discourage subsequent
-- modification by readers is not Transparent. An image format is
-- not Transparent if used for any substantial amount of text. A
-- copy that is not "Transparent" is called "Opaque".
--
-- Examples of suitable formats for Transparent copies include plain
-- ASCII without markup, Texinfo input format, LaTeX input format,
-- SGML or XML using a publicly available DTD, and
-- standard-conforming simple HTML, PostScript or PDF designed for
-- human modification. Examples of transparent image formats include
-- PNG, XCF and JPG. Opaque formats include proprietary formats that
-- can be read and edited only by proprietary word processors, SGML or
-- XML for which the DTD and/or processing tools are not generally
-- available, and the machine-generated HTML, PostScript or PDF
-- produced by some word processors for output purposes only.
--
-- The "Title Page" means, for a printed book, the title page itself,
-- plus such following pages as are needed to hold, legibly, the
-- material this License requires to appear in the title page. For
-- works in formats which do not have any title page as such, "Title
-- Page" means the text near the most prominent appearance of the
-- work's title, preceding the beginning of the body of the text.
--
-- The "publisher" means any person or entity that distributes copies
-- of the Document to the public.
--
-- A section "Entitled XYZ" means a named subunit of the Document
-- whose title either is precisely XYZ or contains XYZ in parentheses
-- following text that translates XYZ in another language. (Here XYZ
-- stands for a specific section name mentioned below, such as
-- "Acknowledgements", "Dedications", "Endorsements", or "History".)
-- To "Preserve the Title" of such a section when you modify the
-- Document means that it remains a section "Entitled XYZ" according
-- to this definition.
--
-- The Document may include Warranty Disclaimers next to the notice
-- which states that this License applies to the Document. These
-- Warranty Disclaimers are considered to be included by reference in
-- this License, but only as regards disclaiming warranties: any other
-- implication that these Warranty Disclaimers may have is void and
-- has no effect on the meaning of this License.
--
-- 2. VERBATIM COPYING
--
-- You may copy and distribute the Document in any medium, either
-- commercially or noncommercially, provided that this License, the
-- copyright notices, and the license notice saying this License
-- applies to the Document are reproduced in all copies, and that you
-- add no other conditions whatsoever to those of this License. You
-- may not use technical measures to obstruct or control the reading
-- or further copying of the copies you make or distribute. However,
-- you may accept compensation in exchange for copies. If you
-- distribute a large enough number of copies you must also follow
-- the conditions in section 3.
--
-- You may also lend copies, under the same conditions stated above,
-- and you may publicly display copies.
--
-- 3. COPYING IN QUANTITY
--
-- If you publish printed copies (or copies in media that commonly
-- have printed covers) of the Document, numbering more than 100, and
-- the Document's license notice requires Cover Texts, you must
-- enclose the copies in covers that carry, clearly and legibly, all
-- these Cover Texts: Front-Cover Texts on the front cover, and
-- Back-Cover Texts on the back cover. Both covers must also clearly
-- and legibly identify you as the publisher of these copies. The
-- front cover must present the full title with all words of the
-- title equally prominent and visible. You may add other material
-- on the covers in addition. Copying with changes limited to the
-- covers, as long as they preserve the title of the Document and
-- satisfy these conditions, can be treated as verbatim copying in
-- other respects.
--
-- If the required texts for either cover are too voluminous to fit
-- legibly, you should put the first ones listed (as many as fit
-- reasonably) on the actual cover, and continue the rest onto
-- adjacent pages.
--
-- If you publish or distribute Opaque copies of the Document
-- numbering more than 100, you must either include a
-- machine-readable Transparent copy along with each Opaque copy, or
-- state in or with each Opaque copy a computer-network location from
-- which the general network-using public has access to download
-- using public-standard network protocols a complete Transparent
-- copy of the Document, free of added material. If you use the
-- latter option, you must take reasonably prudent steps, when you
-- begin distribution of Opaque copies in quantity, to ensure that
-- this Transparent copy will remain thus accessible at the stated
-- location until at least one year after the last time you
-- distribute an Opaque copy (directly or through your agents or
-- retailers) of that edition to the public.
--
-- It is requested, but not required, that you contact the authors of
-- the Document well before redistributing any large number of
-- copies, to give them a chance to provide you with an updated
-- version of the Document.
--
-- 4. MODIFICATIONS
--
-- You may copy and distribute a Modified Version of the Document
-- under the conditions of sections 2 and 3 above, provided that you
-- release the Modified Version under precisely this License, with
-- the Modified Version filling the role of the Document, thus
-- licensing distribution and modification of the Modified Version to
-- whoever possesses a copy of it. In addition, you must do these
-- things in the Modified Version:
--
-- A. Use in the Title Page (and on the covers, if any) a title
-- distinct from that of the Document, and from those of
-- previous versions (which should, if there were any, be listed
-- in the History section of the Document). You may use the
-- same title as a previous version if the original publisher of
-- that version gives permission.
--
-- B. List on the Title Page, as authors, one or more persons or
-- entities responsible for authorship of the modifications in
-- the Modified Version, together with at least five of the
-- principal authors of the Document (all of its principal
-- authors, if it has fewer than five), unless they release you
-- from this requirement.
--
-- C. State on the Title page the name of the publisher of the
-- Modified Version, as the publisher.
--
-- D. Preserve all the copyright notices of the Document.
--
-- E. Add an appropriate copyright notice for your modifications
-- adjacent to the other copyright notices.
--
-- F. Include, immediately after the copyright notices, a license
-- notice giving the public permission to use the Modified
-- Version under the terms of this License, in the form shown in
-- the Addendum below.
--
-- G. Preserve in that license notice the full lists of Invariant
-- Sections and required Cover Texts given in the Document's
-- license notice.
--
-- H. Include an unaltered copy of this License.
--
-- I. Preserve the section Entitled "History", Preserve its Title,
-- and add to it an item stating at least the title, year, new
-- authors, and publisher of the Modified Version as given on
-- the Title Page. If there is no section Entitled "History" in
-- the Document, create one stating the title, year, authors,
-- and publisher of the Document as given on its Title Page,
-- then add an item describing the Modified Version as stated in
-- the previous sentence.
--
-- J. Preserve the network location, if any, given in the Document
-- for public access to a Transparent copy of the Document, and
-- likewise the network locations given in the Document for
-- previous versions it was based on. These may be placed in
-- the "History" section. You may omit a network location for a
-- work that was published at least four years before the
-- Document itself, or if the original publisher of the version
-- it refers to gives permission.
--
-- K. For any section Entitled "Acknowledgements" or "Dedications",
-- Preserve the Title of the section, and preserve in the
-- section all the substance and tone of each of the contributor
-- acknowledgements and/or dedications given therein.
--
-- L. Preserve all the Invariant Sections of the Document,
-- unaltered in their text and in their titles. Section numbers
-- or the equivalent are not considered part of the section
-- titles.
--
-- M. Delete any section Entitled "Endorsements". Such a section
-- may not be included in the Modified Version.
--
-- N. Do not retitle any existing section to be Entitled
-- "Endorsements" or to conflict in title with any Invariant
-- Section.
--
-- O. Preserve any Warranty Disclaimers.
--
-- If the Modified Version includes new front-matter sections or
-- appendices that qualify as Secondary Sections and contain no
-- material copied from the Document, you may at your option
-- designate some or all of these sections as invariant. To do this,
-- add their titles to the list of Invariant Sections in the Modified
-- Version's license notice. These titles must be distinct from any
-- other section titles.
--
-- You may add a section Entitled "Endorsements", provided it contains
-- nothing but endorsements of your Modified Version by various
-- parties--for example, statements of peer review or that the text
-- has been approved by an organization as the authoritative
-- definition of a standard.
--
-- You may add a passage of up to five words as a Front-Cover Text,
-- and a passage of up to 25 words as a Back-Cover Text, to the end
-- of the list of Cover Texts in the Modified Version. Only one
-- passage of Front-Cover Text and one of Back-Cover Text may be
-- added by (or through arrangements made by) any one entity. If the
-- Document already includes a cover text for the same cover,
-- previously added by you or by arrangement made by the same entity
-- you are acting on behalf of, you may not add another; but you may
-- replace the old one, on explicit permission from the previous
-- publisher that added the old one.
--
-- The author(s) and publisher(s) of the Document do not by this
-- License give permission to use their names for publicity for or to
-- assert or imply endorsement of any Modified Version.
--
-- 5. COMBINING DOCUMENTS
--
-- You may combine the Document with other documents released under
-- this License, under the terms defined in section 4 above for
-- modified versions, provided that you include in the combination
-- all of the Invariant Sections of all of the original documents,
-- unmodified, and list them all as Invariant Sections of your
-- combined work in its license notice, and that you preserve all
-- their Warranty Disclaimers.
--
-- The combined work need only contain one copy of this License, and
-- multiple identical Invariant Sections may be replaced with a single
-- copy. If there are multiple Invariant Sections with the same name
-- but different contents, make the title of each such section unique
-- by adding at the end of it, in parentheses, the name of the
-- original author or publisher of that section if known, or else a
-- unique number. Make the same adjustment to the section titles in
-- the list of Invariant Sections in the license notice of the
-- combined work.
--
-- In the combination, you must combine any sections Entitled
-- "History" in the various original documents, forming one section
-- Entitled "History"; likewise combine any sections Entitled
-- "Acknowledgements", and any sections Entitled "Dedications". You
-- must delete all sections Entitled "Endorsements."
--
-- 6. COLLECTIONS OF DOCUMENTS
--
-- You may make a collection consisting of the Document and other
-- documents released under this License, and replace the individual
-- copies of this License in the various documents with a single copy
-- that is included in the collection, provided that you follow the
-- rules of this License for verbatim copying of each of the
-- documents in all other respects.
--
-- You may extract a single document from such a collection, and
-- distribute it individually under this License, provided you insert
-- a copy of this License into the extracted document, and follow
-- this License in all other respects regarding verbatim copying of
-- that document.
--
-- 7. AGGREGATION WITH INDEPENDENT WORKS
--
-- A compilation of the Document or its derivatives with other
-- separate and independent documents or works, in or on a volume of
-- a storage or distribution medium, is called an "aggregate" if the
-- copyright resulting from the compilation is not used to limit the
-- legal rights of the compilation's users beyond what the individual
-- works permit. When the Document is included in an aggregate, this
-- License does not apply to the other works in the aggregate which
-- are not themselves derivative works of the Document.
--
-- If the Cover Text requirement of section 3 is applicable to these
-- copies of the Document, then if the Document is less than one half
-- of the entire aggregate, the Document's Cover Texts may be placed
-- on covers that bracket the Document within the aggregate, or the
-- electronic equivalent of covers if the Document is in electronic
-- form. Otherwise they must appear on printed covers that bracket
-- the whole aggregate.
--
-- 8. TRANSLATION
--
-- Translation is considered a kind of modification, so you may
-- distribute translations of the Document under the terms of section
-- 4. Replacing Invariant Sections with translations requires special
-- permission from their copyright holders, but you may include
-- translations of some or all Invariant Sections in addition to the
-- original versions of these Invariant Sections. You may include a
-- translation of this License, and all the license notices in the
-- Document, and any Warranty Disclaimers, provided that you also
-- include the original English version of this License and the
-- original versions of those notices and disclaimers. In case of a
-- disagreement between the translation and the original version of
-- this License or a notice or disclaimer, the original version will
-- prevail.
--
-- If a section in the Document is Entitled "Acknowledgements",
-- "Dedications", or "History", the requirement (section 4) to
-- Preserve its Title (section 1) will typically require changing the
-- actual title.
--
-- 9. TERMINATION
--
-- You may not copy, modify, sublicense, or distribute the Document
-- except as expressly provided under this License. Any attempt
-- otherwise to copy, modify, sublicense, or distribute it is void,
-- and will automatically terminate your rights under this License.
--
-- However, if you cease all violation of this License, then your
-- license from a particular copyright holder is reinstated (a)
-- provisionally, unless and until the copyright holder explicitly
-- and finally terminates your license, and (b) permanently, if the
-- copyright holder fails to notify you of the violation by some
-- reasonable means prior to 60 days after the cessation.
--
-- Moreover, your license from a particular copyright holder is
-- reinstated permanently if the copyright holder notifies you of the
-- violation by some reasonable means, this is the first time you have
-- received notice of violation of this License (for any work) from
-- that copyright holder, and you cure the violation prior to 30 days
-- after your receipt of the notice.
--
-- Termination of your rights under this section does not terminate
-- the licenses of parties who have received copies or rights from
-- you under this License. If your rights have been terminated and
-- not permanently reinstated, receipt of a copy of some or all of
-- the same material does not give you any rights to use it.
--
-- 10. FUTURE REVISIONS OF THIS LICENSE
--
-- The Free Software Foundation may publish new, revised versions of
-- the GNU Free Documentation License from time to time. Such new
-- versions will be similar in spirit to the present version, but may
-- differ in detail to address new problems or concerns. See
-- `http://www.gnu.org/copyleft/'.
--
-- Each version of the License is given a distinguishing version
-- number. If the Document specifies that a particular numbered
-- version of this License "or any later version" applies to it, you
-- have the option of following the terms and conditions either of
-- that specified version or of any later version that has been
-- published (not as a draft) by the Free Software Foundation. If
-- the Document does not specify a version number of this License,
-- you may choose any version ever published (not as a draft) by the
-- Free Software Foundation. If the Document specifies that a proxy
-- can decide which future versions of this License can be used, that
-- proxy's public statement of acceptance of a version permanently
-- authorizes you to choose that version for the Document.
--
-- 11. RELICENSING
--
-- "Massive Multiauthor Collaboration Site" (or "MMC Site") means any
-- World Wide Web server that publishes copyrightable works and also
-- provides prominent facilities for anybody to edit those works. A
-- public wiki that anybody can edit is an example of such a server.
-- A "Massive Multiauthor Collaboration" (or "MMC") contained in the
-- site means any set of copyrightable works thus published on the MMC
-- site.
--
-- "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0
-- license published by Creative Commons Corporation, a not-for-profit
-- corporation with a principal place of business in San Francisco,
-- California, as well as future copyleft versions of that license
-- published by that same organization.
--
-- "Incorporate" means to publish or republish a Document, in whole or
-- in part, as part of another Document.
--
-- An MMC is "eligible for relicensing" if it is licensed under this
-- License, and if all works that were first published under this
-- License somewhere other than this MMC, and subsequently
-- incorporated in whole or in part into the MMC, (1) had no cover
-- texts or invariant sections, and (2) were thus incorporated prior
-- to November 1, 2008.
--
-- The operator of an MMC Site may republish an MMC contained in the
-- site under CC-BY-SA on the same site at any time before August 1,
-- 2009, provided the MMC is eligible for relicensing.
--
--
--ADDENDUM: How to use this License for your documents
--====================================================
--
--To use this License in a document you have written, include a copy of
--the License in the document and put the following copyright and license
--notices just after the title page:
--
-- Copyright (C) YEAR YOUR NAME.
-- Permission is granted to copy, distribute and/or modify this document
-- under the terms of the GNU Free Documentation License, Version 1.3
-- or any later version published by the Free Software Foundation;
-- with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
-- Texts. A copy of the license is included in the section entitled ``GNU
-- Free Documentation License''.
--
-- If you have Invariant Sections, Front-Cover Texts and Back-Cover
--Texts, replace the "with...Texts." line with this:
--
-- with the Invariant Sections being LIST THEIR TITLES, with
-- the Front-Cover Texts being LIST, and with the Back-Cover Texts
-- being LIST.
--
-- If you have Invariant Sections without Cover Texts, or some other
--combination of the three, merge those two alternatives to suit the
--situation.
--
-- If your document contains nontrivial examples of program code, we
--recommend releasing these examples in parallel under your choice of
--free software license, such as the GNU General Public License, to
--permit their use in free software.
--
--
--File: standards.info, Node: Index, Prev: GNU Free Documentation License, Up: Top
--
--Index
--*****
--
--
--* Menu:
--
--* #endif, commenting: Comments. (line 60)
--* --help output: --help. (line 6)
--* --version output: --version. (line 6)
--* -Wall compiler option: Syntactic Conventions.
-- (line 10)
--* accepting contributions: Contributions. (line 6)
--* address for bug reports: --help. (line 11)
--* ANSI C standard: Standard C. (line 6)
--* arbitrary limits on data: Semantics. (line 6)
--* ASCII characters: Character Set. (line 6)
--* autoconf: System Portability. (line 23)
--* avoiding proprietary code: Reading Non-Free Code.
-- (line 6)
--* behavior, dependent on program's name: User Interfaces. (line 6)
--* binary packages: Install Command Categories.
-- (line 80)
--* bindir: Directory Variables. (line 54)
--* braces, in C source: Formatting. (line 6)
--* bug reports: --help. (line 11)
--* bug-standards@gnu.org email address: Preface. (line 30)
--* canonical name of a program: --version. (line 12)
--* casting pointers to integers: CPU Portability. (line 89)
--* CGI programs, standard options for: Command-Line Interfaces.
-- (line 31)
--* change logs: Change Logs. (line 6)
--* change logs, conditional changes: Conditional Changes. (line 6)
--* change logs, style: Style of Change Logs.
-- (line 6)
--* character set: Character Set. (line 6)
--* command-line arguments, decoding: Semantics. (line 46)
--* command-line interface: Command-Line Interfaces.
-- (line 6)
--* commenting: Comments. (line 6)
--* compatibility with C and POSIX standards: Compatibility. (line 6)
--* compiler warnings: Syntactic Conventions.
-- (line 10)
--* conditional changes, and change logs: Conditional Changes. (line 6)
--* conditionals, comments for: Comments. (line 60)
--* configure: Configuration. (line 6)
--* control-L: Formatting. (line 118)
--* conventions for makefiles: Makefile Conventions.
-- (line 6)
--* CORBA: Graphical Interfaces.
-- (line 16)
--* credits for manuals: Manual Credits. (line 6)
--* D-bus: Graphical Interfaces.
-- (line 16)
--* data types, and portability: CPU Portability. (line 6)
--* declaration for system functions: System Functions. (line 21)
--* DESTDIR: DESTDIR. (line 6)
--* documentation: Documentation. (line 6)
--* doschk: Names. (line 38)
--* downloading this manual: Preface. (line 14)
--* encodings: Character Set. (line 6)
--* error messages: Semantics. (line 19)
--* error messages, formatting: Errors. (line 6)
--* exec_prefix: Directory Variables. (line 36)
--* expressions, splitting: Formatting. (line 81)
--* FDL, GNU Free Documentation License: GNU Free Documentation License.
-- (line 6)
--* file usage: File Usage. (line 6)
--* file-name limitations: Names. (line 38)
--* formatting error messages: Errors. (line 6)
--* formatting source code: Formatting. (line 6)
--* formfeed: Formatting. (line 118)
--* function argument, declaring: Syntactic Conventions.
-- (line 6)
--* function prototypes: Standard C. (line 17)
--* getopt: Command-Line Interfaces.
-- (line 6)
--* gettext: Internationalization.
-- (line 6)
--* GNOME: Graphical Interfaces.
-- (line 16)
--* GNOME and Guile: Source Language. (line 38)
--* gnustandards project repository: Preface. (line 30)
--* gnustandards-commit@gnu.org mailing list: Preface. (line 24)
--* graphical user interface: Graphical Interfaces.
-- (line 6)
--* grave accent: Quote Characters. (line 6)
--* GTK+: Graphical Interfaces.
-- (line 6)
--* Guile: Source Language. (line 38)
--* implicit int: Syntactic Conventions.
-- (line 6)
--* impossible conditions: Semantics. (line 70)
--* installations, staged: DESTDIR. (line 6)
--* interface styles: Graphical Interfaces.
-- (line 6)
--* internationalization: Internationalization.
-- (line 6)
--* keyboard interface: Graphical Interfaces.
-- (line 16)
--* LDAP: OID Allocations. (line 6)
--* left quote: Quote Characters. (line 6)
--* legal aspects: Legal Issues. (line 6)
--* legal papers: Contributions. (line 6)
--* libexecdir: Directory Variables. (line 67)
--* libraries: Libraries. (line 6)
--* library functions, and portability: System Functions. (line 6)
--* library interface: Graphical Interfaces.
-- (line 16)
--* license for manuals: License for Manuals. (line 6)
--* lint: Syntactic Conventions.
-- (line 109)
--* locale-specific quote characters: Quote Characters. (line 6)
--* long option names: Option Table. (line 6)
--* long-named options: Command-Line Interfaces.
-- (line 12)
--* makefile, conventions for: Makefile Conventions.
-- (line 6)
--* malloc return value: Semantics. (line 25)
--* man pages: Man Pages. (line 6)
--* manual structure: Manual Structure Details.
-- (line 6)
--* memory allocation failure: Semantics. (line 25)
--* memory usage: Memory Usage. (line 6)
--* message text, and internationalization: Internationalization.
-- (line 29)
--* mmap: Mmap. (line 6)
--* multiple variables in a line: Syntactic Conventions.
-- (line 35)
--* names of variables, functions, and files: Names. (line 6)
--* NEWS file: NEWS File. (line 6)
--* non-ASCII characters: Character Set. (line 6)
--* non-POSIX systems, and portability: System Portability. (line 32)
--* non-standard extensions: Using Extensions. (line 6)
--* NUL characters: Semantics. (line 11)
--* OID allocations for GNU: OID Allocations. (line 6)
--* open brace: Formatting. (line 6)
--* optional features, configure-time: Configuration. (line 100)
--* options for compatibility: Compatibility. (line 14)
--* options, standard command-line: Command-Line Interfaces.
-- (line 31)
--* output device and program's behavior: User Interfaces. (line 13)
--* packaging: Releases. (line 6)
--* PATH_INFO, specifying standard options as: Command-Line Interfaces.
-- (line 31)
--* portability, and data types: CPU Portability. (line 6)
--* portability, and library functions: System Functions. (line 6)
--* portability, between system types: System Portability. (line 6)
--* POSIX compatibility: Compatibility. (line 6)
--* POSIXLY_CORRECT, environment variable: Compatibility. (line 21)
--* post-installation commands: Install Command Categories.
-- (line 6)
--* pre-installation commands: Install Command Categories.
-- (line 6)
--* prefix: Directory Variables. (line 26)
--* program configuration: Configuration. (line 6)
--* program design: Design Advice. (line 6)
--* program name and its behavior: User Interfaces. (line 6)
--* program's canonical name: --version. (line 12)
--* programming languages: Source Language. (line 6)
--* proprietary programs: Reading Non-Free Code.
-- (line 6)
--* quote characters: Quote Characters. (line 6)
--* README file: Releases. (line 21)
--* references to non-free material: References. (line 6)
--* releasing: Managing Releases. (line 6)
--* Savannah repository for gnustandards: Preface. (line 30)
--* sbindir: Directory Variables. (line 60)
--* signal handling: Semantics. (line 59)
--* SNMP: OID Allocations. (line 6)
--* spaces before open-paren: Formatting. (line 75)
--* staged installs: DESTDIR. (line 6)
--* standard command-line options: Command-Line Interfaces.
-- (line 31)
--* standards for makefiles: Makefile Conventions.
-- (line 6)
--* string library functions: System Functions. (line 55)
--* syntactic conventions: Syntactic Conventions.
-- (line 6)
--* table of long options: Option Table. (line 6)
--* temporary files: Semantics. (line 84)
--* temporary variables: Syntactic Conventions.
-- (line 23)
--* texinfo.tex, in a distribution: Releases. (line 70)
--* TMPDIR environment variable: Semantics. (line 84)
--* trademarks: Trademarks. (line 6)
--* user interface styles: Graphical Interfaces.
-- (line 6)
--* where to obtain standards.texi: Preface. (line 14)
--* X.509: OID Allocations. (line 6)
--
--
--
--Tag Table:
--Node: Top814
--Node: Preface2089
--Node: Legal Issues4802
--Node: Reading Non-Free Code5272
--Node: Contributions7002
--Node: Trademarks9240
--Node: Design Advice10875
--Node: Source Language11467
--Node: Compatibility13593
--Node: Using Extensions15221
--Node: Standard C16797
--Node: Conditional Compilation19200
--Node: Program Behavior20598
--Node: Non-GNU Standards21714
--Node: Semantics23995
--Node: Libraries28715
--Node: Errors29960
--Node: User Interfaces32453
--Node: Graphical Interfaces34058
--Node: Command-Line Interfaces35242
--Node: --version37274
--Node: --help43011
--Node: Option Table43884
--Node: OID Allocations58839
--Node: Memory Usage60636
--Node: File Usage61672
--Node: Writing C62422
--Node: Formatting63394
--Node: Comments67683
--Node: Syntactic Conventions71235
--Node: Names74697
--Node: System Portability76909
--Node: CPU Portability79800
--Node: System Functions83701
--Node: Internationalization88898
--Node: Character Set92892
--Node: Quote Characters93705
--Node: Mmap95225
--Node: Documentation95933
--Node: GNU Manuals97039
--Node: Doc Strings and Manuals102777
--Node: Manual Structure Details104330
--Node: License for Manuals105748
--Node: Manual Credits106722
--Node: Printed Manuals107115
--Node: NEWS File107801
--Node: Change Logs108479
--Node: Change Log Concepts109233
--Node: Style of Change Logs111336
--Node: Simple Changes113836
--Node: Conditional Changes115278
--Node: Indicating the Part Changed116700
--Node: Man Pages117227
--Node: Reading other Manuals119433
--Node: Managing Releases120224
--Node: Configuration121005
--Node: Makefile Conventions129670
--Node: Makefile Basics130552
--Node: Utilities in Makefiles133726
--Node: Command Variables135871
--Node: DESTDIR139093
--Node: Directory Variables141242
--Node: Standard Targets155735
--Ref: Standard Targets-Footnote-1169250
--Node: Install Command Categories169350
--Node: Releases173883
--Node: References177888
--Node: GNU Free Documentation License183735
--Node: Index208902
--
--End Tag Table
-diff -Nur binutils-2.24.orig/gas/aclocal.m4 binutils-2.24/gas/aclocal.m4
---- binutils-2.24.orig/gas/aclocal.m4 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/gas/aclocal.m4 2016-06-30 21:26:12.689894513 +0200
-@@ -1,7 +1,8 @@
--# generated automatically by aclocal 1.11.1 -*- Autoconf -*-
-+# generated automatically by aclocal 1.11.6 -*- Autoconf -*-
-
- # Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
--# 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
-+# 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation,
-+# Inc.
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-@@ -19,12 +20,40 @@
- If you have problems, you may need to regenerate the build system entirely.
- To do so, use the procedure documented by the package, typically `autoreconf'.])])
-
--# Copyright (C) 2002, 2003, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
-+# isc-posix.m4 serial 2 (gettext-0.11.2)
-+dnl Copyright (C) 1995-2002 Free Software Foundation, Inc.
-+dnl This file is free software; the Free Software Foundation
-+dnl gives unlimited permission to copy and/or distribute it,
-+dnl with or without modifications, as long as this notice is preserved.
-+
-+# This file is not needed with autoconf-2.53 and newer. Remove it in 2005.
-+
-+# This test replaces the one in autoconf.
-+# Currently this macro should have the same name as the autoconf macro
-+# because gettext's gettext.m4 (distributed in the automake package)
-+# still uses it. Otherwise, the use in gettext.m4 makes autoheader
-+# give these diagnostics:
-+# configure.in:556: AC_TRY_COMPILE was called before AC_ISC_POSIX
-+# configure.in:556: AC_TRY_RUN was called before AC_ISC_POSIX
-+
-+undefine([AC_ISC_POSIX])
-+
-+AC_DEFUN([AC_ISC_POSIX],
-+ [
-+ dnl This test replaces the obsolescent AC_ISC_POSIX kludge.
-+ AC_CHECK_LIB(cposix, strerror, [LIBS="$LIBS -lcposix"])
-+ ]
-+)
-+
-+# Copyright (C) 2002, 2003, 2005, 2006, 2007, 2008, 2011 Free Software
-+# Foundation, Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-
-+# serial 1
-+
- # AM_AUTOMAKE_VERSION(VERSION)
- # ----------------------------
- # Automake X.Y traces this macro to ensure aclocal.m4 has been
-@@ -34,7 +63,7 @@
- [am__api_version='1.11'
- dnl Some users find AM_AUTOMAKE_VERSION and mistake it for a way to
- dnl require some minimum version. Point them to the right macro.
--m4_if([$1], [1.11.1], [],
-+m4_if([$1], [1.11.6], [],
- [AC_FATAL([Do not call $0, use AM_INIT_AUTOMAKE([$1]).])])dnl
- ])
-
-@@ -50,19 +79,21 @@
- # Call AM_AUTOMAKE_VERSION and AM_AUTOMAKE_VERSION so they can be traced.
- # This function is AC_REQUIREd by AM_INIT_AUTOMAKE.
- AC_DEFUN([AM_SET_CURRENT_AUTOMAKE_VERSION],
--[AM_AUTOMAKE_VERSION([1.11.1])dnl
-+[AM_AUTOMAKE_VERSION([1.11.6])dnl
- m4_ifndef([AC_AUTOCONF_VERSION],
- [m4_copy([m4_PACKAGE_VERSION], [AC_AUTOCONF_VERSION])])dnl
- _AM_AUTOCONF_VERSION(m4_defn([AC_AUTOCONF_VERSION]))])
-
- # AM_AUX_DIR_EXPAND -*- Autoconf -*-
-
--# Copyright (C) 2001, 2003, 2005 Free Software Foundation, Inc.
-+# Copyright (C) 2001, 2003, 2005, 2011 Free Software Foundation, Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-
-+# serial 1
-+
- # For projects using AC_CONFIG_AUX_DIR([foo]), Autoconf sets
- # $ac_aux_dir to `$srcdir/foo'. In other projects, it is set to
- # `$srcdir', `$srcdir/..', or `$srcdir/../..'.
-@@ -144,14 +175,14 @@
- Usually this means the macro was only invoked conditionally.]])
- fi])])
-
--# Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2009
--# Free Software Foundation, Inc.
-+# Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2009,
-+# 2010, 2011 Free Software Foundation, Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-
--# serial 10
-+# serial 12
-
- # There are a few dirty hacks below to avoid letting `AC_PROG_CC' be
- # written in clear, in which case automake, when reading aclocal.m4,
-@@ -191,6 +222,7 @@
- # instance it was reported that on HP-UX the gcc test will end up
- # making a dummy file named `D' -- because `-MD' means `put the output
- # in D'.
-+ rm -rf conftest.dir
- mkdir conftest.dir
- # Copy depcomp to subdir because otherwise we won't find it if we're
- # using a relative directory.
-@@ -255,7 +287,7 @@
- break
- fi
- ;;
-- msvisualcpp | msvcmsys)
-+ msvc7 | msvc7msys | msvisualcpp | msvcmsys)
- # This compiler won't grok `-c -o', but also, the minuso test has
- # not run yet. These depmodes are late enough in the game, and
- # so weak that their functioning should not be impacted.
-@@ -320,10 +352,13 @@
- if test "x$enable_dependency_tracking" != xno; then
- am_depcomp="$ac_aux_dir/depcomp"
- AMDEPBACKSLASH='\'
-+ am__nodep='_no'
- fi
- AM_CONDITIONAL([AMDEP], [test "x$enable_dependency_tracking" != xno])
- AC_SUBST([AMDEPBACKSLASH])dnl
- _AM_SUBST_NOTMAKE([AMDEPBACKSLASH])dnl
-+AC_SUBST([am__nodep])dnl
-+_AM_SUBST_NOTMAKE([am__nodep])dnl
- ])
-
- # Generate code to set up dependency tracking. -*- Autoconf -*-
-@@ -545,12 +580,15 @@
- done
- echo "timestamp for $_am_arg" >`AS_DIRNAME(["$_am_arg"])`/stamp-h[]$_am_stamp_count])
-
--# Copyright (C) 2001, 2003, 2005, 2008 Free Software Foundation, Inc.
-+# Copyright (C) 2001, 2003, 2005, 2008, 2011 Free Software Foundation,
-+# Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-
-+# serial 1
-+
- # AM_PROG_INSTALL_SH
- # ------------------
- # Define $install_sh.
-@@ -590,8 +628,8 @@
- # Add --enable-maintainer-mode option to configure. -*- Autoconf -*-
- # From Jim Meyering
-
--# Copyright (C) 1996, 1998, 2000, 2001, 2002, 2003, 2004, 2005, 2008
--# Free Software Foundation, Inc.
-+# Copyright (C) 1996, 1998, 2000, 2001, 2002, 2003, 2004, 2005, 2008,
-+# 2011 Free Software Foundation, Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
-@@ -611,7 +649,7 @@
- [disable], [m4_define([am_maintainer_other], [enable])],
- [m4_define([am_maintainer_other], [enable])
- m4_warn([syntax], [unexpected argument to AM@&t@_MAINTAINER_MODE: $1])])
--AC_MSG_CHECKING([whether to am_maintainer_other maintainer-specific portions of Makefiles])
-+AC_MSG_CHECKING([whether to enable maintainer-specific portions of Makefiles])
- dnl maintainer-mode's default is 'disable' unless 'enable' is passed
- AC_ARG_ENABLE([maintainer-mode],
- [ --][am_maintainer_other][-maintainer-mode am_maintainer_other make rules and dependencies not useful
-@@ -722,12 +760,15 @@
- fi
- ])
-
--# Copyright (C) 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
-+# Copyright (C) 2003, 2004, 2005, 2006, 2011 Free Software Foundation,
-+# Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-
-+# serial 1
-+
- # AM_PROG_MKDIR_P
- # ---------------
- # Check for `mkdir -p'.
-@@ -750,13 +791,14 @@
-
- # Helper functions for option handling. -*- Autoconf -*-
-
--# Copyright (C) 2001, 2002, 2003, 2005, 2008 Free Software Foundation, Inc.
-+# Copyright (C) 2001, 2002, 2003, 2005, 2008, 2010 Free Software
-+# Foundation, Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-
--# serial 4
-+# serial 5
-
- # _AM_MANGLE_OPTION(NAME)
- # -----------------------
-@@ -764,13 +806,13 @@
- [[_AM_OPTION_]m4_bpatsubst($1, [[^a-zA-Z0-9_]], [_])])
-
- # _AM_SET_OPTION(NAME)
--# ------------------------------
-+# --------------------
- # Set option NAME. Presently that only means defining a flag for this option.
- AC_DEFUN([_AM_SET_OPTION],
- [m4_define(_AM_MANGLE_OPTION([$1]), 1)])
-
- # _AM_SET_OPTIONS(OPTIONS)
--# ----------------------------------
-+# ------------------------
- # OPTIONS is a space-separated list of Automake options.
- AC_DEFUN([_AM_SET_OPTIONS],
- [m4_foreach_w([_AM_Option], [$1], [_AM_SET_OPTION(_AM_Option)])])
-@@ -846,12 +888,14 @@
- fi
- AC_MSG_RESULT(yes)])
-
--# Copyright (C) 2001, 2003, 2005 Free Software Foundation, Inc.
-+# Copyright (C) 2001, 2003, 2005, 2011 Free Software Foundation, Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-
-+# serial 1
-+
- # AM_PROG_INSTALL_STRIP
- # ---------------------
- # One issue with vendor `install' (even GNU) is that you can't
-@@ -874,13 +918,13 @@
- INSTALL_STRIP_PROGRAM="\$(install_sh) -c -s"
- AC_SUBST([INSTALL_STRIP_PROGRAM])])
-
--# Copyright (C) 2006, 2008 Free Software Foundation, Inc.
-+# Copyright (C) 2006, 2008, 2010 Free Software Foundation, Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-
--# serial 2
-+# serial 3
-
- # _AM_SUBST_NOTMAKE(VARIABLE)
- # ---------------------------
-@@ -889,13 +933,13 @@
- AC_DEFUN([_AM_SUBST_NOTMAKE])
-
- # AM_SUBST_NOTMAKE(VARIABLE)
--# ---------------------------
-+# --------------------------
- # Public sister of _AM_SUBST_NOTMAKE.
- AC_DEFUN([AM_SUBST_NOTMAKE], [_AM_SUBST_NOTMAKE($@)])
-
- # Check how to create a tarball. -*- Autoconf -*-
-
--# Copyright (C) 2004, 2005 Free Software Foundation, Inc.
-+# Copyright (C) 2004, 2005, 2012 Free Software Foundation, Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
-@@ -917,10 +961,11 @@
- # a tarball read from stdin.
- # $(am__untar) < result.tar
- AC_DEFUN([_AM_PROG_TAR],
--[# Always define AMTAR for backward compatibility.
--AM_MISSING_PROG([AMTAR], [tar])
-+[# Always define AMTAR for backward compatibility. Yes, it's still used
-+# in the wild :-( We should find a proper way to deprecate it ...
-+AC_SUBST([AMTAR], ['$${TAR-tar}'])
- m4_if([$1], [v7],
-- [am__tar='${AMTAR} chof - "$$tardir"'; am__untar='${AMTAR} xf -'],
-+ [am__tar='$${TAR-tar} chof - "$$tardir"' am__untar='$${TAR-tar} xf -'],
- [m4_case([$1], [ustar],, [pax],,
- [m4_fatal([Unknown tar format])])
- AC_MSG_CHECKING([how to create a $1 tar archive])
-diff -Nur binutils-2.24.orig/gas/bfin-lex.c binutils-2.24/gas/bfin-lex.c
---- binutils-2.24.orig/gas/bfin-lex.c 2013-11-18 09:49:28.000000000 +0100
-+++ binutils-2.24/gas/bfin-lex.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,3560 +0,0 @@
--
--#line 3 "bfin-lex.c"
--
--#define YY_INT_ALIGNED short int
--
--/* A lexical scanner generated by flex */
--
--#define FLEX_SCANNER
--#define YY_FLEX_MAJOR_VERSION 2
--#define YY_FLEX_MINOR_VERSION 5
--#define YY_FLEX_SUBMINOR_VERSION 35
--#if YY_FLEX_SUBMINOR_VERSION > 0
--#define FLEX_BETA
--#endif
--
--/* First, we deal with platform-specific or compiler-specific issues. */
--
--/* begin standard C headers. */
--#include <stdio.h>
--#include <string.h>
--#include <errno.h>
--#include <stdlib.h>
--
--/* end standard C headers. */
--
--/* flex integer type definitions */
--
--#ifndef FLEXINT_H
--#define FLEXINT_H
--
--/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */
--
--#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
--
--/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
-- * if you want the limit (max/min) macros for int types.
-- */
--#ifndef __STDC_LIMIT_MACROS
--#define __STDC_LIMIT_MACROS 1
--#endif
--
--#include <inttypes.h>
--typedef int8_t flex_int8_t;
--typedef uint8_t flex_uint8_t;
--typedef int16_t flex_int16_t;
--typedef uint16_t flex_uint16_t;
--typedef int32_t flex_int32_t;
--typedef uint32_t flex_uint32_t;
--typedef uint64_t flex_uint64_t;
--#else
--typedef signed char flex_int8_t;
--typedef short int flex_int16_t;
--typedef int flex_int32_t;
--typedef unsigned char flex_uint8_t;
--typedef unsigned short int flex_uint16_t;
--typedef unsigned int flex_uint32_t;
--#endif /* ! C99 */
--
--/* Limits of integral types. */
--#ifndef INT8_MIN
--#define INT8_MIN (-128)
--#endif
--#ifndef INT16_MIN
--#define INT16_MIN (-32767-1)
--#endif
--#ifndef INT32_MIN
--#define INT32_MIN (-2147483647-1)
--#endif
--#ifndef INT8_MAX
--#define INT8_MAX (127)
--#endif
--#ifndef INT16_MAX
--#define INT16_MAX (32767)
--#endif
--#ifndef INT32_MAX
--#define INT32_MAX (2147483647)
--#endif
--#ifndef UINT8_MAX
--#define UINT8_MAX (255U)
--#endif
--#ifndef UINT16_MAX
--#define UINT16_MAX (65535U)
--#endif
--#ifndef UINT32_MAX
--#define UINT32_MAX (4294967295U)
--#endif
--
--#endif /* ! FLEXINT_H */
--
--#ifdef __cplusplus
--
--/* The "const" storage-class-modifier is valid. */
--#define YY_USE_CONST
--
--#else /* ! __cplusplus */
--
--/* C99 requires __STDC__ to be defined as 1. */
--#if defined (__STDC__)
--
--#define YY_USE_CONST
--
--#endif /* defined (__STDC__) */
--#endif /* ! __cplusplus */
--
--#ifdef YY_USE_CONST
--#define yyconst const
--#else
--#define yyconst
--#endif
--
--/* Returned upon end-of-file. */
--#define YY_NULL 0
--
--/* Promotes a possibly negative, possibly signed char to an unsigned
-- * integer for use as an array index. If the signed char is negative,
-- * we want to instead treat it as an 8-bit unsigned char, hence the
-- * double cast.
-- */
--#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c)
--
--/* Enter a start condition. This macro really ought to take a parameter,
-- * but we do it the disgusting crufty way forced on us by the ()-less
-- * definition of BEGIN.
-- */
--#define BEGIN (yy_start) = 1 + 2 *
--
--/* Translate the current start state into a value that can be later handed
-- * to BEGIN to return to the state. The YYSTATE alias is for lex
-- * compatibility.
-- */
--#define YY_START (((yy_start) - 1) / 2)
--#define YYSTATE YY_START
--
--/* Action number for EOF rule of a given start state. */
--#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1)
--
--/* Special action meaning "start processing a new file". */
--#define YY_NEW_FILE yyrestart(yyin )
--
--#define YY_END_OF_BUFFER_CHAR 0
--
--/* Size of default input buffer. */
--#ifndef YY_BUF_SIZE
--#define YY_BUF_SIZE 16384
--#endif
--
--/* The state buf must be large enough to hold one state per character in the main buffer.
-- */
--#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type))
--
--#ifndef YY_TYPEDEF_YY_BUFFER_STATE
--#define YY_TYPEDEF_YY_BUFFER_STATE
--typedef struct yy_buffer_state *YY_BUFFER_STATE;
--#endif
--
--#ifndef YY_TYPEDEF_YY_SIZE_T
--#define YY_TYPEDEF_YY_SIZE_T
--typedef size_t yy_size_t;
--#endif
--
--extern yy_size_t yyleng;
--
--extern FILE *yyin, *yyout;
--
--#define EOB_ACT_CONTINUE_SCAN 0
--#define EOB_ACT_END_OF_FILE 1
--#define EOB_ACT_LAST_MATCH 2
--
-- #define YY_LESS_LINENO(n)
--
--/* Return all but the first "n" matched characters back to the input stream. */
--#define yyless(n) \
-- do \
-- { \
-- /* Undo effects of setting up yytext. */ \
-- int yyless_macro_arg = (n); \
-- YY_LESS_LINENO(yyless_macro_arg);\
-- *yy_cp = (yy_hold_char); \
-- YY_RESTORE_YY_MORE_OFFSET \
-- (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \
-- YY_DO_BEFORE_ACTION; /* set up yytext again */ \
-- } \
-- while ( 0 )
--
--#define unput(c) yyunput( c, (yytext_ptr) )
--
--#ifndef YY_STRUCT_YY_BUFFER_STATE
--#define YY_STRUCT_YY_BUFFER_STATE
--struct yy_buffer_state
-- {
-- FILE *yy_input_file;
--
-- char *yy_ch_buf; /* input buffer */
-- char *yy_buf_pos; /* current position in input buffer */
--
-- /* Size of input buffer in bytes, not including room for EOB
-- * characters.
-- */
-- yy_size_t yy_buf_size;
--
-- /* Number of characters read into yy_ch_buf, not including EOB
-- * characters.
-- */
-- yy_size_t yy_n_chars;
--
-- /* Whether we "own" the buffer - i.e., we know we created it,
-- * and can realloc() it to grow it, and should free() it to
-- * delete it.
-- */
-- int yy_is_our_buffer;
--
-- /* Whether this is an "interactive" input source; if so, and
-- * if we're using stdio for input, then we want to use getc()
-- * instead of fread(), to make sure we stop fetching input after
-- * each newline.
-- */
-- int yy_is_interactive;
--
-- /* Whether we're considered to be at the beginning of a line.
-- * If so, '^' rules will be active on the next match, otherwise
-- * not.
-- */
-- int yy_at_bol;
--
-- int yy_bs_lineno; /**< The line count. */
-- int yy_bs_column; /**< The column count. */
--
-- /* Whether to try to fill the input buffer when we reach the
-- * end of it.
-- */
-- int yy_fill_buffer;
--
-- int yy_buffer_status;
--
--#define YY_BUFFER_NEW 0
--#define YY_BUFFER_NORMAL 1
-- /* When an EOF's been seen but there's still some text to process
-- * then we mark the buffer as YY_EOF_PENDING, to indicate that we
-- * shouldn't try reading from the input source any more. We might
-- * still have a bunch of tokens to match, though, because of
-- * possible backing-up.
-- *
-- * When we actually see the EOF, we change the status to "new"
-- * (via yyrestart()), so that the user can continue scanning by
-- * just pointing yyin at a new input file.
-- */
--#define YY_BUFFER_EOF_PENDING 2
--
-- };
--#endif /* !YY_STRUCT_YY_BUFFER_STATE */
--
--/* Stack of input buffers. */
--static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */
--static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */
--static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */
--
--/* We provide macros for accessing buffer states in case in the
-- * future we want to put the buffer states in a more general
-- * "scanner state".
-- *
-- * Returns the top of the stack, or NULL.
-- */
--#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \
-- ? (yy_buffer_stack)[(yy_buffer_stack_top)] \
-- : NULL)
--
--/* Same as previous macro, but useful when we know that the buffer stack is not
-- * NULL or when we need an lvalue. For internal use only.
-- */
--#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)]
--
--/* yy_hold_char holds the character lost when yytext is formed. */
--static char yy_hold_char;
--static yy_size_t yy_n_chars; /* number of characters read into yy_ch_buf */
--yy_size_t yyleng;
--
--/* Points to current character in buffer. */
--static char *yy_c_buf_p = (char *) 0;
--static int yy_init = 0; /* whether we need to initialize */
--static int yy_start = 0; /* start state number */
--
--/* Flag which is used to allow yywrap()'s to do buffer switches
-- * instead of setting up a fresh yyin. A bit of a hack ...
-- */
--static int yy_did_buffer_switch_on_eof;
--
--void yyrestart (FILE *input_file );
--void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer );
--YY_BUFFER_STATE yy_create_buffer (FILE *file,int size );
--void yy_delete_buffer (YY_BUFFER_STATE b );
--void yy_flush_buffer (YY_BUFFER_STATE b );
--void yypush_buffer_state (YY_BUFFER_STATE new_buffer );
--void yypop_buffer_state (void );
--
--static void yyensure_buffer_stack (void );
--static void yy_load_buffer_state (void );
--static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file );
--
--#define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER )
--
--YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size );
--YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str );
--YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,yy_size_t len );
--
--void *yyalloc (yy_size_t );
--void *yyrealloc (void *,yy_size_t );
--void yyfree (void * );
--
--#define yy_new_buffer yy_create_buffer
--
--#define yy_set_interactive(is_interactive) \
-- { \
-- if ( ! YY_CURRENT_BUFFER ){ \
-- yyensure_buffer_stack (); \
-- YY_CURRENT_BUFFER_LVALUE = \
-- yy_create_buffer(yyin,YY_BUF_SIZE ); \
-- } \
-- YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \
-- }
--
--#define yy_set_bol(at_bol) \
-- { \
-- if ( ! YY_CURRENT_BUFFER ){\
-- yyensure_buffer_stack (); \
-- YY_CURRENT_BUFFER_LVALUE = \
-- yy_create_buffer(yyin,YY_BUF_SIZE ); \
-- } \
-- YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \
-- }
--
--#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol)
--
--/* Begin user sect3 */
--
--typedef unsigned char YY_CHAR;
--
--FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0;
--
--typedef int yy_state_type;
--
--extern int yylineno;
--
--int yylineno = 1;
--
--extern char *yytext;
--#define yytext_ptr yytext
--
--static yy_state_type yy_get_previous_state (void );
--static yy_state_type yy_try_NUL_trans (yy_state_type current_state );
--static int yy_get_next_buffer (void );
--static void yy_fatal_error (yyconst char msg[] );
--
--/* Done after the current pattern has been matched and before the
-- * corresponding action - sets up yytext.
-- */
--#define YY_DO_BEFORE_ACTION \
-- (yytext_ptr) = yy_bp; \
-- yyleng = (yy_size_t) (yy_cp - yy_bp); \
-- (yy_hold_char) = *yy_cp; \
-- *yy_cp = '\0'; \
-- (yy_c_buf_p) = yy_cp;
--
--#define YY_NUM_RULES 239
--#define YY_END_OF_BUFFER 240
--/* This struct is not used in this scanner,
-- but its presence is necessary. */
--struct yy_trans_info
-- {
-- flex_int32_t yy_verify;
-- flex_int32_t yy_nxt;
-- };
--static yyconst flex_int16_t yy_accept[571] =
-- { 0,
-- 0, 0, 0, 0, 0, 0, 240, 238, 236, 236,
-- 221, 234, 220, 219, 201, 202, 217, 215, 212, 211,
-- 204, 233, 233, 203, 222, 200, 196, 238, 225, 234,
-- 147, 234, 234, 234, 234, 234, 234, 234, 234, 234,
-- 234, 234, 234, 234, 54, 234, 234, 234, 12, 10,
-- 190, 189, 188, 186, 184, 234, 234, 234, 234, 234,
-- 70, 19, 18, 8, 7, 234, 218, 216, 214, 213,
-- 0, 210, 205, 0, 0, 0, 233, 235, 0, 199,
-- 197, 223, 195, 194, 179, 176, 234, 234, 234, 149,
-- 152, 234, 234, 148, 0, 146, 234, 139, 234, 234,
--
-- 135, 234, 125, 234, 123, 234, 234, 234, 234, 234,
-- 234, 234, 103, 102, 101, 234, 100, 99, 234, 234,
-- 97, 234, 95, 94, 93, 91, 234, 85, 234, 234,
-- 77, 86, 234, 71, 69, 234, 234, 234, 234, 65,
-- 234, 234, 234, 59, 234, 56, 234, 234, 53, 234,
-- 234, 234, 234, 234, 234, 234, 234, 234, 234, 234,
-- 234, 25, 234, 234, 234, 234, 234, 15, 14, 234,
-- 234, 159, 234, 234, 187, 185, 224, 234, 234, 95,
-- 234, 234, 234, 206, 208, 207, 209, 0, 0, 233,
-- 233, 198, 192, 193, 234, 234, 234, 172, 153, 154,
--
-- 234, 234, 163, 164, 234, 155, 157, 233, 234, 234,
-- 234, 234, 234, 234, 124, 234, 234, 119, 234, 234,
-- 234, 234, 234, 234, 234, 234, 234, 180, 98, 234,
-- 234, 234, 234, 234, 234, 80, 83, 78, 81, 234,
-- 234, 234, 79, 82, 234, 67, 66, 234, 63, 62,
-- 234, 234, 234, 234, 234, 234, 234, 234, 234, 234,
-- 44, 39, 38, 37, 36, 35, 34, 234, 32, 31,
-- 234, 234, 234, 234, 234, 234, 234, 21, 234, 234,
-- 16, 13, 234, 234, 9, 234, 234, 234, 234, 234,
-- 234, 237, 191, 171, 169, 178, 177, 170, 168, 175,
--
-- 174, 234, 234, 234, 234, 234, 156, 158, 145, 234,
-- 234, 234, 234, 138, 137, 234, 127, 234, 234, 118,
-- 234, 234, 234, 234, 111, 110, 234, 234, 234, 234,
-- 234, 234, 234, 105, 104, 234, 234, 234, 96, 234,
-- 92, 89, 84, 74, 234, 234, 68, 64, 234, 61,
-- 60, 58, 57, 234, 55, 45, 234, 50, 47, 49,
-- 46, 48, 234, 234, 43, 42, 234, 234, 234, 234,
-- 234, 234, 27, 24, 23, 234, 234, 234, 234, 234,
-- 234, 229, 234, 228, 234, 234, 173, 234, 234, 234,
-- 161, 234, 234, 234, 234, 234, 234, 234, 234, 234,
--
-- 234, 122, 234, 117, 116, 234, 234, 234, 234, 234,
-- 234, 234, 234, 108, 234, 234, 234, 234, 234, 234,
-- 234, 234, 234, 234, 2, 183, 52, 41, 40, 234,
-- 33, 234, 234, 234, 30, 234, 22, 234, 234, 234,
-- 234, 232, 234, 234, 234, 234, 234, 234, 165, 162,
-- 144, 143, 142, 141, 140, 234, 234, 234, 234, 126,
-- 121, 234, 234, 234, 234, 234, 51, 234, 234, 107,
-- 234, 234, 234, 234, 234, 88, 87, 90, 234, 234,
-- 73, 72, 234, 29, 234, 234, 234, 20, 234, 234,
-- 151, 234, 230, 234, 227, 234, 166, 167, 234, 234,
--
-- 234, 234, 234, 234, 120, 234, 114, 113, 234, 234,
-- 234, 5, 106, 234, 181, 234, 234, 234, 234, 160,
-- 28, 234, 234, 17, 11, 234, 234, 150, 234, 234,
-- 134, 133, 132, 129, 234, 115, 234, 6, 109, 234,
-- 234, 3, 234, 76, 1, 26, 231, 226, 136, 130,
-- 131, 234, 234, 234, 234, 234, 128, 234, 234, 4,
-- 75, 234, 234, 112, 234, 234, 234, 234, 182, 0
-- } ;
--
--static yyconst flex_int32_t yy_ec[256] =
-- { 0,
-- 1, 1, 1, 1, 1, 1, 1, 1, 2, 3,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 2, 4, 1, 5, 6, 7, 8, 1, 9,
-- 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,
-- 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
-- 30, 31, 1, 32, 33, 34, 35, 36, 37, 38,
-- 39, 40, 41, 42, 43, 44, 45, 46, 47, 48,
-- 49, 50, 51, 52, 53, 54, 55, 56, 57, 58,
-- 59, 1, 60, 61, 62, 1, 33, 34, 35, 36,
--
-- 37, 38, 39, 40, 41, 42, 43, 44, 45, 46,
-- 47, 48, 49, 50, 51, 52, 53, 54, 55, 56,
-- 57, 58, 1, 63, 1, 64, 1, 6, 6, 6,
-- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
--
-- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
-- 6, 6, 6, 6, 6
-- } ;
--
--static yyconst flex_int32_t yy_meta[65] =
-- { 0,
-- 1, 1, 2, 1, 1, 3, 1, 1, 1, 1,
-- 1, 1, 1, 1, 4, 1, 5, 5, 5, 5,
-- 5, 5, 5, 5, 5, 5, 1, 1, 1, 1,
-- 1, 1, 6, 7, 6, 6, 6, 7, 3, 3,
-- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
-- 3, 3, 3, 3, 3, 4, 3, 3, 1, 1,
-- 1, 3, 1, 1
-- } ;
--
--static yyconst flex_int16_t yy_base[577] =
-- { 0,
-- 0, 0, 27, 28, 32, 40, 666, 667, 667, 667,
-- 667, 0, 667, 635, 667, 667, 634, 67, 667, 56,
-- 652, 67, 72, 667, 667, 44, 63, 631, 667, 114,
-- 168, 67, 99, 33, 89, 70, 111, 157, 608, 209,
-- 161, 48, 98, 245, 279, 313, 101, 609, 84, 639,
-- 667, 667, 628, 90, 667, 152, 77, 616, 606, 75,
-- 235, 0, 175, 0, 0, 0, 667, 667, 667, 667,
-- 115, 667, 667, 142, 644, 0, 74, 667, 0, 624,
-- 667, 667, 667, 131, 638, 637, 120, 152, 610, 0,
-- 0, 190, 165, 0, 0, 635, 597, 0, 611, 600,
--
-- 594, 601, 0, 603, 0, 586, 607, 602, 592, 96,
-- 586, 169, 623, 591, 0, 584, 0, 0, 583, 597,
-- 618, 588, 0, 0, 580, 0, 585, 614, 172, 174,
-- 0, 581, 161, 205, 612, 570, 579, 577, 151, 0,
-- 576, 585, 569, 605, 584, 0, 566, 571, 601, 574,
-- 562, 577, 560, 236, 561, 577, 562, 187, 556, 566,
-- 567, 590, 547, 562, 551, 550, 547, 0, 0, 551,
-- 546, 0, 562, 577, 667, 667, 667, 542, 550, 549,
-- 546, 195, 547, 667, 667, 667, 667, 579, 148, 0,
-- 0, 667, 667, 559, 193, 195, 538, 0, 525, 0,
--
-- 547, 544, 0, 0, 551, 532, 531, 0, 230, 234,
-- 527, 530, 542, 534, 0, 531, 532, 271, 528, 541,
-- 196, 222, 242, 540, 522, 244, 536, 552, 0, 519,
-- 265, 531, 548, 518, 270, 0, 0, 0, 0, 517,
-- 512, 522, 0, 0, 273, 0, 0, 514, 0, 0,
-- 525, 509, 524, 275, 515, 509, 504, 284, 504, 293,
-- 318, 0, 0, 0, 0, 0, 0, 508, 0, 0,
-- 503, 501, 501, 512, 503, 283, 502, 0, 512, 494,
-- 0, 0, 483, 497, 0, 492, 505, 488, 497, 501,
-- 497, 526, 667, 0, 0, 0, 0, 0, 0, 0,
--
-- 0, 484, 500, 488, 495, 480, 0, 0, 0, 487,
-- 477, 492, 232, 0, 477, 294, 512, 491, 488, 289,
-- 479, 490, 471, 477, 0, 0, 487, 486, 462, 464,
-- 464, 479, 481, 0, 0, 477, 488, 461, 0, 448,
-- 0, 494, 0, 446, 454, 468, 0, 0, 468, 0,
-- 0, 0, 0, 469, 0, 0, 466, 0, 0, 0,
-- 0, 0, 483, 484, 0, 0, 455, 463, 463, 445,
-- 459, 443, 460, 0, 0, 458, 454, 440, 445, 441,
-- 448, 425, 435, 0, 448, 438, 0, 436, 338, 430,
-- 0, 431, 424, 427, 434, 425, 436, 427, 441, 427,
--
-- 416, 0, 420, 0, 0, 422, 425, 427, 428, 413,
-- 413, 429, 412, 0, 420, 426, 423, 414, 423, 407,
-- 315, 177, 408, 403, 0, 0, 0, 0, 0, 407,
-- 0, 413, 419, 400, 0, 409, 0, 410, 411, 414,
-- 389, 404, 404, 391, 399, 393, 417, 418, 0, 0,
-- 0, 0, 0, 0, 0, 397, 302, 402, 388, 0,
-- 416, 390, 381, 380, 385, 379, 0, 381, 391, 0,
-- 375, 375, 404, 391, 386, 0, 0, 0, 385, 375,
-- 0, 0, 384, 0, 367, 381, 365, 0, 364, 359,
-- 0, 368, 0, 378, 0, 355, 0, 0, 373, 86,
--
-- 362, 361, 365, 374, 0, 350, 0, 0, 368, 367,
-- 351, 0, 0, 356, 0, 335, 330, 339, 341, 0,
-- 0, 324, 324, 0, 0, 320, 333, 0, 320, 246,
-- 0, 0, 0, 0, 334, 0, 312, 0, 0, 305,
-- 309, 0, 314, 0, 0, 0, 0, 0, 0, 0,
-- 0, 309, 310, 304, 303, 292, 0, 287, 261, 0,
-- 0, 255, 241, 0, 254, 214, 186, 185, 0, 667,
-- 378, 382, 389, 179, 392, 395
-- } ;
--
--static yyconst flex_int16_t yy_def[577] =
-- { 0,
-- 570, 1, 1, 1, 1, 1, 570, 570, 570, 570,
-- 570, 571, 570, 570, 570, 570, 570, 570, 570, 570,
-- 570, 572, 572, 570, 570, 570, 570, 570, 570, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 570, 570, 570, 570, 570, 571, 38, 40, 44, 571,
-- 571, 46, 571, 571, 571, 571, 570, 570, 570, 570,
-- 570, 570, 570, 570, 573, 574, 23, 570, 575, 570,
-- 570, 570, 570, 570, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 576, 571, 571, 571, 571, 571,
--
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 570, 570, 570, 571, 571, 571,
-- 571, 571, 571, 570, 570, 570, 570, 573, 573, 574,
-- 575, 570, 570, 570, 571, 571, 571, 571, 571, 571,
--
-- 571, 571, 571, 571, 571, 571, 571, 576, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 573, 570, 571, 571, 571, 571, 571, 571, 571,
--
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
--
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
--
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 571,
-- 571, 571, 571, 571, 571, 571, 571, 571, 571, 0,
-- 570, 570, 570, 570, 570, 570
-- } ;
--
--static yyconst flex_int16_t yy_nxt[732] =
-- { 0,
-- 8, 9, 10, 11, 8, 12, 13, 14, 15, 16,
-- 17, 18, 19, 20, 12, 21, 22, 23, 23, 23,
-- 23, 23, 23, 23, 23, 23, 24, 25, 26, 27,
-- 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
-- 38, 39, 12, 40, 41, 42, 43, 44, 12, 45,
-- 46, 47, 48, 49, 50, 12, 12, 12, 51, 52,
-- 53, 12, 54, 55, 56, 56, 82, 57, 57, 72,
-- 58, 58, 80, 81, 59, 59, 61, 111, 69, 60,
-- 60, 76, 62, 63, 61, 73, 570, 64, 112, 65,
-- 62, 63, 83, 95, 139, 64, 70, 65, 140, 102,
--
-- 78, 103, 95, 95, 78, 78, 115, 570, 530, 78,
-- 104, 570, 179, 105, 180, 95, 116, 106, 74, 176,
-- 183, 117, 79, 107, 171, 170, 184, 570, 185, 71,
-- 85, 86, 108, 531, 172, 109, 113, 166, 167, 110,
-- 168, 114, 141, 142, 169, 173, 220, 87, 88, 221,
-- 143, 118, 177, 186, 119, 187, 95, 89, 189, 90,
-- 193, 194, 91, 292, 92, 120, 197, 93, 199, 200,
-- 198, 94, 95, 121, 121, 121, 121, 135, 135, 135,
-- 135, 206, 207, 190, 96, 96, 96, 96, 236, 237,
-- 238, 239, 122, 136, 123, 178, 124, 241, 249, 113,
--
-- 242, 137, 250, 223, 114, 569, 138, 125, 97, 126,
-- 479, 166, 167, 480, 168, 98, 224, 99, 169, 271,
-- 225, 243, 244, 100, 101, 128, 128, 128, 128, 202,
-- 568, 290, 294, 203, 298, 272, 295, 567, 299, 204,
-- 257, 205, 129, 130, 325, 131, 326, 296, 297, 300,
-- 301, 135, 135, 135, 135, 132, 327, 328, 329, 133,
-- 134, 144, 144, 144, 144, 144, 144, 136, 310, 309,
-- 395, 566, 263, 309, 330, 137, 264, 145, 311, 146,
-- 138, 265, 396, 334, 312, 313, 266, 335, 147, 331,
-- 550, 267, 565, 551, 148, 149, 149, 149, 149, 149,
--
-- 149, 149, 149, 320, 339, 321, 564, 563, 339, 343,
-- 322, 150, 347, 343, 352, 151, 347, 356, 352, 500,
-- 501, 502, 374, 356, 152, 153, 375, 356, 404, 358,
-- 154, 155, 405, 359, 562, 363, 364, 561, 360, 560,
-- 398, 399, 559, 361, 558, 156, 400, 157, 362, 158,
-- 159, 557, 160, 161, 556, 447, 448, 365, 476, 555,
-- 162, 366, 449, 163, 164, 477, 554, 553, 552, 165,
-- 478, 549, 548, 547, 546, 545, 544, 543, 542, 367,
-- 66, 66, 66, 66, 66, 77, 77, 541, 77, 188,
-- 540, 188, 188, 188, 188, 188, 191, 191, 191, 208,
--
-- 208, 208, 539, 538, 537, 536, 535, 534, 533, 532,
-- 529, 528, 527, 526, 525, 524, 523, 522, 521, 520,
-- 519, 518, 517, 516, 515, 514, 513, 512, 511, 510,
-- 509, 508, 507, 506, 505, 504, 503, 499, 498, 497,
-- 496, 495, 494, 493, 492, 491, 490, 489, 488, 487,
-- 486, 485, 484, 483, 482, 481, 475, 474, 473, 472,
-- 471, 470, 469, 468, 467, 466, 465, 464, 463, 462,
-- 461, 460, 459, 458, 457, 456, 455, 454, 453, 452,
-- 451, 450, 446, 445, 444, 443, 420, 442, 441, 440,
-- 439, 438, 437, 436, 435, 434, 433, 432, 431, 430,
--
-- 429, 428, 427, 426, 425, 424, 423, 422, 421, 420,
-- 419, 418, 417, 416, 415, 414, 413, 412, 411, 410,
-- 409, 408, 407, 406, 403, 402, 401, 397, 394, 393,
-- 392, 391, 390, 389, 388, 387, 189, 386, 385, 384,
-- 383, 382, 381, 380, 379, 378, 377, 376, 373, 372,
-- 371, 370, 369, 368, 357, 355, 354, 353, 351, 350,
-- 349, 348, 346, 345, 344, 342, 341, 340, 338, 337,
-- 336, 333, 332, 324, 323, 319, 318, 317, 316, 315,
-- 314, 308, 307, 306, 305, 304, 303, 302, 293, 189,
-- 291, 289, 288, 287, 286, 285, 284, 283, 282, 281,
--
-- 280, 279, 278, 277, 276, 275, 274, 273, 270, 269,
-- 268, 262, 261, 260, 259, 258, 257, 256, 255, 254,
-- 253, 252, 251, 248, 247, 246, 245, 240, 235, 234,
-- 233, 232, 231, 230, 229, 228, 227, 226, 222, 219,
-- 218, 217, 216, 215, 214, 213, 212, 211, 210, 209,
-- 201, 196, 195, 192, 189, 182, 181, 175, 174, 170,
-- 127, 84, 75, 68, 67, 570, 7, 570, 570, 570,
-- 570, 570, 570, 570, 570, 570, 570, 570, 570, 570,
-- 570, 570, 570, 570, 570, 570, 570, 570, 570, 570,
-- 570, 570, 570, 570, 570, 570, 570, 570, 570, 570,
--
-- 570, 570, 570, 570, 570, 570, 570, 570, 570, 570,
-- 570, 570, 570, 570, 570, 570, 570, 570, 570, 570,
-- 570, 570, 570, 570, 570, 570, 570, 570, 570, 570,
-- 570
-- } ;
--
--static yyconst flex_int16_t yy_chk[732] =
-- { 0,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 3, 4, 27, 3, 4, 20,
-- 3, 4, 26, 26, 3, 4, 5, 34, 18, 3,
-- 4, 22, 5, 5, 6, 20, 23, 5, 34, 5,
-- 6, 6, 27, 35, 42, 6, 18, 6, 42, 32,
--
-- 22, 32, 43, 33, 22, 23, 36, 77, 500, 23,
-- 32, 77, 57, 32, 57, 37, 36, 32, 20, 54,
-- 60, 36, 22, 32, 49, 60, 71, 23, 71, 18,
-- 30, 30, 33, 500, 49, 33, 35, 47, 47, 33,
-- 47, 35, 43, 43, 47, 49, 110, 30, 30, 110,
-- 43, 37, 54, 74, 37, 74, 56, 30, 189, 30,
-- 84, 84, 30, 189, 30, 37, 87, 30, 88, 88,
-- 87, 30, 31, 38, 38, 38, 38, 41, 41, 41,
-- 41, 93, 93, 574, 31, 31, 31, 31, 129, 129,
-- 130, 130, 38, 41, 38, 56, 38, 133, 139, 56,
--
-- 133, 41, 139, 112, 56, 568, 41, 38, 31, 38,
-- 422, 63, 63, 422, 63, 31, 112, 31, 63, 158,
-- 112, 134, 134, 31, 31, 40, 40, 40, 40, 92,
-- 567, 182, 195, 92, 196, 158, 195, 566, 196, 92,
-- 182, 92, 40, 40, 221, 40, 221, 195, 195, 196,
-- 196, 61, 61, 61, 61, 40, 222, 222, 222, 40,
-- 40, 44, 44, 44, 44, 44, 44, 61, 210, 209,
-- 313, 565, 154, 209, 223, 61, 154, 44, 210, 44,
-- 61, 154, 313, 226, 210, 210, 154, 226, 44, 223,
-- 530, 154, 563, 530, 44, 45, 45, 45, 45, 45,
--
-- 45, 45, 45, 218, 231, 218, 562, 559, 231, 235,
-- 218, 45, 245, 235, 254, 45, 245, 258, 254, 457,
-- 457, 457, 276, 258, 45, 45, 276, 258, 320, 260,
-- 45, 46, 320, 260, 558, 261, 261, 556, 260, 555,
-- 316, 316, 554, 260, 553, 46, 316, 46, 260, 46,
-- 46, 552, 46, 46, 543, 389, 389, 261, 421, 541,
-- 46, 261, 389, 46, 46, 421, 540, 537, 535, 46,
-- 421, 529, 527, 526, 523, 522, 519, 518, 517, 261,
-- 571, 571, 571, 571, 571, 572, 572, 516, 572, 573,
-- 514, 573, 573, 573, 573, 573, 575, 575, 575, 576,
--
-- 576, 576, 511, 510, 509, 506, 504, 503, 502, 501,
-- 499, 496, 494, 492, 490, 489, 487, 486, 485, 483,
-- 480, 479, 475, 474, 473, 472, 471, 469, 468, 466,
-- 465, 464, 463, 462, 461, 459, 458, 456, 448, 447,
-- 446, 445, 444, 443, 442, 441, 440, 439, 438, 436,
-- 434, 433, 432, 430, 424, 423, 420, 419, 418, 417,
-- 416, 415, 413, 412, 411, 410, 409, 408, 407, 406,
-- 403, 401, 400, 399, 398, 397, 396, 395, 394, 393,
-- 392, 390, 388, 386, 385, 383, 382, 381, 380, 379,
-- 378, 377, 376, 373, 372, 371, 370, 369, 368, 367,
--
-- 364, 363, 357, 354, 349, 346, 345, 344, 342, 340,
-- 338, 337, 336, 333, 332, 331, 330, 329, 328, 327,
-- 324, 323, 322, 321, 319, 318, 317, 315, 312, 311,
-- 310, 306, 305, 304, 303, 302, 292, 291, 290, 289,
-- 288, 287, 286, 284, 283, 280, 279, 277, 275, 274,
-- 273, 272, 271, 268, 259, 257, 256, 255, 253, 252,
-- 251, 248, 242, 241, 240, 234, 233, 232, 230, 228,
-- 227, 225, 224, 220, 219, 217, 216, 214, 213, 212,
-- 211, 207, 206, 205, 202, 201, 199, 197, 194, 188,
-- 183, 181, 180, 179, 178, 174, 173, 171, 170, 167,
--
-- 166, 165, 164, 163, 162, 161, 160, 159, 157, 156,
-- 155, 153, 152, 151, 150, 149, 148, 147, 145, 144,
-- 143, 142, 141, 138, 137, 136, 135, 132, 128, 127,
-- 125, 122, 121, 120, 119, 116, 114, 113, 111, 109,
-- 108, 107, 106, 104, 102, 101, 100, 99, 97, 96,
-- 89, 86, 85, 80, 75, 59, 58, 53, 50, 48,
-- 39, 28, 21, 17, 14, 7, 570, 570, 570, 570,
-- 570, 570, 570, 570, 570, 570, 570, 570, 570, 570,
-- 570, 570, 570, 570, 570, 570, 570, 570, 570, 570,
-- 570, 570, 570, 570, 570, 570, 570, 570, 570, 570,
--
-- 570, 570, 570, 570, 570, 570, 570, 570, 570, 570,
-- 570, 570, 570, 570, 570, 570, 570, 570, 570, 570,
-- 570, 570, 570, 570, 570, 570, 570, 570, 570, 570,
-- 570
-- } ;
--
--static yy_state_type yy_last_accepting_state;
--static char *yy_last_accepting_cpos;
--
--extern int yy_flex_debug;
--int yy_flex_debug = 0;
--
--/* The intent behind this definition is that it'll catch
-- * any uses of REJECT which flex missed.
-- */
--#define REJECT reject_used_but_not_detected
--#define yymore() yymore_used_but_not_detected
--#define YY_MORE_ADJ 0
--#define YY_RESTORE_YY_MORE_OFFSET
--char *yytext;
--#line 1 "bfin-lex.l"
--/* bfin-lex.l ADI Blackfin lexer
-- Copyright 2005, 2006, 2007, 2008, 2010
-- Free Software Foundation, Inc.
--
-- This file is part of GAS, the GNU Assembler.
--
-- GAS is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 3, or (at your option)
-- any later version.
--
-- GAS is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with GAS; see the file COPYING. If not, write to the Free
-- Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
-- 02110-1301, USA. */
--#line 22 "bfin-lex.l"
--
--#include "as.h"
--#include "bfin-defs.h"
--#include "bfin-parse.h"
--
--static long parse_int (char **end);
--static int parse_halfreg (Register *r, int cl, char *hr);
--static int parse_reg (Register *r, int type, char *rt);
--int yylex (void);
--
--#define _REG yylval.reg
--
--
--/* Define Start States ... Actually we will use exclusion.
-- If no start state is specified it should match any state
-- and <INITIAL> would match some keyword rules only with
-- initial. */
--
--
--#line 841 "bfin-lex.c"
--
--#define INITIAL 0
--#define KEYWORD 1
--#define FLAGS 2
--
--#ifndef YY_NO_UNISTD_H
--/* Special case for "unistd.h", since it is non-ANSI. We include it way
-- * down here because we want the user's section 1 to have been scanned first.
-- * The user has a chance to override it with an option.
-- */
--#include <unistd.h>
--#endif
--
--#ifndef YY_EXTRA_TYPE
--#define YY_EXTRA_TYPE void *
--#endif
--
--static int yy_init_globals (void );
--
--/* Accessor methods to globals.
-- These are made visible to non-reentrant scanners for convenience. */
--
--int yylex_destroy (void );
--
--int yyget_debug (void );
--
--void yyset_debug (int debug_flag );
--
--YY_EXTRA_TYPE yyget_extra (void );
--
--void yyset_extra (YY_EXTRA_TYPE user_defined );
--
--FILE *yyget_in (void );
--
--void yyset_in (FILE * in_str );
--
--FILE *yyget_out (void );
--
--void yyset_out (FILE * out_str );
--
--yy_size_t yyget_leng (void );
--
--char *yyget_text (void );
--
--int yyget_lineno (void );
--
--void yyset_lineno (int line_number );
--
--/* Macros after this point can all be overridden by user definitions in
-- * section 1.
-- */
--
--#ifndef YY_SKIP_YYWRAP
--#ifdef __cplusplus
--extern "C" int yywrap (void );
--#else
--extern int yywrap (void );
--#endif
--#endif
--
-- static void yyunput (int c,char *buf_ptr );
--
--#ifndef yytext_ptr
--static void yy_flex_strncpy (char *,yyconst char *,int );
--#endif
--
--#ifdef YY_NEED_STRLEN
--static int yy_flex_strlen (yyconst char * );
--#endif
--
--#ifndef YY_NO_INPUT
--
--#ifdef __cplusplus
--static int yyinput (void );
--#else
--static int input (void );
--#endif
--
--#endif
--
--/* Amount of stuff to slurp up with each read. */
--#ifndef YY_READ_BUF_SIZE
--#define YY_READ_BUF_SIZE 8192
--#endif
--
--/* Copy whatever the last rule matched to the standard output. */
--#ifndef ECHO
--/* This used to be an fputs(), but since the string might contain NUL's,
-- * we now use fwrite().
-- */
--#define ECHO fwrite( yytext, yyleng, 1, yyout )
--#endif
--
--/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL,
-- * is returned in "result".
-- */
--#ifndef YY_INPUT
--#define YY_INPUT(buf,result,max_size) \
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \
-- { \
-- int c = '*'; \
-- yy_size_t n; \
-- for ( n = 0; n < max_size && \
-- (c = getc( yyin )) != EOF && c != '\n'; ++n ) \
-- buf[n] = (char) c; \
-- if ( c == '\n' ) \
-- buf[n++] = (char) c; \
-- if ( c == EOF && ferror( yyin ) ) \
-- YY_FATAL_ERROR( "input in flex scanner failed" ); \
-- result = n; \
-- } \
-- else \
-- { \
-- errno=0; \
-- while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \
-- { \
-- if( errno != EINTR) \
-- { \
-- YY_FATAL_ERROR( "input in flex scanner failed" ); \
-- break; \
-- } \
-- errno=0; \
-- clearerr(yyin); \
-- } \
-- }\
--\
--
--#endif
--
--/* No semi-colon after return; correct usage is to write "yyterminate();" -
-- * we don't want an extra ';' after the "return" because that will cause
-- * some compilers to complain about unreachable statements.
-- */
--#ifndef yyterminate
--#define yyterminate() return YY_NULL
--#endif
--
--/* Number of entries by which start-condition stack grows. */
--#ifndef YY_START_STACK_INCR
--#define YY_START_STACK_INCR 25
--#endif
--
--/* Report a fatal error. */
--#ifndef YY_FATAL_ERROR
--#define YY_FATAL_ERROR(msg) yy_fatal_error( msg )
--#endif
--
--/* end tables serialization structures and prototypes */
--
--/* Default declaration of generated scanner - a define so the user can
-- * easily add parameters.
-- */
--#ifndef YY_DECL
--#define YY_DECL_IS_OURS 1
--
--extern int yylex (void);
--
--#define YY_DECL int yylex (void)
--#endif /* !YY_DECL */
--
--/* Code executed at the beginning of each rule, after yytext and yyleng
-- * have been set up.
-- */
--#ifndef YY_USER_ACTION
--#define YY_USER_ACTION
--#endif
--
--/* Code executed at the end of each rule. */
--#ifndef YY_BREAK
--#define YY_BREAK break;
--#endif
--
--#define YY_RULE_SETUP \
-- YY_USER_ACTION
--
--/** The main scanner function which does all the work.
-- */
--YY_DECL
--{
-- register yy_state_type yy_current_state;
-- register char *yy_cp, *yy_bp;
-- register int yy_act;
--
--#line 44 "bfin-lex.l"
--
--#line 1027 "bfin-lex.c"
--
-- if ( !(yy_init) )
-- {
-- (yy_init) = 1;
--
--#ifdef YY_USER_INIT
-- YY_USER_INIT;
--#endif
--
-- if ( ! (yy_start) )
-- (yy_start) = 1; /* first start state */
--
-- if ( ! yyin )
-- yyin = stdin;
--
-- if ( ! yyout )
-- yyout = stdout;
--
-- if ( ! YY_CURRENT_BUFFER ) {
-- yyensure_buffer_stack ();
-- YY_CURRENT_BUFFER_LVALUE =
-- yy_create_buffer(yyin,YY_BUF_SIZE );
-- }
--
-- yy_load_buffer_state( );
-- }
--
-- while ( 1 ) /* loops until end-of-file is reached */
-- {
-- yy_cp = (yy_c_buf_p);
--
-- /* Support of yytext. */
-- *yy_cp = (yy_hold_char);
--
-- /* yy_bp points to the position in yy_ch_buf of the start of
-- * the current run.
-- */
-- yy_bp = yy_cp;
--
-- yy_current_state = (yy_start);
--yy_match:
-- do
-- {
-- register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)];
-- if ( yy_accept[yy_current_state] )
-- {
-- (yy_last_accepting_state) = yy_current_state;
-- (yy_last_accepting_cpos) = yy_cp;
-- }
-- while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
-- {
-- yy_current_state = (int) yy_def[yy_current_state];
-- if ( yy_current_state >= 571 )
-- yy_c = yy_meta[(unsigned int) yy_c];
-- }
-- yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-- ++yy_cp;
-- }
-- while ( yy_base[yy_current_state] != 667 );
--
--yy_find_action:
-- yy_act = yy_accept[yy_current_state];
-- if ( yy_act == 0 )
-- { /* have to back up */
-- yy_cp = (yy_last_accepting_cpos);
-- yy_current_state = (yy_last_accepting_state);
-- yy_act = yy_accept[yy_current_state];
-- }
--
-- YY_DO_BEFORE_ACTION;
--
--do_action: /* This label is used only to access EOF actions. */
--
-- switch ( yy_act )
-- { /* beginning of action switch */
-- case 0: /* must back up */
-- /* undo the effects of YY_DO_BEFORE_ACTION */
-- *yy_cp = (yy_hold_char);
-- yy_cp = (yy_last_accepting_cpos);
-- yy_current_state = (yy_last_accepting_state);
-- goto yy_find_action;
--
--case 1:
--YY_RULE_SETUP
--#line 45 "bfin-lex.l"
--_REG.regno = REG_sftreset; return REG;
-- YY_BREAK
--case 2:
--YY_RULE_SETUP
--#line 46 "bfin-lex.l"
--_REG.regno = REG_omode; return REG;
-- YY_BREAK
--case 3:
--YY_RULE_SETUP
--#line 47 "bfin-lex.l"
--_REG.regno = REG_idle_req; return REG;
-- YY_BREAK
--case 4:
--YY_RULE_SETUP
--#line 48 "bfin-lex.l"
--_REG.regno = REG_hwerrcause; return REG;
-- YY_BREAK
--case 5:
--YY_RULE_SETUP
--#line 49 "bfin-lex.l"
--_REG.regno = REG_excause; return REG;
-- YY_BREAK
--case 6:
--YY_RULE_SETUP
--#line 50 "bfin-lex.l"
--_REG.regno = REG_emucause; return REG;
-- YY_BREAK
--case 7:
--YY_RULE_SETUP
--#line 51 "bfin-lex.l"
--return Z;
-- YY_BREAK
--case 8:
--YY_RULE_SETUP
--#line 52 "bfin-lex.l"
--return X;
-- YY_BREAK
--case 9:
--YY_RULE_SETUP
--#line 53 "bfin-lex.l"
--yylval.value = M_W32; return MMOD;
-- YY_BREAK
--case 10:
--YY_RULE_SETUP
--#line 54 "bfin-lex.l"
--return W;
-- YY_BREAK
--case 11:
--YY_RULE_SETUP
--#line 55 "bfin-lex.l"
--return VIT_MAX;
-- YY_BREAK
--case 12:
--YY_RULE_SETUP
--#line 56 "bfin-lex.l"
--return V; /* Special: V is a statflag and a modifier. */
-- YY_BREAK
--case 13:
--YY_RULE_SETUP
--#line 57 "bfin-lex.l"
--_REG.regno = REG_USP; return REG;
-- YY_BREAK
--case 14:
--YY_RULE_SETUP
--#line 58 "bfin-lex.l"
--return TL;
-- YY_BREAK
--case 15:
--YY_RULE_SETUP
--#line 59 "bfin-lex.l"
--return TH;
-- YY_BREAK
--case 16:
--YY_RULE_SETUP
--#line 60 "bfin-lex.l"
--yylval.value = M_TFU; return MMOD;
-- YY_BREAK
--case 17:
--YY_RULE_SETUP
--#line 61 "bfin-lex.l"
--return TESTSET;
-- YY_BREAK
--case 18:
--YY_RULE_SETUP
--#line 62 "bfin-lex.l"
--yylval.value = M_T; return MMOD;
-- YY_BREAK
--case 19:
--YY_RULE_SETUP
--#line 63 "bfin-lex.l"
--return S;
-- YY_BREAK
--case 20:
--YY_RULE_SETUP
--#line 64 "bfin-lex.l"
--_REG.regno = REG_SYSCFG; return REG;
-- YY_BREAK
--case 21:
--YY_RULE_SETUP
--#line 65 "bfin-lex.l"
--return STI;
-- YY_BREAK
--case 22:
--YY_RULE_SETUP
--#line 66 "bfin-lex.l"
--return SSYNC;
-- YY_BREAK
--case 23:
--YY_RULE_SETUP
--#line 67 "bfin-lex.l"
--_REG.regno = REG_SP; _REG.flags = F_REG_LOW; return HALF_REG;
-- YY_BREAK
--case 24:
--YY_RULE_SETUP
--#line 68 "bfin-lex.l"
--_REG.regno = REG_SP; _REG.flags = F_REG_HIGH; return HALF_REG;
-- YY_BREAK
--case 25:
--YY_RULE_SETUP
--#line 69 "bfin-lex.l"
--_REG.regno = REG_SP; return REG;
-- YY_BREAK
--case 26:
--YY_RULE_SETUP
--#line 70 "bfin-lex.l"
--return SIGNBITS;
-- YY_BREAK
--case 27:
--YY_RULE_SETUP
--#line 71 "bfin-lex.l"
--return SIGN;
-- YY_BREAK
--case 28:
--YY_RULE_SETUP
--#line 72 "bfin-lex.l"
--_REG.regno = REG_SEQSTAT; return REG;
-- YY_BREAK
--case 29:
--YY_RULE_SETUP
--#line 73 "bfin-lex.l"
--return SEARCH;
-- YY_BREAK
--case 30:
--YY_RULE_SETUP
--#line 74 "bfin-lex.l"
--return SHIFT;
-- YY_BREAK
--case 31:
--YY_RULE_SETUP
--#line 75 "bfin-lex.l"
--return SCO;
-- YY_BREAK
--case 32:
--YY_RULE_SETUP
--#line 77 "bfin-lex.l"
--return SAA;
-- YY_BREAK
--case 33:
--YY_RULE_SETUP
--#line 78 "bfin-lex.l"
--yylval.value = M_S2RND; return MMOD;
-- YY_BREAK
--case 34:
--YY_RULE_SETUP
--#line 79 "bfin-lex.l"
--return RTX;
-- YY_BREAK
--case 35:
--YY_RULE_SETUP
--#line 80 "bfin-lex.l"
--return RTS;
-- YY_BREAK
--case 36:
--YY_RULE_SETUP
--#line 81 "bfin-lex.l"
--return RTN;
-- YY_BREAK
--case 37:
--YY_RULE_SETUP
--#line 82 "bfin-lex.l"
--return RTI;
-- YY_BREAK
--case 38:
--YY_RULE_SETUP
--#line 83 "bfin-lex.l"
--return RTE;
-- YY_BREAK
--case 39:
--YY_RULE_SETUP
--#line 84 "bfin-lex.l"
--return ROT;
-- YY_BREAK
--case 40:
--YY_RULE_SETUP
--#line 85 "bfin-lex.l"
--return RND20;
-- YY_BREAK
--case 41:
--YY_RULE_SETUP
--#line 86 "bfin-lex.l"
--return RND12;
-- YY_BREAK
--case 42:
--YY_RULE_SETUP
--#line 87 "bfin-lex.l"
--return RNDL;
-- YY_BREAK
--case 43:
--YY_RULE_SETUP
--#line 88 "bfin-lex.l"
--return RNDH;
-- YY_BREAK
--case 44:
--YY_RULE_SETUP
--#line 89 "bfin-lex.l"
--return RND;
-- YY_BREAK
--case 45:
--YY_RULE_SETUP
--#line 91 "bfin-lex.l"
--return parse_halfreg(&yylval.reg, T_REG_R, yytext);
-- YY_BREAK
--case 46:
--YY_RULE_SETUP
--#line 93 "bfin-lex.l"
--_REG.regno = REG_RETS; return REG;
-- YY_BREAK
--case 47:
--YY_RULE_SETUP
--#line 94 "bfin-lex.l"
--_REG.regno = REG_RETI; return REG;
-- YY_BREAK
--case 48:
--YY_RULE_SETUP
--#line 95 "bfin-lex.l"
--_REG.regno = REG_RETX; return REG;
-- YY_BREAK
--case 49:
--YY_RULE_SETUP
--#line 96 "bfin-lex.l"
--_REG.regno = REG_RETN; return REG;
-- YY_BREAK
--case 50:
--YY_RULE_SETUP
--#line 97 "bfin-lex.l"
--_REG.regno = REG_RETE; return REG;
-- YY_BREAK
--case 51:
--YY_RULE_SETUP
--#line 98 "bfin-lex.l"
--_REG.regno = REG_EMUDAT; return REG;
-- YY_BREAK
--case 52:
--YY_RULE_SETUP
--#line 99 "bfin-lex.l"
--return RAISE;
-- YY_BREAK
--case 53:
--YY_RULE_SETUP
--#line 101 "bfin-lex.l"
--return parse_reg (&yylval.reg, T_REG_R, yytext);
-- YY_BREAK
--case 54:
--YY_RULE_SETUP
--#line 103 "bfin-lex.l"
--return R;
-- YY_BREAK
--case 55:
--YY_RULE_SETUP
--#line 104 "bfin-lex.l"
--return PRNT;
-- YY_BREAK
--case 56:
--YY_RULE_SETUP
--#line 105 "bfin-lex.l"
--return PC;
-- YY_BREAK
--case 57:
--YY_RULE_SETUP
--#line 106 "bfin-lex.l"
--return PACK;
-- YY_BREAK
--case 58:
--YY_RULE_SETUP
--#line 108 "bfin-lex.l"
--return parse_halfreg (&yylval.reg, T_REG_P, yytext);
-- YY_BREAK
--case 59:
--YY_RULE_SETUP
--#line 109 "bfin-lex.l"
--return parse_reg (&yylval.reg, T_REG_P, yytext);
-- YY_BREAK
--case 60:
--YY_RULE_SETUP
--#line 111 "bfin-lex.l"
--return OUTC;
-- YY_BREAK
--case 61:
--YY_RULE_SETUP
--#line 112 "bfin-lex.l"
--return ONES;
-- YY_BREAK
--case 62:
--YY_RULE_SETUP
--#line 114 "bfin-lex.l"
--return NOT;
-- YY_BREAK
--case 63:
--YY_RULE_SETUP
--#line 115 "bfin-lex.l"
--return NOP;
-- YY_BREAK
--case 64:
--YY_RULE_SETUP
--#line 116 "bfin-lex.l"
--return MNOP;
-- YY_BREAK
--case 65:
--YY_RULE_SETUP
--#line 117 "bfin-lex.l"
--return NS;
-- YY_BREAK
--case 66:
--YY_RULE_SETUP
--#line 120 "bfin-lex.l"
--return MIN;
-- YY_BREAK
--case 67:
--YY_RULE_SETUP
--#line 121 "bfin-lex.l"
--return MAX;
-- YY_BREAK
--case 68:
--YY_RULE_SETUP
--#line 123 "bfin-lex.l"
--return parse_halfreg (&yylval.reg, T_REG_M, yytext);
-- YY_BREAK
--case 69:
--YY_RULE_SETUP
--#line 124 "bfin-lex.l"
--return parse_reg (&yylval.reg, T_REG_M, yytext);
-- YY_BREAK
--case 70:
--YY_RULE_SETUP
--#line 126 "bfin-lex.l"
--return M;
-- YY_BREAK
--case 71:
--YY_RULE_SETUP
--#line 127 "bfin-lex.l"
--return LT;
-- YY_BREAK
--case 72:
--YY_RULE_SETUP
--#line 128 "bfin-lex.l"
--return LSHIFT;
-- YY_BREAK
--case 73:
--YY_RULE_SETUP
--#line 129 "bfin-lex.l"
--return LSETUP;
-- YY_BREAK
--case 74:
--YY_RULE_SETUP
--#line 130 "bfin-lex.l"
--return LOOP;
-- YY_BREAK
--case 75:
--YY_RULE_SETUP
--#line 131 "bfin-lex.l"
--return LOOP_BEGIN;
-- YY_BREAK
--case 76:
--YY_RULE_SETUP
--#line 132 "bfin-lex.l"
--return LOOP_END;
-- YY_BREAK
--case 77:
--YY_RULE_SETUP
--#line 134 "bfin-lex.l"
--return LE;
-- YY_BREAK
--case 78:
--YY_RULE_SETUP
--#line 135 "bfin-lex.l"
--_REG.regno = REG_LC0; return REG;
-- YY_BREAK
--case 79:
--YY_RULE_SETUP
--#line 136 "bfin-lex.l"
--_REG.regno = REG_LT0; return REG;
-- YY_BREAK
--case 80:
--YY_RULE_SETUP
--#line 137 "bfin-lex.l"
--_REG.regno = REG_LB0; return REG;
-- YY_BREAK
--case 81:
--YY_RULE_SETUP
--#line 138 "bfin-lex.l"
--_REG.regno = REG_LC1; return REG;
-- YY_BREAK
--case 82:
--YY_RULE_SETUP
--#line 139 "bfin-lex.l"
--_REG.regno = REG_LT1; return REG;
-- YY_BREAK
--case 83:
--YY_RULE_SETUP
--#line 140 "bfin-lex.l"
--_REG.regno = REG_LB1; return REG;
-- YY_BREAK
--case 84:
--YY_RULE_SETUP
--#line 142 "bfin-lex.l"
--return parse_halfreg (&yylval.reg, T_REG_L, yytext);
-- YY_BREAK
--case 85:
--YY_RULE_SETUP
--#line 143 "bfin-lex.l"
--return parse_reg (&yylval.reg, T_REG_L, yytext);
-- YY_BREAK
--case 86:
--YY_RULE_SETUP
--#line 144 "bfin-lex.l"
--return LO;
-- YY_BREAK
--case 87:
--YY_RULE_SETUP
--#line 145 "bfin-lex.l"
--{ BEGIN 0; return JUMP_DOT_S;}
-- YY_BREAK
--case 88:
--YY_RULE_SETUP
--#line 146 "bfin-lex.l"
--{ BEGIN 0; return JUMP_DOT_L;}
-- YY_BREAK
--case 89:
--YY_RULE_SETUP
--#line 147 "bfin-lex.l"
--{ BEGIN 0; return JUMP;}
-- YY_BREAK
--case 90:
--YY_RULE_SETUP
--#line 148 "bfin-lex.l"
--{ BEGIN 0; return JUMP_DOT_L; }
-- YY_BREAK
--case 91:
--YY_RULE_SETUP
--#line 149 "bfin-lex.l"
--yylval.value = M_IU; return MMOD;
-- YY_BREAK
--case 92:
--YY_RULE_SETUP
--#line 150 "bfin-lex.l"
--yylval.value = M_ISS2; return MMOD;
-- YY_BREAK
--case 93:
--YY_RULE_SETUP
--#line 151 "bfin-lex.l"
--yylval.value = M_IS; return MMOD;
-- YY_BREAK
--case 94:
--YY_RULE_SETUP
--#line 152 "bfin-lex.l"
--yylval.value = M_IH; return MMOD;
-- YY_BREAK
--case 95:
--YY_RULE_SETUP
--#line 153 "bfin-lex.l"
--return IF;
-- YY_BREAK
--case 96:
--YY_RULE_SETUP
--#line 154 "bfin-lex.l"
--return parse_halfreg (&yylval.reg, T_REG_I, yytext);
-- YY_BREAK
--case 97:
--YY_RULE_SETUP
--#line 155 "bfin-lex.l"
--return parse_reg (&yylval.reg, T_REG_I, yytext);
-- YY_BREAK
--case 98:
--YY_RULE_SETUP
--#line 156 "bfin-lex.l"
--return HLT;
-- YY_BREAK
--case 99:
--YY_RULE_SETUP
--#line 157 "bfin-lex.l"
--return HI;
-- YY_BREAK
--case 100:
--YY_RULE_SETUP
--#line 158 "bfin-lex.l"
--return GT;
-- YY_BREAK
--case 101:
--YY_RULE_SETUP
--#line 159 "bfin-lex.l"
--return GE;
-- YY_BREAK
--case 102:
--YY_RULE_SETUP
--#line 160 "bfin-lex.l"
--yylval.value = M_FU; return MMOD;
-- YY_BREAK
--case 103:
--YY_RULE_SETUP
--#line 161 "bfin-lex.l"
--_REG.regno = REG_FP; return REG;
-- YY_BREAK
--case 104:
--YY_RULE_SETUP
--#line 162 "bfin-lex.l"
--_REG.regno = REG_FP; _REG.flags = F_REG_LOW; return HALF_REG;
-- YY_BREAK
--case 105:
--YY_RULE_SETUP
--#line 163 "bfin-lex.l"
--_REG.regno = REG_FP; _REG.flags = F_REG_HIGH; return HALF_REG;
-- YY_BREAK
--case 106:
--YY_RULE_SETUP
--#line 165 "bfin-lex.l"
--return EXTRACT;
-- YY_BREAK
--case 107:
--YY_RULE_SETUP
--#line 166 "bfin-lex.l"
--return EXPADJ;
-- YY_BREAK
--case 108:
--YY_RULE_SETUP
--#line 167 "bfin-lex.l"
--return EXCPT;
-- YY_BREAK
--case 109:
--YY_RULE_SETUP
--#line 168 "bfin-lex.l"
--return EMUEXCPT;
-- YY_BREAK
--case 110:
--YY_RULE_SETUP
--#line 169 "bfin-lex.l"
--return DIVS;
-- YY_BREAK
--case 111:
--YY_RULE_SETUP
--#line 170 "bfin-lex.l"
--return DIVQ;
-- YY_BREAK
--case 112:
--YY_RULE_SETUP
--#line 171 "bfin-lex.l"
--return DISALGNEXCPT;
-- YY_BREAK
--case 113:
--YY_RULE_SETUP
--#line 172 "bfin-lex.l"
--return DEPOSIT;
-- YY_BREAK
--case 114:
--YY_RULE_SETUP
--#line 173 "bfin-lex.l"
--return DBGHALT;
-- YY_BREAK
--case 115:
--YY_RULE_SETUP
--#line 174 "bfin-lex.l"
--return DBGCMPLX;
-- YY_BREAK
--case 116:
--YY_RULE_SETUP
--#line 175 "bfin-lex.l"
--return DBGAL;
-- YY_BREAK
--case 117:
--YY_RULE_SETUP
--#line 176 "bfin-lex.l"
--return DBGAH;
-- YY_BREAK
--case 118:
--YY_RULE_SETUP
--#line 177 "bfin-lex.l"
--return DBGA;
-- YY_BREAK
--case 119:
--YY_RULE_SETUP
--#line 178 "bfin-lex.l"
--return DBG;
-- YY_BREAK
--case 120:
--YY_RULE_SETUP
--#line 179 "bfin-lex.l"
--{ _REG.regno = REG_CYCLES2; return REG; }
-- YY_BREAK
--case 121:
--YY_RULE_SETUP
--#line 180 "bfin-lex.l"
--{ _REG.regno = REG_CYCLES; return REG; }
-- YY_BREAK
--case 122:
--YY_RULE_SETUP
--#line 181 "bfin-lex.l"
--return CSYNC;
-- YY_BREAK
--case 123:
--YY_RULE_SETUP
--#line 182 "bfin-lex.l"
--return CO;
-- YY_BREAK
--case 124:
--YY_RULE_SETUP
--#line 183 "bfin-lex.l"
--return CLI;
-- YY_BREAK
--case 125:
--YY_RULE_SETUP
--#line 185 "bfin-lex.l"
--_REG.regno = REG_CC; return CCREG;
-- YY_BREAK
--case 126:
--YY_RULE_SETUP
--#line 186 "bfin-lex.l"
--{ BEGIN 0; return CALL;}
-- YY_BREAK
--case 127:
--YY_RULE_SETUP
--#line 187 "bfin-lex.l"
--{ BEGIN 0; return CALL;}
-- YY_BREAK
--case 128:
--YY_RULE_SETUP
--#line 188 "bfin-lex.l"
--return BYTEUNPACK;
-- YY_BREAK
--case 129:
--YY_RULE_SETUP
--#line 189 "bfin-lex.l"
--return BYTEPACK;
-- YY_BREAK
--case 130:
--YY_RULE_SETUP
--#line 190 "bfin-lex.l"
--return BYTEOP16M;
-- YY_BREAK
--case 131:
--YY_RULE_SETUP
--#line 191 "bfin-lex.l"
--return BYTEOP16P;
-- YY_BREAK
--case 132:
--YY_RULE_SETUP
--#line 192 "bfin-lex.l"
--return BYTEOP3P;
-- YY_BREAK
--case 133:
--YY_RULE_SETUP
--#line 193 "bfin-lex.l"
--return BYTEOP2P;
-- YY_BREAK
--case 134:
--YY_RULE_SETUP
--#line 194 "bfin-lex.l"
--return BYTEOP1P;
-- YY_BREAK
--case 135:
--YY_RULE_SETUP
--#line 195 "bfin-lex.l"
--return BY;
-- YY_BREAK
--case 136:
--YY_RULE_SETUP
--#line 196 "bfin-lex.l"
--return BXORSHIFT;
-- YY_BREAK
--case 137:
--YY_RULE_SETUP
--#line 197 "bfin-lex.l"
--return BXOR;
-- YY_BREAK
--case 138:
--YY_RULE_SETUP
--#line 199 "bfin-lex.l"
--return BREV;
-- YY_BREAK
--case 139:
--YY_RULE_SETUP
--#line 200 "bfin-lex.l"
--return BP;
-- YY_BREAK
--case 140:
--YY_RULE_SETUP
--#line 201 "bfin-lex.l"
--return BITTST;
-- YY_BREAK
--case 141:
--YY_RULE_SETUP
--#line 202 "bfin-lex.l"
--return BITTGL;
-- YY_BREAK
--case 142:
--YY_RULE_SETUP
--#line 203 "bfin-lex.l"
--return BITSET;
-- YY_BREAK
--case 143:
--YY_RULE_SETUP
--#line 204 "bfin-lex.l"
--return BITMUX;
-- YY_BREAK
--case 144:
--YY_RULE_SETUP
--#line 205 "bfin-lex.l"
--return BITCLR;
-- YY_BREAK
--case 145:
--YY_RULE_SETUP
--#line 206 "bfin-lex.l"
--return parse_halfreg (&yylval.reg, T_REG_B, yytext);
-- YY_BREAK
--case 146:
--YY_RULE_SETUP
--#line 207 "bfin-lex.l"
--return parse_reg (&yylval.reg, T_REG_B, yytext);
-- YY_BREAK
--case 147:
--YY_RULE_SETUP
--#line 208 "bfin-lex.l"
--return B;
-- YY_BREAK
--case 148:
--YY_RULE_SETUP
--#line 209 "bfin-lex.l"
--_REG.regno = S_AZ; return STATUS_REG;
-- YY_BREAK
--case 149:
--YY_RULE_SETUP
--#line 210 "bfin-lex.l"
--_REG.regno = S_AN; return STATUS_REG;
-- YY_BREAK
--case 150:
--YY_RULE_SETUP
--#line 211 "bfin-lex.l"
--_REG.regno = S_AC0_COPY; return STATUS_REG;
-- YY_BREAK
--case 151:
--YY_RULE_SETUP
--#line 212 "bfin-lex.l"
--_REG.regno = S_V_COPY; return STATUS_REG;
-- YY_BREAK
--case 152:
--YY_RULE_SETUP
--#line 213 "bfin-lex.l"
--_REG.regno = S_AQ; return STATUS_REG;
-- YY_BREAK
--case 153:
--YY_RULE_SETUP
--#line 214 "bfin-lex.l"
--_REG.regno = S_AC0; return STATUS_REG;
-- YY_BREAK
--case 154:
--YY_RULE_SETUP
--#line 215 "bfin-lex.l"
--_REG.regno = S_AC1; return STATUS_REG;
-- YY_BREAK
--case 155:
--YY_RULE_SETUP
--#line 216 "bfin-lex.l"
--_REG.regno = S_AV0; return STATUS_REG;
-- YY_BREAK
--case 156:
--YY_RULE_SETUP
--#line 217 "bfin-lex.l"
--_REG.regno = S_AV0S; return STATUS_REG;
-- YY_BREAK
--case 157:
--YY_RULE_SETUP
--#line 218 "bfin-lex.l"
--_REG.regno = S_AV1; return STATUS_REG;
-- YY_BREAK
--case 158:
--YY_RULE_SETUP
--#line 219 "bfin-lex.l"
--_REG.regno = S_AV1S; return STATUS_REG;
-- YY_BREAK
--case 159:
--YY_RULE_SETUP
--#line 220 "bfin-lex.l"
--_REG.regno = S_VS; return STATUS_REG;
-- YY_BREAK
--case 160:
--YY_RULE_SETUP
--#line 221 "bfin-lex.l"
--_REG.regno = S_RND_MOD; return STATUS_REG;
-- YY_BREAK
--case 161:
--YY_RULE_SETUP
--#line 224 "bfin-lex.l"
--_REG.regno = REG_ASTAT; return REG;
-- YY_BREAK
--case 162:
--YY_RULE_SETUP
--#line 225 "bfin-lex.l"
--return ASHIFT;
-- YY_BREAK
--case 163:
--YY_RULE_SETUP
--#line 226 "bfin-lex.l"
--return ASL;
-- YY_BREAK
--case 164:
--YY_RULE_SETUP
--#line 227 "bfin-lex.l"
--return ASR;
-- YY_BREAK
--case 165:
--YY_RULE_SETUP
--#line 228 "bfin-lex.l"
--return ALIGN8;
-- YY_BREAK
--case 166:
--YY_RULE_SETUP
--#line 229 "bfin-lex.l"
--return ALIGN16;
-- YY_BREAK
--case 167:
--YY_RULE_SETUP
--#line 230 "bfin-lex.l"
--return ALIGN24;
-- YY_BREAK
--case 168:
--YY_RULE_SETUP
--#line 231 "bfin-lex.l"
--return A_ONE_DOT_L;
-- YY_BREAK
--case 169:
--YY_RULE_SETUP
--#line 232 "bfin-lex.l"
--return A_ZERO_DOT_L;
-- YY_BREAK
--case 170:
--YY_RULE_SETUP
--#line 233 "bfin-lex.l"
--return A_ONE_DOT_H;
-- YY_BREAK
--case 171:
--YY_RULE_SETUP
--#line 234 "bfin-lex.l"
--return A_ZERO_DOT_H;
-- YY_BREAK
--case 172:
--YY_RULE_SETUP
--#line 235 "bfin-lex.l"
--return ABS;
-- YY_BREAK
--case 173:
--YY_RULE_SETUP
--#line 236 "bfin-lex.l"
--return ABORT;
-- YY_BREAK
--case 174:
--YY_RULE_SETUP
--#line 237 "bfin-lex.l"
--_REG.regno = REG_A1x; return REG;
-- YY_BREAK
--case 175:
--YY_RULE_SETUP
--#line 238 "bfin-lex.l"
--_REG.regno = REG_A1w; return REG;
-- YY_BREAK
--case 176:
--YY_RULE_SETUP
--#line 239 "bfin-lex.l"
--_REG.regno = REG_A1; return REG_A_DOUBLE_ONE;
-- YY_BREAK
--case 177:
--YY_RULE_SETUP
--#line 240 "bfin-lex.l"
--_REG.regno = REG_A0x; return REG;
-- YY_BREAK
--case 178:
--YY_RULE_SETUP
--#line 241 "bfin-lex.l"
--_REG.regno = REG_A0w; return REG;
-- YY_BREAK
--case 179:
--YY_RULE_SETUP
--#line 242 "bfin-lex.l"
--_REG.regno = REG_A0; return REG_A_DOUBLE_ZERO;
-- YY_BREAK
--case 180:
--YY_RULE_SETUP
--#line 243 "bfin-lex.l"
--return GOT;
-- YY_BREAK
--case 181:
--YY_RULE_SETUP
--#line 244 "bfin-lex.l"
--return GOT17M4;
-- YY_BREAK
--case 182:
--YY_RULE_SETUP
--#line 245 "bfin-lex.l"
--return FUNCDESC_GOT17M4;
-- YY_BREAK
--case 183:
--YY_RULE_SETUP
--#line 246 "bfin-lex.l"
--return PLTPC;
-- YY_BREAK
--case 184:
--YY_RULE_SETUP
--#line 249 "bfin-lex.l"
--return TILDA;
-- YY_BREAK
--case 185:
--YY_RULE_SETUP
--#line 250 "bfin-lex.l"
--return _BAR_ASSIGN;
-- YY_BREAK
--case 186:
--YY_RULE_SETUP
--#line 251 "bfin-lex.l"
--return BAR;
-- YY_BREAK
--case 187:
--YY_RULE_SETUP
--#line 252 "bfin-lex.l"
--return _CARET_ASSIGN;
-- YY_BREAK
--case 188:
--YY_RULE_SETUP
--#line 253 "bfin-lex.l"
--return CARET;
-- YY_BREAK
--case 189:
--YY_RULE_SETUP
--#line 254 "bfin-lex.l"
--return RBRACK;
-- YY_BREAK
--case 190:
--YY_RULE_SETUP
--#line 255 "bfin-lex.l"
--return LBRACK;
-- YY_BREAK
--case 191:
--YY_RULE_SETUP
--#line 256 "bfin-lex.l"
--return _GREATER_GREATER_GREATER_THAN_ASSIGN;
-- YY_BREAK
--case 192:
--YY_RULE_SETUP
--#line 257 "bfin-lex.l"
--return _GREATER_GREATER_ASSIGN;
-- YY_BREAK
--case 193:
--YY_RULE_SETUP
--#line 258 "bfin-lex.l"
--return _GREATER_GREATER_GREATER;
-- YY_BREAK
--case 194:
--YY_RULE_SETUP
--#line 259 "bfin-lex.l"
--return GREATER_GREATER;
-- YY_BREAK
--case 195:
--YY_RULE_SETUP
--#line 260 "bfin-lex.l"
--return _ASSIGN_ASSIGN;
-- YY_BREAK
--case 196:
--YY_RULE_SETUP
--#line 261 "bfin-lex.l"
--return ASSIGN;
-- YY_BREAK
--case 197:
--YY_RULE_SETUP
--#line 262 "bfin-lex.l"
--return _LESS_THAN_ASSIGN;
-- YY_BREAK
--case 198:
--YY_RULE_SETUP
--#line 263 "bfin-lex.l"
--return _LESS_LESS_ASSIGN;
-- YY_BREAK
--case 199:
--YY_RULE_SETUP
--#line 264 "bfin-lex.l"
--return LESS_LESS;
-- YY_BREAK
--case 200:
--YY_RULE_SETUP
--#line 265 "bfin-lex.l"
--return LESS_THAN;
-- YY_BREAK
--case 201:
--YY_RULE_SETUP
--#line 266 "bfin-lex.l"
--BEGIN(FLAGS); return LPAREN;
-- YY_BREAK
--case 202:
--YY_RULE_SETUP
--#line 267 "bfin-lex.l"
--BEGIN(INITIAL); return RPAREN;
-- YY_BREAK
--case 203:
--YY_RULE_SETUP
--#line 268 "bfin-lex.l"
--return COLON;
-- YY_BREAK
--case 204:
--YY_RULE_SETUP
--#line 269 "bfin-lex.l"
--return SLASH;
-- YY_BREAK
--case 205:
--YY_RULE_SETUP
--#line 270 "bfin-lex.l"
--return _MINUS_ASSIGN;
-- YY_BREAK
--case 206:
--YY_RULE_SETUP
--#line 271 "bfin-lex.l"
--return _PLUS_BAR_PLUS;
-- YY_BREAK
--case 207:
--YY_RULE_SETUP
--#line 272 "bfin-lex.l"
--return _MINUS_BAR_PLUS;
-- YY_BREAK
--case 208:
--YY_RULE_SETUP
--#line 273 "bfin-lex.l"
--return _PLUS_BAR_MINUS;
-- YY_BREAK
--case 209:
--YY_RULE_SETUP
--#line 274 "bfin-lex.l"
--return _MINUS_BAR_MINUS;
-- YY_BREAK
--case 210:
--YY_RULE_SETUP
--#line 275 "bfin-lex.l"
--return _MINUS_MINUS;
-- YY_BREAK
--case 211:
--YY_RULE_SETUP
--#line 276 "bfin-lex.l"
--return MINUS;
-- YY_BREAK
--case 212:
--YY_RULE_SETUP
--#line 277 "bfin-lex.l"
--return COMMA;
-- YY_BREAK
--case 213:
--YY_RULE_SETUP
--#line 278 "bfin-lex.l"
--return _PLUS_ASSIGN;
-- YY_BREAK
--case 214:
--YY_RULE_SETUP
--#line 279 "bfin-lex.l"
--return _PLUS_PLUS;
-- YY_BREAK
--case 215:
--YY_RULE_SETUP
--#line 280 "bfin-lex.l"
--return PLUS;
-- YY_BREAK
--case 216:
--YY_RULE_SETUP
--#line 281 "bfin-lex.l"
--return _STAR_ASSIGN;
-- YY_BREAK
--case 217:
--YY_RULE_SETUP
--#line 282 "bfin-lex.l"
--return STAR;
-- YY_BREAK
--case 218:
--YY_RULE_SETUP
--#line 283 "bfin-lex.l"
--return _AMPERSAND_ASSIGN;
-- YY_BREAK
--case 219:
--YY_RULE_SETUP
--#line 284 "bfin-lex.l"
--return AMPERSAND;
-- YY_BREAK
--case 220:
--YY_RULE_SETUP
--#line 285 "bfin-lex.l"
--return PERCENT;
-- YY_BREAK
--case 221:
--YY_RULE_SETUP
--#line 286 "bfin-lex.l"
--return BANG;
-- YY_BREAK
--case 222:
--YY_RULE_SETUP
--#line 287 "bfin-lex.l"
--return SEMICOLON;
-- YY_BREAK
--case 223:
--YY_RULE_SETUP
--#line 288 "bfin-lex.l"
--return _ASSIGN_BANG;
-- YY_BREAK
--case 224:
--YY_RULE_SETUP
--#line 289 "bfin-lex.l"
--return DOUBLE_BAR;
-- YY_BREAK
--case 225:
--YY_RULE_SETUP
--#line 290 "bfin-lex.l"
--return AT;
-- YY_BREAK
--case 226:
--YY_RULE_SETUP
--#line 291 "bfin-lex.l"
--return PREFETCH;
-- YY_BREAK
--case 227:
--YY_RULE_SETUP
--#line 292 "bfin-lex.l"
--return UNLINK;
-- YY_BREAK
--case 228:
--YY_RULE_SETUP
--#line 293 "bfin-lex.l"
--return LINK;
-- YY_BREAK
--case 229:
--YY_RULE_SETUP
--#line 294 "bfin-lex.l"
--return IDLE;
-- YY_BREAK
--case 230:
--YY_RULE_SETUP
--#line 295 "bfin-lex.l"
--return IFLUSH;
-- YY_BREAK
--case 231:
--YY_RULE_SETUP
--#line 296 "bfin-lex.l"
--return FLUSHINV;
-- YY_BREAK
--case 232:
--YY_RULE_SETUP
--#line 297 "bfin-lex.l"
--return FLUSH;
-- YY_BREAK
--case 233:
--YY_RULE_SETUP
--#line 298 "bfin-lex.l"
--{
-- yylval.value = parse_int (&yytext);
-- return NUMBER;
-- }
-- YY_BREAK
--case 234:
--YY_RULE_SETUP
--#line 302 "bfin-lex.l"
--{
-- yylval.symbol = symbol_find_or_make (yytext);
-- symbol_mark_used (yylval.symbol);
-- return SYMBOL;
-- }
-- YY_BREAK
--case 235:
--YY_RULE_SETUP
--#line 307 "bfin-lex.l"
--{
-- char *name;
-- char *ref = strdup (yytext);
-- if (ref[1] == 'b' || ref[1] == 'B')
-- {
-- name = fb_label_name ((int) (ref[0] - '0'), 0);
-- yylval.symbol = symbol_find (name);
--
-- if ((yylval.symbol != NULL)
-- && (S_IS_DEFINED (yylval.symbol)))
-- return SYMBOL;
-- as_bad ("backward reference to unknown label %d:",
-- (int) (ref[0] - '0'));
-- }
-- else if (ref[1] == 'f' || ref[1] == 'F')
-- {
-- /* Forward reference. Expect symbol to be undefined or
-- unknown. undefined: seen it before. unknown: never seen
-- it before.
--
-- Construct a local label name, then an undefined symbol.
-- Just return it as never seen before. */
--
-- name = fb_label_name ((int) (ref[0] - '0'), 1);
-- yylval.symbol = symbol_find_or_make (name);
-- /* We have no need to check symbol properties. */
-- return SYMBOL;
-- }
-- }
-- YY_BREAK
--case 236:
--/* rule 236 can match eol */
--YY_RULE_SETUP
--#line 336 "bfin-lex.l"
--;
-- YY_BREAK
--case 237:
--YY_RULE_SETUP
--#line 337 "bfin-lex.l"
--;
-- YY_BREAK
--case 238:
--YY_RULE_SETUP
--#line 338 "bfin-lex.l"
--return yytext[0];
-- YY_BREAK
--case 239:
--YY_RULE_SETUP
--#line 339 "bfin-lex.l"
--ECHO;
-- YY_BREAK
--#line 2341 "bfin-lex.c"
--case YY_STATE_EOF(INITIAL):
--case YY_STATE_EOF(KEYWORD):
--case YY_STATE_EOF(FLAGS):
-- yyterminate();
--
-- case YY_END_OF_BUFFER:
-- {
-- /* Amount of text matched not including the EOB char. */
-- int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1;
--
-- /* Undo the effects of YY_DO_BEFORE_ACTION. */
-- *yy_cp = (yy_hold_char);
-- YY_RESTORE_YY_MORE_OFFSET
--
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW )
-- {
-- /* We're scanning a new file or input source. It's
-- * possible that this happened because the user
-- * just pointed yyin at a new source and called
-- * yylex(). If so, then we have to assure
-- * consistency between YY_CURRENT_BUFFER and our
-- * globals. Here is the right place to do so, because
-- * this is the first action (other than possibly a
-- * back-up) that will match for the new input source.
-- */
-- (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
-- YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin;
-- YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL;
-- }
--
-- /* Note that here we test for yy_c_buf_p "<=" to the position
-- * of the first EOB in the buffer, since yy_c_buf_p will
-- * already have been incremented past the NUL character
-- * (since all states make transitions on EOB to the
-- * end-of-buffer state). Contrast this with the test
-- * in input().
-- */
-- if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
-- { /* This was really a NUL. */
-- yy_state_type yy_next_state;
--
-- (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text;
--
-- yy_current_state = yy_get_previous_state( );
--
-- /* Okay, we're now positioned to make the NUL
-- * transition. We couldn't have
-- * yy_get_previous_state() go ahead and do it
-- * for us because it doesn't know how to deal
-- * with the possibility of jamming (and we don't
-- * want to build jamming into it because then it
-- * will run more slowly).
-- */
--
-- yy_next_state = yy_try_NUL_trans( yy_current_state );
--
-- yy_bp = (yytext_ptr) + YY_MORE_ADJ;
--
-- if ( yy_next_state )
-- {
-- /* Consume the NUL. */
-- yy_cp = ++(yy_c_buf_p);
-- yy_current_state = yy_next_state;
-- goto yy_match;
-- }
--
-- else
-- {
-- yy_cp = (yy_c_buf_p);
-- goto yy_find_action;
-- }
-- }
--
-- else switch ( yy_get_next_buffer( ) )
-- {
-- case EOB_ACT_END_OF_FILE:
-- {
-- (yy_did_buffer_switch_on_eof) = 0;
--
-- if ( yywrap( ) )
-- {
-- /* Note: because we've taken care in
-- * yy_get_next_buffer() to have set up
-- * yytext, we can now set up
-- * yy_c_buf_p so that if some total
-- * hoser (like flex itself) wants to
-- * call the scanner after we return the
-- * YY_NULL, it'll still work - another
-- * YY_NULL will get returned.
-- */
-- (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ;
--
-- yy_act = YY_STATE_EOF(YY_START);
-- goto do_action;
-- }
--
-- else
-- {
-- if ( ! (yy_did_buffer_switch_on_eof) )
-- YY_NEW_FILE;
-- }
-- break;
-- }
--
-- case EOB_ACT_CONTINUE_SCAN:
-- (yy_c_buf_p) =
-- (yytext_ptr) + yy_amount_of_matched_text;
--
-- yy_current_state = yy_get_previous_state( );
--
-- yy_cp = (yy_c_buf_p);
-- yy_bp = (yytext_ptr) + YY_MORE_ADJ;
-- goto yy_match;
--
-- case EOB_ACT_LAST_MATCH:
-- (yy_c_buf_p) =
-- &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)];
--
-- yy_current_state = yy_get_previous_state( );
--
-- yy_cp = (yy_c_buf_p);
-- yy_bp = (yytext_ptr) + YY_MORE_ADJ;
-- goto yy_find_action;
-- }
-- break;
-- }
--
-- default:
-- YY_FATAL_ERROR(
-- "fatal flex scanner internal error--no action found" );
-- } /* end of action switch */
-- } /* end of scanning one token */
--} /* end of yylex */
--
--/* yy_get_next_buffer - try to read in a new buffer
-- *
-- * Returns a code representing an action:
-- * EOB_ACT_LAST_MATCH -
-- * EOB_ACT_CONTINUE_SCAN - continue scanning from current position
-- * EOB_ACT_END_OF_FILE - end of file
-- */
--static int yy_get_next_buffer (void)
--{
-- register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf;
-- register char *source = (yytext_ptr);
-- register int number_to_move, i;
-- int ret_val;
--
-- if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] )
-- YY_FATAL_ERROR(
-- "fatal flex scanner internal error--end of buffer missed" );
--
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 )
-- { /* Don't try to fill the buffer, so this is an EOF. */
-- if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 )
-- {
-- /* We matched a single character, the EOB, so
-- * treat this as a final EOF.
-- */
-- return EOB_ACT_END_OF_FILE;
-- }
--
-- else
-- {
-- /* We matched some text prior to the EOB, first
-- * process it.
-- */
-- return EOB_ACT_LAST_MATCH;
-- }
-- }
--
-- /* Try to read more data. */
--
-- /* First move last chars to start of buffer. */
-- number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1;
--
-- for ( i = 0; i < number_to_move; ++i )
-- *(dest++) = *(source++);
--
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING )
-- /* don't do the read, it's not guaranteed to return an EOF,
-- * just force an EOF
-- */
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0;
--
-- else
-- {
-- yy_size_t num_to_read =
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1;
--
-- while ( num_to_read <= 0 )
-- { /* Not enough room in the buffer - grow it. */
--
-- /* just a shorter name for the current buffer */
-- YY_BUFFER_STATE b = YY_CURRENT_BUFFER;
--
-- int yy_c_buf_p_offset =
-- (int) ((yy_c_buf_p) - b->yy_ch_buf);
--
-- if ( b->yy_is_our_buffer )
-- {
-- yy_size_t new_size = b->yy_buf_size * 2;
--
-- if ( new_size <= 0 )
-- b->yy_buf_size += b->yy_buf_size / 8;
-- else
-- b->yy_buf_size *= 2;
--
-- b->yy_ch_buf = (char *)
-- /* Include room in for 2 EOB chars. */
-- yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 );
-- }
-- else
-- /* Can't grow it, we don't own it. */
-- b->yy_ch_buf = 0;
--
-- if ( ! b->yy_ch_buf )
-- YY_FATAL_ERROR(
-- "fatal error - scanner input buffer overflow" );
--
-- (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset];
--
-- num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size -
-- number_to_move - 1;
--
-- }
--
-- if ( num_to_read > YY_READ_BUF_SIZE )
-- num_to_read = YY_READ_BUF_SIZE;
--
-- /* Read in more data. */
-- YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]),
-- (yy_n_chars), num_to_read );
--
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
-- }
--
-- if ( (yy_n_chars) == 0 )
-- {
-- if ( number_to_move == YY_MORE_ADJ )
-- {
-- ret_val = EOB_ACT_END_OF_FILE;
-- yyrestart(yyin );
-- }
--
-- else
-- {
-- ret_val = EOB_ACT_LAST_MATCH;
-- YY_CURRENT_BUFFER_LVALUE->yy_buffer_status =
-- YY_BUFFER_EOF_PENDING;
-- }
-- }
--
-- else
-- ret_val = EOB_ACT_CONTINUE_SCAN;
--
-- if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) {
-- /* Extend the array by 50%, plus the number we really need. */
-- yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1);
-- YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size );
-- if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" );
-- }
--
-- (yy_n_chars) += number_to_move;
-- YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR;
-- YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR;
--
-- (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0];
--
-- return ret_val;
--}
--
--/* yy_get_previous_state - get the state just before the EOB char was reached */
--
-- static yy_state_type yy_get_previous_state (void)
--{
-- register yy_state_type yy_current_state;
-- register char *yy_cp;
--
-- yy_current_state = (yy_start);
--
-- for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
-- {
-- register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1);
-- if ( yy_accept[yy_current_state] )
-- {
-- (yy_last_accepting_state) = yy_current_state;
-- (yy_last_accepting_cpos) = yy_cp;
-- }
-- while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
-- {
-- yy_current_state = (int) yy_def[yy_current_state];
-- if ( yy_current_state >= 571 )
-- yy_c = yy_meta[(unsigned int) yy_c];
-- }
-- yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-- }
--
-- return yy_current_state;
--}
--
--/* yy_try_NUL_trans - try to make a transition on the NUL character
-- *
-- * synopsis
-- * next_state = yy_try_NUL_trans( current_state );
-- */
-- static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state )
--{
-- register int yy_is_jam;
-- register char *yy_cp = (yy_c_buf_p);
--
-- register YY_CHAR yy_c = 1;
-- if ( yy_accept[yy_current_state] )
-- {
-- (yy_last_accepting_state) = yy_current_state;
-- (yy_last_accepting_cpos) = yy_cp;
-- }
-- while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
-- {
-- yy_current_state = (int) yy_def[yy_current_state];
-- if ( yy_current_state >= 571 )
-- yy_c = yy_meta[(unsigned int) yy_c];
-- }
-- yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-- yy_is_jam = (yy_current_state == 570);
--
-- return yy_is_jam ? 0 : yy_current_state;
--}
--
-- static void yyunput (int c, register char * yy_bp )
--{
-- register char *yy_cp;
--
-- yy_cp = (yy_c_buf_p);
--
-- /* undo effects of setting up yytext */
-- *yy_cp = (yy_hold_char);
--
-- if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 )
-- { /* need to shift things up to make room */
-- /* +2 for EOB chars. */
-- register yy_size_t number_to_move = (yy_n_chars) + 2;
-- register char *dest = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_size + 2];
-- register char *source =
-- &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move];
--
-- while ( source > YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
-- *--dest = *--source;
--
-- yy_cp += (int) (dest - source);
-- yy_bp += (int) (dest - source);
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars =
-- (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_buf_size;
--
-- if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 )
-- YY_FATAL_ERROR( "flex scanner push-back overflow" );
-- }
--
-- *--yy_cp = (char) c;
--
-- (yytext_ptr) = yy_bp;
-- (yy_hold_char) = *yy_cp;
-- (yy_c_buf_p) = yy_cp;
--}
--
--#ifndef YY_NO_INPUT
--#ifdef __cplusplus
-- static int yyinput (void)
--#else
-- static int input (void)
--#endif
--
--{
-- int c;
--
-- *(yy_c_buf_p) = (yy_hold_char);
--
-- if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
-- {
-- /* yy_c_buf_p now points to the character we want to return.
-- * If this occurs *before* the EOB characters, then it's a
-- * valid NUL; if not, then we've hit the end of the buffer.
-- */
-- if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
-- /* This was really a NUL. */
-- *(yy_c_buf_p) = '\0';
--
-- else
-- { /* need more input */
-- yy_size_t offset = (yy_c_buf_p) - (yytext_ptr);
-- ++(yy_c_buf_p);
--
-- switch ( yy_get_next_buffer( ) )
-- {
-- case EOB_ACT_LAST_MATCH:
-- /* This happens because yy_g_n_b()
-- * sees that we've accumulated a
-- * token and flags that we need to
-- * try matching the token before
-- * proceeding. But for input(),
-- * there's no matching to consider.
-- * So convert the EOB_ACT_LAST_MATCH
-- * to EOB_ACT_END_OF_FILE.
-- */
--
-- /* Reset buffer status. */
-- yyrestart(yyin );
--
-- /*FALLTHROUGH*/
--
-- case EOB_ACT_END_OF_FILE:
-- {
-- if ( yywrap( ) )
-- return 0;
--
-- if ( ! (yy_did_buffer_switch_on_eof) )
-- YY_NEW_FILE;
--#ifdef __cplusplus
-- return yyinput();
--#else
-- return input();
--#endif
-- }
--
-- case EOB_ACT_CONTINUE_SCAN:
-- (yy_c_buf_p) = (yytext_ptr) + offset;
-- break;
-- }
-- }
-- }
--
-- c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */
-- *(yy_c_buf_p) = '\0'; /* preserve yytext */
-- (yy_hold_char) = *++(yy_c_buf_p);
--
-- return c;
--}
--#endif /* ifndef YY_NO_INPUT */
--
--/** Immediately switch to a different input stream.
-- * @param input_file A readable stream.
-- *
-- * @note This function does not reset the start condition to @c INITIAL .
-- */
-- void yyrestart (FILE * input_file )
--{
--
-- if ( ! YY_CURRENT_BUFFER ){
-- yyensure_buffer_stack ();
-- YY_CURRENT_BUFFER_LVALUE =
-- yy_create_buffer(yyin,YY_BUF_SIZE );
-- }
--
-- yy_init_buffer(YY_CURRENT_BUFFER,input_file );
-- yy_load_buffer_state( );
--}
--
--/** Switch to a different input buffer.
-- * @param new_buffer The new input buffer.
-- *
-- */
-- void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer )
--{
--
-- /* TODO. We should be able to replace this entire function body
-- * with
-- * yypop_buffer_state();
-- * yypush_buffer_state(new_buffer);
-- */
-- yyensure_buffer_stack ();
-- if ( YY_CURRENT_BUFFER == new_buffer )
-- return;
--
-- if ( YY_CURRENT_BUFFER )
-- {
-- /* Flush out information for old buffer. */
-- *(yy_c_buf_p) = (yy_hold_char);
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
-- }
--
-- YY_CURRENT_BUFFER_LVALUE = new_buffer;
-- yy_load_buffer_state( );
--
-- /* We don't actually know whether we did this switch during
-- * EOF (yywrap()) processing, but the only time this flag
-- * is looked at is after yywrap() is called, so it's safe
-- * to go ahead and always set it.
-- */
-- (yy_did_buffer_switch_on_eof) = 1;
--}
--
--static void yy_load_buffer_state (void)
--{
-- (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
-- (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos;
-- yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file;
-- (yy_hold_char) = *(yy_c_buf_p);
--}
--
--/** Allocate and initialize an input buffer state.
-- * @param file A readable stream.
-- * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
-- *
-- * @return the allocated buffer state.
-- */
-- YY_BUFFER_STATE yy_create_buffer (FILE * file, int size )
--{
-- YY_BUFFER_STATE b;
--
-- b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) );
-- if ( ! b )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
--
-- b->yy_buf_size = size;
--
-- /* yy_ch_buf has to be 2 characters longer than the size given because
-- * we need to put in 2 end-of-buffer characters.
-- */
-- b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2 );
-- if ( ! b->yy_ch_buf )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
--
-- b->yy_is_our_buffer = 1;
--
-- yy_init_buffer(b,file );
--
-- return b;
--}
--
--/** Destroy the buffer.
-- * @param b a buffer created with yy_create_buffer()
-- *
-- */
-- void yy_delete_buffer (YY_BUFFER_STATE b )
--{
--
-- if ( ! b )
-- return;
--
-- if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */
-- YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0;
--
-- if ( b->yy_is_our_buffer )
-- yyfree((void *) b->yy_ch_buf );
--
-- yyfree((void *) b );
--}
--
--#ifndef __cplusplus
--extern int isatty (int );
--#endif /* __cplusplus */
--
--/* Initializes or reinitializes a buffer.
-- * This function is sometimes called more than once on the same buffer,
-- * such as during a yyrestart() or at EOF.
-- */
-- static void yy_init_buffer (YY_BUFFER_STATE b, FILE * file )
--
--{
-- int oerrno = errno;
--
-- yy_flush_buffer(b );
--
-- b->yy_input_file = file;
-- b->yy_fill_buffer = 1;
--
-- /* If b is the current buffer, then yy_init_buffer was _probably_
-- * called from yyrestart() or through yy_get_next_buffer.
-- * In that case, we don't want to reset the lineno or column.
-- */
-- if (b != YY_CURRENT_BUFFER){
-- b->yy_bs_lineno = 1;
-- b->yy_bs_column = 0;
-- }
--
-- b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0;
--
-- errno = oerrno;
--}
--
--/** Discard all buffered characters. On the next scan, YY_INPUT will be called.
-- * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
-- *
-- */
-- void yy_flush_buffer (YY_BUFFER_STATE b )
--{
-- if ( ! b )
-- return;
--
-- b->yy_n_chars = 0;
--
-- /* We always need two end-of-buffer characters. The first causes
-- * a transition to the end-of-buffer state. The second causes
-- * a jam in that state.
-- */
-- b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR;
-- b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR;
--
-- b->yy_buf_pos = &b->yy_ch_buf[0];
--
-- b->yy_at_bol = 1;
-- b->yy_buffer_status = YY_BUFFER_NEW;
--
-- if ( b == YY_CURRENT_BUFFER )
-- yy_load_buffer_state( );
--}
--
--/** Pushes the new state onto the stack. The new state becomes
-- * the current state. This function will allocate the stack
-- * if necessary.
-- * @param new_buffer The new state.
-- *
-- */
--void yypush_buffer_state (YY_BUFFER_STATE new_buffer )
--{
-- if (new_buffer == NULL)
-- return;
--
-- yyensure_buffer_stack();
--
-- /* This block is copied from yy_switch_to_buffer. */
-- if ( YY_CURRENT_BUFFER )
-- {
-- /* Flush out information for old buffer. */
-- *(yy_c_buf_p) = (yy_hold_char);
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
-- }
--
-- /* Only push if top exists. Otherwise, replace top. */
-- if (YY_CURRENT_BUFFER)
-- (yy_buffer_stack_top)++;
-- YY_CURRENT_BUFFER_LVALUE = new_buffer;
--
-- /* copied from yy_switch_to_buffer. */
-- yy_load_buffer_state( );
-- (yy_did_buffer_switch_on_eof) = 1;
--}
--
--/** Removes and deletes the top of the stack, if present.
-- * The next element becomes the new top.
-- *
-- */
--void yypop_buffer_state (void)
--{
-- if (!YY_CURRENT_BUFFER)
-- return;
--
-- yy_delete_buffer(YY_CURRENT_BUFFER );
-- YY_CURRENT_BUFFER_LVALUE = NULL;
-- if ((yy_buffer_stack_top) > 0)
-- --(yy_buffer_stack_top);
--
-- if (YY_CURRENT_BUFFER) {
-- yy_load_buffer_state( );
-- (yy_did_buffer_switch_on_eof) = 1;
-- }
--}
--
--/* Allocates the stack if it does not exist.
-- * Guarantees space for at least one push.
-- */
--static void yyensure_buffer_stack (void)
--{
-- yy_size_t num_to_alloc;
--
-- if (!(yy_buffer_stack)) {
--
-- /* First allocation is just for 2 elements, since we don't know if this
-- * scanner will even need a stack. We use 2 instead of 1 to avoid an
-- * immediate realloc on the next call.
-- */
-- num_to_alloc = 1;
-- (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc
-- (num_to_alloc * sizeof(struct yy_buffer_state*)
-- );
-- if ( ! (yy_buffer_stack) )
-- YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
--
-- memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
--
-- (yy_buffer_stack_max) = num_to_alloc;
-- (yy_buffer_stack_top) = 0;
-- return;
-- }
--
-- if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){
--
-- /* Increase the buffer to prepare for a possible push. */
-- int grow_size = 8 /* arbitrary grow size */;
--
-- num_to_alloc = (yy_buffer_stack_max) + grow_size;
-- (yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc
-- ((yy_buffer_stack),
-- num_to_alloc * sizeof(struct yy_buffer_state*)
-- );
-- if ( ! (yy_buffer_stack) )
-- YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
--
-- /* zero only the new slots.*/
-- memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*));
-- (yy_buffer_stack_max) = num_to_alloc;
-- }
--}
--
--/** Setup the input buffer state to scan directly from a user-specified character buffer.
-- * @param base the character buffer
-- * @param size the size in bytes of the character buffer
-- *
-- * @return the newly allocated buffer state object.
-- */
--YY_BUFFER_STATE yy_scan_buffer (char * base, yy_size_t size )
--{
-- YY_BUFFER_STATE b;
--
-- if ( size < 2 ||
-- base[size-2] != YY_END_OF_BUFFER_CHAR ||
-- base[size-1] != YY_END_OF_BUFFER_CHAR )
-- /* They forgot to leave room for the EOB's. */
-- return 0;
--
-- b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) );
-- if ( ! b )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" );
--
-- b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */
-- b->yy_buf_pos = b->yy_ch_buf = base;
-- b->yy_is_our_buffer = 0;
-- b->yy_input_file = 0;
-- b->yy_n_chars = b->yy_buf_size;
-- b->yy_is_interactive = 0;
-- b->yy_at_bol = 1;
-- b->yy_fill_buffer = 0;
-- b->yy_buffer_status = YY_BUFFER_NEW;
--
-- yy_switch_to_buffer(b );
--
-- return b;
--}
--
--/** Setup the input buffer state to scan a string. The next call to yylex() will
-- * scan from a @e copy of @a str.
-- * @param yystr a NUL-terminated string to scan
-- *
-- * @return the newly allocated buffer state object.
-- * @note If you want to scan bytes that may contain NUL values, then use
-- * yy_scan_bytes() instead.
-- */
--YY_BUFFER_STATE yy_scan_string (yyconst char * yystr )
--{
--
-- return yy_scan_bytes(yystr,strlen(yystr) );
--}
--
--/** Setup the input buffer state to scan the given bytes. The next call to yylex() will
-- * scan from a @e copy of @a bytes.
-- * @param bytes the byte buffer to scan
-- * @param len the number of bytes in the buffer pointed to by @a bytes.
-- *
-- * @return the newly allocated buffer state object.
-- */
--YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, yy_size_t _yybytes_len )
--{
-- YY_BUFFER_STATE b;
-- char *buf;
-- yy_size_t n, i;
--
-- /* Get memory for full buffer, including space for trailing EOB's. */
-- n = _yybytes_len + 2;
-- buf = (char *) yyalloc(n );
-- if ( ! buf )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" );
--
-- for ( i = 0; i < _yybytes_len; ++i )
-- buf[i] = yybytes[i];
--
-- buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR;
--
-- b = yy_scan_buffer(buf,n );
-- if ( ! b )
-- YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" );
--
-- /* It's okay to grow etc. this buffer, and we should throw it
-- * away when we're done.
-- */
-- b->yy_is_our_buffer = 1;
--
-- return b;
--}
--
--#ifndef YY_EXIT_FAILURE
--#define YY_EXIT_FAILURE 2
--#endif
--
--static void yy_fatal_error (yyconst char* msg )
--{
-- (void) fprintf( stderr, "%s\n", msg );
-- exit( YY_EXIT_FAILURE );
--}
--
--/* Redefine yyless() so it works in section 3 code. */
--
--#undef yyless
--#define yyless(n) \
-- do \
-- { \
-- /* Undo effects of setting up yytext. */ \
-- int yyless_macro_arg = (n); \
-- YY_LESS_LINENO(yyless_macro_arg);\
-- yytext[yyleng] = (yy_hold_char); \
-- (yy_c_buf_p) = yytext + yyless_macro_arg; \
-- (yy_hold_char) = *(yy_c_buf_p); \
-- *(yy_c_buf_p) = '\0'; \
-- yyleng = yyless_macro_arg; \
-- } \
-- while ( 0 )
--
--/* Accessor methods (get/set functions) to struct members. */
--
--/** Get the current line number.
-- *
-- */
--int yyget_lineno (void)
--{
--
-- return yylineno;
--}
--
--/** Get the input stream.
-- *
-- */
--FILE *yyget_in (void)
--{
-- return yyin;
--}
--
--/** Get the output stream.
-- *
-- */
--FILE *yyget_out (void)
--{
-- return yyout;
--}
--
--/** Get the length of the current token.
-- *
-- */
--yy_size_t yyget_leng (void)
--{
-- return yyleng;
--}
--
--/** Get the current token.
-- *
-- */
--
--char *yyget_text (void)
--{
-- return yytext;
--}
--
--/** Set the current line number.
-- * @param line_number
-- *
-- */
--void yyset_lineno (int line_number )
--{
--
-- yylineno = line_number;
--}
--
--/** Set the input stream. This does not discard the current
-- * input buffer.
-- * @param in_str A readable stream.
-- *
-- * @see yy_switch_to_buffer
-- */
--void yyset_in (FILE * in_str )
--{
-- yyin = in_str ;
--}
--
--void yyset_out (FILE * out_str )
--{
-- yyout = out_str ;
--}
--
--int yyget_debug (void)
--{
-- return yy_flex_debug;
--}
--
--void yyset_debug (int bdebug )
--{
-- yy_flex_debug = bdebug ;
--}
--
--static int yy_init_globals (void)
--{
-- /* Initialization is the same as for the non-reentrant scanner.
-- * This function is called from yylex_destroy(), so don't allocate here.
-- */
--
-- (yy_buffer_stack) = 0;
-- (yy_buffer_stack_top) = 0;
-- (yy_buffer_stack_max) = 0;
-- (yy_c_buf_p) = (char *) 0;
-- (yy_init) = 0;
-- (yy_start) = 0;
--
--/* Defined in main.c */
--#ifdef YY_STDINIT
-- yyin = stdin;
-- yyout = stdout;
--#else
-- yyin = (FILE *) 0;
-- yyout = (FILE *) 0;
--#endif
--
-- /* For future reference: Set errno on error, since we are called by
-- * yylex_init()
-- */
-- return 0;
--}
--
--/* yylex_destroy is for both reentrant and non-reentrant scanners. */
--int yylex_destroy (void)
--{
--
-- /* Pop the buffer stack, destroying each element. */
-- while(YY_CURRENT_BUFFER){
-- yy_delete_buffer(YY_CURRENT_BUFFER );
-- YY_CURRENT_BUFFER_LVALUE = NULL;
-- yypop_buffer_state();
-- }
--
-- /* Destroy the stack itself. */
-- yyfree((yy_buffer_stack) );
-- (yy_buffer_stack) = NULL;
--
-- /* Reset the globals. This is important in a non-reentrant scanner so the next time
-- * yylex() is called, initialization will occur. */
-- yy_init_globals( );
--
-- return 0;
--}
--
--/*
-- * Internal utility routines.
-- */
--
--#ifndef yytext_ptr
--static void yy_flex_strncpy (char* s1, yyconst char * s2, int n )
--{
-- register int i;
-- for ( i = 0; i < n; ++i )
-- s1[i] = s2[i];
--}
--#endif
--
--#ifdef YY_NEED_STRLEN
--static int yy_flex_strlen (yyconst char * s )
--{
-- register int n;
-- for ( n = 0; s[n]; ++n )
-- ;
--
-- return n;
--}
--#endif
--
--void *yyalloc (yy_size_t size )
--{
-- return (void *) malloc( size );
--}
--
--void *yyrealloc (void * ptr, yy_size_t size )
--{
-- /* The cast to (char *) in the following accommodates both
-- * implementations that use char* generic pointers, and those
-- * that use void* generic pointers. It works with the latter
-- * because both ANSI C and C++ allow castless assignment from
-- * any pointer type to void*, and deal with argument conversions
-- * as though doing an assignment.
-- */
-- return (void *) realloc( (char *) ptr, size );
--}
--
--void yyfree (void * ptr )
--{
-- free( (char *) ptr ); /* see yyrealloc() for (char *) cast */
--}
--
--#define YYTABLES_NAME "yytables"
--
--#line 339 "bfin-lex.l"
--
--
--static long parse_int (char **end)
--{
-- char fmt = '\0';
-- int not_done = 1;
-- int shiftvalue = 0;
-- char * char_bag;
-- long value = 0;
-- char *arg = *end;
--
-- while (*arg && *arg == ' ')
-- arg++;
--
-- switch (*arg)
-- {
-- case '1':
-- case '2':
-- case '3':
-- case '4':
-- case '5':
-- case '6':
-- case '7':
-- case '8':
-- case '9':
-- fmt = 'd';
-- break;
--
-- case '0': /* Accept different formated integers hex octal and binary. */
-- {
-- char c = *++arg;
-- arg++;
-- if (c == 'x' || c == 'X') /* Hex input. */
-- fmt = 'h';
-- else if (c == 'b' || c == 'B')
-- fmt = 'b';
-- else if (c == '.')
-- fmt = 'f';
-- else
-- { /* Octal. */
-- arg--;
-- fmt = 'o';
-- }
-- break;
-- }
--
-- case 'd':
-- case 'D':
-- case 'h':
-- case 'H':
-- case 'o':
-- case 'O':
-- case 'b':
-- case 'B':
-- case 'f':
-- case 'F':
-- {
-- fmt = *arg++;
-- if (*arg == '#')
-- arg++;
-- }
-- }
--
-- switch (fmt)
-- {
-- case 'h':
-- case 'H':
-- shiftvalue = 4;
-- char_bag = "0123456789ABCDEFabcdef";
-- break;
--
-- case 'o':
-- case 'O':
-- shiftvalue = 3;
-- char_bag = "01234567";
-- break;
--
-- case 'b':
-- case 'B':
-- shiftvalue = 1;
-- char_bag = "01";
-- break;
--
--/* The assembler allows for fractional constants to be created
-- by either the 0.xxxx or the f#xxxx format
--
-- i.e. 0.5 would result in 0x4000
--
-- note .5 would result in the identifier .5.
--
-- The assembler converts to fractional format 1.15 by the simple rule:
--
-- value = (short) (finput * (1 << 15)). */
--
-- case 'f':
-- case 'F':
-- {
-- float fval = 0.0;
-- float pos = 10.0;
-- while (1)
-- {
-- int c;
-- c = *arg++;
--
-- if (c >= '0' && c <= '9')
-- {
-- float digit = (c - '0') / pos;
-- fval = fval + digit;
-- pos = pos * 10.0;
-- }
-- else
-- {
-- *--arg = c;
-- value = (short) (fval * (1 << 15));
-- break;
-- }
-- }
-- *end = arg+1;
-- return value;
-- }
--
-- case 'd':
-- case 'D':
-- default:
-- {
-- while (1)
-- {
-- char c;
-- c = *arg++;
-- if (c >= '0' && c <= '9')
-- value = (value * 10) + (c - '0');
-- else
-- {
-- /* Constants that are suffixed with k|K are multiplied by 1024
-- This suffix is only allowed on decimal constants. */
-- if (c == 'k' || c == 'K')
-- value *= 1024;
-- else
-- *--arg = c;
-- break;
-- }
-- }
-- *end = arg+1;
-- return value;
-- }
-- }
--
-- while (not_done)
-- {
-- char c;
-- c = *arg++;
-- if (c == 0 || !strchr (char_bag, c))
-- {
-- not_done = 0;
-- *--arg = c;
-- }
-- else
-- {
-- if (c >= 'a' && c <= 'z')
-- c = c - ('a' - '9') + 1;
-- else if (c >= 'A' && c <= 'Z')
-- c = c - ('A' - '9') + 1;
--
-- c -= '0';
-- value = (value << shiftvalue) + c;
-- }
-- }
-- *end = arg+1;
-- return value;
--}
--
--
--static int parse_reg (Register *r, int cl, char *rt)
--{
-- r->regno = cl | (rt[1] - '0');
-- r->flags = F_REG_NONE;
-- return REG;
--}
--
--static int parse_halfreg (Register *r, int cl, char *rt)
--{
-- r->regno = cl | (rt[1] - '0');
--
-- switch (rt[3])
-- {
-- case 'b':
-- case 'B':
-- return BYTE_DREG;
--
-- case 'l':
-- case 'L':
-- r->flags = F_REG_LOW;
-- break;
--
-- case 'h':
-- case 'H':
-- r->flags = F_REG_HIGH;
-- break;
-- }
--
-- return HALF_REG;
--}
--
--/* Our start state is KEYWORD as we have
-- command keywords such as PREFETCH. */
--
--void
--set_start_state (void)
--{
-- BEGIN KEYWORD;
--}
--
--
--#ifndef yywrap
--int
--yywrap ()
--{
-- return 1;
--}
--#endif
--
-diff -Nur binutils-2.24.orig/gas/bfin-parse.c binutils-2.24/gas/bfin-parse.c
---- binutils-2.24.orig/gas/bfin-parse.c 2013-11-18 09:49:28.000000000 +0100
-+++ binutils-2.24/gas/bfin-parse.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,7954 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton implementation for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* C LALR(1) parser skeleton written by Richard Stallman, by
-- simplifying the original so-called "semantic" parser. */
--
--/* All symbols defined below should begin with yy or YY, to avoid
-- infringing on user name space. This should be done even for local
-- variables, as they might otherwise be expanded by user macros.
-- There are some unavoidable exceptions within include files to
-- define necessary library symbols; they are noted "INFRINGES ON
-- USER NAME SPACE" below. */
--
--/* Identify Bison output. */
--#define YYBISON 1
--
--/* Bison version. */
--#define YYBISON_VERSION "2.3"
--
--/* Skeleton name. */
--#define YYSKELETON_NAME "yacc.c"
--
--/* Pure parsers. */
--#define YYPURE 0
--
--/* Using locations. */
--#define YYLSP_NEEDED 0
--
--
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- BYTEOP16P = 258,
-- BYTEOP16M = 259,
-- BYTEOP1P = 260,
-- BYTEOP2P = 261,
-- BYTEOP3P = 262,
-- BYTEUNPACK = 263,
-- BYTEPACK = 264,
-- PACK = 265,
-- SAA = 266,
-- ALIGN8 = 267,
-- ALIGN16 = 268,
-- ALIGN24 = 269,
-- VIT_MAX = 270,
-- EXTRACT = 271,
-- DEPOSIT = 272,
-- EXPADJ = 273,
-- SEARCH = 274,
-- ONES = 275,
-- SIGN = 276,
-- SIGNBITS = 277,
-- LINK = 278,
-- UNLINK = 279,
-- REG = 280,
-- PC = 281,
-- CCREG = 282,
-- BYTE_DREG = 283,
-- REG_A_DOUBLE_ZERO = 284,
-- REG_A_DOUBLE_ONE = 285,
-- A_ZERO_DOT_L = 286,
-- A_ZERO_DOT_H = 287,
-- A_ONE_DOT_L = 288,
-- A_ONE_DOT_H = 289,
-- HALF_REG = 290,
-- NOP = 291,
-- RTI = 292,
-- RTS = 293,
-- RTX = 294,
-- RTN = 295,
-- RTE = 296,
-- HLT = 297,
-- IDLE = 298,
-- STI = 299,
-- CLI = 300,
-- CSYNC = 301,
-- SSYNC = 302,
-- EMUEXCPT = 303,
-- RAISE = 304,
-- EXCPT = 305,
-- LSETUP = 306,
-- LOOP = 307,
-- LOOP_BEGIN = 308,
-- LOOP_END = 309,
-- DISALGNEXCPT = 310,
-- JUMP = 311,
-- JUMP_DOT_S = 312,
-- JUMP_DOT_L = 313,
-- CALL = 314,
-- ABORT = 315,
-- NOT = 316,
-- TILDA = 317,
-- BANG = 318,
-- AMPERSAND = 319,
-- BAR = 320,
-- PERCENT = 321,
-- CARET = 322,
-- BXOR = 323,
-- MINUS = 324,
-- PLUS = 325,
-- STAR = 326,
-- SLASH = 327,
-- NEG = 328,
-- MIN = 329,
-- MAX = 330,
-- ABS = 331,
-- DOUBLE_BAR = 332,
-- _PLUS_BAR_PLUS = 333,
-- _PLUS_BAR_MINUS = 334,
-- _MINUS_BAR_PLUS = 335,
-- _MINUS_BAR_MINUS = 336,
-- _MINUS_MINUS = 337,
-- _PLUS_PLUS = 338,
-- SHIFT = 339,
-- LSHIFT = 340,
-- ASHIFT = 341,
-- BXORSHIFT = 342,
-- _GREATER_GREATER_GREATER_THAN_ASSIGN = 343,
-- ROT = 344,
-- LESS_LESS = 345,
-- GREATER_GREATER = 346,
-- _GREATER_GREATER_GREATER = 347,
-- _LESS_LESS_ASSIGN = 348,
-- _GREATER_GREATER_ASSIGN = 349,
-- DIVS = 350,
-- DIVQ = 351,
-- ASSIGN = 352,
-- _STAR_ASSIGN = 353,
-- _BAR_ASSIGN = 354,
-- _CARET_ASSIGN = 355,
-- _AMPERSAND_ASSIGN = 356,
-- _MINUS_ASSIGN = 357,
-- _PLUS_ASSIGN = 358,
-- _ASSIGN_BANG = 359,
-- _LESS_THAN_ASSIGN = 360,
-- _ASSIGN_ASSIGN = 361,
-- GE = 362,
-- LT = 363,
-- LE = 364,
-- GT = 365,
-- LESS_THAN = 366,
-- FLUSHINV = 367,
-- FLUSH = 368,
-- IFLUSH = 369,
-- PREFETCH = 370,
-- PRNT = 371,
-- OUTC = 372,
-- WHATREG = 373,
-- TESTSET = 374,
-- ASL = 375,
-- ASR = 376,
-- B = 377,
-- W = 378,
-- NS = 379,
-- S = 380,
-- CO = 381,
-- SCO = 382,
-- TH = 383,
-- TL = 384,
-- BP = 385,
-- BREV = 386,
-- X = 387,
-- Z = 388,
-- M = 389,
-- MMOD = 390,
-- R = 391,
-- RND = 392,
-- RNDL = 393,
-- RNDH = 394,
-- RND12 = 395,
-- RND20 = 396,
-- V = 397,
-- LO = 398,
-- HI = 399,
-- BITTGL = 400,
-- BITCLR = 401,
-- BITSET = 402,
-- BITTST = 403,
-- BITMUX = 404,
-- DBGAL = 405,
-- DBGAH = 406,
-- DBGHALT = 407,
-- DBG = 408,
-- DBGA = 409,
-- DBGCMPLX = 410,
-- IF = 411,
-- COMMA = 412,
-- BY = 413,
-- COLON = 414,
-- SEMICOLON = 415,
-- RPAREN = 416,
-- LPAREN = 417,
-- LBRACK = 418,
-- RBRACK = 419,
-- STATUS_REG = 420,
-- MNOP = 421,
-- SYMBOL = 422,
-- NUMBER = 423,
-- GOT = 424,
-- GOT17M4 = 425,
-- FUNCDESC_GOT17M4 = 426,
-- AT = 427,
-- PLTPC = 428
-- };
--#endif
--/* Tokens. */
--#define BYTEOP16P 258
--#define BYTEOP16M 259
--#define BYTEOP1P 260
--#define BYTEOP2P 261
--#define BYTEOP3P 262
--#define BYTEUNPACK 263
--#define BYTEPACK 264
--#define PACK 265
--#define SAA 266
--#define ALIGN8 267
--#define ALIGN16 268
--#define ALIGN24 269
--#define VIT_MAX 270
--#define EXTRACT 271
--#define DEPOSIT 272
--#define EXPADJ 273
--#define SEARCH 274
--#define ONES 275
--#define SIGN 276
--#define SIGNBITS 277
--#define LINK 278
--#define UNLINK 279
--#define REG 280
--#define PC 281
--#define CCREG 282
--#define BYTE_DREG 283
--#define REG_A_DOUBLE_ZERO 284
--#define REG_A_DOUBLE_ONE 285
--#define A_ZERO_DOT_L 286
--#define A_ZERO_DOT_H 287
--#define A_ONE_DOT_L 288
--#define A_ONE_DOT_H 289
--#define HALF_REG 290
--#define NOP 291
--#define RTI 292
--#define RTS 293
--#define RTX 294
--#define RTN 295
--#define RTE 296
--#define HLT 297
--#define IDLE 298
--#define STI 299
--#define CLI 300
--#define CSYNC 301
--#define SSYNC 302
--#define EMUEXCPT 303
--#define RAISE 304
--#define EXCPT 305
--#define LSETUP 306
--#define LOOP 307
--#define LOOP_BEGIN 308
--#define LOOP_END 309
--#define DISALGNEXCPT 310
--#define JUMP 311
--#define JUMP_DOT_S 312
--#define JUMP_DOT_L 313
--#define CALL 314
--#define ABORT 315
--#define NOT 316
--#define TILDA 317
--#define BANG 318
--#define AMPERSAND 319
--#define BAR 320
--#define PERCENT 321
--#define CARET 322
--#define BXOR 323
--#define MINUS 324
--#define PLUS 325
--#define STAR 326
--#define SLASH 327
--#define NEG 328
--#define MIN 329
--#define MAX 330
--#define ABS 331
--#define DOUBLE_BAR 332
--#define _PLUS_BAR_PLUS 333
--#define _PLUS_BAR_MINUS 334
--#define _MINUS_BAR_PLUS 335
--#define _MINUS_BAR_MINUS 336
--#define _MINUS_MINUS 337
--#define _PLUS_PLUS 338
--#define SHIFT 339
--#define LSHIFT 340
--#define ASHIFT 341
--#define BXORSHIFT 342
--#define _GREATER_GREATER_GREATER_THAN_ASSIGN 343
--#define ROT 344
--#define LESS_LESS 345
--#define GREATER_GREATER 346
--#define _GREATER_GREATER_GREATER 347
--#define _LESS_LESS_ASSIGN 348
--#define _GREATER_GREATER_ASSIGN 349
--#define DIVS 350
--#define DIVQ 351
--#define ASSIGN 352
--#define _STAR_ASSIGN 353
--#define _BAR_ASSIGN 354
--#define _CARET_ASSIGN 355
--#define _AMPERSAND_ASSIGN 356
--#define _MINUS_ASSIGN 357
--#define _PLUS_ASSIGN 358
--#define _ASSIGN_BANG 359
--#define _LESS_THAN_ASSIGN 360
--#define _ASSIGN_ASSIGN 361
--#define GE 362
--#define LT 363
--#define LE 364
--#define GT 365
--#define LESS_THAN 366
--#define FLUSHINV 367
--#define FLUSH 368
--#define IFLUSH 369
--#define PREFETCH 370
--#define PRNT 371
--#define OUTC 372
--#define WHATREG 373
--#define TESTSET 374
--#define ASL 375
--#define ASR 376
--#define B 377
--#define W 378
--#define NS 379
--#define S 380
--#define CO 381
--#define SCO 382
--#define TH 383
--#define TL 384
--#define BP 385
--#define BREV 386
--#define X 387
--#define Z 388
--#define M 389
--#define MMOD 390
--#define R 391
--#define RND 392
--#define RNDL 393
--#define RNDH 394
--#define RND12 395
--#define RND20 396
--#define V 397
--#define LO 398
--#define HI 399
--#define BITTGL 400
--#define BITCLR 401
--#define BITSET 402
--#define BITTST 403
--#define BITMUX 404
--#define DBGAL 405
--#define DBGAH 406
--#define DBGHALT 407
--#define DBG 408
--#define DBGA 409
--#define DBGCMPLX 410
--#define IF 411
--#define COMMA 412
--#define BY 413
--#define COLON 414
--#define SEMICOLON 415
--#define RPAREN 416
--#define LPAREN 417
--#define LBRACK 418
--#define RBRACK 419
--#define STATUS_REG 420
--#define MNOP 421
--#define SYMBOL 422
--#define NUMBER 423
--#define GOT 424
--#define GOT17M4 425
--#define FUNCDESC_GOT17M4 426
--#define AT 427
--#define PLTPC 428
--
--
--
--
--/* Copy the first part of user declarations. */
--#line 21 "bfin-parse.y"
--
--
--#include "as.h"
--#include <obstack.h>
--
--#include "bfin-aux.h" /* Opcode generating auxiliaries. */
--#include "libbfd.h"
--#include "elf/common.h"
--#include "elf/bfin.h"
--
--#define DSP32ALU(aopcde, HL, dst1, dst0, src0, src1, s, x, aop) \
-- bfin_gen_dsp32alu (HL, aopcde, aop, s, x, dst0, dst1, src0, src1)
--
--#define DSP32MAC(op1, MM, mmod, w1, P, h01, h11, h00, h10, dst, op0, src0, src1, w0) \
-- bfin_gen_dsp32mac (op1, MM, mmod, w1, P, h01, h11, h00, h10, op0, \
-- dst, src0, src1, w0)
--
--#define DSP32MULT(op1, MM, mmod, w1, P, h01, h11, h00, h10, dst, op0, src0, src1, w0) \
-- bfin_gen_dsp32mult (op1, MM, mmod, w1, P, h01, h11, h00, h10, op0, \
-- dst, src0, src1, w0)
--
--#define DSP32SHIFT(sopcde, dst0, src0, src1, sop, hls) \
-- bfin_gen_dsp32shift (sopcde, dst0, src0, src1, sop, hls)
--
--#define DSP32SHIFTIMM(sopcde, dst0, immag, src1, sop, hls) \
-- bfin_gen_dsp32shiftimm (sopcde, dst0, immag, src1, sop, hls)
--
--#define LDIMMHALF_R(reg, h, s, z, hword) \
-- bfin_gen_ldimmhalf (reg, h, s, z, hword, 1)
--
--#define LDIMMHALF_R5(reg, h, s, z, hword) \
-- bfin_gen_ldimmhalf (reg, h, s, z, hword, 2)
--
--#define LDSTIDXI(ptr, reg, w, sz, z, offset) \
-- bfin_gen_ldstidxi (ptr, reg, w, sz, z, offset)
--
--#define LDST(ptr, reg, aop, sz, z, w) \
-- bfin_gen_ldst (ptr, reg, aop, sz, z, w)
--
--#define LDSTII(ptr, reg, offset, w, op) \
-- bfin_gen_ldstii (ptr, reg, offset, w, op)
--
--#define DSPLDST(i, m, reg, aop, w) \
-- bfin_gen_dspldst (i, reg, aop, w, m)
--
--#define LDSTPMOD(ptr, reg, idx, aop, w) \
-- bfin_gen_ldstpmod (ptr, reg, aop, w, idx)
--
--#define LDSTIIFP(offset, reg, w) \
-- bfin_gen_ldstiifp (reg, offset, w)
--
--#define LOGI2OP(dst, src, opc) \
-- bfin_gen_logi2op (opc, src, dst.regno & CODE_MASK)
--
--#define ALU2OP(dst, src, opc) \
-- bfin_gen_alu2op (dst, src, opc)
--
--#define BRCC(t, b, offset) \
-- bfin_gen_brcc (t, b, offset)
--
--#define UJUMP(offset) \
-- bfin_gen_ujump (offset)
--
--#define PROGCTRL(prgfunc, poprnd) \
-- bfin_gen_progctrl (prgfunc, poprnd)
--
--#define PUSHPOPMULTIPLE(dr, pr, d, p, w) \
-- bfin_gen_pushpopmultiple (dr, pr, d, p, w)
--
--#define PUSHPOPREG(reg, w) \
-- bfin_gen_pushpopreg (reg, w)
--
--#define CALLA(addr, s) \
-- bfin_gen_calla (addr, s)
--
--#define LINKAGE(r, framesize) \
-- bfin_gen_linkage (r, framesize)
--
--#define COMPI2OPD(dst, src, op) \
-- bfin_gen_compi2opd (dst, src, op)
--
--#define COMPI2OPP(dst, src, op) \
-- bfin_gen_compi2opp (dst, src, op)
--
--#define DAGMODIK(i, op) \
-- bfin_gen_dagmodik (i, op)
--
--#define DAGMODIM(i, m, op, br) \
-- bfin_gen_dagmodim (i, m, op, br)
--
--#define COMP3OP(dst, src0, src1, opc) \
-- bfin_gen_comp3op (src0, src1, dst, opc)
--
--#define PTR2OP(dst, src, opc) \
-- bfin_gen_ptr2op (dst, src, opc)
--
--#define CCFLAG(x, y, opc, i, g) \
-- bfin_gen_ccflag (x, y, opc, i, g)
--
--#define CCMV(src, dst, t) \
-- bfin_gen_ccmv (src, dst, t)
--
--#define CACTRL(reg, a, op) \
-- bfin_gen_cactrl (reg, a, op)
--
--#define LOOPSETUP(soffset, c, rop, eoffset, reg) \
-- bfin_gen_loopsetup (soffset, c, rop, eoffset, reg)
--
--#define HL2(r1, r0) (IS_H (r1) << 1 | IS_H (r0))
--#define IS_RANGE(bits, expr, sign, mul) \
-- value_match(expr, bits, sign, mul, 1)
--#define IS_URANGE(bits, expr, sign, mul) \
-- value_match(expr, bits, sign, mul, 0)
--#define IS_CONST(expr) (expr->type == Expr_Node_Constant)
--#define IS_RELOC(expr) (expr->type != Expr_Node_Constant)
--#define IS_IMM(expr, bits) value_match (expr, bits, 0, 1, 1)
--#define IS_UIMM(expr, bits) value_match (expr, bits, 0, 1, 0)
--
--#define IS_PCREL4(expr) \
-- (value_match (expr, 4, 0, 2, 0))
--
--#define IS_LPPCREL10(expr) \
-- (value_match (expr, 10, 0, 2, 0))
--
--#define IS_PCREL10(expr) \
-- (value_match (expr, 10, 0, 2, 1))
--
--#define IS_PCREL12(expr) \
-- (value_match (expr, 12, 0, 2, 1))
--
--#define IS_PCREL24(expr) \
-- (value_match (expr, 24, 0, 2, 1))
--
--
--static int value_match (Expr_Node *, int, int, int, int);
--
--extern FILE *errorf;
--extern INSTR_T insn;
--
--static Expr_Node *binary (Expr_Op_Type, Expr_Node *, Expr_Node *);
--static Expr_Node *unary (Expr_Op_Type, Expr_Node *);
--
--static void notethat (char *, ...);
--
--char *current_inputline;
--extern char *yytext;
--int yyerror (char *);
--
--/* Used to set SRCx fields to all 1s as described in the PRM. */
--static Register reg7 = {REG_R7, 0};
--
--void error (char *format, ...)
--{
-- va_list ap;
-- static char buffer[2000];
--
-- va_start (ap, format);
-- vsprintf (buffer, format, ap);
-- va_end (ap);
--
-- as_bad ("%s", buffer);
--}
--
--int
--yyerror (char *msg)
--{
-- if (msg[0] == '\0')
-- error ("%s", msg);
--
-- else if (yytext[0] != ';')
-- error ("%s. Input text was %s.", msg, yytext);
-- else
-- error ("%s.", msg);
--
-- return -1;
--}
--
--static int
--in_range_p (Expr_Node *exp, int from, int to, unsigned int mask)
--{
-- int val = EXPR_VALUE (exp);
-- if (exp->type != Expr_Node_Constant)
-- return 0;
-- if (val < from || val > to)
-- return 0;
-- return (val & mask) == 0;
--}
--
--extern int yylex (void);
--
--#define imm3(x) EXPR_VALUE (x)
--#define imm4(x) EXPR_VALUE (x)
--#define uimm4(x) EXPR_VALUE (x)
--#define imm5(x) EXPR_VALUE (x)
--#define uimm5(x) EXPR_VALUE (x)
--#define imm6(x) EXPR_VALUE (x)
--#define imm7(x) EXPR_VALUE (x)
--#define uimm8(x) EXPR_VALUE (x)
--#define imm16(x) EXPR_VALUE (x)
--#define uimm16s4(x) ((EXPR_VALUE (x)) >> 2)
--#define uimm16(x) EXPR_VALUE (x)
--
--/* Return true if a value is inside a range. */
--#define IN_RANGE(x, low, high) \
-- (((EXPR_VALUE(x)) >= (low)) && (EXPR_VALUE(x)) <= ((high)))
--
--/* Auxiliary functions. */
--
--static int
--valid_dreg_pair (Register *reg1, Expr_Node *reg2)
--{
-- if (!IS_DREG (*reg1))
-- {
-- yyerror ("Dregs expected");
-- return 0;
-- }
--
-- if (reg1->regno != 1 && reg1->regno != 3)
-- {
-- yyerror ("Bad register pair");
-- return 0;
-- }
--
-- if (imm7 (reg2) != reg1->regno - 1)
-- {
-- yyerror ("Bad register pair");
-- return 0;
-- }
--
-- reg1->regno--;
-- return 1;
--}
--
--static int
--check_multiply_halfregs (Macfunc *aa, Macfunc *ab)
--{
-- if ((!REG_EQUAL (aa->s0, ab->s0) && !REG_EQUAL (aa->s0, ab->s1))
-- || (!REG_EQUAL (aa->s1, ab->s1) && !REG_EQUAL (aa->s1, ab->s0)))
-- return yyerror ("Source multiplication register mismatch");
--
-- return 0;
--}
--
--
--/* Check mac option. */
--
--static int
--check_macfunc_option (Macfunc *a, Opt_mode *opt)
--{
-- /* Default option is always valid. */
-- if (opt->mod == 0)
-- return 0;
--
-- if ((a->w == 1 && a->P == 1
-- && opt->mod != M_FU && opt->mod != M_IS && opt->mod != M_IU
-- && opt->mod != M_S2RND && opt->mod != M_ISS2)
-- || (a->w == 1 && a->P == 0
-- && opt->mod != M_FU && opt->mod != M_IS && opt->mod != M_IU
-- && opt->mod != M_T && opt->mod != M_TFU && opt->mod != M_S2RND
-- && opt->mod != M_ISS2 && opt->mod != M_IH)
-- || (a->w == 0 && a->P == 0
-- && opt->mod != M_FU && opt->mod != M_IS && opt->mod != M_W32))
-- return -1;
--
-- return 0;
--}
--
--/* Check (vector) mac funcs and ops. */
--
--static int
--check_macfuncs (Macfunc *aa, Opt_mode *opa,
-- Macfunc *ab, Opt_mode *opb)
--{
-- /* Variables for swapping. */
-- Macfunc mtmp;
-- Opt_mode otmp;
--
-- /* The option mode should be put at the end of the second instruction
-- of the vector except M, which should follow MAC1 instruction. */
-- if (opa->mod != 0)
-- return yyerror ("Bad opt mode");
--
-- /* If a0macfunc comes before a1macfunc, swap them. */
--
-- if (aa->n == 0)
-- {
-- /* (M) is not allowed here. */
-- if (opa->MM != 0)
-- return yyerror ("(M) not allowed with A0MAC");
-- if (ab->n != 1)
-- return yyerror ("Vector AxMACs can't be same");
--
-- mtmp = *aa; *aa = *ab; *ab = mtmp;
-- otmp = *opa; *opa = *opb; *opb = otmp;
-- }
-- else
-- {
-- if (opb->MM != 0)
-- return yyerror ("(M) not allowed with A0MAC");
-- if (ab->n != 0)
-- return yyerror ("Vector AxMACs can't be same");
-- }
--
-- /* If both ops are one of 0, 1, or 2, we have multiply_halfregs in both
-- assignment_or_macfuncs. */
-- if ((aa->op == 0 || aa->op == 1 || aa->op == 2)
-- && (ab->op == 0 || ab->op == 1 || ab->op == 2))
-- {
-- if (check_multiply_halfregs (aa, ab) < 0)
-- return -1;
-- }
-- else
-- {
-- /* Only one of the assign_macfuncs has a half reg multiply
-- Evil trick: Just 'OR' their source register codes:
-- We can do that, because we know they were initialized to 0
-- in the rules that don't use multiply_halfregs. */
-- aa->s0.regno |= (ab->s0.regno & CODE_MASK);
-- aa->s1.regno |= (ab->s1.regno & CODE_MASK);
-- }
--
-- if (aa->w == ab->w && aa->P != ab->P)
-- return yyerror ("Destination Dreg sizes (full or half) must match");
--
-- if (aa->w && ab->w)
-- {
-- if (aa->P && (aa->dst.regno - ab->dst.regno) != 1)
-- return yyerror ("Destination Dregs (full) must differ by one");
-- if (!aa->P && aa->dst.regno != ab->dst.regno)
-- return yyerror ("Destination Dregs (half) must match");
-- }
--
-- /* Make sure mod flags get ORed, too. */
-- opb->mod |= opa->mod;
--
-- /* Check option. */
-- if (check_macfunc_option (aa, opb) < 0
-- && check_macfunc_option (ab, opb) < 0)
-- return yyerror ("bad option");
--
-- /* Make sure first macfunc has got both P flags ORed. */
-- aa->P |= ab->P;
--
-- return 0;
--}
--
--
--static int
--is_group1 (INSTR_T x)
--{
-- /* Group1 is dpsLDST, LDSTpmod, LDST, LDSTiiFP, LDSTii. */
-- if ((x->value & 0xc000) == 0x8000 || (x->value == 0x0000))
-- return 1;
--
-- return 0;
--}
--
--static int
--is_group2 (INSTR_T x)
--{
-- if ((((x->value & 0xfc00) == 0x9c00) /* dspLDST. */
-- && !((x->value & 0xfde0) == 0x9c60) /* dagMODim. */
-- && !((x->value & 0xfde0) == 0x9ce0) /* dagMODim with bit rev. */
-- && !((x->value & 0xfde0) == 0x9d60)) /* pick dagMODik. */
-- || (x->value == 0x0000))
-- return 1;
-- return 0;
--}
--
--static int
--is_store (INSTR_T x)
--{
-- if (!x)
-- return 0;
--
-- if ((x->value & 0xf000) == 0x8000)
-- {
-- int aop = ((x->value >> 9) & 0x3);
-- int w = ((x->value >> 11) & 0x1);
-- if (!w || aop == 3)
-- return 0;
-- return 1;
-- }
--
-- if (((x->value & 0xFF60) == 0x9E60) || /* dagMODim_0 */
-- ((x->value & 0xFFF0) == 0x9F60)) /* dagMODik_0 */
-- return 0;
--
-- /* decode_dspLDST_0 */
-- if ((x->value & 0xFC00) == 0x9C00)
-- {
-- int w = ((x->value >> 9) & 0x1);
-- if (w)
-- return 1;
-- }
--
-- return 0;
--}
--
--static INSTR_T
--gen_multi_instr_1 (INSTR_T dsp32, INSTR_T dsp16_grp1, INSTR_T dsp16_grp2)
--{
-- int mask1 = dsp32 ? insn_regmask (dsp32->value, dsp32->next->value) : 0;
-- int mask2 = dsp16_grp1 ? insn_regmask (dsp16_grp1->value, 0) : 0;
-- int mask3 = dsp16_grp2 ? insn_regmask (dsp16_grp2->value, 0) : 0;
--
-- if ((mask1 & mask2) || (mask1 & mask3) || (mask2 & mask3))
-- yyerror ("resource conflict in multi-issue instruction");
--
-- /* Anomaly 05000074 */
-- if (ENABLE_AC_05000074
-- && dsp32 != NULL && dsp16_grp1 != NULL
-- && (dsp32->value & 0xf780) == 0xc680
-- && ((dsp16_grp1->value & 0xfe40) == 0x9240
-- || (dsp16_grp1->value & 0xfe08) == 0xba08
-- || (dsp16_grp1->value & 0xfc00) == 0xbc00))
-- yyerror ("anomaly 05000074 - Multi-Issue Instruction with \
--dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported");
--
-- if (is_store (dsp16_grp1) && is_store (dsp16_grp2))
-- yyerror ("Only one instruction in multi-issue instruction can be a store");
--
-- return bfin_gen_multi_instr (dsp32, dsp16_grp1, dsp16_grp2);
--}
--
--
--
--/* Enabling traces. */
--#ifndef YYDEBUG
--# define YYDEBUG 0
--#endif
--
--/* Enabling verbose error messages. */
--#ifdef YYERROR_VERBOSE
--# undef YYERROR_VERBOSE
--# define YYERROR_VERBOSE 1
--#else
--# define YYERROR_VERBOSE 0
--#endif
--
--/* Enabling the token table. */
--#ifndef YYTOKEN_TABLE
--# define YYTOKEN_TABLE 0
--#endif
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 448 "bfin-parse.y"
--{
-- INSTR_T instr;
-- Expr_Node *expr;
-- SYMBOL_T symbol;
-- long value;
-- Register reg;
-- Macfunc macfunc;
-- struct { int r0; int s0; int x0; int aop; } modcodes;
-- struct { int r0; } r0;
-- Opt_mode mod;
--}
--/* Line 193 of yacc.c. */
--#line 881 "bfin-parse.c"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--
--
--/* Copy the second part of user declarations. */
--
--
--/* Line 216 of yacc.c. */
--#line 894 "bfin-parse.c"
--
--#ifdef short
--# undef short
--#endif
--
--#ifdef YYTYPE_UINT8
--typedef YYTYPE_UINT8 yytype_uint8;
--#else
--typedef unsigned char yytype_uint8;
--#endif
--
--#ifdef YYTYPE_INT8
--typedef YYTYPE_INT8 yytype_int8;
--#elif (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--typedef signed char yytype_int8;
--#else
--typedef short int yytype_int8;
--#endif
--
--#ifdef YYTYPE_UINT16
--typedef YYTYPE_UINT16 yytype_uint16;
--#else
--typedef unsigned short int yytype_uint16;
--#endif
--
--#ifdef YYTYPE_INT16
--typedef YYTYPE_INT16 yytype_int16;
--#else
--typedef short int yytype_int16;
--#endif
--
--#ifndef YYSIZE_T
--# ifdef __SIZE_TYPE__
--# define YYSIZE_T __SIZE_TYPE__
--# elif defined size_t
--# define YYSIZE_T size_t
--# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stddef.h> /* INFRINGES ON USER NAME SPACE */
--# define YYSIZE_T size_t
--# else
--# define YYSIZE_T unsigned int
--# endif
--#endif
--
--#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
--
--#ifndef YY_
--# if defined YYENABLE_NLS && YYENABLE_NLS
--# if ENABLE_NLS
--# include <libintl.h> /* INFRINGES ON USER NAME SPACE */
--# define YY_(msgid) dgettext ("bison-runtime", msgid)
--# endif
--# endif
--# ifndef YY_
--# define YY_(msgid) msgid
--# endif
--#endif
--
--/* Suppress unused-variable warnings by "using" E. */
--#if ! defined lint || defined __GNUC__
--# define YYUSE(e) ((void) (e))
--#else
--# define YYUSE(e) /* empty */
--#endif
--
--/* Identity function, used to suppress warnings about constant conditions. */
--#ifndef lint
--# define YYID(n) (n)
--#else
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static int
--YYID (int i)
--#else
--static int
--YYID (i)
-- int i;
--#endif
--{
-- return i;
--}
--#endif
--
--#if ! defined yyoverflow || YYERROR_VERBOSE
--
--/* The parser invokes alloca or malloc; define the necessary symbols. */
--
--# ifdef YYSTACK_USE_ALLOCA
--# if YYSTACK_USE_ALLOCA
--# ifdef __GNUC__
--# define YYSTACK_ALLOC __builtin_alloca
--# elif defined __BUILTIN_VA_ARG_INCR
--# include <alloca.h> /* INFRINGES ON USER NAME SPACE */
--# elif defined _AIX
--# define YYSTACK_ALLOC __alloca
--# elif defined _MSC_VER
--# include <malloc.h> /* INFRINGES ON USER NAME SPACE */
--# define alloca _alloca
--# else
--# define YYSTACK_ALLOC alloca
--# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# endif
--# endif
--# endif
--
--# ifdef YYSTACK_ALLOC
-- /* Pacify GCC's `empty if-body' warning. */
--# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0))
--# ifndef YYSTACK_ALLOC_MAXIMUM
-- /* The OS might guarantee only one guard page at the bottom of the stack,
-- and a page size can be as small as 4096 bytes. So we cannot safely
-- invoke alloca (N) if N exceeds 4096. Use a slightly smaller number
-- to allow for a few compiler-allocated temporary stack slots. */
--# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
--# endif
--# else
--# define YYSTACK_ALLOC YYMALLOC
--# define YYSTACK_FREE YYFREE
--# ifndef YYSTACK_ALLOC_MAXIMUM
--# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
--# endif
--# if (defined __cplusplus && ! defined _STDLIB_H \
-- && ! ((defined YYMALLOC || defined malloc) \
-- && (defined YYFREE || defined free)))
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# ifndef YYMALLOC
--# define YYMALLOC malloc
--# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# ifndef YYFREE
--# define YYFREE free
--# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void free (void *); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# endif
--#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
--
--
--#if (! defined yyoverflow \
-- && (! defined __cplusplus \
-- || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
--
--/* A type that is properly aligned for any stack member. */
--union yyalloc
--{
-- yytype_int16 yyss;
-- YYSTYPE yyvs;
-- };
--
--/* The size of the maximum gap between one aligned stack and the next. */
--# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
--
--/* The size of an array large to enough to hold all stacks, each with
-- N elements. */
--# define YYSTACK_BYTES(N) \
-- ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \
-- + YYSTACK_GAP_MAXIMUM)
--
--/* Copy COUNT objects from FROM to TO. The source and destination do
-- not overlap. */
--# ifndef YYCOPY
--# if defined __GNUC__ && 1 < __GNUC__
--# define YYCOPY(To, From, Count) \
-- __builtin_memcpy (To, From, (Count) * sizeof (*(From)))
--# else
--# define YYCOPY(To, From, Count) \
-- do \
-- { \
-- YYSIZE_T yyi; \
-- for (yyi = 0; yyi < (Count); yyi++) \
-- (To)[yyi] = (From)[yyi]; \
-- } \
-- while (YYID (0))
--# endif
--# endif
--
--/* Relocate STACK from its old location to the new one. The
-- local variables YYSIZE and YYSTACKSIZE give the old and new number of
-- elements in the stack, and YYPTR gives the new location of the
-- stack. Advance YYPTR to a properly aligned location for the next
-- stack. */
--# define YYSTACK_RELOCATE(Stack) \
-- do \
-- { \
-- YYSIZE_T yynewbytes; \
-- YYCOPY (&yyptr->Stack, Stack, yysize); \
-- Stack = &yyptr->Stack; \
-- yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
-- yyptr += yynewbytes / sizeof (*yyptr); \
-- } \
-- while (YYID (0))
--
--#endif
--
--/* YYFINAL -- State number of the termination state. */
--#define YYFINAL 156
--/* YYLAST -- Last index in YYTABLE. */
--#define YYLAST 1309
--
--/* YYNTOKENS -- Number of terminals. */
--#define YYNTOKENS 174
--/* YYNNTS -- Number of nonterminals. */
--#define YYNNTS 47
--/* YYNRULES -- Number of rules. */
--#define YYNRULES 354
--/* YYNRULES -- Number of states. */
--#define YYNSTATES 1021
--
--/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */
--#define YYUNDEFTOK 2
--#define YYMAXUTOK 428
--
--#define YYTRANSLATE(YYX) \
-- ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
--
--/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */
--static const yytype_uint8 yytranslate[] =
--{
-- 0, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 1, 2, 3, 4,
-- 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
-- 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
-- 35, 36, 37, 38, 39, 40, 41, 42, 43, 44,
-- 45, 46, 47, 48, 49, 50, 51, 52, 53, 54,
-- 55, 56, 57, 58, 59, 60, 61, 62, 63, 64,
-- 65, 66, 67, 68, 69, 70, 71, 72, 73, 74,
-- 75, 76, 77, 78, 79, 80, 81, 82, 83, 84,
-- 85, 86, 87, 88, 89, 90, 91, 92, 93, 94,
-- 95, 96, 97, 98, 99, 100, 101, 102, 103, 104,
-- 105, 106, 107, 108, 109, 110, 111, 112, 113, 114,
-- 115, 116, 117, 118, 119, 120, 121, 122, 123, 124,
-- 125, 126, 127, 128, 129, 130, 131, 132, 133, 134,
-- 135, 136, 137, 138, 139, 140, 141, 142, 143, 144,
-- 145, 146, 147, 148, 149, 150, 151, 152, 153, 154,
-- 155, 156, 157, 158, 159, 160, 161, 162, 163, 164,
-- 165, 166, 167, 168, 169, 170, 171, 172, 173
--};
--
--#if YYDEBUG
--/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
-- YYRHS. */
--static const yytype_uint16 yyprhs[] =
--{
-- 0, 0, 3, 4, 6, 9, 16, 21, 23, 25,
-- 28, 34, 36, 43, 50, 54, 58, 76, 94, 106,
-- 118, 130, 143, 156, 169, 175, 179, 183, 187, 196,
-- 210, 223, 237, 251, 260, 278, 285, 295, 299, 306,
-- 310, 316, 323, 332, 341, 344, 347, 352, 356, 359,
-- 364, 368, 375, 380, 388, 396, 400, 404, 411, 415,
-- 420, 424, 428, 432, 444, 456, 466, 472, 478, 488,
-- 494, 500, 507, 514, 520, 526, 532, 539, 546, 552,
-- 554, 558, 562, 566, 570, 575, 580, 590, 600, 606,
-- 614, 619, 626, 633, 641, 651, 660, 669, 681, 691,
-- 696, 702, 709, 717, 724, 729, 736, 742, 749, 756,
-- 761, 770, 781, 792, 805, 811, 818, 824, 831, 836,
-- 841, 846, 854, 864, 874, 884, 891, 898, 905, 914,
-- 923, 930, 936, 942, 951, 956, 964, 966, 968, 970,
-- 972, 974, 976, 978, 980, 982, 984, 987, 990, 995,
-- 1000, 1007, 1014, 1017, 1020, 1025, 1028, 1031, 1034, 1037,
-- 1040, 1043, 1050, 1057, 1063, 1068, 1072, 1076, 1080, 1084,
-- 1088, 1092, 1097, 1100, 1105, 1108, 1113, 1116, 1121, 1124,
-- 1132, 1141, 1150, 1158, 1166, 1174, 1184, 1192, 1201, 1211,
-- 1220, 1227, 1235, 1244, 1254, 1263, 1271, 1279, 1286, 1298,
-- 1306, 1318, 1326, 1330, 1333, 1335, 1343, 1353, 1365, 1369,
-- 1375, 1383, 1386, 1389, 1392, 1395, 1397, 1399, 1402, 1405,
-- 1410, 1412, 1414, 1421, 1428, 1435, 1438, 1441, 1443, 1445,
-- 1446, 1452, 1458, 1462, 1466, 1470, 1474, 1475, 1477, 1479,
-- 1481, 1483, 1485, 1486, 1490, 1491, 1495, 1499, 1500, 1504,
-- 1508, 1514, 1520, 1521, 1525, 1529, 1530, 1534, 1538, 1539,
-- 1543, 1547, 1551, 1557, 1563, 1564, 1568, 1569, 1573, 1575,
-- 1577, 1579, 1581, 1582, 1586, 1590, 1594, 1600, 1606, 1608,
-- 1610, 1612, 1613, 1617, 1618, 1622, 1627, 1632, 1634, 1636,
-- 1638, 1640, 1642, 1644, 1646, 1648, 1652, 1656, 1660, 1664,
-- 1670, 1676, 1682, 1688, 1692, 1696, 1702, 1708, 1709, 1711,
-- 1713, 1716, 1719, 1722, 1726, 1728, 1734, 1740, 1744, 1747,
-- 1750, 1753, 1757, 1759, 1761, 1763, 1765, 1769, 1773, 1777,
-- 1781, 1783, 1785, 1787, 1789, 1793, 1795, 1797, 1801, 1803,
-- 1805, 1809, 1812, 1815, 1817, 1821, 1825, 1829, 1833, 1837,
-- 1841, 1845, 1849, 1853, 1857
--};
--
--/* YYRHS -- A `-1'-separated list of the rules' RHS. */
--static const yytype_int16 yyrhs[] =
--{
-- 175, 0, -1, -1, 176, -1, 177, 160, -1, 177,
-- 77, 177, 77, 177, 160, -1, 177, 77, 177, 160,
-- -1, 1, -1, 166, -1, 208, 179, -1, 208, 179,
-- 157, 208, 179, -1, 55, -1, 25, 97, 162, 207,
-- 178, 161, -1, 35, 97, 162, 207, 178, 161, -1,
-- 32, 97, 35, -1, 34, 97, 35, -1, 162, 25,
-- 157, 25, 161, 97, 3, 162, 25, 159, 219, 157,
-- 25, 159, 219, 161, 192, -1, 162, 25, 157, 25,
-- 161, 97, 4, 162, 25, 159, 219, 157, 25, 159,
-- 219, 161, 192, -1, 162, 25, 157, 25, 161, 97,
-- 8, 25, 159, 219, 192, -1, 162, 25, 157, 25,
-- 161, 97, 19, 25, 162, 191, 161, -1, 25, 97,
-- 33, 70, 34, 157, 25, 97, 31, 70, 32, -1,
-- 25, 97, 178, 70, 178, 157, 25, 97, 178, 69,
-- 178, 184, -1, 25, 97, 25, 201, 25, 157, 25,
-- 97, 25, 201, 25, 184, -1, 25, 97, 25, 200,
-- 25, 157, 25, 97, 25, 200, 25, 185, -1, 25,
-- 97, 76, 25, 189, -1, 205, 76, 178, -1, 31,
-- 97, 35, -1, 33, 97, 35, -1, 25, 97, 194,
-- 162, 25, 157, 25, 161, -1, 25, 97, 5, 162,
-- 25, 159, 219, 157, 25, 159, 219, 161, 193, -1,
-- 25, 97, 5, 162, 25, 159, 219, 157, 25, 159,
-- 219, 161, -1, 25, 97, 6, 162, 25, 159, 219,
-- 157, 25, 159, 219, 161, 202, -1, 25, 97, 7,
-- 162, 25, 159, 219, 157, 25, 159, 219, 161, 203,
-- -1, 25, 97, 9, 162, 25, 157, 25, 161, -1,
-- 35, 97, 35, 97, 21, 162, 35, 161, 71, 35,
-- 70, 21, 162, 35, 161, 71, 35, -1, 25, 97,
-- 25, 201, 25, 184, -1, 25, 97, 199, 162, 25,
-- 157, 25, 161, 189, -1, 205, 69, 178, -1, 35,
-- 97, 35, 201, 35, 184, -1, 205, 205, 219, -1,
-- 205, 178, 162, 125, 161, -1, 35, 97, 25, 162,
-- 137, 161, -1, 35, 97, 25, 201, 25, 162, 140,
-- 161, -1, 35, 97, 25, 201, 25, 162, 141, 161,
-- -1, 205, 178, -1, 205, 25, -1, 25, 97, 35,
-- 186, -1, 35, 97, 219, -1, 205, 219, -1, 25,
-- 97, 219, 187, -1, 35, 97, 25, -1, 25, 97,
-- 25, 200, 25, 183, -1, 25, 97, 28, 186, -1,
-- 205, 76, 178, 157, 205, 76, 178, -1, 205, 69,
-- 178, 157, 205, 69, 178, -1, 206, 178, 195, -1,
-- 25, 102, 219, -1, 25, 103, 25, 162, 131, 161,
-- -1, 25, 102, 25, -1, 178, 103, 178, 195, -1,
-- 25, 103, 25, -1, 25, 103, 219, -1, 25, 98,
-- 25, -1, 11, 162, 25, 159, 219, 157, 25, 159,
-- 219, 161, 192, -1, 205, 178, 162, 125, 161, 157,
-- 205, 178, 162, 125, 161, -1, 25, 97, 162, 25,
-- 70, 25, 161, 90, 219, -1, 25, 97, 25, 65,
-- 25, -1, 25, 97, 25, 67, 25, -1, 25, 97,
-- 25, 70, 162, 25, 90, 219, 161, -1, 27, 97,
-- 178, 106, 178, -1, 27, 97, 178, 111, 178, -1,
-- 27, 97, 25, 111, 25, 196, -1, 27, 97, 25,
-- 111, 219, 196, -1, 27, 97, 25, 106, 25, -1,
-- 27, 97, 25, 106, 219, -1, 27, 97, 178, 105,
-- 178, -1, 27, 97, 25, 105, 25, 196, -1, 27,
-- 97, 25, 105, 219, 196, -1, 25, 97, 25, 64,
-- 25, -1, 212, -1, 25, 97, 25, -1, 27, 97,
-- 25, -1, 25, 97, 27, -1, 27, 104, 27, -1,
-- 35, 97, 210, 179, -1, 25, 97, 210, 179, -1,
-- 35, 97, 210, 179, 157, 35, 97, 210, 179, -1,
-- 25, 97, 210, 179, 157, 25, 97, 210, 179, -1,
-- 205, 86, 178, 158, 35, -1, 35, 97, 86, 35,
-- 158, 35, 190, -1, 205, 178, 90, 219, -1, 25,
-- 97, 25, 90, 219, 188, -1, 35, 97, 35, 90,
-- 219, 190, -1, 25, 97, 86, 25, 158, 35, 188,
-- -1, 35, 97, 18, 162, 25, 157, 35, 161, 189,
-- -1, 35, 97, 18, 162, 35, 157, 35, 161, -1,
-- 25, 97, 17, 162, 25, 157, 25, 161, -1, 25,
-- 97, 17, 162, 25, 157, 25, 161, 162, 132, 161,
-- -1, 25, 97, 16, 162, 25, 157, 35, 161, 186,
-- -1, 205, 178, 92, 219, -1, 205, 85, 178, 158,
-- 35, -1, 35, 97, 85, 35, 158, 35, -1, 25,
-- 97, 85, 25, 158, 35, 189, -1, 25, 97, 84,
-- 25, 158, 35, -1, 205, 178, 91, 219, -1, 25,
-- 97, 25, 91, 219, 189, -1, 35, 97, 35, 91,
-- 219, -1, 35, 97, 35, 92, 219, 190, -1, 25,
-- 97, 25, 92, 219, 188, -1, 35, 97, 20, 25,
-- -1, 25, 97, 10, 162, 35, 157, 35, 161, -1,
-- 35, 97, 27, 97, 87, 162, 178, 157, 25, 161,
-- -1, 35, 97, 27, 97, 68, 162, 178, 157, 25,
-- 161, -1, 35, 97, 27, 97, 68, 162, 178, 157,
-- 178, 157, 27, 161, -1, 205, 89, 178, 158, 35,
-- -1, 25, 97, 89, 25, 158, 35, -1, 205, 89,
-- 178, 158, 219, -1, 25, 97, 89, 25, 158, 219,
-- -1, 35, 97, 22, 178, -1, 35, 97, 22, 25,
-- -1, 35, 97, 22, 35, -1, 35, 97, 15, 162,
-- 25, 161, 180, -1, 25, 97, 15, 162, 25, 157,
-- 25, 161, 180, -1, 149, 162, 25, 157, 25, 157,
-- 178, 161, 180, -1, 205, 87, 162, 178, 157, 178,
-- 157, 27, 161, -1, 146, 162, 25, 157, 219, 161,
-- -1, 147, 162, 25, 157, 219, 161, -1, 145, 162,
-- 25, 157, 219, 161, -1, 27, 104, 148, 162, 25,
-- 157, 219, 161, -1, 27, 97, 148, 162, 25, 157,
-- 219, 161, -1, 156, 63, 27, 25, 97, 25, -1,
-- 156, 27, 25, 97, 25, -1, 156, 63, 27, 56,
-- 219, -1, 156, 63, 27, 56, 219, 162, 130, 161,
-- -1, 156, 27, 56, 219, -1, 156, 27, 56, 219,
-- 162, 130, 161, -1, 36, -1, 38, -1, 37, -1,
-- 39, -1, 40, -1, 41, -1, 43, -1, 46, -1,
-- 47, -1, 48, -1, 45, 25, -1, 44, 25, -1,
-- 56, 162, 25, 161, -1, 59, 162, 25, 161, -1,
-- 59, 162, 26, 70, 25, 161, -1, 56, 162, 26,
-- 70, 25, 161, -1, 49, 219, -1, 50, 219, -1,
-- 119, 162, 25, 161, -1, 56, 219, -1, 57, 219,
-- -1, 58, 219, -1, 58, 217, -1, 59, 219, -1,
-- 59, 217, -1, 96, 162, 25, 157, 25, 161, -1,
-- 95, 162, 25, 157, 25, 161, -1, 25, 97, 69,
-- 25, 188, -1, 25, 97, 62, 25, -1, 25, 94,
-- 25, -1, 25, 94, 219, -1, 25, 88, 25, -1,
-- 25, 93, 25, -1, 25, 93, 219, -1, 25, 88,
-- 219, -1, 113, 163, 25, 164, -1, 113, 198, -1,
-- 112, 163, 25, 164, -1, 112, 198, -1, 114, 163,
-- 25, 164, -1, 114, 198, -1, 115, 163, 25, 164,
-- -1, 115, 198, -1, 122, 163, 25, 204, 164, 97,
-- 25, -1, 122, 163, 25, 201, 219, 164, 97, 25,
-- -1, 123, 163, 25, 201, 219, 164, 97, 25, -1,
-- 123, 163, 25, 204, 164, 97, 25, -1, 123, 163,
-- 25, 204, 164, 97, 35, -1, 163, 25, 201, 219,
-- 164, 97, 25, -1, 25, 97, 123, 163, 25, 201,
-- 219, 164, 186, -1, 35, 97, 123, 163, 25, 204,
-- 164, -1, 25, 97, 123, 163, 25, 204, 164, 186,
-- -1, 25, 97, 123, 163, 25, 83, 25, 164, 186,
-- -1, 35, 97, 123, 163, 25, 83, 25, 164, -1,
-- 163, 25, 204, 164, 97, 25, -1, 163, 25, 83,
-- 25, 164, 97, 25, -1, 123, 163, 25, 83, 25,
-- 164, 97, 35, -1, 25, 97, 122, 163, 25, 201,
-- 219, 164, 186, -1, 25, 97, 122, 163, 25, 204,
-- 164, 186, -1, 25, 97, 163, 25, 83, 25, 164,
-- -1, 25, 97, 163, 25, 201, 216, 164, -1, 25,
-- 97, 163, 25, 204, 164, -1, 197, 97, 162, 25,
-- 159, 219, 157, 25, 159, 219, 161, -1, 197, 97,
-- 162, 25, 159, 219, 161, -1, 162, 25, 159, 219,
-- 157, 25, 159, 219, 161, 97, 198, -1, 162, 25,
-- 159, 219, 161, 97, 198, -1, 197, 97, 25, -1,
-- 23, 219, -1, 24, -1, 51, 162, 219, 157, 219,
-- 161, 25, -1, 51, 162, 219, 157, 219, 161, 25,
-- 97, 25, -1, 51, 162, 219, 157, 219, 161, 25,
-- 97, 25, 91, 219, -1, 52, 219, 25, -1, 52,
-- 219, 25, 97, 25, -1, 52, 219, 25, 97, 25,
-- 91, 219, -1, 53, 168, -1, 53, 219, -1, 54,
-- 168, -1, 54, 219, -1, 60, -1, 153, -1, 153,
-- 178, -1, 153, 25, -1, 155, 162, 25, 161, -1,
-- 152, -1, 42, -1, 154, 162, 35, 157, 219, 161,
-- -1, 151, 162, 25, 157, 219, 161, -1, 150, 162,
-- 25, 157, 219, 161, -1, 117, 219, -1, 117, 25,
-- -1, 29, -1, 30, -1, -1, 162, 134, 157, 135,
-- 161, -1, 162, 135, 157, 134, 161, -1, 162, 135,
-- 161, -1, 162, 134, 161, -1, 162, 120, 161, -1,
-- 162, 121, 161, -1, -1, 125, -1, 126, -1, 127,
-- -1, 120, -1, 121, -1, -1, 162, 181, 161, -1,
-- -1, 162, 124, 161, -1, 162, 125, 161, -1, -1,
-- 162, 182, 161, -1, 162, 181, 161, -1, 162, 182,
-- 157, 181, 161, -1, 162, 181, 157, 182, 161, -1,
-- -1, 162, 133, 161, -1, 162, 132, 161, -1, -1,
-- 162, 132, 161, -1, 162, 133, 161, -1, -1, 162,
-- 124, 161, -1, 162, 125, 161, -1, 162, 142, 161,
-- -1, 162, 142, 157, 125, 161, -1, 162, 125, 157,
-- 142, 161, -1, -1, 162, 142, 161, -1, -1, 162,
-- 125, 161, -1, 107, -1, 110, -1, 109, -1, 108,
-- -1, -1, 162, 136, 161, -1, 162, 136, 161, -1,
-- 162, 135, 161, -1, 162, 135, 157, 136, 161, -1,
-- 162, 136, 157, 135, 161, -1, 12, -1, 13, -1,
-- 14, -1, -1, 162, 135, 161, -1, -1, 162, 135,
-- 161, -1, 163, 82, 25, 164, -1, 163, 25, 83,
-- 164, -1, 74, -1, 75, -1, 78, -1, 79, -1,
-- 80, -1, 81, -1, 70, -1, 69, -1, 162, 139,
-- 161, -1, 162, 128, 161, -1, 162, 138, 161, -1,
-- 162, 129, 161, -1, 162, 139, 157, 136, 161, -1,
-- 162, 128, 157, 136, 161, -1, 162, 138, 157, 136,
-- 161, -1, 162, 129, 157, 136, 161, -1, 162, 143,
-- 161, -1, 162, 144, 161, -1, 162, 143, 157, 136,
-- 161, -1, 162, 144, 157, 136, 161, -1, -1, 83,
-- -1, 82, -1, 178, 97, -1, 178, 102, -1, 178,
-- 103, -1, 25, 97, 178, -1, 209, -1, 25, 97,
-- 162, 209, 161, -1, 35, 97, 162, 209, 161, -1,
-- 35, 97, 178, -1, 205, 210, -1, 207, 210, -1,
-- 206, 210, -1, 35, 71, 35, -1, 97, -1, 99,
-- -1, 101, -1, 100, -1, 27, 211, 165, -1, 27,
-- 211, 142, -1, 165, 211, 27, -1, 142, 211, 27,
-- -1, 167, -1, 169, -1, 170, -1, 171, -1, 213,
-- 172, 214, -1, 215, -1, 219, -1, 213, 172, 173,
-- -1, 168, -1, 213, -1, 162, 220, 161, -1, 62,
-- 220, -1, 69, 220, -1, 220, -1, 220, 71, 220,
-- -1, 220, 72, 220, -1, 220, 66, 220, -1, 220,
-- 70, 220, -1, 220, 69, 220, -1, 220, 90, 220,
-- -1, 220, 91, 220, -1, 220, 64, 220, -1, 220,
-- 67, 220, -1, 220, 65, 220, -1, 218, -1
--};
--
--/* YYRLINE[YYN] -- source line where rule number YYN was defined. */
--static const yytype_uint16 yyrline[] =
--{
-- 0, 649, 649, 650, 662, 664, 697, 724, 735, 739,
-- 777, 797, 802, 812, 822, 827, 832, 850, 868, 882,
-- 895, 911, 933, 951, 976, 998, 1003, 1013, 1024, 1035,
-- 1049, 1064, 1080, 1096, 1107, 1121, 1147, 1165, 1170, 1176,
-- 1188, 1199, 1210, 1221, 1232, 1243, 1254, 1280, 1294, 1304,
-- 1349, 1368, 1379, 1390, 1401, 1412, 1423, 1439, 1456, 1472,
-- 1483, 1494, 1527, 1538, 1551, 1562, 1601, 1611, 1621, 1641,
-- 1651, 1661, 1672, 1686, 1697, 1710, 1720, 1732, 1747, 1758,
-- 1764, 1786, 1797, 1808, 1816, 1842, 1872, 1901, 1932, 1946,
-- 1957, 1971, 2005, 2023, 2048, 2060, 2078, 2089, 2100, 2111,
-- 2124, 2135, 2146, 2157, 2168, 2179, 2212, 2222, 2235, 2255,
-- 2266, 2277, 2290, 2303, 2314, 2325, 2336, 2347, 2357, 2368,
-- 2379, 2391, 2402, 2413, 2427, 2440, 2452, 2464, 2475, 2486,
-- 2497, 2509, 2521, 2532, 2543, 2554, 2564, 2570, 2576, 2582,
-- 2588, 2594, 2600, 2606, 2612, 2618, 2624, 2635, 2646, 2657,
-- 2668, 2679, 2690, 2701, 2707, 2721, 2732, 2743, 2754, 2765,
-- 2775, 2788, 2796, 2804, 2828, 2839, 2850, 2861, 2872, 2883,
-- 2895, 2908, 2917, 2928, 2939, 2951, 2962, 2973, 2984, 2998,
-- 3010, 3036, 3066, 3077, 3102, 3139, 3167, 3192, 3203, 3214,
-- 3225, 3251, 3270, 3284, 3308, 3320, 3339, 3385, 3422, 3438,
-- 3457, 3471, 3490, 3506, 3514, 3523, 3534, 3546, 3560, 3568,
-- 3578, 3590, 3601, 3611, 3622, 3633, 3639, 3644, 3649, 3655,
-- 3663, 3669, 3675, 3681, 3687, 3693, 3701, 3715, 3719, 3729,
-- 3733, 3738, 3743, 3748, 3755, 3759, 3766, 3770, 3775, 3780,
-- 3788, 3792, 3799, 3803, 3811, 3816, 3822, 3831, 3836, 3842,
-- 3848, 3854, 3863, 3866, 3870, 3877, 3880, 3884, 3891, 3896,
-- 3902, 3908, 3914, 3919, 3927, 3930, 3937, 3940, 3947, 3951,
-- 3955, 3959, 3966, 3969, 3976, 3981, 3988, 3995, 4007, 4011,
-- 4015, 4022, 4025, 4035, 4038, 4047, 4053, 4062, 4066, 4073,
-- 4077, 4081, 4085, 4092, 4096, 4103, 4111, 4119, 4127, 4135,
-- 4142, 4149, 4157, 4167, 4172, 4177, 4182, 4190, 4193, 4197,
-- 4206, 4213, 4220, 4227, 4242, 4248, 4261, 4274, 4292, 4299,
-- 4306, 4316, 4329, 4333, 4337, 4341, 4348, 4354, 4360, 4366,
-- 4376, 4385, 4387, 4389, 4393, 4401, 4405, 4412, 4418, 4424,
-- 4428, 4432, 4436, 4442, 4448, 4452, 4456, 4460, 4464, 4468,
-- 4472, 4476, 4480, 4484, 4488
--};
--#endif
--
--#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE
--/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
-- First, the terminals, then, starting at YYNTOKENS, nonterminals. */
--static const char *const yytname[] =
--{
-- "$end", "error", "$undefined", "BYTEOP16P", "BYTEOP16M", "BYTEOP1P",
-- "BYTEOP2P", "BYTEOP3P", "BYTEUNPACK", "BYTEPACK", "PACK", "SAA",
-- "ALIGN8", "ALIGN16", "ALIGN24", "VIT_MAX", "EXTRACT", "DEPOSIT",
-- "EXPADJ", "SEARCH", "ONES", "SIGN", "SIGNBITS", "LINK", "UNLINK", "REG",
-- "PC", "CCREG", "BYTE_DREG", "REG_A_DOUBLE_ZERO", "REG_A_DOUBLE_ONE",
-- "A_ZERO_DOT_L", "A_ZERO_DOT_H", "A_ONE_DOT_L", "A_ONE_DOT_H", "HALF_REG",
-- "NOP", "RTI", "RTS", "RTX", "RTN", "RTE", "HLT", "IDLE", "STI", "CLI",
-- "CSYNC", "SSYNC", "EMUEXCPT", "RAISE", "EXCPT", "LSETUP", "LOOP",
-- "LOOP_BEGIN", "LOOP_END", "DISALGNEXCPT", "JUMP", "JUMP_DOT_S",
-- "JUMP_DOT_L", "CALL", "ABORT", "NOT", "TILDA", "BANG", "AMPERSAND",
-- "BAR", "PERCENT", "CARET", "BXOR", "MINUS", "PLUS", "STAR", "SLASH",
-- "NEG", "MIN", "MAX", "ABS", "DOUBLE_BAR", "_PLUS_BAR_PLUS",
-- "_PLUS_BAR_MINUS", "_MINUS_BAR_PLUS", "_MINUS_BAR_MINUS", "_MINUS_MINUS",
-- "_PLUS_PLUS", "SHIFT", "LSHIFT", "ASHIFT", "BXORSHIFT",
-- "_GREATER_GREATER_GREATER_THAN_ASSIGN", "ROT", "LESS_LESS",
-- "GREATER_GREATER", "_GREATER_GREATER_GREATER", "_LESS_LESS_ASSIGN",
-- "_GREATER_GREATER_ASSIGN", "DIVS", "DIVQ", "ASSIGN", "_STAR_ASSIGN",
-- "_BAR_ASSIGN", "_CARET_ASSIGN", "_AMPERSAND_ASSIGN", "_MINUS_ASSIGN",
-- "_PLUS_ASSIGN", "_ASSIGN_BANG", "_LESS_THAN_ASSIGN", "_ASSIGN_ASSIGN",
-- "GE", "LT", "LE", "GT", "LESS_THAN", "FLUSHINV", "FLUSH", "IFLUSH",
-- "PREFETCH", "PRNT", "OUTC", "WHATREG", "TESTSET", "ASL", "ASR", "B", "W",
-- "NS", "S", "CO", "SCO", "TH", "TL", "BP", "BREV", "X", "Z", "M", "MMOD",
-- "R", "RND", "RNDL", "RNDH", "RND12", "RND20", "V", "LO", "HI", "BITTGL",
-- "BITCLR", "BITSET", "BITTST", "BITMUX", "DBGAL", "DBGAH", "DBGHALT",
-- "DBG", "DBGA", "DBGCMPLX", "IF", "COMMA", "BY", "COLON", "SEMICOLON",
-- "RPAREN", "LPAREN", "LBRACK", "RBRACK", "STATUS_REG", "MNOP", "SYMBOL",
-- "NUMBER", "GOT", "GOT17M4", "FUNCDESC_GOT17M4", "AT", "PLTPC", "$accept",
-- "statement", "asm", "asm_1", "REG_A", "opt_mode", "asr_asl", "sco",
-- "asr_asl_0", "amod0", "amod1", "amod2", "xpmod", "xpmod1", "vsmod",
-- "vmod", "smod", "searchmod", "aligndir", "byteop_mod", "c_align",
-- "w32_or_nothing", "iu_or_nothing", "reg_with_predec", "reg_with_postinc",
-- "min_max", "op_bar_op", "plus_minus", "rnd_op", "b3_op", "post_op",
-- "a_assign", "a_minusassign", "a_plusassign", "assign_macfunc",
-- "a_macfunc", "multiply_halfregs", "cc_op", "ccstat", "symbol",
-- "any_gotrel", "got", "got_or_expr", "pltpc", "eterm", "expr", "expr_1", 0
--};
--#endif
--
--# ifdef YYPRINT
--/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to
-- token YYLEX-NUM. */
--static const yytype_uint16 yytoknum[] =
--{
-- 0, 256, 257, 258, 259, 260, 261, 262, 263, 264,
-- 265, 266, 267, 268, 269, 270, 271, 272, 273, 274,
-- 275, 276, 277, 278, 279, 280, 281, 282, 283, 284,
-- 285, 286, 287, 288, 289, 290, 291, 292, 293, 294,
-- 295, 296, 297, 298, 299, 300, 301, 302, 303, 304,
-- 305, 306, 307, 308, 309, 310, 311, 312, 313, 314,
-- 315, 316, 317, 318, 319, 320, 321, 322, 323, 324,
-- 325, 326, 327, 328, 329, 330, 331, 332, 333, 334,
-- 335, 336, 337, 338, 339, 340, 341, 342, 343, 344,
-- 345, 346, 347, 348, 349, 350, 351, 352, 353, 354,
-- 355, 356, 357, 358, 359, 360, 361, 362, 363, 364,
-- 365, 366, 367, 368, 369, 370, 371, 372, 373, 374,
-- 375, 376, 377, 378, 379, 380, 381, 382, 383, 384,
-- 385, 386, 387, 388, 389, 390, 391, 392, 393, 394,
-- 395, 396, 397, 398, 399, 400, 401, 402, 403, 404,
-- 405, 406, 407, 408, 409, 410, 411, 412, 413, 414,
-- 415, 416, 417, 418, 419, 420, 421, 422, 423, 424,
-- 425, 426, 427, 428
--};
--# endif
--
--/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */
--static const yytype_uint8 yyr1[] =
--{
-- 0, 174, 175, 175, 176, 176, 176, 176, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 178, 178, 179,
-- 179, 179, 179, 179, 180, 180, 181, 181, 181, 181,
-- 182, 182, 183, 183, 184, 184, 184, 185, 185, 185,
-- 185, 185, 186, 186, 186, 187, 187, 187, 188, 188,
-- 188, 188, 188, 188, 189, 189, 190, 190, 191, 191,
-- 191, 191, 192, 192, 193, 193, 193, 193, 194, 194,
-- 194, 195, 195, 196, 196, 197, 198, 199, 199, 200,
-- 200, 200, 200, 201, 201, 202, 202, 202, 202, 202,
-- 202, 202, 202, 203, 203, 203, 203, 204, 204, 204,
-- 205, 206, 207, 208, 208, 208, 208, 208, 209, 209,
-- 209, 210, 211, 211, 211, 211, 212, 212, 212, 212,
-- 213, 214, 214, 214, 215, 216, 216, 217, 218, 218,
-- 218, 218, 218, 219, 220, 220, 220, 220, 220, 220,
-- 220, 220, 220, 220, 220
--};
--
--/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */
--static const yytype_uint8 yyr2[] =
--{
-- 0, 2, 0, 1, 2, 6, 4, 1, 1, 2,
-- 5, 1, 6, 6, 3, 3, 17, 17, 11, 11,
-- 11, 12, 12, 12, 5, 3, 3, 3, 8, 13,
-- 12, 13, 13, 8, 17, 6, 9, 3, 6, 3,
-- 5, 6, 8, 8, 2, 2, 4, 3, 2, 4,
-- 3, 6, 4, 7, 7, 3, 3, 6, 3, 4,
-- 3, 3, 3, 11, 11, 9, 5, 5, 9, 5,
-- 5, 6, 6, 5, 5, 5, 6, 6, 5, 1,
-- 3, 3, 3, 3, 4, 4, 9, 9, 5, 7,
-- 4, 6, 6, 7, 9, 8, 8, 11, 9, 4,
-- 5, 6, 7, 6, 4, 6, 5, 6, 6, 4,
-- 8, 10, 10, 12, 5, 6, 5, 6, 4, 4,
-- 4, 7, 9, 9, 9, 6, 6, 6, 8, 8,
-- 6, 5, 5, 8, 4, 7, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 2, 2, 4, 4,
-- 6, 6, 2, 2, 4, 2, 2, 2, 2, 2,
-- 2, 6, 6, 5, 4, 3, 3, 3, 3, 3,
-- 3, 4, 2, 4, 2, 4, 2, 4, 2, 7,
-- 8, 8, 7, 7, 7, 9, 7, 8, 9, 8,
-- 6, 7, 8, 9, 8, 7, 7, 6, 11, 7,
-- 11, 7, 3, 2, 1, 7, 9, 11, 3, 5,
-- 7, 2, 2, 2, 2, 1, 1, 2, 2, 4,
-- 1, 1, 6, 6, 6, 2, 2, 1, 1, 0,
-- 5, 5, 3, 3, 3, 3, 0, 1, 1, 1,
-- 1, 1, 0, 3, 0, 3, 3, 0, 3, 3,
-- 5, 5, 0, 3, 3, 0, 3, 3, 0, 3,
-- 3, 3, 5, 5, 0, 3, 0, 3, 1, 1,
-- 1, 1, 0, 3, 3, 3, 5, 5, 1, 1,
-- 1, 0, 3, 0, 3, 4, 4, 1, 1, 1,
-- 1, 1, 1, 1, 1, 3, 3, 3, 3, 5,
-- 5, 5, 5, 3, 3, 5, 5, 0, 1, 1,
-- 2, 2, 2, 3, 1, 5, 5, 3, 2, 2,
-- 2, 3, 1, 1, 1, 1, 3, 3, 3, 3,
-- 1, 1, 1, 1, 3, 1, 1, 3, 1, 1,
-- 3, 2, 2, 1, 3, 3, 3, 3, 3, 3,
-- 3, 3, 3, 3, 1
--};
--
--/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
-- STATE-NUM when YYTABLE doesn't specify something else to do. Zero
-- means the default is an error. */
--static const yytype_uint16 yydefact[] =
--{
-- 0, 7, 0, 0, 204, 0, 0, 227, 228, 0,
-- 0, 0, 0, 0, 136, 138, 137, 139, 140, 141,
-- 221, 142, 0, 0, 143, 144, 145, 0, 0, 0,
-- 0, 0, 0, 11, 0, 0, 0, 0, 215, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 220, 216, 0, 0,
-- 0, 0, 0, 0, 8, 0, 3, 0, 0, 0,
-- 0, 0, 0, 229, 314, 79, 0, 0, 0, 0,
-- 330, 338, 339, 354, 203, 343, 0, 0, 0, 0,
-- 0, 0, 0, 322, 323, 325, 324, 0, 0, 0,
-- 0, 0, 0, 0, 147, 146, 152, 153, 0, 0,
-- 338, 212, 338, 214, 0, 155, 156, 339, 158, 157,
-- 0, 160, 159, 0, 0, 0, 174, 0, 172, 0,
-- 176, 0, 178, 226, 225, 0, 0, 0, 322, 0,
-- 0, 0, 0, 0, 0, 0, 218, 217, 0, 0,
-- 0, 0, 0, 307, 0, 0, 1, 0, 4, 310,
-- 311, 312, 0, 45, 0, 0, 0, 0, 0, 0,
-- 0, 44, 0, 318, 48, 281, 320, 319, 0, 9,
-- 0, 341, 342, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 167, 170, 168, 169, 165, 166,
-- 0, 0, 0, 0, 0, 278, 279, 280, 0, 0,
-- 0, 80, 82, 252, 0, 252, 0, 0, 287, 288,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 313,
-- 0, 0, 229, 255, 62, 58, 56, 60, 61, 81,
-- 0, 0, 83, 0, 327, 326, 26, 14, 27, 15,
-- 0, 0, 0, 0, 50, 0, 0, 0, 0, 0,
-- 0, 317, 229, 47, 0, 208, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 307, 307,
-- 329, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 294, 293, 309, 308, 0, 0,
-- 0, 328, 0, 281, 202, 0, 0, 37, 25, 0,
-- 0, 0, 0, 0, 0, 0, 0, 39, 0, 55,
-- 0, 0, 0, 0, 340, 351, 353, 346, 352, 348,
-- 347, 344, 345, 349, 350, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 293, 289, 290, 291,
-- 292, 0, 0, 0, 0, 0, 0, 52, 0, 46,
-- 164, 258, 264, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 307, 0, 0, 0, 85,
-- 0, 49, 0, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 109, 119, 120, 118, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 84, 0, 0, 148, 0, 337, 149, 0, 0, 0,
-- 0, 173, 171, 175, 177, 154, 308, 0, 0, 308,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 219,
-- 0, 134, 0, 0, 0, 0, 0, 0, 0, 285,
-- 0, 6, 59, 0, 321, 0, 0, 0, 0, 0,
-- 0, 90, 104, 99, 0, 0, 0, 233, 0, 232,
-- 0, 0, 229, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 78, 66, 67, 0, 258, 264, 258, 242,
-- 244, 0, 0, 0, 0, 163, 0, 24, 0, 0,
-- 0, 0, 307, 307, 0, 312, 0, 315, 308, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 283, 283,
-- 73, 74, 283, 283, 0, 75, 69, 70, 0, 0,
-- 0, 0, 0, 0, 0, 0, 266, 106, 266, 0,
-- 244, 0, 0, 307, 0, 316, 0, 0, 209, 0,
-- 0, 0, 0, 286, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 131, 0, 0, 132,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 0, 100, 88, 0, 114, 116, 40, 282, 0, 0,
-- 0, 0, 10, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 91, 105, 108, 0, 236, 51, 0,
-- 0, 35, 254, 253, 0, 0, 0, 0, 0, 103,
-- 264, 258, 115, 117, 0, 0, 308, 0, 0, 0,
-- 12, 0, 339, 335, 0, 336, 197, 0, 0, 0,
-- 0, 256, 257, 57, 0, 76, 77, 71, 72, 0,
-- 0, 0, 0, 0, 41, 0, 0, 0, 0, 92,
-- 107, 0, 38, 101, 266, 308, 0, 13, 0, 0,
-- 0, 151, 150, 162, 161, 0, 0, 0, 0, 0,
-- 127, 125, 126, 0, 224, 223, 222, 0, 130, 0,
-- 0, 0, 0, 0, 0, 190, 5, 0, 0, 0,
-- 0, 0, 230, 231, 0, 313, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 237, 238,
-- 239, 0, 0, 0, 0, 0, 259, 0, 260, 0,
-- 261, 265, 102, 93, 0, 252, 0, 0, 252, 0,
-- 195, 0, 196, 0, 0, 0, 0, 0, 0, 0,
-- 0, 121, 0, 0, 0, 0, 0, 0, 0, 0,
-- 89, 0, 186, 0, 205, 210, 0, 179, 0, 0,
-- 182, 183, 0, 135, 0, 0, 0, 0, 0, 0,
-- 0, 201, 191, 184, 0, 199, 54, 53, 0, 0,
-- 0, 0, 0, 0, 33, 110, 0, 252, 96, 0,
-- 0, 243, 0, 245, 246, 0, 0, 0, 252, 194,
-- 252, 252, 187, 0, 331, 332, 333, 334, 0, 28,
-- 264, 229, 284, 129, 128, 0, 0, 264, 95, 42,
-- 43, 0, 0, 267, 0, 189, 229, 0, 180, 192,
-- 181, 0, 133, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 122, 98, 0, 68,
-- 0, 0, 0, 263, 262, 193, 188, 185, 65, 0,
-- 36, 87, 234, 235, 94, 0, 0, 0, 0, 86,
-- 206, 123, 0, 0, 0, 0, 0, 0, 124, 0,
-- 272, 0, 0, 0, 0, 0, 0, 0, 0, 112,
-- 0, 111, 0, 0, 0, 0, 272, 268, 271, 270,
-- 269, 0, 0, 0, 0, 0, 63, 0, 0, 0,
-- 97, 247, 244, 20, 244, 0, 0, 207, 0, 0,
-- 18, 19, 200, 198, 64, 0, 30, 0, 0, 236,
-- 23, 22, 21, 113, 0, 0, 0, 273, 0, 29,
-- 0, 31, 0, 32, 240, 241, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 249, 236, 248, 0, 0, 0, 0, 275, 0, 274,
-- 0, 296, 0, 298, 0, 297, 0, 295, 0, 303,
-- 0, 304, 0, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 251, 250, 0, 272, 272,
-- 276, 277, 300, 302, 301, 299, 305, 306, 34, 16,
-- 17
--};
--
--/* YYDEFGOTO[NTERM-NUM]. */
--static const yytype_int16 yydefgoto[] =
--{
-- -1, 65, 66, 67, 370, 179, 751, 721, 957, 608,
-- 611, 940, 357, 381, 495, 497, 659, 911, 916, 949,
-- 230, 319, 645, 69, 126, 231, 354, 298, 951, 953,
-- 299, 371, 372, 72, 73, 74, 177, 98, 75, 82,
-- 817, 633, 634, 118, 83, 84, 85
--};
--
--/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
-- STATE-NUM. */
--#define YYPACT_NINF -869
--static const yytype_int16 yypact[] =
--{
-- 862, -869, -96, -14, -869, 653, 618, -869, -869, -22,
-- -7, 20, 71, 85, -869, -869, -869, -869, -869, -869,
-- -869, -869, 58, 176, -869, -869, -869, -14, -14, 48,
-- -14, 167, 231, -869, 327, -14, -14, 376, -869, 53,
-- 56, 94, 96, 120, 126, 114, 64, 139, 144, 419,
-- 115, 171, 185, 199, 207, 230, -869, 324, 250, 258,
-- 43, 358, 25, 419, -869, 387, -869, -39, 13, 325,
-- 223, 245, 390, 300, -869, -869, 443, -14, -14, -14,
-- -869, -869, -869, -869, -869, 582, 152, 170, 178, 496,
-- 453, 203, 259, 7, -869, -869, -869, 26, -46, 448,
-- 455, 458, 464, 111, -869, -869, -869, -869, -14, 463,
-- -10, -869, -9, -869, 32, -869, -869, 308, -869, -869,
-- 102, -869, -869, 479, 492, 497, -869, 505, -869, 508,
-- -869, 523, -869, -869, -869, 526, 541, 561, -869, 530,
-- 567, 581, 586, 602, 611, 625, -869, -869, 549, 632,
-- 57, 589, 221, 172, 637, 614, -869, 1008, -869, -869,
-- -869, 365, 4, -869, 584, 394, 365, 365, 365, 498,
-- 365, -6, -14, -869, -869, 507, -869, -869, 301, 510,
-- 519, -869, -869, 524, -14, -14, -14, -14, -14, -14,
-- -14, -14, -14, -14, -869, -869, -869, -869, -869, -869,
-- 548, 554, 563, 576, 583, -869, -869, -869, 587, 592,
-- 597, 601, -869, 598, 673, -19, 279, 293, -869, -869,
-- 663, 698, 719, 723, 728, 594, 599, 63, 733, 691,
-- 603, 604, 300, 605, -869, -869, -869, 606, -869, 225,
-- 607, 271, -869, 608, -869, -869, -869, -869, -869, -869,
-- 609, 610, 739, 208, -25, 676, 538, 740, 741, 615,
-- 394, -869, 300, -869, 617, 680, 620, 709, 612, 621,
-- 710, 626, 627, -41, -3, 14, 17, 628, 281, 349,
-- -869, 631, 633, 634, 636, 638, 639, 640, 641, 690,
-- -14, 62, 767, -14, -869, -869, -869, 769, -14, 643,
-- 644, -869, -8, 507, -869, 773, 764, 646, 647, 648,
-- 651, 365, 652, -14, -14, -14, 675, -869, 666, -869,
-- 134, 166, 276, -14, -869, 630, 642, -869, 483, 368,
-- 368, -869, -869, 532, 532, 780, 786, 787, 788, 779,
-- 790, 791, 792, 793, 794, 795, 659, -869, -869, -869,
-- -869, -14, -14, -14, 797, 798, 318, -869, 799, -869,
-- -869, 662, 664, 667, 669, 670, 671, 806, 807, 765,
-- 340, 390, 390, 245, 677, 384, 365, 809, 811, 682,
-- 493, -869, 706, 297, 317, 319, 815, 365, 365, 365,
-- 816, 817, 226, -869, -869, -869, -869, 707, 818, 37,
-- -14, -14, -14, 824, 812, 688, 692, 823, 245, 693,
-- 694, -14, 827, -869, 828, -869, -869, 830, 831, 833,
-- 685, -869, -869, -869, -869, -869, -869, -14, 697, 842,
-- -14, 704, -14, -14, -14, 844, -14, -14, -14, -869,
-- 845, 712, 774, -14, 714, 182, 715, 716, 785, -869,
-- 1008, -869, -869, 724, -869, 365, 365, 849, 853, 766,
-- 100, -869, -869, -869, 729, 763, 796, -869, 800, -869,
-- 829, 832, 300, 768, 771, 776, 777, 770, 775, 781,
-- 783, 784, -869, -869, -869, 903, 662, 664, 662, -58,
-- -15, 772, 782, 789, 33, -869, 802, -869, 902, 907,
-- 910, 472, 281, 445, 924, -869, 801, -869, 925, -14,
-- 803, 804, 808, 813, 926, 805, 810, 819, 820, 820,
-- -869, -869, 820, 820, 821, -869, -869, -869, 826, 825,
-- 834, 835, 836, 837, 838, 839, 840, -869, 840, 841,
-- 843, 917, 918, 562, 859, -869, 919, 860, 864, 861,
-- 865, 868, 869, -869, 846, 863, 870, 872, 866, 908,
-- 909, 911, 914, 912, 913, 915, -869, 857, 931, 916,
-- 867, 934, 871, 875, 876, 944, 920, -14, 891, 921,
-- 922, -869, -869, 365, -869, -869, 927, -869, 928, 929,
-- 5, 10, -869, 964, -14, -14, -14, 968, 959, 970,
-- 961, 981, 933, -869, -869, -869, 1050, 119, -869, 1052,
-- 559, -869, -869, -869, 1054, 930, 211, 247, 932, -869,
-- 664, 662, -869, -869, -14, 923, 1056, -14, 935, 936,
-- -869, 937, 938, -869, 941, -869, -869, 1057, 1058, 1060,
-- 989, -869, -869, -869, 953, -869, -869, -869, -869, -14,
-- -14, 940, 1059, 1061, -869, 546, 365, 365, 967, -869,
-- -869, 1063, -869, -869, 840, 1070, 942, -869, 1003, 1082,
-- -14, -869, -869, -869, -869, 1011, 1084, 1014, 1015, 278,
-- -869, -869, -869, 365, -869, -869, -869, 952, -869, 984,
-- 216, 956, 954, 1091, 1093, -869, -869, 287, 365, 365,
-- 962, 365, -869, -869, 365, -869, 365, 965, 969, 971,
-- 972, 973, 974, 975, 976, 977, -14, 1035, -869, -869,
-- -869, 978, 1036, 979, 980, 1045, -869, 1001, -869, 1019,
-- -869, -869, -869, -869, 982, 598, 983, 985, 598, 1055,
-- -869, 407, -869, 1051, 990, 991, 390, 995, 1004, 1005,
-- 574, -869, 1006, 1007, 1016, 1017, 1012, 1018, 1020, 1021,
-- -869, 1022, -869, 390, 1075, -869, 1151, -869, 1144, 1155,
-- -869, -869, 1023, -869, 1024, 1025, 1026, 1158, 1164, -14,
-- 1165, -869, -869, -869, 1166, -869, -869, -869, 1167, 365,
-- -14, 1168, 1170, 1171, -869, -869, 940, 598, 1030, 1037,
-- 1172, -869, 1174, -869, -869, 1169, 1040, 1041, 598, -869,
-- 598, 598, -869, -14, -869, -869, -869, -869, 365, -869,
-- 664, 300, -869, -869, -869, 1042, 1043, 664, -869, -869,
-- -869, 372, 1180, -869, 1135, -869, 300, 1182, -869, -869,
-- -869, 940, -869, 1183, 1184, 1053, 1048, 1062, 1128, 1065,
-- 1064, 1066, 1068, 1067, 1071, 1072, -869, -869, 1081, -869,
-- 596, 635, 1145, -869, -869, -869, -869, -869, -869, 1147,
-- -869, -869, -869, -869, -869, 1073, 1076, 1074, 1179, -869,
-- 1126, -869, 1077, 1078, -14, 619, 1121, -14, -869, 1094,
-- 1079, -14, -14, -14, 1083, 1195, 1196, 1190, 365, -869,
-- 1200, -869, 1162, -14, -14, -14, 1079, -869, -869, -869,
-- -869, 1085, 954, 1086, 1087, 1102, -869, 1088, 1089, 1090,
-- -869, 1080, 843, -869, 843, 1092, 1218, -869, 1095, 1097,
-- -869, -869, -869, -869, -869, 1096, 1098, 1099, 1100, 350,
-- -869, -869, -869, -869, 1101, 1215, 1220, -869, 595, -869,
-- 84, -869, 591, -869, -869, -869, 312, 375, 1208, 1105,
-- 1106, 378, 402, 403, 418, 426, 460, 476, 481, 616,
-- -869, 119, -869, 1107, -14, -14, 1119, -869, 1123, -869,
-- 1120, -869, 1130, -869, 1131, -869, 1133, -869, 1134, -869,
-- 1136, -869, 1110, 1112, 1188, 1113, 1114, 1115, 1116, 1117,
-- 1118, 1122, 1124, 1125, 1127, -869, -869, 1245, 1079, 1079,
-- -869, -869, -869, -869, -869, -869, -869, -869, -869, -869,
-- -869
--};
--
--/* YYPGOTO[NTERM-NUM]. */
--static const yytype_int16 yypgoto[] =
--{
-- -869, -869, -869, -133, 41, -216, -733, -868, 313, -869,
-- -509, -869, -198, -869, -458, -460, -515, -869, -804, -869,
-- -869, 986, 23, -869, -31, -869, 421, -205, -869, -869,
-- -253, 2, 22, -171, 987, -206, -56, 46, -869, -17,
-- -869, -869, -869, 1247, -869, -27, 0
--};
--
--/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If
-- positive, shift that token. If negative, reduce the rule which
-- number is the opposite. If zero, do what YYDEFACT says.
-- If YYTABLE_NINF, syntax error. */
--#define YYTABLE_NINF -214
--static const yytype_int16 yytable[] =
--{
-- 106, 107, 70, 109, 111, 113, 355, 115, 116, 119,
-- 122, 128, 130, 132, 173, 176, 379, 359, 134, 117,
-- 117, 374, 71, 660, 302, 428, 431, 604, 603, 304,
-- 605, 662, 239, 232, 7, 8, 7, 8, 157, 7,
-- 8, 68, 420, 174, 294, 295, 410, 262, 77, 398,
-- 153, 404, 306, 242, 409, 78, 373, 266, 267, 195,
-- 197, 199, 233, 856, 236, 238, 76, -211, -213, 450,
-- 150, 956, 172, 427, 430, 99, 263, 181, 182, 183,
-- 420, 264, 289, 104, 313, 314, 315, 442, 369, 408,
-- 100, 159, 7, 8, 77, 139, 244, 420, 147, 606,
-- 420, 78, 930, 993, 607, 534, 151, 154, 881, 155,
-- 159, 171, 175, 290, 183, 160, 161, 101, 443, 245,
-- 183, 158, 510, 421, 535, 77, 250, 269, 270, 251,
-- 229, 252, 78, 253, 241, 584, 254, 397, 255, 133,
-- 7, 8, 609, 356, 261, 317, 256, 610, 79, 760,
-- -211, -213, 451, 80, 81, 240, 316, 615, 616, 70,
-- 732, 422, 77, 733, 77, 182, 305, 704, 102, 78,
-- 509, 78, 706, 77, 243, 617, 77, 194, 423, 71,
-- 78, 424, 103, 78, 325, 326, 327, 328, 329, 330,
-- 331, 332, 333, 334, 79, 196, 257, 258, 68, 80,
-- 81, 105, 303, 198, 1019, 1020, 307, 308, 309, 310,
-- 108, 312, 963, 964, 77, 123, 181, 182, 124, 775,
-- 776, 78, 965, 966, 777, 79, 135, 183, 235, 77,
-- 80, 81, 77, 394, 259, 778, 78, 7, 8, 78,
-- 77, 294, 295, 395, 718, 719, 720, 78, 163, 625,
-- 628, 530, 7, 8, 296, 297, 592, 125, 164, 127,
-- 183, 531, 79, 441, 79, 77, 445, 80, 81, 80,
-- 81, 447, 78, 260, 7, 8, 79, 140, 80, 81,
-- 164, 80, 81, 129, 237, 77, 461, 462, 463, 131,
-- 666, 466, 165, 77, 396, 467, 473, 624, 627, 166,
-- 78, 470, 136, 770, 360, 7, 8, 137, 167, 168,
-- 169, 471, 170, 771, 79, 173, 176, 576, 361, 80,
-- 81, 77, 518, 468, 486, 487, 488, 469, 78, 79,
-- 383, 384, 79, 141, 80, 110, 385, 80, 81, 571,
-- 79, 77, 520, 572, 522, 80, 81, 142, 78, 146,
-- 294, 295, 459, 7, 8, 77, 519, 521, 523, 77,
-- 870, 143, 78, 296, 426, 79, 78, 874, 727, 144,
-- 80, 81, 728, 536, 537, 538, 387, 388, 292, 77,
-- 293, 77, 389, 152, 547, 79, 78, 156, 78, 77,
-- 80, 81, 145, 79, 7, 8, 78, 875, 80, 112,
-- 554, 7, 8, 557, 729, 559, 560, 561, 730, 563,
-- 564, 565, 148, 941, 506, 942, 569, 511, 294, 295,
-- 149, 79, 162, 7, 8, 164, 80, 81, 525, 526,
-- 527, 296, 429, 585, 186, 320, 321, 159, 77, 190,
-- 191, 79, 160, 505, 784, 78, 80, 81, 785, 544,
-- 491, 492, 70, 294, 295, 79, 77, 579, 580, 79,
-- 80, 81, 178, 78, 80, 81, 296, 508, 180, 969,
-- 954, 955, 71, 970, 623, 718, 719, 720, 234, 79,
-- 268, 79, 635, 246, 80, 81, 80, 81, 265, 114,
-- 247, 68, 632, 248, 80, 81, 578, 578, 374, 249,
-- 409, 200, 201, 202, 271, 203, 204, 622, 205, 206,
-- 207, 208, 209, 210, 294, 295, 138, 272, 94, 95,
-- 96, 211, 273, 212, 213, 7, 8, 296, 626, 214,
-- 274, 215, 971, 275, 77, 976, 972, 809, 120, 977,
-- 812, 78, 646, 80, 81, 647, 648, 184, 276, 186,
-- 697, 277, 188, 189, 190, 191, 79, 280, 216, 978,
-- 980, 80, 81, 979, 981, 217, 278, 708, 709, 710,
-- 218, 219, 220, 192, 193, 982, 814, 815, 816, 983,
-- 221, 222, 223, 984, 287, 224, 279, 985, 184, 185,
-- 186, 187, 281, 188, 189, 190, 191, 734, 186, 857,
-- 737, 188, 189, 190, 191, 871, 282, 294, 295, 306,
-- 865, 283, 866, 867, 192, 193, 291, 986, 225, 226,
-- 879, 987, 748, 749, 700, 515, 516, 284, 400, 401,
-- 402, 705, 261, 988, 79, 403, 285, 989, 990, 80,
-- 81, 301, 991, 765, 296, 665, 184, 185, 186, 187,
-- 286, 188, 189, 190, 191, 306, 896, 288, 227, 228,
-- 311, 781, 300, 80, 81, 343, 344, 322, 345, 318,
-- 294, 346, 192, 193, 347, 348, 349, 350, 323, 347,
-- 348, 349, 350, 723, 724, 324, 754, 755, 362, 799,
-- 821, 351, 352, 353, 825, 826, 186, 756, 757, 188,
-- 189, 190, 191, 789, 294, 295, 184, 836, 186, 187,
-- 335, 188, 189, 190, 191, 93, 336, 94, 95, 96,
-- 192, 193, 97, 363, 772, 337, 907, 908, 909, 910,
-- 961, 962, 192, 193, 967, 968, 954, 955, 338, 786,
-- 787, 86, 578, 358, 364, 339, 87, 88, 365, 340,
-- 89, 90, 847, 366, 341, 91, 92, 367, 375, 342,
-- 356, 376, 368, 852, 393, 377, 378, 380, 382, 386,
-- 390, 391, 392, 399, 411, 405, 406, 412, 407, 414,
-- 417, 413, 416, 418, 419, 415, 868, 440, 432, 425,
-- 433, 434, 444, 435, 446, 436, 437, 438, 453, 454,
-- 464, 465, 439, 455, 456, 474, 457, 448, 449, 458,
-- 460, 475, 476, 477, 478, 479, 480, 481, 482, 483,
-- 484, 485, 489, 490, 494, 498, 496, 499, 500, 501,
-- 851, 502, 503, 493, 512, 504, 513, 517, 507, 514,
-- 524, 528, 529, 533, 532, 539, 541, 540, 543, 553,
-- 542, 546, 548, 549, 545, 550, 551, 906, 552, 869,
-- 913, 555, -2, 1, 917, 918, 919, 556, 558, 562,
-- 566, 568, 876, 2, 567, 570, 927, 928, 929, 573,
-- 574, 932, 575, 577, 581, 3, 4, 5, 582, 6,
-- 586, 7, 8, 9, 10, 11, 12, 13, 14, 15,
-- 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
-- 26, 27, 28, 29, 30, 31, 32, 33, 34, 35,
-- 36, 37, 38, 583, 587, 593, 590, 597, 602, 591,
-- 594, 588, 598, 612, 589, 595, 596, 619, 599, 924,
-- 600, 601, 620, 613, 618, 621, 614, 995, 996, 629,
-- 631, 640, 663, 664, 668, 670, 688, 39, 40, 691,
-- 676, 637, 630, 679, 690, 638, 641, 636, 692, 695,
-- 639, 642, 693, 694, 41, 42, 43, 44, 649, 45,
-- 643, 46, 644, 650, 47, 48, 651, 687, 159, 707,
-- 698, 652, 653, 711, 712, 713, 714, 654, 699, 655,
-- 656, 657, 658, 661, 49, 610, 715, 50, 51, 52,
-- 675, 53, 54, 55, 56, 57, 58, 59, 60, 2,
-- 667, 669, 671, 716, 61, 62, 672, 63, 64, 673,
-- 674, 3, 4, 5, 677, 6, 678, 7, 8, 9,
-- 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,
-- 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
-- 30, 31, 32, 33, 34, 35, 36, 37, 38, 680,
-- 681, 683, 682, 684, 685, 717, 686, 722, 689, 725,
-- 696, 736, 743, 744, 701, 745, 746, 735, 747, 702,
-- 703, 726, 758, 731, 752, 761, 753, 739, 759, 738,
-- 763, 740, 750, 39, 40, 742, 762, 764, 766, 767,
-- 741, 768, 769, 773, 774, 779, 782, 780, 783, 788,
-- 41, 42, 43, 44, 790, 45, 791, 46, 792, 793,
-- 47, 48, 800, 802, 794, 795, 796, 797, 798, 801,
-- 803, 804, 805, 806, 807, 813, 808, 810, 818, 811,
-- 49, 819, 820, 50, 51, 52, 822, 53, 54, 55,
-- 56, 57, 58, 59, 60, 823, 824, 827, 828, 831,
-- 61, 62, 837, 63, 64, 832, 838, 829, 830, 839,
-- 840, 833, 834, 845, 841, 842, 835, 843, 844, 846,
-- 848, 849, 858, 853, 850, 854, 855, 860, 859, 861,
-- 862, 863, 864, 872, 873, 877, 878, 880, 882, 883,
-- 885, 420, 884, 894, 902, 897, 898, 903, 912, 914,
-- 921, 922, 923, 886, 887, 888, 891, 925, 889, 890,
-- 892, 893, 926, 900, 899, 901, 904, 905, 935, 944,
-- 959, 915, 939, 973, 920, 960, 931, 933, 934, 936,
-- 937, 938, 945, 943, 946, 997, 999, 947, 998, 1007,
-- 948, 950, 952, 958, 974, 975, 1000, 1001, 994, 1002,
-- 1003, 1005, 1004, 1006, 1008, 1009, 1010, 1011, 1012, 1013,
-- 1018, 895, 992, 1014, 121, 1015, 1016, 0, 1017, 452,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 472
--};
--
--static const yytype_int16 yycheck[] =
--{
-- 27, 28, 0, 30, 31, 32, 211, 34, 35, 36,
-- 37, 42, 43, 44, 70, 71, 232, 215, 45, 36,
-- 37, 227, 0, 538, 157, 278, 279, 487, 486, 25,
-- 488, 540, 25, 89, 29, 30, 29, 30, 77, 29,
-- 30, 0, 83, 70, 69, 70, 262, 103, 62, 254,
-- 25, 256, 71, 27, 260, 69, 227, 25, 26, 86,
-- 87, 88, 89, 796, 91, 92, 162, 77, 77, 77,
-- 27, 939, 70, 278, 279, 97, 103, 77, 78, 79,
-- 83, 108, 25, 25, 90, 91, 92, 25, 25, 260,
-- 97, 97, 29, 30, 62, 49, 142, 83, 57, 157,
-- 83, 69, 906, 971, 162, 68, 63, 82, 841, 63,
-- 97, 70, 71, 56, 114, 102, 103, 97, 56, 165,
-- 120, 160, 375, 164, 87, 62, 15, 25, 26, 18,
-- 89, 20, 69, 22, 93, 35, 25, 162, 27, 25,
-- 29, 30, 157, 162, 103, 172, 35, 162, 162, 664,
-- 160, 160, 160, 167, 168, 148, 162, 124, 125, 157,
-- 620, 164, 62, 621, 62, 165, 162, 162, 97, 69,
-- 375, 69, 162, 62, 148, 142, 62, 25, 164, 157,
-- 69, 164, 97, 69, 184, 185, 186, 187, 188, 189,
-- 190, 191, 192, 193, 162, 25, 85, 86, 157, 167,
-- 168, 25, 161, 25, 1008, 1009, 165, 166, 167, 168,
-- 162, 170, 128, 129, 62, 162, 216, 217, 162, 3,
-- 4, 69, 138, 139, 8, 162, 162, 227, 25, 62,
-- 167, 168, 62, 25, 123, 19, 69, 29, 30, 69,
-- 62, 69, 70, 35, 125, 126, 127, 69, 25, 502,
-- 503, 25, 29, 30, 82, 83, 472, 163, 35, 163,
-- 260, 35, 162, 290, 162, 62, 293, 167, 168, 167,
-- 168, 298, 69, 162, 29, 30, 162, 162, 167, 168,
-- 35, 167, 168, 163, 25, 62, 313, 314, 315, 163,
-- 543, 157, 69, 62, 253, 161, 323, 502, 503, 76,
-- 69, 25, 163, 25, 25, 29, 30, 163, 85, 86,
-- 87, 35, 89, 35, 162, 371, 372, 450, 25, 167,
-- 168, 62, 25, 157, 351, 352, 353, 161, 69, 162,
-- 105, 106, 162, 162, 167, 168, 111, 167, 168, 157,
-- 162, 62, 25, 161, 25, 167, 168, 162, 69, 25,
-- 69, 70, 311, 29, 30, 62, 383, 384, 385, 62,
-- 820, 162, 69, 82, 83, 162, 69, 827, 157, 162,
-- 167, 168, 161, 400, 401, 402, 105, 106, 157, 62,
-- 159, 62, 111, 25, 411, 162, 69, 0, 69, 62,
-- 167, 168, 162, 162, 29, 30, 69, 25, 167, 168,
-- 427, 29, 30, 430, 157, 432, 433, 434, 161, 436,
-- 437, 438, 162, 922, 373, 924, 443, 376, 69, 70,
-- 162, 162, 97, 29, 30, 35, 167, 168, 387, 388,
-- 389, 82, 83, 460, 66, 134, 135, 97, 62, 71,
-- 72, 162, 102, 103, 157, 69, 167, 168, 161, 408,
-- 132, 133, 450, 69, 70, 162, 62, 455, 456, 162,
-- 167, 168, 162, 69, 167, 168, 82, 83, 25, 157,
-- 120, 121, 450, 161, 501, 125, 126, 127, 25, 162,
-- 172, 162, 509, 35, 167, 168, 167, 168, 25, 162,
-- 35, 450, 509, 35, 167, 168, 455, 456, 704, 35,
-- 706, 5, 6, 7, 25, 9, 10, 35, 12, 13,
-- 14, 15, 16, 17, 69, 70, 97, 25, 99, 100,
-- 101, 25, 25, 27, 28, 29, 30, 82, 83, 33,
-- 25, 35, 157, 25, 62, 157, 161, 735, 162, 161,
-- 738, 69, 519, 167, 168, 522, 523, 64, 25, 66,
-- 577, 25, 69, 70, 71, 72, 162, 27, 62, 157,
-- 157, 167, 168, 161, 161, 69, 25, 594, 595, 596,
-- 74, 75, 76, 90, 91, 157, 169, 170, 171, 161,
-- 84, 85, 86, 157, 35, 89, 25, 161, 64, 65,
-- 66, 67, 25, 69, 70, 71, 72, 624, 66, 797,
-- 627, 69, 70, 71, 72, 821, 25, 69, 70, 71,
-- 808, 25, 810, 811, 90, 91, 27, 157, 122, 123,
-- 836, 161, 649, 650, 583, 132, 133, 25, 90, 91,
-- 92, 590, 591, 157, 162, 97, 25, 161, 157, 167,
-- 168, 27, 161, 670, 82, 83, 64, 65, 66, 67,
-- 25, 69, 70, 71, 72, 71, 861, 25, 162, 163,
-- 162, 692, 25, 167, 168, 64, 65, 157, 67, 162,
-- 69, 70, 90, 91, 78, 79, 80, 81, 159, 78,
-- 79, 80, 81, 124, 125, 161, 140, 141, 25, 716,
-- 746, 90, 91, 92, 120, 121, 66, 656, 657, 69,
-- 70, 71, 72, 701, 69, 70, 64, 763, 66, 67,
-- 162, 69, 70, 71, 72, 97, 162, 99, 100, 101,
-- 90, 91, 104, 25, 683, 162, 107, 108, 109, 110,
-- 135, 136, 90, 91, 143, 144, 120, 121, 162, 698,
-- 699, 88, 701, 70, 25, 162, 93, 94, 25, 162,
-- 97, 98, 779, 25, 162, 102, 103, 163, 25, 162,
-- 162, 70, 163, 790, 25, 162, 162, 162, 162, 162,
-- 162, 162, 162, 97, 157, 35, 35, 97, 163, 70,
-- 70, 161, 161, 157, 157, 173, 813, 97, 157, 161,
-- 157, 157, 25, 157, 25, 157, 157, 157, 25, 35,
-- 125, 135, 161, 157, 157, 25, 158, 164, 164, 158,
-- 158, 25, 25, 25, 35, 25, 25, 25, 25, 25,
-- 25, 162, 25, 25, 162, 158, 162, 158, 158, 158,
-- 789, 25, 25, 34, 25, 70, 25, 131, 161, 157,
-- 25, 25, 25, 25, 137, 21, 158, 35, 25, 164,
-- 158, 157, 25, 25, 161, 25, 25, 884, 25, 818,
-- 887, 164, 0, 1, 891, 892, 893, 25, 164, 25,
-- 25, 97, 831, 11, 162, 161, 903, 904, 905, 164,
-- 164, 912, 97, 159, 35, 23, 24, 25, 35, 27,
-- 161, 29, 30, 31, 32, 33, 34, 35, 36, 37,
-- 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
-- 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
-- 58, 59, 60, 157, 161, 157, 97, 157, 25, 97,
-- 159, 135, 157, 161, 134, 159, 159, 35, 157, 898,
-- 157, 157, 35, 161, 142, 35, 157, 974, 975, 25,
-- 25, 25, 35, 35, 35, 91, 25, 95, 96, 25,
-- 97, 157, 161, 97, 97, 157, 161, 164, 97, 25,
-- 157, 161, 97, 97, 112, 113, 114, 115, 157, 117,
-- 161, 119, 162, 157, 122, 123, 161, 130, 97, 25,
-- 69, 157, 157, 25, 35, 25, 35, 161, 76, 162,
-- 162, 162, 162, 162, 142, 162, 25, 145, 146, 147,
-- 164, 149, 150, 151, 152, 153, 154, 155, 156, 11,
-- 161, 161, 161, 90, 162, 163, 161, 165, 166, 161,
-- 161, 23, 24, 25, 164, 27, 164, 29, 30, 31,
-- 32, 33, 34, 35, 36, 37, 38, 39, 40, 41,
-- 42, 43, 44, 45, 46, 47, 48, 49, 50, 51,
-- 52, 53, 54, 55, 56, 57, 58, 59, 60, 161,
-- 161, 157, 161, 161, 161, 25, 161, 25, 162, 25,
-- 160, 25, 25, 25, 157, 25, 97, 164, 135, 161,
-- 161, 161, 125, 161, 35, 25, 35, 161, 35, 164,
-- 97, 164, 162, 95, 96, 164, 164, 25, 97, 25,
-- 172, 97, 97, 161, 130, 159, 25, 163, 25, 157,
-- 112, 113, 114, 115, 159, 117, 157, 119, 157, 157,
-- 122, 123, 97, 97, 161, 161, 161, 161, 161, 161,
-- 161, 161, 97, 142, 125, 90, 164, 164, 97, 164,
-- 142, 161, 161, 145, 146, 147, 161, 149, 150, 151,
-- 152, 153, 154, 155, 156, 161, 161, 161, 161, 157,
-- 162, 163, 97, 165, 166, 157, 25, 161, 161, 35,
-- 25, 161, 161, 25, 161, 161, 164, 162, 162, 25,
-- 25, 25, 162, 25, 27, 25, 25, 25, 161, 25,
-- 31, 161, 161, 161, 161, 25, 71, 25, 25, 25,
-- 162, 83, 159, 132, 35, 70, 69, 91, 97, 125,
-- 25, 25, 32, 161, 159, 161, 159, 27, 162, 161,
-- 159, 159, 70, 157, 161, 161, 159, 159, 136, 21,
-- 25, 162, 162, 35, 161, 25, 161, 161, 161, 161,
-- 161, 161, 157, 161, 157, 136, 136, 161, 135, 71,
-- 162, 162, 162, 162, 159, 159, 136, 136, 161, 136,
-- 136, 161, 136, 161, 161, 161, 161, 161, 161, 161,
-- 35, 860, 969, 161, 37, 161, 161, -1, 161, 303,
-- -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-- -1, -1, -1, -1, -1, -1, -1, -1, -1, 322
--};
--
--/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
-- symbol of state STATE-NUM. */
--static const yytype_uint8 yystos[] =
--{
-- 0, 1, 11, 23, 24, 25, 27, 29, 30, 31,
-- 32, 33, 34, 35, 36, 37, 38, 39, 40, 41,
-- 42, 43, 44, 45, 46, 47, 48, 49, 50, 51,
-- 52, 53, 54, 55, 56, 57, 58, 59, 60, 95,
-- 96, 112, 113, 114, 115, 117, 119, 122, 123, 142,
-- 145, 146, 147, 149, 150, 151, 152, 153, 154, 155,
-- 156, 162, 163, 165, 166, 175, 176, 177, 178, 197,
-- 205, 206, 207, 208, 209, 212, 162, 62, 69, 162,
-- 167, 168, 213, 218, 219, 220, 88, 93, 94, 97,
-- 98, 102, 103, 97, 99, 100, 101, 104, 211, 97,
-- 97, 97, 97, 97, 25, 25, 219, 219, 162, 219,
-- 168, 219, 168, 219, 162, 219, 219, 213, 217, 219,
-- 162, 217, 219, 162, 162, 163, 198, 163, 198, 163,
-- 198, 163, 198, 25, 219, 162, 163, 163, 97, 211,
-- 162, 162, 162, 162, 162, 162, 25, 178, 162, 162,
-- 27, 63, 25, 25, 82, 211, 0, 77, 160, 97,
-- 102, 103, 97, 25, 35, 69, 76, 85, 86, 87,
-- 89, 178, 205, 210, 219, 178, 210, 210, 162, 179,
-- 25, 220, 220, 220, 64, 65, 66, 67, 69, 70,
-- 71, 72, 90, 91, 25, 219, 25, 219, 25, 219,
-- 5, 6, 7, 9, 10, 12, 13, 14, 15, 16,
-- 17, 25, 27, 28, 33, 35, 62, 69, 74, 75,
-- 76, 84, 85, 86, 89, 122, 123, 162, 163, 178,
-- 194, 199, 210, 219, 25, 25, 219, 25, 219, 25,
-- 148, 178, 27, 148, 142, 165, 35, 35, 35, 35,
-- 15, 18, 20, 22, 25, 27, 35, 85, 86, 123,
-- 162, 178, 210, 219, 219, 25, 25, 26, 172, 25,
-- 26, 25, 25, 25, 25, 25, 25, 25, 25, 25,
-- 27, 25, 25, 25, 25, 25, 25, 35, 25, 25,
-- 56, 27, 157, 159, 69, 70, 82, 83, 201, 204,
-- 25, 27, 177, 178, 25, 162, 71, 178, 178, 178,
-- 178, 162, 178, 90, 91, 92, 162, 219, 162, 195,
-- 134, 135, 157, 159, 161, 220, 220, 220, 220, 220,
-- 220, 220, 220, 220, 220, 162, 162, 162, 162, 162,
-- 162, 162, 162, 64, 65, 67, 70, 78, 79, 80,
-- 81, 90, 91, 92, 200, 201, 162, 186, 70, 186,
-- 25, 25, 25, 25, 25, 25, 25, 163, 163, 25,
-- 178, 205, 206, 207, 209, 25, 70, 162, 162, 179,
-- 162, 187, 162, 105, 106, 111, 162, 105, 106, 111,
-- 162, 162, 162, 25, 25, 35, 178, 162, 201, 97,
-- 90, 91, 92, 97, 201, 35, 35, 163, 207, 209,
-- 179, 157, 97, 161, 70, 173, 161, 70, 157, 157,
-- 83, 164, 164, 164, 164, 161, 83, 201, 204, 83,
-- 201, 204, 157, 157, 157, 157, 157, 157, 157, 161,
-- 97, 219, 25, 56, 25, 219, 25, 219, 164, 164,
-- 77, 160, 195, 25, 35, 157, 157, 158, 158, 178,
-- 158, 219, 219, 219, 125, 135, 157, 161, 157, 161,
-- 25, 35, 208, 219, 25, 25, 25, 25, 35, 25,
-- 25, 25, 25, 25, 25, 162, 219, 219, 219, 25,
-- 25, 132, 133, 34, 162, 188, 162, 189, 158, 158,
-- 158, 158, 25, 25, 70, 103, 178, 161, 83, 201,
-- 204, 178, 25, 25, 157, 132, 133, 131, 25, 219,
-- 25, 219, 25, 219, 25, 178, 178, 178, 25, 25,
-- 25, 35, 137, 25, 68, 87, 219, 219, 219, 21,
-- 35, 158, 158, 25, 178, 161, 157, 219, 25, 25,
-- 25, 25, 25, 164, 219, 164, 25, 219, 164, 219,
-- 219, 219, 25, 219, 219, 219, 25, 162, 97, 219,
-- 161, 157, 161, 164, 164, 97, 177, 159, 178, 205,
-- 205, 35, 35, 157, 35, 219, 161, 161, 135, 134,
-- 97, 97, 179, 157, 159, 159, 159, 157, 157, 157,
-- 157, 157, 25, 188, 189, 188, 157, 162, 183, 157,
-- 162, 184, 161, 161, 157, 124, 125, 142, 142, 35,
-- 35, 35, 35, 219, 201, 204, 83, 201, 204, 25,
-- 161, 25, 213, 215, 216, 219, 164, 157, 157, 157,
-- 25, 161, 161, 161, 162, 196, 196, 196, 196, 157,
-- 157, 161, 157, 157, 161, 162, 162, 162, 162, 190,
-- 190, 162, 184, 35, 35, 83, 204, 161, 35, 161,
-- 91, 161, 161, 161, 161, 164, 97, 164, 164, 97,
-- 161, 161, 161, 157, 161, 161, 161, 130, 25, 162,
-- 97, 25, 97, 97, 97, 25, 160, 219, 69, 76,
-- 178, 157, 161, 161, 162, 178, 162, 25, 219, 219,
-- 219, 25, 35, 25, 35, 25, 90, 25, 125, 126,
-- 127, 181, 25, 124, 125, 25, 161, 157, 161, 157,
-- 161, 161, 189, 188, 219, 164, 25, 219, 164, 161,
-- 164, 172, 164, 25, 25, 25, 97, 135, 219, 219,
-- 162, 180, 35, 35, 140, 141, 178, 178, 125, 35,
-- 190, 25, 164, 97, 25, 219, 97, 25, 97, 97,
-- 25, 35, 178, 161, 130, 3, 4, 8, 19, 159,
-- 163, 198, 25, 25, 157, 161, 178, 178, 157, 205,
-- 159, 157, 157, 157, 161, 161, 161, 161, 161, 219,
-- 97, 161, 97, 161, 161, 97, 142, 125, 164, 186,
-- 164, 164, 186, 90, 169, 170, 171, 214, 97, 161,
-- 161, 210, 161, 161, 161, 120, 121, 161, 161, 161,
-- 161, 157, 157, 161, 161, 164, 210, 97, 25, 35,
-- 25, 161, 161, 162, 162, 25, 25, 219, 25, 25,
-- 27, 178, 219, 25, 25, 25, 180, 186, 162, 161,
-- 25, 25, 31, 161, 161, 186, 186, 186, 219, 178,
-- 189, 179, 161, 161, 189, 25, 178, 25, 71, 179,
-- 25, 180, 25, 25, 159, 162, 161, 159, 161, 162,
-- 161, 159, 159, 159, 132, 200, 201, 70, 69, 161,
-- 157, 161, 35, 91, 159, 159, 219, 107, 108, 109,
-- 110, 191, 97, 219, 125, 162, 192, 219, 219, 219,
-- 161, 25, 25, 32, 178, 27, 70, 219, 219, 219,
-- 192, 161, 198, 161, 161, 136, 161, 161, 161, 162,
-- 185, 184, 184, 161, 21, 157, 157, 161, 162, 193,
-- 162, 202, 162, 203, 120, 121, 181, 182, 162, 25,
-- 25, 135, 136, 128, 129, 138, 139, 143, 144, 157,
-- 161, 157, 161, 35, 159, 159, 157, 161, 157, 161,
-- 157, 161, 157, 161, 157, 161, 157, 161, 157, 161,
-- 157, 161, 182, 181, 161, 219, 219, 136, 135, 136,
-- 136, 136, 136, 136, 136, 161, 161, 71, 161, 161,
-- 161, 161, 161, 161, 161, 161, 161, 161, 35, 192,
-- 192
--};
--
--#define yyerrok (yyerrstatus = 0)
--#define yyclearin (yychar = YYEMPTY)
--#define YYEMPTY (-2)
--#define YYEOF 0
--
--#define YYACCEPT goto yyacceptlab
--#define YYABORT goto yyabortlab
--#define YYERROR goto yyerrorlab
--
--
--/* Like YYERROR except do call yyerror. This remains here temporarily
-- to ease the transition to the new meaning of YYERROR, for GCC.
-- Once GCC version 2 has supplanted version 1, this can go. */
--
--#define YYFAIL goto yyerrlab
--
--#define YYRECOVERING() (!!yyerrstatus)
--
--#define YYBACKUP(Token, Value) \
--do \
-- if (yychar == YYEMPTY && yylen == 1) \
-- { \
-- yychar = (Token); \
-- yylval = (Value); \
-- yytoken = YYTRANSLATE (yychar); \
-- YYPOPSTACK (1); \
-- goto yybackup; \
-- } \
-- else \
-- { \
-- yyerror (YY_("syntax error: cannot back up")); \
-- YYERROR; \
-- } \
--while (YYID (0))
--
--
--#define YYTERROR 1
--#define YYERRCODE 256
--
--
--/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
-- If N is 0, then set CURRENT to the empty location which ends
-- the previous symbol: RHS[0] (always defined). */
--
--#define YYRHSLOC(Rhs, K) ((Rhs)[K])
--#ifndef YYLLOC_DEFAULT
--# define YYLLOC_DEFAULT(Current, Rhs, N) \
-- do \
-- if (YYID (N)) \
-- { \
-- (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \
-- (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \
-- (Current).last_line = YYRHSLOC (Rhs, N).last_line; \
-- (Current).last_column = YYRHSLOC (Rhs, N).last_column; \
-- } \
-- else \
-- { \
-- (Current).first_line = (Current).last_line = \
-- YYRHSLOC (Rhs, 0).last_line; \
-- (Current).first_column = (Current).last_column = \
-- YYRHSLOC (Rhs, 0).last_column; \
-- } \
-- while (YYID (0))
--#endif
--
--
--/* YY_LOCATION_PRINT -- Print the location on the stream.
-- This macro was not mandated originally: define only if we know
-- we won't break user code: when these are the locations we know. */
--
--#ifndef YY_LOCATION_PRINT
--# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL
--# define YY_LOCATION_PRINT(File, Loc) \
-- fprintf (File, "%d.%d-%d.%d", \
-- (Loc).first_line, (Loc).first_column, \
-- (Loc).last_line, (Loc).last_column)
--# else
--# define YY_LOCATION_PRINT(File, Loc) ((void) 0)
--# endif
--#endif
--
--
--/* YYLEX -- calling `yylex' with the right arguments. */
--
--#ifdef YYLEX_PARAM
--# define YYLEX yylex (YYLEX_PARAM)
--#else
--# define YYLEX yylex ()
--#endif
--
--/* Enable debugging if requested. */
--#if YYDEBUG
--
--# ifndef YYFPRINTF
--# include <stdio.h> /* INFRINGES ON USER NAME SPACE */
--# define YYFPRINTF fprintf
--# endif
--
--# define YYDPRINTF(Args) \
--do { \
-- if (yydebug) \
-- YYFPRINTF Args; \
--} while (YYID (0))
--
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \
--do { \
-- if (yydebug) \
-- { \
-- YYFPRINTF (stderr, "%s ", Title); \
-- yy_symbol_print (stderr, \
-- Type, Value); \
-- YYFPRINTF (stderr, "\n"); \
-- } \
--} while (YYID (0))
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_value_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (!yyvaluep)
-- return;
--# ifdef YYPRINT
-- if (yytype < YYNTOKENS)
-- YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
--# else
-- YYUSE (yyoutput);
--# endif
-- switch (yytype)
-- {
-- default:
-- break;
-- }
--}
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (yytype < YYNTOKENS)
-- YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
-- else
-- YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
--
-- yy_symbol_value_print (yyoutput, yytype, yyvaluep);
-- YYFPRINTF (yyoutput, ")");
--}
--
--/*------------------------------------------------------------------.
--| yy_stack_print -- Print the state stack from its BOTTOM up to its |
--| TOP (included). |
--`------------------------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_stack_print (yytype_int16 *bottom, yytype_int16 *top)
--#else
--static void
--yy_stack_print (bottom, top)
-- yytype_int16 *bottom;
-- yytype_int16 *top;
--#endif
--{
-- YYFPRINTF (stderr, "Stack now");
-- for (; bottom <= top; ++bottom)
-- YYFPRINTF (stderr, " %d", *bottom);
-- YYFPRINTF (stderr, "\n");
--}
--
--# define YY_STACK_PRINT(Bottom, Top) \
--do { \
-- if (yydebug) \
-- yy_stack_print ((Bottom), (Top)); \
--} while (YYID (0))
--
--
--/*------------------------------------------------.
--| Report that the YYRULE is going to be reduced. |
--`------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_reduce_print (YYSTYPE *yyvsp, int yyrule)
--#else
--static void
--yy_reduce_print (yyvsp, yyrule)
-- YYSTYPE *yyvsp;
-- int yyrule;
--#endif
--{
-- int yynrhs = yyr2[yyrule];
-- int yyi;
-- unsigned long int yylno = yyrline[yyrule];
-- YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
-- yyrule - 1, yylno);
-- /* The symbols being reduced. */
-- for (yyi = 0; yyi < yynrhs; yyi++)
-- {
-- fprintf (stderr, " $%d = ", yyi + 1);
-- yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi],
-- &(yyvsp[(yyi + 1) - (yynrhs)])
-- );
-- fprintf (stderr, "\n");
-- }
--}
--
--# define YY_REDUCE_PRINT(Rule) \
--do { \
-- if (yydebug) \
-- yy_reduce_print (yyvsp, Rule); \
--} while (YYID (0))
--
--/* Nonzero means print parse trace. It is left uninitialized so that
-- multiple parsers can coexist. */
--int yydebug;
--#else /* !YYDEBUG */
--# define YYDPRINTF(Args)
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
--# define YY_STACK_PRINT(Bottom, Top)
--# define YY_REDUCE_PRINT(Rule)
--#endif /* !YYDEBUG */
--
--
--/* YYINITDEPTH -- initial size of the parser's stacks. */
--#ifndef YYINITDEPTH
--# define YYINITDEPTH 200
--#endif
--
--/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
-- if the built-in stack extension method is used).
--
-- Do not make this value too large; the results are undefined if
-- YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
-- evaluated with infinite-precision integer arithmetic. */
--
--#ifndef YYMAXDEPTH
--# define YYMAXDEPTH 10000
--#endif
--
--
--
--#if YYERROR_VERBOSE
--
--# ifndef yystrlen
--# if defined __GLIBC__ && defined _STRING_H
--# define yystrlen strlen
--# else
--/* Return the length of YYSTR. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static YYSIZE_T
--yystrlen (const char *yystr)
--#else
--static YYSIZE_T
--yystrlen (yystr)
-- const char *yystr;
--#endif
--{
-- YYSIZE_T yylen;
-- for (yylen = 0; yystr[yylen]; yylen++)
-- continue;
-- return yylen;
--}
--# endif
--# endif
--
--# ifndef yystpcpy
--# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
--# define yystpcpy stpcpy
--# else
--/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
-- YYDEST. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static char *
--yystpcpy (char *yydest, const char *yysrc)
--#else
--static char *
--yystpcpy (yydest, yysrc)
-- char *yydest;
-- const char *yysrc;
--#endif
--{
-- char *yyd = yydest;
-- const char *yys = yysrc;
--
-- while ((*yyd++ = *yys++) != '\0')
-- continue;
--
-- return yyd - 1;
--}
--# endif
--# endif
--
--# ifndef yytnamerr
--/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
-- quotes and backslashes, so that it's suitable for yyerror. The
-- heuristic is that double-quoting is unnecessary unless the string
-- contains an apostrophe, a comma, or backslash (other than
-- backslash-backslash). YYSTR is taken from yytname. If YYRES is
-- null, do not copy; instead, return the length of what the result
-- would have been. */
--static YYSIZE_T
--yytnamerr (char *yyres, const char *yystr)
--{
-- if (*yystr == '"')
-- {
-- YYSIZE_T yyn = 0;
-- char const *yyp = yystr;
--
-- for (;;)
-- switch (*++yyp)
-- {
-- case '\'':
-- case ',':
-- goto do_not_strip_quotes;
--
-- case '\\':
-- if (*++yyp != '\\')
-- goto do_not_strip_quotes;
-- /* Fall through. */
-- default:
-- if (yyres)
-- yyres[yyn] = *yyp;
-- yyn++;
-- break;
--
-- case '"':
-- if (yyres)
-- yyres[yyn] = '\0';
-- return yyn;
-- }
-- do_not_strip_quotes: ;
-- }
--
-- if (! yyres)
-- return yystrlen (yystr);
--
-- return yystpcpy (yyres, yystr) - yyres;
--}
--# endif
--
--/* Copy into YYRESULT an error message about the unexpected token
-- YYCHAR while in state YYSTATE. Return the number of bytes copied,
-- including the terminating null byte. If YYRESULT is null, do not
-- copy anything; just return the number of bytes that would be
-- copied. As a special case, return 0 if an ordinary "syntax error"
-- message will do. Return YYSIZE_MAXIMUM if overflow occurs during
-- size calculation. */
--static YYSIZE_T
--yysyntax_error (char *yyresult, int yystate, int yychar)
--{
-- int yyn = yypact[yystate];
--
-- if (! (YYPACT_NINF < yyn && yyn <= YYLAST))
-- return 0;
-- else
-- {
-- int yytype = YYTRANSLATE (yychar);
-- YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]);
-- YYSIZE_T yysize = yysize0;
-- YYSIZE_T yysize1;
-- int yysize_overflow = 0;
-- enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
-- char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
-- int yyx;
--
--# if 0
-- /* This is so xgettext sees the translatable formats that are
-- constructed on the fly. */
-- YY_("syntax error, unexpected %s");
-- YY_("syntax error, unexpected %s, expecting %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s");
--# endif
-- char *yyfmt;
-- char const *yyf;
-- static char const yyunexpected[] = "syntax error, unexpected %s";
-- static char const yyexpecting[] = ", expecting %s";
-- static char const yyor[] = " or %s";
-- char yyformat[sizeof yyunexpected
-- + sizeof yyexpecting - 1
-- + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2)
-- * (sizeof yyor - 1))];
-- char const *yyprefix = yyexpecting;
--
-- /* Start YYX at -YYN if negative to avoid negative indexes in
-- YYCHECK. */
-- int yyxbegin = yyn < 0 ? -yyn : 0;
--
-- /* Stay within bounds of both yycheck and yytname. */
-- int yychecklim = YYLAST - yyn + 1;
-- int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
-- int yycount = 1;
--
-- yyarg[0] = yytname[yytype];
-- yyfmt = yystpcpy (yyformat, yyunexpected);
--
-- for (yyx = yyxbegin; yyx < yyxend; ++yyx)
-- if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
-- {
-- if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
-- {
-- yycount = 1;
-- yysize = yysize0;
-- yyformat[sizeof yyunexpected - 1] = '\0';
-- break;
-- }
-- yyarg[yycount++] = yytname[yyx];
-- yysize1 = yysize + yytnamerr (0, yytname[yyx]);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
-- yyfmt = yystpcpy (yyfmt, yyprefix);
-- yyprefix = yyor;
-- }
--
-- yyf = YY_(yyformat);
-- yysize1 = yysize + yystrlen (yyf);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
--
-- if (yysize_overflow)
-- return YYSIZE_MAXIMUM;
--
-- if (yyresult)
-- {
-- /* Avoid sprintf, as that infringes on the user's name space.
-- Don't have undefined behavior even if the translation
-- produced a string with the wrong number of "%s"s. */
-- char *yyp = yyresult;
-- int yyi = 0;
-- while ((*yyp = *yyf) != '\0')
-- {
-- if (*yyp == '%' && yyf[1] == 's' && yyi < yycount)
-- {
-- yyp += yytnamerr (yyp, yyarg[yyi++]);
-- yyf += 2;
-- }
-- else
-- {
-- yyp++;
-- yyf++;
-- }
-- }
-- }
-- return yysize;
-- }
--}
--#endif /* YYERROR_VERBOSE */
--
--
--/*-----------------------------------------------.
--| Release the memory associated to this symbol. |
--`-----------------------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep)
--#else
--static void
--yydestruct (yymsg, yytype, yyvaluep)
-- const char *yymsg;
-- int yytype;
-- YYSTYPE *yyvaluep;
--#endif
--{
-- YYUSE (yyvaluep);
--
-- if (!yymsg)
-- yymsg = "Deleting";
-- YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
--
-- switch (yytype)
-- {
--
-- default:
-- break;
-- }
--}
--
--
--/* Prevent warnings from -Wmissing-prototypes. */
--
--#ifdef YYPARSE_PARAM
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void *YYPARSE_PARAM);
--#else
--int yyparse ();
--#endif
--#else /* ! YYPARSE_PARAM */
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void);
--#else
--int yyparse ();
--#endif
--#endif /* ! YYPARSE_PARAM */
--
--
--
--/* The look-ahead symbol. */
--int yychar;
--
--/* The semantic value of the look-ahead symbol. */
--YYSTYPE yylval;
--
--/* Number of syntax errors so far. */
--int yynerrs;
--
--
--
--/*----------.
--| yyparse. |
--`----------*/
--
--#ifdef YYPARSE_PARAM
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void *YYPARSE_PARAM)
--#else
--int
--yyparse (YYPARSE_PARAM)
-- void *YYPARSE_PARAM;
--#endif
--#else /* ! YYPARSE_PARAM */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void)
--#else
--int
--yyparse ()
--
--#endif
--#endif
--{
--
-- int yystate;
-- int yyn;
-- int yyresult;
-- /* Number of tokens to shift before error messages enabled. */
-- int yyerrstatus;
-- /* Look-ahead token as an internal (translated) token number. */
-- int yytoken = 0;
--#if YYERROR_VERBOSE
-- /* Buffer for error messages, and its allocated size. */
-- char yymsgbuf[128];
-- char *yymsg = yymsgbuf;
-- YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
--#endif
--
-- /* Three stacks and their tools:
-- `yyss': related to states,
-- `yyvs': related to semantic values,
-- `yyls': related to locations.
--
-- Refer to the stacks thru separate pointers, to allow yyoverflow
-- to reallocate them elsewhere. */
--
-- /* The state stack. */
-- yytype_int16 yyssa[YYINITDEPTH];
-- yytype_int16 *yyss = yyssa;
-- yytype_int16 *yyssp;
--
-- /* The semantic value stack. */
-- YYSTYPE yyvsa[YYINITDEPTH];
-- YYSTYPE *yyvs = yyvsa;
-- YYSTYPE *yyvsp;
--
--
--
--#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N))
--
-- YYSIZE_T yystacksize = YYINITDEPTH;
--
-- /* The variables used to return semantic value and location from the
-- action routines. */
-- YYSTYPE yyval;
--
--
-- /* The number of symbols on the RHS of the reduced rule.
-- Keep to zero when no symbol should be popped. */
-- int yylen = 0;
--
-- YYDPRINTF ((stderr, "Starting parse\n"));
--
-- yystate = 0;
-- yyerrstatus = 0;
-- yynerrs = 0;
-- yychar = YYEMPTY; /* Cause a token to be read. */
--
-- /* Initialize stack pointers.
-- Waste one element of value and location stack
-- so that they stay on the same level as the state stack.
-- The wasted elements are never initialized. */
--
-- yyssp = yyss;
-- yyvsp = yyvs;
--
-- goto yysetstate;
--
--/*------------------------------------------------------------.
--| yynewstate -- Push a new state, which is found in yystate. |
--`------------------------------------------------------------*/
-- yynewstate:
-- /* In all cases, when you get here, the value and location stacks
-- have just been pushed. So pushing a state here evens the stacks. */
-- yyssp++;
--
-- yysetstate:
-- *yyssp = yystate;
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- {
-- /* Get the current used size of the three stacks, in elements. */
-- YYSIZE_T yysize = yyssp - yyss + 1;
--
--#ifdef yyoverflow
-- {
-- /* Give user a chance to reallocate the stack. Use copies of
-- these so that the &'s don't force the real ones into
-- memory. */
-- YYSTYPE *yyvs1 = yyvs;
-- yytype_int16 *yyss1 = yyss;
--
--
-- /* Each stack pointer address is followed by the size of the
-- data in use in that stack, in bytes. This used to be a
-- conditional around just the two extra args, but that might
-- be undefined if yyoverflow is a macro. */
-- yyoverflow (YY_("memory exhausted"),
-- &yyss1, yysize * sizeof (*yyssp),
-- &yyvs1, yysize * sizeof (*yyvsp),
--
-- &yystacksize);
--
-- yyss = yyss1;
-- yyvs = yyvs1;
-- }
--#else /* no yyoverflow */
--# ifndef YYSTACK_RELOCATE
-- goto yyexhaustedlab;
--# else
-- /* Extend the stack our own way. */
-- if (YYMAXDEPTH <= yystacksize)
-- goto yyexhaustedlab;
-- yystacksize *= 2;
-- if (YYMAXDEPTH < yystacksize)
-- yystacksize = YYMAXDEPTH;
--
-- {
-- yytype_int16 *yyss1 = yyss;
-- union yyalloc *yyptr =
-- (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
-- if (! yyptr)
-- goto yyexhaustedlab;
-- YYSTACK_RELOCATE (yyss);
-- YYSTACK_RELOCATE (yyvs);
--
--# undef YYSTACK_RELOCATE
-- if (yyss1 != yyssa)
-- YYSTACK_FREE (yyss1);
-- }
--# endif
--#endif /* no yyoverflow */
--
-- yyssp = yyss + yysize - 1;
-- yyvsp = yyvs + yysize - 1;
--
--
-- YYDPRINTF ((stderr, "Stack size increased to %lu\n",
-- (unsigned long int) yystacksize));
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- YYABORT;
-- }
--
-- YYDPRINTF ((stderr, "Entering state %d\n", yystate));
--
-- goto yybackup;
--
--/*-----------.
--| yybackup. |
--`-----------*/
--yybackup:
--
-- /* Do appropriate processing given the current state. Read a
-- look-ahead token if we need one and don't already have one. */
--
-- /* First try to decide what to do without reference to look-ahead token. */
-- yyn = yypact[yystate];
-- if (yyn == YYPACT_NINF)
-- goto yydefault;
--
-- /* Not known => get a look-ahead token if don't already have one. */
--
-- /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */
-- if (yychar == YYEMPTY)
-- {
-- YYDPRINTF ((stderr, "Reading a token: "));
-- yychar = YYLEX;
-- }
--
-- if (yychar <= YYEOF)
-- {
-- yychar = yytoken = YYEOF;
-- YYDPRINTF ((stderr, "Now at end of input.\n"));
-- }
-- else
-- {
-- yytoken = YYTRANSLATE (yychar);
-- YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
-- }
--
-- /* If the proper action on seeing token YYTOKEN is to reduce or to
-- detect an error, take that action. */
-- yyn += yytoken;
-- if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
-- goto yydefault;
-- yyn = yytable[yyn];
-- if (yyn <= 0)
-- {
-- if (yyn == 0 || yyn == YYTABLE_NINF)
-- goto yyerrlab;
-- yyn = -yyn;
-- goto yyreduce;
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- /* Count tokens shifted since error; after three, turn off error
-- status. */
-- if (yyerrstatus)
-- yyerrstatus--;
--
-- /* Shift the look-ahead token. */
-- YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
--
-- /* Discard the shifted token unless it is eof. */
-- if (yychar != YYEOF)
-- yychar = YYEMPTY;
--
-- yystate = yyn;
-- *++yyvsp = yylval;
--
-- goto yynewstate;
--
--
--/*-----------------------------------------------------------.
--| yydefault -- do the default action for the current state. |
--`-----------------------------------------------------------*/
--yydefault:
-- yyn = yydefact[yystate];
-- if (yyn == 0)
-- goto yyerrlab;
-- goto yyreduce;
--
--
--/*-----------------------------.
--| yyreduce -- Do a reduction. |
--`-----------------------------*/
--yyreduce:
-- /* yyn is the number of a rule to reduce with. */
-- yylen = yyr2[yyn];
--
-- /* If YYLEN is nonzero, implement the default value of the action:
-- `$$ = $1'.
--
-- Otherwise, the following line sets YYVAL to garbage.
-- This behavior is undocumented and Bison
-- users should not rely upon it. Assigning to YYVAL
-- unconditionally makes the parser a bit smaller, and it avoids a
-- GCC warning that YYVAL may be used uninitialized. */
-- yyval = yyvsp[1-yylen];
--
--
-- YY_REDUCE_PRINT (yyn);
-- switch (yyn)
-- {
-- case 3:
--#line 651 "bfin-parse.y"
-- {
-- insn = (yyvsp[(1) - (1)].instr);
-- if (insn == (INSTR_T) 0)
-- return NO_INSN_GENERATED;
-- else if (insn == (INSTR_T) - 1)
-- return SEMANTIC_ERROR;
-- else
-- return INSN_GENERATED;
-- }
-- break;
--
-- case 5:
--#line 665 "bfin-parse.y"
-- {
-- if (((yyvsp[(1) - (6)].instr)->value & 0xf800) == 0xc000)
-- {
-- if (is_group1 ((yyvsp[(3) - (6)].instr)) && is_group2 ((yyvsp[(5) - (6)].instr)))
-- (yyval.instr) = gen_multi_instr_1 ((yyvsp[(1) - (6)].instr), (yyvsp[(3) - (6)].instr), (yyvsp[(5) - (6)].instr));
-- else if (is_group2 ((yyvsp[(3) - (6)].instr)) && is_group1 ((yyvsp[(5) - (6)].instr)))
-- (yyval.instr) = gen_multi_instr_1 ((yyvsp[(1) - (6)].instr), (yyvsp[(5) - (6)].instr), (yyvsp[(3) - (6)].instr));
-- else
-- return yyerror ("Wrong 16 bit instructions groups, slot 2 and slot 3 must be 16-bit instrution group");
-- }
-- else if (((yyvsp[(3) - (6)].instr)->value & 0xf800) == 0xc000)
-- {
-- if (is_group1 ((yyvsp[(1) - (6)].instr)) && is_group2 ((yyvsp[(5) - (6)].instr)))
-- (yyval.instr) = gen_multi_instr_1 ((yyvsp[(3) - (6)].instr), (yyvsp[(1) - (6)].instr), (yyvsp[(5) - (6)].instr));
-- else if (is_group2 ((yyvsp[(1) - (6)].instr)) && is_group1 ((yyvsp[(5) - (6)].instr)))
-- (yyval.instr) = gen_multi_instr_1 ((yyvsp[(3) - (6)].instr), (yyvsp[(5) - (6)].instr), (yyvsp[(1) - (6)].instr));
-- else
-- return yyerror ("Wrong 16 bit instructions groups, slot 1 and slot 3 must be 16-bit instrution group");
-- }
-- else if (((yyvsp[(5) - (6)].instr)->value & 0xf800) == 0xc000)
-- {
-- if (is_group1 ((yyvsp[(1) - (6)].instr)) && is_group2 ((yyvsp[(3) - (6)].instr)))
-- (yyval.instr) = gen_multi_instr_1 ((yyvsp[(5) - (6)].instr), (yyvsp[(1) - (6)].instr), (yyvsp[(3) - (6)].instr));
-- else if (is_group2 ((yyvsp[(1) - (6)].instr)) && is_group1 ((yyvsp[(3) - (6)].instr)))
-- (yyval.instr) = gen_multi_instr_1 ((yyvsp[(5) - (6)].instr), (yyvsp[(3) - (6)].instr), (yyvsp[(1) - (6)].instr));
-- else
-- return yyerror ("Wrong 16 bit instructions groups, slot 1 and slot 2 must be 16-bit instrution group");
-- }
-- else
-- error ("\nIllegal Multi Issue Construct, at least any one of the slot must be DSP32 instruction group\n");
-- }
-- break;
--
-- case 6:
--#line 698 "bfin-parse.y"
-- {
-- if (((yyvsp[(1) - (4)].instr)->value & 0xf800) == 0xc000)
-- {
-- if (is_group1 ((yyvsp[(3) - (4)].instr)))
-- (yyval.instr) = gen_multi_instr_1 ((yyvsp[(1) - (4)].instr), (yyvsp[(3) - (4)].instr), 0);
-- else if (is_group2 ((yyvsp[(3) - (4)].instr)))
-- (yyval.instr) = gen_multi_instr_1 ((yyvsp[(1) - (4)].instr), 0, (yyvsp[(3) - (4)].instr));
-- else
-- return yyerror ("Wrong 16 bit instructions groups, slot 2 must be the 16-bit instruction group");
-- }
-- else if (((yyvsp[(3) - (4)].instr)->value & 0xf800) == 0xc000)
-- {
-- if (is_group1 ((yyvsp[(1) - (4)].instr)))
-- (yyval.instr) = gen_multi_instr_1 ((yyvsp[(3) - (4)].instr), (yyvsp[(1) - (4)].instr), 0);
-- else if (is_group2 ((yyvsp[(1) - (4)].instr)))
-- (yyval.instr) = gen_multi_instr_1 ((yyvsp[(3) - (4)].instr), 0, (yyvsp[(1) - (4)].instr));
-- else
-- return yyerror ("Wrong 16 bit instructions groups, slot 1 must be the 16-bit instruction group");
-- }
-- else if (is_group1 ((yyvsp[(1) - (4)].instr)) && is_group2 ((yyvsp[(3) - (4)].instr)))
-- (yyval.instr) = gen_multi_instr_1 (0, (yyvsp[(1) - (4)].instr), (yyvsp[(3) - (4)].instr));
-- else if (is_group2 ((yyvsp[(1) - (4)].instr)) && is_group1 ((yyvsp[(3) - (4)].instr)))
-- (yyval.instr) = gen_multi_instr_1 (0, (yyvsp[(3) - (4)].instr), (yyvsp[(1) - (4)].instr));
-- else
-- return yyerror ("Wrong 16 bit instructions groups, slot 1 and slot 2 must be the 16-bit instruction group");
-- }
-- break;
--
-- case 7:
--#line 725 "bfin-parse.y"
-- {
-- (yyval.instr) = 0;
-- yyerror ("");
-- yyerrok;
-- }
-- break;
--
-- case 8:
--#line 736 "bfin-parse.y"
-- {
-- (yyval.instr) = DSP32MAC (3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0);
-- }
-- break;
--
-- case 9:
--#line 740 "bfin-parse.y"
-- {
-- int op0, op1;
-- int w0 = 0, w1 = 0;
-- int h00, h10, h01, h11;
--
-- if (check_macfunc_option (&(yyvsp[(1) - (2)].macfunc), &(yyvsp[(2) - (2)].mod)) < 0)
-- return yyerror ("bad option");
--
-- if ((yyvsp[(1) - (2)].macfunc).n == 0)
-- {
-- if ((yyvsp[(2) - (2)].mod).MM)
-- return yyerror ("(m) not allowed with a0 unit");
-- op1 = 3;
-- op0 = (yyvsp[(1) - (2)].macfunc).op;
-- w1 = 0;
-- w0 = (yyvsp[(1) - (2)].macfunc).w;
-- h00 = IS_H ((yyvsp[(1) - (2)].macfunc).s0);
-- h10 = IS_H ((yyvsp[(1) - (2)].macfunc).s1);
-- h01 = h11 = 0;
-- }
-- else
-- {
-- op1 = (yyvsp[(1) - (2)].macfunc).op;
-- op0 = 3;
-- w1 = (yyvsp[(1) - (2)].macfunc).w;
-- w0 = 0;
-- h00 = h10 = 0;
-- h01 = IS_H ((yyvsp[(1) - (2)].macfunc).s0);
-- h11 = IS_H ((yyvsp[(1) - (2)].macfunc).s1);
-- }
-- (yyval.instr) = DSP32MAC (op1, (yyvsp[(2) - (2)].mod).MM, (yyvsp[(2) - (2)].mod).mod, w1, (yyvsp[(1) - (2)].macfunc).P, h01, h11, h00, h10,
-- &(yyvsp[(1) - (2)].macfunc).dst, op0, &(yyvsp[(1) - (2)].macfunc).s0, &(yyvsp[(1) - (2)].macfunc).s1, w0);
-- }
-- break;
--
-- case 10:
--#line 778 "bfin-parse.y"
-- {
-- Register *dst;
--
-- if (check_macfuncs (&(yyvsp[(1) - (5)].macfunc), &(yyvsp[(2) - (5)].mod), &(yyvsp[(4) - (5)].macfunc), &(yyvsp[(5) - (5)].mod)) < 0)
-- return -1;
-- notethat ("assign_macfunc (.), assign_macfunc (.)\n");
--
-- if ((yyvsp[(1) - (5)].macfunc).w)
-- dst = &(yyvsp[(1) - (5)].macfunc).dst;
-- else
-- dst = &(yyvsp[(4) - (5)].macfunc).dst;
--
-- (yyval.instr) = DSP32MAC ((yyvsp[(1) - (5)].macfunc).op, (yyvsp[(2) - (5)].mod).MM, (yyvsp[(5) - (5)].mod).mod, (yyvsp[(1) - (5)].macfunc).w, (yyvsp[(1) - (5)].macfunc).P,
-- IS_H ((yyvsp[(1) - (5)].macfunc).s0), IS_H ((yyvsp[(1) - (5)].macfunc).s1), IS_H ((yyvsp[(4) - (5)].macfunc).s0), IS_H ((yyvsp[(4) - (5)].macfunc).s1),
-- dst, (yyvsp[(4) - (5)].macfunc).op, &(yyvsp[(1) - (5)].macfunc).s0, &(yyvsp[(1) - (5)].macfunc).s1, (yyvsp[(4) - (5)].macfunc).w);
-- }
-- break;
--
-- case 11:
--#line 798 "bfin-parse.y"
-- {
-- notethat ("dsp32alu: DISALGNEXCPT\n");
-- (yyval.instr) = DSP32ALU (18, 0, 0, 0, 0, 0, 0, 0, 3);
-- }
-- break;
--
-- case 12:
--#line 803 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (6)].reg)) && !IS_A1 ((yyvsp[(4) - (6)].reg)) && IS_A1 ((yyvsp[(5) - (6)].reg)))
-- {
-- notethat ("dsp32alu: dregs = ( A0 += A1 )\n");
-- (yyval.instr) = DSP32ALU (11, 0, 0, &(yyvsp[(1) - (6)].reg), &reg7, &reg7, 0, 0, 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 13:
--#line 813 "bfin-parse.y"
-- {
-- if (!IS_A1 ((yyvsp[(4) - (6)].reg)) && IS_A1 ((yyvsp[(5) - (6)].reg)))
-- {
-- notethat ("dsp32alu: dregs_half = ( A0 += A1 )\n");
-- (yyval.instr) = DSP32ALU (11, IS_H ((yyvsp[(1) - (6)].reg)), 0, &(yyvsp[(1) - (6)].reg), &reg7, &reg7, 0, 0, 1);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 14:
--#line 823 "bfin-parse.y"
-- {
-- notethat ("dsp32alu: A_ZERO_DOT_H = dregs_hi\n");
-- (yyval.instr) = DSP32ALU (9, IS_H ((yyvsp[(3) - (3)].reg)), 0, 0, &(yyvsp[(3) - (3)].reg), 0, 0, 0, 0);
-- }
-- break;
--
-- case 15:
--#line 828 "bfin-parse.y"
-- {
-- notethat ("dsp32alu: A_ZERO_DOT_H = dregs_hi\n");
-- (yyval.instr) = DSP32ALU (9, IS_H ((yyvsp[(3) - (3)].reg)), 0, 0, &(yyvsp[(3) - (3)].reg), 0, 0, 0, 2);
-- }
-- break;
--
-- case 16:
--#line 834 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(2) - (17)].reg)) || !IS_DREG ((yyvsp[(4) - (17)].reg)))
-- return yyerror ("Dregs expected");
-- else if (REG_SAME ((yyvsp[(2) - (17)].reg), (yyvsp[(4) - (17)].reg)))
-- return yyerror ("Illegal dest register combination");
-- else if (!valid_dreg_pair (&(yyvsp[(9) - (17)].reg), (yyvsp[(11) - (17)].expr)))
-- return yyerror ("Bad dreg pair");
-- else if (!valid_dreg_pair (&(yyvsp[(13) - (17)].reg), (yyvsp[(15) - (17)].expr)))
-- return yyerror ("Bad dreg pair");
-- else
-- {
-- notethat ("dsp32alu: (dregs , dregs ) = BYTEOP16P (dregs_pair , dregs_pair ) (aligndir)\n");
-- (yyval.instr) = DSP32ALU (21, 0, &(yyvsp[(2) - (17)].reg), &(yyvsp[(4) - (17)].reg), &(yyvsp[(9) - (17)].reg), &(yyvsp[(13) - (17)].reg), (yyvsp[(17) - (17)].r0).r0, 0, 0);
-- }
-- }
-- break;
--
-- case 17:
--#line 852 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(2) - (17)].reg)) || !IS_DREG ((yyvsp[(4) - (17)].reg)))
-- return yyerror ("Dregs expected");
-- else if (REG_SAME ((yyvsp[(2) - (17)].reg), (yyvsp[(4) - (17)].reg)))
-- return yyerror ("Illegal dest register combination");
-- else if (!valid_dreg_pair (&(yyvsp[(9) - (17)].reg), (yyvsp[(11) - (17)].expr)))
-- return yyerror ("Bad dreg pair");
-- else if (!valid_dreg_pair (&(yyvsp[(13) - (17)].reg), (yyvsp[(15) - (17)].expr)))
-- return yyerror ("Bad dreg pair");
-- else
-- {
-- notethat ("dsp32alu: (dregs , dregs ) = BYTEOP16M (dregs_pair , dregs_pair ) (aligndir)\n");
-- (yyval.instr) = DSP32ALU (21, 0, &(yyvsp[(2) - (17)].reg), &(yyvsp[(4) - (17)].reg), &(yyvsp[(9) - (17)].reg), &(yyvsp[(13) - (17)].reg), (yyvsp[(17) - (17)].r0).r0, 0, 1);
-- }
-- }
-- break;
--
-- case 18:
--#line 869 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(2) - (11)].reg)) || !IS_DREG ((yyvsp[(4) - (11)].reg)))
-- return yyerror ("Dregs expected");
-- else if (REG_SAME ((yyvsp[(2) - (11)].reg), (yyvsp[(4) - (11)].reg)))
-- return yyerror ("Illegal dest register combination");
-- else if (!valid_dreg_pair (&(yyvsp[(8) - (11)].reg), (yyvsp[(10) - (11)].expr)))
-- return yyerror ("Bad dreg pair");
-- else
-- {
-- notethat ("dsp32alu: (dregs , dregs ) = BYTEUNPACK dregs_pair (aligndir)\n");
-- (yyval.instr) = DSP32ALU (24, 0, &(yyvsp[(2) - (11)].reg), &(yyvsp[(4) - (11)].reg), &(yyvsp[(8) - (11)].reg), 0, (yyvsp[(11) - (11)].r0).r0, 0, 1);
-- }
-- }
-- break;
--
-- case 19:
--#line 883 "bfin-parse.y"
-- {
-- if (REG_SAME ((yyvsp[(2) - (11)].reg), (yyvsp[(4) - (11)].reg)))
-- return yyerror ("Illegal dest register combination");
--
-- if (IS_DREG ((yyvsp[(2) - (11)].reg)) && IS_DREG ((yyvsp[(4) - (11)].reg)) && IS_DREG ((yyvsp[(8) - (11)].reg)))
-- {
-- notethat ("dsp32alu: (dregs , dregs ) = SEARCH dregs (searchmod)\n");
-- (yyval.instr) = DSP32ALU (13, 0, &(yyvsp[(2) - (11)].reg), &(yyvsp[(4) - (11)].reg), &(yyvsp[(8) - (11)].reg), 0, 0, 0, (yyvsp[(10) - (11)].r0).r0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 20:
--#line 897 "bfin-parse.y"
-- {
-- if (REG_SAME ((yyvsp[(1) - (11)].reg), (yyvsp[(7) - (11)].reg)))
-- return yyerror ("Illegal dest register combination");
--
-- if (IS_DREG ((yyvsp[(1) - (11)].reg)) && IS_DREG ((yyvsp[(7) - (11)].reg)))
-- {
-- notethat ("dsp32alu: dregs = A1.l + A1.h, dregs = A0.l + A0.h \n");
-- (yyval.instr) = DSP32ALU (12, 0, &(yyvsp[(1) - (11)].reg), &(yyvsp[(7) - (11)].reg), &reg7, &reg7, 0, 0, 1);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 21:
--#line 912 "bfin-parse.y"
-- {
-- if (REG_SAME ((yyvsp[(1) - (12)].reg), (yyvsp[(7) - (12)].reg)))
-- return yyerror ("Resource conflict in dest reg");
--
-- if (IS_DREG ((yyvsp[(1) - (12)].reg)) && IS_DREG ((yyvsp[(7) - (12)].reg)) && !REG_SAME ((yyvsp[(3) - (12)].reg), (yyvsp[(5) - (12)].reg))
-- && IS_A1 ((yyvsp[(9) - (12)].reg)) && !IS_A1 ((yyvsp[(11) - (12)].reg)))
-- {
-- notethat ("dsp32alu: dregs = A1 + A0 , dregs = A1 - A0 (amod1)\n");
-- (yyval.instr) = DSP32ALU (17, 0, &(yyvsp[(1) - (12)].reg), &(yyvsp[(7) - (12)].reg), &reg7, &reg7, (yyvsp[(12) - (12)].modcodes).s0, (yyvsp[(12) - (12)].modcodes).x0, 0);
--
-- }
-- else if (IS_DREG ((yyvsp[(1) - (12)].reg)) && IS_DREG ((yyvsp[(7) - (12)].reg)) && !REG_SAME ((yyvsp[(3) - (12)].reg), (yyvsp[(5) - (12)].reg))
-- && !IS_A1 ((yyvsp[(9) - (12)].reg)) && IS_A1 ((yyvsp[(11) - (12)].reg)))
-- {
-- notethat ("dsp32alu: dregs = A0 + A1 , dregs = A0 - A1 (amod1)\n");
-- (yyval.instr) = DSP32ALU (17, 0, &(yyvsp[(1) - (12)].reg), &(yyvsp[(7) - (12)].reg), &reg7, &reg7, (yyvsp[(12) - (12)].modcodes).s0, (yyvsp[(12) - (12)].modcodes).x0, 1);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 22:
--#line 934 "bfin-parse.y"
-- {
-- if ((yyvsp[(4) - (12)].r0).r0 == (yyvsp[(10) - (12)].r0).r0)
-- return yyerror ("Operators must differ");
--
-- if (IS_DREG ((yyvsp[(1) - (12)].reg)) && IS_DREG ((yyvsp[(3) - (12)].reg)) && IS_DREG ((yyvsp[(5) - (12)].reg))
-- && REG_SAME ((yyvsp[(3) - (12)].reg), (yyvsp[(9) - (12)].reg)) && REG_SAME ((yyvsp[(5) - (12)].reg), (yyvsp[(11) - (12)].reg)))
-- {
-- notethat ("dsp32alu: dregs = dregs + dregs,"
-- "dregs = dregs - dregs (amod1)\n");
-- (yyval.instr) = DSP32ALU (4, 0, &(yyvsp[(1) - (12)].reg), &(yyvsp[(7) - (12)].reg), &(yyvsp[(3) - (12)].reg), &(yyvsp[(5) - (12)].reg), (yyvsp[(12) - (12)].modcodes).s0, (yyvsp[(12) - (12)].modcodes).x0, 2);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 23:
--#line 952 "bfin-parse.y"
-- {
-- if (!REG_SAME ((yyvsp[(3) - (12)].reg), (yyvsp[(9) - (12)].reg)) || !REG_SAME ((yyvsp[(5) - (12)].reg), (yyvsp[(11) - (12)].reg)))
-- return yyerror ("Differing source registers");
--
-- if (!IS_DREG ((yyvsp[(1) - (12)].reg)) || !IS_DREG ((yyvsp[(3) - (12)].reg)) || !IS_DREG ((yyvsp[(5) - (12)].reg)) || !IS_DREG ((yyvsp[(7) - (12)].reg)))
-- return yyerror ("Dregs expected");
--
-- if (REG_SAME ((yyvsp[(1) - (12)].reg), (yyvsp[(7) - (12)].reg)))
-- return yyerror ("Resource conflict in dest reg");
--
-- if ((yyvsp[(4) - (12)].r0).r0 == 1 && (yyvsp[(10) - (12)].r0).r0 == 2)
-- {
-- notethat ("dsp32alu: dregs = dregs .|. dregs , dregs = dregs .|. dregs (amod2)\n");
-- (yyval.instr) = DSP32ALU (1, 1, &(yyvsp[(1) - (12)].reg), &(yyvsp[(7) - (12)].reg), &(yyvsp[(3) - (12)].reg), &(yyvsp[(5) - (12)].reg), (yyvsp[(12) - (12)].modcodes).s0, (yyvsp[(12) - (12)].modcodes).x0, (yyvsp[(12) - (12)].modcodes).r0);
-- }
-- else if ((yyvsp[(4) - (12)].r0).r0 == 0 && (yyvsp[(10) - (12)].r0).r0 == 3)
-- {
-- notethat ("dsp32alu: dregs = dregs .|. dregs , dregs = dregs .|. dregs (amod2)\n");
-- (yyval.instr) = DSP32ALU (1, 0, &(yyvsp[(1) - (12)].reg), &(yyvsp[(7) - (12)].reg), &(yyvsp[(3) - (12)].reg), &(yyvsp[(5) - (12)].reg), (yyvsp[(12) - (12)].modcodes).s0, (yyvsp[(12) - (12)].modcodes).x0, (yyvsp[(12) - (12)].modcodes).r0);
-- }
-- else
-- return yyerror ("Bar operand mismatch");
-- }
-- break;
--
-- case 24:
--#line 977 "bfin-parse.y"
-- {
-- int op;
--
-- if (IS_DREG ((yyvsp[(1) - (5)].reg)) && IS_DREG ((yyvsp[(4) - (5)].reg)))
-- {
-- if ((yyvsp[(5) - (5)].r0).r0)
-- {
-- notethat ("dsp32alu: dregs = ABS dregs (v)\n");
-- op = 6;
-- }
-- else
-- {
-- /* Vector version of ABS. */
-- notethat ("dsp32alu: dregs = ABS dregs\n");
-- op = 7;
-- }
-- (yyval.instr) = DSP32ALU (op, 0, 0, &(yyvsp[(1) - (5)].reg), &(yyvsp[(4) - (5)].reg), 0, 0, 0, 2);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 25:
--#line 999 "bfin-parse.y"
-- {
-- notethat ("dsp32alu: Ax = ABS Ax\n");
-- (yyval.instr) = DSP32ALU (16, IS_A1 ((yyvsp[(1) - (3)].reg)), 0, 0, &reg7, &reg7, 0, 0, IS_A1 ((yyvsp[(3) - (3)].reg)));
-- }
-- break;
--
-- case 26:
--#line 1004 "bfin-parse.y"
-- {
-- if (IS_DREG_L ((yyvsp[(3) - (3)].reg)))
-- {
-- notethat ("dsp32alu: A0.l = reg_half\n");
-- (yyval.instr) = DSP32ALU (9, IS_H ((yyvsp[(3) - (3)].reg)), 0, 0, &(yyvsp[(3) - (3)].reg), 0, 0, 0, 0);
-- }
-- else
-- return yyerror ("A0.l = Rx.l expected");
-- }
-- break;
--
-- case 27:
--#line 1014 "bfin-parse.y"
-- {
-- if (IS_DREG_L ((yyvsp[(3) - (3)].reg)))
-- {
-- notethat ("dsp32alu: A1.l = reg_half\n");
-- (yyval.instr) = DSP32ALU (9, IS_H ((yyvsp[(3) - (3)].reg)), 0, 0, &(yyvsp[(3) - (3)].reg), 0, 0, 0, 2);
-- }
-- else
-- return yyerror ("A1.l = Rx.l expected");
-- }
-- break;
--
-- case 28:
--#line 1025 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (8)].reg)) && IS_DREG ((yyvsp[(5) - (8)].reg)) && IS_DREG ((yyvsp[(7) - (8)].reg)))
-- {
-- notethat ("dsp32shift: dregs = ALIGN8 (dregs , dregs )\n");
-- (yyval.instr) = DSP32SHIFT (13, &(yyvsp[(1) - (8)].reg), &(yyvsp[(7) - (8)].reg), &(yyvsp[(5) - (8)].reg), (yyvsp[(3) - (8)].r0).r0, 0);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 29:
--#line 1036 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(1) - (13)].reg)))
-- return yyerror ("Dregs expected");
-- else if (!valid_dreg_pair (&(yyvsp[(5) - (13)].reg), (yyvsp[(7) - (13)].expr)))
-- return yyerror ("Bad dreg pair");
-- else if (!valid_dreg_pair (&(yyvsp[(9) - (13)].reg), (yyvsp[(11) - (13)].expr)))
-- return yyerror ("Bad dreg pair");
-- else
-- {
-- notethat ("dsp32alu: dregs = BYTEOP1P (dregs_pair , dregs_pair ) (T)\n");
-- (yyval.instr) = DSP32ALU (20, 0, 0, &(yyvsp[(1) - (13)].reg), &(yyvsp[(5) - (13)].reg), &(yyvsp[(9) - (13)].reg), (yyvsp[(13) - (13)].modcodes).s0, 0, (yyvsp[(13) - (13)].modcodes).r0);
-- }
-- }
-- break;
--
-- case 30:
--#line 1050 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(1) - (12)].reg)))
-- return yyerror ("Dregs expected");
-- else if (!valid_dreg_pair (&(yyvsp[(5) - (12)].reg), (yyvsp[(7) - (12)].expr)))
-- return yyerror ("Bad dreg pair");
-- else if (!valid_dreg_pair (&(yyvsp[(9) - (12)].reg), (yyvsp[(11) - (12)].expr)))
-- return yyerror ("Bad dreg pair");
-- else
-- {
-- notethat ("dsp32alu: dregs = BYTEOP1P (dregs_pair , dregs_pair ) (T)\n");
-- (yyval.instr) = DSP32ALU (20, 0, 0, &(yyvsp[(1) - (12)].reg), &(yyvsp[(5) - (12)].reg), &(yyvsp[(9) - (12)].reg), 0, 0, 0);
-- }
-- }
-- break;
--
-- case 31:
--#line 1066 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(1) - (13)].reg)))
-- return yyerror ("Dregs expected");
-- else if (!valid_dreg_pair (&(yyvsp[(5) - (13)].reg), (yyvsp[(7) - (13)].expr)))
-- return yyerror ("Bad dreg pair");
-- else if (!valid_dreg_pair (&(yyvsp[(9) - (13)].reg), (yyvsp[(11) - (13)].expr)))
-- return yyerror ("Bad dreg pair");
-- else
-- {
-- notethat ("dsp32alu: dregs = BYTEOP2P (dregs_pair , dregs_pair ) (rnd_op)\n");
-- (yyval.instr) = DSP32ALU (22, (yyvsp[(13) - (13)].modcodes).r0, 0, &(yyvsp[(1) - (13)].reg), &(yyvsp[(5) - (13)].reg), &(yyvsp[(9) - (13)].reg), (yyvsp[(13) - (13)].modcodes).s0, (yyvsp[(13) - (13)].modcodes).x0, (yyvsp[(13) - (13)].modcodes).aop);
-- }
-- }
-- break;
--
-- case 32:
--#line 1082 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(1) - (13)].reg)))
-- return yyerror ("Dregs expected");
-- else if (!valid_dreg_pair (&(yyvsp[(5) - (13)].reg), (yyvsp[(7) - (13)].expr)))
-- return yyerror ("Bad dreg pair");
-- else if (!valid_dreg_pair (&(yyvsp[(9) - (13)].reg), (yyvsp[(11) - (13)].expr)))
-- return yyerror ("Bad dreg pair");
-- else
-- {
-- notethat ("dsp32alu: dregs = BYTEOP3P (dregs_pair , dregs_pair ) (b3_op)\n");
-- (yyval.instr) = DSP32ALU (23, (yyvsp[(13) - (13)].modcodes).x0, 0, &(yyvsp[(1) - (13)].reg), &(yyvsp[(5) - (13)].reg), &(yyvsp[(9) - (13)].reg), (yyvsp[(13) - (13)].modcodes).s0, 0, 0);
-- }
-- }
-- break;
--
-- case 33:
--#line 1097 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (8)].reg)) && IS_DREG ((yyvsp[(5) - (8)].reg)) && IS_DREG ((yyvsp[(7) - (8)].reg)))
-- {
-- notethat ("dsp32alu: dregs = BYTEPACK (dregs , dregs )\n");
-- (yyval.instr) = DSP32ALU (24, 0, 0, &(yyvsp[(1) - (8)].reg), &(yyvsp[(5) - (8)].reg), &(yyvsp[(7) - (8)].reg), 0, 0, 0);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 34:
--#line 1109 "bfin-parse.y"
-- {
-- if (IS_HCOMPL ((yyvsp[(1) - (17)].reg), (yyvsp[(3) - (17)].reg)) && IS_HCOMPL ((yyvsp[(7) - (17)].reg), (yyvsp[(14) - (17)].reg)) && IS_HCOMPL ((yyvsp[(10) - (17)].reg), (yyvsp[(17) - (17)].reg)))
-- {
-- notethat ("dsp32alu: dregs_hi = dregs_lo ="
-- "SIGN (dregs_hi) * dregs_hi + "
-- "SIGN (dregs_lo) * dregs_lo \n");
--
-- (yyval.instr) = DSP32ALU (12, 0, 0, &(yyvsp[(1) - (17)].reg), &(yyvsp[(7) - (17)].reg), &(yyvsp[(10) - (17)].reg), 0, 0, 0);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 35:
--#line 1122 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (6)].reg)) && IS_DREG ((yyvsp[(3) - (6)].reg)) && IS_DREG ((yyvsp[(5) - (6)].reg)))
-- {
-- if ((yyvsp[(6) - (6)].modcodes).aop == 0)
-- {
-- /* No saturation flag specified, generate the 16 bit variant. */
-- notethat ("COMP3op: dregs = dregs +- dregs\n");
-- (yyval.instr) = COMP3OP (&(yyvsp[(1) - (6)].reg), &(yyvsp[(3) - (6)].reg), &(yyvsp[(5) - (6)].reg), (yyvsp[(4) - (6)].r0).r0);
-- }
-- else
-- {
-- /* Saturation flag specified, generate the 32 bit variant. */
-- notethat ("dsp32alu: dregs = dregs +- dregs (amod1)\n");
-- (yyval.instr) = DSP32ALU (4, 0, 0, &(yyvsp[(1) - (6)].reg), &(yyvsp[(3) - (6)].reg), &(yyvsp[(5) - (6)].reg), (yyvsp[(6) - (6)].modcodes).s0, (yyvsp[(6) - (6)].modcodes).x0, (yyvsp[(4) - (6)].r0).r0);
-- }
-- }
-- else
-- if (IS_PREG ((yyvsp[(1) - (6)].reg)) && IS_PREG ((yyvsp[(3) - (6)].reg)) && IS_PREG ((yyvsp[(5) - (6)].reg)) && (yyvsp[(4) - (6)].r0).r0 == 0)
-- {
-- notethat ("COMP3op: pregs = pregs + pregs\n");
-- (yyval.instr) = COMP3OP (&(yyvsp[(1) - (6)].reg), &(yyvsp[(3) - (6)].reg), &(yyvsp[(5) - (6)].reg), 5);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 36:
--#line 1148 "bfin-parse.y"
-- {
-- int op;
--
-- if (IS_DREG ((yyvsp[(1) - (9)].reg)) && IS_DREG ((yyvsp[(5) - (9)].reg)) && IS_DREG ((yyvsp[(7) - (9)].reg)))
-- {
-- if ((yyvsp[(9) - (9)].r0).r0)
-- op = 6;
-- else
-- op = 7;
--
-- notethat ("dsp32alu: dregs = {MIN|MAX} (dregs, dregs)\n");
-- (yyval.instr) = DSP32ALU (op, 0, 0, &(yyvsp[(1) - (9)].reg), &(yyvsp[(5) - (9)].reg), &(yyvsp[(7) - (9)].reg), 0, 0, (yyvsp[(3) - (9)].r0).r0);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 37:
--#line 1166 "bfin-parse.y"
-- {
-- notethat ("dsp32alu: Ax = - Ax\n");
-- (yyval.instr) = DSP32ALU (14, IS_A1 ((yyvsp[(1) - (3)].reg)), 0, 0, &reg7, &reg7, 0, 0, IS_A1 ((yyvsp[(3) - (3)].reg)));
-- }
-- break;
--
-- case 38:
--#line 1171 "bfin-parse.y"
-- {
-- notethat ("dsp32alu: dregs_lo = dregs_lo +- dregs_lo (amod1)\n");
-- (yyval.instr) = DSP32ALU (2 | (yyvsp[(4) - (6)].r0).r0, IS_H ((yyvsp[(1) - (6)].reg)), 0, &(yyvsp[(1) - (6)].reg), &(yyvsp[(3) - (6)].reg), &(yyvsp[(5) - (6)].reg),
-- (yyvsp[(6) - (6)].modcodes).s0, (yyvsp[(6) - (6)].modcodes).x0, HL2 ((yyvsp[(3) - (6)].reg), (yyvsp[(5) - (6)].reg)));
-- }
-- break;
--
-- case 39:
--#line 1177 "bfin-parse.y"
-- {
-- if (EXPR_VALUE ((yyvsp[(3) - (3)].expr)) == 0 && !REG_SAME ((yyvsp[(1) - (3)].reg), (yyvsp[(2) - (3)].reg)))
-- {
-- notethat ("dsp32alu: A1 = A0 = 0\n");
-- (yyval.instr) = DSP32ALU (8, 0, 0, 0, &reg7, &reg7, 0, 0, 2);
-- }
-- else
-- return yyerror ("Bad value, 0 expected");
-- }
-- break;
--
-- case 40:
--#line 1189 "bfin-parse.y"
-- {
-- if (REG_SAME ((yyvsp[(1) - (5)].reg), (yyvsp[(2) - (5)].reg)))
-- {
-- notethat ("dsp32alu: Ax = Ax (S)\n");
-- (yyval.instr) = DSP32ALU (8, 0, 0, 0, &reg7, &reg7, 1, 0, IS_A1 ((yyvsp[(1) - (5)].reg)));
-- }
-- else
-- return yyerror ("Registers must be equal");
-- }
-- break;
--
-- case 41:
--#line 1200 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(3) - (6)].reg)))
-- {
-- notethat ("dsp32alu: dregs_half = dregs (RND)\n");
-- (yyval.instr) = DSP32ALU (12, IS_H ((yyvsp[(1) - (6)].reg)), 0, &(yyvsp[(1) - (6)].reg), &(yyvsp[(3) - (6)].reg), 0, 0, 0, 3);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 42:
--#line 1211 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(3) - (8)].reg)) && IS_DREG ((yyvsp[(5) - (8)].reg)))
-- {
-- notethat ("dsp32alu: dregs_half = dregs (+-) dregs (RND12)\n");
-- (yyval.instr) = DSP32ALU (5, IS_H ((yyvsp[(1) - (8)].reg)), 0, &(yyvsp[(1) - (8)].reg), &(yyvsp[(3) - (8)].reg), &(yyvsp[(5) - (8)].reg), 0, 0, (yyvsp[(4) - (8)].r0).r0);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 43:
--#line 1222 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(3) - (8)].reg)) && IS_DREG ((yyvsp[(5) - (8)].reg)))
-- {
-- notethat ("dsp32alu: dregs_half = dregs -+ dregs (RND20)\n");
-- (yyval.instr) = DSP32ALU (5, IS_H ((yyvsp[(1) - (8)].reg)), 0, &(yyvsp[(1) - (8)].reg), &(yyvsp[(3) - (8)].reg), &(yyvsp[(5) - (8)].reg), 0, 1, (yyvsp[(4) - (8)].r0).r0 | 2);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 44:
--#line 1233 "bfin-parse.y"
-- {
-- if (!REG_SAME ((yyvsp[(1) - (2)].reg), (yyvsp[(2) - (2)].reg)))
-- {
-- notethat ("dsp32alu: An = Am\n");
-- (yyval.instr) = DSP32ALU (8, 0, 0, 0, &reg7, &reg7, IS_A1 ((yyvsp[(1) - (2)].reg)), 0, 3);
-- }
-- else
-- return yyerror ("Accu reg arguments must differ");
-- }
-- break;
--
-- case 45:
--#line 1244 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(2) - (2)].reg)))
-- {
-- notethat ("dsp32alu: An = dregs\n");
-- (yyval.instr) = DSP32ALU (9, 0, 0, 0, &(yyvsp[(2) - (2)].reg), 0, 1, 0, IS_A1 ((yyvsp[(1) - (2)].reg)) << 1);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 46:
--#line 1255 "bfin-parse.y"
-- {
-- if (!IS_H ((yyvsp[(3) - (4)].reg)))
-- {
-- if ((yyvsp[(1) - (4)].reg).regno == REG_A0x && IS_DREG ((yyvsp[(3) - (4)].reg)))
-- {
-- notethat ("dsp32alu: A0.x = dregs_lo\n");
-- (yyval.instr) = DSP32ALU (9, 0, 0, 0, &(yyvsp[(3) - (4)].reg), 0, 0, 0, 1);
-- }
-- else if ((yyvsp[(1) - (4)].reg).regno == REG_A1x && IS_DREG ((yyvsp[(3) - (4)].reg)))
-- {
-- notethat ("dsp32alu: A1.x = dregs_lo\n");
-- (yyval.instr) = DSP32ALU (9, 0, 0, 0, &(yyvsp[(3) - (4)].reg), 0, 0, 0, 3);
-- }
-- else if (IS_DREG ((yyvsp[(1) - (4)].reg)) && IS_DREG ((yyvsp[(3) - (4)].reg)))
-- {
-- notethat ("ALU2op: dregs = dregs_lo\n");
-- (yyval.instr) = ALU2OP (&(yyvsp[(1) - (4)].reg), &(yyvsp[(3) - (4)].reg), 10 | ((yyvsp[(4) - (4)].r0).r0 ? 0: 1));
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- else
-- return yyerror ("Low reg expected");
-- }
-- break;
--
-- case 47:
--#line 1281 "bfin-parse.y"
-- {
-- notethat ("LDIMMhalf: pregs_half = imm16\n");
--
-- if (!IS_DREG ((yyvsp[(1) - (3)].reg)) && !IS_PREG ((yyvsp[(1) - (3)].reg)) && !IS_IREG ((yyvsp[(1) - (3)].reg))
-- && !IS_MREG ((yyvsp[(1) - (3)].reg)) && !IS_BREG ((yyvsp[(1) - (3)].reg)) && !IS_LREG ((yyvsp[(1) - (3)].reg)))
-- return yyerror ("Wrong register for load immediate");
--
-- if (!IS_IMM ((yyvsp[(3) - (3)].expr), 16) && !IS_UIMM ((yyvsp[(3) - (3)].expr), 16))
-- return yyerror ("Constant out of range");
--
-- (yyval.instr) = LDIMMHALF_R (&(yyvsp[(1) - (3)].reg), IS_H ((yyvsp[(1) - (3)].reg)), 0, 0, (yyvsp[(3) - (3)].expr));
-- }
-- break;
--
-- case 48:
--#line 1295 "bfin-parse.y"
-- {
-- notethat ("dsp32alu: An = 0\n");
--
-- if (imm7 ((yyvsp[(2) - (2)].expr)) != 0)
-- return yyerror ("0 expected");
--
-- (yyval.instr) = DSP32ALU (8, 0, 0, 0, 0, 0, 0, 0, IS_A1 ((yyvsp[(1) - (2)].reg)));
-- }
-- break;
--
-- case 49:
--#line 1305 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(1) - (4)].reg)) && !IS_PREG ((yyvsp[(1) - (4)].reg)) && !IS_IREG ((yyvsp[(1) - (4)].reg))
-- && !IS_MREG ((yyvsp[(1) - (4)].reg)) && !IS_BREG ((yyvsp[(1) - (4)].reg)) && !IS_LREG ((yyvsp[(1) - (4)].reg)))
-- return yyerror ("Wrong register for load immediate");
--
-- if ((yyvsp[(4) - (4)].r0).r0 == 0)
-- {
-- /* 7 bit immediate value if possible.
-- We will check for that constant value for efficiency
-- If it goes to reloc, it will be 16 bit. */
-- if (IS_CONST ((yyvsp[(3) - (4)].expr)) && IS_IMM ((yyvsp[(3) - (4)].expr), 7) && IS_DREG ((yyvsp[(1) - (4)].reg)))
-- {
-- notethat ("COMPI2opD: dregs = imm7 (x) \n");
-- (yyval.instr) = COMPI2OPD (&(yyvsp[(1) - (4)].reg), imm7 ((yyvsp[(3) - (4)].expr)), 0);
-- }
-- else if (IS_CONST ((yyvsp[(3) - (4)].expr)) && IS_IMM ((yyvsp[(3) - (4)].expr), 7) && IS_PREG ((yyvsp[(1) - (4)].reg)))
-- {
-- notethat ("COMPI2opP: pregs = imm7 (x)\n");
-- (yyval.instr) = COMPI2OPP (&(yyvsp[(1) - (4)].reg), imm7 ((yyvsp[(3) - (4)].expr)), 0);
-- }
-- else
-- {
-- if (IS_CONST ((yyvsp[(3) - (4)].expr)) && !IS_IMM ((yyvsp[(3) - (4)].expr), 16))
-- return yyerror ("Immediate value out of range");
--
-- notethat ("LDIMMhalf: regs = luimm16 (x)\n");
-- /* reg, H, S, Z. */
-- (yyval.instr) = LDIMMHALF_R5 (&(yyvsp[(1) - (4)].reg), 0, 1, 0, (yyvsp[(3) - (4)].expr));
-- }
-- }
-- else
-- {
-- /* (z) There is no 7 bit zero extended instruction.
-- If the expr is a relocation, generate it. */
--
-- if (IS_CONST ((yyvsp[(3) - (4)].expr)) && !IS_UIMM ((yyvsp[(3) - (4)].expr), 16))
-- return yyerror ("Immediate value out of range");
--
-- notethat ("LDIMMhalf: regs = luimm16 (x)\n");
-- /* reg, H, S, Z. */
-- (yyval.instr) = LDIMMHALF_R5 (&(yyvsp[(1) - (4)].reg), 0, 0, 1, (yyvsp[(3) - (4)].expr));
-- }
-- }
-- break;
--
-- case 50:
--#line 1350 "bfin-parse.y"
-- {
-- if (IS_H ((yyvsp[(1) - (3)].reg)))
-- return yyerror ("Low reg expected");
--
-- if (IS_DREG ((yyvsp[(1) - (3)].reg)) && (yyvsp[(3) - (3)].reg).regno == REG_A0x)
-- {
-- notethat ("dsp32alu: dregs_lo = A0.x\n");
-- (yyval.instr) = DSP32ALU (10, 0, 0, &(yyvsp[(1) - (3)].reg), &reg7, &reg7, 0, 0, 0);
-- }
-- else if (IS_DREG ((yyvsp[(1) - (3)].reg)) && (yyvsp[(3) - (3)].reg).regno == REG_A1x)
-- {
-- notethat ("dsp32alu: dregs_lo = A1.x\n");
-- (yyval.instr) = DSP32ALU (10, 0, 0, &(yyvsp[(1) - (3)].reg), &reg7, &reg7, 0, 0, 1);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 51:
--#line 1369 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (6)].reg)) && IS_DREG ((yyvsp[(3) - (6)].reg)) && IS_DREG ((yyvsp[(5) - (6)].reg)))
-- {
-- notethat ("dsp32alu: dregs = dregs .|. dregs (amod0)\n");
-- (yyval.instr) = DSP32ALU (0, 0, 0, &(yyvsp[(1) - (6)].reg), &(yyvsp[(3) - (6)].reg), &(yyvsp[(5) - (6)].reg), (yyvsp[(6) - (6)].modcodes).s0, (yyvsp[(6) - (6)].modcodes).x0, (yyvsp[(4) - (6)].r0).r0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 52:
--#line 1380 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (4)].reg)) && IS_DREG ((yyvsp[(3) - (4)].reg)))
-- {
-- notethat ("ALU2op: dregs = dregs_byte\n");
-- (yyval.instr) = ALU2OP (&(yyvsp[(1) - (4)].reg), &(yyvsp[(3) - (4)].reg), 12 | ((yyvsp[(4) - (4)].r0).r0 ? 0: 1));
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 53:
--#line 1391 "bfin-parse.y"
-- {
-- if (REG_SAME ((yyvsp[(1) - (7)].reg), (yyvsp[(3) - (7)].reg)) && REG_SAME ((yyvsp[(5) - (7)].reg), (yyvsp[(7) - (7)].reg)) && !REG_SAME ((yyvsp[(1) - (7)].reg), (yyvsp[(5) - (7)].reg)))
-- {
-- notethat ("dsp32alu: A1 = ABS A1 , A0 = ABS A0\n");
-- (yyval.instr) = DSP32ALU (16, 0, 0, 0, &reg7, &reg7, 0, 0, 3);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 54:
--#line 1402 "bfin-parse.y"
-- {
-- if (REG_SAME ((yyvsp[(1) - (7)].reg), (yyvsp[(3) - (7)].reg)) && REG_SAME ((yyvsp[(5) - (7)].reg), (yyvsp[(7) - (7)].reg)) && !REG_SAME ((yyvsp[(1) - (7)].reg), (yyvsp[(5) - (7)].reg)))
-- {
-- notethat ("dsp32alu: A1 = - A1 , A0 = - A0\n");
-- (yyval.instr) = DSP32ALU (14, 0, 0, 0, &reg7, &reg7, 0, 0, 3);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 55:
--#line 1413 "bfin-parse.y"
-- {
-- if (!IS_A1 ((yyvsp[(1) - (3)].reg)) && IS_A1 ((yyvsp[(2) - (3)].reg)))
-- {
-- notethat ("dsp32alu: A0 -= A1\n");
-- (yyval.instr) = DSP32ALU (11, 0, 0, 0, &reg7, &reg7, (yyvsp[(3) - (3)].r0).r0, 0, 3);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 56:
--#line 1424 "bfin-parse.y"
-- {
-- if (IS_IREG ((yyvsp[(1) - (3)].reg)) && EXPR_VALUE ((yyvsp[(3) - (3)].expr)) == 4)
-- {
-- notethat ("dagMODik: iregs -= 4\n");
-- (yyval.instr) = DAGMODIK (&(yyvsp[(1) - (3)].reg), 3);
-- }
-- else if (IS_IREG ((yyvsp[(1) - (3)].reg)) && EXPR_VALUE ((yyvsp[(3) - (3)].expr)) == 2)
-- {
-- notethat ("dagMODik: iregs -= 2\n");
-- (yyval.instr) = DAGMODIK (&(yyvsp[(1) - (3)].reg), 1);
-- }
-- else
-- return yyerror ("Register or value mismatch");
-- }
-- break;
--
-- case 57:
--#line 1440 "bfin-parse.y"
-- {
-- if (IS_IREG ((yyvsp[(1) - (6)].reg)) && IS_MREG ((yyvsp[(3) - (6)].reg)))
-- {
-- notethat ("dagMODim: iregs += mregs (opt_brev)\n");
-- /* i, m, op, br. */
-- (yyval.instr) = DAGMODIM (&(yyvsp[(1) - (6)].reg), &(yyvsp[(3) - (6)].reg), 0, 1);
-- }
-- else if (IS_PREG ((yyvsp[(1) - (6)].reg)) && IS_PREG ((yyvsp[(3) - (6)].reg)))
-- {
-- notethat ("PTR2op: pregs += pregs (BREV )\n");
-- (yyval.instr) = PTR2OP (&(yyvsp[(1) - (6)].reg), &(yyvsp[(3) - (6)].reg), 5);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 58:
--#line 1457 "bfin-parse.y"
-- {
-- if (IS_IREG ((yyvsp[(1) - (3)].reg)) && IS_MREG ((yyvsp[(3) - (3)].reg)))
-- {
-- notethat ("dagMODim: iregs -= mregs\n");
-- (yyval.instr) = DAGMODIM (&(yyvsp[(1) - (3)].reg), &(yyvsp[(3) - (3)].reg), 1, 0);
-- }
-- else if (IS_PREG ((yyvsp[(1) - (3)].reg)) && IS_PREG ((yyvsp[(3) - (3)].reg)))
-- {
-- notethat ("PTR2op: pregs -= pregs\n");
-- (yyval.instr) = PTR2OP (&(yyvsp[(1) - (3)].reg), &(yyvsp[(3) - (3)].reg), 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 59:
--#line 1473 "bfin-parse.y"
-- {
-- if (!IS_A1 ((yyvsp[(1) - (4)].reg)) && IS_A1 ((yyvsp[(3) - (4)].reg)))
-- {
-- notethat ("dsp32alu: A0 += A1 (W32)\n");
-- (yyval.instr) = DSP32ALU (11, 0, 0, 0, &reg7, &reg7, (yyvsp[(4) - (4)].r0).r0, 0, 2);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 60:
--#line 1484 "bfin-parse.y"
-- {
-- if (IS_IREG ((yyvsp[(1) - (3)].reg)) && IS_MREG ((yyvsp[(3) - (3)].reg)))
-- {
-- notethat ("dagMODim: iregs += mregs\n");
-- (yyval.instr) = DAGMODIM (&(yyvsp[(1) - (3)].reg), &(yyvsp[(3) - (3)].reg), 0, 0);
-- }
-- else
-- return yyerror ("iregs += mregs expected");
-- }
-- break;
--
-- case 61:
--#line 1495 "bfin-parse.y"
-- {
-- if (IS_IREG ((yyvsp[(1) - (3)].reg)))
-- {
-- if (EXPR_VALUE ((yyvsp[(3) - (3)].expr)) == 4)
-- {
-- notethat ("dagMODik: iregs += 4\n");
-- (yyval.instr) = DAGMODIK (&(yyvsp[(1) - (3)].reg), 2);
-- }
-- else if (EXPR_VALUE ((yyvsp[(3) - (3)].expr)) == 2)
-- {
-- notethat ("dagMODik: iregs += 2\n");
-- (yyval.instr) = DAGMODIK (&(yyvsp[(1) - (3)].reg), 0);
-- }
-- else
-- return yyerror ("iregs += [ 2 | 4 ");
-- }
-- else if (IS_PREG ((yyvsp[(1) - (3)].reg)) && IS_IMM ((yyvsp[(3) - (3)].expr), 7))
-- {
-- notethat ("COMPI2opP: pregs += imm7\n");
-- (yyval.instr) = COMPI2OPP (&(yyvsp[(1) - (3)].reg), imm7 ((yyvsp[(3) - (3)].expr)), 1);
-- }
-- else if (IS_DREG ((yyvsp[(1) - (3)].reg)) && IS_IMM ((yyvsp[(3) - (3)].expr), 7))
-- {
-- notethat ("COMPI2opD: dregs += imm7\n");
-- (yyval.instr) = COMPI2OPD (&(yyvsp[(1) - (3)].reg), imm7 ((yyvsp[(3) - (3)].expr)), 1);
-- }
-- else if ((IS_DREG ((yyvsp[(1) - (3)].reg)) || IS_PREG ((yyvsp[(1) - (3)].reg))) && IS_CONST ((yyvsp[(3) - (3)].expr)))
-- return yyerror ("Immediate value out of range");
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 62:
--#line 1528 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (3)].reg)) && IS_DREG ((yyvsp[(3) - (3)].reg)))
-- {
-- notethat ("ALU2op: dregs *= dregs\n");
-- (yyval.instr) = ALU2OP (&(yyvsp[(1) - (3)].reg), &(yyvsp[(3) - (3)].reg), 3);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 63:
--#line 1539 "bfin-parse.y"
-- {
-- if (!valid_dreg_pair (&(yyvsp[(3) - (11)].reg), (yyvsp[(5) - (11)].expr)))
-- return yyerror ("Bad dreg pair");
-- else if (!valid_dreg_pair (&(yyvsp[(7) - (11)].reg), (yyvsp[(9) - (11)].expr)))
-- return yyerror ("Bad dreg pair");
-- else
-- {
-- notethat ("dsp32alu: SAA (dregs_pair , dregs_pair ) (aligndir)\n");
-- (yyval.instr) = DSP32ALU (18, 0, 0, 0, &(yyvsp[(3) - (11)].reg), &(yyvsp[(7) - (11)].reg), (yyvsp[(11) - (11)].r0).r0, 0, 0);
-- }
-- }
-- break;
--
-- case 64:
--#line 1552 "bfin-parse.y"
-- {
-- if (REG_SAME ((yyvsp[(1) - (11)].reg), (yyvsp[(2) - (11)].reg)) && REG_SAME ((yyvsp[(7) - (11)].reg), (yyvsp[(8) - (11)].reg)) && !REG_SAME ((yyvsp[(1) - (11)].reg), (yyvsp[(7) - (11)].reg)))
-- {
-- notethat ("dsp32alu: A1 = A1 (S) , A0 = A0 (S)\n");
-- (yyval.instr) = DSP32ALU (8, 0, 0, 0, &reg7, &reg7, 1, 0, 2);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 65:
--#line 1563 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (9)].reg)) && IS_DREG ((yyvsp[(4) - (9)].reg)) && IS_DREG ((yyvsp[(6) - (9)].reg))
-- && REG_SAME ((yyvsp[(1) - (9)].reg), (yyvsp[(4) - (9)].reg)))
-- {
-- if (EXPR_VALUE ((yyvsp[(9) - (9)].expr)) == 1)
-- {
-- notethat ("ALU2op: dregs = (dregs + dregs) << 1\n");
-- (yyval.instr) = ALU2OP (&(yyvsp[(1) - (9)].reg), &(yyvsp[(6) - (9)].reg), 4);
-- }
-- else if (EXPR_VALUE ((yyvsp[(9) - (9)].expr)) == 2)
-- {
-- notethat ("ALU2op: dregs = (dregs + dregs) << 2\n");
-- (yyval.instr) = ALU2OP (&(yyvsp[(1) - (9)].reg), &(yyvsp[(6) - (9)].reg), 5);
-- }
-- else
-- return yyerror ("Bad shift value");
-- }
-- else if (IS_PREG ((yyvsp[(1) - (9)].reg)) && IS_PREG ((yyvsp[(4) - (9)].reg)) && IS_PREG ((yyvsp[(6) - (9)].reg))
-- && REG_SAME ((yyvsp[(1) - (9)].reg), (yyvsp[(4) - (9)].reg)))
-- {
-- if (EXPR_VALUE ((yyvsp[(9) - (9)].expr)) == 1)
-- {
-- notethat ("PTR2op: pregs = (pregs + pregs) << 1\n");
-- (yyval.instr) = PTR2OP (&(yyvsp[(1) - (9)].reg), &(yyvsp[(6) - (9)].reg), 6);
-- }
-- else if (EXPR_VALUE ((yyvsp[(9) - (9)].expr)) == 2)
-- {
-- notethat ("PTR2op: pregs = (pregs + pregs) << 2\n");
-- (yyval.instr) = PTR2OP (&(yyvsp[(1) - (9)].reg), &(yyvsp[(6) - (9)].reg), 7);
-- }
-- else
-- return yyerror ("Bad shift value");
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 66:
--#line 1602 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (5)].reg)) && IS_DREG ((yyvsp[(3) - (5)].reg)) && IS_DREG ((yyvsp[(5) - (5)].reg)))
-- {
-- notethat ("COMP3op: dregs = dregs | dregs\n");
-- (yyval.instr) = COMP3OP (&(yyvsp[(1) - (5)].reg), &(yyvsp[(3) - (5)].reg), &(yyvsp[(5) - (5)].reg), 3);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 67:
--#line 1612 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (5)].reg)) && IS_DREG ((yyvsp[(3) - (5)].reg)) && IS_DREG ((yyvsp[(5) - (5)].reg)))
-- {
-- notethat ("COMP3op: dregs = dregs ^ dregs\n");
-- (yyval.instr) = COMP3OP (&(yyvsp[(1) - (5)].reg), &(yyvsp[(3) - (5)].reg), &(yyvsp[(5) - (5)].reg), 4);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 68:
--#line 1622 "bfin-parse.y"
-- {
-- if (IS_PREG ((yyvsp[(1) - (9)].reg)) && IS_PREG ((yyvsp[(3) - (9)].reg)) && IS_PREG ((yyvsp[(6) - (9)].reg)))
-- {
-- if (EXPR_VALUE ((yyvsp[(8) - (9)].expr)) == 1)
-- {
-- notethat ("COMP3op: pregs = pregs + (pregs << 1)\n");
-- (yyval.instr) = COMP3OP (&(yyvsp[(1) - (9)].reg), &(yyvsp[(3) - (9)].reg), &(yyvsp[(6) - (9)].reg), 6);
-- }
-- else if (EXPR_VALUE ((yyvsp[(8) - (9)].expr)) == 2)
-- {
-- notethat ("COMP3op: pregs = pregs + (pregs << 2)\n");
-- (yyval.instr) = COMP3OP (&(yyvsp[(1) - (9)].reg), &(yyvsp[(3) - (9)].reg), &(yyvsp[(6) - (9)].reg), 7);
-- }
-- else
-- return yyerror ("Bad shift value");
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 69:
--#line 1642 "bfin-parse.y"
-- {
-- if ((yyvsp[(3) - (5)].reg).regno == REG_A0 && (yyvsp[(5) - (5)].reg).regno == REG_A1)
-- {
-- notethat ("CCflag: CC = A0 == A1\n");
-- (yyval.instr) = CCFLAG (0, 0, 5, 0, 0);
-- }
-- else
-- return yyerror ("AREGs are in bad order or same");
-- }
-- break;
--
-- case 70:
--#line 1652 "bfin-parse.y"
-- {
-- if ((yyvsp[(3) - (5)].reg).regno == REG_A0 && (yyvsp[(5) - (5)].reg).regno == REG_A1)
-- {
-- notethat ("CCflag: CC = A0 < A1\n");
-- (yyval.instr) = CCFLAG (0, 0, 6, 0, 0);
-- }
-- else
-- return yyerror ("AREGs are in bad order or same");
-- }
-- break;
--
-- case 71:
--#line 1662 "bfin-parse.y"
-- {
-- if ((IS_DREG ((yyvsp[(3) - (6)].reg)) && IS_DREG ((yyvsp[(5) - (6)].reg)))
-- || (IS_PREG ((yyvsp[(3) - (6)].reg)) && IS_PREG ((yyvsp[(5) - (6)].reg))))
-- {
-- notethat ("CCflag: CC = dpregs < dpregs\n");
-- (yyval.instr) = CCFLAG (&(yyvsp[(3) - (6)].reg), (yyvsp[(5) - (6)].reg).regno & CODE_MASK, (yyvsp[(6) - (6)].r0).r0, 0, IS_PREG ((yyvsp[(3) - (6)].reg)) ? 1 : 0);
-- }
-- else
-- return yyerror ("Bad register in comparison");
-- }
-- break;
--
-- case 72:
--#line 1673 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(3) - (6)].reg)) && !IS_PREG ((yyvsp[(3) - (6)].reg)))
-- return yyerror ("Bad register in comparison");
--
-- if (((yyvsp[(6) - (6)].r0).r0 == 1 && IS_IMM ((yyvsp[(5) - (6)].expr), 3))
-- || ((yyvsp[(6) - (6)].r0).r0 == 3 && IS_UIMM ((yyvsp[(5) - (6)].expr), 3)))
-- {
-- notethat ("CCflag: CC = dpregs < (u)imm3\n");
-- (yyval.instr) = CCFLAG (&(yyvsp[(3) - (6)].reg), imm3 ((yyvsp[(5) - (6)].expr)), (yyvsp[(6) - (6)].r0).r0, 1, IS_PREG ((yyvsp[(3) - (6)].reg)) ? 1 : 0);
-- }
-- else
-- return yyerror ("Bad constant value");
-- }
-- break;
--
-- case 73:
--#line 1687 "bfin-parse.y"
-- {
-- if ((IS_DREG ((yyvsp[(3) - (5)].reg)) && IS_DREG ((yyvsp[(5) - (5)].reg)))
-- || (IS_PREG ((yyvsp[(3) - (5)].reg)) && IS_PREG ((yyvsp[(5) - (5)].reg))))
-- {
-- notethat ("CCflag: CC = dpregs == dpregs\n");
-- (yyval.instr) = CCFLAG (&(yyvsp[(3) - (5)].reg), (yyvsp[(5) - (5)].reg).regno & CODE_MASK, 0, 0, IS_PREG ((yyvsp[(3) - (5)].reg)) ? 1 : 0);
-- }
-- else
-- return yyerror ("Bad register in comparison");
-- }
-- break;
--
-- case 74:
--#line 1698 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(3) - (5)].reg)) && !IS_PREG ((yyvsp[(3) - (5)].reg)))
-- return yyerror ("Bad register in comparison");
--
-- if (IS_IMM ((yyvsp[(5) - (5)].expr), 3))
-- {
-- notethat ("CCflag: CC = dpregs == imm3\n");
-- (yyval.instr) = CCFLAG (&(yyvsp[(3) - (5)].reg), imm3 ((yyvsp[(5) - (5)].expr)), 0, 1, IS_PREG ((yyvsp[(3) - (5)].reg)) ? 1 : 0);
-- }
-- else
-- return yyerror ("Bad constant range");
-- }
-- break;
--
-- case 75:
--#line 1711 "bfin-parse.y"
-- {
-- if ((yyvsp[(3) - (5)].reg).regno == REG_A0 && (yyvsp[(5) - (5)].reg).regno == REG_A1)
-- {
-- notethat ("CCflag: CC = A0 <= A1\n");
-- (yyval.instr) = CCFLAG (0, 0, 7, 0, 0);
-- }
-- else
-- return yyerror ("AREGs are in bad order or same");
-- }
-- break;
--
-- case 76:
--#line 1721 "bfin-parse.y"
-- {
-- if ((IS_DREG ((yyvsp[(3) - (6)].reg)) && IS_DREG ((yyvsp[(5) - (6)].reg)))
-- || (IS_PREG ((yyvsp[(3) - (6)].reg)) && IS_PREG ((yyvsp[(5) - (6)].reg))))
-- {
-- notethat ("CCflag: CC = dpregs <= dpregs (..)\n");
-- (yyval.instr) = CCFLAG (&(yyvsp[(3) - (6)].reg), (yyvsp[(5) - (6)].reg).regno & CODE_MASK,
-- 1 + (yyvsp[(6) - (6)].r0).r0, 0, IS_PREG ((yyvsp[(3) - (6)].reg)) ? 1 : 0);
-- }
-- else
-- return yyerror ("Bad register in comparison");
-- }
-- break;
--
-- case 77:
--#line 1733 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(3) - (6)].reg)) && !IS_PREG ((yyvsp[(3) - (6)].reg)))
-- return yyerror ("Bad register in comparison");
--
-- if (((yyvsp[(6) - (6)].r0).r0 == 1 && IS_IMM ((yyvsp[(5) - (6)].expr), 3))
-- || ((yyvsp[(6) - (6)].r0).r0 == 3 && IS_UIMM ((yyvsp[(5) - (6)].expr), 3)))
-- {
-- notethat ("CCflag: CC = dpregs <= (u)imm3\n");
-- (yyval.instr) = CCFLAG (&(yyvsp[(3) - (6)].reg), imm3 ((yyvsp[(5) - (6)].expr)), 1 + (yyvsp[(6) - (6)].r0).r0, 1, IS_PREG ((yyvsp[(3) - (6)].reg)) ? 1 : 0);
-- }
-- else
-- return yyerror ("Bad constant value");
-- }
-- break;
--
-- case 78:
--#line 1748 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (5)].reg)) && IS_DREG ((yyvsp[(3) - (5)].reg)) && IS_DREG ((yyvsp[(5) - (5)].reg)))
-- {
-- notethat ("COMP3op: dregs = dregs & dregs\n");
-- (yyval.instr) = COMP3OP (&(yyvsp[(1) - (5)].reg), &(yyvsp[(3) - (5)].reg), &(yyvsp[(5) - (5)].reg), 2);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 79:
--#line 1759 "bfin-parse.y"
-- {
-- notethat ("CC2stat operation\n");
-- (yyval.instr) = bfin_gen_cc2stat ((yyvsp[(1) - (1)].modcodes).r0, (yyvsp[(1) - (1)].modcodes).x0, (yyvsp[(1) - (1)].modcodes).s0);
-- }
-- break;
--
-- case 80:
--#line 1765 "bfin-parse.y"
-- {
-- if ((IS_GENREG ((yyvsp[(1) - (3)].reg)) && IS_GENREG ((yyvsp[(3) - (3)].reg)))
-- || (IS_GENREG ((yyvsp[(1) - (3)].reg)) && IS_DAGREG ((yyvsp[(3) - (3)].reg)))
-- || (IS_DAGREG ((yyvsp[(1) - (3)].reg)) && IS_GENREG ((yyvsp[(3) - (3)].reg)))
-- || (IS_DAGREG ((yyvsp[(1) - (3)].reg)) && IS_DAGREG ((yyvsp[(3) - (3)].reg)))
-- || (IS_GENREG ((yyvsp[(1) - (3)].reg)) && (yyvsp[(3) - (3)].reg).regno == REG_USP)
-- || ((yyvsp[(1) - (3)].reg).regno == REG_USP && IS_GENREG ((yyvsp[(3) - (3)].reg)))
-- || ((yyvsp[(1) - (3)].reg).regno == REG_USP && (yyvsp[(3) - (3)].reg).regno == REG_USP)
-- || (IS_DREG ((yyvsp[(1) - (3)].reg)) && IS_SYSREG ((yyvsp[(3) - (3)].reg)))
-- || (IS_PREG ((yyvsp[(1) - (3)].reg)) && IS_SYSREG ((yyvsp[(3) - (3)].reg)))
-- || (IS_SYSREG ((yyvsp[(1) - (3)].reg)) && IS_GENREG ((yyvsp[(3) - (3)].reg)))
-- || (IS_ALLREG ((yyvsp[(1) - (3)].reg)) && IS_EMUDAT ((yyvsp[(3) - (3)].reg)))
-- || (IS_EMUDAT ((yyvsp[(1) - (3)].reg)) && IS_ALLREG ((yyvsp[(3) - (3)].reg)))
-- || (IS_SYSREG ((yyvsp[(1) - (3)].reg)) && (yyvsp[(3) - (3)].reg).regno == REG_USP))
-- {
-- (yyval.instr) = bfin_gen_regmv (&(yyvsp[(3) - (3)].reg), &(yyvsp[(1) - (3)].reg));
-- }
-- else
-- return yyerror ("Unsupported register move");
-- }
-- break;
--
-- case 81:
--#line 1787 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(3) - (3)].reg)))
-- {
-- notethat ("CC2dreg: CC = dregs\n");
-- (yyval.instr) = bfin_gen_cc2dreg (1, &(yyvsp[(3) - (3)].reg));
-- }
-- else
-- return yyerror ("Only 'CC = Dreg' supported");
-- }
-- break;
--
-- case 82:
--#line 1798 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (3)].reg)))
-- {
-- notethat ("CC2dreg: dregs = CC\n");
-- (yyval.instr) = bfin_gen_cc2dreg (0, &(yyvsp[(1) - (3)].reg));
-- }
-- else
-- return yyerror ("Only 'Dreg = CC' supported");
-- }
-- break;
--
-- case 83:
--#line 1809 "bfin-parse.y"
-- {
-- notethat ("CC2dreg: CC =! CC\n");
-- (yyval.instr) = bfin_gen_cc2dreg (3, 0);
-- }
-- break;
--
-- case 84:
--#line 1817 "bfin-parse.y"
-- {
-- notethat ("dsp32mult: dregs_half = multiply_halfregs (opt_mode)\n");
--
-- if (!IS_H ((yyvsp[(1) - (4)].reg)) && (yyvsp[(4) - (4)].mod).MM)
-- return yyerror ("(M) not allowed with MAC0");
--
-- if ((yyvsp[(4) - (4)].mod).mod != 0 && (yyvsp[(4) - (4)].mod).mod != M_FU && (yyvsp[(4) - (4)].mod).mod != M_IS
-- && (yyvsp[(4) - (4)].mod).mod != M_IU && (yyvsp[(4) - (4)].mod).mod != M_T && (yyvsp[(4) - (4)].mod).mod != M_TFU
-- && (yyvsp[(4) - (4)].mod).mod != M_S2RND && (yyvsp[(4) - (4)].mod).mod != M_ISS2 && (yyvsp[(4) - (4)].mod).mod != M_IH)
-- return yyerror ("bad option.");
--
-- if (IS_H ((yyvsp[(1) - (4)].reg)))
-- {
-- (yyval.instr) = DSP32MULT (0, (yyvsp[(4) - (4)].mod).MM, (yyvsp[(4) - (4)].mod).mod, 1, 0,
-- IS_H ((yyvsp[(3) - (4)].macfunc).s0), IS_H ((yyvsp[(3) - (4)].macfunc).s1), 0, 0,
-- &(yyvsp[(1) - (4)].reg), 0, &(yyvsp[(3) - (4)].macfunc).s0, &(yyvsp[(3) - (4)].macfunc).s1, 0);
-- }
-- else
-- {
-- (yyval.instr) = DSP32MULT (0, 0, (yyvsp[(4) - (4)].mod).mod, 0, 0,
-- 0, 0, IS_H ((yyvsp[(3) - (4)].macfunc).s0), IS_H ((yyvsp[(3) - (4)].macfunc).s1),
-- &(yyvsp[(1) - (4)].reg), 0, &(yyvsp[(3) - (4)].macfunc).s0, &(yyvsp[(3) - (4)].macfunc).s1, 1);
-- }
-- }
-- break;
--
-- case 85:
--#line 1843 "bfin-parse.y"
-- {
-- /* Odd registers can use (M). */
-- if (!IS_DREG ((yyvsp[(1) - (4)].reg)))
-- return yyerror ("Dreg expected");
--
-- if (IS_EVEN ((yyvsp[(1) - (4)].reg)) && (yyvsp[(4) - (4)].mod).MM)
-- return yyerror ("(M) not allowed with MAC0");
--
-- if ((yyvsp[(4) - (4)].mod).mod != 0 && (yyvsp[(4) - (4)].mod).mod != M_FU && (yyvsp[(4) - (4)].mod).mod != M_IS
-- && (yyvsp[(4) - (4)].mod).mod != M_S2RND && (yyvsp[(4) - (4)].mod).mod != M_ISS2)
-- return yyerror ("bad option");
--
-- if (!IS_EVEN ((yyvsp[(1) - (4)].reg)))
-- {
-- notethat ("dsp32mult: dregs = multiply_halfregs (opt_mode)\n");
--
-- (yyval.instr) = DSP32MULT (0, (yyvsp[(4) - (4)].mod).MM, (yyvsp[(4) - (4)].mod).mod, 1, 1,
-- IS_H ((yyvsp[(3) - (4)].macfunc).s0), IS_H ((yyvsp[(3) - (4)].macfunc).s1), 0, 0,
-- &(yyvsp[(1) - (4)].reg), 0, &(yyvsp[(3) - (4)].macfunc).s0, &(yyvsp[(3) - (4)].macfunc).s1, 0);
-- }
-- else
-- {
-- notethat ("dsp32mult: dregs = multiply_halfregs opt_mode\n");
-- (yyval.instr) = DSP32MULT (0, 0, (yyvsp[(4) - (4)].mod).mod, 0, 1,
-- 0, 0, IS_H ((yyvsp[(3) - (4)].macfunc).s0), IS_H ((yyvsp[(3) - (4)].macfunc).s1),
-- &(yyvsp[(1) - (4)].reg), 0, &(yyvsp[(3) - (4)].macfunc).s0, &(yyvsp[(3) - (4)].macfunc).s1, 1);
-- }
-- }
-- break;
--
-- case 86:
--#line 1874 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(1) - (9)].reg)) || !IS_DREG ((yyvsp[(6) - (9)].reg)))
-- return yyerror ("Dregs expected");
--
-- if (!IS_HCOMPL((yyvsp[(1) - (9)].reg), (yyvsp[(6) - (9)].reg)))
-- return yyerror ("Dest registers mismatch");
--
-- if (check_multiply_halfregs (&(yyvsp[(3) - (9)].macfunc), &(yyvsp[(8) - (9)].macfunc)) < 0)
-- return -1;
--
-- if ((!IS_H ((yyvsp[(1) - (9)].reg)) && (yyvsp[(4) - (9)].mod).MM)
-- || (!IS_H ((yyvsp[(6) - (9)].reg)) && (yyvsp[(9) - (9)].mod).MM))
-- return yyerror ("(M) not allowed with MAC0");
--
-- notethat ("dsp32mult: dregs_hi = multiply_halfregs mxd_mod, "
-- "dregs_lo = multiply_halfregs opt_mode\n");
--
-- if (IS_H ((yyvsp[(1) - (9)].reg)))
-- (yyval.instr) = DSP32MULT (0, (yyvsp[(4) - (9)].mod).MM, (yyvsp[(9) - (9)].mod).mod, 1, 0,
-- IS_H ((yyvsp[(3) - (9)].macfunc).s0), IS_H ((yyvsp[(3) - (9)].macfunc).s1), IS_H ((yyvsp[(8) - (9)].macfunc).s0), IS_H ((yyvsp[(8) - (9)].macfunc).s1),
-- &(yyvsp[(1) - (9)].reg), 0, &(yyvsp[(3) - (9)].macfunc).s0, &(yyvsp[(3) - (9)].macfunc).s1, 1);
-- else
-- (yyval.instr) = DSP32MULT (0, (yyvsp[(9) - (9)].mod).MM, (yyvsp[(9) - (9)].mod).mod, 1, 0,
-- IS_H ((yyvsp[(8) - (9)].macfunc).s0), IS_H ((yyvsp[(8) - (9)].macfunc).s1), IS_H ((yyvsp[(3) - (9)].macfunc).s0), IS_H ((yyvsp[(3) - (9)].macfunc).s1),
-- &(yyvsp[(1) - (9)].reg), 0, &(yyvsp[(3) - (9)].macfunc).s0, &(yyvsp[(3) - (9)].macfunc).s1, 1);
-- }
-- break;
--
-- case 87:
--#line 1902 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(1) - (9)].reg)) || !IS_DREG ((yyvsp[(6) - (9)].reg)))
-- return yyerror ("Dregs expected");
--
-- if ((IS_EVEN ((yyvsp[(1) - (9)].reg)) && (yyvsp[(6) - (9)].reg).regno - (yyvsp[(1) - (9)].reg).regno != 1)
-- || (IS_EVEN ((yyvsp[(6) - (9)].reg)) && (yyvsp[(1) - (9)].reg).regno - (yyvsp[(6) - (9)].reg).regno != 1))
-- return yyerror ("Dest registers mismatch");
--
-- if (check_multiply_halfregs (&(yyvsp[(3) - (9)].macfunc), &(yyvsp[(8) - (9)].macfunc)) < 0)
-- return -1;
--
-- if ((IS_EVEN ((yyvsp[(1) - (9)].reg)) && (yyvsp[(4) - (9)].mod).MM)
-- || (IS_EVEN ((yyvsp[(6) - (9)].reg)) && (yyvsp[(9) - (9)].mod).MM))
-- return yyerror ("(M) not allowed with MAC0");
--
-- notethat ("dsp32mult: dregs = multiply_halfregs mxd_mod, "
-- "dregs = multiply_halfregs opt_mode\n");
--
-- if (IS_EVEN ((yyvsp[(1) - (9)].reg)))
-- (yyval.instr) = DSP32MULT (0, (yyvsp[(9) - (9)].mod).MM, (yyvsp[(9) - (9)].mod).mod, 1, 1,
-- IS_H ((yyvsp[(8) - (9)].macfunc).s0), IS_H ((yyvsp[(8) - (9)].macfunc).s1), IS_H ((yyvsp[(3) - (9)].macfunc).s0), IS_H ((yyvsp[(3) - (9)].macfunc).s1),
-- &(yyvsp[(1) - (9)].reg), 0, &(yyvsp[(3) - (9)].macfunc).s0, &(yyvsp[(3) - (9)].macfunc).s1, 1);
-- else
-- (yyval.instr) = DSP32MULT (0, (yyvsp[(4) - (9)].mod).MM, (yyvsp[(9) - (9)].mod).mod, 1, 1,
-- IS_H ((yyvsp[(3) - (9)].macfunc).s0), IS_H ((yyvsp[(3) - (9)].macfunc).s1), IS_H ((yyvsp[(8) - (9)].macfunc).s0), IS_H ((yyvsp[(8) - (9)].macfunc).s1),
-- &(yyvsp[(1) - (9)].reg), 0, &(yyvsp[(3) - (9)].macfunc).s0, &(yyvsp[(3) - (9)].macfunc).s1, 1);
-- }
-- break;
--
-- case 88:
--#line 1933 "bfin-parse.y"
-- {
-- if (!REG_SAME ((yyvsp[(1) - (5)].reg), (yyvsp[(3) - (5)].reg)))
-- return yyerror ("Aregs must be same");
--
-- if (IS_DREG ((yyvsp[(5) - (5)].reg)) && !IS_H ((yyvsp[(5) - (5)].reg)))
-- {
-- notethat ("dsp32shift: A0 = ASHIFT A0 BY dregs_lo\n");
-- (yyval.instr) = DSP32SHIFT (3, 0, &(yyvsp[(5) - (5)].reg), 0, 0, IS_A1 ((yyvsp[(1) - (5)].reg)));
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 89:
--#line 1947 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(6) - (7)].reg)) && !IS_H ((yyvsp[(6) - (7)].reg)))
-- {
-- notethat ("dsp32shift: dregs_half = ASHIFT dregs_half BY dregs_lo\n");
-- (yyval.instr) = DSP32SHIFT (0, &(yyvsp[(1) - (7)].reg), &(yyvsp[(6) - (7)].reg), &(yyvsp[(4) - (7)].reg), (yyvsp[(7) - (7)].modcodes).s0, HL2 ((yyvsp[(1) - (7)].reg), (yyvsp[(4) - (7)].reg)));
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 90:
--#line 1958 "bfin-parse.y"
-- {
-- if (!REG_SAME ((yyvsp[(1) - (4)].reg), (yyvsp[(2) - (4)].reg)))
-- return yyerror ("Aregs must be same");
--
-- if (IS_UIMM ((yyvsp[(4) - (4)].expr), 5))
-- {
-- notethat ("dsp32shiftimm: A0 = A0 << uimm5\n");
-- (yyval.instr) = DSP32SHIFTIMM (3, 0, imm5 ((yyvsp[(4) - (4)].expr)), 0, 0, IS_A1 ((yyvsp[(1) - (4)].reg)));
-- }
-- else
-- return yyerror ("Bad shift value");
-- }
-- break;
--
-- case 91:
--#line 1972 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (6)].reg)) && IS_DREG ((yyvsp[(3) - (6)].reg)) && IS_UIMM ((yyvsp[(5) - (6)].expr), 5))
-- {
-- if ((yyvsp[(6) - (6)].modcodes).r0)
-- {
-- /* Vector? */
-- notethat ("dsp32shiftimm: dregs = dregs << expr (V, .)\n");
-- (yyval.instr) = DSP32SHIFTIMM (1, &(yyvsp[(1) - (6)].reg), imm4 ((yyvsp[(5) - (6)].expr)), &(yyvsp[(3) - (6)].reg), (yyvsp[(6) - (6)].modcodes).s0 ? 1 : 2, 0);
-- }
-- else
-- {
-- notethat ("dsp32shiftimm: dregs = dregs << uimm5 (.)\n");
-- (yyval.instr) = DSP32SHIFTIMM (2, &(yyvsp[(1) - (6)].reg), imm6 ((yyvsp[(5) - (6)].expr)), &(yyvsp[(3) - (6)].reg), (yyvsp[(6) - (6)].modcodes).s0 ? 1 : 2, 0);
-- }
-- }
-- else if ((yyvsp[(6) - (6)].modcodes).s0 == 0 && IS_PREG ((yyvsp[(1) - (6)].reg)) && IS_PREG ((yyvsp[(3) - (6)].reg)))
-- {
-- if (EXPR_VALUE ((yyvsp[(5) - (6)].expr)) == 2)
-- {
-- notethat ("PTR2op: pregs = pregs << 2\n");
-- (yyval.instr) = PTR2OP (&(yyvsp[(1) - (6)].reg), &(yyvsp[(3) - (6)].reg), 1);
-- }
-- else if (EXPR_VALUE ((yyvsp[(5) - (6)].expr)) == 1)
-- {
-- notethat ("COMP3op: pregs = pregs << 1\n");
-- (yyval.instr) = COMP3OP (&(yyvsp[(1) - (6)].reg), &(yyvsp[(3) - (6)].reg), &(yyvsp[(3) - (6)].reg), 5);
-- }
-- else
-- return yyerror ("Bad shift value");
-- }
-- else
-- return yyerror ("Bad shift value or register");
-- }
-- break;
--
-- case 92:
--#line 2006 "bfin-parse.y"
-- {
-- if (IS_UIMM ((yyvsp[(5) - (6)].expr), 4))
-- {
-- if ((yyvsp[(6) - (6)].modcodes).s0)
-- {
-- notethat ("dsp32shiftimm: dregs_half = dregs_half << uimm4 (S)\n");
-- (yyval.instr) = DSP32SHIFTIMM (0x0, &(yyvsp[(1) - (6)].reg), imm5 ((yyvsp[(5) - (6)].expr)), &(yyvsp[(3) - (6)].reg), (yyvsp[(6) - (6)].modcodes).s0, HL2 ((yyvsp[(1) - (6)].reg), (yyvsp[(3) - (6)].reg)));
-- }
-- else
-- {
-- notethat ("dsp32shiftimm: dregs_half = dregs_half << uimm4\n");
-- (yyval.instr) = DSP32SHIFTIMM (0x0, &(yyvsp[(1) - (6)].reg), imm5 ((yyvsp[(5) - (6)].expr)), &(yyvsp[(3) - (6)].reg), 2, HL2 ((yyvsp[(1) - (6)].reg), (yyvsp[(3) - (6)].reg)));
-- }
-- }
-- else
-- return yyerror ("Bad shift value");
-- }
-- break;
--
-- case 93:
--#line 2024 "bfin-parse.y"
-- {
-- int op;
--
-- if (IS_DREG ((yyvsp[(1) - (7)].reg)) && IS_DREG ((yyvsp[(4) - (7)].reg)) && IS_DREG ((yyvsp[(6) - (7)].reg)) && !IS_H ((yyvsp[(6) - (7)].reg)))
-- {
-- if ((yyvsp[(7) - (7)].modcodes).r0)
-- {
-- op = 1;
-- notethat ("dsp32shift: dregs = ASHIFT dregs BY "
-- "dregs_lo (V, .)\n");
-- }
-- else
-- {
--
-- op = 2;
-- notethat ("dsp32shift: dregs = ASHIFT dregs BY dregs_lo (.)\n");
-- }
-- (yyval.instr) = DSP32SHIFT (op, &(yyvsp[(1) - (7)].reg), &(yyvsp[(6) - (7)].reg), &(yyvsp[(4) - (7)].reg), (yyvsp[(7) - (7)].modcodes).s0, 0);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 94:
--#line 2049 "bfin-parse.y"
-- {
-- if (IS_DREG_L ((yyvsp[(1) - (9)].reg)) && IS_DREG_L ((yyvsp[(5) - (9)].reg)) && IS_DREG_L ((yyvsp[(7) - (9)].reg)))
-- {
-- notethat ("dsp32shift: dregs_lo = EXPADJ (dregs , dregs_lo )\n");
-- (yyval.instr) = DSP32SHIFT (7, &(yyvsp[(1) - (9)].reg), &(yyvsp[(7) - (9)].reg), &(yyvsp[(5) - (9)].reg), (yyvsp[(9) - (9)].r0).r0, 0);
-- }
-- else
-- return yyerror ("Bad shift value or register");
-- }
-- break;
--
-- case 95:
--#line 2061 "bfin-parse.y"
-- {
-- if (IS_DREG_L ((yyvsp[(1) - (8)].reg)) && IS_DREG_L ((yyvsp[(5) - (8)].reg)) && IS_DREG_L ((yyvsp[(7) - (8)].reg)))
-- {
-- notethat ("dsp32shift: dregs_lo = EXPADJ (dregs_lo, dregs_lo)\n");
-- (yyval.instr) = DSP32SHIFT (7, &(yyvsp[(1) - (8)].reg), &(yyvsp[(7) - (8)].reg), &(yyvsp[(5) - (8)].reg), 2, 0);
-- }
-- else if (IS_DREG_L ((yyvsp[(1) - (8)].reg)) && IS_DREG_H ((yyvsp[(5) - (8)].reg)) && IS_DREG_L ((yyvsp[(7) - (8)].reg)))
-- {
-- notethat ("dsp32shift: dregs_lo = EXPADJ (dregs_hi, dregs_lo)\n");
-- (yyval.instr) = DSP32SHIFT (7, &(yyvsp[(1) - (8)].reg), &(yyvsp[(7) - (8)].reg), &(yyvsp[(5) - (8)].reg), 3, 0);
-- }
-- else
-- return yyerror ("Bad shift value or register");
-- }
-- break;
--
-- case 96:
--#line 2079 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (8)].reg)) && IS_DREG ((yyvsp[(5) - (8)].reg)) && IS_DREG ((yyvsp[(7) - (8)].reg)))
-- {
-- notethat ("dsp32shift: dregs = DEPOSIT (dregs , dregs )\n");
-- (yyval.instr) = DSP32SHIFT (10, &(yyvsp[(1) - (8)].reg), &(yyvsp[(7) - (8)].reg), &(yyvsp[(5) - (8)].reg), 2, 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 97:
--#line 2090 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (11)].reg)) && IS_DREG ((yyvsp[(5) - (11)].reg)) && IS_DREG ((yyvsp[(7) - (11)].reg)))
-- {
-- notethat ("dsp32shift: dregs = DEPOSIT (dregs , dregs ) (X)\n");
-- (yyval.instr) = DSP32SHIFT (10, &(yyvsp[(1) - (11)].reg), &(yyvsp[(7) - (11)].reg), &(yyvsp[(5) - (11)].reg), 3, 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 98:
--#line 2101 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (9)].reg)) && IS_DREG ((yyvsp[(5) - (9)].reg)) && IS_DREG_L ((yyvsp[(7) - (9)].reg)))
-- {
-- notethat ("dsp32shift: dregs = EXTRACT (dregs, dregs_lo ) (.)\n");
-- (yyval.instr) = DSP32SHIFT (10, &(yyvsp[(1) - (9)].reg), &(yyvsp[(7) - (9)].reg), &(yyvsp[(5) - (9)].reg), (yyvsp[(9) - (9)].r0).r0, 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 99:
--#line 2112 "bfin-parse.y"
-- {
-- if (!REG_SAME ((yyvsp[(1) - (4)].reg), (yyvsp[(2) - (4)].reg)))
-- return yyerror ("Aregs must be same");
--
-- if (IS_UIMM ((yyvsp[(4) - (4)].expr), 5))
-- {
-- notethat ("dsp32shiftimm: Ax = Ax >>> uimm5\n");
-- (yyval.instr) = DSP32SHIFTIMM (3, 0, -imm6 ((yyvsp[(4) - (4)].expr)), 0, 0, IS_A1 ((yyvsp[(1) - (4)].reg)));
-- }
-- else
-- return yyerror ("Shift value range error");
-- }
-- break;
--
-- case 100:
--#line 2125 "bfin-parse.y"
-- {
-- if (REG_SAME ((yyvsp[(1) - (5)].reg), (yyvsp[(3) - (5)].reg)) && IS_DREG_L ((yyvsp[(5) - (5)].reg)))
-- {
-- notethat ("dsp32shift: Ax = LSHIFT Ax BY dregs_lo\n");
-- (yyval.instr) = DSP32SHIFT (3, 0, &(yyvsp[(5) - (5)].reg), 0, 1, IS_A1 ((yyvsp[(1) - (5)].reg)));
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 101:
--#line 2136 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (6)].reg)) && IS_DREG ((yyvsp[(4) - (6)].reg)) && IS_DREG_L ((yyvsp[(6) - (6)].reg)))
-- {
-- notethat ("dsp32shift: dregs_lo = LSHIFT dregs_hi BY dregs_lo\n");
-- (yyval.instr) = DSP32SHIFT (0, &(yyvsp[(1) - (6)].reg), &(yyvsp[(6) - (6)].reg), &(yyvsp[(4) - (6)].reg), 2, HL2 ((yyvsp[(1) - (6)].reg), (yyvsp[(4) - (6)].reg)));
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 102:
--#line 2147 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (7)].reg)) && IS_DREG ((yyvsp[(4) - (7)].reg)) && IS_DREG_L ((yyvsp[(6) - (7)].reg)))
-- {
-- notethat ("dsp32shift: dregs = LSHIFT dregs BY dregs_lo (V )\n");
-- (yyval.instr) = DSP32SHIFT ((yyvsp[(7) - (7)].r0).r0 ? 1: 2, &(yyvsp[(1) - (7)].reg), &(yyvsp[(6) - (7)].reg), &(yyvsp[(4) - (7)].reg), 2, 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 103:
--#line 2158 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (6)].reg)) && IS_DREG ((yyvsp[(4) - (6)].reg)) && IS_DREG_L ((yyvsp[(6) - (6)].reg)))
-- {
-- notethat ("dsp32shift: dregs = SHIFT dregs BY dregs_lo\n");
-- (yyval.instr) = DSP32SHIFT (2, &(yyvsp[(1) - (6)].reg), &(yyvsp[(6) - (6)].reg), &(yyvsp[(4) - (6)].reg), 2, 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 104:
--#line 2169 "bfin-parse.y"
-- {
-- if (REG_SAME ((yyvsp[(1) - (4)].reg), (yyvsp[(2) - (4)].reg)) && IS_IMM ((yyvsp[(4) - (4)].expr), 6) >= 0)
-- {
-- notethat ("dsp32shiftimm: Ax = Ax >> imm6\n");
-- (yyval.instr) = DSP32SHIFTIMM (3, 0, -imm6 ((yyvsp[(4) - (4)].expr)), 0, 1, IS_A1 ((yyvsp[(1) - (4)].reg)));
-- }
-- else
-- return yyerror ("Accu register expected");
-- }
-- break;
--
-- case 105:
--#line 2180 "bfin-parse.y"
-- {
-- if ((yyvsp[(6) - (6)].r0).r0 == 1)
-- {
-- if (IS_DREG ((yyvsp[(1) - (6)].reg)) && IS_DREG ((yyvsp[(3) - (6)].reg)) && IS_UIMM ((yyvsp[(5) - (6)].expr), 5))
-- {
-- notethat ("dsp32shiftimm: dregs = dregs >> uimm5 (V)\n");
-- (yyval.instr) = DSP32SHIFTIMM (1, &(yyvsp[(1) - (6)].reg), -uimm5 ((yyvsp[(5) - (6)].expr)), &(yyvsp[(3) - (6)].reg), 2, 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- else
-- {
-- if (IS_DREG ((yyvsp[(1) - (6)].reg)) && IS_DREG ((yyvsp[(3) - (6)].reg)) && IS_UIMM ((yyvsp[(5) - (6)].expr), 5))
-- {
-- notethat ("dsp32shiftimm: dregs = dregs >> uimm5\n");
-- (yyval.instr) = DSP32SHIFTIMM (2, &(yyvsp[(1) - (6)].reg), -imm6 ((yyvsp[(5) - (6)].expr)), &(yyvsp[(3) - (6)].reg), 2, 0);
-- }
-- else if (IS_PREG ((yyvsp[(1) - (6)].reg)) && IS_PREG ((yyvsp[(3) - (6)].reg)) && EXPR_VALUE ((yyvsp[(5) - (6)].expr)) == 2)
-- {
-- notethat ("PTR2op: pregs = pregs >> 2\n");
-- (yyval.instr) = PTR2OP (&(yyvsp[(1) - (6)].reg), &(yyvsp[(3) - (6)].reg), 3);
-- }
-- else if (IS_PREG ((yyvsp[(1) - (6)].reg)) && IS_PREG ((yyvsp[(3) - (6)].reg)) && EXPR_VALUE ((yyvsp[(5) - (6)].expr)) == 1)
-- {
-- notethat ("PTR2op: pregs = pregs >> 1\n");
-- (yyval.instr) = PTR2OP (&(yyvsp[(1) - (6)].reg), &(yyvsp[(3) - (6)].reg), 4);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- }
-- break;
--
-- case 106:
--#line 2213 "bfin-parse.y"
-- {
-- if (IS_UIMM ((yyvsp[(5) - (5)].expr), 5))
-- {
-- notethat ("dsp32shiftimm: dregs_half = dregs_half >> uimm5\n");
-- (yyval.instr) = DSP32SHIFTIMM (0, &(yyvsp[(1) - (5)].reg), -uimm5 ((yyvsp[(5) - (5)].expr)), &(yyvsp[(3) - (5)].reg), 2, HL2 ((yyvsp[(1) - (5)].reg), (yyvsp[(3) - (5)].reg)));
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 107:
--#line 2223 "bfin-parse.y"
-- {
-- if (IS_UIMM ((yyvsp[(5) - (6)].expr), 5))
-- {
-- notethat ("dsp32shiftimm: dregs_half = dregs_half >>> uimm5\n");
-- (yyval.instr) = DSP32SHIFTIMM (0, &(yyvsp[(1) - (6)].reg), -uimm5 ((yyvsp[(5) - (6)].expr)), &(yyvsp[(3) - (6)].reg),
-- (yyvsp[(6) - (6)].modcodes).s0, HL2 ((yyvsp[(1) - (6)].reg), (yyvsp[(3) - (6)].reg)));
-- }
-- else
-- return yyerror ("Register or modifier mismatch");
-- }
-- break;
--
-- case 108:
--#line 2236 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (6)].reg)) && IS_DREG ((yyvsp[(3) - (6)].reg)) && IS_UIMM ((yyvsp[(5) - (6)].expr), 5))
-- {
-- if ((yyvsp[(6) - (6)].modcodes).r0)
-- {
-- /* Vector? */
-- notethat ("dsp32shiftimm: dregs = dregs >>> uimm5 (V, .)\n");
-- (yyval.instr) = DSP32SHIFTIMM (1, &(yyvsp[(1) - (6)].reg), -uimm5 ((yyvsp[(5) - (6)].expr)), &(yyvsp[(3) - (6)].reg), (yyvsp[(6) - (6)].modcodes).s0, 0);
-- }
-- else
-- {
-- notethat ("dsp32shiftimm: dregs = dregs >>> uimm5 (.)\n");
-- (yyval.instr) = DSP32SHIFTIMM (2, &(yyvsp[(1) - (6)].reg), -uimm5 ((yyvsp[(5) - (6)].expr)), &(yyvsp[(3) - (6)].reg), (yyvsp[(6) - (6)].modcodes).s0, 0);
-- }
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 109:
--#line 2256 "bfin-parse.y"
-- {
-- if (IS_DREG_L ((yyvsp[(1) - (4)].reg)) && IS_DREG ((yyvsp[(4) - (4)].reg)))
-- {
-- notethat ("dsp32shift: dregs_lo = ONES dregs\n");
-- (yyval.instr) = DSP32SHIFT (6, &(yyvsp[(1) - (4)].reg), 0, &(yyvsp[(4) - (4)].reg), 3, 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 110:
--#line 2267 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (8)].reg)) && IS_DREG ((yyvsp[(5) - (8)].reg)) && IS_DREG ((yyvsp[(7) - (8)].reg)))
-- {
-- notethat ("dsp32shift: dregs = PACK (dregs_hi , dregs_hi )\n");
-- (yyval.instr) = DSP32SHIFT (4, &(yyvsp[(1) - (8)].reg), &(yyvsp[(7) - (8)].reg), &(yyvsp[(5) - (8)].reg), HL2 ((yyvsp[(5) - (8)].reg), (yyvsp[(7) - (8)].reg)), 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 111:
--#line 2278 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (10)].reg))
-- && (yyvsp[(7) - (10)].reg).regno == REG_A0
-- && IS_DREG ((yyvsp[(9) - (10)].reg)) && !IS_H ((yyvsp[(1) - (10)].reg)) && !IS_A1 ((yyvsp[(7) - (10)].reg)))
-- {
-- notethat ("dsp32shift: dregs_lo = CC = BXORSHIFT (A0 , dregs )\n");
-- (yyval.instr) = DSP32SHIFT (11, &(yyvsp[(1) - (10)].reg), &(yyvsp[(9) - (10)].reg), 0, 0, 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 112:
--#line 2291 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (10)].reg))
-- && (yyvsp[(7) - (10)].reg).regno == REG_A0
-- && IS_DREG ((yyvsp[(9) - (10)].reg)) && !IS_H ((yyvsp[(1) - (10)].reg)) && !IS_A1 ((yyvsp[(7) - (10)].reg)))
-- {
-- notethat ("dsp32shift: dregs_lo = CC = BXOR (A0 , dregs)\n");
-- (yyval.instr) = DSP32SHIFT (11, &(yyvsp[(1) - (10)].reg), &(yyvsp[(9) - (10)].reg), 0, 1, 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 113:
--#line 2304 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (12)].reg)) && !IS_H ((yyvsp[(1) - (12)].reg)) && !REG_SAME ((yyvsp[(7) - (12)].reg), (yyvsp[(9) - (12)].reg)))
-- {
-- notethat ("dsp32shift: dregs_lo = CC = BXOR (A0 , A1 , CC)\n");
-- (yyval.instr) = DSP32SHIFT (12, &(yyvsp[(1) - (12)].reg), 0, 0, 1, 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 114:
--#line 2315 "bfin-parse.y"
-- {
-- if (REG_SAME ((yyvsp[(1) - (5)].reg), (yyvsp[(3) - (5)].reg)) && IS_DREG_L ((yyvsp[(5) - (5)].reg)))
-- {
-- notethat ("dsp32shift: Ax = ROT Ax BY dregs_lo\n");
-- (yyval.instr) = DSP32SHIFT (3, 0, &(yyvsp[(5) - (5)].reg), 0, 2, IS_A1 ((yyvsp[(1) - (5)].reg)));
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 115:
--#line 2326 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (6)].reg)) && IS_DREG ((yyvsp[(4) - (6)].reg)) && IS_DREG_L ((yyvsp[(6) - (6)].reg)))
-- {
-- notethat ("dsp32shift: dregs = ROT dregs BY dregs_lo\n");
-- (yyval.instr) = DSP32SHIFT (2, &(yyvsp[(1) - (6)].reg), &(yyvsp[(6) - (6)].reg), &(yyvsp[(4) - (6)].reg), 3, 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 116:
--#line 2337 "bfin-parse.y"
-- {
-- if (IS_IMM ((yyvsp[(5) - (5)].expr), 6))
-- {
-- notethat ("dsp32shiftimm: An = ROT An BY imm6\n");
-- (yyval.instr) = DSP32SHIFTIMM (3, 0, imm6 ((yyvsp[(5) - (5)].expr)), 0, 2, IS_A1 ((yyvsp[(1) - (5)].reg)));
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 117:
--#line 2348 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (6)].reg)) && IS_DREG ((yyvsp[(4) - (6)].reg)) && IS_IMM ((yyvsp[(6) - (6)].expr), 6))
-- {
-- (yyval.instr) = DSP32SHIFTIMM (2, &(yyvsp[(1) - (6)].reg), imm6 ((yyvsp[(6) - (6)].expr)), &(yyvsp[(4) - (6)].reg), 3, IS_A1 ((yyvsp[(1) - (6)].reg)));
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 118:
--#line 2358 "bfin-parse.y"
-- {
-- if (IS_DREG_L ((yyvsp[(1) - (4)].reg)))
-- {
-- notethat ("dsp32shift: dregs_lo = SIGNBITS An\n");
-- (yyval.instr) = DSP32SHIFT (6, &(yyvsp[(1) - (4)].reg), 0, 0, IS_A1 ((yyvsp[(4) - (4)].reg)), 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 119:
--#line 2369 "bfin-parse.y"
-- {
-- if (IS_DREG_L ((yyvsp[(1) - (4)].reg)) && IS_DREG ((yyvsp[(4) - (4)].reg)))
-- {
-- notethat ("dsp32shift: dregs_lo = SIGNBITS dregs\n");
-- (yyval.instr) = DSP32SHIFT (5, &(yyvsp[(1) - (4)].reg), 0, &(yyvsp[(4) - (4)].reg), 0, 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 120:
--#line 2380 "bfin-parse.y"
-- {
-- if (IS_DREG_L ((yyvsp[(1) - (4)].reg)))
-- {
-- notethat ("dsp32shift: dregs_lo = SIGNBITS dregs_lo\n");
-- (yyval.instr) = DSP32SHIFT (5, &(yyvsp[(1) - (4)].reg), 0, &(yyvsp[(4) - (4)].reg), 1 + IS_H ((yyvsp[(4) - (4)].reg)), 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 121:
--#line 2392 "bfin-parse.y"
-- {
-- if (IS_DREG_L ((yyvsp[(1) - (7)].reg)) && IS_DREG ((yyvsp[(5) - (7)].reg)))
-- {
-- notethat ("dsp32shift: dregs_lo = VIT_MAX (dregs) (..)\n");
-- (yyval.instr) = DSP32SHIFT (9, &(yyvsp[(1) - (7)].reg), 0, &(yyvsp[(5) - (7)].reg), ((yyvsp[(7) - (7)].r0).r0 ? 0 : 1), 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 122:
--#line 2403 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (9)].reg)) && IS_DREG ((yyvsp[(5) - (9)].reg)) && IS_DREG ((yyvsp[(7) - (9)].reg)))
-- {
-- notethat ("dsp32shift: dregs = VIT_MAX (dregs, dregs) (ASR)\n");
-- (yyval.instr) = DSP32SHIFT (9, &(yyvsp[(1) - (9)].reg), &(yyvsp[(7) - (9)].reg), &(yyvsp[(5) - (9)].reg), 2 | ((yyvsp[(9) - (9)].r0).r0 ? 0 : 1), 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 123:
--#line 2414 "bfin-parse.y"
-- {
-- if (REG_SAME ((yyvsp[(3) - (9)].reg), (yyvsp[(5) - (9)].reg)))
-- return yyerror ("Illegal source register combination");
--
-- if (IS_DREG ((yyvsp[(3) - (9)].reg)) && IS_DREG ((yyvsp[(5) - (9)].reg)) && !IS_A1 ((yyvsp[(7) - (9)].reg)))
-- {
-- notethat ("dsp32shift: BITMUX (dregs , dregs , A0) (ASR)\n");
-- (yyval.instr) = DSP32SHIFT (8, 0, &(yyvsp[(3) - (9)].reg), &(yyvsp[(5) - (9)].reg), (yyvsp[(9) - (9)].r0).r0, 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 124:
--#line 2428 "bfin-parse.y"
-- {
-- if (!IS_A1 ((yyvsp[(1) - (9)].reg)) && !IS_A1 ((yyvsp[(4) - (9)].reg)) && IS_A1 ((yyvsp[(6) - (9)].reg)))
-- {
-- notethat ("dsp32shift: A0 = BXORSHIFT (A0 , A1 , CC )\n");
-- (yyval.instr) = DSP32SHIFT (12, 0, 0, 0, 0, 0);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 125:
--#line 2441 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(3) - (6)].reg)) && IS_UIMM ((yyvsp[(5) - (6)].expr), 5))
-- {
-- notethat ("LOGI2op: BITCLR (dregs , uimm5 )\n");
-- (yyval.instr) = LOGI2OP ((yyvsp[(3) - (6)].reg), uimm5 ((yyvsp[(5) - (6)].expr)), 4);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 126:
--#line 2453 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(3) - (6)].reg)) && IS_UIMM ((yyvsp[(5) - (6)].expr), 5))
-- {
-- notethat ("LOGI2op: BITCLR (dregs , uimm5 )\n");
-- (yyval.instr) = LOGI2OP ((yyvsp[(3) - (6)].reg), uimm5 ((yyvsp[(5) - (6)].expr)), 2);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 127:
--#line 2465 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(3) - (6)].reg)) && IS_UIMM ((yyvsp[(5) - (6)].expr), 5))
-- {
-- notethat ("LOGI2op: BITCLR (dregs , uimm5 )\n");
-- (yyval.instr) = LOGI2OP ((yyvsp[(3) - (6)].reg), uimm5 ((yyvsp[(5) - (6)].expr)), 3);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 128:
--#line 2476 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(5) - (8)].reg)) && IS_UIMM ((yyvsp[(7) - (8)].expr), 5))
-- {
-- notethat ("LOGI2op: CC =! BITTST (dregs , uimm5 )\n");
-- (yyval.instr) = LOGI2OP ((yyvsp[(5) - (8)].reg), uimm5 ((yyvsp[(7) - (8)].expr)), 0);
-- }
-- else
-- return yyerror ("Register mismatch or value error");
-- }
-- break;
--
-- case 129:
--#line 2487 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(5) - (8)].reg)) && IS_UIMM ((yyvsp[(7) - (8)].expr), 5))
-- {
-- notethat ("LOGI2op: CC = BITTST (dregs , uimm5 )\n");
-- (yyval.instr) = LOGI2OP ((yyvsp[(5) - (8)].reg), uimm5 ((yyvsp[(7) - (8)].expr)), 1);
-- }
-- else
-- return yyerror ("Register mismatch or value error");
-- }
-- break;
--
-- case 130:
--#line 2498 "bfin-parse.y"
-- {
-- if ((IS_DREG ((yyvsp[(4) - (6)].reg)) || IS_PREG ((yyvsp[(4) - (6)].reg)))
-- && (IS_DREG ((yyvsp[(6) - (6)].reg)) || IS_PREG ((yyvsp[(6) - (6)].reg))))
-- {
-- notethat ("ccMV: IF ! CC gregs = gregs\n");
-- (yyval.instr) = CCMV (&(yyvsp[(6) - (6)].reg), &(yyvsp[(4) - (6)].reg), 0);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 131:
--#line 2510 "bfin-parse.y"
-- {
-- if ((IS_DREG ((yyvsp[(5) - (5)].reg)) || IS_PREG ((yyvsp[(5) - (5)].reg)))
-- && (IS_DREG ((yyvsp[(3) - (5)].reg)) || IS_PREG ((yyvsp[(3) - (5)].reg))))
-- {
-- notethat ("ccMV: IF CC gregs = gregs\n");
-- (yyval.instr) = CCMV (&(yyvsp[(5) - (5)].reg), &(yyvsp[(3) - (5)].reg), 1);
-- }
-- else
-- return yyerror ("Register mismatch");
-- }
-- break;
--
-- case 132:
--#line 2522 "bfin-parse.y"
-- {
-- if (IS_PCREL10 ((yyvsp[(5) - (5)].expr)))
-- {
-- notethat ("BRCC: IF !CC JUMP pcrel11m2\n");
-- (yyval.instr) = BRCC (0, 0, (yyvsp[(5) - (5)].expr));
-- }
-- else
-- return yyerror ("Bad jump offset");
-- }
-- break;
--
-- case 133:
--#line 2533 "bfin-parse.y"
-- {
-- if (IS_PCREL10 ((yyvsp[(5) - (8)].expr)))
-- {
-- notethat ("BRCC: IF !CC JUMP pcrel11m2\n");
-- (yyval.instr) = BRCC (0, 1, (yyvsp[(5) - (8)].expr));
-- }
-- else
-- return yyerror ("Bad jump offset");
-- }
-- break;
--
-- case 134:
--#line 2544 "bfin-parse.y"
-- {
-- if (IS_PCREL10 ((yyvsp[(4) - (4)].expr)))
-- {
-- notethat ("BRCC: IF CC JUMP pcrel11m2\n");
-- (yyval.instr) = BRCC (1, 0, (yyvsp[(4) - (4)].expr));
-- }
-- else
-- return yyerror ("Bad jump offset");
-- }
-- break;
--
-- case 135:
--#line 2555 "bfin-parse.y"
-- {
-- if (IS_PCREL10 ((yyvsp[(4) - (7)].expr)))
-- {
-- notethat ("BRCC: IF !CC JUMP pcrel11m2\n");
-- (yyval.instr) = BRCC (1, 1, (yyvsp[(4) - (7)].expr));
-- }
-- else
-- return yyerror ("Bad jump offset");
-- }
-- break;
--
-- case 136:
--#line 2565 "bfin-parse.y"
-- {
-- notethat ("ProgCtrl: NOP\n");
-- (yyval.instr) = PROGCTRL (0, 0);
-- }
-- break;
--
-- case 137:
--#line 2571 "bfin-parse.y"
-- {
-- notethat ("ProgCtrl: RTS\n");
-- (yyval.instr) = PROGCTRL (1, 0);
-- }
-- break;
--
-- case 138:
--#line 2577 "bfin-parse.y"
-- {
-- notethat ("ProgCtrl: RTI\n");
-- (yyval.instr) = PROGCTRL (1, 1);
-- }
-- break;
--
-- case 139:
--#line 2583 "bfin-parse.y"
-- {
-- notethat ("ProgCtrl: RTX\n");
-- (yyval.instr) = PROGCTRL (1, 2);
-- }
-- break;
--
-- case 140:
--#line 2589 "bfin-parse.y"
-- {
-- notethat ("ProgCtrl: RTN\n");
-- (yyval.instr) = PROGCTRL (1, 3);
-- }
-- break;
--
-- case 141:
--#line 2595 "bfin-parse.y"
-- {
-- notethat ("ProgCtrl: RTE\n");
-- (yyval.instr) = PROGCTRL (1, 4);
-- }
-- break;
--
-- case 142:
--#line 2601 "bfin-parse.y"
-- {
-- notethat ("ProgCtrl: IDLE\n");
-- (yyval.instr) = PROGCTRL (2, 0);
-- }
-- break;
--
-- case 143:
--#line 2607 "bfin-parse.y"
-- {
-- notethat ("ProgCtrl: CSYNC\n");
-- (yyval.instr) = PROGCTRL (2, 3);
-- }
-- break;
--
-- case 144:
--#line 2613 "bfin-parse.y"
-- {
-- notethat ("ProgCtrl: SSYNC\n");
-- (yyval.instr) = PROGCTRL (2, 4);
-- }
-- break;
--
-- case 145:
--#line 2619 "bfin-parse.y"
-- {
-- notethat ("ProgCtrl: EMUEXCPT\n");
-- (yyval.instr) = PROGCTRL (2, 5);
-- }
-- break;
--
-- case 146:
--#line 2625 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(2) - (2)].reg)))
-- {
-- notethat ("ProgCtrl: CLI dregs\n");
-- (yyval.instr) = PROGCTRL (3, (yyvsp[(2) - (2)].reg).regno & CODE_MASK);
-- }
-- else
-- return yyerror ("Dreg expected for CLI");
-- }
-- break;
--
-- case 147:
--#line 2636 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(2) - (2)].reg)))
-- {
-- notethat ("ProgCtrl: STI dregs\n");
-- (yyval.instr) = PROGCTRL (4, (yyvsp[(2) - (2)].reg).regno & CODE_MASK);
-- }
-- else
-- return yyerror ("Dreg expected for STI");
-- }
-- break;
--
-- case 148:
--#line 2647 "bfin-parse.y"
-- {
-- if (IS_PREG ((yyvsp[(3) - (4)].reg)))
-- {
-- notethat ("ProgCtrl: JUMP (pregs )\n");
-- (yyval.instr) = PROGCTRL (5, (yyvsp[(3) - (4)].reg).regno & CODE_MASK);
-- }
-- else
-- return yyerror ("Bad register for indirect jump");
-- }
-- break;
--
-- case 149:
--#line 2658 "bfin-parse.y"
-- {
-- if (IS_PREG ((yyvsp[(3) - (4)].reg)))
-- {
-- notethat ("ProgCtrl: CALL (pregs )\n");
-- (yyval.instr) = PROGCTRL (6, (yyvsp[(3) - (4)].reg).regno & CODE_MASK);
-- }
-- else
-- return yyerror ("Bad register for indirect call");
-- }
-- break;
--
-- case 150:
--#line 2669 "bfin-parse.y"
-- {
-- if (IS_PREG ((yyvsp[(5) - (6)].reg)))
-- {
-- notethat ("ProgCtrl: CALL (PC + pregs )\n");
-- (yyval.instr) = PROGCTRL (7, (yyvsp[(5) - (6)].reg).regno & CODE_MASK);
-- }
-- else
-- return yyerror ("Bad register for indirect call");
-- }
-- break;
--
-- case 151:
--#line 2680 "bfin-parse.y"
-- {
-- if (IS_PREG ((yyvsp[(5) - (6)].reg)))
-- {
-- notethat ("ProgCtrl: JUMP (PC + pregs )\n");
-- (yyval.instr) = PROGCTRL (8, (yyvsp[(5) - (6)].reg).regno & CODE_MASK);
-- }
-- else
-- return yyerror ("Bad register for indirect jump");
-- }
-- break;
--
-- case 152:
--#line 2691 "bfin-parse.y"
-- {
-- if (IS_UIMM ((yyvsp[(2) - (2)].expr), 4))
-- {
-- notethat ("ProgCtrl: RAISE uimm4\n");
-- (yyval.instr) = PROGCTRL (9, uimm4 ((yyvsp[(2) - (2)].expr)));
-- }
-- else
-- return yyerror ("Bad value for RAISE");
-- }
-- break;
--
-- case 153:
--#line 2702 "bfin-parse.y"
-- {
-- notethat ("ProgCtrl: EMUEXCPT\n");
-- (yyval.instr) = PROGCTRL (10, uimm4 ((yyvsp[(2) - (2)].expr)));
-- }
-- break;
--
-- case 154:
--#line 2708 "bfin-parse.y"
-- {
-- if (IS_PREG ((yyvsp[(3) - (4)].reg)))
-- {
-- if ((yyvsp[(3) - (4)].reg).regno == REG_SP || (yyvsp[(3) - (4)].reg).regno == REG_FP)
-- return yyerror ("Bad register for TESTSET");
--
-- notethat ("ProgCtrl: TESTSET (pregs )\n");
-- (yyval.instr) = PROGCTRL (11, (yyvsp[(3) - (4)].reg).regno & CODE_MASK);
-- }
-- else
-- return yyerror ("Preg expected");
-- }
-- break;
--
-- case 155:
--#line 2722 "bfin-parse.y"
-- {
-- if (IS_PCREL12 ((yyvsp[(2) - (2)].expr)))
-- {
-- notethat ("UJUMP: JUMP pcrel12\n");
-- (yyval.instr) = UJUMP ((yyvsp[(2) - (2)].expr));
-- }
-- else
-- return yyerror ("Bad value for relative jump");
-- }
-- break;
--
-- case 156:
--#line 2733 "bfin-parse.y"
-- {
-- if (IS_PCREL12 ((yyvsp[(2) - (2)].expr)))
-- {
-- notethat ("UJUMP: JUMP_DOT_S pcrel12\n");
-- (yyval.instr) = UJUMP((yyvsp[(2) - (2)].expr));
-- }
-- else
-- return yyerror ("Bad value for relative jump");
-- }
-- break;
--
-- case 157:
--#line 2744 "bfin-parse.y"
-- {
-- if (IS_PCREL24 ((yyvsp[(2) - (2)].expr)))
-- {
-- notethat ("CALLa: jump.l pcrel24\n");
-- (yyval.instr) = CALLA ((yyvsp[(2) - (2)].expr), 0);
-- }
-- else
-- return yyerror ("Bad value for long jump");
-- }
-- break;
--
-- case 158:
--#line 2755 "bfin-parse.y"
-- {
-- if (IS_PCREL24 ((yyvsp[(2) - (2)].expr)))
-- {
-- notethat ("CALLa: jump.l pcrel24\n");
-- (yyval.instr) = CALLA ((yyvsp[(2) - (2)].expr), 2);
-- }
-- else
-- return yyerror ("Bad value for long jump");
-- }
-- break;
--
-- case 159:
--#line 2766 "bfin-parse.y"
-- {
-- if (IS_PCREL24 ((yyvsp[(2) - (2)].expr)))
-- {
-- notethat ("CALLa: CALL pcrel25m2\n");
-- (yyval.instr) = CALLA ((yyvsp[(2) - (2)].expr), 1);
-- }
-- else
-- return yyerror ("Bad call address");
-- }
-- break;
--
-- case 160:
--#line 2776 "bfin-parse.y"
-- {
-- if (IS_PCREL24 ((yyvsp[(2) - (2)].expr)))
-- {
-- notethat ("CALLa: CALL pcrel25m2\n");
-- (yyval.instr) = CALLA ((yyvsp[(2) - (2)].expr), 2);
-- }
-- else
-- return yyerror ("Bad call address");
-- }
-- break;
--
-- case 161:
--#line 2789 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(3) - (6)].reg)) && IS_DREG ((yyvsp[(5) - (6)].reg)))
-- (yyval.instr) = ALU2OP (&(yyvsp[(3) - (6)].reg), &(yyvsp[(5) - (6)].reg), 8);
-- else
-- return yyerror ("Bad registers for DIVQ");
-- }
-- break;
--
-- case 162:
--#line 2797 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(3) - (6)].reg)) && IS_DREG ((yyvsp[(5) - (6)].reg)))
-- (yyval.instr) = ALU2OP (&(yyvsp[(3) - (6)].reg), &(yyvsp[(5) - (6)].reg), 9);
-- else
-- return yyerror ("Bad registers for DIVS");
-- }
-- break;
--
-- case 163:
--#line 2805 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (5)].reg)) && IS_DREG ((yyvsp[(4) - (5)].reg)))
-- {
-- if ((yyvsp[(5) - (5)].modcodes).r0 == 0 && (yyvsp[(5) - (5)].modcodes).s0 == 0 && (yyvsp[(5) - (5)].modcodes).aop == 0)
-- {
-- notethat ("ALU2op: dregs = - dregs\n");
-- (yyval.instr) = ALU2OP (&(yyvsp[(1) - (5)].reg), &(yyvsp[(4) - (5)].reg), 14);
-- }
-- else if ((yyvsp[(5) - (5)].modcodes).r0 == 1 && (yyvsp[(5) - (5)].modcodes).s0 == 0 && (yyvsp[(5) - (5)].modcodes).aop == 3)
-- {
-- notethat ("dsp32alu: dregs = - dregs (.)\n");
-- (yyval.instr) = DSP32ALU (15, 0, 0, &(yyvsp[(1) - (5)].reg), &(yyvsp[(4) - (5)].reg), 0, (yyvsp[(5) - (5)].modcodes).s0, 0, 3);
-- }
-- else
-- {
-- notethat ("dsp32alu: dregs = - dregs (.)\n");
-- (yyval.instr) = DSP32ALU (7, 0, 0, &(yyvsp[(1) - (5)].reg), &(yyvsp[(4) - (5)].reg), 0, (yyvsp[(5) - (5)].modcodes).s0, 0, 3);
-- }
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 164:
--#line 2829 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (4)].reg)) && IS_DREG ((yyvsp[(4) - (4)].reg)))
-- {
-- notethat ("ALU2op: dregs = ~dregs\n");
-- (yyval.instr) = ALU2OP (&(yyvsp[(1) - (4)].reg), &(yyvsp[(4) - (4)].reg), 15);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 165:
--#line 2840 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (3)].reg)) && IS_DREG ((yyvsp[(3) - (3)].reg)))
-- {
-- notethat ("ALU2op: dregs >>= dregs\n");
-- (yyval.instr) = ALU2OP (&(yyvsp[(1) - (3)].reg), &(yyvsp[(3) - (3)].reg), 1);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 166:
--#line 2851 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (3)].reg)) && IS_UIMM ((yyvsp[(3) - (3)].expr), 5))
-- {
-- notethat ("LOGI2op: dregs >>= uimm5\n");
-- (yyval.instr) = LOGI2OP ((yyvsp[(1) - (3)].reg), uimm5 ((yyvsp[(3) - (3)].expr)), 6);
-- }
-- else
-- return yyerror ("Dregs expected or value error");
-- }
-- break;
--
-- case 167:
--#line 2862 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (3)].reg)) && IS_DREG ((yyvsp[(3) - (3)].reg)))
-- {
-- notethat ("ALU2op: dregs >>>= dregs\n");
-- (yyval.instr) = ALU2OP (&(yyvsp[(1) - (3)].reg), &(yyvsp[(3) - (3)].reg), 0);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 168:
--#line 2873 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (3)].reg)) && IS_DREG ((yyvsp[(3) - (3)].reg)))
-- {
-- notethat ("ALU2op: dregs <<= dregs\n");
-- (yyval.instr) = ALU2OP (&(yyvsp[(1) - (3)].reg), &(yyvsp[(3) - (3)].reg), 2);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 169:
--#line 2884 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (3)].reg)) && IS_UIMM ((yyvsp[(3) - (3)].expr), 5))
-- {
-- notethat ("LOGI2op: dregs <<= uimm5\n");
-- (yyval.instr) = LOGI2OP ((yyvsp[(1) - (3)].reg), uimm5 ((yyvsp[(3) - (3)].expr)), 7);
-- }
-- else
-- return yyerror ("Dregs expected or const value error");
-- }
-- break;
--
-- case 170:
--#line 2896 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (3)].reg)) && IS_UIMM ((yyvsp[(3) - (3)].expr), 5))
-- {
-- notethat ("LOGI2op: dregs >>>= uimm5\n");
-- (yyval.instr) = LOGI2OP ((yyvsp[(1) - (3)].reg), uimm5 ((yyvsp[(3) - (3)].expr)), 5);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 171:
--#line 2909 "bfin-parse.y"
-- {
-- notethat ("CaCTRL: FLUSH [ pregs ]\n");
-- if (IS_PREG ((yyvsp[(3) - (4)].reg)))
-- (yyval.instr) = CACTRL (&(yyvsp[(3) - (4)].reg), 0, 2);
-- else
-- return yyerror ("Bad register(s) for FLUSH");
-- }
-- break;
--
-- case 172:
--#line 2918 "bfin-parse.y"
-- {
-- if (IS_PREG ((yyvsp[(2) - (2)].reg)))
-- {
-- notethat ("CaCTRL: FLUSH [ pregs ++ ]\n");
-- (yyval.instr) = CACTRL (&(yyvsp[(2) - (2)].reg), 1, 2);
-- }
-- else
-- return yyerror ("Bad register(s) for FLUSH");
-- }
-- break;
--
-- case 173:
--#line 2929 "bfin-parse.y"
-- {
-- if (IS_PREG ((yyvsp[(3) - (4)].reg)))
-- {
-- notethat ("CaCTRL: FLUSHINV [ pregs ]\n");
-- (yyval.instr) = CACTRL (&(yyvsp[(3) - (4)].reg), 0, 1);
-- }
-- else
-- return yyerror ("Bad register(s) for FLUSH");
-- }
-- break;
--
-- case 174:
--#line 2940 "bfin-parse.y"
-- {
-- if (IS_PREG ((yyvsp[(2) - (2)].reg)))
-- {
-- notethat ("CaCTRL: FLUSHINV [ pregs ++ ]\n");
-- (yyval.instr) = CACTRL (&(yyvsp[(2) - (2)].reg), 1, 1);
-- }
-- else
-- return yyerror ("Bad register(s) for FLUSH");
-- }
-- break;
--
-- case 175:
--#line 2952 "bfin-parse.y"
-- {
-- if (IS_PREG ((yyvsp[(3) - (4)].reg)))
-- {
-- notethat ("CaCTRL: IFLUSH [ pregs ]\n");
-- (yyval.instr) = CACTRL (&(yyvsp[(3) - (4)].reg), 0, 3);
-- }
-- else
-- return yyerror ("Bad register(s) for FLUSH");
-- }
-- break;
--
-- case 176:
--#line 2963 "bfin-parse.y"
-- {
-- if (IS_PREG ((yyvsp[(2) - (2)].reg)))
-- {
-- notethat ("CaCTRL: IFLUSH [ pregs ++ ]\n");
-- (yyval.instr) = CACTRL (&(yyvsp[(2) - (2)].reg), 1, 3);
-- }
-- else
-- return yyerror ("Bad register(s) for FLUSH");
-- }
-- break;
--
-- case 177:
--#line 2974 "bfin-parse.y"
-- {
-- if (IS_PREG ((yyvsp[(3) - (4)].reg)))
-- {
-- notethat ("CaCTRL: PREFETCH [ pregs ]\n");
-- (yyval.instr) = CACTRL (&(yyvsp[(3) - (4)].reg), 0, 0);
-- }
-- else
-- return yyerror ("Bad register(s) for PREFETCH");
-- }
-- break;
--
-- case 178:
--#line 2985 "bfin-parse.y"
-- {
-- if (IS_PREG ((yyvsp[(2) - (2)].reg)))
-- {
-- notethat ("CaCTRL: PREFETCH [ pregs ++ ]\n");
-- (yyval.instr) = CACTRL (&(yyvsp[(2) - (2)].reg), 1, 0);
-- }
-- else
-- return yyerror ("Bad register(s) for PREFETCH");
-- }
-- break;
--
-- case 179:
--#line 2999 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(7) - (7)].reg)))
-- return yyerror ("Dreg expected for source operand");
-- if (!IS_PREG ((yyvsp[(3) - (7)].reg)))
-- return yyerror ("Preg expected in address");
--
-- notethat ("LDST: B [ pregs <post_op> ] = dregs\n");
-- (yyval.instr) = LDST (&(yyvsp[(3) - (7)].reg), &(yyvsp[(7) - (7)].reg), (yyvsp[(4) - (7)].modcodes).x0, 2, 0, 1);
-- }
-- break;
--
-- case 180:
--#line 3011 "bfin-parse.y"
-- {
-- Expr_Node *tmp = (yyvsp[(5) - (8)].expr);
--
-- if (!IS_DREG ((yyvsp[(8) - (8)].reg)))
-- return yyerror ("Dreg expected for source operand");
-- if (!IS_PREG ((yyvsp[(3) - (8)].reg)))
-- return yyerror ("Preg expected in address");
--
-- if (IS_RELOC ((yyvsp[(5) - (8)].expr)))
-- return yyerror ("Plain symbol used as offset");
--
-- if ((yyvsp[(4) - (8)].r0).r0)
-- tmp = unary (Expr_Op_Type_NEG, tmp);
--
-- if (in_range_p (tmp, -32768, 32767, 0))
-- {
-- notethat ("LDST: B [ pregs + imm16 ] = dregs\n");
-- (yyval.instr) = LDSTIDXI (&(yyvsp[(3) - (8)].reg), &(yyvsp[(8) - (8)].reg), 1, 2, 0, (yyvsp[(5) - (8)].expr));
-- }
-- else
-- return yyerror ("Displacement out of range");
-- }
-- break;
--
-- case 181:
--#line 3037 "bfin-parse.y"
-- {
-- Expr_Node *tmp = (yyvsp[(5) - (8)].expr);
--
-- if (!IS_DREG ((yyvsp[(8) - (8)].reg)))
-- return yyerror ("Dreg expected for source operand");
-- if (!IS_PREG ((yyvsp[(3) - (8)].reg)))
-- return yyerror ("Preg expected in address");
--
-- if ((yyvsp[(4) - (8)].r0).r0)
-- tmp = unary (Expr_Op_Type_NEG, tmp);
--
-- if (IS_RELOC ((yyvsp[(5) - (8)].expr)))
-- return yyerror ("Plain symbol used as offset");
--
-- if (in_range_p (tmp, 0, 30, 1))
-- {
-- notethat ("LDSTii: W [ pregs +- uimm5m2 ] = dregs\n");
-- (yyval.instr) = LDSTII (&(yyvsp[(3) - (8)].reg), &(yyvsp[(8) - (8)].reg), tmp, 1, 1);
-- }
-- else if (in_range_p (tmp, -65536, 65535, 1))
-- {
-- notethat ("LDSTidxI: W [ pregs + imm17m2 ] = dregs\n");
-- (yyval.instr) = LDSTIDXI (&(yyvsp[(3) - (8)].reg), &(yyvsp[(8) - (8)].reg), 1, 1, 0, tmp);
-- }
-- else
-- return yyerror ("Displacement out of range");
-- }
-- break;
--
-- case 182:
--#line 3067 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(7) - (7)].reg)))
-- return yyerror ("Dreg expected for source operand");
-- if (!IS_PREG ((yyvsp[(3) - (7)].reg)))
-- return yyerror ("Preg expected in address");
--
-- notethat ("LDST: W [ pregs <post_op> ] = dregs\n");
-- (yyval.instr) = LDST (&(yyvsp[(3) - (7)].reg), &(yyvsp[(7) - (7)].reg), (yyvsp[(4) - (7)].modcodes).x0, 1, 0, 1);
-- }
-- break;
--
-- case 183:
--#line 3078 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(7) - (7)].reg)))
-- return yyerror ("Dreg expected for source operand");
-- if ((yyvsp[(4) - (7)].modcodes).x0 == 2)
-- {
-- if (!IS_IREG ((yyvsp[(3) - (7)].reg)) && !IS_PREG ((yyvsp[(3) - (7)].reg)))
-- return yyerror ("Ireg or Preg expected in address");
-- }
-- else if (!IS_IREG ((yyvsp[(3) - (7)].reg)))
-- return yyerror ("Ireg expected in address");
--
-- if (IS_IREG ((yyvsp[(3) - (7)].reg)))
-- {
-- notethat ("dspLDST: W [ iregs <post_op> ] = dregs_half\n");
-- (yyval.instr) = DSPLDST (&(yyvsp[(3) - (7)].reg), 1 + IS_H ((yyvsp[(7) - (7)].reg)), &(yyvsp[(7) - (7)].reg), (yyvsp[(4) - (7)].modcodes).x0, 1);
-- }
-- else
-- {
-- notethat ("LDSTpmod: W [ pregs ] = dregs_half\n");
-- (yyval.instr) = LDSTPMOD (&(yyvsp[(3) - (7)].reg), &(yyvsp[(7) - (7)].reg), &(yyvsp[(3) - (7)].reg), 1 + IS_H ((yyvsp[(7) - (7)].reg)), 1);
-- }
-- }
-- break;
--
-- case 184:
--#line 3103 "bfin-parse.y"
-- {
-- Expr_Node *tmp = (yyvsp[(4) - (7)].expr);
-- int ispreg = IS_PREG ((yyvsp[(7) - (7)].reg));
--
-- if (!IS_PREG ((yyvsp[(2) - (7)].reg)))
-- return yyerror ("Preg expected in address");
--
-- if (!IS_DREG ((yyvsp[(7) - (7)].reg)) && !ispreg)
-- return yyerror ("Preg expected for source operand");
--
-- if ((yyvsp[(3) - (7)].r0).r0)
-- tmp = unary (Expr_Op_Type_NEG, tmp);
--
-- if (IS_RELOC ((yyvsp[(4) - (7)].expr)))
-- return yyerror ("Plain symbol used as offset");
--
-- if (in_range_p (tmp, 0, 63, 3))
-- {
-- notethat ("LDSTii: dpregs = [ pregs + uimm6m4 ]\n");
-- (yyval.instr) = LDSTII (&(yyvsp[(2) - (7)].reg), &(yyvsp[(7) - (7)].reg), tmp, 1, ispreg ? 3 : 0);
-- }
-- else if ((yyvsp[(2) - (7)].reg).regno == REG_FP && in_range_p (tmp, -128, 0, 3))
-- {
-- notethat ("LDSTiiFP: dpregs = [ FP - uimm7m4 ]\n");
-- tmp = unary (Expr_Op_Type_NEG, tmp);
-- (yyval.instr) = LDSTIIFP (tmp, &(yyvsp[(7) - (7)].reg), 1);
-- }
-- else if (in_range_p (tmp, -131072, 131071, 3))
-- {
-- notethat ("LDSTidxI: [ pregs + imm18m4 ] = dpregs\n");
-- (yyval.instr) = LDSTIDXI (&(yyvsp[(2) - (7)].reg), &(yyvsp[(7) - (7)].reg), 1, 0, ispreg ? 1 : 0, tmp);
-- }
-- else
-- return yyerror ("Displacement out of range");
-- }
-- break;
--
-- case 185:
--#line 3140 "bfin-parse.y"
-- {
-- Expr_Node *tmp = (yyvsp[(7) - (9)].expr);
-- if (!IS_DREG ((yyvsp[(1) - (9)].reg)))
-- return yyerror ("Dreg expected for destination operand");
-- if (!IS_PREG ((yyvsp[(5) - (9)].reg)))
-- return yyerror ("Preg expected in address");
--
-- if ((yyvsp[(6) - (9)].r0).r0)
-- tmp = unary (Expr_Op_Type_NEG, tmp);
--
-- if (IS_RELOC ((yyvsp[(7) - (9)].expr)))
-- return yyerror ("Plain symbol used as offset");
--
-- if (in_range_p (tmp, 0, 30, 1))
-- {
-- notethat ("LDSTii: dregs = W [ pregs + uimm5m2 ] (.)\n");
-- (yyval.instr) = LDSTII (&(yyvsp[(5) - (9)].reg), &(yyvsp[(1) - (9)].reg), tmp, 0, 1 << (yyvsp[(9) - (9)].r0).r0);
-- }
-- else if (in_range_p (tmp, -65536, 65535, 1))
-- {
-- notethat ("LDSTidxI: dregs = W [ pregs + imm17m2 ] (.)\n");
-- (yyval.instr) = LDSTIDXI (&(yyvsp[(5) - (9)].reg), &(yyvsp[(1) - (9)].reg), 0, 1, (yyvsp[(9) - (9)].r0).r0, tmp);
-- }
-- else
-- return yyerror ("Displacement out of range");
-- }
-- break;
--
-- case 186:
--#line 3168 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(1) - (7)].reg)))
-- return yyerror ("Dreg expected for source operand");
-- if ((yyvsp[(6) - (7)].modcodes).x0 == 2)
-- {
-- if (!IS_IREG ((yyvsp[(5) - (7)].reg)) && !IS_PREG ((yyvsp[(5) - (7)].reg)))
-- return yyerror ("Ireg or Preg expected in address");
-- }
-- else if (!IS_IREG ((yyvsp[(5) - (7)].reg)))
-- return yyerror ("Ireg expected in address");
--
-- if (IS_IREG ((yyvsp[(5) - (7)].reg)))
-- {
-- notethat ("dspLDST: dregs_half = W [ iregs <post_op> ]\n");
-- (yyval.instr) = DSPLDST(&(yyvsp[(5) - (7)].reg), 1 + IS_H ((yyvsp[(1) - (7)].reg)), &(yyvsp[(1) - (7)].reg), (yyvsp[(6) - (7)].modcodes).x0, 0);
-- }
-- else
-- {
-- notethat ("LDSTpmod: dregs_half = W [ pregs <post_op> ]\n");
-- (yyval.instr) = LDSTPMOD (&(yyvsp[(5) - (7)].reg), &(yyvsp[(1) - (7)].reg), &(yyvsp[(5) - (7)].reg), 1 + IS_H ((yyvsp[(1) - (7)].reg)), 0);
-- }
-- }
-- break;
--
-- case 187:
--#line 3193 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(1) - (8)].reg)))
-- return yyerror ("Dreg expected for destination operand");
-- if (!IS_PREG ((yyvsp[(5) - (8)].reg)))
-- return yyerror ("Preg expected in address");
--
-- notethat ("LDST: dregs = W [ pregs <post_op> ] (.)\n");
-- (yyval.instr) = LDST (&(yyvsp[(5) - (8)].reg), &(yyvsp[(1) - (8)].reg), (yyvsp[(6) - (8)].modcodes).x0, 1, (yyvsp[(8) - (8)].r0).r0, 0);
-- }
-- break;
--
-- case 188:
--#line 3204 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(1) - (9)].reg)))
-- return yyerror ("Dreg expected for destination operand");
-- if (!IS_PREG ((yyvsp[(5) - (9)].reg)) || !IS_PREG ((yyvsp[(7) - (9)].reg)))
-- return yyerror ("Preg expected in address");
--
-- notethat ("LDSTpmod: dregs = W [ pregs ++ pregs ] (.)\n");
-- (yyval.instr) = LDSTPMOD (&(yyvsp[(5) - (9)].reg), &(yyvsp[(1) - (9)].reg), &(yyvsp[(7) - (9)].reg), 3, (yyvsp[(9) - (9)].r0).r0);
-- }
-- break;
--
-- case 189:
--#line 3215 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(1) - (8)].reg)))
-- return yyerror ("Dreg expected for destination operand");
-- if (!IS_PREG ((yyvsp[(5) - (8)].reg)) || !IS_PREG ((yyvsp[(7) - (8)].reg)))
-- return yyerror ("Preg expected in address");
--
-- notethat ("LDSTpmod: dregs_half = W [ pregs ++ pregs ]\n");
-- (yyval.instr) = LDSTPMOD (&(yyvsp[(5) - (8)].reg), &(yyvsp[(1) - (8)].reg), &(yyvsp[(7) - (8)].reg), 1 + IS_H ((yyvsp[(1) - (8)].reg)), 0);
-- }
-- break;
--
-- case 190:
--#line 3226 "bfin-parse.y"
-- {
-- if (!IS_IREG ((yyvsp[(2) - (6)].reg)) && !IS_PREG ((yyvsp[(2) - (6)].reg)))
-- return yyerror ("Ireg or Preg expected in address");
-- else if (IS_IREG ((yyvsp[(2) - (6)].reg)) && !IS_DREG ((yyvsp[(6) - (6)].reg)))
-- return yyerror ("Dreg expected for source operand");
-- else if (IS_PREG ((yyvsp[(2) - (6)].reg)) && !IS_DREG ((yyvsp[(6) - (6)].reg)) && !IS_PREG ((yyvsp[(6) - (6)].reg)))
-- return yyerror ("Dreg or Preg expected for source operand");
--
-- if (IS_IREG ((yyvsp[(2) - (6)].reg)))
-- {
-- notethat ("dspLDST: [ iregs <post_op> ] = dregs\n");
-- (yyval.instr) = DSPLDST(&(yyvsp[(2) - (6)].reg), 0, &(yyvsp[(6) - (6)].reg), (yyvsp[(3) - (6)].modcodes).x0, 1);
-- }
-- else if (IS_DREG ((yyvsp[(6) - (6)].reg)))
-- {
-- notethat ("LDST: [ pregs <post_op> ] = dregs\n");
-- (yyval.instr) = LDST (&(yyvsp[(2) - (6)].reg), &(yyvsp[(6) - (6)].reg), (yyvsp[(3) - (6)].modcodes).x0, 0, 0, 1);
-- }
-- else
-- {
-- notethat ("LDST: [ pregs <post_op> ] = pregs\n");
-- (yyval.instr) = LDST (&(yyvsp[(2) - (6)].reg), &(yyvsp[(6) - (6)].reg), (yyvsp[(3) - (6)].modcodes).x0, 0, 1, 1);
-- }
-- }
-- break;
--
-- case 191:
--#line 3252 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(7) - (7)].reg)))
-- return yyerror ("Dreg expected for source operand");
--
-- if (IS_IREG ((yyvsp[(2) - (7)].reg)) && IS_MREG ((yyvsp[(4) - (7)].reg)))
-- {
-- notethat ("dspLDST: [ iregs ++ mregs ] = dregs\n");
-- (yyval.instr) = DSPLDST(&(yyvsp[(2) - (7)].reg), (yyvsp[(4) - (7)].reg).regno & CODE_MASK, &(yyvsp[(7) - (7)].reg), 3, 1);
-- }
-- else if (IS_PREG ((yyvsp[(2) - (7)].reg)) && IS_PREG ((yyvsp[(4) - (7)].reg)))
-- {
-- notethat ("LDSTpmod: [ pregs ++ pregs ] = dregs\n");
-- (yyval.instr) = LDSTPMOD (&(yyvsp[(2) - (7)].reg), &(yyvsp[(7) - (7)].reg), &(yyvsp[(4) - (7)].reg), 0, 1);
-- }
-- else
-- return yyerror ("Preg ++ Preg or Ireg ++ Mreg expected in address");
-- }
-- break;
--
-- case 192:
--#line 3271 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(8) - (8)].reg)))
-- return yyerror ("Dreg expected for source operand");
--
-- if (IS_PREG ((yyvsp[(3) - (8)].reg)) && IS_PREG ((yyvsp[(5) - (8)].reg)))
-- {
-- notethat ("LDSTpmod: W [ pregs ++ pregs ] = dregs_half\n");
-- (yyval.instr) = LDSTPMOD (&(yyvsp[(3) - (8)].reg), &(yyvsp[(8) - (8)].reg), &(yyvsp[(5) - (8)].reg), 1 + IS_H ((yyvsp[(8) - (8)].reg)), 1);
-- }
-- else
-- return yyerror ("Preg ++ Preg expected in address");
-- }
-- break;
--
-- case 193:
--#line 3285 "bfin-parse.y"
-- {
-- Expr_Node *tmp = (yyvsp[(7) - (9)].expr);
-- if (!IS_DREG ((yyvsp[(1) - (9)].reg)))
-- return yyerror ("Dreg expected for destination operand");
-- if (!IS_PREG ((yyvsp[(5) - (9)].reg)))
-- return yyerror ("Preg expected in address");
--
-- if ((yyvsp[(6) - (9)].r0).r0)
-- tmp = unary (Expr_Op_Type_NEG, tmp);
--
-- if (IS_RELOC ((yyvsp[(7) - (9)].expr)))
-- return yyerror ("Plain symbol used as offset");
--
-- if (in_range_p (tmp, -32768, 32767, 0))
-- {
-- notethat ("LDSTidxI: dregs = B [ pregs + imm16 ] (%c)\n",
-- (yyvsp[(9) - (9)].r0).r0 ? 'X' : 'Z');
-- (yyval.instr) = LDSTIDXI (&(yyvsp[(5) - (9)].reg), &(yyvsp[(1) - (9)].reg), 0, 2, (yyvsp[(9) - (9)].r0).r0, tmp);
-- }
-- else
-- return yyerror ("Displacement out of range");
-- }
-- break;
--
-- case 194:
--#line 3309 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(1) - (8)].reg)))
-- return yyerror ("Dreg expected for destination operand");
-- if (!IS_PREG ((yyvsp[(5) - (8)].reg)))
-- return yyerror ("Preg expected in address");
--
-- notethat ("LDST: dregs = B [ pregs <post_op> ] (%c)\n",
-- (yyvsp[(8) - (8)].r0).r0 ? 'X' : 'Z');
-- (yyval.instr) = LDST (&(yyvsp[(5) - (8)].reg), &(yyvsp[(1) - (8)].reg), (yyvsp[(6) - (8)].modcodes).x0, 2, (yyvsp[(8) - (8)].r0).r0, 0);
-- }
-- break;
--
-- case 195:
--#line 3321 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(1) - (7)].reg)))
-- return yyerror ("Dreg expected for destination operand");
--
-- if (IS_IREG ((yyvsp[(4) - (7)].reg)) && IS_MREG ((yyvsp[(6) - (7)].reg)))
-- {
-- notethat ("dspLDST: dregs = [ iregs ++ mregs ]\n");
-- (yyval.instr) = DSPLDST(&(yyvsp[(4) - (7)].reg), (yyvsp[(6) - (7)].reg).regno & CODE_MASK, &(yyvsp[(1) - (7)].reg), 3, 0);
-- }
-- else if (IS_PREG ((yyvsp[(4) - (7)].reg)) && IS_PREG ((yyvsp[(6) - (7)].reg)))
-- {
-- notethat ("LDSTpmod: dregs = [ pregs ++ pregs ]\n");
-- (yyval.instr) = LDSTPMOD (&(yyvsp[(4) - (7)].reg), &(yyvsp[(1) - (7)].reg), &(yyvsp[(6) - (7)].reg), 0, 0);
-- }
-- else
-- return yyerror ("Preg ++ Preg or Ireg ++ Mreg expected in address");
-- }
-- break;
--
-- case 196:
--#line 3340 "bfin-parse.y"
-- {
-- Expr_Node *tmp = (yyvsp[(6) - (7)].expr);
-- int ispreg = IS_PREG ((yyvsp[(1) - (7)].reg));
-- int isgot = IS_RELOC((yyvsp[(6) - (7)].expr));
--
-- if (!IS_PREG ((yyvsp[(4) - (7)].reg)))
-- return yyerror ("Preg expected in address");
--
-- if (!IS_DREG ((yyvsp[(1) - (7)].reg)) && !ispreg)
-- return yyerror ("Dreg or Preg expected for destination operand");
--
-- if (tmp->type == Expr_Node_Reloc
-- && strcmp (tmp->value.s_value,
-- "_current_shared_library_p5_offset_") != 0)
-- return yyerror ("Plain symbol used as offset");
--
-- if ((yyvsp[(5) - (7)].r0).r0)
-- tmp = unary (Expr_Op_Type_NEG, tmp);
--
-- if (isgot)
-- {
-- notethat ("LDSTidxI: dpregs = [ pregs + sym@got ]\n");
-- (yyval.instr) = LDSTIDXI (&(yyvsp[(4) - (7)].reg), &(yyvsp[(1) - (7)].reg), 0, 0, ispreg ? 1 : 0, tmp);
-- }
-- else if (in_range_p (tmp, 0, 63, 3))
-- {
-- notethat ("LDSTii: dpregs = [ pregs + uimm7m4 ]\n");
-- (yyval.instr) = LDSTII (&(yyvsp[(4) - (7)].reg), &(yyvsp[(1) - (7)].reg), tmp, 0, ispreg ? 3 : 0);
-- }
-- else if ((yyvsp[(4) - (7)].reg).regno == REG_FP && in_range_p (tmp, -128, 0, 3))
-- {
-- notethat ("LDSTiiFP: dpregs = [ FP - uimm7m4 ]\n");
-- tmp = unary (Expr_Op_Type_NEG, tmp);
-- (yyval.instr) = LDSTIIFP (tmp, &(yyvsp[(1) - (7)].reg), 0);
-- }
-- else if (in_range_p (tmp, -131072, 131071, 3))
-- {
-- notethat ("LDSTidxI: dpregs = [ pregs + imm18m4 ]\n");
-- (yyval.instr) = LDSTIDXI (&(yyvsp[(4) - (7)].reg), &(yyvsp[(1) - (7)].reg), 0, 0, ispreg ? 1 : 0, tmp);
--
-- }
-- else
-- return yyerror ("Displacement out of range");
-- }
-- break;
--
-- case 197:
--#line 3386 "bfin-parse.y"
-- {
-- if (!IS_IREG ((yyvsp[(4) - (6)].reg)) && !IS_PREG ((yyvsp[(4) - (6)].reg)))
-- return yyerror ("Ireg or Preg expected in address");
-- else if (IS_IREG ((yyvsp[(4) - (6)].reg)) && !IS_DREG ((yyvsp[(1) - (6)].reg)))
-- return yyerror ("Dreg expected in destination operand");
-- else if (IS_PREG ((yyvsp[(4) - (6)].reg)) && !IS_DREG ((yyvsp[(1) - (6)].reg)) && !IS_PREG ((yyvsp[(1) - (6)].reg))
-- && ((yyvsp[(4) - (6)].reg).regno != REG_SP || !IS_ALLREG ((yyvsp[(1) - (6)].reg)) || (yyvsp[(5) - (6)].modcodes).x0 != 0))
-- return yyerror ("Dreg or Preg expected in destination operand");
--
-- if (IS_IREG ((yyvsp[(4) - (6)].reg)))
-- {
-- notethat ("dspLDST: dregs = [ iregs <post_op> ]\n");
-- (yyval.instr) = DSPLDST (&(yyvsp[(4) - (6)].reg), 0, &(yyvsp[(1) - (6)].reg), (yyvsp[(5) - (6)].modcodes).x0, 0);
-- }
-- else if (IS_DREG ((yyvsp[(1) - (6)].reg)))
-- {
-- notethat ("LDST: dregs = [ pregs <post_op> ]\n");
-- (yyval.instr) = LDST (&(yyvsp[(4) - (6)].reg), &(yyvsp[(1) - (6)].reg), (yyvsp[(5) - (6)].modcodes).x0, 0, 0, 0);
-- }
-- else if (IS_PREG ((yyvsp[(1) - (6)].reg)))
-- {
-- if (REG_SAME ((yyvsp[(1) - (6)].reg), (yyvsp[(4) - (6)].reg)) && (yyvsp[(5) - (6)].modcodes).x0 != 2)
-- return yyerror ("Pregs can't be same");
--
-- notethat ("LDST: pregs = [ pregs <post_op> ]\n");
-- (yyval.instr) = LDST (&(yyvsp[(4) - (6)].reg), &(yyvsp[(1) - (6)].reg), (yyvsp[(5) - (6)].modcodes).x0, 0, 1, 0);
-- }
-- else
-- {
-- notethat ("PushPopReg: allregs = [ SP ++ ]\n");
-- (yyval.instr) = PUSHPOPREG (&(yyvsp[(1) - (6)].reg), 0);
-- }
-- }
-- break;
--
-- case 198:
--#line 3423 "bfin-parse.y"
-- {
-- if ((yyvsp[(1) - (11)].reg).regno != REG_SP)
-- yyerror ("Stack Pointer expected");
-- if ((yyvsp[(4) - (11)].reg).regno == REG_R7
-- && IN_RANGE ((yyvsp[(6) - (11)].expr), 0, 7)
-- && (yyvsp[(8) - (11)].reg).regno == REG_P5
-- && IN_RANGE ((yyvsp[(10) - (11)].expr), 0, 5))
-- {
-- notethat ("PushPopMultiple: [ -- SP ] = (R7 : reglim , P5 : reglim )\n");
-- (yyval.instr) = PUSHPOPMULTIPLE (imm5 ((yyvsp[(6) - (11)].expr)), imm5 ((yyvsp[(10) - (11)].expr)), 1, 1, 1);
-- }
-- else
-- return yyerror ("Bad register for PushPopMultiple");
-- }
-- break;
--
-- case 199:
--#line 3439 "bfin-parse.y"
-- {
-- if ((yyvsp[(1) - (7)].reg).regno != REG_SP)
-- yyerror ("Stack Pointer expected");
--
-- if ((yyvsp[(4) - (7)].reg).regno == REG_R7 && IN_RANGE ((yyvsp[(6) - (7)].expr), 0, 7))
-- {
-- notethat ("PushPopMultiple: [ -- SP ] = (R7 : reglim )\n");
-- (yyval.instr) = PUSHPOPMULTIPLE (imm5 ((yyvsp[(6) - (7)].expr)), 0, 1, 0, 1);
-- }
-- else if ((yyvsp[(4) - (7)].reg).regno == REG_P5 && IN_RANGE ((yyvsp[(6) - (7)].expr), 0, 6))
-- {
-- notethat ("PushPopMultiple: [ -- SP ] = (P5 : reglim )\n");
-- (yyval.instr) = PUSHPOPMULTIPLE (0, imm5 ((yyvsp[(6) - (7)].expr)), 0, 1, 1);
-- }
-- else
-- return yyerror ("Bad register for PushPopMultiple");
-- }
-- break;
--
-- case 200:
--#line 3458 "bfin-parse.y"
-- {
-- if ((yyvsp[(11) - (11)].reg).regno != REG_SP)
-- yyerror ("Stack Pointer expected");
-- if ((yyvsp[(2) - (11)].reg).regno == REG_R7 && (IN_RANGE ((yyvsp[(4) - (11)].expr), 0, 7))
-- && (yyvsp[(6) - (11)].reg).regno == REG_P5 && (IN_RANGE ((yyvsp[(8) - (11)].expr), 0, 6)))
-- {
-- notethat ("PushPopMultiple: (R7 : reglim , P5 : reglim ) = [ SP ++ ]\n");
-- (yyval.instr) = PUSHPOPMULTIPLE (imm5 ((yyvsp[(4) - (11)].expr)), imm5 ((yyvsp[(8) - (11)].expr)), 1, 1, 0);
-- }
-- else
-- return yyerror ("Bad register range for PushPopMultiple");
-- }
-- break;
--
-- case 201:
--#line 3472 "bfin-parse.y"
-- {
-- if ((yyvsp[(7) - (7)].reg).regno != REG_SP)
-- yyerror ("Stack Pointer expected");
--
-- if ((yyvsp[(2) - (7)].reg).regno == REG_R7 && IN_RANGE ((yyvsp[(4) - (7)].expr), 0, 7))
-- {
-- notethat ("PushPopMultiple: (R7 : reglim ) = [ SP ++ ]\n");
-- (yyval.instr) = PUSHPOPMULTIPLE (imm5 ((yyvsp[(4) - (7)].expr)), 0, 1, 0, 0);
-- }
-- else if ((yyvsp[(2) - (7)].reg).regno == REG_P5 && IN_RANGE ((yyvsp[(4) - (7)].expr), 0, 6))
-- {
-- notethat ("PushPopMultiple: (P5 : reglim ) = [ SP ++ ]\n");
-- (yyval.instr) = PUSHPOPMULTIPLE (0, imm5 ((yyvsp[(4) - (7)].expr)), 0, 1, 0);
-- }
-- else
-- return yyerror ("Bad register range for PushPopMultiple");
-- }
-- break;
--
-- case 202:
--#line 3491 "bfin-parse.y"
-- {
-- if ((yyvsp[(1) - (3)].reg).regno != REG_SP)
-- yyerror ("Stack Pointer expected");
--
-- if (IS_ALLREG ((yyvsp[(3) - (3)].reg)))
-- {
-- notethat ("PushPopReg: [ -- SP ] = allregs\n");
-- (yyval.instr) = PUSHPOPREG (&(yyvsp[(3) - (3)].reg), 1);
-- }
-- else
-- return yyerror ("Bad register for PushPopReg");
-- }
-- break;
--
-- case 203:
--#line 3507 "bfin-parse.y"
-- {
-- if (IS_URANGE (16, (yyvsp[(2) - (2)].expr), 0, 4))
-- (yyval.instr) = LINKAGE (0, uimm16s4 ((yyvsp[(2) - (2)].expr)));
-- else
-- return yyerror ("Bad constant for LINK");
-- }
-- break;
--
-- case 204:
--#line 3515 "bfin-parse.y"
-- {
-- notethat ("linkage: UNLINK\n");
-- (yyval.instr) = LINKAGE (1, 0);
-- }
-- break;
--
-- case 205:
--#line 3524 "bfin-parse.y"
-- {
-- if (IS_PCREL4 ((yyvsp[(3) - (7)].expr)) && IS_LPPCREL10 ((yyvsp[(5) - (7)].expr)) && IS_CREG ((yyvsp[(7) - (7)].reg)))
-- {
-- notethat ("LoopSetup: LSETUP (pcrel4 , lppcrel10 ) counters\n");
-- (yyval.instr) = LOOPSETUP ((yyvsp[(3) - (7)].expr), &(yyvsp[(7) - (7)].reg), 0, (yyvsp[(5) - (7)].expr), 0);
-- }
-- else
-- return yyerror ("Bad register or values for LSETUP");
--
-- }
-- break;
--
-- case 206:
--#line 3535 "bfin-parse.y"
-- {
-- if (IS_PCREL4 ((yyvsp[(3) - (9)].expr)) && IS_LPPCREL10 ((yyvsp[(5) - (9)].expr))
-- && IS_PREG ((yyvsp[(9) - (9)].reg)) && IS_CREG ((yyvsp[(7) - (9)].reg)))
-- {
-- notethat ("LoopSetup: LSETUP (pcrel4 , lppcrel10 ) counters = pregs\n");
-- (yyval.instr) = LOOPSETUP ((yyvsp[(3) - (9)].expr), &(yyvsp[(7) - (9)].reg), 1, (yyvsp[(5) - (9)].expr), &(yyvsp[(9) - (9)].reg));
-- }
-- else
-- return yyerror ("Bad register or values for LSETUP");
-- }
-- break;
--
-- case 207:
--#line 3547 "bfin-parse.y"
-- {
-- if (IS_PCREL4 ((yyvsp[(3) - (11)].expr)) && IS_LPPCREL10 ((yyvsp[(5) - (11)].expr))
-- && IS_PREG ((yyvsp[(9) - (11)].reg)) && IS_CREG ((yyvsp[(7) - (11)].reg))
-- && EXPR_VALUE ((yyvsp[(11) - (11)].expr)) == 1)
-- {
-- notethat ("LoopSetup: LSETUP (pcrel4 , lppcrel10 ) counters = pregs >> 1\n");
-- (yyval.instr) = LOOPSETUP ((yyvsp[(3) - (11)].expr), &(yyvsp[(7) - (11)].reg), 3, (yyvsp[(5) - (11)].expr), &(yyvsp[(9) - (11)].reg));
-- }
-- else
-- return yyerror ("Bad register or values for LSETUP");
-- }
-- break;
--
-- case 208:
--#line 3561 "bfin-parse.y"
-- {
-- if (!IS_RELOC ((yyvsp[(2) - (3)].expr)))
-- return yyerror ("Invalid expression in loop statement");
-- if (!IS_CREG ((yyvsp[(3) - (3)].reg)))
-- return yyerror ("Invalid loop counter register");
-- (yyval.instr) = bfin_gen_loop ((yyvsp[(2) - (3)].expr), &(yyvsp[(3) - (3)].reg), 0, 0);
-- }
-- break;
--
-- case 209:
--#line 3569 "bfin-parse.y"
-- {
-- if (IS_RELOC ((yyvsp[(2) - (5)].expr)) && IS_PREG ((yyvsp[(5) - (5)].reg)) && IS_CREG ((yyvsp[(3) - (5)].reg)))
-- {
-- notethat ("Loop: LOOP expr counters = pregs\n");
-- (yyval.instr) = bfin_gen_loop ((yyvsp[(2) - (5)].expr), &(yyvsp[(3) - (5)].reg), 1, &(yyvsp[(5) - (5)].reg));
-- }
-- else
-- return yyerror ("Bad register or values for LOOP");
-- }
-- break;
--
-- case 210:
--#line 3579 "bfin-parse.y"
-- {
-- if (IS_RELOC ((yyvsp[(2) - (7)].expr)) && IS_PREG ((yyvsp[(5) - (7)].reg)) && IS_CREG ((yyvsp[(3) - (7)].reg)) && EXPR_VALUE ((yyvsp[(7) - (7)].expr)) == 1)
-- {
-- notethat ("Loop: LOOP expr counters = pregs >> 1\n");
-- (yyval.instr) = bfin_gen_loop ((yyvsp[(2) - (7)].expr), &(yyvsp[(3) - (7)].reg), 3, &(yyvsp[(5) - (7)].reg));
-- }
-- else
-- return yyerror ("Bad register or values for LOOP");
-- }
-- break;
--
-- case 211:
--#line 3591 "bfin-parse.y"
-- {
-- Expr_Node_Value val;
-- val.i_value = (yyvsp[(2) - (2)].value);
-- Expr_Node *tmp = Expr_Node_Create (Expr_Node_Constant, val, NULL, NULL);
-- bfin_loop_attempt_create_label (tmp, 1);
-- if (!IS_RELOC (tmp))
-- return yyerror ("Invalid expression in LOOP_BEGIN statement");
-- bfin_loop_beginend (tmp, 1);
-- (yyval.instr) = 0;
-- }
-- break;
--
-- case 212:
--#line 3602 "bfin-parse.y"
-- {
-- if (!IS_RELOC ((yyvsp[(2) - (2)].expr)))
-- return yyerror ("Invalid expression in LOOP_BEGIN statement");
--
-- bfin_loop_beginend ((yyvsp[(2) - (2)].expr), 1);
-- (yyval.instr) = 0;
-- }
-- break;
--
-- case 213:
--#line 3612 "bfin-parse.y"
-- {
-- Expr_Node_Value val;
-- val.i_value = (yyvsp[(2) - (2)].value);
-- Expr_Node *tmp = Expr_Node_Create (Expr_Node_Constant, val, NULL, NULL);
-- bfin_loop_attempt_create_label (tmp, 1);
-- if (!IS_RELOC (tmp))
-- return yyerror ("Invalid expression in LOOP_END statement");
-- bfin_loop_beginend (tmp, 0);
-- (yyval.instr) = 0;
-- }
-- break;
--
-- case 214:
--#line 3623 "bfin-parse.y"
-- {
-- if (!IS_RELOC ((yyvsp[(2) - (2)].expr)))
-- return yyerror ("Invalid expression in LOOP_END statement");
--
-- bfin_loop_beginend ((yyvsp[(2) - (2)].expr), 0);
-- (yyval.instr) = 0;
-- }
-- break;
--
-- case 215:
--#line 3634 "bfin-parse.y"
-- {
-- notethat ("psedoDEBUG: ABORT\n");
-- (yyval.instr) = bfin_gen_pseudodbg (3, 3, 0);
-- }
-- break;
--
-- case 216:
--#line 3640 "bfin-parse.y"
-- {
-- notethat ("pseudoDEBUG: DBG\n");
-- (yyval.instr) = bfin_gen_pseudodbg (3, 7, 0);
-- }
-- break;
--
-- case 217:
--#line 3645 "bfin-parse.y"
-- {
-- notethat ("pseudoDEBUG: DBG REG_A\n");
-- (yyval.instr) = bfin_gen_pseudodbg (3, IS_A1 ((yyvsp[(2) - (2)].reg)), 0);
-- }
-- break;
--
-- case 218:
--#line 3650 "bfin-parse.y"
-- {
-- notethat ("pseudoDEBUG: DBG allregs\n");
-- (yyval.instr) = bfin_gen_pseudodbg (0, (yyvsp[(2) - (2)].reg).regno & CODE_MASK, ((yyvsp[(2) - (2)].reg).regno & CLASS_MASK) >> 4);
-- }
-- break;
--
-- case 219:
--#line 3656 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(3) - (4)].reg)))
-- return yyerror ("Dregs expected");
-- notethat ("pseudoDEBUG: DBGCMPLX (dregs )\n");
-- (yyval.instr) = bfin_gen_pseudodbg (3, 6, ((yyvsp[(3) - (4)].reg).regno & CODE_MASK) >> 4);
-- }
-- break;
--
-- case 220:
--#line 3664 "bfin-parse.y"
-- {
-- notethat ("psedoDEBUG: DBGHALT\n");
-- (yyval.instr) = bfin_gen_pseudodbg (3, 5, 0);
-- }
-- break;
--
-- case 221:
--#line 3670 "bfin-parse.y"
-- {
-- notethat ("psedoDEBUG: HLT\n");
-- (yyval.instr) = bfin_gen_pseudodbg (3, 4, 0);
-- }
-- break;
--
-- case 222:
--#line 3676 "bfin-parse.y"
-- {
-- notethat ("pseudodbg_assert: DBGA (regs_lo/hi , uimm16 )\n");
-- (yyval.instr) = bfin_gen_pseudodbg_assert (IS_H ((yyvsp[(3) - (6)].reg)), &(yyvsp[(3) - (6)].reg), uimm16 ((yyvsp[(5) - (6)].expr)));
-- }
-- break;
--
-- case 223:
--#line 3682 "bfin-parse.y"
-- {
-- notethat ("pseudodbg_assert: DBGAH (regs , uimm16 )\n");
-- (yyval.instr) = bfin_gen_pseudodbg_assert (3, &(yyvsp[(3) - (6)].reg), uimm16 ((yyvsp[(5) - (6)].expr)));
-- }
-- break;
--
-- case 224:
--#line 3688 "bfin-parse.y"
-- {
-- notethat ("psedodbg_assert: DBGAL (regs , uimm16 )\n");
-- (yyval.instr) = bfin_gen_pseudodbg_assert (2, &(yyvsp[(3) - (6)].reg), uimm16 ((yyvsp[(5) - (6)].expr)));
-- }
-- break;
--
-- case 225:
--#line 3694 "bfin-parse.y"
-- {
-- if (!IS_UIMM ((yyvsp[(2) - (2)].expr), 8))
-- return yyerror ("Constant out of range");
-- notethat ("psedodbg_assert: OUTC uimm8\n");
-- (yyval.instr) = bfin_gen_pseudochr (uimm8 ((yyvsp[(2) - (2)].expr)));
-- }
-- break;
--
-- case 226:
--#line 3702 "bfin-parse.y"
-- {
-- if (!IS_DREG ((yyvsp[(2) - (2)].reg)))
-- return yyerror ("Dregs expected");
-- notethat ("psedodbg_assert: OUTC dreg\n");
-- (yyval.instr) = bfin_gen_pseudodbg (2, (yyvsp[(2) - (2)].reg).regno & CODE_MASK, 0);
-- }
-- break;
--
-- case 227:
--#line 3716 "bfin-parse.y"
-- {
-- (yyval.reg) = (yyvsp[(1) - (1)].reg);
-- }
-- break;
--
-- case 228:
--#line 3720 "bfin-parse.y"
-- {
-- (yyval.reg) = (yyvsp[(1) - (1)].reg);
-- }
-- break;
--
-- case 229:
--#line 3729 "bfin-parse.y"
-- {
-- (yyval.mod).MM = 0;
-- (yyval.mod).mod = 0;
-- }
-- break;
--
-- case 230:
--#line 3734 "bfin-parse.y"
-- {
-- (yyval.mod).MM = 1;
-- (yyval.mod).mod = (yyvsp[(4) - (5)].value);
-- }
-- break;
--
-- case 231:
--#line 3739 "bfin-parse.y"
-- {
-- (yyval.mod).MM = 1;
-- (yyval.mod).mod = (yyvsp[(2) - (5)].value);
-- }
-- break;
--
-- case 232:
--#line 3744 "bfin-parse.y"
-- {
-- (yyval.mod).MM = 0;
-- (yyval.mod).mod = (yyvsp[(2) - (3)].value);
-- }
-- break;
--
-- case 233:
--#line 3749 "bfin-parse.y"
-- {
-- (yyval.mod).MM = 1;
-- (yyval.mod).mod = 0;
-- }
-- break;
--
-- case 234:
--#line 3756 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 1;
-- }
-- break;
--
-- case 235:
--#line 3760 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 0;
-- }
-- break;
--
-- case 236:
--#line 3766 "bfin-parse.y"
-- {
-- (yyval.modcodes).s0 = 0;
-- (yyval.modcodes).x0 = 0;
-- }
-- break;
--
-- case 237:
--#line 3771 "bfin-parse.y"
-- {
-- (yyval.modcodes).s0 = 1;
-- (yyval.modcodes).x0 = 0;
-- }
-- break;
--
-- case 238:
--#line 3776 "bfin-parse.y"
-- {
-- (yyval.modcodes).s0 = 0;
-- (yyval.modcodes).x0 = 1;
-- }
-- break;
--
-- case 239:
--#line 3781 "bfin-parse.y"
-- {
-- (yyval.modcodes).s0 = 1;
-- (yyval.modcodes).x0 = 1;
-- }
-- break;
--
-- case 240:
--#line 3789 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 1;
-- }
-- break;
--
-- case 241:
--#line 3793 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 0;
-- }
-- break;
--
-- case 242:
--#line 3799 "bfin-parse.y"
-- {
-- (yyval.modcodes).s0 = 0;
-- (yyval.modcodes).x0 = 0;
-- }
-- break;
--
-- case 243:
--#line 3804 "bfin-parse.y"
-- {
-- (yyval.modcodes).s0 = (yyvsp[(2) - (3)].modcodes).s0;
-- (yyval.modcodes).x0 = (yyvsp[(2) - (3)].modcodes).x0;
-- }
-- break;
--
-- case 244:
--#line 3811 "bfin-parse.y"
-- {
-- (yyval.modcodes).s0 = 0;
-- (yyval.modcodes).x0 = 0;
-- (yyval.modcodes).aop = 0;
-- }
-- break;
--
-- case 245:
--#line 3817 "bfin-parse.y"
-- {
-- (yyval.modcodes).s0 = 0;
-- (yyval.modcodes).x0 = 0;
-- (yyval.modcodes).aop = 1;
-- }
-- break;
--
-- case 246:
--#line 3823 "bfin-parse.y"
-- {
-- (yyval.modcodes).s0 = 1;
-- (yyval.modcodes).x0 = 0;
-- (yyval.modcodes).aop = 1;
-- }
-- break;
--
-- case 247:
--#line 3831 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 0;
-- (yyval.modcodes).s0 = 0;
-- (yyval.modcodes).x0 = 0;
-- }
-- break;
--
-- case 248:
--#line 3837 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 2 + (yyvsp[(2) - (3)].r0).r0;
-- (yyval.modcodes).s0 = 0;
-- (yyval.modcodes).x0 = 0;
-- }
-- break;
--
-- case 249:
--#line 3843 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 0;
-- (yyval.modcodes).s0 = (yyvsp[(2) - (3)].modcodes).s0;
-- (yyval.modcodes).x0 = (yyvsp[(2) - (3)].modcodes).x0;
-- }
-- break;
--
-- case 250:
--#line 3849 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 2 + (yyvsp[(2) - (5)].r0).r0;
-- (yyval.modcodes).s0 = (yyvsp[(4) - (5)].modcodes).s0;
-- (yyval.modcodes).x0 = (yyvsp[(4) - (5)].modcodes).x0;
-- }
-- break;
--
-- case 251:
--#line 3855 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 2 + (yyvsp[(4) - (5)].r0).r0;
-- (yyval.modcodes).s0 = (yyvsp[(2) - (5)].modcodes).s0;
-- (yyval.modcodes).x0 = (yyvsp[(2) - (5)].modcodes).x0;
-- }
-- break;
--
-- case 252:
--#line 3863 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 0;
-- }
-- break;
--
-- case 253:
--#line 3867 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 0;
-- }
-- break;
--
-- case 254:
--#line 3871 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 1;
-- }
-- break;
--
-- case 255:
--#line 3877 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 0;
-- }
-- break;
--
-- case 256:
--#line 3881 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 0;
-- }
-- break;
--
-- case 257:
--#line 3885 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 1;
-- }
-- break;
--
-- case 258:
--#line 3891 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 0;
-- (yyval.modcodes).s0 = 0;
-- (yyval.modcodes).aop = 0;
-- }
-- break;
--
-- case 259:
--#line 3897 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 0;
-- (yyval.modcodes).s0 = 0;
-- (yyval.modcodes).aop = 3;
-- }
-- break;
--
-- case 260:
--#line 3903 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 0;
-- (yyval.modcodes).s0 = 1;
-- (yyval.modcodes).aop = 3;
-- }
-- break;
--
-- case 261:
--#line 3909 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 1;
-- (yyval.modcodes).s0 = 0;
-- (yyval.modcodes).aop = 3;
-- }
-- break;
--
-- case 262:
--#line 3915 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 1;
-- (yyval.modcodes).s0 = 1;
-- }
-- break;
--
-- case 263:
--#line 3920 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 1;
-- (yyval.modcodes).s0 = 1;
-- }
-- break;
--
-- case 264:
--#line 3927 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 0;
-- }
-- break;
--
-- case 265:
--#line 3931 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 1;
-- }
-- break;
--
-- case 266:
--#line 3937 "bfin-parse.y"
-- {
-- (yyval.modcodes).s0 = 0;
-- }
-- break;
--
-- case 267:
--#line 3941 "bfin-parse.y"
-- {
-- (yyval.modcodes).s0 = 1;
-- }
-- break;
--
-- case 268:
--#line 3948 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 1;
-- }
-- break;
--
-- case 269:
--#line 3952 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 0;
-- }
-- break;
--
-- case 270:
--#line 3956 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 3;
-- }
-- break;
--
-- case 271:
--#line 3960 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 2;
-- }
-- break;
--
-- case 272:
--#line 3966 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 0;
-- }
-- break;
--
-- case 273:
--#line 3970 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 1;
-- }
-- break;
--
-- case 274:
--#line 3977 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 0;
-- (yyval.modcodes).s0 = 1;
-- }
-- break;
--
-- case 275:
--#line 3982 "bfin-parse.y"
-- {
-- if ((yyvsp[(2) - (3)].value) != M_T)
-- return yyerror ("Bad modifier");
-- (yyval.modcodes).r0 = 1;
-- (yyval.modcodes).s0 = 0;
-- }
-- break;
--
-- case 276:
--#line 3989 "bfin-parse.y"
-- {
-- if ((yyvsp[(2) - (5)].value) != M_T)
-- return yyerror ("Bad modifier");
-- (yyval.modcodes).r0 = 1;
-- (yyval.modcodes).s0 = 1;
-- }
-- break;
--
-- case 277:
--#line 3996 "bfin-parse.y"
-- {
-- if ((yyvsp[(4) - (5)].value) != M_T)
-- return yyerror ("Bad modifier");
-- (yyval.modcodes).r0 = 1;
-- (yyval.modcodes).s0 = 1;
-- }
-- break;
--
-- case 278:
--#line 4008 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 0;
-- }
-- break;
--
-- case 279:
--#line 4012 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 1;
-- }
-- break;
--
-- case 280:
--#line 4016 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 2;
-- }
-- break;
--
-- case 281:
--#line 4022 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 0;
-- }
-- break;
--
-- case 282:
--#line 4026 "bfin-parse.y"
-- {
-- if ((yyvsp[(2) - (3)].value) == M_W32)
-- (yyval.r0).r0 = 1;
-- else
-- return yyerror ("Only (W32) allowed");
-- }
-- break;
--
-- case 283:
--#line 4035 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 1;
-- }
-- break;
--
-- case 284:
--#line 4039 "bfin-parse.y"
-- {
-- if ((yyvsp[(2) - (3)].value) == M_IU)
-- (yyval.r0).r0 = 3;
-- else
-- return yyerror ("(IU) expected");
-- }
-- break;
--
-- case 285:
--#line 4048 "bfin-parse.y"
-- {
-- (yyval.reg) = (yyvsp[(3) - (4)].reg);
-- }
-- break;
--
-- case 286:
--#line 4054 "bfin-parse.y"
-- {
-- (yyval.reg) = (yyvsp[(2) - (4)].reg);
-- }
-- break;
--
-- case 287:
--#line 4063 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 1;
-- }
-- break;
--
-- case 288:
--#line 4067 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 0;
-- }
-- break;
--
-- case 289:
--#line 4074 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 0;
-- }
-- break;
--
-- case 290:
--#line 4078 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 1;
-- }
-- break;
--
-- case 291:
--#line 4082 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 2;
-- }
-- break;
--
-- case 292:
--#line 4086 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 3;
-- }
-- break;
--
-- case 293:
--#line 4093 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 0;
-- }
-- break;
--
-- case 294:
--#line 4097 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 1;
-- }
-- break;
--
-- case 295:
--#line 4104 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 1; /* HL. */
-- (yyval.modcodes).s0 = 0; /* s. */
-- (yyval.modcodes).x0 = 0; /* x. */
-- (yyval.modcodes).aop = 0; /* aop. */
-- }
-- break;
--
-- case 296:
--#line 4112 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 1; /* HL. */
-- (yyval.modcodes).s0 = 0; /* s. */
-- (yyval.modcodes).x0 = 0; /* x. */
-- (yyval.modcodes).aop = 1; /* aop. */
-- }
-- break;
--
-- case 297:
--#line 4120 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 0; /* HL. */
-- (yyval.modcodes).s0 = 0; /* s. */
-- (yyval.modcodes).x0 = 0; /* x. */
-- (yyval.modcodes).aop = 0; /* aop. */
-- }
-- break;
--
-- case 298:
--#line 4128 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 0; /* HL. */
-- (yyval.modcodes).s0 = 0; /* s. */
-- (yyval.modcodes).x0 = 0; /* x. */
-- (yyval.modcodes).aop = 1;
-- }
-- break;
--
-- case 299:
--#line 4136 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 1; /* HL. */
-- (yyval.modcodes).s0 = 1; /* s. */
-- (yyval.modcodes).x0 = 0; /* x. */
-- (yyval.modcodes).aop = 0; /* aop. */
-- }
-- break;
--
-- case 300:
--#line 4143 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 1; /* HL. */
-- (yyval.modcodes).s0 = 1; /* s. */
-- (yyval.modcodes).x0 = 0; /* x. */
-- (yyval.modcodes).aop = 1; /* aop. */
-- }
-- break;
--
-- case 301:
--#line 4150 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 0; /* HL. */
-- (yyval.modcodes).s0 = 1; /* s. */
-- (yyval.modcodes).x0 = 0; /* x. */
-- (yyval.modcodes).aop = 0; /* aop. */
-- }
-- break;
--
-- case 302:
--#line 4158 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 0; /* HL. */
-- (yyval.modcodes).s0 = 1; /* s. */
-- (yyval.modcodes).x0 = 0; /* x. */
-- (yyval.modcodes).aop = 1; /* aop. */
-- }
-- break;
--
-- case 303:
--#line 4168 "bfin-parse.y"
-- {
-- (yyval.modcodes).s0 = 0; /* s. */
-- (yyval.modcodes).x0 = 0; /* HL. */
-- }
-- break;
--
-- case 304:
--#line 4173 "bfin-parse.y"
-- {
-- (yyval.modcodes).s0 = 0; /* s. */
-- (yyval.modcodes).x0 = 1; /* HL. */
-- }
-- break;
--
-- case 305:
--#line 4178 "bfin-parse.y"
-- {
-- (yyval.modcodes).s0 = 1; /* s. */
-- (yyval.modcodes).x0 = 0; /* HL. */
-- }
-- break;
--
-- case 306:
--#line 4183 "bfin-parse.y"
-- {
-- (yyval.modcodes).s0 = 1; /* s. */
-- (yyval.modcodes).x0 = 1; /* HL. */
-- }
-- break;
--
-- case 307:
--#line 4190 "bfin-parse.y"
-- {
-- (yyval.modcodes).x0 = 2;
-- }
-- break;
--
-- case 308:
--#line 4194 "bfin-parse.y"
-- {
-- (yyval.modcodes).x0 = 0;
-- }
-- break;
--
-- case 309:
--#line 4198 "bfin-parse.y"
-- {
-- (yyval.modcodes).x0 = 1;
-- }
-- break;
--
-- case 310:
--#line 4207 "bfin-parse.y"
-- {
-- (yyval.reg) = (yyvsp[(1) - (2)].reg);
-- }
-- break;
--
-- case 311:
--#line 4214 "bfin-parse.y"
-- {
-- (yyval.reg) = (yyvsp[(1) - (2)].reg);
-- }
-- break;
--
-- case 312:
--#line 4221 "bfin-parse.y"
-- {
-- (yyval.reg) = (yyvsp[(1) - (2)].reg);
-- }
-- break;
--
-- case 313:
--#line 4228 "bfin-parse.y"
-- {
-- if (IS_A1 ((yyvsp[(3) - (3)].reg)) && IS_EVEN ((yyvsp[(1) - (3)].reg)))
-- return yyerror ("Cannot move A1 to even register");
-- else if (!IS_A1 ((yyvsp[(3) - (3)].reg)) && !IS_EVEN ((yyvsp[(1) - (3)].reg)))
-- return yyerror ("Cannot move A0 to odd register");
--
-- (yyval.macfunc).w = 1;
-- (yyval.macfunc).P = 1;
-- (yyval.macfunc).n = IS_A1 ((yyvsp[(3) - (3)].reg));
-- (yyval.macfunc).op = 3;
-- (yyval.macfunc).dst = (yyvsp[(1) - (3)].reg);
-- (yyval.macfunc).s0.regno = 0;
-- (yyval.macfunc).s1.regno = 0;
-- }
-- break;
--
-- case 314:
--#line 4243 "bfin-parse.y"
-- {
-- (yyval.macfunc) = (yyvsp[(1) - (1)].macfunc);
-- (yyval.macfunc).w = 0; (yyval.macfunc).P = 0;
-- (yyval.macfunc).dst.regno = 0;
-- }
-- break;
--
-- case 315:
--#line 4249 "bfin-parse.y"
-- {
-- if ((yyvsp[(4) - (5)].macfunc).n && IS_EVEN ((yyvsp[(1) - (5)].reg)))
-- return yyerror ("Cannot move A1 to even register");
-- else if (!(yyvsp[(4) - (5)].macfunc).n && !IS_EVEN ((yyvsp[(1) - (5)].reg)))
-- return yyerror ("Cannot move A0 to odd register");
--
-- (yyval.macfunc) = (yyvsp[(4) - (5)].macfunc);
-- (yyval.macfunc).w = 1;
-- (yyval.macfunc).P = 1;
-- (yyval.macfunc).dst = (yyvsp[(1) - (5)].reg);
-- }
-- break;
--
-- case 316:
--#line 4262 "bfin-parse.y"
-- {
-- if ((yyvsp[(4) - (5)].macfunc).n && !IS_H ((yyvsp[(1) - (5)].reg)))
-- return yyerror ("Cannot move A1 to low half of register");
-- else if (!(yyvsp[(4) - (5)].macfunc).n && IS_H ((yyvsp[(1) - (5)].reg)))
-- return yyerror ("Cannot move A0 to high half of register");
--
-- (yyval.macfunc) = (yyvsp[(4) - (5)].macfunc);
-- (yyval.macfunc).w = 1;
-- (yyval.macfunc).P = 0;
-- (yyval.macfunc).dst = (yyvsp[(1) - (5)].reg);
-- }
-- break;
--
-- case 317:
--#line 4275 "bfin-parse.y"
-- {
-- if (IS_A1 ((yyvsp[(3) - (3)].reg)) && !IS_H ((yyvsp[(1) - (3)].reg)))
-- return yyerror ("Cannot move A1 to low half of register");
-- else if (!IS_A1 ((yyvsp[(3) - (3)].reg)) && IS_H ((yyvsp[(1) - (3)].reg)))
-- return yyerror ("Cannot move A0 to high half of register");
--
-- (yyval.macfunc).w = 1;
-- (yyval.macfunc).P = 0;
-- (yyval.macfunc).n = IS_A1 ((yyvsp[(3) - (3)].reg));
-- (yyval.macfunc).op = 3;
-- (yyval.macfunc).dst = (yyvsp[(1) - (3)].reg);
-- (yyval.macfunc).s0.regno = 0;
-- (yyval.macfunc).s1.regno = 0;
-- }
-- break;
--
-- case 318:
--#line 4293 "bfin-parse.y"
-- {
-- (yyval.macfunc).n = IS_A1 ((yyvsp[(1) - (2)].reg));
-- (yyval.macfunc).op = 0;
-- (yyval.macfunc).s0 = (yyvsp[(2) - (2)].macfunc).s0;
-- (yyval.macfunc).s1 = (yyvsp[(2) - (2)].macfunc).s1;
-- }
-- break;
--
-- case 319:
--#line 4300 "bfin-parse.y"
-- {
-- (yyval.macfunc).n = IS_A1 ((yyvsp[(1) - (2)].reg));
-- (yyval.macfunc).op = 1;
-- (yyval.macfunc).s0 = (yyvsp[(2) - (2)].macfunc).s0;
-- (yyval.macfunc).s1 = (yyvsp[(2) - (2)].macfunc).s1;
-- }
-- break;
--
-- case 320:
--#line 4307 "bfin-parse.y"
-- {
-- (yyval.macfunc).n = IS_A1 ((yyvsp[(1) - (2)].reg));
-- (yyval.macfunc).op = 2;
-- (yyval.macfunc).s0 = (yyvsp[(2) - (2)].macfunc).s0;
-- (yyval.macfunc).s1 = (yyvsp[(2) - (2)].macfunc).s1;
-- }
-- break;
--
-- case 321:
--#line 4317 "bfin-parse.y"
-- {
-- if (IS_DREG ((yyvsp[(1) - (3)].reg)) && IS_DREG ((yyvsp[(3) - (3)].reg)))
-- {
-- (yyval.macfunc).s0 = (yyvsp[(1) - (3)].reg);
-- (yyval.macfunc).s1 = (yyvsp[(3) - (3)].reg);
-- }
-- else
-- return yyerror ("Dregs expected");
-- }
-- break;
--
-- case 322:
--#line 4330 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 0;
-- }
-- break;
--
-- case 323:
--#line 4334 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 1;
-- }
-- break;
--
-- case 324:
--#line 4338 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 2;
-- }
-- break;
--
-- case 325:
--#line 4342 "bfin-parse.y"
-- {
-- (yyval.r0).r0 = 3;
-- }
-- break;
--
-- case 326:
--#line 4349 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = (yyvsp[(3) - (3)].reg).regno;
-- (yyval.modcodes).x0 = (yyvsp[(2) - (3)].r0).r0;
-- (yyval.modcodes).s0 = 0;
-- }
-- break;
--
-- case 327:
--#line 4355 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 0x18;
-- (yyval.modcodes).x0 = (yyvsp[(2) - (3)].r0).r0;
-- (yyval.modcodes).s0 = 0;
-- }
-- break;
--
-- case 328:
--#line 4361 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = (yyvsp[(1) - (3)].reg).regno;
-- (yyval.modcodes).x0 = (yyvsp[(2) - (3)].r0).r0;
-- (yyval.modcodes).s0 = 1;
-- }
-- break;
--
-- case 329:
--#line 4367 "bfin-parse.y"
-- {
-- (yyval.modcodes).r0 = 0x18;
-- (yyval.modcodes).x0 = (yyvsp[(2) - (3)].r0).r0;
-- (yyval.modcodes).s0 = 1;
-- }
-- break;
--
-- case 330:
--#line 4377 "bfin-parse.y"
-- {
-- Expr_Node_Value val;
-- val.s_value = S_GET_NAME((yyvsp[(1) - (1)].symbol));
-- (yyval.expr) = Expr_Node_Create (Expr_Node_Reloc, val, NULL, NULL);
-- }
-- break;
--
-- case 331:
--#line 4386 "bfin-parse.y"
-- { (yyval.value) = BFD_RELOC_BFIN_GOT; }
-- break;
--
-- case 332:
--#line 4388 "bfin-parse.y"
-- { (yyval.value) = BFD_RELOC_BFIN_GOT17M4; }
-- break;
--
-- case 333:
--#line 4390 "bfin-parse.y"
-- { (yyval.value) = BFD_RELOC_BFIN_FUNCDESC_GOT17M4; }
-- break;
--
-- case 334:
--#line 4394 "bfin-parse.y"
-- {
-- Expr_Node_Value val;
-- val.i_value = (yyvsp[(3) - (3)].value);
-- (yyval.expr) = Expr_Node_Create (Expr_Node_GOT_Reloc, val, (yyvsp[(1) - (3)].expr), NULL);
-- }
-- break;
--
-- case 335:
--#line 4402 "bfin-parse.y"
-- {
-- (yyval.expr) = (yyvsp[(1) - (1)].expr);
-- }
-- break;
--
-- case 336:
--#line 4406 "bfin-parse.y"
-- {
-- (yyval.expr) = (yyvsp[(1) - (1)].expr);
-- }
-- break;
--
-- case 337:
--#line 4413 "bfin-parse.y"
-- {
-- (yyval.expr) = (yyvsp[(1) - (3)].expr);
-- }
-- break;
--
-- case 338:
--#line 4419 "bfin-parse.y"
-- {
-- Expr_Node_Value val;
-- val.i_value = (yyvsp[(1) - (1)].value);
-- (yyval.expr) = Expr_Node_Create (Expr_Node_Constant, val, NULL, NULL);
-- }
-- break;
--
-- case 339:
--#line 4425 "bfin-parse.y"
-- {
-- (yyval.expr) = (yyvsp[(1) - (1)].expr);
-- }
-- break;
--
-- case 340:
--#line 4429 "bfin-parse.y"
-- {
-- (yyval.expr) = (yyvsp[(2) - (3)].expr);
-- }
-- break;
--
-- case 341:
--#line 4433 "bfin-parse.y"
-- {
-- (yyval.expr) = unary (Expr_Op_Type_COMP, (yyvsp[(2) - (2)].expr));
-- }
-- break;
--
-- case 342:
--#line 4437 "bfin-parse.y"
-- {
-- (yyval.expr) = unary (Expr_Op_Type_NEG, (yyvsp[(2) - (2)].expr));
-- }
-- break;
--
-- case 343:
--#line 4443 "bfin-parse.y"
-- {
-- (yyval.expr) = (yyvsp[(1) - (1)].expr);
-- }
-- break;
--
-- case 344:
--#line 4449 "bfin-parse.y"
-- {
-- (yyval.expr) = binary (Expr_Op_Type_Mult, (yyvsp[(1) - (3)].expr), (yyvsp[(3) - (3)].expr));
-- }
-- break;
--
-- case 345:
--#line 4453 "bfin-parse.y"
-- {
-- (yyval.expr) = binary (Expr_Op_Type_Div, (yyvsp[(1) - (3)].expr), (yyvsp[(3) - (3)].expr));
-- }
-- break;
--
-- case 346:
--#line 4457 "bfin-parse.y"
-- {
-- (yyval.expr) = binary (Expr_Op_Type_Mod, (yyvsp[(1) - (3)].expr), (yyvsp[(3) - (3)].expr));
-- }
-- break;
--
-- case 347:
--#line 4461 "bfin-parse.y"
-- {
-- (yyval.expr) = binary (Expr_Op_Type_Add, (yyvsp[(1) - (3)].expr), (yyvsp[(3) - (3)].expr));
-- }
-- break;
--
-- case 348:
--#line 4465 "bfin-parse.y"
-- {
-- (yyval.expr) = binary (Expr_Op_Type_Sub, (yyvsp[(1) - (3)].expr), (yyvsp[(3) - (3)].expr));
-- }
-- break;
--
-- case 349:
--#line 4469 "bfin-parse.y"
-- {
-- (yyval.expr) = binary (Expr_Op_Type_Lshift, (yyvsp[(1) - (3)].expr), (yyvsp[(3) - (3)].expr));
-- }
-- break;
--
-- case 350:
--#line 4473 "bfin-parse.y"
-- {
-- (yyval.expr) = binary (Expr_Op_Type_Rshift, (yyvsp[(1) - (3)].expr), (yyvsp[(3) - (3)].expr));
-- }
-- break;
--
-- case 351:
--#line 4477 "bfin-parse.y"
-- {
-- (yyval.expr) = binary (Expr_Op_Type_BAND, (yyvsp[(1) - (3)].expr), (yyvsp[(3) - (3)].expr));
-- }
-- break;
--
-- case 352:
--#line 4481 "bfin-parse.y"
-- {
-- (yyval.expr) = binary (Expr_Op_Type_LOR, (yyvsp[(1) - (3)].expr), (yyvsp[(3) - (3)].expr));
-- }
-- break;
--
-- case 353:
--#line 4485 "bfin-parse.y"
-- {
-- (yyval.expr) = binary (Expr_Op_Type_BOR, (yyvsp[(1) - (3)].expr), (yyvsp[(3) - (3)].expr));
-- }
-- break;
--
-- case 354:
--#line 4489 "bfin-parse.y"
-- {
-- (yyval.expr) = (yyvsp[(1) - (1)].expr);
-- }
-- break;
--
--
--/* Line 1267 of yacc.c. */
--#line 7561 "bfin-parse.c"
-- default: break;
-- }
-- YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
--
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
--
-- *++yyvsp = yyval;
--
--
-- /* Now `shift' the result of the reduction. Determine what state
-- that goes to, based on the state we popped back to and the rule
-- number reduced by. */
--
-- yyn = yyr1[yyn];
--
-- yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
-- if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
-- yystate = yytable[yystate];
-- else
-- yystate = yydefgoto[yyn - YYNTOKENS];
--
-- goto yynewstate;
--
--
--/*------------------------------------.
--| yyerrlab -- here on detecting error |
--`------------------------------------*/
--yyerrlab:
-- /* If not already recovering from an error, report this error. */
-- if (!yyerrstatus)
-- {
-- ++yynerrs;
--#if ! YYERROR_VERBOSE
-- yyerror (YY_("syntax error"));
--#else
-- {
-- YYSIZE_T yysize = yysyntax_error (0, yystate, yychar);
-- if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM)
-- {
-- YYSIZE_T yyalloc = 2 * yysize;
-- if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM))
-- yyalloc = YYSTACK_ALLOC_MAXIMUM;
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
-- yymsg = (char *) YYSTACK_ALLOC (yyalloc);
-- if (yymsg)
-- yymsg_alloc = yyalloc;
-- else
-- {
-- yymsg = yymsgbuf;
-- yymsg_alloc = sizeof yymsgbuf;
-- }
-- }
--
-- if (0 < yysize && yysize <= yymsg_alloc)
-- {
-- (void) yysyntax_error (yymsg, yystate, yychar);
-- yyerror (yymsg);
-- }
-- else
-- {
-- yyerror (YY_("syntax error"));
-- if (yysize != 0)
-- goto yyexhaustedlab;
-- }
-- }
--#endif
-- }
--
--
--
-- if (yyerrstatus == 3)
-- {
-- /* If just tried and failed to reuse look-ahead token after an
-- error, discard it. */
--
-- if (yychar <= YYEOF)
-- {
-- /* Return failure if at end of input. */
-- if (yychar == YYEOF)
-- YYABORT;
-- }
-- else
-- {
-- yydestruct ("Error: discarding",
-- yytoken, &yylval);
-- yychar = YYEMPTY;
-- }
-- }
--
-- /* Else will try to reuse look-ahead token after shifting the error
-- token. */
-- goto yyerrlab1;
--
--
--/*---------------------------------------------------.
--| yyerrorlab -- error raised explicitly by YYERROR. |
--`---------------------------------------------------*/
--yyerrorlab:
--
-- /* Pacify compilers like GCC when the user code never invokes
-- YYERROR and the label yyerrorlab therefore never appears in user
-- code. */
-- if (/*CONSTCOND*/ 0)
-- goto yyerrorlab;
--
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYERROR. */
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
-- yystate = *yyssp;
-- goto yyerrlab1;
--
--
--/*-------------------------------------------------------------.
--| yyerrlab1 -- common code for both syntax error and YYERROR. |
--`-------------------------------------------------------------*/
--yyerrlab1:
-- yyerrstatus = 3; /* Each real token shifted decrements this. */
--
-- for (;;)
-- {
-- yyn = yypact[yystate];
-- if (yyn != YYPACT_NINF)
-- {
-- yyn += YYTERROR;
-- if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
-- {
-- yyn = yytable[yyn];
-- if (0 < yyn)
-- break;
-- }
-- }
--
-- /* Pop the current state because it cannot handle the error token. */
-- if (yyssp == yyss)
-- YYABORT;
--
--
-- yydestruct ("Error: popping",
-- yystos[yystate], yyvsp);
-- YYPOPSTACK (1);
-- yystate = *yyssp;
-- YY_STACK_PRINT (yyss, yyssp);
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- *++yyvsp = yylval;
--
--
-- /* Shift the error token. */
-- YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
--
-- yystate = yyn;
-- goto yynewstate;
--
--
--/*-------------------------------------.
--| yyacceptlab -- YYACCEPT comes here. |
--`-------------------------------------*/
--yyacceptlab:
-- yyresult = 0;
-- goto yyreturn;
--
--/*-----------------------------------.
--| yyabortlab -- YYABORT comes here. |
--`-----------------------------------*/
--yyabortlab:
-- yyresult = 1;
-- goto yyreturn;
--
--#ifndef yyoverflow
--/*-------------------------------------------------.
--| yyexhaustedlab -- memory exhaustion comes here. |
--`-------------------------------------------------*/
--yyexhaustedlab:
-- yyerror (YY_("memory exhausted"));
-- yyresult = 2;
-- /* Fall through. */
--#endif
--
--yyreturn:
-- if (yychar != YYEOF && yychar != YYEMPTY)
-- yydestruct ("Cleanup: discarding lookahead",
-- yytoken, &yylval);
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYABORT or YYACCEPT. */
-- YYPOPSTACK (yylen);
-- YY_STACK_PRINT (yyss, yyssp);
-- while (yyssp != yyss)
-- {
-- yydestruct ("Cleanup: popping",
-- yystos[*yyssp], yyvsp);
-- YYPOPSTACK (1);
-- }
--#ifndef yyoverflow
-- if (yyss != yyssa)
-- YYSTACK_FREE (yyss);
--#endif
--#if YYERROR_VERBOSE
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
--#endif
-- /* Make sure YYID is used. */
-- return YYID (yyresult);
--}
--
--
--#line 4495 "bfin-parse.y"
--
--
--EXPR_T
--mkexpr (int x, SYMBOL_T s)
--{
-- EXPR_T e = (EXPR_T) ALLOCATE (sizeof (struct expression_cell));
-- e->value = x;
-- EXPR_SYMBOL(e) = s;
-- return e;
--}
--
--static int
--value_match (Expr_Node *exp, int sz, int sign, int mul, int issigned)
--{
-- int umax = (1 << sz) - 1;
-- int min = -1 << (sz - 1);
-- int max = (1 << (sz - 1)) - 1;
--
-- int v = (EXPR_VALUE (exp)) & 0xffffffff;
--
-- if ((v % mul) != 0)
-- {
-- error ("%s:%d: Value Error -- Must align to %d\n", __FILE__, __LINE__, mul);
-- return 0;
-- }
--
-- v /= mul;
--
-- if (sign)
-- v = -v;
--
-- if (issigned)
-- {
-- if (v >= min && v <= max) return 1;
--
--#ifdef DEBUG
-- fprintf(stderr, "signed value %lx out of range\n", v * mul);
--#endif
-- return 0;
-- }
-- if (v <= umax && v >= 0)
-- return 1;
--#ifdef DEBUG
-- fprintf(stderr, "unsigned value %lx out of range\n", v * mul);
--#endif
-- return 0;
--}
--
--/* Return the expression structure that allows symbol operations.
-- If the left and right children are constants, do the operation. */
--static Expr_Node *
--binary (Expr_Op_Type op, Expr_Node *x, Expr_Node *y)
--{
-- Expr_Node_Value val;
--
-- if (x->type == Expr_Node_Constant && y->type == Expr_Node_Constant)
-- {
-- switch (op)
-- {
-- case Expr_Op_Type_Add:
-- x->value.i_value += y->value.i_value;
-- break;
-- case Expr_Op_Type_Sub:
-- x->value.i_value -= y->value.i_value;
-- break;
-- case Expr_Op_Type_Mult:
-- x->value.i_value *= y->value.i_value;
-- break;
-- case Expr_Op_Type_Div:
-- if (y->value.i_value == 0)
-- error ("Illegal Expression: Division by zero.");
-- else
-- x->value.i_value /= y->value.i_value;
-- break;
-- case Expr_Op_Type_Mod:
-- x->value.i_value %= y->value.i_value;
-- break;
-- case Expr_Op_Type_Lshift:
-- x->value.i_value <<= y->value.i_value;
-- break;
-- case Expr_Op_Type_Rshift:
-- x->value.i_value >>= y->value.i_value;
-- break;
-- case Expr_Op_Type_BAND:
-- x->value.i_value &= y->value.i_value;
-- break;
-- case Expr_Op_Type_BOR:
-- x->value.i_value |= y->value.i_value;
-- break;
-- case Expr_Op_Type_BXOR:
-- x->value.i_value ^= y->value.i_value;
-- break;
-- case Expr_Op_Type_LAND:
-- x->value.i_value = x->value.i_value && y->value.i_value;
-- break;
-- case Expr_Op_Type_LOR:
-- x->value.i_value = x->value.i_value || y->value.i_value;
-- break;
--
-- default:
-- error ("%s:%d: Internal assembler error\n", __FILE__, __LINE__);
-- }
-- return x;
-- }
-- /* Canonicalize order to EXPR OP CONSTANT. */
-- if (x->type == Expr_Node_Constant)
-- {
-- Expr_Node *t = x;
-- x = y;
-- y = t;
-- }
-- /* Canonicalize subtraction of const to addition of negated const. */
-- if (op == Expr_Op_Type_Sub && y->type == Expr_Node_Constant)
-- {
-- op = Expr_Op_Type_Add;
-- y->value.i_value = -y->value.i_value;
-- }
-- if (y->type == Expr_Node_Constant && x->type == Expr_Node_Binop
-- && x->Right_Child->type == Expr_Node_Constant)
-- {
-- if (op == x->value.op_value && x->value.op_value == Expr_Op_Type_Add)
-- {
-- x->Right_Child->value.i_value += y->value.i_value;
-- return x;
-- }
-- }
--
-- /* Create a new expression structure. */
-- val.op_value = op;
-- return Expr_Node_Create (Expr_Node_Binop, val, x, y);
--}
--
--static Expr_Node *
--unary (Expr_Op_Type op, Expr_Node *x)
--{
-- if (x->type == Expr_Node_Constant)
-- {
-- switch (op)
-- {
-- case Expr_Op_Type_NEG:
-- x->value.i_value = -x->value.i_value;
-- break;
-- case Expr_Op_Type_COMP:
-- x->value.i_value = ~x->value.i_value;
-- break;
-- default:
-- error ("%s:%d: Internal assembler error\n", __FILE__, __LINE__);
-- }
-- return x;
-- }
-- else
-- {
-- /* Create a new expression structure. */
-- Expr_Node_Value val;
-- val.op_value = op;
-- return Expr_Node_Create (Expr_Node_Unop, val, x, NULL);
-- }
--}
--
--int debug_codeselection = 0;
--static void
--notethat (char *format, ...)
--{
-- va_list ap;
-- va_start (ap, format);
-- if (debug_codeselection)
-- {
-- vfprintf (errorf, format, ap);
-- }
-- va_end (ap);
--}
--
--#ifdef TEST
--main (int argc, char **argv)
--{
-- yyparse();
--}
--#endif
--
--
-diff -Nur binutils-2.24.orig/gas/bfin-parse.h binutils-2.24/gas/bfin-parse.h
---- binutils-2.24.orig/gas/bfin-parse.h 2013-11-18 09:49:28.000000000 +0100
-+++ binutils-2.24/gas/bfin-parse.h 1970-01-01 01:00:00.000000000 +0100
-@@ -1,414 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton interface for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- BYTEOP16P = 258,
-- BYTEOP16M = 259,
-- BYTEOP1P = 260,
-- BYTEOP2P = 261,
-- BYTEOP3P = 262,
-- BYTEUNPACK = 263,
-- BYTEPACK = 264,
-- PACK = 265,
-- SAA = 266,
-- ALIGN8 = 267,
-- ALIGN16 = 268,
-- ALIGN24 = 269,
-- VIT_MAX = 270,
-- EXTRACT = 271,
-- DEPOSIT = 272,
-- EXPADJ = 273,
-- SEARCH = 274,
-- ONES = 275,
-- SIGN = 276,
-- SIGNBITS = 277,
-- LINK = 278,
-- UNLINK = 279,
-- REG = 280,
-- PC = 281,
-- CCREG = 282,
-- BYTE_DREG = 283,
-- REG_A_DOUBLE_ZERO = 284,
-- REG_A_DOUBLE_ONE = 285,
-- A_ZERO_DOT_L = 286,
-- A_ZERO_DOT_H = 287,
-- A_ONE_DOT_L = 288,
-- A_ONE_DOT_H = 289,
-- HALF_REG = 290,
-- NOP = 291,
-- RTI = 292,
-- RTS = 293,
-- RTX = 294,
-- RTN = 295,
-- RTE = 296,
-- HLT = 297,
-- IDLE = 298,
-- STI = 299,
-- CLI = 300,
-- CSYNC = 301,
-- SSYNC = 302,
-- EMUEXCPT = 303,
-- RAISE = 304,
-- EXCPT = 305,
-- LSETUP = 306,
-- LOOP = 307,
-- LOOP_BEGIN = 308,
-- LOOP_END = 309,
-- DISALGNEXCPT = 310,
-- JUMP = 311,
-- JUMP_DOT_S = 312,
-- JUMP_DOT_L = 313,
-- CALL = 314,
-- ABORT = 315,
-- NOT = 316,
-- TILDA = 317,
-- BANG = 318,
-- AMPERSAND = 319,
-- BAR = 320,
-- PERCENT = 321,
-- CARET = 322,
-- BXOR = 323,
-- MINUS = 324,
-- PLUS = 325,
-- STAR = 326,
-- SLASH = 327,
-- NEG = 328,
-- MIN = 329,
-- MAX = 330,
-- ABS = 331,
-- DOUBLE_BAR = 332,
-- _PLUS_BAR_PLUS = 333,
-- _PLUS_BAR_MINUS = 334,
-- _MINUS_BAR_PLUS = 335,
-- _MINUS_BAR_MINUS = 336,
-- _MINUS_MINUS = 337,
-- _PLUS_PLUS = 338,
-- SHIFT = 339,
-- LSHIFT = 340,
-- ASHIFT = 341,
-- BXORSHIFT = 342,
-- _GREATER_GREATER_GREATER_THAN_ASSIGN = 343,
-- ROT = 344,
-- LESS_LESS = 345,
-- GREATER_GREATER = 346,
-- _GREATER_GREATER_GREATER = 347,
-- _LESS_LESS_ASSIGN = 348,
-- _GREATER_GREATER_ASSIGN = 349,
-- DIVS = 350,
-- DIVQ = 351,
-- ASSIGN = 352,
-- _STAR_ASSIGN = 353,
-- _BAR_ASSIGN = 354,
-- _CARET_ASSIGN = 355,
-- _AMPERSAND_ASSIGN = 356,
-- _MINUS_ASSIGN = 357,
-- _PLUS_ASSIGN = 358,
-- _ASSIGN_BANG = 359,
-- _LESS_THAN_ASSIGN = 360,
-- _ASSIGN_ASSIGN = 361,
-- GE = 362,
-- LT = 363,
-- LE = 364,
-- GT = 365,
-- LESS_THAN = 366,
-- FLUSHINV = 367,
-- FLUSH = 368,
-- IFLUSH = 369,
-- PREFETCH = 370,
-- PRNT = 371,
-- OUTC = 372,
-- WHATREG = 373,
-- TESTSET = 374,
-- ASL = 375,
-- ASR = 376,
-- B = 377,
-- W = 378,
-- NS = 379,
-- S = 380,
-- CO = 381,
-- SCO = 382,
-- TH = 383,
-- TL = 384,
-- BP = 385,
-- BREV = 386,
-- X = 387,
-- Z = 388,
-- M = 389,
-- MMOD = 390,
-- R = 391,
-- RND = 392,
-- RNDL = 393,
-- RNDH = 394,
-- RND12 = 395,
-- RND20 = 396,
-- V = 397,
-- LO = 398,
-- HI = 399,
-- BITTGL = 400,
-- BITCLR = 401,
-- BITSET = 402,
-- BITTST = 403,
-- BITMUX = 404,
-- DBGAL = 405,
-- DBGAH = 406,
-- DBGHALT = 407,
-- DBG = 408,
-- DBGA = 409,
-- DBGCMPLX = 410,
-- IF = 411,
-- COMMA = 412,
-- BY = 413,
-- COLON = 414,
-- SEMICOLON = 415,
-- RPAREN = 416,
-- LPAREN = 417,
-- LBRACK = 418,
-- RBRACK = 419,
-- STATUS_REG = 420,
-- MNOP = 421,
-- SYMBOL = 422,
-- NUMBER = 423,
-- GOT = 424,
-- GOT17M4 = 425,
-- FUNCDESC_GOT17M4 = 426,
-- AT = 427,
-- PLTPC = 428
-- };
--#endif
--/* Tokens. */
--#define BYTEOP16P 258
--#define BYTEOP16M 259
--#define BYTEOP1P 260
--#define BYTEOP2P 261
--#define BYTEOP3P 262
--#define BYTEUNPACK 263
--#define BYTEPACK 264
--#define PACK 265
--#define SAA 266
--#define ALIGN8 267
--#define ALIGN16 268
--#define ALIGN24 269
--#define VIT_MAX 270
--#define EXTRACT 271
--#define DEPOSIT 272
--#define EXPADJ 273
--#define SEARCH 274
--#define ONES 275
--#define SIGN 276
--#define SIGNBITS 277
--#define LINK 278
--#define UNLINK 279
--#define REG 280
--#define PC 281
--#define CCREG 282
--#define BYTE_DREG 283
--#define REG_A_DOUBLE_ZERO 284
--#define REG_A_DOUBLE_ONE 285
--#define A_ZERO_DOT_L 286
--#define A_ZERO_DOT_H 287
--#define A_ONE_DOT_L 288
--#define A_ONE_DOT_H 289
--#define HALF_REG 290
--#define NOP 291
--#define RTI 292
--#define RTS 293
--#define RTX 294
--#define RTN 295
--#define RTE 296
--#define HLT 297
--#define IDLE 298
--#define STI 299
--#define CLI 300
--#define CSYNC 301
--#define SSYNC 302
--#define EMUEXCPT 303
--#define RAISE 304
--#define EXCPT 305
--#define LSETUP 306
--#define LOOP 307
--#define LOOP_BEGIN 308
--#define LOOP_END 309
--#define DISALGNEXCPT 310
--#define JUMP 311
--#define JUMP_DOT_S 312
--#define JUMP_DOT_L 313
--#define CALL 314
--#define ABORT 315
--#define NOT 316
--#define TILDA 317
--#define BANG 318
--#define AMPERSAND 319
--#define BAR 320
--#define PERCENT 321
--#define CARET 322
--#define BXOR 323
--#define MINUS 324
--#define PLUS 325
--#define STAR 326
--#define SLASH 327
--#define NEG 328
--#define MIN 329
--#define MAX 330
--#define ABS 331
--#define DOUBLE_BAR 332
--#define _PLUS_BAR_PLUS 333
--#define _PLUS_BAR_MINUS 334
--#define _MINUS_BAR_PLUS 335
--#define _MINUS_BAR_MINUS 336
--#define _MINUS_MINUS 337
--#define _PLUS_PLUS 338
--#define SHIFT 339
--#define LSHIFT 340
--#define ASHIFT 341
--#define BXORSHIFT 342
--#define _GREATER_GREATER_GREATER_THAN_ASSIGN 343
--#define ROT 344
--#define LESS_LESS 345
--#define GREATER_GREATER 346
--#define _GREATER_GREATER_GREATER 347
--#define _LESS_LESS_ASSIGN 348
--#define _GREATER_GREATER_ASSIGN 349
--#define DIVS 350
--#define DIVQ 351
--#define ASSIGN 352
--#define _STAR_ASSIGN 353
--#define _BAR_ASSIGN 354
--#define _CARET_ASSIGN 355
--#define _AMPERSAND_ASSIGN 356
--#define _MINUS_ASSIGN 357
--#define _PLUS_ASSIGN 358
--#define _ASSIGN_BANG 359
--#define _LESS_THAN_ASSIGN 360
--#define _ASSIGN_ASSIGN 361
--#define GE 362
--#define LT 363
--#define LE 364
--#define GT 365
--#define LESS_THAN 366
--#define FLUSHINV 367
--#define FLUSH 368
--#define IFLUSH 369
--#define PREFETCH 370
--#define PRNT 371
--#define OUTC 372
--#define WHATREG 373
--#define TESTSET 374
--#define ASL 375
--#define ASR 376
--#define B 377
--#define W 378
--#define NS 379
--#define S 380
--#define CO 381
--#define SCO 382
--#define TH 383
--#define TL 384
--#define BP 385
--#define BREV 386
--#define X 387
--#define Z 388
--#define M 389
--#define MMOD 390
--#define R 391
--#define RND 392
--#define RNDL 393
--#define RNDH 394
--#define RND12 395
--#define RND20 396
--#define V 397
--#define LO 398
--#define HI 399
--#define BITTGL 400
--#define BITCLR 401
--#define BITSET 402
--#define BITTST 403
--#define BITMUX 404
--#define DBGAL 405
--#define DBGAH 406
--#define DBGHALT 407
--#define DBG 408
--#define DBGA 409
--#define DBGCMPLX 410
--#define IF 411
--#define COMMA 412
--#define BY 413
--#define COLON 414
--#define SEMICOLON 415
--#define RPAREN 416
--#define LPAREN 417
--#define LBRACK 418
--#define RBRACK 419
--#define STATUS_REG 420
--#define MNOP 421
--#define SYMBOL 422
--#define NUMBER 423
--#define GOT 424
--#define GOT17M4 425
--#define FUNCDESC_GOT17M4 426
--#define AT 427
--#define PLTPC 428
--
--
--
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 448 "bfin-parse.y"
--{
-- INSTR_T instr;
-- Expr_Node *expr;
-- SYMBOL_T symbol;
-- long value;
-- Register reg;
-- Macfunc macfunc;
-- struct { int r0; int s0; int x0; int aop; } modcodes;
-- struct { int r0; } r0;
-- Opt_mode mod;
--}
--/* Line 1529 of yacc.c. */
--#line 407 "bfin-parse.h"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--extern YYSTYPE yylval;
--
-diff -Nur binutils-2.24.orig/gas/cond.c binutils-2.24/gas/cond.c
---- binutils-2.24.orig/gas/cond.c 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/gas/cond.c 2016-06-30 21:26:12.697894823 +0200
-@@ -129,7 +129,7 @@
- struct conditional_frame cframe;
- int t;
- char *stop = NULL;
-- char stopc;
-+ char stopc = 0;
-
- if (flag_mri)
- stop = mri_comment_field (&stopc);
-@@ -262,7 +262,7 @@
- s_ifc (int arg)
- {
- char *stop = NULL;
-- char stopc;
-+ char stopc = 0;
- char *s1, *s2;
- int len1, len2;
- int res;
-diff -Nur binutils-2.24.orig/gas/config/tc-i386.c binutils-2.24/gas/config/tc-i386.c
---- binutils-2.24.orig/gas/config/tc-i386.c 2013-11-26 12:37:33.000000000 +0100
-+++ binutils-2.24/gas/config/tc-i386.c 2016-06-30 21:26:12.697894823 +0200
-@@ -1921,47 +1921,46 @@
- }
-
- static INLINE int
--fits_in_signed_byte (offsetT num)
-+fits_in_signed_byte (addressT num)
- {
-- return (num >= -128) && (num <= 127);
-+ return num + 0x80 <= 0xff;
- }
-
- static INLINE int
--fits_in_unsigned_byte (offsetT num)
-+fits_in_unsigned_byte (addressT num)
- {
-- return (num & 0xff) == num;
-+ return num <= 0xff;
- }
-
- static INLINE int
--fits_in_unsigned_word (offsetT num)
-+fits_in_unsigned_word (addressT num)
- {
-- return (num & 0xffff) == num;
-+ return num <= 0xffff;
- }
-
- static INLINE int
--fits_in_signed_word (offsetT num)
-+fits_in_signed_word (addressT num)
- {
-- return (-32768 <= num) && (num <= 32767);
-+ return num + 0x8000 <= 0xffff;
- }
-
- static INLINE int
--fits_in_signed_long (offsetT num ATTRIBUTE_UNUSED)
-+fits_in_signed_long (addressT num ATTRIBUTE_UNUSED)
- {
- #ifndef BFD64
- return 1;
- #else
-- return (!(((offsetT) -1 << 31) & num)
-- || (((offsetT) -1 << 31) & num) == ((offsetT) -1 << 31));
-+ return num + 0x80000000 <= 0xffffffff;
- #endif
- } /* fits_in_signed_long() */
-
- static INLINE int
--fits_in_unsigned_long (offsetT num ATTRIBUTE_UNUSED)
-+fits_in_unsigned_long (addressT num ATTRIBUTE_UNUSED)
- {
- #ifndef BFD64
- return 1;
- #else
-- return (num & (((offsetT) 2 << 31) - 1)) == num;
-+ return num <= 0xffffffff;
- #endif
- } /* fits_in_unsigned_long() */
-
-diff -Nur binutils-2.24.orig/gas/config/tc-nds32.c binutils-2.24/gas/config/tc-nds32.c
---- binutils-2.24.orig/gas/config/tc-nds32.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/config/tc-nds32.c 2016-06-30 21:26:12.701894979 +0200
-@@ -0,0 +1,7528 @@
-+/* tc-nds32.c -- Assemble for the nds32
-+ Copyright (C) 2012-2013 Free Software Foundation, Inc.
-+ Contributed by Andes Technology Corporation.
-+
-+ This file is part of GAS, the GNU Assembler.
-+
-+ GAS is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 3, or (at your option)
-+ any later version.
-+
-+ GAS is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ You should have received a copy of the GNU General Public License
-+ along with GAS; see the file COPYING. If not, write to the Free
-+ Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
-+ 02110-1301, USA. */
-+
-+#include "as.h"
-+#include "safe-ctype.h"
-+#include "subsegs.h"
-+#include "symcat.h"
-+#include "dwarf2dbg.h"
-+#include "dw2gencfi.h"
-+#include "opcodes/nds32-asm.h"
-+#include "elf/nds32.h"
-+#include "bfd/elf32-nds32.h"
-+#include "hash.h"
-+#include "sb.h"
-+#include "macro.h"
-+#include "struc-symbol.h"
-+#include "opcode/nds32.h"
-+
-+#include <stdio.h>
-+#include <errno.h>
-+#include <limits.h>
-+
-+/* GAS definitions. */
-+
-+/* Characters which start a comment. */
-+const char comment_chars[] = "!";
-+/* Characters which start a comment when they appear at the start of a line. */
-+const char line_comment_chars[] = "#!";
-+/* Characters which separate lines (null and newline are by default). */
-+const char line_separator_chars[] = ";";
-+/* Characters which may be used as the exponent character
-+ in a floating point number. */
-+const char EXP_CHARS[] = "eE";
-+/* Characters which may be used to indicate a floating point constant. */
-+const char FLT_CHARS[] = "dDfF";
-+
-+static int enable_16bit = 1;
-+/* Save for md_assemble to distinguish if this instruction is
-+ expanded from the pseudo instruction. */
-+static bfd_boolean pseudo_opcode = FALSE;
-+static struct nds32_relocs_pattern *relocs_list = NULL;
-+/* Save instruction relation to inserting relaxation relocation. */
-+struct nds32_relocs_pattern
-+{
-+ segT seg;
-+ fragS *frag;
-+ frchainS *frchain;
-+ symbolS *sym;
-+ fixS* fixP;
-+ struct nds32_opcode *opcode;
-+ char *where;
-+ struct nds32_relocs_pattern *next;
-+ /* Assembled instruction bytes. */
-+ uint32_t insn;
-+};
-+
-+/* Suffix name and relocation. */
-+struct suffix_name
-+{
-+ char *suffix;
-+ short unsigned int reloc;
-+};
-+static int vec_size = 0;
-+/* If the assembly code is generated by compiler, it is supposed to have
-+ ".flag verbatim" at beginning of the content. We have
-+ 'nds32_flag' to parse it and set this field to be non-zero. */
-+static int verbatim = 0;
-+static struct hash_control *nds32_gprs_hash;
-+static struct hash_control *nds32_hint_hash;
-+#define TLS_REG "$r27"
-+#define GOT_NAME "_GLOBAL_OFFSET_TABLE_"
-+
-+/* Generate relocation for relax or not, and the default is true. */
-+static int enable_relax_relocs = 1;
-+/* The value will be used in RELAX_ENTRY. */
-+static int enable_relax_ex9 = 0;
-+/* The value will be used in RELAX_ENTRY. */
-+static int enable_relax_ifc = 0;
-+/* Save option -O for perfomance. */
-+static int optimize = 0;
-+/* Save option -Os for code size. */
-+static int optimize_for_space = 0;
-+/* Flag to save label exist. */
-+static int label_exist = 0;
-+/* Flag to save state in omit_fp region. */
-+static int in_omit_fp = 0;
-+extern keyword_t keyword_gpr[];
-+/* Tag there is relax relocation having to link. */
-+static bfd_boolean relaxing = FALSE;
-+/* Save security status. */
-+static bfd_boolean crcing = FALSE;
-+/* Inline asm status. */
-+static bfd_boolean inline_asm = FALSE;
-+
-+static struct hash_control *nds32_relax_info_hash;
-+/* Branch pattern. */
-+static relax_info_t relax_table[] =
-+{
-+ {
-+ .opcode = "jal",
-+ .br_range = BR_RANGE_S16M,
-+ .cond_field = {
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_JAL}, /* jal label */
-+ .relax_code_size[BR_RANGE_S256] = 4,
-+ .relax_branch_isize[BR_RANGE_S256] = 4,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_JAL}, /* jal label */
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_JAL}, /* jal label */
-+ .relax_code_size[BR_RANGE_S64K] = 4,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_JAL}, /* jal label */
-+ .relax_code_size[BR_RANGE_S16M] = 4,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JRAL_TA}, /* jral $ta */
-+ .relax_code_size[BR_RANGE_U4G] = 12,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGCALL4},
-+ {4, 4, NDS32_HINT | NDS32_FIX, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {8, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {8, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "bgezal",
-+ .br_range = BR_RANGE_S64K,
-+ .cond_field = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_BGEZAL}, /* bgezal $rt, label */
-+ .relax_code_condition[BR_RANGE_S256] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S256] = 4,
-+ .relax_branch_isize[BR_RANGE_S256] = 4,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_BGEZAL}, /* bgezal $rt, label */
-+ .relax_code_condition[BR_RANGE_S16K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_BGEZAL}, /* bgezal $rt, label */
-+ .relax_code_condition[BR_RANGE_S64K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S64K] = 4,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_BLTZ, /* bltz $rt, $1 */
-+ INSN_JAL}, /* jal label */
-+ .relax_code_condition[BR_RANGE_S16M] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S16M] = 8,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGCALL5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_BLTZ, /* bltz $rt, $1 */
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JRAL_TA}, /* jral $ta */
-+ .relax_code_condition[BR_RANGE_U4G] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_U4G] = 16,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGCALL6},
-+ {4, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_FIX | NDS32_HINT, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {8, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {12, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {12, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {12, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "bltzal",
-+ .br_range = BR_RANGE_S64K,
-+ .cond_field = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_BLTZAL}, /* bltzal $rt, label */
-+ .relax_code_condition[BR_RANGE_S256] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S256] = 4,
-+ .relax_branch_isize[BR_RANGE_S256] = 4,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_BLTZAL}, /* bltzal $rt, label */
-+ .relax_code_condition[BR_RANGE_S16K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_BLTZAL}, /* bltzal $rt, label */
-+ .relax_code_condition[BR_RANGE_S64K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S64K] = 4,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_BGEZ, /* bgez $rt, $1 */
-+ INSN_JAL}, /* jal label */
-+ .relax_code_condition[BR_RANGE_S16M] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S16M] = 8,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGCALL5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_BGEZ, /* bgez $rt, $1 */
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JRAL_TA}, /* jral $ta */
-+ .relax_code_condition[BR_RANGE_U4G] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_U4G] = 16,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGCALL6},
-+ {4, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_FIX | NDS32_HINT, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {8, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {12, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {12, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {12, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "j",
-+ .br_range = BR_RANGE_S16M,
-+ .cond_field = {
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ (INSN_J8 << 16)}, /* j8 label */
-+ .relax_code_size[BR_RANGE_S256] = 2,
-+ .relax_branch_isize[BR_RANGE_S256] = 2,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 2, NDS32_PCREL, BFD_RELOC_NDS32_9_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_J}, /* j label */
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_J}, /* j label */
-+ .relax_code_size[BR_RANGE_S64K] = 4,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_J}, /* j label */
-+ .relax_code_size[BR_RANGE_S16M] = 4,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JR_TA}, /* jr $ta */
-+ .relax_code_size[BR_RANGE_U4G] = 12,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP4},
-+ {4, 4, NDS32_HINT | NDS32_FIX, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {8, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {8, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "j8",
-+ .br_range = BR_RANGE_S256,
-+ .cond_field = {
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ (INSN_J8 << 16)}, /* j8 label */
-+ .relax_code_size[BR_RANGE_S256] = 2,
-+ .relax_branch_isize[BR_RANGE_S256] = 2,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 2, NDS32_PCREL, BFD_RELOC_NDS32_9_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_J}, /* j label */
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_J}, /* j label */
-+ .relax_code_size[BR_RANGE_S64K] = 4,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_J}, /* j label */
-+ .relax_code_size[BR_RANGE_S16M] = 4,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JR_TA}, /* jr $ta */
-+ .relax_code_size[BR_RANGE_U4G] = 12,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP4},
-+ {4, 4, NDS32_HINT | NDS32_FIX, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {8, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {8, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "beqz",
-+ .br_range = BR_RANGE_S64K,
-+ .cond_field = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ /* We do not use beqz38 and beqzs8 here directly because we
-+ don't want to check register number for specail condition. */
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_BEQZ}, /* beqz $rt, label */
-+ .relax_code_condition[BR_RANGE_S256] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S256] = 4,
-+ .relax_branch_isize[BR_RANGE_S256] = 4,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 4, NDS32_INSN16 , BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_BEQZ}, /* beqz $rt, label */
-+ .relax_code_condition[BR_RANGE_S16K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_BEQZ}, /* beqz $rt, label */
-+ .relax_code_condition[BR_RANGE_S64K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S64K] = 4,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_BNEZ, /* bnez $rt, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S16M] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S16M] = 8,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ /* bnez range is 17 pcrel, but it use 15 pcrel here since link time
-+ relaxtion. If 17 pcrel can reach, it do not have to
-+ use S16M. Therefore, 15 pcrel is just for linker to
-+ distinguish LONGJUMP5 and LONGJUMP6. */
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {4, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_BNEZ, /* bnez $rt, $1 */
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JR_TA}, /* jr $ta */
-+ .relax_code_condition[BR_RANGE_U4G] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_U4G] = 16,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP6},
-+ {4, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_FIX | NDS32_HINT, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {8, 4, NDS32_PTR |NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {12, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {12, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {12, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "bgez",
-+ .br_range = BR_RANGE_S64K,
-+ .cond_field = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_BGEZ}, /* bgez $rt, label */
-+ .relax_code_condition[BR_RANGE_S256] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S256] = 4,
-+ .relax_branch_isize[BR_RANGE_S256] = 4,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_BGEZ}, /* bgez $rt, label */
-+ .relax_code_condition[BR_RANGE_S16K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_BGEZ}, /* bgez $rt, label */
-+ .relax_code_condition[BR_RANGE_S64K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S64K] = 4,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_BLTZ, /* bltz $rt, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S16M] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S16M] = 8,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_BLTZ, /* bltz $rt, $1 */
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JR_TA}, /* jr $ta */
-+ .relax_code_condition[BR_RANGE_U4G] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_U4G] = 16,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP6},
-+ {4, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_FIX | NDS32_HINT, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {8, 4, NDS32_PTR |NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {12, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {12, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {12, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "bnez",
-+ .br_range = BR_RANGE_S64K,
-+ .cond_field = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_BNEZ}, /* bnez $rt, label */
-+ .relax_code_condition[BR_RANGE_S256] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S256] = 4,
-+ .relax_branch_isize[BR_RANGE_S256] = 4,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 4, NDS32_INSN16, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_BNEZ}, /* bnez $rt, label */
-+ .relax_code_condition[BR_RANGE_S16K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_BNEZ}, /* bnez $rt, label */
-+ .relax_code_condition[BR_RANGE_S64K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S64K] = 4,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_BEQZ, /* beqz $rt, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S16M] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S16M] = 8,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {4, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_BEQZ, /* beqz $rt, $1 */
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JR_TA}, /* jr $ta */
-+ .relax_code_condition[BR_RANGE_U4G] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_U4G] = 16,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP6},
-+ {4, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_FIX | NDS32_HINT, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {8, 4, NDS32_PTR |NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {12, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {12, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {12, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "bgtz",
-+ .br_range = BR_RANGE_S64K,
-+ .cond_field = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_BGTZ}, /* bgtz $rt, label */
-+ .relax_code_condition[BR_RANGE_S256] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S256] = 4,
-+ .relax_branch_isize[BR_RANGE_S256] = 4,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_BGTZ}, /* bgtz $rt, label */
-+ .relax_code_condition[BR_RANGE_S16K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_BGTZ}, /* bgtz $rt, label */
-+ .relax_code_condition[BR_RANGE_S64K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S64K] = 4,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_BLEZ, /* blez $rt, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S16M] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S16M] = 8,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_BLEZ, /* blez $rt, $1 */
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JR_TA}, /* jr $ta */
-+ .relax_code_condition[BR_RANGE_U4G] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_U4G] = 16,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP6},
-+ {4, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_FIX | NDS32_HINT, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {8, 4, NDS32_PTR |NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {12, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {12, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {12, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "blez",
-+ .br_range = BR_RANGE_S64K,
-+ .cond_field = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_BLEZ}, /* blez $rt, label */
-+ .relax_code_condition[BR_RANGE_S256] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S256] = 4,
-+ .relax_branch_isize[BR_RANGE_S256] = 4,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_BLEZ}, /* blez $rt, label */
-+ .relax_code_condition[BR_RANGE_S16K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_BLEZ}, /* blez $rt, label */
-+ .relax_code_condition[BR_RANGE_S64K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S64K] = 4,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_BGTZ, /* bgtz $rt, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S16M] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S16M] = 8,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_BGTZ, /* bgtz $rt, $1 */
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JR_TA}, /* jr $ta */
-+ .relax_code_condition[BR_RANGE_U4G] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_U4G] = 16,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP6},
-+ {4, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_FIX | NDS32_HINT, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {8, 4, NDS32_PTR |NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {12, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {12, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {12, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "bltz",
-+ .br_range = BR_RANGE_S64K,
-+ .cond_field = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_BLTZ}, /* bltz $rt, label */
-+ .relax_code_condition[BR_RANGE_S256] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S256] = 4,
-+ .relax_branch_isize[BR_RANGE_S256] = 4,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_BLTZ}, /* bltz $rt, label */
-+ .relax_code_condition[BR_RANGE_S16K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_BLTZ}, /* bltz $rt, label */
-+ .relax_code_condition[BR_RANGE_S64K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S64K] = 4,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_BGEZ, /* bgez $rt, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S16M] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_S16M] = 8,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_BGEZ, /* bgez $rt, $1 */
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JR_TA}, /* jr $ta */
-+ .relax_code_condition[BR_RANGE_U4G] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE},
-+ },
-+ .relax_code_size[BR_RANGE_U4G] = 16,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP6},
-+ {4, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_FIX | NDS32_HINT, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {8, 4, NDS32_PTR |NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {12, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {12, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {12, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "beq",
-+ .br_range = BR_RANGE_S16K,
-+ .cond_field = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 15, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_BEQ}, /* beq $rt, $ra, label */
-+ .relax_code_condition[BR_RANGE_S256] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 15, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S256] = 4,
-+ .relax_branch_isize[BR_RANGE_S256] = 4,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_BEQ}, /* beq $rt, $ra, label */
-+ .relax_code_condition[BR_RANGE_S16K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 15, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_BNE, /* bne $rt, $ra, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S64K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 15, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S64K] = 8,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {4, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_BNE, /* bne $rt, $ra, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S16M] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 15, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S16M] = 8,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {4, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_BNE, /* bne $rt, $ra, $1 */
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JR_TA}, /* jr $ta */
-+ .relax_code_condition[BR_RANGE_U4G] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 15, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_U4G] = 16,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP6},
-+ {4, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_FIX | NDS32_HINT, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {8, 4, NDS32_PTR |NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {12, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {12, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {12, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "bne",
-+ .br_range = BR_RANGE_S16K,
-+ .cond_field = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 15, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_BNE}, /* bne $rt, $ra, label */
-+ .relax_code_condition[BR_RANGE_S256] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 15, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S256] = 4,
-+ .relax_branch_isize[BR_RANGE_S256] = 4,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_BNE}, /* bne $rt, $ra, label */
-+ .relax_code_condition[BR_RANGE_S16K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 15, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_BEQ, /* beq $rt, $ra, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S64K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 15, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S64K] = 8,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {4, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_BEQ, /* beq $rt, $ra, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S16M] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 15, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S16M] = 8,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {4, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_BEQ, /* beq $rt, $ra, $1 */
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JR_TA}, /* jr $ta */
-+ .relax_code_condition[BR_RANGE_U4G] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 15, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_U4G] = 16,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP6},
-+ {4, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_FIX | NDS32_HINT, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {8, 4, NDS32_PTR |NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {12, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {12, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {12, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "beqz38",
-+ .br_range = BR_RANGE_S256,
-+ .cond_field = {
-+ {0, 8, 0x7, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_BEQZ38 << 16}, /* beqz $rt, label */
-+ .relax_code_condition[BR_RANGE_S256] = {
-+ {0, 8, 0x7, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S256] = 2,
-+ .relax_branch_isize[BR_RANGE_S256] = 2,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 2, NDS32_PCREL, BFD_RELOC_NDS32_9_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_BEQZ}, /* beqz $rt, label */
-+ .relax_code_condition[BR_RANGE_S16K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_BEQZ}, /* beqz $rt, label */
-+ .relax_code_condition[BR_RANGE_S64K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S64K] = 4,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_BNEZ, /* bnez $rt, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S16M] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S16M] = 8,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {4, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_BNEZ, /* bnez $rt, $1 */
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JR_TA}, /* jr $ta */
-+ .relax_code_condition[BR_RANGE_U4G] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_U4G] = 16,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP6},
-+ {4, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_FIX | NDS32_HINT, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {8, 4, NDS32_PTR |NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {12, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {12, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {12, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "bnez38",
-+ .br_range = BR_RANGE_S256,
-+ .cond_field = {
-+ {0, 8, 0x7, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_BNEZ38 << 16}, /* bnez $rt, label */
-+ .relax_code_condition[BR_RANGE_S256] = {
-+ {0, 8, 0x7, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S256] = 2,
-+ .relax_branch_isize[BR_RANGE_S256] = 2,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 2, NDS32_PCREL, BFD_RELOC_NDS32_9_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_BNEZ}, /* bnez $rt, label */
-+ .relax_code_condition[BR_RANGE_S16K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_BNEZ}, /* bnez $rt, label */
-+ .relax_code_condition[BR_RANGE_S64K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S64K] = 4,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_BEQZ, /* beqz $rt, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S16M] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S16M] = 8,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {4, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_BEQZ, /* beqz $rt, $1 */
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JR_TA}, /* jr $ a */
-+ .relax_code_condition[BR_RANGE_U4G] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_U4G] = 16,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP6},
-+ {4, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_FIX | NDS32_HINT, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {8, 4, NDS32_PTR |NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {12, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {12, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {12, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "beqzs8",
-+ .br_range = BR_RANGE_S256,
-+ .cond_field = {
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_BEQZS8 << 16}, /* beqz $r15, label */
-+ .relax_code_size[BR_RANGE_S256] = 2,
-+ .relax_branch_isize[BR_RANGE_S256] = 2,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 2, NDS32_PCREL, BFD_RELOC_NDS32_9_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_BEQZ_TA}, /* beqz $r15, label */
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_BEQZ_TA}, /* beqz $r15, label */
-+ .relax_code_size[BR_RANGE_S64K] = 4,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_BNEZ_TA, /* bnez $r15, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_size[BR_RANGE_S16M] = 8,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {4, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_BNEZ_TA, /* bnez $r15, $1 */
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JR_TA}, /* jr $ a */
-+ .relax_code_size[BR_RANGE_U4G] = 16,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP6},
-+ {4, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_FIX | NDS32_HINT, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {8, 4, NDS32_PTR |NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {12, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {12, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {12, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "bnezs8",
-+ .br_range = BR_RANGE_S256,
-+ .cond_field = {
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_BNEZS8 << 16}, /* bnez $r15, label */
-+ .relax_code_size[BR_RANGE_S256] = 2,
-+ .relax_branch_isize[BR_RANGE_S256] = 2,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 2, NDS32_PCREL, BFD_RELOC_NDS32_9_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_BNEZ_TA}, /* bnez $r15, label */
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_BNEZ_TA}, /* bnez $r15, label */
-+ .relax_code_size[BR_RANGE_S64K] = 4,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_17_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_BEQZ_TA, /* beqz $r15, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_size[BR_RANGE_S16M] = 8,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {4, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_BEQZ_TA, /* beqz $r15, $1 */
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JR_TA}, /* jr $ a */
-+ .relax_code_size[BR_RANGE_U4G] = 16,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP6},
-+ {4, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_FIX | NDS32_HINT, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {8, 4, NDS32_PTR |NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {12, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {12, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {12, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "bnes38",
-+ .br_range = BR_RANGE_S256,
-+ .cond_field = {
-+ {0, 8, 0x7, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_BNES38 << 16}, /* bne $rt, $r5, label */
-+ .relax_code_condition[BR_RANGE_S256] = {
-+ {0, 8, 0x7, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S256] = 2,
-+ .relax_branch_isize[BR_RANGE_S256] = 2,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 2, NDS32_PCREL, BFD_RELOC_NDS32_9_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_BNE_R5}, /* bne $rt, $r5, label */
-+ .relax_code_condition[BR_RANGE_S16K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_BEQ_R5, /* beq $rt, $r5, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S64K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S64K] = 8,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {4, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_BEQ_R5, /* beq $rt, $r5, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S16M] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S16M] = 8,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {4, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_BEQ_R5, /* beq $rt, $r5, $1 */
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JR_TA}, /* jr $ a */
-+ .relax_code_condition[BR_RANGE_U4G] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_U4G] = 16,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP6},
-+ {4, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_FIX | NDS32_HINT, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {8, 4, NDS32_PTR |NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {12, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {12, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {12, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "beqs38",
-+ .br_range = BR_RANGE_S256,
-+ .cond_field = {
-+ {0, 8, 0x7, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_BEQS38 << 16}, /* beq $rt, $r5, label */
-+ .relax_code_condition[BR_RANGE_S256] = {
-+ {0, 8, 0x7, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S256] = 2,
-+ .relax_branch_isize[BR_RANGE_S256] = 2,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 2, NDS32_PCREL, BFD_RELOC_NDS32_9_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_BEQ_R5}, /* beq $rt, $r5, label */
-+ .relax_code_condition[BR_RANGE_S16K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S16K] = 4,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_BNE_R5, /* bne $rt, $r5, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S64K] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S64K] = 8,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {4, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_BNE_R5, /* bne $rt, $r5, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S16M] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S16M] = 8,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP5},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {4, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_BNE_R5, /* bne $rt, $r5, $1 */
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JR_TA}, /* jr $ a */
-+ .relax_code_condition[BR_RANGE_U4G] = {
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_U4G] = 16,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP6},
-+ {4, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {4, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_FIX | NDS32_HINT, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {8, 4, NDS32_PTR |NDS32_HINT, BFD_RELOC_NDS32_PTR},
-+ {12, 4, NDS32_ABS | NDS32_HINT, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {12, 4, NDS32_SYM | NDS32_HINT, BFD_RELOC_NDS32_EMPTY},
-+ {12, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "beqc",
-+ .br_range = BR_RANGE_S256,
-+ .cond_field = {
-+ {0, 8, 0x7FF, TRUE},
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_BEQC}, /* beqc $rt, imm11s, label */
-+ .relax_code_condition[BR_RANGE_S256] = {
-+ {0, 8, 0x7FF, FALSE},
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S256] = 4,
-+ .relax_branch_isize[BR_RANGE_S256] = 4,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_WORD_9_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_MOVI_TA, /* movi $ta, imm11s */
-+ INSN_BEQ_TA}, /* beq $rt, $ta, label */
-+ .relax_code_condition[BR_RANGE_S16K] = {
-+ {0, 0, 0xFFFFF, FALSE},
-+ {4, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S16K] = 8,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP7},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_BNEC, /* bnec $rt, imm11s, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S64K] = {
-+ {0, 8, 0x7FF, FALSE},
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S64K] = 8,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_WORD_9_PCREL},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_BNEC, /* bnec $rt, imm11s, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S16M] = {
-+ {0, 8, 0x7FF, FALSE},
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S16M] = 8,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_WORD_9_PCREL},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_BNEC, /* bnec $rt, imm11s, $1 */
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JR_TA}, /* jr $ a */
-+ .relax_code_condition[BR_RANGE_U4G] = {
-+ {0, 8, 0x7FF, FALSE},
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_U4G] = 16,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_WORD_9_PCREL},
-+ {4, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {8, 4, 0, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {12, 4, NDS32_INSN16, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = "bnec",
-+ .br_range = BR_RANGE_S256,
-+ .cond_field = {
-+ {0, 8, 0x7FF, TRUE},
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_seq[BR_RANGE_S256] = {
-+ INSN_BNEC}, /* bnec $rt, imm11s, label */
-+ .relax_code_condition[BR_RANGE_S256] = {
-+ {0, 8, 0x7FF, FALSE},
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S256] = 4,
-+ .relax_branch_isize[BR_RANGE_S256] = 4,
-+ .relax_fixup[BR_RANGE_S256] = {
-+ {0, 4, NDS32_PCREL, BFD_RELOC_NDS32_WORD_9_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16K] = {
-+ INSN_MOVI_TA, /* movi $ta, imm11s */
-+ INSN_BNE_TA}, /* bne $rt, $ta, label */
-+ .relax_code_condition[BR_RANGE_S16K] = {
-+ {0, 0, 0xFFFFF, FALSE},
-+ {4, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S16K] = 8,
-+ .relax_branch_isize[BR_RANGE_S16K] = 4,
-+ .relax_fixup[BR_RANGE_S16K] = {
-+ {0, 4, NDS32_INSN16 | NDS32_HINT, BFD_RELOC_NDS32_INSN16},
-+ {0, 4, NDS32_PTR | NDS32_HINT, BFD_RELOC_NDS32_LONGJUMP7},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_15_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S64K] = {
-+ INSN_BEQC, /* beqc $rt, imm11s, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S64K] = {
-+ {0, 8, 0x7FF, FALSE},
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S64K] = 8,
-+ .relax_branch_isize[BR_RANGE_S64K] = 4,
-+ .relax_fixup[BR_RANGE_S64K] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_WORD_9_PCREL},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_S16M] = {
-+ INSN_BEQC, /* beqc $rt, imm11s, $1 */
-+ INSN_J}, /* j label */
-+ .relax_code_condition[BR_RANGE_S16M] = {
-+ {0, 8, 0x7FF, FALSE},
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_S16M] = 8,
-+ .relax_branch_isize[BR_RANGE_S16M] = 4,
-+ .relax_fixup[BR_RANGE_S16M] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_WORD_9_PCREL},
-+ {4, 4, NDS32_PCREL, BFD_RELOC_NDS32_25_PCREL},
-+ {0, 0, 0, 0}
-+ },
-+
-+ .relax_code_seq[BR_RANGE_U4G] = {
-+ INSN_BEQC, /* beqc $rt, imm11s, $1 */
-+ INSN_SETHI_TA, /* sethi $ta, label */
-+ INSN_ORI_TA, /* ori $ta, $ta, label */
-+ INSN_JR_TA}, /* jr $ a */
-+ .relax_code_condition[BR_RANGE_U4G] = {
-+ {0, 8, 0x7FF, FALSE},
-+ {0, 20, 0x1F, FALSE},
-+ {0, 0, 0, FALSE}
-+ },
-+ .relax_code_size[BR_RANGE_U4G] = 16,
-+ .relax_branch_isize[BR_RANGE_U4G] = 4,
-+ .relax_fixup[BR_RANGE_U4G] = {
-+ {0, 4, NDS32_CREATE_LABEL | NDS32_PCREL, BFD_RELOC_NDS32_WORD_9_PCREL},
-+ {4, 4, 0, BFD_RELOC_NDS32_HI20},
-+ {8, 4, 0, BFD_RELOC_NDS32_LO12S0_ORI},
-+ {12, 4, NDS32_INSN16, BFD_RELOC_NDS32_INSN16},
-+ {0, 0, 0, 0}
-+ },
-+ },
-+ {
-+ .opcode = NULL,
-+ },
-+};
-+
-+
-+/* GAS definitions for command-line options. */
-+enum options
-+{
-+ OPTION_BIG = OPTION_MD_BASE,
-+ OPTION_LITTLE,
-+ OPTION_TURBO,
-+ OPTION_PIC,
-+ OPTION_RELAX_FP_AS_GP_OFF,
-+ OPTION_RELAX_B2BB_ON,
-+ OPTION_RELAX_ALL_OFF,
-+ OPTION_OPTIMIZE,
-+ OPTION_OPTIMIZE_SPACE
-+};
-+
-+const char *md_shortopts = "m:O:";
-+struct option md_longopts[] = {
-+ {"O1", no_argument, NULL, OPTION_OPTIMIZE},
-+ {"Os", no_argument, NULL, OPTION_OPTIMIZE_SPACE},
-+ {"big", no_argument, NULL, OPTION_BIG},
-+ {"little", no_argument, NULL, OPTION_LITTLE},
-+ {"EB", no_argument, NULL, OPTION_BIG},
-+ {"EL", no_argument, NULL, OPTION_LITTLE},
-+ {"meb", no_argument, NULL, OPTION_BIG},
-+ {"mel", no_argument, NULL, OPTION_LITTLE},
-+ {"mall-ext", no_argument, NULL, OPTION_TURBO},
-+ {"mext-all", no_argument, NULL, OPTION_TURBO},
-+ {"mpic", no_argument, NULL, OPTION_PIC},
-+ /* Relaxation related options. */
-+ {"mno-fp-as-gp-relax", no_argument, NULL, OPTION_RELAX_FP_AS_GP_OFF},
-+ {"mb2bb", no_argument, NULL, OPTION_RELAX_B2BB_ON},
-+ {"mno-all-relax", no_argument, NULL, OPTION_RELAX_ALL_OFF},
-+ {NULL, no_argument, NULL, 0}
-+};
-+
-+size_t md_longopts_size = sizeof (md_longopts);
-+
-+struct nds32_parse_option_table
-+{
-+ const char *name; /* Option string. */
-+ char *help; /* Help description. */
-+ int (*func) (char *arg); /* How to parse it. */
-+};
-+
-+
-+/* The value `-1' represents this option has *NOT* been set. */
-+#ifdef NDS32_DEFAULT_ARCH_NAME
-+static char* nds32_arch_name = NDS32_DEFAULT_ARCH_NAME;
-+#else
-+static char* nds32_arch_name = "v3";
-+#endif
-+static int nds32_baseline = -1;
-+static int nds32_gpr16 = -1;
-+static int nds32_fpu_sp_ext = -1;
-+static int nds32_fpu_dp_ext = -1;
-+static int nds32_freg = -1;
-+static int nds32_abi = -1;
-+
-+/* Record ELF flags. */
-+static int nds32_elf_flags = 0;
-+static int nds32_fpu_com = 0;
-+
-+static int nds32_parse_arch (char *str);
-+static int nds32_parse_baseline (char *str);
-+static int nds32_parse_freg (char *str);
-+static int nds32_parse_abi (char *str);
-+
-+static void add_mapping_symbol (enum mstate state,
-+ unsigned int padding_byte, unsigned int align);
-+
-+static struct nds32_parse_option_table parse_opts [] =
-+{
-+ {"ace=", N_("<shrlibfile>\t Support user defined instruction extension"),
-+ nds32_parse_udi},
-+ {"cop0=", N_("<shrlibfile>\t Support coprocessor 0 extension"),
-+ nds32_parse_cop0},
-+ {"cop1=", N_("<shrlibfile>\t Support coprocessor 1 extension"),
-+ nds32_parse_cop1},
-+ {"cop2=", N_("<shrlibfile>\t Support coprocessor 2 extension"),
-+ nds32_parse_cop2},
-+ {"cop3=", N_("<shrlibfile>\t Support coprocessor 3 extension"),
-+ nds32_parse_cop3},
-+ {"arch=", N_("<arch name>\t Assemble for architecture <arch name>\n\
-+ <arch name> could be\n\
-+ v3, v3j, v3m, v3f, v3s, "\
-+ "v2, v2j, v2f, v2s"), nds32_parse_arch},
-+ {"baseline=", N_("<baseline>\t Assemble for baseline <baseline>\n\
-+ <baseline> could be v2, v3, v3m"),
-+ nds32_parse_baseline},
-+ {"fpu-freg=", N_("<freg>\t Specify a FPU configuration\n\
-+ <freg>\n\
-+ 0: 8 SP / 4 DP registers\n\
-+ 1: 16 SP / 8 DP registers\n\
-+ 2: 32 SP / 16 DP registers\n\
-+ 3: 32 SP / 32 DP registers"), nds32_parse_freg},
-+ {"abi=", N_("<abi>\t Specify a abi version\n\
-+ <abi> could be v1, v2, v2fp, v2fpp"), nds32_parse_abi},
-+ {NULL, NULL, NULL}
-+};
-+
-+static int nds32_mac = 1;
-+static int nds32_div = 1;
-+static int nds32_16bit_ext = 1;
-+static int nds32_dx_regs = NDS32_DEFAULT_DX_REGS;
-+static int nds32_perf_ext = NDS32_DEFAULT_PERF_EXT;
-+static int nds32_perf_ext2 = NDS32_DEFAULT_PERF_EXT2;
-+static int nds32_string_ext = NDS32_DEFAULT_STRING_EXT;
-+static int nds32_audio_ext = NDS32_DEFAULT_AUDIO_EXT;
-+static int nds32_dsp_ext = NDS32_DEFAULT_DSP_EXT;
-+static int nds32_zol_ext = NDS32_DEFAULT_ZOL_EXT;
-+static int nds32_fpu_fma = 0;
-+static int nds32_pic = 0;
-+static int nds32_relax_fp_as_gp = 1;
-+static int nds32_relax_b2bb = 0;
-+static int nds32_relax_all = 1;
-+struct nds32_set_option_table
-+{
-+ const char *name; /* Option string. */
-+ char *help; /* Help description. */
-+ int *var; /* Variable to be set. */
-+ int value; /* Value to set. */
-+};
-+
-+/* The option in this group has both Enable/Disable settings.
-+ Just list on here. */
-+
-+static struct nds32_set_option_table toggle_opts [] =
-+{
-+ {"mac", N_("Multiply instructions support"), &nds32_mac, 1},
-+ {"div", N_("Divide instructions support"), &nds32_div, 1},
-+ {"16bit-ext", N_("16-bit extension"), &nds32_16bit_ext, 1},
-+ {"dx-regs", N_("d0/d1 registers"), &nds32_dx_regs, 1},
-+ {"perf-ext", N_("Performance extension"), &nds32_perf_ext, 1},
-+ {"perf2-ext", N_("Performance extension 2"), &nds32_perf_ext2, 1},
-+ {"string-ext", N_("String extension"), &nds32_string_ext, 1},
-+ {"reduced-regs", N_("Reduced Register configuration (GPR16) option"), &nds32_gpr16, 1},
-+ {"audio-isa-ext", N_("AUDIO ISA extension"), &nds32_audio_ext, 1},
-+ {"fpu-sp-ext", N_("FPU SP extension"), &nds32_fpu_sp_ext, 1},
-+ {"fpu-dp-ext", N_("FPU DP extension"), &nds32_fpu_dp_ext, 1},
-+ {"fpu-fma", N_("FPU fused-multiply-add instructions"), &nds32_fpu_fma, 1},
-+ {"dsp-ext", N_("DSP extension"), &nds32_dsp_ext, 1},
-+ {"zol-ext", N_("hardware loop extension"), &nds32_zol_ext, 1},
-+ {NULL, NULL, NULL, 0}
-+};
-+
-+
-+/* GAS declarations. */
-+
-+/* This is the callback for nds32-asm.c to parse operands. */
-+int
-+nds32_asm_parse_operand (struct nds32_asm_desc *pdesc,
-+ struct nds32_asm_insn *pinsn,
-+ char **pstr, int64_t *value);
-+
-+
-+static struct nds32_asm_desc asm_desc;
-+
-+/* md_after_parse_args ()
-+
-+ GAS will call md_after_parse_args whenever it is defined.
-+ This function checks any conflicting options specified. */
-+
-+void
-+nds32_after_parse_args (void)
-+{
-+ /* If -march option is not used in command-line, set the value of option
-+ variable according to NDS32_DEFAULT_ARCH_NAME. */
-+ nds32_parse_arch (nds32_arch_name);
-+}
-+
-+/* This function is called when printing usage message (--help). */
-+
-+void
-+md_show_usage (FILE *stream)
-+{
-+ struct nds32_parse_option_table *coarse_tune;
-+ struct nds32_set_option_table *fine_tune;
-+
-+ fprintf (stream, _("\n NDS32-specific assembler options:\n"));
-+ fprintf (stream, _("\
-+ -O1, Optimize for performance\n\
-+ -Os Optimize for space\n"));
-+ fprintf (stream, _("\
-+ -EL, -mel or -little Produce little endian output\n\
-+ -EB, -meb or -big Produce big endian output\n\
-+ -mpic Generate PIC\n\
-+ -mno-fp-as-gp-relax Suppress fp-as-gp relaxation for this file\n\
-+ -mb2bb-relax Back-to-back branch optimization\n\
-+ -mno-all-relax Suppress all relaxation for this file\n"));
-+
-+ for (coarse_tune = parse_opts; coarse_tune->name != NULL; coarse_tune++)
-+ {
-+ if (coarse_tune->help != NULL)
-+ fprintf (stream, _(" -m%s%s\n"),
-+ coarse_tune->name, _(coarse_tune->help));
-+ }
-+
-+ for (fine_tune = toggle_opts; fine_tune->name != NULL; fine_tune++)
-+ {
-+ if (fine_tune->help != NULL)
-+ fprintf (stream, _(" -m[no-]%-17sEnable/Disable %s\n"),
-+ fine_tune->name, _(fine_tune->help));
-+ }
-+
-+ fprintf (stream, _("\
-+ -mall-ext Turn on all extensions and instructions support\n"));
-+}
-+
-+void
-+nds32_frag_init (fragS *fragp)
-+{
-+ fragp->tc_frag_data.flag = 0;
-+ fragp->tc_frag_data.opcode = NULL;
-+ fragp->tc_frag_data.fixup = NULL;
-+}
-+
-+
-+
-+/* This function reads an expression from a C string and returns a pointer past
-+ the end of the expression. */
-+
-+static char *
-+parse_expression (char *str, expressionS *exp)
-+{
-+ char *s;
-+ char *tmp;
-+
-+ tmp = input_line_pointer; /* Save line pointer. */
-+ input_line_pointer = str;
-+ expression (exp);
-+ s = input_line_pointer;
-+ input_line_pointer = tmp; /* Restore line pointer. */
-+
-+ return s; /* Return pointer to where parsing stopped. */
-+}
-+
-+void
-+nds32_start_line_hook (void)
-+{
-+}
-+
-+/* Pseudo opcodes. */
-+
-+typedef void (*nds32_pseudo_opcode_func) (int argc, char *argv[], int pv);
-+struct nds32_pseudo_opcode
-+{
-+ const char *opcode;
-+ int argc;
-+ nds32_pseudo_opcode_func proc;
-+ int pseudo_val;
-+
-+ /* Some instructions are not pseudo opcode, but they might still be
-+ expanded or changed with other instruction combination for some
-+ conditions. We also apply this structure to assist such work.
-+
-+ For example, if the distance of branch target '.L0' is larger than
-+ imm8s<<1 range,
-+
-+ the instruction:
-+
-+ beqzs8 .L0
-+
-+ will be transformed into:
-+
-+ bnezs8 .LCB0
-+ j .L0
-+ .LCB0:
-+
-+ However, sometimes we do not want assembler to do such changes
-+ because compiler knows how to generate corresponding instruction sequence.
-+ Use this field to indicate that this opcode is also a physical instruction.
-+ If the flag 'verbatim' is nozero and this opcode
-+ is a physical instruction, we should not expand it. */
-+ int physical_op;
-+};
-+#define PV_DONT_CARE 0
-+
-+static struct hash_control *nds32_pseudo_opcode_hash = NULL;
-+
-+static int
-+builtin_isreg (const char *s, const char *x ATTRIBUTE_UNUSED)
-+{
-+ if (s [0] == '$' && hash_find (nds32_gprs_hash, (s + 1)))
-+ return 1;
-+ return 0;
-+}
-+
-+static int
-+builtin_regnum (const char *s, const char *x ATTRIBUTE_UNUSED)
-+{
-+ struct nds32_keyword *k;
-+ if (*s != '$')
-+ return -1;
-+ s++;
-+ k = hash_find (nds32_gprs_hash, s);
-+
-+ if (k == NULL)
-+ return -1;
-+
-+ return k->value;
-+}
-+
-+static int
-+builtin_addend (const char *s, char *x ATTRIBUTE_UNUSED)
-+{
-+ const char *ptr = s;
-+
-+ while (*ptr != '+' && *ptr != '-' && *ptr)
-+ ++ptr;
-+
-+ if (*ptr == 0)
-+ return 0;
-+ else
-+ return strtol (ptr, NULL, 0);
-+}
-+
-+static void
-+md_assemblef (char *format, ...)
-+{
-+ /* FIXME: hope this is long enough. */
-+ char line[1024];
-+ va_list ap;
-+ unsigned int r;
-+
-+ va_start (ap, format);
-+ r = vsnprintf (line, sizeof (line), format, ap);
-+ md_assemble (line);
-+
-+ gas_assert (r < sizeof (line));
-+}
-+
-+/* Some prototypes here, since some op may use another op. */
-+static void do_pseudo_li_internal (char *rt, int imm32s);
-+static void do_pseudo_move_reg_internal (char *dst, char *src);
-+
-+static void
-+do_pseudo_b (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ char *arg_label = argv[0];
-+ relaxing = TRUE;
-+ /* b label */
-+ if (nds32_pic)
-+ {
-+ md_assemblef ("sethi $ta,hi20(%s)", arg_label);
-+ md_assemblef ("ori $ta,$ta,lo12(%s)", arg_label);
-+ md_assemble ("add $ta,$ta,$gp");
-+ md_assemble ("jr $ta");
-+ }
-+ else
-+ {
-+ md_assemblef ("j %s", arg_label);
-+ }
-+ relaxing = FALSE;
-+}
-+
-+static void
-+do_pseudo_bal (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ char *arg_label = argv[0];
-+ relaxing = TRUE;
-+ /* bal|call label */
-+ if (nds32_pic)
-+ {
-+ md_assemblef ("sethi $ta,hi20(%s)", arg_label);
-+ md_assemblef ("ori $ta,$ta,lo12(%s)", arg_label);
-+ md_assemble ("add $ta,$ta,$gp");
-+ md_assemble ("jral $ta");
-+ }
-+ else
-+ {
-+ md_assemblef ("jal %s", arg_label);
-+ }
-+ relaxing = FALSE;
-+}
-+
-+static void
-+do_pseudo_bge (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ /* rt5, ra5, label */
-+ md_assemblef ("slt $ta,%s,%s", argv[0], argv[1]);
-+ md_assemblef ("beqz $ta,%s", argv[2]);
-+}
-+
-+static void
-+do_pseudo_bges (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ /* rt5, ra5, label */
-+ md_assemblef ("slts $ta,%s,%s", argv[0], argv[1]);
-+ md_assemblef ("beqz $ta,%s", argv[2]);
-+}
-+
-+static void
-+do_pseudo_bgt (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ /* bgt rt5, ra5, label */
-+ md_assemblef ("slt $ta,%s,%s", argv[1], argv[0]);
-+ md_assemblef ("bnez $ta,%s", argv[2]);
-+}
-+
-+static void
-+do_pseudo_bgts (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ /* bgt rt5, ra5, label */
-+ md_assemblef ("slts $ta,%s,%s", argv[1], argv[0]);
-+ md_assemblef ("bnez $ta,%s", argv[2]);
-+}
-+
-+static void
-+do_pseudo_ble (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ /* bgt rt5, ra5, label */
-+ md_assemblef ("slt $ta,%s,%s", argv[1], argv[0]);
-+ md_assemblef ("beqz $ta,%s", argv[2]);
-+}
-+
-+static void
-+do_pseudo_bles (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ /* bgt rt5, ra5, label */
-+ md_assemblef ("slts $ta,%s,%s", argv[1], argv[0]);
-+ md_assemblef ("beqz $ta,%s", argv[2]);
-+}
-+
-+static void
-+do_pseudo_blt (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ /* rt5, ra5, label */
-+ md_assemblef ("slt $ta,%s,%s", argv[0], argv[1]);
-+ md_assemblef ("bnez $ta,%s", argv[2]);
-+}
-+
-+static void
-+do_pseudo_blts (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ /* rt5, ra5, label */
-+ md_assemblef ("slts $ta,%s,%s", argv[0], argv[1]);
-+ md_assemblef ("bnez $ta,%s", argv[2]);
-+}
-+
-+static void
-+do_pseudo_br (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ md_assemblef ("jr %s", argv[0]);
-+}
-+
-+static void
-+do_pseudo_bral (int argc, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ if (argc == 1)
-+ md_assemblef ("jral $lp,%s", argv[0]);
-+ else
-+ md_assemblef ("jral %s,%s", argv[0], argv[1]);
-+}
-+
-+static void
-+do_pseudo_la_internal (const char *arg_reg, char *arg_label,
-+ const char *line)
-+{
-+ expressionS exp;
-+
-+ parse_expression (arg_label, &exp);
-+ if (exp.X_op != O_symbol)
-+ {
-+ as_bad (_("la must use with symbol. '%s'"), line);
-+ return;
-+ }
-+
-+ relaxing = TRUE;
-+ /* rt, label */
-+ if (!nds32_pic && !strstr (arg_label, "@"))
-+ {
-+ md_assemblef ("sethi %s,hi20(%s)", arg_reg, arg_label);
-+ md_assemblef ("ori %s,%s,lo12(%s)", arg_reg, arg_reg, arg_label);
-+ }
-+ else if (strstr (arg_label, "@ICT"))
-+ {
-+ md_assemblef ("sethi %s,hi20(%s)", arg_reg, arg_label);
-+ md_assemblef ("ori %s,%s,lo12(%s)", arg_reg, arg_reg, arg_label);
-+ }
-+ else if (strstr (arg_label, "@TPOFF"))
-+ {
-+ /* la $rt, sym@TPOFF */
-+ md_assemblef ("sethi $ta,hi20(%s)", arg_label);
-+ md_assemblef ("ori $ta,$ta,lo12(%s)", arg_label);
-+ md_assemblef ("add %s,$ta,%s", arg_reg, TLS_REG);
-+ }
-+ else if (strstr (arg_label, "@GOTTPOFF"))
-+ {
-+ /* la $rt, sym@GOTTPOFF*/
-+ md_assemblef ("sethi $ta,hi20(%s)", arg_label);
-+ md_assemblef ("lwi $ta,[$ta+lo12(%s)]", arg_label);
-+ md_assemblef ("add %s,$ta,%s", arg_reg, TLS_REG);
-+ }
-+ else if (nds32_pic && ((strstr (arg_label, "@PLT")
-+ || strstr (arg_label, "@GOTOFF"))))
-+ {
-+ md_assemblef ("sethi $ta,hi20(%s)", arg_label);
-+ md_assemblef ("ori $ta,$ta,lo12(%s)", arg_label);
-+ md_assemblef ("add %s,$ta,$gp", arg_reg);
-+ }
-+ else if (nds32_pic && strstr (arg_label, "@GOT"))
-+ {
-+ long addend = builtin_addend (arg_label, NULL);
-+
-+ md_assemblef ("sethi $ta,hi20(%s)", arg_label);
-+ md_assemblef ("ori $ta,$ta,lo12(%s)", arg_label);
-+ md_assemblef ("lw %s,[$gp+$ta]", arg_reg);
-+ if (addend != 0)
-+ {
-+ if (addend < 0x4000 && addend >= -0x4000)
-+ {
-+ md_assemblef ("addi %s,%s,%d", arg_reg, arg_reg, addend);
-+ }
-+ else
-+ {
-+ do_pseudo_li_internal ("$ta", addend);
-+ md_assemblef ("add %s,$ta,%s", arg_reg, arg_reg);
-+ }
-+ }
-+ }
-+ else
-+ as_bad (_("need PIC qualifier with symbol. '%s'"), line);
-+ relaxing = FALSE;
-+}
-+
-+static void
-+do_pseudo_la (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ do_pseudo_la_internal (argv[0], argv[1], argv[argc]);
-+}
-+
-+static void
-+do_pseudo_li_internal (char *rt, int imm32s)
-+{
-+ if (enable_16bit && imm32s <= 0xf && imm32s >= -0x10)
-+ md_assemblef ("movi55 %s,%d", rt, imm32s);
-+ else if (imm32s <= 0x7ffff && imm32s >= -0x80000)
-+ md_assemblef ("movi %s,%d", rt, imm32s);
-+ else if ((imm32s & 0xfff) == 0)
-+ md_assemblef ("sethi %s,hi20(%d)", rt, imm32s);
-+ else
-+ {
-+ md_assemblef ("sethi %s,hi20(%d)", rt, imm32s);
-+ md_assemblef ("ori %s,%s,lo12(%d)", rt, rt, imm32s);
-+ }
-+}
-+
-+static void
-+do_pseudo_li (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ /* Validate argv[1] for constant expression. */
-+ expressionS exp;
-+
-+ parse_expression (argv[1], &exp);
-+ if (exp.X_op != O_constant)
-+ {
-+ as_bad (_("Operand is not a constant. `%s'"), argv[argc]);
-+ return;
-+ }
-+
-+ do_pseudo_li_internal (argv[0], exp.X_add_number);
-+}
-+
-+static void
-+do_pseudo_ls_bhw (int argc ATTRIBUTE_UNUSED, char *argv[], int pv)
-+{
-+ char ls = 'r';
-+ char size = 'x';
-+ const char *sign = "";
-+
-+ /* Prepare arguments for various load/store. */
-+ sign = (pv & 0x10) ? "s" : "";
-+ ls = (pv & 0x80000000) ? 's' : 'l';
-+ switch (pv & 0x3)
-+ {
-+ case 0: size = 'b'; break;
-+ case 1: size = 'h'; break;
-+ case 2: size = 'w'; break;
-+ }
-+
-+ if (ls == 's' || size == 'w')
-+ sign = "";
-+
-+ if (builtin_isreg (argv[1], NULL))
-+ {
-+ /* lwi */
-+ md_assemblef ("%c%ci %s,[%s]", ls, size, argv[0], argv[1]);
-+ }
-+ else if (!nds32_pic)
-+ {
-+ relaxing = TRUE;
-+ if (strstr (argv[1], "@TPOFF"))
-+ {
-+ /* ls.w $rt, sym@TPOFF */
-+ md_assemblef ("sethi $ta,hi20(%s)", argv[1]);
-+ md_assemblef ("ori $ta,$ta,lo12(%s)", argv[1]);
-+ md_assemblef ("%c%c%s %s,[$ta+%s]", ls, size, sign, argv[0], TLS_REG);
-+ }
-+ else if (strstr (argv[1], "@GOTTPOFF"))
-+ {
-+ /* ls.w $rt, sym@GOTTPOFF */
-+ md_assemblef ("sethi $ta,hi20(%s)", argv[1]);
-+ md_assemblef ("lwi $ta,[$ta+lo12(%s)]", argv[1]);
-+ md_assemblef ("%c%c%s %s,[$ta+%s]", ls, size, sign, argv[0], TLS_REG);
-+ }
-+ else
-+ {
-+ /* lwi */
-+ md_assemblef ("sethi $ta,hi20(%s)", argv[1]);
-+ md_assemblef ("%c%c%si %s,[$ta+lo12(%s)]", ls, size, sign, argv[0], argv[1]);
-+ }
-+ relaxing = FALSE;
-+ }
-+ else
-+ {
-+ relaxing = TRUE;
-+ /* PIC code. */
-+ if (strstr (argv[1], "@GOTOFF"))
-+ {
-+ /* lw */
-+ md_assemblef ("sethi $ta,hi20(%s)", argv[1]);
-+ md_assemblef ("ori $ta,$ta,lo12(%s)", argv[1]);
-+ md_assemblef ("%c%c%s %s,[$ta+$gp]", ls, size, sign, argv[0]);
-+ }
-+ else if (strstr (argv[1], "@GOT"))
-+ {
-+ long addend = builtin_addend (argv[1], NULL);
-+ /* lw */
-+ md_assemblef ("sethi $ta,hi20(%s)", argv[1]);
-+ md_assemblef ("ori $ta,$ta,lo12(%s)", argv[1]);
-+ md_assemble ("lw $ta,[$gp+$ta]"); /* Load address word. */
-+ if (addend < 0x10000 && addend >= -0x10000)
-+ {
-+ md_assemblef ("%c%c%si %s,[$ta+(%d)]", ls, size, sign, argv[0], addend);
-+ }
-+ else
-+ {
-+ /* lw */
-+ do_pseudo_li_internal (argv[0], addend);
-+ md_assemblef ("%c%c%s %s,[$ta+%s]", ls, size, sign, argv[0], argv[0]);
-+ }
-+ }
-+ else
-+ {
-+ as_bad (_("needs @GOT or @GOTOFF. %s"), argv[argc]);
-+ }
-+ relaxing = FALSE;
-+ }
-+}
-+
-+static void
-+do_pseudo_ls_bhwp (int argc ATTRIBUTE_UNUSED, char *argv[], int pv)
-+{
-+ char *arg_rt = argv[0];
-+ char *arg_label = argv[1];
-+ char *arg_inc = argv[2];
-+ char ls = 'r';
-+ char size = 'x';
-+ const char *sign = "";
-+
-+ /* Prepare arguments for various load/store. */
-+ sign = (pv & 0x10) ? "s" : "";
-+ ls = (pv & 0x80000000) ? 's' : 'l';
-+ switch (pv & 0x3)
-+ {
-+ case 0: size = 'b'; break;
-+ case 1: size = 'h'; break;
-+ case 2: size = 'w'; break;
-+ }
-+
-+ if (ls == 's' || size == 'w')
-+ sign = "";
-+
-+ do_pseudo_la_internal ("$ta", arg_label, argv[argc]);
-+ md_assemblef ("%c%c%si.bi %s,[$ta],%s", ls, size, sign, arg_rt, arg_inc);
-+}
-+
-+static void
-+do_pseudo_ls_bhwpc (int argc ATTRIBUTE_UNUSED, char *argv[], int pv)
-+{
-+ char *arg_rt = argv[0];
-+ char *arg_inc = argv[1];
-+ char ls = 'r';
-+ char size = 'x';
-+ const char *sign = "";
-+
-+ /* Prepare arguments for various load/store. */
-+ sign = (pv & 0x10) ? "s" : "";
-+ ls = (pv & 0x80000000) ? 's' : 'l';
-+ switch (pv & 0x3)
-+ {
-+ case 0: size = 'b'; break;
-+ case 1: size = 'h'; break;
-+ case 2: size = 'w'; break;
-+ }
-+
-+ if (ls == 's' || size == 'w')
-+ sign = "";
-+
-+ md_assemblef ("%c%c%si.bi %s,[$ta],%s", ls, size, sign, arg_rt, arg_inc);
-+}
-+
-+static void
-+do_pseudo_ls_bhwi (int argc ATTRIBUTE_UNUSED, char *argv[], int pv)
-+{
-+ char ls = 'r';
-+ char size = 'x';
-+ const char *sign = "";
-+
-+ /* Prepare arguments for various load/store. */
-+ sign = (pv & 0x10) ? "s" : "";
-+ ls = (pv & 0x80000000) ? 's' : 'l';
-+ switch (pv & 0x3)
-+ {
-+ case 0: size = 'b'; break;
-+ case 1: size = 'h'; break;
-+ case 2: size = 'w'; break;
-+ }
-+
-+ if (ls == 's' || size == 'w')
-+ sign = "";
-+
-+ md_assemblef ("%c%c%si.bi %s,%s,%s",
-+ ls, size, sign, argv[0], argv[1], argv[2]);
-+}
-+
-+static void
-+do_pseudo_move_reg_internal (char *dst, char *src)
-+{
-+ if (enable_16bit)
-+ md_assemblef ("mov55 %s,%s", dst, src);
-+ else
-+ md_assemblef ("ori %s,%s,0", dst, src);
-+}
-+
-+static void
-+do_pseudo_move (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ expressionS exp;
-+
-+ if (builtin_isreg (argv[1], NULL))
-+ do_pseudo_move_reg_internal (argv[0], argv[1]);
-+ else
-+ {
-+ parse_expression (argv[1], &exp);
-+ if (exp.X_op == O_constant)
-+ /* move $rt, imm -> li $rt, imm */
-+ do_pseudo_li_internal (argv[0], exp.X_add_number);
-+ else
-+ /* l.w $rt, var -> l.w $rt, var */
-+ do_pseudo_ls_bhw (argc, argv, 2);
-+ }
-+}
-+
-+static void
-+do_pseudo_neg (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ /* Instead of "subri". */
-+ md_assemblef ("subri %s,%s,0", argv[0], argv[1]);
-+}
-+
-+static void
-+do_pseudo_not (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ md_assemblef ("nor %s,%s,%s", argv[0], argv[1], argv[1]);
-+}
-+
-+static void
-+do_pseudo_pushpopm (int argc, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ /* posh/pop $ra, $rb */
-+ /* SMW.{b | a}{i | d}{m?} Rb, [Ra], Re, Enable4 */
-+ int rb, re, ra, en4;
-+ int i;
-+ char *opc = "pushpopm";
-+
-+ if (argc == 3)
-+ as_bad ("'pushm/popm $ra5, $rb5, $label' is deprecated. "
-+ "Only 'pushm/popm $ra5' is supported now. %s", argv[argc]);
-+ else if (argc == 1)
-+ as_bad ("'pushm/popm $ra5, $rb5'. %s\n", argv[argc]);
-+
-+ if (strstr (argv[argc], "pop") == argv[argc])
-+ opc = "lmw.bim";
-+ else if (strstr (argv[argc], "push") == argv[argc])
-+ opc = "smw.adm";
-+ else
-+ as_fatal ("nds32-as internal error. %s", argv[argc]);
-+
-+ rb = builtin_regnum (argv[0], NULL);
-+ re = builtin_regnum (argv[1], NULL);
-+
-+ if (re < rb)
-+ {
-+ as_warn ("$rb should not be smaller than $ra. %s", argv[argc]);
-+ /* Swap to right order. */
-+ ra = re;
-+ re = rb;
-+ rb = ra;
-+ }
-+
-+ /* Build enable4 mask. */
-+ en4 = 0;
-+ if (re >= 28 || rb >= 28)
-+ {
-+ for (i = (rb >= 28? rb: 28); i <= re; i++)
-+ en4 |= 1 << (3 - (i - 28));
-+ }
-+
-+ /* Adjust $re, $rb. */
-+ if (rb >= 28)
-+ rb = re = 31;
-+ else if (nds32_gpr16 != 1 && re >= 28)
-+ re = 27;
-+
-+ /* Reduce register. */
-+ if (nds32_gpr16 && re > 10 && !(rb == 31 && re == 31))
-+ {
-+ if (re >= 15 && strstr (opc, "smw") != NULL)
-+ md_assemblef ("%s $r15,[$sp],$r15,%d", opc, en4);
-+ if (rb <= 10)
-+ md_assemblef ("%s $r%d,[$sp],$r10, 0x0", opc, rb);
-+ if (re >= 15 && strstr (opc, "lmw") != NULL)
-+ md_assemblef ("%s $r15,[$sp],$r15,%d", opc, en4);
-+ }
-+ else
-+ md_assemblef ("%s $r%d,[$sp],$r%d,%d", opc, rb, re, en4);
-+}
-+
-+static void
-+do_pseudo_pushpop (int argc, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ /* push/pop $ra5, $label=$sp */
-+ char *argvm[3];
-+
-+ if (argc == 2)
-+ as_bad ("'push/pop $ra5, rb5' is deprecated. "
-+ "Only 'push/pop $ra5' is supported now. %s", argv[argc]);
-+
-+ argvm[0] = argv[0];
-+ argvm[1] = argv[0];
-+ argvm[2] = argv[argc];
-+ do_pseudo_pushpopm (2, argvm, PV_DONT_CARE);
-+}
-+
-+static void
-+do_pseudo_v3push (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ md_assemblef ("push25 %s,%s", argv[0], argv[1]);
-+}
-+
-+static void
-+do_pseudo_v3pop (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ md_assemblef ("pop25 %s,%s", argv[0], argv[1]);
-+}
-+
-+/* pv == 0, parsing "push.s" pseudo instruction operands.
-+ pv != 0, parsing "pop.s" pseudo instruction operands. */
-+
-+static void
-+do_pseudo_pushpop_stack (int argc, char *argv[], int pv)
-+{
-+ /* push.s Rb,Re,{$fp $gp $lp $sp} ==> smw.adm Rb,[$sp],Re,Eable4 */
-+ /* pop.s Rb,Re,{$fp $gp $lp $sp} ==> lmw.bim Rb,[$sp],Re,Eable4 */
-+
-+ int rb, re;
-+ int en4;
-+ int last_arg_index;
-+ const char *opc = (pv == 0) ? "smw.adm" : "lmw.bim";
-+
-+ rb = re = 0;
-+
-+ if (argc == 1)
-+ {
-+ /* argc=1, operands pattern: { $fp $gp $lp $sp } */
-+
-+ /* Set register number Rb = Re = $sp = $r31. */
-+ rb = re = 31;
-+ }
-+ else if (argc == 2 || argc == 3)
-+ {
-+ /* argc=2, operands pattern: Rb, Re */
-+ /* argc=3, operands pattern: Rb, Re, { $fp $gp $lp $sp } */
-+
-+ /* Get register number in integer. */
-+ rb = builtin_regnum (argv[0], NULL);
-+ re = builtin_regnum (argv[1], NULL);
-+
-+ /* Rb should be equal/less than Re. */
-+ if (rb > re)
-+ as_bad ("The first operand (%s) should be equal to or smaller than "
-+ "second operand (%s).", argv[0], argv[1]);
-+
-+ /* forbid using $fp|$gp|$lp|$sp in Rb or Re
-+ r28 r29 r30 r31 */
-+ if (rb >= 28)
-+ as_bad ("Cannot use $fp, $gp, $lp, or $sp at first operand !!");
-+ if (re >= 28)
-+ as_bad ("Cannot use $fp, $gp, $lp, or $sp at second operand !!");
-+ }
-+ else
-+ {
-+ as_bad ("Invalid operands pattern !!");
-+ }
-+
-+ /* Build Enable4 mask. */
-+ /* Using last_arg_index for argc=1|2|3 is safe, because $fp, $gp, $lp,
-+ and $sp only appear in argc=1 or argc=3 if argc=2, en4 remains 0,
-+ which is also valid for code generation. */
-+ en4 = 0;
-+ last_arg_index = argc - 1;
-+ if (strstr (argv[last_arg_index], "$fp"))
-+ en4 |= 8;
-+ if (strstr (argv[last_arg_index], "$gp"))
-+ en4 |= 4;
-+ if (strstr (argv[last_arg_index], "$lp"))
-+ en4 |= 2;
-+ if (strstr (argv[last_arg_index], "$sp"))
-+ en4 |= 1;
-+
-+ md_assemblef ("%s $r%d,[$sp],$r%d,%d", opc, rb, re, en4);
-+}
-+
-+static void
-+do_pseudo_push_bhwd (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ char size = 'x';
-+ /* If users omit push location, use $sp as default value. */
-+ char location[8] = "$sp"; /* 8 is enough for register name. */
-+
-+ switch (pv & 0x3)
-+ {
-+ case 0: size = 'b'; break;
-+ case 1: size = 'h'; break;
-+ case 2: size = 'w'; break;
-+ case 3: size = 'w'; break;
-+ }
-+
-+ if (argc == 2)
-+ {
-+ strncpy (location, argv[1], 8);
-+ location[7] = '\0';
-+ }
-+
-+ md_assemblef ("l.%c $ta,%s", size, argv[0]);
-+ md_assemblef ("smw.adm $ta,[%s],$ta", location);
-+
-+ if ((pv & 0x3) == 0x3) /* double-word */
-+ {
-+ md_assemblef ("l.w $ta,%s+4", argv[0]);
-+ md_assemblef ("smw.adm $ta,[%s],$ta", location);
-+ }
-+}
-+
-+static void
-+do_pseudo_pop_bhwd (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ char size = 'x';
-+ /* If users omit pop location, use $sp as default value. */
-+ char location[8] = "$sp"; /* 8 is enough for register name. */
-+
-+ switch (pv & 0x3)
-+ {
-+ case 0: size = 'b'; break;
-+ case 1: size = 'h'; break;
-+ case 2: size = 'w'; break;
-+ case 3: size = 'w'; break;
-+ }
-+
-+ if (argc == 3)
-+ {
-+ strncpy (location, argv[2], 8);
-+ location[7] = '\0';
-+ }
-+
-+ if ((pv & 0x3) == 0x3) /* double-word */
-+ {
-+ md_assemblef ("lmw.bim %s,[%s],%s", argv[1], location, argv[1]);
-+ md_assemblef ("s.w %s,%s+4", argv[1], argv[0]);
-+ }
-+
-+ md_assemblef ("lmw.bim %s,[%s],%s", argv[1], location, argv[1]);
-+ md_assemblef ("s.%c %s,%s", size, argv[1], argv[0]);
-+}
-+
-+static void
-+do_pseudo_pusha (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ /* If users omit push location, use $sp as default value. */
-+ char location[8] = "$sp"; /* 8 is enough for register name. */
-+
-+ if (argc == 2)
-+ {
-+ strncpy (location, argv[1], 8);
-+ location[7] = '\0';
-+ }
-+
-+ md_assemblef ("la $ta,%s", argv[0]);
-+ md_assemblef ("smw.adm $ta,[%s],$ta", location);
-+}
-+
-+static void
-+do_pseudo_pushi (int argc ATTRIBUTE_UNUSED, char *argv[], int pv ATTRIBUTE_UNUSED)
-+{
-+ /* If users omit push location, use $sp as default value. */
-+ char location[8] = "$sp"; /* 8 is enough for register name. */
-+
-+ if (argc == 2)
-+ {
-+ strncpy (location, argv[1], 8);
-+ location[7] = '\0';
-+ }
-+
-+ md_assemblef ("li $ta,%s", argv[0]);
-+ md_assemblef ("smw.adm $ta,[%s],$ta", location);
-+}
-+
-+static struct nds32_pseudo_opcode nds32_pseudo_opcode_table[] = {
-+ {"b", 1, do_pseudo_b, 0, 0},
-+ {"bal", 1, do_pseudo_bal, 0, 0},
-+
-+ {"bge", 3, do_pseudo_bge, 0, 0},
-+ {"bges", 3, do_pseudo_bges, 0, 0},
-+
-+ {"bgt", 3, do_pseudo_bgt, 0, 0},
-+ {"bgts", 3, do_pseudo_bgts, 0, 0},
-+
-+ {"ble", 3, do_pseudo_ble, 0, 0},
-+ {"bles", 3, do_pseudo_bles, 0, 0},
-+
-+ {"blt", 3, do_pseudo_blt, 0, 0},
-+ {"blts", 3, do_pseudo_blts, 0, 0},
-+
-+ {"br", 1, do_pseudo_br, 0, 0},
-+ {"bral", 1, do_pseudo_bral, 0, 0},
-+
-+ {"call", 1, do_pseudo_bal, 0, 0},
-+
-+ {"la", 2, do_pseudo_la, 0, 0},
-+ {"li", 2, do_pseudo_li, 0, 0},
-+
-+ {"l.b", 2, do_pseudo_ls_bhw, 0, 0},
-+ {"l.h", 2, do_pseudo_ls_bhw, 1, 0},
-+ {"l.w", 2, do_pseudo_ls_bhw, 2, 0},
-+ {"l.bs", 2, do_pseudo_ls_bhw, 0 | 0x10, 0},
-+ {"l.hs", 2, do_pseudo_ls_bhw, 1 | 0x10, 0},
-+ {"s.b", 2, do_pseudo_ls_bhw, 0 | 0x80000000, 0},
-+ {"s.h", 2, do_pseudo_ls_bhw, 1 | 0x80000000, 0},
-+ {"s.w", 2, do_pseudo_ls_bhw, 2 | 0x80000000, 0},
-+
-+ {"l.bp", 3, do_pseudo_ls_bhwp, 0, 0},
-+ {"l.bpc", 3, do_pseudo_ls_bhwpc, 0, 0},
-+ {"l.hp", 3, do_pseudo_ls_bhwp, 1, 0},
-+ {"l.hpc", 3, do_pseudo_ls_bhwpc, 1, 0},
-+ {"l.wp", 3, do_pseudo_ls_bhwp, 2, 0},
-+ {"l.wpc", 3, do_pseudo_ls_bhwpc, 2, 0},
-+ {"l.bsp", 3, do_pseudo_ls_bhwp, 0 | 0x10, 0},
-+ {"l.bspc", 3, do_pseudo_ls_bhwpc, 0 | 0x10, 0},
-+ {"l.hsp", 3, do_pseudo_ls_bhwp, 1 | 0x10, 0},
-+ {"l.hspc", 3, do_pseudo_ls_bhwpc, 1 | 0x10, 0},
-+ {"s.bp", 3, do_pseudo_ls_bhwp, 0 | 0x80000000, 0},
-+ {"s.bpc", 3, do_pseudo_ls_bhwpc, 0 | 0x80000000, 0},
-+ {"s.hp", 3, do_pseudo_ls_bhwp, 1 | 0x80000000, 0},
-+ {"s.hpc", 3, do_pseudo_ls_bhwpc, 1 | 0x80000000, 0},
-+ {"s.wp", 3, do_pseudo_ls_bhwp, 2 | 0x80000000, 0},
-+ {"s.wpc", 3, do_pseudo_ls_bhwpc, 2 | 0x80000000, 0},
-+ {"s.bsp", 3, do_pseudo_ls_bhwp, 0 | 0x80000000 | 0x10, 0},
-+ {"s.hsp", 3, do_pseudo_ls_bhwp, 1 | 0x80000000 | 0x10, 0},
-+
-+ {"lbi.p", 3, do_pseudo_ls_bhwi, 0, 0},
-+ {"lhi.p", 3, do_pseudo_ls_bhwi, 1, 0},
-+ {"lwi.p", 3, do_pseudo_ls_bhwi, 2, 0},
-+ {"sbi.p", 3, do_pseudo_ls_bhwi, 0 | 0x80000000, 0},
-+ {"shi.p", 3, do_pseudo_ls_bhwi, 1 | 0x80000000, 0},
-+ {"swi.p", 3, do_pseudo_ls_bhwi, 2 | 0x80000000, 0},
-+ {"lbsi.p", 3, do_pseudo_ls_bhwi, 0 | 0x10, 0},
-+ {"lhsi.p", 3, do_pseudo_ls_bhwi, 1 | 0x10, 0},
-+ {"lwsi.p", 3, do_pseudo_ls_bhwi, 2 | 0x10, 0},
-+
-+ {"move", 2, do_pseudo_move, 0, 0},
-+ {"neg", 2, do_pseudo_neg, 0, 0},
-+ {"not", 2, do_pseudo_not, 0, 0},
-+
-+ {"pop", 2, do_pseudo_pushpop, 0, 0},
-+ {"push", 2, do_pseudo_pushpop, 0, 0},
-+ {"popm", 2, do_pseudo_pushpopm, 0, 0},
-+ {"pushm", 3, do_pseudo_pushpopm, 0, 0},
-+
-+ {"v3push", 2, do_pseudo_v3push, 0, 0},
-+ {"v3pop", 2, do_pseudo_v3pop, 0, 0},
-+
-+ /* Support pseudo instructions of pushing/poping registers into/from stack
-+ push.s Rb, Re, { $fp $gp $lp $sp } ==> smw.adm Rb,[$sp],Re,Enable4
-+ pop.s Rb, Re, { $fp $gp $lp $sp } ==> lmw.bim Rb,[$sp],Re,Enable4 */
-+ { "push.s", 3, do_pseudo_pushpop_stack, 0, 0 },
-+ { "pop.s", 3, do_pseudo_pushpop_stack, 1, 0 },
-+ { "push.b", 2, do_pseudo_push_bhwd, 0, 0 },
-+ { "push.h", 2, do_pseudo_push_bhwd, 1, 0 },
-+ { "push.w", 2, do_pseudo_push_bhwd, 2, 0 },
-+ { "push.d", 2, do_pseudo_push_bhwd, 3, 0 },
-+ { "pop.b", 3, do_pseudo_pop_bhwd, 0, 0 },
-+ { "pop.h", 3, do_pseudo_pop_bhwd, 1, 0 },
-+ { "pop.w", 3, do_pseudo_pop_bhwd, 2, 0 },
-+ { "pop.d", 3, do_pseudo_pop_bhwd, 3, 0 },
-+ { "pusha", 2, do_pseudo_pusha, 0, 0 },
-+ { "pushi", 2, do_pseudo_pushi, 0, 0 },
-+
-+ {NULL, 0, NULL, 0, 0}
-+};
-+
-+static void
-+nds32_init_nds32_pseudo_opcodes (void)
-+{
-+ struct nds32_pseudo_opcode *opcode = nds32_pseudo_opcode_table;
-+
-+ nds32_pseudo_opcode_hash = hash_new ();
-+ for ( ; opcode->opcode; opcode++)
-+ {
-+ void *op;
-+
-+ op = hash_find (nds32_pseudo_opcode_hash, opcode->opcode);
-+ if (op != NULL)
-+ {
-+ as_warn (_("Duplicated pseudo-opcode %s."), opcode->opcode);
-+ continue;
-+ }
-+ hash_insert (nds32_pseudo_opcode_hash, opcode->opcode, opcode);
-+ }
-+}
-+
-+static struct nds32_pseudo_opcode *
-+nds32_lookup_pseudo_opcode (char *str)
-+{
-+ int i = 0;
-+ /* *op = first word of current source line (*str) */
-+ int maxlen = strlen (str);
-+ char *op = alloca (maxlen + 1);
-+
-+ for (i = 0; i < maxlen; i++)
-+ {
-+ if (ISSPACE (op[i] = str[i]))
-+ break;
-+ }
-+
-+ op[i] = '\0';
-+
-+ return hash_find (nds32_pseudo_opcode_hash, op);
-+}
-+
-+static void
-+nds32_pseudo_opcode_wrapper (char *line, struct nds32_pseudo_opcode *opcode)
-+{
-+ int argc = 0;
-+ char *argv[8] = {NULL};
-+ char *s;
-+ char *str = xstrdup (line);
-+
-+ /* Parse arguments for opcode. */
-+ s = str + strlen (opcode->opcode);
-+
-+ if (!s[0])
-+ goto end;
-+
-+ /* Dummy comma to ease separate arguments as below. */
-+ s[0] = ',';
-+ do
-+ {
-+ if (s[0] == ',')
-+ {
-+ if (argc >= opcode->argc
-+ || (argc >= (int)ARRAY_SIZE (argv) - 1))
-+ as_bad (_("Too many argument. `%s'"), line);
-+
-+ argv[argc] = s + 1;
-+ argc ++;
-+ s[0] = '\0';
-+ }
-+ ++s;
-+ } while (s[0] != '\0');
-+end:
-+ /* Put the origin line for debugging. */
-+ argv[argc] = line;
-+ opcode->proc (argc, argv, opcode->pseudo_val);
-+ free (str);
-+}
-+
-+/* This function will be invoked from function `nds32_after_parse_args'.
-+ Thus, if the value of option has been set, keep the value the way it is. */
-+
-+static int
-+nds32_parse_arch (char *str)
-+{
-+ static const struct nds32_arch
-+ {
-+ const char *name;
-+ int baseline;
-+ int reduced_reg;
-+ int fpu_sp_ext;
-+ int fpu_dp_ext;
-+ int fpu_freg;
-+ int abi;
-+ } archs[] =
-+ {
-+ {"v3m", ISA_V3M, 1, 0, 0, E_NDS32_FPU_REG_32SP_16DP, E_NDS_ABI_AABI},
-+ {"v3j", ISA_V3, 1, 0, 0, E_NDS32_FPU_REG_32SP_16DP, E_NDS_ABI_AABI},
-+ {"v3s", ISA_V3, 0, 1, 0, E_NDS32_FPU_REG_32SP_16DP, E_NDS_ABI_V2FP_PLUS},
-+ {"v3f", ISA_V3, 0, 1, 1, E_NDS32_FPU_REG_32SP_16DP, E_NDS_ABI_V2FP_PLUS},
-+ {"v3", ISA_V3, 0, 0, 0, E_NDS32_FPU_REG_32SP_16DP, E_NDS_ABI_AABI},
-+ {"v2j", ISA_V2, 1, 0, 0, E_NDS32_FPU_REG_32SP_16DP, E_NDS_ABI_AABI},
-+ {"v2s", ISA_V2, 0, 1, 0, E_NDS32_FPU_REG_32SP_16DP, E_NDS_ABI_V2FP_PLUS},
-+ {"v2f", ISA_V2, 0, 1, 1, E_NDS32_FPU_REG_32SP_16DP, E_NDS_ABI_V2FP_PLUS},
-+ {"v2", ISA_V2, 0, 0, 0, E_NDS32_FPU_REG_32SP_16DP, E_NDS_ABI_AABI},
-+ };
-+ size_t i;
-+
-+ for (i = 0; i < ARRAY_SIZE (archs); i++)
-+ {
-+ if (strcmp (str, archs[i].name) != 0)
-+ continue;
-+
-+ /* The value `-1' represents this option has *NOT* been set. */
-+ nds32_baseline = (-1 != nds32_baseline) ? nds32_baseline : archs[i].baseline;
-+ nds32_gpr16 = (-1 != nds32_gpr16) ? nds32_gpr16 : archs[i].reduced_reg;
-+ nds32_fpu_sp_ext = (-1 != nds32_fpu_sp_ext) ? nds32_fpu_sp_ext : archs[i].fpu_sp_ext;
-+ nds32_fpu_dp_ext = (-1 != nds32_fpu_dp_ext) ? nds32_fpu_dp_ext : archs[i].fpu_dp_ext;
-+ nds32_freg = (-1 != nds32_freg) ? nds32_freg : archs[i].fpu_freg;
-+ nds32_abi = (-1 != nds32_abi) ? nds32_abi : archs[i].abi;
-+
-+ return 1;
-+ }
-+
-+ /* Logic here rejects the input arch name. */
-+ as_bad (_("unknown arch name `%s'\n"), str);
-+
-+ return 1;
-+}
-+
-+/* This function parses "baseline" specified. */
-+
-+static int
-+nds32_parse_baseline (char *str)
-+{
-+ if (strcasecmp (str, "v3") == 0)
-+ nds32_baseline = ISA_V3;
-+ else if (strcasecmp (str, "v3m") == 0)
-+ nds32_baseline = ISA_V3M;
-+ else if (strcasecmp (str, "v2") == 0)
-+ nds32_baseline = ISA_V2;
-+ else
-+ {
-+ /* Logic here rejects the input baseline. */
-+ as_bad (_("unknown baseline `%s'\n"), str);
-+ return 0;
-+ }
-+
-+ return 1;
-+}
-+
-+/* This function parses "fpu-freg" specified. */
-+
-+static int
-+nds32_parse_freg (char *str)
-+{
-+ if (strcmp (str, "2") == 0)
-+ nds32_freg = E_NDS32_FPU_REG_32SP_16DP;
-+ else if (strcmp (str, "3") == 0)
-+ nds32_freg = E_NDS32_FPU_REG_32SP_32DP;
-+ else if (strcmp (str, "1") == 0)
-+ nds32_freg = E_NDS32_FPU_REG_16SP_8DP;
-+ else if (strcmp (str, "0") == 0)
-+ nds32_freg = E_NDS32_FPU_REG_8SP_4DP;
-+ else
-+ {
-+ /* Logic here rejects the input FPU configuration. */
-+ as_bad (_("unknown FPU configuration `%s'\n"), str);
-+ return 0;
-+ }
-+
-+ return 1;
-+}
-+
-+/* This function parse "abi=" specified. */
-+
-+static int
-+nds32_parse_abi (char *str)
-+{
-+ if (strcmp (str, "v2") == 0)
-+ nds32_abi = E_NDS_ABI_AABI;
-+ /* Obsolete. */
-+ else if (strcmp (str, "v2fp") == 0)
-+ nds32_abi = E_NDS_ABI_V2FP;
-+ else if (strcmp (str, "v1") == 0)
-+ nds32_abi = E_NDS_ABI_V1;
-+ else if (strcmp (str,"v2fpp") == 0)
-+ nds32_abi = E_NDS_ABI_V2FP_PLUS;
-+ else
-+ {
-+ /* bug-10880, decided to accept any other versions but drop them. */
-+ if (TRUE)
-+ return 1;
-+ else
-+ {
-+ /* Logic here rejects the input abi version. */
-+ as_bad (_("unknown ABI version`%s'\n"), str);
-+ return 0;
-+ }
-+ }
-+
-+ return 1;
-+}
-+
-+/* This function turn on all extensions and instructions support. */
-+
-+static int
-+nds32_all_ext (void)
-+{
-+ nds32_mac = 1;
-+ nds32_div = 1;
-+ nds32_dx_regs = 1;
-+ nds32_16bit_ext = 1;
-+ nds32_perf_ext = 1;
-+ nds32_perf_ext2 = 1;
-+ nds32_string_ext = 1;
-+ nds32_audio_ext = 1;
-+ nds32_fpu_fma = 1;
-+ nds32_fpu_sp_ext = 1;
-+ nds32_fpu_dp_ext = 1;
-+ nds32_dsp_ext = 1;
-+ nds32_zol_ext = 1;
-+ /* Turn off reduced register. */
-+ nds32_gpr16 = 0;
-+
-+ return 1;
-+}
-+
-+/* GAS will call md_parse_option whenever getopt returns an unrecognized code,
-+ presumably indicating a special code value which appears in md_longopts.
-+ This function should return non-zero if it handled the option and zero
-+ otherwise. There is no need to print a message about an option not being
-+ recognized. This will be handled by the generic code. */
-+
-+int
-+nds32_parse_option (int c, char *arg)
-+{
-+ struct nds32_parse_option_table *coarse_tune;
-+ struct nds32_set_option_table *fine_tune;
-+ char *ptr_arg = NULL;
-+
-+ switch (c)
-+ {
-+ case OPTION_OPTIMIZE:
-+ optimize = 1;
-+ optimize_for_space = 0;
-+ break;
-+ case OPTION_OPTIMIZE_SPACE:
-+ optimize = 0;
-+ optimize_for_space = 1;
-+ break;
-+ case OPTION_BIG:
-+ target_big_endian = 1;
-+ break;
-+ case OPTION_LITTLE:
-+ target_big_endian = 0;
-+ break;
-+ case OPTION_TURBO:
-+ nds32_all_ext ();
-+ break;
-+ case OPTION_PIC:
-+ nds32_pic = 1;
-+ break;
-+ case OPTION_RELAX_FP_AS_GP_OFF:
-+ nds32_relax_fp_as_gp = 0;
-+ break;
-+ case OPTION_RELAX_B2BB_ON:
-+ nds32_relax_b2bb = 1;
-+ break;
-+ case OPTION_RELAX_ALL_OFF:
-+ nds32_relax_all = 0;
-+ break;
-+ default:
-+ /* Determination of which option table to search for to save time. */
-+ if (!arg)
-+ return 0;
-+
-+ ptr_arg = strchr (arg, '=');
-+
-+ if (ptr_arg)
-+ {
-+ /* Find the value after '='. */
-+ if (ptr_arg != NULL)
-+ ptr_arg++;
-+ for (coarse_tune = parse_opts; coarse_tune->name != NULL; coarse_tune++)
-+ {
-+ if (strncmp (arg, coarse_tune->name, (ptr_arg - arg)) == 0)
-+ {
-+ coarse_tune->func (ptr_arg);
-+ return 1;
-+ }
-+ }
-+ }
-+ else
-+ {
-+ int disable = 0;
-+
-+ /* Filter out the Disable option first. */
-+ if (strncmp (arg, "no-", 3) == 0)
-+ {
-+ disable = 1;
-+ arg += 3;
-+ }
-+
-+ for (fine_tune = toggle_opts; fine_tune->name != NULL; fine_tune++)
-+ {
-+ if (strcmp (arg, fine_tune->name) == 0)
-+ {
-+ if (fine_tune->var != NULL)
-+ *fine_tune->var = (disable) ? 0 : 1;
-+ return 1;
-+ }
-+ }
-+ }
-+ /* Nothing match. */
-+ return 0;
-+ }
-+
-+ return 1;
-+}
-+
-+/* tc_check_label */
-+
-+void
-+nds32_check_label (symbolS *label ATTRIBUTE_UNUSED)
-+{
-+ /* The code used to create BB is move to frob_label.
-+ They should go there. */
-+}
-+
-+static void
-+set_endian_little (int on)
-+{
-+ target_big_endian = !on;
-+}
-+
-+/* These functions toggles the generation of 16-bit. First encounter signals
-+ the beginning of not generating 16-bit instructions and next encounter
-+ signals the restoring back to default behavior. */
-+
-+static void
-+trigger_16bit (int trigger)
-+{
-+ enable_16bit = trigger;
-+}
-+
-+static int backup_16bit_mode;
-+static void
-+restore_16bit (int no_use ATTRIBUTE_UNUSED)
-+{
-+ enable_16bit = backup_16bit_mode;
-+}
-+
-+static void
-+off_16bit (int no_use ATTRIBUTE_UNUSED)
-+{
-+ backup_16bit_mode = enable_16bit;
-+ enable_16bit = 0;
-+}
-+
-+/* Built-in segments for small object. */
-+typedef struct nds32_seg_entryT
-+{
-+ segT s;
-+ const char *name;
-+ flagword flags;
-+} nds32_seg_entry;
-+
-+static nds32_seg_entry nds32_seg_table[] = {
-+ {NULL, ".sdata_f", SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
-+ | SEC_HAS_CONTENTS | SEC_SMALL_DATA},
-+ {NULL, ".sdata_b", SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
-+ | SEC_HAS_CONTENTS | SEC_SMALL_DATA},
-+ {NULL, ".sdata_h", SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
-+ | SEC_HAS_CONTENTS | SEC_SMALL_DATA},
-+ {NULL, ".sdata_w", SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
-+ | SEC_HAS_CONTENTS | SEC_SMALL_DATA},
-+ {NULL, ".sdata_d", SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
-+ | SEC_HAS_CONTENTS | SEC_SMALL_DATA},
-+ {NULL, ".sbss_f", SEC_ALLOC | SEC_SMALL_DATA},
-+ {NULL, ".sbss_b", SEC_ALLOC | SEC_SMALL_DATA},
-+ {NULL, ".sbss_h", SEC_ALLOC | SEC_SMALL_DATA},
-+ {NULL, ".sbss_w", SEC_ALLOC | SEC_SMALL_DATA},
-+ {NULL, ".sbss_d", SEC_ALLOC | SEC_SMALL_DATA}
-+};
-+
-+/* Indexes to nds32_seg_table[]. */
-+enum NDS32_SECTIONS_ENUM
-+{
-+ SDATA_F_SECTION = 0,
-+ SDATA_B_SECTION = 1,
-+ SDATA_H_SECTION = 2,
-+ SDATA_W_SECTION = 3,
-+ SDATA_D_SECTION = 4,
-+ SBSS_F_SECTION = 5,
-+ SBSS_B_SECTION = 6,
-+ SBSS_H_SECTION = 7,
-+ SBSS_W_SECTION = 8,
-+ SBSS_D_SECTION = 9
-+};
-+
-+/* The following code is borrowed from v850_seg. Revise this is needed. */
-+
-+static void
-+do_nds32_seg (int i, subsegT sub)
-+{
-+ nds32_seg_entry *seg = nds32_seg_table + i;
-+
-+ obj_elf_section_change_hook ();
-+
-+ if (seg->s != NULL)
-+ subseg_set (seg->s, sub);
-+ else
-+ {
-+ seg->s = subseg_new (seg->name, sub);
-+ if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
-+ {
-+ bfd_set_section_flags (stdoutput, seg->s, seg->flags);
-+ if ((seg->flags & SEC_LOAD) == 0)
-+ seg_info (seg->s)->bss = 1;
-+ }
-+ }
-+}
-+
-+static void
-+nds32_seg (int i)
-+{
-+ subsegT sub = get_absolute_expression ();
-+
-+ do_nds32_seg (i, sub);
-+ demand_empty_rest_of_line ();
-+}
-+
-+/* Set if label adjustment is needed. I should not adjust .xbyte in dwarf. */
-+static symbolS *nds32_last_label; /* Last label for aligment. */
-+
-+static void
-+add_mapping_symbol_for_align (int shift, valueT addr, int is_data_align)
-+{
-+ if ((shift > 1) && (addr & 1))
-+ {
-+ int n = (1 << shift) - 1;
-+ if (!is_data_align)
-+ add_mapping_symbol (MAP_CODE, 1, 0);
-+ else if ((int) (addr & n) != n)
-+ add_mapping_symbol (MAP_CODE, 1, 0);
-+ }
-+ else if ((shift > 1) && ((int) (addr & 1) == 0))
-+ add_mapping_symbol (MAP_CODE, 0, 0);
-+
-+}
-+
-+/* This code is referred from D30V for adjust label to be with pedning
-+ aligment. For example,
-+ LBYTE: .byte 0x12
-+ LHALF: .half 0x12
-+ LWORD: .word 0x12
-+ Without this, the above label will not attatch to incoming data. */
-+
-+static void
-+nds32_adjust_label (int n)
-+{
-+ /* FIXME: I think adjust lable and alignment is
-+ the programmer's obligation. Saddly, VLSI team doesn't
-+ properly use .align for their test cases.
-+ So I re-implement cons_align and auto adjust labels, again.
-+
-+ I think d30v's implmentation is simple and good enough. */
-+
-+ symbolS *label = nds32_last_label;
-+ nds32_last_label = NULL;
-+
-+ /* SEC_ALLOC is used to eliminate .debug_ sections.
-+ SEC_CODE is used to include section for ILM. */
-+ if (((now_seg->flags & SEC_ALLOC) == 0 && (now_seg->flags & SEC_CODE) == 0)
-+ || strcmp (now_seg->name, ".eh_frame") == 0
-+ || strcmp (now_seg->name, ".gcc_except_table") == 0)
-+ return;
-+
-+ /* Only frag by alignment when needed.
-+ Otherwise, it will fail to optimize labels on 4-byte boundary. (bug8454)
-+ See md_convert_frag () and RELAX_SET_RELAXABLE (frag) for details. */
-+
-+ if (frag_now_fix () & ((1 << n) -1 ))
-+ {
-+ if (subseg_text_p (now_seg))
-+ {
-+ add_mapping_symbol_for_align (n, frag_now_fix (), 1);
-+ frag_align_code (n, 0);
-+ }
-+ else
-+ frag_align (n, 0, 0);
-+
-+ /* Record the minimum alignment for this segment. */
-+ record_alignment (now_seg, n - OCTETS_PER_BYTE_POWER);
-+ }
-+
-+ if (label != NULL)
-+ {
-+ symbolS *sym;
-+ int label_seen = FALSE;
-+ struct frag *old_frag;
-+ valueT old_value, new_value;
-+
-+ gas_assert (S_GET_SEGMENT (label) == now_seg);
-+
-+ old_frag = symbol_get_frag (label);
-+ old_value = S_GET_VALUE (label);
-+ new_value = (valueT) frag_now_fix ();
-+
-+ /* Multiple labels may be on the same address. And the last symbol
-+ may not be a label at all, e.g., register name, external function names,
-+ so I have to track the last label in tc_frob_label instead of
-+ just using symbol_lastP. */
-+ for (sym = symbol_lastP; sym != NULL; sym = symbol_previous (sym))
-+ {
-+ if (symbol_get_frag (sym) == old_frag
-+ && S_GET_VALUE (sym) == old_value)
-+ {
-+ /* Warning HERE! */
-+ label_seen = TRUE;
-+ symbol_set_frag (sym, frag_now);
-+ S_SET_VALUE (sym, new_value);
-+ }
-+ else if (label_seen && symbol_get_frag (sym) != old_frag)
-+ break;
-+ }
-+ }
-+}
-+
-+void
-+nds32_cons_align (int size ATTRIBUTE_UNUSED)
-+{
-+ /* Do nothing here.
-+ This is called before `md_flush_pending_output' is called by `cons'.
-+
-+ There are two things should be done for auto-adjust-label.
-+ 1. Align data/instructions and adjust label to be attached to them.
-+ 2. Clear auto-adjust state, so incommng data/instructions will not
-+ adjust the label.
-+
-+ For example,
-+ .byte 0x1
-+ .L0:
-+ .word 0x2
-+ .word 0x3
-+ in this case, '.word 0x2' will adjust the label, .L0, but '.word 0x3' should not.
-+
-+ I think `md_flush_pending_output' is a good place to clear the auto-adjust state,
-+ but it is also called by `cons' before this function.
-+ To simplify the code, instead of overriding .zero, .fill, .space, etc,
-+ I think we should just adjust label in `nds32_aligned_X_cons' instead of here. */
-+}
-+
-+static void
-+make_mapping_symbol (enum mstate state, valueT value, fragS * frag, unsigned int align)
-+{
-+ symbolS *symbol_p = NULL;
-+ const char *symbol_name = NULL;
-+ switch (state)
-+ {
-+ case MAP_DATA:
-+ if (align == 0) {
-+ symbol_name = "$d0";
-+ }
-+ else if (align == 1) {
-+ symbol_name = "$d1";
-+ }
-+ else if (align == 2)
-+ symbol_name = "$d2";
-+ else if (align == 3)
-+ symbol_name = "$d3";
-+ else if (align == 4)
-+ symbol_name = "$d4";
-+ break;
-+ case MAP_CODE:
-+ symbol_name = "$c";
-+ break;
-+ default:
-+ abort ();
-+ }
-+
-+ symbol_p = symbol_new (symbol_name, now_seg, value, frag);
-+ /* local scope attribute */
-+ symbol_get_bfdsym (symbol_p)->flags |= BSF_NO_FLAGS | BSF_LOCAL;
-+}
-+
-+static void
-+add_mapping_symbol (enum mstate state, unsigned int padding_byte, unsigned int align)
-+{
-+ enum mstate current_mapping_state =
-+ seg_info (now_seg)->tc_segment_info_data.mapstate;
-+
-+ if (state == MAP_CODE && current_mapping_state == state)
-+ return;
-+
-+ if (!SEG_NORMAL (now_seg) || !subseg_text_p (now_seg))
-+ return;
-+
-+ /* start adding mapping symbol */
-+ seg_info (now_seg)->tc_segment_info_data.mapstate = state;
-+ make_mapping_symbol (state, (valueT) frag_now_fix () + padding_byte,
-+ frag_now, align);
-+}
-+
-+static void
-+nds32_aligned_cons (int idx)
-+{
-+ nds32_adjust_label (idx);
-+ add_mapping_symbol (MAP_DATA, 0, idx);
-+ /* Call default handler. */
-+ cons (1 << idx);
-+ if (now_seg->flags & SEC_CODE
-+ && now_seg->flags & SEC_ALLOC && now_seg->flags & SEC_RELOC)
-+ {
-+ /* Use BFD_RELOC_NDS32_DATA to avoid EX9 optimization replacing data. */
-+ expressionS exp;
-+
-+ exp.X_add_number = 0;
-+ exp.X_op = O_constant;
-+ fix_new_exp (frag_now, frag_now_fix () - (1 << idx), 1 << idx,
-+ &exp, 0, BFD_RELOC_NDS32_DATA);
-+ }
-+}
-+
-+/* `.double' directive. */
-+
-+static void
-+nds32_aligned_float_cons (int type)
-+{
-+ switch (type)
-+ {
-+ case 'f':
-+ case 'F':
-+ case 's':
-+ case 'S':
-+ nds32_adjust_label (2);
-+ break;
-+ case 'd':
-+ case 'D':
-+ case 'r':
-+ case 'R':
-+ nds32_adjust_label (4);
-+ break;
-+ default:
-+ as_bad ("Unrecognized float type, %c\n", (char)type);
-+ }
-+ /* Call default handler. */
-+ float_cons (type);
-+}
-+
-+static void
-+nds32_enable_pic (int ignore ATTRIBUTE_UNUSED)
-+{
-+ /* Another way to do -mpic.
-+ This is for GCC internal use and should always be first line
-+ of code, otherwise, the effect is not determined. */
-+ nds32_pic = 1;
-+}
-+
-+static void
-+nds32_set_abi (int ver)
-+{
-+ nds32_abi = ver;
-+}
-+
-+/* Relax directive to set relocation R_NDS32_RELAX_ENTRY value. */
-+
-+static void
-+nds32_relax_relocs (int relax)
-+{
-+ char saved_char;
-+ char *name;
-+ int i;
-+ const char *subtype_relax[] =
-+ {"", "", "ex9", "ifc"};
-+
-+ name = input_line_pointer;
-+ while (*input_line_pointer && !ISSPACE (*input_line_pointer))
-+ input_line_pointer++;
-+ saved_char = *input_line_pointer;
-+ *input_line_pointer = 0;
-+
-+ for (i = 0; i < (int) ARRAY_SIZE (subtype_relax); i++)
-+ {
-+ if (strcmp (name, subtype_relax[i]) == 0)
-+ {
-+ switch (i)
-+ {
-+ case 0:
-+ case 1:
-+ enable_relax_relocs = relax & enable_relax_relocs;
-+ enable_relax_ex9 = relax & enable_relax_ex9;
-+ enable_relax_ifc = relax & enable_relax_ifc;
-+ break;
-+ case 2:
-+ enable_relax_ex9 = relax;
-+ break;
-+ case 3:
-+ enable_relax_ifc = relax;
-+ break;
-+ default:
-+ break;
-+ }
-+ break;
-+ }
-+ }
-+ *input_line_pointer = saved_char;
-+ ignore_rest_of_line ();
-+}
-+
-+/* Record which arguments register($r0 ~ $r5) is not used in callee.
-+ bit[i] for $ri */
-+
-+static void
-+nds32_set_hint_func_args (int ignore ATTRIBUTE_UNUSED)
-+{
-+ ignore_rest_of_line ();
-+}
-+
-+/* Insert relocations to mark the begin and end of a fp-omitted function,
-+ for further relaxation use.
-+ bit[i] for $ri */
-+
-+static void
-+nds32_omit_fp_begin (int mode)
-+{
-+ expressionS exp;
-+
-+ if (nds32_relax_fp_as_gp == 0)
-+ return;
-+ exp.X_op = O_symbol;
-+ exp.X_add_symbol = abs_section_sym;
-+ if (mode == 1)
-+ {
-+ in_omit_fp = 1;
-+ exp.X_add_number = R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
-+ fix_new_exp (frag_now, frag_now_fix (), 0, &exp, 0,
-+ BFD_RELOC_NDS32_RELAX_REGION_BEGIN);
-+ }
-+ else
-+ {
-+ in_omit_fp = 0;
-+ exp.X_add_number = R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
-+ fix_new_exp (frag_now, frag_now_fix (), 0, &exp, 0,
-+ BFD_RELOC_NDS32_RELAX_REGION_END);
-+ }
-+}
-+
-+/* Insert relocations to mark the begin and end of ex9 region,
-+ for further relaxation use.
-+ bit[i] for $ri */
-+
-+static void
-+nds32_no_ex9_begin (int mode)
-+{
-+ expressionS exp;
-+
-+ exp.X_op = O_symbol;
-+ exp.X_add_symbol = abs_section_sym;
-+ if (mode == 1)
-+ {
-+ exp.X_add_number = R_NDS32_RELAX_REGION_NO_EX9_FLAG;
-+ fix_new_exp (frag_now, frag_now_fix (), 0, &exp, 0,
-+ BFD_RELOC_NDS32_RELAX_REGION_BEGIN);
-+ }
-+ else
-+ {
-+ exp.X_add_number = R_NDS32_RELAX_REGION_NO_EX9_FLAG;
-+ fix_new_exp (frag_now, frag_now_fix (), 0, &exp, 0,
-+ BFD_RELOC_NDS32_RELAX_REGION_END);
-+ }
-+}
-+
-+/* Insert relocations to mark the begin and end of ifc region,
-+ for further relaxation use.
-+ bit[i] for $ri */
-+
-+static void
-+nds32_no_ifc_begin (int mode)
-+{
-+ expressionS exp;
-+
-+ exp.X_op = O_symbol;
-+ exp.X_add_symbol = abs_section_sym;
-+ if (mode == 1)
-+ {
-+ exp.X_add_number = R_NDS32_RELAX_REGION_NO_IFC_FLAG;
-+ fix_new_exp (frag_now, frag_now_fix (), 0, &exp, 0,
-+ BFD_RELOC_NDS32_RELAX_REGION_BEGIN);
-+ }
-+ else
-+ {
-+ exp.X_add_number = R_NDS32_RELAX_REGION_NO_IFC_FLAG;
-+ fix_new_exp (frag_now, frag_now_fix (), 0, &exp, 0,
-+ BFD_RELOC_NDS32_RELAX_REGION_END);
-+ }
-+}
-+
-+static void
-+nds32_loop_begin (int mode)
-+{
-+ /* Insert loop region relocation here. */
-+ expressionS exp;
-+
-+ exp.X_op = O_symbol;
-+ exp.X_add_symbol = abs_section_sym;
-+ if (mode == 1)
-+ {
-+ exp.X_add_number = R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG;
-+ fix_new_exp (frag_now, frag_now_fix (), 0, &exp, 0,
-+ BFD_RELOC_NDS32_RELAX_REGION_BEGIN);
-+ }
-+ else
-+ {
-+ exp.X_add_number = R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG;
-+ fix_new_exp (frag_now, frag_now_fix (), 0, &exp, 0,
-+ BFD_RELOC_NDS32_RELAX_REGION_END);
-+ }
-+}
-+
-+/* Record if in the inline assembly code segment. */
-+static void
-+nds32_inline_asm (int mode)
-+{
-+ if (mode)
-+ inline_asm = TRUE;
-+ else
-+ inline_asm = FALSE;
-+}
-+
-+struct nds32_relocs_group
-+{
-+ struct nds32_relocs_pattern *pattern;
-+ struct nds32_relocs_group *next;
-+};
-+
-+static struct nds32_relocs_group *nds32_relax_hint_current = NULL;
-+
-+/* Insert a relax hint. */
-+
-+static void
-+nds32_relax_hint (int mode ATTRIBUTE_UNUSED)
-+{
-+ char *name;
-+ char saved_char;
-+ struct nds32_relocs_pattern *relocs = NULL;
-+ struct nds32_relocs_group *group, *new;
-+
-+ name = input_line_pointer;
-+ while (*input_line_pointer && !ISSPACE (*input_line_pointer))
-+ input_line_pointer++;
-+ saved_char = *input_line_pointer;
-+ *input_line_pointer = 0;
-+ name = strdup (name);
-+
-+ /* Find relax hint entry for next instruction, and all member will be
-+ initialized at that time. */
-+ relocs = hash_find (nds32_hint_hash, name);
-+ if (relocs == NULL)
-+ {
-+ relocs = malloc (sizeof (struct nds32_relocs_pattern));
-+ hash_insert (nds32_hint_hash, name, relocs);
-+ }
-+ else
-+ {
-+ while (relocs->next)
-+ relocs=relocs->next;
-+ relocs->next = malloc (sizeof (struct nds32_relocs_pattern));
-+ relocs = relocs->next;
-+ }
-+
-+ relocs->next = NULL;
-+ *input_line_pointer = saved_char;
-+ ignore_rest_of_line ();
-+
-+ /* Get the final one of relax hint series. */
-+
-+ /* It has to build this list because there are maybe more than one
-+ instructions relative to the same instruction. It to connect to
-+ next instruction after md_assemble. */
-+ new = malloc (sizeof (struct nds32_relocs_group));
-+ new->pattern = relocs;
-+ new->next = NULL;
-+ group = nds32_relax_hint_current;
-+ if (!group)
-+ nds32_relax_hint_current = new;
-+ else
-+ {
-+ while (group->next != NULL)
-+ group = group->next;
-+ group->next = new;
-+ }
-+ relaxing = TRUE;
-+}
-+
-+/* This is directive generated for compiler to estimate branch target
-+ alignment. But assembler does not use the info currently. */
-+
-+static void
-+nds32_maybe_align (int mode ATTRIBUTE_UNUSED)
-+{
-+ /* Ignore the reset of line. */
-+ ignore_rest_of_line ();
-+}
-+
-+/* The end of security. It must check if there is any branch
-+ between begin and end. */
-+static void
-+nds32_security_end (int mode ATTRIBUTE_UNUSED)
-+{
-+ if (crcing == FALSE)
-+ as_bad (_("Found unexpected branches inside the "
-+ "signature protected region."));
-+
-+}
-+
-+/* Decide the size of vector entries, only accepts 4 or 16 now. */
-+
-+static void
-+nds32_vec_size (int ignore ATTRIBUTE_UNUSED)
-+{
-+ expressionS exp;
-+
-+ expression (&exp);
-+
-+ if (exp.X_op == O_constant)
-+ {
-+ if (exp.X_add_number == 4 || exp.X_add_number == 16)
-+ {
-+ if (vec_size == 0)
-+ vec_size = exp.X_add_number;
-+ else if (vec_size != exp.X_add_number)
-+ as_warn (_("Different arguments of .vec_size are found, "
-+ "previous %d, current %d"),
-+ (int) vec_size, (int) exp.X_add_number);
-+ }
-+ else
-+ as_warn (_("Argument of .vec_size is expected 4 or 16, actual: %d."),
-+ (int) exp.X_add_number);
-+ }
-+ else
-+ as_warn (_("Argument of .vec_size is not a constant."));
-+}
-+
-+/* The behavior of ".flag" directive varies depending on the target.
-+ In nds32 target, we use it to recognize whether this assembly content is
-+ generated by compiler. Other features can also be added in this function
-+ in the future. */
-+
-+static void
-+nds32_flag (int ignore ATTRIBUTE_UNUSED)
-+{
-+ char *name;
-+ char saved_char;
-+ int i;
-+ const char *possible_flags[] = { "verbatim" };
-+
-+ /* Skip whitespaces. */
-+ name = input_line_pointer;
-+ while (*input_line_pointer && !ISSPACE (*input_line_pointer))
-+ input_line_pointer++;
-+ saved_char = *input_line_pointer;
-+ *input_line_pointer = 0;
-+
-+ for (i = 0; i < (int) ARRAY_SIZE (possible_flags); i++)
-+ {
-+ if (strcmp (name, possible_flags[i]) == 0)
-+ {
-+ switch (i)
-+ {
-+ case 0:
-+ /* flag: verbatim */
-+ verbatim = 1;
-+ break;
-+ default:
-+ break;
-+ }
-+ /* Already found the flag, no need to continue next loop. */
-+ break;
-+ }
-+ }
-+
-+ *input_line_pointer = saved_char;
-+ ignore_rest_of_line ();
-+}
-+
-+static void
-+nds32_n12hc (int ignore ATTRIBUTE_UNUSED)
-+{
-+ /* N1213HC core is used. */
-+}
-+
-+
-+/* The target specific pseudo-ops which we support. */
-+const pseudo_typeS md_pseudo_table[] = {
-+ /* Forced alignment if declared these ways. */
-+ {"ascii", stringer, 8 + 0},
-+ {"asciz", stringer, 8 + 1},
-+ {"double", nds32_aligned_float_cons, 'd'},
-+ {"dword", nds32_aligned_cons, 3},
-+ {"float", nds32_aligned_float_cons, 'f'},
-+ {"half", nds32_aligned_cons, 1},
-+ {"hword", nds32_aligned_cons, 1},
-+ {"int", nds32_aligned_cons, 2},
-+ {"long", nds32_aligned_cons, 2},
-+ {"octa", nds32_aligned_cons, 4},
-+ {"quad", nds32_aligned_cons, 3},
-+ {"qword", nds32_aligned_cons, 4},
-+ {"short", nds32_aligned_cons, 1},
-+ {"byte", nds32_aligned_cons, 0},
-+ {"single", nds32_aligned_float_cons, 'f'},
-+ {"string", stringer, 8 + 1},
-+ {"word", nds32_aligned_cons, 2},
-+
-+ {"little", set_endian_little, 1},
-+ {"big", set_endian_little, 0},
-+ {"16bit_on", trigger_16bit, 1},
-+ {"16bit_off", trigger_16bit, 0},
-+ {"restore_16bit", restore_16bit, 0},
-+ {"off_16bit", off_16bit, 0},
-+
-+ {"sdata_d", nds32_seg, SDATA_D_SECTION},
-+ {"sdata_w", nds32_seg, SDATA_W_SECTION},
-+ {"sdata_h", nds32_seg, SDATA_H_SECTION},
-+ {"sdata_b", nds32_seg, SDATA_B_SECTION},
-+ {"sdata_f", nds32_seg, SDATA_F_SECTION},
-+
-+ {"sbss_d", nds32_seg, SBSS_D_SECTION},
-+ {"sbss_w", nds32_seg, SBSS_W_SECTION},
-+ {"sbss_h", nds32_seg, SBSS_H_SECTION},
-+ {"sbss_b", nds32_seg, SBSS_B_SECTION},
-+ {"sbss_f", nds32_seg, SBSS_F_SECTION},
-+
-+ {"pic", nds32_enable_pic, 0},
-+ {"n12_hc", nds32_n12hc, 0},
-+ {"abi_1", nds32_set_abi, E_NDS_ABI_V1},
-+ {"abi_2", nds32_set_abi, E_NDS_ABI_AABI},
-+ /* Obsolete. */
-+ {"abi_2fp", nds32_set_abi, E_NDS_ABI_V2FP},
-+ {"abi_2fp_plus", nds32_set_abi, E_NDS_ABI_V2FP_PLUS},
-+ {"relax", nds32_relax_relocs, 1},
-+ {"no_relax", nds32_relax_relocs, 0},
-+ {"hint_func_args", nds32_set_hint_func_args, 0}, /* Abandon?? */
-+ {"omit_fp_begin", nds32_omit_fp_begin, 1},
-+ {"omit_fp_end", nds32_omit_fp_begin, 0},
-+ {"no_ex9_begin", nds32_no_ex9_begin, 1},
-+ {"no_ex9_end", nds32_no_ex9_begin, 0},
-+ {"vec_size", nds32_vec_size, 0},
-+ {"flag", nds32_flag, 0},
-+ {"innermost_loop_begin", nds32_loop_begin, 1},
-+ {"innermost_loop_end", nds32_loop_begin, 0},
-+ {"relax_hint", nds32_relax_hint, 0},
-+ {"maybe_align", nds32_maybe_align, 0},
-+ {"no_ifc_begin", nds32_no_ifc_begin, 1},
-+ {"no_ifc_end", nds32_no_ifc_begin, 0},
-+ {"signature_end", nds32_security_end, 0},
-+ {"inline_asm_begin", nds32_inline_asm, 1},
-+ {"inline_asm_end", nds32_inline_asm, 0},
-+ {NULL, NULL, 0}
-+};
-+
-+void
-+nds32_pre_do_align (int n, char *fill, int len, int max)
-+{
-+ /* Only make a frag if we HAVE to... */
-+ fragS *fragP;
-+ if (n != 0 && !need_pass_2)
-+ {
-+ if (fill == NULL)
-+ {
-+ if (subseg_text_p (now_seg))
-+ {
-+ dwarf2_emit_insn (0);
-+ fragP = frag_now;
-+ add_mapping_symbol_for_align (n, frag_now_fix (), 0);
-+ frag_align_code (n, max);
-+
-+ /* Tag this alignment when there is a lable before it. */
-+ if (label_exist)
-+ {
-+ fragP->tc_frag_data.flag = NDS32_FRAG_LABEL;
-+ label_exist = 0;
-+ }
-+ }
-+ else
-+ frag_align (n, 0, max);
-+ }
-+ else if (len <= 1)
-+ frag_align (n, *fill, max);
-+ else
-+ frag_align_pattern (n, fill, len, max);
-+ }
-+}
-+
-+void
-+nds32_do_align (int n)
-+{
-+ /* Optimize for space and label exists. */
-+ expressionS exp;
-+
-+ /* FIXME:I think this will break debug info sections and except_table. */
-+ if (!enable_relax_relocs || !subseg_text_p (now_seg))
-+ return;
-+
-+ /* Create and attach a BFD_RELOC_NDS32_LABEL fixup
-+ the size of instruction may not be correct because
-+ it could be relaxable. */
-+ exp.X_op = O_symbol;
-+ exp.X_add_symbol = section_symbol (now_seg);
-+ exp.X_add_number = n;
-+ fix_new_exp (frag_now,
-+ frag_now_fix (), 0, &exp, 0, BFD_RELOC_NDS32_LABEL);
-+}
-+
-+/* Supported Andes machines. */
-+struct nds32_machs
-+{
-+ enum bfd_architecture bfd_mach;
-+ int mach_flags;
-+};
-+
-+/* This is the callback for nds32-asm.c to parse operands. */
-+
-+int
-+nds32_asm_parse_operand (struct nds32_asm_desc *pdesc ATTRIBUTE_UNUSED,
-+ struct nds32_asm_insn *pinsn,
-+ char **pstr, int64_t *value)
-+{
-+ char *hold;
-+ expressionS *pexp = pinsn->info;
-+
-+ hold = input_line_pointer;
-+ input_line_pointer = *pstr;
-+ expression (pexp);
-+ *pstr = input_line_pointer;
-+ input_line_pointer = hold;
-+
-+ switch (pexp->X_op)
-+ {
-+ case O_symbol:
-+ *value = 0;
-+ return NASM_R_SYMBOL;
-+ case O_constant:
-+ *value = pexp->X_add_number;
-+ return NASM_R_CONST;
-+ case O_illegal:
-+ case O_absent:
-+ case O_register:
-+ default:
-+ return NASM_R_ILLEGAL;
-+ }
-+}
-+
-+/* GAS will call this function at the start of the assembly, after the command
-+ line arguments have been parsed and all the machine independent
-+ initializations have been completed. */
-+
-+void
-+md_begin (void)
-+{
-+ struct nds32_keyword *k;
-+ relax_info_t *relax_info;
-+ int flags = 0;
-+
-+ bfd_set_arch_mach (stdoutput, TARGET_ARCH, nds32_baseline);
-+
-+ nds32_init_nds32_pseudo_opcodes ();
-+ asm_desc.parse_operand = nds32_asm_parse_operand;
-+ if (nds32_gpr16)
-+ flags |= NASM_OPEN_REDUCED_REG;
-+ nds32_asm_init (&asm_desc, flags);
-+
-+ /* Initial general pupose registers hash table. */
-+ nds32_gprs_hash = hash_new ();
-+ for (k = keyword_gpr; k->name; k++)
-+ hash_insert (nds32_gprs_hash, k->name, k);
-+
-+ /* Initial branch hash table. */
-+ nds32_relax_info_hash = hash_new ();
-+ for (relax_info = relax_table; relax_info->opcode; relax_info++)
-+ hash_insert (nds32_relax_info_hash, relax_info->opcode, relax_info);
-+
-+ /* Initial relax hint hash table. */
-+ nds32_hint_hash = hash_new ();
-+ enable_16bit = nds32_16bit_ext;
-+}
-+
-+/* HANDLE_ALIGN in write.c. */
-+
-+void
-+nds32_handle_align (fragS *fragp)
-+{
-+ static const unsigned char nop16[] = { 0x92, 0x00 };
-+ static const unsigned char nop32[] = { 0x40, 0x00, 0x00, 0x09 };
-+ int bytes;
-+ char *p;
-+
-+ if (fragp->fr_type != rs_align_code)
-+ return;
-+
-+ bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
-+ p = fragp->fr_literal + fragp->fr_fix;
-+
-+ if (bytes & 1)
-+ {
-+ *p++ = 0;
-+ bytes--;
-+ }
-+
-+ if (bytes & 2)
-+ {
-+ expressionS exp_t;
-+ exp_t.X_op = O_symbol;
-+ exp_t.X_add_symbol = abs_section_sym;
-+ exp_t.X_add_number = R_NDS32_INSN16_CONVERT_FLAG;
-+ fix_new_exp (fragp, fragp->fr_fix, 2, &exp_t, 0,
-+ BFD_RELOC_NDS32_INSN16);
-+ memcpy (p, nop16, 2);
-+ p += 2;
-+ bytes -= 2;
-+ }
-+
-+ while (bytes >= 4)
-+ {
-+ memcpy (p, nop32, 4);
-+ p += 4;
-+ bytes -= 4;
-+ }
-+
-+ bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
-+ fragp->fr_fix += bytes;
-+}
-+
-+/* md_flush_pending_output */
-+
-+void
-+nds32_flush_pending_output (void)
-+{
-+ nds32_last_label = NULL;
-+}
-+
-+void
-+nds32_frob_label (symbolS *label)
-+{
-+ dwarf2_emit_label (label);
-+}
-+
-+/* TC_START_LABEL */
-+
-+int
-+nds32_start_label (int asmdone ATTRIBUTE_UNUSED, int secdone ATTRIBUTE_UNUSED)
-+{
-+ if (optimize && subseg_text_p (now_seg))
-+ label_exist = 1;
-+ return 1;
-+}
-+
-+/* TARGET_FORMAT */
-+
-+const char *
-+nds32_target_format (void)
-+{
-+#ifdef TE_LINUX
-+ if (target_big_endian)
-+ return "elf32-nds32be-linux";
-+ else
-+ return "elf32-nds32le-linux";
-+#else
-+ if (target_big_endian)
-+ return "elf32-nds32be";
-+ else
-+ return "elf32-nds32le";
-+#endif
-+}
-+
-+static enum nds32_br_range
-+get_range_type (const struct nds32_field *field)
-+{
-+ gas_assert (field != NULL);
-+
-+ if (field->bitpos != 0)
-+ return BR_RANGE_U4G;
-+
-+ if (field->bitsize == 24 && field->shift == 1)
-+ return BR_RANGE_S16M;
-+ else if (field->bitsize == 16 && field->shift == 1)
-+ return BR_RANGE_S64K;
-+ else if (field->bitsize == 14 && field->shift == 1)
-+ return BR_RANGE_S16K;
-+ else if (field->bitsize == 8 && field->shift == 1)
-+ return BR_RANGE_S256;
-+ else
-+ return BR_RANGE_U4G;
-+}
-+
-+/* Save pseudo instruction relocation list. */
-+
-+static struct nds32_relocs_pattern*
-+nds32_elf_save_pseudo_pattern (fixS* fixP, struct nds32_asm_insn *insn,
-+ char *out, symbolS *sym,
-+ struct nds32_relocs_pattern *reloc_ptr,
-+ fragS *fragP)
-+{
-+ struct nds32_opcode *opcode = insn->opcode;
-+ if (!reloc_ptr)
-+ reloc_ptr = malloc (sizeof (struct nds32_relocs_pattern));
-+ reloc_ptr->seg = now_seg;
-+ reloc_ptr->sym = sym;
-+ reloc_ptr->frag = fragP;
-+ reloc_ptr->frchain = frchain_now;
-+ reloc_ptr->fixP = fixP;
-+ reloc_ptr->opcode = opcode;
-+ reloc_ptr->where = out;
-+ reloc_ptr->insn = insn->insn;
-+ reloc_ptr->next = NULL;
-+ return reloc_ptr;
-+}
-+
-+/* Check X_md to transform relocation. */
-+
-+static fixS*
-+nds32_elf_record_fixup_exp (fragS *fragP, char *str,
-+ const struct nds32_field *fld,
-+ expressionS *pexp, char* out,
-+ struct nds32_asm_insn *insn)
-+{
-+ int reloc = -1;
-+ expressionS exp;
-+ fixS *fixP = NULL;
-+
-+ /* Handle instruction relocation. */
-+ if (fld && fld->bitpos == 0 && (insn->attr & NASM_ATTR_HI20))
-+ {
-+ /* Relocation for hi20 modifier. */
-+ switch (pexp->X_md)
-+ {
-+ case BFD_RELOC_NDS32_GOTOFF: /* @GOTOFF */
-+ reloc = BFD_RELOC_NDS32_GOTOFF_HI20;
-+ break;
-+ case BFD_RELOC_NDS32_GOT20: /* @GOT */
-+ reloc = BFD_RELOC_NDS32_GOT_HI20;
-+ break;
-+ case BFD_RELOC_NDS32_25_PLTREL: /* @PLT */
-+ if (!nds32_pic)
-+ as_bad (_("Invalid PIC expression."));
-+ else
-+ reloc = BFD_RELOC_NDS32_PLT_GOTREL_HI20;
-+ break;
-+ case BFD_RELOC_NDS32_GOTPC20: /* _GLOBAL_OFFSET_TABLE_ */
-+ reloc = BFD_RELOC_NDS32_GOTPC_HI20;
-+ break;
-+ case BFD_RELOC_NDS32_TPOFF: /* @TPOFF */
-+ reloc = BFD_RELOC_NDS32_TLS_LE_HI20;
-+ break;
-+ case BFD_RELOC_NDS32_GOTTPOFF: /* @GOTTPOFF */
-+ reloc = nds32_pic ? BFD_RELOC_NDS32_TLS_IEGP_HI20 : BFD_RELOC_NDS32_TLS_IE_HI20;
-+ break;
-+ case BFD_RELOC_NDS32_TLS_DESC: /* @TLSDESC */
-+ reloc = BFD_RELOC_NDS32_TLS_DESC_HI20;
-+ break;
-+ case BFD_RELOC_NDS32_ICT:
-+ reloc = BFD_RELOC_NDS32_ICT_HI20;
-+ break;
-+ default: /* No suffix. */
-+ if (nds32_pic)
-+ /* When the file is pic, the address must be offset to gp.
-+ It may define another relocation or use GOTOFF. */
-+ reloc = BFD_RELOC_NDS32_PLT_GOTREL_HI20;
-+ else
-+ reloc = BFD_RELOC_NDS32_HI20;
-+ break;
-+ }
-+ fixP = fix_new_exp (fragP, out - fragP->fr_literal, insn->opcode->isize,
-+ insn->info, 0 /* pcrel */, reloc);
-+ }
-+ else if (fld && fld->bitpos == 0 && (insn->attr & NASM_ATTR_LO12))
-+ {
-+ /* Relocation for lo12 modifier. */
-+ if (fld->bitsize == 15 && fld->shift == 0)
-+ {
-+ /* [ls]bi || ori */
-+ switch (pexp->X_md)
-+ {
-+ case BFD_RELOC_NDS32_GOTOFF: /* @GOTOFF */
-+ reloc = BFD_RELOC_NDS32_GOTOFF_LO12;
-+ break;
-+ case BFD_RELOC_NDS32_GOT20: /* @GOT */
-+ reloc = BFD_RELOC_NDS32_GOT_LO12;
-+ break;
-+ case BFD_RELOC_NDS32_25_PLTREL: /* @PLT */
-+ if (!nds32_pic)
-+ as_bad (_("Invalid PIC expression."));
-+ else
-+ reloc = BFD_RELOC_NDS32_PLT_GOTREL_LO12;
-+ break;
-+ case BFD_RELOC_NDS32_GOTPC20: /* _GLOBAL_OFFSET_TABLE_ */
-+ reloc = BFD_RELOC_NDS32_GOTPC_LO12;
-+ break;
-+ case BFD_RELOC_NDS32_TPOFF: /* @TPOFF */
-+ reloc = BFD_RELOC_NDS32_TLS_LE_LO12;
-+ break;
-+ case BFD_RELOC_NDS32_GOTTPOFF: /* @GOTTPOFF */
-+ reloc = nds32_pic ? BFD_RELOC_NDS32_TLS_IEGP_LO12 : BFD_RELOC_NDS32_TLS_IE_LO12;
-+ break;
-+ case BFD_RELOC_NDS32_TLS_DESC: /* @TLSDESC */
-+ reloc = BFD_RELOC_NDS32_TLS_DESC_LO12;
-+ break;
-+ case BFD_RELOC_NDS32_ICT:
-+ reloc = BFD_RELOC_NDS32_ICT_LO12;
-+ break;
-+ default: /* No suffix. */
-+ if (nds32_pic)
-+ /* When the file is pic, the address must be offset to gp.
-+ It may define another relocation or use GOTOFF. */
-+ reloc = BFD_RELOC_NDS32_PLT_GOTREL_LO12;
-+ else
-+ reloc = BFD_RELOC_NDS32_LO12S0;
-+ break;
-+ }
-+ }
-+ else if (fld->bitsize == 15 && fld->shift == 1)
-+ reloc = BFD_RELOC_NDS32_LO12S1; /* [ls]hi */
-+ else if (fld->bitsize == 15 && fld->shift == 2)
-+ {
-+ /* [ls]wi */
-+ switch (pexp->X_md)
-+ {
-+ case BFD_RELOC_NDS32_GOTTPOFF: /* @GOTTPOFF */
-+ reloc = nds32_pic ? BFD_RELOC_NDS32_TLS_IEGP_LO12S2 : BFD_RELOC_NDS32_TLS_IE_LO12S2;
-+ break;
-+ default: /* No suffix. */
-+ reloc = BFD_RELOC_NDS32_LO12S2;
-+ break;
-+ }
-+ }
-+ else if (fld->bitsize == 15 && fld->shift == 3)
-+ reloc = BFD_RELOC_NDS32_LO12S3; /* [ls]di */
-+ else if (fld->bitsize == 12 && fld->shift == 2)
-+ reloc = R_NDS32_LO12S2_SP_RELA; /* f[ls][sd]i */
-+
-+ fixP = fix_new_exp (fragP, out - fragP->fr_literal, insn->opcode->isize,
-+ insn->info, 0 /* pcrel */, reloc);
-+ }
-+ else if (fld && fld->bitpos == 0 && insn->opcode->isize == 4
-+ && (insn->attr & NASM_ATTR_PCREL))
-+ {
-+ /* Relocation for 32-bit branch instructions. */
-+ if (fld->bitsize == 24 && fld->shift == 1)
-+ {
-+ if (pexp->X_md == BFD_RELOC_NDS32_ICT)
-+ reloc = BFD_RELOC_NDS32_ICT_25PC;
-+ else
-+ reloc = BFD_RELOC_NDS32_25_PCREL;
-+ }
-+ else if (fld->bitsize == 16 && fld->shift == 1)
-+ reloc = BFD_RELOC_NDS32_17_PCREL;
-+ else if (fld->bitsize == 14 && fld->shift == 1)
-+ reloc = BFD_RELOC_NDS32_15_PCREL;
-+ else if (fld->bitsize == 8 && fld->shift == 1)
-+ reloc = BFD_RELOC_NDS32_WORD_9_PCREL;
-+ else
-+ abort ();
-+
-+ fixP = fix_new_exp (fragP, out - fragP->fr_literal, insn->opcode->isize,
-+ insn->info, 1 /* pcrel */, reloc);
-+ }
-+ else if (fld && fld->bitpos == 0 && insn->opcode->isize == 4
-+ && (insn->attr & NASM_ATTR_GPREL))
-+ {
-+ /* Relocation for 32-bit gp-relative instructions. */
-+ if (fld->bitsize == 19 && fld->shift == 0)
-+ reloc = BFD_RELOC_NDS32_SDA19S0;
-+ else if (fld->bitsize == 18 && fld->shift == 1)
-+ reloc = BFD_RELOC_NDS32_SDA18S1;
-+ else if (fld->bitsize == 17 && fld->shift == 2)
-+ reloc = BFD_RELOC_NDS32_SDA17S2;
-+ else
-+ abort ();
-+
-+ fixP = fix_new_exp (fragP, out - fragP->fr_literal, insn->opcode->isize,
-+ insn->info, 0 /* pcrel */, reloc);
-+ /* Insert INSN16 for converting fp_as_gp. */
-+ exp.X_op = O_symbol;
-+ exp.X_add_symbol = abs_section_sym;
-+ exp.X_add_number = 0;
-+ if (in_omit_fp && reloc == BFD_RELOC_NDS32_SDA17S2)
-+ fix_new_exp (fragP, out - fragP->fr_literal,
-+ insn->opcode->isize, &exp, 0 /* pcrel */,
-+ BFD_RELOC_NDS32_INSN16);
-+ }
-+ else if (fld && fld->bitpos == 0 && insn->opcode->isize == 2
-+ && (insn->attr & NASM_ATTR_PCREL))
-+ {
-+ /* Relocation for 16-bit branch instructions. */
-+ if (fld->bitsize == 8 && fld->shift == 1)
-+ reloc = BFD_RELOC_NDS32_9_PCREL;
-+ else
-+ abort ();
-+
-+ fixP = fix_new_exp (fragP, out - fragP->fr_literal, insn->opcode->isize,
-+ insn->info, 1 /* pcrel */, reloc);
-+ }
-+ else if (fld && fld->bitpos == 0 && (insn->attr & NASM_ATTR_IFC_EXT))
-+ {
-+ /* Relocation for ifcall instruction. */
-+ if (insn->opcode->isize == 2 && fld->bitsize == 9 && fld->shift == 1)
-+ reloc = BFD_RELOC_NDS32_10IFCU_PCREL;
-+ else if (insn->opcode->isize == 4 && fld->bitsize == 16
-+ && fld->shift == 1)
-+ reloc = BFD_RELOC_NDS32_17IFC_PCREL;
-+ else
-+ abort ();
-+
-+ fixP = fix_new_exp (fragP, out - fragP->fr_literal, insn->opcode->isize,
-+ insn->info, 1 /* pcrel */, reloc);
-+ }
-+ else if (fld)
-+ as_bad (_("Don't know how to handle this field. %s"), str);
-+
-+ return fixP;
-+}
-+
-+/* Build instruction pattern to relax. There are two type group pattern
-+ including pseudo instruction and relax hint. */
-+
-+static void
-+nds32_elf_build_relax_relation (fixS *fixP, expressionS *pexp, char* out,
-+ struct nds32_asm_insn *insn, fragS *fragP,
-+ const struct nds32_field *fld)
-+{
-+ struct nds32_relocs_pattern *reloc_ptr;
-+ struct nds32_relocs_group *group;
-+ symbolS *sym = NULL;
-+
-+ /* The expression may be used uninitialized. */
-+ if (fld)
-+ sym = pexp->X_add_symbol;
-+
-+ if (pseudo_opcode)
-+ {
-+ /* Save instruction relation for pseudo instruction expanding pattern. */
-+ reloc_ptr = nds32_elf_save_pseudo_pattern (fixP, insn, out, sym,
-+ NULL, fragP);
-+ if (!relocs_list)
-+ relocs_list = reloc_ptr;
-+ else
-+ {
-+ struct nds32_relocs_pattern *temp = relocs_list;
-+ while (temp->next)
-+ temp = temp->next;
-+ temp->next = reloc_ptr;
-+ }
-+ }
-+ else if (nds32_relax_hint_current)
-+ {
-+ /* Save instruction relation by relax hint. */
-+ group = nds32_relax_hint_current;
-+ while (group)
-+ {
-+ nds32_elf_save_pseudo_pattern (fixP, insn, out, sym,
-+ group->pattern, fragP);
-+ group = group->next;
-+ free (nds32_relax_hint_current);
-+ nds32_relax_hint_current = group;
-+ }
-+ }
-+
-+ /* Set relaxing false only for relax_hint trigger it. */
-+ if (!pseudo_opcode)
-+ relaxing = FALSE;
-+}
-+
-+#define N32_MEM_EXT(insn) ((N32_OP6_MEM << 25) | insn)
-+
-+/* Relax pattern for link time relaxation. */
-+/* relaxation types only! relocation types are not necessary */
-+/* refer to nds32_elf_record_fixup_exp() */
-+
-+static struct nds32_relax_hint_table relax_ls_table[] =
-+{
-+ {
-+ /* Load Address / Load-Store (LALS). */
-+ .main_type = NDS32_RELAX_HINT_LALS,
-+ .relax_code_size = 12,
-+ .relax_code_seq =
-+ {
-+ OP6 (SETHI),
-+ OP6 (ORI),
-+ OP6 (LBI),
-+ },
-+ .relax_fixup =
-+ {
-+ {0, 4, NDS32_HINT | NDS32_ADDEND, BFD_RELOC_NDS32_LOADSTORE},
-+ {4, 4, NDS32_HINT | NDS32_INSN16, BFD_RELOC_NDS32_INSN16},
-+ {8, 4, NDS32_HINT | NDS32_INSN16, BFD_RELOC_NDS32_INSN16},
-+ }
-+ },
-+ {
-+ /* B(AL) symbol@PLT */
-+ .main_type = NDS32_RELAX_HINT_LA_PLT,
-+ .relax_code_size = 16,
-+ .relax_code_seq =
-+ {
-+ OP6 (SETHI),
-+ OP6 (ORI),
-+ OP6 (ALU1),
-+ OP6 (JREG),
-+ },
-+ .relax_fixup =
-+ {
-+ {0, 4, NDS32_HINT | NDS32_ADDEND, BFD_RELOC_NDS32_LOADSTORE},
-+ {4, 4, NDS32_HINT | NDS32_PTR, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_HINT | NDS32_PTR, BFD_RELOC_NDS32_PTR},
-+ {12, 4, NDS32_HINT | NDS32_ABS, BFD_RELOC_NDS32_PLT_GOT_SUFF},
-+ {12, 4, NDS32_HINT | NDS32_ABS, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {12, 4, NDS32_HINT | NDS32_INSN16, BFD_RELOC_NDS32_INSN16}
-+ }
-+ },
-+ {
-+ /* LA (@GOT). */
-+ .main_type = NDS32_RELAX_HINT_LA_GOT,
-+ .relax_code_size = 12,
-+ .relax_code_seq =
-+ {
-+ OP6 (SETHI),
-+ OP6 (ORI),
-+ OP6 (MEM),
-+ },
-+ .relax_fixup =
-+ {
-+ {0, 4, NDS32_HINT | NDS32_ADDEND, BFD_RELOC_NDS32_LOADSTORE},
-+ {4, 4, NDS32_HINT | NDS32_PTR, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_HINT | NDS32_ABS, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {8, 4, NDS32_HINT | NDS32_ABS, BFD_RELOC_NDS32_GOT_SUFF}
-+ }
-+ },
-+ {
-+ /* LA (@GOTOFF). */
-+ .main_type = NDS32_RELAX_HINT_LA_GOTOFF,
-+ .relax_code_size = 16,
-+ .relax_code_seq =
-+ {
-+ OP6 (SETHI),
-+ OP6 (ORI),
-+ OP6 (ALU1),
-+ OP6 (MEM),
-+ },
-+ .relax_fixup =
-+ {
-+ {0, 4, NDS32_HINT | NDS32_ADDEND, BFD_RELOC_NDS32_LOADSTORE},
-+ {4, 4, NDS32_HINT | NDS32_PTR, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_HINT | NDS32_ABS, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {8, 4, NDS32_HINT | NDS32_ABS, BFD_RELOC_NDS32_GOTOFF_SUFF},
-+ {12, 4, NDS32_HINT | NDS32_ABS, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {12, 4, NDS32_HINT | NDS32_ABS, BFD_RELOC_NDS32_GOTOFF_SUFF},
-+ }
-+ },
-+ {
-+ /* TLS LE LS|LA */
-+ .main_type = NDS32_RELAX_HINT_TLS_LE_LS,
-+ .relax_code_size = 16,
-+ .relax_code_seq =
-+ {
-+ OP6(SETHI),
-+ OP6(ORI),
-+ OP6(MEM),
-+ OP6(ALU1),
-+ },
-+ .relax_fixup =
-+ {
-+ {0, 4, NDS32_HINT | NDS32_ADDEND, BFD_RELOC_NDS32_LOADSTORE },
-+ {4, 4, NDS32_HINT | NDS32_PTR_MULTIPLE, BFD_RELOC_NDS32_PTR },
-+ {8, 4, NDS32_HINT | NDS32_ABS, BFD_RELOC_NDS32_PTR_RESOLVED },
-+ {8, 4, NDS32_HINT | NDS32_SYM, BFD_RELOC_NDS32_TLS_LE_LS },
-+ {12, 4, NDS32_HINT | NDS32_ABS, BFD_RELOC_NDS32_PTR_RESOLVED },
-+ {12, 4, NDS32_HINT | NDS32_SYM, BFD_RELOC_NDS32_TLS_LE_ADD },
-+ }
-+ },
-+ {
-+ /* TLS IE LA */
-+ .main_type = NDS32_RELAX_HINT_TLS_IE_LA,
-+ .relax_code_size = 8,
-+ .relax_code_seq =
-+ {
-+ OP6(SETHI),
-+ OP6(LBI),
-+ },
-+ .relax_fixup =
-+ {
-+ {0, 4, NDS32_HINT | NDS32_ADDEND, BFD_RELOC_NDS32_LOADSTORE },
-+ {4, 4, NDS32_HINT | NDS32_INSN16, BFD_RELOC_NDS32_INSN16},
-+ }
-+ },
-+ {
-+ /* TLS IEGP LA */
-+ .main_type = NDS32_RELAX_HINT_TLS_IEGP_LA,
-+ .relax_code_size = 12,
-+ .relax_code_seq =
-+ {
-+ OP6 (SETHI),
-+ OP6 (ORI),
-+ OP6 (MEM),
-+ },
-+ .relax_fixup =
-+ {
-+ {0, 4, NDS32_HINT | NDS32_ADDEND, BFD_RELOC_NDS32_LOADSTORE},
-+ {4, 4, NDS32_HINT | NDS32_PTR_PATTERN, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_HINT | NDS32_ABS, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {8, 4, NDS32_HINT | NDS32_SYM, BFD_RELOC_NDS32_TLS_IEGP_LW},
-+ }
-+ },
-+ {
-+ /* TLS DESC LS: */
-+ .main_type = NDS32_RELAX_HINT_TLS_DESC_LS,
-+ .relax_code_size = 24,
-+ .relax_code_seq =
-+ {
-+ OP6 (SETHI),
-+ OP6 (ORI),
-+ OP6 (ALU1),
-+ OP6 (LBI), /* load argument */
-+ OP6 (JREG),
-+ OP6 (MEM), /* load/store variable or load argument */
-+ },
-+ .relax_fixup =
-+ {
-+ {0, 4, NDS32_HINT | NDS32_ADDEND, BFD_RELOC_NDS32_LOADSTORE},
-+ {4, 4, NDS32_HINT | NDS32_PTR_PATTERN, BFD_RELOC_NDS32_PTR},
-+ {8, 4, NDS32_HINT | NDS32_ABS, BFD_RELOC_NDS32_PTR_RESOLVED},
-+ {8, 4, NDS32_HINT | NDS32_SYM, BFD_RELOC_NDS32_TLS_DESC_ADD},
-+ {12, 4, NDS32_HINT | NDS32_SYM, BFD_RELOC_NDS32_TLS_DESC_FUNC},
-+ {16, 4, NDS32_HINT | NDS32_SYM, BFD_RELOC_NDS32_TLS_DESC_CALL},
-+ {20, 4, NDS32_HINT | NDS32_SYM_DESC_MEM, BFD_RELOC_NDS32_TLS_DESC_MEM},
-+ }
-+ },
-+ {
-+ /* Load Address of ICT. */
-+ .main_type = NDS32_RELAX_HINT_ICT_LA,
-+ .relax_code_size = 8,
-+ .relax_code_seq =
-+ {
-+ OP6 (SETHI),
-+ OP6 (ORI),
-+ },
-+ .relax_fixup =
-+ {
-+ /* TODO: insert relocations to do relax. */
-+ }
-+ },
-+ {
-+ .main_type = 0,
-+ .relax_code_seq = {0},
-+ .relax_fixup = {{0, 0 , 0, 0}}
-+ }
-+};
-+
-+/* Since sethi loadstore relocation has to using next instruction to determine
-+ elimination itself or not, we have to return the next instruction range. */
-+
-+static int
-+nds32_elf_sethi_range (struct nds32_relocs_pattern *pattern)
-+{
-+ int range = 0;
-+ while (pattern)
-+ {
-+ switch (pattern->opcode->value)
-+ {
-+ case INSN_LBI:
-+ case INSN_SBI:
-+ case INSN_LBSI:
-+ case N32_MEM_EXT (N32_MEM_LB):
-+ case N32_MEM_EXT (N32_MEM_LBS):
-+ case N32_MEM_EXT (N32_MEM_SB):
-+ range = NDS32_LOADSTORE_BYTE;
-+ break;
-+ case INSN_LHI:
-+ case INSN_SHI:
-+ case INSN_LHSI:
-+ case N32_MEM_EXT (N32_MEM_LH):
-+ case N32_MEM_EXT (N32_MEM_LHS):
-+ case N32_MEM_EXT (N32_MEM_SH):
-+ range = NDS32_LOADSTORE_HALF;
-+ break;
-+ case INSN_LWI:
-+ case INSN_SWI:
-+ case N32_MEM_EXT (N32_MEM_LW):
-+ case N32_MEM_EXT (N32_MEM_SW):
-+ range = NDS32_LOADSTORE_WORD;
-+ break;
-+ case INSN_FLSI:
-+ case INSN_FSSI:
-+ range = NDS32_LOADSTORE_FLOAT_S;
-+ break;
-+ case INSN_FLDI:
-+ case INSN_FSDI:
-+ range = NDS32_LOADSTORE_FLOAT_D;
-+ break;
-+ case INSN_ORI:
-+ range = NDS32_LOADSTORE_IMM;
-+ break;
-+ default:
-+ range = NDS32_LOADSTORE_NONE;
-+ break;
-+ }
-+ if (range != NDS32_LOADSTORE_NONE)
-+ break;
-+ pattern = pattern->next;
-+ }
-+ return range;
-+}
-+
-+/* The args means: instruction size, the 1st instruction is converted to 16 or
-+ not, optimize option, 16 bit instruction is enable. */
-+#define SET_ADDEND(size, convertible, optimize, insn16_on) \
-+ (((size) & 0xff) | ((convertible) ? 1 << 31 : 0) \
-+ | ((optimize) ? 1<< 30 : 0) | (insn16_on ? 1 << 29 : 0))
-+
-+#define MAC_COMBO (E_NDS32_HAS_FPU_MAC_INST|E_NDS32_HAS_MAC_DX_INST)
-+static void
-+nds32_set_elf_flags_by_insn (struct nds32_asm_insn * insn)
-+{
-+ static int skip_flags = NASM_ATTR_EX9_EXT | NASM_ATTR_FPU_FMA
-+ | NASM_ATTR_BRANCH | NASM_ATTR_SATURATION_EXT | NASM_ATTR_GPREL
-+ | NASM_ATTR_DXREG | NASM_ATTR_ISA_V1 | NASM_ATTR_ISA_V2 | NASM_ATTR_ISA_V3
-+ | NASM_ATTR_ISA_V3M | NASM_ATTR_PCREL;
-+
-+ int new_flags = insn->opcode->attr & ~skip_flags;
-+ while (new_flags)
-+ {
-+ int next = 1 << (ffs (new_flags) - 1);
-+ new_flags &= ~next;
-+ switch (next)
-+ {
-+ case NASM_ATTR_PERF_EXT:
-+ {
-+ if (nds32_perf_ext)
-+ {
-+ nds32_elf_flags |= E_NDS32_HAS_EXT_INST;
-+ skip_flags |= NASM_ATTR_PERF_EXT;
-+ }
-+ else
-+ as_bad (_("instruction %s requires enabling performance "
-+ "extension"), insn->opcode->opcode);
-+ }
-+ break;
-+ case NASM_ATTR_PERF2_EXT:
-+ {
-+ if (nds32_perf_ext2)
-+ {
-+ nds32_elf_flags |= E_NDS32_HAS_EXT2_INST;
-+ skip_flags |= NASM_ATTR_PERF2_EXT;
-+ }
-+ else
-+ as_bad (_("instruction %s requires enabling performance "
-+ "extension II"), insn->opcode->opcode);
-+ }
-+ break;
-+ case NASM_ATTR_AUDIO_ISAEXT:
-+ {
-+ if (nds32_audio_ext)
-+ {
-+ nds32_elf_flags |= E_NDS32_HAS_AUDIO_INST;
-+ skip_flags |= NASM_ATTR_AUDIO_ISAEXT;
-+ }
-+ else
-+ as_bad (_("instruction %s requires enabling AUDIO extension"),
-+ insn->opcode->opcode);
-+ }
-+ break;
-+ case NASM_ATTR_STR_EXT:
-+ {
-+ if (nds32_string_ext)
-+ {
-+ nds32_elf_flags |= E_NDS32_HAS_STRING_INST;
-+ skip_flags |= NASM_ATTR_STR_EXT;
-+ }
-+ else
-+ as_bad (_("instruction %s requires enabling STRING extension"),
-+ insn->opcode->opcode);
-+ }
-+ break;
-+ case NASM_ATTR_DIV:
-+ {
-+ if (insn->opcode->attr & NASM_ATTR_DXREG)
-+ {
-+ if (nds32_div && nds32_dx_regs)
-+ {
-+ nds32_elf_flags |= E_NDS32_HAS_DIV_DX_INST;
-+ skip_flags |= NASM_ATTR_DIV;
-+ }
-+ else
-+ as_bad (_("instruction %s requires enabling DIV & DX_REGS "
-+ "extension"), insn->opcode->opcode);
-+ }
-+ }
-+ break;
-+ case NASM_ATTR_FPU:
-+ {
-+ if (nds32_fpu_sp_ext || nds32_fpu_dp_ext)
-+ {
-+ if (!(nds32_elf_flags
-+ & (E_NDS32_HAS_FPU_INST | E_NDS32_HAS_FPU_DP_INST)))
-+ nds32_fpu_com = 1;
-+ skip_flags |= NASM_ATTR_FPU;
-+ }
-+ else
-+ as_bad (_("instruction %s requires enabling FPU extension"),
-+ insn->opcode->opcode);
-+ }
-+ break;
-+ case NASM_ATTR_FPU_SP_EXT:
-+ {
-+ if (nds32_fpu_sp_ext)
-+ {
-+ nds32_elf_flags |= E_NDS32_HAS_FPU_INST;
-+ skip_flags |= NASM_ATTR_FPU_SP_EXT;
-+ }
-+ else
-+ as_bad (_("instruction %s requires enabling FPU_SP extension"),
-+ insn->opcode->opcode);
-+ }
-+ break;
-+ case NASM_ATTR_FPU_DP_EXT:
-+ {
-+ if (nds32_fpu_dp_ext)
-+ {
-+ nds32_elf_flags |= E_NDS32_HAS_FPU_DP_INST;
-+ skip_flags |= NASM_ATTR_FPU_DP_EXT;
-+ }
-+ else
-+ as_bad (_("instruction %s requires enabling FPU_DP extension"),
-+ insn->opcode->opcode);
-+ }
-+ break;
-+ case NASM_ATTR_MAC:
-+ {
-+ if (insn->opcode->attr & NASM_ATTR_FPU_SP_EXT)
-+ {
-+ if (nds32_fpu_sp_ext && nds32_mac)
-+ nds32_elf_flags |= E_NDS32_HAS_FPU_MAC_INST;
-+ else
-+ as_bad (_("instruction %s requires enabling FPU_MAC "
-+ "extension"), insn->opcode->opcode);
-+ }
-+ else if (insn->opcode->attr & NASM_ATTR_FPU_DP_EXT)
-+ {
-+ if (nds32_fpu_dp_ext && nds32_mac)
-+ nds32_elf_flags |= E_NDS32_HAS_FPU_MAC_INST;
-+ else
-+ as_bad (_("instruction %s requires enabling FPU_MAC "
-+ "extension"), insn->opcode->opcode);
-+ }
-+ else if (insn->opcode->attr & NASM_ATTR_DXREG)
-+ {
-+ if (nds32_dx_regs && nds32_mac)
-+ nds32_elf_flags |= E_NDS32_HAS_MAC_DX_INST;
-+ else
-+ as_bad (_("instruction %s requires enabling DX_REGS "
-+ "extension"), insn->opcode->opcode);
-+ }
-+
-+ if (MAC_COMBO == (MAC_COMBO & nds32_elf_flags))
-+ skip_flags |= NASM_ATTR_MAC;
-+ }
-+ break;
-+ case NASM_ATTR_IFC_EXT:
-+ {
-+ nds32_elf_flags |= E_NDS32_HAS_IFC_INST;
-+ skip_flags |= NASM_ATTR_IFC_EXT;
-+ }
-+ break;
-+ case NASM_ATTR_DSP_ISAEXT:
-+ {
-+ if (nds32_dsp_ext)
-+ {
-+ nds32_elf_flags |= E_NDS32_HAS_DSP_INST;
-+ skip_flags |= NASM_ATTR_DSP_ISAEXT;
-+ }
-+ else
-+ as_bad (_("instruction %s requires enabling dsp extension"),
-+ insn->opcode->opcode);
-+ }
-+ break;
-+ case NASM_ATTR_ZOL:
-+ {
-+ if (nds32_zol_ext)
-+ {
-+ nds32_elf_flags |= E_NDS32_HAS_ZOL;
-+ skip_flags |= NASM_ATTR_ZOL;
-+ }
-+ else
-+ as_bad (_("instruction %s requires enabling zol extension"),
-+ insn->opcode->opcode);
-+ }
-+ break;
-+ default:
-+ as_bad (_("internal error: unknown instruction attribute: 0x%08x"),
-+ next);
-+ }
-+ }
-+}
-+
-+/* Flag for analysis relaxation type. */
-+
-+enum nds32_insn_type
-+{
-+ N32_RELAX_SETHI = 1,
-+ N32_RELAX_BR = (1 << 1),
-+ N32_RELAX_LSI = (1 << 2),
-+ N32_RELAX_JUMP = (1 << 3),
-+ N32_RELAX_CALL = (1 << 4),
-+ N32_RELAX_ORI = (1 << 5),
-+ N32_RELAX_MEM = (1 << 6),
-+ N32_RELAX_MOVI = (1 << 7),
-+ N32_RELAX_ALU1 = (1 << 8),
-+ N32_RELAX_16BIT = (1 << 9),
-+};
-+
-+struct nds32_hint_map
-+{
-+ /* the preamble relocation */
-+ bfd_reloc_code_real_type hi_type;
-+ /* mnemonic */
-+ const char *opc;
-+ /* relax pattern ID */
-+ enum nds32_relax_hint_type hint_type;
-+ /* range */
-+ enum nds32_br_range range;
-+ /* pattern character flags */
-+ enum nds32_insn_type insn_list;
-+ /* optional pattern character flags */
-+ enum nds32_insn_type option_list;
-+};
-+
-+/* Table to match instructions with hint and relax pattern. */
-+
-+static struct nds32_hint_map hint_map [] =
-+{
-+ {
-+ /* LONGCALL4. */
-+ BFD_RELOC_NDS32_HI20,
-+ "jal",
-+ NDS32_RELAX_HINT_NONE,
-+ BR_RANGE_U4G,
-+ N32_RELAX_SETHI | N32_RELAX_ORI | N32_RELAX_CALL,
-+ 0,
-+ },
-+ {
-+ /* LONGCALL5. */
-+ _dummy_first_bfd_reloc_code_real,
-+ "bgezal",
-+ NDS32_RELAX_HINT_NONE,
-+ BR_RANGE_S16M,
-+ N32_RELAX_BR | N32_RELAX_CALL,
-+ 0,
-+ },
-+ {
-+ /* LONGCALL6. */
-+ BFD_RELOC_NDS32_HI20,
-+ "bgezal",
-+ NDS32_RELAX_HINT_NONE,
-+ BR_RANGE_U4G,
-+ N32_RELAX_BR | N32_RELAX_SETHI | N32_RELAX_ORI | N32_RELAX_CALL,
-+ 0,
-+ },
-+ {
-+ /* LONGJUMP4. */
-+ BFD_RELOC_NDS32_HI20,
-+ "j",
-+ NDS32_RELAX_HINT_NONE,
-+ BR_RANGE_U4G,
-+ N32_RELAX_SETHI | N32_RELAX_ORI | N32_RELAX_JUMP,
-+ 0,
-+ },
-+ {
-+ /* LONGJUMP5. */
-+ /* There is two kinds of variation of LONGJUMP5. One of them
-+ generate EMPTY relocation for converted INSN16 if needed.
-+ But we don't distinguish them here. */
-+ _dummy_first_bfd_reloc_code_real,
-+ "beq",
-+ NDS32_RELAX_HINT_NONE,
-+ BR_RANGE_S16M,
-+ N32_RELAX_BR | N32_RELAX_JUMP,
-+ 0,
-+ },
-+ {
-+ /* LONGJUMP6. */
-+ BFD_RELOC_NDS32_HI20,
-+ "beq",
-+ NDS32_RELAX_HINT_NONE,
-+ BR_RANGE_U4G,
-+ N32_RELAX_SETHI | N32_RELAX_ORI | N32_RELAX_BR | N32_RELAX_JUMP,
-+ 0,
-+ },
-+ {
-+ /* LONGJUMP7. */
-+ _dummy_first_bfd_reloc_code_real,
-+ "beqc",
-+ NDS32_RELAX_HINT_NONE,
-+ BR_RANGE_S16K,
-+ N32_RELAX_MOVI | N32_RELAX_BR,
-+ 0,
-+ },
-+ {
-+ /* LONGCALL (BAL|JR|LA symbol@PLT). */
-+ BFD_RELOC_NDS32_PLT_GOTREL_HI20,
-+ NULL,
-+ NDS32_RELAX_HINT_LA_PLT,
-+ BR_RANGE_U4G,
-+ N32_RELAX_SETHI | N32_RELAX_ORI,
-+ N32_RELAX_ALU1 | N32_RELAX_CALL | N32_RELAX_JUMP,
-+ },
-+ /* relative issue: #11685 #11602 */
-+ {
-+ /* load address / load-store (LALS). */
-+ BFD_RELOC_NDS32_HI20,
-+ NULL,
-+ NDS32_RELAX_HINT_LALS,
-+ BR_RANGE_U4G,
-+ N32_RELAX_SETHI,
-+ N32_RELAX_ORI | N32_RELAX_LSI,
-+ },
-+ {
-+ /* setup $GP (_GLOBAL_OFFSET_TABLE_) */
-+ BFD_RELOC_NDS32_GOTPC_HI20,
-+ NULL,
-+ NDS32_RELAX_HINT_LALS,
-+ BR_RANGE_U4G,
-+ N32_RELAX_SETHI | N32_RELAX_ORI,
-+ 0,
-+ },
-+ {
-+ /* GOT LA/LS (symbol@GOT) */
-+ BFD_RELOC_NDS32_GOT_HI20,
-+ NULL,
-+ NDS32_RELAX_HINT_LA_GOT,
-+ BR_RANGE_U4G,
-+ N32_RELAX_SETHI | N32_RELAX_ORI,
-+ N32_RELAX_MEM,
-+ },
-+ {
-+ /* GOTOFF LA/LS (symbol@GOTOFF) */
-+ BFD_RELOC_NDS32_GOTOFF_HI20,
-+ NULL,
-+ NDS32_RELAX_HINT_LA_GOTOFF,
-+ BR_RANGE_U4G,
-+ N32_RELAX_SETHI | N32_RELAX_ORI,
-+ N32_RELAX_ALU1 | N32_RELAX_MEM, /* | N32_RELAX_LSI, */
-+ },
-+ {
-+ /* TLS LE LA|LS (@TPOFF) */
-+ BFD_RELOC_NDS32_TLS_LE_HI20,
-+ NULL,
-+ NDS32_RELAX_HINT_TLS_LE_LS,
-+ BR_RANGE_U4G,
-+ N32_RELAX_SETHI | N32_RELAX_ORI,
-+ N32_RELAX_ALU1 | N32_RELAX_MEM,
-+ },
-+ {
-+ /* TLS IE LA */
-+ BFD_RELOC_NDS32_TLS_IE_HI20,
-+ NULL,
-+ NDS32_RELAX_HINT_TLS_IE_LA,
-+ BR_RANGE_U4G,
-+ N32_RELAX_SETHI | N32_RELAX_LSI,
-+ 0,
-+ },
-+ {
-+ /* TLS IE LS */
-+ BFD_RELOC_NDS32_TLS_IE_HI20,
-+ NULL,
-+ NDS32_RELAX_HINT_TLS_IE_LS,
-+ BR_RANGE_U4G,
-+ N32_RELAX_SETHI | N32_RELAX_LSI | N32_RELAX_MEM,
-+ 0,
-+ },
-+ {
-+ /* TLS IEGP LA */
-+ BFD_RELOC_NDS32_TLS_IEGP_HI20,
-+ NULL,
-+ NDS32_RELAX_HINT_TLS_IEGP_LA,
-+ BR_RANGE_U4G,
-+ N32_RELAX_SETHI | N32_RELAX_ORI | N32_RELAX_MEM,
-+ 0,
-+ },
-+ {
-+ /* TLS DESC LS */
-+ BFD_RELOC_NDS32_TLS_DESC_HI20,
-+ NULL,
-+ NDS32_RELAX_HINT_TLS_DESC_LS,
-+ BR_RANGE_U4G,
-+ N32_RELAX_SETHI | N32_RELAX_ORI | N32_RELAX_ALU1 | N32_RELAX_CALL,
-+ N32_RELAX_LSI | N32_RELAX_MEM,
-+ },
-+ {
-+ /* Jump-patch load address (LA). */
-+ BFD_RELOC_NDS32_ICT_HI20,
-+ NULL,
-+ NDS32_RELAX_HINT_ICT_LA,
-+ BR_RANGE_U4G,
-+ N32_RELAX_SETHI | N32_RELAX_ORI,
-+ 0,
-+ },
-+ /* last one */
-+ {0, NULL, 0, 0 ,0, 0}
-+};
-+
-+/* Find the relaxation pattern according to instructions. */
-+/* TODO: refine this function with hash or so */
-+
-+static bfd_boolean
-+nds32_find_reloc_table (struct nds32_relocs_pattern *relocs_pattern,
-+ struct nds32_relax_hint_table *hint_info)
-+{
-+ unsigned int opcode, seq_size;
-+ enum nds32_br_range range;
-+ struct nds32_relocs_pattern *pattern, *hi_pattern = NULL;
-+ const char *opc = NULL;
-+ relax_info_t *relax_info = NULL;
-+ nds32_relax_fixup_info_t *fixup_info, *hint_fixup;
-+ enum nds32_relax_hint_type hint_type = NDS32_RELAX_HINT_NONE;
-+ struct nds32_relax_hint_table *table_ptr;
-+ uint32_t *code_seq, *hint_code;
-+ enum nds32_insn_type relax_type = 0;
-+ struct nds32_hint_map *map_ptr = hint_map;
-+ unsigned int i;
-+ const char *check_insn[] =
-+ { "bnes38", "beqs38", "bnez38", "bnezs8", "beqz38", "beqzs8" };
-+
-+ /* TODO: PLT GOT. */
-+ /* Traverse all pattern instruction and set flag. */
-+ pattern = relocs_pattern;
-+ while (pattern)
-+ {
-+ if (pattern->opcode->isize == 4)
-+ {
-+ /* 4 byte instruction. */
-+ opcode = N32_OP6 (pattern->opcode->value);
-+ switch (opcode)
-+ {
-+ case N32_OP6_SETHI:
-+ hi_pattern = pattern;
-+ relax_type |= N32_RELAX_SETHI;
-+ break;
-+ case N32_OP6_MEM:
-+ relax_type |= N32_RELAX_MEM;
-+ break;
-+ case N32_OP6_ALU1:
-+ relax_type |= N32_RELAX_ALU1;
-+ break;
-+ case N32_OP6_ORI:
-+ relax_type |= N32_RELAX_ORI;
-+ break;
-+ case N32_OP6_BR1:
-+ case N32_OP6_BR2:
-+ case N32_OP6_BR3:
-+ relax_type |= N32_RELAX_BR;
-+ break;
-+ case N32_OP6_MOVI:
-+ relax_type |= N32_RELAX_MOVI;
-+ break;
-+ case N32_OP6_LBI:
-+ case N32_OP6_SBI:
-+ case N32_OP6_LBSI:
-+ case N32_OP6_LHI:
-+ case N32_OP6_SHI:
-+ case N32_OP6_LHSI:
-+ case N32_OP6_LWI:
-+ case N32_OP6_SWI:
-+ case N32_OP6_LWC:
-+ case N32_OP6_SWC:
-+ relax_type |= N32_RELAX_LSI;
-+ break;
-+ case N32_OP6_JREG:
-+ if (__GF (pattern->opcode->value, 0, 1) == 1)
-+ relax_type |= N32_RELAX_CALL;
-+ else
-+ relax_type |= N32_RELAX_JUMP;
-+ break;
-+ case N32_OP6_JI:
-+ if (__GF (pattern->opcode->value, 24, 1) == 1)
-+ relax_type |= N32_RELAX_CALL;
-+ else
-+ relax_type |= N32_RELAX_JUMP;
-+ break;
-+ default:
-+ as_warn (_("relax hint unrecognized instruction: line %d."),
-+ pattern->frag->fr_line);
-+ return FALSE;
-+ }
-+ }
-+ else
-+ {
-+ /* 2 byte instruction. Compare by opcode name because the opcode of
-+ 2byte instruction is not regular. */
-+ int is_matched = 0;
-+ for (i = 0; i < ARRAY_SIZE (check_insn); i++)
-+ {
-+ if (strcmp (pattern->opcode->opcode, check_insn[i]) == 0)
-+ {
-+ relax_type |= N32_RELAX_BR;
-+ is_matched += 1;
-+ break;
-+ }
-+ }
-+ if (!is_matched)
-+ {
-+ relax_type |= N32_RELAX_16BIT;
-+ }
-+ }
-+ pattern = pattern->next;
-+ }
-+
-+ /* Analysis instruction flag to choose relaxation table. */
-+ while (map_ptr->insn_list != 0)
-+ {
-+ struct nds32_hint_map *hint = map_ptr++;
-+ enum nds32_insn_type must = hint->insn_list;
-+ enum nds32_insn_type optional = hint->option_list;
-+ enum nds32_insn_type extra;
-+
-+ if (must != (must & relax_type))
-+ continue;
-+
-+ extra = relax_type ^ must;
-+ if (extra != (extra & optional))
-+ continue;
-+
-+ if (!hi_pattern
-+ || (hi_pattern->fixP
-+ && hi_pattern->fixP->fx_r_type == hint->hi_type))
-+ {
-+ opc = hint->opc;
-+ hint_type = hint->hint_type;
-+ range = hint->range;
-+ map_ptr = hint;
-+ break;
-+ }
-+ }
-+
-+ if (map_ptr->insn_list == 0)
-+ {
-+ as_warn (_("Can not find match relax hint. line : %d"),
-+ relocs_pattern->fixP->fx_line);
-+ return FALSE;
-+ }
-+
-+ /* Get the match table. */
-+ if (opc)
-+ {
-+ /* Branch relax pattern. */
-+ relax_info = hash_find (nds32_relax_info_hash, opc);
-+ if (!relax_info)
-+ return FALSE;
-+ fixup_info = relax_info->relax_fixup[range];
-+ code_seq = relax_info->relax_code_seq[range];
-+ seq_size = relax_info->relax_code_size[range];
-+ }
-+ else if (hint_type)
-+ {
-+ /* Load-store relax pattern. */
-+ table_ptr = relax_ls_table;
-+ while (table_ptr->main_type != 0)
-+ {
-+ if (table_ptr->main_type == hint_type)
-+ {
-+ fixup_info = table_ptr->relax_fixup;
-+ code_seq = table_ptr->relax_code_seq;
-+ seq_size = table_ptr->relax_code_size;
-+ break;
-+ }
-+ table_ptr++;
-+ }
-+ if (table_ptr->main_type == 0)
-+ return FALSE;
-+ }
-+ else
-+ return FALSE;
-+
-+ hint_fixup = hint_info->relax_fixup;
-+ hint_code = hint_info->relax_code_seq;
-+ hint_info->relax_code_size = seq_size;
-+
-+ while (fixup_info->size != 0)
-+ {
-+ if (fixup_info->ramp & NDS32_HINT)
-+ {
-+ memcpy (hint_fixup, fixup_info, sizeof (nds32_relax_fixup_info_t));
-+ hint_fixup++;
-+ }
-+ fixup_info++;
-+ }
-+ /* Clear final relocation. */
-+ memset (hint_fixup, 0, sizeof (nds32_relax_fixup_info_t));
-+ /* Copy code sequence. */
-+ memcpy (hint_code, code_seq, seq_size);
-+ return TRUE;
-+}
-+
-+/* Because there are a lot of variant of load-store, check
-+ all these type here. */
-+
-+#define CLEAN_REG(insn) ((insn) & 0xfe0003ff)
-+#define GET_OPCODE(insn) ((insn) & 0xfe000000)
-+
-+static bfd_boolean
-+nds32_match_hint_insn (struct nds32_opcode *opcode, uint32_t seq)
-+{
-+ const char *check_insn[] =
-+ { "bnes38", "beqs38", "bnez38", "bnezs8", "beqz38", "beqzs8", "jral5" };
-+ uint32_t insn = opcode->value;
-+ unsigned int i;
-+
-+ insn = CLEAN_REG (opcode->value);
-+ if (insn == seq)
-+ return TRUE;
-+
-+ switch (seq)
-+ {
-+ case OP6 (LBI):
-+ /* In relocation_table, it regards instruction LBI as representation
-+ of all the NDS32_RELAX_HINT_LS pattern. */
-+ if (insn == OP6 (LBI) || insn == OP6 (SBI) || insn == OP6 (LBSI)
-+ || insn == OP6 (LHI) || insn == OP6 (SHI) || insn == OP6 (LHSI)
-+ || insn == OP6 (LWI) || insn == OP6 (SWI)
-+ || insn == OP6 (LWC) || insn == OP6 (SWC))
-+ return TRUE;
-+ break;
-+ case OP6 (BR2):
-+ /* This is for LONGCALL5 and LONGCALL6. */
-+ if (insn == OP6 (BR2))
-+ return TRUE;
-+ break;
-+ case OP6 (BR1):
-+ /* This is for LONGJUMP5 and LONGJUMP6. */
-+ if (opcode->isize == 4
-+ && (insn == OP6 (BR1) || insn == OP6 (BR2) || insn == OP6 (BR3)))
-+ return TRUE;
-+ else if (opcode->isize == 2)
-+ {
-+ for (i = 0; i < ARRAY_SIZE (check_insn); i++)
-+ if (strcmp (opcode->opcode, check_insn[i]) == 0)
-+ return TRUE;
-+ }
-+ break;
-+ case OP6 (MOVI):
-+ /* This is for LONGJUMP7. */
-+ if (opcode->isize == 2 && strcmp (opcode->opcode, "movi55") == 0)
-+ return TRUE;
-+ break;
-+ case OP6 (MEM):
-+ if (OP6 (MEM) == GET_OPCODE (insn))
-+ return TRUE;
-+ break;
-+ case OP6 (JREG):
-+ /* bit 24: N32_JI_JAL */ /* feed me! */
-+ if ((insn & ~(__BIT (24))) == JREG (JRAL))
-+ return TRUE;
-+ break;
-+ default:
-+ if (opcode->isize == 2)
-+ {
-+ for (i = 0; i < ARRAY_SIZE (check_insn); i++)
-+ if (strcmp (opcode->opcode, check_insn[i]) == 0)
-+ return TRUE;
-+
-+ if ((strcmp (opcode->opcode, "add5.pc") == 0) ||
-+ (strcmp (opcode->opcode, "add45") == 0))
-+ return TRUE;
-+ }
-+ }
-+ return FALSE;
-+}
-+
-+/* Append relax relocation for link time relaxing. */
-+
-+static void
-+nds32_elf_append_relax_relocs (const char *key, void *value)
-+{
-+ struct nds32_relocs_pattern *relocs_pattern =
-+ (struct nds32_relocs_pattern *) value;
-+ struct nds32_relocs_pattern *pattern_temp, *pattern_now;
-+ symbolS *sym, *hi_sym = NULL;
-+ expressionS exp;
-+ fragS *fragP;
-+ segT seg_bak = now_seg;
-+ frchainS *frchain_bak = frchain_now;
-+ struct nds32_relax_hint_table hint_info;
-+ nds32_relax_fixup_info_t *hint_fixup, *fixup_now;
-+ size_t fixup_size;
-+ offsetT branch_offset, hi_branch_offset = 0;
-+ fixS *fixP;
-+ int range, offset;
-+ unsigned int ptr_offset, hint_count, relax_code_size, count = 0;
-+ uint32_t *code_seq, code_insn;
-+ char *where;
-+ int pcrel;
-+
-+ if (!relocs_pattern)
-+ return;
-+
-+ if (!nds32_find_reloc_table (relocs_pattern, &hint_info))
-+ return;
-+
-+ /* Save symbol for some EMPTY relocation using. */
-+ pattern_now = relocs_pattern;
-+ while (pattern_now)
-+ {
-+ if (pattern_now->opcode->value == OP6 (SETHI))
-+ {
-+ hi_sym = pattern_now->sym;
-+ hi_branch_offset = pattern_now->fixP->fx_offset;
-+ break;
-+ }
-+ pattern_now = pattern_now->next;
-+ }
-+
-+ /* Inserting fix up must specify now_seg or frchain_now. */
-+ now_seg = relocs_pattern->seg;
-+ frchain_now = relocs_pattern->frchain;
-+ fragP = relocs_pattern->frag;
-+ branch_offset = fragP->fr_offset;
-+
-+ hint_fixup = hint_info.relax_fixup;
-+ code_seq = hint_info.relax_code_seq;
-+ relax_code_size = hint_info.relax_code_size;
-+ pattern_now = relocs_pattern;
-+
-+#ifdef NDS32_LINUX_TOOLCHAIN
-+ /* prepare group relocation ID (number). */
-+ long group_id = 0;
-+ if (key)
-+ {
-+ /* convert .relax_hint key to number */
-+ errno = 0;
-+ group_id = strtol (key, NULL, 10);
-+ if ((errno == ERANGE && (group_id == LONG_MAX || group_id == LONG_MIN))
-+ || (errno != 0 && group_id == 0))
-+ {
-+ as_bad (_("Internal error: .relax_hint KEY is not a number!"));
-+ goto restore;
-+ }
-+ }
-+#endif
-+
-+ /* Insert relaxation. */
-+ exp.X_op = O_symbol;
-+
-+ /* for each instruction in the hint group */
-+ while (pattern_now)
-+ {
-+ /* Choose the match fix-up by instruction. */
-+ code_insn = CLEAN_REG (*(code_seq + count));
-+ if (!nds32_match_hint_insn (pattern_now->opcode, code_insn))
-+ {
-+ /* try search from head again */
-+ count = 0;
-+ code_insn = CLEAN_REG (*(code_seq + count));
-+
-+ while (!nds32_match_hint_insn (pattern_now->opcode, code_insn))
-+ {
-+ count++;
-+ if (count >= relax_code_size / 4)
-+ {
-+ as_bad (_("Internal error: Relax hint (%s) error. %s: %s (%x)"),
-+ key,
-+ now_seg->name,
-+ pattern_now->opcode->opcode,
-+ pattern_now->opcode->value);
-+ goto restore;
-+ }
-+ code_insn = CLEAN_REG (*(code_seq + count));
-+ }
-+ }
-+ fragP = pattern_now->frag;
-+ sym = pattern_now->sym;
-+ branch_offset = fragP->fr_offset;
-+ offset = count * 4;
-+ where = pattern_now->where;
-+ /* Find the instruction map fix. */
-+ fixup_now = hint_fixup;
-+ while (fixup_now->offset != offset)
-+ {
-+ fixup_now++;
-+ if (fixup_now->size == 0)
-+ break;
-+ }
-+ /* This element is without relaxation relocation. */
-+ if (fixup_now->size == 0)
-+ {
-+ pattern_now = pattern_now->next;
-+ continue;
-+ }
-+ fixup_size = fixup_now->size;
-+
-+ /* Insert all fix-up. */
-+ while (fixup_size != 0 && fixup_now->offset == offset)
-+ {
-+ /* Set the real instruction size in element. */
-+ fixup_size = pattern_now->opcode->isize;
-+ pcrel = ((fixup_now->ramp & NDS32_PCREL) != 0) ? 1 : 0;
-+ if (fixup_now->ramp & NDS32_FIX)
-+ {
-+ /* Convert original relocation. */
-+ pattern_now->fixP->fx_r_type = fixup_now->r_type ;
-+ fixup_size = 0;
-+ }
-+ else if ((fixup_now->ramp & NDS32_PTR) != 0)
-+ {
-+ /* This relocation has to point to another instruction. Make
-+ sure each resolved relocation has to be pointed. */
-+ pattern_temp = relocs_pattern;
-+ /* All instruction in relax_table should be 32-bit. */
-+ hint_count = hint_info.relax_code_size / 4;
-+ code_insn = CLEAN_REG (*(code_seq + hint_count - 1));
-+ while (pattern_temp)
-+ {
-+ /* Point to every resolved relocation. */
-+ if (nds32_match_hint_insn (pattern_temp->opcode, code_insn))
-+ {
-+ ptr_offset =
-+ pattern_temp->where - pattern_temp->frag->fr_literal;
-+ exp.X_add_symbol = symbol_temp_new (now_seg, ptr_offset,
-+ pattern_temp->frag);
-+ exp.X_add_number = 0;
-+ fixP =
-+ fix_new_exp (fragP, where - fragP->fr_literal,
-+ fixup_size, &exp, 0, fixup_now->r_type);
-+ fixP->fx_addnumber = fixP->fx_offset;
-+ }
-+ pattern_temp = pattern_temp->next;
-+ }
-+ fixup_size = 0;
-+ }
-+ else if (fixup_now->ramp & NDS32_ADDEND)
-+ {
-+ range = nds32_elf_sethi_range (relocs_pattern);
-+ if (range == NDS32_LOADSTORE_NONE)
-+ {
-+ as_bad (_("Internal error: Range error. %s"), now_seg->name);
-+ return;
-+ }
-+ exp.X_add_symbol = abs_section_sym;
-+ exp.X_add_number = SET_ADDEND (4, 0, optimize, enable_16bit);
-+ exp.X_add_number |= ((range & 0x3f) << 8);
-+ }
-+ else if ((fixup_now->ramp & NDS32_ABS) != 0)
-+ {
-+ /* This is a tag relocation. */
-+ exp.X_add_symbol = abs_section_sym;
-+ exp.X_add_number = 0;
-+ }
-+ else if ((fixup_now->ramp & NDS32_INSN16) != 0)
-+ {
-+ if (!enable_16bit)
-+ fixup_size = 0;
-+ /* This is a tag relocation. */
-+ exp.X_add_symbol = abs_section_sym;
-+ exp.X_add_number = 0;
-+ }
-+ else if ((fixup_now->ramp & NDS32_SYM) != 0)
-+ {
-+ /* For EMPTY relocation save the true symbol. */
-+ exp.X_add_symbol = hi_sym;
-+ exp.X_add_number = hi_branch_offset;
-+ }
-+ else if (NDS32_SYM_DESC_MEM & fixup_now->ramp)
-+ {
-+ /* do the same as NDS32_SYM */
-+ exp.X_add_symbol = hi_sym;
-+ exp.X_add_number = hi_branch_offset;
-+
-+ /* extra to NDS32_SYM */
-+ /* detect if DESC_FUNC relax type do apply */
-+ if ((REG_GP == N32_RA5 (pattern_now->insn))
-+ || (REG_GP == N32_RB5 (pattern_now->insn)))
-+ {
-+ fixP = fix_new_exp (fragP, where - fragP->fr_literal,
-+ fixup_size, &exp, pcrel,
-+ BFD_RELOC_NDS32_TLS_DESC_FUNC);
-+ fixP->fx_addnumber = fixP->fx_offset;
-+
-+ fixup_size = 0;
-+ }
-+ /* else do as usual */
-+ }
-+ else if (fixup_now->ramp & NDS32_PTR_PATTERN)
-+ {
-+ /* find out PTR_RESOLVED code pattern */
-+ nds32_relax_fixup_info_t *next_fixup = fixup_now + 1;
-+ uint32_t resolved_pattern = 0;
-+ while (next_fixup->offset)
-+ {
-+ if (next_fixup->r_type == BFD_RELOC_NDS32_PTR_RESOLVED)
-+ {
-+ uint32_t new_pattern = code_seq[next_fixup->offset >> 2];
-+ if (!resolved_pattern)
-+ resolved_pattern = new_pattern;
-+ else if (new_pattern != resolved_pattern)
-+ {
-+ as_warn (_("Multiple BFD_RELOC_NDS32_PTR_RESOLVED patterns are not supported yet!"));
-+ break;
-+ }
-+ }
-+ ++next_fixup;
-+ }
-+
-+ /* find matched code and insert fix-ups */
-+ struct nds32_relocs_pattern *next_pattern = pattern_now->next;
-+ /* This relocation has to point to another instruction. Make
-+ sure each resolved relocation has to be pointed. */
-+ /* All instruction in relax_table should be 32-bit. */
-+ while (next_pattern)
-+ {
-+ uint32_t cur_pattern = GET_OPCODE (next_pattern->opcode->value);
-+ if (cur_pattern == resolved_pattern)
-+ {
-+ ptr_offset = next_pattern->where
-+ - next_pattern->frag->fr_literal;
-+ exp.X_add_symbol = symbol_temp_new (now_seg, ptr_offset,
-+ next_pattern->frag);
-+ exp.X_add_number = 0;
-+ fixP = fix_new_exp (fragP, where - fragP->fr_literal,
-+ fixup_size, &exp, 0,
-+ fixup_now->r_type);
-+ fixP->fx_addnumber = fixP->fx_offset;
-+ }
-+ next_pattern = next_pattern->next;
-+ }
-+
-+ fixup_size = 0;
-+ }
-+ else if (fixup_now->ramp & NDS32_PTR_MULTIPLE)
-+ {
-+ /* find each PTR_RESOLVED pattern after PTR */
-+ nds32_relax_fixup_info_t *next_fixup = fixup_now + 1;
-+ while (next_fixup->offset)
-+ {
-+ if (next_fixup->r_type == BFD_RELOC_NDS32_PTR_RESOLVED)
-+ {
-+ uint32_t pattern = code_seq[next_fixup->offset >> 2];
-+ /* find matched code to insert fix-ups */
-+ struct nds32_relocs_pattern *next_insn = pattern_now->next;
-+ while (next_insn)
-+ {
-+ uint32_t insn_pattern = GET_OPCODE(
-+ next_insn->opcode->value);
-+ if (insn_pattern == pattern)
-+ {
-+ ptr_offset = next_insn->where
-+ - next_insn->frag->fr_literal;
-+ exp.X_add_symbol = symbol_temp_new (
-+ now_seg, ptr_offset, next_insn->frag);
-+ exp.X_add_number = 0;
-+ fixP = fix_new_exp (fragP,
-+ where - fragP->fr_literal,
-+ fixup_size, &exp, 0,
-+ fixup_now->r_type);
-+ fixP->fx_addnumber = fixP->fx_offset;
-+ }
-+ next_insn = next_insn->next;
-+ }
-+ }
-+ ++next_fixup;
-+ }
-+ fixup_size = 0;
-+ }
-+ else
-+ {
-+ exp.X_add_symbol = sym;
-+ exp.X_add_number = branch_offset;
-+ }
-+
-+ if (fixup_size != 0)
-+ {
-+ fixP = fix_new_exp (fragP, where - fragP->fr_literal, fixup_size,
-+ &exp, pcrel, fixup_now->r_type);
-+ fixP->fx_addnumber = fixP->fx_offset;
-+ }
-+ fixup_now++;
-+ fixup_size = fixup_now->size;
-+ }
-+
-+#ifdef NDS32_LINUX_TOOLCHAIN
-+ /* Insert group relocation for each relax hint. */
-+ if (key)
-+ {
-+ exp.X_add_symbol = hi_sym; /* for eyes only */
-+ exp.X_add_number = group_id;
-+ fixP = fix_new_exp (fragP, where - fragP->fr_literal, fixup_size,
-+ &exp, pcrel, BFD_RELOC_NDS32_GROUP);
-+ fixP->fx_addnumber = fixP->fx_offset;
-+ }
-+#endif
-+
-+ if (count < relax_code_size / 4)
-+ count++;
-+ pattern_now = pattern_now->next;
-+ }
-+
-+restore:
-+ now_seg = seg_bak;
-+ frchain_now = frchain_bak;
-+}
-+
-+static void
-+nds32_str_tolower (char *src, char *dest)
-+{
-+ unsigned int i, len;
-+
-+ len = strlen (src);
-+
-+ for (i = 0; i < len; i++)
-+ *(dest + i) = TOLOWER (*(src + i));
-+
-+ *(dest + i) = '\0';
-+}
-+
-+/* Check instruction if it can be used for the baseline. */
-+
-+static bfd_boolean
-+nds32_check_insn_available (struct nds32_asm_insn insn, char *str)
-+{
-+ int attr = insn.attr & ATTR_ALL;
-+ static int baseline_isa = 0;
-+ char *s;
-+
-+ s = alloca (strlen (str) + 1);
-+ nds32_str_tolower (str, s);
-+ if (verbatim && inline_asm
-+ && (((insn.opcode->value == ALU2 (MTUSR)
-+ || insn.opcode->value == ALU2 (MFUSR))
-+ && (strstr (s, "lc")
-+ || strstr (s, "le")
-+ || strstr (s, "lb")))
-+ || (insn.attr & NASM_ATTR_ZOL)))
-+ {
-+ as_bad (_("Not support instrcution %s in verbatim."), str);
-+ return FALSE;
-+ }
-+
-+ if (!enable_16bit && insn.opcode->isize == 2)
-+ {
-+ as_bad (_("16-bit instrcution is disabled: %s."), str);
-+ return FALSE;
-+ }
-+
-+ /* No isa setting or all isa can use. */
-+ if (attr == 0 || attr == ATTR_ALL)
-+ return TRUE;
-+
-+ if (baseline_isa == 0)
-+ {
-+ /* Map option baseline and instruction attribute. */
-+ switch (nds32_baseline)
-+ {
-+ case ISA_V2:
-+ baseline_isa = ATTR (ISA_V2);
-+ break;
-+ case ISA_V3:
-+ baseline_isa = ATTR (ISA_V3);
-+ break;
-+ case ISA_V3M:
-+ baseline_isa = ATTR (ISA_V3M);
-+ break;
-+ }
-+ }
-+
-+ if ((baseline_isa & attr) == 0)
-+ {
-+ as_bad (_("Not support instrcution %s in the baseline."), str);
-+ return FALSE;
-+ }
-+ return TRUE;
-+}
-+
-+/* Clear security and insert relocation. */
-+static void
-+nds32_set_crc (fragS *fragP, struct nds32_asm_insn *insn, char *out)
-+{
-+ expressionS exp;
-+
-+ /* The security region begin. */
-+ if (strcmp (insn->opcode->opcode, "isps") == 0)
-+ {
-+ exp.X_op = O_symbol;
-+ exp.X_add_symbol = abs_section_sym;
-+ /* Meet the new crc in previos crc region. */
-+ if (crcing == TRUE)
-+ {
-+ exp.X_add_number = NDS32_SECURITY_RESTART;
-+ fix_new_exp (fragP, out - fragP->fr_literal, 0, &exp,
-+ 0, BFD_RELOC_NDS32_SECURITY_16);
-+ }
-+ crcing = TRUE;
-+ /* For security used only. */
-+ exp.X_add_number = NDS32_SECURITY_START;
-+ fix_new_exp (fragP, out - fragP->fr_literal, insn->opcode->isize,
-+ &exp, 0 /* pcrel */, BFD_RELOC_NDS32_SECURITY_16);
-+ }
-+ /* Turn off security region when meeting branch. */
-+ else if (crcing && ((insn->attr & NASM_ATTR_BRANCH)
-+ || insn->opcode->value == MISC (SYSCALL)
-+ || insn->opcode->value == MISC (TRAP)
-+ || insn->opcode->value == MISC (TEQZ)
-+ || insn->opcode->value == MISC (TNEZ)
-+ || insn->opcode->value == MISC (IRET)
-+ || insn->attr & NASM_ATTR_IFC_EXT))
-+ {
-+ crcing = FALSE;
-+ exp.X_op = O_symbol;
-+ exp.X_add_symbol = abs_section_sym;
-+ exp.X_add_number = NDS32_SECURITY_END;
-+ fix_new_exp (fragP, out - fragP->fr_literal, 0, &exp,
-+ 0, BFD_RELOC_NDS32_SECURITY_16);
-+ }
-+}
-+
-+/* Stub of machine dependent. */
-+
-+void
-+md_assemble (char *str)
-+{
-+ struct nds32_asm_insn insn;
-+ char *out;
-+ struct nds32_pseudo_opcode *popcode;
-+ const struct nds32_field *fld = NULL;
-+ fixS *fixP;
-+ uint16_t insn_16;
-+ struct nds32_relocs_pattern *relocs_temp;
-+ fragS *fragP;
-+ int label = label_exist;
-+
-+ popcode = nds32_lookup_pseudo_opcode (str);
-+ /* Note that we need to check 'verbatim' and
-+ 'opcode->physical_op'. If the assembly content is generated by
-+ compiler and this opcode is a physical instruction, there is no
-+ need to perform pseudo instruction expansion/transformation. */
-+ if (popcode && !(verbatim && popcode->physical_op))
-+ {
-+ pseudo_opcode = TRUE;
-+ nds32_pseudo_opcode_wrapper (str, popcode);
-+ pseudo_opcode = FALSE;
-+ nds32_elf_append_relax_relocs (NULL, relocs_list);
-+
-+ /* Free pseudo list. */
-+ relocs_temp = relocs_list;
-+ while (relocs_temp)
-+ {
-+ relocs_list = relocs_list->next;
-+ free (relocs_temp);
-+ relocs_temp = relocs_list;
-+ }
-+ return;
-+ }
-+
-+ label_exist = 0;
-+ insn.info = (expressionS *) alloca (sizeof (expressionS));
-+ asm_desc.result = NASM_OK;
-+ nds32_assemble (&asm_desc, &insn, str);
-+
-+ switch (asm_desc.result)
-+ {
-+ case NASM_ERR_UNKNOWN_OP:
-+ as_bad (_("Unrecognized opcode, %s."), str);
-+ return;
-+ case NASM_ERR_SYNTAX:
-+ as_bad (_("Incorrect syntax, %s."), str);
-+ return;
-+ case NASM_ERR_OPERAND:
-+ as_bad (_("Unrecognized operand/register, %s."), str);
-+ return;
-+ case NASM_ERR_OUT_OF_RANGE:
-+ as_bad (_("Operand out of range, %s."), str);
-+ return;
-+ case NASM_ERR_REG_REDUCED:
-+ as_bad (_("Prohibited register used for reduced-register, %s."), str);
-+ return;
-+ case NASM_ERR_JUNK_EOL:
-+ as_bad (_("Junk at end of line, %s."), str);
-+ return;
-+ }
-+
-+ gas_assert (insn.opcode);
-+
-+ nds32_set_elf_flags_by_insn (&insn);
-+
-+ gas_assert (insn.opcode->isize == 4 || insn.opcode->isize == 2);
-+
-+ if (!nds32_check_insn_available (insn, str))
-+ return;
-+
-+ /* Make sure the beginning of text being 2-byte align. */
-+ nds32_adjust_label (1);
-+ add_mapping_symbol (MAP_CODE, 0, 0);
-+ fld = insn.field;
-+ /* Try to allocate the max size to guarantee relaxable same branch
-+ instructions in the same fragment. */
-+ frag_grow (NDS32_MAXCHAR);
-+ fragP = frag_now;
-+
-+ if (fld && (insn.attr & NASM_ATTR_BRANCH)
-+ && (pseudo_opcode || (insn.opcode->value != INSN_JAL
-+ && insn.opcode->value != INSN_J))
-+ && (!verbatim || pseudo_opcode))
-+ {
-+ /* User assembly code branch relax for it. */
-+ /* If fld is not NULL, it is a symbol. */
-+ /* Branch msut relax to proper pattern in user assembly code exclude
-+ J and JAL. Keep these two in original type for users which wants
-+ to keep their size be fixed. In general, assembler does not convert
-+ instruction generated by compiler. But jump instruction may be
-+ truncated in text virtual model. For workaround, compiler generate
-+ pseudo jump to fix this issue currently. */
-+
-+ /* Get branch range type. */
-+ dwarf2_emit_insn (0);
-+ enum nds32_br_range range_type;
-+ expressionS *pexp = insn.info;
-+
-+ range_type = get_range_type (fld);
-+
-+ out = frag_var (rs_machine_dependent, NDS32_MAXCHAR,
-+ 0, /* VAR is un-used. */
-+ range_type, /* SUBTYPE is used as range type. */
-+ pexp->X_add_symbol, pexp->X_add_number, 0);
-+
-+ fragP->fr_fix += insn.opcode->isize;
-+ fragP->tc_frag_data.opcode = insn.opcode;
-+ fragP->tc_frag_data.insn = insn.insn;
-+ if (insn.opcode->isize == 4)
-+ bfd_putb32 (insn.insn, out);
-+ else if (insn.opcode->isize == 2)
-+ bfd_putb16 (insn.insn, out);
-+ fragP->tc_frag_data.flag |= NDS32_FRAG_BRANCH;
-+ nds32_set_crc (fragP, &insn, out);
-+ return;
-+ /* md_convert_frag will insert relocations. */
-+ }
-+ else if (!relaxing && enable_16bit && (optimize || optimize_for_space)
-+ && ((!fld && !verbatim && insn.opcode->isize == 4
-+ && nds32_convert_32_to_16 (stdoutput, insn.insn, &insn_16, NULL))
-+ || (insn.opcode->isize == 2
-+ && nds32_convert_16_to_32 (stdoutput, insn.insn, NULL))))
-+ {
-+ /* Record this one is relaxable. */
-+ expressionS *pexp = insn.info;
-+ dwarf2_emit_insn (0);
-+ if (fld)
-+ {
-+ out = frag_var (rs_machine_dependent,
-+ 4, /* Max size is 32-bit instruction. */
-+ 0, /* VAR is un-used. */
-+ 0, pexp->X_add_symbol, pexp->X_add_number, 0);
-+ fragP->tc_frag_data.flag |= NDS32_FRAG_RELAXABLE_BRANCH;
-+ }
-+ else
-+ out = frag_var (rs_machine_dependent,
-+ 4, /* Max size is 32-bit instruction. */
-+ 0, /* VAR is un-used. */
-+ 0, NULL, 0, NULL);
-+ fragP->tc_frag_data.flag |= NDS32_FRAG_RELAXABLE;
-+ fragP->tc_frag_data.opcode = insn.opcode;
-+ fragP->tc_frag_data.insn = insn.insn;
-+ fragP->fr_fix += 2;
-+
-+ /* In original, we don't relax the instrucion with label on it,
-+ but this may cause some redundant nop16. Therefore, tag this
-+ relaxable instruction and relax it carefully. */
-+ if (label)
-+ fragP->tc_frag_data.flag |= NDS32_FRAG_LABEL;
-+
-+ if (insn.opcode->isize == 4)
-+ bfd_putb16 (insn_16, out);
-+ else if (insn.opcode->isize == 2)
-+ bfd_putb16 (insn.insn, out);
-+ nds32_set_crc (fragP, &insn, out);
-+ return;
-+ }
-+ else if ((verbatim || !relaxing) && optimize && label)
-+ {
-+ /* This instruction is with label. */
-+ expressionS exp;
-+ out = frag_var (rs_machine_dependent, insn.opcode->isize,
-+ 0, 0, NULL, 0, NULL);
-+ /* If this insturction is branch target, it is not relaxable. */
-+ fragP->tc_frag_data.flag = NDS32_FRAG_LABEL;
-+ fragP->tc_frag_data.opcode = insn.opcode;
-+ fragP->tc_frag_data.insn = insn.insn;
-+ fragP->fr_fix += insn.opcode->isize;
-+ if (insn.opcode->isize == 4)
-+ {
-+ exp.X_op = O_symbol;
-+ exp.X_add_symbol = abs_section_sym;
-+ exp.X_add_number = 0;
-+ fixP = fix_new_exp (fragP, fragP->fr_fix - 4, 0, &exp,
-+ 0, BFD_RELOC_NDS32_LABEL);
-+ if (!verbatim)
-+ fragP->tc_frag_data.flag = NDS32_FRAG_ALIGN;
-+ }
-+ }
-+ else
-+ out = frag_more (insn.opcode->isize);
-+
-+ if (insn.opcode->isize == 4)
-+ bfd_putb32 (insn.insn, out);
-+ else if (insn.opcode->isize == 2)
-+ bfd_putb16 (insn.insn, out);
-+
-+ dwarf2_emit_insn (insn.opcode->isize);
-+
-+ /* Compiler generating code and user assembly pseudo load-store, insert
-+ fixup here. */
-+ expressionS *pexp = insn.info;
-+ fixP = nds32_elf_record_fixup_exp (fragP, str, fld, pexp, out, &insn);
-+ /* Build relaxation pattern when relaxing is enable. */
-+ if (relaxing)
-+ nds32_elf_build_relax_relation (fixP, pexp, out, &insn, fragP, fld);
-+ nds32_set_crc (fragP, &insn, out);
-+}
-+
-+/* md_macro_start */
-+
-+void
-+nds32_macro_start (void)
-+{
-+}
-+
-+/* md_macro_info */
-+
-+void
-+nds32_macro_info (void *info ATTRIBUTE_UNUSED)
-+{
-+}
-+
-+/* md_macro_end */
-+
-+void
-+nds32_macro_end (void)
-+{
-+}
-+
-+/* GAS will call this function with one argument, an expressionS pointer, for
-+ any expression that can not be recognized. When the function is called,
-+ input_line_pointer will point to the start of the expression. */
-+
-+void
-+md_operand (expressionS *expressionP)
-+{
-+ if (*input_line_pointer == '#')
-+ {
-+ input_line_pointer++;
-+ expression (expressionP);
-+ }
-+}
-+
-+/* GAS will call this function for each section at the end of the assembly, to
-+ permit the CPU back end to adjust the alignment of a section. The function
-+ must take two arguments, a segT for the section and a valueT for the size of
-+ the section, and return a valueT for the rounded size. */
-+
-+valueT
-+md_section_align (segT segment, valueT size)
-+{
-+ int align = bfd_get_section_alignment (stdoutput, segment);
-+
-+ return ((size + (1 << align) - 1) & ((valueT) -1 << align));
-+}
-+
-+/* GAS will call this function when a symbol table lookup fails, before it
-+ creates a new symbol. Typically this would be used to supply symbols whose
-+ name or value changes dynamically, possibly in a context sensitive way.
-+ Predefined symbols with fixed values, such as register names or condition
-+ codes, are typically entered directly into the symbol table when md_begin
-+ is called. One argument is passed, a char * for the symbol. */
-+
-+symbolS *
-+md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
-+{
-+ return NULL;
-+}
-+
-+static long
-+nds32_calc_branch_offset (segT segment, fragS *fragP,
-+ long stretch ATTRIBUTE_UNUSED,
-+ relax_info_t *relax_info,
-+ enum nds32_br_range branch_range_type)
-+{
-+ struct nds32_opcode *opcode = fragP->tc_frag_data.opcode;
-+ symbolS *branch_symbol = fragP->fr_symbol;
-+ offsetT branch_offset = fragP->fr_offset;
-+ offsetT branch_target_address;
-+ offsetT branch_insn_address;
-+ long offset = 0;
-+
-+ if ((S_GET_SEGMENT (branch_symbol) != segment)
-+ || S_IS_WEAK (branch_symbol))
-+ {
-+ /* The symbol is not in the SEGMENT. It could be far far away. */
-+ offset = 0x80000000;
-+ }
-+ else
-+ {
-+ /* Calculate symbol-to-instruction offset. */
-+ branch_target_address = S_GET_VALUE (branch_symbol) + branch_offset;
-+ /* If the destination symbol is beyond current frag address,
-+ STRETCH will take effect to symbol's position. */
-+ if (S_GET_VALUE (branch_symbol) > fragP->fr_address)
-+ branch_target_address += stretch;
-+
-+ branch_insn_address = fragP->fr_address + fragP->fr_fix;
-+ branch_insn_address -= opcode->isize;
-+
-+ /* Update BRANCH_INSN_ADDRESS to relaxed position. */
-+ branch_insn_address += (relax_info->relax_code_size[branch_range_type]
-+ - relax_info->relax_branch_isize[branch_range_type]);
-+
-+ offset = branch_target_address - branch_insn_address;
-+ }
-+
-+ return offset;
-+}
-+
-+static enum nds32_br_range
-+nds32_convert_to_range_type (long offset)
-+{
-+ enum nds32_br_range range_type;
-+
-+ if (-(0x100) <= offset && offset < 0x100) /* 256 bytes */
-+ range_type = BR_RANGE_S256;
-+ else if (-(0x4000) <= offset && offset < 0x4000) /* 16K bytes */
-+ range_type = BR_RANGE_S16K;
-+ else if (-(0x10000) <= offset && offset < 0x10000) /* 64K bytes */
-+ range_type = BR_RANGE_S64K;
-+ else if (-(0x1000000) <= offset && offset < 0x1000000) /* 16M bytes */
-+ range_type = BR_RANGE_S16M;
-+ else /* 4G bytes */
-+ range_type = BR_RANGE_U4G;
-+
-+ return range_type;
-+}
-+
-+/* Set insntruction register mask. */
-+
-+static void
-+nds32_elf_get_set_cond (relax_info_t *relax_info, int offset, uint32_t *insn,
-+ uint32_t ori_insn, int range)
-+{
-+ nds32_cond_field_t *cond_fields;
-+ cond_fields = relax_info->cond_field;
-+ nds32_cond_field_t *code_seq_cond = relax_info->relax_code_condition[range];
-+ uint32_t mask;
-+ int i = 0;
-+ /* The instruction has conditions. Collect condition values. */
-+ while (code_seq_cond[i].bitmask != 0)
-+ {
-+ if (offset == code_seq_cond[i].offset)
-+ {
-+ mask = (ori_insn >> cond_fields[i].bitpos) & cond_fields[i].bitmask;
-+ /* Sign extend. */
-+ if (cond_fields[i].signed_extend)
-+ mask = (mask ^ ((cond_fields[i].bitmask + 1) >> 1)) -
-+ ((cond_fields[i].bitmask + 1) >> 1);
-+ *insn |= (mask & code_seq_cond[i].bitmask) << code_seq_cond[i].bitpos;
-+ }
-+ i++;
-+ }
-+}
-+
-+
-+static int
-+nds32_relax_branch_instructions (segT segment, fragS *fragP,
-+ long stretch ATTRIBUTE_UNUSED,
-+ int init)
-+{
-+ enum nds32_br_range branch_range_type;
-+ struct nds32_opcode *opcode = fragP->tc_frag_data.opcode;
-+ long offset = 0;
-+ enum nds32_br_range real_range_type;
-+ int adjust = 0;
-+ relax_info_t *relax_info;
-+ int diff = 0;
-+ int i, j, k;
-+ int code_seq_size;
-+ uint32_t *code_seq;
-+ uint32_t insn;
-+ int insn_size;
-+ int code_seq_offset;
-+
-+ /* Replace with gas_assert (fragP->fr_symbol != NULL); */
-+ if (fragP->fr_symbol == NULL)
-+ return adjust;
-+
-+ /* If frag_var is not enough room, the previos frag is fr_full and with
-+ opcode. The new one is rs_dependent but without opcode. */
-+ if (opcode == NULL)
-+ return adjust;
-+
-+ /* Use U4G mode for b and bal in verbatim mode because lto may combine
-+ functions into a file. And order the file in the last when linking.
-+ Once there is multiple definition, the same function will be kicked.
-+ This may cause relocation truncated error. */
-+ if (verbatim && !nds32_pic
-+ && (strcmp (opcode->opcode, "j") == 0
-+ || strcmp (opcode->opcode, "jal") == 0))
-+ {
-+ fragP->fr_subtype = BR_RANGE_U4G;
-+ if (init)
-+ return 8;
-+ else
-+ return 0;
-+ }
-+
-+ relax_info = hash_find (nds32_relax_info_hash, opcode->opcode);
-+
-+ if (relax_info == NULL)
-+ return adjust;
-+
-+ if (init)
-+ {
-+ branch_range_type = relax_info->br_range;
-+ i = BR_RANGE_S256;
-+ }
-+ else
-+ {
-+ branch_range_type = fragP->fr_subtype;
-+ i = branch_range_type;
-+ }
-+
-+ offset = nds32_calc_branch_offset (segment, fragP, stretch,
-+ relax_info, branch_range_type);
-+
-+ real_range_type = nds32_convert_to_range_type (offset);
-+
-+ /* If actual range is equal to instruction jump range, do nothing. */
-+ if (real_range_type == branch_range_type)
-+ {
-+ fragP->fr_subtype = real_range_type;
-+ return adjust;
-+ }
-+
-+ /* Find out proper relaxation code sequence. */
-+ for (; i < BR_RANGE_NUM; i++)
-+ {
-+ if (real_range_type <= (unsigned int) i)
-+ {
-+ if (init)
-+ diff = relax_info->relax_code_size[i] - opcode->isize;
-+ else
-+ diff = relax_info->relax_code_size[i]
-+ - relax_info->relax_code_size[branch_range_type];
-+
-+ /* If the instruction could be converted to 16-bits,
-+ minus the difference. */
-+ code_seq_offset = 0;
-+ j = 0;
-+ k = 0;
-+ code_seq_size = relax_info->relax_code_size[i];
-+ code_seq = relax_info->relax_code_seq[i];
-+ while (code_seq_offset < code_seq_size)
-+ {
-+ insn = code_seq[j];
-+ if (insn & 0x80000000) /* 16-bits instruction. */
-+ {
-+ insn_size = 2;
-+ }
-+ else /* 32-bits instruction. */
-+ {
-+ insn_size = 4;
-+
-+ while (relax_info->relax_fixup[i][k].size !=0
-+ && relax_info->relax_fixup[i][k].offset < code_seq_offset)
-+ k++;
-+ }
-+
-+ code_seq_offset += insn_size;
-+ j++;
-+ }
-+
-+ /* Update fr_subtype to new NDS32_BR_RANGE. */
-+ fragP->fr_subtype = i;
-+ break;
-+ }
-+ }
-+
-+ return diff + adjust;
-+}
-+
-+/* Adjust relaxable frag till current frag. */
-+
-+static int
-+nds32_adjust_relaxable_frag (fragS *startP, fragS *fragP)
-+{
-+ int adj;
-+ if (startP->tc_frag_data.flag & NDS32_FRAG_RELAXED)
-+ adj = -2;
-+ else
-+ adj = 2;
-+
-+ startP->tc_frag_data.flag ^= NDS32_FRAG_RELAXED;
-+
-+ while (startP)
-+ {
-+ startP = startP->fr_next;
-+ if (startP)
-+ {
-+ startP->fr_address += adj;
-+ if (startP == fragP)
-+ break;
-+ }
-+ }
-+ return adj;
-+}
-+
-+static addressT
-+nds32_get_align (addressT address, int align)
-+{
-+ addressT mask, new_address;
-+
-+ mask = ~((addressT) (~0) << align);
-+ new_address = (address + mask) & (~mask);
-+ return (new_address - address);
-+}
-+
-+/* Check the prev_frag is legal. */
-+static void
-+invalid_prev_frag (fragS * fragP, fragS **prev_frag)
-+{
-+ addressT address;
-+ fragS *frag_start = *prev_frag;
-+
-+ if (!frag_start)
-+ return;
-+
-+ if (frag_start->last_fr_address >= fragP->last_fr_address)
-+ {
-+ *prev_frag = NULL;
-+ return;
-+ }
-+
-+ fragS *frag_t = *prev_frag;
-+ while (frag_t != fragP)
-+ {
-+ if (frag_t->fr_type == rs_align
-+ || frag_t->fr_type == rs_align_code
-+ || frag_t->fr_type == rs_align_test)
-+ {
-+ /* Relax instruction can not walk across lable. */
-+ if (frag_t->tc_frag_data.flag & NDS32_FRAG_LABEL)
-+ {
-+ prev_frag = NULL;
-+ return;
-+ }
-+ /* Relax previos relaxable to align rs_align frag. */
-+ address = frag_t->fr_address + frag_t->fr_fix;
-+ addressT offset = nds32_get_align (address, (int) frag_t->fr_offset);
-+ if (offset & 0x2)
-+ {
-+ /* If there is label on the prev_frag, check if it is aligned. */
-+ if (!((*prev_frag)->tc_frag_data.flag & NDS32_FRAG_LABEL)
-+ || (((*prev_frag)->fr_address + (*prev_frag)->fr_fix - 2 )
-+ & 0x2) == 0)
-+ nds32_adjust_relaxable_frag (*prev_frag, frag_t);
-+ }
-+ *prev_frag = NULL;
-+ return;
-+ }
-+ frag_t = frag_t->fr_next;
-+ }
-+
-+ if (fragP->tc_frag_data.flag & NDS32_FRAG_ALIGN)
-+ {
-+ address = fragP->fr_address;
-+ addressT offset = nds32_get_align (address, 2);
-+ if (offset & 0x2)
-+ {
-+ /* If there is label on the prev_frag, check if it is aligned. */
-+ if (!((*prev_frag)->tc_frag_data.flag & NDS32_FRAG_LABEL)
-+ || (((*prev_frag)->fr_address + (*prev_frag)->fr_fix - 2 )
-+ & 0x2) == 0)
-+ nds32_adjust_relaxable_frag (*prev_frag, fragP);
-+ }
-+ *prev_frag = NULL;
-+ return;
-+ }
-+}
-+
-+/* md_relax_frag */
-+
-+int
-+nds32_relax_frag (segT segment, fragS *fragP, long stretch ATTRIBUTE_UNUSED)
-+{
-+ /* Currently, there are two kinds of relaxation in nds32 assembler.
-+ 1. relax for branch
-+ 2. relax for 32-bits to 16-bits */
-+
-+ static fragS *prev_frag = NULL;
-+ int adjust = 0;
-+
-+ invalid_prev_frag (fragP, &prev_frag);
-+
-+ if (fragP->tc_frag_data.flag & NDS32_FRAG_BRANCH)
-+ adjust = nds32_relax_branch_instructions (segment, fragP, stretch, 0);
-+ if (fragP->tc_frag_data.flag & NDS32_FRAG_LABEL)
-+ prev_frag = NULL;
-+ if (fragP->tc_frag_data.flag & NDS32_FRAG_RELAXABLE
-+ && (fragP->tc_frag_data.flag & NDS32_FRAG_RELAXED) == 0)
-+ /* Here is considered relaxed case originally. But it may cause
-+ unendless loop when relaxing. Once the instruction is relaxed,
-+ it can not be undo. */
-+ prev_frag = fragP;
-+
-+ return adjust;
-+}
-+
-+/* This function returns an initial guess of the length by which a fragment
-+ must grow to hold a branch to reach its destination. Also updates
-+ fr_type/fr_subtype as necessary.
-+
-+ It is called just before doing relaxation. Any symbol that is now undefined
-+ will not become defined. The guess for fr_var is ACTUALLY the growth beyond
-+ fr_fix. Whatever we do to grow fr_fix or fr_var contributes to our returned
-+ value. Although it may not be explicit in the frag, pretend fr_var starts
-+ with a 0 value. */
-+
-+int
-+md_estimate_size_before_relax (fragS *fragP, segT segment)
-+{
-+ /* Currently, there are two kinds of relaxation in nds32 assembler.
-+ 1. relax for branch
-+ 2. relax for 32-bits to 16-bits */
-+
-+ /* Save previos relaxable frag. */
-+ static fragS *prev_frag = NULL;
-+ int adjust = 0;
-+
-+ invalid_prev_frag (fragP, &prev_frag);
-+
-+ if (fragP->tc_frag_data.flag & NDS32_FRAG_BRANCH)
-+ adjust = nds32_relax_branch_instructions (segment, fragP, 0, 1);
-+ if (fragP->tc_frag_data.flag & NDS32_FRAG_LABEL)
-+ prev_frag = NULL;
-+ if (fragP->tc_frag_data.flag & NDS32_FRAG_RELAXED)
-+ adjust = 2;
-+ else if (fragP->tc_frag_data.flag & NDS32_FRAG_RELAXABLE)
-+ prev_frag = fragP;
-+
-+ return adjust;
-+}
-+
-+/* GAS will call this for each rs_machine_dependent fragment. The instruction
-+ is completed using the data from the relaxation pass. It may also create any
-+ necessary relocations.
-+
-+ *FRAGP has been relaxed to its final size, and now needs to have the bytes
-+ inside it modified to conform to the new size. It is called after relaxation
-+ is finished.
-+
-+ fragP->fr_type == rs_machine_dependent.
-+ fragP->fr_subtype is the subtype of what the address relaxed to. */
-+
-+void
-+md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT sec, fragS *fragP)
-+{
-+ /* Convert branch relaxation instructions. */
-+ symbolS *branch_symbol = fragP->fr_symbol;
-+ offsetT branch_offset = fragP->fr_offset;
-+ enum nds32_br_range branch_range_type = fragP->fr_subtype;
-+ struct nds32_opcode *opcode = fragP->tc_frag_data.opcode;
-+ uint32_t origin_insn = fragP->tc_frag_data.insn;
-+ relax_info_t *relax_info;
-+ char *fr_buffer;
-+ int fr_where;
-+ int addend ATTRIBUTE_UNUSED;
-+ offsetT branch_target_address, branch_insn_address;
-+ expressionS exp;
-+ fixS *fixP;
-+ uint32_t *code_seq;
-+ uint32_t insn;
-+ int code_size, insn_size, offset, fixup_size;
-+ int buf_offset, pcrel;
-+ int i, k;
-+ uint16_t insn_16;
-+ nds32_relax_fixup_info_t fixup_info[MAX_RELAX_FIX];
-+ /* Save the 1st instruction is converted to 16 bit or not. */
-+ unsigned int branch_size;
-+
-+ /* Replace with gas_assert (branch_symbol != NULL); */
-+ if (branch_symbol == NULL && !(fragP->tc_frag_data.flag & NDS32_FRAG_RELAXED))
-+ return;
-+
-+ /* If frag_var is not enough room, the previos frag is fr_full and with
-+ opcode. The new one is rs_dependent but without opcode. */
-+ if (opcode == NULL)
-+ return;
-+
-+ if (fragP->tc_frag_data.flag & NDS32_FRAG_RELAXABLE_BRANCH)
-+ {
-+ relax_info = hash_find (nds32_relax_info_hash, opcode->opcode);
-+
-+ if (relax_info == NULL)
-+ return;
-+
-+ i = BR_RANGE_S256;
-+ while (i < BR_RANGE_NUM
-+ && relax_info->relax_code_size[i]
-+ != (fragP->tc_frag_data.flag & NDS32_FRAG_RELAXED ? 4 : 2))
-+ i++;
-+
-+ if (i >= BR_RANGE_NUM)
-+ as_bad ("Internal error: Cannot find relocation of"
-+ "relaxable branch.");
-+
-+ exp.X_op = O_symbol;
-+ exp.X_add_symbol = branch_symbol;
-+ exp.X_add_number = branch_offset;
-+ pcrel = ((relax_info->relax_fixup[i][0].ramp & NDS32_PCREL) != 0) ? 1 : 0;
-+ fr_where = fragP->fr_fix - 2;
-+ fixP = fix_new_exp (fragP, fr_where, relax_info->relax_fixup[i][0].size,
-+ &exp, pcrel, relax_info->relax_fixup[i][0].r_type);
-+ fixP->fx_addnumber = fixP->fx_offset;
-+
-+ if (fragP->tc_frag_data.flag & NDS32_FRAG_RELAXED)
-+ {
-+ insn_16 = fragP->tc_frag_data.insn;
-+ nds32_convert_16_to_32 (stdoutput, insn_16, &insn);
-+ fr_buffer = fragP->fr_literal + fr_where;
-+ fragP->fr_fix += 2;
-+ exp.X_op = O_symbol;
-+ exp.X_add_symbol = abs_section_sym;
-+ exp.X_add_number = 0;
-+ fix_new_exp (fragP, fr_where, 4,
-+ &exp, 0, BFD_RELOC_NDS32_INSN16);
-+ number_to_chars_bigendian (fr_buffer, insn, 4);
-+ }
-+ }
-+ else if (fragP->tc_frag_data.flag & NDS32_FRAG_RELAXED)
-+ {
-+ if (fragP->tc_frag_data.opcode->isize == 2)
-+ {
-+ insn_16 = fragP->tc_frag_data.insn;
-+ nds32_convert_16_to_32 (stdoutput, insn_16, &insn);
-+ }
-+ else
-+ insn = fragP->tc_frag_data.insn;
-+ fragP->fr_fix += 2;
-+ fr_where = fragP->fr_fix - 4;
-+ fr_buffer = fragP->fr_literal + fr_where;
-+ exp.X_op = O_symbol;
-+ exp.X_add_symbol = abs_section_sym;
-+ exp.X_add_number = 0;
-+ fix_new_exp (fragP, fr_where, 4, &exp, 0,
-+ BFD_RELOC_NDS32_INSN16);
-+ number_to_chars_bigendian (fr_buffer, insn, 4);
-+ }
-+ else if (fragP->tc_frag_data.flag & NDS32_FRAG_BRANCH)
-+ {
-+ /* Branch instruction adjust and append relocations. */
-+ relax_info = hash_find (nds32_relax_info_hash, opcode->opcode);
-+
-+ if (relax_info == NULL)
-+ return;
-+
-+ fr_where = fragP->fr_fix - opcode->isize;
-+ fr_buffer = fragP->fr_literal + fr_where;
-+
-+ if ((S_GET_SEGMENT (branch_symbol) != sec)
-+ || S_IS_WEAK (branch_symbol))
-+ {
-+ if (fragP->fr_offset & 3)
-+ as_warn (_("Addend to unresolved symbol is not on word boundary."));
-+ addend = 0;
-+ }
-+ else
-+ {
-+ /* Calculate symbol-to-instruction offset. */
-+ branch_target_address = S_GET_VALUE (branch_symbol) + branch_offset;
-+ branch_insn_address = fragP->fr_address + fr_where;
-+ addend = (branch_target_address - branch_insn_address) >> 1;
-+ }
-+
-+ code_size = relax_info->relax_code_size[branch_range_type];
-+ code_seq = relax_info->relax_code_seq[branch_range_type];
-+
-+ memcpy (fixup_info, relax_info->relax_fixup[branch_range_type],
-+ sizeof (fixup_info));
-+
-+ /* Fill in frag. */
-+ i = 0;
-+ k = 0;
-+ offset = 0; /* code_seq offset */
-+ buf_offset = 0; /* fr_buffer offset */
-+ while (offset < code_size)
-+ {
-+ insn = code_seq[i];
-+ if (insn & 0x80000000) /* 16-bits instruction. */
-+ {
-+ insn = (insn >> 16) & 0xFFFF;
-+ insn_size = 2;
-+ }
-+ else /* 32-bits instruction. */
-+ {
-+ insn_size = 4;
-+ }
-+
-+ nds32_elf_get_set_cond (relax_info, offset, &insn,
-+ origin_insn, branch_range_type);
-+
-+ /* Try to convert to 16-bits instruction. Currently, only the first
-+ insntruction in pattern can be converted. EX: bnez sethi ori jr,
-+ only bnez can be converted to 16 bit and ori can't. */
-+
-+ while (fixup_info[k].size != 0
-+ && relax_info->relax_fixup[branch_range_type][k].offset < offset)
-+ k++;
-+
-+ number_to_chars_bigendian (fr_buffer + buf_offset, insn, insn_size);
-+ buf_offset += insn_size;
-+
-+ offset += insn_size;
-+ i++;
-+ }
-+
-+ /* Set up fixup. */
-+ exp.X_op = O_symbol;
-+
-+ for (i = 0; fixup_info[i].size != 0; i++)
-+ {
-+ fixup_size = fixup_info[i].size;
-+ pcrel = ((fixup_info[i].ramp & NDS32_PCREL) != 0) ? 1 : 0;
-+
-+ if ((fixup_info[i].ramp & NDS32_CREATE_LABEL) != 0)
-+ {
-+ /* This is a reverse branch. */
-+ exp.X_add_symbol = symbol_temp_new (sec, 0, fragP->fr_next);
-+ exp.X_add_number = 0;
-+ }
-+ else if ((fixup_info[i].ramp & NDS32_PTR) != 0)
-+ {
-+ /* This relocation has to point to another instruction. */
-+ branch_size = fr_where + code_size - 4;
-+ exp.X_add_symbol = symbol_temp_new (sec, branch_size, fragP);
-+ exp.X_add_number = 0;
-+ }
-+ else if ((fixup_info[i].ramp & NDS32_ABS) != 0)
-+ {
-+ /* This is a tag relocation. */
-+ exp.X_add_symbol = abs_section_sym;
-+ exp.X_add_number = 0;
-+ }
-+ else if ((fixup_info[i].ramp & NDS32_INSN16) != 0)
-+ {
-+ if (!enable_16bit)
-+ continue;
-+ /* This is a tag relocation. */
-+ exp.X_add_symbol = abs_section_sym;
-+ exp.X_add_number = 0;
-+ }
-+ else
-+ {
-+ exp.X_add_symbol = branch_symbol;
-+ exp.X_add_number = branch_offset;
-+ }
-+
-+ if (fixup_info[i].r_type != 0)
-+ {
-+ fixP = fix_new_exp (fragP, fr_where + fixup_info[i].offset,
-+ fixup_size, &exp, pcrel,
-+ fixup_info[i].r_type);
-+ fixP->fx_addnumber = fixP->fx_offset;
-+ }
-+ }
-+
-+ fragP->fr_fix = fr_where + buf_offset;
-+ }
-+}
-+
-+/* tc_frob_file_before_fix */
-+
-+void
-+nds32_frob_file_before_fix (void)
-+{
-+}
-+
-+static bfd_boolean
-+nds32_relaxable_section (asection *sec)
-+{
-+ return ((sec->flags & SEC_DEBUGGING) == 0
-+ && strcmp (sec->name, ".eh_frame") != 0);
-+}
-+
-+/* TC_FORCE_RELOCATION */
-+int
-+nds32_force_relocation (fixS * fix)
-+{
-+ switch (fix->fx_r_type)
-+ {
-+ case BFD_RELOC_NDS32_INSN16:
-+ case BFD_RELOC_NDS32_LABEL:
-+ case BFD_RELOC_NDS32_LONGCALL1:
-+ case BFD_RELOC_NDS32_LONGCALL2:
-+ case BFD_RELOC_NDS32_LONGCALL3:
-+ case BFD_RELOC_NDS32_LONGJUMP1:
-+ case BFD_RELOC_NDS32_LONGJUMP2:
-+ case BFD_RELOC_NDS32_LONGJUMP3:
-+ case BFD_RELOC_NDS32_LOADSTORE:
-+ case BFD_RELOC_NDS32_9_FIXED:
-+ case BFD_RELOC_NDS32_15_FIXED:
-+ case BFD_RELOC_NDS32_17_FIXED:
-+ case BFD_RELOC_NDS32_25_FIXED:
-+ case BFD_RELOC_NDS32_9_PCREL:
-+ case BFD_RELOC_NDS32_15_PCREL:
-+ case BFD_RELOC_NDS32_17_PCREL:
-+ case BFD_RELOC_NDS32_WORD_9_PCREL:
-+ case BFD_RELOC_NDS32_10_UPCREL:
-+ case BFD_RELOC_NDS32_25_PCREL:
-+ case BFD_RELOC_NDS32_MINUEND:
-+ case BFD_RELOC_NDS32_SUBTRAHEND:
-+ return 1;
-+
-+ case BFD_RELOC_8:
-+ case BFD_RELOC_16:
-+ case BFD_RELOC_32:
-+ case BFD_RELOC_NDS32_DIFF_ULEB128:
-+ /* Linker should handle difference between two symbol. */
-+ return fix->fx_subsy != NULL
-+ && nds32_relaxable_section (S_GET_SEGMENT (fix->fx_addsy));
-+ case BFD_RELOC_64:
-+ if (fix->fx_subsy)
-+ as_bad ("Double word for difference between two symbols is not "
-+ "supported across relaxation.");
-+ default:
-+ ;
-+ }
-+
-+ if (generic_force_reloc (fix))
-+ return 1;
-+
-+ return fix->fx_pcrel;
-+}
-+
-+/* TC_VALIDATE_FIX_SUB */
-+
-+int
-+nds32_validate_fix_sub (fixS *fix, segT add_symbol_segment)
-+{
-+ segT sub_symbol_segment;
-+
-+ /* This code is referred from Xtensa. Check their implementation for
-+ details. */
-+
-+ /* Make sure both symbols are in the same segment, and that segment is
-+ "normal" and relaxable. */
-+ sub_symbol_segment = S_GET_SEGMENT (fix->fx_subsy);
-+ return (sub_symbol_segment == add_symbol_segment
-+ && add_symbol_segment != undefined_section);
-+}
-+
-+void
-+md_number_to_chars (char *buf, valueT val, int n)
-+{
-+ if (target_big_endian)
-+ number_to_chars_bigendian (buf, val, n);
-+ else
-+ number_to_chars_littleendian (buf, val, n);
-+}
-+
-+/* Equal to MAX_PRECISION in atof-ieee.c. */
-+#define MAX_LITTLENUMS 6
-+
-+/* This function is called to convert an ASCII string into a floating point
-+ value in format used by the CPU. */
-+
-+char *
-+md_atof (int type, char *litP, int *sizeP)
-+{
-+ int i;
-+ int prec;
-+ LITTLENUM_TYPE words[MAX_LITTLENUMS];
-+ char *t;
-+
-+ switch (type)
-+ {
-+ case 'f':
-+ case 'F':
-+ case 's':
-+ case 'S':
-+ prec = 2;
-+ break;
-+ case 'd':
-+ case 'D':
-+ case 'r':
-+ case 'R':
-+ prec = 4;
-+ break;
-+ default:
-+ *sizeP = 0;
-+ return _("Bad call to md_atof()");
-+ }
-+
-+ t = atof_ieee (input_line_pointer, type, words);
-+ if (t)
-+ input_line_pointer = t;
-+ *sizeP = prec * sizeof (LITTLENUM_TYPE);
-+
-+ if (target_big_endian)
-+ {
-+ for (i = 0; i < prec; i++)
-+ {
-+ md_number_to_chars (litP, (valueT) words[i],
-+ sizeof (LITTLENUM_TYPE));
-+ litP += sizeof (LITTLENUM_TYPE);
-+ }
-+ }
-+ else
-+ {
-+ for (i = prec - 1; i >= 0; i--)
-+ {
-+ md_number_to_chars (litP, (valueT) words[i],
-+ sizeof (LITTLENUM_TYPE));
-+ litP += sizeof (LITTLENUM_TYPE);
-+ }
-+ }
-+
-+ return 0;
-+}
-+
-+/* md_elf_section_change_hook */
-+
-+void
-+nds32_elf_section_change_hook (void)
-+{
-+}
-+
-+/* md_cleanup */
-+
-+void
-+nds32_cleanup (void)
-+{
-+}
-+
-+/* This function is used to scan leb128 subtraction expressions,
-+ and insert fixups for them.
-+
-+ e.g., .leb128 .L1 - .L0
-+
-+ These expressions are heavily used in debug information or
-+ exception tables. Because relaxation will change code size,
-+ we must resolve them in link time. */
-+
-+static void
-+nds32_insert_leb128_fixes (bfd *abfd ATTRIBUTE_UNUSED,
-+ asection *sec, void *xxx ATTRIBUTE_UNUSED)
-+{
-+ segment_info_type *seginfo = seg_info (sec);
-+ struct frag *fragP;
-+
-+ subseg_set (sec, 0);
-+
-+ for (fragP = seginfo->frchainP->frch_root;
-+ fragP; fragP = fragP->fr_next)
-+ {
-+ expressionS *exp;
-+
-+ /* Only unsigned leb128 can be handle. */
-+ if (fragP->fr_type != rs_leb128 || fragP->fr_subtype != 0
-+ || fragP->fr_symbol == NULL)
-+ continue;
-+
-+ exp = symbol_get_value_expression (fragP->fr_symbol);
-+
-+ if (exp->X_op != O_subtract)
-+ continue;
-+
-+ fix_new_exp (fragP, fragP->fr_fix, 0,
-+ exp, 0, BFD_RELOC_NDS32_DIFF_ULEB128);
-+ }
-+}
-+
-+static void
-+nds32_insert_relax_entry (bfd *abfd ATTRIBUTE_UNUSED, asection *sec,
-+ void *xxx ATTRIBUTE_UNUSED)
-+{
-+ segment_info_type *seginfo;
-+ fragS *fragP;
-+ fixS *fixP;
-+ expressionS exp;
-+ fixS *fixp;
-+
-+ seginfo = seg_info (sec);
-+ if (!seginfo || !symbol_rootP || !subseg_text_p (sec) || sec->size == 0)
-+ return;
-+ /* If there is no relocation and relax is disabled, it is not necessary to
-+ insert R_NDS32_RELAX_ENTRY for linker do EX9 or IFC optimization. */
-+ for (fixp = seginfo->fix_root; fixp; fixp = fixp->fx_next)
-+ if (!fixp->fx_done)
-+ break;
-+ if (!fixp && !enable_relax_ex9 && !enable_relax_ifc && !verbatim)
-+ return;
-+
-+ subseg_change (sec, 0);
-+
-+ /* Set RELAX_ENTRY flags for linker. */
-+ fragP = seginfo->frchainP->frch_root;
-+ exp.X_op = O_symbol;
-+ exp.X_add_symbol = section_symbol (sec);
-+ exp.X_add_number = 0;
-+ if (!enable_relax_relocs)
-+ exp.X_add_number |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
-+ else
-+ {
-+ /* These flags are only enabled when global relax is enabled.
-+ Maybe we can check DISABLE_RELAX_FLAG at linke-time,
-+ so we set them anyway. */
-+ if (enable_relax_ex9)
-+ exp.X_add_number |= R_NDS32_RELAX_ENTRY_EX9_FLAG;
-+ if (enable_relax_ifc)
-+ exp.X_add_number |= R_NDS32_RELAX_ENTRY_IFC_FLAG;
-+ if (verbatim)
-+ exp.X_add_number |= R_NDS32_RELAX_ENTRY_VERBATIM_FLAG;
-+ }
-+ if (optimize)
-+ exp.X_add_number |= R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG;
-+ if (optimize_for_space)
-+ exp.X_add_number |= R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG;
-+
-+ fixP = fix_new_exp (fragP, 0, 0, &exp, 0, BFD_RELOC_NDS32_RELAX_ENTRY);
-+ fixP->fx_no_overflow = 1;
-+}
-+
-+/* Analysis relax hint and insert suitable relocation pattern. */
-+
-+static void
-+nds32_elf_analysis_relax_hint (void)
-+{
-+ hash_traverse (nds32_hint_hash, nds32_elf_append_relax_relocs);
-+}
-+
-+static void
-+nds32_elf_insert_final_frag (void)
-+{
-+ struct frchain *frchainP;
-+ asection *s;
-+ fragS *fragP;
-+
-+ if (!optimize)
-+ return;
-+
-+ for (s = stdoutput->sections; s; s = s->next)
-+ {
-+ segment_info_type *seginfo = seg_info (s);
-+ if (!seginfo)
-+ continue;
-+
-+ for (frchainP = seginfo->frchainP; frchainP != NULL;
-+ frchainP = frchainP->frch_next)
-+ {
-+ subseg_set (s, frchainP->frch_subseg);
-+
-+ if (subseg_text_p (now_seg))
-+ {
-+ fragP = frag_now;
-+ frag_var (rs_machine_dependent, 2, /* Max size. */
-+ 0, /* VAR is un-used. */ 0, NULL, 0, NULL);
-+ fragP->tc_frag_data.flag |= NDS32_FRAG_FINAL;
-+ }
-+ }
-+ }
-+}
-+
-+void
-+md_end (void)
-+{
-+ nds32_elf_insert_final_frag ();
-+ nds32_elf_analysis_relax_hint ();
-+ bfd_map_over_sections (stdoutput, nds32_insert_leb128_fixes, NULL);
-+}
-+
-+/* Implement md_allow_local_subtract. */
-+
-+bfd_boolean
-+nds32_allow_local_subtract (expressionS *expr_l ATTRIBUTE_UNUSED,
-+ expressionS *expr_r ATTRIBUTE_UNUSED,
-+ segT sec ATTRIBUTE_UNUSED)
-+{
-+ /* Don't allow any subtraction, because relax may change the code. */
-+ return FALSE;
-+}
-+
-+/* Sort relocation by address.
-+
-+ We didn't use qsort () in stdlib, because quick-sort is not a stable
-+ sorting algorithm. Relocations at the same address (r_offset) must keep
-+ their relative order. For example, RELAX_ENTRY must be the very first
-+ relocation entry.
-+
-+ Currently, this function implements insertion-sort. */
-+
-+static int
-+compar_relent (const void *lhs, const void *rhs)
-+{
-+ const arelent **l = (const arelent **) lhs;
-+ const arelent **r = (const arelent **) rhs;
-+
-+ if ((*l)->address > (*r)->address)
-+ return 1;
-+ else if ((*l)->address == (*r)->address)
-+ return 0;
-+ else
-+ return -1;
-+}
-+
-+/* SET_SECTION_RELOCS ()
-+
-+ Although this macro is originally used to set a relocation for each section,
-+ we use it to sort relocations in the same section by the address of the
-+ relocation. */
-+
-+void
-+nds32_set_section_relocs (asection *sec, arelent ** relocs ATTRIBUTE_UNUSED,
-+ unsigned int n ATTRIBUTE_UNUSED)
-+{
-+ bfd *abfd ATTRIBUTE_UNUSED = sec->owner;
-+ if (bfd_get_section_flags (abfd, sec) & (flagword) SEC_RELOC)
-+ nds32_insertion_sort (sec->orelocation, sec->reloc_count,
-+ sizeof (arelent**), compar_relent);
-+}
-+
-+long
-+nds32_pcrel_from_section (fixS *fixP, segT sec ATTRIBUTE_UNUSED)
-+{
-+ if (fixP->fx_addsy == NULL || !S_IS_DEFINED (fixP->fx_addsy)
-+ || S_IS_EXTERNAL (fixP->fx_addsy) || S_IS_WEAK (fixP->fx_addsy))
-+ {
-+ /* Let linker resolve undefined symbols. */
-+ return 0;
-+ }
-+
-+ return fixP->fx_frag->fr_address + fixP->fx_where;
-+}
-+
-+/* md_post_relax_hook ()
-+ Insert relax entry relocation into sections. */
-+
-+void
-+nds32_post_relax_hook (void)
-+{
-+ bfd_map_over_sections (stdoutput, nds32_insert_relax_entry, NULL);
-+}
-+
-+/* tc_fix_adjustable ()
-+
-+ Return whether this symbol (fixup) can be replaced with
-+ section symbols. */
-+
-+bfd_boolean
-+nds32_fix_adjustable (fixS *fixP)
-+{
-+ switch (fixP->fx_r_type)
-+ {
-+ case BFD_RELOC_NDS32_WORD_9_PCREL:
-+ case BFD_RELOC_NDS32_9_PCREL:
-+ case BFD_RELOC_NDS32_15_PCREL:
-+ case BFD_RELOC_NDS32_17_PCREL:
-+ case BFD_RELOC_NDS32_25_PCREL:
-+ case BFD_RELOC_NDS32_HI20:
-+ case BFD_RELOC_NDS32_LO12S0:
-+ case BFD_RELOC_8:
-+ case BFD_RELOC_16:
-+ case BFD_RELOC_32:
-+ case BFD_RELOC_NDS32_PTR:
-+ case BFD_RELOC_NDS32_LONGCALL4:
-+ case BFD_RELOC_NDS32_LONGCALL5:
-+ case BFD_RELOC_NDS32_LONGCALL6:
-+ case BFD_RELOC_NDS32_LONGJUMP4:
-+ case BFD_RELOC_NDS32_LONGJUMP5:
-+ case BFD_RELOC_NDS32_LONGJUMP6:
-+ case BFD_RELOC_NDS32_LONGJUMP7:
-+ case BFD_RELOC_NDS32_10IFCU_PCREL:
-+ case BFD_RELOC_NDS32_17IFC_PCREL:
-+ return 1;
-+ default:
-+ return 0;
-+ }
-+}
-+
-+/* elf_tc_final_processing */
-+
-+void
-+elf_nds32_final_processing (void)
-+{
-+ /* An FPU_COM instruction is found without previous non-FPU_COM
-+ instruction. */
-+ if (nds32_fpu_com
-+ && !(nds32_elf_flags & (E_NDS32_HAS_FPU_INST | E_NDS32_HAS_FPU_DP_INST)))
-+ {
-+ /* Since only FPU_COM instructions are used and no other FPU instructions
-+ are used. The nds32_elf_flags will be decided by the enabled options
-+ by command line or default configuration. */
-+ if (nds32_fpu_dp_ext || nds32_fpu_sp_ext)
-+ {
-+ nds32_elf_flags |= nds32_fpu_dp_ext ? E_NDS32_HAS_FPU_DP_INST : 0;
-+ nds32_elf_flags |= nds32_fpu_sp_ext ? E_NDS32_HAS_FPU_INST : 0;
-+ }
-+ else
-+ {
-+ /* Should never here. */
-+ as_bad (_("Used FPU instructions requires enabling FPU extension"));
-+ }
-+ }
-+
-+ if (nds32_elf_flags & (E_NDS32_HAS_FPU_INST | E_NDS32_HAS_FPU_DP_INST))
-+ {
-+ /* Single/double FPU has been used, set FPU register config. */
-+ /* We did not check the actual number of register used. We may
-+ want to do it while assemble. */
-+ nds32_elf_flags &= ~E_NDS32_FPU_REG_CONF;
-+ nds32_elf_flags |= (nds32_freg << E_NDS32_FPU_REG_CONF_SHIFT);
-+ }
-+
-+ if (nds32_gpr16)
-+ nds32_elf_flags |= E_NDS32_HAS_REDUCED_REGS;
-+
-+ nds32_elf_flags |= (E_NDS32_ELF_VER_1_4 | nds32_abi);
-+ elf_elfheader (stdoutput)->e_flags |= nds32_elf_flags;
-+}
-+
-+/* Implement md_apply_fix. Apply the fix-up or tranform the fix-up for
-+ later relocation generation. */
-+
-+void
-+nds32_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
-+{
-+ char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
-+ bfd_vma value = *valP;
-+
-+ if (fixP->fx_r_type < BFD_RELOC_UNUSED
-+ && fixP->fx_r_type > BFD_RELOC_NONE
-+ && fixP->fx_r_type != BFD_RELOC_NDS32_DIFF_ULEB128)
-+ {
-+ /* In our old nds32 binutils, it must convert relocations which is
-+ generated by CGEN. However, it does not have to consider this anymore.
-+ In current, it only deal with data relocations which enum
-+ is smaller than BFD_RELOC_NONE and BFD_RELOC_NDS32_DIFF_ULEB128.
-+ It is believed that we can construct a better mechanism to
-+ deal with the whole relocation issue in nds32 target
-+ without using CGEN. */
-+ fixP->fx_addnumber = value;
-+ fixP->tc_fix_data = NULL;
-+
-+ /* Tranform specific relocations here for later relocation generation.
-+ Tag data here for ex9 relaxtion and tag tls data for linker. */
-+ switch (fixP->fx_r_type)
-+ {
-+ case BFD_RELOC_NDS32_DATA:
-+ if (!enable_relax_ex9)
-+ fixP->fx_done = 1;
-+ break;
-+ case BFD_RELOC_NDS32_TPOFF:
-+ case BFD_RELOC_NDS32_TLS_LE_HI20:
-+ case BFD_RELOC_NDS32_TLS_LE_LO12:
-+ case BFD_RELOC_NDS32_TLS_LE_ADD:
-+ case BFD_RELOC_NDS32_TLS_LE_LS:
-+ case BFD_RELOC_NDS32_GOTTPOFF:
-+ case BFD_RELOC_NDS32_TLS_IE_HI20:
-+ case BFD_RELOC_NDS32_TLS_IE_LO12S2:
-+ case BFD_RELOC_NDS32_TLS_DESC_HI20:
-+ case BFD_RELOC_NDS32_TLS_DESC_LO12:
-+ case BFD_RELOC_NDS32_TLS_IE_LO12:
-+ case BFD_RELOC_NDS32_TLS_IEGP_HI20:
-+ case BFD_RELOC_NDS32_TLS_IEGP_LO12:
-+ case BFD_RELOC_NDS32_TLS_IEGP_LO12S2:
-+ S_SET_THREAD_LOCAL (fixP->fx_addsy);
-+ break;
-+ default:
-+ break;
-+ }
-+ return;
-+ }
-+
-+ if (fixP->fx_addsy == (symbolS *) NULL)
-+ fixP->fx_done = 1;
-+
-+ if (fixP->fx_subsy != (symbolS *) NULL)
-+ {
-+ /* HOW DIFF RELOCATION WORKS.
-+
-+ First of all, this relocation is used to calculate the distance
-+ between two symbols in the SAME section. It is used for jump-
-+ table, debug information, exception table, et al. Therefore,
-+ it is a unsigned positive value. It is NOT used for general-
-+ purpose arithmetic.
-+
-+ Consider this example, the distance between .LEND and .LBEGIN
-+ is stored at the address of foo.
-+
-+ ---- >8 ---- >8 ---- >8 ---- >8 ----
-+ .data
-+ foo:
-+ .word .LBEGIN - .LEND
-+
-+ .text
-+ [before]
-+ .LBEGIN
-+ \
-+ [between] distance
-+ /
-+ .LEND
-+ [after]
-+ ---- 8< ---- 8< ---- 8< ---- 8< ----
-+
-+ We use a single relocation entry for this expression.
-+ * The initial distance value is stored direcly in that location
-+ specified by r_offset (i.e., foo in this example.)
-+ * The begin of the region, i.e., .LBEGIN, is specified by
-+ r_info/R_SYM and r_addend, e.g., .text + 0x32.
-+ * The end of region, i.e., .LEND, is represented by
-+ .LBEGIN + distance instead of .LEND, so we only need
-+ a single relocation entry instead of two.
-+
-+ When an instruction is relaxed, we adjust the relocation entry
-+ depending on where the instruction locates. There are three
-+ cases, before, after and between the region.
-+ * between: Distance value is read from r_offset, adjusted and
-+ written back into r_offset.
-+ * before: Only r_addend is adjust.
-+ * after: We don't care about it.
-+
-+ Hereby, there are some limitation.
-+
-+ `(.LEND - 1) - .LBEGIN' and `(.LEND - .LBEGIN) - 1'
-+ are semantically different, and we cannot handle latter case
-+ when relaxation.
-+
-+ The latter expression means subtracting 1 from the distance
-+ between .LEND and .LBEGIN. And the former expression means
-+ the distance between (.LEND - 1) and .LBEGIN.
-+
-+ The nuance affects whether to adjust distance value when relax
-+ an instruction. In another words, whether the instruction
-+ locates in the region. Because we use a single relocation entry,
-+ there is no field left for .LEND and the subtrahend.
-+
-+ Since GCC-4.5, GCC may produce debug information in such expression
-+ .long .L1-1-.L0
-+ in order to describe register clobbering during an function-call.
-+ .L0:
-+ call foo
-+ .L1:
-+
-+ Check http://gcc.gnu.org/ml/gcc-patches/2009-06/msg01317.html
-+ for details. */
-+
-+ value -= S_GET_VALUE (fixP->fx_subsy);
-+ *valP = value;
-+ fixP->fx_subsy = NULL;
-+ fixP->fx_offset -= value;
-+
-+ switch (fixP->fx_r_type)
-+ {
-+ case BFD_RELOC_8:
-+ fixP->fx_r_type = BFD_RELOC_NDS32_DIFF8;
-+ md_number_to_chars (where, value, 1);
-+ break;
-+ case BFD_RELOC_16:
-+ fixP->fx_r_type = BFD_RELOC_NDS32_DIFF16;
-+ md_number_to_chars (where, value, 2);
-+ break;
-+ case BFD_RELOC_32:
-+ fixP->fx_r_type = BFD_RELOC_NDS32_DIFF32;
-+ md_number_to_chars (where, value, 4);
-+ break;
-+ case BFD_RELOC_NDS32_DIFF_ULEB128:
-+ /* cvt_frag_to_fill () has called output_leb128 () for us. */
-+ break;
-+ default:
-+ as_bad_where (fixP->fx_file, fixP->fx_line,
-+ _("expression too complex"));
-+ return;
-+ }
-+ }
-+ else if (fixP->fx_done)
-+ {
-+ /* We're finished with this fixup. Install it because
-+ bfd_install_relocation won't be called to do it. */
-+ switch (fixP->fx_r_type)
-+ {
-+ case BFD_RELOC_8:
-+ md_number_to_chars (where, value, 1);
-+ break;
-+ case BFD_RELOC_16:
-+ md_number_to_chars (where, value, 2);
-+ break;
-+ case BFD_RELOC_32:
-+ md_number_to_chars (where, value, 4);
-+ break;
-+ case BFD_RELOC_64:
-+ md_number_to_chars (where, value, 8);
-+ default:
-+ as_bad_where (fixP->fx_file, fixP->fx_line,
-+ _("Internal error: Unknown fixup type %d (`%s')"),
-+ fixP->fx_r_type,
-+ bfd_get_reloc_code_name (fixP->fx_r_type));
-+ break;
-+ }
-+ }
-+}
-+
-+/* Implement tc_gen_reloc. Generate ELF relocation for a fix-up. */
-+
-+arelent *
-+tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixP)
-+{
-+ arelent *reloc;
-+ bfd_reloc_code_real_type code;
-+
-+ reloc = (arelent *) xmalloc (sizeof (arelent));
-+
-+ reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
-+ *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy);
-+ reloc->address = fixP->fx_frag->fr_address + fixP->fx_where;
-+
-+ code = fixP->fx_r_type;
-+
-+ reloc->howto = bfd_reloc_type_lookup (stdoutput, code);
-+ if (reloc->howto == (reloc_howto_type *) NULL)
-+ {
-+ as_bad_where (fixP->fx_file, fixP->fx_line,
-+ _("internal error: can't export reloc type %d (`%s')"),
-+ fixP->fx_r_type, bfd_get_reloc_code_name (code));
-+ return NULL;
-+ }
-+
-+ /* Add relocation handling here. */
-+
-+ switch (fixP->fx_r_type)
-+ {
-+ default:
-+ /* In general, addend of a relocation is the offset to the
-+ associated symbol. */
-+ reloc->addend = fixP->fx_offset;
-+ break;
-+
-+ case BFD_RELOC_NDS32_DATA:
-+ /* Prevent linker from optimizing data in text sections.
-+ For example, jump table. */
-+ reloc->addend = fixP->fx_size;
-+ break;
-+ }
-+
-+ return reloc;
-+}
-+
-+static struct suffix_name suffix_table[] =
-+{
-+ {"GOTOFF", BFD_RELOC_NDS32_GOTOFF},
-+ {"GOT", BFD_RELOC_NDS32_GOT20},
-+ {"TPOFF", BFD_RELOC_NDS32_TPOFF},
-+ {"PLT", BFD_RELOC_NDS32_25_PLTREL},
-+ {"GOTTPOFF", BFD_RELOC_NDS32_GOTTPOFF},
-+ {"TLSDESC", BFD_RELOC_NDS32_TLS_DESC},
-+ {"ICT", BFD_RELOC_NDS32_ICT}
-+};
-+
-+/* Implement md_parse_name. */
-+
-+int
-+nds32_parse_name (char const *name, expressionS *exprP,
-+ enum expr_mode mode ATTRIBUTE_UNUSED,
-+ char *nextcharP ATTRIBUTE_UNUSED)
-+{
-+ segT segment;
-+
-+ exprP->X_op_symbol = NULL;
-+ exprP->X_md = BFD_RELOC_UNUSED;
-+
-+ exprP->X_add_symbol = symbol_find_or_make (name);
-+ exprP->X_op = O_symbol;
-+ exprP->X_add_number = 0;
-+
-+ /* Check the specail name if a symbol. */
-+ segment = S_GET_SEGMENT (exprP->X_add_symbol);
-+ if ((segment != undefined_section) && (*nextcharP != '@'))
-+ return 0;
-+
-+ if (strcmp (name, GOT_NAME) == 0 && *nextcharP != '@')
-+ {
-+ /* Set for _GOT_OFFSET_TABLE_. */
-+ exprP->X_md = BFD_RELOC_NDS32_GOTPC20;
-+ }
-+ else if (*nextcharP == '@')
-+ {
-+ size_t i;
-+ char *next;
-+ for (i = 0; i < ARRAY_SIZE (suffix_table); i++)
-+ {
-+ next = input_line_pointer + 1 + strlen (suffix_table[i].suffix);
-+ if (strncasecmp (input_line_pointer + 1, suffix_table[i].suffix,
-+ strlen (suffix_table[i].suffix)) == 0
-+ && !is_part_of_name (*next))
-+ {
-+ exprP->X_md = suffix_table[i].reloc;
-+ *input_line_pointer = *nextcharP;
-+ input_line_pointer = next;
-+ *nextcharP = *input_line_pointer;
-+ *input_line_pointer = '\0';
-+ break;
-+ }
-+ }
-+ }
-+ return 1;
-+}
-+
-+/* Implement tc_regname_to_dw2regnum. */
-+
-+int
-+tc_nds32_regname_to_dw2regnum (char *regname)
-+{
-+ struct nds32_keyword *sym = hash_find (nds32_gprs_hash, regname);
-+
-+ if (!sym)
-+ return -1;
-+
-+ return sym->value;
-+}
-+
-+void
-+tc_nds32_frame_initial_instructions (void)
-+{
-+ /* CIE */
-+ /* Default cfa is register-31/sp. */
-+ cfi_add_CFA_def_cfa (31, 0);
-+}
-diff -Nur binutils-2.24.orig/gas/config/tc-nds32.h binutils-2.24/gas/config/tc-nds32.h
---- binutils-2.24.orig/gas/config/tc-nds32.h 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/config/tc-nds32.h 2016-06-30 21:26:12.701894979 +0200
-@@ -0,0 +1,325 @@
-+/* tc-nds32.h -- Header file for tc-nds32.c.
-+ Copyright (C) 2012-2013 Free Software Foundation, Inc.
-+ Contributed by Andes Technology Corporation.
-+
-+ This file is part of GAS.
-+
-+ GAS is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 3, or (at your option)
-+ any later version.
-+
-+ GAS is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ You should have received a copy of the GNU General Public License
-+ along with GAS; see the file COPYING. If not, write to the Free
-+ Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
-+ 02110-1301, USA. */
-+
-+#ifndef TC_NDS32
-+#define TC_NDS32
-+
-+#include "bfd_stdint.h"
-+
-+/* Enum mapping symbol. */
-+enum mstate
-+{
-+ MAP_UNDEFINED = 0, /* Must be zero, for seginfo in new sections. */
-+ MAP_DATA,
-+ MAP_CODE,
-+};
-+#define TC_SEGMENT_INFO_TYPE struct nds32_segment_info_type
-+
-+/* For mapping symbol. */
-+struct nds32_segment_info_type
-+{
-+ enum mstate mapstate;
-+};
-+
-+#define LISTING_HEADER \
-+ (target_big_endian ? "NDS32 GAS" : "NDS32 GAS Little Endian")
-+
-+/* The target BFD architecture. */
-+#define TARGET_ARCH bfd_arch_nds32
-+
-+/* mapping to mach_table[5] */
-+#define ISA_V1 bfd_mach_n1h
-+#define ISA_V2 bfd_mach_n1h_v2
-+#define ISA_V3 bfd_mach_n1h_v3
-+#define ISA_V3M bfd_mach_n1h_v3m
-+
-+/* Default to big endian. Please note that for Andes architecture,
-+ instructions are always in big-endian format. */
-+#ifndef TARGET_BYTES_BIG_ENDIAN
-+#define TARGET_BYTES_BIG_ENDIAN 1
-+#endif
-+
-+/*
-+ * as.c
-+ */
-+/* extend GAS command line option handling capability */
-+extern int nds32_parse_option (int, char *);
-+extern void nds32_after_parse_args (void);
-+/* The endianness of the target format may change based on command
-+ line arguments. */
-+extern const char *nds32_target_format (void);
-+#define md_parse_option(optc, optarg) nds32_parse_option (optc, optarg)
-+#define md_after_parse_args() nds32_after_parse_args ()
-+#define TARGET_FORMAT nds32_target_format()
-+
-+
-+/* expr.c */
-+extern int nds32_parse_name (char const *, expressionS *, enum expr_mode, char *);
-+extern bfd_boolean nds32_allow_local_subtract (expressionS *, expressionS *, segT);
-+#define md_parse_name(name, exprP, mode, nextcharP) \
-+ nds32_parse_name (name, exprP, mode, nextcharP)
-+#define md_allow_local_subtract(lhs,rhs,sect) nds32_allow_local_subtract (lhs, rhs, sect)
-+
-+/*
-+ * dwarf2dbg.c
-+ */
-+#define DWARF2_USE_FIXED_ADVANCE_PC 1
-+
-+/*
-+ * write.c
-+ */
-+extern long nds32_pcrel_from_section (struct fix *, segT);
-+extern bfd_boolean nds32_fix_adjustable (struct fix *);
-+extern void nds32_frob_file (void);
-+extern void nds32_post_relax_hook (void);
-+extern void nds32_frob_file_before_fix (void);
-+extern void elf_nds32_final_processing (void);
-+extern int nds32_validate_fix_sub (struct fix *, segT);
-+extern int nds32_force_relocation (struct fix *);
-+extern void nds32_set_section_relocs (asection *, arelent ** , unsigned int );
-+
-+/* Fill in rs_align_code fragments. TODO: Review this. */
-+extern void nds32_handle_align (fragS *);
-+extern int nds32_relax_frag (segT, fragS *, long);
-+extern int tc_nds32_regname_to_dw2regnum (char *regname);
-+extern void tc_nds32_frame_initial_instructions (void);
-+#define MD_PCREL_FROM_SECTION(fix, sect) nds32_pcrel_from_section (fix, sect)
-+#define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
-+#define tc_fix_adjustable(FIX) nds32_fix_adjustable (FIX)
-+#define md_apply_fix(fixP, addn, seg) nds32_apply_fix (fixP, addn, seg)
-+#define md_post_relax_hook nds32_post_relax_hook ()
-+#define tc_frob_file_before_fix() nds32_frob_file_before_fix ()
-+#define elf_tc_final_processing() elf_nds32_final_processing ()
-+/* For DIFF relocations. The default behavior is inconsistent with the
-+ asm internal document. */
-+#define TC_FORCE_RELOCATION_SUB_SAME(FIX, SEC) \
-+ (! SEG_NORMAL (SEC) || TC_FORCE_RELOCATION (FIX))
-+#define TC_FORCE_RELOCATION(fix) nds32_force_relocation (fix)
-+#define TC_VALIDATE_FIX_SUB(FIX,SEG) nds32_validate_fix_sub (FIX,SEG)
-+#define SET_SECTION_RELOCS(sec, relocs, n) nds32_set_section_relocs (sec, relocs, n)
-+/* Values passed to md_apply_fix don't include the symbol value. */
-+#define MD_APPLY_SYM_VALUE(FIX) 0
-+#define HANDLE_ALIGN(f) nds32_handle_align (f)
-+#undef DIFF_EXPR_OK /* They should be fixed in linker. */
-+#define md_relax_frag(segment, fragP, stretch) nds32_relax_frag (segment, fragP, stretch)
-+#define WORKING_DOT_WORD /* We don't need to handle .word strangely. */
-+/* Using to chain fixup with previous fixup. */
-+#define TC_FIX_TYPE struct fix*
-+#define TC_INIT_FIX_DATA(fixP) do \
-+{ \
-+ fixP->tc_fix_data=NULL; \
-+} while (0)
-+
-+/*
-+ * read.c
-+ */
-+/* extend GAS macro handling capability */
-+extern void nds32_macro_start (void);
-+extern void nds32_macro_end (void);
-+extern void nds32_macro_info (void *macro);
-+extern void nds32_start_line_hook (void);
-+extern void nds32_elf_section_change_hook (void);
-+extern void md_begin (void);
-+extern void md_end (void);
-+extern int nds32_start_label (int, int);
-+extern void nds32_cleanup (void);
-+extern void nds32_flush_pending_output (void);
-+extern void nds32_cons_align (int n);
-+extern void nds32_check_label (symbolS *);
-+extern void nds32_frob_label (symbolS *);
-+void nds32_pre_do_align (int, char*, int, int);
-+void nds32_do_align (int);
-+#define md_macro_start() nds32_macro_start ()
-+#define md_macro_end() nds32_macro_end ()
-+#define md_macro_info(args) nds32_macro_info (args)
-+#define TC_START_LABEL(C, S, STR) (C == ':' && nds32_start_label (0, 0))
-+#define tc_check_label(label) nds32_check_label (label)
-+#define tc_frob_label(label) nds32_frob_label (label)
-+#define md_end md_end
-+#define md_start_line_hook() nds32_start_line_hook ()
-+#define md_cons_align(n) nds32_cons_align (n)
-+/* COLE: TODO: Review md_do_align. */
-+#define md_do_align(N, FILL, LEN, MAX, LABEL) \
-+ nds32_pre_do_align (N, FILL, LEN, MAX); \
-+ if ((N) > 1 && (subseg_text_p (now_seg) \
-+ || strncmp (now_seg->name, ".gcc_except_table", sizeof (".gcc_except_table") - 1) == 0)) \
-+ nds32_do_align (N); \
-+ goto LABEL;
-+#define md_elf_section_change_hook() nds32_elf_section_change_hook ()
-+#define md_flush_pending_output() nds32_flush_pending_output ()
-+#define md_cleanup() nds32_cleanup ()
-+#define LOCAL_LABELS_FB 1 /* Permit temporary numeric labels. */
-+
-+/*
-+ * frags.c
-+ */
-+
-+enum FRAG_ATTR
-+{
-+ NDS32_FRAG_RELAXABLE = 0x1,
-+ NDS32_FRAG_RELAXED = 0x2,
-+ NDS32_FRAG_BRANCH = 0x4,
-+ NDS32_FRAG_LABEL = 0x8,
-+ NDS32_FRAG_FINAL = 0x10,
-+ NDS32_FRAG_RELAXABLE_BRANCH = 0x20,
-+ NDS32_FRAG_ALIGN = 0x40
-+};
-+
-+struct nds32_frag_type {
-+ relax_substateT flag;
-+ struct nds32_opcode *opcode;
-+ uint32_t insn;
-+ /* To Save previos label fixup if existence. */
-+ struct fix *fixup;
-+};
-+
-+extern void nds32_frag_init (fragS*);
-+
-+#define TC_FRAG_TYPE struct nds32_frag_type
-+#define TC_FRAG_INIT(fragP) nds32_frag_init (fragP)
-+
-+/*
-+ * CFI directive
-+ */
-+extern void nds32_elf_frame_initial_instructions (void);
-+extern int tc_nds32_regname_to_dw2regnum (char *regname);
-+
-+#define TARGET_USE_CFIPOP 1
-+#define DWARF2_DEFAULT_RETURN_COLUMN 30
-+#define DWARF2_CIE_DATA_ALIGNMENT -4
-+#define DWARF2_LINE_MIN_INSN_LENGTH 2
-+
-+#define tc_regname_to_dw2regnum tc_nds32_regname_to_dw2regnum
-+#define tc_cfi_frame_initial_instructions tc_nds32_frame_initial_instructions
-+
-+/*
-+ * COLE: TODO: Review These. They seem to be obsoleted.
-+ */
-+#if 1
-+#define TC_RELOC_RTSYM_LOC_FIXUP(FIX) \
-+ ((FIX)->fx_addsy == NULL \
-+ || (! S_IS_EXTERNAL ((FIX)->fx_addsy) \
-+ && ! S_IS_WEAK ((FIX)->fx_addsy) \
-+ && S_IS_DEFINED ((FIX)->fx_addsy) \
-+ && ! S_IS_COMMON ((FIX)->fx_addsy)))
-+#define TC_HANDLES_FX_DONE
-+/* This arranges for gas/write.c to not apply a relocation if
-+ obj_fix_adjustable() says it is not adjustable. */
-+#define TC_FIX_ADJUSTABLE(fixP) obj_fix_adjustable (fixP)
-+#endif
-+
-+/* Because linker may relax the code, assemble-time expression
-+ optimization is not allowed. */
-+#define md_allow_eh_opt 0
-+
-+/* For nds32 relax. */
-+enum nds32_br_range
-+{
-+ BR_RANGE_S256 = 0,
-+ BR_RANGE_S16K,
-+ BR_RANGE_S64K,
-+ BR_RANGE_S16M,
-+ BR_RANGE_U4G,
-+ BR_RANGE_NUM,
-+};
-+
-+enum nds32_ramp
-+{
-+ NDS32_CREATE_LABEL = 1,
-+ NDS32_RELAX = (1 << 1), /* Obsolete in the future. */
-+ NDS32_ORIGIN = (1 << 2),
-+ NDS32_INSN16 = (1 << 3),
-+ NDS32_PTR = (1 << 4),
-+ NDS32_ABS = (1 << 5),
-+ NDS32_HINT = (1 << 6),
-+ NDS32_FIX = (1 << 7),
-+ NDS32_ADDEND = (1 << 8),
-+ NDS32_SYM = (1 << 9),
-+ NDS32_PCREL = (1 << 10),
-+ NDS32_PTR_PATTERN = (1 << 11),
-+ NDS32_PTR_MULTIPLE = (1 << 12),
-+ NDS32_GROUP = (1 << 13),
-+ NDS32_SYM_DESC_MEM = (1 << 14),
-+};
-+
-+typedef struct nds32_relax_fixup_info
-+{
-+ int offset;
-+ int size;
-+ /* Reverse branch has to jump to the end of instruction pattern. */
-+ int ramp;
-+ enum bfd_reloc_code_real r_type;
-+} nds32_relax_fixup_info_t;
-+
-+typedef struct nds32_cond_field
-+{
-+ int offset;
-+ int bitpos; /* Register position. */
-+ int bitmask; /* Number of register bits. */
-+ bfd_boolean signed_extend;
-+} nds32_cond_field_t;
-+
-+/* The max relaxation pattern is 20-bytes including the nop. */
-+#define NDS32_MAXCHAR 20
-+/* In current, the max entend number of instruction for one pseudo instruction
-+ is 4, but its number of relocation may be 12. */
-+#define MAX_RELAX_NUM 6
-+#define MAX_RELAX_FIX 12
-+
-+typedef struct nds32_relax_info
-+{
-+ /* Opcode for the instruction. */
-+ const char *opcode;
-+ enum nds32_br_range br_range;
-+ nds32_cond_field_t cond_field[MAX_RELAX_NUM]; /* TODO: Reuse nds32_field? */
-+ /* Code sequences for different branch range. */
-+ uint32_t relax_code_seq[BR_RANGE_NUM][MAX_RELAX_NUM];
-+ nds32_cond_field_t relax_code_condition[BR_RANGE_NUM][MAX_RELAX_NUM];
-+ unsigned int relax_code_size[BR_RANGE_NUM];
-+ int relax_branch_isize[BR_RANGE_NUM];
-+ nds32_relax_fixup_info_t relax_fixup[BR_RANGE_NUM][MAX_RELAX_FIX];
-+} relax_info_t;
-+
-+enum nds32_relax_hint_type
-+{
-+ NDS32_RELAX_HINT_NONE = 0,
-+ NDS32_RELAX_HINT_LALS,
-+ NDS32_RELAX_HINT_LA_PLT,
-+ NDS32_RELAX_HINT_LA_GOT,
-+ NDS32_RELAX_HINT_LA_GOTOFF,
-+ NDS32_RELAX_HINT_TLS_START = 0x100,
-+ NDS32_RELAX_HINT_TLS_LE_LS,
-+ NDS32_RELAX_HINT_TLS_IE_LS,
-+ NDS32_RELAX_HINT_TLS_IE_LA,
-+ NDS32_RELAX_HINT_TLS_IEGP_LA,
-+ NDS32_RELAX_HINT_TLS_DESC_LS,
-+ NDS32_RELAX_HINT_ICT_LA,
-+};
-+
-+struct nds32_relax_hint_table
-+{
-+ enum nds32_relax_hint_type main_type;
-+ unsigned int relax_code_size;
-+ uint32_t relax_code_seq[MAX_RELAX_NUM];
-+ nds32_relax_fixup_info_t relax_fixup[MAX_RELAX_FIX];
-+};
-+
-+#endif /* TC_NDS32 */
-diff -Nur binutils-2.24.orig/gas/config.in binutils-2.24/gas/config.in
---- binutils-2.24.orig/gas/config.in 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/gas/config.in 2016-06-30 21:26:12.701894979 +0200
-@@ -179,6 +179,33 @@
- /* Choose a default ABI for MIPS targets. */
- #undef MIPS_DEFAULT_ABI
-
-+/* Define value for nds32_arch_name */
-+#undef NDS32_DEFAULT_ARCH_NAME
-+
-+/* Define default value for nds32_audio_ext */
-+#undef NDS32_DEFAULT_AUDIO_EXT
-+
-+/* Define default value for nds32_dsp_ext */
-+#undef NDS32_DEFAULT_DSP_EXT
-+
-+/* Define default value for nds32_dx_regs */
-+#undef NDS32_DEFAULT_DX_REGS
-+
-+/* Define default value for nds32_perf_ext */
-+#undef NDS32_DEFAULT_PERF_EXT
-+
-+/* Define default value for nds32_perf_ext2 */
-+#undef NDS32_DEFAULT_PERF_EXT2
-+
-+/* Define default value for nds32_string_ext */
-+#undef NDS32_DEFAULT_STRING_EXT
-+
-+/* Define default value for nds32_zol_ext */
-+#undef NDS32_DEFAULT_ZOL_EXT
-+
-+/* Defined for linux toolchain */
-+#undef NDS32_LINUX_TOOLCHAIN
-+
- /* Define if environ is not declared in system header files. */
- #undef NEED_DECLARATION_ENVIRON
-
-diff -Nur binutils-2.24.orig/gas/configure binutils-2.24/gas/configure
---- binutils-2.24.orig/gas/configure 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/gas/configure 2016-06-30 21:26:12.705895135 +0200
-@@ -662,6 +662,7 @@
- am__fastdepCC_FALSE
- am__fastdepCC_TRUE
- CCDEPMODE
-+am__nodep
- AMDEPBACKSLASH
- AMDEP_FALSE
- AMDEP_TRUE
-@@ -3164,12 +3165,14 @@
- ac_compiler_gnu=$ac_cv_c_compiler_gnu
-
-
--{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for library containing strerror" >&5
--$as_echo_n "checking for library containing strerror... " >&6; }
--if test "${ac_cv_search_strerror+set}" = set; then :
-+
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for strerror in -lcposix" >&5
-+$as_echo_n "checking for strerror in -lcposix... " >&6; }
-+if test "${ac_cv_lib_cposix_strerror+set}" = set; then :
- $as_echo_n "(cached) " >&6
- else
-- ac_func_search_save_LIBS=$LIBS
-+ ac_check_lib_save_LIBS=$LIBS
-+LIBS="-lcposix $LIBS"
- cat confdefs.h - <<_ACEOF >conftest.$ac_ext
- /* end confdefs.h. */
-
-@@ -3188,37 +3191,22 @@
- return 0;
- }
- _ACEOF
--for ac_lib in '' cposix; do
-- if test -z "$ac_lib"; then
-- ac_res="none required"
-- else
-- ac_res=-l$ac_lib
-- LIBS="-l$ac_lib $ac_func_search_save_LIBS"
-- fi
-- if ac_fn_c_try_link "$LINENO"; then :
-- ac_cv_search_strerror=$ac_res
-+if ac_fn_c_try_link "$LINENO"; then :
-+ ac_cv_lib_cposix_strerror=yes
-+else
-+ ac_cv_lib_cposix_strerror=no
- fi
- rm -f core conftest.err conftest.$ac_objext \
-- conftest$ac_exeext
-- if test "${ac_cv_search_strerror+set}" = set; then :
-- break
--fi
--done
--if test "${ac_cv_search_strerror+set}" = set; then :
--
--else
-- ac_cv_search_strerror=no
-+ conftest$ac_exeext conftest.$ac_ext
-+LIBS=$ac_check_lib_save_LIBS
- fi
--rm conftest.$ac_ext
--LIBS=$ac_func_search_save_LIBS
-+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_cposix_strerror" >&5
-+$as_echo "$ac_cv_lib_cposix_strerror" >&6; }
-+if test "x$ac_cv_lib_cposix_strerror" = x""yes; then :
-+ LIBS="$LIBS -lcposix"
- fi
--{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_search_strerror" >&5
--$as_echo "$ac_cv_search_strerror" >&6; }
--ac_res=$ac_cv_search_strerror
--if test "$ac_res" != no; then :
-- test "$ac_res" = "none required" || LIBS="$ac_res $LIBS"
-
--fi
-+
-
-
- BFD_VERSION=`${srcdir}/../bfd/configure --version | sed -n -e '1s,.* ,,p'`
-@@ -3690,6 +3678,7 @@
- if test "x$enable_dependency_tracking" != xno; then
- am_depcomp="$ac_aux_dir/depcomp"
- AMDEPBACKSLASH='\'
-+ am__nodep='_no'
- fi
- if test "x$enable_dependency_tracking" != xno; then
- AMDEP_TRUE=
-@@ -3752,11 +3741,11 @@
-
- # We need awk for the "check" target. The system "awk" is bad on
- # some platforms.
--# Always define AMTAR for backward compatibility.
-+# Always define AMTAR for backward compatibility. Yes, it's still used
-+# in the wild :-( We should find a proper way to deprecate it ...
-+AMTAR='$${TAR-tar}'
-
--AMTAR=${AMTAR-"${am_missing_run}tar"}
--
--am__tar='${AMTAR} chof - "$$tardir"'; am__untar='${AMTAR} xf -'
-+am__tar='$${TAR-tar} chof - "$$tardir"' am__untar='$${TAR-tar} xf -'
-
-
-
-@@ -3774,6 +3763,7 @@
- # instance it was reported that on HP-UX the gcc test will end up
- # making a dummy file named `D' -- because `-MD' means `put the output
- # in D'.
-+ rm -rf conftest.dir
- mkdir conftest.dir
- # Copy depcomp to subdir because otherwise we won't find it if we're
- # using a relative directory.
-@@ -3833,7 +3823,7 @@
- break
- fi
- ;;
-- msvisualcpp | msvcmsys)
-+ msvc7 | msvc7msys | msvisualcpp | msvcmsys)
- # This compiler won't grok `-c -o', but also, the minuso test has
- # not run yet. These depmodes are late enough in the game, and
- # so weak that their functioning should not be impacted.
-@@ -11201,7 +11191,7 @@
- lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
- lt_status=$lt_dlunknown
- cat > conftest.$ac_ext <<_LT_EOF
--#line 11204 "configure"
-+#line 11194 "configure"
- #include "confdefs.h"
-
- #if HAVE_DLFCN_H
-@@ -11307,7 +11297,7 @@
- lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
- lt_status=$lt_dlunknown
- cat > conftest.$ac_ext <<_LT_EOF
--#line 11310 "configure"
-+#line 11300 "configure"
- #include "confdefs.h"
-
- #if HAVE_DLFCN_H
-@@ -12192,6 +12182,135 @@
- using_cgen=yes
- ;;
-
-+ nds32)
-+ # setup NDS32_LINUX_TOOLCHAIN definition
-+ if test "linux" = $em; then
-+
-+$as_echo "#define NDS32_LINUX_TOOLCHAIN 1" >>confdefs.h
-+
-+ fi
-+
-+ # Decide BASELINE, REDUCED_REGS, FPU_DP_EXT, FPU_SP_EXT features
-+ # based on arch_name.
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-arch" >&5
-+$as_echo_n "checking for default configuration of --with-arch... " >&6; }
-+ if test "x${with_arch}" != x; then
-+ case ${with_arch} in
-+ v2j | v2s | v2f | v2 | v3m | v3j | v3s | v3f | v3 )
-+
-+cat >>confdefs.h <<_ACEOF
-+#define NDS32_DEFAULT_ARCH_NAME "$with_arch"
-+_ACEOF
-+
-+ ;;
-+ *)
-+ as_fn_error "This kind of arch name does *NOT* exist!" "$LINENO" 5
-+ ;;
-+ esac
-+ fi
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_arch" >&5
-+$as_echo "$with_arch" >&6; }
-+
-+ # Decide features one by one.
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --enable-dx-regs" >&5
-+$as_echo_n "checking for default configuration of --enable-dx-regs... " >&6; }
-+ if test "x${enable_dx_regs}" == xyes; then
-+
-+$as_echo "#define NDS32_DEFAULT_DX_REGS 1" >>confdefs.h
-+
-+ else
-+
-+$as_echo "#define NDS32_DEFAULT_DX_REGS 0" >>confdefs.h
-+
-+ fi
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $enable_dx_regs" >&5
-+$as_echo "$enable_dx_regs" >&6; }
-+
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --enable-perf-ext" >&5
-+$as_echo_n "checking for default configuration of --enable-perf-ext... " >&6; }
-+ if test "x${enable_perf_ext}" == xno; then
-+
-+$as_echo "#define NDS32_DEFAULT_PERF_EXT 0" >>confdefs.h
-+
-+ else
-+
-+$as_echo "#define NDS32_DEFAULT_PERF_EXT 1" >>confdefs.h
-+
-+ fi
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $enable_perf_ext" >&5
-+$as_echo "$enable_perf_ext" >&6; }
-+
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --enable-perf-ext2" >&5
-+$as_echo_n "checking for default configuration of --enable-perf-ext2... " >&6; }
-+ if test "x${enable_perf_ext2}" == xno; then
-+
-+$as_echo "#define NDS32_DEFAULT_PERF_EXT2 0" >>confdefs.h
-+
-+ else
-+
-+$as_echo "#define NDS32_DEFAULT_PERF_EXT2 1" >>confdefs.h
-+
-+ fi
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $enable_perf_ext2" >&5
-+$as_echo "$enable_perf_ext2" >&6; }
-+
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --enable-string-ext" >&5
-+$as_echo_n "checking for default configuration of --enable-string-ext... " >&6; }
-+ if test "x${enable_string_ext}" == xno; then
-+
-+$as_echo "#define NDS32_DEFAULT_STRING_EXT 0" >>confdefs.h
-+
-+ else
-+
-+$as_echo "#define NDS32_DEFAULT_STRING_EXT 1" >>confdefs.h
-+
-+ fi
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $enable_string_ext" >&5
-+$as_echo "$enable_string_ext" >&6; }
-+
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --enable-audio-ext" >&5
-+$as_echo_n "checking for default configuration of --enable-audio-ext... " >&6; }
-+ if test "x${enable_audio_ext}" == xno; then
-+
-+$as_echo "#define NDS32_DEFAULT_AUDIO_EXT 0" >>confdefs.h
-+
-+ else
-+
-+$as_echo "#define NDS32_DEFAULT_AUDIO_EXT 1" >>confdefs.h
-+
-+ fi
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $enable_audio_ext" >&5
-+$as_echo "$enable_audio_ext" >&6; }
-+
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --enable-dsp-ext" >&5
-+$as_echo_n "checking for default configuration of --enable-dsp-ext... " >&6; }
-+ if test "x${enable_dsp_ext}" == xno; then
-+
-+$as_echo "#define NDS32_DEFAULT_DSP_EXT 0" >>confdefs.h
-+
-+ else
-+
-+$as_echo "#define NDS32_DEFAULT_DSP_EXT 1" >>confdefs.h
-+
-+ fi
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $enable_dsp_ext" >&5
-+$as_echo "$enable_dsp_ext" >&6; }
-+
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --enable-zol-ext" >&5
-+$as_echo_n "checking for default configuration of --enable-zol-ext... " >&6; }
-+ if test "x${enable_zol_ext}" == xno; then
-+
-+$as_echo "#define NDS32_DEFAULT_ZOL_EXT 0" >>confdefs.h
-+
-+ else
-+
-+$as_echo "#define NDS32_DEFAULT_ZOL_EXT 1" >>confdefs.h
-+
-+ fi
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $enable_zol_ext" >&5
-+$as_echo "$enable_zol_ext" >&6; }
-+ ;;
-+
- i386 | s390 | sparc)
- if test $this_target = $target ; then
-
-diff -Nur binutils-2.24.orig/gas/configure.in binutils-2.24/gas/configure.in
---- binutils-2.24.orig/gas/configure.in 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/gas/configure.in 2016-06-30 21:26:12.705895135 +0200
-@@ -363,6 +363,100 @@
- using_cgen=yes
- ;;
-
-+ nds32)
-+ # setup NDS32_LINUX_TOOLCHAIN definition
-+ if test "linux" = $em; then
-+ AC_DEFINE(NDS32_LINUX_TOOLCHAIN, 1, [Defined for linux toolchain])
-+ fi
-+
-+ # Decide BASELINE, REDUCED_REGS, FPU_DP_EXT, FPU_SP_EXT features
-+ # based on arch_name.
-+ AC_MSG_CHECKING(for default configuration of --with-arch)
-+ if test "x${with_arch}" != x; then
-+ case ${with_arch} in
-+ v2j | v2s | v2f | v2 | v3m | v3j | v3s | v3f | v3 )
-+ AC_DEFINE_UNQUOTED(NDS32_DEFAULT_ARCH_NAME, "$with_arch",
-+ [Define value for nds32_arch_name])
-+ ;;
-+ *)
-+ AC_MSG_ERROR(This kind of arch name does *NOT* exist!)
-+ ;;
-+ esac
-+ fi
-+ AC_MSG_RESULT($with_arch)
-+
-+ # Decide features one by one.
-+ AC_MSG_CHECKING(for default configuration of --enable-dx-regs)
-+ if test "x${enable_dx_regs}" == xyes; then
-+ AC_DEFINE(NDS32_DEFAULT_DX_REGS, 1,
-+ [Define value for nds32_dx_regs])
-+ else
-+ AC_DEFINE(NDS32_DEFAULT_DX_REGS, 0,
-+ [Define default value for nds32_dx_regs])
-+ fi
-+ AC_MSG_RESULT($enable_dx_regs)
-+
-+ AC_MSG_CHECKING(for default configuration of --enable-perf-ext)
-+ if test "x${enable_perf_ext}" == xno; then
-+ AC_DEFINE(NDS32_DEFAULT_PERF_EXT, 0,
-+ [Define value for nds32_perf_ext])
-+ else
-+ AC_DEFINE(NDS32_DEFAULT_PERF_EXT, 1,
-+ [Define default value for nds32_perf_ext])
-+ fi
-+ AC_MSG_RESULT($enable_perf_ext)
-+
-+ AC_MSG_CHECKING(for default configuration of --enable-perf-ext2)
-+ if test "x${enable_perf_ext2}" == xno; then
-+ AC_DEFINE(NDS32_DEFAULT_PERF_EXT2, 0,
-+ [Define value for nds32_perf_ext2])
-+ else
-+ AC_DEFINE(NDS32_DEFAULT_PERF_EXT2, 1,
-+ [Define default value for nds32_perf_ext2])
-+ fi
-+ AC_MSG_RESULT($enable_perf_ext2)
-+
-+ AC_MSG_CHECKING(for default configuration of --enable-string-ext)
-+ if test "x${enable_string_ext}" == xno; then
-+ AC_DEFINE(NDS32_DEFAULT_STRING_EXT, 0,
-+ [Define value for nds32_string_ext])
-+ else
-+ AC_DEFINE(NDS32_DEFAULT_STRING_EXT, 1,
-+ [Define default value for nds32_string_ext])
-+ fi
-+ AC_MSG_RESULT($enable_string_ext)
-+
-+ AC_MSG_CHECKING(for default configuration of --enable-audio-ext)
-+ if test "x${enable_audio_ext}" == xno; then
-+ AC_DEFINE(NDS32_DEFAULT_AUDIO_EXT, 0,
-+ [Define value for nds32_audio_ext])
-+ else
-+ AC_DEFINE(NDS32_DEFAULT_AUDIO_EXT, 1,
-+ [Define default value for nds32_audio_ext])
-+ fi
-+ AC_MSG_RESULT($enable_audio_ext)
-+
-+ AC_MSG_CHECKING(for default configuration of --enable-dsp-ext)
-+ if test "x${enable_dsp_ext}" == xno; then
-+ AC_DEFINE(NDS32_DEFAULT_DSP_EXT, 0,
-+ [Define value for nds32_dsp_ext])
-+ else
-+ AC_DEFINE(NDS32_DEFAULT_DSP_EXT, 1,
-+ [Define default value for nds32_dsp_ext])
-+ fi
-+ AC_MSG_RESULT($enable_dsp_ext)
-+
-+ AC_MSG_CHECKING(for default configuration of --enable-zol-ext)
-+ if test "x${enable_zol_ext}" == xno; then
-+ AC_DEFINE(NDS32_DEFAULT_ZOL_EXT, 0,
-+ [Define value for nds32_zol_ext])
-+ else
-+ AC_DEFINE(NDS32_DEFAULT_ZOL_EXT, 1,
-+ [Define default value for nds32_zol_ext])
-+ fi
-+ AC_MSG_RESULT($enable_zol_ext)
-+ ;;
-+
- i386 | s390 | sparc)
- if test $this_target = $target ; then
- AC_DEFINE_UNQUOTED(DEFAULT_ARCH, "${arch}", [Default architecture.])
-diff -Nur binutils-2.24.orig/gas/configure.tgt binutils-2.24/gas/configure.tgt
---- binutils-2.24.orig/gas/configure.tgt 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/gas/configure.tgt 2016-06-30 21:26:12.705895135 +0200
-@@ -79,6 +79,8 @@
- mips*el) cpu_type=mips endian=little ;;
- mips*) cpu_type=mips endian=big ;;
- mt) cpu_type=mt endian=big ;;
-+ nds32be) cpu_type=nds32 endian=big ;;
-+ nds32le) cpu_type=nds32 endian=little ;;
- or32*) cpu_type=or32 endian=big ;;
- pjl*) cpu_type=pj endian=little ;;
- pj*) cpu_type=pj endian=big ;;
-@@ -344,6 +346,9 @@
-
- msp430-*-*) fmt=elf ;;
-
-+ nds32-*-elf*) fmt=elf ;;
-+ nds32-*-linux*) fmt=elf em=linux ;;
-+
- nios2-*-rtems*) fmt=elf ;;
- nios2*-linux*) fmt=elf em=linux ;;
-
-diff -Nur binutils-2.24.orig/gas/doc/all.texi binutils-2.24/gas/doc/all.texi
---- binutils-2.24.orig/gas/doc/all.texi 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/gas/doc/all.texi 2016-06-30 21:26:12.705895135 +0200
-@@ -59,6 +59,7 @@
- @set MS1
- @set MSP430
- @set NIOSII
-+@set NDS32
- @set NS32K
- @set PDP11
- @set PJ
-diff -Nur binutils-2.24.orig/gas/doc/as.1 binutils-2.24/gas/doc/as.1
---- binutils-2.24.orig/gas/doc/as.1 2013-11-26 12:41:44.000000000 +0100
-+++ binutils-2.24/gas/doc/as.1 1970-01-01 01:00:00.000000000 +0100
-@@ -1,1593 +0,0 @@
--.\" Automatically generated by Pod::Man 2.25 (Pod::Simple 3.20)
--.\"
--.\" Standard preamble:
--.\" ========================================================================
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--.if t .sp .5v
--.if n .sp
--..
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--.nf
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--..
--.de Ve \" End verbatim text
--.ft R
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--..
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--.\" double quote, and \*(R" will give a right double quote. \*(C+ will
--.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
--.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
--.\" nothing in troff, for use with C<>.
--.tr \(*W-
--.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
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--. ds L" ""
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--. ds PI \(*p
--. ds L" ``
--. ds R" ''
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--.\" Escape single quotes in literal strings from groff's Unicode transform.
--.ie \n(.g .ds Aq \(aq
--.el .ds Aq '
--.\"
--.\" If the F register is turned on, we'll generate index entries on stderr for
--.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index
--.\" entries marked with X<> in POD. Of course, you'll have to process the
--.\" output yourself in some meaningful fashion.
--.ie \nF \{\
--. de IX
--. tm Index:\\$1\t\\n%\t"\\$2"
--..
--. nr % 0
--. rr F
--.\}
--.el \{\
--. de IX
--..
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--.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
--.\" Fear. Run. Save yourself. No user-serviceable parts.
--. \" fudge factors for nroff and troff
--.if n \{\
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--. ds #V .6m
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--.if n \{\
--. ds ' \&
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--. ds ~ ~
--. ds /
--.\}
--.if t \{\
--. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
--. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
--. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
--. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
--. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
--. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
--.\}
--. \" troff and (daisy-wheel) nroff accents
--.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
--.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
--.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
--.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
--.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
--.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
--.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
--.ds ae a\h'-(\w'a'u*4/10)'e
--.ds Ae A\h'-(\w'A'u*4/10)'E
--. \" corrections for vroff
--.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
--.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
--. \" for low resolution devices (crt and lpr)
--.if \n(.H>23 .if \n(.V>19 \
--\{\
--. ds : e
--. ds 8 ss
--. ds o a
--. ds d- d\h'-1'\(ga
--. ds D- D\h'-1'\(hy
--. ds th \o'bp'
--. ds Th \o'LP'
--. ds ae ae
--. ds Ae AE
--.\}
--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "AS 1"
--.TH AS 1 "2013-11-26" "binutils-2.23.92" "GNU Development Tools"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--AS \- the portable GNU assembler.
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--as [\fB\-a\fR[\fBcdghlns\fR][=\fIfile\fR]] [\fB\-\-alternate\fR] [\fB\-D\fR]
-- [\fB\-\-compress\-debug\-sections\fR] [\fB\-\-nocompress\-debug\-sections\fR]
-- [\fB\-\-debug\-prefix\-map\fR \fIold\fR=\fInew\fR]
-- [\fB\-\-defsym\fR \fIsym\fR=\fIval\fR] [\fB\-f\fR] [\fB\-g\fR] [\fB\-\-gstabs\fR]
-- [\fB\-\-gstabs+\fR] [\fB\-\-gdwarf\-2\fR] [\fB\-\-gdwarf\-sections\fR]
-- [\fB\-\-help\fR] [\fB\-I\fR \fIdir\fR] [\fB\-J\fR]
-- [\fB\-K\fR] [\fB\-L\fR] [\fB\-\-listing\-lhs\-width\fR=\fI\s-1NUM\s0\fR]
-- [\fB\-\-listing\-lhs\-width2\fR=\fI\s-1NUM\s0\fR] [\fB\-\-listing\-rhs\-width\fR=\fI\s-1NUM\s0\fR]
-- [\fB\-\-listing\-cont\-lines\fR=\fI\s-1NUM\s0\fR] [\fB\-\-keep\-locals\fR] [\fB\-o\fR
-- \fIobjfile\fR] [\fB\-R\fR] [\fB\-\-reduce\-memory\-overheads\fR] [\fB\-\-statistics\fR]
-- [\fB\-v\fR] [\fB\-version\fR] [\fB\-\-version\fR] [\fB\-W\fR] [\fB\-\-warn\fR]
-- [\fB\-\-fatal\-warnings\fR] [\fB\-w\fR] [\fB\-x\fR] [\fB\-Z\fR] [\fB@\fR\fI\s-1FILE\s0\fR]
-- [\fB\-\-size\-check=[error|warning]\fR]
-- [\fB\-\-target\-help\fR] [\fItarget-options\fR]
-- [\fB\-\-\fR|\fIfiles\fR ...]
--.PP
--\&\fITarget AArch64 options:\fR
-- [\fB\-EB\fR|\fB\-EL\fR]
-- [\fB\-mabi\fR=\fI\s-1ABI\s0\fR]
--.PP
--\&\fITarget Alpha options:\fR
-- [\fB\-m\fR\fIcpu\fR]
-- [\fB\-mdebug\fR | \fB\-no\-mdebug\fR]
-- [\fB\-replace\fR | \fB\-noreplace\fR]
-- [\fB\-relax\fR] [\fB\-g\fR] [\fB\-G\fR\fIsize\fR]
-- [\fB\-F\fR] [\fB\-32addr\fR]
--.PP
--\&\fITarget \s-1ARC\s0 options:\fR
-- [\fB\-marc[5|6|7|8]\fR]
-- [\fB\-EB\fR|\fB\-EL\fR]
--.PP
--\&\fITarget \s-1ARM\s0 options:\fR
-- [\fB\-mcpu\fR=\fIprocessor\fR[+\fIextension\fR...]]
-- [\fB\-march\fR=\fIarchitecture\fR[+\fIextension\fR...]]
-- [\fB\-mfpu\fR=\fIfloating-point-format\fR]
-- [\fB\-mfloat\-abi\fR=\fIabi\fR]
-- [\fB\-meabi\fR=\fIver\fR]
-- [\fB\-mthumb\fR]
-- [\fB\-EB\fR|\fB\-EL\fR]
-- [\fB\-mapcs\-32\fR|\fB\-mapcs\-26\fR|\fB\-mapcs\-float\fR|
-- \fB\-mapcs\-reentrant\fR]
-- [\fB\-mthumb\-interwork\fR] [\fB\-k\fR]
--.PP
--\&\fITarget Blackfin options:\fR
-- [\fB\-mcpu\fR=\fIprocessor\fR[\-\fIsirevision\fR]]
-- [\fB\-mfdpic\fR]
-- [\fB\-mno\-fdpic\fR]
-- [\fB\-mnopic\fR]
--.PP
--\&\fITarget \s-1CRIS\s0 options:\fR
-- [\fB\-\-underscore\fR | \fB\-\-no\-underscore\fR]
-- [\fB\-\-pic\fR] [\fB\-N\fR]
-- [\fB\-\-emulation=criself\fR | \fB\-\-emulation=crisaout\fR]
-- [\fB\-\-march=v0_v10\fR | \fB\-\-march=v10\fR | \fB\-\-march=v32\fR | \fB\-\-march=common_v10_v32\fR]
--.PP
--\&\fITarget D10V options:\fR
-- [\fB\-O\fR]
--.PP
--\&\fITarget D30V options:\fR
-- [\fB\-O\fR|\fB\-n\fR|\fB\-N\fR]
--.PP
--\&\fITarget \s-1EPIPHANY\s0 options:\fR
-- [\fB\-mepiphany\fR|\fB\-mepiphany16\fR]
--.PP
--\&\fITarget H8/300 options:\fR
-- [\-h\-tick\-hex]
--.PP
--\&\fITarget i386 options:\fR
-- [\fB\-\-32\fR|\fB\-\-x32\fR|\fB\-\-64\fR] [\fB\-n\fR]
-- [\fB\-march\fR=\fI\s-1CPU\s0\fR[+\fI\s-1EXTENSION\s0\fR...]] [\fB\-mtune\fR=\fI\s-1CPU\s0\fR]
--.PP
--\&\fITarget i960 options:\fR
-- [\fB\-ACA\fR|\fB\-ACA_A\fR|\fB\-ACB\fR|\fB\-ACC\fR|\fB\-AKA\fR|\fB\-AKB\fR|
-- \fB\-AKC\fR|\fB\-AMC\fR]
-- [\fB\-b\fR] [\fB\-no\-relax\fR]
--.PP
--\&\fITarget \s-1IA\-64\s0 options:\fR
-- [\fB\-mconstant\-gp\fR|\fB\-mauto\-pic\fR]
-- [\fB\-milp32\fR|\fB\-milp64\fR|\fB\-mlp64\fR|\fB\-mp64\fR]
-- [\fB\-mle\fR|\fBmbe\fR]
-- [\fB\-mtune=itanium1\fR|\fB\-mtune=itanium2\fR]
-- [\fB\-munwind\-check=warning\fR|\fB\-munwind\-check=error\fR]
-- [\fB\-mhint.b=ok\fR|\fB\-mhint.b=warning\fR|\fB\-mhint.b=error\fR]
-- [\fB\-x\fR|\fB\-xexplicit\fR] [\fB\-xauto\fR] [\fB\-xdebug\fR]
--.PP
--\&\fITarget \s-1IP2K\s0 options:\fR
-- [\fB\-mip2022\fR|\fB\-mip2022ext\fR]
--.PP
--\&\fITarget M32C options:\fR
-- [\fB\-m32c\fR|\fB\-m16c\fR] [\-relax] [\-h\-tick\-hex]
--.PP
--\&\fITarget M32R options:\fR
-- [\fB\-\-m32rx\fR|\fB\-\-[no\-]warn\-explicit\-parallel\-conflicts\fR|
-- \fB\-\-W[n]p\fR]
--.PP
--\&\fITarget M680X0 options:\fR
-- [\fB\-l\fR] [\fB\-m68000\fR|\fB\-m68010\fR|\fB\-m68020\fR|...]
--.PP
--\&\fITarget M68HC11 options:\fR
-- [\fB\-m68hc11\fR|\fB\-m68hc12\fR|\fB\-m68hcs12\fR|\fB\-mm9s12x\fR|\fB\-mm9s12xg\fR]
-- [\fB\-mshort\fR|\fB\-mlong\fR]
-- [\fB\-mshort\-double\fR|\fB\-mlong\-double\fR]
-- [\fB\-\-force\-long\-branches\fR] [\fB\-\-short\-branches\fR]
-- [\fB\-\-strict\-direct\-mode\fR] [\fB\-\-print\-insn\-syntax\fR]
-- [\fB\-\-print\-opcodes\fR] [\fB\-\-generate\-example\fR]
--.PP
--\&\fITarget \s-1MCORE\s0 options:\fR
-- [\fB\-jsri2bsr\fR] [\fB\-sifilter\fR] [\fB\-relax\fR]
-- [\fB\-mcpu=[210|340]\fR]
--.PP
--\&\fITarget Meta options:\fR
-- [\fB\-mcpu=\fR\fIcpu\fR] [\fB\-mfpu=\fR\fIcpu\fR] [\fB\-mdsp=\fR\fIcpu\fR]
--\&\fITarget \s-1MICROBLAZE\s0 options:\fR
--.PP
--\&\fITarget \s-1MIPS\s0 options:\fR
-- [\fB\-nocpp\fR] [\fB\-EL\fR] [\fB\-EB\fR] [\fB\-O\fR[\fIoptimization level\fR]]
-- [\fB\-g\fR[\fIdebug level\fR]] [\fB\-G\fR \fInum\fR] [\fB\-KPIC\fR] [\fB\-call_shared\fR]
-- [\fB\-non_shared\fR] [\fB\-xgot\fR [\fB\-mvxworks\-pic\fR]
-- [\fB\-mabi\fR=\fI\s-1ABI\s0\fR] [\fB\-32\fR] [\fB\-n32\fR] [\fB\-64\fR] [\fB\-mfp32\fR] [\fB\-mgp32\fR]
-- [\fB\-march\fR=\fI\s-1CPU\s0\fR] [\fB\-mtune\fR=\fI\s-1CPU\s0\fR] [\fB\-mips1\fR] [\fB\-mips2\fR]
-- [\fB\-mips3\fR] [\fB\-mips4\fR] [\fB\-mips5\fR] [\fB\-mips32\fR] [\fB\-mips32r2\fR]
-- [\fB\-mips64\fR] [\fB\-mips64r2\fR]
-- [\fB\-construct\-floats\fR] [\fB\-no\-construct\-floats\fR]
-- [\fB\-mnan=\fR\fIencoding\fR]
-- [\fB\-trap\fR] [\fB\-no\-break\fR] [\fB\-break\fR] [\fB\-no\-trap\fR]
-- [\fB\-mips16\fR] [\fB\-no\-mips16\fR]
-- [\fB\-mmicromips\fR] [\fB\-mno\-micromips\fR]
-- [\fB\-msmartmips\fR] [\fB\-mno\-smartmips\fR]
-- [\fB\-mips3d\fR] [\fB\-no\-mips3d\fR]
-- [\fB\-mdmx\fR] [\fB\-no\-mdmx\fR]
-- [\fB\-mdsp\fR] [\fB\-mno\-dsp\fR]
-- [\fB\-mdspr2\fR] [\fB\-mno\-dspr2\fR]
-- [\fB\-mmt\fR] [\fB\-mno\-mt\fR]
-- [\fB\-mmcu\fR] [\fB\-mno\-mcu\fR]
-- [\fB\-minsn32\fR] [\fB\-mno\-insn32\fR]
-- [\fB\-mfix7000\fR] [\fB\-mno\-fix7000\fR]
-- [\fB\-mfix\-vr4120\fR] [\fB\-mno\-fix\-vr4120\fR]
-- [\fB\-mfix\-vr4130\fR] [\fB\-mno\-fix\-vr4130\fR]
-- [\fB\-mdebug\fR] [\fB\-no\-mdebug\fR]
-- [\fB\-mpdr\fR] [\fB\-mno\-pdr\fR]
--.PP
--\&\fITarget \s-1MMIX\s0 options:\fR
-- [\fB\-\-fixed\-special\-register\-names\fR] [\fB\-\-globalize\-symbols\fR]
-- [\fB\-\-gnu\-syntax\fR] [\fB\-\-relax\fR] [\fB\-\-no\-predefined\-symbols\fR]
-- [\fB\-\-no\-expand\fR] [\fB\-\-no\-merge\-gregs\fR] [\fB\-x\fR]
-- [\fB\-\-linker\-allocated\-gregs\fR]
--.PP
--\&\fITarget Nios \s-1II\s0 options:\fR
-- [\fB\-relax\-all\fR] [\fB\-relax\-section\fR] [\fB\-no\-relax\fR]
-- [\fB\-EB\fR] [\fB\-EL\fR]
--.PP
--\&\fITarget \s-1PDP11\s0 options:\fR
-- [\fB\-mpic\fR|\fB\-mno\-pic\fR] [\fB\-mall\fR] [\fB\-mno\-extensions\fR]
-- [\fB\-m\fR\fIextension\fR|\fB\-mno\-\fR\fIextension\fR]
-- [\fB\-m\fR\fIcpu\fR] [\fB\-m\fR\fImachine\fR]
--.PP
--\&\fITarget picoJava options:\fR
-- [\fB\-mb\fR|\fB\-me\fR]
--.PP
--\&\fITarget PowerPC options:\fR
-- [\fB\-a32\fR|\fB\-a64\fR]
-- [\fB\-mpwrx\fR|\fB\-mpwr2\fR|\fB\-mpwr\fR|\fB\-m601\fR|\fB\-mppc\fR|\fB\-mppc32\fR|\fB\-m603\fR|\fB\-m604\fR|\fB\-m403\fR|\fB\-m405\fR|
-- \fB\-m440\fR|\fB\-m464\fR|\fB\-m476\fR|\fB\-m7400\fR|\fB\-m7410\fR|\fB\-m7450\fR|\fB\-m7455\fR|\fB\-m750cl\fR|\fB\-mppc64\fR|
-- \fB\-m620\fR|\fB\-me500\fR|\fB\-e500x2\fR|\fB\-me500mc\fR|\fB\-me500mc64\fR|\fB\-me5500\fR|\fB\-me6500\fR|\fB\-mppc64bridge\fR|
-- \fB\-mbooke\fR|\fB\-mpower4\fR|\fB\-mpwr4\fR|\fB\-mpower5\fR|\fB\-mpwr5\fR|\fB\-mpwr5x\fR|\fB\-mpower6\fR|\fB\-mpwr6\fR|
-- \fB\-mpower7\fR|\fB\-mpwr7\fR|\fB\-mpower8\fR|\fB\-mpwr8\fR|\fB\-ma2\fR|\fB\-mcell\fR|\fB\-mspe\fR|\fB\-mtitan\fR|\fB\-me300\fR|\fB\-mcom\fR]
-- [\fB\-many\fR] [\fB\-maltivec\fR|\fB\-mvsx\fR|\fB\-mhtm\fR|\fB\-mvle\fR]
-- [\fB\-mregnames\fR|\fB\-mno\-regnames\fR]
-- [\fB\-mrelocatable\fR|\fB\-mrelocatable\-lib\fR|\fB\-K \s-1PIC\s0\fR] [\fB\-memb\fR]
-- [\fB\-mlittle\fR|\fB\-mlittle\-endian\fR|\fB\-le\fR|\fB\-mbig\fR|\fB\-mbig\-endian\fR|\fB\-be\fR]
-- [\fB\-msolaris\fR|\fB\-mno\-solaris\fR]
-- [\fB\-nops=\fR\fIcount\fR]
--.PP
--\&\fITarget \s-1RX\s0 options:\fR
-- [\fB\-mlittle\-endian\fR|\fB\-mbig\-endian\fR]
-- [\fB\-m32bit\-doubles\fR|\fB\-m64bit\-doubles\fR]
-- [\fB\-muse\-conventional\-section\-names\fR]
-- [\fB\-msmall\-data\-limit\fR]
-- [\fB\-mpid\fR]
-- [\fB\-mrelax\fR]
-- [\fB\-mint\-register=\fR\fInumber\fR]
-- [\fB\-mgcc\-abi\fR|\fB\-mrx\-abi\fR]
--.PP
--\&\fITarget s390 options:\fR
-- [\fB\-m31\fR|\fB\-m64\fR] [\fB\-mesa\fR|\fB\-mzarch\fR] [\fB\-march\fR=\fI\s-1CPU\s0\fR]
-- [\fB\-mregnames\fR|\fB\-mno\-regnames\fR]
-- [\fB\-mwarn\-areg\-zero\fR]
--.PP
--\&\fITarget \s-1SCORE\s0 options:\fR
-- [\fB\-EB\fR][\fB\-EL\fR][\fB\-FIXDD\fR][\fB\-NWARN\fR]
-- [\fB\-SCORE5\fR][\fB\-SCORE5U\fR][\fB\-SCORE7\fR][\fB\-SCORE3\fR]
-- [\fB\-march=score7\fR][\fB\-march=score3\fR]
-- [\fB\-USE_R1\fR][\fB\-KPIC\fR][\fB\-O0\fR][\fB\-G\fR \fInum\fR][\fB\-V\fR]
--.PP
--\&\fITarget \s-1SPARC\s0 options:\fR
-- [\fB\-Av6\fR|\fB\-Av7\fR|\fB\-Av8\fR|\fB\-Asparclet\fR|\fB\-Asparclite\fR
-- \fB\-Av8plus\fR|\fB\-Av8plusa\fR|\fB\-Av9\fR|\fB\-Av9a\fR]
-- [\fB\-xarch=v8plus\fR|\fB\-xarch=v8plusa\fR] [\fB\-bump\fR]
-- [\fB\-32\fR|\fB\-64\fR]
--.PP
--\&\fITarget \s-1TIC54X\s0 options:\fR
-- [\fB\-mcpu=54[123589]\fR|\fB\-mcpu=54[56]lp\fR] [\fB\-mfar\-mode\fR|\fB\-mf\fR]
-- [\fB\-merrors\-to\-file\fR \fI<filename>\fR|\fB\-me\fR \fI<filename>\fR]
--.PP
--\&\fITarget \s-1TIC6X\s0 options:\fR
-- [\fB\-march=\fR\fIarch\fR] [\fB\-mbig\-endian\fR|\fB\-mlittle\-endian\fR]
-- [\fB\-mdsbt\fR|\fB\-mno\-dsbt\fR] [\fB\-mpid=no\fR|\fB\-mpid=near\fR|\fB\-mpid=far\fR]
-- [\fB\-mpic\fR|\fB\-mno\-pic\fR]
--.PP
--\&\fITarget TILE-Gx options:\fR
-- [\fB\-m32\fR|\fB\-m64\fR][\fB\-EB\fR][\fB\-EL\fR]
--.PP
--\&\fITarget Xtensa options:\fR
-- [\fB\-\-[no\-]text\-section\-literals\fR] [\fB\-\-[no\-]absolute\-literals\fR]
-- [\fB\-\-[no\-]target\-align\fR] [\fB\-\-[no\-]longcalls\fR]
-- [\fB\-\-[no\-]transform\fR]
-- [\fB\-\-rename\-section\fR \fIoldname\fR=\fInewname\fR]
--.PP
--\&\fITarget Z80 options:\fR
-- [\fB\-z80\fR] [\fB\-r800\fR]
-- [ \fB\-ignore\-undocumented\-instructions\fR] [\fB\-Wnud\fR]
-- [ \fB\-ignore\-unportable\-instructions\fR] [\fB\-Wnup\fR]
-- [ \fB\-warn\-undocumented\-instructions\fR] [\fB\-Wud\fR]
-- [ \fB\-warn\-unportable\-instructions\fR] [\fB\-Wup\fR]
-- [ \fB\-forbid\-undocumented\-instructions\fR] [\fB\-Fud\fR]
-- [ \fB\-forbid\-unportable\-instructions\fR] [\fB\-Fup\fR]
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--\&\s-1GNU\s0 \fBas\fR is really a family of assemblers.
--If you use (or have used) the \s-1GNU\s0 assembler on one architecture, you
--should find a fairly similar environment when you use it on another
--architecture. Each version has much in common with the others,
--including object file formats, most assembler directives (often called
--\&\fIpseudo-ops\fR) and assembler syntax.
--.PP
--\&\fBas\fR is primarily intended to assemble the output of the
--\&\s-1GNU\s0 C compiler \f(CW\*(C`gcc\*(C'\fR for use by the linker
--\&\f(CW\*(C`ld\*(C'\fR. Nevertheless, we've tried to make \fBas\fR
--assemble correctly everything that other assemblers for the same
--machine would assemble.
--Any exceptions are documented explicitly.
--This doesn't mean \fBas\fR always uses the same syntax as another
--assembler for the same architecture; for example, we know of several
--incompatible versions of 680x0 assembly language syntax.
--.PP
--Each time you run \fBas\fR it assembles exactly one source
--program. The source program is made up of one or more files.
--(The standard input is also a file.)
--.PP
--You give \fBas\fR a command line that has zero or more input file
--names. The input files are read (from left file name to right). A
--command line argument (in any position) that has no special meaning
--is taken to be an input file name.
--.PP
--If you give \fBas\fR no file names it attempts to read one input file
--from the \fBas\fR standard input, which is normally your terminal. You
--may have to type \fBctl-D\fR to tell \fBas\fR there is no more program
--to assemble.
--.PP
--Use \fB\-\-\fR if you need to explicitly name the standard input file
--in your command line.
--.PP
--If the source is empty, \fBas\fR produces a small, empty object
--file.
--.PP
--\&\fBas\fR may write warnings and error messages to the standard error
--file (usually your terminal). This should not happen when a compiler
--runs \fBas\fR automatically. Warnings report an assumption made so
--that \fBas\fR could keep assembling a flawed program; errors report a
--grave problem that stops the assembly.
--.PP
--If you are invoking \fBas\fR via the \s-1GNU\s0 C compiler,
--you can use the \fB\-Wa\fR option to pass arguments through to the assembler.
--The assembler arguments must be separated from each other (and the \fB\-Wa\fR)
--by commas. For example:
--.PP
--.Vb 1
--\& gcc \-c \-g \-O \-Wa,\-alh,\-L file.c
--.Ve
--.PP
--This passes two options to the assembler: \fB\-alh\fR (emit a listing to
--standard output with high-level and assembly source) and \fB\-L\fR (retain
--local symbols in the symbol table).
--.PP
--Usually you do not need to use this \fB\-Wa\fR mechanism, since many compiler
--command-line options are automatically passed to the assembler by the compiler.
--(You can call the \s-1GNU\s0 compiler driver with the \fB\-v\fR option to see
--precisely what options it passes to each compilation pass, including the
--assembler.)
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--.IP "\fB@\fR\fIfile\fR" 4
--.IX Item "@file"
--Read command-line options from \fIfile\fR. The options read are
--inserted in place of the original @\fIfile\fR option. If \fIfile\fR
--does not exist, or cannot be read, then the option will be treated
--literally, and not removed.
--.Sp
--Options in \fIfile\fR are separated by whitespace. A whitespace
--character may be included in an option by surrounding the entire
--option in either single or double quotes. Any character (including a
--backslash) may be included by prefixing the character to be included
--with a backslash. The \fIfile\fR may itself contain additional
--@\fIfile\fR options; any such options will be processed recursively.
--.IP "\fB\-a[cdghlmns]\fR" 4
--.IX Item "-a[cdghlmns]"
--Turn on listings, in any of a variety of ways:
--.RS 4
--.IP "\fB\-ac\fR" 4
--.IX Item "-ac"
--omit false conditionals
--.IP "\fB\-ad\fR" 4
--.IX Item "-ad"
--omit debugging directives
--.IP "\fB\-ag\fR" 4
--.IX Item "-ag"
--include general information, like as version and options passed
--.IP "\fB\-ah\fR" 4
--.IX Item "-ah"
--include high-level source
--.IP "\fB\-al\fR" 4
--.IX Item "-al"
--include assembly
--.IP "\fB\-am\fR" 4
--.IX Item "-am"
--include macro expansions
--.IP "\fB\-an\fR" 4
--.IX Item "-an"
--omit forms processing
--.IP "\fB\-as\fR" 4
--.IX Item "-as"
--include symbols
--.IP "\fB=file\fR" 4
--.IX Item "=file"
--set the name of the listing file
--.RE
--.RS 4
--.Sp
--You may combine these options; for example, use \fB\-aln\fR for assembly
--listing without forms processing. The \fB=file\fR option, if used, must be
--the last one. By itself, \fB\-a\fR defaults to \fB\-ahls\fR.
--.RE
--.IP "\fB\-\-alternate\fR" 4
--.IX Item "--alternate"
--Begin in alternate macro mode.
--.IP "\fB\-\-compress\-debug\-sections\fR" 4
--.IX Item "--compress-debug-sections"
--Compress \s-1DWARF\s0 debug sections using zlib. The debug sections are renamed
--to begin with \fB.zdebug\fR, and the resulting object file may not be
--compatible with older linkers and object file utilities.
--.IP "\fB\-\-nocompress\-debug\-sections\fR" 4
--.IX Item "--nocompress-debug-sections"
--Do not compress \s-1DWARF\s0 debug sections. This is the default.
--.IP "\fB\-D\fR" 4
--.IX Item "-D"
--Ignored. This option is accepted for script compatibility with calls to
--other assemblers.
--.IP "\fB\-\-debug\-prefix\-map\fR \fIold\fR\fB=\fR\fInew\fR" 4
--.IX Item "--debug-prefix-map old=new"
--When assembling files in directory \fI\fIold\fI\fR, record debugging
--information describing them as in \fI\fInew\fI\fR instead.
--.IP "\fB\-\-defsym\fR \fIsym\fR\fB=\fR\fIvalue\fR" 4
--.IX Item "--defsym sym=value"
--Define the symbol \fIsym\fR to be \fIvalue\fR before assembling the input file.
--\&\fIvalue\fR must be an integer constant. As in C, a leading \fB0x\fR
--indicates a hexadecimal value, and a leading \fB0\fR indicates an octal
--value. The value of the symbol can be overridden inside a source file via the
--use of a \f(CW\*(C`.set\*(C'\fR pseudo-op.
--.IP "\fB\-f\fR" 4
--.IX Item "-f"
--\&\*(L"fast\*(R"\-\-\-skip whitespace and comment preprocessing (assume source is
--compiler output).
--.IP "\fB\-g\fR" 4
--.IX Item "-g"
--.PD 0
--.IP "\fB\-\-gen\-debug\fR" 4
--.IX Item "--gen-debug"
--.PD
--Generate debugging information for each assembler source line using whichever
--debug format is preferred by the target. This currently means either \s-1STABS\s0,
--\&\s-1ECOFF\s0 or \s-1DWARF2\s0.
--.IP "\fB\-\-gstabs\fR" 4
--.IX Item "--gstabs"
--Generate stabs debugging information for each assembler line. This
--may help debugging assembler code, if the debugger can handle it.
--.IP "\fB\-\-gstabs+\fR" 4
--.IX Item "--gstabs+"
--Generate stabs debugging information for each assembler line, with \s-1GNU\s0
--extensions that probably only gdb can handle, and that could make other
--debuggers crash or refuse to read your program. This
--may help debugging assembler code. Currently the only \s-1GNU\s0 extension is
--the location of the current working directory at assembling time.
--.IP "\fB\-\-gdwarf\-2\fR" 4
--.IX Item "--gdwarf-2"
--Generate \s-1DWARF2\s0 debugging information for each assembler line. This
--may help debugging assembler code, if the debugger can handle it. Note\-\-\-this
--option is only supported by some targets, not all of them.
--.IP "\fB\-\-gdwarf\-sections\fR" 4
--.IX Item "--gdwarf-sections"
--Instead of creating a .debug_line section, create a series of
--\&.debug_line.\fIfoo\fR sections where \fIfoo\fR is the name of the
--corresponding code section. For example a code section called \fI.text.func\fR
--will have its dwarf line number information placed into a section called
--\&\fI.debug_line.text.func\fR. If the code section is just called \fI.text\fR
--then debug line section will still be called just \fI.debug_line\fR without any
--suffix.
--.IP "\fB\-\-size\-check=error\fR" 4
--.IX Item "--size-check=error"
--.PD 0
--.IP "\fB\-\-size\-check=warning\fR" 4
--.IX Item "--size-check=warning"
--.PD
--Issue an error or warning for invalid \s-1ELF\s0 .size directive.
--.IP "\fB\-\-help\fR" 4
--.IX Item "--help"
--Print a summary of the command line options and exit.
--.IP "\fB\-\-target\-help\fR" 4
--.IX Item "--target-help"
--Print a summary of all target specific options and exit.
--.IP "\fB\-I\fR \fIdir\fR" 4
--.IX Item "-I dir"
--Add directory \fIdir\fR to the search list for \f(CW\*(C`.include\*(C'\fR directives.
--.IP "\fB\-J\fR" 4
--.IX Item "-J"
--Don't warn about signed overflow.
--.IP "\fB\-K\fR" 4
--.IX Item "-K"
--Issue warnings when difference tables altered for long displacements.
--.IP "\fB\-L\fR" 4
--.IX Item "-L"
--.PD 0
--.IP "\fB\-\-keep\-locals\fR" 4
--.IX Item "--keep-locals"
--.PD
--Keep (in the symbol table) local symbols. These symbols start with
--system-specific local label prefixes, typically \fB.L\fR for \s-1ELF\s0 systems
--or \fBL\fR for traditional a.out systems.
--.IP "\fB\-\-listing\-lhs\-width=\fR\fInumber\fR" 4
--.IX Item "--listing-lhs-width=number"
--Set the maximum width, in words, of the output data column for an assembler
--listing to \fInumber\fR.
--.IP "\fB\-\-listing\-lhs\-width2=\fR\fInumber\fR" 4
--.IX Item "--listing-lhs-width2=number"
--Set the maximum width, in words, of the output data column for continuation
--lines in an assembler listing to \fInumber\fR.
--.IP "\fB\-\-listing\-rhs\-width=\fR\fInumber\fR" 4
--.IX Item "--listing-rhs-width=number"
--Set the maximum width of an input source line, as displayed in a listing, to
--\&\fInumber\fR bytes.
--.IP "\fB\-\-listing\-cont\-lines=\fR\fInumber\fR" 4
--.IX Item "--listing-cont-lines=number"
--Set the maximum number of lines printed in a listing for a single line of input
--to \fInumber\fR + 1.
--.IP "\fB\-o\fR \fIobjfile\fR" 4
--.IX Item "-o objfile"
--Name the object-file output from \fBas\fR \fIobjfile\fR.
--.IP "\fB\-R\fR" 4
--.IX Item "-R"
--Fold the data section into the text section.
--.Sp
--Set the default size of \s-1GAS\s0's hash tables to a prime number close to
--\&\fInumber\fR. Increasing this value can reduce the length of time it takes the
--assembler to perform its tasks, at the expense of increasing the assembler's
--memory requirements. Similarly reducing this value can reduce the memory
--requirements at the expense of speed.
--.IP "\fB\-\-reduce\-memory\-overheads\fR" 4
--.IX Item "--reduce-memory-overheads"
--This option reduces \s-1GAS\s0's memory requirements, at the expense of making the
--assembly processes slower. Currently this switch is a synonym for
--\&\fB\-\-hash\-size=4051\fR, but in the future it may have other effects as well.
--.IP "\fB\-\-statistics\fR" 4
--.IX Item "--statistics"
--Print the maximum space (in bytes) and total time (in seconds) used by
--assembly.
--.IP "\fB\-\-strip\-local\-absolute\fR" 4
--.IX Item "--strip-local-absolute"
--Remove local absolute symbols from the outgoing symbol table.
--.IP "\fB\-v\fR" 4
--.IX Item "-v"
--.PD 0
--.IP "\fB\-version\fR" 4
--.IX Item "-version"
--.PD
--Print the \fBas\fR version.
--.IP "\fB\-\-version\fR" 4
--.IX Item "--version"
--Print the \fBas\fR version and exit.
--.IP "\fB\-W\fR" 4
--.IX Item "-W"
--.PD 0
--.IP "\fB\-\-no\-warn\fR" 4
--.IX Item "--no-warn"
--.PD
--Suppress warning messages.
--.IP "\fB\-\-fatal\-warnings\fR" 4
--.IX Item "--fatal-warnings"
--Treat warnings as errors.
--.IP "\fB\-\-warn\fR" 4
--.IX Item "--warn"
--Don't suppress warning messages or treat them as errors.
--.IP "\fB\-w\fR" 4
--.IX Item "-w"
--Ignored.
--.IP "\fB\-x\fR" 4
--.IX Item "-x"
--Ignored.
--.IP "\fB\-Z\fR" 4
--.IX Item "-Z"
--Generate an object file even after errors.
--.IP "\fB\-\- |\fR \fIfiles\fR \fB...\fR" 4
--.IX Item "-- | files ..."
--Standard input, or source files to assemble.
--.PP
--The following options are available when as is configured for the
--64\-bit mode of the \s-1ARM\s0 Architecture (AArch64).
--.IP "\fB\-EB\fR" 4
--.IX Item "-EB"
--This option specifies that the output generated by the assembler should
--be marked as being encoded for a big-endian processor.
--.IP "\fB\-EL\fR" 4
--.IX Item "-EL"
--This option specifies that the output generated by the assembler should
--be marked as being encoded for a little-endian processor.
--.IP "\fB\-mabi=\fR\fIabi\fR" 4
--.IX Item "-mabi=abi"
--Specify which \s-1ABI\s0 the source code uses. The recognized arguments
--are: \f(CW\*(C`ilp32\*(C'\fR and \f(CW\*(C`lp64\*(C'\fR, which decides the generated object
--file in \s-1ELF32\s0 and \s-1ELF64\s0 format respectively. The default is \f(CW\*(C`lp64\*(C'\fR.
--.PP
--The following options are available when as is configured for an Alpha
--processor.
--.IP "\fB\-m\fR\fIcpu\fR" 4
--.IX Item "-mcpu"
--This option specifies the target processor. If an attempt is made to
--assemble an instruction which will not execute on the target processor,
--the assembler may either expand the instruction as a macro or issue an
--error message. This option is equivalent to the \f(CW\*(C`.arch\*(C'\fR directive.
--.Sp
--The following processor names are recognized:
--\&\f(CW21064\fR,
--\&\f(CW\*(C`21064a\*(C'\fR,
--\&\f(CW21066\fR,
--\&\f(CW21068\fR,
--\&\f(CW21164\fR,
--\&\f(CW\*(C`21164a\*(C'\fR,
--\&\f(CW\*(C`21164pc\*(C'\fR,
--\&\f(CW21264\fR,
--\&\f(CW\*(C`21264a\*(C'\fR,
--\&\f(CW\*(C`21264b\*(C'\fR,
--\&\f(CW\*(C`ev4\*(C'\fR,
--\&\f(CW\*(C`ev5\*(C'\fR,
--\&\f(CW\*(C`lca45\*(C'\fR,
--\&\f(CW\*(C`ev5\*(C'\fR,
--\&\f(CW\*(C`ev56\*(C'\fR,
--\&\f(CW\*(C`pca56\*(C'\fR,
--\&\f(CW\*(C`ev6\*(C'\fR,
--\&\f(CW\*(C`ev67\*(C'\fR,
--\&\f(CW\*(C`ev68\*(C'\fR.
--The special name \f(CW\*(C`all\*(C'\fR may be used to allow the assembler to accept
--instructions valid for any Alpha processor.
--.Sp
--In order to support existing practice in \s-1OSF/1\s0 with respect to \f(CW\*(C`.arch\*(C'\fR,
--and existing practice within \fB\s-1MILO\s0\fR (the Linux \s-1ARC\s0 bootloader), the
--numbered processor names (e.g. 21064) enable the processor-specific PALcode
--instructions, while the \*(L"electro-vlasic\*(R" names (e.g. \f(CW\*(C`ev4\*(C'\fR) do not.
--.IP "\fB\-mdebug\fR" 4
--.IX Item "-mdebug"
--.PD 0
--.IP "\fB\-no\-mdebug\fR" 4
--.IX Item "-no-mdebug"
--.PD
--Enables or disables the generation of \f(CW\*(C`.mdebug\*(C'\fR encapsulation for
--stabs directives and procedure descriptors. The default is to automatically
--enable \f(CW\*(C`.mdebug\*(C'\fR when the first stabs directive is seen.
--.IP "\fB\-relax\fR" 4
--.IX Item "-relax"
--This option forces all relocations to be put into the object file, instead
--of saving space and resolving some relocations at assembly time. Note that
--this option does not propagate all symbol arithmetic into the object file,
--because not all symbol arithmetic can be represented. However, the option
--can still be useful in specific applications.
--.IP "\fB\-replace\fR" 4
--.IX Item "-replace"
--.PD 0
--.IP "\fB\-noreplace\fR" 4
--.IX Item "-noreplace"
--.PD
--Enables or disables the optimization of procedure calls, both at assemblage
--and at link time. These options are only available for \s-1VMS\s0 targets and
--\&\f(CW\*(C`\-replace\*(C'\fR is the default. See section 1.4.1 of the OpenVMS Linker
--Utility Manual.
--.IP "\fB\-g\fR" 4
--.IX Item "-g"
--This option is used when the compiler generates debug information. When
--\&\fBgcc\fR is using \fBmips-tfile\fR to generate debug
--information for \s-1ECOFF\s0, local labels must be passed through to the object
--file. Otherwise this option has no effect.
--.IP "\fB\-G\fR\fIsize\fR" 4
--.IX Item "-Gsize"
--A local common symbol larger than \fIsize\fR is placed in \f(CW\*(C`.bss\*(C'\fR,
--while smaller symbols are placed in \f(CW\*(C`.sbss\*(C'\fR.
--.IP "\fB\-F\fR" 4
--.IX Item "-F"
--.PD 0
--.IP "\fB\-32addr\fR" 4
--.IX Item "-32addr"
--.PD
--These options are ignored for backward compatibility.
--.PP
--The following options are available when as is configured for
--an \s-1ARC\s0 processor.
--.IP "\fB\-marc[5|6|7|8]\fR" 4
--.IX Item "-marc[5|6|7|8]"
--This option selects the core processor variant.
--.IP "\fB\-EB | \-EL\fR" 4
--.IX Item "-EB | -EL"
--Select either big-endian (\-EB) or little-endian (\-EL) output.
--.PP
--The following options are available when as is configured for the \s-1ARM\s0
--processor family.
--.IP "\fB\-mcpu=\fR\fIprocessor\fR\fB[+\fR\fIextension\fR\fB...]\fR" 4
--.IX Item "-mcpu=processor[+extension...]"
--Specify which \s-1ARM\s0 processor variant is the target.
--.IP "\fB\-march=\fR\fIarchitecture\fR\fB[+\fR\fIextension\fR\fB...]\fR" 4
--.IX Item "-march=architecture[+extension...]"
--Specify which \s-1ARM\s0 architecture variant is used by the target.
--.IP "\fB\-mfpu=\fR\fIfloating-point-format\fR" 4
--.IX Item "-mfpu=floating-point-format"
--Select which Floating Point architecture is the target.
--.IP "\fB\-mfloat\-abi=\fR\fIabi\fR" 4
--.IX Item "-mfloat-abi=abi"
--Select which floating point \s-1ABI\s0 is in use.
--.IP "\fB\-mthumb\fR" 4
--.IX Item "-mthumb"
--Enable Thumb only instruction decoding.
--.IP "\fB\-mapcs\-32 | \-mapcs\-26 | \-mapcs\-float | \-mapcs\-reentrant\fR" 4
--.IX Item "-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant"
--Select which procedure calling convention is in use.
--.IP "\fB\-EB | \-EL\fR" 4
--.IX Item "-EB | -EL"
--Select either big-endian (\-EB) or little-endian (\-EL) output.
--.IP "\fB\-mthumb\-interwork\fR" 4
--.IX Item "-mthumb-interwork"
--Specify that the code has been generated with interworking between Thumb and
--\&\s-1ARM\s0 code in mind.
--.IP "\fB\-k\fR" 4
--.IX Item "-k"
--Specify that \s-1PIC\s0 code has been generated.
--.PP
--The following options are available when as is configured for
--the Blackfin processor family.
--.IP "\fB\-mcpu=\fR\fIprocessor\fR[\fB\-\fR\fIsirevision\fR]" 4
--.IX Item "-mcpu=processor[-sirevision]"
--This option specifies the target processor. The optional \fIsirevision\fR
--is not used in assembler. It's here such that \s-1GCC\s0 can easily pass down its
--\&\f(CW\*(C`\-mcpu=\*(C'\fR option. The assembler will issue an
--error message if an attempt is made to assemble an instruction which
--will not execute on the target processor. The following processor names are
--recognized:
--\&\f(CW\*(C`bf504\*(C'\fR,
--\&\f(CW\*(C`bf506\*(C'\fR,
--\&\f(CW\*(C`bf512\*(C'\fR,
--\&\f(CW\*(C`bf514\*(C'\fR,
--\&\f(CW\*(C`bf516\*(C'\fR,
--\&\f(CW\*(C`bf518\*(C'\fR,
--\&\f(CW\*(C`bf522\*(C'\fR,
--\&\f(CW\*(C`bf523\*(C'\fR,
--\&\f(CW\*(C`bf524\*(C'\fR,
--\&\f(CW\*(C`bf525\*(C'\fR,
--\&\f(CW\*(C`bf526\*(C'\fR,
--\&\f(CW\*(C`bf527\*(C'\fR,
--\&\f(CW\*(C`bf531\*(C'\fR,
--\&\f(CW\*(C`bf532\*(C'\fR,
--\&\f(CW\*(C`bf533\*(C'\fR,
--\&\f(CW\*(C`bf534\*(C'\fR,
--\&\f(CW\*(C`bf535\*(C'\fR (not implemented yet),
--\&\f(CW\*(C`bf536\*(C'\fR,
--\&\f(CW\*(C`bf537\*(C'\fR,
--\&\f(CW\*(C`bf538\*(C'\fR,
--\&\f(CW\*(C`bf539\*(C'\fR,
--\&\f(CW\*(C`bf542\*(C'\fR,
--\&\f(CW\*(C`bf542m\*(C'\fR,
--\&\f(CW\*(C`bf544\*(C'\fR,
--\&\f(CW\*(C`bf544m\*(C'\fR,
--\&\f(CW\*(C`bf547\*(C'\fR,
--\&\f(CW\*(C`bf547m\*(C'\fR,
--\&\f(CW\*(C`bf548\*(C'\fR,
--\&\f(CW\*(C`bf548m\*(C'\fR,
--\&\f(CW\*(C`bf549\*(C'\fR,
--\&\f(CW\*(C`bf549m\*(C'\fR,
--\&\f(CW\*(C`bf561\*(C'\fR,
--and
--\&\f(CW\*(C`bf592\*(C'\fR.
--.IP "\fB\-mfdpic\fR" 4
--.IX Item "-mfdpic"
--Assemble for the \s-1FDPIC\s0 \s-1ABI\s0.
--.IP "\fB\-mno\-fdpic\fR" 4
--.IX Item "-mno-fdpic"
--.PD 0
--.IP "\fB\-mnopic\fR" 4
--.IX Item "-mnopic"
--.PD
--Disable \-mfdpic.
--.PP
--See the info pages for documentation of the CRIS-specific options.
--.PP
--The following options are available when as is configured for
--a D10V processor.
--.IP "\fB\-O\fR" 4
--.IX Item "-O"
--Optimize output by parallelizing instructions.
--.PP
--The following options are available when as is configured for a D30V
--processor.
--.IP "\fB\-O\fR" 4
--.IX Item "-O"
--Optimize output by parallelizing instructions.
--.IP "\fB\-n\fR" 4
--.IX Item "-n"
--Warn when nops are generated.
--.IP "\fB\-N\fR" 4
--.IX Item "-N"
--Warn when a nop after a 32\-bit multiply instruction is generated.
--.PP
--The following options are available when as is configured for
--an Epiphany processor.
--.IP "\fB\-mepiphany\fR" 4
--.IX Item "-mepiphany"
--Specifies that the both 32 and 16 bit instructions are allowed. This is the
--default behavior.
--.IP "\fB\-mepiphany16\fR" 4
--.IX Item "-mepiphany16"
--Restricts the permitted instructions to just the 16 bit set.
--.PP
--The following options are available when as is configured for an H8/300
--processor.
--\&\f(CW@chapter\fR H8/300 Dependent Features
--.SS "Options"
--.IX Subsection "Options"
--The Renesas H8/300 version of \f(CW\*(C`as\*(C'\fR has one
--machine-dependent option:
--.IP "\fB\-h\-tick\-hex\fR" 4
--.IX Item "-h-tick-hex"
--Support H'00 style hex constants in addition to 0x00 style.
--.PP
--The following options are available when as is configured for
--an i386 processor.
--.IP "\fB\-\-32 | \-\-x32 | \-\-64\fR" 4
--.IX Item "--32 | --x32 | --64"
--Select the word size, either 32 bits or 64 bits. \fB\-\-32\fR
--implies Intel i386 architecture, while \fB\-\-x32\fR and \fB\-\-64\fR
--imply \s-1AMD\s0 x86\-64 architecture with 32\-bit or 64\-bit word-size
--respectively.
--.Sp
--These options are only available with the \s-1ELF\s0 object file format, and
--require that the necessary \s-1BFD\s0 support has been included (on a 32\-bit
--platform you have to add \-\-enable\-64\-bit\-bfd to configure enable 64\-bit
--usage and use x86\-64 as target platform).
--.IP "\fB\-n\fR" 4
--.IX Item "-n"
--By default, x86 \s-1GAS\s0 replaces multiple nop instructions used for
--alignment within code sections with multi-byte nop instructions such
--as leal 0(%esi,1),%esi. This switch disables the optimization.
--.IP "\fB\-\-divide\fR" 4
--.IX Item "--divide"
--On SVR4\-derived platforms, the character \fB/\fR is treated as a comment
--character, which means that it cannot be used in expressions. The
--\&\fB\-\-divide\fR option turns \fB/\fR into a normal character. This does
--not disable \fB/\fR at the beginning of a line starting a comment, or
--affect using \fB#\fR for starting a comment.
--.IP "\fB\-march=\fR\fI\s-1CPU\s0\fR\fB[+\fR\fI\s-1EXTENSION\s0\fR\fB...]\fR" 4
--.IX Item "-march=CPU[+EXTENSION...]"
--This option specifies the target processor. The assembler will
--issue an error message if an attempt is made to assemble an instruction
--which will not execute on the target processor. The following
--processor names are recognized:
--\&\f(CW\*(C`i8086\*(C'\fR,
--\&\f(CW\*(C`i186\*(C'\fR,
--\&\f(CW\*(C`i286\*(C'\fR,
--\&\f(CW\*(C`i386\*(C'\fR,
--\&\f(CW\*(C`i486\*(C'\fR,
--\&\f(CW\*(C`i586\*(C'\fR,
--\&\f(CW\*(C`i686\*(C'\fR,
--\&\f(CW\*(C`pentium\*(C'\fR,
--\&\f(CW\*(C`pentiumpro\*(C'\fR,
--\&\f(CW\*(C`pentiumii\*(C'\fR,
--\&\f(CW\*(C`pentiumiii\*(C'\fR,
--\&\f(CW\*(C`pentium4\*(C'\fR,
--\&\f(CW\*(C`prescott\*(C'\fR,
--\&\f(CW\*(C`nocona\*(C'\fR,
--\&\f(CW\*(C`core\*(C'\fR,
--\&\f(CW\*(C`core2\*(C'\fR,
--\&\f(CW\*(C`corei7\*(C'\fR,
--\&\f(CW\*(C`l1om\*(C'\fR,
--\&\f(CW\*(C`k1om\*(C'\fR,
--\&\f(CW\*(C`k6\*(C'\fR,
--\&\f(CW\*(C`k6_2\*(C'\fR,
--\&\f(CW\*(C`athlon\*(C'\fR,
--\&\f(CW\*(C`opteron\*(C'\fR,
--\&\f(CW\*(C`k8\*(C'\fR,
--\&\f(CW\*(C`amdfam10\*(C'\fR,
--\&\f(CW\*(C`bdver1\*(C'\fR,
--\&\f(CW\*(C`bdver2\*(C'\fR,
--\&\f(CW\*(C`bdver3\*(C'\fR,
--\&\f(CW\*(C`btver1\*(C'\fR,
--\&\f(CW\*(C`btver2\*(C'\fR,
--\&\f(CW\*(C`generic32\*(C'\fR and
--\&\f(CW\*(C`generic64\*(C'\fR.
--.Sp
--In addition to the basic instruction set, the assembler can be told to
--accept various extension mnemonics. For example,
--\&\f(CW\*(C`\-march=i686+sse4+vmx\*(C'\fR extends \fIi686\fR with \fIsse4\fR and
--\&\fIvmx\fR. The following extensions are currently supported:
--\&\f(CW8087\fR,
--\&\f(CW287\fR,
--\&\f(CW387\fR,
--\&\f(CW\*(C`no87\*(C'\fR,
--\&\f(CW\*(C`mmx\*(C'\fR,
--\&\f(CW\*(C`nommx\*(C'\fR,
--\&\f(CW\*(C`sse\*(C'\fR,
--\&\f(CW\*(C`sse2\*(C'\fR,
--\&\f(CW\*(C`sse3\*(C'\fR,
--\&\f(CW\*(C`ssse3\*(C'\fR,
--\&\f(CW\*(C`sse4.1\*(C'\fR,
--\&\f(CW\*(C`sse4.2\*(C'\fR,
--\&\f(CW\*(C`sse4\*(C'\fR,
--\&\f(CW\*(C`nosse\*(C'\fR,
--\&\f(CW\*(C`avx\*(C'\fR,
--\&\f(CW\*(C`avx2\*(C'\fR,
--\&\f(CW\*(C`adx\*(C'\fR,
--\&\f(CW\*(C`rdseed\*(C'\fR,
--\&\f(CW\*(C`prfchw\*(C'\fR,
--\&\f(CW\*(C`smap\*(C'\fR,
--\&\f(CW\*(C`mpx\*(C'\fR,
--\&\f(CW\*(C`sha\*(C'\fR,
--\&\f(CW\*(C`avx512f\*(C'\fR,
--\&\f(CW\*(C`avx512cd\*(C'\fR,
--\&\f(CW\*(C`avx512er\*(C'\fR,
--\&\f(CW\*(C`avx512pf\*(C'\fR,
--\&\f(CW\*(C`noavx\*(C'\fR,
--\&\f(CW\*(C`vmx\*(C'\fR,
--\&\f(CW\*(C`vmfunc\*(C'\fR,
--\&\f(CW\*(C`smx\*(C'\fR,
--\&\f(CW\*(C`xsave\*(C'\fR,
--\&\f(CW\*(C`xsaveopt\*(C'\fR,
--\&\f(CW\*(C`aes\*(C'\fR,
--\&\f(CW\*(C`pclmul\*(C'\fR,
--\&\f(CW\*(C`fsgsbase\*(C'\fR,
--\&\f(CW\*(C`rdrnd\*(C'\fR,
--\&\f(CW\*(C`f16c\*(C'\fR,
--\&\f(CW\*(C`bmi2\*(C'\fR,
--\&\f(CW\*(C`fma\*(C'\fR,
--\&\f(CW\*(C`movbe\*(C'\fR,
--\&\f(CW\*(C`ept\*(C'\fR,
--\&\f(CW\*(C`lzcnt\*(C'\fR,
--\&\f(CW\*(C`hle\*(C'\fR,
--\&\f(CW\*(C`rtm\*(C'\fR,
--\&\f(CW\*(C`invpcid\*(C'\fR,
--\&\f(CW\*(C`clflush\*(C'\fR,
--\&\f(CW\*(C`lwp\*(C'\fR,
--\&\f(CW\*(C`fma4\*(C'\fR,
--\&\f(CW\*(C`xop\*(C'\fR,
--\&\f(CW\*(C`cx16\*(C'\fR,
--\&\f(CW\*(C`syscall\*(C'\fR,
--\&\f(CW\*(C`rdtscp\*(C'\fR,
--\&\f(CW\*(C`3dnow\*(C'\fR,
--\&\f(CW\*(C`3dnowa\*(C'\fR,
--\&\f(CW\*(C`sse4a\*(C'\fR,
--\&\f(CW\*(C`sse5\*(C'\fR,
--\&\f(CW\*(C`svme\*(C'\fR,
--\&\f(CW\*(C`abm\*(C'\fR and
--\&\f(CW\*(C`padlock\*(C'\fR.
--Note that rather than extending a basic instruction set, the extension
--mnemonics starting with \f(CW\*(C`no\*(C'\fR revoke the respective functionality.
--.Sp
--When the \f(CW\*(C`.arch\*(C'\fR directive is used with \fB\-march\fR, the
--\&\f(CW\*(C`.arch\*(C'\fR directive will take precedent.
--.IP "\fB\-mtune=\fR\fI\s-1CPU\s0\fR" 4
--.IX Item "-mtune=CPU"
--This option specifies a processor to optimize for. When used in
--conjunction with the \fB\-march\fR option, only instructions
--of the processor specified by the \fB\-march\fR option will be
--generated.
--.Sp
--Valid \fI\s-1CPU\s0\fR values are identical to the processor list of
--\&\fB\-march=\fR\fI\s-1CPU\s0\fR.
--.IP "\fB\-msse2avx\fR" 4
--.IX Item "-msse2avx"
--This option specifies that the assembler should encode \s-1SSE\s0 instructions
--with \s-1VEX\s0 prefix.
--.IP "\fB\-msse\-check=\fR\fInone\fR" 4
--.IX Item "-msse-check=none"
--.PD 0
--.IP "\fB\-msse\-check=\fR\fIwarning\fR" 4
--.IX Item "-msse-check=warning"
--.IP "\fB\-msse\-check=\fR\fIerror\fR" 4
--.IX Item "-msse-check=error"
--.PD
--These options control if the assembler should check \s-1SSE\s0 instructions.
--\&\fB\-msse\-check=\fR\fInone\fR will make the assembler not to check \s-1SSE\s0
--instructions, which is the default. \fB\-msse\-check=\fR\fIwarning\fR
--will make the assembler issue a warning for any \s-1SSE\s0 instruction.
--\&\fB\-msse\-check=\fR\fIerror\fR will make the assembler issue an error
--for any \s-1SSE\s0 instruction.
--.IP "\fB\-mavxscalar=\fR\fI128\fR" 4
--.IX Item "-mavxscalar=128"
--.PD 0
--.IP "\fB\-mavxscalar=\fR\fI256\fR" 4
--.IX Item "-mavxscalar=256"
--.PD
--These options control how the assembler should encode scalar \s-1AVX\s0
--instructions. \fB\-mavxscalar=\fR\fI128\fR will encode scalar
--\&\s-1AVX\s0 instructions with 128bit vector length, which is the default.
--\&\fB\-mavxscalar=\fR\fI256\fR will encode scalar \s-1AVX\s0 instructions
--with 256bit vector length.
--.IP "\fB\-mevexlig=\fR\fI128\fR" 4
--.IX Item "-mevexlig=128"
--.PD 0
--.IP "\fB\-mevexlig=\fR\fI256\fR" 4
--.IX Item "-mevexlig=256"
--.IP "\fB\-mevexlig=\fR\fI512\fR" 4
--.IX Item "-mevexlig=512"
--.PD
--These options control how the assembler should encode length-ignored
--(\s-1LIG\s0) \s-1EVEX\s0 instructions. \fB\-mevexlig=\fR\fI128\fR will encode \s-1LIG\s0
--\&\s-1EVEX\s0 instructions with 128bit vector length, which is the default.
--\&\fB\-mevexlig=\fR\fI256\fR and \fB\-mevexlig=\fR\fI512\fR will
--encode \s-1LIG\s0 \s-1EVEX\s0 instructions with 256bit and 512bit vector length,
--respectively.
--.IP "\fB\-mevexwig=\fR\fI0\fR" 4
--.IX Item "-mevexwig=0"
--.PD 0
--.IP "\fB\-mevexwig=\fR\fI1\fR" 4
--.IX Item "-mevexwig=1"
--.PD
--These options control how the assembler should encode w\-ignored (\s-1WIG\s0)
--\&\s-1EVEX\s0 instructions. \fB\-mevexwig=\fR\fI0\fR will encode \s-1WIG\s0
--\&\s-1EVEX\s0 instructions with evex.w = 0, which is the default.
--\&\fB\-mevexwig=\fR\fI1\fR will encode \s-1WIG\s0 \s-1EVEX\s0 instructions with
--evex.w = 1.
--.IP "\fB\-mmnemonic=\fR\fIatt\fR" 4
--.IX Item "-mmnemonic=att"
--.PD 0
--.IP "\fB\-mmnemonic=\fR\fIintel\fR" 4
--.IX Item "-mmnemonic=intel"
--.PD
--This option specifies instruction mnemonic for matching instructions.
--The \f(CW\*(C`.att_mnemonic\*(C'\fR and \f(CW\*(C`.intel_mnemonic\*(C'\fR directives will
--take precedent.
--.IP "\fB\-msyntax=\fR\fIatt\fR" 4
--.IX Item "-msyntax=att"
--.PD 0
--.IP "\fB\-msyntax=\fR\fIintel\fR" 4
--.IX Item "-msyntax=intel"
--.PD
--This option specifies instruction syntax when processing instructions.
--The \f(CW\*(C`.att_syntax\*(C'\fR and \f(CW\*(C`.intel_syntax\*(C'\fR directives will
--take precedent.
--.IP "\fB\-mnaked\-reg\fR" 4
--.IX Item "-mnaked-reg"
--This opetion specifies that registers don't require a \fB%\fR prefix.
--The \f(CW\*(C`.att_syntax\*(C'\fR and \f(CW\*(C`.intel_syntax\*(C'\fR directives will take precedent.
--.IP "\fB\-madd\-bnd\-prefix\fR" 4
--.IX Item "-madd-bnd-prefix"
--This option forces the assembler to add \s-1BND\s0 prefix to all branches, even
--if such prefix was not explicitly specified in the source code.
--.PP
--The following options are available when as is configured for the
--Intel 80960 processor.
--.IP "\fB\-ACA | \-ACA_A | \-ACB | \-ACC | \-AKA | \-AKB | \-AKC | \-AMC\fR" 4
--.IX Item "-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC"
--Specify which variant of the 960 architecture is the target.
--.IP "\fB\-b\fR" 4
--.IX Item "-b"
--Add code to collect statistics about branches taken.
--.IP "\fB\-no\-relax\fR" 4
--.IX Item "-no-relax"
--Do not alter compare-and-branch instructions for long displacements;
--error if necessary.
--.PP
--The following options are available when as is configured for the
--Ubicom \s-1IP2K\s0 series.
--.IP "\fB\-mip2022ext\fR" 4
--.IX Item "-mip2022ext"
--Specifies that the extended \s-1IP2022\s0 instructions are allowed.
--.IP "\fB\-mip2022\fR" 4
--.IX Item "-mip2022"
--Restores the default behaviour, which restricts the permitted instructions to
--just the basic \s-1IP2022\s0 ones.
--.PP
--The following options are available when as is configured for the
--Renesas M32C and M16C processors.
--.IP "\fB\-m32c\fR" 4
--.IX Item "-m32c"
--Assemble M32C instructions.
--.IP "\fB\-m16c\fR" 4
--.IX Item "-m16c"
--Assemble M16C instructions (the default).
--.IP "\fB\-relax\fR" 4
--.IX Item "-relax"
--Enable support for link-time relaxations.
--.IP "\fB\-h\-tick\-hex\fR" 4
--.IX Item "-h-tick-hex"
--Support H'00 style hex constants in addition to 0x00 style.
--.PP
--The following options are available when as is configured for the
--Renesas M32R (formerly Mitsubishi M32R) series.
--.IP "\fB\-\-m32rx\fR" 4
--.IX Item "--m32rx"
--Specify which processor in the M32R family is the target. The default
--is normally the M32R, but this option changes it to the M32RX.
--.IP "\fB\-\-warn\-explicit\-parallel\-conflicts or \-\-Wp\fR" 4
--.IX Item "--warn-explicit-parallel-conflicts or --Wp"
--Produce warning messages when questionable parallel constructs are
--encountered.
--.IP "\fB\-\-no\-warn\-explicit\-parallel\-conflicts or \-\-Wnp\fR" 4
--.IX Item "--no-warn-explicit-parallel-conflicts or --Wnp"
--Do not produce warning messages when questionable parallel constructs are
--encountered.
--.PP
--The following options are available when as is configured for the
--Motorola 68000 series.
--.IP "\fB\-l\fR" 4
--.IX Item "-l"
--Shorten references to undefined symbols, to one word instead of two.
--.IP "\fB\-m68000 | \-m68008 | \-m68010 | \-m68020 | \-m68030\fR" 4
--.IX Item "-m68000 | -m68008 | -m68010 | -m68020 | -m68030"
--.PD 0
--.IP "\fB| \-m68040 | \-m68060 | \-m68302 | \-m68331 | \-m68332\fR" 4
--.IX Item "| -m68040 | -m68060 | -m68302 | -m68331 | -m68332"
--.IP "\fB| \-m68333 | \-m68340 | \-mcpu32 | \-m5200\fR" 4
--.IX Item "| -m68333 | -m68340 | -mcpu32 | -m5200"
--.PD
--Specify what processor in the 68000 family is the target. The default
--is normally the 68020, but this can be changed at configuration time.
--.IP "\fB\-m68881 | \-m68882 | \-mno\-68881 | \-mno\-68882\fR" 4
--.IX Item "-m68881 | -m68882 | -mno-68881 | -mno-68882"
--The target machine does (or does not) have a floating-point coprocessor.
--The default is to assume a coprocessor for 68020, 68030, and cpu32. Although
--the basic 68000 is not compatible with the 68881, a combination of the
--two can be specified, since it's possible to do emulation of the
--coprocessor instructions with the main processor.
--.IP "\fB\-m68851 | \-mno\-68851\fR" 4
--.IX Item "-m68851 | -mno-68851"
--The target machine does (or does not) have a memory-management
--unit coprocessor. The default is to assume an \s-1MMU\s0 for 68020 and up.
--.PP
--The following options are available when as is configured for an
--Altera Nios \s-1II\s0 processor.
--.IP "\fB\-relax\-section\fR" 4
--.IX Item "-relax-section"
--Replace identified out-of-range branches with PC-relative \f(CW\*(C`jmp\*(C'\fR
--sequences when possible. The generated code sequences are suitable
--for use in position-independent code, but there is a practical limit
--on the extended branch range because of the length of the sequences.
--This option is the default.
--.IP "\fB\-relax\-all\fR" 4
--.IX Item "-relax-all"
--Replace branch instructions not determinable to be in range
--and all call instructions with \f(CW\*(C`jmp\*(C'\fR and \f(CW\*(C`callr\*(C'\fR sequences
--(respectively). This option generates absolute relocations against the
--target symbols and is not appropriate for position-independent code.
--.IP "\fB\-no\-relax\fR" 4
--.IX Item "-no-relax"
--Do not replace any branches or calls.
--.IP "\fB\-EB\fR" 4
--.IX Item "-EB"
--Generate big-endian output.
--.IP "\fB\-EL\fR" 4
--.IX Item "-EL"
--Generate little-endian output. This is the default.
--.PP
--The following options are available when as is configured for a
--Meta processor.
--.ie n .IP """\-mcpu=metac11""" 4
--.el .IP "\f(CW\-mcpu=metac11\fR" 4
--.IX Item "-mcpu=metac11"
--Generate code for Meta 1.1.
--.ie n .IP """\-mcpu=metac12""" 4
--.el .IP "\f(CW\-mcpu=metac12\fR" 4
--.IX Item "-mcpu=metac12"
--Generate code for Meta 1.2.
--.ie n .IP """\-mcpu=metac21""" 4
--.el .IP "\f(CW\-mcpu=metac21\fR" 4
--.IX Item "-mcpu=metac21"
--Generate code for Meta 2.1.
--.ie n .IP """\-mfpu=metac21""" 4
--.el .IP "\f(CW\-mfpu=metac21\fR" 4
--.IX Item "-mfpu=metac21"
--Allow code to use \s-1FPU\s0 hardware of Meta 2.1.
--.PP
--See the info pages for documentation of the MMIX-specific options.
--.PP
--The following options are available when as is configured for a
--PowerPC processor.
--.IP "\fB\-a32\fR" 4
--.IX Item "-a32"
--Generate \s-1ELF32\s0 or \s-1XCOFF32\s0.
--.IP "\fB\-a64\fR" 4
--.IX Item "-a64"
--Generate \s-1ELF64\s0 or \s-1XCOFF64\s0.
--.IP "\fB\-K \s-1PIC\s0\fR" 4
--.IX Item "-K PIC"
--Set \s-1EF_PPC_RELOCATABLE_LIB\s0 in \s-1ELF\s0 flags.
--.IP "\fB\-mpwrx | \-mpwr2\fR" 4
--.IX Item "-mpwrx | -mpwr2"
--Generate code for \s-1POWER/2\s0 (\s-1RIOS2\s0).
--.IP "\fB\-mpwr\fR" 4
--.IX Item "-mpwr"
--Generate code for \s-1POWER\s0 (\s-1RIOS1\s0)
--.IP "\fB\-m601\fR" 4
--.IX Item "-m601"
--Generate code for PowerPC 601.
--.IP "\fB\-mppc, \-mppc32, \-m603, \-m604\fR" 4
--.IX Item "-mppc, -mppc32, -m603, -m604"
--Generate code for PowerPC 603/604.
--.IP "\fB\-m403, \-m405\fR" 4
--.IX Item "-m403, -m405"
--Generate code for PowerPC 403/405.
--.IP "\fB\-m440\fR" 4
--.IX Item "-m440"
--Generate code for PowerPC 440. BookE and some 405 instructions.
--.IP "\fB\-m464\fR" 4
--.IX Item "-m464"
--Generate code for PowerPC 464.
--.IP "\fB\-m476\fR" 4
--.IX Item "-m476"
--Generate code for PowerPC 476.
--.IP "\fB\-m7400, \-m7410, \-m7450, \-m7455\fR" 4
--.IX Item "-m7400, -m7410, -m7450, -m7455"
--Generate code for PowerPC 7400/7410/7450/7455.
--.IP "\fB\-m750cl\fR" 4
--.IX Item "-m750cl"
--Generate code for PowerPC 750CL.
--.IP "\fB\-mppc64, \-m620\fR" 4
--.IX Item "-mppc64, -m620"
--Generate code for PowerPC 620/625/630.
--.IP "\fB\-me500, \-me500x2\fR" 4
--.IX Item "-me500, -me500x2"
--Generate code for Motorola e500 core complex.
--.IP "\fB\-me500mc\fR" 4
--.IX Item "-me500mc"
--Generate code for Freescale e500mc core complex.
--.IP "\fB\-me500mc64\fR" 4
--.IX Item "-me500mc64"
--Generate code for Freescale e500mc64 core complex.
--.IP "\fB\-me5500\fR" 4
--.IX Item "-me5500"
--Generate code for Freescale e5500 core complex.
--.IP "\fB\-me6500\fR" 4
--.IX Item "-me6500"
--Generate code for Freescale e6500 core complex.
--.IP "\fB\-mspe\fR" 4
--.IX Item "-mspe"
--Generate code for Motorola \s-1SPE\s0 instructions.
--.IP "\fB\-mtitan\fR" 4
--.IX Item "-mtitan"
--Generate code for AppliedMicro Titan core complex.
--.IP "\fB\-mppc64bridge\fR" 4
--.IX Item "-mppc64bridge"
--Generate code for PowerPC 64, including bridge insns.
--.IP "\fB\-mbooke\fR" 4
--.IX Item "-mbooke"
--Generate code for 32\-bit BookE.
--.IP "\fB\-ma2\fR" 4
--.IX Item "-ma2"
--Generate code for A2 architecture.
--.IP "\fB\-me300\fR" 4
--.IX Item "-me300"
--Generate code for PowerPC e300 family.
--.IP "\fB\-maltivec\fR" 4
--.IX Item "-maltivec"
--Generate code for processors with AltiVec instructions.
--.IP "\fB\-mvle\fR" 4
--.IX Item "-mvle"
--Generate code for Freescale PowerPC \s-1VLE\s0 instructions.
--.IP "\fB\-mvsx\fR" 4
--.IX Item "-mvsx"
--Generate code for processors with Vector-Scalar (\s-1VSX\s0) instructions.
--.IP "\fB\-mhtm\fR" 4
--.IX Item "-mhtm"
--Generate code for processors with Hardware Transactional Memory instructions.
--.IP "\fB\-mpower4, \-mpwr4\fR" 4
--.IX Item "-mpower4, -mpwr4"
--Generate code for Power4 architecture.
--.IP "\fB\-mpower5, \-mpwr5, \-mpwr5x\fR" 4
--.IX Item "-mpower5, -mpwr5, -mpwr5x"
--Generate code for Power5 architecture.
--.IP "\fB\-mpower6, \-mpwr6\fR" 4
--.IX Item "-mpower6, -mpwr6"
--Generate code for Power6 architecture.
--.IP "\fB\-mpower7, \-mpwr7\fR" 4
--.IX Item "-mpower7, -mpwr7"
--Generate code for Power7 architecture.
--.IP "\fB\-mpower8, \-mpwr8\fR" 4
--.IX Item "-mpower8, -mpwr8"
--Generate code for Power8 architecture.
--.IP "\fB\-mcell\fR" 4
--.IX Item "-mcell"
--.PD 0
--.IP "\fB\-mcell\fR" 4
--.IX Item "-mcell"
--.PD
--Generate code for Cell Broadband Engine architecture.
--.IP "\fB\-mcom\fR" 4
--.IX Item "-mcom"
--Generate code Power/PowerPC common instructions.
--.IP "\fB\-many\fR" 4
--.IX Item "-many"
--Generate code for any architecture (\s-1PWR/PWRX/PPC\s0).
--.IP "\fB\-mregnames\fR" 4
--.IX Item "-mregnames"
--Allow symbolic names for registers.
--.IP "\fB\-mno\-regnames\fR" 4
--.IX Item "-mno-regnames"
--Do not allow symbolic names for registers.
--.IP "\fB\-mrelocatable\fR" 4
--.IX Item "-mrelocatable"
--Support for \s-1GCC\s0's \-mrelocatable option.
--.IP "\fB\-mrelocatable\-lib\fR" 4
--.IX Item "-mrelocatable-lib"
--Support for \s-1GCC\s0's \-mrelocatable\-lib option.
--.IP "\fB\-memb\fR" 4
--.IX Item "-memb"
--Set \s-1PPC_EMB\s0 bit in \s-1ELF\s0 flags.
--.IP "\fB\-mlittle, \-mlittle\-endian, \-le\fR" 4
--.IX Item "-mlittle, -mlittle-endian, -le"
--Generate code for a little endian machine.
--.IP "\fB\-mbig, \-mbig\-endian, \-be\fR" 4
--.IX Item "-mbig, -mbig-endian, -be"
--Generate code for a big endian machine.
--.IP "\fB\-msolaris\fR" 4
--.IX Item "-msolaris"
--Generate code for Solaris.
--.IP "\fB\-mno\-solaris\fR" 4
--.IX Item "-mno-solaris"
--Do not generate code for Solaris.
--.IP "\fB\-nops=\fR\fIcount\fR" 4
--.IX Item "-nops=count"
--If an alignment directive inserts more than \fIcount\fR nops, put a
--branch at the beginning to skip execution of the nops.
--.PP
--See the info pages for documentation of the RX-specific options.
--.PP
--The following options are available when as is configured for the s390
--processor family.
--.IP "\fB\-m31\fR" 4
--.IX Item "-m31"
--.PD 0
--.IP "\fB\-m64\fR" 4
--.IX Item "-m64"
--.PD
--Select the word size, either 31/32 bits or 64 bits.
--.IP "\fB\-mesa\fR" 4
--.IX Item "-mesa"
--.PD 0
--.IP "\fB\-mzarch\fR" 4
--.IX Item "-mzarch"
--.PD
--Select the architecture mode, either the Enterprise System
--Architecture (esa) or the z/Architecture mode (zarch).
--.IP "\fB\-march=\fR\fIprocessor\fR" 4
--.IX Item "-march=processor"
--Specify which s390 processor variant is the target, \fBg6\fR, \fBg6\fR,
--\&\fBz900\fR, \fBz990\fR, \fBz9\-109\fR, \fBz9\-ec\fR, \fBz10\fR,
--\&\fBz196\fR, or \fBzEC12\fR.
--.IP "\fB\-mregnames\fR" 4
--.IX Item "-mregnames"
--.PD 0
--.IP "\fB\-mno\-regnames\fR" 4
--.IX Item "-mno-regnames"
--.PD
--Allow or disallow symbolic names for registers.
--.IP "\fB\-mwarn\-areg\-zero\fR" 4
--.IX Item "-mwarn-areg-zero"
--Warn whenever the operand for a base or index register has been specified
--but evaluates to zero.
--.PP
--The following options are available when as is configured for a
--\&\s-1TMS320C6000\s0 processor.
--.IP "\fB\-march=\fR\fIarch\fR" 4
--.IX Item "-march=arch"
--Enable (only) instructions from architecture \fIarch\fR. By default,
--all instructions are permitted.
--.Sp
--The following values of \fIarch\fR are accepted: \f(CW\*(C`c62x\*(C'\fR,
--\&\f(CW\*(C`c64x\*(C'\fR, \f(CW\*(C`c64x+\*(C'\fR, \f(CW\*(C`c67x\*(C'\fR, \f(CW\*(C`c67x+\*(C'\fR, \f(CW\*(C`c674x\*(C'\fR.
--.IP "\fB\-mdsbt\fR" 4
--.IX Item "-mdsbt"
--.PD 0
--.IP "\fB\-mno\-dsbt\fR" 4
--.IX Item "-mno-dsbt"
--.PD
--The \fB\-mdsbt\fR option causes the assembler to generate the
--\&\f(CW\*(C`Tag_ABI_DSBT\*(C'\fR attribute with a value of 1, indicating that the
--code is using \s-1DSBT\s0 addressing. The \fB\-mno\-dsbt\fR option, the
--default, causes the tag to have a value of 0, indicating that the code
--does not use \s-1DSBT\s0 addressing. The linker will emit a warning if
--objects of different type (\s-1DSBT\s0 and non-DSBT) are linked together.
--.IP "\fB\-mpid=no\fR" 4
--.IX Item "-mpid=no"
--.PD 0
--.IP "\fB\-mpid=near\fR" 4
--.IX Item "-mpid=near"
--.IP "\fB\-mpid=far\fR" 4
--.IX Item "-mpid=far"
--.PD
--The \fB\-mpid=\fR option causes the assembler to generate the
--\&\f(CW\*(C`Tag_ABI_PID\*(C'\fR attribute with a value indicating the form of data
--addressing used by the code. \fB\-mpid=no\fR, the default,
--indicates position-dependent data addressing, \fB\-mpid=near\fR
--indicates position-independent addressing with \s-1GOT\s0 accesses using near
--\&\s-1DP\s0 addressing, and \fB\-mpid=far\fR indicates position-independent
--addressing with \s-1GOT\s0 accesses using far \s-1DP\s0 addressing. The linker will
--emit a warning if objects built with different settings of this option
--are linked together.
--.IP "\fB\-mpic\fR" 4
--.IX Item "-mpic"
--.PD 0
--.IP "\fB\-mno\-pic\fR" 4
--.IX Item "-mno-pic"
--.PD
--The \fB\-mpic\fR option causes the assembler to generate the
--\&\f(CW\*(C`Tag_ABI_PIC\*(C'\fR attribute with a value of 1, indicating that the
--code is using position-independent code addressing, The
--\&\f(CW\*(C`\-mno\-pic\*(C'\fR option, the default, causes the tag to have a value of
--0, indicating position-dependent code addressing. The linker will
--emit a warning if objects of different type (position-dependent and
--position-independent) are linked together.
--.IP "\fB\-mbig\-endian\fR" 4
--.IX Item "-mbig-endian"
--.PD 0
--.IP "\fB\-mlittle\-endian\fR" 4
--.IX Item "-mlittle-endian"
--.PD
--Generate code for the specified endianness. The default is
--little-endian.
--.PP
--The following options are available when as is configured for a TILE-Gx
--processor.
--.IP "\fB\-m32 | \-m64\fR" 4
--.IX Item "-m32 | -m64"
--Select the word size, either 32 bits or 64 bits.
--.IP "\fB\-EB | \-EL\fR" 4
--.IX Item "-EB | -EL"
--Select the endianness, either big-endian (\-EB) or little-endian (\-EL).
--.PP
--The following options are available when as is configured for an
--Xtensa processor.
--.IP "\fB\-\-text\-section\-literals | \-\-no\-text\-section\-literals\fR" 4
--.IX Item "--text-section-literals | --no-text-section-literals"
--Control the treatment of literal pools. The default is
--\&\fB\-\-no\-text\-section\-literals\fR, which places literals in
--separate sections in the output file. This allows the literal pool to be
--placed in a data \s-1RAM/ROM\s0. With \fB\-\-text\-section\-literals\fR, the
--literals are interspersed in the text section in order to keep them as
--close as possible to their references. This may be necessary for large
--assembly files, where the literals would otherwise be out of range of the
--\&\f(CW\*(C`L32R\*(C'\fR instructions in the text section. These options only affect
--literals referenced via PC-relative \f(CW\*(C`L32R\*(C'\fR instructions; literals
--for absolute mode \f(CW\*(C`L32R\*(C'\fR instructions are handled separately.
--.IP "\fB\-\-absolute\-literals | \-\-no\-absolute\-literals\fR" 4
--.IX Item "--absolute-literals | --no-absolute-literals"
--Indicate to the assembler whether \f(CW\*(C`L32R\*(C'\fR instructions use absolute
--or PC-relative addressing. If the processor includes the absolute
--addressing option, the default is to use absolute \f(CW\*(C`L32R\*(C'\fR
--relocations. Otherwise, only the PC-relative \f(CW\*(C`L32R\*(C'\fR relocations
--can be used.
--.IP "\fB\-\-target\-align | \-\-no\-target\-align\fR" 4
--.IX Item "--target-align | --no-target-align"
--Enable or disable automatic alignment to reduce branch penalties at some
--expense in code size. This optimization is enabled by default. Note
--that the assembler will always align instructions like \f(CW\*(C`LOOP\*(C'\fR that
--have fixed alignment requirements.
--.IP "\fB\-\-longcalls | \-\-no\-longcalls\fR" 4
--.IX Item "--longcalls | --no-longcalls"
--Enable or disable transformation of call instructions to allow calls
--across a greater range of addresses. This option should be used when call
--targets can potentially be out of range. It may degrade both code size
--and performance, but the linker can generally optimize away the
--unnecessary overhead when a call ends up within range. The default is
--\&\fB\-\-no\-longcalls\fR.
--.IP "\fB\-\-transform | \-\-no\-transform\fR" 4
--.IX Item "--transform | --no-transform"
--Enable or disable all assembler transformations of Xtensa instructions,
--including both relaxation and optimization. The default is
--\&\fB\-\-transform\fR; \fB\-\-no\-transform\fR should only be used in the
--rare cases when the instructions must be exactly as specified in the
--assembly source. Using \fB\-\-no\-transform\fR causes out of range
--instruction operands to be errors.
--.IP "\fB\-\-rename\-section\fR \fIoldname\fR\fB=\fR\fInewname\fR" 4
--.IX Item "--rename-section oldname=newname"
--Rename the \fIoldname\fR section to \fInewname\fR. This option can be used
--multiple times to rename multiple sections.
--.PP
--The following options are available when as is configured for
--a Z80 family processor.
--.IP "\fB\-z80\fR" 4
--.IX Item "-z80"
--Assemble for Z80 processor.
--.IP "\fB\-r800\fR" 4
--.IX Item "-r800"
--Assemble for R800 processor.
--.IP "\fB\-ignore\-undocumented\-instructions\fR" 4
--.IX Item "-ignore-undocumented-instructions"
--.PD 0
--.IP "\fB\-Wnud\fR" 4
--.IX Item "-Wnud"
--.PD
--Assemble undocumented Z80 instructions that also work on R800 without warning.
--.IP "\fB\-ignore\-unportable\-instructions\fR" 4
--.IX Item "-ignore-unportable-instructions"
--.PD 0
--.IP "\fB\-Wnup\fR" 4
--.IX Item "-Wnup"
--.PD
--Assemble all undocumented Z80 instructions without warning.
--.IP "\fB\-warn\-undocumented\-instructions\fR" 4
--.IX Item "-warn-undocumented-instructions"
--.PD 0
--.IP "\fB\-Wud\fR" 4
--.IX Item "-Wud"
--.PD
--Issue a warning for undocumented Z80 instructions that also work on R800.
--.IP "\fB\-warn\-unportable\-instructions\fR" 4
--.IX Item "-warn-unportable-instructions"
--.PD 0
--.IP "\fB\-Wup\fR" 4
--.IX Item "-Wup"
--.PD
--Issue a warning for undocumented Z80 instructions that do not work on R800.
--.IP "\fB\-forbid\-undocumented\-instructions\fR" 4
--.IX Item "-forbid-undocumented-instructions"
--.PD 0
--.IP "\fB\-Fud\fR" 4
--.IX Item "-Fud"
--.PD
--Treat all undocumented instructions as errors.
--.IP "\fB\-forbid\-unportable\-instructions\fR" 4
--.IX Item "-forbid-unportable-instructions"
--.PD 0
--.IP "\fB\-Fup\fR" 4
--.IX Item "-Fup"
--.PD
--Treat undocumented Z80 instructions that do not work on R800 as errors.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--\&\fIgcc\fR\|(1), \fIld\fR\|(1), and the Info entries for \fIbinutils\fR and \fIld\fR.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1991\-2013 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/gas/doc/asconfig.texi binutils-2.24/gas/doc/asconfig.texi
---- binutils-2.24.orig/gas/doc/asconfig.texi 2013-11-18 09:49:28.000000000 +0100
-+++ binutils-2.24/gas/doc/asconfig.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,107 +0,0 @@
--@c Copyright 1992, 1993, 1994, 1996, 1997, 1999, 2000, 2001, 2002,
--@c 2003, 2005, 2006, 2007, 2008, 2009, 2010, 2011
--@c Free Software Foundation, Inc.
--@c This file is part of the documentation for the GAS manual
--
--@c Configuration settings for all-inclusive version of manual
--
--@c switches:------------------------------------------------------------
--@c Properties of the manual
--@c ========================
--@c Discuss all architectures?
--@set ALL-ARCH
--@c A generic form of manual (not tailored to specific target)?
--@set GENERIC
--@c Include text on assembler internals?
--@clear INTERNALS
--@c Many object formats supported in this config?
--@set MULTI-OBJ
--
--@c Object formats of interest
--@c ==========================
--@set AOUT
--@set COFF
--@set ELF
--@set SOM
--
--@c CPUs of interest
--@c ================
--@set AARCH64
--@set ALPHA
--@set ARC
--@set ARM
--@set AVR
--@set Blackfin
--@set CR16
--@set CRIS
--@set D10V
--@set D30V
--@set EPIPHANY
--@set H8/300
--@set HPPA
--@set I370
--@set I80386
--@set I860
--@set I960
--@set IA64
--@set IP2K
--@set LM32
--@set M32C
--@set M32R
--@set xc16x
--@set M68HC11
--@set M680X0
--@set MCORE
--@set METAG
--@set MICROBLAZE
--@set MIPS
--@set MMIX
--@set MS1
--@set MSP430
--@set NIOSII
--@set NS32K
--@set PDP11
--@set PJ
--@set PPC
--@set RL78
--@set RX
--@set S390
--@set SCORE
--@set SH
--@set SPARC
--@set TIC54X
--@set TIC6X
--@set TILEGX
--@set TILEPRO
--@set V850
--@set VAX
--@set XGATE
--@set XSTORMY16
--@set XTENSA
--@set Z80
--@set Z8000
--
--@c Does this version of the assembler use the difference-table kludge?
--@set DIFF-TBL-KLUGE
--
--@c Do all machines described use IEEE floating point?
--@clear IEEEFLOAT
--
--@c Is a word 32 bits, or 16?
--@clear W32
--@set W16
--
--@c Do symbols have different characters than usual?
--@clear SPECIAL-SYMS
--
--@c strings:------------------------------------------------------------
--@c Name of the assembler:
--@set AS as
--@c Name of C compiler:
--@set GCC gcc
--@c Name of linker:
--@set LD ld
--@c Text for target machine (best not used in generic case; but just in case...)
--@set TARGET machine specific
--@c Name of object format NOT SET in generic version
--@clear OBJ-NAME
-diff -Nur binutils-2.24.orig/gas/doc/as.info binutils-2.24/gas/doc/as.info
---- binutils-2.24.orig/gas/doc/as.info 2013-11-26 12:41:43.000000000 +0100
-+++ binutils-2.24/gas/doc/as.info 1970-01-01 01:00:00.000000000 +0100
-@@ -1,25878 +0,0 @@
--This is as.info, produced by makeinfo version 4.8 from as.texinfo.
--
--INFO-DIR-SECTION Software development
--START-INFO-DIR-ENTRY
--* As: (as). The GNU assembler.
--* Gas: (as). The GNU assembler.
--END-INFO-DIR-ENTRY
--
-- This file documents the GNU Assembler "as".
--
-- Copyright (C) 1991-2013 Free Software Foundation, Inc.
--
-- Permission is granted to copy, distribute and/or modify this document
--under the terms of the GNU Free Documentation License, Version 1.3 or
--any later version published by the Free Software Foundation; with no
--Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
--Texts. A copy of the license is included in the section entitled "GNU
--Free Documentation License".
--
--
--File: as.info, Node: Top, Next: Overview, Up: (dir)
--
--Using as
--********
--
--This file is a user guide to the GNU assembler `as' (GNU Binutils)
--version 2.23.91.
--
-- This document is distributed under the terms of the GNU Free
--Documentation License. A copy of the license is included in the
--section entitled "GNU Free Documentation License".
--
--* Menu:
--
--* Overview:: Overview
--* Invoking:: Command-Line Options
--* Syntax:: Syntax
--* Sections:: Sections and Relocation
--* Symbols:: Symbols
--* Expressions:: Expressions
--* Pseudo Ops:: Assembler Directives
--
--* Object Attributes:: Object Attributes
--* Machine Dependencies:: Machine Dependent Features
--* Reporting Bugs:: Reporting Bugs
--* Acknowledgements:: Who Did What
--* GNU Free Documentation License:: GNU Free Documentation License
--* AS Index:: AS Index
--
--
--File: as.info, Node: Overview, Next: Invoking, Prev: Top, Up: Top
--
--1 Overview
--**********
--
--Here is a brief summary of how to invoke `as'. For details, see *Note
--Command-Line Options: Invoking.
--
-- as [-a[cdghlns][=FILE]] [-alternate] [-D]
-- [-compress-debug-sections] [-nocompress-debug-sections]
-- [-debug-prefix-map OLD=NEW]
-- [-defsym SYM=VAL] [-f] [-g] [-gstabs]
-- [-gstabs+] [-gdwarf-2] [-gdwarf-sections]
-- [-help] [-I DIR] [-J]
-- [-K] [-L] [-listing-lhs-width=NUM]
-- [-listing-lhs-width2=NUM] [-listing-rhs-width=NUM]
-- [-listing-cont-lines=NUM] [-keep-locals] [-o
-- OBJFILE] [-R] [-reduce-memory-overheads] [-statistics]
-- [-v] [-version] [-version] [-W] [-warn]
-- [-fatal-warnings] [-w] [-x] [-Z] [@FILE]
-- [-size-check=[error|warning]]
-- [-target-help] [TARGET-OPTIONS]
-- [-|FILES ...]
--
-- _Target AArch64 options:_
-- [-EB|-EL]
-- [-mabi=ABI]
--
-- _Target Alpha options:_
-- [-mCPU]
-- [-mdebug | -no-mdebug]
-- [-replace | -noreplace]
-- [-relax] [-g] [-GSIZE]
-- [-F] [-32addr]
--
-- _Target ARC options:_
-- [-marc[5|6|7|8]]
-- [-EB|-EL]
--
-- _Target ARM options:_
-- [-mcpu=PROCESSOR[+EXTENSION...]]
-- [-march=ARCHITECTURE[+EXTENSION...]]
-- [-mfpu=FLOATING-POINT-FORMAT]
-- [-mfloat-abi=ABI]
-- [-meabi=VER]
-- [-mthumb]
-- [-EB|-EL]
-- [-mapcs-32|-mapcs-26|-mapcs-float|
-- -mapcs-reentrant]
-- [-mthumb-interwork] [-k]
--
-- _Target Blackfin options:_
-- [-mcpu=PROCESSOR[-SIREVISION]]
-- [-mfdpic]
-- [-mno-fdpic]
-- [-mnopic]
--
-- _Target CRIS options:_
-- [-underscore | -no-underscore]
-- [-pic] [-N]
-- [-emulation=criself | -emulation=crisaout]
-- [-march=v0_v10 | -march=v10 | -march=v32 | -march=common_v10_v32]
--
-- _Target D10V options:_
-- [-O]
--
-- _Target D30V options:_
-- [-O|-n|-N]
--
-- _Target EPIPHANY options:_
-- [-mepiphany|-mepiphany16]
--
-- _Target H8/300 options:_
-- [-h-tick-hex]
--
-- _Target i386 options:_
-- [-32|-x32|-64] [-n]
-- [-march=CPU[+EXTENSION...]] [-mtune=CPU]
--
-- _Target i960 options:_
-- [-ACA|-ACA_A|-ACB|-ACC|-AKA|-AKB|
-- -AKC|-AMC]
-- [-b] [-no-relax]
--
-- _Target IA-64 options:_
-- [-mconstant-gp|-mauto-pic]
-- [-milp32|-milp64|-mlp64|-mp64]
-- [-mle|mbe]
-- [-mtune=itanium1|-mtune=itanium2]
-- [-munwind-check=warning|-munwind-check=error]
-- [-mhint.b=ok|-mhint.b=warning|-mhint.b=error]
-- [-x|-xexplicit] [-xauto] [-xdebug]
--
-- _Target IP2K options:_
-- [-mip2022|-mip2022ext]
--
-- _Target M32C options:_
-- [-m32c|-m16c] [-relax] [-h-tick-hex]
--
-- _Target M32R options:_
-- [-m32rx|-[no-]warn-explicit-parallel-conflicts|
-- -W[n]p]
--
-- _Target M680X0 options:_
-- [-l] [-m68000|-m68010|-m68020|...]
--
-- _Target M68HC11 options:_
-- [-m68hc11|-m68hc12|-m68hcs12|-mm9s12x|-mm9s12xg]
-- [-mshort|-mlong]
-- [-mshort-double|-mlong-double]
-- [-force-long-branches] [-short-branches]
-- [-strict-direct-mode] [-print-insn-syntax]
-- [-print-opcodes] [-generate-example]
--
-- _Target MCORE options:_
-- [-jsri2bsr] [-sifilter] [-relax]
-- [-mcpu=[210|340]]
--
-- _Target Meta options:_
-- [-mcpu=CPU] [-mfpu=CPU] [-mdsp=CPU]
-- _Target MICROBLAZE options:_
--
-- _Target MIPS options:_
-- [-nocpp] [-EL] [-EB] [-O[OPTIMIZATION LEVEL]]
-- [-g[DEBUG LEVEL]] [-G NUM] [-KPIC] [-call_shared]
-- [-non_shared] [-xgot [-mvxworks-pic]
-- [-mabi=ABI] [-32] [-n32] [-64] [-mfp32] [-mgp32]
-- [-march=CPU] [-mtune=CPU] [-mips1] [-mips2]
-- [-mips3] [-mips4] [-mips5] [-mips32] [-mips32r2]
-- [-mips64] [-mips64r2]
-- [-construct-floats] [-no-construct-floats]
-- [-mnan=ENCODING]
-- [-trap] [-no-break] [-break] [-no-trap]
-- [-mips16] [-no-mips16]
-- [-mmicromips] [-mno-micromips]
-- [-msmartmips] [-mno-smartmips]
-- [-mips3d] [-no-mips3d]
-- [-mdmx] [-no-mdmx]
-- [-mdsp] [-mno-dsp]
-- [-mdspr2] [-mno-dspr2]
-- [-mmt] [-mno-mt]
-- [-mmcu] [-mno-mcu]
-- [-minsn32] [-mno-insn32]
-- [-mfix7000] [-mno-fix7000]
-- [-mfix-vr4120] [-mno-fix-vr4120]
-- [-mfix-vr4130] [-mno-fix-vr4130]
-- [-mdebug] [-no-mdebug]
-- [-mpdr] [-mno-pdr]
--
-- _Target MMIX options:_
-- [-fixed-special-register-names] [-globalize-symbols]
-- [-gnu-syntax] [-relax] [-no-predefined-symbols]
-- [-no-expand] [-no-merge-gregs] [-x]
-- [-linker-allocated-gregs]
--
-- _Target Nios II options:_
-- [-relax-all] [-relax-section] [-no-relax]
-- [-EB] [-EL]
--
-- _Target PDP11 options:_
-- [-mpic|-mno-pic] [-mall] [-mno-extensions]
-- [-mEXTENSION|-mno-EXTENSION]
-- [-mCPU] [-mMACHINE]
--
-- _Target picoJava options:_
-- [-mb|-me]
--
-- _Target PowerPC options:_
-- [-a32|-a64]
-- [-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604|-m403|-m405|
-- -m440|-m464|-m476|-m7400|-m7410|-m7450|-m7455|-m750cl|-mppc64|
-- -m620|-me500|-e500x2|-me500mc|-me500mc64|-me5500|-me6500|-mppc64bridge|
-- -mbooke|-mpower4|-mpwr4|-mpower5|-mpwr5|-mpwr5x|-mpower6|-mpwr6|
-- -mpower7|-mpwr7|-mpower8|-mpwr8|-ma2|-mcell|-mspe|-mtitan|-me300|-mcom]
-- [-many] [-maltivec|-mvsx|-mhtm|-mvle]
-- [-mregnames|-mno-regnames]
-- [-mrelocatable|-mrelocatable-lib|-K PIC] [-memb]
-- [-mlittle|-mlittle-endian|-le|-mbig|-mbig-endian|-be]
-- [-msolaris|-mno-solaris]
-- [-nops=COUNT]
--
-- _Target RX options:_
-- [-mlittle-endian|-mbig-endian]
-- [-m32bit-doubles|-m64bit-doubles]
-- [-muse-conventional-section-names]
-- [-msmall-data-limit]
-- [-mpid]
-- [-mrelax]
-- [-mint-register=NUMBER]
-- [-mgcc-abi|-mrx-abi]
--
-- _Target s390 options:_
-- [-m31|-m64] [-mesa|-mzarch] [-march=CPU]
-- [-mregnames|-mno-regnames]
-- [-mwarn-areg-zero]
--
-- _Target SCORE options:_
-- [-EB][-EL][-FIXDD][-NWARN]
-- [-SCORE5][-SCORE5U][-SCORE7][-SCORE3]
-- [-march=score7][-march=score3]
-- [-USE_R1][-KPIC][-O0][-G NUM][-V]
--
-- _Target SPARC options:_
-- [-Av6|-Av7|-Av8|-Asparclet|-Asparclite
-- -Av8plus|-Av8plusa|-Av9|-Av9a]
-- [-xarch=v8plus|-xarch=v8plusa] [-bump]
-- [-32|-64]
--
-- _Target TIC54X options:_
-- [-mcpu=54[123589]|-mcpu=54[56]lp] [-mfar-mode|-mf]
-- [-merrors-to-file <FILENAME>|-me <FILENAME>]
--
--
-- _Target TIC6X options:_
-- [-march=ARCH] [-mbig-endian|-mlittle-endian]
-- [-mdsbt|-mno-dsbt] [-mpid=no|-mpid=near|-mpid=far]
-- [-mpic|-mno-pic]
--
-- _Target TILE-Gx options:_
-- [-m32|-m64][-EB][-EL]
--
--
-- _Target Xtensa options:_
-- [-[no-]text-section-literals] [-[no-]absolute-literals]
-- [-[no-]target-align] [-[no-]longcalls]
-- [-[no-]transform]
-- [-rename-section OLDNAME=NEWNAME]
--
--
-- _Target Z80 options:_
-- [-z80] [-r800]
-- [ -ignore-undocumented-instructions] [-Wnud]
-- [ -ignore-unportable-instructions] [-Wnup]
-- [ -warn-undocumented-instructions] [-Wud]
-- [ -warn-unportable-instructions] [-Wup]
-- [ -forbid-undocumented-instructions] [-Fud]
-- [ -forbid-unportable-instructions] [-Fup]
--
--`@FILE'
-- Read command-line options from FILE. The options read are
-- inserted in place of the original @FILE option. If FILE does not
-- exist, or cannot be read, then the option will be treated
-- literally, and not removed.
--
-- Options in FILE are separated by whitespace. A whitespace
-- character may be included in an option by surrounding the entire
-- option in either single or double quotes. Any character
-- (including a backslash) may be included by prefixing the character
-- to be included with a backslash. The FILE may itself contain
-- additional @FILE options; any such options will be processed
-- recursively.
--
--`-a[cdghlmns]'
-- Turn on listings, in any of a variety of ways:
--
-- `-ac'
-- omit false conditionals
--
-- `-ad'
-- omit debugging directives
--
-- `-ag'
-- include general information, like as version and options
-- passed
--
-- `-ah'
-- include high-level source
--
-- `-al'
-- include assembly
--
-- `-am'
-- include macro expansions
--
-- `-an'
-- omit forms processing
--
-- `-as'
-- include symbols
--
-- `=file'
-- set the name of the listing file
--
-- You may combine these options; for example, use `-aln' for assembly
-- listing without forms processing. The `=file' option, if used,
-- must be the last one. By itself, `-a' defaults to `-ahls'.
--
--`--alternate'
-- Begin in alternate macro mode. *Note `.altmacro': Altmacro.
--
--`--compress-debug-sections'
-- Compress DWARF debug sections using zlib. The debug sections are
-- renamed to begin with `.zdebug', and the resulting object file may
-- not be compatible with older linkers and object file utilities.
--
--`--nocompress-debug-sections'
-- Do not compress DWARF debug sections. This is the default.
--
--`-D'
-- Ignored. This option is accepted for script compatibility with
-- calls to other assemblers.
--
--`--debug-prefix-map OLD=NEW'
-- When assembling files in directory `OLD', record debugging
-- information describing them as in `NEW' instead.
--
--`--defsym SYM=VALUE'
-- Define the symbol SYM to be VALUE before assembling the input file.
-- VALUE must be an integer constant. As in C, a leading `0x'
-- indicates a hexadecimal value, and a leading `0' indicates an octal
-- value. The value of the symbol can be overridden inside a source
-- file via the use of a `.set' pseudo-op.
--
--`-f'
-- "fast"--skip whitespace and comment preprocessing (assume source is
-- compiler output).
--
--`-g'
--`--gen-debug'
-- Generate debugging information for each assembler source line
-- using whichever debug format is preferred by the target. This
-- currently means either STABS, ECOFF or DWARF2.
--
--`--gstabs'
-- Generate stabs debugging information for each assembler line. This
-- may help debugging assembler code, if the debugger can handle it.
--
--`--gstabs+'
-- Generate stabs debugging information for each assembler line, with
-- GNU extensions that probably only gdb can handle, and that could
-- make other debuggers crash or refuse to read your program. This
-- may help debugging assembler code. Currently the only GNU
-- extension is the location of the current working directory at
-- assembling time.
--
--`--gdwarf-2'
-- Generate DWARF2 debugging information for each assembler line.
-- This may help debugging assembler code, if the debugger can handle
-- it. Note--this option is only supported by some targets, not all
-- of them.
--
--`--gdwarf-sections'
-- Instead of creating a .debug_line section, create a series of
-- .debug_line.FOO sections where FOO is the name of the
-- corresponding code section. For example a code section called
-- .TEXT.FUNC will have its dwarf line number information placed into
-- a section called .DEBUG_LINE.TEXT.FUNC. If the code section is
-- just called .TEXT then debug line section will still be called
-- just .DEBUG_LINE without any suffix.
--
--`--size-check=error'
--`--size-check=warning'
-- Issue an error or warning for invalid ELF .size directive.
--
--`--help'
-- Print a summary of the command line options and exit.
--
--`--target-help'
-- Print a summary of all target specific options and exit.
--
--`-I DIR'
-- Add directory DIR to the search list for `.include' directives.
--
--`-J'
-- Don't warn about signed overflow.
--
--`-K'
-- Issue warnings when difference tables altered for long
-- displacements.
--
--`-L'
--`--keep-locals'
-- Keep (in the symbol table) local symbols. These symbols start with
-- system-specific local label prefixes, typically `.L' for ELF
-- systems or `L' for traditional a.out systems. *Note Symbol
-- Names::.
--
--`--listing-lhs-width=NUMBER'
-- Set the maximum width, in words, of the output data column for an
-- assembler listing to NUMBER.
--
--`--listing-lhs-width2=NUMBER'
-- Set the maximum width, in words, of the output data column for
-- continuation lines in an assembler listing to NUMBER.
--
--`--listing-rhs-width=NUMBER'
-- Set the maximum width of an input source line, as displayed in a
-- listing, to NUMBER bytes.
--
--`--listing-cont-lines=NUMBER'
-- Set the maximum number of lines printed in a listing for a single
-- line of input to NUMBER + 1.
--
--`-o OBJFILE'
-- Name the object-file output from `as' OBJFILE.
--
--`-R'
-- Fold the data section into the text section.
--
-- Set the default size of GAS's hash tables to a prime number close
-- to NUMBER. Increasing this value can reduce the length of time it
-- takes the assembler to perform its tasks, at the expense of
-- increasing the assembler's memory requirements. Similarly
-- reducing this value can reduce the memory requirements at the
-- expense of speed.
--
--`--reduce-memory-overheads'
-- This option reduces GAS's memory requirements, at the expense of
-- making the assembly processes slower. Currently this switch is a
-- synonym for `--hash-size=4051', but in the future it may have
-- other effects as well.
--
--`--statistics'
-- Print the maximum space (in bytes) and total time (in seconds)
-- used by assembly.
--
--`--strip-local-absolute'
-- Remove local absolute symbols from the outgoing symbol table.
--
--`-v'
--`-version'
-- Print the `as' version.
--
--`--version'
-- Print the `as' version and exit.
--
--`-W'
--`--no-warn'
-- Suppress warning messages.
--
--`--fatal-warnings'
-- Treat warnings as errors.
--
--`--warn'
-- Don't suppress warning messages or treat them as errors.
--
--`-w'
-- Ignored.
--
--`-x'
-- Ignored.
--
--`-Z'
-- Generate an object file even after errors.
--
--`-- | FILES ...'
-- Standard input, or source files to assemble.
--
--
-- *Note AArch64 Options::, for the options available when as is
--configured for the 64-bit mode of the ARM Architecture (AArch64).
--
-- *Note Alpha Options::, for the options available when as is
--configured for an Alpha processor.
--
-- The following options are available when as is configured for an ARC
--processor.
--
--`-marc[5|6|7|8]'
-- This option selects the core processor variant.
--
--`-EB | -EL'
-- Select either big-endian (-EB) or little-endian (-EL) output.
--
-- The following options are available when as is configured for the ARM
--processor family.
--
--`-mcpu=PROCESSOR[+EXTENSION...]'
-- Specify which ARM processor variant is the target.
--
--`-march=ARCHITECTURE[+EXTENSION...]'
-- Specify which ARM architecture variant is used by the target.
--
--`-mfpu=FLOATING-POINT-FORMAT'
-- Select which Floating Point architecture is the target.
--
--`-mfloat-abi=ABI'
-- Select which floating point ABI is in use.
--
--`-mthumb'
-- Enable Thumb only instruction decoding.
--
--`-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant'
-- Select which procedure calling convention is in use.
--
--`-EB | -EL'
-- Select either big-endian (-EB) or little-endian (-EL) output.
--
--`-mthumb-interwork'
-- Specify that the code has been generated with interworking between
-- Thumb and ARM code in mind.
--
--`-k'
-- Specify that PIC code has been generated.
--
-- *Note Blackfin Options::, for the options available when as is
--configured for the Blackfin processor family.
--
-- See the info pages for documentation of the CRIS-specific options.
--
-- The following options are available when as is configured for a D10V
--processor.
--`-O'
-- Optimize output by parallelizing instructions.
--
-- The following options are available when as is configured for a D30V
--processor.
--`-O'
-- Optimize output by parallelizing instructions.
--
--`-n'
-- Warn when nops are generated.
--
--`-N'
-- Warn when a nop after a 32-bit multiply instruction is generated.
--
-- The following options are available when as is configured for the
--Adapteva EPIPHANY series.
--
-- *Note Epiphany Options::, for the options available when as is
--configured for an Epiphany processor.
--
-- *Note i386-Options::, for the options available when as is
--configured for an i386 processor.
--
-- The following options are available when as is configured for the
--Intel 80960 processor.
--
--`-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC'
-- Specify which variant of the 960 architecture is the target.
--
--`-b'
-- Add code to collect statistics about branches taken.
--
--`-no-relax'
-- Do not alter compare-and-branch instructions for long
-- displacements; error if necessary.
--
--
-- The following options are available when as is configured for the
--Ubicom IP2K series.
--
--`-mip2022ext'
-- Specifies that the extended IP2022 instructions are allowed.
--
--`-mip2022'
-- Restores the default behaviour, which restricts the permitted
-- instructions to just the basic IP2022 ones.
--
--
-- The following options are available when as is configured for the
--Renesas M32C and M16C processors.
--
--`-m32c'
-- Assemble M32C instructions.
--
--`-m16c'
-- Assemble M16C instructions (the default).
--
--`-relax'
-- Enable support for link-time relaxations.
--
--`-h-tick-hex'
-- Support H'00 style hex constants in addition to 0x00 style.
--
--
-- The following options are available when as is configured for the
--Renesas M32R (formerly Mitsubishi M32R) series.
--
--`--m32rx'
-- Specify which processor in the M32R family is the target. The
-- default is normally the M32R, but this option changes it to the
-- M32RX.
--
--`--warn-explicit-parallel-conflicts or --Wp'
-- Produce warning messages when questionable parallel constructs are
-- encountered.
--
--`--no-warn-explicit-parallel-conflicts or --Wnp'
-- Do not produce warning messages when questionable parallel
-- constructs are encountered.
--
--
-- The following options are available when as is configured for the
--Motorola 68000 series.
--
--`-l'
-- Shorten references to undefined symbols, to one word instead of
-- two.
--
--`-m68000 | -m68008 | -m68010 | -m68020 | -m68030'
--`| -m68040 | -m68060 | -m68302 | -m68331 | -m68332'
--`| -m68333 | -m68340 | -mcpu32 | -m5200'
-- Specify what processor in the 68000 family is the target. The
-- default is normally the 68020, but this can be changed at
-- configuration time.
--
--`-m68881 | -m68882 | -mno-68881 | -mno-68882'
-- The target machine does (or does not) have a floating-point
-- coprocessor. The default is to assume a coprocessor for 68020,
-- 68030, and cpu32. Although the basic 68000 is not compatible with
-- the 68881, a combination of the two can be specified, since it's
-- possible to do emulation of the coprocessor instructions with the
-- main processor.
--
--`-m68851 | -mno-68851'
-- The target machine does (or does not) have a memory-management
-- unit coprocessor. The default is to assume an MMU for 68020 and
-- up.
--
--
-- *Note Nios II Options::, for the options available when as is
--configured for an Altera Nios II processor.
--
-- For details about the PDP-11 machine dependent features options, see
--*Note PDP-11-Options::.
--
--`-mpic | -mno-pic'
-- Generate position-independent (or position-dependent) code. The
-- default is `-mpic'.
--
--`-mall'
--`-mall-extensions'
-- Enable all instruction set extensions. This is the default.
--
--`-mno-extensions'
-- Disable all instruction set extensions.
--
--`-mEXTENSION | -mno-EXTENSION'
-- Enable (or disable) a particular instruction set extension.
--
--`-mCPU'
-- Enable the instruction set extensions supported by a particular
-- CPU, and disable all other extensions.
--
--`-mMACHINE'
-- Enable the instruction set extensions supported by a particular
-- machine model, and disable all other extensions.
--
-- The following options are available when as is configured for a
--picoJava processor.
--
--`-mb'
-- Generate "big endian" format output.
--
--`-ml'
-- Generate "little endian" format output.
--
--
-- The following options are available when as is configured for the
--Motorola 68HC11 or 68HC12 series.
--
--`-m68hc11 | -m68hc12 | -m68hcs12 | -mm9s12x | -mm9s12xg'
-- Specify what processor is the target. The default is defined by
-- the configuration option when building the assembler.
--
--`--xgate-ramoffset'
-- Instruct the linker to offset RAM addresses from S12X address
-- space into XGATE address space.
--
--`-mshort'
-- Specify to use the 16-bit integer ABI.
--
--`-mlong'
-- Specify to use the 32-bit integer ABI.
--
--`-mshort-double'
-- Specify to use the 32-bit double ABI.
--
--`-mlong-double'
-- Specify to use the 64-bit double ABI.
--
--`--force-long-branches'
-- Relative branches are turned into absolute ones. This concerns
-- conditional branches, unconditional branches and branches to a sub
-- routine.
--
--`-S | --short-branches'
-- Do not turn relative branches into absolute ones when the offset
-- is out of range.
--
--`--strict-direct-mode'
-- Do not turn the direct addressing mode into extended addressing
-- mode when the instruction does not support direct addressing mode.
--
--`--print-insn-syntax'
-- Print the syntax of instruction in case of error.
--
--`--print-opcodes'
-- Print the list of instructions with syntax and then exit.
--
--`--generate-example'
-- Print an example of instruction for each possible instruction and
-- then exit. This option is only useful for testing `as'.
--
--
-- The following options are available when `as' is configured for the
--SPARC architecture:
--
--`-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite'
--`-Av8plus | -Av8plusa | -Av9 | -Av9a'
-- Explicitly select a variant of the SPARC architecture.
--
-- `-Av8plus' and `-Av8plusa' select a 32 bit environment. `-Av9'
-- and `-Av9a' select a 64 bit environment.
--
-- `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with
-- UltraSPARC extensions.
--
--`-xarch=v8plus | -xarch=v8plusa'
-- For compatibility with the Solaris v9 assembler. These options are
-- equivalent to -Av8plus and -Av8plusa, respectively.
--
--`-bump'
-- Warn when the assembler switches to another architecture.
--
-- The following options are available when as is configured for the
--'c54x architecture.
--
--`-mfar-mode'
-- Enable extended addressing mode. All addresses and relocations
-- will assume extended addressing (usually 23 bits).
--
--`-mcpu=CPU_VERSION'
-- Sets the CPU version being compiled for.
--
--`-merrors-to-file FILENAME'
-- Redirect error output to a file, for broken systems which don't
-- support such behaviour in the shell.
--
-- The following options are available when as is configured for a MIPS
--processor.
--
--`-G NUM'
-- This option sets the largest size of an object that can be
-- referenced implicitly with the `gp' register. It is only accepted
-- for targets that use ECOFF format, such as a DECstation running
-- Ultrix. The default value is 8.
--
--`-EB'
-- Generate "big endian" format output.
--
--`-EL'
-- Generate "little endian" format output.
--
--`-mips1'
--`-mips2'
--`-mips3'
--`-mips4'
--`-mips5'
--`-mips32'
--`-mips32r2'
--`-mips64'
--`-mips64r2'
-- Generate code for a particular MIPS Instruction Set Architecture
-- level. `-mips1' is an alias for `-march=r3000', `-mips2' is an
-- alias for `-march=r6000', `-mips3' is an alias for `-march=r4000'
-- and `-mips4' is an alias for `-march=r8000'. `-mips5', `-mips32',
-- `-mips32r2', `-mips64', and `-mips64r2' correspond to generic MIPS
-- V, MIPS32, MIPS32 Release 2, MIPS64, and MIPS64 Release 2 ISA
-- processors, respectively.
--
--`-march=CPU'
-- Generate code for a particular MIPS CPU.
--
--`-mtune=CPU'
-- Schedule and tune for a particular MIPS CPU.
--
--`-mfix7000'
--`-mno-fix7000'
-- Cause nops to be inserted if the read of the destination register
-- of an mfhi or mflo instruction occurs in the following two
-- instructions.
--
--`-mdebug'
--`-no-mdebug'
-- Cause stabs-style debugging output to go into an ECOFF-style
-- .mdebug section instead of the standard ELF .stabs sections.
--
--`-mpdr'
--`-mno-pdr'
-- Control generation of `.pdr' sections.
--
--`-mgp32'
--`-mfp32'
-- The register sizes are normally inferred from the ISA and ABI, but
-- these flags force a certain group of registers to be treated as 32
-- bits wide at all times. `-mgp32' controls the size of
-- general-purpose registers and `-mfp32' controls the size of
-- floating-point registers.
--
--`-mips16'
--`-no-mips16'
-- Generate code for the MIPS 16 processor. This is equivalent to
-- putting `.set mips16' at the start of the assembly file.
-- `-no-mips16' turns off this option.
--
--`-mmicromips'
--`-mno-micromips'
-- Generate code for the microMIPS processor. This is equivalent to
-- putting `.set micromips' at the start of the assembly file.
-- `-mno-micromips' turns off this option. This is equivalent to
-- putting `.set nomicromips' at the start of the assembly file.
--
--`-msmartmips'
--`-mno-smartmips'
-- Enables the SmartMIPS extension to the MIPS32 instruction set.
-- This is equivalent to putting `.set smartmips' at the start of the
-- assembly file. `-mno-smartmips' turns off this option.
--
--`-mips3d'
--`-no-mips3d'
-- Generate code for the MIPS-3D Application Specific Extension.
-- This tells the assembler to accept MIPS-3D instructions.
-- `-no-mips3d' turns off this option.
--
--`-mdmx'
--`-no-mdmx'
-- Generate code for the MDMX Application Specific Extension. This
-- tells the assembler to accept MDMX instructions. `-no-mdmx' turns
-- off this option.
--
--`-mdsp'
--`-mno-dsp'
-- Generate code for the DSP Release 1 Application Specific Extension.
-- This tells the assembler to accept DSP Release 1 instructions.
-- `-mno-dsp' turns off this option.
--
--`-mdspr2'
--`-mno-dspr2'
-- Generate code for the DSP Release 2 Application Specific Extension.
-- This option implies -mdsp. This tells the assembler to accept DSP
-- Release 2 instructions. `-mno-dspr2' turns off this option.
--
--`-mmt'
--`-mno-mt'
-- Generate code for the MT Application Specific Extension. This
-- tells the assembler to accept MT instructions. `-mno-mt' turns
-- off this option.
--
--`-mmcu'
--`-mno-mcu'
-- Generate code for the MCU Application Specific Extension. This
-- tells the assembler to accept MCU instructions. `-mno-mcu' turns
-- off this option.
--
--`-minsn32'
--`-mno-insn32'
-- Only use 32-bit instruction encodings when generating code for the
-- microMIPS processor. This option inhibits the use of any 16-bit
-- instructions. This is equivalent to putting `.set insn32' at the
-- start of the assembly file. `-mno-insn32' turns off this option.
-- This is equivalent to putting `.set noinsn32' at the start of the
-- assembly file. By default `-mno-insn32' is selected, allowing all
-- instructions to be used.
--
--`--construct-floats'
--`--no-construct-floats'
-- The `--no-construct-floats' option disables the construction of
-- double width floating point constants by loading the two halves of
-- the value into the two single width floating point registers that
-- make up the double width register. By default
-- `--construct-floats' is selected, allowing construction of these
-- floating point constants.
--
--`--relax-branch'
--`--no-relax-branch'
-- The `--relax-branch' option enables the relaxation of out-of-range
-- branches. By default `--no-relax-branch' is selected, causing any
-- out-of-range branches to produce an error.
--
--`-mnan=ENCODING'
-- Select between the IEEE 754-2008 (`-mnan=2008') or the legacy
-- (`-mnan=legacy') NaN encoding format. The latter is the default.
--
--`--emulation=NAME'
-- This option was formerly used to switch between ELF and ECOFF
-- output on targets like IRIX 5 that supported both. MIPS ECOFF
-- support was removed in GAS 2.24, so the option now serves little
-- purpose. It is retained for backwards compatibility.
--
-- The available configuration names are: `mipself', `mipslelf' and
-- `mipsbelf'. Choosing `mipself' now has no effect, since the output
-- is always ELF. `mipslelf' and `mipsbelf' select little- and
-- big-endian output respectively, but `-EL' and `-EB' are now the
-- preferred options instead.
--
--`-nocpp'
-- `as' ignores this option. It is accepted for compatibility with
-- the native tools.
--
--`--trap'
--`--no-trap'
--`--break'
--`--no-break'
-- Control how to deal with multiplication overflow and division by
-- zero. `--trap' or `--no-break' (which are synonyms) take a trap
-- exception (and only work for Instruction Set Architecture level 2
-- and higher); `--break' or `--no-trap' (also synonyms, and the
-- default) take a break exception.
--
--`-n'
-- When this option is used, `as' will issue a warning every time it
-- generates a nop instruction from a macro.
--
-- The following options are available when as is configured for an
--MCore processor.
--
--`-jsri2bsr'
--`-nojsri2bsr'
-- Enable or disable the JSRI to BSR transformation. By default this
-- is enabled. The command line option `-nojsri2bsr' can be used to
-- disable it.
--
--`-sifilter'
--`-nosifilter'
-- Enable or disable the silicon filter behaviour. By default this
-- is disabled. The default can be overridden by the `-sifilter'
-- command line option.
--
--`-relax'
-- Alter jump instructions for long displacements.
--
--`-mcpu=[210|340]'
-- Select the cpu type on the target hardware. This controls which
-- instructions can be assembled.
--
--`-EB'
-- Assemble for a big endian target.
--
--`-EL'
-- Assemble for a little endian target.
--
--
-- *Note Meta Options::, for the options available when as is configured
--for a Meta processor.
--
-- See the info pages for documentation of the MMIX-specific options.
--
-- *Note PowerPC-Opts::, for the options available when as is configured
--for a PowerPC processor.
--
-- See the info pages for documentation of the RX-specific options.
--
-- The following options are available when as is configured for the
--s390 processor family.
--
--`-m31'
--`-m64'
-- Select the word size, either 31/32 bits or 64 bits.
--
--`-mesa'
--
--`-mzarch'
-- Select the architecture mode, either the Enterprise System
-- Architecture (esa) or the z/Architecture mode (zarch).
--
--`-march=PROCESSOR'
-- Specify which s390 processor variant is the target, `g6', `g6',
-- `z900', `z990', `z9-109', `z9-ec', `z10', `z196', or `zEC12'.
--
--`-mregnames'
--`-mno-regnames'
-- Allow or disallow symbolic names for registers.
--
--`-mwarn-areg-zero'
-- Warn whenever the operand for a base or index register has been
-- specified but evaluates to zero.
--
-- *Note TIC6X Options::, for the options available when as is
--configured for a TMS320C6000 processor.
--
-- *Note TILE-Gx Options::, for the options available when as is
--configured for a TILE-Gx processor.
--
-- *Note Xtensa Options::, for the options available when as is
--configured for an Xtensa processor.
--
-- The following options are available when as is configured for a Z80
--family processor.
--`-z80'
-- Assemble for Z80 processor.
--
--`-r800'
-- Assemble for R800 processor.
--
--`-ignore-undocumented-instructions'
--`-Wnud'
-- Assemble undocumented Z80 instructions that also work on R800
-- without warning.
--
--`-ignore-unportable-instructions'
--`-Wnup'
-- Assemble all undocumented Z80 instructions without warning.
--
--`-warn-undocumented-instructions'
--`-Wud'
-- Issue a warning for undocumented Z80 instructions that also work
-- on R800.
--
--`-warn-unportable-instructions'
--`-Wup'
-- Issue a warning for undocumented Z80 instructions that do not work
-- on R800.
--
--`-forbid-undocumented-instructions'
--`-Fud'
-- Treat all undocumented instructions as errors.
--
--`-forbid-unportable-instructions'
--`-Fup'
-- Treat undocumented Z80 instructions that do not work on R800 as
-- errors.
--
--* Menu:
--
--* Manual:: Structure of this Manual
--* GNU Assembler:: The GNU Assembler
--* Object Formats:: Object File Formats
--* Command Line:: Command Line
--* Input Files:: Input Files
--* Object:: Output (Object) File
--* Errors:: Error and Warning Messages
--
--
--File: as.info, Node: Manual, Next: GNU Assembler, Up: Overview
--
--1.1 Structure of this Manual
--============================
--
--This manual is intended to describe what you need to know to use GNU
--`as'. We cover the syntax expected in source files, including notation
--for symbols, constants, and expressions; the directives that `as'
--understands; and of course how to invoke `as'.
--
-- This manual also describes some of the machine-dependent features of
--various flavors of the assembler.
--
-- On the other hand, this manual is _not_ intended as an introduction
--to programming in assembly language--let alone programming in general!
--In a similar vein, we make no attempt to introduce the machine
--architecture; we do _not_ describe the instruction set, standard
--mnemonics, registers or addressing modes that are standard to a
--particular architecture. You may want to consult the manufacturer's
--machine architecture manual for this information.
--
--
--File: as.info, Node: GNU Assembler, Next: Object Formats, Prev: Manual, Up: Overview
--
--1.2 The GNU Assembler
--=====================
--
--GNU `as' is really a family of assemblers. If you use (or have used)
--the GNU assembler on one architecture, you should find a fairly similar
--environment when you use it on another architecture. Each version has
--much in common with the others, including object file formats, most
--assembler directives (often called "pseudo-ops") and assembler syntax.
--
-- `as' is primarily intended to assemble the output of the GNU C
--compiler `gcc' for use by the linker `ld'. Nevertheless, we've tried
--to make `as' assemble correctly everything that other assemblers for
--the same machine would assemble. Any exceptions are documented
--explicitly (*note Machine Dependencies::). This doesn't mean `as'
--always uses the same syntax as another assembler for the same
--architecture; for example, we know of several incompatible versions of
--680x0 assembly language syntax.
--
-- Unlike older assemblers, `as' is designed to assemble a source
--program in one pass of the source file. This has a subtle impact on the
--`.org' directive (*note `.org': Org.).
--
--
--File: as.info, Node: Object Formats, Next: Command Line, Prev: GNU Assembler, Up: Overview
--
--1.3 Object File Formats
--=======================
--
--The GNU assembler can be configured to produce several alternative
--object file formats. For the most part, this does not affect how you
--write assembly language programs; but directives for debugging symbols
--are typically different in different file formats. *Note Symbol
--Attributes: Symbol Attributes.
--
--
--File: as.info, Node: Command Line, Next: Input Files, Prev: Object Formats, Up: Overview
--
--1.4 Command Line
--================
--
--After the program name `as', the command line may contain options and
--file names. Options may appear in any order, and may be before, after,
--or between file names. The order of file names is significant.
--
-- `--' (two hyphens) by itself names the standard input file
--explicitly, as one of the files for `as' to assemble.
--
-- Except for `--' any command line argument that begins with a hyphen
--(`-') is an option. Each option changes the behavior of `as'. No
--option changes the way another option works. An option is a `-'
--followed by one or more letters; the case of the letter is important.
--All options are optional.
--
-- Some options expect exactly one file name to follow them. The file
--name may either immediately follow the option's letter (compatible with
--older assemblers) or it may be the next command argument (GNU
--standard). These two command lines are equivalent:
--
-- as -o my-object-file.o mumble.s
-- as -omy-object-file.o mumble.s
--
--
--File: as.info, Node: Input Files, Next: Object, Prev: Command Line, Up: Overview
--
--1.5 Input Files
--===============
--
--We use the phrase "source program", abbreviated "source", to describe
--the program input to one run of `as'. The program may be in one or
--more files; how the source is partitioned into files doesn't change the
--meaning of the source.
--
-- The source program is a concatenation of the text in all the files,
--in the order specified.
--
-- Each time you run `as' it assembles exactly one source program. The
--source program is made up of one or more files. (The standard input is
--also a file.)
--
-- You give `as' a command line that has zero or more input file names.
--The input files are read (from left file name to right). A command
--line argument (in any position) that has no special meaning is taken to
--be an input file name.
--
-- If you give `as' no file names it attempts to read one input file
--from the `as' standard input, which is normally your terminal. You may
--have to type <ctl-D> to tell `as' there is no more program to assemble.
--
-- Use `--' if you need to explicitly name the standard input file in
--your command line.
--
-- If the source is empty, `as' produces a small, empty object file.
--
--Filenames and Line-numbers
----------------------------
--
--There are two ways of locating a line in the input file (or files) and
--either may be used in reporting error messages. One way refers to a
--line number in a physical file; the other refers to a line number in a
--"logical" file. *Note Error and Warning Messages: Errors.
--
-- "Physical files" are those files named in the command line given to
--`as'.
--
-- "Logical files" are simply names declared explicitly by assembler
--directives; they bear no relation to physical files. Logical file
--names help error messages reflect the original source file, when `as'
--source is itself synthesized from other files. `as' understands the
--`#' directives emitted by the `gcc' preprocessor. See also *Note
--`.file': File.
--
--
--File: as.info, Node: Object, Next: Errors, Prev: Input Files, Up: Overview
--
--1.6 Output (Object) File
--========================
--
--Every time you run `as' it produces an output file, which is your
--assembly language program translated into numbers. This file is the
--object file. Its default name is `a.out'. You can give it another
--name by using the `-o' option. Conventionally, object file names end
--with `.o'. The default name is used for historical reasons: older
--assemblers were capable of assembling self-contained programs directly
--into a runnable program. (For some formats, this isn't currently
--possible, but it can be done for the `a.out' format.)
--
-- The object file is meant for input to the linker `ld'. It contains
--assembled program code, information to help `ld' integrate the
--assembled program into a runnable file, and (optionally) symbolic
--information for the debugger.
--
--
--File: as.info, Node: Errors, Prev: Object, Up: Overview
--
--1.7 Error and Warning Messages
--==============================
--
--`as' may write warnings and error messages to the standard error file
--(usually your terminal). This should not happen when a compiler runs
--`as' automatically. Warnings report an assumption made so that `as'
--could keep assembling a flawed program; errors report a grave problem
--that stops the assembly.
--
-- Warning messages have the format
--
-- file_name:NNN:Warning Message Text
--
--(where NNN is a line number). If a logical file name has been given
--(*note `.file': File.) it is used for the filename, otherwise the name
--of the current input file is used. If a logical line number was given
--(*note `.line': Line.) then it is used to calculate the number printed,
--otherwise the actual line in the current source file is printed. The
--message text is intended to be self explanatory (in the grand Unix
--tradition).
--
-- Error messages have the format
-- file_name:NNN:FATAL:Error Message Text
-- The file name and line number are derived as for warning messages.
--The actual message text may be rather less explanatory because many of
--them aren't supposed to happen.
--
--
--File: as.info, Node: Invoking, Next: Syntax, Prev: Overview, Up: Top
--
--2 Command-Line Options
--**********************
--
--This chapter describes command-line options available in _all_ versions
--of the GNU assembler; see *Note Machine Dependencies::, for options
--specific to particular machine architectures.
--
-- If you are invoking `as' via the GNU C compiler, you can use the
--`-Wa' option to pass arguments through to the assembler. The assembler
--arguments must be separated from each other (and the `-Wa') by commas.
--For example:
--
-- gcc -c -g -O -Wa,-alh,-L file.c
--
--This passes two options to the assembler: `-alh' (emit a listing to
--standard output with high-level and assembly source) and `-L' (retain
--local symbols in the symbol table).
--
-- Usually you do not need to use this `-Wa' mechanism, since many
--compiler command-line options are automatically passed to the assembler
--by the compiler. (You can call the GNU compiler driver with the `-v'
--option to see precisely what options it passes to each compilation
--pass, including the assembler.)
--
--* Menu:
--
--* a:: -a[cdghlns] enable listings
--* alternate:: --alternate enable alternate macro syntax
--* D:: -D for compatibility
--* f:: -f to work faster
--* I:: -I for .include search path
--
--* K:: -K for difference tables
--
--* L:: -L to retain local symbols
--* listing:: --listing-XXX to configure listing output
--* M:: -M or --mri to assemble in MRI compatibility mode
--* MD:: --MD for dependency tracking
--* o:: -o to name the object file
--* R:: -R to join data and text sections
--* statistics:: --statistics to see statistics about assembly
--* traditional-format:: --traditional-format for compatible output
--* v:: -v to announce version
--* W:: -W, --no-warn, --warn, --fatal-warnings to control warnings
--* Z:: -Z to make object file even after errors
--
--
--File: as.info, Node: a, Next: alternate, Up: Invoking
--
--2.1 Enable Listings: `-a[cdghlns]'
--==================================
--
--These options enable listing output from the assembler. By itself,
--`-a' requests high-level, assembly, and symbols listing. You can use
--other letters to select specific options for the list: `-ah' requests a
--high-level language listing, `-al' requests an output-program assembly
--listing, and `-as' requests a symbol table listing. High-level
--listings require that a compiler debugging option like `-g' be used,
--and that assembly listings (`-al') be requested also.
--
-- Use the `-ag' option to print a first section with general assembly
--information, like as version, switches passed, or time stamp.
--
-- Use the `-ac' option to omit false conditionals from a listing. Any
--lines which are not assembled because of a false `.if' (or `.ifdef', or
--any other conditional), or a true `.if' followed by an `.else', will be
--omitted from the listing.
--
-- Use the `-ad' option to omit debugging directives from the listing.
--
-- Once you have specified one of these options, you can further control
--listing output and its appearance using the directives `.list',
--`.nolist', `.psize', `.eject', `.title', and `.sbttl'. The `-an'
--option turns off all forms processing. If you do not request listing
--output with one of the `-a' options, the listing-control directives
--have no effect.
--
-- The letters after `-a' may be combined into one option, _e.g._,
--`-aln'.
--
-- Note if the assembler source is coming from the standard input (e.g.,
--because it is being created by `gcc' and the `-pipe' command line switch
--is being used) then the listing will not contain any comments or
--preprocessor directives. This is because the listing code buffers
--input source lines from stdin only after they have been preprocessed by
--the assembler. This reduces memory usage and makes the code more
--efficient.
--
--
--File: as.info, Node: alternate, Next: D, Prev: a, Up: Invoking
--
--2.2 `--alternate'
--=================
--
--Begin in alternate macro mode, see *Note `.altmacro': Altmacro.
--
--
--File: as.info, Node: D, Next: f, Prev: alternate, Up: Invoking
--
--2.3 `-D'
--========
--
--This option has no effect whatsoever, but it is accepted to make it more
--likely that scripts written for other assemblers also work with `as'.
--
--
--File: as.info, Node: f, Next: I, Prev: D, Up: Invoking
--
--2.4 Work Faster: `-f'
--=====================
--
--`-f' should only be used when assembling programs written by a
--(trusted) compiler. `-f' stops the assembler from doing whitespace and
--comment preprocessing on the input file(s) before assembling them.
--*Note Preprocessing: Preprocessing.
--
-- _Warning:_ if you use `-f' when the files actually need to be
-- preprocessed (if they contain comments, for example), `as' does
-- not work correctly.
--
--
--File: as.info, Node: I, Next: K, Prev: f, Up: Invoking
--
--2.5 `.include' Search Path: `-I' PATH
--=====================================
--
--Use this option to add a PATH to the list of directories `as' searches
--for files specified in `.include' directives (*note `.include':
--Include.). You may use `-I' as many times as necessary to include a
--variety of paths. The current working directory is always searched
--first; after that, `as' searches any `-I' directories in the same order
--as they were specified (left to right) on the command line.
--
--
--File: as.info, Node: K, Next: L, Prev: I, Up: Invoking
--
--2.6 Difference Tables: `-K'
--===========================
--
--`as' sometimes alters the code emitted for directives of the form
--`.word SYM1-SYM2'. *Note `.word': Word. You can use the `-K' option
--if you want a warning issued when this is done.
--
--
--File: as.info, Node: L, Next: listing, Prev: K, Up: Invoking
--
--2.7 Include Local Symbols: `-L'
--===============================
--
--Symbols beginning with system-specific local label prefixes, typically
--`.L' for ELF systems or `L' for traditional a.out systems, are called
--"local symbols". *Note Symbol Names::. Normally you do not see such
--symbols when debugging, because they are intended for the use of
--programs (like compilers) that compose assembler programs, not for your
--notice. Normally both `as' and `ld' discard such symbols, so you do
--not normally debug with them.
--
-- This option tells `as' to retain those local symbols in the object
--file. Usually if you do this you also tell the linker `ld' to preserve
--those symbols.
--
--
--File: as.info, Node: listing, Next: M, Prev: L, Up: Invoking
--
--2.8 Configuring listing output: `--listing'
--===========================================
--
--The listing feature of the assembler can be enabled via the command
--line switch `-a' (*note a::). This feature combines the input source
--file(s) with a hex dump of the corresponding locations in the output
--object file, and displays them as a listing file. The format of this
--listing can be controlled by directives inside the assembler source
--(i.e., `.list' (*note List::), `.title' (*note Title::), `.sbttl'
--(*note Sbttl::), `.psize' (*note Psize::), and `.eject' (*note Eject::)
--and also by the following switches:
--
--`--listing-lhs-width=`number''
-- Sets the maximum width, in words, of the first line of the hex
-- byte dump. This dump appears on the left hand side of the listing
-- output.
--
--`--listing-lhs-width2=`number''
-- Sets the maximum width, in words, of any further lines of the hex
-- byte dump for a given input source line. If this value is not
-- specified, it defaults to being the same as the value specified
-- for `--listing-lhs-width'. If neither switch is used the default
-- is to one.
--
--`--listing-rhs-width=`number''
-- Sets the maximum width, in characters, of the source line that is
-- displayed alongside the hex dump. The default value for this
-- parameter is 100. The source line is displayed on the right hand
-- side of the listing output.
--
--`--listing-cont-lines=`number''
-- Sets the maximum number of continuation lines of hex dump that
-- will be displayed for a given single line of source input. The
-- default value is 4.
--
--
--File: as.info, Node: M, Next: MD, Prev: listing, Up: Invoking
--
--2.9 Assemble in MRI Compatibility Mode: `-M'
--============================================
--
--The `-M' or `--mri' option selects MRI compatibility mode. This
--changes the syntax and pseudo-op handling of `as' to make it compatible
--with the `ASM68K' or the `ASM960' (depending upon the configured
--target) assembler from Microtec Research. The exact nature of the MRI
--syntax will not be documented here; see the MRI manuals for more
--information. Note in particular that the handling of macros and macro
--arguments is somewhat different. The purpose of this option is to
--permit assembling existing MRI assembler code using `as'.
--
-- The MRI compatibility is not complete. Certain operations of the
--MRI assembler depend upon its object file format, and can not be
--supported using other object file formats. Supporting these would
--require enhancing each object file format individually. These are:
--
-- * global symbols in common section
--
-- The m68k MRI assembler supports common sections which are merged
-- by the linker. Other object file formats do not support this.
-- `as' handles common sections by treating them as a single common
-- symbol. It permits local symbols to be defined within a common
-- section, but it can not support global symbols, since it has no
-- way to describe them.
--
-- * complex relocations
--
-- The MRI assemblers support relocations against a negated section
-- address, and relocations which combine the start addresses of two
-- or more sections. These are not support by other object file
-- formats.
--
-- * `END' pseudo-op specifying start address
--
-- The MRI `END' pseudo-op permits the specification of a start
-- address. This is not supported by other object file formats. The
-- start address may instead be specified using the `-e' option to
-- the linker, or in a linker script.
--
-- * `IDNT', `.ident' and `NAME' pseudo-ops
--
-- The MRI `IDNT', `.ident' and `NAME' pseudo-ops assign a module
-- name to the output file. This is not supported by other object
-- file formats.
--
-- * `ORG' pseudo-op
--
-- The m68k MRI `ORG' pseudo-op begins an absolute section at a given
-- address. This differs from the usual `as' `.org' pseudo-op, which
-- changes the location within the current section. Absolute
-- sections are not supported by other object file formats. The
-- address of a section may be assigned within a linker script.
--
-- There are some other features of the MRI assembler which are not
--supported by `as', typically either because they are difficult or
--because they seem of little consequence. Some of these may be
--supported in future releases.
--
-- * EBCDIC strings
--
-- EBCDIC strings are not supported.
--
-- * packed binary coded decimal
--
-- Packed binary coded decimal is not supported. This means that the
-- `DC.P' and `DCB.P' pseudo-ops are not supported.
--
-- * `FEQU' pseudo-op
--
-- The m68k `FEQU' pseudo-op is not supported.
--
-- * `NOOBJ' pseudo-op
--
-- The m68k `NOOBJ' pseudo-op is not supported.
--
-- * `OPT' branch control options
--
-- The m68k `OPT' branch control options--`B', `BRS', `BRB', `BRL',
-- and `BRW'--are ignored. `as' automatically relaxes all branches,
-- whether forward or backward, to an appropriate size, so these
-- options serve no purpose.
--
-- * `OPT' list control options
--
-- The following m68k `OPT' list control options are ignored: `C',
-- `CEX', `CL', `CRE', `E', `G', `I', `M', `MEX', `MC', `MD', `X'.
--
-- * other `OPT' options
--
-- The following m68k `OPT' options are ignored: `NEST', `O', `OLD',
-- `OP', `P', `PCO', `PCR', `PCS', `R'.
--
-- * `OPT' `D' option is default
--
-- The m68k `OPT' `D' option is the default, unlike the MRI assembler.
-- `OPT NOD' may be used to turn it off.
--
-- * `XREF' pseudo-op.
--
-- The m68k `XREF' pseudo-op is ignored.
--
-- * `.debug' pseudo-op
--
-- The i960 `.debug' pseudo-op is not supported.
--
-- * `.extended' pseudo-op
--
-- The i960 `.extended' pseudo-op is not supported.
--
-- * `.list' pseudo-op.
--
-- The various options of the i960 `.list' pseudo-op are not
-- supported.
--
-- * `.optimize' pseudo-op
--
-- The i960 `.optimize' pseudo-op is not supported.
--
-- * `.output' pseudo-op
--
-- The i960 `.output' pseudo-op is not supported.
--
-- * `.setreal' pseudo-op
--
-- The i960 `.setreal' pseudo-op is not supported.
--
--
--
--File: as.info, Node: MD, Next: o, Prev: M, Up: Invoking
--
--2.10 Dependency Tracking: `--MD'
--================================
--
--`as' can generate a dependency file for the file it creates. This file
--consists of a single rule suitable for `make' describing the
--dependencies of the main source file.
--
-- The rule is written to the file named in its argument.
--
-- This feature is used in the automatic updating of makefiles.
--
--
--File: as.info, Node: o, Next: R, Prev: MD, Up: Invoking
--
--2.11 Name the Object File: `-o'
--===============================
--
--There is always one object file output when you run `as'. By default
--it has the name `a.out' (or `b.out', for Intel 960 targets only). You
--use this option (which takes exactly one filename) to give the object
--file a different name.
--
-- Whatever the object file is called, `as' overwrites any existing
--file of the same name.
--
--
--File: as.info, Node: R, Next: statistics, Prev: o, Up: Invoking
--
--2.12 Join Data and Text Sections: `-R'
--======================================
--
--`-R' tells `as' to write the object file as if all data-section data
--lives in the text section. This is only done at the very last moment:
--your binary data are the same, but data section parts are relocated
--differently. The data section part of your object file is zero bytes
--long because all its bytes are appended to the text section. (*Note
--Sections and Relocation: Sections.)
--
-- When you specify `-R' it would be possible to generate shorter
--address displacements (because we do not have to cross between text and
--data section). We refrain from doing this simply for compatibility with
--older versions of `as'. In future, `-R' may work this way.
--
-- When `as' is configured for COFF or ELF output, this option is only
--useful if you use sections named `.text' and `.data'.
--
-- `-R' is not supported for any of the HPPA targets. Using `-R'
--generates a warning from `as'.
--
--
--File: as.info, Node: statistics, Next: traditional-format, Prev: R, Up: Invoking
--
--2.13 Display Assembly Statistics: `--statistics'
--================================================
--
--Use `--statistics' to display two statistics about the resources used by
--`as': the maximum amount of space allocated during the assembly (in
--bytes), and the total execution time taken for the assembly (in CPU
--seconds).
--
--
--File: as.info, Node: traditional-format, Next: v, Prev: statistics, Up: Invoking
--
--2.14 Compatible Output: `--traditional-format'
--==============================================
--
--For some targets, the output of `as' is different in some ways from the
--output of some existing assembler. This switch requests `as' to use
--the traditional format instead.
--
-- For example, it disables the exception frame optimizations which
--`as' normally does by default on `gcc' output.
--
--
--File: as.info, Node: v, Next: W, Prev: traditional-format, Up: Invoking
--
--2.15 Announce Version: `-v'
--===========================
--
--You can find out what version of as is running by including the option
--`-v' (which you can also spell as `-version') on the command line.
--
--
--File: as.info, Node: W, Next: Z, Prev: v, Up: Invoking
--
--2.16 Control Warnings: `-W', `--warn', `--no-warn', `--fatal-warnings'
--======================================================================
--
--`as' should never give a warning or error message when assembling
--compiler output. But programs written by people often cause `as' to
--give a warning that a particular assumption was made. All such
--warnings are directed to the standard error file.
--
-- If you use the `-W' and `--no-warn' options, no warnings are issued.
--This only affects the warning messages: it does not change any
--particular of how `as' assembles your file. Errors, which stop the
--assembly, are still reported.
--
-- If you use the `--fatal-warnings' option, `as' considers files that
--generate warnings to be in error.
--
-- You can switch these options off again by specifying `--warn', which
--causes warnings to be output as usual.
--
--
--File: as.info, Node: Z, Prev: W, Up: Invoking
--
--2.17 Generate Object File in Spite of Errors: `-Z'
--==================================================
--
--After an error message, `as' normally produces no output. If for some
--reason you are interested in object file output even after `as' gives
--an error message on your program, use the `-Z' option. If there are
--any errors, `as' continues anyways, and writes an object file after a
--final warning message of the form `N errors, M warnings, generating bad
--object file.'
--
--
--File: as.info, Node: Syntax, Next: Sections, Prev: Invoking, Up: Top
--
--3 Syntax
--********
--
--This chapter describes the machine-independent syntax allowed in a
--source file. `as' syntax is similar to what many other assemblers use;
--it is inspired by the BSD 4.2 assembler, except that `as' does not
--assemble Vax bit-fields.
--
--* Menu:
--
--* Preprocessing:: Preprocessing
--* Whitespace:: Whitespace
--* Comments:: Comments
--* Symbol Intro:: Symbols
--* Statements:: Statements
--* Constants:: Constants
--
--
--File: as.info, Node: Preprocessing, Next: Whitespace, Up: Syntax
--
--3.1 Preprocessing
--=================
--
--The `as' internal preprocessor:
-- * adjusts and removes extra whitespace. It leaves one space or tab
-- before the keywords on a line, and turns any other whitespace on
-- the line into a single space.
--
-- * removes all comments, replacing them with a single space, or an
-- appropriate number of newlines.
--
-- * converts character constants into the appropriate numeric values.
--
-- It does not do macro processing, include file handling, or anything
--else you may get from your C compiler's preprocessor. You can do
--include file processing with the `.include' directive (*note
--`.include': Include.). You can use the GNU C compiler driver to get
--other "CPP" style preprocessing by giving the input file a `.S' suffix.
--*Note Options Controlling the Kind of Output: (gcc.info)Overall
--Options.
--
-- Excess whitespace, comments, and character constants cannot be used
--in the portions of the input text that are not preprocessed.
--
-- If the first line of an input file is `#NO_APP' or if you use the
--`-f' option, whitespace and comments are not removed from the input
--file. Within an input file, you can ask for whitespace and comment
--removal in specific portions of the by putting a line that says `#APP'
--before the text that may contain whitespace or comments, and putting a
--line that says `#NO_APP' after this text. This feature is mainly
--intend to support `asm' statements in compilers whose output is
--otherwise free of comments and whitespace.
--
--
--File: as.info, Node: Whitespace, Next: Comments, Prev: Preprocessing, Up: Syntax
--
--3.2 Whitespace
--==============
--
--"Whitespace" is one or more blanks or tabs, in any order. Whitespace
--is used to separate symbols, and to make programs neater for people to
--read. Unless within character constants (*note Character Constants:
--Characters.), any whitespace means the same as exactly one space.
--
--
--File: as.info, Node: Comments, Next: Symbol Intro, Prev: Whitespace, Up: Syntax
--
--3.3 Comments
--============
--
--There are two ways of rendering comments to `as'. In both cases the
--comment is equivalent to one space.
--
-- Anything from `/*' through the next `*/' is a comment. This means
--you may not nest these comments.
--
-- /*
-- The only way to include a newline ('\n') in a comment
-- is to use this sort of comment.
-- */
--
-- /* This sort of comment does not nest. */
--
-- Anything from a "line comment" character up to the next newline is
--considered a comment and is ignored. The line comment character is
--target specific, and some targets multiple comment characters. Some
--targets also have line comment characters that only work if they are
--the first character on a line. Some targets use a sequence of two
--characters to introduce a line comment. Some targets can also change
--their line comment characters depending upon command line options that
--have been used. For more details see the _Syntax_ section in the
--documentation for individual targets.
--
-- If the line comment character is the hash sign (`#') then it still
--has the special ability to enable and disable preprocessing (*note
--Preprocessing::) and to specify logical line numbers:
--
-- To be compatible with past assemblers, lines that begin with `#'
--have a special interpretation. Following the `#' should be an absolute
--expression (*note Expressions::): the logical line number of the _next_
--line. Then a string (*note Strings: Strings.) is allowed: if present
--it is a new logical file name. The rest of the line, if any, should be
--whitespace.
--
-- If the first non-whitespace characters on the line are not numeric,
--the line is ignored. (Just like a comment.)
--
-- # This is an ordinary comment.
-- # 42-6 "new_file_name" # New logical file name
-- # This is logical line # 36.
-- This feature is deprecated, and may disappear from future versions
--of `as'.
--
--
--File: as.info, Node: Symbol Intro, Next: Statements, Prev: Comments, Up: Syntax
--
--3.4 Symbols
--===========
--
--A "symbol" is one or more characters chosen from the set of all letters
--(both upper and lower case), digits and the three characters `_.$'. On
--most machines, you can also use `$' in symbol names; exceptions are
--noted in *Note Machine Dependencies::. No symbol may begin with a
--digit. Case is significant. There is no length limit: all characters
--are significant. Multibyte characters are supported. Symbols are
--delimited by characters not in that set, or by the beginning of a file
--(since the source program must end with a newline, the end of a file is
--not a possible symbol delimiter). *Note Symbols::.
--
--
--File: as.info, Node: Statements, Next: Constants, Prev: Symbol Intro, Up: Syntax
--
--3.5 Statements
--==============
--
--A "statement" ends at a newline character (`\n') or a "line separator
--character". The line separator character is target specific and
--described in the _Syntax_ section of each target's documentation. Not
--all targets support a line separator character. The newline or line
--separator character is considered to be part of the preceding
--statement. Newlines and separators within character constants are an
--exception: they do not end statements.
--
-- It is an error to end any statement with end-of-file: the last
--character of any input file should be a newline.
--
-- An empty statement is allowed, and may include whitespace. It is
--ignored.
--
-- A statement begins with zero or more labels, optionally followed by a
--key symbol which determines what kind of statement it is. The key
--symbol determines the syntax of the rest of the statement. If the
--symbol begins with a dot `.' then the statement is an assembler
--directive: typically valid for any computer. If the symbol begins with
--a letter the statement is an assembly language "instruction": it
--assembles into a machine language instruction. Different versions of
--`as' for different computers recognize different instructions. In
--fact, the same symbol may represent a different instruction in a
--different computer's assembly language.
--
-- A label is a symbol immediately followed by a colon (`:').
--Whitespace before a label or after a colon is permitted, but you may not
--have whitespace between a label's symbol and its colon. *Note Labels::.
--
-- For HPPA targets, labels need not be immediately followed by a
--colon, but the definition of a label must begin in column zero. This
--also implies that only one label may be defined on each line.
--
-- label: .directive followed by something
-- another_label: # This is an empty statement.
-- instruction operand_1, operand_2, ...
--
--
--File: as.info, Node: Constants, Prev: Statements, Up: Syntax
--
--3.6 Constants
--=============
--
--A constant is a number, written so that its value is known by
--inspection, without knowing any context. Like this:
-- .byte 74, 0112, 092, 0x4A, 0X4a, 'J, '\J # All the same value.
-- .ascii "Ring the bell\7" # A string constant.
-- .octa 0x123456789abcdef0123456789ABCDEF0 # A bignum.
-- .float 0f-314159265358979323846264338327\
-- 95028841971.693993751E-40 # - pi, a flonum.
--
--* Menu:
--
--* Characters:: Character Constants
--* Numbers:: Number Constants
--
--
--File: as.info, Node: Characters, Next: Numbers, Up: Constants
--
--3.6.1 Character Constants
---------------------------
--
--There are two kinds of character constants. A "character" stands for
--one character in one byte and its value may be used in numeric
--expressions. String constants (properly called string _literals_) are
--potentially many bytes and their values may not be used in arithmetic
--expressions.
--
--* Menu:
--
--* Strings:: Strings
--* Chars:: Characters
--
--
--File: as.info, Node: Strings, Next: Chars, Up: Characters
--
--3.6.1.1 Strings
--...............
--
--A "string" is written between double-quotes. It may contain
--double-quotes or null characters. The way to get special characters
--into a string is to "escape" these characters: precede them with a
--backslash `\' character. For example `\\' represents one backslash:
--the first `\' is an escape which tells `as' to interpret the second
--character literally as a backslash (which prevents `as' from
--recognizing the second `\' as an escape character). The complete list
--of escapes follows.
--
--`\b'
-- Mnemonic for backspace; for ASCII this is octal code 010.
--
--`\f'
-- Mnemonic for FormFeed; for ASCII this is octal code 014.
--
--`\n'
-- Mnemonic for newline; for ASCII this is octal code 012.
--
--`\r'
-- Mnemonic for carriage-Return; for ASCII this is octal code 015.
--
--`\t'
-- Mnemonic for horizontal Tab; for ASCII this is octal code 011.
--
--`\ DIGIT DIGIT DIGIT'
-- An octal character code. The numeric code is 3 octal digits. For
-- compatibility with other Unix systems, 8 and 9 are accepted as
-- digits: for example, `\008' has the value 010, and `\009' the
-- value 011.
--
--`\`x' HEX-DIGITS...'
-- A hex character code. All trailing hex digits are combined.
-- Either upper or lower case `x' works.
--
--`\\'
-- Represents one `\' character.
--
--`\"'
-- Represents one `"' character. Needed in strings to represent this
-- character, because an unescaped `"' would end the string.
--
--`\ ANYTHING-ELSE'
-- Any other character when escaped by `\' gives a warning, but
-- assembles as if the `\' was not present. The idea is that if you
-- used an escape sequence you clearly didn't want the literal
-- interpretation of the following character. However `as' has no
-- other interpretation, so `as' knows it is giving you the wrong
-- code and warns you of the fact.
--
-- Which characters are escapable, and what those escapes represent,
--varies widely among assemblers. The current set is what we think the
--BSD 4.2 assembler recognizes, and is a subset of what most C compilers
--recognize. If you are in doubt, do not use an escape sequence.
--
--
--File: as.info, Node: Chars, Prev: Strings, Up: Characters
--
--3.6.1.2 Characters
--..................
--
--A single character may be written as a single quote immediately
--followed by that character. The same escapes apply to characters as to
--strings. So if you want to write the character backslash, you must
--write `'\\' where the first `\' escapes the second `\'. As you can
--see, the quote is an acute accent, not a grave accent. A newline
--immediately following an acute accent is taken as a literal character
--and does not count as the end of a statement. The value of a character
--constant in a numeric expression is the machine's byte-wide code for
--that character. `as' assumes your character code is ASCII: `'A' means
--65, `'B' means 66, and so on.
--
--
--File: as.info, Node: Numbers, Prev: Characters, Up: Constants
--
--3.6.2 Number Constants
------------------------
--
--`as' distinguishes three kinds of numbers according to how they are
--stored in the target machine. _Integers_ are numbers that would fit
--into an `int' in the C language. _Bignums_ are integers, but they are
--stored in more than 32 bits. _Flonums_ are floating point numbers,
--described below.
--
--* Menu:
--
--* Integers:: Integers
--* Bignums:: Bignums
--* Flonums:: Flonums
--
--
--File: as.info, Node: Integers, Next: Bignums, Up: Numbers
--
--3.6.2.1 Integers
--................
--
--A binary integer is `0b' or `0B' followed by zero or more of the binary
--digits `01'.
--
-- An octal integer is `0' followed by zero or more of the octal digits
--(`01234567').
--
-- A decimal integer starts with a non-zero digit followed by zero or
--more digits (`0123456789').
--
-- A hexadecimal integer is `0x' or `0X' followed by one or more
--hexadecimal digits chosen from `0123456789abcdefABCDEF'.
--
-- Integers have the usual values. To denote a negative integer, use
--the prefix operator `-' discussed under expressions (*note Prefix
--Operators: Prefix Ops.).
--
--
--File: as.info, Node: Bignums, Next: Flonums, Prev: Integers, Up: Numbers
--
--3.6.2.2 Bignums
--...............
--
--A "bignum" has the same syntax and semantics as an integer except that
--the number (or its negative) takes more than 32 bits to represent in
--binary. The distinction is made because in some places integers are
--permitted while bignums are not.
--
--
--File: as.info, Node: Flonums, Prev: Bignums, Up: Numbers
--
--3.6.2.3 Flonums
--...............
--
--A "flonum" represents a floating point number. The translation is
--indirect: a decimal floating point number from the text is converted by
--`as' to a generic binary floating point number of more than sufficient
--precision. This generic floating point number is converted to a
--particular computer's floating point format (or formats) by a portion
--of `as' specialized to that computer.
--
-- A flonum is written by writing (in order)
-- * The digit `0'. (`0' is optional on the HPPA.)
--
-- * A letter, to tell `as' the rest of the number is a flonum. `e' is
-- recommended. Case is not important.
--
-- On the H8/300, Renesas / SuperH SH, and AMD 29K architectures, the
-- letter must be one of the letters `DFPRSX' (in upper or lower
-- case).
--
-- On the ARC, the letter must be one of the letters `DFRS' (in upper
-- or lower case).
--
-- On the Intel 960 architecture, the letter must be one of the
-- letters `DFT' (in upper or lower case).
--
-- On the HPPA architecture, the letter must be `E' (upper case only).
--
-- * An optional sign: either `+' or `-'.
--
-- * An optional "integer part": zero or more decimal digits.
--
-- * An optional "fractional part": `.' followed by zero or more
-- decimal digits.
--
-- * An optional exponent, consisting of:
--
-- * An `E' or `e'.
--
-- * Optional sign: either `+' or `-'.
--
-- * One or more decimal digits.
--
--
-- At least one of the integer part or the fractional part must be
--present. The floating point number has the usual base-10 value.
--
-- `as' does all processing using integers. Flonums are computed
--independently of any floating point hardware in the computer running
--`as'.
--
--
--File: as.info, Node: Sections, Next: Symbols, Prev: Syntax, Up: Top
--
--4 Sections and Relocation
--*************************
--
--* Menu:
--
--* Secs Background:: Background
--* Ld Sections:: Linker Sections
--* As Sections:: Assembler Internal Sections
--* Sub-Sections:: Sub-Sections
--* bss:: bss Section
--
--
--File: as.info, Node: Secs Background, Next: Ld Sections, Up: Sections
--
--4.1 Background
--==============
--
--Roughly, a section is a range of addresses, with no gaps; all data "in"
--those addresses is treated the same for some particular purpose. For
--example there may be a "read only" section.
--
-- The linker `ld' reads many object files (partial programs) and
--combines their contents to form a runnable program. When `as' emits an
--object file, the partial program is assumed to start at address 0.
--`ld' assigns the final addresses for the partial program, so that
--different partial programs do not overlap. This is actually an
--oversimplification, but it suffices to explain how `as' uses sections.
--
-- `ld' moves blocks of bytes of your program to their run-time
--addresses. These blocks slide to their run-time addresses as rigid
--units; their length does not change and neither does the order of bytes
--within them. Such a rigid unit is called a _section_. Assigning
--run-time addresses to sections is called "relocation". It includes the
--task of adjusting mentions of object-file addresses so they refer to
--the proper run-time addresses. For the H8/300, and for the Renesas /
--SuperH SH, `as' pads sections if needed to ensure they end on a word
--(sixteen bit) boundary.
--
-- An object file written by `as' has at least three sections, any of
--which may be empty. These are named "text", "data" and "bss" sections.
--
-- When it generates COFF or ELF output, `as' can also generate
--whatever other named sections you specify using the `.section'
--directive (*note `.section': Section.). If you do not use any
--directives that place output in the `.text' or `.data' sections, these
--sections still exist, but are empty.
--
-- When `as' generates SOM or ELF output for the HPPA, `as' can also
--generate whatever other named sections you specify using the `.space'
--and `.subspace' directives. See `HP9000 Series 800 Assembly Language
--Reference Manual' (HP 92432-90001) for details on the `.space' and
--`.subspace' assembler directives.
--
-- Additionally, `as' uses different names for the standard text, data,
--and bss sections when generating SOM output. Program text is placed
--into the `$CODE$' section, data into `$DATA$', and BSS into `$BSS$'.
--
-- Within the object file, the text section starts at address `0', the
--data section follows, and the bss section follows the data section.
--
-- When generating either SOM or ELF output files on the HPPA, the text
--section starts at address `0', the data section at address `0x4000000',
--and the bss section follows the data section.
--
-- To let `ld' know which data changes when the sections are relocated,
--and how to change that data, `as' also writes to the object file
--details of the relocation needed. To perform relocation `ld' must
--know, each time an address in the object file is mentioned:
-- * Where in the object file is the beginning of this reference to an
-- address?
--
-- * How long (in bytes) is this reference?
--
-- * Which section does the address refer to? What is the numeric
-- value of
-- (ADDRESS) - (START-ADDRESS OF SECTION)?
--
-- * Is the reference to an address "Program-Counter relative"?
--
-- In fact, every address `as' ever uses is expressed as
-- (SECTION) + (OFFSET INTO SECTION)
-- Further, most expressions `as' computes have this section-relative
--nature. (For some object formats, such as SOM for the HPPA, some
--expressions are symbol-relative instead.)
--
-- In this manual we use the notation {SECNAME N} to mean "offset N
--into section SECNAME."
--
-- Apart from text, data and bss sections you need to know about the
--"absolute" section. When `ld' mixes partial programs, addresses in the
--absolute section remain unchanged. For example, address `{absolute 0}'
--is "relocated" to run-time address 0 by `ld'. Although the linker
--never arranges two partial programs' data sections with overlapping
--addresses after linking, _by definition_ their absolute sections must
--overlap. Address `{absolute 239}' in one part of a program is always
--the same address when the program is running as address `{absolute
--239}' in any other part of the program.
--
-- The idea of sections is extended to the "undefined" section. Any
--address whose section is unknown at assembly time is by definition
--rendered {undefined U}--where U is filled in later. Since numbers are
--always defined, the only way to generate an undefined address is to
--mention an undefined symbol. A reference to a named common block would
--be such a symbol: its value is unknown at assembly time so it has
--section _undefined_.
--
-- By analogy the word _section_ is used to describe groups of sections
--in the linked program. `ld' puts all partial programs' text sections
--in contiguous addresses in the linked program. It is customary to
--refer to the _text section_ of a program, meaning all the addresses of
--all partial programs' text sections. Likewise for data and bss
--sections.
--
-- Some sections are manipulated by `ld'; others are invented for use
--of `as' and have no meaning except during assembly.
--
--
--File: as.info, Node: Ld Sections, Next: As Sections, Prev: Secs Background, Up: Sections
--
--4.2 Linker Sections
--===================
--
--`ld' deals with just four kinds of sections, summarized below.
--
--*named sections*
--*text section*
--*data section*
-- These sections hold your program. `as' and `ld' treat them as
-- separate but equal sections. Anything you can say of one section
-- is true of another. When the program is running, however, it is
-- customary for the text section to be unalterable. The text
-- section is often shared among processes: it contains instructions,
-- constants and the like. The data section of a running program is
-- usually alterable: for example, C variables would be stored in the
-- data section.
--
--*bss section*
-- This section contains zeroed bytes when your program begins
-- running. It is used to hold uninitialized variables or common
-- storage. The length of each partial program's bss section is
-- important, but because it starts out containing zeroed bytes there
-- is no need to store explicit zero bytes in the object file. The
-- bss section was invented to eliminate those explicit zeros from
-- object files.
--
--*absolute section*
-- Address 0 of this section is always "relocated" to runtime address
-- 0. This is useful if you want to refer to an address that `ld'
-- must not change when relocating. In this sense we speak of
-- absolute addresses being "unrelocatable": they do not change
-- during relocation.
--
--*undefined section*
-- This "section" is a catch-all for address references to objects
-- not in the preceding sections.
--
-- An idealized example of three relocatable sections follows. The
--example uses the traditional section names `.text' and `.data'. Memory
--addresses are on the horizontal axis.
--
-- +-----+----+--+
-- partial program # 1: |ttttt|dddd|00|
-- +-----+----+--+
--
-- text data bss
-- seg. seg. seg.
--
-- +---+---+---+
-- partial program # 2: |TTT|DDD|000|
-- +---+---+---+
--
-- +--+---+-----+--+----+---+-----+~~
-- linked program: | |TTT|ttttt| |dddd|DDD|00000|
-- +--+---+-----+--+----+---+-----+~~
--
-- addresses: 0 ...
--
--
--File: as.info, Node: As Sections, Next: Sub-Sections, Prev: Ld Sections, Up: Sections
--
--4.3 Assembler Internal Sections
--===============================
--
--These sections are meant only for the internal use of `as'. They have
--no meaning at run-time. You do not really need to know about these
--sections for most purposes; but they can be mentioned in `as' warning
--messages, so it might be helpful to have an idea of their meanings to
--`as'. These sections are used to permit the value of every expression
--in your assembly language program to be a section-relative address.
--
--ASSEMBLER-INTERNAL-LOGIC-ERROR!
-- An internal assembler logic error has been found. This means
-- there is a bug in the assembler.
--
--expr section
-- The assembler stores complex expression internally as combinations
-- of symbols. When it needs to represent an expression as a symbol,
-- it puts it in the expr section.
--
--
--File: as.info, Node: Sub-Sections, Next: bss, Prev: As Sections, Up: Sections
--
--4.4 Sub-Sections
--================
--
--Assembled bytes conventionally fall into two sections: text and data.
--You may have separate groups of data in named sections that you want to
--end up near to each other in the object file, even though they are not
--contiguous in the assembler source. `as' allows you to use
--"subsections" for this purpose. Within each section, there can be
--numbered subsections with values from 0 to 8192. Objects assembled
--into the same subsection go into the object file together with other
--objects in the same subsection. For example, a compiler might want to
--store constants in the text section, but might not want to have them
--interspersed with the program being assembled. In this case, the
--compiler could issue a `.text 0' before each section of code being
--output, and a `.text 1' before each group of constants being output.
--
--Subsections are optional. If you do not use subsections, everything
--goes in subsection number zero.
--
-- Each subsection is zero-padded up to a multiple of four bytes.
--(Subsections may be padded a different amount on different flavors of
--`as'.)
--
-- Subsections appear in your object file in numeric order, lowest
--numbered to highest. (All this to be compatible with other people's
--assemblers.) The object file contains no representation of
--subsections; `ld' and other programs that manipulate object files see
--no trace of them. They just see all your text subsections as a text
--section, and all your data subsections as a data section.
--
-- To specify which subsection you want subsequent statements assembled
--into, use a numeric argument to specify it, in a `.text EXPRESSION' or
--a `.data EXPRESSION' statement. When generating COFF output, you can
--also use an extra subsection argument with arbitrary named sections:
--`.section NAME, EXPRESSION'. When generating ELF output, you can also
--use the `.subsection' directive (*note SubSection::) to specify a
--subsection: `.subsection EXPRESSION'. EXPRESSION should be an absolute
--expression (*note Expressions::). If you just say `.text' then `.text
--0' is assumed. Likewise `.data' means `.data 0'. Assembly begins in
--`text 0'. For instance:
-- .text 0 # The default subsection is text 0 anyway.
-- .ascii "This lives in the first text subsection. *"
-- .text 1
-- .ascii "But this lives in the second text subsection."
-- .data 0
-- .ascii "This lives in the data section,"
-- .ascii "in the first data subsection."
-- .text 0
-- .ascii "This lives in the first text section,"
-- .ascii "immediately following the asterisk (*)."
--
-- Each section has a "location counter" incremented by one for every
--byte assembled into that section. Because subsections are merely a
--convenience restricted to `as' there is no concept of a subsection
--location counter. There is no way to directly manipulate a location
--counter--but the `.align' directive changes it, and any label
--definition captures its current value. The location counter of the
--section where statements are being assembled is said to be the "active"
--location counter.
--
--
--File: as.info, Node: bss, Prev: Sub-Sections, Up: Sections
--
--4.5 bss Section
--===============
--
--The bss section is used for local common variable storage. You may
--allocate address space in the bss section, but you may not dictate data
--to load into it before your program executes. When your program starts
--running, all the contents of the bss section are zeroed bytes.
--
-- The `.lcomm' pseudo-op defines a symbol in the bss section; see
--*Note `.lcomm': Lcomm.
--
-- The `.comm' pseudo-op may be used to declare a common symbol, which
--is another form of uninitialized symbol; see *Note `.comm': Comm.
--
-- When assembling for a target which supports multiple sections, such
--as ELF or COFF, you may switch into the `.bss' section and define
--symbols as usual; see *Note `.section': Section. You may only assemble
--zero values into the section. Typically the section will only contain
--symbol definitions and `.skip' directives (*note `.skip': Skip.).
--
--
--File: as.info, Node: Symbols, Next: Expressions, Prev: Sections, Up: Top
--
--5 Symbols
--*********
--
--Symbols are a central concept: the programmer uses symbols to name
--things, the linker uses symbols to link, and the debugger uses symbols
--to debug.
--
-- _Warning:_ `as' does not place symbols in the object file in the
-- same order they were declared. This may break some debuggers.
--
--* Menu:
--
--* Labels:: Labels
--* Setting Symbols:: Giving Symbols Other Values
--* Symbol Names:: Symbol Names
--* Dot:: The Special Dot Symbol
--* Symbol Attributes:: Symbol Attributes
--
--
--File: as.info, Node: Labels, Next: Setting Symbols, Up: Symbols
--
--5.1 Labels
--==========
--
--A "label" is written as a symbol immediately followed by a colon `:'.
--The symbol then represents the current value of the active location
--counter, and is, for example, a suitable instruction operand. You are
--warned if you use the same symbol to represent two different locations:
--the first definition overrides any other definitions.
--
-- On the HPPA, the usual form for a label need not be immediately
--followed by a colon, but instead must start in column zero. Only one
--label may be defined on a single line. To work around this, the HPPA
--version of `as' also provides a special directive `.label' for defining
--labels more flexibly.
--
--
--File: as.info, Node: Setting Symbols, Next: Symbol Names, Prev: Labels, Up: Symbols
--
--5.2 Giving Symbols Other Values
--===============================
--
--A symbol can be given an arbitrary value by writing a symbol, followed
--by an equals sign `=', followed by an expression (*note Expressions::).
--This is equivalent to using the `.set' directive. *Note `.set': Set.
--In the same way, using a double equals sign `='`=' here represents an
--equivalent of the `.eqv' directive. *Note `.eqv': Eqv.
--
-- Blackfin does not support symbol assignment with `='.
--
--
--File: as.info, Node: Symbol Names, Next: Dot, Prev: Setting Symbols, Up: Symbols
--
--5.3 Symbol Names
--================
--
--Symbol names begin with a letter or with one of `._'. On most
--machines, you can also use `$' in symbol names; exceptions are noted in
--*Note Machine Dependencies::. That character may be followed by any
--string of digits, letters, dollar signs (unless otherwise noted for a
--particular target machine), and underscores.
--
--Case of letters is significant: `foo' is a different symbol name than
--`Foo'.
--
-- Multibyte characters are supported. To generate a symbol name
--containing multibyte characters enclose it within double quotes and use
--escape codes. cf *Note Strings::. Generating a multibyte symbol name
--from a label is not currently supported.
--
-- Each symbol has exactly one name. Each name in an assembly language
--program refers to exactly one symbol. You may use that symbol name any
--number of times in a program.
--
--Local Symbol Names
--------------------
--
--A local symbol is any symbol beginning with certain local label
--prefixes. By default, the local label prefix is `.L' for ELF systems or
--`L' for traditional a.out systems, but each target may have its own set
--of local label prefixes. On the HPPA local symbols begin with `L$'.
--
-- Local symbols are defined and used within the assembler, but they are
--normally not saved in object files. Thus, they are not visible when
--debugging. You may use the `-L' option (*note Include Local Symbols:
--`-L': L.) to retain the local symbols in the object files.
--
--Local Labels
--------------
--
--Local labels help compilers and programmers use names temporarily.
--They create symbols which are guaranteed to be unique over the entire
--scope of the input source code and which can be referred to by a simple
--notation. To define a local label, write a label of the form `N:'
--(where N represents any positive integer). To refer to the most recent
--previous definition of that label write `Nb', using the same number as
--when you defined the label. To refer to the next definition of a local
--label, write `Nf'--the `b' stands for "backwards" and the `f' stands
--for "forwards".
--
-- There is no restriction on how you can use these labels, and you can
--reuse them too. So that it is possible to repeatedly define the same
--local label (using the same number `N'), although you can only refer to
--the most recently defined local label of that number (for a backwards
--reference) or the next definition of a specific local label for a
--forward reference. It is also worth noting that the first 10 local
--labels (`0:'...`9:') are implemented in a slightly more efficient
--manner than the others.
--
-- Here is an example:
--
-- 1: branch 1f
-- 2: branch 1b
-- 1: branch 2f
-- 2: branch 1b
--
-- Which is the equivalent of:
--
-- label_1: branch label_3
-- label_2: branch label_1
-- label_3: branch label_4
-- label_4: branch label_3
--
-- Local label names are only a notational device. They are immediately
--transformed into more conventional symbol names before the assembler
--uses them. The symbol names are stored in the symbol table, appear in
--error messages, and are optionally emitted to the object file. The
--names are constructed using these parts:
--
--`_local label prefix_'
-- All local symbols begin with the system-specific local label
-- prefix. Normally both `as' and `ld' forget symbols that start
-- with the local label prefix. These labels are used for symbols
-- you are never intended to see. If you use the `-L' option then
-- `as' retains these symbols in the object file. If you also
-- instruct `ld' to retain these symbols, you may use them in
-- debugging.
--
--`NUMBER'
-- This is the number that was used in the local label definition.
-- So if the label is written `55:' then the number is `55'.
--
--`C-B'
-- This unusual character is included so you do not accidentally
-- invent a symbol of the same name. The character has ASCII value
-- of `\002' (control-B).
--
--`_ordinal number_'
-- This is a serial number to keep the labels distinct. The first
-- definition of `0:' gets the number `1'. The 15th definition of
-- `0:' gets the number `15', and so on. Likewise the first
-- definition of `1:' gets the number `1' and its 15th definition
-- gets `15' as well.
--
-- So for example, the first `1:' may be named `.L1C-B1', and the 44th
--`3:' may be named `.L3C-B44'.
--
--Dollar Local Labels
---------------------
--
--`as' also supports an even more local form of local labels called
--dollar labels. These labels go out of scope (i.e., they become
--undefined) as soon as a non-local label is defined. Thus they remain
--valid for only a small region of the input source code. Normal local
--labels, by contrast, remain in scope for the entire file, or until they
--are redefined by another occurrence of the same local label.
--
-- Dollar labels are defined in exactly the same way as ordinary local
--labels, except that they have a dollar sign suffix to their numeric
--value, e.g., `55$:'.
--
-- They can also be distinguished from ordinary local labels by their
--transformed names which use ASCII character `\001' (control-A) as the
--magic character to distinguish them from ordinary labels. For example,
--the fifth definition of `6$' may be named `.L6C-A5'.
--
--
--File: as.info, Node: Dot, Next: Symbol Attributes, Prev: Symbol Names, Up: Symbols
--
--5.4 The Special Dot Symbol
--==========================
--
--The special symbol `.' refers to the current address that `as' is
--assembling into. Thus, the expression `melvin: .long .' defines
--`melvin' to contain its own address. Assigning a value to `.' is
--treated the same as a `.org' directive. Thus, the expression `.=.+4'
--is the same as saying `.space 4'.
--
--
--File: as.info, Node: Symbol Attributes, Prev: Dot, Up: Symbols
--
--5.5 Symbol Attributes
--=====================
--
--Every symbol has, as well as its name, the attributes "Value" and
--"Type". Depending on output format, symbols can also have auxiliary
--attributes.
--
-- If you use a symbol without defining it, `as' assumes zero for all
--these attributes, and probably won't warn you. This makes the symbol
--an externally defined symbol, which is generally what you would want.
--
--* Menu:
--
--* Symbol Value:: Value
--* Symbol Type:: Type
--
--
--* a.out Symbols:: Symbol Attributes: `a.out'
--
--* COFF Symbols:: Symbol Attributes for COFF
--
--* SOM Symbols:: Symbol Attributes for SOM
--
--
--File: as.info, Node: Symbol Value, Next: Symbol Type, Up: Symbol Attributes
--
--5.5.1 Value
-------------
--
--The value of a symbol is (usually) 32 bits. For a symbol which labels a
--location in the text, data, bss or absolute sections the value is the
--number of addresses from the start of that section to the label.
--Naturally for text, data and bss sections the value of a symbol changes
--as `ld' changes section base addresses during linking. Absolute
--symbols' values do not change during linking: that is why they are
--called absolute.
--
-- The value of an undefined symbol is treated in a special way. If it
--is 0 then the symbol is not defined in this assembler source file, and
--`ld' tries to determine its value from other files linked into the same
--program. You make this kind of symbol simply by mentioning a symbol
--name without defining it. A non-zero value represents a `.comm' common
--declaration. The value is how much common storage to reserve, in bytes
--(addresses). The symbol refers to the first address of the allocated
--storage.
--
--
--File: as.info, Node: Symbol Type, Next: a.out Symbols, Prev: Symbol Value, Up: Symbol Attributes
--
--5.5.2 Type
------------
--
--The type attribute of a symbol contains relocation (section)
--information, any flag settings indicating that a symbol is external, and
--(optionally), other information for linkers and debuggers. The exact
--format depends on the object-code output format in use.
--
--
--File: as.info, Node: a.out Symbols, Next: COFF Symbols, Prev: Symbol Type, Up: Symbol Attributes
--
--5.5.3 Symbol Attributes: `a.out'
----------------------------------
--
--* Menu:
--
--* Symbol Desc:: Descriptor
--* Symbol Other:: Other
--
--
--File: as.info, Node: Symbol Desc, Next: Symbol Other, Up: a.out Symbols
--
--5.5.3.1 Descriptor
--..................
--
--This is an arbitrary 16-bit value. You may establish a symbol's
--descriptor value by using a `.desc' statement (*note `.desc': Desc.).
--A descriptor value means nothing to `as'.
--
--
--File: as.info, Node: Symbol Other, Prev: Symbol Desc, Up: a.out Symbols
--
--5.5.3.2 Other
--.............
--
--This is an arbitrary 8-bit value. It means nothing to `as'.
--
--
--File: as.info, Node: COFF Symbols, Next: SOM Symbols, Prev: a.out Symbols, Up: Symbol Attributes
--
--5.5.4 Symbol Attributes for COFF
----------------------------------
--
--The COFF format supports a multitude of auxiliary symbol attributes;
--like the primary symbol attributes, they are set between `.def' and
--`.endef' directives.
--
--5.5.4.1 Primary Attributes
--..........................
--
--The symbol name is set with `.def'; the value and type, respectively,
--with `.val' and `.type'.
--
--5.5.4.2 Auxiliary Attributes
--............................
--
--The `as' directives `.dim', `.line', `.scl', `.size', `.tag', and
--`.weak' can generate auxiliary symbol table information for COFF.
--
--
--File: as.info, Node: SOM Symbols, Prev: COFF Symbols, Up: Symbol Attributes
--
--5.5.5 Symbol Attributes for SOM
---------------------------------
--
--The SOM format for the HPPA supports a multitude of symbol attributes
--set with the `.EXPORT' and `.IMPORT' directives.
--
-- The attributes are described in `HP9000 Series 800 Assembly Language
--Reference Manual' (HP 92432-90001) under the `IMPORT' and `EXPORT'
--assembler directive documentation.
--
--
--File: as.info, Node: Expressions, Next: Pseudo Ops, Prev: Symbols, Up: Top
--
--6 Expressions
--*************
--
--An "expression" specifies an address or numeric value. Whitespace may
--precede and/or follow an expression.
--
-- The result of an expression must be an absolute number, or else an
--offset into a particular section. If an expression is not absolute,
--and there is not enough information when `as' sees the expression to
--know its section, a second pass over the source program might be
--necessary to interpret the expression--but the second pass is currently
--not implemented. `as' aborts with an error message in this situation.
--
--* Menu:
--
--* Empty Exprs:: Empty Expressions
--* Integer Exprs:: Integer Expressions
--
--
--File: as.info, Node: Empty Exprs, Next: Integer Exprs, Up: Expressions
--
--6.1 Empty Expressions
--=====================
--
--An empty expression has no value: it is just whitespace or null.
--Wherever an absolute expression is required, you may omit the
--expression, and `as' assumes a value of (absolute) 0. This is
--compatible with other assemblers.
--
--
--File: as.info, Node: Integer Exprs, Prev: Empty Exprs, Up: Expressions
--
--6.2 Integer Expressions
--=======================
--
--An "integer expression" is one or more _arguments_ delimited by
--_operators_.
--
--* Menu:
--
--* Arguments:: Arguments
--* Operators:: Operators
--* Prefix Ops:: Prefix Operators
--* Infix Ops:: Infix Operators
--
--
--File: as.info, Node: Arguments, Next: Operators, Up: Integer Exprs
--
--6.2.1 Arguments
-----------------
--
--"Arguments" are symbols, numbers or subexpressions. In other contexts
--arguments are sometimes called "arithmetic operands". In this manual,
--to avoid confusing them with the "instruction operands" of the machine
--language, we use the term "argument" to refer to parts of expressions
--only, reserving the word "operand" to refer only to machine instruction
--operands.
--
-- Symbols are evaluated to yield {SECTION NNN} where SECTION is one of
--text, data, bss, absolute, or undefined. NNN is a signed, 2's
--complement 32 bit integer.
--
-- Numbers are usually integers.
--
-- A number can be a flonum or bignum. In this case, you are warned
--that only the low order 32 bits are used, and `as' pretends these 32
--bits are an integer. You may write integer-manipulating instructions
--that act on exotic constants, compatible with other assemblers.
--
-- Subexpressions are a left parenthesis `(' followed by an integer
--expression, followed by a right parenthesis `)'; or a prefix operator
--followed by an argument.
--
--
--File: as.info, Node: Operators, Next: Prefix Ops, Prev: Arguments, Up: Integer Exprs
--
--6.2.2 Operators
-----------------
--
--"Operators" are arithmetic functions, like `+' or `%'. Prefix
--operators are followed by an argument. Infix operators appear between
--their arguments. Operators may be preceded and/or followed by
--whitespace.
--
--
--File: as.info, Node: Prefix Ops, Next: Infix Ops, Prev: Operators, Up: Integer Exprs
--
--6.2.3 Prefix Operator
-----------------------
--
--`as' has the following "prefix operators". They each take one
--argument, which must be absolute.
--
--`-'
-- "Negation". Two's complement negation.
--
--`~'
-- "Complementation". Bitwise not.
--
--
--File: as.info, Node: Infix Ops, Prev: Prefix Ops, Up: Integer Exprs
--
--6.2.4 Infix Operators
-----------------------
--
--"Infix operators" take two arguments, one on either side. Operators
--have precedence, but operations with equal precedence are performed left
--to right. Apart from `+' or `-', both arguments must be absolute, and
--the result is absolute.
--
-- 1. Highest Precedence
--
-- `*'
-- "Multiplication".
--
-- `/'
-- "Division". Truncation is the same as the C operator `/'
--
-- `%'
-- "Remainder".
--
-- `<<'
-- "Shift Left". Same as the C operator `<<'.
--
-- `>>'
-- "Shift Right". Same as the C operator `>>'.
--
-- 2. Intermediate precedence
--
-- `|'
-- "Bitwise Inclusive Or".
--
-- `&'
-- "Bitwise And".
--
-- `^'
-- "Bitwise Exclusive Or".
--
-- `!'
-- "Bitwise Or Not".
--
-- 3. Low Precedence
--
-- `+'
-- "Addition". If either argument is absolute, the result has
-- the section of the other argument. You may not add together
-- arguments from different sections.
--
-- `-'
-- "Subtraction". If the right argument is absolute, the result
-- has the section of the left argument. If both arguments are
-- in the same section, the result is absolute. You may not
-- subtract arguments from different sections.
--
-- `=='
-- "Is Equal To"
--
-- `<>'
-- `!='
-- "Is Not Equal To"
--
-- `<'
-- "Is Less Than"
--
-- `>'
-- "Is Greater Than"
--
-- `>='
-- "Is Greater Than Or Equal To"
--
-- `<='
-- "Is Less Than Or Equal To"
--
-- The comparison operators can be used as infix operators. A
-- true results has a value of -1 whereas a false result has a
-- value of 0. Note, these operators perform signed
-- comparisons.
--
-- 4. Lowest Precedence
--
-- `&&'
-- "Logical And".
--
-- `||'
-- "Logical Or".
--
-- These two logical operations can be used to combine the
-- results of sub expressions. Note, unlike the comparison
-- operators a true result returns a value of 1 but a false
-- results does still return 0. Also note that the logical or
-- operator has a slightly lower precedence than logical and.
--
--
-- In short, it's only meaningful to add or subtract the _offsets_ in an
--address; you can only have a defined section in one of the two
--arguments.
--
--
--File: as.info, Node: Pseudo Ops, Next: Object Attributes, Prev: Expressions, Up: Top
--
--7 Assembler Directives
--**********************
--
--All assembler directives have names that begin with a period (`.').
--The rest of the name is letters, usually in lower case.
--
-- This chapter discusses directives that are available regardless of
--the target machine configuration for the GNU assembler. Some machine
--configurations provide additional directives. *Note Machine
--Dependencies::.
--
--* Menu:
--
--* Abort:: `.abort'
--
--* ABORT (COFF):: `.ABORT'
--
--* Align:: `.align ABS-EXPR , ABS-EXPR'
--* Altmacro:: `.altmacro'
--* Ascii:: `.ascii "STRING"'...
--* Asciz:: `.asciz "STRING"'...
--* Balign:: `.balign ABS-EXPR , ABS-EXPR'
--* Bundle directives:: `.bundle_align_mode ABS-EXPR', `.bundle_lock', `.bundle_unlock'
--* Byte:: `.byte EXPRESSIONS'
--* CFI directives:: `.cfi_startproc [simple]', `.cfi_endproc', etc.
--* Comm:: `.comm SYMBOL , LENGTH '
--* Data:: `.data SUBSECTION'
--
--* Def:: `.def NAME'
--
--* Desc:: `.desc SYMBOL, ABS-EXPRESSION'
--
--* Dim:: `.dim'
--
--* Double:: `.double FLONUMS'
--* Eject:: `.eject'
--* Else:: `.else'
--* Elseif:: `.elseif'
--* End:: `.end'
--
--* Endef:: `.endef'
--
--* Endfunc:: `.endfunc'
--* Endif:: `.endif'
--* Equ:: `.equ SYMBOL, EXPRESSION'
--* Equiv:: `.equiv SYMBOL, EXPRESSION'
--* Eqv:: `.eqv SYMBOL, EXPRESSION'
--* Err:: `.err'
--* Error:: `.error STRING'
--* Exitm:: `.exitm'
--* Extern:: `.extern'
--* Fail:: `.fail'
--* File:: `.file'
--* Fill:: `.fill REPEAT , SIZE , VALUE'
--* Float:: `.float FLONUMS'
--* Func:: `.func'
--* Global:: `.global SYMBOL', `.globl SYMBOL'
--
--* Gnu_attribute:: `.gnu_attribute TAG,VALUE'
--* Hidden:: `.hidden NAMES'
--
--* hword:: `.hword EXPRESSIONS'
--* Ident:: `.ident'
--* If:: `.if ABSOLUTE EXPRESSION'
--* Incbin:: `.incbin "FILE"[,SKIP[,COUNT]]'
--* Include:: `.include "FILE"'
--* Int:: `.int EXPRESSIONS'
--
--* Internal:: `.internal NAMES'
--
--* Irp:: `.irp SYMBOL,VALUES'...
--* Irpc:: `.irpc SYMBOL,VALUES'...
--* Lcomm:: `.lcomm SYMBOL , LENGTH'
--* Lflags:: `.lflags'
--
--* Line:: `.line LINE-NUMBER'
--
--* Linkonce:: `.linkonce [TYPE]'
--* List:: `.list'
--* Ln:: `.ln LINE-NUMBER'
--* Loc:: `.loc FILENO LINENO'
--* Loc_mark_labels:: `.loc_mark_labels ENABLE'
--
--* Local:: `.local NAMES'
--
--* Long:: `.long EXPRESSIONS'
--
--* Macro:: `.macro NAME ARGS'...
--* MRI:: `.mri VAL'
--* Noaltmacro:: `.noaltmacro'
--* Nolist:: `.nolist'
--* Octa:: `.octa BIGNUMS'
--* Offset:: `.offset LOC'
--* Org:: `.org NEW-LC, FILL'
--* P2align:: `.p2align ABS-EXPR, ABS-EXPR, ABS-EXPR'
--
--* PopSection:: `.popsection'
--* Previous:: `.previous'
--
--* Print:: `.print STRING'
--
--* Protected:: `.protected NAMES'
--
--* Psize:: `.psize LINES, COLUMNS'
--* Purgem:: `.purgem NAME'
--
--* PushSection:: `.pushsection NAME'
--
--* Quad:: `.quad BIGNUMS'
--* Reloc:: `.reloc OFFSET, RELOC_NAME[, EXPRESSION]'
--* Rept:: `.rept COUNT'
--* Sbttl:: `.sbttl "SUBHEADING"'
--
--* Scl:: `.scl CLASS'
--
--* Section:: `.section NAME[, FLAGS]'
--
--* Set:: `.set SYMBOL, EXPRESSION'
--* Short:: `.short EXPRESSIONS'
--* Single:: `.single FLONUMS'
--
--* Size:: `.size [NAME , EXPRESSION]'
--
--* Skip:: `.skip SIZE , FILL'
--
--* Sleb128:: `.sleb128 EXPRESSIONS'
--
--* Space:: `.space SIZE , FILL'
--
--* Stab:: `.stabd, .stabn, .stabs'
--
--* String:: `.string "STR"', `.string8 "STR"', `.string16 "STR"', `.string32 "STR"', `.string64 "STR"'
--* Struct:: `.struct EXPRESSION'
--
--* SubSection:: `.subsection'
--* Symver:: `.symver NAME,NAME2@NODENAME'
--
--
--* Tag:: `.tag STRUCTNAME'
--
--* Text:: `.text SUBSECTION'
--* Title:: `.title "HEADING"'
--
--* Type:: `.type <INT | NAME , TYPE DESCRIPTION>'
--
--* Uleb128:: `.uleb128 EXPRESSIONS'
--
--* Val:: `.val ADDR'
--
--
--* Version:: `.version "STRING"'
--* VTableEntry:: `.vtable_entry TABLE, OFFSET'
--* VTableInherit:: `.vtable_inherit CHILD, PARENT'
--
--* Warning:: `.warning STRING'
--* Weak:: `.weak NAMES'
--* Weakref:: `.weakref ALIAS, SYMBOL'
--* Word:: `.word EXPRESSIONS'
--* Deprecated:: Deprecated Directives
--
--
--File: as.info, Node: Abort, Next: ABORT (COFF), Up: Pseudo Ops
--
--7.1 `.abort'
--============
--
--This directive stops the assembly immediately. It is for compatibility
--with other assemblers. The original idea was that the assembly
--language source would be piped into the assembler. If the sender of
--the source quit, it could use this directive tells `as' to quit also.
--One day `.abort' will not be supported.
--
--
--File: as.info, Node: ABORT (COFF), Next: Align, Prev: Abort, Up: Pseudo Ops
--
--7.2 `.ABORT' (COFF)
--===================
--
--When producing COFF output, `as' accepts this directive as a synonym
--for `.abort'.
--
--
--File: as.info, Node: Align, Next: Altmacro, Prev: ABORT (COFF), Up: Pseudo Ops
--
--7.3 `.align ABS-EXPR, ABS-EXPR, ABS-EXPR'
--=========================================
--
--Pad the location counter (in the current subsection) to a particular
--storage boundary. The first expression (which must be absolute) is the
--alignment required, as described below.
--
-- The second expression (also absolute) gives the fill value to be
--stored in the padding bytes. It (and the comma) may be omitted. If it
--is omitted, the padding bytes are normally zero. However, on some
--systems, if the section is marked as containing code and the fill value
--is omitted, the space is filled with no-op instructions.
--
-- The third expression is also absolute, and is also optional. If it
--is present, it is the maximum number of bytes that should be skipped by
--this alignment directive. If doing the alignment would require
--skipping more bytes than the specified maximum, then the alignment is
--not done at all. You can omit the fill value (the second argument)
--entirely by simply using two commas after the required alignment; this
--can be useful if you want the alignment to be filled with no-op
--instructions when appropriate.
--
-- The way the required alignment is specified varies from system to
--system. For the arc, hppa, i386 using ELF, i860, iq2000, m68k, or32,
--s390, sparc, tic4x, tic80 and xtensa, the first expression is the
--alignment request in bytes. For example `.align 8' advances the
--location counter until it is a multiple of 8. If the location counter
--is already a multiple of 8, no change is needed. For the tic54x, the
--first expression is the alignment request in words.
--
-- For other systems, including ppc, i386 using a.out format, arm and
--strongarm, it is the number of low-order zero bits the location counter
--must have after advancement. For example `.align 3' advances the
--location counter until it a multiple of 8. If the location counter is
--already a multiple of 8, no change is needed.
--
-- This inconsistency is due to the different behaviors of the various
--native assemblers for these systems which GAS must emulate. GAS also
--provides `.balign' and `.p2align' directives, described later, which
--have a consistent behavior across all architectures (but are specific
--to GAS).
--
--
--File: as.info, Node: Altmacro, Next: Ascii, Prev: Align, Up: Pseudo Ops
--
--7.4 `.altmacro'
--===============
--
--Enable alternate macro mode, enabling:
--
--`LOCAL NAME [ , ... ]'
-- One additional directive, `LOCAL', is available. It is used to
-- generate a string replacement for each of the NAME arguments, and
-- replace any instances of NAME in each macro expansion. The
-- replacement string is unique in the assembly, and different for
-- each separate macro expansion. `LOCAL' allows you to write macros
-- that define symbols, without fear of conflict between separate
-- macro expansions.
--
--`String delimiters'
-- You can write strings delimited in these other ways besides
-- `"STRING"':
--
-- `'STRING''
-- You can delimit strings with single-quote characters.
--
-- `<STRING>'
-- You can delimit strings with matching angle brackets.
--
--`single-character string escape'
-- To include any single character literally in a string (even if the
-- character would otherwise have some special meaning), you can
-- prefix the character with `!' (an exclamation mark). For example,
-- you can write `<4.3 !> 5.4!!>' to get the literal text `4.3 >
-- 5.4!'.
--
--`Expression results as strings'
-- You can write `%EXPR' to evaluate the expression EXPR and use the
-- result as a string.
--
--
--File: as.info, Node: Ascii, Next: Asciz, Prev: Altmacro, Up: Pseudo Ops
--
--7.5 `.ascii "STRING"'...
--========================
--
--`.ascii' expects zero or more string literals (*note Strings::)
--separated by commas. It assembles each string (with no automatic
--trailing zero byte) into consecutive addresses.
--
--
--File: as.info, Node: Asciz, Next: Balign, Prev: Ascii, Up: Pseudo Ops
--
--7.6 `.asciz "STRING"'...
--========================
--
--`.asciz' is just like `.ascii', but each string is followed by a zero
--byte. The "z" in `.asciz' stands for "zero".
--
--
--File: as.info, Node: Balign, Next: Bundle directives, Prev: Asciz, Up: Pseudo Ops
--
--7.7 `.balign[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR'
--==============================================
--
--Pad the location counter (in the current subsection) to a particular
--storage boundary. The first expression (which must be absolute) is the
--alignment request in bytes. For example `.balign 8' advances the
--location counter until it is a multiple of 8. If the location counter
--is already a multiple of 8, no change is needed.
--
-- The second expression (also absolute) gives the fill value to be
--stored in the padding bytes. It (and the comma) may be omitted. If it
--is omitted, the padding bytes are normally zero. However, on some
--systems, if the section is marked as containing code and the fill value
--is omitted, the space is filled with no-op instructions.
--
-- The third expression is also absolute, and is also optional. If it
--is present, it is the maximum number of bytes that should be skipped by
--this alignment directive. If doing the alignment would require
--skipping more bytes than the specified maximum, then the alignment is
--not done at all. You can omit the fill value (the second argument)
--entirely by simply using two commas after the required alignment; this
--can be useful if you want the alignment to be filled with no-op
--instructions when appropriate.
--
-- The `.balignw' and `.balignl' directives are variants of the
--`.balign' directive. The `.balignw' directive treats the fill pattern
--as a two byte word value. The `.balignl' directives treats the fill
--pattern as a four byte longword value. For example, `.balignw
--4,0x368d' will align to a multiple of 4. If it skips two bytes, they
--will be filled in with the value 0x368d (the exact placement of the
--bytes depends upon the endianness of the processor). If it skips 1 or
--3 bytes, the fill value is undefined.
--
--
--File: as.info, Node: Bundle directives, Next: Byte, Prev: Balign, Up: Pseudo Ops
--
--7.8 `.bundle_align_mode ABS-EXPR'
--=================================
--
--`.bundle_align_mode' enables or disables "aligned instruction bundle"
--mode. In this mode, sequences of adjacent instructions are grouped
--into fixed-sized "bundles". If the argument is zero, this mode is
--disabled (which is the default state). If the argument it not zero, it
--gives the size of an instruction bundle as a power of two (as for the
--`.p2align' directive, *note P2align::).
--
-- For some targets, it's an ABI requirement that no instruction may
--span a certain aligned boundary. A "bundle" is simply a sequence of
--instructions that starts on an aligned boundary. For example, if
--ABS-EXPR is `5' then the bundle size is 32, so each aligned chunk of 32
--bytes is a bundle. When aligned instruction bundle mode is in effect,
--no single instruction may span a boundary between bundles. If an
--instruction would start too close to the end of a bundle for the length
--of that particular instruction to fit within the bundle, then the space
--at the end of that bundle is filled with no-op instructions so the
--instruction starts in the next bundle. As a corollary, it's an error
--if any single instruction's encoding is longer than the bundle size.
--
--7.9 `.bundle_lock' and `.bundle_unlock'
--=======================================
--
--The `.bundle_lock' and directive `.bundle_unlock' directives allow
--explicit control over instruction bundle padding. These directives are
--only valid when `.bundle_align_mode' has been used to enable aligned
--instruction bundle mode. It's an error if they appear when
--`.bundle_align_mode' has not been used at all, or when the last
--directive was `.bundle_align_mode 0'.
--
-- For some targets, it's an ABI requirement that certain instructions
--may appear only as part of specified permissible sequences of multiple
--instructions, all within the same bundle. A pair of `.bundle_lock' and
--`.bundle_unlock' directives define a "bundle-locked" instruction
--sequence. For purposes of aligned instruction bundle mode, a sequence
--starting with `.bundle_lock' and ending with `.bundle_unlock' is
--treated as a single instruction. That is, the entire sequence must fit
--into a single bundle and may not span a bundle boundary. If necessary,
--no-op instructions will be inserted before the first instruction of the
--sequence so that the whole sequence starts on an aligned bundle
--boundary. It's an error if the sequence is longer than the bundle size.
--
-- For convenience when using `.bundle_lock' and `.bundle_unlock'
--inside assembler macros (*note Macro::), bundle-locked sequences may be
--nested. That is, a second `.bundle_lock' directive before the next
--`.bundle_unlock' directive has no effect except that it must be matched
--by another closing `.bundle_unlock' so that there is the same number of
--`.bundle_lock' and `.bundle_unlock' directives.
--
--
--File: as.info, Node: Byte, Next: CFI directives, Prev: Bundle directives, Up: Pseudo Ops
--
--7.10 `.byte EXPRESSIONS'
--========================
--
--`.byte' expects zero or more expressions, separated by commas. Each
--expression is assembled into the next byte.
--
--
--File: as.info, Node: CFI directives, Next: Comm, Prev: Byte, Up: Pseudo Ops
--
--7.11 `.cfi_sections SECTION_LIST'
--=================================
--
--`.cfi_sections' may be used to specify whether CFI directives should
--emit `.eh_frame' section and/or `.debug_frame' section. If
--SECTION_LIST is `.eh_frame', `.eh_frame' is emitted, if SECTION_LIST is
--`.debug_frame', `.debug_frame' is emitted. To emit both use
--`.eh_frame, .debug_frame'. The default if this directive is not used
--is `.cfi_sections .eh_frame'.
--
--7.12 `.cfi_startproc [simple]'
--==============================
--
--`.cfi_startproc' is used at the beginning of each function that should
--have an entry in `.eh_frame'. It initializes some internal data
--structures. Don't forget to close the function by `.cfi_endproc'.
--
-- Unless `.cfi_startproc' is used along with parameter `simple' it
--also emits some architecture dependent initial CFI instructions.
--
--7.13 `.cfi_endproc'
--===================
--
--`.cfi_endproc' is used at the end of a function where it closes its
--unwind entry previously opened by `.cfi_startproc', and emits it to
--`.eh_frame'.
--
--7.14 `.cfi_personality ENCODING [, EXP]'
--========================================
--
--`.cfi_personality' defines personality routine and its encoding.
--ENCODING must be a constant determining how the personality should be
--encoded. If it is 255 (`DW_EH_PE_omit'), second argument is not
--present, otherwise second argument should be a constant or a symbol
--name. When using indirect encodings, the symbol provided should be the
--location where personality can be loaded from, not the personality
--routine itself. The default after `.cfi_startproc' is
--`.cfi_personality 0xff', no personality routine.
--
--7.15 `.cfi_lsda ENCODING [, EXP]'
--=================================
--
--`.cfi_lsda' defines LSDA and its encoding. ENCODING must be a constant
--determining how the LSDA should be encoded. If it is 255
--(`DW_EH_PE_omit'), second argument is not present, otherwise second
--argument should be a constant or a symbol name. The default after
--`.cfi_startproc' is `.cfi_lsda 0xff', no LSDA.
--
--7.16 `.cfi_def_cfa REGISTER, OFFSET'
--====================================
--
--`.cfi_def_cfa' defines a rule for computing CFA as: take address from
--REGISTER and add OFFSET to it.
--
--7.17 `.cfi_def_cfa_register REGISTER'
--=====================================
--
--`.cfi_def_cfa_register' modifies a rule for computing CFA. From now on
--REGISTER will be used instead of the old one. Offset remains the same.
--
--7.18 `.cfi_def_cfa_offset OFFSET'
--=================================
--
--`.cfi_def_cfa_offset' modifies a rule for computing CFA. Register
--remains the same, but OFFSET is new. Note that it is the absolute
--offset that will be added to a defined register to compute CFA address.
--
--7.19 `.cfi_adjust_cfa_offset OFFSET'
--====================================
--
--Same as `.cfi_def_cfa_offset' but OFFSET is a relative value that is
--added/substracted from the previous offset.
--
--7.20 `.cfi_offset REGISTER, OFFSET'
--===================================
--
--Previous value of REGISTER is saved at offset OFFSET from CFA.
--
--7.21 `.cfi_rel_offset REGISTER, OFFSET'
--=======================================
--
--Previous value of REGISTER is saved at offset OFFSET from the current
--CFA register. This is transformed to `.cfi_offset' using the known
--displacement of the CFA register from the CFA. This is often easier to
--use, because the number will match the code it's annotating.
--
--7.22 `.cfi_register REGISTER1, REGISTER2'
--=========================================
--
--Previous value of REGISTER1 is saved in register REGISTER2.
--
--7.23 `.cfi_restore REGISTER'
--============================
--
--`.cfi_restore' says that the rule for REGISTER is now the same as it
--was at the beginning of the function, after all initial instruction
--added by `.cfi_startproc' were executed.
--
--7.24 `.cfi_undefined REGISTER'
--==============================
--
--From now on the previous value of REGISTER can't be restored anymore.
--
--7.25 `.cfi_same_value REGISTER'
--===============================
--
--Current value of REGISTER is the same like in the previous frame, i.e.
--no restoration needed.
--
--7.26 `.cfi_remember_state',
--===========================
--
--First save all current rules for all registers by `.cfi_remember_state',
--then totally screw them up by subsequent `.cfi_*' directives and when
--everything is hopelessly bad, use `.cfi_restore_state' to restore the
--previous saved state.
--
--7.27 `.cfi_return_column REGISTER'
--==================================
--
--Change return column REGISTER, i.e. the return address is either
--directly in REGISTER or can be accessed by rules for REGISTER.
--
--7.28 `.cfi_signal_frame'
--========================
--
--Mark current function as signal trampoline.
--
--7.29 `.cfi_window_save'
--=======================
--
--SPARC register window has been saved.
--
--7.30 `.cfi_escape' EXPRESSION[, ...]
--====================================
--
--Allows the user to add arbitrary bytes to the unwind info. One might
--use this to add OS-specific CFI opcodes, or generic CFI opcodes that
--GAS does not yet support.
--
--7.31 `.cfi_val_encoded_addr REGISTER, ENCODING, LABEL'
--======================================================
--
--The current value of REGISTER is LABEL. The value of LABEL will be
--encoded in the output file according to ENCODING; see the description
--of `.cfi_personality' for details on this encoding.
--
-- The usefulness of equating a register to a fixed label is probably
--limited to the return address register. Here, it can be useful to mark
--a code segment that has only one return address which is reached by a
--direct branch and no copy of the return address exists in memory or
--another register.
--
--
--File: as.info, Node: Comm, Next: Data, Prev: CFI directives, Up: Pseudo Ops
--
--7.32 `.comm SYMBOL , LENGTH '
--=============================
--
--`.comm' declares a common symbol named SYMBOL. When linking, a common
--symbol in one object file may be merged with a defined or common symbol
--of the same name in another object file. If `ld' does not see a
--definition for the symbol-just one or more common symbols-then it will
--allocate LENGTH bytes of uninitialized memory. LENGTH must be an
--absolute expression. If `ld' sees multiple common symbols with the
--same name, and they do not all have the same size, it will allocate
--space using the largest size.
--
-- When using ELF or (as a GNU extension) PE, the `.comm' directive
--takes an optional third argument. This is the desired alignment of the
--symbol, specified for ELF as a byte boundary (for example, an alignment
--of 16 means that the least significant 4 bits of the address should be
--zero), and for PE as a power of two (for example, an alignment of 5
--means aligned to a 32-byte boundary). The alignment must be an
--absolute expression, and it must be a power of two. If `ld' allocates
--uninitialized memory for the common symbol, it will use the alignment
--when placing the symbol. If no alignment is specified, `as' will set
--the alignment to the largest power of two less than or equal to the
--size of the symbol, up to a maximum of 16 on ELF, or the default
--section alignment of 4 on PE(1).
--
-- The syntax for `.comm' differs slightly on the HPPA. The syntax is
--`SYMBOL .comm, LENGTH'; SYMBOL is optional.
--
-- ---------- Footnotes ----------
--
-- (1) This is not the same as the executable image file alignment
--controlled by `ld''s `--section-alignment' option; image file sections
--in PE are aligned to multiples of 4096, which is far too large an
--alignment for ordinary variables. It is rather the default alignment
--for (non-debug) sections within object (`*.o') files, which are less
--strictly aligned.
--
--
--File: as.info, Node: Data, Next: Def, Prev: Comm, Up: Pseudo Ops
--
--7.33 `.data SUBSECTION'
--=======================
--
--`.data' tells `as' to assemble the following statements onto the end of
--the data subsection numbered SUBSECTION (which is an absolute
--expression). If SUBSECTION is omitted, it defaults to zero.
--
--
--File: as.info, Node: Def, Next: Desc, Prev: Data, Up: Pseudo Ops
--
--7.34 `.def NAME'
--================
--
--Begin defining debugging information for a symbol NAME; the definition
--extends until the `.endef' directive is encountered.
--
--
--File: as.info, Node: Desc, Next: Dim, Prev: Def, Up: Pseudo Ops
--
--7.35 `.desc SYMBOL, ABS-EXPRESSION'
--===================================
--
--This directive sets the descriptor of the symbol (*note Symbol
--Attributes::) to the low 16 bits of an absolute expression.
--
-- The `.desc' directive is not available when `as' is configured for
--COFF output; it is only for `a.out' or `b.out' object format. For the
--sake of compatibility, `as' accepts it, but produces no output, when
--configured for COFF.
--
--
--File: as.info, Node: Dim, Next: Double, Prev: Desc, Up: Pseudo Ops
--
--7.36 `.dim'
--===========
--
--This directive is generated by compilers to include auxiliary debugging
--information in the symbol table. It is only permitted inside
--`.def'/`.endef' pairs.
--
--
--File: as.info, Node: Double, Next: Eject, Prev: Dim, Up: Pseudo Ops
--
--7.37 `.double FLONUMS'
--======================
--
--`.double' expects zero or more flonums, separated by commas. It
--assembles floating point numbers. The exact kind of floating point
--numbers emitted depends on how `as' is configured. *Note Machine
--Dependencies::.
--
--
--File: as.info, Node: Eject, Next: Else, Prev: Double, Up: Pseudo Ops
--
--7.38 `.eject'
--=============
--
--Force a page break at this point, when generating assembly listings.
--
--
--File: as.info, Node: Else, Next: Elseif, Prev: Eject, Up: Pseudo Ops
--
--7.39 `.else'
--============
--
--`.else' is part of the `as' support for conditional assembly; see *Note
--`.if': If. It marks the beginning of a section of code to be assembled
--if the condition for the preceding `.if' was false.
--
--
--File: as.info, Node: Elseif, Next: End, Prev: Else, Up: Pseudo Ops
--
--7.40 `.elseif'
--==============
--
--`.elseif' is part of the `as' support for conditional assembly; see
--*Note `.if': If. It is shorthand for beginning a new `.if' block that
--would otherwise fill the entire `.else' section.
--
--
--File: as.info, Node: End, Next: Endef, Prev: Elseif, Up: Pseudo Ops
--
--7.41 `.end'
--===========
--
--`.end' marks the end of the assembly file. `as' does not process
--anything in the file past the `.end' directive.
--
--
--File: as.info, Node: Endef, Next: Endfunc, Prev: End, Up: Pseudo Ops
--
--7.42 `.endef'
--=============
--
--This directive flags the end of a symbol definition begun with `.def'.
--
--
--File: as.info, Node: Endfunc, Next: Endif, Prev: Endef, Up: Pseudo Ops
--
--7.43 `.endfunc'
--===============
--
--`.endfunc' marks the end of a function specified with `.func'.
--
--
--File: as.info, Node: Endif, Next: Equ, Prev: Endfunc, Up: Pseudo Ops
--
--7.44 `.endif'
--=============
--
--`.endif' is part of the `as' support for conditional assembly; it marks
--the end of a block of code that is only assembled conditionally. *Note
--`.if': If.
--
--
--File: as.info, Node: Equ, Next: Equiv, Prev: Endif, Up: Pseudo Ops
--
--7.45 `.equ SYMBOL, EXPRESSION'
--==============================
--
--This directive sets the value of SYMBOL to EXPRESSION. It is
--synonymous with `.set'; see *Note `.set': Set.
--
-- The syntax for `equ' on the HPPA is `SYMBOL .equ EXPRESSION'.
--
-- The syntax for `equ' on the Z80 is `SYMBOL equ EXPRESSION'. On the
--Z80 it is an eror if SYMBOL is already defined, but the symbol is not
--protected from later redefinition. Compare *Note Equiv::.
--
--
--File: as.info, Node: Equiv, Next: Eqv, Prev: Equ, Up: Pseudo Ops
--
--7.46 `.equiv SYMBOL, EXPRESSION'
--================================
--
--The `.equiv' directive is like `.equ' and `.set', except that the
--assembler will signal an error if SYMBOL is already defined. Note a
--symbol which has been referenced but not actually defined is considered
--to be undefined.
--
-- Except for the contents of the error message, this is roughly
--equivalent to
-- .ifdef SYM
-- .err
-- .endif
-- .equ SYM,VAL
-- plus it protects the symbol from later redefinition.
--
--
--File: as.info, Node: Eqv, Next: Err, Prev: Equiv, Up: Pseudo Ops
--
--7.47 `.eqv SYMBOL, EXPRESSION'
--==============================
--
--The `.eqv' directive is like `.equiv', but no attempt is made to
--evaluate the expression or any part of it immediately. Instead each
--time the resulting symbol is used in an expression, a snapshot of its
--current value is taken.
--
--
--File: as.info, Node: Err, Next: Error, Prev: Eqv, Up: Pseudo Ops
--
--7.48 `.err'
--===========
--
--If `as' assembles a `.err' directive, it will print an error message
--and, unless the `-Z' option was used, it will not generate an object
--file. This can be used to signal an error in conditionally compiled
--code.
--
--
--File: as.info, Node: Error, Next: Exitm, Prev: Err, Up: Pseudo Ops
--
--7.49 `.error "STRING"'
--======================
--
--Similarly to `.err', this directive emits an error, but you can specify
--a string that will be emitted as the error message. If you don't
--specify the message, it defaults to `".error directive invoked in
--source file"'. *Note Error and Warning Messages: Errors.
--
-- .error "This code has not been assembled and tested."
--
--
--File: as.info, Node: Exitm, Next: Extern, Prev: Error, Up: Pseudo Ops
--
--7.50 `.exitm'
--=============
--
--Exit early from the current macro definition. *Note Macro::.
--
--
--File: as.info, Node: Extern, Next: Fail, Prev: Exitm, Up: Pseudo Ops
--
--7.51 `.extern'
--==============
--
--`.extern' is accepted in the source program--for compatibility with
--other assemblers--but it is ignored. `as' treats all undefined symbols
--as external.
--
--
--File: as.info, Node: Fail, Next: File, Prev: Extern, Up: Pseudo Ops
--
--7.52 `.fail EXPRESSION'
--=======================
--
--Generates an error or a warning. If the value of the EXPRESSION is 500
--or more, `as' will print a warning message. If the value is less than
--500, `as' will print an error message. The message will include the
--value of EXPRESSION. This can occasionally be useful inside complex
--nested macros or conditional assembly.
--
--
--File: as.info, Node: File, Next: Fill, Prev: Fail, Up: Pseudo Ops
--
--7.53 `.file'
--============
--
--There are two different versions of the `.file' directive. Targets
--that support DWARF2 line number information use the DWARF2 version of
--`.file'. Other targets use the default version.
--
--Default Version
-----------------
--
--This version of the `.file' directive tells `as' that we are about to
--start a new logical file. The syntax is:
--
-- .file STRING
--
-- STRING is the new file name. In general, the filename is recognized
--whether or not it is surrounded by quotes `"'; but if you wish to
--specify an empty file name, you must give the quotes-`""'. This
--statement may go away in future: it is only recognized to be compatible
--with old `as' programs.
--
--DWARF2 Version
----------------
--
--When emitting DWARF2 line number information, `.file' assigns filenames
--to the `.debug_line' file name table. The syntax is:
--
-- .file FILENO FILENAME
--
-- The FILENO operand should be a unique positive integer to use as the
--index of the entry in the table. The FILENAME operand is a C string
--literal.
--
-- The detail of filename indices is exposed to the user because the
--filename table is shared with the `.debug_info' section of the DWARF2
--debugging information, and thus the user must know the exact indices
--that table entries will have.
--
--
--File: as.info, Node: Fill, Next: Float, Prev: File, Up: Pseudo Ops
--
--7.54 `.fill REPEAT , SIZE , VALUE'
--==================================
--
--REPEAT, SIZE and VALUE are absolute expressions. This emits REPEAT
--copies of SIZE bytes. REPEAT may be zero or more. SIZE may be zero or
--more, but if it is more than 8, then it is deemed to have the value 8,
--compatible with other people's assemblers. The contents of each REPEAT
--bytes is taken from an 8-byte number. The highest order 4 bytes are
--zero. The lowest order 4 bytes are VALUE rendered in the byte-order of
--an integer on the computer `as' is assembling for. Each SIZE bytes in
--a repetition is taken from the lowest order SIZE bytes of this number.
--Again, this bizarre behavior is compatible with other people's
--assemblers.
--
-- SIZE and VALUE are optional. If the second comma and VALUE are
--absent, VALUE is assumed zero. If the first comma and following tokens
--are absent, SIZE is assumed to be 1.
--
--
--File: as.info, Node: Float, Next: Func, Prev: Fill, Up: Pseudo Ops
--
--7.55 `.float FLONUMS'
--=====================
--
--This directive assembles zero or more flonums, separated by commas. It
--has the same effect as `.single'. The exact kind of floating point
--numbers emitted depends on how `as' is configured. *Note Machine
--Dependencies::.
--
--
--File: as.info, Node: Func, Next: Global, Prev: Float, Up: Pseudo Ops
--
--7.56 `.func NAME[,LABEL]'
--=========================
--
--`.func' emits debugging information to denote function NAME, and is
--ignored unless the file is assembled with debugging enabled. Only
--`--gstabs[+]' is currently supported. LABEL is the entry point of the
--function and if omitted NAME prepended with the `leading char' is used.
--`leading char' is usually `_' or nothing, depending on the target. All
--functions are currently defined to have `void' return type. The
--function must be terminated with `.endfunc'.
--
--
--File: as.info, Node: Global, Next: Gnu_attribute, Prev: Func, Up: Pseudo Ops
--
--7.57 `.global SYMBOL', `.globl SYMBOL'
--======================================
--
--`.global' makes the symbol visible to `ld'. If you define SYMBOL in
--your partial program, its value is made available to other partial
--programs that are linked with it. Otherwise, SYMBOL takes its
--attributes from a symbol of the same name from another file linked into
--the same program.
--
-- Both spellings (`.globl' and `.global') are accepted, for
--compatibility with other assemblers.
--
-- On the HPPA, `.global' is not always enough to make it accessible to
--other partial programs. You may need the HPPA-only `.EXPORT' directive
--as well. *Note HPPA Assembler Directives: HPPA Directives.
--
--
--File: as.info, Node: Gnu_attribute, Next: Hidden, Prev: Global, Up: Pseudo Ops
--
--7.58 `.gnu_attribute TAG,VALUE'
--===============================
--
--Record a GNU object attribute for this file. *Note Object Attributes::.
--
--
--File: as.info, Node: Hidden, Next: hword, Prev: Gnu_attribute, Up: Pseudo Ops
--
--7.59 `.hidden NAMES'
--====================
--
--This is one of the ELF visibility directives. The other two are
--`.internal' (*note `.internal': Internal.) and `.protected' (*note
--`.protected': Protected.).
--
-- This directive overrides the named symbols default visibility (which
--is set by their binding: local, global or weak). The directive sets
--the visibility to `hidden' which means that the symbols are not visible
--to other components. Such symbols are always considered to be
--`protected' as well.
--
--
--File: as.info, Node: hword, Next: Ident, Prev: Hidden, Up: Pseudo Ops
--
--7.60 `.hword EXPRESSIONS'
--=========================
--
--This expects zero or more EXPRESSIONS, and emits a 16 bit number for
--each.
--
-- This directive is a synonym for `.short'; depending on the target
--architecture, it may also be a synonym for `.word'.
--
--
--File: as.info, Node: Ident, Next: If, Prev: hword, Up: Pseudo Ops
--
--7.61 `.ident'
--=============
--
--This directive is used by some assemblers to place tags in object
--files. The behavior of this directive varies depending on the target.
--When using the a.out object file format, `as' simply accepts the
--directive for source-file compatibility with existing assemblers, but
--does not emit anything for it. When using COFF, comments are emitted
--to the `.comment' or `.rdata' section, depending on the target. When
--using ELF, comments are emitted to the `.comment' section.
--
--
--File: as.info, Node: If, Next: Incbin, Prev: Ident, Up: Pseudo Ops
--
--7.62 `.if ABSOLUTE EXPRESSION'
--==============================
--
--`.if' marks the beginning of a section of code which is only considered
--part of the source program being assembled if the argument (which must
--be an ABSOLUTE EXPRESSION) is non-zero. The end of the conditional
--section of code must be marked by `.endif' (*note `.endif': Endif.);
--optionally, you may include code for the alternative condition, flagged
--by `.else' (*note `.else': Else.). If you have several conditions to
--check, `.elseif' may be used to avoid nesting blocks if/else within
--each subsequent `.else' block.
--
-- The following variants of `.if' are also supported:
--`.ifdef SYMBOL'
-- Assembles the following section of code if the specified SYMBOL
-- has been defined. Note a symbol which has been referenced but not
-- yet defined is considered to be undefined.
--
--`.ifb TEXT'
-- Assembles the following section of code if the operand is blank
-- (empty).
--
--`.ifc STRING1,STRING2'
-- Assembles the following section of code if the two strings are the
-- same. The strings may be optionally quoted with single quotes.
-- If they are not quoted, the first string stops at the first comma,
-- and the second string stops at the end of the line. Strings which
-- contain whitespace should be quoted. The string comparison is
-- case sensitive.
--
--`.ifeq ABSOLUTE EXPRESSION'
-- Assembles the following section of code if the argument is zero.
--
--`.ifeqs STRING1,STRING2'
-- Another form of `.ifc'. The strings must be quoted using double
-- quotes.
--
--`.ifge ABSOLUTE EXPRESSION'
-- Assembles the following section of code if the argument is greater
-- than or equal to zero.
--
--`.ifgt ABSOLUTE EXPRESSION'
-- Assembles the following section of code if the argument is greater
-- than zero.
--
--`.ifle ABSOLUTE EXPRESSION'
-- Assembles the following section of code if the argument is less
-- than or equal to zero.
--
--`.iflt ABSOLUTE EXPRESSION'
-- Assembles the following section of code if the argument is less
-- than zero.
--
--`.ifnb TEXT'
-- Like `.ifb', but the sense of the test is reversed: this assembles
-- the following section of code if the operand is non-blank
-- (non-empty).
--
--`.ifnc STRING1,STRING2.'
-- Like `.ifc', but the sense of the test is reversed: this assembles
-- the following section of code if the two strings are not the same.
--
--`.ifndef SYMBOL'
--`.ifnotdef SYMBOL'
-- Assembles the following section of code if the specified SYMBOL
-- has not been defined. Both spelling variants are equivalent.
-- Note a symbol which has been referenced but not yet defined is
-- considered to be undefined.
--
--`.ifne ABSOLUTE EXPRESSION'
-- Assembles the following section of code if the argument is not
-- equal to zero (in other words, this is equivalent to `.if').
--
--`.ifnes STRING1,STRING2'
-- Like `.ifeqs', but the sense of the test is reversed: this
-- assembles the following section of code if the two strings are not
-- the same.
--
--
--File: as.info, Node: Incbin, Next: Include, Prev: If, Up: Pseudo Ops
--
--7.63 `.incbin "FILE"[,SKIP[,COUNT]]'
--====================================
--
--The `incbin' directive includes FILE verbatim at the current location.
--You can control the search paths used with the `-I' command-line option
--(*note Command-Line Options: Invoking.). Quotation marks are required
--around FILE.
--
-- The SKIP argument skips a number of bytes from the start of the
--FILE. The COUNT argument indicates the maximum number of bytes to
--read. Note that the data is not aligned in any way, so it is the user's
--responsibility to make sure that proper alignment is provided both
--before and after the `incbin' directive.
--
--
--File: as.info, Node: Include, Next: Int, Prev: Incbin, Up: Pseudo Ops
--
--7.64 `.include "FILE"'
--======================
--
--This directive provides a way to include supporting files at specified
--points in your source program. The code from FILE is assembled as if
--it followed the point of the `.include'; when the end of the included
--file is reached, assembly of the original file continues. You can
--control the search paths used with the `-I' command-line option (*note
--Command-Line Options: Invoking.). Quotation marks are required around
--FILE.
--
--
--File: as.info, Node: Int, Next: Internal, Prev: Include, Up: Pseudo Ops
--
--7.65 `.int EXPRESSIONS'
--=======================
--
--Expect zero or more EXPRESSIONS, of any section, separated by commas.
--For each expression, emit a number that, at run time, is the value of
--that expression. The byte order and bit size of the number depends on
--what kind of target the assembly is for.
--
--
--File: as.info, Node: Internal, Next: Irp, Prev: Int, Up: Pseudo Ops
--
--7.66 `.internal NAMES'
--======================
--
--This is one of the ELF visibility directives. The other two are
--`.hidden' (*note `.hidden': Hidden.) and `.protected' (*note
--`.protected': Protected.).
--
-- This directive overrides the named symbols default visibility (which
--is set by their binding: local, global or weak). The directive sets
--the visibility to `internal' which means that the symbols are
--considered to be `hidden' (i.e., not visible to other components), and
--that some extra, processor specific processing must also be performed
--upon the symbols as well.
--
--
--File: as.info, Node: Irp, Next: Irpc, Prev: Internal, Up: Pseudo Ops
--
--7.67 `.irp SYMBOL,VALUES'...
--============================
--
--Evaluate a sequence of statements assigning different values to SYMBOL.
--The sequence of statements starts at the `.irp' directive, and is
--terminated by an `.endr' directive. For each VALUE, SYMBOL is set to
--VALUE, and the sequence of statements is assembled. If no VALUE is
--listed, the sequence of statements is assembled once, with SYMBOL set
--to the null string. To refer to SYMBOL within the sequence of
--statements, use \SYMBOL.
--
-- For example, assembling
--
-- .irp param,1,2,3
-- move d\param,sp@-
-- .endr
--
-- is equivalent to assembling
--
-- move d1,sp@-
-- move d2,sp@-
-- move d3,sp@-
--
-- For some caveats with the spelling of SYMBOL, see also *Note Macro::.
--
--
--File: as.info, Node: Irpc, Next: Lcomm, Prev: Irp, Up: Pseudo Ops
--
--7.68 `.irpc SYMBOL,VALUES'...
--=============================
--
--Evaluate a sequence of statements assigning different values to SYMBOL.
--The sequence of statements starts at the `.irpc' directive, and is
--terminated by an `.endr' directive. For each character in VALUE,
--SYMBOL is set to the character, and the sequence of statements is
--assembled. If no VALUE is listed, the sequence of statements is
--assembled once, with SYMBOL set to the null string. To refer to SYMBOL
--within the sequence of statements, use \SYMBOL.
--
-- For example, assembling
--
-- .irpc param,123
-- move d\param,sp@-
-- .endr
--
-- is equivalent to assembling
--
-- move d1,sp@-
-- move d2,sp@-
-- move d3,sp@-
--
-- For some caveats with the spelling of SYMBOL, see also the discussion
--at *Note Macro::.
--
--
--File: as.info, Node: Lcomm, Next: Lflags, Prev: Irpc, Up: Pseudo Ops
--
--7.69 `.lcomm SYMBOL , LENGTH'
--=============================
--
--Reserve LENGTH (an absolute expression) bytes for a local common
--denoted by SYMBOL. The section and value of SYMBOL are those of the
--new local common. The addresses are allocated in the bss section, so
--that at run-time the bytes start off zeroed. SYMBOL is not declared
--global (*note `.global': Global.), so is normally not visible to `ld'.
--
-- Some targets permit a third argument to be used with `.lcomm'. This
--argument specifies the desired alignment of the symbol in the bss
--section.
--
-- The syntax for `.lcomm' differs slightly on the HPPA. The syntax is
--`SYMBOL .lcomm, LENGTH'; SYMBOL is optional.
--
--
--File: as.info, Node: Lflags, Next: Line, Prev: Lcomm, Up: Pseudo Ops
--
--7.70 `.lflags'
--==============
--
--`as' accepts this directive, for compatibility with other assemblers,
--but ignores it.
--
--
--File: as.info, Node: Line, Next: Linkonce, Prev: Lflags, Up: Pseudo Ops
--
--7.71 `.line LINE-NUMBER'
--========================
--
--Change the logical line number. LINE-NUMBER must be an absolute
--expression. The next line has that logical line number. Therefore any
--other statements on the current line (after a statement separator
--character) are reported as on logical line number LINE-NUMBER - 1. One
--day `as' will no longer support this directive: it is recognized only
--for compatibility with existing assembler programs.
--
--Even though this is a directive associated with the `a.out' or `b.out'
--object-code formats, `as' still recognizes it when producing COFF
--output, and treats `.line' as though it were the COFF `.ln' _if_ it is
--found outside a `.def'/`.endef' pair.
--
-- Inside a `.def', `.line' is, instead, one of the directives used by
--compilers to generate auxiliary symbol information for debugging.
--
--
--File: as.info, Node: Linkonce, Next: List, Prev: Line, Up: Pseudo Ops
--
--7.72 `.linkonce [TYPE]'
--=======================
--
--Mark the current section so that the linker only includes a single copy
--of it. This may be used to include the same section in several
--different object files, but ensure that the linker will only include it
--once in the final output file. The `.linkonce' pseudo-op must be used
--for each instance of the section. Duplicate sections are detected
--based on the section name, so it should be unique.
--
-- This directive is only supported by a few object file formats; as of
--this writing, the only object file format which supports it is the
--Portable Executable format used on Windows NT.
--
-- The TYPE argument is optional. If specified, it must be one of the
--following strings. For example:
-- .linkonce same_size
-- Not all types may be supported on all object file formats.
--
--`discard'
-- Silently discard duplicate sections. This is the default.
--
--`one_only'
-- Warn if there are duplicate sections, but still keep only one copy.
--
--`same_size'
-- Warn if any of the duplicates have different sizes.
--
--`same_contents'
-- Warn if any of the duplicates do not have exactly the same
-- contents.
--
--
--File: as.info, Node: List, Next: Ln, Prev: Linkonce, Up: Pseudo Ops
--
--7.73 `.list'
--============
--
--Control (in conjunction with the `.nolist' directive) whether or not
--assembly listings are generated. These two directives maintain an
--internal counter (which is zero initially). `.list' increments the
--counter, and `.nolist' decrements it. Assembly listings are generated
--whenever the counter is greater than zero.
--
-- By default, listings are disabled. When you enable them (with the
--`-a' command line option; *note Command-Line Options: Invoking.), the
--initial value of the listing counter is one.
--
--
--File: as.info, Node: Ln, Next: Loc, Prev: List, Up: Pseudo Ops
--
--7.74 `.ln LINE-NUMBER'
--======================
--
--`.ln' is a synonym for `.line'.
--
--
--File: as.info, Node: Loc, Next: Loc_mark_labels, Prev: Ln, Up: Pseudo Ops
--
--7.75 `.loc FILENO LINENO [COLUMN] [OPTIONS]'
--============================================
--
--When emitting DWARF2 line number information, the `.loc' directive will
--add a row to the `.debug_line' line number matrix corresponding to the
--immediately following assembly instruction. The FILENO, LINENO, and
--optional COLUMN arguments will be applied to the `.debug_line' state
--machine before the row is added.
--
-- The OPTIONS are a sequence of the following tokens in any order:
--
--`basic_block'
-- This option will set the `basic_block' register in the
-- `.debug_line' state machine to `true'.
--
--`prologue_end'
-- This option will set the `prologue_end' register in the
-- `.debug_line' state machine to `true'.
--
--`epilogue_begin'
-- This option will set the `epilogue_begin' register in the
-- `.debug_line' state machine to `true'.
--
--`is_stmt VALUE'
-- This option will set the `is_stmt' register in the `.debug_line'
-- state machine to `value', which must be either 0 or 1.
--
--`isa VALUE'
-- This directive will set the `isa' register in the `.debug_line'
-- state machine to VALUE, which must be an unsigned integer.
--
--`discriminator VALUE'
-- This directive will set the `discriminator' register in the
-- `.debug_line' state machine to VALUE, which must be an unsigned
-- integer.
--
--
--
--File: as.info, Node: Loc_mark_labels, Next: Local, Prev: Loc, Up: Pseudo Ops
--
--7.76 `.loc_mark_labels ENABLE'
--==============================
--
--When emitting DWARF2 line number information, the `.loc_mark_labels'
--directive makes the assembler emit an entry to the `.debug_line' line
--number matrix with the `basic_block' register in the state machine set
--whenever a code label is seen. The ENABLE argument should be either 1
--or 0, to enable or disable this function respectively.
--
--
--File: as.info, Node: Local, Next: Long, Prev: Loc_mark_labels, Up: Pseudo Ops
--
--7.77 `.local NAMES'
--===================
--
--This directive, which is available for ELF targets, marks each symbol in
--the comma-separated list of `names' as a local symbol so that it will
--not be externally visible. If the symbols do not already exist, they
--will be created.
--
-- For targets where the `.lcomm' directive (*note Lcomm::) does not
--accept an alignment argument, which is the case for most ELF targets,
--the `.local' directive can be used in combination with `.comm' (*note
--Comm::) to define aligned local common data.
--
--
--File: as.info, Node: Long, Next: Macro, Prev: Local, Up: Pseudo Ops
--
--7.78 `.long EXPRESSIONS'
--========================
--
--`.long' is the same as `.int'. *Note `.int': Int.
--
--
--File: as.info, Node: Macro, Next: MRI, Prev: Long, Up: Pseudo Ops
--
--7.79 `.macro'
--=============
--
--The commands `.macro' and `.endm' allow you to define macros that
--generate assembly output. For example, this definition specifies a
--macro `sum' that puts a sequence of numbers into memory:
--
-- .macro sum from=0, to=5
-- .long \from
-- .if \to-\from
-- sum "(\from+1)",\to
-- .endif
-- .endm
--
--With that definition, `SUM 0,5' is equivalent to this assembly input:
--
-- .long 0
-- .long 1
-- .long 2
-- .long 3
-- .long 4
-- .long 5
--
--`.macro MACNAME'
--`.macro MACNAME MACARGS ...'
-- Begin the definition of a macro called MACNAME. If your macro
-- definition requires arguments, specify their names after the macro
-- name, separated by commas or spaces. You can qualify the macro
-- argument to indicate whether all invocations must specify a
-- non-blank value (through `:`req''), or whether it takes all of the
-- remaining arguments (through `:`vararg''). You can supply a
-- default value for any macro argument by following the name with
-- `=DEFLT'. You cannot define two macros with the same MACNAME
-- unless it has been subject to the `.purgem' directive (*note
-- Purgem::) between the two definitions. For example, these are all
-- valid `.macro' statements:
--
-- `.macro comm'
-- Begin the definition of a macro called `comm', which takes no
-- arguments.
--
-- `.macro plus1 p, p1'
-- `.macro plus1 p p1'
-- Either statement begins the definition of a macro called
-- `plus1', which takes two arguments; within the macro
-- definition, write `\p' or `\p1' to evaluate the arguments.
--
-- `.macro reserve_str p1=0 p2'
-- Begin the definition of a macro called `reserve_str', with two
-- arguments. The first argument has a default value, but not
-- the second. After the definition is complete, you can call
-- the macro either as `reserve_str A,B' (with `\p1' evaluating
-- to A and `\p2' evaluating to B), or as `reserve_str ,B' (with
-- `\p1' evaluating as the default, in this case `0', and `\p2'
-- evaluating to B).
--
-- `.macro m p1:req, p2=0, p3:vararg'
-- Begin the definition of a macro called `m', with at least
-- three arguments. The first argument must always have a value
-- specified, but not the second, which instead has a default
-- value. The third formal will get assigned all remaining
-- arguments specified at invocation time.
--
-- When you call a macro, you can specify the argument values
-- either by position, or by keyword. For example, `sum 9,17'
-- is equivalent to `sum to=17, from=9'.
--
--
-- Note that since each of the MACARGS can be an identifier exactly
-- as any other one permitted by the target architecture, there may be
-- occasional problems if the target hand-crafts special meanings to
-- certain characters when they occur in a special position. For
-- example, if the colon (`:') is generally permitted to be part of a
-- symbol name, but the architecture specific code special-cases it
-- when occurring as the final character of a symbol (to denote a
-- label), then the macro parameter replacement code will have no way
-- of knowing that and consider the whole construct (including the
-- colon) an identifier, and check only this identifier for being the
-- subject to parameter substitution. So for example this macro
-- definition:
--
-- .macro label l
-- \l:
-- .endm
--
-- might not work as expected. Invoking `label foo' might not create
-- a label called `foo' but instead just insert the text `\l:' into
-- the assembler source, probably generating an error about an
-- unrecognised identifier.
--
-- Similarly problems might occur with the period character (`.')
-- which is often allowed inside opcode names (and hence identifier
-- names). So for example constructing a macro to build an opcode
-- from a base name and a length specifier like this:
--
-- .macro opcode base length
-- \base.\length
-- .endm
--
-- and invoking it as `opcode store l' will not create a `store.l'
-- instruction but instead generate some kind of error as the
-- assembler tries to interpret the text `\base.\length'.
--
-- There are several possible ways around this problem:
--
-- `Insert white space'
-- If it is possible to use white space characters then this is
-- the simplest solution. eg:
--
-- .macro label l
-- \l :
-- .endm
--
-- `Use `\()''
-- The string `\()' can be used to separate the end of a macro
-- argument from the following text. eg:
--
-- .macro opcode base length
-- \base\().\length
-- .endm
--
-- `Use the alternate macro syntax mode'
-- In the alternative macro syntax mode the ampersand character
-- (`&') can be used as a separator. eg:
--
-- .altmacro
-- .macro label l
-- l&:
-- .endm
--
-- Note: this problem of correctly identifying string parameters to
-- pseudo ops also applies to the identifiers used in `.irp' (*note
-- Irp::) and `.irpc' (*note Irpc::) as well.
--
--`.endm'
-- Mark the end of a macro definition.
--
--`.exitm'
-- Exit early from the current macro definition.
--
--`\@'
-- `as' maintains a counter of how many macros it has executed in
-- this pseudo-variable; you can copy that number to your output with
-- `\@', but _only within a macro definition_.
--
--`LOCAL NAME [ , ... ]'
-- _Warning: `LOCAL' is only available if you select "alternate macro
-- syntax" with `--alternate' or `.altmacro'._ *Note `.altmacro':
-- Altmacro.
--
--
--File: as.info, Node: MRI, Next: Noaltmacro, Prev: Macro, Up: Pseudo Ops
--
--7.80 `.mri VAL'
--===============
--
--If VAL is non-zero, this tells `as' to enter MRI mode. If VAL is zero,
--this tells `as' to exit MRI mode. This change affects code assembled
--until the next `.mri' directive, or until the end of the file. *Note
--MRI mode: M.
--
--
--File: as.info, Node: Noaltmacro, Next: Nolist, Prev: MRI, Up: Pseudo Ops
--
--7.81 `.noaltmacro'
--==================
--
--Disable alternate macro mode. *Note Altmacro::.
--
--
--File: as.info, Node: Nolist, Next: Octa, Prev: Noaltmacro, Up: Pseudo Ops
--
--7.82 `.nolist'
--==============
--
--Control (in conjunction with the `.list' directive) whether or not
--assembly listings are generated. These two directives maintain an
--internal counter (which is zero initially). `.list' increments the
--counter, and `.nolist' decrements it. Assembly listings are generated
--whenever the counter is greater than zero.
--
--
--File: as.info, Node: Octa, Next: Offset, Prev: Nolist, Up: Pseudo Ops
--
--7.83 `.octa BIGNUMS'
--====================
--
--This directive expects zero or more bignums, separated by commas. For
--each bignum, it emits a 16-byte integer.
--
-- The term "octa" comes from contexts in which a "word" is two bytes;
--hence _octa_-word for 16 bytes.
--
--
--File: as.info, Node: Offset, Next: Org, Prev: Octa, Up: Pseudo Ops
--
--7.84 `.offset LOC'
--==================
--
--Set the location counter to LOC in the absolute section. LOC must be
--an absolute expression. This directive may be useful for defining
--symbols with absolute values. Do not confuse it with the `.org'
--directive.
--
--
--File: as.info, Node: Org, Next: P2align, Prev: Offset, Up: Pseudo Ops
--
--7.85 `.org NEW-LC , FILL'
--=========================
--
--Advance the location counter of the current section to NEW-LC. NEW-LC
--is either an absolute expression or an expression with the same section
--as the current subsection. That is, you can't use `.org' to cross
--sections: if NEW-LC has the wrong section, the `.org' directive is
--ignored. To be compatible with former assemblers, if the section of
--NEW-LC is absolute, `as' issues a warning, then pretends the section of
--NEW-LC is the same as the current subsection.
--
-- `.org' may only increase the location counter, or leave it
--unchanged; you cannot use `.org' to move the location counter backwards.
--
-- Because `as' tries to assemble programs in one pass, NEW-LC may not
--be undefined. If you really detest this restriction we eagerly await a
--chance to share your improved assembler.
--
-- Beware that the origin is relative to the start of the section, not
--to the start of the subsection. This is compatible with other people's
--assemblers.
--
-- When the location counter (of the current subsection) is advanced,
--the intervening bytes are filled with FILL which should be an absolute
--expression. If the comma and FILL are omitted, FILL defaults to zero.
--
--
--File: as.info, Node: P2align, Next: PopSection, Prev: Org, Up: Pseudo Ops
--
--7.86 `.p2align[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR'
--================================================
--
--Pad the location counter (in the current subsection) to a particular
--storage boundary. The first expression (which must be absolute) is the
--number of low-order zero bits the location counter must have after
--advancement. For example `.p2align 3' advances the location counter
--until it a multiple of 8. If the location counter is already a
--multiple of 8, no change is needed.
--
-- The second expression (also absolute) gives the fill value to be
--stored in the padding bytes. It (and the comma) may be omitted. If it
--is omitted, the padding bytes are normally zero. However, on some
--systems, if the section is marked as containing code and the fill value
--is omitted, the space is filled with no-op instructions.
--
-- The third expression is also absolute, and is also optional. If it
--is present, it is the maximum number of bytes that should be skipped by
--this alignment directive. If doing the alignment would require
--skipping more bytes than the specified maximum, then the alignment is
--not done at all. You can omit the fill value (the second argument)
--entirely by simply using two commas after the required alignment; this
--can be useful if you want the alignment to be filled with no-op
--instructions when appropriate.
--
-- The `.p2alignw' and `.p2alignl' directives are variants of the
--`.p2align' directive. The `.p2alignw' directive treats the fill
--pattern as a two byte word value. The `.p2alignl' directives treats the
--fill pattern as a four byte longword value. For example, `.p2alignw
--2,0x368d' will align to a multiple of 4. If it skips two bytes, they
--will be filled in with the value 0x368d (the exact placement of the
--bytes depends upon the endianness of the processor). If it skips 1 or
--3 bytes, the fill value is undefined.
--
--
--File: as.info, Node: PopSection, Next: Previous, Prev: P2align, Up: Pseudo Ops
--
--7.87 `.popsection'
--==================
--
--This is one of the ELF section stack manipulation directives. The
--others are `.section' (*note Section::), `.subsection' (*note
--SubSection::), `.pushsection' (*note PushSection::), and `.previous'
--(*note Previous::).
--
-- This directive replaces the current section (and subsection) with
--the top section (and subsection) on the section stack. This section is
--popped off the stack.
--
--
--File: as.info, Node: Previous, Next: Print, Prev: PopSection, Up: Pseudo Ops
--
--7.88 `.previous'
--================
--
--This is one of the ELF section stack manipulation directives. The
--others are `.section' (*note Section::), `.subsection' (*note
--SubSection::), `.pushsection' (*note PushSection::), and `.popsection'
--(*note PopSection::).
--
-- This directive swaps the current section (and subsection) with most
--recently referenced section/subsection pair prior to this one. Multiple
--`.previous' directives in a row will flip between two sections (and
--their subsections). For example:
--
-- .section A
-- .subsection 1
-- .word 0x1234
-- .subsection 2
-- .word 0x5678
-- .previous
-- .word 0x9abc
--
-- Will place 0x1234 and 0x9abc into subsection 1 and 0x5678 into
--subsection 2 of section A. Whilst:
--
-- .section A
-- .subsection 1
-- # Now in section A subsection 1
-- .word 0x1234
-- .section B
-- .subsection 0
-- # Now in section B subsection 0
-- .word 0x5678
-- .subsection 1
-- # Now in section B subsection 1
-- .word 0x9abc
-- .previous
-- # Now in section B subsection 0
-- .word 0xdef0
--
-- Will place 0x1234 into section A, 0x5678 and 0xdef0 into subsection
--0 of section B and 0x9abc into subsection 1 of section B.
--
-- In terms of the section stack, this directive swaps the current
--section with the top section on the section stack.
--
--
--File: as.info, Node: Print, Next: Protected, Prev: Previous, Up: Pseudo Ops
--
--7.89 `.print STRING'
--====================
--
--`as' will print STRING on the standard output during assembly. You
--must put STRING in double quotes.
--
--
--File: as.info, Node: Protected, Next: Psize, Prev: Print, Up: Pseudo Ops
--
--7.90 `.protected NAMES'
--=======================
--
--This is one of the ELF visibility directives. The other two are
--`.hidden' (*note Hidden::) and `.internal' (*note Internal::).
--
-- This directive overrides the named symbols default visibility (which
--is set by their binding: local, global or weak). The directive sets
--the visibility to `protected' which means that any references to the
--symbols from within the components that defines them must be resolved
--to the definition in that component, even if a definition in another
--component would normally preempt this.
--
--
--File: as.info, Node: Psize, Next: Purgem, Prev: Protected, Up: Pseudo Ops
--
--7.91 `.psize LINES , COLUMNS'
--=============================
--
--Use this directive to declare the number of lines--and, optionally, the
--number of columns--to use for each page, when generating listings.
--
-- If you do not use `.psize', listings use a default line-count of 60.
--You may omit the comma and COLUMNS specification; the default width is
--200 columns.
--
-- `as' generates formfeeds whenever the specified number of lines is
--exceeded (or whenever you explicitly request one, using `.eject').
--
-- If you specify LINES as `0', no formfeeds are generated save those
--explicitly specified with `.eject'.
--
--
--File: as.info, Node: Purgem, Next: PushSection, Prev: Psize, Up: Pseudo Ops
--
--7.92 `.purgem NAME'
--===================
--
--Undefine the macro NAME, so that later uses of the string will not be
--expanded. *Note Macro::.
--
--
--File: as.info, Node: PushSection, Next: Quad, Prev: Purgem, Up: Pseudo Ops
--
--7.93 `.pushsection NAME [, SUBSECTION] [, "FLAGS"[, @TYPE[,ARGUMENTS]]]'
--========================================================================
--
--This is one of the ELF section stack manipulation directives. The
--others are `.section' (*note Section::), `.subsection' (*note
--SubSection::), `.popsection' (*note PopSection::), and `.previous'
--(*note Previous::).
--
-- This directive pushes the current section (and subsection) onto the
--top of the section stack, and then replaces the current section and
--subsection with `name' and `subsection'. The optional `flags', `type'
--and `arguments' are treated the same as in the `.section' (*note
--Section::) directive.
--
--
--File: as.info, Node: Quad, Next: Reloc, Prev: PushSection, Up: Pseudo Ops
--
--7.94 `.quad BIGNUMS'
--====================
--
--`.quad' expects zero or more bignums, separated by commas. For each
--bignum, it emits an 8-byte integer. If the bignum won't fit in 8
--bytes, it prints a warning message; and just takes the lowest order 8
--bytes of the bignum.
--
-- The term "quad" comes from contexts in which a "word" is two bytes;
--hence _quad_-word for 8 bytes.
--
--
--File: as.info, Node: Reloc, Next: Rept, Prev: Quad, Up: Pseudo Ops
--
--7.95 `.reloc OFFSET, RELOC_NAME[, EXPRESSION]'
--==============================================
--
--Generate a relocation at OFFSET of type RELOC_NAME with value
--EXPRESSION. If OFFSET is a number, the relocation is generated in the
--current section. If OFFSET is an expression that resolves to a symbol
--plus offset, the relocation is generated in the given symbol's section.
--EXPRESSION, if present, must resolve to a symbol plus addend or to an
--absolute value, but note that not all targets support an addend. e.g.
--ELF REL targets such as i386 store an addend in the section contents
--rather than in the relocation. This low level interface does not
--support addends stored in the section.
--
--
--File: as.info, Node: Rept, Next: Sbttl, Prev: Reloc, Up: Pseudo Ops
--
--7.96 `.rept COUNT'
--==================
--
--Repeat the sequence of lines between the `.rept' directive and the next
--`.endr' directive COUNT times.
--
-- For example, assembling
--
-- .rept 3
-- .long 0
-- .endr
--
-- is equivalent to assembling
--
-- .long 0
-- .long 0
-- .long 0
--
--
--File: as.info, Node: Sbttl, Next: Scl, Prev: Rept, Up: Pseudo Ops
--
--7.97 `.sbttl "SUBHEADING"'
--==========================
--
--Use SUBHEADING as the title (third line, immediately after the title
--line) when generating assembly listings.
--
-- This directive affects subsequent pages, as well as the current page
--if it appears within ten lines of the top of a page.
--
--
--File: as.info, Node: Scl, Next: Section, Prev: Sbttl, Up: Pseudo Ops
--
--7.98 `.scl CLASS'
--=================
--
--Set the storage-class value for a symbol. This directive may only be
--used inside a `.def'/`.endef' pair. Storage class may flag whether a
--symbol is static or external, or it may record further symbolic
--debugging information.
--
--
--File: as.info, Node: Section, Next: Set, Prev: Scl, Up: Pseudo Ops
--
--7.99 `.section NAME'
--====================
--
--Use the `.section' directive to assemble the following code into a
--section named NAME.
--
-- This directive is only supported for targets that actually support
--arbitrarily named sections; on `a.out' targets, for example, it is not
--accepted, even with a standard `a.out' section name.
--
--COFF Version
--------------
--
-- For COFF targets, the `.section' directive is used in one of the
--following ways:
--
-- .section NAME[, "FLAGS"]
-- .section NAME[, SUBSECTION]
--
-- If the optional argument is quoted, it is taken as flags to use for
--the section. Each flag is a single character. The following flags are
--recognized:
--`b'
-- bss section (uninitialized data)
--
--`n'
-- section is not loaded
--
--`w'
-- writable section
--
--`d'
-- data section
--
--`e'
-- exclude section from linking
--
--`r'
-- read-only section
--
--`x'
-- executable section
--
--`s'
-- shared section (meaningful for PE targets)
--
--`a'
-- ignored. (For compatibility with the ELF version)
--
--`y'
-- section is not readable (meaningful for PE targets)
--
--`0-9'
-- single-digit power-of-two section alignment (GNU extension)
--
-- If no flags are specified, the default flags depend upon the section
--name. If the section name is not recognized, the default will be for
--the section to be loaded and writable. Note the `n' and `w' flags
--remove attributes from the section, rather than adding them, so if they
--are used on their own it will be as if no flags had been specified at
--all.
--
-- If the optional argument to the `.section' directive is not quoted,
--it is taken as a subsection number (*note Sub-Sections::).
--
--ELF Version
-------------
--
-- This is one of the ELF section stack manipulation directives. The
--others are `.subsection' (*note SubSection::), `.pushsection' (*note
--PushSection::), `.popsection' (*note PopSection::), and `.previous'
--(*note Previous::).
--
-- For ELF targets, the `.section' directive is used like this:
--
-- .section NAME [, "FLAGS"[, @TYPE[,FLAG_SPECIFIC_ARGUMENTS]]]
--
-- The optional FLAGS argument is a quoted string which may contain any
--combination of the following characters:
--`a'
-- section is allocatable
--
--`e'
-- section is excluded from executable and shared library.
--
--`w'
-- section is writable
--
--`x'
-- section is executable
--
--`M'
-- section is mergeable
--
--`S'
-- section contains zero terminated strings
--
--`G'
-- section is a member of a section group
--
--`T'
-- section is used for thread-local-storage
--
--`?'
-- section is a member of the previously-current section's group, if
-- any
--
-- The optional TYPE argument may contain one of the following
--constants:
--`@progbits'
-- section contains data
--
--`@nobits'
-- section does not contain data (i.e., section only occupies space)
--
--`@note'
-- section contains data which is used by things other than the
-- program
--
--`@init_array'
-- section contains an array of pointers to init functions
--
--`@fini_array'
-- section contains an array of pointers to finish functions
--
--`@preinit_array'
-- section contains an array of pointers to pre-init functions
--
-- Many targets only support the first three section types.
--
-- Note on targets where the `@' character is the start of a comment (eg
--ARM) then another character is used instead. For example the ARM port
--uses the `%' character.
--
-- If FLAGS contains the `M' symbol then the TYPE argument must be
--specified as well as an extra argument--ENTSIZE--like this:
--
-- .section NAME , "FLAGS"M, @TYPE, ENTSIZE
--
-- Sections with the `M' flag but not `S' flag must contain fixed size
--constants, each ENTSIZE octets long. Sections with both `M' and `S'
--must contain zero terminated strings where each character is ENTSIZE
--bytes long. The linker may remove duplicates within sections with the
--same name, same entity size and same flags. ENTSIZE must be an
--absolute expression. For sections with both `M' and `S', a string
--which is a suffix of a larger string is considered a duplicate. Thus
--`"def"' will be merged with `"abcdef"'; A reference to the first
--`"def"' will be changed to a reference to `"abcdef"+3'.
--
-- If FLAGS contains the `G' symbol then the TYPE argument must be
--present along with an additional field like this:
--
-- .section NAME , "FLAGS"G, @TYPE, GROUPNAME[, LINKAGE]
--
-- The GROUPNAME field specifies the name of the section group to which
--this particular section belongs. The optional linkage field can
--contain:
--`comdat'
-- indicates that only one copy of this section should be retained
--
--`.gnu.linkonce'
-- an alias for comdat
--
-- Note: if both the M and G flags are present then the fields for the
--Merge flag should come first, like this:
--
-- .section NAME , "FLAGS"MG, @TYPE, ENTSIZE, GROUPNAME[, LINKAGE]
--
-- If FLAGS contains the `?' symbol then it may not also contain the
--`G' symbol and the GROUPNAME or LINKAGE fields should not be present.
--Instead, `?' says to consider the section that's current before this
--directive. If that section used `G', then the new section will use `G'
--with those same GROUPNAME and LINKAGE fields implicitly. If not, then
--the `?' symbol has no effect.
--
-- If no flags are specified, the default flags depend upon the section
--name. If the section name is not recognized, the default will be for
--the section to have none of the above flags: it will not be allocated
--in memory, nor writable, nor executable. The section will contain data.
--
-- For ELF targets, the assembler supports another type of `.section'
--directive for compatibility with the Solaris assembler:
--
-- .section "NAME"[, FLAGS...]
--
-- Note that the section name is quoted. There may be a sequence of
--comma separated flags:
--`#alloc'
-- section is allocatable
--
--`#write'
-- section is writable
--
--`#execinstr'
-- section is executable
--
--`#exclude'
-- section is excluded from executable and shared library.
--
--`#tls'
-- section is used for thread local storage
--
-- This directive replaces the current section and subsection. See the
--contents of the gas testsuite directory `gas/testsuite/gas/elf' for
--some examples of how this directive and the other section stack
--directives work.
--
--
--File: as.info, Node: Set, Next: Short, Prev: Section, Up: Pseudo Ops
--
--7.100 `.set SYMBOL, EXPRESSION'
--===============================
--
--Set the value of SYMBOL to EXPRESSION. This changes SYMBOL's value and
--type to conform to EXPRESSION. If SYMBOL was flagged as external, it
--remains flagged (*note Symbol Attributes::).
--
-- You may `.set' a symbol many times in the same assembly.
--
-- If you `.set' a global symbol, the value stored in the object file
--is the last value stored into it.
--
-- On Z80 `set' is a real instruction, use `SYMBOL defl EXPRESSION'
--instead.
--
--
--File: as.info, Node: Short, Next: Single, Prev: Set, Up: Pseudo Ops
--
--7.101 `.short EXPRESSIONS'
--==========================
--
--`.short' is normally the same as `.word'. *Note `.word': Word.
--
-- In some configurations, however, `.short' and `.word' generate
--numbers of different lengths. *Note Machine Dependencies::.
--
--
--File: as.info, Node: Single, Next: Size, Prev: Short, Up: Pseudo Ops
--
--7.102 `.single FLONUMS'
--=======================
--
--This directive assembles zero or more flonums, separated by commas. It
--has the same effect as `.float'. The exact kind of floating point
--numbers emitted depends on how `as' is configured. *Note Machine
--Dependencies::.
--
--
--File: as.info, Node: Size, Next: Skip, Prev: Single, Up: Pseudo Ops
--
--7.103 `.size'
--=============
--
--This directive is used to set the size associated with a symbol.
--
--COFF Version
--------------
--
-- For COFF targets, the `.size' directive is only permitted inside
--`.def'/`.endef' pairs. It is used like this:
--
-- .size EXPRESSION
--
--ELF Version
-------------
--
-- For ELF targets, the `.size' directive is used like this:
--
-- .size NAME , EXPRESSION
--
-- This directive sets the size associated with a symbol NAME. The
--size in bytes is computed from EXPRESSION which can make use of label
--arithmetic. This directive is typically used to set the size of
--function symbols.
--
--
--File: as.info, Node: Skip, Next: Sleb128, Prev: Size, Up: Pseudo Ops
--
--7.104 `.skip SIZE , FILL'
--=========================
--
--This directive emits SIZE bytes, each of value FILL. Both SIZE and
--FILL are absolute expressions. If the comma and FILL are omitted, FILL
--is assumed to be zero. This is the same as `.space'.
--
--
--File: as.info, Node: Sleb128, Next: Space, Prev: Skip, Up: Pseudo Ops
--
--7.105 `.sleb128 EXPRESSIONS'
--============================
--
--SLEB128 stands for "signed little endian base 128." This is a compact,
--variable length representation of numbers used by the DWARF symbolic
--debugging format. *Note `.uleb128': Uleb128.
--
--
--File: as.info, Node: Space, Next: Stab, Prev: Sleb128, Up: Pseudo Ops
--
--7.106 `.space SIZE , FILL'
--==========================
--
--This directive emits SIZE bytes, each of value FILL. Both SIZE and
--FILL are absolute expressions. If the comma and FILL are omitted, FILL
--is assumed to be zero. This is the same as `.skip'.
--
-- _Warning:_ `.space' has a completely different meaning for HPPA
-- targets; use `.block' as a substitute. See `HP9000 Series 800
-- Assembly Language Reference Manual' (HP 92432-90001) for the
-- meaning of the `.space' directive. *Note HPPA Assembler
-- Directives: HPPA Directives, for a summary.
--
--
--File: as.info, Node: Stab, Next: String, Prev: Space, Up: Pseudo Ops
--
--7.107 `.stabd, .stabn, .stabs'
--==============================
--
--There are three directives that begin `.stab'. All emit symbols (*note
--Symbols::), for use by symbolic debuggers. The symbols are not entered
--in the `as' hash table: they cannot be referenced elsewhere in the
--source file. Up to five fields are required:
--
--STRING
-- This is the symbol's name. It may contain any character except
-- `\000', so is more general than ordinary symbol names. Some
-- debuggers used to code arbitrarily complex structures into symbol
-- names using this field.
--
--TYPE
-- An absolute expression. The symbol's type is set to the low 8
-- bits of this expression. Any bit pattern is permitted, but `ld'
-- and debuggers choke on silly bit patterns.
--
--OTHER
-- An absolute expression. The symbol's "other" attribute is set to
-- the low 8 bits of this expression.
--
--DESC
-- An absolute expression. The symbol's descriptor is set to the low
-- 16 bits of this expression.
--
--VALUE
-- An absolute expression which becomes the symbol's value.
--
-- If a warning is detected while reading a `.stabd', `.stabn', or
--`.stabs' statement, the symbol has probably already been created; you
--get a half-formed symbol in your object file. This is compatible with
--earlier assemblers!
--
--`.stabd TYPE , OTHER , DESC'
-- The "name" of the symbol generated is not even an empty string.
-- It is a null pointer, for compatibility. Older assemblers used a
-- null pointer so they didn't waste space in object files with empty
-- strings.
--
-- The symbol's value is set to the location counter, relocatably.
-- When your program is linked, the value of this symbol is the
-- address of the location counter when the `.stabd' was assembled.
--
--`.stabn TYPE , OTHER , DESC , VALUE'
-- The name of the symbol is set to the empty string `""'.
--
--`.stabs STRING , TYPE , OTHER , DESC , VALUE'
-- All five fields are specified.
--
--
--File: as.info, Node: String, Next: Struct, Prev: Stab, Up: Pseudo Ops
--
--7.108 `.string' "STR", `.string8' "STR", `.string16'
--====================================================
--
--"STR", `.string32' "STR", `.string64' "STR"
--
-- Copy the characters in STR to the object file. You may specify more
--than one string to copy, separated by commas. Unless otherwise
--specified for a particular machine, the assembler marks the end of each
--string with a 0 byte. You can use any of the escape sequences
--described in *Note Strings: Strings.
--
-- The variants `string16', `string32' and `string64' differ from the
--`string' pseudo opcode in that each 8-bit character from STR is copied
--and expanded to 16, 32 or 64 bits respectively. The expanded characters
--are stored in target endianness byte order.
--
-- Example:
-- .string32 "BYE"
-- expands to:
-- .string "B\0\0\0Y\0\0\0E\0\0\0" /* On little endian targets. */
-- .string "\0\0\0B\0\0\0Y\0\0\0E" /* On big endian targets. */
--
--
--File: as.info, Node: Struct, Next: SubSection, Prev: String, Up: Pseudo Ops
--
--7.109 `.struct EXPRESSION'
--==========================
--
--Switch to the absolute section, and set the section offset to
--EXPRESSION, which must be an absolute expression. You might use this
--as follows:
-- .struct 0
-- field1:
-- .struct field1 + 4
-- field2:
-- .struct field2 + 4
-- field3:
-- This would define the symbol `field1' to have the value 0, the symbol
--`field2' to have the value 4, and the symbol `field3' to have the value
--8. Assembly would be left in the absolute section, and you would need
--to use a `.section' directive of some sort to change to some other
--section before further assembly.
--
--
--File: as.info, Node: SubSection, Next: Symver, Prev: Struct, Up: Pseudo Ops
--
--7.110 `.subsection NAME'
--========================
--
--This is one of the ELF section stack manipulation directives. The
--others are `.section' (*note Section::), `.pushsection' (*note
--PushSection::), `.popsection' (*note PopSection::), and `.previous'
--(*note Previous::).
--
-- This directive replaces the current subsection with `name'. The
--current section is not changed. The replaced subsection is put onto
--the section stack in place of the then current top of stack subsection.
--
--
--File: as.info, Node: Symver, Next: Tag, Prev: SubSection, Up: Pseudo Ops
--
--7.111 `.symver'
--===============
--
--Use the `.symver' directive to bind symbols to specific version nodes
--within a source file. This is only supported on ELF platforms, and is
--typically used when assembling files to be linked into a shared library.
--There are cases where it may make sense to use this in objects to be
--bound into an application itself so as to override a versioned symbol
--from a shared library.
--
-- For ELF targets, the `.symver' directive can be used like this:
-- .symver NAME, NAME2@NODENAME
-- If the symbol NAME is defined within the file being assembled, the
--`.symver' directive effectively creates a symbol alias with the name
--NAME2@NODENAME, and in fact the main reason that we just don't try and
--create a regular alias is that the @ character isn't permitted in
--symbol names. The NAME2 part of the name is the actual name of the
--symbol by which it will be externally referenced. The name NAME itself
--is merely a name of convenience that is used so that it is possible to
--have definitions for multiple versions of a function within a single
--source file, and so that the compiler can unambiguously know which
--version of a function is being mentioned. The NODENAME portion of the
--alias should be the name of a node specified in the version script
--supplied to the linker when building a shared library. If you are
--attempting to override a versioned symbol from a shared library, then
--NODENAME should correspond to the nodename of the symbol you are trying
--to override.
--
-- If the symbol NAME is not defined within the file being assembled,
--all references to NAME will be changed to NAME2@NODENAME. If no
--reference to NAME is made, NAME2@NODENAME will be removed from the
--symbol table.
--
-- Another usage of the `.symver' directive is:
-- .symver NAME, NAME2@@NODENAME
-- In this case, the symbol NAME must exist and be defined within the
--file being assembled. It is similar to NAME2@NODENAME. The difference
--is NAME2@@NODENAME will also be used to resolve references to NAME2 by
--the linker.
--
-- The third usage of the `.symver' directive is:
-- .symver NAME, NAME2@@@NODENAME
-- When NAME is not defined within the file being assembled, it is
--treated as NAME2@NODENAME. When NAME is defined within the file being
--assembled, the symbol name, NAME, will be changed to NAME2@@NODENAME.
--
--
--File: as.info, Node: Tag, Next: Text, Prev: Symver, Up: Pseudo Ops
--
--7.112 `.tag STRUCTNAME'
--=======================
--
--This directive is generated by compilers to include auxiliary debugging
--information in the symbol table. It is only permitted inside
--`.def'/`.endef' pairs. Tags are used to link structure definitions in
--the symbol table with instances of those structures.
--
--
--File: as.info, Node: Text, Next: Title, Prev: Tag, Up: Pseudo Ops
--
--7.113 `.text SUBSECTION'
--========================
--
--Tells `as' to assemble the following statements onto the end of the
--text subsection numbered SUBSECTION, which is an absolute expression.
--If SUBSECTION is omitted, subsection number zero is used.
--
--
--File: as.info, Node: Title, Next: Type, Prev: Text, Up: Pseudo Ops
--
--7.114 `.title "HEADING"'
--========================
--
--Use HEADING as the title (second line, immediately after the source
--file name and pagenumber) when generating assembly listings.
--
-- This directive affects subsequent pages, as well as the current page
--if it appears within ten lines of the top of a page.
--
--
--File: as.info, Node: Type, Next: Uleb128, Prev: Title, Up: Pseudo Ops
--
--7.115 `.type'
--=============
--
--This directive is used to set the type of a symbol.
--
--COFF Version
--------------
--
-- For COFF targets, this directive is permitted only within
--`.def'/`.endef' pairs. It is used like this:
--
-- .type INT
--
-- This records the integer INT as the type attribute of a symbol table
--entry.
--
--ELF Version
-------------
--
-- For ELF targets, the `.type' directive is used like this:
--
-- .type NAME , TYPE DESCRIPTION
--
-- This sets the type of symbol NAME to be either a function symbol or
--an object symbol. There are five different syntaxes supported for the
--TYPE DESCRIPTION field, in order to provide compatibility with various
--other assemblers.
--
-- Because some of the characters used in these syntaxes (such as `@'
--and `#') are comment characters for some architectures, some of the
--syntaxes below do not work on all architectures. The first variant
--will be accepted by the GNU assembler on all architectures so that
--variant should be used for maximum portability, if you do not need to
--assemble your code with other assemblers.
--
-- The syntaxes supported are:
--
-- .type <name> STT_<TYPE_IN_UPPER_CASE>
-- .type <name>,#<type>
-- .type <name>,@<type>
-- .type <name>,%<type>
-- .type <name>,"<type>"
--
-- The types supported are:
--
--`STT_FUNC'
--`function'
-- Mark the symbol as being a function name.
--
--`STT_GNU_IFUNC'
--`gnu_indirect_function'
-- Mark the symbol as an indirect function when evaluated during reloc
-- processing. (This is only supported on assemblers targeting GNU
-- systems).
--
--`STT_OBJECT'
--`object'
-- Mark the symbol as being a data object.
--
--`STT_TLS'
--`tls_object'
-- Mark the symbol as being a thead-local data object.
--
--`STT_COMMON'
--`common'
-- Mark the symbol as being a common data object.
--
--`STT_NOTYPE'
--`notype'
-- Does not mark the symbol in any way. It is supported just for
-- completeness.
--
--`gnu_unique_object'
-- Marks the symbol as being a globally unique data object. The
-- dynamic linker will make sure that in the entire process there is
-- just one symbol with this name and type in use. (This is only
-- supported on assemblers targeting GNU systems).
--
--
-- Note: Some targets support extra types in addition to those listed
--above.
--
--
--File: as.info, Node: Uleb128, Next: Val, Prev: Type, Up: Pseudo Ops
--
--7.116 `.uleb128 EXPRESSIONS'
--============================
--
--ULEB128 stands for "unsigned little endian base 128." This is a
--compact, variable length representation of numbers used by the DWARF
--symbolic debugging format. *Note `.sleb128': Sleb128.
--
--
--File: as.info, Node: Val, Next: Version, Prev: Uleb128, Up: Pseudo Ops
--
--7.117 `.val ADDR'
--=================
--
--This directive, permitted only within `.def'/`.endef' pairs, records
--the address ADDR as the value attribute of a symbol table entry.
--
--
--File: as.info, Node: Version, Next: VTableEntry, Prev: Val, Up: Pseudo Ops
--
--7.118 `.version "STRING"'
--=========================
--
--This directive creates a `.note' section and places into it an ELF
--formatted note of type NT_VERSION. The note's name is set to `string'.
--
--
--File: as.info, Node: VTableEntry, Next: VTableInherit, Prev: Version, Up: Pseudo Ops
--
--7.119 `.vtable_entry TABLE, OFFSET'
--===================================
--
--This directive finds or creates a symbol `table' and creates a
--`VTABLE_ENTRY' relocation for it with an addend of `offset'.
--
--
--File: as.info, Node: VTableInherit, Next: Warning, Prev: VTableEntry, Up: Pseudo Ops
--
--7.120 `.vtable_inherit CHILD, PARENT'
--=====================================
--
--This directive finds the symbol `child' and finds or creates the symbol
--`parent' and then creates a `VTABLE_INHERIT' relocation for the parent
--whose addend is the value of the child symbol. As a special case the
--parent name of `0' is treated as referring to the `*ABS*' section.
--
--
--File: as.info, Node: Warning, Next: Weak, Prev: VTableInherit, Up: Pseudo Ops
--
--7.121 `.warning "STRING"'
--=========================
--
--Similar to the directive `.error' (*note `.error "STRING"': Error.),
--but just emits a warning.
--
--
--File: as.info, Node: Weak, Next: Weakref, Prev: Warning, Up: Pseudo Ops
--
--7.122 `.weak NAMES'
--===================
--
--This directive sets the weak attribute on the comma separated list of
--symbol `names'. If the symbols do not already exist, they will be
--created.
--
-- On COFF targets other than PE, weak symbols are a GNU extension.
--This directive sets the weak attribute on the comma separated list of
--symbol `names'. If the symbols do not already exist, they will be
--created.
--
-- On the PE target, weak symbols are supported natively as weak
--aliases. When a weak symbol is created that is not an alias, GAS
--creates an alternate symbol to hold the default value.
--
--
--File: as.info, Node: Weakref, Next: Word, Prev: Weak, Up: Pseudo Ops
--
--7.123 `.weakref ALIAS, TARGET'
--==============================
--
--This directive creates an alias to the target symbol that enables the
--symbol to be referenced with weak-symbol semantics, but without
--actually making it weak. If direct references or definitions of the
--symbol are present, then the symbol will not be weak, but if all
--references to it are through weak references, the symbol will be marked
--as weak in the symbol table.
--
-- The effect is equivalent to moving all references to the alias to a
--separate assembly source file, renaming the alias to the symbol in it,
--declaring the symbol as weak there, and running a reloadable link to
--merge the object files resulting from the assembly of the new source
--file and the old source file that had the references to the alias
--removed.
--
-- The alias itself never makes to the symbol table, and is entirely
--handled within the assembler.
--
--
--File: as.info, Node: Word, Next: Deprecated, Prev: Weakref, Up: Pseudo Ops
--
--7.124 `.word EXPRESSIONS'
--=========================
--
--This directive expects zero or more EXPRESSIONS, of any section,
--separated by commas.
--
-- The size of the number emitted, and its byte order, depend on what
--target computer the assembly is for.
--
-- _Warning: Special Treatment to support Compilers_
--
-- Machines with a 32-bit address space, but that do less than 32-bit
--addressing, require the following special treatment. If the machine of
--interest to you does 32-bit addressing (or doesn't require it; *note
--Machine Dependencies::), you can ignore this issue.
--
-- In order to assemble compiler output into something that works, `as'
--occasionally does strange things to `.word' directives. Directives of
--the form `.word sym1-sym2' are often emitted by compilers as part of
--jump tables. Therefore, when `as' assembles a directive of the form
--`.word sym1-sym2', and the difference between `sym1' and `sym2' does
--not fit in 16 bits, `as' creates a "secondary jump table", immediately
--before the next label. This secondary jump table is preceded by a
--short-jump to the first byte after the secondary table. This
--short-jump prevents the flow of control from accidentally falling into
--the new table. Inside the table is a long-jump to `sym2'. The
--original `.word' contains `sym1' minus the address of the long-jump to
--`sym2'.
--
-- If there were several occurrences of `.word sym1-sym2' before the
--secondary jump table, all of them are adjusted. If there was a `.word
--sym3-sym4', that also did not fit in sixteen bits, a long-jump to
--`sym4' is included in the secondary jump table, and the `.word'
--directives are adjusted to contain `sym3' minus the address of the
--long-jump to `sym4'; and so on, for as many entries in the original
--jump table as necessary.
--
--
--File: as.info, Node: Deprecated, Prev: Word, Up: Pseudo Ops
--
--7.125 Deprecated Directives
--===========================
--
--One day these directives won't work. They are included for
--compatibility with older assemblers.
--.abort
--
--.line
--
--
--File: as.info, Node: Object Attributes, Next: Machine Dependencies, Prev: Pseudo Ops, Up: Top
--
--8 Object Attributes
--*******************
--
--`as' assembles source files written for a specific architecture into
--object files for that architecture. But not all object files are alike.
--Many architectures support incompatible variations. For instance,
--floating point arguments might be passed in floating point registers if
--the object file requires hardware floating point support--or floating
--point arguments might be passed in integer registers if the object file
--supports processors with no hardware floating point unit. Or, if two
--objects are built for different generations of the same architecture,
--the combination may require the newer generation at run-time.
--
-- This information is useful during and after linking. At link time,
--`ld' can warn about incompatible object files. After link time, tools
--like `gdb' can use it to process the linked file correctly.
--
-- Compatibility information is recorded as a series of object
--attributes. Each attribute has a "vendor", "tag", and "value". The
--vendor is a string, and indicates who sets the meaning of the tag. The
--tag is an integer, and indicates what property the attribute describes.
--The value may be a string or an integer, and indicates how the
--property affects this object. Missing attributes are the same as
--attributes with a zero value or empty string value.
--
-- Object attributes were developed as part of the ABI for the ARM
--Architecture. The file format is documented in `ELF for the ARM
--Architecture'.
--
--* Menu:
--
--* GNU Object Attributes:: GNU Object Attributes
--* Defining New Object Attributes:: Defining New Object Attributes
--
--
--File: as.info, Node: GNU Object Attributes, Next: Defining New Object Attributes, Up: Object Attributes
--
--8.1 GNU Object Attributes
--=========================
--
--The `.gnu_attribute' directive records an object attribute with vendor
--`gnu'.
--
-- Except for `Tag_compatibility', which has both an integer and a
--string for its value, GNU attributes have a string value if the tag
--number is odd and an integer value if the tag number is even. The
--second bit (`TAG & 2' is set for architecture-independent attributes
--and clear for architecture-dependent ones.
--
--8.1.1 Common GNU attributes
-----------------------------
--
--These attributes are valid on all architectures.
--
--Tag_compatibility (32)
-- The compatibility attribute takes an integer flag value and a
-- vendor name. If the flag value is 0, the file is compatible with
-- other toolchains. If it is 1, then the file is only compatible
-- with the named toolchain. If it is greater than 1, the file can
-- only be processed by other toolchains under some private
-- arrangement indicated by the flag value and the vendor name.
--
--8.1.2 MIPS Attributes
-----------------------
--
--Tag_GNU_MIPS_ABI_FP (4)
-- The floating-point ABI used by this object file. The value will
-- be:
--
-- * 0 for files not affected by the floating-point ABI.
--
-- * 1 for files using the hardware floating-point with a standard
-- double-precision FPU.
--
-- * 2 for files using the hardware floating-point ABI with a
-- single-precision FPU.
--
-- * 3 for files using the software floating-point ABI.
--
-- * 4 for files using the hardware floating-point ABI with 64-bit
-- wide double-precision floating-point registers and 32-bit
-- wide general purpose registers.
--
--8.1.3 PowerPC Attributes
--------------------------
--
--Tag_GNU_Power_ABI_FP (4)
-- The floating-point ABI used by this object file. The value will
-- be:
--
-- * 0 for files not affected by the floating-point ABI.
--
-- * 1 for files using double-precision hardware floating-point
-- ABI.
--
-- * 2 for files using the software floating-point ABI.
--
-- * 3 for files using single-precision hardware floating-point
-- ABI.
--
--Tag_GNU_Power_ABI_Vector (8)
-- The vector ABI used by this object file. The value will be:
--
-- * 0 for files not affected by the vector ABI.
--
-- * 1 for files using general purpose registers to pass vectors.
--
-- * 2 for files using AltiVec registers to pass vectors.
--
-- * 3 for files using SPE registers to pass vectors.
--
--
--File: as.info, Node: Defining New Object Attributes, Prev: GNU Object Attributes, Up: Object Attributes
--
--8.2 Defining New Object Attributes
--==================================
--
--If you want to define a new GNU object attribute, here are the places
--you will need to modify. New attributes should be discussed on the
--`binutils' mailing list.
--
-- * This manual, which is the official register of attributes.
--
-- * The header for your architecture `include/elf', to define the tag.
--
-- * The `bfd' support file for your architecture, to merge the
-- attribute and issue any appropriate link warnings.
--
-- * Test cases in `ld/testsuite' for merging and link warnings.
--
-- * `binutils/readelf.c' to display your attribute.
--
-- * GCC, if you want the compiler to mark the attribute automatically.
--
--
--File: as.info, Node: Machine Dependencies, Next: Reporting Bugs, Prev: Object Attributes, Up: Top
--
--9 Machine Dependent Features
--****************************
--
--The machine instruction sets are (almost by definition) different on
--each machine where `as' runs. Floating point representations vary as
--well, and `as' often supports a few additional directives or
--command-line options for compatibility with other assemblers on a
--particular platform. Finally, some versions of `as' support special
--pseudo-instructions for branch optimization.
--
-- This chapter discusses most of these differences, though it does not
--include details on any machine's instruction set. For details on that
--subject, see the hardware manufacturer's manual.
--
--* Menu:
--
--
--* AArch64-Dependent:: AArch64 Dependent Features
--
--* Alpha-Dependent:: Alpha Dependent Features
--
--* ARC-Dependent:: ARC Dependent Features
--
--* ARM-Dependent:: ARM Dependent Features
--
--* AVR-Dependent:: AVR Dependent Features
--
--* Blackfin-Dependent:: Blackfin Dependent Features
--
--* CR16-Dependent:: CR16 Dependent Features
--
--* CRIS-Dependent:: CRIS Dependent Features
--
--* D10V-Dependent:: D10V Dependent Features
--
--* D30V-Dependent:: D30V Dependent Features
--
--* Epiphany-Dependent:: EPIPHANY Dependent Features
--
--* H8/300-Dependent:: Renesas H8/300 Dependent Features
--
--* HPPA-Dependent:: HPPA Dependent Features
--
--* ESA/390-Dependent:: IBM ESA/390 Dependent Features
--
--* i386-Dependent:: Intel 80386 and AMD x86-64 Dependent Features
--
--* i860-Dependent:: Intel 80860 Dependent Features
--
--* i960-Dependent:: Intel 80960 Dependent Features
--
--* IA-64-Dependent:: Intel IA-64 Dependent Features
--
--* IP2K-Dependent:: IP2K Dependent Features
--
--* LM32-Dependent:: LM32 Dependent Features
--
--* M32C-Dependent:: M32C Dependent Features
--
--* M32R-Dependent:: M32R Dependent Features
--
--* M68K-Dependent:: M680x0 Dependent Features
--
--* M68HC11-Dependent:: M68HC11 and 68HC12 Dependent Features
--
--* Meta-Dependent :: Meta Dependent Features
--
--* MicroBlaze-Dependent:: MICROBLAZE Dependent Features
--
--* MIPS-Dependent:: MIPS Dependent Features
--
--* MMIX-Dependent:: MMIX Dependent Features
--
--* MSP430-Dependent:: MSP430 Dependent Features
--
--* NiosII-Dependent:: Altera Nios II Dependent Features
--
--* NS32K-Dependent:: NS32K Dependent Features
--
--* SH-Dependent:: Renesas / SuperH SH Dependent Features
--* SH64-Dependent:: SuperH SH64 Dependent Features
--
--* PDP-11-Dependent:: PDP-11 Dependent Features
--
--* PJ-Dependent:: picoJava Dependent Features
--
--* PPC-Dependent:: PowerPC Dependent Features
--
--* RL78-Dependent:: RL78 Dependent Features
--
--* RX-Dependent:: RX Dependent Features
--
--* S/390-Dependent:: IBM S/390 Dependent Features
--
--* SCORE-Dependent:: SCORE Dependent Features
--
--* Sparc-Dependent:: SPARC Dependent Features
--
--* TIC54X-Dependent:: TI TMS320C54x Dependent Features
--
--* TIC6X-Dependent :: TI TMS320C6x Dependent Features
--
--* TILE-Gx-Dependent :: Tilera TILE-Gx Dependent Features
--
--* TILEPro-Dependent :: Tilera TILEPro Dependent Features
--
--* V850-Dependent:: V850 Dependent Features
--
--* XGATE-Dependent:: XGATE Features
--
--* XSTORMY16-Dependent:: XStormy16 Dependent Features
--
--* Xtensa-Dependent:: Xtensa Dependent Features
--
--* Z80-Dependent:: Z80 Dependent Features
--
--* Z8000-Dependent:: Z8000 Dependent Features
--
--* Vax-Dependent:: VAX Dependent Features
--
--
--File: as.info, Node: AArch64-Dependent, Next: Alpha-Dependent, Up: Machine Dependencies
--
--9.1 AArch64 Dependent Features
--==============================
--
--* Menu:
--
--* AArch64 Options:: Options
--* AArch64 Syntax:: Syntax
--* AArch64 Floating Point:: Floating Point
--* AArch64 Directives:: AArch64 Machine Directives
--* AArch64 Opcodes:: Opcodes
--* AArch64 Mapping Symbols:: Mapping Symbols
--
--
--File: as.info, Node: AArch64 Options, Next: AArch64 Syntax, Up: AArch64-Dependent
--
--9.1.1 Options
---------------
--
--`-EB'
-- This option specifies that the output generated by the assembler
-- should be marked as being encoded for a big-endian processor.
--
--`-EL'
-- This option specifies that the output generated by the assembler
-- should be marked as being encoded for a little-endian processor.
--
--`-mabi=ABI'
-- Specify which ABI the source code uses. The recognized arguments
-- are: `ilp32' and `lp64', which decides the generated object file
-- in ELF32 and ELF64 format respectively. The default is `lp64'.
--
--
--
--File: as.info, Node: AArch64 Syntax, Next: AArch64 Floating Point, Prev: AArch64 Options, Up: AArch64-Dependent
--
--9.1.2 Syntax
--------------
--
--* Menu:
--
--* AArch64-Chars:: Special Characters
--* AArch64-Regs:: Register Names
--* AArch64-Relocations:: Relocations
--
--
--File: as.info, Node: AArch64-Chars, Next: AArch64-Regs, Up: AArch64 Syntax
--
--9.1.2.1 Special Characters
--..........................
--
--The presence of a `//' on a line indicates the start of a comment that
--extends to the end of the current line. If a `#' appears as the first
--character of a line, the whole line is treated as a comment.
--
-- The `;' character can be used instead of a newline to separate
--statements.
--
-- The `#' can be optionally used to indicate immediate operands.
--
--
--File: as.info, Node: AArch64-Regs, Next: AArch64-Relocations, Prev: AArch64-Chars, Up: AArch64 Syntax
--
--9.1.2.2 Register Names
--......................
--
--Please refer to the section `4.4 Register Names' of `ARMv8 Instruction
--Set Overview', which is available at `http://infocenter.arm.com'.
--
--
--File: as.info, Node: AArch64-Relocations, Prev: AArch64-Regs, Up: AArch64 Syntax
--
--9.1.2.3 Relocations
--...................
--
--Relocations for `MOVZ' and `MOVK' instructions can be generated by
--prefixing the label with `#:abs_g2:' etc. For example to load the
--48-bit absolute address of FOO into x0:
--
-- movz x0, #:abs_g2:foo // bits 32-47, overflow check
-- movk x0, #:abs_g1_nc:foo // bits 16-31, no overflow check
-- movk x0, #:abs_g0_nc:foo // bits 0-15, no overflow check
--
-- Relocations for `ADRP', and `ADD', `LDR' or `STR' instructions can
--be generated by prefixing the label with `#:pg_hi21:' and `#:lo12:'
--respectively.
--
-- For example to use 33-bit (+/-4GB) pc-relative addressing to load
--the address of FOO into x0:
--
-- adrp x0, #:pg_hi21:foo
-- add x0, x0, #:lo12:foo
--
-- Or to load the value of FOO into x0:
--
-- adrp x0, #:pg_hi21:foo
-- ldr x0, [x0, #:lo12:foo]
--
-- Note that `#:pg_hi21:' is optional.
--
-- adrp x0, foo
--
-- is equivalent to
--
-- adrp x0, #:pg_hi21:foo
--
--
--File: as.info, Node: AArch64 Floating Point, Next: AArch64 Directives, Prev: AArch64 Syntax, Up: AArch64-Dependent
--
--9.1.3 Floating Point
----------------------
--
--The AArch64 architecture uses IEEE floating-point numbers.
--
--
--File: as.info, Node: AArch64 Directives, Next: AArch64 Opcodes, Prev: AArch64 Floating Point, Up: AArch64-Dependent
--
--9.1.4 AArch64 Machine Directives
----------------------------------
--
--`.bss'
-- This directive switches to the `.bss' section.
--
--`.ltorg'
-- This directive causes the current contents of the literal pool to
-- be dumped into the current section (which is assumed to be the
-- .text section) at the current location (aligned to a word
-- boundary). `GAS' maintains a separate literal pool for each
-- section and each sub-section. The `.ltorg' directive will only
-- affect the literal pool of the current section and sub-section.
-- At the end of assembly all remaining, un-empty literal pools will
-- automatically be dumped.
--
-- Note - older versions of `GAS' would dump the current literal pool
-- any time a section change occurred. This is no longer done, since
-- it prevents accurate control of the placement of literal pools.
--
--`.pool'
-- This is a synonym for .ltorg.
--
--`NAME .req REGISTER NAME'
-- This creates an alias for REGISTER NAME called NAME. For example:
--
-- foo .req w0
--
--`.unreq ALIAS-NAME'
-- This undefines a register alias which was previously defined using
-- the `req' directive. For example:
--
-- foo .req w0
-- .unreq foo
--
-- An error occurs if the name is undefined. Note - this pseudo op
-- can be used to delete builtin in register name aliases (eg 'w0').
-- This should only be done if it is really necessary.
--
--
--
--File: as.info, Node: AArch64 Opcodes, Next: AArch64 Mapping Symbols, Prev: AArch64 Directives, Up: AArch64-Dependent
--
--9.1.5 Opcodes
---------------
--
--`as' implements all the standard AArch64 opcodes. It also implements
--several pseudo opcodes, including several synthetic load instructions.
--
--`LDR ='
-- ldr <register> , =<expression>
--
-- The constant expression will be placed into the nearest literal
-- pool (if it not already there) and a PC-relative LDR instruction
-- will be generated.
--
--
-- For more information on the AArch64 instruction set and assembly
--language notation, see `ARMv8 Instruction Set Overview' available at
--`http://infocenter.arm.com'.
--
--
--File: as.info, Node: AArch64 Mapping Symbols, Prev: AArch64 Opcodes, Up: AArch64-Dependent
--
--9.1.6 Mapping Symbols
-----------------------
--
--The AArch64 ELF specification requires that special symbols be inserted
--into object files to mark certain features:
--
--`$x'
-- At the start of a region of code containing AArch64 instructions.
--
--`$d'
-- At the start of a region of data.
--
--
--
--File: as.info, Node: Alpha-Dependent, Next: ARC-Dependent, Prev: AArch64-Dependent, Up: Machine Dependencies
--
--9.2 Alpha Dependent Features
--============================
--
--* Menu:
--
--* Alpha Notes:: Notes
--* Alpha Options:: Options
--* Alpha Syntax:: Syntax
--* Alpha Floating Point:: Floating Point
--* Alpha Directives:: Alpha Machine Directives
--* Alpha Opcodes:: Opcodes
--
--
--File: as.info, Node: Alpha Notes, Next: Alpha Options, Up: Alpha-Dependent
--
--9.2.1 Notes
-------------
--
--The documentation here is primarily for the ELF object format. `as'
--also supports the ECOFF and EVAX formats, but features specific to
--these formats are not yet documented.
--
--
--File: as.info, Node: Alpha Options, Next: Alpha Syntax, Prev: Alpha Notes, Up: Alpha-Dependent
--
--9.2.2 Options
---------------
--
--`-mCPU'
-- This option specifies the target processor. If an attempt is made
-- to assemble an instruction which will not execute on the target
-- processor, the assembler may either expand the instruction as a
-- macro or issue an error message. This option is equivalent to the
-- `.arch' directive.
--
-- The following processor names are recognized: `21064', `21064a',
-- `21066', `21068', `21164', `21164a', `21164pc', `21264', `21264a',
-- `21264b', `ev4', `ev5', `lca45', `ev5', `ev56', `pca56', `ev6',
-- `ev67', `ev68'. The special name `all' may be used to allow the
-- assembler to accept instructions valid for any Alpha processor.
--
-- In order to support existing practice in OSF/1 with respect to
-- `.arch', and existing practice within `MILO' (the Linux ARC
-- bootloader), the numbered processor names (e.g. 21064) enable the
-- processor-specific PALcode instructions, while the
-- "electro-vlasic" names (e.g. `ev4') do not.
--
--`-mdebug'
--`-no-mdebug'
-- Enables or disables the generation of `.mdebug' encapsulation for
-- stabs directives and procedure descriptors. The default is to
-- automatically enable `.mdebug' when the first stabs directive is
-- seen.
--
--`-relax'
-- This option forces all relocations to be put into the object file,
-- instead of saving space and resolving some relocations at assembly
-- time. Note that this option does not propagate all symbol
-- arithmetic into the object file, because not all symbol arithmetic
-- can be represented. However, the option can still be useful in
-- specific applications.
--
--`-replace'
--`-noreplace'
-- Enables or disables the optimization of procedure calls, both at
-- assemblage and at link time. These options are only available for
-- VMS targets and `-replace' is the default. See section 1.4.1 of
-- the OpenVMS Linker Utility Manual.
--
--`-g'
-- This option is used when the compiler generates debug information.
-- When `gcc' is using `mips-tfile' to generate debug information
-- for ECOFF, local labels must be passed through to the object file.
-- Otherwise this option has no effect.
--
--`-GSIZE'
-- A local common symbol larger than SIZE is placed in `.bss', while
-- smaller symbols are placed in `.sbss'.
--
--`-F'
--`-32addr'
-- These options are ignored for backward compatibility.
--
--
--File: as.info, Node: Alpha Syntax, Next: Alpha Floating Point, Prev: Alpha Options, Up: Alpha-Dependent
--
--9.2.3 Syntax
--------------
--
--The assembler syntax closely follow the Alpha Reference Manual;
--assembler directives and general syntax closely follow the OSF/1 and
--OpenVMS syntax, with a few differences for ELF.
--
--* Menu:
--
--* Alpha-Chars:: Special Characters
--* Alpha-Regs:: Register Names
--* Alpha-Relocs:: Relocations
--
--
--File: as.info, Node: Alpha-Chars, Next: Alpha-Regs, Up: Alpha Syntax
--
--9.2.3.1 Special Characters
--..........................
--
--`#' is the line comment character. Note that if `#' is the first
--character on a line then it can also be a logical line number directive
--(*note Comments::) or a preprocessor control command (*note
--Preprocessing::).
--
-- `;' can be used instead of a newline to separate statements.
--
--
--File: as.info, Node: Alpha-Regs, Next: Alpha-Relocs, Prev: Alpha-Chars, Up: Alpha Syntax
--
--9.2.3.2 Register Names
--......................
--
--The 32 integer registers are referred to as `$N' or `$rN'. In
--addition, registers 15, 28, 29, and 30 may be referred to by the
--symbols `$fp', `$at', `$gp', and `$sp' respectively.
--
-- The 32 floating-point registers are referred to as `$fN'.
--
--
--File: as.info, Node: Alpha-Relocs, Prev: Alpha-Regs, Up: Alpha Syntax
--
--9.2.3.3 Relocations
--...................
--
--Some of these relocations are available for ECOFF, but mostly only for
--ELF. They are modeled after the relocation format introduced in
--Digital Unix 4.0, but there are additions.
--
-- The format is `!TAG' or `!TAG!NUMBER' where TAG is the name of the
--relocation. In some cases NUMBER is used to relate specific
--instructions.
--
-- The relocation is placed at the end of the instruction like so:
--
-- ldah $0,a($29) !gprelhigh
-- lda $0,a($0) !gprellow
-- ldq $1,b($29) !literal!100
-- ldl $2,0($1) !lituse_base!100
--
--`!literal'
--`!literal!N'
-- Used with an `ldq' instruction to load the address of a symbol
-- from the GOT.
--
-- A sequence number N is optional, and if present is used to pair
-- `lituse' relocations with this `literal' relocation. The `lituse'
-- relocations are used by the linker to optimize the code based on
-- the final location of the symbol.
--
-- Note that these optimizations are dependent on the data flow of the
-- program. Therefore, if _any_ `lituse' is paired with a `literal'
-- relocation, then _all_ uses of the register set by the `literal'
-- instruction must also be marked with `lituse' relocations. This
-- is because the original `literal' instruction may be deleted or
-- transformed into another instruction.
--
-- Also note that there may be a one-to-many relationship between
-- `literal' and `lituse', but not a many-to-one. That is, if there
-- are two code paths that load up the same address and feed the
-- value to a single use, then the use may not use a `lituse'
-- relocation.
--
--`!lituse_base!N'
-- Used with any memory format instruction (e.g. `ldl') to indicate
-- that the literal is used for an address load. The offset field of
-- the instruction must be zero. During relaxation, the code may be
-- altered to use a gp-relative load.
--
--`!lituse_jsr!N'
-- Used with a register branch format instruction (e.g. `jsr') to
-- indicate that the literal is used for a call. During relaxation,
-- the code may be altered to use a direct branch (e.g. `bsr').
--
--`!lituse_jsrdirect!N'
-- Similar to `lituse_jsr', but also that this call cannot be vectored
-- through a PLT entry. This is useful for functions with special
-- calling conventions which do not allow the normal call-clobbered
-- registers to be clobbered.
--
--`!lituse_bytoff!N'
-- Used with a byte mask instruction (e.g. `extbl') to indicate that
-- only the low 3 bits of the address are relevant. During
-- relaxation, the code may be altered to use an immediate instead of
-- a register shift.
--
--`!lituse_addr!N'
-- Used with any other instruction to indicate that the original
-- address is in fact used, and the original `ldq' instruction may
-- not be altered or deleted. This is useful in conjunction with
-- `lituse_jsr' to test whether a weak symbol is defined.
--
-- ldq $27,foo($29) !literal!1
-- beq $27,is_undef !lituse_addr!1
-- jsr $26,($27),foo !lituse_jsr!1
--
--`!lituse_tlsgd!N'
-- Used with a register branch format instruction to indicate that the
-- literal is the call to `__tls_get_addr' used to compute the
-- address of the thread-local storage variable whose descriptor was
-- loaded with `!tlsgd!N'.
--
--`!lituse_tlsldm!N'
-- Used with a register branch format instruction to indicate that the
-- literal is the call to `__tls_get_addr' used to compute the
-- address of the base of the thread-local storage block for the
-- current module. The descriptor for the module must have been
-- loaded with `!tlsldm!N'.
--
--`!gpdisp!N'
-- Used with `ldah' and `lda' to load the GP from the current
-- address, a-la the `ldgp' macro. The source register for the
-- `ldah' instruction must contain the address of the `ldah'
-- instruction. There must be exactly one `lda' instruction paired
-- with the `ldah' instruction, though it may appear anywhere in the
-- instruction stream. The immediate operands must be zero.
--
-- bsr $26,foo
-- ldah $29,0($26) !gpdisp!1
-- lda $29,0($29) !gpdisp!1
--
--`!gprelhigh'
-- Used with an `ldah' instruction to add the high 16 bits of a
-- 32-bit displacement from the GP.
--
--`!gprellow'
-- Used with any memory format instruction to add the low 16 bits of a
-- 32-bit displacement from the GP.
--
--`!gprel'
-- Used with any memory format instruction to add a 16-bit
-- displacement from the GP.
--
--`!samegp'
-- Used with any branch format instruction to skip the GP load at the
-- target address. The referenced symbol must have the same GP as the
-- source object file, and it must be declared to either not use `$27'
-- or perform a standard GP load in the first two instructions via the
-- `.prologue' directive.
--
--`!tlsgd'
--`!tlsgd!N'
-- Used with an `lda' instruction to load the address of a TLS
-- descriptor for a symbol in the GOT.
--
-- The sequence number N is optional, and if present it used to pair
-- the descriptor load with both the `literal' loading the address of
-- the `__tls_get_addr' function and the `lituse_tlsgd' marking the
-- call to that function.
--
-- For proper relaxation, both the `tlsgd', `literal' and `lituse'
-- relocations must be in the same extended basic block. That is,
-- the relocation with the lowest address must be executed first at
-- runtime.
--
--`!tlsldm'
--`!tlsldm!N'
-- Used with an `lda' instruction to load the address of a TLS
-- descriptor for the current module in the GOT.
--
-- Similar in other respects to `tlsgd'.
--
--`!gotdtprel'
-- Used with an `ldq' instruction to load the offset of the TLS
-- symbol within its module's thread-local storage block. Also known
-- as the dynamic thread pointer offset or dtp-relative offset.
--
--`!dtprelhi'
--`!dtprello'
--`!dtprel'
-- Like `gprel' relocations except they compute dtp-relative offsets.
--
--`!gottprel'
-- Used with an `ldq' instruction to load the offset of the TLS
-- symbol from the thread pointer. Also known as the tp-relative
-- offset.
--
--`!tprelhi'
--`!tprello'
--`!tprel'
-- Like `gprel' relocations except they compute tp-relative offsets.
--
--
--File: as.info, Node: Alpha Floating Point, Next: Alpha Directives, Prev: Alpha Syntax, Up: Alpha-Dependent
--
--9.2.4 Floating Point
----------------------
--
--The Alpha family uses both IEEE and VAX floating-point numbers.
--
--
--File: as.info, Node: Alpha Directives, Next: Alpha Opcodes, Prev: Alpha Floating Point, Up: Alpha-Dependent
--
--9.2.5 Alpha Assembler Directives
----------------------------------
--
--`as' for the Alpha supports many additional directives for
--compatibility with the native assembler. This section describes them
--only briefly.
--
-- These are the additional directives in `as' for the Alpha:
--
--`.arch CPU'
-- Specifies the target processor. This is equivalent to the `-mCPU'
-- command-line option. *Note Options: Alpha Options, for a list of
-- values for CPU.
--
--`.ent FUNCTION[, N]'
-- Mark the beginning of FUNCTION. An optional number may follow for
-- compatibility with the OSF/1 assembler, but is ignored. When
-- generating `.mdebug' information, this will create a procedure
-- descriptor for the function. In ELF, it will mark the symbol as a
-- function a-la the generic `.type' directive.
--
--`.end FUNCTION'
-- Mark the end of FUNCTION. In ELF, it will set the size of the
-- symbol a-la the generic `.size' directive.
--
--`.mask MASK, OFFSET'
-- Indicate which of the integer registers are saved in the current
-- function's stack frame. MASK is interpreted a bit mask in which
-- bit N set indicates that register N is saved. The registers are
-- saved in a block located OFFSET bytes from the "canonical frame
-- address" (CFA) which is the value of the stack pointer on entry to
-- the function. The registers are saved sequentially, except that
-- the return address register (normally `$26') is saved first.
--
-- This and the other directives that describe the stack frame are
-- currently only used when generating `.mdebug' information. They
-- may in the future be used to generate DWARF2 `.debug_frame' unwind
-- information for hand written assembly.
--
--`.fmask MASK, OFFSET'
-- Indicate which of the floating-point registers are saved in the
-- current stack frame. The MASK and OFFSET parameters are
-- interpreted as with `.mask'.
--
--`.frame FRAMEREG, FRAMEOFFSET, RETREG[, ARGOFFSET]'
-- Describes the shape of the stack frame. The frame pointer in use
-- is FRAMEREG; normally this is either `$fp' or `$sp'. The frame
-- pointer is FRAMEOFFSET bytes below the CFA. The return address is
-- initially located in RETREG until it is saved as indicated in
-- `.mask'. For compatibility with OSF/1 an optional ARGOFFSET
-- parameter is accepted and ignored. It is believed to indicate the
-- offset from the CFA to the saved argument registers.
--
--`.prologue N'
-- Indicate that the stack frame is set up and all registers have been
-- spilled. The argument N indicates whether and how the function
-- uses the incoming "procedure vector" (the address of the called
-- function) in `$27'. 0 indicates that `$27' is not used; 1
-- indicates that the first two instructions of the function use `$27'
-- to perform a load of the GP register; 2 indicates that `$27' is
-- used in some non-standard way and so the linker cannot elide the
-- load of the procedure vector during relaxation.
--
--`.usepv FUNCTION, WHICH'
-- Used to indicate the use of the `$27' register, similar to
-- `.prologue', but without the other semantics of needing to be
-- inside an open `.ent'/`.end' block.
--
-- The WHICH argument should be either `no', indicating that `$27' is
-- not used, or `std', indicating that the first two instructions of
-- the function perform a GP load.
--
-- One might use this directive instead of `.prologue' if you are
-- also using dwarf2 CFI directives.
--
--`.gprel32 EXPRESSION'
-- Computes the difference between the address in EXPRESSION and the
-- GP for the current object file, and stores it in 4 bytes. In
-- addition to being smaller than a full 8 byte address, this also
-- does not require a dynamic relocation when used in a shared
-- library.
--
--`.t_floating EXPRESSION'
-- Stores EXPRESSION as an IEEE double precision value.
--
--`.s_floating EXPRESSION'
-- Stores EXPRESSION as an IEEE single precision value.
--
--`.f_floating EXPRESSION'
-- Stores EXPRESSION as a VAX F format value.
--
--`.g_floating EXPRESSION'
-- Stores EXPRESSION as a VAX G format value.
--
--`.d_floating EXPRESSION'
-- Stores EXPRESSION as a VAX D format value.
--
--`.set FEATURE'
-- Enables or disables various assembler features. Using the positive
-- name of the feature enables while using `noFEATURE' disables.
--
-- `at'
-- Indicates that macro expansions may clobber the "assembler
-- temporary" (`$at' or `$28') register. Some macros may not be
-- expanded without this and will generate an error message if
-- `noat' is in effect. When `at' is in effect, a warning will
-- be generated if `$at' is used by the programmer.
--
-- `macro'
-- Enables the expansion of macro instructions. Note that
-- variants of real instructions, such as `br label' vs `br
-- $31,label' are considered alternate forms and not macros.
--
-- `move'
-- `reorder'
-- `volatile'
-- These control whether and how the assembler may re-order
-- instructions. Accepted for compatibility with the OSF/1
-- assembler, but `as' does not do instruction scheduling, so
-- these features are ignored.
--
-- The following directives are recognized for compatibility with the
--OSF/1 assembler but are ignored.
--
-- .proc .aproc
-- .reguse .livereg
-- .option .aent
-- .ugen .eflag
-- .alias .noalias
--
--
--File: as.info, Node: Alpha Opcodes, Prev: Alpha Directives, Up: Alpha-Dependent
--
--9.2.6 Opcodes
---------------
--
--For detailed information on the Alpha machine instruction set, see the
--Alpha Architecture Handbook
--(ftp://ftp.digital.com/pub/Digital/info/semiconductor/literature/alphaahb.pdf).
--
--
--File: as.info, Node: ARC-Dependent, Next: ARM-Dependent, Prev: Alpha-Dependent, Up: Machine Dependencies
--
--9.3 ARC Dependent Features
--==========================
--
--* Menu:
--
--* ARC Options:: Options
--* ARC Syntax:: Syntax
--* ARC Floating Point:: Floating Point
--* ARC Directives:: ARC Machine Directives
--* ARC Opcodes:: Opcodes
--
--
--File: as.info, Node: ARC Options, Next: ARC Syntax, Up: ARC-Dependent
--
--9.3.1 Options
---------------
--
--`-marc[5|6|7|8]'
-- This option selects the core processor variant. Using `-marc' is
-- the same as `-marc6', which is also the default.
--
-- `arc5'
-- Base instruction set.
--
-- `arc6'
-- Jump-and-link (jl) instruction. No requirement of an
-- instruction between setting flags and conditional jump. For
-- example:
--
-- mov.f r0,r1
-- beq foo
--
-- `arc7'
-- Break (brk) and sleep (sleep) instructions.
--
-- `arc8'
-- Software interrupt (swi) instruction.
--
--
-- Note: the `.option' directive can to be used to select a core
-- variant from within assembly code.
--
--`-EB'
-- This option specifies that the output generated by the assembler
-- should be marked as being encoded for a big-endian processor.
--
--`-EL'
-- This option specifies that the output generated by the assembler
-- should be marked as being encoded for a little-endian processor -
-- this is the default.
--
--
--
--File: as.info, Node: ARC Syntax, Next: ARC Floating Point, Prev: ARC Options, Up: ARC-Dependent
--
--9.3.2 Syntax
--------------
--
--* Menu:
--
--* ARC-Chars:: Special Characters
--* ARC-Regs:: Register Names
--
--
--File: as.info, Node: ARC-Chars, Next: ARC-Regs, Up: ARC Syntax
--
--9.3.2.1 Special Characters
--..........................
--
--The presence of a `#' on a line indicates the start of a comment that
--extends to the end of the current line. Note that if a line starts
--with a `#' character then it can also be a logical line number
--directive (*note Comments::) or a preprocessor control command (*note
--Preprocessing::).
--
-- The ARC assembler does not support a line separator character.
--
--
--File: as.info, Node: ARC-Regs, Prev: ARC-Chars, Up: ARC Syntax
--
--9.3.2.2 Register Names
--......................
--
--*TODO*
--
--
--File: as.info, Node: ARC Floating Point, Next: ARC Directives, Prev: ARC Syntax, Up: ARC-Dependent
--
--9.3.3 Floating Point
----------------------
--
--The ARC core does not currently have hardware floating point support.
--Software floating point support is provided by `GCC' and uses IEEE
--floating-point numbers.
--
--
--File: as.info, Node: ARC Directives, Next: ARC Opcodes, Prev: ARC Floating Point, Up: ARC-Dependent
--
--9.3.4 ARC Machine Directives
------------------------------
--
--The ARC version of `as' supports the following additional machine
--directives:
--
--`.2byte EXPRESSIONS'
-- *TODO*
--
--`.3byte EXPRESSIONS'
-- *TODO*
--
--`.4byte EXPRESSIONS'
-- *TODO*
--
--`.extAuxRegister NAME,ADDRESS,MODE'
-- The ARCtangent A4 has extensible auxiliary register space. The
-- auxiliary registers can be defined in the assembler source code by
-- using this directive. The first parameter is the NAME of the new
-- auxiallry register. The second parameter is the ADDRESS of the
-- register in the auxiliary register memory map for the variant of
-- the ARC. The third parameter specifies the MODE in which the
-- register can be operated is and it can be one of:
--
-- `r (readonly)'
--
-- `w (write only)'
--
-- `r|w (read or write)'
--
-- For example:
--
-- .extAuxRegister mulhi,0x12,w
--
-- This specifies an extension auxiliary register called _mulhi_
-- which is at address 0x12 in the memory space and which is only
-- writable.
--
--`.extCondCode SUFFIX,VALUE'
-- The condition codes on the ARCtangent A4 are extensible and can be
-- specified by means of this assembler directive. They are specified
-- by the suffix and the value for the condition code. They can be
-- used to specify extra condition codes with any values. For
-- example:
--
-- .extCondCode is_busy,0x14
--
-- add.is_busy r1,r2,r3
-- bis_busy _main
--
--`.extCoreRegister NAME,REGNUM,MODE,SHORTCUT'
-- Specifies an extension core register NAME for the application.
-- This allows a register NAME with a valid REGNUM between 0 and 60,
-- with the following as valid values for MODE
--
-- `_r_ (readonly)'
--
-- `_w_ (write only)'
--
-- `_r|w_ (read or write)'
--
-- The other parameter gives a description of the register having a
-- SHORTCUT in the pipeline. The valid values are:
--
-- `can_shortcut'
--
-- `cannot_shortcut'
--
-- For example:
--
-- .extCoreRegister mlo,57,r,can_shortcut
--
-- This defines an extension core register mlo with the value 57 which
-- can shortcut the pipeline.
--
--`.extInstruction NAME,OPCODE,SUBOPCODE,SUFFIXCLASS,SYNTAXCLASS'
-- The ARCtangent A4 allows the user to specify extension
-- instructions. The extension instructions are not macros. The
-- assembler creates encodings for use of these instructions
-- according to the specification by the user. The parameters are:
--
-- * NAME Name of the extension instruction
--
-- * OPCODE Opcode to be used. (Bits 27:31 in the encoding).
-- Valid values 0x10-0x1f or 0x03
--
-- * SUBOPCODE Subopcode to be used. Valid values are from
-- 0x09-0x3f. However the correct value also depends on
-- SYNTAXCLASS
--
-- * SUFFIXCLASS Determines the kinds of suffixes to be allowed.
-- Valid values are `SUFFIX_NONE', `SUFFIX_COND', `SUFFIX_FLAG'
-- which indicates the absence or presence of conditional
-- suffixes and flag setting by the extension instruction. It
-- is also possible to specify that an instruction sets the
-- flags and is conditional by using `SUFFIX_CODE' |
-- `SUFFIX_FLAG'.
--
-- * SYNTAXCLASS Determines the syntax class for the instruction.
-- It can have the following values:
--
-- ``SYNTAX_2OP':'
-- 2 Operand Instruction
--
-- ``SYNTAX_3OP':'
-- 3 Operand Instruction
--
-- In addition there could be modifiers for the syntax class as
-- described below:
--
-- Syntax Class Modifiers are:
--
-- - `OP1_MUST_BE_IMM': Modifies syntax class SYNTAX_3OP,
-- specifying that the first operand of a three-operand
-- instruction must be an immediate (i.e., the result is
-- discarded). OP1_MUST_BE_IMM is used by bitwise ORing it
-- with SYNTAX_3OP as given in the example below. This
-- could usually be used to set the flags using specific
-- instructions and not retain results.
--
-- - `OP1_IMM_IMPLIED': Modifies syntax class SYNTAX_20P, it
-- specifies that there is an implied immediate destination
-- operand which does not appear in the syntax. For
-- example, if the source code contains an instruction like:
--
-- inst r1,r2
--
-- it really means that the first argument is an implied
-- immediate (that is, the result is discarded). This is
-- the same as though the source code were: inst 0,r1,r2.
-- You use OP1_IMM_IMPLIED by bitwise ORing it with
-- SYNTAX_20P.
--
--
-- For example, defining 64-bit multiplier with immediate operands:
--
-- .extInstruction mp64,0x14,0x0,SUFFIX_COND | SUFFIX_FLAG ,
-- SYNTAX_3OP|OP1_MUST_BE_IMM
--
-- The above specifies an extension instruction called mp64 which has
-- 3 operands, sets the flags, can be used with a condition code, for
-- which the first operand is an immediate. (Equivalent to
-- discarding the result of the operation).
--
-- .extInstruction mul64,0x14,0x00,SUFFIX_COND, SYNTAX_2OP|OP1_IMM_IMPLIED
--
-- This describes a 2 operand instruction with an implicit first
-- immediate operand. The result of this operation would be
-- discarded.
--
--`.half EXPRESSIONS'
-- *TODO*
--
--`.long EXPRESSIONS'
-- *TODO*
--
--`.option ARC|ARC5|ARC6|ARC7|ARC8'
-- The `.option' directive must be followed by the desired core
-- version. Again `arc' is an alias for `arc6'.
--
-- Note: the `.option' directive overrides the command line option
-- `-marc'; a warning is emitted when the version is not consistent
-- between the two - even for the implicit default core version
-- (arc6).
--
--`.short EXPRESSIONS'
-- *TODO*
--
--`.word EXPRESSIONS'
-- *TODO*
--
--
--
--File: as.info, Node: ARC Opcodes, Prev: ARC Directives, Up: ARC-Dependent
--
--9.3.5 Opcodes
---------------
--
--For information on the ARC instruction set, see `ARC Programmers
--Reference Manual', ARC International (www.arc.com)
--
--
--File: as.info, Node: ARM-Dependent, Next: AVR-Dependent, Prev: ARC-Dependent, Up: Machine Dependencies
--
--9.4 ARM Dependent Features
--==========================
--
--* Menu:
--
--* ARM Options:: Options
--* ARM Syntax:: Syntax
--* ARM Floating Point:: Floating Point
--* ARM Directives:: ARM Machine Directives
--* ARM Opcodes:: Opcodes
--* ARM Mapping Symbols:: Mapping Symbols
--* ARM Unwinding Tutorial:: Unwinding
--
--
--File: as.info, Node: ARM Options, Next: ARM Syntax, Up: ARM-Dependent
--
--9.4.1 Options
---------------
--
--`-mcpu=PROCESSOR[+EXTENSION...]'
-- This option specifies the target processor. The assembler will
-- issue an error message if an attempt is made to assemble an
-- instruction which will not execute on the target processor. The
-- following processor names are recognized: `arm1', `arm2', `arm250',
-- `arm3', `arm6', `arm60', `arm600', `arm610', `arm620', `arm7',
-- `arm7m', `arm7d', `arm7dm', `arm7di', `arm7dmi', `arm70', `arm700',
-- `arm700i', `arm710', `arm710t', `arm720', `arm720t', `arm740t',
-- `arm710c', `arm7100', `arm7500', `arm7500fe', `arm7t', `arm7tdmi',
-- `arm7tdmi-s', `arm8', `arm810', `strongarm', `strongarm1',
-- `strongarm110', `strongarm1100', `strongarm1110', `arm9', `arm920',
-- `arm920t', `arm922t', `arm940t', `arm9tdmi', `fa526' (Faraday
-- FA526 processor), `fa626' (Faraday FA626 processor), `arm9e',
-- `arm926e', `arm926ej-s', `arm946e-r0', `arm946e', `arm946e-s',
-- `arm966e-r0', `arm966e', `arm966e-s', `arm968e-s', `arm10t',
-- `arm10tdmi', `arm10e', `arm1020', `arm1020t', `arm1020e',
-- `arm1022e', `arm1026ej-s', `fa606te' (Faraday FA606TE processor),
-- `fa616te' (Faraday FA616TE processor), `fa626te' (Faraday FA626TE
-- processor), `fmp626' (Faraday FMP626 processor), `fa726te'
-- (Faraday FA726TE processor), `arm1136j-s', `arm1136jf-s',
-- `arm1156t2-s', `arm1156t2f-s', `arm1176jz-s', `arm1176jzf-s',
-- `mpcore', `mpcorenovfp', `cortex-a5', `cortex-a7', `cortex-a8',
-- `cortex-a9', `cortex-a15', `cortex-r4', `cortex-r4f', `cortex-r5',
-- `cortex-r7', `cortex-m4', `cortex-m3', `cortex-m1', `cortex-m0',
-- `cortex-m0plus', `ep9312' (ARM920 with Cirrus Maverick
-- coprocessor), `i80200' (Intel XScale processor) `iwmmxt' (Intel(r)
-- XScale processor with Wireless MMX(tm) technology coprocessor) and
-- `xscale'. The special name `all' may be used to allow the
-- assembler to accept instructions valid for any ARM processor.
--
-- In addition to the basic instruction set, the assembler can be
-- told to accept various extension mnemonics that extend the
-- processor using the co-processor instruction space. For example,
-- `-mcpu=arm920+maverick' is equivalent to specifying `-mcpu=ep9312'.
--
-- Multiple extensions may be specified, separated by a `+'. The
-- extensions should be specified in ascending alphabetical order.
--
-- Some extensions may be restricted to particular architectures;
-- this is documented in the list of extensions below.
--
-- Extension mnemonics may also be removed from those the assembler
-- accepts. This is done be prepending `no' to the option that adds
-- the extension. Extensions that are removed should be listed after
-- all extensions which have been added, again in ascending
-- alphabetical order. For example, `-mcpu=ep9312+nomaverick' is
-- equivalent to specifying `-mcpu=arm920'.
--
-- The following extensions are currently supported: `crypto'
-- (Cryptography Extensions for v8-A architecture, implies `fp+simd'),
-- `fp' (Floating Point Extensions for v8-A architecture), `idiv'
-- (Integer Divide Extensions for v7-A and v7-R architectures),
-- `iwmmxt', `iwmmxt2', `maverick', `mp' (Multiprocessing Extensions
-- for v7-A and v7-R architectures), `os' (Operating System for v6M
-- architecture), `sec' (Security Extensions for v6K and v7-A
-- architectures), `simd' (Advanced SIMD Extensions for v8-A
-- architecture, implies `fp'), `virt' (Virtualization Extensions for
-- v7-A architecture, implies `idiv'), and `xscale'.
--
--`-march=ARCHITECTURE[+EXTENSION...]'
-- This option specifies the target architecture. The assembler will
-- issue an error message if an attempt is made to assemble an
-- instruction which will not execute on the target architecture.
-- The following architecture names are recognized: `armv1', `armv2',
-- `armv2a', `armv2s', `armv3', `armv3m', `armv4', `armv4xm',
-- `armv4t', `armv4txm', `armv5', `armv5t', `armv5txm', `armv5te',
-- `armv5texp', `armv6', `armv6j', `armv6k', `armv6z', `armv6zk',
-- `armv6-m', `armv6s-m', `armv7', `armv7-a', `armv7ve', `armv7-r',
-- `armv7-m', `armv7e-m', `armv8-a', `iwmmxt' and `xscale'. If both
-- `-mcpu' and `-march' are specified, the assembler will use the
-- setting for `-mcpu'.
--
-- The architecture option can be extended with the same instruction
-- set extension options as the `-mcpu' option.
--
--`-mfpu=FLOATING-POINT-FORMAT'
-- This option specifies the floating point format to assemble for.
-- The assembler will issue an error message if an attempt is made to
-- assemble an instruction which will not execute on the target
-- floating point unit. The following format options are recognized:
-- `softfpa', `fpe', `fpe2', `fpe3', `fpa', `fpa10', `fpa11',
-- `arm7500fe', `softvfp', `softvfp+vfp', `vfp', `vfp10', `vfp10-r0',
-- `vfp9', `vfpxd', `vfpv2', `vfpv3', `vfpv3-fp16', `vfpv3-d16',
-- `vfpv3-d16-fp16', `vfpv3xd', `vfpv3xd-d16', `vfpv4', `vfpv4-d16',
-- `fpv4-sp-d16', `fp-armv8', `arm1020t', `arm1020e', `arm1136jf-s',
-- `maverick', `neon', `neon-vfpv4', `neon-fp-armv8', and
-- `crypto-neon-fp-armv8'.
--
-- In addition to determining which instructions are assembled, this
-- option also affects the way in which the `.double' assembler
-- directive behaves when assembling little-endian code.
--
-- The default is dependent on the processor selected. For
-- Architecture 5 or later, the default is to assembler for VFP
-- instructions; for earlier architectures the default is to assemble
-- for FPA instructions.
--
--`-mthumb'
-- This option specifies that the assembler should start assembling
-- Thumb instructions; that is, it should behave as though the file
-- starts with a `.code 16' directive.
--
--`-mthumb-interwork'
-- This option specifies that the output generated by the assembler
-- should be marked as supporting interworking.
--
--`-mimplicit-it=never'
--`-mimplicit-it=always'
--`-mimplicit-it=arm'
--`-mimplicit-it=thumb'
-- The `-mimplicit-it' option controls the behavior of the assembler
-- when conditional instructions are not enclosed in IT blocks.
-- There are four possible behaviors. If `never' is specified, such
-- constructs cause a warning in ARM code and an error in Thumb-2
-- code. If `always' is specified, such constructs are accepted in
-- both ARM and Thumb-2 code, where the IT instruction is added
-- implicitly. If `arm' is specified, such constructs are accepted
-- in ARM code and cause an error in Thumb-2 code. If `thumb' is
-- specified, such constructs cause a warning in ARM code and are
-- accepted in Thumb-2 code. If you omit this option, the behavior
-- is equivalent to `-mimplicit-it=arm'.
--
--`-mapcs-26'
--`-mapcs-32'
-- These options specify that the output generated by the assembler
-- should be marked as supporting the indicated version of the Arm
-- Procedure. Calling Standard.
--
--`-matpcs'
-- This option specifies that the output generated by the assembler
-- should be marked as supporting the Arm/Thumb Procedure Calling
-- Standard. If enabled this option will cause the assembler to
-- create an empty debugging section in the object file called
-- .arm.atpcs. Debuggers can use this to determine the ABI being
-- used by.
--
--`-mapcs-float'
-- This indicates the floating point variant of the APCS should be
-- used. In this variant floating point arguments are passed in FP
-- registers rather than integer registers.
--
--`-mapcs-reentrant'
-- This indicates that the reentrant variant of the APCS should be
-- used. This variant supports position independent code.
--
--`-mfloat-abi=ABI'
-- This option specifies that the output generated by the assembler
-- should be marked as using specified floating point ABI. The
-- following values are recognized: `soft', `softfp' and `hard'.
--
--`-meabi=VER'
-- This option specifies which EABI version the produced object files
-- should conform to. The following values are recognized: `gnu', `4'
-- and `5'.
--
--`-EB'
-- This option specifies that the output generated by the assembler
-- should be marked as being encoded for a big-endian processor.
--
--`-EL'
-- This option specifies that the output generated by the assembler
-- should be marked as being encoded for a little-endian processor.
--
--`-k'
-- This option specifies that the output of the assembler should be
-- marked as position-independent code (PIC).
--
--`--fix-v4bx'
-- Allow `BX' instructions in ARMv4 code. This is intended for use
-- with the linker option of the same name.
--
--`-mwarn-deprecated'
--`-mno-warn-deprecated'
-- Enable or disable warnings about using deprecated options or
-- features. The default is to warn.
--
--
--
--File: as.info, Node: ARM Syntax, Next: ARM Floating Point, Prev: ARM Options, Up: ARM-Dependent
--
--9.4.2 Syntax
--------------
--
--* Menu:
--
--* ARM-Instruction-Set:: Instruction Set
--* ARM-Chars:: Special Characters
--* ARM-Regs:: Register Names
--* ARM-Relocations:: Relocations
--* ARM-Neon-Alignment:: NEON Alignment Specifiers
--
--
--File: as.info, Node: ARM-Instruction-Set, Next: ARM-Chars, Up: ARM Syntax
--
--9.4.2.1 Instruction Set Syntax
--..............................
--
--Two slightly different syntaxes are support for ARM and THUMB
--instructions. The default, `divided', uses the old style where ARM and
--THUMB instructions had their own, separate syntaxes. The new,
--`unified' syntax, which can be selected via the `.syntax' directive,
--and has the following main features:
--
-- * Immediate operands do not require a `#' prefix.
--
-- * The `IT' instruction may appear, and if it does it is validated
-- against subsequent conditional affixes. In ARM mode it does not
-- generate machine code, in THUMB mode it does.
--
-- * For ARM instructions the conditional affixes always appear at the
-- end of the instruction. For THUMB instructions conditional
-- affixes can be used, but only inside the scope of an `IT'
-- instruction.
--
-- * All of the instructions new to the V6T2 architecture (and later)
-- are available. (Only a few such instructions can be written in the
-- `divided' syntax).
--
-- * The `.N' and `.W' suffixes are recognized and honored.
--
-- * All instructions set the flags if and only if they have an `s'
-- affix.
--
--
--File: as.info, Node: ARM-Chars, Next: ARM-Regs, Prev: ARM-Instruction-Set, Up: ARM Syntax
--
--9.4.2.2 Special Characters
--..........................
--
--The presence of a `@' anywhere on a line indicates the start of a
--comment that extends to the end of that line.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line could also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- The `;' character can be used instead of a newline to separate
--statements.
--
-- Either `#' or `$' can be used to indicate immediate operands.
--
-- *TODO* Explain about /data modifier on symbols.
--
--
--File: as.info, Node: ARM-Regs, Next: ARM-Relocations, Prev: ARM-Chars, Up: ARM Syntax
--
--9.4.2.3 Register Names
--......................
--
--*TODO* Explain about ARM register naming, and the predefined names.
--
--
--File: as.info, Node: ARM-Relocations, Next: ARM-Neon-Alignment, Prev: ARM-Regs, Up: ARM Syntax
--
--9.4.2.4 ARM relocation generation
--.................................
--
--Specific data relocations can be generated by putting the relocation
--name in parentheses after the symbol name. For example:
--
-- .word foo(TARGET1)
--
-- This will generate an `R_ARM_TARGET1' relocation against the symbol
--FOO. The following relocations are supported: `GOT', `GOTOFF',
--`TARGET1', `TARGET2', `SBREL', `TLSGD', `TLSLDM', `TLSLDO', `TLSDESC',
--`TLSCALL', `GOTTPOFF', `GOT_PREL' and `TPOFF'.
--
-- For compatibility with older toolchains the assembler also accepts
--`(PLT)' after branch targets. On legacy targets this will generate the
--deprecated `R_ARM_PLT32' relocation. On EABI targets it will encode
--either the `R_ARM_CALL' or `R_ARM_JUMP24' relocation, as appropriate.
--
-- Relocations for `MOVW' and `MOVT' instructions can be generated by
--prefixing the value with `#:lower16:' and `#:upper16' respectively.
--For example to load the 32-bit address of foo into r0:
--
-- MOVW r0, #:lower16:foo
-- MOVT r0, #:upper16:foo
--
--
--File: as.info, Node: ARM-Neon-Alignment, Prev: ARM-Relocations, Up: ARM Syntax
--
--9.4.2.5 NEON Alignment Specifiers
--.................................
--
--Some NEON load/store instructions allow an optional address alignment
--qualifier. The ARM documentation specifies that this is indicated by
--`@ ALIGN'. However GAS already interprets the `@' character as a "line
--comment" start, so `: ALIGN' is used instead. For example:
--
-- vld1.8 {q0}, [r0, :128]
--
--
--File: as.info, Node: ARM Floating Point, Next: ARM Directives, Prev: ARM Syntax, Up: ARM-Dependent
--
--9.4.3 Floating Point
----------------------
--
--The ARM family uses IEEE floating-point numbers.
--
--
--File: as.info, Node: ARM Directives, Next: ARM Opcodes, Prev: ARM Floating Point, Up: ARM-Dependent
--
--9.4.4 ARM Machine Directives
------------------------------
--
--`.2byte EXPRESSION [, EXPRESSION]*'
--`.4byte EXPRESSION [, EXPRESSION]*'
--`.8byte EXPRESSION [, EXPRESSION]*'
-- These directives write 2, 4 or 8 byte values to the output section.
--
--`.align EXPRESSION [, EXPRESSION]'
-- This is the generic .ALIGN directive. For the ARM however if the
-- first argument is zero (ie no alignment is needed) the assembler
-- will behave as if the argument had been 2 (ie pad to the next four
-- byte boundary). This is for compatibility with ARM's own
-- assembler.
--
--`.arch NAME'
-- Select the target architecture. Valid values for NAME are the
-- same as for the `-march' commandline option.
--
-- Specifying `.arch' clears any previously selected architecture
-- extensions.
--
--`.arch_extension NAME'
-- Add or remove an architecture extension to the target
-- architecture. Valid values for NAME are the same as those
-- accepted as architectural extensions by the `-mcpu' commandline
-- option.
--
-- `.arch_extension' may be used multiple times to add or remove
-- extensions incrementally to the architecture being compiled for.
--
--`.arm'
-- This performs the same action as .CODE 32.
--
--`.pad #COUNT'
-- Generate unwinder annotations for a stack adjustment of COUNT
-- bytes. A positive value indicates the function prologue allocated
-- stack space by decrementing the stack pointer.
--
--`.bss'
-- This directive switches to the `.bss' section.
--
--`.cantunwind'
-- Prevents unwinding through the current function. No personality
-- routine or exception table data is required or permitted.
--
--`.code `[16|32]''
-- This directive selects the instruction set being generated. The
-- value 16 selects Thumb, with the value 32 selecting ARM.
--
--`.cpu NAME'
-- Select the target processor. Valid values for NAME are the same as
-- for the `-mcpu' commandline option.
--
-- Specifying `.cpu' clears any previously selected architecture
-- extensions.
--
--`NAME .dn REGISTER NAME [.TYPE] [[INDEX]]'
--`NAME .qn REGISTER NAME [.TYPE] [[INDEX]]'
-- The `dn' and `qn' directives are used to create typed and/or
-- indexed register aliases for use in Advanced SIMD Extension (Neon)
-- instructions. The former should be used to create aliases of
-- double-precision registers, and the latter to create aliases of
-- quad-precision registers.
--
-- If these directives are used to create typed aliases, those
-- aliases can be used in Neon instructions instead of writing types
-- after the mnemonic or after each operand. For example:
--
-- x .dn d2.f32
-- y .dn d3.f32
-- z .dn d4.f32[1]
-- vmul x,y,z
--
-- This is equivalent to writing the following:
--
-- vmul.f32 d2,d3,d4[1]
--
-- Aliases created using `dn' or `qn' can be destroyed using `unreq'.
--
--`.eabi_attribute TAG, VALUE'
-- Set the EABI object attribute TAG to VALUE.
--
-- The TAG is either an attribute number, or one of the following:
-- `Tag_CPU_raw_name', `Tag_CPU_name', `Tag_CPU_arch',
-- `Tag_CPU_arch_profile', `Tag_ARM_ISA_use', `Tag_THUMB_ISA_use',
-- `Tag_FP_arch', `Tag_WMMX_arch', `Tag_Advanced_SIMD_arch',
-- `Tag_PCS_config', `Tag_ABI_PCS_R9_use', `Tag_ABI_PCS_RW_data',
-- `Tag_ABI_PCS_RO_data', `Tag_ABI_PCS_GOT_use',
-- `Tag_ABI_PCS_wchar_t', `Tag_ABI_FP_rounding',
-- `Tag_ABI_FP_denormal', `Tag_ABI_FP_exceptions',
-- `Tag_ABI_FP_user_exceptions', `Tag_ABI_FP_number_model',
-- `Tag_ABI_align_needed', `Tag_ABI_align_preserved',
-- `Tag_ABI_enum_size', `Tag_ABI_HardFP_use', `Tag_ABI_VFP_args',
-- `Tag_ABI_WMMX_args', `Tag_ABI_optimization_goals',
-- `Tag_ABI_FP_optimization_goals', `Tag_compatibility',
-- `Tag_CPU_unaligned_access', `Tag_FP_HP_extension',
-- `Tag_ABI_FP_16bit_format', `Tag_MPextension_use', `Tag_DIV_use',
-- `Tag_nodefaults', `Tag_also_compatible_with', `Tag_conformance',
-- `Tag_T2EE_use', `Tag_Virtualization_use'
--
-- The VALUE is either a `number', `"string"', or `number, "string"'
-- depending on the tag.
--
-- Note - the following legacy values are also accepted by TAG:
-- `Tag_VFP_arch', `Tag_ABI_align8_needed',
-- `Tag_ABI_align8_preserved', `Tag_VFP_HP_extension',
--
--`.even'
-- This directive aligns to an even-numbered address.
--
--`.extend EXPRESSION [, EXPRESSION]*'
--`.ldouble EXPRESSION [, EXPRESSION]*'
-- These directives write 12byte long double floating-point values to
-- the output section. These are not compatible with current ARM
-- processors or ABIs.
--
--`.fnend'
-- Marks the end of a function with an unwind table entry. The
-- unwind index table entry is created when this directive is
-- processed.
--
-- If no personality routine has been specified then standard
-- personality routine 0 or 1 will be used, depending on the number
-- of unwind opcodes required.
--
--`.fnstart'
-- Marks the start of a function with an unwind table entry.
--
--`.force_thumb'
-- This directive forces the selection of Thumb instructions, even if
-- the target processor does not support those instructions
--
--`.fpu NAME'
-- Select the floating-point unit to assemble for. Valid values for
-- NAME are the same as for the `-mfpu' commandline option.
--
--`.handlerdata'
-- Marks the end of the current function, and the start of the
-- exception table entry for that function. Anything between this
-- directive and the `.fnend' directive will be added to the
-- exception table entry.
--
-- Must be preceded by a `.personality' or `.personalityindex'
-- directive.
--
--`.inst OPCODE [ , ... ]'
--`.inst.n OPCODE [ , ... ]'
--`.inst.w OPCODE [ , ... ]'
-- Generates the instruction corresponding to the numerical value
-- OPCODE. `.inst.n' and `.inst.w' allow the Thumb instruction size
-- to be specified explicitly, overriding the normal encoding rules.
--
--`.ldouble EXPRESSION [, EXPRESSION]*'
-- See `.extend'.
--
--`.ltorg'
-- This directive causes the current contents of the literal pool to
-- be dumped into the current section (which is assumed to be the
-- .text section) at the current location (aligned to a word
-- boundary). `GAS' maintains a separate literal pool for each
-- section and each sub-section. The `.ltorg' directive will only
-- affect the literal pool of the current section and sub-section.
-- At the end of assembly all remaining, un-empty literal pools will
-- automatically be dumped.
--
-- Note - older versions of `GAS' would dump the current literal pool
-- any time a section change occurred. This is no longer done, since
-- it prevents accurate control of the placement of literal pools.
--
--`.movsp REG [, #OFFSET]'
-- Tell the unwinder that REG contains an offset from the current
-- stack pointer. If OFFSET is not specified then it is assumed to be
-- zero.
--
--`.object_arch NAME'
-- Override the architecture recorded in the EABI object attribute
-- section. Valid values for NAME are the same as for the `.arch'
-- directive. Typically this is useful when code uses runtime
-- detection of CPU features.
--
--`.packed EXPRESSION [, EXPRESSION]*'
-- This directive writes 12-byte packed floating-point values to the
-- output section. These are not compatible with current ARM
-- processors or ABIs.
--
--`.pad #COUNT'
-- Generate unwinder annotations for a stack adjustment of COUNT
-- bytes. A positive value indicates the function prologue allocated
-- stack space by decrementing the stack pointer.
--
--`.personality NAME'
-- Sets the personality routine for the current function to NAME.
--
--`.personalityindex INDEX'
-- Sets the personality routine for the current function to the EABI
-- standard routine number INDEX
--
--`.pool'
-- This is a synonym for .ltorg.
--
--`NAME .req REGISTER NAME'
-- This creates an alias for REGISTER NAME called NAME. For example:
--
-- foo .req r0
--
--`.save REGLIST'
-- Generate unwinder annotations to restore the registers in REGLIST.
-- The format of REGLIST is the same as the corresponding
-- store-multiple instruction.
--
-- _core registers_
-- .save {r4, r5, r6, lr}
-- stmfd sp!, {r4, r5, r6, lr}
-- _FPA registers_
-- .save f4, 2
-- sfmfd f4, 2, [sp]!
-- _VFP registers_
-- .save {d8, d9, d10}
-- fstmdx sp!, {d8, d9, d10}
-- _iWMMXt registers_
-- .save {wr10, wr11}
-- wstrd wr11, [sp, #-8]!
-- wstrd wr10, [sp, #-8]!
-- or
-- .save wr11
-- wstrd wr11, [sp, #-8]!
-- .save wr10
-- wstrd wr10, [sp, #-8]!
--
--`.setfp FPREG, SPREG [, #OFFSET]'
-- Make all unwinder annotations relative to a frame pointer.
-- Without this the unwinder will use offsets from the stack pointer.
--
-- The syntax of this directive is the same as the `add' or `mov'
-- instruction used to set the frame pointer. SPREG must be either
-- `sp' or mentioned in a previous `.movsp' directive.
--
-- .movsp ip
-- mov ip, sp
-- ...
-- .setfp fp, ip, #4
-- add fp, ip, #4
--
--`.secrel32 EXPRESSION [, EXPRESSION]*'
-- This directive emits relocations that evaluate to the
-- section-relative offset of each expression's symbol. This
-- directive is only supported for PE targets.
--
--`.syntax [`unified' | `divided']'
-- This directive sets the Instruction Set Syntax as described in the
-- *Note ARM-Instruction-Set:: section.
--
--`.thumb'
-- This performs the same action as .CODE 16.
--
--`.thumb_func'
-- This directive specifies that the following symbol is the name of a
-- Thumb encoded function. This information is necessary in order to
-- allow the assembler and linker to generate correct code for
-- interworking between Arm and Thumb instructions and should be used
-- even if interworking is not going to be performed. The presence
-- of this directive also implies `.thumb'
--
-- This directive is not neccessary when generating EABI objects. On
-- these targets the encoding is implicit when generating Thumb code.
--
--`.thumb_set'
-- This performs the equivalent of a `.set' directive in that it
-- creates a symbol which is an alias for another symbol (possibly
-- not yet defined). This directive also has the added property in
-- that it marks the aliased symbol as being a thumb function entry
-- point, in the same way that the `.thumb_func' directive does.
--
--`.tlsdescseq TLS-VARIABLE'
-- This directive is used to annotate parts of an inlined TLS
-- descriptor trampoline. Normally the trampoline is provided by the
-- linker, and this directive is not needed.
--
--`.unreq ALIAS-NAME'
-- This undefines a register alias which was previously defined using
-- the `req', `dn' or `qn' directives. For example:
--
-- foo .req r0
-- .unreq foo
--
-- An error occurs if the name is undefined. Note - this pseudo op
-- can be used to delete builtin in register name aliases (eg 'r0').
-- This should only be done if it is really necessary.
--
--`.unwind_raw OFFSET, BYTE1, ...'
-- Insert one of more arbitary unwind opcode bytes, which are known
-- to adjust the stack pointer by OFFSET bytes.
--
-- For example `.unwind_raw 4, 0xb1, 0x01' is equivalent to `.save
-- {r0}'
--
--`.vsave VFP-REGLIST'
-- Generate unwinder annotations to restore the VFP registers in
-- VFP-REGLIST using FLDMD. Also works for VFPv3 registers that are
-- to be restored using VLDM. The format of VFP-REGLIST is the same
-- as the corresponding store-multiple instruction.
--
-- _VFP registers_
-- .vsave {d8, d9, d10}
-- fstmdd sp!, {d8, d9, d10}
-- _VFPv3 registers_
-- .vsave {d15, d16, d17}
-- vstm sp!, {d15, d16, d17}
--
-- Since FLDMX and FSTMX are now deprecated, this directive should be
-- used in favour of `.save' for saving VFP registers for ARMv6 and
-- above.
--
--
--
--File: as.info, Node: ARM Opcodes, Next: ARM Mapping Symbols, Prev: ARM Directives, Up: ARM-Dependent
--
--9.4.5 Opcodes
---------------
--
--`as' implements all the standard ARM opcodes. It also implements
--several pseudo opcodes, including several synthetic load instructions.
--
--`NOP'
-- nop
--
-- This pseudo op will always evaluate to a legal ARM instruction
-- that does nothing. Currently it will evaluate to MOV r0, r0.
--
--`LDR'
-- ldr <register> , = <expression>
--
-- If expression evaluates to a numeric constant then a MOV or MVN
-- instruction will be used in place of the LDR instruction, if the
-- constant can be generated by either of these instructions.
-- Otherwise the constant will be placed into the nearest literal
-- pool (if it not already there) and a PC relative LDR instruction
-- will be generated.
--
--`ADR'
-- adr <register> <label>
--
-- This instruction will load the address of LABEL into the indicated
-- register. The instruction will evaluate to a PC relative ADD or
-- SUB instruction depending upon where the label is located. If the
-- label is out of range, or if it is not defined in the same file
-- (and section) as the ADR instruction, then an error will be
-- generated. This instruction will not make use of the literal pool.
--
--`ADRL'
-- adrl <register> <label>
--
-- This instruction will load the address of LABEL into the indicated
-- register. The instruction will evaluate to one or two PC relative
-- ADD or SUB instructions depending upon where the label is located.
-- If a second instruction is not needed a NOP instruction will be
-- generated in its place, so that this instruction is always 8 bytes
-- long.
--
-- If the label is out of range, or if it is not defined in the same
-- file (and section) as the ADRL instruction, then an error will be
-- generated. This instruction will not make use of the literal pool.
--
--
-- For information on the ARM or Thumb instruction sets, see `ARM
--Software Development Toolkit Reference Manual', Advanced RISC Machines
--Ltd.
--
--
--File: as.info, Node: ARM Mapping Symbols, Next: ARM Unwinding Tutorial, Prev: ARM Opcodes, Up: ARM-Dependent
--
--9.4.6 Mapping Symbols
-----------------------
--
--The ARM ELF specification requires that special symbols be inserted
--into object files to mark certain features:
--
--`$a'
-- At the start of a region of code containing ARM instructions.
--
--`$t'
-- At the start of a region of code containing THUMB instructions.
--
--`$d'
-- At the start of a region of data.
--
--
-- The assembler will automatically insert these symbols for you - there
--is no need to code them yourself. Support for tagging symbols ($b, $f,
--$p and $m) which is also mentioned in the current ARM ELF specification
--is not implemented. This is because they have been dropped from the
--new EABI and so tools cannot rely upon their presence.
--
--
--File: as.info, Node: ARM Unwinding Tutorial, Prev: ARM Mapping Symbols, Up: ARM-Dependent
--
--9.4.7 Unwinding
-----------------
--
--The ABI for the ARM Architecture specifies a standard format for
--exception unwind information. This information is used when an
--exception is thrown to determine where control should be transferred.
--In particular, the unwind information is used to determine which
--function called the function that threw the exception, and which
--function called that one, and so forth. This information is also used
--to restore the values of callee-saved registers in the function
--catching the exception.
--
-- If you are writing functions in assembly code, and those functions
--call other functions that throw exceptions, you must use assembly
--pseudo ops to ensure that appropriate exception unwind information is
--generated. Otherwise, if one of the functions called by your assembly
--code throws an exception, the run-time library will be unable to unwind
--the stack through your assembly code and your program will not behave
--correctly.
--
-- To illustrate the use of these pseudo ops, we will examine the code
--that G++ generates for the following C++ input:
--
--
--void callee (int *);
--
--int
--caller ()
--{
-- int i;
-- callee (&i);
-- return i;
--}
--
-- This example does not show how to throw or catch an exception from
--assembly code. That is a much more complex operation and should always
--be done in a high-level language, such as C++, that directly supports
--exceptions.
--
-- The code generated by one particular version of G++ when compiling
--the example above is:
--
--
--_Z6callerv:
-- .fnstart
--.LFB2:
-- @ Function supports interworking.
-- @ args = 0, pretend = 0, frame = 8
-- @ frame_needed = 1, uses_anonymous_args = 0
-- stmfd sp!, {fp, lr}
-- .save {fp, lr}
--.LCFI0:
-- .setfp fp, sp, #4
-- add fp, sp, #4
--.LCFI1:
-- .pad #8
-- sub sp, sp, #8
--.LCFI2:
-- sub r3, fp, #8
-- mov r0, r3
-- bl _Z6calleePi
-- ldr r3, [fp, #-8]
-- mov r0, r3
-- sub sp, fp, #4
-- ldmfd sp!, {fp, lr}
-- bx lr
--.LFE2:
-- .fnend
--
-- Of course, the sequence of instructions varies based on the options
--you pass to GCC and on the version of GCC in use. The exact
--instructions are not important since we are focusing on the pseudo ops
--that are used to generate unwind information.
--
-- An important assumption made by the unwinder is that the stack frame
--does not change during the body of the function. In particular, since
--we assume that the assembly code does not itself throw an exception,
--the only point where an exception can be thrown is from a call, such as
--the `bl' instruction above. At each call site, the same saved
--registers (including `lr', which indicates the return address) must be
--located in the same locations relative to the frame pointer.
--
-- The `.fnstart' (*note .fnstart pseudo op: arm_fnstart.) pseudo op
--appears immediately before the first instruction of the function while
--the `.fnend' (*note .fnend pseudo op: arm_fnend.) pseudo op appears
--immediately after the last instruction of the function. These pseudo
--ops specify the range of the function.
--
-- Only the order of the other pseudos ops (e.g., `.setfp' or `.pad')
--matters; their exact locations are irrelevant. In the example above,
--the compiler emits the pseudo ops with particular instructions. That
--makes it easier to understand the code, but it is not required for
--correctness. It would work just as well to emit all of the pseudo ops
--other than `.fnend' in the same order, but immediately after `.fnstart'.
--
-- The `.save' (*note .save pseudo op: arm_save.) pseudo op indicates
--registers that have been saved to the stack so that they can be
--restored before the function returns. The argument to the `.save'
--pseudo op is a list of registers to save. If a register is
--"callee-saved" (as specified by the ABI) and is modified by the
--function you are writing, then your code must save the value before it
--is modified and restore the original value before the function returns.
--If an exception is thrown, the run-time library restores the values of
--these registers from their locations on the stack before returning
--control to the exception handler. (Of course, if an exception is not
--thrown, the function that contains the `.save' pseudo op restores these
--registers in the function epilogue, as is done with the `ldmfd'
--instruction above.)
--
-- You do not have to save callee-saved registers at the very beginning
--of the function and you do not need to use the `.save' pseudo op
--immediately following the point at which the registers are saved.
--However, if you modify a callee-saved register, you must save it on the
--stack before modifying it and before calling any functions which might
--throw an exception. And, you must use the `.save' pseudo op to
--indicate that you have done so.
--
-- The `.pad' (*note .pad: arm_pad.) pseudo op indicates a modification
--of the stack pointer that does not save any registers. The argument is
--the number of bytes (in decimal) that are subtracted from the stack
--pointer. (On ARM CPUs, the stack grows downwards, so subtracting from
--the stack pointer increases the size of the stack.)
--
-- The `.setfp' (*note .setfp pseudo op: arm_setfp.) pseudo op
--indicates the register that contains the frame pointer. The first
--argument is the register that is set, which is typically `fp'. The
--second argument indicates the register from which the frame pointer
--takes its value. The third argument, if present, is the value (in
--decimal) added to the register specified by the second argument to
--compute the value of the frame pointer. You should not modify the
--frame pointer in the body of the function.
--
-- If you do not use a frame pointer, then you should not use the
--`.setfp' pseudo op. If you do not use a frame pointer, then you should
--avoid modifying the stack pointer outside of the function prologue.
--Otherwise, the run-time library will be unable to find saved registers
--when it is unwinding the stack.
--
-- The pseudo ops described above are sufficient for writing assembly
--code that calls functions which may throw exceptions. If you need to
--know more about the object-file format used to represent unwind
--information, you may consult the `Exception Handling ABI for the ARM
--Architecture' available from `http://infocenter.arm.com'.
--
--
--File: as.info, Node: AVR-Dependent, Next: Blackfin-Dependent, Prev: ARM-Dependent, Up: Machine Dependencies
--
--9.5 AVR Dependent Features
--==========================
--
--* Menu:
--
--* AVR Options:: Options
--* AVR Syntax:: Syntax
--* AVR Opcodes:: Opcodes
--
--
--File: as.info, Node: AVR Options, Next: AVR Syntax, Up: AVR-Dependent
--
--9.5.1 Options
---------------
--
--`-mmcu=MCU'
-- Specify ATMEL AVR instruction set or MCU type.
--
-- Instruction set avr1 is for the minimal AVR core, not supported by
-- the C compiler, only for assembler programs (MCU types: at90s1200,
-- attiny11, attiny12, attiny15, attiny28).
--
-- Instruction set avr2 (default) is for the classic AVR core with up
-- to 8K program memory space (MCU types: at90s2313, at90s2323,
-- at90s2333, at90s2343, attiny22, attiny26, at90s4414, at90s4433,
-- at90s4434, at90s8515, at90c8534, at90s8535).
--
-- Instruction set avr25 is for the classic AVR core with up to 8K
-- program memory space plus the MOVW instruction (MCU types:
-- attiny13, attiny13a, attiny2313, attiny2313a, attiny24, attiny24a,
-- attiny4313, attiny44, attiny44a, attiny84, attiny84a, attiny25,
-- attiny45, attiny85, attiny261, attiny261a, attiny461, attiny461a,
-- attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88,
-- at86rf401).
--
-- Instruction set avr3 is for the classic AVR core with up to 128K
-- program memory space (MCU types: at43usb355, at76c711).
--
-- Instruction set avr31 is for the classic AVR core with exactly
-- 128K program memory space (MCU types: atmega103, at43usb320).
--
-- Instruction set avr35 is for classic AVR core plus MOVW, CALL, and
-- JMP instructions (MCU types: attiny167, at90usb82, at90usb162,
-- atmega8u2, atmega16u2, atmega32u2).
--
-- Instruction set avr4 is for the enhanced AVR core with up to 8K
-- program memory space (MCU types: atmega48, atmega48a, atmega48p,
-- atmega8, atmega88, atmega88a, atmega88p, atmega88pa, atmega8515,
-- atmega8535, atmega8hva, at90pwm1, at90pwm2, at90pwm2b, at90pwm3,
-- at90pwm3b, at90pwm81, ata6289).
--
-- Instruction set avr5 is for the enhanced AVR core with up to 128K
-- program memory space (MCU types: atmega16, atmega16a, atmega161,
-- atmega162, atmega163, atmega164a, atmega164p, atmega165,
-- atmega165a, atmega165p, atmega168, atmega168a, atmega168p,
-- atmega169, atmega169a, atmega169p, atmega169pa, atmega32,
-- atmega323, atmega324a, atmega324p, atmega325, atmega325a,
-- atmega325p, atmega325pa, atmega3250, atmega3250a, atmega3250p,
-- atmega3250pa, atmega328, atmega328p, atmega329, atmega329a,
-- atmega329p, atmega329pa, atmega3290, atmega3290a, atmega3290p,
-- atmega3290pa, atmega406, atmega64, atmega640, atmega644,
-- atmega644a, atmega644p, atmega644pa, atmega645, atmega645a,
-- atmega645p, atmega6450, atmega6450a, atmega6450p, atmega649,
-- atmega649a, atmega649p, atmega6490, atmega6490a, atmega6490p,
-- atmega64rfr2, atmega644rfr2, atmega16hva, atmega16hva2,
-- atmega16hvb, atmega16hvbrevb, atmega32hvb, atmega32hvbrevb,
-- atmega64hve, at90can32, at90can64, at90pwm161, at90pwm216,
-- at90pwm316, atmega32c1, atmega64c1, atmega16m1, atmega32m1,
-- atmega64m1, atmega16u4, atmega32u4, atmega32u6, at90usb646,
-- at90usb647, at94k, at90scr100).
--
-- Instruction set avr51 is for the enhanced AVR core with exactly
-- 128K program memory space (MCU types: atmega128, atmega1280,
-- atmega1281, atmega1284p, atmega128rfa1, atmega128rfr2,
-- atmega1284rfr2, at90can128, at90usb1286, at90usb1287, m3000).
--
-- Instruction set avr6 is for the enhanced AVR core with a 3-byte PC
-- (MCU types: atmega2560, atmega2561, atmega256rfr2, atmega2564rfr2).
--
-- Instruction set avrxmega2 is for the XMEGA AVR core with 8K to 64K
-- program memory space and less than 64K data space (MCU types:
-- atxmega16a4, atxmega16d4, atxmega16x1, atxmega32a4, atxmega32d4,
-- atxmega32x1).
--
-- Instruction set avrxmega3 is for the XMEGA AVR core with 8K to 64K
-- program memory space and greater than 64K data space (MCU types:
-- none).
--
-- Instruction set avrxmega4 is for the XMEGA AVR core with up to 64K
-- program memory space and less than 64K data space (MCU types:
-- atxmega64a3, atxmega64d3).
--
-- Instruction set avrxmega5 is for the XMEGA AVR core with up to 64K
-- program memory space and greater than 64K data space (MCU types:
-- atxmega64a1, atxmega64a1u).
--
-- Instruction set avrxmega6 is for the XMEGA AVR core with up to
-- 256K program memory space and less than 64K data space (MCU types:
-- atxmega128a3, atxmega128d3, atxmega192a3, atxmega128b1,
-- atxmega192d3, atxmega256a3, atxmega256a3b, atxmega256a3bu,
-- atxmega192d3).
--
-- Instruction set avrxmega7 is for the XMEGA AVR core with up to
-- 256K program memory space and greater than 64K data space (MCU
-- types: atxmega128a1, atxmega128a1u).
--
--`-mall-opcodes'
-- Accept all AVR opcodes, even if not supported by `-mmcu'.
--
--`-mno-skip-bug'
-- This option disable warnings for skipping two-word instructions.
--
--`-mno-wrap'
-- This option reject `rjmp/rcall' instructions with 8K wrap-around.
--
--
--
--File: as.info, Node: AVR Syntax, Next: AVR Opcodes, Prev: AVR Options, Up: AVR-Dependent
--
--9.5.2 Syntax
--------------
--
--* Menu:
--
--* AVR-Chars:: Special Characters
--* AVR-Regs:: Register Names
--* AVR-Modifiers:: Relocatable Expression Modifiers
--
--
--File: as.info, Node: AVR-Chars, Next: AVR-Regs, Up: AVR Syntax
--
--9.5.2.1 Special Characters
--..........................
--
--The presence of a `;' anywhere on a line indicates the start of a
--comment that extends to the end of that line.
--
-- If a `#' appears as the first character of a line, the whole line is
--treated as a comment, but in this case the line can also be a logical
--line number directive (*note Comments::) or a preprocessor control
--command (*note Preprocessing::).
--
-- The `$' character can be used instead of a newline to separate
--statements.
--
--
--File: as.info, Node: AVR-Regs, Next: AVR-Modifiers, Prev: AVR-Chars, Up: AVR Syntax
--
--9.5.2.2 Register Names
--......................
--
--The AVR has 32 x 8-bit general purpose working registers `r0', `r1',
--... `r31'. Six of the 32 registers can be used as three 16-bit
--indirect address register pointers for Data Space addressing. One of
--the these address pointers can also be used as an address pointer for
--look up tables in Flash program memory. These added function registers
--are the 16-bit `X', `Y' and `Z' - registers.
--
-- X = r26:r27
-- Y = r28:r29
-- Z = r30:r31
--
--
--File: as.info, Node: AVR-Modifiers, Prev: AVR-Regs, Up: AVR Syntax
--
--9.5.2.3 Relocatable Expression Modifiers
--........................................
--
--The assembler supports several modifiers when using relocatable
--addresses in AVR instruction operands. The general syntax is the
--following:
--
-- modifier(relocatable-expression)
--
--`lo8'
-- This modifier allows you to use bits 0 through 7 of an address
-- expression as 8 bit relocatable expression.
--
--`hi8'
-- This modifier allows you to use bits 7 through 15 of an address
-- expression as 8 bit relocatable expression. This is useful with,
-- for example, the AVR `ldi' instruction and `lo8' modifier.
--
-- For example
--
-- ldi r26, lo8(sym+10)
-- ldi r27, hi8(sym+10)
--
--`hh8'
-- This modifier allows you to use bits 16 through 23 of an address
-- expression as 8 bit relocatable expression. Also, can be useful
-- for loading 32 bit constants.
--
--`hlo8'
-- Synonym of `hh8'.
--
--`hhi8'
-- This modifier allows you to use bits 24 through 31 of an
-- expression as 8 bit expression. This is useful with, for example,
-- the AVR `ldi' instruction and `lo8', `hi8', `hlo8', `hhi8',
-- modifier.
--
-- For example
--
-- ldi r26, lo8(285774925)
-- ldi r27, hi8(285774925)
-- ldi r28, hlo8(285774925)
-- ldi r29, hhi8(285774925)
-- ; r29,r28,r27,r26 = 285774925
--
--`pm_lo8'
-- This modifier allows you to use bits 0 through 7 of an address
-- expression as 8 bit relocatable expression. This modifier useful
-- for addressing data or code from Flash/Program memory. The using
-- of `pm_lo8' similar to `lo8'.
--
--`pm_hi8'
-- This modifier allows you to use bits 8 through 15 of an address
-- expression as 8 bit relocatable expression. This modifier useful
-- for addressing data or code from Flash/Program memory.
--
--`pm_hh8'
-- This modifier allows you to use bits 15 through 23 of an address
-- expression as 8 bit relocatable expression. This modifier useful
-- for addressing data or code from Flash/Program memory.
--
--
--
--File: as.info, Node: AVR Opcodes, Prev: AVR Syntax, Up: AVR-Dependent
--
--9.5.3 Opcodes
---------------
--
--For detailed information on the AVR machine instruction set, see
--`www.atmel.com/products/AVR'.
--
-- `as' implements all the standard AVR opcodes. The following table
--summarizes the AVR opcodes, and their arguments.
--
-- Legend:
-- r any register
-- d `ldi' register (r16-r31)
-- v `movw' even register (r0, r2, ..., r28, r30)
-- a `fmul' register (r16-r23)
-- w `adiw' register (r24,r26,r28,r30)
-- e pointer registers (X,Y,Z)
-- b base pointer register and displacement ([YZ]+disp)
-- z Z pointer register (for [e]lpm Rd,Z[+])
-- M immediate value from 0 to 255
-- n immediate value from 0 to 255 ( n = ~M ). Relocation impossible
-- s immediate value from 0 to 7
-- P Port address value from 0 to 63. (in, out)
-- p Port address value from 0 to 31. (cbi, sbi, sbic, sbis)
-- K immediate value from 0 to 63 (used in `adiw', `sbiw')
-- i immediate value
-- l signed pc relative offset from -64 to 63
-- L signed pc relative offset from -2048 to 2047
-- h absolute code address (call, jmp)
-- S immediate value from 0 to 7 (S = s << 4)
-- ? use this opcode entry if no parameters, else use next opcode entry
--
-- 1001010010001000 clc
-- 1001010011011000 clh
-- 1001010011111000 cli
-- 1001010010101000 cln
-- 1001010011001000 cls
-- 1001010011101000 clt
-- 1001010010111000 clv
-- 1001010010011000 clz
-- 1001010000001000 sec
-- 1001010001011000 seh
-- 1001010001111000 sei
-- 1001010000101000 sen
-- 1001010001001000 ses
-- 1001010001101000 set
-- 1001010000111000 sev
-- 1001010000011000 sez
-- 100101001SSS1000 bclr S
-- 100101000SSS1000 bset S
-- 1001010100001001 icall
-- 1001010000001001 ijmp
-- 1001010111001000 lpm ?
-- 1001000ddddd010+ lpm r,z
-- 1001010111011000 elpm ?
-- 1001000ddddd011+ elpm r,z
-- 0000000000000000 nop
-- 1001010100001000 ret
-- 1001010100011000 reti
-- 1001010110001000 sleep
-- 1001010110011000 break
-- 1001010110101000 wdr
-- 1001010111101000 spm
-- 000111rdddddrrrr adc r,r
-- 000011rdddddrrrr add r,r
-- 001000rdddddrrrr and r,r
-- 000101rdddddrrrr cp r,r
-- 000001rdddddrrrr cpc r,r
-- 000100rdddddrrrr cpse r,r
-- 001001rdddddrrrr eor r,r
-- 001011rdddddrrrr mov r,r
-- 100111rdddddrrrr mul r,r
-- 001010rdddddrrrr or r,r
-- 000010rdddddrrrr sbc r,r
-- 000110rdddddrrrr sub r,r
-- 001001rdddddrrrr clr r
-- 000011rdddddrrrr lsl r
-- 000111rdddddrrrr rol r
-- 001000rdddddrrrr tst r
-- 0111KKKKddddKKKK andi d,M
-- 0111KKKKddddKKKK cbr d,n
-- 1110KKKKddddKKKK ldi d,M
-- 11101111dddd1111 ser d
-- 0110KKKKddddKKKK ori d,M
-- 0110KKKKddddKKKK sbr d,M
-- 0011KKKKddddKKKK cpi d,M
-- 0100KKKKddddKKKK sbci d,M
-- 0101KKKKddddKKKK subi d,M
-- 1111110rrrrr0sss sbrc r,s
-- 1111111rrrrr0sss sbrs r,s
-- 1111100ddddd0sss bld r,s
-- 1111101ddddd0sss bst r,s
-- 10110PPdddddPPPP in r,P
-- 10111PPrrrrrPPPP out P,r
-- 10010110KKddKKKK adiw w,K
-- 10010111KKddKKKK sbiw w,K
-- 10011000pppppsss cbi p,s
-- 10011010pppppsss sbi p,s
-- 10011001pppppsss sbic p,s
-- 10011011pppppsss sbis p,s
-- 111101lllllll000 brcc l
-- 111100lllllll000 brcs l
-- 111100lllllll001 breq l
-- 111101lllllll100 brge l
-- 111101lllllll101 brhc l
-- 111100lllllll101 brhs l
-- 111101lllllll111 brid l
-- 111100lllllll111 brie l
-- 111100lllllll000 brlo l
-- 111100lllllll100 brlt l
-- 111100lllllll010 brmi l
-- 111101lllllll001 brne l
-- 111101lllllll010 brpl l
-- 111101lllllll000 brsh l
-- 111101lllllll110 brtc l
-- 111100lllllll110 brts l
-- 111101lllllll011 brvc l
-- 111100lllllll011 brvs l
-- 111101lllllllsss brbc s,l
-- 111100lllllllsss brbs s,l
-- 1101LLLLLLLLLLLL rcall L
-- 1100LLLLLLLLLLLL rjmp L
-- 1001010hhhhh111h call h
-- 1001010hhhhh110h jmp h
-- 1001010rrrrr0101 asr r
-- 1001010rrrrr0000 com r
-- 1001010rrrrr1010 dec r
-- 1001010rrrrr0011 inc r
-- 1001010rrrrr0110 lsr r
-- 1001010rrrrr0001 neg r
-- 1001000rrrrr1111 pop r
-- 1001001rrrrr1111 push r
-- 1001010rrrrr0111 ror r
-- 1001010rrrrr0010 swap r
-- 00000001ddddrrrr movw v,v
-- 00000010ddddrrrr muls d,d
-- 000000110ddd0rrr mulsu a,a
-- 000000110ddd1rrr fmul a,a
-- 000000111ddd0rrr fmuls a,a
-- 000000111ddd1rrr fmulsu a,a
-- 1001001ddddd0000 sts i,r
-- 1001000ddddd0000 lds r,i
-- 10o0oo0dddddbooo ldd r,b
-- 100!000dddddee-+ ld r,e
-- 10o0oo1rrrrrbooo std b,r
-- 100!001rrrrree-+ st e,r
-- 1001010100011001 eicall
-- 1001010000011001 eijmp
--
--
--File: as.info, Node: Blackfin-Dependent, Next: CR16-Dependent, Prev: AVR-Dependent, Up: Machine Dependencies
--
--9.6 Blackfin Dependent Features
--===============================
--
--* Menu:
--
--* Blackfin Options:: Blackfin Options
--* Blackfin Syntax:: Blackfin Syntax
--* Blackfin Directives:: Blackfin Directives
--
--
--File: as.info, Node: Blackfin Options, Next: Blackfin Syntax, Up: Blackfin-Dependent
--
--9.6.1 Options
---------------
--
--`-mcpu=PROCESSOR[-SIREVISION]'
-- This option specifies the target processor. The optional
-- SIREVISION is not used in assembler. It's here such that GCC can
-- easily pass down its `-mcpu=' option. The assembler will issue an
-- error message if an attempt is made to assemble an instruction
-- which will not execute on the target processor. The following
-- processor names are recognized: `bf504', `bf506', `bf512', `bf514',
-- `bf516', `bf518', `bf522', `bf523', `bf524', `bf525', `bf526',
-- `bf527', `bf531', `bf532', `bf533', `bf534', `bf535' (not
-- implemented yet), `bf536', `bf537', `bf538', `bf539', `bf542',
-- `bf542m', `bf544', `bf544m', `bf547', `bf547m', `bf548', `bf548m',
-- `bf549', `bf549m', `bf561', and `bf592'.
--
--`-mfdpic'
-- Assemble for the FDPIC ABI.
--
--`-mno-fdpic'
--`-mnopic'
-- Disable -mfdpic.
--
--
--File: as.info, Node: Blackfin Syntax, Next: Blackfin Directives, Prev: Blackfin Options, Up: Blackfin-Dependent
--
--9.6.2 Syntax
--------------
--
--`Special Characters'
-- Assembler input is free format and may appear anywhere on the line.
-- One instruction may extend across multiple lines or more than one
-- instruction may appear on the same line. White space (space, tab,
-- comments or newline) may appear anywhere between tokens. A token
-- must not have embedded spaces. Tokens include numbers, register
-- names, keywords, user identifiers, and also some multicharacter
-- special symbols like "+=", "/*" or "||".
--
-- Comments are introduced by the `#' character and extend to the end
-- of the current line. If the `#' appears as the first character of
-- a line, the whole line is treated as a comment, but in this case
-- the line can also be a logical line number directive (*note
-- Comments::) or a preprocessor control command (*note
-- Preprocessing::).
--
--`Instruction Delimiting'
-- A semicolon must terminate every instruction. Sometimes a complete
-- instruction will consist of more than one operation. There are two
-- cases where this occurs. The first is when two general operations
-- are combined. Normally a comma separates the different parts, as
-- in
--
-- a0= r3.h * r2.l, a1 = r3.l * r2.h ;
--
-- The second case occurs when a general instruction is combined with
-- one or two memory references for joint issue. The latter portions
-- are set off by a "||" token.
--
-- a0 = r3.h * r2.l || r1 = [p3++] || r4 = [i2++];
--
-- Multiple instructions can occur on the same line. Each must be
-- terminated by a semicolon character.
--
--`Register Names'
-- The assembler treats register names and instruction keywords in a
-- case insensitive manner. User identifiers are case sensitive.
-- Thus, R3.l, R3.L, r3.l and r3.L are all equivalent input to the
-- assembler.
--
-- Register names are reserved and may not be used as program
-- identifiers.
--
-- Some operations (such as "Move Register") require a register pair.
-- Register pairs are always data registers and are denoted using a
-- colon, eg., R3:2. The larger number must be written firsts. Note
-- that the hardware only supports odd-even pairs, eg., R7:6, R5:4,
-- R3:2, and R1:0.
--
-- Some instructions (such as -SP (Push Multiple)) require a group of
-- adjacent registers. Adjacent registers are denoted in the syntax
-- by the range enclosed in parentheses and separated by a colon,
-- eg., (R7:3). Again, the larger number appears first.
--
-- Portions of a particular register may be individually specified.
-- This is written with a dot (".") following the register name and
-- then a letter denoting the desired portion. For 32-bit registers,
-- ".H" denotes the most significant ("High") portion. ".L" denotes
-- the least-significant portion. The subdivisions of the 40-bit
-- registers are described later.
--
--`Accumulators'
-- The set of 40-bit registers A1 and A0 that normally contain data
-- that is being manipulated. Each accumulator can be accessed in
-- four ways.
--
-- `one 40-bit register'
-- The register will be referred to as A1 or A0.
--
-- `one 32-bit register'
-- The registers are designated as A1.W or A0.W.
--
-- `two 16-bit registers'
-- The registers are designated as A1.H, A1.L, A0.H or A0.L.
--
-- `one 8-bit register'
-- The registers are designated as A1.X or A0.X for the bits that
-- extend beyond bit 31.
--
--`Data Registers'
-- The set of 32-bit registers (R0, R1, R2, R3, R4, R5, R6 and R7)
-- that normally contain data for manipulation. These are
-- abbreviated as D-register or Dreg. Data registers can be accessed
-- as 32-bit registers or as two independent 16-bit registers. The
-- least significant 16 bits of each register is called the "low"
-- half and is designated with ".L" following the register name. The
-- most significant 16 bits are called the "high" half and is
-- designated with ".H" following the name.
--
-- R7.L, r2.h, r4.L, R0.H
--
--`Pointer Registers'
-- The set of 32-bit registers (P0, P1, P2, P3, P4, P5, SP and FP)
-- that normally contain byte addresses of data structures. These are
-- abbreviated as P-register or Preg.
--
-- p2, p5, fp, sp
--
--`Stack Pointer SP'
-- The stack pointer contains the 32-bit address of the last occupied
-- byte location in the stack. The stack grows by decrementing the
-- stack pointer.
--
--`Frame Pointer FP'
-- The frame pointer contains the 32-bit address of the previous frame
-- pointer in the stack. It is located at the top of a frame.
--
--`Loop Top'
-- LT0 and LT1. These registers contain the 32-bit address of the
-- top of a zero overhead loop.
--
--`Loop Count'
-- LC0 and LC1. These registers contain the 32-bit counter of the
-- zero overhead loop executions.
--
--`Loop Bottom'
-- LB0 and LB1. These registers contain the 32-bit address of the
-- bottom of a zero overhead loop.
--
--`Index Registers'
-- The set of 32-bit registers (I0, I1, I2, I3) that normally contain
-- byte addresses of data structures. Abbreviated I-register or Ireg.
--
--`Modify Registers'
-- The set of 32-bit registers (M0, M1, M2, M3) that normally contain
-- offset values that are added and subtracted to one of the index
-- registers. Abbreviated as Mreg.
--
--`Length Registers'
-- The set of 32-bit registers (L0, L1, L2, L3) that normally contain
-- the length in bytes of the circular buffer. Abbreviated as Lreg.
-- Clear the Lreg to disable circular addressing for the
-- corresponding Ireg.
--
--`Base Registers'
-- The set of 32-bit registers (B0, B1, B2, B3) that normally contain
-- the base address in bytes of the circular buffer. Abbreviated as
-- Breg.
--
--`Floating Point'
-- The Blackfin family has no hardware floating point but the .float
-- directive generates ieee floating point numbers for use with
-- software floating point libraries.
--
--`Blackfin Opcodes'
-- For detailed information on the Blackfin machine instruction set,
-- see the Blackfin(r) Processor Instruction Set Reference.
--
--
--
--File: as.info, Node: Blackfin Directives, Prev: Blackfin Syntax, Up: Blackfin-Dependent
--
--9.6.3 Directives
------------------
--
--The following directives are provided for compatibility with the VDSP
--assembler.
--
--`.byte2'
-- Initializes a two byte data object.
--
-- This maps to the `.short' directive.
--
--`.byte4'
-- Initializes a four byte data object.
--
-- This maps to the `.int' directive.
--
--`.db'
-- Initializes a single byte data object.
--
-- This directive is a synonym for `.byte'.
--
--`.dw'
-- Initializes a two byte data object.
--
-- This directive is a synonym for `.byte2'.
--
--`.dd'
-- Initializes a four byte data object.
--
-- This directive is a synonym for `.byte4'.
--
--`.var'
-- Define and initialize a 32 bit data object.
--
--
--File: as.info, Node: CR16-Dependent, Next: CRIS-Dependent, Prev: Blackfin-Dependent, Up: Machine Dependencies
--
--9.7 CR16 Dependent Features
--===========================
--
--* Menu:
--
--* CR16 Operand Qualifiers:: CR16 Machine Operand Qualifiers
--* CR16 Syntax:: Syntax for the CR16
--
--
--File: as.info, Node: CR16 Operand Qualifiers, Next: CR16 Syntax, Up: CR16-Dependent
--
--9.7.1 CR16 Operand Qualifiers
-------------------------------
--
--The National Semiconductor CR16 target of `as' has a few machine
--dependent operand qualifiers.
--
-- Operand expression type qualifier is an optional field in the
--instruction operand, to determines the type of the expression field of
--an operand. The `@' is required. CR16 architecture uses one of the
--following expression qualifiers:
--
--`s'
-- - `Specifies expression operand type as small'
--
--`m'
-- - `Specifies expression operand type as medium'
--
--`l'
-- - `Specifies expression operand type as large'
--
--`c'
-- - `Specifies the CR16 Assembler generates a relocation entry for
-- the operand, where pc has implied bit, the expression is adjusted
-- accordingly. The linker uses the relocation entry to update the
-- operand address at link time.'
--
--`got/GOT'
-- - `Specifies the CR16 Assembler generates a relocation entry for
-- the operand, offset from Global Offset Table. The linker uses this
-- relocation entry to update the operand address at link time'
--
--`cgot/cGOT'
-- - `Specifies the CompactRISC Assembler generates a relocation
-- entry for the operand, where pc has implied bit, the expression is
-- adjusted accordingly. The linker uses the relocation entry to
-- update the operand address at link time.'
--
-- CR16 target operand qualifiers and its size (in bits):
--
--`Immediate Operand: s'
-- 4 bits.
--
--`Immediate Operand: m'
-- 16 bits, for movb and movw instructions.
--
--`Immediate Operand: m'
-- 20 bits, movd instructions.
--
--`Immediate Operand: l'
-- 32 bits.
--
--`Absolute Operand: s'
-- Illegal specifier for this operand.
--
--`Absolute Operand: m'
-- 20 bits, movd instructions.
--
--`Displacement Operand: s'
-- 8 bits.
--
--`Displacement Operand: m'
-- 16 bits.
--
--`Displacement Operand: l'
-- 24 bits.
--
--
-- For example:
-- 1 `movw $_myfun@c,r1'
--
-- This loads the address of _myfun, shifted right by 1, into r1.
--
-- 2 `movd $_myfun@c,(r2,r1)'
--
-- This loads the address of _myfun, shifted right by 1, into register-pair r2-r1.
--
-- 3 `_myfun_ptr:'
-- `.long _myfun@c'
-- `loadd _myfun_ptr, (r1,r0)'
-- `jal (r1,r0)'
--
-- This .long directive, the address of _myfunc, shifted right by 1 at link time.
--
-- 4 `loadd _data1@GOT(r12), (r1,r0)'
--
-- This loads the address of _data1, into global offset table (ie GOT) and its offset value from GOT loads into register-pair r2-r1.
--
-- 5 `loadd _myfunc@cGOT(r12), (r1,r0)'
--
-- This loads the address of _myfun, shifted right by 1, into global offset table (ie GOT) and its offset value from GOT loads into register-pair r1-r0.
--
--
--File: as.info, Node: CR16 Syntax, Prev: CR16 Operand Qualifiers, Up: CR16-Dependent
--
--9.7.2 CR16 Syntax
-------------------
--
--* Menu:
--
--* CR16-Chars:: Special Characters
--
--
--File: as.info, Node: CR16-Chars, Up: CR16 Syntax
--
--9.7.2.1 Special Characters
--..........................
--
--The presence of a `#' on a line indicates the start of a comment that
--extends to the end of the current line. If the `#' appears as the
--first character of a line, the whole line is treated as a comment, but
--in this case the line can also be a logical line number directive
--(*note Comments::) or a preprocessor control command (*note
--Preprocessing::).
--
-- The `;' character can be used to separate statements on the same
--line.
--
--
--File: as.info, Node: CRIS-Dependent, Next: D10V-Dependent, Prev: CR16-Dependent, Up: Machine Dependencies
--
--9.8 CRIS Dependent Features
--===========================
--
--* Menu:
--
--* CRIS-Opts:: Command-line Options
--* CRIS-Expand:: Instruction expansion
--* CRIS-Symbols:: Symbols
--* CRIS-Syntax:: Syntax
--
--
--File: as.info, Node: CRIS-Opts, Next: CRIS-Expand, Up: CRIS-Dependent
--
--9.8.1 Command-line Options
----------------------------
--
--The CRIS version of `as' has these machine-dependent command-line
--options.
--
-- The format of the generated object files can be either ELF or a.out,
--specified by the command-line options `--emulation=crisaout' and
--`--emulation=criself'. The default is ELF (criself), unless `as' has
--been configured specifically for a.out by using the configuration name
--`cris-axis-aout'.
--
-- There are two different link-incompatible ELF object file variants
--for CRIS, for use in environments where symbols are expected to be
--prefixed by a leading `_' character and for environments without such a
--symbol prefix. The variant used for GNU/Linux port has no symbol
--prefix. Which variant to produce is specified by either of the options
--`--underscore' and `--no-underscore'. The default is `--underscore'.
--Since symbols in CRIS a.out objects are expected to have a `_' prefix,
--specifying `--no-underscore' when generating a.out objects is an error.
--Besides the object format difference, the effect of this option is to
--parse register names differently (*note crisnous::). The
--`--no-underscore' option makes a `$' register prefix mandatory.
--
-- The option `--pic' must be passed to `as' in order to recognize the
--symbol syntax used for ELF (SVR4 PIC) position-independent-code (*note
--crispic::). This will also affect expansion of instructions. The
--expansion with `--pic' will use PC-relative rather than (slightly
--faster) absolute addresses in those expansions. This option is only
--valid when generating ELF format object files.
--
-- The option `--march=ARCHITECTURE' specifies the recognized
--instruction set and recognized register names. It also controls the
--architecture type of the object file. Valid values for ARCHITECTURE
--are:
--`v0_v10'
-- All instructions and register names for any architecture variant
-- in the set v0...v10 are recognized. This is the default if the
-- target is configured as cris-*.
--
--`v10'
-- Only instructions and register names for CRIS v10 (as found in
-- ETRAX 100 LX) are recognized. This is the default if the target
-- is configured as crisv10-*.
--
--`v32'
-- Only instructions and register names for CRIS v32 (code name
-- Guinness) are recognized. This is the default if the target is
-- configured as crisv32-*. This value implies `--no-mul-bug-abort'.
-- (A subsequent `--mul-bug-abort' will turn it back on.)
--
--`common_v10_v32'
-- Only instructions with register names and addressing modes with
-- opcodes common to the v10 and v32 are recognized.
--
-- When `-N' is specified, `as' will emit a warning when a 16-bit
--branch instruction is expanded into a 32-bit multiple-instruction
--construct (*note CRIS-Expand::).
--
-- Some versions of the CRIS v10, for example in the Etrax 100 LX,
--contain a bug that causes destabilizing memory accesses when a multiply
--instruction is executed with certain values in the first operand just
--before a cache-miss. When the `--mul-bug-abort' command line option is
--active (the default value), `as' will refuse to assemble a file
--containing a multiply instruction at a dangerous offset, one that could
--be the last on a cache-line, or is in a section with insufficient
--alignment. This placement checking does not catch any case where the
--multiply instruction is dangerously placed because it is located in a
--delay-slot. The `--mul-bug-abort' command line option turns off the
--checking.
--
--
--File: as.info, Node: CRIS-Expand, Next: CRIS-Symbols, Prev: CRIS-Opts, Up: CRIS-Dependent
--
--9.8.2 Instruction expansion
-----------------------------
--
--`as' will silently choose an instruction that fits the operand size for
--`[register+constant]' operands. For example, the offset `127' in
--`move.d [r3+127],r4' fits in an instruction using a signed-byte offset.
--Similarly, `move.d [r2+32767],r1' will generate an instruction using a
--16-bit offset. For symbolic expressions and constants that do not fit
--in 16 bits including the sign bit, a 32-bit offset is generated.
--
-- For branches, `as' will expand from a 16-bit branch instruction into
--a sequence of instructions that can reach a full 32-bit address. Since
--this does not correspond to a single instruction, such expansions can
--optionally be warned about. *Note CRIS-Opts::.
--
-- If the operand is found to fit the range, a `lapc' mnemonic will
--translate to a `lapcq' instruction. Use `lapc.d' to force the 32-bit
--`lapc' instruction.
--
-- Similarly, the `addo' mnemonic will translate to the shortest
--fitting instruction of `addoq', `addo.w' and `addo.d', when used with a
--operand that is a constant known at assembly time.
--
--
--File: as.info, Node: CRIS-Symbols, Next: CRIS-Syntax, Prev: CRIS-Expand, Up: CRIS-Dependent
--
--9.8.3 Symbols
---------------
--
--Some symbols are defined by the assembler. They're intended to be used
--in conditional assembly, for example:
-- .if ..asm.arch.cris.v32
-- CODE FOR CRIS V32
-- .elseif ..asm.arch.cris.common_v10_v32
-- CODE COMMON TO CRIS V32 AND CRIS V10
-- .elseif ..asm.arch.cris.v10 | ..asm.arch.cris.any_v0_v10
-- CODE FOR V10
-- .else
-- .error "Code needs to be added here."
-- .endif
--
-- These symbols are defined in the assembler, reflecting command-line
--options, either when specified or the default. They are always
--defined, to 0 or 1.
--`..asm.arch.cris.any_v0_v10'
-- This symbol is non-zero when `--march=v0_v10' is specified or the
-- default.
--
--`..asm.arch.cris.common_v10_v32'
-- Set according to the option `--march=common_v10_v32'.
--
--`..asm.arch.cris.v10'
-- Reflects the option `--march=v10'.
--
--`..asm.arch.cris.v32'
-- Corresponds to `--march=v10'.
--
-- Speaking of symbols, when a symbol is used in code, it can have a
--suffix modifying its value for use in position-independent code. *Note
--CRIS-Pic::.
--
--
--File: as.info, Node: CRIS-Syntax, Prev: CRIS-Symbols, Up: CRIS-Dependent
--
--9.8.4 Syntax
--------------
--
--There are different aspects of the CRIS assembly syntax.
--
--* Menu:
--
--* CRIS-Chars:: Special Characters
--* CRIS-Pic:: Position-Independent Code Symbols
--* CRIS-Regs:: Register Names
--* CRIS-Pseudos:: Assembler Directives
--
--
--File: as.info, Node: CRIS-Chars, Next: CRIS-Pic, Up: CRIS-Syntax
--
--9.8.4.1 Special Characters
--..........................
--
--The character `#' is a line comment character. It starts a comment if
--and only if it is placed at the beginning of a line.
--
-- A `;' character starts a comment anywhere on the line, causing all
--characters up to the end of the line to be ignored.
--
-- A `@' character is handled as a line separator equivalent to a
--logical new-line character (except in a comment), so separate
--instructions can be specified on a single line.
--
--
--File: as.info, Node: CRIS-Pic, Next: CRIS-Regs, Prev: CRIS-Chars, Up: CRIS-Syntax
--
--9.8.4.2 Symbols in position-independent code
--............................................
--
--When generating position-independent code (SVR4 PIC) for use in
--cris-axis-linux-gnu or crisv32-axis-linux-gnu shared libraries, symbol
--suffixes are used to specify what kind of run-time symbol lookup will
--be used, expressed in the object as different _relocation types_.
--Usually, all absolute symbol values must be located in a table, the
--_global offset table_, leaving the code position-independent;
--independent of values of global symbols and independent of the address
--of the code. The suffix modifies the value of the symbol, into for
--example an index into the global offset table where the real symbol
--value is entered, or a PC-relative value, or a value relative to the
--start of the global offset table. All symbol suffixes start with the
--character `:' (omitted in the list below). Every symbol use in code or
--a read-only section must therefore have a PIC suffix to enable a useful
--shared library to be created. Usually, these constructs must not be
--used with an additive constant offset as is usually allowed, i.e. no 4
--as in `symbol + 4' is allowed. This restriction is checked at
--link-time, not at assembly-time.
--
--`GOT'
-- Attaching this suffix to a symbol in an instruction causes the
-- symbol to be entered into the global offset table. The value is a
-- 32-bit index for that symbol into the global offset table. The
-- name of the corresponding relocation is `R_CRIS_32_GOT'. Example:
-- `move.d [$r0+extsym:GOT],$r9'
--
--`GOT16'
-- Same as for `GOT', but the value is a 16-bit index into the global
-- offset table. The corresponding relocation is `R_CRIS_16_GOT'.
-- Example: `move.d [$r0+asymbol:GOT16],$r10'
--
--`PLT'
-- This suffix is used for function symbols. It causes a _procedure
-- linkage table_, an array of code stubs, to be created at the time
-- the shared object is created or linked against, together with a
-- global offset table entry. The value is a pc-relative offset to
-- the corresponding stub code in the procedure linkage table. This
-- arrangement causes the run-time symbol resolver to be called to
-- look up and set the value of the symbol the first time the
-- function is called (at latest; depending environment variables).
-- It is only safe to leave the symbol unresolved this way if all
-- references are function calls. The name of the relocation is
-- `R_CRIS_32_PLT_PCREL'. Example: `add.d fnname:PLT,$pc'
--
--`PLTG'
-- Like PLT, but the value is relative to the beginning of the global
-- offset table. The relocation is `R_CRIS_32_PLT_GOTREL'. Example:
-- `move.d fnname:PLTG,$r3'
--
--`GOTPLT'
-- Similar to `PLT', but the value of the symbol is a 32-bit index
-- into the global offset table. This is somewhat of a mix between
-- the effect of the `GOT' and the `PLT' suffix; the difference to
-- `GOT' is that there will be a procedure linkage table entry
-- created, and that the symbol is assumed to be a function entry and
-- will be resolved by the run-time resolver as with `PLT'. The
-- relocation is `R_CRIS_32_GOTPLT'. Example: `jsr
-- [$r0+fnname:GOTPLT]'
--
--`GOTPLT16'
-- A variant of `GOTPLT' giving a 16-bit value. Its relocation name
-- is `R_CRIS_16_GOTPLT'. Example: `jsr [$r0+fnname:GOTPLT16]'
--
--`GOTOFF'
-- This suffix must only be attached to a local symbol, but may be
-- used in an expression adding an offset. The value is the address
-- of the symbol relative to the start of the global offset table.
-- The relocation name is `R_CRIS_32_GOTREL'. Example: `move.d
-- [$r0+localsym:GOTOFF],r3'
--
--
--File: as.info, Node: CRIS-Regs, Next: CRIS-Pseudos, Prev: CRIS-Pic, Up: CRIS-Syntax
--
--9.8.4.3 Register names
--......................
--
--A `$' character may always prefix a general or special register name in
--an instruction operand but is mandatory when the option
--`--no-underscore' is specified or when the `.syntax register_prefix'
--directive is in effect (*note crisnous::). Register names are
--case-insensitive.
--
--
--File: as.info, Node: CRIS-Pseudos, Prev: CRIS-Regs, Up: CRIS-Syntax
--
--9.8.4.4 Assembler Directives
--............................
--
--There are a few CRIS-specific pseudo-directives in addition to the
--generic ones. *Note Pseudo Ops::. Constants emitted by
--pseudo-directives are in little-endian order for CRIS. There is no
--support for floating-point-specific directives for CRIS.
--
--`.dword EXPRESSIONS'
-- The `.dword' directive is a synonym for `.int', expecting zero or
-- more EXPRESSIONS, separated by commas. For each expression, a
-- 32-bit little-endian constant is emitted.
--
--`.syntax ARGUMENT'
-- The `.syntax' directive takes as ARGUMENT one of the following
-- case-sensitive choices.
--
-- `no_register_prefix'
-- The `.syntax no_register_prefix' directive makes a `$'
-- character prefix on all registers optional. It overrides a
-- previous setting, including the corresponding effect of the
-- option `--no-underscore'. If this directive is used when
-- ordinary symbols do not have a `_' character prefix, care
-- must be taken to avoid ambiguities whether an operand is a
-- register or a symbol; using symbols with names the same as
-- general or special registers then invoke undefined behavior.
--
-- `register_prefix'
-- This directive makes a `$' character prefix on all registers
-- mandatory. It overrides a previous setting, including the
-- corresponding effect of the option `--underscore'.
--
-- `leading_underscore'
-- This is an assertion directive, emitting an error if the
-- `--no-underscore' option is in effect.
--
-- `no_leading_underscore'
-- This is the opposite of the `.syntax leading_underscore'
-- directive and emits an error if the option `--underscore' is
-- in effect.
--
--`.arch ARGUMENT'
-- This is an assertion directive, giving an error if the specified
-- ARGUMENT is not the same as the specified or default value for the
-- `--march=ARCHITECTURE' option (*note march-option::).
--
--
--
--File: as.info, Node: D10V-Dependent, Next: D30V-Dependent, Prev: CRIS-Dependent, Up: Machine Dependencies
--
--9.9 D10V Dependent Features
--===========================
--
--* Menu:
--
--* D10V-Opts:: D10V Options
--* D10V-Syntax:: Syntax
--* D10V-Float:: Floating Point
--* D10V-Opcodes:: Opcodes
--
--
--File: as.info, Node: D10V-Opts, Next: D10V-Syntax, Up: D10V-Dependent
--
--9.9.1 D10V Options
--------------------
--
--The Mitsubishi D10V version of `as' has a few machine dependent options.
--
--`-O'
-- The D10V can often execute two sub-instructions in parallel. When
-- this option is used, `as' will attempt to optimize its output by
-- detecting when instructions can be executed in parallel.
--
--`--nowarnswap'
-- To optimize execution performance, `as' will sometimes swap the
-- order of instructions. Normally this generates a warning. When
-- this option is used, no warning will be generated when
-- instructions are swapped.
--
--`--gstabs-packing'
--`--no-gstabs-packing'
-- `as' packs adjacent short instructions into a single packed
-- instruction. `--no-gstabs-packing' turns instruction packing off if
-- `--gstabs' is specified as well; `--gstabs-packing' (the default)
-- turns instruction packing on even when `--gstabs' is specified.
--
--
--File: as.info, Node: D10V-Syntax, Next: D10V-Float, Prev: D10V-Opts, Up: D10V-Dependent
--
--9.9.2 Syntax
--------------
--
--The D10V syntax is based on the syntax in Mitsubishi's D10V
--architecture manual. The differences are detailed below.
--
--* Menu:
--
--* D10V-Size:: Size Modifiers
--* D10V-Subs:: Sub-Instructions
--* D10V-Chars:: Special Characters
--* D10V-Regs:: Register Names
--* D10V-Addressing:: Addressing Modes
--* D10V-Word:: @WORD Modifier
--
--
--File: as.info, Node: D10V-Size, Next: D10V-Subs, Up: D10V-Syntax
--
--9.9.2.1 Size Modifiers
--......................
--
--The D10V version of `as' uses the instruction names in the D10V
--Architecture Manual. However, the names in the manual are sometimes
--ambiguous. There are instruction names that can assemble to a short or
--long form opcode. How does the assembler pick the correct form? `as'
--will always pick the smallest form if it can. When dealing with a
--symbol that is not defined yet when a line is being assembled, it will
--always use the long form. If you need to force the assembler to use
--either the short or long form of the instruction, you can append either
--`.s' (short) or `.l' (long) to it. For example, if you are writing an
--assembly program and you want to do a branch to a symbol that is
--defined later in your program, you can write `bra.s foo'. Objdump
--and GDB will always append `.s' or `.l' to instructions which have both
--short and long forms.
--
--
--File: as.info, Node: D10V-Subs, Next: D10V-Chars, Prev: D10V-Size, Up: D10V-Syntax
--
--9.9.2.2 Sub-Instructions
--........................
--
--The D10V assembler takes as input a series of instructions, either
--one-per-line, or in the special two-per-line format described in the
--next section. Some of these instructions will be short-form or
--sub-instructions. These sub-instructions can be packed into a single
--instruction. The assembler will do this automatically. It will also
--detect when it should not pack instructions. For example, when a label
--is defined, the next instruction will never be packaged with the
--previous one. Whenever a branch and link instruction is called, it
--will not be packaged with the next instruction so the return address
--will be valid. Nops are automatically inserted when necessary.
--
-- If you do not want the assembler automatically making these
--decisions, you can control the packaging and execution type (parallel
--or sequential) with the special execution symbols described in the next
--section.
--
--
--File: as.info, Node: D10V-Chars, Next: D10V-Regs, Prev: D10V-Subs, Up: D10V-Syntax
--
--9.9.2.3 Special Characters
--..........................
--
--A semicolon (`;') can be used anywhere on a line to start a comment
--that extends to the end of the line.
--
-- If a `#' appears as the first character of a line, the whole line is
--treated as a comment, but in this case the line could also be a logical
--line number directive (*note Comments::) or a preprocessor control
--command (*note Preprocessing::).
--
-- Sub-instructions may be executed in order, in reverse-order, or in
--parallel. Instructions listed in the standard one-per-line format will
--be executed sequentially. To specify the executing order, use the
--following symbols:
--`->'
-- Sequential with instruction on the left first.
--
--`<-'
-- Sequential with instruction on the right first.
--
--`||'
-- Parallel
-- The D10V syntax allows either one instruction per line, one
--instruction per line with the execution symbol, or two instructions per
--line. For example
--`abs a1 -> abs r0'
-- Execute these sequentially. The instruction on the right is in
-- the right container and is executed second.
--
--`abs r0 <- abs a1'
-- Execute these reverse-sequentially. The instruction on the right
-- is in the right container, and is executed first.
--
--`ld2w r2,@r8+ || mac a0,r0,r7'
-- Execute these in parallel.
--
--`ld2w r2,@r8+ ||'
--`mac a0,r0,r7'
-- Two-line format. Execute these in parallel.
--
--`ld2w r2,@r8+'
--`mac a0,r0,r7'
-- Two-line format. Execute these sequentially. Assembler will put
-- them in the proper containers.
--
--`ld2w r2,@r8+ ->'
--`mac a0,r0,r7'
-- Two-line format. Execute these sequentially. Same as above but
-- second instruction will always go into right container.
-- Since `$' has no special meaning, you may use it in symbol names.
--
--
--File: as.info, Node: D10V-Regs, Next: D10V-Addressing, Prev: D10V-Chars, Up: D10V-Syntax
--
--9.9.2.4 Register Names
--......................
--
--You can use the predefined symbols `r0' through `r15' to refer to the
--D10V registers. You can also use `sp' as an alias for `r15'. The
--accumulators are `a0' and `a1'. There are special register-pair names
--that may optionally be used in opcodes that require even-numbered
--registers. Register names are not case sensitive.
--
-- Register Pairs
--`r0-r1'
--
--`r2-r3'
--
--`r4-r5'
--
--`r6-r7'
--
--`r8-r9'
--
--`r10-r11'
--
--`r12-r13'
--
--`r14-r15'
--
-- The D10V also has predefined symbols for these control registers and
--status bits:
--`psw'
-- Processor Status Word
--
--`bpsw'
-- Backup Processor Status Word
--
--`pc'
-- Program Counter
--
--`bpc'
-- Backup Program Counter
--
--`rpt_c'
-- Repeat Count
--
--`rpt_s'
-- Repeat Start address
--
--`rpt_e'
-- Repeat End address
--
--`mod_s'
-- Modulo Start address
--
--`mod_e'
-- Modulo End address
--
--`iba'
-- Instruction Break Address
--
--`f0'
-- Flag 0
--
--`f1'
-- Flag 1
--
--`c'
-- Carry flag
--
--
--File: as.info, Node: D10V-Addressing, Next: D10V-Word, Prev: D10V-Regs, Up: D10V-Syntax
--
--9.9.2.5 Addressing Modes
--........................
--
--`as' understands the following addressing modes for the D10V. `RN' in
--the following refers to any of the numbered registers, but _not_ the
--control registers.
--`RN'
-- Register direct
--
--`@RN'
-- Register indirect
--
--`@RN+'
-- Register indirect with post-increment
--
--`@RN-'
-- Register indirect with post-decrement
--
--`@-SP'
-- Register indirect with pre-decrement
--
--`@(DISP, RN)'
-- Register indirect with displacement
--
--`ADDR'
-- PC relative address (for branch or rep).
--
--`#IMM'
-- Immediate data (the `#' is optional and ignored)
--
--
--File: as.info, Node: D10V-Word, Prev: D10V-Addressing, Up: D10V-Syntax
--
--9.9.2.6 @WORD Modifier
--......................
--
--Any symbol followed by `@word' will be replaced by the symbol's value
--shifted right by 2. This is used in situations such as loading a
--register with the address of a function (or any other code fragment).
--For example, if you want to load a register with the location of the
--function `main' then jump to that function, you could do it as follows:
-- ldi r2, main@word
-- jmp r2
--
--
--File: as.info, Node: D10V-Float, Next: D10V-Opcodes, Prev: D10V-Syntax, Up: D10V-Dependent
--
--9.9.3 Floating Point
----------------------
--
--The D10V has no hardware floating point, but the `.float' and `.double'
--directives generates IEEE floating-point numbers for compatibility with
--other development tools.
--
--
--File: as.info, Node: D10V-Opcodes, Prev: D10V-Float, Up: D10V-Dependent
--
--9.9.4 Opcodes
---------------
--
--For detailed information on the D10V machine instruction set, see `D10V
--Architecture: A VLIW Microprocessor for Multimedia Applications'
--(Mitsubishi Electric Corp.). `as' implements all the standard D10V
--opcodes. The only changes are those described in the section on size
--modifiers
--
--
--File: as.info, Node: D30V-Dependent, Next: Epiphany-Dependent, Prev: D10V-Dependent, Up: Machine Dependencies
--
--9.10 D30V Dependent Features
--============================
--
--* Menu:
--
--* D30V-Opts:: D30V Options
--* D30V-Syntax:: Syntax
--* D30V-Float:: Floating Point
--* D30V-Opcodes:: Opcodes
--
--
--File: as.info, Node: D30V-Opts, Next: D30V-Syntax, Up: D30V-Dependent
--
--9.10.1 D30V Options
---------------------
--
--The Mitsubishi D30V version of `as' has a few machine dependent options.
--
--`-O'
-- The D30V can often execute two sub-instructions in parallel. When
-- this option is used, `as' will attempt to optimize its output by
-- detecting when instructions can be executed in parallel.
--
--`-n'
-- When this option is used, `as' will issue a warning every time it
-- adds a nop instruction.
--
--`-N'
-- When this option is used, `as' will issue a warning if it needs to
-- insert a nop after a 32-bit multiply before a load or 16-bit
-- multiply instruction.
--
--
--File: as.info, Node: D30V-Syntax, Next: D30V-Float, Prev: D30V-Opts, Up: D30V-Dependent
--
--9.10.2 Syntax
---------------
--
--The D30V syntax is based on the syntax in Mitsubishi's D30V
--architecture manual. The differences are detailed below.
--
--* Menu:
--
--* D30V-Size:: Size Modifiers
--* D30V-Subs:: Sub-Instructions
--* D30V-Chars:: Special Characters
--* D30V-Guarded:: Guarded Execution
--* D30V-Regs:: Register Names
--* D30V-Addressing:: Addressing Modes
--
--
--File: as.info, Node: D30V-Size, Next: D30V-Subs, Up: D30V-Syntax
--
--9.10.2.1 Size Modifiers
--.......................
--
--The D30V version of `as' uses the instruction names in the D30V
--Architecture Manual. However, the names in the manual are sometimes
--ambiguous. There are instruction names that can assemble to a short or
--long form opcode. How does the assembler pick the correct form? `as'
--will always pick the smallest form if it can. When dealing with a
--symbol that is not defined yet when a line is being assembled, it will
--always use the long form. If you need to force the assembler to use
--either the short or long form of the instruction, you can append either
--`.s' (short) or `.l' (long) to it. For example, if you are writing an
--assembly program and you want to do a branch to a symbol that is
--defined later in your program, you can write `bra.s foo'. Objdump and
--GDB will always append `.s' or `.l' to instructions which have both
--short and long forms.
--
--
--File: as.info, Node: D30V-Subs, Next: D30V-Chars, Prev: D30V-Size, Up: D30V-Syntax
--
--9.10.2.2 Sub-Instructions
--.........................
--
--The D30V assembler takes as input a series of instructions, either
--one-per-line, or in the special two-per-line format described in the
--next section. Some of these instructions will be short-form or
--sub-instructions. These sub-instructions can be packed into a single
--instruction. The assembler will do this automatically. It will also
--detect when it should not pack instructions. For example, when a label
--is defined, the next instruction will never be packaged with the
--previous one. Whenever a branch and link instruction is called, it
--will not be packaged with the next instruction so the return address
--will be valid. Nops are automatically inserted when necessary.
--
-- If you do not want the assembler automatically making these
--decisions, you can control the packaging and execution type (parallel
--or sequential) with the special execution symbols described in the next
--section.
--
--
--File: as.info, Node: D30V-Chars, Next: D30V-Guarded, Prev: D30V-Subs, Up: D30V-Syntax
--
--9.10.2.3 Special Characters
--...........................
--
--A semicolon (`;') can be used anywhere on a line to start a comment
--that extends to the end of the line.
--
-- If a `#' appears as the first character of a line, the whole line is
--treated as a comment, but in this case the line could also be a logical
--line number directive (*note Comments::) or a preprocessor control
--command (*note Preprocessing::).
--
-- Sub-instructions may be executed in order, in reverse-order, or in
--parallel. Instructions listed in the standard one-per-line format will
--be executed sequentially unless you use the `-O' option.
--
-- To specify the executing order, use the following symbols:
--`->'
-- Sequential with instruction on the left first.
--
--`<-'
-- Sequential with instruction on the right first.
--
--`||'
-- Parallel
--
-- The D30V syntax allows either one instruction per line, one
--instruction per line with the execution symbol, or two instructions per
--line. For example
--`abs r2,r3 -> abs r4,r5'
-- Execute these sequentially. The instruction on the right is in
-- the right container and is executed second.
--
--`abs r2,r3 <- abs r4,r5'
-- Execute these reverse-sequentially. The instruction on the right
-- is in the right container, and is executed first.
--
--`abs r2,r3 || abs r4,r5'
-- Execute these in parallel.
--
--`ldw r2,@(r3,r4) ||'
--`mulx r6,r8,r9'
-- Two-line format. Execute these in parallel.
--
--`mulx a0,r8,r9'
--`stw r2,@(r3,r4)'
-- Two-line format. Execute these sequentially unless `-O' option is
-- used. If the `-O' option is used, the assembler will determine if
-- the instructions could be done in parallel (the above two
-- instructions can be done in parallel), and if so, emit them as
-- parallel instructions. The assembler will put them in the proper
-- containers. In the above example, the assembler will put the
-- `stw' instruction in left container and the `mulx' instruction in
-- the right container.
--
--`stw r2,@(r3,r4) ->'
--`mulx a0,r8,r9'
-- Two-line format. Execute the `stw' instruction followed by the
-- `mulx' instruction sequentially. The first instruction goes in the
-- left container and the second instruction goes into right
-- container. The assembler will give an error if the machine
-- ordering constraints are violated.
--
--`stw r2,@(r3,r4) <-'
--`mulx a0,r8,r9'
-- Same as previous example, except that the `mulx' instruction is
-- executed before the `stw' instruction.
--
-- Since `$' has no special meaning, you may use it in symbol names.
--
--
--File: as.info, Node: D30V-Guarded, Next: D30V-Regs, Prev: D30V-Chars, Up: D30V-Syntax
--
--9.10.2.4 Guarded Execution
--..........................
--
--`as' supports the full range of guarded execution directives for each
--instruction. Just append the directive after the instruction proper.
--The directives are:
--
--`/tx'
-- Execute the instruction if flag f0 is true.
--
--`/fx'
-- Execute the instruction if flag f0 is false.
--
--`/xt'
-- Execute the instruction if flag f1 is true.
--
--`/xf'
-- Execute the instruction if flag f1 is false.
--
--`/tt'
-- Execute the instruction if both flags f0 and f1 are true.
--
--`/tf'
-- Execute the instruction if flag f0 is true and flag f1 is false.
--
--
--File: as.info, Node: D30V-Regs, Next: D30V-Addressing, Prev: D30V-Guarded, Up: D30V-Syntax
--
--9.10.2.5 Register Names
--.......................
--
--You can use the predefined symbols `r0' through `r63' to refer to the
--D30V registers. You can also use `sp' as an alias for `r63' and `link'
--as an alias for `r62'. The accumulators are `a0' and `a1'.
--
-- The D30V also has predefined symbols for these control registers and
--status bits:
--`psw'
-- Processor Status Word
--
--`bpsw'
-- Backup Processor Status Word
--
--`pc'
-- Program Counter
--
--`bpc'
-- Backup Program Counter
--
--`rpt_c'
-- Repeat Count
--
--`rpt_s'
-- Repeat Start address
--
--`rpt_e'
-- Repeat End address
--
--`mod_s'
-- Modulo Start address
--
--`mod_e'
-- Modulo End address
--
--`iba'
-- Instruction Break Address
--
--`f0'
-- Flag 0
--
--`f1'
-- Flag 1
--
--`f2'
-- Flag 2
--
--`f3'
-- Flag 3
--
--`f4'
-- Flag 4
--
--`f5'
-- Flag 5
--
--`f6'
-- Flag 6
--
--`f7'
-- Flag 7
--
--`s'
-- Same as flag 4 (saturation flag)
--
--`v'
-- Same as flag 5 (overflow flag)
--
--`va'
-- Same as flag 6 (sticky overflow flag)
--
--`c'
-- Same as flag 7 (carry/borrow flag)
--
--`b'
-- Same as flag 7 (carry/borrow flag)
--
--
--File: as.info, Node: D30V-Addressing, Prev: D30V-Regs, Up: D30V-Syntax
--
--9.10.2.6 Addressing Modes
--.........................
--
--`as' understands the following addressing modes for the D30V. `RN' in
--the following refers to any of the numbered registers, but _not_ the
--control registers.
--`RN'
-- Register direct
--
--`@RN'
-- Register indirect
--
--`@RN+'
-- Register indirect with post-increment
--
--`@RN-'
-- Register indirect with post-decrement
--
--`@-SP'
-- Register indirect with pre-decrement
--
--`@(DISP, RN)'
-- Register indirect with displacement
--
--`ADDR'
-- PC relative address (for branch or rep).
--
--`#IMM'
-- Immediate data (the `#' is optional and ignored)
--
--
--File: as.info, Node: D30V-Float, Next: D30V-Opcodes, Prev: D30V-Syntax, Up: D30V-Dependent
--
--9.10.3 Floating Point
-----------------------
--
--The D30V has no hardware floating point, but the `.float' and `.double'
--directives generates IEEE floating-point numbers for compatibility with
--other development tools.
--
--
--File: as.info, Node: D30V-Opcodes, Prev: D30V-Float, Up: D30V-Dependent
--
--9.10.4 Opcodes
----------------
--
--For detailed information on the D30V machine instruction set, see `D30V
--Architecture: A VLIW Microprocessor for Multimedia Applications'
--(Mitsubishi Electric Corp.). `as' implements all the standard D30V
--opcodes. The only changes are those described in the section on size
--modifiers
--
--
--File: as.info, Node: Epiphany-Dependent, Next: H8/300-Dependent, Prev: D30V-Dependent, Up: Machine Dependencies
--
--9.11 Epiphany Dependent Features
--================================
--
--* Menu:
--
--* Epiphany Options:: Options
--* Epiphany Syntax:: Epiphany Syntax
--
--
--File: as.info, Node: Epiphany Options, Next: Epiphany Syntax, Up: Epiphany-Dependent
--
--9.11.1 Options
----------------
--
--`as' has two additional command-line options for the Epiphany
--architecture.
--
--`-mepiphany'
-- Specifies that the both 32 and 16 bit instructions are allowed.
-- This is the default behavior.
--
--`-mepiphany16'
-- Restricts the permitted instructions to just the 16 bit set.
--
--
--File: as.info, Node: Epiphany Syntax, Prev: Epiphany Options, Up: Epiphany-Dependent
--
--9.11.2 Epiphany Syntax
------------------------
--
--* Menu:
--
--* Epiphany-Chars:: Special Characters
--
--
--File: as.info, Node: Epiphany-Chars, Up: Epiphany Syntax
--
--9.11.2.1 Special Characters
--...........................
--
--The presence of a `;' on a line indicates the start of a comment that
--extends to the end of the current line.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line could also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- The ``' character can be used to separate statements on the same
--line.
--
--
--File: as.info, Node: H8/300-Dependent, Next: HPPA-Dependent, Prev: Epiphany-Dependent, Up: Machine Dependencies
--
--9.12 H8/300 Dependent Features
--==============================
--
--* Menu:
--
--* H8/300 Options:: Options
--* H8/300 Syntax:: Syntax
--* H8/300 Floating Point:: Floating Point
--* H8/300 Directives:: H8/300 Machine Directives
--* H8/300 Opcodes:: Opcodes
--
--
--File: as.info, Node: H8/300 Options, Next: H8/300 Syntax, Up: H8/300-Dependent
--
--9.12.1 Options
----------------
--
--The Renesas H8/300 version of `as' has one machine-dependent option:
--
--`-h-tick-hex'
-- Support H'00 style hex constants in addition to 0x00 style.
--
--
--
--File: as.info, Node: H8/300 Syntax, Next: H8/300 Floating Point, Prev: H8/300 Options, Up: H8/300-Dependent
--
--9.12.2 Syntax
---------------
--
--* Menu:
--
--* H8/300-Chars:: Special Characters
--* H8/300-Regs:: Register Names
--* H8/300-Addressing:: Addressing Modes
--
--
--File: as.info, Node: H8/300-Chars, Next: H8/300-Regs, Up: H8/300 Syntax
--
--9.12.2.1 Special Characters
--...........................
--
--`;' is the line comment character.
--
-- `$' can be used instead of a newline to separate statements.
--Therefore _you may not use `$' in symbol names_ on the H8/300.
--
--
--File: as.info, Node: H8/300-Regs, Next: H8/300-Addressing, Prev: H8/300-Chars, Up: H8/300 Syntax
--
--9.12.2.2 Register Names
--.......................
--
--You can use predefined symbols of the form `rNh' and `rNl' to refer to
--the H8/300 registers as sixteen 8-bit general-purpose registers. N is
--a digit from `0' to `7'); for instance, both `r0h' and `r7l' are valid
--register names.
--
-- You can also use the eight predefined symbols `rN' to refer to the
--H8/300 registers as 16-bit registers (you must use this form for
--addressing).
--
-- On the H8/300H, you can also use the eight predefined symbols `erN'
--(`er0' ... `er7') to refer to the 32-bit general purpose registers.
--
-- The two control registers are called `pc' (program counter; a 16-bit
--register, except on the H8/300H where it is 24 bits) and `ccr'
--(condition code register; an 8-bit register). `r7' is used as the
--stack pointer, and can also be called `sp'.
--
--
--File: as.info, Node: H8/300-Addressing, Prev: H8/300-Regs, Up: H8/300 Syntax
--
--9.12.2.3 Addressing Modes
--.........................
--
--as understands the following addressing modes for the H8/300:
--`rN'
-- Register direct
--
--`@rN'
-- Register indirect
--
--`@(D, rN)'
--`@(D:16, rN)'
--`@(D:24, rN)'
-- Register indirect: 16-bit or 24-bit displacement D from register
-- N. (24-bit displacements are only meaningful on the H8/300H.)
--
--`@rN+'
-- Register indirect with post-increment
--
--`@-rN'
-- Register indirect with pre-decrement
--
--``@'AA'
--``@'AA:8'
--``@'AA:16'
--``@'AA:24'
-- Absolute address `aa'. (The address size `:24' only makes sense
-- on the H8/300H.)
--
--`#XX'
--`#XX:8'
--`#XX:16'
--`#XX:32'
-- Immediate data XX. You may specify the `:8', `:16', or `:32' for
-- clarity, if you wish; but `as' neither requires this nor uses
-- it--the data size required is taken from context.
--
--``@'`@'AA'
--``@'`@'AA:8'
-- Memory indirect. You may specify the `:8' for clarity, if you
-- wish; but `as' neither requires this nor uses it.
--
--
--File: as.info, Node: H8/300 Floating Point, Next: H8/300 Directives, Prev: H8/300 Syntax, Up: H8/300-Dependent
--
--9.12.3 Floating Point
-----------------------
--
--The H8/300 family has no hardware floating point, but the `.float'
--directive generates IEEE floating-point numbers for compatibility with
--other development tools.
--
--
--File: as.info, Node: H8/300 Directives, Next: H8/300 Opcodes, Prev: H8/300 Floating Point, Up: H8/300-Dependent
--
--9.12.4 H8/300 Machine Directives
----------------------------------
--
--`as' has the following machine-dependent directives for the H8/300:
--
--`.h8300h'
-- Recognize and emit additional instructions for the H8/300H
-- variant, and also make `.int' emit 32-bit numbers rather than the
-- usual (16-bit) for the H8/300 family.
--
--`.h8300s'
-- Recognize and emit additional instructions for the H8S variant, and
-- also make `.int' emit 32-bit numbers rather than the usual (16-bit)
-- for the H8/300 family.
--
--`.h8300hn'
-- Recognize and emit additional instructions for the H8/300H variant
-- in normal mode, and also make `.int' emit 32-bit numbers rather
-- than the usual (16-bit) for the H8/300 family.
--
--`.h8300sn'
-- Recognize and emit additional instructions for the H8S variant in
-- normal mode, and also make `.int' emit 32-bit numbers rather than
-- the usual (16-bit) for the H8/300 family.
--
-- On the H8/300 family (including the H8/300H) `.word' directives
--generate 16-bit numbers.
--
--
--File: as.info, Node: H8/300 Opcodes, Prev: H8/300 Directives, Up: H8/300-Dependent
--
--9.12.5 Opcodes
----------------
--
--For detailed information on the H8/300 machine instruction set, see
--`H8/300 Series Programming Manual'. For information specific to the
--H8/300H, see `H8/300H Series Programming Manual' (Renesas).
--
-- `as' implements all the standard H8/300 opcodes. No additional
--pseudo-instructions are needed on this family.
--
-- The following table summarizes the H8/300 opcodes, and their
--arguments. Entries marked `*' are opcodes used only on the H8/300H.
--
-- Legend:
-- Rs source register
-- Rd destination register
-- abs absolute address
-- imm immediate data
-- disp:N N-bit displacement from a register
-- pcrel:N N-bit displacement relative to program counter
--
-- add.b #imm,rd * andc #imm,ccr
-- add.b rs,rd band #imm,rd
-- add.w rs,rd band #imm,@rd
-- * add.w #imm,rd band #imm,@abs:8
-- * add.l rs,rd bra pcrel:8
-- * add.l #imm,rd * bra pcrel:16
-- adds #imm,rd bt pcrel:8
-- addx #imm,rd * bt pcrel:16
-- addx rs,rd brn pcrel:8
-- and.b #imm,rd * brn pcrel:16
-- and.b rs,rd bf pcrel:8
-- * and.w rs,rd * bf pcrel:16
-- * and.w #imm,rd bhi pcrel:8
-- * and.l #imm,rd * bhi pcrel:16
-- * and.l rs,rd bls pcrel:8
--
-- * bls pcrel:16 bld #imm,rd
-- bcc pcrel:8 bld #imm,@rd
-- * bcc pcrel:16 bld #imm,@abs:8
-- bhs pcrel:8 bnot #imm,rd
-- * bhs pcrel:16 bnot #imm,@rd
-- bcs pcrel:8 bnot #imm,@abs:8
-- * bcs pcrel:16 bnot rs,rd
-- blo pcrel:8 bnot rs,@rd
-- * blo pcrel:16 bnot rs,@abs:8
-- bne pcrel:8 bor #imm,rd
-- * bne pcrel:16 bor #imm,@rd
-- beq pcrel:8 bor #imm,@abs:8
-- * beq pcrel:16 bset #imm,rd
-- bvc pcrel:8 bset #imm,@rd
-- * bvc pcrel:16 bset #imm,@abs:8
-- bvs pcrel:8 bset rs,rd
-- * bvs pcrel:16 bset rs,@rd
-- bpl pcrel:8 bset rs,@abs:8
-- * bpl pcrel:16 bsr pcrel:8
-- bmi pcrel:8 bsr pcrel:16
-- * bmi pcrel:16 bst #imm,rd
-- bge pcrel:8 bst #imm,@rd
-- * bge pcrel:16 bst #imm,@abs:8
-- blt pcrel:8 btst #imm,rd
-- * blt pcrel:16 btst #imm,@rd
-- bgt pcrel:8 btst #imm,@abs:8
-- * bgt pcrel:16 btst rs,rd
-- ble pcrel:8 btst rs,@rd
-- * ble pcrel:16 btst rs,@abs:8
-- bclr #imm,rd bxor #imm,rd
-- bclr #imm,@rd bxor #imm,@rd
-- bclr #imm,@abs:8 bxor #imm,@abs:8
-- bclr rs,rd cmp.b #imm,rd
-- bclr rs,@rd cmp.b rs,rd
-- bclr rs,@abs:8 cmp.w rs,rd
-- biand #imm,rd cmp.w rs,rd
-- biand #imm,@rd * cmp.w #imm,rd
-- biand #imm,@abs:8 * cmp.l #imm,rd
-- bild #imm,rd * cmp.l rs,rd
-- bild #imm,@rd daa rs
-- bild #imm,@abs:8 das rs
-- bior #imm,rd dec.b rs
-- bior #imm,@rd * dec.w #imm,rd
-- bior #imm,@abs:8 * dec.l #imm,rd
-- bist #imm,rd divxu.b rs,rd
-- bist #imm,@rd * divxu.w rs,rd
-- bist #imm,@abs:8 * divxs.b rs,rd
-- bixor #imm,rd * divxs.w rs,rd
-- bixor #imm,@rd eepmov
-- bixor #imm,@abs:8 * eepmovw
--
-- * exts.w rd mov.w rs,@abs:16
-- * exts.l rd * mov.l #imm,rd
-- * extu.w rd * mov.l rs,rd
-- * extu.l rd * mov.l @rs,rd
-- inc rs * mov.l @(disp:16,rs),rd
-- * inc.w #imm,rd * mov.l @(disp:24,rs),rd
-- * inc.l #imm,rd * mov.l @rs+,rd
-- jmp @rs * mov.l @abs:16,rd
-- jmp abs * mov.l @abs:24,rd
-- jmp @@abs:8 * mov.l rs,@rd
-- jsr @rs * mov.l rs,@(disp:16,rd)
-- jsr abs * mov.l rs,@(disp:24,rd)
-- jsr @@abs:8 * mov.l rs,@-rd
-- ldc #imm,ccr * mov.l rs,@abs:16
-- ldc rs,ccr * mov.l rs,@abs:24
-- * ldc @abs:16,ccr movfpe @abs:16,rd
-- * ldc @abs:24,ccr movtpe rs,@abs:16
-- * ldc @(disp:16,rs),ccr mulxu.b rs,rd
-- * ldc @(disp:24,rs),ccr * mulxu.w rs,rd
-- * ldc @rs+,ccr * mulxs.b rs,rd
-- * ldc @rs,ccr * mulxs.w rs,rd
-- * mov.b @(disp:24,rs),rd neg.b rs
-- * mov.b rs,@(disp:24,rd) * neg.w rs
-- mov.b @abs:16,rd * neg.l rs
-- mov.b rs,rd nop
-- mov.b @abs:8,rd not.b rs
-- mov.b rs,@abs:8 * not.w rs
-- mov.b rs,rd * not.l rs
-- mov.b #imm,rd or.b #imm,rd
-- mov.b @rs,rd or.b rs,rd
-- mov.b @(disp:16,rs),rd * or.w #imm,rd
-- mov.b @rs+,rd * or.w rs,rd
-- mov.b @abs:8,rd * or.l #imm,rd
-- mov.b rs,@rd * or.l rs,rd
-- mov.b rs,@(disp:16,rd) orc #imm,ccr
-- mov.b rs,@-rd pop.w rs
-- mov.b rs,@abs:8 * pop.l rs
-- mov.w rs,@rd push.w rs
-- * mov.w @(disp:24,rs),rd * push.l rs
-- * mov.w rs,@(disp:24,rd) rotl.b rs
-- * mov.w @abs:24,rd * rotl.w rs
-- * mov.w rs,@abs:24 * rotl.l rs
-- mov.w rs,rd rotr.b rs
-- mov.w #imm,rd * rotr.w rs
-- mov.w @rs,rd * rotr.l rs
-- mov.w @(disp:16,rs),rd rotxl.b rs
-- mov.w @rs+,rd * rotxl.w rs
-- mov.w @abs:16,rd * rotxl.l rs
-- mov.w rs,@(disp:16,rd) rotxr.b rs
-- mov.w rs,@-rd * rotxr.w rs
--
-- * rotxr.l rs * stc ccr,@(disp:24,rd)
-- bpt * stc ccr,@-rd
-- rte * stc ccr,@abs:16
-- rts * stc ccr,@abs:24
-- shal.b rs sub.b rs,rd
-- * shal.w rs sub.w rs,rd
-- * shal.l rs * sub.w #imm,rd
-- shar.b rs * sub.l rs,rd
-- * shar.w rs * sub.l #imm,rd
-- * shar.l rs subs #imm,rd
-- shll.b rs subx #imm,rd
-- * shll.w rs subx rs,rd
-- * shll.l rs * trapa #imm
-- shlr.b rs xor #imm,rd
-- * shlr.w rs xor rs,rd
-- * shlr.l rs * xor.w #imm,rd
-- sleep * xor.w rs,rd
-- stc ccr,rd * xor.l #imm,rd
-- * stc ccr,@rs * xor.l rs,rd
-- * stc ccr,@(disp:16,rd) xorc #imm,ccr
--
-- Four H8/300 instructions (`add', `cmp', `mov', `sub') are defined
--with variants using the suffixes `.b', `.w', and `.l' to specify the
--size of a memory operand. `as' supports these suffixes, but does not
--require them; since one of the operands is always a register, `as' can
--deduce the correct size.
--
-- For example, since `r0' refers to a 16-bit register,
-- mov r0,@foo
--is equivalent to
-- mov.w r0,@foo
--
-- If you use the size suffixes, `as' issues a warning when the suffix
--and the register size do not match.
--
--
--File: as.info, Node: HPPA-Dependent, Next: ESA/390-Dependent, Prev: H8/300-Dependent, Up: Machine Dependencies
--
--9.13 HPPA Dependent Features
--============================
--
--* Menu:
--
--* HPPA Notes:: Notes
--* HPPA Options:: Options
--* HPPA Syntax:: Syntax
--* HPPA Floating Point:: Floating Point
--* HPPA Directives:: HPPA Machine Directives
--* HPPA Opcodes:: Opcodes
--
--
--File: as.info, Node: HPPA Notes, Next: HPPA Options, Up: HPPA-Dependent
--
--9.13.1 Notes
--------------
--
--As a back end for GNU CC `as' has been throughly tested and should work
--extremely well. We have tested it only minimally on hand written
--assembly code and no one has tested it much on the assembly output from
--the HP compilers.
--
-- The format of the debugging sections has changed since the original
--`as' port (version 1.3X) was released; therefore, you must rebuild all
--HPPA objects and libraries with the new assembler so that you can debug
--the final executable.
--
-- The HPPA `as' port generates a small subset of the relocations
--available in the SOM and ELF object file formats. Additional relocation
--support will be added as it becomes necessary.
--
--
--File: as.info, Node: HPPA Options, Next: HPPA Syntax, Prev: HPPA Notes, Up: HPPA-Dependent
--
--9.13.2 Options
----------------
--
--`as' has no machine-dependent command-line options for the HPPA.
--
--
--File: as.info, Node: HPPA Syntax, Next: HPPA Floating Point, Prev: HPPA Options, Up: HPPA-Dependent
--
--9.13.3 Syntax
---------------
--
--The assembler syntax closely follows the HPPA instruction set reference
--manual; assembler directives and general syntax closely follow the HPPA
--assembly language reference manual, with a few noteworthy differences.
--
-- First, a colon may immediately follow a label definition. This is
--simply for compatibility with how most assembly language programmers
--write code.
--
-- Some obscure expression parsing problems may affect hand written
--code which uses the `spop' instructions, or code which makes significant
--use of the `!' line separator.
--
-- `as' is much less forgiving about missing arguments and other
--similar oversights than the HP assembler. `as' notifies you of missing
--arguments as syntax errors; this is regarded as a feature, not a bug.
--
-- Finally, `as' allows you to use an external symbol without
--explicitly importing the symbol. _Warning:_ in the future this will be
--an error for HPPA targets.
--
-- Special characters for HPPA targets include:
--
-- `;' is the line comment character.
--
-- `!' can be used instead of a newline to separate statements.
--
-- Since `$' has no special meaning, you may use it in symbol names.
--
--
--File: as.info, Node: HPPA Floating Point, Next: HPPA Directives, Prev: HPPA Syntax, Up: HPPA-Dependent
--
--9.13.4 Floating Point
-----------------------
--
--The HPPA family uses IEEE floating-point numbers.
--
--
--File: as.info, Node: HPPA Directives, Next: HPPA Opcodes, Prev: HPPA Floating Point, Up: HPPA-Dependent
--
--9.13.5 HPPA Assembler Directives
----------------------------------
--
--`as' for the HPPA supports many additional directives for compatibility
--with the native assembler. This section describes them only briefly.
--For detailed information on HPPA-specific assembler directives, see
--`HP9000 Series 800 Assembly Language Reference Manual' (HP 92432-90001).
--
-- `as' does _not_ support the following assembler directives described
--in the HP manual:
--
-- .endm .liston
-- .enter .locct
-- .leave .macro
-- .listoff
--
-- Beyond those implemented for compatibility, `as' supports one
--additional assembler directive for the HPPA: `.param'. It conveys
--register argument locations for static functions. Its syntax closely
--follows the `.export' directive.
--
-- These are the additional directives in `as' for the HPPA:
--
--`.block N'
--`.blockz N'
-- Reserve N bytes of storage, and initialize them to zero.
--
--`.call'
-- Mark the beginning of a procedure call. Only the special case
-- with _no arguments_ is allowed.
--
--`.callinfo [ PARAM=VALUE, ... ] [ FLAG, ... ]'
-- Specify a number of parameters and flags that define the
-- environment for a procedure.
--
-- PARAM may be any of `frame' (frame size), `entry_gr' (end of
-- general register range), `entry_fr' (end of float register range),
-- `entry_sr' (end of space register range).
--
-- The values for FLAG are `calls' or `caller' (proc has
-- subroutines), `no_calls' (proc does not call subroutines),
-- `save_rp' (preserve return pointer), `save_sp' (proc preserves
-- stack pointer), `no_unwind' (do not unwind this proc), `hpux_int'
-- (proc is interrupt routine).
--
--`.code'
-- Assemble into the standard section called `$TEXT$', subsection
-- `$CODE$'.
--
--`.copyright "STRING"'
-- In the SOM object format, insert STRING into the object code,
-- marked as a copyright string.
--
--`.copyright "STRING"'
-- In the ELF object format, insert STRING into the object code,
-- marked as a version string.
--
--`.enter'
-- Not yet supported; the assembler rejects programs containing this
-- directive.
--
--`.entry'
-- Mark the beginning of a procedure.
--
--`.exit'
-- Mark the end of a procedure.
--
--`.export NAME [ ,TYP ] [ ,PARAM=R ]'
-- Make a procedure NAME available to callers. TYP, if present, must
-- be one of `absolute', `code' (ELF only, not SOM), `data', `entry',
-- `data', `entry', `millicode', `plabel', `pri_prog', or `sec_prog'.
--
-- PARAM, if present, provides either relocation information for the
-- procedure arguments and result, or a privilege level. PARAM may be
-- `argwN' (where N ranges from `0' to `3', and indicates one of four
-- one-word arguments); `rtnval' (the procedure's result); or
-- `priv_lev' (privilege level). For arguments or the result, R
-- specifies how to relocate, and must be one of `no' (not
-- relocatable), `gr' (argument is in general register), `fr' (in
-- floating point register), or `fu' (upper half of float register).
-- For `priv_lev', R is an integer.
--
--`.half N'
-- Define a two-byte integer constant N; synonym for the portable
-- `as' directive `.short'.
--
--`.import NAME [ ,TYP ]'
-- Converse of `.export'; make a procedure available to call. The
-- arguments use the same conventions as the first two arguments for
-- `.export'.
--
--`.label NAME'
-- Define NAME as a label for the current assembly location.
--
--`.leave'
-- Not yet supported; the assembler rejects programs containing this
-- directive.
--
--`.origin LC'
-- Advance location counter to LC. Synonym for the `as' portable
-- directive `.org'.
--
--`.param NAME [ ,TYP ] [ ,PARAM=R ]'
-- Similar to `.export', but used for static procedures.
--
--`.proc'
-- Use preceding the first statement of a procedure.
--
--`.procend'
-- Use following the last statement of a procedure.
--
--`LABEL .reg EXPR'
-- Synonym for `.equ'; define LABEL with the absolute expression EXPR
-- as its value.
--
--`.space SECNAME [ ,PARAMS ]'
-- Switch to section SECNAME, creating a new section by that name if
-- necessary. You may only use PARAMS when creating a new section,
-- not when switching to an existing one. SECNAME may identify a
-- section by number rather than by name.
--
-- If specified, the list PARAMS declares attributes of the section,
-- identified by keywords. The keywords recognized are `spnum=EXP'
-- (identify this section by the number EXP, an absolute expression),
-- `sort=EXP' (order sections according to this sort key when linking;
-- EXP is an absolute expression), `unloadable' (section contains no
-- loadable data), `notdefined' (this section defined elsewhere), and
-- `private' (data in this section not available to other programs).
--
--`.spnum SECNAM'
-- Allocate four bytes of storage, and initialize them with the
-- section number of the section named SECNAM. (You can define the
-- section number with the HPPA `.space' directive.)
--
--`.string "STR"'
-- Copy the characters in the string STR to the object file. *Note
-- Strings: Strings, for information on escape sequences you can use
-- in `as' strings.
--
-- _Warning!_ The HPPA version of `.string' differs from the usual
-- `as' definition: it does _not_ write a zero byte after copying STR.
--
--`.stringz "STR"'
-- Like `.string', but appends a zero byte after copying STR to object
-- file.
--
--`.subspa NAME [ ,PARAMS ]'
--`.nsubspa NAME [ ,PARAMS ]'
-- Similar to `.space', but selects a subsection NAME within the
-- current section. You may only specify PARAMS when you create a
-- subsection (in the first instance of `.subspa' for this NAME).
--
-- If specified, the list PARAMS declares attributes of the
-- subsection, identified by keywords. The keywords recognized are
-- `quad=EXPR' ("quadrant" for this subsection), `align=EXPR'
-- (alignment for beginning of this subsection; a power of two),
-- `access=EXPR' (value for "access rights" field), `sort=EXPR'
-- (sorting order for this subspace in link), `code_only' (subsection
-- contains only code), `unloadable' (subsection cannot be loaded
-- into memory), `comdat' (subsection is comdat), `common'
-- (subsection is common block), `dup_comm' (subsection may have
-- duplicate names), or `zero' (subsection is all zeros, do not write
-- in object file).
--
-- `.nsubspa' always creates a new subspace with the given name, even
-- if one with the same name already exists.
--
-- `comdat', `common' and `dup_comm' can be used to implement various
-- flavors of one-only support when using the SOM linker. The SOM
-- linker only supports specific combinations of these flags. The
-- details are not documented. A brief description is provided here.
--
-- `comdat' provides a form of linkonce support. It is useful for
-- both code and data subspaces. A `comdat' subspace has a key symbol
-- marked by the `is_comdat' flag or `ST_COMDAT'. Only the first
-- subspace for any given key is selected. The key symbol becomes
-- universal in shared links. This is similar to the behavior of
-- `secondary_def' symbols.
--
-- `common' provides Fortran named common support. It is only useful
-- for data subspaces. Symbols with the flag `is_common' retain this
-- flag in shared links. Referencing a `is_common' symbol in a shared
-- library from outside the library doesn't work. Thus, `is_common'
-- symbols must be output whenever they are needed.
--
-- `common' and `dup_comm' together provide Cobol common support.
-- The subspaces in this case must all be the same length.
-- Otherwise, this support is similar to the Fortran common support.
--
-- `dup_comm' by itself provides a type of one-only support for code.
-- Only the first `dup_comm' subspace is selected. There is a rather
-- complex algorithm to compare subspaces. Code symbols marked with
-- the `dup_common' flag are hidden. This support was intended for
-- "C++ duplicate inlines".
--
-- A simplified technique is used to mark the flags of symbols based
-- on the flags of their subspace. A symbol with the scope
-- SS_UNIVERSAL and type ST_ENTRY, ST_CODE or ST_DATA is marked with
-- the corresponding settings of `comdat', `common' and `dup_comm'
-- from the subspace, respectively. This avoids having to introduce
-- additional directives to mark these symbols. The HP assembler
-- sets `is_common' from `common'. However, it doesn't set the
-- `dup_common' from `dup_comm'. It doesn't have `comdat' support.
--
--`.version "STR"'
-- Write STR as version identifier in object code.
--
--
--File: as.info, Node: HPPA Opcodes, Prev: HPPA Directives, Up: HPPA-Dependent
--
--9.13.6 Opcodes
----------------
--
--For detailed information on the HPPA machine instruction set, see
--`PA-RISC Architecture and Instruction Set Reference Manual' (HP
--09740-90039).
--
--
--File: as.info, Node: ESA/390-Dependent, Next: i386-Dependent, Prev: HPPA-Dependent, Up: Machine Dependencies
--
--9.14 ESA/390 Dependent Features
--===============================
--
--* Menu:
--
--* ESA/390 Notes:: Notes
--* ESA/390 Options:: Options
--* ESA/390 Syntax:: Syntax
--* ESA/390 Floating Point:: Floating Point
--* ESA/390 Directives:: ESA/390 Machine Directives
--* ESA/390 Opcodes:: Opcodes
--
--
--File: as.info, Node: ESA/390 Notes, Next: ESA/390 Options, Up: ESA/390-Dependent
--
--9.14.1 Notes
--------------
--
--The ESA/390 `as' port is currently intended to be a back-end for the
--GNU CC compiler. It is not HLASM compatible, although it does support
--a subset of some of the HLASM directives. The only supported binary
--file format is ELF; none of the usual MVS/VM/OE/USS object file
--formats, such as ESD or XSD, are supported.
--
-- When used with the GNU CC compiler, the ESA/390 `as' will produce
--correct, fully relocated, functional binaries, and has been used to
--compile and execute large projects. However, many aspects should still
--be considered experimental; these include shared library support,
--dynamically loadable objects, and any relocation other than the 31-bit
--relocation.
--
--
--File: as.info, Node: ESA/390 Options, Next: ESA/390 Syntax, Prev: ESA/390 Notes, Up: ESA/390-Dependent
--
--9.14.2 Options
----------------
--
--`as' has no machine-dependent command-line options for the ESA/390.
--
--
--File: as.info, Node: ESA/390 Syntax, Next: ESA/390 Floating Point, Prev: ESA/390 Options, Up: ESA/390-Dependent
--
--9.14.3 Syntax
---------------
--
--The opcode/operand syntax follows the ESA/390 Principles of Operation
--manual; assembler directives and general syntax are loosely based on the
--prevailing AT&T/SVR4/ELF/Solaris style notation. HLASM-style directives
--are _not_ supported for the most part, with the exception of those
--described herein.
--
-- A leading dot in front of directives is optional, and the case of
--directives is ignored; thus for example, .using and USING have the same
--effect.
--
-- A colon may immediately follow a label definition. This is simply
--for compatibility with how most assembly language programmers write
--code.
--
-- `#' is the line comment character.
--
-- `;' can be used instead of a newline to separate statements.
--
-- Since `$' has no special meaning, you may use it in symbol names.
--
-- Registers can be given the symbolic names r0..r15, fp0, fp2, fp4,
--fp6. By using thesse symbolic names, `as' can detect simple syntax
--errors. The name rarg or r.arg is a synonym for r11, rtca or r.tca for
--r12, sp, r.sp, dsa r.dsa for r13, lr or r.lr for r14, rbase or r.base
--for r3 and rpgt or r.pgt for r4.
--
-- `*' is the current location counter. Unlike `.' it is always
--relative to the last USING directive. Note that this means that
--expressions cannot use multiplication, as any occurrence of `*' will be
--interpreted as a location counter.
--
-- All labels are relative to the last USING. Thus, branches to a label
--always imply the use of base+displacement.
--
-- Many of the usual forms of address constants / address literals are
--supported. Thus,
-- .using *,r3
-- L r15,=A(some_routine)
-- LM r6,r7,=V(some_longlong_extern)
-- A r1,=F'12'
-- AH r0,=H'42'
-- ME r6,=E'3.1416'
-- MD r6,=D'3.14159265358979'
-- O r6,=XL4'cacad0d0'
-- .ltorg
-- should all behave as expected: that is, an entry in the literal pool
--will be created (or reused if it already exists), and the instruction
--operands will be the displacement into the literal pool using the
--current base register (as last declared with the `.using' directive).
--
--
--File: as.info, Node: ESA/390 Floating Point, Next: ESA/390 Directives, Prev: ESA/390 Syntax, Up: ESA/390-Dependent
--
--9.14.4 Floating Point
-----------------------
--
--The assembler generates only IEEE floating-point numbers. The older
--floating point formats are not supported.
--
--
--File: as.info, Node: ESA/390 Directives, Next: ESA/390 Opcodes, Prev: ESA/390 Floating Point, Up: ESA/390-Dependent
--
--9.14.5 ESA/390 Assembler Directives
-------------------------------------
--
--`as' for the ESA/390 supports all of the standard ELF/SVR4 assembler
--directives that are documented in the main part of this documentation.
--Several additional directives are supported in order to implement the
--ESA/390 addressing model. The most important of these are `.using' and
--`.ltorg'
--
-- These are the additional directives in `as' for the ESA/390:
--
--`.dc'
-- A small subset of the usual DC directive is supported.
--
--`.drop REGNO'
-- Stop using REGNO as the base register. The REGNO must have been
-- previously declared with a `.using' directive in the same section
-- as the current section.
--
--`.ebcdic STRING'
-- Emit the EBCDIC equivalent of the indicated string. The emitted
-- string will be null terminated. Note that the directives
-- `.string' etc. emit ascii strings by default.
--
--`EQU'
-- The standard HLASM-style EQU directive is not supported; however,
-- the standard `as' directive .equ can be used to the same effect.
--
--`.ltorg'
-- Dump the literal pool accumulated so far; begin a new literal pool.
-- The literal pool will be written in the current section; in order
-- to generate correct assembly, a `.using' must have been previously
-- specified in the same section.
--
--`.using EXPR,REGNO'
-- Use REGNO as the base register for all subsequent RX, RS, and SS
-- form instructions. The EXPR will be evaluated to obtain the base
-- address; usually, EXPR will merely be `*'.
--
-- This assembler allows two `.using' directives to be simultaneously
-- outstanding, one in the `.text' section, and one in another section
-- (typically, the `.data' section). This feature allows dynamically
-- loaded objects to be implemented in a relatively straightforward
-- way. A `.using' directive must always be specified in the `.text'
-- section; this will specify the base register that will be used for
-- branches in the `.text' section. A second `.using' may be
-- specified in another section; this will specify the base register
-- that is used for non-label address literals. When a second
-- `.using' is specified, then the subsequent `.ltorg' must be put in
-- the same section; otherwise an error will result.
--
-- Thus, for example, the following code uses `r3' to address branch
-- targets and `r4' to address the literal pool, which has been
-- written to the `.data' section. The is, the constants
-- `=A(some_routine)', `=H'42'' and `=E'3.1416'' will all appear in
-- the `.data' section.
--
-- .data
-- .using LITPOOL,r4
-- .text
-- BASR r3,0
-- .using *,r3
-- B START
-- .long LITPOOL
-- START:
-- L r4,4(,r3)
-- L r15,=A(some_routine)
-- LTR r15,r15
-- BNE LABEL
-- AH r0,=H'42'
-- LABEL:
-- ME r6,=E'3.1416'
-- .data
-- LITPOOL:
-- .ltorg
--
-- Note that this dual-`.using' directive semantics extends and is
-- not compatible with HLASM semantics. Note that this assembler
-- directive does not support the full range of HLASM semantics.
--
--
--
--File: as.info, Node: ESA/390 Opcodes, Prev: ESA/390 Directives, Up: ESA/390-Dependent
--
--9.14.6 Opcodes
----------------
--
--For detailed information on the ESA/390 machine instruction set, see
--`ESA/390 Principles of Operation' (IBM Publication Number DZ9AR004).
--
--
--File: as.info, Node: i386-Dependent, Next: i860-Dependent, Prev: ESA/390-Dependent, Up: Machine Dependencies
--
--9.15 80386 Dependent Features
--=============================
--
-- The i386 version `as' supports both the original Intel 386
--architecture in both 16 and 32-bit mode as well as AMD x86-64
--architecture extending the Intel architecture to 64-bits.
--
--* Menu:
--
--* i386-Options:: Options
--* i386-Directives:: X86 specific directives
--* i386-Syntax:: Syntactical considerations
--* i386-Mnemonics:: Instruction Naming
--* i386-Regs:: Register Naming
--* i386-Prefixes:: Instruction Prefixes
--* i386-Memory:: Memory References
--* i386-Jumps:: Handling of Jump Instructions
--* i386-Float:: Floating Point
--* i386-SIMD:: Intel's MMX and AMD's 3DNow! SIMD Operations
--* i386-LWP:: AMD's Lightweight Profiling Instructions
--* i386-BMI:: Bit Manipulation Instruction
--* i386-TBM:: AMD's Trailing Bit Manipulation Instructions
--* i386-16bit:: Writing 16-bit Code
--* i386-Arch:: Specifying an x86 CPU architecture
--* i386-Bugs:: AT&T Syntax bugs
--* i386-Notes:: Notes
--
--
--File: as.info, Node: i386-Options, Next: i386-Directives, Up: i386-Dependent
--
--9.15.1 Options
----------------
--
--The i386 version of `as' has a few machine dependent options:
--
--`--32 | --x32 | --64'
-- Select the word size, either 32 bits or 64 bits. `--32' implies
-- Intel i386 architecture, while `--x32' and `--64' imply AMD x86-64
-- architecture with 32-bit or 64-bit word-size respectively.
--
-- These options are only available with the ELF object file format,
-- and require that the necessary BFD support has been included (on a
-- 32-bit platform you have to add -enable-64-bit-bfd to configure
-- enable 64-bit usage and use x86-64 as target platform).
--
--`-n'
-- By default, x86 GAS replaces multiple nop instructions used for
-- alignment within code sections with multi-byte nop instructions
-- such as leal 0(%esi,1),%esi. This switch disables the
-- optimization.
--
--`--divide'
-- On SVR4-derived platforms, the character `/' is treated as a
-- comment character, which means that it cannot be used in
-- expressions. The `--divide' option turns `/' into a normal
-- character. This does not disable `/' at the beginning of a line
-- starting a comment, or affect using `#' for starting a comment.
--
--`-march=CPU[+EXTENSION...]'
-- This option specifies the target processor. The assembler will
-- issue an error message if an attempt is made to assemble an
-- instruction which will not execute on the target processor. The
-- following processor names are recognized: `i8086', `i186', `i286',
-- `i386', `i486', `i586', `i686', `pentium', `pentiumpro',
-- `pentiumii', `pentiumiii', `pentium4', `prescott', `nocona',
-- `core', `core2', `corei7', `l1om', `k1om', `k6', `k6_2', `athlon',
-- `opteron', `k8', `amdfam10', `bdver1', `bdver2', `bdver3',
-- `btver1', `btver2', `generic32' and `generic64'.
--
-- In addition to the basic instruction set, the assembler can be
-- told to accept various extension mnemonics. For example,
-- `-march=i686+sse4+vmx' extends I686 with SSE4 and VMX. The
-- following extensions are currently supported: `8087', `287', `387',
-- `no87', `mmx', `nommx', `sse', `sse2', `sse3', `ssse3', `sse4.1',
-- `sse4.2', `sse4', `nosse', `avx', `avx2', `adx', `rdseed',
-- `prfchw', `smap', `mpx', `sha', `avx512f', `avx512cd', `avx512er',
-- `avx512pf', `noavx', `vmx', `vmfunc', `smx', `xsave', `xsaveopt',
-- `aes', `pclmul', `fsgsbase', `rdrnd', `f16c', `bmi2', `fma',
-- `movbe', `ept', `lzcnt', `hle', `rtm', `invpcid', `clflush', `lwp',
-- `fma4', `xop', `cx16', `syscall', `rdtscp', `3dnow', `3dnowa',
-- `sse4a', `sse5', `svme', `abm' and `padlock'. Note that rather
-- than extending a basic instruction set, the extension mnemonics
-- starting with `no' revoke the respective functionality.
--
-- When the `.arch' directive is used with `-march', the `.arch'
-- directive will take precedent.
--
--`-mtune=CPU'
-- This option specifies a processor to optimize for. When used in
-- conjunction with the `-march' option, only instructions of the
-- processor specified by the `-march' option will be generated.
--
-- Valid CPU values are identical to the processor list of
-- `-march=CPU'.
--
--`-msse2avx'
-- This option specifies that the assembler should encode SSE
-- instructions with VEX prefix.
--
--`-msse-check=NONE'
--`-msse-check=WARNING'
--`-msse-check=ERROR'
-- These options control if the assembler should check SSE
-- instructions. `-msse-check=NONE' will make the assembler not to
-- check SSE instructions, which is the default.
-- `-msse-check=WARNING' will make the assembler issue a warning for
-- any SSE instruction. `-msse-check=ERROR' will make the assembler
-- issue an error for any SSE instruction.
--
--`-mavxscalar=128'
--`-mavxscalar=256'
-- These options control how the assembler should encode scalar AVX
-- instructions. `-mavxscalar=128' will encode scalar AVX
-- instructions with 128bit vector length, which is the default.
-- `-mavxscalar=256' will encode scalar AVX instructions with 256bit
-- vector length.
--
--`-mevexlig=128'
--`-mevexlig=256'
--`-mevexlig=512'
-- These options control how the assembler should encode
-- length-ignored (LIG) EVEX instructions. `-mevexlig=128' will
-- encode LIG EVEX instructions with 128bit vector length, which is
-- the default. `-mevexlig=256' and `-mevexlig=512' will encode LIG
-- EVEX instructions with 256bit and 512bit vector length,
-- respectively.
--
--`-mevexwig=0'
--`-mevexwig=1'
-- These options control how the assembler should encode w-ignored
-- (WIG) EVEX instructions. `-mevexwig=0' will encode WIG EVEX
-- instructions with evex.w = 0, which is the default. `-mevexwig=1'
-- will encode WIG EVEX instructions with evex.w = 1.
--
--`-mmnemonic=ATT'
--`-mmnemonic=INTEL'
-- This option specifies instruction mnemonic for matching
-- instructions. The `.att_mnemonic' and `.intel_mnemonic'
-- directives will take precedent.
--
--`-msyntax=ATT'
--`-msyntax=INTEL'
-- This option specifies instruction syntax when processing
-- instructions. The `.att_syntax' and `.intel_syntax' directives
-- will take precedent.
--
--`-mnaked-reg'
-- This opetion specifies that registers don't require a `%' prefix.
-- The `.att_syntax' and `.intel_syntax' directives will take
-- precedent.
--
--`-madd-bnd-prefix'
-- This option forces the assembler to add BND prefix to all
-- branches, even if such prefix was not explicitly specified in the
-- source code.
--
--
--
--File: as.info, Node: i386-Directives, Next: i386-Syntax, Prev: i386-Options, Up: i386-Dependent
--
--9.15.2 x86 specific Directives
--------------------------------
--
--`.lcomm SYMBOL , LENGTH[, ALIGNMENT]'
-- Reserve LENGTH (an absolute expression) bytes for a local common
-- denoted by SYMBOL. The section and value of SYMBOL are those of
-- the new local common. The addresses are allocated in the bss
-- section, so that at run-time the bytes start off zeroed. Since
-- SYMBOL is not declared global, it is normally not visible to `ld'.
-- The optional third parameter, ALIGNMENT, specifies the desired
-- alignment of the symbol in the bss section.
--
-- This directive is only available for COFF based x86 targets.
--
--
--
--File: as.info, Node: i386-Syntax, Next: i386-Mnemonics, Prev: i386-Directives, Up: i386-Dependent
--
--9.15.3 i386 Syntactical Considerations
----------------------------------------
--
--* Menu:
--
--* i386-Variations:: AT&T Syntax versus Intel Syntax
--* i386-Chars:: Special Characters
--
--
--File: as.info, Node: i386-Variations, Next: i386-Chars, Up: i386-Syntax
--
--9.15.3.1 AT&T Syntax versus Intel Syntax
--........................................
--
--`as' now supports assembly using Intel assembler syntax.
--`.intel_syntax' selects Intel mode, and `.att_syntax' switches back to
--the usual AT&T mode for compatibility with the output of `gcc'. Either
--of these directives may have an optional argument, `prefix', or
--`noprefix' specifying whether registers require a `%' prefix. AT&T
--System V/386 assembler syntax is quite different from Intel syntax. We
--mention these differences because almost all 80386 documents use Intel
--syntax. Notable differences between the two syntaxes are:
--
-- * AT&T immediate operands are preceded by `$'; Intel immediate
-- operands are undelimited (Intel `push 4' is AT&T `pushl $4').
-- AT&T register operands are preceded by `%'; Intel register operands
-- are undelimited. AT&T absolute (as opposed to PC relative)
-- jump/call operands are prefixed by `*'; they are undelimited in
-- Intel syntax.
--
-- * AT&T and Intel syntax use the opposite order for source and
-- destination operands. Intel `add eax, 4' is `addl $4, %eax'. The
-- `source, dest' convention is maintained for compatibility with
-- previous Unix assemblers. Note that `bound', `invlpga', and
-- instructions with 2 immediate operands, such as the `enter'
-- instruction, do _not_ have reversed order. *Note i386-Bugs::.
--
-- * In AT&T syntax the size of memory operands is determined from the
-- last character of the instruction mnemonic. Mnemonic suffixes of
-- `b', `w', `l' and `q' specify byte (8-bit), word (16-bit), long
-- (32-bit) and quadruple word (64-bit) memory references. Intel
-- syntax accomplishes this by prefixing memory operands (_not_ the
-- instruction mnemonics) with `byte ptr', `word ptr', `dword ptr'
-- and `qword ptr'. Thus, Intel `mov al, byte ptr FOO' is `movb FOO,
-- %al' in AT&T syntax.
--
-- In 64-bit code, `movabs' can be used to encode the `mov'
-- instruction with the 64-bit displacement or immediate operand.
--
-- * Immediate form long jumps and calls are `lcall/ljmp $SECTION,
-- $OFFSET' in AT&T syntax; the Intel syntax is `call/jmp far
-- SECTION:OFFSET'. Also, the far return instruction is `lret
-- $STACK-ADJUST' in AT&T syntax; Intel syntax is `ret far
-- STACK-ADJUST'.
--
-- * The AT&T assembler does not provide support for multiple section
-- programs. Unix style systems expect all programs to be single
-- sections.
--
--
--File: as.info, Node: i386-Chars, Prev: i386-Variations, Up: i386-Syntax
--
--9.15.3.2 Special Characters
--...........................
--
--The presence of a `#' appearing anywhere on a line indicates the start
--of a comment that extends to the end of that line.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line can also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- If the `--divide' command line option has not been specified then
--the `/' character appearing anywhere on a line also introduces a line
--comment.
--
-- The `;' character can be used to separate statements on the same
--line.
--
--
--File: as.info, Node: i386-Mnemonics, Next: i386-Regs, Prev: i386-Syntax, Up: i386-Dependent
--
--9.15.4 Instruction Naming
---------------------------
--
--Instruction mnemonics are suffixed with one character modifiers which
--specify the size of operands. The letters `b', `w', `l' and `q'
--specify byte, word, long and quadruple word operands. If no suffix is
--specified by an instruction then `as' tries to fill in the missing
--suffix based on the destination register operand (the last one by
--convention). Thus, `mov %ax, %bx' is equivalent to `movw %ax, %bx';
--also, `mov $1, %bx' is equivalent to `movw $1, bx'. Note that this is
--incompatible with the AT&T Unix assembler which assumes that a missing
--mnemonic suffix implies long operand size. (This incompatibility does
--not affect compiler output since compilers always explicitly specify
--the mnemonic suffix.)
--
-- Almost all instructions have the same names in AT&T and Intel format.
--There are a few exceptions. The sign extend and zero extend
--instructions need two sizes to specify them. They need a size to
--sign/zero extend _from_ and a size to zero extend _to_. This is
--accomplished by using two instruction mnemonic suffixes in AT&T syntax.
--Base names for sign extend and zero extend are `movs...' and `movz...'
--in AT&T syntax (`movsx' and `movzx' in Intel syntax). The instruction
--mnemonic suffixes are tacked on to this base name, the _from_ suffix
--before the _to_ suffix. Thus, `movsbl %al, %edx' is AT&T syntax for
--"move sign extend _from_ %al _to_ %edx." Possible suffixes, thus, are
--`bl' (from byte to long), `bw' (from byte to word), `wl' (from word to
--long), `bq' (from byte to quadruple word), `wq' (from word to quadruple
--word), and `lq' (from long to quadruple word).
--
-- Different encoding options can be specified via optional mnemonic
--suffix. `.s' suffix swaps 2 register operands in encoding when moving
--from one register to another. `.d8' or `.d32' suffix prefers 8bit or
--32bit displacement in encoding.
--
-- The Intel-syntax conversion instructions
--
-- * `cbw' -- sign-extend byte in `%al' to word in `%ax',
--
-- * `cwde' -- sign-extend word in `%ax' to long in `%eax',
--
-- * `cwd' -- sign-extend word in `%ax' to long in `%dx:%ax',
--
-- * `cdq' -- sign-extend dword in `%eax' to quad in `%edx:%eax',
--
-- * `cdqe' -- sign-extend dword in `%eax' to quad in `%rax' (x86-64
-- only),
--
-- * `cqo' -- sign-extend quad in `%rax' to octuple in `%rdx:%rax'
-- (x86-64 only),
--
--are called `cbtw', `cwtl', `cwtd', `cltd', `cltq', and `cqto' in AT&T
--naming. `as' accepts either naming for these instructions.
--
-- Far call/jump instructions are `lcall' and `ljmp' in AT&T syntax,
--but are `call far' and `jump far' in Intel convention.
--
--9.15.5 AT&T Mnemonic versus Intel Mnemonic
--------------------------------------------
--
--`as' supports assembly using Intel mnemonic. `.intel_mnemonic' selects
--Intel mnemonic with Intel syntax, and `.att_mnemonic' switches back to
--the usual AT&T mnemonic with AT&T syntax for compatibility with the
--output of `gcc'. Several x87 instructions, `fadd', `fdiv', `fdivp',
--`fdivr', `fdivrp', `fmul', `fsub', `fsubp', `fsubr' and `fsubrp', are
--implemented in AT&T System V/386 assembler with different mnemonics
--from those in Intel IA32 specification. `gcc' generates those
--instructions with AT&T mnemonic.
--
--
--File: as.info, Node: i386-Regs, Next: i386-Prefixes, Prev: i386-Mnemonics, Up: i386-Dependent
--
--9.15.6 Register Naming
------------------------
--
--Register operands are always prefixed with `%'. The 80386 registers
--consist of
--
-- * the 8 32-bit registers `%eax' (the accumulator), `%ebx', `%ecx',
-- `%edx', `%edi', `%esi', `%ebp' (the frame pointer), and `%esp'
-- (the stack pointer).
--
-- * the 8 16-bit low-ends of these: `%ax', `%bx', `%cx', `%dx', `%di',
-- `%si', `%bp', and `%sp'.
--
-- * the 8 8-bit registers: `%ah', `%al', `%bh', `%bl', `%ch', `%cl',
-- `%dh', and `%dl' (These are the high-bytes and low-bytes of `%ax',
-- `%bx', `%cx', and `%dx')
--
-- * the 6 section registers `%cs' (code section), `%ds' (data
-- section), `%ss' (stack section), `%es', `%fs', and `%gs'.
--
-- * the 3 processor control registers `%cr0', `%cr2', and `%cr3'.
--
-- * the 6 debug registers `%db0', `%db1', `%db2', `%db3', `%db6', and
-- `%db7'.
--
-- * the 2 test registers `%tr6' and `%tr7'.
--
-- * the 8 floating point register stack `%st' or equivalently
-- `%st(0)', `%st(1)', `%st(2)', `%st(3)', `%st(4)', `%st(5)',
-- `%st(6)', and `%st(7)'. These registers are overloaded by 8 MMX
-- registers `%mm0', `%mm1', `%mm2', `%mm3', `%mm4', `%mm5', `%mm6'
-- and `%mm7'.
--
-- * the 8 SSE registers registers `%xmm0', `%xmm1', `%xmm2', `%xmm3',
-- `%xmm4', `%xmm5', `%xmm6' and `%xmm7'.
--
-- The AMD x86-64 architecture extends the register set by:
--
-- * enhancing the 8 32-bit registers to 64-bit: `%rax' (the
-- accumulator), `%rbx', `%rcx', `%rdx', `%rdi', `%rsi', `%rbp' (the
-- frame pointer), `%rsp' (the stack pointer)
--
-- * the 8 extended registers `%r8'-`%r15'.
--
-- * the 8 32-bit low ends of the extended registers: `%r8d'-`%r15d'
--
-- * the 8 16-bit low ends of the extended registers: `%r8w'-`%r15w'
--
-- * the 8 8-bit low ends of the extended registers: `%r8b'-`%r15b'
--
-- * the 4 8-bit registers: `%sil', `%dil', `%bpl', `%spl'.
--
-- * the 8 debug registers: `%db8'-`%db15'.
--
-- * the 8 SSE registers: `%xmm8'-`%xmm15'.
--
--
--File: as.info, Node: i386-Prefixes, Next: i386-Memory, Prev: i386-Regs, Up: i386-Dependent
--
--9.15.7 Instruction Prefixes
-----------------------------
--
--Instruction prefixes are used to modify the following instruction. They
--are used to repeat string instructions, to provide section overrides, to
--perform bus lock operations, and to change operand and address sizes.
--(Most instructions that normally operate on 32-bit operands will use
--16-bit operands if the instruction has an "operand size" prefix.)
--Instruction prefixes are best written on the same line as the
--instruction they act upon. For example, the `scas' (scan string)
--instruction is repeated with:
--
-- repne scas %es:(%edi),%al
--
-- You may also place prefixes on the lines immediately preceding the
--instruction, but this circumvents checks that `as' does with prefixes,
--and will not work with all prefixes.
--
-- Here is a list of instruction prefixes:
--
-- * Section override prefixes `cs', `ds', `ss', `es', `fs', `gs'.
-- These are automatically added by specifying using the
-- SECTION:MEMORY-OPERAND form for memory references.
--
-- * Operand/Address size prefixes `data16' and `addr16' change 32-bit
-- operands/addresses into 16-bit operands/addresses, while `data32'
-- and `addr32' change 16-bit ones (in a `.code16' section) into
-- 32-bit operands/addresses. These prefixes _must_ appear on the
-- same line of code as the instruction they modify. For example, in
-- a 16-bit `.code16' section, you might write:
--
-- addr32 jmpl *(%ebx)
--
-- * The bus lock prefix `lock' inhibits interrupts during execution of
-- the instruction it precedes. (This is only valid with certain
-- instructions; see a 80386 manual for details).
--
-- * The wait for coprocessor prefix `wait' waits for the coprocessor to
-- complete the current instruction. This should never be needed for
-- the 80386/80387 combination.
--
-- * The `rep', `repe', and `repne' prefixes are added to string
-- instructions to make them repeat `%ecx' times (`%cx' times if the
-- current address size is 16-bits).
--
-- * The `rex' family of prefixes is used by x86-64 to encode
-- extensions to i386 instruction set. The `rex' prefix has four
-- bits -- an operand size overwrite (`64') used to change operand
-- size from 32-bit to 64-bit and X, Y and Z extensions bits used to
-- extend the register set.
--
-- You may write the `rex' prefixes directly. The `rex64xyz'
-- instruction emits `rex' prefix with all the bits set. By omitting
-- the `64', `x', `y' or `z' you may write other prefixes as well.
-- Normally, there is no need to write the prefixes explicitly, since
-- gas will automatically generate them based on the instruction
-- operands.
--
--
--File: as.info, Node: i386-Memory, Next: i386-Jumps, Prev: i386-Prefixes, Up: i386-Dependent
--
--9.15.8 Memory References
--------------------------
--
--An Intel syntax indirect memory reference of the form
--
-- SECTION:[BASE + INDEX*SCALE + DISP]
--
--is translated into the AT&T syntax
--
-- SECTION:DISP(BASE, INDEX, SCALE)
--
--where BASE and INDEX are the optional 32-bit base and index registers,
--DISP is the optional displacement, and SCALE, taking the values 1, 2,
--4, and 8, multiplies INDEX to calculate the address of the operand. If
--no SCALE is specified, SCALE is taken to be 1. SECTION specifies the
--optional section register for the memory operand, and may override the
--default section register (see a 80386 manual for section register
--defaults). Note that section overrides in AT&T syntax _must_ be
--preceded by a `%'. If you specify a section override which coincides
--with the default section register, `as' does _not_ output any section
--register override prefixes to assemble the given instruction. Thus,
--section overrides can be specified to emphasize which section register
--is used for a given memory operand.
--
-- Here are some examples of Intel and AT&T style memory references:
--
--AT&T: `-4(%ebp)', Intel: `[ebp - 4]'
-- BASE is `%ebp'; DISP is `-4'. SECTION is missing, and the default
-- section is used (`%ss' for addressing with `%ebp' as the base
-- register). INDEX, SCALE are both missing.
--
--AT&T: `foo(,%eax,4)', Intel: `[foo + eax*4]'
-- INDEX is `%eax' (scaled by a SCALE 4); DISP is `foo'. All other
-- fields are missing. The section register here defaults to `%ds'.
--
--AT&T: `foo(,1)'; Intel `[foo]'
-- This uses the value pointed to by `foo' as a memory operand. Note
-- that BASE and INDEX are both missing, but there is only _one_ `,'.
-- This is a syntactic exception.
--
--AT&T: `%gs:foo'; Intel `gs:foo'
-- This selects the contents of the variable `foo' with section
-- register SECTION being `%gs'.
--
-- Absolute (as opposed to PC relative) call and jump operands must be
--prefixed with `*'. If no `*' is specified, `as' always chooses PC
--relative addressing for jump/call labels.
--
-- Any instruction that has a memory operand, but no register operand,
--_must_ specify its size (byte, word, long, or quadruple) with an
--instruction mnemonic suffix (`b', `w', `l' or `q', respectively).
--
-- The x86-64 architecture adds an RIP (instruction pointer relative)
--addressing. This addressing mode is specified by using `rip' as a base
--register. Only constant offsets are valid. For example:
--
--AT&T: `1234(%rip)', Intel: `[rip + 1234]'
-- Points to the address 1234 bytes past the end of the current
-- instruction.
--
--AT&T: `symbol(%rip)', Intel: `[rip + symbol]'
-- Points to the `symbol' in RIP relative way, this is shorter than
-- the default absolute addressing.
--
-- Other addressing modes remain unchanged in x86-64 architecture,
--except registers used are 64-bit instead of 32-bit.
--
--
--File: as.info, Node: i386-Jumps, Next: i386-Float, Prev: i386-Memory, Up: i386-Dependent
--
--9.15.9 Handling of Jump Instructions
--------------------------------------
--
--Jump instructions are always optimized to use the smallest possible
--displacements. This is accomplished by using byte (8-bit) displacement
--jumps whenever the target is sufficiently close. If a byte displacement
--is insufficient a long displacement is used. We do not support word
--(16-bit) displacement jumps in 32-bit mode (i.e. prefixing the jump
--instruction with the `data16' instruction prefix), since the 80386
--insists upon masking `%eip' to 16 bits after the word displacement is
--added. (See also *note i386-Arch::)
--
-- Note that the `jcxz', `jecxz', `loop', `loopz', `loope', `loopnz'
--and `loopne' instructions only come in byte displacements, so that if
--you use these instructions (`gcc' does not use them) you may get an
--error message (and incorrect code). The AT&T 80386 assembler tries to
--get around this problem by expanding `jcxz foo' to
--
-- jcxz cx_zero
-- jmp cx_nonzero
-- cx_zero: jmp foo
-- cx_nonzero:
--
--
--File: as.info, Node: i386-Float, Next: i386-SIMD, Prev: i386-Jumps, Up: i386-Dependent
--
--9.15.10 Floating Point
------------------------
--
--All 80387 floating point types except packed BCD are supported. (BCD
--support may be added without much difficulty). These data types are
--16-, 32-, and 64- bit integers, and single (32-bit), double (64-bit),
--and extended (80-bit) precision floating point. Each supported type
--has an instruction mnemonic suffix and a constructor associated with
--it. Instruction mnemonic suffixes specify the operand's data type.
--Constructors build these data types into memory.
--
-- * Floating point constructors are `.float' or `.single', `.double',
-- and `.tfloat' for 32-, 64-, and 80-bit formats. These correspond
-- to instruction mnemonic suffixes `s', `l', and `t'. `t' stands for
-- 80-bit (ten byte) real. The 80387 only supports this format via
-- the `fldt' (load 80-bit real to stack top) and `fstpt' (store
-- 80-bit real and pop stack) instructions.
--
-- * Integer constructors are `.word', `.long' or `.int', and `.quad'
-- for the 16-, 32-, and 64-bit integer formats. The corresponding
-- instruction mnemonic suffixes are `s' (single), `l' (long), and
-- `q' (quad). As with the 80-bit real format, the 64-bit `q' format
-- is only present in the `fildq' (load quad integer to stack top)
-- and `fistpq' (store quad integer and pop stack) instructions.
--
-- Register to register operations should not use instruction mnemonic
--suffixes. `fstl %st, %st(1)' will give a warning, and be assembled as
--if you wrote `fst %st, %st(1)', since all register to register
--operations use 80-bit floating point operands. (Contrast this with
--`fstl %st, mem', which converts `%st' from 80-bit to 64-bit floating
--point format, then stores the result in the 4 byte location `mem')
--
--
--File: as.info, Node: i386-SIMD, Next: i386-LWP, Prev: i386-Float, Up: i386-Dependent
--
--9.15.11 Intel's MMX and AMD's 3DNow! SIMD Operations
------------------------------------------------------
--
--`as' supports Intel's MMX instruction set (SIMD instructions for
--integer data), available on Intel's Pentium MMX processors and Pentium
--II processors, AMD's K6 and K6-2 processors, Cyrix' M2 processor, and
--probably others. It also supports AMD's 3DNow! instruction set (SIMD
--instructions for 32-bit floating point data) available on AMD's K6-2
--processor and possibly others in the future.
--
-- Currently, `as' does not support Intel's floating point SIMD, Katmai
--(KNI).
--
-- The eight 64-bit MMX operands, also used by 3DNow!, are called
--`%mm0', `%mm1', ... `%mm7'. They contain eight 8-bit integers, four
--16-bit integers, two 32-bit integers, one 64-bit integer, or two 32-bit
--floating point values. The MMX registers cannot be used at the same
--time as the floating point stack.
--
-- See Intel and AMD documentation, keeping in mind that the operand
--order in instructions is reversed from the Intel syntax.
--
--
--File: as.info, Node: i386-LWP, Next: i386-BMI, Prev: i386-SIMD, Up: i386-Dependent
--
--9.15.12 AMD's Lightweight Profiling Instructions
--------------------------------------------------
--
--`as' supports AMD's Lightweight Profiling (LWP) instruction set,
--available on AMD's Family 15h (Orochi) processors.
--
-- LWP enables applications to collect and manage performance data, and
--react to performance events. The collection of performance data
--requires no context switches. LWP runs in the context of a thread and
--so several counters can be used independently across multiple threads.
--LWP can be used in both 64-bit and legacy 32-bit modes.
--
-- For detailed information on the LWP instruction set, see the `AMD
--Lightweight Profiling Specification' available at Lightweight Profiling
--Specification (http://developer.amd.com/cpu/LWP).
--
--
--File: as.info, Node: i386-BMI, Next: i386-TBM, Prev: i386-LWP, Up: i386-Dependent
--
--9.15.13 Bit Manipulation Instructions
---------------------------------------
--
--`as' supports the Bit Manipulation (BMI) instruction set.
--
-- BMI instructions provide several instructions implementing individual
--bit manipulation operations such as isolation, masking, setting, or
--resetting.
--
--
--File: as.info, Node: i386-TBM, Next: i386-16bit, Prev: i386-BMI, Up: i386-Dependent
--
--9.15.14 AMD's Trailing Bit Manipulation Instructions
------------------------------------------------------
--
--`as' supports AMD's Trailing Bit Manipulation (TBM) instruction set,
--available on AMD's BDVER2 processors (Trinity and Viperfish).
--
-- TBM instructions provide instructions implementing individual bit
--manipulation operations such as isolating, masking, setting, resetting,
--complementing, and operations on trailing zeros and ones.
--
--
--File: as.info, Node: i386-16bit, Next: i386-Arch, Prev: i386-TBM, Up: i386-Dependent
--
--9.15.15 Writing 16-bit Code
-----------------------------
--
--While `as' normally writes only "pure" 32-bit i386 code or 64-bit
--x86-64 code depending on the default configuration, it also supports
--writing code to run in real mode or in 16-bit protected mode code
--segments. To do this, put a `.code16' or `.code16gcc' directive before
--the assembly language instructions to be run in 16-bit mode. You can
--switch `as' to writing 32-bit code with the `.code32' directive or
--64-bit code with the `.code64' directive.
--
-- `.code16gcc' provides experimental support for generating 16-bit
--code from gcc, and differs from `.code16' in that `call', `ret',
--`enter', `leave', `push', `pop', `pusha', `popa', `pushf', and `popf'
--instructions default to 32-bit size. This is so that the stack pointer
--is manipulated in the same way over function calls, allowing access to
--function parameters at the same stack offsets as in 32-bit mode.
--`.code16gcc' also automatically adds address size prefixes where
--necessary to use the 32-bit addressing modes that gcc generates.
--
-- The code which `as' generates in 16-bit mode will not necessarily
--run on a 16-bit pre-80386 processor. To write code that runs on such a
--processor, you must refrain from using _any_ 32-bit constructs which
--require `as' to output address or operand size prefixes.
--
-- Note that writing 16-bit code instructions by explicitly specifying a
--prefix or an instruction mnemonic suffix within a 32-bit code section
--generates different machine instructions than those generated for a
--16-bit code segment. In a 32-bit code section, the following code
--generates the machine opcode bytes `66 6a 04', which pushes the value
--`4' onto the stack, decrementing `%esp' by 2.
--
-- pushw $4
--
-- The same code in a 16-bit code section would generate the machine
--opcode bytes `6a 04' (i.e., without the operand size prefix), which is
--correct since the processor default operand size is assumed to be 16
--bits in a 16-bit code section.
--
--
--File: as.info, Node: i386-Bugs, Next: i386-Notes, Prev: i386-Arch, Up: i386-Dependent
--
--9.15.16 AT&T Syntax bugs
--------------------------
--
--The UnixWare assembler, and probably other AT&T derived ix86 Unix
--assemblers, generate floating point instructions with reversed source
--and destination registers in certain cases. Unfortunately, gcc and
--possibly many other programs use this reversed syntax, so we're stuck
--with it.
--
-- For example
--
-- fsub %st,%st(3)
-- results in `%st(3)' being updated to `%st - %st(3)' rather than the
--expected `%st(3) - %st'. This happens with all the non-commutative
--arithmetic floating point operations with two register operands where
--the source register is `%st' and the destination register is `%st(i)'.
--
--
--File: as.info, Node: i386-Arch, Next: i386-Bugs, Prev: i386-16bit, Up: i386-Dependent
--
--9.15.17 Specifying CPU Architecture
-------------------------------------
--
--`as' may be told to assemble for a particular CPU (sub-)architecture
--with the `.arch CPU_TYPE' directive. This directive enables a warning
--when gas detects an instruction that is not supported on the CPU
--specified. The choices for CPU_TYPE are:
--
--`i8086' `i186' `i286' `i386'
--`i486' `i586' `i686' `pentium'
--`pentiumpro' `pentiumii' `pentiumiii' `pentium4'
--`prescott' `nocona' `core' `core2'
--`corei7' `l1om' `k1om'
--`k6' `k6_2' `athlon' `k8'
--`amdfam10' `bdver1' `bdver2' `bdver3'
--`btver1' `btver2'
--`generic32' `generic64'
--`.mmx' `.sse' `.sse2' `.sse3'
--`.ssse3' `.sse4.1' `.sse4.2' `.sse4'
--`.avx' `.vmx' `.smx' `.ept'
--`.clflush' `.movbe' `.xsave' `.xsaveopt'
--`.aes' `.pclmul' `.fma' `.fsgsbase'
--`.rdrnd' `.f16c' `.avx2' `.bmi2'
--`.lzcnt' `.invpcid' `.vmfunc' `.hle'
--`.rtm' `.adx' `.rdseed' `.prfchw'
--`.smap' `.mpx'
--`.smap' `.sha'
--`.3dnow' `.3dnowa' `.sse4a' `.sse5'
--`.syscall' `.rdtscp' `.svme' `.abm'
--`.lwp' `.fma4' `.xop' `.cx16'
--`.padlock'
--`.smap' `.avx512f' `.avx512cd' `.avx512er'
--`.avx512pf' `.3dnow' `.3dnowa' `.sse4a'
--`.sse5' `.syscall' `.rdtscp' `.svme'
--`.abm' `.lwp' `.fma4' `.xop'
--`.cx16' `.padlock'
--
-- Apart from the warning, there are only two other effects on `as'
--operation; Firstly, if you specify a CPU other than `i486', then shift
--by one instructions such as `sarl $1, %eax' will automatically use a
--two byte opcode sequence. The larger three byte opcode sequence is
--used on the 486 (and when no architecture is specified) because it
--executes faster on the 486. Note that you can explicitly request the
--two byte opcode by writing `sarl %eax'. Secondly, if you specify
--`i8086', `i186', or `i286', _and_ `.code16' or `.code16gcc' then byte
--offset conditional jumps will be promoted when necessary to a two
--instruction sequence consisting of a conditional jump of the opposite
--sense around an unconditional jump to the target.
--
-- Following the CPU architecture (but not a sub-architecture, which
--are those starting with a dot), you may specify `jumps' or `nojumps' to
--control automatic promotion of conditional jumps. `jumps' is the
--default, and enables jump promotion; All external jumps will be of the
--long variety, and file-local jumps will be promoted as necessary.
--(*note i386-Jumps::) `nojumps' leaves external conditional jumps as
--byte offset jumps, and warns about file-local conditional jumps that
--`as' promotes. Unconditional jumps are treated as for `jumps'.
--
-- For example
--
-- .arch i8086,nojumps
--
--
--File: as.info, Node: i386-Notes, Prev: i386-Bugs, Up: i386-Dependent
--
--9.15.18 Notes
---------------
--
--There is some trickery concerning the `mul' and `imul' instructions
--that deserves mention. The 16-, 32-, 64- and 128-bit expanding
--multiplies (base opcode `0xf6'; extension 4 for `mul' and 5 for `imul')
--can be output only in the one operand form. Thus, `imul %ebx, %eax'
--does _not_ select the expanding multiply; the expanding multiply would
--clobber the `%edx' register, and this would confuse `gcc' output. Use
--`imul %ebx' to get the 64-bit product in `%edx:%eax'.
--
-- We have added a two operand form of `imul' when the first operand is
--an immediate mode expression and the second operand is a register.
--This is just a shorthand, so that, multiplying `%eax' by 69, for
--example, can be done with `imul $69, %eax' rather than `imul $69, %eax,
--%eax'.
--
--
--File: as.info, Node: i860-Dependent, Next: i960-Dependent, Prev: i386-Dependent, Up: Machine Dependencies
--
--9.16 Intel i860 Dependent Features
--==================================
--
--* Menu:
--
--* Notes-i860:: i860 Notes
--* Options-i860:: i860 Command-line Options
--* Directives-i860:: i860 Machine Directives
--* Opcodes for i860:: i860 Opcodes
--* Syntax of i860:: i860 Syntax
--
--
--File: as.info, Node: Notes-i860, Next: Options-i860, Up: i860-Dependent
--
--9.16.1 i860 Notes
-------------------
--
--This is a fairly complete i860 assembler which is compatible with the
--UNIX System V/860 Release 4 assembler. However, it does not currently
--support SVR4 PIC (i.e., `@GOT, @GOTOFF, @PLT').
--
-- Like the SVR4/860 assembler, the output object format is ELF32.
--Currently, this is the only supported object format. If there is
--sufficient interest, other formats such as COFF may be implemented.
--
-- Both the Intel and AT&T/SVR4 syntaxes are supported, with the latter
--being the default. One difference is that AT&T syntax requires the '%'
--prefix on register names while Intel syntax does not. Another
--difference is in the specification of relocatable expressions. The
--Intel syntax is `ha%expression' whereas the SVR4 syntax is
--`[expression]@ha' (and similarly for the "l" and "h" selectors).
--
--
--File: as.info, Node: Options-i860, Next: Directives-i860, Prev: Notes-i860, Up: i860-Dependent
--
--9.16.2 i860 Command-line Options
----------------------------------
--
--9.16.2.1 SVR4 compatibility options
--...................................
--
--`-V'
-- Print assembler version.
--
--`-Qy'
-- Ignored.
--
--`-Qn'
-- Ignored.
--
--9.16.2.2 Other options
--......................
--
--`-EL'
-- Select little endian output (this is the default).
--
--`-EB'
-- Select big endian output. Note that the i860 always reads
-- instructions as little endian data, so this option only effects
-- data and not instructions.
--
--`-mwarn-expand'
-- Emit a warning message if any pseudo-instruction expansions
-- occurred. For example, a `or' instruction with an immediate
-- larger than 16-bits will be expanded into two instructions. This
-- is a very undesirable feature to rely on, so this flag can help
-- detect any code where it happens. One use of it, for instance, has
-- been to find and eliminate any place where `gcc' may emit these
-- pseudo-instructions.
--
--`-mxp'
-- Enable support for the i860XP instructions and control registers.
-- By default, this option is disabled so that only the base
-- instruction set (i.e., i860XR) is supported.
--
--`-mintel-syntax'
-- The i860 assembler defaults to AT&T/SVR4 syntax. This option
-- enables the Intel syntax.
--
--
--File: as.info, Node: Directives-i860, Next: Opcodes for i860, Prev: Options-i860, Up: i860-Dependent
--
--9.16.3 i860 Machine Directives
--------------------------------
--
--`.dual'
-- Enter dual instruction mode. While this directive is supported, the
-- preferred way to use dual instruction mode is to explicitly code
-- the dual bit with the `d.' prefix.
--
--`.enddual'
-- Exit dual instruction mode. While this directive is supported, the
-- preferred way to use dual instruction mode is to explicitly code
-- the dual bit with the `d.' prefix.
--
--`.atmp'
-- Change the temporary register used when expanding pseudo
-- operations. The default register is `r31'.
--
-- The `.dual', `.enddual', and `.atmp' directives are available only
--in the Intel syntax mode.
--
-- Both syntaxes allow for the standard `.align' directive. However,
--the Intel syntax additionally allows keywords for the alignment
--parameter: "`.align type'", where `type' is one of `.short', `.long',
--`.quad', `.single', `.double' representing alignments of 2, 4, 16, 4,
--and 8, respectively.
--
--
--File: as.info, Node: Opcodes for i860, Next: Syntax of i860, Prev: Directives-i860, Up: i860-Dependent
--
--9.16.4 i860 Opcodes
---------------------
--
--All of the Intel i860XR and i860XP machine instructions are supported.
--Please see either _i860 Microprocessor Programmer's Reference Manual_
--or _i860 Microprocessor Architecture_ for more information.
--
--9.16.4.1 Other instruction support (pseudo-instructions)
--........................................................
--
--For compatibility with some other i860 assemblers, a number of
--pseudo-instructions are supported. While these are supported, they are
--a very undesirable feature that should be avoided - in particular, when
--they result in an expansion to multiple actual i860 instructions. Below
--are the pseudo-instructions that result in expansions.
-- * Load large immediate into general register:
--
-- The pseudo-instruction `mov imm,%rn' (where the immediate does not
-- fit within a signed 16-bit field) will be expanded into:
-- orh large_imm@h,%r0,%rn
-- or large_imm@l,%rn,%rn
--
-- * Load/store with relocatable address expression:
--
-- For example, the pseudo-instruction `ld.b addr_exp(%rx),%rn' will
-- be expanded into:
-- orh addr_exp@ha,%rx,%r31
-- ld.l addr_exp@l(%r31),%rn
--
-- The analogous expansions apply to `ld.x, st.x, fld.x, pfld.x,
-- fst.x', and `pst.x' as well.
--
-- * Signed large immediate with add/subtract:
--
-- If any of the arithmetic operations `adds, addu, subs, subu' are
-- used with an immediate larger than 16-bits (signed), then they
-- will be expanded. For instance, the pseudo-instruction `adds
-- large_imm,%rx,%rn' expands to:
-- orh large_imm@h,%r0,%r31
-- or large_imm@l,%r31,%r31
-- adds %r31,%rx,%rn
--
-- * Unsigned large immediate with logical operations:
--
-- Logical operations (`or, andnot, or, xor') also result in
-- expansions. The pseudo-instruction `or large_imm,%rx,%rn' results
-- in:
-- orh large_imm@h,%rx,%r31
-- or large_imm@l,%r31,%rn
--
-- Similarly for the others, except for `and' which expands to:
-- andnot (-1 - large_imm)@h,%rx,%r31
-- andnot (-1 - large_imm)@l,%r31,%rn
--
--
--File: as.info, Node: Syntax of i860, Prev: Opcodes for i860, Up: i860-Dependent
--
--9.16.5 i860 Syntax
--------------------
--
--* Menu:
--
--* i860-Chars:: Special Characters
--
--
--File: as.info, Node: i860-Chars, Up: Syntax of i860
--
--9.16.5.1 Special Characters
--...........................
--
--The presence of a `#' appearing anywhere on a line indicates the start
--of a comment that extends to the end of that line.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line can also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- The `;' character can be used to separate statements on the same
--line.
--
--
--File: as.info, Node: i960-Dependent, Next: IA-64-Dependent, Prev: i860-Dependent, Up: Machine Dependencies
--
--9.17 Intel 80960 Dependent Features
--===================================
--
--* Menu:
--
--* Options-i960:: i960 Command-line Options
--* Floating Point-i960:: Floating Point
--* Directives-i960:: i960 Machine Directives
--* Opcodes for i960:: i960 Opcodes
--* Syntax of i960:: i960 Syntax
--
--
--File: as.info, Node: Options-i960, Next: Floating Point-i960, Up: i960-Dependent
--
--9.17.1 i960 Command-line Options
----------------------------------
--
--`-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC'
-- Select the 80960 architecture. Instructions or features not
-- supported by the selected architecture cause fatal errors.
--
-- `-ACA' is equivalent to `-ACA_A'; `-AKC' is equivalent to `-AMC'.
-- Synonyms are provided for compatibility with other tools.
--
-- If you do not specify any of these options, `as' generates code
-- for any instruction or feature that is supported by _some_ version
-- of the 960 (even if this means mixing architectures!). In
-- principle, `as' attempts to deduce the minimal sufficient
-- processor type if none is specified; depending on the object code
-- format, the processor type may be recorded in the object file. If
-- it is critical that the `as' output match a specific architecture,
-- specify that architecture explicitly.
--
--`-b'
-- Add code to collect information about conditional branches taken,
-- for later optimization using branch prediction bits. (The
-- conditional branch instructions have branch prediction bits in the
-- CA, CB, and CC architectures.) If BR represents a conditional
-- branch instruction, the following represents the code generated by
-- the assembler when `-b' is specified:
--
-- call INCREMENT ROUTINE
-- .word 0 # pre-counter
-- Label: BR
-- call INCREMENT ROUTINE
-- .word 0 # post-counter
--
-- The counter following a branch records the number of times that
-- branch was _not_ taken; the difference between the two counters is
-- the number of times the branch _was_ taken.
--
-- A table of every such `Label' is also generated, so that the
-- external postprocessor `gbr960' (supplied by Intel) can locate all
-- the counters. This table is always labeled `__BRANCH_TABLE__';
-- this is a local symbol to permit collecting statistics for many
-- separate object files. The table is word aligned, and begins with
-- a two-word header. The first word, initialized to 0, is used in
-- maintaining linked lists of branch tables. The second word is a
-- count of the number of entries in the table, which follow
-- immediately: each is a word, pointing to one of the labels
-- illustrated above.
--
-- +------------+------------+------------+ ... +------------+
-- | | | | | |
-- | *NEXT | COUNT: N | *BRLAB 1 | | *BRLAB N |
-- | | | | | |
-- +------------+------------+------------+ ... +------------+
--
-- __BRANCH_TABLE__ layout
--
-- The first word of the header is used to locate multiple branch
-- tables, since each object file may contain one. Normally the links
-- are maintained with a call to an initialization routine, placed at
-- the beginning of each function in the file. The GNU C compiler
-- generates these calls automatically when you give it a `-b' option.
-- For further details, see the documentation of `gbr960'.
--
--`-no-relax'
-- Normally, Compare-and-Branch instructions with targets that require
-- displacements greater than 13 bits (or that have external targets)
-- are replaced with the corresponding compare (or `chkbit') and
-- branch instructions. You can use the `-no-relax' option to
-- specify that `as' should generate errors instead, if the target
-- displacement is larger than 13 bits.
--
-- This option does not affect the Compare-and-Jump instructions; the
-- code emitted for them is _always_ adjusted when necessary
-- (depending on displacement size), regardless of whether you use
-- `-no-relax'.
--
--
--File: as.info, Node: Floating Point-i960, Next: Directives-i960, Prev: Options-i960, Up: i960-Dependent
--
--9.17.2 Floating Point
-----------------------
--
--`as' generates IEEE floating-point numbers for the directives `.float',
--`.double', `.extended', and `.single'.
--
--
--File: as.info, Node: Directives-i960, Next: Opcodes for i960, Prev: Floating Point-i960, Up: i960-Dependent
--
--9.17.3 i960 Machine Directives
--------------------------------
--
--`.bss SYMBOL, LENGTH, ALIGN'
-- Reserve LENGTH bytes in the bss section for a local SYMBOL,
-- aligned to the power of two specified by ALIGN. LENGTH and ALIGN
-- must be positive absolute expressions. This directive differs
-- from `.lcomm' only in that it permits you to specify an alignment.
-- *Note `.lcomm': Lcomm.
--
--`.extended FLONUMS'
-- `.extended' expects zero or more flonums, separated by commas; for
-- each flonum, `.extended' emits an IEEE extended-format (80-bit)
-- floating-point number.
--
--`.leafproc CALL-LAB, BAL-LAB'
-- You can use the `.leafproc' directive in conjunction with the
-- optimized `callj' instruction to enable faster calls of leaf
-- procedures. If a procedure is known to call no other procedures,
-- you may define an entry point that skips procedure prolog code
-- (and that does not depend on system-supplied saved context), and
-- declare it as the BAL-LAB using `.leafproc'. If the procedure
-- also has an entry point that goes through the normal prolog, you
-- can specify that entry point as CALL-LAB.
--
-- A `.leafproc' declaration is meant for use in conjunction with the
-- optimized call instruction `callj'; the directive records the data
-- needed later to choose between converting the `callj' into a `bal'
-- or a `call'.
--
-- CALL-LAB is optional; if only one argument is present, or if the
-- two arguments are identical, the single argument is assumed to be
-- the `bal' entry point.
--
--`.sysproc NAME, INDEX'
-- The `.sysproc' directive defines a name for a system procedure.
-- After you define it using `.sysproc', you can use NAME to refer to
-- the system procedure identified by INDEX when calling procedures
-- with the optimized call instruction `callj'.
--
-- Both arguments are required; INDEX must be between 0 and 31
-- (inclusive).
--
--
--File: as.info, Node: Opcodes for i960, Next: Syntax of i960, Prev: Directives-i960, Up: i960-Dependent
--
--9.17.4 i960 Opcodes
---------------------
--
--All Intel 960 machine instructions are supported; *note i960
--Command-line Options: Options-i960. for a discussion of selecting the
--instruction subset for a particular 960 architecture.
--
-- Some opcodes are processed beyond simply emitting a single
--corresponding instruction: `callj', and Compare-and-Branch or
--Compare-and-Jump instructions with target displacements larger than 13
--bits.
--
--* Menu:
--
--* callj-i960:: `callj'
--* Compare-and-branch-i960:: Compare-and-Branch
--
--
--File: as.info, Node: callj-i960, Next: Compare-and-branch-i960, Up: Opcodes for i960
--
--9.17.4.1 `callj'
--................
--
--You can write `callj' to have the assembler or the linker determine the
--most appropriate form of subroutine call: `call', `bal', or `calls'.
--If the assembly source contains enough information--a `.leafproc' or
--`.sysproc' directive defining the operand--then `as' translates the
--`callj'; if not, it simply emits the `callj', leaving it for the linker
--to resolve.
--
--
--File: as.info, Node: Compare-and-branch-i960, Prev: callj-i960, Up: Opcodes for i960
--
--9.17.4.2 Compare-and-Branch
--...........................
--
--The 960 architectures provide combined Compare-and-Branch instructions
--that permit you to store the branch target in the lower 13 bits of the
--instruction word itself. However, if you specify a branch target far
--enough away that its address won't fit in 13 bits, the assembler can
--either issue an error, or convert your Compare-and-Branch instruction
--into separate instructions to do the compare and the branch.
--
-- Whether `as' gives an error or expands the instruction depends on
--two choices you can make: whether you use the `-no-relax' option, and
--whether you use a "Compare and Branch" instruction or a "Compare and
--Jump" instruction. The "Jump" instructions are _always_ expanded if
--necessary; the "Branch" instructions are expanded when necessary
--_unless_ you specify `-no-relax'--in which case `as' gives an error
--instead.
--
-- These are the Compare-and-Branch instructions, their "Jump" variants,
--and the instruction pairs they may expand into:
--
-- Compare and
-- Branch Jump Expanded to
-- ------ ------ ------------
-- bbc chkbit; bno
-- bbs chkbit; bo
-- cmpibe cmpije cmpi; be
-- cmpibg cmpijg cmpi; bg
-- cmpibge cmpijge cmpi; bge
-- cmpibl cmpijl cmpi; bl
-- cmpible cmpijle cmpi; ble
-- cmpibno cmpijno cmpi; bno
-- cmpibne cmpijne cmpi; bne
-- cmpibo cmpijo cmpi; bo
-- cmpobe cmpoje cmpo; be
-- cmpobg cmpojg cmpo; bg
-- cmpobge cmpojge cmpo; bge
-- cmpobl cmpojl cmpo; bl
-- cmpoble cmpojle cmpo; ble
-- cmpobne cmpojne cmpo; bne
--
--
--File: as.info, Node: Syntax of i960, Prev: Opcodes for i960, Up: i960-Dependent
--
--9.17.5 Syntax for the i960
----------------------------
--
--* Menu:
--
--* i960-Chars:: Special Characters
--
--
--File: as.info, Node: i960-Chars, Up: Syntax of i960
--
--9.17.5.1 Special Characters
--...........................
--
--The presence of a `#' on a line indicates the start of a comment that
--extends to the end of the current line.
--
-- If a `#' appears as the first character of a line, the whole line is
--treated as a comment, but in this case the line can also be a logical
--line number directive (*note Comments::) or a preprocessor control
--command (*note Preprocessing::).
--
-- The `;' character can be used to separate statements on the same
--line.
--
--
--File: as.info, Node: IA-64-Dependent, Next: IP2K-Dependent, Prev: i960-Dependent, Up: Machine Dependencies
--
--9.18 IA-64 Dependent Features
--=============================
--
--* Menu:
--
--* IA-64 Options:: Options
--* IA-64 Syntax:: Syntax
--* IA-64 Opcodes:: Opcodes
--
--
--File: as.info, Node: IA-64 Options, Next: IA-64 Syntax, Up: IA-64-Dependent
--
--9.18.1 Options
----------------
--
--`-mconstant-gp'
-- This option instructs the assembler to mark the resulting object
-- file as using the "constant GP" model. With this model, it is
-- assumed that the entire program uses a single global pointer (GP)
-- value. Note that this option does not in any fashion affect the
-- machine code emitted by the assembler. All it does is turn on the
-- EF_IA_64_CONS_GP flag in the ELF file header.
--
--`-mauto-pic'
-- This option instructs the assembler to mark the resulting object
-- file as using the "constant GP without function descriptor" data
-- model. This model is like the "constant GP" model, except that it
-- additionally does away with function descriptors. What this means
-- is that the address of a function refers directly to the
-- function's code entry-point. Normally, such an address would
-- refer to a function descriptor, which contains both the code
-- entry-point and the GP-value needed by the function. Note that
-- this option does not in any fashion affect the machine code
-- emitted by the assembler. All it does is turn on the
-- EF_IA_64_NOFUNCDESC_CONS_GP flag in the ELF file header.
--
--`-milp32'
--`-milp64'
--`-mlp64'
--`-mp64'
-- These options select the data model. The assembler defaults to
-- `-mlp64' (LP64 data model).
--
--`-mle'
--`-mbe'
-- These options select the byte order. The `-mle' option selects
-- little-endian byte order (default) and `-mbe' selects big-endian
-- byte order. Note that IA-64 machine code always uses
-- little-endian byte order.
--
--`-mtune=itanium1'
--`-mtune=itanium2'
-- Tune for a particular IA-64 CPU, ITANIUM1 or ITANIUM2. The default
-- is ITANIUM2.
--
--`-munwind-check=warning'
--`-munwind-check=error'
-- These options control what the assembler will do when performing
-- consistency checks on unwind directives. `-munwind-check=warning'
-- will make the assembler issue a warning when an unwind directive
-- check fails. This is the default. `-munwind-check=error' will
-- make the assembler issue an error when an unwind directive check
-- fails.
--
--`-mhint.b=ok'
--`-mhint.b=warning'
--`-mhint.b=error'
-- These options control what the assembler will do when the `hint.b'
-- instruction is used. `-mhint.b=ok' will make the assembler accept
-- `hint.b'. `-mint.b=warning' will make the assembler issue a
-- warning when `hint.b' is used. `-mhint.b=error' will make the
-- assembler treat `hint.b' as an error, which is the default.
--
--`-x'
--`-xexplicit'
-- These options turn on dependency violation checking.
--
--`-xauto'
-- This option instructs the assembler to automatically insert stop
-- bits where necessary to remove dependency violations. This is the
-- default mode.
--
--`-xnone'
-- This option turns off dependency violation checking.
--
--`-xdebug'
-- This turns on debug output intended to help tracking down bugs in
-- the dependency violation checker.
--
--`-xdebugn'
-- This is a shortcut for -xnone -xdebug.
--
--`-xdebugx'
-- This is a shortcut for -xexplicit -xdebug.
--
--
--
--File: as.info, Node: IA-64 Syntax, Next: IA-64 Opcodes, Prev: IA-64 Options, Up: IA-64-Dependent
--
--9.18.2 Syntax
---------------
--
--The assembler syntax closely follows the IA-64 Assembly Language
--Reference Guide.
--
--* Menu:
--
--* IA-64-Chars:: Special Characters
--* IA-64-Regs:: Register Names
--* IA-64-Bits:: Bit Names
--* IA-64-Relocs:: Relocations
--
--
--File: as.info, Node: IA-64-Chars, Next: IA-64-Regs, Up: IA-64 Syntax
--
--9.18.2.1 Special Characters
--...........................
--
--`//' is the line comment token.
--
-- `;' can be used instead of a newline to separate statements.
--
--
--File: as.info, Node: IA-64-Regs, Next: IA-64-Bits, Prev: IA-64-Chars, Up: IA-64 Syntax
--
--9.18.2.2 Register Names
--.......................
--
--The 128 integer registers are referred to as `rN'. The 128
--floating-point registers are referred to as `fN'. The 128 application
--registers are referred to as `arN'. The 128 control registers are
--referred to as `crN'. The 64 one-bit predicate registers are referred
--to as `pN'. The 8 branch registers are referred to as `bN'. In
--addition, the assembler defines a number of aliases: `gp' (`r1'), `sp'
--(`r12'), `rp' (`b0'), `ret0' (`r8'), `ret1' (`r9'), `ret2' (`r10'),
--`ret3' (`r9'), `fargN' (`f8+N'), and `fretN' (`f8+N').
--
-- For convenience, the assembler also defines aliases for all named
--application and control registers. For example, `ar.bsp' refers to the
--register backing store pointer (`ar17'). Similarly, `cr.eoi' refers to
--the end-of-interrupt register (`cr67').
--
--
--File: as.info, Node: IA-64-Bits, Next: IA-64-Relocs, Prev: IA-64-Regs, Up: IA-64 Syntax
--
--9.18.2.3 IA-64 Processor-Status-Register (PSR) Bit Names
--........................................................
--
--The assembler defines bit masks for each of the bits in the IA-64
--processor status register. For example, `psr.ic' corresponds to a
--value of 0x2000. These masks are primarily intended for use with the
--`ssm'/`sum' and `rsm'/`rum' instructions, but they can be used anywhere
--else where an integer constant is expected.
--
--
--File: as.info, Node: IA-64-Relocs, Prev: IA-64-Bits, Up: IA-64 Syntax
--
--9.18.2.4 Relocations
--....................
--
--In addition to the standard IA-64 relocations, the following
--relocations are implemented by `as':
--
--`@slotcount(V)'
-- Convert the address offset V into a slot count. This pseudo
-- function is available only on VMS. The expression V must be known
-- at assembly time: it can't reference undefined symbols or symbols
-- in different sections.
--
--
--File: as.info, Node: IA-64 Opcodes, Prev: IA-64 Syntax, Up: IA-64-Dependent
--
--9.18.3 Opcodes
----------------
--
--For detailed information on the IA-64 machine instruction set, see the
--IA-64 Architecture Handbook
--(http://developer.intel.com/design/itanium/arch_spec.htm).
--
--
--File: as.info, Node: IP2K-Dependent, Next: LM32-Dependent, Prev: IA-64-Dependent, Up: Machine Dependencies
--
--9.19 IP2K Dependent Features
--============================
--
--* Menu:
--
--* IP2K-Opts:: IP2K Options
--* IP2K-Syntax:: IP2K Syntax
--
--
--File: as.info, Node: IP2K-Opts, Next: IP2K-Syntax, Up: IP2K-Dependent
--
--9.19.1 IP2K Options
---------------------
--
--The Ubicom IP2K version of `as' has a few machine dependent options:
--
--`-mip2022ext'
-- `as' can assemble the extended IP2022 instructions, but it will
-- only do so if this is specifically allowed via this command line
-- option.
--
--`-mip2022'
-- This option restores the assembler's default behaviour of not
-- permitting the extended IP2022 instructions to be assembled.
--
--
--
--File: as.info, Node: IP2K-Syntax, Prev: IP2K-Opts, Up: IP2K-Dependent
--
--9.19.2 IP2K Syntax
--------------------
--
--* Menu:
--
--* IP2K-Chars:: Special Characters
--
--
--File: as.info, Node: IP2K-Chars, Up: IP2K-Syntax
--
--9.19.2.1 Special Characters
--...........................
--
--The presence of a `;' on a line indicates the start of a comment that
--extends to the end of the current line.
--
-- If a `#' appears as the first character of a line, the whole line is
--treated as a comment, but in this case the line can also be a logical
--line number directive (*note Comments::) or a preprocessor control
--command (*note Preprocessing::).
--
-- The IP2K assembler does not currently support a line separator
--character.
--
--
--File: as.info, Node: LM32-Dependent, Next: M32C-Dependent, Prev: IP2K-Dependent, Up: Machine Dependencies
--
--9.20 LM32 Dependent Features
--============================
--
--* Menu:
--
--* LM32 Options:: Options
--* LM32 Syntax:: Syntax
--* LM32 Opcodes:: Opcodes
--
--
--File: as.info, Node: LM32 Options, Next: LM32 Syntax, Up: LM32-Dependent
--
--9.20.1 Options
----------------
--
--`-mmultiply-enabled'
-- Enable multiply instructions.
--
--`-mdivide-enabled'
-- Enable divide instructions.
--
--`-mbarrel-shift-enabled'
-- Enable barrel-shift instructions.
--
--`-msign-extend-enabled'
-- Enable sign extend instructions.
--
--`-muser-enabled'
-- Enable user defined instructions.
--
--`-micache-enabled'
-- Enable instruction cache related CSRs.
--
--`-mdcache-enabled'
-- Enable data cache related CSRs.
--
--`-mbreak-enabled'
-- Enable break instructions.
--
--`-mall-enabled'
-- Enable all instructions and CSRs.
--
--
--
--File: as.info, Node: LM32 Syntax, Next: LM32 Opcodes, Prev: LM32 Options, Up: LM32-Dependent
--
--9.20.2 Syntax
---------------
--
--* Menu:
--
--* LM32-Regs:: Register Names
--* LM32-Modifiers:: Relocatable Expression Modifiers
--* LM32-Chars:: Special Characters
--
--
--File: as.info, Node: LM32-Regs, Next: LM32-Modifiers, Up: LM32 Syntax
--
--9.20.2.1 Register Names
--.......................
--
--LM32 has 32 x 32-bit general purpose registers `r0', `r1', ... `r31'.
--
-- The following aliases are defined: `gp' - `r26', `fp' - `r27', `sp'
--- `r28', `ra' - `r29', `ea' - `r30', `ba' - `r31'.
--
-- LM32 has the following Control and Status Registers (CSRs).
--
--`IE'
-- Interrupt enable.
--
--`IM'
-- Interrupt mask.
--
--`IP'
-- Interrupt pending.
--
--`ICC'
-- Instruction cache control.
--
--`DCC'
-- Data cache control.
--
--`CC'
-- Cycle counter.
--
--`CFG'
-- Configuration.
--
--`EBA'
-- Exception base address.
--
--`DC'
-- Debug control.
--
--`DEBA'
-- Debug exception base address.
--
--`JTX'
-- JTAG transmit.
--
--`JRX'
-- JTAG receive.
--
--`BP0'
-- Breakpoint 0.
--
--`BP1'
-- Breakpoint 1.
--
--`BP2'
-- Breakpoint 2.
--
--`BP3'
-- Breakpoint 3.
--
--`WP0'
-- Watchpoint 0.
--
--`WP1'
-- Watchpoint 1.
--
--`WP2'
-- Watchpoint 2.
--
--`WP3'
-- Watchpoint 3.
--
--
--File: as.info, Node: LM32-Modifiers, Next: LM32-Chars, Prev: LM32-Regs, Up: LM32 Syntax
--
--9.20.2.2 Relocatable Expression Modifiers
--.........................................
--
--The assembler supports several modifiers when using relocatable
--addresses in LM32 instruction operands. The general syntax is the
--following:
--
-- modifier(relocatable-expression)
--
--`lo'
-- This modifier allows you to use bits 0 through 15 of an address
-- expression as 16 bit relocatable expression.
--
--`hi'
-- This modifier allows you to use bits 16 through 23 of an address
-- expression as 16 bit relocatable expression.
--
-- For example
--
-- ori r4, r4, lo(sym+10)
-- orhi r4, r4, hi(sym+10)
--
--`gp'
-- This modified creates a 16-bit relocatable expression that is the
-- offset of the symbol from the global pointer.
--
-- mva r4, gp(sym)
--
--`got'
-- This modifier places a symbol in the GOT and creates a 16-bit
-- relocatable expression that is the offset into the GOT of this
-- symbol.
--
-- lw r4, (gp+got(sym))
--
--`gotofflo16'
-- This modifier allows you to use the bits 0 through 15 of an
-- address which is an offset from the GOT.
--
--`gotoffhi16'
-- This modifier allows you to use the bits 16 through 31 of an
-- address which is an offset from the GOT.
--
-- orhi r4, r4, gotoffhi16(lsym)
-- addi r4, r4, gotofflo16(lsym)
--
--
--
--File: as.info, Node: LM32-Chars, Prev: LM32-Modifiers, Up: LM32 Syntax
--
--9.20.2.3 Special Characters
--...........................
--
--The presence of a `#' on a line indicates the start of a comment that
--extends to the end of the current line. Note that if a line starts
--with a `#' character then it can also be a logical line number
--directive (*note Comments::) or a preprocessor control command (*note
--Preprocessing::).
--
-- A semicolon (`;') can be used to separate multiple statements on the
--same line.
--
--
--File: as.info, Node: LM32 Opcodes, Prev: LM32 Syntax, Up: LM32-Dependent
--
--9.20.3 Opcodes
----------------
--
--For detailed information on the LM32 machine instruction set, see
--`http://www.latticesemi.com/products/intellectualproperty/ipcores/mico32/'.
--
-- `as' implements all the standard LM32 opcodes.
--
--
--File: as.info, Node: M32C-Dependent, Next: M32R-Dependent, Prev: LM32-Dependent, Up: Machine Dependencies
--
--9.21 M32C Dependent Features
--============================
--
-- `as' can assemble code for several different members of the Renesas
--M32C family. Normally the default is to assemble code for the M16C
--microprocessor. The `-m32c' option may be used to change the default
--to the M32C microprocessor.
--
--* Menu:
--
--* M32C-Opts:: M32C Options
--* M32C-Syntax:: M32C Syntax
--
--
--File: as.info, Node: M32C-Opts, Next: M32C-Syntax, Up: M32C-Dependent
--
--9.21.1 M32C Options
---------------------
--
--The Renesas M32C version of `as' has these machine-dependent options:
--
--`-m32c'
-- Assemble M32C instructions.
--
--`-m16c'
-- Assemble M16C instructions (default).
--
--`-relax'
-- Enable support for link-time relaxations.
--
--`-h-tick-hex'
-- Support H'00 style hex constants in addition to 0x00 style.
--
--
--
--File: as.info, Node: M32C-Syntax, Prev: M32C-Opts, Up: M32C-Dependent
--
--9.21.2 M32C Syntax
--------------------
--
--* Menu:
--
--* M32C-Modifiers:: Symbolic Operand Modifiers
--* M32C-Chars:: Special Characters
--
--
--File: as.info, Node: M32C-Modifiers, Next: M32C-Chars, Up: M32C-Syntax
--
--9.21.2.1 Symbolic Operand Modifiers
--...................................
--
--The assembler supports several modifiers when using symbol addresses in
--M32C instruction operands. The general syntax is the following:
--
-- %modifier(symbol)
--
--`%dsp8'
--`%dsp16'
-- These modifiers override the assembler's assumptions about how big
-- a symbol's address is. Normally, when it sees an operand like
-- `sym[a0]' it assumes `sym' may require the widest displacement
-- field (16 bits for `-m16c', 24 bits for `-m32c'). These modifiers
-- tell it to assume the address will fit in an 8 or 16 bit
-- (respectively) unsigned displacement. Note that, of course, if it
-- doesn't actually fit you will get linker errors. Example:
--
-- mov.w %dsp8(sym)[a0],r1
-- mov.b #0,%dsp8(sym)[a0]
--
--`%hi8'
-- This modifier allows you to load bits 16 through 23 of a 24 bit
-- address into an 8 bit register. This is useful with, for example,
-- the M16C `smovf' instruction, which expects a 20 bit address in
-- `r1h' and `a0'. Example:
--
-- mov.b #%hi8(sym),r1h
-- mov.w #%lo16(sym),a0
-- smovf.b
--
--`%lo16'
-- Likewise, this modifier allows you to load bits 0 through 15 of a
-- 24 bit address into a 16 bit register.
--
--`%hi16'
-- This modifier allows you to load bits 16 through 31 of a 32 bit
-- address into a 16 bit register. While the M32C family only has 24
-- bits of address space, it does support addresses in pairs of 16 bit
-- registers (like `a1a0' for the `lde' instruction). This modifier
-- is for loading the upper half in such cases. Example:
--
-- mov.w #%hi16(sym),a1
-- mov.w #%lo16(sym),a0
-- ...
-- lde.w [a1a0],r1
--
--
--
--File: as.info, Node: M32C-Chars, Prev: M32C-Modifiers, Up: M32C-Syntax
--
--9.21.2.2 Special Characters
--...........................
--
--The presence of a `;' character on a line indicates the start of a
--comment that extends to the end of that line.
--
-- If a `#' appears as the first character of a line, the whole line is
--treated as a comment, but in this case the line can also be a logical
--line number directive (*note Comments::) or a preprocessor control
--command (*note Preprocessing::).
--
-- The `|' character can be used to separate statements on the same
--line.
--
--
--File: as.info, Node: M32R-Dependent, Next: M68K-Dependent, Prev: M32C-Dependent, Up: Machine Dependencies
--
--9.22 M32R Dependent Features
--============================
--
--* Menu:
--
--* M32R-Opts:: M32R Options
--* M32R-Directives:: M32R Directives
--* M32R-Warnings:: M32R Warnings
--
--
--File: as.info, Node: M32R-Opts, Next: M32R-Directives, Up: M32R-Dependent
--
--9.22.1 M32R Options
---------------------
--
--The Renease M32R version of `as' has a few machine dependent options:
--
--`-m32rx'
-- `as' can assemble code for several different members of the
-- Renesas M32R family. Normally the default is to assemble code for
-- the M32R microprocessor. This option may be used to change the
-- default to the M32RX microprocessor, which adds some more
-- instructions to the basic M32R instruction set, and some
-- additional parameters to some of the original instructions.
--
--`-m32r2'
-- This option changes the target processor to the M32R2
-- microprocessor.
--
--`-m32r'
-- This option can be used to restore the assembler's default
-- behaviour of assembling for the M32R microprocessor. This can be
-- useful if the default has been changed by a previous command line
-- option.
--
--`-little'
-- This option tells the assembler to produce little-endian code and
-- data. The default is dependent upon how the toolchain was
-- configured.
--
--`-EL'
-- This is a synonym for _-little_.
--
--`-big'
-- This option tells the assembler to produce big-endian code and
-- data.
--
--`-EB'
-- This is a synonum for _-big_.
--
--`-KPIC'
-- This option specifies that the output of the assembler should be
-- marked as position-independent code (PIC).
--
--`-parallel'
-- This option tells the assembler to attempts to combine two
-- sequential instructions into a single, parallel instruction, where
-- it is legal to do so.
--
--`-no-parallel'
-- This option disables a previously enabled _-parallel_ option.
--
--`-no-bitinst'
-- This option disables the support for the extended bit-field
-- instructions provided by the M32R2. If this support needs to be
-- re-enabled the _-bitinst_ switch can be used to restore it.
--
--`-O'
-- This option tells the assembler to attempt to optimize the
-- instructions that it produces. This includes filling delay slots
-- and converting sequential instructions into parallel ones. This
-- option implies _-parallel_.
--
--`-warn-explicit-parallel-conflicts'
-- Instructs `as' to produce warning messages when questionable
-- parallel instructions are encountered. This option is enabled by
-- default, but `gcc' disables it when it invokes `as' directly.
-- Questionable instructions are those whose behaviour would be
-- different if they were executed sequentially. For example the
-- code fragment `mv r1, r2 || mv r3, r1' produces a different result
-- from `mv r1, r2 \n mv r3, r1' since the former moves r1 into r3
-- and then r2 into r1, whereas the later moves r2 into r1 and r3.
--
--`-Wp'
-- This is a shorter synonym for the
-- _-warn-explicit-parallel-conflicts_ option.
--
--`-no-warn-explicit-parallel-conflicts'
-- Instructs `as' not to produce warning messages when questionable
-- parallel instructions are encountered.
--
--`-Wnp'
-- This is a shorter synonym for the
-- _-no-warn-explicit-parallel-conflicts_ option.
--
--`-ignore-parallel-conflicts'
-- This option tells the assembler's to stop checking parallel
-- instructions for constraint violations. This ability is provided
-- for hardware vendors testing chip designs and should not be used
-- under normal circumstances.
--
--`-no-ignore-parallel-conflicts'
-- This option restores the assembler's default behaviour of checking
-- parallel instructions to detect constraint violations.
--
--`-Ip'
-- This is a shorter synonym for the _-ignore-parallel-conflicts_
-- option.
--
--`-nIp'
-- This is a shorter synonym for the _-no-ignore-parallel-conflicts_
-- option.
--
--`-warn-unmatched-high'
-- This option tells the assembler to produce a warning message if a
-- `.high' pseudo op is encountered without a matching `.low' pseudo
-- op. The presence of such an unmatched pseudo op usually indicates
-- a programming error.
--
--`-no-warn-unmatched-high'
-- Disables a previously enabled _-warn-unmatched-high_ option.
--
--`-Wuh'
-- This is a shorter synonym for the _-warn-unmatched-high_ option.
--
--`-Wnuh'
-- This is a shorter synonym for the _-no-warn-unmatched-high_ option.
--
--
--
--File: as.info, Node: M32R-Directives, Next: M32R-Warnings, Prev: M32R-Opts, Up: M32R-Dependent
--
--9.22.2 M32R Directives
------------------------
--
--The Renease M32R version of `as' has a few architecture specific
--directives:
--
--`low EXPRESSION'
-- The `low' directive computes the value of its expression and
-- places the lower 16-bits of the result into the immediate-field of
-- the instruction. For example:
--
-- or3 r0, r0, #low(0x12345678) ; compute r0 = r0 | 0x5678
-- add3, r0, r0, #low(fred) ; compute r0 = r0 + low 16-bits of address of fred
--
--`high EXPRESSION'
-- The `high' directive computes the value of its expression and
-- places the upper 16-bits of the result into the immediate-field of
-- the instruction. For example:
--
-- seth r0, #high(0x12345678) ; compute r0 = 0x12340000
-- seth, r0, #high(fred) ; compute r0 = upper 16-bits of address of fred
--
--`shigh EXPRESSION'
-- The `shigh' directive is very similar to the `high' directive. It
-- also computes the value of its expression and places the upper
-- 16-bits of the result into the immediate-field of the instruction.
-- The difference is that `shigh' also checks to see if the lower
-- 16-bits could be interpreted as a signed number, and if so it
-- assumes that a borrow will occur from the upper-16 bits. To
-- compensate for this the `shigh' directive pre-biases the upper 16
-- bit value by adding one to it. For example:
--
-- For example:
--
-- seth r0, #shigh(0x12345678) ; compute r0 = 0x12340000
-- seth r0, #shigh(0x00008000) ; compute r0 = 0x00010000
--
-- In the second example the lower 16-bits are 0x8000. If these are
-- treated as a signed value and sign extended to 32-bits then the
-- value becomes 0xffff8000. If this value is then added to
-- 0x00010000 then the result is 0x00008000.
--
-- This behaviour is to allow for the different semantics of the
-- `or3' and `add3' instructions. The `or3' instruction treats its
-- 16-bit immediate argument as unsigned whereas the `add3' treats
-- its 16-bit immediate as a signed value. So for example:
--
-- seth r0, #shigh(0x00008000)
-- add3 r0, r0, #low(0x00008000)
--
-- Produces the correct result in r0, whereas:
--
-- seth r0, #shigh(0x00008000)
-- or3 r0, r0, #low(0x00008000)
--
-- Stores 0xffff8000 into r0.
--
-- Note - the `shigh' directive does not know where in the assembly
-- source code the lower 16-bits of the value are going set, so it
-- cannot check to make sure that an `or3' instruction is being used
-- rather than an `add3' instruction. It is up to the programmer to
-- make sure that correct directives are used.
--
--`.m32r'
-- The directive performs a similar thing as the _-m32r_ command line
-- option. It tells the assembler to only accept M32R instructions
-- from now on. An instructions from later M32R architectures are
-- refused.
--
--`.m32rx'
-- The directive performs a similar thing as the _-m32rx_ command
-- line option. It tells the assembler to start accepting the extra
-- instructions in the M32RX ISA as well as the ordinary M32R ISA.
--
--`.m32r2'
-- The directive performs a similar thing as the _-m32r2_ command
-- line option. It tells the assembler to start accepting the extra
-- instructions in the M32R2 ISA as well as the ordinary M32R ISA.
--
--`.little'
-- The directive performs a similar thing as the _-little_ command
-- line option. It tells the assembler to start producing
-- little-endian code and data. This option should be used with care
-- as producing mixed-endian binary files is fraught with danger.
--
--`.big'
-- The directive performs a similar thing as the _-big_ command line
-- option. It tells the assembler to start producing big-endian code
-- and data. This option should be used with care as producing
-- mixed-endian binary files is fraught with danger.
--
--
--
--File: as.info, Node: M32R-Warnings, Prev: M32R-Directives, Up: M32R-Dependent
--
--9.22.3 M32R Warnings
----------------------
--
--There are several warning and error messages that can be produced by
--`as' which are specific to the M32R:
--
--`output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?'
-- This message is only produced if warnings for explicit parallel
-- conflicts have been enabled. It indicates that the assembler has
-- encountered a parallel instruction in which the destination
-- register of the left hand instruction is used as an input register
-- in the right hand instruction. For example in this code fragment
-- `mv r1, r2 || neg r3, r1' register r1 is the destination of the
-- move instruction and the input to the neg instruction.
--
--`output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?'
-- This message is only produced if warnings for explicit parallel
-- conflicts have been enabled. It indicates that the assembler has
-- encountered a parallel instruction in which the destination
-- register of the right hand instruction is used as an input
-- register in the left hand instruction. For example in this code
-- fragment `mv r1, r2 || neg r2, r3' register r2 is the destination
-- of the neg instruction and the input to the move instruction.
--
--`instruction `...' is for the M32RX only'
-- This message is produced when the assembler encounters an
-- instruction which is only supported by the M32Rx processor, and
-- the `-m32rx' command line flag has not been specified to allow
-- assembly of such instructions.
--
--`unknown instruction `...''
-- This message is produced when the assembler encounters an
-- instruction which it does not recognize.
--
--`only the NOP instruction can be issued in parallel on the m32r'
-- This message is produced when the assembler encounters a parallel
-- instruction which does not involve a NOP instruction and the
-- `-m32rx' command line flag has not been specified. Only the M32Rx
-- processor is able to execute two instructions in parallel.
--
--`instruction `...' cannot be executed in parallel.'
-- This message is produced when the assembler encounters a parallel
-- instruction which is made up of one or two instructions which
-- cannot be executed in parallel.
--
--`Instructions share the same execution pipeline'
-- This message is produced when the assembler encounters a parallel
-- instruction whoes components both use the same execution pipeline.
--
--`Instructions write to the same destination register.'
-- This message is produced when the assembler encounters a parallel
-- instruction where both components attempt to modify the same
-- register. For example these code fragments will produce this
-- message: `mv r1, r2 || neg r1, r3' `jl r0 || mv r14, r1' `st r2,
-- @-r1 || mv r1, r3' `mv r1, r2 || ld r0, @r1+' `cmp r1, r2 || addx
-- r3, r4' (Both write to the condition bit)
--
--
--
--File: as.info, Node: M68K-Dependent, Next: M68HC11-Dependent, Prev: M32R-Dependent, Up: Machine Dependencies
--
--9.23 M680x0 Dependent Features
--==============================
--
--* Menu:
--
--* M68K-Opts:: M680x0 Options
--* M68K-Syntax:: Syntax
--* M68K-Moto-Syntax:: Motorola Syntax
--* M68K-Float:: Floating Point
--* M68K-Directives:: 680x0 Machine Directives
--* M68K-opcodes:: Opcodes
--
--
--File: as.info, Node: M68K-Opts, Next: M68K-Syntax, Up: M68K-Dependent
--
--9.23.1 M680x0 Options
-----------------------
--
--The Motorola 680x0 version of `as' has a few machine dependent options:
--
--`-march=ARCHITECTURE'
-- This option specifies a target architecture. The following
-- architectures are recognized: `68000', `68010', `68020', `68030',
-- `68040', `68060', `cpu32', `isaa', `isaaplus', `isab', `isac' and
-- `cfv4e'.
--
--`-mcpu=CPU'
-- This option specifies a target cpu. When used in conjunction with
-- the `-march' option, the cpu must be within the specified
-- architecture. Also, the generic features of the architecture are
-- used for instruction generation, rather than those of the specific
-- chip.
--
--`-m[no-]68851'
--`-m[no-]68881'
--`-m[no-]div'
--`-m[no-]usp'
--`-m[no-]float'
--`-m[no-]mac'
--`-m[no-]emac'
-- Enable or disable various architecture specific features. If a
-- chip or architecture by default supports an option (for instance
-- `-march=isaaplus' includes the `-mdiv' option), explicitly
-- disabling the option will override the default.
--
--`-l'
-- You can use the `-l' option to shorten the size of references to
-- undefined symbols. If you do not use the `-l' option, references
-- to undefined symbols are wide enough for a full `long' (32 bits).
-- (Since `as' cannot know where these symbols end up, `as' can only
-- allocate space for the linker to fill in later. Since `as' does
-- not know how far away these symbols are, it allocates as much
-- space as it can.) If you use this option, the references are only
-- one word wide (16 bits). This may be useful if you want the
-- object file to be as small as possible, and you know that the
-- relevant symbols are always less than 17 bits away.
--
--`--register-prefix-optional'
-- For some configurations, especially those where the compiler
-- normally does not prepend an underscore to the names of user
-- variables, the assembler requires a `%' before any use of a
-- register name. This is intended to let the assembler distinguish
-- between C variables and functions named `a0' through `a7', and so
-- on. The `%' is always accepted, but is not required for certain
-- configurations, notably `sun3'. The `--register-prefix-optional'
-- option may be used to permit omitting the `%' even for
-- configurations for which it is normally required. If this is
-- done, it will generally be impossible to refer to C variables and
-- functions with the same names as register names.
--
--`--bitwise-or'
-- Normally the character `|' is treated as a comment character, which
-- means that it can not be used in expressions. The `--bitwise-or'
-- option turns `|' into a normal character. In this mode, you must
-- either use C style comments, or start comments with a `#' character
-- at the beginning of a line.
--
--`--base-size-default-16 --base-size-default-32'
-- If you use an addressing mode with a base register without
-- specifying the size, `as' will normally use the full 32 bit value.
-- For example, the addressing mode `%a0@(%d0)' is equivalent to
-- `%a0@(%d0:l)'. You may use the `--base-size-default-16' option to
-- tell `as' to default to using the 16 bit value. In this case,
-- `%a0@(%d0)' is equivalent to `%a0@(%d0:w)'. You may use the
-- `--base-size-default-32' option to restore the default behaviour.
--
--`--disp-size-default-16 --disp-size-default-32'
-- If you use an addressing mode with a displacement, and the value
-- of the displacement is not known, `as' will normally assume that
-- the value is 32 bits. For example, if the symbol `disp' has not
-- been defined, `as' will assemble the addressing mode
-- `%a0@(disp,%d0)' as though `disp' is a 32 bit value. You may use
-- the `--disp-size-default-16' option to tell `as' to instead assume
-- that the displacement is 16 bits. In this case, `as' will
-- assemble `%a0@(disp,%d0)' as though `disp' is a 16 bit value. You
-- may use the `--disp-size-default-32' option to restore the default
-- behaviour.
--
--`--pcrel'
-- Always keep branches PC-relative. In the M680x0 architecture all
-- branches are defined as PC-relative. However, on some processors
-- they are limited to word displacements maximum. When `as' needs a
-- long branch that is not available, it normally emits an absolute
-- jump instead. This option disables this substitution. When this
-- option is given and no long branches are available, only word
-- branches will be emitted. An error message will be generated if a
-- word branch cannot reach its target. This option has no effect on
-- 68020 and other processors that have long branches. *note Branch
-- Improvement: M68K-Branch.
--
--`-m68000'
-- `as' can assemble code for several different members of the
-- Motorola 680x0 family. The default depends upon how `as' was
-- configured when it was built; normally, the default is to assemble
-- code for the 68020 microprocessor. The following options may be
-- used to change the default. These options control which
-- instructions and addressing modes are permitted. The members of
-- the 680x0 family are very similar. For detailed information about
-- the differences, see the Motorola manuals.
--
-- `-m68000'
-- `-m68ec000'
-- `-m68hc000'
-- `-m68hc001'
-- `-m68008'
-- `-m68302'
-- `-m68306'
-- `-m68307'
-- `-m68322'
-- `-m68356'
-- Assemble for the 68000. `-m68008', `-m68302', and so on are
-- synonyms for `-m68000', since the chips are the same from the
-- point of view of the assembler.
--
-- `-m68010'
-- Assemble for the 68010.
--
-- `-m68020'
-- `-m68ec020'
-- Assemble for the 68020. This is normally the default.
--
-- `-m68030'
-- `-m68ec030'
-- Assemble for the 68030.
--
-- `-m68040'
-- `-m68ec040'
-- Assemble for the 68040.
--
-- `-m68060'
-- `-m68ec060'
-- Assemble for the 68060.
--
-- `-mcpu32'
-- `-m68330'
-- `-m68331'
-- `-m68332'
-- `-m68333'
-- `-m68334'
-- `-m68336'
-- `-m68340'
-- `-m68341'
-- `-m68349'
-- `-m68360'
-- Assemble for the CPU32 family of chips.
--
-- `-m5200'
-- `-m5202'
-- `-m5204'
-- `-m5206'
-- `-m5206e'
-- `-m521x'
-- `-m5249'
-- `-m528x'
-- `-m5307'
-- `-m5407'
-- `-m547x'
-- `-m548x'
-- `-mcfv4'
-- `-mcfv4e'
-- Assemble for the ColdFire family of chips.
--
-- `-m68881'
-- `-m68882'
-- Assemble 68881 floating point instructions. This is the
-- default for the 68020, 68030, and the CPU32. The 68040 and
-- 68060 always support floating point instructions.
--
-- `-mno-68881'
-- Do not assemble 68881 floating point instructions. This is
-- the default for 68000 and the 68010. The 68040 and 68060
-- always support floating point instructions, even if this
-- option is used.
--
-- `-m68851'
-- Assemble 68851 MMU instructions. This is the default for the
-- 68020, 68030, and 68060. The 68040 accepts a somewhat
-- different set of MMU instructions; `-m68851' and `-m68040'
-- should not be used together.
--
-- `-mno-68851'
-- Do not assemble 68851 MMU instructions. This is the default
-- for the 68000, 68010, and the CPU32. The 68040 accepts a
-- somewhat different set of MMU instructions.
--
--
--File: as.info, Node: M68K-Syntax, Next: M68K-Moto-Syntax, Prev: M68K-Opts, Up: M68K-Dependent
--
--9.23.2 Syntax
---------------
--
--This syntax for the Motorola 680x0 was developed at MIT.
--
-- The 680x0 version of `as' uses instructions names and syntax
--compatible with the Sun assembler. Intervening periods are ignored;
--for example, `movl' is equivalent to `mov.l'.
--
-- In the following table APC stands for any of the address registers
--(`%a0' through `%a7'), the program counter (`%pc'), the zero-address
--relative to the program counter (`%zpc'), a suppressed address register
--(`%za0' through `%za7'), or it may be omitted entirely. The use of
--SIZE means one of `w' or `l', and it may be omitted, along with the
--leading colon, unless a scale is also specified. The use of SCALE
--means one of `1', `2', `4', or `8', and it may always be omitted along
--with the leading colon.
--
-- The following addressing modes are understood:
--"Immediate"
-- `#NUMBER'
--
--"Data Register"
-- `%d0' through `%d7'
--
--"Address Register"
-- `%a0' through `%a7'
-- `%a7' is also known as `%sp', i.e., the Stack Pointer. `%a6' is
-- also known as `%fp', the Frame Pointer.
--
--"Address Register Indirect"
-- `%a0@' through `%a7@'
--
--"Address Register Postincrement"
-- `%a0@+' through `%a7@+'
--
--"Address Register Predecrement"
-- `%a0@-' through `%a7@-'
--
--"Indirect Plus Offset"
-- `APC@(NUMBER)'
--
--"Index"
-- `APC@(NUMBER,REGISTER:SIZE:SCALE)'
--
-- The NUMBER may be omitted.
--
--"Postindex"
-- `APC@(NUMBER)@(ONUMBER,REGISTER:SIZE:SCALE)'
--
-- The ONUMBER or the REGISTER, but not both, may be omitted.
--
--"Preindex"
-- `APC@(NUMBER,REGISTER:SIZE:SCALE)@(ONUMBER)'
--
-- The NUMBER may be omitted. Omitting the REGISTER produces the
-- Postindex addressing mode.
--
--"Absolute"
-- `SYMBOL', or `DIGITS', optionally followed by `:b', `:w', or `:l'.
--
--
--File: as.info, Node: M68K-Moto-Syntax, Next: M68K-Float, Prev: M68K-Syntax, Up: M68K-Dependent
--
--9.23.3 Motorola Syntax
------------------------
--
--The standard Motorola syntax for this chip differs from the syntax
--already discussed (*note Syntax: M68K-Syntax.). `as' can accept
--Motorola syntax for operands, even if MIT syntax is used for other
--operands in the same instruction. The two kinds of syntax are fully
--compatible.
--
-- In the following table APC stands for any of the address registers
--(`%a0' through `%a7'), the program counter (`%pc'), the zero-address
--relative to the program counter (`%zpc'), or a suppressed address
--register (`%za0' through `%za7'). The use of SIZE means one of `w' or
--`l', and it may always be omitted along with the leading dot. The use
--of SCALE means one of `1', `2', `4', or `8', and it may always be
--omitted along with the leading asterisk.
--
-- The following additional addressing modes are understood:
--
--"Address Register Indirect"
-- `(%a0)' through `(%a7)'
-- `%a7' is also known as `%sp', i.e., the Stack Pointer. `%a6' is
-- also known as `%fp', the Frame Pointer.
--
--"Address Register Postincrement"
-- `(%a0)+' through `(%a7)+'
--
--"Address Register Predecrement"
-- `-(%a0)' through `-(%a7)'
--
--"Indirect Plus Offset"
-- `NUMBER(%A0)' through `NUMBER(%A7)', or `NUMBER(%PC)'.
--
-- The NUMBER may also appear within the parentheses, as in
-- `(NUMBER,%A0)'. When used with the PC, the NUMBER may be omitted
-- (with an address register, omitting the NUMBER produces Address
-- Register Indirect mode).
--
--"Index"
-- `NUMBER(APC,REGISTER.SIZE*SCALE)'
--
-- The NUMBER may be omitted, or it may appear within the
-- parentheses. The APC may be omitted. The REGISTER and the APC
-- may appear in either order. If both APC and REGISTER are address
-- registers, and the SIZE and SCALE are omitted, then the first
-- register is taken as the base register, and the second as the
-- index register.
--
--"Postindex"
-- `([NUMBER,APC],REGISTER.SIZE*SCALE,ONUMBER)'
--
-- The ONUMBER, or the REGISTER, or both, may be omitted. Either the
-- NUMBER or the APC may be omitted, but not both.
--
--"Preindex"
-- `([NUMBER,APC,REGISTER.SIZE*SCALE],ONUMBER)'
--
-- The NUMBER, or the APC, or the REGISTER, or any two of them, may
-- be omitted. The ONUMBER may be omitted. The REGISTER and the APC
-- may appear in either order. If both APC and REGISTER are address
-- registers, and the SIZE and SCALE are omitted, then the first
-- register is taken as the base register, and the second as the
-- index register.
--
--
--File: as.info, Node: M68K-Float, Next: M68K-Directives, Prev: M68K-Moto-Syntax, Up: M68K-Dependent
--
--9.23.4 Floating Point
-----------------------
--
--Packed decimal (P) format floating literals are not supported. Feel
--free to add the code!
--
-- The floating point formats generated by directives are these.
--
--`.float'
-- `Single' precision floating point constants.
--
--`.double'
-- `Double' precision floating point constants.
--
--`.extend'
--`.ldouble'
-- `Extended' precision (`long double') floating point constants.
--
--
--File: as.info, Node: M68K-Directives, Next: M68K-opcodes, Prev: M68K-Float, Up: M68K-Dependent
--
--9.23.5 680x0 Machine Directives
---------------------------------
--
--In order to be compatible with the Sun assembler the 680x0 assembler
--understands the following directives.
--
--`.data1'
-- This directive is identical to a `.data 1' directive.
--
--`.data2'
-- This directive is identical to a `.data 2' directive.
--
--`.even'
-- This directive is a special case of the `.align' directive; it
-- aligns the output to an even byte boundary.
--
--`.skip'
-- This directive is identical to a `.space' directive.
--
--`.arch NAME'
-- Select the target architecture and extension features. Valid
-- values for NAME are the same as for the `-march' command line
-- option. This directive cannot be specified after any instructions
-- have been assembled. If it is given multiple times, or in
-- conjunction with the `-march' option, all uses must be for the
-- same architecture and extension set.
--
--`.cpu NAME'
-- Select the target cpu. Valid valuse for NAME are the same as for
-- the `-mcpu' command line option. This directive cannot be
-- specified after any instructions have been assembled. If it is
-- given multiple times, or in conjunction with the `-mopt' option,
-- all uses must be for the same cpu.
--
--
--
--File: as.info, Node: M68K-opcodes, Prev: M68K-Directives, Up: M68K-Dependent
--
--9.23.6 Opcodes
----------------
--
--* Menu:
--
--* M68K-Branch:: Branch Improvement
--* M68K-Chars:: Special Characters
--
--
--File: as.info, Node: M68K-Branch, Next: M68K-Chars, Up: M68K-opcodes
--
--9.23.6.1 Branch Improvement
--...........................
--
--Certain pseudo opcodes are permitted for branch instructions. They
--expand to the shortest branch instruction that reach the target.
--Generally these mnemonics are made by substituting `j' for `b' at the
--start of a Motorola mnemonic.
--
-- The following table summarizes the pseudo-operations. A `*' flags
--cases that are more fully described after the table:
--
-- Displacement
-- +------------------------------------------------------------
-- | 68020 68000/10, not PC-relative OK
-- Pseudo-Op |BYTE WORD LONG ABSOLUTE LONG JUMP **
-- +------------------------------------------------------------
-- jbsr |bsrs bsrw bsrl jsr
-- jra |bras braw bral jmp
-- * jXX |bXXs bXXw bXXl bNXs;jmp
-- * dbXX | N/A dbXXw dbXX;bras;bral dbXX;bras;jmp
-- fjXX | N/A fbXXw fbXXl N/A
--
-- XX: condition
-- NX: negative of condition XX
-- `*'--see full description below
-- `**'--this expansion mode is disallowed by `--pcrel'
--
--`jbsr'
--`jra'
-- These are the simplest jump pseudo-operations; they always map to
-- one particular machine instruction, depending on the displacement
-- to the branch target. This instruction will be a byte or word
-- branch is that is sufficient. Otherwise, a long branch will be
-- emitted if available. If no long branches are available and the
-- `--pcrel' option is not given, an absolute long jump will be
-- emitted instead. If no long branches are available, the `--pcrel'
-- option is given, and a word branch cannot reach the target, an
-- error message is generated.
--
-- In addition to standard branch operands, `as' allows these
-- pseudo-operations to have all operands that are allowed for jsr
-- and jmp, substituting these instructions if the operand given is
-- not valid for a branch instruction.
--
--`jXX'
-- Here, `jXX' stands for an entire family of pseudo-operations,
-- where XX is a conditional branch or condition-code test. The full
-- list of pseudo-ops in this family is:
-- jhi jls jcc jcs jne jeq jvc
-- jvs jpl jmi jge jlt jgt jle
--
-- Usually, each of these pseudo-operations expands to a single branch
-- instruction. However, if a word branch is not sufficient, no long
-- branches are available, and the `--pcrel' option is not given, `as'
-- issues a longer code fragment in terms of NX, the opposite
-- condition to XX. For example, under these conditions:
-- jXX foo
-- gives
-- bNXs oof
-- jmp foo
-- oof:
--
--`dbXX'
-- The full family of pseudo-operations covered here is
-- dbhi dbls dbcc dbcs dbne dbeq dbvc
-- dbvs dbpl dbmi dbge dblt dbgt dble
-- dbf dbra dbt
--
-- Motorola `dbXX' instructions allow word displacements only. When
-- a word displacement is sufficient, each of these pseudo-operations
-- expands to the corresponding Motorola instruction. When a word
-- displacement is not sufficient and long branches are available,
-- when the source reads `dbXX foo', `as' emits
-- dbXX oo1
-- bras oo2
-- oo1:bral foo
-- oo2:
--
-- If, however, long branches are not available and the `--pcrel'
-- option is not given, `as' emits
-- dbXX oo1
-- bras oo2
-- oo1:jmp foo
-- oo2:
--
--`fjXX'
-- This family includes
-- fjne fjeq fjge fjlt fjgt fjle fjf
-- fjt fjgl fjgle fjnge fjngl fjngle fjngt
-- fjnle fjnlt fjoge fjogl fjogt fjole fjolt
-- fjor fjseq fjsf fjsne fjst fjueq fjuge
-- fjugt fjule fjult fjun
--
-- Each of these pseudo-operations always expands to a single Motorola
-- coprocessor branch instruction, word or long. All Motorola
-- coprocessor branch instructions allow both word and long
-- displacements.
--
--
--
--File: as.info, Node: M68K-Chars, Prev: M68K-Branch, Up: M68K-opcodes
--
--9.23.6.2 Special Characters
--...........................
--
--Line comments are introduced by the `|' character appearing anywhere on
--a line, unless the `--bitwise-or' command line option has been
--specified.
--
-- An asterisk (`*') as the first character on a line marks the start
--of a line comment as well.
--
-- A hash character (`#') as the first character on a line also marks
--the start of a line comment, but in this case it could also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::). If the hash character appears
--elsewhere on a line it is used to introduce an immediate value. (This
--is for compatibility with Sun's assembler).
--
-- Multiple statements on the same line can appear if they are separated
--by the `;' character.
--
--
--File: as.info, Node: M68HC11-Dependent, Next: Meta-Dependent, Prev: M68K-Dependent, Up: Machine Dependencies
--
--9.24 M68HC11 and M68HC12 Dependent Features
--===========================================
--
--* Menu:
--
--* M68HC11-Opts:: M68HC11 and M68HC12 Options
--* M68HC11-Syntax:: Syntax
--* M68HC11-Modifiers:: Symbolic Operand Modifiers
--* M68HC11-Directives:: Assembler Directives
--* M68HC11-Float:: Floating Point
--* M68HC11-opcodes:: Opcodes
--
--
--File: as.info, Node: M68HC11-Opts, Next: M68HC11-Syntax, Up: M68HC11-Dependent
--
--9.24.1 M68HC11 and M68HC12 Options
------------------------------------
--
--The Motorola 68HC11 and 68HC12 version of `as' have a few machine
--dependent options.
--
--`-m68hc11'
-- This option switches the assembler into the M68HC11 mode. In this
-- mode, the assembler only accepts 68HC11 operands and mnemonics. It
-- produces code for the 68HC11.
--
--`-m68hc12'
-- This option switches the assembler into the M68HC12 mode. In this
-- mode, the assembler also accepts 68HC12 operands and mnemonics. It
-- produces code for the 68HC12. A few 68HC11 instructions are
-- replaced by some 68HC12 instructions as recommended by Motorola
-- specifications.
--
--`-m68hcs12'
-- This option switches the assembler into the M68HCS12 mode. This
-- mode is similar to `-m68hc12' but specifies to assemble for the
-- 68HCS12 series. The only difference is on the assembling of the
-- `movb' and `movw' instruction when a PC-relative operand is used.
--
--`-mm9s12x'
-- This option switches the assembler into the M9S12X mode. This
-- mode is similar to `-m68hc12' but specifies to assemble for the
-- S12X series which is a superset of the HCS12.
--
--`-mm9s12xg'
-- This option switches the assembler into the XGATE mode for the RISC
-- co-processor featured on some S12X-family chips.
--
--`--xgate-ramoffset'
-- This option instructs the linker to offset RAM addresses from S12X
-- address space into XGATE address space.
--
--`-mshort'
-- This option controls the ABI and indicates to use a 16-bit integer
-- ABI. It has no effect on the assembled instructions. This is the
-- default.
--
--`-mlong'
-- This option controls the ABI and indicates to use a 32-bit integer
-- ABI.
--
--`-mshort-double'
-- This option controls the ABI and indicates to use a 32-bit float
-- ABI. This is the default.
--
--`-mlong-double'
-- This option controls the ABI and indicates to use a 64-bit float
-- ABI.
--
--`--strict-direct-mode'
-- You can use the `--strict-direct-mode' option to disable the
-- automatic translation of direct page mode addressing into extended
-- mode when the instruction does not support direct mode. For
-- example, the `clr' instruction does not support direct page mode
-- addressing. When it is used with the direct page mode, `as' will
-- ignore it and generate an absolute addressing. This option
-- prevents `as' from doing this, and the wrong usage of the direct
-- page mode will raise an error.
--
--`--short-branches'
-- The `--short-branches' option turns off the translation of
-- relative branches into absolute branches when the branch offset is
-- out of range. By default `as' transforms the relative branch
-- (`bsr', `bgt', `bge', `beq', `bne', `ble', `blt', `bhi', `bcc',
-- `bls', `bcs', `bmi', `bvs', `bvs', `bra') into an absolute branch
-- when the offset is out of the -128 .. 127 range. In that case,
-- the `bsr' instruction is translated into a `jsr', the `bra'
-- instruction is translated into a `jmp' and the conditional
-- branches instructions are inverted and followed by a `jmp'. This
-- option disables these translations and `as' will generate an error
-- if a relative branch is out of range. This option does not affect
-- the optimization associated to the `jbra', `jbsr' and `jbXX'
-- pseudo opcodes.
--
--`--force-long-branches'
-- The `--force-long-branches' option forces the translation of
-- relative branches into absolute branches. This option does not
-- affect the optimization associated to the `jbra', `jbsr' and
-- `jbXX' pseudo opcodes.
--
--`--print-insn-syntax'
-- You can use the `--print-insn-syntax' option to obtain the syntax
-- description of the instruction when an error is detected.
--
--`--print-opcodes'
-- The `--print-opcodes' option prints the list of all the
-- instructions with their syntax. The first item of each line
-- represents the instruction name and the rest of the line indicates
-- the possible operands for that instruction. The list is printed in
-- alphabetical order. Once the list is printed `as' exits.
--
--`--generate-example'
-- The `--generate-example' option is similar to `--print-opcodes'
-- but it generates an example for each instruction instead.
--
--
--File: as.info, Node: M68HC11-Syntax, Next: M68HC11-Modifiers, Prev: M68HC11-Opts, Up: M68HC11-Dependent
--
--9.24.2 Syntax
---------------
--
--In the M68HC11 syntax, the instruction name comes first and it may be
--followed by one or several operands (up to three). Operands are
--separated by comma (`,'). In the normal mode, `as' will complain if too
--many operands are specified for a given instruction. In the MRI mode
--(turned on with `-M' option), it will treat them as comments. Example:
--
-- inx
-- lda #23
-- bset 2,x #4
-- brclr *bot #8 foo
--
-- The presence of a `;' character or a `!' character anywhere on a
--line indicates the start of a comment that extends to the end of that
--line.
--
-- A `*' or a `#' character at the start of a line also introduces a
--line comment, but these characters do not work elsewhere on the line.
--If the first character of the line is a `#' then as well as starting a
--comment, the line could also be logical line number directive (*note
--Comments::) or a preprocessor control command (*note Preprocessing::).
--
-- The M68HC11 assembler does not currently support a line separator
--character.
--
-- The following addressing modes are understood for 68HC11 and 68HC12:
--"Immediate"
-- `#NUMBER'
--
--"Address Register"
-- `NUMBER,X', `NUMBER,Y'
--
-- The NUMBER may be omitted in which case 0 is assumed.
--
--"Direct Addressing mode"
-- `*SYMBOL', or `*DIGITS'
--
--"Absolute"
-- `SYMBOL', or `DIGITS'
--
-- The M68HC12 has other more complex addressing modes. All of them are
--supported and they are represented below:
--
--"Constant Offset Indexed Addressing Mode"
-- `NUMBER,REG'
--
-- The NUMBER may be omitted in which case 0 is assumed. The
-- register can be either `X', `Y', `SP' or `PC'. The assembler will
-- use the smaller post-byte definition according to the constant
-- value (5-bit constant offset, 9-bit constant offset or 16-bit
-- constant offset). If the constant is not known by the assembler
-- it will use the 16-bit constant offset post-byte and the value
-- will be resolved at link time.
--
--"Offset Indexed Indirect"
-- `[NUMBER,REG]'
--
-- The register can be either `X', `Y', `SP' or `PC'.
--
--"Auto Pre-Increment/Pre-Decrement/Post-Increment/Post-Decrement"
-- `NUMBER,-REG' `NUMBER,+REG' `NUMBER,REG-' `NUMBER,REG+'
--
-- The number must be in the range `-8'..`+8' and must not be 0. The
-- register can be either `X', `Y', `SP' or `PC'.
--
--"Accumulator Offset"
-- `ACC,REG'
--
-- The accumulator register can be either `A', `B' or `D'. The
-- register can be either `X', `Y', `SP' or `PC'.
--
--"Accumulator D offset indexed-indirect"
-- `[D,REG]'
--
-- The register can be either `X', `Y', `SP' or `PC'.
--
--
-- For example:
--
-- ldab 1024,sp
-- ldd [10,x]
-- orab 3,+x
-- stab -2,y-
-- ldx a,pc
-- sty [d,sp]
--
--
--File: as.info, Node: M68HC11-Modifiers, Next: M68HC11-Directives, Prev: M68HC11-Syntax, Up: M68HC11-Dependent
--
--9.24.3 Symbolic Operand Modifiers
-----------------------------------
--
--The assembler supports several modifiers when using symbol addresses in
--68HC11 and 68HC12 instruction operands. The general syntax is the
--following:
--
-- %modifier(symbol)
--
--`%addr'
-- This modifier indicates to the assembler and linker to use the
-- 16-bit physical address corresponding to the symbol. This is
-- intended to be used on memory window systems to map a symbol in
-- the memory bank window. If the symbol is in a memory expansion
-- part, the physical address corresponds to the symbol address
-- within the memory bank window. If the symbol is not in a memory
-- expansion part, this is the symbol address (using or not using the
-- %addr modifier has no effect in that case).
--
--`%page'
-- This modifier indicates to use the memory page number corresponding
-- to the symbol. If the symbol is in a memory expansion part, its
-- page number is computed by the linker as a number used to map the
-- page containing the symbol in the memory bank window. If the
-- symbol is not in a memory expansion part, the page number is 0.
--
--`%hi'
-- This modifier indicates to use the 8-bit high part of the physical
-- address of the symbol.
--
--`%lo'
-- This modifier indicates to use the 8-bit low part of the physical
-- address of the symbol.
--
--
-- For example a 68HC12 call to a function `foo_example' stored in
--memory expansion part could be written as follows:
--
-- call %addr(foo_example),%page(foo_example)
--
-- and this is equivalent to
--
-- call foo_example
--
-- And for 68HC11 it could be written as follows:
--
-- ldab #%page(foo_example)
-- stab _page_switch
-- jsr %addr(foo_example)
--
--
--File: as.info, Node: M68HC11-Directives, Next: M68HC11-Float, Prev: M68HC11-Modifiers, Up: M68HC11-Dependent
--
--9.24.4 Assembler Directives
-----------------------------
--
--The 68HC11 and 68HC12 version of `as' have the following specific
--assembler directives:
--
--`.relax'
-- The relax directive is used by the `GNU Compiler' to emit a
-- specific relocation to mark a group of instructions for linker
-- relaxation. The sequence of instructions within the group must be
-- known to the linker so that relaxation can be performed.
--
--`.mode [mshort|mlong|mshort-double|mlong-double]'
-- This directive specifies the ABI. It overrides the `-mshort',
-- `-mlong', `-mshort-double' and `-mlong-double' options.
--
--`.far SYMBOL'
-- This directive marks the symbol as a `far' symbol meaning that it
-- uses a `call/rtc' calling convention as opposed to `jsr/rts'.
-- During a final link, the linker will identify references to the
-- `far' symbol and will verify the proper calling convention.
--
--`.interrupt SYMBOL'
-- This directive marks the symbol as an interrupt entry point. This
-- information is then used by the debugger to correctly unwind the
-- frame across interrupts.
--
--`.xrefb SYMBOL'
-- This directive is defined for compatibility with the
-- `Specification for Motorola 8 and 16-Bit Assembly Language Input
-- Standard' and is ignored.
--
--
--
--File: as.info, Node: M68HC11-Float, Next: M68HC11-opcodes, Prev: M68HC11-Directives, Up: M68HC11-Dependent
--
--9.24.5 Floating Point
-----------------------
--
--Packed decimal (P) format floating literals are not supported. Feel
--free to add the code!
--
-- The floating point formats generated by directives are these.
--
--`.float'
-- `Single' precision floating point constants.
--
--`.double'
-- `Double' precision floating point constants.
--
--`.extend'
--`.ldouble'
-- `Extended' precision (`long double') floating point constants.
--
--
--File: as.info, Node: M68HC11-opcodes, Prev: M68HC11-Float, Up: M68HC11-Dependent
--
--9.24.6 Opcodes
----------------
--
--* Menu:
--
--* M68HC11-Branch:: Branch Improvement
--
--
--File: as.info, Node: M68HC11-Branch, Up: M68HC11-opcodes
--
--9.24.6.1 Branch Improvement
--...........................
--
--Certain pseudo opcodes are permitted for branch instructions. They
--expand to the shortest branch instruction that reach the target.
--Generally these mnemonics are made by prepending `j' to the start of
--Motorola mnemonic. These pseudo opcodes are not affected by the
--`--short-branches' or `--force-long-branches' options.
--
-- The following table summarizes the pseudo-operations.
--
-- Displacement Width
-- +-------------------------------------------------------------+
-- | Options |
-- | --short-branches --force-long-branches |
-- +--------------------------+----------------------------------+
-- Op |BYTE WORD | BYTE WORD |
-- +--------------------------+----------------------------------+
-- bsr | bsr <pc-rel> <error> | jsr <abs> |
-- bra | bra <pc-rel> <error> | jmp <abs> |
-- jbsr | bsr <pc-rel> jsr <abs> | bsr <pc-rel> jsr <abs> |
-- jbra | bra <pc-rel> jmp <abs> | bra <pc-rel> jmp <abs> |
-- bXX | bXX <pc-rel> <error> | bNX +3; jmp <abs> |
-- jbXX | bXX <pc-rel> bNX +3; | bXX <pc-rel> bNX +3; jmp <abs> |
-- | jmp <abs> | |
-- +--------------------------+----------------------------------+
-- XX: condition
-- NX: negative of condition XX
--
--`jbsr'
--`jbra'
-- These are the simplest jump pseudo-operations; they always map to
-- one particular machine instruction, depending on the displacement
-- to the branch target.
--
--`jbXX'
-- Here, `jbXX' stands for an entire family of pseudo-operations,
-- where XX is a conditional branch or condition-code test. The full
-- list of pseudo-ops in this family is:
-- jbcc jbeq jbge jbgt jbhi jbvs jbpl jblo
-- jbcs jbne jblt jble jbls jbvc jbmi
--
-- For the cases of non-PC relative displacements and long
-- displacements, `as' issues a longer code fragment in terms of NX,
-- the opposite condition to XX. For example, for the non-PC
-- relative case:
-- jbXX foo
-- gives
-- bNXs oof
-- jmp foo
-- oof:
--
--
--
--File: as.info, Node: Meta-Dependent, Next: MicroBlaze-Dependent, Prev: M68HC11-Dependent, Up: Machine Dependencies
--
--9.25 Meta Dependent Features
--============================
--
--* Menu:
--
--* Meta Options:: Options
--* Meta Syntax:: Meta Assembler Syntax
--
--
--File: as.info, Node: Meta Options, Next: Meta Syntax, Up: Meta-Dependent
--
--9.25.1 Options
----------------
--
--The Imagination Technologies Meta architecture is implemented in a
--number of versions, with each new version adding new features such as
--instructions and registers. For precise details of what instructions
--each core supports, please see the chip's technical reference manual.
--
-- The following table lists all available Meta options.
--
--`-mcpu=metac11'
-- Generate code for Meta 1.1.
--
--`-mcpu=metac12'
-- Generate code for Meta 1.2.
--
--`-mcpu=metac21'
-- Generate code for Meta 2.1.
--
--`-mfpu=metac21'
-- Allow code to use FPU hardware of Meta 2.1.
--
--
--
--File: as.info, Node: Meta Syntax, Prev: Meta Options, Up: Meta-Dependent
--
--9.25.2 Syntax
---------------
--
--* Menu:
--
--* Meta-Chars:: Special Characters
--* Meta-Regs:: Register Names
--
--
--File: as.info, Node: Meta-Chars, Next: Meta-Regs, Up: Meta Syntax
--
--9.25.2.1 Special Characters
--...........................
--
--`!' is the line comment character.
--
-- You can use `;' instead of a newline to separate statements.
--
-- Since `$' has no special meaning, you may use it in symbol names.
--
--
--File: as.info, Node: Meta-Regs, Prev: Meta-Chars, Up: Meta Syntax
--
--9.25.2.2 Register Names
--.......................
--
--Registers can be specified either using their mnemonic names, such as
--`D0Re0', or using the unit plus register number separated by a `.',
--such as `D0.0'.
--
--
--File: as.info, Node: MicroBlaze-Dependent, Next: MIPS-Dependent, Prev: Meta-Dependent, Up: Machine Dependencies
--
--9.26 MicroBlaze Dependent Features
--==================================
--
-- The Xilinx MicroBlaze processor family includes several variants,
--all using the same core instruction set. This chapter covers features
--of the GNU assembler that are specific to the MicroBlaze architecture.
--For details about the MicroBlaze instruction set, please see the
--`MicroBlaze Processor Reference Guide (UG081)' available at
--www.xilinx.com.
--
--* Menu:
--
--* MicroBlaze Directives:: Directives for MicroBlaze Processors.
--* MicroBlaze Syntax:: Syntax for the MicroBlaze
--
--
--File: as.info, Node: MicroBlaze Directives, Next: MicroBlaze Syntax, Up: MicroBlaze-Dependent
--
--9.26.1 Directives
-------------------
--
--A number of assembler directives are available for MicroBlaze.
--
--`.data8 EXPRESSION,...'
-- This directive is an alias for `.byte'. Each expression is
-- assembled into an eight-bit value.
--
--`.data16 EXPRESSION,...'
-- This directive is an alias for `.hword'. Each expression is
-- assembled into an 16-bit value.
--
--`.data32 EXPRESSION,...'
-- This directive is an alias for `.word'. Each expression is
-- assembled into an 32-bit value.
--
--`.ent NAME[,LABEL]'
-- This directive is an alias for `.func' denoting the start of
-- function NAME at (optional) LABEL.
--
--`.end NAME[,LABEL]'
-- This directive is an alias for `.endfunc' denoting the end of
-- function NAME.
--
--`.gpword LABEL,...'
-- This directive is an alias for `.rva'. The resolved address of
-- LABEL is stored in the data section.
--
--`.weakext LABEL'
-- Declare that LABEL is a weak external symbol.
--
--`.rodata'
-- Switch to .rodata section. Equivalent to `.section .rodata'
--
--`.sdata2'
-- Switch to .sdata2 section. Equivalent to `.section .sdata2'
--
--`.sdata'
-- Switch to .sdata section. Equivalent to `.section .sdata'
--
--`.bss'
-- Switch to .bss section. Equivalent to `.section .bss'
--
--`.sbss'
-- Switch to .sbss section. Equivalent to `.section .sbss'
--
--
--File: as.info, Node: MicroBlaze Syntax, Prev: MicroBlaze Directives, Up: MicroBlaze-Dependent
--
--9.26.2 Syntax for the MicroBlaze
----------------------------------
--
--* Menu:
--
--* MicroBlaze-Chars:: Special Characters
--
--
--File: as.info, Node: MicroBlaze-Chars, Up: MicroBlaze Syntax
--
--9.26.2.1 Special Characters
--...........................
--
--The presence of a `#' on a line indicates the start of a comment that
--extends to the end of the current line.
--
-- If a `#' appears as the first character of a line, the whole line is
--treated as a comment, but in this case the line can also be a logical
--line number directive (*note Comments::) or a preprocessor control
--command (*note Preprocessing::).
--
-- The `;' character can be used to separate statements on the same
--line.
--
--
--File: as.info, Node: MIPS-Dependent, Next: MMIX-Dependent, Prev: MicroBlaze-Dependent, Up: Machine Dependencies
--
--9.27 MIPS Dependent Features
--============================
--
-- GNU `as' for MIPS architectures supports several different MIPS
--processors, and MIPS ISA levels I through V, MIPS32, and MIPS64. For
--information about the MIPS instruction set, see `MIPS RISC
--Architecture', by Kane and Heindrich (Prentice-Hall). For an overview
--of MIPS assembly conventions, see "Appendix D: Assembly Language
--Programming" in the same work.
--
--* Menu:
--
--* MIPS Options:: Assembler options
--* MIPS Macros:: High-level assembly macros
--* MIPS Symbol Sizes:: Directives to override the size of symbols
--* MIPS Small Data:: Controlling the use of small data accesses
--* MIPS ISA:: Directives to override the ISA level
--* MIPS assembly options:: Directives to control code generation
--* MIPS autoextend:: Directives for extending MIPS 16 bit instructions
--* MIPS insn:: Directive to mark data as an instruction
--* MIPS NaN Encodings:: Directives to record which NaN encoding is being used
--* MIPS Option Stack:: Directives to save and restore options
--* MIPS ASE Instruction Generation Overrides:: Directives to control
-- generation of MIPS ASE instructions
--* MIPS Floating-Point:: Directives to override floating-point options
--* MIPS Syntax:: MIPS specific syntactical considerations
--
--
--File: as.info, Node: MIPS Options, Next: MIPS Macros, Up: MIPS-Dependent
--
--9.27.1 Assembler options
--------------------------
--
--The MIPS configurations of GNU `as' support these special options:
--
--`-G NUM'
-- Set the "small data" limit to N bytes. The default limit is 8
-- bytes. *Note Controlling the use of small data accesses: MIPS
-- Small Data.
--
--`-EB'
--`-EL'
-- Any MIPS configuration of `as' can select big-endian or
-- little-endian output at run time (unlike the other GNU development
-- tools, which must be configured for one or the other). Use `-EB'
-- to select big-endian output, and `-EL' for little-endian.
--
--`-KPIC'
-- Generate SVR4-style PIC. This option tells the assembler to
-- generate SVR4-style position-independent macro expansions. It
-- also tells the assembler to mark the output file as PIC.
--
--`-mvxworks-pic'
-- Generate VxWorks PIC. This option tells the assembler to generate
-- VxWorks-style position-independent macro expansions.
--
--`-mips1'
--`-mips2'
--`-mips3'
--`-mips4'
--`-mips5'
--`-mips32'
--`-mips32r2'
--`-mips64'
--`-mips64r2'
-- Generate code for a particular MIPS Instruction Set Architecture
-- level. `-mips1' corresponds to the R2000 and R3000 processors,
-- `-mips2' to the R6000 processor, `-mips3' to the R4000 processor,
-- and `-mips4' to the R8000 and R10000 processors. `-mips5',
-- `-mips32', `-mips32r2', `-mips64', and `-mips64r2' correspond to
-- generic MIPS V, MIPS32, MIPS32 Release 2, MIPS64, and MIPS64
-- Release 2 ISA processors, respectively. You can also switch
-- instruction sets during the assembly; see *Note Directives to
-- override the ISA level: MIPS ISA.
--
--`-mgp32'
--`-mfp32'
-- Some macros have different expansions for 32-bit and 64-bit
-- registers. The register sizes are normally inferred from the ISA
-- and ABI, but these flags force a certain group of registers to be
-- treated as 32 bits wide at all times. `-mgp32' controls the size
-- of general-purpose registers and `-mfp32' controls the size of
-- floating-point registers.
--
-- The `.set gp=32' and `.set fp=32' directives allow the size of
-- registers to be changed for parts of an object. The default value
-- is restored by `.set gp=default' and `.set fp=default'.
--
-- On some MIPS variants there is a 32-bit mode flag; when this flag
-- is set, 64-bit instructions generate a trap. Also, some 32-bit
-- OSes only save the 32-bit registers on a context switch, so it is
-- essential never to use the 64-bit registers.
--
--`-mgp64'
--`-mfp64'
-- Assume that 64-bit registers are available. This is provided in
-- the interests of symmetry with `-mgp32' and `-mfp32'.
--
-- The `.set gp=64' and `.set fp=64' directives allow the size of
-- registers to be changed for parts of an object. The default value
-- is restored by `.set gp=default' and `.set fp=default'.
--
--`-mips16'
--`-no-mips16'
-- Generate code for the MIPS 16 processor. This is equivalent to
-- putting `.set mips16' at the start of the assembly file.
-- `-no-mips16' turns off this option.
--
--`-mmicromips'
--`-mno-micromips'
-- Generate code for the microMIPS processor. This is equivalent to
-- putting `.set micromips' at the start of the assembly file.
-- `-mno-micromips' turns off this option. This is equivalent to
-- putting `.set nomicromips' at the start of the assembly file.
--
--`-msmartmips'
--`-mno-smartmips'
-- Enables the SmartMIPS extensions to the MIPS32 instruction set,
-- which provides a number of new instructions which target smartcard
-- and cryptographic applications. This is equivalent to putting
-- `.set smartmips' at the start of the assembly file.
-- `-mno-smartmips' turns off this option.
--
--`-mips3d'
--`-no-mips3d'
-- Generate code for the MIPS-3D Application Specific Extension.
-- This tells the assembler to accept MIPS-3D instructions.
-- `-no-mips3d' turns off this option.
--
--`-mdmx'
--`-no-mdmx'
-- Generate code for the MDMX Application Specific Extension. This
-- tells the assembler to accept MDMX instructions. `-no-mdmx' turns
-- off this option.
--
--`-mdsp'
--`-mno-dsp'
-- Generate code for the DSP Release 1 Application Specific Extension.
-- This tells the assembler to accept DSP Release 1 instructions.
-- `-mno-dsp' turns off this option.
--
--`-mdspr2'
--`-mno-dspr2'
-- Generate code for the DSP Release 2 Application Specific Extension.
-- This option implies -mdsp. This tells the assembler to accept DSP
-- Release 2 instructions. `-mno-dspr2' turns off this option.
--
--`-mmt'
--`-mno-mt'
-- Generate code for the MT Application Specific Extension. This
-- tells the assembler to accept MT instructions. `-mno-mt' turns
-- off this option.
--
--`-mmcu'
--`-mno-mcu'
-- Generate code for the MCU Application Specific Extension. This
-- tells the assembler to accept MCU instructions. `-mno-mcu' turns
-- off this option.
--
--`-mvirt'
--`-mno-virt'
-- Generate code for the Virtualization Application Specific
-- Extension. This tells the assembler to accept Virtualization
-- instructions. `-mno-virt' turns off this option.
--
--`-minsn32'
--`-mno-insn32'
-- Only use 32-bit instruction encodings when generating code for the
-- microMIPS processor. This option inhibits the use of any 16-bit
-- instructions. This is equivalent to putting `.set insn32' at the
-- start of the assembly file. `-mno-insn32' turns off this option.
-- This is equivalent to putting `.set noinsn32' at the start of the
-- assembly file. By default `-mno-insn32' is selected, allowing all
-- instructions to be used.
--
--`-mfix7000'
--`-mno-fix7000'
-- Cause nops to be inserted if the read of the destination register
-- of an mfhi or mflo instruction occurs in the following two
-- instructions.
--
--`-mfix-loongson2f-jump'
--`-mno-fix-loongson2f-jump'
-- Eliminate instruction fetch from outside 256M region to work
-- around the Loongson2F `jump' instructions. Without it, under
-- extreme cases, the kernel may crash. The issue has been solved in
-- latest processor batches, but this fix has no side effect to them.
--
--`-mfix-loongson2f-nop'
--`-mno-fix-loongson2f-nop'
-- Replace nops by `or at,at,zero' to work around the Loongson2F
-- `nop' errata. Without it, under extreme cases, the CPU might
-- deadlock. The issue has been solved in later Loongson2F batches,
-- but this fix has no side effect to them.
--
--`-mfix-vr4120'
--`-mno-fix-vr4120'
-- Insert nops to work around certain VR4120 errata. This option is
-- intended to be used on GCC-generated code: it is not designed to
-- catch all problems in hand-written assembler code.
--
--`-mfix-vr4130'
--`-mno-fix-vr4130'
-- Insert nops to work around the VR4130 `mflo'/`mfhi' errata.
--
--`-mfix-24k'
--`-mno-fix-24k'
-- Insert nops to work around the 24K `eret'/`deret' errata.
--
--`-mfix-cn63xxp1'
--`-mno-fix-cn63xxp1'
-- Replace `pref' hints 0 - 4 and 6 - 24 with hint 28 to work around
-- certain CN63XXP1 errata.
--
--`-m4010'
--`-no-m4010'
-- Generate code for the LSI R4010 chip. This tells the assembler to
-- accept the R4010-specific instructions (`addciu', `ffc', etc.),
-- and to not schedule `nop' instructions around accesses to the `HI'
-- and `LO' registers. `-no-m4010' turns off this option.
--
--`-m4650'
--`-no-m4650'
-- Generate code for the MIPS R4650 chip. This tells the assembler
-- to accept the `mad' and `madu' instruction, and to not schedule
-- `nop' instructions around accesses to the `HI' and `LO' registers.
-- `-no-m4650' turns off this option.
--
--`-m3900'
--`-no-m3900'
--`-m4100'
--`-no-m4100'
-- For each option `-mNNNN', generate code for the MIPS RNNNN chip.
-- This tells the assembler to accept instructions specific to that
-- chip, and to schedule for that chip's hazards.
--
--`-march=CPU'
-- Generate code for a particular MIPS CPU. It is exactly equivalent
-- to `-mCPU', except that there are more value of CPU understood.
-- Valid CPU value are:
--
-- 2000, 3000, 3900, 4000, 4010, 4100, 4111, vr4120, vr4130,
-- vr4181, 4300, 4400, 4600, 4650, 5000, rm5200, rm5230, rm5231,
-- rm5261, rm5721, vr5400, vr5500, 6000, rm7000, 8000, rm9000,
-- 10000, 12000, 14000, 16000, 4kc, 4km, 4kp, 4ksc, 4kec, 4kem,
-- 4kep, 4ksd, m4k, m4kp, m14k, m14kc, m14ke, m14kec, 24kc,
-- 24kf2_1, 24kf, 24kf1_1, 24kec, 24kef2_1, 24kef, 24kef1_1,
-- 34kc, 34kf2_1, 34kf, 34kf1_1, 34kn, 74kc, 74kf2_1, 74kf,
-- 74kf1_1, 74kf3_2, 1004kc, 1004kf2_1, 1004kf, 1004kf1_1, 5kc,
-- 5kf, 20kc, 25kf, sb1, sb1a, loongson2e, loongson2f,
-- loongson3a, octeon, octeon+, octeon2, xlr, xlp
--
-- For compatibility reasons, `Nx' and `Bfx' are accepted as synonyms
-- for `Nf1_1'. These values are deprecated.
--
--`-mtune=CPU'
-- Schedule and tune for a particular MIPS CPU. Valid CPU values are
-- identical to `-march=CPU'.
--
--`-mabi=ABI'
-- Record which ABI the source code uses. The recognized arguments
-- are: `32', `n32', `o64', `64' and `eabi'.
--
--`-msym32'
--`-mno-sym32'
-- Equivalent to adding `.set sym32' or `.set nosym32' to the
-- beginning of the assembler input. *Note MIPS Symbol Sizes::.
--
--`-nocpp'
-- This option is ignored. It is accepted for command-line
-- compatibility with other assemblers, which use it to turn off C
-- style preprocessing. With GNU `as', there is no need for
-- `-nocpp', because the GNU assembler itself never runs the C
-- preprocessor.
--
--`-msoft-float'
--`-mhard-float'
-- Disable or enable floating-point instructions. Note that by
-- default floating-point instructions are always allowed even with
-- CPU targets that don't have support for these instructions.
--
--`-msingle-float'
--`-mdouble-float'
-- Disable or enable double-precision floating-point operations. Note
-- that by default double-precision floating-point operations are
-- always allowed even with CPU targets that don't have support for
-- these operations.
--
--`--construct-floats'
--`--no-construct-floats'
-- The `--no-construct-floats' option disables the construction of
-- double width floating point constants by loading the two halves of
-- the value into the two single width floating point registers that
-- make up the double width register. This feature is useful if the
-- processor support the FR bit in its status register, and this bit
-- is known (by the programmer) to be set. This bit prevents the
-- aliasing of the double width register by the single width
-- registers.
--
-- By default `--construct-floats' is selected, allowing construction
-- of these floating point constants.
--
--`--relax-branch'
--`--no-relax-branch'
-- The `--relax-branch' option enables the relaxation of out-of-range
-- branches. Any branches whose target cannot be reached directly are
-- converted to a small instruction sequence including an
-- inverse-condition branch to the physically next instruction, and a
-- jump to the original target is inserted between the two
-- instructions. In PIC code the jump will involve further
-- instructions for address calculation.
--
-- The `BC1ANY2F', `BC1ANY2T', `BC1ANY4F', `BC1ANY4T', `BPOSGE32' and
-- `BPOSGE64' instructions are excluded from relaxation, because they
-- have no complementing counterparts. They could be relaxed with
-- the use of a longer sequence involving another branch, however
-- this has not been implemented and if their target turns out of
-- reach, they produce an error even if branch relaxation is enabled.
--
-- Also no MIPS16 branches are ever relaxed.
--
-- By default `--no-relax-branch' is selected, causing any
-- out-of-range branches to produce an error.
--
--`-mnan=ENCODING'
-- This option indicates whether the source code uses the IEEE 2008
-- NaN encoding (`-mnan=2008') or the original MIPS encoding
-- (`-mnan=legacy'). It is equivalent to adding a `.nan' directive
-- to the beginning of the source file. *Note MIPS NaN Encodings::.
--
-- `-mnan=legacy' is the default if no `-mnan' option or `.nan'
-- directive is used.
--
--`--trap'
--`--no-break'
-- `as' automatically macro expands certain division and
-- multiplication instructions to check for overflow and division by
-- zero. This option causes `as' to generate code to take a trap
-- exception rather than a break exception when an error is detected.
-- The trap instructions are only supported at Instruction Set
-- Architecture level 2 and higher.
--
--`--break'
--`--no-trap'
-- Generate code to take a break exception rather than a trap
-- exception when an error is detected. This is the default.
--
--`-mpdr'
--`-mno-pdr'
-- Control generation of `.pdr' sections. Off by default on IRIX, on
-- elsewhere.
--
--`-mshared'
--`-mno-shared'
-- When generating code using the Unix calling conventions (selected
-- by `-KPIC' or `-mcall_shared'), gas will normally generate code
-- which can go into a shared library. The `-mno-shared' option
-- tells gas to generate code which uses the calling convention, but
-- can not go into a shared library. The resulting code is slightly
-- more efficient. This option only affects the handling of the
-- `.cpload' and `.cpsetup' pseudo-ops.
--
--
--File: as.info, Node: MIPS Macros, Next: MIPS Symbol Sizes, Prev: MIPS Options, Up: MIPS-Dependent
--
--9.27.2 High-level assembly macros
-----------------------------------
--
--MIPS assemblers have traditionally provided a wider range of
--instructions than the MIPS architecture itself. These extra
--instructions are usually referred to as "macro" instructions (1).
--
-- Some MIPS macro instructions extend an underlying architectural
--instruction while others are entirely new. An example of the former
--type is `and', which allows the third operand to be either a register
--or an arbitrary immediate value. Examples of the latter type include
--`bgt', which branches to the third operand when the first operand is
--greater than the second operand, and `ulh', which implements an
--unaligned 2-byte load.
--
-- One of the most common extensions provided by macros is to expand
--memory offsets to the full address range (32 or 64 bits) and to allow
--symbolic offsets such as `my_data + 4' to be used in place of integer
--constants. For example, the architectural instruction `lbu' allows
--only a signed 16-bit offset, whereas the macro `lbu' allows code such
--as `lbu $4,array+32769($5)'. The implementation of these symbolic
--offsets depends on several factors, such as whether the assembler is
--generating SVR4-style PIC (selected by `-KPIC', *note Assembler
--options: MIPS Options.), the size of symbols (*note Directives to
--override the size of symbols: MIPS Symbol Sizes.), and the small data
--limit (*note Controlling the use of small data accesses: MIPS Small
--Data.).
--
-- Sometimes it is undesirable to have one assembly instruction expand
--to several machine instructions. The directive `.set nomacro' tells
--the assembler to warn when this happens. `.set macro' restores the
--default behavior.
--
-- Some macro instructions need a temporary register to store
--intermediate results. This register is usually `$1', also known as
--`$at', but it can be changed to any core register REG using `.set
--at=REG'. Note that `$at' always refers to `$1' regardless of which
--register is being used as the temporary register.
--
-- Implicit uses of the temporary register in macros could interfere
--with explicit uses in the assembly code. The assembler therefore warns
--whenever it sees an explicit use of the temporary register. The
--directive `.set noat' silences this warning while `.set at' restores
--the default behavior. It is safe to use `.set noat' while `.set
--nomacro' is in effect since single-instruction macros never need a
--temporary register.
--
-- Note that while the GNU assembler provides these macros for
--compatibility, it does not make any attempt to optimize them with the
--surrounding code.
--
-- ---------- Footnotes ----------
--
-- (1) The term "macro" is somewhat overloaded here, since these macros
--have no relation to those defined by `.macro', *note `.macro': Macro.
--
--
--File: as.info, Node: MIPS Symbol Sizes, Next: MIPS Small Data, Prev: MIPS Macros, Up: MIPS-Dependent
--
--9.27.3 Directives to override the size of symbols
---------------------------------------------------
--
--The n64 ABI allows symbols to have any 64-bit value. Although this
--provides a great deal of flexibility, it means that some macros have
--much longer expansions than their 32-bit counterparts. For example,
--the non-PIC expansion of `dla $4,sym' is usually:
--
-- lui $4,%highest(sym)
-- lui $1,%hi(sym)
-- daddiu $4,$4,%higher(sym)
-- daddiu $1,$1,%lo(sym)
-- dsll32 $4,$4,0
-- daddu $4,$4,$1
--
-- whereas the 32-bit expansion is simply:
--
-- lui $4,%hi(sym)
-- daddiu $4,$4,%lo(sym)
--
-- n64 code is sometimes constructed in such a way that all symbolic
--constants are known to have 32-bit values, and in such cases, it's
--preferable to use the 32-bit expansion instead of the 64-bit expansion.
--
-- You can use the `.set sym32' directive to tell the assembler that,
--from this point on, all expressions of the form `SYMBOL' or `SYMBOL +
--OFFSET' have 32-bit values. For example:
--
-- .set sym32
-- dla $4,sym
-- lw $4,sym+16
-- sw $4,sym+0x8000($4)
--
-- will cause the assembler to treat `sym', `sym+16' and `sym+0x8000'
--as 32-bit values. The handling of non-symbolic addresses is not
--affected.
--
-- The directive `.set nosym32' ends a `.set sym32' block and reverts
--to the normal behavior. It is also possible to change the symbol size
--using the command-line options `-msym32' and `-mno-sym32'.
--
-- These options and directives are always accepted, but at present,
--they have no effect for anything other than n64.
--
--
--File: as.info, Node: MIPS Small Data, Next: MIPS ISA, Prev: MIPS Symbol Sizes, Up: MIPS-Dependent
--
--9.27.4 Controlling the use of small data accesses
---------------------------------------------------
--
--It often takes several instructions to load the address of a symbol.
--For example, when `addr' is a 32-bit symbol, the non-PIC expansion of
--`dla $4,addr' is usually:
--
-- lui $4,%hi(addr)
-- daddiu $4,$4,%lo(addr)
--
-- The sequence is much longer when `addr' is a 64-bit symbol. *Note
--Directives to override the size of symbols: MIPS Symbol Sizes.
--
-- In order to cut down on this overhead, most embedded MIPS systems
--set aside a 64-kilobyte "small data" area and guarantee that all data
--of size N and smaller will be placed in that area. The limit N is
--passed to both the assembler and the linker using the command-line
--option `-G N', *note Assembler options: MIPS Options. Note that the
--same value of N must be used when linking and when assembling all input
--files to the link; any inconsistency could cause a relocation overflow
--error.
--
-- The size of an object in the `.bss' section is set by the `.comm' or
--`.lcomm' directive that defines it. The size of an external object may
--be set with the `.extern' directive. For example, `.extern sym,4'
--declares that the object at `sym' is 4 bytes in length, while leaving
--`sym' otherwise undefined.
--
-- When no `-G' option is given, the default limit is 8 bytes. The
--option `-G 0' prevents any data from being automatically classified as
--small.
--
-- It is also possible to mark specific objects as small by putting them
--in the special sections `.sdata' and `.sbss', which are "small"
--counterparts of `.data' and `.bss' respectively. The toolchain will
--treat such data as small regardless of the `-G' setting.
--
-- On startup, systems that support a small data area are expected to
--initialize register `$28', also known as `$gp', in such a way that
--small data can be accessed using a 16-bit offset from that register.
--For example, when `addr' is small data, the `dla $4,addr' instruction
--above is equivalent to:
--
-- daddiu $4,$28,%gp_rel(addr)
--
-- Small data is not supported for SVR4-style PIC.
--
--
--File: as.info, Node: MIPS ISA, Next: MIPS assembly options, Prev: MIPS Small Data, Up: MIPS-Dependent
--
--9.27.5 Directives to override the ISA level
---------------------------------------------
--
--GNU `as' supports an additional directive to change the MIPS
--Instruction Set Architecture level on the fly: `.set mipsN'. N should
--be a number from 0 to 5, or 32, 32r2, 64 or 64r2. The values other
--than 0 make the assembler accept instructions for the corresponding ISA
--level, from that point on in the assembly. `.set mipsN' affects not
--only which instructions are permitted, but also how certain macros are
--expanded. `.set mips0' restores the ISA level to its original level:
--either the level you selected with command line options, or the default
--for your configuration. You can use this feature to permit specific
--MIPS III instructions while assembling in 32 bit mode. Use this
--directive with care!
--
-- The `.set arch=CPU' directive provides even finer control. It
--changes the effective CPU target and allows the assembler to use
--instructions specific to a particular CPU. All CPUs supported by the
--`-march' command line option are also selectable by this directive.
--The original value is restored by `.set arch=default'.
--
-- The directive `.set mips16' puts the assembler into MIPS 16 mode, in
--which it will assemble instructions for the MIPS 16 processor. Use
--`.set nomips16' to return to normal 32 bit mode.
--
-- Traditional MIPS assemblers do not support this directive.
--
-- The directive `.set micromips' puts the assembler into microMIPS
--mode, in which it will assemble instructions for the microMIPS
--processor. Use `.set nomicromips' to return to normal 32 bit mode.
--
-- Traditional MIPS assemblers do not support this directive.
--
--
--File: as.info, Node: MIPS assembly options, Next: MIPS autoextend, Prev: MIPS ISA, Up: MIPS-Dependent
--
--9.27.6 Directives to control code generation
----------------------------------------------
--
--The directive `.set insn32' makes the assembler only use 32-bit
--instruction encodings when generating code for the microMIPS processor.
--This directive inhibits the use of any 16-bit instructions from that
--point on in the assembly. The `.set noinsn32' directive allows 16-bit
--instructions to be accepted.
--
-- Traditional MIPS assemblers do not support this directive.
--
--
--File: as.info, Node: MIPS autoextend, Next: MIPS insn, Prev: MIPS assembly options, Up: MIPS-Dependent
--
--9.27.7 Directives for extending MIPS 16 bit instructions
----------------------------------------------------------
--
--By default, MIPS 16 instructions are automatically extended to 32 bits
--when necessary. The directive `.set noautoextend' will turn this off.
--When `.set noautoextend' is in effect, any 32 bit instruction must be
--explicitly extended with the `.e' modifier (e.g., `li.e $4,1000'). The
--directive `.set autoextend' may be used to once again automatically
--extend instructions when necessary.
--
-- This directive is only meaningful when in MIPS 16 mode. Traditional
--MIPS assemblers do not support this directive.
--
--
--File: as.info, Node: MIPS insn, Next: MIPS NaN Encodings, Prev: MIPS autoextend, Up: MIPS-Dependent
--
--9.27.8 Directive to mark data as an instruction
-------------------------------------------------
--
--The `.insn' directive tells `as' that the following data is actually
--instructions. This makes a difference in MIPS 16 and microMIPS modes:
--when loading the address of a label which precedes instructions, `as'
--automatically adds 1 to the value, so that jumping to the loaded
--address will do the right thing.
--
-- The `.global' and `.globl' directives supported by `as' will by
--default mark the symbol as pointing to a region of data not code. This
--means that, for example, any instructions following such a symbol will
--not be disassembled by `objdump' as it will regard them as data. To
--change this behaviour an optional section name can be placed after the
--symbol name in the `.global' directive. If this section exists and is
--known to be a code section, then the symbol will be marked as poiting at
--code not data. Ie the syntax for the directive is:
--
-- `.global SYMBOL[ SECTION][, SYMBOL[ SECTION]] ...',
--
-- Here is a short example:
--
-- .global foo .text, bar, baz .data
-- foo:
-- nop
-- bar:
-- .word 0x0
-- baz:
-- .word 0x1
--
--
--File: as.info, Node: MIPS NaN Encodings, Next: MIPS Option Stack, Prev: MIPS insn, Up: MIPS-Dependent
--
--9.27.9 Directives to record which NaN encoding is being used
--------------------------------------------------------------
--
--The IEEE 754 floating-point standard defines two types of not-a-number
--(NaN) data: "signalling" NaNs and "quiet" NaNs. The original version
--of the standard did not specify how these two types should be
--distinguished. Most implementations followed the i387 model, in which
--the first bit of the significand is set for quiet NaNs and clear for
--signalling NaNs. However, the original MIPS implementation assigned the
--opposite meaning to the bit, so that it was set for signalling NaNs and
--clear for quiet NaNs.
--
-- The 2008 revision of the standard formally suggested the i387 choice
--and as from Sep 2012 the current release of the MIPS architecture
--therefore optionally supports that form. Code that uses one NaN
--encoding would usually be incompatible with code that uses the other
--NaN encoding, so MIPS ELF objects have a flag (`EF_MIPS_NAN2008') to
--record which encoding is being used.
--
-- Assembly files can use the `.nan' directive to select between the
--two encodings. `.nan 2008' says that the assembly file uses the IEEE
--754-2008 encoding while `.nan legacy' says that the file uses the
--original MIPS encoding. If several `.nan' directives are given, the
--final setting is the one that is used.
--
-- The command-line options `-mnan=legacy' and `-mnan=2008' can be used
--instead of `.nan legacy' and `.nan 2008' respectively. However, any
--`.nan' directive overrides the command-line setting.
--
-- `.nan legacy' is the default if no `.nan' directive or `-mnan'
--option is given.
--
-- Note that GNU `as' does not produce NaNs itself and therefore these
--directives do not affect code generation. They simply control the
--setting of the `EF_MIPS_NAN2008' flag.
--
-- Traditional MIPS assemblers do not support these directives.
--
--
--File: as.info, Node: MIPS Option Stack, Next: MIPS ASE Instruction Generation Overrides, Prev: MIPS NaN Encodings, Up: MIPS-Dependent
--
--9.27.10 Directives to save and restore options
------------------------------------------------
--
--The directives `.set push' and `.set pop' may be used to save and
--restore the current settings for all the options which are controlled
--by `.set'. The `.set push' directive saves the current settings on a
--stack. The `.set pop' directive pops the stack and restores the
--settings.
--
-- These directives can be useful inside an macro which must change an
--option such as the ISA level or instruction reordering but does not want
--to change the state of the code which invoked the macro.
--
-- Traditional MIPS assemblers do not support these directives.
--
--
--File: as.info, Node: MIPS ASE Instruction Generation Overrides, Next: MIPS Floating-Point, Prev: MIPS Option Stack, Up: MIPS-Dependent
--
--9.27.11 Directives to control generation of MIPS ASE instructions
-------------------------------------------------------------------
--
--The directive `.set mips3d' makes the assembler accept instructions
--from the MIPS-3D Application Specific Extension from that point on in
--the assembly. The `.set nomips3d' directive prevents MIPS-3D
--instructions from being accepted.
--
-- The directive `.set smartmips' makes the assembler accept
--instructions from the SmartMIPS Application Specific Extension to the
--MIPS32 ISA from that point on in the assembly. The `.set nosmartmips'
--directive prevents SmartMIPS instructions from being accepted.
--
-- The directive `.set mdmx' makes the assembler accept instructions
--from the MDMX Application Specific Extension from that point on in the
--assembly. The `.set nomdmx' directive prevents MDMX instructions from
--being accepted.
--
-- The directive `.set dsp' makes the assembler accept instructions
--from the DSP Release 1 Application Specific Extension from that point
--on in the assembly. The `.set nodsp' directive prevents DSP Release 1
--instructions from being accepted.
--
-- The directive `.set dspr2' makes the assembler accept instructions
--from the DSP Release 2 Application Specific Extension from that point
--on in the assembly. This dirctive implies `.set dsp'. The `.set
--nodspr2' directive prevents DSP Release 2 instructions from being
--accepted.
--
-- The directive `.set mt' makes the assembler accept instructions from
--the MT Application Specific Extension from that point on in the
--assembly. The `.set nomt' directive prevents MT instructions from
--being accepted.
--
-- The directive `.set mcu' makes the assembler accept instructions
--from the MCU Application Specific Extension from that point on in the
--assembly. The `.set nomcu' directive prevents MCU instructions from
--being accepted.
--
-- The directive `.set virt' makes the assembler accept instructions
--from the Virtualization Application Specific Extension from that point
--on in the assembly. The `.set novirt' directive prevents Virtualization
--instructions from being accepted.
--
-- Traditional MIPS assemblers do not support these directives.
--
--
--File: as.info, Node: MIPS Floating-Point, Next: MIPS Syntax, Prev: MIPS ASE Instruction Generation Overrides, Up: MIPS-Dependent
--
--9.27.12 Directives to override floating-point options
-------------------------------------------------------
--
--The directives `.set softfloat' and `.set hardfloat' provide finer
--control of disabling and enabling float-point instructions. These
--directives always override the default (that hard-float instructions
--are accepted) or the command-line options (`-msoft-float' and
--`-mhard-float').
--
-- The directives `.set singlefloat' and `.set doublefloat' provide
--finer control of disabling and enabling double-precision float-point
--operations. These directives always override the default (that
--double-precision operations are accepted) or the command-line options
--(`-msingle-float' and `-mdouble-float').
--
-- Traditional MIPS assemblers do not support these directives.
--
--
--File: as.info, Node: MIPS Syntax, Prev: MIPS Floating-Point, Up: MIPS-Dependent
--
--9.27.13 Syntactical considerations for the MIPS assembler
-----------------------------------------------------------
--
--* Menu:
--
--* MIPS-Chars:: Special Characters
--
--
--File: as.info, Node: MIPS-Chars, Up: MIPS Syntax
--
--9.27.13.1 Special Characters
--............................
--
--The presence of a `#' on a line indicates the start of a comment that
--extends to the end of the current line.
--
-- If a `#' appears as the first character of a line, the whole line is
--treated as a comment, but in this case the line can also be a logical
--line number directive (*note Comments::) or a preprocessor control
--command (*note Preprocessing::).
--
-- The `;' character can be used to separate statements on the same
--line.
--
--
--File: as.info, Node: MMIX-Dependent, Next: MSP430-Dependent, Prev: MIPS-Dependent, Up: Machine Dependencies
--
--9.28 MMIX Dependent Features
--============================
--
--* Menu:
--
--* MMIX-Opts:: Command-line Options
--* MMIX-Expand:: Instruction expansion
--* MMIX-Syntax:: Syntax
--* MMIX-mmixal:: Differences to `mmixal' syntax and semantics
--
--
--File: as.info, Node: MMIX-Opts, Next: MMIX-Expand, Up: MMIX-Dependent
--
--9.28.1 Command-line Options
-----------------------------
--
--The MMIX version of `as' has some machine-dependent options.
--
-- When `--fixed-special-register-names' is specified, only the register
--names specified in *Note MMIX-Regs:: are recognized in the instructions
--`PUT' and `GET'.
--
-- You can use the `--globalize-symbols' to make all symbols global.
--This option is useful when splitting up a `mmixal' program into several
--files.
--
-- The `--gnu-syntax' turns off most syntax compatibility with
--`mmixal'. Its usability is currently doubtful.
--
-- The `--relax' option is not fully supported, but will eventually make
--the object file prepared for linker relaxation.
--
-- If you want to avoid inadvertently calling a predefined symbol and
--would rather get an error, for example when using `as' with a compiler
--or other machine-generated code, specify `--no-predefined-syms'. This
--turns off built-in predefined definitions of all such symbols,
--including rounding-mode symbols, segment symbols, `BIT' symbols, and
--`TRAP' symbols used in `mmix' "system calls". It also turns off
--predefined special-register names, except when used in `PUT' and `GET'
--instructions.
--
-- By default, some instructions are expanded to fit the size of the
--operand or an external symbol (*note MMIX-Expand::). By passing
--`--no-expand', no such expansion will be done, instead causing errors
--at link time if the operand does not fit.
--
-- The `mmixal' documentation (*note mmixsite::) specifies that global
--registers allocated with the `GREG' directive (*note MMIX-greg::) and
--initialized to the same non-zero value, will refer to the same global
--register. This isn't strictly enforceable in `as' since the final
--addresses aren't known until link-time, but it will do an effort unless
--the `--no-merge-gregs' option is specified. (Register merging isn't
--yet implemented in `ld'.)
--
-- `as' will warn every time it expands an instruction to fit an
--operand unless the option `-x' is specified. It is believed that this
--behaviour is more useful than just mimicking `mmixal''s behaviour, in
--which instructions are only expanded if the `-x' option is specified,
--and assembly fails otherwise, when an instruction needs to be expanded.
--It needs to be kept in mind that `mmixal' is both an assembler and
--linker, while `as' will expand instructions that at link stage can be
--contracted. (Though linker relaxation isn't yet implemented in `ld'.)
--The option `-x' also imples `--linker-allocated-gregs'.
--
-- If instruction expansion is enabled, `as' can expand a `PUSHJ'
--instruction into a series of instructions. The shortest expansion is
--to not expand it, but just mark the call as redirectable to a stub,
--which `ld' creates at link-time, but only if the original `PUSHJ'
--instruction is found not to reach the target. The stub consists of the
--necessary instructions to form a jump to the target. This happens if
--`as' can assert that the `PUSHJ' instruction can reach such a stub.
--The option `--no-pushj-stubs' disables this shorter expansion, and the
--longer series of instructions is then created at assembly-time. The
--option `--no-stubs' is a synonym, intended for compatibility with
--future releases, where generation of stubs for other instructions may
--be implemented.
--
-- Usually a two-operand-expression (*note GREG-base::) without a
--matching `GREG' directive is treated as an error by `as'. When the
--option `--linker-allocated-gregs' is in effect, they are instead passed
--through to the linker, which will allocate as many global registers as
--is needed.
--
--
--File: as.info, Node: MMIX-Expand, Next: MMIX-Syntax, Prev: MMIX-Opts, Up: MMIX-Dependent
--
--9.28.2 Instruction expansion
------------------------------
--
--When `as' encounters an instruction with an operand that is either not
--known or does not fit the operand size of the instruction, `as' (and
--`ld') will expand the instruction into a sequence of instructions
--semantically equivalent to the operand fitting the instruction.
--Expansion will take place for the following instructions:
--
--`GETA'
-- Expands to a sequence of four instructions: `SETL', `INCML',
-- `INCMH' and `INCH'. The operand must be a multiple of four.
--
--Conditional branches
-- A branch instruction is turned into a branch with the complemented
-- condition and prediction bit over five instructions; four
-- instructions setting `$255' to the operand value, which like with
-- `GETA' must be a multiple of four, and a final `GO $255,$255,0'.
--
--`PUSHJ'
-- Similar to expansion for conditional branches; four instructions
-- set `$255' to the operand value, followed by a `PUSHGO
-- $255,$255,0'.
--
--`JMP'
-- Similar to conditional branches and `PUSHJ'. The final instruction
-- is `GO $255,$255,0'.
--
-- The linker `ld' is expected to shrink these expansions for code
--assembled with `--relax' (though not currently implemented).
--
--
--File: as.info, Node: MMIX-Syntax, Next: MMIX-mmixal, Prev: MMIX-Expand, Up: MMIX-Dependent
--
--9.28.3 Syntax
---------------
--
--The assembly syntax is supposed to be upward compatible with that
--described in Sections 1.3 and 1.4 of `The Art of Computer Programming,
--Volume 1'. Draft versions of those chapters as well as other MMIX
--information is located at
--`http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html'. Most code
--examples from the mmixal package located there should work unmodified
--when assembled and linked as single files, with a few noteworthy
--exceptions (*note MMIX-mmixal::).
--
-- Before an instruction is emitted, the current location is aligned to
--the next four-byte boundary. If a label is defined at the beginning of
--the line, its value will be the aligned value.
--
-- In addition to the traditional hex-prefix `0x', a hexadecimal number
--can also be specified by the prefix character `#'.
--
-- After all operands to an MMIX instruction or directive have been
--specified, the rest of the line is ignored, treated as a comment.
--
--* Menu:
--
--* MMIX-Chars:: Special Characters
--* MMIX-Symbols:: Symbols
--* MMIX-Regs:: Register Names
--* MMIX-Pseudos:: Assembler Directives
--
--
--File: as.info, Node: MMIX-Chars, Next: MMIX-Symbols, Up: MMIX-Syntax
--
--9.28.3.1 Special Characters
--...........................
--
--The characters `*' and `#' are line comment characters; each start a
--comment at the beginning of a line, but only at the beginning of a
--line. A `#' prefixes a hexadecimal number if found elsewhere on a
--line. If a `#' appears at the start of a line the whole line is
--treated as a comment, but the line can also act as a logical line
--number directive (*note Comments::) or a preprocessor control command
--(*note Preprocessing::).
--
-- Two other characters, `%' and `!', each start a comment anywhere on
--the line. Thus you can't use the `modulus' and `not' operators in
--expressions normally associated with these two characters.
--
-- A `;' is a line separator, treated as a new-line, so separate
--instructions can be specified on a single line.
--
--
--File: as.info, Node: MMIX-Symbols, Next: MMIX-Regs, Prev: MMIX-Chars, Up: MMIX-Syntax
--
--9.28.3.2 Symbols
--................
--
--The character `:' is permitted in identifiers. There are two
--exceptions to it being treated as any other symbol character: if a
--symbol begins with `:', it means that the symbol is in the global
--namespace and that the current prefix should not be prepended to that
--symbol (*note MMIX-prefix::). The `:' is then not considered part of
--the symbol. For a symbol in the label position (first on a line), a `:'
--at the end of a symbol is silently stripped off. A label is permitted,
--but not required, to be followed by a `:', as with many other assembly
--formats.
--
-- The character `@' in an expression, is a synonym for `.', the
--current location.
--
-- In addition to the common forward and backward local symbol formats
--(*note Symbol Names::), they can be specified with upper-case `B' and
--`F', as in `8B' and `9F'. A local label defined for the current
--position is written with a `H' appended to the number:
-- 3H LDB $0,$1,2
-- This and traditional local-label formats cannot be mixed: a label
--must be defined and referred to using the same format.
--
-- There's a minor caveat: just as for the ordinary local symbols, the
--local symbols are translated into ordinary symbols using control
--characters are to hide the ordinal number of the symbol.
--Unfortunately, these symbols are not translated back in error messages.
--Thus you may see confusing error messages when local symbols are used.
--Control characters `\003' (control-C) and `\004' (control-D) are used
--for the MMIX-specific local-symbol syntax.
--
-- The symbol `Main' is handled specially; it is always global.
--
-- By defining the symbols `__.MMIX.start..text' and
--`__.MMIX.start..data', the address of respectively the `.text' and
--`.data' segments of the final program can be defined, though when
--linking more than one object file, the code or data in the object file
--containing the symbol is not guaranteed to be start at that position;
--just the final executable. *Note MMIX-loc::.
--
--
--File: as.info, Node: MMIX-Regs, Next: MMIX-Pseudos, Prev: MMIX-Symbols, Up: MMIX-Syntax
--
--9.28.3.3 Register names
--.......................
--
--Local and global registers are specified as `$0' to `$255'. The
--recognized special register names are `rJ', `rA', `rB', `rC', `rD',
--`rE', `rF', `rG', `rH', `rI', `rK', `rL', `rM', `rN', `rO', `rP', `rQ',
--`rR', `rS', `rT', `rU', `rV', `rW', `rX', `rY', `rZ', `rBB', `rTT',
--`rWW', `rXX', `rYY' and `rZZ'. A leading `:' is optional for special
--register names.
--
-- Local and global symbols can be equated to register names and used in
--place of ordinary registers.
--
-- Similarly for special registers, local and global symbols can be
--used. Also, symbols equated from numbers and constant expressions are
--allowed in place of a special register, except when either of the
--options `--no-predefined-syms' and `--fixed-special-register-names' are
--specified. Then only the special register names above are allowed for
--the instructions having a special register operand; `GET' and `PUT'.
--
--
--File: as.info, Node: MMIX-Pseudos, Prev: MMIX-Regs, Up: MMIX-Syntax
--
--9.28.3.4 Assembler Directives
--.............................
--
--`LOC'
-- The `LOC' directive sets the current location to the value of the
-- operand field, which may include changing sections. If the
-- operand is a constant, the section is set to either `.data' if the
-- value is `0x2000000000000000' or larger, else it is set to `.text'.
-- Within a section, the current location may only be changed to
-- monotonically higher addresses. A LOC expression must be a
-- previously defined symbol or a "pure" constant.
--
-- An example, which sets the label PREV to the current location, and
-- updates the current location to eight bytes forward:
-- prev LOC @+8
--
-- When a LOC has a constant as its operand, a symbol
-- `__.MMIX.start..text' or `__.MMIX.start..data' is defined
-- depending on the address as mentioned above. Each such symbol is
-- interpreted as special by the linker, locating the section at that
-- address. Note that if multiple files are linked, the first object
-- file with that section will be mapped to that address (not
-- necessarily the file with the LOC definition).
--
--`LOCAL'
-- Example:
-- LOCAL external_symbol
-- LOCAL 42
-- .local asymbol
--
-- This directive-operation generates a link-time assertion that the
-- operand does not correspond to a global register. The operand is
-- an expression that at link-time resolves to a register symbol or a
-- number. A number is treated as the register having that number.
-- There is one restriction on the use of this directive: the
-- pseudo-directive must be placed in a section with contents, code
-- or data.
--
--`IS'
-- The `IS' directive:
-- asymbol IS an_expression
-- sets the symbol `asymbol' to `an_expression'. A symbol may not be
-- set more than once using this directive. Local labels may be set
-- using this directive, for example:
-- 5H IS @+4
--
--`GREG'
-- This directive reserves a global register, gives it an initial
-- value and optionally gives it a symbolic name. Some examples:
--
-- areg GREG
-- breg GREG data_value
-- GREG data_buffer
-- .greg creg, another_data_value
--
-- The symbolic register name can be used in place of a (non-special)
-- register. If a value isn't provided, it defaults to zero. Unless
-- the option `--no-merge-gregs' is specified, non-zero registers
-- allocated with this directive may be eliminated by `as'; another
-- register with the same value used in its place. Any of the
-- instructions `CSWAP', `GO', `LDA', `LDBU', `LDB', `LDHT', `LDOU',
-- `LDO', `LDSF', `LDTU', `LDT', `LDUNC', `LDVTS', `LDWU', `LDW',
-- `PREGO', `PRELD', `PREST', `PUSHGO', `STBU', `STB', `STCO', `STHT',
-- `STOU', `STSF', `STTU', `STT', `STUNC', `SYNCD', `SYNCID', can
-- have a value nearby an initial value in place of its second and
-- third operands. Here, "nearby" is defined as within the range
-- 0...255 from the initial value of such an allocated register.
--
-- buffer1 BYTE 0,0,0,0,0
-- buffer2 BYTE 0,0,0,0,0
-- ...
-- GREG buffer1
-- LDOU $42,buffer2
-- In the example above, the `Y' field of the `LDOUI' instruction
-- (LDOU with a constant Z) will be replaced with the global register
-- allocated for `buffer1', and the `Z' field will have the value 5,
-- the offset from `buffer1' to `buffer2'. The result is equivalent
-- to this code:
-- buffer1 BYTE 0,0,0,0,0
-- buffer2 BYTE 0,0,0,0,0
-- ...
-- tmpreg GREG buffer1
-- LDOU $42,tmpreg,(buffer2-buffer1)
--
-- Global registers allocated with this directive are allocated in
-- order higher-to-lower within a file. Other than that, the exact
-- order of register allocation and elimination is undefined. For
-- example, the order is undefined when more than one file with such
-- directives are linked together. With the options `-x' and
-- `--linker-allocated-gregs', `GREG' directives for two-operand
-- cases like the one mentioned above can be omitted. Sufficient
-- global registers will then be allocated by the linker.
--
--`BYTE'
-- The `BYTE' directive takes a series of operands separated by a
-- comma. If an operand is a string (*note Strings::), each
-- character of that string is emitted as a byte. Other operands
-- must be constant expressions without forward references, in the
-- range 0...255. If you need operands having expressions with
-- forward references, use `.byte' (*note Byte::). An operand can be
-- omitted, defaulting to a zero value.
--
--`WYDE'
--`TETRA'
--`OCTA'
-- The directives `WYDE', `TETRA' and `OCTA' emit constants of two,
-- four and eight bytes size respectively. Before anything else
-- happens for the directive, the current location is aligned to the
-- respective constant-size boundary. If a label is defined at the
-- beginning of the line, its value will be that after the alignment.
-- A single operand can be omitted, defaulting to a zero value
-- emitted for the directive. Operands can be expressed as strings
-- (*note Strings::), in which case each character in the string is
-- emitted as a separate constant of the size indicated by the
-- directive.
--
--`PREFIX'
-- The `PREFIX' directive sets a symbol name prefix to be prepended to
-- all symbols (except local symbols, *note MMIX-Symbols::), that are
-- not prefixed with `:', until the next `PREFIX' directive. Such
-- prefixes accumulate. For example,
-- PREFIX a
-- PREFIX b
-- c IS 0
-- defines a symbol `abc' with the value 0.
--
--`BSPEC'
--`ESPEC'
-- A pair of `BSPEC' and `ESPEC' directives delimit a section of
-- special contents (without specified semantics). Example:
-- BSPEC 42
-- TETRA 1,2,3
-- ESPEC
-- The single operand to `BSPEC' must be number in the range 0...255.
-- The `BSPEC' number 80 is used by the GNU binutils implementation.
--
--
--File: as.info, Node: MMIX-mmixal, Prev: MMIX-Syntax, Up: MMIX-Dependent
--
--9.28.4 Differences to `mmixal'
--------------------------------
--
--The binutils `as' and `ld' combination has a few differences in
--function compared to `mmixal' (*note mmixsite::).
--
-- The replacement of a symbol with a GREG-allocated register (*note
--GREG-base::) is not handled the exactly same way in `as' as in
--`mmixal'. This is apparent in the `mmixal' example file `inout.mms',
--where different registers with different offsets, eventually yielding
--the same address, are used in the first instruction. This type of
--difference should however not affect the function of any program unless
--it has specific assumptions about the allocated register number.
--
-- Line numbers (in the `mmo' object format) are currently not
--supported.
--
-- Expression operator precedence is not that of mmixal: operator
--precedence is that of the C programming language. It's recommended to
--use parentheses to explicitly specify wanted operator precedence
--whenever more than one type of operators are used.
--
-- The serialize unary operator `&', the fractional division operator
--`//', the logical not operator `!' and the modulus operator `%' are not
--available.
--
-- Symbols are not global by default, unless the option
--`--globalize-symbols' is passed. Use the `.global' directive to
--globalize symbols (*note Global::).
--
-- Operand syntax is a bit stricter with `as' than `mmixal'. For
--example, you can't say `addu 1,2,3', instead you must write `addu
--$1,$2,3'.
--
-- You can't LOC to a lower address than those already visited (i.e.,
--"backwards").
--
-- A LOC directive must come before any emitted code.
--
-- Predefined symbols are visible as file-local symbols after use. (In
--the ELF file, that is--the linked mmo file has no notion of a file-local
--symbol.)
--
-- Some mapping of constant expressions to sections in LOC expressions
--is attempted, but that functionality is easily confused and should be
--avoided unless compatibility with `mmixal' is required. A LOC
--expression to `0x2000000000000000' or higher, maps to the `.data'
--section and lower addresses map to the `.text' section (*note
--MMIX-loc::).
--
-- The code and data areas are each contiguous. Sparse programs with
--far-away LOC directives will take up the same amount of space as a
--contiguous program with zeros filled in the gaps between the LOC
--directives. If you need sparse programs, you might try and get the
--wanted effect with a linker script and splitting up the code parts into
--sections (*note Section::). Assembly code for this, to be compatible
--with `mmixal', would look something like:
-- .if 0
-- LOC away_expression
-- .else
-- .section away,"ax"
-- .fi
-- `as' will not execute the LOC directive and `mmixal' ignores the
--lines with `.'. This construct can be used generally to help
--compatibility.
--
-- Symbols can't be defined twice-not even to the same value.
--
-- Instruction mnemonics are recognized case-insensitive, though the
--`IS' and `GREG' pseudo-operations must be specified in upper-case
--characters.
--
-- There's no unicode support.
--
-- The following is a list of programs in `mmix.tar.gz', available at
--`http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html', last
--checked with the version dated 2001-08-25 (md5sum
--c393470cfc86fac040487d22d2bf0172) that assemble with `mmixal' but do
--not assemble with `as':
--
--`silly.mms'
-- LOC to a previous address.
--
--`sim.mms'
-- Redefines symbol `Done'.
--
--`test.mms'
-- Uses the serial operator `&'.
--
--
--File: as.info, Node: MSP430-Dependent, Next: NiosII-Dependent, Prev: MMIX-Dependent, Up: Machine Dependencies
--
--9.29 MSP 430 Dependent Features
--===============================
--
--* Menu:
--
--* MSP430 Options:: Options
--* MSP430 Syntax:: Syntax
--* MSP430 Floating Point:: Floating Point
--* MSP430 Directives:: MSP 430 Machine Directives
--* MSP430 Opcodes:: Opcodes
--* MSP430 Profiling Capability:: Profiling Capability
--
--
--File: as.info, Node: MSP430 Options, Next: MSP430 Syntax, Up: MSP430-Dependent
--
--9.29.1 Options
----------------
--
--`-mmcu'
-- selects the mpu arch. If the architecture is 430Xv2 then this also
-- enables NOP generation unless the `-mN' is also specified.
--
--`-mcpu'
-- selects the cpu architecture. If the architecture is 430Xv2 then
-- this also enables NOP generation unless the `-mN' is also
-- specified.
--
--`-mP'
-- enables polymorph instructions handler.
--
--`-mQ'
-- enables relaxation at assembly time. DANGEROUS!
--
--`-ml'
-- indicates that the input uses the large code model.
--
--`-mN'
-- disables the generation of a NOP instruction following any
-- instruction that might change the interrupts enabled/disabled
-- state. For the 430Xv2 architecture the instructions: `EINT',
-- `DINT', `BIC #8, SR', `BIS #8, SR' and `MOV.W <>, SR' must be
-- followed by a NOP instruction in order to ensure the correct
-- processing of interrupts. By default generation of the NOP
-- instruction happens automatically, but this command line option
-- disables this behaviour. It is then up to the programmer to ensure
-- that interrupts are enabled and disabled correctly.
--
--`-md'
-- mark the object file as one that requires data to copied from ROM
-- to RAM at execution startup. Disabled by default.
--
--
--
--File: as.info, Node: MSP430 Syntax, Next: MSP430 Floating Point, Prev: MSP430 Options, Up: MSP430-Dependent
--
--9.29.2 Syntax
---------------
--
--* Menu:
--
--* MSP430-Macros:: Macros
--* MSP430-Chars:: Special Characters
--* MSP430-Regs:: Register Names
--* MSP430-Ext:: Assembler Extensions
--
--
--File: as.info, Node: MSP430-Macros, Next: MSP430-Chars, Up: MSP430 Syntax
--
--9.29.2.1 Macros
--...............
--
--The macro syntax used on the MSP 430 is like that described in the MSP
--430 Family Assembler Specification. Normal `as' macros should still
--work.
--
-- Additional built-in macros are:
--
--`llo(exp)'
-- Extracts least significant word from 32-bit expression 'exp'.
--
--`lhi(exp)'
-- Extracts most significant word from 32-bit expression 'exp'.
--
--`hlo(exp)'
-- Extracts 3rd word from 64-bit expression 'exp'.
--
--`hhi(exp)'
-- Extracts 4rd word from 64-bit expression 'exp'.
--
--
-- They normally being used as an immediate source operand.
-- mov #llo(1), r10 ; == mov #1, r10
-- mov #lhi(1), r10 ; == mov #0, r10
--
--
--File: as.info, Node: MSP430-Chars, Next: MSP430-Regs, Prev: MSP430-Macros, Up: MSP430 Syntax
--
--9.29.2.2 Special Characters
--...........................
--
--A semicolon (`;') appearing anywhere on a line starts a comment that
--extends to the end of that line.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but it can also be a logical line number
--directive (*note Comments::) or a preprocessor control command (*note
--Preprocessing::).
--
-- Multiple statements can appear on the same line provided that they
--are separated by the `{' character.
--
-- The character `$' in jump instructions indicates current location and
--implemented only for TI syntax compatibility.
--
--
--File: as.info, Node: MSP430-Regs, Next: MSP430-Ext, Prev: MSP430-Chars, Up: MSP430 Syntax
--
--9.29.2.3 Register Names
--.......................
--
--General-purpose registers are represented by predefined symbols of the
--form `rN' (for global registers), where N represents a number between
--`0' and `15'. The leading letters may be in either upper or lower
--case; for example, `r13' and `R7' are both valid register names.
--
-- Register names `PC', `SP' and `SR' cannot be used as register names
--and will be treated as variables. Use `r0', `r1', and `r2' instead.
--
--
--File: as.info, Node: MSP430-Ext, Prev: MSP430-Regs, Up: MSP430 Syntax
--
--9.29.2.4 Assembler Extensions
--.............................
--
--`@rN'
-- As destination operand being treated as `0(rn)'
--
--`0(rN)'
-- As source operand being treated as `@rn'
--
--`jCOND +N'
-- Skips next N bytes followed by jump instruction and equivalent to
-- `jCOND $+N+2'
--
--
-- Also, there are some instructions, which cannot be found in other
--assemblers. These are branch instructions, which has different opcodes
--upon jump distance. They all got PC relative addressing mode.
--
--`beq label'
-- A polymorph instruction which is `jeq label' in case if jump
-- distance within allowed range for cpu's jump instruction. If not,
-- this unrolls into a sequence of
-- jne $+6
-- br label
--
--`bne label'
-- A polymorph instruction which is `jne label' or `jeq +4; br label'
--
--`blt label'
-- A polymorph instruction which is `jl label' or `jge +4; br label'
--
--`bltn label'
-- A polymorph instruction which is `jn label' or `jn +2; jmp +4; br
-- label'
--
--`bltu label'
-- A polymorph instruction which is `jlo label' or `jhs +2; br label'
--
--`bge label'
-- A polymorph instruction which is `jge label' or `jl +4; br label'
--
--`bgeu label'
-- A polymorph instruction which is `jhs label' or `jlo +4; br label'
--
--`bgt label'
-- A polymorph instruction which is `jeq +2; jge label' or `jeq +6;
-- jl +4; br label'
--
--`bgtu label'
-- A polymorph instruction which is `jeq +2; jhs label' or `jeq +6;
-- jlo +4; br label'
--
--`bleu label'
-- A polymorph instruction which is `jeq label; jlo label' or `jeq
-- +2; jhs +4; br label'
--
--`ble label'
-- A polymorph instruction which is `jeq label; jl label' or `jeq
-- +2; jge +4; br label'
--
--`jump label'
-- A polymorph instruction which is `jmp label' or `br label'
--
--
--File: as.info, Node: MSP430 Floating Point, Next: MSP430 Directives, Prev: MSP430 Syntax, Up: MSP430-Dependent
--
--9.29.3 Floating Point
-----------------------
--
--The MSP 430 family uses IEEE 32-bit floating-point numbers.
--
--
--File: as.info, Node: MSP430 Directives, Next: MSP430 Opcodes, Prev: MSP430 Floating Point, Up: MSP430-Dependent
--
--9.29.4 MSP 430 Machine Directives
-----------------------------------
--
--`.file'
-- This directive is ignored; it is accepted for compatibility with
-- other MSP 430 assemblers.
--
-- _Warning:_ in other versions of the GNU assembler, `.file' is
-- used for the directive called `.app-file' in the MSP 430
-- support.
--
--`.line'
-- This directive is ignored; it is accepted for compatibility with
-- other MSP 430 assemblers.
--
--`.arch'
-- Sets the target microcontroller in the same way as the `-mmcu'
-- command line option.
--
--`.cpu'
-- Sets the target architecture in the same way as the `-mcpu'
-- command line option.
--
--`.profiler'
-- This directive instructs assembler to add new profile entry to the
-- object file.
--
--
--
--File: as.info, Node: MSP430 Opcodes, Next: MSP430 Profiling Capability, Prev: MSP430 Directives, Up: MSP430-Dependent
--
--9.29.5 Opcodes
----------------
--
--`as' implements all the standard MSP 430 opcodes. No additional
--pseudo-instructions are needed on this family.
--
-- For information on the 430 machine instruction set, see `MSP430
--User's Manual, document slau049d', Texas Instrument, Inc.
--
--
--File: as.info, Node: MSP430 Profiling Capability, Prev: MSP430 Opcodes, Up: MSP430-Dependent
--
--9.29.6 Profiling Capability
-----------------------------
--
--It is a performance hit to use gcc's profiling approach for this tiny
--target. Even more - jtag hardware facility does not perform any
--profiling functions. However we've got gdb's built-in simulator where
--we can do anything.
--
-- We define new section `.profiler' which holds all profiling
--information. We define new pseudo operation `.profiler' which will
--instruct assembler to add new profile entry to the object file. Profile
--should take place at the present address.
--
-- Pseudo operation format:
--
-- `.profiler flags,function_to_profile [, cycle_corrector, extra]'
--
-- where:
--
-- `flags' is a combination of the following characters:
--
-- `s'
-- function entry
--
-- `x'
-- function exit
--
-- `i'
-- function is in init section
--
-- `f'
-- function is in fini section
--
-- `l'
-- library call
--
-- `c'
-- libc standard call
--
-- `d'
-- stack value demand
--
-- `I'
-- interrupt service routine
--
-- `P'
-- prologue start
--
-- `p'
-- prologue end
--
-- `E'
-- epilogue start
--
-- `e'
-- epilogue end
--
-- `j'
-- long jump / sjlj unwind
--
-- `a'
-- an arbitrary code fragment
--
-- `t'
-- extra parameter saved (a constant value like frame size)
--
--`function_to_profile'
-- a function address
--
--`cycle_corrector'
-- a value which should be added to the cycle counter, zero if
-- omitted.
--
--`extra'
-- any extra parameter, zero if omitted.
--
--
-- For example:
-- .global fxx
-- .type fxx,@function
-- fxx:
-- .LFrameOffset_fxx=0x08
-- .profiler "scdP", fxx ; function entry.
-- ; we also demand stack value to be saved
-- push r11
-- push r10
-- push r9
-- push r8
-- .profiler "cdpt",fxx,0, .LFrameOffset_fxx ; check stack value at this point
-- ; (this is a prologue end)
-- ; note, that spare var filled with
-- ; the farme size
-- mov r15,r8
-- ...
-- .profiler cdE,fxx ; check stack
-- pop r8
-- pop r9
-- pop r10
-- pop r11
-- .profiler xcde,fxx,3 ; exit adds 3 to the cycle counter
-- ret ; cause 'ret' insn takes 3 cycles
--
--
--File: as.info, Node: NiosII-Dependent, Next: NS32K-Dependent, Prev: MSP430-Dependent, Up: Machine Dependencies
--
--9.30 Nios II Dependent Features
--===============================
--
--* Menu:
--
--* Nios II Options:: Options
--* Nios II Syntax:: Syntax
--* Nios II Relocations:: Relocations
--* Nios II Directives:: Nios II Machine Directives
--* Nios II Opcodes:: Opcodes
--
--
--File: as.info, Node: Nios II Options, Next: Nios II Syntax, Up: NiosII-Dependent
--
--9.30.1 Options
----------------
--
--`-relax-section'
-- Replace identified out-of-range branches with PC-relative `jmp'
-- sequences when possible. The generated code sequences are suitable
-- for use in position-independent code, but there is a practical
-- limit on the extended branch range because of the length of the
-- sequences. This option is the default.
--
--`-relax-all'
-- Replace branch instructions not determinable to be in range and
-- all call instructions with `jmp' and `callr' sequences
-- (respectively). This option generates absolute relocations
-- against the target symbols and is not appropriate for
-- position-independent code.
--
--`-no-relax'
-- Do not replace any branches or calls.
--
--`-EB'
-- Generate big-endian output.
--
--`-EL'
-- Generate little-endian output. This is the default.
--
--
--
--File: as.info, Node: Nios II Syntax, Next: Nios II Relocations, Prev: Nios II Options, Up: NiosII-Dependent
--
--9.30.2 Syntax
---------------
--
--* Menu:
--
--* Nios II Chars:: Special Characters
--
--
--File: as.info, Node: Nios II Chars, Up: Nios II Syntax
--
--9.30.2.1 Special Characters
--...........................
--
--`#' is the line comment character. `;' is the line separator character.
--
--
--File: as.info, Node: Nios II Relocations, Next: Nios II Directives, Prev: Nios II Syntax, Up: NiosII-Dependent
--
--9.30.3 Nios II Machine Relocations
------------------------------------
--
--`%hiadj(EXPRESSION)'
-- Extract the upper 16 bits of EXPRESSION and add one if the 15th
-- bit is set.
--
-- The value of `%hiadj(EXPRESSION)' is:
-- ((EXPRESSION >> 16) & 0xffff) + ((EXPRESSION >> 15) & 0x01)
--
-- The `%hiadj' relocation is intended to be used with the `addi',
-- `ld' or `st' instructions along with a `%lo', in order to load a
-- 32-bit constant.
--
-- movhi r2, %hiadj(symbol)
-- addi r2, r2, %lo(symbol)
--
--`%hi(EXPRESSION)'
-- Extract the upper 16 bits of EXPRESSION.
--
--`%lo(EXPRESSION)'
-- Extract the lower 16 bits of EXPRESSION.
--
--`%gprel(EXPRESSION)'
-- Subtract the value of the symbol `_gp' from EXPRESSION.
--
-- The intention of the `%gprel' relocation is to have a fast small
-- area of memory which only takes a 16-bit immediate to access.
--
-- .section .sdata
-- fastint:
-- .int 123
-- .section .text
-- ldw r4, %gprel(fastint)(gp)
--
--`%call(EXPRESSION)'
--`%got(EXPRESSION)'
--`%gotoff(EXPRESSION)'
--`%gotoff_lo(EXPRESSION)'
--`%gotoff_hiadj(EXPRESSION)'
--`%tls_gd(EXPRESSION)'
--`%tls_ie(EXPRESSION)'
--`%tls_le(EXPRESSION)'
--`%tls_ldm(EXPRESSION)'
--`%tls_ldo(EXPRESSION)'
-- These relocations support the ABI for Linux Systems documented in
-- the `Nios II Processor Reference Handbook'.
--
--
--File: as.info, Node: Nios II Directives, Next: Nios II Opcodes, Prev: Nios II Relocations, Up: NiosII-Dependent
--
--9.30.4 Nios II Machine Directives
-----------------------------------
--
--`.align EXPRESSION [, EXPRESSION]'
-- This is the generic `.align' directive, however this aligns to a
-- power of two.
--
--`.half EXPRESSION'
-- Create an aligned constant 2 bytes in size.
--
--`.word EXPRESSION'
-- Create an aligned constant 4 bytes in size.
--
--`.dword EXPRESSION'
-- Create an aligned constant 8 bytes in size.
--
--`.2byte EXPRESSION'
-- Create an unaligned constant 2 bytes in size.
--
--`.4byte EXPRESSION'
-- Create an unaligned constant 4 bytes in size.
--
--`.8byte EXPRESSION'
-- Create an unaligned constant 8 bytes in size.
--
--`.16byte EXPRESSION'
-- Create an unaligned constant 16 bytes in size.
--
--`.set noat'
-- Allows assembly code to use `at' register without warning. Macro
-- or relaxation expansions generate warnings.
--
--`.set at'
-- Assembly code using `at' register generates warnings, and macro
-- expansion and relaxation are enabled.
--
--`.set nobreak'
-- Allows assembly code to use `ba' and `bt' registers without
-- warning.
--
--`.set break'
-- Turns warnings back on for using `ba' and `bt' registers.
--
--`.set norelax'
-- Do not replace any branches or calls.
--
--`.set relaxsection'
-- Replace identified out-of-range branches with `jmp' sequences
-- (default).
--
--`.set relaxsection'
-- Replace all branch and call instructions with `jmp' and `callr'
-- sequences.
--
--`.set ...'
-- All other `.set' are the normal use.
--
--
--
--File: as.info, Node: Nios II Opcodes, Prev: Nios II Directives, Up: NiosII-Dependent
--
--9.30.5 Opcodes
----------------
--
--`as' implements all the standard Nios II opcodes documented in the
--`Nios II Processor Reference Handbook', including the assembler
--pseudo-instructions.
--
--
--File: as.info, Node: NS32K-Dependent, Next: SH-Dependent, Prev: NiosII-Dependent, Up: Machine Dependencies
--
--9.31 NS32K Dependent Features
--=============================
--
--* Menu:
--
--* NS32K Syntax:: Syntax
--
--
--File: as.info, Node: NS32K Syntax, Up: NS32K-Dependent
--
--9.31.1 Syntax
---------------
--
--* Menu:
--
--* NS32K-Chars:: Special Characters
--
--
--File: as.info, Node: NS32K-Chars, Up: NS32K Syntax
--
--9.31.1.1 Special Characters
--...........................
--
--The presence of a `#' appearing anywhere on a line indicates the start
--of a comment that extends to the end of that line.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line can also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- If Sequent compatibility has been configured into the assembler then
--the `|' character appearing as the first character on a line will also
--indicate the start of a line comment.
--
-- The `;' character can be used to separate statements on the same
--line.
--
--
--File: as.info, Node: PDP-11-Dependent, Next: PJ-Dependent, Prev: SH64-Dependent, Up: Machine Dependencies
--
--9.32 PDP-11 Dependent Features
--==============================
--
--* Menu:
--
--* PDP-11-Options:: Options
--* PDP-11-Pseudos:: Assembler Directives
--* PDP-11-Syntax:: DEC Syntax versus BSD Syntax
--* PDP-11-Mnemonics:: Instruction Naming
--* PDP-11-Synthetic:: Synthetic Instructions
--
--
--File: as.info, Node: PDP-11-Options, Next: PDP-11-Pseudos, Up: PDP-11-Dependent
--
--9.32.1 Options
----------------
--
--The PDP-11 version of `as' has a rich set of machine dependent options.
--
--9.32.1.1 Code Generation Options
--................................
--
--`-mpic | -mno-pic'
-- Generate position-independent (or position-dependent) code.
--
-- The default is to generate position-independent code.
--
--9.32.1.2 Instruction Set Extension Options
--..........................................
--
--These options enables or disables the use of extensions over the base
--line instruction set as introduced by the first PDP-11 CPU: the KA11.
--Most options come in two variants: a `-m'EXTENSION that enables
--EXTENSION, and a `-mno-'EXTENSION that disables EXTENSION.
--
-- The default is to enable all extensions.
--
--`-mall | -mall-extensions'
-- Enable all instruction set extensions.
--
--`-mno-extensions'
-- Disable all instruction set extensions.
--
--`-mcis | -mno-cis'
-- Enable (or disable) the use of the commercial instruction set,
-- which consists of these instructions: `ADDNI', `ADDN', `ADDPI',
-- `ADDP', `ASHNI', `ASHN', `ASHPI', `ASHP', `CMPCI', `CMPC',
-- `CMPNI', `CMPN', `CMPPI', `CMPP', `CVTLNI', `CVTLN', `CVTLPI',
-- `CVTLP', `CVTNLI', `CVTNL', `CVTNPI', `CVTNP', `CVTPLI', `CVTPL',
-- `CVTPNI', `CVTPN', `DIVPI', `DIVP', `L2DR', `L3DR', `LOCCI',
-- `LOCC', `MATCI', `MATC', `MOVCI', `MOVC', `MOVRCI', `MOVRC',
-- `MOVTCI', `MOVTC', `MULPI', `MULP', `SCANCI', `SCANC', `SKPCI',
-- `SKPC', `SPANCI', `SPANC', `SUBNI', `SUBN', `SUBPI', and `SUBP'.
--
--`-mcsm | -mno-csm'
-- Enable (or disable) the use of the `CSM' instruction.
--
--`-meis | -mno-eis'
-- Enable (or disable) the use of the extended instruction set, which
-- consists of these instructions: `ASHC', `ASH', `DIV', `MARK',
-- `MUL', `RTT', `SOB' `SXT', and `XOR'.
--
--`-mfis | -mkev11'
--`-mno-fis | -mno-kev11'
-- Enable (or disable) the use of the KEV11 floating-point
-- instructions: `FADD', `FDIV', `FMUL', and `FSUB'.
--
--`-mfpp | -mfpu | -mfp-11'
--`-mno-fpp | -mno-fpu | -mno-fp-11'
-- Enable (or disable) the use of FP-11 floating-point instructions:
-- `ABSF', `ADDF', `CFCC', `CLRF', `CMPF', `DIVF', `LDCFF', `LDCIF',
-- `LDEXP', `LDF', `LDFPS', `MODF', `MULF', `NEGF', `SETD', `SETF',
-- `SETI', `SETL', `STCFF', `STCFI', `STEXP', `STF', `STFPS', `STST',
-- `SUBF', and `TSTF'.
--
--`-mlimited-eis | -mno-limited-eis'
-- Enable (or disable) the use of the limited extended instruction
-- set: `MARK', `RTT', `SOB', `SXT', and `XOR'.
--
-- The -mno-limited-eis options also implies -mno-eis.
--
--`-mmfpt | -mno-mfpt'
-- Enable (or disable) the use of the `MFPT' instruction.
--
--`-mmultiproc | -mno-multiproc'
-- Enable (or disable) the use of multiprocessor instructions:
-- `TSTSET' and `WRTLCK'.
--
--`-mmxps | -mno-mxps'
-- Enable (or disable) the use of the `MFPS' and `MTPS' instructions.
--
--`-mspl | -mno-spl'
-- Enable (or disable) the use of the `SPL' instruction.
--
-- Enable (or disable) the use of the microcode instructions: `LDUB',
-- `MED', and `XFC'.
--
--9.32.1.3 CPU Model Options
--..........................
--
--These options enable the instruction set extensions supported by a
--particular CPU, and disables all other extensions.
--
--`-mka11'
-- KA11 CPU. Base line instruction set only.
--
--`-mkb11'
-- KB11 CPU. Enable extended instruction set and `SPL'.
--
--`-mkd11a'
-- KD11-A CPU. Enable limited extended instruction set.
--
--`-mkd11b'
-- KD11-B CPU. Base line instruction set only.
--
--`-mkd11d'
-- KD11-D CPU. Base line instruction set only.
--
--`-mkd11e'
-- KD11-E CPU. Enable extended instruction set, `MFPS', and `MTPS'.
--
--`-mkd11f | -mkd11h | -mkd11q'
-- KD11-F, KD11-H, or KD11-Q CPU. Enable limited extended
-- instruction set, `MFPS', and `MTPS'.
--
--`-mkd11k'
-- KD11-K CPU. Enable extended instruction set, `LDUB', `MED',
-- `MFPS', `MFPT', `MTPS', and `XFC'.
--
--`-mkd11z'
-- KD11-Z CPU. Enable extended instruction set, `CSM', `MFPS',
-- `MFPT', `MTPS', and `SPL'.
--
--`-mf11'
-- F11 CPU. Enable extended instruction set, `MFPS', `MFPT', and
-- `MTPS'.
--
--`-mj11'
-- J11 CPU. Enable extended instruction set, `CSM', `MFPS', `MFPT',
-- `MTPS', `SPL', `TSTSET', and `WRTLCK'.
--
--`-mt11'
-- T11 CPU. Enable limited extended instruction set, `MFPS', and
-- `MTPS'.
--
--9.32.1.4 Machine Model Options
--..............................
--
--These options enable the instruction set extensions supported by a
--particular machine model, and disables all other extensions.
--
--`-m11/03'
-- Same as `-mkd11f'.
--
--`-m11/04'
-- Same as `-mkd11d'.
--
--`-m11/05 | -m11/10'
-- Same as `-mkd11b'.
--
--`-m11/15 | -m11/20'
-- Same as `-mka11'.
--
--`-m11/21'
-- Same as `-mt11'.
--
--`-m11/23 | -m11/24'
-- Same as `-mf11'.
--
--`-m11/34'
-- Same as `-mkd11e'.
--
--`-m11/34a'
-- Ame as `-mkd11e' `-mfpp'.
--
--`-m11/35 | -m11/40'
-- Same as `-mkd11a'.
--
--`-m11/44'
-- Same as `-mkd11z'.
--
--`-m11/45 | -m11/50 | -m11/55 | -m11/70'
-- Same as `-mkb11'.
--
--`-m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94'
-- Same as `-mj11'.
--
--`-m11/60'
-- Same as `-mkd11k'.
--
--
--File: as.info, Node: PDP-11-Pseudos, Next: PDP-11-Syntax, Prev: PDP-11-Options, Up: PDP-11-Dependent
--
--9.32.2 Assembler Directives
-----------------------------
--
--The PDP-11 version of `as' has a few machine dependent assembler
--directives.
--
--`.bss'
-- Switch to the `bss' section.
--
--`.even'
-- Align the location counter to an even number.
--
--
--File: as.info, Node: PDP-11-Syntax, Next: PDP-11-Mnemonics, Prev: PDP-11-Pseudos, Up: PDP-11-Dependent
--
--9.32.3 PDP-11 Assembly Language Syntax
----------------------------------------
--
--`as' supports both DEC syntax and BSD syntax. The only difference is
--that in DEC syntax, a `#' character is used to denote an immediate
--constants, while in BSD syntax the character for this purpose is `$'.
--
-- general-purpose registers are named `r0' through `r7'. Mnemonic
--alternatives for `r6' and `r7' are `sp' and `pc', respectively.
--
-- Floating-point registers are named `ac0' through `ac3', or
--alternatively `fr0' through `fr3'.
--
-- Comments are started with a `#' or a `/' character, and extend to
--the end of the line. (FIXME: clash with immediates?)
--
-- Multiple statements on the same line can be separated by the `;'
--character.
--
--
--File: as.info, Node: PDP-11-Mnemonics, Next: PDP-11-Synthetic, Prev: PDP-11-Syntax, Up: PDP-11-Dependent
--
--9.32.4 Instruction Naming
---------------------------
--
--Some instructions have alternative names.
--
--`BCC'
-- `BHIS'
--
--`BCS'
-- `BLO'
--
--`L2DR'
-- `L2D'
--
--`L3DR'
-- `L3D'
--
--`SYS'
-- `TRAP'
--
--
--File: as.info, Node: PDP-11-Synthetic, Prev: PDP-11-Mnemonics, Up: PDP-11-Dependent
--
--9.32.5 Synthetic Instructions
-------------------------------
--
--The `JBR' and `J'CC synthetic instructions are not supported yet.
--
--
--File: as.info, Node: PJ-Dependent, Next: PPC-Dependent, Prev: PDP-11-Dependent, Up: Machine Dependencies
--
--9.33 picoJava Dependent Features
--================================
--
--* Menu:
--
--* PJ Options:: Options
--* PJ Syntax:: PJ Syntax
--
--
--File: as.info, Node: PJ Options, Next: PJ Syntax, Up: PJ-Dependent
--
--9.33.1 Options
----------------
--
--`as' has two additional command-line options for the picoJava
--architecture.
--`-ml'
-- This option selects little endian data output.
--
--`-mb'
-- This option selects big endian data output.
--
--
--File: as.info, Node: PJ Syntax, Prev: PJ Options, Up: PJ-Dependent
--
--9.33.2 PJ Syntax
------------------
--
--* Menu:
--
--* PJ-Chars:: Special Characters
--
--
--File: as.info, Node: PJ-Chars, Up: PJ Syntax
--
--9.33.2.1 Special Characters
--...........................
--
--The presence of a `!' or `/' on a line indicates the start of a comment
--that extends to the end of the current line.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line could also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- The `;' character can be used to separate statements on the same
--line.
--
--
--File: as.info, Node: PPC-Dependent, Next: RL78-Dependent, Prev: PJ-Dependent, Up: Machine Dependencies
--
--9.34 PowerPC Dependent Features
--===============================
--
--* Menu:
--
--* PowerPC-Opts:: Options
--* PowerPC-Pseudo:: PowerPC Assembler Directives
--* PowerPC-Syntax:: PowerPC Syntax
--
--
--File: as.info, Node: PowerPC-Opts, Next: PowerPC-Pseudo, Up: PPC-Dependent
--
--9.34.1 Options
----------------
--
--The PowerPC chip family includes several successive levels, using the
--same core instruction set, but including a few additional instructions
--at each level. There are exceptions to this however. For details on
--what instructions each variant supports, please see the chip's
--architecture reference manual.
--
-- The following table lists all available PowerPC options.
--
--`-a32'
-- Generate ELF32 or XCOFF32.
--
--`-a64'
-- Generate ELF64 or XCOFF64.
--
--`-K PIC'
-- Set EF_PPC_RELOCATABLE_LIB in ELF flags.
--
--`-mpwrx | -mpwr2'
-- Generate code for POWER/2 (RIOS2).
--
--`-mpwr'
-- Generate code for POWER (RIOS1)
--
--`-m601'
-- Generate code for PowerPC 601.
--
--`-mppc, -mppc32, -m603, -m604'
-- Generate code for PowerPC 603/604.
--
--`-m403, -m405'
-- Generate code for PowerPC 403/405.
--
--`-m440'
-- Generate code for PowerPC 440. BookE and some 405 instructions.
--
--`-m464'
-- Generate code for PowerPC 464.
--
--`-m476'
-- Generate code for PowerPC 476.
--
--`-m7400, -m7410, -m7450, -m7455'
-- Generate code for PowerPC 7400/7410/7450/7455.
--
--`-m750cl'
-- Generate code for PowerPC 750CL.
--
--`-mppc64, -m620'
-- Generate code for PowerPC 620/625/630.
--
--`-me500, -me500x2'
-- Generate code for Motorola e500 core complex.
--
--`-me500mc'
-- Generate code for Freescale e500mc core complex.
--
--`-me500mc64'
-- Generate code for Freescale e500mc64 core complex.
--
--`-me5500'
-- Generate code for Freescale e5500 core complex.
--
--`-me6500'
-- Generate code for Freescale e6500 core complex.
--
--`-mspe'
-- Generate code for Motorola SPE instructions.
--
--`-mtitan'
-- Generate code for AppliedMicro Titan core complex.
--
--`-mppc64bridge'
-- Generate code for PowerPC 64, including bridge insns.
--
--`-mbooke'
-- Generate code for 32-bit BookE.
--
--`-ma2'
-- Generate code for A2 architecture.
--
--`-me300'
-- Generate code for PowerPC e300 family.
--
--`-maltivec'
-- Generate code for processors with AltiVec instructions.
--
--`-mvle'
-- Generate code for Freescale PowerPC VLE instructions.
--
--`-mvsx'
-- Generate code for processors with Vector-Scalar (VSX) instructions.
--
--`-mhtm'
-- Generate code for processors with Hardware Transactional Memory
-- instructions.
--
--`-mpower4, -mpwr4'
-- Generate code for Power4 architecture.
--
--`-mpower5, -mpwr5, -mpwr5x'
-- Generate code for Power5 architecture.
--
--`-mpower6, -mpwr6'
-- Generate code for Power6 architecture.
--
--`-mpower7, -mpwr7'
-- Generate code for Power7 architecture.
--
--`-mpower8, -mpwr8'
-- Generate code for Power8 architecture.
--
--`-mcell'
--
--`-mcell'
-- Generate code for Cell Broadband Engine architecture.
--
--`-mcom'
-- Generate code Power/PowerPC common instructions.
--
--`-many'
-- Generate code for any architecture (PWR/PWRX/PPC).
--
--`-mregnames'
-- Allow symbolic names for registers.
--
--`-mno-regnames'
-- Do not allow symbolic names for registers.
--
--`-mrelocatable'
-- Support for GCC's -mrelocatable option.
--
--`-mrelocatable-lib'
-- Support for GCC's -mrelocatable-lib option.
--
--`-memb'
-- Set PPC_EMB bit in ELF flags.
--
--`-mlittle, -mlittle-endian, -le'
-- Generate code for a little endian machine.
--
--`-mbig, -mbig-endian, -be'
-- Generate code for a big endian machine.
--
--`-msolaris'
-- Generate code for Solaris.
--
--`-mno-solaris'
-- Do not generate code for Solaris.
--
--`-nops=COUNT'
-- If an alignment directive inserts more than COUNT nops, put a
-- branch at the beginning to skip execution of the nops.
--
--
--File: as.info, Node: PowerPC-Pseudo, Next: PowerPC-Syntax, Prev: PowerPC-Opts, Up: PPC-Dependent
--
--9.34.2 PowerPC Assembler Directives
-------------------------------------
--
--A number of assembler directives are available for PowerPC. The
--following table is far from complete.
--
--`.machine "string"'
-- This directive allows you to change the machine for which code is
-- generated. `"string"' may be any of the -m cpu selection options
-- (without the -m) enclosed in double quotes, `"push"', or `"pop"'.
-- `.machine "push"' saves the currently selected cpu, which may be
-- restored with `.machine "pop"'.
--
--
--File: as.info, Node: PowerPC-Syntax, Prev: PowerPC-Pseudo, Up: PPC-Dependent
--
--9.34.3 PowerPC Syntax
-----------------------
--
--* Menu:
--
--* PowerPC-Chars:: Special Characters
--
--
--File: as.info, Node: PowerPC-Chars, Up: PowerPC-Syntax
--
--9.34.3.1 Special Characters
--...........................
--
--The presence of a `#' on a line indicates the start of a comment that
--extends to the end of the current line.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line could also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- If the assembler has been configured for the ppc-*-solaris* target
--then the `!' character also acts as a line comment character. This can
--be disabled via the `-mno-solaris' command line option.
--
-- The `;' character can be used to separate statements on the same
--line.
--
--
--File: as.info, Node: RL78-Dependent, Next: RX-Dependent, Prev: PPC-Dependent, Up: Machine Dependencies
--
--9.35 RL78 Dependent Features
--============================
--
--* Menu:
--
--* RL78-Opts:: RL78 Assembler Command Line Options
--* RL78-Modifiers:: Symbolic Operand Modifiers
--* RL78-Directives:: Assembler Directives
--* RL78-Syntax:: Syntax
--
--
--File: as.info, Node: RL78-Opts, Next: RL78-Modifiers, Up: RL78-Dependent
--
--9.35.1 RL78 Options
---------------------
--
--`relax'
-- Enable support for link-time relaxation.
--
--`mg10'
-- Mark the generated binary as targeting the G10 variant of the RL78
-- architecture.
--
--
--
--File: as.info, Node: RL78-Modifiers, Next: RL78-Directives, Prev: RL78-Opts, Up: RL78-Dependent
--
--9.35.2 Symbolic Operand Modifiers
-----------------------------------
--
--The RL78 has three modifiers that adjust the relocations used by the
--linker:
--
--`%lo16()'
-- When loading a 20-bit (or wider) address into registers, this
-- modifier selects the 16 least significant bits.
--
-- movw ax,#%lo16(_sym)
--
--`%hi16()'
-- When loading a 20-bit (or wider) address into registers, this
-- modifier selects the 16 most significant bits.
--
-- movw ax,#%hi16(_sym)
--
--`%hi8()'
-- When loading a 20-bit (or wider) address into registers, this
-- modifier selects the 8 bits that would go into CS or ES (i.e. bits
-- 23..16).
--
-- mov es, #%hi8(_sym)
--
--
--
--File: as.info, Node: RL78-Directives, Next: RL78-Syntax, Prev: RL78-Modifiers, Up: RL78-Dependent
--
--9.35.3 Assembler Directives
-----------------------------
--
--In addition to the common directives, the RL78 adds these:
--
--`.double'
-- Output a constant in "double" format, which is a 32-bit floating
-- point value on RL78.
--
--`.bss'
-- Select the BSS section.
--
--`.3byte'
-- Output a constant value in a three byte format.
--
--`.int'
--`.word'
-- Output a constant value in a four byte format.
--
--
--
--File: as.info, Node: RL78-Syntax, Prev: RL78-Directives, Up: RL78-Dependent
--
--9.35.4 Syntax for the RL78
----------------------------
--
--* Menu:
--
--* RL78-Chars:: Special Characters
--
--
--File: as.info, Node: RL78-Chars, Up: RL78-Syntax
--
--9.35.4.1 Special Characters
--...........................
--
--The presence of a `;' appearing anywhere on a line indicates the start
--of a comment that extends to the end of that line.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line can also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- The `|' character can be used to separate statements on the same
--line.
--
--
--File: as.info, Node: RX-Dependent, Next: S/390-Dependent, Prev: RL78-Dependent, Up: Machine Dependencies
--
--9.36 RX Dependent Features
--==========================
--
--* Menu:
--
--* RX-Opts:: RX Assembler Command Line Options
--* RX-Modifiers:: Symbolic Operand Modifiers
--* RX-Directives:: Assembler Directives
--* RX-Float:: Floating Point
--* RX-Syntax:: Syntax
--
--
--File: as.info, Node: RX-Opts, Next: RX-Modifiers, Up: RX-Dependent
--
--9.36.1 RX Options
-------------------
--
--The Renesas RX port of `as' has a few target specfic command line
--options:
--
--`-m32bit-doubles'
-- This option controls the ABI and indicates to use a 32-bit float
-- ABI. It has no effect on the assembled instructions, but it does
-- influence the behaviour of the `.double' pseudo-op. This is the
-- default.
--
--`-m64bit-doubles'
-- This option controls the ABI and indicates to use a 64-bit float
-- ABI. It has no effect on the assembled instructions, but it does
-- influence the behaviour of the `.double' pseudo-op.
--
--`-mbig-endian'
-- This option controls the ABI and indicates to use a big-endian data
-- ABI. It has no effect on the assembled instructions, but it does
-- influence the behaviour of the `.short', `.hword', `.int',
-- `.word', `.long', `.quad' and `.octa' pseudo-ops.
--
--`-mlittle-endian'
-- This option controls the ABI and indicates to use a little-endian
-- data ABI. It has no effect on the assembled instructions, but it
-- does influence the behaviour of the `.short', `.hword', `.int',
-- `.word', `.long', `.quad' and `.octa' pseudo-ops. This is the
-- default.
--
--`-muse-conventional-section-names'
-- This option controls the default names given to the code (.text),
-- initialised data (.data) and uninitialised data sections (.bss).
--
--`-muse-renesas-section-names'
-- This option controls the default names given to the code (.P),
-- initialised data (.D_1) and uninitialised data sections (.B_1).
-- This is the default.
--
--`-msmall-data-limit'
-- This option tells the assembler that the small data limit feature
-- of the RX port of GCC is being used. This results in the assembler
-- generating an undefined reference to a symbol called `__gp' for
-- use by the relocations that are needed to support the small data
-- limit feature. This option is not enabled by default as it would
-- otherwise pollute the symbol table.
--
--`-mpid'
-- This option tells the assembler that the position independent data
-- of the RX port of GCC is being used. This results in the assembler
-- generating an undefined reference to a symbol called `__pid_base',
-- and also setting the RX_PID flag bit in the e_flags field of the
-- ELF header of the object file.
--
--`-mint-register=NUM'
-- This option tells the assembler how many registers have been
-- reserved for use by interrupt handlers. This is needed in order
-- to compute the correct values for the `%gpreg' and `%pidreg' meta
-- registers.
--
--`-mgcc-abi'
-- This option tells the assembler that the old GCC ABI is being used
-- by the assembled code. With this version of the ABI function
-- arguments that are passed on the stack are aligned to a 32-bit
-- boundary.
--
--`-mrx-abi'
-- This option tells the assembler that the official RX ABI is being
-- used by the assembled code. With this version of the ABI function
-- arguments that are passed on the stack are aligned to their natural
-- alignments. This option is the default.
--
--`-mcpu=NAME'
-- This option tells the assembler the target CPU type. Currently the
-- `rx200', `rx600' and `rx610' are recognised as valid cpu names.
-- Attempting to assemble an instruction not supported by the
-- indicated cpu type will result in an error message being generated.
--
--
--
--File: as.info, Node: RX-Modifiers, Next: RX-Directives, Prev: RX-Opts, Up: RX-Dependent
--
--9.36.2 Symbolic Operand Modifiers
-----------------------------------
--
--The assembler supports one modifier when using symbol addresses in RX
--instruction operands. The general syntax is the following:
--
-- %gp(symbol)
--
-- The modifier returns the offset from the __GP symbol to the
--specified symbol as a 16-bit value. The intent is that this offset
--should be used in a register+offset move instruction when generating
--references to small data. Ie, like this:
--
-- mov.W %gp(_foo)[%gpreg], r1
--
-- The assembler also supports two meta register names which can be used
--to refer to registers whose values may not be known to the programmer.
--These meta register names are:
--
--`%gpreg'
-- The small data address register.
--
--`%pidreg'
-- The PID base address register.
--
--
-- Both registers normally have the value r13, but this can change if
--some registers have been reserved for use by interrupt handlers or if
--both the small data limit and position independent data features are
--being used at the same time.
--
--
--File: as.info, Node: RX-Directives, Next: RX-Float, Prev: RX-Modifiers, Up: RX-Dependent
--
--9.36.3 Assembler Directives
-----------------------------
--
--The RX version of `as' has the following specific assembler directives:
--
--`.3byte'
-- Inserts a 3-byte value into the output file at the current
-- location.
--
--`.fetchalign'
-- If the next opcode following this directive spans a fetch line
-- boundary (8 byte boundary), the opcode is aligned to that boundary.
-- If the next opcode does not span a fetch line, this directive has
-- no effect. Note that one or more labels may be between this
-- directive and the opcode; those labels are aligned as well. Any
-- inserted bytes due to alignment will form a NOP opcode.
--
--
--
--File: as.info, Node: RX-Float, Next: RX-Syntax, Prev: RX-Directives, Up: RX-Dependent
--
--9.36.4 Floating Point
-----------------------
--
--The floating point formats generated by directives are these.
--
--`.float'
-- `Single' precision (32-bit) floating point constants.
--
--`.double'
-- If the `-m64bit-doubles' command line option has been specified
-- then then `double' directive generates `double' precision (64-bit)
-- floating point constants, otherwise it generates `single'
-- precision (32-bit) floating point constants. To force the
-- generation of 64-bit floating point constants used the `dc.d'
-- directive instead.
--
--
--
--File: as.info, Node: RX-Syntax, Prev: RX-Float, Up: RX-Dependent
--
--9.36.5 Syntax for the RX
--------------------------
--
--* Menu:
--
--* RX-Chars:: Special Characters
--
--
--File: as.info, Node: RX-Chars, Up: RX-Syntax
--
--9.36.5.1 Special Characters
--...........................
--
--The presence of a `;' appearing anywhere on a line indicates the start
--of a comment that extends to the end of that line.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line can also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- The `!' character can be used to separate statements on the same
--line.
--
--
--File: as.info, Node: S/390-Dependent, Next: SCORE-Dependent, Prev: RX-Dependent, Up: Machine Dependencies
--
--9.37 IBM S/390 Dependent Features
--=================================
--
-- The s390 version of `as' supports two architectures modes and seven
--chip levels. The architecture modes are the Enterprise System
--Architecture (ESA) and the newer z/Architecture mode. The chip levels
--are g5, g6, z900, z990, z9-109, z9-ec, z10, z196, and zEC12.
--
--* Menu:
--
--* s390 Options:: Command-line Options.
--* s390 Characters:: Special Characters.
--* s390 Syntax:: Assembler Instruction syntax.
--* s390 Directives:: Assembler Directives.
--* s390 Floating Point:: Floating Point.
--
--
--File: as.info, Node: s390 Options, Next: s390 Characters, Up: S/390-Dependent
--
--9.37.1 Options
----------------
--
--The following table lists all available s390 specific options:
--
--`-m31 | -m64'
-- Select 31- or 64-bit ABI implying a word size of 32- or 64-bit.
--
-- These options are only available with the ELF object file format,
-- and require that the necessary BFD support has been included (on a
-- 31-bit platform you must add -enable-64-bit-bfd on the call to the
-- configure script to enable 64-bit usage and use s390x as target
-- platform).
--
--`-mesa | -mzarch'
-- Select the architecture mode, either the Enterprise System
-- Architecture (esa) mode or the z/Architecture mode (zarch).
--
-- The 64-bit instructions are only available with the z/Architecture
-- mode. The combination of `-m64' and `-mesa' results in a warning
-- message.
--
--`-march=CPU'
-- This option specifies the target processor. The following
-- processor names are recognized: `g5', `g6', `z900', `z990',
-- `z9-109', `z9-ec', `z10' and `z196'. Assembling an instruction
-- that is not supported on the target processor results in an error
-- message. Do not specify `g5' or `g6' with `-mzarch'.
--
--`-mregnames'
-- Allow symbolic names for registers.
--
--`-mno-regnames'
-- Do not allow symbolic names for registers.
--
--`-mwarn-areg-zero'
-- Warn whenever the operand for a base or index register has been
-- specified but evaluates to zero. This can indicate the misuse of
-- general purpose register 0 as an address register.
--
--
--
--File: as.info, Node: s390 Characters, Next: s390 Syntax, Prev: s390 Options, Up: S/390-Dependent
--
--9.37.2 Special Characters
---------------------------
--
--`#' is the line comment character.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line could also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- The `;' character can be used instead of a newline to separate
--statements.
--
--
--File: as.info, Node: s390 Syntax, Next: s390 Directives, Prev: s390 Characters, Up: S/390-Dependent
--
--9.37.3 Instruction syntax
---------------------------
--
--The assembler syntax closely follows the syntax outlined in Enterprise
--Systems Architecture/390 Principles of Operation (SA22-7201) and the
--z/Architecture Principles of Operation (SA22-7832).
--
-- Each instruction has two major parts, the instruction mnemonic and
--the instruction operands. The instruction format varies.
--
--* Menu:
--
--* s390 Register:: Register Naming
--* s390 Mnemonics:: Instruction Mnemonics
--* s390 Operands:: Instruction Operands
--* s390 Formats:: Instruction Formats
--* s390 Aliases:: Instruction Aliases
--* s390 Operand Modifier:: Instruction Operand Modifier
--* s390 Instruction Marker:: Instruction Marker
--* s390 Literal Pool Entries:: Literal Pool Entries
--
--
--File: as.info, Node: s390 Register, Next: s390 Mnemonics, Up: s390 Syntax
--
--9.37.3.1 Register naming
--........................
--
--The `as' recognizes a number of predefined symbols for the various
--processor registers. A register specification in one of the instruction
--formats is an unsigned integer between 0 and 15. The specific
--instruction and the position of the register in the instruction format
--denotes the type of the register. The register symbols are prefixed with
--`%':
--
-- %rN the 16 general purpose registers, 0 <= N <= 15
-- %fN the 16 floating point registers, 0 <= N <= 15
-- %aN the 16 access registers, 0 <= N <= 15
-- %cN the 16 control registers, 0 <= N <= 15
-- %lit an alias for the general purpose register %r13
-- %sp an alias for the general purpose register %r15
--
--
--File: as.info, Node: s390 Mnemonics, Next: s390 Operands, Prev: s390 Register, Up: s390 Syntax
--
--9.37.3.2 Instruction Mnemonics
--..............................
--
--All instructions documented in the Principles of Operation are supported
--with the mnemonic and order of operands as described. The instruction
--mnemonic identifies the instruction format (*Note s390 Formats::) and
--the specific operation code for the instruction. For example, the `lr'
--mnemonic denotes the instruction format `RR' with the operation code
--`0x18'.
--
-- The definition of the various mnemonics follows a scheme, where the
--first character usually hint at the type of the instruction:
--
-- a add instruction, for example `al' for add logical 32-bit
-- b branch instruction, for example `bc' for branch on condition
-- c compare or convert instruction, for example `cr' for compare
-- register 32-bit
-- d divide instruction, for example `dlr' devide logical register
-- 64-bit to 32-bit
-- i insert instruction, for example `ic' insert character
-- l load instruction, for example `ltr' load and test register
-- mv move instruction, for example `mvc' move character
-- m multiply instruction, for example `mh' multiply halfword
-- n and instruction, for example `ni' and immediate
-- o or instruction, for example `oc' or character
-- sla, sll shift left single instruction
-- sra, srl shift right single instruction
-- st store instruction, for example `stm' store multiple
-- s subtract instruction, for example `slr' subtract
-- logical 32-bit
-- t test or translate instruction, of example `tm' test under mask
-- x exclusive or instruction, for example `xc' exclusive or
-- character
--
-- Certain characters at the end of the mnemonic may describe a property
--of the instruction:
--
-- c the instruction uses a 8-bit character operand
-- f the instruction extends a 32-bit operand to 64 bit
-- g the operands are treated as 64-bit values
-- h the operand uses a 16-bit halfword operand
-- i the instruction uses an immediate operand
-- l the instruction uses unsigned, logical operands
-- m the instruction uses a mask or operates on multiple values
-- r if r is the last character, the instruction operates on registers
-- y the instruction uses 20-bit displacements
--
-- There are many exceptions to the scheme outlined in the above lists,
--in particular for the priviledged instructions. For non-priviledged
--instruction it works quite well, for example the instruction `clgfr' c:
--compare instruction, l: unsigned operands, g: 64-bit operands, f: 32-
--to 64-bit extension, r: register operands. The instruction compares an
--64-bit value in a register with the zero extended 32-bit value from a
--second register. For a complete list of all mnemonics see appendix B
--in the Principles of Operation.
--
--
--File: as.info, Node: s390 Operands, Next: s390 Formats, Prev: s390 Mnemonics, Up: s390 Syntax
--
--9.37.3.3 Instruction Operands
--.............................
--
--Instruction operands can be grouped into three classes, operands located
--in registers, immediate operands, and operands in storage.
--
-- A register operand can be located in general, floating-point, access,
--or control register. The register is identified by a four-bit field.
--The field containing the register operand is called the R field.
--
-- Immediate operands are contained within the instruction and can have
--8, 16 or 32 bits. The field containing the immediate operand is called
--the I field. Dependent on the instruction the I field is either signed
--or unsigned.
--
-- A storage operand consists of an address and a length. The address
--of a storage operands can be specified in any of these ways:
--
-- * The content of a single general R
--
-- * The sum of the content of a general register called the base
-- register B plus the content of a displacement field D
--
-- * The sum of the contents of two general registers called the index
-- register X and the base register B plus the content of a
-- displacement field
--
-- * The sum of the current instruction address and a 32-bit signed
-- immediate field multiplied by two.
--
-- The length of a storage operand can be:
--
-- * Implied by the instruction
--
-- * Specified by a bitmask
--
-- * Specified by a four-bit or eight-bit length field L
--
-- * Specified by the content of a general register
--
-- The notation for storage operand addresses formed from multiple
--fields is as follows:
--
--`Dn(Bn)'
-- the address for operand number n is formed from the content of
-- general register Bn called the base register and the displacement
-- field Dn.
--
--`Dn(Xn,Bn)'
-- the address for operand number n is formed from the content of
-- general register Xn called the index register, general register Bn
-- called the base register and the displacement field Dn.
--
--`Dn(Ln,Bn)'
-- the address for operand number n is formed from the content of
-- general regiser Bn called the base register and the displacement
-- field Dn. The length of the operand n is specified by the field
-- Ln.
--
-- The base registers Bn and the index registers Xn of a storage
--operand can be skipped. If Bn and Xn are skipped, a zero will be stored
--to the operand field. The notation changes as follows:
--
-- full notation short notation
-- ------------------------------------------
-- Dn(0,Bn) Dn(Bn)
-- Dn(0,0) Dn
-- Dn(0) Dn
-- Dn(Ln,0) Dn(Ln)
--
--
--File: as.info, Node: s390 Formats, Next: s390 Aliases, Prev: s390 Operands, Up: s390 Syntax
--
--9.37.3.4 Instruction Formats
--............................
--
--The Principles of Operation manuals lists 26 instruction formats where
--some of the formats have multiple variants. For the `.insn' pseudo
--directive the assembler recognizes some of the formats. Typically, the
--most general variant of the instruction format is used by the `.insn'
--directive.
--
-- The following table lists the abbreviations used in the table of
--instruction formats:
--
-- OpCode / OpCd Part of the op code.
-- Bx Base register number for operand x.
-- Dx Displacement for operand x.
-- DLx Displacement lower 12 bits for operand x.
-- DHx Displacement higher 8-bits for operand x.
-- Rx Register number for operand x.
-- Xx Index register number for operand x.
-- Ix Signed immediate for operand x.
-- Ux Unsigned immediate for operand x.
--
-- An instruction is two, four, or six bytes in length and must be
--aligned on a 2 byte boundary. The first two bits of the instruction
--specify the length of the instruction, 00 indicates a two byte
--instruction, 01 and 10 indicates a four byte instruction, and 11
--indicates a six byte instruction.
--
-- The following table lists the s390 instruction formats that are
--available with the `.insn' pseudo directive:
--
--`E format'
--
-- +-------------+
-- | OpCode |
-- +-------------+
-- 0 15
--
--`RI format: <insn> R1,I2'
--
-- +--------+----+----+------------------+
-- | OpCode | R1 |OpCd| I2 |
-- +--------+----+----+------------------+
-- 0 8 12 16 31
--
--`RIE format: <insn> R1,R3,I2'
--
-- +--------+----+----+------------------+--------+--------+
-- | OpCode | R1 | R3 | I2 |////////| OpCode |
-- +--------+----+----+------------------+--------+--------+
-- 0 8 12 16 32 40 47
--
--`RIL format: <insn> R1,I2'
--
-- +--------+----+----+------------------------------------+
-- | OpCode | R1 |OpCd| I2 |
-- +--------+----+----+------------------------------------+
-- 0 8 12 16 47
--
--`RILU format: <insn> R1,U2'
--
-- +--------+----+----+------------------------------------+
-- | OpCode | R1 |OpCd| U2 |
-- +--------+----+----+------------------------------------+
-- 0 8 12 16 47
--
--`RIS format: <insn> R1,I2,M3,D4(B4)'
--
-- +--------+----+----+----+-------------+--------+--------+
-- | OpCode | R1 | M3 | B4 | D4 | I2 | Opcode |
-- +--------+----+----+----+-------------+--------+--------+
-- 0 8 12 16 20 32 36 47
--
--`RR format: <insn> R1,R2'
--
-- +--------+----+----+
-- | OpCode | R1 | R2 |
-- +--------+----+----+
-- 0 8 12 15
--
--`RRE format: <insn> R1,R2'
--
-- +------------------+--------+----+----+
-- | OpCode |////////| R1 | R2 |
-- +------------------+--------+----+----+
-- 0 16 24 28 31
--
--`RRF format: <insn> R1,R2,R3,M4'
--
-- +------------------+----+----+----+----+
-- | OpCode | R3 | M4 | R1 | R2 |
-- +------------------+----+----+----+----+
-- 0 16 20 24 28 31
--
--`RRS format: <insn> R1,R2,M3,D4(B4)'
--
-- +--------+----+----+----+-------------+----+----+--------+
-- | OpCode | R1 | R3 | B4 | D4 | M3 |////| OpCode |
-- +--------+----+----+----+-------------+----+----+--------+
-- 0 8 12 16 20 32 36 40 47
--
--`RS format: <insn> R1,R3,D2(B2)'
--
-- +--------+----+----+----+-------------+
-- | OpCode | R1 | R3 | B2 | D2 |
-- +--------+----+----+----+-------------+
-- 0 8 12 16 20 31
--
--`RSE format: <insn> R1,R3,D2(B2)'
--
-- +--------+----+----+----+-------------+--------+--------+
-- | OpCode | R1 | R3 | B2 | D2 |////////| OpCode |
-- +--------+----+----+----+-------------+--------+--------+
-- 0 8 12 16 20 32 40 47
--
--`RSI format: <insn> R1,R3,I2'
--
-- +--------+----+----+------------------------------------+
-- | OpCode | R1 | R3 | I2 |
-- +--------+----+----+------------------------------------+
-- 0 8 12 16 47
--
--`RSY format: <insn> R1,R3,D2(B2)'
--
-- +--------+----+----+----+-------------+--------+--------+
-- | OpCode | R1 | R3 | B2 | DL2 | DH2 | OpCode |
-- +--------+----+----+----+-------------+--------+--------+
-- 0 8 12 16 20 32 40 47
--
--`RX format: <insn> R1,D2(X2,B2)'
--
-- +--------+----+----+----+-------------+
-- | OpCode | R1 | X2 | B2 | D2 |
-- +--------+----+----+----+-------------+
-- 0 8 12 16 20 31
--
--`RXE format: <insn> R1,D2(X2,B2)'
--
-- +--------+----+----+----+-------------+--------+--------+
-- | OpCode | R1 | X2 | B2 | D2 |////////| OpCode |
-- +--------+----+----+----+-------------+--------+--------+
-- 0 8 12 16 20 32 40 47
--
--`RXF format: <insn> R1,R3,D2(X2,B2)'
--
-- +--------+----+----+----+-------------+----+---+--------+
-- | OpCode | R3 | X2 | B2 | D2 | R1 |///| OpCode |
-- +--------+----+----+----+-------------+----+---+--------+
-- 0 8 12 16 20 32 36 40 47
--
--`RXY format: <insn> R1,D2(X2,B2)'
--
-- +--------+----+----+----+-------------+--------+--------+
-- | OpCode | R1 | X2 | B2 | DL2 | DH2 | OpCode |
-- +--------+----+----+----+-------------+--------+--------+
-- 0 8 12 16 20 32 36 40 47
--
--`S format: <insn> D2(B2)'
--
-- +------------------+----+-------------+
-- | OpCode | B2 | D2 |
-- +------------------+----+-------------+
-- 0 16 20 31
--
--`SI format: <insn> D1(B1),I2'
--
-- +--------+---------+----+-------------+
-- | OpCode | I2 | B1 | D1 |
-- +--------+---------+----+-------------+
-- 0 8 16 20 31
--
--`SIY format: <insn> D1(B1),U2'
--
-- +--------+---------+----+-------------+--------+--------+
-- | OpCode | I2 | B1 | DL1 | DH1 | OpCode |
-- +--------+---------+----+-------------+--------+--------+
-- 0 8 16 20 32 36 40 47
--
--`SIL format: <insn> D1(B1),I2'
--
-- +------------------+----+-------------+-----------------+
-- | OpCode | B1 | D1 | I2 |
-- +------------------+----+-------------+-----------------+
-- 0 16 20 32 47
--
--`SS format: <insn> D1(R1,B1),D2(B3),R3'
--
-- +--------+----+----+----+-------------+----+------------+
-- | OpCode | R1 | R3 | B1 | D1 | B2 | D2 |
-- +--------+----+----+----+-------------+----+------------+
-- 0 8 12 16 20 32 36 47
--
--`SSE format: <insn> D1(B1),D2(B2)'
--
-- +------------------+----+-------------+----+------------+
-- | OpCode | B1 | D1 | B2 | D2 |
-- +------------------+----+-------------+----+------------+
-- 0 8 12 16 20 32 36 47
--
--`SSF format: <insn> D1(B1),D2(B2),R3'
--
-- +--------+----+----+----+-------------+----+------------+
-- | OpCode | R3 |OpCd| B1 | D1 | B2 | D2 |
-- +--------+----+----+----+-------------+----+------------+
-- 0 8 12 16 20 32 36 47
--
--
-- For the complete list of all instruction format variants see the
--Principles of Operation manuals.
--
--
--File: as.info, Node: s390 Aliases, Next: s390 Operand Modifier, Prev: s390 Formats, Up: s390 Syntax
--
--9.37.3.5 Instruction Aliases
--............................
--
--A specific bit pattern can have multiple mnemonics, for example the bit
--pattern `0xa7000000' has the mnemonics `tmh' and `tmlh'. In addition,
--there are a number of mnemonics recognized by `as' that are not present
--in the Principles of Operation. These are the short forms of the
--branch instructions, where the condition code mask operand is encoded
--in the mnemonic. This is relevant for the branch instructions, the
--compare and branch instructions, and the compare and trap instructions.
--
-- For the branch instructions there are 20 condition code strings that
--can be used as part of the mnemonic in place of a mask operand in the
--instruction format:
--
-- instruction short form
-- ------------------------------------------
-- bcr M1,R2 b<m>r R2
-- bc M1,D2(X2,B2) b<m> D2(X2,B2)
-- brc M1,I2 j<m> I2
-- brcl M1,I2 jg<m> I2
--
-- In the mnemonic for a branch instruction the condition code string
--<m> can be any of the following:
--
-- o jump on overflow / if ones
-- h jump on A high
-- p jump on plus
-- nle jump on not low or equal
-- l jump on A low
-- m jump on minus
-- nhe jump on not high or equal
-- lh jump on low or high
-- ne jump on A not equal B
-- nz jump on not zero / if not zeros
-- e jump on A equal B
-- z jump on zero / if zeroes
-- nlh jump on not low or high
-- he jump on high or equal
-- nl jump on A not low
-- nm jump on not minus / if not mixed
-- le jump on low or equal
-- nh jump on A not high
-- np jump on not plus
-- no jump on not overflow / if not ones
--
-- For the compare and branch, and compare and trap instructions there
--are 12 condition code strings that can be used as part of the mnemonic
--in place of a mask operand in the instruction format:
--
-- instruction short form
-- --------------------------------------------------------
-- crb R1,R2,M3,D4(B4) crb<m> R1,R2,D4(B4)
-- cgrb R1,R2,M3,D4(B4) cgrb<m> R1,R2,D4(B4)
-- crj R1,R2,M3,I4 crj<m> R1,R2,I4
-- cgrj R1,R2,M3,I4 cgrj<m> R1,R2,I4
-- cib R1,I2,M3,D4(B4) cib<m> R1,I2,D4(B4)
-- cgib R1,I2,M3,D4(B4) cgib<m> R1,I2,D4(B4)
-- cij R1,I2,M3,I4 cij<m> R1,I2,I4
-- cgij R1,I2,M3,I4 cgij<m> R1,I2,I4
-- crt R1,R2,M3 crt<m> R1,R2
-- cgrt R1,R2,M3 cgrt<m> R1,R2
-- cit R1,I2,M3 cit<m> R1,I2
-- cgit R1,I2,M3 cgit<m> R1,I2
-- clrb R1,R2,M3,D4(B4) clrb<m> R1,R2,D4(B4)
-- clgrb R1,R2,M3,D4(B4) clgrb<m> R1,R2,D4(B4)
-- clrj R1,R2,M3,I4 clrj<m> R1,R2,I4
-- clgrj R1,R2,M3,I4 clgrj<m> R1,R2,I4
-- clib R1,I2,M3,D4(B4) clib<m> R1,I2,D4(B4)
-- clgib R1,I2,M3,D4(B4) clgib<m> R1,I2,D4(B4)
-- clij R1,I2,M3,I4 clij<m> R1,I2,I4
-- clgij R1,I2,M3,I4 clgij<m> R1,I2,I4
-- clrt R1,R2,M3 clrt<m> R1,R2
-- clgrt R1,R2,M3 clgrt<m> R1,R2
-- clfit R1,I2,M3 clfit<m> R1,I2
-- clgit R1,I2,M3 clgit<m> R1,I2
--
-- In the mnemonic for a compare and branch and compare and trap
--instruction the condition code string <m> can be any of the following:
--
-- h jump on A high
-- nle jump on not low or equal
-- l jump on A low
-- nhe jump on not high or equal
-- ne jump on A not equal B
-- lh jump on low or high
-- e jump on A equal B
-- nlh jump on not low or high
-- nl jump on A not low
-- he jump on high or equal
-- nh jump on A not high
-- le jump on low or equal
--
--
--File: as.info, Node: s390 Operand Modifier, Next: s390 Instruction Marker, Prev: s390 Aliases, Up: s390 Syntax
--
--9.37.3.6 Instruction Operand Modifier
--.....................................
--
--If a symbol modifier is attached to a symbol in an expression for an
--instruction operand field, the symbol term is replaced with a reference
--to an object in the global offset table (GOT) or the procedure linkage
--table (PLT). The following expressions are allowed: `symbol@modifier +
--constant', `symbol@modifier + label + constant', and `symbol@modifier -
--label + constant'. The term `symbol' is the symbol that will be
--entered into the GOT or PLT, `label' is a local label, and `constant'
--is an arbitrary expression that the assembler can evaluate to a
--constant value.
--
-- The term `(symbol + constant1)@modifier +/- label + constant2' is
--also accepted but a warning message is printed and the term is
--converted to `symbol@modifier +/- label + constant1 + constant2'.
--
--`@got'
--`@got12'
-- The @got modifier can be used for displacement fields, 16-bit
-- immediate fields and 32-bit pc-relative immediate fields. The
-- @got12 modifier is synonym to @got. The symbol is added to the
-- GOT. For displacement fields and 16-bit immediate fields the
-- symbol term is replaced with the offset from the start of the GOT
-- to the GOT slot for the symbol. For a 32-bit pc-relative field
-- the pc-relative offset to the GOT slot from the current
-- instruction address is used.
--
--`@gotent'
-- The @gotent modifier can be used for 32-bit pc-relative immediate
-- fields. The symbol is added to the GOT and the symbol term is
-- replaced with the pc-relative offset from the current instruction
-- to the GOT slot for the symbol.
--
--`@gotoff'
-- The @gotoff modifier can be used for 16-bit immediate fields. The
-- symbol term is replaced with the offset from the start of the GOT
-- to the address of the symbol.
--
--`@gotplt'
-- The @gotplt modifier can be used for displacement fields, 16-bit
-- immediate fields, and 32-bit pc-relative immediate fields. A
-- procedure linkage table entry is generated for the symbol and a
-- jump slot for the symbol is added to the GOT. For displacement
-- fields and 16-bit immediate fields the symbol term is replaced
-- with the offset from the start of the GOT to the jump slot for the
-- symbol. For a 32-bit pc-relative field the pc-relative offset to
-- the jump slot from the current instruction address is used.
--
--`@plt'
-- The @plt modifier can be used for 16-bit and 32-bit pc-relative
-- immediate fields. A procedure linkage table entry is generated for
-- the symbol. The symbol term is replaced with the relative offset
-- from the current instruction to the PLT entry for the symbol.
--
--`@pltoff'
-- The @pltoff modifier can be used for 16-bit immediate fields. The
-- symbol term is replaced with the offset from the start of the PLT
-- to the address of the symbol.
--
--`@gotntpoff'
-- The @gotntpoff modifier can be used for displacement fields. The
-- symbol is added to the static TLS block and the negated offset to
-- the symbol in the static TLS block is added to the GOT. The symbol
-- term is replaced with the offset to the GOT slot from the start of
-- the GOT.
--
--`@indntpoff'
-- The @indntpoff modifier can be used for 32-bit pc-relative
-- immediate fields. The symbol is added to the static TLS block and
-- the negated offset to the symbol in the static TLS block is added
-- to the GOT. The symbol term is replaced with the pc-relative
-- offset to the GOT slot from the current instruction address.
--
-- For more information about the thread local storage modifiers
--`gotntpoff' and `indntpoff' see the ELF extension documentation `ELF
--Handling For Thread-Local Storage'.
--
--
--File: as.info, Node: s390 Instruction Marker, Next: s390 Literal Pool Entries, Prev: s390 Operand Modifier, Up: s390 Syntax
--
--9.37.3.7 Instruction Marker
--...........................
--
--The thread local storage instruction markers are used by the linker to
--perform code optimization.
--
--`:tls_load'
-- The :tls_load marker is used to flag the load instruction in the
-- initial exec TLS model that retrieves the offset from the thread
-- pointer to a thread local storage variable from the GOT.
--
--`:tls_gdcall'
-- The :tls_gdcall marker is used to flag the branch-and-save
-- instruction to the __tls_get_offset function in the global dynamic
-- TLS model.
--
--`:tls_ldcall'
-- The :tls_ldcall marker is used to flag the branch-and-save
-- instruction to the __tls_get_offset function in the local dynamic
-- TLS model.
--
-- For more information about the thread local storage instruction
--marker and the linker optimizations see the ELF extension documentation
--`ELF Handling For Thread-Local Storage'.
--
--
--File: as.info, Node: s390 Literal Pool Entries, Prev: s390 Instruction Marker, Up: s390 Syntax
--
--9.37.3.8 Literal Pool Entries
--.............................
--
--A literal pool is a collection of values. To access the values a pointer
--to the literal pool is loaded to a register, the literal pool register.
--Usually, register %r13 is used as the literal pool register (*Note s390
--Register::). Literal pool entries are created by adding the suffix
--:lit1, :lit2, :lit4, or :lit8 to the end of an expression for an
--instruction operand. The expression is added to the literal pool and the
--operand is replaced with the offset to the literal in the literal pool.
--
--`:lit1'
-- The literal pool entry is created as an 8-bit value. An operand
-- modifier must not be used for the original expression.
--
--`:lit2'
-- The literal pool entry is created as a 16 bit value. The operand
-- modifier @got may be used in the original expression. The term
-- `x@got:lit2' will put the got offset for the global symbol x to
-- the literal pool as 16 bit value.
--
--`:lit4'
-- The literal pool entry is created as a 32-bit value. The operand
-- modifier @got and @plt may be used in the original expression. The
-- term `x@got:lit4' will put the got offset for the global symbol x
-- to the literal pool as a 32-bit value. The term `x@plt:lit4' will
-- put the plt offset for the global symbol x to the literal pool as
-- a 32-bit value.
--
--`:lit8'
-- The literal pool entry is created as a 64-bit value. The operand
-- modifier @got and @plt may be used in the original expression. The
-- term `x@got:lit8' will put the got offset for the global symbol x
-- to the literal pool as a 64-bit value. The term `x@plt:lit8' will
-- put the plt offset for the global symbol x to the literal pool as
-- a 64-bit value.
--
-- The assembler directive `.ltorg' is used to emit all literal pool
--entries to the current position.
--
--
--File: as.info, Node: s390 Directives, Next: s390 Floating Point, Prev: s390 Syntax, Up: S/390-Dependent
--
--9.37.4 Assembler Directives
-----------------------------
--
--`as' for s390 supports all of the standard ELF assembler directives as
--outlined in the main part of this document. Some directives have been
--extended and there are some additional directives, which are only
--available for the s390 `as'.
--
--`.insn'
-- This directive permits the numeric representation of an
-- instructions and makes the assembler insert the operands according
-- to one of the instructions formats for `.insn' (*Note s390
-- Formats::). For example, the instruction `l %r1,24(%r15)' could
-- be written as `.insn rx,0x58000000,%r1,24(%r15)'.
--
--`.short'
--`.long'
--`.quad'
-- This directive places one or more 16-bit (.short), 32-bit (.long),
-- or 64-bit (.quad) values into the current section. If an ELF or
-- TLS modifier is used only the following expressions are allowed:
-- `symbol@modifier + constant', `symbol@modifier + label +
-- constant', and `symbol@modifier - label + constant'. The
-- following modifiers are available:
-- `@got'
-- `@got12'
-- The @got modifier can be used for .short, .long and .quad.
-- The @got12 modifier is synonym to @got. The symbol is added
-- to the GOT. The symbol term is replaced with offset from the
-- start of the GOT to the GOT slot for the symbol.
--
-- `@gotoff'
-- The @gotoff modifier can be used for .short, .long and .quad.
-- The symbol term is replaced with the offset from the start of
-- the GOT to the address of the symbol.
--
-- `@gotplt'
-- The @gotplt modifier can be used for .long and .quad. A
-- procedure linkage table entry is generated for the symbol and
-- a jump slot for the symbol is added to the GOT. The symbol
-- term is replaced with the offset from the start of the GOT to
-- the jump slot for the symbol.
--
-- `@plt'
-- The @plt modifier can be used for .long and .quad. A
-- procedure linkage table entry us generated for the symbol.
-- The symbol term is replaced with the address of the PLT entry
-- for the symbol.
--
-- `@pltoff'
-- The @pltoff modifier can be used for .short, .long and .quad.
-- The symbol term is replaced with the offset from the start of
-- the PLT to the address of the symbol.
--
-- `@tlsgd'
-- `@tlsldm'
-- The @tlsgd and @tlsldm modifier can be used for .long and
-- .quad. A tls_index structure for the symbol is added to the
-- GOT. The symbol term is replaced with the offset from the
-- start of the GOT to the tls_index structure.
--
-- `@gotntpoff'
-- `@indntpoff'
-- The @gotntpoff and @indntpoff modifier can be used for .long
-- and .quad. The symbol is added to the static TLS block and
-- the negated offset to the symbol in the static TLS block is
-- added to the GOT. For @gotntpoff the symbol term is replaced
-- with the offset from the start of the GOT to the GOT slot,
-- for @indntpoff the symbol term is replaced with the address
-- of the GOT slot.
--
-- `@dtpoff'
-- The @dtpoff modifier can be used for .long and .quad. The
-- symbol term is replaced with the offset of the symbol
-- relative to the start of the TLS block it is contained in.
--
-- `@ntpoff'
-- The @ntpoff modifier can be used for .long and .quad. The
-- symbol term is replaced with the offset of the symbol
-- relative to the TCB pointer.
--
-- For more information about the thread local storage modifiers see
-- the ELF extension documentation `ELF Handling For Thread-Local
-- Storage'.
--
--`.ltorg'
-- This directive causes the current contents of the literal pool to
-- be dumped to the current location (*Note s390 Literal Pool
-- Entries::).
--
--`.machine string'
-- This directive allows you to change the machine for which code is
-- generated. `string' may be any of the `-march=' selection options
-- (without the -march=), `push', or `pop'. `.machine push' saves
-- the currently selected cpu, which may be restored with `.machine
-- pop'. Be aware that the cpu string has to be put into double
-- quotes in case it contains characters not appropriate for
-- identifiers. So you have to write `"z9-109"' instead of just
-- `z9-109'.
--
--`.machinemode string'
-- This directive allows to change the architecture mode for which
-- code is being generated. `string' may be `esa', `zarch',
-- `zarch_nohighgprs', `push', or `pop'. `.machinemode
-- zarch_nohighgprs' can be used to prevent the `highgprs' flag from
-- being set in the ELF header of the output file. This is useful in
-- situations where the code is gated with a runtime check which
-- makes sure that the code is only executed on kernels providing the
-- `highgprs' feature. `.machinemode push' saves the currently
-- selected mode, which may be restored with `.machinemode pop'.
--
--
--File: as.info, Node: s390 Floating Point, Prev: s390 Directives, Up: S/390-Dependent
--
--9.37.5 Floating Point
-----------------------
--
--The assembler recognizes both the IEEE floating-point instruction and
--the hexadecimal floating-point instructions. The floating-point
--constructors `.float', `.single', and `.double' always emit the IEEE
--format. To assemble hexadecimal floating-point constants the `.long'
--and `.quad' directives must be used.
--
--
--File: as.info, Node: SCORE-Dependent, Next: Sparc-Dependent, Prev: S/390-Dependent, Up: Machine Dependencies
--
--9.38 SCORE Dependent Features
--=============================
--
--* Menu:
--
--* SCORE-Opts:: Assembler options
--* SCORE-Pseudo:: SCORE Assembler Directives
--* SCORE-Syntax:: Syntax
--
--
--File: as.info, Node: SCORE-Opts, Next: SCORE-Pseudo, Up: SCORE-Dependent
--
--9.38.1 Options
----------------
--
--The following table lists all available SCORE options.
--
--`-G NUM'
-- This option sets the largest size of an object that can be
-- referenced implicitly with the `gp' register. The default value is
-- 8.
--
--`-EB'
-- Assemble code for a big-endian cpu
--
--`-EL'
-- Assemble code for a little-endian cpu
--
--`-FIXDD'
-- Assemble code for fix data dependency
--
--`-NWARN'
-- Assemble code for no warning message for fix data dependency
--
--`-SCORE5'
-- Assemble code for target is SCORE5
--
--`-SCORE5U'
-- Assemble code for target is SCORE5U
--
--`-SCORE7'
-- Assemble code for target is SCORE7, this is default setting
--
--`-SCORE3'
-- Assemble code for target is SCORE3
--
--`-march=score7'
-- Assemble code for target is SCORE7, this is default setting
--
--`-march=score3'
-- Assemble code for target is SCORE3
--
--`-USE_R1'
-- Assemble code for no warning message when using temp register r1
--
--`-KPIC'
-- Generate code for PIC. This option tells the assembler to generate
-- score position-independent macro expansions. It also tells the
-- assembler to mark the output file as PIC.
--
--`-O0'
-- Assembler will not perform any optimizations
--
--`-V'
-- Sunplus release version
--
--
--
--File: as.info, Node: SCORE-Pseudo, Next: SCORE-Syntax, Prev: SCORE-Opts, Up: SCORE-Dependent
--
--9.38.2 SCORE Assembler Directives
-----------------------------------
--
--A number of assembler directives are available for SCORE. The
--following table is far from complete.
--
--`.set nwarn'
-- Let the assembler not to generate warnings if the source machine
-- language instructions happen data dependency.
--
--`.set fixdd'
-- Let the assembler to insert bubbles (32 bit nop instruction / 16
-- bit nop! Instruction) if the source machine language instructions
-- happen data dependency.
--
--`.set nofixdd'
-- Let the assembler to generate warnings if the source machine
-- language instructions happen data dependency. (Default)
--
--`.set r1'
-- Let the assembler not to generate warnings if the source program
-- uses r1. allow user to use r1
--
--`set nor1'
-- Let the assembler to generate warnings if the source program uses
-- r1. (Default)
--
--`.sdata'
-- Tell the assembler to add subsequent data into the sdata section
--
--`.rdata'
-- Tell the assembler to add subsequent data into the rdata section
--
--`.frame "frame-register", "offset", "return-pc-register"'
-- Describe a stack frame. "frame-register" is the frame register,
-- "offset" is the distance from the frame register to the virtual
-- frame pointer, "return-pc-register" is the return program register.
-- You must use ".ent" before ".frame" and only one ".frame" can be
-- used per ".ent".
--
--`.mask "bitmask", "frameoffset"'
-- Indicate which of the integer registers are saved in the current
-- function's stack frame, this is for the debugger to explain the
-- frame chain.
--
--`.ent "proc-name"'
-- Set the beginning of the procedure "proc_name". Use this directive
-- when you want to generate information for the debugger.
--
--`.end proc-name'
-- Set the end of a procedure. Use this directive to generate
-- information for the debugger.
--
--`.bss'
-- Switch the destination of following statements into the bss
-- section, which is used for data that is uninitialized anywhere.
--
--
--
--File: as.info, Node: SCORE-Syntax, Prev: SCORE-Pseudo, Up: SCORE-Dependent
--
--9.38.3 SCORE Syntax
---------------------
--
--* Menu:
--
--* SCORE-Chars:: Special Characters
--
--
--File: as.info, Node: SCORE-Chars, Up: SCORE-Syntax
--
--9.38.3.1 Special Characters
--...........................
--
--The presence of a `#' appearing anywhere on a line indicates the start
--of a comment that extends to the end of that line.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line can also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- The `;' character can be used to separate statements on the same
--line.
--
--
--File: as.info, Node: SH-Dependent, Next: SH64-Dependent, Prev: NS32K-Dependent, Up: Machine Dependencies
--
--9.39 Renesas / SuperH SH Dependent Features
--===========================================
--
--* Menu:
--
--* SH Options:: Options
--* SH Syntax:: Syntax
--* SH Floating Point:: Floating Point
--* SH Directives:: SH Machine Directives
--* SH Opcodes:: Opcodes
--
--
--File: as.info, Node: SH Options, Next: SH Syntax, Up: SH-Dependent
--
--9.39.1 Options
----------------
--
--`as' has following command-line options for the Renesas (formerly
--Hitachi) / SuperH SH family.
--
--`--little'
-- Generate little endian code.
--
--`--big'
-- Generate big endian code.
--
--`--relax'
-- Alter jump instructions for long displacements.
--
--`--small'
-- Align sections to 4 byte boundaries, not 16.
--
--`--dsp'
-- Enable sh-dsp insns, and disable sh3e / sh4 insns.
--
--`--renesas'
-- Disable optimization with section symbol for compatibility with
-- Renesas assembler.
--
--`--allow-reg-prefix'
-- Allow '$' as a register name prefix.
--
--`--fdpic'
-- Generate an FDPIC object file.
--
--`--isa=sh4 | sh4a'
-- Specify the sh4 or sh4a instruction set.
--
--`--isa=dsp'
-- Enable sh-dsp insns, and disable sh3e / sh4 insns.
--
--`--isa=fp'
-- Enable sh2e, sh3e, sh4, and sh4a insn sets.
--
--`--isa=all'
-- Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets.
--
--`-h-tick-hex'
-- Support H'00 style hex constants in addition to 0x00 style.
--
--
--
--File: as.info, Node: SH Syntax, Next: SH Floating Point, Prev: SH Options, Up: SH-Dependent
--
--9.39.2 Syntax
---------------
--
--* Menu:
--
--* SH-Chars:: Special Characters
--* SH-Regs:: Register Names
--* SH-Addressing:: Addressing Modes
--
--
--File: as.info, Node: SH-Chars, Next: SH-Regs, Up: SH Syntax
--
--9.39.2.1 Special Characters
--...........................
--
--`!' is the line comment character.
--
-- You can use `;' instead of a newline to separate statements.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line could also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- Since `$' has no special meaning, you may use it in symbol names.
--
--
--File: as.info, Node: SH-Regs, Next: SH-Addressing, Prev: SH-Chars, Up: SH Syntax
--
--9.39.2.2 Register Names
--.......................
--
--You can use the predefined symbols `r0', `r1', `r2', `r3', `r4', `r5',
--`r6', `r7', `r8', `r9', `r10', `r11', `r12', `r13', `r14', and `r15' to
--refer to the SH registers.
--
-- The SH also has these control registers:
--
--`pr'
-- procedure register (holds return address)
--
--`pc'
-- program counter
--
--`mach'
--`macl'
-- high and low multiply accumulator registers
--
--`sr'
-- status register
--
--`gbr'
-- global base register
--
--`vbr'
-- vector base register (for interrupt vectors)
--
--
--File: as.info, Node: SH-Addressing, Prev: SH-Regs, Up: SH Syntax
--
--9.39.2.3 Addressing Modes
--.........................
--
--`as' understands the following addressing modes for the SH. `RN' in
--the following refers to any of the numbered registers, but _not_ the
--control registers.
--
--`RN'
-- Register direct
--
--`@RN'
-- Register indirect
--
--`@-RN'
-- Register indirect with pre-decrement
--
--`@RN+'
-- Register indirect with post-increment
--
--`@(DISP, RN)'
-- Register indirect with displacement
--
--`@(R0, RN)'
-- Register indexed
--
--`@(DISP, GBR)'
-- `GBR' offset
--
--`@(R0, GBR)'
-- GBR indexed
--
--`ADDR'
--`@(DISP, PC)'
-- PC relative address (for branch or for addressing memory). The
-- `as' implementation allows you to use the simpler form ADDR
-- anywhere a PC relative address is called for; the alternate form
-- is supported for compatibility with other assemblers.
--
--`#IMM'
-- Immediate data
--
--
--File: as.info, Node: SH Floating Point, Next: SH Directives, Prev: SH Syntax, Up: SH-Dependent
--
--9.39.3 Floating Point
-----------------------
--
--SH2E, SH3E and SH4 groups have on-chip floating-point unit (FPU). Other
--SH groups can use `.float' directive to generate IEEE floating-point
--numbers.
--
-- SH2E and SH3E support single-precision floating point calculations as
--well as entirely PCAPI compatible emulation of double-precision
--floating point calculations. SH2E and SH3E instructions are a subset of
--the floating point calculations conforming to the IEEE754 standard.
--
-- In addition to single-precision and double-precision floating-point
--operation capability, the on-chip FPU of SH4 has a 128-bit graphic
--engine that enables 32-bit floating-point data to be processed 128 bits
--at a time. It also supports 4 * 4 array operations and inner product
--operations. Also, a superscalar architecture is employed that enables
--simultaneous execution of two instructions (including FPU
--instructions), providing performance of up to twice that of
--conventional architectures at the same frequency.
--
--
--File: as.info, Node: SH Directives, Next: SH Opcodes, Prev: SH Floating Point, Up: SH-Dependent
--
--9.39.4 SH Machine Directives
------------------------------
--
--`uaword'
--`ualong'
--`uaquad'
-- `as' will issue a warning when a misaligned `.word', `.long', or
-- `.quad' directive is used. You may use `.uaword', `.ualong', or
-- `.uaquad' to indicate that the value is intentionally misaligned.
--
--
--File: as.info, Node: SH Opcodes, Prev: SH Directives, Up: SH-Dependent
--
--9.39.5 Opcodes
----------------
--
--For detailed information on the SH machine instruction set, see
--`SH-Microcomputer User's Manual' (Renesas) or `SH-4 32-bit CPU Core
--Architecture' (SuperH) and `SuperH (SH) 64-Bit RISC Series' (SuperH).
--
-- `as' implements all the standard SH opcodes. No additional
--pseudo-instructions are needed on this family. Note, however, that
--because `as' supports a simpler form of PC-relative addressing, you may
--simply write (for example)
--
-- mov.l bar,r0
--
--where other assemblers might require an explicit displacement to `bar'
--from the program counter:
--
-- mov.l @(DISP, PC)
--
-- Here is a summary of SH opcodes:
--
-- Legend:
-- Rn a numbered register
-- Rm another numbered register
-- #imm immediate data
-- disp displacement
-- disp8 8-bit displacement
-- disp12 12-bit displacement
--
-- add #imm,Rn lds.l @Rn+,PR
-- add Rm,Rn mac.w @Rm+,@Rn+
-- addc Rm,Rn mov #imm,Rn
-- addv Rm,Rn mov Rm,Rn
-- and #imm,R0 mov.b Rm,@(R0,Rn)
-- and Rm,Rn mov.b Rm,@-Rn
-- and.b #imm,@(R0,GBR) mov.b Rm,@Rn
-- bf disp8 mov.b @(disp,Rm),R0
-- bra disp12 mov.b @(disp,GBR),R0
-- bsr disp12 mov.b @(R0,Rm),Rn
-- bt disp8 mov.b @Rm+,Rn
-- clrmac mov.b @Rm,Rn
-- clrt mov.b R0,@(disp,Rm)
-- cmp/eq #imm,R0 mov.b R0,@(disp,GBR)
-- cmp/eq Rm,Rn mov.l Rm,@(disp,Rn)
-- cmp/ge Rm,Rn mov.l Rm,@(R0,Rn)
-- cmp/gt Rm,Rn mov.l Rm,@-Rn
-- cmp/hi Rm,Rn mov.l Rm,@Rn
-- cmp/hs Rm,Rn mov.l @(disp,Rn),Rm
-- cmp/pl Rn mov.l @(disp,GBR),R0
-- cmp/pz Rn mov.l @(disp,PC),Rn
-- cmp/str Rm,Rn mov.l @(R0,Rm),Rn
-- div0s Rm,Rn mov.l @Rm+,Rn
-- div0u mov.l @Rm,Rn
-- div1 Rm,Rn mov.l R0,@(disp,GBR)
-- exts.b Rm,Rn mov.w Rm,@(R0,Rn)
-- exts.w Rm,Rn mov.w Rm,@-Rn
-- extu.b Rm,Rn mov.w Rm,@Rn
-- extu.w Rm,Rn mov.w @(disp,Rm),R0
-- jmp @Rn mov.w @(disp,GBR),R0
-- jsr @Rn mov.w @(disp,PC),Rn
-- ldc Rn,GBR mov.w @(R0,Rm),Rn
-- ldc Rn,SR mov.w @Rm+,Rn
-- ldc Rn,VBR mov.w @Rm,Rn
-- ldc.l @Rn+,GBR mov.w R0,@(disp,Rm)
-- ldc.l @Rn+,SR mov.w R0,@(disp,GBR)
-- ldc.l @Rn+,VBR mova @(disp,PC),R0
-- lds Rn,MACH movt Rn
-- lds Rn,MACL muls Rm,Rn
-- lds Rn,PR mulu Rm,Rn
-- lds.l @Rn+,MACH neg Rm,Rn
-- lds.l @Rn+,MACL negc Rm,Rn
--
-- nop stc VBR,Rn
-- not Rm,Rn stc.l GBR,@-Rn
-- or #imm,R0 stc.l SR,@-Rn
-- or Rm,Rn stc.l VBR,@-Rn
-- or.b #imm,@(R0,GBR) sts MACH,Rn
-- rotcl Rn sts MACL,Rn
-- rotcr Rn sts PR,Rn
-- rotl Rn sts.l MACH,@-Rn
-- rotr Rn sts.l MACL,@-Rn
-- rte sts.l PR,@-Rn
-- rts sub Rm,Rn
-- sett subc Rm,Rn
-- shal Rn subv Rm,Rn
-- shar Rn swap.b Rm,Rn
-- shll Rn swap.w Rm,Rn
-- shll16 Rn tas.b @Rn
-- shll2 Rn trapa #imm
-- shll8 Rn tst #imm,R0
-- shlr Rn tst Rm,Rn
-- shlr16 Rn tst.b #imm,@(R0,GBR)
-- shlr2 Rn xor #imm,R0
-- shlr8 Rn xor Rm,Rn
-- sleep xor.b #imm,@(R0,GBR)
-- stc GBR,Rn xtrct Rm,Rn
-- stc SR,Rn
--
--
--File: as.info, Node: SH64-Dependent, Next: PDP-11-Dependent, Prev: SH-Dependent, Up: Machine Dependencies
--
--9.40 SuperH SH64 Dependent Features
--===================================
--
--* Menu:
--
--* SH64 Options:: Options
--* SH64 Syntax:: Syntax
--* SH64 Directives:: SH64 Machine Directives
--* SH64 Opcodes:: Opcodes
--
--
--File: as.info, Node: SH64 Options, Next: SH64 Syntax, Up: SH64-Dependent
--
--9.40.1 Options
----------------
--
--`-isa=sh4 | sh4a'
-- Specify the sh4 or sh4a instruction set.
--
--`-isa=dsp'
-- Enable sh-dsp insns, and disable sh3e / sh4 insns.
--
--`-isa=fp'
-- Enable sh2e, sh3e, sh4, and sh4a insn sets.
--
--`-isa=all'
-- Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets.
--
--`-isa=shmedia | -isa=shcompact'
-- Specify the default instruction set. `SHmedia' specifies the
-- 32-bit opcodes, and `SHcompact' specifies the 16-bit opcodes
-- compatible with previous SH families. The default depends on the
-- ABI selected; the default for the 64-bit ABI is SHmedia, and the
-- default for the 32-bit ABI is SHcompact. If neither the ABI nor
-- the ISA is specified, the default is 32-bit SHcompact.
--
-- Note that the `.mode' pseudo-op is not permitted if the ISA is not
-- specified on the command line.
--
--`-abi=32 | -abi=64'
-- Specify the default ABI. If the ISA is specified and the ABI is
-- not, the default ABI depends on the ISA, with SHmedia defaulting
-- to 64-bit and SHcompact defaulting to 32-bit.
--
-- Note that the `.abi' pseudo-op is not permitted if the ABI is not
-- specified on the command line. When the ABI is specified on the
-- command line, any `.abi' pseudo-ops in the source must match it.
--
--`-shcompact-const-crange'
-- Emit code-range descriptors for constants in SHcompact code
-- sections.
--
--`-no-mix'
-- Disallow SHmedia code in the same section as constants and
-- SHcompact code.
--
--`-no-expand'
-- Do not expand MOVI, PT, PTA or PTB instructions.
--
--`-expand-pt32'
-- With -abi=64, expand PT, PTA and PTB instructions to 32 bits only.
--
--`-h-tick-hex'
-- Support H'00 style hex constants in addition to 0x00 style.
--
--
--
--File: as.info, Node: SH64 Syntax, Next: SH64 Directives, Prev: SH64 Options, Up: SH64-Dependent
--
--9.40.2 Syntax
---------------
--
--* Menu:
--
--* SH64-Chars:: Special Characters
--* SH64-Regs:: Register Names
--* SH64-Addressing:: Addressing Modes
--
--
--File: as.info, Node: SH64-Chars, Next: SH64-Regs, Up: SH64 Syntax
--
--9.40.2.1 Special Characters
--...........................
--
--`!' is the line comment character.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line could also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- You can use `;' instead of a newline to separate statements.
--
-- Since `$' has no special meaning, you may use it in symbol names.
--
--
--File: as.info, Node: SH64-Regs, Next: SH64-Addressing, Prev: SH64-Chars, Up: SH64 Syntax
--
--9.40.2.2 Register Names
--.......................
--
--You can use the predefined symbols `r0' through `r63' to refer to the
--SH64 general registers, `cr0' through `cr63' for control registers,
--`tr0' through `tr7' for target address registers, `fr0' through `fr63'
--for single-precision floating point registers, `dr0' through `dr62'
--(even numbered registers only) for double-precision floating point
--registers, `fv0' through `fv60' (multiples of four only) for
--single-precision floating point vectors, `fp0' through `fp62' (even
--numbered registers only) for single-precision floating point pairs,
--`mtrx0' through `mtrx48' (multiples of 16 only) for 4x4 matrices of
--single-precision floating point registers, `pc' for the program
--counter, and `fpscr' for the floating point status and control register.
--
-- You can also refer to the control registers by the mnemonics `sr',
--`ssr', `pssr', `intevt', `expevt', `pexpevt', `tra', `spc', `pspc',
--`resvec', `vbr', `tea', `dcr', `kcr0', `kcr1', `ctc', and `usr'.
--
--
--File: as.info, Node: SH64-Addressing, Prev: SH64-Regs, Up: SH64 Syntax
--
--9.40.2.3 Addressing Modes
--.........................
--
--SH64 operands consist of either a register or immediate value. The
--immediate value can be a constant or label reference (or portion of a
--label reference), as in this example:
--
-- movi 4,r2
-- pt function, tr4
-- movi (function >> 16) & 65535,r0
-- shori function & 65535, r0
-- ld.l r0,4,r0
--
-- Instruction label references can reference labels in either SHmedia
--or SHcompact. To differentiate between the two, labels in SHmedia
--sections will always have the least significant bit set (i.e. they will
--be odd), which SHcompact labels will have the least significant bit
--reset (i.e. they will be even). If you need to reference the actual
--address of a label, you can use the `datalabel' modifier, as in this
--example:
--
-- .long function
-- .long datalabel function
--
-- In that example, the first longword may or may not have the least
--significant bit set depending on whether the label is an SHmedia label
--or an SHcompact label. The second longword will be the actual address
--of the label, regardless of what type of label it is.
--
--
--File: as.info, Node: SH64 Directives, Next: SH64 Opcodes, Prev: SH64 Syntax, Up: SH64-Dependent
--
--9.40.3 SH64 Machine Directives
--------------------------------
--
--In addition to the SH directives, the SH64 provides the following
--directives:
--
--`.mode [shmedia|shcompact]'
--`.isa [shmedia|shcompact]'
-- Specify the ISA for the following instructions (the two directives
-- are equivalent). Note that programs such as `objdump' rely on
-- symbolic labels to determine when such mode switches occur (by
-- checking the least significant bit of the label's address), so
-- such mode/isa changes should always be followed by a label (in
-- practice, this is true anyway). Note that you cannot use these
-- directives if you didn't specify an ISA on the command line.
--
--`.abi [32|64]'
-- Specify the ABI for the following instructions. Note that you
-- cannot use this directive unless you specified an ABI on the
-- command line, and the ABIs specified must match.
--
--
--
--File: as.info, Node: SH64 Opcodes, Prev: SH64 Directives, Up: SH64-Dependent
--
--9.40.4 Opcodes
----------------
--
--For detailed information on the SH64 machine instruction set, see
--`SuperH 64 bit RISC Series Architecture Manual' (SuperH, Inc.).
--
-- `as' implements all the standard SH64 opcodes. In addition, the
--following pseudo-opcodes may be expanded into one or more alternate
--opcodes:
--
--`movi'
-- If the value doesn't fit into a standard `movi' opcode, `as' will
-- replace the `movi' with a sequence of `movi' and `shori' opcodes.
--
--`pt'
-- This expands to a sequence of `movi' and `shori' opcode, followed
-- by a `ptrel' opcode, or to a `pta' or `ptb' opcode, depending on
-- the label referenced.
--
--
--
--File: as.info, Node: Sparc-Dependent, Next: TIC54X-Dependent, Prev: SCORE-Dependent, Up: Machine Dependencies
--
--9.41 SPARC Dependent Features
--=============================
--
--* Menu:
--
--* Sparc-Opts:: Options
--* Sparc-Aligned-Data:: Option to enforce aligned data
--* Sparc-Syntax:: Syntax
--* Sparc-Float:: Floating Point
--* Sparc-Directives:: Sparc Machine Directives
--
--
--File: as.info, Node: Sparc-Opts, Next: Sparc-Aligned-Data, Up: Sparc-Dependent
--
--9.41.1 Options
----------------
--
--The SPARC chip family includes several successive versions, using the
--same core instruction set, but including a few additional instructions
--at each version. There are exceptions to this however. For details on
--what instructions each variant supports, please see the chip's
--architecture reference manual.
--
-- By default, `as' assumes the core instruction set (SPARC v6), but
--"bumps" the architecture level as needed: it switches to successively
--higher architectures as it encounters instructions that only exist in
--the higher levels.
--
-- If not configured for SPARC v9 (`sparc64-*-*') GAS will not bump
--past sparclite by default, an option must be passed to enable the v9
--instructions.
--
-- GAS treats sparclite as being compatible with v8, unless an
--architecture is explicitly requested. SPARC v9 is always incompatible
--with sparclite.
--
--`-Av6 | -Av7 | -Av8 | -Aleon | -Asparclet | -Asparclite'
--`-Av8plus | -Av8plusa | -Av8plusb | -Av8plusc | -Av8plusd | -Av8plusv'
--`-Av9 | -Av9a | -Av9b | -Av9c | -Av9d | -Av9v'
--`-Asparc | -Asparcvis | -Asparcvis2 | -Asparcfmaf | -Asparcima'
--`-Asparcvis3 | -Asparcvis3r'
-- Use one of the `-A' options to select one of the SPARC
-- architectures explicitly. If you select an architecture
-- explicitly, `as' reports a fatal error if it encounters an
-- instruction or feature requiring an incompatible or higher level.
--
-- `-Av8plus', `-Av8plusa', `-Av8plusb', `-Av8plusc', `-Av8plusd',
-- and `-Av8plusv' select a 32 bit environment.
--
-- `-Av9', `-Av9a', `-Av9b', `-Av9c', `-Av9d', and `-Av9v' select a
-- 64 bit environment and are not available unless GAS is explicitly
-- configured with 64 bit environment support.
--
-- `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with
-- UltraSPARC VIS 1.0 extensions.
--
-- `-Av8plusb' and `-Av9b' enable the UltraSPARC VIS 2.0 instructions,
-- as well as the instructions enabled by `-Av8plusa' and `-Av9a'.
--
-- `-Av8plusc' and `-Av9c' enable the UltraSPARC Niagara instructions,
-- as well as the instructions enabled by `-Av8plusb' and `-Av9b'.
--
-- `-Av8plusd' and `-Av9d' enable the floating point fused
-- multiply-add, VIS 3.0, and HPC extension instructions, as well as
-- the instructions enabled by `-Av8plusc' and `-Av9c'.
--
-- `-Av8plusv' and `-Av9v' enable the 'random', transactional memory,
-- floating point unfused multiply-add, integer multiply-add, and
-- cache sparing store instructions, as well as the instructions
-- enabled by `-Av8plusd' and `-Av9d'.
--
-- `-Asparc' specifies a v9 environment. It is equivalent to `-Av9'
-- if the word size is 64-bit, and `-Av8plus' otherwise.
--
-- `-Asparcvis' specifies a v9a environment. It is equivalent to
-- `-Av9a' if the word size is 64-bit, and `-Av8plusa' otherwise.
--
-- `-Asparcvis2' specifies a v9b environment. It is equivalent to
-- `-Av9b' if the word size is 64-bit, and `-Av8plusb' otherwise.
--
-- `-Asparcfmaf' specifies a v9b environment with the floating point
-- fused multiply-add instructions enabled.
--
-- `-Asparcima' specifies a v9b environment with the integer
-- multiply-add instructions enabled.
--
-- `-Asparcvis3' specifies a v9b environment with the VIS 3.0, HPC ,
-- and floating point fused multiply-add instructions enabled.
--
-- `-Asparcvis3r' specifies a v9b environment with the VIS 3.0, HPC,
-- transactional memory, random, and floating point unfused
-- multiply-add instructions enabled.
--
--`-xarch=v8plus | -xarch=v8plusa | -xarch=v8plusb | -xarch=v8plusc'
--`-xarch=v8plusd | -xarch=v8plusv | -xarch=v9 | -xarch=v9a'
--`-xarch=v9b | -xarch=v9c | -xarch=v9d | -xarch=v9v'
--`-xarch=sparc | -xarch=sparcvis | -xarch=sparcvis2'
--`-xarch=sparcfmaf | -xarch=sparcima | -xarch=sparcvis3'
--`-xarch=sparcvis3r'
-- For compatibility with the SunOS v9 assembler. These options are
-- equivalent to -Av8plus, -Av8plusa, -Av8plusb, -Av8plusc, -Av8plusd,
-- -Av8plusv, -Av9, -Av9a, -Av9b, -Av9c, -Av9d, -Av9v, -Asparc,
-- -Asparcvis, -Asparcvis2, -Asparcfmaf, -Asparcima, -Asparcvis3, and
-- -Asparcvis3r, respectively.
--
--`-bump'
-- Warn whenever it is necessary to switch to another level. If an
-- architecture level is explicitly requested, GAS will not issue
-- warnings until that level is reached, and will then bump the level
-- as required (except between incompatible levels).
--
--`-32 | -64'
-- Select the word size, either 32 bits or 64 bits. These options
-- are only available with the ELF object file format, and require
-- that the necessary BFD support has been included.
--
--
--File: as.info, Node: Sparc-Aligned-Data, Next: Sparc-Syntax, Prev: Sparc-Opts, Up: Sparc-Dependent
--
--9.41.2 Enforcing aligned data
-------------------------------
--
--SPARC GAS normally permits data to be misaligned. For example, it
--permits the `.long' pseudo-op to be used on a byte boundary. However,
--the native SunOS assemblers issue an error when they see misaligned
--data.
--
-- You can use the `--enforce-aligned-data' option to make SPARC GAS
--also issue an error about misaligned data, just as the SunOS assemblers
--do.
--
-- The `--enforce-aligned-data' option is not the default because gcc
--issues misaligned data pseudo-ops when it initializes certain packed
--data structures (structures defined using the `packed' attribute). You
--may have to assemble with GAS in order to initialize packed data
--structures in your own code.
--
--
--File: as.info, Node: Sparc-Syntax, Next: Sparc-Float, Prev: Sparc-Aligned-Data, Up: Sparc-Dependent
--
--9.41.3 Sparc Syntax
---------------------
--
--The assembler syntax closely follows The Sparc Architecture Manual,
--versions 8 and 9, as well as most extensions defined by Sun for their
--UltraSPARC and Niagara line of processors.
--
--* Menu:
--
--* Sparc-Chars:: Special Characters
--* Sparc-Regs:: Register Names
--* Sparc-Constants:: Constant Names
--* Sparc-Relocs:: Relocations
--* Sparc-Size-Translations:: Size Translations
--
--
--File: as.info, Node: Sparc-Chars, Next: Sparc-Regs, Up: Sparc-Syntax
--
--9.41.3.1 Special Characters
--...........................
--
--A `!' character appearing anywhere on a line indicates the start of a
--comment that extends to the end of that line.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line could also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- `;' can be used instead of a newline to separate statements.
--
--
--File: as.info, Node: Sparc-Regs, Next: Sparc-Constants, Prev: Sparc-Chars, Up: Sparc-Syntax
--
--9.41.3.2 Register Names
--.......................
--
--The Sparc integer register file is broken down into global, outgoing,
--local, and incoming.
--
-- * The 8 global registers are referred to as `%gN'.
--
-- * The 8 outgoing registers are referred to as `%oN'.
--
-- * The 8 local registers are referred to as `%lN'.
--
-- * The 8 incoming registers are referred to as `%iN'.
--
-- * The frame pointer register `%i6' can be referenced using the alias
-- `%fp'.
--
-- * The stack pointer register `%o6' can be referenced using the alias
-- `%sp'.
--
-- Floating point registers are simply referred to as `%fN'. When
--assembling for pre-V9, only 32 floating point registers are available.
--For V9 and later there are 64, but there are restrictions when
--referencing the upper 32 registers. They can only be accessed as
--double or quad, and thus only even or quad numbered accesses are
--allowed. For example, `%f34' is a legal floating point register, but
--`%f35' is not.
--
-- Certain V9 instructions allow access to ancillary state registers.
--Most simply they can be referred to as `%asrN' where N can be from 16
--to 31. However, there are some aliases defined to reference ASR
--registers defined for various UltraSPARC processors:
--
-- * The tick compare register is referred to as `%tick_cmpr'.
--
-- * The system tick register is referred to as `%stick'. An alias,
-- `%sys_tick', exists but is deprecated and should not be used by
-- new software.
--
-- * The system tick compare register is referred to as `%stick_cmpr'.
-- An alias, `%sys_tick_cmpr', exists but is deprecated and should
-- not be used by new software.
--
-- * The software interrupt register is referred to as `%softint'.
--
-- * The set software interrupt register is referred to as
-- `%set_softint'. The mnemonic `%softint_set' is provided as an
-- alias.
--
-- * The clear software interrupt register is referred to as
-- `%clear_softint'. The mnemonic `%softint_clear' is provided as an
-- alias.
--
-- * The performance instrumentation counters register is referred to as
-- `%pic'.
--
-- * The performance control register is referred to as `%pcr'.
--
-- * The graphics status register is referred to as `%gsr'.
--
-- * The V9 dispatch control register is referred to as `%dcr'.
--
-- Various V9 branch and conditional move instructions allow
--specification of which set of integer condition codes to test. These
--are referred to as `%xcc' and `%icc'.
--
-- In V9, there are 4 sets of floating point condition codes which are
--referred to as `%fccN'.
--
-- Several special privileged and non-privileged registers exist:
--
-- * The V9 address space identifier register is referred to as `%asi'.
--
-- * The V9 restorable windows register is referred to as `%canrestore'.
--
-- * The V9 savable windows register is referred to as `%cansave'.
--
-- * The V9 clean windows register is referred to as `%cleanwin'.
--
-- * The V9 current window pointer register is referred to as `%cwp'.
--
-- * The floating-point queue register is referred to as `%fq'.
--
-- * The V8 co-processor queue register is referred to as `%cq'.
--
-- * The floating point status register is referred to as `%fsr'.
--
-- * The other windows register is referred to as `%otherwin'.
--
-- * The V9 program counter register is referred to as `%pc'.
--
-- * The V9 next program counter register is referred to as `%npc'.
--
-- * The V9 processor interrupt level register is referred to as `%pil'.
--
-- * The V9 processor state register is referred to as `%pstate'.
--
-- * The trap base address register is referred to as `%tba'.
--
-- * The V9 tick register is referred to as `%tick'.
--
-- * The V9 trap level is referred to as `%tl'.
--
-- * The V9 trap program counter is referred to as `%tpc'.
--
-- * The V9 trap next program counter is referred to as `%tnpc'.
--
-- * The V9 trap state is referred to as `%tstate'.
--
-- * The V9 trap type is referred to as `%tt'.
--
-- * The V9 condition codes is referred to as `%ccr'.
--
-- * The V9 floating-point registers state is referred to as `%fprs'.
--
-- * The V9 version register is referred to as `%ver'.
--
-- * The V9 window state register is referred to as `%wstate'.
--
-- * The Y register is referred to as `%y'.
--
-- * The V8 window invalid mask register is referred to as `%wim'.
--
-- * The V8 processor state register is referred to as `%psr'.
--
-- * The V9 global register level register is referred to as `%gl'.
--
-- Several special register names exist for hypervisor mode code:
--
-- * The hyperprivileged processor state register is referred to as
-- `%hpstate'.
--
-- * The hyperprivileged trap state register is referred to as
-- `%htstate'.
--
-- * The hyperprivileged interrupt pending register is referred to as
-- `%hintp'.
--
-- * The hyperprivileged trap base address register is referred to as
-- `%htba'.
--
-- * The hyperprivileged implementation version register is referred to
-- as `%hver'.
--
-- * The hyperprivileged system tick compare register is referred to as
-- `%hstick_cmpr'. Note that there is no `%hstick' register, the
-- normal `%stick' is used.
--
--
--File: as.info, Node: Sparc-Constants, Next: Sparc-Relocs, Prev: Sparc-Regs, Up: Sparc-Syntax
--
--9.41.3.3 Constants
--..................
--
--Several Sparc instructions take an immediate operand field for which
--mnemonic names exist. Two such examples are `membar' and `prefetch'.
--Another example are the set of V9 memory access instruction that allow
--specification of an address space identifier.
--
-- The `membar' instruction specifies a memory barrier that is the
--defined by the operand which is a bitmask. The supported mask
--mnemonics are:
--
-- * `#Sync' requests that all operations (including nonmemory
-- reference operations) appearing prior to the `membar' must have
-- been performed and the effects of any exceptions become visible
-- before any instructions after the `membar' may be initiated. This
-- corresponds to `membar' cmask field bit 2.
--
-- * `#MemIssue' requests that all memory reference operations
-- appearing prior to the `membar' must have been performed before
-- any memory operation after the `membar' may be initiated. This
-- corresponds to `membar' cmask field bit 1.
--
-- * `#Lookaside' requests that a store appearing prior to the `membar'
-- must complete before any load following the `membar' referencing
-- the same address can be initiated. This corresponds to `membar'
-- cmask field bit 0.
--
-- * `#StoreStore' defines that the effects of all stores appearing
-- prior to the `membar' instruction must be visible to all
-- processors before the effect of any stores following the `membar'.
-- Equivalent to the deprecated `stbar' instruction. This
-- corresponds to `membar' mmask field bit 3.
--
-- * `#LoadStore' defines all loads appearing prior to the `membar'
-- instruction must have been performed before the effect of any
-- stores following the `membar' is visible to any other processor.
-- This corresponds to `membar' mmask field bit 2.
--
-- * `#StoreLoad' defines that the effects of all stores appearing
-- prior to the `membar' instruction must be visible to all
-- processors before loads following the `membar' may be performed.
-- This corresponds to `membar' mmask field bit 1.
--
-- * `#LoadLoad' defines that all loads appearing prior to the `membar'
-- instruction must have been performed before any loads following
-- the `membar' may be performed. This corresponds to `membar' mmask
-- field bit 0.
--
--
-- These values can be ored together, for example:
--
-- membar #Sync
-- membar #StoreLoad | #LoadLoad
-- membar #StoreLoad | #StoreStore
--
-- The `prefetch' and `prefetcha' instructions take a prefetch function
--code. The following prefetch function code constant mnemonics are
--available:
--
-- * `#n_reads' requests a prefetch for several reads, and corresponds
-- to a prefetch function code of 0.
--
-- `#one_read' requests a prefetch for one read, and corresponds to a
-- prefetch function code of 1.
--
-- `#n_writes' requests a prefetch for several writes (and possibly
-- reads), and corresponds to a prefetch function code of 2.
--
-- `#one_write' requests a prefetch for one write, and corresponds to
-- a prefetch function code of 3.
--
-- `#page' requests a prefetch page, and corresponds to a prefetch
-- function code of 4.
--
-- `#invalidate' requests a prefetch invalidate, and corresponds to a
-- prefetch function code of 16.
--
-- `#unified' requests a prefetch to the nearest unified cache, and
-- corresponds to a prefetch function code of 17.
--
-- `#n_reads_strong' requests a strong prefetch for several reads,
-- and corresponds to a prefetch function code of 20.
--
-- `#one_read_strong' requests a strong prefetch for one read, and
-- corresponds to a prefetch function code of 21.
--
-- `#n_writes_strong' requests a strong prefetch for several writes,
-- and corresponds to a prefetch function code of 22.
--
-- `#one_write_strong' requests a strong prefetch for one write, and
-- corresponds to a prefetch function code of 23.
--
-- Onle one prefetch code may be specified. Here are some examples:
--
-- prefetch [%l0 + %l2], #one_read
-- prefetch [%g2 + 8], #n_writes
-- prefetcha [%g1] 0x8, #unified
-- prefetcha [%o0 + 0x10] %asi, #n_reads
--
-- The actual behavior of a given prefetch function code is processor
-- specific. If a processor does not implement a given prefetch
-- function code, it will treat the prefetch instruction as a nop.
--
-- For instructions that accept an immediate address space identifier,
-- `as' provides many mnemonics corresponding to V9 defined as well
-- as UltraSPARC and Niagara extended values. For example, `#ASI_P'
-- and `#ASI_BLK_INIT_QUAD_LDD_AIUS'. See the V9 and processor
-- specific manuals for details.
--
--
--
--File: as.info, Node: Sparc-Relocs, Next: Sparc-Size-Translations, Prev: Sparc-Constants, Up: Sparc-Syntax
--
--9.41.3.4 Relocations
--....................
--
--ELF relocations are available as defined in the 32-bit and 64-bit Sparc
--ELF specifications.
--
-- `R_SPARC_HI22' is obtained using `%hi' and `R_SPARC_LO10' is
--obtained using `%lo'. Likewise `R_SPARC_HIX22' is obtained from `%hix'
--and `R_SPARC_LOX10' is obtained using `%lox'. For example:
--
-- sethi %hi(symbol), %g1
-- or %g1, %lo(symbol), %g1
--
-- sethi %hix(symbol), %g1
-- xor %g1, %lox(symbol), %g1
--
-- These "high" mnemonics extract bits 31:10 of their operand, and the
--"low" mnemonics extract bits 9:0 of their operand.
--
-- V9 code model relocations can be requested as follows:
--
-- * `R_SPARC_HH22' is requested using `%hh'. It can also be generated
-- using `%uhi'.
--
-- * `R_SPARC_HM10' is requested using `%hm'. It can also be generated
-- using `%ulo'.
--
-- * `R_SPARC_LM22' is requested using `%lm'.
--
-- * `R_SPARC_H44' is requested using `%h44'.
--
-- * `R_SPARC_M44' is requested using `%m44'.
--
-- * `R_SPARC_L44' is requested using `%l44' or `%l34'.
--
-- * `R_SPARC_H34' is requested using `%h34'.
--
-- The `%l34' generates a `R_SPARC_L44' relocation because it
--calculates the necessary value, and therefore no explicit `R_SPARC_L34'
--relocation needed to be created for this purpose.
--
-- The `%h34' and `%l34' relocations are used for the abs34 code model.
--Here is an example abs34 address generation sequence:
--
-- sethi %h34(symbol), %g1
-- sllx %g1, 2, %g1
-- or %g1, %l34(symbol), %g1
--
-- The PC relative relocation `R_SPARC_PC22' can be obtained by
--enclosing an operand inside of `%pc22'. Likewise, the `R_SPARC_PC10'
--relocation can be obtained using `%pc10'. These are mostly used when
--assembling PIC code. For example, the standard PIC sequence on Sparc
--to get the base of the global offset table, PC relative, into a
--register, can be performed as:
--
-- sethi %pc22(_GLOBAL_OFFSET_TABLE_-4), %l7
-- add %l7, %pc10(_GLOBAL_OFFSET_TABLE_+4), %l7
--
-- Several relocations exist to allow the link editor to potentially
--optimize GOT data references. The `R_SPARC_GOTDATA_OP_HIX22'
--relocation can obtained by enclosing an operand inside of
--`%gdop_hix22'. The `R_SPARC_GOTDATA_OP_LOX10' relocation can obtained
--by enclosing an operand inside of `%gdop_lox10'. Likewise,
--`R_SPARC_GOTDATA_OP' can be obtained by enclosing an operand inside of
--`%gdop'. For example, assuming the GOT base is in register `%l7':
--
-- sethi %gdop_hix22(symbol), %l1
-- xor %l1, %gdop_lox10(symbol), %l1
-- ld [%l7 + %l1], %l2, %gdop(symbol)
--
-- There are many relocations that can be requested for access to
--thread local storage variables. All of the Sparc TLS mnemonics are
--supported:
--
-- * `R_SPARC_TLS_GD_HI22' is requested using `%tgd_hi22'.
--
-- * `R_SPARC_TLS_GD_LO10' is requested using `%tgd_lo10'.
--
-- * `R_SPARC_TLS_GD_ADD' is requested using `%tgd_add'.
--
-- * `R_SPARC_TLS_GD_CALL' is requested using `%tgd_call'.
--
-- * `R_SPARC_TLS_LDM_HI22' is requested using `%tldm_hi22'.
--
-- * `R_SPARC_TLS_LDM_LO10' is requested using `%tldm_lo10'.
--
-- * `R_SPARC_TLS_LDM_ADD' is requested using `%tldm_add'.
--
-- * `R_SPARC_TLS_LDM_CALL' is requested using `%tldm_call'.
--
-- * `R_SPARC_TLS_LDO_HIX22' is requested using `%tldo_hix22'.
--
-- * `R_SPARC_TLS_LDO_LOX10' is requested using `%tldo_lox10'.
--
-- * `R_SPARC_TLS_LDO_ADD' is requested using `%tldo_add'.
--
-- * `R_SPARC_TLS_IE_HI22' is requested using `%tie_hi22'.
--
-- * `R_SPARC_TLS_IE_LO10' is requested using `%tie_lo10'.
--
-- * `R_SPARC_TLS_IE_LD' is requested using `%tie_ld'.
--
-- * `R_SPARC_TLS_IE_LDX' is requested using `%tie_ldx'.
--
-- * `R_SPARC_TLS_IE_ADD' is requested using `%tie_add'.
--
-- * `R_SPARC_TLS_LE_HIX22' is requested using `%tle_hix22'.
--
-- * `R_SPARC_TLS_LE_LOX10' is requested using `%tle_lox10'.
--
-- Here are some example TLS model sequences.
--
-- First, General Dynamic:
--
-- sethi %tgd_hi22(symbol), %l1
-- add %l1, %tgd_lo10(symbol), %l1
-- add %l7, %l1, %o0, %tgd_add(symbol)
-- call __tls_get_addr, %tgd_call(symbol)
-- nop
--
-- Local Dynamic:
--
-- sethi %tldm_hi22(symbol), %l1
-- add %l1, %tldm_lo10(symbol), %l1
-- add %l7, %l1, %o0, %tldm_add(symbol)
-- call __tls_get_addr, %tldm_call(symbol)
-- nop
--
-- sethi %tldo_hix22(symbol), %l1
-- xor %l1, %tldo_lox10(symbol), %l1
-- add %o0, %l1, %l1, %tldo_add(symbol)
--
-- Initial Exec:
--
-- sethi %tie_hi22(symbol), %l1
-- add %l1, %tie_lo10(symbol), %l1
-- ld [%l7 + %l1], %o0, %tie_ld(symbol)
-- add %g7, %o0, %o0, %tie_add(symbol)
--
-- sethi %tie_hi22(symbol), %l1
-- add %l1, %tie_lo10(symbol), %l1
-- ldx [%l7 + %l1], %o0, %tie_ldx(symbol)
-- add %g7, %o0, %o0, %tie_add(symbol)
--
-- And finally, Local Exec:
--
-- sethi %tle_hix22(symbol), %l1
-- add %l1, %tle_lox10(symbol), %l1
-- add %g7, %l1, %l1
--
-- When assembling for 64-bit, and a secondary constant addend is
--specified in an address expression that would normally generate an
--`R_SPARC_LO10' relocation, the assembler will emit an `R_SPARC_OLO10'
--instead.
--
--
--File: as.info, Node: Sparc-Size-Translations, Prev: Sparc-Relocs, Up: Sparc-Syntax
--
--9.41.3.5 Size Translations
--..........................
--
--Often it is desirable to write code in an operand size agnostic manner.
--`as' provides support for this via operand size opcode translations.
--Translations are supported for loads, stores, shifts, compare-and-swap
--atomics, and the `clr' synthetic instruction.
--
-- If generating 32-bit code, `as' will generate the 32-bit opcode.
--Whereas if 64-bit code is being generated, the 64-bit opcode will be
--emitted. For example `ldn' will be transformed into `ld' for 32-bit
--code and `ldx' for 64-bit code.
--
-- Here is an example meant to demonstrate all the supported opcode
--translations:
--
-- ldn [%o0], %o1
-- ldna [%o0] %asi, %o2
-- stn %o1, [%o0]
-- stna %o2, [%o0] %asi
-- slln %o3, 3, %o3
-- srln %o4, 8, %o4
-- sran %o5, 12, %o5
-- casn [%o0], %o1, %o2
-- casna [%o0] %asi, %o1, %o2
-- clrn %g1
--
-- In 32-bit mode `as' will emit:
--
-- ld [%o0], %o1
-- lda [%o0] %asi, %o2
-- st %o1, [%o0]
-- sta %o2, [%o0] %asi
-- sll %o3, 3, %o3
-- srl %o4, 8, %o4
-- sra %o5, 12, %o5
-- cas [%o0], %o1, %o2
-- casa [%o0] %asi, %o1, %o2
-- clr %g1
--
-- And in 64-bit mode `as' will emit:
--
-- ldx [%o0], %o1
-- ldxa [%o0] %asi, %o2
-- stx %o1, [%o0]
-- stxa %o2, [%o0] %asi
-- sllx %o3, 3, %o3
-- srlx %o4, 8, %o4
-- srax %o5, 12, %o5
-- casx [%o0], %o1, %o2
-- casxa [%o0] %asi, %o1, %o2
-- clrx %g1
--
-- Finally, the `.nword' translating directive is supported as well.
--It is documented in the section on Sparc machine directives.
--
--
--File: as.info, Node: Sparc-Float, Next: Sparc-Directives, Prev: Sparc-Syntax, Up: Sparc-Dependent
--
--9.41.4 Floating Point
-----------------------
--
--The Sparc uses IEEE floating-point numbers.
--
--
--File: as.info, Node: Sparc-Directives, Prev: Sparc-Float, Up: Sparc-Dependent
--
--9.41.5 Sparc Machine Directives
---------------------------------
--
--The Sparc version of `as' supports the following additional machine
--directives:
--
--`.align'
-- This must be followed by the desired alignment in bytes.
--
--`.common'
-- This must be followed by a symbol name, a positive number, and
-- `"bss"'. This behaves somewhat like `.comm', but the syntax is
-- different.
--
--`.half'
-- This is functionally identical to `.short'.
--
--`.nword'
-- On the Sparc, the `.nword' directive produces native word sized
-- value, ie. if assembling with -32 it is equivalent to `.word', if
-- assembling with -64 it is equivalent to `.xword'.
--
--`.proc'
-- This directive is ignored. Any text following it on the same line
-- is also ignored.
--
--`.register'
-- This directive declares use of a global application or system
-- register. It must be followed by a register name %g2, %g3, %g6 or
-- %g7, comma and the symbol name for that register. If symbol name
-- is `#scratch', it is a scratch register, if it is `#ignore', it
-- just suppresses any errors about using undeclared global register,
-- but does not emit any information about it into the object file.
-- This can be useful e.g. if you save the register before use and
-- restore it after.
--
--`.reserve'
-- This must be followed by a symbol name, a positive number, and
-- `"bss"'. This behaves somewhat like `.lcomm', but the syntax is
-- different.
--
--`.seg'
-- This must be followed by `"text"', `"data"', or `"data1"'. It
-- behaves like `.text', `.data', or `.data 1'.
--
--`.skip'
-- This is functionally identical to the `.space' directive.
--
--`.word'
-- On the Sparc, the `.word' directive produces 32 bit values,
-- instead of the 16 bit values it produces on many other machines.
--
--`.xword'
-- On the Sparc V9 processor, the `.xword' directive produces 64 bit
-- values.
--
--
--File: as.info, Node: TIC54X-Dependent, Next: TIC6X-Dependent, Prev: Sparc-Dependent, Up: Machine Dependencies
--
--9.42 TIC54X Dependent Features
--==============================
--
--* Menu:
--
--* TIC54X-Opts:: Command-line Options
--* TIC54X-Block:: Blocking
--* TIC54X-Env:: Environment Settings
--* TIC54X-Constants:: Constants Syntax
--* TIC54X-Subsyms:: String Substitution
--* TIC54X-Locals:: Local Label Syntax
--* TIC54X-Builtins:: Builtin Assembler Math Functions
--* TIC54X-Ext:: Extended Addressing Support
--* TIC54X-Directives:: Directives
--* TIC54X-Macros:: Macro Features
--* TIC54X-MMRegs:: Memory-mapped Registers
--* TIC54X-Syntax:: Syntax
--
--
--File: as.info, Node: TIC54X-Opts, Next: TIC54X-Block, Up: TIC54X-Dependent
--
--9.42.1 Options
----------------
--
--The TMS320C54X version of `as' has a few machine-dependent options.
--
-- You can use the `-mfar-mode' option to enable extended addressing
--mode. All addresses will be assumed to be > 16 bits, and the
--appropriate relocation types will be used. This option is equivalent
--to using the `.far_mode' directive in the assembly code. If you do not
--use the `-mfar-mode' option, all references will be assumed to be 16
--bits. This option may be abbreviated to `-mf'.
--
-- You can use the `-mcpu' option to specify a particular CPU. This
--option is equivalent to using the `.version' directive in the assembly
--code. For recognized CPU codes, see *Note `.version':
--TIC54X-Directives. The default CPU version is `542'.
--
-- You can use the `-merrors-to-file' option to redirect error output
--to a file (this provided for those deficient environments which don't
--provide adequate output redirection). This option may be abbreviated to
--`-me'.
--
--
--File: as.info, Node: TIC54X-Block, Next: TIC54X-Env, Prev: TIC54X-Opts, Up: TIC54X-Dependent
--
--9.42.2 Blocking
-----------------
--
--A blocked section or memory block is guaranteed not to cross the
--blocking boundary (usually a page, or 128 words) if it is smaller than
--the blocking size, or to start on a page boundary if it is larger than
--the blocking size.
--
--
--File: as.info, Node: TIC54X-Env, Next: TIC54X-Constants, Prev: TIC54X-Block, Up: TIC54X-Dependent
--
--9.42.3 Environment Settings
-----------------------------
--
--`C54XDSP_DIR' and `A_DIR' are semicolon-separated paths which are added
--to the list of directories normally searched for source and include
--files. `C54XDSP_DIR' will override `A_DIR'.
--
--
--File: as.info, Node: TIC54X-Constants, Next: TIC54X-Subsyms, Prev: TIC54X-Env, Up: TIC54X-Dependent
--
--9.42.4 Constants Syntax
-------------------------
--
--The TIC54X version of `as' allows the following additional constant
--formats, using a suffix to indicate the radix:
--
-- Binary `000000B, 011000b'
-- Octal `10Q, 224q'
-- Hexadecimal `45h, 0FH'
--
--
--File: as.info, Node: TIC54X-Subsyms, Next: TIC54X-Locals, Prev: TIC54X-Constants, Up: TIC54X-Dependent
--
--9.42.5 String Substitution
----------------------------
--
--A subset of allowable symbols (which we'll call subsyms) may be assigned
--arbitrary string values. This is roughly equivalent to C preprocessor
--#define macros. When `as' encounters one of these symbols, the symbol
--is replaced in the input stream by its string value. Subsym names
--*must* begin with a letter.
--
-- Subsyms may be defined using the `.asg' and `.eval' directives
--(*Note `.asg': TIC54X-Directives, *Note `.eval': TIC54X-Directives.
--
-- Expansion is recursive until a previously encountered symbol is
--seen, at which point substitution stops.
--
-- In this example, x is replaced with SYM2; SYM2 is replaced with
--SYM1, and SYM1 is replaced with x. At this point, x has already been
--encountered and the substitution stops.
--
-- .asg "x",SYM1
-- .asg "SYM1",SYM2
-- .asg "SYM2",x
-- add x,a ; final code assembled is "add x, a"
--
-- Macro parameters are converted to subsyms; a side effect of this is
--the normal `as' '\ARG' dereferencing syntax is unnecessary. Subsyms
--defined within a macro will have global scope, unless the `.var'
--directive is used to identify the subsym as a local macro variable
--*note `.var': TIC54X-Directives.
--
-- Substitution may be forced in situations where replacement might be
--ambiguous by placing colons on either side of the subsym. The following
--code:
--
-- .eval "10",x
-- LAB:X: add #x, a
--
-- When assembled becomes:
--
-- LAB10 add #10, a
--
-- Smaller parts of the string assigned to a subsym may be accessed with
--the following syntax:
--
--``:SYMBOL(CHAR_INDEX):''
-- Evaluates to a single-character string, the character at
-- CHAR_INDEX.
--
--``:SYMBOL(START,LENGTH):''
-- Evaluates to a substring of SYMBOL beginning at START with length
-- LENGTH.
--
--
--File: as.info, Node: TIC54X-Locals, Next: TIC54X-Builtins, Prev: TIC54X-Subsyms, Up: TIC54X-Dependent
--
--9.42.6 Local Labels
---------------------
--
--Local labels may be defined in two ways:
--
-- * $N, where N is a decimal number between 0 and 9
--
-- * LABEL?, where LABEL is any legal symbol name.
--
-- Local labels thus defined may be redefined or automatically
--generated. The scope of a local label is based on when it may be
--undefined or reset. This happens when one of the following situations
--is encountered:
--
-- * .newblock directive *note `.newblock': TIC54X-Directives.
--
-- * The current section is changed (.sect, .text, or .data)
--
-- * Entering or leaving an included file
--
-- * The macro scope where the label was defined is exited
--
--
--File: as.info, Node: TIC54X-Builtins, Next: TIC54X-Ext, Prev: TIC54X-Locals, Up: TIC54X-Dependent
--
--9.42.7 Math Builtins
----------------------
--
--The following built-in functions may be used to generate a
--floating-point value. All return a floating-point value except `$cvi',
--`$int', and `$sgn', which return an integer value.
--
--``$acos(EXPR)''
-- Returns the floating point arccosine of EXPR.
--
--``$asin(EXPR)''
-- Returns the floating point arcsine of EXPR.
--
--``$atan(EXPR)''
-- Returns the floating point arctangent of EXPR.
--
--``$atan2(EXPR1,EXPR2)''
-- Returns the floating point arctangent of EXPR1 / EXPR2.
--
--``$ceil(EXPR)''
-- Returns the smallest integer not less than EXPR as floating point.
--
--``$cosh(EXPR)''
-- Returns the floating point hyperbolic cosine of EXPR.
--
--``$cos(EXPR)''
-- Returns the floating point cosine of EXPR.
--
--``$cvf(EXPR)''
-- Returns the integer value EXPR converted to floating-point.
--
--``$cvi(EXPR)''
-- Returns the floating point value EXPR converted to integer.
--
--``$exp(EXPR)''
-- Returns the floating point value e ^ EXPR.
--
--``$fabs(EXPR)''
-- Returns the floating point absolute value of EXPR.
--
--``$floor(EXPR)''
-- Returns the largest integer that is not greater than EXPR as
-- floating point.
--
--``$fmod(EXPR1,EXPR2)''
-- Returns the floating point remainder of EXPR1 / EXPR2.
--
--``$int(EXPR)''
-- Returns 1 if EXPR evaluates to an integer, zero otherwise.
--
--``$ldexp(EXPR1,EXPR2)''
-- Returns the floating point value EXPR1 * 2 ^ EXPR2.
--
--``$log10(EXPR)''
-- Returns the base 10 logarithm of EXPR.
--
--``$log(EXPR)''
-- Returns the natural logarithm of EXPR.
--
--``$max(EXPR1,EXPR2)''
-- Returns the floating point maximum of EXPR1 and EXPR2.
--
--``$min(EXPR1,EXPR2)''
-- Returns the floating point minimum of EXPR1 and EXPR2.
--
--``$pow(EXPR1,EXPR2)''
-- Returns the floating point value EXPR1 ^ EXPR2.
--
--``$round(EXPR)''
-- Returns the nearest integer to EXPR as a floating point number.
--
--``$sgn(EXPR)''
-- Returns -1, 0, or 1 based on the sign of EXPR.
--
--``$sin(EXPR)''
-- Returns the floating point sine of EXPR.
--
--``$sinh(EXPR)''
-- Returns the floating point hyperbolic sine of EXPR.
--
--``$sqrt(EXPR)''
-- Returns the floating point square root of EXPR.
--
--``$tan(EXPR)''
-- Returns the floating point tangent of EXPR.
--
--``$tanh(EXPR)''
-- Returns the floating point hyperbolic tangent of EXPR.
--
--``$trunc(EXPR)''
-- Returns the integer value of EXPR truncated towards zero as
-- floating point.
--
--
--
--File: as.info, Node: TIC54X-Ext, Next: TIC54X-Directives, Prev: TIC54X-Builtins, Up: TIC54X-Dependent
--
--9.42.8 Extended Addressing
----------------------------
--
--The `LDX' pseudo-op is provided for loading the extended addressing bits
--of a label or address. For example, if an address `_label' resides in
--extended program memory, the value of `_label' may be loaded as follows:
-- ldx #_label,16,a ; loads extended bits of _label
-- or #_label,a ; loads lower 16 bits of _label
-- bacc a ; full address is in accumulator A
--
--
--File: as.info, Node: TIC54X-Directives, Next: TIC54X-Macros, Prev: TIC54X-Ext, Up: TIC54X-Dependent
--
--9.42.9 Directives
-------------------
--
--`.align [SIZE]'
--`.even'
-- Align the section program counter on the next boundary, based on
-- SIZE. SIZE may be any power of 2. `.even' is equivalent to
-- `.align' with a SIZE of 2.
-- `1'
-- Align SPC to word boundary
--
-- `2'
-- Align SPC to longword boundary (same as .even)
--
-- `128'
-- Align SPC to page boundary
--
--`.asg STRING, NAME'
-- Assign NAME the string STRING. String replacement is performed on
-- STRING before assignment.
--
--`.eval STRING, NAME'
-- Evaluate the contents of string STRING and assign the result as a
-- string to the subsym NAME. String replacement is performed on
-- STRING before assignment.
--
--`.bss SYMBOL, SIZE [, [BLOCKING_FLAG] [,ALIGNMENT_FLAG]]'
-- Reserve space for SYMBOL in the .bss section. SIZE is in words.
-- If present, BLOCKING_FLAG indicates the allocated space should be
-- aligned on a page boundary if it would otherwise cross a page
-- boundary. If present, ALIGNMENT_FLAG causes the assembler to
-- allocate SIZE on a long word boundary.
--
--`.byte VALUE [,...,VALUE_N]'
--`.ubyte VALUE [,...,VALUE_N]'
--`.char VALUE [,...,VALUE_N]'
--`.uchar VALUE [,...,VALUE_N]'
-- Place one or more bytes into consecutive words of the current
-- section. The upper 8 bits of each word is zero-filled. If a
-- label is used, it points to the word allocated for the first byte
-- encountered.
--
--`.clink ["SECTION_NAME"]'
-- Set STYP_CLINK flag for this section, which indicates to the
-- linker that if no symbols from this section are referenced, the
-- section should not be included in the link. If SECTION_NAME is
-- omitted, the current section is used.
--
--`.c_mode'
-- TBD.
--
--`.copy "FILENAME" | FILENAME'
--`.include "FILENAME" | FILENAME'
-- Read source statements from FILENAME. The normal include search
-- path is used. Normally .copy will cause statements from the
-- included file to be printed in the assembly listing and .include
-- will not, but this distinction is not currently implemented.
--
--`.data'
-- Begin assembling code into the .data section.
--
--`.double VALUE [,...,VALUE_N]'
--`.ldouble VALUE [,...,VALUE_N]'
--`.float VALUE [,...,VALUE_N]'
--`.xfloat VALUE [,...,VALUE_N]'
-- Place an IEEE single-precision floating-point representation of
-- one or more floating-point values into the current section. All
-- but `.xfloat' align the result on a longword boundary. Values are
-- stored most-significant word first.
--
--`.drlist'
--`.drnolist'
-- Control printing of directives to the listing file. Ignored.
--
--`.emsg STRING'
--`.mmsg STRING'
--`.wmsg STRING'
-- Emit a user-defined error, message, or warning, respectively.
--
--`.far_mode'
-- Use extended addressing when assembling statements. This should
-- appear only once per file, and is equivalent to the -mfar-mode
-- option *note `-mfar-mode': TIC54X-Opts.
--
--`.fclist'
--`.fcnolist'
-- Control printing of false conditional blocks to the listing file.
--
--`.field VALUE [,SIZE]'
-- Initialize a bitfield of SIZE bits in the current section. If
-- VALUE is relocatable, then SIZE must be 16. SIZE defaults to 16
-- bits. If VALUE does not fit into SIZE bits, the value will be
-- truncated. Successive `.field' directives will pack starting at
-- the current word, filling the most significant bits first, and
-- aligning to the start of the next word if the field size does not
-- fit into the space remaining in the current word. A `.align'
-- directive with an operand of 1 will force the next `.field'
-- directive to begin packing into a new word. If a label is used, it
-- points to the word that contains the specified field.
--
--`.global SYMBOL [,...,SYMBOL_N]'
--`.def SYMBOL [,...,SYMBOL_N]'
--`.ref SYMBOL [,...,SYMBOL_N]'
-- `.def' nominally identifies a symbol defined in the current file
-- and available to other files. `.ref' identifies a symbol used in
-- the current file but defined elsewhere. Both map to the standard
-- `.global' directive.
--
--`.half VALUE [,...,VALUE_N]'
--`.uhalf VALUE [,...,VALUE_N]'
--`.short VALUE [,...,VALUE_N]'
--`.ushort VALUE [,...,VALUE_N]'
--`.int VALUE [,...,VALUE_N]'
--`.uint VALUE [,...,VALUE_N]'
--`.word VALUE [,...,VALUE_N]'
--`.uword VALUE [,...,VALUE_N]'
-- Place one or more values into consecutive words of the current
-- section. If a label is used, it points to the word allocated for
-- the first value encountered.
--
--`.label SYMBOL'
-- Define a special SYMBOL to refer to the load time address of the
-- current section program counter.
--
--`.length'
--`.width'
-- Set the page length and width of the output listing file. Ignored.
--
--`.list'
--`.nolist'
-- Control whether the source listing is printed. Ignored.
--
--`.long VALUE [,...,VALUE_N]'
--`.ulong VALUE [,...,VALUE_N]'
--`.xlong VALUE [,...,VALUE_N]'
-- Place one or more 32-bit values into consecutive words in the
-- current section. The most significant word is stored first.
-- `.long' and `.ulong' align the result on a longword boundary;
-- `xlong' does not.
--
--`.loop [COUNT]'
--`.break [CONDITION]'
--`.endloop'
-- Repeatedly assemble a block of code. `.loop' begins the block, and
-- `.endloop' marks its termination. COUNT defaults to 1024, and
-- indicates the number of times the block should be repeated.
-- `.break' terminates the loop so that assembly begins after the
-- `.endloop' directive. The optional CONDITION will cause the loop
-- to terminate only if it evaluates to zero.
--
--`MACRO_NAME .macro [PARAM1][,...PARAM_N]'
--`[.mexit]'
--`.endm'
-- See the section on macros for more explanation (*Note
-- TIC54X-Macros::.
--
--`.mlib "FILENAME" | FILENAME'
-- Load the macro library FILENAME. FILENAME must be an archived
-- library (BFD ar-compatible) of text files, expected to contain
-- only macro definitions. The standard include search path is used.
--
--`.mlist'
--`.mnolist'
-- Control whether to include macro and loop block expansions in the
-- listing output. Ignored.
--
--`.mmregs'
-- Define global symbolic names for the 'c54x registers. Supposedly
-- equivalent to executing `.set' directives for each register with
-- its memory-mapped value, but in reality is provided only for
-- compatibility and does nothing.
--
--`.newblock'
-- This directive resets any TIC54X local labels currently defined.
-- Normal `as' local labels are unaffected.
--
--`.option OPTION_LIST'
-- Set listing options. Ignored.
--
--`.sblock "SECTION_NAME" | SECTION_NAME [,"NAME_N" | NAME_N]'
-- Designate SECTION_NAME for blocking. Blocking guarantees that a
-- section will start on a page boundary (128 words) if it would
-- otherwise cross a page boundary. Only initialized sections may be
-- designated with this directive. See also *Note TIC54X-Block::.
--
--`.sect "SECTION_NAME"'
-- Define a named initialized section and make it the current section.
--
--`SYMBOL .set "VALUE"'
--`SYMBOL .equ "VALUE"'
-- Equate a constant VALUE to a SYMBOL, which is placed in the symbol
-- table. SYMBOL may not be previously defined.
--
--`.space SIZE_IN_BITS'
--`.bes SIZE_IN_BITS'
-- Reserve the given number of bits in the current section and
-- zero-fill them. If a label is used with `.space', it points to the
-- *first* word reserved. With `.bes', the label points to the
-- *last* word reserved.
--
--`.sslist'
--`.ssnolist'
-- Controls the inclusion of subsym replacement in the listing
-- output. Ignored.
--
--`.string "STRING" [,...,"STRING_N"]'
--`.pstring "STRING" [,...,"STRING_N"]'
-- Place 8-bit characters from STRING into the current section.
-- `.string' zero-fills the upper 8 bits of each word, while
-- `.pstring' puts two characters into each word, filling the
-- most-significant bits first. Unused space is zero-filled. If a
-- label is used, it points to the first word initialized.
--
--`[STAG] .struct [OFFSET]'
--`[NAME_1] element [COUNT_1]'
--`[NAME_2] element [COUNT_2]'
--`[TNAME] .tag STAGX [TCOUNT]'
--`...'
--`[NAME_N] element [COUNT_N]'
--`[SSIZE] .endstruct'
--`LABEL .tag [STAG]'
-- Assign symbolic offsets to the elements of a structure. STAG
-- defines a symbol to use to reference the structure. OFFSET
-- indicates a starting value to use for the first element
-- encountered; otherwise it defaults to zero. Each element can have
-- a named offset, NAME, which is a symbol assigned the value of the
-- element's offset into the structure. If STAG is missing, these
-- become global symbols. COUNT adjusts the offset that many times,
-- as if `element' were an array. `element' may be one of `.byte',
-- `.word', `.long', `.float', or any equivalent of those, and the
-- structure offset is adjusted accordingly. `.field' and `.string'
-- are also allowed; the size of `.field' is one bit, and `.string'
-- is considered to be one word in size. Only element descriptors,
-- structure/union tags, `.align' and conditional assembly directives
-- are allowed within `.struct'/`.endstruct'. `.align' aligns member
-- offsets to word boundaries only. SSIZE, if provided, will always
-- be assigned the size of the structure.
--
-- The `.tag' directive, in addition to being used to define a
-- structure/union element within a structure, may be used to apply a
-- structure to a symbol. Once applied to LABEL, the individual
-- structure elements may be applied to LABEL to produce the desired
-- offsets using LABEL as the structure base.
--
--`.tab'
-- Set the tab size in the output listing. Ignored.
--
--`[UTAG] .union'
--`[NAME_1] element [COUNT_1]'
--`[NAME_2] element [COUNT_2]'
--`[TNAME] .tag UTAGX[,TCOUNT]'
--`...'
--`[NAME_N] element [COUNT_N]'
--`[USIZE] .endstruct'
--`LABEL .tag [UTAG]'
-- Similar to `.struct', but the offset after each element is reset to
-- zero, and the USIZE is set to the maximum of all defined elements.
-- Starting offset for the union is always zero.
--
--`[SYMBOL] .usect "SECTION_NAME", SIZE, [,[BLOCKING_FLAG] [,ALIGNMENT_FLAG]]'
-- Reserve space for variables in a named, uninitialized section
-- (similar to .bss). `.usect' allows definitions sections
-- independent of .bss. SYMBOL points to the first location reserved
-- by this allocation. The symbol may be used as a variable name.
-- SIZE is the allocated size in words. BLOCKING_FLAG indicates
-- whether to block this section on a page boundary (128 words)
-- (*note TIC54X-Block::). ALIGNMENT FLAG indicates whether the
-- section should be longword-aligned.
--
--`.var SYM[,..., SYM_N]'
-- Define a subsym to be a local variable within a macro. See *Note
-- TIC54X-Macros::.
--
--`.version VERSION'
-- Set which processor to build instructions for. Though the
-- following values are accepted, the op is ignored.
-- `541'
-- `542'
-- `543'
-- `545'
-- `545LP'
-- `546LP'
-- `548'
-- `549'
--
--
--File: as.info, Node: TIC54X-Macros, Next: TIC54X-MMRegs, Prev: TIC54X-Directives, Up: TIC54X-Dependent
--
--9.42.10 Macros
----------------
--
--Macros do not require explicit dereferencing of arguments (i.e., \ARG).
--
-- During macro expansion, the macro parameters are converted to
--subsyms. If the number of arguments passed the macro invocation
--exceeds the number of parameters defined, the last parameter is
--assigned the string equivalent of all remaining arguments. If fewer
--arguments are given than parameters, the missing parameters are
--assigned empty strings. To include a comma in an argument, you must
--enclose the argument in quotes.
--
-- The following built-in subsym functions allow examination of the
--string value of subsyms (or ordinary strings). The arguments are
--strings unless otherwise indicated (subsyms passed as args will be
--replaced by the strings they represent).
--``$symlen(STR)''
-- Returns the length of STR.
--
--``$symcmp(STR1,STR2)''
-- Returns 0 if STR1 == STR2, non-zero otherwise.
--
--``$firstch(STR,CH)''
-- Returns index of the first occurrence of character constant CH in
-- STR.
--
--``$lastch(STR,CH)''
-- Returns index of the last occurrence of character constant CH in
-- STR.
--
--``$isdefed(SYMBOL)''
-- Returns zero if the symbol SYMBOL is not in the symbol table,
-- non-zero otherwise.
--
--``$ismember(SYMBOL,LIST)''
-- Assign the first member of comma-separated string LIST to SYMBOL;
-- LIST is reassigned the remainder of the list. Returns zero if
-- LIST is a null string. Both arguments must be subsyms.
--
--``$iscons(EXPR)''
-- Returns 1 if string EXPR is binary, 2 if octal, 3 if hexadecimal,
-- 4 if a character, 5 if decimal, and zero if not an integer.
--
--``$isname(NAME)''
-- Returns 1 if NAME is a valid symbol name, zero otherwise.
--
--``$isreg(REG)''
-- Returns 1 if REG is a valid predefined register name (AR0-AR7
-- only).
--
--``$structsz(STAG)''
-- Returns the size of the structure or union represented by STAG.
--
--``$structacc(STAG)''
-- Returns the reference point of the structure or union represented
-- by STAG. Always returns zero.
--
--
--
--File: as.info, Node: TIC54X-MMRegs, Next: TIC54X-Syntax, Prev: TIC54X-Macros, Up: TIC54X-Dependent
--
--9.42.11 Memory-mapped Registers
---------------------------------
--
--The following symbols are recognized as memory-mapped registers:
--
--
--
--File: as.info, Node: TIC54X-Syntax, Prev: TIC54X-MMRegs, Up: TIC54X-Dependent
--
--9.42.12 TIC54X Syntax
-----------------------
--
--* Menu:
--
--* TIC54X-Chars:: Special Characters
--
--
--File: as.info, Node: TIC54X-Chars, Up: TIC54X-Syntax
--
--9.42.12.1 Special Characters
--............................
--
--The presence of a `;' appearing anywhere on a line indicates the start
--of a comment that extends to the end of that line.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line can also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- The presence of an asterisk (`*') at the start of a line also
--indicates a comment that extends to the end of that line.
--
-- The TIC54X assembler does not currently support a line separator
--character.
--
--
--File: as.info, Node: TIC6X-Dependent, Next: TILE-Gx-Dependent, Prev: TIC54X-Dependent, Up: Machine Dependencies
--
--9.43 TIC6X Dependent Features
--=============================
--
--* Menu:
--
--* TIC6X Options:: Options
--* TIC6X Syntax:: Syntax
--* TIC6X Directives:: Directives
--
--
--File: as.info, Node: TIC6X Options, Next: TIC6X Syntax, Up: TIC6X-Dependent
--
--9.43.1 TIC6X Options
----------------------
--
--`-march=ARCH'
-- Enable (only) instructions from architecture ARCH. By default,
-- all instructions are permitted.
--
-- The following values of ARCH are accepted: `c62x', `c64x',
-- `c64x+', `c67x', `c67x+', `c674x'.
--
--`-mdsbt'
--`-mno-dsbt'
-- The `-mdsbt' option causes the assembler to generate the
-- `Tag_ABI_DSBT' attribute with a value of 1, indicating that the
-- code is using DSBT addressing. The `-mno-dsbt' option, the
-- default, causes the tag to have a value of 0, indicating that the
-- code does not use DSBT addressing. The linker will emit a warning
-- if objects of different type (DSBT and non-DSBT) are linked
-- together.
--
--`-mpid=no'
--`-mpid=near'
--`-mpid=far'
-- The `-mpid=' option causes the assembler to generate the
-- `Tag_ABI_PID' attribute with a value indicating the form of data
-- addressing used by the code. `-mpid=no', the default, indicates
-- position-dependent data addressing, `-mpid=near' indicates
-- position-independent addressing with GOT accesses using near DP
-- addressing, and `-mpid=far' indicates position-independent
-- addressing with GOT accesses using far DP addressing. The linker
-- will emit a warning if objects built with different settings of
-- this option are linked together.
--
--`-mpic'
--`-mno-pic'
-- The `-mpic' option causes the assembler to generate the
-- `Tag_ABI_PIC' attribute with a value of 1, indicating that the
-- code is using position-independent code addressing, The
-- `-mno-pic' option, the default, causes the tag to have a value of
-- 0, indicating position-dependent code addressing. The linker will
-- emit a warning if objects of different type (position-dependent and
-- position-independent) are linked together.
--
--`-mbig-endian'
--`-mlittle-endian'
-- Generate code for the specified endianness. The default is
-- little-endian.
--
--
--
--File: as.info, Node: TIC6X Syntax, Next: TIC6X Directives, Prev: TIC6X Options, Up: TIC6X-Dependent
--
--9.43.2 TIC6X Syntax
---------------------
--
--The presence of a `;' on a line indicates the start of a comment that
--extends to the end of the current line. If a `#' or `*' appears as the
--first character of a line, the whole line is treated as a comment.
--Note that if a line starts with a `#' character then it can also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- The `@' character can be used instead of a newline to separate
--statements.
--
-- Instruction, register and functional unit names are case-insensitive.
--`as' requires fully-specified functional unit names, such as `.S1',
--`.L1X' or `.D1T2', on all instructions using a functional unit.
--
-- For some instructions, there may be syntactic ambiguity between
--register or functional unit names and the names of labels or other
--symbols. To avoid this, enclose the ambiguous symbol name in
--parentheses; register and functional unit names may not be enclosed in
--parentheses.
--
--
--File: as.info, Node: TIC6X Directives, Prev: TIC6X Syntax, Up: TIC6X-Dependent
--
--9.43.3 TIC6X Directives
-------------------------
--
--Directives controlling the set of instructions accepted by the
--assembler have effect for instructions between the directive and any
--subsequent directive overriding it.
--
--`.arch ARCH'
-- This has the same effect as `-march=ARCH'.
--
--`.cantunwind'
-- Prevents unwinding through the current function. No personality
-- routine or exception table data is required or permitted.
--
-- If this is not specified then frame unwinding information will be
-- constructed from CFI directives. *note CFI directives::.
--
--`.c6xabi_attribute TAG, VALUE'
-- Set the C6000 EABI build attribute TAG to VALUE.
--
-- The TAG is either an attribute number or one of `Tag_ISA',
-- `Tag_ABI_wchar_t', `Tag_ABI_stack_align_needed',
-- `Tag_ABI_stack_align_preserved', `Tag_ABI_DSBT', `Tag_ABI_PID',
-- `Tag_ABI_PIC', `TAG_ABI_array_object_alignment',
-- `TAG_ABI_array_object_align_expected', `Tag_ABI_compatibility' and
-- `Tag_ABI_conformance'. The VALUE is either a `number',
-- `"string"', or `number, "string"' depending on the tag.
--
--`.ehtype SYMBOL'
-- Output an exception type table reference to SYMBOL.
--
--`.endp'
-- Marks the end of and exception table or function. If preceeded by
-- a `.handlerdata' directive then this also switched back to the
-- previous text section.
--
--`.handlerdata'
-- Marks the end of the current function, and the start of the
-- exception table entry for that function. Anything between this
-- directive and the `.endp' directive will be added to the exception
-- table entry.
--
-- Must be preceded by a CFI block containing a `.cfi_lsda' directive.
--
--`.nocmp'
-- Disallow use of C64x+ compact instructions in the current text
-- section.
--
--`.personalityindex INDEX'
-- Sets the personality routine for the current function to the ABI
-- specified compact routine number INDEX
--
--`.personality NAME'
-- Sets the personality routine for the current function to NAME.
--
--`.scomm SYMBOL, SIZE, ALIGN'
-- Like `.comm', creating a common symbol SYMBOL with size SIZE and
-- alignment ALIGN, but unlike when using `.comm', this symbol will
-- be placed into the small BSS section by the linker.
--
--
--
--File: as.info, Node: TILE-Gx-Dependent, Next: TILEPro-Dependent, Prev: TIC6X-Dependent, Up: Machine Dependencies
--
--9.44 TILE-Gx Dependent Features
--===============================
--
--* Menu:
--
--* TILE-Gx Options:: TILE-Gx Options
--* TILE-Gx Syntax:: TILE-Gx Syntax
--* TILE-Gx Directives:: TILE-Gx Directives
--
--
--File: as.info, Node: TILE-Gx Options, Next: TILE-Gx Syntax, Up: TILE-Gx-Dependent
--
--9.44.1 Options
----------------
--
--The following table lists all available TILE-Gx specific options:
--
--`-m32 | -m64'
-- Select the word size, either 32 bits or 64 bits.
--
--`-EB | -EL'
-- Select the endianness, either big-endian (-EB) or little-endian
-- (-EL).
--
--
--
--File: as.info, Node: TILE-Gx Syntax, Next: TILE-Gx Directives, Prev: TILE-Gx Options, Up: TILE-Gx-Dependent
--
--9.44.2 Syntax
---------------
--
--Block comments are delimited by `/*' and `*/'. End of line comments
--may be introduced by `#'.
--
-- Instructions consist of a leading opcode or macro name followed by
--whitespace and an optional comma-separated list of operands:
--
-- OPCODE [OPERAND, ...]
--
-- Instructions must be separated by a newline or semicolon.
--
-- There are two ways to write code: either write naked instructions,
--which the assembler is free to combine into VLIW bundles, or specify
--the VLIW bundles explicitly.
--
-- Bundles are specified using curly braces:
--
-- { ADD r3,r4,r5 ; ADD r7,r8,r9 ; LW r10,r11 }
--
-- A bundle can span multiple lines. If you want to put multiple
--instructions on a line, whether in a bundle or not, you need to
--separate them with semicolons as in this example.
--
-- A bundle may contain one or more instructions, up to the limit
--specified by the ISA (currently three). If fewer instructions are
--specified than the hardware supports in a bundle, the assembler inserts
--`fnop' instructions automatically.
--
-- The assembler will prefer to preserve the ordering of instructions
--within the bundle, putting the first instruction in a lower-numbered
--pipeline than the next one, etc. This fact, combined with the optional
--use of explicit `fnop' or `nop' instructions, allows precise control
--over which pipeline executes each instruction.
--
-- If the instructions cannot be bundled in the listed order, the
--assembler will automatically try to find a valid pipeline assignment.
--If there is no way to bundle the instructions together, the assembler
--reports an error.
--
-- The assembler does not yet auto-bundle (automatically combine
--multiple instructions into one bundle), but it reserves the right to do
--so in the future. If you want to force an instruction to run by
--itself, put it in a bundle explicitly with curly braces and use `nop'
--instructions (not `fnop') to fill the remaining pipeline slots in that
--bundle.
--
--* Menu:
--
--* TILE-Gx Opcodes:: Opcode Naming Conventions.
--* TILE-Gx Registers:: Register Naming.
--* TILE-Gx Modifiers:: Symbolic Operand Modifiers.
--
--
--File: as.info, Node: TILE-Gx Opcodes, Next: TILE-Gx Registers, Up: TILE-Gx Syntax
--
--9.44.2.1 Opcode Names
--.....................
--
--For a complete list of opcodes and descriptions of their semantics, see
--`TILE-Gx Instruction Set Architecture', available upon request at
--www.tilera.com.
--
--
--File: as.info, Node: TILE-Gx Registers, Next: TILE-Gx Modifiers, Prev: TILE-Gx Opcodes, Up: TILE-Gx Syntax
--
--9.44.2.2 Register Names
--.......................
--
--General-purpose registers are represented by predefined symbols of the
--form `rN', where N represents a number between `0' and `63'. However,
--the following registers have canonical names that must be used instead:
--
--`r54'
-- sp
--
--`r55'
-- lr
--
--`r56'
-- sn
--
--`r57'
-- idn0
--
--`r58'
-- idn1
--
--`r59'
-- udn0
--
--`r60'
-- udn1
--
--`r61'
-- udn2
--
--`r62'
-- udn3
--
--`r63'
-- zero
--
--
-- The assembler will emit a warning if a numeric name is used instead
--of the non-numeric name. The `.no_require_canonical_reg_names'
--assembler pseudo-op turns off this warning.
--`.require_canonical_reg_names' turns it back on.
--
--
--File: as.info, Node: TILE-Gx Modifiers, Prev: TILE-Gx Registers, Up: TILE-Gx Syntax
--
--9.44.2.3 Symbolic Operand Modifiers
--...................................
--
--The assembler supports several modifiers when using symbol addresses in
--TILE-Gx instruction operands. The general syntax is the following:
--
-- modifier(symbol)
--
-- The following modifiers are supported:
--
--`hw0'
-- This modifier is used to load bits 0-15 of the symbol's address.
--
--`hw1'
-- This modifier is used to load bits 16-31 of the symbol's address.
--
--`hw2'
-- This modifier is used to load bits 32-47 of the symbol's address.
--
--`hw3'
-- This modifier is used to load bits 48-63 of the symbol's address.
--
--`hw0_last'
-- This modifier yields the same value as `hw0', but it also checks
-- that the value does not overflow.
--
--`hw1_last'
-- This modifier yields the same value as `hw1', but it also checks
-- that the value does not overflow.
--
--`hw2_last'
-- This modifier yields the same value as `hw2', but it also checks
-- that the value does not overflow.
--
-- A 48-bit symbolic value is constructed by using the following
-- idiom:
--
-- moveli r0, hw2_last(sym)
-- shl16insli r0, r0, hw1(sym)
-- shl16insli r0, r0, hw0(sym)
--
--`hw0_got'
-- This modifier is used to load bits 0-15 of the symbol's offset in
-- the GOT entry corresponding to the symbol.
--
--`hw0_last_got'
-- This modifier yields the same value as `hw0_got', but it also
-- checks that the value does not overflow.
--
--`hw1_last_got'
-- This modifier is used to load bits 16-31 of the symbol's offset in
-- the GOT entry corresponding to the symbol, and it also checks that
-- the value does not overflow.
--
--`plt'
-- This modifier is used for function symbols. It causes a
-- _procedure linkage table_, an array of code stubs, to be created
-- at the time the shared object is created or linked against,
-- together with a global offset table entry. The value is a
-- pc-relative offset to the corresponding stub code in the procedure
-- linkage table. This arrangement causes the run-time symbol
-- resolver to be called to look up and set the value of the symbol
-- the first time the function is called (at latest; depending
-- environment variables). It is only safe to leave the symbol
-- unresolved this way if all references are function calls.
--
--`hw0_plt'
-- This modifier is used to load bits 0-15 of the pc-relative address
-- of a plt entry.
--
--`hw1_plt'
-- This modifier is used to load bits 16-31 of the pc-relative
-- address of a plt entry.
--
--`hw1_last_plt'
-- This modifier yields the same value as `hw1_plt', but it also
-- checks that the value does not overflow.
--
--`hw2_last_plt'
-- This modifier is used to load bits 32-47 of the pc-relative
-- address of a plt entry, and it also checks that the value does not
-- overflow.
--
--`hw0_tls_gd'
-- This modifier is used to load bits 0-15 of the offset of the GOT
-- entry of the symbol's TLS descriptor, to be used for
-- general-dynamic TLS accesses.
--
--`hw0_last_tls_gd'
-- This modifier yields the same value as `hw0_tls_gd', but it also
-- checks that the value does not overflow.
--
--`hw1_last_tls_gd'
-- This modifier is used to load bits 16-31 of the offset of the GOT
-- entry of the symbol's TLS descriptor, to be used for
-- general-dynamic TLS accesses. It also checks that the value does
-- not overflow.
--
--`hw0_tls_ie'
-- This modifier is used to load bits 0-15 of the offset of the GOT
-- entry containing the offset of the symbol's address from the TCB,
-- to be used for initial-exec TLS accesses.
--
--`hw0_last_tls_ie'
-- This modifier yields the same value as `hw0_tls_ie', but it also
-- checks that the value does not overflow.
--
--`hw1_last_tls_ie'
-- This modifier is used to load bits 16-31 of the offset of the GOT
-- entry containing the offset of the symbol's address from the TCB,
-- to be used for initial-exec TLS accesses. It also checks that the
-- value does not overflow.
--
--`hw0_tls_le'
-- This modifier is used to load bits 0-15 of the offset of the
-- symbol's address from the TCB, to be used for local-exec TLS
-- accesses.
--
--`hw0_last_tls_le'
-- This modifier yields the same value as `hw0_tls_le', but it also
-- checks that the value does not overflow.
--
--`hw1_last_tls_le'
-- This modifier is used to load bits 16-31 of the offset of the
-- symbol's address from the TCB, to be used for local-exec TLS
-- accesses. It also checks that the value does not overflow.
--
--`tls_gd_call'
-- This modifier is used to tag an instrution as the "call" part of a
-- calling sequence for a TLS GD reference of its operand.
--
--`tls_gd_add'
-- This modifier is used to tag an instruction as the "add" part of a
-- calling sequence for a TLS GD reference of its operand.
--
--`tls_ie_load'
-- This modifier is used to tag an instruction as the "load" part of a
-- calling sequence for a TLS IE reference of its operand.
--
--
--
--File: as.info, Node: TILE-Gx Directives, Prev: TILE-Gx Syntax, Up: TILE-Gx-Dependent
--
--9.44.3 TILE-Gx Directives
---------------------------
--
--`.align EXPRESSION [, EXPRESSION]'
-- This is the generic .ALIGN directive. The first argument is the
-- requested alignment in bytes.
--
--`.allow_suspicious_bundles'
-- Turns on error checking for combinations of instructions in a
-- bundle that probably indicate a programming error. This is on by
-- default.
--
--`.no_allow_suspicious_bundles'
-- Turns off error checking for combinations of instructions in a
-- bundle that probably indicate a programming error.
--
--`.require_canonical_reg_names'
-- Require that canonical register names be used, and emit a warning
-- if the numeric names are used. This is on by default.
--
--`.no_require_canonical_reg_names'
-- Permit the use of numeric names for registers that have canonical
-- names.
--
--
--
--File: as.info, Node: TILEPro-Dependent, Next: V850-Dependent, Prev: TILE-Gx-Dependent, Up: Machine Dependencies
--
--9.45 TILEPro Dependent Features
--===============================
--
--* Menu:
--
--* TILEPro Options:: TILEPro Options
--* TILEPro Syntax:: TILEPro Syntax
--* TILEPro Directives:: TILEPro Directives
--
--
--File: as.info, Node: TILEPro Options, Next: TILEPro Syntax, Up: TILEPro-Dependent
--
--9.45.1 Options
----------------
--
--`as' has no machine-dependent command-line options for TILEPro.
--
--
--File: as.info, Node: TILEPro Syntax, Next: TILEPro Directives, Prev: TILEPro Options, Up: TILEPro-Dependent
--
--9.45.2 Syntax
---------------
--
--Block comments are delimited by `/*' and `*/'. End of line comments
--may be introduced by `#'.
--
-- Instructions consist of a leading opcode or macro name followed by
--whitespace and an optional comma-separated list of operands:
--
-- OPCODE [OPERAND, ...]
--
-- Instructions must be separated by a newline or semicolon.
--
-- There are two ways to write code: either write naked instructions,
--which the assembler is free to combine into VLIW bundles, or specify
--the VLIW bundles explicitly.
--
-- Bundles are specified using curly braces:
--
-- { ADD r3,r4,r5 ; ADD r7,r8,r9 ; LW r10,r11 }
--
-- A bundle can span multiple lines. If you want to put multiple
--instructions on a line, whether in a bundle or not, you need to
--separate them with semicolons as in this example.
--
-- A bundle may contain one or more instructions, up to the limit
--specified by the ISA (currently three). If fewer instructions are
--specified than the hardware supports in a bundle, the assembler inserts
--`fnop' instructions automatically.
--
-- The assembler will prefer to preserve the ordering of instructions
--within the bundle, putting the first instruction in a lower-numbered
--pipeline than the next one, etc. This fact, combined with the optional
--use of explicit `fnop' or `nop' instructions, allows precise control
--over which pipeline executes each instruction.
--
-- If the instructions cannot be bundled in the listed order, the
--assembler will automatically try to find a valid pipeline assignment.
--If there is no way to bundle the instructions together, the assembler
--reports an error.
--
-- The assembler does not yet auto-bundle (automatically combine
--multiple instructions into one bundle), but it reserves the right to do
--so in the future. If you want to force an instruction to run by
--itself, put it in a bundle explicitly with curly braces and use `nop'
--instructions (not `fnop') to fill the remaining pipeline slots in that
--bundle.
--
--* Menu:
--
--* TILEPro Opcodes:: Opcode Naming Conventions.
--* TILEPro Registers:: Register Naming.
--* TILEPro Modifiers:: Symbolic Operand Modifiers.
--
--
--File: as.info, Node: TILEPro Opcodes, Next: TILEPro Registers, Up: TILEPro Syntax
--
--9.45.2.1 Opcode Names
--.....................
--
--For a complete list of opcodes and descriptions of their semantics, see
--`TILE Processor User Architecture Manual', available upon request at
--www.tilera.com.
--
--
--File: as.info, Node: TILEPro Registers, Next: TILEPro Modifiers, Prev: TILEPro Opcodes, Up: TILEPro Syntax
--
--9.45.2.2 Register Names
--.......................
--
--General-purpose registers are represented by predefined symbols of the
--form `rN', where N represents a number between `0' and `63'. However,
--the following registers have canonical names that must be used instead:
--
--`r54'
-- sp
--
--`r55'
-- lr
--
--`r56'
-- sn
--
--`r57'
-- idn0
--
--`r58'
-- idn1
--
--`r59'
-- udn0
--
--`r60'
-- udn1
--
--`r61'
-- udn2
--
--`r62'
-- udn3
--
--`r63'
-- zero
--
--
-- The assembler will emit a warning if a numeric name is used instead
--of the canonical name. The `.no_require_canonical_reg_names' assembler
--pseudo-op turns off this warning. `.require_canonical_reg_names' turns
--it back on.
--
--
--File: as.info, Node: TILEPro Modifiers, Prev: TILEPro Registers, Up: TILEPro Syntax
--
--9.45.2.3 Symbolic Operand Modifiers
--...................................
--
--The assembler supports several modifiers when using symbol addresses in
--TILEPro instruction operands. The general syntax is the following:
--
-- modifier(symbol)
--
-- The following modifiers are supported:
--
--`lo16'
-- This modifier is used to load the low 16 bits of the symbol's
-- address, sign-extended to a 32-bit value (sign-extension allows it
-- to be range-checked against signed 16 bit immediate operands
-- without complaint).
--
--`hi16'
-- This modifier is used to load the high 16 bits of the symbol's
-- address, also sign-extended to a 32-bit value.
--
--`ha16'
-- `ha16(N)' is identical to `hi16(N)', except if `lo16(N)' is
-- negative it adds one to the `hi16(N)' value. This way `lo16' and
-- `ha16' can be added to create any 32-bit value using `auli'. For
-- example, here is how you move an arbitrary 32-bit address into r3:
--
-- moveli r3, lo16(sym)
-- auli r3, r3, ha16(sym)
--
--`got'
-- This modifier is used to load the offset of the GOT entry
-- corresponding to the symbol.
--
--`got_lo16'
-- This modifier is used to load the sign-extended low 16 bits of the
-- offset of the GOT entry corresponding to the symbol.
--
--`got_hi16'
-- This modifier is used to load the sign-extended high 16 bits of the
-- offset of the GOT entry corresponding to the symbol.
--
--`got_ha16'
-- This modifier is like `got_hi16', but it adds one if `got_lo16' of
-- the input value is negative.
--
--`plt'
-- This modifier is used for function symbols. It causes a
-- _procedure linkage table_, an array of code stubs, to be created
-- at the time the shared object is created or linked against,
-- together with a global offset table entry. The value is a
-- pc-relative offset to the corresponding stub code in the procedure
-- linkage table. This arrangement causes the run-time symbol
-- resolver to be called to look up and set the value of the symbol
-- the first time the function is called (at latest; depending
-- environment variables). It is only safe to leave the symbol
-- unresolved this way if all references are function calls.
--
--`tls_gd'
-- This modifier is used to load the offset of the GOT entry of the
-- symbol's TLS descriptor, to be used for general-dynamic TLS
-- accesses.
--
--`tls_gd_lo16'
-- This modifier is used to load the sign-extended low 16 bits of the
-- offset of the GOT entry of the symbol's TLS descriptor, to be used
-- for general dynamic TLS accesses.
--
--`tls_gd_hi16'
-- This modifier is used to load the sign-extended high 16 bits of the
-- offset of the GOT entry of the symbol's TLS descriptor, to be used
-- for general dynamic TLS accesses.
--
--`tls_gd_ha16'
-- This modifier is like `tls_gd_hi16', but it adds one to the value
-- if `tls_gd_lo16' of the input value is negative.
--
--`tls_ie'
-- This modifier is used to load the offset of the GOT entry
-- containing the offset of the symbol's address from the TCB, to be
-- used for initial-exec TLS accesses.
--
--`tls_ie_lo16'
-- This modifier is used to load the low 16 bits of the offset of the
-- GOT entry containing the offset of the symbol's address from the
-- TCB, to be used for initial-exec TLS accesses.
--
--`tls_ie_hi16'
-- This modifier is used to load the high 16 bits of the offset of the
-- GOT entry containing the offset of the symbol's address from the
-- TCB, to be used for initial-exec TLS accesses.
--
--`tls_ie_ha16'
-- This modifier is like `tls_ie_hi16', but it adds one to the value
-- if `tls_ie_lo16' of the input value is negative.
--
--`tls_le'
-- This modifier is used to load the offset of the symbol's address
-- from the TCB, to be used for local-exec TLS accesses.
--
--`tls_le_lo16'
-- This modifier is used to load the low 16 bits of the offset of the
-- symbol's address from the TCB, to be used for local-exec TLS
-- accesses.
--
--`tls_le_hi16'
-- This modifier is used to load the high 16 bits of the offset of the
-- symbol's address from the TCB, to be used for local-exec TLS
-- accesses.
--
--`tls_le_ha16'
-- This modifier is like `tls_le_hi16', but it adds one to the value
-- if `tls_le_lo16' of the input value is negative.
--
--`tls_gd_call'
-- This modifier is used to tag an instrution as the "call" part of a
-- calling sequence for a TLS GD reference of its operand.
--
--`tls_gd_add'
-- This modifier is used to tag an instruction as the "add" part of a
-- calling sequence for a TLS GD reference of its operand.
--
--`tls_ie_load'
-- This modifier is used to tag an instruction as the "load" part of a
-- calling sequence for a TLS IE reference of its operand.
--
--
--
--File: as.info, Node: TILEPro Directives, Prev: TILEPro Syntax, Up: TILEPro-Dependent
--
--9.45.3 TILEPro Directives
---------------------------
--
--`.align EXPRESSION [, EXPRESSION]'
-- This is the generic .ALIGN directive. The first argument is the
-- requested alignment in bytes.
--
--`.allow_suspicious_bundles'
-- Turns on error checking for combinations of instructions in a
-- bundle that probably indicate a programming error. This is on by
-- default.
--
--`.no_allow_suspicious_bundles'
-- Turns off error checking for combinations of instructions in a
-- bundle that probably indicate a programming error.
--
--`.require_canonical_reg_names'
-- Require that canonical register names be used, and emit a warning
-- if the numeric names are used. This is on by default.
--
--`.no_require_canonical_reg_names'
-- Permit the use of numeric names for registers that have canonical
-- names.
--
--
--
--File: as.info, Node: Z80-Dependent, Next: Z8000-Dependent, Prev: Xtensa-Dependent, Up: Machine Dependencies
--
--9.46 Z80 Dependent Features
--===========================
--
--* Menu:
--
--* Z80 Options:: Options
--* Z80 Syntax:: Syntax
--* Z80 Floating Point:: Floating Point
--* Z80 Directives:: Z80 Machine Directives
--* Z80 Opcodes:: Opcodes
--
--
--File: as.info, Node: Z80 Options, Next: Z80 Syntax, Up: Z80-Dependent
--
--9.46.1 Options
----------------
--
--The Zilog Z80 and Ascii R800 version of `as' have a few machine
--dependent options.
--`-z80'
-- Produce code for the Z80 processor. There are additional options to
-- request warnings and error messages for undocumented instructions.
--
--`-ignore-undocumented-instructions'
--`-Wnud'
-- Silently assemble undocumented Z80-instructions that have been
-- adopted as documented R800-instructions.
--
--`-ignore-unportable-instructions'
--`-Wnup'
-- Silently assemble all undocumented Z80-instructions.
--
--`-warn-undocumented-instructions'
--`-Wud'
-- Issue warnings for undocumented Z80-instructions that work on
-- R800, do not assemble other undocumented instructions without
-- warning.
--
--`-warn-unportable-instructions'
--`-Wup'
-- Issue warnings for other undocumented Z80-instructions, do not
-- treat any undocumented instructions as errors.
--
--`-forbid-undocumented-instructions'
--`-Fud'
-- Treat all undocumented z80-instructions as errors.
--
--`-forbid-unportable-instructions'
--`-Fup'
-- Treat undocumented z80-instructions that do not work on R800 as
-- errors.
--
--`-r800'
-- Produce code for the R800 processor. The assembler does not support
-- undocumented instructions for the R800. In line with common
-- practice, `as' uses Z80 instruction names for the R800 processor,
-- as far as they exist.
--
--
--File: as.info, Node: Z80 Syntax, Next: Z80 Floating Point, Prev: Z80 Options, Up: Z80-Dependent
--
--9.46.2 Syntax
---------------
--
--The assembler syntax closely follows the 'Z80 family CPU User Manual' by
--Zilog. In expressions a single `=' may be used as "is equal to"
--comparison operator.
--
-- Suffices can be used to indicate the radix of integer constants; `H'
--or `h' for hexadecimal, `D' or `d' for decimal, `Q', `O', `q' or `o'
--for octal, and `B' for binary.
--
-- The suffix `b' denotes a backreference to local label.
--
--* Menu:
--
--* Z80-Chars:: Special Characters
--* Z80-Regs:: Register Names
--* Z80-Case:: Case Sensitivity
--
--
--File: as.info, Node: Z80-Chars, Next: Z80-Regs, Up: Z80 Syntax
--
--9.46.2.1 Special Characters
--...........................
--
--The semicolon `;' is the line comment character;
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line could also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- The Z80 assembler does not support a line separator character.
--
-- The dollar sign `$' can be used as a prefix for hexadecimal numbers
--and as a symbol denoting the current location counter.
--
-- A backslash `\' is an ordinary character for the Z80 assembler.
--
-- The single quote `'' must be followed by a closing quote. If there
--is one character in between, it is a character constant, otherwise it is
--a string constant.
--
--
--File: as.info, Node: Z80-Regs, Next: Z80-Case, Prev: Z80-Chars, Up: Z80 Syntax
--
--9.46.2.2 Register Names
--.......................
--
--The registers are referred to with the letters assigned to them by
--Zilog. In addition `as' recognizes `ixl' and `ixh' as the least and
--most significant octet in `ix', and similarly `iyl' and `iyh' as parts
--of `iy'.
--
--
--File: as.info, Node: Z80-Case, Prev: Z80-Regs, Up: Z80 Syntax
--
--9.46.2.3 Case Sensitivity
--.........................
--
--Upper and lower case are equivalent in register names, opcodes,
--condition codes and assembler directives. The case of letters is
--significant in labels and symbol names. The case is also important to
--distinguish the suffix `b' for a backward reference to a local label
--from the suffix `B' for a number in binary notation.
--
--
--File: as.info, Node: Z80 Floating Point, Next: Z80 Directives, Prev: Z80 Syntax, Up: Z80-Dependent
--
--9.46.3 Floating Point
-----------------------
--
--Floating-point numbers are not supported.
--
--
--File: as.info, Node: Z80 Directives, Next: Z80 Opcodes, Prev: Z80 Floating Point, Up: Z80-Dependent
--
--9.46.4 Z80 Assembler Directives
---------------------------------
--
--`as' for the Z80 supports some additional directives for compatibility
--with other assemblers.
--
-- These are the additional directives in `as' for the Z80:
--
--`db EXPRESSION|STRING[,EXPRESSION|STRING...]'
--`defb EXPRESSION|STRING[,EXPRESSION|STRING...]'
-- For each STRING the characters are copied to the object file, for
-- each other EXPRESSION the value is stored in one byte. A warning
-- is issued in case of an overflow.
--
--`dw EXPRESSION[,EXPRESSION...]'
--`defw EXPRESSION[,EXPRESSION...]'
-- For each EXPRESSION the value is stored in two bytes, ignoring
-- overflow.
--
--`d24 EXPRESSION[,EXPRESSION...]'
--`def24 EXPRESSION[,EXPRESSION...]'
-- For each EXPRESSION the value is stored in three bytes, ignoring
-- overflow.
--
--`d32 EXPRESSION[,EXPRESSION...]'
--`def32 EXPRESSION[,EXPRESSION...]'
-- For each EXPRESSION the value is stored in four bytes, ignoring
-- overflow.
--
--`ds COUNT[, VALUE]'
--`defs COUNT[, VALUE]'
-- Fill COUNT bytes in the object file with VALUE, if VALUE is
-- omitted it defaults to zero.
--
--`SYMBOL equ EXPRESSION'
--`SYMBOL defl EXPRESSION'
-- These directives set the value of SYMBOL to EXPRESSION. If `equ'
-- is used, it is an error if SYMBOL is already defined. Symbols
-- defined with `equ' are not protected from redefinition.
--
--`set'
-- This is a normal instruction on Z80, and not an assembler
-- directive.
--
--`psect NAME'
-- A synonym for *Note Section::, no second argument should be given.
--
--
--
--File: as.info, Node: Z80 Opcodes, Prev: Z80 Directives, Up: Z80-Dependent
--
--9.46.5 Opcodes
----------------
--
--In line with common practice, Z80 mnemonics are used for both the Z80
--and the R800.
--
-- In many instructions it is possible to use one of the half index
--registers (`ixl',`ixh',`iyl',`iyh') in stead of an 8-bit general
--purpose register. This yields instructions that are documented on the
--R800 and undocumented on the Z80. Similarly `in f,(c)' is documented
--on the R800 and undocumented on the Z80.
--
-- The assembler also supports the following undocumented
--Z80-instructions, that have not been adopted in the R800 instruction
--set:
--`out (c),0'
-- Sends zero to the port pointed to by register c.
--
--`sli M'
-- Equivalent to `M = (M<<1)+1', the operand M can be any operand
-- that is valid for `sla'. One can use `sll' as a synonym for `sli'.
--
--`OP (ix+D), R'
-- This is equivalent to
--
-- ld R, (ix+D)
-- OPC R
-- ld (ix+D), R
--
-- The operation `OPC' may be any of `res B,', `set B,', `rl', `rlc',
-- `rr', `rrc', `sla', `sli', `sra' and `srl', and the register `R'
-- may be any of `a', `b', `c', `d', `e', `h' and `l'.
--
--`OPC (iy+D), R'
-- As above, but with `iy' instead of `ix'.
--
-- The web site at `http://www.z80.info' is a good starting place to
--find more information on programming the Z80.
--
--
--File: as.info, Node: Z8000-Dependent, Next: Vax-Dependent, Prev: Z80-Dependent, Up: Machine Dependencies
--
--9.47 Z8000 Dependent Features
--=============================
--
-- The Z8000 as supports both members of the Z8000 family: the
--unsegmented Z8002, with 16 bit addresses, and the segmented Z8001 with
--24 bit addresses.
--
-- When the assembler is in unsegmented mode (specified with the
--`unsegm' directive), an address takes up one word (16 bit) sized
--register. When the assembler is in segmented mode (specified with the
--`segm' directive), a 24-bit address takes up a long (32 bit) register.
--*Note Assembler Directives for the Z8000: Z8000 Directives, for a list
--of other Z8000 specific assembler directives.
--
--* Menu:
--
--* Z8000 Options:: Command-line options for the Z8000
--* Z8000 Syntax:: Assembler syntax for the Z8000
--* Z8000 Directives:: Special directives for the Z8000
--* Z8000 Opcodes:: Opcodes
--
--
--File: as.info, Node: Z8000 Options, Next: Z8000 Syntax, Up: Z8000-Dependent
--
--9.47.1 Options
----------------
--
--`-z8001'
-- Generate segmented code by default.
--
--`-z8002'
-- Generate unsegmented code by default.
--
--
--File: as.info, Node: Z8000 Syntax, Next: Z8000 Directives, Prev: Z8000 Options, Up: Z8000-Dependent
--
--9.47.2 Syntax
---------------
--
--* Menu:
--
--* Z8000-Chars:: Special Characters
--* Z8000-Regs:: Register Names
--* Z8000-Addressing:: Addressing Modes
--
--
--File: as.info, Node: Z8000-Chars, Next: Z8000-Regs, Up: Z8000 Syntax
--
--9.47.2.1 Special Characters
--...........................
--
--`!' is the line comment character.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line could also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- You can use `;' instead of a newline to separate statements.
--
--
--File: as.info, Node: Z8000-Regs, Next: Z8000-Addressing, Prev: Z8000-Chars, Up: Z8000 Syntax
--
--9.47.2.2 Register Names
--.......................
--
--The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer
--to different sized groups of registers by register number, with the
--prefix `r' for 16 bit registers, `rr' for 32 bit registers and `rq' for
--64 bit registers. You can also refer to the contents of the first
--eight (of the sixteen 16 bit registers) by bytes. They are named `rlN'
--and `rhN'.
--
--_byte registers_
-- rl0 rh0 rl1 rh1 rl2 rh2 rl3 rh3
-- rl4 rh4 rl5 rh5 rl6 rh6 rl7 rh7
--
--_word registers_
-- r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
--
--_long word registers_
-- rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14
--
--_quad word registers_
-- rq0 rq4 rq8 rq12
--
--
--File: as.info, Node: Z8000-Addressing, Prev: Z8000-Regs, Up: Z8000 Syntax
--
--9.47.2.3 Addressing Modes
--.........................
--
--as understands the following addressing modes for the Z8000:
--
--`rlN'
--`rhN'
--`rN'
--`rrN'
--`rqN'
-- Register direct: 8bit, 16bit, 32bit, and 64bit registers.
--
--`@rN'
--`@rrN'
-- Indirect register: @rrN in segmented mode, @rN in unsegmented
-- mode.
--
--`ADDR'
-- Direct: the 16 bit or 24 bit address (depending on whether the
-- assembler is in segmented or unsegmented mode) of the operand is
-- in the instruction.
--
--`address(rN)'
-- Indexed: the 16 or 24 bit address is added to the 16 bit register
-- to produce the final address in memory of the operand.
--
--`rN(#IMM)'
--`rrN(#IMM)'
-- Base Address: the 16 or 24 bit register is added to the 16 bit sign
-- extended immediate displacement to produce the final address in
-- memory of the operand.
--
--`rN(rM)'
--`rrN(rM)'
-- Base Index: the 16 or 24 bit register rN or rrN is added to the
-- sign extended 16 bit index register rM to produce the final
-- address in memory of the operand.
--
--`#XX'
-- Immediate data XX.
--
--
--File: as.info, Node: Z8000 Directives, Next: Z8000 Opcodes, Prev: Z8000 Syntax, Up: Z8000-Dependent
--
--9.47.3 Assembler Directives for the Z8000
-------------------------------------------
--
--The Z8000 port of as includes additional assembler directives, for
--compatibility with other Z8000 assemblers. These do not begin with `.'
--(unlike the ordinary as directives).
--
--`segm'
--`.z8001'
-- Generate code for the segmented Z8001.
--
--`unsegm'
--`.z8002'
-- Generate code for the unsegmented Z8002.
--
--`name'
-- Synonym for `.file'
--
--`global'
-- Synonym for `.global'
--
--`wval'
-- Synonym for `.word'
--
--`lval'
-- Synonym for `.long'
--
--`bval'
-- Synonym for `.byte'
--
--`sval'
-- Assemble a string. `sval' expects one string literal, delimited by
-- single quotes. It assembles each byte of the string into
-- consecutive addresses. You can use the escape sequence `%XX'
-- (where XX represents a two-digit hexadecimal number) to represent
-- the character whose ASCII value is XX. Use this feature to
-- describe single quote and other characters that may not appear in
-- string literals as themselves. For example, the C statement
-- `char *a = "he said \"it's 50% off\"";' is represented in Z8000
-- assembly language (shown with the assembler output in hex at the
-- left) as
--
-- 68652073 sval 'he said %22it%27s 50%25 off%22%00'
-- 61696420
-- 22697427
-- 73203530
-- 25206F66
-- 662200
--
--`rsect'
-- synonym for `.section'
--
--`block'
-- synonym for `.space'
--
--`even'
-- special case of `.align'; aligns output to even byte boundary.
--
--
--File: as.info, Node: Z8000 Opcodes, Prev: Z8000 Directives, Up: Z8000-Dependent
--
--9.47.4 Opcodes
----------------
--
--For detailed information on the Z8000 machine instruction set, see
--`Z8000 Technical Manual'.
--
-- The following table summarizes the opcodes and their arguments:
--
-- rs 16 bit source register
-- rd 16 bit destination register
-- rbs 8 bit source register
-- rbd 8 bit destination register
-- rrs 32 bit source register
-- rrd 32 bit destination register
-- rqs 64 bit source register
-- rqd 64 bit destination register
-- addr 16/24 bit address
-- imm immediate data
--
-- adc rd,rs clrb addr cpsir @rd,@rs,rr,cc
-- adcb rbd,rbs clrb addr(rd) cpsirb @rd,@rs,rr,cc
-- add rd,@rs clrb rbd dab rbd
-- add rd,addr com @rd dbjnz rbd,disp7
-- add rd,addr(rs) com addr dec @rd,imm4m1
-- add rd,imm16 com addr(rd) dec addr(rd),imm4m1
-- add rd,rs com rd dec addr,imm4m1
-- addb rbd,@rs comb @rd dec rd,imm4m1
-- addb rbd,addr comb addr decb @rd,imm4m1
-- addb rbd,addr(rs) comb addr(rd) decb addr(rd),imm4m1
-- addb rbd,imm8 comb rbd decb addr,imm4m1
-- addb rbd,rbs comflg flags decb rbd,imm4m1
-- addl rrd,@rs cp @rd,imm16 di i2
-- addl rrd,addr cp addr(rd),imm16 div rrd,@rs
-- addl rrd,addr(rs) cp addr,imm16 div rrd,addr
-- addl rrd,imm32 cp rd,@rs div rrd,addr(rs)
-- addl rrd,rrs cp rd,addr div rrd,imm16
-- and rd,@rs cp rd,addr(rs) div rrd,rs
-- and rd,addr cp rd,imm16 divl rqd,@rs
-- and rd,addr(rs) cp rd,rs divl rqd,addr
-- and rd,imm16 cpb @rd,imm8 divl rqd,addr(rs)
-- and rd,rs cpb addr(rd),imm8 divl rqd,imm32
-- andb rbd,@rs cpb addr,imm8 divl rqd,rrs
-- andb rbd,addr cpb rbd,@rs djnz rd,disp7
-- andb rbd,addr(rs) cpb rbd,addr ei i2
-- andb rbd,imm8 cpb rbd,addr(rs) ex rd,@rs
-- andb rbd,rbs cpb rbd,imm8 ex rd,addr
-- bit @rd,imm4 cpb rbd,rbs ex rd,addr(rs)
-- bit addr(rd),imm4 cpd rd,@rs,rr,cc ex rd,rs
-- bit addr,imm4 cpdb rbd,@rs,rr,cc exb rbd,@rs
-- bit rd,imm4 cpdr rd,@rs,rr,cc exb rbd,addr
-- bit rd,rs cpdrb rbd,@rs,rr,cc exb rbd,addr(rs)
-- bitb @rd,imm4 cpi rd,@rs,rr,cc exb rbd,rbs
-- bitb addr(rd),imm4 cpib rbd,@rs,rr,cc ext0e imm8
-- bitb addr,imm4 cpir rd,@rs,rr,cc ext0f imm8
-- bitb rbd,imm4 cpirb rbd,@rs,rr,cc ext8e imm8
-- bitb rbd,rs cpl rrd,@rs ext8f imm8
-- bpt cpl rrd,addr exts rrd
-- call @rd cpl rrd,addr(rs) extsb rd
-- call addr cpl rrd,imm32 extsl rqd
-- call addr(rd) cpl rrd,rrs halt
-- calr disp12 cpsd @rd,@rs,rr,cc in rd,@rs
-- clr @rd cpsdb @rd,@rs,rr,cc in rd,imm16
-- clr addr cpsdr @rd,@rs,rr,cc inb rbd,@rs
-- clr addr(rd) cpsdrb @rd,@rs,rr,cc inb rbd,imm16
-- clr rd cpsi @rd,@rs,rr,cc inc @rd,imm4m1
-- clrb @rd cpsib @rd,@rs,rr,cc inc addr(rd),imm4m1
-- inc addr,imm4m1 ldb rbd,rs(rx) mult rrd,addr(rs)
-- inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm16
-- incb @rd,imm4m1 ldb rd(rx),rbs mult rrd,rs
-- incb addr(rd),imm4m1 ldctl ctrl,rs multl rqd,@rs
-- incb addr,imm4m1 ldctl rd,ctrl multl rqd,addr
-- incb rbd,imm4m1 ldd @rs,@rd,rr multl rqd,addr(rs)
-- ind @rd,@rs,ra lddb @rs,@rd,rr multl rqd,imm32
-- indb @rd,@rs,rba lddr @rs,@rd,rr multl rqd,rrs
-- inib @rd,@rs,ra lddrb @rs,@rd,rr neg @rd
-- inibr @rd,@rs,ra ldi @rd,@rs,rr neg addr
-- iret ldib @rd,@rs,rr neg addr(rd)
-- jp cc,@rd ldir @rd,@rs,rr neg rd
-- jp cc,addr ldirb @rd,@rs,rr negb @rd
-- jp cc,addr(rd) ldk rd,imm4 negb addr
-- jr cc,disp8 ldl @rd,rrs negb addr(rd)
-- ld @rd,imm16 ldl addr(rd),rrs negb rbd
-- ld @rd,rs ldl addr,rrs nop
-- ld addr(rd),imm16 ldl rd(imm16),rrs or rd,@rs
-- ld addr(rd),rs ldl rd(rx),rrs or rd,addr
-- ld addr,imm16 ldl rrd,@rs or rd,addr(rs)
-- ld addr,rs ldl rrd,addr or rd,imm16
-- ld rd(imm16),rs ldl rrd,addr(rs) or rd,rs
-- ld rd(rx),rs ldl rrd,imm32 orb rbd,@rs
-- ld rd,@rs ldl rrd,rrs orb rbd,addr
-- ld rd,addr ldl rrd,rs(imm16) orb rbd,addr(rs)
-- ld rd,addr(rs) ldl rrd,rs(rx) orb rbd,imm8
-- ld rd,imm16 ldm @rd,rs,n orb rbd,rbs
-- ld rd,rs ldm addr(rd),rs,n out @rd,rs
-- ld rd,rs(imm16) ldm addr,rs,n out imm16,rs
-- ld rd,rs(rx) ldm rd,@rs,n outb @rd,rbs
-- lda rd,addr ldm rd,addr(rs),n outb imm16,rbs
-- lda rd,addr(rs) ldm rd,addr,n outd @rd,@rs,ra
-- lda rd,rs(imm16) ldps @rs outdb @rd,@rs,rba
-- lda rd,rs(rx) ldps addr outib @rd,@rs,ra
-- ldar rd,disp16 ldps addr(rs) outibr @rd,@rs,ra
-- ldb @rd,imm8 ldr disp16,rs pop @rd,@rs
-- ldb @rd,rbs ldr rd,disp16 pop addr(rd),@rs
-- ldb addr(rd),imm8 ldrb disp16,rbs pop addr,@rs
-- ldb addr(rd),rbs ldrb rbd,disp16 pop rd,@rs
-- ldb addr,imm8 ldrl disp16,rrs popl @rd,@rs
-- ldb addr,rbs ldrl rrd,disp16 popl addr(rd),@rs
-- ldb rbd,@rs mbit popl addr,@rs
-- ldb rbd,addr mreq rd popl rrd,@rs
-- ldb rbd,addr(rs) mres push @rd,@rs
-- ldb rbd,imm8 mset push @rd,addr
-- ldb rbd,rbs mult rrd,@rs push @rd,addr(rs)
-- ldb rbd,rs(imm16) mult rrd,addr push @rd,imm16
-- push @rd,rs set addr,imm4 subl rrd,imm32
-- pushl @rd,@rs set rd,imm4 subl rrd,rrs
-- pushl @rd,addr set rd,rs tcc cc,rd
-- pushl @rd,addr(rs) setb @rd,imm4 tccb cc,rbd
-- pushl @rd,rrs setb addr(rd),imm4 test @rd
-- res @rd,imm4 setb addr,imm4 test addr
-- res addr(rd),imm4 setb rbd,imm4 test addr(rd)
-- res addr,imm4 setb rbd,rs test rd
-- res rd,imm4 setflg imm4 testb @rd
-- res rd,rs sinb rbd,imm16 testb addr
-- resb @rd,imm4 sinb rd,imm16 testb addr(rd)
-- resb addr(rd),imm4 sind @rd,@rs,ra testb rbd
-- resb addr,imm4 sindb @rd,@rs,rba testl @rd
-- resb rbd,imm4 sinib @rd,@rs,ra testl addr
-- resb rbd,rs sinibr @rd,@rs,ra testl addr(rd)
-- resflg imm4 sla rd,imm8 testl rrd
-- ret cc slab rbd,imm8 trdb @rd,@rs,rba
-- rl rd,imm1or2 slal rrd,imm8 trdrb @rd,@rs,rba
-- rlb rbd,imm1or2 sll rd,imm8 trib @rd,@rs,rbr
-- rlc rd,imm1or2 sllb rbd,imm8 trirb @rd,@rs,rbr
-- rlcb rbd,imm1or2 slll rrd,imm8 trtdrb @ra,@rb,rbr
-- rldb rbb,rba sout imm16,rs trtib @ra,@rb,rr
-- rr rd,imm1or2 soutb imm16,rbs trtirb @ra,@rb,rbr
-- rrb rbd,imm1or2 soutd @rd,@rs,ra trtrb @ra,@rb,rbr
-- rrc rd,imm1or2 soutdb @rd,@rs,rba tset @rd
-- rrcb rbd,imm1or2 soutib @rd,@rs,ra tset addr
-- rrdb rbb,rba soutibr @rd,@rs,ra tset addr(rd)
-- rsvd36 sra rd,imm8 tset rd
-- rsvd38 srab rbd,imm8 tsetb @rd
-- rsvd78 sral rrd,imm8 tsetb addr
-- rsvd7e srl rd,imm8 tsetb addr(rd)
-- rsvd9d srlb rbd,imm8 tsetb rbd
-- rsvd9f srll rrd,imm8 xor rd,@rs
-- rsvdb9 sub rd,@rs xor rd,addr
-- rsvdbf sub rd,addr xor rd,addr(rs)
-- sbc rd,rs sub rd,addr(rs) xor rd,imm16
-- sbcb rbd,rbs sub rd,imm16 xor rd,rs
-- sc imm8 sub rd,rs xorb rbd,@rs
-- sda rd,rs subb rbd,@rs xorb rbd,addr
-- sdab rbd,rs subb rbd,addr xorb rbd,addr(rs)
-- sdal rrd,rs subb rbd,addr(rs) xorb rbd,imm8
-- sdl rd,rs subb rbd,imm8 xorb rbd,rbs
-- sdlb rbd,rs subb rbd,rbs xorb rbd,rbs
-- sdll rrd,rs subl rrd,@rs
-- set @rd,imm4 subl rrd,addr
-- set addr(rd),imm4 subl rrd,addr(rs)
--
--
--File: as.info, Node: Vax-Dependent, Prev: Z8000-Dependent, Up: Machine Dependencies
--
--9.48 VAX Dependent Features
--===========================
--
--* Menu:
--
--* VAX-Opts:: VAX Command-Line Options
--* VAX-float:: VAX Floating Point
--* VAX-directives:: Vax Machine Directives
--* VAX-opcodes:: VAX Opcodes
--* VAX-branch:: VAX Branch Improvement
--* VAX-operands:: VAX Operands
--* VAX-no:: Not Supported on VAX
--* VAX-Syntax:: VAX Syntax
--
--
--File: as.info, Node: VAX-Opts, Next: VAX-float, Up: Vax-Dependent
--
--9.48.1 VAX Command-Line Options
---------------------------------
--
--The Vax version of `as' accepts any of the following options, gives a
--warning message that the option was ignored and proceeds. These
--options are for compatibility with scripts designed for other people's
--assemblers.
--
--``-D' (Debug)'
--``-S' (Symbol Table)'
--``-T' (Token Trace)'
-- These are obsolete options used to debug old assemblers.
--
--``-d' (Displacement size for JUMPs)'
-- This option expects a number following the `-d'. Like options
-- that expect filenames, the number may immediately follow the `-d'
-- (old standard) or constitute the whole of the command line
-- argument that follows `-d' (GNU standard).
--
--``-V' (Virtualize Interpass Temporary File)'
-- Some other assemblers use a temporary file. This option commanded
-- them to keep the information in active memory rather than in a
-- disk file. `as' always does this, so this option is redundant.
--
--``-J' (JUMPify Longer Branches)'
-- Many 32-bit computers permit a variety of branch instructions to
-- do the same job. Some of these instructions are short (and fast)
-- but have a limited range; others are long (and slow) but can
-- branch anywhere in virtual memory. Often there are 3 flavors of
-- branch: short, medium and long. Some other assemblers would emit
-- short and medium branches, unless told by this option to emit
-- short and long branches.
--
--``-t' (Temporary File Directory)'
-- Some other assemblers may use a temporary file, and this option
-- takes a filename being the directory to site the temporary file.
-- Since `as' does not use a temporary disk file, this option makes
-- no difference. `-t' needs exactly one filename.
--
-- The Vax version of the assembler accepts additional options when
--compiled for VMS:
--
--`-h N'
-- External symbol or section (used for global variables) names are
-- not case sensitive on VAX/VMS and always mapped to upper case.
-- This is contrary to the C language definition which explicitly
-- distinguishes upper and lower case. To implement a standard
-- conforming C compiler, names must be changed (mapped) to preserve
-- the case information. The default mapping is to convert all lower
-- case characters to uppercase and adding an underscore followed by
-- a 6 digit hex value, representing a 24 digit binary value. The
-- one digits in the binary value represent which characters are
-- uppercase in the original symbol name.
--
-- The `-h N' option determines how we map names. This takes several
-- values. No `-h' switch at all allows case hacking as described
-- above. A value of zero (`-h0') implies names should be upper
-- case, and inhibits the case hack. A value of 2 (`-h2') implies
-- names should be all lower case, with no case hack. A value of 3
-- (`-h3') implies that case should be preserved. The value 1 is
-- unused. The `-H' option directs `as' to display every mapped
-- symbol during assembly.
--
-- Symbols whose names include a dollar sign `$' are exceptions to the
-- general name mapping. These symbols are normally only used to
-- reference VMS library names. Such symbols are always mapped to
-- upper case.
--
--`-+'
-- The `-+' option causes `as' to truncate any symbol name larger
-- than 31 characters. The `-+' option also prevents some code
-- following the `_main' symbol normally added to make the object
-- file compatible with Vax-11 "C".
--
--`-1'
-- This option is ignored for backward compatibility with `as'
-- version 1.x.
--
--`-H'
-- The `-H' option causes `as' to print every symbol which was
-- changed by case mapping.
--
--
--File: as.info, Node: VAX-float, Next: VAX-directives, Prev: VAX-Opts, Up: Vax-Dependent
--
--9.48.2 VAX Floating Point
---------------------------
--
--Conversion of flonums to floating point is correct, and compatible with
--previous assemblers. Rounding is towards zero if the remainder is
--exactly half the least significant bit.
--
-- `D', `F', `G' and `H' floating point formats are understood.
--
-- Immediate floating literals (_e.g._ `S`$6.9') are rendered
--correctly. Again, rounding is towards zero in the boundary case.
--
-- The `.float' directive produces `f' format numbers. The `.double'
--directive produces `d' format numbers.
--
--
--File: as.info, Node: VAX-directives, Next: VAX-opcodes, Prev: VAX-float, Up: Vax-Dependent
--
--9.48.3 Vax Machine Directives
-------------------------------
--
--The Vax version of the assembler supports four directives for
--generating Vax floating point constants. They are described in the
--table below.
--
--`.dfloat'
-- This expects zero or more flonums, separated by commas, and
-- assembles Vax `d' format 64-bit floating point constants.
--
--`.ffloat'
-- This expects zero or more flonums, separated by commas, and
-- assembles Vax `f' format 32-bit floating point constants.
--
--`.gfloat'
-- This expects zero or more flonums, separated by commas, and
-- assembles Vax `g' format 64-bit floating point constants.
--
--`.hfloat'
-- This expects zero or more flonums, separated by commas, and
-- assembles Vax `h' format 128-bit floating point constants.
--
--
--
--File: as.info, Node: VAX-opcodes, Next: VAX-branch, Prev: VAX-directives, Up: Vax-Dependent
--
--9.48.4 VAX Opcodes
--------------------
--
--All DEC mnemonics are supported. Beware that `case...' instructions
--have exactly 3 operands. The dispatch table that follows the `case...'
--instruction should be made with `.word' statements. This is compatible
--with all unix assemblers we know of.
--
--
--File: as.info, Node: VAX-branch, Next: VAX-operands, Prev: VAX-opcodes, Up: Vax-Dependent
--
--9.48.5 VAX Branch Improvement
-------------------------------
--
--Certain pseudo opcodes are permitted. They are for branch
--instructions. They expand to the shortest branch instruction that
--reaches the target. Generally these mnemonics are made by substituting
--`j' for `b' at the start of a DEC mnemonic. This feature is included
--both for compatibility and to help compilers. If you do not need this
--feature, avoid these opcodes. Here are the mnemonics, and the code
--they can expand into.
--
--`jbsb'
-- `Jsb' is already an instruction mnemonic, so we chose `jbsb'.
-- (byte displacement)
-- `bsbb ...'
--
-- (word displacement)
-- `bsbw ...'
--
-- (long displacement)
-- `jsb ...'
--
--`jbr'
--`jr'
-- Unconditional branch.
-- (byte displacement)
-- `brb ...'
--
-- (word displacement)
-- `brw ...'
--
-- (long displacement)
-- `jmp ...'
--
--`jCOND'
-- COND may be any one of the conditional branches `neq', `nequ',
-- `eql', `eqlu', `gtr', `geq', `lss', `gtru', `lequ', `vc', `vs',
-- `gequ', `cc', `lssu', `cs'. COND may also be one of the bit tests
-- `bs', `bc', `bss', `bcs', `bsc', `bcc', `bssi', `bcci', `lbs',
-- `lbc'. NOTCOND is the opposite condition to COND.
-- (byte displacement)
-- `bCOND ...'
--
-- (word displacement)
-- `bNOTCOND foo ; brw ... ; foo:'
--
-- (long displacement)
-- `bNOTCOND foo ; jmp ... ; foo:'
--
--`jacbX'
-- X may be one of `b d f g h l w'.
-- (word displacement)
-- `OPCODE ...'
--
-- (long displacement)
-- OPCODE ..., foo ;
-- brb bar ;
-- foo: jmp ... ;
-- bar:
--
--`jaobYYY'
-- YYY may be one of `lss leq'.
--
--`jsobZZZ'
-- ZZZ may be one of `geq gtr'.
-- (byte displacement)
-- `OPCODE ...'
--
-- (word displacement)
-- OPCODE ..., foo ;
-- brb bar ;
-- foo: brw DESTINATION ;
-- bar:
--
-- (long displacement)
-- OPCODE ..., foo ;
-- brb bar ;
-- foo: jmp DESTINATION ;
-- bar:
--
--`aobleq'
--`aoblss'
--`sobgeq'
--`sobgtr'
--
-- (byte displacement)
-- `OPCODE ...'
--
-- (word displacement)
-- OPCODE ..., foo ;
-- brb bar ;
-- foo: brw DESTINATION ;
-- bar:
--
-- (long displacement)
-- OPCODE ..., foo ;
-- brb bar ;
-- foo: jmp DESTINATION ;
-- bar:
--
--
--File: as.info, Node: VAX-operands, Next: VAX-no, Prev: VAX-branch, Up: Vax-Dependent
--
--9.48.6 VAX Operands
---------------------
--
--The immediate character is `$' for Unix compatibility, not `#' as DEC
--writes it.
--
-- The indirect character is `*' for Unix compatibility, not `@' as DEC
--writes it.
--
-- The displacement sizing character is ``' (an accent grave) for Unix
--compatibility, not `^' as DEC writes it. The letter preceding ``' may
--have either case. `G' is not understood, but all other letters (`b i l
--s w') are understood.
--
-- Register names understood are `r0 r1 r2 ... r15 ap fp sp pc'. Upper
--and lower case letters are equivalent.
--
-- For instance
-- tstb *w`$4(r5)
--
-- Any expression is permitted in an operand. Operands are comma
--separated.
--
--
--File: as.info, Node: VAX-no, Next: VAX-Syntax, Prev: VAX-operands, Up: Vax-Dependent
--
--9.48.7 Not Supported on VAX
-----------------------------
--
--Vax bit fields can not be assembled with `as'. Someone can add the
--required code if they really need it.
--
--
--File: as.info, Node: VAX-Syntax, Prev: VAX-no, Up: Vax-Dependent
--
--9.48.8 VAX Syntax
-------------------
--
--* Menu:
--
--* VAX-Chars:: Special Characters
--
--
--File: as.info, Node: VAX-Chars, Up: VAX-Syntax
--
--9.48.8.1 Special Characters
--...........................
--
--The presence of a `#' appearing anywhere on a line indicates the start
--of a comment that extends to the end of that line.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line can also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- The `;' character can be used to separate statements on the same
--line.
--
--
--File: as.info, Node: V850-Dependent, Next: XGATE-Dependent, Prev: TILEPro-Dependent, Up: Machine Dependencies
--
--9.49 v850 Dependent Features
--============================
--
--* Menu:
--
--* V850 Options:: Options
--* V850 Syntax:: Syntax
--* V850 Floating Point:: Floating Point
--* V850 Directives:: V850 Machine Directives
--* V850 Opcodes:: Opcodes
--
--
--File: as.info, Node: V850 Options, Next: V850 Syntax, Up: V850-Dependent
--
--9.49.1 Options
----------------
--
--`as' supports the following additional command-line options for the
--V850 processor family:
--
--`-wsigned_overflow'
-- Causes warnings to be produced when signed immediate values
-- overflow the space available for then within their opcodes. By
-- default this option is disabled as it is possible to receive
-- spurious warnings due to using exact bit patterns as immediate
-- constants.
--
--`-wunsigned_overflow'
-- Causes warnings to be produced when unsigned immediate values
-- overflow the space available for then within their opcodes. By
-- default this option is disabled as it is possible to receive
-- spurious warnings due to using exact bit patterns as immediate
-- constants.
--
--`-mv850'
-- Specifies that the assembled code should be marked as being
-- targeted at the V850 processor. This allows the linker to detect
-- attempts to link such code with code assembled for other
-- processors.
--
--`-mv850e'
-- Specifies that the assembled code should be marked as being
-- targeted at the V850E processor. This allows the linker to detect
-- attempts to link such code with code assembled for other
-- processors.
--
--`-mv850e1'
-- Specifies that the assembled code should be marked as being
-- targeted at the V850E1 processor. This allows the linker to
-- detect attempts to link such code with code assembled for other
-- processors.
--
--`-mv850any'
-- Specifies that the assembled code should be marked as being
-- targeted at the V850 processor but support instructions that are
-- specific to the extended variants of the process. This allows the
-- production of binaries that contain target specific code, but
-- which are also intended to be used in a generic fashion. For
-- example libgcc.a contains generic routines used by the code
-- produced by GCC for all versions of the v850 architecture,
-- together with support routines only used by the V850E architecture.
--
--`-mv850e2'
-- Specifies that the assembled code should be marked as being
-- targeted at the V850E2 processor. This allows the linker to
-- detect attempts to link such code with code assembled for other
-- processors.
--
--`-mv850e2v3'
-- Specifies that the assembled code should be marked as being
-- targeted at the V850E2V3 processor. This allows the linker to
-- detect attempts to link such code with code assembled for other
-- processors.
--
--`-mv850e2v4'
-- This is an alias for `-mv850e3v5'.
--
--`-mv850e3v5'
-- Specifies that the assembled code should be marked as being
-- targeted at the V850E3V5 processor. This allows the linker to
-- detect attempts to link such code with code assembled for other
-- processors.
--
--`-mrelax'
-- Enables relaxation. This allows the .longcall and .longjump pseudo
-- ops to be used in the assembler source code. These ops label
-- sections of code which are either a long function call or a long
-- branch. The assembler will then flag these sections of code and
-- the linker will attempt to relax them.
--
--`-mgcc-abi'
-- Marks the generated objecy file as supporting the old GCC ABI.
--
--`-mrh850-abi'
-- Marks the generated objecy file as supporting the RH850 ABI. This
-- is the default.
--
--`-m8byte-align'
-- Marks the generated objecy file as supporting a maximum 64-bits of
-- alignment for variables defined in the source code.
--
--`-m4byte-align'
-- Marks the generated objecy file as supporting a maximum 32-bits of
-- alignment for variables defined in the source code. This is the
-- default.
--
--
--
--File: as.info, Node: V850 Syntax, Next: V850 Floating Point, Prev: V850 Options, Up: V850-Dependent
--
--9.49.2 Syntax
---------------
--
--* Menu:
--
--* V850-Chars:: Special Characters
--* V850-Regs:: Register Names
--
--
--File: as.info, Node: V850-Chars, Next: V850-Regs, Up: V850 Syntax
--
--9.49.2.1 Special Characters
--...........................
--
--`#' is the line comment character. If a `#' appears as the first
--character of a line, the whole line is treated as a comment, but in
--this case the line can also be a logical line number directive (*note
--Comments::) or a preprocessor control command (*note Preprocessing::).
--
-- Two dashes (`--') can also be used to start a line comment.
--
-- The `;' character can be used to separate statements on the same
--line.
--
--
--File: as.info, Node: V850-Regs, Prev: V850-Chars, Up: V850 Syntax
--
--9.49.2.2 Register Names
--.......................
--
--`as' supports the following names for registers:
--`general register 0'
-- r0, zero
--
--`general register 1'
-- r1
--
--`general register 2'
-- r2, hp
--
--`general register 3'
-- r3, sp
--
--`general register 4'
-- r4, gp
--
--`general register 5'
-- r5, tp
--
--`general register 6'
-- r6
--
--`general register 7'
-- r7
--
--`general register 8'
-- r8
--
--`general register 9'
-- r9
--
--`general register 10'
-- r10
--
--`general register 11'
-- r11
--
--`general register 12'
-- r12
--
--`general register 13'
-- r13
--
--`general register 14'
-- r14
--
--`general register 15'
-- r15
--
--`general register 16'
-- r16
--
--`general register 17'
-- r17
--
--`general register 18'
-- r18
--
--`general register 19'
-- r19
--
--`general register 20'
-- r20
--
--`general register 21'
-- r21
--
--`general register 22'
-- r22
--
--`general register 23'
-- r23
--
--`general register 24'
-- r24
--
--`general register 25'
-- r25
--
--`general register 26'
-- r26
--
--`general register 27'
-- r27
--
--`general register 28'
-- r28
--
--`general register 29'
-- r29
--
--`general register 30'
-- r30, ep
--
--`general register 31'
-- r31, lp
--
--`system register 0'
-- eipc
--
--`system register 1'
-- eipsw
--
--`system register 2'
-- fepc
--
--`system register 3'
-- fepsw
--
--`system register 4'
-- ecr
--
--`system register 5'
-- psw
--
--`system register 16'
-- ctpc
--
--`system register 17'
-- ctpsw
--
--`system register 18'
-- dbpc
--
--`system register 19'
-- dbpsw
--
--`system register 20'
-- ctbp
--
--
--File: as.info, Node: V850 Floating Point, Next: V850 Directives, Prev: V850 Syntax, Up: V850-Dependent
--
--9.49.3 Floating Point
-----------------------
--
--The V850 family uses IEEE floating-point numbers.
--
--
--File: as.info, Node: V850 Directives, Next: V850 Opcodes, Prev: V850 Floating Point, Up: V850-Dependent
--
--9.49.4 V850 Machine Directives
--------------------------------
--
--`.offset <EXPRESSION>'
-- Moves the offset into the current section to the specified amount.
--
--`.section "name", <type>'
-- This is an extension to the standard .section directive. It sets
-- the current section to be <type> and creates an alias for this
-- section called "name".
--
--`.v850'
-- Specifies that the assembled code should be marked as being
-- targeted at the V850 processor. This allows the linker to detect
-- attempts to link such code with code assembled for other
-- processors.
--
--`.v850e'
-- Specifies that the assembled code should be marked as being
-- targeted at the V850E processor. This allows the linker to detect
-- attempts to link such code with code assembled for other
-- processors.
--
--`.v850e1'
-- Specifies that the assembled code should be marked as being
-- targeted at the V850E1 processor. This allows the linker to
-- detect attempts to link such code with code assembled for other
-- processors.
--
--`.v850e2'
-- Specifies that the assembled code should be marked as being
-- targeted at the V850E2 processor. This allows the linker to
-- detect attempts to link such code with code assembled for other
-- processors.
--
--`.v850e2v3'
-- Specifies that the assembled code should be marked as being
-- targeted at the V850E2V3 processor. This allows the linker to
-- detect attempts to link such code with code assembled for other
-- processors.
--
--`.v850e2v4'
-- Specifies that the assembled code should be marked as being
-- targeted at the V850E3V5 processor. This allows the linker to
-- detect attempts to link such code with code assembled for other
-- processors.
--
--`.v850e3v5'
-- Specifies that the assembled code should be marked as being
-- targeted at the V850E3V5 processor. This allows the linker to
-- detect attempts to link such code with code assembled for other
-- processors.
--
--
--
--File: as.info, Node: V850 Opcodes, Prev: V850 Directives, Up: V850-Dependent
--
--9.49.5 Opcodes
----------------
--
--`as' implements all the standard V850 opcodes.
--
-- `as' also implements the following pseudo ops:
--
--`hi0()'
-- Computes the higher 16 bits of the given expression and stores it
-- into the immediate operand field of the given instruction. For
-- example:
--
-- `mulhi hi0(here - there), r5, r6'
--
-- computes the difference between the address of labels 'here' and
-- 'there', takes the upper 16 bits of this difference, shifts it
-- down 16 bits and then multiplies it by the lower 16 bits in
-- register 5, putting the result into register 6.
--
--`lo()'
-- Computes the lower 16 bits of the given expression and stores it
-- into the immediate operand field of the given instruction. For
-- example:
--
-- `addi lo(here - there), r5, r6'
--
-- computes the difference between the address of labels 'here' and
-- 'there', takes the lower 16 bits of this difference and adds it to
-- register 5, putting the result into register 6.
--
--`hi()'
-- Computes the higher 16 bits of the given expression and then adds
-- the value of the most significant bit of the lower 16 bits of the
-- expression and stores the result into the immediate operand field
-- of the given instruction. For example the following code can be
-- used to compute the address of the label 'here' and store it into
-- register 6:
--
-- `movhi hi(here), r0, r6' `movea lo(here), r6, r6'
--
-- The reason for this special behaviour is that movea performs a sign
-- extension on its immediate operand. So for example if the address
-- of 'here' was 0xFFFFFFFF then without the special behaviour of the
-- hi() pseudo-op the movhi instruction would put 0xFFFF0000 into r6,
-- then the movea instruction would takes its immediate operand,
-- 0xFFFF, sign extend it to 32 bits, 0xFFFFFFFF, and then add it
-- into r6 giving 0xFFFEFFFF which is wrong (the fifth nibble is E).
-- With the hi() pseudo op adding in the top bit of the lo() pseudo
-- op, the movhi instruction actually stores 0 into r6 (0xFFFF + 1 =
-- 0x0000), so that the movea instruction stores 0xFFFFFFFF into r6 -
-- the right value.
--
--`hilo()'
-- Computes the 32 bit value of the given expression and stores it
-- into the immediate operand field of the given instruction (which
-- must be a mov instruction). For example:
--
-- `mov hilo(here), r6'
--
-- computes the absolute address of label 'here' and puts the result
-- into register 6.
--
--`sdaoff()'
-- Computes the offset of the named variable from the start of the
-- Small Data Area (whoes address is held in register 4, the GP
-- register) and stores the result as a 16 bit signed value in the
-- immediate operand field of the given instruction. For example:
--
-- `ld.w sdaoff(_a_variable)[gp],r6'
--
-- loads the contents of the location pointed to by the label
-- '_a_variable' into register 6, provided that the label is located
-- somewhere within +/- 32K of the address held in the GP register.
-- [Note the linker assumes that the GP register contains a fixed
-- address set to the address of the label called '__gp'. This can
-- either be set up automatically by the linker, or specifically set
-- by using the `--defsym __gp=<value>' command line option].
--
--`tdaoff()'
-- Computes the offset of the named variable from the start of the
-- Tiny Data Area (whoes address is held in register 30, the EP
-- register) and stores the result as a 4,5, 7 or 8 bit unsigned
-- value in the immediate operand field of the given instruction.
-- For example:
--
-- `sld.w tdaoff(_a_variable)[ep],r6'
--
-- loads the contents of the location pointed to by the label
-- '_a_variable' into register 6, provided that the label is located
-- somewhere within +256 bytes of the address held in the EP
-- register. [Note the linker assumes that the EP register contains
-- a fixed address set to the address of the label called '__ep'.
-- This can either be set up automatically by the linker, or
-- specifically set by using the `--defsym __ep=<value>' command line
-- option].
--
--`zdaoff()'
-- Computes the offset of the named variable from address 0 and
-- stores the result as a 16 bit signed value in the immediate
-- operand field of the given instruction. For example:
--
-- `movea zdaoff(_a_variable),zero,r6'
--
-- puts the address of the label '_a_variable' into register 6,
-- assuming that the label is somewhere within the first 32K of
-- memory. (Strictly speaking it also possible to access the last
-- 32K of memory as well, as the offsets are signed).
--
--`ctoff()'
-- Computes the offset of the named variable from the start of the
-- Call Table Area (whoes address is helg in system register 20, the
-- CTBP register) and stores the result a 6 or 16 bit unsigned value
-- in the immediate field of then given instruction or piece of data.
-- For example:
--
-- `callt ctoff(table_func1)'
--
-- will put the call the function whoes address is held in the call
-- table at the location labeled 'table_func1'.
--
--`.longcall `name''
-- Indicates that the following sequence of instructions is a long
-- call to function `name'. The linker will attempt to shorten this
-- call sequence if `name' is within a 22bit offset of the call. Only
-- valid if the `-mrelax' command line switch has been enabled.
--
--`.longjump `name''
-- Indicates that the following sequence of instructions is a long
-- jump to label `name'. The linker will attempt to shorten this code
-- sequence if `name' is within a 22bit offset of the jump. Only
-- valid if the `-mrelax' command line switch has been enabled.
--
--
-- For information on the V850 instruction set, see `V850 Family
--32-/16-Bit single-Chip Microcontroller Architecture Manual' from NEC.
--Ltd.
--
--
--File: as.info, Node: XGATE-Dependent, Next: XSTORMY16-Dependent, Prev: V850-Dependent, Up: Machine Dependencies
--
--9.50 XGATE Dependent Features
--=============================
--
--* Menu:
--
--* XGATE-Opts:: XGATE Options
--* XGATE-Syntax:: Syntax
--* XGATE-Directives:: Assembler Directives
--* XGATE-Float:: Floating Point
--* XGATE-opcodes:: Opcodes
--
--
--File: as.info, Node: XGATE-Opts, Next: XGATE-Syntax, Up: XGATE-Dependent
--
--9.50.1 XGATE Options
----------------------
--
--The Freescale XGATE version of `as' has a few machine dependent options.
--
--`-mshort'
-- This option controls the ABI and indicates to use a 16-bit integer
-- ABI. It has no effect on the assembled instructions. This is the
-- default.
--
--`-mlong'
-- This option controls the ABI and indicates to use a 32-bit integer
-- ABI.
--
--`-mshort-double'
-- This option controls the ABI and indicates to use a 32-bit float
-- ABI. This is the default.
--
--`-mlong-double'
-- This option controls the ABI and indicates to use a 64-bit float
-- ABI.
--
--`--print-insn-syntax'
-- You can use the `--print-insn-syntax' option to obtain the syntax
-- description of the instruction when an error is detected.
--
--`--print-opcodes'
-- The `--print-opcodes' option prints the list of all the
-- instructions with their syntax. Once the list is printed `as'
-- exits.
--
--
--
--File: as.info, Node: XGATE-Syntax, Next: XGATE-Directives, Prev: XGATE-Opts, Up: XGATE-Dependent
--
--9.50.2 Syntax
---------------
--
--In XGATE RISC syntax, the instruction name comes first and it may be
--followed by up to three operands. Operands are separated by commas
--(`,'). `as' will complain if too many operands are specified for a
--given instruction. The same will happen if you specified too few
--operands.
--
-- nop
-- ldl #23
-- CMP R1, R2
--
-- The presence of a `;' character or a `!' character anywhere on a
--line indicates the start of a comment that extends to the end of that
--line.
--
-- A `*' or a `#' character at the start of a line also introduces a
--line comment, but these characters do not work elsewhere on the line.
--If the first character of the line is a `#' then as well as starting a
--comment, the line could also be logical line number directive (*note
--Comments::) or a preprocessor control command (*note Preprocessing::).
--
-- The XGATE assembler does not currently support a line separator
--character.
--
-- The following addressing modes are understood for XGATE:
--"Inherent"
-- `'
--
--"Immediate 3 Bit Wide"
-- `#NUMBER'
--
--"Immediate 4 Bit Wide"
-- `#NUMBER'
--
--"Immediate 8 Bit Wide"
-- `#NUMBER'
--
--"Monadic Addressing"
-- `REG'
--
--"Dyadic Addressing"
-- `REG, REG'
--
--"Triadic Addressing"
-- `REG, REG, REG'
--
--"Relative Addressing 9 Bit Wide"
-- `*SYMBOL'
--
--"Relative Addressing 10 Bit Wide"
-- `*SYMBOL'
--
--"Index Register plus Immediate Offset"
-- `REG, (REG, #NUMBER)'
--
--"Index Register plus Register Offset"
-- `REG, REG, REG'
--
--"Index Register plus Register Offset with Post-increment"
-- `REG, REG, REG+'
--
--"Index Register plus Register Offset with Pre-decrement"
-- `REG, REG, -REG'
--
-- The register can be either `R0', `R1', `R2', `R3', `R4', `R5',
-- `R6' or `R7'.
--
--
-- Convience macro opcodes to deal with 16-bit values have been added.
--
--"Immediate 16 Bit Wide"
-- `#NUMBER', or `*SYMBOL'
--
-- For example:
--
-- ldw R1, #1024
-- ldw R3, timer
-- ldw R1, (R1, #0)
-- COM R1
-- stw R2, (R1, #0)
--
--
--File: as.info, Node: XGATE-Directives, Next: XGATE-Float, Prev: XGATE-Syntax, Up: XGATE-Dependent
--
--9.50.3 Assembler Directives
-----------------------------
--
--The XGATE version of `as' have the following specific assembler
--directives:
--
--
--File: as.info, Node: XGATE-Float, Next: XGATE-opcodes, Prev: XGATE-Directives, Up: XGATE-Dependent
--
--9.50.4 Floating Point
-----------------------
--
--Packed decimal (P) format floating literals are not supported(yet).
--
-- The floating point formats generated by directives are these.
--
--`.float'
-- `Single' precision floating point constants.
--
--`.double'
-- `Double' precision floating point constants.
--
--`.extend'
--`.ldouble'
-- `Extended' precision (`long double') floating point constants.
--
--
--File: as.info, Node: XGATE-opcodes, Prev: XGATE-Float, Up: XGATE-Dependent
--
--9.50.5 Opcodes
----------------
--
--
--File: as.info, Node: XSTORMY16-Dependent, Next: Xtensa-Dependent, Prev: XGATE-Dependent, Up: Machine Dependencies
--
--9.51 XStormy16 Dependent Features
--=================================
--
--* Menu:
--
--* XStormy16 Syntax:: Syntax
--* XStormy16 Directives:: Machine Directives
--* XStormy16 Opcodes:: Pseudo-Opcodes
--
--
--File: as.info, Node: XStormy16 Syntax, Next: XStormy16 Directives, Up: XSTORMY16-Dependent
--
--9.51.1 Syntax
---------------
--
--* Menu:
--
--* XStormy16-Chars:: Special Characters
--
--
--File: as.info, Node: XStormy16-Chars, Up: XStormy16 Syntax
--
--9.51.1.1 Special Characters
--...........................
--
--`#' is the line comment character. If a `#' appears as the first
--character of a line, the whole line is treated as a comment, but in
--this case the line can also be a logical line number directive (*note
--Comments::) or a preprocessor control command (*note Preprocessing::).
--
-- A semicolon (`;') can be used to start a comment that extends from
--wherever the character appears on the line up to the end of the line.
--
-- The `|' character can be used to separate statements on the same
--line.
--
--
--File: as.info, Node: XStormy16 Directives, Next: XStormy16 Opcodes, Prev: XStormy16 Syntax, Up: XSTORMY16-Dependent
--
--9.51.2 XStormy16 Machine Directives
-------------------------------------
--
--`.16bit_pointers'
-- Like the `--16bit-pointers' command line option this directive
-- indicates that the assembly code makes use of 16-bit pointers.
--
--`.32bit_pointers'
-- Like the `--32bit-pointers' command line option this directive
-- indicates that the assembly code makes use of 32-bit pointers.
--
--`.no_pointers'
-- Like the `--no-pointers' command line option this directive
-- indicates that the assembly code does not makes use pointers.
--
--
--
--File: as.info, Node: XStormy16 Opcodes, Prev: XStormy16 Directives, Up: XSTORMY16-Dependent
--
--9.51.3 XStormy16 Pseudo-Opcodes
---------------------------------
--
--`as' implements all the standard XStormy16 opcodes.
--
-- `as' also implements the following pseudo ops:
--
--`@lo()'
-- Computes the lower 16 bits of the given expression and stores it
-- into the immediate operand field of the given instruction. For
-- example:
--
-- `add r6, @lo(here - there)'
--
-- computes the difference between the address of labels 'here' and
-- 'there', takes the lower 16 bits of this difference and adds it to
-- register 6.
--
--`@hi()'
-- Computes the higher 16 bits of the given expression and stores it
-- into the immediate operand field of the given instruction. For
-- example:
--
-- `addc r7, @hi(here - there)'
--
-- computes the difference between the address of labels 'here' and
-- 'there', takes the upper 16 bits of this difference, shifts it
-- down 16 bits and then adds it, along with the carry bit, to the
-- value in register 7.
--
--
--
--File: as.info, Node: Xtensa-Dependent, Next: Z80-Dependent, Prev: XSTORMY16-Dependent, Up: Machine Dependencies
--
--9.52 Xtensa Dependent Features
--==============================
--
-- This chapter covers features of the GNU assembler that are specific
--to the Xtensa architecture. For details about the Xtensa instruction
--set, please consult the `Xtensa Instruction Set Architecture (ISA)
--Reference Manual'.
--
--* Menu:
--
--* Xtensa Options:: Command-line Options.
--* Xtensa Syntax:: Assembler Syntax for Xtensa Processors.
--* Xtensa Optimizations:: Assembler Optimizations.
--* Xtensa Relaxation:: Other Automatic Transformations.
--* Xtensa Directives:: Directives for Xtensa Processors.
--
--
--File: as.info, Node: Xtensa Options, Next: Xtensa Syntax, Up: Xtensa-Dependent
--
--9.52.1 Command Line Options
-----------------------------
--
--`--text-section-literals | --no-text-section-literals'
-- Control the treatment of literal pools. The default is
-- `--no-text-section-literals', which places literals in separate
-- sections in the output file. This allows the literal pool to be
-- placed in a data RAM/ROM. With `--text-section-literals', the
-- literals are interspersed in the text section in order to keep
-- them as close as possible to their references. This may be
-- necessary for large assembly files, where the literals would
-- otherwise be out of range of the `L32R' instructions in the text
-- section. These options only affect literals referenced via
-- PC-relative `L32R' instructions; literals for absolute mode `L32R'
-- instructions are handled separately. *Note literal: Literal
-- Directive.
--
--`--absolute-literals | --no-absolute-literals'
-- Indicate to the assembler whether `L32R' instructions use absolute
-- or PC-relative addressing. If the processor includes the absolute
-- addressing option, the default is to use absolute `L32R'
-- relocations. Otherwise, only the PC-relative `L32R' relocations
-- can be used.
--
--`--target-align | --no-target-align'
-- Enable or disable automatic alignment to reduce branch penalties
-- at some expense in code size. *Note Automatic Instruction
-- Alignment: Xtensa Automatic Alignment. This optimization is
-- enabled by default. Note that the assembler will always align
-- instructions like `LOOP' that have fixed alignment requirements.
--
--`--longcalls | --no-longcalls'
-- Enable or disable transformation of call instructions to allow
-- calls across a greater range of addresses. *Note Function Call
-- Relaxation: Xtensa Call Relaxation. This option should be used
-- when call targets can potentially be out of range. It may degrade
-- both code size and performance, but the linker can generally
-- optimize away the unnecessary overhead when a call ends up within
-- range. The default is `--no-longcalls'.
--
--`--transform | --no-transform'
-- Enable or disable all assembler transformations of Xtensa
-- instructions, including both relaxation and optimization. The
-- default is `--transform'; `--no-transform' should only be used in
-- the rare cases when the instructions must be exactly as specified
-- in the assembly source. Using `--no-transform' causes out of range
-- instruction operands to be errors.
--
--`--rename-section OLDNAME=NEWNAME'
-- Rename the OLDNAME section to NEWNAME. This option can be used
-- multiple times to rename multiple sections.
--
--
--File: as.info, Node: Xtensa Syntax, Next: Xtensa Optimizations, Prev: Xtensa Options, Up: Xtensa-Dependent
--
--9.52.2 Assembler Syntax
-------------------------
--
--Block comments are delimited by `/*' and `*/'. End of line comments
--may be introduced with either `#' or `//'.
--
-- If a `#' appears as the first character of a line then the whole
--line is treated as a comment, but in this case the line could also be a
--logical line number directive (*note Comments::) or a preprocessor
--control command (*note Preprocessing::).
--
-- Instructions consist of a leading opcode or macro name followed by
--whitespace and an optional comma-separated list of operands:
--
-- OPCODE [OPERAND, ...]
--
-- Instructions must be separated by a newline or semicolon (`;').
--
-- FLIX instructions, which bundle multiple opcodes together in a single
--instruction, are specified by enclosing the bundled opcodes inside
--braces:
--
-- {
-- [FORMAT]
-- OPCODE0 [OPERANDS]
-- OPCODE1 [OPERANDS]
-- OPCODE2 [OPERANDS]
-- ...
-- }
--
-- The opcodes in a FLIX instruction are listed in the same order as the
--corresponding instruction slots in the TIE format declaration.
--Directives and labels are not allowed inside the braces of a FLIX
--instruction. A particular TIE format name can optionally be specified
--immediately after the opening brace, but this is usually unnecessary.
--The assembler will automatically search for a format that can encode the
--specified opcodes, so the format name need only be specified in rare
--cases where there is more than one applicable format and where it
--matters which of those formats is used. A FLIX instruction can also be
--specified on a single line by separating the opcodes with semicolons:
--
-- { [FORMAT;] OPCODE0 [OPERANDS]; OPCODE1 [OPERANDS]; OPCODE2 [OPERANDS]; ... }
--
-- If an opcode can only be encoded in a FLIX instruction but is not
--specified as part of a FLIX bundle, the assembler will choose the
--smallest format where the opcode can be encoded and will fill unused
--instruction slots with no-ops.
--
--* Menu:
--
--* Xtensa Opcodes:: Opcode Naming Conventions.
--* Xtensa Registers:: Register Naming.
--
--
--File: as.info, Node: Xtensa Opcodes, Next: Xtensa Registers, Up: Xtensa Syntax
--
--9.52.2.1 Opcode Names
--.....................
--
--See the `Xtensa Instruction Set Architecture (ISA) Reference Manual'
--for a complete list of opcodes and descriptions of their semantics.
--
-- If an opcode name is prefixed with an underscore character (`_'),
--`as' will not transform that instruction in any way. The underscore
--prefix disables both optimization (*note Xtensa Optimizations: Xtensa
--Optimizations.) and relaxation (*note Xtensa Relaxation: Xtensa
--Relaxation.) for that particular instruction. Only use the underscore
--prefix when it is essential to select the exact opcode produced by the
--assembler. Using this feature unnecessarily makes the code less
--efficient by disabling assembler optimization and less flexible by
--disabling relaxation.
--
-- Note that this special handling of underscore prefixes only applies
--to Xtensa opcodes, not to either built-in macros or user-defined macros.
--When an underscore prefix is used with a macro (e.g., `_MOV'), it
--refers to a different macro. The assembler generally provides built-in
--macros both with and without the underscore prefix, where the underscore
--versions behave as if the underscore carries through to the instructions
--in the macros. For example, `_MOV' may expand to `_MOV.N'.
--
-- The underscore prefix only applies to individual instructions, not to
--series of instructions. For example, if a series of instructions have
--underscore prefixes, the assembler will not transform the individual
--instructions, but it may insert other instructions between them (e.g.,
--to align a `LOOP' instruction). To prevent the assembler from
--modifying a series of instructions as a whole, use the `no-transform'
--directive. *Note transform: Transform Directive.
--
--
--File: as.info, Node: Xtensa Registers, Prev: Xtensa Opcodes, Up: Xtensa Syntax
--
--9.52.2.2 Register Names
--.......................
--
--The assembly syntax for a register file entry is the "short" name for a
--TIE register file followed by the index into that register file. For
--example, the general-purpose `AR' register file has a short name of
--`a', so these registers are named `a0'...`a15'. As a special feature,
--`sp' is also supported as a synonym for `a1'. Additional registers may
--be added by processor configuration options and by designer-defined TIE
--extensions. An initial `$' character is optional in all register names.
--
--
--File: as.info, Node: Xtensa Optimizations, Next: Xtensa Relaxation, Prev: Xtensa Syntax, Up: Xtensa-Dependent
--
--9.52.3 Xtensa Optimizations
-----------------------------
--
--The optimizations currently supported by `as' are generation of density
--instructions where appropriate and automatic branch target alignment.
--
--* Menu:
--
--* Density Instructions:: Using Density Instructions.
--* Xtensa Automatic Alignment:: Automatic Instruction Alignment.
--
--
--File: as.info, Node: Density Instructions, Next: Xtensa Automatic Alignment, Up: Xtensa Optimizations
--
--9.52.3.1 Using Density Instructions
--...................................
--
--The Xtensa instruction set has a code density option that provides
--16-bit versions of some of the most commonly used opcodes. Use of these
--opcodes can significantly reduce code size. When possible, the
--assembler automatically translates instructions from the core Xtensa
--instruction set into equivalent instructions from the Xtensa code
--density option. This translation can be disabled by using underscore
--prefixes (*note Opcode Names: Xtensa Opcodes.), by using the
--`--no-transform' command-line option (*note Command Line Options:
--Xtensa Options.), or by using the `no-transform' directive (*note
--transform: Transform Directive.).
--
-- It is a good idea _not_ to use the density instructions directly.
--The assembler will automatically select dense instructions where
--possible. If you later need to use an Xtensa processor without the code
--density option, the same assembly code will then work without
--modification.
--
--
--File: as.info, Node: Xtensa Automatic Alignment, Prev: Density Instructions, Up: Xtensa Optimizations
--
--9.52.3.2 Automatic Instruction Alignment
--........................................
--
--The Xtensa assembler will automatically align certain instructions, both
--to optimize performance and to satisfy architectural requirements.
--
-- As an optimization to improve performance, the assembler attempts to
--align branch targets so they do not cross instruction fetch boundaries.
--(Xtensa processors can be configured with either 32-bit or 64-bit
--instruction fetch widths.) An instruction immediately following a call
--is treated as a branch target in this context, because it will be the
--target of a return from the call. This alignment has the potential to
--reduce branch penalties at some expense in code size. This
--optimization is enabled by default. You can disable it with the
--`--no-target-align' command-line option (*note Command Line Options:
--Xtensa Options.).
--
-- The target alignment optimization is done without adding instructions
--that could increase the execution time of the program. If there are
--density instructions in the code preceding a target, the assembler can
--change the target alignment by widening some of those instructions to
--the equivalent 24-bit instructions. Extra bytes of padding can be
--inserted immediately following unconditional jump and return
--instructions. This approach is usually successful in aligning many,
--but not all, branch targets.
--
-- The `LOOP' family of instructions must be aligned such that the
--first instruction in the loop body does not cross an instruction fetch
--boundary (e.g., with a 32-bit fetch width, a `LOOP' instruction must be
--on either a 1 or 2 mod 4 byte boundary). The assembler knows about
--this restriction and inserts the minimal number of 2 or 3 byte no-op
--instructions to satisfy it. When no-op instructions are added, any
--label immediately preceding the original loop will be moved in order to
--refer to the loop instruction, not the newly generated no-op
--instruction. To preserve binary compatibility across processors with
--different fetch widths, the assembler conservatively assumes a 32-bit
--fetch width when aligning `LOOP' instructions (except if the first
--instruction in the loop is a 64-bit instruction).
--
-- Previous versions of the assembler automatically aligned `ENTRY'
--instructions to 4-byte boundaries, but that alignment is now the
--programmer's responsibility.
--
--
--File: as.info, Node: Xtensa Relaxation, Next: Xtensa Directives, Prev: Xtensa Optimizations, Up: Xtensa-Dependent
--
--9.52.4 Xtensa Relaxation
--------------------------
--
--When an instruction operand is outside the range allowed for that
--particular instruction field, `as' can transform the code to use a
--functionally-equivalent instruction or sequence of instructions. This
--process is known as "relaxation". This is typically done for branch
--instructions because the distance of the branch targets is not known
--until assembly-time. The Xtensa assembler offers branch relaxation and
--also extends this concept to function calls, `MOVI' instructions and
--other instructions with immediate fields.
--
--* Menu:
--
--* Xtensa Branch Relaxation:: Relaxation of Branches.
--* Xtensa Call Relaxation:: Relaxation of Function Calls.
--* Xtensa Immediate Relaxation:: Relaxation of other Immediate Fields.
--
--
--File: as.info, Node: Xtensa Branch Relaxation, Next: Xtensa Call Relaxation, Up: Xtensa Relaxation
--
--9.52.4.1 Conditional Branch Relaxation
--......................................
--
--When the target of a branch is too far away from the branch itself,
--i.e., when the offset from the branch to the target is too large to fit
--in the immediate field of the branch instruction, it may be necessary to
--replace the branch with a branch around a jump. For example,
--
-- beqz a2, L
--
-- may result in:
--
-- bnez.n a2, M
-- j L
-- M:
--
-- (The `BNEZ.N' instruction would be used in this example only if the
--density option is available. Otherwise, `BNEZ' would be used.)
--
-- This relaxation works well because the unconditional jump instruction
--has a much larger offset range than the various conditional branches.
--However, an error will occur if a branch target is beyond the range of a
--jump instruction. `as' cannot relax unconditional jumps. Similarly,
--an error will occur if the original input contains an unconditional
--jump to a target that is out of range.
--
-- Branch relaxation is enabled by default. It can be disabled by using
--underscore prefixes (*note Opcode Names: Xtensa Opcodes.), the
--`--no-transform' command-line option (*note Command Line Options:
--Xtensa Options.), or the `no-transform' directive (*note transform:
--Transform Directive.).
--
--
--File: as.info, Node: Xtensa Call Relaxation, Next: Xtensa Immediate Relaxation, Prev: Xtensa Branch Relaxation, Up: Xtensa Relaxation
--
--9.52.4.2 Function Call Relaxation
--.................................
--
--Function calls may require relaxation because the Xtensa immediate call
--instructions (`CALL0', `CALL4', `CALL8' and `CALL12') provide a
--PC-relative offset of only 512 Kbytes in either direction. For larger
--programs, it may be necessary to use indirect calls (`CALLX0',
--`CALLX4', `CALLX8' and `CALLX12') where the target address is specified
--in a register. The Xtensa assembler can automatically relax immediate
--call instructions into indirect call instructions. This relaxation is
--done by loading the address of the called function into the callee's
--return address register and then using a `CALLX' instruction. So, for
--example:
--
-- call8 func
--
-- might be relaxed to:
--
-- .literal .L1, func
-- l32r a8, .L1
-- callx8 a8
--
-- Because the addresses of targets of function calls are not generally
--known until link-time, the assembler must assume the worst and relax all
--the calls to functions in other source files, not just those that really
--will be out of range. The linker can recognize calls that were
--unnecessarily relaxed, and it will remove the overhead introduced by the
--assembler for those cases where direct calls are sufficient.
--
-- Call relaxation is disabled by default because it can have a negative
--effect on both code size and performance, although the linker can
--usually eliminate the unnecessary overhead. If a program is too large
--and some of the calls are out of range, function call relaxation can be
--enabled using the `--longcalls' command-line option or the `longcalls'
--directive (*note longcalls: Longcalls Directive.).
--
--
--File: as.info, Node: Xtensa Immediate Relaxation, Prev: Xtensa Call Relaxation, Up: Xtensa Relaxation
--
--9.52.4.3 Other Immediate Field Relaxation
--.........................................
--
--The assembler normally performs the following other relaxations. They
--can be disabled by using underscore prefixes (*note Opcode Names:
--Xtensa Opcodes.), the `--no-transform' command-line option (*note
--Command Line Options: Xtensa Options.), or the `no-transform' directive
--(*note transform: Transform Directive.).
--
-- The `MOVI' machine instruction can only materialize values in the
--range from -2048 to 2047. Values outside this range are best
--materialized with `L32R' instructions. Thus:
--
-- movi a0, 100000
--
-- is assembled into the following machine code:
--
-- .literal .L1, 100000
-- l32r a0, .L1
--
-- The `L8UI' machine instruction can only be used with immediate
--offsets in the range from 0 to 255. The `L16SI' and `L16UI' machine
--instructions can only be used with offsets from 0 to 510. The `L32I'
--machine instruction can only be used with offsets from 0 to 1020. A
--load offset outside these ranges can be materialized with an `L32R'
--instruction if the destination register of the load is different than
--the source address register. For example:
--
-- l32i a1, a0, 2040
--
-- is translated to:
--
-- .literal .L1, 2040
-- l32r a1, .L1
-- add a1, a0, a1
-- l32i a1, a1, 0
--
--If the load destination and source address register are the same, an
--out-of-range offset causes an error.
--
-- The Xtensa `ADDI' instruction only allows immediate operands in the
--range from -128 to 127. There are a number of alternate instruction
--sequences for the `ADDI' operation. First, if the immediate is 0, the
--`ADDI' will be turned into a `MOV.N' instruction (or the equivalent
--`OR' instruction if the code density option is not available). If the
--`ADDI' immediate is outside of the range -128 to 127, but inside the
--range -32896 to 32639, an `ADDMI' instruction or `ADDMI'/`ADDI'
--sequence will be used. Finally, if the immediate is outside of this
--range and a free register is available, an `L32R'/`ADD' sequence will
--be used with a literal allocated from the literal pool.
--
-- For example:
--
-- addi a5, a6, 0
-- addi a5, a6, 512
-- addi a5, a6, 513
-- addi a5, a6, 50000
--
-- is assembled into the following:
--
-- .literal .L1, 50000
-- mov.n a5, a6
-- addmi a5, a6, 0x200
-- addmi a5, a6, 0x200
-- addi a5, a5, 1
-- l32r a5, .L1
-- add a5, a6, a5
--
--
--File: as.info, Node: Xtensa Directives, Prev: Xtensa Relaxation, Up: Xtensa-Dependent
--
--9.52.5 Directives
-------------------
--
--The Xtensa assembler supports a region-based directive syntax:
--
-- .begin DIRECTIVE [OPTIONS]
-- ...
-- .end DIRECTIVE
--
-- All the Xtensa-specific directives that apply to a region of code use
--this syntax.
--
-- The directive applies to code between the `.begin' and the `.end'.
--The state of the option after the `.end' reverts to what it was before
--the `.begin'. A nested `.begin'/`.end' region can further change the
--state of the directive without having to be aware of its outer state.
--For example, consider:
--
-- .begin no-transform
-- L: add a0, a1, a2
-- .begin transform
-- M: add a0, a1, a2
-- .end transform
-- N: add a0, a1, a2
-- .end no-transform
--
-- The `ADD' opcodes at `L' and `N' in the outer `no-transform' region
--both result in `ADD' machine instructions, but the assembler selects an
--`ADD.N' instruction for the `ADD' at `M' in the inner `transform'
--region.
--
-- The advantage of this style is that it works well inside macros
--which can preserve the context of their callers.
--
-- The following directives are available:
--
--* Menu:
--
--* Schedule Directive:: Enable instruction scheduling.
--* Longcalls Directive:: Use Indirect Calls for Greater Range.
--* Transform Directive:: Disable All Assembler Transformations.
--* Literal Directive:: Intermix Literals with Instructions.
--* Literal Position Directive:: Specify Inline Literal Pool Locations.
--* Literal Prefix Directive:: Specify Literal Section Name Prefix.
--* Absolute Literals Directive:: Control PC-Relative vs. Absolute Literals.
--
--
--File: as.info, Node: Schedule Directive, Next: Longcalls Directive, Up: Xtensa Directives
--
--9.52.5.1 schedule
--.................
--
--The `schedule' directive is recognized only for compatibility with
--Tensilica's assembler.
--
-- .begin [no-]schedule
-- .end [no-]schedule
--
-- This directive is ignored and has no effect on `as'.
--
--
--File: as.info, Node: Longcalls Directive, Next: Transform Directive, Prev: Schedule Directive, Up: Xtensa Directives
--
--9.52.5.2 longcalls
--..................
--
--The `longcalls' directive enables or disables function call relaxation.
--*Note Function Call Relaxation: Xtensa Call Relaxation.
--
-- .begin [no-]longcalls
-- .end [no-]longcalls
--
-- Call relaxation is disabled by default unless the `--longcalls'
--command-line option is specified. The `longcalls' directive overrides
--the default determined by the command-line options.
--
--
--File: as.info, Node: Transform Directive, Next: Literal Directive, Prev: Longcalls Directive, Up: Xtensa Directives
--
--9.52.5.3 transform
--..................
--
--This directive enables or disables all assembler transformation,
--including relaxation (*note Xtensa Relaxation: Xtensa Relaxation.) and
--optimization (*note Xtensa Optimizations: Xtensa Optimizations.).
--
-- .begin [no-]transform
-- .end [no-]transform
--
-- Transformations are enabled by default unless the `--no-transform'
--option is used. The `transform' directive overrides the default
--determined by the command-line options. An underscore opcode prefix,
--disabling transformation of that opcode, always takes precedence over
--both directives and command-line flags.
--
--
--File: as.info, Node: Literal Directive, Next: Literal Position Directive, Prev: Transform Directive, Up: Xtensa Directives
--
--9.52.5.4 literal
--................
--
--The `.literal' directive is used to define literal pool data, i.e.,
--read-only 32-bit data accessed via `L32R' instructions.
--
-- .literal LABEL, VALUE[, VALUE...]
--
-- This directive is similar to the standard `.word' directive, except
--that the actual location of the literal data is determined by the
--assembler and linker, not by the position of the `.literal' directive.
--Using this directive gives the assembler freedom to locate the literal
--data in the most appropriate place and possibly to combine identical
--literals. For example, the code:
--
-- entry sp, 40
-- .literal .L1, sym
-- l32r a4, .L1
--
-- can be used to load a pointer to the symbol `sym' into register
--`a4'. The value of `sym' will not be placed between the `ENTRY' and
--`L32R' instructions; instead, the assembler puts the data in a literal
--pool.
--
-- Literal pools are placed by default in separate literal sections;
--however, when using the `--text-section-literals' option (*note Command
--Line Options: Xtensa Options.), the literal pools for PC-relative mode
--`L32R' instructions are placed in the current section.(1) These text
--section literal pools are created automatically before `ENTRY'
--instructions and manually after `.literal_position' directives (*note
--literal_position: Literal Position Directive.). If there are no
--preceding `ENTRY' instructions, explicit `.literal_position' directives
--must be used to place the text section literal pools; otherwise, `as'
--will report an error.
--
-- When literals are placed in separate sections, the literal section
--names are derived from the names of the sections where the literals are
--defined. The base literal section names are `.literal' for PC-relative
--mode `L32R' instructions and `.lit4' for absolute mode `L32R'
--instructions (*note absolute-literals: Absolute Literals Directive.).
--These base names are used for literals defined in the default `.text'
--section. For literals defined in other sections or within the scope of
--a `literal_prefix' directive (*note literal_prefix: Literal Prefix
--Directive.), the following rules determine the literal section name:
--
-- 1. If the current section is a member of a section group, the literal
-- section name includes the group name as a suffix to the base
-- `.literal' or `.lit4' name, with a period to separate the base
-- name and group name. The literal section is also made a member of
-- the group.
--
-- 2. If the current section name (or `literal_prefix' value) begins with
-- "`.gnu.linkonce.KIND.'", the literal section name is formed by
-- replacing "`.KIND'" with the base `.literal' or `.lit4' name. For
-- example, for literals defined in a section named
-- `.gnu.linkonce.t.func', the literal section will be
-- `.gnu.linkonce.literal.func' or `.gnu.linkonce.lit4.func'.
--
-- 3. If the current section name (or `literal_prefix' value) ends with
-- `.text', the literal section name is formed by replacing that
-- suffix with the base `.literal' or `.lit4' name. For example, for
-- literals defined in a section named `.iram0.text', the literal
-- section will be `.iram0.literal' or `.iram0.lit4'.
--
-- 4. If none of the preceding conditions apply, the literal section
-- name is formed by adding the base `.literal' or `.lit4' name as a
-- suffix to the current section name (or `literal_prefix' value).
--
-- ---------- Footnotes ----------
--
-- (1) Literals for the `.init' and `.fini' sections are always placed
--in separate sections, even when `--text-section-literals' is enabled.
--
--
--File: as.info, Node: Literal Position Directive, Next: Literal Prefix Directive, Prev: Literal Directive, Up: Xtensa Directives
--
--9.52.5.5 literal_position
--.........................
--
--When using `--text-section-literals' to place literals inline in the
--section being assembled, the `.literal_position' directive can be used
--to mark a potential location for a literal pool.
--
-- .literal_position
--
-- The `.literal_position' directive is ignored when the
--`--text-section-literals' option is not used or when `L32R'
--instructions use the absolute addressing mode.
--
-- The assembler will automatically place text section literal pools
--before `ENTRY' instructions, so the `.literal_position' directive is
--only needed to specify some other location for a literal pool. You may
--need to add an explicit jump instruction to skip over an inline literal
--pool.
--
-- For example, an interrupt vector does not begin with an `ENTRY'
--instruction so the assembler will be unable to automatically find a good
--place to put a literal pool. Moreover, the code for the interrupt
--vector must be at a specific starting address, so the literal pool
--cannot come before the start of the code. The literal pool for the
--vector must be explicitly positioned in the middle of the vector (before
--any uses of the literals, due to the negative offsets used by
--PC-relative `L32R' instructions). The `.literal_position' directive
--can be used to do this. In the following code, the literal for `M'
--will automatically be aligned correctly and is placed after the
--unconditional jump.
--
-- .global M
-- code_start:
-- j continue
-- .literal_position
-- .align 4
-- continue:
-- movi a4, M
--
--
--File: as.info, Node: Literal Prefix Directive, Next: Absolute Literals Directive, Prev: Literal Position Directive, Up: Xtensa Directives
--
--9.52.5.6 literal_prefix
--.......................
--
--The `literal_prefix' directive allows you to override the default
--literal section names, which are derived from the names of the sections
--where the literals are defined.
--
-- .begin literal_prefix [NAME]
-- .end literal_prefix
--
-- For literals defined within the delimited region, the literal section
--names are derived from the NAME argument instead of the name of the
--current section. The rules used to derive the literal section names do
--not change. *Note literal: Literal Directive. If the NAME argument is
--omitted, the literal sections revert to the defaults. This directive
--has no effect when using the `--text-section-literals' option (*note
--Command Line Options: Xtensa Options.).
--
--
--File: as.info, Node: Absolute Literals Directive, Prev: Literal Prefix Directive, Up: Xtensa Directives
--
--9.52.5.7 absolute-literals
--..........................
--
--The `absolute-literals' and `no-absolute-literals' directives control
--the absolute vs. PC-relative mode for `L32R' instructions. These are
--relevant only for Xtensa configurations that include the absolute
--addressing option for `L32R' instructions.
--
-- .begin [no-]absolute-literals
-- .end [no-]absolute-literals
--
-- These directives do not change the `L32R' mode--they only cause the
--assembler to emit the appropriate kind of relocation for `L32R'
--instructions and to place the literal values in the appropriate section.
--To change the `L32R' mode, the program must write the `LITBASE' special
--register. It is the programmer's responsibility to keep track of the
--mode and indicate to the assembler which mode is used in each region of
--code.
--
-- If the Xtensa configuration includes the absolute `L32R' addressing
--option, the default is to assume absolute `L32R' addressing unless the
--`--no-absolute-literals' command-line option is specified. Otherwise,
--the default is to assume PC-relative `L32R' addressing. The
--`absolute-literals' directive can then be used to override the default
--determined by the command-line options.
--
--
--File: as.info, Node: Reporting Bugs, Next: Acknowledgements, Prev: Machine Dependencies, Up: Top
--
--10 Reporting Bugs
--*****************
--
--Your bug reports play an essential role in making `as' reliable.
--
-- Reporting a bug may help you by bringing a solution to your problem,
--or it may not. But in any case the principal function of a bug report
--is to help the entire community by making the next version of `as' work
--better. Bug reports are your contribution to the maintenance of `as'.
--
-- In order for a bug report to serve its purpose, you must include the
--information that enables us to fix the bug.
--
--* Menu:
--
--* Bug Criteria:: Have you found a bug?
--* Bug Reporting:: How to report bugs
--
--
--File: as.info, Node: Bug Criteria, Next: Bug Reporting, Up: Reporting Bugs
--
--10.1 Have You Found a Bug?
--==========================
--
--If you are not sure whether you have found a bug, here are some
--guidelines:
--
-- * If the assembler gets a fatal signal, for any input whatever, that
-- is a `as' bug. Reliable assemblers never crash.
--
-- * If `as' produces an error message for valid input, that is a bug.
--
-- * If `as' does not produce an error message for invalid input, that
-- is a bug. However, you should note that your idea of "invalid
-- input" might be our idea of "an extension" or "support for
-- traditional practice".
--
-- * If you are an experienced user of assemblers, your suggestions for
-- improvement of `as' are welcome in any case.
--
--
--File: as.info, Node: Bug Reporting, Prev: Bug Criteria, Up: Reporting Bugs
--
--10.2 How to Report Bugs
--=======================
--
--A number of companies and individuals offer support for GNU products.
--If you obtained `as' from a support organization, we recommend you
--contact that organization first.
--
-- You can find contact information for many support companies and
--individuals in the file `etc/SERVICE' in the GNU Emacs distribution.
--
-- In any event, we also recommend that you send bug reports for `as'
--to `http://www.sourceware.org/bugzilla/'.
--
-- The fundamental principle of reporting bugs usefully is this:
--*report all the facts*. If you are not sure whether to state a fact or
--leave it out, state it!
--
-- Often people omit facts because they think they know what causes the
--problem and assume that some details do not matter. Thus, you might
--assume that the name of a symbol you use in an example does not matter.
--Well, probably it does not, but one cannot be sure. Perhaps the bug
--is a stray memory reference which happens to fetch from the location
--where that name is stored in memory; perhaps, if the name were
--different, the contents of that location would fool the assembler into
--doing the right thing despite the bug. Play it safe and give a
--specific, complete example. That is the easiest thing for you to do,
--and the most helpful.
--
-- Keep in mind that the purpose of a bug report is to enable us to fix
--the bug if it is new to us. Therefore, always write your bug reports
--on the assumption that the bug has not been reported previously.
--
-- Sometimes people give a few sketchy facts and ask, "Does this ring a
--bell?" This cannot help us fix a bug, so it is basically useless. We
--respond by asking for enough details to enable us to investigate. You
--might as well expedite matters by sending them to begin with.
--
-- To enable us to fix the bug, you should include all these things:
--
-- * The version of `as'. `as' announces it if you start it with the
-- `--version' argument.
--
-- Without this, we will not know whether there is any point in
-- looking for the bug in the current version of `as'.
--
-- * Any patches you may have applied to the `as' source.
--
-- * The type of machine you are using, and the operating system name
-- and version number.
--
-- * What compiler (and its version) was used to compile `as'--e.g.
-- "`gcc-2.7'".
--
-- * The command arguments you gave the assembler to assemble your
-- example and observe the bug. To guarantee you will not omit
-- something important, list them all. A copy of the Makefile (or
-- the output from make) is sufficient.
--
-- If we were to try to guess the arguments, we would probably guess
-- wrong and then we might not encounter the bug.
--
-- * A complete input file that will reproduce the bug. If the bug is
-- observed when the assembler is invoked via a compiler, send the
-- assembler source, not the high level language source. Most
-- compilers will produce the assembler source when run with the `-S'
-- option. If you are using `gcc', use the options `-v
-- --save-temps'; this will save the assembler source in a file with
-- an extension of `.s', and also show you exactly how `as' is being
-- run.
--
-- * A description of what behavior you observe that you believe is
-- incorrect. For example, "It gets a fatal signal."
--
-- Of course, if the bug is that `as' gets a fatal signal, then we
-- will certainly notice it. But if the bug is incorrect output, we
-- might not notice unless it is glaringly wrong. You might as well
-- not give us a chance to make a mistake.
--
-- Even if the problem you experience is a fatal signal, you should
-- still say so explicitly. Suppose something strange is going on,
-- such as, your copy of `as' is out of sync, or you have encountered
-- a bug in the C library on your system. (This has happened!) Your
-- copy might crash and ours would not. If you told us to expect a
-- crash, then when ours fails to crash, we would know that the bug
-- was not happening for us. If you had not told us to expect a
-- crash, then we would not be able to draw any conclusion from our
-- observations.
--
-- * If you wish to suggest changes to the `as' source, send us context
-- diffs, as generated by `diff' with the `-u', `-c', or `-p' option.
-- Always send diffs from the old file to the new file. If you even
-- discuss something in the `as' source, refer to it by context, not
-- by line number.
--
-- The line numbers in our development sources will not match those
-- in your sources. Your line numbers would convey no useful
-- information to us.
--
-- Here are some things that are not necessary:
--
-- * A description of the envelope of the bug.
--
-- Often people who encounter a bug spend a lot of time investigating
-- which changes to the input file will make the bug go away and which
-- changes will not affect it.
--
-- This is often time consuming and not very useful, because the way
-- we will find the bug is by running a single example under the
-- debugger with breakpoints, not by pure deduction from a series of
-- examples. We recommend that you save your time for something else.
--
-- Of course, if you can find a simpler example to report _instead_
-- of the original one, that is a convenience for us. Errors in the
-- output will be easier to spot, running under the debugger will take
-- less time, and so on.
--
-- However, simplification is not vital; if you do not want to do
-- this, report the bug anyway and send us the entire test case you
-- used.
--
-- * A patch for the bug.
--
-- A patch for the bug does help us if it is a good one. But do not
-- omit the necessary information, such as the test case, on the
-- assumption that a patch is all we need. We might see problems
-- with your patch and decide to fix the problem another way, or we
-- might not understand it at all.
--
-- Sometimes with a program as complicated as `as' it is very hard to
-- construct an example that will make the program follow a certain
-- path through the code. If you do not send us the example, we will
-- not be able to construct one, so we will not be able to verify
-- that the bug is fixed.
--
-- And if we cannot understand what bug you are trying to fix, or why
-- your patch should be an improvement, we will not install it. A
-- test case will help us to understand.
--
-- * A guess about what the bug is or what it depends on.
--
-- Such guesses are usually wrong. Even we cannot guess right about
-- such things without first using the debugger to find the facts.
--
--
--File: as.info, Node: Acknowledgements, Next: GNU Free Documentation License, Prev: Reporting Bugs, Up: Top
--
--11 Acknowledgements
--*******************
--
--If you have contributed to GAS and your name isn't listed here, it is
--not meant as a slight. We just don't know about it. Send mail to the
--maintainer, and we'll correct the situation. Currently the maintainer
--is Nick Clifton (email address `nickc@redhat.com').
--
-- Dean Elsner wrote the original GNU assembler for the VAX.(1)
--
-- Jay Fenlason maintained GAS for a while, adding support for
--GDB-specific debug information and the 68k series machines, most of the
--preprocessing pass, and extensive changes in `messages.c',
--`input-file.c', `write.c'.
--
-- K. Richard Pixley maintained GAS for a while, adding various
--enhancements and many bug fixes, including merging support for several
--processors, breaking GAS up to handle multiple object file format back
--ends (including heavy rewrite, testing, an integration of the coff and
--b.out back ends), adding configuration including heavy testing and
--verification of cross assemblers and file splits and renaming,
--converted GAS to strictly ANSI C including full prototypes, added
--support for m680[34]0 and cpu32, did considerable work on i960
--including a COFF port (including considerable amounts of reverse
--engineering), a SPARC opcode file rewrite, DECstation, rs6000, and
--hp300hpux host ports, updated "know" assertions and made them work,
--much other reorganization, cleanup, and lint.
--
-- Ken Raeburn wrote the high-level BFD interface code to replace most
--of the code in format-specific I/O modules.
--
-- The original VMS support was contributed by David L. Kashtan. Eric
--Youngdale has done much work with it since.
--
-- The Intel 80386 machine description was written by Eliot Dresselhaus.
--
-- Minh Tran-Le at IntelliCorp contributed some AIX 386 support.
--
-- The Motorola 88k machine description was contributed by Devon Bowen
--of Buffalo University and Torbjorn Granlund of the Swedish Institute of
--Computer Science.
--
-- Keith Knowles at the Open Software Foundation wrote the original
--MIPS back end (`tc-mips.c', `tc-mips.h'), and contributed Rose format
--support (which hasn't been merged in yet). Ralph Campbell worked with
--the MIPS code to support a.out format.
--
-- Support for the Zilog Z8k and Renesas H8/300 processors (tc-z8k,
--tc-h8300), and IEEE 695 object file format (obj-ieee), was written by
--Steve Chamberlain of Cygnus Support. Steve also modified the COFF back
--end to use BFD for some low-level operations, for use with the H8/300
--and AMD 29k targets.
--
-- John Gilmore built the AMD 29000 support, added `.include' support,
--and simplified the configuration of which versions accept which
--directives. He updated the 68k machine description so that Motorola's
--opcodes always produced fixed-size instructions (e.g., `jsr'), while
--synthetic instructions remained shrinkable (`jbsr'). John fixed many
--bugs, including true tested cross-compilation support, and one bug in
--relaxation that took a week and required the proverbial one-bit fix.
--
-- Ian Lance Taylor of Cygnus Support merged the Motorola and MIT
--syntax for the 68k, completed support for some COFF targets (68k, i386
--SVR3, and SCO Unix), added support for MIPS ECOFF and ELF targets,
--wrote the initial RS/6000 and PowerPC assembler, and made a few other
--minor patches.
--
-- Steve Chamberlain made GAS able to generate listings.
--
-- Hewlett-Packard contributed support for the HP9000/300.
--
-- Jeff Law wrote GAS and BFD support for the native HPPA object format
--(SOM) along with a fairly extensive HPPA testsuite (for both SOM and
--ELF object formats). This work was supported by both the Center for
--Software Science at the University of Utah and Cygnus Support.
--
-- Support for ELF format files has been worked on by Mark Eichin of
--Cygnus Support (original, incomplete implementation for SPARC), Pete
--Hoogenboom and Jeff Law at the University of Utah (HPPA mainly),
--Michael Meissner of the Open Software Foundation (i386 mainly), and Ken
--Raeburn of Cygnus Support (sparc, and some initial 64-bit support).
--
-- Linas Vepstas added GAS support for the ESA/390 "IBM 370"
--architecture.
--
-- Richard Henderson rewrote the Alpha assembler. Klaus Kaempf wrote
--GAS and BFD support for openVMS/Alpha.
--
-- Timothy Wall, Michael Hayes, and Greg Smart contributed to the
--various tic* flavors.
--
-- David Heine, Sterling Augustine, Bob Wilson and John Ruttenberg from
--Tensilica, Inc. added support for Xtensa processors.
--
-- Several engineers at Cygnus Support have also provided many small
--bug fixes and configuration enhancements.
--
-- Jon Beniston added support for the Lattice Mico32 architecture.
--
-- Many others have contributed large or small bugfixes and
--enhancements. If you have contributed significant work and are not
--mentioned on this list, and want to be, let us know. Some of the
--history has been lost; we are not intentionally leaving anyone out.
--
-- ---------- Footnotes ----------
--
-- (1) Any more details?
--
--
--File: as.info, Node: GNU Free Documentation License, Next: AS Index, Prev: Acknowledgements, Up: Top
--
--Appendix A GNU Free Documentation License
--*****************************************
--
-- Version 1.3, 3 November 2008
--
-- Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
-- `http://fsf.org/'
--
-- Everyone is permitted to copy and distribute verbatim copies
-- of this license document, but changing it is not allowed.
--
-- 0. PREAMBLE
--
-- The purpose of this License is to make a manual, textbook, or other
-- functional and useful document "free" in the sense of freedom: to
-- assure everyone the effective freedom to copy and redistribute it,
-- with or without modifying it, either commercially or
-- noncommercially. Secondarily, this License preserves for the
-- author and publisher a way to get credit for their work, while not
-- being considered responsible for modifications made by others.
--
-- This License is a kind of "copyleft", which means that derivative
-- works of the document must themselves be free in the same sense.
-- It complements the GNU General Public License, which is a copyleft
-- license designed for free software.
--
-- We have designed this License in order to use it for manuals for
-- free software, because free software needs free documentation: a
-- free program should come with manuals providing the same freedoms
-- that the software does. But this License is not limited to
-- software manuals; it can be used for any textual work, regardless
-- of subject matter or whether it is published as a printed book.
-- We recommend this License principally for works whose purpose is
-- instruction or reference.
--
-- 1. APPLICABILITY AND DEFINITIONS
--
-- This License applies to any manual or other work, in any medium,
-- that contains a notice placed by the copyright holder saying it
-- can be distributed under the terms of this License. Such a notice
-- grants a world-wide, royalty-free license, unlimited in duration,
-- to use that work under the conditions stated herein. The
-- "Document", below, refers to any such manual or work. Any member
-- of the public is a licensee, and is addressed as "you". You
-- accept the license if you copy, modify or distribute the work in a
-- way requiring permission under copyright law.
--
-- A "Modified Version" of the Document means any work containing the
-- Document or a portion of it, either copied verbatim, or with
-- modifications and/or translated into another language.
--
-- A "Secondary Section" is a named appendix or a front-matter section
-- of the Document that deals exclusively with the relationship of the
-- publishers or authors of the Document to the Document's overall
-- subject (or to related matters) and contains nothing that could
-- fall directly within that overall subject. (Thus, if the Document
-- is in part a textbook of mathematics, a Secondary Section may not
-- explain any mathematics.) The relationship could be a matter of
-- historical connection with the subject or with related matters, or
-- of legal, commercial, philosophical, ethical or political position
-- regarding them.
--
-- The "Invariant Sections" are certain Secondary Sections whose
-- titles are designated, as being those of Invariant Sections, in
-- the notice that says that the Document is released under this
-- License. If a section does not fit the above definition of
-- Secondary then it is not allowed to be designated as Invariant.
-- The Document may contain zero Invariant Sections. If the Document
-- does not identify any Invariant Sections then there are none.
--
-- The "Cover Texts" are certain short passages of text that are
-- listed, as Front-Cover Texts or Back-Cover Texts, in the notice
-- that says that the Document is released under this License. A
-- Front-Cover Text may be at most 5 words, and a Back-Cover Text may
-- be at most 25 words.
--
-- A "Transparent" copy of the Document means a machine-readable copy,
-- represented in a format whose specification is available to the
-- general public, that is suitable for revising the document
-- straightforwardly with generic text editors or (for images
-- composed of pixels) generic paint programs or (for drawings) some
-- widely available drawing editor, and that is suitable for input to
-- text formatters or for automatic translation to a variety of
-- formats suitable for input to text formatters. A copy made in an
-- otherwise Transparent file format whose markup, or absence of
-- markup, has been arranged to thwart or discourage subsequent
-- modification by readers is not Transparent. An image format is
-- not Transparent if used for any substantial amount of text. A
-- copy that is not "Transparent" is called "Opaque".
--
-- Examples of suitable formats for Transparent copies include plain
-- ASCII without markup, Texinfo input format, LaTeX input format,
-- SGML or XML using a publicly available DTD, and
-- standard-conforming simple HTML, PostScript or PDF designed for
-- human modification. Examples of transparent image formats include
-- PNG, XCF and JPG. Opaque formats include proprietary formats that
-- can be read and edited only by proprietary word processors, SGML or
-- XML for which the DTD and/or processing tools are not generally
-- available, and the machine-generated HTML, PostScript or PDF
-- produced by some word processors for output purposes only.
--
-- The "Title Page" means, for a printed book, the title page itself,
-- plus such following pages as are needed to hold, legibly, the
-- material this License requires to appear in the title page. For
-- works in formats which do not have any title page as such, "Title
-- Page" means the text near the most prominent appearance of the
-- work's title, preceding the beginning of the body of the text.
--
-- The "publisher" means any person or entity that distributes copies
-- of the Document to the public.
--
-- A section "Entitled XYZ" means a named subunit of the Document
-- whose title either is precisely XYZ or contains XYZ in parentheses
-- following text that translates XYZ in another language. (Here XYZ
-- stands for a specific section name mentioned below, such as
-- "Acknowledgements", "Dedications", "Endorsements", or "History".)
-- To "Preserve the Title" of such a section when you modify the
-- Document means that it remains a section "Entitled XYZ" according
-- to this definition.
--
-- The Document may include Warranty Disclaimers next to the notice
-- which states that this License applies to the Document. These
-- Warranty Disclaimers are considered to be included by reference in
-- this License, but only as regards disclaiming warranties: any other
-- implication that these Warranty Disclaimers may have is void and
-- has no effect on the meaning of this License.
--
-- 2. VERBATIM COPYING
--
-- You may copy and distribute the Document in any medium, either
-- commercially or noncommercially, provided that this License, the
-- copyright notices, and the license notice saying this License
-- applies to the Document are reproduced in all copies, and that you
-- add no other conditions whatsoever to those of this License. You
-- may not use technical measures to obstruct or control the reading
-- or further copying of the copies you make or distribute. However,
-- you may accept compensation in exchange for copies. If you
-- distribute a large enough number of copies you must also follow
-- the conditions in section 3.
--
-- You may also lend copies, under the same conditions stated above,
-- and you may publicly display copies.
--
-- 3. COPYING IN QUANTITY
--
-- If you publish printed copies (or copies in media that commonly
-- have printed covers) of the Document, numbering more than 100, and
-- the Document's license notice requires Cover Texts, you must
-- enclose the copies in covers that carry, clearly and legibly, all
-- these Cover Texts: Front-Cover Texts on the front cover, and
-- Back-Cover Texts on the back cover. Both covers must also clearly
-- and legibly identify you as the publisher of these copies. The
-- front cover must present the full title with all words of the
-- title equally prominent and visible. You may add other material
-- on the covers in addition. Copying with changes limited to the
-- covers, as long as they preserve the title of the Document and
-- satisfy these conditions, can be treated as verbatim copying in
-- other respects.
--
-- If the required texts for either cover are too voluminous to fit
-- legibly, you should put the first ones listed (as many as fit
-- reasonably) on the actual cover, and continue the rest onto
-- adjacent pages.
--
-- If you publish or distribute Opaque copies of the Document
-- numbering more than 100, you must either include a
-- machine-readable Transparent copy along with each Opaque copy, or
-- state in or with each Opaque copy a computer-network location from
-- which the general network-using public has access to download
-- using public-standard network protocols a complete Transparent
-- copy of the Document, free of added material. If you use the
-- latter option, you must take reasonably prudent steps, when you
-- begin distribution of Opaque copies in quantity, to ensure that
-- this Transparent copy will remain thus accessible at the stated
-- location until at least one year after the last time you
-- distribute an Opaque copy (directly or through your agents or
-- retailers) of that edition to the public.
--
-- It is requested, but not required, that you contact the authors of
-- the Document well before redistributing any large number of
-- copies, to give them a chance to provide you with an updated
-- version of the Document.
--
-- 4. MODIFICATIONS
--
-- You may copy and distribute a Modified Version of the Document
-- under the conditions of sections 2 and 3 above, provided that you
-- release the Modified Version under precisely this License, with
-- the Modified Version filling the role of the Document, thus
-- licensing distribution and modification of the Modified Version to
-- whoever possesses a copy of it. In addition, you must do these
-- things in the Modified Version:
--
-- A. Use in the Title Page (and on the covers, if any) a title
-- distinct from that of the Document, and from those of
-- previous versions (which should, if there were any, be listed
-- in the History section of the Document). You may use the
-- same title as a previous version if the original publisher of
-- that version gives permission.
--
-- B. List on the Title Page, as authors, one or more persons or
-- entities responsible for authorship of the modifications in
-- the Modified Version, together with at least five of the
-- principal authors of the Document (all of its principal
-- authors, if it has fewer than five), unless they release you
-- from this requirement.
--
-- C. State on the Title page the name of the publisher of the
-- Modified Version, as the publisher.
--
-- D. Preserve all the copyright notices of the Document.
--
-- E. Add an appropriate copyright notice for your modifications
-- adjacent to the other copyright notices.
--
-- F. Include, immediately after the copyright notices, a license
-- notice giving the public permission to use the Modified
-- Version under the terms of this License, in the form shown in
-- the Addendum below.
--
-- G. Preserve in that license notice the full lists of Invariant
-- Sections and required Cover Texts given in the Document's
-- license notice.
--
-- H. Include an unaltered copy of this License.
--
-- I. Preserve the section Entitled "History", Preserve its Title,
-- and add to it an item stating at least the title, year, new
-- authors, and publisher of the Modified Version as given on
-- the Title Page. If there is no section Entitled "History" in
-- the Document, create one stating the title, year, authors,
-- and publisher of the Document as given on its Title Page,
-- then add an item describing the Modified Version as stated in
-- the previous sentence.
--
-- J. Preserve the network location, if any, given in the Document
-- for public access to a Transparent copy of the Document, and
-- likewise the network locations given in the Document for
-- previous versions it was based on. These may be placed in
-- the "History" section. You may omit a network location for a
-- work that was published at least four years before the
-- Document itself, or if the original publisher of the version
-- it refers to gives permission.
--
-- K. For any section Entitled "Acknowledgements" or "Dedications",
-- Preserve the Title of the section, and preserve in the
-- section all the substance and tone of each of the contributor
-- acknowledgements and/or dedications given therein.
--
-- L. Preserve all the Invariant Sections of the Document,
-- unaltered in their text and in their titles. Section numbers
-- or the equivalent are not considered part of the section
-- titles.
--
-- M. Delete any section Entitled "Endorsements". Such a section
-- may not be included in the Modified Version.
--
-- N. Do not retitle any existing section to be Entitled
-- "Endorsements" or to conflict in title with any Invariant
-- Section.
--
-- O. Preserve any Warranty Disclaimers.
--
-- If the Modified Version includes new front-matter sections or
-- appendices that qualify as Secondary Sections and contain no
-- material copied from the Document, you may at your option
-- designate some or all of these sections as invariant. To do this,
-- add their titles to the list of Invariant Sections in the Modified
-- Version's license notice. These titles must be distinct from any
-- other section titles.
--
-- You may add a section Entitled "Endorsements", provided it contains
-- nothing but endorsements of your Modified Version by various
-- parties--for example, statements of peer review or that the text
-- has been approved by an organization as the authoritative
-- definition of a standard.
--
-- You may add a passage of up to five words as a Front-Cover Text,
-- and a passage of up to 25 words as a Back-Cover Text, to the end
-- of the list of Cover Texts in the Modified Version. Only one
-- passage of Front-Cover Text and one of Back-Cover Text may be
-- added by (or through arrangements made by) any one entity. If the
-- Document already includes a cover text for the same cover,
-- previously added by you or by arrangement made by the same entity
-- you are acting on behalf of, you may not add another; but you may
-- replace the old one, on explicit permission from the previous
-- publisher that added the old one.
--
-- The author(s) and publisher(s) of the Document do not by this
-- License give permission to use their names for publicity for or to
-- assert or imply endorsement of any Modified Version.
--
-- 5. COMBINING DOCUMENTS
--
-- You may combine the Document with other documents released under
-- this License, under the terms defined in section 4 above for
-- modified versions, provided that you include in the combination
-- all of the Invariant Sections of all of the original documents,
-- unmodified, and list them all as Invariant Sections of your
-- combined work in its license notice, and that you preserve all
-- their Warranty Disclaimers.
--
-- The combined work need only contain one copy of this License, and
-- multiple identical Invariant Sections may be replaced with a single
-- copy. If there are multiple Invariant Sections with the same name
-- but different contents, make the title of each such section unique
-- by adding at the end of it, in parentheses, the name of the
-- original author or publisher of that section if known, or else a
-- unique number. Make the same adjustment to the section titles in
-- the list of Invariant Sections in the license notice of the
-- combined work.
--
-- In the combination, you must combine any sections Entitled
-- "History" in the various original documents, forming one section
-- Entitled "History"; likewise combine any sections Entitled
-- "Acknowledgements", and any sections Entitled "Dedications". You
-- must delete all sections Entitled "Endorsements."
--
-- 6. COLLECTIONS OF DOCUMENTS
--
-- You may make a collection consisting of the Document and other
-- documents released under this License, and replace the individual
-- copies of this License in the various documents with a single copy
-- that is included in the collection, provided that you follow the
-- rules of this License for verbatim copying of each of the
-- documents in all other respects.
--
-- You may extract a single document from such a collection, and
-- distribute it individually under this License, provided you insert
-- a copy of this License into the extracted document, and follow
-- this License in all other respects regarding verbatim copying of
-- that document.
--
-- 7. AGGREGATION WITH INDEPENDENT WORKS
--
-- A compilation of the Document or its derivatives with other
-- separate and independent documents or works, in or on a volume of
-- a storage or distribution medium, is called an "aggregate" if the
-- copyright resulting from the compilation is not used to limit the
-- legal rights of the compilation's users beyond what the individual
-- works permit. When the Document is included in an aggregate, this
-- License does not apply to the other works in the aggregate which
-- are not themselves derivative works of the Document.
--
-- If the Cover Text requirement of section 3 is applicable to these
-- copies of the Document, then if the Document is less than one half
-- of the entire aggregate, the Document's Cover Texts may be placed
-- on covers that bracket the Document within the aggregate, or the
-- electronic equivalent of covers if the Document is in electronic
-- form. Otherwise they must appear on printed covers that bracket
-- the whole aggregate.
--
-- 8. TRANSLATION
--
-- Translation is considered a kind of modification, so you may
-- distribute translations of the Document under the terms of section
-- 4. Replacing Invariant Sections with translations requires special
-- permission from their copyright holders, but you may include
-- translations of some or all Invariant Sections in addition to the
-- original versions of these Invariant Sections. You may include a
-- translation of this License, and all the license notices in the
-- Document, and any Warranty Disclaimers, provided that you also
-- include the original English version of this License and the
-- original versions of those notices and disclaimers. In case of a
-- disagreement between the translation and the original version of
-- this License or a notice or disclaimer, the original version will
-- prevail.
--
-- If a section in the Document is Entitled "Acknowledgements",
-- "Dedications", or "History", the requirement (section 4) to
-- Preserve its Title (section 1) will typically require changing the
-- actual title.
--
-- 9. TERMINATION
--
-- You may not copy, modify, sublicense, or distribute the Document
-- except as expressly provided under this License. Any attempt
-- otherwise to copy, modify, sublicense, or distribute it is void,
-- and will automatically terminate your rights under this License.
--
-- However, if you cease all violation of this License, then your
-- license from a particular copyright holder is reinstated (a)
-- provisionally, unless and until the copyright holder explicitly
-- and finally terminates your license, and (b) permanently, if the
-- copyright holder fails to notify you of the violation by some
-- reasonable means prior to 60 days after the cessation.
--
-- Moreover, your license from a particular copyright holder is
-- reinstated permanently if the copyright holder notifies you of the
-- violation by some reasonable means, this is the first time you have
-- received notice of violation of this License (for any work) from
-- that copyright holder, and you cure the violation prior to 30 days
-- after your receipt of the notice.
--
-- Termination of your rights under this section does not terminate
-- the licenses of parties who have received copies or rights from
-- you under this License. If your rights have been terminated and
-- not permanently reinstated, receipt of a copy of some or all of
-- the same material does not give you any rights to use it.
--
-- 10. FUTURE REVISIONS OF THIS LICENSE
--
-- The Free Software Foundation may publish new, revised versions of
-- the GNU Free Documentation License from time to time. Such new
-- versions will be similar in spirit to the present version, but may
-- differ in detail to address new problems or concerns. See
-- `http://www.gnu.org/copyleft/'.
--
-- Each version of the License is given a distinguishing version
-- number. If the Document specifies that a particular numbered
-- version of this License "or any later version" applies to it, you
-- have the option of following the terms and conditions either of
-- that specified version or of any later version that has been
-- published (not as a draft) by the Free Software Foundation. If
-- the Document does not specify a version number of this License,
-- you may choose any version ever published (not as a draft) by the
-- Free Software Foundation. If the Document specifies that a proxy
-- can decide which future versions of this License can be used, that
-- proxy's public statement of acceptance of a version permanently
-- authorizes you to choose that version for the Document.
--
-- 11. RELICENSING
--
-- "Massive Multiauthor Collaboration Site" (or "MMC Site") means any
-- World Wide Web server that publishes copyrightable works and also
-- provides prominent facilities for anybody to edit those works. A
-- public wiki that anybody can edit is an example of such a server.
-- A "Massive Multiauthor Collaboration" (or "MMC") contained in the
-- site means any set of copyrightable works thus published on the MMC
-- site.
--
-- "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0
-- license published by Creative Commons Corporation, a not-for-profit
-- corporation with a principal place of business in San Francisco,
-- California, as well as future copyleft versions of that license
-- published by that same organization.
--
-- "Incorporate" means to publish or republish a Document, in whole or
-- in part, as part of another Document.
--
-- An MMC is "eligible for relicensing" if it is licensed under this
-- License, and if all works that were first published under this
-- License somewhere other than this MMC, and subsequently
-- incorporated in whole or in part into the MMC, (1) had no cover
-- texts or invariant sections, and (2) were thus incorporated prior
-- to November 1, 2008.
--
-- The operator of an MMC Site may republish an MMC contained in the
-- site under CC-BY-SA on the same site at any time before August 1,
-- 2009, provided the MMC is eligible for relicensing.
--
--
--ADDENDUM: How to use this License for your documents
--====================================================
--
--To use this License in a document you have written, include a copy of
--the License in the document and put the following copyright and license
--notices just after the title page:
--
-- Copyright (C) YEAR YOUR NAME.
-- Permission is granted to copy, distribute and/or modify this document
-- under the terms of the GNU Free Documentation License, Version 1.3
-- or any later version published by the Free Software Foundation;
-- with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
-- Texts. A copy of the license is included in the section entitled ``GNU
-- Free Documentation License''.
--
-- If you have Invariant Sections, Front-Cover Texts and Back-Cover
--Texts, replace the "with...Texts." line with this:
--
-- with the Invariant Sections being LIST THEIR TITLES, with
-- the Front-Cover Texts being LIST, and with the Back-Cover Texts
-- being LIST.
--
-- If you have Invariant Sections without Cover Texts, or some other
--combination of the three, merge those two alternatives to suit the
--situation.
--
-- If your document contains nontrivial examples of program code, we
--recommend releasing these examples in parallel under your choice of
--free software license, such as the GNU General Public License, to
--permit their use in free software.
--
--
--File: as.info, Node: AS Index, Prev: GNU Free Documentation License, Up: Top
--
--AS Index
--********
--
--
--* Menu:
--
--* #: Comments. (line 33)
--* #APP: Preprocessing. (line 27)
--* #NO_APP: Preprocessing. (line 27)
--* $ in symbol names <1>: D30V-Chars. (line 70)
--* $ in symbol names <2>: SH64-Chars. (line 15)
--* $ in symbol names <3>: D10V-Chars. (line 53)
--* $ in symbol names <4>: Meta-Chars. (line 10)
--* $ in symbol names: SH-Chars. (line 15)
--* $a: ARM Mapping Symbols. (line 9)
--* $acos math builtin, TIC54X: TIC54X-Builtins. (line 10)
--* $asin math builtin, TIC54X: TIC54X-Builtins. (line 13)
--* $atan math builtin, TIC54X: TIC54X-Builtins. (line 16)
--* $atan2 math builtin, TIC54X: TIC54X-Builtins. (line 19)
--* $ceil math builtin, TIC54X: TIC54X-Builtins. (line 22)
--* $cos math builtin, TIC54X: TIC54X-Builtins. (line 28)
--* $cosh math builtin, TIC54X: TIC54X-Builtins. (line 25)
--* $cvf math builtin, TIC54X: TIC54X-Builtins. (line 31)
--* $cvi math builtin, TIC54X: TIC54X-Builtins. (line 34)
--* $d <1>: AArch64 Mapping Symbols.
-- (line 12)
--* $d: ARM Mapping Symbols. (line 15)
--* $exp math builtin, TIC54X: TIC54X-Builtins. (line 37)
--* $fabs math builtin, TIC54X: TIC54X-Builtins. (line 40)
--* $firstch subsym builtin, TIC54X: TIC54X-Macros. (line 26)
--* $floor math builtin, TIC54X: TIC54X-Builtins. (line 43)
--* $fmod math builtin, TIC54X: TIC54X-Builtins. (line 47)
--* $int math builtin, TIC54X: TIC54X-Builtins. (line 50)
--* $iscons subsym builtin, TIC54X: TIC54X-Macros. (line 43)
--* $isdefed subsym builtin, TIC54X: TIC54X-Macros. (line 34)
--* $ismember subsym builtin, TIC54X: TIC54X-Macros. (line 38)
--* $isname subsym builtin, TIC54X: TIC54X-Macros. (line 47)
--* $isreg subsym builtin, TIC54X: TIC54X-Macros. (line 50)
--* $lastch subsym builtin, TIC54X: TIC54X-Macros. (line 30)
--* $ldexp math builtin, TIC54X: TIC54X-Builtins. (line 53)
--* $log math builtin, TIC54X: TIC54X-Builtins. (line 59)
--* $log10 math builtin, TIC54X: TIC54X-Builtins. (line 56)
--* $max math builtin, TIC54X: TIC54X-Builtins. (line 62)
--* $min math builtin, TIC54X: TIC54X-Builtins. (line 65)
--* $pow math builtin, TIC54X: TIC54X-Builtins. (line 68)
--* $round math builtin, TIC54X: TIC54X-Builtins. (line 71)
--* $sgn math builtin, TIC54X: TIC54X-Builtins. (line 74)
--* $sin math builtin, TIC54X: TIC54X-Builtins. (line 77)
--* $sinh math builtin, TIC54X: TIC54X-Builtins. (line 80)
--* $sqrt math builtin, TIC54X: TIC54X-Builtins. (line 83)
--* $structacc subsym builtin, TIC54X: TIC54X-Macros. (line 57)
--* $structsz subsym builtin, TIC54X: TIC54X-Macros. (line 54)
--* $symcmp subsym builtin, TIC54X: TIC54X-Macros. (line 23)
--* $symlen subsym builtin, TIC54X: TIC54X-Macros. (line 20)
--* $t: ARM Mapping Symbols. (line 12)
--* $tan math builtin, TIC54X: TIC54X-Builtins. (line 86)
--* $tanh math builtin, TIC54X: TIC54X-Builtins. (line 89)
--* $trunc math builtin, TIC54X: TIC54X-Builtins. (line 92)
--* $x: AArch64 Mapping Symbols.
-- (line 9)
--* %gp: RX-Modifiers. (line 6)
--* %gpreg: RX-Modifiers. (line 22)
--* %pidreg: RX-Modifiers. (line 25)
--* -+ option, VAX/VMS: VAX-Opts. (line 71)
--* --: Command Line. (line 10)
--* --32 option, i386: i386-Options. (line 8)
--* --32 option, x86-64: i386-Options. (line 8)
--* --64 option, i386: i386-Options. (line 8)
--* --64 option, x86-64: i386-Options. (line 8)
--* --absolute-literals: Xtensa Options. (line 21)
--* --allow-reg-prefix: SH Options. (line 9)
--* --alternate: alternate. (line 6)
--* --base-size-default-16: M68K-Opts. (line 65)
--* --base-size-default-32: M68K-Opts. (line 65)
--* --big: SH Options. (line 9)
--* --bitwise-or option, M680x0: M68K-Opts. (line 58)
--* --disp-size-default-16: M68K-Opts. (line 74)
--* --disp-size-default-32: M68K-Opts. (line 74)
--* --divide option, i386: i386-Options. (line 24)
--* --dsp: SH Options. (line 9)
--* --emulation=crisaout command line option, CRIS: CRIS-Opts. (line 9)
--* --emulation=criself command line option, CRIS: CRIS-Opts. (line 9)
--* --enforce-aligned-data: Sparc-Aligned-Data. (line 11)
--* --fatal-warnings: W. (line 16)
--* --fdpic: SH Options. (line 31)
--* --fix-v4bx command line option, ARM: ARM Options. (line 173)
--* --fixed-special-register-names command line option, MMIX: MMIX-Opts.
-- (line 8)
--* --force-long-branches: M68HC11-Opts. (line 82)
--* --generate-example: M68HC11-Opts. (line 99)
--* --globalize-symbols command line option, MMIX: MMIX-Opts. (line 12)
--* --gnu-syntax command line option, MMIX: MMIX-Opts. (line 16)
--* --hash-size=NUMBER: Overview. (line 400)
--* --linker-allocated-gregs command line option, MMIX: MMIX-Opts.
-- (line 67)
--* --listing-cont-lines: listing. (line 34)
--* --listing-lhs-width: listing. (line 16)
--* --listing-lhs-width2: listing. (line 21)
--* --listing-rhs-width: listing. (line 28)
--* --little: SH Options. (line 9)
--* --longcalls: Xtensa Options. (line 35)
--* --march=ARCHITECTURE command line option, CRIS: CRIS-Opts. (line 34)
--* --MD: MD. (line 6)
--* --mul-bug-abort command line option, CRIS: CRIS-Opts. (line 62)
--* --no-absolute-literals: Xtensa Options. (line 21)
--* --no-expand command line option, MMIX: MMIX-Opts. (line 31)
--* --no-longcalls: Xtensa Options. (line 35)
--* --no-merge-gregs command line option, MMIX: MMIX-Opts. (line 36)
--* --no-mul-bug-abort command line option, CRIS: CRIS-Opts. (line 62)
--* --no-predefined-syms command line option, MMIX: MMIX-Opts. (line 22)
--* --no-pushj-stubs command line option, MMIX: MMIX-Opts. (line 54)
--* --no-stubs command line option, MMIX: MMIX-Opts. (line 54)
--* --no-target-align: Xtensa Options. (line 28)
--* --no-text-section-literals: Xtensa Options. (line 7)
--* --no-transform: Xtensa Options. (line 44)
--* --no-underscore command line option, CRIS: CRIS-Opts. (line 15)
--* --no-warn: W. (line 11)
--* --pcrel: M68K-Opts. (line 86)
--* --pic command line option, CRIS: CRIS-Opts. (line 27)
--* --print-insn-syntax <1>: XGATE-Opts. (line 25)
--* --print-insn-syntax: M68HC11-Opts. (line 88)
--* --print-opcodes <1>: XGATE-Opts. (line 29)
--* --print-opcodes: M68HC11-Opts. (line 92)
--* --register-prefix-optional option, M680x0: M68K-Opts. (line 45)
--* --relax: SH Options. (line 9)
--* --relax command line option, MMIX: MMIX-Opts. (line 19)
--* --rename-section: Xtensa Options. (line 52)
--* --renesas: SH Options. (line 9)
--* --short-branches: M68HC11-Opts. (line 67)
--* --small: SH Options. (line 9)
--* --statistics: statistics. (line 6)
--* --strict-direct-mode: M68HC11-Opts. (line 57)
--* --target-align: Xtensa Options. (line 28)
--* --text-section-literals: Xtensa Options. (line 7)
--* --traditional-format: traditional-format. (line 6)
--* --transform: Xtensa Options. (line 44)
--* --underscore command line option, CRIS: CRIS-Opts. (line 15)
--* --warn: W. (line 19)
--* --x32 option, i386: i386-Options. (line 8)
--* --x32 option, x86-64: i386-Options. (line 8)
--* --xgate-ramoffset: M68HC11-Opts. (line 36)
--* -1 option, VAX/VMS: VAX-Opts. (line 77)
--* -32addr command line option, Alpha: Alpha Options. (line 57)
--* -a: a. (line 6)
--* -A options, i960: Options-i960. (line 6)
--* -ac: a. (line 6)
--* -ad: a. (line 6)
--* -ag: a. (line 6)
--* -ah: a. (line 6)
--* -al: a. (line 6)
--* -Aleon: Sparc-Opts. (line 25)
--* -an: a. (line 6)
--* -as: a. (line 6)
--* -Asparc: Sparc-Opts. (line 25)
--* -Asparcfmaf: Sparc-Opts. (line 25)
--* -Asparcima: Sparc-Opts. (line 25)
--* -Asparclet: Sparc-Opts. (line 25)
--* -Asparclite: Sparc-Opts. (line 25)
--* -Asparcvis: Sparc-Opts. (line 25)
--* -Asparcvis2: Sparc-Opts. (line 25)
--* -Asparcvis3: Sparc-Opts. (line 25)
--* -Asparcvis3r: Sparc-Opts. (line 25)
--* -Av6: Sparc-Opts. (line 25)
--* -Av7: Sparc-Opts. (line 25)
--* -Av8: Sparc-Opts. (line 25)
--* -Av9: Sparc-Opts. (line 25)
--* -Av9a: Sparc-Opts. (line 25)
--* -Av9b: Sparc-Opts. (line 25)
--* -Av9c: Sparc-Opts. (line 25)
--* -Av9d: Sparc-Opts. (line 25)
--* -Av9v: Sparc-Opts. (line 25)
--* -b option, i960: Options-i960. (line 22)
--* -big option, M32R: M32R-Opts. (line 35)
--* -D: D. (line 6)
--* -D, ignored on VAX: VAX-Opts. (line 11)
--* -d, VAX option: VAX-Opts. (line 16)
--* -eabi= command line option, ARM: ARM Options. (line 156)
--* -EB command line option, AArch64: AArch64 Options. (line 6)
--* -EB command line option, ARC: ARC Options. (line 31)
--* -EB command line option, ARM: ARM Options. (line 161)
--* -EB option (MIPS): MIPS Options. (line 13)
--* -EB option, M32R: M32R-Opts. (line 39)
--* -EB option, TILE-Gx: TILE-Gx Options. (line 11)
--* -EL command line option, AArch64: AArch64 Options. (line 10)
--* -EL command line option, ARC: ARC Options. (line 35)
--* -EL command line option, ARM: ARM Options. (line 165)
--* -EL option (MIPS): MIPS Options. (line 13)
--* -EL option, M32R: M32R-Opts. (line 32)
--* -EL option, TILE-Gx: TILE-Gx Options. (line 11)
--* -f: f. (line 6)
--* -F command line option, Alpha: Alpha Options. (line 57)
--* -g command line option, Alpha: Alpha Options. (line 47)
--* -G command line option, Alpha: Alpha Options. (line 53)
--* -G option (MIPS): MIPS Options. (line 8)
--* -h option, VAX/VMS: VAX-Opts. (line 45)
--* -H option, VAX/VMS: VAX-Opts. (line 81)
--* -I PATH: I. (line 6)
--* -ignore-parallel-conflicts option, M32RX: M32R-Opts. (line 87)
--* -Ip option, M32RX: M32R-Opts. (line 97)
--* -J, ignored on VAX: VAX-Opts. (line 27)
--* -K: K. (line 6)
--* -k command line option, ARM: ARM Options. (line 169)
--* -KPIC option, M32R: M32R-Opts. (line 42)
--* -KPIC option, MIPS: MIPS Options. (line 21)
--* -L: L. (line 6)
--* -l option, M680x0: M68K-Opts. (line 33)
--* -little option, M32R: M32R-Opts. (line 27)
--* -M: M. (line 6)
--* -m11/03: PDP-11-Options. (line 140)
--* -m11/04: PDP-11-Options. (line 143)
--* -m11/05: PDP-11-Options. (line 146)
--* -m11/10: PDP-11-Options. (line 146)
--* -m11/15: PDP-11-Options. (line 149)
--* -m11/20: PDP-11-Options. (line 149)
--* -m11/21: PDP-11-Options. (line 152)
--* -m11/23: PDP-11-Options. (line 155)
--* -m11/24: PDP-11-Options. (line 155)
--* -m11/34: PDP-11-Options. (line 158)
--* -m11/34a: PDP-11-Options. (line 161)
--* -m11/35: PDP-11-Options. (line 164)
--* -m11/40: PDP-11-Options. (line 164)
--* -m11/44: PDP-11-Options. (line 167)
--* -m11/45: PDP-11-Options. (line 170)
--* -m11/50: PDP-11-Options. (line 170)
--* -m11/53: PDP-11-Options. (line 173)
--* -m11/55: PDP-11-Options. (line 170)
--* -m11/60: PDP-11-Options. (line 176)
--* -m11/70: PDP-11-Options. (line 170)
--* -m11/73: PDP-11-Options. (line 173)
--* -m11/83: PDP-11-Options. (line 173)
--* -m11/84: PDP-11-Options. (line 173)
--* -m11/93: PDP-11-Options. (line 173)
--* -m11/94: PDP-11-Options. (line 173)
--* -m16c option, M16C: M32C-Opts. (line 12)
--* -m31 option, s390: s390 Options. (line 8)
--* -m32 option, TILE-Gx: TILE-Gx Options. (line 8)
--* -m32bit-doubles: RX-Opts. (line 9)
--* -m32c option, M32C: M32C-Opts. (line 9)
--* -m32r option, M32R: M32R-Opts. (line 21)
--* -m32rx option, M32R2: M32R-Opts. (line 17)
--* -m32rx option, M32RX: M32R-Opts. (line 9)
--* -m4byte-align command line option, V850: V850 Options. (line 90)
--* -m64 option, s390: s390 Options. (line 8)
--* -m64 option, TILE-Gx: TILE-Gx Options. (line 8)
--* -m64bit-doubles: RX-Opts. (line 15)
--* -m68000 and related options: M68K-Opts. (line 98)
--* -m68hc11: M68HC11-Opts. (line 9)
--* -m68hc12: M68HC11-Opts. (line 14)
--* -m68hcs12: M68HC11-Opts. (line 21)
--* -m8byte-align command line option, V850: V850 Options. (line 86)
--* -m[no-]68851 command line option, M680x0: M68K-Opts. (line 21)
--* -m[no-]68881 command line option, M680x0: M68K-Opts. (line 21)
--* -m[no-]div command line option, M680x0: M68K-Opts. (line 21)
--* -m[no-]emac command line option, M680x0: M68K-Opts. (line 21)
--* -m[no-]float command line option, M680x0: M68K-Opts. (line 21)
--* -m[no-]mac command line option, M680x0: M68K-Opts. (line 21)
--* -m[no-]usp command line option, M680x0: M68K-Opts. (line 21)
--* -mabi= command line option, AArch64: AArch64 Options. (line 14)
--* -madd-bnd-prefix option, i386: i386-Options. (line 124)
--* -madd-bnd-prefix option, x86-64: i386-Options. (line 124)
--* -mall: PDP-11-Options. (line 26)
--* -mall-enabled command line option, LM32: LM32 Options. (line 30)
--* -mall-extensions: PDP-11-Options. (line 26)
--* -mall-opcodes command line option, AVR: AVR Options. (line 97)
--* -mapcs-26 command line option, ARM: ARM Options. (line 128)
--* -mapcs-32 command line option, ARM: ARM Options. (line 128)
--* -mapcs-float command line option, ARM: ARM Options. (line 142)
--* -mapcs-reentrant command line option, ARM: ARM Options. (line 147)
--* -marc[5|6|7|8] command line option, ARC: ARC Options. (line 6)
--* -march= command line option, ARM: ARM Options. (line 65)
--* -march= command line option, M680x0: M68K-Opts. (line 8)
--* -march= command line option, TIC6X: TIC6X Options. (line 6)
--* -march= option, i386: i386-Options. (line 31)
--* -march= option, s390: s390 Options. (line 25)
--* -march= option, x86-64: i386-Options. (line 31)
--* -matpcs command line option, ARM: ARM Options. (line 134)
--* -mavxscalar= option, i386: i386-Options. (line 82)
--* -mavxscalar= option, x86-64: i386-Options. (line 82)
--* -mbarrel-shift-enabled command line option, LM32: LM32 Options.
-- (line 12)
--* -mbig-endian: RX-Opts. (line 20)
--* -mbreak-enabled command line option, LM32: LM32 Options. (line 27)
--* -mcis: PDP-11-Options. (line 32)
--* -mconstant-gp command line option, IA-64: IA-64 Options. (line 6)
--* -mCPU command line option, Alpha: Alpha Options. (line 6)
--* -mcpu option, cpu: TIC54X-Opts. (line 15)
--* -mcpu=: RX-Opts. (line 75)
--* -mcpu= command line option, ARM: ARM Options. (line 6)
--* -mcpu= command line option, Blackfin: Blackfin Options. (line 6)
--* -mcpu= command line option, M680x0: M68K-Opts. (line 14)
--* -mcsm: PDP-11-Options. (line 43)
--* -mdcache-enabled command line option, LM32: LM32 Options. (line 24)
--* -mdebug command line option, Alpha: Alpha Options. (line 25)
--* -mdivide-enabled command line option, LM32: LM32 Options. (line 9)
--* -mdsbt command line option, TIC6X: TIC6X Options. (line 13)
--* -me option, stderr redirect: TIC54X-Opts. (line 20)
--* -meis: PDP-11-Options. (line 46)
--* -mepiphany command line option, Epiphany: Epiphany Options. (line 9)
--* -mepiphany16 command line option, Epiphany: Epiphany Options.
-- (line 13)
--* -merrors-to-file option, stderr redirect: TIC54X-Opts. (line 20)
--* -mesa option, s390: s390 Options. (line 17)
--* -mevexlig= option, i386: i386-Options. (line 90)
--* -mevexlig= option, x86-64: i386-Options. (line 90)
--* -mevexwig= option, i386: i386-Options. (line 100)
--* -mevexwig= option, x86-64: i386-Options. (line 100)
--* -mf option, far-mode: TIC54X-Opts. (line 8)
--* -mf11: PDP-11-Options. (line 122)
--* -mfar-mode option, far-mode: TIC54X-Opts. (line 8)
--* -mfdpic command line option, Blackfin: Blackfin Options. (line 19)
--* -mfis: PDP-11-Options. (line 51)
--* -mfloat-abi= command line option, ARM: ARM Options. (line 151)
--* -mfp-11: PDP-11-Options. (line 56)
--* -mfpp: PDP-11-Options. (line 56)
--* -mfpu: PDP-11-Options. (line 56)
--* -mfpu= command line option, ARM: ARM Options. (line 81)
--* -mgcc-abi: RX-Opts. (line 63)
--* -mgcc-abi command line option, V850: V850 Options. (line 79)
--* -micache-enabled command line option, LM32: LM32 Options. (line 21)
--* -mimplicit-it command line option, ARM: ARM Options. (line 112)
--* -mint-register: RX-Opts. (line 57)
--* -mip2022 option, IP2K: IP2K-Opts. (line 14)
--* -mip2022ext option, IP2022: IP2K-Opts. (line 9)
--* -mj11: PDP-11-Options. (line 126)
--* -mka11: PDP-11-Options. (line 92)
--* -mkb11: PDP-11-Options. (line 95)
--* -mkd11a: PDP-11-Options. (line 98)
--* -mkd11b: PDP-11-Options. (line 101)
--* -mkd11d: PDP-11-Options. (line 104)
--* -mkd11e: PDP-11-Options. (line 107)
--* -mkd11f: PDP-11-Options. (line 110)
--* -mkd11h: PDP-11-Options. (line 110)
--* -mkd11k: PDP-11-Options. (line 114)
--* -mkd11q: PDP-11-Options. (line 110)
--* -mkd11z: PDP-11-Options. (line 118)
--* -mkev11: PDP-11-Options. (line 51)
--* -mlimited-eis: PDP-11-Options. (line 64)
--* -mlittle-endian: RX-Opts. (line 26)
--* -mlong <1>: M68HC11-Opts. (line 45)
--* -mlong: XGATE-Opts. (line 13)
--* -mlong-double <1>: XGATE-Opts. (line 21)
--* -mlong-double: M68HC11-Opts. (line 53)
--* -mm9s12x: M68HC11-Opts. (line 27)
--* -mm9s12xg: M68HC11-Opts. (line 32)
--* -mmcu= command line option, AVR: AVR Options. (line 6)
--* -mmfpt: PDP-11-Options. (line 70)
--* -mmicrocode: PDP-11-Options. (line 83)
--* -mmnemonic= option, i386: i386-Options. (line 107)
--* -mmnemonic= option, x86-64: i386-Options. (line 107)
--* -mmultiply-enabled command line option, LM32: LM32 Options. (line 6)
--* -mmutiproc: PDP-11-Options. (line 73)
--* -mmxps: PDP-11-Options. (line 77)
--* -mnaked-reg option, i386: i386-Options. (line 119)
--* -mnaked-reg option, x86-64: i386-Options. (line 119)
--* -mnan= command line option, MIPS: MIPS Options. (line 297)
--* -mno-cis: PDP-11-Options. (line 32)
--* -mno-csm: PDP-11-Options. (line 43)
--* -mno-dsbt command line option, TIC6X: TIC6X Options. (line 13)
--* -mno-eis: PDP-11-Options. (line 46)
--* -mno-extensions: PDP-11-Options. (line 29)
--* -mno-fdpic command line option, Blackfin: Blackfin Options. (line 22)
--* -mno-fis: PDP-11-Options. (line 51)
--* -mno-fp-11: PDP-11-Options. (line 56)
--* -mno-fpp: PDP-11-Options. (line 56)
--* -mno-fpu: PDP-11-Options. (line 56)
--* -mno-kev11: PDP-11-Options. (line 51)
--* -mno-limited-eis: PDP-11-Options. (line 64)
--* -mno-mfpt: PDP-11-Options. (line 70)
--* -mno-microcode: PDP-11-Options. (line 83)
--* -mno-mutiproc: PDP-11-Options. (line 73)
--* -mno-mxps: PDP-11-Options. (line 77)
--* -mno-pic: PDP-11-Options. (line 11)
--* -mno-pic command line option, TIC6X: TIC6X Options. (line 36)
--* -mno-regnames option, s390: s390 Options. (line 35)
--* -mno-skip-bug command line option, AVR: AVR Options. (line 100)
--* -mno-spl: PDP-11-Options. (line 80)
--* -mno-sym32: MIPS Options. (line 238)
--* -mno-wrap command line option, AVR: AVR Options. (line 103)
--* -mnopic command line option, Blackfin: Blackfin Options. (line 22)
--* -mpic: PDP-11-Options. (line 11)
--* -mpic command line option, TIC6X: TIC6X Options. (line 36)
--* -mpid: RX-Opts. (line 50)
--* -mpid= command line option, TIC6X: TIC6X Options. (line 23)
--* -mregnames option, s390: s390 Options. (line 32)
--* -mrelax command line option, V850: V850 Options. (line 72)
--* -mrh850-abi command line option, V850: V850 Options. (line 82)
--* -mrx-abi: RX-Opts. (line 69)
--* -mshort <1>: M68HC11-Opts. (line 40)
--* -mshort: XGATE-Opts. (line 8)
--* -mshort-double <1>: XGATE-Opts. (line 17)
--* -mshort-double: M68HC11-Opts. (line 49)
--* -msign-extend-enabled command line option, LM32: LM32 Options.
-- (line 15)
--* -msmall-data-limit: RX-Opts. (line 42)
--* -mspl: PDP-11-Options. (line 80)
--* -msse-check= option, i386: i386-Options. (line 72)
--* -msse-check= option, x86-64: i386-Options. (line 72)
--* -msse2avx option, i386: i386-Options. (line 68)
--* -msse2avx option, x86-64: i386-Options. (line 68)
--* -msym32: MIPS Options. (line 238)
--* -msyntax= option, i386: i386-Options. (line 113)
--* -msyntax= option, x86-64: i386-Options. (line 113)
--* -mt11: PDP-11-Options. (line 130)
--* -mthumb command line option, ARM: ARM Options. (line 103)
--* -mthumb-interwork command line option, ARM: ARM Options. (line 108)
--* -mtune= option, i386: i386-Options. (line 60)
--* -mtune= option, x86-64: i386-Options. (line 60)
--* -muse-conventional-section-names: RX-Opts. (line 33)
--* -muse-renesas-section-names: RX-Opts. (line 37)
--* -muser-enabled command line option, LM32: LM32 Options. (line 18)
--* -mv850 command line option, V850: V850 Options. (line 23)
--* -mv850any command line option, V850: V850 Options. (line 41)
--* -mv850e command line option, V850: V850 Options. (line 29)
--* -mv850e1 command line option, V850: V850 Options. (line 35)
--* -mv850e2 command line option, V850: V850 Options. (line 51)
--* -mv850e2v3 command line option, V850: V850 Options. (line 57)
--* -mv850e2v4 command line option, V850: V850 Options. (line 63)
--* -mv850e3v5 command line option, V850: V850 Options. (line 66)
--* -mvxworks-pic option, MIPS: MIPS Options. (line 26)
--* -mwarn-areg-zero option, s390: s390 Options. (line 38)
--* -mwarn-deprecated command line option, ARM: ARM Options. (line 177)
--* -mzarch option, s390: s390 Options. (line 17)
--* -N command line option, CRIS: CRIS-Opts. (line 58)
--* -nIp option, M32RX: M32R-Opts. (line 101)
--* -no-bitinst, M32R2: M32R-Opts. (line 54)
--* -no-ignore-parallel-conflicts option, M32RX: M32R-Opts. (line 93)
--* -no-mdebug command line option, Alpha: Alpha Options. (line 25)
--* -no-parallel option, M32RX: M32R-Opts. (line 51)
--* -no-relax option, i960: Options-i960. (line 66)
--* -no-warn-explicit-parallel-conflicts option, M32RX: M32R-Opts.
-- (line 79)
--* -no-warn-unmatched-high option, M32R: M32R-Opts. (line 111)
--* -nocpp ignored (MIPS): MIPS Options. (line 241)
--* -noreplace command line option, Alpha: Alpha Options. (line 40)
--* -o: o. (line 6)
--* -O option, M32RX: M32R-Opts. (line 59)
--* -parallel option, M32RX: M32R-Opts. (line 46)
--* -R: R. (line 6)
--* -r800 command line option, Z80: Z80 Options. (line 41)
--* -relax command line option, Alpha: Alpha Options. (line 32)
--* -replace command line option, Alpha: Alpha Options. (line 40)
--* -S, ignored on VAX: VAX-Opts. (line 11)
--* -t, ignored on VAX: VAX-Opts. (line 36)
--* -T, ignored on VAX: VAX-Opts. (line 11)
--* -v: v. (line 6)
--* -V, redundant on VAX: VAX-Opts. (line 22)
--* -version: v. (line 6)
--* -W: W. (line 11)
--* -warn-explicit-parallel-conflicts option, M32RX: M32R-Opts. (line 65)
--* -warn-unmatched-high option, M32R: M32R-Opts. (line 105)
--* -Wnp option, M32RX: M32R-Opts. (line 83)
--* -Wnuh option, M32RX: M32R-Opts. (line 117)
--* -Wp option, M32RX: M32R-Opts. (line 75)
--* -wsigned_overflow command line option, V850: V850 Options. (line 9)
--* -Wuh option, M32RX: M32R-Opts. (line 114)
--* -wunsigned_overflow command line option, V850: V850 Options.
-- (line 16)
--* -x command line option, MMIX: MMIX-Opts. (line 44)
--* -z80 command line option, Z80: Z80 Options. (line 8)
--* -z8001 command line option, Z8000: Z8000 Options. (line 6)
--* -z8002 command line option, Z8000: Z8000 Options. (line 9)
--* . (symbol): Dot. (line 6)
--* .2byte directive, ARM: ARM Directives. (line 6)
--* .4byte directive, ARM: ARM Directives. (line 6)
--* .8byte directive, ARM: ARM Directives. (line 6)
--* .align directive, ARM: ARM Directives. (line 11)
--* .align directive, TILE-Gx: TILE-Gx Directives. (line 6)
--* .align directive, TILEPro: TILEPro Directives. (line 6)
--* .allow_suspicious_bundles directive, TILE-Gx: TILE-Gx Directives.
-- (line 10)
--* .allow_suspicious_bundles directive, TILEPro: TILEPro Directives.
-- (line 10)
--* .arch directive, ARM: ARM Directives. (line 18)
--* .arch directive, TIC6X: TIC6X Directives. (line 10)
--* .arch_extension directive, ARM: ARM Directives. (line 25)
--* .arm directive, ARM: ARM Directives. (line 34)
--* .big directive, M32RX: M32R-Directives. (line 88)
--* .bss directive, AArch64: AArch64 Directives. (line 6)
--* .bss directive, ARM: ARM Directives. (line 42)
--* .c6xabi_attribute directive, TIC6X: TIC6X Directives. (line 20)
--* .cantunwind directive, ARM: ARM Directives. (line 45)
--* .cantunwind directive, TIC6X: TIC6X Directives. (line 13)
--* .code directive, ARM: ARM Directives. (line 49)
--* .cpu directive, ARM: ARM Directives. (line 53)
--* .dn and .qn directives, ARM: ARM Directives. (line 60)
--* .eabi_attribute directive, ARM: ARM Directives. (line 83)
--* .ehtype directive, TIC6X: TIC6X Directives. (line 31)
--* .endp directive, TIC6X: TIC6X Directives. (line 34)
--* .even directive, ARM: ARM Directives. (line 111)
--* .extend directive, ARM: ARM Directives. (line 114)
--* .fnend directive, ARM: ARM Directives. (line 120)
--* .fnstart directive, ARM: ARM Directives. (line 129)
--* .force_thumb directive, ARM: ARM Directives. (line 132)
--* .fpu directive, ARM: ARM Directives. (line 136)
--* .global: MIPS insn. (line 12)
--* .handlerdata directive, ARM: ARM Directives. (line 140)
--* .handlerdata directive, TIC6X: TIC6X Directives. (line 39)
--* .insn: MIPS insn. (line 6)
--* .insn directive, s390: s390 Directives. (line 11)
--* .inst directive, ARM: ARM Directives. (line 149)
--* .ldouble directive, ARM: ARM Directives. (line 114)
--* .little directive, M32RX: M32R-Directives. (line 82)
--* .long directive, s390: s390 Directives. (line 16)
--* .ltorg directive, AArch64: AArch64 Directives. (line 9)
--* .ltorg directive, ARM: ARM Directives. (line 159)
--* .ltorg directive, s390: s390 Directives. (line 88)
--* .m32r directive, M32R: M32R-Directives. (line 66)
--* .m32r2 directive, M32R2: M32R-Directives. (line 77)
--* .m32rx directive, M32RX: M32R-Directives. (line 72)
--* .machine directive, s390: s390 Directives. (line 93)
--* .machinemode directive, s390: s390 Directives. (line 103)
--* .movsp directive, ARM: ARM Directives. (line 173)
--* .nan directive, MIPS: MIPS NaN Encodings. (line 6)
--* .no_pointers directive, XStormy16: XStormy16 Directives.
-- (line 14)
--* .nocmp directive, TIC6X: TIC6X Directives. (line 47)
--* .o: Object. (line 6)
--* .object_arch directive, ARM: ARM Directives. (line 178)
--* .packed directive, ARM: ARM Directives. (line 184)
--* .pad directive, ARM: ARM Directives. (line 37)
--* .param on HPPA: HPPA Directives. (line 19)
--* .personality directive, ARM: ARM Directives. (line 194)
--* .personality directive, TIC6X: TIC6X Directives. (line 55)
--* .personalityindex directive, ARM: ARM Directives. (line 197)
--* .personalityindex directive, TIC6X: TIC6X Directives. (line 51)
--* .pool directive, AArch64: AArch64 Directives. (line 23)
--* .pool directive, ARM: ARM Directives. (line 201)
--* .quad directive, s390: s390 Directives. (line 16)
--* .req directive, AArch64: AArch64 Directives. (line 26)
--* .req directive, ARM: ARM Directives. (line 204)
--* .require_canonical_reg_names directive, TILE-Gx: TILE-Gx Directives.
-- (line 19)
--* .require_canonical_reg_names directive, TILEPro: TILEPro Directives.
-- (line 19)
--* .save directive, ARM: ARM Directives. (line 209)
--* .scomm directive, TIC6X: TIC6X Directives. (line 58)
--* .secrel32 directive, ARM: ARM Directives. (line 247)
--* .set arch=CPU: MIPS ISA. (line 18)
--* .set at: MIPS Macros. (line 42)
--* .set at=REG: MIPS Macros. (line 36)
--* .set autoextend: MIPS autoextend. (line 6)
--* .set doublefloat: MIPS Floating-Point. (line 12)
--* .set dsp: MIPS ASE Instruction Generation Overrides.
-- (line 21)
--* .set dspr2: MIPS ASE Instruction Generation Overrides.
-- (line 26)
--* .set hardfloat: MIPS Floating-Point. (line 6)
--* .set insn32: MIPS assembly options.
-- (line 6)
--* .set macro: MIPS Macros. (line 31)
--* .set mcu: MIPS ASE Instruction Generation Overrides.
-- (line 37)
--* .set mdmx: MIPS ASE Instruction Generation Overrides.
-- (line 16)
--* .set mips3d: MIPS ASE Instruction Generation Overrides.
-- (line 6)
--* .set mipsN: MIPS ISA. (line 6)
--* .set mt: MIPS ASE Instruction Generation Overrides.
-- (line 32)
--* .set noat: MIPS Macros. (line 42)
--* .set noautoextend: MIPS autoextend. (line 6)
--* .set nodsp: MIPS ASE Instruction Generation Overrides.
-- (line 21)
--* .set nodspr2: MIPS ASE Instruction Generation Overrides.
-- (line 26)
--* .set noinsn32: MIPS assembly options.
-- (line 6)
--* .set nomacro: MIPS Macros. (line 31)
--* .set nomcu: MIPS ASE Instruction Generation Overrides.
-- (line 37)
--* .set nomdmx: MIPS ASE Instruction Generation Overrides.
-- (line 16)
--* .set nomips3d: MIPS ASE Instruction Generation Overrides.
-- (line 6)
--* .set nomt: MIPS ASE Instruction Generation Overrides.
-- (line 32)
--* .set nosmartmips: MIPS ASE Instruction Generation Overrides.
-- (line 11)
--* .set nosym32: MIPS Symbol Sizes. (line 6)
--* .set novirt: MIPS ASE Instruction Generation Overrides.
-- (line 42)
--* .set pop: MIPS Option Stack. (line 6)
--* .set push: MIPS Option Stack. (line 6)
--* .set singlefloat: MIPS Floating-Point. (line 12)
--* .set smartmips: MIPS ASE Instruction Generation Overrides.
-- (line 11)
--* .set softfloat: MIPS Floating-Point. (line 6)
--* .set sym32: MIPS Symbol Sizes. (line 6)
--* .set virt: MIPS ASE Instruction Generation Overrides.
-- (line 42)
--* .setfp directive, ARM: ARM Directives. (line 233)
--* .short directive, s390: s390 Directives. (line 16)
--* .syntax directive, ARM: ARM Directives. (line 252)
--* .thumb directive, ARM: ARM Directives. (line 256)
--* .thumb_func directive, ARM: ARM Directives. (line 259)
--* .thumb_set directive, ARM: ARM Directives. (line 270)
--* .tlsdescseq directive, ARM: ARM Directives. (line 277)
--* .unreq directive, AArch64: AArch64 Directives. (line 31)
--* .unreq directive, ARM: ARM Directives. (line 282)
--* .unwind_raw directive, ARM: ARM Directives. (line 293)
--* .v850 directive, V850: V850 Directives. (line 14)
--* .v850e directive, V850: V850 Directives. (line 20)
--* .v850e1 directive, V850: V850 Directives. (line 26)
--* .v850e2 directive, V850: V850 Directives. (line 32)
--* .v850e2v3 directive, V850: V850 Directives. (line 38)
--* .v850e2v4 directive, V850: V850 Directives. (line 44)
--* .v850e3v5 directive, V850: V850 Directives. (line 50)
--* .vsave directive, ARM: ARM Directives. (line 300)
--* .z8001: Z8000 Directives. (line 11)
--* .z8002: Z8000 Directives. (line 15)
--* 16-bit code, i386: i386-16bit. (line 6)
--* 16bit_pointers directive, XStormy16: XStormy16 Directives.
-- (line 6)
--* 16byte directive, Nios II: Nios II Directives. (line 28)
--* 2byte directive, ARC: ARC Directives. (line 9)
--* 2byte directive, Nios II: Nios II Directives. (line 19)
--* 32bit_pointers directive, XStormy16: XStormy16 Directives.
-- (line 10)
--* 3byte directive, ARC: ARC Directives. (line 12)
--* 3DNow!, i386: i386-SIMD. (line 6)
--* 3DNow!, x86-64: i386-SIMD. (line 6)
--* 430 support: MSP430-Dependent. (line 6)
--* 4byte directive, ARC: ARC Directives. (line 15)
--* 4byte directive, Nios II: Nios II Directives. (line 22)
--* 8byte directive, Nios II: Nios II Directives. (line 25)
--* : (label): Statements. (line 31)
--* @hi pseudo-op, XStormy16: XStormy16 Opcodes. (line 21)
--* @lo pseudo-op, XStormy16: XStormy16 Opcodes. (line 10)
--* @word modifier, D10V: D10V-Word. (line 6)
--* \" (doublequote character): Strings. (line 43)
--* \\ (\ character): Strings. (line 40)
--* \b (backspace character): Strings. (line 15)
--* \DDD (octal character code): Strings. (line 30)
--* \f (formfeed character): Strings. (line 18)
--* \n (newline character): Strings. (line 21)
--* \r (carriage return character): Strings. (line 24)
--* \t (tab): Strings. (line 27)
--* \XD... (hex character code): Strings. (line 36)
--* _ opcode prefix: Xtensa Opcodes. (line 9)
--* a.out: Object. (line 6)
--* a.out symbol attributes: a.out Symbols. (line 6)
--* A_DIR environment variable, TIC54X: TIC54X-Env. (line 6)
--* AArch64 floating point (IEEE): AArch64 Floating Point.
-- (line 6)
--* AArch64 immediate character: AArch64-Chars. (line 13)
--* AArch64 line comment character: AArch64-Chars. (line 6)
--* AArch64 line separator: AArch64-Chars. (line 10)
--* AArch64 machine directives: AArch64 Directives. (line 6)
--* AArch64 opcodes: AArch64 Opcodes. (line 6)
--* AArch64 options (none): AArch64 Options. (line 6)
--* AArch64 register names: AArch64-Regs. (line 6)
--* AArch64 relocations: AArch64-Relocations. (line 6)
--* AArch64 support: AArch64-Dependent. (line 6)
--* ABI options, SH64: SH64 Options. (line 29)
--* abort directive: Abort. (line 6)
--* ABORT directive: ABORT (COFF). (line 6)
--* absolute section: Ld Sections. (line 29)
--* absolute-literals directive: Absolute Literals Directive.
-- (line 6)
--* ADDI instructions, relaxation: Xtensa Immediate Relaxation.
-- (line 43)
--* addition, permitted arguments: Infix Ops. (line 44)
--* addresses: Expressions. (line 6)
--* addresses, format of: Secs Background. (line 68)
--* addressing modes, D10V: D10V-Addressing. (line 6)
--* addressing modes, D30V: D30V-Addressing. (line 6)
--* addressing modes, H8/300: H8/300-Addressing. (line 6)
--* addressing modes, M680x0: M68K-Syntax. (line 21)
--* addressing modes, M68HC11: M68HC11-Syntax. (line 30)
--* addressing modes, SH: SH-Addressing. (line 6)
--* addressing modes, SH64: SH64-Addressing. (line 6)
--* addressing modes, XGATE: XGATE-Syntax. (line 29)
--* addressing modes, Z8000: Z8000-Addressing. (line 6)
--* ADR reg,<label> pseudo op, ARM: ARM Opcodes. (line 25)
--* ADRL reg,<label> pseudo op, ARM: ARM Opcodes. (line 35)
--* ADRP, ADD, LDR/STR group relocations, AArch64: AArch64-Relocations.
-- (line 14)
--* advancing location counter: Org. (line 6)
--* align directive: Align. (line 6)
--* align directive, Nios II: Nios II Directives. (line 6)
--* align directive, SPARC: Sparc-Directives. (line 9)
--* align directive, TIC54X: TIC54X-Directives. (line 6)
--* aligned instruction bundle: Bundle directives. (line 6)
--* alignment for NEON instructions: ARM-Neon-Alignment. (line 6)
--* alignment of branch targets: Xtensa Automatic Alignment.
-- (line 6)
--* alignment of LOOP instructions: Xtensa Automatic Alignment.
-- (line 6)
--* Alpha floating point (IEEE): Alpha Floating Point.
-- (line 6)
--* Alpha line comment character: Alpha-Chars. (line 6)
--* Alpha line separator: Alpha-Chars. (line 11)
--* Alpha notes: Alpha Notes. (line 6)
--* Alpha options: Alpha Options. (line 6)
--* Alpha registers: Alpha-Regs. (line 6)
--* Alpha relocations: Alpha-Relocs. (line 6)
--* Alpha support: Alpha-Dependent. (line 6)
--* Alpha Syntax: Alpha Options. (line 61)
--* Alpha-only directives: Alpha Directives. (line 10)
--* Altera Nios II support: NiosII-Dependent. (line 6)
--* altered difference tables: Word. (line 12)
--* alternate syntax for the 680x0: M68K-Moto-Syntax. (line 6)
--* ARC floating point (IEEE): ARC Floating Point. (line 6)
--* ARC line comment character: ARC-Chars. (line 6)
--* ARC line separator: ARC-Chars. (line 12)
--* ARC machine directives: ARC Directives. (line 6)
--* ARC opcodes: ARC Opcodes. (line 6)
--* ARC options (none): ARC Options. (line 6)
--* ARC register names: ARC-Regs. (line 6)
--* ARC support: ARC-Dependent. (line 6)
--* arc5 arc5, ARC: ARC Options. (line 10)
--* arc6 arc6, ARC: ARC Options. (line 13)
--* arc7 arc7, ARC: ARC Options. (line 21)
--* arc8 arc8, ARC: ARC Options. (line 24)
--* arch directive, i386: i386-Arch. (line 6)
--* arch directive, M680x0: M68K-Directives. (line 22)
--* arch directive, MSP 430: MSP430 Directives. (line 18)
--* arch directive, x86-64: i386-Arch. (line 6)
--* architecture options, i960: Options-i960. (line 6)
--* architecture options, IP2022: IP2K-Opts. (line 9)
--* architecture options, IP2K: IP2K-Opts. (line 14)
--* architecture options, M16C: M32C-Opts. (line 12)
--* architecture options, M32C: M32C-Opts. (line 9)
--* architecture options, M32R: M32R-Opts. (line 21)
--* architecture options, M32R2: M32R-Opts. (line 17)
--* architecture options, M32RX: M32R-Opts. (line 9)
--* architecture options, M680x0: M68K-Opts. (line 98)
--* Architecture variant option, CRIS: CRIS-Opts. (line 34)
--* architectures, Meta: Meta Options. (line 6)
--* architectures, PowerPC: PowerPC-Opts. (line 6)
--* architectures, SCORE: SCORE-Opts. (line 6)
--* architectures, SPARC: Sparc-Opts. (line 6)
--* arguments for addition: Infix Ops. (line 44)
--* arguments for subtraction: Infix Ops. (line 49)
--* arguments in expressions: Arguments. (line 6)
--* arithmetic functions: Operators. (line 6)
--* arithmetic operands: Arguments. (line 6)
--* ARM data relocations: ARM-Relocations. (line 6)
--* ARM floating point (IEEE): ARM Floating Point. (line 6)
--* ARM identifiers: ARM-Chars. (line 19)
--* ARM immediate character: ARM-Chars. (line 17)
--* ARM line comment character: ARM-Chars. (line 6)
--* ARM line separator: ARM-Chars. (line 14)
--* ARM machine directives: ARM Directives. (line 6)
--* ARM opcodes: ARM Opcodes. (line 6)
--* ARM options (none): ARM Options. (line 6)
--* ARM register names: ARM-Regs. (line 6)
--* ARM support: ARM-Dependent. (line 6)
--* ascii directive: Ascii. (line 6)
--* asciz directive: Asciz. (line 6)
--* asg directive, TIC54X: TIC54X-Directives. (line 20)
--* assembler bugs, reporting: Bug Reporting. (line 6)
--* assembler crash: Bug Criteria. (line 9)
--* assembler directive .3byte, RX: RX-Directives. (line 9)
--* assembler directive .arch, CRIS: CRIS-Pseudos. (line 45)
--* assembler directive .dword, CRIS: CRIS-Pseudos. (line 12)
--* assembler directive .far, M68HC11: M68HC11-Directives. (line 20)
--* assembler directive .fetchalign, RX: RX-Directives. (line 13)
--* assembler directive .interrupt, M68HC11: M68HC11-Directives.
-- (line 26)
--* assembler directive .mode, M68HC11: M68HC11-Directives. (line 16)
--* assembler directive .relax, M68HC11: M68HC11-Directives. (line 10)
--* assembler directive .syntax, CRIS: CRIS-Pseudos. (line 17)
--* assembler directive .xrefb, M68HC11: M68HC11-Directives. (line 31)
--* assembler directive BSPEC, MMIX: MMIX-Pseudos. (line 131)
--* assembler directive BYTE, MMIX: MMIX-Pseudos. (line 97)
--* assembler directive ESPEC, MMIX: MMIX-Pseudos. (line 131)
--* assembler directive GREG, MMIX: MMIX-Pseudos. (line 50)
--* assembler directive IS, MMIX: MMIX-Pseudos. (line 42)
--* assembler directive LOC, MMIX: MMIX-Pseudos. (line 7)
--* assembler directive LOCAL, MMIX: MMIX-Pseudos. (line 28)
--* assembler directive OCTA, MMIX: MMIX-Pseudos. (line 108)
--* assembler directive PREFIX, MMIX: MMIX-Pseudos. (line 120)
--* assembler directive TETRA, MMIX: MMIX-Pseudos. (line 108)
--* assembler directive WYDE, MMIX: MMIX-Pseudos. (line 108)
--* assembler directives, CRIS: CRIS-Pseudos. (line 6)
--* assembler directives, M68HC11: M68HC11-Directives. (line 6)
--* assembler directives, M68HC12: M68HC11-Directives. (line 6)
--* assembler directives, MMIX: MMIX-Pseudos. (line 6)
--* assembler directives, RL78: RL78-Directives. (line 6)
--* assembler directives, RX: RX-Directives. (line 6)
--* assembler directives, XGATE: XGATE-Directives. (line 6)
--* assembler internal logic error: As Sections. (line 13)
--* assembler version: v. (line 6)
--* assembler, and linker: Secs Background. (line 10)
--* assembly listings, enabling: a. (line 6)
--* assigning values to symbols <1>: Equ. (line 6)
--* assigning values to symbols: Setting Symbols. (line 6)
--* at register, MIPS: MIPS Macros. (line 36)
--* atmp directive, i860: Directives-i860. (line 16)
--* att_syntax pseudo op, i386: i386-Variations. (line 6)
--* att_syntax pseudo op, x86-64: i386-Variations. (line 6)
--* attributes, symbol: Symbol Attributes. (line 6)
--* auxiliary attributes, COFF symbols: COFF Symbols. (line 19)
--* auxiliary symbol information, COFF: Dim. (line 6)
--* AVR line comment character: AVR-Chars. (line 6)
--* AVR line separator: AVR-Chars. (line 14)
--* AVR modifiers: AVR-Modifiers. (line 6)
--* AVR opcode summary: AVR Opcodes. (line 6)
--* AVR options (none): AVR Options. (line 6)
--* AVR register names: AVR-Regs. (line 6)
--* AVR support: AVR-Dependent. (line 6)
--* backslash (\\): Strings. (line 40)
--* backspace (\b): Strings. (line 15)
--* balign directive: Balign. (line 6)
--* balignl directive: Balign. (line 27)
--* balignw directive: Balign. (line 27)
--* bes directive, TIC54X: TIC54X-Directives. (line 196)
--* big endian output, MIPS: Overview. (line 740)
--* big endian output, PJ: Overview. (line 643)
--* big-endian output, MIPS: MIPS Options. (line 13)
--* big-endian output, TIC6X: TIC6X Options. (line 46)
--* bignums: Bignums. (line 6)
--* binary constants, TIC54X: TIC54X-Constants. (line 8)
--* binary files, including: Incbin. (line 6)
--* binary integers: Integers. (line 6)
--* bit names, IA-64: IA-64-Bits. (line 6)
--* bitfields, not supported on VAX: VAX-no. (line 6)
--* Blackfin directives: Blackfin Directives. (line 6)
--* Blackfin options (none): Blackfin Options. (line 6)
--* Blackfin support: Blackfin-Dependent. (line 6)
--* Blackfin syntax: Blackfin Syntax. (line 6)
--* block: Z8000 Directives. (line 55)
--* BMI, i386: i386-BMI. (line 6)
--* BMI, x86-64: i386-BMI. (line 6)
--* branch improvement, M680x0: M68K-Branch. (line 6)
--* branch improvement, M68HC11: M68HC11-Branch. (line 6)
--* branch improvement, VAX: VAX-branch. (line 6)
--* branch instructions, relaxation: Xtensa Branch Relaxation.
-- (line 6)
--* branch recording, i960: Options-i960. (line 22)
--* branch statistics table, i960: Options-i960. (line 40)
--* branch target alignment: Xtensa Automatic Alignment.
-- (line 6)
--* break directive, TIC54X: TIC54X-Directives. (line 143)
--* BSD syntax: PDP-11-Syntax. (line 6)
--* bss directive, i960: Directives-i960. (line 6)
--* bss directive, TIC54X: TIC54X-Directives. (line 29)
--* bss section <1>: Ld Sections. (line 20)
--* bss section: bss. (line 6)
--* bug criteria: Bug Criteria. (line 6)
--* bug reports: Bug Reporting. (line 6)
--* bugs in assembler: Reporting Bugs. (line 6)
--* Built-in symbols, CRIS: CRIS-Symbols. (line 6)
--* builtin math functions, TIC54X: TIC54X-Builtins. (line 6)
--* builtin subsym functions, TIC54X: TIC54X-Macros. (line 16)
--* bundle: Bundle directives. (line 6)
--* bundle-locked: Bundle directives. (line 35)
--* bundle_align_mode directive: Bundle directives. (line 6)
--* bundle_lock directive: Bundle directives. (line 28)
--* bundle_unlock directive: Bundle directives. (line 28)
--* bus lock prefixes, i386: i386-Prefixes. (line 36)
--* bval: Z8000 Directives. (line 30)
--* byte directive: Byte. (line 6)
--* byte directive, TIC54X: TIC54X-Directives. (line 36)
--* C54XDSP_DIR environment variable, TIC54X: TIC54X-Env. (line 6)
--* c_mode directive, TIC54X: TIC54X-Directives. (line 51)
--* call directive, Nios II: Nios II Relocations. (line 38)
--* call instructions, i386: i386-Mnemonics. (line 56)
--* call instructions, relaxation: Xtensa Call Relaxation.
-- (line 6)
--* call instructions, x86-64: i386-Mnemonics. (line 56)
--* callj, i960 pseudo-opcode: callj-i960. (line 6)
--* carriage return (\r): Strings. (line 24)
--* case sensitivity, Z80: Z80-Case. (line 6)
--* cfi_endproc directive: CFI directives. (line 26)
--* cfi_sections directive: CFI directives. (line 6)
--* cfi_startproc directive: CFI directives. (line 16)
--* char directive, TIC54X: TIC54X-Directives. (line 36)
--* character constant, Z80: Z80-Chars. (line 20)
--* character constants: Characters. (line 6)
--* character escape codes: Strings. (line 15)
--* character escapes, Z80: Z80-Chars. (line 18)
--* character, single: Chars. (line 6)
--* characters used in symbols: Symbol Intro. (line 6)
--* clink directive, TIC54X: TIC54X-Directives. (line 45)
--* code16 directive, i386: i386-16bit. (line 6)
--* code16gcc directive, i386: i386-16bit. (line 6)
--* code32 directive, i386: i386-16bit. (line 6)
--* code64 directive, i386: i386-16bit. (line 6)
--* code64 directive, x86-64: i386-16bit. (line 6)
--* COFF auxiliary symbol information: Dim. (line 6)
--* COFF structure debugging: Tag. (line 6)
--* COFF symbol attributes: COFF Symbols. (line 6)
--* COFF symbol descriptor: Desc. (line 6)
--* COFF symbol storage class: Scl. (line 6)
--* COFF symbol type: Type. (line 11)
--* COFF symbols, debugging: Def. (line 6)
--* COFF value attribute: Val. (line 6)
--* COMDAT: Linkonce. (line 6)
--* comm directive: Comm. (line 6)
--* command line conventions: Command Line. (line 6)
--* command line options, V850: V850 Options. (line 9)
--* command-line options ignored, VAX: VAX-Opts. (line 6)
--* comment character, XStormy16: XStormy16-Chars. (line 11)
--* comments: Comments. (line 6)
--* comments, M680x0: M68K-Chars. (line 6)
--* comments, removed by preprocessor: Preprocessing. (line 11)
--* common directive, SPARC: Sparc-Directives. (line 12)
--* common sections: Linkonce. (line 6)
--* common variable storage: bss. (line 6)
--* compare and jump expansions, i960: Compare-and-branch-i960.
-- (line 13)
--* compare/branch instructions, i960: Compare-and-branch-i960.
-- (line 6)
--* comparison expressions: Infix Ops. (line 55)
--* conditional assembly: If. (line 6)
--* constant, single character: Chars. (line 6)
--* constants: Constants. (line 6)
--* constants, bignum: Bignums. (line 6)
--* constants, character: Characters. (line 6)
--* constants, converted by preprocessor: Preprocessing. (line 14)
--* constants, floating point: Flonums. (line 6)
--* constants, integer: Integers. (line 6)
--* constants, number: Numbers. (line 6)
--* constants, Sparc: Sparc-Constants. (line 6)
--* constants, string: Strings. (line 6)
--* constants, TIC54X: TIC54X-Constants. (line 6)
--* conversion instructions, i386: i386-Mnemonics. (line 37)
--* conversion instructions, x86-64: i386-Mnemonics. (line 37)
--* coprocessor wait, i386: i386-Prefixes. (line 40)
--* copy directive, TIC54X: TIC54X-Directives. (line 54)
--* cpu directive, M680x0: M68K-Directives. (line 30)
--* cpu directive, MSP 430: MSP430 Directives. (line 22)
--* CR16 line comment character: CR16-Chars. (line 6)
--* CR16 line separator: CR16-Chars. (line 13)
--* CR16 Operand Qualifiers: CR16 Operand Qualifiers.
-- (line 6)
--* CR16 support: CR16-Dependent. (line 6)
--* crash of assembler: Bug Criteria. (line 9)
--* CRIS --emulation=crisaout command line option: CRIS-Opts. (line 9)
--* CRIS --emulation=criself command line option: CRIS-Opts. (line 9)
--* CRIS --march=ARCHITECTURE command line option: CRIS-Opts. (line 34)
--* CRIS --mul-bug-abort command line option: CRIS-Opts. (line 62)
--* CRIS --no-mul-bug-abort command line option: CRIS-Opts. (line 62)
--* CRIS --no-underscore command line option: CRIS-Opts. (line 15)
--* CRIS --pic command line option: CRIS-Opts. (line 27)
--* CRIS --underscore command line option: CRIS-Opts. (line 15)
--* CRIS -N command line option: CRIS-Opts. (line 58)
--* CRIS architecture variant option: CRIS-Opts. (line 34)
--* CRIS assembler directive .arch: CRIS-Pseudos. (line 45)
--* CRIS assembler directive .dword: CRIS-Pseudos. (line 12)
--* CRIS assembler directive .syntax: CRIS-Pseudos. (line 17)
--* CRIS assembler directives: CRIS-Pseudos. (line 6)
--* CRIS built-in symbols: CRIS-Symbols. (line 6)
--* CRIS instruction expansion: CRIS-Expand. (line 6)
--* CRIS line comment characters: CRIS-Chars. (line 6)
--* CRIS options: CRIS-Opts. (line 6)
--* CRIS position-independent code: CRIS-Opts. (line 27)
--* CRIS pseudo-op .arch: CRIS-Pseudos. (line 45)
--* CRIS pseudo-op .dword: CRIS-Pseudos. (line 12)
--* CRIS pseudo-op .syntax: CRIS-Pseudos. (line 17)
--* CRIS pseudo-ops: CRIS-Pseudos. (line 6)
--* CRIS register names: CRIS-Regs. (line 6)
--* CRIS support: CRIS-Dependent. (line 6)
--* CRIS symbols in position-independent code: CRIS-Pic. (line 6)
--* ctbp register, V850: V850-Regs. (line 131)
--* ctoff pseudo-op, V850: V850 Opcodes. (line 111)
--* ctpc register, V850: V850-Regs. (line 119)
--* ctpsw register, V850: V850-Regs. (line 122)
--* current address: Dot. (line 6)
--* current address, advancing: Org. (line 6)
--* D10V @word modifier: D10V-Word. (line 6)
--* D10V addressing modes: D10V-Addressing. (line 6)
--* D10V floating point: D10V-Float. (line 6)
--* D10V line comment character: D10V-Chars. (line 6)
--* D10V opcode summary: D10V-Opcodes. (line 6)
--* D10V optimization: Overview. (line 503)
--* D10V options: D10V-Opts. (line 6)
--* D10V registers: D10V-Regs. (line 6)
--* D10V size modifiers: D10V-Size. (line 6)
--* D10V sub-instruction ordering: D10V-Chars. (line 14)
--* D10V sub-instructions: D10V-Subs. (line 6)
--* D10V support: D10V-Dependent. (line 6)
--* D10V syntax: D10V-Syntax. (line 6)
--* D30V addressing modes: D30V-Addressing. (line 6)
--* D30V floating point: D30V-Float. (line 6)
--* D30V Guarded Execution: D30V-Guarded. (line 6)
--* D30V line comment character: D30V-Chars. (line 6)
--* D30V nops: Overview. (line 511)
--* D30V nops after 32-bit multiply: Overview. (line 514)
--* D30V opcode summary: D30V-Opcodes. (line 6)
--* D30V optimization: Overview. (line 508)
--* D30V options: D30V-Opts. (line 6)
--* D30V registers: D30V-Regs. (line 6)
--* D30V size modifiers: D30V-Size. (line 6)
--* D30V sub-instruction ordering: D30V-Chars. (line 14)
--* D30V sub-instructions: D30V-Subs. (line 6)
--* D30V support: D30V-Dependent. (line 6)
--* D30V syntax: D30V-Syntax. (line 6)
--* data alignment on SPARC: Sparc-Aligned-Data. (line 6)
--* data and text sections, joining: R. (line 6)
--* data directive: Data. (line 6)
--* data directive, TIC54X: TIC54X-Directives. (line 61)
--* data relocations, ARM: ARM-Relocations. (line 6)
--* data section: Ld Sections. (line 9)
--* data1 directive, M680x0: M68K-Directives. (line 9)
--* data2 directive, M680x0: M68K-Directives. (line 12)
--* datalabel, SH64: SH64-Addressing. (line 16)
--* dbpc register, V850: V850-Regs. (line 125)
--* dbpsw register, V850: V850-Regs. (line 128)
--* debuggers, and symbol order: Symbols. (line 10)
--* debugging COFF symbols: Def. (line 6)
--* DEC syntax: PDP-11-Syntax. (line 6)
--* decimal integers: Integers. (line 12)
--* def directive: Def. (line 6)
--* def directive, TIC54X: TIC54X-Directives. (line 103)
--* density instructions: Density Instructions.
-- (line 6)
--* dependency tracking: MD. (line 6)
--* deprecated directives: Deprecated. (line 6)
--* desc directive: Desc. (line 6)
--* descriptor, of a.out symbol: Symbol Desc. (line 6)
--* dfloat directive, VAX: VAX-directives. (line 10)
--* difference tables altered: Word. (line 12)
--* difference tables, warning: K. (line 6)
--* differences, mmixal: MMIX-mmixal. (line 6)
--* dim directive: Dim. (line 6)
--* directives and instructions: Statements. (line 20)
--* directives for PowerPC: PowerPC-Pseudo. (line 6)
--* directives for SCORE: SCORE-Pseudo. (line 6)
--* directives, Blackfin: Blackfin Directives. (line 6)
--* directives, M32R: M32R-Directives. (line 6)
--* directives, M680x0: M68K-Directives. (line 6)
--* directives, machine independent: Pseudo Ops. (line 6)
--* directives, Xtensa: Xtensa Directives. (line 6)
--* directives, Z8000: Z8000 Directives. (line 6)
--* Disable floating-point instructions: MIPS Floating-Point. (line 6)
--* Disable single-precision floating-point operations: MIPS Floating-Point.
-- (line 12)
--* displacement sizing character, VAX: VAX-operands. (line 12)
--* dollar local symbols: Symbol Names. (line 110)
--* dot (symbol): Dot. (line 6)
--* double directive: Double. (line 6)
--* double directive, i386: i386-Float. (line 14)
--* double directive, M680x0: M68K-Float. (line 14)
--* double directive, M68HC11: M68HC11-Float. (line 14)
--* double directive, RX: RX-Float. (line 11)
--* double directive, TIC54X: TIC54X-Directives. (line 64)
--* double directive, VAX: VAX-float. (line 15)
--* double directive, x86-64: i386-Float. (line 14)
--* double directive, XGATE: XGATE-Float. (line 13)
--* doublequote (\"): Strings. (line 43)
--* drlist directive, TIC54X: TIC54X-Directives. (line 73)
--* drnolist directive, TIC54X: TIC54X-Directives. (line 73)
--* dual directive, i860: Directives-i860. (line 6)
--* dword directive, Nios II: Nios II Directives. (line 16)
--* EB command line option, Nios II: Nios II Options. (line 23)
--* ecr register, V850: V850-Regs. (line 113)
--* eight-byte integer: Quad. (line 9)
--* eipc register, V850: V850-Regs. (line 101)
--* eipsw register, V850: V850-Regs. (line 104)
--* eject directive: Eject. (line 6)
--* EL command line option, Nios II: Nios II Options. (line 26)
--* ELF symbol type: Type. (line 22)
--* else directive: Else. (line 6)
--* elseif directive: Elseif. (line 6)
--* empty expressions: Empty Exprs. (line 6)
--* emsg directive, TIC54X: TIC54X-Directives. (line 77)
--* emulation: Overview. (line 876)
--* encoding options, i386: i386-Mnemonics. (line 32)
--* encoding options, x86-64: i386-Mnemonics. (line 32)
--* end directive: End. (line 6)
--* enddual directive, i860: Directives-i860. (line 11)
--* endef directive: Endef. (line 6)
--* endfunc directive: Endfunc. (line 6)
--* endianness, MIPS: Overview. (line 740)
--* endianness, PJ: Overview. (line 643)
--* endif directive: Endif. (line 6)
--* endloop directive, TIC54X: TIC54X-Directives. (line 143)
--* endm directive: Macro. (line 138)
--* endm directive, TIC54X: TIC54X-Directives. (line 153)
--* endstruct directive, TIC54X: TIC54X-Directives. (line 216)
--* endunion directive, TIC54X: TIC54X-Directives. (line 250)
--* environment settings, TIC54X: TIC54X-Env. (line 6)
--* EOF, newline must precede: Statements. (line 14)
--* ep register, V850: V850-Regs. (line 95)
--* Epiphany line comment character: Epiphany-Chars. (line 6)
--* Epiphany line separator: Epiphany-Chars. (line 14)
--* Epiphany options: Epiphany Options. (line 6)
--* Epiphany support: Epiphany-Dependent. (line 6)
--* equ directive: Equ. (line 6)
--* equ directive, TIC54X: TIC54X-Directives. (line 191)
--* equiv directive: Equiv. (line 6)
--* eqv directive: Eqv. (line 6)
--* err directive: Err. (line 6)
--* error directive: Error. (line 6)
--* error messages: Errors. (line 6)
--* error on valid input: Bug Criteria. (line 12)
--* errors, caused by warnings: W. (line 16)
--* errors, continuing after: Z. (line 6)
--* ESA/390 floating point (IEEE): ESA/390 Floating Point.
-- (line 6)
--* ESA/390 support: ESA/390-Dependent. (line 6)
--* ESA/390 Syntax: ESA/390 Options. (line 8)
--* ESA/390-only directives: ESA/390 Directives. (line 12)
--* escape codes, character: Strings. (line 15)
--* eval directive, TIC54X: TIC54X-Directives. (line 24)
--* even: Z8000 Directives. (line 58)
--* even directive, M680x0: M68K-Directives. (line 15)
--* even directive, TIC54X: TIC54X-Directives. (line 6)
--* exitm directive: Macro. (line 141)
--* expr (internal section): As Sections. (line 17)
--* expression arguments: Arguments. (line 6)
--* expressions: Expressions. (line 6)
--* expressions, comparison: Infix Ops. (line 55)
--* expressions, empty: Empty Exprs. (line 6)
--* expressions, integer: Integer Exprs. (line 6)
--* extAuxRegister directive, ARC: ARC Directives. (line 18)
--* extCondCode directive, ARC: ARC Directives. (line 41)
--* extCoreRegister directive, ARC: ARC Directives. (line 53)
--* extend directive M680x0: M68K-Float. (line 17)
--* extend directive M68HC11: M68HC11-Float. (line 17)
--* extend directive XGATE: XGATE-Float. (line 16)
--* extended directive, i960: Directives-i960. (line 13)
--* extern directive: Extern. (line 6)
--* extInstruction directive, ARC: ARC Directives. (line 78)
--* fail directive: Fail. (line 6)
--* far_mode directive, TIC54X: TIC54X-Directives. (line 82)
--* faster processing (-f): f. (line 6)
--* fatal signal: Bug Criteria. (line 9)
--* fclist directive, TIC54X: TIC54X-Directives. (line 87)
--* fcnolist directive, TIC54X: TIC54X-Directives. (line 87)
--* fepc register, V850: V850-Regs. (line 107)
--* fepsw register, V850: V850-Regs. (line 110)
--* ffloat directive, VAX: VAX-directives. (line 14)
--* field directive, TIC54X: TIC54X-Directives. (line 91)
--* file directive: File. (line 6)
--* file directive, MSP 430: MSP430 Directives. (line 6)
--* file name, logical: File. (line 13)
--* files, including: Include. (line 6)
--* files, input: Input Files. (line 6)
--* fill directive: Fill. (line 6)
--* filling memory <1>: Skip. (line 6)
--* filling memory: Space. (line 6)
--* FLIX syntax: Xtensa Syntax. (line 6)
--* float directive: Float. (line 6)
--* float directive, i386: i386-Float. (line 14)
--* float directive, M680x0: M68K-Float. (line 11)
--* float directive, M68HC11: M68HC11-Float. (line 11)
--* float directive, RX: RX-Float. (line 8)
--* float directive, TIC54X: TIC54X-Directives. (line 64)
--* float directive, VAX: VAX-float. (line 15)
--* float directive, x86-64: i386-Float. (line 14)
--* float directive, XGATE: XGATE-Float. (line 10)
--* floating point numbers: Flonums. (line 6)
--* floating point numbers (double): Double. (line 6)
--* floating point numbers (single) <1>: Float. (line 6)
--* floating point numbers (single): Single. (line 6)
--* floating point, AArch64 (IEEE): AArch64 Floating Point.
-- (line 6)
--* floating point, Alpha (IEEE): Alpha Floating Point.
-- (line 6)
--* floating point, ARC (IEEE): ARC Floating Point. (line 6)
--* floating point, ARM (IEEE): ARM Floating Point. (line 6)
--* floating point, D10V: D10V-Float. (line 6)
--* floating point, D30V: D30V-Float. (line 6)
--* floating point, ESA/390 (IEEE): ESA/390 Floating Point.
-- (line 6)
--* floating point, H8/300 (IEEE): H8/300 Floating Point.
-- (line 6)
--* floating point, HPPA (IEEE): HPPA Floating Point. (line 6)
--* floating point, i386: i386-Float. (line 6)
--* floating point, i960 (IEEE): Floating Point-i960. (line 6)
--* floating point, M680x0: M68K-Float. (line 6)
--* floating point, M68HC11: M68HC11-Float. (line 6)
--* floating point, MSP 430 (IEEE): MSP430 Floating Point.
-- (line 6)
--* floating point, RX: RX-Float. (line 6)
--* floating point, s390: s390 Floating Point. (line 6)
--* floating point, SH (IEEE): SH Floating Point. (line 6)
--* floating point, SPARC (IEEE): Sparc-Float. (line 6)
--* floating point, V850 (IEEE): V850 Floating Point. (line 6)
--* floating point, VAX: VAX-float. (line 6)
--* floating point, x86-64: i386-Float. (line 6)
--* floating point, XGATE: XGATE-Float. (line 6)
--* floating point, Z80: Z80 Floating Point. (line 6)
--* flonums: Flonums. (line 6)
--* format of error messages: Errors. (line 24)
--* format of warning messages: Errors. (line 12)
--* formfeed (\f): Strings. (line 18)
--* func directive: Func. (line 6)
--* functions, in expressions: Operators. (line 6)
--* gbr960, i960 postprocessor: Options-i960. (line 40)
--* gfloat directive, VAX: VAX-directives. (line 18)
--* global: Z8000 Directives. (line 21)
--* global directive: Global. (line 6)
--* global directive, TIC54X: TIC54X-Directives. (line 103)
--* got directive, Nios II: Nios II Relocations. (line 38)
--* gotoff directive, Nios II: Nios II Relocations. (line 38)
--* gotoff_hiadj directive, Nios II: Nios II Relocations. (line 38)
--* gotoff_lo directive, Nios II: Nios II Relocations. (line 38)
--* gp register, MIPS: MIPS Small Data. (line 6)
--* gp register, V850: V850-Regs. (line 17)
--* gprel directive, Nios II: Nios II Relocations. (line 26)
--* grouping data: Sub-Sections. (line 6)
--* H8/300 addressing modes: H8/300-Addressing. (line 6)
--* H8/300 floating point (IEEE): H8/300 Floating Point.
-- (line 6)
--* H8/300 line comment character: H8/300-Chars. (line 6)
--* H8/300 line separator: H8/300-Chars. (line 8)
--* H8/300 machine directives (none): H8/300 Directives. (line 6)
--* H8/300 opcode summary: H8/300 Opcodes. (line 6)
--* H8/300 options: H8/300 Options. (line 6)
--* H8/300 registers: H8/300-Regs. (line 6)
--* H8/300 size suffixes: H8/300 Opcodes. (line 163)
--* H8/300 support: H8/300-Dependent. (line 6)
--* H8/300H, assembling for: H8/300 Directives. (line 8)
--* half directive, ARC: ARC Directives. (line 153)
--* half directive, Nios II: Nios II Directives. (line 10)
--* half directive, SPARC: Sparc-Directives. (line 17)
--* half directive, TIC54X: TIC54X-Directives. (line 111)
--* hex character code (\XD...): Strings. (line 36)
--* hexadecimal integers: Integers. (line 15)
--* hexadecimal prefix, Z80: Z80-Chars. (line 15)
--* hfloat directive, VAX: VAX-directives. (line 22)
--* hi directive, Nios II: Nios II Relocations. (line 20)
--* hi pseudo-op, V850: V850 Opcodes. (line 33)
--* hi0 pseudo-op, V850: V850 Opcodes. (line 10)
--* hiadj directive, Nios II: Nios II Relocations. (line 6)
--* hidden directive: Hidden. (line 6)
--* high directive, M32R: M32R-Directives. (line 18)
--* hilo pseudo-op, V850: V850 Opcodes. (line 55)
--* HPPA directives not supported: HPPA Directives. (line 11)
--* HPPA floating point (IEEE): HPPA Floating Point. (line 6)
--* HPPA Syntax: HPPA Options. (line 8)
--* HPPA-only directives: HPPA Directives. (line 24)
--* hword directive: hword. (line 6)
--* i370 support: ESA/390-Dependent. (line 6)
--* i386 16-bit code: i386-16bit. (line 6)
--* i386 arch directive: i386-Arch. (line 6)
--* i386 att_syntax pseudo op: i386-Variations. (line 6)
--* i386 conversion instructions: i386-Mnemonics. (line 37)
--* i386 floating point: i386-Float. (line 6)
--* i386 immediate operands: i386-Variations. (line 15)
--* i386 instruction naming: i386-Mnemonics. (line 6)
--* i386 instruction prefixes: i386-Prefixes. (line 6)
--* i386 intel_syntax pseudo op: i386-Variations. (line 6)
--* i386 jump optimization: i386-Jumps. (line 6)
--* i386 jump, call, return: i386-Variations. (line 41)
--* i386 jump/call operands: i386-Variations. (line 15)
--* i386 line comment character: i386-Chars. (line 6)
--* i386 line separator: i386-Chars. (line 18)
--* i386 memory references: i386-Memory. (line 6)
--* i386 mnemonic compatibility: i386-Mnemonics. (line 62)
--* i386 mul, imul instructions: i386-Notes. (line 6)
--* i386 options: i386-Options. (line 6)
--* i386 register operands: i386-Variations. (line 15)
--* i386 registers: i386-Regs. (line 6)
--* i386 sections: i386-Variations. (line 47)
--* i386 size suffixes: i386-Variations. (line 29)
--* i386 source, destination operands: i386-Variations. (line 22)
--* i386 support: i386-Dependent. (line 6)
--* i386 syntax compatibility: i386-Variations. (line 6)
--* i80386 support: i386-Dependent. (line 6)
--* i860 line comment character: i860-Chars. (line 6)
--* i860 line separator: i860-Chars. (line 14)
--* i860 machine directives: Directives-i860. (line 6)
--* i860 opcodes: Opcodes for i860. (line 6)
--* i860 support: i860-Dependent. (line 6)
--* i960 architecture options: Options-i960. (line 6)
--* i960 branch recording: Options-i960. (line 22)
--* i960 callj pseudo-opcode: callj-i960. (line 6)
--* i960 compare and jump expansions: Compare-and-branch-i960.
-- (line 13)
--* i960 compare/branch instructions: Compare-and-branch-i960.
-- (line 6)
--* i960 floating point (IEEE): Floating Point-i960. (line 6)
--* i960 line comment character: i960-Chars. (line 6)
--* i960 line separator: i960-Chars. (line 14)
--* i960 machine directives: Directives-i960. (line 6)
--* i960 opcodes: Opcodes for i960. (line 6)
--* i960 options: Options-i960. (line 6)
--* i960 support: i960-Dependent. (line 6)
--* IA-64 line comment character: IA-64-Chars. (line 6)
--* IA-64 line separator: IA-64-Chars. (line 8)
--* IA-64 options: IA-64 Options. (line 6)
--* IA-64 Processor-status-Register bit names: IA-64-Bits. (line 6)
--* IA-64 registers: IA-64-Regs. (line 6)
--* IA-64 relocations: IA-64-Relocs. (line 6)
--* IA-64 support: IA-64-Dependent. (line 6)
--* IA-64 Syntax: IA-64 Options. (line 87)
--* ident directive: Ident. (line 6)
--* identifiers, ARM: ARM-Chars. (line 19)
--* identifiers, MSP 430: MSP430-Chars. (line 17)
--* if directive: If. (line 6)
--* ifb directive: If. (line 21)
--* ifc directive: If. (line 25)
--* ifdef directive: If. (line 16)
--* ifeq directive: If. (line 33)
--* ifeqs directive: If. (line 36)
--* ifge directive: If. (line 40)
--* ifgt directive: If. (line 44)
--* ifle directive: If. (line 48)
--* iflt directive: If. (line 52)
--* ifnb directive: If. (line 56)
--* ifnc directive: If. (line 61)
--* ifndef directive: If. (line 65)
--* ifne directive: If. (line 72)
--* ifnes directive: If. (line 76)
--* ifnotdef directive: If. (line 65)
--* immediate character, AArch64: AArch64-Chars. (line 13)
--* immediate character, ARM: ARM-Chars. (line 17)
--* immediate character, M680x0: M68K-Chars. (line 13)
--* immediate character, VAX: VAX-operands. (line 6)
--* immediate fields, relaxation: Xtensa Immediate Relaxation.
-- (line 6)
--* immediate operands, i386: i386-Variations. (line 15)
--* immediate operands, x86-64: i386-Variations. (line 15)
--* imul instruction, i386: i386-Notes. (line 6)
--* imul instruction, x86-64: i386-Notes. (line 6)
--* incbin directive: Incbin. (line 6)
--* include directive: Include. (line 6)
--* include directive search path: I. (line 6)
--* indirect character, VAX: VAX-operands. (line 9)
--* infix operators: Infix Ops. (line 6)
--* inhibiting interrupts, i386: i386-Prefixes. (line 36)
--* input: Input Files. (line 6)
--* input file linenumbers: Input Files. (line 35)
--* instruction aliases, s390: s390 Aliases. (line 6)
--* instruction bundle: Bundle directives. (line 6)
--* instruction expansion, CRIS: CRIS-Expand. (line 6)
--* instruction expansion, MMIX: MMIX-Expand. (line 6)
--* instruction formats, s390: s390 Formats. (line 6)
--* instruction marker, s390: s390 Instruction Marker.
-- (line 6)
--* instruction mnemonics, s390: s390 Mnemonics. (line 6)
--* instruction naming, i386: i386-Mnemonics. (line 6)
--* instruction naming, x86-64: i386-Mnemonics. (line 6)
--* instruction operand modifier, s390: s390 Operand Modifier.
-- (line 6)
--* instruction operands, s390: s390 Operands. (line 6)
--* instruction prefixes, i386: i386-Prefixes. (line 6)
--* instruction set, M680x0: M68K-opcodes. (line 6)
--* instruction set, M68HC11: M68HC11-opcodes. (line 6)
--* instruction set, XGATE: XGATE-opcodes. (line 6)
--* instruction summary, AVR: AVR Opcodes. (line 6)
--* instruction summary, D10V: D10V-Opcodes. (line 6)
--* instruction summary, D30V: D30V-Opcodes. (line 6)
--* instruction summary, H8/300: H8/300 Opcodes. (line 6)
--* instruction summary, LM32: LM32 Opcodes. (line 6)
--* instruction summary, SH: SH Opcodes. (line 6)
--* instruction summary, SH64: SH64 Opcodes. (line 6)
--* instruction summary, Z8000: Z8000 Opcodes. (line 6)
--* instruction syntax, s390: s390 Syntax. (line 6)
--* instructions and directives: Statements. (line 20)
--* int directive: Int. (line 6)
--* int directive, H8/300: H8/300 Directives. (line 6)
--* int directive, i386: i386-Float. (line 21)
--* int directive, TIC54X: TIC54X-Directives. (line 111)
--* int directive, x86-64: i386-Float. (line 21)
--* integer expressions: Integer Exprs. (line 6)
--* integer, 16-byte: Octa. (line 6)
--* integer, 8-byte: Quad. (line 9)
--* integers: Integers. (line 6)
--* integers, 16-bit: hword. (line 6)
--* integers, 32-bit: Int. (line 6)
--* integers, binary: Integers. (line 6)
--* integers, decimal: Integers. (line 12)
--* integers, hexadecimal: Integers. (line 15)
--* integers, octal: Integers. (line 9)
--* integers, one byte: Byte. (line 6)
--* intel_syntax pseudo op, i386: i386-Variations. (line 6)
--* intel_syntax pseudo op, x86-64: i386-Variations. (line 6)
--* internal assembler sections: As Sections. (line 6)
--* internal directive: Internal. (line 6)
--* invalid input: Bug Criteria. (line 14)
--* invocation summary: Overview. (line 6)
--* IP2K architecture options: IP2K-Opts. (line 14)
--* IP2K line comment character: IP2K-Chars. (line 6)
--* IP2K line separator: IP2K-Chars. (line 14)
--* IP2K options: IP2K-Opts. (line 6)
--* IP2K support: IP2K-Dependent. (line 6)
--* irp directive: Irp. (line 6)
--* irpc directive: Irpc. (line 6)
--* ISA options, SH64: SH64 Options. (line 6)
--* joining text and data sections: R. (line 6)
--* jump instructions, i386: i386-Mnemonics. (line 56)
--* jump instructions, x86-64: i386-Mnemonics. (line 56)
--* jump optimization, i386: i386-Jumps. (line 6)
--* jump optimization, x86-64: i386-Jumps. (line 6)
--* jump/call operands, i386: i386-Variations. (line 15)
--* jump/call operands, x86-64: i386-Variations. (line 15)
--* L16SI instructions, relaxation: Xtensa Immediate Relaxation.
-- (line 23)
--* L16UI instructions, relaxation: Xtensa Immediate Relaxation.
-- (line 23)
--* L32I instructions, relaxation: Xtensa Immediate Relaxation.
-- (line 23)
--* L8UI instructions, relaxation: Xtensa Immediate Relaxation.
-- (line 23)
--* label (:): Statements. (line 31)
--* label directive, TIC54X: TIC54X-Directives. (line 123)
--* labels: Labels. (line 6)
--* lcomm directive: Lcomm. (line 6)
--* lcomm directive, COFF: i386-Directives. (line 6)
--* ld: Object. (line 15)
--* ldouble directive M680x0: M68K-Float. (line 17)
--* ldouble directive M68HC11: M68HC11-Float. (line 17)
--* ldouble directive XGATE: XGATE-Float. (line 16)
--* ldouble directive, TIC54X: TIC54X-Directives. (line 64)
--* LDR reg,=<expr> pseudo op, AArch64: AArch64 Opcodes. (line 9)
--* LDR reg,=<label> pseudo op, ARM: ARM Opcodes. (line 15)
--* leafproc directive, i960: Directives-i960. (line 18)
--* length directive, TIC54X: TIC54X-Directives. (line 127)
--* length of symbols: Symbol Intro. (line 14)
--* lflags directive (ignored): Lflags. (line 6)
--* line comment character: Comments. (line 19)
--* line comment character, AArch64: AArch64-Chars. (line 6)
--* line comment character, Alpha: Alpha-Chars. (line 6)
--* line comment character, ARC: ARC-Chars. (line 6)
--* line comment character, ARM: ARM-Chars. (line 6)
--* line comment character, AVR: AVR-Chars. (line 6)
--* line comment character, CR16: CR16-Chars. (line 6)
--* line comment character, D10V: D10V-Chars. (line 6)
--* line comment character, D30V: D30V-Chars. (line 6)
--* line comment character, Epiphany: Epiphany-Chars. (line 6)
--* line comment character, H8/300: H8/300-Chars. (line 6)
--* line comment character, i386: i386-Chars. (line 6)
--* line comment character, i860: i860-Chars. (line 6)
--* line comment character, i960: i960-Chars. (line 6)
--* line comment character, IA-64: IA-64-Chars. (line 6)
--* line comment character, IP2K: IP2K-Chars. (line 6)
--* line comment character, LM32: LM32-Chars. (line 6)
--* line comment character, M32C: M32C-Chars. (line 6)
--* line comment character, M680x0: M68K-Chars. (line 6)
--* line comment character, M68HC11: M68HC11-Syntax. (line 17)
--* line comment character, Meta: Meta-Chars. (line 6)
--* line comment character, MicroBlaze: MicroBlaze-Chars. (line 6)
--* line comment character, MIPS: MIPS-Chars. (line 6)
--* line comment character, MSP 430: MSP430-Chars. (line 6)
--* line comment character, Nios II: Nios II Chars. (line 6)
--* line comment character, NS32K: NS32K-Chars. (line 6)
--* line comment character, PJ: PJ-Chars. (line 6)
--* line comment character, PowerPC: PowerPC-Chars. (line 6)
--* line comment character, RL78: RL78-Chars. (line 6)
--* line comment character, RX: RX-Chars. (line 6)
--* line comment character, s390: s390 Characters. (line 6)
--* line comment character, SCORE: SCORE-Chars. (line 6)
--* line comment character, SH: SH-Chars. (line 6)
--* line comment character, SH64: SH64-Chars. (line 6)
--* line comment character, Sparc: Sparc-Chars. (line 6)
--* line comment character, TIC54X: TIC54X-Chars. (line 6)
--* line comment character, TIC6X: TIC6X Syntax. (line 6)
--* line comment character, V850: V850-Chars. (line 6)
--* line comment character, VAX: VAX-Chars. (line 6)
--* line comment character, XGATE: XGATE-Syntax. (line 16)
--* line comment character, XStormy16: XStormy16-Chars. (line 6)
--* line comment character, Z80: Z80-Chars. (line 6)
--* line comment character, Z8000: Z8000-Chars. (line 6)
--* line comment characters, CRIS: CRIS-Chars. (line 6)
--* line comment characters, MMIX: MMIX-Chars. (line 6)
--* line directive: Line. (line 6)
--* line directive, MSP 430: MSP430 Directives. (line 14)
--* line numbers, in input files: Input Files. (line 35)
--* line numbers, in warnings/errors: Errors. (line 16)
--* line separator character: Statements. (line 6)
--* line separator character, Nios II: Nios II Chars. (line 6)
--* line separator, AArch64: AArch64-Chars. (line 10)
--* line separator, Alpha: Alpha-Chars. (line 11)
--* line separator, ARC: ARC-Chars. (line 12)
--* line separator, ARM: ARM-Chars. (line 14)
--* line separator, AVR: AVR-Chars. (line 14)
--* line separator, CR16: CR16-Chars. (line 13)
--* line separator, Epiphany: Epiphany-Chars. (line 14)
--* line separator, H8/300: H8/300-Chars. (line 8)
--* line separator, i386: i386-Chars. (line 18)
--* line separator, i860: i860-Chars. (line 14)
--* line separator, i960: i960-Chars. (line 14)
--* line separator, IA-64: IA-64-Chars. (line 8)
--* line separator, IP2K: IP2K-Chars. (line 14)
--* line separator, LM32: LM32-Chars. (line 12)
--* line separator, M32C: M32C-Chars. (line 14)
--* line separator, M680x0: M68K-Chars. (line 20)
--* line separator, M68HC11: M68HC11-Syntax. (line 27)
--* line separator, Meta: Meta-Chars. (line 8)
--* line separator, MicroBlaze: MicroBlaze-Chars. (line 14)
--* line separator, MIPS: MIPS-Chars. (line 14)
--* line separator, MSP 430: MSP430-Chars. (line 14)
--* line separator, NS32K: NS32K-Chars. (line 18)
--* line separator, PJ: PJ-Chars. (line 14)
--* line separator, PowerPC: PowerPC-Chars. (line 18)
--* line separator, RL78: RL78-Chars. (line 14)
--* line separator, RX: RX-Chars. (line 14)
--* line separator, s390: s390 Characters. (line 13)
--* line separator, SCORE: SCORE-Chars. (line 14)
--* line separator, SH: SH-Chars. (line 8)
--* line separator, SH64: SH64-Chars. (line 13)
--* line separator, Sparc: Sparc-Chars. (line 14)
--* line separator, TIC54X: TIC54X-Chars. (line 17)
--* line separator, TIC6X: TIC6X Syntax. (line 13)
--* line separator, V850: V850-Chars. (line 13)
--* line separator, VAX: VAX-Chars. (line 14)
--* line separator, XGATE: XGATE-Syntax. (line 26)
--* line separator, XStormy16: XStormy16-Chars. (line 14)
--* line separator, Z80: Z80-Chars. (line 13)
--* line separator, Z8000: Z8000-Chars. (line 13)
--* lines starting with #: Comments. (line 33)
--* linker: Object. (line 15)
--* linker, and assembler: Secs Background. (line 10)
--* linkonce directive: Linkonce. (line 6)
--* list directive: List. (line 6)
--* list directive, TIC54X: TIC54X-Directives. (line 131)
--* listing control, turning off: Nolist. (line 6)
--* listing control, turning on: List. (line 6)
--* listing control: new page: Eject. (line 6)
--* listing control: paper size: Psize. (line 6)
--* listing control: subtitle: Sbttl. (line 6)
--* listing control: title line: Title. (line 6)
--* listings, enabling: a. (line 6)
--* literal directive: Literal Directive. (line 6)
--* literal pool entries, s390: s390 Literal Pool Entries.
-- (line 6)
--* literal_position directive: Literal Position Directive.
-- (line 6)
--* literal_prefix directive: Literal Prefix Directive.
-- (line 6)
--* little endian output, MIPS: Overview. (line 743)
--* little endian output, PJ: Overview. (line 646)
--* little-endian output, MIPS: MIPS Options. (line 13)
--* little-endian output, TIC6X: TIC6X Options. (line 46)
--* LM32 line comment character: LM32-Chars. (line 6)
--* LM32 line separator: LM32-Chars. (line 12)
--* LM32 modifiers: LM32-Modifiers. (line 6)
--* LM32 opcode summary: LM32 Opcodes. (line 6)
--* LM32 options (none): LM32 Options. (line 6)
--* LM32 register names: LM32-Regs. (line 6)
--* LM32 support: LM32-Dependent. (line 6)
--* ln directive: Ln. (line 6)
--* lo directive, Nios II: Nios II Relocations. (line 23)
--* lo pseudo-op, V850: V850 Opcodes. (line 22)
--* loc directive: Loc. (line 6)
--* loc_mark_labels directive: Loc_mark_labels. (line 6)
--* local common symbols: Lcomm. (line 6)
--* local directive: Local. (line 6)
--* local labels: Symbol Names. (line 40)
--* local symbol names: Symbol Names. (line 27)
--* local symbols, retaining in output: L. (line 6)
--* location counter: Dot. (line 6)
--* location counter, advancing: Org. (line 6)
--* location counter, Z80: Z80-Chars. (line 15)
--* logical file name: File. (line 13)
--* logical line number: Line. (line 6)
--* logical line numbers: Comments. (line 33)
--* long directive: Long. (line 6)
--* long directive, ARC: ARC Directives. (line 156)
--* long directive, i386: i386-Float. (line 21)
--* long directive, TIC54X: TIC54X-Directives. (line 135)
--* long directive, x86-64: i386-Float. (line 21)
--* longcall pseudo-op, V850: V850 Opcodes. (line 123)
--* longcalls directive: Longcalls Directive. (line 6)
--* longjump pseudo-op, V850: V850 Opcodes. (line 129)
--* loop directive, TIC54X: TIC54X-Directives. (line 143)
--* LOOP instructions, alignment: Xtensa Automatic Alignment.
-- (line 6)
--* low directive, M32R: M32R-Directives. (line 9)
--* lp register, V850: V850-Regs. (line 98)
--* lval: Z8000 Directives. (line 27)
--* LWP, i386: i386-LWP. (line 6)
--* LWP, x86-64: i386-LWP. (line 6)
--* M16C architecture option: M32C-Opts. (line 12)
--* M32C architecture option: M32C-Opts. (line 9)
--* M32C line comment character: M32C-Chars. (line 6)
--* M32C line separator: M32C-Chars. (line 14)
--* M32C modifiers: M32C-Modifiers. (line 6)
--* M32C options: M32C-Opts. (line 6)
--* M32C support: M32C-Dependent. (line 6)
--* M32R architecture options: M32R-Opts. (line 17)
--* M32R directives: M32R-Directives. (line 6)
--* M32R options: M32R-Opts. (line 6)
--* M32R support: M32R-Dependent. (line 6)
--* M32R warnings: M32R-Warnings. (line 6)
--* M680x0 addressing modes: M68K-Syntax. (line 21)
--* M680x0 architecture options: M68K-Opts. (line 98)
--* M680x0 branch improvement: M68K-Branch. (line 6)
--* M680x0 directives: M68K-Directives. (line 6)
--* M680x0 floating point: M68K-Float. (line 6)
--* M680x0 immediate character: M68K-Chars. (line 13)
--* M680x0 line comment character: M68K-Chars. (line 6)
--* M680x0 line separator: M68K-Chars. (line 20)
--* M680x0 opcodes: M68K-opcodes. (line 6)
--* M680x0 options: M68K-Opts. (line 6)
--* M680x0 pseudo-opcodes: M68K-Branch. (line 6)
--* M680x0 size modifiers: M68K-Syntax. (line 8)
--* M680x0 support: M68K-Dependent. (line 6)
--* M680x0 syntax: M68K-Syntax. (line 8)
--* M68HC11 addressing modes: M68HC11-Syntax. (line 30)
--* M68HC11 and M68HC12 support: M68HC11-Dependent. (line 6)
--* M68HC11 assembler directive .far: M68HC11-Directives. (line 20)
--* M68HC11 assembler directive .interrupt: M68HC11-Directives. (line 26)
--* M68HC11 assembler directive .mode: M68HC11-Directives. (line 16)
--* M68HC11 assembler directive .relax: M68HC11-Directives. (line 10)
--* M68HC11 assembler directive .xrefb: M68HC11-Directives. (line 31)
--* M68HC11 assembler directives: M68HC11-Directives. (line 6)
--* M68HC11 branch improvement: M68HC11-Branch. (line 6)
--* M68HC11 floating point: M68HC11-Float. (line 6)
--* M68HC11 line comment character: M68HC11-Syntax. (line 17)
--* M68HC11 line separator: M68HC11-Syntax. (line 27)
--* M68HC11 modifiers: M68HC11-Modifiers. (line 6)
--* M68HC11 opcodes: M68HC11-opcodes. (line 6)
--* M68HC11 options: M68HC11-Opts. (line 6)
--* M68HC11 pseudo-opcodes: M68HC11-Branch. (line 6)
--* M68HC11 syntax: M68HC11-Syntax. (line 6)
--* M68HC12 assembler directives: M68HC11-Directives. (line 6)
--* machine dependencies: Machine Dependencies.
-- (line 6)
--* machine directives, AArch64: AArch64 Directives. (line 6)
--* machine directives, ARC: ARC Directives. (line 6)
--* machine directives, ARM: ARM Directives. (line 6)
--* machine directives, H8/300 (none): H8/300 Directives. (line 6)
--* machine directives, i860: Directives-i860. (line 6)
--* machine directives, i960: Directives-i960. (line 6)
--* machine directives, MSP 430: MSP430 Directives. (line 6)
--* machine directives, Nios II: Nios II Directives. (line 6)
--* machine directives, SH: SH Directives. (line 6)
--* machine directives, SH64: SH64 Directives. (line 9)
--* machine directives, SPARC: Sparc-Directives. (line 6)
--* machine directives, TIC54X: TIC54X-Directives. (line 6)
--* machine directives, TIC6X: TIC6X Directives. (line 6)
--* machine directives, TILE-Gx: TILE-Gx Directives. (line 6)
--* machine directives, TILEPro: TILEPro Directives. (line 6)
--* machine directives, V850: V850 Directives. (line 6)
--* machine directives, VAX: VAX-directives. (line 6)
--* machine directives, x86: i386-Directives. (line 6)
--* machine directives, XStormy16: XStormy16 Directives.
-- (line 6)
--* machine independent directives: Pseudo Ops. (line 6)
--* machine instructions (not covered): Manual. (line 14)
--* machine relocations, Nios II: Nios II Relocations. (line 6)
--* machine-independent syntax: Syntax. (line 6)
--* macro directive: Macro. (line 28)
--* macro directive, TIC54X: TIC54X-Directives. (line 153)
--* macros: Macro. (line 6)
--* macros, count executed: Macro. (line 143)
--* Macros, MSP 430: MSP430-Macros. (line 6)
--* macros, TIC54X: TIC54X-Macros. (line 6)
--* make rules: MD. (line 6)
--* manual, structure and purpose: Manual. (line 6)
--* math builtins, TIC54X: TIC54X-Builtins. (line 6)
--* Maximum number of continuation lines: listing. (line 34)
--* memory references, i386: i386-Memory. (line 6)
--* memory references, x86-64: i386-Memory. (line 6)
--* memory-mapped registers, TIC54X: TIC54X-MMRegs. (line 6)
--* merging text and data sections: R. (line 6)
--* messages from assembler: Errors. (line 6)
--* Meta architectures: Meta Options. (line 6)
--* Meta line comment character: Meta-Chars. (line 6)
--* Meta line separator: Meta-Chars. (line 8)
--* Meta options: Meta Options. (line 6)
--* Meta registers: Meta-Regs. (line 6)
--* Meta support: Meta-Dependent. (line 6)
--* MicroBlaze architectures: MicroBlaze-Dependent.
-- (line 6)
--* MicroBlaze directives: MicroBlaze Directives.
-- (line 6)
--* MicroBlaze line comment character: MicroBlaze-Chars. (line 6)
--* MicroBlaze line separator: MicroBlaze-Chars. (line 14)
--* MicroBlaze support: MicroBlaze-Dependent.
-- (line 13)
--* minus, permitted arguments: Infix Ops. (line 49)
--* MIPS 32-bit microMIPS instruction generation override: MIPS assembly options.
-- (line 6)
--* MIPS architecture options: MIPS Options. (line 29)
--* MIPS big-endian output: MIPS Options. (line 13)
--* MIPS CPU override: MIPS ISA. (line 18)
--* MIPS DSP Release 1 instruction generation override: MIPS ASE Instruction Generation Overrides.
-- (line 21)
--* MIPS DSP Release 2 instruction generation override: MIPS ASE Instruction Generation Overrides.
-- (line 26)
--* MIPS endianness: Overview. (line 740)
--* MIPS IEEE 754 NaN data encoding selection: MIPS NaN Encodings.
-- (line 6)
--* MIPS ISA: Overview. (line 746)
--* MIPS ISA override: MIPS ISA. (line 6)
--* MIPS line comment character: MIPS-Chars. (line 6)
--* MIPS line separator: MIPS-Chars. (line 14)
--* MIPS little-endian output: MIPS Options. (line 13)
--* MIPS MCU instruction generation override: MIPS ASE Instruction Generation Overrides.
-- (line 37)
--* MIPS MDMX instruction generation override: MIPS ASE Instruction Generation Overrides.
-- (line 16)
--* MIPS MIPS-3D instruction generation override: MIPS ASE Instruction Generation Overrides.
-- (line 6)
--* MIPS MT instruction generation override: MIPS ASE Instruction Generation Overrides.
-- (line 32)
--* MIPS option stack: MIPS Option Stack. (line 6)
--* MIPS processor: MIPS-Dependent. (line 6)
--* MIT: M68K-Syntax. (line 6)
--* mlib directive, TIC54X: TIC54X-Directives. (line 159)
--* mlist directive, TIC54X: TIC54X-Directives. (line 164)
--* MMIX assembler directive BSPEC: MMIX-Pseudos. (line 131)
--* MMIX assembler directive BYTE: MMIX-Pseudos. (line 97)
--* MMIX assembler directive ESPEC: MMIX-Pseudos. (line 131)
--* MMIX assembler directive GREG: MMIX-Pseudos. (line 50)
--* MMIX assembler directive IS: MMIX-Pseudos. (line 42)
--* MMIX assembler directive LOC: MMIX-Pseudos. (line 7)
--* MMIX assembler directive LOCAL: MMIX-Pseudos. (line 28)
--* MMIX assembler directive OCTA: MMIX-Pseudos. (line 108)
--* MMIX assembler directive PREFIX: MMIX-Pseudos. (line 120)
--* MMIX assembler directive TETRA: MMIX-Pseudos. (line 108)
--* MMIX assembler directive WYDE: MMIX-Pseudos. (line 108)
--* MMIX assembler directives: MMIX-Pseudos. (line 6)
--* MMIX line comment characters: MMIX-Chars. (line 6)
--* MMIX options: MMIX-Opts. (line 6)
--* MMIX pseudo-op BSPEC: MMIX-Pseudos. (line 131)
--* MMIX pseudo-op BYTE: MMIX-Pseudos. (line 97)
--* MMIX pseudo-op ESPEC: MMIX-Pseudos. (line 131)
--* MMIX pseudo-op GREG: MMIX-Pseudos. (line 50)
--* MMIX pseudo-op IS: MMIX-Pseudos. (line 42)
--* MMIX pseudo-op LOC: MMIX-Pseudos. (line 7)
--* MMIX pseudo-op LOCAL: MMIX-Pseudos. (line 28)
--* MMIX pseudo-op OCTA: MMIX-Pseudos. (line 108)
--* MMIX pseudo-op PREFIX: MMIX-Pseudos. (line 120)
--* MMIX pseudo-op TETRA: MMIX-Pseudos. (line 108)
--* MMIX pseudo-op WYDE: MMIX-Pseudos. (line 108)
--* MMIX pseudo-ops: MMIX-Pseudos. (line 6)
--* MMIX register names: MMIX-Regs. (line 6)
--* MMIX support: MMIX-Dependent. (line 6)
--* mmixal differences: MMIX-mmixal. (line 6)
--* mmregs directive, TIC54X: TIC54X-Directives. (line 169)
--* mmsg directive, TIC54X: TIC54X-Directives. (line 77)
--* MMX, i386: i386-SIMD. (line 6)
--* MMX, x86-64: i386-SIMD. (line 6)
--* mnemonic compatibility, i386: i386-Mnemonics. (line 62)
--* mnemonic suffixes, i386: i386-Variations. (line 29)
--* mnemonic suffixes, x86-64: i386-Variations. (line 29)
--* mnemonics for opcodes, VAX: VAX-opcodes. (line 6)
--* mnemonics, AVR: AVR Opcodes. (line 6)
--* mnemonics, D10V: D10V-Opcodes. (line 6)
--* mnemonics, D30V: D30V-Opcodes. (line 6)
--* mnemonics, H8/300: H8/300 Opcodes. (line 6)
--* mnemonics, LM32: LM32 Opcodes. (line 6)
--* mnemonics, SH: SH Opcodes. (line 6)
--* mnemonics, SH64: SH64 Opcodes. (line 6)
--* mnemonics, Z8000: Z8000 Opcodes. (line 6)
--* mnolist directive, TIC54X: TIC54X-Directives. (line 164)
--* modifiers, M32C: M32C-Modifiers. (line 6)
--* Motorola syntax for the 680x0: M68K-Moto-Syntax. (line 6)
--* MOVI instructions, relaxation: Xtensa Immediate Relaxation.
-- (line 12)
--* MOVN, MOVZ and MOVK group relocations, AArch64: AArch64-Relocations.
-- (line 6)
--* MOVW and MOVT relocations, ARM: ARM-Relocations. (line 21)
--* MRI compatibility mode: M. (line 6)
--* mri directive: MRI. (line 6)
--* MRI mode, temporarily: MRI. (line 6)
--* MSP 430 floating point (IEEE): MSP430 Floating Point.
-- (line 6)
--* MSP 430 identifiers: MSP430-Chars. (line 17)
--* MSP 430 line comment character: MSP430-Chars. (line 6)
--* MSP 430 line separator: MSP430-Chars. (line 14)
--* MSP 430 machine directives: MSP430 Directives. (line 6)
--* MSP 430 macros: MSP430-Macros. (line 6)
--* MSP 430 opcodes: MSP430 Opcodes. (line 6)
--* MSP 430 options (none): MSP430 Options. (line 6)
--* MSP 430 profiling capability: MSP430 Profiling Capability.
-- (line 6)
--* MSP 430 register names: MSP430-Regs. (line 6)
--* MSP 430 support: MSP430-Dependent. (line 6)
--* MSP430 Assembler Extensions: MSP430-Ext. (line 6)
--* mul instruction, i386: i386-Notes. (line 6)
--* mul instruction, x86-64: i386-Notes. (line 6)
--* N32K support: NS32K-Dependent. (line 6)
--* name: Z8000 Directives. (line 18)
--* named section: Section. (line 6)
--* named sections: Ld Sections. (line 8)
--* names, symbol: Symbol Names. (line 6)
--* naming object file: o. (line 6)
--* new page, in listings: Eject. (line 6)
--* newblock directive, TIC54X: TIC54X-Directives. (line 175)
--* newline (\n): Strings. (line 21)
--* newline, required at file end: Statements. (line 14)
--* Nios II line comment character: Nios II Chars. (line 6)
--* Nios II line separator character: Nios II Chars. (line 6)
--* Nios II machine directives: Nios II Directives. (line 6)
--* Nios II machine relocations: Nios II Relocations. (line 6)
--* Nios II opcodes: Nios II Opcodes. (line 6)
--* Nios II options: Nios II Options. (line 6)
--* Nios II support: NiosII-Dependent. (line 6)
--* Nios support: NiosII-Dependent. (line 6)
--* no-absolute-literals directive: Absolute Literals Directive.
-- (line 6)
--* no-longcalls directive: Longcalls Directive. (line 6)
--* no-relax command line option, Nios II: Nios II Options. (line 20)
--* no-schedule directive: Schedule Directive. (line 6)
--* no-transform directive: Transform Directive. (line 6)
--* nolist directive: Nolist. (line 6)
--* nolist directive, TIC54X: TIC54X-Directives. (line 131)
--* NOP pseudo op, ARM: ARM Opcodes. (line 9)
--* notes for Alpha: Alpha Notes. (line 6)
--* NS32K line comment character: NS32K-Chars. (line 6)
--* NS32K line separator: NS32K-Chars. (line 18)
--* null-terminated strings: Asciz. (line 6)
--* number constants: Numbers. (line 6)
--* number of macros executed: Macro. (line 143)
--* numbered subsections: Sub-Sections. (line 6)
--* numbers, 16-bit: hword. (line 6)
--* numeric values: Expressions. (line 6)
--* nword directive, SPARC: Sparc-Directives. (line 20)
--* object attributes: Object Attributes. (line 6)
--* object file: Object. (line 6)
--* object file format: Object Formats. (line 6)
--* object file name: o. (line 6)
--* object file, after errors: Z. (line 6)
--* obsolescent directives: Deprecated. (line 6)
--* octa directive: Octa. (line 6)
--* octal character code (\DDD): Strings. (line 30)
--* octal integers: Integers. (line 9)
--* offset directive: Offset. (line 6)
--* offset directive, V850: V850 Directives. (line 6)
--* opcode mnemonics, VAX: VAX-opcodes. (line 6)
--* opcode names, TILE-Gx: TILE-Gx Opcodes. (line 6)
--* opcode names, TILEPro: TILEPro Opcodes. (line 6)
--* opcode names, Xtensa: Xtensa Opcodes. (line 6)
--* opcode summary, AVR: AVR Opcodes. (line 6)
--* opcode summary, D10V: D10V-Opcodes. (line 6)
--* opcode summary, D30V: D30V-Opcodes. (line 6)
--* opcode summary, H8/300: H8/300 Opcodes. (line 6)
--* opcode summary, LM32: LM32 Opcodes. (line 6)
--* opcode summary, SH: SH Opcodes. (line 6)
--* opcode summary, SH64: SH64 Opcodes. (line 6)
--* opcode summary, Z8000: Z8000 Opcodes. (line 6)
--* opcodes for AArch64: AArch64 Opcodes. (line 6)
--* opcodes for ARC: ARC Opcodes. (line 6)
--* opcodes for ARM: ARM Opcodes. (line 6)
--* opcodes for MSP 430: MSP430 Opcodes. (line 6)
--* opcodes for Nios II: Nios II Opcodes. (line 6)
--* opcodes for V850: V850 Opcodes. (line 6)
--* opcodes, i860: Opcodes for i860. (line 6)
--* opcodes, i960: Opcodes for i960. (line 6)
--* opcodes, M680x0: M68K-opcodes. (line 6)
--* opcodes, M68HC11: M68HC11-opcodes. (line 6)
--* operand delimiters, i386: i386-Variations. (line 15)
--* operand delimiters, x86-64: i386-Variations. (line 15)
--* operand notation, VAX: VAX-operands. (line 6)
--* operands in expressions: Arguments. (line 6)
--* operator precedence: Infix Ops. (line 11)
--* operators, in expressions: Operators. (line 6)
--* operators, permitted arguments: Infix Ops. (line 6)
--* optimization, D10V: Overview. (line 503)
--* optimization, D30V: Overview. (line 508)
--* optimizations: Xtensa Optimizations.
-- (line 6)
--* option directive, ARC: ARC Directives. (line 159)
--* option directive, TIC54X: TIC54X-Directives. (line 179)
--* option summary: Overview. (line 6)
--* options for AArch64 (none): AArch64 Options. (line 6)
--* options for Alpha: Alpha Options. (line 6)
--* options for ARC (none): ARC Options. (line 6)
--* options for ARM (none): ARM Options. (line 6)
--* options for AVR (none): AVR Options. (line 6)
--* options for Blackfin (none): Blackfin Options. (line 6)
--* options for i386: i386-Options. (line 6)
--* options for IA-64: IA-64 Options. (line 6)
--* options for LM32 (none): LM32 Options. (line 6)
--* options for Meta: Meta Options. (line 6)
--* options for MSP430 (none): MSP430 Options. (line 6)
--* options for Nios II: Nios II Options. (line 6)
--* options for PDP-11: PDP-11-Options. (line 6)
--* options for PowerPC: PowerPC-Opts. (line 6)
--* options for s390: s390 Options. (line 6)
--* options for SCORE: SCORE-Opts. (line 6)
--* options for SPARC: Sparc-Opts. (line 6)
--* options for TIC6X: TIC6X Options. (line 6)
--* options for V850 (none): V850 Options. (line 6)
--* options for VAX/VMS: VAX-Opts. (line 42)
--* options for x86-64: i386-Options. (line 6)
--* options for Z80: Z80 Options. (line 6)
--* options, all versions of assembler: Invoking. (line 6)
--* options, command line: Command Line. (line 13)
--* options, CRIS: CRIS-Opts. (line 6)
--* options, D10V: D10V-Opts. (line 6)
--* options, D30V: D30V-Opts. (line 6)
--* options, Epiphany: Epiphany Options. (line 6)
--* options, H8/300: H8/300 Options. (line 6)
--* options, i960: Options-i960. (line 6)
--* options, IP2K: IP2K-Opts. (line 6)
--* options, M32C: M32C-Opts. (line 6)
--* options, M32R: M32R-Opts. (line 6)
--* options, M680x0: M68K-Opts. (line 6)
--* options, M68HC11: M68HC11-Opts. (line 6)
--* options, MMIX: MMIX-Opts. (line 6)
--* options, PJ: PJ Options. (line 6)
--* options, RL78: RL78-Opts. (line 6)
--* options, RX: RX-Opts. (line 6)
--* options, SH: SH Options. (line 6)
--* options, SH64: SH64 Options. (line 6)
--* options, TIC54X: TIC54X-Opts. (line 6)
--* options, XGATE: XGATE-Opts. (line 6)
--* options, Z8000: Z8000 Options. (line 6)
--* org directive: Org. (line 6)
--* other attribute, of a.out symbol: Symbol Other. (line 6)
--* output file: Object. (line 6)
--* p2align directive: P2align. (line 6)
--* p2alignl directive: P2align. (line 28)
--* p2alignw directive: P2align. (line 28)
--* padding the location counter: Align. (line 6)
--* padding the location counter given a power of two: P2align. (line 6)
--* padding the location counter given number of bytes: Balign. (line 6)
--* page, in listings: Eject. (line 6)
--* paper size, for listings: Psize. (line 6)
--* paths for .include: I. (line 6)
--* patterns, writing in memory: Fill. (line 6)
--* PDP-11 comments: PDP-11-Syntax. (line 16)
--* PDP-11 floating-point register syntax: PDP-11-Syntax. (line 13)
--* PDP-11 general-purpose register syntax: PDP-11-Syntax. (line 10)
--* PDP-11 instruction naming: PDP-11-Mnemonics. (line 6)
--* PDP-11 line separator: PDP-11-Syntax. (line 19)
--* PDP-11 support: PDP-11-Dependent. (line 6)
--* PDP-11 syntax: PDP-11-Syntax. (line 6)
--* PIC code generation for ARM: ARM Options. (line 169)
--* PIC code generation for M32R: M32R-Opts. (line 42)
--* PIC selection, MIPS: MIPS Options. (line 21)
--* PJ endianness: Overview. (line 643)
--* PJ line comment character: PJ-Chars. (line 6)
--* PJ line separator: PJ-Chars. (line 14)
--* PJ options: PJ Options. (line 6)
--* PJ support: PJ-Dependent. (line 6)
--* plus, permitted arguments: Infix Ops. (line 44)
--* popsection directive: PopSection. (line 6)
--* Position-independent code, CRIS: CRIS-Opts. (line 27)
--* Position-independent code, symbols in, CRIS: CRIS-Pic. (line 6)
--* PowerPC architectures: PowerPC-Opts. (line 6)
--* PowerPC directives: PowerPC-Pseudo. (line 6)
--* PowerPC line comment character: PowerPC-Chars. (line 6)
--* PowerPC line separator: PowerPC-Chars. (line 18)
--* PowerPC options: PowerPC-Opts. (line 6)
--* PowerPC support: PPC-Dependent. (line 6)
--* precedence of operators: Infix Ops. (line 11)
--* precision, floating point: Flonums. (line 6)
--* prefix operators: Prefix Ops. (line 6)
--* prefixes, i386: i386-Prefixes. (line 6)
--* preprocessing: Preprocessing. (line 6)
--* preprocessing, turning on and off: Preprocessing. (line 27)
--* previous directive: Previous. (line 6)
--* primary attributes, COFF symbols: COFF Symbols. (line 13)
--* print directive: Print. (line 6)
--* proc directive, SPARC: Sparc-Directives. (line 25)
--* profiler directive, MSP 430: MSP430 Directives. (line 26)
--* profiling capability for MSP 430: MSP430 Profiling Capability.
-- (line 6)
--* protected directive: Protected. (line 6)
--* pseudo-op .arch, CRIS: CRIS-Pseudos. (line 45)
--* pseudo-op .dword, CRIS: CRIS-Pseudos. (line 12)
--* pseudo-op .syntax, CRIS: CRIS-Pseudos. (line 17)
--* pseudo-op BSPEC, MMIX: MMIX-Pseudos. (line 131)
--* pseudo-op BYTE, MMIX: MMIX-Pseudos. (line 97)
--* pseudo-op ESPEC, MMIX: MMIX-Pseudos. (line 131)
--* pseudo-op GREG, MMIX: MMIX-Pseudos. (line 50)
--* pseudo-op IS, MMIX: MMIX-Pseudos. (line 42)
--* pseudo-op LOC, MMIX: MMIX-Pseudos. (line 7)
--* pseudo-op LOCAL, MMIX: MMIX-Pseudos. (line 28)
--* pseudo-op OCTA, MMIX: MMIX-Pseudos. (line 108)
--* pseudo-op PREFIX, MMIX: MMIX-Pseudos. (line 120)
--* pseudo-op TETRA, MMIX: MMIX-Pseudos. (line 108)
--* pseudo-op WYDE, MMIX: MMIX-Pseudos. (line 108)
--* pseudo-opcodes for XStormy16: XStormy16 Opcodes. (line 6)
--* pseudo-opcodes, M680x0: M68K-Branch. (line 6)
--* pseudo-opcodes, M68HC11: M68HC11-Branch. (line 6)
--* pseudo-ops for branch, VAX: VAX-branch. (line 6)
--* pseudo-ops, CRIS: CRIS-Pseudos. (line 6)
--* pseudo-ops, machine independent: Pseudo Ops. (line 6)
--* pseudo-ops, MMIX: MMIX-Pseudos. (line 6)
--* psize directive: Psize. (line 6)
--* PSR bits: IA-64-Bits. (line 6)
--* pstring directive, TIC54X: TIC54X-Directives. (line 208)
--* psw register, V850: V850-Regs. (line 116)
--* purgem directive: Purgem. (line 6)
--* purpose of GNU assembler: GNU Assembler. (line 12)
--* pushsection directive: PushSection. (line 6)
--* quad directive: Quad. (line 6)
--* quad directive, i386: i386-Float. (line 21)
--* quad directive, x86-64: i386-Float. (line 21)
--* real-mode code, i386: i386-16bit. (line 6)
--* ref directive, TIC54X: TIC54X-Directives. (line 103)
--* register directive, SPARC: Sparc-Directives. (line 29)
--* register names, AArch64: AArch64-Regs. (line 6)
--* register names, Alpha: Alpha-Regs. (line 6)
--* register names, ARC: ARC-Regs. (line 6)
--* register names, ARM: ARM-Regs. (line 6)
--* register names, AVR: AVR-Regs. (line 6)
--* register names, CRIS: CRIS-Regs. (line 6)
--* register names, H8/300: H8/300-Regs. (line 6)
--* register names, IA-64: IA-64-Regs. (line 6)
--* register names, LM32: LM32-Regs. (line 6)
--* register names, MMIX: MMIX-Regs. (line 6)
--* register names, MSP 430: MSP430-Regs. (line 6)
--* register names, Sparc: Sparc-Regs. (line 6)
--* register names, TILE-Gx: TILE-Gx Registers. (line 6)
--* register names, TILEPro: TILEPro Registers. (line 6)
--* register names, V850: V850-Regs. (line 6)
--* register names, VAX: VAX-operands. (line 17)
--* register names, Xtensa: Xtensa Registers. (line 6)
--* register names, Z80: Z80-Regs. (line 6)
--* register naming, s390: s390 Register. (line 6)
--* register operands, i386: i386-Variations. (line 15)
--* register operands, x86-64: i386-Variations. (line 15)
--* registers, D10V: D10V-Regs. (line 6)
--* registers, D30V: D30V-Regs. (line 6)
--* registers, i386: i386-Regs. (line 6)
--* registers, Meta: Meta-Regs. (line 6)
--* registers, SH: SH-Regs. (line 6)
--* registers, SH64: SH64-Regs. (line 6)
--* registers, TIC54X memory-mapped: TIC54X-MMRegs. (line 6)
--* registers, x86-64: i386-Regs. (line 6)
--* registers, Z8000: Z8000-Regs. (line 6)
--* relax-all command line option, Nios II: Nios II Options. (line 13)
--* relax-section command line option, Nios II: Nios II Options.
-- (line 6)
--* relaxation: Xtensa Relaxation. (line 6)
--* relaxation of ADDI instructions: Xtensa Immediate Relaxation.
-- (line 43)
--* relaxation of branch instructions: Xtensa Branch Relaxation.
-- (line 6)
--* relaxation of call instructions: Xtensa Call Relaxation.
-- (line 6)
--* relaxation of immediate fields: Xtensa Immediate Relaxation.
-- (line 6)
--* relaxation of L16SI instructions: Xtensa Immediate Relaxation.
-- (line 23)
--* relaxation of L16UI instructions: Xtensa Immediate Relaxation.
-- (line 23)
--* relaxation of L32I instructions: Xtensa Immediate Relaxation.
-- (line 23)
--* relaxation of L8UI instructions: Xtensa Immediate Relaxation.
-- (line 23)
--* relaxation of MOVI instructions: Xtensa Immediate Relaxation.
-- (line 12)
--* reloc directive: Reloc. (line 6)
--* relocation: Sections. (line 6)
--* relocation example: Ld Sections. (line 40)
--* relocations, AArch64: AArch64-Relocations. (line 6)
--* relocations, Alpha: Alpha-Relocs. (line 6)
--* relocations, Sparc: Sparc-Relocs. (line 6)
--* repeat prefixes, i386: i386-Prefixes. (line 44)
--* reporting bugs in assembler: Reporting Bugs. (line 6)
--* rept directive: Rept. (line 6)
--* reserve directive, SPARC: Sparc-Directives. (line 39)
--* return instructions, i386: i386-Variations. (line 41)
--* return instructions, x86-64: i386-Variations. (line 41)
--* REX prefixes, i386: i386-Prefixes. (line 46)
--* RL78 assembler directives: RL78-Directives. (line 6)
--* RL78 line comment character: RL78-Chars. (line 6)
--* RL78 line separator: RL78-Chars. (line 14)
--* RL78 modifiers: RL78-Modifiers. (line 6)
--* RL78 options: RL78-Opts. (line 6)
--* RL78 support: RL78-Dependent. (line 6)
--* rsect: Z8000 Directives. (line 52)
--* RX assembler directive .3byte: RX-Directives. (line 9)
--* RX assembler directive .fetchalign: RX-Directives. (line 13)
--* RX assembler directives: RX-Directives. (line 6)
--* RX floating point: RX-Float. (line 6)
--* RX line comment character: RX-Chars. (line 6)
--* RX line separator: RX-Chars. (line 14)
--* RX modifiers: RX-Modifiers. (line 6)
--* RX options: RX-Opts. (line 6)
--* RX support: RX-Dependent. (line 6)
--* s390 floating point: s390 Floating Point. (line 6)
--* s390 instruction aliases: s390 Aliases. (line 6)
--* s390 instruction formats: s390 Formats. (line 6)
--* s390 instruction marker: s390 Instruction Marker.
-- (line 6)
--* s390 instruction mnemonics: s390 Mnemonics. (line 6)
--* s390 instruction operand modifier: s390 Operand Modifier.
-- (line 6)
--* s390 instruction operands: s390 Operands. (line 6)
--* s390 instruction syntax: s390 Syntax. (line 6)
--* s390 line comment character: s390 Characters. (line 6)
--* s390 line separator: s390 Characters. (line 13)
--* s390 literal pool entries: s390 Literal Pool Entries.
-- (line 6)
--* s390 options: s390 Options. (line 6)
--* s390 register naming: s390 Register. (line 6)
--* s390 support: S/390-Dependent. (line 6)
--* sblock directive, TIC54X: TIC54X-Directives. (line 182)
--* sbttl directive: Sbttl. (line 6)
--* schedule directive: Schedule Directive. (line 6)
--* scl directive: Scl. (line 6)
--* SCORE architectures: SCORE-Opts. (line 6)
--* SCORE directives: SCORE-Pseudo. (line 6)
--* SCORE line comment character: SCORE-Chars. (line 6)
--* SCORE line separator: SCORE-Chars. (line 14)
--* SCORE options: SCORE-Opts. (line 6)
--* SCORE processor: SCORE-Dependent. (line 6)
--* sdaoff pseudo-op, V850: V850 Opcodes. (line 65)
--* search path for .include: I. (line 6)
--* sect directive, TIC54X: TIC54X-Directives. (line 188)
--* section directive (COFF version): Section. (line 16)
--* section directive (ELF version): Section. (line 76)
--* section directive, V850: V850 Directives. (line 9)
--* section override prefixes, i386: i386-Prefixes. (line 23)
--* Section Stack <1>: PushSection. (line 6)
--* Section Stack <2>: PopSection. (line 6)
--* Section Stack <3>: Section. (line 71)
--* Section Stack <4>: Previous. (line 6)
--* Section Stack: SubSection. (line 6)
--* section-relative addressing: Secs Background. (line 68)
--* sections: Sections. (line 6)
--* sections in messages, internal: As Sections. (line 6)
--* sections, i386: i386-Variations. (line 47)
--* sections, named: Ld Sections. (line 8)
--* sections, x86-64: i386-Variations. (line 47)
--* seg directive, SPARC: Sparc-Directives. (line 44)
--* segm: Z8000 Directives. (line 10)
--* set at directive, Nios II: Nios II Directives. (line 35)
--* set break directive, Nios II: Nios II Directives. (line 43)
--* set directive: Set. (line 6)
--* set directive, Nios II: Nios II Directives. (line 57)
--* set directive, TIC54X: TIC54X-Directives. (line 191)
--* set noat directive, Nios II: Nios II Directives. (line 31)
--* set nobreak directive, Nios II: Nios II Directives. (line 39)
--* set norelax directive, Nios II: Nios II Directives. (line 46)
--* set relaxall directive, Nios II: Nios II Directives. (line 53)
--* set relaxsection directive, Nios II: Nios II Directives. (line 49)
--* SH addressing modes: SH-Addressing. (line 6)
--* SH floating point (IEEE): SH Floating Point. (line 6)
--* SH line comment character: SH-Chars. (line 6)
--* SH line separator: SH-Chars. (line 8)
--* SH machine directives: SH Directives. (line 6)
--* SH opcode summary: SH Opcodes. (line 6)
--* SH options: SH Options. (line 6)
--* SH registers: SH-Regs. (line 6)
--* SH support: SH-Dependent. (line 6)
--* SH64 ABI options: SH64 Options. (line 29)
--* SH64 addressing modes: SH64-Addressing. (line 6)
--* SH64 ISA options: SH64 Options. (line 6)
--* SH64 line comment character: SH64-Chars. (line 6)
--* SH64 line separator: SH64-Chars. (line 13)
--* SH64 machine directives: SH64 Directives. (line 9)
--* SH64 opcode summary: SH64 Opcodes. (line 6)
--* SH64 options: SH64 Options. (line 6)
--* SH64 registers: SH64-Regs. (line 6)
--* SH64 support: SH64-Dependent. (line 6)
--* shigh directive, M32R: M32R-Directives. (line 26)
--* short directive: Short. (line 6)
--* short directive, ARC: ARC Directives. (line 168)
--* short directive, TIC54X: TIC54X-Directives. (line 111)
--* SIMD, i386: i386-SIMD. (line 6)
--* SIMD, x86-64: i386-SIMD. (line 6)
--* single character constant: Chars. (line 6)
--* single directive: Single. (line 6)
--* single directive, i386: i386-Float. (line 14)
--* single directive, x86-64: i386-Float. (line 14)
--* single quote, Z80: Z80-Chars. (line 20)
--* sixteen bit integers: hword. (line 6)
--* sixteen byte integer: Octa. (line 6)
--* size directive (COFF version): Size. (line 11)
--* size directive (ELF version): Size. (line 19)
--* size modifiers, D10V: D10V-Size. (line 6)
--* size modifiers, D30V: D30V-Size. (line 6)
--* size modifiers, M680x0: M68K-Syntax. (line 8)
--* size prefixes, i386: i386-Prefixes. (line 27)
--* size suffixes, H8/300: H8/300 Opcodes. (line 163)
--* size, translations, Sparc: Sparc-Size-Translations.
-- (line 6)
--* sizes operands, i386: i386-Variations. (line 29)
--* sizes operands, x86-64: i386-Variations. (line 29)
--* skip directive: Skip. (line 6)
--* skip directive, M680x0: M68K-Directives. (line 19)
--* skip directive, SPARC: Sparc-Directives. (line 48)
--* sleb128 directive: Sleb128. (line 6)
--* small data, MIPS: MIPS Small Data. (line 6)
--* SmartMIPS instruction generation override: MIPS ASE Instruction Generation Overrides.
-- (line 11)
--* SOM symbol attributes: SOM Symbols. (line 6)
--* source program: Input Files. (line 6)
--* source, destination operands; i386: i386-Variations. (line 22)
--* source, destination operands; x86-64: i386-Variations. (line 22)
--* sp register: Xtensa Registers. (line 6)
--* sp register, V850: V850-Regs. (line 14)
--* space directive: Space. (line 6)
--* space directive, TIC54X: TIC54X-Directives. (line 196)
--* space used, maximum for assembly: statistics. (line 6)
--* SPARC architectures: Sparc-Opts. (line 6)
--* Sparc constants: Sparc-Constants. (line 6)
--* SPARC data alignment: Sparc-Aligned-Data. (line 6)
--* SPARC floating point (IEEE): Sparc-Float. (line 6)
--* Sparc line comment character: Sparc-Chars. (line 6)
--* Sparc line separator: Sparc-Chars. (line 14)
--* SPARC machine directives: Sparc-Directives. (line 6)
--* SPARC options: Sparc-Opts. (line 6)
--* Sparc registers: Sparc-Regs. (line 6)
--* Sparc relocations: Sparc-Relocs. (line 6)
--* Sparc size translations: Sparc-Size-Translations.
-- (line 6)
--* SPARC support: Sparc-Dependent. (line 6)
--* SPARC syntax: Sparc-Aligned-Data. (line 21)
--* special characters, M680x0: M68K-Chars. (line 6)
--* special purpose registers, MSP 430: MSP430-Regs. (line 11)
--* sslist directive, TIC54X: TIC54X-Directives. (line 203)
--* ssnolist directive, TIC54X: TIC54X-Directives. (line 203)
--* stabd directive: Stab. (line 38)
--* stabn directive: Stab. (line 48)
--* stabs directive: Stab. (line 51)
--* stabX directives: Stab. (line 6)
--* standard assembler sections: Secs Background. (line 27)
--* standard input, as input file: Command Line. (line 10)
--* statement separator character: Statements. (line 6)
--* statement separator, AArch64: AArch64-Chars. (line 10)
--* statement separator, Alpha: Alpha-Chars. (line 11)
--* statement separator, ARC: ARC-Chars. (line 12)
--* statement separator, ARM: ARM-Chars. (line 14)
--* statement separator, AVR: AVR-Chars. (line 14)
--* statement separator, CR16: CR16-Chars. (line 13)
--* statement separator, Epiphany: Epiphany-Chars. (line 14)
--* statement separator, H8/300: H8/300-Chars. (line 8)
--* statement separator, i386: i386-Chars. (line 18)
--* statement separator, i860: i860-Chars. (line 14)
--* statement separator, i960: i960-Chars. (line 14)
--* statement separator, IA-64: IA-64-Chars. (line 8)
--* statement separator, IP2K: IP2K-Chars. (line 14)
--* statement separator, LM32: LM32-Chars. (line 12)
--* statement separator, M32C: M32C-Chars. (line 14)
--* statement separator, M68HC11: M68HC11-Syntax. (line 27)
--* statement separator, Meta: Meta-Chars. (line 8)
--* statement separator, MicroBlaze: MicroBlaze-Chars. (line 14)
--* statement separator, MIPS: MIPS-Chars. (line 14)
--* statement separator, MSP 430: MSP430-Chars. (line 14)
--* statement separator, NS32K: NS32K-Chars. (line 18)
--* statement separator, PJ: PJ-Chars. (line 14)
--* statement separator, PowerPC: PowerPC-Chars. (line 18)
--* statement separator, RL78: RL78-Chars. (line 14)
--* statement separator, RX: RX-Chars. (line 14)
--* statement separator, s390: s390 Characters. (line 13)
--* statement separator, SCORE: SCORE-Chars. (line 14)
--* statement separator, SH: SH-Chars. (line 8)
--* statement separator, SH64: SH64-Chars. (line 13)
--* statement separator, Sparc: Sparc-Chars. (line 14)
--* statement separator, TIC54X: TIC54X-Chars. (line 17)
--* statement separator, TIC6X: TIC6X Syntax. (line 13)
--* statement separator, V850: V850-Chars. (line 13)
--* statement separator, VAX: VAX-Chars. (line 14)
--* statement separator, XGATE: XGATE-Syntax. (line 26)
--* statement separator, XStormy16: XStormy16-Chars. (line 14)
--* statement separator, Z80: Z80-Chars. (line 13)
--* statement separator, Z8000: Z8000-Chars. (line 13)
--* statements, structure of: Statements. (line 6)
--* statistics, about assembly: statistics. (line 6)
--* stopping the assembly: Abort. (line 6)
--* string constants: Strings. (line 6)
--* string directive: String. (line 8)
--* string directive on HPPA: HPPA Directives. (line 137)
--* string directive, TIC54X: TIC54X-Directives. (line 208)
--* string literals: Ascii. (line 6)
--* string, copying to object file: String. (line 8)
--* string16 directive: String. (line 8)
--* string16, copying to object file: String. (line 8)
--* string32 directive: String. (line 8)
--* string32, copying to object file: String. (line 8)
--* string64 directive: String. (line 8)
--* string64, copying to object file: String. (line 8)
--* string8 directive: String. (line 8)
--* string8, copying to object file: String. (line 8)
--* struct directive: Struct. (line 6)
--* struct directive, TIC54X: TIC54X-Directives. (line 216)
--* structure debugging, COFF: Tag. (line 6)
--* sub-instruction ordering, D10V: D10V-Chars. (line 14)
--* sub-instruction ordering, D30V: D30V-Chars. (line 14)
--* sub-instructions, D10V: D10V-Subs. (line 6)
--* sub-instructions, D30V: D30V-Subs. (line 6)
--* subexpressions: Arguments. (line 24)
--* subsection directive: SubSection. (line 6)
--* subsym builtins, TIC54X: TIC54X-Macros. (line 16)
--* subtitles for listings: Sbttl. (line 6)
--* subtraction, permitted arguments: Infix Ops. (line 49)
--* summary of options: Overview. (line 6)
--* support: HPPA-Dependent. (line 6)
--* supporting files, including: Include. (line 6)
--* suppressing warnings: W. (line 11)
--* sval: Z8000 Directives. (line 33)
--* symbol attributes: Symbol Attributes. (line 6)
--* symbol attributes, a.out: a.out Symbols. (line 6)
--* symbol attributes, COFF: COFF Symbols. (line 6)
--* symbol attributes, SOM: SOM Symbols. (line 6)
--* symbol descriptor, COFF: Desc. (line 6)
--* symbol modifiers <1>: LM32-Modifiers. (line 12)
--* symbol modifiers <2>: AVR-Modifiers. (line 12)
--* symbol modifiers <3>: M68HC11-Modifiers. (line 12)
--* symbol modifiers: M32C-Modifiers. (line 11)
--* symbol modifiers, TILE-Gx: TILE-Gx Modifiers. (line 6)
--* symbol modifiers, TILEPro: TILEPro Modifiers. (line 6)
--* symbol names: Symbol Names. (line 6)
--* symbol names, $ in <1>: D30V-Chars. (line 70)
--* symbol names, $ in <2>: D10V-Chars. (line 53)
--* symbol names, $ in <3>: SH64-Chars. (line 15)
--* symbol names, $ in <4>: SH-Chars. (line 15)
--* symbol names, $ in: Meta-Chars. (line 10)
--* symbol names, local: Symbol Names. (line 27)
--* symbol names, temporary: Symbol Names. (line 40)
--* symbol storage class (COFF): Scl. (line 6)
--* symbol type: Symbol Type. (line 6)
--* symbol type, COFF: Type. (line 11)
--* symbol type, ELF: Type. (line 22)
--* symbol value: Symbol Value. (line 6)
--* symbol value, setting: Set. (line 6)
--* symbol values, assigning: Setting Symbols. (line 6)
--* symbol versioning: Symver. (line 6)
--* symbol, common: Comm. (line 6)
--* symbol, making visible to linker: Global. (line 6)
--* symbolic debuggers, information for: Stab. (line 6)
--* symbols: Symbols. (line 6)
--* Symbols in position-independent code, CRIS: CRIS-Pic. (line 6)
--* symbols with uppercase, VAX/VMS: VAX-Opts. (line 42)
--* symbols, assigning values to: Equ. (line 6)
--* Symbols, built-in, CRIS: CRIS-Symbols. (line 6)
--* Symbols, CRIS, built-in: CRIS-Symbols. (line 6)
--* symbols, local common: Lcomm. (line 6)
--* symver directive: Symver. (line 6)
--* syntax compatibility, i386: i386-Variations. (line 6)
--* syntax compatibility, x86-64: i386-Variations. (line 6)
--* syntax, AVR: AVR-Modifiers. (line 6)
--* syntax, Blackfin: Blackfin Syntax. (line 6)
--* syntax, D10V: D10V-Syntax. (line 6)
--* syntax, D30V: D30V-Syntax. (line 6)
--* syntax, LM32: LM32-Modifiers. (line 6)
--* syntax, M680x0: M68K-Syntax. (line 8)
--* syntax, M68HC11 <1>: M68HC11-Modifiers. (line 6)
--* syntax, M68HC11: M68HC11-Syntax. (line 6)
--* syntax, machine-independent: Syntax. (line 6)
--* syntax, RL78: RL78-Modifiers. (line 6)
--* syntax, RX: RX-Modifiers. (line 6)
--* syntax, SPARC: Sparc-Aligned-Data. (line 21)
--* syntax, TILE-Gx: TILE-Gx Syntax. (line 6)
--* syntax, TILEPro: TILEPro Syntax. (line 6)
--* syntax, XGATE: XGATE-Syntax. (line 6)
--* syntax, Xtensa assembler: Xtensa Syntax. (line 6)
--* sysproc directive, i960: Directives-i960. (line 37)
--* tab (\t): Strings. (line 27)
--* tab directive, TIC54X: TIC54X-Directives. (line 247)
--* tag directive: Tag. (line 6)
--* tag directive, TIC54X: TIC54X-Directives. (line 250)
--* TBM, i386: i386-TBM. (line 6)
--* TBM, x86-64: i386-TBM. (line 6)
--* tdaoff pseudo-op, V850: V850 Opcodes. (line 81)
--* temporary symbol names: Symbol Names. (line 40)
--* text and data sections, joining: R. (line 6)
--* text directive: Text. (line 6)
--* text section: Ld Sections. (line 9)
--* tfloat directive, i386: i386-Float. (line 14)
--* tfloat directive, x86-64: i386-Float. (line 14)
--* Thumb support <1>: ARM-Dependent. (line 6)
--* Thumb support: AArch64-Dependent. (line 6)
--* TIC54X builtin math functions: TIC54X-Builtins. (line 6)
--* TIC54X line comment character: TIC54X-Chars. (line 6)
--* TIC54X line separator: TIC54X-Chars. (line 17)
--* TIC54X machine directives: TIC54X-Directives. (line 6)
--* TIC54X memory-mapped registers: TIC54X-MMRegs. (line 6)
--* TIC54X options: TIC54X-Opts. (line 6)
--* TIC54X subsym builtins: TIC54X-Macros. (line 16)
--* TIC54X support: TIC54X-Dependent. (line 6)
--* TIC54X-specific macros: TIC54X-Macros. (line 6)
--* TIC6X big-endian output: TIC6X Options. (line 46)
--* TIC6X line comment character: TIC6X Syntax. (line 6)
--* TIC6X line separator: TIC6X Syntax. (line 13)
--* TIC6X little-endian output: TIC6X Options. (line 46)
--* TIC6X machine directives: TIC6X Directives. (line 6)
--* TIC6X options: TIC6X Options. (line 6)
--* TIC6X support: TIC6X-Dependent. (line 6)
--* TILE-Gx machine directives: TILE-Gx Directives. (line 6)
--* TILE-Gx modifiers: TILE-Gx Modifiers. (line 6)
--* TILE-Gx opcode names: TILE-Gx Opcodes. (line 6)
--* TILE-Gx register names: TILE-Gx Registers. (line 6)
--* TILE-Gx support: TILE-Gx-Dependent. (line 6)
--* TILE-Gx syntax: TILE-Gx Syntax. (line 6)
--* TILEPro machine directives: TILEPro Directives. (line 6)
--* TILEPro modifiers: TILEPro Modifiers. (line 6)
--* TILEPro opcode names: TILEPro Opcodes. (line 6)
--* TILEPro register names: TILEPro Registers. (line 6)
--* TILEPro support: TILEPro-Dependent. (line 6)
--* TILEPro syntax: TILEPro Syntax. (line 6)
--* time, total for assembly: statistics. (line 6)
--* title directive: Title. (line 6)
--* tls_gd directive, Nios II: Nios II Relocations. (line 38)
--* tls_ie directive, Nios II: Nios II Relocations. (line 38)
--* tls_ldm directive, Nios II: Nios II Relocations. (line 38)
--* tls_ldo directive, Nios II: Nios II Relocations. (line 38)
--* tls_le directive, Nios II: Nios II Relocations. (line 38)
--* TMS320C6X support: TIC6X-Dependent. (line 6)
--* tp register, V850: V850-Regs. (line 20)
--* transform directive: Transform Directive. (line 6)
--* trusted compiler: f. (line 6)
--* turning preprocessing on and off: Preprocessing. (line 27)
--* type directive (COFF version): Type. (line 11)
--* type directive (ELF version): Type. (line 22)
--* type of a symbol: Symbol Type. (line 6)
--* ualong directive, SH: SH Directives. (line 6)
--* uaquad directive, SH: SH Directives. (line 6)
--* uaword directive, SH: SH Directives. (line 6)
--* ubyte directive, TIC54X: TIC54X-Directives. (line 36)
--* uchar directive, TIC54X: TIC54X-Directives. (line 36)
--* uhalf directive, TIC54X: TIC54X-Directives. (line 111)
--* uint directive, TIC54X: TIC54X-Directives. (line 111)
--* uleb128 directive: Uleb128. (line 6)
--* ulong directive, TIC54X: TIC54X-Directives. (line 135)
--* undefined section: Ld Sections. (line 36)
--* union directive, TIC54X: TIC54X-Directives. (line 250)
--* unsegm: Z8000 Directives. (line 14)
--* usect directive, TIC54X: TIC54X-Directives. (line 262)
--* ushort directive, TIC54X: TIC54X-Directives. (line 111)
--* uword directive, TIC54X: TIC54X-Directives. (line 111)
--* V850 command line options: V850 Options. (line 9)
--* V850 floating point (IEEE): V850 Floating Point. (line 6)
--* V850 line comment character: V850-Chars. (line 6)
--* V850 line separator: V850-Chars. (line 13)
--* V850 machine directives: V850 Directives. (line 6)
--* V850 opcodes: V850 Opcodes. (line 6)
--* V850 options (none): V850 Options. (line 6)
--* V850 register names: V850-Regs. (line 6)
--* V850 support: V850-Dependent. (line 6)
--* val directive: Val. (line 6)
--* value attribute, COFF: Val. (line 6)
--* value of a symbol: Symbol Value. (line 6)
--* var directive, TIC54X: TIC54X-Directives. (line 272)
--* VAX bitfields not supported: VAX-no. (line 6)
--* VAX branch improvement: VAX-branch. (line 6)
--* VAX command-line options ignored: VAX-Opts. (line 6)
--* VAX displacement sizing character: VAX-operands. (line 12)
--* VAX floating point: VAX-float. (line 6)
--* VAX immediate character: VAX-operands. (line 6)
--* VAX indirect character: VAX-operands. (line 9)
--* VAX line comment character: VAX-Chars. (line 6)
--* VAX line separator: VAX-Chars. (line 14)
--* VAX machine directives: VAX-directives. (line 6)
--* VAX opcode mnemonics: VAX-opcodes. (line 6)
--* VAX operand notation: VAX-operands. (line 6)
--* VAX register names: VAX-operands. (line 17)
--* VAX support: Vax-Dependent. (line 6)
--* Vax-11 C compatibility: VAX-Opts. (line 42)
--* VAX/VMS options: VAX-Opts. (line 42)
--* version directive: Version. (line 6)
--* version directive, TIC54X: TIC54X-Directives. (line 276)
--* version of assembler: v. (line 6)
--* versions of symbols: Symver. (line 6)
--* Virtualization instruction generation override: MIPS ASE Instruction Generation Overrides.
-- (line 42)
--* visibility <1>: Protected. (line 6)
--* visibility <2>: Hidden. (line 6)
--* visibility: Internal. (line 6)
--* VMS (VAX) options: VAX-Opts. (line 42)
--* vtable_entry directive: VTableEntry. (line 6)
--* vtable_inherit directive: VTableInherit. (line 6)
--* warning directive: Warning. (line 6)
--* warning for altered difference tables: K. (line 6)
--* warning messages: Errors. (line 6)
--* warnings, causing error: W. (line 16)
--* warnings, M32R: M32R-Warnings. (line 6)
--* warnings, suppressing: W. (line 11)
--* warnings, switching on: W. (line 19)
--* weak directive: Weak. (line 6)
--* weakref directive: Weakref. (line 6)
--* whitespace: Whitespace. (line 6)
--* whitespace, removed by preprocessor: Preprocessing. (line 7)
--* wide floating point directives, VAX: VAX-directives. (line 10)
--* width directive, TIC54X: TIC54X-Directives. (line 127)
--* Width of continuation lines of disassembly output: listing. (line 21)
--* Width of first line disassembly output: listing. (line 16)
--* Width of source line output: listing. (line 28)
--* wmsg directive, TIC54X: TIC54X-Directives. (line 77)
--* word directive: Word. (line 6)
--* word directive, ARC: ARC Directives. (line 171)
--* word directive, H8/300: H8/300 Directives. (line 6)
--* word directive, i386: i386-Float. (line 21)
--* word directive, Nios II: Nios II Directives. (line 13)
--* word directive, SPARC: Sparc-Directives. (line 51)
--* word directive, TIC54X: TIC54X-Directives. (line 111)
--* word directive, x86-64: i386-Float. (line 21)
--* writing patterns in memory: Fill. (line 6)
--* wval: Z8000 Directives. (line 24)
--* x86 machine directives: i386-Directives. (line 6)
--* x86-64 arch directive: i386-Arch. (line 6)
--* x86-64 att_syntax pseudo op: i386-Variations. (line 6)
--* x86-64 conversion instructions: i386-Mnemonics. (line 37)
--* x86-64 floating point: i386-Float. (line 6)
--* x86-64 immediate operands: i386-Variations. (line 15)
--* x86-64 instruction naming: i386-Mnemonics. (line 6)
--* x86-64 intel_syntax pseudo op: i386-Variations. (line 6)
--* x86-64 jump optimization: i386-Jumps. (line 6)
--* x86-64 jump, call, return: i386-Variations. (line 41)
--* x86-64 jump/call operands: i386-Variations. (line 15)
--* x86-64 memory references: i386-Memory. (line 6)
--* x86-64 options: i386-Options. (line 6)
--* x86-64 register operands: i386-Variations. (line 15)
--* x86-64 registers: i386-Regs. (line 6)
--* x86-64 sections: i386-Variations. (line 47)
--* x86-64 size suffixes: i386-Variations. (line 29)
--* x86-64 source, destination operands: i386-Variations. (line 22)
--* x86-64 support: i386-Dependent. (line 6)
--* x86-64 syntax compatibility: i386-Variations. (line 6)
--* xfloat directive, TIC54X: TIC54X-Directives. (line 64)
--* XGATE addressing modes: XGATE-Syntax. (line 29)
--* XGATE assembler directives: XGATE-Directives. (line 6)
--* XGATE floating point: XGATE-Float. (line 6)
--* XGATE line comment character: XGATE-Syntax. (line 16)
--* XGATE line separator: XGATE-Syntax. (line 26)
--* XGATE opcodes: XGATE-opcodes. (line 6)
--* XGATE options: XGATE-Opts. (line 6)
--* XGATE support: XGATE-Dependent. (line 6)
--* XGATE syntax: XGATE-Syntax. (line 6)
--* xlong directive, TIC54X: TIC54X-Directives. (line 135)
--* XStormy16 comment character: XStormy16-Chars. (line 11)
--* XStormy16 line comment character: XStormy16-Chars. (line 6)
--* XStormy16 line separator: XStormy16-Chars. (line 14)
--* XStormy16 machine directives: XStormy16 Directives.
-- (line 6)
--* XStormy16 pseudo-opcodes: XStormy16 Opcodes. (line 6)
--* XStormy16 support: XSTORMY16-Dependent. (line 6)
--* Xtensa architecture: Xtensa-Dependent. (line 6)
--* Xtensa assembler syntax: Xtensa Syntax. (line 6)
--* Xtensa directives: Xtensa Directives. (line 6)
--* Xtensa opcode names: Xtensa Opcodes. (line 6)
--* Xtensa register names: Xtensa Registers. (line 6)
--* xword directive, SPARC: Sparc-Directives. (line 55)
--* Z80 $: Z80-Chars. (line 15)
--* Z80 ': Z80-Chars. (line 20)
--* Z80 floating point: Z80 Floating Point. (line 6)
--* Z80 line comment character: Z80-Chars. (line 6)
--* Z80 line separator: Z80-Chars. (line 13)
--* Z80 options: Z80 Options. (line 6)
--* Z80 registers: Z80-Regs. (line 6)
--* Z80 support: Z80-Dependent. (line 6)
--* Z80 Syntax: Z80 Options. (line 47)
--* Z80, \: Z80-Chars. (line 18)
--* Z80, case sensitivity: Z80-Case. (line 6)
--* Z80-only directives: Z80 Directives. (line 9)
--* Z800 addressing modes: Z8000-Addressing. (line 6)
--* Z8000 directives: Z8000 Directives. (line 6)
--* Z8000 line comment character: Z8000-Chars. (line 6)
--* Z8000 line separator: Z8000-Chars. (line 13)
--* Z8000 opcode summary: Z8000 Opcodes. (line 6)
--* Z8000 options: Z8000 Options. (line 6)
--* Z8000 registers: Z8000-Regs. (line 6)
--* Z8000 support: Z8000-Dependent. (line 6)
--* zdaoff pseudo-op, V850: V850 Opcodes. (line 99)
--* zero register, V850: V850-Regs. (line 7)
--* zero-terminated strings: Asciz. (line 6)
--
--
--
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--Node: AArch64 Mapping Symbols208824
--Node: Alpha-Dependent209206
--Node: Alpha Notes209646
--Node: Alpha Options209927
--Node: Alpha Syntax212402
--Node: Alpha-Chars212871
--Node: Alpha-Regs213283
--Node: Alpha-Relocs213670
--Node: Alpha Floating Point219928
--Node: Alpha Directives220150
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--Node: ARC-Dependent225968
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--Node: ARC Syntax227420
--Node: ARC-Chars227652
--Node: ARC-Regs228133
--Node: ARC Floating Point228257
--Node: ARC Directives228568
--Node: ARC Opcodes234533
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--Node: ARM Options235224
--Node: ARM Syntax244069
--Node: ARM-Instruction-Set244437
--Node: ARM-Chars245657
--Node: ARM-Regs246368
--Node: ARM-Relocations246577
--Node: ARM-Neon-Alignment247711
--Node: ARM Floating Point248175
--Node: ARM Directives248374
--Ref: arm_pad249691
--Ref: arm_fnend253028
--Ref: arm_fnstart253352
--Ref: arm_save256362
--Ref: arm_setfp257063
--Node: ARM Opcodes260355
--Node: ARM Mapping Symbols262443
--Node: ARM Unwinding Tutorial263253
--Node: AVR-Dependent269455
--Node: AVR Options269745
--Node: AVR Syntax274633
--Node: AVR-Chars274920
--Node: AVR-Regs275479
--Node: AVR-Modifiers276058
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--Node: i386-Float383816
--Node: i386-SIMD385647
--Node: i386-LWP386756
--Node: i386-BMI387590
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--Node: MIPS assembly options500605
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--Node: MIPS insn501908
--Node: MIPS NaN Encodings503194
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--Node: MMIX-Dependent509935
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--Ref: mmixsite515591
--Node: MMIX-Chars516432
--Node: MMIX-Symbols517306
--Node: MMIX-Regs519374
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--Ref: MMIX-loc520540
--Ref: MMIX-local521620
--Ref: MMIX-is522152
--Ref: MMIX-greg522423
--Ref: GREG-base523342
--Ref: MMIX-byte524659
--Ref: MMIX-constants525130
--Ref: MMIX-prefix525776
--Ref: MMIX-spec526150
--Node: MMIX-mmixal526484
--Node: MSP430-Dependent529982
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--Node: NiosII-Dependent539750
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--Node: PowerPC-Opts554674
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--Node: RL78-Dependent559733
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--Node: RX-Syntax568755
--Node: RX-Chars568934
--Node: S/390-Dependent569486
--Node: s390 Options570202
--Node: s390 Characters571748
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--Node: s390 Mnemonics573983
--Node: s390 Operands577003
--Node: s390 Formats579622
--Node: s390 Aliases587493
--Node: s390 Operand Modifier591390
--Node: s390 Instruction Marker595191
--Node: s390 Literal Pool Entries596207
--Node: s390 Directives598130
--Node: s390 Floating Point603186
--Node: SCORE-Dependent603632
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--Node: SH-Dependent608042
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--Node: Sparc-Dependent624636
--Node: Sparc-Opts625048
--Node: Sparc-Aligned-Data629715
--Node: Sparc-Syntax630547
--Node: Sparc-Chars631121
--Node: Sparc-Regs631684
--Node: Sparc-Constants636795
--Node: Sparc-Relocs641555
--Node: Sparc-Size-Translations646691
--Node: Sparc-Float648340
--Node: Sparc-Directives648535
--Node: TIC54X-Dependent650495
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--Node: TIC54X-Block652301
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--Node: TIC54X-Constants653009
--Node: TIC54X-Subsyms653411
--Node: TIC54X-Locals655320
--Node: TIC54X-Builtins656064
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--Node: TIC54X-Directives659106
--Node: TIC54X-Macros670007
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--Node: TILE-Gx-Dependent678928
--Node: TILE-Gx Options679238
--Node: TILE-Gx Syntax679588
--Node: TILE-Gx Opcodes681822
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--Node: TILEPro-Dependent688758
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--Node: Z80-Dependent698215
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--Node: Z80 Syntax700026
--Node: Z80-Chars700698
--Node: Z80-Regs701548
--Node: Z80-Case701900
--Node: Z80 Floating Point702345
--Node: Z80 Directives702539
--Node: Z80 Opcodes704164
--Node: Z8000-Dependent705508
--Node: Z8000 Options706469
--Node: Z8000 Syntax706686
--Node: Z8000-Chars706976
--Node: Z8000-Regs707458
--Node: Z8000-Addressing708248
--Node: Z8000 Directives709365
--Node: Z8000 Opcodes710974
--Node: Vax-Dependent720916
--Node: VAX-Opts721476
--Node: VAX-float725211
--Node: VAX-directives725843
--Node: VAX-opcodes726704
--Node: VAX-branch727093
--Node: VAX-operands729600
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--Node: VAX-Syntax730619
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--Node: V850-Dependent731339
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--Node: XGATE-Dependent745900
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--Node: XGATE-Float749629
--Node: XGATE-opcodes750126
--Node: XSTORMY16-Dependent750238
--Node: XStormy16 Syntax750584
--Node: XStormy16-Chars750774
--Node: XStormy16 Directives751387
--Node: XStormy16 Opcodes752042
--Node: Xtensa-Dependent753098
--Node: Xtensa Options753832
--Node: Xtensa Syntax756569
--Node: Xtensa Opcodes758713
--Node: Xtensa Registers760507
--Node: Xtensa Optimizations761140
--Node: Density Instructions761592
--Node: Xtensa Automatic Alignment762694
--Node: Xtensa Relaxation765141
--Node: Xtensa Branch Relaxation766049
--Node: Xtensa Call Relaxation767421
--Node: Xtensa Immediate Relaxation769207
--Node: Xtensa Directives771781
--Node: Schedule Directive773490
--Node: Longcalls Directive773830
--Node: Transform Directive774374
--Node: Literal Directive775116
--Ref: Literal Directive-Footnote-1778655
--Node: Literal Position Directive778797
--Node: Literal Prefix Directive780496
--Node: Absolute Literals Directive781394
--Node: Reporting Bugs782701
--Node: Bug Criteria783427
--Node: Bug Reporting784194
--Node: Acknowledgements790843
--Ref: Acknowledgements-Footnote-1795808
--Node: GNU Free Documentation License795834
--Node: AS Index821003
--
--End Tag Table
-diff -Nur binutils-2.24.orig/gas/doc/as.texinfo binutils-2.24/gas/doc/as.texinfo
---- binutils-2.24.orig/gas/doc/as.texinfo 2013-11-08 11:13:48.000000000 +0100
-+++ binutils-2.24/gas/doc/as.texinfo 2016-06-30 21:26:12.721895757 +0200
-@@ -435,6 +435,18 @@
- [@b{-relax-all}] [@b{-relax-section}] [@b{-no-relax}]
- [@b{-EB}] [@b{-EL}]
- @end ifset
-+@ifset NDS32
-+
-+@emph{Target NDS32 options:}
-+ [@b{-EL}] [@b{-EB}] [@b{-O}] [@b{-Os}] [@b{-mcpu=@var{cpu}}]
-+ [@b{-misa=@var{isa}}] [@b{-mabi=@var{abi}}] [@b{-mall-ext}]
-+ [@b{-m[no-]16-bit}] [@b{-m[no-]perf-ext}] [@b{-m[no-]perf2-ext}]
-+ [@b{-m[no-]string-ext}] [@b{-m[no-]dsp-ext}] [@b{-m[no-]mac}] [@b{-m[no-]div}]
-+ [@b{-m[no-]audio-isa-ext}] [@b{-m[no-]fpu-sp-ext}] [@b{-m[no-]fpu-dp-ext}]
-+ [@b{-m[no-]fpu-fma}] [@b{-mfpu-freg=@var{FREG}}] [@b{-mreduced-regs}]
-+ [@b{-mfull-regs}] [@b{-m[no-]dx-regs}] [@b{-mpic}] [@b{-mno-relax}]
-+ [@b{-mb2bb}]
-+@end ifset
- @ifset PDP11
-
- @emph{Target PDP11 options:}
-@@ -1458,6 +1470,25 @@
- See the info pages for documentation of the MMIX-specific options.
- @end ifset
-
-+@ifset NDS32
-+
-+@ifclear man
-+@xref{NDS32 Options}, for the options available when @value{AS} is configured
-+for a NDS32 processor.
-+@end ifclear
-+@c ended inside the included file
-+@end ifset
-+
-+@ifset man
-+@c man begin OPTIONS
-+The following options are available when @value{AS} is configured for a
-+NDS32 processor.
-+@c man end
-+@c man begin INCLUDE
-+@include c-nds32.texi
-+@c ended inside the included file
-+@end ifset
-+
- @c man end
- @ifset PPC
-
-@@ -7114,6 +7145,9 @@
- @ifset MSP430
- * MSP430-Dependent:: MSP430 Dependent Features
- @end ifset
-+@ifset NDS32
-+* NDS32-Dependent:: Andes NDS32 Dependent Features
-+@end ifset
- @ifset NIOSII
- * NiosII-Dependent:: Altera Nios II Dependent Features
- @end ifset
-@@ -7328,6 +7362,10 @@
- @include c-msp430.texi
- @end ifset
-
-+@ifset NDS32
-+@include c-nds32.texi
-+@end ifset
-+
- @ifset NIOSII
- @include c-nios2.texi
- @end ifset
-diff -Nur binutils-2.24.orig/gas/doc/c-nds32.texi binutils-2.24/gas/doc/c-nds32.texi
---- binutils-2.24.orig/gas/doc/c-nds32.texi 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/doc/c-nds32.texi 2016-06-30 21:26:12.721895757 +0200
-@@ -0,0 +1,291 @@
-+@c Copyright 1991, 1992, 1993, 1994, 1995, 1997, 1999, 2000, 2001,
-+@c 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2013
-+@c Free Software Foundation, Inc.
-+@c This is part of the GAS manual.
-+@c For copying conditions, see the file as.texinfo.
-+@page
-+@node NDS32-Dependent
-+@chapter NDS32 Dependent Features
-+
-+@cindex NDS32 processor
-+The NDS32 processors family includes high-performance and low-power 32-bit
-+processors for high-end to low-end. @sc{gnu} @code{@value{AS}} for NDS32
-+architectures supports NDS32 ISA version 3. For detail about NDS32
-+instruction set, please see the AndeStar ISA User Manual which is availible
-+at http://www.andestech.com/en/index/index.htm
-+
-+@menu
-+* NDS32 Options:: Assembler options
-+* NDS32 Syntax:: High-level assembly macros
-+@end menu
-+
-+@node NDS32 Options
-+@section NDS32 Options
-+
-+@cindex NDS32 options
-+@cindex options for NDS32
-+The NDS32 configurations of @sc{gnu} @code{@value{AS}} support these
-+special options:
-+
-+@table @code
-+
-+@item -O1
-+Optimize for performance.
-+
-+@item -Os
-+Optimize for space.
-+
-+@item -EL
-+Produce little endian data output.
-+
-+@item -EB
-+Produce little endian data output.
-+
-+@item -mpic
-+Generate PIC.
-+
-+@item -mno-fp-as-gp-relax
-+Suppress fp-as-gp relaxation for this file.
-+
-+@item -mb2bb-relax
-+Back-to-back branch optimization.
-+
-+@item -mno-all-relax
-+Suppress all relaxation for this file.
-+
-+@item -march=<arch name>
-+Assemble for architecture <arch name> which could be v3, v3j, v3m, v3f,
-+v3s, v2, v2j, v2f, v2s.
-+
-+@item -mbaseline=<baseline>
-+Assemble for baseline <baseline> which could be v2, v3, v3m.
-+
-+@item -mfpu-freg=@var{FREG}
-+Specify a FPU configuration.
-+@table @code
-+@item 0 8 SP / 4 DP registers
-+@item 1 16 SP / 8 DP registers
-+@item 2 32 SP / 16 DP registers
-+@item 3 32 SP / 32 DP registers
-+@end table
-+
-+@item -mabi=@var{abi}
-+Specify a abi version <abi> could be v1, v2, v2fp, v2fpp.
-+
-+@item -m[no-]mac
-+Enable/Disable Multiply instructions support.
-+
-+@item -m[no-]div
-+Enable/Disable Divide instructions support.
-+
-+@item -m[no-]16bit-ext
-+Enable/Disable 16-bit extension
-+
-+@item -m[no-]dx-regs
-+Enable/Disable d0/d1 registers
-+
-+@item -m[no-]perf-ext
-+Enable/Disable Performance extension
-+
-+@item -m[no-]perf2-ext
-+Enable/Disable Performance extension 2
-+
-+@item -m[no-]string-ext
-+Enable/Disable String extension
-+
-+@item -m[no-]reduced-regs
-+Enable/Disable Reduced Register configuration (GPR16) option
-+
-+@item -m[no-]audio-isa-ext
-+Enable/Disable AUDIO ISA extension
-+
-+@item -m[no-]fpu-sp-ext
-+Enable/Disable FPU SP extension
-+
-+@item -m[no-]fpu-dp-ext
-+Enable/Disable FPU DP extension
-+
-+@item -m[no-]fpu-fma
-+Enable/Disable FPU fused-multiply-add instructions
-+
-+@item -mall-ext
-+Turn on all extensions and instructions support
-+@end table
-+
-+@node NDS32 Syntax
-+@section Syntax
-+
-+@menu
-+* NDS32-Chars:: Special Characters
-+* NDS32-Regs:: Register Names
-+* NDS32-Ops:: Pseudo Instructions
-+@end menu
-+
-+@node NDS32-Chars
-+@subsection Special Characters
-+
-+Use @samp{#} at column 1 and @samp{!} anywhere in the line except inside
-+quotes.
-+
-+Multiple instructions in a line are allowed though not recommended and
-+should be separated by @samp{;}.
-+
-+Assembler is not case-sensitive in general except user defined label.
-+For example, @samp{jral F1} is different from @samp{jral f1} while it is
-+the same as @samp{JRAL F1}.
-+
-+@node NDS32-Regs
-+@subsection Register Names
-+@table @code
-+@item General purpose registers (GPR)
-+There are 32 32-bit general purpose registers $r0 to $r31.
-+
-+@item Accumulators d0 and d1
-+64-bit accumulators: $d0.hi, $d0.lo, $d1.hi, and $d1.lo.
-+
-+@item Assembler reserved register $ta
-+Register $ta ($r15) is reserved for assembler using.
-+
-+@item Operating system reserved registers $p0 and $p1
-+Registers $p0 ($r26) and $p1 ($r27) are used by operating system as scratch
-+registers.
-+
-+@item Frame pointer $fp
-+Register $r28 is regarded as the frame pointer.
-+
-+@item Global pointer
-+Register $r29 is regarded as the global pointer.
-+
-+@item Link pointer
-+Register $r30 is regarded as the link pointer.
-+
-+@item Stack pointer
-+Register $r31 is regarded as the stack pointer.
-+@end table
-+
-+@node NDS32-Ops
-+@subsection Pseudo Instructions
-+@table @code
-+@item li rt5,imm32
-+load 32-bit integer into register rt5. @samp{sethi rt5,hi20(imm32)} and then
-+@samp{ori rt5,reg,lo12(imm32)}.
-+
-+@item la rt5,var
-+Load 32-bit address of var into register rt5. @samp{sethi rt5,hi20(var)} and
-+then @samp{ori reg,rt5,lo12(var)}
-+
-+@item l.[bhw] rt5,var
-+Load value of var into register rt5. @samp{sethi $ta,hi20(var)} and then
-+@samp{l[bhw]i rt5,[$ta+lo12(var)]}
-+
-+@item l.[bh]s rt5,var
-+Load value of var into register rt5. @samp{sethi $ta,hi20(var)} and then
-+@samp{l[bh]si rt5,[$ta+lo12(var)]}
-+
-+@item l.[bhw]p rt5,var,inc
-+Load value of var into register rt5 and increment $ta by amount inc.
-+@samp{la $ta,var} and then @samp{l[bhw]i.bi rt5,[$ta],inc}
-+
-+@item l.[bhw]pc rt5,inc
-+Continue loading value of var into register rt5 and increment $ta by amount inc.
-+@samp{l[bhw]i.bi rt5,[$ta],inc.}
-+
-+@item l.[bh]sp rt5,var,inc
-+Load value of var into register rt5 and increment $ta by amount inc.
-+@samp{la $ta,var} and then @samp{l[bh]si.bi rt5,[$ta],inc}
-+
-+@item l.[bh]spc rt5,inc
-+Continue loading value of var into register rt5 and increment $ta by amount inc.
-+@samp{l[bh]si.bi rt5,[$ta],inc.}
-+
-+@item s.[bhw] rt5,var
-+Store register rt5 to var.
-+@samp{sethi $ta,hi20(var)} and then @samp{s[bhw]i rt5,[$ta+lo12(var)]}
-+
-+@item s.[bhw]p rt5,var,inc
-+Store register rt5 to var and increment $ta by amount inc.
-+@samp{la $ta,var} and then @samp{s[bhw]i.bi rt5,[$ta],inc}
-+
-+@item s.[bhw]pc rt5,inc
-+Continue storing register rt5 to var and increment $ta by amount inc.
-+@samp{s[bhw]i.bi rt5,[$ta],inc.}
-+
-+@item not rt5,ra5
-+Alias of @samp{nor rt5,ra5,ra5}.
-+
-+@item neg rt5,ra5
-+Alias of @samp{subri rt5,ra5,0}.
-+
-+@item br rb5
-+Depending on how it is assembled, it is translated into @samp{r5 rb5}
-+or @samp{jr rb5}.
-+
-+@item b label
-+Branch to label depending on how it is assembled, it is translated into
-+@samp{j8 label}, @samp{j label}, or "@samp{la $ta,label} @samp{br $ta}".
-+
-+@item bral rb5
-+Alias of jral br5 depending on how it is assembled, it is translated
-+into @samp{jral5 rb5} or @samp{jral rb5}.
-+
-+@item bal fname
-+Alias of jal fname depending on how it is assembled, it is translated into
-+@samp{jal fname} or "@samp{la $ta,fname} @samp{bral $ta}".
-+
-+@item call fname
-+Call function fname same as @samp{jal fname}.
-+
-+@item move rt5,ra5
-+For 16-bit, this is @samp{mov55 rt5,ra5}.
-+For no 16-bit, this is @samp{ori rt5,ra5,0}.
-+
-+@item move rt5,var
-+This is the same as @samp{l.w rt5,var}.
-+
-+@item move rt5,imm32
-+This is the same as @samp{li rt5,imm32}.
-+
-+@item pushm ra5,rb5
-+Push contents of registers from ra5 to rb5 into stack.
-+
-+@item push ra5
-+Push content of register ra5 into stack. (same @samp{pushm ra5,ra5}).
-+
-+@item push.d var
-+Push value of double-word variable var into stack.
-+
-+@item push.w var
-+Push value of word variable var into stack.
-+
-+@item push.h var
-+Push value of half-word variable var into stack.
-+
-+@item push.b var
-+Push value of byte variable var into stack.
-+
-+@item pusha var
-+Push 32-bit address of variable var into stack.
-+
-+@item pushi imm32
-+Push 32-bit immediate value into stack.
-+
-+@item popm ra5,rb5
-+Pop top of stack values into registers ra5 to rb5.
-+
-+@item pop rt5
-+Pop top of stack value into register. (same as @samp{popm rt5,rt5}.)
-+
-+@item pop.d var,ra5
-+Pop value of double-word variable var from stack using register ra5
-+as 2nd scratch register. (1st is $ta)
-+
-+@item pop.w var,ra5
-+Pop value of word variable var from stack using register ra5.
-+
-+@item pop.h var,ra5
-+Pop value of half-word variable var from stack using register ra5.
-+
-+@item pop.b var,ra5
-+Pop value of byte variable var from stack using register ra5.
-+
-+@end table
-diff -Nur binutils-2.24.orig/gas/doc/Makefile.am binutils-2.24/gas/doc/Makefile.am
---- binutils-2.24.orig/gas/doc/Makefile.am 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/gas/doc/Makefile.am 2016-06-30 21:26:12.721895757 +0200
-@@ -75,6 +75,7 @@
- c-mt.texi \
- c-msp430.texi \
- c-nios2.texi \
-+ c-nds32.texi \
- c-ns32k.texi \
- c-pdp11.texi \
- c-pj.texi \
-diff -Nur binutils-2.24.orig/gas/doc/Makefile.in binutils-2.24/gas/doc/Makefile.in
---- binutils-2.24.orig/gas/doc/Makefile.in 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/gas/doc/Makefile.in 2016-06-30 21:26:12.725895913 +0200
-@@ -1,9 +1,9 @@
--# Makefile.in generated by automake 1.11.1 from Makefile.am.
-+# Makefile.in generated by automake 1.11.6 from Makefile.am.
- # @configure_input@
-
- # Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
--# 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation,
--# Inc.
-+# 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software
-+# Foundation, Inc.
- # This Makefile.in is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-@@ -33,6 +33,23 @@
- # <http://www.gnu.org/licenses/>.
- #
- VPATH = @srcdir@
-+am__make_dryrun = \
-+ { \
-+ am__dry=no; \
-+ case $$MAKEFLAGS in \
-+ *\\[\ \ ]*) \
-+ echo 'am--echo: ; @echo "AM" OK' | $(MAKE) -f - 2>/dev/null \
-+ | grep '^AM OK$$' >/dev/null || am__dry=yes;; \
-+ *) \
-+ for am__flg in $$MAKEFLAGS; do \
-+ case $$am__flg in \
-+ *=*|--*) ;; \
-+ *n*) am__dry=yes; break;; \
-+ esac; \
-+ done;; \
-+ esac; \
-+ test $$am__dry = yes; \
-+ }
- pkgdatadir = $(datadir)/@PACKAGE@
- pkgincludedir = $(includedir)/@PACKAGE@
- pkglibdir = $(libdir)/@PACKAGE@
-@@ -94,6 +111,11 @@
- MAKEINFOHTML = $(MAKEINFO) --html
- AM_MAKEINFOHTMLFLAGS = $(AM_MAKEINFOFLAGS)
- DVIPS = dvips
-+am__can_run_installinfo = \
-+ case $$AM_UPDATE_INFO_DIR in \
-+ n|no|NO) false;; \
-+ *) (install-info --version) >/dev/null 2>&1;; \
-+ esac
- am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`;
- am__vpath_adj = case $$p in \
- $(srcdir)/*) f=`echo "$$p" | sed "s|^$$srcdirstrip/||"`;; \
-@@ -115,6 +137,12 @@
- am__base_list = \
- sed '$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;s/\n/ /g' | \
- sed '$$!N;$$!N;$$!N;$$!N;s/\n/ /g'
-+am__uninstall_files_from_dir = { \
-+ test -z "$$files" \
-+ || { test ! -d "$$dir" && test ! -f "$$dir" && test ! -r "$$dir"; } \
-+ || { echo " ( cd '$$dir' && rm -f" $$files ")"; \
-+ $(am__cd) "$$dir" && rm -f $$files; }; \
-+ }
- man1dir = $(mandir)/man1
- am__installdirs = "$(DESTDIR)$(man1dir)"
- NROFF = nroff
-@@ -317,6 +345,7 @@
- c-mt.texi \
- c-msp430.texi \
- c-nios2.texi \
-+ c-nds32.texi \
- c-ns32k.texi \
- c-pdp11.texi \
- c-pj.texi \
-@@ -458,9 +487,7 @@
-
- uninstall-info-am:
- @$(PRE_UNINSTALL)
-- @if test -d '$(DESTDIR)$(infodir)' && \
-- (install-info --version && \
-- install-info --version 2>&1 | sed 1q | grep -i -v debian) >/dev/null 2>&1; then \
-+ @if test -d '$(DESTDIR)$(infodir)' && $(am__can_run_installinfo); then \
- list='$(INFO_DEPS)'; \
- for file in $$list; do \
- relfile=`echo "$$file" | sed 's|^.*/||'`; \
-@@ -534,11 +561,18 @@
- clean-info: mostlyclean-aminfo clean-aminfo
- install-man1: $(man_MANS)
- @$(NORMAL_INSTALL)
-- test -z "$(man1dir)" || $(MKDIR_P) "$(DESTDIR)$(man1dir)"
-- @list=''; test -n "$(man1dir)" || exit 0; \
-- { for i in $$list; do echo "$$i"; done; \
-- l2='$(man_MANS)'; for i in $$l2; do echo "$$i"; done | \
-- sed -n '/\.1[a-z]*$$/p'; \
-+ @list1=''; \
-+ list2='$(man_MANS)'; \
-+ test -n "$(man1dir)" \
-+ && test -n "`echo $$list1$$list2`" \
-+ || exit 0; \
-+ echo " $(MKDIR_P) '$(DESTDIR)$(man1dir)'"; \
-+ $(MKDIR_P) "$(DESTDIR)$(man1dir)" || exit 1; \
-+ { for i in $$list1; do echo "$$i"; done; \
-+ if test -n "$$list2"; then \
-+ for i in $$list2; do echo "$$i"; done \
-+ | sed -n '/\.1[a-z]*$$/p'; \
-+ fi; \
- } | while read p; do \
- if test -f $$p; then d=; else d="$(srcdir)/"; fi; \
- echo "$$d$$p"; echo "$$p"; \
-@@ -567,9 +601,7 @@
- sed -n '/\.1[a-z]*$$/p'; \
- } | sed -e 's,.*/,,;h;s,.*\.,,;s,^[^1][0-9a-z]*$$,1,;x' \
- -e 's,\.[0-9a-z]*$$,,;$(transform);G;s,\n,.,'`; \
-- test -z "$$files" || { \
-- echo " ( cd '$(DESTDIR)$(man1dir)' && rm -f" $$files ")"; \
-- cd "$(DESTDIR)$(man1dir)" && rm -f $$files; }
-+ dir='$(DESTDIR)$(man1dir)'; $(am__uninstall_files_from_dir)
- tags: TAGS
- TAGS:
-
-@@ -593,10 +625,15 @@
-
- installcheck: installcheck-am
- install-strip:
-- $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
-- install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
-- `test -z '$(STRIP)' || \
-- echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
-+ if test -z '$(STRIP)'; then \
-+ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
-+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
-+ install; \
-+ else \
-+ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
-+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
-+ "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \
-+ fi
- mostlyclean-generic:
-
- clean-generic:
-@@ -636,8 +673,11 @@
-
- install-dvi-am: $(DVIS)
- @$(NORMAL_INSTALL)
-- test -z "$(dvidir)" || $(MKDIR_P) "$(DESTDIR)$(dvidir)"
- @list='$(DVIS)'; test -n "$(dvidir)" || list=; \
-+ if test -n "$$list"; then \
-+ echo " $(MKDIR_P) '$(DESTDIR)$(dvidir)'"; \
-+ $(MKDIR_P) "$(DESTDIR)$(dvidir)" || exit 1; \
-+ fi; \
- for p in $$list; do \
- if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
- echo "$$d$$p"; \
-@@ -652,18 +692,22 @@
-
- install-html-am: $(HTMLS)
- @$(NORMAL_INSTALL)
-- test -z "$(htmldir)" || $(MKDIR_P) "$(DESTDIR)$(htmldir)"
- @list='$(HTMLS)'; list2=; test -n "$(htmldir)" || list=; \
-+ if test -n "$$list"; then \
-+ echo " $(MKDIR_P) '$(DESTDIR)$(htmldir)'"; \
-+ $(MKDIR_P) "$(DESTDIR)$(htmldir)" || exit 1; \
-+ fi; \
- for p in $$list; do \
- if test -f "$$p" || test -d "$$p"; then d=; else d="$(srcdir)/"; fi; \
- $(am__strip_dir) \
-- if test -d "$$d$$p"; then \
-+ d2=$$d$$p; \
-+ if test -d "$$d2"; then \
- echo " $(MKDIR_P) '$(DESTDIR)$(htmldir)/$$f'"; \
- $(MKDIR_P) "$(DESTDIR)$(htmldir)/$$f" || exit 1; \
-- echo " $(INSTALL_DATA) '$$d$$p'/* '$(DESTDIR)$(htmldir)/$$f'"; \
-- $(INSTALL_DATA) "$$d$$p"/* "$(DESTDIR)$(htmldir)/$$f" || exit $$?; \
-+ echo " $(INSTALL_DATA) '$$d2'/* '$(DESTDIR)$(htmldir)/$$f'"; \
-+ $(INSTALL_DATA) "$$d2"/* "$(DESTDIR)$(htmldir)/$$f" || exit $$?; \
- else \
-- list2="$$list2 $$d$$p"; \
-+ list2="$$list2 $$d2"; \
- fi; \
- done; \
- test -z "$$list2" || { echo "$$list2" | $(am__base_list) | \
-@@ -675,9 +719,12 @@
-
- install-info-am: $(INFO_DEPS)
- @$(NORMAL_INSTALL)
-- test -z "$(infodir)" || $(MKDIR_P) "$(DESTDIR)$(infodir)"
- @srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`; \
- list='$(INFO_DEPS)'; test -n "$(infodir)" || list=; \
-+ if test -n "$$list"; then \
-+ echo " $(MKDIR_P) '$(DESTDIR)$(infodir)'"; \
-+ $(MKDIR_P) "$(DESTDIR)$(infodir)" || exit 1; \
-+ fi; \
- for file in $$list; do \
- case $$file in \
- $(srcdir)/*) file=`echo "$$file" | sed "s|^$$srcdirstrip/||"`;; \
-@@ -695,8 +742,7 @@
- echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(infodir)'"; \
- $(INSTALL_DATA) $$files "$(DESTDIR)$(infodir)" || exit $$?; done
- @$(POST_INSTALL)
-- @if (install-info --version && \
-- install-info --version 2>&1 | sed 1q | grep -i -v debian) >/dev/null 2>&1; then \
-+ @if $(am__can_run_installinfo); then \
- list='$(INFO_DEPS)'; test -n "$(infodir)" || list=; \
- for file in $$list; do \
- relfile=`echo "$$file" | sed 's|^.*/||'`; \
-@@ -710,8 +756,11 @@
-
- install-pdf-am: $(PDFS)
- @$(NORMAL_INSTALL)
-- test -z "$(pdfdir)" || $(MKDIR_P) "$(DESTDIR)$(pdfdir)"
- @list='$(PDFS)'; test -n "$(pdfdir)" || list=; \
-+ if test -n "$$list"; then \
-+ echo " $(MKDIR_P) '$(DESTDIR)$(pdfdir)'"; \
-+ $(MKDIR_P) "$(DESTDIR)$(pdfdir)" || exit 1; \
-+ fi; \
- for p in $$list; do \
- if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
- echo "$$d$$p"; \
-@@ -723,8 +772,11 @@
-
- install-ps-am: $(PSS)
- @$(NORMAL_INSTALL)
-- test -z "$(psdir)" || $(MKDIR_P) "$(DESTDIR)$(psdir)"
- @list='$(PSS)'; test -n "$(psdir)" || list=; \
-+ if test -n "$$list"; then \
-+ echo " $(MKDIR_P) '$(DESTDIR)$(psdir)'"; \
-+ $(MKDIR_P) "$(DESTDIR)$(psdir)" || exit 1; \
-+ fi; \
- for p in $$list; do \
- if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
- echo "$$d$$p"; \
-diff -Nur binutils-2.24.orig/gas/expr.c binutils-2.24/gas/expr.c
---- binutils-2.24.orig/gas/expr.c 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/gas/expr.c 2016-06-30 21:26:12.725895913 +0200
-@@ -1024,7 +1024,8 @@
- /* input_line_pointer -> char after operand. */
- if (c == '-')
- {
-- expressionP->X_add_number = - expressionP->X_add_number;
-+ expressionP->X_add_number
-+ = - (addressT) expressionP->X_add_number;
- /* Notice: '-' may overflow: no warning is given.
- This is compatible with other people's
- assemblers. Sigh. */
-diff -Nur binutils-2.24.orig/gas/itbl-lex.c binutils-2.24/gas/itbl-lex.c
---- binutils-2.24.orig/gas/itbl-lex.c 2013-11-18 09:49:28.000000000 +0100
-+++ binutils-2.24/gas/itbl-lex.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,1925 +0,0 @@
--
--#line 3 "itbl-lex.c"
--
--#define YY_INT_ALIGNED short int
--
--/* A lexical scanner generated by flex */
--
--#define FLEX_SCANNER
--#define YY_FLEX_MAJOR_VERSION 2
--#define YY_FLEX_MINOR_VERSION 5
--#define YY_FLEX_SUBMINOR_VERSION 35
--#if YY_FLEX_SUBMINOR_VERSION > 0
--#define FLEX_BETA
--#endif
--
--/* First, we deal with platform-specific or compiler-specific issues. */
--
--/* begin standard C headers. */
--#include <stdio.h>
--#include <string.h>
--#include <errno.h>
--#include <stdlib.h>
--
--/* end standard C headers. */
--
--/* flex integer type definitions */
--
--#ifndef FLEXINT_H
--#define FLEXINT_H
--
--/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */
--
--#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
--
--/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
-- * if you want the limit (max/min) macros for int types.
-- */
--#ifndef __STDC_LIMIT_MACROS
--#define __STDC_LIMIT_MACROS 1
--#endif
--
--#include <inttypes.h>
--typedef int8_t flex_int8_t;
--typedef uint8_t flex_uint8_t;
--typedef int16_t flex_int16_t;
--typedef uint16_t flex_uint16_t;
--typedef int32_t flex_int32_t;
--typedef uint32_t flex_uint32_t;
--typedef uint64_t flex_uint64_t;
--#else
--typedef signed char flex_int8_t;
--typedef short int flex_int16_t;
--typedef int flex_int32_t;
--typedef unsigned char flex_uint8_t;
--typedef unsigned short int flex_uint16_t;
--typedef unsigned int flex_uint32_t;
--#endif /* ! C99 */
--
--/* Limits of integral types. */
--#ifndef INT8_MIN
--#define INT8_MIN (-128)
--#endif
--#ifndef INT16_MIN
--#define INT16_MIN (-32767-1)
--#endif
--#ifndef INT32_MIN
--#define INT32_MIN (-2147483647-1)
--#endif
--#ifndef INT8_MAX
--#define INT8_MAX (127)
--#endif
--#ifndef INT16_MAX
--#define INT16_MAX (32767)
--#endif
--#ifndef INT32_MAX
--#define INT32_MAX (2147483647)
--#endif
--#ifndef UINT8_MAX
--#define UINT8_MAX (255U)
--#endif
--#ifndef UINT16_MAX
--#define UINT16_MAX (65535U)
--#endif
--#ifndef UINT32_MAX
--#define UINT32_MAX (4294967295U)
--#endif
--
--#endif /* ! FLEXINT_H */
--
--#ifdef __cplusplus
--
--/* The "const" storage-class-modifier is valid. */
--#define YY_USE_CONST
--
--#else /* ! __cplusplus */
--
--/* C99 requires __STDC__ to be defined as 1. */
--#if defined (__STDC__)
--
--#define YY_USE_CONST
--
--#endif /* defined (__STDC__) */
--#endif /* ! __cplusplus */
--
--#ifdef YY_USE_CONST
--#define yyconst const
--#else
--#define yyconst
--#endif
--
--/* Returned upon end-of-file. */
--#define YY_NULL 0
--
--/* Promotes a possibly negative, possibly signed char to an unsigned
-- * integer for use as an array index. If the signed char is negative,
-- * we want to instead treat it as an 8-bit unsigned char, hence the
-- * double cast.
-- */
--#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c)
--
--/* Enter a start condition. This macro really ought to take a parameter,
-- * but we do it the disgusting crufty way forced on us by the ()-less
-- * definition of BEGIN.
-- */
--#define BEGIN (yy_start) = 1 + 2 *
--
--/* Translate the current start state into a value that can be later handed
-- * to BEGIN to return to the state. The YYSTATE alias is for lex
-- * compatibility.
-- */
--#define YY_START (((yy_start) - 1) / 2)
--#define YYSTATE YY_START
--
--/* Action number for EOF rule of a given start state. */
--#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1)
--
--/* Special action meaning "start processing a new file". */
--#define YY_NEW_FILE yyrestart(yyin )
--
--#define YY_END_OF_BUFFER_CHAR 0
--
--/* Size of default input buffer. */
--#ifndef YY_BUF_SIZE
--#define YY_BUF_SIZE 16384
--#endif
--
--/* The state buf must be large enough to hold one state per character in the main buffer.
-- */
--#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type))
--
--#ifndef YY_TYPEDEF_YY_BUFFER_STATE
--#define YY_TYPEDEF_YY_BUFFER_STATE
--typedef struct yy_buffer_state *YY_BUFFER_STATE;
--#endif
--
--#ifndef YY_TYPEDEF_YY_SIZE_T
--#define YY_TYPEDEF_YY_SIZE_T
--typedef size_t yy_size_t;
--#endif
--
--extern yy_size_t yyleng;
--
--extern FILE *yyin, *yyout;
--
--#define EOB_ACT_CONTINUE_SCAN 0
--#define EOB_ACT_END_OF_FILE 1
--#define EOB_ACT_LAST_MATCH 2
--
-- #define YY_LESS_LINENO(n)
--
--/* Return all but the first "n" matched characters back to the input stream. */
--#define yyless(n) \
-- do \
-- { \
-- /* Undo effects of setting up yytext. */ \
-- int yyless_macro_arg = (n); \
-- YY_LESS_LINENO(yyless_macro_arg);\
-- *yy_cp = (yy_hold_char); \
-- YY_RESTORE_YY_MORE_OFFSET \
-- (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \
-- YY_DO_BEFORE_ACTION; /* set up yytext again */ \
-- } \
-- while ( 0 )
--
--#define unput(c) yyunput( c, (yytext_ptr) )
--
--#ifndef YY_STRUCT_YY_BUFFER_STATE
--#define YY_STRUCT_YY_BUFFER_STATE
--struct yy_buffer_state
-- {
-- FILE *yy_input_file;
--
-- char *yy_ch_buf; /* input buffer */
-- char *yy_buf_pos; /* current position in input buffer */
--
-- /* Size of input buffer in bytes, not including room for EOB
-- * characters.
-- */
-- yy_size_t yy_buf_size;
--
-- /* Number of characters read into yy_ch_buf, not including EOB
-- * characters.
-- */
-- yy_size_t yy_n_chars;
--
-- /* Whether we "own" the buffer - i.e., we know we created it,
-- * and can realloc() it to grow it, and should free() it to
-- * delete it.
-- */
-- int yy_is_our_buffer;
--
-- /* Whether this is an "interactive" input source; if so, and
-- * if we're using stdio for input, then we want to use getc()
-- * instead of fread(), to make sure we stop fetching input after
-- * each newline.
-- */
-- int yy_is_interactive;
--
-- /* Whether we're considered to be at the beginning of a line.
-- * If so, '^' rules will be active on the next match, otherwise
-- * not.
-- */
-- int yy_at_bol;
--
-- int yy_bs_lineno; /**< The line count. */
-- int yy_bs_column; /**< The column count. */
--
-- /* Whether to try to fill the input buffer when we reach the
-- * end of it.
-- */
-- int yy_fill_buffer;
--
-- int yy_buffer_status;
--
--#define YY_BUFFER_NEW 0
--#define YY_BUFFER_NORMAL 1
-- /* When an EOF's been seen but there's still some text to process
-- * then we mark the buffer as YY_EOF_PENDING, to indicate that we
-- * shouldn't try reading from the input source any more. We might
-- * still have a bunch of tokens to match, though, because of
-- * possible backing-up.
-- *
-- * When we actually see the EOF, we change the status to "new"
-- * (via yyrestart()), so that the user can continue scanning by
-- * just pointing yyin at a new input file.
-- */
--#define YY_BUFFER_EOF_PENDING 2
--
-- };
--#endif /* !YY_STRUCT_YY_BUFFER_STATE */
--
--/* Stack of input buffers. */
--static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */
--static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */
--static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */
--
--/* We provide macros for accessing buffer states in case in the
-- * future we want to put the buffer states in a more general
-- * "scanner state".
-- *
-- * Returns the top of the stack, or NULL.
-- */
--#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \
-- ? (yy_buffer_stack)[(yy_buffer_stack_top)] \
-- : NULL)
--
--/* Same as previous macro, but useful when we know that the buffer stack is not
-- * NULL or when we need an lvalue. For internal use only.
-- */
--#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)]
--
--/* yy_hold_char holds the character lost when yytext is formed. */
--static char yy_hold_char;
--static yy_size_t yy_n_chars; /* number of characters read into yy_ch_buf */
--yy_size_t yyleng;
--
--/* Points to current character in buffer. */
--static char *yy_c_buf_p = (char *) 0;
--static int yy_init = 0; /* whether we need to initialize */
--static int yy_start = 0; /* start state number */
--
--/* Flag which is used to allow yywrap()'s to do buffer switches
-- * instead of setting up a fresh yyin. A bit of a hack ...
-- */
--static int yy_did_buffer_switch_on_eof;
--
--void yyrestart (FILE *input_file );
--void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer );
--YY_BUFFER_STATE yy_create_buffer (FILE *file,int size );
--void yy_delete_buffer (YY_BUFFER_STATE b );
--void yy_flush_buffer (YY_BUFFER_STATE b );
--void yypush_buffer_state (YY_BUFFER_STATE new_buffer );
--void yypop_buffer_state (void );
--
--static void yyensure_buffer_stack (void );
--static void yy_load_buffer_state (void );
--static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file );
--
--#define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER )
--
--YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size );
--YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str );
--YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,yy_size_t len );
--
--void *yyalloc (yy_size_t );
--void *yyrealloc (void *,yy_size_t );
--void yyfree (void * );
--
--#define yy_new_buffer yy_create_buffer
--
--#define yy_set_interactive(is_interactive) \
-- { \
-- if ( ! YY_CURRENT_BUFFER ){ \
-- yyensure_buffer_stack (); \
-- YY_CURRENT_BUFFER_LVALUE = \
-- yy_create_buffer(yyin,YY_BUF_SIZE ); \
-- } \
-- YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \
-- }
--
--#define yy_set_bol(at_bol) \
-- { \
-- if ( ! YY_CURRENT_BUFFER ){\
-- yyensure_buffer_stack (); \
-- YY_CURRENT_BUFFER_LVALUE = \
-- yy_create_buffer(yyin,YY_BUF_SIZE ); \
-- } \
-- YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \
-- }
--
--#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol)
--
--/* Begin user sect3 */
--
--typedef unsigned char YY_CHAR;
--
--FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0;
--
--typedef int yy_state_type;
--
--extern int yylineno;
--
--int yylineno = 1;
--
--extern char *yytext;
--#define yytext_ptr yytext
--
--static yy_state_type yy_get_previous_state (void );
--static yy_state_type yy_try_NUL_trans (yy_state_type current_state );
--static int yy_get_next_buffer (void );
--static void yy_fatal_error (yyconst char msg[] );
--
--/* Done after the current pattern has been matched and before the
-- * corresponding action - sets up yytext.
-- */
--#define YY_DO_BEFORE_ACTION \
-- (yytext_ptr) = yy_bp; \
-- yyleng = (yy_size_t) (yy_cp - yy_bp); \
-- (yy_hold_char) = *yy_cp; \
-- *yy_cp = '\0'; \
-- (yy_c_buf_p) = yy_cp;
--
--#define YY_NUM_RULES 15
--#define YY_END_OF_BUFFER 16
--/* This struct is not used in this scanner,
-- but its presence is necessary. */
--struct yy_trans_info
-- {
-- flex_int32_t yy_verify;
-- flex_int32_t yy_nxt;
-- };
--static yyconst flex_int16_t yy_accept[60] =
-- { 0,
-- 0, 0, 16, 14, 13, 12, 11, 8, 8, 10,
-- 10, 10, 10, 10, 10, 10, 10, 10, 10, 10,
-- 10, 8, 0, 10, 10, 10, 10, 10, 10, 10,
-- 10, 10, 10, 10, 10, 10, 7, 9, 10, 10,
-- 10, 10, 10, 10, 10, 10, 10, 10, 10, 10,
-- 5, 1, 2, 3, 10, 6, 10, 4, 0
-- } ;
--
--static yyconst flex_int32_t yy_ec[256] =
-- { 0,
-- 1, 1, 1, 1, 1, 1, 1, 1, 2, 3,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 4, 1, 1, 5, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 6, 7, 7,
-- 7, 7, 7, 7, 7, 7, 7, 1, 8, 1,
-- 1, 1, 1, 1, 9, 10, 11, 12, 13, 10,
-- 14, 15, 16, 15, 15, 15, 17, 18, 15, 15,
-- 15, 19, 20, 15, 15, 15, 15, 15, 15, 15,
-- 1, 1, 1, 1, 15, 1, 21, 10, 22, 23,
--
-- 24, 10, 25, 15, 26, 15, 15, 15, 27, 28,
-- 15, 29, 15, 30, 31, 15, 15, 15, 15, 32,
-- 15, 15, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
--
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1
-- } ;
--
--static yyconst flex_int32_t yy_meta[33] =
-- { 0,
-- 1, 1, 1, 1, 1, 2, 2, 1, 2, 2,
-- 2, 2, 2, 3, 3, 3, 3, 3, 3, 3,
-- 2, 2, 2, 2, 3, 3, 3, 3, 3, 3,
-- 3, 3
-- } ;
--
--static yyconst flex_int16_t yy_base[62] =
-- { 0,
-- 0, 0, 83, 84, 84, 84, 84, 27, 29, 70,
-- 0, 62, 61, 60, 20, 55, 47, 46, 45, 12,
-- 35, 37, 0, 0, 62, 60, 59, 58, 53, 49,
-- 45, 43, 42, 41, 37, 32, 0, 0, 43, 44,
-- 43, 42, 42, 36, 23, 27, 26, 25, 25, 20,
-- 0, 0, 0, 0, 35, 0, 23, 0, 84, 58,
-- 43
-- } ;
--
--static yyconst flex_int16_t yy_def[62] =
-- { 0,
-- 59, 1, 59, 59, 59, 59, 59, 59, 59, 60,
-- 60, 60, 60, 60, 60, 60, 60, 60, 60, 60,
-- 60, 59, 61, 60, 60, 60, 60, 60, 60, 60,
-- 60, 60, 60, 60, 60, 60, 60, 61, 60, 60,
-- 60, 60, 60, 60, 60, 60, 60, 60, 60, 60,
-- 60, 60, 60, 60, 60, 60, 60, 60, 0, 59,
-- 59
-- } ;
--
--static yyconst flex_int16_t yy_nxt[117] =
-- { 0,
-- 4, 5, 6, 5, 7, 8, 9, 7, 10, 11,
-- 12, 13, 11, 14, 11, 15, 11, 11, 11, 11,
-- 16, 17, 18, 11, 19, 20, 11, 11, 21, 11,
-- 11, 11, 22, 22, 22, 22, 29, 30, 35, 36,
-- 37, 37, 22, 22, 38, 58, 58, 56, 57, 54,
-- 53, 52, 51, 56, 55, 54, 53, 52, 23, 24,
-- 24, 51, 50, 49, 48, 47, 46, 45, 44, 43,
-- 42, 41, 40, 39, 34, 33, 32, 31, 28, 27,
-- 26, 25, 59, 3, 59, 59, 59, 59, 59, 59,
-- 59, 59, 59, 59, 59, 59, 59, 59, 59, 59,
--
-- 59, 59, 59, 59, 59, 59, 59, 59, 59, 59,
-- 59, 59, 59, 59, 59, 59
-- } ;
--
--static yyconst flex_int16_t yy_chk[117] =
-- { 0,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 8, 8, 9, 9, 15, 15, 20, 20,
-- 21, 21, 22, 22, 61, 57, 55, 50, 49, 48,
-- 47, 46, 45, 44, 43, 42, 41, 40, 8, 60,
-- 60, 39, 36, 35, 34, 33, 32, 31, 30, 29,
-- 28, 27, 26, 25, 19, 18, 17, 16, 14, 13,
-- 12, 10, 3, 59, 59, 59, 59, 59, 59, 59,
-- 59, 59, 59, 59, 59, 59, 59, 59, 59, 59,
--
-- 59, 59, 59, 59, 59, 59, 59, 59, 59, 59,
-- 59, 59, 59, 59, 59, 59
-- } ;
--
--static yy_state_type yy_last_accepting_state;
--static char *yy_last_accepting_cpos;
--
--extern int yy_flex_debug;
--int yy_flex_debug = 0;
--
--/* The intent behind this definition is that it'll catch
-- * any uses of REJECT which flex missed.
-- */
--#define REJECT reject_used_but_not_detected
--#define yymore() yymore_used_but_not_detected
--#define YY_MORE_ADJ 0
--#define YY_RESTORE_YY_MORE_OFFSET
--char *yytext;
--#line 1 "itbl-lex.l"
--/* itbl-lex.l
-- Copyright 1997, 1998, 2001, 2002, 2005, 2006, 2007
-- Free Software Foundation, Inc.
--
-- This file is part of GAS, the GNU Assembler.
--
-- GAS is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 3, or (at your option)
-- any later version.
--
-- GAS is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with GAS; see the file COPYING. If not, write to the Free
-- Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
-- 02110-1301, USA. */
--#line 23 "itbl-lex.l"
--#include "as.h"
--#include "itbl-lex.h"
--#include <itbl-parse.h>
--
--#ifdef DEBUG
--#define DBG(x) printf x
--#define MDBG(x) printf x
--#else
--#define DBG(x)
--#define MDBG(x)
--#endif
--
--int insntbl_line = 1;
--#line 528 "itbl-lex.c"
--
--#define INITIAL 0
--
--#ifndef YY_NO_UNISTD_H
--/* Special case for "unistd.h", since it is non-ANSI. We include it way
-- * down here because we want the user's section 1 to have been scanned first.
-- * The user has a chance to override it with an option.
-- */
--#include <unistd.h>
--#endif
--
--#ifndef YY_EXTRA_TYPE
--#define YY_EXTRA_TYPE void *
--#endif
--
--static int yy_init_globals (void );
--
--/* Accessor methods to globals.
-- These are made visible to non-reentrant scanners for convenience. */
--
--int yylex_destroy (void );
--
--int yyget_debug (void );
--
--void yyset_debug (int debug_flag );
--
--YY_EXTRA_TYPE yyget_extra (void );
--
--void yyset_extra (YY_EXTRA_TYPE user_defined );
--
--FILE *yyget_in (void );
--
--void yyset_in (FILE * in_str );
--
--FILE *yyget_out (void );
--
--void yyset_out (FILE * out_str );
--
--yy_size_t yyget_leng (void );
--
--char *yyget_text (void );
--
--int yyget_lineno (void );
--
--void yyset_lineno (int line_number );
--
--/* Macros after this point can all be overridden by user definitions in
-- * section 1.
-- */
--
--#ifndef YY_SKIP_YYWRAP
--#ifdef __cplusplus
--extern "C" int yywrap (void );
--#else
--extern int yywrap (void );
--#endif
--#endif
--
-- static void yyunput (int c,char *buf_ptr );
--
--#ifndef yytext_ptr
--static void yy_flex_strncpy (char *,yyconst char *,int );
--#endif
--
--#ifdef YY_NEED_STRLEN
--static int yy_flex_strlen (yyconst char * );
--#endif
--
--#ifndef YY_NO_INPUT
--
--#ifdef __cplusplus
--static int yyinput (void );
--#else
--static int input (void );
--#endif
--
--#endif
--
--/* Amount of stuff to slurp up with each read. */
--#ifndef YY_READ_BUF_SIZE
--#define YY_READ_BUF_SIZE 8192
--#endif
--
--/* Copy whatever the last rule matched to the standard output. */
--#ifndef ECHO
--/* This used to be an fputs(), but since the string might contain NUL's,
-- * we now use fwrite().
-- */
--#define ECHO fwrite( yytext, yyleng, 1, yyout )
--#endif
--
--/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL,
-- * is returned in "result".
-- */
--#ifndef YY_INPUT
--#define YY_INPUT(buf,result,max_size) \
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \
-- { \
-- int c = '*'; \
-- yy_size_t n; \
-- for ( n = 0; n < max_size && \
-- (c = getc( yyin )) != EOF && c != '\n'; ++n ) \
-- buf[n] = (char) c; \
-- if ( c == '\n' ) \
-- buf[n++] = (char) c; \
-- if ( c == EOF && ferror( yyin ) ) \
-- YY_FATAL_ERROR( "input in flex scanner failed" ); \
-- result = n; \
-- } \
-- else \
-- { \
-- errno=0; \
-- while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \
-- { \
-- if( errno != EINTR) \
-- { \
-- YY_FATAL_ERROR( "input in flex scanner failed" ); \
-- break; \
-- } \
-- errno=0; \
-- clearerr(yyin); \
-- } \
-- }\
--\
--
--#endif
--
--/* No semi-colon after return; correct usage is to write "yyterminate();" -
-- * we don't want an extra ';' after the "return" because that will cause
-- * some compilers to complain about unreachable statements.
-- */
--#ifndef yyterminate
--#define yyterminate() return YY_NULL
--#endif
--
--/* Number of entries by which start-condition stack grows. */
--#ifndef YY_START_STACK_INCR
--#define YY_START_STACK_INCR 25
--#endif
--
--/* Report a fatal error. */
--#ifndef YY_FATAL_ERROR
--#define YY_FATAL_ERROR(msg) yy_fatal_error( msg )
--#endif
--
--/* end tables serialization structures and prototypes */
--
--/* Default declaration of generated scanner - a define so the user can
-- * easily add parameters.
-- */
--#ifndef YY_DECL
--#define YY_DECL_IS_OURS 1
--
--extern int yylex (void);
--
--#define YY_DECL int yylex (void)
--#endif /* !YY_DECL */
--
--/* Code executed at the beginning of each rule, after yytext and yyleng
-- * have been set up.
-- */
--#ifndef YY_USER_ACTION
--#define YY_USER_ACTION
--#endif
--
--/* Code executed at the end of each rule. */
--#ifndef YY_BREAK
--#define YY_BREAK break;
--#endif
--
--#define YY_RULE_SETUP \
-- YY_USER_ACTION
--
--/** The main scanner function which does all the work.
-- */
--YY_DECL
--{
-- register yy_state_type yy_current_state;
-- register char *yy_cp, *yy_bp;
-- register int yy_act;
--
--#line 43 "itbl-lex.l"
--
--
--#line 713 "itbl-lex.c"
--
-- if ( !(yy_init) )
-- {
-- (yy_init) = 1;
--
--#ifdef YY_USER_INIT
-- YY_USER_INIT;
--#endif
--
-- if ( ! (yy_start) )
-- (yy_start) = 1; /* first start state */
--
-- if ( ! yyin )
-- yyin = stdin;
--
-- if ( ! yyout )
-- yyout = stdout;
--
-- if ( ! YY_CURRENT_BUFFER ) {
-- yyensure_buffer_stack ();
-- YY_CURRENT_BUFFER_LVALUE =
-- yy_create_buffer(yyin,YY_BUF_SIZE );
-- }
--
-- yy_load_buffer_state( );
-- }
--
-- while ( 1 ) /* loops until end-of-file is reached */
-- {
-- yy_cp = (yy_c_buf_p);
--
-- /* Support of yytext. */
-- *yy_cp = (yy_hold_char);
--
-- /* yy_bp points to the position in yy_ch_buf of the start of
-- * the current run.
-- */
-- yy_bp = yy_cp;
--
-- yy_current_state = (yy_start);
--yy_match:
-- do
-- {
-- register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)];
-- if ( yy_accept[yy_current_state] )
-- {
-- (yy_last_accepting_state) = yy_current_state;
-- (yy_last_accepting_cpos) = yy_cp;
-- }
-- while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
-- {
-- yy_current_state = (int) yy_def[yy_current_state];
-- if ( yy_current_state >= 60 )
-- yy_c = yy_meta[(unsigned int) yy_c];
-- }
-- yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-- ++yy_cp;
-- }
-- while ( yy_base[yy_current_state] != 84 );
--
--yy_find_action:
-- yy_act = yy_accept[yy_current_state];
-- if ( yy_act == 0 )
-- { /* have to back up */
-- yy_cp = (yy_last_accepting_cpos);
-- yy_current_state = (yy_last_accepting_state);
-- yy_act = yy_accept[yy_current_state];
-- }
--
-- YY_DO_BEFORE_ACTION;
--
--do_action: /* This label is used only to access EOF actions. */
--
-- switch ( yy_act )
-- { /* beginning of action switch */
-- case 0: /* must back up */
-- /* undo the effects of YY_DO_BEFORE_ACTION */
-- *yy_cp = (yy_hold_char);
-- yy_cp = (yy_last_accepting_cpos);
-- yy_current_state = (yy_last_accepting_state);
-- goto yy_find_action;
--
--case 1:
--YY_RULE_SETUP
--#line 45 "itbl-lex.l"
--{
-- return CREG;
-- }
-- YY_BREAK
--case 2:
--YY_RULE_SETUP
--#line 48 "itbl-lex.l"
--{
-- return DREG;
-- }
-- YY_BREAK
--case 3:
--YY_RULE_SETUP
--#line 51 "itbl-lex.l"
--{
-- return GREG;
-- }
-- YY_BREAK
--case 4:
--YY_RULE_SETUP
--#line 54 "itbl-lex.l"
--{
-- return IMMED;
-- }
-- YY_BREAK
--case 5:
--YY_RULE_SETUP
--#line 57 "itbl-lex.l"
--{
-- return ADDR;
-- }
-- YY_BREAK
--case 6:
--YY_RULE_SETUP
--#line 60 "itbl-lex.l"
--{
-- return INSN;
-- }
-- YY_BREAK
--case 7:
--YY_RULE_SETUP
--#line 63 "itbl-lex.l"
--{
-- yytext[yyleng] = 0;
-- yylval.processor = strtoul (yytext+1, 0, 0);
-- return PNUM;
-- }
-- YY_BREAK
--case 8:
--YY_RULE_SETUP
--#line 68 "itbl-lex.l"
--{
-- yytext[yyleng] = 0;
-- yylval.num = strtoul (yytext, 0, 0);
-- return NUM;
-- }
-- YY_BREAK
--case 9:
--YY_RULE_SETUP
--#line 73 "itbl-lex.l"
--{
-- yytext[yyleng] = 0;
-- yylval.num = strtoul (yytext, 0, 0);
-- return NUM;
-- }
-- YY_BREAK
--case 10:
--YY_RULE_SETUP
--#line 78 "itbl-lex.l"
--{
-- yytext[yyleng] = 0;
-- yylval.str = strdup (yytext);
-- return ID;
-- }
-- YY_BREAK
--case 11:
--YY_RULE_SETUP
--#line 83 "itbl-lex.l"
--{
-- int c;
-- while ((c = input ()) != EOF)
-- {
-- if (c == '\n')
-- {
-- unput (c);
-- break;
-- }
-- }
-- }
-- YY_BREAK
--case 12:
--/* rule 12 can match eol */
--YY_RULE_SETUP
--#line 94 "itbl-lex.l"
--{
-- insntbl_line++;
-- MDBG (("in lex, NL = %d (x%x)\n", NL, NL));
-- return NL;
-- }
-- YY_BREAK
--case 13:
--YY_RULE_SETUP
--#line 99 "itbl-lex.l"
--{
-- }
-- YY_BREAK
--case 14:
--YY_RULE_SETUP
--#line 101 "itbl-lex.l"
--{
-- MDBG (("char = %x, %d\n", yytext[0], yytext[0]));
-- return yytext[0];
-- }
-- YY_BREAK
--case 15:
--YY_RULE_SETUP
--#line 105 "itbl-lex.l"
--ECHO;
-- YY_BREAK
--#line 918 "itbl-lex.c"
--case YY_STATE_EOF(INITIAL):
-- yyterminate();
--
-- case YY_END_OF_BUFFER:
-- {
-- /* Amount of text matched not including the EOB char. */
-- int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1;
--
-- /* Undo the effects of YY_DO_BEFORE_ACTION. */
-- *yy_cp = (yy_hold_char);
-- YY_RESTORE_YY_MORE_OFFSET
--
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW )
-- {
-- /* We're scanning a new file or input source. It's
-- * possible that this happened because the user
-- * just pointed yyin at a new source and called
-- * yylex(). If so, then we have to assure
-- * consistency between YY_CURRENT_BUFFER and our
-- * globals. Here is the right place to do so, because
-- * this is the first action (other than possibly a
-- * back-up) that will match for the new input source.
-- */
-- (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
-- YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin;
-- YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL;
-- }
--
-- /* Note that here we test for yy_c_buf_p "<=" to the position
-- * of the first EOB in the buffer, since yy_c_buf_p will
-- * already have been incremented past the NUL character
-- * (since all states make transitions on EOB to the
-- * end-of-buffer state). Contrast this with the test
-- * in input().
-- */
-- if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
-- { /* This was really a NUL. */
-- yy_state_type yy_next_state;
--
-- (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text;
--
-- yy_current_state = yy_get_previous_state( );
--
-- /* Okay, we're now positioned to make the NUL
-- * transition. We couldn't have
-- * yy_get_previous_state() go ahead and do it
-- * for us because it doesn't know how to deal
-- * with the possibility of jamming (and we don't
-- * want to build jamming into it because then it
-- * will run more slowly).
-- */
--
-- yy_next_state = yy_try_NUL_trans( yy_current_state );
--
-- yy_bp = (yytext_ptr) + YY_MORE_ADJ;
--
-- if ( yy_next_state )
-- {
-- /* Consume the NUL. */
-- yy_cp = ++(yy_c_buf_p);
-- yy_current_state = yy_next_state;
-- goto yy_match;
-- }
--
-- else
-- {
-- yy_cp = (yy_c_buf_p);
-- goto yy_find_action;
-- }
-- }
--
-- else switch ( yy_get_next_buffer( ) )
-- {
-- case EOB_ACT_END_OF_FILE:
-- {
-- (yy_did_buffer_switch_on_eof) = 0;
--
-- if ( yywrap( ) )
-- {
-- /* Note: because we've taken care in
-- * yy_get_next_buffer() to have set up
-- * yytext, we can now set up
-- * yy_c_buf_p so that if some total
-- * hoser (like flex itself) wants to
-- * call the scanner after we return the
-- * YY_NULL, it'll still work - another
-- * YY_NULL will get returned.
-- */
-- (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ;
--
-- yy_act = YY_STATE_EOF(YY_START);
-- goto do_action;
-- }
--
-- else
-- {
-- if ( ! (yy_did_buffer_switch_on_eof) )
-- YY_NEW_FILE;
-- }
-- break;
-- }
--
-- case EOB_ACT_CONTINUE_SCAN:
-- (yy_c_buf_p) =
-- (yytext_ptr) + yy_amount_of_matched_text;
--
-- yy_current_state = yy_get_previous_state( );
--
-- yy_cp = (yy_c_buf_p);
-- yy_bp = (yytext_ptr) + YY_MORE_ADJ;
-- goto yy_match;
--
-- case EOB_ACT_LAST_MATCH:
-- (yy_c_buf_p) =
-- &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)];
--
-- yy_current_state = yy_get_previous_state( );
--
-- yy_cp = (yy_c_buf_p);
-- yy_bp = (yytext_ptr) + YY_MORE_ADJ;
-- goto yy_find_action;
-- }
-- break;
-- }
--
-- default:
-- YY_FATAL_ERROR(
-- "fatal flex scanner internal error--no action found" );
-- } /* end of action switch */
-- } /* end of scanning one token */
--} /* end of yylex */
--
--/* yy_get_next_buffer - try to read in a new buffer
-- *
-- * Returns a code representing an action:
-- * EOB_ACT_LAST_MATCH -
-- * EOB_ACT_CONTINUE_SCAN - continue scanning from current position
-- * EOB_ACT_END_OF_FILE - end of file
-- */
--static int yy_get_next_buffer (void)
--{
-- register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf;
-- register char *source = (yytext_ptr);
-- register int number_to_move, i;
-- int ret_val;
--
-- if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] )
-- YY_FATAL_ERROR(
-- "fatal flex scanner internal error--end of buffer missed" );
--
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 )
-- { /* Don't try to fill the buffer, so this is an EOF. */
-- if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 )
-- {
-- /* We matched a single character, the EOB, so
-- * treat this as a final EOF.
-- */
-- return EOB_ACT_END_OF_FILE;
-- }
--
-- else
-- {
-- /* We matched some text prior to the EOB, first
-- * process it.
-- */
-- return EOB_ACT_LAST_MATCH;
-- }
-- }
--
-- /* Try to read more data. */
--
-- /* First move last chars to start of buffer. */
-- number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1;
--
-- for ( i = 0; i < number_to_move; ++i )
-- *(dest++) = *(source++);
--
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING )
-- /* don't do the read, it's not guaranteed to return an EOF,
-- * just force an EOF
-- */
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0;
--
-- else
-- {
-- yy_size_t num_to_read =
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1;
--
-- while ( num_to_read <= 0 )
-- { /* Not enough room in the buffer - grow it. */
--
-- /* just a shorter name for the current buffer */
-- YY_BUFFER_STATE b = YY_CURRENT_BUFFER;
--
-- int yy_c_buf_p_offset =
-- (int) ((yy_c_buf_p) - b->yy_ch_buf);
--
-- if ( b->yy_is_our_buffer )
-- {
-- yy_size_t new_size = b->yy_buf_size * 2;
--
-- if ( new_size <= 0 )
-- b->yy_buf_size += b->yy_buf_size / 8;
-- else
-- b->yy_buf_size *= 2;
--
-- b->yy_ch_buf = (char *)
-- /* Include room in for 2 EOB chars. */
-- yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 );
-- }
-- else
-- /* Can't grow it, we don't own it. */
-- b->yy_ch_buf = 0;
--
-- if ( ! b->yy_ch_buf )
-- YY_FATAL_ERROR(
-- "fatal error - scanner input buffer overflow" );
--
-- (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset];
--
-- num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size -
-- number_to_move - 1;
--
-- }
--
-- if ( num_to_read > YY_READ_BUF_SIZE )
-- num_to_read = YY_READ_BUF_SIZE;
--
-- /* Read in more data. */
-- YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]),
-- (yy_n_chars), num_to_read );
--
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
-- }
--
-- if ( (yy_n_chars) == 0 )
-- {
-- if ( number_to_move == YY_MORE_ADJ )
-- {
-- ret_val = EOB_ACT_END_OF_FILE;
-- yyrestart(yyin );
-- }
--
-- else
-- {
-- ret_val = EOB_ACT_LAST_MATCH;
-- YY_CURRENT_BUFFER_LVALUE->yy_buffer_status =
-- YY_BUFFER_EOF_PENDING;
-- }
-- }
--
-- else
-- ret_val = EOB_ACT_CONTINUE_SCAN;
--
-- if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) {
-- /* Extend the array by 50%, plus the number we really need. */
-- yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1);
-- YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size );
-- if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" );
-- }
--
-- (yy_n_chars) += number_to_move;
-- YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR;
-- YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR;
--
-- (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0];
--
-- return ret_val;
--}
--
--/* yy_get_previous_state - get the state just before the EOB char was reached */
--
-- static yy_state_type yy_get_previous_state (void)
--{
-- register yy_state_type yy_current_state;
-- register char *yy_cp;
--
-- yy_current_state = (yy_start);
--
-- for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
-- {
-- register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1);
-- if ( yy_accept[yy_current_state] )
-- {
-- (yy_last_accepting_state) = yy_current_state;
-- (yy_last_accepting_cpos) = yy_cp;
-- }
-- while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
-- {
-- yy_current_state = (int) yy_def[yy_current_state];
-- if ( yy_current_state >= 60 )
-- yy_c = yy_meta[(unsigned int) yy_c];
-- }
-- yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-- }
--
-- return yy_current_state;
--}
--
--/* yy_try_NUL_trans - try to make a transition on the NUL character
-- *
-- * synopsis
-- * next_state = yy_try_NUL_trans( current_state );
-- */
-- static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state )
--{
-- register int yy_is_jam;
-- register char *yy_cp = (yy_c_buf_p);
--
-- register YY_CHAR yy_c = 1;
-- if ( yy_accept[yy_current_state] )
-- {
-- (yy_last_accepting_state) = yy_current_state;
-- (yy_last_accepting_cpos) = yy_cp;
-- }
-- while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
-- {
-- yy_current_state = (int) yy_def[yy_current_state];
-- if ( yy_current_state >= 60 )
-- yy_c = yy_meta[(unsigned int) yy_c];
-- }
-- yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-- yy_is_jam = (yy_current_state == 59);
--
-- return yy_is_jam ? 0 : yy_current_state;
--}
--
-- static void yyunput (int c, register char * yy_bp )
--{
-- register char *yy_cp;
--
-- yy_cp = (yy_c_buf_p);
--
-- /* undo effects of setting up yytext */
-- *yy_cp = (yy_hold_char);
--
-- if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 )
-- { /* need to shift things up to make room */
-- /* +2 for EOB chars. */
-- register yy_size_t number_to_move = (yy_n_chars) + 2;
-- register char *dest = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_size + 2];
-- register char *source =
-- &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move];
--
-- while ( source > YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
-- *--dest = *--source;
--
-- yy_cp += (int) (dest - source);
-- yy_bp += (int) (dest - source);
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars =
-- (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_buf_size;
--
-- if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 )
-- YY_FATAL_ERROR( "flex scanner push-back overflow" );
-- }
--
-- *--yy_cp = (char) c;
--
-- (yytext_ptr) = yy_bp;
-- (yy_hold_char) = *yy_cp;
-- (yy_c_buf_p) = yy_cp;
--}
--
--#ifndef YY_NO_INPUT
--#ifdef __cplusplus
-- static int yyinput (void)
--#else
-- static int input (void)
--#endif
--
--{
-- int c;
--
-- *(yy_c_buf_p) = (yy_hold_char);
--
-- if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
-- {
-- /* yy_c_buf_p now points to the character we want to return.
-- * If this occurs *before* the EOB characters, then it's a
-- * valid NUL; if not, then we've hit the end of the buffer.
-- */
-- if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
-- /* This was really a NUL. */
-- *(yy_c_buf_p) = '\0';
--
-- else
-- { /* need more input */
-- yy_size_t offset = (yy_c_buf_p) - (yytext_ptr);
-- ++(yy_c_buf_p);
--
-- switch ( yy_get_next_buffer( ) )
-- {
-- case EOB_ACT_LAST_MATCH:
-- /* This happens because yy_g_n_b()
-- * sees that we've accumulated a
-- * token and flags that we need to
-- * try matching the token before
-- * proceeding. But for input(),
-- * there's no matching to consider.
-- * So convert the EOB_ACT_LAST_MATCH
-- * to EOB_ACT_END_OF_FILE.
-- */
--
-- /* Reset buffer status. */
-- yyrestart(yyin );
--
-- /*FALLTHROUGH*/
--
-- case EOB_ACT_END_OF_FILE:
-- {
-- if ( yywrap( ) )
-- return 0;
--
-- if ( ! (yy_did_buffer_switch_on_eof) )
-- YY_NEW_FILE;
--#ifdef __cplusplus
-- return yyinput();
--#else
-- return input();
--#endif
-- }
--
-- case EOB_ACT_CONTINUE_SCAN:
-- (yy_c_buf_p) = (yytext_ptr) + offset;
-- break;
-- }
-- }
-- }
--
-- c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */
-- *(yy_c_buf_p) = '\0'; /* preserve yytext */
-- (yy_hold_char) = *++(yy_c_buf_p);
--
-- return c;
--}
--#endif /* ifndef YY_NO_INPUT */
--
--/** Immediately switch to a different input stream.
-- * @param input_file A readable stream.
-- *
-- * @note This function does not reset the start condition to @c INITIAL .
-- */
-- void yyrestart (FILE * input_file )
--{
--
-- if ( ! YY_CURRENT_BUFFER ){
-- yyensure_buffer_stack ();
-- YY_CURRENT_BUFFER_LVALUE =
-- yy_create_buffer(yyin,YY_BUF_SIZE );
-- }
--
-- yy_init_buffer(YY_CURRENT_BUFFER,input_file );
-- yy_load_buffer_state( );
--}
--
--/** Switch to a different input buffer.
-- * @param new_buffer The new input buffer.
-- *
-- */
-- void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer )
--{
--
-- /* TODO. We should be able to replace this entire function body
-- * with
-- * yypop_buffer_state();
-- * yypush_buffer_state(new_buffer);
-- */
-- yyensure_buffer_stack ();
-- if ( YY_CURRENT_BUFFER == new_buffer )
-- return;
--
-- if ( YY_CURRENT_BUFFER )
-- {
-- /* Flush out information for old buffer. */
-- *(yy_c_buf_p) = (yy_hold_char);
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
-- }
--
-- YY_CURRENT_BUFFER_LVALUE = new_buffer;
-- yy_load_buffer_state( );
--
-- /* We don't actually know whether we did this switch during
-- * EOF (yywrap()) processing, but the only time this flag
-- * is looked at is after yywrap() is called, so it's safe
-- * to go ahead and always set it.
-- */
-- (yy_did_buffer_switch_on_eof) = 1;
--}
--
--static void yy_load_buffer_state (void)
--{
-- (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
-- (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos;
-- yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file;
-- (yy_hold_char) = *(yy_c_buf_p);
--}
--
--/** Allocate and initialize an input buffer state.
-- * @param file A readable stream.
-- * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
-- *
-- * @return the allocated buffer state.
-- */
-- YY_BUFFER_STATE yy_create_buffer (FILE * file, int size )
--{
-- YY_BUFFER_STATE b;
--
-- b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) );
-- if ( ! b )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
--
-- b->yy_buf_size = size;
--
-- /* yy_ch_buf has to be 2 characters longer than the size given because
-- * we need to put in 2 end-of-buffer characters.
-- */
-- b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2 );
-- if ( ! b->yy_ch_buf )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
--
-- b->yy_is_our_buffer = 1;
--
-- yy_init_buffer(b,file );
--
-- return b;
--}
--
--/** Destroy the buffer.
-- * @param b a buffer created with yy_create_buffer()
-- *
-- */
-- void yy_delete_buffer (YY_BUFFER_STATE b )
--{
--
-- if ( ! b )
-- return;
--
-- if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */
-- YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0;
--
-- if ( b->yy_is_our_buffer )
-- yyfree((void *) b->yy_ch_buf );
--
-- yyfree((void *) b );
--}
--
--#ifndef __cplusplus
--extern int isatty (int );
--#endif /* __cplusplus */
--
--/* Initializes or reinitializes a buffer.
-- * This function is sometimes called more than once on the same buffer,
-- * such as during a yyrestart() or at EOF.
-- */
-- static void yy_init_buffer (YY_BUFFER_STATE b, FILE * file )
--
--{
-- int oerrno = errno;
--
-- yy_flush_buffer(b );
--
-- b->yy_input_file = file;
-- b->yy_fill_buffer = 1;
--
-- /* If b is the current buffer, then yy_init_buffer was _probably_
-- * called from yyrestart() or through yy_get_next_buffer.
-- * In that case, we don't want to reset the lineno or column.
-- */
-- if (b != YY_CURRENT_BUFFER){
-- b->yy_bs_lineno = 1;
-- b->yy_bs_column = 0;
-- }
--
-- b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0;
--
-- errno = oerrno;
--}
--
--/** Discard all buffered characters. On the next scan, YY_INPUT will be called.
-- * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
-- *
-- */
-- void yy_flush_buffer (YY_BUFFER_STATE b )
--{
-- if ( ! b )
-- return;
--
-- b->yy_n_chars = 0;
--
-- /* We always need two end-of-buffer characters. The first causes
-- * a transition to the end-of-buffer state. The second causes
-- * a jam in that state.
-- */
-- b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR;
-- b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR;
--
-- b->yy_buf_pos = &b->yy_ch_buf[0];
--
-- b->yy_at_bol = 1;
-- b->yy_buffer_status = YY_BUFFER_NEW;
--
-- if ( b == YY_CURRENT_BUFFER )
-- yy_load_buffer_state( );
--}
--
--/** Pushes the new state onto the stack. The new state becomes
-- * the current state. This function will allocate the stack
-- * if necessary.
-- * @param new_buffer The new state.
-- *
-- */
--void yypush_buffer_state (YY_BUFFER_STATE new_buffer )
--{
-- if (new_buffer == NULL)
-- return;
--
-- yyensure_buffer_stack();
--
-- /* This block is copied from yy_switch_to_buffer. */
-- if ( YY_CURRENT_BUFFER )
-- {
-- /* Flush out information for old buffer. */
-- *(yy_c_buf_p) = (yy_hold_char);
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
-- }
--
-- /* Only push if top exists. Otherwise, replace top. */
-- if (YY_CURRENT_BUFFER)
-- (yy_buffer_stack_top)++;
-- YY_CURRENT_BUFFER_LVALUE = new_buffer;
--
-- /* copied from yy_switch_to_buffer. */
-- yy_load_buffer_state( );
-- (yy_did_buffer_switch_on_eof) = 1;
--}
--
--/** Removes and deletes the top of the stack, if present.
-- * The next element becomes the new top.
-- *
-- */
--void yypop_buffer_state (void)
--{
-- if (!YY_CURRENT_BUFFER)
-- return;
--
-- yy_delete_buffer(YY_CURRENT_BUFFER );
-- YY_CURRENT_BUFFER_LVALUE = NULL;
-- if ((yy_buffer_stack_top) > 0)
-- --(yy_buffer_stack_top);
--
-- if (YY_CURRENT_BUFFER) {
-- yy_load_buffer_state( );
-- (yy_did_buffer_switch_on_eof) = 1;
-- }
--}
--
--/* Allocates the stack if it does not exist.
-- * Guarantees space for at least one push.
-- */
--static void yyensure_buffer_stack (void)
--{
-- yy_size_t num_to_alloc;
--
-- if (!(yy_buffer_stack)) {
--
-- /* First allocation is just for 2 elements, since we don't know if this
-- * scanner will even need a stack. We use 2 instead of 1 to avoid an
-- * immediate realloc on the next call.
-- */
-- num_to_alloc = 1;
-- (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc
-- (num_to_alloc * sizeof(struct yy_buffer_state*)
-- );
-- if ( ! (yy_buffer_stack) )
-- YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
--
-- memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
--
-- (yy_buffer_stack_max) = num_to_alloc;
-- (yy_buffer_stack_top) = 0;
-- return;
-- }
--
-- if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){
--
-- /* Increase the buffer to prepare for a possible push. */
-- int grow_size = 8 /* arbitrary grow size */;
--
-- num_to_alloc = (yy_buffer_stack_max) + grow_size;
-- (yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc
-- ((yy_buffer_stack),
-- num_to_alloc * sizeof(struct yy_buffer_state*)
-- );
-- if ( ! (yy_buffer_stack) )
-- YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
--
-- /* zero only the new slots.*/
-- memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*));
-- (yy_buffer_stack_max) = num_to_alloc;
-- }
--}
--
--/** Setup the input buffer state to scan directly from a user-specified character buffer.
-- * @param base the character buffer
-- * @param size the size in bytes of the character buffer
-- *
-- * @return the newly allocated buffer state object.
-- */
--YY_BUFFER_STATE yy_scan_buffer (char * base, yy_size_t size )
--{
-- YY_BUFFER_STATE b;
--
-- if ( size < 2 ||
-- base[size-2] != YY_END_OF_BUFFER_CHAR ||
-- base[size-1] != YY_END_OF_BUFFER_CHAR )
-- /* They forgot to leave room for the EOB's. */
-- return 0;
--
-- b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) );
-- if ( ! b )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" );
--
-- b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */
-- b->yy_buf_pos = b->yy_ch_buf = base;
-- b->yy_is_our_buffer = 0;
-- b->yy_input_file = 0;
-- b->yy_n_chars = b->yy_buf_size;
-- b->yy_is_interactive = 0;
-- b->yy_at_bol = 1;
-- b->yy_fill_buffer = 0;
-- b->yy_buffer_status = YY_BUFFER_NEW;
--
-- yy_switch_to_buffer(b );
--
-- return b;
--}
--
--/** Setup the input buffer state to scan a string. The next call to yylex() will
-- * scan from a @e copy of @a str.
-- * @param yystr a NUL-terminated string to scan
-- *
-- * @return the newly allocated buffer state object.
-- * @note If you want to scan bytes that may contain NUL values, then use
-- * yy_scan_bytes() instead.
-- */
--YY_BUFFER_STATE yy_scan_string (yyconst char * yystr )
--{
--
-- return yy_scan_bytes(yystr,strlen(yystr) );
--}
--
--/** Setup the input buffer state to scan the given bytes. The next call to yylex() will
-- * scan from a @e copy of @a bytes.
-- * @param bytes the byte buffer to scan
-- * @param len the number of bytes in the buffer pointed to by @a bytes.
-- *
-- * @return the newly allocated buffer state object.
-- */
--YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, yy_size_t _yybytes_len )
--{
-- YY_BUFFER_STATE b;
-- char *buf;
-- yy_size_t n, i;
--
-- /* Get memory for full buffer, including space for trailing EOB's. */
-- n = _yybytes_len + 2;
-- buf = (char *) yyalloc(n );
-- if ( ! buf )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" );
--
-- for ( i = 0; i < _yybytes_len; ++i )
-- buf[i] = yybytes[i];
--
-- buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR;
--
-- b = yy_scan_buffer(buf,n );
-- if ( ! b )
-- YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" );
--
-- /* It's okay to grow etc. this buffer, and we should throw it
-- * away when we're done.
-- */
-- b->yy_is_our_buffer = 1;
--
-- return b;
--}
--
--#ifndef YY_EXIT_FAILURE
--#define YY_EXIT_FAILURE 2
--#endif
--
--static void yy_fatal_error (yyconst char* msg )
--{
-- (void) fprintf( stderr, "%s\n", msg );
-- exit( YY_EXIT_FAILURE );
--}
--
--/* Redefine yyless() so it works in section 3 code. */
--
--#undef yyless
--#define yyless(n) \
-- do \
-- { \
-- /* Undo effects of setting up yytext. */ \
-- int yyless_macro_arg = (n); \
-- YY_LESS_LINENO(yyless_macro_arg);\
-- yytext[yyleng] = (yy_hold_char); \
-- (yy_c_buf_p) = yytext + yyless_macro_arg; \
-- (yy_hold_char) = *(yy_c_buf_p); \
-- *(yy_c_buf_p) = '\0'; \
-- yyleng = yyless_macro_arg; \
-- } \
-- while ( 0 )
--
--/* Accessor methods (get/set functions) to struct members. */
--
--/** Get the current line number.
-- *
-- */
--int yyget_lineno (void)
--{
--
-- return yylineno;
--}
--
--/** Get the input stream.
-- *
-- */
--FILE *yyget_in (void)
--{
-- return yyin;
--}
--
--/** Get the output stream.
-- *
-- */
--FILE *yyget_out (void)
--{
-- return yyout;
--}
--
--/** Get the length of the current token.
-- *
-- */
--yy_size_t yyget_leng (void)
--{
-- return yyleng;
--}
--
--/** Get the current token.
-- *
-- */
--
--char *yyget_text (void)
--{
-- return yytext;
--}
--
--/** Set the current line number.
-- * @param line_number
-- *
-- */
--void yyset_lineno (int line_number )
--{
--
-- yylineno = line_number;
--}
--
--/** Set the input stream. This does not discard the current
-- * input buffer.
-- * @param in_str A readable stream.
-- *
-- * @see yy_switch_to_buffer
-- */
--void yyset_in (FILE * in_str )
--{
-- yyin = in_str ;
--}
--
--void yyset_out (FILE * out_str )
--{
-- yyout = out_str ;
--}
--
--int yyget_debug (void)
--{
-- return yy_flex_debug;
--}
--
--void yyset_debug (int bdebug )
--{
-- yy_flex_debug = bdebug ;
--}
--
--static int yy_init_globals (void)
--{
-- /* Initialization is the same as for the non-reentrant scanner.
-- * This function is called from yylex_destroy(), so don't allocate here.
-- */
--
-- (yy_buffer_stack) = 0;
-- (yy_buffer_stack_top) = 0;
-- (yy_buffer_stack_max) = 0;
-- (yy_c_buf_p) = (char *) 0;
-- (yy_init) = 0;
-- (yy_start) = 0;
--
--/* Defined in main.c */
--#ifdef YY_STDINIT
-- yyin = stdin;
-- yyout = stdout;
--#else
-- yyin = (FILE *) 0;
-- yyout = (FILE *) 0;
--#endif
--
-- /* For future reference: Set errno on error, since we are called by
-- * yylex_init()
-- */
-- return 0;
--}
--
--/* yylex_destroy is for both reentrant and non-reentrant scanners. */
--int yylex_destroy (void)
--{
--
-- /* Pop the buffer stack, destroying each element. */
-- while(YY_CURRENT_BUFFER){
-- yy_delete_buffer(YY_CURRENT_BUFFER );
-- YY_CURRENT_BUFFER_LVALUE = NULL;
-- yypop_buffer_state();
-- }
--
-- /* Destroy the stack itself. */
-- yyfree((yy_buffer_stack) );
-- (yy_buffer_stack) = NULL;
--
-- /* Reset the globals. This is important in a non-reentrant scanner so the next time
-- * yylex() is called, initialization will occur. */
-- yy_init_globals( );
--
-- return 0;
--}
--
--/*
-- * Internal utility routines.
-- */
--
--#ifndef yytext_ptr
--static void yy_flex_strncpy (char* s1, yyconst char * s2, int n )
--{
-- register int i;
-- for ( i = 0; i < n; ++i )
-- s1[i] = s2[i];
--}
--#endif
--
--#ifdef YY_NEED_STRLEN
--static int yy_flex_strlen (yyconst char * s )
--{
-- register int n;
-- for ( n = 0; s[n]; ++n )
-- ;
--
-- return n;
--}
--#endif
--
--void *yyalloc (yy_size_t size )
--{
-- return (void *) malloc( size );
--}
--
--void *yyrealloc (void * ptr, yy_size_t size )
--{
-- /* The cast to (char *) in the following accommodates both
-- * implementations that use char* generic pointers, and those
-- * that use void* generic pointers. It works with the latter
-- * because both ANSI C and C++ allow castless assignment from
-- * any pointer type to void*, and deal with argument conversions
-- * as though doing an assignment.
-- */
-- return (void *) realloc( (char *) ptr, size );
--}
--
--void yyfree (void * ptr )
--{
-- free( (char *) ptr ); /* see yyrealloc() for (char *) cast */
--}
--
--#define YYTABLES_NAME "yytables"
--
--#line 105 "itbl-lex.l"
--
--
--
--#ifndef yywrap
--int
--yywrap ()
-- {
-- return 1;
-- }
--#endif
--
-diff -Nur binutils-2.24.orig/gas/itbl-parse.c binutils-2.24/gas/itbl-parse.c
---- binutils-2.24.orig/gas/itbl-parse.c 2013-11-18 09:49:28.000000000 +0100
-+++ binutils-2.24/gas/itbl-parse.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,2006 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton implementation for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* C LALR(1) parser skeleton written by Richard Stallman, by
-- simplifying the original so-called "semantic" parser. */
--
--/* All symbols defined below should begin with yy or YY, to avoid
-- infringing on user name space. This should be done even for local
-- variables, as they might otherwise be expanded by user macros.
-- There are some unavoidable exceptions within include files to
-- define necessary library symbols; they are noted "INFRINGES ON
-- USER NAME SPACE" below. */
--
--/* Identify Bison output. */
--#define YYBISON 1
--
--/* Bison version. */
--#define YYBISON_VERSION "2.3"
--
--/* Skeleton name. */
--#define YYSKELETON_NAME "yacc.c"
--
--/* Pure parsers. */
--#define YYPURE 0
--
--/* Using locations. */
--#define YYLSP_NEEDED 0
--
--
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- DREG = 258,
-- CREG = 259,
-- GREG = 260,
-- IMMED = 261,
-- ADDR = 262,
-- INSN = 263,
-- NUM = 264,
-- ID = 265,
-- NL = 266,
-- PNUM = 267
-- };
--#endif
--/* Tokens. */
--#define DREG 258
--#define CREG 259
--#define GREG 260
--#define IMMED 261
--#define ADDR 262
--#define INSN 263
--#define NUM 264
--#define ID 265
--#define NL 266
--#define PNUM 267
--
--
--
--
--/* Copy the first part of user declarations. */
--#line 21 "itbl-parse.y"
--
--
--/*
--
--Yacc grammar for instruction table entries.
--
--=======================================================================
--Original Instruction table specification document:
--
-- MIPS Coprocessor Table Specification
-- ====================================
--
--This document describes the format of the MIPS coprocessor table. The
--table specifies a list of valid functions, data registers and control
--registers that can be used in coprocessor instructions. This list,
--together with the coprocessor instruction classes listed below,
--specifies the complete list of coprocessor instructions that will
--be recognized and assembled by the GNU assembler. In effect,
--this makes the GNU assembler table-driven, where the table is
--specified by the programmer.
--
--The table is an ordinary text file that the GNU assembler reads when
--it starts. Using the information in the table, the assembler
--generates an internal list of valid coprocessor registers and
--functions. The assembler uses this internal list in addition to the
--standard MIPS registers and instructions which are built-in to the
--assembler during code generation.
--
--To specify the coprocessor table when invoking the GNU assembler, use
--the command line option "--itbl file", where file is the
--complete name of the table, including path and extension.
--
--Examples:
--
-- gas -t cop.tbl test.s -o test.o
-- gas -t /usr/local/lib/cop.tbl test.s -o test.o
-- gas --itbl d:\gnu\data\cop.tbl test.s -o test.o
--
--Only one table may be supplied during a single invocation of
--the assembler.
--
--
--Instruction classes
--===================
--
--Below is a list of the valid coprocessor instruction classes for
--any given coprocessor "z". These instructions are already recognized
--by the assembler, and are listed here only for reference.
--
--Class format instructions
---------------------------------------------------
--Class1:
-- op base rt offset
-- LWCz rt,offset (base)
-- SWCz rt,offset (base)
--Class2:
-- COPz sub rt rd 0
-- MTCz rt,rd
-- MFCz rt,rd
-- CTCz rt,rd
-- CFCz rt,rd
--Class3:
-- COPz CO cofun
-- COPz cofun
--Class4:
-- COPz BC br offset
-- BCzT offset
-- BCzF offset
--Class5:
-- COPz sub rt rd 0
-- DMFCz rt,rd
-- DMTCz rt,rd
--Class6:
-- op base rt offset
-- LDCz rt,offset (base)
-- SDCz rt,offset (base)
--Class7:
-- COPz BC br offset
-- BCzTL offset
-- BCzFL offset
--
--The coprocessor table defines coprocessor-specific registers that can
--be used with all of the above classes of instructions, where
--appropriate. It also defines additional coprocessor-specific
--functions for Class3 (COPz cofun) instructions, Thus, the table allows
--the programmer to use convenient mnemonics and operands for these
--functions, instead of the COPz mmenmonic and cofun operand.
--
--The names of the MIPS general registers and their aliases are defined
--by the assembler and will be recognized as valid register names by the
--assembler when used (where allowed) in coprocessor instructions.
--However, the names and values of all coprocessor data and control
--register mnemonics must be specified in the coprocessor table.
--
--
--Table Grammar
--=============
--
--Here is the grammar for the coprocessor table:
--
-- table -> entry*
--
-- entry -> [z entrydef] [comment] '\n'
--
-- entrydef -> type name val
-- entrydef -> 'insn' name val funcdef ; type of entry (instruction)
--
-- z -> 'p'['0'..'3'] ; processor number
-- type -> ['dreg' | 'creg' | 'greg' ] ; type of entry (register)
-- ; 'dreg', 'creg' or 'greg' specifies a data, control, or general
-- ; register mnemonic, respectively
-- name -> [ltr|dec]* ; mnemonic of register/function
-- val -> [dec|hex] ; register/function number (integer constant)
--
-- funcdef -> frange flags fields
-- ; bitfield range for opcode
-- ; list of fields' formats
-- fields -> field*
-- field -> [','] ftype frange flags
-- flags -> ['*' flagexpr]
-- flagexpr -> '[' flagexpr ']'
-- flagexpr -> val '|' flagexpr
-- ftype -> [ type | 'immed' | 'addr' ]
-- ; 'immed' specifies an immediate value; see grammar for "val" above
-- ; 'addr' specifies a C identifier; name of symbol to be resolved at
-- ; link time
-- frange -> ':' val '-' val ; starting to ending bit positions, where
-- ; where 0 is least significant bit
-- frange -> (null) ; default range of 31-0 will be assumed
--
-- comment -> [';'|'#'] [char]*
-- char -> any printable character
-- ltr -> ['a'..'z'|'A'..'Z']
-- dec -> ['0'..'9']* ; value in decimal
-- hex -> '0x'['0'..'9' | 'a'..'f' | 'A'..'F']* ; value in hexadecimal
--
--
--Examples
--========
--
--Example 1:
--
--The table:
--
-- p1 dreg d1 1 ; data register "d1" for COP1 has value 1
-- p1 creg c3 3 ; ctrl register "c3" for COP1 has value 3
-- p3 func fill 0x1f:24-20 ; function "fill" for COP3 has value 31 and
-- ; no fields
--
--will allow the assembler to accept the following coprocessor instructions:
--
-- LWC1 d1,0x100 ($2)
-- fill
--
--Here, the general purpose register "$2", and instruction "LWC1", are standard
--mnemonics built-in to the MIPS assembler.
--
--
--Example 2:
--
--The table:
--
-- p3 dreg d3 3 ; data register "d3" for COP3 has value 3
-- p3 creg c2 22 ; control register "c2" for COP3 has value 22
-- p3 func fee 0x1f:24-20 dreg:17-13 creg:12-8 immed:7-0
-- ; function "fee" for COP3 has value 31, and 3 fields
-- ; consisting of a data register, a control register,
-- ; and an immediate value.
--
--will allow the assembler to accept the following coprocessor instruction:
--
-- fee d3,c2,0x1
--
--and will emit the object code:
--
-- 31-26 25 24-20 19-18 17-13 12-8 7-0
-- COPz CO fun dreg creg immed
-- 010011 1 11111 00 00011 10110 00000001
--
-- 0x4ff07601
--
--
--Example 3:
--
--The table:
--
-- p3 dreg d3 3 ; data register "d3" for COP3 has value 3
-- p3 creg c2 22 ; control register "c2" for COP3 has value 22
-- p3 func fuu 0x01f00001 dreg:17-13 creg:12-8
--
--will allow the assembler to accept the following coprocessor
--instruction:
--
-- fuu d3,c2
--
--and will emit the object code:
--
-- 31-26 25 24-20 19-18 17-13 12-8 7-0
-- COPz CO fun dreg creg
-- 010011 1 11111 00 00011 10110 00000001
--
-- 0x4ff07601
--
--In this way, the programmer can force arbitrary bits of an instruction
--to have predefined values.
--
--=======================================================================
--Additional notes:
--
--Encoding of ranges:
--To handle more than one bit position range within an instruction,
--use 0s to mask out the ranges which don't apply.
--May decide to modify the syntax to allow commas separate multiple
--ranges within an instruction (range','range).
--
--Changes in grammar:
-- The number of parms argument to the function entry
--was deleted from the original format such that we now count the fields.
--
------
--FIXME! should really change lexical analyzer
--to recognize 'dreg' etc. in context sensitive way.
--Currently function names or mnemonics may be incorrectly parsed as keywords
--
--FIXME! hex is ambiguous with any digit
--
--*/
--
--#include "as.h"
--#include "itbl-lex.h"
--#include "itbl-ops.h"
--
--/* #define DEBUG */
--
--#ifdef DEBUG
--#ifndef DBG_LVL
--#define DBG_LVL 1
--#endif
--#else
--#define DBG_LVL 0
--#endif
--
--#if DBG_LVL >= 1
--#define DBG(x) printf x
--#else
--#define DBG(x)
--#endif
--
--#if DBG_LVL >= 2
--#define DBGL2(x) printf x
--#else
--#define DBGL2(x)
--#endif
--
--static int sbit, ebit;
--static struct itbl_entry *insn=0;
--static int yyerror (const char *);
--
--
--
--/* Enabling traces. */
--#ifndef YYDEBUG
--# define YYDEBUG 0
--#endif
--
--/* Enabling verbose error messages. */
--#ifdef YYERROR_VERBOSE
--# undef YYERROR_VERBOSE
--# define YYERROR_VERBOSE 1
--#else
--# define YYERROR_VERBOSE 0
--#endif
--
--/* Enabling the token table. */
--#ifndef YYTOKEN_TABLE
--# define YYTOKEN_TABLE 0
--#endif
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 282 "itbl-parse.y"
--{
-- char *str;
-- int num;
-- int processor;
-- unsigned long val;
-- }
--/* Line 193 of yacc.c. */
--#line 387 "itbl-parse.c"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--
--
--/* Copy the second part of user declarations. */
--
--
--/* Line 216 of yacc.c. */
--#line 400 "itbl-parse.c"
--
--#ifdef short
--# undef short
--#endif
--
--#ifdef YYTYPE_UINT8
--typedef YYTYPE_UINT8 yytype_uint8;
--#else
--typedef unsigned char yytype_uint8;
--#endif
--
--#ifdef YYTYPE_INT8
--typedef YYTYPE_INT8 yytype_int8;
--#elif (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--typedef signed char yytype_int8;
--#else
--typedef short int yytype_int8;
--#endif
--
--#ifdef YYTYPE_UINT16
--typedef YYTYPE_UINT16 yytype_uint16;
--#else
--typedef unsigned short int yytype_uint16;
--#endif
--
--#ifdef YYTYPE_INT16
--typedef YYTYPE_INT16 yytype_int16;
--#else
--typedef short int yytype_int16;
--#endif
--
--#ifndef YYSIZE_T
--# ifdef __SIZE_TYPE__
--# define YYSIZE_T __SIZE_TYPE__
--# elif defined size_t
--# define YYSIZE_T size_t
--# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stddef.h> /* INFRINGES ON USER NAME SPACE */
--# define YYSIZE_T size_t
--# else
--# define YYSIZE_T unsigned int
--# endif
--#endif
--
--#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
--
--#ifndef YY_
--# if defined YYENABLE_NLS && YYENABLE_NLS
--# if ENABLE_NLS
--# include <libintl.h> /* INFRINGES ON USER NAME SPACE */
--# define YY_(msgid) dgettext ("bison-runtime", msgid)
--# endif
--# endif
--# ifndef YY_
--# define YY_(msgid) msgid
--# endif
--#endif
--
--/* Suppress unused-variable warnings by "using" E. */
--#if ! defined lint || defined __GNUC__
--# define YYUSE(e) ((void) (e))
--#else
--# define YYUSE(e) /* empty */
--#endif
--
--/* Identity function, used to suppress warnings about constant conditions. */
--#ifndef lint
--# define YYID(n) (n)
--#else
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static int
--YYID (int i)
--#else
--static int
--YYID (i)
-- int i;
--#endif
--{
-- return i;
--}
--#endif
--
--#if ! defined yyoverflow || YYERROR_VERBOSE
--
--/* The parser invokes alloca or malloc; define the necessary symbols. */
--
--# ifdef YYSTACK_USE_ALLOCA
--# if YYSTACK_USE_ALLOCA
--# ifdef __GNUC__
--# define YYSTACK_ALLOC __builtin_alloca
--# elif defined __BUILTIN_VA_ARG_INCR
--# include <alloca.h> /* INFRINGES ON USER NAME SPACE */
--# elif defined _AIX
--# define YYSTACK_ALLOC __alloca
--# elif defined _MSC_VER
--# include <malloc.h> /* INFRINGES ON USER NAME SPACE */
--# define alloca _alloca
--# else
--# define YYSTACK_ALLOC alloca
--# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# endif
--# endif
--# endif
--
--# ifdef YYSTACK_ALLOC
-- /* Pacify GCC's `empty if-body' warning. */
--# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0))
--# ifndef YYSTACK_ALLOC_MAXIMUM
-- /* The OS might guarantee only one guard page at the bottom of the stack,
-- and a page size can be as small as 4096 bytes. So we cannot safely
-- invoke alloca (N) if N exceeds 4096. Use a slightly smaller number
-- to allow for a few compiler-allocated temporary stack slots. */
--# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
--# endif
--# else
--# define YYSTACK_ALLOC YYMALLOC
--# define YYSTACK_FREE YYFREE
--# ifndef YYSTACK_ALLOC_MAXIMUM
--# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
--# endif
--# if (defined __cplusplus && ! defined _STDLIB_H \
-- && ! ((defined YYMALLOC || defined malloc) \
-- && (defined YYFREE || defined free)))
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# ifndef YYMALLOC
--# define YYMALLOC malloc
--# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# ifndef YYFREE
--# define YYFREE free
--# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void free (void *); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# endif
--#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
--
--
--#if (! defined yyoverflow \
-- && (! defined __cplusplus \
-- || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
--
--/* A type that is properly aligned for any stack member. */
--union yyalloc
--{
-- yytype_int16 yyss;
-- YYSTYPE yyvs;
-- };
--
--/* The size of the maximum gap between one aligned stack and the next. */
--# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
--
--/* The size of an array large to enough to hold all stacks, each with
-- N elements. */
--# define YYSTACK_BYTES(N) \
-- ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \
-- + YYSTACK_GAP_MAXIMUM)
--
--/* Copy COUNT objects from FROM to TO. The source and destination do
-- not overlap. */
--# ifndef YYCOPY
--# if defined __GNUC__ && 1 < __GNUC__
--# define YYCOPY(To, From, Count) \
-- __builtin_memcpy (To, From, (Count) * sizeof (*(From)))
--# else
--# define YYCOPY(To, From, Count) \
-- do \
-- { \
-- YYSIZE_T yyi; \
-- for (yyi = 0; yyi < (Count); yyi++) \
-- (To)[yyi] = (From)[yyi]; \
-- } \
-- while (YYID (0))
--# endif
--# endif
--
--/* Relocate STACK from its old location to the new one. The
-- local variables YYSIZE and YYSTACKSIZE give the old and new number of
-- elements in the stack, and YYPTR gives the new location of the
-- stack. Advance YYPTR to a properly aligned location for the next
-- stack. */
--# define YYSTACK_RELOCATE(Stack) \
-- do \
-- { \
-- YYSIZE_T yynewbytes; \
-- YYCOPY (&yyptr->Stack, Stack, yysize); \
-- Stack = &yyptr->Stack; \
-- yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
-- yyptr += yynewbytes / sizeof (*yyptr); \
-- } \
-- while (YYID (0))
--
--#endif
--
--/* YYFINAL -- State number of the termination state. */
--#define YYFINAL 9
--/* YYLAST -- Last index in YYTABLE. */
--#define YYLAST 46
--
--/* YYNTOKENS -- Number of terminals. */
--#define YYNTOKENS 20
--/* YYNNTS -- Number of nonterminals. */
--#define YYNNTS 15
--/* YYNRULES -- Number of rules. */
--#define YYNRULES 29
--/* YYNRULES -- Number of states. */
--#define YYNSTATES 51
--
--/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */
--#define YYUNDEFTOK 2
--#define YYMAXUTOK 267
--
--#define YYTRANSLATE(YYX) \
-- ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
--
--/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */
--static const yytype_uint8 yytranslate[] =
--{
-- 0, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 17, 2, 13, 19, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 18, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 15, 2, 16, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 14, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 1, 2, 3, 4,
-- 5, 6, 7, 8, 9, 10, 11, 12
--};
--
--#if YYDEBUG
--/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
-- YYRHS. */
--static const yytype_uint8 yyprhs[] =
--{
-- 0, 0, 3, 5, 8, 9, 15, 16, 26, 28,
-- 31, 35, 38, 39, 41, 43, 45, 49, 53, 57,
-- 59, 62, 63, 68, 69, 71, 73, 75, 77, 79
--};
--
--/* YYRHS -- A `-1'-separated list of the rules' RHS. */
--static const yytype_int8 yyrhs[] =
--{
-- 21, 0, -1, 22, -1, 23, 22, -1, -1, 31,
-- 32, 33, 34, 11, -1, -1, 31, 8, 33, 34,
-- 30, 29, 24, 25, 11, -1, 11, -1, 1, 11,
-- -1, 13, 27, 25, -1, 27, 25, -1, -1, 32,
-- -1, 7, -1, 6, -1, 26, 30, 29, -1, 9,
-- 14, 28, -1, 15, 28, 16, -1, 9, -1, 17,
-- 28, -1, -1, 18, 9, 19, 9, -1, -1, 12,
-- -1, 3, -1, 4, -1, 5, -1, 10, -1, 9,
-- -1
--};
--
--/* YYRLINE[YYN] -- source line where rule number YYN was defined. */
--static const yytype_uint16 yyrline[] =
--{
-- 0, 299, 299, 303, 304, 308, 315, 314, 323, 324,
-- 328, 329, 330, 334, 339, 344, 352, 361, 365, 369,
-- 376, 382, 388, 395, 402, 410, 415, 420, 428, 444
--};
--#endif
--
--#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE
--/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
-- First, the terminals, then, starting at YYNTOKENS, nonterminals. */
--static const char *const yytname[] =
--{
-- "$end", "error", "$undefined", "DREG", "CREG", "GREG", "IMMED", "ADDR",
-- "INSN", "NUM", "ID", "NL", "PNUM", "','", "'|'", "'['", "']'", "'*'",
-- "':'", "'-'", "$accept", "insntbl", "entrys", "entry", "@1",
-- "fieldspecs", "ftype", "fieldspec", "flagexpr", "flags", "range", "pnum",
-- "regtype", "name", "value", 0
--};
--#endif
--
--# ifdef YYPRINT
--/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to
-- token YYLEX-NUM. */
--static const yytype_uint16 yytoknum[] =
--{
-- 0, 256, 257, 258, 259, 260, 261, 262, 263, 264,
-- 265, 266, 267, 44, 124, 91, 93, 42, 58, 45
--};
--# endif
--
--/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */
--static const yytype_uint8 yyr1[] =
--{
-- 0, 20, 21, 22, 22, 23, 24, 23, 23, 23,
-- 25, 25, 25, 26, 26, 26, 27, 28, 28, 28,
-- 29, 29, 30, 30, 31, 32, 32, 32, 33, 34
--};
--
--/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */
--static const yytype_uint8 yyr2[] =
--{
-- 0, 2, 1, 2, 0, 5, 0, 9, 1, 2,
-- 3, 2, 0, 1, 1, 1, 3, 3, 3, 1,
-- 2, 0, 4, 0, 1, 1, 1, 1, 1, 1
--};
--
--/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
-- STATE-NUM when YYTABLE doesn't specify something else to do. Zero
-- means the default is an error. */
--static const yytype_uint8 yydefact[] =
--{
-- 0, 0, 8, 24, 0, 2, 0, 0, 9, 1,
-- 3, 25, 26, 27, 0, 0, 28, 0, 0, 29,
-- 23, 0, 0, 21, 5, 0, 0, 6, 0, 19,
-- 0, 20, 12, 22, 0, 0, 15, 14, 0, 0,
-- 23, 12, 13, 17, 18, 12, 7, 21, 11, 10,
-- 16
--};
--
--/* YYDEFGOTO[NTERM-NUM]. */
--static const yytype_int8 yydefgoto[] =
--{
-- -1, 4, 5, 6, 32, 39, 40, 41, 31, 27,
-- 23, 7, 42, 17, 20
--};
--
--/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
-- STATE-NUM. */
--#define YYPACT_NINF -16
--static const yytype_int8 yypact[] =
--{
-- 0, -9, -16, -16, 10, -16, 0, 12, -16, -16,
-- -16, -16, -16, -16, 3, 3, -16, 9, 9, -16,
-- 11, 8, 19, 15, -16, 14, -6, -16, 25, 21,
-- -6, -16, 1, -16, -6, 20, -16, -16, 18, 26,
-- 11, 1, -16, -16, -16, 1, -16, 15, -16, -16,
-- -16
--};
--
--/* YYPGOTO[NTERM-NUM]. */
--static const yytype_int8 yypgoto[] =
--{
-- -16, -16, 32, -16, -16, -15, -16, 2, -3, -8,
-- 4, -16, 34, 27, 28
--};
--
--/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If
-- positive, shift that token. If negative, reduce the rule which
-- number is the opposite. If zero, do what YYDEFACT says.
-- If YYTABLE_NINF, syntax error. */
--#define YYTABLE_NINF -5
--static const yytype_int8 yytable[] =
--{
-- -4, 1, 8, 29, 11, 12, 13, 36, 37, 30,
-- 9, 2, 3, 16, 38, 11, 12, 13, 19, 24,
-- 14, 11, 12, 13, 36, 37, 48, 35, 25, 22,
-- 49, 43, 26, 28, 33, 34, 44, 46, 10, 50,
-- 45, 15, 18, 0, 47, 0, 21
--};
--
--static const yytype_int8 yycheck[] =
--{
-- 0, 1, 11, 9, 3, 4, 5, 6, 7, 15,
-- 0, 11, 12, 10, 13, 3, 4, 5, 9, 11,
-- 8, 3, 4, 5, 6, 7, 41, 30, 9, 18,
-- 45, 34, 17, 19, 9, 14, 16, 11, 6, 47,
-- 38, 7, 15, -1, 40, -1, 18
--};
--
--/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
-- symbol of state STATE-NUM. */
--static const yytype_uint8 yystos[] =
--{
-- 0, 1, 11, 12, 21, 22, 23, 31, 11, 0,
-- 22, 3, 4, 5, 8, 32, 10, 33, 33, 9,
-- 34, 34, 18, 30, 11, 9, 17, 29, 19, 9,
-- 15, 28, 24, 9, 14, 28, 6, 7, 13, 25,
-- 26, 27, 32, 28, 16, 27, 11, 30, 25, 25,
-- 29
--};
--
--#define yyerrok (yyerrstatus = 0)
--#define yyclearin (yychar = YYEMPTY)
--#define YYEMPTY (-2)
--#define YYEOF 0
--
--#define YYACCEPT goto yyacceptlab
--#define YYABORT goto yyabortlab
--#define YYERROR goto yyerrorlab
--
--
--/* Like YYERROR except do call yyerror. This remains here temporarily
-- to ease the transition to the new meaning of YYERROR, for GCC.
-- Once GCC version 2 has supplanted version 1, this can go. */
--
--#define YYFAIL goto yyerrlab
--
--#define YYRECOVERING() (!!yyerrstatus)
--
--#define YYBACKUP(Token, Value) \
--do \
-- if (yychar == YYEMPTY && yylen == 1) \
-- { \
-- yychar = (Token); \
-- yylval = (Value); \
-- yytoken = YYTRANSLATE (yychar); \
-- YYPOPSTACK (1); \
-- goto yybackup; \
-- } \
-- else \
-- { \
-- yyerror (YY_("syntax error: cannot back up")); \
-- YYERROR; \
-- } \
--while (YYID (0))
--
--
--#define YYTERROR 1
--#define YYERRCODE 256
--
--
--/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
-- If N is 0, then set CURRENT to the empty location which ends
-- the previous symbol: RHS[0] (always defined). */
--
--#define YYRHSLOC(Rhs, K) ((Rhs)[K])
--#ifndef YYLLOC_DEFAULT
--# define YYLLOC_DEFAULT(Current, Rhs, N) \
-- do \
-- if (YYID (N)) \
-- { \
-- (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \
-- (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \
-- (Current).last_line = YYRHSLOC (Rhs, N).last_line; \
-- (Current).last_column = YYRHSLOC (Rhs, N).last_column; \
-- } \
-- else \
-- { \
-- (Current).first_line = (Current).last_line = \
-- YYRHSLOC (Rhs, 0).last_line; \
-- (Current).first_column = (Current).last_column = \
-- YYRHSLOC (Rhs, 0).last_column; \
-- } \
-- while (YYID (0))
--#endif
--
--
--/* YY_LOCATION_PRINT -- Print the location on the stream.
-- This macro was not mandated originally: define only if we know
-- we won't break user code: when these are the locations we know. */
--
--#ifndef YY_LOCATION_PRINT
--# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL
--# define YY_LOCATION_PRINT(File, Loc) \
-- fprintf (File, "%d.%d-%d.%d", \
-- (Loc).first_line, (Loc).first_column, \
-- (Loc).last_line, (Loc).last_column)
--# else
--# define YY_LOCATION_PRINT(File, Loc) ((void) 0)
--# endif
--#endif
--
--
--/* YYLEX -- calling `yylex' with the right arguments. */
--
--#ifdef YYLEX_PARAM
--# define YYLEX yylex (YYLEX_PARAM)
--#else
--# define YYLEX yylex ()
--#endif
--
--/* Enable debugging if requested. */
--#if YYDEBUG
--
--# ifndef YYFPRINTF
--# include <stdio.h> /* INFRINGES ON USER NAME SPACE */
--# define YYFPRINTF fprintf
--# endif
--
--# define YYDPRINTF(Args) \
--do { \
-- if (yydebug) \
-- YYFPRINTF Args; \
--} while (YYID (0))
--
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \
--do { \
-- if (yydebug) \
-- { \
-- YYFPRINTF (stderr, "%s ", Title); \
-- yy_symbol_print (stderr, \
-- Type, Value); \
-- YYFPRINTF (stderr, "\n"); \
-- } \
--} while (YYID (0))
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_value_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (!yyvaluep)
-- return;
--# ifdef YYPRINT
-- if (yytype < YYNTOKENS)
-- YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
--# else
-- YYUSE (yyoutput);
--# endif
-- switch (yytype)
-- {
-- default:
-- break;
-- }
--}
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (yytype < YYNTOKENS)
-- YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
-- else
-- YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
--
-- yy_symbol_value_print (yyoutput, yytype, yyvaluep);
-- YYFPRINTF (yyoutput, ")");
--}
--
--/*------------------------------------------------------------------.
--| yy_stack_print -- Print the state stack from its BOTTOM up to its |
--| TOP (included). |
--`------------------------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_stack_print (yytype_int16 *bottom, yytype_int16 *top)
--#else
--static void
--yy_stack_print (bottom, top)
-- yytype_int16 *bottom;
-- yytype_int16 *top;
--#endif
--{
-- YYFPRINTF (stderr, "Stack now");
-- for (; bottom <= top; ++bottom)
-- YYFPRINTF (stderr, " %d", *bottom);
-- YYFPRINTF (stderr, "\n");
--}
--
--# define YY_STACK_PRINT(Bottom, Top) \
--do { \
-- if (yydebug) \
-- yy_stack_print ((Bottom), (Top)); \
--} while (YYID (0))
--
--
--/*------------------------------------------------.
--| Report that the YYRULE is going to be reduced. |
--`------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_reduce_print (YYSTYPE *yyvsp, int yyrule)
--#else
--static void
--yy_reduce_print (yyvsp, yyrule)
-- YYSTYPE *yyvsp;
-- int yyrule;
--#endif
--{
-- int yynrhs = yyr2[yyrule];
-- int yyi;
-- unsigned long int yylno = yyrline[yyrule];
-- YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
-- yyrule - 1, yylno);
-- /* The symbols being reduced. */
-- for (yyi = 0; yyi < yynrhs; yyi++)
-- {
-- fprintf (stderr, " $%d = ", yyi + 1);
-- yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi],
-- &(yyvsp[(yyi + 1) - (yynrhs)])
-- );
-- fprintf (stderr, "\n");
-- }
--}
--
--# define YY_REDUCE_PRINT(Rule) \
--do { \
-- if (yydebug) \
-- yy_reduce_print (yyvsp, Rule); \
--} while (YYID (0))
--
--/* Nonzero means print parse trace. It is left uninitialized so that
-- multiple parsers can coexist. */
--int yydebug;
--#else /* !YYDEBUG */
--# define YYDPRINTF(Args)
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
--# define YY_STACK_PRINT(Bottom, Top)
--# define YY_REDUCE_PRINT(Rule)
--#endif /* !YYDEBUG */
--
--
--/* YYINITDEPTH -- initial size of the parser's stacks. */
--#ifndef YYINITDEPTH
--# define YYINITDEPTH 200
--#endif
--
--/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
-- if the built-in stack extension method is used).
--
-- Do not make this value too large; the results are undefined if
-- YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
-- evaluated with infinite-precision integer arithmetic. */
--
--#ifndef YYMAXDEPTH
--# define YYMAXDEPTH 10000
--#endif
--
--
--
--#if YYERROR_VERBOSE
--
--# ifndef yystrlen
--# if defined __GLIBC__ && defined _STRING_H
--# define yystrlen strlen
--# else
--/* Return the length of YYSTR. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static YYSIZE_T
--yystrlen (const char *yystr)
--#else
--static YYSIZE_T
--yystrlen (yystr)
-- const char *yystr;
--#endif
--{
-- YYSIZE_T yylen;
-- for (yylen = 0; yystr[yylen]; yylen++)
-- continue;
-- return yylen;
--}
--# endif
--# endif
--
--# ifndef yystpcpy
--# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
--# define yystpcpy stpcpy
--# else
--/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
-- YYDEST. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static char *
--yystpcpy (char *yydest, const char *yysrc)
--#else
--static char *
--yystpcpy (yydest, yysrc)
-- char *yydest;
-- const char *yysrc;
--#endif
--{
-- char *yyd = yydest;
-- const char *yys = yysrc;
--
-- while ((*yyd++ = *yys++) != '\0')
-- continue;
--
-- return yyd - 1;
--}
--# endif
--# endif
--
--# ifndef yytnamerr
--/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
-- quotes and backslashes, so that it's suitable for yyerror. The
-- heuristic is that double-quoting is unnecessary unless the string
-- contains an apostrophe, a comma, or backslash (other than
-- backslash-backslash). YYSTR is taken from yytname. If YYRES is
-- null, do not copy; instead, return the length of what the result
-- would have been. */
--static YYSIZE_T
--yytnamerr (char *yyres, const char *yystr)
--{
-- if (*yystr == '"')
-- {
-- YYSIZE_T yyn = 0;
-- char const *yyp = yystr;
--
-- for (;;)
-- switch (*++yyp)
-- {
-- case '\'':
-- case ',':
-- goto do_not_strip_quotes;
--
-- case '\\':
-- if (*++yyp != '\\')
-- goto do_not_strip_quotes;
-- /* Fall through. */
-- default:
-- if (yyres)
-- yyres[yyn] = *yyp;
-- yyn++;
-- break;
--
-- case '"':
-- if (yyres)
-- yyres[yyn] = '\0';
-- return yyn;
-- }
-- do_not_strip_quotes: ;
-- }
--
-- if (! yyres)
-- return yystrlen (yystr);
--
-- return yystpcpy (yyres, yystr) - yyres;
--}
--# endif
--
--/* Copy into YYRESULT an error message about the unexpected token
-- YYCHAR while in state YYSTATE. Return the number of bytes copied,
-- including the terminating null byte. If YYRESULT is null, do not
-- copy anything; just return the number of bytes that would be
-- copied. As a special case, return 0 if an ordinary "syntax error"
-- message will do. Return YYSIZE_MAXIMUM if overflow occurs during
-- size calculation. */
--static YYSIZE_T
--yysyntax_error (char *yyresult, int yystate, int yychar)
--{
-- int yyn = yypact[yystate];
--
-- if (! (YYPACT_NINF < yyn && yyn <= YYLAST))
-- return 0;
-- else
-- {
-- int yytype = YYTRANSLATE (yychar);
-- YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]);
-- YYSIZE_T yysize = yysize0;
-- YYSIZE_T yysize1;
-- int yysize_overflow = 0;
-- enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
-- char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
-- int yyx;
--
--# if 0
-- /* This is so xgettext sees the translatable formats that are
-- constructed on the fly. */
-- YY_("syntax error, unexpected %s");
-- YY_("syntax error, unexpected %s, expecting %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s");
--# endif
-- char *yyfmt;
-- char const *yyf;
-- static char const yyunexpected[] = "syntax error, unexpected %s";
-- static char const yyexpecting[] = ", expecting %s";
-- static char const yyor[] = " or %s";
-- char yyformat[sizeof yyunexpected
-- + sizeof yyexpecting - 1
-- + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2)
-- * (sizeof yyor - 1))];
-- char const *yyprefix = yyexpecting;
--
-- /* Start YYX at -YYN if negative to avoid negative indexes in
-- YYCHECK. */
-- int yyxbegin = yyn < 0 ? -yyn : 0;
--
-- /* Stay within bounds of both yycheck and yytname. */
-- int yychecklim = YYLAST - yyn + 1;
-- int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
-- int yycount = 1;
--
-- yyarg[0] = yytname[yytype];
-- yyfmt = yystpcpy (yyformat, yyunexpected);
--
-- for (yyx = yyxbegin; yyx < yyxend; ++yyx)
-- if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
-- {
-- if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
-- {
-- yycount = 1;
-- yysize = yysize0;
-- yyformat[sizeof yyunexpected - 1] = '\0';
-- break;
-- }
-- yyarg[yycount++] = yytname[yyx];
-- yysize1 = yysize + yytnamerr (0, yytname[yyx]);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
-- yyfmt = yystpcpy (yyfmt, yyprefix);
-- yyprefix = yyor;
-- }
--
-- yyf = YY_(yyformat);
-- yysize1 = yysize + yystrlen (yyf);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
--
-- if (yysize_overflow)
-- return YYSIZE_MAXIMUM;
--
-- if (yyresult)
-- {
-- /* Avoid sprintf, as that infringes on the user's name space.
-- Don't have undefined behavior even if the translation
-- produced a string with the wrong number of "%s"s. */
-- char *yyp = yyresult;
-- int yyi = 0;
-- while ((*yyp = *yyf) != '\0')
-- {
-- if (*yyp == '%' && yyf[1] == 's' && yyi < yycount)
-- {
-- yyp += yytnamerr (yyp, yyarg[yyi++]);
-- yyf += 2;
-- }
-- else
-- {
-- yyp++;
-- yyf++;
-- }
-- }
-- }
-- return yysize;
-- }
--}
--#endif /* YYERROR_VERBOSE */
--
--
--/*-----------------------------------------------.
--| Release the memory associated to this symbol. |
--`-----------------------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep)
--#else
--static void
--yydestruct (yymsg, yytype, yyvaluep)
-- const char *yymsg;
-- int yytype;
-- YYSTYPE *yyvaluep;
--#endif
--{
-- YYUSE (yyvaluep);
--
-- if (!yymsg)
-- yymsg = "Deleting";
-- YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
--
-- switch (yytype)
-- {
--
-- default:
-- break;
-- }
--}
--
--
--/* Prevent warnings from -Wmissing-prototypes. */
--
--#ifdef YYPARSE_PARAM
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void *YYPARSE_PARAM);
--#else
--int yyparse ();
--#endif
--#else /* ! YYPARSE_PARAM */
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void);
--#else
--int yyparse ();
--#endif
--#endif /* ! YYPARSE_PARAM */
--
--
--
--/* The look-ahead symbol. */
--int yychar;
--
--/* The semantic value of the look-ahead symbol. */
--YYSTYPE yylval;
--
--/* Number of syntax errors so far. */
--int yynerrs;
--
--
--
--/*----------.
--| yyparse. |
--`----------*/
--
--#ifdef YYPARSE_PARAM
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void *YYPARSE_PARAM)
--#else
--int
--yyparse (YYPARSE_PARAM)
-- void *YYPARSE_PARAM;
--#endif
--#else /* ! YYPARSE_PARAM */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void)
--#else
--int
--yyparse ()
--
--#endif
--#endif
--{
--
-- int yystate;
-- int yyn;
-- int yyresult;
-- /* Number of tokens to shift before error messages enabled. */
-- int yyerrstatus;
-- /* Look-ahead token as an internal (translated) token number. */
-- int yytoken = 0;
--#if YYERROR_VERBOSE
-- /* Buffer for error messages, and its allocated size. */
-- char yymsgbuf[128];
-- char *yymsg = yymsgbuf;
-- YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
--#endif
--
-- /* Three stacks and their tools:
-- `yyss': related to states,
-- `yyvs': related to semantic values,
-- `yyls': related to locations.
--
-- Refer to the stacks thru separate pointers, to allow yyoverflow
-- to reallocate them elsewhere. */
--
-- /* The state stack. */
-- yytype_int16 yyssa[YYINITDEPTH];
-- yytype_int16 *yyss = yyssa;
-- yytype_int16 *yyssp;
--
-- /* The semantic value stack. */
-- YYSTYPE yyvsa[YYINITDEPTH];
-- YYSTYPE *yyvs = yyvsa;
-- YYSTYPE *yyvsp;
--
--
--
--#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N))
--
-- YYSIZE_T yystacksize = YYINITDEPTH;
--
-- /* The variables used to return semantic value and location from the
-- action routines. */
-- YYSTYPE yyval;
--
--
-- /* The number of symbols on the RHS of the reduced rule.
-- Keep to zero when no symbol should be popped. */
-- int yylen = 0;
--
-- YYDPRINTF ((stderr, "Starting parse\n"));
--
-- yystate = 0;
-- yyerrstatus = 0;
-- yynerrs = 0;
-- yychar = YYEMPTY; /* Cause a token to be read. */
--
-- /* Initialize stack pointers.
-- Waste one element of value and location stack
-- so that they stay on the same level as the state stack.
-- The wasted elements are never initialized. */
--
-- yyssp = yyss;
-- yyvsp = yyvs;
--
-- goto yysetstate;
--
--/*------------------------------------------------------------.
--| yynewstate -- Push a new state, which is found in yystate. |
--`------------------------------------------------------------*/
-- yynewstate:
-- /* In all cases, when you get here, the value and location stacks
-- have just been pushed. So pushing a state here evens the stacks. */
-- yyssp++;
--
-- yysetstate:
-- *yyssp = yystate;
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- {
-- /* Get the current used size of the three stacks, in elements. */
-- YYSIZE_T yysize = yyssp - yyss + 1;
--
--#ifdef yyoverflow
-- {
-- /* Give user a chance to reallocate the stack. Use copies of
-- these so that the &'s don't force the real ones into
-- memory. */
-- YYSTYPE *yyvs1 = yyvs;
-- yytype_int16 *yyss1 = yyss;
--
--
-- /* Each stack pointer address is followed by the size of the
-- data in use in that stack, in bytes. This used to be a
-- conditional around just the two extra args, but that might
-- be undefined if yyoverflow is a macro. */
-- yyoverflow (YY_("memory exhausted"),
-- &yyss1, yysize * sizeof (*yyssp),
-- &yyvs1, yysize * sizeof (*yyvsp),
--
-- &yystacksize);
--
-- yyss = yyss1;
-- yyvs = yyvs1;
-- }
--#else /* no yyoverflow */
--# ifndef YYSTACK_RELOCATE
-- goto yyexhaustedlab;
--# else
-- /* Extend the stack our own way. */
-- if (YYMAXDEPTH <= yystacksize)
-- goto yyexhaustedlab;
-- yystacksize *= 2;
-- if (YYMAXDEPTH < yystacksize)
-- yystacksize = YYMAXDEPTH;
--
-- {
-- yytype_int16 *yyss1 = yyss;
-- union yyalloc *yyptr =
-- (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
-- if (! yyptr)
-- goto yyexhaustedlab;
-- YYSTACK_RELOCATE (yyss);
-- YYSTACK_RELOCATE (yyvs);
--
--# undef YYSTACK_RELOCATE
-- if (yyss1 != yyssa)
-- YYSTACK_FREE (yyss1);
-- }
--# endif
--#endif /* no yyoverflow */
--
-- yyssp = yyss + yysize - 1;
-- yyvsp = yyvs + yysize - 1;
--
--
-- YYDPRINTF ((stderr, "Stack size increased to %lu\n",
-- (unsigned long int) yystacksize));
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- YYABORT;
-- }
--
-- YYDPRINTF ((stderr, "Entering state %d\n", yystate));
--
-- goto yybackup;
--
--/*-----------.
--| yybackup. |
--`-----------*/
--yybackup:
--
-- /* Do appropriate processing given the current state. Read a
-- look-ahead token if we need one and don't already have one. */
--
-- /* First try to decide what to do without reference to look-ahead token. */
-- yyn = yypact[yystate];
-- if (yyn == YYPACT_NINF)
-- goto yydefault;
--
-- /* Not known => get a look-ahead token if don't already have one. */
--
-- /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */
-- if (yychar == YYEMPTY)
-- {
-- YYDPRINTF ((stderr, "Reading a token: "));
-- yychar = YYLEX;
-- }
--
-- if (yychar <= YYEOF)
-- {
-- yychar = yytoken = YYEOF;
-- YYDPRINTF ((stderr, "Now at end of input.\n"));
-- }
-- else
-- {
-- yytoken = YYTRANSLATE (yychar);
-- YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
-- }
--
-- /* If the proper action on seeing token YYTOKEN is to reduce or to
-- detect an error, take that action. */
-- yyn += yytoken;
-- if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
-- goto yydefault;
-- yyn = yytable[yyn];
-- if (yyn <= 0)
-- {
-- if (yyn == 0 || yyn == YYTABLE_NINF)
-- goto yyerrlab;
-- yyn = -yyn;
-- goto yyreduce;
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- /* Count tokens shifted since error; after three, turn off error
-- status. */
-- if (yyerrstatus)
-- yyerrstatus--;
--
-- /* Shift the look-ahead token. */
-- YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
--
-- /* Discard the shifted token unless it is eof. */
-- if (yychar != YYEOF)
-- yychar = YYEMPTY;
--
-- yystate = yyn;
-- *++yyvsp = yylval;
--
-- goto yynewstate;
--
--
--/*-----------------------------------------------------------.
--| yydefault -- do the default action for the current state. |
--`-----------------------------------------------------------*/
--yydefault:
-- yyn = yydefact[yystate];
-- if (yyn == 0)
-- goto yyerrlab;
-- goto yyreduce;
--
--
--/*-----------------------------.
--| yyreduce -- Do a reduction. |
--`-----------------------------*/
--yyreduce:
-- /* yyn is the number of a rule to reduce with. */
-- yylen = yyr2[yyn];
--
-- /* If YYLEN is nonzero, implement the default value of the action:
-- `$$ = $1'.
--
-- Otherwise, the following line sets YYVAL to garbage.
-- This behavior is undocumented and Bison
-- users should not rely upon it. Assigning to YYVAL
-- unconditionally makes the parser a bit smaller, and it avoids a
-- GCC warning that YYVAL may be used uninitialized. */
-- yyval = yyvsp[1-yylen];
--
--
-- YY_REDUCE_PRINT (yyn);
-- switch (yyn)
-- {
-- case 5:
--#line 309 "itbl-parse.y"
-- {
-- DBG (("line %d: entry pnum=%d type=%d name=%s value=x%x\n",
-- insntbl_line, (yyvsp[(1) - (5)].num), (yyvsp[(2) - (5)].num), (yyvsp[(3) - (5)].str), (yyvsp[(4) - (5)].val)));
-- itbl_add_reg ((yyvsp[(1) - (5)].num), (yyvsp[(2) - (5)].num), (yyvsp[(3) - (5)].str), (yyvsp[(4) - (5)].val));
-- }
-- break;
--
-- case 6:
--#line 315 "itbl-parse.y"
-- {
-- DBG (("line %d: entry pnum=%d type=INSN name=%s value=x%x",
-- insntbl_line, (yyvsp[(1) - (6)].num), (yyvsp[(3) - (6)].str), (yyvsp[(4) - (6)].val)));
-- DBG ((" sbit=%d ebit=%d flags=0x%x\n", sbit, ebit, (yyvsp[(6) - (6)].val)));
-- insn=itbl_add_insn ((yyvsp[(1) - (6)].num), (yyvsp[(3) - (6)].str), (yyvsp[(4) - (6)].val), sbit, ebit, (yyvsp[(6) - (6)].val));
-- }
-- break;
--
-- case 7:
--#line 322 "itbl-parse.y"
-- {}
-- break;
--
-- case 13:
--#line 335 "itbl-parse.y"
-- {
-- DBGL2 (("ftype\n"));
-- (yyval.num) = (yyvsp[(1) - (1)].num);
-- }
-- break;
--
-- case 14:
--#line 340 "itbl-parse.y"
-- {
-- DBGL2 (("addr\n"));
-- (yyval.num) = ADDR;
-- }
-- break;
--
-- case 15:
--#line 345 "itbl-parse.y"
-- {
-- DBGL2 (("immed\n"));
-- (yyval.num) = IMMED;
-- }
-- break;
--
-- case 16:
--#line 353 "itbl-parse.y"
-- {
-- DBG (("line %d: field type=%d sbit=%d ebit=%d, flags=0x%x\n",
-- insntbl_line, (yyvsp[(1) - (3)].num), sbit, ebit, (yyvsp[(3) - (3)].val)));
-- itbl_add_operand (insn, (yyvsp[(1) - (3)].num), sbit, ebit, (yyvsp[(3) - (3)].val));
-- }
-- break;
--
-- case 17:
--#line 362 "itbl-parse.y"
-- {
-- (yyval.val) = (yyvsp[(1) - (3)].num) | (yyvsp[(3) - (3)].val);
-- }
-- break;
--
-- case 18:
--#line 366 "itbl-parse.y"
-- {
-- (yyval.val) = (yyvsp[(2) - (3)].val);
-- }
-- break;
--
-- case 19:
--#line 370 "itbl-parse.y"
-- {
-- (yyval.val) = (yyvsp[(1) - (1)].num);
-- }
-- break;
--
-- case 20:
--#line 377 "itbl-parse.y"
-- {
-- DBGL2 (("flags=%d\n", (yyvsp[(2) - (2)].val)));
-- (yyval.val) = (yyvsp[(2) - (2)].val);
-- }
-- break;
--
-- case 21:
--#line 382 "itbl-parse.y"
-- {
-- (yyval.val) = 0;
-- }
-- break;
--
-- case 22:
--#line 389 "itbl-parse.y"
-- {
-- DBGL2 (("range %d %d\n", (yyvsp[(2) - (4)].num), (yyvsp[(4) - (4)].num)));
-- sbit = (yyvsp[(2) - (4)].num);
-- ebit = (yyvsp[(4) - (4)].num);
-- }
-- break;
--
-- case 23:
--#line 395 "itbl-parse.y"
-- {
-- sbit = 31;
-- ebit = 0;
-- }
-- break;
--
-- case 24:
--#line 403 "itbl-parse.y"
-- {
-- DBGL2 (("pnum=%d\n",(yyvsp[(1) - (1)].num)));
-- (yyval.num) = (yyvsp[(1) - (1)].num);
-- }
-- break;
--
-- case 25:
--#line 411 "itbl-parse.y"
-- {
-- DBGL2 (("dreg\n"));
-- (yyval.num) = DREG;
-- }
-- break;
--
-- case 26:
--#line 416 "itbl-parse.y"
-- {
-- DBGL2 (("creg\n"));
-- (yyval.num) = CREG;
-- }
-- break;
--
-- case 27:
--#line 421 "itbl-parse.y"
-- {
-- DBGL2 (("greg\n"));
-- (yyval.num) = GREG;
-- }
-- break;
--
-- case 28:
--#line 429 "itbl-parse.y"
-- {
-- DBGL2 (("name=%s\n",(yyvsp[(1) - (1)].str)));
-- (yyval.str) = (yyvsp[(1) - (1)].str);
-- }
-- break;
--
-- case 29:
--#line 445 "itbl-parse.y"
-- {
-- DBGL2 (("val=x%x\n",(yyvsp[(1) - (1)].num)));
-- (yyval.val) = (yyvsp[(1) - (1)].num);
-- }
-- break;
--
--
--/* Line 1267 of yacc.c. */
--#line 1783 "itbl-parse.c"
-- default: break;
-- }
-- YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
--
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
--
-- *++yyvsp = yyval;
--
--
-- /* Now `shift' the result of the reduction. Determine what state
-- that goes to, based on the state we popped back to and the rule
-- number reduced by. */
--
-- yyn = yyr1[yyn];
--
-- yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
-- if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
-- yystate = yytable[yystate];
-- else
-- yystate = yydefgoto[yyn - YYNTOKENS];
--
-- goto yynewstate;
--
--
--/*------------------------------------.
--| yyerrlab -- here on detecting error |
--`------------------------------------*/
--yyerrlab:
-- /* If not already recovering from an error, report this error. */
-- if (!yyerrstatus)
-- {
-- ++yynerrs;
--#if ! YYERROR_VERBOSE
-- yyerror (YY_("syntax error"));
--#else
-- {
-- YYSIZE_T yysize = yysyntax_error (0, yystate, yychar);
-- if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM)
-- {
-- YYSIZE_T yyalloc = 2 * yysize;
-- if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM))
-- yyalloc = YYSTACK_ALLOC_MAXIMUM;
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
-- yymsg = (char *) YYSTACK_ALLOC (yyalloc);
-- if (yymsg)
-- yymsg_alloc = yyalloc;
-- else
-- {
-- yymsg = yymsgbuf;
-- yymsg_alloc = sizeof yymsgbuf;
-- }
-- }
--
-- if (0 < yysize && yysize <= yymsg_alloc)
-- {
-- (void) yysyntax_error (yymsg, yystate, yychar);
-- yyerror (yymsg);
-- }
-- else
-- {
-- yyerror (YY_("syntax error"));
-- if (yysize != 0)
-- goto yyexhaustedlab;
-- }
-- }
--#endif
-- }
--
--
--
-- if (yyerrstatus == 3)
-- {
-- /* If just tried and failed to reuse look-ahead token after an
-- error, discard it. */
--
-- if (yychar <= YYEOF)
-- {
-- /* Return failure if at end of input. */
-- if (yychar == YYEOF)
-- YYABORT;
-- }
-- else
-- {
-- yydestruct ("Error: discarding",
-- yytoken, &yylval);
-- yychar = YYEMPTY;
-- }
-- }
--
-- /* Else will try to reuse look-ahead token after shifting the error
-- token. */
-- goto yyerrlab1;
--
--
--/*---------------------------------------------------.
--| yyerrorlab -- error raised explicitly by YYERROR. |
--`---------------------------------------------------*/
--yyerrorlab:
--
-- /* Pacify compilers like GCC when the user code never invokes
-- YYERROR and the label yyerrorlab therefore never appears in user
-- code. */
-- if (/*CONSTCOND*/ 0)
-- goto yyerrorlab;
--
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYERROR. */
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
-- yystate = *yyssp;
-- goto yyerrlab1;
--
--
--/*-------------------------------------------------------------.
--| yyerrlab1 -- common code for both syntax error and YYERROR. |
--`-------------------------------------------------------------*/
--yyerrlab1:
-- yyerrstatus = 3; /* Each real token shifted decrements this. */
--
-- for (;;)
-- {
-- yyn = yypact[yystate];
-- if (yyn != YYPACT_NINF)
-- {
-- yyn += YYTERROR;
-- if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
-- {
-- yyn = yytable[yyn];
-- if (0 < yyn)
-- break;
-- }
-- }
--
-- /* Pop the current state because it cannot handle the error token. */
-- if (yyssp == yyss)
-- YYABORT;
--
--
-- yydestruct ("Error: popping",
-- yystos[yystate], yyvsp);
-- YYPOPSTACK (1);
-- yystate = *yyssp;
-- YY_STACK_PRINT (yyss, yyssp);
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- *++yyvsp = yylval;
--
--
-- /* Shift the error token. */
-- YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
--
-- yystate = yyn;
-- goto yynewstate;
--
--
--/*-------------------------------------.
--| yyacceptlab -- YYACCEPT comes here. |
--`-------------------------------------*/
--yyacceptlab:
-- yyresult = 0;
-- goto yyreturn;
--
--/*-----------------------------------.
--| yyabortlab -- YYABORT comes here. |
--`-----------------------------------*/
--yyabortlab:
-- yyresult = 1;
-- goto yyreturn;
--
--#ifndef yyoverflow
--/*-------------------------------------------------.
--| yyexhaustedlab -- memory exhaustion comes here. |
--`-------------------------------------------------*/
--yyexhaustedlab:
-- yyerror (YY_("memory exhausted"));
-- yyresult = 2;
-- /* Fall through. */
--#endif
--
--yyreturn:
-- if (yychar != YYEOF && yychar != YYEMPTY)
-- yydestruct ("Cleanup: discarding lookahead",
-- yytoken, &yylval);
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYABORT or YYACCEPT. */
-- YYPOPSTACK (yylen);
-- YY_STACK_PRINT (yyss, yyssp);
-- while (yyssp != yyss)
-- {
-- yydestruct ("Cleanup: popping",
-- yystos[*yyssp], yyvsp);
-- YYPOPSTACK (1);
-- }
--#ifndef yyoverflow
-- if (yyss != yyssa)
-- YYSTACK_FREE (yyss);
--#endif
--#if YYERROR_VERBOSE
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
--#endif
-- /* Make sure YYID is used. */
-- return YYID (yyresult);
--}
--
--
--#line 450 "itbl-parse.y"
--
--
--static int
--yyerror (msg)
-- const char *msg;
--{
-- printf ("line %d: %s\n", insntbl_line, msg);
-- return 0;
--}
--
-diff -Nur binutils-2.24.orig/gas/itbl-parse.h binutils-2.24/gas/itbl-parse.h
---- binutils-2.24.orig/gas/itbl-parse.h 2013-11-18 09:49:28.000000000 +0100
-+++ binutils-2.24/gas/itbl-parse.h 1970-01-01 01:00:00.000000000 +0100
-@@ -1,87 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton interface for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- DREG = 258,
-- CREG = 259,
-- GREG = 260,
-- IMMED = 261,
-- ADDR = 262,
-- INSN = 263,
-- NUM = 264,
-- ID = 265,
-- NL = 266,
-- PNUM = 267
-- };
--#endif
--/* Tokens. */
--#define DREG 258
--#define CREG 259
--#define GREG 260
--#define IMMED 261
--#define ADDR 262
--#define INSN 263
--#define NUM 264
--#define ID 265
--#define NL 266
--#define PNUM 267
--
--
--
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 282 "itbl-parse.y"
--{
-- char *str;
-- int num;
-- int processor;
-- unsigned long val;
-- }
--/* Line 1529 of yacc.c. */
--#line 80 "itbl-parse.h"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--extern YYSTYPE yylval;
--
-diff -Nur binutils-2.24.orig/gas/m68k-parse.c binutils-2.24/gas/m68k-parse.c
---- binutils-2.24.orig/gas/m68k-parse.c 2013-11-18 09:49:28.000000000 +0100
-+++ binutils-2.24/gas/m68k-parse.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,2863 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton implementation for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* C LALR(1) parser skeleton written by Richard Stallman, by
-- simplifying the original so-called "semantic" parser. */
--
--/* All symbols defined below should begin with yy or YY, to avoid
-- infringing on user name space. This should be done even for local
-- variables, as they might otherwise be expanded by user macros.
-- There are some unavoidable exceptions within include files to
-- define necessary library symbols; they are noted "INFRINGES ON
-- USER NAME SPACE" below. */
--
--/* Identify Bison output. */
--#define YYBISON 1
--
--/* Bison version. */
--#define YYBISON_VERSION "2.3"
--
--/* Skeleton name. */
--#define YYSKELETON_NAME "yacc.c"
--
--/* Pure parsers. */
--#define YYPURE 0
--
--/* Using locations. */
--#define YYLSP_NEEDED 0
--
--
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- DR = 258,
-- AR = 259,
-- FPR = 260,
-- FPCR = 261,
-- LPC = 262,
-- ZAR = 263,
-- ZDR = 264,
-- LZPC = 265,
-- CREG = 266,
-- INDEXREG = 267,
-- EXPR = 268
-- };
--#endif
--/* Tokens. */
--#define DR 258
--#define AR 259
--#define FPR 260
--#define FPCR 261
--#define LPC 262
--#define ZAR 263
--#define ZDR 264
--#define LZPC 265
--#define CREG 266
--#define INDEXREG 267
--#define EXPR 268
--
--
--
--
--/* Copy the first part of user declarations. */
--#line 28 "m68k-parse.y"
--
--
--#include "as.h"
--#include "tc-m68k.h"
--#include "m68k-parse.h"
--#include "safe-ctype.h"
--
--/* Remap normal yacc parser interface names (yyparse, yylex, yyerror,
-- etc), as well as gratuitously global symbol names If other parser
-- generators (bison, byacc, etc) produce additional global names that
-- conflict at link time, then those parser generators need to be
-- fixed instead of adding those names to this list. */
--
--#define yymaxdepth m68k_maxdepth
--#define yyparse m68k_parse
--#define yylex m68k_lex
--#define yyerror m68k_error
--#define yylval m68k_lval
--#define yychar m68k_char
--#define yydebug m68k_debug
--#define yypact m68k_pact
--#define yyr1 m68k_r1
--#define yyr2 m68k_r2
--#define yydef m68k_def
--#define yychk m68k_chk
--#define yypgo m68k_pgo
--#define yyact m68k_act
--#define yyexca m68k_exca
--#define yyerrflag m68k_errflag
--#define yynerrs m68k_nerrs
--#define yyps m68k_ps
--#define yypv m68k_pv
--#define yys m68k_s
--#define yy_yys m68k_yys
--#define yystate m68k_state
--#define yytmp m68k_tmp
--#define yyv m68k_v
--#define yy_yyv m68k_yyv
--#define yyval m68k_val
--#define yylloc m68k_lloc
--#define yyreds m68k_reds /* With YYDEBUG defined */
--#define yytoks m68k_toks /* With YYDEBUG defined */
--#define yylhs m68k_yylhs
--#define yylen m68k_yylen
--#define yydefred m68k_yydefred
--#define yydgoto m68k_yydgoto
--#define yysindex m68k_yysindex
--#define yyrindex m68k_yyrindex
--#define yygindex m68k_yygindex
--#define yytable m68k_yytable
--#define yycheck m68k_yycheck
--
--#ifndef YYDEBUG
--#define YYDEBUG 1
--#endif
--
--/* Internal functions. */
--
--static enum m68k_register m68k_reg_parse (char **);
--static int yylex (void);
--static void yyerror (const char *);
--
--/* The parser sets fields pointed to by this global variable. */
--static struct m68k_op *op;
--
--
--
--/* Enabling traces. */
--#ifndef YYDEBUG
--# define YYDEBUG 0
--#endif
--
--/* Enabling verbose error messages. */
--#ifdef YYERROR_VERBOSE
--# undef YYERROR_VERBOSE
--# define YYERROR_VERBOSE 1
--#else
--# define YYERROR_VERBOSE 0
--#endif
--
--/* Enabling the token table. */
--#ifndef YYTOKEN_TABLE
--# define YYTOKEN_TABLE 0
--#endif
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 96 "m68k-parse.y"
--{
-- struct m68k_indexreg indexreg;
-- enum m68k_register reg;
-- struct m68k_exp exp;
-- unsigned long mask;
-- int onereg;
-- int trailing_ampersand;
--}
--/* Line 193 of yacc.c. */
--#line 198 "m68k-parse.c"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--
--
--/* Copy the second part of user declarations. */
--
--
--/* Line 216 of yacc.c. */
--#line 211 "m68k-parse.c"
--
--#ifdef short
--# undef short
--#endif
--
--#ifdef YYTYPE_UINT8
--typedef YYTYPE_UINT8 yytype_uint8;
--#else
--typedef unsigned char yytype_uint8;
--#endif
--
--#ifdef YYTYPE_INT8
--typedef YYTYPE_INT8 yytype_int8;
--#elif (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--typedef signed char yytype_int8;
--#else
--typedef short int yytype_int8;
--#endif
--
--#ifdef YYTYPE_UINT16
--typedef YYTYPE_UINT16 yytype_uint16;
--#else
--typedef unsigned short int yytype_uint16;
--#endif
--
--#ifdef YYTYPE_INT16
--typedef YYTYPE_INT16 yytype_int16;
--#else
--typedef short int yytype_int16;
--#endif
--
--#ifndef YYSIZE_T
--# ifdef __SIZE_TYPE__
--# define YYSIZE_T __SIZE_TYPE__
--# elif defined size_t
--# define YYSIZE_T size_t
--# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stddef.h> /* INFRINGES ON USER NAME SPACE */
--# define YYSIZE_T size_t
--# else
--# define YYSIZE_T unsigned int
--# endif
--#endif
--
--#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
--
--#ifndef YY_
--# if defined YYENABLE_NLS && YYENABLE_NLS
--# if ENABLE_NLS
--# include <libintl.h> /* INFRINGES ON USER NAME SPACE */
--# define YY_(msgid) dgettext ("bison-runtime", msgid)
--# endif
--# endif
--# ifndef YY_
--# define YY_(msgid) msgid
--# endif
--#endif
--
--/* Suppress unused-variable warnings by "using" E. */
--#if ! defined lint || defined __GNUC__
--# define YYUSE(e) ((void) (e))
--#else
--# define YYUSE(e) /* empty */
--#endif
--
--/* Identity function, used to suppress warnings about constant conditions. */
--#ifndef lint
--# define YYID(n) (n)
--#else
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static int
--YYID (int i)
--#else
--static int
--YYID (i)
-- int i;
--#endif
--{
-- return i;
--}
--#endif
--
--#if ! defined yyoverflow || YYERROR_VERBOSE
--
--/* The parser invokes alloca or malloc; define the necessary symbols. */
--
--# ifdef YYSTACK_USE_ALLOCA
--# if YYSTACK_USE_ALLOCA
--# ifdef __GNUC__
--# define YYSTACK_ALLOC __builtin_alloca
--# elif defined __BUILTIN_VA_ARG_INCR
--# include <alloca.h> /* INFRINGES ON USER NAME SPACE */
--# elif defined _AIX
--# define YYSTACK_ALLOC __alloca
--# elif defined _MSC_VER
--# include <malloc.h> /* INFRINGES ON USER NAME SPACE */
--# define alloca _alloca
--# else
--# define YYSTACK_ALLOC alloca
--# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# endif
--# endif
--# endif
--
--# ifdef YYSTACK_ALLOC
-- /* Pacify GCC's `empty if-body' warning. */
--# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0))
--# ifndef YYSTACK_ALLOC_MAXIMUM
-- /* The OS might guarantee only one guard page at the bottom of the stack,
-- and a page size can be as small as 4096 bytes. So we cannot safely
-- invoke alloca (N) if N exceeds 4096. Use a slightly smaller number
-- to allow for a few compiler-allocated temporary stack slots. */
--# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
--# endif
--# else
--# define YYSTACK_ALLOC YYMALLOC
--# define YYSTACK_FREE YYFREE
--# ifndef YYSTACK_ALLOC_MAXIMUM
--# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
--# endif
--# if (defined __cplusplus && ! defined _STDLIB_H \
-- && ! ((defined YYMALLOC || defined malloc) \
-- && (defined YYFREE || defined free)))
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# ifndef YYMALLOC
--# define YYMALLOC malloc
--# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# ifndef YYFREE
--# define YYFREE free
--# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void free (void *); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# endif
--#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
--
--
--#if (! defined yyoverflow \
-- && (! defined __cplusplus \
-- || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
--
--/* A type that is properly aligned for any stack member. */
--union yyalloc
--{
-- yytype_int16 yyss;
-- YYSTYPE yyvs;
-- };
--
--/* The size of the maximum gap between one aligned stack and the next. */
--# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
--
--/* The size of an array large to enough to hold all stacks, each with
-- N elements. */
--# define YYSTACK_BYTES(N) \
-- ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \
-- + YYSTACK_GAP_MAXIMUM)
--
--/* Copy COUNT objects from FROM to TO. The source and destination do
-- not overlap. */
--# ifndef YYCOPY
--# if defined __GNUC__ && 1 < __GNUC__
--# define YYCOPY(To, From, Count) \
-- __builtin_memcpy (To, From, (Count) * sizeof (*(From)))
--# else
--# define YYCOPY(To, From, Count) \
-- do \
-- { \
-- YYSIZE_T yyi; \
-- for (yyi = 0; yyi < (Count); yyi++) \
-- (To)[yyi] = (From)[yyi]; \
-- } \
-- while (YYID (0))
--# endif
--# endif
--
--/* Relocate STACK from its old location to the new one. The
-- local variables YYSIZE and YYSTACKSIZE give the old and new number of
-- elements in the stack, and YYPTR gives the new location of the
-- stack. Advance YYPTR to a properly aligned location for the next
-- stack. */
--# define YYSTACK_RELOCATE(Stack) \
-- do \
-- { \
-- YYSIZE_T yynewbytes; \
-- YYCOPY (&yyptr->Stack, Stack, yysize); \
-- Stack = &yyptr->Stack; \
-- yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
-- yyptr += yynewbytes / sizeof (*yyptr); \
-- } \
-- while (YYID (0))
--
--#endif
--
--/* YYFINAL -- State number of the termination state. */
--#define YYFINAL 44
--/* YYLAST -- Last index in YYTABLE. */
--#define YYLAST 215
--
--/* YYNTOKENS -- Number of terminals. */
--#define YYNTOKENS 27
--/* YYNNTS -- Number of nonterminals. */
--#define YYNNTS 21
--/* YYNRULES -- Number of rules. */
--#define YYNRULES 89
--/* YYNRULES -- Number of states. */
--#define YYNSTATES 180
--
--/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */
--#define YYUNDEFTOK 2
--#define YYMAXUTOK 268
--
--#define YYTRANSLATE(YYX) \
-- ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
--
--/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */
--static const yytype_uint8 yytranslate[] =
--{
-- 0, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 17, 2, 2, 14, 2,
-- 18, 19, 2, 20, 22, 21, 2, 26, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 15, 2, 16, 2, 25, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 23, 2, 24, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 1, 2, 3, 4,
-- 5, 6, 7, 8, 9, 10, 11, 12, 13
--};
--
--#if YYDEBUG
--/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
-- YYRHS. */
--static const yytype_uint16 yyprhs[] =
--{
-- 0, 0, 3, 5, 8, 11, 12, 14, 17, 20,
-- 22, 24, 26, 28, 30, 32, 35, 38, 40, 44,
-- 49, 54, 60, 66, 71, 75, 79, 83, 91, 99,
-- 106, 112, 119, 125, 132, 138, 144, 149, 159, 167,
-- 176, 183, 194, 203, 214, 223, 232, 235, 239, 243,
-- 249, 256, 267, 277, 288, 290, 292, 294, 296, 298,
-- 300, 302, 304, 306, 308, 310, 312, 314, 316, 317,
-- 319, 321, 323, 324, 327, 328, 331, 332, 335, 337,
-- 341, 345, 347, 349, 353, 357, 361, 363, 365, 367
--};
--
--/* YYRHS -- A `-1'-separated list of the rules' RHS. */
--static const yytype_int8 yyrhs[] =
--{
-- 28, 0, -1, 30, -1, 31, 29, -1, 32, 29,
-- -1, -1, 14, -1, 15, 15, -1, 16, 16, -1,
-- 3, -1, 4, -1, 5, -1, 6, -1, 11, -1,
-- 13, -1, 17, 13, -1, 14, 13, -1, 44, -1,
-- 18, 4, 19, -1, 18, 4, 19, 20, -1, 21,
-- 18, 4, 19, -1, 18, 13, 22, 38, 19, -1,
-- 18, 38, 22, 13, 19, -1, 13, 18, 38, 19,
-- -1, 18, 7, 19, -1, 18, 8, 19, -1, 18,
-- 10, 19, -1, 18, 13, 22, 38, 22, 33, 19,
-- -1, 18, 13, 22, 38, 22, 40, 19, -1, 18,
-- 13, 22, 34, 41, 19, -1, 18, 34, 22, 13,
-- 19, -1, 13, 18, 38, 22, 33, 19, -1, 18,
-- 38, 22, 33, 19, -1, 13, 18, 38, 22, 40,
-- 19, -1, 18, 38, 22, 40, 19, -1, 13, 18,
-- 34, 41, 19, -1, 18, 34, 41, 19, -1, 18,
-- 23, 13, 41, 24, 22, 33, 42, 19, -1, 18,
-- 23, 13, 41, 24, 42, 19, -1, 18, 23, 38,
-- 24, 22, 33, 42, 19, -1, 18, 23, 38, 24,
-- 42, 19, -1, 18, 23, 13, 22, 38, 22, 33,
-- 24, 42, 19, -1, 18, 23, 38, 22, 33, 24,
-- 42, 19, -1, 18, 23, 13, 22, 38, 22, 40,
-- 24, 42, 19, -1, 18, 23, 38, 22, 40, 24,
-- 42, 19, -1, 18, 23, 43, 34, 41, 24, 42,
-- 19, -1, 39, 25, -1, 39, 25, 20, -1, 39,
-- 25, 21, -1, 39, 25, 18, 13, 19, -1, 39,
-- 25, 18, 43, 33, 19, -1, 39, 25, 18, 13,
-- 19, 25, 18, 43, 33, 19, -1, 39, 25, 18,
-- 13, 19, 25, 18, 13, 19, -1, 39, 25, 18,
-- 43, 33, 19, 25, 18, 13, 19, -1, 12, -1,
-- 35, -1, 12, -1, 36, -1, 36, -1, 4, -1,
-- 8, -1, 3, -1, 9, -1, 4, -1, 7, -1,
-- 37, -1, 10, -1, 8, -1, -1, 38, -1, 7,
-- -1, 10, -1, -1, 22, 38, -1, -1, 22, 13,
-- -1, -1, 13, 22, -1, 46, -1, 46, 26, 45,
-- -1, 47, 26, 45, -1, 47, -1, 46, -1, 46,
-- 26, 45, -1, 47, 26, 45, -1, 47, 21, 47,
-- -1, 3, -1, 4, -1, 5, -1, 6, -1
--};
--
--/* YYRLINE[YYN] -- source line where rule number YYN was defined. */
--static const yytype_uint16 yyrline[] =
--{
-- 0, 121, 121, 122, 126, 135, 136, 143, 148, 153,
-- 158, 163, 168, 173, 178, 183, 188, 193, 206, 211,
-- 216, 221, 231, 241, 251, 256, 261, 266, 273, 284,
-- 291, 297, 304, 310, 321, 331, 338, 344, 352, 359,
-- 366, 372, 380, 387, 399, 410, 423, 431, 439, 447,
-- 457, 464, 472, 479, 493, 494, 507, 508, 520, 521,
-- 522, 528, 529, 535, 536, 543, 544, 545, 552, 555,
-- 561, 562, 569, 572, 582, 586, 596, 600, 609, 610,
-- 614, 626, 630, 631, 635, 642, 652, 656, 660, 664
--};
--#endif
--
--#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE
--/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
-- First, the terminals, then, starting at YYNTOKENS, nonterminals. */
--static const char *const yytname[] =
--{
-- "$end", "error", "$undefined", "DR", "AR", "FPR", "FPCR", "LPC", "ZAR",
-- "ZDR", "LZPC", "CREG", "INDEXREG", "EXPR", "'&'", "'<'", "'>'", "'#'",
-- "'('", "')'", "'+'", "'-'", "','", "'['", "']'", "'@'", "'/'", "$accept",
-- "operand", "optional_ampersand", "generic_operand", "motorola_operand",
-- "mit_operand", "zireg", "zdireg", "zadr", "zdr", "apc", "zapc",
-- "optzapc", "zpc", "optczapc", "optcexpr", "optexprc", "reglist",
-- "ireglist", "reglistpair", "reglistreg", 0
--};
--#endif
--
--# ifdef YYPRINT
--/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to
-- token YYLEX-NUM. */
--static const yytype_uint16 yytoknum[] =
--{
-- 0, 256, 257, 258, 259, 260, 261, 262, 263, 264,
-- 265, 266, 267, 268, 38, 60, 62, 35, 40, 41,
-- 43, 45, 44, 91, 93, 64, 47
--};
--# endif
--
--/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */
--static const yytype_uint8 yyr1[] =
--{
-- 0, 27, 28, 28, 28, 29, 29, 30, 30, 30,
-- 30, 30, 30, 30, 30, 30, 30, 30, 31, 31,
-- 31, 31, 31, 31, 31, 31, 31, 31, 31, 31,
-- 31, 31, 31, 31, 31, 31, 31, 31, 31, 31,
-- 31, 31, 31, 31, 31, 31, 32, 32, 32, 32,
-- 32, 32, 32, 32, 33, 33, 34, 34, 35, 35,
-- 35, 36, 36, 37, 37, 38, 38, 38, 39, 39,
-- 40, 40, 41, 41, 42, 42, 43, 43, 44, 44,
-- 44, 45, 45, 45, 45, 46, 47, 47, 47, 47
--};
--
--/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */
--static const yytype_uint8 yyr2[] =
--{
-- 0, 2, 1, 2, 2, 0, 1, 2, 2, 1,
-- 1, 1, 1, 1, 1, 2, 2, 1, 3, 4,
-- 4, 5, 5, 4, 3, 3, 3, 7, 7, 6,
-- 5, 6, 5, 6, 5, 5, 4, 9, 7, 8,
-- 6, 10, 8, 10, 8, 8, 2, 3, 3, 5,
-- 6, 10, 9, 10, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 0, 1,
-- 1, 1, 0, 2, 0, 2, 0, 2, 1, 3,
-- 3, 1, 1, 3, 3, 3, 1, 1, 1, 1
--};
--
--/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
-- STATE-NUM when YYTABLE doesn't specify something else to do. Zero
-- means the default is an error. */
--static const yytype_uint8 yydefact[] =
--{
-- 68, 86, 87, 88, 89, 64, 67, 66, 13, 14,
-- 0, 0, 0, 0, 0, 0, 0, 2, 5, 5,
-- 65, 69, 0, 17, 78, 0, 0, 16, 7, 8,
-- 15, 61, 63, 64, 67, 62, 66, 56, 0, 76,
-- 72, 57, 0, 0, 1, 6, 3, 4, 46, 0,
-- 0, 0, 63, 72, 0, 18, 24, 25, 26, 0,
-- 72, 0, 0, 0, 0, 0, 0, 76, 47, 48,
-- 86, 87, 88, 89, 79, 82, 81, 85, 80, 0,
-- 0, 23, 0, 19, 72, 0, 77, 0, 0, 74,
-- 72, 0, 73, 36, 59, 70, 60, 71, 54, 0,
-- 0, 55, 58, 0, 20, 0, 0, 0, 0, 35,
-- 0, 0, 0, 21, 0, 73, 74, 0, 0, 0,
-- 0, 0, 30, 22, 32, 34, 49, 77, 0, 83,
-- 84, 31, 33, 29, 0, 0, 0, 0, 0, 74,
-- 74, 75, 74, 40, 74, 0, 50, 27, 28, 0,
-- 0, 74, 38, 0, 0, 0, 0, 0, 76, 0,
-- 74, 74, 0, 42, 44, 39, 45, 0, 0, 0,
-- 0, 0, 37, 52, 0, 0, 41, 43, 51, 53
--};
--
--/* YYDEFGOTO[NTERM-NUM]. */
--static const yytype_int8 yydefgoto[] =
--{
-- -1, 16, 46, 17, 18, 19, 100, 40, 101, 102,
-- 20, 92, 22, 103, 64, 120, 62, 23, 74, 75,
-- 76
--};
--
--/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
-- STATE-NUM. */
--#define YYPACT_NINF -98
--static const yytype_int16 yypact[] =
--{
-- 89, 14, 9, 31, 35, -98, -98, -98, -98, 0,
-- 36, 42, 28, 56, 63, 67, 90, -98, 75, 75,
-- -98, -98, 86, -98, 96, -15, 123, -98, -98, -98,
-- -98, -98, 97, 115, 119, -98, 120, -98, 122, 16,
-- 126, -98, 127, 157, -98, -98, -98, -98, 19, 154,
-- 154, 154, -98, 140, 29, 144, -98, -98, -98, 123,
-- 141, 99, 18, 70, 147, 105, 148, 152, -98, -98,
-- -98, -98, -98, -98, -98, 142, -13, -98, -98, 146,
-- 150, -98, 133, -98, 140, 60, 146, 149, 133, 153,
-- 140, 151, -98, -98, -98, -98, -98, -98, -98, 155,
-- 158, -98, -98, 159, -98, 62, 143, 154, 154, -98,
-- 160, 161, 162, -98, 133, 163, 164, 165, 166, 116,
-- 168, 167, -98, -98, -98, -98, 169, -98, 173, -98,
-- -98, -98, -98, -98, 174, 176, 133, 116, 177, 175,
-- 175, -98, 175, -98, 175, 170, 178, -98, -98, 180,
-- 181, 175, -98, 171, 179, 182, 183, 187, 186, 189,
-- 175, 175, 190, -98, -98, -98, -98, 79, 143, 195,
-- 191, 192, -98, -98, 193, 194, -98, -98, -98, -98
--};
--
--/* YYPGOTO[NTERM-NUM]. */
--static const yytype_int16 yypgoto[] =
--{
-- -98, -98, 196, -98, -98, -98, -81, 6, -98, -9,
-- -98, 2, -98, -78, -38, -97, -67, -98, -48, 172,
-- 12
--};
--
--/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If
-- positive, shift that token. If negative, reduce the rule which
-- number is the opposite. If zero, do what YYDEFACT says.
-- If YYTABLE_NINF, syntax error. */
--#define YYTABLE_NINF -64
--static const yytype_int16 yytable[] =
--{
-- 106, 110, 21, 78, 111, 41, 50, 117, 50, -10,
-- 118, 51, 25, 108, -9, 80, 42, 41, 26, 138,
-- 52, 31, 87, 5, 6, 128, 7, 35, 54, 60,
-- 37, -11, 53, 134, -63, -12, 135, 67, 142, 68,
-- 69, 61, 154, 155, 29, 156, 112, 157, 81, 27,
-- 41, 82, 121, 41, 162, 149, 151, 28, 150, 129,
-- 130, 85, 77, 170, 171, 84, 31, 32, 90, 30,
-- 33, 34, 35, 36, 52, 37, 38, 5, 6, 113,
-- 7, 126, 114, 91, 127, 43, 39, 174, 115, 45,
-- 44, 168, 1, 2, 3, 4, 5, 6, 173, 7,
-- 8, 127, 9, 10, 11, 12, 13, 14, 31, 94,
-- 15, 48, 95, 96, 35, 97, 55, 98, 99, 31,
-- 94, 88, 49, 89, 96, 35, 31, 52, 98, 141,
-- 5, 6, 35, 7, 56, 37, 31, 94, 57, 58,
-- 95, 96, 35, 97, 59, 98, 31, 94, 63, 65,
-- 52, 96, 35, 5, 6, 98, 7, 70, 71, 72,
-- 73, 66, 79, 86, 83, 105, 93, 104, 107, 109,
-- 122, 0, 24, 116, 123, 119, 0, 124, 125, 131,
-- 132, 133, 0, 0, 141, 136, 137, 143, 158, 139,
-- 140, 144, 146, 147, 145, 148, 152, 153, 163, 167,
-- 0, 164, 165, 159, 160, 161, 166, 169, 175, 172,
-- 176, 177, 178, 179, 0, 47
--};
--
--static const yytype_int16 yycheck[] =
--{
-- 67, 82, 0, 51, 82, 14, 21, 88, 21, 0,
-- 88, 26, 0, 26, 0, 53, 14, 26, 18, 116,
-- 4, 3, 60, 7, 8, 106, 10, 9, 26, 13,
-- 12, 0, 26, 114, 25, 0, 114, 18, 119, 20,
-- 21, 39, 139, 140, 16, 142, 84, 144, 19, 13,
-- 59, 22, 90, 62, 151, 136, 137, 15, 136, 107,
-- 108, 59, 50, 160, 161, 59, 3, 4, 62, 13,
-- 7, 8, 9, 10, 4, 12, 13, 7, 8, 19,
-- 10, 19, 22, 13, 22, 18, 23, 168, 86, 14,
-- 0, 158, 3, 4, 5, 6, 7, 8, 19, 10,
-- 11, 22, 13, 14, 15, 16, 17, 18, 3, 4,
-- 21, 25, 7, 8, 9, 10, 19, 12, 13, 3,
-- 4, 22, 26, 24, 8, 9, 3, 4, 12, 13,
-- 7, 8, 9, 10, 19, 12, 3, 4, 19, 19,
-- 7, 8, 9, 10, 22, 12, 3, 4, 22, 22,
-- 4, 8, 9, 7, 8, 12, 10, 3, 4, 5,
-- 6, 4, 22, 22, 20, 13, 19, 19, 26, 19,
-- 19, -1, 0, 24, 19, 22, -1, 19, 19, 19,
-- 19, 19, -1, -1, 13, 22, 22, 19, 18, 24,
-- 24, 24, 19, 19, 25, 19, 19, 22, 19, 13,
-- -1, 19, 19, 25, 24, 24, 19, 18, 13, 19,
-- 19, 19, 19, 19, -1, 19
--};
--
--/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
-- symbol of state STATE-NUM. */
--static const yytype_uint8 yystos[] =
--{
-- 0, 3, 4, 5, 6, 7, 8, 10, 11, 13,
-- 14, 15, 16, 17, 18, 21, 28, 30, 31, 32,
-- 37, 38, 39, 44, 46, 47, 18, 13, 15, 16,
-- 13, 3, 4, 7, 8, 9, 10, 12, 13, 23,
-- 34, 36, 38, 18, 0, 14, 29, 29, 25, 26,
-- 21, 26, 4, 34, 38, 19, 19, 19, 19, 22,
-- 13, 38, 43, 22, 41, 22, 4, 18, 20, 21,
-- 3, 4, 5, 6, 45, 46, 47, 47, 45, 22,
-- 41, 19, 22, 20, 34, 38, 22, 41, 22, 24,
-- 34, 13, 38, 19, 4, 7, 8, 10, 12, 13,
-- 33, 35, 36, 40, 19, 13, 43, 26, 26, 19,
-- 33, 40, 41, 19, 22, 38, 24, 33, 40, 22,
-- 42, 41, 19, 19, 19, 19, 19, 22, 33, 45,
-- 45, 19, 19, 19, 33, 40, 22, 22, 42, 24,
-- 24, 13, 33, 19, 24, 25, 19, 19, 19, 33,
-- 40, 33, 19, 22, 42, 42, 42, 42, 18, 25,
-- 24, 24, 42, 19, 19, 19, 19, 13, 43, 18,
-- 42, 42, 19, 19, 33, 13, 19, 19, 19, 19
--};
--
--#define yyerrok (yyerrstatus = 0)
--#define yyclearin (yychar = YYEMPTY)
--#define YYEMPTY (-2)
--#define YYEOF 0
--
--#define YYACCEPT goto yyacceptlab
--#define YYABORT goto yyabortlab
--#define YYERROR goto yyerrorlab
--
--
--/* Like YYERROR except do call yyerror. This remains here temporarily
-- to ease the transition to the new meaning of YYERROR, for GCC.
-- Once GCC version 2 has supplanted version 1, this can go. */
--
--#define YYFAIL goto yyerrlab
--
--#define YYRECOVERING() (!!yyerrstatus)
--
--#define YYBACKUP(Token, Value) \
--do \
-- if (yychar == YYEMPTY && yylen == 1) \
-- { \
-- yychar = (Token); \
-- yylval = (Value); \
-- yytoken = YYTRANSLATE (yychar); \
-- YYPOPSTACK (1); \
-- goto yybackup; \
-- } \
-- else \
-- { \
-- yyerror (YY_("syntax error: cannot back up")); \
-- YYERROR; \
-- } \
--while (YYID (0))
--
--
--#define YYTERROR 1
--#define YYERRCODE 256
--
--
--/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
-- If N is 0, then set CURRENT to the empty location which ends
-- the previous symbol: RHS[0] (always defined). */
--
--#define YYRHSLOC(Rhs, K) ((Rhs)[K])
--#ifndef YYLLOC_DEFAULT
--# define YYLLOC_DEFAULT(Current, Rhs, N) \
-- do \
-- if (YYID (N)) \
-- { \
-- (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \
-- (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \
-- (Current).last_line = YYRHSLOC (Rhs, N).last_line; \
-- (Current).last_column = YYRHSLOC (Rhs, N).last_column; \
-- } \
-- else \
-- { \
-- (Current).first_line = (Current).last_line = \
-- YYRHSLOC (Rhs, 0).last_line; \
-- (Current).first_column = (Current).last_column = \
-- YYRHSLOC (Rhs, 0).last_column; \
-- } \
-- while (YYID (0))
--#endif
--
--
--/* YY_LOCATION_PRINT -- Print the location on the stream.
-- This macro was not mandated originally: define only if we know
-- we won't break user code: when these are the locations we know. */
--
--#ifndef YY_LOCATION_PRINT
--# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL
--# define YY_LOCATION_PRINT(File, Loc) \
-- fprintf (File, "%d.%d-%d.%d", \
-- (Loc).first_line, (Loc).first_column, \
-- (Loc).last_line, (Loc).last_column)
--# else
--# define YY_LOCATION_PRINT(File, Loc) ((void) 0)
--# endif
--#endif
--
--
--/* YYLEX -- calling `yylex' with the right arguments. */
--
--#ifdef YYLEX_PARAM
--# define YYLEX yylex (YYLEX_PARAM)
--#else
--# define YYLEX yylex ()
--#endif
--
--/* Enable debugging if requested. */
--#if YYDEBUG
--
--# ifndef YYFPRINTF
--# include <stdio.h> /* INFRINGES ON USER NAME SPACE */
--# define YYFPRINTF fprintf
--# endif
--
--# define YYDPRINTF(Args) \
--do { \
-- if (yydebug) \
-- YYFPRINTF Args; \
--} while (YYID (0))
--
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \
--do { \
-- if (yydebug) \
-- { \
-- YYFPRINTF (stderr, "%s ", Title); \
-- yy_symbol_print (stderr, \
-- Type, Value); \
-- YYFPRINTF (stderr, "\n"); \
-- } \
--} while (YYID (0))
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_value_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (!yyvaluep)
-- return;
--# ifdef YYPRINT
-- if (yytype < YYNTOKENS)
-- YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
--# else
-- YYUSE (yyoutput);
--# endif
-- switch (yytype)
-- {
-- default:
-- break;
-- }
--}
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (yytype < YYNTOKENS)
-- YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
-- else
-- YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
--
-- yy_symbol_value_print (yyoutput, yytype, yyvaluep);
-- YYFPRINTF (yyoutput, ")");
--}
--
--/*------------------------------------------------------------------.
--| yy_stack_print -- Print the state stack from its BOTTOM up to its |
--| TOP (included). |
--`------------------------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_stack_print (yytype_int16 *bottom, yytype_int16 *top)
--#else
--static void
--yy_stack_print (bottom, top)
-- yytype_int16 *bottom;
-- yytype_int16 *top;
--#endif
--{
-- YYFPRINTF (stderr, "Stack now");
-- for (; bottom <= top; ++bottom)
-- YYFPRINTF (stderr, " %d", *bottom);
-- YYFPRINTF (stderr, "\n");
--}
--
--# define YY_STACK_PRINT(Bottom, Top) \
--do { \
-- if (yydebug) \
-- yy_stack_print ((Bottom), (Top)); \
--} while (YYID (0))
--
--
--/*------------------------------------------------.
--| Report that the YYRULE is going to be reduced. |
--`------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_reduce_print (YYSTYPE *yyvsp, int yyrule)
--#else
--static void
--yy_reduce_print (yyvsp, yyrule)
-- YYSTYPE *yyvsp;
-- int yyrule;
--#endif
--{
-- int yynrhs = yyr2[yyrule];
-- int yyi;
-- unsigned long int yylno = yyrline[yyrule];
-- YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
-- yyrule - 1, yylno);
-- /* The symbols being reduced. */
-- for (yyi = 0; yyi < yynrhs; yyi++)
-- {
-- fprintf (stderr, " $%d = ", yyi + 1);
-- yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi],
-- &(yyvsp[(yyi + 1) - (yynrhs)])
-- );
-- fprintf (stderr, "\n");
-- }
--}
--
--# define YY_REDUCE_PRINT(Rule) \
--do { \
-- if (yydebug) \
-- yy_reduce_print (yyvsp, Rule); \
--} while (YYID (0))
--
--/* Nonzero means print parse trace. It is left uninitialized so that
-- multiple parsers can coexist. */
--int yydebug;
--#else /* !YYDEBUG */
--# define YYDPRINTF(Args)
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
--# define YY_STACK_PRINT(Bottom, Top)
--# define YY_REDUCE_PRINT(Rule)
--#endif /* !YYDEBUG */
--
--
--/* YYINITDEPTH -- initial size of the parser's stacks. */
--#ifndef YYINITDEPTH
--# define YYINITDEPTH 200
--#endif
--
--/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
-- if the built-in stack extension method is used).
--
-- Do not make this value too large; the results are undefined if
-- YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
-- evaluated with infinite-precision integer arithmetic. */
--
--#ifndef YYMAXDEPTH
--# define YYMAXDEPTH 10000
--#endif
--
--
--
--#if YYERROR_VERBOSE
--
--# ifndef yystrlen
--# if defined __GLIBC__ && defined _STRING_H
--# define yystrlen strlen
--# else
--/* Return the length of YYSTR. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static YYSIZE_T
--yystrlen (const char *yystr)
--#else
--static YYSIZE_T
--yystrlen (yystr)
-- const char *yystr;
--#endif
--{
-- YYSIZE_T yylen;
-- for (yylen = 0; yystr[yylen]; yylen++)
-- continue;
-- return yylen;
--}
--# endif
--# endif
--
--# ifndef yystpcpy
--# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
--# define yystpcpy stpcpy
--# else
--/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
-- YYDEST. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static char *
--yystpcpy (char *yydest, const char *yysrc)
--#else
--static char *
--yystpcpy (yydest, yysrc)
-- char *yydest;
-- const char *yysrc;
--#endif
--{
-- char *yyd = yydest;
-- const char *yys = yysrc;
--
-- while ((*yyd++ = *yys++) != '\0')
-- continue;
--
-- return yyd - 1;
--}
--# endif
--# endif
--
--# ifndef yytnamerr
--/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
-- quotes and backslashes, so that it's suitable for yyerror. The
-- heuristic is that double-quoting is unnecessary unless the string
-- contains an apostrophe, a comma, or backslash (other than
-- backslash-backslash). YYSTR is taken from yytname. If YYRES is
-- null, do not copy; instead, return the length of what the result
-- would have been. */
--static YYSIZE_T
--yytnamerr (char *yyres, const char *yystr)
--{
-- if (*yystr == '"')
-- {
-- YYSIZE_T yyn = 0;
-- char const *yyp = yystr;
--
-- for (;;)
-- switch (*++yyp)
-- {
-- case '\'':
-- case ',':
-- goto do_not_strip_quotes;
--
-- case '\\':
-- if (*++yyp != '\\')
-- goto do_not_strip_quotes;
-- /* Fall through. */
-- default:
-- if (yyres)
-- yyres[yyn] = *yyp;
-- yyn++;
-- break;
--
-- case '"':
-- if (yyres)
-- yyres[yyn] = '\0';
-- return yyn;
-- }
-- do_not_strip_quotes: ;
-- }
--
-- if (! yyres)
-- return yystrlen (yystr);
--
-- return yystpcpy (yyres, yystr) - yyres;
--}
--# endif
--
--/* Copy into YYRESULT an error message about the unexpected token
-- YYCHAR while in state YYSTATE. Return the number of bytes copied,
-- including the terminating null byte. If YYRESULT is null, do not
-- copy anything; just return the number of bytes that would be
-- copied. As a special case, return 0 if an ordinary "syntax error"
-- message will do. Return YYSIZE_MAXIMUM if overflow occurs during
-- size calculation. */
--static YYSIZE_T
--yysyntax_error (char *yyresult, int yystate, int yychar)
--{
-- int yyn = yypact[yystate];
--
-- if (! (YYPACT_NINF < yyn && yyn <= YYLAST))
-- return 0;
-- else
-- {
-- int yytype = YYTRANSLATE (yychar);
-- YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]);
-- YYSIZE_T yysize = yysize0;
-- YYSIZE_T yysize1;
-- int yysize_overflow = 0;
-- enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
-- char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
-- int yyx;
--
--# if 0
-- /* This is so xgettext sees the translatable formats that are
-- constructed on the fly. */
-- YY_("syntax error, unexpected %s");
-- YY_("syntax error, unexpected %s, expecting %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s");
--# endif
-- char *yyfmt;
-- char const *yyf;
-- static char const yyunexpected[] = "syntax error, unexpected %s";
-- static char const yyexpecting[] = ", expecting %s";
-- static char const yyor[] = " or %s";
-- char yyformat[sizeof yyunexpected
-- + sizeof yyexpecting - 1
-- + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2)
-- * (sizeof yyor - 1))];
-- char const *yyprefix = yyexpecting;
--
-- /* Start YYX at -YYN if negative to avoid negative indexes in
-- YYCHECK. */
-- int yyxbegin = yyn < 0 ? -yyn : 0;
--
-- /* Stay within bounds of both yycheck and yytname. */
-- int yychecklim = YYLAST - yyn + 1;
-- int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
-- int yycount = 1;
--
-- yyarg[0] = yytname[yytype];
-- yyfmt = yystpcpy (yyformat, yyunexpected);
--
-- for (yyx = yyxbegin; yyx < yyxend; ++yyx)
-- if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
-- {
-- if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
-- {
-- yycount = 1;
-- yysize = yysize0;
-- yyformat[sizeof yyunexpected - 1] = '\0';
-- break;
-- }
-- yyarg[yycount++] = yytname[yyx];
-- yysize1 = yysize + yytnamerr (0, yytname[yyx]);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
-- yyfmt = yystpcpy (yyfmt, yyprefix);
-- yyprefix = yyor;
-- }
--
-- yyf = YY_(yyformat);
-- yysize1 = yysize + yystrlen (yyf);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
--
-- if (yysize_overflow)
-- return YYSIZE_MAXIMUM;
--
-- if (yyresult)
-- {
-- /* Avoid sprintf, as that infringes on the user's name space.
-- Don't have undefined behavior even if the translation
-- produced a string with the wrong number of "%s"s. */
-- char *yyp = yyresult;
-- int yyi = 0;
-- while ((*yyp = *yyf) != '\0')
-- {
-- if (*yyp == '%' && yyf[1] == 's' && yyi < yycount)
-- {
-- yyp += yytnamerr (yyp, yyarg[yyi++]);
-- yyf += 2;
-- }
-- else
-- {
-- yyp++;
-- yyf++;
-- }
-- }
-- }
-- return yysize;
-- }
--}
--#endif /* YYERROR_VERBOSE */
--
--
--/*-----------------------------------------------.
--| Release the memory associated to this symbol. |
--`-----------------------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep)
--#else
--static void
--yydestruct (yymsg, yytype, yyvaluep)
-- const char *yymsg;
-- int yytype;
-- YYSTYPE *yyvaluep;
--#endif
--{
-- YYUSE (yyvaluep);
--
-- if (!yymsg)
-- yymsg = "Deleting";
-- YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
--
-- switch (yytype)
-- {
--
-- default:
-- break;
-- }
--}
--
--
--/* Prevent warnings from -Wmissing-prototypes. */
--
--#ifdef YYPARSE_PARAM
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void *YYPARSE_PARAM);
--#else
--int yyparse ();
--#endif
--#else /* ! YYPARSE_PARAM */
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void);
--#else
--int yyparse ();
--#endif
--#endif /* ! YYPARSE_PARAM */
--
--
--
--/* The look-ahead symbol. */
--int yychar;
--
--/* The semantic value of the look-ahead symbol. */
--YYSTYPE yylval;
--
--/* Number of syntax errors so far. */
--int yynerrs;
--
--
--
--/*----------.
--| yyparse. |
--`----------*/
--
--#ifdef YYPARSE_PARAM
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void *YYPARSE_PARAM)
--#else
--int
--yyparse (YYPARSE_PARAM)
-- void *YYPARSE_PARAM;
--#endif
--#else /* ! YYPARSE_PARAM */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void)
--#else
--int
--yyparse ()
--
--#endif
--#endif
--{
--
-- int yystate;
-- int yyn;
-- int yyresult;
-- /* Number of tokens to shift before error messages enabled. */
-- int yyerrstatus;
-- /* Look-ahead token as an internal (translated) token number. */
-- int yytoken = 0;
--#if YYERROR_VERBOSE
-- /* Buffer for error messages, and its allocated size. */
-- char yymsgbuf[128];
-- char *yymsg = yymsgbuf;
-- YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
--#endif
--
-- /* Three stacks and their tools:
-- `yyss': related to states,
-- `yyvs': related to semantic values,
-- `yyls': related to locations.
--
-- Refer to the stacks thru separate pointers, to allow yyoverflow
-- to reallocate them elsewhere. */
--
-- /* The state stack. */
-- yytype_int16 yyssa[YYINITDEPTH];
-- yytype_int16 *yyss = yyssa;
-- yytype_int16 *yyssp;
--
-- /* The semantic value stack. */
-- YYSTYPE yyvsa[YYINITDEPTH];
-- YYSTYPE *yyvs = yyvsa;
-- YYSTYPE *yyvsp;
--
--
--
--#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N))
--
-- YYSIZE_T yystacksize = YYINITDEPTH;
--
-- /* The variables used to return semantic value and location from the
-- action routines. */
-- YYSTYPE yyval;
--
--
-- /* The number of symbols on the RHS of the reduced rule.
-- Keep to zero when no symbol should be popped. */
-- int yylen = 0;
--
-- YYDPRINTF ((stderr, "Starting parse\n"));
--
-- yystate = 0;
-- yyerrstatus = 0;
-- yynerrs = 0;
-- yychar = YYEMPTY; /* Cause a token to be read. */
--
-- /* Initialize stack pointers.
-- Waste one element of value and location stack
-- so that they stay on the same level as the state stack.
-- The wasted elements are never initialized. */
--
-- yyssp = yyss;
-- yyvsp = yyvs;
--
-- goto yysetstate;
--
--/*------------------------------------------------------------.
--| yynewstate -- Push a new state, which is found in yystate. |
--`------------------------------------------------------------*/
-- yynewstate:
-- /* In all cases, when you get here, the value and location stacks
-- have just been pushed. So pushing a state here evens the stacks. */
-- yyssp++;
--
-- yysetstate:
-- *yyssp = yystate;
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- {
-- /* Get the current used size of the three stacks, in elements. */
-- YYSIZE_T yysize = yyssp - yyss + 1;
--
--#ifdef yyoverflow
-- {
-- /* Give user a chance to reallocate the stack. Use copies of
-- these so that the &'s don't force the real ones into
-- memory. */
-- YYSTYPE *yyvs1 = yyvs;
-- yytype_int16 *yyss1 = yyss;
--
--
-- /* Each stack pointer address is followed by the size of the
-- data in use in that stack, in bytes. This used to be a
-- conditional around just the two extra args, but that might
-- be undefined if yyoverflow is a macro. */
-- yyoverflow (YY_("memory exhausted"),
-- &yyss1, yysize * sizeof (*yyssp),
-- &yyvs1, yysize * sizeof (*yyvsp),
--
-- &yystacksize);
--
-- yyss = yyss1;
-- yyvs = yyvs1;
-- }
--#else /* no yyoverflow */
--# ifndef YYSTACK_RELOCATE
-- goto yyexhaustedlab;
--# else
-- /* Extend the stack our own way. */
-- if (YYMAXDEPTH <= yystacksize)
-- goto yyexhaustedlab;
-- yystacksize *= 2;
-- if (YYMAXDEPTH < yystacksize)
-- yystacksize = YYMAXDEPTH;
--
-- {
-- yytype_int16 *yyss1 = yyss;
-- union yyalloc *yyptr =
-- (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
-- if (! yyptr)
-- goto yyexhaustedlab;
-- YYSTACK_RELOCATE (yyss);
-- YYSTACK_RELOCATE (yyvs);
--
--# undef YYSTACK_RELOCATE
-- if (yyss1 != yyssa)
-- YYSTACK_FREE (yyss1);
-- }
--# endif
--#endif /* no yyoverflow */
--
-- yyssp = yyss + yysize - 1;
-- yyvsp = yyvs + yysize - 1;
--
--
-- YYDPRINTF ((stderr, "Stack size increased to %lu\n",
-- (unsigned long int) yystacksize));
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- YYABORT;
-- }
--
-- YYDPRINTF ((stderr, "Entering state %d\n", yystate));
--
-- goto yybackup;
--
--/*-----------.
--| yybackup. |
--`-----------*/
--yybackup:
--
-- /* Do appropriate processing given the current state. Read a
-- look-ahead token if we need one and don't already have one. */
--
-- /* First try to decide what to do without reference to look-ahead token. */
-- yyn = yypact[yystate];
-- if (yyn == YYPACT_NINF)
-- goto yydefault;
--
-- /* Not known => get a look-ahead token if don't already have one. */
--
-- /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */
-- if (yychar == YYEMPTY)
-- {
-- YYDPRINTF ((stderr, "Reading a token: "));
-- yychar = YYLEX;
-- }
--
-- if (yychar <= YYEOF)
-- {
-- yychar = yytoken = YYEOF;
-- YYDPRINTF ((stderr, "Now at end of input.\n"));
-- }
-- else
-- {
-- yytoken = YYTRANSLATE (yychar);
-- YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
-- }
--
-- /* If the proper action on seeing token YYTOKEN is to reduce or to
-- detect an error, take that action. */
-- yyn += yytoken;
-- if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
-- goto yydefault;
-- yyn = yytable[yyn];
-- if (yyn <= 0)
-- {
-- if (yyn == 0 || yyn == YYTABLE_NINF)
-- goto yyerrlab;
-- yyn = -yyn;
-- goto yyreduce;
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- /* Count tokens shifted since error; after three, turn off error
-- status. */
-- if (yyerrstatus)
-- yyerrstatus--;
--
-- /* Shift the look-ahead token. */
-- YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
--
-- /* Discard the shifted token unless it is eof. */
-- if (yychar != YYEOF)
-- yychar = YYEMPTY;
--
-- yystate = yyn;
-- *++yyvsp = yylval;
--
-- goto yynewstate;
--
--
--/*-----------------------------------------------------------.
--| yydefault -- do the default action for the current state. |
--`-----------------------------------------------------------*/
--yydefault:
-- yyn = yydefact[yystate];
-- if (yyn == 0)
-- goto yyerrlab;
-- goto yyreduce;
--
--
--/*-----------------------------.
--| yyreduce -- Do a reduction. |
--`-----------------------------*/
--yyreduce:
-- /* yyn is the number of a rule to reduce with. */
-- yylen = yyr2[yyn];
--
-- /* If YYLEN is nonzero, implement the default value of the action:
-- `$$ = $1'.
--
-- Otherwise, the following line sets YYVAL to garbage.
-- This behavior is undocumented and Bison
-- users should not rely upon it. Assigning to YYVAL
-- unconditionally makes the parser a bit smaller, and it avoids a
-- GCC warning that YYVAL may be used uninitialized. */
-- yyval = yyvsp[1-yylen];
--
--
-- YY_REDUCE_PRINT (yyn);
-- switch (yyn)
-- {
-- case 3:
--#line 123 "m68k-parse.y"
-- {
-- op->trailing_ampersand = (yyvsp[(2) - (2)].trailing_ampersand);
-- }
-- break;
--
-- case 4:
--#line 127 "m68k-parse.y"
-- {
-- op->trailing_ampersand = (yyvsp[(2) - (2)].trailing_ampersand);
-- }
-- break;
--
-- case 5:
--#line 135 "m68k-parse.y"
-- { (yyval.trailing_ampersand) = 0; }
-- break;
--
-- case 6:
--#line 137 "m68k-parse.y"
-- { (yyval.trailing_ampersand) = 1; }
-- break;
--
-- case 7:
--#line 144 "m68k-parse.y"
-- {
-- op->mode = LSH;
-- }
-- break;
--
-- case 8:
--#line 149 "m68k-parse.y"
-- {
-- op->mode = RSH;
-- }
-- break;
--
-- case 9:
--#line 154 "m68k-parse.y"
-- {
-- op->mode = DREG;
-- op->reg = (yyvsp[(1) - (1)].reg);
-- }
-- break;
--
-- case 10:
--#line 159 "m68k-parse.y"
-- {
-- op->mode = AREG;
-- op->reg = (yyvsp[(1) - (1)].reg);
-- }
-- break;
--
-- case 11:
--#line 164 "m68k-parse.y"
-- {
-- op->mode = FPREG;
-- op->reg = (yyvsp[(1) - (1)].reg);
-- }
-- break;
--
-- case 12:
--#line 169 "m68k-parse.y"
-- {
-- op->mode = CONTROL;
-- op->reg = (yyvsp[(1) - (1)].reg);
-- }
-- break;
--
-- case 13:
--#line 174 "m68k-parse.y"
-- {
-- op->mode = CONTROL;
-- op->reg = (yyvsp[(1) - (1)].reg);
-- }
-- break;
--
-- case 14:
--#line 179 "m68k-parse.y"
-- {
-- op->mode = ABSL;
-- op->disp = (yyvsp[(1) - (1)].exp);
-- }
-- break;
--
-- case 15:
--#line 184 "m68k-parse.y"
-- {
-- op->mode = IMMED;
-- op->disp = (yyvsp[(2) - (2)].exp);
-- }
-- break;
--
-- case 16:
--#line 189 "m68k-parse.y"
-- {
-- op->mode = IMMED;
-- op->disp = (yyvsp[(2) - (2)].exp);
-- }
-- break;
--
-- case 17:
--#line 194 "m68k-parse.y"
-- {
-- op->mode = REGLST;
-- op->mask = (yyvsp[(1) - (1)].mask);
-- }
-- break;
--
-- case 18:
--#line 207 "m68k-parse.y"
-- {
-- op->mode = AINDR;
-- op->reg = (yyvsp[(2) - (3)].reg);
-- }
-- break;
--
-- case 19:
--#line 212 "m68k-parse.y"
-- {
-- op->mode = AINC;
-- op->reg = (yyvsp[(2) - (4)].reg);
-- }
-- break;
--
-- case 20:
--#line 217 "m68k-parse.y"
-- {
-- op->mode = ADEC;
-- op->reg = (yyvsp[(3) - (4)].reg);
-- }
-- break;
--
-- case 21:
--#line 222 "m68k-parse.y"
-- {
-- op->reg = (yyvsp[(4) - (5)].reg);
-- op->disp = (yyvsp[(2) - (5)].exp);
-- if (((yyvsp[(4) - (5)].reg) >= ZADDR0 && (yyvsp[(4) - (5)].reg) <= ZADDR7)
-- || (yyvsp[(4) - (5)].reg) == ZPC)
-- op->mode = BASE;
-- else
-- op->mode = DISP;
-- }
-- break;
--
-- case 22:
--#line 232 "m68k-parse.y"
-- {
-- op->reg = (yyvsp[(2) - (5)].reg);
-- op->disp = (yyvsp[(4) - (5)].exp);
-- if (((yyvsp[(2) - (5)].reg) >= ZADDR0 && (yyvsp[(2) - (5)].reg) <= ZADDR7)
-- || (yyvsp[(2) - (5)].reg) == ZPC)
-- op->mode = BASE;
-- else
-- op->mode = DISP;
-- }
-- break;
--
-- case 23:
--#line 242 "m68k-parse.y"
-- {
-- op->reg = (yyvsp[(3) - (4)].reg);
-- op->disp = (yyvsp[(1) - (4)].exp);
-- if (((yyvsp[(3) - (4)].reg) >= ZADDR0 && (yyvsp[(3) - (4)].reg) <= ZADDR7)
-- || (yyvsp[(3) - (4)].reg) == ZPC)
-- op->mode = BASE;
-- else
-- op->mode = DISP;
-- }
-- break;
--
-- case 24:
--#line 252 "m68k-parse.y"
-- {
-- op->mode = DISP;
-- op->reg = (yyvsp[(2) - (3)].reg);
-- }
-- break;
--
-- case 25:
--#line 257 "m68k-parse.y"
-- {
-- op->mode = BASE;
-- op->reg = (yyvsp[(2) - (3)].reg);
-- }
-- break;
--
-- case 26:
--#line 262 "m68k-parse.y"
-- {
-- op->mode = BASE;
-- op->reg = (yyvsp[(2) - (3)].reg);
-- }
-- break;
--
-- case 27:
--#line 267 "m68k-parse.y"
-- {
-- op->mode = BASE;
-- op->reg = (yyvsp[(4) - (7)].reg);
-- op->disp = (yyvsp[(2) - (7)].exp);
-- op->index = (yyvsp[(6) - (7)].indexreg);
-- }
-- break;
--
-- case 28:
--#line 274 "m68k-parse.y"
-- {
-- if ((yyvsp[(4) - (7)].reg) == PC || (yyvsp[(4) - (7)].reg) == ZPC)
-- yyerror (_("syntax error"));
-- op->mode = BASE;
-- op->reg = (yyvsp[(6) - (7)].reg);
-- op->disp = (yyvsp[(2) - (7)].exp);
-- op->index.reg = (yyvsp[(4) - (7)].reg);
-- op->index.size = SIZE_UNSPEC;
-- op->index.scale = 1;
-- }
-- break;
--
-- case 29:
--#line 285 "m68k-parse.y"
-- {
-- op->mode = BASE;
-- op->reg = (yyvsp[(5) - (6)].reg);
-- op->disp = (yyvsp[(2) - (6)].exp);
-- op->index = (yyvsp[(4) - (6)].indexreg);
-- }
-- break;
--
-- case 30:
--#line 292 "m68k-parse.y"
-- {
-- op->mode = BASE;
-- op->disp = (yyvsp[(4) - (5)].exp);
-- op->index = (yyvsp[(2) - (5)].indexreg);
-- }
-- break;
--
-- case 31:
--#line 298 "m68k-parse.y"
-- {
-- op->mode = BASE;
-- op->reg = (yyvsp[(3) - (6)].reg);
-- op->disp = (yyvsp[(1) - (6)].exp);
-- op->index = (yyvsp[(5) - (6)].indexreg);
-- }
-- break;
--
-- case 32:
--#line 305 "m68k-parse.y"
-- {
-- op->mode = BASE;
-- op->reg = (yyvsp[(2) - (5)].reg);
-- op->index = (yyvsp[(4) - (5)].indexreg);
-- }
-- break;
--
-- case 33:
--#line 311 "m68k-parse.y"
-- {
-- if ((yyvsp[(3) - (6)].reg) == PC || (yyvsp[(3) - (6)].reg) == ZPC)
-- yyerror (_("syntax error"));
-- op->mode = BASE;
-- op->reg = (yyvsp[(5) - (6)].reg);
-- op->disp = (yyvsp[(1) - (6)].exp);
-- op->index.reg = (yyvsp[(3) - (6)].reg);
-- op->index.size = SIZE_UNSPEC;
-- op->index.scale = 1;
-- }
-- break;
--
-- case 34:
--#line 322 "m68k-parse.y"
-- {
-- if ((yyvsp[(2) - (5)].reg) == PC || (yyvsp[(2) - (5)].reg) == ZPC)
-- yyerror (_("syntax error"));
-- op->mode = BASE;
-- op->reg = (yyvsp[(4) - (5)].reg);
-- op->index.reg = (yyvsp[(2) - (5)].reg);
-- op->index.size = SIZE_UNSPEC;
-- op->index.scale = 1;
-- }
-- break;
--
-- case 35:
--#line 332 "m68k-parse.y"
-- {
-- op->mode = BASE;
-- op->reg = (yyvsp[(4) - (5)].reg);
-- op->disp = (yyvsp[(1) - (5)].exp);
-- op->index = (yyvsp[(3) - (5)].indexreg);
-- }
-- break;
--
-- case 36:
--#line 339 "m68k-parse.y"
-- {
-- op->mode = BASE;
-- op->reg = (yyvsp[(3) - (4)].reg);
-- op->index = (yyvsp[(2) - (4)].indexreg);
-- }
-- break;
--
-- case 37:
--#line 345 "m68k-parse.y"
-- {
-- op->mode = POST;
-- op->reg = (yyvsp[(4) - (9)].reg);
-- op->disp = (yyvsp[(3) - (9)].exp);
-- op->index = (yyvsp[(7) - (9)].indexreg);
-- op->odisp = (yyvsp[(8) - (9)].exp);
-- }
-- break;
--
-- case 38:
--#line 353 "m68k-parse.y"
-- {
-- op->mode = POST;
-- op->reg = (yyvsp[(4) - (7)].reg);
-- op->disp = (yyvsp[(3) - (7)].exp);
-- op->odisp = (yyvsp[(6) - (7)].exp);
-- }
-- break;
--
-- case 39:
--#line 360 "m68k-parse.y"
-- {
-- op->mode = POST;
-- op->reg = (yyvsp[(3) - (8)].reg);
-- op->index = (yyvsp[(6) - (8)].indexreg);
-- op->odisp = (yyvsp[(7) - (8)].exp);
-- }
-- break;
--
-- case 40:
--#line 367 "m68k-parse.y"
-- {
-- op->mode = POST;
-- op->reg = (yyvsp[(3) - (6)].reg);
-- op->odisp = (yyvsp[(5) - (6)].exp);
-- }
-- break;
--
-- case 41:
--#line 373 "m68k-parse.y"
-- {
-- op->mode = PRE;
-- op->reg = (yyvsp[(5) - (10)].reg);
-- op->disp = (yyvsp[(3) - (10)].exp);
-- op->index = (yyvsp[(7) - (10)].indexreg);
-- op->odisp = (yyvsp[(9) - (10)].exp);
-- }
-- break;
--
-- case 42:
--#line 381 "m68k-parse.y"
-- {
-- op->mode = PRE;
-- op->reg = (yyvsp[(3) - (8)].reg);
-- op->index = (yyvsp[(5) - (8)].indexreg);
-- op->odisp = (yyvsp[(7) - (8)].exp);
-- }
-- break;
--
-- case 43:
--#line 388 "m68k-parse.y"
-- {
-- if ((yyvsp[(5) - (10)].reg) == PC || (yyvsp[(5) - (10)].reg) == ZPC)
-- yyerror (_("syntax error"));
-- op->mode = PRE;
-- op->reg = (yyvsp[(7) - (10)].reg);
-- op->disp = (yyvsp[(3) - (10)].exp);
-- op->index.reg = (yyvsp[(5) - (10)].reg);
-- op->index.size = SIZE_UNSPEC;
-- op->index.scale = 1;
-- op->odisp = (yyvsp[(9) - (10)].exp);
-- }
-- break;
--
-- case 44:
--#line 400 "m68k-parse.y"
-- {
-- if ((yyvsp[(3) - (8)].reg) == PC || (yyvsp[(3) - (8)].reg) == ZPC)
-- yyerror (_("syntax error"));
-- op->mode = PRE;
-- op->reg = (yyvsp[(5) - (8)].reg);
-- op->index.reg = (yyvsp[(3) - (8)].reg);
-- op->index.size = SIZE_UNSPEC;
-- op->index.scale = 1;
-- op->odisp = (yyvsp[(7) - (8)].exp);
-- }
-- break;
--
-- case 45:
--#line 411 "m68k-parse.y"
-- {
-- op->mode = PRE;
-- op->reg = (yyvsp[(5) - (8)].reg);
-- op->disp = (yyvsp[(3) - (8)].exp);
-- op->index = (yyvsp[(4) - (8)].indexreg);
-- op->odisp = (yyvsp[(7) - (8)].exp);
-- }
-- break;
--
-- case 46:
--#line 424 "m68k-parse.y"
-- {
-- /* We use optzapc to avoid a shift/reduce conflict. */
-- if ((yyvsp[(1) - (2)].reg) < ADDR0 || (yyvsp[(1) - (2)].reg) > ADDR7)
-- yyerror (_("syntax error"));
-- op->mode = AINDR;
-- op->reg = (yyvsp[(1) - (2)].reg);
-- }
-- break;
--
-- case 47:
--#line 432 "m68k-parse.y"
-- {
-- /* We use optzapc to avoid a shift/reduce conflict. */
-- if ((yyvsp[(1) - (3)].reg) < ADDR0 || (yyvsp[(1) - (3)].reg) > ADDR7)
-- yyerror (_("syntax error"));
-- op->mode = AINC;
-- op->reg = (yyvsp[(1) - (3)].reg);
-- }
-- break;
--
-- case 48:
--#line 440 "m68k-parse.y"
-- {
-- /* We use optzapc to avoid a shift/reduce conflict. */
-- if ((yyvsp[(1) - (3)].reg) < ADDR0 || (yyvsp[(1) - (3)].reg) > ADDR7)
-- yyerror (_("syntax error"));
-- op->mode = ADEC;
-- op->reg = (yyvsp[(1) - (3)].reg);
-- }
-- break;
--
-- case 49:
--#line 448 "m68k-parse.y"
-- {
-- op->reg = (yyvsp[(1) - (5)].reg);
-- op->disp = (yyvsp[(4) - (5)].exp);
-- if (((yyvsp[(1) - (5)].reg) >= ZADDR0 && (yyvsp[(1) - (5)].reg) <= ZADDR7)
-- || (yyvsp[(1) - (5)].reg) == ZPC)
-- op->mode = BASE;
-- else
-- op->mode = DISP;
-- }
-- break;
--
-- case 50:
--#line 458 "m68k-parse.y"
-- {
-- op->mode = BASE;
-- op->reg = (yyvsp[(1) - (6)].reg);
-- op->disp = (yyvsp[(4) - (6)].exp);
-- op->index = (yyvsp[(5) - (6)].indexreg);
-- }
-- break;
--
-- case 51:
--#line 465 "m68k-parse.y"
-- {
-- op->mode = POST;
-- op->reg = (yyvsp[(1) - (10)].reg);
-- op->disp = (yyvsp[(4) - (10)].exp);
-- op->index = (yyvsp[(9) - (10)].indexreg);
-- op->odisp = (yyvsp[(8) - (10)].exp);
-- }
-- break;
--
-- case 52:
--#line 473 "m68k-parse.y"
-- {
-- op->mode = POST;
-- op->reg = (yyvsp[(1) - (9)].reg);
-- op->disp = (yyvsp[(4) - (9)].exp);
-- op->odisp = (yyvsp[(8) - (9)].exp);
-- }
-- break;
--
-- case 53:
--#line 480 "m68k-parse.y"
-- {
-- op->mode = PRE;
-- op->reg = (yyvsp[(1) - (10)].reg);
-- op->disp = (yyvsp[(4) - (10)].exp);
-- op->index = (yyvsp[(5) - (10)].indexreg);
-- op->odisp = (yyvsp[(9) - (10)].exp);
-- }
-- break;
--
-- case 55:
--#line 495 "m68k-parse.y"
-- {
-- (yyval.indexreg).reg = (yyvsp[(1) - (1)].reg);
-- (yyval.indexreg).size = SIZE_UNSPEC;
-- (yyval.indexreg).scale = 1;
-- }
-- break;
--
-- case 57:
--#line 509 "m68k-parse.y"
-- {
-- (yyval.indexreg).reg = (yyvsp[(1) - (1)].reg);
-- (yyval.indexreg).size = SIZE_UNSPEC;
-- (yyval.indexreg).scale = 1;
-- }
-- break;
--
-- case 68:
--#line 552 "m68k-parse.y"
-- {
-- (yyval.reg) = ZADDR0;
-- }
-- break;
--
-- case 72:
--#line 569 "m68k-parse.y"
-- {
-- (yyval.reg) = ZADDR0;
-- }
-- break;
--
-- case 73:
--#line 573 "m68k-parse.y"
-- {
-- (yyval.reg) = (yyvsp[(2) - (2)].reg);
-- }
-- break;
--
-- case 74:
--#line 582 "m68k-parse.y"
-- {
-- (yyval.exp).exp.X_op = O_absent;
-- (yyval.exp).size = SIZE_UNSPEC;
-- }
-- break;
--
-- case 75:
--#line 587 "m68k-parse.y"
-- {
-- (yyval.exp) = (yyvsp[(2) - (2)].exp);
-- }
-- break;
--
-- case 76:
--#line 596 "m68k-parse.y"
-- {
-- (yyval.exp).exp.X_op = O_absent;
-- (yyval.exp).size = SIZE_UNSPEC;
-- }
-- break;
--
-- case 77:
--#line 601 "m68k-parse.y"
-- {
-- (yyval.exp) = (yyvsp[(1) - (2)].exp);
-- }
-- break;
--
-- case 79:
--#line 611 "m68k-parse.y"
-- {
-- (yyval.mask) = (yyvsp[(1) - (3)].mask) | (yyvsp[(3) - (3)].mask);
-- }
-- break;
--
-- case 80:
--#line 615 "m68k-parse.y"
-- {
-- (yyval.mask) = (1 << (yyvsp[(1) - (3)].onereg)) | (yyvsp[(3) - (3)].mask);
-- }
-- break;
--
-- case 81:
--#line 627 "m68k-parse.y"
-- {
-- (yyval.mask) = 1 << (yyvsp[(1) - (1)].onereg);
-- }
-- break;
--
-- case 83:
--#line 632 "m68k-parse.y"
-- {
-- (yyval.mask) = (yyvsp[(1) - (3)].mask) | (yyvsp[(3) - (3)].mask);
-- }
-- break;
--
-- case 84:
--#line 636 "m68k-parse.y"
-- {
-- (yyval.mask) = (1 << (yyvsp[(1) - (3)].onereg)) | (yyvsp[(3) - (3)].mask);
-- }
-- break;
--
-- case 85:
--#line 643 "m68k-parse.y"
-- {
-- if ((yyvsp[(1) - (3)].onereg) <= (yyvsp[(3) - (3)].onereg))
-- (yyval.mask) = (1 << ((yyvsp[(3) - (3)].onereg) + 1)) - 1 - ((1 << (yyvsp[(1) - (3)].onereg)) - 1);
-- else
-- (yyval.mask) = (1 << ((yyvsp[(1) - (3)].onereg) + 1)) - 1 - ((1 << (yyvsp[(3) - (3)].onereg)) - 1);
-- }
-- break;
--
-- case 86:
--#line 653 "m68k-parse.y"
-- {
-- (yyval.onereg) = (yyvsp[(1) - (1)].reg) - DATA0;
-- }
-- break;
--
-- case 87:
--#line 657 "m68k-parse.y"
-- {
-- (yyval.onereg) = (yyvsp[(1) - (1)].reg) - ADDR0 + 8;
-- }
-- break;
--
-- case 88:
--#line 661 "m68k-parse.y"
-- {
-- (yyval.onereg) = (yyvsp[(1) - (1)].reg) - FP0 + 16;
-- }
-- break;
--
-- case 89:
--#line 665 "m68k-parse.y"
-- {
-- if ((yyvsp[(1) - (1)].reg) == FPI)
-- (yyval.onereg) = 24;
-- else if ((yyvsp[(1) - (1)].reg) == FPS)
-- (yyval.onereg) = 25;
-- else
-- (yyval.onereg) = 26;
-- }
-- break;
--
--
--/* Line 1267 of yacc.c. */
--#line 2204 "m68k-parse.c"
-- default: break;
-- }
-- YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
--
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
--
-- *++yyvsp = yyval;
--
--
-- /* Now `shift' the result of the reduction. Determine what state
-- that goes to, based on the state we popped back to and the rule
-- number reduced by. */
--
-- yyn = yyr1[yyn];
--
-- yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
-- if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
-- yystate = yytable[yystate];
-- else
-- yystate = yydefgoto[yyn - YYNTOKENS];
--
-- goto yynewstate;
--
--
--/*------------------------------------.
--| yyerrlab -- here on detecting error |
--`------------------------------------*/
--yyerrlab:
-- /* If not already recovering from an error, report this error. */
-- if (!yyerrstatus)
-- {
-- ++yynerrs;
--#if ! YYERROR_VERBOSE
-- yyerror (YY_("syntax error"));
--#else
-- {
-- YYSIZE_T yysize = yysyntax_error (0, yystate, yychar);
-- if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM)
-- {
-- YYSIZE_T yyalloc = 2 * yysize;
-- if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM))
-- yyalloc = YYSTACK_ALLOC_MAXIMUM;
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
-- yymsg = (char *) YYSTACK_ALLOC (yyalloc);
-- if (yymsg)
-- yymsg_alloc = yyalloc;
-- else
-- {
-- yymsg = yymsgbuf;
-- yymsg_alloc = sizeof yymsgbuf;
-- }
-- }
--
-- if (0 < yysize && yysize <= yymsg_alloc)
-- {
-- (void) yysyntax_error (yymsg, yystate, yychar);
-- yyerror (yymsg);
-- }
-- else
-- {
-- yyerror (YY_("syntax error"));
-- if (yysize != 0)
-- goto yyexhaustedlab;
-- }
-- }
--#endif
-- }
--
--
--
-- if (yyerrstatus == 3)
-- {
-- /* If just tried and failed to reuse look-ahead token after an
-- error, discard it. */
--
-- if (yychar <= YYEOF)
-- {
-- /* Return failure if at end of input. */
-- if (yychar == YYEOF)
-- YYABORT;
-- }
-- else
-- {
-- yydestruct ("Error: discarding",
-- yytoken, &yylval);
-- yychar = YYEMPTY;
-- }
-- }
--
-- /* Else will try to reuse look-ahead token after shifting the error
-- token. */
-- goto yyerrlab1;
--
--
--/*---------------------------------------------------.
--| yyerrorlab -- error raised explicitly by YYERROR. |
--`---------------------------------------------------*/
--yyerrorlab:
--
-- /* Pacify compilers like GCC when the user code never invokes
-- YYERROR and the label yyerrorlab therefore never appears in user
-- code. */
-- if (/*CONSTCOND*/ 0)
-- goto yyerrorlab;
--
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYERROR. */
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
-- yystate = *yyssp;
-- goto yyerrlab1;
--
--
--/*-------------------------------------------------------------.
--| yyerrlab1 -- common code for both syntax error and YYERROR. |
--`-------------------------------------------------------------*/
--yyerrlab1:
-- yyerrstatus = 3; /* Each real token shifted decrements this. */
--
-- for (;;)
-- {
-- yyn = yypact[yystate];
-- if (yyn != YYPACT_NINF)
-- {
-- yyn += YYTERROR;
-- if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
-- {
-- yyn = yytable[yyn];
-- if (0 < yyn)
-- break;
-- }
-- }
--
-- /* Pop the current state because it cannot handle the error token. */
-- if (yyssp == yyss)
-- YYABORT;
--
--
-- yydestruct ("Error: popping",
-- yystos[yystate], yyvsp);
-- YYPOPSTACK (1);
-- yystate = *yyssp;
-- YY_STACK_PRINT (yyss, yyssp);
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- *++yyvsp = yylval;
--
--
-- /* Shift the error token. */
-- YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
--
-- yystate = yyn;
-- goto yynewstate;
--
--
--/*-------------------------------------.
--| yyacceptlab -- YYACCEPT comes here. |
--`-------------------------------------*/
--yyacceptlab:
-- yyresult = 0;
-- goto yyreturn;
--
--/*-----------------------------------.
--| yyabortlab -- YYABORT comes here. |
--`-----------------------------------*/
--yyabortlab:
-- yyresult = 1;
-- goto yyreturn;
--
--#ifndef yyoverflow
--/*-------------------------------------------------.
--| yyexhaustedlab -- memory exhaustion comes here. |
--`-------------------------------------------------*/
--yyexhaustedlab:
-- yyerror (YY_("memory exhausted"));
-- yyresult = 2;
-- /* Fall through. */
--#endif
--
--yyreturn:
-- if (yychar != YYEOF && yychar != YYEMPTY)
-- yydestruct ("Cleanup: discarding lookahead",
-- yytoken, &yylval);
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYABORT or YYACCEPT. */
-- YYPOPSTACK (yylen);
-- YY_STACK_PRINT (yyss, yyssp);
-- while (yyssp != yyss)
-- {
-- yydestruct ("Cleanup: popping",
-- yystos[*yyssp], yyvsp);
-- YYPOPSTACK (1);
-- }
--#ifndef yyoverflow
-- if (yyss != yyssa)
-- YYSTACK_FREE (yyss);
--#endif
--#if YYERROR_VERBOSE
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
--#endif
-- /* Make sure YYID is used. */
-- return YYID (yyresult);
--}
--
--
--#line 675 "m68k-parse.y"
--
--
--/* The string to parse is stored here, and modified by yylex. */
--
--static char *str;
--
--/* The original string pointer. */
--
--static char *strorig;
--
--/* If *CCP could be a register, return the register number and advance
-- *CCP. Otherwise don't change *CCP, and return 0. */
--
--static enum m68k_register
--m68k_reg_parse (ccp)
-- register char **ccp;
--{
-- char *start = *ccp;
-- char c;
-- char *p;
-- symbolS *symbolp;
--
-- if (flag_reg_prefix_optional)
-- {
-- if (*start == REGISTER_PREFIX)
-- start++;
-- p = start;
-- }
-- else
-- {
-- if (*start != REGISTER_PREFIX)
-- return 0;
-- p = start + 1;
-- }
--
-- if (! is_name_beginner (*p))
-- return 0;
--
-- p++;
-- while (is_part_of_name (*p) && *p != '.' && *p != ':' && *p != '*')
-- p++;
--
-- c = *p;
-- *p = 0;
-- symbolp = symbol_find (start);
-- *p = c;
--
-- if (symbolp != NULL && S_GET_SEGMENT (symbolp) == reg_section)
-- {
-- *ccp = p;
-- return S_GET_VALUE (symbolp);
-- }
--
-- /* In MRI mode, something like foo.bar can be equated to a register
-- name. */
-- while (flag_mri && c == '.')
-- {
-- ++p;
-- while (is_part_of_name (*p) && *p != '.' && *p != ':' && *p != '*')
-- p++;
-- c = *p;
-- *p = '\0';
-- symbolp = symbol_find (start);
-- *p = c;
-- if (symbolp != NULL && S_GET_SEGMENT (symbolp) == reg_section)
-- {
-- *ccp = p;
-- return S_GET_VALUE (symbolp);
-- }
-- }
--
-- return 0;
--}
--
--/* The lexer. */
--
--static int
--yylex ()
--{
-- enum m68k_register reg;
-- char *s;
-- int parens;
-- int c = 0;
-- int tail = 0;
-- char *hold;
--
-- if (*str == ' ')
-- ++str;
--
-- if (*str == '\0')
-- return 0;
--
-- /* Various special characters are just returned directly. */
-- switch (*str)
-- {
-- case '@':
-- /* In MRI mode, this can be the start of an octal number. */
-- if (flag_mri)
-- {
-- if (ISDIGIT (str[1])
-- || ((str[1] == '+' || str[1] == '-')
-- && ISDIGIT (str[2])))
-- break;
-- }
-- /* Fall through. */
-- case '#':
-- case '&':
-- case ',':
-- case ')':
-- case '/':
-- case '[':
-- case ']':
-- case '<':
-- case '>':
-- return *str++;
-- case '+':
-- /* It so happens that a '+' can only appear at the end of an
-- operand, or if it is trailed by an '&'(see mac load insn).
-- If it appears anywhere else, it must be a unary. */
-- if (str[1] == '\0' || (str[1] == '&' && str[2] == '\0'))
-- return *str++;
-- break;
-- case '-':
-- /* A '-' can only appear in -(ar), rn-rn, or ar@-. If it
-- appears anywhere else, it must be a unary minus on an
-- expression, unless it it trailed by a '&'(see mac load insn). */
-- if (str[1] == '\0' || (str[1] == '&' && str[2] == '\0'))
-- return *str++;
-- s = str + 1;
-- if (*s == '(')
-- ++s;
-- if (m68k_reg_parse (&s) != 0)
-- return *str++;
-- break;
-- case '(':
-- /* A '(' can only appear in `(reg)', `(expr,...', `([', `@(', or
-- `)('. If it appears anywhere else, it must be starting an
-- expression. */
-- if (str[1] == '['
-- || (str > strorig
-- && (str[-1] == '@'
-- || str[-1] == ')')))
-- return *str++;
-- s = str + 1;
-- if (m68k_reg_parse (&s) != 0)
-- return *str++;
-- /* Check for the case of '(expr,...' by scanning ahead. If we
-- find a comma outside of balanced parentheses, we return '('.
-- If we find an unbalanced right parenthesis, then presumably
-- the '(' really starts an expression. */
-- parens = 0;
-- for (s = str + 1; *s != '\0'; s++)
-- {
-- if (*s == '(')
-- ++parens;
-- else if (*s == ')')
-- {
-- if (parens == 0)
-- break;
-- --parens;
-- }
-- else if (*s == ',' && parens == 0)
-- {
-- /* A comma can not normally appear in an expression, so
-- this is a case of '(expr,...'. */
-- return *str++;
-- }
-- }
-- }
--
-- /* See if it's a register. */
--
-- reg = m68k_reg_parse (&str);
-- if (reg != 0)
-- {
-- int ret;
--
-- yylval.reg = reg;
--
-- if (reg >= DATA0 && reg <= DATA7)
-- ret = DR;
-- else if (reg >= ADDR0 && reg <= ADDR7)
-- ret = AR;
-- else if (reg >= FP0 && reg <= FP7)
-- return FPR;
-- else if (reg == FPI
-- || reg == FPS
-- || reg == FPC)
-- return FPCR;
-- else if (reg == PC)
-- return LPC;
-- else if (reg >= ZDATA0 && reg <= ZDATA7)
-- ret = ZDR;
-- else if (reg >= ZADDR0 && reg <= ZADDR7)
-- ret = ZAR;
-- else if (reg == ZPC)
-- return LZPC;
-- else
-- return CREG;
--
-- /* If we get here, we have a data or address register. We
-- must check for a size or scale; if we find one, we must
-- return INDEXREG. */
--
-- s = str;
--
-- if (*s != '.' && *s != ':' && *s != '*')
-- return ret;
--
-- yylval.indexreg.reg = reg;
--
-- if (*s != '.' && *s != ':')
-- yylval.indexreg.size = SIZE_UNSPEC;
-- else
-- {
-- ++s;
-- switch (*s)
-- {
-- case 'w':
-- case 'W':
-- yylval.indexreg.size = SIZE_WORD;
-- ++s;
-- break;
-- case 'l':
-- case 'L':
-- yylval.indexreg.size = SIZE_LONG;
-- ++s;
-- break;
-- default:
-- yyerror (_("illegal size specification"));
-- yylval.indexreg.size = SIZE_UNSPEC;
-- break;
-- }
-- }
--
-- yylval.indexreg.scale = 1;
--
-- if (*s == '*' || *s == ':')
-- {
-- expressionS scale;
--
-- ++s;
--
-- hold = input_line_pointer;
-- input_line_pointer = s;
-- expression (&scale);
-- s = input_line_pointer;
-- input_line_pointer = hold;
--
-- if (scale.X_op != O_constant)
-- yyerror (_("scale specification must resolve to a number"));
-- else
-- {
-- switch (scale.X_add_number)
-- {
-- case 1:
-- case 2:
-- case 4:
-- case 8:
-- yylval.indexreg.scale = scale.X_add_number;
-- break;
-- default:
-- yyerror (_("invalid scale value"));
-- break;
-- }
-- }
-- }
--
-- str = s;
--
-- return INDEXREG;
-- }
--
-- /* It must be an expression. Before we call expression, we need to
-- look ahead to see if there is a size specification. We must do
-- that first, because otherwise foo.l will be treated as the symbol
-- foo.l, rather than as the symbol foo with a long size
-- specification. The grammar requires that all expressions end at
-- the end of the operand, or with ',', '(', ']', ')'. */
--
-- parens = 0;
-- for (s = str; *s != '\0'; s++)
-- {
-- if (*s == '(')
-- {
-- if (parens == 0
-- && s > str
-- && (s[-1] == ')' || ISALNUM (s[-1])))
-- break;
-- ++parens;
-- }
-- else if (*s == ')')
-- {
-- if (parens == 0)
-- break;
-- --parens;
-- }
-- else if (parens == 0
-- && (*s == ',' || *s == ']'))
-- break;
-- }
--
-- yylval.exp.size = SIZE_UNSPEC;
-- if (s <= str + 2
-- || (s[-2] != '.' && s[-2] != ':'))
-- tail = 0;
-- else
-- {
-- switch (s[-1])
-- {
-- case 's':
-- case 'S':
-- case 'b':
-- case 'B':
-- yylval.exp.size = SIZE_BYTE;
-- break;
-- case 'w':
-- case 'W':
-- yylval.exp.size = SIZE_WORD;
-- break;
-- case 'l':
-- case 'L':
-- yylval.exp.size = SIZE_LONG;
-- break;
-- default:
-- break;
-- }
-- if (yylval.exp.size != SIZE_UNSPEC)
-- tail = 2;
-- }
--
--#ifdef OBJ_ELF
-- {
-- /* Look for @PLTPC, etc. */
-- char *cp;
--
-- yylval.exp.pic_reloc = pic_none;
-- cp = s - tail;
-- if (cp - 7 > str && cp[-7] == '@')
-- {
-- if (strncmp (cp - 7, "@TLSLDM", 7) == 0)
-- {
-- yylval.exp.pic_reloc = pic_tls_ldm;
-- tail += 7;
-- }
-- else if (strncmp (cp - 7, "@TLSLDO", 7) == 0)
-- {
-- yylval.exp.pic_reloc = pic_tls_ldo;
-- tail += 7;
-- }
-- }
-- else if (cp - 6 > str && cp[-6] == '@')
-- {
-- if (strncmp (cp - 6, "@PLTPC", 6) == 0)
-- {
-- yylval.exp.pic_reloc = pic_plt_pcrel;
-- tail += 6;
-- }
-- else if (strncmp (cp - 6, "@GOTPC", 6) == 0)
-- {
-- yylval.exp.pic_reloc = pic_got_pcrel;
-- tail += 6;
-- }
-- else if (strncmp (cp - 6, "@TLSGD", 6) == 0)
-- {
-- yylval.exp.pic_reloc = pic_tls_gd;
-- tail += 6;
-- }
-- else if (strncmp (cp - 6, "@TLSIE", 6) == 0)
-- {
-- yylval.exp.pic_reloc = pic_tls_ie;
-- tail += 6;
-- }
-- else if (strncmp (cp - 6, "@TLSLE", 6) == 0)
-- {
-- yylval.exp.pic_reloc = pic_tls_le;
-- tail += 6;
-- }
-- }
-- else if (cp - 4 > str && cp[-4] == '@')
-- {
-- if (strncmp (cp - 4, "@PLT", 4) == 0)
-- {
-- yylval.exp.pic_reloc = pic_plt_off;
-- tail += 4;
-- }
-- else if (strncmp (cp - 4, "@GOT", 4) == 0)
-- {
-- yylval.exp.pic_reloc = pic_got_off;
-- tail += 4;
-- }
-- }
-- }
--#endif
--
-- if (tail != 0)
-- {
-- c = s[-tail];
-- s[-tail] = 0;
-- }
--
-- hold = input_line_pointer;
-- input_line_pointer = str;
-- expression (&yylval.exp.exp);
-- str = input_line_pointer;
-- input_line_pointer = hold;
--
-- if (tail != 0)
-- {
-- s[-tail] = c;
-- str = s;
-- }
--
-- return EXPR;
--}
--
--/* Parse an m68k operand. This is the only function which is called
-- from outside this file. */
--
--int
--m68k_ip_op (s, oparg)
-- char *s;
-- struct m68k_op *oparg;
--{
-- memset (oparg, 0, sizeof *oparg);
-- oparg->error = NULL;
-- oparg->index.reg = ZDATA0;
-- oparg->index.scale = 1;
-- oparg->disp.exp.X_op = O_absent;
-- oparg->odisp.exp.X_op = O_absent;
--
-- str = strorig = s;
-- op = oparg;
--
-- return yyparse ();
--}
--
--/* The error handler. */
--
--static void
--yyerror (s)
-- const char *s;
--{
-- op->error = s;
--}
--
-diff -Nur binutils-2.24.orig/gas/Makefile.am binutils-2.24/gas/Makefile.am
---- binutils-2.24.orig/gas/Makefile.am 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/gas/Makefile.am 2016-06-30 21:26:12.729896069 +0200
-@@ -164,6 +164,7 @@
- config/tc-moxie.c \
- config/tc-msp430.c \
- config/tc-mt.c \
-+ config/tc-nds32.c \
- config/tc-nios2.c \
- config/tc-ns32k.c \
- config/tc-openrisc.c \
-@@ -235,6 +236,7 @@
- config/tc-mn10300.h \
- config/tc-msp430.h \
- config/tc-mt.h \
-+ config/tc-nds32.h \
- config/tc-nios2.h \
- config/tc-ns32k.h \
- config/tc-openrisc.h \
-@@ -393,7 +395,7 @@
-
- as_new_SOURCES = $(GAS_CFILES)
- as_new_LDADD = $(TARG_CPU_O) $(OBJ_FORMAT_O) $(ATOF_TARG_O) \
-- $(extra_objects) $(GASLIBS) $(LIBINTL) $(LIBM)
-+ $(extra_objects) $(GASLIBS) $(LIBINTL) $(LIBM) -ldl
- as_new_DEPENDENCIES = $(TARG_CPU_O) $(OBJ_FORMAT_O) $(ATOF_TARG_O) \
- $(extra_objects) $(GASLIBS) $(LIBINTL_DEP)
- EXTRA_as_new_SOURCES = $(CFILES) $(HFILES) $(TARGET_CPU_CFILES) \
-diff -Nur binutils-2.24.orig/gas/Makefile.in binutils-2.24/gas/Makefile.in
---- binutils-2.24.orig/gas/Makefile.in 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/gas/Makefile.in 2016-06-30 21:26:12.729896069 +0200
-@@ -1,9 +1,9 @@
--# Makefile.in generated by automake 1.11.1 from Makefile.am.
-+# Makefile.in generated by automake 1.11.6 from Makefile.am.
- # @configure_input@
-
- # Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
--# 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation,
--# Inc.
-+# 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software
-+# Foundation, Inc.
- # This Makefile.in is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-@@ -35,6 +35,23 @@
-
-
- VPATH = @srcdir@
-+am__make_dryrun = \
-+ { \
-+ am__dry=no; \
-+ case $$MAKEFLAGS in \
-+ *\\[\ \ ]*) \
-+ echo 'am--echo: ; @echo "AM" OK' | $(MAKE) -f - 2>/dev/null \
-+ | grep '^AM OK$$' >/dev/null || am__dry=yes;; \
-+ *) \
-+ for am__flg in $$MAKEFLAGS; do \
-+ case $$am__flg in \
-+ *=*|--*) ;; \
-+ *n*) am__dry=yes; break;; \
-+ esac; \
-+ done;; \
-+ esac; \
-+ test $$am__dry = yes; \
-+ }
- pkgdatadir = $(datadir)/@PACKAGE@
- pkgincludedir = $(includedir)/@PACKAGE@
- pkglibdir = $(libdir)/@PACKAGE@
-@@ -124,14 +141,14 @@
- --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \
- $(LDFLAGS) -o $@
- @MAINTAINER_MODE_FALSE@am__skiplex = test -f $@ ||
--LEXCOMPILE = $(LEX) $(LFLAGS) $(AM_LFLAGS)
-+LEXCOMPILE = $(LEX) $(AM_LFLAGS) $(LFLAGS)
- LTLEXCOMPILE = $(LIBTOOL) $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \
-- --mode=compile $(LEX) $(LFLAGS) $(AM_LFLAGS)
-+ --mode=compile $(LEX) $(AM_LFLAGS) $(LFLAGS)
- YLWRAP = $(top_srcdir)/../ylwrap
- @MAINTAINER_MODE_FALSE@am__skipyacc = test -f $@ ||
--YACCCOMPILE = $(YACC) $(YFLAGS) $(AM_YFLAGS)
-+YACCCOMPILE = $(YACC) $(AM_YFLAGS) $(YFLAGS)
- LTYACCCOMPILE = $(LIBTOOL) $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \
-- --mode=compile $(YACC) $(YFLAGS) $(AM_YFLAGS)
-+ --mode=compile $(YACC) $(AM_YFLAGS) $(YFLAGS)
- SOURCES = $(as_new_SOURCES) $(EXTRA_as_new_SOURCES) \
- $(itbl_test_SOURCES)
- RECURSIVE_TARGETS = all-recursive check-recursive dvi-recursive \
-@@ -141,6 +158,11 @@
- install-pdf-recursive install-ps-recursive install-recursive \
- installcheck-recursive installdirs-recursive pdf-recursive \
- ps-recursive uninstall-recursive
-+am__can_run_installinfo = \
-+ case $$AM_UPDATE_INFO_DIR in \
-+ n|no|NO) false;; \
-+ *) (install-info --version) >/dev/null 2>&1;; \
-+ esac
- RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
- distclean-recursive maintainer-clean-recursive
- AM_RECURSIVE_TARGETS = $(RECURSIVE_TARGETS:-recursive=) \
-@@ -433,6 +455,7 @@
- config/tc-moxie.c \
- config/tc-msp430.c \
- config/tc-mt.c \
-+ config/tc-nds32.c \
- config/tc-nios2.c \
- config/tc-ns32k.c \
- config/tc-openrisc.c \
-@@ -504,6 +527,7 @@
- config/tc-mn10300.h \
- config/tc-msp430.h \
- config/tc-mt.h \
-+ config/tc-nds32.h \
- config/tc-nios2.h \
- config/tc-ns32k.h \
- config/tc-openrisc.h \
-@@ -651,7 +675,7 @@
- STAGESTUFF = *.@OBJEXT@ $(noinst_PROGRAMS)
- as_new_SOURCES = $(GAS_CFILES)
- as_new_LDADD = $(TARG_CPU_O) $(OBJ_FORMAT_O) $(ATOF_TARG_O) \
-- $(extra_objects) $(GASLIBS) $(LIBINTL) $(LIBM)
-+ $(extra_objects) $(GASLIBS) $(LIBINTL) $(LIBM) -ldl
-
- as_new_DEPENDENCIES = $(TARG_CPU_O) $(OBJ_FORMAT_O) $(ATOF_TARG_O) \
- $(extra_objects) $(GASLIBS) $(LIBINTL_DEP)
-@@ -683,7 +707,7 @@
-
- .SUFFIXES:
- .SUFFIXES: .c .l .lo .o .obj .y
--am--refresh:
-+am--refresh: Makefile
- @:
- $(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(am__configure_deps)
- @for dep in $?; do \
-@@ -719,10 +743,8 @@
- $(am__aclocal_m4_deps):
-
- config.h: stamp-h1
-- @if test ! -f $@; then \
-- rm -f stamp-h1; \
-- $(MAKE) $(AM_MAKEFLAGS) stamp-h1; \
-- else :; fi
-+ @if test ! -f $@; then rm -f stamp-h1; else :; fi
-+ @if test ! -f $@; then $(MAKE) $(AM_MAKEFLAGS) stamp-h1; else :; fi
-
- stamp-h1: $(srcdir)/config.in $(top_builddir)/config.status
- @rm -f stamp-h1
-@@ -749,10 +771,10 @@
- list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
- echo " rm -f" $$list; \
- rm -f $$list
--as-new$(EXEEXT): $(as_new_OBJECTS) $(as_new_DEPENDENCIES)
-+as-new$(EXEEXT): $(as_new_OBJECTS) $(as_new_DEPENDENCIES) $(EXTRA_as_new_DEPENDENCIES)
- @rm -f as-new$(EXEEXT)
- $(LINK) $(as_new_OBJECTS) $(as_new_LDADD) $(LIBS)
--itbl-test$(EXEEXT): $(itbl_test_OBJECTS) $(itbl_test_DEPENDENCIES)
-+itbl-test$(EXEEXT): $(itbl_test_OBJECTS) $(itbl_test_DEPENDENCIES) $(EXTRA_itbl_test_DEPENDENCIES)
- @rm -f itbl-test$(EXEEXT)
- $(LINK) $(itbl_test_OBJECTS) $(itbl_test_LDADD) $(LIBS)
-
-@@ -854,6 +876,7 @@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-moxie.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-msp430.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-mt.Po@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-nds32.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-nios2.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-ns32k.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-openrisc.Po@am__quote@
-@@ -1468,6 +1491,20 @@
- @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
- @am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-mt.obj `if test -f 'config/tc-mt.c'; then $(CYGPATH_W) 'config/tc-mt.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-mt.c'; fi`
-
-+tc-nds32.o: config/tc-nds32.c
-+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-nds32.o -MD -MP -MF $(DEPDIR)/tc-nds32.Tpo -c -o tc-nds32.o `test -f 'config/tc-nds32.c' || echo '$(srcdir)/'`config/tc-nds32.c
-+@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-nds32.Tpo $(DEPDIR)/tc-nds32.Po
-+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-nds32.c' object='tc-nds32.o' libtool=no @AMDEPBACKSLASH@
-+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
-+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-nds32.o `test -f 'config/tc-nds32.c' || echo '$(srcdir)/'`config/tc-nds32.c
-+
-+tc-nds32.obj: config/tc-nds32.c
-+@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-nds32.obj -MD -MP -MF $(DEPDIR)/tc-nds32.Tpo -c -o tc-nds32.obj `if test -f 'config/tc-nds32.c'; then $(CYGPATH_W) 'config/tc-nds32.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-nds32.c'; fi`
-+@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-nds32.Tpo $(DEPDIR)/tc-nds32.Po
-+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-nds32.c' object='tc-nds32.obj' libtool=no @AMDEPBACKSLASH@
-+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
-+@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-nds32.obj `if test -f 'config/tc-nds32.c'; then $(CYGPATH_W) 'config/tc-nds32.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-nds32.c'; fi`
-+
- tc-nios2.o: config/tc-nios2.c
- @am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-nios2.o -MD -MP -MF $(DEPDIR)/tc-nios2.Tpo -c -o tc-nios2.o `test -f 'config/tc-nios2.c' || echo '$(srcdir)/'`config/tc-nios2.c
- @am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-nios2.Tpo $(DEPDIR)/tc-nios2.Po
-@@ -2289,12 +2326,12 @@
-
- distclean-tags:
- -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
--site.exp: Makefile
-+site.exp: Makefile $(EXTRA_DEJAGNU_SITE_CONFIG)
- @echo 'Making a new site.exp file...'
- @echo '## these variables are automatically generated by make ##' >site.tmp
- @echo '# Do not edit here. If you wish to override these values' >>site.tmp
- @echo '# edit the last section' >>site.tmp
-- @echo 'set srcdir $(srcdir)' >>site.tmp
-+ @echo 'set srcdir "$(srcdir)"' >>site.tmp
- @echo "set objdir `pwd`" >>site.tmp
- @echo 'set build_alias "$(build_alias)"' >>site.tmp
- @echo 'set build_triplet $(build_triplet)' >>site.tmp
-@@ -2302,9 +2339,16 @@
- @echo 'set host_triplet $(host_triplet)' >>site.tmp
- @echo 'set target_alias "$(target_alias)"' >>site.tmp
- @echo 'set target_triplet $(target_triplet)' >>site.tmp
-- @echo '## All variables above are generated by configure. Do Not Edit ##' >>site.tmp
-- @test ! -f site.exp || \
-- sed '1,/^## All variables above are.*##/ d' site.exp >> site.tmp
-+ @list='$(EXTRA_DEJAGNU_SITE_CONFIG)'; for f in $$list; do \
-+ echo "## Begin content included from file $$f. Do not modify. ##" \
-+ && cat `test -f "$$f" || echo '$(srcdir)/'`$$f \
-+ && echo "## End content included from file $$f. ##" \
-+ || exit 1; \
-+ done >> site.tmp
-+ @echo "## End of auto-generated content; you can edit from here. ##" >> site.tmp
-+ @if test -f site.exp; then \
-+ sed -e '1,/^## End of auto-generated content.*##/d' site.exp >> site.tmp; \
-+ fi
- @-rm -f site.bak
- @test ! -f site.exp || mv site.exp site.bak
- @mv site.tmp site.exp
-@@ -2330,10 +2374,15 @@
-
- installcheck: installcheck-recursive
- install-strip:
-- $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
-- install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
-- `test -z '$(STRIP)' || \
-- echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
-+ if test -z '$(STRIP)'; then \
-+ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
-+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
-+ install; \
-+ else \
-+ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
-+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
-+ "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \
-+ fi
- mostlyclean-generic:
- -test -z "$(MOSTLYCLEANFILES)" || rm -f $(MOSTLYCLEANFILES)
-
-diff -Nur binutils-2.24.orig/gas/NEWS binutils-2.24/gas/NEWS
---- binutils-2.24.orig/gas/NEWS 2013-11-04 16:33:37.000000000 +0100
-+++ binutils-2.24/gas/NEWS 2016-06-30 21:26:12.729896069 +0200
-@@ -1,5 +1,7 @@
- -*- text -*-
-
-+* Add support for the Andes NDS32.
-+
- Changes in 2.24:
-
- * Add support for the Texas Instruments MSP430X processor.
-diff -Nur binutils-2.24.orig/gas/read.c binutils-2.24/gas/read.c
---- binutils-2.24.orig/gas/read.c 2013-11-08 11:13:48.000000000 +0100
-+++ binutils-2.24/gas/read.c 2016-06-30 21:26:12.729896069 +0200
-@@ -1703,7 +1703,7 @@
-
- temp = get_absolute_expr (&exp);
- size = temp;
-- size &= ((offsetT) 2 << (stdoutput->arch_info->bits_per_address - 1)) - 1;
-+ size &= ((addressT) 2 << (stdoutput->arch_info->bits_per_address - 1)) - 1;
- if (exp.X_op == O_absent)
- {
- as_bad (_("missing size expression"));
-@@ -5019,7 +5019,7 @@
- {
- /* Sign-extend VAL. */
- if (val & (1 << (loaded - 1)))
-- val |= ~0 << loaded;
-+ val |= ~0U << loaded;
- if (orig)
- *p = val & 0x7f;
- p++;
-diff -Nur binutils-2.24.orig/gas/rl78-parse.c binutils-2.24/gas/rl78-parse.c
---- binutils-2.24.orig/gas/rl78-parse.c 2013-11-18 09:49:28.000000000 +0100
-+++ binutils-2.24/gas/rl78-parse.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,4716 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton implementation for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* C LALR(1) parser skeleton written by Richard Stallman, by
-- simplifying the original so-called "semantic" parser. */
--
--/* All symbols defined below should begin with yy or YY, to avoid
-- infringing on user name space. This should be done even for local
-- variables, as they might otherwise be expanded by user macros.
-- There are some unavoidable exceptions within include files to
-- define necessary library symbols; they are noted "INFRINGES ON
-- USER NAME SPACE" below. */
--
--/* Identify Bison output. */
--#define YYBISON 1
--
--/* Bison version. */
--#define YYBISON_VERSION "2.3"
--
--/* Skeleton name. */
--#define YYSKELETON_NAME "yacc.c"
--
--/* Pure parsers. */
--#define YYPURE 0
--
--/* Using locations. */
--#define YYLSP_NEEDED 0
--
--/* Substitute the variable and function names. */
--#define yyparse rl78_parse
--#define yylex rl78_lex
--#define yyerror rl78_error
--#define yylval rl78_lval
--#define yychar rl78_char
--#define yydebug rl78_debug
--#define yynerrs rl78_nerrs
--
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- A = 258,
-- X = 259,
-- B = 260,
-- C = 261,
-- D = 262,
-- E = 263,
-- H = 264,
-- L = 265,
-- AX = 266,
-- BC = 267,
-- DE = 268,
-- HL = 269,
-- SPL = 270,
-- SPH = 271,
-- PSW = 272,
-- CS = 273,
-- ES = 274,
-- PMC = 275,
-- MEM = 276,
-- FLAG = 277,
-- SP = 278,
-- CY = 279,
-- RB0 = 280,
-- RB1 = 281,
-- RB2 = 282,
-- RB3 = 283,
-- EXPR = 284,
-- UNKNOWN_OPCODE = 285,
-- IS_OPCODE = 286,
-- DOT_S = 287,
-- DOT_B = 288,
-- DOT_W = 289,
-- DOT_L = 290,
-- DOT_A = 291,
-- DOT_UB = 292,
-- DOT_UW = 293,
-- ADD = 294,
-- ADDC = 295,
-- ADDW = 296,
-- AND_ = 297,
-- AND1 = 298,
-- BF = 299,
-- BH = 300,
-- BNC = 301,
-- BNH = 302,
-- BNZ = 303,
-- BR = 304,
-- BRK = 305,
-- BRK1 = 306,
-- BT = 307,
-- BTCLR = 308,
-- BZ = 309,
-- CALL = 310,
-- CALLT = 311,
-- CLR1 = 312,
-- CLRB = 313,
-- CLRW = 314,
-- CMP = 315,
-- CMP0 = 316,
-- CMPS = 317,
-- CMPW = 318,
-- DEC = 319,
-- DECW = 320,
-- DI = 321,
-- DIVHU = 322,
-- DIVWU = 323,
-- EI = 324,
-- HALT = 325,
-- INC = 326,
-- INCW = 327,
-- MACH = 328,
-- MACHU = 329,
-- MOV = 330,
-- MOV1 = 331,
-- MOVS = 332,
-- MOVW = 333,
-- MULH = 334,
-- MULHU = 335,
-- MULU = 336,
-- NOP = 337,
-- NOT1 = 338,
-- ONEB = 339,
-- ONEW = 340,
-- OR = 341,
-- OR1 = 342,
-- POP = 343,
-- PUSH = 344,
-- RET = 345,
-- RETI = 346,
-- RETB = 347,
-- ROL = 348,
-- ROLC = 349,
-- ROLWC = 350,
-- ROR = 351,
-- RORC = 352,
-- SAR = 353,
-- SARW = 354,
-- SEL = 355,
-- SET1 = 356,
-- SHL = 357,
-- SHLW = 358,
-- SHR = 359,
-- SHRW = 360,
-- SKC = 361,
-- SKH = 362,
-- SKNC = 363,
-- SKNH = 364,
-- SKNZ = 365,
-- SKZ = 366,
-- STOP = 367,
-- SUB = 368,
-- SUBC = 369,
-- SUBW = 370,
-- XCH = 371,
-- XCHW = 372,
-- XOR = 373,
-- XOR1 = 374
-- };
--#endif
--/* Tokens. */
--#define A 258
--#define X 259
--#define B 260
--#define C 261
--#define D 262
--#define E 263
--#define H 264
--#define L 265
--#define AX 266
--#define BC 267
--#define DE 268
--#define HL 269
--#define SPL 270
--#define SPH 271
--#define PSW 272
--#define CS 273
--#define ES 274
--#define PMC 275
--#define MEM 276
--#define FLAG 277
--#define SP 278
--#define CY 279
--#define RB0 280
--#define RB1 281
--#define RB2 282
--#define RB3 283
--#define EXPR 284
--#define UNKNOWN_OPCODE 285
--#define IS_OPCODE 286
--#define DOT_S 287
--#define DOT_B 288
--#define DOT_W 289
--#define DOT_L 290
--#define DOT_A 291
--#define DOT_UB 292
--#define DOT_UW 293
--#define ADD 294
--#define ADDC 295
--#define ADDW 296
--#define AND_ 297
--#define AND1 298
--#define BF 299
--#define BH 300
--#define BNC 301
--#define BNH 302
--#define BNZ 303
--#define BR 304
--#define BRK 305
--#define BRK1 306
--#define BT 307
--#define BTCLR 308
--#define BZ 309
--#define CALL 310
--#define CALLT 311
--#define CLR1 312
--#define CLRB 313
--#define CLRW 314
--#define CMP 315
--#define CMP0 316
--#define CMPS 317
--#define CMPW 318
--#define DEC 319
--#define DECW 320
--#define DI 321
--#define DIVHU 322
--#define DIVWU 323
--#define EI 324
--#define HALT 325
--#define INC 326
--#define INCW 327
--#define MACH 328
--#define MACHU 329
--#define MOV 330
--#define MOV1 331
--#define MOVS 332
--#define MOVW 333
--#define MULH 334
--#define MULHU 335
--#define MULU 336
--#define NOP 337
--#define NOT1 338
--#define ONEB 339
--#define ONEW 340
--#define OR 341
--#define OR1 342
--#define POP 343
--#define PUSH 344
--#define RET 345
--#define RETI 346
--#define RETB 347
--#define ROL 348
--#define ROLC 349
--#define ROLWC 350
--#define ROR 351
--#define RORC 352
--#define SAR 353
--#define SARW 354
--#define SEL 355
--#define SET1 356
--#define SHL 357
--#define SHLW 358
--#define SHR 359
--#define SHRW 360
--#define SKC 361
--#define SKH 362
--#define SKNC 363
--#define SKNH 364
--#define SKNZ 365
--#define SKZ 366
--#define STOP 367
--#define SUB 368
--#define SUBC 369
--#define SUBW 370
--#define XCH 371
--#define XCHW 372
--#define XOR 373
--#define XOR1 374
--
--
--
--
--/* Copy the first part of user declarations. */
--#line 20 "rl78-parse.y"
--
--
--#include "as.h"
--#include "safe-ctype.h"
--#include "rl78-defs.h"
--
--static int rl78_lex (void);
--
--/* Ok, here are the rules for using these macros...
--
-- B*() is used to specify the base opcode bytes. Fields to be filled
-- in later, leave zero. Call this first.
--
-- F() and FE() are used to fill in fields within the base opcode bytes. You MUST
-- call B*() before any F() or FE().
--
-- [UN]*O*(), PC*() appends operands to the end of the opcode. You
-- must call P() and B*() before any of these, so that the fixups
-- have the right byte location.
-- O = signed, UO = unsigned, NO = negated, PC = pcrel
--
-- IMM() adds an immediate and fills in the field for it.
-- NIMM() same, but negates the immediate.
-- NBIMM() same, but negates the immediate, for sbb.
-- DSP() adds a displacement, and fills in the field for it.
--
-- Note that order is significant for the O, IMM, and DSP macros, as
-- they append their data to the operand buffer in the order that you
-- call them.
--
-- Use "disp" for displacements whenever possible; this handles the
-- "0" case properly. */
--
--#define B1(b1) rl78_base1 (b1)
--#define B2(b1, b2) rl78_base2 (b1, b2)
--#define B3(b1, b2, b3) rl78_base3 (b1, b2, b3)
--#define B4(b1, b2, b3, b4) rl78_base4 (b1, b2, b3, b4)
--
--/* POS is bits from the MSB of the first byte to the LSB of the last byte. */
--#define F(val,pos,sz) rl78_field (val, pos, sz)
--#define FE(exp,pos,sz) rl78_field (exp_val (exp), pos, sz);
--
--#define O1(v) rl78_op (v, 1, RL78REL_DATA)
--#define O2(v) rl78_op (v, 2, RL78REL_DATA)
--#define O3(v) rl78_op (v, 3, RL78REL_DATA)
--#define O4(v) rl78_op (v, 4, RL78REL_DATA)
--
--#define PC1(v) rl78_op (v, 1, RL78REL_PCREL)
--#define PC2(v) rl78_op (v, 2, RL78REL_PCREL)
--#define PC3(v) rl78_op (v, 3, RL78REL_PCREL)
--
--#define IMM(v,pos) F (immediate (v, RL78REL_SIGNED, pos), pos, 2); \
-- if (v.X_op != O_constant && v.X_op != O_big) rl78_linkrelax_imm (pos)
--#define NIMM(v,pos) F (immediate (v, RL78REL_NEGATIVE, pos), pos, 2)
--#define NBIMM(v,pos) F (immediate (v, RL78REL_NEGATIVE_BORROW, pos), pos, 2)
--#define DSP(v,pos,msz) if (!v.X_md) rl78_relax (RL78_RELAX_DISP, pos); \
-- else rl78_linkrelax_dsp (pos); \
-- F (displacement (v, msz), pos, 2)
--
--#define id24(a,b2,b3) B3 (0xfb+a, b2, b3)
--
--static int expr_is_sfr (expressionS);
--static int expr_is_saddr (expressionS);
--static int expr_is_word_aligned (expressionS);
--static int exp_val (expressionS exp);
--
--static int need_flag = 0;
--static int rl78_in_brackets = 0;
--static int rl78_last_token = 0;
--static char * rl78_init_start;
--static char * rl78_last_exp_start = 0;
--static int rl78_bit_insn = 0;
--
--#define YYDEBUG 1
--#define YYERROR_VERBOSE 1
--
--#define NOT_SADDR rl78_error ("Expression not 0xFFE20 to 0xFFF1F")
--#define SA(e) if (!expr_is_saddr (e)) NOT_SADDR;
--
--#define NOT_SFR rl78_error ("Expression not 0xFFF00 to 0xFFFFF")
--#define SFR(e) if (!expr_is_sfr (e)) NOT_SFR;
--
--#define NOT_SFR_OR_SADDR rl78_error ("Expression not 0xFFE20 to 0xFFFFF")
--
--#define NOT_ES if (rl78_has_prefix()) rl78_error ("ES: prefix not allowed here");
--
--#define WA(x) if (!expr_is_word_aligned (x)) rl78_error ("Expression not word-aligned");
--
--static void check_expr_is_bit_index (expressionS);
--#define Bit(e) check_expr_is_bit_index (e);
--
--/* Returns TRUE (non-zero) if the expression is a constant in the
-- given range. */
--static int check_expr_is_const (expressionS, int vmin, int vmax);
--
--/* Convert a "regb" value to a "reg_xbc" value. Error if other
-- registers are passed. Needed to avoid reduce-reduce conflicts. */
--static int
--reg_xbc (int reg)
--{
-- switch (reg)
-- {
-- case 0: /* X */
-- return 0x10;
-- case 3: /* B */
-- return 0x20;
-- case 2: /* C */
-- return 0x30;
-- default:
-- rl78_error ("Only X, B, or C allowed here");
-- return 0;
-- }
--}
--
--
--
--/* Enabling traces. */
--#ifndef YYDEBUG
--# define YYDEBUG 0
--#endif
--
--/* Enabling verbose error messages. */
--#ifdef YYERROR_VERBOSE
--# undef YYERROR_VERBOSE
--# define YYERROR_VERBOSE 1
--#else
--# define YYERROR_VERBOSE 0
--#endif
--
--/* Enabling the token table. */
--#ifndef YYTOKEN_TABLE
--# define YYTOKEN_TABLE 0
--#endif
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 138 "rl78-parse.y"
--{
-- int regno;
-- expressionS exp;
--}
--/* Line 193 of yacc.c. */
--#line 463 "rl78-parse.c"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--
--
--/* Copy the second part of user declarations. */
--
--
--/* Line 216 of yacc.c. */
--#line 476 "rl78-parse.c"
--
--#ifdef short
--# undef short
--#endif
--
--#ifdef YYTYPE_UINT8
--typedef YYTYPE_UINT8 yytype_uint8;
--#else
--typedef unsigned char yytype_uint8;
--#endif
--
--#ifdef YYTYPE_INT8
--typedef YYTYPE_INT8 yytype_int8;
--#elif (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--typedef signed char yytype_int8;
--#else
--typedef short int yytype_int8;
--#endif
--
--#ifdef YYTYPE_UINT16
--typedef YYTYPE_UINT16 yytype_uint16;
--#else
--typedef unsigned short int yytype_uint16;
--#endif
--
--#ifdef YYTYPE_INT16
--typedef YYTYPE_INT16 yytype_int16;
--#else
--typedef short int yytype_int16;
--#endif
--
--#ifndef YYSIZE_T
--# ifdef __SIZE_TYPE__
--# define YYSIZE_T __SIZE_TYPE__
--# elif defined size_t
--# define YYSIZE_T size_t
--# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stddef.h> /* INFRINGES ON USER NAME SPACE */
--# define YYSIZE_T size_t
--# else
--# define YYSIZE_T unsigned int
--# endif
--#endif
--
--#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
--
--#ifndef YY_
--# if defined YYENABLE_NLS && YYENABLE_NLS
--# if ENABLE_NLS
--# include <libintl.h> /* INFRINGES ON USER NAME SPACE */
--# define YY_(msgid) dgettext ("bison-runtime", msgid)
--# endif
--# endif
--# ifndef YY_
--# define YY_(msgid) msgid
--# endif
--#endif
--
--/* Suppress unused-variable warnings by "using" E. */
--#if ! defined lint || defined __GNUC__
--# define YYUSE(e) ((void) (e))
--#else
--# define YYUSE(e) /* empty */
--#endif
--
--/* Identity function, used to suppress warnings about constant conditions. */
--#ifndef lint
--# define YYID(n) (n)
--#else
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static int
--YYID (int i)
--#else
--static int
--YYID (i)
-- int i;
--#endif
--{
-- return i;
--}
--#endif
--
--#if ! defined yyoverflow || YYERROR_VERBOSE
--
--/* The parser invokes alloca or malloc; define the necessary symbols. */
--
--# ifdef YYSTACK_USE_ALLOCA
--# if YYSTACK_USE_ALLOCA
--# ifdef __GNUC__
--# define YYSTACK_ALLOC __builtin_alloca
--# elif defined __BUILTIN_VA_ARG_INCR
--# include <alloca.h> /* INFRINGES ON USER NAME SPACE */
--# elif defined _AIX
--# define YYSTACK_ALLOC __alloca
--# elif defined _MSC_VER
--# include <malloc.h> /* INFRINGES ON USER NAME SPACE */
--# define alloca _alloca
--# else
--# define YYSTACK_ALLOC alloca
--# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# endif
--# endif
--# endif
--
--# ifdef YYSTACK_ALLOC
-- /* Pacify GCC's `empty if-body' warning. */
--# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0))
--# ifndef YYSTACK_ALLOC_MAXIMUM
-- /* The OS might guarantee only one guard page at the bottom of the stack,
-- and a page size can be as small as 4096 bytes. So we cannot safely
-- invoke alloca (N) if N exceeds 4096. Use a slightly smaller number
-- to allow for a few compiler-allocated temporary stack slots. */
--# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
--# endif
--# else
--# define YYSTACK_ALLOC YYMALLOC
--# define YYSTACK_FREE YYFREE
--# ifndef YYSTACK_ALLOC_MAXIMUM
--# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
--# endif
--# if (defined __cplusplus && ! defined _STDLIB_H \
-- && ! ((defined YYMALLOC || defined malloc) \
-- && (defined YYFREE || defined free)))
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# ifndef YYMALLOC
--# define YYMALLOC malloc
--# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# ifndef YYFREE
--# define YYFREE free
--# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void free (void *); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# endif
--#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
--
--
--#if (! defined yyoverflow \
-- && (! defined __cplusplus \
-- || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
--
--/* A type that is properly aligned for any stack member. */
--union yyalloc
--{
-- yytype_int16 yyss;
-- YYSTYPE yyvs;
-- };
--
--/* The size of the maximum gap between one aligned stack and the next. */
--# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
--
--/* The size of an array large to enough to hold all stacks, each with
-- N elements. */
--# define YYSTACK_BYTES(N) \
-- ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \
-- + YYSTACK_GAP_MAXIMUM)
--
--/* Copy COUNT objects from FROM to TO. The source and destination do
-- not overlap. */
--# ifndef YYCOPY
--# if defined __GNUC__ && 1 < __GNUC__
--# define YYCOPY(To, From, Count) \
-- __builtin_memcpy (To, From, (Count) * sizeof (*(From)))
--# else
--# define YYCOPY(To, From, Count) \
-- do \
-- { \
-- YYSIZE_T yyi; \
-- for (yyi = 0; yyi < (Count); yyi++) \
-- (To)[yyi] = (From)[yyi]; \
-- } \
-- while (YYID (0))
--# endif
--# endif
--
--/* Relocate STACK from its old location to the new one. The
-- local variables YYSIZE and YYSTACKSIZE give the old and new number of
-- elements in the stack, and YYPTR gives the new location of the
-- stack. Advance YYPTR to a properly aligned location for the next
-- stack. */
--# define YYSTACK_RELOCATE(Stack) \
-- do \
-- { \
-- YYSIZE_T yynewbytes; \
-- YYCOPY (&yyptr->Stack, Stack, yysize); \
-- Stack = &yyptr->Stack; \
-- yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
-- yyptr += yynewbytes / sizeof (*yyptr); \
-- } \
-- while (YYID (0))
--
--#endif
--
--/* YYFINAL -- State number of the termination state. */
--#define YYFINAL 174
--/* YYLAST -- Last index in YYTABLE. */
--#define YYLAST 835
--
--/* YYNTOKENS -- Number of terminals. */
--#define YYNTOKENS 129
--/* YYNNTS -- Number of nonterminals. */
--#define YYNNTS 50
--/* YYNRULES -- Number of rules. */
--#define YYNRULES 318
--/* YYNRULES -- Number of states. */
--#define YYNSTATES 738
--
--/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */
--#define YYUNDEFTOK 2
--#define YYMAXUTOK 374
--
--#define YYTRANSLATE(YYX) \
-- ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
--
--/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */
--static const yytype_uint8 yytranslate[] =
--{
-- 0, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 122, 2, 121, 127, 2, 2, 2,
-- 2, 2, 2, 125, 120, 2, 126, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 128, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 123, 2, 124, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 1, 2, 3, 4,
-- 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
-- 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
-- 35, 36, 37, 38, 39, 40, 41, 42, 43, 44,
-- 45, 46, 47, 48, 49, 50, 51, 52, 53, 54,
-- 55, 56, 57, 58, 59, 60, 61, 62, 63, 64,
-- 65, 66, 67, 68, 69, 70, 71, 72, 73, 74,
-- 75, 76, 77, 78, 79, 80, 81, 82, 83, 84,
-- 85, 86, 87, 88, 89, 90, 91, 92, 93, 94,
-- 95, 96, 97, 98, 99, 100, 101, 102, 103, 104,
-- 105, 106, 107, 108, 109, 110, 111, 112, 113, 114,
-- 115, 116, 117, 118, 119
--};
--
--#if YYDEBUG
--/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
-- YYRHS. */
--static const yytype_uint16 yyprhs[] =
--{
-- 0, 0, 3, 5, 11, 12, 19, 24, 29, 34,
-- 35, 41, 48, 56, 66, 76, 86, 94, 100, 105,
-- 106, 112, 119, 129, 137, 143, 144, 152, 153, 161,
-- 162, 170, 171, 182, 186, 190, 194, 198, 202, 206,
-- 214, 222, 230, 241, 244, 248, 253, 257, 262, 264,
-- 266, 269, 274, 278, 283, 288, 291, 296, 301, 306,
-- 313, 321, 324, 327, 330, 333, 334, 338, 343, 346,
-- 349, 352, 355, 358, 361, 362, 366, 371, 381, 384,
-- 385, 389, 393, 399, 406, 415, 418, 419, 423, 428,
-- 436, 438, 440, 442, 444, 447, 449, 451, 453, 455,
-- 457, 463, 469, 475, 476, 484, 491, 500, 505, 510,
-- 511, 518, 525, 531, 539, 546, 547, 554, 555, 556,
-- 564, 569, 574, 575, 576, 584, 592, 600, 611, 621,
-- 631, 639, 647, 658, 668, 678, 688, 698, 708, 718,
-- 728, 737, 746, 756, 765, 774, 784, 793, 802, 810,
-- 819, 827, 828, 840, 841, 851, 852, 863, 864, 873,
-- 874, 885, 886, 895, 902, 909, 916, 926, 933, 940,
-- 947, 957, 967, 973, 979, 980, 988, 989, 996, 997,
-- 1004, 1009, 1014, 1021, 1028, 1036, 1044, 1054, 1064, 1072,
-- 1080, 1090, 1100, 1109, 1118, 1127, 1136, 1145, 1153, 1162,
-- 1170, 1171, 1182, 1183, 1192, 1193, 1204, 1205, 1214, 1215,
-- 1221, 1228, 1234, 1239, 1244, 1249, 1251, 1254, 1257, 1260,
-- 1263, 1266, 1268, 1270, 1272, 1277, 1282, 1287, 1292, 1297,
-- 1302, 1307, 1312, 1315, 1318, 1321, 1324, 1329, 1334, 1339,
-- 1344, 1349, 1354, 1359, 1361, 1363, 1365, 1367, 1369, 1371,
-- 1373, 1378, 1385, 1393, 1403, 1411, 1421, 1431, 1441, 1446,
-- 1451, 1452, 1455, 1457, 1459, 1461, 1463, 1465, 1467, 1469,
-- 1471, 1473, 1475, 1477, 1479, 1481, 1483, 1485, 1487, 1489,
-- 1491, 1493, 1495, 1497, 1499, 1501, 1503, 1505, 1507, 1509,
-- 1511, 1513, 1515, 1517, 1519, 1521, 1523, 1525, 1527, 1529,
-- 1531, 1533, 1535, 1537, 1539, 1541, 1543, 1545, 1547, 1549,
-- 1551, 1553, 1555, 1557, 1559, 1561, 1563, 1565, 1567
--};
--
--/* YYRHS -- A `-1'-separated list of the rules' RHS. */
--static const yytype_int16 yyrhs[] =
--{
-- 130, 0, -1, 30, -1, 169, 3, 120, 121, 29,
-- -1, -1, 169, 29, 131, 120, 121, 29, -1, 169,
-- 3, 120, 3, -1, 169, 3, 120, 165, -1, 169,
-- 165, 120, 3, -1, -1, 169, 3, 120, 29, 132,
-- -1, 169, 3, 120, 163, 122, 29, -1, 169, 3,
-- 120, 163, 123, 14, 124, -1, 169, 3, 120, 163,
-- 123, 14, 125, 29, 124, -1, 169, 3, 120, 163,
-- 123, 14, 125, 5, 124, -1, 169, 3, 120, 163,
-- 123, 14, 125, 6, 124, -1, 169, 163, 122, 29,
-- 120, 121, 29, -1, 170, 11, 120, 121, 29, -1,
-- 170, 11, 120, 166, -1, -1, 170, 11, 120, 29,
-- 133, -1, 170, 11, 120, 163, 122, 29, -1, 170,
-- 11, 120, 163, 123, 14, 125, 29, 124, -1, 170,
-- 11, 120, 163, 123, 14, 124, -1, 170, 23, 120,
-- 121, 29, -1, -1, 171, 24, 120, 168, 126, 29,
-- 134, -1, -1, 171, 24, 120, 29, 126, 29, 135,
-- -1, -1, 171, 24, 120, 3, 126, 29, 136, -1,
-- -1, 171, 24, 120, 163, 123, 14, 124, 126, 29,
-- 137, -1, 12, 127, 29, -1, 46, 127, 29, -1,
-- 54, 127, 29, -1, 48, 127, 29, -1, 45, 127,
-- 29, -1, 47, 127, 29, -1, 172, 168, 126, 29,
-- 120, 127, 29, -1, 172, 29, 126, 29, 120, 127,
-- 29, -1, 172, 3, 126, 29, 120, 127, 29, -1,
-- 172, 163, 123, 14, 124, 126, 29, 120, 127, 29,
-- -1, 49, 11, -1, 49, 127, 29, -1, 49, 127,
-- 122, 29, -1, 49, 122, 29, -1, 49, 122, 122,
-- 29, -1, 50, -1, 51, -1, 55, 166, -1, 55,
-- 127, 122, 29, -1, 55, 122, 29, -1, 55, 122,
-- 122, 29, -1, 56, 123, 29, 124, -1, 173, 24,
-- -1, 173, 168, 126, 29, -1, 173, 29, 126, 29,
-- -1, 173, 3, 126, 29, -1, 173, 163, 122, 29,
-- 126, 29, -1, 173, 163, 123, 14, 124, 126, 29,
-- -1, 174, 3, -1, 174, 4, -1, 174, 5, -1,
-- 174, 6, -1, -1, 174, 29, 138, -1, 174, 163,
-- 122, 29, -1, 175, 11, -1, 175, 12, -1, 61,
-- 3, -1, 61, 4, -1, 61, 5, -1, 61, 6,
-- -1, -1, 61, 29, 139, -1, 61, 163, 122, 29,
-- -1, 62, 4, 120, 163, 123, 14, 125, 29, 124,
-- -1, 176, 164, -1, -1, 176, 29, 140, -1, 176,
-- 122, 29, -1, 176, 19, 128, 122, 29, -1, 176,
-- 123, 14, 125, 29, 124, -1, 176, 19, 128, 123,
-- 14, 125, 29, 124, -1, 177, 166, -1, -1, 177,
-- 29, 141, -1, 177, 163, 122, 29, -1, 177, 163,
-- 123, 14, 125, 29, 124, -1, 66, -1, 69, -1,
-- 80, -1, 79, -1, 81, 4, -1, 67, -1, 68,
-- -1, 74, -1, 73, -1, 70, -1, 75, 3, 120,
-- 121, 29, -1, 75, 165, 120, 121, 29, -1, 75,
-- 168, 120, 121, 29, -1, -1, 75, 163, 29, 120,
-- 121, 29, 142, -1, 75, 122, 29, 120, 121, 29,
-- -1, 75, 19, 128, 122, 29, 120, 121, 29, -1,
-- 75, 165, 120, 3, -1, 75, 3, 120, 165, -1,
-- -1, 75, 163, 29, 120, 3, 143, -1, 75, 3,
-- 120, 163, 122, 29, -1, 75, 122, 29, 120, 3,
-- -1, 75, 19, 128, 122, 29, 120, 3, -1, 75,
-- 165, 120, 163, 122, 29, -1, -1, 75, 3, 120,
-- 163, 29, 144, -1, -1, -1, 75, 165, 120, 163,
-- 29, 145, 146, -1, 75, 3, 120, 168, -1, 75,
-- 168, 120, 164, -1, -1, -1, 75, 168, 120, 163,
-- 29, 147, 148, -1, 75, 3, 120, 163, 123, 13,
-- 124, -1, 75, 163, 123, 13, 124, 120, 3, -1,
-- 75, 163, 123, 13, 125, 29, 124, 120, 121, 29,
-- -1, 75, 3, 120, 163, 123, 13, 125, 29, 124,
-- -1, 75, 163, 123, 13, 125, 29, 124, 120, 3,
-- -1, 75, 3, 120, 163, 123, 14, 124, -1, 75,
-- 163, 123, 14, 124, 120, 3, -1, 75, 163, 123,
-- 14, 125, 29, 124, 120, 121, 29, -1, 75, 3,
-- 120, 163, 123, 14, 125, 29, 124, -1, 75, 163,
-- 123, 14, 125, 29, 124, 120, 3, -1, 75, 3,
-- 120, 163, 123, 14, 125, 5, 124, -1, 75, 163,
-- 123, 14, 125, 5, 124, 120, 3, -1, 75, 3,
-- 120, 163, 123, 14, 125, 6, 124, -1, 75, 163,
-- 123, 14, 125, 6, 124, 120, 3, -1, 75, 163,
-- 29, 123, 5, 124, 120, 121, 29, -1, 75, 3,
-- 120, 163, 29, 123, 5, 124, -1, 75, 163, 29,
-- 123, 5, 124, 120, 3, -1, 75, 163, 29, 123,
-- 6, 124, 120, 121, 29, -1, 75, 3, 120, 163,
-- 29, 123, 6, 124, -1, 75, 163, 29, 123, 6,
-- 124, 120, 3, -1, 75, 163, 29, 123, 12, 124,
-- 120, 121, 29, -1, 75, 163, 123, 12, 124, 120,
-- 121, 29, -1, 75, 3, 120, 163, 29, 123, 12,
-- 124, -1, 75, 3, 120, 163, 123, 12, 124, -1,
-- 75, 163, 29, 123, 12, 124, 120, 3, -1, 75,
-- 163, 123, 12, 124, 120, 3, -1, -1, 75, 163,
-- 123, 23, 125, 29, 124, 120, 121, 29, 149, -1,
-- -1, 75, 163, 123, 23, 124, 120, 121, 29, 150,
-- -1, -1, 75, 3, 120, 163, 123, 23, 125, 29,
-- 124, 151, -1, -1, 75, 3, 120, 163, 123, 23,
-- 124, 152, -1, -1, 75, 163, 123, 23, 125, 29,
-- 124, 120, 3, 153, -1, -1, 75, 163, 123, 23,
-- 124, 120, 3, 154, -1, 178, 24, 120, 29, 126,
-- 29, -1, 178, 24, 120, 3, 126, 29, -1, 178,
-- 24, 120, 168, 126, 29, -1, 178, 24, 120, 163,
-- 123, 14, 124, 126, 29, -1, 178, 29, 126, 29,
-- 120, 24, -1, 178, 3, 126, 29, 120, 24, -1,
-- 178, 168, 126, 29, 120, 24, -1, 178, 163, 123,
-- 14, 124, 126, 29, 120, 24, -1, 77, 163, 123,
-- 14, 125, 29, 124, 120, 4, -1, 78, 11, 120,
-- 121, 29, -1, 78, 167, 120, 121, 29, -1, -1,
-- 78, 163, 29, 120, 121, 29, 155, -1, -1, 78,
-- 11, 120, 163, 29, 156, -1, -1, 78, 163, 29,
-- 120, 11, 157, -1, 78, 11, 120, 167, -1, 78,
-- 167, 120, 11, -1, 78, 11, 120, 163, 122, 29,
-- -1, 78, 163, 122, 29, 120, 11, -1, 78, 11,
-- 120, 163, 123, 13, 124, -1, 78, 163, 123, 13,
-- 124, 120, 11, -1, 78, 11, 120, 163, 123, 13,
-- 125, 29, 124, -1, 78, 163, 123, 13, 125, 29,
-- 124, 120, 11, -1, 78, 11, 120, 163, 123, 14,
-- 124, -1, 78, 163, 123, 14, 124, 120, 11, -1,
-- 78, 11, 120, 163, 123, 14, 125, 29, 124, -1,
-- 78, 163, 123, 14, 125, 29, 124, 120, 11, -1,
-- 78, 11, 120, 163, 29, 123, 5, 124, -1, 78,
-- 163, 29, 123, 5, 124, 120, 11, -1, 78, 11,
-- 120, 163, 29, 123, 6, 124, -1, 78, 163, 29,
-- 123, 6, 124, 120, 11, -1, 78, 11, 120, 163,
-- 29, 123, 12, 124, -1, 78, 11, 120, 163, 123,
-- 12, 124, -1, 78, 163, 29, 123, 12, 124, 120,
-- 11, -1, 78, 163, 123, 12, 124, 120, 11, -1,
-- -1, 78, 11, 120, 163, 123, 23, 125, 29, 124,
-- 158, -1, -1, 78, 11, 120, 163, 123, 23, 124,
-- 159, -1, -1, 78, 163, 123, 23, 125, 29, 124,
-- 120, 11, 160, -1, -1, 78, 163, 123, 23, 124,
-- 120, 11, 161, -1, -1, 78, 167, 120, 29, 162,
-- -1, 78, 167, 120, 163, 122, 29, -1, 78, 23,
-- 120, 121, 29, -1, 78, 23, 120, 11, -1, 78,
-- 11, 120, 23, -1, 78, 167, 120, 23, -1, 82,
-- -1, 83, 24, -1, 88, 166, -1, 88, 17, -1,
-- 89, 166, -1, 89, 17, -1, 90, -1, 91, -1,
-- 92, -1, 93, 3, 120, 29, -1, 94, 3, 120,
-- 29, -1, 95, 11, 120, 29, -1, 95, 12, 120,
-- 29, -1, 96, 3, 120, 29, -1, 97, 3, 120,
-- 29, -1, 98, 3, 120, 29, -1, 99, 11, 120,
-- 29, -1, 100, 25, -1, 100, 26, -1, 100, 27,
-- -1, 100, 28, -1, 102, 3, 120, 29, -1, 102,
-- 5, 120, 29, -1, 102, 6, 120, 29, -1, 103,
-- 11, 120, 29, -1, 103, 12, 120, 29, -1, 104,
-- 3, 120, 29, -1, 105, 11, 120, 29, -1, 106,
-- -1, 107, -1, 108, -1, 109, -1, 110, -1, 111,
-- -1, 112, -1, 116, 3, 120, 165, -1, 116, 3,
-- 120, 163, 122, 29, -1, 116, 3, 120, 163, 123,
-- 13, 124, -1, 116, 3, 120, 163, 123, 13, 125,
-- 29, 124, -1, 116, 3, 120, 163, 123, 14, 124,
-- -1, 116, 3, 120, 163, 123, 14, 125, 29, 124,
-- -1, 116, 3, 120, 163, 123, 14, 125, 5, 124,
-- -1, 116, 3, 120, 163, 123, 14, 125, 6, 124,
-- -1, 116, 3, 120, 29, -1, 117, 11, 120, 167,
-- -1, -1, 19, 128, -1, 4, -1, 3, -1, 6,
-- -1, 5, -1, 8, -1, 7, -1, 10, -1, 9,
-- -1, 4, -1, 6, -1, 5, -1, 8, -1, 7,
-- -1, 10, -1, 9, -1, 11, -1, 12, -1, 13,
-- -1, 14, -1, 12, -1, 13, -1, 14, -1, 15,
-- -1, 16, -1, 17, -1, 18, -1, 19, -1, 20,
-- -1, 21, -1, 39, -1, 40, -1, 113, -1, 114,
-- -1, 60, -1, 42, -1, 86, -1, 118, -1, 41,
-- -1, 115, -1, 63, -1, 43, -1, 87, -1, 119,
-- -1, 52, -1, 44, -1, 53, -1, 101, -1, 57,
-- -1, 84, -1, 58, -1, 85, -1, 59, -1, 71,
-- -1, 64, -1, 72, -1, 65, -1, 76, -1
--};
--
--/* YYRLINE[YYN] -- source line where rule number YYN was defined. */
--static const yytype_uint16 yyrline[] =
--{
-- 0, 181, 181, 202, 205, 205, 208, 211, 214, 217,
-- 217, 220, 223, 226, 229, 232, 237, 246, 249, 252,
-- 252, 255, 258, 261, 264, 272, 272, 275, 275, 284,
-- 284, 287, 287, 292, 295, 298, 301, 304, 307, 312,
-- 315, 324, 327, 332, 335, 338, 341, 344, 349, 352,
-- 357, 360, 363, 366, 369, 390, 393, 396, 405, 408,
-- 411, 416, 418, 420, 422, 425, 425, 428, 433, 435,
-- 440, 443, 446, 449, 452, 452, 455, 460, 465, 468,
-- 468, 470, 472, 474, 476, 481, 484, 484, 487, 490,
-- 495, 498, 503, 506, 509, 512, 520, 523, 526, 531,
-- 539, 541, 544, 551, 551, 560, 563, 566, 569, 572,
-- 572, 581, 584, 587, 590, 593, 593, 602, 602, 602,
-- 605, 608, 615, 615, 615, 622, 625, 628, 631, 634,
-- 637, 640, 643, 646, 649, 652, 655, 658, 661, 664,
-- 667, 670, 673, 676, 679, 682, 685, 688, 691, 694,
-- 697, 700, 700, 703, 703, 706, 706, 709, 709, 712,
-- 712, 715, 715, 720, 729, 732, 735, 738, 747, 750,
-- 753, 758, 763, 766, 769, 769, 778, 778, 787, 787,
-- 796, 799, 802, 805, 808, 811, 814, 817, 820, 823,
-- 826, 829, 832, 835, 838, 841, 844, 847, 850, 853,
-- 856, 856, 859, 859, 862, 862, 865, 865, 868, 868,
-- 871, 874, 877, 880, 883, 888, 893, 898, 901, 904,
-- 907, 912, 915, 918, 923, 928, 933, 938, 943, 948,
-- 955, 960, 967, 970, 973, 976, 981, 986, 991, 996,
-- 1001, 1008, 1013, 1020, 1023, 1026, 1029, 1032, 1035, 1040,
-- 1045, 1052, 1055, 1058, 1061, 1064, 1067, 1070, 1073, 1084,
-- 1093, 1094, 1098, 1099, 1100, 1101, 1102, 1103, 1104, 1105,
-- 1108, 1109, 1110, 1111, 1112, 1113, 1114, 1117, 1118, 1119,
-- 1120, 1123, 1124, 1125, 1128, 1129, 1130, 1131, 1132, 1133,
-- 1134, 1140, 1141, 1142, 1143, 1144, 1145, 1146, 1147, 1150,
-- 1151, 1152, 1155, 1156, 1157, 1160, 1161, 1162, 1165, 1166,
-- 1169, 1170, 1173, 1174, 1177, 1178, 1181, 1182, 1185
--};
--#endif
--
--#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE
--/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
-- First, the terminals, then, starting at YYNTOKENS, nonterminals. */
--static const char *const yytname[] =
--{
-- "$end", "error", "$undefined", "A", "X", "B", "C", "D", "E", "H", "L",
-- "AX", "BC", "DE", "HL", "SPL", "SPH", "PSW", "CS", "ES", "PMC", "MEM",
-- "FLAG", "SP", "CY", "RB0", "RB1", "RB2", "RB3", "EXPR", "UNKNOWN_OPCODE",
-- "IS_OPCODE", "DOT_S", "DOT_B", "DOT_W", "DOT_L", "DOT_A", "DOT_UB",
-- "DOT_UW", "ADD", "ADDC", "ADDW", "AND_", "AND1", "BF", "BH", "BNC",
-- "BNH", "BNZ", "BR", "BRK", "BRK1", "BT", "BTCLR", "BZ", "CALL", "CALLT",
-- "CLR1", "CLRB", "CLRW", "CMP", "CMP0", "CMPS", "CMPW", "DEC", "DECW",
-- "DI", "DIVHU", "DIVWU", "EI", "HALT", "INC", "INCW", "MACH", "MACHU",
-- "MOV", "MOV1", "MOVS", "MOVW", "MULH", "MULHU", "MULU", "NOP", "NOT1",
-- "ONEB", "ONEW", "OR", "OR1", "POP", "PUSH", "RET", "RETI", "RETB", "ROL",
-- "ROLC", "ROLWC", "ROR", "RORC", "SAR", "SARW", "SEL", "SET1", "SHL",
-- "SHLW", "SHR", "SHRW", "SKC", "SKH", "SKNC", "SKNH", "SKNZ", "SKZ",
-- "STOP", "SUB", "SUBC", "SUBW", "XCH", "XCHW", "XOR", "XOR1", "','",
-- "'#'", "'!'", "'['", "']'", "'+'", "'.'", "'$'", "':'", "$accept",
-- "statement", "@1", "@2", "@3", "@4", "@5", "@6", "@7", "@8", "@9", "@10",
-- "@11", "@12", "@13", "@14", "@15", "@16", "@17", "@18", "@19", "@20",
-- "@21", "@22", "@23", "@24", "@25", "@26", "@27", "@28", "@29", "@30",
-- "@31", "@32", "opt_es", "regb", "regb_na", "regw", "regw_na", "sfr",
-- "addsub", "addsubw", "andor1", "bt_bf", "setclr1", "oneclrb", "oneclrw",
-- "incdec", "incdecw", "mov1", 0
--};
--#endif
--
--# ifdef YYPRINT
--/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to
-- token YYLEX-NUM. */
--static const yytype_uint16 yytoknum[] =
--{
-- 0, 256, 257, 258, 259, 260, 261, 262, 263, 264,
-- 265, 266, 267, 268, 269, 270, 271, 272, 273, 274,
-- 275, 276, 277, 278, 279, 280, 281, 282, 283, 284,
-- 285, 286, 287, 288, 289, 290, 291, 292, 293, 294,
-- 295, 296, 297, 298, 299, 300, 301, 302, 303, 304,
-- 305, 306, 307, 308, 309, 310, 311, 312, 313, 314,
-- 315, 316, 317, 318, 319, 320, 321, 322, 323, 324,
-- 325, 326, 327, 328, 329, 330, 331, 332, 333, 334,
-- 335, 336, 337, 338, 339, 340, 341, 342, 343, 344,
-- 345, 346, 347, 348, 349, 350, 351, 352, 353, 354,
-- 355, 356, 357, 358, 359, 360, 361, 362, 363, 364,
-- 365, 366, 367, 368, 369, 370, 371, 372, 373, 374,
-- 44, 35, 33, 91, 93, 43, 46, 36, 58
--};
--# endif
--
--/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */
--static const yytype_uint8 yyr1[] =
--{
-- 0, 129, 130, 130, 131, 130, 130, 130, 130, 132,
-- 130, 130, 130, 130, 130, 130, 130, 130, 130, 133,
-- 130, 130, 130, 130, 130, 134, 130, 135, 130, 136,
-- 130, 137, 130, 130, 130, 130, 130, 130, 130, 130,
-- 130, 130, 130, 130, 130, 130, 130, 130, 130, 130,
-- 130, 130, 130, 130, 130, 130, 130, 130, 130, 130,
-- 130, 130, 130, 130, 130, 138, 130, 130, 130, 130,
-- 130, 130, 130, 130, 139, 130, 130, 130, 130, 140,
-- 130, 130, 130, 130, 130, 130, 141, 130, 130, 130,
-- 130, 130, 130, 130, 130, 130, 130, 130, 130, 130,
-- 130, 130, 130, 142, 130, 130, 130, 130, 130, 143,
-- 130, 130, 130, 130, 130, 144, 130, 145, 146, 130,
-- 130, 130, 147, 148, 130, 130, 130, 130, 130, 130,
-- 130, 130, 130, 130, 130, 130, 130, 130, 130, 130,
-- 130, 130, 130, 130, 130, 130, 130, 130, 130, 130,
-- 130, 149, 130, 150, 130, 151, 130, 152, 130, 153,
-- 130, 154, 130, 130, 130, 130, 130, 130, 130, 130,
-- 130, 130, 130, 130, 155, 130, 156, 130, 157, 130,
-- 130, 130, 130, 130, 130, 130, 130, 130, 130, 130,
-- 130, 130, 130, 130, 130, 130, 130, 130, 130, 130,
-- 158, 130, 159, 130, 160, 130, 161, 130, 162, 130,
-- 130, 130, 130, 130, 130, 130, 130, 130, 130, 130,
-- 130, 130, 130, 130, 130, 130, 130, 130, 130, 130,
-- 130, 130, 130, 130, 130, 130, 130, 130, 130, 130,
-- 130, 130, 130, 130, 130, 130, 130, 130, 130, 130,
-- 130, 130, 130, 130, 130, 130, 130, 130, 130, 130,
-- 163, 163, 164, 164, 164, 164, 164, 164, 164, 164,
-- 165, 165, 165, 165, 165, 165, 165, 166, 166, 166,
-- 166, 167, 167, 167, 168, 168, 168, 168, 168, 168,
-- 168, 169, 169, 169, 169, 169, 169, 169, 169, 170,
-- 170, 170, 171, 171, 171, 172, 172, 172, 173, 173,
-- 174, 174, 175, 175, 176, 176, 177, 177, 178
--};
--
--/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */
--static const yytype_uint8 yyr2[] =
--{
-- 0, 2, 1, 5, 0, 6, 4, 4, 4, 0,
-- 5, 6, 7, 9, 9, 9, 7, 5, 4, 0,
-- 5, 6, 9, 7, 5, 0, 7, 0, 7, 0,
-- 7, 0, 10, 3, 3, 3, 3, 3, 3, 7,
-- 7, 7, 10, 2, 3, 4, 3, 4, 1, 1,
-- 2, 4, 3, 4, 4, 2, 4, 4, 4, 6,
-- 7, 2, 2, 2, 2, 0, 3, 4, 2, 2,
-- 2, 2, 2, 2, 0, 3, 4, 9, 2, 0,
-- 3, 3, 5, 6, 8, 2, 0, 3, 4, 7,
-- 1, 1, 1, 1, 2, 1, 1, 1, 1, 1,
-- 5, 5, 5, 0, 7, 6, 8, 4, 4, 0,
-- 6, 6, 5, 7, 6, 0, 6, 0, 0, 7,
-- 4, 4, 0, 0, 7, 7, 7, 10, 9, 9,
-- 7, 7, 10, 9, 9, 9, 9, 9, 9, 9,
-- 8, 8, 9, 8, 8, 9, 8, 8, 7, 8,
-- 7, 0, 11, 0, 9, 0, 10, 0, 8, 0,
-- 10, 0, 8, 6, 6, 6, 9, 6, 6, 6,
-- 9, 9, 5, 5, 0, 7, 0, 6, 0, 6,
-- 4, 4, 6, 6, 7, 7, 9, 9, 7, 7,
-- 9, 9, 8, 8, 8, 8, 8, 7, 8, 7,
-- 0, 10, 0, 8, 0, 10, 0, 8, 0, 5,
-- 6, 5, 4, 4, 4, 1, 2, 2, 2, 2,
-- 2, 1, 1, 1, 4, 4, 4, 4, 4, 4,
-- 4, 4, 2, 2, 2, 2, 4, 4, 4, 4,
-- 4, 4, 4, 1, 1, 1, 1, 1, 1, 1,
-- 4, 6, 7, 9, 7, 9, 9, 9, 4, 4,
-- 0, 2, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1
--};
--
--/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
-- STATE-NUM when YYTABLE doesn't specify something else to do. Zero
-- means the default is an error. */
--static const yytype_uint16 yydefact[] =
--{
-- 0, 0, 2, 291, 292, 299, 296, 302, 306, 0,
-- 0, 0, 0, 0, 48, 49, 305, 307, 0, 0,
-- 0, 309, 311, 313, 295, 260, 0, 301, 315, 317,
-- 90, 95, 96, 91, 99, 314, 316, 98, 97, 260,
-- 318, 260, 260, 93, 92, 0, 215, 0, 310, 312,
-- 297, 303, 0, 0, 221, 222, 223, 0, 0, 0,
-- 0, 0, 0, 0, 0, 308, 0, 0, 0, 0,
-- 243, 244, 245, 246, 247, 248, 249, 293, 294, 300,
-- 0, 0, 298, 304, 0, 260, 0, 0, 260, 260,
-- 260, 0, 0, 260, 260, 0, 0, 0, 0, 0,
-- 43, 0, 0, 0, 277, 278, 279, 280, 0, 0,
-- 50, 0, 70, 71, 72, 73, 0, 74, 0, 0,
-- 0, 270, 272, 271, 274, 273, 276, 275, 284, 285,
-- 286, 287, 288, 289, 290, 0, 0, 0, 0, 0,
-- 0, 281, 282, 283, 0, 0, 0, 94, 216, 218,
-- 217, 220, 219, 0, 0, 0, 0, 0, 0, 0,
-- 0, 232, 233, 234, 235, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 1, 0, 4, 0, 0, 0,
-- 0, 0, 0, 288, 0, 0, 0, 0, 55, 0,
-- 0, 0, 61, 62, 63, 64, 65, 0, 68, 69,
-- 263, 262, 265, 264, 267, 266, 269, 268, 0, 79,
-- 0, 0, 78, 86, 0, 85, 0, 0, 0, 0,
-- 0, 33, 37, 34, 38, 36, 46, 0, 44, 0,
-- 35, 52, 0, 0, 0, 261, 75, 0, 260, 260,
-- 261, 0, 0, 0, 260, 260, 0, 260, 0, 0,
-- 0, 0, 260, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 260, 0,
-- 260, 0, 0, 0, 260, 0, 260, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 66, 0, 0, 80,
-- 81, 0, 87, 0, 0, 0, 260, 0, 0, 0,
-- 47, 45, 53, 51, 54, 76, 0, 0, 0, 108,
-- 120, 0, 0, 0, 0, 0, 0, 0, 0, 107,
-- 0, 0, 0, 0, 121, 0, 213, 0, 0, 180,
-- 212, 0, 0, 0, 0, 0, 0, 0, 0, 181,
-- 214, 208, 0, 0, 224, 225, 226, 227, 228, 229,
-- 230, 231, 236, 237, 238, 239, 240, 241, 242, 258,
-- 0, 250, 259, 6, 9, 0, 0, 7, 0, 0,
-- 8, 19, 0, 0, 18, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 58, 57, 0, 0, 56, 67,
-- 0, 0, 0, 88, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 100, 115, 0, 0, 0, 112,
-- 0, 109, 0, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 101, 117, 0, 102, 122, 0, 172,
-- 176, 0, 0, 211, 178, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 209, 173, 0,
-- 0, 0, 10, 3, 0, 0, 0, 0, 20, 17,
-- 0, 0, 24, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 82, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 116, 111, 0,
-- 0, 0, 0, 0, 105, 110, 103, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 118,
-- 114, 123, 0, 0, 177, 182, 0, 0, 0, 0,
-- 179, 174, 0, 0, 0, 183, 0, 0, 0, 0,
-- 0, 0, 0, 210, 251, 0, 0, 11, 0, 5,
-- 0, 21, 0, 29, 27, 0, 25, 0, 0, 0,
-- 0, 59, 0, 0, 83, 0, 168, 164, 163, 0,
-- 165, 167, 0, 169, 0, 0, 0, 0, 148, 125,
-- 0, 130, 0, 157, 0, 113, 0, 104, 0, 0,
-- 0, 150, 0, 126, 0, 131, 0, 0, 0, 161,
-- 0, 0, 119, 124, 0, 0, 0, 0, 197, 184,
-- 0, 188, 0, 202, 0, 175, 0, 0, 0, 199,
-- 185, 0, 189, 0, 206, 0, 252, 0, 254, 0,
-- 12, 0, 16, 23, 0, 30, 28, 0, 26, 41,
-- 40, 0, 39, 60, 0, 89, 0, 0, 0, 140,
-- 143, 147, 0, 0, 0, 0, 158, 0, 106, 141,
-- 0, 144, 0, 149, 0, 146, 0, 0, 0, 0,
-- 162, 153, 0, 0, 192, 194, 196, 0, 0, 203,
-- 0, 193, 195, 198, 0, 0, 207, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 84, 0,
-- 0, 77, 128, 135, 137, 133, 155, 139, 142, 145,
-- 129, 0, 136, 138, 134, 0, 154, 159, 0, 171,
-- 186, 190, 200, 187, 191, 204, 253, 256, 257, 255,
-- 14, 15, 13, 22, 31, 0, 166, 170, 156, 127,
-- 132, 160, 151, 201, 205, 32, 42, 152
--};
--
--/* YYDEFGOTO[NTERM-NUM]. */
--static const yytype_int16 yydefgoto[] =
--{
-- -1, 84, 271, 452, 458, 628, 626, 625, 735, 286,
-- 236, 289, 292, 577, 495, 487, 509, 592, 511, 593,
-- 737, 706, 728, 646, 731, 660, 605, 514, 520, 733,
-- 669, 734, 676, 447, 118, 212, 137, 110, 146, 138,
-- 85, 86, 87, 88, 89, 90, 91, 92, 93, 94
--};
--
--/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
-- STATE-NUM. */
--#define YYPACT_NINF -206
--static const yytype_int16 yypact[] =
--{
-- 220, -44, -206, -206, -206, -206, -206, -206, -206, -34,
-- -24, 17, 62, 41, -206, -206, -206, -206, 64, 93,
-- 75, -206, -206, -206, -206, 161, 203, -206, -206, -206,
-- -206, -206, -206, -206, -206, -206, -206, -206, -206, 53,
-- -206, 183, 228, -206, -206, 224, -206, 206, -206, -206,
-- -206, -206, 403, 422, -206, -206, -206, 235, 251, 97,
-- 253, 345, 356, 225, 336, -206, 38, 150, 382, 247,
-- -206, -206, -206, -206, -206, -206, -206, -206, -206, -206,
-- 401, 383, -206, -206, 246, 337, 149, 389, 390, 352,
-- 346, 167, 10, 198, 371, 394, 408, 413, 429, 445,
-- -206, 24, 63, 466, -206, -206, -206, -206, 81, 296,
-- -206, 467, -206, -206, -206, -206, 304, -206, 354, 379,
-- 380, -206, -206, -206, -206, -206, -206, -206, -206, -206,
-- -206, -206, 374, -206, -206, 472, 11, 384, 385, 386,
-- 387, -206, -206, -206, 388, 36, 392, -206, -206, -206,
-- -206, -206, -206, 393, 395, 396, 397, 398, 399, 400,
-- 402, -206, -206, -206, -206, 404, 405, 406, 407, 410,
-- 411, 412, 414, 415, -206, 416, -206, 381, 417, 418,
-- 419, 420, 421, 304, 423, 425, 424, 426, -206, 427,
-- 2, 430, -206, -206, -206, -206, -206, 432, -206, -206,
-- -206, -206, -206, -206, -206, -206, -206, -206, 378, -206,
-- 481, 497, -206, -206, 121, -206, 431, 435, 433, 437,
-- 436, -206, -206, -206, -206, -206, -206, 485, -206, 492,
-- -206, -206, 494, 499, 434, -206, -206, 500, 183, 80,
-- 439, 443, 96, 169, 29, 72, 519, 124, 55, 98,
-- 512, 211, 112, 513, 514, 515, 516, 517, 522, 535,
-- 536, 537, 538, 539, 540, 541, 542, 543, 446, 157,
-- 18, 453, 545, 572, 101, 456, 409, 547, 549, 565,
-- 551, 552, 553, 554, 570, 556, -206, 557, 130, -206,
-- -206, 462, -206, 559, 575, 561, 428, 562, 578, 564,
-- -206, -206, -206, -206, -206, -206, 471, 566, 65, -206,
-- -206, 567, 5, 6, 243, 473, 233, 255, 258, -206,
-- 569, 82, 571, 573, -206, 474, -206, 574, 73, -206,
-- -206, 576, 56, 348, 484, 477, 274, 277, 297, -206,
-- -206, -206, 577, 486, -206, -206, -206, -206, -206, -206,
-- -206, -206, -206, -206, -206, -206, -206, -206, -206, -206,
-- 318, -206, -206, -206, -206, 580, 344, -206, 489, 487,
-- -206, -206, 582, 349, -206, 583, 488, 490, 495, 491,
-- 493, 501, 496, 502, -206, -206, 498, 503, -206, -206,
-- 586, 605, 594, -206, 504, 505, 506, 507, 508, 509,
-- 510, 518, 520, 612, -206, 511, 599, 447, 521, -206,
-- 607, -206, 608, 523, 524, 525, 526, 530, 609, 531,
-- 111, 532, 610, -206, -206, 614, -206, -206, 615, -206,
-- 533, 616, 450, -206, -206, 624, 534, 544, 546, 643,
-- 555, 558, 626, 560, 628, 563, 630, -206, -206, 631,
-- 632, 455, -206, -206, 633, 649, 635, 548, -206, -206,
-- 636, 652, -206, 638, 642, 658, 644, 550, 568, 579,
-- 581, 645, 584, -206, 587, 585, 647, 655, 653, 656,
-- 667, 657, 660, 588, 663, 590, 372, -206, -206, 589,
-- 353, 355, 357, 7, -206, -206, -206, 591, 596, 597,
-- 8, 685, 595, 686, 598, 600, 601, 27, 602, -206,
-- -206, -206, 603, 391, -206, -206, 604, 359, 361, 363,
-- -206, -206, 611, 613, 617, -206, 679, 680, 606, 681,
-- 618, 682, 619, -206, -206, 365, 367, -206, 369, -206,
-- 665, -206, 373, -206, -206, 620, -206, 668, 669, 670,
-- 671, -206, 672, 673, -206, 621, -206, -206, -206, 622,
-- -206, -206, 674, -206, 675, 623, 625, 627, -206, -206,
-- 677, -206, 113, -206, 678, -206, 689, -206, 28, 30,
-- 31, -206, 691, -206, 634, -206, 637, 639, 640, -206,
-- 692, 641, -206, -206, 646, 629, 648, 650, -206, -206,
-- 694, -206, 700, -206, 703, -206, 723, 724, 725, -206,
-- -206, 651, -206, 659, -206, 661, -206, 709, -206, 116,
-- -206, 168, -206, -206, 710, -206, -206, 654, -206, -206,
-- -206, 662, -206, -206, 664, -206, 666, 676, 683, -206,
-- -206, -206, 684, 687, 688, 690, -206, 693, -206, -206,
-- 711, -206, 712, -206, 719, -206, 32, 747, 749, 33,
-- -206, -206, 35, 751, -206, -206, -206, 695, 696, -206,
-- 697, -206, -206, -206, 745, 752, -206, 753, 698, 699,
-- 701, 702, 704, 705, 706, 707, 729, 708, -206, 733,
-- 741, -206, -206, -206, -206, -206, -206, -206, -206, -206,
-- -206, 738, -206, -206, -206, 739, -206, -206, 740, -206,
-- -206, -206, -206, -206, -206, -206, -206, -206, -206, -206,
-- -206, -206, -206, -206, -206, 744, -206, -206, -206, -206,
-- -206, -206, -206, -206, -206, -206, -206, -206
--};
--
--/* YYPGOTO[NTERM-NUM]. */
--static const yytype_int16 yypgoto[] =
--{
-- -206, -206, -206, -206, -206, -206, -206, -206, -206, -206,
-- -206, -206, -206, -206, -206, -206, -206, -206, -206, -206,
-- -206, -206, -206, -206, -206, -206, -206, -206, -206, -206,
-- -206, -206, -206, -206, -39, 451, -84, -48, -205, -82,
-- -206, -206, -206, -206, -206, -206, -206, -206, -206, -206
--};
--
--/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If
-- positive, shift that token. If negative, reduce the rule which
-- number is the opposite. If zero, do what YYDEFACT says.
-- If YYTABLE_NINF, syntax error. */
--#define YYTABLE_NINF -1
--static const yytype_uint16 yytable[] =
--{
-- 136, 178, 139, 145, 150, 152, 186, 191, 409, 411,
-- 575, 581, 220, 200, 201, 202, 203, 204, 205, 206,
-- 207, 363, 121, 122, 123, 124, 125, 126, 127, 208,
-- 589, 649, 319, 651, 653, 700, 704, 116, 707, 209,
-- 242, 165, 329, 166, 167, 215, 177, 364, 116, 185,
-- 190, 197, 100, 226, 214, 219, 120, 121, 122, 123,
-- 124, 125, 126, 127, 362, 249, 330, 434, 128, 129,
-- 130, 131, 132, 133, 134, 200, 201, 202, 203, 204,
-- 205, 206, 207, 95, 121, 122, 123, 124, 125, 126,
-- 127, 116, 228, 96, 405, 128, 129, 130, 131, 183,
-- 133, 134, 430, 97, 104, 105, 106, 107, 155, 156,
-- 231, 424, 104, 105, 106, 107, 504, 505, 643, 644,
-- 116, 679, 680, 339, 283, 284, 410, 412, 576, 582,
-- 371, 116, 210, 211, 243, 340, 141, 142, 143, 365,
-- 506, 341, 645, 116, 98, 681, 227, 326, 590, 650,
-- 320, 652, 654, 701, 705, 309, 708, 310, 250, 251,
-- 179, 168, 169, 101, 112, 113, 114, 115, 102, 141,
-- 142, 143, 180, 682, 683, 135, 331, 435, 198, 199,
-- 116, 315, 316, 317, 361, 229, 367, 406, 407, 99,
-- 117, 103, 318, 322, 379, 431, 432, 684, 111, 306,
-- 308, 307, 116, 232, 425, 321, 323, 119, 328, 104,
-- 105, 106, 107, 343, 399, 108, 313, 116, 332, 314,
-- 109, 333, 372, 335, 336, 337, 374, 213, 147, 360,
-- 148, 366, 1, 342, 338, 373, 160, 378, 153, 140,
-- 141, 142, 143, 293, 294, 327, 174, 116, 413, 414,
-- 2, 144, 390, 391, 154, 415, 157, 398, 171, 3,
-- 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
-- 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
-- 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
-- 34, 35, 36, 37, 38, 39, 40, 41, 42, 43,
-- 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
-- 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
-- 64, 65, 66, 67, 68, 69, 70, 71, 72, 73,
-- 74, 75, 76, 77, 78, 79, 80, 81, 82, 83,
-- 175, 121, 122, 123, 124, 125, 126, 127, 158, 192,
-- 193, 194, 195, 436, 437, 187, 116, 417, 418, 159,
-- 438, 161, 162, 163, 164, 116, 176, 128, 129, 130,
-- 131, 183, 133, 134, 216, 196, 188, 565, 566, 419,
-- 420, 189, 421, 422, 567, 170, 128, 129, 130, 131,
-- 183, 133, 134, 182, 173, 217, 595, 596, 441, 442,
-- 218, 443, 444, 597, 172, 128, 129, 130, 131, 183,
-- 133, 134, 376, 181, 104, 105, 106, 107, 233, 184,
-- 149, 445, 446, 221, 128, 129, 130, 131, 183, 133,
-- 134, 396, 235, 104, 105, 106, 107, 222, 377, 151,
-- 450, 451, 223, 128, 129, 130, 131, 183, 133, 134,
-- 121, 122, 123, 124, 125, 126, 127, 397, 224, 489,
-- 490, 491, 516, 517, 518, 116, 454, 455, 535, 536,
-- 492, 460, 461, 519, 225, 359, 237, 569, 570, 571,
-- 572, 573, 574, 599, 600, 601, 602, 603, 604, 616,
-- 617, 618, 619, 620, 621, 230, 234, 623, 624, 238,
-- 239, 241, 240, 272, 244, 245, 288, 247, 248, 246,
-- 290, 291, 252, 253, 300, 254, 255, 256, 257, 258,
-- 259, 301, 260, 302, 261, 262, 263, 264, 303, 305,
-- 265, 266, 267, 325, 268, 269, 270, 273, 274, 275,
-- 276, 334, 344, 345, 346, 347, 348, 277, 279, 278,
-- 280, 349, 281, 282, 287, 296, 285, 295, 304, 297,
-- 298, 311, 299, 312, 350, 351, 352, 353, 354, 355,
-- 356, 357, 358, 368, 369, 370, 380, 375, 381, 382,
-- 383, 384, 385, 386, 387, 388, 389, 392, 393, 394,
-- 395, 400, 401, 402, 403, 404, 408, 416, 423, 428,
-- 426, 440, 427, 429, 439, 433, 448, 457, 449, 453,
-- 456, 459, 462, 467, 463, 473, 464, 466, 465, 474,
-- 469, 468, 470, 475, 471, 477, 485, 472, 488, 476,
-- 482, 480, 478, 479, 486, 481, 494, 496, 502, 508,
-- 484, 493, 483, 510, 512, 515, 500, 497, 498, 499,
-- 501, 503, 507, 521, 525, 528, 513, 530, 522, 532,
-- 533, 534, 537, 538, 539, 541, 542, 543, 523, 540,
-- 524, 544, 545, 546, 551, 526, 555, 547, 527, 556,
-- 529, 559, 557, 531, 561, 558, 560, 563, 583, 585,
-- 609, 610, 612, 614, 622, 548, 324, 629, 630, 631,
-- 632, 633, 634, 637, 638, 549, 642, 647, 550, 554,
-- 552, 578, 553, 568, 562, 564, 579, 580, 648, 584,
-- 655, 661, 586, 667, 587, 588, 591, 594, 598, 668,
-- 611, 606, 670, 607, 671, 672, 673, 608, 678, 685,
-- 697, 698, 613, 615, 627, 635, 636, 639, 699, 640,
-- 702, 641, 703, 664, 656, 709, 713, 657, 724, 658,
-- 659, 662, 726, 714, 715, 727, 663, 729, 730, 732,
-- 0, 674, 665, 736, 666, 0, 0, 0, 0, 675,
-- 686, 677, 687, 0, 0, 0, 0, 0, 688, 0,
-- 0, 0, 689, 0, 0, 0, 690, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 691, 692, 0,
-- 0, 693, 694, 0, 695, 0, 0, 696, 0, 710,
-- 711, 712, 716, 717, 0, 718, 719, 0, 720, 721,
-- 722, 723, 0, 0, 0, 725
--};
--
--static const yytype_int16 yycheck[] =
--{
-- 39, 85, 41, 42, 52, 53, 88, 89, 3, 3,
-- 3, 3, 94, 3, 4, 5, 6, 7, 8, 9,
-- 10, 3, 4, 5, 6, 7, 8, 9, 10, 19,
-- 3, 3, 3, 3, 3, 3, 3, 19, 3, 29,
-- 29, 3, 247, 5, 6, 93, 85, 29, 19, 88,
-- 89, 90, 11, 29, 93, 94, 3, 4, 5, 6,
-- 7, 8, 9, 10, 269, 29, 11, 11, 15, 16,
-- 17, 18, 19, 20, 21, 3, 4, 5, 6, 7,
-- 8, 9, 10, 127, 4, 5, 6, 7, 8, 9,
-- 10, 19, 29, 127, 29, 15, 16, 17, 18, 19,
-- 20, 21, 29, 127, 11, 12, 13, 14, 11, 12,
-- 29, 29, 11, 12, 13, 14, 5, 6, 5, 6,
-- 19, 5, 6, 11, 122, 123, 121, 121, 121, 121,
-- 29, 19, 122, 123, 123, 23, 12, 13, 14, 121,
-- 29, 29, 29, 19, 127, 29, 122, 23, 121, 121,
-- 121, 121, 121, 121, 121, 239, 121, 239, 122, 123,
-- 11, 11, 12, 122, 3, 4, 5, 6, 127, 12,
-- 13, 14, 23, 5, 6, 122, 121, 121, 11, 12,
-- 19, 12, 13, 14, 268, 122, 270, 122, 123, 127,
-- 29, 127, 23, 121, 276, 122, 123, 29, 123, 238,
-- 239, 121, 19, 122, 122, 244, 245, 4, 247, 11,
-- 12, 13, 14, 252, 296, 122, 120, 19, 120, 123,
-- 127, 123, 121, 12, 13, 14, 274, 29, 4, 268,
-- 24, 270, 12, 121, 23, 274, 11, 276, 3, 11,
-- 12, 13, 14, 122, 123, 121, 0, 19, 5, 6,
-- 30, 23, 122, 123, 3, 12, 3, 296, 11, 39,
-- 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
-- 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,
-- 60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
-- 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
-- 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
-- 90, 91, 92, 93, 94, 95, 96, 97, 98, 99,
-- 100, 101, 102, 103, 104, 105, 106, 107, 108, 109,
-- 110, 111, 112, 113, 114, 115, 116, 117, 118, 119,
-- 3, 4, 5, 6, 7, 8, 9, 10, 3, 3,
-- 4, 5, 6, 5, 6, 3, 19, 124, 125, 3,
-- 12, 25, 26, 27, 28, 19, 29, 15, 16, 17,
-- 18, 19, 20, 21, 3, 29, 24, 5, 6, 124,
-- 125, 29, 124, 125, 12, 3, 15, 16, 17, 18,
-- 19, 20, 21, 3, 11, 24, 5, 6, 124, 125,
-- 29, 124, 125, 12, 3, 15, 16, 17, 18, 19,
-- 20, 21, 3, 24, 11, 12, 13, 14, 122, 29,
-- 17, 124, 125, 29, 15, 16, 17, 18, 19, 20,
-- 21, 3, 128, 11, 12, 13, 14, 29, 29, 17,
-- 122, 123, 29, 15, 16, 17, 18, 19, 20, 21,
-- 4, 5, 6, 7, 8, 9, 10, 29, 29, 12,
-- 13, 14, 12, 13, 14, 19, 122, 123, 13, 14,
-- 23, 122, 123, 23, 29, 29, 122, 124, 125, 124,
-- 125, 124, 125, 124, 125, 124, 125, 124, 125, 124,
-- 125, 124, 125, 124, 125, 29, 29, 124, 125, 120,
-- 120, 29, 128, 122, 120, 120, 128, 120, 120, 123,
-- 29, 14, 120, 120, 29, 120, 120, 120, 120, 120,
-- 120, 29, 120, 29, 120, 120, 120, 120, 29, 29,
-- 120, 120, 120, 14, 120, 120, 120, 120, 120, 120,
-- 120, 29, 29, 29, 29, 29, 29, 126, 123, 126,
-- 126, 29, 126, 126, 122, 120, 126, 126, 124, 126,
-- 123, 122, 126, 120, 29, 29, 29, 29, 29, 29,
-- 29, 29, 29, 120, 29, 3, 29, 121, 29, 14,
-- 29, 29, 29, 29, 14, 29, 29, 125, 29, 14,
-- 29, 29, 14, 29, 123, 29, 29, 124, 29, 125,
-- 29, 124, 29, 29, 120, 29, 29, 120, 122, 29,
-- 121, 29, 29, 120, 126, 29, 126, 126, 123, 14,
-- 124, 120, 120, 29, 126, 120, 14, 124, 29, 125,
-- 120, 123, 126, 126, 123, 126, 29, 29, 29, 29,
-- 120, 120, 124, 29, 29, 29, 120, 124, 124, 124,
-- 120, 120, 120, 29, 11, 29, 123, 29, 124, 29,
-- 29, 29, 29, 14, 29, 29, 14, 29, 124, 121,
-- 124, 29, 14, 29, 29, 120, 29, 127, 120, 24,
-- 120, 14, 29, 120, 24, 29, 29, 24, 3, 3,
-- 11, 11, 11, 11, 29, 127, 245, 29, 29, 29,
-- 29, 29, 29, 29, 29, 126, 29, 29, 127, 124,
-- 126, 120, 125, 124, 126, 125, 120, 120, 29, 124,
-- 29, 29, 124, 29, 124, 124, 124, 124, 124, 29,
-- 124, 120, 29, 120, 11, 11, 11, 120, 29, 29,
-- 29, 29, 124, 124, 124, 124, 124, 124, 29, 124,
-- 3, 124, 3, 124, 120, 4, 11, 120, 29, 120,
-- 120, 120, 29, 11, 11, 24, 120, 29, 29, 29,
-- -1, 120, 124, 29, 124, -1, -1, -1, -1, 120,
-- 126, 120, 120, -1, -1, -1, -1, -1, 124, -1,
-- -1, -1, 126, -1, -1, -1, 120, -1, -1, -1,
-- -1, -1, -1, -1, -1, -1, -1, 124, 124, -1,
-- -1, 124, 124, -1, 124, -1, -1, 124, -1, 124,
-- 124, 124, 124, 124, -1, 124, 124, -1, 124, 124,
-- 124, 124, -1, -1, -1, 127
--};
--
--/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
-- symbol of state STATE-NUM. */
--static const yytype_uint8 yystos[] =
--{
-- 0, 12, 30, 39, 40, 41, 42, 43, 44, 45,
-- 46, 47, 48, 49, 50, 51, 52, 53, 54, 55,
-- 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
-- 66, 67, 68, 69, 70, 71, 72, 73, 74, 75,
-- 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
-- 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
-- 96, 97, 98, 99, 100, 101, 102, 103, 104, 105,
-- 106, 107, 108, 109, 110, 111, 112, 113, 114, 115,
-- 116, 117, 118, 119, 130, 169, 170, 171, 172, 173,
-- 174, 175, 176, 177, 178, 127, 127, 127, 127, 127,
-- 11, 122, 127, 127, 11, 12, 13, 14, 122, 127,
-- 166, 123, 3, 4, 5, 6, 19, 29, 163, 4,
-- 3, 4, 5, 6, 7, 8, 9, 10, 15, 16,
-- 17, 18, 19, 20, 21, 122, 163, 165, 168, 163,
-- 11, 12, 13, 14, 23, 163, 167, 4, 24, 17,
-- 166, 17, 166, 3, 3, 11, 12, 3, 3, 3,
-- 11, 25, 26, 27, 28, 3, 5, 6, 11, 12,
-- 3, 11, 3, 11, 0, 3, 29, 163, 165, 11,
-- 23, 24, 3, 19, 29, 163, 168, 3, 24, 29,
-- 163, 168, 3, 4, 5, 6, 29, 163, 11, 12,
-- 3, 4, 5, 6, 7, 8, 9, 10, 19, 29,
-- 122, 123, 164, 29, 163, 166, 3, 24, 29, 163,
-- 168, 29, 29, 29, 29, 29, 29, 122, 29, 122,
-- 29, 29, 122, 122, 29, 128, 139, 122, 120, 120,
-- 128, 29, 29, 123, 120, 120, 123, 120, 120, 29,
-- 122, 123, 120, 120, 120, 120, 120, 120, 120, 120,
-- 120, 120, 120, 120, 120, 120, 120, 120, 120, 120,
-- 120, 131, 122, 120, 120, 120, 120, 126, 126, 123,
-- 126, 126, 126, 122, 123, 126, 138, 122, 128, 140,
-- 29, 14, 141, 122, 123, 126, 120, 126, 123, 126,
-- 29, 29, 29, 29, 124, 29, 163, 121, 163, 165,
-- 168, 122, 120, 120, 123, 12, 13, 14, 23, 3,
-- 121, 163, 121, 163, 164, 14, 23, 121, 163, 167,
-- 11, 121, 120, 123, 29, 12, 13, 14, 23, 11,
-- 23, 29, 121, 163, 29, 29, 29, 29, 29, 29,
-- 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
-- 163, 165, 167, 3, 29, 121, 163, 165, 120, 29,
-- 3, 29, 121, 163, 166, 121, 3, 29, 163, 168,
-- 29, 29, 14, 29, 29, 29, 29, 14, 29, 29,
-- 122, 123, 125, 29, 14, 29, 3, 29, 163, 168,
-- 29, 14, 29, 123, 29, 29, 122, 123, 29, 3,
-- 121, 3, 121, 5, 6, 12, 124, 124, 125, 124,
-- 125, 124, 125, 29, 29, 122, 29, 29, 125, 29,
-- 29, 122, 123, 29, 11, 121, 5, 6, 12, 120,
-- 124, 124, 125, 124, 125, 124, 125, 162, 29, 122,
-- 122, 123, 132, 29, 122, 123, 121, 120, 133, 29,
-- 122, 123, 29, 126, 126, 123, 126, 120, 120, 124,
-- 120, 126, 124, 29, 14, 29, 125, 120, 126, 126,
-- 123, 126, 120, 124, 120, 14, 123, 144, 29, 12,
-- 13, 14, 23, 120, 29, 143, 29, 124, 124, 124,
-- 120, 120, 29, 120, 5, 6, 29, 120, 29, 145,
-- 29, 147, 29, 123, 156, 29, 12, 13, 14, 23,
-- 157, 29, 124, 124, 124, 11, 120, 120, 29, 120,
-- 29, 120, 29, 29, 29, 13, 14, 29, 14, 29,
-- 121, 29, 14, 29, 29, 14, 29, 127, 127, 126,
-- 127, 29, 126, 125, 124, 29, 24, 29, 29, 14,
-- 29, 24, 126, 24, 125, 5, 6, 12, 124, 124,
-- 125, 124, 125, 124, 125, 3, 121, 142, 120, 120,
-- 120, 3, 121, 3, 124, 3, 124, 124, 124, 3,
-- 121, 124, 146, 148, 124, 5, 6, 12, 124, 124,
-- 125, 124, 125, 124, 125, 155, 120, 120, 120, 11,
-- 11, 124, 11, 124, 11, 124, 124, 125, 124, 125,
-- 124, 125, 29, 124, 125, 136, 135, 124, 134, 29,
-- 29, 29, 29, 29, 29, 124, 124, 29, 29, 124,
-- 124, 124, 29, 5, 6, 29, 152, 29, 29, 3,
-- 121, 3, 121, 3, 121, 29, 120, 120, 120, 120,
-- 154, 29, 120, 120, 124, 124, 124, 29, 29, 159,
-- 29, 11, 11, 11, 120, 120, 161, 120, 29, 5,
-- 6, 29, 5, 6, 29, 29, 126, 120, 124, 126,
-- 120, 124, 124, 124, 124, 124, 124, 29, 29, 29,
-- 3, 121, 3, 3, 3, 121, 150, 3, 121, 4,
-- 124, 124, 124, 11, 11, 11, 124, 124, 124, 124,
-- 124, 124, 124, 124, 29, 127, 29, 24, 151, 29,
-- 29, 153, 29, 158, 160, 137, 29, 149
--};
--
--#define yyerrok (yyerrstatus = 0)
--#define yyclearin (yychar = YYEMPTY)
--#define YYEMPTY (-2)
--#define YYEOF 0
--
--#define YYACCEPT goto yyacceptlab
--#define YYABORT goto yyabortlab
--#define YYERROR goto yyerrorlab
--
--
--/* Like YYERROR except do call yyerror. This remains here temporarily
-- to ease the transition to the new meaning of YYERROR, for GCC.
-- Once GCC version 2 has supplanted version 1, this can go. */
--
--#define YYFAIL goto yyerrlab
--
--#define YYRECOVERING() (!!yyerrstatus)
--
--#define YYBACKUP(Token, Value) \
--do \
-- if (yychar == YYEMPTY && yylen == 1) \
-- { \
-- yychar = (Token); \
-- yylval = (Value); \
-- yytoken = YYTRANSLATE (yychar); \
-- YYPOPSTACK (1); \
-- goto yybackup; \
-- } \
-- else \
-- { \
-- yyerror (YY_("syntax error: cannot back up")); \
-- YYERROR; \
-- } \
--while (YYID (0))
--
--
--#define YYTERROR 1
--#define YYERRCODE 256
--
--
--/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
-- If N is 0, then set CURRENT to the empty location which ends
-- the previous symbol: RHS[0] (always defined). */
--
--#define YYRHSLOC(Rhs, K) ((Rhs)[K])
--#ifndef YYLLOC_DEFAULT
--# define YYLLOC_DEFAULT(Current, Rhs, N) \
-- do \
-- if (YYID (N)) \
-- { \
-- (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \
-- (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \
-- (Current).last_line = YYRHSLOC (Rhs, N).last_line; \
-- (Current).last_column = YYRHSLOC (Rhs, N).last_column; \
-- } \
-- else \
-- { \
-- (Current).first_line = (Current).last_line = \
-- YYRHSLOC (Rhs, 0).last_line; \
-- (Current).first_column = (Current).last_column = \
-- YYRHSLOC (Rhs, 0).last_column; \
-- } \
-- while (YYID (0))
--#endif
--
--
--/* YY_LOCATION_PRINT -- Print the location on the stream.
-- This macro was not mandated originally: define only if we know
-- we won't break user code: when these are the locations we know. */
--
--#ifndef YY_LOCATION_PRINT
--# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL
--# define YY_LOCATION_PRINT(File, Loc) \
-- fprintf (File, "%d.%d-%d.%d", \
-- (Loc).first_line, (Loc).first_column, \
-- (Loc).last_line, (Loc).last_column)
--# else
--# define YY_LOCATION_PRINT(File, Loc) ((void) 0)
--# endif
--#endif
--
--
--/* YYLEX -- calling `yylex' with the right arguments. */
--
--#ifdef YYLEX_PARAM
--# define YYLEX yylex (YYLEX_PARAM)
--#else
--# define YYLEX yylex ()
--#endif
--
--/* Enable debugging if requested. */
--#if YYDEBUG
--
--# ifndef YYFPRINTF
--# include <stdio.h> /* INFRINGES ON USER NAME SPACE */
--# define YYFPRINTF fprintf
--# endif
--
--# define YYDPRINTF(Args) \
--do { \
-- if (yydebug) \
-- YYFPRINTF Args; \
--} while (YYID (0))
--
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \
--do { \
-- if (yydebug) \
-- { \
-- YYFPRINTF (stderr, "%s ", Title); \
-- yy_symbol_print (stderr, \
-- Type, Value); \
-- YYFPRINTF (stderr, "\n"); \
-- } \
--} while (YYID (0))
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_value_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (!yyvaluep)
-- return;
--# ifdef YYPRINT
-- if (yytype < YYNTOKENS)
-- YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
--# else
-- YYUSE (yyoutput);
--# endif
-- switch (yytype)
-- {
-- default:
-- break;
-- }
--}
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (yytype < YYNTOKENS)
-- YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
-- else
-- YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
--
-- yy_symbol_value_print (yyoutput, yytype, yyvaluep);
-- YYFPRINTF (yyoutput, ")");
--}
--
--/*------------------------------------------------------------------.
--| yy_stack_print -- Print the state stack from its BOTTOM up to its |
--| TOP (included). |
--`------------------------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_stack_print (yytype_int16 *bottom, yytype_int16 *top)
--#else
--static void
--yy_stack_print (bottom, top)
-- yytype_int16 *bottom;
-- yytype_int16 *top;
--#endif
--{
-- YYFPRINTF (stderr, "Stack now");
-- for (; bottom <= top; ++bottom)
-- YYFPRINTF (stderr, " %d", *bottom);
-- YYFPRINTF (stderr, "\n");
--}
--
--# define YY_STACK_PRINT(Bottom, Top) \
--do { \
-- if (yydebug) \
-- yy_stack_print ((Bottom), (Top)); \
--} while (YYID (0))
--
--
--/*------------------------------------------------.
--| Report that the YYRULE is going to be reduced. |
--`------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_reduce_print (YYSTYPE *yyvsp, int yyrule)
--#else
--static void
--yy_reduce_print (yyvsp, yyrule)
-- YYSTYPE *yyvsp;
-- int yyrule;
--#endif
--{
-- int yynrhs = yyr2[yyrule];
-- int yyi;
-- unsigned long int yylno = yyrline[yyrule];
-- YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
-- yyrule - 1, yylno);
-- /* The symbols being reduced. */
-- for (yyi = 0; yyi < yynrhs; yyi++)
-- {
-- fprintf (stderr, " $%d = ", yyi + 1);
-- yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi],
-- &(yyvsp[(yyi + 1) - (yynrhs)])
-- );
-- fprintf (stderr, "\n");
-- }
--}
--
--# define YY_REDUCE_PRINT(Rule) \
--do { \
-- if (yydebug) \
-- yy_reduce_print (yyvsp, Rule); \
--} while (YYID (0))
--
--/* Nonzero means print parse trace. It is left uninitialized so that
-- multiple parsers can coexist. */
--int yydebug;
--#else /* !YYDEBUG */
--# define YYDPRINTF(Args)
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
--# define YY_STACK_PRINT(Bottom, Top)
--# define YY_REDUCE_PRINT(Rule)
--#endif /* !YYDEBUG */
--
--
--/* YYINITDEPTH -- initial size of the parser's stacks. */
--#ifndef YYINITDEPTH
--# define YYINITDEPTH 200
--#endif
--
--/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
-- if the built-in stack extension method is used).
--
-- Do not make this value too large; the results are undefined if
-- YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
-- evaluated with infinite-precision integer arithmetic. */
--
--#ifndef YYMAXDEPTH
--# define YYMAXDEPTH 10000
--#endif
--
--
--
--#if YYERROR_VERBOSE
--
--# ifndef yystrlen
--# if defined __GLIBC__ && defined _STRING_H
--# define yystrlen strlen
--# else
--/* Return the length of YYSTR. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static YYSIZE_T
--yystrlen (const char *yystr)
--#else
--static YYSIZE_T
--yystrlen (yystr)
-- const char *yystr;
--#endif
--{
-- YYSIZE_T yylen;
-- for (yylen = 0; yystr[yylen]; yylen++)
-- continue;
-- return yylen;
--}
--# endif
--# endif
--
--# ifndef yystpcpy
--# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
--# define yystpcpy stpcpy
--# else
--/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
-- YYDEST. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static char *
--yystpcpy (char *yydest, const char *yysrc)
--#else
--static char *
--yystpcpy (yydest, yysrc)
-- char *yydest;
-- const char *yysrc;
--#endif
--{
-- char *yyd = yydest;
-- const char *yys = yysrc;
--
-- while ((*yyd++ = *yys++) != '\0')
-- continue;
--
-- return yyd - 1;
--}
--# endif
--# endif
--
--# ifndef yytnamerr
--/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
-- quotes and backslashes, so that it's suitable for yyerror. The
-- heuristic is that double-quoting is unnecessary unless the string
-- contains an apostrophe, a comma, or backslash (other than
-- backslash-backslash). YYSTR is taken from yytname. If YYRES is
-- null, do not copy; instead, return the length of what the result
-- would have been. */
--static YYSIZE_T
--yytnamerr (char *yyres, const char *yystr)
--{
-- if (*yystr == '"')
-- {
-- YYSIZE_T yyn = 0;
-- char const *yyp = yystr;
--
-- for (;;)
-- switch (*++yyp)
-- {
-- case '\'':
-- case ',':
-- goto do_not_strip_quotes;
--
-- case '\\':
-- if (*++yyp != '\\')
-- goto do_not_strip_quotes;
-- /* Fall through. */
-- default:
-- if (yyres)
-- yyres[yyn] = *yyp;
-- yyn++;
-- break;
--
-- case '"':
-- if (yyres)
-- yyres[yyn] = '\0';
-- return yyn;
-- }
-- do_not_strip_quotes: ;
-- }
--
-- if (! yyres)
-- return yystrlen (yystr);
--
-- return yystpcpy (yyres, yystr) - yyres;
--}
--# endif
--
--/* Copy into YYRESULT an error message about the unexpected token
-- YYCHAR while in state YYSTATE. Return the number of bytes copied,
-- including the terminating null byte. If YYRESULT is null, do not
-- copy anything; just return the number of bytes that would be
-- copied. As a special case, return 0 if an ordinary "syntax error"
-- message will do. Return YYSIZE_MAXIMUM if overflow occurs during
-- size calculation. */
--static YYSIZE_T
--yysyntax_error (char *yyresult, int yystate, int yychar)
--{
-- int yyn = yypact[yystate];
--
-- if (! (YYPACT_NINF < yyn && yyn <= YYLAST))
-- return 0;
-- else
-- {
-- int yytype = YYTRANSLATE (yychar);
-- YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]);
-- YYSIZE_T yysize = yysize0;
-- YYSIZE_T yysize1;
-- int yysize_overflow = 0;
-- enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
-- char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
-- int yyx;
--
--# if 0
-- /* This is so xgettext sees the translatable formats that are
-- constructed on the fly. */
-- YY_("syntax error, unexpected %s");
-- YY_("syntax error, unexpected %s, expecting %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s");
--# endif
-- char *yyfmt;
-- char const *yyf;
-- static char const yyunexpected[] = "syntax error, unexpected %s";
-- static char const yyexpecting[] = ", expecting %s";
-- static char const yyor[] = " or %s";
-- char yyformat[sizeof yyunexpected
-- + sizeof yyexpecting - 1
-- + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2)
-- * (sizeof yyor - 1))];
-- char const *yyprefix = yyexpecting;
--
-- /* Start YYX at -YYN if negative to avoid negative indexes in
-- YYCHECK. */
-- int yyxbegin = yyn < 0 ? -yyn : 0;
--
-- /* Stay within bounds of both yycheck and yytname. */
-- int yychecklim = YYLAST - yyn + 1;
-- int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
-- int yycount = 1;
--
-- yyarg[0] = yytname[yytype];
-- yyfmt = yystpcpy (yyformat, yyunexpected);
--
-- for (yyx = yyxbegin; yyx < yyxend; ++yyx)
-- if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
-- {
-- if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
-- {
-- yycount = 1;
-- yysize = yysize0;
-- yyformat[sizeof yyunexpected - 1] = '\0';
-- break;
-- }
-- yyarg[yycount++] = yytname[yyx];
-- yysize1 = yysize + yytnamerr (0, yytname[yyx]);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
-- yyfmt = yystpcpy (yyfmt, yyprefix);
-- yyprefix = yyor;
-- }
--
-- yyf = YY_(yyformat);
-- yysize1 = yysize + yystrlen (yyf);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
--
-- if (yysize_overflow)
-- return YYSIZE_MAXIMUM;
--
-- if (yyresult)
-- {
-- /* Avoid sprintf, as that infringes on the user's name space.
-- Don't have undefined behavior even if the translation
-- produced a string with the wrong number of "%s"s. */
-- char *yyp = yyresult;
-- int yyi = 0;
-- while ((*yyp = *yyf) != '\0')
-- {
-- if (*yyp == '%' && yyf[1] == 's' && yyi < yycount)
-- {
-- yyp += yytnamerr (yyp, yyarg[yyi++]);
-- yyf += 2;
-- }
-- else
-- {
-- yyp++;
-- yyf++;
-- }
-- }
-- }
-- return yysize;
-- }
--}
--#endif /* YYERROR_VERBOSE */
--
--
--/*-----------------------------------------------.
--| Release the memory associated to this symbol. |
--`-----------------------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep)
--#else
--static void
--yydestruct (yymsg, yytype, yyvaluep)
-- const char *yymsg;
-- int yytype;
-- YYSTYPE *yyvaluep;
--#endif
--{
-- YYUSE (yyvaluep);
--
-- if (!yymsg)
-- yymsg = "Deleting";
-- YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
--
-- switch (yytype)
-- {
--
-- default:
-- break;
-- }
--}
--
--
--/* Prevent warnings from -Wmissing-prototypes. */
--
--#ifdef YYPARSE_PARAM
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void *YYPARSE_PARAM);
--#else
--int yyparse ();
--#endif
--#else /* ! YYPARSE_PARAM */
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void);
--#else
--int yyparse ();
--#endif
--#endif /* ! YYPARSE_PARAM */
--
--
--
--/* The look-ahead symbol. */
--int yychar;
--
--/* The semantic value of the look-ahead symbol. */
--YYSTYPE yylval;
--
--/* Number of syntax errors so far. */
--int yynerrs;
--
--
--
--/*----------.
--| yyparse. |
--`----------*/
--
--#ifdef YYPARSE_PARAM
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void *YYPARSE_PARAM)
--#else
--int
--yyparse (YYPARSE_PARAM)
-- void *YYPARSE_PARAM;
--#endif
--#else /* ! YYPARSE_PARAM */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void)
--#else
--int
--yyparse ()
--
--#endif
--#endif
--{
--
-- int yystate;
-- int yyn;
-- int yyresult;
-- /* Number of tokens to shift before error messages enabled. */
-- int yyerrstatus;
-- /* Look-ahead token as an internal (translated) token number. */
-- int yytoken = 0;
--#if YYERROR_VERBOSE
-- /* Buffer for error messages, and its allocated size. */
-- char yymsgbuf[128];
-- char *yymsg = yymsgbuf;
-- YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
--#endif
--
-- /* Three stacks and their tools:
-- `yyss': related to states,
-- `yyvs': related to semantic values,
-- `yyls': related to locations.
--
-- Refer to the stacks thru separate pointers, to allow yyoverflow
-- to reallocate them elsewhere. */
--
-- /* The state stack. */
-- yytype_int16 yyssa[YYINITDEPTH];
-- yytype_int16 *yyss = yyssa;
-- yytype_int16 *yyssp;
--
-- /* The semantic value stack. */
-- YYSTYPE yyvsa[YYINITDEPTH];
-- YYSTYPE *yyvs = yyvsa;
-- YYSTYPE *yyvsp;
--
--
--
--#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N))
--
-- YYSIZE_T yystacksize = YYINITDEPTH;
--
-- /* The variables used to return semantic value and location from the
-- action routines. */
-- YYSTYPE yyval;
--
--
-- /* The number of symbols on the RHS of the reduced rule.
-- Keep to zero when no symbol should be popped. */
-- int yylen = 0;
--
-- YYDPRINTF ((stderr, "Starting parse\n"));
--
-- yystate = 0;
-- yyerrstatus = 0;
-- yynerrs = 0;
-- yychar = YYEMPTY; /* Cause a token to be read. */
--
-- /* Initialize stack pointers.
-- Waste one element of value and location stack
-- so that they stay on the same level as the state stack.
-- The wasted elements are never initialized. */
--
-- yyssp = yyss;
-- yyvsp = yyvs;
--
-- goto yysetstate;
--
--/*------------------------------------------------------------.
--| yynewstate -- Push a new state, which is found in yystate. |
--`------------------------------------------------------------*/
-- yynewstate:
-- /* In all cases, when you get here, the value and location stacks
-- have just been pushed. So pushing a state here evens the stacks. */
-- yyssp++;
--
-- yysetstate:
-- *yyssp = yystate;
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- {
-- /* Get the current used size of the three stacks, in elements. */
-- YYSIZE_T yysize = yyssp - yyss + 1;
--
--#ifdef yyoverflow
-- {
-- /* Give user a chance to reallocate the stack. Use copies of
-- these so that the &'s don't force the real ones into
-- memory. */
-- YYSTYPE *yyvs1 = yyvs;
-- yytype_int16 *yyss1 = yyss;
--
--
-- /* Each stack pointer address is followed by the size of the
-- data in use in that stack, in bytes. This used to be a
-- conditional around just the two extra args, but that might
-- be undefined if yyoverflow is a macro. */
-- yyoverflow (YY_("memory exhausted"),
-- &yyss1, yysize * sizeof (*yyssp),
-- &yyvs1, yysize * sizeof (*yyvsp),
--
-- &yystacksize);
--
-- yyss = yyss1;
-- yyvs = yyvs1;
-- }
--#else /* no yyoverflow */
--# ifndef YYSTACK_RELOCATE
-- goto yyexhaustedlab;
--# else
-- /* Extend the stack our own way. */
-- if (YYMAXDEPTH <= yystacksize)
-- goto yyexhaustedlab;
-- yystacksize *= 2;
-- if (YYMAXDEPTH < yystacksize)
-- yystacksize = YYMAXDEPTH;
--
-- {
-- yytype_int16 *yyss1 = yyss;
-- union yyalloc *yyptr =
-- (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
-- if (! yyptr)
-- goto yyexhaustedlab;
-- YYSTACK_RELOCATE (yyss);
-- YYSTACK_RELOCATE (yyvs);
--
--# undef YYSTACK_RELOCATE
-- if (yyss1 != yyssa)
-- YYSTACK_FREE (yyss1);
-- }
--# endif
--#endif /* no yyoverflow */
--
-- yyssp = yyss + yysize - 1;
-- yyvsp = yyvs + yysize - 1;
--
--
-- YYDPRINTF ((stderr, "Stack size increased to %lu\n",
-- (unsigned long int) yystacksize));
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- YYABORT;
-- }
--
-- YYDPRINTF ((stderr, "Entering state %d\n", yystate));
--
-- goto yybackup;
--
--/*-----------.
--| yybackup. |
--`-----------*/
--yybackup:
--
-- /* Do appropriate processing given the current state. Read a
-- look-ahead token if we need one and don't already have one. */
--
-- /* First try to decide what to do without reference to look-ahead token. */
-- yyn = yypact[yystate];
-- if (yyn == YYPACT_NINF)
-- goto yydefault;
--
-- /* Not known => get a look-ahead token if don't already have one. */
--
-- /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */
-- if (yychar == YYEMPTY)
-- {
-- YYDPRINTF ((stderr, "Reading a token: "));
-- yychar = YYLEX;
-- }
--
-- if (yychar <= YYEOF)
-- {
-- yychar = yytoken = YYEOF;
-- YYDPRINTF ((stderr, "Now at end of input.\n"));
-- }
-- else
-- {
-- yytoken = YYTRANSLATE (yychar);
-- YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
-- }
--
-- /* If the proper action on seeing token YYTOKEN is to reduce or to
-- detect an error, take that action. */
-- yyn += yytoken;
-- if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
-- goto yydefault;
-- yyn = yytable[yyn];
-- if (yyn <= 0)
-- {
-- if (yyn == 0 || yyn == YYTABLE_NINF)
-- goto yyerrlab;
-- yyn = -yyn;
-- goto yyreduce;
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- /* Count tokens shifted since error; after three, turn off error
-- status. */
-- if (yyerrstatus)
-- yyerrstatus--;
--
-- /* Shift the look-ahead token. */
-- YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
--
-- /* Discard the shifted token unless it is eof. */
-- if (yychar != YYEOF)
-- yychar = YYEMPTY;
--
-- yystate = yyn;
-- *++yyvsp = yylval;
--
-- goto yynewstate;
--
--
--/*-----------------------------------------------------------.
--| yydefault -- do the default action for the current state. |
--`-----------------------------------------------------------*/
--yydefault:
-- yyn = yydefact[yystate];
-- if (yyn == 0)
-- goto yyerrlab;
-- goto yyreduce;
--
--
--/*-----------------------------.
--| yyreduce -- Do a reduction. |
--`-----------------------------*/
--yyreduce:
-- /* yyn is the number of a rule to reduce with. */
-- yylen = yyr2[yyn];
--
-- /* If YYLEN is nonzero, implement the default value of the action:
-- `$$ = $1'.
--
-- Otherwise, the following line sets YYVAL to garbage.
-- This behavior is undocumented and Bison
-- users should not rely upon it. Assigning to YYVAL
-- unconditionally makes the parser a bit smaller, and it avoids a
-- GCC warning that YYVAL may be used uninitialized. */
-- yyval = yyvsp[1-yylen];
--
--
-- YY_REDUCE_PRINT (yyn);
-- switch (yyn)
-- {
-- case 2:
--#line 182 "rl78-parse.y"
-- { as_bad (_("Unknown opcode: %s"), rl78_init_start); }
-- break;
--
-- case 3:
--#line 203 "rl78-parse.y"
-- { B1 (0x0c|(yyvsp[(1) - (5)].regno)); O1 ((yyvsp[(5) - (5)].exp)); }
-- break;
--
-- case 4:
--#line 205 "rl78-parse.y"
-- {SA((yyvsp[(2) - (2)].exp))}
-- break;
--
-- case 5:
--#line 206 "rl78-parse.y"
-- { B1 (0x0a|(yyvsp[(1) - (6)].regno)); O1 ((yyvsp[(2) - (6)].exp)); O1 ((yyvsp[(6) - (6)].exp)); }
-- break;
--
-- case 6:
--#line 209 "rl78-parse.y"
-- { B2 (0x61, 0x01|(yyvsp[(1) - (4)].regno)); }
-- break;
--
-- case 7:
--#line 212 "rl78-parse.y"
-- { B2 (0x61, 0x08|(yyvsp[(1) - (4)].regno)); F ((yyvsp[(4) - (4)].regno), 13, 3); }
-- break;
--
-- case 8:
--#line 215 "rl78-parse.y"
-- { B2 (0x61, 0x00|(yyvsp[(1) - (4)].regno)); F ((yyvsp[(2) - (4)].regno), 13, 3); }
-- break;
--
-- case 9:
--#line 217 "rl78-parse.y"
-- {SA((yyvsp[(4) - (4)].exp))}
-- break;
--
-- case 10:
--#line 218 "rl78-parse.y"
-- { B1 (0x0b|(yyvsp[(1) - (5)].regno)); O1 ((yyvsp[(4) - (5)].exp)); }
-- break;
--
-- case 11:
--#line 221 "rl78-parse.y"
-- { B1 (0x0f|(yyvsp[(1) - (6)].regno)); O2 ((yyvsp[(6) - (6)].exp)); rl78_linkrelax_addr16 (); }
-- break;
--
-- case 12:
--#line 224 "rl78-parse.y"
-- { B1 (0x0d|(yyvsp[(1) - (7)].regno)); }
-- break;
--
-- case 13:
--#line 227 "rl78-parse.y"
-- { B1 (0x0e|(yyvsp[(1) - (9)].regno)); O1 ((yyvsp[(8) - (9)].exp)); }
-- break;
--
-- case 14:
--#line 230 "rl78-parse.y"
-- { B2 (0x61, 0x80|(yyvsp[(1) - (9)].regno)); }
-- break;
--
-- case 15:
--#line 233 "rl78-parse.y"
-- { B2 (0x61, 0x82|(yyvsp[(1) - (9)].regno)); }
-- break;
--
-- case 16:
--#line 238 "rl78-parse.y"
-- { if ((yyvsp[(1) - (7)].regno) != 0x40)
-- { rl78_error ("Only CMP takes these operands"); }
-- else
-- { B1 (0x00|(yyvsp[(1) - (7)].regno)); O2 ((yyvsp[(4) - (7)].exp)); O1 ((yyvsp[(7) - (7)].exp)); rl78_linkrelax_addr16 (); }
-- }
-- break;
--
-- case 17:
--#line 247 "rl78-parse.y"
-- { B1 (0x04|(yyvsp[(1) - (5)].regno)); O2 ((yyvsp[(5) - (5)].exp)); }
-- break;
--
-- case 18:
--#line 250 "rl78-parse.y"
-- { B1 (0x01|(yyvsp[(1) - (4)].regno)); F ((yyvsp[(4) - (4)].regno), 5, 2); }
-- break;
--
-- case 19:
--#line 252 "rl78-parse.y"
-- {SA((yyvsp[(4) - (4)].exp))}
-- break;
--
-- case 20:
--#line 253 "rl78-parse.y"
-- { B1 (0x06|(yyvsp[(1) - (5)].regno)); O1 ((yyvsp[(4) - (5)].exp)); }
-- break;
--
-- case 21:
--#line 256 "rl78-parse.y"
-- { B1 (0x02|(yyvsp[(1) - (6)].regno)); O2 ((yyvsp[(6) - (6)].exp)); rl78_linkrelax_addr16 (); }
-- break;
--
-- case 22:
--#line 259 "rl78-parse.y"
-- { B2 (0x61, 0x09|(yyvsp[(1) - (9)].regno)); O1 ((yyvsp[(8) - (9)].exp)); }
-- break;
--
-- case 23:
--#line 262 "rl78-parse.y"
-- { B4 (0x61, 0x09|(yyvsp[(1) - (7)].regno), 0, 0); }
-- break;
--
-- case 24:
--#line 265 "rl78-parse.y"
-- { B1 ((yyvsp[(1) - (5)].regno) ? 0x20 : 0x10); O1 ((yyvsp[(5) - (5)].exp));
-- if ((yyvsp[(1) - (5)].regno) == 0x40)
-- rl78_error ("CMPW SP,#imm not allowed");
-- }
-- break;
--
-- case 25:
--#line 272 "rl78-parse.y"
-- {Bit((yyvsp[(6) - (6)].exp))}
-- break;
--
-- case 26:
--#line 273 "rl78-parse.y"
-- { B3 (0x71, 0x08|(yyvsp[(1) - (7)].regno), (yyvsp[(4) - (7)].regno)); FE ((yyvsp[(6) - (7)].exp), 9, 3); }
-- break;
--
-- case 27:
--#line 275 "rl78-parse.y"
-- {Bit((yyvsp[(6) - (6)].exp))}
-- break;
--
-- case 28:
--#line 276 "rl78-parse.y"
-- { if (expr_is_sfr ((yyvsp[(4) - (7)].exp)))
-- { B2 (0x71, 0x08|(yyvsp[(1) - (7)].regno)); FE ((yyvsp[(6) - (7)].exp), 9, 3); O1 ((yyvsp[(4) - (7)].exp)); }
-- else if (expr_is_saddr ((yyvsp[(4) - (7)].exp)))
-- { B2 (0x71, 0x00|(yyvsp[(1) - (7)].regno)); FE ((yyvsp[(6) - (7)].exp), 9, 3); O1 ((yyvsp[(4) - (7)].exp)); }
-- else
-- NOT_SFR_OR_SADDR;
-- }
-- break;
--
-- case 29:
--#line 284 "rl78-parse.y"
-- {Bit((yyvsp[(6) - (6)].exp))}
-- break;
--
-- case 30:
--#line 285 "rl78-parse.y"
-- { B2 (0x71, 0x88|(yyvsp[(1) - (7)].regno)); FE ((yyvsp[(6) - (7)].exp), 9, 3); }
-- break;
--
-- case 31:
--#line 287 "rl78-parse.y"
-- {Bit((yyvsp[(9) - (9)].exp))}
-- break;
--
-- case 32:
--#line 288 "rl78-parse.y"
-- { B2 (0x71, 0x80|(yyvsp[(1) - (10)].regno)); FE ((yyvsp[(9) - (10)].exp), 9, 3); }
-- break;
--
-- case 33:
--#line 293 "rl78-parse.y"
-- { B1 (0xdc); PC1 ((yyvsp[(3) - (3)].exp)); }
-- break;
--
-- case 34:
--#line 296 "rl78-parse.y"
-- { B1 (0xde); PC1 ((yyvsp[(3) - (3)].exp)); }
-- break;
--
-- case 35:
--#line 299 "rl78-parse.y"
-- { B1 (0xdd); PC1 ((yyvsp[(3) - (3)].exp)); }
-- break;
--
-- case 36:
--#line 302 "rl78-parse.y"
-- { B1 (0xdf); PC1 ((yyvsp[(3) - (3)].exp)); }
-- break;
--
-- case 37:
--#line 305 "rl78-parse.y"
-- { B2 (0x61, 0xc3); PC1 ((yyvsp[(3) - (3)].exp)); }
-- break;
--
-- case 38:
--#line 308 "rl78-parse.y"
-- { B2 (0x61, 0xd3); PC1 ((yyvsp[(3) - (3)].exp)); }
-- break;
--
-- case 39:
--#line 313 "rl78-parse.y"
-- { B3 (0x31, 0x80|(yyvsp[(1) - (7)].regno), (yyvsp[(2) - (7)].regno)); FE ((yyvsp[(4) - (7)].exp), 9, 3); PC1 ((yyvsp[(7) - (7)].exp)); }
-- break;
--
-- case 40:
--#line 316 "rl78-parse.y"
-- { if (expr_is_sfr ((yyvsp[(2) - (7)].exp)))
-- { B2 (0x31, 0x80|(yyvsp[(1) - (7)].regno)); FE ((yyvsp[(4) - (7)].exp), 9, 3); O1 ((yyvsp[(2) - (7)].exp)); PC1 ((yyvsp[(7) - (7)].exp)); }
-- else if (expr_is_saddr ((yyvsp[(2) - (7)].exp)))
-- { B2 (0x31, 0x00|(yyvsp[(1) - (7)].regno)); FE ((yyvsp[(4) - (7)].exp), 9, 3); O1 ((yyvsp[(2) - (7)].exp)); PC1 ((yyvsp[(7) - (7)].exp)); }
-- else
-- NOT_SFR_OR_SADDR;
-- }
-- break;
--
-- case 41:
--#line 325 "rl78-parse.y"
-- { B2 (0x31, 0x01|(yyvsp[(1) - (7)].regno)); FE ((yyvsp[(4) - (7)].exp), 9, 3); PC1 ((yyvsp[(7) - (7)].exp)); }
-- break;
--
-- case 42:
--#line 328 "rl78-parse.y"
-- { B2 (0x31, 0x81|(yyvsp[(1) - (10)].regno)); FE ((yyvsp[(7) - (10)].exp), 9, 3); PC1 ((yyvsp[(10) - (10)].exp)); }
-- break;
--
-- case 43:
--#line 333 "rl78-parse.y"
-- { B2 (0x61, 0xcb); }
-- break;
--
-- case 44:
--#line 336 "rl78-parse.y"
-- { B1 (0xef); PC1 ((yyvsp[(3) - (3)].exp)); }
-- break;
--
-- case 45:
--#line 339 "rl78-parse.y"
-- { B1 (0xee); PC2 ((yyvsp[(4) - (4)].exp)); rl78_linkrelax_branch (); }
-- break;
--
-- case 46:
--#line 342 "rl78-parse.y"
-- { B1 (0xed); O2 ((yyvsp[(3) - (3)].exp)); rl78_linkrelax_branch (); }
-- break;
--
-- case 47:
--#line 345 "rl78-parse.y"
-- { B1 (0xec); O3 ((yyvsp[(4) - (4)].exp)); rl78_linkrelax_branch (); }
-- break;
--
-- case 48:
--#line 350 "rl78-parse.y"
-- { B2 (0x61, 0xcc); }
-- break;
--
-- case 49:
--#line 353 "rl78-parse.y"
-- { B1 (0xff); }
-- break;
--
-- case 50:
--#line 358 "rl78-parse.y"
-- { B2 (0x61, 0xca); F ((yyvsp[(2) - (2)].regno), 10, 2); }
-- break;
--
-- case 51:
--#line 361 "rl78-parse.y"
-- { B1 (0xfe); PC2 ((yyvsp[(4) - (4)].exp)); }
-- break;
--
-- case 52:
--#line 364 "rl78-parse.y"
-- { B1 (0xfd); O2 ((yyvsp[(3) - (3)].exp)); }
-- break;
--
-- case 53:
--#line 367 "rl78-parse.y"
-- { B1 (0xfc); O3 ((yyvsp[(4) - (4)].exp)); rl78_linkrelax_branch (); }
-- break;
--
-- case 54:
--#line 370 "rl78-parse.y"
-- { if ((yyvsp[(3) - (4)].exp).X_op != O_constant)
-- rl78_error ("CALLT requires a numeric address");
-- else
-- {
-- int i = (yyvsp[(3) - (4)].exp).X_add_number;
-- if (i < 0x80 || i > 0xbe)
-- rl78_error ("CALLT address not 0x80..0xbe");
-- else if (i & 1)
-- rl78_error ("CALLT address not even");
-- else
-- {
-- B2 (0x61, 0x84);
-- F ((i >> 1) & 7, 9, 3);
-- F ((i >> 4) & 7, 14, 2);
-- }
-- }
-- }
-- break;
--
-- case 55:
--#line 391 "rl78-parse.y"
-- { B2 (0x71, (yyvsp[(1) - (2)].regno) ? 0x88 : 0x80); }
-- break;
--
-- case 56:
--#line 394 "rl78-parse.y"
-- { B3 (0x71, 0x0a|(yyvsp[(1) - (4)].regno), (yyvsp[(2) - (4)].regno)); FE ((yyvsp[(4) - (4)].exp), 9, 3); }
-- break;
--
-- case 57:
--#line 397 "rl78-parse.y"
-- { if (expr_is_sfr ((yyvsp[(2) - (4)].exp)))
-- { B2 (0x71, 0x0a|(yyvsp[(1) - (4)].regno)); FE ((yyvsp[(4) - (4)].exp), 9, 3); O1 ((yyvsp[(2) - (4)].exp)); }
-- else if (expr_is_saddr ((yyvsp[(2) - (4)].exp)))
-- { B2 (0x71, 0x02|(yyvsp[(1) - (4)].regno)); FE ((yyvsp[(4) - (4)].exp), 9, 3); O1 ((yyvsp[(2) - (4)].exp)); }
-- else
-- NOT_SFR_OR_SADDR;
-- }
-- break;
--
-- case 58:
--#line 406 "rl78-parse.y"
-- { B2 (0x71, 0x8a|(yyvsp[(1) - (4)].regno)); FE ((yyvsp[(4) - (4)].exp), 9, 3); }
-- break;
--
-- case 59:
--#line 409 "rl78-parse.y"
-- { B2 (0x71, 0x00+(yyvsp[(1) - (6)].regno)*0x08); FE ((yyvsp[(6) - (6)].exp), 9, 3); O2 ((yyvsp[(4) - (6)].exp)); rl78_linkrelax_addr16 (); }
-- break;
--
-- case 60:
--#line 412 "rl78-parse.y"
-- { B2 (0x71, 0x82|(yyvsp[(1) - (7)].regno)); FE ((yyvsp[(7) - (7)].exp), 9, 3); }
-- break;
--
-- case 61:
--#line 417 "rl78-parse.y"
-- { B1 (0xe1|(yyvsp[(1) - (2)].regno)); }
-- break;
--
-- case 62:
--#line 419 "rl78-parse.y"
-- { B1 (0xe0|(yyvsp[(1) - (2)].regno)); }
-- break;
--
-- case 63:
--#line 421 "rl78-parse.y"
-- { B1 (0xe3|(yyvsp[(1) - (2)].regno)); }
-- break;
--
-- case 64:
--#line 423 "rl78-parse.y"
-- { B1 (0xe2|(yyvsp[(1) - (2)].regno)); }
-- break;
--
-- case 65:
--#line 425 "rl78-parse.y"
-- {SA((yyvsp[(2) - (2)].exp))}
-- break;
--
-- case 66:
--#line 426 "rl78-parse.y"
-- { B1 (0xe4|(yyvsp[(1) - (3)].regno)); O1 ((yyvsp[(2) - (3)].exp)); }
-- break;
--
-- case 67:
--#line 429 "rl78-parse.y"
-- { B1 (0xe5|(yyvsp[(1) - (4)].regno)); O2 ((yyvsp[(4) - (4)].exp)); rl78_linkrelax_addr16 (); }
-- break;
--
-- case 68:
--#line 434 "rl78-parse.y"
-- { B1 (0xe6|(yyvsp[(1) - (2)].regno)); }
-- break;
--
-- case 69:
--#line 436 "rl78-parse.y"
-- { B1 (0xe7|(yyvsp[(1) - (2)].regno)); }
-- break;
--
-- case 70:
--#line 441 "rl78-parse.y"
-- { B1 (0xd1); }
-- break;
--
-- case 71:
--#line 444 "rl78-parse.y"
-- { B1 (0xd0); }
-- break;
--
-- case 72:
--#line 447 "rl78-parse.y"
-- { B1 (0xd3); }
-- break;
--
-- case 73:
--#line 450 "rl78-parse.y"
-- { B1 (0xd2); }
-- break;
--
-- case 74:
--#line 452 "rl78-parse.y"
-- {SA((yyvsp[(2) - (2)].exp))}
-- break;
--
-- case 75:
--#line 453 "rl78-parse.y"
-- { B1 (0xd4); O1 ((yyvsp[(2) - (3)].exp)); }
-- break;
--
-- case 76:
--#line 456 "rl78-parse.y"
-- { B1 (0xd5); O2 ((yyvsp[(4) - (4)].exp)); rl78_linkrelax_addr16 (); }
-- break;
--
-- case 77:
--#line 461 "rl78-parse.y"
-- { B2 (0x61, 0xde); O1 ((yyvsp[(8) - (9)].exp)); }
-- break;
--
-- case 78:
--#line 466 "rl78-parse.y"
-- { B1 (0x80|(yyvsp[(1) - (2)].regno)); F ((yyvsp[(2) - (2)].regno), 5, 3); }
-- break;
--
-- case 79:
--#line 468 "rl78-parse.y"
-- {SA((yyvsp[(2) - (2)].exp))}
-- break;
--
-- case 80:
--#line 469 "rl78-parse.y"
-- { B1 (0xa4|(yyvsp[(1) - (3)].regno)); O1 ((yyvsp[(2) - (3)].exp)); }
-- break;
--
-- case 81:
--#line 471 "rl78-parse.y"
-- { B1 (0xa0|(yyvsp[(1) - (3)].regno)); O2 ((yyvsp[(3) - (3)].exp)); rl78_linkrelax_addr16 (); }
-- break;
--
-- case 82:
--#line 473 "rl78-parse.y"
-- { B2 (0x11, 0xa0|(yyvsp[(1) - (5)].regno)); O2 ((yyvsp[(5) - (5)].exp)); }
-- break;
--
-- case 83:
--#line 475 "rl78-parse.y"
-- { B2 (0x61, 0x59+(yyvsp[(1) - (6)].regno)); O1 ((yyvsp[(5) - (6)].exp)); }
-- break;
--
-- case 84:
--#line 477 "rl78-parse.y"
-- { B3 (0x11, 0x61, 0x59+(yyvsp[(1) - (8)].regno)); O1 ((yyvsp[(7) - (8)].exp)); }
-- break;
--
-- case 85:
--#line 482 "rl78-parse.y"
-- { B1 (0xa1|(yyvsp[(1) - (2)].regno)); F ((yyvsp[(2) - (2)].regno), 5, 2); }
-- break;
--
-- case 86:
--#line 484 "rl78-parse.y"
-- {SA((yyvsp[(2) - (2)].exp))}
-- break;
--
-- case 87:
--#line 485 "rl78-parse.y"
-- { B1 (0xa6|(yyvsp[(1) - (3)].regno)); O1 ((yyvsp[(2) - (3)].exp)); }
-- break;
--
-- case 88:
--#line 488 "rl78-parse.y"
-- { B1 (0xa2|(yyvsp[(1) - (4)].regno)); O2 ((yyvsp[(4) - (4)].exp)); rl78_linkrelax_addr16 (); }
-- break;
--
-- case 89:
--#line 491 "rl78-parse.y"
-- { B2 (0x61, 0x79+(yyvsp[(1) - (7)].regno)); O1 ((yyvsp[(6) - (7)].exp)); }
-- break;
--
-- case 90:
--#line 496 "rl78-parse.y"
-- { B3 (0x71, 0x7b, 0xfa); }
-- break;
--
-- case 91:
--#line 499 "rl78-parse.y"
-- { B3 (0x71, 0x7a, 0xfa); }
-- break;
--
-- case 92:
--#line 504 "rl78-parse.y"
-- { B3 (0xce, 0xfb, 0x01); }
-- break;
--
-- case 93:
--#line 507 "rl78-parse.y"
-- { B3 (0xce, 0xfb, 0x02); }
-- break;
--
-- case 94:
--#line 510 "rl78-parse.y"
-- { B1 (0xd6); }
-- break;
--
-- case 95:
--#line 513 "rl78-parse.y"
-- { B3 (0xce, 0xfb, 0x03); }
-- break;
--
-- case 96:
--#line 521 "rl78-parse.y"
-- { B3 (0xce, 0xfb, 0x0b); }
-- break;
--
-- case 97:
--#line 524 "rl78-parse.y"
-- { B3 (0xce, 0xfb, 0x05); }
-- break;
--
-- case 98:
--#line 527 "rl78-parse.y"
-- { B3 (0xce, 0xfb, 0x06); }
-- break;
--
-- case 99:
--#line 532 "rl78-parse.y"
-- { B2 (0x61, 0xed); }
-- break;
--
-- case 100:
--#line 540 "rl78-parse.y"
-- { B1 (0x51); O1 ((yyvsp[(5) - (5)].exp)); }
-- break;
--
-- case 101:
--#line 542 "rl78-parse.y"
-- { B1 (0x50); F((yyvsp[(2) - (5)].regno), 5, 3); O1 ((yyvsp[(5) - (5)].exp)); }
-- break;
--
-- case 102:
--#line 545 "rl78-parse.y"
-- { if ((yyvsp[(2) - (5)].regno) != 0xfd)
-- { B2 (0xce, (yyvsp[(2) - (5)].regno)); O1 ((yyvsp[(5) - (5)].exp)); }
-- else
-- { B1 (0x41); O1 ((yyvsp[(5) - (5)].exp)); }
-- }
-- break;
--
-- case 103:
--#line 551 "rl78-parse.y"
-- {NOT_ES}
-- break;
--
-- case 104:
--#line 552 "rl78-parse.y"
-- { if (expr_is_sfr ((yyvsp[(3) - (7)].exp)))
-- { B1 (0xce); O1 ((yyvsp[(3) - (7)].exp)); O1 ((yyvsp[(6) - (7)].exp)); }
-- else if (expr_is_saddr ((yyvsp[(3) - (7)].exp)))
-- { B1 (0xcd); O1 ((yyvsp[(3) - (7)].exp)); O1 ((yyvsp[(6) - (7)].exp)); }
-- else
-- NOT_SFR_OR_SADDR;
-- }
-- break;
--
-- case 105:
--#line 561 "rl78-parse.y"
-- { B1 (0xcf); O2 ((yyvsp[(3) - (6)].exp)); O1 ((yyvsp[(6) - (6)].exp)); rl78_linkrelax_addr16 (); }
-- break;
--
-- case 106:
--#line 564 "rl78-parse.y"
-- { B2 (0x11, 0xcf); O2 ((yyvsp[(5) - (8)].exp)); O1 ((yyvsp[(8) - (8)].exp)); }
-- break;
--
-- case 107:
--#line 567 "rl78-parse.y"
-- { B1 (0x70); F ((yyvsp[(2) - (4)].regno), 5, 3); }
-- break;
--
-- case 108:
--#line 570 "rl78-parse.y"
-- { B1 (0x60); F ((yyvsp[(4) - (4)].regno), 5, 3); }
-- break;
--
-- case 109:
--#line 572 "rl78-parse.y"
-- {NOT_ES}
-- break;
--
-- case 110:
--#line 573 "rl78-parse.y"
-- { if (expr_is_sfr ((yyvsp[(3) - (6)].exp)))
-- { B1 (0x9e); O1 ((yyvsp[(3) - (6)].exp)); }
-- else if (expr_is_saddr ((yyvsp[(3) - (6)].exp)))
-- { B1 (0x9d); O1 ((yyvsp[(3) - (6)].exp)); }
-- else
-- NOT_SFR_OR_SADDR;
-- }
-- break;
--
-- case 111:
--#line 582 "rl78-parse.y"
-- { B1 (0x8f); O2 ((yyvsp[(6) - (6)].exp)); rl78_linkrelax_addr16 (); }
-- break;
--
-- case 112:
--#line 585 "rl78-parse.y"
-- { B1 (0x9f); O2 ((yyvsp[(3) - (5)].exp)); rl78_linkrelax_addr16 (); }
-- break;
--
-- case 113:
--#line 588 "rl78-parse.y"
-- { B2 (0x11, 0x9f); O2 ((yyvsp[(5) - (7)].exp)); }
-- break;
--
-- case 114:
--#line 591 "rl78-parse.y"
-- { B1 (0xc9|reg_xbc((yyvsp[(2) - (6)].regno))); O2 ((yyvsp[(6) - (6)].exp)); rl78_linkrelax_addr16 (); }
-- break;
--
-- case 115:
--#line 593 "rl78-parse.y"
-- {NOT_ES}
-- break;
--
-- case 116:
--#line 594 "rl78-parse.y"
-- { if (expr_is_saddr ((yyvsp[(5) - (6)].exp)))
-- { B1 (0x8d); O1 ((yyvsp[(5) - (6)].exp)); }
-- else if (expr_is_sfr ((yyvsp[(5) - (6)].exp)))
-- { B1 (0x8e); O1 ((yyvsp[(5) - (6)].exp)); }
-- else
-- NOT_SFR_OR_SADDR;
-- }
-- break;
--
-- case 117:
--#line 602 "rl78-parse.y"
-- {SA((yyvsp[(5) - (5)].exp))}
-- break;
--
-- case 118:
--#line 602 "rl78-parse.y"
-- {NOT_ES}
-- break;
--
-- case 119:
--#line 603 "rl78-parse.y"
-- { B1 (0xc8|reg_xbc((yyvsp[(2) - (7)].regno))); O1 ((yyvsp[(5) - (7)].exp)); }
-- break;
--
-- case 120:
--#line 606 "rl78-parse.y"
-- { B2 (0x8e, (yyvsp[(4) - (4)].regno)); }
-- break;
--
-- case 121:
--#line 609 "rl78-parse.y"
-- { if ((yyvsp[(4) - (4)].regno) != 1)
-- rl78_error ("Only A allowed here");
-- else
-- { B2 (0x9e, (yyvsp[(2) - (4)].regno)); }
-- }
-- break;
--
-- case 122:
--#line 615 "rl78-parse.y"
-- {SA((yyvsp[(5) - (5)].exp))}
-- break;
--
-- case 123:
--#line 615 "rl78-parse.y"
-- {NOT_ES}
-- break;
--
-- case 124:
--#line 616 "rl78-parse.y"
-- { if ((yyvsp[(2) - (7)].regno) != 0xfd)
-- rl78_error ("Only ES allowed here");
-- else
-- { B2 (0x61, 0xb8); O1 ((yyvsp[(5) - (7)].exp)); }
-- }
-- break;
--
-- case 125:
--#line 623 "rl78-parse.y"
-- { B1 (0x89); }
-- break;
--
-- case 126:
--#line 626 "rl78-parse.y"
-- { B1 (0x99); }
-- break;
--
-- case 127:
--#line 629 "rl78-parse.y"
-- { B1 (0xca); O1 ((yyvsp[(6) - (10)].exp)); O1 ((yyvsp[(10) - (10)].exp)); }
-- break;
--
-- case 128:
--#line 632 "rl78-parse.y"
-- { B1 (0x8a); O1 ((yyvsp[(8) - (9)].exp)); }
-- break;
--
-- case 129:
--#line 635 "rl78-parse.y"
-- { B1 (0x9a); O1 ((yyvsp[(6) - (9)].exp)); }
-- break;
--
-- case 130:
--#line 638 "rl78-parse.y"
-- { B1 (0x8b); }
-- break;
--
-- case 131:
--#line 641 "rl78-parse.y"
-- { B1 (0x9b); }
-- break;
--
-- case 132:
--#line 644 "rl78-parse.y"
-- { B1 (0xcc); O1 ((yyvsp[(6) - (10)].exp)); O1 ((yyvsp[(10) - (10)].exp)); }
-- break;
--
-- case 133:
--#line 647 "rl78-parse.y"
-- { B1 (0x8c); O1 ((yyvsp[(8) - (9)].exp)); }
-- break;
--
-- case 134:
--#line 650 "rl78-parse.y"
-- { B1 (0x9c); O1 ((yyvsp[(6) - (9)].exp)); }
-- break;
--
-- case 135:
--#line 653 "rl78-parse.y"
-- { B2 (0x61, 0xc9); }
-- break;
--
-- case 136:
--#line 656 "rl78-parse.y"
-- { B2 (0x61, 0xd9); }
-- break;
--
-- case 137:
--#line 659 "rl78-parse.y"
-- { B2 (0x61, 0xe9); }
-- break;
--
-- case 138:
--#line 662 "rl78-parse.y"
-- { B2 (0x61, 0xf9); }
-- break;
--
-- case 139:
--#line 665 "rl78-parse.y"
-- { B1 (0x19); O2 ((yyvsp[(3) - (9)].exp)); O1 ((yyvsp[(9) - (9)].exp)); }
-- break;
--
-- case 140:
--#line 668 "rl78-parse.y"
-- { B1 (0x09); O2 ((yyvsp[(5) - (8)].exp)); }
-- break;
--
-- case 141:
--#line 671 "rl78-parse.y"
-- { B1 (0x18); O2 ((yyvsp[(3) - (8)].exp)); }
-- break;
--
-- case 142:
--#line 674 "rl78-parse.y"
-- { B1 (0x38); O2 ((yyvsp[(3) - (9)].exp)); O1 ((yyvsp[(9) - (9)].exp)); }
-- break;
--
-- case 143:
--#line 677 "rl78-parse.y"
-- { B1 (0x29); O2 ((yyvsp[(5) - (8)].exp)); }
-- break;
--
-- case 144:
--#line 680 "rl78-parse.y"
-- { B1 (0x28); O2 ((yyvsp[(3) - (8)].exp)); }
-- break;
--
-- case 145:
--#line 683 "rl78-parse.y"
-- { B1 (0x39); O2 ((yyvsp[(3) - (9)].exp)); O1 ((yyvsp[(9) - (9)].exp)); }
-- break;
--
-- case 146:
--#line 686 "rl78-parse.y"
-- { B3 (0x39, 0, 0); O1 ((yyvsp[(8) - (8)].exp)); }
-- break;
--
-- case 147:
--#line 689 "rl78-parse.y"
-- { B1 (0x49); O2 ((yyvsp[(5) - (8)].exp)); }
-- break;
--
-- case 148:
--#line 692 "rl78-parse.y"
-- { B3 (0x49, 0, 0); }
-- break;
--
-- case 149:
--#line 695 "rl78-parse.y"
-- { B1 (0x48); O2 ((yyvsp[(3) - (8)].exp)); }
-- break;
--
-- case 150:
--#line 698 "rl78-parse.y"
-- { B3 (0x48, 0, 0); }
-- break;
--
-- case 151:
--#line 700 "rl78-parse.y"
-- {NOT_ES}
-- break;
--
-- case 152:
--#line 701 "rl78-parse.y"
-- { B1 (0xc8); O1 ((yyvsp[(6) - (11)].exp)); O1 ((yyvsp[(10) - (11)].exp)); }
-- break;
--
-- case 153:
--#line 703 "rl78-parse.y"
-- {NOT_ES}
-- break;
--
-- case 154:
--#line 704 "rl78-parse.y"
-- { B2 (0xc8, 0); O1 ((yyvsp[(8) - (9)].exp)); }
-- break;
--
-- case 155:
--#line 706 "rl78-parse.y"
-- {NOT_ES}
-- break;
--
-- case 156:
--#line 707 "rl78-parse.y"
-- { B1 (0x88); O1 ((yyvsp[(8) - (10)].exp)); }
-- break;
--
-- case 157:
--#line 709 "rl78-parse.y"
-- {NOT_ES}
-- break;
--
-- case 158:
--#line 710 "rl78-parse.y"
-- { B2 (0x88, 0); }
-- break;
--
-- case 159:
--#line 712 "rl78-parse.y"
-- {NOT_ES}
-- break;
--
-- case 160:
--#line 713 "rl78-parse.y"
-- { B1 (0x98); O1 ((yyvsp[(6) - (10)].exp)); }
-- break;
--
-- case 161:
--#line 715 "rl78-parse.y"
-- {NOT_ES}
-- break;
--
-- case 162:
--#line 716 "rl78-parse.y"
-- { B2 (0x98, 0); }
-- break;
--
-- case 163:
--#line 721 "rl78-parse.y"
-- { if (expr_is_saddr ((yyvsp[(4) - (6)].exp)))
-- { B2 (0x71, 0x04); FE ((yyvsp[(6) - (6)].exp), 9, 3); O1 ((yyvsp[(4) - (6)].exp)); }
-- else if (expr_is_sfr ((yyvsp[(4) - (6)].exp)))
-- { B2 (0x71, 0x0c); FE ((yyvsp[(6) - (6)].exp), 9, 3); O1 ((yyvsp[(4) - (6)].exp)); }
-- else
-- NOT_SFR_OR_SADDR;
-- }
-- break;
--
-- case 164:
--#line 730 "rl78-parse.y"
-- { B2 (0x71, 0x8c); FE ((yyvsp[(6) - (6)].exp), 9, 3); }
-- break;
--
-- case 165:
--#line 733 "rl78-parse.y"
-- { B3 (0x71, 0x0c, (yyvsp[(4) - (6)].regno)); FE ((yyvsp[(6) - (6)].exp), 9, 3); }
-- break;
--
-- case 166:
--#line 736 "rl78-parse.y"
-- { B2 (0x71, 0x84); FE ((yyvsp[(9) - (9)].exp), 9, 3); }
-- break;
--
-- case 167:
--#line 739 "rl78-parse.y"
-- { if (expr_is_saddr ((yyvsp[(2) - (6)].exp)))
-- { B2 (0x71, 0x01); FE ((yyvsp[(4) - (6)].exp), 9, 3); O1 ((yyvsp[(2) - (6)].exp)); }
-- else if (expr_is_sfr ((yyvsp[(2) - (6)].exp)))
-- { B2 (0x71, 0x09); FE ((yyvsp[(4) - (6)].exp), 9, 3); O1 ((yyvsp[(2) - (6)].exp)); }
-- else
-- NOT_SFR_OR_SADDR;
-- }
-- break;
--
-- case 168:
--#line 748 "rl78-parse.y"
-- { B2 (0x71, 0x89); FE ((yyvsp[(4) - (6)].exp), 9, 3); }
-- break;
--
-- case 169:
--#line 751 "rl78-parse.y"
-- { B3 (0x71, 0x09, (yyvsp[(2) - (6)].regno)); FE ((yyvsp[(4) - (6)].exp), 9, 3); }
-- break;
--
-- case 170:
--#line 754 "rl78-parse.y"
-- { B2 (0x71, 0x81); FE ((yyvsp[(7) - (9)].exp), 9, 3); }
-- break;
--
-- case 171:
--#line 759 "rl78-parse.y"
-- { B2 (0x61, 0xce); O1 ((yyvsp[(6) - (9)].exp)); }
-- break;
--
-- case 172:
--#line 764 "rl78-parse.y"
-- { B1 (0x30); O2 ((yyvsp[(5) - (5)].exp)); }
-- break;
--
-- case 173:
--#line 767 "rl78-parse.y"
-- { B1 (0x30); F ((yyvsp[(2) - (5)].regno), 5, 2); O2 ((yyvsp[(5) - (5)].exp)); }
-- break;
--
-- case 174:
--#line 769 "rl78-parse.y"
-- {NOT_ES}
-- break;
--
-- case 175:
--#line 770 "rl78-parse.y"
-- { if (expr_is_saddr ((yyvsp[(3) - (7)].exp)))
-- { B1 (0xc9); O1 ((yyvsp[(3) - (7)].exp)); O2 ((yyvsp[(6) - (7)].exp)); }
-- else if (expr_is_sfr ((yyvsp[(3) - (7)].exp)))
-- { B1 (0xcb); O1 ((yyvsp[(3) - (7)].exp)); O2 ((yyvsp[(6) - (7)].exp)); }
-- else
-- NOT_SFR_OR_SADDR;
-- }
-- break;
--
-- case 176:
--#line 778 "rl78-parse.y"
-- {NOT_ES}
-- break;
--
-- case 177:
--#line 779 "rl78-parse.y"
-- { if (expr_is_saddr ((yyvsp[(5) - (6)].exp)))
-- { B1 (0xad); O1 ((yyvsp[(5) - (6)].exp)); WA((yyvsp[(5) - (6)].exp)); }
-- else if (expr_is_sfr ((yyvsp[(5) - (6)].exp)))
-- { B1 (0xae); O1 ((yyvsp[(5) - (6)].exp)); WA((yyvsp[(5) - (6)].exp)); }
-- else
-- NOT_SFR_OR_SADDR;
-- }
-- break;
--
-- case 178:
--#line 787 "rl78-parse.y"
-- {NOT_ES}
-- break;
--
-- case 179:
--#line 788 "rl78-parse.y"
-- { if (expr_is_saddr ((yyvsp[(3) - (6)].exp)))
-- { B1 (0xbd); O1 ((yyvsp[(3) - (6)].exp)); WA((yyvsp[(3) - (6)].exp)); }
-- else if (expr_is_sfr ((yyvsp[(3) - (6)].exp)))
-- { B1 (0xbe); O1 ((yyvsp[(3) - (6)].exp)); WA((yyvsp[(3) - (6)].exp)); }
-- else
-- NOT_SFR_OR_SADDR;
-- }
-- break;
--
-- case 180:
--#line 797 "rl78-parse.y"
-- { B1 (0x11); F ((yyvsp[(4) - (4)].regno), 5, 2); }
-- break;
--
-- case 181:
--#line 800 "rl78-parse.y"
-- { B1 (0x10); F ((yyvsp[(2) - (4)].regno), 5, 2); }
-- break;
--
-- case 182:
--#line 803 "rl78-parse.y"
-- { B1 (0xaf); O2 ((yyvsp[(6) - (6)].exp)); WA((yyvsp[(6) - (6)].exp)); rl78_linkrelax_addr16 (); }
-- break;
--
-- case 183:
--#line 806 "rl78-parse.y"
-- { B1 (0xbf); O2 ((yyvsp[(4) - (6)].exp)); WA((yyvsp[(4) - (6)].exp)); rl78_linkrelax_addr16 (); }
-- break;
--
-- case 184:
--#line 809 "rl78-parse.y"
-- { B1 (0xa9); }
-- break;
--
-- case 185:
--#line 812 "rl78-parse.y"
-- { B1 (0xb9); }
-- break;
--
-- case 186:
--#line 815 "rl78-parse.y"
-- { B1 (0xaa); O1 ((yyvsp[(8) - (9)].exp)); }
-- break;
--
-- case 187:
--#line 818 "rl78-parse.y"
-- { B1 (0xba); O1 ((yyvsp[(6) - (9)].exp)); }
-- break;
--
-- case 188:
--#line 821 "rl78-parse.y"
-- { B1 (0xab); }
-- break;
--
-- case 189:
--#line 824 "rl78-parse.y"
-- { B1 (0xbb); }
-- break;
--
-- case 190:
--#line 827 "rl78-parse.y"
-- { B1 (0xac); O1 ((yyvsp[(8) - (9)].exp)); }
-- break;
--
-- case 191:
--#line 830 "rl78-parse.y"
-- { B1 (0xbc); O1 ((yyvsp[(6) - (9)].exp)); }
-- break;
--
-- case 192:
--#line 833 "rl78-parse.y"
-- { B1 (0x59); O2 ((yyvsp[(5) - (8)].exp)); }
-- break;
--
-- case 193:
--#line 836 "rl78-parse.y"
-- { B1 (0x58); O2 ((yyvsp[(3) - (8)].exp)); }
-- break;
--
-- case 194:
--#line 839 "rl78-parse.y"
-- { B1 (0x69); O2 ((yyvsp[(5) - (8)].exp)); }
-- break;
--
-- case 195:
--#line 842 "rl78-parse.y"
-- { B1 (0x68); O2 ((yyvsp[(3) - (8)].exp)); }
-- break;
--
-- case 196:
--#line 845 "rl78-parse.y"
-- { B1 (0x79); O2 ((yyvsp[(5) - (8)].exp)); }
-- break;
--
-- case 197:
--#line 848 "rl78-parse.y"
-- { B3 (0x79, 0, 0); }
-- break;
--
-- case 198:
--#line 851 "rl78-parse.y"
-- { B1 (0x78); O2 ((yyvsp[(3) - (8)].exp)); }
-- break;
--
-- case 199:
--#line 854 "rl78-parse.y"
-- { B3 (0x78, 0, 0); }
-- break;
--
-- case 200:
--#line 856 "rl78-parse.y"
-- {NOT_ES}
-- break;
--
-- case 201:
--#line 857 "rl78-parse.y"
-- { B1 (0xa8); O1 ((yyvsp[(8) - (10)].exp)); WA((yyvsp[(8) - (10)].exp));}
-- break;
--
-- case 202:
--#line 859 "rl78-parse.y"
-- {NOT_ES}
-- break;
--
-- case 203:
--#line 860 "rl78-parse.y"
-- { B2 (0xa8, 0); }
-- break;
--
-- case 204:
--#line 862 "rl78-parse.y"
-- {NOT_ES}
-- break;
--
-- case 205:
--#line 863 "rl78-parse.y"
-- { B1 (0xb8); O1 ((yyvsp[(6) - (10)].exp)); WA((yyvsp[(6) - (10)].exp)); }
-- break;
--
-- case 206:
--#line 865 "rl78-parse.y"
-- {NOT_ES}
-- break;
--
-- case 207:
--#line 866 "rl78-parse.y"
-- { B2 (0xb8, 0); }
-- break;
--
-- case 208:
--#line 868 "rl78-parse.y"
-- {SA((yyvsp[(4) - (4)].exp))}
-- break;
--
-- case 209:
--#line 869 "rl78-parse.y"
-- { B1 (0xca); F ((yyvsp[(2) - (5)].regno), 2, 2); O1 ((yyvsp[(4) - (5)].exp)); WA((yyvsp[(4) - (5)].exp)); }
-- break;
--
-- case 210:
--#line 872 "rl78-parse.y"
-- { B1 (0xcb); F ((yyvsp[(2) - (6)].regno), 2, 2); O2 ((yyvsp[(6) - (6)].exp)); WA((yyvsp[(6) - (6)].exp)); rl78_linkrelax_addr16 (); }
-- break;
--
-- case 211:
--#line 875 "rl78-parse.y"
-- { B2 (0xcb, 0xf8); O2 ((yyvsp[(5) - (5)].exp)); }
-- break;
--
-- case 212:
--#line 878 "rl78-parse.y"
-- { B2 (0xbe, 0xf8); }
-- break;
--
-- case 213:
--#line 881 "rl78-parse.y"
-- { B2 (0xae, 0xf8); }
-- break;
--
-- case 214:
--#line 884 "rl78-parse.y"
-- { B3 (0xcb, 0xf8, 0xff); F ((yyvsp[(2) - (4)].regno), 2, 2); }
-- break;
--
-- case 215:
--#line 889 "rl78-parse.y"
-- { B1 (0x00); }
-- break;
--
-- case 216:
--#line 894 "rl78-parse.y"
-- { B2 (0x71, 0xc0); }
-- break;
--
-- case 217:
--#line 899 "rl78-parse.y"
-- { B1 (0xc0); F ((yyvsp[(2) - (2)].regno), 5, 2); }
-- break;
--
-- case 218:
--#line 902 "rl78-parse.y"
-- { B2 (0x61, 0xcd); }
-- break;
--
-- case 219:
--#line 905 "rl78-parse.y"
-- { B1 (0xc1); F ((yyvsp[(2) - (2)].regno), 5, 2); }
-- break;
--
-- case 220:
--#line 908 "rl78-parse.y"
-- { B2 (0x61, 0xdd); }
-- break;
--
-- case 221:
--#line 913 "rl78-parse.y"
-- { B1 (0xd7); }
-- break;
--
-- case 222:
--#line 916 "rl78-parse.y"
-- { B2 (0x61, 0xfc); }
-- break;
--
-- case 223:
--#line 919 "rl78-parse.y"
-- { B2 (0x61, 0xec); }
-- break;
--
-- case 224:
--#line 924 "rl78-parse.y"
-- { if (check_expr_is_const ((yyvsp[(4) - (4)].exp), 1, 1))
-- { B2 (0x61, 0xeb); }
-- }
-- break;
--
-- case 225:
--#line 929 "rl78-parse.y"
-- { if (check_expr_is_const ((yyvsp[(4) - (4)].exp), 1, 1))
-- { B2 (0x61, 0xdc); }
-- }
-- break;
--
-- case 226:
--#line 934 "rl78-parse.y"
-- { if (check_expr_is_const ((yyvsp[(4) - (4)].exp), 1, 1))
-- { B2 (0x61, 0xee); }
-- }
-- break;
--
-- case 227:
--#line 939 "rl78-parse.y"
-- { if (check_expr_is_const ((yyvsp[(4) - (4)].exp), 1, 1))
-- { B2 (0x61, 0xfe); }
-- }
-- break;
--
-- case 228:
--#line 944 "rl78-parse.y"
-- { if (check_expr_is_const ((yyvsp[(4) - (4)].exp), 1, 1))
-- { B2 (0x61, 0xdb); }
-- }
-- break;
--
-- case 229:
--#line 949 "rl78-parse.y"
-- { if (check_expr_is_const ((yyvsp[(4) - (4)].exp), 1, 1))
-- { B2 (0x61, 0xfb);}
-- }
-- break;
--
-- case 230:
--#line 956 "rl78-parse.y"
-- { if (check_expr_is_const ((yyvsp[(4) - (4)].exp), 1, 7))
-- { B2 (0x31, 0x0b); FE ((yyvsp[(4) - (4)].exp), 9, 3); }
-- }
-- break;
--
-- case 231:
--#line 961 "rl78-parse.y"
-- { if (check_expr_is_const ((yyvsp[(4) - (4)].exp), 1, 15))
-- { B2 (0x31, 0x0f); FE ((yyvsp[(4) - (4)].exp), 8, 4); }
-- }
-- break;
--
-- case 232:
--#line 968 "rl78-parse.y"
-- { B2 (0x61, 0xcf); }
-- break;
--
-- case 233:
--#line 971 "rl78-parse.y"
-- { B2 (0x61, 0xdf); }
-- break;
--
-- case 234:
--#line 974 "rl78-parse.y"
-- { B2 (0x61, 0xef); }
-- break;
--
-- case 235:
--#line 977 "rl78-parse.y"
-- { B2 (0x61, 0xff); }
-- break;
--
-- case 236:
--#line 982 "rl78-parse.y"
-- { if (check_expr_is_const ((yyvsp[(4) - (4)].exp), 1, 7))
-- { B2 (0x31, 0x09); FE ((yyvsp[(4) - (4)].exp), 9, 3); }
-- }
-- break;
--
-- case 237:
--#line 987 "rl78-parse.y"
-- { if (check_expr_is_const ((yyvsp[(4) - (4)].exp), 1, 7))
-- { B2 (0x31, 0x08); FE ((yyvsp[(4) - (4)].exp), 9, 3); }
-- }
-- break;
--
-- case 238:
--#line 992 "rl78-parse.y"
-- { if (check_expr_is_const ((yyvsp[(4) - (4)].exp), 1, 7))
-- { B2 (0x31, 0x07); FE ((yyvsp[(4) - (4)].exp), 9, 3); }
-- }
-- break;
--
-- case 239:
--#line 997 "rl78-parse.y"
-- { if (check_expr_is_const ((yyvsp[(4) - (4)].exp), 1, 15))
-- { B2 (0x31, 0x0d); FE ((yyvsp[(4) - (4)].exp), 8, 4); }
-- }
-- break;
--
-- case 240:
--#line 1002 "rl78-parse.y"
-- { if (check_expr_is_const ((yyvsp[(4) - (4)].exp), 1, 15))
-- { B2 (0x31, 0x0c); FE ((yyvsp[(4) - (4)].exp), 8, 4); }
-- }
-- break;
--
-- case 241:
--#line 1009 "rl78-parse.y"
-- { if (check_expr_is_const ((yyvsp[(4) - (4)].exp), 1, 7))
-- { B2 (0x31, 0x0a); FE ((yyvsp[(4) - (4)].exp), 9, 3); }
-- }
-- break;
--
-- case 242:
--#line 1014 "rl78-parse.y"
-- { if (check_expr_is_const ((yyvsp[(4) - (4)].exp), 1, 15))
-- { B2 (0x31, 0x0e); FE ((yyvsp[(4) - (4)].exp), 8, 4); }
-- }
-- break;
--
-- case 243:
--#line 1021 "rl78-parse.y"
-- { B2 (0x61, 0xc8); rl78_linkrelax_branch (); }
-- break;
--
-- case 244:
--#line 1024 "rl78-parse.y"
-- { B2 (0x61, 0xe3); rl78_linkrelax_branch (); }
-- break;
--
-- case 245:
--#line 1027 "rl78-parse.y"
-- { B2 (0x61, 0xd8); rl78_linkrelax_branch (); }
-- break;
--
-- case 246:
--#line 1030 "rl78-parse.y"
-- { B2 (0x61, 0xf3); rl78_linkrelax_branch (); }
-- break;
--
-- case 247:
--#line 1033 "rl78-parse.y"
-- { B2 (0x61, 0xf8); rl78_linkrelax_branch (); }
-- break;
--
-- case 248:
--#line 1036 "rl78-parse.y"
-- { B2 (0x61, 0xe8); rl78_linkrelax_branch (); }
-- break;
--
-- case 249:
--#line 1041 "rl78-parse.y"
-- { B2 (0x61, 0xfd); }
-- break;
--
-- case 250:
--#line 1046 "rl78-parse.y"
-- { if ((yyvsp[(4) - (4)].regno) == 0) /* X */
-- { B1 (0x08); }
-- else
-- { B2 (0x61, 0x88); F ((yyvsp[(4) - (4)].regno), 13, 3); }
-- }
-- break;
--
-- case 251:
--#line 1053 "rl78-parse.y"
-- { B2 (0x61, 0xaa); O2 ((yyvsp[(6) - (6)].exp)); rl78_linkrelax_addr16 (); }
-- break;
--
-- case 252:
--#line 1056 "rl78-parse.y"
-- { B2 (0x61, 0xae); }
-- break;
--
-- case 253:
--#line 1059 "rl78-parse.y"
-- { B2 (0x61, 0xaf); O1 ((yyvsp[(8) - (9)].exp)); }
-- break;
--
-- case 254:
--#line 1062 "rl78-parse.y"
-- { B2 (0x61, 0xac); }
-- break;
--
-- case 255:
--#line 1065 "rl78-parse.y"
-- { B2 (0x61, 0xad); O1 ((yyvsp[(8) - (9)].exp)); }
-- break;
--
-- case 256:
--#line 1068 "rl78-parse.y"
-- { B2 (0x61, 0xb9); }
-- break;
--
-- case 257:
--#line 1071 "rl78-parse.y"
-- { B2 (0x61, 0xa9); }
-- break;
--
-- case 258:
--#line 1074 "rl78-parse.y"
-- { if (expr_is_sfr ((yyvsp[(4) - (4)].exp)))
-- { B2 (0x61, 0xab); O1 ((yyvsp[(4) - (4)].exp)); }
-- else if (expr_is_saddr ((yyvsp[(4) - (4)].exp)))
-- { B2 (0x61, 0xa8); O1 ((yyvsp[(4) - (4)].exp)); }
-- else
-- NOT_SFR_OR_SADDR;
-- }
-- break;
--
-- case 259:
--#line 1085 "rl78-parse.y"
-- { B1 (0x31); F ((yyvsp[(4) - (4)].regno), 5, 2); }
-- break;
--
-- case 261:
--#line 1095 "rl78-parse.y"
-- { rl78_prefix (0x11); }
-- break;
--
-- case 262:
--#line 1098 "rl78-parse.y"
-- { (yyval.regno) = 0; }
-- break;
--
-- case 263:
--#line 1099 "rl78-parse.y"
-- { (yyval.regno) = 1; }
-- break;
--
-- case 264:
--#line 1100 "rl78-parse.y"
-- { (yyval.regno) = 2; }
-- break;
--
-- case 265:
--#line 1101 "rl78-parse.y"
-- { (yyval.regno) = 3; }
-- break;
--
-- case 266:
--#line 1102 "rl78-parse.y"
-- { (yyval.regno) = 4; }
-- break;
--
-- case 267:
--#line 1103 "rl78-parse.y"
-- { (yyval.regno) = 5; }
-- break;
--
-- case 268:
--#line 1104 "rl78-parse.y"
-- { (yyval.regno) = 6; }
-- break;
--
-- case 269:
--#line 1105 "rl78-parse.y"
-- { (yyval.regno) = 7; }
-- break;
--
-- case 270:
--#line 1108 "rl78-parse.y"
-- { (yyval.regno) = 0; }
-- break;
--
-- case 271:
--#line 1109 "rl78-parse.y"
-- { (yyval.regno) = 2; }
-- break;
--
-- case 272:
--#line 1110 "rl78-parse.y"
-- { (yyval.regno) = 3; }
-- break;
--
-- case 273:
--#line 1111 "rl78-parse.y"
-- { (yyval.regno) = 4; }
-- break;
--
-- case 274:
--#line 1112 "rl78-parse.y"
-- { (yyval.regno) = 5; }
-- break;
--
-- case 275:
--#line 1113 "rl78-parse.y"
-- { (yyval.regno) = 6; }
-- break;
--
-- case 276:
--#line 1114 "rl78-parse.y"
-- { (yyval.regno) = 7; }
-- break;
--
-- case 277:
--#line 1117 "rl78-parse.y"
-- { (yyval.regno) = 0; }
-- break;
--
-- case 278:
--#line 1118 "rl78-parse.y"
-- { (yyval.regno) = 1; }
-- break;
--
-- case 279:
--#line 1119 "rl78-parse.y"
-- { (yyval.regno) = 2; }
-- break;
--
-- case 280:
--#line 1120 "rl78-parse.y"
-- { (yyval.regno) = 3; }
-- break;
--
-- case 281:
--#line 1123 "rl78-parse.y"
-- { (yyval.regno) = 1; }
-- break;
--
-- case 282:
--#line 1124 "rl78-parse.y"
-- { (yyval.regno) = 2; }
-- break;
--
-- case 283:
--#line 1125 "rl78-parse.y"
-- { (yyval.regno) = 3; }
-- break;
--
-- case 284:
--#line 1128 "rl78-parse.y"
-- { (yyval.regno) = 0xf8; }
-- break;
--
-- case 285:
--#line 1129 "rl78-parse.y"
-- { (yyval.regno) = 0xf9; }
-- break;
--
-- case 286:
--#line 1130 "rl78-parse.y"
-- { (yyval.regno) = 0xfa; }
-- break;
--
-- case 287:
--#line 1131 "rl78-parse.y"
-- { (yyval.regno) = 0xfc; }
-- break;
--
-- case 288:
--#line 1132 "rl78-parse.y"
-- { (yyval.regno) = 0xfd; }
-- break;
--
-- case 289:
--#line 1133 "rl78-parse.y"
-- { (yyval.regno) = 0xfe; }
-- break;
--
-- case 290:
--#line 1134 "rl78-parse.y"
-- { (yyval.regno) = 0xff; }
-- break;
--
-- case 291:
--#line 1140 "rl78-parse.y"
-- { (yyval.regno) = 0x00; }
-- break;
--
-- case 292:
--#line 1141 "rl78-parse.y"
-- { (yyval.regno) = 0x10; }
-- break;
--
-- case 293:
--#line 1142 "rl78-parse.y"
-- { (yyval.regno) = 0x20; }
-- break;
--
-- case 294:
--#line 1143 "rl78-parse.y"
-- { (yyval.regno) = 0x30; }
-- break;
--
-- case 295:
--#line 1144 "rl78-parse.y"
-- { (yyval.regno) = 0x40; }
-- break;
--
-- case 296:
--#line 1145 "rl78-parse.y"
-- { (yyval.regno) = 0x50; }
-- break;
--
-- case 297:
--#line 1146 "rl78-parse.y"
-- { (yyval.regno) = 0x60; }
-- break;
--
-- case 298:
--#line 1147 "rl78-parse.y"
-- { (yyval.regno) = 0x70; }
-- break;
--
-- case 299:
--#line 1150 "rl78-parse.y"
-- { (yyval.regno) = 0x00; }
-- break;
--
-- case 300:
--#line 1151 "rl78-parse.y"
-- { (yyval.regno) = 0x20; }
-- break;
--
-- case 301:
--#line 1152 "rl78-parse.y"
-- { (yyval.regno) = 0x40; }
-- break;
--
-- case 302:
--#line 1155 "rl78-parse.y"
-- { (yyval.regno) = 0x05; rl78_bit_insn = 1; }
-- break;
--
-- case 303:
--#line 1156 "rl78-parse.y"
-- { (yyval.regno) = 0x06; rl78_bit_insn = 1;}
-- break;
--
-- case 304:
--#line 1157 "rl78-parse.y"
-- { (yyval.regno) = 0x07; rl78_bit_insn = 1; }
-- break;
--
-- case 305:
--#line 1160 "rl78-parse.y"
-- { (yyval.regno) = 0x02; rl78_bit_insn = 1;}
-- break;
--
-- case 306:
--#line 1161 "rl78-parse.y"
-- { (yyval.regno) = 0x04; rl78_bit_insn = 1; }
-- break;
--
-- case 307:
--#line 1162 "rl78-parse.y"
-- { (yyval.regno) = 0x00; rl78_bit_insn = 1; }
-- break;
--
-- case 308:
--#line 1165 "rl78-parse.y"
-- { (yyval.regno) = 0; rl78_bit_insn = 1; }
-- break;
--
-- case 309:
--#line 1166 "rl78-parse.y"
-- { (yyval.regno) = 1; rl78_bit_insn = 1; }
-- break;
--
-- case 310:
--#line 1169 "rl78-parse.y"
-- { (yyval.regno) = 0x00; }
-- break;
--
-- case 311:
--#line 1170 "rl78-parse.y"
-- { (yyval.regno) = 0x10; }
-- break;
--
-- case 312:
--#line 1173 "rl78-parse.y"
-- { (yyval.regno) = 0x00; }
-- break;
--
-- case 313:
--#line 1174 "rl78-parse.y"
-- { (yyval.regno) = 0x10; }
-- break;
--
-- case 314:
--#line 1177 "rl78-parse.y"
-- { (yyval.regno) = 0x00; }
-- break;
--
-- case 315:
--#line 1178 "rl78-parse.y"
-- { (yyval.regno) = 0x10; }
-- break;
--
-- case 316:
--#line 1181 "rl78-parse.y"
-- { (yyval.regno) = 0x00; }
-- break;
--
-- case 317:
--#line 1182 "rl78-parse.y"
-- { (yyval.regno) = 0x10; }
-- break;
--
-- case 318:
--#line 1185 "rl78-parse.y"
-- { rl78_bit_insn = 1; }
-- break;
--
--
--/* Line 1267 of yacc.c. */
--#line 4091 "rl78-parse.c"
-- default: break;
-- }
-- YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
--
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
--
-- *++yyvsp = yyval;
--
--
-- /* Now `shift' the result of the reduction. Determine what state
-- that goes to, based on the state we popped back to and the rule
-- number reduced by. */
--
-- yyn = yyr1[yyn];
--
-- yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
-- if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
-- yystate = yytable[yystate];
-- else
-- yystate = yydefgoto[yyn - YYNTOKENS];
--
-- goto yynewstate;
--
--
--/*------------------------------------.
--| yyerrlab -- here on detecting error |
--`------------------------------------*/
--yyerrlab:
-- /* If not already recovering from an error, report this error. */
-- if (!yyerrstatus)
-- {
-- ++yynerrs;
--#if ! YYERROR_VERBOSE
-- yyerror (YY_("syntax error"));
--#else
-- {
-- YYSIZE_T yysize = yysyntax_error (0, yystate, yychar);
-- if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM)
-- {
-- YYSIZE_T yyalloc = 2 * yysize;
-- if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM))
-- yyalloc = YYSTACK_ALLOC_MAXIMUM;
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
-- yymsg = (char *) YYSTACK_ALLOC (yyalloc);
-- if (yymsg)
-- yymsg_alloc = yyalloc;
-- else
-- {
-- yymsg = yymsgbuf;
-- yymsg_alloc = sizeof yymsgbuf;
-- }
-- }
--
-- if (0 < yysize && yysize <= yymsg_alloc)
-- {
-- (void) yysyntax_error (yymsg, yystate, yychar);
-- yyerror (yymsg);
-- }
-- else
-- {
-- yyerror (YY_("syntax error"));
-- if (yysize != 0)
-- goto yyexhaustedlab;
-- }
-- }
--#endif
-- }
--
--
--
-- if (yyerrstatus == 3)
-- {
-- /* If just tried and failed to reuse look-ahead token after an
-- error, discard it. */
--
-- if (yychar <= YYEOF)
-- {
-- /* Return failure if at end of input. */
-- if (yychar == YYEOF)
-- YYABORT;
-- }
-- else
-- {
-- yydestruct ("Error: discarding",
-- yytoken, &yylval);
-- yychar = YYEMPTY;
-- }
-- }
--
-- /* Else will try to reuse look-ahead token after shifting the error
-- token. */
-- goto yyerrlab1;
--
--
--/*---------------------------------------------------.
--| yyerrorlab -- error raised explicitly by YYERROR. |
--`---------------------------------------------------*/
--yyerrorlab:
--
-- /* Pacify compilers like GCC when the user code never invokes
-- YYERROR and the label yyerrorlab therefore never appears in user
-- code. */
-- if (/*CONSTCOND*/ 0)
-- goto yyerrorlab;
--
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYERROR. */
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
-- yystate = *yyssp;
-- goto yyerrlab1;
--
--
--/*-------------------------------------------------------------.
--| yyerrlab1 -- common code for both syntax error and YYERROR. |
--`-------------------------------------------------------------*/
--yyerrlab1:
-- yyerrstatus = 3; /* Each real token shifted decrements this. */
--
-- for (;;)
-- {
-- yyn = yypact[yystate];
-- if (yyn != YYPACT_NINF)
-- {
-- yyn += YYTERROR;
-- if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
-- {
-- yyn = yytable[yyn];
-- if (0 < yyn)
-- break;
-- }
-- }
--
-- /* Pop the current state because it cannot handle the error token. */
-- if (yyssp == yyss)
-- YYABORT;
--
--
-- yydestruct ("Error: popping",
-- yystos[yystate], yyvsp);
-- YYPOPSTACK (1);
-- yystate = *yyssp;
-- YY_STACK_PRINT (yyss, yyssp);
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- *++yyvsp = yylval;
--
--
-- /* Shift the error token. */
-- YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
--
-- yystate = yyn;
-- goto yynewstate;
--
--
--/*-------------------------------------.
--| yyacceptlab -- YYACCEPT comes here. |
--`-------------------------------------*/
--yyacceptlab:
-- yyresult = 0;
-- goto yyreturn;
--
--/*-----------------------------------.
--| yyabortlab -- YYABORT comes here. |
--`-----------------------------------*/
--yyabortlab:
-- yyresult = 1;
-- goto yyreturn;
--
--#ifndef yyoverflow
--/*-------------------------------------------------.
--| yyexhaustedlab -- memory exhaustion comes here. |
--`-------------------------------------------------*/
--yyexhaustedlab:
-- yyerror (YY_("memory exhausted"));
-- yyresult = 2;
-- /* Fall through. */
--#endif
--
--yyreturn:
-- if (yychar != YYEOF && yychar != YYEMPTY)
-- yydestruct ("Cleanup: discarding lookahead",
-- yytoken, &yylval);
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYABORT or YYACCEPT. */
-- YYPOPSTACK (yylen);
-- YY_STACK_PRINT (yyss, yyssp);
-- while (yyssp != yyss)
-- {
-- yydestruct ("Cleanup: popping",
-- yystos[*yyssp], yyvsp);
-- YYPOPSTACK (1);
-- }
--#ifndef yyoverflow
-- if (yyss != yyssa)
-- YYSTACK_FREE (yyss);
--#endif
--#if YYERROR_VERBOSE
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
--#endif
-- /* Make sure YYID is used. */
-- return YYID (yyresult);
--}
--
--
--#line 1188 "rl78-parse.y"
--
--/* ====================================================================== */
--
--static struct
--{
-- const char * string;
-- int token;
-- int val;
--}
--token_table[] =
--{
-- { "r0", X, 0 },
-- { "r1", A, 1 },
-- { "r2", C, 2 },
-- { "r3", B, 3 },
-- { "r4", E, 4 },
-- { "r5", D, 5 },
-- { "r6", L, 6 },
-- { "r7", H, 7 },
-- { "x", X, 0 },
-- { "a", A, 1 },
-- { "c", C, 2 },
-- { "b", B, 3 },
-- { "e", E, 4 },
-- { "d", D, 5 },
-- { "l", L, 6 },
-- { "h", H, 7 },
--
-- { "rp0", AX, 0 },
-- { "rp1", BC, 1 },
-- { "rp2", DE, 2 },
-- { "rp3", HL, 3 },
-- { "ax", AX, 0 },
-- { "bc", BC, 1 },
-- { "de", DE, 2 },
-- { "hl", HL, 3 },
--
-- { "RB0", RB0, 0 },
-- { "RB1", RB1, 1 },
-- { "RB2", RB2, 2 },
-- { "RB3", RB3, 3 },
--
-- { "sp", SP, 0 },
-- { "cy", CY, 0 },
--
-- { "spl", SPL, 0xf8 },
-- { "sph", SPH, 0xf9 },
-- { "psw", PSW, 0xfa },
-- { "cs", CS, 0xfc },
-- { "es", ES, 0xfd },
-- { "pmc", PMC, 0xfe },
-- { "mem", MEM, 0xff },
--
-- { ".s", DOT_S, 0 },
-- { ".b", DOT_B, 0 },
-- { ".w", DOT_W, 0 },
-- { ".l", DOT_L, 0 },
-- { ".a", DOT_A , 0},
-- { ".ub", DOT_UB, 0 },
-- { ".uw", DOT_UW , 0},
--
-- { "c", FLAG, 0 },
-- { "z", FLAG, 1 },
-- { "s", FLAG, 2 },
-- { "o", FLAG, 3 },
-- { "i", FLAG, 8 },
-- { "u", FLAG, 9 },
--
--#define OPC(x) { #x, x, IS_OPCODE }
--
-- OPC(ADD),
-- OPC(ADDC),
-- OPC(ADDW),
-- { "and", AND_, IS_OPCODE },
-- OPC(AND1),
-- OPC(BC),
-- OPC(BF),
-- OPC(BH),
-- OPC(BNC),
-- OPC(BNH),
-- OPC(BNZ),
-- OPC(BR),
-- OPC(BRK),
-- OPC(BRK1),
-- OPC(BT),
-- OPC(BTCLR),
-- OPC(BZ),
-- OPC(CALL),
-- OPC(CALLT),
-- OPC(CLR1),
-- OPC(CLRB),
-- OPC(CLRW),
-- OPC(CMP),
-- OPC(CMP0),
-- OPC(CMPS),
-- OPC(CMPW),
-- OPC(DEC),
-- OPC(DECW),
-- OPC(DI),
-- OPC(DIVHU),
-- OPC(DIVWU),
-- OPC(EI),
-- OPC(HALT),
-- OPC(INC),
-- OPC(INCW),
-- OPC(MACH),
-- OPC(MACHU),
-- OPC(MOV),
-- OPC(MOV1),
-- OPC(MOVS),
-- OPC(MOVW),
-- OPC(MULH),
-- OPC(MULHU),
-- OPC(MULU),
-- OPC(NOP),
-- OPC(NOT1),
-- OPC(ONEB),
-- OPC(ONEW),
-- OPC(OR),
-- OPC(OR1),
-- OPC(POP),
-- OPC(PUSH),
-- OPC(RET),
-- OPC(RETI),
-- OPC(RETB),
-- OPC(ROL),
-- OPC(ROLC),
-- OPC(ROLWC),
-- OPC(ROR),
-- OPC(RORC),
-- OPC(SAR),
-- OPC(SARW),
-- OPC(SEL),
-- OPC(SET1),
-- OPC(SHL),
-- OPC(SHLW),
-- OPC(SHR),
-- OPC(SHRW),
-- OPC(SKC),
-- OPC(SKH),
-- OPC(SKNC),
-- OPC(SKNH),
-- OPC(SKNZ),
-- OPC(SKZ),
-- OPC(STOP),
-- OPC(SUB),
-- OPC(SUBC),
-- OPC(SUBW),
-- OPC(XCH),
-- OPC(XCHW),
-- OPC(XOR),
-- OPC(XOR1),
--};
--
--#define NUM_TOKENS (sizeof (token_table) / sizeof (token_table[0]))
--
--void
--rl78_lex_init (char * beginning, char * ending)
--{
-- rl78_init_start = beginning;
-- rl78_lex_start = beginning;
-- rl78_lex_end = ending;
-- rl78_in_brackets = 0;
-- rl78_last_token = 0;
--
-- rl78_bit_insn = 0;
--
-- setbuf (stdout, 0);
--}
--
--/* Return a pointer to the '.' in a bit index expression (like
-- foo.5), or NULL if none is found. */
--static char *
--find_bit_index (char *tok)
--{
-- char *last_dot = NULL;
-- char *last_digit = NULL;
-- while (*tok && *tok != ',')
-- {
-- if (*tok == '.')
-- {
-- last_dot = tok;
-- last_digit = NULL;
-- }
-- else if (*tok >= '0' && *tok <= '7'
-- && last_dot != NULL
-- && last_digit == NULL)
-- {
-- last_digit = tok;
-- }
-- else if (ISSPACE (*tok))
-- {
-- /* skip */
-- }
-- else
-- {
-- last_dot = NULL;
-- last_digit = NULL;
-- }
-- tok ++;
-- }
-- if (last_dot != NULL
-- && last_digit != NULL)
-- return last_dot;
-- return NULL;
--}
--
--static int
--rl78_lex (void)
--{
-- /*unsigned int ci;*/
-- char * save_input_pointer;
-- char * bit = NULL;
--
-- while (ISSPACE (*rl78_lex_start)
-- && rl78_lex_start != rl78_lex_end)
-- rl78_lex_start ++;
--
-- rl78_last_exp_start = rl78_lex_start;
--
-- if (rl78_lex_start == rl78_lex_end)
-- return 0;
--
-- if (ISALPHA (*rl78_lex_start)
-- || (*rl78_lex_start == '.' && ISALPHA (rl78_lex_start[1])))
-- {
-- unsigned int i;
-- char * e;
-- char save;
--
-- for (e = rl78_lex_start + 1;
-- e < rl78_lex_end && ISALNUM (*e);
-- e ++)
-- ;
-- save = *e;
-- *e = 0;
--
-- for (i = 0; i < NUM_TOKENS; i++)
-- if (strcasecmp (rl78_lex_start, token_table[i].string) == 0
-- && !(token_table[i].val == IS_OPCODE && rl78_last_token != 0)
-- && !(token_table[i].token == FLAG && !need_flag))
-- {
-- rl78_lval.regno = token_table[i].val;
-- *e = save;
-- rl78_lex_start = e;
-- rl78_last_token = token_table[i].token;
-- return token_table[i].token;
-- }
-- *e = save;
-- }
--
-- if (rl78_last_token == 0)
-- {
-- rl78_last_token = UNKNOWN_OPCODE;
-- return UNKNOWN_OPCODE;
-- }
--
-- if (rl78_last_token == UNKNOWN_OPCODE)
-- return 0;
--
-- if (*rl78_lex_start == '[')
-- rl78_in_brackets = 1;
-- if (*rl78_lex_start == ']')
-- rl78_in_brackets = 0;
--
-- /* '.' is funny - the syntax includes it for bitfields, but only for
-- bitfields. We check for it specially so we can allow labels
-- with '.' in them. */
--
-- if (rl78_bit_insn
-- && *rl78_lex_start == '.'
-- && find_bit_index (rl78_lex_start) == rl78_lex_start)
-- {
-- rl78_last_token = *rl78_lex_start;
-- return *rl78_lex_start ++;
-- }
--
-- if ((rl78_in_brackets && *rl78_lex_start == '+')
-- || strchr ("[],#!$:", *rl78_lex_start))
-- {
-- rl78_last_token = *rl78_lex_start;
-- return *rl78_lex_start ++;
-- }
--
-- /* Again, '.' is funny. Look for '.<digit>' at the end of the line
-- or before a comma, which is a bitfield, not an expression. */
--
-- if (rl78_bit_insn)
-- {
-- bit = find_bit_index (rl78_lex_start);
-- if (bit)
-- *bit = 0;
-- else
-- bit = NULL;
-- }
--
-- save_input_pointer = input_line_pointer;
-- input_line_pointer = rl78_lex_start;
-- rl78_lval.exp.X_md = 0;
-- expression (&rl78_lval.exp);
--
-- if (bit)
-- *bit = '.';
--
-- rl78_lex_start = input_line_pointer;
-- input_line_pointer = save_input_pointer;
-- rl78_last_token = EXPR;
-- return EXPR;
--}
--
--int
--rl78_error (const char * str)
--{
-- int len;
--
-- len = rl78_last_exp_start - rl78_init_start;
--
-- as_bad ("%s", rl78_init_start);
-- as_bad ("%*s^ %s", len, "", str);
-- return 0;
--}
--
--static int
--expr_is_sfr (expressionS exp)
--{
-- unsigned long v;
--
-- if (exp.X_op != O_constant)
-- return 0;
--
-- v = exp.X_add_number;
-- if (0xFFF00 <= v && v <= 0xFFFFF)
-- return 1;
-- return 0;
--}
--
--static int
--expr_is_saddr (expressionS exp)
--{
-- unsigned long v;
--
-- if (exp.X_op != O_constant)
-- return 0;
--
-- v = exp.X_add_number;
-- if (0xFFE20 <= v && v <= 0xFFF1F)
-- return 1;
-- return 0;
--}
--
--static int
--expr_is_word_aligned (expressionS exp)
--{
-- unsigned long v;
--
-- if (exp.X_op != O_constant)
-- return 1;
--
-- v = exp.X_add_number;
-- if (v & 1)
-- return 0;
-- return 1;
--
--}
--
--static void
--check_expr_is_bit_index (expressionS exp)
--{
-- int val;
--
-- if (exp.X_op != O_constant)
-- {
-- rl78_error (_("bit index must be a constant"));
-- return;
-- }
-- val = exp.X_add_number;
--
-- if (val < 0 || val > 7)
-- rl78_error (_("rtsd size must be 0..7"));
--}
--
--static int
--exp_val (expressionS exp)
--{
-- if (exp.X_op != O_constant)
-- {
-- rl78_error (_("constant expected"));
-- return 0;
-- }
-- return exp.X_add_number;
--}
--
--static int
--check_expr_is_const (expressionS e, int vmin, int vmax)
--{
-- static char buf[100];
-- if (e.X_op != O_constant
-- || e.X_add_number < vmin
-- || e.X_add_number > vmax)
-- {
-- if (vmin == vmax)
-- sprintf (buf, "%d expected here", vmin);
-- else
-- sprintf (buf, "%d..%d expected here", vmin, vmax);
-- rl78_error(buf);
-- return 0;
-- }
-- return 1;
--}
--
--
--
-diff -Nur binutils-2.24.orig/gas/rl78-parse.h binutils-2.24/gas/rl78-parse.h
---- binutils-2.24.orig/gas/rl78-parse.h 2013-11-18 09:49:28.000000000 +0100
-+++ binutils-2.24/gas/rl78-parse.h 1970-01-01 01:00:00.000000000 +0100
-@@ -1,299 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton interface for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- A = 258,
-- X = 259,
-- B = 260,
-- C = 261,
-- D = 262,
-- E = 263,
-- H = 264,
-- L = 265,
-- AX = 266,
-- BC = 267,
-- DE = 268,
-- HL = 269,
-- SPL = 270,
-- SPH = 271,
-- PSW = 272,
-- CS = 273,
-- ES = 274,
-- PMC = 275,
-- MEM = 276,
-- FLAG = 277,
-- SP = 278,
-- CY = 279,
-- RB0 = 280,
-- RB1 = 281,
-- RB2 = 282,
-- RB3 = 283,
-- EXPR = 284,
-- UNKNOWN_OPCODE = 285,
-- IS_OPCODE = 286,
-- DOT_S = 287,
-- DOT_B = 288,
-- DOT_W = 289,
-- DOT_L = 290,
-- DOT_A = 291,
-- DOT_UB = 292,
-- DOT_UW = 293,
-- ADD = 294,
-- ADDC = 295,
-- ADDW = 296,
-- AND_ = 297,
-- AND1 = 298,
-- BF = 299,
-- BH = 300,
-- BNC = 301,
-- BNH = 302,
-- BNZ = 303,
-- BR = 304,
-- BRK = 305,
-- BRK1 = 306,
-- BT = 307,
-- BTCLR = 308,
-- BZ = 309,
-- CALL = 310,
-- CALLT = 311,
-- CLR1 = 312,
-- CLRB = 313,
-- CLRW = 314,
-- CMP = 315,
-- CMP0 = 316,
-- CMPS = 317,
-- CMPW = 318,
-- DEC = 319,
-- DECW = 320,
-- DI = 321,
-- DIVHU = 322,
-- DIVWU = 323,
-- EI = 324,
-- HALT = 325,
-- INC = 326,
-- INCW = 327,
-- MACH = 328,
-- MACHU = 329,
-- MOV = 330,
-- MOV1 = 331,
-- MOVS = 332,
-- MOVW = 333,
-- MULH = 334,
-- MULHU = 335,
-- MULU = 336,
-- NOP = 337,
-- NOT1 = 338,
-- ONEB = 339,
-- ONEW = 340,
-- OR = 341,
-- OR1 = 342,
-- POP = 343,
-- PUSH = 344,
-- RET = 345,
-- RETI = 346,
-- RETB = 347,
-- ROL = 348,
-- ROLC = 349,
-- ROLWC = 350,
-- ROR = 351,
-- RORC = 352,
-- SAR = 353,
-- SARW = 354,
-- SEL = 355,
-- SET1 = 356,
-- SHL = 357,
-- SHLW = 358,
-- SHR = 359,
-- SHRW = 360,
-- SKC = 361,
-- SKH = 362,
-- SKNC = 363,
-- SKNH = 364,
-- SKNZ = 365,
-- SKZ = 366,
-- STOP = 367,
-- SUB = 368,
-- SUBC = 369,
-- SUBW = 370,
-- XCH = 371,
-- XCHW = 372,
-- XOR = 373,
-- XOR1 = 374
-- };
--#endif
--/* Tokens. */
--#define A 258
--#define X 259
--#define B 260
--#define C 261
--#define D 262
--#define E 263
--#define H 264
--#define L 265
--#define AX 266
--#define BC 267
--#define DE 268
--#define HL 269
--#define SPL 270
--#define SPH 271
--#define PSW 272
--#define CS 273
--#define ES 274
--#define PMC 275
--#define MEM 276
--#define FLAG 277
--#define SP 278
--#define CY 279
--#define RB0 280
--#define RB1 281
--#define RB2 282
--#define RB3 283
--#define EXPR 284
--#define UNKNOWN_OPCODE 285
--#define IS_OPCODE 286
--#define DOT_S 287
--#define DOT_B 288
--#define DOT_W 289
--#define DOT_L 290
--#define DOT_A 291
--#define DOT_UB 292
--#define DOT_UW 293
--#define ADD 294
--#define ADDC 295
--#define ADDW 296
--#define AND_ 297
--#define AND1 298
--#define BF 299
--#define BH 300
--#define BNC 301
--#define BNH 302
--#define BNZ 303
--#define BR 304
--#define BRK 305
--#define BRK1 306
--#define BT 307
--#define BTCLR 308
--#define BZ 309
--#define CALL 310
--#define CALLT 311
--#define CLR1 312
--#define CLRB 313
--#define CLRW 314
--#define CMP 315
--#define CMP0 316
--#define CMPS 317
--#define CMPW 318
--#define DEC 319
--#define DECW 320
--#define DI 321
--#define DIVHU 322
--#define DIVWU 323
--#define EI 324
--#define HALT 325
--#define INC 326
--#define INCW 327
--#define MACH 328
--#define MACHU 329
--#define MOV 330
--#define MOV1 331
--#define MOVS 332
--#define MOVW 333
--#define MULH 334
--#define MULHU 335
--#define MULU 336
--#define NOP 337
--#define NOT1 338
--#define ONEB 339
--#define ONEW 340
--#define OR 341
--#define OR1 342
--#define POP 343
--#define PUSH 344
--#define RET 345
--#define RETI 346
--#define RETB 347
--#define ROL 348
--#define ROLC 349
--#define ROLWC 350
--#define ROR 351
--#define RORC 352
--#define SAR 353
--#define SARW 354
--#define SEL 355
--#define SET1 356
--#define SHL 357
--#define SHLW 358
--#define SHR 359
--#define SHRW 360
--#define SKC 361
--#define SKH 362
--#define SKNC 363
--#define SKNH 364
--#define SKNZ 365
--#define SKZ 366
--#define STOP 367
--#define SUB 368
--#define SUBC 369
--#define SUBW 370
--#define XCH 371
--#define XCHW 372
--#define XOR 373
--#define XOR1 374
--
--
--
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 138 "rl78-parse.y"
--{
-- int regno;
-- expressionS exp;
--}
--/* Line 1529 of yacc.c. */
--#line 292 "rl78-parse.h"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--extern YYSTYPE rl78_lval;
--
-diff -Nur binutils-2.24.orig/gas/rx-parse.c binutils-2.24/gas/rx-parse.c
---- binutils-2.24.orig/gas/rx-parse.c 2013-11-18 09:49:28.000000000 +0100
-+++ binutils-2.24/gas/rx-parse.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,4241 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton implementation for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* C LALR(1) parser skeleton written by Richard Stallman, by
-- simplifying the original so-called "semantic" parser. */
--
--/* All symbols defined below should begin with yy or YY, to avoid
-- infringing on user name space. This should be done even for local
-- variables, as they might otherwise be expanded by user macros.
-- There are some unavoidable exceptions within include files to
-- define necessary library symbols; they are noted "INFRINGES ON
-- USER NAME SPACE" below. */
--
--/* Identify Bison output. */
--#define YYBISON 1
--
--/* Bison version. */
--#define YYBISON_VERSION "2.3"
--
--/* Skeleton name. */
--#define YYSKELETON_NAME "yacc.c"
--
--/* Pure parsers. */
--#define YYPURE 0
--
--/* Using locations. */
--#define YYLSP_NEEDED 0
--
--/* Substitute the variable and function names. */
--#define yyparse rx_parse
--#define yylex rx_lex
--#define yyerror rx_error
--#define yylval rx_lval
--#define yychar rx_char
--#define yydebug rx_debug
--#define yynerrs rx_nerrs
--
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- REG = 258,
-- FLAG = 259,
-- CREG = 260,
-- EXPR = 261,
-- UNKNOWN_OPCODE = 262,
-- IS_OPCODE = 263,
-- DOT_S = 264,
-- DOT_B = 265,
-- DOT_W = 266,
-- DOT_L = 267,
-- DOT_A = 268,
-- DOT_UB = 269,
-- DOT_UW = 270,
-- ABS = 271,
-- ADC = 272,
-- ADD = 273,
-- AND_ = 274,
-- BCLR = 275,
-- BCND = 276,
-- BMCND = 277,
-- BNOT = 278,
-- BRA = 279,
-- BRK = 280,
-- BSET = 281,
-- BSR = 282,
-- BTST = 283,
-- CLRPSW = 284,
-- CMP = 285,
-- DBT = 286,
-- DIV = 287,
-- DIVU = 288,
-- EDIV = 289,
-- EDIVU = 290,
-- EMUL = 291,
-- EMULU = 292,
-- FADD = 293,
-- FCMP = 294,
-- FDIV = 295,
-- FMUL = 296,
-- FREIT = 297,
-- FSUB = 298,
-- FTOI = 299,
-- INT = 300,
-- ITOF = 301,
-- JMP = 302,
-- JSR = 303,
-- MACHI = 304,
-- MACLO = 305,
-- MAX = 306,
-- MIN = 307,
-- MOV = 308,
-- MOVU = 309,
-- MUL = 310,
-- MULHI = 311,
-- MULLO = 312,
-- MULU = 313,
-- MVFACHI = 314,
-- MVFACMI = 315,
-- MVFACLO = 316,
-- MVFC = 317,
-- MVTACHI = 318,
-- MVTACLO = 319,
-- MVTC = 320,
-- MVTIPL = 321,
-- NEG = 322,
-- NOP = 323,
-- NOT = 324,
-- OR = 325,
-- POP = 326,
-- POPC = 327,
-- POPM = 328,
-- PUSH = 329,
-- PUSHA = 330,
-- PUSHC = 331,
-- PUSHM = 332,
-- RACW = 333,
-- REIT = 334,
-- REVL = 335,
-- REVW = 336,
-- RMPA = 337,
-- ROLC = 338,
-- RORC = 339,
-- ROTL = 340,
-- ROTR = 341,
-- ROUND = 342,
-- RTE = 343,
-- RTFI = 344,
-- RTS = 345,
-- RTSD = 346,
-- SAT = 347,
-- SATR = 348,
-- SBB = 349,
-- SCCND = 350,
-- SCMPU = 351,
-- SETPSW = 352,
-- SHAR = 353,
-- SHLL = 354,
-- SHLR = 355,
-- SMOVB = 356,
-- SMOVF = 357,
-- SMOVU = 358,
-- SSTR = 359,
-- STNZ = 360,
-- STOP = 361,
-- STZ = 362,
-- SUB = 363,
-- SUNTIL = 364,
-- SWHILE = 365,
-- TST = 366,
-- WAIT = 367,
-- XCHG = 368,
-- XOR = 369
-- };
--#endif
--/* Tokens. */
--#define REG 258
--#define FLAG 259
--#define CREG 260
--#define EXPR 261
--#define UNKNOWN_OPCODE 262
--#define IS_OPCODE 263
--#define DOT_S 264
--#define DOT_B 265
--#define DOT_W 266
--#define DOT_L 267
--#define DOT_A 268
--#define DOT_UB 269
--#define DOT_UW 270
--#define ABS 271
--#define ADC 272
--#define ADD 273
--#define AND_ 274
--#define BCLR 275
--#define BCND 276
--#define BMCND 277
--#define BNOT 278
--#define BRA 279
--#define BRK 280
--#define BSET 281
--#define BSR 282
--#define BTST 283
--#define CLRPSW 284
--#define CMP 285
--#define DBT 286
--#define DIV 287
--#define DIVU 288
--#define EDIV 289
--#define EDIVU 290
--#define EMUL 291
--#define EMULU 292
--#define FADD 293
--#define FCMP 294
--#define FDIV 295
--#define FMUL 296
--#define FREIT 297
--#define FSUB 298
--#define FTOI 299
--#define INT 300
--#define ITOF 301
--#define JMP 302
--#define JSR 303
--#define MACHI 304
--#define MACLO 305
--#define MAX 306
--#define MIN 307
--#define MOV 308
--#define MOVU 309
--#define MUL 310
--#define MULHI 311
--#define MULLO 312
--#define MULU 313
--#define MVFACHI 314
--#define MVFACMI 315
--#define MVFACLO 316
--#define MVFC 317
--#define MVTACHI 318
--#define MVTACLO 319
--#define MVTC 320
--#define MVTIPL 321
--#define NEG 322
--#define NOP 323
--#define NOT 324
--#define OR 325
--#define POP 326
--#define POPC 327
--#define POPM 328
--#define PUSH 329
--#define PUSHA 330
--#define PUSHC 331
--#define PUSHM 332
--#define RACW 333
--#define REIT 334
--#define REVL 335
--#define REVW 336
--#define RMPA 337
--#define ROLC 338
--#define RORC 339
--#define ROTL 340
--#define ROTR 341
--#define ROUND 342
--#define RTE 343
--#define RTFI 344
--#define RTS 345
--#define RTSD 346
--#define SAT 347
--#define SATR 348
--#define SBB 349
--#define SCCND 350
--#define SCMPU 351
--#define SETPSW 352
--#define SHAR 353
--#define SHLL 354
--#define SHLR 355
--#define SMOVB 356
--#define SMOVF 357
--#define SMOVU 358
--#define SSTR 359
--#define STNZ 360
--#define STOP 361
--#define STZ 362
--#define SUB 363
--#define SUNTIL 364
--#define SWHILE 365
--#define TST 366
--#define WAIT 367
--#define XCHG 368
--#define XOR 369
--
--
--
--
--/* Copy the first part of user declarations. */
--#line 20 "rx-parse.y"
--
--
--#include "as.h"
--#include "safe-ctype.h"
--#include "rx-defs.h"
--
--static int rx_lex (void);
--
--#define COND_EQ 0
--#define COND_NE 1
--
--#define MEMEX 0x06
--
--#define BSIZE 0
--#define WSIZE 1
--#define LSIZE 2
--
--/* .sb .sw .l .uw */
--static int sizemap[] = { BSIZE, WSIZE, LSIZE, WSIZE };
--
--/* Ok, here are the rules for using these macros...
--
-- B*() is used to specify the base opcode bytes. Fields to be filled
-- in later, leave zero. Call this first.
--
-- F() and FE() are used to fill in fields within the base opcode bytes. You MUST
-- call B*() before any F() or FE().
--
-- [UN]*O*(), PC*() appends operands to the end of the opcode. You
-- must call P() and B*() before any of these, so that the fixups
-- have the right byte location.
-- O = signed, UO = unsigned, NO = negated, PC = pcrel
--
-- IMM() adds an immediate and fills in the field for it.
-- NIMM() same, but negates the immediate.
-- NBIMM() same, but negates the immediate, for sbb.
-- DSP() adds a displacement, and fills in the field for it.
--
-- Note that order is significant for the O, IMM, and DSP macros, as
-- they append their data to the operand buffer in the order that you
-- call them.
--
-- Use "disp" for displacements whenever possible; this handles the
-- "0" case properly. */
--
--#define B1(b1) rx_base1 (b1)
--#define B2(b1, b2) rx_base2 (b1, b2)
--#define B3(b1, b2, b3) rx_base3 (b1, b2, b3)
--#define B4(b1, b2, b3, b4) rx_base4 (b1, b2, b3, b4)
--
--/* POS is bits from the MSB of the first byte to the LSB of the last byte. */
--#define F(val,pos,sz) rx_field (val, pos, sz)
--#define FE(exp,pos,sz) rx_field (exp_val (exp), pos, sz);
--
--#define O1(v) rx_op (v, 1, RXREL_SIGNED); rx_range (v, -128, 255)
--#define O2(v) rx_op (v, 2, RXREL_SIGNED); rx_range (v, -32768, 65536)
--#define O3(v) rx_op (v, 3, RXREL_SIGNED); rx_range (v, -8388608, 16777216)
--#define O4(v) rx_op (v, 4, RXREL_SIGNED)
--
--#define UO1(v) rx_op (v, 1, RXREL_UNSIGNED); rx_range (v, 0, 255)
--#define UO2(v) rx_op (v, 2, RXREL_UNSIGNED); rx_range (v, 0, 65536)
--#define UO3(v) rx_op (v, 3, RXREL_UNSIGNED); rx_range (v, 0, 16777216)
--#define UO4(v) rx_op (v, 4, RXREL_UNSIGNED)
--
--#define NO1(v) rx_op (v, 1, RXREL_NEGATIVE)
--#define NO2(v) rx_op (v, 2, RXREL_NEGATIVE)
--#define NO3(v) rx_op (v, 3, RXREL_NEGATIVE)
--#define NO4(v) rx_op (v, 4, RXREL_NEGATIVE)
--
--#define PC1(v) rx_op (v, 1, RXREL_PCREL)
--#define PC2(v) rx_op (v, 2, RXREL_PCREL)
--#define PC3(v) rx_op (v, 3, RXREL_PCREL)
--
--#define IMM_(v,pos,size) F (immediate (v, RXREL_SIGNED, pos, size), pos, 2); \
-- if (v.X_op != O_constant && v.X_op != O_big) rx_linkrelax_imm (pos)
--#define IMM(v,pos) IMM_ (v, pos, 32)
--#define IMMW(v,pos) IMM_ (v, pos, 16); rx_range (v, -32768, 65536)
--#define IMMB(v,pos) IMM_ (v, pos, 8); rx_range (v, -128, 255)
--#define NIMM(v,pos) F (immediate (v, RXREL_NEGATIVE, pos, 32), pos, 2)
--#define NBIMM(v,pos) F (immediate (v, RXREL_NEGATIVE_BORROW, pos, 32), pos, 2)
--#define DSP(v,pos,msz) if (!v.X_md) rx_relax (RX_RELAX_DISP, pos); \
-- else rx_linkrelax_dsp (pos); \
-- F (displacement (v, msz), pos, 2)
--
--#define id24(a,b2,b3) B3 (0xfb+a, b2, b3)
--
--static void rx_check_float_support (void);
--static int rx_intop (expressionS, int, int);
--static int rx_uintop (expressionS, int);
--static int rx_disp3op (expressionS);
--static int rx_disp5op (expressionS *, int);
--static int rx_disp5op0 (expressionS *, int);
--static int exp_val (expressionS exp);
--static expressionS zero_expr (void);
--static int immediate (expressionS, int, int, int);
--static int displacement (expressionS, int);
--static void rtsd_immediate (expressionS);
--static void rx_range (expressionS, int, int);
--
--static int need_flag = 0;
--static int rx_in_brackets = 0;
--static int rx_last_token = 0;
--static char * rx_init_start;
--static char * rx_last_exp_start = 0;
--static int sub_op;
--static int sub_op2;
--
--#define YYDEBUG 1
--#define YYERROR_VERBOSE 1
--
--
--
--/* Enabling traces. */
--#ifndef YYDEBUG
--# define YYDEBUG 0
--#endif
--
--/* Enabling verbose error messages. */
--#ifdef YYERROR_VERBOSE
--# undef YYERROR_VERBOSE
--# define YYERROR_VERBOSE 1
--#else
--# define YYERROR_VERBOSE 0
--#endif
--
--/* Enabling the token table. */
--#ifndef YYTOKEN_TABLE
--# define YYTOKEN_TABLE 0
--#endif
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 134 "rx-parse.y"
--{
-- int regno;
-- expressionS exp;
--}
--/* Line 193 of yacc.c. */
--#line 449 "rx-parse.c"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--
--
--/* Copy the second part of user declarations. */
--
--
--/* Line 216 of yacc.c. */
--#line 462 "rx-parse.c"
--
--#ifdef short
--# undef short
--#endif
--
--#ifdef YYTYPE_UINT8
--typedef YYTYPE_UINT8 yytype_uint8;
--#else
--typedef unsigned char yytype_uint8;
--#endif
--
--#ifdef YYTYPE_INT8
--typedef YYTYPE_INT8 yytype_int8;
--#elif (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--typedef signed char yytype_int8;
--#else
--typedef short int yytype_int8;
--#endif
--
--#ifdef YYTYPE_UINT16
--typedef YYTYPE_UINT16 yytype_uint16;
--#else
--typedef unsigned short int yytype_uint16;
--#endif
--
--#ifdef YYTYPE_INT16
--typedef YYTYPE_INT16 yytype_int16;
--#else
--typedef short int yytype_int16;
--#endif
--
--#ifndef YYSIZE_T
--# ifdef __SIZE_TYPE__
--# define YYSIZE_T __SIZE_TYPE__
--# elif defined size_t
--# define YYSIZE_T size_t
--# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stddef.h> /* INFRINGES ON USER NAME SPACE */
--# define YYSIZE_T size_t
--# else
--# define YYSIZE_T unsigned int
--# endif
--#endif
--
--#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
--
--#ifndef YY_
--# if defined YYENABLE_NLS && YYENABLE_NLS
--# if ENABLE_NLS
--# include <libintl.h> /* INFRINGES ON USER NAME SPACE */
--# define YY_(msgid) dgettext ("bison-runtime", msgid)
--# endif
--# endif
--# ifndef YY_
--# define YY_(msgid) msgid
--# endif
--#endif
--
--/* Suppress unused-variable warnings by "using" E. */
--#if ! defined lint || defined __GNUC__
--# define YYUSE(e) ((void) (e))
--#else
--# define YYUSE(e) /* empty */
--#endif
--
--/* Identity function, used to suppress warnings about constant conditions. */
--#ifndef lint
--# define YYID(n) (n)
--#else
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static int
--YYID (int i)
--#else
--static int
--YYID (i)
-- int i;
--#endif
--{
-- return i;
--}
--#endif
--
--#if ! defined yyoverflow || YYERROR_VERBOSE
--
--/* The parser invokes alloca or malloc; define the necessary symbols. */
--
--# ifdef YYSTACK_USE_ALLOCA
--# if YYSTACK_USE_ALLOCA
--# ifdef __GNUC__
--# define YYSTACK_ALLOC __builtin_alloca
--# elif defined __BUILTIN_VA_ARG_INCR
--# include <alloca.h> /* INFRINGES ON USER NAME SPACE */
--# elif defined _AIX
--# define YYSTACK_ALLOC __alloca
--# elif defined _MSC_VER
--# include <malloc.h> /* INFRINGES ON USER NAME SPACE */
--# define alloca _alloca
--# else
--# define YYSTACK_ALLOC alloca
--# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# endif
--# endif
--# endif
--
--# ifdef YYSTACK_ALLOC
-- /* Pacify GCC's `empty if-body' warning. */
--# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0))
--# ifndef YYSTACK_ALLOC_MAXIMUM
-- /* The OS might guarantee only one guard page at the bottom of the stack,
-- and a page size can be as small as 4096 bytes. So we cannot safely
-- invoke alloca (N) if N exceeds 4096. Use a slightly smaller number
-- to allow for a few compiler-allocated temporary stack slots. */
--# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
--# endif
--# else
--# define YYSTACK_ALLOC YYMALLOC
--# define YYSTACK_FREE YYFREE
--# ifndef YYSTACK_ALLOC_MAXIMUM
--# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
--# endif
--# if (defined __cplusplus && ! defined _STDLIB_H \
-- && ! ((defined YYMALLOC || defined malloc) \
-- && (defined YYFREE || defined free)))
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# ifndef YYMALLOC
--# define YYMALLOC malloc
--# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# ifndef YYFREE
--# define YYFREE free
--# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void free (void *); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# endif
--#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
--
--
--#if (! defined yyoverflow \
-- && (! defined __cplusplus \
-- || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
--
--/* A type that is properly aligned for any stack member. */
--union yyalloc
--{
-- yytype_int16 yyss;
-- YYSTYPE yyvs;
-- };
--
--/* The size of the maximum gap between one aligned stack and the next. */
--# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
--
--/* The size of an array large to enough to hold all stacks, each with
-- N elements. */
--# define YYSTACK_BYTES(N) \
-- ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \
-- + YYSTACK_GAP_MAXIMUM)
--
--/* Copy COUNT objects from FROM to TO. The source and destination do
-- not overlap. */
--# ifndef YYCOPY
--# if defined __GNUC__ && 1 < __GNUC__
--# define YYCOPY(To, From, Count) \
-- __builtin_memcpy (To, From, (Count) * sizeof (*(From)))
--# else
--# define YYCOPY(To, From, Count) \
-- do \
-- { \
-- YYSIZE_T yyi; \
-- for (yyi = 0; yyi < (Count); yyi++) \
-- (To)[yyi] = (From)[yyi]; \
-- } \
-- while (YYID (0))
--# endif
--# endif
--
--/* Relocate STACK from its old location to the new one. The
-- local variables YYSIZE and YYSTACKSIZE give the old and new number of
-- elements in the stack, and YYPTR gives the new location of the
-- stack. Advance YYPTR to a properly aligned location for the next
-- stack. */
--# define YYSTACK_RELOCATE(Stack) \
-- do \
-- { \
-- YYSIZE_T yynewbytes; \
-- YYCOPY (&yyptr->Stack, Stack, yysize); \
-- Stack = &yyptr->Stack; \
-- yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
-- yyptr += yynewbytes / sizeof (*yyptr); \
-- } \
-- while (YYID (0))
--
--#endif
--
--/* YYFINAL -- State number of the termination state. */
--#define YYFINAL 216
--/* YYLAST -- Last index in YYTABLE. */
--#define YYLAST 618
--
--/* YYNTOKENS -- Number of terminals. */
--#define YYNTOKENS 121
--/* YYNNTS -- Number of nonterminals. */
--#define YYNNTS 62
--/* YYNRULES -- Number of rules. */
--#define YYNRULES 244
--/* YYNRULES -- Number of states. */
--#define YYNSTATES 610
--
--/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */
--#define YYUNDEFTOK 2
--#define YYMAXUTOK 369
--
--#define YYTRANSLATE(YYX) \
-- ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
--
--/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */
--static const yytype_uint8 yytranslate[] =
--{
-- 0, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 115, 2, 2, 2, 2,
-- 2, 2, 2, 120, 116, 119, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 117, 2, 118, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 1, 2, 3, 4,
-- 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
-- 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
-- 35, 36, 37, 38, 39, 40, 41, 42, 43, 44,
-- 45, 46, 47, 48, 49, 50, 51, 52, 53, 54,
-- 55, 56, 57, 58, 59, 60, 61, 62, 63, 64,
-- 65, 66, 67, 68, 69, 70, 71, 72, 73, 74,
-- 75, 76, 77, 78, 79, 80, 81, 82, 83, 84,
-- 85, 86, 87, 88, 89, 90, 91, 92, 93, 94,
-- 95, 96, 97, 98, 99, 100, 101, 102, 103, 104,
-- 105, 106, 107, 108, 109, 110, 111, 112, 113, 114
--};
--
--#if YYDEBUG
--/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
-- YYRHS. */
--static const yytype_uint16 yyprhs[] =
--{
-- 0, 0, 3, 5, 7, 9, 11, 13, 16, 20,
-- 24, 27, 31, 35, 39, 43, 47, 51, 55, 58,
-- 68, 78, 88, 96, 101, 110, 119, 125, 133, 142,
-- 148, 154, 160, 166, 172, 178, 185, 191, 195, 196,
-- 200, 201, 205, 206, 210, 215, 220, 228, 232, 238,
-- 244, 250, 253, 256, 259, 263, 266, 269, 272, 275,
-- 278, 281, 284, 288, 292, 294, 296, 298, 300, 303,
-- 306, 309, 312, 314, 316, 318, 320, 324, 333, 342,
-- 350, 361, 373, 379, 387, 397, 407, 417, 424, 425,
-- 429, 430, 434, 435, 439, 440, 444, 445, 449, 450,
-- 454, 455, 459, 460, 464, 465, 469, 470, 474, 475,
-- 479, 480, 484, 485, 489, 490, 494, 495, 499, 500,
-- 504, 505, 509, 510, 514, 515, 519, 524, 529, 534,
-- 539, 548, 557, 566, 575, 576, 580, 581, 585, 586,
-- 590, 591, 595, 596, 600, 601, 605, 606, 610, 614,
-- 621, 631, 641, 646, 651, 656, 661, 664, 667, 670,
-- 673, 676, 680, 689, 698, 707, 716, 725, 734, 735,
-- 739, 740, 744, 745, 749, 750, 754, 759, 764, 770,
-- 776, 782, 788, 794, 804, 814, 824, 825, 829, 830,
-- 834, 835, 839, 840, 844, 845, 849, 855, 859, 867,
-- 875, 881, 885, 893, 897, 905, 913, 918, 920, 922,
-- 924, 926, 930, 932, 936, 944, 952, 956, 961, 968,
-- 970, 971, 977, 979, 980, 985, 986, 995, 996, 998,
-- 999, 1002, 1004, 1006, 1007, 1009, 1011, 1012, 1014, 1016,
-- 1018, 1019, 1021, 1023, 1024
--};
--
--/* YYRHS -- A `-1'-separated list of the rules' RHS. */
--static const yytype_int16 yyrhs[] =
--{
-- 122, 0, -1, 7, -1, 25, -1, 31, -1, 90,
-- -1, 68, -1, 24, 6, -1, 24, 13, 6, -1,
-- 24, 9, 6, -1, 27, 6, -1, 27, 13, 6,
-- -1, 21, 9, 6, -1, 21, 10, 6, -1, 24,
-- 10, 6, -1, 24, 11, 6, -1, 27, 11, 6,
-- -1, 21, 11, 6, -1, 21, 6, -1, 53, 10,
-- 115, 6, 116, 176, 117, 3, 118, -1, 53, 11,
-- 115, 6, 116, 176, 117, 3, 118, -1, 53, 12,
-- 115, 6, 116, 176, 117, 3, 118, -1, 91, 115,
-- 6, 116, 3, 119, 3, -1, 30, 3, 116, 3,
-- -1, 30, 176, 117, 3, 118, 14, 116, 3, -1,
-- 30, 176, 117, 3, 118, 179, 116, 3, -1, 54,
-- 181, 3, 116, 3, -1, 54, 181, 117, 3, 118,
-- 116, 3, -1, 54, 181, 6, 117, 3, 118, 116,
-- 3, -1, 108, 115, 6, 116, 3, -1, 30, 115,
-- 6, 116, 3, -1, 18, 115, 6, 116, 3, -1,
-- 55, 115, 6, 116, 3, -1, 19, 115, 6, 116,
-- 3, -1, 70, 115, 6, 116, 3, -1, 53, 12,
-- 115, 6, 116, 3, -1, 53, 115, 6, 116, 3,
-- -1, 91, 115, 6, -1, -1, 100, 123, 170, -1,
-- -1, 98, 124, 170, -1, -1, 99, 125, 170, -1,
-- 77, 3, 119, 3, -1, 73, 3, 119, 3, -1,
-- 18, 115, 6, 116, 3, 116, 3, -1, 45, 115,
-- 6, -1, 26, 115, 6, 116, 3, -1, 20, 115,
-- 6, 116, 3, -1, 28, 115, 6, 116, 3, -1,
-- 92, 3, -1, 84, 3, -1, 83, 3, -1, 74,
-- 180, 3, -1, 71, 3, -1, 76, 5, -1, 72,
-- 5, -1, 97, 177, -1, 29, 177, -1, 47, 3,
-- -1, 48, 3, -1, 24, 182, 3, -1, 27, 182,
-- 3, -1, 96, -1, 103, -1, 101, -1, 102, -1,
-- 109, 180, -1, 110, 180, -1, 104, 180, -1, 82,
-- 180, -1, 89, -1, 88, -1, 112, -1, 93, -1,
-- 66, 115, 6, -1, 53, 180, 3, 116, 6, 117,
-- 3, 118, -1, 53, 180, 6, 117, 3, 118, 116,
-- 3, -1, 53, 180, 3, 116, 117, 3, 118, -1,
-- 53, 180, 117, 3, 118, 116, 176, 117, 3, 118,
-- -1, 53, 180, 6, 117, 3, 118, 116, 176, 117,
-- 3, 118, -1, 53, 180, 3, 116, 3, -1, 53,
-- 180, 117, 3, 118, 116, 3, -1, 26, 115, 6,
-- 116, 176, 117, 3, 118, 10, -1, 20, 115, 6,
-- 116, 176, 117, 3, 118, 10, -1, 28, 115, 6,
-- 116, 176, 117, 3, 118, 10, -1, 74, 180, 176,
-- 117, 3, 118, -1, -1, 94, 126, 162, -1, -1,
-- 67, 127, 167, -1, -1, 17, 128, 166, -1, -1,
-- 16, 129, 167, -1, -1, 51, 130, 165, -1, -1,
-- 52, 131, 165, -1, -1, 36, 132, 164, -1, -1,
-- 37, 133, 164, -1, -1, 32, 134, 165, -1, -1,
-- 33, 135, 165, -1, -1, 111, 136, 165, -1, -1,
-- 114, 137, 165, -1, -1, 69, 138, 167, -1, -1,
-- 107, 139, 164, -1, -1, 105, 140, 164, -1, -1,
-- 36, 141, 168, -1, -1, 37, 142, 168, -1, -1,
-- 113, 143, 168, -1, -1, 46, 144, 168, -1, 26,
-- 3, 116, 3, -1, 20, 3, 116, 3, -1, 28,
-- 3, 116, 3, -1, 23, 3, 116, 3, -1, 26,
-- 3, 116, 176, 117, 3, 118, 10, -1, 20, 3,
-- 116, 176, 117, 3, 118, 10, -1, 28, 3, 116,
-- 176, 117, 3, 118, 10, -1, 23, 3, 116, 176,
-- 117, 3, 118, 10, -1, -1, 43, 145, 171, -1,
-- -1, 39, 146, 171, -1, -1, 38, 147, 171, -1,
-- -1, 41, 148, 171, -1, -1, 40, 149, 171, -1,
-- -1, 44, 150, 173, -1, -1, 87, 151, 173, -1,
-- 95, 12, 3, -1, 95, 180, 176, 117, 3, 118,
-- -1, 22, 115, 6, 116, 176, 117, 3, 118, 10,
-- -1, 23, 115, 6, 116, 176, 117, 3, 118, 10,
-- -1, 56, 3, 116, 3, -1, 57, 3, 116, 3,
-- -1, 49, 3, 116, 3, -1, 50, 3, 116, 3,
-- -1, 63, 3, -1, 64, 3, -1, 59, 3, -1,
-- 60, 3, -1, 61, 3, -1, 78, 115, 6, -1,
-- 53, 180, 3, 116, 117, 3, 120, 118, -1, 53,
-- 180, 3, 116, 117, 119, 3, 118, -1, 53, 180,
-- 117, 3, 120, 118, 116, 3, -1, 53, 180, 117,
-- 119, 3, 118, 116, 3, -1, 54, 181, 117, 3,
-- 120, 118, 116, 3, -1, 54, 181, 117, 119, 3,
-- 118, 116, 3, -1, -1, 85, 152, 169, -1, -1,
-- 86, 153, 169, -1, -1, 81, 154, 169, -1, -1,
-- 80, 155, 169, -1, 65, 3, 116, 5, -1, 62,
-- 5, 116, 3, -1, 85, 115, 6, 116, 3, -1,
-- 86, 115, 6, 116, 3, -1, 65, 115, 6, 116,
-- 5, -1, 22, 115, 6, 116, 3, -1, 23, 115,
-- 6, 116, 3, -1, 53, 180, 3, 116, 117, 3,
-- 116, 3, 118, -1, 53, 180, 117, 3, 116, 3,
-- 118, 116, 3, -1, 54, 181, 117, 3, 116, 3,
-- 118, 116, 3, -1, -1, 108, 156, 161, -1, -1,
-- 18, 157, 161, -1, -1, 55, 158, 161, -1, -1,
-- 19, 159, 161, -1, -1, 70, 160, 161, -1, 94,
-- 115, 6, 116, 3, -1, 3, 116, 3, -1, 176,
-- 117, 3, 118, 14, 116, 3, -1, 176, 117, 3,
-- 118, 179, 116, 3, -1, 3, 116, 3, 116, 3,
-- -1, 3, 116, 3, -1, 176, 117, 3, 118, 182,
-- 116, 3, -1, 3, 116, 3, -1, 176, 117, 3,
-- 118, 14, 116, 3, -1, 176, 117, 3, 118, 179,
-- 116, 3, -1, 115, 6, 116, 3, -1, 163, -1,
-- 164, -1, 162, -1, 164, -1, 3, 116, 3, -1,
-- 3, -1, 3, 116, 3, -1, 176, 117, 3, 118,
-- 14, 116, 3, -1, 176, 117, 3, 118, 179, 116,
-- 3, -1, 3, 116, 3, -1, 115, 6, 116, 3,
-- -1, 115, 6, 116, 3, 116, 3, -1, 169, -1,
-- -1, 172, 115, 6, 116, 3, -1, 173, -1, -1,
-- 174, 3, 116, 3, -1, -1, 175, 176, 117, 3,
-- 118, 182, 116, 3, -1, -1, 6, -1, -1, 178,
-- 4, -1, 10, -1, 11, -1, -1, 12, -1, 15,
-- -1, -1, 10, -1, 11, -1, 12, -1, -1, 10,
-- -1, 11, -1, -1, 12, -1
--};
--
--/* YYRLINE[YYN] -- source line where rule number YYN was defined. */
--static const yytype_uint16 yyrline[] =
--{
-- 0, 174, 174, 179, 182, 185, 188, 193, 208, 211,
-- 216, 225, 230, 238, 241, 246, 248, 250, 255, 273,
-- 281, 287, 295, 304, 309, 312, 317, 322, 325, 333,
-- 340, 348, 354, 360, 366, 372, 380, 390, 395, 395,
-- 396, 396, 397, 397, 401, 414, 427, 432, 437, 439,
-- 444, 449, 451, 453, 458, 463, 468, 476, 484, 486,
-- 491, 493, 495, 497, 502, 504, 506, 508, 513, 515,
-- 517, 522, 527, 529, 531, 533, 538, 544, 552, 566,
-- 571, 576, 581, 586, 591, 593, 595, 600, 605, 605,
-- 606, 606, 607, 607, 608, 608, 609, 609, 610, 610,
-- 611, 611, 612, 612, 613, 613, 614, 614, 615, 615,
-- 616, 616, 617, 617, 618, 618, 619, 619, 623, 623,
-- 624, 624, 625, 625, 626, 626, 630, 632, 634, 636,
-- 639, 641, 643, 645, 650, 650, 651, 651, 652, 652,
-- 653, 653, 654, 654, 655, 655, 656, 656, 660, 662,
-- 667, 673, 679, 681, 683, 685, 691, 693, 695, 697,
-- 699, 702, 713, 715, 720, 722, 727, 729, 734, 734,
-- 735, 735, 736, 736, 737, 737, 741, 747, 752, 754,
-- 759, 764, 770, 775, 778, 781, 786, 786, 787, 787,
-- 788, 788, 789, 789, 790, 790, 795, 805, 807, 809,
-- 811, 818, 820, 828, 830, 832, 838, 843, 844, 848,
-- 849, 853, 855, 861, 863, 865, 872, 876, 878, 880,
-- 885, 885, 888, 892, 892, 895, 895, 902, 903, 906,
-- 906, 911, 912, 913, 914, 915, 918, 919, 920, 921,
-- 924, 925, 926, 929, 930
--};
--#endif
--
--#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE
--/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
-- First, the terminals, then, starting at YYNTOKENS, nonterminals. */
--static const char *const yytname[] =
--{
-- "$end", "error", "$undefined", "REG", "FLAG", "CREG", "EXPR",
-- "UNKNOWN_OPCODE", "IS_OPCODE", "DOT_S", "DOT_B", "DOT_W", "DOT_L",
-- "DOT_A", "DOT_UB", "DOT_UW", "ABS", "ADC", "ADD", "AND_", "BCLR", "BCND",
-- "BMCND", "BNOT", "BRA", "BRK", "BSET", "BSR", "BTST", "CLRPSW", "CMP",
-- "DBT", "DIV", "DIVU", "EDIV", "EDIVU", "EMUL", "EMULU", "FADD", "FCMP",
-- "FDIV", "FMUL", "FREIT", "FSUB", "FTOI", "INT", "ITOF", "JMP", "JSR",
-- "MACHI", "MACLO", "MAX", "MIN", "MOV", "MOVU", "MUL", "MULHI", "MULLO",
-- "MULU", "MVFACHI", "MVFACMI", "MVFACLO", "MVFC", "MVTACHI", "MVTACLO",
-- "MVTC", "MVTIPL", "NEG", "NOP", "NOT", "OR", "POP", "POPC", "POPM",
-- "PUSH", "PUSHA", "PUSHC", "PUSHM", "RACW", "REIT", "REVL", "REVW",
-- "RMPA", "ROLC", "RORC", "ROTL", "ROTR", "ROUND", "RTE", "RTFI", "RTS",
-- "RTSD", "SAT", "SATR", "SBB", "SCCND", "SCMPU", "SETPSW", "SHAR", "SHLL",
-- "SHLR", "SMOVB", "SMOVF", "SMOVU", "SSTR", "STNZ", "STOP", "STZ", "SUB",
-- "SUNTIL", "SWHILE", "TST", "WAIT", "XCHG", "XOR", "'#'", "','", "'['",
-- "']'", "'-'", "'+'", "$accept", "statement", "@1", "@2", "@3", "@4",
-- "@5", "@6", "@7", "@8", "@9", "@10", "@11", "@12", "@13", "@14", "@15",
-- "@16", "@17", "@18", "@19", "@20", "@21", "@22", "@23", "@24", "@25",
-- "@26", "@27", "@28", "@29", "@30", "@31", "@32", "@33", "@34", "@35",
-- "@36", "@37", "@38", "op_subadd", "op_dp20_rm_l", "op_dp20_rm",
-- "op_dp20_i", "op_dp20_rim", "op_dp20_rim_l", "op_dp20_rr", "op_xchg",
-- "op_shift_rot", "op_shift", "float2_op", "@39", "float2_op_ni", "@40",
-- "@41", "disp", "flag", "@42", "memex", "bwl", "bw", "opt_l", 0
--};
--#endif
--
--# ifdef YYPRINT
--/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to
-- token YYLEX-NUM. */
--static const yytype_uint16 yytoknum[] =
--{
-- 0, 256, 257, 258, 259, 260, 261, 262, 263, 264,
-- 265, 266, 267, 268, 269, 270, 271, 272, 273, 274,
-- 275, 276, 277, 278, 279, 280, 281, 282, 283, 284,
-- 285, 286, 287, 288, 289, 290, 291, 292, 293, 294,
-- 295, 296, 297, 298, 299, 300, 301, 302, 303, 304,
-- 305, 306, 307, 308, 309, 310, 311, 312, 313, 314,
-- 315, 316, 317, 318, 319, 320, 321, 322, 323, 324,
-- 325, 326, 327, 328, 329, 330, 331, 332, 333, 334,
-- 335, 336, 337, 338, 339, 340, 341, 342, 343, 344,
-- 345, 346, 347, 348, 349, 350, 351, 352, 353, 354,
-- 355, 356, 357, 358, 359, 360, 361, 362, 363, 364,
-- 365, 366, 367, 368, 369, 35, 44, 91, 93, 45,
-- 43
--};
--# endif
--
--/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */
--static const yytype_uint8 yyr1[] =
--{
-- 0, 121, 122, 122, 122, 122, 122, 122, 122, 122,
-- 122, 122, 122, 122, 122, 122, 122, 122, 122, 122,
-- 122, 122, 122, 122, 122, 122, 122, 122, 122, 122,
-- 122, 122, 122, 122, 122, 122, 122, 122, 123, 122,
-- 124, 122, 125, 122, 122, 122, 122, 122, 122, 122,
-- 122, 122, 122, 122, 122, 122, 122, 122, 122, 122,
-- 122, 122, 122, 122, 122, 122, 122, 122, 122, 122,
-- 122, 122, 122, 122, 122, 122, 122, 122, 122, 122,
-- 122, 122, 122, 122, 122, 122, 122, 122, 126, 122,
-- 127, 122, 128, 122, 129, 122, 130, 122, 131, 122,
-- 132, 122, 133, 122, 134, 122, 135, 122, 136, 122,
-- 137, 122, 138, 122, 139, 122, 140, 122, 141, 122,
-- 142, 122, 143, 122, 144, 122, 122, 122, 122, 122,
-- 122, 122, 122, 122, 145, 122, 146, 122, 147, 122,
-- 148, 122, 149, 122, 150, 122, 151, 122, 122, 122,
-- 122, 122, 122, 122, 122, 122, 122, 122, 122, 122,
-- 122, 122, 122, 122, 122, 122, 122, 122, 152, 122,
-- 153, 122, 154, 122, 155, 122, 122, 122, 122, 122,
-- 122, 122, 122, 122, 122, 122, 156, 122, 157, 122,
-- 158, 122, 159, 122, 160, 122, 122, 161, 161, 161,
-- 161, 162, 162, 163, 163, 163, 164, 165, 165, 166,
-- 166, 167, 167, 168, 168, 168, 169, 170, 170, 170,
-- 172, 171, 171, 174, 173, 175, 173, 176, 176, 178,
-- 177, 179, 179, 179, 179, 179, 180, 180, 180, 180,
-- 181, 181, 181, 182, 182
--};
--
--/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */
--static const yytype_uint8 yyr2[] =
--{
-- 0, 2, 1, 1, 1, 1, 1, 2, 3, 3,
-- 2, 3, 3, 3, 3, 3, 3, 3, 2, 9,
-- 9, 9, 7, 4, 8, 8, 5, 7, 8, 5,
-- 5, 5, 5, 5, 5, 6, 5, 3, 0, 3,
-- 0, 3, 0, 3, 4, 4, 7, 3, 5, 5,
-- 5, 2, 2, 2, 3, 2, 2, 2, 2, 2,
-- 2, 2, 3, 3, 1, 1, 1, 1, 2, 2,
-- 2, 2, 1, 1, 1, 1, 3, 8, 8, 7,
-- 10, 11, 5, 7, 9, 9, 9, 6, 0, 3,
-- 0, 3, 0, 3, 0, 3, 0, 3, 0, 3,
-- 0, 3, 0, 3, 0, 3, 0, 3, 0, 3,
-- 0, 3, 0, 3, 0, 3, 0, 3, 0, 3,
-- 0, 3, 0, 3, 0, 3, 4, 4, 4, 4,
-- 8, 8, 8, 8, 0, 3, 0, 3, 0, 3,
-- 0, 3, 0, 3, 0, 3, 0, 3, 3, 6,
-- 9, 9, 4, 4, 4, 4, 2, 2, 2, 2,
-- 2, 3, 8, 8, 8, 8, 8, 8, 0, 3,
-- 0, 3, 0, 3, 0, 3, 4, 4, 5, 5,
-- 5, 5, 5, 9, 9, 9, 0, 3, 0, 3,
-- 0, 3, 0, 3, 0, 3, 5, 3, 7, 7,
-- 5, 3, 7, 3, 7, 7, 4, 1, 1, 1,
-- 1, 3, 1, 3, 7, 7, 3, 4, 6, 1,
-- 0, 5, 1, 0, 4, 0, 8, 0, 1, 0,
-- 2, 1, 1, 0, 1, 1, 0, 1, 1, 1,
-- 0, 1, 1, 0, 1
--};
--
--/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
-- STATE-NUM when YYTABLE doesn't specify something else to do. Zero
-- means the default is an error. */
--static const yytype_uint8 yydefact[] =
--{
-- 0, 2, 94, 92, 188, 192, 0, 0, 0, 0,
-- 243, 3, 0, 243, 0, 229, 227, 4, 104, 106,
-- 118, 120, 138, 136, 142, 140, 134, 144, 0, 124,
-- 0, 0, 0, 0, 96, 98, 236, 240, 190, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 90,
-- 6, 112, 194, 0, 0, 0, 236, 0, 0, 0,
-- 174, 172, 236, 0, 0, 168, 170, 146, 73, 72,
-- 5, 0, 0, 75, 88, 236, 64, 229, 40, 42,
-- 38, 66, 67, 65, 236, 116, 114, 186, 236, 236,
-- 108, 74, 122, 110, 0, 0, 227, 0, 227, 0,
-- 227, 0, 0, 18, 0, 0, 0, 0, 0, 0,
-- 7, 0, 0, 0, 244, 0, 0, 0, 0, 10,
-- 0, 0, 0, 0, 0, 59, 0, 0, 228, 0,
-- 0, 227, 227, 0, 227, 0, 227, 225, 225, 225,
-- 225, 225, 225, 0, 227, 60, 61, 0, 0, 227,
-- 227, 237, 238, 239, 0, 0, 241, 242, 0, 0,
-- 227, 0, 0, 158, 159, 160, 0, 156, 157, 0,
-- 0, 0, 0, 0, 0, 227, 55, 57, 0, 237,
-- 238, 239, 227, 56, 0, 0, 0, 0, 71, 53,
-- 52, 0, 0, 0, 0, 225, 0, 51, 0, 227,
-- 239, 227, 58, 0, 0, 0, 70, 0, 0, 0,
-- 227, 68, 69, 227, 227, 227, 1, 212, 95, 0,
-- 0, 209, 210, 93, 0, 0, 0, 189, 0, 0,
-- 193, 227, 0, 12, 13, 17, 0, 227, 0, 9,
-- 14, 15, 8, 62, 227, 0, 16, 11, 63, 227,
-- 0, 230, 0, 0, 0, 0, 207, 208, 105, 0,
-- 107, 101, 0, 119, 0, 103, 121, 139, 0, 222,
-- 0, 227, 137, 143, 141, 135, 145, 47, 125, 0,
-- 0, 97, 99, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 191, 0, 0, 0, 0, 0,
-- 76, 91, 113, 0, 195, 0, 54, 0, 0, 161,
-- 0, 175, 173, 0, 169, 0, 171, 147, 37, 0,
-- 89, 148, 0, 0, 219, 41, 43, 39, 117, 115,
-- 0, 187, 109, 123, 111, 0, 0, 0, 0, 0,
-- 0, 0, 0, 127, 0, 227, 227, 129, 0, 227,
-- 126, 0, 227, 128, 0, 227, 23, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 154, 155, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 0, 152, 153, 177, 176, 0, 0, 45, 0, 44,
-- 0, 0, 0, 0, 0, 0, 0, 0, 211, 201,
-- 0, 0, 31, 197, 0, 33, 0, 49, 0, 181,
-- 0, 0, 182, 0, 0, 48, 0, 0, 50, 0,
-- 30, 233, 203, 0, 213, 0, 0, 0, 0, 227,
-- 227, 227, 36, 82, 0, 0, 0, 0, 0, 0,
-- 0, 26, 0, 0, 0, 0, 0, 32, 180, 34,
-- 0, 216, 178, 179, 0, 196, 0, 0, 29, 206,
-- 243, 0, 0, 233, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 231, 232, 234, 0, 235, 0, 233,
-- 233, 0, 224, 0, 0, 0, 35, 0, 0, 0,
-- 0, 0, 0, 227, 0, 0, 0, 0, 0, 0,
-- 0, 87, 0, 149, 217, 0, 46, 200, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 221, 243, 0, 0, 0,
-- 0, 0, 79, 0, 0, 227, 0, 83, 0, 0,
-- 0, 0, 0, 27, 0, 0, 22, 0, 0, 0,
-- 0, 131, 0, 0, 133, 0, 130, 0, 132, 0,
-- 24, 25, 0, 0, 0, 0, 0, 0, 0, 0,
-- 77, 0, 162, 163, 78, 0, 0, 0, 164, 165,
-- 28, 0, 166, 167, 218, 202, 198, 199, 85, 150,
-- 151, 84, 86, 204, 205, 214, 215, 0, 19, 20,
-- 21, 183, 0, 184, 0, 185, 226, 0, 80, 81
--};
--
--/* YYDEFGOTO[NTERM-NUM]. */
--static const yytype_int16 yydefgoto[] =
--{
-- -1, 94, 205, 203, 204, 199, 172, 96, 95, 149,
-- 150, 133, 135, 131, 132, 213, 215, 173, 208, 207,
-- 134, 136, 214, 144, 141, 138, 137, 140, 139, 142,
-- 195, 192, 194, 187, 186, 210, 98, 160, 100, 175,
-- 227, 221, 256, 257, 258, 223, 218, 263, 324, 325,
-- 267, 268, 269, 270, 271, 259, 125, 126, 478, 155,
-- 158, 116
--};
--
--/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
-- STATE-NUM. */
--#define YYPACT_NINF -432
--static const yytype_int16 yypact[] =
--{
-- 504, -432, -432, -432, -80, -73, 16, 47, -27, 18,
-- 34, -432, 19, 59, 20, -432, 1, -432, -432, -432,
-- -20, -9, -432, -432, -432, -432, -432, -432, 15, -432,
-- 137, 174, 177, 181, -432, -432, 17, 168, 73, 186,
-- 187, 188, 189, 190, 191, 192, 194, 21, 84, -432,
-- -432, -432, 85, 198, 197, 200, 100, 199, 202, 91,
-- -432, -432, 100, 204, 205, 94, 95, -432, -432, -432,
-- -432, 96, 209, -432, 99, 164, -432, -432, -432, -432,
-- -432, -432, -432, -432, 100, -432, -432, 101, 100, 100,
-- -432, -432, -432, -432, 213, 214, 12, 212, 30, 216,
-- 30, 103, 217, -432, 218, 219, 220, 221, 104, 223,
-- -432, 224, 225, 226, -432, 228, 232, 120, 231, -432,
-- 233, 234, 235, 125, 236, -432, 239, 128, -432, 240,
-- 130, 14, 14, 133, 98, 133, 98, 22, 22, 22,
-- 22, 22, 242, 243, 98, -432, -432, 134, 135, 14,
-- 14, 138, 139, 141, 246, 6, -432, -432, 7, 251,
-- 30, 142, 146, -432, -432, -432, 147, -432, -432, 148,
-- 253, 254, 214, 214, 255, 30, -432, -432, 152, -432,
-- -432, -432, 136, -432, 153, 259, 263, 263, -432, -432,
-- -432, 261, 263, 262, 263, 242, 264, -432, 267, 143,
-- 266, 268, -432, 23, 23, 23, -432, 133, 133, 269,
-- 30, -432, -432, 14, 98, 14, -432, 160, -432, 162,
-- 271, -432, -432, -432, 163, 169, 170, -432, 171, 173,
-- -432, 144, 175, -432, -432, -432, 176, 145, 178, -432,
-- -432, -432, -432, -432, 149, 179, -432, -432, -432, 150,
-- 180, -432, 276, 182, 278, 183, -432, -432, -432, 184,
-- -432, -432, 193, -432, 185, -432, -432, -432, 172, -432,
-- 279, 268, -432, -432, -432, -432, -432, -432, -432, 280,
-- 281, -432, -432, 284, 287, 291, 195, 196, 201, 0,
-- 203, 206, 2, 208, -432, 297, 300, 301, 302, 210,
-- -432, -432, -432, 211, -432, 303, -432, 215, 305, -432,
-- 222, -432, -432, 227, -432, 229, -432, -432, 230, 237,
-- -432, -432, 238, 299, -432, -432, -432, -432, -432, -432,
-- 241, -432, -432, -432, -432, 307, 310, 244, 311, 312,
-- 313, 314, 317, -432, 245, 151, 155, -432, 247, 157,
-- -432, 248, 159, -432, 249, 161, -432, 318, 207, 319,
-- 325, 328, 331, 329, 252, 250, -432, -432, 256, 257,
-- 258, 334, 8, 337, -37, 338, 339, 341, -11, 344,
-- 345, -432, -432, -432, -432, 346, 347, -432, 349, -432,
-- 351, 353, 355, 356, 358, 360, 260, 366, -432, -432,
-- 367, 265, 270, 272, 273, -432, 368, -432, 275, -432,
-- 277, 372, -432, 282, 374, -432, 283, 375, -432, 285,
-- -432, 63, -432, 286, -432, 288, 274, 376, 377, 268,
-- 268, 165, -432, -432, 290, 3, 292, 378, 289, 293,
-- 294, -432, 298, 379, 304, 306, 308, -432, -432, -432,
-- 309, -432, -432, -432, 315, -432, 320, 381, -432, -432,
-- 373, 384, 386, 75, 321, 390, 392, 322, 393, 323,
-- 394, 324, 395, -432, -432, -432, 316, -432, 327, 82,
-- 88, 398, -432, 326, 330, 332, -432, 333, 400, 25,
-- 405, 335, 336, 166, 340, 342, 343, 348, 406, 352,
-- 354, -432, 414, -432, 357, 359, -432, -432, 362, 363,
-- 408, 364, 365, 409, 369, 411, 370, 412, 371, 420,
-- 422, 380, 382, 383, 385, -432, 373, 425, 426, 427,
-- 387, 428, -432, 388, 389, 167, 396, -432, 350, 430,
-- 432, 433, 397, -432, 434, 442, -432, 443, 449, 450,
-- 452, -432, 447, 451, -432, 453, -432, 454, -432, 455,
-- -432, -432, 457, 459, 466, 468, 399, 391, 421, 444,
-- -432, 461, -432, -432, -432, 401, 469, 471, -432, -432,
-- -432, 473, -432, -432, -432, -432, -432, -432, -432, -432,
-- -432, -432, -432, -432, -432, -432, -432, 477, -432, -432,
-- -432, -432, 478, -432, 465, -432, -432, 492, -432, -432
--};
--
--/* YYPGOTO[NTERM-NUM]. */
--static const yytype_int16 yypgoto[] =
--{
-- -432, -432, -432, -432, -432, -432, -432, -432, -432, -432,
-- -432, -432, -432, -432, -432, -432, -432, -432, -432, -432,
-- -432, -432, -432, -432, -432, -432, -432, -432, -432, -432,
-- -432, -432, -432, -432, -432, -432, -432, -432, -432, -432,
-- -84, 295, -432, -94, -98, -432, 9, -106, -132, -18,
-- -72, -432, -134, -432, -432, -16, 407, -432, -431, -25,
-- -432, -12
--};
--
--/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If
-- positive, shift that token. If negative, reduce the rule which
-- number is the opposite. If zero, do what YYDEFACT says.
-- If YYTABLE_NINF, syntax error. */
--#define YYTABLE_NINF -224
--static const yytype_int16 yytable[] =
--{
-- 130, 122, 222, 374, 127, 378, 489, 128, 276, 287,
-- 290, 433, 288, 291, 434, 219, 230, 255, 128, 101,
-- 128, 108, 117, 123, 169, -223, 310, 151, 152, 153,
-- 266, 182, 509, 226, 260, 97, 128, 188, 278, 261,
-- 110, 265, 99, 111, 112, 113, 114, 115, 522, 524,
-- 201, 281, 282, 103, 311, 312, 104, 105, 106, 206,
-- 314, 317, 316, 211, 212, 119, 272, 273, 274, 275,
-- 120, 114, 121, 473, 474, 475, 294, 476, 477, 437,
-- 224, 438, 228, 439, 228, 473, 474, 475, 107, 508,
-- 477, 304, 473, 474, 475, -100, 521, 477, 473, 474,
-- 475, 262, 523, 477, 128, 443, -102, 444, 333, 445,
-- 179, 180, 181, 328, 329, 332, 129, 334, 264, 375,
-- 264, 379, 490, 289, 292, 435, 331, 220, 264, 220,
-- 143, 102, 154, 109, 118, 124, 170, -220, 323, 306,
-- 145, 531, 128, 532, 228, 533, 219, 343, 347, 128,
-- 128, 128, 350, 353, 407, 128, 128, 128, 409, 228,
-- 412, 128, 415, 128, 418, 128, 307, 128, 486, 537,
-- 574, 128, 128, 128, 179, 180, 200, 146, 156, 157,
-- 147, 301, 302, 224, 148, 322, 326, 327, 159, 161,
-- 162, 163, 164, 165, 228, 167, 166, 168, 264, 171,
-- 174, 176, 177, 178, 183, 184, 185, 189, 190, 191,
-- 193, 196, 197, 216, 198, 344, 209, 217, 225, 231,
-- 237, 348, 229, 232, 233, 234, 235, 236, 351, 238,
-- 239, 240, 241, 354, 242, 243, 244, 245, 248, 246,
-- 247, 249, 250, 251, 252, -223, 253, 254, 220, 277,
-- 279, 280, 286, 283, 284, 365, 285, 293, 295, 299,
-- 300, 303, 296, 297, 298, 309, 310, 313, 315, 321,
-- 318, 305, 308, 319, 128, 330, 335, 337, 336, 356,
-- 338, 358, 364, 366, 367, 339, 340, 363, 341, 342,
-- 368, 345, 346, 369, 349, 352, 355, 370, 357, 359,
-- 381, 360, 362, 382, 383, 396, 387, 384, 389, 361,
-- 398, 371, 372, 399, 401, 402, 403, 404, 373, 376,
-- 405, 420, 422, 377, 380, 421, 385, 386, 423, 408,
-- 410, 424, 388, 413, 425, 426, 416, 432, 390, 419,
-- 436, 440, 441, 391, 442, 392, 393, 446, 447, 0,
-- 449, 448, 450, 394, 451, 395, 452, 397, 453, 454,
-- 400, 455, 406, 456, 411, 414, 417, 428, 427, 458,
-- 459, 464, 429, 430, 431, 467, 457, 469, 471, 482,
-- 483, 492, 497, 460, 504, 114, 461, 506, 462, 507,
-- 481, 463, 465, 511, 466, 512, 514, 516, 518, 468,
-- 470, 525, 472, 530, 479, 493, 480, 488, 534, 543,
-- 491, 494, 495, 484, 485, 487, 496, 546, 551, 554,
-- 498, 556, 558, 560, 499, 561, 500, 501, 567, 568,
-- 569, 571, 519, 578, 502, 579, 580, 582, 503, 510,
-- 513, 515, 517, 520, 526, 583, 584, 527, 505, 528,
-- 529, 535, 585, 586, 536, 587, 539, 588, 540, 541,
-- 593, 589, 594, 590, 591, 592, 542, 577, 544, 595,
-- 545, 596, 603, 547, 604, 548, 605, 538, 549, 550,
-- 606, 607, 552, 553, 202, 0, 0, 555, 557, 559,
-- 0, 0, 0, 0, 320, 0, 562, 0, 563, 564,
-- 0, 565, 0, 0, 0, 570, 572, 573, 0, 598,
-- 0, 1, 576, 581, 566, 597, 0, 0, 602, 575,
-- 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
-- 12, 13, 14, 15, 16, 17, 18, 19, 0, 599,
-- 20, 21, 22, 23, 24, 25, 0, 26, 27, 28,
-- 29, 30, 31, 32, 33, 34, 35, 36, 37, 38,
-- 39, 40, 600, 41, 42, 43, 44, 45, 46, 47,
-- 48, 49, 50, 51, 52, 53, 54, 55, 56, 601,
-- 57, 58, 59, 608, 60, 61, 62, 63, 64, 65,
-- 66, 67, 68, 69, 70, 71, 72, 73, 74, 75,
-- 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
-- 609, 86, 87, 88, 89, 90, 91, 92, 93
--};
--
--static const yytype_int16 yycheck[] =
--{
-- 16, 13, 96, 3, 3, 3, 3, 6, 142, 3,
-- 3, 3, 6, 6, 6, 3, 100, 3, 6, 3,
-- 6, 3, 3, 3, 3, 3, 3, 10, 11, 12,
-- 136, 56, 463, 3, 132, 115, 6, 62, 144, 133,
-- 6, 135, 115, 9, 10, 11, 12, 13, 479, 480,
-- 75, 149, 150, 6, 186, 187, 9, 10, 11, 84,
-- 192, 195, 194, 88, 89, 6, 138, 139, 140, 141,
-- 11, 12, 13, 10, 11, 12, 160, 14, 15, 116,
-- 96, 118, 98, 120, 100, 10, 11, 12, 115, 14,
-- 15, 175, 10, 11, 12, 115, 14, 15, 10, 11,
-- 12, 3, 14, 15, 6, 116, 115, 118, 214, 120,
-- 10, 11, 12, 207, 208, 213, 115, 215, 134, 119,
-- 136, 119, 119, 117, 117, 117, 210, 115, 144, 115,
-- 115, 115, 115, 115, 115, 115, 115, 115, 115, 3,
-- 3, 116, 6, 118, 160, 120, 3, 3, 3, 6,
-- 6, 6, 3, 3, 3, 6, 6, 6, 3, 175,
-- 3, 6, 3, 6, 3, 6, 182, 6, 3, 3,
-- 3, 6, 6, 6, 10, 11, 12, 3, 10, 11,
-- 3, 172, 173, 199, 3, 201, 204, 205, 115, 3,
-- 3, 3, 3, 3, 210, 3, 5, 3, 214, 115,
-- 115, 3, 5, 3, 5, 3, 115, 3, 3, 115,
-- 115, 115, 3, 0, 115, 231, 115, 3, 6, 116,
-- 116, 237, 6, 6, 6, 6, 6, 6, 244, 6,
-- 6, 6, 6, 249, 6, 3, 116, 6, 3, 6,
-- 6, 116, 6, 4, 116, 3, 6, 117, 115, 6,
-- 116, 116, 6, 115, 115, 271, 115, 6, 116, 6,
-- 6, 6, 116, 116, 116, 6, 3, 6, 6, 3,
-- 6, 119, 119, 6, 6, 6, 116, 6, 116, 3,
-- 117, 3, 3, 3, 3, 116, 116, 115, 117, 116,
-- 6, 116, 116, 6, 116, 116, 116, 6, 116, 116,
-- 3, 117, 117, 3, 3, 6, 3, 5, 3, 116,
-- 3, 116, 116, 3, 3, 3, 3, 3, 117, 116,
-- 3, 3, 3, 117, 116, 118, 116, 116, 3, 345,
-- 346, 3, 117, 349, 3, 6, 352, 3, 116, 355,
-- 3, 3, 3, 116, 3, 116, 116, 3, 3, -1,
-- 3, 5, 3, 116, 3, 117, 3, 116, 3, 3,
-- 116, 3, 117, 3, 117, 117, 117, 117, 116, 3,
-- 3, 3, 116, 116, 116, 3, 116, 3, 3, 3,
-- 3, 3, 3, 118, 3, 12, 116, 3, 116, 3,
-- 116, 118, 117, 3, 117, 3, 3, 3, 3, 117,
-- 117, 3, 117, 3, 118, 116, 118, 117, 3, 3,
-- 118, 118, 118, 429, 430, 431, 118, 3, 10, 10,
-- 116, 10, 10, 3, 118, 3, 118, 118, 3, 3,
-- 3, 3, 116, 3, 119, 3, 3, 3, 118, 118,
-- 118, 118, 118, 116, 118, 3, 3, 117, 460, 117,
-- 117, 116, 3, 3, 118, 3, 116, 10, 116, 116,
-- 3, 10, 3, 10, 10, 10, 118, 117, 116, 3,
-- 116, 3, 3, 116, 3, 116, 3, 493, 116, 116,
-- 3, 3, 118, 118, 77, -1, -1, 118, 118, 118,
-- -1, -1, -1, -1, 199, -1, 116, -1, 116, 116,
-- -1, 116, -1, -1, -1, 118, 118, 118, -1, 118,
-- -1, 7, 116, 116, 526, 116, -1, -1, 117, 535,
-- 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
-- 26, 27, 28, 29, 30, 31, 32, 33, -1, 118,
-- 36, 37, 38, 39, 40, 41, -1, 43, 44, 45,
-- 46, 47, 48, 49, 50, 51, 52, 53, 54, 55,
-- 56, 57, 118, 59, 60, 61, 62, 63, 64, 65,
-- 66, 67, 68, 69, 70, 71, 72, 73, 74, 118,
-- 76, 77, 78, 118, 80, 81, 82, 83, 84, 85,
-- 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
-- 96, 97, 98, 99, 100, 101, 102, 103, 104, 105,
-- 118, 107, 108, 109, 110, 111, 112, 113, 114
--};
--
--/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
-- symbol of state STATE-NUM. */
--static const yytype_uint8 yystos[] =
--{
-- 0, 7, 16, 17, 18, 19, 20, 21, 22, 23,
-- 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
-- 36, 37, 38, 39, 40, 41, 43, 44, 45, 46,
-- 47, 48, 49, 50, 51, 52, 53, 54, 55, 56,
-- 57, 59, 60, 61, 62, 63, 64, 65, 66, 67,
-- 68, 69, 70, 71, 72, 73, 74, 76, 77, 78,
-- 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
-- 90, 91, 92, 93, 94, 95, 96, 97, 98, 99,
-- 100, 101, 102, 103, 104, 105, 107, 108, 109, 110,
-- 111, 112, 113, 114, 122, 129, 128, 115, 157, 115,
-- 159, 3, 115, 6, 9, 10, 11, 115, 3, 115,
-- 6, 9, 10, 11, 12, 13, 182, 3, 115, 6,
-- 11, 13, 182, 3, 115, 177, 178, 3, 6, 115,
-- 176, 134, 135, 132, 141, 133, 142, 147, 146, 149,
-- 148, 145, 150, 115, 144, 3, 3, 3, 3, 130,
-- 131, 10, 11, 12, 115, 180, 10, 11, 181, 115,
-- 158, 3, 3, 3, 3, 3, 5, 3, 3, 3,
-- 115, 115, 127, 138, 115, 160, 3, 5, 3, 10,
-- 11, 12, 180, 5, 3, 115, 155, 154, 180, 3,
-- 3, 115, 152, 115, 153, 151, 115, 3, 115, 126,
-- 12, 180, 177, 124, 125, 123, 180, 140, 139, 115,
-- 156, 180, 180, 136, 143, 137, 0, 3, 167, 3,
-- 115, 162, 164, 166, 176, 6, 3, 161, 176, 6,
-- 161, 116, 6, 6, 6, 6, 6, 116, 6, 6,
-- 6, 6, 6, 3, 116, 6, 6, 6, 3, 116,
-- 6, 4, 116, 6, 117, 3, 163, 164, 165, 176,
-- 165, 164, 3, 168, 176, 164, 168, 171, 172, 173,
-- 174, 175, 171, 171, 171, 171, 173, 6, 168, 116,
-- 116, 165, 165, 115, 115, 115, 6, 3, 6, 117,
-- 3, 6, 117, 6, 161, 116, 116, 116, 116, 6,
-- 6, 167, 167, 6, 161, 119, 3, 176, 119, 6,
-- 3, 169, 169, 6, 169, 6, 169, 173, 6, 6,
-- 162, 3, 176, 115, 169, 170, 170, 170, 164, 164,
-- 6, 161, 165, 168, 165, 116, 116, 6, 117, 116,
-- 116, 117, 116, 3, 176, 116, 116, 3, 176, 116,
-- 3, 176, 116, 3, 176, 116, 3, 116, 3, 116,
-- 117, 116, 117, 115, 3, 176, 3, 3, 6, 6,
-- 6, 116, 116, 117, 3, 119, 116, 117, 3, 119,
-- 116, 3, 3, 3, 5, 116, 116, 3, 117, 3,
-- 116, 116, 116, 116, 116, 117, 6, 116, 3, 3,
-- 116, 3, 3, 3, 3, 3, 117, 3, 176, 3,
-- 176, 117, 3, 176, 117, 3, 176, 117, 3, 176,
-- 3, 118, 3, 3, 3, 3, 6, 116, 117, 116,
-- 116, 116, 3, 3, 6, 117, 3, 116, 118, 120,
-- 3, 3, 3, 116, 118, 120, 3, 3, 5, 3,
-- 3, 3, 3, 3, 3, 3, 3, 116, 3, 3,
-- 118, 116, 116, 118, 3, 117, 117, 3, 117, 3,
-- 117, 3, 117, 10, 11, 12, 14, 15, 179, 118,
-- 118, 116, 3, 3, 176, 176, 3, 176, 117, 3,
-- 119, 118, 3, 116, 118, 118, 118, 3, 116, 118,
-- 118, 118, 119, 118, 3, 182, 3, 3, 14, 179,
-- 118, 3, 3, 118, 3, 118, 3, 118, 3, 116,
-- 116, 14, 179, 14, 179, 3, 118, 117, 117, 117,
-- 3, 116, 118, 120, 3, 116, 118, 3, 176, 116,
-- 116, 116, 118, 3, 116, 116, 3, 116, 116, 116,
-- 116, 10, 118, 118, 10, 118, 10, 118, 10, 118,
-- 3, 3, 116, 116, 116, 116, 182, 3, 3, 3,
-- 118, 3, 118, 118, 3, 176, 116, 117, 3, 3,
-- 3, 116, 3, 3, 3, 3, 3, 3, 10, 10,
-- 10, 10, 10, 3, 3, 3, 3, 116, 118, 118,
-- 118, 118, 117, 3, 3, 3, 3, 3, 118, 118
--};
--
--#define yyerrok (yyerrstatus = 0)
--#define yyclearin (yychar = YYEMPTY)
--#define YYEMPTY (-2)
--#define YYEOF 0
--
--#define YYACCEPT goto yyacceptlab
--#define YYABORT goto yyabortlab
--#define YYERROR goto yyerrorlab
--
--
--/* Like YYERROR except do call yyerror. This remains here temporarily
-- to ease the transition to the new meaning of YYERROR, for GCC.
-- Once GCC version 2 has supplanted version 1, this can go. */
--
--#define YYFAIL goto yyerrlab
--
--#define YYRECOVERING() (!!yyerrstatus)
--
--#define YYBACKUP(Token, Value) \
--do \
-- if (yychar == YYEMPTY && yylen == 1) \
-- { \
-- yychar = (Token); \
-- yylval = (Value); \
-- yytoken = YYTRANSLATE (yychar); \
-- YYPOPSTACK (1); \
-- goto yybackup; \
-- } \
-- else \
-- { \
-- yyerror (YY_("syntax error: cannot back up")); \
-- YYERROR; \
-- } \
--while (YYID (0))
--
--
--#define YYTERROR 1
--#define YYERRCODE 256
--
--
--/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
-- If N is 0, then set CURRENT to the empty location which ends
-- the previous symbol: RHS[0] (always defined). */
--
--#define YYRHSLOC(Rhs, K) ((Rhs)[K])
--#ifndef YYLLOC_DEFAULT
--# define YYLLOC_DEFAULT(Current, Rhs, N) \
-- do \
-- if (YYID (N)) \
-- { \
-- (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \
-- (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \
-- (Current).last_line = YYRHSLOC (Rhs, N).last_line; \
-- (Current).last_column = YYRHSLOC (Rhs, N).last_column; \
-- } \
-- else \
-- { \
-- (Current).first_line = (Current).last_line = \
-- YYRHSLOC (Rhs, 0).last_line; \
-- (Current).first_column = (Current).last_column = \
-- YYRHSLOC (Rhs, 0).last_column; \
-- } \
-- while (YYID (0))
--#endif
--
--
--/* YY_LOCATION_PRINT -- Print the location on the stream.
-- This macro was not mandated originally: define only if we know
-- we won't break user code: when these are the locations we know. */
--
--#ifndef YY_LOCATION_PRINT
--# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL
--# define YY_LOCATION_PRINT(File, Loc) \
-- fprintf (File, "%d.%d-%d.%d", \
-- (Loc).first_line, (Loc).first_column, \
-- (Loc).last_line, (Loc).last_column)
--# else
--# define YY_LOCATION_PRINT(File, Loc) ((void) 0)
--# endif
--#endif
--
--
--/* YYLEX -- calling `yylex' with the right arguments. */
--
--#ifdef YYLEX_PARAM
--# define YYLEX yylex (YYLEX_PARAM)
--#else
--# define YYLEX yylex ()
--#endif
--
--/* Enable debugging if requested. */
--#if YYDEBUG
--
--# ifndef YYFPRINTF
--# include <stdio.h> /* INFRINGES ON USER NAME SPACE */
--# define YYFPRINTF fprintf
--# endif
--
--# define YYDPRINTF(Args) \
--do { \
-- if (yydebug) \
-- YYFPRINTF Args; \
--} while (YYID (0))
--
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \
--do { \
-- if (yydebug) \
-- { \
-- YYFPRINTF (stderr, "%s ", Title); \
-- yy_symbol_print (stderr, \
-- Type, Value); \
-- YYFPRINTF (stderr, "\n"); \
-- } \
--} while (YYID (0))
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_value_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (!yyvaluep)
-- return;
--# ifdef YYPRINT
-- if (yytype < YYNTOKENS)
-- YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
--# else
-- YYUSE (yyoutput);
--# endif
-- switch (yytype)
-- {
-- default:
-- break;
-- }
--}
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (yytype < YYNTOKENS)
-- YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
-- else
-- YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
--
-- yy_symbol_value_print (yyoutput, yytype, yyvaluep);
-- YYFPRINTF (yyoutput, ")");
--}
--
--/*------------------------------------------------------------------.
--| yy_stack_print -- Print the state stack from its BOTTOM up to its |
--| TOP (included). |
--`------------------------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_stack_print (yytype_int16 *bottom, yytype_int16 *top)
--#else
--static void
--yy_stack_print (bottom, top)
-- yytype_int16 *bottom;
-- yytype_int16 *top;
--#endif
--{
-- YYFPRINTF (stderr, "Stack now");
-- for (; bottom <= top; ++bottom)
-- YYFPRINTF (stderr, " %d", *bottom);
-- YYFPRINTF (stderr, "\n");
--}
--
--# define YY_STACK_PRINT(Bottom, Top) \
--do { \
-- if (yydebug) \
-- yy_stack_print ((Bottom), (Top)); \
--} while (YYID (0))
--
--
--/*------------------------------------------------.
--| Report that the YYRULE is going to be reduced. |
--`------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_reduce_print (YYSTYPE *yyvsp, int yyrule)
--#else
--static void
--yy_reduce_print (yyvsp, yyrule)
-- YYSTYPE *yyvsp;
-- int yyrule;
--#endif
--{
-- int yynrhs = yyr2[yyrule];
-- int yyi;
-- unsigned long int yylno = yyrline[yyrule];
-- YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
-- yyrule - 1, yylno);
-- /* The symbols being reduced. */
-- for (yyi = 0; yyi < yynrhs; yyi++)
-- {
-- fprintf (stderr, " $%d = ", yyi + 1);
-- yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi],
-- &(yyvsp[(yyi + 1) - (yynrhs)])
-- );
-- fprintf (stderr, "\n");
-- }
--}
--
--# define YY_REDUCE_PRINT(Rule) \
--do { \
-- if (yydebug) \
-- yy_reduce_print (yyvsp, Rule); \
--} while (YYID (0))
--
--/* Nonzero means print parse trace. It is left uninitialized so that
-- multiple parsers can coexist. */
--int yydebug;
--#else /* !YYDEBUG */
--# define YYDPRINTF(Args)
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
--# define YY_STACK_PRINT(Bottom, Top)
--# define YY_REDUCE_PRINT(Rule)
--#endif /* !YYDEBUG */
--
--
--/* YYINITDEPTH -- initial size of the parser's stacks. */
--#ifndef YYINITDEPTH
--# define YYINITDEPTH 200
--#endif
--
--/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
-- if the built-in stack extension method is used).
--
-- Do not make this value too large; the results are undefined if
-- YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
-- evaluated with infinite-precision integer arithmetic. */
--
--#ifndef YYMAXDEPTH
--# define YYMAXDEPTH 10000
--#endif
--
--
--
--#if YYERROR_VERBOSE
--
--# ifndef yystrlen
--# if defined __GLIBC__ && defined _STRING_H
--# define yystrlen strlen
--# else
--/* Return the length of YYSTR. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static YYSIZE_T
--yystrlen (const char *yystr)
--#else
--static YYSIZE_T
--yystrlen (yystr)
-- const char *yystr;
--#endif
--{
-- YYSIZE_T yylen;
-- for (yylen = 0; yystr[yylen]; yylen++)
-- continue;
-- return yylen;
--}
--# endif
--# endif
--
--# ifndef yystpcpy
--# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
--# define yystpcpy stpcpy
--# else
--/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
-- YYDEST. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static char *
--yystpcpy (char *yydest, const char *yysrc)
--#else
--static char *
--yystpcpy (yydest, yysrc)
-- char *yydest;
-- const char *yysrc;
--#endif
--{
-- char *yyd = yydest;
-- const char *yys = yysrc;
--
-- while ((*yyd++ = *yys++) != '\0')
-- continue;
--
-- return yyd - 1;
--}
--# endif
--# endif
--
--# ifndef yytnamerr
--/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
-- quotes and backslashes, so that it's suitable for yyerror. The
-- heuristic is that double-quoting is unnecessary unless the string
-- contains an apostrophe, a comma, or backslash (other than
-- backslash-backslash). YYSTR is taken from yytname. If YYRES is
-- null, do not copy; instead, return the length of what the result
-- would have been. */
--static YYSIZE_T
--yytnamerr (char *yyres, const char *yystr)
--{
-- if (*yystr == '"')
-- {
-- YYSIZE_T yyn = 0;
-- char const *yyp = yystr;
--
-- for (;;)
-- switch (*++yyp)
-- {
-- case '\'':
-- case ',':
-- goto do_not_strip_quotes;
--
-- case '\\':
-- if (*++yyp != '\\')
-- goto do_not_strip_quotes;
-- /* Fall through. */
-- default:
-- if (yyres)
-- yyres[yyn] = *yyp;
-- yyn++;
-- break;
--
-- case '"':
-- if (yyres)
-- yyres[yyn] = '\0';
-- return yyn;
-- }
-- do_not_strip_quotes: ;
-- }
--
-- if (! yyres)
-- return yystrlen (yystr);
--
-- return yystpcpy (yyres, yystr) - yyres;
--}
--# endif
--
--/* Copy into YYRESULT an error message about the unexpected token
-- YYCHAR while in state YYSTATE. Return the number of bytes copied,
-- including the terminating null byte. If YYRESULT is null, do not
-- copy anything; just return the number of bytes that would be
-- copied. As a special case, return 0 if an ordinary "syntax error"
-- message will do. Return YYSIZE_MAXIMUM if overflow occurs during
-- size calculation. */
--static YYSIZE_T
--yysyntax_error (char *yyresult, int yystate, int yychar)
--{
-- int yyn = yypact[yystate];
--
-- if (! (YYPACT_NINF < yyn && yyn <= YYLAST))
-- return 0;
-- else
-- {
-- int yytype = YYTRANSLATE (yychar);
-- YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]);
-- YYSIZE_T yysize = yysize0;
-- YYSIZE_T yysize1;
-- int yysize_overflow = 0;
-- enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
-- char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
-- int yyx;
--
--# if 0
-- /* This is so xgettext sees the translatable formats that are
-- constructed on the fly. */
-- YY_("syntax error, unexpected %s");
-- YY_("syntax error, unexpected %s, expecting %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s");
--# endif
-- char *yyfmt;
-- char const *yyf;
-- static char const yyunexpected[] = "syntax error, unexpected %s";
-- static char const yyexpecting[] = ", expecting %s";
-- static char const yyor[] = " or %s";
-- char yyformat[sizeof yyunexpected
-- + sizeof yyexpecting - 1
-- + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2)
-- * (sizeof yyor - 1))];
-- char const *yyprefix = yyexpecting;
--
-- /* Start YYX at -YYN if negative to avoid negative indexes in
-- YYCHECK. */
-- int yyxbegin = yyn < 0 ? -yyn : 0;
--
-- /* Stay within bounds of both yycheck and yytname. */
-- int yychecklim = YYLAST - yyn + 1;
-- int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
-- int yycount = 1;
--
-- yyarg[0] = yytname[yytype];
-- yyfmt = yystpcpy (yyformat, yyunexpected);
--
-- for (yyx = yyxbegin; yyx < yyxend; ++yyx)
-- if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
-- {
-- if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
-- {
-- yycount = 1;
-- yysize = yysize0;
-- yyformat[sizeof yyunexpected - 1] = '\0';
-- break;
-- }
-- yyarg[yycount++] = yytname[yyx];
-- yysize1 = yysize + yytnamerr (0, yytname[yyx]);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
-- yyfmt = yystpcpy (yyfmt, yyprefix);
-- yyprefix = yyor;
-- }
--
-- yyf = YY_(yyformat);
-- yysize1 = yysize + yystrlen (yyf);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
--
-- if (yysize_overflow)
-- return YYSIZE_MAXIMUM;
--
-- if (yyresult)
-- {
-- /* Avoid sprintf, as that infringes on the user's name space.
-- Don't have undefined behavior even if the translation
-- produced a string with the wrong number of "%s"s. */
-- char *yyp = yyresult;
-- int yyi = 0;
-- while ((*yyp = *yyf) != '\0')
-- {
-- if (*yyp == '%' && yyf[1] == 's' && yyi < yycount)
-- {
-- yyp += yytnamerr (yyp, yyarg[yyi++]);
-- yyf += 2;
-- }
-- else
-- {
-- yyp++;
-- yyf++;
-- }
-- }
-- }
-- return yysize;
-- }
--}
--#endif /* YYERROR_VERBOSE */
--
--
--/*-----------------------------------------------.
--| Release the memory associated to this symbol. |
--`-----------------------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep)
--#else
--static void
--yydestruct (yymsg, yytype, yyvaluep)
-- const char *yymsg;
-- int yytype;
-- YYSTYPE *yyvaluep;
--#endif
--{
-- YYUSE (yyvaluep);
--
-- if (!yymsg)
-- yymsg = "Deleting";
-- YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
--
-- switch (yytype)
-- {
--
-- default:
-- break;
-- }
--}
--
--
--/* Prevent warnings from -Wmissing-prototypes. */
--
--#ifdef YYPARSE_PARAM
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void *YYPARSE_PARAM);
--#else
--int yyparse ();
--#endif
--#else /* ! YYPARSE_PARAM */
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void);
--#else
--int yyparse ();
--#endif
--#endif /* ! YYPARSE_PARAM */
--
--
--
--/* The look-ahead symbol. */
--int yychar;
--
--/* The semantic value of the look-ahead symbol. */
--YYSTYPE yylval;
--
--/* Number of syntax errors so far. */
--int yynerrs;
--
--
--
--/*----------.
--| yyparse. |
--`----------*/
--
--#ifdef YYPARSE_PARAM
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void *YYPARSE_PARAM)
--#else
--int
--yyparse (YYPARSE_PARAM)
-- void *YYPARSE_PARAM;
--#endif
--#else /* ! YYPARSE_PARAM */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void)
--#else
--int
--yyparse ()
--
--#endif
--#endif
--{
--
-- int yystate;
-- int yyn;
-- int yyresult;
-- /* Number of tokens to shift before error messages enabled. */
-- int yyerrstatus;
-- /* Look-ahead token as an internal (translated) token number. */
-- int yytoken = 0;
--#if YYERROR_VERBOSE
-- /* Buffer for error messages, and its allocated size. */
-- char yymsgbuf[128];
-- char *yymsg = yymsgbuf;
-- YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
--#endif
--
-- /* Three stacks and their tools:
-- `yyss': related to states,
-- `yyvs': related to semantic values,
-- `yyls': related to locations.
--
-- Refer to the stacks thru separate pointers, to allow yyoverflow
-- to reallocate them elsewhere. */
--
-- /* The state stack. */
-- yytype_int16 yyssa[YYINITDEPTH];
-- yytype_int16 *yyss = yyssa;
-- yytype_int16 *yyssp;
--
-- /* The semantic value stack. */
-- YYSTYPE yyvsa[YYINITDEPTH];
-- YYSTYPE *yyvs = yyvsa;
-- YYSTYPE *yyvsp;
--
--
--
--#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N))
--
-- YYSIZE_T yystacksize = YYINITDEPTH;
--
-- /* The variables used to return semantic value and location from the
-- action routines. */
-- YYSTYPE yyval;
--
--
-- /* The number of symbols on the RHS of the reduced rule.
-- Keep to zero when no symbol should be popped. */
-- int yylen = 0;
--
-- YYDPRINTF ((stderr, "Starting parse\n"));
--
-- yystate = 0;
-- yyerrstatus = 0;
-- yynerrs = 0;
-- yychar = YYEMPTY; /* Cause a token to be read. */
--
-- /* Initialize stack pointers.
-- Waste one element of value and location stack
-- so that they stay on the same level as the state stack.
-- The wasted elements are never initialized. */
--
-- yyssp = yyss;
-- yyvsp = yyvs;
--
-- goto yysetstate;
--
--/*------------------------------------------------------------.
--| yynewstate -- Push a new state, which is found in yystate. |
--`------------------------------------------------------------*/
-- yynewstate:
-- /* In all cases, when you get here, the value and location stacks
-- have just been pushed. So pushing a state here evens the stacks. */
-- yyssp++;
--
-- yysetstate:
-- *yyssp = yystate;
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- {
-- /* Get the current used size of the three stacks, in elements. */
-- YYSIZE_T yysize = yyssp - yyss + 1;
--
--#ifdef yyoverflow
-- {
-- /* Give user a chance to reallocate the stack. Use copies of
-- these so that the &'s don't force the real ones into
-- memory. */
-- YYSTYPE *yyvs1 = yyvs;
-- yytype_int16 *yyss1 = yyss;
--
--
-- /* Each stack pointer address is followed by the size of the
-- data in use in that stack, in bytes. This used to be a
-- conditional around just the two extra args, but that might
-- be undefined if yyoverflow is a macro. */
-- yyoverflow (YY_("memory exhausted"),
-- &yyss1, yysize * sizeof (*yyssp),
-- &yyvs1, yysize * sizeof (*yyvsp),
--
-- &yystacksize);
--
-- yyss = yyss1;
-- yyvs = yyvs1;
-- }
--#else /* no yyoverflow */
--# ifndef YYSTACK_RELOCATE
-- goto yyexhaustedlab;
--# else
-- /* Extend the stack our own way. */
-- if (YYMAXDEPTH <= yystacksize)
-- goto yyexhaustedlab;
-- yystacksize *= 2;
-- if (YYMAXDEPTH < yystacksize)
-- yystacksize = YYMAXDEPTH;
--
-- {
-- yytype_int16 *yyss1 = yyss;
-- union yyalloc *yyptr =
-- (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
-- if (! yyptr)
-- goto yyexhaustedlab;
-- YYSTACK_RELOCATE (yyss);
-- YYSTACK_RELOCATE (yyvs);
--
--# undef YYSTACK_RELOCATE
-- if (yyss1 != yyssa)
-- YYSTACK_FREE (yyss1);
-- }
--# endif
--#endif /* no yyoverflow */
--
-- yyssp = yyss + yysize - 1;
-- yyvsp = yyvs + yysize - 1;
--
--
-- YYDPRINTF ((stderr, "Stack size increased to %lu\n",
-- (unsigned long int) yystacksize));
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- YYABORT;
-- }
--
-- YYDPRINTF ((stderr, "Entering state %d\n", yystate));
--
-- goto yybackup;
--
--/*-----------.
--| yybackup. |
--`-----------*/
--yybackup:
--
-- /* Do appropriate processing given the current state. Read a
-- look-ahead token if we need one and don't already have one. */
--
-- /* First try to decide what to do without reference to look-ahead token. */
-- yyn = yypact[yystate];
-- if (yyn == YYPACT_NINF)
-- goto yydefault;
--
-- /* Not known => get a look-ahead token if don't already have one. */
--
-- /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */
-- if (yychar == YYEMPTY)
-- {
-- YYDPRINTF ((stderr, "Reading a token: "));
-- yychar = YYLEX;
-- }
--
-- if (yychar <= YYEOF)
-- {
-- yychar = yytoken = YYEOF;
-- YYDPRINTF ((stderr, "Now at end of input.\n"));
-- }
-- else
-- {
-- yytoken = YYTRANSLATE (yychar);
-- YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
-- }
--
-- /* If the proper action on seeing token YYTOKEN is to reduce or to
-- detect an error, take that action. */
-- yyn += yytoken;
-- if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
-- goto yydefault;
-- yyn = yytable[yyn];
-- if (yyn <= 0)
-- {
-- if (yyn == 0 || yyn == YYTABLE_NINF)
-- goto yyerrlab;
-- yyn = -yyn;
-- goto yyreduce;
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- /* Count tokens shifted since error; after three, turn off error
-- status. */
-- if (yyerrstatus)
-- yyerrstatus--;
--
-- /* Shift the look-ahead token. */
-- YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
--
-- /* Discard the shifted token unless it is eof. */
-- if (yychar != YYEOF)
-- yychar = YYEMPTY;
--
-- yystate = yyn;
-- *++yyvsp = yylval;
--
-- goto yynewstate;
--
--
--/*-----------------------------------------------------------.
--| yydefault -- do the default action for the current state. |
--`-----------------------------------------------------------*/
--yydefault:
-- yyn = yydefact[yystate];
-- if (yyn == 0)
-- goto yyerrlab;
-- goto yyreduce;
--
--
--/*-----------------------------.
--| yyreduce -- Do a reduction. |
--`-----------------------------*/
--yyreduce:
-- /* yyn is the number of a rule to reduce with. */
-- yylen = yyr2[yyn];
--
-- /* If YYLEN is nonzero, implement the default value of the action:
-- `$$ = $1'.
--
-- Otherwise, the following line sets YYVAL to garbage.
-- This behavior is undocumented and Bison
-- users should not rely upon it. Assigning to YYVAL
-- unconditionally makes the parser a bit smaller, and it avoids a
-- GCC warning that YYVAL may be used uninitialized. */
-- yyval = yyvsp[1-yylen];
--
--
-- YY_REDUCE_PRINT (yyn);
-- switch (yyn)
-- {
-- case 2:
--#line 175 "rx-parse.y"
-- { as_bad (_("Unknown opcode: %s"), rx_init_start); }
-- break;
--
-- case 3:
--#line 180 "rx-parse.y"
-- { B1 (0x00); }
-- break;
--
-- case 4:
--#line 183 "rx-parse.y"
-- { B1 (0x01); }
-- break;
--
-- case 5:
--#line 186 "rx-parse.y"
-- { B1 (0x02); }
-- break;
--
-- case 6:
--#line 189 "rx-parse.y"
-- { B1 (0x03); }
-- break;
--
-- case 7:
--#line 194 "rx-parse.y"
-- { if (rx_disp3op ((yyvsp[(2) - (2)].exp)))
-- { B1 (0x08); rx_disp3 ((yyvsp[(2) - (2)].exp), 5); }
-- else if (rx_intop ((yyvsp[(2) - (2)].exp), 8, 8))
-- { B1 (0x2e); PC1 ((yyvsp[(2) - (2)].exp)); }
-- else if (rx_intop ((yyvsp[(2) - (2)].exp), 16, 16))
-- { B1 (0x38); PC2 ((yyvsp[(2) - (2)].exp)); }
-- else if (rx_intop ((yyvsp[(2) - (2)].exp), 24, 24))
-- { B1 (0x04); PC3 ((yyvsp[(2) - (2)].exp)); }
-- else
-- { rx_relax (RX_RELAX_BRANCH, 0);
-- rx_linkrelax_branch ();
-- /* We'll convert this to a longer one later if needed. */
-- B1 (0x08); rx_disp3 ((yyvsp[(2) - (2)].exp), 5); } }
-- break;
--
-- case 8:
--#line 209 "rx-parse.y"
-- { B1 (0x04); PC3 ((yyvsp[(3) - (3)].exp)); }
-- break;
--
-- case 9:
--#line 212 "rx-parse.y"
-- { B1 (0x08); rx_disp3 ((yyvsp[(3) - (3)].exp), 5); }
-- break;
--
-- case 10:
--#line 217 "rx-parse.y"
-- { if (rx_intop ((yyvsp[(2) - (2)].exp), 16, 16))
-- { B1 (0x39); PC2 ((yyvsp[(2) - (2)].exp)); }
-- else if (rx_intop ((yyvsp[(2) - (2)].exp), 24, 24))
-- { B1 (0x05); PC3 ((yyvsp[(2) - (2)].exp)); }
-- else
-- { rx_relax (RX_RELAX_BRANCH, 0);
-- rx_linkrelax_branch ();
-- B1 (0x39); PC2 ((yyvsp[(2) - (2)].exp)); } }
-- break;
--
-- case 11:
--#line 226 "rx-parse.y"
-- { B1 (0x05), PC3 ((yyvsp[(3) - (3)].exp)); }
-- break;
--
-- case 12:
--#line 231 "rx-parse.y"
-- { if ((yyvsp[(1) - (3)].regno) == COND_EQ || (yyvsp[(1) - (3)].regno) == COND_NE)
-- { B1 ((yyvsp[(1) - (3)].regno) == COND_EQ ? 0x10 : 0x18); rx_disp3 ((yyvsp[(3) - (3)].exp), 5); }
-- else
-- as_bad (_("Only BEQ and BNE may have .S")); }
-- break;
--
-- case 13:
--#line 239 "rx-parse.y"
-- { B1 (0x20); F ((yyvsp[(1) - (3)].regno), 4, 4); PC1 ((yyvsp[(3) - (3)].exp)); }
-- break;
--
-- case 14:
--#line 242 "rx-parse.y"
-- { B1 (0x2e), PC1 ((yyvsp[(3) - (3)].exp)); }
-- break;
--
-- case 15:
--#line 247 "rx-parse.y"
-- { B1 (0x38), PC2 ((yyvsp[(3) - (3)].exp)); }
-- break;
--
-- case 16:
--#line 249 "rx-parse.y"
-- { B1 (0x39), PC2 ((yyvsp[(3) - (3)].exp)); }
-- break;
--
-- case 17:
--#line 251 "rx-parse.y"
-- { if ((yyvsp[(1) - (3)].regno) == COND_EQ || (yyvsp[(1) - (3)].regno) == COND_NE)
-- { B1 ((yyvsp[(1) - (3)].regno) == COND_EQ ? 0x3a : 0x3b); PC2 ((yyvsp[(3) - (3)].exp)); }
-- else
-- as_bad (_("Only BEQ and BNE may have .W")); }
-- break;
--
-- case 18:
--#line 256 "rx-parse.y"
-- { if ((yyvsp[(1) - (2)].regno) == COND_EQ || (yyvsp[(1) - (2)].regno) == COND_NE)
-- {
-- rx_relax (RX_RELAX_BRANCH, 0);
-- rx_linkrelax_branch ();
-- B1 ((yyvsp[(1) - (2)].regno) == COND_EQ ? 0x10 : 0x18); rx_disp3 ((yyvsp[(2) - (2)].exp), 5);
-- }
-- else
-- {
-- rx_relax (RX_RELAX_BRANCH, 0);
-- /* This is because we might turn it into a
-- jump-over-jump long branch. */
-- rx_linkrelax_branch ();
-- B1 (0x20); F ((yyvsp[(1) - (2)].regno), 4, 4); PC1 ((yyvsp[(2) - (2)].exp));
-- } }
-- break;
--
-- case 19:
--#line 275 "rx-parse.y"
-- { if ((yyvsp[(8) - (9)].regno) <= 7 && rx_uintop ((yyvsp[(4) - (9)].exp), 8) && rx_disp5op0 (&(yyvsp[(6) - (9)].exp), BSIZE))
-- { B2 (0x3c, 0); rx_field5s2 ((yyvsp[(6) - (9)].exp)); F ((yyvsp[(8) - (9)].regno), 9, 3); O1 ((yyvsp[(4) - (9)].exp)); }
-- else
-- { B2 (0xf8, 0x04); F ((yyvsp[(8) - (9)].regno), 8, 4); DSP ((yyvsp[(6) - (9)].exp), 6, BSIZE); O1 ((yyvsp[(4) - (9)].exp));
-- if ((yyvsp[(4) - (9)].exp).X_op != O_constant && (yyvsp[(4) - (9)].exp).X_op != O_big) rx_linkrelax_imm (12); } }
-- break;
--
-- case 20:
--#line 282 "rx-parse.y"
-- { if ((yyvsp[(8) - (9)].regno) <= 7 && rx_uintop ((yyvsp[(4) - (9)].exp), 8) && rx_disp5op0 (&(yyvsp[(6) - (9)].exp), WSIZE))
-- { B2 (0x3d, 0); rx_field5s2 ((yyvsp[(6) - (9)].exp)); F ((yyvsp[(8) - (9)].regno), 9, 3); O1 ((yyvsp[(4) - (9)].exp)); }
-- else
-- { B2 (0xf8, 0x01); F ((yyvsp[(8) - (9)].regno), 8, 4); DSP ((yyvsp[(6) - (9)].exp), 6, WSIZE); IMMW ((yyvsp[(4) - (9)].exp), 12); } }
-- break;
--
-- case 21:
--#line 288 "rx-parse.y"
-- { if ((yyvsp[(8) - (9)].regno) <= 7 && rx_uintop ((yyvsp[(4) - (9)].exp), 8) && rx_disp5op0 (&(yyvsp[(6) - (9)].exp), LSIZE))
-- { B2 (0x3e, 0); rx_field5s2 ((yyvsp[(6) - (9)].exp)); F ((yyvsp[(8) - (9)].regno), 9, 3); O1 ((yyvsp[(4) - (9)].exp)); }
-- else
-- { B2 (0xf8, 0x02); F ((yyvsp[(8) - (9)].regno), 8, 4); DSP ((yyvsp[(6) - (9)].exp), 6, LSIZE); IMM ((yyvsp[(4) - (9)].exp), 12); } }
-- break;
--
-- case 22:
--#line 296 "rx-parse.y"
-- { B2 (0x3f, 0); F ((yyvsp[(5) - (7)].regno), 8, 4); F ((yyvsp[(7) - (7)].regno), 12, 4); rtsd_immediate ((yyvsp[(3) - (7)].exp));
-- if ((yyvsp[(5) - (7)].regno) == 0)
-- rx_error (_("RTSD cannot pop R0"));
-- if ((yyvsp[(5) - (7)].regno) > (yyvsp[(7) - (7)].regno))
-- rx_error (_("RTSD first reg must be <= second reg")); }
-- break;
--
-- case 23:
--#line 305 "rx-parse.y"
-- { B2 (0x47, 0); F ((yyvsp[(2) - (4)].regno), 8, 4); F ((yyvsp[(4) - (4)].regno), 12, 4); }
-- break;
--
-- case 24:
--#line 310 "rx-parse.y"
-- { B2 (0x44, 0); F ((yyvsp[(4) - (8)].regno), 8, 4); F ((yyvsp[(8) - (8)].regno), 12, 4); DSP ((yyvsp[(2) - (8)].exp), 6, BSIZE); }
-- break;
--
-- case 25:
--#line 313 "rx-parse.y"
-- { B3 (MEMEX, 0x04, 0); F ((yyvsp[(6) - (8)].regno), 8, 2); F ((yyvsp[(4) - (8)].regno), 16, 4); F ((yyvsp[(8) - (8)].regno), 20, 4); DSP ((yyvsp[(2) - (8)].exp), 14, sizemap[(yyvsp[(6) - (8)].regno)]); }
-- break;
--
-- case 26:
--#line 318 "rx-parse.y"
-- { B2 (0x5b, 0x00); F ((yyvsp[(2) - (5)].regno), 5, 1); F ((yyvsp[(3) - (5)].regno), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); }
-- break;
--
-- case 27:
--#line 323 "rx-parse.y"
-- { B2 (0x58, 0x00); F ((yyvsp[(2) - (7)].regno), 5, 1); F ((yyvsp[(4) - (7)].regno), 8, 4); F ((yyvsp[(7) - (7)].regno), 12, 4); }
-- break;
--
-- case 28:
--#line 326 "rx-parse.y"
-- { if ((yyvsp[(5) - (8)].regno) <= 7 && (yyvsp[(8) - (8)].regno) <= 7 && rx_disp5op (&(yyvsp[(3) - (8)].exp), (yyvsp[(2) - (8)].regno)))
-- { B2 (0xb0, 0); F ((yyvsp[(2) - (8)].regno), 4, 1); F ((yyvsp[(5) - (8)].regno), 9, 3); F ((yyvsp[(8) - (8)].regno), 13, 3); rx_field5s ((yyvsp[(3) - (8)].exp)); }
-- else
-- { B2 (0x58, 0x00); F ((yyvsp[(2) - (8)].regno), 5, 1); F ((yyvsp[(5) - (8)].regno), 8, 4); F ((yyvsp[(8) - (8)].regno), 12, 4); DSP ((yyvsp[(3) - (8)].exp), 6, (yyvsp[(2) - (8)].regno)); } }
-- break;
--
-- case 29:
--#line 334 "rx-parse.y"
-- { if (rx_uintop ((yyvsp[(3) - (5)].exp), 4))
-- { B2 (0x60, 0); FE ((yyvsp[(3) - (5)].exp), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); }
-- else
-- /* This is really an add, but we negate the immediate. */
-- { B2 (0x70, 0); F ((yyvsp[(5) - (5)].regno), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); NIMM ((yyvsp[(3) - (5)].exp), 6); } }
-- break;
--
-- case 30:
--#line 341 "rx-parse.y"
-- { if (rx_uintop ((yyvsp[(3) - (5)].exp), 4))
-- { B2 (0x61, 0); FE ((yyvsp[(3) - (5)].exp), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); }
-- else if (rx_uintop ((yyvsp[(3) - (5)].exp), 8))
-- { B2 (0x75, 0x50); F ((yyvsp[(5) - (5)].regno), 12, 4); UO1 ((yyvsp[(3) - (5)].exp)); }
-- else
-- { B2 (0x74, 0x00); F ((yyvsp[(5) - (5)].regno), 12, 4); IMM ((yyvsp[(3) - (5)].exp), 6); } }
-- break;
--
-- case 31:
--#line 349 "rx-parse.y"
-- { if (rx_uintop ((yyvsp[(3) - (5)].exp), 4))
-- { B2 (0x62, 0); FE ((yyvsp[(3) - (5)].exp), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); }
-- else
-- { B2 (0x70, 0); F ((yyvsp[(5) - (5)].regno), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); IMM ((yyvsp[(3) - (5)].exp), 6); } }
-- break;
--
-- case 32:
--#line 355 "rx-parse.y"
-- { if (rx_uintop ((yyvsp[(3) - (5)].exp), 4))
-- { B2 (0x63, 0); FE ((yyvsp[(3) - (5)].exp), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); }
-- else
-- { B2 (0x74, 0x10); F ((yyvsp[(5) - (5)].regno), 12, 4); IMM ((yyvsp[(3) - (5)].exp), 6); } }
-- break;
--
-- case 33:
--#line 361 "rx-parse.y"
-- { if (rx_uintop ((yyvsp[(3) - (5)].exp), 4))
-- { B2 (0x64, 0); FE ((yyvsp[(3) - (5)].exp), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); }
-- else
-- { B2 (0x74, 0x20); F ((yyvsp[(5) - (5)].regno), 12, 4); IMM ((yyvsp[(3) - (5)].exp), 6); } }
-- break;
--
-- case 34:
--#line 367 "rx-parse.y"
-- { if (rx_uintop ((yyvsp[(3) - (5)].exp), 4))
-- { B2 (0x65, 0); FE ((yyvsp[(3) - (5)].exp), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); }
-- else
-- { B2 (0x74, 0x30); F ((yyvsp[(5) - (5)].regno), 12, 4); IMM ((yyvsp[(3) - (5)].exp), 6); } }
-- break;
--
-- case 35:
--#line 373 "rx-parse.y"
-- { if (rx_uintop ((yyvsp[(4) - (6)].exp), 4))
-- { B2 (0x66, 0); FE ((yyvsp[(4) - (6)].exp), 8, 4); F ((yyvsp[(6) - (6)].regno), 12, 4); }
-- else if (rx_uintop ((yyvsp[(4) - (6)].exp), 8))
-- { B2 (0x75, 0x40); F ((yyvsp[(6) - (6)].regno), 12, 4); UO1 ((yyvsp[(4) - (6)].exp)); }
-- else
-- { B2 (0xfb, 0x02); F ((yyvsp[(6) - (6)].regno), 8, 4); IMM ((yyvsp[(4) - (6)].exp), 12); } }
-- break;
--
-- case 36:
--#line 381 "rx-parse.y"
-- { if (rx_uintop ((yyvsp[(3) - (5)].exp), 4))
-- { B2 (0x66, 0); FE ((yyvsp[(3) - (5)].exp), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); }
-- else if (rx_uintop ((yyvsp[(3) - (5)].exp), 8))
-- { B2 (0x75, 0x40); F ((yyvsp[(5) - (5)].regno), 12, 4); UO1 ((yyvsp[(3) - (5)].exp)); }
-- else
-- { B2 (0xfb, 0x02); F ((yyvsp[(5) - (5)].regno), 8, 4); IMM ((yyvsp[(3) - (5)].exp), 12); } }
-- break;
--
-- case 37:
--#line 391 "rx-parse.y"
-- { B1 (0x67); rtsd_immediate ((yyvsp[(3) - (3)].exp)); }
-- break;
--
-- case 38:
--#line 395 "rx-parse.y"
-- { sub_op = 0; }
-- break;
--
-- case 40:
--#line 396 "rx-parse.y"
-- { sub_op = 1; }
-- break;
--
-- case 42:
--#line 397 "rx-parse.y"
-- { sub_op = 2; }
-- break;
--
-- case 44:
--#line 402 "rx-parse.y"
-- {
-- if ((yyvsp[(2) - (4)].regno) == (yyvsp[(4) - (4)].regno))
-- { B2 (0x7e, 0x80); F (LSIZE, 10, 2); F ((yyvsp[(2) - (4)].regno), 12, 4); }
-- else
-- { B2 (0x6e, 0); F ((yyvsp[(2) - (4)].regno), 8, 4); F ((yyvsp[(4) - (4)].regno), 12, 4); }
-- if ((yyvsp[(2) - (4)].regno) == 0)
-- rx_error (_("PUSHM cannot push R0"));
-- if ((yyvsp[(2) - (4)].regno) > (yyvsp[(4) - (4)].regno))
-- rx_error (_("PUSHM first reg must be <= second reg")); }
-- break;
--
-- case 45:
--#line 415 "rx-parse.y"
-- {
-- if ((yyvsp[(2) - (4)].regno) == (yyvsp[(4) - (4)].regno))
-- { B2 (0x7e, 0xb0); F ((yyvsp[(2) - (4)].regno), 12, 4); }
-- else
-- { B2 (0x6f, 0); F ((yyvsp[(2) - (4)].regno), 8, 4); F ((yyvsp[(4) - (4)].regno), 12, 4); }
-- if ((yyvsp[(2) - (4)].regno) == 0)
-- rx_error (_("POPM cannot pop R0"));
-- if ((yyvsp[(2) - (4)].regno) > (yyvsp[(4) - (4)].regno))
-- rx_error (_("POPM first reg must be <= second reg")); }
-- break;
--
-- case 46:
--#line 428 "rx-parse.y"
-- { B2 (0x70, 0x00); F ((yyvsp[(5) - (7)].regno), 8, 4); F ((yyvsp[(7) - (7)].regno), 12, 4); IMM ((yyvsp[(3) - (7)].exp), 6); }
-- break;
--
-- case 47:
--#line 433 "rx-parse.y"
-- { B2(0x75, 0x60), UO1 ((yyvsp[(3) - (3)].exp)); }
-- break;
--
-- case 48:
--#line 438 "rx-parse.y"
-- { B2 (0x78, 0); FE ((yyvsp[(3) - (5)].exp), 7, 5); F ((yyvsp[(5) - (5)].regno), 12, 4); }
-- break;
--
-- case 49:
--#line 440 "rx-parse.y"
-- { B2 (0x7a, 0); FE ((yyvsp[(3) - (5)].exp), 7, 5); F ((yyvsp[(5) - (5)].regno), 12, 4); }
-- break;
--
-- case 50:
--#line 445 "rx-parse.y"
-- { B2 (0x7c, 0x00); FE ((yyvsp[(3) - (5)].exp), 7, 5); F ((yyvsp[(5) - (5)].regno), 12, 4); }
-- break;
--
-- case 51:
--#line 450 "rx-parse.y"
-- { B2 (0x7e, 0x30); F ((yyvsp[(2) - (2)].regno), 12, 4); }
-- break;
--
-- case 52:
--#line 452 "rx-parse.y"
-- { B2 (0x7e, 0x40); F ((yyvsp[(2) - (2)].regno), 12, 4); }
-- break;
--
-- case 53:
--#line 454 "rx-parse.y"
-- { B2 (0x7e, 0x50); F ((yyvsp[(2) - (2)].regno), 12, 4); }
-- break;
--
-- case 54:
--#line 459 "rx-parse.y"
-- { B2 (0x7e, 0x80); F ((yyvsp[(2) - (3)].regno), 10, 2); F ((yyvsp[(3) - (3)].regno), 12, 4); }
-- break;
--
-- case 55:
--#line 464 "rx-parse.y"
-- { B2 (0x7e, 0xb0); F ((yyvsp[(2) - (2)].regno), 12, 4); }
-- break;
--
-- case 56:
--#line 469 "rx-parse.y"
-- { if ((yyvsp[(2) - (2)].regno) < 16)
-- { B2 (0x7e, 0xc0); F ((yyvsp[(2) - (2)].regno), 12, 4); }
-- else
-- as_bad (_("PUSHC can only push the first 16 control registers")); }
-- break;
--
-- case 57:
--#line 477 "rx-parse.y"
-- { if ((yyvsp[(2) - (2)].regno) < 16)
-- { B2 (0x7e, 0xe0); F ((yyvsp[(2) - (2)].regno), 12, 4); }
-- else
-- as_bad (_("POPC can only pop the first 16 control registers")); }
-- break;
--
-- case 58:
--#line 485 "rx-parse.y"
-- { B2 (0x7f, 0xa0); F ((yyvsp[(2) - (2)].regno), 12, 4); }
-- break;
--
-- case 59:
--#line 487 "rx-parse.y"
-- { B2 (0x7f, 0xb0); F ((yyvsp[(2) - (2)].regno), 12, 4); }
-- break;
--
-- case 60:
--#line 492 "rx-parse.y"
-- { B2 (0x7f, 0x00); F ((yyvsp[(2) - (2)].regno), 12, 4); }
-- break;
--
-- case 61:
--#line 494 "rx-parse.y"
-- { B2 (0x7f, 0x10); F ((yyvsp[(2) - (2)].regno), 12, 4); }
-- break;
--
-- case 62:
--#line 496 "rx-parse.y"
-- { B2 (0x7f, 0x40); F ((yyvsp[(3) - (3)].regno), 12, 4); }
-- break;
--
-- case 63:
--#line 498 "rx-parse.y"
-- { B2 (0x7f, 0x50); F ((yyvsp[(3) - (3)].regno), 12, 4); }
-- break;
--
-- case 64:
--#line 503 "rx-parse.y"
-- { B2 (0x7f, 0x83); }
-- break;
--
-- case 65:
--#line 505 "rx-parse.y"
-- { B2 (0x7f, 0x87); }
-- break;
--
-- case 66:
--#line 507 "rx-parse.y"
-- { B2 (0x7f, 0x8b); }
-- break;
--
-- case 67:
--#line 509 "rx-parse.y"
-- { B2 (0x7f, 0x8f); }
-- break;
--
-- case 68:
--#line 514 "rx-parse.y"
-- { B2 (0x7f, 0x80); F ((yyvsp[(2) - (2)].regno), 14, 2); }
-- break;
--
-- case 69:
--#line 516 "rx-parse.y"
-- { B2 (0x7f, 0x84); F ((yyvsp[(2) - (2)].regno), 14, 2); }
-- break;
--
-- case 70:
--#line 518 "rx-parse.y"
-- { B2 (0x7f, 0x88); F ((yyvsp[(2) - (2)].regno), 14, 2); }
-- break;
--
-- case 71:
--#line 523 "rx-parse.y"
-- { B2 (0x7f, 0x8c); F ((yyvsp[(2) - (2)].regno), 14, 2); }
-- break;
--
-- case 72:
--#line 528 "rx-parse.y"
-- { B2 (0x7f, 0x94); }
-- break;
--
-- case 73:
--#line 530 "rx-parse.y"
-- { B2 (0x7f, 0x95); }
-- break;
--
-- case 74:
--#line 532 "rx-parse.y"
-- { B2 (0x7f, 0x96); }
-- break;
--
-- case 75:
--#line 534 "rx-parse.y"
-- { B2 (0x7f, 0x93); }
-- break;
--
-- case 76:
--#line 539 "rx-parse.y"
-- { B3 (0x75, 0x70, 0x00); FE ((yyvsp[(3) - (3)].exp), 20, 4); }
-- break;
--
-- case 77:
--#line 545 "rx-parse.y"
-- { if ((yyvsp[(3) - (8)].regno) <= 7 && (yyvsp[(7) - (8)].regno) <= 7 && rx_disp5op (&(yyvsp[(5) - (8)].exp), (yyvsp[(2) - (8)].regno)))
-- { B2 (0x80, 0); F ((yyvsp[(2) - (8)].regno), 2, 2); F ((yyvsp[(7) - (8)].regno), 9, 3); F ((yyvsp[(3) - (8)].regno), 13, 3); rx_field5s ((yyvsp[(5) - (8)].exp)); }
-- else
-- { B2 (0xc3, 0x00); F ((yyvsp[(2) - (8)].regno), 2, 2); F ((yyvsp[(7) - (8)].regno), 8, 4); F ((yyvsp[(3) - (8)].regno), 12, 4); DSP ((yyvsp[(5) - (8)].exp), 4, (yyvsp[(2) - (8)].regno)); }}
-- break;
--
-- case 78:
--#line 553 "rx-parse.y"
-- { if ((yyvsp[(5) - (8)].regno) <= 7 && (yyvsp[(8) - (8)].regno) <= 7 && rx_disp5op (&(yyvsp[(3) - (8)].exp), (yyvsp[(2) - (8)].regno)))
-- { B2 (0x88, 0); F ((yyvsp[(2) - (8)].regno), 2, 2); F ((yyvsp[(5) - (8)].regno), 9, 3); F ((yyvsp[(8) - (8)].regno), 13, 3); rx_field5s ((yyvsp[(3) - (8)].exp)); }
-- else
-- { B2 (0xcc, 0x00); F ((yyvsp[(2) - (8)].regno), 2, 2); F ((yyvsp[(5) - (8)].regno), 8, 4); F ((yyvsp[(8) - (8)].regno), 12, 4); DSP ((yyvsp[(3) - (8)].exp), 6, (yyvsp[(2) - (8)].regno)); } }
-- break;
--
-- case 79:
--#line 567 "rx-parse.y"
-- { B2 (0xc3, 0x00); F ((yyvsp[(2) - (7)].regno), 2, 2); F ((yyvsp[(6) - (7)].regno), 8, 4); F ((yyvsp[(3) - (7)].regno), 12, 4); }
-- break;
--
-- case 80:
--#line 572 "rx-parse.y"
-- { B2 (0xc0, 0); F ((yyvsp[(2) - (10)].regno), 2, 2); F ((yyvsp[(4) - (10)].regno), 8, 4); F ((yyvsp[(9) - (10)].regno), 12, 4); DSP ((yyvsp[(7) - (10)].exp), 4, (yyvsp[(2) - (10)].regno)); }
-- break;
--
-- case 81:
--#line 577 "rx-parse.y"
-- { B2 (0xc0, 0x00); F ((yyvsp[(2) - (11)].regno), 2, 2); F ((yyvsp[(5) - (11)].regno), 8, 4); F ((yyvsp[(10) - (11)].regno), 12, 4); DSP ((yyvsp[(3) - (11)].exp), 6, (yyvsp[(2) - (11)].regno)); DSP ((yyvsp[(8) - (11)].exp), 4, (yyvsp[(2) - (11)].regno)); }
-- break;
--
-- case 82:
--#line 582 "rx-parse.y"
-- { B2 (0xcf, 0x00); F ((yyvsp[(2) - (5)].regno), 2, 2); F ((yyvsp[(3) - (5)].regno), 8, 4); F ((yyvsp[(5) - (5)].regno), 12, 4); }
-- break;
--
-- case 83:
--#line 587 "rx-parse.y"
-- { B2 (0xcc, 0x00); F ((yyvsp[(2) - (7)].regno), 2, 2); F ((yyvsp[(4) - (7)].regno), 8, 4); F ((yyvsp[(7) - (7)].regno), 12, 4); }
-- break;
--
-- case 84:
--#line 592 "rx-parse.y"
-- { B2 (0xf0, 0x00); F ((yyvsp[(7) - (9)].regno), 8, 4); FE ((yyvsp[(3) - (9)].exp), 13, 3); DSP ((yyvsp[(5) - (9)].exp), 6, BSIZE); }
-- break;
--
-- case 85:
--#line 594 "rx-parse.y"
-- { B2 (0xf0, 0x08); F ((yyvsp[(7) - (9)].regno), 8, 4); FE ((yyvsp[(3) - (9)].exp), 13, 3); DSP ((yyvsp[(5) - (9)].exp), 6, BSIZE); }
-- break;
--
-- case 86:
--#line 596 "rx-parse.y"
-- { B2 (0xf4, 0x00); F ((yyvsp[(7) - (9)].regno), 8, 4); FE ((yyvsp[(3) - (9)].exp), 13, 3); DSP ((yyvsp[(5) - (9)].exp), 6, BSIZE); }
-- break;
--
-- case 87:
--#line 601 "rx-parse.y"
-- { B2 (0xf4, 0x08); F ((yyvsp[(2) - (6)].regno), 14, 2); F ((yyvsp[(5) - (6)].regno), 8, 4); DSP ((yyvsp[(3) - (6)].exp), 6, (yyvsp[(2) - (6)].regno)); }
-- break;
--
-- case 88:
--#line 605 "rx-parse.y"
-- { sub_op = 0; }
-- break;
--
-- case 90:
--#line 606 "rx-parse.y"
-- { sub_op = 1; sub_op2 = 1; }
-- break;
--
-- case 92:
--#line 607 "rx-parse.y"
-- { sub_op = 2; }
-- break;
--
-- case 94:
--#line 608 "rx-parse.y"
-- { sub_op = 3; sub_op2 = 2; }
-- break;
--
-- case 96:
--#line 609 "rx-parse.y"
-- { sub_op = 4; }
-- break;
--
-- case 98:
--#line 610 "rx-parse.y"
-- { sub_op = 5; }
-- break;
--
-- case 100:
--#line 611 "rx-parse.y"
-- { sub_op = 6; }
-- break;
--
-- case 102:
--#line 612 "rx-parse.y"
-- { sub_op = 7; }
-- break;
--
-- case 104:
--#line 613 "rx-parse.y"
-- { sub_op = 8; }
-- break;
--
-- case 106:
--#line 614 "rx-parse.y"
-- { sub_op = 9; }
-- break;
--
-- case 108:
--#line 615 "rx-parse.y"
-- { sub_op = 12; }
-- break;
--
-- case 110:
--#line 616 "rx-parse.y"
-- { sub_op = 13; }
-- break;
--
-- case 112:
--#line 617 "rx-parse.y"
-- { sub_op = 14; sub_op2 = 0; }
-- break;
--
-- case 114:
--#line 618 "rx-parse.y"
-- { sub_op = 14; }
-- break;
--
-- case 116:
--#line 619 "rx-parse.y"
-- { sub_op = 15; }
-- break;
--
-- case 118:
--#line 623 "rx-parse.y"
-- { sub_op = 6; }
-- break;
--
-- case 120:
--#line 624 "rx-parse.y"
-- { sub_op = 7; }
-- break;
--
-- case 122:
--#line 625 "rx-parse.y"
-- { sub_op = 16; }
-- break;
--
-- case 124:
--#line 626 "rx-parse.y"
-- { sub_op = 17; }
-- break;
--
-- case 126:
--#line 631 "rx-parse.y"
-- { id24 (1, 0x63, 0x00); F ((yyvsp[(4) - (4)].regno), 16, 4); F ((yyvsp[(2) - (4)].regno), 20, 4); }
-- break;
--
-- case 127:
--#line 633 "rx-parse.y"
-- { id24 (1, 0x67, 0x00); F ((yyvsp[(4) - (4)].regno), 16, 4); F ((yyvsp[(2) - (4)].regno), 20, 4); }
-- break;
--
-- case 128:
--#line 635 "rx-parse.y"
-- { id24 (1, 0x6b, 0x00); F ((yyvsp[(4) - (4)].regno), 16, 4); F ((yyvsp[(2) - (4)].regno), 20, 4); }
-- break;
--
-- case 129:
--#line 637 "rx-parse.y"
-- { id24 (1, 0x6f, 0x00); F ((yyvsp[(4) - (4)].regno), 16, 4); F ((yyvsp[(2) - (4)].regno), 20, 4); }
-- break;
--
-- case 130:
--#line 640 "rx-parse.y"
-- { id24 (1, 0x60, 0x00); F ((yyvsp[(6) - (8)].regno), 16, 4); F ((yyvsp[(2) - (8)].regno), 20, 4); DSP ((yyvsp[(4) - (8)].exp), 14, BSIZE); }
-- break;
--
-- case 131:
--#line 642 "rx-parse.y"
-- { id24 (1, 0x64, 0x00); F ((yyvsp[(6) - (8)].regno), 16, 4); F ((yyvsp[(2) - (8)].regno), 20, 4); DSP ((yyvsp[(4) - (8)].exp), 14, BSIZE); }
-- break;
--
-- case 132:
--#line 644 "rx-parse.y"
-- { id24 (1, 0x68, 0x00); F ((yyvsp[(6) - (8)].regno), 16, 4); F ((yyvsp[(2) - (8)].regno), 20, 4); DSP ((yyvsp[(4) - (8)].exp), 14, BSIZE); }
-- break;
--
-- case 133:
--#line 646 "rx-parse.y"
-- { id24 (1, 0x6c, 0x00); F ((yyvsp[(6) - (8)].regno), 16, 4); F ((yyvsp[(2) - (8)].regno), 20, 4); DSP ((yyvsp[(4) - (8)].exp), 14, BSIZE); }
-- break;
--
-- case 134:
--#line 650 "rx-parse.y"
-- { sub_op = 0; }
-- break;
--
-- case 136:
--#line 651 "rx-parse.y"
-- { sub_op = 1; }
-- break;
--
-- case 138:
--#line 652 "rx-parse.y"
-- { sub_op = 2; }
-- break;
--
-- case 140:
--#line 653 "rx-parse.y"
-- { sub_op = 3; }
-- break;
--
-- case 142:
--#line 654 "rx-parse.y"
-- { sub_op = 4; }
-- break;
--
-- case 144:
--#line 655 "rx-parse.y"
-- { sub_op = 5; }
-- break;
--
-- case 146:
--#line 656 "rx-parse.y"
-- { sub_op = 6; }
-- break;
--
-- case 148:
--#line 661 "rx-parse.y"
-- { id24 (1, 0xdb, 0x00); F ((yyvsp[(1) - (3)].regno), 20, 4); F ((yyvsp[(3) - (3)].regno), 16, 4); }
-- break;
--
-- case 149:
--#line 663 "rx-parse.y"
-- { id24 (1, 0xd0, 0x00); F ((yyvsp[(1) - (6)].regno), 20, 4); F ((yyvsp[(2) - (6)].regno), 12, 2); F ((yyvsp[(5) - (6)].regno), 16, 4); DSP ((yyvsp[(3) - (6)].exp), 14, (yyvsp[(2) - (6)].regno)); }
-- break;
--
-- case 150:
--#line 668 "rx-parse.y"
-- { id24 (1, 0xe0, 0x00); F ((yyvsp[(1) - (9)].regno), 20, 4); FE ((yyvsp[(3) - (9)].exp), 11, 3);
-- F ((yyvsp[(7) - (9)].regno), 16, 4); DSP ((yyvsp[(5) - (9)].exp), 14, BSIZE); }
-- break;
--
-- case 151:
--#line 674 "rx-parse.y"
-- { id24 (1, 0xe0, 0x0f); FE ((yyvsp[(3) - (9)].exp), 11, 3); F ((yyvsp[(7) - (9)].regno), 16, 4);
-- DSP ((yyvsp[(5) - (9)].exp), 14, BSIZE); }
-- break;
--
-- case 152:
--#line 680 "rx-parse.y"
-- { id24 (2, 0x00, 0x00); F ((yyvsp[(2) - (4)].regno), 16, 4); F ((yyvsp[(4) - (4)].regno), 20, 4); }
-- break;
--
-- case 153:
--#line 682 "rx-parse.y"
-- { id24 (2, 0x01, 0x00); F ((yyvsp[(2) - (4)].regno), 16, 4); F ((yyvsp[(4) - (4)].regno), 20, 4); }
-- break;
--
-- case 154:
--#line 684 "rx-parse.y"
-- { id24 (2, 0x04, 0x00); F ((yyvsp[(2) - (4)].regno), 16, 4); F ((yyvsp[(4) - (4)].regno), 20, 4); }
-- break;
--
-- case 155:
--#line 686 "rx-parse.y"
-- { id24 (2, 0x05, 0x00); F ((yyvsp[(2) - (4)].regno), 16, 4); F ((yyvsp[(4) - (4)].regno), 20, 4); }
-- break;
--
-- case 156:
--#line 692 "rx-parse.y"
-- { id24 (2, 0x17, 0x00); F ((yyvsp[(2) - (2)].regno), 20, 4); }
-- break;
--
-- case 157:
--#line 694 "rx-parse.y"
-- { id24 (2, 0x17, 0x10); F ((yyvsp[(2) - (2)].regno), 20, 4); }
-- break;
--
-- case 158:
--#line 696 "rx-parse.y"
-- { id24 (2, 0x1f, 0x00); F ((yyvsp[(2) - (2)].regno), 20, 4); }
-- break;
--
-- case 159:
--#line 698 "rx-parse.y"
-- { id24 (2, 0x1f, 0x20); F ((yyvsp[(2) - (2)].regno), 20, 4); }
-- break;
--
-- case 160:
--#line 700 "rx-parse.y"
-- { id24 (2, 0x1f, 0x10); F ((yyvsp[(2) - (2)].regno), 20, 4); }
-- break;
--
-- case 161:
--#line 703 "rx-parse.y"
-- { id24 (2, 0x18, 0x00);
-- if (rx_uintop ((yyvsp[(3) - (3)].exp), 4) && (yyvsp[(3) - (3)].exp).X_add_number == 1)
-- ;
-- else if (rx_uintop ((yyvsp[(3) - (3)].exp), 4) && (yyvsp[(3) - (3)].exp).X_add_number == 2)
-- F (1, 19, 1);
-- else
-- as_bad (_("RACW expects #1 or #2"));}
-- break;
--
-- case 162:
--#line 714 "rx-parse.y"
-- { id24 (2, 0x20, 0); F ((yyvsp[(2) - (8)].regno), 14, 2); F ((yyvsp[(6) - (8)].regno), 16, 4); F ((yyvsp[(3) - (8)].regno), 20, 4); }
-- break;
--
-- case 163:
--#line 716 "rx-parse.y"
-- { id24 (2, 0x24, 0); F ((yyvsp[(2) - (8)].regno), 14, 2); F ((yyvsp[(7) - (8)].regno), 16, 4); F ((yyvsp[(3) - (8)].regno), 20, 4); }
-- break;
--
-- case 164:
--#line 721 "rx-parse.y"
-- { id24 (2, 0x28, 0); F ((yyvsp[(2) - (8)].regno), 14, 2); F ((yyvsp[(4) - (8)].regno), 16, 4); F ((yyvsp[(8) - (8)].regno), 20, 4); }
-- break;
--
-- case 165:
--#line 723 "rx-parse.y"
-- { id24 (2, 0x2c, 0); F ((yyvsp[(2) - (8)].regno), 14, 2); F ((yyvsp[(5) - (8)].regno), 16, 4); F ((yyvsp[(8) - (8)].regno), 20, 4); }
-- break;
--
-- case 166:
--#line 728 "rx-parse.y"
-- { id24 (2, 0x38, 0); F ((yyvsp[(2) - (8)].regno), 15, 1); F ((yyvsp[(4) - (8)].regno), 16, 4); F ((yyvsp[(8) - (8)].regno), 20, 4); }
-- break;
--
-- case 167:
--#line 730 "rx-parse.y"
-- { id24 (2, 0x3c, 0); F ((yyvsp[(2) - (8)].regno), 15, 1); F ((yyvsp[(5) - (8)].regno), 16, 4); F ((yyvsp[(8) - (8)].regno), 20, 4); }
-- break;
--
-- case 168:
--#line 734 "rx-parse.y"
-- { sub_op = 6; }
-- break;
--
-- case 170:
--#line 735 "rx-parse.y"
-- { sub_op = 4; }
-- break;
--
-- case 172:
--#line 736 "rx-parse.y"
-- { sub_op = 5; }
-- break;
--
-- case 174:
--#line 737 "rx-parse.y"
-- { sub_op = 7; }
-- break;
--
-- case 176:
--#line 742 "rx-parse.y"
-- { id24 (2, 0x68, 0x00); F ((yyvsp[(4) - (4)].regno) % 16, 20, 4); F ((yyvsp[(4) - (4)].regno) / 16, 15, 1);
-- F ((yyvsp[(2) - (4)].regno), 16, 4); }
-- break;
--
-- case 177:
--#line 748 "rx-parse.y"
-- { id24 (2, 0x6a, 0); F ((yyvsp[(2) - (4)].regno), 15, 5); F ((yyvsp[(4) - (4)].regno), 20, 4); }
-- break;
--
-- case 178:
--#line 753 "rx-parse.y"
-- { id24 (2, 0x6e, 0); FE ((yyvsp[(3) - (5)].exp), 15, 5); F ((yyvsp[(5) - (5)].regno), 20, 4); }
-- break;
--
-- case 179:
--#line 755 "rx-parse.y"
-- { id24 (2, 0x6c, 0); FE ((yyvsp[(3) - (5)].exp), 15, 5); F ((yyvsp[(5) - (5)].regno), 20, 4); }
-- break;
--
-- case 180:
--#line 760 "rx-parse.y"
-- { id24 (2, 0x73, 0x00); F ((yyvsp[(5) - (5)].regno), 19, 5); IMM ((yyvsp[(3) - (5)].exp), 12); }
-- break;
--
-- case 181:
--#line 765 "rx-parse.y"
-- { id24 (2, 0xe0, 0x00); F ((yyvsp[(1) - (5)].regno), 16, 4); FE ((yyvsp[(3) - (5)].exp), 11, 5);
-- F ((yyvsp[(5) - (5)].regno), 20, 4); }
-- break;
--
-- case 182:
--#line 771 "rx-parse.y"
-- { id24 (2, 0xe0, 0xf0); FE ((yyvsp[(3) - (5)].exp), 11, 5); F ((yyvsp[(5) - (5)].regno), 20, 4); }
-- break;
--
-- case 183:
--#line 776 "rx-parse.y"
-- { id24 (3, 0x00, 0); F ((yyvsp[(2) - (9)].regno), 10, 2); F ((yyvsp[(6) - (9)].regno), 12, 4); F ((yyvsp[(8) - (9)].regno), 16, 4); F ((yyvsp[(3) - (9)].regno), 20, 4); }
-- break;
--
-- case 184:
--#line 779 "rx-parse.y"
-- { id24 (3, 0x40, 0); F ((yyvsp[(2) - (9)].regno), 10, 2); F ((yyvsp[(4) - (9)].regno), 12, 4); F ((yyvsp[(6) - (9)].regno), 16, 4); F ((yyvsp[(9) - (9)].regno), 20, 4); }
-- break;
--
-- case 185:
--#line 782 "rx-parse.y"
-- { id24 (3, 0xc0, 0); F ((yyvsp[(2) - (9)].regno), 10, 2); F ((yyvsp[(4) - (9)].regno), 12, 4); F ((yyvsp[(6) - (9)].regno), 16, 4); F ((yyvsp[(9) - (9)].regno), 20, 4); }
-- break;
--
-- case 186:
--#line 786 "rx-parse.y"
-- { sub_op = 0; }
-- break;
--
-- case 188:
--#line 787 "rx-parse.y"
-- { sub_op = 2; }
-- break;
--
-- case 190:
--#line 788 "rx-parse.y"
-- { sub_op = 3; }
-- break;
--
-- case 192:
--#line 789 "rx-parse.y"
-- { sub_op = 4; }
-- break;
--
-- case 194:
--#line 790 "rx-parse.y"
-- { sub_op = 5; }
-- break;
--
-- case 196:
--#line 796 "rx-parse.y"
-- { id24 (2, 0x70, 0x20); F ((yyvsp[(5) - (5)].regno), 20, 4); NBIMM ((yyvsp[(3) - (5)].exp), 12); }
-- break;
--
-- case 197:
--#line 806 "rx-parse.y"
-- { B2 (0x43 + (sub_op<<2), 0); F ((yyvsp[(1) - (3)].regno), 8, 4); F ((yyvsp[(3) - (3)].regno), 12, 4); }
-- break;
--
-- case 198:
--#line 808 "rx-parse.y"
-- { B2 (0x40 + (sub_op<<2), 0); F ((yyvsp[(3) - (7)].regno), 8, 4); F ((yyvsp[(7) - (7)].regno), 12, 4); DSP ((yyvsp[(1) - (7)].exp), 6, BSIZE); }
-- break;
--
-- case 199:
--#line 810 "rx-parse.y"
-- { B3 (MEMEX, sub_op<<2, 0); F ((yyvsp[(5) - (7)].regno), 8, 2); F ((yyvsp[(3) - (7)].regno), 16, 4); F ((yyvsp[(7) - (7)].regno), 20, 4); DSP ((yyvsp[(1) - (7)].exp), 14, sizemap[(yyvsp[(5) - (7)].regno)]); }
-- break;
--
-- case 200:
--#line 812 "rx-parse.y"
-- { id24 (4, sub_op<<4, 0), F ((yyvsp[(5) - (5)].regno), 12, 4), F ((yyvsp[(1) - (5)].regno), 16, 4), F ((yyvsp[(3) - (5)].regno), 20, 4); }
-- break;
--
-- case 201:
--#line 819 "rx-parse.y"
-- { id24 (1, 0x03 + (sub_op<<2), 0x00); F ((yyvsp[(1) - (3)].regno), 16, 4); F ((yyvsp[(3) - (3)].regno), 20, 4); }
-- break;
--
-- case 202:
--#line 821 "rx-parse.y"
-- { B4 (MEMEX, 0xa0, 0x00 + sub_op, 0x00);
-- F ((yyvsp[(3) - (7)].regno), 24, 4); F ((yyvsp[(7) - (7)].regno), 28, 4); DSP ((yyvsp[(1) - (7)].exp), 14, LSIZE); }
-- break;
--
-- case 203:
--#line 829 "rx-parse.y"
-- { id24 (1, 0x03 + (sub_op<<2), 0x00); F ((yyvsp[(1) - (3)].regno), 16, 4); F ((yyvsp[(3) - (3)].regno), 20, 4); }
-- break;
--
-- case 204:
--#line 831 "rx-parse.y"
-- { id24 (1, 0x00 + (sub_op<<2), 0x00); F ((yyvsp[(3) - (7)].regno), 16, 4); F ((yyvsp[(7) - (7)].regno), 20, 4); DSP ((yyvsp[(1) - (7)].exp), 14, BSIZE); }
-- break;
--
-- case 205:
--#line 833 "rx-parse.y"
-- { B4 (MEMEX, 0x20 + ((yyvsp[(5) - (7)].regno) << 6), 0x00 + sub_op, 0x00);
-- F ((yyvsp[(3) - (7)].regno), 24, 4); F ((yyvsp[(7) - (7)].regno), 28, 4); DSP ((yyvsp[(1) - (7)].exp), 14, sizemap[(yyvsp[(5) - (7)].regno)]); }
-- break;
--
-- case 206:
--#line 839 "rx-parse.y"
-- { id24 (2, 0x70, sub_op<<4); F ((yyvsp[(4) - (4)].regno), 20, 4); IMM ((yyvsp[(2) - (4)].exp), 12); }
-- break;
--
-- case 211:
--#line 854 "rx-parse.y"
-- { id24 (1, 0x03 + (sub_op<<2), 0x00); F ((yyvsp[(1) - (3)].regno), 16, 4); F ((yyvsp[(3) - (3)].regno), 20, 4); }
-- break;
--
-- case 212:
--#line 856 "rx-parse.y"
-- { B2 (0x7e, sub_op2 << 4); F ((yyvsp[(1) - (1)].regno), 12, 4); }
-- break;
--
-- case 213:
--#line 862 "rx-parse.y"
-- { id24 (1, 0x03 + (sub_op<<2), 0); F ((yyvsp[(1) - (3)].regno), 16, 4); F ((yyvsp[(3) - (3)].regno), 20, 4); }
-- break;
--
-- case 214:
--#line 864 "rx-parse.y"
-- { id24 (1, 0x00 + (sub_op<<2), 0); F ((yyvsp[(3) - (7)].regno), 16, 4); F ((yyvsp[(7) - (7)].regno), 20, 4); DSP ((yyvsp[(1) - (7)].exp), 14, BSIZE); }
-- break;
--
-- case 215:
--#line 866 "rx-parse.y"
-- { B4 (MEMEX, 0x20, 0x00 + sub_op, 0); F ((yyvsp[(5) - (7)].regno), 8, 2); F ((yyvsp[(3) - (7)].regno), 24, 4); F ((yyvsp[(7) - (7)].regno), 28, 4);
-- DSP ((yyvsp[(1) - (7)].exp), 14, sizemap[(yyvsp[(5) - (7)].regno)]); }
-- break;
--
-- case 216:
--#line 873 "rx-parse.y"
-- { id24 (2, 0x60 + sub_op, 0); F ((yyvsp[(1) - (3)].regno), 16, 4); F ((yyvsp[(3) - (3)].regno), 20, 4); }
-- break;
--
-- case 217:
--#line 877 "rx-parse.y"
-- { B2 (0x68 + (sub_op<<1), 0); FE ((yyvsp[(2) - (4)].exp), 7, 5); F ((yyvsp[(4) - (4)].regno), 12, 4); }
-- break;
--
-- case 218:
--#line 879 "rx-parse.y"
-- { id24 (2, 0x80 + (sub_op << 5), 0); FE ((yyvsp[(2) - (6)].exp), 11, 5); F ((yyvsp[(4) - (6)].regno), 16, 4); F ((yyvsp[(6) - (6)].regno), 20, 4); }
-- break;
--
-- case 220:
--#line 885 "rx-parse.y"
-- { rx_check_float_support (); }
-- break;
--
-- case 221:
--#line 887 "rx-parse.y"
-- { id24 (2, 0x72, sub_op << 4); F ((yyvsp[(5) - (5)].regno), 20, 4); O4 ((yyvsp[(3) - (5)].exp)); }
-- break;
--
-- case 223:
--#line 892 "rx-parse.y"
-- { rx_check_float_support (); }
-- break;
--
-- case 224:
--#line 894 "rx-parse.y"
-- { id24 (1, 0x83 + (sub_op << 2), 0); F ((yyvsp[(2) - (4)].regno), 16, 4); F ((yyvsp[(4) - (4)].regno), 20, 4); }
-- break;
--
-- case 225:
--#line 895 "rx-parse.y"
-- { rx_check_float_support (); }
-- break;
--
-- case 226:
--#line 897 "rx-parse.y"
-- { id24 (1, 0x80 + (sub_op << 2), 0); F ((yyvsp[(4) - (8)].regno), 16, 4); F ((yyvsp[(8) - (8)].regno), 20, 4); DSP ((yyvsp[(2) - (8)].exp), 14, LSIZE); }
-- break;
--
-- case 227:
--#line 902 "rx-parse.y"
-- { (yyval.exp) = zero_expr (); }
-- break;
--
-- case 228:
--#line 903 "rx-parse.y"
-- { (yyval.exp) = (yyvsp[(1) - (1)].exp); }
-- break;
--
-- case 229:
--#line 906 "rx-parse.y"
-- { need_flag = 1; }
-- break;
--
-- case 230:
--#line 906 "rx-parse.y"
-- { need_flag = 0; (yyval.regno) = (yyvsp[(2) - (2)].regno); }
-- break;
--
-- case 231:
--#line 911 "rx-parse.y"
-- { (yyval.regno) = 0; }
-- break;
--
-- case 232:
--#line 912 "rx-parse.y"
-- { (yyval.regno) = 1; }
-- break;
--
-- case 233:
--#line 913 "rx-parse.y"
-- { (yyval.regno) = 2; }
-- break;
--
-- case 234:
--#line 914 "rx-parse.y"
-- { (yyval.regno) = 2; }
-- break;
--
-- case 235:
--#line 915 "rx-parse.y"
-- { (yyval.regno) = 3; }
-- break;
--
-- case 236:
--#line 918 "rx-parse.y"
-- { (yyval.regno) = LSIZE; }
-- break;
--
-- case 237:
--#line 919 "rx-parse.y"
-- { (yyval.regno) = BSIZE; }
-- break;
--
-- case 238:
--#line 920 "rx-parse.y"
-- { (yyval.regno) = WSIZE; }
-- break;
--
-- case 239:
--#line 921 "rx-parse.y"
-- { (yyval.regno) = LSIZE; }
-- break;
--
-- case 240:
--#line 924 "rx-parse.y"
-- { (yyval.regno) = 1; }
-- break;
--
-- case 241:
--#line 925 "rx-parse.y"
-- { (yyval.regno) = 0; }
-- break;
--
-- case 242:
--#line 926 "rx-parse.y"
-- { (yyval.regno) = 1; }
-- break;
--
-- case 243:
--#line 929 "rx-parse.y"
-- {}
-- break;
--
-- case 244:
--#line 930 "rx-parse.y"
-- {}
-- break;
--
--
--/* Line 1267 of yacc.c. */
--#line 3318 "rx-parse.c"
-- default: break;
-- }
-- YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
--
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
--
-- *++yyvsp = yyval;
--
--
-- /* Now `shift' the result of the reduction. Determine what state
-- that goes to, based on the state we popped back to and the rule
-- number reduced by. */
--
-- yyn = yyr1[yyn];
--
-- yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
-- if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
-- yystate = yytable[yystate];
-- else
-- yystate = yydefgoto[yyn - YYNTOKENS];
--
-- goto yynewstate;
--
--
--/*------------------------------------.
--| yyerrlab -- here on detecting error |
--`------------------------------------*/
--yyerrlab:
-- /* If not already recovering from an error, report this error. */
-- if (!yyerrstatus)
-- {
-- ++yynerrs;
--#if ! YYERROR_VERBOSE
-- yyerror (YY_("syntax error"));
--#else
-- {
-- YYSIZE_T yysize = yysyntax_error (0, yystate, yychar);
-- if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM)
-- {
-- YYSIZE_T yyalloc = 2 * yysize;
-- if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM))
-- yyalloc = YYSTACK_ALLOC_MAXIMUM;
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
-- yymsg = (char *) YYSTACK_ALLOC (yyalloc);
-- if (yymsg)
-- yymsg_alloc = yyalloc;
-- else
-- {
-- yymsg = yymsgbuf;
-- yymsg_alloc = sizeof yymsgbuf;
-- }
-- }
--
-- if (0 < yysize && yysize <= yymsg_alloc)
-- {
-- (void) yysyntax_error (yymsg, yystate, yychar);
-- yyerror (yymsg);
-- }
-- else
-- {
-- yyerror (YY_("syntax error"));
-- if (yysize != 0)
-- goto yyexhaustedlab;
-- }
-- }
--#endif
-- }
--
--
--
-- if (yyerrstatus == 3)
-- {
-- /* If just tried and failed to reuse look-ahead token after an
-- error, discard it. */
--
-- if (yychar <= YYEOF)
-- {
-- /* Return failure if at end of input. */
-- if (yychar == YYEOF)
-- YYABORT;
-- }
-- else
-- {
-- yydestruct ("Error: discarding",
-- yytoken, &yylval);
-- yychar = YYEMPTY;
-- }
-- }
--
-- /* Else will try to reuse look-ahead token after shifting the error
-- token. */
-- goto yyerrlab1;
--
--
--/*---------------------------------------------------.
--| yyerrorlab -- error raised explicitly by YYERROR. |
--`---------------------------------------------------*/
--yyerrorlab:
--
-- /* Pacify compilers like GCC when the user code never invokes
-- YYERROR and the label yyerrorlab therefore never appears in user
-- code. */
-- if (/*CONSTCOND*/ 0)
-- goto yyerrorlab;
--
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYERROR. */
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
-- yystate = *yyssp;
-- goto yyerrlab1;
--
--
--/*-------------------------------------------------------------.
--| yyerrlab1 -- common code for both syntax error and YYERROR. |
--`-------------------------------------------------------------*/
--yyerrlab1:
-- yyerrstatus = 3; /* Each real token shifted decrements this. */
--
-- for (;;)
-- {
-- yyn = yypact[yystate];
-- if (yyn != YYPACT_NINF)
-- {
-- yyn += YYTERROR;
-- if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
-- {
-- yyn = yytable[yyn];
-- if (0 < yyn)
-- break;
-- }
-- }
--
-- /* Pop the current state because it cannot handle the error token. */
-- if (yyssp == yyss)
-- YYABORT;
--
--
-- yydestruct ("Error: popping",
-- yystos[yystate], yyvsp);
-- YYPOPSTACK (1);
-- yystate = *yyssp;
-- YY_STACK_PRINT (yyss, yyssp);
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- *++yyvsp = yylval;
--
--
-- /* Shift the error token. */
-- YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
--
-- yystate = yyn;
-- goto yynewstate;
--
--
--/*-------------------------------------.
--| yyacceptlab -- YYACCEPT comes here. |
--`-------------------------------------*/
--yyacceptlab:
-- yyresult = 0;
-- goto yyreturn;
--
--/*-----------------------------------.
--| yyabortlab -- YYABORT comes here. |
--`-----------------------------------*/
--yyabortlab:
-- yyresult = 1;
-- goto yyreturn;
--
--#ifndef yyoverflow
--/*-------------------------------------------------.
--| yyexhaustedlab -- memory exhaustion comes here. |
--`-------------------------------------------------*/
--yyexhaustedlab:
-- yyerror (YY_("memory exhausted"));
-- yyresult = 2;
-- /* Fall through. */
--#endif
--
--yyreturn:
-- if (yychar != YYEOF && yychar != YYEMPTY)
-- yydestruct ("Cleanup: discarding lookahead",
-- yytoken, &yylval);
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYABORT or YYACCEPT. */
-- YYPOPSTACK (yylen);
-- YY_STACK_PRINT (yyss, yyssp);
-- while (yyssp != yyss)
-- {
-- yydestruct ("Cleanup: popping",
-- yystos[*yyssp], yyvsp);
-- YYPOPSTACK (1);
-- }
--#ifndef yyoverflow
-- if (yyss != yyssa)
-- YYSTACK_FREE (yyss);
--#endif
--#if YYERROR_VERBOSE
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
--#endif
-- /* Make sure YYID is used. */
-- return YYID (yyresult);
--}
--
--
--#line 933 "rx-parse.y"
--
--/* ====================================================================== */
--
--static struct
--{
-- const char * string;
-- int token;
-- int val;
--}
--token_table[] =
--{
-- { "r0", REG, 0 },
-- { "r1", REG, 1 },
-- { "r2", REG, 2 },
-- { "r3", REG, 3 },
-- { "r4", REG, 4 },
-- { "r5", REG, 5 },
-- { "r6", REG, 6 },
-- { "r7", REG, 7 },
-- { "r8", REG, 8 },
-- { "r9", REG, 9 },
-- { "r10", REG, 10 },
-- { "r11", REG, 11 },
-- { "r12", REG, 12 },
-- { "r13", REG, 13 },
-- { "r14", REG, 14 },
-- { "r15", REG, 15 },
--
-- { "psw", CREG, 0 },
-- { "pc", CREG, 1 },
-- { "usp", CREG, 2 },
-- { "fpsw", CREG, 3 },
-- /* reserved */
-- /* reserved */
-- /* reserved */
-- { "wr", CREG, 7 },
--
-- { "bpsw", CREG, 8 },
-- { "bpc", CREG, 9 },
-- { "isp", CREG, 10 },
-- { "fintv", CREG, 11 },
-- { "intb", CREG, 12 },
--
-- { "pbp", CREG, 16 },
-- { "pben", CREG, 17 },
--
-- { "bbpsw", CREG, 24 },
-- { "bbpc", CREG, 25 },
--
-- { ".s", DOT_S, 0 },
-- { ".b", DOT_B, 0 },
-- { ".w", DOT_W, 0 },
-- { ".l", DOT_L, 0 },
-- { ".a", DOT_A , 0},
-- { ".ub", DOT_UB, 0 },
-- { ".uw", DOT_UW , 0},
--
-- { "c", FLAG, 0 },
-- { "z", FLAG, 1 },
-- { "s", FLAG, 2 },
-- { "o", FLAG, 3 },
-- { "i", FLAG, 8 },
-- { "u", FLAG, 9 },
--
--#define OPC(x) { #x, x, IS_OPCODE }
-- OPC(ABS),
-- OPC(ADC),
-- OPC(ADD),
-- { "and", AND_, IS_OPCODE },
-- OPC(BCLR),
-- OPC(BCND),
-- OPC(BMCND),
-- OPC(BNOT),
-- OPC(BRA),
-- OPC(BRK),
-- OPC(BSET),
-- OPC(BSR),
-- OPC(BTST),
-- OPC(CLRPSW),
-- OPC(CMP),
-- OPC(DBT),
-- OPC(DIV),
-- OPC(DIVU),
-- OPC(EDIV),
-- OPC(EDIVU),
-- OPC(EMUL),
-- OPC(EMULU),
-- OPC(FADD),
-- OPC(FCMP),
-- OPC(FDIV),
-- OPC(FMUL),
-- OPC(FREIT),
-- OPC(FSUB),
-- OPC(FTOI),
-- OPC(INT),
-- OPC(ITOF),
-- OPC(JMP),
-- OPC(JSR),
-- OPC(MVFACHI),
-- OPC(MVFACMI),
-- OPC(MVFACLO),
-- OPC(MVFC),
-- OPC(MVTACHI),
-- OPC(MVTACLO),
-- OPC(MVTC),
-- OPC(MVTIPL),
-- OPC(MACHI),
-- OPC(MACLO),
-- OPC(MAX),
-- OPC(MIN),
-- OPC(MOV),
-- OPC(MOVU),
-- OPC(MUL),
-- OPC(MULHI),
-- OPC(MULLO),
-- OPC(MULU),
-- OPC(NEG),
-- OPC(NOP),
-- OPC(NOT),
-- OPC(OR),
-- OPC(POP),
-- OPC(POPC),
-- OPC(POPM),
-- OPC(PUSH),
-- OPC(PUSHA),
-- OPC(PUSHC),
-- OPC(PUSHM),
-- OPC(RACW),
-- OPC(REIT),
-- OPC(REVL),
-- OPC(REVW),
-- OPC(RMPA),
-- OPC(ROLC),
-- OPC(RORC),
-- OPC(ROTL),
-- OPC(ROTR),
-- OPC(ROUND),
-- OPC(RTE),
-- OPC(RTFI),
-- OPC(RTS),
-- OPC(RTSD),
-- OPC(SAT),
-- OPC(SATR),
-- OPC(SBB),
-- OPC(SCCND),
-- OPC(SCMPU),
-- OPC(SETPSW),
-- OPC(SHAR),
-- OPC(SHLL),
-- OPC(SHLR),
-- OPC(SMOVB),
-- OPC(SMOVF),
-- OPC(SMOVU),
-- OPC(SSTR),
-- OPC(STNZ),
-- OPC(STOP),
-- OPC(STZ),
-- OPC(SUB),
-- OPC(SUNTIL),
-- OPC(SWHILE),
-- OPC(TST),
-- OPC(WAIT),
-- OPC(XCHG),
-- OPC(XOR),
--};
--
--#define NUM_TOKENS (sizeof (token_table) / sizeof (token_table[0]))
--
--static struct
--{
-- char * string;
-- int token;
--}
--condition_opcode_table[] =
--{
-- { "b", BCND },
-- { "bm", BMCND },
-- { "sc", SCCND },
--};
--
--#define NUM_CONDITION_OPCODES (sizeof (condition_opcode_table) / sizeof (condition_opcode_table[0]))
--
--static struct
--{
-- char * string;
-- int val;
--}
--condition_table[] =
--{
-- { "z", 0 },
-- { "eq", 0 },
-- { "geu", 2 },
-- { "c", 2 },
-- { "gtu", 4 },
-- { "pz", 6 },
-- { "ge", 8 },
-- { "gt", 10 },
-- { "o", 12},
-- /* always = 14 */
-- { "nz", 1 },
-- { "ne", 1 },
-- { "ltu", 3 },
-- { "nc", 3 },
-- { "leu", 5 },
-- { "n", 7 },
-- { "lt", 9 },
-- { "le", 11 },
-- { "no", 13 }
-- /* never = 15 */
--};
--
--#define NUM_CONDITIONS (sizeof (condition_table) / sizeof (condition_table[0]))
--
--void
--rx_lex_init (char * beginning, char * ending)
--{
-- rx_init_start = beginning;
-- rx_lex_start = beginning;
-- rx_lex_end = ending;
-- rx_in_brackets = 0;
-- rx_last_token = 0;
--
-- setbuf (stdout, 0);
--}
--
--static int
--check_condition (char * base)
--{
-- char * cp;
-- unsigned int i;
--
-- if ((unsigned) (rx_lex_end - rx_lex_start) < strlen (base) + 1)
-- return 0;
-- if (memcmp (rx_lex_start, base, strlen (base)))
-- return 0;
-- cp = rx_lex_start + strlen (base);
-- for (i = 0; i < NUM_CONDITIONS; i ++)
-- {
-- if (strcasecmp (cp, condition_table[i].string) == 0)
-- {
-- rx_lval.regno = condition_table[i].val;
-- return 1;
-- }
-- }
-- return 0;
--}
--
--static int
--rx_lex (void)
--{
-- unsigned int ci;
-- char * save_input_pointer;
--
-- while (ISSPACE (*rx_lex_start)
-- && rx_lex_start != rx_lex_end)
-- rx_lex_start ++;
--
-- rx_last_exp_start = rx_lex_start;
--
-- if (rx_lex_start == rx_lex_end)
-- return 0;
--
-- if (ISALPHA (*rx_lex_start)
-- || (rx_pid_register != -1 && memcmp (rx_lex_start, "%pidreg", 7) == 0)
-- || (rx_gp_register != -1 && memcmp (rx_lex_start, "%gpreg", 6) == 0)
-- || (*rx_lex_start == '.' && ISALPHA (rx_lex_start[1])))
-- {
-- unsigned int i;
-- char * e;
-- char save;
--
-- for (e = rx_lex_start + 1;
-- e < rx_lex_end && ISALNUM (*e);
-- e ++)
-- ;
-- save = *e;
-- *e = 0;
--
-- if (strcmp (rx_lex_start, "%pidreg") == 0)
-- {
-- {
-- rx_lval.regno = rx_pid_register;
-- *e = save;
-- rx_lex_start = e;
-- rx_last_token = REG;
-- return REG;
-- }
-- }
--
-- if (strcmp (rx_lex_start, "%gpreg") == 0)
-- {
-- {
-- rx_lval.regno = rx_gp_register;
-- *e = save;
-- rx_lex_start = e;
-- rx_last_token = REG;
-- return REG;
-- }
-- }
--
-- if (rx_last_token == 0)
-- for (ci = 0; ci < NUM_CONDITION_OPCODES; ci ++)
-- if (check_condition (condition_opcode_table[ci].string))
-- {
-- *e = save;
-- rx_lex_start = e;
-- rx_last_token = condition_opcode_table[ci].token;
-- return condition_opcode_table[ci].token;
-- }
--
-- for (i = 0; i < NUM_TOKENS; i++)
-- if (strcasecmp (rx_lex_start, token_table[i].string) == 0
-- && !(token_table[i].val == IS_OPCODE && rx_last_token != 0)
-- && !(token_table[i].token == FLAG && !need_flag))
-- {
-- rx_lval.regno = token_table[i].val;
-- *e = save;
-- rx_lex_start = e;
-- rx_last_token = token_table[i].token;
-- return token_table[i].token;
-- }
-- *e = save;
-- }
--
-- if (rx_last_token == 0)
-- {
-- rx_last_token = UNKNOWN_OPCODE;
-- return UNKNOWN_OPCODE;
-- }
--
-- if (rx_last_token == UNKNOWN_OPCODE)
-- return 0;
--
-- if (*rx_lex_start == '[')
-- rx_in_brackets = 1;
-- if (*rx_lex_start == ']')
-- rx_in_brackets = 0;
--
-- if (rx_in_brackets
-- || rx_last_token == REG
-- || strchr ("[],#", *rx_lex_start))
-- {
-- rx_last_token = *rx_lex_start;
-- return *rx_lex_start ++;
-- }
--
-- save_input_pointer = input_line_pointer;
-- input_line_pointer = rx_lex_start;
-- rx_lval.exp.X_md = 0;
-- expression (&rx_lval.exp);
--
-- /* We parse but ignore any :<size> modifier on expressions. */
-- if (*input_line_pointer == ':')
-- {
-- char *cp;
--
-- for (cp = input_line_pointer + 1; *cp && cp < rx_lex_end; cp++)
-- if (!ISDIGIT (*cp))
-- break;
-- if (cp > input_line_pointer+1)
-- input_line_pointer = cp;
-- }
--
-- rx_lex_start = input_line_pointer;
-- input_line_pointer = save_input_pointer;
-- rx_last_token = EXPR;
-- return EXPR;
--}
--
--int
--rx_error (const char * str)
--{
-- int len;
--
-- len = rx_last_exp_start - rx_init_start;
--
-- as_bad ("%s", rx_init_start);
-- as_bad ("%*s^ %s", len, "", str);
-- return 0;
--}
--
--static int
--rx_intop (expressionS exp, int nbits, int opbits)
--{
-- long v;
-- long mask, msb;
--
-- if (exp.X_op == O_big && nbits == 32)
-- return 1;
-- if (exp.X_op != O_constant)
-- return 0;
-- v = exp.X_add_number;
--
-- msb = 1UL << (opbits - 1);
-- mask = (1UL << opbits) - 1;
--
-- if ((v & msb) && ! (v & ~mask))
-- v -= 1UL << opbits;
--
-- switch (nbits)
-- {
-- case 4:
-- return -0x8 <= v && v <= 0x7;
-- case 5:
-- return -0x10 <= v && v <= 0x17;
-- case 8:
-- return -0x80 <= v && v <= 0x7f;
-- case 16:
-- return -0x8000 <= v && v <= 0x7fff;
-- case 24:
-- return -0x800000 <= v && v <= 0x7fffff;
-- case 32:
-- return 1;
-- default:
-- printf ("rx_intop passed %d\n", nbits);
-- abort ();
-- }
-- return 1;
--}
--
--static int
--rx_uintop (expressionS exp, int nbits)
--{
-- unsigned long v;
--
-- if (exp.X_op != O_constant)
-- return 0;
-- v = exp.X_add_number;
--
-- switch (nbits)
-- {
-- case 4:
-- return v <= 0xf;
-- case 8:
-- return v <= 0xff;
-- case 16:
-- return v <= 0xffff;
-- case 24:
-- return v <= 0xffffff;
-- default:
-- printf ("rx_uintop passed %d\n", nbits);
-- abort ();
-- }
-- return 1;
--}
--
--static int
--rx_disp3op (expressionS exp)
--{
-- unsigned long v;
--
-- if (exp.X_op != O_constant)
-- return 0;
-- v = exp.X_add_number;
-- if (v < 3 || v > 10)
-- return 0;
-- return 1;
--}
--
--static int
--rx_disp5op (expressionS * exp, int msize)
--{
-- long v;
--
-- if (exp->X_op != O_constant)
-- return 0;
-- v = exp->X_add_number;
--
-- switch (msize)
-- {
-- case BSIZE:
-- if (0 < v && v <= 31)
-- return 1;
-- break;
-- case WSIZE:
-- if (v & 1)
-- return 0;
-- if (0 < v && v <= 63)
-- {
-- exp->X_add_number >>= 1;
-- return 1;
-- }
-- break;
-- case LSIZE:
-- if (v & 3)
-- return 0;
-- if (0 < v && v <= 127)
-- {
-- exp->X_add_number >>= 2;
-- return 1;
-- }
-- break;
-- }
-- return 0;
--}
--
--/* Just like the above, but allows a zero displacement. */
--
--static int
--rx_disp5op0 (expressionS * exp, int msize)
--{
-- if (exp->X_op != O_constant)
-- return 0;
-- if (exp->X_add_number == 0)
-- return 1;
-- return rx_disp5op (exp, msize);
--}
--
--static int
--exp_val (expressionS exp)
--{
-- if (exp.X_op != O_constant)
-- {
-- rx_error (_("constant expected"));
-- return 0;
-- }
-- return exp.X_add_number;
--}
--
--static expressionS
--zero_expr (void)
--{
-- /* Static, so program load sets it to all zeros, which is what we want. */
-- static expressionS zero;
-- zero.X_op = O_constant;
-- return zero;
--}
--
--static int
--immediate (expressionS exp, int type, int pos, int bits)
--{
-- /* We will emit constants ourself here, so negate them. */
-- if (type == RXREL_NEGATIVE && exp.X_op == O_constant)
-- exp.X_add_number = - exp.X_add_number;
-- if (type == RXREL_NEGATIVE_BORROW)
-- {
-- if (exp.X_op == O_constant)
-- exp.X_add_number = - exp.X_add_number - 1;
-- else
-- rx_error (_("sbb cannot use symbolic immediates"));
-- }
--
-- if (rx_intop (exp, 8, bits))
-- {
-- rx_op (exp, 1, type);
-- return 1;
-- }
-- else if (rx_intop (exp, 16, bits))
-- {
-- rx_op (exp, 2, type);
-- return 2;
-- }
-- else if (rx_uintop (exp, 16) && bits == 16)
-- {
-- rx_op (exp, 2, type);
-- return 2;
-- }
-- else if (rx_intop (exp, 24, bits))
-- {
-- rx_op (exp, 3, type);
-- return 3;
-- }
-- else if (rx_intop (exp, 32, bits))
-- {
-- rx_op (exp, 4, type);
-- return 0;
-- }
-- else if (type == RXREL_SIGNED)
-- {
-- /* This is a symbolic immediate, we will relax it later. */
-- rx_relax (RX_RELAX_IMM, pos);
-- rx_op (exp, linkrelax ? 4 : 1, type);
-- return 1;
-- }
-- else
-- {
-- /* Let the linker deal with it. */
-- rx_op (exp, 4, type);
-- return 0;
-- }
--}
--
--static int
--displacement (expressionS exp, int msize)
--{
-- int val;
-- int vshift = 0;
--
-- if (exp.X_op == O_symbol
-- && exp.X_md)
-- {
-- switch (exp.X_md)
-- {
-- case BFD_RELOC_GPREL16:
-- switch (msize)
-- {
-- case BSIZE:
-- exp.X_md = BFD_RELOC_RX_GPRELB;
-- break;
-- case WSIZE:
-- exp.X_md = BFD_RELOC_RX_GPRELW;
-- break;
-- case LSIZE:
-- exp.X_md = BFD_RELOC_RX_GPRELL;
-- break;
-- }
-- O2 (exp);
-- return 2;
-- }
-- }
--
-- if (exp.X_op == O_subtract)
-- {
-- exp.X_md = BFD_RELOC_RX_DIFF;
-- O2 (exp);
-- return 2;
-- }
--
-- if (exp.X_op != O_constant)
-- {
-- rx_error (_("displacements must be constants"));
-- return -1;
-- }
-- val = exp.X_add_number;
--
-- if (val == 0)
-- return 0;
--
-- switch (msize)
-- {
-- case BSIZE:
-- break;
-- case WSIZE:
-- if (val & 1)
-- rx_error (_("word displacement not word-aligned"));
-- vshift = 1;
-- break;
-- case LSIZE:
-- if (val & 3)
-- rx_error (_("long displacement not long-aligned"));
-- vshift = 2;
-- break;
-- default:
-- as_bad (_("displacement with unknown size (internal bug?)\n"));
-- break;
-- }
--
-- val >>= vshift;
-- exp.X_add_number = val;
--
-- if (0 <= val && val <= 255 )
-- {
-- O1 (exp);
-- return 1;
-- }
--
-- if (0 <= val && val <= 65535)
-- {
-- O2 (exp);
-- return 2;
-- }
-- if (val < 0)
-- rx_error (_("negative displacements not allowed"));
-- else
-- rx_error (_("displacement too large"));
-- return -1;
--}
--
--static void
--rtsd_immediate (expressionS exp)
--{
-- int val;
--
-- if (exp.X_op != O_constant)
-- {
-- rx_error (_("rtsd size must be constant"));
-- return;
-- }
-- val = exp.X_add_number;
-- if (val & 3)
-- rx_error (_("rtsd size must be multiple of 4"));
--
-- if (val < 0 || val > 1020)
-- rx_error (_("rtsd size must be 0..1020"));
--
-- val >>= 2;
-- exp.X_add_number = val;
-- O1 (exp);
--}
--
--static void
--rx_range (expressionS exp, int minv, int maxv)
--{
-- int val;
--
-- if (exp.X_op != O_constant)
-- return;
--
-- val = exp.X_add_number;
-- if (val < minv || val > maxv)
-- as_warn (_("Value %d out of range %d..%d"), val, minv, maxv);
--}
--
--static void
--rx_check_float_support (void)
--{
-- if (rx_cpu == RX100 || rx_cpu == RX200)
-- rx_error (_("target CPU type does not support floating point instructions"));
--}
--
-diff -Nur binutils-2.24.orig/gas/rx-parse.h binutils-2.24/gas/rx-parse.h
---- binutils-2.24.orig/gas/rx-parse.h 2013-11-18 09:49:28.000000000 +0100
-+++ binutils-2.24/gas/rx-parse.h 1970-01-01 01:00:00.000000000 +0100
-@@ -1,289 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton interface for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- REG = 258,
-- FLAG = 259,
-- CREG = 260,
-- EXPR = 261,
-- UNKNOWN_OPCODE = 262,
-- IS_OPCODE = 263,
-- DOT_S = 264,
-- DOT_B = 265,
-- DOT_W = 266,
-- DOT_L = 267,
-- DOT_A = 268,
-- DOT_UB = 269,
-- DOT_UW = 270,
-- ABS = 271,
-- ADC = 272,
-- ADD = 273,
-- AND_ = 274,
-- BCLR = 275,
-- BCND = 276,
-- BMCND = 277,
-- BNOT = 278,
-- BRA = 279,
-- BRK = 280,
-- BSET = 281,
-- BSR = 282,
-- BTST = 283,
-- CLRPSW = 284,
-- CMP = 285,
-- DBT = 286,
-- DIV = 287,
-- DIVU = 288,
-- EDIV = 289,
-- EDIVU = 290,
-- EMUL = 291,
-- EMULU = 292,
-- FADD = 293,
-- FCMP = 294,
-- FDIV = 295,
-- FMUL = 296,
-- FREIT = 297,
-- FSUB = 298,
-- FTOI = 299,
-- INT = 300,
-- ITOF = 301,
-- JMP = 302,
-- JSR = 303,
-- MACHI = 304,
-- MACLO = 305,
-- MAX = 306,
-- MIN = 307,
-- MOV = 308,
-- MOVU = 309,
-- MUL = 310,
-- MULHI = 311,
-- MULLO = 312,
-- MULU = 313,
-- MVFACHI = 314,
-- MVFACMI = 315,
-- MVFACLO = 316,
-- MVFC = 317,
-- MVTACHI = 318,
-- MVTACLO = 319,
-- MVTC = 320,
-- MVTIPL = 321,
-- NEG = 322,
-- NOP = 323,
-- NOT = 324,
-- OR = 325,
-- POP = 326,
-- POPC = 327,
-- POPM = 328,
-- PUSH = 329,
-- PUSHA = 330,
-- PUSHC = 331,
-- PUSHM = 332,
-- RACW = 333,
-- REIT = 334,
-- REVL = 335,
-- REVW = 336,
-- RMPA = 337,
-- ROLC = 338,
-- RORC = 339,
-- ROTL = 340,
-- ROTR = 341,
-- ROUND = 342,
-- RTE = 343,
-- RTFI = 344,
-- RTS = 345,
-- RTSD = 346,
-- SAT = 347,
-- SATR = 348,
-- SBB = 349,
-- SCCND = 350,
-- SCMPU = 351,
-- SETPSW = 352,
-- SHAR = 353,
-- SHLL = 354,
-- SHLR = 355,
-- SMOVB = 356,
-- SMOVF = 357,
-- SMOVU = 358,
-- SSTR = 359,
-- STNZ = 360,
-- STOP = 361,
-- STZ = 362,
-- SUB = 363,
-- SUNTIL = 364,
-- SWHILE = 365,
-- TST = 366,
-- WAIT = 367,
-- XCHG = 368,
-- XOR = 369
-- };
--#endif
--/* Tokens. */
--#define REG 258
--#define FLAG 259
--#define CREG 260
--#define EXPR 261
--#define UNKNOWN_OPCODE 262
--#define IS_OPCODE 263
--#define DOT_S 264
--#define DOT_B 265
--#define DOT_W 266
--#define DOT_L 267
--#define DOT_A 268
--#define DOT_UB 269
--#define DOT_UW 270
--#define ABS 271
--#define ADC 272
--#define ADD 273
--#define AND_ 274
--#define BCLR 275
--#define BCND 276
--#define BMCND 277
--#define BNOT 278
--#define BRA 279
--#define BRK 280
--#define BSET 281
--#define BSR 282
--#define BTST 283
--#define CLRPSW 284
--#define CMP 285
--#define DBT 286
--#define DIV 287
--#define DIVU 288
--#define EDIV 289
--#define EDIVU 290
--#define EMUL 291
--#define EMULU 292
--#define FADD 293
--#define FCMP 294
--#define FDIV 295
--#define FMUL 296
--#define FREIT 297
--#define FSUB 298
--#define FTOI 299
--#define INT 300
--#define ITOF 301
--#define JMP 302
--#define JSR 303
--#define MACHI 304
--#define MACLO 305
--#define MAX 306
--#define MIN 307
--#define MOV 308
--#define MOVU 309
--#define MUL 310
--#define MULHI 311
--#define MULLO 312
--#define MULU 313
--#define MVFACHI 314
--#define MVFACMI 315
--#define MVFACLO 316
--#define MVFC 317
--#define MVTACHI 318
--#define MVTACLO 319
--#define MVTC 320
--#define MVTIPL 321
--#define NEG 322
--#define NOP 323
--#define NOT 324
--#define OR 325
--#define POP 326
--#define POPC 327
--#define POPM 328
--#define PUSH 329
--#define PUSHA 330
--#define PUSHC 331
--#define PUSHM 332
--#define RACW 333
--#define REIT 334
--#define REVL 335
--#define REVW 336
--#define RMPA 337
--#define ROLC 338
--#define RORC 339
--#define ROTL 340
--#define ROTR 341
--#define ROUND 342
--#define RTE 343
--#define RTFI 344
--#define RTS 345
--#define RTSD 346
--#define SAT 347
--#define SATR 348
--#define SBB 349
--#define SCCND 350
--#define SCMPU 351
--#define SETPSW 352
--#define SHAR 353
--#define SHLL 354
--#define SHLR 355
--#define SMOVB 356
--#define SMOVF 357
--#define SMOVU 358
--#define SSTR 359
--#define STNZ 360
--#define STOP 361
--#define STZ 362
--#define SUB 363
--#define SUNTIL 364
--#define SWHILE 365
--#define TST 366
--#define WAIT 367
--#define XCHG 368
--#define XOR 369
--
--
--
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 134 "rx-parse.y"
--{
-- int regno;
-- expressionS exp;
--}
--/* Line 1529 of yacc.c. */
--#line 282 "rx-parse.h"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--extern YYSTYPE rx_lval;
--
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/16-bit-v1.d binutils-2.24/gas/testsuite/gas/nds32/16-bit-v1.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/16-bit-v1.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/16-bit-v1.d 2016-06-30 21:26:12.741896535 +0200
-@@ -0,0 +1,17898 @@
-+#objdump: -d --prefix-addresses
-+#name: nds32 convert 32 to 16 (v1 instructions)
-+#as: -Os -mno-reduced-regs
-+
-+# Test the convert 32bits to 16bits
-+
-+.*: file format .*
-+
-+
-+Disassembly of section .text:
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-+0x000088da .*
-+0x000088dc .*
-+0x000088de .*
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-+0x000088e2 .*
-+0x000088e4 .*
-+0x000088e6 .*
-+0x000088e8 .*
-+0x000088ea .*
-+0x000088ec .*
-+0x000088ee .*
-+0x000088f0 .*
-+0x000088f2 .*
-+0x000088f4 .*
-+0x000088f6 .*
-+0x000088f8 .*
-+0x000088fa .*
-+0x000088fc .*
-+0x000088fe .*
-+0x00008900 .*
-+0x00008902 .*
-+0x00008904 .*
-+0x00008906 .*
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-+0x0000890a .*
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-+0x00008910 .*
-+0x00008912 .*
-+0x00008914 .*
-+0x00008916 .*
-+0x00008918 .*
-+0x0000891a .*
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-+0x0000891e .*
-+0x00008920 .*
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-+0x00008924 .*
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-+0x00008928 .*
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-+0x000089f8 .*
-+0x000089fa .*
-+0x000089fc .*
-+0x000089fe .*
-+0x00008a00 .*
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-+0x00008a12 .*
-+0x00008a14 .*
-+0x00008a16 .*
-+0x00008a18 .*
-+0x00008a1a .*
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-+0x00008a1e .*
-+0x00008a20 .*
-+0x00008a22 .*
-+0x00008a24 .*
-+0x00008a26 .*
-+0x00008a28 .*
-+0x00008a2a .*
-+0x00008a2c .*
-+0x00008a2e .*
-+0x00008a30 .*
-+0x00008a32 .*
-+0x00008a34 .*
-+0x00008a36 .*
-+0x00008a38 .*
-+0x00008a3a .*
-+0x00008a3c .*
-+0x00008a3e .*
-+0x00008a40 .*
-+0x00008a42 .*
-+0x00008a44 .*
-+0x00008a46 .*
-+0x00008a48 .*
-+0x00008a4a .*
-+0x00008a4c .*
-+0x00008a4e .*
-+0x00008a50 .*
-+0x00008a52 .*
-+0x00008a54 .*
-+0x00008a56 .*
-+0x00008a58 .*
-+0x00008a5a .*
-+0x00008a5c .*
-+0x00008a5e .*
-+0x00008a60 .*
-+0x00008a62 .*
-+0x00008a64 .*
-+0x00008a66 .*
-+0x00008a68 .*
-+0x00008a6a .*
-+0x00008a6c .*
-+0x00008a6e .*
-+0x00008a70 .*
-+0x00008a72 .*
-+0x00008a74 .*
-+0x00008a76 .*
-+0x00008a78 .*
-+0x00008a7a .*
-+0x00008a7c .*
-+0x00008a7e .*
-+0x00008a80 .*
-+0x00008a82 .*
-+0x00008a84 .*
-+0x00008a86 .*
-+0x00008a88 .*
-+0x00008a8a .*
-+0x00008a8c .*
-+0x00008a8e .*
-+0x00008a90 .*
-+0x00008a92 .*
-+0x00008a94 .*
-+0x00008a96 .*
-+0x00008a98 .*
-+0x00008a9a .*
-+0x00008a9c .*
-+0x00008a9e .*
-+0x00008aa0 .*
-+0x00008aa2 .*
-+0x00008aa4 .*
-+0x00008aa6 .*
-+0x00008aa8 .*
-+0x00008aaa .*
-+0x00008aac .*
-+0x00008aae .*
-+0x00008ab0 .*
-+0x00008ab2 .*
-+0x00008ab4 .*
-+0x00008ab6 .*
-+0x00008ab8 .*
-+0x00008aba .*
-+0x00008abc .*
-+0x00008abe .*
-+0x00008ac0 .*
-+0x00008ac2 .*
-+0x00008ac4 .*
-+0x00008ac6 .*
-+0x00008ac8 .*
-+0x00008aca .*
-+0x00008acc .*
-+0x00008ace .*
-+0x00008ad0 .*
-+0x00008ad2 .*
-+0x00008ad4 .*
-+0x00008ad6 .*
-+0x00008ad8 .*
-+0x00008ada .*
-+0x00008adc .*
-+0x00008ade .*
-+0x00008ae0 .*
-+0x00008ae2 .*
-+0x00008ae4 .*
-+0x00008ae6 .*
-+0x00008ae8 .*
-+0x00008aea .*
-+0x00008aec .*
-+0x00008aee .*
-+0x00008af0 .*
-+0x00008af2 .*
-+0x00008af4 .*
-+0x00008af6 .*
-+0x00008af8 .*
-+0x00008afa .*
-+0x00008afc .*
-+0x00008afe .*
-+0x00008b00 .*
-+0x00008b02 .*
-+0x00008b04 .*
-+0x00008b06 .*
-+0x00008b08 .*
-+0x00008b0a .*
-+0x00008b0c .*
-+0x00008b0e .*
-+0x00008b10 .*
-+0x00008b12 .*
-+0x00008b14 .*
-+0x00008b16 .*
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-+0x00008b1a .*
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-+0x00008b1e .*
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-+0x00008b22 .*
-+0x00008b24 .*
-+0x00008b26 .*
-+0x00008b28 .*
-+0x00008b2a .*
-+0x00008b2c .*
-+0x00008b2e .*
-+0x00008b30 .*
-+0x00008b32 .*
-+0x00008b34 .*
-+0x00008b36 .*
-+0x00008b38 .*
-+0x00008b3a .*
-+0x00008b3c .*
-+0x00008b3e .*
-+0x00008b40 .*
-+0x00008b42 .*
-+0x00008b44 .*
-+0x00008b46 .*
-+0x00008b48 .*
-+0x00008b4a .*
-+0x00008b4c .*
-+0x00008b4e .*
-+0x00008b50 .*
-+0x00008b52 .*
-+0x00008b54 .*
-+0x00008b56 .*
-+0x00008b58 .*
-+0x00008b5a .*
-+0x00008b5c .*
-+0x00008b5e .*
-+0x00008b60 .*
-+0x00008b62 .*
-+0x00008b64 .*
-+0x00008b66 .*
-+0x00008b68 .*
-+0x00008b6a .*
-+0x00008b6c .*
-+0x00008b6e .*
-+0x00008b70 .*
-+0x00008b72 .*
-+0x00008b74 .*
-+0x00008b76 .*
-+0x00008b78 .*
-+0x00008b7a .*
-+0x00008b7c .*
-+0x00008b7e .*
-+0x00008b80 .*
-+0x00008b82 .*
-+0x00008b84 .*
-+0x00008b86 .*
-+0x00008b88 .*
-+0x00008b8a .*
-+0x00008b8c .*
-+0x00008b8e .*
-+0x00008b90 .*
-+0x00008b92 .*
-+0x00008b94 .*
-+0x00008b96 .*
-+0x00008b98 .*
-+0x00008b9a .*
-+0x00008b9c .*
-+0x00008b9e .*
-+0x00008ba0 .*
-+0x00008ba2 .*
-+0x00008ba4 .*
-+0x00008ba6 .*
-+0x00008ba8 .*
-+0x00008baa .*
-+0x00008bac .*
-+0x00008bae .*
-+0x00008bb0 .*
-+0x00008bb2 .*
-+0x00008bb4 .*
-+0x00008bb6 .*
-+0x00008bb8 .*
-+0x00008bba .*
-+0x00008bbc .*
-+0x00008bbe .*
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/16-bit-v1.s binutils-2.24/gas/testsuite/gas/nds32/16-bit-v1.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/16-bit-v1.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/16-bit-v1.s 2016-06-30 21:26:12.745896691 +0200
-@@ -0,0 +1,17889 @@
-+! v1*
-+ move $r0, $r0
-+ move $r0, $r1
-+ move $r0, $r2
-+ move $r0, $r3
-+ move $r0, $r4
-+ move $r0, $r5
-+ move $r0, $r6
-+ move $r0, $r7
-+ move $r0, $r8
-+ move $r0, $r9
-+ move $r0, $r10
-+ move $r0, $r11
-+ move $r0, $r16
-+ move $r0, $r17
-+ move $r0, $r18
-+ move $r0, $r19
-+ move $r0, $r12
-+ move $r0, $r13
-+ move $r0, $r14
-+ move $r0, $r15
-+ move $r0, $r20
-+ move $r0, $r21
-+ move $r0, $r22
-+ move $r0, $r23
-+ move $r0, $r24
-+ move $r0, $r25
-+ move $r0, $r26
-+ move $r0, $r27
-+ move $r0, $fp
-+ move $r0, $gp
-+ move $r0, $lp
-+ move $r0, $sp
-+ move $r1, $r0
-+ move $r1, $r1
-+ move $r1, $r2
-+ move $r1, $r3
-+ move $r1, $r4
-+ move $r1, $r5
-+ move $r1, $r6
-+ move $r1, $r7
-+ move $r1, $r8
-+ move $r1, $r9
-+ move $r1, $r10
-+ move $r1, $r11
-+ move $r1, $r16
-+ move $r1, $r17
-+ move $r1, $r18
-+ move $r1, $r19
-+ move $r1, $r12
-+ move $r1, $r13
-+ move $r1, $r14
-+ move $r1, $r15
-+ move $r1, $r20
-+ move $r1, $r21
-+ move $r1, $r22
-+ move $r1, $r23
-+ move $r1, $r24
-+ move $r1, $r25
-+ move $r1, $r26
-+ move $r1, $r27
-+ move $r1, $fp
-+ move $r1, $gp
-+ move $r1, $lp
-+ move $r1, $sp
-+ move $r2, $r0
-+ move $r2, $r1
-+ move $r2, $r2
-+ move $r2, $r3
-+ move $r2, $r4
-+ move $r2, $r5
-+ move $r2, $r6
-+ move $r2, $r7
-+ move $r2, $r8
-+ move $r2, $r9
-+ move $r2, $r10
-+ move $r2, $r11
-+ move $r2, $r16
-+ move $r2, $r17
-+ move $r2, $r18
-+ move $r2, $r19
-+ move $r2, $r12
-+ move $r2, $r13
-+ move $r2, $r14
-+ move $r2, $r15
-+ move $r2, $r20
-+ move $r2, $r21
-+ move $r2, $r22
-+ move $r2, $r23
-+ move $r2, $r24
-+ move $r2, $r25
-+ move $r2, $r26
-+ move $r2, $r27
-+ move $r2, $fp
-+ move $r2, $gp
-+ move $r2, $lp
-+ move $r2, $sp
-+ move $r3, $r0
-+ move $r3, $r1
-+ move $r3, $r2
-+ move $r3, $r3
-+ move $r3, $r4
-+ move $r3, $r5
-+ move $r3, $r6
-+ move $r3, $r7
-+ move $r3, $r8
-+ move $r3, $r9
-+ move $r3, $r10
-+ move $r3, $r11
-+ move $r3, $r16
-+ move $r3, $r17
-+ move $r3, $r18
-+ move $r3, $r19
-+ move $r3, $r12
-+ move $r3, $r13
-+ move $r3, $r14
-+ move $r3, $r15
-+ move $r3, $r20
-+ move $r3, $r21
-+ move $r3, $r22
-+ move $r3, $r23
-+ move $r3, $r24
-+ move $r3, $r25
-+ move $r3, $r26
-+ move $r3, $r27
-+ move $r3, $fp
-+ move $r3, $gp
-+ move $r3, $lp
-+ move $r3, $sp
-+ move $r4, $r0
-+ move $r4, $r1
-+ move $r4, $r2
-+ move $r4, $r3
-+ move $r4, $r4
-+ move $r4, $r5
-+ move $r4, $r6
-+ move $r4, $r7
-+ move $r4, $r8
-+ move $r4, $r9
-+ move $r4, $r10
-+ move $r4, $r11
-+ move $r4, $r16
-+ move $r4, $r17
-+ move $r4, $r18
-+ move $r4, $r19
-+ move $r4, $r12
-+ move $r4, $r13
-+ move $r4, $r14
-+ move $r4, $r15
-+ move $r4, $r20
-+ move $r4, $r21
-+ move $r4, $r22
-+ move $r4, $r23
-+ move $r4, $r24
-+ move $r4, $r25
-+ move $r4, $r26
-+ move $r4, $r27
-+ move $r4, $fp
-+ move $r4, $gp
-+ move $r4, $lp
-+ move $r4, $sp
-+ move $r5, $r0
-+ move $r5, $r1
-+ move $r5, $r2
-+ move $r5, $r3
-+ move $r5, $r4
-+ move $r5, $r5
-+ move $r5, $r6
-+ move $r5, $r7
-+ move $r5, $r8
-+ move $r5, $r9
-+ move $r5, $r10
-+ move $r5, $r11
-+ move $r5, $r16
-+ move $r5, $r17
-+ move $r5, $r18
-+ move $r5, $r19
-+ move $r5, $r12
-+ move $r5, $r13
-+ move $r5, $r14
-+ move $r5, $r15
-+ move $r5, $r20
-+ move $r5, $r21
-+ move $r5, $r22
-+ move $r5, $r23
-+ move $r5, $r24
-+ move $r5, $r25
-+ move $r5, $r26
-+ move $r5, $r27
-+ move $r5, $fp
-+ move $r5, $gp
-+ move $r5, $lp
-+ move $r5, $sp
-+ move $r6, $r0
-+ move $r6, $r1
-+ move $r6, $r2
-+ move $r6, $r3
-+ move $r6, $r4
-+ move $r6, $r5
-+ move $r6, $r6
-+ move $r6, $r7
-+ move $r6, $r8
-+ move $r6, $r9
-+ move $r6, $r10
-+ move $r6, $r11
-+ move $r6, $r16
-+ move $r6, $r17
-+ move $r6, $r18
-+ move $r6, $r19
-+ move $r6, $r12
-+ move $r6, $r13
-+ move $r6, $r14
-+ move $r6, $r15
-+ move $r6, $r20
-+ move $r6, $r21
-+ move $r6, $r22
-+ move $r6, $r23
-+ move $r6, $r24
-+ move $r6, $r25
-+ move $r6, $r26
-+ move $r6, $r27
-+ move $r6, $fp
-+ move $r6, $gp
-+ move $r6, $lp
-+ move $r6, $sp
-+ move $r7, $r0
-+ move $r7, $r1
-+ move $r7, $r2
-+ move $r7, $r3
-+ move $r7, $r4
-+ move $r7, $r5
-+ move $r7, $r6
-+ move $r7, $r7
-+ move $r7, $r8
-+ move $r7, $r9
-+ move $r7, $r10
-+ move $r7, $r11
-+ move $r7, $r16
-+ move $r7, $r17
-+ move $r7, $r18
-+ move $r7, $r19
-+ move $r7, $r12
-+ move $r7, $r13
-+ move $r7, $r14
-+ move $r7, $r15
-+ move $r7, $r20
-+ move $r7, $r21
-+ move $r7, $r22
-+ move $r7, $r23
-+ move $r7, $r24
-+ move $r7, $r25
-+ move $r7, $r26
-+ move $r7, $r27
-+ move $r7, $fp
-+ move $r7, $gp
-+ move $r7, $lp
-+ move $r7, $sp
-+ move $r8, $r0
-+ move $r8, $r1
-+ move $r8, $r2
-+ move $r8, $r3
-+ move $r8, $r4
-+ move $r8, $r5
-+ move $r8, $r6
-+ move $r8, $r7
-+ move $r8, $r8
-+ move $r8, $r9
-+ move $r8, $r10
-+ move $r8, $r11
-+ move $r8, $r16
-+ move $r8, $r17
-+ move $r8, $r18
-+ move $r8, $r19
-+ move $r8, $r12
-+ move $r8, $r13
-+ move $r8, $r14
-+ move $r8, $r15
-+ move $r8, $r20
-+ move $r8, $r21
-+ move $r8, $r22
-+ move $r8, $r23
-+ move $r8, $r24
-+ move $r8, $r25
-+ move $r8, $r26
-+ move $r8, $r27
-+ move $r8, $fp
-+ move $r8, $gp
-+ move $r8, $lp
-+ move $r8, $sp
-+ move $r9, $r0
-+ move $r9, $r1
-+ move $r9, $r2
-+ move $r9, $r3
-+ move $r9, $r4
-+ move $r9, $r5
-+ move $r9, $r6
-+ move $r9, $r7
-+ move $r9, $r8
-+ move $r9, $r9
-+ move $r9, $r10
-+ move $r9, $r11
-+ move $r9, $r16
-+ move $r9, $r17
-+ move $r9, $r18
-+ move $r9, $r19
-+ move $r9, $r12
-+ move $r9, $r13
-+ move $r9, $r14
-+ move $r9, $r15
-+ move $r9, $r20
-+ move $r9, $r21
-+ move $r9, $r22
-+ move $r9, $r23
-+ move $r9, $r24
-+ move $r9, $r25
-+ move $r9, $r26
-+ move $r9, $r27
-+ move $r9, $fp
-+ move $r9, $gp
-+ move $r9, $lp
-+ move $r9, $sp
-+ move $r10, $r0
-+ move $r10, $r1
-+ move $r10, $r2
-+ move $r10, $r3
-+ move $r10, $r4
-+ move $r10, $r5
-+ move $r10, $r6
-+ move $r10, $r7
-+ move $r10, $r8
-+ move $r10, $r9
-+ move $r10, $r10
-+ move $r10, $r11
-+ move $r10, $r16
-+ move $r10, $r17
-+ move $r10, $r18
-+ move $r10, $r19
-+ move $r10, $r12
-+ move $r10, $r13
-+ move $r10, $r14
-+ move $r10, $r15
-+ move $r10, $r20
-+ move $r10, $r21
-+ move $r10, $r22
-+ move $r10, $r23
-+ move $r10, $r24
-+ move $r10, $r25
-+ move $r10, $r26
-+ move $r10, $r27
-+ move $r10, $fp
-+ move $r10, $gp
-+ move $r10, $lp
-+ move $r10, $sp
-+ move $r11, $r0
-+ move $r11, $r1
-+ move $r11, $r2
-+ move $r11, $r3
-+ move $r11, $r4
-+ move $r11, $r5
-+ move $r11, $r6
-+ move $r11, $r7
-+ move $r11, $r8
-+ move $r11, $r9
-+ move $r11, $r10
-+ move $r11, $r11
-+ move $r11, $r16
-+ move $r11, $r17
-+ move $r11, $r18
-+ move $r11, $r19
-+ move $r11, $r12
-+ move $r11, $r13
-+ move $r11, $r14
-+ move $r11, $r15
-+ move $r11, $r20
-+ move $r11, $r21
-+ move $r11, $r22
-+ move $r11, $r23
-+ move $r11, $r24
-+ move $r11, $r25
-+ move $r11, $r26
-+ move $r11, $r27
-+ move $r11, $fp
-+ move $r11, $gp
-+ move $r11, $lp
-+ move $r11, $sp
-+ move $r16, $r0
-+ move $r16, $r1
-+ move $r16, $r2
-+ move $r16, $r3
-+ move $r16, $r4
-+ move $r16, $r5
-+ move $r16, $r6
-+ move $r16, $r7
-+ move $r16, $r8
-+ move $r16, $r9
-+ move $r16, $r10
-+ move $r16, $r11
-+ move $r16, $r16
-+ move $r16, $r17
-+ move $r16, $r18
-+ move $r16, $r19
-+ move $r16, $r12
-+ move $r16, $r13
-+ move $r16, $r14
-+ move $r16, $r15
-+ move $r16, $r20
-+ move $r16, $r21
-+ move $r16, $r22
-+ move $r16, $r23
-+ move $r16, $r24
-+ move $r16, $r25
-+ move $r16, $r26
-+ move $r16, $r27
-+ move $r16, $fp
-+ move $r16, $gp
-+ move $r16, $lp
-+ move $r16, $sp
-+ move $r17, $r0
-+ move $r17, $r1
-+ move $r17, $r2
-+ move $r17, $r3
-+ move $r17, $r4
-+ move $r17, $r5
-+ move $r17, $r6
-+ move $r17, $r7
-+ move $r17, $r8
-+ move $r17, $r9
-+ move $r17, $r10
-+ move $r17, $r11
-+ move $r17, $r16
-+ move $r17, $r17
-+ move $r17, $r18
-+ move $r17, $r19
-+ move $r17, $r12
-+ move $r17, $r13
-+ move $r17, $r14
-+ move $r17, $r15
-+ move $r17, $r20
-+ move $r17, $r21
-+ move $r17, $r22
-+ move $r17, $r23
-+ move $r17, $r24
-+ move $r17, $r25
-+ move $r17, $r26
-+ move $r17, $r27
-+ move $r17, $fp
-+ move $r17, $gp
-+ move $r17, $lp
-+ move $r17, $sp
-+ move $r18, $r0
-+ move $r18, $r1
-+ move $r18, $r2
-+ move $r18, $r3
-+ move $r18, $r4
-+ move $r18, $r5
-+ move $r18, $r6
-+ move $r18, $r7
-+ move $r18, $r8
-+ move $r18, $r9
-+ move $r18, $r10
-+ move $r18, $r11
-+ move $r18, $r16
-+ move $r18, $r17
-+ move $r18, $r18
-+ move $r18, $r19
-+ move $r18, $r12
-+ move $r18, $r13
-+ move $r18, $r14
-+ move $r18, $r15
-+ move $r18, $r20
-+ move $r18, $r21
-+ move $r18, $r22
-+ move $r18, $r23
-+ move $r18, $r24
-+ move $r18, $r25
-+ move $r18, $r26
-+ move $r18, $r27
-+ move $r18, $fp
-+ move $r18, $gp
-+ move $r18, $lp
-+ move $r18, $sp
-+ move $r19, $r0
-+ move $r19, $r1
-+ move $r19, $r2
-+ move $r19, $r3
-+ move $r19, $r4
-+ move $r19, $r5
-+ move $r19, $r6
-+ move $r19, $r7
-+ move $r19, $r8
-+ move $r19, $r9
-+ move $r19, $r10
-+ move $r19, $r11
-+ move $r19, $r16
-+ move $r19, $r17
-+ move $r19, $r18
-+ move $r19, $r19
-+ move $r19, $r12
-+ move $r19, $r13
-+ move $r19, $r14
-+ move $r19, $r15
-+ move $r19, $r20
-+ move $r19, $r21
-+ move $r19, $r22
-+ move $r19, $r23
-+ move $r19, $r24
-+ move $r19, $r25
-+ move $r19, $r26
-+ move $r19, $r27
-+ move $r19, $fp
-+ move $r19, $gp
-+ move $r19, $lp
-+ move $r19, $sp
-+ move $r12, $r0
-+ move $r12, $r1
-+ move $r12, $r2
-+ move $r12, $r3
-+ move $r12, $r4
-+ move $r12, $r5
-+ move $r12, $r6
-+ move $r12, $r7
-+ move $r12, $r8
-+ move $r12, $r9
-+ move $r12, $r10
-+ move $r12, $r11
-+ move $r12, $r16
-+ move $r12, $r17
-+ move $r12, $r18
-+ move $r12, $r19
-+ move $r12, $r12
-+ move $r12, $r13
-+ move $r12, $r14
-+ move $r12, $r15
-+ move $r12, $r20
-+ move $r12, $r21
-+ move $r12, $r22
-+ move $r12, $r23
-+ move $r12, $r24
-+ move $r12, $r25
-+ move $r12, $r26
-+ move $r12, $r27
-+ move $r12, $fp
-+ move $r12, $gp
-+ move $r12, $lp
-+ move $r12, $sp
-+ move $r13, $r0
-+ move $r13, $r1
-+ move $r13, $r2
-+ move $r13, $r3
-+ move $r13, $r4
-+ move $r13, $r5
-+ move $r13, $r6
-+ move $r13, $r7
-+ move $r13, $r8
-+ move $r13, $r9
-+ move $r13, $r10
-+ move $r13, $r11
-+ move $r13, $r16
-+ move $r13, $r17
-+ move $r13, $r18
-+ move $r13, $r19
-+ move $r13, $r12
-+ move $r13, $r13
-+ move $r13, $r14
-+ move $r13, $r15
-+ move $r13, $r20
-+ move $r13, $r21
-+ move $r13, $r22
-+ move $r13, $r23
-+ move $r13, $r24
-+ move $r13, $r25
-+ move $r13, $r26
-+ move $r13, $r27
-+ move $r13, $fp
-+ move $r13, $gp
-+ move $r13, $lp
-+ move $r13, $sp
-+ move $r14, $r0
-+ move $r14, $r1
-+ move $r14, $r2
-+ move $r14, $r3
-+ move $r14, $r4
-+ move $r14, $r5
-+ move $r14, $r6
-+ move $r14, $r7
-+ move $r14, $r8
-+ move $r14, $r9
-+ move $r14, $r10
-+ move $r14, $r11
-+ move $r14, $r16
-+ move $r14, $r17
-+ move $r14, $r18
-+ move $r14, $r19
-+ move $r14, $r12
-+ move $r14, $r13
-+ move $r14, $r14
-+ move $r14, $r15
-+ move $r14, $r20
-+ move $r14, $r21
-+ move $r14, $r22
-+ move $r14, $r23
-+ move $r14, $r24
-+ move $r14, $r25
-+ move $r14, $r26
-+ move $r14, $r27
-+ move $r14, $fp
-+ move $r14, $gp
-+ move $r14, $lp
-+ move $r14, $sp
-+ move $r15, $r0
-+ move $r15, $r1
-+ move $r15, $r2
-+ move $r15, $r3
-+ move $r15, $r4
-+ move $r15, $r5
-+ move $r15, $r6
-+ move $r15, $r7
-+ move $r15, $r8
-+ move $r15, $r9
-+ move $r15, $r10
-+ move $r15, $r11
-+ move $r15, $r16
-+ move $r15, $r17
-+ move $r15, $r18
-+ move $r15, $r19
-+ move $r15, $r12
-+ move $r15, $r13
-+ move $r15, $r14
-+ move $r15, $r15
-+ move $r15, $r20
-+ move $r15, $r21
-+ move $r15, $r22
-+ move $r15, $r23
-+ move $r15, $r24
-+ move $r15, $r25
-+ move $r15, $r26
-+ move $r15, $r27
-+ move $r15, $fp
-+ move $r15, $gp
-+ move $r15, $lp
-+ move $r15, $sp
-+ move $r20, $r0
-+ move $r20, $r1
-+ move $r20, $r2
-+ move $r20, $r3
-+ move $r20, $r4
-+ move $r20, $r5
-+ move $r20, $r6
-+ move $r20, $r7
-+ move $r20, $r8
-+ move $r20, $r9
-+ move $r20, $r10
-+ move $r20, $r11
-+ move $r20, $r16
-+ move $r20, $r17
-+ move $r20, $r18
-+ move $r20, $r19
-+ move $r20, $r12
-+ move $r20, $r13
-+ move $r20, $r14
-+ move $r20, $r15
-+ move $r20, $r20
-+ move $r20, $r21
-+ move $r20, $r22
-+ move $r20, $r23
-+ move $r20, $r24
-+ move $r20, $r25
-+ move $r20, $r26
-+ move $r20, $r27
-+ move $r20, $fp
-+ move $r20, $gp
-+ move $r20, $lp
-+ move $r20, $sp
-+ move $r21, $r0
-+ move $r21, $r1
-+ move $r21, $r2
-+ move $r21, $r3
-+ move $r21, $r4
-+ move $r21, $r5
-+ move $r21, $r6
-+ move $r21, $r7
-+ move $r21, $r8
-+ move $r21, $r9
-+ move $r21, $r10
-+ move $r21, $r11
-+ move $r21, $r16
-+ move $r21, $r17
-+ move $r21, $r18
-+ move $r21, $r19
-+ move $r21, $r12
-+ move $r21, $r13
-+ move $r21, $r14
-+ move $r21, $r15
-+ move $r21, $r20
-+ move $r21, $r21
-+ move $r21, $r22
-+ move $r21, $r23
-+ move $r21, $r24
-+ move $r21, $r25
-+ move $r21, $r26
-+ move $r21, $r27
-+ move $r21, $fp
-+ move $r21, $gp
-+ move $r21, $lp
-+ move $r21, $sp
-+ move $r22, $r0
-+ move $r22, $r1
-+ move $r22, $r2
-+ move $r22, $r3
-+ move $r22, $r4
-+ move $r22, $r5
-+ move $r22, $r6
-+ move $r22, $r7
-+ move $r22, $r8
-+ move $r22, $r9
-+ move $r22, $r10
-+ move $r22, $r11
-+ move $r22, $r16
-+ move $r22, $r17
-+ move $r22, $r18
-+ move $r22, $r19
-+ move $r22, $r12
-+ move $r22, $r13
-+ move $r22, $r14
-+ move $r22, $r15
-+ move $r22, $r20
-+ move $r22, $r21
-+ move $r22, $r22
-+ move $r22, $r23
-+ move $r22, $r24
-+ move $r22, $r25
-+ move $r22, $r26
-+ move $r22, $r27
-+ move $r22, $fp
-+ move $r22, $gp
-+ move $r22, $lp
-+ move $r22, $sp
-+ move $r23, $r0
-+ move $r23, $r1
-+ move $r23, $r2
-+ move $r23, $r3
-+ move $r23, $r4
-+ move $r23, $r5
-+ move $r23, $r6
-+ move $r23, $r7
-+ move $r23, $r8
-+ move $r23, $r9
-+ move $r23, $r10
-+ move $r23, $r11
-+ move $r23, $r16
-+ move $r23, $r17
-+ move $r23, $r18
-+ move $r23, $r19
-+ move $r23, $r12
-+ move $r23, $r13
-+ move $r23, $r14
-+ move $r23, $r15
-+ move $r23, $r20
-+ move $r23, $r21
-+ move $r23, $r22
-+ move $r23, $r23
-+ move $r23, $r24
-+ move $r23, $r25
-+ move $r23, $r26
-+ move $r23, $r27
-+ move $r23, $fp
-+ move $r23, $gp
-+ move $r23, $lp
-+ move $r23, $sp
-+ move $r24, $r0
-+ move $r24, $r1
-+ move $r24, $r2
-+ move $r24, $r3
-+ move $r24, $r4
-+ move $r24, $r5
-+ move $r24, $r6
-+ move $r24, $r7
-+ move $r24, $r8
-+ move $r24, $r9
-+ move $r24, $r10
-+ move $r24, $r11
-+ move $r24, $r16
-+ move $r24, $r17
-+ move $r24, $r18
-+ move $r24, $r19
-+ move $r24, $r12
-+ move $r24, $r13
-+ move $r24, $r14
-+ move $r24, $r15
-+ move $r24, $r20
-+ move $r24, $r21
-+ move $r24, $r22
-+ move $r24, $r23
-+ move $r24, $r24
-+ move $r24, $r25
-+ move $r24, $r26
-+ move $r24, $r27
-+ move $r24, $fp
-+ move $r24, $gp
-+ move $r24, $lp
-+ move $r24, $sp
-+ move $r25, $r0
-+ move $r25, $r1
-+ move $r25, $r2
-+ move $r25, $r3
-+ move $r25, $r4
-+ move $r25, $r5
-+ move $r25, $r6
-+ move $r25, $r7
-+ move $r25, $r8
-+ move $r25, $r9
-+ move $r25, $r10
-+ move $r25, $r11
-+ move $r25, $r16
-+ move $r25, $r17
-+ move $r25, $r18
-+ move $r25, $r19
-+ move $r25, $r12
-+ move $r25, $r13
-+ move $r25, $r14
-+ move $r25, $r15
-+ move $r25, $r20
-+ move $r25, $r21
-+ move $r25, $r22
-+ move $r25, $r23
-+ move $r25, $r24
-+ move $r25, $r25
-+ move $r25, $r26
-+ move $r25, $r27
-+ move $r25, $fp
-+ move $r25, $gp
-+ move $r25, $lp
-+ move $r25, $sp
-+ move $r26, $r0
-+ move $r26, $r1
-+ move $r26, $r2
-+ move $r26, $r3
-+ move $r26, $r4
-+ move $r26, $r5
-+ move $r26, $r6
-+ move $r26, $r7
-+ move $r26, $r8
-+ move $r26, $r9
-+ move $r26, $r10
-+ move $r26, $r11
-+ move $r26, $r16
-+ move $r26, $r17
-+ move $r26, $r18
-+ move $r26, $r19
-+ move $r26, $r12
-+ move $r26, $r13
-+ move $r26, $r14
-+ move $r26, $r15
-+ move $r26, $r20
-+ move $r26, $r21
-+ move $r26, $r22
-+ move $r26, $r23
-+ move $r26, $r24
-+ move $r26, $r25
-+ move $r26, $r26
-+ move $r26, $r27
-+ move $r26, $fp
-+ move $r26, $gp
-+ move $r26, $lp
-+ move $r26, $sp
-+ move $r27, $r0
-+ move $r27, $r1
-+ move $r27, $r2
-+ move $r27, $r3
-+ move $r27, $r4
-+ move $r27, $r5
-+ move $r27, $r6
-+ move $r27, $r7
-+ move $r27, $r8
-+ move $r27, $r9
-+ move $r27, $r10
-+ move $r27, $r11
-+ move $r27, $r16
-+ move $r27, $r17
-+ move $r27, $r18
-+ move $r27, $r19
-+ move $r27, $r12
-+ move $r27, $r13
-+ move $r27, $r14
-+ move $r27, $r15
-+ move $r27, $r20
-+ move $r27, $r21
-+ move $r27, $r22
-+ move $r27, $r23
-+ move $r27, $r24
-+ move $r27, $r25
-+ move $r27, $r26
-+ move $r27, $r27
-+ move $r27, $fp
-+ move $r27, $gp
-+ move $r27, $lp
-+ move $r27, $sp
-+ move $fp, $r0
-+ move $fp, $r1
-+ move $fp, $r2
-+ move $fp, $r3
-+ move $fp, $r4
-+ move $fp, $r5
-+ move $fp, $r6
-+ move $fp, $r7
-+ move $fp, $r8
-+ move $fp, $r9
-+ move $fp, $r10
-+ move $fp, $r11
-+ move $fp, $r16
-+ move $fp, $r17
-+ move $fp, $r18
-+ move $fp, $r19
-+ move $fp, $r12
-+ move $fp, $r13
-+ move $fp, $r14
-+ move $fp, $r15
-+ move $fp, $r20
-+ move $fp, $r21
-+ move $fp, $r22
-+ move $fp, $r23
-+ move $fp, $r24
-+ move $fp, $r25
-+ move $fp, $r26
-+ move $fp, $r27
-+ move $fp, $fp
-+ move $fp, $gp
-+ move $fp, $lp
-+ move $fp, $sp
-+ move $gp, $r0
-+ move $gp, $r1
-+ move $gp, $r2
-+ move $gp, $r3
-+ move $gp, $r4
-+ move $gp, $r5
-+ move $gp, $r6
-+ move $gp, $r7
-+ move $gp, $r8
-+ move $gp, $r9
-+ move $gp, $r10
-+ move $gp, $r11
-+ move $gp, $r16
-+ move $gp, $r17
-+ move $gp, $r18
-+ move $gp, $r19
-+ move $gp, $r12
-+ move $gp, $r13
-+ move $gp, $r14
-+ move $gp, $r15
-+ move $gp, $r20
-+ move $gp, $r21
-+ move $gp, $r22
-+ move $gp, $r23
-+ move $gp, $r24
-+ move $gp, $r25
-+ move $gp, $r26
-+ move $gp, $r27
-+ move $gp, $fp
-+ move $gp, $gp
-+ move $gp, $lp
-+ move $gp, $sp
-+ move $lp, $r0
-+ move $lp, $r1
-+ move $lp, $r2
-+ move $lp, $r3
-+ move $lp, $r4
-+ move $lp, $r5
-+ move $lp, $r6
-+ move $lp, $r7
-+ move $lp, $r8
-+ move $lp, $r9
-+ move $lp, $r10
-+ move $lp, $r11
-+ move $lp, $r16
-+ move $lp, $r17
-+ move $lp, $r18
-+ move $lp, $r19
-+ move $lp, $r12
-+ move $lp, $r13
-+ move $lp, $r14
-+ move $lp, $r15
-+ move $lp, $r20
-+ move $lp, $r21
-+ move $lp, $r22
-+ move $lp, $r23
-+ move $lp, $r24
-+ move $lp, $r25
-+ move $lp, $r26
-+ move $lp, $r27
-+ move $lp, $fp
-+ move $lp, $gp
-+ move $lp, $lp
-+ move $lp, $sp
-+ move $sp, $r0
-+ move $sp, $r1
-+ move $sp, $r2
-+ move $sp, $r3
-+ move $sp, $r4
-+ move $sp, $r5
-+ move $sp, $r6
-+ move $sp, $r7
-+ move $sp, $r8
-+ move $sp, $r9
-+ move $sp, $r10
-+ move $sp, $r11
-+ move $sp, $r16
-+ move $sp, $r17
-+ move $sp, $r18
-+ move $sp, $r19
-+ move $sp, $r12
-+ move $sp, $r13
-+ move $sp, $r14
-+ move $sp, $r15
-+ move $sp, $r20
-+ move $sp, $r21
-+ move $sp, $r22
-+ move $sp, $r23
-+ move $sp, $r24
-+ move $sp, $r25
-+ move $sp, $r26
-+ move $sp, $r27
-+ move $sp, $fp
-+ move $sp, $gp
-+ move $sp, $lp
-+ move $sp, $sp
-+ movi $r0, -16
-+ movi $r0, -15
-+ movi $r0, -14
-+ movi $r0, -13
-+ movi $r0, -12
-+ movi $r0, -11
-+ movi $r0, -10
-+ movi $r0, -9
-+ movi $r0, -8
-+ movi $r0, -7
-+ movi $r0, -6
-+ movi $r0, -5
-+ movi $r0, -4
-+ movi $r0, -3
-+ movi $r0, -2
-+ movi $r0, -1
-+ movi $r0, 0
-+ movi $r0, 1
-+ movi $r0, 2
-+ movi $r0, 3
-+ movi $r0, 4
-+ movi $r0, 5
-+ movi $r0, 6
-+ movi $r0, 7
-+ movi $r0, 8
-+ movi $r0, 9
-+ movi $r0, 10
-+ movi $r0, 11
-+ movi $r0, 12
-+ movi $r0, 13
-+ movi $r0, 14
-+ movi $r0, 15
-+ movi $r1, -16
-+ movi $r1, -15
-+ movi $r1, -14
-+ movi $r1, -13
-+ movi $r1, -12
-+ movi $r1, -11
-+ movi $r1, -10
-+ movi $r1, -9
-+ movi $r1, -8
-+ movi $r1, -7
-+ movi $r1, -6
-+ movi $r1, -5
-+ movi $r1, -4
-+ movi $r1, -3
-+ movi $r1, -2
-+ movi $r1, -1
-+ movi $r1, 0
-+ movi $r1, 1
-+ movi $r1, 2
-+ movi $r1, 3
-+ movi $r1, 4
-+ movi $r1, 5
-+ movi $r1, 6
-+ movi $r1, 7
-+ movi $r1, 8
-+ movi $r1, 9
-+ movi $r1, 10
-+ movi $r1, 11
-+ movi $r1, 12
-+ movi $r1, 13
-+ movi $r1, 14
-+ movi $r1, 15
-+ movi $r2, -16
-+ movi $r2, -15
-+ movi $r2, -14
-+ movi $r2, -13
-+ movi $r2, -12
-+ movi $r2, -11
-+ movi $r2, -10
-+ movi $r2, -9
-+ movi $r2, -8
-+ movi $r2, -7
-+ movi $r2, -6
-+ movi $r2, -5
-+ movi $r2, -4
-+ movi $r2, -3
-+ movi $r2, -2
-+ movi $r2, -1
-+ movi $r2, 0
-+ movi $r2, 1
-+ movi $r2, 2
-+ movi $r2, 3
-+ movi $r2, 4
-+ movi $r2, 5
-+ movi $r2, 6
-+ movi $r2, 7
-+ movi $r2, 8
-+ movi $r2, 9
-+ movi $r2, 10
-+ movi $r2, 11
-+ movi $r2, 12
-+ movi $r2, 13
-+ movi $r2, 14
-+ movi $r2, 15
-+ movi $r3, -16
-+ movi $r3, -15
-+ movi $r3, -14
-+ movi $r3, -13
-+ movi $r3, -12
-+ movi $r3, -11
-+ movi $r3, -10
-+ movi $r3, -9
-+ movi $r3, -8
-+ movi $r3, -7
-+ movi $r3, -6
-+ movi $r3, -5
-+ movi $r3, -4
-+ movi $r3, -3
-+ movi $r3, -2
-+ movi $r3, -1
-+ movi $r3, 0
-+ movi $r3, 1
-+ movi $r3, 2
-+ movi $r3, 3
-+ movi $r3, 4
-+ movi $r3, 5
-+ movi $r3, 6
-+ movi $r3, 7
-+ movi $r3, 8
-+ movi $r3, 9
-+ movi $r3, 10
-+ movi $r3, 11
-+ movi $r3, 12
-+ movi $r3, 13
-+ movi $r3, 14
-+ movi $r3, 15
-+ movi $r4, -16
-+ movi $r4, -15
-+ movi $r4, -14
-+ movi $r4, -13
-+ movi $r4, -12
-+ movi $r4, -11
-+ movi $r4, -10
-+ movi $r4, -9
-+ movi $r4, -8
-+ movi $r4, -7
-+ movi $r4, -6
-+ movi $r4, -5
-+ movi $r4, -4
-+ movi $r4, -3
-+ movi $r4, -2
-+ movi $r4, -1
-+ movi $r4, 0
-+ movi $r4, 1
-+ movi $r4, 2
-+ movi $r4, 3
-+ movi $r4, 4
-+ movi $r4, 5
-+ movi $r4, 6
-+ movi $r4, 7
-+ movi $r4, 8
-+ movi $r4, 9
-+ movi $r4, 10
-+ movi $r4, 11
-+ movi $r4, 12
-+ movi $r4, 13
-+ movi $r4, 14
-+ movi $r4, 15
-+ movi $r5, -16
-+ movi $r5, -15
-+ movi $r5, -14
-+ movi $r5, -13
-+ movi $r5, -12
-+ movi $r5, -11
-+ movi $r5, -10
-+ movi $r5, -9
-+ movi $r5, -8
-+ movi $r5, -7
-+ movi $r5, -6
-+ movi $r5, -5
-+ movi $r5, -4
-+ movi $r5, -3
-+ movi $r5, -2
-+ movi $r5, -1
-+ movi $r5, 0
-+ movi $r5, 1
-+ movi $r5, 2
-+ movi $r5, 3
-+ movi $r5, 4
-+ movi $r5, 5
-+ movi $r5, 6
-+ movi $r5, 7
-+ movi $r5, 8
-+ movi $r5, 9
-+ movi $r5, 10
-+ movi $r5, 11
-+ movi $r5, 12
-+ movi $r5, 13
-+ movi $r5, 14
-+ movi $r5, 15
-+ movi $r6, -16
-+ movi $r6, -15
-+ movi $r6, -14
-+ movi $r6, -13
-+ movi $r6, -12
-+ movi $r6, -11
-+ movi $r6, -10
-+ movi $r6, -9
-+ movi $r6, -8
-+ movi $r6, -7
-+ movi $r6, -6
-+ movi $r6, -5
-+ movi $r6, -4
-+ movi $r6, -3
-+ movi $r6, -2
-+ movi $r6, -1
-+ movi $r6, 0
-+ movi $r6, 1
-+ movi $r6, 2
-+ movi $r6, 3
-+ movi $r6, 4
-+ movi $r6, 5
-+ movi $r6, 6
-+ movi $r6, 7
-+ movi $r6, 8
-+ movi $r6, 9
-+ movi $r6, 10
-+ movi $r6, 11
-+ movi $r6, 12
-+ movi $r6, 13
-+ movi $r6, 14
-+ movi $r6, 15
-+ movi $r7, -16
-+ movi $r7, -15
-+ movi $r7, -14
-+ movi $r7, -13
-+ movi $r7, -12
-+ movi $r7, -11
-+ movi $r7, -10
-+ movi $r7, -9
-+ movi $r7, -8
-+ movi $r7, -7
-+ movi $r7, -6
-+ movi $r7, -5
-+ movi $r7, -4
-+ movi $r7, -3
-+ movi $r7, -2
-+ movi $r7, -1
-+ movi $r7, 0
-+ movi $r7, 1
-+ movi $r7, 2
-+ movi $r7, 3
-+ movi $r7, 4
-+ movi $r7, 5
-+ movi $r7, 6
-+ movi $r7, 7
-+ movi $r7, 8
-+ movi $r7, 9
-+ movi $r7, 10
-+ movi $r7, 11
-+ movi $r7, 12
-+ movi $r7, 13
-+ movi $r7, 14
-+ movi $r7, 15
-+ movi $r8, -16
-+ movi $r8, -15
-+ movi $r8, -14
-+ movi $r8, -13
-+ movi $r8, -12
-+ movi $r8, -11
-+ movi $r8, -10
-+ movi $r8, -9
-+ movi $r8, -8
-+ movi $r8, -7
-+ movi $r8, -6
-+ movi $r8, -5
-+ movi $r8, -4
-+ movi $r8, -3
-+ movi $r8, -2
-+ movi $r8, -1
-+ movi $r8, 0
-+ movi $r8, 1
-+ movi $r8, 2
-+ movi $r8, 3
-+ movi $r8, 4
-+ movi $r8, 5
-+ movi $r8, 6
-+ movi $r8, 7
-+ movi $r8, 8
-+ movi $r8, 9
-+ movi $r8, 10
-+ movi $r8, 11
-+ movi $r8, 12
-+ movi $r8, 13
-+ movi $r8, 14
-+ movi $r8, 15
-+ movi $r9, -16
-+ movi $r9, -15
-+ movi $r9, -14
-+ movi $r9, -13
-+ movi $r9, -12
-+ movi $r9, -11
-+ movi $r9, -10
-+ movi $r9, -9
-+ movi $r9, -8
-+ movi $r9, -7
-+ movi $r9, -6
-+ movi $r9, -5
-+ movi $r9, -4
-+ movi $r9, -3
-+ movi $r9, -2
-+ movi $r9, -1
-+ movi $r9, 0
-+ movi $r9, 1
-+ movi $r9, 2
-+ movi $r9, 3
-+ movi $r9, 4
-+ movi $r9, 5
-+ movi $r9, 6
-+ movi $r9, 7
-+ movi $r9, 8
-+ movi $r9, 9
-+ movi $r9, 10
-+ movi $r9, 11
-+ movi $r9, 12
-+ movi $r9, 13
-+ movi $r9, 14
-+ movi $r9, 15
-+ movi $r10, -16
-+ movi $r10, -15
-+ movi $r10, -14
-+ movi $r10, -13
-+ movi $r10, -12
-+ movi $r10, -11
-+ movi $r10, -10
-+ movi $r10, -9
-+ movi $r10, -8
-+ movi $r10, -7
-+ movi $r10, -6
-+ movi $r10, -5
-+ movi $r10, -4
-+ movi $r10, -3
-+ movi $r10, -2
-+ movi $r10, -1
-+ movi $r10, 0
-+ movi $r10, 1
-+ movi $r10, 2
-+ movi $r10, 3
-+ movi $r10, 4
-+ movi $r10, 5
-+ movi $r10, 6
-+ movi $r10, 7
-+ movi $r10, 8
-+ movi $r10, 9
-+ movi $r10, 10
-+ movi $r10, 11
-+ movi $r10, 12
-+ movi $r10, 13
-+ movi $r10, 14
-+ movi $r10, 15
-+ movi $r11, -16
-+ movi $r11, -15
-+ movi $r11, -14
-+ movi $r11, -13
-+ movi $r11, -12
-+ movi $r11, -11
-+ movi $r11, -10
-+ movi $r11, -9
-+ movi $r11, -8
-+ movi $r11, -7
-+ movi $r11, -6
-+ movi $r11, -5
-+ movi $r11, -4
-+ movi $r11, -3
-+ movi $r11, -2
-+ movi $r11, -1
-+ movi $r11, 0
-+ movi $r11, 1
-+ movi $r11, 2
-+ movi $r11, 3
-+ movi $r11, 4
-+ movi $r11, 5
-+ movi $r11, 6
-+ movi $r11, 7
-+ movi $r11, 8
-+ movi $r11, 9
-+ movi $r11, 10
-+ movi $r11, 11
-+ movi $r11, 12
-+ movi $r11, 13
-+ movi $r11, 14
-+ movi $r11, 15
-+ movi $r16, -16
-+ movi $r16, -15
-+ movi $r16, -14
-+ movi $r16, -13
-+ movi $r16, -12
-+ movi $r16, -11
-+ movi $r16, -10
-+ movi $r16, -9
-+ movi $r16, -8
-+ movi $r16, -7
-+ movi $r16, -6
-+ movi $r16, -5
-+ movi $r16, -4
-+ movi $r16, -3
-+ movi $r16, -2
-+ movi $r16, -1
-+ movi $r16, 0
-+ movi $r16, 1
-+ movi $r16, 2
-+ movi $r16, 3
-+ movi $r16, 4
-+ movi $r16, 5
-+ movi $r16, 6
-+ movi $r16, 7
-+ movi $r16, 8
-+ movi $r16, 9
-+ movi $r16, 10
-+ movi $r16, 11
-+ movi $r16, 12
-+ movi $r16, 13
-+ movi $r16, 14
-+ movi $r16, 15
-+ movi $r17, -16
-+ movi $r17, -15
-+ movi $r17, -14
-+ movi $r17, -13
-+ movi $r17, -12
-+ movi $r17, -11
-+ movi $r17, -10
-+ movi $r17, -9
-+ movi $r17, -8
-+ movi $r17, -7
-+ movi $r17, -6
-+ movi $r17, -5
-+ movi $r17, -4
-+ movi $r17, -3
-+ movi $r17, -2
-+ movi $r17, -1
-+ movi $r17, 0
-+ movi $r17, 1
-+ movi $r17, 2
-+ movi $r17, 3
-+ movi $r17, 4
-+ movi $r17, 5
-+ movi $r17, 6
-+ movi $r17, 7
-+ movi $r17, 8
-+ movi $r17, 9
-+ movi $r17, 10
-+ movi $r17, 11
-+ movi $r17, 12
-+ movi $r17, 13
-+ movi $r17, 14
-+ movi $r17, 15
-+ movi $r18, -16
-+ movi $r18, -15
-+ movi $r18, -14
-+ movi $r18, -13
-+ movi $r18, -12
-+ movi $r18, -11
-+ movi $r18, -10
-+ movi $r18, -9
-+ movi $r18, -8
-+ movi $r18, -7
-+ movi $r18, -6
-+ movi $r18, -5
-+ movi $r18, -4
-+ movi $r18, -3
-+ movi $r18, -2
-+ movi $r18, -1
-+ movi $r18, 0
-+ movi $r18, 1
-+ movi $r18, 2
-+ movi $r18, 3
-+ movi $r18, 4
-+ movi $r18, 5
-+ movi $r18, 6
-+ movi $r18, 7
-+ movi $r18, 8
-+ movi $r18, 9
-+ movi $r18, 10
-+ movi $r18, 11
-+ movi $r18, 12
-+ movi $r18, 13
-+ movi $r18, 14
-+ movi $r18, 15
-+ movi $r19, -16
-+ movi $r19, -15
-+ movi $r19, -14
-+ movi $r19, -13
-+ movi $r19, -12
-+ movi $r19, -11
-+ movi $r19, -10
-+ movi $r19, -9
-+ movi $r19, -8
-+ movi $r19, -7
-+ movi $r19, -6
-+ movi $r19, -5
-+ movi $r19, -4
-+ movi $r19, -3
-+ movi $r19, -2
-+ movi $r19, -1
-+ movi $r19, 0
-+ movi $r19, 1
-+ movi $r19, 2
-+ movi $r19, 3
-+ movi $r19, 4
-+ movi $r19, 5
-+ movi $r19, 6
-+ movi $r19, 7
-+ movi $r19, 8
-+ movi $r19, 9
-+ movi $r19, 10
-+ movi $r19, 11
-+ movi $r19, 12
-+ movi $r19, 13
-+ movi $r19, 14
-+ movi $r19, 15
-+ movi $r12, -16
-+ movi $r12, -15
-+ movi $r12, -14
-+ movi $r12, -13
-+ movi $r12, -12
-+ movi $r12, -11
-+ movi $r12, -10
-+ movi $r12, -9
-+ movi $r12, -8
-+ movi $r12, -7
-+ movi $r12, -6
-+ movi $r12, -5
-+ movi $r12, -4
-+ movi $r12, -3
-+ movi $r12, -2
-+ movi $r12, -1
-+ movi $r12, 0
-+ movi $r12, 1
-+ movi $r12, 2
-+ movi $r12, 3
-+ movi $r12, 4
-+ movi $r12, 5
-+ movi $r12, 6
-+ movi $r12, 7
-+ movi $r12, 8
-+ movi $r12, 9
-+ movi $r12, 10
-+ movi $r12, 11
-+ movi $r12, 12
-+ movi $r12, 13
-+ movi $r12, 14
-+ movi $r12, 15
-+ movi $r13, -16
-+ movi $r13, -15
-+ movi $r13, -14
-+ movi $r13, -13
-+ movi $r13, -12
-+ movi $r13, -11
-+ movi $r13, -10
-+ movi $r13, -9
-+ movi $r13, -8
-+ movi $r13, -7
-+ movi $r13, -6
-+ movi $r13, -5
-+ movi $r13, -4
-+ movi $r13, -3
-+ movi $r13, -2
-+ movi $r13, -1
-+ movi $r13, 0
-+ movi $r13, 1
-+ movi $r13, 2
-+ movi $r13, 3
-+ movi $r13, 4
-+ movi $r13, 5
-+ movi $r13, 6
-+ movi $r13, 7
-+ movi $r13, 8
-+ movi $r13, 9
-+ movi $r13, 10
-+ movi $r13, 11
-+ movi $r13, 12
-+ movi $r13, 13
-+ movi $r13, 14
-+ movi $r13, 15
-+ movi $r14, -16
-+ movi $r14, -15
-+ movi $r14, -14
-+ movi $r14, -13
-+ movi $r14, -12
-+ movi $r14, -11
-+ movi $r14, -10
-+ movi $r14, -9
-+ movi $r14, -8
-+ movi $r14, -7
-+ movi $r14, -6
-+ movi $r14, -5
-+ movi $r14, -4
-+ movi $r14, -3
-+ movi $r14, -2
-+ movi $r14, -1
-+ movi $r14, 0
-+ movi $r14, 1
-+ movi $r14, 2
-+ movi $r14, 3
-+ movi $r14, 4
-+ movi $r14, 5
-+ movi $r14, 6
-+ movi $r14, 7
-+ movi $r14, 8
-+ movi $r14, 9
-+ movi $r14, 10
-+ movi $r14, 11
-+ movi $r14, 12
-+ movi $r14, 13
-+ movi $r14, 14
-+ movi $r14, 15
-+ movi $r15, -16
-+ movi $r15, -15
-+ movi $r15, -14
-+ movi $r15, -13
-+ movi $r15, -12
-+ movi $r15, -11
-+ movi $r15, -10
-+ movi $r15, -9
-+ movi $r15, -8
-+ movi $r15, -7
-+ movi $r15, -6
-+ movi $r15, -5
-+ movi $r15, -4
-+ movi $r15, -3
-+ movi $r15, -2
-+ movi $r15, -1
-+ movi $r15, 0
-+ movi $r15, 1
-+ movi $r15, 2
-+ movi $r15, 3
-+ movi $r15, 4
-+ movi $r15, 5
-+ movi $r15, 6
-+ movi $r15, 7
-+ movi $r15, 8
-+ movi $r15, 9
-+ movi $r15, 10
-+ movi $r15, 11
-+ movi $r15, 12
-+ movi $r15, 13
-+ movi $r15, 14
-+ movi $r15, 15
-+ movi $r20, -16
-+ movi $r20, -15
-+ movi $r20, -14
-+ movi $r20, -13
-+ movi $r20, -12
-+ movi $r20, -11
-+ movi $r20, -10
-+ movi $r20, -9
-+ movi $r20, -8
-+ movi $r20, -7
-+ movi $r20, -6
-+ movi $r20, -5
-+ movi $r20, -4
-+ movi $r20, -3
-+ movi $r20, -2
-+ movi $r20, -1
-+ movi $r20, 0
-+ movi $r20, 1
-+ movi $r20, 2
-+ movi $r20, 3
-+ movi $r20, 4
-+ movi $r20, 5
-+ movi $r20, 6
-+ movi $r20, 7
-+ movi $r20, 8
-+ movi $r20, 9
-+ movi $r20, 10
-+ movi $r20, 11
-+ movi $r20, 12
-+ movi $r20, 13
-+ movi $r20, 14
-+ movi $r20, 15
-+ movi $r21, -16
-+ movi $r21, -15
-+ movi $r21, -14
-+ movi $r21, -13
-+ movi $r21, -12
-+ movi $r21, -11
-+ movi $r21, -10
-+ movi $r21, -9
-+ movi $r21, -8
-+ movi $r21, -7
-+ movi $r21, -6
-+ movi $r21, -5
-+ movi $r21, -4
-+ movi $r21, -3
-+ movi $r21, -2
-+ movi $r21, -1
-+ movi $r21, 0
-+ movi $r21, 1
-+ movi $r21, 2
-+ movi $r21, 3
-+ movi $r21, 4
-+ movi $r21, 5
-+ movi $r21, 6
-+ movi $r21, 7
-+ movi $r21, 8
-+ movi $r21, 9
-+ movi $r21, 10
-+ movi $r21, 11
-+ movi $r21, 12
-+ movi $r21, 13
-+ movi $r21, 14
-+ movi $r21, 15
-+ movi $r22, -16
-+ movi $r22, -15
-+ movi $r22, -14
-+ movi $r22, -13
-+ movi $r22, -12
-+ movi $r22, -11
-+ movi $r22, -10
-+ movi $r22, -9
-+ movi $r22, -8
-+ movi $r22, -7
-+ movi $r22, -6
-+ movi $r22, -5
-+ movi $r22, -4
-+ movi $r22, -3
-+ movi $r22, -2
-+ movi $r22, -1
-+ movi $r22, 0
-+ movi $r22, 1
-+ movi $r22, 2
-+ movi $r22, 3
-+ movi $r22, 4
-+ movi $r22, 5
-+ movi $r22, 6
-+ movi $r22, 7
-+ movi $r22, 8
-+ movi $r22, 9
-+ movi $r22, 10
-+ movi $r22, 11
-+ movi $r22, 12
-+ movi $r22, 13
-+ movi $r22, 14
-+ movi $r22, 15
-+ movi $r23, -16
-+ movi $r23, -15
-+ movi $r23, -14
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-+ movi $r23, -12
-+ movi $r23, -11
-+ movi $r23, -10
-+ movi $r23, -9
-+ movi $r23, -8
-+ movi $r23, -7
-+ movi $r23, -6
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-+ movi $r23, -4
-+ movi $r23, -3
-+ movi $r23, -2
-+ movi $r23, -1
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-+ movi $r23, 6
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-+ movi $r23, 10
-+ movi $r23, 11
-+ movi $r23, 12
-+ movi $r23, 13
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-+ movi $r23, 15
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-+ movi $r24, -12
-+ movi $r24, -11
-+ movi $r24, -10
-+ movi $r24, -9
-+ movi $r24, -8
-+ movi $r24, -7
-+ movi $r24, -6
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-+ movi $r24, -4
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-+ movi $r24, 6
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-+ movi $r24, 10
-+ movi $r24, 11
-+ movi $r24, 12
-+ movi $r24, 13
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-+ movi $r24, 15
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-+ movi $r25, -14
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-+ movi $r25, -12
-+ movi $r25, -11
-+ movi $r25, -10
-+ movi $r25, -9
-+ movi $r25, -8
-+ movi $r25, -7
-+ movi $r25, -6
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-+ movi $r25, -4
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-+ movi $r25, 11
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-+ movi $r26, -14
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-+ movi $r26, -8
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-+ movi $r26, -4
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-+ movi $r27, -14
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-+ movi $r27, -12
-+ movi $r27, -11
-+ movi $r27, -10
-+ movi $r27, -9
-+ movi $r27, -8
-+ movi $r27, -7
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-+ movi $r27, -4
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-+ movi $r27, 6
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-+ movi $r27, 11
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-+ movi $gp, -7
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-+ movi $lp, -14
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-+ movi $lp, -11
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-+ movi $lp, -9
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-+ movi $lp, -7
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-+ add $r8, $r8, $r8
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-+ add $r8, $r8, $r13
-+ add $r8, $r8, $r14
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-+ add $r8, $r20, $r8
-+ add $r8, $r21, $r8
-+ add $r8, $r22, $r8
-+ add $r8, $r23, $r8
-+ add $r8, $r24, $r8
-+ add $r8, $r25, $r8
-+ add $r8, $r26, $r8
-+ add $r8, $r27, $r8
-+ add $r8, $fp, $r8
-+ add $r8, $gp, $r8
-+ add $r8, $lp, $r8
-+ add $r8, $sp, $r8
-+ add $r9, $r0, $r9
-+ add $r9, $r1, $r9
-+ add $r9, $r2, $r9
-+ add $r9, $r3, $r9
-+ add $r9, $r4, $r9
-+ add $r9, $r5, $r9
-+ add $r9, $r6, $r9
-+ add $r9, $r7, $r9
-+ add $r9, $r8, $r9
-+ add $r9, $r9, $r9
-+ add $r9, $r10, $r9
-+ add $r9, $r11, $r9
-+ add $r9, $r16, $r9
-+ add $r9, $r17, $r9
-+ add $r9, $r18, $r9
-+ add $r9, $r19, $r9
-+ add $r9, $r12, $r9
-+ add $r9, $r13, $r9
-+ add $r9, $r14, $r9
-+ add $r9, $r15, $r9
-+ add $r9, $r20, $r9
-+ add $r9, $r21, $r9
-+ add $r9, $r22, $r9
-+ add $r9, $r23, $r9
-+ add $r9, $r24, $r9
-+ add $r9, $r25, $r9
-+ add $r9, $r26, $r9
-+ add $r9, $r27, $r9
-+ add $r9, $fp, $r9
-+ add $r9, $gp, $r9
-+ add $r9, $lp, $r9
-+ add $r9, $sp, $r9
-+ add $r10, $r0, $r10
-+ add $r10, $r1, $r10
-+ add $r10, $r2, $r10
-+ add $r10, $r3, $r10
-+ add $r10, $r4, $r10
-+ add $r10, $r5, $r10
-+ add $r10, $r6, $r10
-+ add $r10, $r7, $r10
-+ add $r10, $r8, $r10
-+ add $r10, $r9, $r10
-+ add $r10, $r10, $r10
-+ add $r10, $r11, $r10
-+ add $r10, $r16, $r10
-+ add $r10, $r17, $r10
-+ add $r10, $r18, $r10
-+ add $r10, $r19, $r10
-+ add $r10, $r12, $r10
-+ add $r10, $r13, $r10
-+ add $r10, $r14, $r10
-+ add $r10, $r15, $r10
-+ add $r10, $r20, $r10
-+ add $r10, $r21, $r10
-+ add $r10, $r22, $r10
-+ add $r10, $r23, $r10
-+ add $r10, $r24, $r10
-+ add $r10, $r25, $r10
-+ add $r10, $r26, $r10
-+ add $r10, $r27, $r10
-+ add $r10, $fp, $r10
-+ add $r10, $gp, $r10
-+ add $r10, $lp, $r10
-+ add $r10, $sp, $r10
-+ add $r11, $r0, $r11
-+ add $r11, $r1, $r11
-+ add $r11, $r2, $r11
-+ add $r11, $r3, $r11
-+ add $r11, $r4, $r11
-+ add $r11, $r5, $r11
-+ add $r11, $r6, $r11
-+ add $r11, $r7, $r11
-+ add $r11, $r8, $r11
-+ add $r11, $r9, $r11
-+ add $r11, $r10, $r11
-+ add $r11, $r11, $r11
-+ add $r11, $r16, $r11
-+ add $r11, $r17, $r11
-+ add $r11, $r18, $r11
-+ add $r11, $r19, $r11
-+ add $r11, $r12, $r11
-+ add $r11, $r13, $r11
-+ add $r11, $r14, $r11
-+ add $r11, $r15, $r11
-+ add $r11, $r20, $r11
-+ add $r11, $r21, $r11
-+ add $r11, $r22, $r11
-+ add $r11, $r23, $r11
-+ add $r11, $r24, $r11
-+ add $r11, $r25, $r11
-+ add $r11, $r26, $r11
-+ add $r11, $r27, $r11
-+ add $r11, $fp, $r11
-+ add $r11, $gp, $r11
-+ add $r11, $lp, $r11
-+ add $r11, $sp, $r11
-+ add $r16, $r0, $r16
-+ add $r16, $r1, $r16
-+ add $r16, $r2, $r16
-+ add $r16, $r3, $r16
-+ add $r16, $r4, $r16
-+ add $r16, $r5, $r16
-+ add $r16, $r6, $r16
-+ add $r16, $r7, $r16
-+ add $r16, $r8, $r16
-+ add $r16, $r9, $r16
-+ add $r16, $r10, $r16
-+ add $r16, $r11, $r16
-+ add $r16, $r16, $r16
-+ add $r16, $r17, $r16
-+ add $r16, $r18, $r16
-+ add $r16, $r19, $r16
-+ add $r16, $r12, $r16
-+ add $r16, $r13, $r16
-+ add $r16, $r14, $r16
-+ add $r16, $r15, $r16
-+ add $r16, $r20, $r16
-+ add $r16, $r21, $r16
-+ add $r16, $r22, $r16
-+ add $r16, $r23, $r16
-+ add $r16, $r24, $r16
-+ add $r16, $r25, $r16
-+ add $r16, $r26, $r16
-+ add $r16, $r27, $r16
-+ add $r16, $fp, $r16
-+ add $r16, $gp, $r16
-+ add $r16, $lp, $r16
-+ add $r16, $sp, $r16
-+ add $r17, $r0, $r17
-+ add $r17, $r1, $r17
-+ add $r17, $r2, $r17
-+ add $r17, $r3, $r17
-+ add $r17, $r4, $r17
-+ add $r17, $r5, $r17
-+ add $r17, $r6, $r17
-+ add $r17, $r7, $r17
-+ add $r17, $r8, $r17
-+ add $r17, $r9, $r17
-+ add $r17, $r10, $r17
-+ add $r17, $r11, $r17
-+ add $r17, $r16, $r17
-+ add $r17, $r17, $r17
-+ add $r17, $r18, $r17
-+ add $r17, $r19, $r17
-+ add $r17, $r12, $r17
-+ add $r17, $r13, $r17
-+ add $r17, $r14, $r17
-+ add $r17, $r15, $r17
-+ add $r17, $r20, $r17
-+ add $r17, $r21, $r17
-+ add $r17, $r22, $r17
-+ add $r17, $r23, $r17
-+ add $r17, $r24, $r17
-+ add $r17, $r25, $r17
-+ add $r17, $r26, $r17
-+ add $r17, $r27, $r17
-+ add $r17, $fp, $r17
-+ add $r17, $gp, $r17
-+ add $r17, $lp, $r17
-+ add $r17, $sp, $r17
-+ add $r18, $r0, $r18
-+ add $r18, $r1, $r18
-+ add $r18, $r2, $r18
-+ add $r18, $r3, $r18
-+ add $r18, $r4, $r18
-+ add $r18, $r5, $r18
-+ add $r18, $r6, $r18
-+ add $r18, $r7, $r18
-+ add $r18, $r8, $r18
-+ add $r18, $r9, $r18
-+ add $r18, $r10, $r18
-+ add $r18, $r11, $r18
-+ add $r18, $r16, $r18
-+ add $r18, $r17, $r18
-+ add $r18, $r18, $r18
-+ add $r18, $r19, $r18
-+ add $r18, $r12, $r18
-+ add $r18, $r13, $r18
-+ add $r18, $r14, $r18
-+ add $r18, $r15, $r18
-+ add $r18, $r20, $r18
-+ add $r18, $r21, $r18
-+ add $r18, $r22, $r18
-+ add $r18, $r23, $r18
-+ add $r18, $r24, $r18
-+ add $r18, $r25, $r18
-+ add $r18, $r26, $r18
-+ add $r18, $r27, $r18
-+ add $r18, $fp, $r18
-+ add $r18, $gp, $r18
-+ add $r18, $lp, $r18
-+ add $r18, $sp, $r18
-+ add $r19, $r0, $r19
-+ add $r19, $r1, $r19
-+ add $r19, $r2, $r19
-+ add $r19, $r3, $r19
-+ add $r19, $r4, $r19
-+ add $r19, $r5, $r19
-+ add $r19, $r6, $r19
-+ add $r19, $r7, $r19
-+ add $r19, $r8, $r19
-+ add $r19, $r9, $r19
-+ add $r19, $r10, $r19
-+ add $r19, $r11, $r19
-+ add $r19, $r16, $r19
-+ add $r19, $r17, $r19
-+ add $r19, $r18, $r19
-+ add $r19, $r19, $r19
-+ add $r19, $r12, $r19
-+ add $r19, $r13, $r19
-+ add $r19, $r14, $r19
-+ add $r19, $r15, $r19
-+ add $r19, $r20, $r19
-+ add $r19, $r21, $r19
-+ add $r19, $r22, $r19
-+ add $r19, $r23, $r19
-+ add $r19, $r24, $r19
-+ add $r19, $r25, $r19
-+ add $r19, $r26, $r19
-+ add $r19, $r27, $r19
-+ add $r19, $fp, $r19
-+ add $r19, $gp, $r19
-+ add $r19, $lp, $r19
-+ add $r19, $sp, $r19
-+ sub $r0, $r0, $r0
-+ sub $r0, $r0, $r1
-+ sub $r0, $r0, $r2
-+ sub $r0, $r0, $r3
-+ sub $r0, $r0, $r4
-+ sub $r0, $r0, $r5
-+ sub $r0, $r0, $r6
-+ sub $r0, $r0, $r7
-+ sub $r0, $r0, $r8
-+ sub $r0, $r0, $r9
-+ sub $r0, $r0, $r10
-+ sub $r0, $r0, $r11
-+ sub $r0, $r0, $r16
-+ sub $r0, $r0, $r17
-+ sub $r0, $r0, $r18
-+ sub $r0, $r0, $r19
-+ sub $r0, $r0, $r12
-+ sub $r0, $r0, $r13
-+ sub $r0, $r0, $r14
-+ sub $r0, $r0, $r15
-+ sub $r0, $r0, $r20
-+ sub $r0, $r0, $r21
-+ sub $r0, $r0, $r22
-+ sub $r0, $r0, $r23
-+ sub $r0, $r0, $r24
-+ sub $r0, $r0, $r25
-+ sub $r0, $r0, $r26
-+ sub $r0, $r0, $r27
-+ sub $r0, $r0, $fp
-+ sub $r0, $r0, $gp
-+ sub $r0, $r0, $lp
-+ sub $r0, $r0, $sp
-+ sub $r1, $r1, $r0
-+ sub $r1, $r1, $r1
-+ sub $r1, $r1, $r2
-+ sub $r1, $r1, $r3
-+ sub $r1, $r1, $r4
-+ sub $r1, $r1, $r5
-+ sub $r1, $r1, $r6
-+ sub $r1, $r1, $r7
-+ sub $r1, $r1, $r8
-+ sub $r1, $r1, $r9
-+ sub $r1, $r1, $r10
-+ sub $r1, $r1, $r11
-+ sub $r1, $r1, $r16
-+ sub $r1, $r1, $r17
-+ sub $r1, $r1, $r18
-+ sub $r1, $r1, $r19
-+ sub $r1, $r1, $r12
-+ sub $r1, $r1, $r13
-+ sub $r1, $r1, $r14
-+ sub $r1, $r1, $r15
-+ sub $r1, $r1, $r20
-+ sub $r1, $r1, $r21
-+ sub $r1, $r1, $r22
-+ sub $r1, $r1, $r23
-+ sub $r1, $r1, $r24
-+ sub $r1, $r1, $r25
-+ sub $r1, $r1, $r26
-+ sub $r1, $r1, $r27
-+ sub $r1, $r1, $fp
-+ sub $r1, $r1, $gp
-+ sub $r1, $r1, $lp
-+ sub $r1, $r1, $sp
-+ sub $r2, $r2, $r0
-+ sub $r2, $r2, $r1
-+ sub $r2, $r2, $r2
-+ sub $r2, $r2, $r3
-+ sub $r2, $r2, $r4
-+ sub $r2, $r2, $r5
-+ sub $r2, $r2, $r6
-+ sub $r2, $r2, $r7
-+ sub $r2, $r2, $r8
-+ sub $r2, $r2, $r9
-+ sub $r2, $r2, $r10
-+ sub $r2, $r2, $r11
-+ sub $r2, $r2, $r16
-+ sub $r2, $r2, $r17
-+ sub $r2, $r2, $r18
-+ sub $r2, $r2, $r19
-+ sub $r2, $r2, $r12
-+ sub $r2, $r2, $r13
-+ sub $r2, $r2, $r14
-+ sub $r2, $r2, $r15
-+ sub $r2, $r2, $r20
-+ sub $r2, $r2, $r21
-+ sub $r2, $r2, $r22
-+ sub $r2, $r2, $r23
-+ sub $r2, $r2, $r24
-+ sub $r2, $r2, $r25
-+ sub $r2, $r2, $r26
-+ sub $r2, $r2, $r27
-+ sub $r2, $r2, $fp
-+ sub $r2, $r2, $gp
-+ sub $r2, $r2, $lp
-+ sub $r2, $r2, $sp
-+ sub $r3, $r3, $r0
-+ sub $r3, $r3, $r1
-+ sub $r3, $r3, $r2
-+ sub $r3, $r3, $r3
-+ sub $r3, $r3, $r4
-+ sub $r3, $r3, $r5
-+ sub $r3, $r3, $r6
-+ sub $r3, $r3, $r7
-+ sub $r3, $r3, $r8
-+ sub $r3, $r3, $r9
-+ sub $r3, $r3, $r10
-+ sub $r3, $r3, $r11
-+ sub $r3, $r3, $r16
-+ sub $r3, $r3, $r17
-+ sub $r3, $r3, $r18
-+ sub $r3, $r3, $r19
-+ sub $r3, $r3, $r12
-+ sub $r3, $r3, $r13
-+ sub $r3, $r3, $r14
-+ sub $r3, $r3, $r15
-+ sub $r3, $r3, $r20
-+ sub $r3, $r3, $r21
-+ sub $r3, $r3, $r22
-+ sub $r3, $r3, $r23
-+ sub $r3, $r3, $r24
-+ sub $r3, $r3, $r25
-+ sub $r3, $r3, $r26
-+ sub $r3, $r3, $r27
-+ sub $r3, $r3, $fp
-+ sub $r3, $r3, $gp
-+ sub $r3, $r3, $lp
-+ sub $r3, $r3, $sp
-+ sub $r4, $r4, $r0
-+ sub $r4, $r4, $r1
-+ sub $r4, $r4, $r2
-+ sub $r4, $r4, $r3
-+ sub $r4, $r4, $r4
-+ sub $r4, $r4, $r5
-+ sub $r4, $r4, $r6
-+ sub $r4, $r4, $r7
-+ sub $r4, $r4, $r8
-+ sub $r4, $r4, $r9
-+ sub $r4, $r4, $r10
-+ sub $r4, $r4, $r11
-+ sub $r4, $r4, $r16
-+ sub $r4, $r4, $r17
-+ sub $r4, $r4, $r18
-+ sub $r4, $r4, $r19
-+ sub $r4, $r4, $r12
-+ sub $r4, $r4, $r13
-+ sub $r4, $r4, $r14
-+ sub $r4, $r4, $r15
-+ sub $r4, $r4, $r20
-+ sub $r4, $r4, $r21
-+ sub $r4, $r4, $r22
-+ sub $r4, $r4, $r23
-+ sub $r4, $r4, $r24
-+ sub $r4, $r4, $r25
-+ sub $r4, $r4, $r26
-+ sub $r4, $r4, $r27
-+ sub $r4, $r4, $fp
-+ sub $r4, $r4, $gp
-+ sub $r4, $r4, $lp
-+ sub $r4, $r4, $sp
-+ sub $r5, $r5, $r0
-+ sub $r5, $r5, $r1
-+ sub $r5, $r5, $r2
-+ sub $r5, $r5, $r3
-+ sub $r5, $r5, $r4
-+ sub $r5, $r5, $r5
-+ sub $r5, $r5, $r6
-+ sub $r5, $r5, $r7
-+ sub $r5, $r5, $r8
-+ sub $r5, $r5, $r9
-+ sub $r5, $r5, $r10
-+ sub $r5, $r5, $r11
-+ sub $r5, $r5, $r16
-+ sub $r5, $r5, $r17
-+ sub $r5, $r5, $r18
-+ sub $r5, $r5, $r19
-+ sub $r5, $r5, $r12
-+ sub $r5, $r5, $r13
-+ sub $r5, $r5, $r14
-+ sub $r5, $r5, $r15
-+ sub $r5, $r5, $r20
-+ sub $r5, $r5, $r21
-+ sub $r5, $r5, $r22
-+ sub $r5, $r5, $r23
-+ sub $r5, $r5, $r24
-+ sub $r5, $r5, $r25
-+ sub $r5, $r5, $r26
-+ sub $r5, $r5, $r27
-+ sub $r5, $r5, $fp
-+ sub $r5, $r5, $gp
-+ sub $r5, $r5, $lp
-+ sub $r5, $r5, $sp
-+ sub $r6, $r6, $r0
-+ sub $r6, $r6, $r1
-+ sub $r6, $r6, $r2
-+ sub $r6, $r6, $r3
-+ sub $r6, $r6, $r4
-+ sub $r6, $r6, $r5
-+ sub $r6, $r6, $r6
-+ sub $r6, $r6, $r7
-+ sub $r6, $r6, $r8
-+ sub $r6, $r6, $r9
-+ sub $r6, $r6, $r10
-+ sub $r6, $r6, $r11
-+ sub $r6, $r6, $r16
-+ sub $r6, $r6, $r17
-+ sub $r6, $r6, $r18
-+ sub $r6, $r6, $r19
-+ sub $r6, $r6, $r12
-+ sub $r6, $r6, $r13
-+ sub $r6, $r6, $r14
-+ sub $r6, $r6, $r15
-+ sub $r6, $r6, $r20
-+ sub $r6, $r6, $r21
-+ sub $r6, $r6, $r22
-+ sub $r6, $r6, $r23
-+ sub $r6, $r6, $r24
-+ sub $r6, $r6, $r25
-+ sub $r6, $r6, $r26
-+ sub $r6, $r6, $r27
-+ sub $r6, $r6, $fp
-+ sub $r6, $r6, $gp
-+ sub $r6, $r6, $lp
-+ sub $r6, $r6, $sp
-+ sub $r7, $r7, $r0
-+ sub $r7, $r7, $r1
-+ sub $r7, $r7, $r2
-+ sub $r7, $r7, $r3
-+ sub $r7, $r7, $r4
-+ sub $r7, $r7, $r5
-+ sub $r7, $r7, $r6
-+ sub $r7, $r7, $r7
-+ sub $r7, $r7, $r8
-+ sub $r7, $r7, $r9
-+ sub $r7, $r7, $r10
-+ sub $r7, $r7, $r11
-+ sub $r7, $r7, $r16
-+ sub $r7, $r7, $r17
-+ sub $r7, $r7, $r18
-+ sub $r7, $r7, $r19
-+ sub $r7, $r7, $r12
-+ sub $r7, $r7, $r13
-+ sub $r7, $r7, $r14
-+ sub $r7, $r7, $r15
-+ sub $r7, $r7, $r20
-+ sub $r7, $r7, $r21
-+ sub $r7, $r7, $r22
-+ sub $r7, $r7, $r23
-+ sub $r7, $r7, $r24
-+ sub $r7, $r7, $r25
-+ sub $r7, $r7, $r26
-+ sub $r7, $r7, $r27
-+ sub $r7, $r7, $fp
-+ sub $r7, $r7, $gp
-+ sub $r7, $r7, $lp
-+ sub $r7, $r7, $sp
-+ sub $r8, $r8, $r0
-+ sub $r8, $r8, $r1
-+ sub $r8, $r8, $r2
-+ sub $r8, $r8, $r3
-+ sub $r8, $r8, $r4
-+ sub $r8, $r8, $r5
-+ sub $r8, $r8, $r6
-+ sub $r8, $r8, $r7
-+ sub $r8, $r8, $r8
-+ sub $r8, $r8, $r9
-+ sub $r8, $r8, $r10
-+ sub $r8, $r8, $r11
-+ sub $r8, $r8, $r16
-+ sub $r8, $r8, $r17
-+ sub $r8, $r8, $r18
-+ sub $r8, $r8, $r19
-+ sub $r8, $r8, $r12
-+ sub $r8, $r8, $r13
-+ sub $r8, $r8, $r14
-+ sub $r8, $r8, $r15
-+ sub $r8, $r8, $r20
-+ sub $r8, $r8, $r21
-+ sub $r8, $r8, $r22
-+ sub $r8, $r8, $r23
-+ sub $r8, $r8, $r24
-+ sub $r8, $r8, $r25
-+ sub $r8, $r8, $r26
-+ sub $r8, $r8, $r27
-+ sub $r8, $r8, $fp
-+ sub $r8, $r8, $gp
-+ sub $r8, $r8, $lp
-+ sub $r8, $r8, $sp
-+ sub $r9, $r9, $r0
-+ sub $r9, $r9, $r1
-+ sub $r9, $r9, $r2
-+ sub $r9, $r9, $r3
-+ sub $r9, $r9, $r4
-+ sub $r9, $r9, $r5
-+ sub $r9, $r9, $r6
-+ sub $r9, $r9, $r7
-+ sub $r9, $r9, $r8
-+ sub $r9, $r9, $r9
-+ sub $r9, $r9, $r10
-+ sub $r9, $r9, $r11
-+ sub $r9, $r9, $r16
-+ sub $r9, $r9, $r17
-+ sub $r9, $r9, $r18
-+ sub $r9, $r9, $r19
-+ sub $r9, $r9, $r12
-+ sub $r9, $r9, $r13
-+ sub $r9, $r9, $r14
-+ sub $r9, $r9, $r15
-+ sub $r9, $r9, $r20
-+ sub $r9, $r9, $r21
-+ sub $r9, $r9, $r22
-+ sub $r9, $r9, $r23
-+ sub $r9, $r9, $r24
-+ sub $r9, $r9, $r25
-+ sub $r9, $r9, $r26
-+ sub $r9, $r9, $r27
-+ sub $r9, $r9, $fp
-+ sub $r9, $r9, $gp
-+ sub $r9, $r9, $lp
-+ sub $r9, $r9, $sp
-+ sub $r10, $r10, $r0
-+ sub $r10, $r10, $r1
-+ sub $r10, $r10, $r2
-+ sub $r10, $r10, $r3
-+ sub $r10, $r10, $r4
-+ sub $r10, $r10, $r5
-+ sub $r10, $r10, $r6
-+ sub $r10, $r10, $r7
-+ sub $r10, $r10, $r8
-+ sub $r10, $r10, $r9
-+ sub $r10, $r10, $r10
-+ sub $r10, $r10, $r11
-+ sub $r10, $r10, $r16
-+ sub $r10, $r10, $r17
-+ sub $r10, $r10, $r18
-+ sub $r10, $r10, $r19
-+ sub $r10, $r10, $r12
-+ sub $r10, $r10, $r13
-+ sub $r10, $r10, $r14
-+ sub $r10, $r10, $r15
-+ sub $r10, $r10, $r20
-+ sub $r10, $r10, $r21
-+ sub $r10, $r10, $r22
-+ sub $r10, $r10, $r23
-+ sub $r10, $r10, $r24
-+ sub $r10, $r10, $r25
-+ sub $r10, $r10, $r26
-+ sub $r10, $r10, $r27
-+ sub $r10, $r10, $fp
-+ sub $r10, $r10, $gp
-+ sub $r10, $r10, $lp
-+ sub $r10, $r10, $sp
-+ sub $r11, $r11, $r0
-+ sub $r11, $r11, $r1
-+ sub $r11, $r11, $r2
-+ sub $r11, $r11, $r3
-+ sub $r11, $r11, $r4
-+ sub $r11, $r11, $r5
-+ sub $r11, $r11, $r6
-+ sub $r11, $r11, $r7
-+ sub $r11, $r11, $r8
-+ sub $r11, $r11, $r9
-+ sub $r11, $r11, $r10
-+ sub $r11, $r11, $r11
-+ sub $r11, $r11, $r16
-+ sub $r11, $r11, $r17
-+ sub $r11, $r11, $r18
-+ sub $r11, $r11, $r19
-+ sub $r11, $r11, $r12
-+ sub $r11, $r11, $r13
-+ sub $r11, $r11, $r14
-+ sub $r11, $r11, $r15
-+ sub $r11, $r11, $r20
-+ sub $r11, $r11, $r21
-+ sub $r11, $r11, $r22
-+ sub $r11, $r11, $r23
-+ sub $r11, $r11, $r24
-+ sub $r11, $r11, $r25
-+ sub $r11, $r11, $r26
-+ sub $r11, $r11, $r27
-+ sub $r11, $r11, $fp
-+ sub $r11, $r11, $gp
-+ sub $r11, $r11, $lp
-+ sub $r11, $r11, $sp
-+ sub $r16, $r16, $r0
-+ sub $r16, $r16, $r1
-+ sub $r16, $r16, $r2
-+ sub $r16, $r16, $r3
-+ sub $r16, $r16, $r4
-+ sub $r16, $r16, $r5
-+ sub $r16, $r16, $r6
-+ sub $r16, $r16, $r7
-+ sub $r16, $r16, $r8
-+ sub $r16, $r16, $r9
-+ sub $r16, $r16, $r10
-+ sub $r16, $r16, $r11
-+ sub $r16, $r16, $r16
-+ sub $r16, $r16, $r17
-+ sub $r16, $r16, $r18
-+ sub $r16, $r16, $r19
-+ sub $r16, $r16, $r12
-+ sub $r16, $r16, $r13
-+ sub $r16, $r16, $r14
-+ sub $r16, $r16, $r15
-+ sub $r16, $r16, $r20
-+ sub $r16, $r16, $r21
-+ sub $r16, $r16, $r22
-+ sub $r16, $r16, $r23
-+ sub $r16, $r16, $r24
-+ sub $r16, $r16, $r25
-+ sub $r16, $r16, $r26
-+ sub $r16, $r16, $r27
-+ sub $r16, $r16, $fp
-+ sub $r16, $r16, $gp
-+ sub $r16, $r16, $lp
-+ sub $r16, $r16, $sp
-+ sub $r17, $r17, $r0
-+ sub $r17, $r17, $r1
-+ sub $r17, $r17, $r2
-+ sub $r17, $r17, $r3
-+ sub $r17, $r17, $r4
-+ sub $r17, $r17, $r5
-+ sub $r17, $r17, $r6
-+ sub $r17, $r17, $r7
-+ sub $r17, $r17, $r8
-+ sub $r17, $r17, $r9
-+ sub $r17, $r17, $r10
-+ sub $r17, $r17, $r11
-+ sub $r17, $r17, $r16
-+ sub $r17, $r17, $r17
-+ sub $r17, $r17, $r18
-+ sub $r17, $r17, $r19
-+ sub $r17, $r17, $r12
-+ sub $r17, $r17, $r13
-+ sub $r17, $r17, $r14
-+ sub $r17, $r17, $r15
-+ sub $r17, $r17, $r20
-+ sub $r17, $r17, $r21
-+ sub $r17, $r17, $r22
-+ sub $r17, $r17, $r23
-+ sub $r17, $r17, $r24
-+ sub $r17, $r17, $r25
-+ sub $r17, $r17, $r26
-+ sub $r17, $r17, $r27
-+ sub $r17, $r17, $fp
-+ sub $r17, $r17, $gp
-+ sub $r17, $r17, $lp
-+ sub $r17, $r17, $sp
-+ sub $r18, $r18, $r0
-+ sub $r18, $r18, $r1
-+ sub $r18, $r18, $r2
-+ sub $r18, $r18, $r3
-+ sub $r18, $r18, $r4
-+ sub $r18, $r18, $r5
-+ sub $r18, $r18, $r6
-+ sub $r18, $r18, $r7
-+ sub $r18, $r18, $r8
-+ sub $r18, $r18, $r9
-+ sub $r18, $r18, $r10
-+ sub $r18, $r18, $r11
-+ sub $r18, $r18, $r16
-+ sub $r18, $r18, $r17
-+ sub $r18, $r18, $r18
-+ sub $r18, $r18, $r19
-+ sub $r18, $r18, $r12
-+ sub $r18, $r18, $r13
-+ sub $r18, $r18, $r14
-+ sub $r18, $r18, $r15
-+ sub $r18, $r18, $r20
-+ sub $r18, $r18, $r21
-+ sub $r18, $r18, $r22
-+ sub $r18, $r18, $r23
-+ sub $r18, $r18, $r24
-+ sub $r18, $r18, $r25
-+ sub $r18, $r18, $r26
-+ sub $r18, $r18, $r27
-+ sub $r18, $r18, $fp
-+ sub $r18, $r18, $gp
-+ sub $r18, $r18, $lp
-+ sub $r18, $r18, $sp
-+ sub $r19, $r19, $r0
-+ sub $r19, $r19, $r1
-+ sub $r19, $r19, $r2
-+ sub $r19, $r19, $r3
-+ sub $r19, $r19, $r4
-+ sub $r19, $r19, $r5
-+ sub $r19, $r19, $r6
-+ sub $r19, $r19, $r7
-+ sub $r19, $r19, $r8
-+ sub $r19, $r19, $r9
-+ sub $r19, $r19, $r10
-+ sub $r19, $r19, $r11
-+ sub $r19, $r19, $r16
-+ sub $r19, $r19, $r17
-+ sub $r19, $r19, $r18
-+ sub $r19, $r19, $r19
-+ sub $r19, $r19, $r12
-+ sub $r19, $r19, $r13
-+ sub $r19, $r19, $r14
-+ sub $r19, $r19, $r15
-+ sub $r19, $r19, $r20
-+ sub $r19, $r19, $r21
-+ sub $r19, $r19, $r22
-+ sub $r19, $r19, $r23
-+ sub $r19, $r19, $r24
-+ sub $r19, $r19, $r25
-+ sub $r19, $r19, $r26
-+ sub $r19, $r19, $r27
-+ sub $r19, $r19, $fp
-+ sub $r19, $r19, $gp
-+ sub $r19, $r19, $lp
-+ sub $r19, $r19, $sp
-+ addi $r0, $r0, 0
-+ addi $r0, $r0, 1
-+ addi $r0, $r0, 2
-+ addi $r0, $r0, 3
-+ addi $r0, $r0, 4
-+ addi $r0, $r0, 5
-+ addi $r0, $r0, 6
-+ addi $r0, $r0, 7
-+ addi $r0, $r0, 8
-+ addi $r0, $r0, 9
-+ addi $r0, $r0, 10
-+ addi $r0, $r0, 11
-+ addi $r0, $r0, 12
-+ addi $r0, $r0, 13
-+ addi $r0, $r0, 14
-+ addi $r0, $r0, 15
-+ addi $r0, $r0, 16
-+ addi $r0, $r0, 17
-+ addi $r0, $r0, 18
-+ addi $r0, $r0, 19
-+ addi $r0, $r0, 20
-+ addi $r0, $r0, 21
-+ addi $r0, $r0, 22
-+ addi $r0, $r0, 23
-+ addi $r0, $r0, 24
-+ addi $r0, $r0, 25
-+ addi $r0, $r0, 26
-+ addi $r0, $r0, 27
-+ addi $r0, $r0, 28
-+ addi $r0, $r0, 29
-+ addi $r0, $r0, 30
-+ addi $r0, $r0, 31
-+ addi $r1, $r1, 0
-+ addi $r1, $r1, 1
-+ addi $r1, $r1, 2
-+ addi $r1, $r1, 3
-+ addi $r1, $r1, 4
-+ addi $r1, $r1, 5
-+ addi $r1, $r1, 6
-+ addi $r1, $r1, 7
-+ addi $r1, $r1, 8
-+ addi $r1, $r1, 9
-+ addi $r1, $r1, 10
-+ addi $r1, $r1, 11
-+ addi $r1, $r1, 12
-+ addi $r1, $r1, 13
-+ addi $r1, $r1, 14
-+ addi $r1, $r1, 15
-+ addi $r1, $r1, 16
-+ addi $r1, $r1, 17
-+ addi $r1, $r1, 18
-+ addi $r1, $r1, 19
-+ addi $r1, $r1, 20
-+ addi $r1, $r1, 21
-+ addi $r1, $r1, 22
-+ addi $r1, $r1, 23
-+ addi $r1, $r1, 24
-+ addi $r1, $r1, 25
-+ addi $r1, $r1, 26
-+ addi $r1, $r1, 27
-+ addi $r1, $r1, 28
-+ addi $r1, $r1, 29
-+ addi $r1, $r1, 30
-+ addi $r1, $r1, 31
-+ addi $r2, $r2, 0
-+ addi $r2, $r2, 1
-+ addi $r2, $r2, 2
-+ addi $r2, $r2, 3
-+ addi $r2, $r2, 4
-+ addi $r2, $r2, 5
-+ addi $r2, $r2, 6
-+ addi $r2, $r2, 7
-+ addi $r2, $r2, 8
-+ addi $r2, $r2, 9
-+ addi $r2, $r2, 10
-+ addi $r2, $r2, 11
-+ addi $r2, $r2, 12
-+ addi $r2, $r2, 13
-+ addi $r2, $r2, 14
-+ addi $r2, $r2, 15
-+ addi $r2, $r2, 16
-+ addi $r2, $r2, 17
-+ addi $r2, $r2, 18
-+ addi $r2, $r2, 19
-+ addi $r2, $r2, 20
-+ addi $r2, $r2, 21
-+ addi $r2, $r2, 22
-+ addi $r2, $r2, 23
-+ addi $r2, $r2, 24
-+ addi $r2, $r2, 25
-+ addi $r2, $r2, 26
-+ addi $r2, $r2, 27
-+ addi $r2, $r2, 28
-+ addi $r2, $r2, 29
-+ addi $r2, $r2, 30
-+ addi $r2, $r2, 31
-+ addi $r3, $r3, 0
-+ addi $r3, $r3, 1
-+ addi $r3, $r3, 2
-+ addi $r3, $r3, 3
-+ addi $r3, $r3, 4
-+ addi $r3, $r3, 5
-+ addi $r3, $r3, 6
-+ addi $r3, $r3, 7
-+ addi $r3, $r3, 8
-+ addi $r3, $r3, 9
-+ addi $r3, $r3, 10
-+ addi $r3, $r3, 11
-+ addi $r3, $r3, 12
-+ addi $r3, $r3, 13
-+ addi $r3, $r3, 14
-+ addi $r3, $r3, 15
-+ addi $r3, $r3, 16
-+ addi $r3, $r3, 17
-+ addi $r3, $r3, 18
-+ addi $r3, $r3, 19
-+ addi $r3, $r3, 20
-+ addi $r3, $r3, 21
-+ addi $r3, $r3, 22
-+ addi $r3, $r3, 23
-+ addi $r3, $r3, 24
-+ addi $r3, $r3, 25
-+ addi $r3, $r3, 26
-+ addi $r3, $r3, 27
-+ addi $r3, $r3, 28
-+ addi $r3, $r3, 29
-+ addi $r3, $r3, 30
-+ addi $r3, $r3, 31
-+ addi $r4, $r4, 0
-+ addi $r4, $r4, 1
-+ addi $r4, $r4, 2
-+ addi $r4, $r4, 3
-+ addi $r4, $r4, 4
-+ addi $r4, $r4, 5
-+ addi $r4, $r4, 6
-+ addi $r4, $r4, 7
-+ addi $r4, $r4, 8
-+ addi $r4, $r4, 9
-+ addi $r4, $r4, 10
-+ addi $r4, $r4, 11
-+ addi $r4, $r4, 12
-+ addi $r4, $r4, 13
-+ addi $r4, $r4, 14
-+ addi $r4, $r4, 15
-+ addi $r4, $r4, 16
-+ addi $r4, $r4, 17
-+ addi $r4, $r4, 18
-+ addi $r4, $r4, 19
-+ addi $r4, $r4, 20
-+ addi $r4, $r4, 21
-+ addi $r4, $r4, 22
-+ addi $r4, $r4, 23
-+ addi $r4, $r4, 24
-+ addi $r4, $r4, 25
-+ addi $r4, $r4, 26
-+ addi $r4, $r4, 27
-+ addi $r4, $r4, 28
-+ addi $r4, $r4, 29
-+ addi $r4, $r4, 30
-+ addi $r4, $r4, 31
-+ addi $r5, $r5, 0
-+ addi $r5, $r5, 1
-+ addi $r5, $r5, 2
-+ addi $r5, $r5, 3
-+ addi $r5, $r5, 4
-+ addi $r5, $r5, 5
-+ addi $r5, $r5, 6
-+ addi $r5, $r5, 7
-+ addi $r5, $r5, 8
-+ addi $r5, $r5, 9
-+ addi $r5, $r5, 10
-+ addi $r5, $r5, 11
-+ addi $r5, $r5, 12
-+ addi $r5, $r5, 13
-+ addi $r5, $r5, 14
-+ addi $r5, $r5, 15
-+ addi $r5, $r5, 16
-+ addi $r5, $r5, 17
-+ addi $r5, $r5, 18
-+ addi $r5, $r5, 19
-+ addi $r5, $r5, 20
-+ addi $r5, $r5, 21
-+ addi $r5, $r5, 22
-+ addi $r5, $r5, 23
-+ addi $r5, $r5, 24
-+ addi $r5, $r5, 25
-+ addi $r5, $r5, 26
-+ addi $r5, $r5, 27
-+ addi $r5, $r5, 28
-+ addi $r5, $r5, 29
-+ addi $r5, $r5, 30
-+ addi $r5, $r5, 31
-+ addi $r6, $r6, 0
-+ addi $r6, $r6, 1
-+ addi $r6, $r6, 2
-+ addi $r6, $r6, 3
-+ addi $r6, $r6, 4
-+ addi $r6, $r6, 5
-+ addi $r6, $r6, 6
-+ addi $r6, $r6, 7
-+ addi $r6, $r6, 8
-+ addi $r6, $r6, 9
-+ addi $r6, $r6, 10
-+ addi $r6, $r6, 11
-+ addi $r6, $r6, 12
-+ addi $r6, $r6, 13
-+ addi $r6, $r6, 14
-+ addi $r6, $r6, 15
-+ addi $r6, $r6, 16
-+ addi $r6, $r6, 17
-+ addi $r6, $r6, 18
-+ addi $r6, $r6, 19
-+ addi $r6, $r6, 20
-+ addi $r6, $r6, 21
-+ addi $r6, $r6, 22
-+ addi $r6, $r6, 23
-+ addi $r6, $r6, 24
-+ addi $r6, $r6, 25
-+ addi $r6, $r6, 26
-+ addi $r6, $r6, 27
-+ addi $r6, $r6, 28
-+ addi $r6, $r6, 29
-+ addi $r6, $r6, 30
-+ addi $r6, $r6, 31
-+ addi $r7, $r7, 0
-+ addi $r7, $r7, 1
-+ addi $r7, $r7, 2
-+ addi $r7, $r7, 3
-+ addi $r7, $r7, 4
-+ addi $r7, $r7, 5
-+ addi $r7, $r7, 6
-+ addi $r7, $r7, 7
-+ addi $r7, $r7, 8
-+ addi $r7, $r7, 9
-+ addi $r7, $r7, 10
-+ addi $r7, $r7, 11
-+ addi $r7, $r7, 12
-+ addi $r7, $r7, 13
-+ addi $r7, $r7, 14
-+ addi $r7, $r7, 15
-+ addi $r7, $r7, 16
-+ addi $r7, $r7, 17
-+ addi $r7, $r7, 18
-+ addi $r7, $r7, 19
-+ addi $r7, $r7, 20
-+ addi $r7, $r7, 21
-+ addi $r7, $r7, 22
-+ addi $r7, $r7, 23
-+ addi $r7, $r7, 24
-+ addi $r7, $r7, 25
-+ addi $r7, $r7, 26
-+ addi $r7, $r7, 27
-+ addi $r7, $r7, 28
-+ addi $r7, $r7, 29
-+ addi $r7, $r7, 30
-+ addi $r7, $r7, 31
-+ addi $r8, $r8, 0
-+ addi $r8, $r8, 1
-+ addi $r8, $r8, 2
-+ addi $r8, $r8, 3
-+ addi $r8, $r8, 4
-+ addi $r8, $r8, 5
-+ addi $r8, $r8, 6
-+ addi $r8, $r8, 7
-+ addi $r8, $r8, 8
-+ addi $r8, $r8, 9
-+ addi $r8, $r8, 10
-+ addi $r8, $r8, 11
-+ addi $r8, $r8, 12
-+ addi $r8, $r8, 13
-+ addi $r8, $r8, 14
-+ addi $r8, $r8, 15
-+ addi $r8, $r8, 16
-+ addi $r8, $r8, 17
-+ addi $r8, $r8, 18
-+ addi $r8, $r8, 19
-+ addi $r8, $r8, 20
-+ addi $r8, $r8, 21
-+ addi $r8, $r8, 22
-+ addi $r8, $r8, 23
-+ addi $r8, $r8, 24
-+ addi $r8, $r8, 25
-+ addi $r8, $r8, 26
-+ addi $r8, $r8, 27
-+ addi $r8, $r8, 28
-+ addi $r8, $r8, 29
-+ addi $r8, $r8, 30
-+ addi $r8, $r8, 31
-+ addi $r9, $r9, 0
-+ addi $r9, $r9, 1
-+ addi $r9, $r9, 2
-+ addi $r9, $r9, 3
-+ addi $r9, $r9, 4
-+ addi $r9, $r9, 5
-+ addi $r9, $r9, 6
-+ addi $r9, $r9, 7
-+ addi $r9, $r9, 8
-+ addi $r9, $r9, 9
-+ addi $r9, $r9, 10
-+ addi $r9, $r9, 11
-+ addi $r9, $r9, 12
-+ addi $r9, $r9, 13
-+ addi $r9, $r9, 14
-+ addi $r9, $r9, 15
-+ addi $r9, $r9, 16
-+ addi $r9, $r9, 17
-+ addi $r9, $r9, 18
-+ addi $r9, $r9, 19
-+ addi $r9, $r9, 20
-+ addi $r9, $r9, 21
-+ addi $r9, $r9, 22
-+ addi $r9, $r9, 23
-+ addi $r9, $r9, 24
-+ addi $r9, $r9, 25
-+ addi $r9, $r9, 26
-+ addi $r9, $r9, 27
-+ addi $r9, $r9, 28
-+ addi $r9, $r9, 29
-+ addi $r9, $r9, 30
-+ addi $r9, $r9, 31
-+ addi $r10, $r10, 0
-+ addi $r10, $r10, 1
-+ addi $r10, $r10, 2
-+ addi $r10, $r10, 3
-+ addi $r10, $r10, 4
-+ addi $r10, $r10, 5
-+ addi $r10, $r10, 6
-+ addi $r10, $r10, 7
-+ addi $r10, $r10, 8
-+ addi $r10, $r10, 9
-+ addi $r10, $r10, 10
-+ addi $r10, $r10, 11
-+ addi $r10, $r10, 12
-+ addi $r10, $r10, 13
-+ addi $r10, $r10, 14
-+ addi $r10, $r10, 15
-+ addi $r10, $r10, 16
-+ addi $r10, $r10, 17
-+ addi $r10, $r10, 18
-+ addi $r10, $r10, 19
-+ addi $r10, $r10, 20
-+ addi $r10, $r10, 21
-+ addi $r10, $r10, 22
-+ addi $r10, $r10, 23
-+ addi $r10, $r10, 24
-+ addi $r10, $r10, 25
-+ addi $r10, $r10, 26
-+ addi $r10, $r10, 27
-+ addi $r10, $r10, 28
-+ addi $r10, $r10, 29
-+ addi $r10, $r10, 30
-+ addi $r10, $r10, 31
-+ addi $r11, $r11, 0
-+ addi $r11, $r11, 1
-+ addi $r11, $r11, 2
-+ addi $r11, $r11, 3
-+ addi $r11, $r11, 4
-+ addi $r11, $r11, 5
-+ addi $r11, $r11, 6
-+ addi $r11, $r11, 7
-+ addi $r11, $r11, 8
-+ addi $r11, $r11, 9
-+ addi $r11, $r11, 10
-+ addi $r11, $r11, 11
-+ addi $r11, $r11, 12
-+ addi $r11, $r11, 13
-+ addi $r11, $r11, 14
-+ addi $r11, $r11, 15
-+ addi $r11, $r11, 16
-+ addi $r11, $r11, 17
-+ addi $r11, $r11, 18
-+ addi $r11, $r11, 19
-+ addi $r11, $r11, 20
-+ addi $r11, $r11, 21
-+ addi $r11, $r11, 22
-+ addi $r11, $r11, 23
-+ addi $r11, $r11, 24
-+ addi $r11, $r11, 25
-+ addi $r11, $r11, 26
-+ addi $r11, $r11, 27
-+ addi $r11, $r11, 28
-+ addi $r11, $r11, 29
-+ addi $r11, $r11, 30
-+ addi $r11, $r11, 31
-+ addi $r16, $r16, 0
-+ addi $r16, $r16, 1
-+ addi $r16, $r16, 2
-+ addi $r16, $r16, 3
-+ addi $r16, $r16, 4
-+ addi $r16, $r16, 5
-+ addi $r16, $r16, 6
-+ addi $r16, $r16, 7
-+ addi $r16, $r16, 8
-+ addi $r16, $r16, 9
-+ addi $r16, $r16, 10
-+ addi $r16, $r16, 11
-+ addi $r16, $r16, 12
-+ addi $r16, $r16, 13
-+ addi $r16, $r16, 14
-+ addi $r16, $r16, 15
-+ addi $r16, $r16, 16
-+ addi $r16, $r16, 17
-+ addi $r16, $r16, 18
-+ addi $r16, $r16, 19
-+ addi $r16, $r16, 20
-+ addi $r16, $r16, 21
-+ addi $r16, $r16, 22
-+ addi $r16, $r16, 23
-+ addi $r16, $r16, 24
-+ addi $r16, $r16, 25
-+ addi $r16, $r16, 26
-+ addi $r16, $r16, 27
-+ addi $r16, $r16, 28
-+ addi $r16, $r16, 29
-+ addi $r16, $r16, 30
-+ addi $r16, $r16, 31
-+ addi $r17, $r17, 0
-+ addi $r17, $r17, 1
-+ addi $r17, $r17, 2
-+ addi $r17, $r17, 3
-+ addi $r17, $r17, 4
-+ addi $r17, $r17, 5
-+ addi $r17, $r17, 6
-+ addi $r17, $r17, 7
-+ addi $r17, $r17, 8
-+ addi $r17, $r17, 9
-+ addi $r17, $r17, 10
-+ addi $r17, $r17, 11
-+ addi $r17, $r17, 12
-+ addi $r17, $r17, 13
-+ addi $r17, $r17, 14
-+ addi $r17, $r17, 15
-+ addi $r17, $r17, 16
-+ addi $r17, $r17, 17
-+ addi $r17, $r17, 18
-+ addi $r17, $r17, 19
-+ addi $r17, $r17, 20
-+ addi $r17, $r17, 21
-+ addi $r17, $r17, 22
-+ addi $r17, $r17, 23
-+ addi $r17, $r17, 24
-+ addi $r17, $r17, 25
-+ addi $r17, $r17, 26
-+ addi $r17, $r17, 27
-+ addi $r17, $r17, 28
-+ addi $r17, $r17, 29
-+ addi $r17, $r17, 30
-+ addi $r17, $r17, 31
-+ addi $r18, $r18, 0
-+ addi $r18, $r18, 1
-+ addi $r18, $r18, 2
-+ addi $r18, $r18, 3
-+ addi $r18, $r18, 4
-+ addi $r18, $r18, 5
-+ addi $r18, $r18, 6
-+ addi $r18, $r18, 7
-+ addi $r18, $r18, 8
-+ addi $r18, $r18, 9
-+ addi $r18, $r18, 10
-+ addi $r18, $r18, 11
-+ addi $r18, $r18, 12
-+ addi $r18, $r18, 13
-+ addi $r18, $r18, 14
-+ addi $r18, $r18, 15
-+ addi $r18, $r18, 16
-+ addi $r18, $r18, 17
-+ addi $r18, $r18, 18
-+ addi $r18, $r18, 19
-+ addi $r18, $r18, 20
-+ addi $r18, $r18, 21
-+ addi $r18, $r18, 22
-+ addi $r18, $r18, 23
-+ addi $r18, $r18, 24
-+ addi $r18, $r18, 25
-+ addi $r18, $r18, 26
-+ addi $r18, $r18, 27
-+ addi $r18, $r18, 28
-+ addi $r18, $r18, 29
-+ addi $r18, $r18, 30
-+ addi $r18, $r18, 31
-+ addi $r19, $r19, 0
-+ addi $r19, $r19, 1
-+ addi $r19, $r19, 2
-+ addi $r19, $r19, 3
-+ addi $r19, $r19, 4
-+ addi $r19, $r19, 5
-+ addi $r19, $r19, 6
-+ addi $r19, $r19, 7
-+ addi $r19, $r19, 8
-+ addi $r19, $r19, 9
-+ addi $r19, $r19, 10
-+ addi $r19, $r19, 11
-+ addi $r19, $r19, 12
-+ addi $r19, $r19, 13
-+ addi $r19, $r19, 14
-+ addi $r19, $r19, 15
-+ addi $r19, $r19, 16
-+ addi $r19, $r19, 17
-+ addi $r19, $r19, 18
-+ addi $r19, $r19, 19
-+ addi $r19, $r19, 20
-+ addi $r19, $r19, 21
-+ addi $r19, $r19, 22
-+ addi $r19, $r19, 23
-+ addi $r19, $r19, 24
-+ addi $r19, $r19, 25
-+ addi $r19, $r19, 26
-+ addi $r19, $r19, 27
-+ addi $r19, $r19, 28
-+ addi $r19, $r19, 29
-+ addi $r19, $r19, 30
-+ addi $r19, $r19, 31
-+ addi $r0, $r0, 0
-+ addi $r0, $r0, 1
-+ addi $r0, $r0, 2
-+ addi $r0, $r0, 3
-+ addi $r0, $r0, 4
-+ addi $r0, $r0, 5
-+ addi $r0, $r0, 6
-+ addi $r0, $r0, 7
-+ addi $r0, $r0, 8
-+ addi $r0, $r0, 9
-+ addi $r0, $r0, 10
-+ addi $r0, $r0, 11
-+ addi $r0, $r0, 12
-+ addi $r0, $r0, 13
-+ addi $r0, $r0, 14
-+ addi $r0, $r0, 15
-+ addi $r0, $r0, 16
-+ addi $r0, $r0, 17
-+ addi $r0, $r0, 18
-+ addi $r0, $r0, 19
-+ addi $r0, $r0, 20
-+ addi $r0, $r0, 21
-+ addi $r0, $r0, 22
-+ addi $r0, $r0, 23
-+ addi $r0, $r0, 24
-+ addi $r0, $r0, 25
-+ addi $r0, $r0, 26
-+ addi $r0, $r0, 27
-+ addi $r0, $r0, 28
-+ addi $r0, $r0, 29
-+ addi $r0, $r0, 30
-+ addi $r0, $r0, 31
-+ addi $r1, $r1, 0
-+ addi $r1, $r1, 1
-+ addi $r1, $r1, 2
-+ addi $r1, $r1, 3
-+ addi $r1, $r1, 4
-+ addi $r1, $r1, 5
-+ addi $r1, $r1, 6
-+ addi $r1, $r1, 7
-+ addi $r1, $r1, 8
-+ addi $r1, $r1, 9
-+ addi $r1, $r1, 10
-+ addi $r1, $r1, 11
-+ addi $r1, $r1, 12
-+ addi $r1, $r1, 13
-+ addi $r1, $r1, 14
-+ addi $r1, $r1, 15
-+ addi $r1, $r1, 16
-+ addi $r1, $r1, 17
-+ addi $r1, $r1, 18
-+ addi $r1, $r1, 19
-+ addi $r1, $r1, 20
-+ addi $r1, $r1, 21
-+ addi $r1, $r1, 22
-+ addi $r1, $r1, 23
-+ addi $r1, $r1, 24
-+ addi $r1, $r1, 25
-+ addi $r1, $r1, 26
-+ addi $r1, $r1, 27
-+ addi $r1, $r1, 28
-+ addi $r1, $r1, 29
-+ addi $r1, $r1, 30
-+ addi $r1, $r1, 31
-+ addi $r2, $r2, 0
-+ addi $r2, $r2, 1
-+ addi $r2, $r2, 2
-+ addi $r2, $r2, 3
-+ addi $r2, $r2, 4
-+ addi $r2, $r2, 5
-+ addi $r2, $r2, 6
-+ addi $r2, $r2, 7
-+ addi $r2, $r2, 8
-+ addi $r2, $r2, 9
-+ addi $r2, $r2, 10
-+ addi $r2, $r2, 11
-+ addi $r2, $r2, 12
-+ addi $r2, $r2, 13
-+ addi $r2, $r2, 14
-+ addi $r2, $r2, 15
-+ addi $r2, $r2, 16
-+ addi $r2, $r2, 17
-+ addi $r2, $r2, 18
-+ addi $r2, $r2, 19
-+ addi $r2, $r2, 20
-+ addi $r2, $r2, 21
-+ addi $r2, $r2, 22
-+ addi $r2, $r2, 23
-+ addi $r2, $r2, 24
-+ addi $r2, $r2, 25
-+ addi $r2, $r2, 26
-+ addi $r2, $r2, 27
-+ addi $r2, $r2, 28
-+ addi $r2, $r2, 29
-+ addi $r2, $r2, 30
-+ addi $r2, $r2, 31
-+ addi $r3, $r3, 0
-+ addi $r3, $r3, 1
-+ addi $r3, $r3, 2
-+ addi $r3, $r3, 3
-+ addi $r3, $r3, 4
-+ addi $r3, $r3, 5
-+ addi $r3, $r3, 6
-+ addi $r3, $r3, 7
-+ addi $r3, $r3, 8
-+ addi $r3, $r3, 9
-+ addi $r3, $r3, 10
-+ addi $r3, $r3, 11
-+ addi $r3, $r3, 12
-+ addi $r3, $r3, 13
-+ addi $r3, $r3, 14
-+ addi $r3, $r3, 15
-+ addi $r3, $r3, 16
-+ addi $r3, $r3, 17
-+ addi $r3, $r3, 18
-+ addi $r3, $r3, 19
-+ addi $r3, $r3, 20
-+ addi $r3, $r3, 21
-+ addi $r3, $r3, 22
-+ addi $r3, $r3, 23
-+ addi $r3, $r3, 24
-+ addi $r3, $r3, 25
-+ addi $r3, $r3, 26
-+ addi $r3, $r3, 27
-+ addi $r3, $r3, 28
-+ addi $r3, $r3, 29
-+ addi $r3, $r3, 30
-+ addi $r3, $r3, 31
-+ addi $r4, $r4, 0
-+ addi $r4, $r4, 1
-+ addi $r4, $r4, 2
-+ addi $r4, $r4, 3
-+ addi $r4, $r4, 4
-+ addi $r4, $r4, 5
-+ addi $r4, $r4, 6
-+ addi $r4, $r4, 7
-+ addi $r4, $r4, 8
-+ addi $r4, $r4, 9
-+ addi $r4, $r4, 10
-+ addi $r4, $r4, 11
-+ addi $r4, $r4, 12
-+ addi $r4, $r4, 13
-+ addi $r4, $r4, 14
-+ addi $r4, $r4, 15
-+ addi $r4, $r4, 16
-+ addi $r4, $r4, 17
-+ addi $r4, $r4, 18
-+ addi $r4, $r4, 19
-+ addi $r4, $r4, 20
-+ addi $r4, $r4, 21
-+ addi $r4, $r4, 22
-+ addi $r4, $r4, 23
-+ addi $r4, $r4, 24
-+ addi $r4, $r4, 25
-+ addi $r4, $r4, 26
-+ addi $r4, $r4, 27
-+ addi $r4, $r4, 28
-+ addi $r4, $r4, 29
-+ addi $r4, $r4, 30
-+ addi $r4, $r4, 31
-+ addi $r5, $r5, 0
-+ addi $r5, $r5, 1
-+ addi $r5, $r5, 2
-+ addi $r5, $r5, 3
-+ addi $r5, $r5, 4
-+ addi $r5, $r5, 5
-+ addi $r5, $r5, 6
-+ addi $r5, $r5, 7
-+ addi $r5, $r5, 8
-+ addi $r5, $r5, 9
-+ addi $r5, $r5, 10
-+ addi $r5, $r5, 11
-+ addi $r5, $r5, 12
-+ addi $r5, $r5, 13
-+ addi $r5, $r5, 14
-+ addi $r5, $r5, 15
-+ addi $r5, $r5, 16
-+ addi $r5, $r5, 17
-+ addi $r5, $r5, 18
-+ addi $r5, $r5, 19
-+ addi $r5, $r5, 20
-+ addi $r5, $r5, 21
-+ addi $r5, $r5, 22
-+ addi $r5, $r5, 23
-+ addi $r5, $r5, 24
-+ addi $r5, $r5, 25
-+ addi $r5, $r5, 26
-+ addi $r5, $r5, 27
-+ addi $r5, $r5, 28
-+ addi $r5, $r5, 29
-+ addi $r5, $r5, 30
-+ addi $r5, $r5, 31
-+ addi $r6, $r6, 0
-+ addi $r6, $r6, 1
-+ addi $r6, $r6, 2
-+ addi $r6, $r6, 3
-+ addi $r6, $r6, 4
-+ addi $r6, $r6, 5
-+ addi $r6, $r6, 6
-+ addi $r6, $r6, 7
-+ addi $r6, $r6, 8
-+ addi $r6, $r6, 9
-+ addi $r6, $r6, 10
-+ addi $r6, $r6, 11
-+ addi $r6, $r6, 12
-+ addi $r6, $r6, 13
-+ addi $r6, $r6, 14
-+ addi $r6, $r6, 15
-+ addi $r6, $r6, 16
-+ addi $r6, $r6, 17
-+ addi $r6, $r6, 18
-+ addi $r6, $r6, 19
-+ addi $r6, $r6, 20
-+ addi $r6, $r6, 21
-+ addi $r6, $r6, 22
-+ addi $r6, $r6, 23
-+ addi $r6, $r6, 24
-+ addi $r6, $r6, 25
-+ addi $r6, $r6, 26
-+ addi $r6, $r6, 27
-+ addi $r6, $r6, 28
-+ addi $r6, $r6, 29
-+ addi $r6, $r6, 30
-+ addi $r6, $r6, 31
-+ addi $r7, $r7, 0
-+ addi $r7, $r7, 1
-+ addi $r7, $r7, 2
-+ addi $r7, $r7, 3
-+ addi $r7, $r7, 4
-+ addi $r7, $r7, 5
-+ addi $r7, $r7, 6
-+ addi $r7, $r7, 7
-+ addi $r7, $r7, 8
-+ addi $r7, $r7, 9
-+ addi $r7, $r7, 10
-+ addi $r7, $r7, 11
-+ addi $r7, $r7, 12
-+ addi $r7, $r7, 13
-+ addi $r7, $r7, 14
-+ addi $r7, $r7, 15
-+ addi $r7, $r7, 16
-+ addi $r7, $r7, 17
-+ addi $r7, $r7, 18
-+ addi $r7, $r7, 19
-+ addi $r7, $r7, 20
-+ addi $r7, $r7, 21
-+ addi $r7, $r7, 22
-+ addi $r7, $r7, 23
-+ addi $r7, $r7, 24
-+ addi $r7, $r7, 25
-+ addi $r7, $r7, 26
-+ addi $r7, $r7, 27
-+ addi $r7, $r7, 28
-+ addi $r7, $r7, 29
-+ addi $r7, $r7, 30
-+ addi $r7, $r7, 31
-+ addi $r8, $r8, 0
-+ addi $r8, $r8, 1
-+ addi $r8, $r8, 2
-+ addi $r8, $r8, 3
-+ addi $r8, $r8, 4
-+ addi $r8, $r8, 5
-+ addi $r8, $r8, 6
-+ addi $r8, $r8, 7
-+ addi $r8, $r8, 8
-+ addi $r8, $r8, 9
-+ addi $r8, $r8, 10
-+ addi $r8, $r8, 11
-+ addi $r8, $r8, 12
-+ addi $r8, $r8, 13
-+ addi $r8, $r8, 14
-+ addi $r8, $r8, 15
-+ addi $r8, $r8, 16
-+ addi $r8, $r8, 17
-+ addi $r8, $r8, 18
-+ addi $r8, $r8, 19
-+ addi $r8, $r8, 20
-+ addi $r8, $r8, 21
-+ addi $r8, $r8, 22
-+ addi $r8, $r8, 23
-+ addi $r8, $r8, 24
-+ addi $r8, $r8, 25
-+ addi $r8, $r8, 26
-+ addi $r8, $r8, 27
-+ addi $r8, $r8, 28
-+ addi $r8, $r8, 29
-+ addi $r8, $r8, 30
-+ addi $r8, $r8, 31
-+ addi $r9, $r9, 0
-+ addi $r9, $r9, 1
-+ addi $r9, $r9, 2
-+ addi $r9, $r9, 3
-+ addi $r9, $r9, 4
-+ addi $r9, $r9, 5
-+ addi $r9, $r9, 6
-+ addi $r9, $r9, 7
-+ addi $r9, $r9, 8
-+ addi $r9, $r9, 9
-+ addi $r9, $r9, 10
-+ addi $r9, $r9, 11
-+ addi $r9, $r9, 12
-+ addi $r9, $r9, 13
-+ addi $r9, $r9, 14
-+ addi $r9, $r9, 15
-+ addi $r9, $r9, 16
-+ addi $r9, $r9, 17
-+ addi $r9, $r9, 18
-+ addi $r9, $r9, 19
-+ addi $r9, $r9, 20
-+ addi $r9, $r9, 21
-+ addi $r9, $r9, 22
-+ addi $r9, $r9, 23
-+ addi $r9, $r9, 24
-+ addi $r9, $r9, 25
-+ addi $r9, $r9, 26
-+ addi $r9, $r9, 27
-+ addi $r9, $r9, 28
-+ addi $r9, $r9, 29
-+ addi $r9, $r9, 30
-+ addi $r9, $r9, 31
-+ addi $r10, $r10, 0
-+ addi $r10, $r10, 1
-+ addi $r10, $r10, 2
-+ addi $r10, $r10, 3
-+ addi $r10, $r10, 4
-+ addi $r10, $r10, 5
-+ addi $r10, $r10, 6
-+ addi $r10, $r10, 7
-+ addi $r10, $r10, 8
-+ addi $r10, $r10, 9
-+ addi $r10, $r10, 10
-+ addi $r10, $r10, 11
-+ addi $r10, $r10, 12
-+ addi $r10, $r10, 13
-+ addi $r10, $r10, 14
-+ addi $r10, $r10, 15
-+ addi $r10, $r10, 16
-+ addi $r10, $r10, 17
-+ addi $r10, $r10, 18
-+ addi $r10, $r10, 19
-+ addi $r10, $r10, 20
-+ addi $r10, $r10, 21
-+ addi $r10, $r10, 22
-+ addi $r10, $r10, 23
-+ addi $r10, $r10, 24
-+ addi $r10, $r10, 25
-+ addi $r10, $r10, 26
-+ addi $r10, $r10, 27
-+ addi $r10, $r10, 28
-+ addi $r10, $r10, 29
-+ addi $r10, $r10, 30
-+ addi $r10, $r10, 31
-+ addi $r11, $r11, 0
-+ addi $r11, $r11, 1
-+ addi $r11, $r11, 2
-+ addi $r11, $r11, 3
-+ addi $r11, $r11, 4
-+ addi $r11, $r11, 5
-+ addi $r11, $r11, 6
-+ addi $r11, $r11, 7
-+ addi $r11, $r11, 8
-+ addi $r11, $r11, 9
-+ addi $r11, $r11, 10
-+ addi $r11, $r11, 11
-+ addi $r11, $r11, 12
-+ addi $r11, $r11, 13
-+ addi $r11, $r11, 14
-+ addi $r11, $r11, 15
-+ addi $r11, $r11, 16
-+ addi $r11, $r11, 17
-+ addi $r11, $r11, 18
-+ addi $r11, $r11, 19
-+ addi $r11, $r11, 20
-+ addi $r11, $r11, 21
-+ addi $r11, $r11, 22
-+ addi $r11, $r11, 23
-+ addi $r11, $r11, 24
-+ addi $r11, $r11, 25
-+ addi $r11, $r11, 26
-+ addi $r11, $r11, 27
-+ addi $r11, $r11, 28
-+ addi $r11, $r11, 29
-+ addi $r11, $r11, 30
-+ addi $r11, $r11, 31
-+ addi $r16, $r16, 0
-+ addi $r16, $r16, 1
-+ addi $r16, $r16, 2
-+ addi $r16, $r16, 3
-+ addi $r16, $r16, 4
-+ addi $r16, $r16, 5
-+ addi $r16, $r16, 6
-+ addi $r16, $r16, 7
-+ addi $r16, $r16, 8
-+ addi $r16, $r16, 9
-+ addi $r16, $r16, 10
-+ addi $r16, $r16, 11
-+ addi $r16, $r16, 12
-+ addi $r16, $r16, 13
-+ addi $r16, $r16, 14
-+ addi $r16, $r16, 15
-+ addi $r16, $r16, 16
-+ addi $r16, $r16, 17
-+ addi $r16, $r16, 18
-+ addi $r16, $r16, 19
-+ addi $r16, $r16, 20
-+ addi $r16, $r16, 21
-+ addi $r16, $r16, 22
-+ addi $r16, $r16, 23
-+ addi $r16, $r16, 24
-+ addi $r16, $r16, 25
-+ addi $r16, $r16, 26
-+ addi $r16, $r16, 27
-+ addi $r16, $r16, 28
-+ addi $r16, $r16, 29
-+ addi $r16, $r16, 30
-+ addi $r16, $r16, 31
-+ addi $r17, $r17, 0
-+ addi $r17, $r17, 1
-+ addi $r17, $r17, 2
-+ addi $r17, $r17, 3
-+ addi $r17, $r17, 4
-+ addi $r17, $r17, 5
-+ addi $r17, $r17, 6
-+ addi $r17, $r17, 7
-+ addi $r17, $r17, 8
-+ addi $r17, $r17, 9
-+ addi $r17, $r17, 10
-+ addi $r17, $r17, 11
-+ addi $r17, $r17, 12
-+ addi $r17, $r17, 13
-+ addi $r17, $r17, 14
-+ addi $r17, $r17, 15
-+ addi $r17, $r17, 16
-+ addi $r17, $r17, 17
-+ addi $r17, $r17, 18
-+ addi $r17, $r17, 19
-+ addi $r17, $r17, 20
-+ addi $r17, $r17, 21
-+ addi $r17, $r17, 22
-+ addi $r17, $r17, 23
-+ addi $r17, $r17, 24
-+ addi $r17, $r17, 25
-+ addi $r17, $r17, 26
-+ addi $r17, $r17, 27
-+ addi $r17, $r17, 28
-+ addi $r17, $r17, 29
-+ addi $r17, $r17, 30
-+ addi $r17, $r17, 31
-+ addi $r18, $r18, 0
-+ addi $r18, $r18, 1
-+ addi $r18, $r18, 2
-+ addi $r18, $r18, 3
-+ addi $r18, $r18, 4
-+ addi $r18, $r18, 5
-+ addi $r18, $r18, 6
-+ addi $r18, $r18, 7
-+ addi $r18, $r18, 8
-+ addi $r18, $r18, 9
-+ addi $r18, $r18, 10
-+ addi $r18, $r18, 11
-+ addi $r18, $r18, 12
-+ addi $r18, $r18, 13
-+ addi $r18, $r18, 14
-+ addi $r18, $r18, 15
-+ addi $r18, $r18, 16
-+ addi $r18, $r18, 17
-+ addi $r18, $r18, 18
-+ addi $r18, $r18, 19
-+ addi $r18, $r18, 20
-+ addi $r18, $r18, 21
-+ addi $r18, $r18, 22
-+ addi $r18, $r18, 23
-+ addi $r18, $r18, 24
-+ addi $r18, $r18, 25
-+ addi $r18, $r18, 26
-+ addi $r18, $r18, 27
-+ addi $r18, $r18, 28
-+ addi $r18, $r18, 29
-+ addi $r18, $r18, 30
-+ addi $r18, $r18, 31
-+ addi $r19, $r19, 0
-+ addi $r19, $r19, 1
-+ addi $r19, $r19, 2
-+ addi $r19, $r19, 3
-+ addi $r19, $r19, 4
-+ addi $r19, $r19, 5
-+ addi $r19, $r19, 6
-+ addi $r19, $r19, 7
-+ addi $r19, $r19, 8
-+ addi $r19, $r19, 9
-+ addi $r19, $r19, 10
-+ addi $r19, $r19, 11
-+ addi $r19, $r19, 12
-+ addi $r19, $r19, 13
-+ addi $r19, $r19, 14
-+ addi $r19, $r19, 15
-+ addi $r19, $r19, 16
-+ addi $r19, $r19, 17
-+ addi $r19, $r19, 18
-+ addi $r19, $r19, 19
-+ addi $r19, $r19, 20
-+ addi $r19, $r19, 21
-+ addi $r19, $r19, 22
-+ addi $r19, $r19, 23
-+ addi $r19, $r19, 24
-+ addi $r19, $r19, 25
-+ addi $r19, $r19, 26
-+ addi $r19, $r19, 27
-+ addi $r19, $r19, 28
-+ addi $r19, $r19, 29
-+ addi $r19, $r19, 30
-+ addi $r19, $r19, 31
-+ srai $r0, $r0, 0
-+ srai $r0, $r0, 1
-+ srai $r0, $r0, 2
-+ srai $r0, $r0, 3
-+ srai $r0, $r0, 4
-+ srai $r0, $r0, 5
-+ srai $r0, $r0, 6
-+ srai $r0, $r0, 7
-+ srai $r0, $r0, 8
-+ srai $r0, $r0, 9
-+ srai $r0, $r0, 10
-+ srai $r0, $r0, 11
-+ srai $r0, $r0, 12
-+ srai $r0, $r0, 13
-+ srai $r0, $r0, 14
-+ srai $r0, $r0, 15
-+ srai $r0, $r0, 16
-+ srai $r0, $r0, 17
-+ srai $r0, $r0, 18
-+ srai $r0, $r0, 19
-+ srai $r0, $r0, 20
-+ srai $r0, $r0, 21
-+ srai $r0, $r0, 22
-+ srai $r0, $r0, 23
-+ srai $r0, $r0, 24
-+ srai $r0, $r0, 25
-+ srai $r0, $r0, 26
-+ srai $r0, $r0, 27
-+ srai $r0, $r0, 28
-+ srai $r0, $r0, 29
-+ srai $r0, $r0, 30
-+ srai $r0, $r0, 31
-+ srai $r1, $r1, 0
-+ srai $r1, $r1, 1
-+ srai $r1, $r1, 2
-+ srai $r1, $r1, 3
-+ srai $r1, $r1, 4
-+ srai $r1, $r1, 5
-+ srai $r1, $r1, 6
-+ srai $r1, $r1, 7
-+ srai $r1, $r1, 8
-+ srai $r1, $r1, 9
-+ srai $r1, $r1, 10
-+ srai $r1, $r1, 11
-+ srai $r1, $r1, 12
-+ srai $r1, $r1, 13
-+ srai $r1, $r1, 14
-+ srai $r1, $r1, 15
-+ srai $r1, $r1, 16
-+ srai $r1, $r1, 17
-+ srai $r1, $r1, 18
-+ srai $r1, $r1, 19
-+ srai $r1, $r1, 20
-+ srai $r1, $r1, 21
-+ srai $r1, $r1, 22
-+ srai $r1, $r1, 23
-+ srai $r1, $r1, 24
-+ srai $r1, $r1, 25
-+ srai $r1, $r1, 26
-+ srai $r1, $r1, 27
-+ srai $r1, $r1, 28
-+ srai $r1, $r1, 29
-+ srai $r1, $r1, 30
-+ srai $r1, $r1, 31
-+ srai $r2, $r2, 0
-+ srai $r2, $r2, 1
-+ srai $r2, $r2, 2
-+ srai $r2, $r2, 3
-+ srai $r2, $r2, 4
-+ srai $r2, $r2, 5
-+ srai $r2, $r2, 6
-+ srai $r2, $r2, 7
-+ srai $r2, $r2, 8
-+ srai $r2, $r2, 9
-+ srai $r2, $r2, 10
-+ srai $r2, $r2, 11
-+ srai $r2, $r2, 12
-+ srai $r2, $r2, 13
-+ srai $r2, $r2, 14
-+ srai $r2, $r2, 15
-+ srai $r2, $r2, 16
-+ srai $r2, $r2, 17
-+ srai $r2, $r2, 18
-+ srai $r2, $r2, 19
-+ srai $r2, $r2, 20
-+ srai $r2, $r2, 21
-+ srai $r2, $r2, 22
-+ srai $r2, $r2, 23
-+ srai $r2, $r2, 24
-+ srai $r2, $r2, 25
-+ srai $r2, $r2, 26
-+ srai $r2, $r2, 27
-+ srai $r2, $r2, 28
-+ srai $r2, $r2, 29
-+ srai $r2, $r2, 30
-+ srai $r2, $r2, 31
-+ srai $r3, $r3, 0
-+ srai $r3, $r3, 1
-+ srai $r3, $r3, 2
-+ srai $r3, $r3, 3
-+ srai $r3, $r3, 4
-+ srai $r3, $r3, 5
-+ srai $r3, $r3, 6
-+ srai $r3, $r3, 7
-+ srai $r3, $r3, 8
-+ srai $r3, $r3, 9
-+ srai $r3, $r3, 10
-+ srai $r3, $r3, 11
-+ srai $r3, $r3, 12
-+ srai $r3, $r3, 13
-+ srai $r3, $r3, 14
-+ srai $r3, $r3, 15
-+ srai $r3, $r3, 16
-+ srai $r3, $r3, 17
-+ srai $r3, $r3, 18
-+ srai $r3, $r3, 19
-+ srai $r3, $r3, 20
-+ srai $r3, $r3, 21
-+ srai $r3, $r3, 22
-+ srai $r3, $r3, 23
-+ srai $r3, $r3, 24
-+ srai $r3, $r3, 25
-+ srai $r3, $r3, 26
-+ srai $r3, $r3, 27
-+ srai $r3, $r3, 28
-+ srai $r3, $r3, 29
-+ srai $r3, $r3, 30
-+ srai $r3, $r3, 31
-+ srai $r4, $r4, 0
-+ srai $r4, $r4, 1
-+ srai $r4, $r4, 2
-+ srai $r4, $r4, 3
-+ srai $r4, $r4, 4
-+ srai $r4, $r4, 5
-+ srai $r4, $r4, 6
-+ srai $r4, $r4, 7
-+ srai $r4, $r4, 8
-+ srai $r4, $r4, 9
-+ srai $r4, $r4, 10
-+ srai $r4, $r4, 11
-+ srai $r4, $r4, 12
-+ srai $r4, $r4, 13
-+ srai $r4, $r4, 14
-+ srai $r4, $r4, 15
-+ srai $r4, $r4, 16
-+ srai $r4, $r4, 17
-+ srai $r4, $r4, 18
-+ srai $r4, $r4, 19
-+ srai $r4, $r4, 20
-+ srai $r4, $r4, 21
-+ srai $r4, $r4, 22
-+ srai $r4, $r4, 23
-+ srai $r4, $r4, 24
-+ srai $r4, $r4, 25
-+ srai $r4, $r4, 26
-+ srai $r4, $r4, 27
-+ srai $r4, $r4, 28
-+ srai $r4, $r4, 29
-+ srai $r4, $r4, 30
-+ srai $r4, $r4, 31
-+ srai $r5, $r5, 0
-+ srai $r5, $r5, 1
-+ srai $r5, $r5, 2
-+ srai $r5, $r5, 3
-+ srai $r5, $r5, 4
-+ srai $r5, $r5, 5
-+ srai $r5, $r5, 6
-+ srai $r5, $r5, 7
-+ srai $r5, $r5, 8
-+ srai $r5, $r5, 9
-+ srai $r5, $r5, 10
-+ srai $r5, $r5, 11
-+ srai $r5, $r5, 12
-+ srai $r5, $r5, 13
-+ srai $r5, $r5, 14
-+ srai $r5, $r5, 15
-+ srai $r5, $r5, 16
-+ srai $r5, $r5, 17
-+ srai $r5, $r5, 18
-+ srai $r5, $r5, 19
-+ srai $r5, $r5, 20
-+ srai $r5, $r5, 21
-+ srai $r5, $r5, 22
-+ srai $r5, $r5, 23
-+ srai $r5, $r5, 24
-+ srai $r5, $r5, 25
-+ srai $r5, $r5, 26
-+ srai $r5, $r5, 27
-+ srai $r5, $r5, 28
-+ srai $r5, $r5, 29
-+ srai $r5, $r5, 30
-+ srai $r5, $r5, 31
-+ srai $r6, $r6, 0
-+ srai $r6, $r6, 1
-+ srai $r6, $r6, 2
-+ srai $r6, $r6, 3
-+ srai $r6, $r6, 4
-+ srai $r6, $r6, 5
-+ srai $r6, $r6, 6
-+ srai $r6, $r6, 7
-+ srai $r6, $r6, 8
-+ srai $r6, $r6, 9
-+ srai $r6, $r6, 10
-+ srai $r6, $r6, 11
-+ srai $r6, $r6, 12
-+ srai $r6, $r6, 13
-+ srai $r6, $r6, 14
-+ srai $r6, $r6, 15
-+ srai $r6, $r6, 16
-+ srai $r6, $r6, 17
-+ srai $r6, $r6, 18
-+ srai $r6, $r6, 19
-+ srai $r6, $r6, 20
-+ srai $r6, $r6, 21
-+ srai $r6, $r6, 22
-+ srai $r6, $r6, 23
-+ srai $r6, $r6, 24
-+ srai $r6, $r6, 25
-+ srai $r6, $r6, 26
-+ srai $r6, $r6, 27
-+ srai $r6, $r6, 28
-+ srai $r6, $r6, 29
-+ srai $r6, $r6, 30
-+ srai $r6, $r6, 31
-+ srai $r7, $r7, 0
-+ srai $r7, $r7, 1
-+ srai $r7, $r7, 2
-+ srai $r7, $r7, 3
-+ srai $r7, $r7, 4
-+ srai $r7, $r7, 5
-+ srai $r7, $r7, 6
-+ srai $r7, $r7, 7
-+ srai $r7, $r7, 8
-+ srai $r7, $r7, 9
-+ srai $r7, $r7, 10
-+ srai $r7, $r7, 11
-+ srai $r7, $r7, 12
-+ srai $r7, $r7, 13
-+ srai $r7, $r7, 14
-+ srai $r7, $r7, 15
-+ srai $r7, $r7, 16
-+ srai $r7, $r7, 17
-+ srai $r7, $r7, 18
-+ srai $r7, $r7, 19
-+ srai $r7, $r7, 20
-+ srai $r7, $r7, 21
-+ srai $r7, $r7, 22
-+ srai $r7, $r7, 23
-+ srai $r7, $r7, 24
-+ srai $r7, $r7, 25
-+ srai $r7, $r7, 26
-+ srai $r7, $r7, 27
-+ srai $r7, $r7, 28
-+ srai $r7, $r7, 29
-+ srai $r7, $r7, 30
-+ srai $r7, $r7, 31
-+ srai $r8, $r8, 0
-+ srai $r8, $r8, 1
-+ srai $r8, $r8, 2
-+ srai $r8, $r8, 3
-+ srai $r8, $r8, 4
-+ srai $r8, $r8, 5
-+ srai $r8, $r8, 6
-+ srai $r8, $r8, 7
-+ srai $r8, $r8, 8
-+ srai $r8, $r8, 9
-+ srai $r8, $r8, 10
-+ srai $r8, $r8, 11
-+ srai $r8, $r8, 12
-+ srai $r8, $r8, 13
-+ srai $r8, $r8, 14
-+ srai $r8, $r8, 15
-+ srai $r8, $r8, 16
-+ srai $r8, $r8, 17
-+ srai $r8, $r8, 18
-+ srai $r8, $r8, 19
-+ srai $r8, $r8, 20
-+ srai $r8, $r8, 21
-+ srai $r8, $r8, 22
-+ srai $r8, $r8, 23
-+ srai $r8, $r8, 24
-+ srai $r8, $r8, 25
-+ srai $r8, $r8, 26
-+ srai $r8, $r8, 27
-+ srai $r8, $r8, 28
-+ srai $r8, $r8, 29
-+ srai $r8, $r8, 30
-+ srai $r8, $r8, 31
-+ srai $r9, $r9, 0
-+ srai $r9, $r9, 1
-+ srai $r9, $r9, 2
-+ srai $r9, $r9, 3
-+ srai $r9, $r9, 4
-+ srai $r9, $r9, 5
-+ srai $r9, $r9, 6
-+ srai $r9, $r9, 7
-+ srai $r9, $r9, 8
-+ srai $r9, $r9, 9
-+ srai $r9, $r9, 10
-+ srai $r9, $r9, 11
-+ srai $r9, $r9, 12
-+ srai $r9, $r9, 13
-+ srai $r9, $r9, 14
-+ srai $r9, $r9, 15
-+ srai $r9, $r9, 16
-+ srai $r9, $r9, 17
-+ srai $r9, $r9, 18
-+ srai $r9, $r9, 19
-+ srai $r9, $r9, 20
-+ srai $r9, $r9, 21
-+ srai $r9, $r9, 22
-+ srai $r9, $r9, 23
-+ srai $r9, $r9, 24
-+ srai $r9, $r9, 25
-+ srai $r9, $r9, 26
-+ srai $r9, $r9, 27
-+ srai $r9, $r9, 28
-+ srai $r9, $r9, 29
-+ srai $r9, $r9, 30
-+ srai $r9, $r9, 31
-+ srai $r10, $r10, 0
-+ srai $r10, $r10, 1
-+ srai $r10, $r10, 2
-+ srai $r10, $r10, 3
-+ srai $r10, $r10, 4
-+ srai $r10, $r10, 5
-+ srai $r10, $r10, 6
-+ srai $r10, $r10, 7
-+ srai $r10, $r10, 8
-+ srai $r10, $r10, 9
-+ srai $r10, $r10, 10
-+ srai $r10, $r10, 11
-+ srai $r10, $r10, 12
-+ srai $r10, $r10, 13
-+ srai $r10, $r10, 14
-+ srai $r10, $r10, 15
-+ srai $r10, $r10, 16
-+ srai $r10, $r10, 17
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-+ srli $r11, $r11, 4
-+ srli $r11, $r11, 5
-+ srli $r11, $r11, 6
-+ srli $r11, $r11, 7
-+ srli $r11, $r11, 8
-+ srli $r11, $r11, 9
-+ srli $r11, $r11, 10
-+ srli $r11, $r11, 11
-+ srli $r11, $r11, 12
-+ srli $r11, $r11, 13
-+ srli $r11, $r11, 14
-+ srli $r11, $r11, 15
-+ srli $r11, $r11, 16
-+ srli $r11, $r11, 17
-+ srli $r11, $r11, 18
-+ srli $r11, $r11, 19
-+ srli $r11, $r11, 20
-+ srli $r11, $r11, 21
-+ srli $r11, $r11, 22
-+ srli $r11, $r11, 23
-+ srli $r11, $r11, 24
-+ srli $r11, $r11, 25
-+ srli $r11, $r11, 26
-+ srli $r11, $r11, 27
-+ srli $r11, $r11, 28
-+ srli $r11, $r11, 29
-+ srli $r11, $r11, 30
-+ srli $r11, $r11, 31
-+ srli $r16, $r16, 0
-+ srli $r16, $r16, 1
-+ srli $r16, $r16, 2
-+ srli $r16, $r16, 3
-+ srli $r16, $r16, 4
-+ srli $r16, $r16, 5
-+ srli $r16, $r16, 6
-+ srli $r16, $r16, 7
-+ srli $r16, $r16, 8
-+ srli $r16, $r16, 9
-+ srli $r16, $r16, 10
-+ srli $r16, $r16, 11
-+ srli $r16, $r16, 12
-+ srli $r16, $r16, 13
-+ srli $r16, $r16, 14
-+ srli $r16, $r16, 15
-+ srli $r16, $r16, 16
-+ srli $r16, $r16, 17
-+ srli $r16, $r16, 18
-+ srli $r16, $r16, 19
-+ srli $r16, $r16, 20
-+ srli $r16, $r16, 21
-+ srli $r16, $r16, 22
-+ srli $r16, $r16, 23
-+ srli $r16, $r16, 24
-+ srli $r16, $r16, 25
-+ srli $r16, $r16, 26
-+ srli $r16, $r16, 27
-+ srli $r16, $r16, 28
-+ srli $r16, $r16, 29
-+ srli $r16, $r16, 30
-+ srli $r16, $r16, 31
-+ srli $r17, $r17, 0
-+ srli $r17, $r17, 1
-+ srli $r17, $r17, 2
-+ srli $r17, $r17, 3
-+ srli $r17, $r17, 4
-+ srli $r17, $r17, 5
-+ srli $r17, $r17, 6
-+ srli $r17, $r17, 7
-+ srli $r17, $r17, 8
-+ srli $r17, $r17, 9
-+ srli $r17, $r17, 10
-+ srli $r17, $r17, 11
-+ srli $r17, $r17, 12
-+ srli $r17, $r17, 13
-+ srli $r17, $r17, 14
-+ srli $r17, $r17, 15
-+ srli $r17, $r17, 16
-+ srli $r17, $r17, 17
-+ srli $r17, $r17, 18
-+ srli $r17, $r17, 19
-+ srli $r17, $r17, 20
-+ srli $r17, $r17, 21
-+ srli $r17, $r17, 22
-+ srli $r17, $r17, 23
-+ srli $r17, $r17, 24
-+ srli $r17, $r17, 25
-+ srli $r17, $r17, 26
-+ srli $r17, $r17, 27
-+ srli $r17, $r17, 28
-+ srli $r17, $r17, 29
-+ srli $r17, $r17, 30
-+ srli $r17, $r17, 31
-+ srli $r18, $r18, 0
-+ srli $r18, $r18, 1
-+ srli $r18, $r18, 2
-+ srli $r18, $r18, 3
-+ srli $r18, $r18, 4
-+ srli $r18, $r18, 5
-+ srli $r18, $r18, 6
-+ srli $r18, $r18, 7
-+ srli $r18, $r18, 8
-+ srli $r18, $r18, 9
-+ srli $r18, $r18, 10
-+ srli $r18, $r18, 11
-+ srli $r18, $r18, 12
-+ srli $r18, $r18, 13
-+ srli $r18, $r18, 14
-+ srli $r18, $r18, 15
-+ srli $r18, $r18, 16
-+ srli $r18, $r18, 17
-+ srli $r18, $r18, 18
-+ srli $r18, $r18, 19
-+ srli $r18, $r18, 20
-+ srli $r18, $r18, 21
-+ srli $r18, $r18, 22
-+ srli $r18, $r18, 23
-+ srli $r18, $r18, 24
-+ srli $r18, $r18, 25
-+ srli $r18, $r18, 26
-+ srli $r18, $r18, 27
-+ srli $r18, $r18, 28
-+ srli $r18, $r18, 29
-+ srli $r18, $r18, 30
-+ srli $r18, $r18, 31
-+ srli $r19, $r19, 0
-+ srli $r19, $r19, 1
-+ srli $r19, $r19, 2
-+ srli $r19, $r19, 3
-+ srli $r19, $r19, 4
-+ srli $r19, $r19, 5
-+ srli $r19, $r19, 6
-+ srli $r19, $r19, 7
-+ srli $r19, $r19, 8
-+ srli $r19, $r19, 9
-+ srli $r19, $r19, 10
-+ srli $r19, $r19, 11
-+ srli $r19, $r19, 12
-+ srli $r19, $r19, 13
-+ srli $r19, $r19, 14
-+ srli $r19, $r19, 15
-+ srli $r19, $r19, 16
-+ srli $r19, $r19, 17
-+ srli $r19, $r19, 18
-+ srli $r19, $r19, 19
-+ srli $r19, $r19, 20
-+ srli $r19, $r19, 21
-+ srli $r19, $r19, 22
-+ srli $r19, $r19, 23
-+ srli $r19, $r19, 24
-+ srli $r19, $r19, 25
-+ srli $r19, $r19, 26
-+ srli $r19, $r19, 27
-+ srli $r19, $r19, 28
-+ srli $r19, $r19, 29
-+ srli $r19, $r19, 30
-+ srli $r19, $r19, 31
-+ slli $r0, $r0, 0
-+ slli $r0, $r0, 1
-+ slli $r0, $r0, 2
-+ slli $r0, $r0, 3
-+ slli $r0, $r0, 4
-+ slli $r0, $r0, 5
-+ slli $r0, $r0, 6
-+ slli $r0, $r0, 7
-+ slli $r0, $r1, 0
-+ slli $r0, $r1, 1
-+ slli $r0, $r1, 2
-+ slli $r0, $r1, 3
-+ slli $r0, $r1, 4
-+ slli $r0, $r1, 5
-+ slli $r0, $r1, 6
-+ slli $r0, $r1, 7
-+ slli $r0, $r2, 0
-+ slli $r0, $r2, 1
-+ slli $r0, $r2, 2
-+ slli $r0, $r2, 3
-+ slli $r0, $r2, 4
-+ slli $r0, $r2, 5
-+ slli $r0, $r2, 6
-+ slli $r0, $r2, 7
-+ slli $r0, $r3, 0
-+ slli $r0, $r3, 1
-+ slli $r0, $r3, 2
-+ slli $r0, $r3, 3
-+ slli $r0, $r3, 4
-+ slli $r0, $r3, 5
-+ slli $r0, $r3, 6
-+ slli $r0, $r3, 7
-+ slli $r0, $r4, 0
-+ slli $r0, $r4, 1
-+ slli $r0, $r4, 2
-+ slli $r0, $r4, 3
-+ slli $r0, $r4, 4
-+ slli $r0, $r4, 5
-+ slli $r0, $r4, 6
-+ slli $r0, $r4, 7
-+ slli $r0, $r5, 0
-+ slli $r0, $r5, 1
-+ slli $r0, $r5, 2
-+ slli $r0, $r5, 3
-+ slli $r0, $r5, 4
-+ slli $r0, $r5, 5
-+ slli $r0, $r5, 6
-+ slli $r0, $r5, 7
-+ slli $r0, $r6, 0
-+ slli $r0, $r6, 1
-+ slli $r0, $r6, 2
-+ slli $r0, $r6, 3
-+ slli $r0, $r6, 4
-+ slli $r0, $r6, 5
-+ slli $r0, $r6, 6
-+ slli $r0, $r6, 7
-+ slli $r0, $r7, 0
-+ slli $r0, $r7, 1
-+ slli $r0, $r7, 2
-+ slli $r0, $r7, 3
-+ slli $r0, $r7, 4
-+ slli $r0, $r7, 5
-+ slli $r0, $r7, 6
-+ slli $r0, $r7, 7
-+ slli $r1, $r0, 0
-+ slli $r1, $r0, 1
-+ slli $r1, $r0, 2
-+ slli $r1, $r0, 3
-+ slli $r1, $r0, 4
-+ slli $r1, $r0, 5
-+ slli $r1, $r0, 6
-+ slli $r1, $r0, 7
-+ slli $r1, $r1, 0
-+ slli $r1, $r1, 1
-+ slli $r1, $r1, 2
-+ slli $r1, $r1, 3
-+ slli $r1, $r1, 4
-+ slli $r1, $r1, 5
-+ slli $r1, $r1, 6
-+ slli $r1, $r1, 7
-+ slli $r1, $r2, 0
-+ slli $r1, $r2, 1
-+ slli $r1, $r2, 2
-+ slli $r1, $r2, 3
-+ slli $r1, $r2, 4
-+ slli $r1, $r2, 5
-+ slli $r1, $r2, 6
-+ slli $r1, $r2, 7
-+ slli $r1, $r3, 0
-+ slli $r1, $r3, 1
-+ slli $r1, $r3, 2
-+ slli $r1, $r3, 3
-+ slli $r1, $r3, 4
-+ slli $r1, $r3, 5
-+ slli $r1, $r3, 6
-+ slli $r1, $r3, 7
-+ slli $r1, $r4, 0
-+ slli $r1, $r4, 1
-+ slli $r1, $r4, 2
-+ slli $r1, $r4, 3
-+ slli $r1, $r4, 4
-+ slli $r1, $r4, 5
-+ slli $r1, $r4, 6
-+ slli $r1, $r4, 7
-+ slli $r1, $r5, 0
-+ slli $r1, $r5, 1
-+ slli $r1, $r5, 2
-+ slli $r1, $r5, 3
-+ slli $r1, $r5, 4
-+ slli $r1, $r5, 5
-+ slli $r1, $r5, 6
-+ slli $r1, $r5, 7
-+ slli $r1, $r6, 0
-+ slli $r1, $r6, 1
-+ slli $r1, $r6, 2
-+ slli $r1, $r6, 3
-+ slli $r1, $r6, 4
-+ slli $r1, $r6, 5
-+ slli $r1, $r6, 6
-+ slli $r1, $r6, 7
-+ slli $r1, $r7, 0
-+ slli $r1, $r7, 1
-+ slli $r1, $r7, 2
-+ slli $r1, $r7, 3
-+ slli $r1, $r7, 4
-+ slli $r1, $r7, 5
-+ slli $r1, $r7, 6
-+ slli $r1, $r7, 7
-+ slli $r2, $r0, 0
-+ slli $r2, $r0, 1
-+ slli $r2, $r0, 2
-+ slli $r2, $r0, 3
-+ slli $r2, $r0, 4
-+ slli $r2, $r0, 5
-+ slli $r2, $r0, 6
-+ slli $r2, $r0, 7
-+ slli $r2, $r1, 0
-+ slli $r2, $r1, 1
-+ slli $r2, $r1, 2
-+ slli $r2, $r1, 3
-+ slli $r2, $r1, 4
-+ slli $r2, $r1, 5
-+ slli $r2, $r1, 6
-+ slli $r2, $r1, 7
-+ slli $r2, $r2, 0
-+ slli $r2, $r2, 1
-+ slli $r2, $r2, 2
-+ slli $r2, $r2, 3
-+ slli $r2, $r2, 4
-+ slli $r2, $r2, 5
-+ slli $r2, $r2, 6
-+ slli $r2, $r2, 7
-+ slli $r2, $r3, 0
-+ slli $r2, $r3, 1
-+ slli $r2, $r3, 2
-+ slli $r2, $r3, 3
-+ slli $r2, $r3, 4
-+ slli $r2, $r3, 5
-+ slli $r2, $r3, 6
-+ slli $r2, $r3, 7
-+ slli $r2, $r4, 0
-+ slli $r2, $r4, 1
-+ slli $r2, $r4, 2
-+ slli $r2, $r4, 3
-+ slli $r2, $r4, 4
-+ slli $r2, $r4, 5
-+ slli $r2, $r4, 6
-+ slli $r2, $r4, 7
-+ slli $r2, $r5, 0
-+ slli $r2, $r5, 1
-+ slli $r2, $r5, 2
-+ slli $r2, $r5, 3
-+ slli $r2, $r5, 4
-+ slli $r2, $r5, 5
-+ slli $r2, $r5, 6
-+ slli $r2, $r5, 7
-+ slli $r2, $r6, 0
-+ slli $r2, $r6, 1
-+ slli $r2, $r6, 2
-+ slli $r2, $r6, 3
-+ slli $r2, $r6, 4
-+ slli $r2, $r6, 5
-+ slli $r2, $r6, 6
-+ slli $r2, $r6, 7
-+ slli $r2, $r7, 0
-+ slli $r2, $r7, 1
-+ slli $r2, $r7, 2
-+ slli $r2, $r7, 3
-+ slli $r2, $r7, 4
-+ slli $r2, $r7, 5
-+ slli $r2, $r7, 6
-+ slli $r2, $r7, 7
-+ slli $r3, $r0, 0
-+ slli $r3, $r0, 1
-+ slli $r3, $r0, 2
-+ slli $r3, $r0, 3
-+ slli $r3, $r0, 4
-+ slli $r3, $r0, 5
-+ slli $r3, $r0, 6
-+ slli $r3, $r0, 7
-+ slli $r3, $r1, 0
-+ slli $r3, $r1, 1
-+ slli $r3, $r1, 2
-+ slli $r3, $r1, 3
-+ slli $r3, $r1, 4
-+ slli $r3, $r1, 5
-+ slli $r3, $r1, 6
-+ slli $r3, $r1, 7
-+ slli $r3, $r2, 0
-+ slli $r3, $r2, 1
-+ slli $r3, $r2, 2
-+ slli $r3, $r2, 3
-+ slli $r3, $r2, 4
-+ slli $r3, $r2, 5
-+ slli $r3, $r2, 6
-+ slli $r3, $r2, 7
-+ slli $r3, $r3, 0
-+ slli $r3, $r3, 1
-+ slli $r3, $r3, 2
-+ slli $r3, $r3, 3
-+ slli $r3, $r3, 4
-+ slli $r3, $r3, 5
-+ slli $r3, $r3, 6
-+ slli $r3, $r3, 7
-+ slli $r3, $r4, 0
-+ slli $r3, $r4, 1
-+ slli $r3, $r4, 2
-+ slli $r3, $r4, 3
-+ slli $r3, $r4, 4
-+ slli $r3, $r4, 5
-+ slli $r3, $r4, 6
-+ slli $r3, $r4, 7
-+ slli $r3, $r5, 0
-+ slli $r3, $r5, 1
-+ slli $r3, $r5, 2
-+ slli $r3, $r5, 3
-+ slli $r3, $r5, 4
-+ slli $r3, $r5, 5
-+ slli $r3, $r5, 6
-+ slli $r3, $r5, 7
-+ slli $r3, $r6, 0
-+ slli $r3, $r6, 1
-+ slli $r3, $r6, 2
-+ slli $r3, $r6, 3
-+ slli $r3, $r6, 4
-+ slli $r3, $r6, 5
-+ slli $r3, $r6, 6
-+ slli $r3, $r6, 7
-+ slli $r3, $r7, 0
-+ slli $r3, $r7, 1
-+ slli $r3, $r7, 2
-+ slli $r3, $r7, 3
-+ slli $r3, $r7, 4
-+ slli $r3, $r7, 5
-+ slli $r3, $r7, 6
-+ slli $r3, $r7, 7
-+ slli $r4, $r0, 0
-+ slli $r4, $r0, 1
-+ slli $r4, $r0, 2
-+ slli $r4, $r0, 3
-+ slli $r4, $r0, 4
-+ slli $r4, $r0, 5
-+ slli $r4, $r0, 6
-+ slli $r4, $r0, 7
-+ slli $r4, $r1, 0
-+ slli $r4, $r1, 1
-+ slli $r4, $r1, 2
-+ slli $r4, $r1, 3
-+ slli $r4, $r1, 4
-+ slli $r4, $r1, 5
-+ slli $r4, $r1, 6
-+ slli $r4, $r1, 7
-+ slli $r4, $r2, 0
-+ slli $r4, $r2, 1
-+ slli $r4, $r2, 2
-+ slli $r4, $r2, 3
-+ slli $r4, $r2, 4
-+ slli $r4, $r2, 5
-+ slli $r4, $r2, 6
-+ slli $r4, $r2, 7
-+ slli $r4, $r3, 0
-+ slli $r4, $r3, 1
-+ slli $r4, $r3, 2
-+ slli $r4, $r3, 3
-+ slli $r4, $r3, 4
-+ slli $r4, $r3, 5
-+ slli $r4, $r3, 6
-+ slli $r4, $r3, 7
-+ slli $r4, $r4, 0
-+ slli $r4, $r4, 1
-+ slli $r4, $r4, 2
-+ slli $r4, $r4, 3
-+ slli $r4, $r4, 4
-+ slli $r4, $r4, 5
-+ slli $r4, $r4, 6
-+ slli $r4, $r4, 7
-+ slli $r4, $r5, 0
-+ slli $r4, $r5, 1
-+ slli $r4, $r5, 2
-+ slli $r4, $r5, 3
-+ slli $r4, $r5, 4
-+ slli $r4, $r5, 5
-+ slli $r4, $r5, 6
-+ slli $r4, $r5, 7
-+ slli $r4, $r6, 0
-+ slli $r4, $r6, 1
-+ slli $r4, $r6, 2
-+ slli $r4, $r6, 3
-+ slli $r4, $r6, 4
-+ slli $r4, $r6, 5
-+ slli $r4, $r6, 6
-+ slli $r4, $r6, 7
-+ slli $r4, $r7, 0
-+ slli $r4, $r7, 1
-+ slli $r4, $r7, 2
-+ slli $r4, $r7, 3
-+ slli $r4, $r7, 4
-+ slli $r4, $r7, 5
-+ slli $r4, $r7, 6
-+ slli $r4, $r7, 7
-+ slli $r5, $r0, 0
-+ slli $r5, $r0, 1
-+ slli $r5, $r0, 2
-+ slli $r5, $r0, 3
-+ slli $r5, $r0, 4
-+ slli $r5, $r0, 5
-+ slli $r5, $r0, 6
-+ slli $r5, $r0, 7
-+ slli $r5, $r1, 0
-+ slli $r5, $r1, 1
-+ slli $r5, $r1, 2
-+ slli $r5, $r1, 3
-+ slli $r5, $r1, 4
-+ slli $r5, $r1, 5
-+ slli $r5, $r1, 6
-+ slli $r5, $r1, 7
-+ slli $r5, $r2, 0
-+ slli $r5, $r2, 1
-+ slli $r5, $r2, 2
-+ slli $r5, $r2, 3
-+ slli $r5, $r2, 4
-+ slli $r5, $r2, 5
-+ slli $r5, $r2, 6
-+ slli $r5, $r2, 7
-+ slli $r5, $r3, 0
-+ slli $r5, $r3, 1
-+ slli $r5, $r3, 2
-+ slli $r5, $r3, 3
-+ slli $r5, $r3, 4
-+ slli $r5, $r3, 5
-+ slli $r5, $r3, 6
-+ slli $r5, $r3, 7
-+ slli $r5, $r4, 0
-+ slli $r5, $r4, 1
-+ slli $r5, $r4, 2
-+ slli $r5, $r4, 3
-+ slli $r5, $r4, 4
-+ slli $r5, $r4, 5
-+ slli $r5, $r4, 6
-+ slli $r5, $r4, 7
-+ slli $r5, $r5, 0
-+ slli $r5, $r5, 1
-+ slli $r5, $r5, 2
-+ slli $r5, $r5, 3
-+ slli $r5, $r5, 4
-+ slli $r5, $r5, 5
-+ slli $r5, $r5, 6
-+ slli $r5, $r5, 7
-+ slli $r5, $r6, 0
-+ slli $r5, $r6, 1
-+ slli $r5, $r6, 2
-+ slli $r5, $r6, 3
-+ slli $r5, $r6, 4
-+ slli $r5, $r6, 5
-+ slli $r5, $r6, 6
-+ slli $r5, $r6, 7
-+ slli $r5, $r7, 0
-+ slli $r5, $r7, 1
-+ slli $r5, $r7, 2
-+ slli $r5, $r7, 3
-+ slli $r5, $r7, 4
-+ slli $r5, $r7, 5
-+ slli $r5, $r7, 6
-+ slli $r5, $r7, 7
-+ slli $r6, $r0, 0
-+ slli $r6, $r0, 1
-+ slli $r6, $r0, 2
-+ slli $r6, $r0, 3
-+ slli $r6, $r0, 4
-+ slli $r6, $r0, 5
-+ slli $r6, $r0, 6
-+ slli $r6, $r0, 7
-+ slli $r6, $r1, 0
-+ slli $r6, $r1, 1
-+ slli $r6, $r1, 2
-+ slli $r6, $r1, 3
-+ slli $r6, $r1, 4
-+ slli $r6, $r1, 5
-+ slli $r6, $r1, 6
-+ slli $r6, $r1, 7
-+ slli $r6, $r2, 0
-+ slli $r6, $r2, 1
-+ slli $r6, $r2, 2
-+ slli $r6, $r2, 3
-+ slli $r6, $r2, 4
-+ slli $r6, $r2, 5
-+ slli $r6, $r2, 6
-+ slli $r6, $r2, 7
-+ slli $r6, $r3, 0
-+ slli $r6, $r3, 1
-+ slli $r6, $r3, 2
-+ slli $r6, $r3, 3
-+ slli $r6, $r3, 4
-+ slli $r6, $r3, 5
-+ slli $r6, $r3, 6
-+ slli $r6, $r3, 7
-+ slli $r6, $r4, 0
-+ slli $r6, $r4, 1
-+ slli $r6, $r4, 2
-+ slli $r6, $r4, 3
-+ slli $r6, $r4, 4
-+ slli $r6, $r4, 5
-+ slli $r6, $r4, 6
-+ slli $r6, $r4, 7
-+ slli $r6, $r5, 0
-+ slli $r6, $r5, 1
-+ slli $r6, $r5, 2
-+ slli $r6, $r5, 3
-+ slli $r6, $r5, 4
-+ slli $r6, $r5, 5
-+ slli $r6, $r5, 6
-+ slli $r6, $r5, 7
-+ slli $r6, $r6, 0
-+ slli $r6, $r6, 1
-+ slli $r6, $r6, 2
-+ slli $r6, $r6, 3
-+ slli $r6, $r6, 4
-+ slli $r6, $r6, 5
-+ slli $r6, $r6, 6
-+ slli $r6, $r6, 7
-+ slli $r6, $r7, 0
-+ slli $r6, $r7, 1
-+ slli $r6, $r7, 2
-+ slli $r6, $r7, 3
-+ slli $r6, $r7, 4
-+ slli $r6, $r7, 5
-+ slli $r6, $r7, 6
-+ slli $r6, $r7, 7
-+ slli $r7, $r0, 0
-+ slli $r7, $r0, 1
-+ slli $r7, $r0, 2
-+ slli $r7, $r0, 3
-+ slli $r7, $r0, 4
-+ slli $r7, $r0, 5
-+ slli $r7, $r0, 6
-+ slli $r7, $r0, 7
-+ slli $r7, $r1, 0
-+ slli $r7, $r1, 1
-+ slli $r7, $r1, 2
-+ slli $r7, $r1, 3
-+ slli $r7, $r1, 4
-+ slli $r7, $r1, 5
-+ slli $r7, $r1, 6
-+ slli $r7, $r1, 7
-+ slli $r7, $r2, 0
-+ slli $r7, $r2, 1
-+ slli $r7, $r2, 2
-+ slli $r7, $r2, 3
-+ slli $r7, $r2, 4
-+ slli $r7, $r2, 5
-+ slli $r7, $r2, 6
-+ slli $r7, $r2, 7
-+ slli $r7, $r3, 0
-+ slli $r7, $r3, 1
-+ slli $r7, $r3, 2
-+ slli $r7, $r3, 3
-+ slli $r7, $r3, 4
-+ slli $r7, $r3, 5
-+ slli $r7, $r3, 6
-+ slli $r7, $r3, 7
-+ slli $r7, $r4, 0
-+ slli $r7, $r4, 1
-+ slli $r7, $r4, 2
-+ slli $r7, $r4, 3
-+ slli $r7, $r4, 4
-+ slli $r7, $r4, 5
-+ slli $r7, $r4, 6
-+ slli $r7, $r4, 7
-+ slli $r7, $r5, 0
-+ slli $r7, $r5, 1
-+ slli $r7, $r5, 2
-+ slli $r7, $r5, 3
-+ slli $r7, $r5, 4
-+ slli $r7, $r5, 5
-+ slli $r7, $r5, 6
-+ slli $r7, $r5, 7
-+ slli $r7, $r6, 0
-+ slli $r7, $r6, 1
-+ slli $r7, $r6, 2
-+ slli $r7, $r6, 3
-+ slli $r7, $r6, 4
-+ slli $r7, $r6, 5
-+ slli $r7, $r6, 6
-+ slli $r7, $r6, 7
-+ slli $r7, $r7, 0
-+ slli $r7, $r7, 1
-+ slli $r7, $r7, 2
-+ slli $r7, $r7, 3
-+ slli $r7, $r7, 4
-+ slli $r7, $r7, 5
-+ slli $r7, $r7, 6
-+ slli $r7, $r7, 7
-+ zeb $r0, $r0
-+ zeb $r0, $r1
-+ zeb $r0, $r2
-+ zeb $r0, $r3
-+ zeb $r0, $r4
-+ zeb $r0, $r5
-+ zeb $r0, $r6
-+ zeb $r0, $r7
-+ zeb $r1, $r0
-+ zeb $r1, $r1
-+ zeb $r1, $r2
-+ zeb $r1, $r3
-+ zeb $r1, $r4
-+ zeb $r1, $r5
-+ zeb $r1, $r6
-+ zeb $r1, $r7
-+ zeb $r2, $r0
-+ zeb $r2, $r1
-+ zeb $r2, $r2
-+ zeb $r2, $r3
-+ zeb $r2, $r4
-+ zeb $r2, $r5
-+ zeb $r2, $r6
-+ zeb $r2, $r7
-+ zeb $r3, $r0
-+ zeb $r3, $r1
-+ zeb $r3, $r2
-+ zeb $r3, $r3
-+ zeb $r3, $r4
-+ zeb $r3, $r5
-+ zeb $r3, $r6
-+ zeb $r3, $r7
-+ zeb $r4, $r0
-+ zeb $r4, $r1
-+ zeb $r4, $r2
-+ zeb $r4, $r3
-+ zeb $r4, $r4
-+ zeb $r4, $r5
-+ zeb $r4, $r6
-+ zeb $r4, $r7
-+ zeb $r5, $r0
-+ zeb $r5, $r1
-+ zeb $r5, $r2
-+ zeb $r5, $r3
-+ zeb $r5, $r4
-+ zeb $r5, $r5
-+ zeb $r5, $r6
-+ zeb $r5, $r7
-+ zeb $r6, $r0
-+ zeb $r6, $r1
-+ zeb $r6, $r2
-+ zeb $r6, $r3
-+ zeb $r6, $r4
-+ zeb $r6, $r5
-+ zeb $r6, $r6
-+ zeb $r6, $r7
-+ zeb $r7, $r0
-+ zeb $r7, $r1
-+ zeb $r7, $r2
-+ zeb $r7, $r3
-+ zeb $r7, $r4
-+ zeb $r7, $r5
-+ zeb $r7, $r6
-+ zeb $r7, $r7
-+ zeh $r0, $r0
-+ zeh $r0, $r1
-+ zeh $r0, $r2
-+ zeh $r0, $r3
-+ zeh $r0, $r4
-+ zeh $r0, $r5
-+ zeh $r0, $r6
-+ zeh $r0, $r7
-+ zeh $r1, $r0
-+ zeh $r1, $r1
-+ zeh $r1, $r2
-+ zeh $r1, $r3
-+ zeh $r1, $r4
-+ zeh $r1, $r5
-+ zeh $r1, $r6
-+ zeh $r1, $r7
-+ zeh $r2, $r0
-+ zeh $r2, $r1
-+ zeh $r2, $r2
-+ zeh $r2, $r3
-+ zeh $r2, $r4
-+ zeh $r2, $r5
-+ zeh $r2, $r6
-+ zeh $r2, $r7
-+ zeh $r3, $r0
-+ zeh $r3, $r1
-+ zeh $r3, $r2
-+ zeh $r3, $r3
-+ zeh $r3, $r4
-+ zeh $r3, $r5
-+ zeh $r3, $r6
-+ zeh $r3, $r7
-+ zeh $r4, $r0
-+ zeh $r4, $r1
-+ zeh $r4, $r2
-+ zeh $r4, $r3
-+ zeh $r4, $r4
-+ zeh $r4, $r5
-+ zeh $r4, $r6
-+ zeh $r4, $r7
-+ zeh $r5, $r0
-+ zeh $r5, $r1
-+ zeh $r5, $r2
-+ zeh $r5, $r3
-+ zeh $r5, $r4
-+ zeh $r5, $r5
-+ zeh $r5, $r6
-+ zeh $r5, $r7
-+ zeh $r6, $r0
-+ zeh $r6, $r1
-+ zeh $r6, $r2
-+ zeh $r6, $r3
-+ zeh $r6, $r4
-+ zeh $r6, $r5
-+ zeh $r6, $r6
-+ zeh $r6, $r7
-+ zeh $r7, $r0
-+ zeh $r7, $r1
-+ zeh $r7, $r2
-+ zeh $r7, $r3
-+ zeh $r7, $r4
-+ zeh $r7, $r5
-+ zeh $r7, $r6
-+ zeh $r7, $r7
-+ seb $r0, $r0
-+ seb $r0, $r1
-+ seb $r0, $r2
-+ seb $r0, $r3
-+ seb $r0, $r4
-+ seb $r0, $r5
-+ seb $r0, $r6
-+ seb $r0, $r7
-+ seb $r1, $r0
-+ seb $r1, $r1
-+ seb $r1, $r2
-+ seb $r1, $r3
-+ seb $r1, $r4
-+ seb $r1, $r5
-+ seb $r1, $r6
-+ seb $r1, $r7
-+ seb $r2, $r0
-+ seb $r2, $r1
-+ seb $r2, $r2
-+ seb $r2, $r3
-+ seb $r2, $r4
-+ seb $r2, $r5
-+ seb $r2, $r6
-+ seb $r2, $r7
-+ seb $r3, $r0
-+ seb $r3, $r1
-+ seb $r3, $r2
-+ seb $r3, $r3
-+ seb $r3, $r4
-+ seb $r3, $r5
-+ seb $r3, $r6
-+ seb $r3, $r7
-+ seb $r4, $r0
-+ seb $r4, $r1
-+ seb $r4, $r2
-+ seb $r4, $r3
-+ seb $r4, $r4
-+ seb $r4, $r5
-+ seb $r4, $r6
-+ seb $r4, $r7
-+ seb $r5, $r0
-+ seb $r5, $r1
-+ seb $r5, $r2
-+ seb $r5, $r3
-+ seb $r5, $r4
-+ seb $r5, $r5
-+ seb $r5, $r6
-+ seb $r5, $r7
-+ seb $r6, $r0
-+ seb $r6, $r1
-+ seb $r6, $r2
-+ seb $r6, $r3
-+ seb $r6, $r4
-+ seb $r6, $r5
-+ seb $r6, $r6
-+ seb $r6, $r7
-+ seb $r7, $r0
-+ seb $r7, $r1
-+ seb $r7, $r2
-+ seb $r7, $r3
-+ seb $r7, $r4
-+ seb $r7, $r5
-+ seb $r7, $r6
-+ seb $r7, $r7
-+ seh $r0, $r0
-+ seh $r0, $r1
-+ seh $r0, $r2
-+ seh $r0, $r3
-+ seh $r0, $r4
-+ seh $r0, $r5
-+ seh $r0, $r6
-+ seh $r0, $r7
-+ seh $r1, $r0
-+ seh $r1, $r1
-+ seh $r1, $r2
-+ seh $r1, $r3
-+ seh $r1, $r4
-+ seh $r1, $r5
-+ seh $r1, $r6
-+ seh $r1, $r7
-+ seh $r2, $r0
-+ seh $r2, $r1
-+ seh $r2, $r2
-+ seh $r2, $r3
-+ seh $r2, $r4
-+ seh $r2, $r5
-+ seh $r2, $r6
-+ seh $r2, $r7
-+ seh $r3, $r0
-+ seh $r3, $r1
-+ seh $r3, $r2
-+ seh $r3, $r3
-+ seh $r3, $r4
-+ seh $r3, $r5
-+ seh $r3, $r6
-+ seh $r3, $r7
-+ seh $r4, $r0
-+ seh $r4, $r1
-+ seh $r4, $r2
-+ seh $r4, $r3
-+ seh $r4, $r4
-+ seh $r4, $r5
-+ seh $r4, $r6
-+ seh $r4, $r7
-+ seh $r5, $r0
-+ seh $r5, $r1
-+ seh $r5, $r2
-+ seh $r5, $r3
-+ seh $r5, $r4
-+ seh $r5, $r5
-+ seh $r5, $r6
-+ seh $r5, $r7
-+ seh $r6, $r0
-+ seh $r6, $r1
-+ seh $r6, $r2
-+ seh $r6, $r3
-+ seh $r6, $r4
-+ seh $r6, $r5
-+ seh $r6, $r6
-+ seh $r6, $r7
-+ seh $r7, $r0
-+ seh $r7, $r1
-+ seh $r7, $r2
-+ seh $r7, $r3
-+ seh $r7, $r4
-+ seh $r7, $r5
-+ seh $r7, $r6
-+ seh $r7, $r7
-+ andi $r0, $r0, 1
-+ andi $r0, $r1, 1
-+ andi $r0, $r2, 1
-+ andi $r0, $r3, 1
-+ andi $r0, $r4, 1
-+ andi $r0, $r5, 1
-+ andi $r0, $r6, 1
-+ andi $r0, $r7, 1
-+ andi $r1, $r0, 1
-+ andi $r1, $r1, 1
-+ andi $r1, $r2, 1
-+ andi $r1, $r3, 1
-+ andi $r1, $r4, 1
-+ andi $r1, $r5, 1
-+ andi $r1, $r6, 1
-+ andi $r1, $r7, 1
-+ andi $r2, $r0, 1
-+ andi $r2, $r1, 1
-+ andi $r2, $r2, 1
-+ andi $r2, $r3, 1
-+ andi $r2, $r4, 1
-+ andi $r2, $r5, 1
-+ andi $r2, $r6, 1
-+ andi $r2, $r7, 1
-+ andi $r3, $r0, 1
-+ andi $r3, $r1, 1
-+ andi $r3, $r2, 1
-+ andi $r3, $r3, 1
-+ andi $r3, $r4, 1
-+ andi $r3, $r5, 1
-+ andi $r3, $r6, 1
-+ andi $r3, $r7, 1
-+ andi $r4, $r0, 1
-+ andi $r4, $r1, 1
-+ andi $r4, $r2, 1
-+ andi $r4, $r3, 1
-+ andi $r4, $r4, 1
-+ andi $r4, $r5, 1
-+ andi $r4, $r6, 1
-+ andi $r4, $r7, 1
-+ andi $r5, $r0, 1
-+ andi $r5, $r1, 1
-+ andi $r5, $r2, 1
-+ andi $r5, $r3, 1
-+ andi $r5, $r4, 1
-+ andi $r5, $r5, 1
-+ andi $r5, $r6, 1
-+ andi $r5, $r7, 1
-+ andi $r6, $r0, 1
-+ andi $r6, $r1, 1
-+ andi $r6, $r2, 1
-+ andi $r6, $r3, 1
-+ andi $r6, $r4, 1
-+ andi $r6, $r5, 1
-+ andi $r6, $r6, 1
-+ andi $r6, $r7, 1
-+ andi $r7, $r0, 1
-+ andi $r7, $r1, 1
-+ andi $r7, $r2, 1
-+ andi $r7, $r3, 1
-+ andi $r7, $r4, 1
-+ andi $r7, $r5, 1
-+ andi $r7, $r6, 1
-+ andi $r7, $r7, 1
-+ andi $r0, $r0, 0x7ff
-+ andi $r0, $r1, 0x7ff
-+ andi $r0, $r2, 0x7ff
-+ andi $r0, $r3, 0x7ff
-+ andi $r0, $r4, 0x7ff
-+ andi $r0, $r5, 0x7ff
-+ andi $r0, $r6, 0x7ff
-+ andi $r0, $r7, 0x7ff
-+ andi $r1, $r0, 0x7ff
-+ andi $r1, $r1, 0x7ff
-+ andi $r1, $r2, 0x7ff
-+ andi $r1, $r3, 0x7ff
-+ andi $r1, $r4, 0x7ff
-+ andi $r1, $r5, 0x7ff
-+ andi $r1, $r6, 0x7ff
-+ andi $r1, $r7, 0x7ff
-+ andi $r2, $r0, 0x7ff
-+ andi $r2, $r1, 0x7ff
-+ andi $r2, $r2, 0x7ff
-+ andi $r2, $r3, 0x7ff
-+ andi $r2, $r4, 0x7ff
-+ andi $r2, $r5, 0x7ff
-+ andi $r2, $r6, 0x7ff
-+ andi $r2, $r7, 0x7ff
-+ andi $r3, $r0, 0x7ff
-+ andi $r3, $r1, 0x7ff
-+ andi $r3, $r2, 0x7ff
-+ andi $r3, $r3, 0x7ff
-+ andi $r3, $r4, 0x7ff
-+ andi $r3, $r5, 0x7ff
-+ andi $r3, $r6, 0x7ff
-+ andi $r3, $r7, 0x7ff
-+ andi $r4, $r0, 0x7ff
-+ andi $r4, $r1, 0x7ff
-+ andi $r4, $r2, 0x7ff
-+ andi $r4, $r3, 0x7ff
-+ andi $r4, $r4, 0x7ff
-+ andi $r4, $r5, 0x7ff
-+ andi $r4, $r6, 0x7ff
-+ andi $r4, $r7, 0x7ff
-+ andi $r5, $r0, 0x7ff
-+ andi $r5, $r1, 0x7ff
-+ andi $r5, $r2, 0x7ff
-+ andi $r5, $r3, 0x7ff
-+ andi $r5, $r4, 0x7ff
-+ andi $r5, $r5, 0x7ff
-+ andi $r5, $r6, 0x7ff
-+ andi $r5, $r7, 0x7ff
-+ andi $r6, $r0, 0x7ff
-+ andi $r6, $r1, 0x7ff
-+ andi $r6, $r2, 0x7ff
-+ andi $r6, $r3, 0x7ff
-+ andi $r6, $r4, 0x7ff
-+ andi $r6, $r5, 0x7ff
-+ andi $r6, $r6, 0x7ff
-+ andi $r6, $r7, 0x7ff
-+ andi $r7, $r0, 0x7ff
-+ andi $r7, $r1, 0x7ff
-+ andi $r7, $r2, 0x7ff
-+ andi $r7, $r3, 0x7ff
-+ andi $r7, $r4, 0x7ff
-+ andi $r7, $r5, 0x7ff
-+ andi $r7, $r6, 0x7ff
-+ andi $r7, $r7, 0x7ff
-+ add $r0, $r0, $r0
-+ add $r0, $r0, $r1
-+ add $r0, $r0, $r2
-+ add $r0, $r0, $r3
-+ add $r0, $r0, $r4
-+ add $r0, $r0, $r5
-+ add $r0, $r0, $r6
-+ add $r0, $r0, $r7
-+ add $r0, $r1, $r0
-+ add $r0, $r1, $r1
-+ add $r0, $r1, $r2
-+ add $r0, $r1, $r3
-+ add $r0, $r1, $r4
-+ add $r0, $r1, $r5
-+ add $r0, $r1, $r6
-+ add $r0, $r1, $r7
-+ add $r0, $r2, $r0
-+ add $r0, $r2, $r1
-+ add $r0, $r2, $r2
-+ add $r0, $r2, $r3
-+ add $r0, $r2, $r4
-+ add $r0, $r2, $r5
-+ add $r0, $r2, $r6
-+ add $r0, $r2, $r7
-+ add $r0, $r3, $r0
-+ add $r0, $r3, $r1
-+ add $r0, $r3, $r2
-+ add $r0, $r3, $r3
-+ add $r0, $r3, $r4
-+ add $r0, $r3, $r5
-+ add $r0, $r3, $r6
-+ add $r0, $r3, $r7
-+ add $r0, $r4, $r0
-+ add $r0, $r4, $r1
-+ add $r0, $r4, $r2
-+ add $r0, $r4, $r3
-+ add $r0, $r4, $r4
-+ add $r0, $r4, $r5
-+ add $r0, $r4, $r6
-+ add $r0, $r4, $r7
-+ add $r0, $r5, $r0
-+ add $r0, $r5, $r1
-+ add $r0, $r5, $r2
-+ add $r0, $r5, $r3
-+ add $r0, $r5, $r4
-+ add $r0, $r5, $r5
-+ add $r0, $r5, $r6
-+ add $r0, $r5, $r7
-+ add $r0, $r6, $r0
-+ add $r0, $r6, $r1
-+ add $r0, $r6, $r2
-+ add $r0, $r6, $r3
-+ add $r0, $r6, $r4
-+ add $r0, $r6, $r5
-+ add $r0, $r6, $r6
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-+ add $r1, $r0, $r1
-+ add $r1, $r0, $r2
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-+ add $r1, $r1, $r1
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-+ add $r1, $r2, $r5
-+ add $r1, $r2, $r6
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-+ add $r1, $r3, $r1
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-+ add $r1, $r3, $r3
-+ add $r1, $r3, $r4
-+ add $r1, $r3, $r5
-+ add $r1, $r3, $r6
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-+ add $r1, $r4, $r1
-+ add $r1, $r4, $r2
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-+ add $r1, $r4, $r4
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-+ add $r1, $r5, $r1
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-+ add $r1, $r5, $r4
-+ add $r1, $r5, $r5
-+ add $r1, $r5, $r6
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-+ add $r1, $r6, $r0
-+ add $r1, $r6, $r1
-+ add $r1, $r6, $r2
-+ add $r1, $r6, $r3
-+ add $r1, $r6, $r4
-+ add $r1, $r6, $r5
-+ add $r1, $r6, $r6
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-+ add $r1, $r7, $r0
-+ add $r1, $r7, $r1
-+ add $r1, $r7, $r2
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-+ add $r1, $r7, $r4
-+ add $r1, $r7, $r5
-+ add $r1, $r7, $r6
-+ add $r1, $r7, $r7
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-+ add $r2, $r0, $r1
-+ add $r2, $r0, $r2
-+ add $r2, $r0, $r3
-+ add $r2, $r0, $r4
-+ add $r2, $r0, $r5
-+ add $r2, $r0, $r6
-+ add $r2, $r0, $r7
-+ add $r2, $r1, $r0
-+ add $r2, $r1, $r1
-+ add $r2, $r1, $r2
-+ add $r2, $r1, $r3
-+ add $r2, $r1, $r4
-+ add $r2, $r1, $r5
-+ add $r2, $r1, $r6
-+ add $r2, $r1, $r7
-+ add $r2, $r2, $r0
-+ add $r2, $r2, $r1
-+ add $r2, $r2, $r2
-+ add $r2, $r2, $r3
-+ add $r2, $r2, $r4
-+ add $r2, $r2, $r5
-+ add $r2, $r2, $r6
-+ add $r2, $r2, $r7
-+ add $r2, $r3, $r0
-+ add $r2, $r3, $r1
-+ add $r2, $r3, $r2
-+ add $r2, $r3, $r3
-+ add $r2, $r3, $r4
-+ add $r2, $r3, $r5
-+ add $r2, $r3, $r6
-+ add $r2, $r3, $r7
-+ add $r2, $r4, $r0
-+ add $r2, $r4, $r1
-+ add $r2, $r4, $r2
-+ add $r2, $r4, $r3
-+ add $r2, $r4, $r4
-+ add $r2, $r4, $r5
-+ add $r2, $r4, $r6
-+ add $r2, $r4, $r7
-+ add $r2, $r5, $r0
-+ add $r2, $r5, $r1
-+ add $r2, $r5, $r2
-+ add $r2, $r5, $r3
-+ add $r2, $r5, $r4
-+ add $r2, $r5, $r5
-+ add $r2, $r5, $r6
-+ add $r2, $r5, $r7
-+ add $r2, $r6, $r0
-+ add $r2, $r6, $r1
-+ add $r2, $r6, $r2
-+ add $r2, $r6, $r3
-+ add $r2, $r6, $r4
-+ add $r2, $r6, $r5
-+ add $r2, $r6, $r6
-+ add $r2, $r6, $r7
-+ add $r2, $r7, $r0
-+ add $r2, $r7, $r1
-+ add $r2, $r7, $r2
-+ add $r2, $r7, $r3
-+ add $r2, $r7, $r4
-+ add $r2, $r7, $r5
-+ add $r2, $r7, $r6
-+ add $r2, $r7, $r7
-+ add $r3, $r0, $r0
-+ add $r3, $r0, $r1
-+ add $r3, $r0, $r2
-+ add $r3, $r0, $r3
-+ add $r3, $r0, $r4
-+ add $r3, $r0, $r5
-+ add $r3, $r0, $r6
-+ add $r3, $r0, $r7
-+ add $r3, $r1, $r0
-+ add $r3, $r1, $r1
-+ add $r3, $r1, $r2
-+ add $r3, $r1, $r3
-+ add $r3, $r1, $r4
-+ add $r3, $r1, $r5
-+ add $r3, $r1, $r6
-+ add $r3, $r1, $r7
-+ add $r3, $r2, $r0
-+ add $r3, $r2, $r1
-+ add $r3, $r2, $r2
-+ add $r3, $r2, $r3
-+ add $r3, $r2, $r4
-+ add $r3, $r2, $r5
-+ add $r3, $r2, $r6
-+ add $r3, $r2, $r7
-+ add $r3, $r3, $r0
-+ add $r3, $r3, $r1
-+ add $r3, $r3, $r2
-+ add $r3, $r3, $r3
-+ add $r3, $r3, $r4
-+ add $r3, $r3, $r5
-+ add $r3, $r3, $r6
-+ add $r3, $r3, $r7
-+ add $r3, $r4, $r0
-+ add $r3, $r4, $r1
-+ add $r3, $r4, $r2
-+ add $r3, $r4, $r3
-+ add $r3, $r4, $r4
-+ add $r3, $r4, $r5
-+ add $r3, $r4, $r6
-+ add $r3, $r4, $r7
-+ add $r3, $r5, $r0
-+ add $r3, $r5, $r1
-+ add $r3, $r5, $r2
-+ add $r3, $r5, $r3
-+ add $r3, $r5, $r4
-+ add $r3, $r5, $r5
-+ add $r3, $r5, $r6
-+ add $r3, $r5, $r7
-+ add $r3, $r6, $r0
-+ add $r3, $r6, $r1
-+ add $r3, $r6, $r2
-+ add $r3, $r6, $r3
-+ add $r3, $r6, $r4
-+ add $r3, $r6, $r5
-+ add $r3, $r6, $r6
-+ add $r3, $r6, $r7
-+ add $r3, $r7, $r0
-+ add $r3, $r7, $r1
-+ add $r3, $r7, $r2
-+ add $r3, $r7, $r3
-+ add $r3, $r7, $r4
-+ add $r3, $r7, $r5
-+ add $r3, $r7, $r6
-+ add $r3, $r7, $r7
-+ add $r4, $r0, $r0
-+ add $r4, $r0, $r1
-+ add $r4, $r0, $r2
-+ add $r4, $r0, $r3
-+ add $r4, $r0, $r4
-+ add $r4, $r0, $r5
-+ add $r4, $r0, $r6
-+ add $r4, $r0, $r7
-+ add $r4, $r1, $r0
-+ add $r4, $r1, $r1
-+ add $r4, $r1, $r2
-+ add $r4, $r1, $r3
-+ add $r4, $r1, $r4
-+ add $r4, $r1, $r5
-+ add $r4, $r1, $r6
-+ add $r4, $r1, $r7
-+ add $r4, $r2, $r0
-+ add $r4, $r2, $r1
-+ add $r4, $r2, $r2
-+ add $r4, $r2, $r3
-+ add $r4, $r2, $r4
-+ add $r4, $r2, $r5
-+ add $r4, $r2, $r6
-+ add $r4, $r2, $r7
-+ add $r4, $r3, $r0
-+ add $r4, $r3, $r1
-+ add $r4, $r3, $r2
-+ add $r4, $r3, $r3
-+ add $r4, $r3, $r4
-+ add $r4, $r3, $r5
-+ add $r4, $r3, $r6
-+ add $r4, $r3, $r7
-+ add $r4, $r4, $r0
-+ add $r4, $r4, $r1
-+ add $r4, $r4, $r2
-+ add $r4, $r4, $r3
-+ add $r4, $r4, $r4
-+ add $r4, $r4, $r5
-+ add $r4, $r4, $r6
-+ add $r4, $r4, $r7
-+ add $r4, $r5, $r0
-+ add $r4, $r5, $r1
-+ add $r4, $r5, $r2
-+ add $r4, $r5, $r3
-+ add $r4, $r5, $r4
-+ add $r4, $r5, $r5
-+ add $r4, $r5, $r6
-+ add $r4, $r5, $r7
-+ add $r4, $r6, $r0
-+ add $r4, $r6, $r1
-+ add $r4, $r6, $r2
-+ add $r4, $r6, $r3
-+ add $r4, $r6, $r4
-+ add $r4, $r6, $r5
-+ add $r4, $r6, $r6
-+ add $r4, $r6, $r7
-+ add $r4, $r7, $r0
-+ add $r4, $r7, $r1
-+ add $r4, $r7, $r2
-+ add $r4, $r7, $r3
-+ add $r4, $r7, $r4
-+ add $r4, $r7, $r5
-+ add $r4, $r7, $r6
-+ add $r4, $r7, $r7
-+ add $r5, $r0, $r0
-+ add $r5, $r0, $r1
-+ add $r5, $r0, $r2
-+ add $r5, $r0, $r3
-+ add $r5, $r0, $r4
-+ add $r5, $r0, $r5
-+ add $r5, $r0, $r6
-+ add $r5, $r0, $r7
-+ add $r5, $r1, $r0
-+ add $r5, $r1, $r1
-+ add $r5, $r1, $r2
-+ add $r5, $r1, $r3
-+ add $r5, $r1, $r4
-+ add $r5, $r1, $r5
-+ add $r5, $r1, $r6
-+ add $r5, $r1, $r7
-+ add $r5, $r2, $r0
-+ add $r5, $r2, $r1
-+ add $r5, $r2, $r2
-+ add $r5, $r2, $r3
-+ add $r5, $r2, $r4
-+ add $r5, $r2, $r5
-+ add $r5, $r2, $r6
-+ add $r5, $r2, $r7
-+ add $r5, $r3, $r0
-+ add $r5, $r3, $r1
-+ add $r5, $r3, $r2
-+ add $r5, $r3, $r3
-+ add $r5, $r3, $r4
-+ add $r5, $r3, $r5
-+ add $r5, $r3, $r6
-+ add $r5, $r3, $r7
-+ add $r5, $r4, $r0
-+ add $r5, $r4, $r1
-+ add $r5, $r4, $r2
-+ add $r5, $r4, $r3
-+ add $r5, $r4, $r4
-+ add $r5, $r4, $r5
-+ add $r5, $r4, $r6
-+ add $r5, $r4, $r7
-+ add $r5, $r5, $r0
-+ add $r5, $r5, $r1
-+ add $r5, $r5, $r2
-+ add $r5, $r5, $r3
-+ add $r5, $r5, $r4
-+ add $r5, $r5, $r5
-+ add $r5, $r5, $r6
-+ add $r5, $r5, $r7
-+ add $r5, $r6, $r0
-+ add $r5, $r6, $r1
-+ add $r5, $r6, $r2
-+ add $r5, $r6, $r3
-+ add $r5, $r6, $r4
-+ add $r5, $r6, $r5
-+ add $r5, $r6, $r6
-+ add $r5, $r6, $r7
-+ add $r5, $r7, $r0
-+ add $r5, $r7, $r1
-+ add $r5, $r7, $r2
-+ add $r5, $r7, $r3
-+ add $r5, $r7, $r4
-+ add $r5, $r7, $r5
-+ add $r5, $r7, $r6
-+ add $r5, $r7, $r7
-+ add $r6, $r0, $r0
-+ add $r6, $r0, $r1
-+ add $r6, $r0, $r2
-+ add $r6, $r0, $r3
-+ add $r6, $r0, $r4
-+ add $r6, $r0, $r5
-+ add $r6, $r0, $r6
-+ add $r6, $r0, $r7
-+ add $r6, $r1, $r0
-+ add $r6, $r1, $r1
-+ add $r6, $r1, $r2
-+ add $r6, $r1, $r3
-+ add $r6, $r1, $r4
-+ add $r6, $r1, $r5
-+ add $r6, $r1, $r6
-+ add $r6, $r1, $r7
-+ add $r6, $r2, $r0
-+ add $r6, $r2, $r1
-+ add $r6, $r2, $r2
-+ add $r6, $r2, $r3
-+ add $r6, $r2, $r4
-+ add $r6, $r2, $r5
-+ add $r6, $r2, $r6
-+ add $r6, $r2, $r7
-+ add $r6, $r3, $r0
-+ add $r6, $r3, $r1
-+ add $r6, $r3, $r2
-+ add $r6, $r3, $r3
-+ add $r6, $r3, $r4
-+ add $r6, $r3, $r5
-+ add $r6, $r3, $r6
-+ add $r6, $r3, $r7
-+ add $r6, $r4, $r0
-+ add $r6, $r4, $r1
-+ add $r6, $r4, $r2
-+ add $r6, $r4, $r3
-+ add $r6, $r4, $r4
-+ add $r6, $r4, $r5
-+ add $r6, $r4, $r6
-+ add $r6, $r4, $r7
-+ add $r6, $r5, $r0
-+ add $r6, $r5, $r1
-+ add $r6, $r5, $r2
-+ add $r6, $r5, $r3
-+ add $r6, $r5, $r4
-+ add $r6, $r5, $r5
-+ add $r6, $r5, $r6
-+ add $r6, $r5, $r7
-+ add $r6, $r6, $r0
-+ add $r6, $r6, $r1
-+ add $r6, $r6, $r2
-+ add $r6, $r6, $r3
-+ add $r6, $r6, $r4
-+ add $r6, $r6, $r5
-+ add $r6, $r6, $r6
-+ add $r6, $r6, $r7
-+ add $r6, $r7, $r0
-+ add $r6, $r7, $r1
-+ add $r6, $r7, $r2
-+ add $r6, $r7, $r3
-+ add $r6, $r7, $r4
-+ add $r6, $r7, $r5
-+ add $r6, $r7, $r6
-+ add $r6, $r7, $r7
-+ add $r7, $r0, $r0
-+ add $r7, $r0, $r1
-+ add $r7, $r0, $r2
-+ add $r7, $r0, $r3
-+ add $r7, $r0, $r4
-+ add $r7, $r0, $r5
-+ add $r7, $r0, $r6
-+ add $r7, $r0, $r7
-+ add $r7, $r1, $r0
-+ add $r7, $r1, $r1
-+ add $r7, $r1, $r2
-+ add $r7, $r1, $r3
-+ add $r7, $r1, $r4
-+ add $r7, $r1, $r5
-+ add $r7, $r1, $r6
-+ add $r7, $r1, $r7
-+ add $r7, $r2, $r0
-+ add $r7, $r2, $r1
-+ add $r7, $r2, $r2
-+ add $r7, $r2, $r3
-+ add $r7, $r2, $r4
-+ add $r7, $r2, $r5
-+ add $r7, $r2, $r6
-+ add $r7, $r2, $r7
-+ add $r7, $r3, $r0
-+ add $r7, $r3, $r1
-+ add $r7, $r3, $r2
-+ add $r7, $r3, $r3
-+ add $r7, $r3, $r4
-+ add $r7, $r3, $r5
-+ add $r7, $r3, $r6
-+ add $r7, $r3, $r7
-+ add $r7, $r4, $r0
-+ add $r7, $r4, $r1
-+ add $r7, $r4, $r2
-+ add $r7, $r4, $r3
-+ add $r7, $r4, $r4
-+ add $r7, $r4, $r5
-+ add $r7, $r4, $r6
-+ add $r7, $r4, $r7
-+ add $r7, $r5, $r0
-+ add $r7, $r5, $r1
-+ add $r7, $r5, $r2
-+ add $r7, $r5, $r3
-+ add $r7, $r5, $r4
-+ add $r7, $r5, $r5
-+ add $r7, $r5, $r6
-+ add $r7, $r5, $r7
-+ add $r7, $r6, $r0
-+ add $r7, $r6, $r1
-+ add $r7, $r6, $r2
-+ add $r7, $r6, $r3
-+ add $r7, $r6, $r4
-+ add $r7, $r6, $r5
-+ add $r7, $r6, $r6
-+ add $r7, $r6, $r7
-+ add $r7, $r7, $r0
-+ add $r7, $r7, $r1
-+ add $r7, $r7, $r2
-+ add $r7, $r7, $r3
-+ add $r7, $r7, $r4
-+ add $r7, $r7, $r5
-+ add $r7, $r7, $r6
-+ add $r7, $r7, $r7
-+ sub $r0, $r0, $r0
-+ sub $r0, $r0, $r1
-+ sub $r0, $r0, $r2
-+ sub $r0, $r0, $r3
-+ sub $r0, $r0, $r4
-+ sub $r0, $r0, $r5
-+ sub $r0, $r0, $r6
-+ sub $r0, $r0, $r7
-+ sub $r0, $r1, $r0
-+ sub $r0, $r1, $r1
-+ sub $r0, $r1, $r2
-+ sub $r0, $r1, $r3
-+ sub $r0, $r1, $r4
-+ sub $r0, $r1, $r5
-+ sub $r0, $r1, $r6
-+ sub $r0, $r1, $r7
-+ sub $r0, $r2, $r0
-+ sub $r0, $r2, $r1
-+ sub $r0, $r2, $r2
-+ sub $r0, $r2, $r3
-+ sub $r0, $r2, $r4
-+ sub $r0, $r2, $r5
-+ sub $r0, $r2, $r6
-+ sub $r0, $r2, $r7
-+ sub $r0, $r3, $r0
-+ sub $r0, $r3, $r1
-+ sub $r0, $r3, $r2
-+ sub $r0, $r3, $r3
-+ sub $r0, $r3, $r4
-+ sub $r0, $r3, $r5
-+ sub $r0, $r3, $r6
-+ sub $r0, $r3, $r7
-+ sub $r0, $r4, $r0
-+ sub $r0, $r4, $r1
-+ sub $r0, $r4, $r2
-+ sub $r0, $r4, $r3
-+ sub $r0, $r4, $r4
-+ sub $r0, $r4, $r5
-+ sub $r0, $r4, $r6
-+ sub $r0, $r4, $r7
-+ sub $r0, $r5, $r0
-+ sub $r0, $r5, $r1
-+ sub $r0, $r5, $r2
-+ sub $r0, $r5, $r3
-+ sub $r0, $r5, $r4
-+ sub $r0, $r5, $r5
-+ sub $r0, $r5, $r6
-+ sub $r0, $r5, $r7
-+ sub $r0, $r6, $r0
-+ sub $r0, $r6, $r1
-+ sub $r0, $r6, $r2
-+ sub $r0, $r6, $r3
-+ sub $r0, $r6, $r4
-+ sub $r0, $r6, $r5
-+ sub $r0, $r6, $r6
-+ sub $r0, $r6, $r7
-+ sub $r0, $r7, $r0
-+ sub $r0, $r7, $r1
-+ sub $r0, $r7, $r2
-+ sub $r0, $r7, $r3
-+ sub $r0, $r7, $r4
-+ sub $r0, $r7, $r5
-+ sub $r0, $r7, $r6
-+ sub $r0, $r7, $r7
-+ sub $r1, $r0, $r0
-+ sub $r1, $r0, $r1
-+ sub $r1, $r0, $r2
-+ sub $r1, $r0, $r3
-+ sub $r1, $r0, $r4
-+ sub $r1, $r0, $r5
-+ sub $r1, $r0, $r6
-+ sub $r1, $r0, $r7
-+ sub $r1, $r1, $r0
-+ sub $r1, $r1, $r1
-+ sub $r1, $r1, $r2
-+ sub $r1, $r1, $r3
-+ sub $r1, $r1, $r4
-+ sub $r1, $r1, $r5
-+ sub $r1, $r1, $r6
-+ sub $r1, $r1, $r7
-+ sub $r1, $r2, $r0
-+ sub $r1, $r2, $r1
-+ sub $r1, $r2, $r2
-+ sub $r1, $r2, $r3
-+ sub $r1, $r2, $r4
-+ sub $r1, $r2, $r5
-+ sub $r1, $r2, $r6
-+ sub $r1, $r2, $r7
-+ sub $r1, $r3, $r0
-+ sub $r1, $r3, $r1
-+ sub $r1, $r3, $r2
-+ sub $r1, $r3, $r3
-+ sub $r1, $r3, $r4
-+ sub $r1, $r3, $r5
-+ sub $r1, $r3, $r6
-+ sub $r1, $r3, $r7
-+ sub $r1, $r4, $r0
-+ sub $r1, $r4, $r1
-+ sub $r1, $r4, $r2
-+ sub $r1, $r4, $r3
-+ sub $r1, $r4, $r4
-+ sub $r1, $r4, $r5
-+ sub $r1, $r4, $r6
-+ sub $r1, $r4, $r7
-+ sub $r1, $r5, $r0
-+ sub $r1, $r5, $r1
-+ sub $r1, $r5, $r2
-+ sub $r1, $r5, $r3
-+ sub $r1, $r5, $r4
-+ sub $r1, $r5, $r5
-+ sub $r1, $r5, $r6
-+ sub $r1, $r5, $r7
-+ sub $r1, $r6, $r0
-+ sub $r1, $r6, $r1
-+ sub $r1, $r6, $r2
-+ sub $r1, $r6, $r3
-+ sub $r1, $r6, $r4
-+ sub $r1, $r6, $r5
-+ sub $r1, $r6, $r6
-+ sub $r1, $r6, $r7
-+ sub $r1, $r7, $r0
-+ sub $r1, $r7, $r1
-+ sub $r1, $r7, $r2
-+ sub $r1, $r7, $r3
-+ sub $r1, $r7, $r4
-+ sub $r1, $r7, $r5
-+ sub $r1, $r7, $r6
-+ sub $r1, $r7, $r7
-+ sub $r2, $r0, $r0
-+ sub $r2, $r0, $r1
-+ sub $r2, $r0, $r2
-+ sub $r2, $r0, $r3
-+ sub $r2, $r0, $r4
-+ sub $r2, $r0, $r5
-+ sub $r2, $r0, $r6
-+ sub $r2, $r0, $r7
-+ sub $r2, $r1, $r0
-+ sub $r2, $r1, $r1
-+ sub $r2, $r1, $r2
-+ sub $r2, $r1, $r3
-+ sub $r2, $r1, $r4
-+ sub $r2, $r1, $r5
-+ sub $r2, $r1, $r6
-+ sub $r2, $r1, $r7
-+ sub $r2, $r2, $r0
-+ sub $r2, $r2, $r1
-+ sub $r2, $r2, $r2
-+ sub $r2, $r2, $r3
-+ sub $r2, $r2, $r4
-+ sub $r2, $r2, $r5
-+ sub $r2, $r2, $r6
-+ sub $r2, $r2, $r7
-+ sub $r2, $r3, $r0
-+ sub $r2, $r3, $r1
-+ sub $r2, $r3, $r2
-+ sub $r2, $r3, $r3
-+ sub $r2, $r3, $r4
-+ sub $r2, $r3, $r5
-+ sub $r2, $r3, $r6
-+ sub $r2, $r3, $r7
-+ sub $r2, $r4, $r0
-+ sub $r2, $r4, $r1
-+ sub $r2, $r4, $r2
-+ sub $r2, $r4, $r3
-+ sub $r2, $r4, $r4
-+ sub $r2, $r4, $r5
-+ sub $r2, $r4, $r6
-+ sub $r2, $r4, $r7
-+ sub $r2, $r5, $r0
-+ sub $r2, $r5, $r1
-+ sub $r2, $r5, $r2
-+ sub $r2, $r5, $r3
-+ sub $r2, $r5, $r4
-+ sub $r2, $r5, $r5
-+ sub $r2, $r5, $r6
-+ sub $r2, $r5, $r7
-+ sub $r2, $r6, $r0
-+ sub $r2, $r6, $r1
-+ sub $r2, $r6, $r2
-+ sub $r2, $r6, $r3
-+ sub $r2, $r6, $r4
-+ sub $r2, $r6, $r5
-+ sub $r2, $r6, $r6
-+ sub $r2, $r6, $r7
-+ sub $r2, $r7, $r0
-+ sub $r2, $r7, $r1
-+ sub $r2, $r7, $r2
-+ sub $r2, $r7, $r3
-+ sub $r2, $r7, $r4
-+ sub $r2, $r7, $r5
-+ sub $r2, $r7, $r6
-+ sub $r2, $r7, $r7
-+ sub $r3, $r0, $r0
-+ sub $r3, $r0, $r1
-+ sub $r3, $r0, $r2
-+ sub $r3, $r0, $r3
-+ sub $r3, $r0, $r4
-+ sub $r3, $r0, $r5
-+ sub $r3, $r0, $r6
-+ sub $r3, $r0, $r7
-+ sub $r3, $r1, $r0
-+ sub $r3, $r1, $r1
-+ sub $r3, $r1, $r2
-+ sub $r3, $r1, $r3
-+ sub $r3, $r1, $r4
-+ sub $r3, $r1, $r5
-+ sub $r3, $r1, $r6
-+ sub $r3, $r1, $r7
-+ sub $r3, $r2, $r0
-+ sub $r3, $r2, $r1
-+ sub $r3, $r2, $r2
-+ sub $r3, $r2, $r3
-+ sub $r3, $r2, $r4
-+ sub $r3, $r2, $r5
-+ sub $r3, $r2, $r6
-+ sub $r3, $r2, $r7
-+ sub $r3, $r3, $r0
-+ sub $r3, $r3, $r1
-+ sub $r3, $r3, $r2
-+ sub $r3, $r3, $r3
-+ sub $r3, $r3, $r4
-+ sub $r3, $r3, $r5
-+ sub $r3, $r3, $r6
-+ sub $r3, $r3, $r7
-+ sub $r3, $r4, $r0
-+ sub $r3, $r4, $r1
-+ sub $r3, $r4, $r2
-+ sub $r3, $r4, $r3
-+ sub $r3, $r4, $r4
-+ sub $r3, $r4, $r5
-+ sub $r3, $r4, $r6
-+ sub $r3, $r4, $r7
-+ sub $r3, $r5, $r0
-+ sub $r3, $r5, $r1
-+ sub $r3, $r5, $r2
-+ sub $r3, $r5, $r3
-+ sub $r3, $r5, $r4
-+ sub $r3, $r5, $r5
-+ sub $r3, $r5, $r6
-+ sub $r3, $r5, $r7
-+ sub $r3, $r6, $r0
-+ sub $r3, $r6, $r1
-+ sub $r3, $r6, $r2
-+ sub $r3, $r6, $r3
-+ sub $r3, $r6, $r4
-+ sub $r3, $r6, $r5
-+ sub $r3, $r6, $r6
-+ sub $r3, $r6, $r7
-+ sub $r3, $r7, $r0
-+ sub $r3, $r7, $r1
-+ sub $r3, $r7, $r2
-+ sub $r3, $r7, $r3
-+ sub $r3, $r7, $r4
-+ sub $r3, $r7, $r5
-+ sub $r3, $r7, $r6
-+ sub $r3, $r7, $r7
-+ sub $r4, $r0, $r0
-+ sub $r4, $r0, $r1
-+ sub $r4, $r0, $r2
-+ sub $r4, $r0, $r3
-+ sub $r4, $r0, $r4
-+ sub $r4, $r0, $r5
-+ sub $r4, $r0, $r6
-+ sub $r4, $r0, $r7
-+ sub $r4, $r1, $r0
-+ sub $r4, $r1, $r1
-+ sub $r4, $r1, $r2
-+ sub $r4, $r1, $r3
-+ sub $r4, $r1, $r4
-+ sub $r4, $r1, $r5
-+ sub $r4, $r1, $r6
-+ sub $r4, $r1, $r7
-+ sub $r4, $r2, $r0
-+ sub $r4, $r2, $r1
-+ sub $r4, $r2, $r2
-+ sub $r4, $r2, $r3
-+ sub $r4, $r2, $r4
-+ sub $r4, $r2, $r5
-+ sub $r4, $r2, $r6
-+ sub $r4, $r2, $r7
-+ sub $r4, $r3, $r0
-+ sub $r4, $r3, $r1
-+ sub $r4, $r3, $r2
-+ sub $r4, $r3, $r3
-+ sub $r4, $r3, $r4
-+ sub $r4, $r3, $r5
-+ sub $r4, $r3, $r6
-+ sub $r4, $r3, $r7
-+ sub $r4, $r4, $r0
-+ sub $r4, $r4, $r1
-+ sub $r4, $r4, $r2
-+ sub $r4, $r4, $r3
-+ sub $r4, $r4, $r4
-+ sub $r4, $r4, $r5
-+ sub $r4, $r4, $r6
-+ sub $r4, $r4, $r7
-+ sub $r4, $r5, $r0
-+ sub $r4, $r5, $r1
-+ sub $r4, $r5, $r2
-+ sub $r4, $r5, $r3
-+ sub $r4, $r5, $r4
-+ sub $r4, $r5, $r5
-+ sub $r4, $r5, $r6
-+ sub $r4, $r5, $r7
-+ sub $r4, $r6, $r0
-+ sub $r4, $r6, $r1
-+ sub $r4, $r6, $r2
-+ sub $r4, $r6, $r3
-+ sub $r4, $r6, $r4
-+ sub $r4, $r6, $r5
-+ sub $r4, $r6, $r6
-+ sub $r4, $r6, $r7
-+ sub $r4, $r7, $r0
-+ sub $r4, $r7, $r1
-+ sub $r4, $r7, $r2
-+ sub $r4, $r7, $r3
-+ sub $r4, $r7, $r4
-+ sub $r4, $r7, $r5
-+ sub $r4, $r7, $r6
-+ sub $r4, $r7, $r7
-+ sub $r5, $r0, $r0
-+ sub $r5, $r0, $r1
-+ sub $r5, $r0, $r2
-+ sub $r5, $r0, $r3
-+ sub $r5, $r0, $r4
-+ sub $r5, $r0, $r5
-+ sub $r5, $r0, $r6
-+ sub $r5, $r0, $r7
-+ sub $r5, $r1, $r0
-+ sub $r5, $r1, $r1
-+ sub $r5, $r1, $r2
-+ sub $r5, $r1, $r3
-+ sub $r5, $r1, $r4
-+ sub $r5, $r1, $r5
-+ sub $r5, $r1, $r6
-+ sub $r5, $r1, $r7
-+ sub $r5, $r2, $r0
-+ sub $r5, $r2, $r1
-+ sub $r5, $r2, $r2
-+ sub $r5, $r2, $r3
-+ sub $r5, $r2, $r4
-+ sub $r5, $r2, $r5
-+ sub $r5, $r2, $r6
-+ sub $r5, $r2, $r7
-+ sub $r5, $r3, $r0
-+ sub $r5, $r3, $r1
-+ sub $r5, $r3, $r2
-+ sub $r5, $r3, $r3
-+ sub $r5, $r3, $r4
-+ sub $r5, $r3, $r5
-+ sub $r5, $r3, $r6
-+ sub $r5, $r3, $r7
-+ sub $r5, $r4, $r0
-+ sub $r5, $r4, $r1
-+ sub $r5, $r4, $r2
-+ sub $r5, $r4, $r3
-+ sub $r5, $r4, $r4
-+ sub $r5, $r4, $r5
-+ sub $r5, $r4, $r6
-+ sub $r5, $r4, $r7
-+ sub $r5, $r5, $r0
-+ sub $r5, $r5, $r1
-+ sub $r5, $r5, $r2
-+ sub $r5, $r5, $r3
-+ sub $r5, $r5, $r4
-+ sub $r5, $r5, $r5
-+ sub $r5, $r5, $r6
-+ sub $r5, $r5, $r7
-+ sub $r5, $r6, $r0
-+ sub $r5, $r6, $r1
-+ sub $r5, $r6, $r2
-+ sub $r5, $r6, $r3
-+ sub $r5, $r6, $r4
-+ sub $r5, $r6, $r5
-+ sub $r5, $r6, $r6
-+ sub $r5, $r6, $r7
-+ sub $r5, $r7, $r0
-+ sub $r5, $r7, $r1
-+ sub $r5, $r7, $r2
-+ sub $r5, $r7, $r3
-+ sub $r5, $r7, $r4
-+ sub $r5, $r7, $r5
-+ sub $r5, $r7, $r6
-+ sub $r5, $r7, $r7
-+ sub $r6, $r0, $r0
-+ sub $r6, $r0, $r1
-+ sub $r6, $r0, $r2
-+ sub $r6, $r0, $r3
-+ sub $r6, $r0, $r4
-+ sub $r6, $r0, $r5
-+ sub $r6, $r0, $r6
-+ sub $r6, $r0, $r7
-+ sub $r6, $r1, $r0
-+ sub $r6, $r1, $r1
-+ sub $r6, $r1, $r2
-+ sub $r6, $r1, $r3
-+ sub $r6, $r1, $r4
-+ sub $r6, $r1, $r5
-+ sub $r6, $r1, $r6
-+ sub $r6, $r1, $r7
-+ sub $r6, $r2, $r0
-+ sub $r6, $r2, $r1
-+ sub $r6, $r2, $r2
-+ sub $r6, $r2, $r3
-+ sub $r6, $r2, $r4
-+ sub $r6, $r2, $r5
-+ sub $r6, $r2, $r6
-+ sub $r6, $r2, $r7
-+ sub $r6, $r3, $r0
-+ sub $r6, $r3, $r1
-+ sub $r6, $r3, $r2
-+ sub $r6, $r3, $r3
-+ sub $r6, $r3, $r4
-+ sub $r6, $r3, $r5
-+ sub $r6, $r3, $r6
-+ sub $r6, $r3, $r7
-+ sub $r6, $r4, $r0
-+ sub $r6, $r4, $r1
-+ sub $r6, $r4, $r2
-+ sub $r6, $r4, $r3
-+ sub $r6, $r4, $r4
-+ sub $r6, $r4, $r5
-+ sub $r6, $r4, $r6
-+ sub $r6, $r4, $r7
-+ sub $r6, $r5, $r0
-+ sub $r6, $r5, $r1
-+ sub $r6, $r5, $r2
-+ sub $r6, $r5, $r3
-+ sub $r6, $r5, $r4
-+ sub $r6, $r5, $r5
-+ sub $r6, $r5, $r6
-+ sub $r6, $r5, $r7
-+ sub $r6, $r6, $r0
-+ sub $r6, $r6, $r1
-+ sub $r6, $r6, $r2
-+ sub $r6, $r6, $r3
-+ sub $r6, $r6, $r4
-+ sub $r6, $r6, $r5
-+ sub $r6, $r6, $r6
-+ sub $r6, $r6, $r7
-+ sub $r6, $r7, $r0
-+ sub $r6, $r7, $r1
-+ sub $r6, $r7, $r2
-+ sub $r6, $r7, $r3
-+ sub $r6, $r7, $r4
-+ sub $r6, $r7, $r5
-+ sub $r6, $r7, $r6
-+ sub $r6, $r7, $r7
-+ sub $r7, $r0, $r0
-+ sub $r7, $r0, $r1
-+ sub $r7, $r0, $r2
-+ sub $r7, $r0, $r3
-+ sub $r7, $r0, $r4
-+ sub $r7, $r0, $r5
-+ sub $r7, $r0, $r6
-+ sub $r7, $r0, $r7
-+ sub $r7, $r1, $r0
-+ sub $r7, $r1, $r1
-+ sub $r7, $r1, $r2
-+ sub $r7, $r1, $r3
-+ sub $r7, $r1, $r4
-+ sub $r7, $r1, $r5
-+ sub $r7, $r1, $r6
-+ sub $r7, $r1, $r7
-+ sub $r7, $r2, $r0
-+ sub $r7, $r2, $r1
-+ sub $r7, $r2, $r2
-+ sub $r7, $r2, $r3
-+ sub $r7, $r2, $r4
-+ sub $r7, $r2, $r5
-+ sub $r7, $r2, $r6
-+ sub $r7, $r2, $r7
-+ sub $r7, $r3, $r0
-+ sub $r7, $r3, $r1
-+ sub $r7, $r3, $r2
-+ sub $r7, $r3, $r3
-+ sub $r7, $r3, $r4
-+ sub $r7, $r3, $r5
-+ sub $r7, $r3, $r6
-+ sub $r7, $r3, $r7
-+ sub $r7, $r4, $r0
-+ sub $r7, $r4, $r1
-+ sub $r7, $r4, $r2
-+ sub $r7, $r4, $r3
-+ sub $r7, $r4, $r4
-+ sub $r7, $r4, $r5
-+ sub $r7, $r4, $r6
-+ sub $r7, $r4, $r7
-+ sub $r7, $r5, $r0
-+ sub $r7, $r5, $r1
-+ sub $r7, $r5, $r2
-+ sub $r7, $r5, $r3
-+ sub $r7, $r5, $r4
-+ sub $r7, $r5, $r5
-+ sub $r7, $r5, $r6
-+ sub $r7, $r5, $r7
-+ sub $r7, $r6, $r0
-+ sub $r7, $r6, $r1
-+ sub $r7, $r6, $r2
-+ sub $r7, $r6, $r3
-+ sub $r7, $r6, $r4
-+ sub $r7, $r6, $r5
-+ sub $r7, $r6, $r6
-+ sub $r7, $r6, $r7
-+ sub $r7, $r7, $r0
-+ sub $r7, $r7, $r1
-+ sub $r7, $r7, $r2
-+ sub $r7, $r7, $r3
-+ sub $r7, $r7, $r4
-+ sub $r7, $r7, $r5
-+ sub $r7, $r7, $r6
-+ sub $r7, $r7, $r7
-+ addi $r0, $r0, 0
-+ addi $r0, $r0, 1
-+ addi $r0, $r0, 2
-+ addi $r0, $r0, 3
-+ addi $r0, $r0, 4
-+ addi $r0, $r0, 5
-+ addi $r0, $r0, 6
-+ addi $r0, $r0, 7
-+ addi $r0, $r1, 0
-+ addi $r0, $r1, 1
-+ addi $r0, $r1, 2
-+ addi $r0, $r1, 3
-+ addi $r0, $r1, 4
-+ addi $r0, $r1, 5
-+ addi $r0, $r1, 6
-+ addi $r0, $r1, 7
-+ addi $r0, $r2, 0
-+ addi $r0, $r2, 1
-+ addi $r0, $r2, 2
-+ addi $r0, $r2, 3
-+ addi $r0, $r2, 4
-+ addi $r0, $r2, 5
-+ addi $r0, $r2, 6
-+ addi $r0, $r2, 7
-+ addi $r0, $r3, 0
-+ addi $r0, $r3, 1
-+ addi $r0, $r3, 2
-+ addi $r0, $r3, 3
-+ addi $r0, $r3, 4
-+ addi $r0, $r3, 5
-+ addi $r0, $r3, 6
-+ addi $r0, $r3, 7
-+ addi $r0, $r4, 0
-+ addi $r0, $r4, 1
-+ addi $r0, $r4, 2
-+ addi $r0, $r4, 3
-+ addi $r0, $r4, 4
-+ addi $r0, $r4, 5
-+ addi $r0, $r4, 6
-+ addi $r0, $r4, 7
-+ addi $r0, $r5, 0
-+ addi $r0, $r5, 1
-+ addi $r0, $r5, 2
-+ addi $r0, $r5, 3
-+ addi $r0, $r5, 4
-+ addi $r0, $r5, 5
-+ addi $r0, $r5, 6
-+ addi $r0, $r5, 7
-+ addi $r0, $r6, 0
-+ addi $r0, $r6, 1
-+ addi $r0, $r6, 2
-+ addi $r0, $r6, 3
-+ addi $r0, $r6, 4
-+ addi $r0, $r6, 5
-+ addi $r0, $r6, 6
-+ addi $r0, $r6, 7
-+ addi $r0, $r7, 0
-+ addi $r0, $r7, 1
-+ addi $r0, $r7, 2
-+ addi $r0, $r7, 3
-+ addi $r0, $r7, 4
-+ addi $r0, $r7, 5
-+ addi $r0, $r7, 6
-+ addi $r0, $r7, 7
-+ addi $r1, $r0, 0
-+ addi $r1, $r0, 1
-+ addi $r1, $r0, 2
-+ addi $r1, $r0, 3
-+ addi $r1, $r0, 4
-+ addi $r1, $r0, 5
-+ addi $r1, $r0, 6
-+ addi $r1, $r0, 7
-+ addi $r1, $r1, 0
-+ addi $r1, $r1, 1
-+ addi $r1, $r1, 2
-+ addi $r1, $r1, 3
-+ addi $r1, $r1, 4
-+ addi $r1, $r1, 5
-+ addi $r1, $r1, 6
-+ addi $r1, $r1, 7
-+ addi $r1, $r2, 0
-+ addi $r1, $r2, 1
-+ addi $r1, $r2, 2
-+ addi $r1, $r2, 3
-+ addi $r1, $r2, 4
-+ addi $r1, $r2, 5
-+ addi $r1, $r2, 6
-+ addi $r1, $r2, 7
-+ addi $r1, $r3, 0
-+ addi $r1, $r3, 1
-+ addi $r1, $r3, 2
-+ addi $r1, $r3, 3
-+ addi $r1, $r3, 4
-+ addi $r1, $r3, 5
-+ addi $r1, $r3, 6
-+ addi $r1, $r3, 7
-+ addi $r1, $r4, 0
-+ addi $r1, $r4, 1
-+ addi $r1, $r4, 2
-+ addi $r1, $r4, 3
-+ addi $r1, $r4, 4
-+ addi $r1, $r4, 5
-+ addi $r1, $r4, 6
-+ addi $r1, $r4, 7
-+ addi $r1, $r5, 0
-+ addi $r1, $r5, 1
-+ addi $r1, $r5, 2
-+ addi $r1, $r5, 3
-+ addi $r1, $r5, 4
-+ addi $r1, $r5, 5
-+ addi $r1, $r5, 6
-+ addi $r1, $r5, 7
-+ addi $r1, $r6, 0
-+ addi $r1, $r6, 1
-+ addi $r1, $r6, 2
-+ addi $r1, $r6, 3
-+ addi $r1, $r6, 4
-+ addi $r1, $r6, 5
-+ addi $r1, $r6, 6
-+ addi $r1, $r6, 7
-+ addi $r1, $r7, 0
-+ addi $r1, $r7, 1
-+ addi $r1, $r7, 2
-+ addi $r1, $r7, 3
-+ addi $r1, $r7, 4
-+ addi $r1, $r7, 5
-+ addi $r1, $r7, 6
-+ addi $r1, $r7, 7
-+ addi $r2, $r0, 0
-+ addi $r2, $r0, 1
-+ addi $r2, $r0, 2
-+ addi $r2, $r0, 3
-+ addi $r2, $r0, 4
-+ addi $r2, $r0, 5
-+ addi $r2, $r0, 6
-+ addi $r2, $r0, 7
-+ addi $r2, $r1, 0
-+ addi $r2, $r1, 1
-+ addi $r2, $r1, 2
-+ addi $r2, $r1, 3
-+ addi $r2, $r1, 4
-+ addi $r2, $r1, 5
-+ addi $r2, $r1, 6
-+ addi $r2, $r1, 7
-+ addi $r2, $r2, 0
-+ addi $r2, $r2, 1
-+ addi $r2, $r2, 2
-+ addi $r2, $r2, 3
-+ addi $r2, $r2, 4
-+ addi $r2, $r2, 5
-+ addi $r2, $r2, 6
-+ addi $r2, $r2, 7
-+ addi $r2, $r3, 0
-+ addi $r2, $r3, 1
-+ addi $r2, $r3, 2
-+ addi $r2, $r3, 3
-+ addi $r2, $r3, 4
-+ addi $r2, $r3, 5
-+ addi $r2, $r3, 6
-+ addi $r2, $r3, 7
-+ addi $r2, $r4, 0
-+ addi $r2, $r4, 1
-+ addi $r2, $r4, 2
-+ addi $r2, $r4, 3
-+ addi $r2, $r4, 4
-+ addi $r2, $r4, 5
-+ addi $r2, $r4, 6
-+ addi $r2, $r4, 7
-+ addi $r2, $r5, 0
-+ addi $r2, $r5, 1
-+ addi $r2, $r5, 2
-+ addi $r2, $r5, 3
-+ addi $r2, $r5, 4
-+ addi $r2, $r5, 5
-+ addi $r2, $r5, 6
-+ addi $r2, $r5, 7
-+ addi $r2, $r6, 0
-+ addi $r2, $r6, 1
-+ addi $r2, $r6, 2
-+ addi $r2, $r6, 3
-+ addi $r2, $r6, 4
-+ addi $r2, $r6, 5
-+ addi $r2, $r6, 6
-+ addi $r2, $r6, 7
-+ addi $r2, $r7, 0
-+ addi $r2, $r7, 1
-+ addi $r2, $r7, 2
-+ addi $r2, $r7, 3
-+ addi $r2, $r7, 4
-+ addi $r2, $r7, 5
-+ addi $r2, $r7, 6
-+ addi $r2, $r7, 7
-+ addi $r3, $r0, 0
-+ addi $r3, $r0, 1
-+ addi $r3, $r0, 2
-+ addi $r3, $r0, 3
-+ addi $r3, $r0, 4
-+ addi $r3, $r0, 5
-+ addi $r3, $r0, 6
-+ addi $r3, $r0, 7
-+ addi $r3, $r1, 0
-+ addi $r3, $r1, 1
-+ addi $r3, $r1, 2
-+ addi $r3, $r1, 3
-+ addi $r3, $r1, 4
-+ addi $r3, $r1, 5
-+ addi $r3, $r1, 6
-+ addi $r3, $r1, 7
-+ addi $r3, $r2, 0
-+ addi $r3, $r2, 1
-+ addi $r3, $r2, 2
-+ addi $r3, $r2, 3
-+ addi $r3, $r2, 4
-+ addi $r3, $r2, 5
-+ addi $r3, $r2, 6
-+ addi $r3, $r2, 7
-+ addi $r3, $r3, 0
-+ addi $r3, $r3, 1
-+ addi $r3, $r3, 2
-+ addi $r3, $r3, 3
-+ addi $r3, $r3, 4
-+ addi $r3, $r3, 5
-+ addi $r3, $r3, 6
-+ addi $r3, $r3, 7
-+ addi $r3, $r4, 0
-+ addi $r3, $r4, 1
-+ addi $r3, $r4, 2
-+ addi $r3, $r4, 3
-+ addi $r3, $r4, 4
-+ addi $r3, $r4, 5
-+ addi $r3, $r4, 6
-+ addi $r3, $r4, 7
-+ addi $r3, $r5, 0
-+ addi $r3, $r5, 1
-+ addi $r3, $r5, 2
-+ addi $r3, $r5, 3
-+ addi $r3, $r5, 4
-+ addi $r3, $r5, 5
-+ addi $r3, $r5, 6
-+ addi $r3, $r5, 7
-+ addi $r3, $r6, 0
-+ addi $r3, $r6, 1
-+ addi $r3, $r6, 2
-+ addi $r3, $r6, 3
-+ addi $r3, $r6, 4
-+ addi $r3, $r6, 5
-+ addi $r3, $r6, 6
-+ addi $r3, $r6, 7
-+ addi $r3, $r7, 0
-+ addi $r3, $r7, 1
-+ addi $r3, $r7, 2
-+ addi $r3, $r7, 3
-+ addi $r3, $r7, 4
-+ addi $r3, $r7, 5
-+ addi $r3, $r7, 6
-+ addi $r3, $r7, 7
-+ addi $r4, $r0, 0
-+ addi $r4, $r0, 1
-+ addi $r4, $r0, 2
-+ addi $r4, $r0, 3
-+ addi $r4, $r0, 4
-+ addi $r4, $r0, 5
-+ addi $r4, $r0, 6
-+ addi $r4, $r0, 7
-+ addi $r4, $r1, 0
-+ addi $r4, $r1, 1
-+ addi $r4, $r1, 2
-+ addi $r4, $r1, 3
-+ addi $r4, $r1, 4
-+ addi $r4, $r1, 5
-+ addi $r4, $r1, 6
-+ addi $r4, $r1, 7
-+ addi $r4, $r2, 0
-+ addi $r4, $r2, 1
-+ addi $r4, $r2, 2
-+ addi $r4, $r2, 3
-+ addi $r4, $r2, 4
-+ addi $r4, $r2, 5
-+ addi $r4, $r2, 6
-+ addi $r4, $r2, 7
-+ addi $r4, $r3, 0
-+ addi $r4, $r3, 1
-+ addi $r4, $r3, 2
-+ addi $r4, $r3, 3
-+ addi $r4, $r3, 4
-+ addi $r4, $r3, 5
-+ addi $r4, $r3, 6
-+ addi $r4, $r3, 7
-+ addi $r4, $r4, 0
-+ addi $r4, $r4, 1
-+ addi $r4, $r4, 2
-+ addi $r4, $r4, 3
-+ addi $r4, $r4, 4
-+ addi $r4, $r4, 5
-+ addi $r4, $r4, 6
-+ addi $r4, $r4, 7
-+ addi $r4, $r5, 0
-+ addi $r4, $r5, 1
-+ addi $r4, $r5, 2
-+ addi $r4, $r5, 3
-+ addi $r4, $r5, 4
-+ addi $r4, $r5, 5
-+ addi $r4, $r5, 6
-+ addi $r4, $r5, 7
-+ addi $r4, $r6, 0
-+ addi $r4, $r6, 1
-+ addi $r4, $r6, 2
-+ addi $r4, $r6, 3
-+ addi $r4, $r6, 4
-+ addi $r4, $r6, 5
-+ addi $r4, $r6, 6
-+ addi $r4, $r6, 7
-+ addi $r4, $r7, 0
-+ addi $r4, $r7, 1
-+ addi $r4, $r7, 2
-+ addi $r4, $r7, 3
-+ addi $r4, $r7, 4
-+ addi $r4, $r7, 5
-+ addi $r4, $r7, 6
-+ addi $r4, $r7, 7
-+ addi $r5, $r0, 0
-+ addi $r5, $r0, 1
-+ addi $r5, $r0, 2
-+ addi $r5, $r0, 3
-+ addi $r5, $r0, 4
-+ addi $r5, $r0, 5
-+ addi $r5, $r0, 6
-+ addi $r5, $r0, 7
-+ addi $r5, $r1, 0
-+ addi $r5, $r1, 1
-+ addi $r5, $r1, 2
-+ addi $r5, $r1, 3
-+ addi $r5, $r1, 4
-+ addi $r5, $r1, 5
-+ addi $r5, $r1, 6
-+ addi $r5, $r1, 7
-+ addi $r5, $r2, 0
-+ addi $r5, $r2, 1
-+ addi $r5, $r2, 2
-+ addi $r5, $r2, 3
-+ addi $r5, $r2, 4
-+ addi $r5, $r2, 5
-+ addi $r5, $r2, 6
-+ addi $r5, $r2, 7
-+ addi $r5, $r3, 0
-+ addi $r5, $r3, 1
-+ addi $r5, $r3, 2
-+ addi $r5, $r3, 3
-+ addi $r5, $r3, 4
-+ addi $r5, $r3, 5
-+ addi $r5, $r3, 6
-+ addi $r5, $r3, 7
-+ addi $r5, $r4, 0
-+ addi $r5, $r4, 1
-+ addi $r5, $r4, 2
-+ addi $r5, $r4, 3
-+ addi $r5, $r4, 4
-+ addi $r5, $r4, 5
-+ addi $r5, $r4, 6
-+ addi $r5, $r4, 7
-+ addi $r5, $r5, 0
-+ addi $r5, $r5, 1
-+ addi $r5, $r5, 2
-+ addi $r5, $r5, 3
-+ addi $r5, $r5, 4
-+ addi $r5, $r5, 5
-+ addi $r5, $r5, 6
-+ addi $r5, $r5, 7
-+ addi $r5, $r6, 0
-+ addi $r5, $r6, 1
-+ addi $r5, $r6, 2
-+ addi $r5, $r6, 3
-+ addi $r5, $r6, 4
-+ addi $r5, $r6, 5
-+ addi $r5, $r6, 6
-+ addi $r5, $r6, 7
-+ addi $r5, $r7, 0
-+ addi $r5, $r7, 1
-+ addi $r5, $r7, 2
-+ addi $r5, $r7, 3
-+ addi $r5, $r7, 4
-+ addi $r5, $r7, 5
-+ addi $r5, $r7, 6
-+ addi $r5, $r7, 7
-+ addi $r6, $r0, 0
-+ addi $r6, $r0, 1
-+ addi $r6, $r0, 2
-+ addi $r6, $r0, 3
-+ addi $r6, $r0, 4
-+ addi $r6, $r0, 5
-+ addi $r6, $r0, 6
-+ addi $r6, $r0, 7
-+ addi $r6, $r1, 0
-+ addi $r6, $r1, 1
-+ addi $r6, $r1, 2
-+ addi $r6, $r1, 3
-+ addi $r6, $r1, 4
-+ addi $r6, $r1, 5
-+ addi $r6, $r1, 6
-+ addi $r6, $r1, 7
-+ addi $r6, $r2, 0
-+ addi $r6, $r2, 1
-+ addi $r6, $r2, 2
-+ addi $r6, $r2, 3
-+ addi $r6, $r2, 4
-+ addi $r6, $r2, 5
-+ addi $r6, $r2, 6
-+ addi $r6, $r2, 7
-+ addi $r6, $r3, 0
-+ addi $r6, $r3, 1
-+ addi $r6, $r3, 2
-+ addi $r6, $r3, 3
-+ addi $r6, $r3, 4
-+ addi $r6, $r3, 5
-+ addi $r6, $r3, 6
-+ addi $r6, $r3, 7
-+ addi $r6, $r4, 0
-+ addi $r6, $r4, 1
-+ addi $r6, $r4, 2
-+ addi $r6, $r4, 3
-+ addi $r6, $r4, 4
-+ addi $r6, $r4, 5
-+ addi $r6, $r4, 6
-+ addi $r6, $r4, 7
-+ addi $r6, $r5, 0
-+ addi $r6, $r5, 1
-+ addi $r6, $r5, 2
-+ addi $r6, $r5, 3
-+ addi $r6, $r5, 4
-+ addi $r6, $r5, 5
-+ addi $r6, $r5, 6
-+ addi $r6, $r5, 7
-+ addi $r6, $r6, 0
-+ addi $r6, $r6, 1
-+ addi $r6, $r6, 2
-+ addi $r6, $r6, 3
-+ addi $r6, $r6, 4
-+ addi $r6, $r6, 5
-+ addi $r6, $r6, 6
-+ addi $r6, $r6, 7
-+ addi $r6, $r7, 0
-+ addi $r6, $r7, 1
-+ addi $r6, $r7, 2
-+ addi $r6, $r7, 3
-+ addi $r6, $r7, 4
-+ addi $r6, $r7, 5
-+ addi $r6, $r7, 6
-+ addi $r6, $r7, 7
-+ addi $r7, $r0, 0
-+ addi $r7, $r0, 1
-+ addi $r7, $r0, 2
-+ addi $r7, $r0, 3
-+ addi $r7, $r0, 4
-+ addi $r7, $r0, 5
-+ addi $r7, $r0, 6
-+ addi $r7, $r0, 7
-+ addi $r7, $r1, 0
-+ addi $r7, $r1, 1
-+ addi $r7, $r1, 2
-+ addi $r7, $r1, 3
-+ addi $r7, $r1, 4
-+ addi $r7, $r1, 5
-+ addi $r7, $r1, 6
-+ addi $r7, $r1, 7
-+ addi $r7, $r2, 0
-+ addi $r7, $r2, 1
-+ addi $r7, $r2, 2
-+ addi $r7, $r2, 3
-+ addi $r7, $r2, 4
-+ addi $r7, $r2, 5
-+ addi $r7, $r2, 6
-+ addi $r7, $r2, 7
-+ addi $r7, $r3, 0
-+ addi $r7, $r3, 1
-+ addi $r7, $r3, 2
-+ addi $r7, $r3, 3
-+ addi $r7, $r3, 4
-+ addi $r7, $r3, 5
-+ addi $r7, $r3, 6
-+ addi $r7, $r3, 7
-+ addi $r7, $r4, 0
-+ addi $r7, $r4, 1
-+ addi $r7, $r4, 2
-+ addi $r7, $r4, 3
-+ addi $r7, $r4, 4
-+ addi $r7, $r4, 5
-+ addi $r7, $r4, 6
-+ addi $r7, $r4, 7
-+ addi $r7, $r5, 0
-+ addi $r7, $r5, 1
-+ addi $r7, $r5, 2
-+ addi $r7, $r5, 3
-+ addi $r7, $r5, 4
-+ addi $r7, $r5, 5
-+ addi $r7, $r5, 6
-+ addi $r7, $r5, 7
-+ addi $r7, $r6, 0
-+ addi $r7, $r6, 1
-+ addi $r7, $r6, 2
-+ addi $r7, $r6, 3
-+ addi $r7, $r6, 4
-+ addi $r7, $r6, 5
-+ addi $r7, $r6, 6
-+ addi $r7, $r6, 7
-+ addi $r7, $r7, 0
-+ addi $r7, $r7, 1
-+ addi $r7, $r7, 2
-+ addi $r7, $r7, 3
-+ addi $r7, $r7, 4
-+ addi $r7, $r7, 5
-+ addi $r7, $r7, 6
-+ addi $r7, $r7, 7
-+ addi $r0, $r0, 0
-+ addi $r0, $r0, 1
-+ addi $r0, $r0, 2
-+ addi $r0, $r0, 3
-+ addi $r0, $r0, 4
-+ addi $r0, $r0, 5
-+ addi $r0, $r0, 6
-+ addi $r0, $r0, 7
-+ addi $r0, $r1, 0
-+ addi $r0, $r1, 1
-+ addi $r0, $r1, 2
-+ addi $r0, $r1, 3
-+ addi $r0, $r1, 4
-+ addi $r0, $r1, 5
-+ addi $r0, $r1, 6
-+ addi $r0, $r1, 7
-+ addi $r0, $r2, 0
-+ addi $r0, $r2, 1
-+ addi $r0, $r2, 2
-+ addi $r0, $r2, 3
-+ addi $r0, $r2, 4
-+ addi $r0, $r2, 5
-+ addi $r0, $r2, 6
-+ addi $r0, $r2, 7
-+ addi $r0, $r3, 0
-+ addi $r0, $r3, 1
-+ addi $r0, $r3, 2
-+ addi $r0, $r3, 3
-+ addi $r0, $r3, 4
-+ addi $r0, $r3, 5
-+ addi $r0, $r3, 6
-+ addi $r0, $r3, 7
-+ addi $r0, $r4, 0
-+ addi $r0, $r4, 1
-+ addi $r0, $r4, 2
-+ addi $r0, $r4, 3
-+ addi $r0, $r4, 4
-+ addi $r0, $r4, 5
-+ addi $r0, $r4, 6
-+ addi $r0, $r4, 7
-+ addi $r0, $r5, 0
-+ addi $r0, $r5, 1
-+ addi $r0, $r5, 2
-+ addi $r0, $r5, 3
-+ addi $r0, $r5, 4
-+ addi $r0, $r5, 5
-+ addi $r0, $r5, 6
-+ addi $r0, $r5, 7
-+ addi $r0, $r6, 0
-+ addi $r0, $r6, 1
-+ addi $r0, $r6, 2
-+ addi $r0, $r6, 3
-+ addi $r0, $r6, 4
-+ addi $r0, $r6, 5
-+ addi $r0, $r6, 6
-+ addi $r0, $r6, 7
-+ addi $r0, $r7, 0
-+ addi $r0, $r7, 1
-+ addi $r0, $r7, 2
-+ addi $r0, $r7, 3
-+ addi $r0, $r7, 4
-+ addi $r0, $r7, 5
-+ addi $r0, $r7, 6
-+ addi $r0, $r7, 7
-+ addi $r1, $r0, 0
-+ addi $r1, $r0, 1
-+ addi $r1, $r0, 2
-+ addi $r1, $r0, 3
-+ addi $r1, $r0, 4
-+ addi $r1, $r0, 5
-+ addi $r1, $r0, 6
-+ addi $r1, $r0, 7
-+ addi $r1, $r1, 0
-+ addi $r1, $r1, 1
-+ addi $r1, $r1, 2
-+ addi $r1, $r1, 3
-+ addi $r1, $r1, 4
-+ addi $r1, $r1, 5
-+ addi $r1, $r1, 6
-+ addi $r1, $r1, 7
-+ addi $r1, $r2, 0
-+ addi $r1, $r2, 1
-+ addi $r1, $r2, 2
-+ addi $r1, $r2, 3
-+ addi $r1, $r2, 4
-+ addi $r1, $r2, 5
-+ addi $r1, $r2, 6
-+ addi $r1, $r2, 7
-+ addi $r1, $r3, 0
-+ addi $r1, $r3, 1
-+ addi $r1, $r3, 2
-+ addi $r1, $r3, 3
-+ addi $r1, $r3, 4
-+ addi $r1, $r3, 5
-+ addi $r1, $r3, 6
-+ addi $r1, $r3, 7
-+ addi $r1, $r4, 0
-+ addi $r1, $r4, 1
-+ addi $r1, $r4, 2
-+ addi $r1, $r4, 3
-+ addi $r1, $r4, 4
-+ addi $r1, $r4, 5
-+ addi $r1, $r4, 6
-+ addi $r1, $r4, 7
-+ addi $r1, $r5, 0
-+ addi $r1, $r5, 1
-+ addi $r1, $r5, 2
-+ addi $r1, $r5, 3
-+ addi $r1, $r5, 4
-+ addi $r1, $r5, 5
-+ addi $r1, $r5, 6
-+ addi $r1, $r5, 7
-+ addi $r1, $r6, 0
-+ addi $r1, $r6, 1
-+ addi $r1, $r6, 2
-+ addi $r1, $r6, 3
-+ addi $r1, $r6, 4
-+ addi $r1, $r6, 5
-+ addi $r1, $r6, 6
-+ addi $r1, $r6, 7
-+ addi $r1, $r7, 0
-+ addi $r1, $r7, 1
-+ addi $r1, $r7, 2
-+ addi $r1, $r7, 3
-+ addi $r1, $r7, 4
-+ addi $r1, $r7, 5
-+ addi $r1, $r7, 6
-+ addi $r1, $r7, 7
-+ addi $r2, $r0, 0
-+ addi $r2, $r0, 1
-+ addi $r2, $r0, 2
-+ addi $r2, $r0, 3
-+ addi $r2, $r0, 4
-+ addi $r2, $r0, 5
-+ addi $r2, $r0, 6
-+ addi $r2, $r0, 7
-+ addi $r2, $r1, 0
-+ addi $r2, $r1, 1
-+ addi $r2, $r1, 2
-+ addi $r2, $r1, 3
-+ addi $r2, $r1, 4
-+ addi $r2, $r1, 5
-+ addi $r2, $r1, 6
-+ addi $r2, $r1, 7
-+ addi $r2, $r2, 0
-+ addi $r2, $r2, 1
-+ addi $r2, $r2, 2
-+ addi $r2, $r2, 3
-+ addi $r2, $r2, 4
-+ addi $r2, $r2, 5
-+ addi $r2, $r2, 6
-+ addi $r2, $r2, 7
-+ addi $r2, $r3, 0
-+ addi $r2, $r3, 1
-+ addi $r2, $r3, 2
-+ addi $r2, $r3, 3
-+ addi $r2, $r3, 4
-+ addi $r2, $r3, 5
-+ addi $r2, $r3, 6
-+ addi $r2, $r3, 7
-+ addi $r2, $r4, 0
-+ addi $r2, $r4, 1
-+ addi $r2, $r4, 2
-+ addi $r2, $r4, 3
-+ addi $r2, $r4, 4
-+ addi $r2, $r4, 5
-+ addi $r2, $r4, 6
-+ addi $r2, $r4, 7
-+ addi $r2, $r5, 0
-+ addi $r2, $r5, 1
-+ addi $r2, $r5, 2
-+ addi $r2, $r5, 3
-+ addi $r2, $r5, 4
-+ addi $r2, $r5, 5
-+ addi $r2, $r5, 6
-+ addi $r2, $r5, 7
-+ addi $r2, $r6, 0
-+ addi $r2, $r6, 1
-+ addi $r2, $r6, 2
-+ addi $r2, $r6, 3
-+ addi $r2, $r6, 4
-+ addi $r2, $r6, 5
-+ addi $r2, $r6, 6
-+ addi $r2, $r6, 7
-+ addi $r2, $r7, 0
-+ addi $r2, $r7, 1
-+ addi $r2, $r7, 2
-+ addi $r2, $r7, 3
-+ addi $r2, $r7, 4
-+ addi $r2, $r7, 5
-+ addi $r2, $r7, 6
-+ addi $r2, $r7, 7
-+ addi $r3, $r0, 0
-+ addi $r3, $r0, 1
-+ addi $r3, $r0, 2
-+ addi $r3, $r0, 3
-+ addi $r3, $r0, 4
-+ addi $r3, $r0, 5
-+ addi $r3, $r0, 6
-+ addi $r3, $r0, 7
-+ addi $r3, $r1, 0
-+ addi $r3, $r1, 1
-+ addi $r3, $r1, 2
-+ addi $r3, $r1, 3
-+ addi $r3, $r1, 4
-+ addi $r3, $r1, 5
-+ addi $r3, $r1, 6
-+ addi $r3, $r1, 7
-+ addi $r3, $r2, 0
-+ addi $r3, $r2, 1
-+ addi $r3, $r2, 2
-+ addi $r3, $r2, 3
-+ addi $r3, $r2, 4
-+ addi $r3, $r2, 5
-+ addi $r3, $r2, 6
-+ addi $r3, $r2, 7
-+ addi $r3, $r3, 0
-+ addi $r3, $r3, 1
-+ addi $r3, $r3, 2
-+ addi $r3, $r3, 3
-+ addi $r3, $r3, 4
-+ addi $r3, $r3, 5
-+ addi $r3, $r3, 6
-+ addi $r3, $r3, 7
-+ addi $r3, $r4, 0
-+ addi $r3, $r4, 1
-+ addi $r3, $r4, 2
-+ addi $r3, $r4, 3
-+ addi $r3, $r4, 4
-+ addi $r3, $r4, 5
-+ addi $r3, $r4, 6
-+ addi $r3, $r4, 7
-+ addi $r3, $r5, 0
-+ addi $r3, $r5, 1
-+ addi $r3, $r5, 2
-+ addi $r3, $r5, 3
-+ addi $r3, $r5, 4
-+ addi $r3, $r5, 5
-+ addi $r3, $r5, 6
-+ addi $r3, $r5, 7
-+ addi $r3, $r6, 0
-+ addi $r3, $r6, 1
-+ addi $r3, $r6, 2
-+ addi $r3, $r6, 3
-+ addi $r3, $r6, 4
-+ addi $r3, $r6, 5
-+ addi $r3, $r6, 6
-+ addi $r3, $r6, 7
-+ addi $r3, $r7, 0
-+ addi $r3, $r7, 1
-+ addi $r3, $r7, 2
-+ addi $r3, $r7, 3
-+ addi $r3, $r7, 4
-+ addi $r3, $r7, 5
-+ addi $r3, $r7, 6
-+ addi $r3, $r7, 7
-+ addi $r4, $r0, 0
-+ addi $r4, $r0, 1
-+ addi $r4, $r0, 2
-+ addi $r4, $r0, 3
-+ addi $r4, $r0, 4
-+ addi $r4, $r0, 5
-+ addi $r4, $r0, 6
-+ addi $r4, $r0, 7
-+ addi $r4, $r1, 0
-+ addi $r4, $r1, 1
-+ addi $r4, $r1, 2
-+ addi $r4, $r1, 3
-+ addi $r4, $r1, 4
-+ addi $r4, $r1, 5
-+ addi $r4, $r1, 6
-+ addi $r4, $r1, 7
-+ addi $r4, $r2, 0
-+ addi $r4, $r2, 1
-+ addi $r4, $r2, 2
-+ addi $r4, $r2, 3
-+ addi $r4, $r2, 4
-+ addi $r4, $r2, 5
-+ addi $r4, $r2, 6
-+ addi $r4, $r2, 7
-+ addi $r4, $r3, 0
-+ addi $r4, $r3, 1
-+ addi $r4, $r3, 2
-+ addi $r4, $r3, 3
-+ addi $r4, $r3, 4
-+ addi $r4, $r3, 5
-+ addi $r4, $r3, 6
-+ addi $r4, $r3, 7
-+ addi $r4, $r4, 0
-+ addi $r4, $r4, 1
-+ addi $r4, $r4, 2
-+ addi $r4, $r4, 3
-+ addi $r4, $r4, 4
-+ addi $r4, $r4, 5
-+ addi $r4, $r4, 6
-+ addi $r4, $r4, 7
-+ addi $r4, $r5, 0
-+ addi $r4, $r5, 1
-+ addi $r4, $r5, 2
-+ addi $r4, $r5, 3
-+ addi $r4, $r5, 4
-+ addi $r4, $r5, 5
-+ addi $r4, $r5, 6
-+ addi $r4, $r5, 7
-+ addi $r4, $r6, 0
-+ addi $r4, $r6, 1
-+ addi $r4, $r6, 2
-+ addi $r4, $r6, 3
-+ addi $r4, $r6, 4
-+ addi $r4, $r6, 5
-+ addi $r4, $r6, 6
-+ addi $r4, $r6, 7
-+ addi $r4, $r7, 0
-+ addi $r4, $r7, 1
-+ addi $r4, $r7, 2
-+ addi $r4, $r7, 3
-+ addi $r4, $r7, 4
-+ addi $r4, $r7, 5
-+ addi $r4, $r7, 6
-+ addi $r4, $r7, 7
-+ addi $r5, $r0, 0
-+ addi $r5, $r0, 1
-+ addi $r5, $r0, 2
-+ addi $r5, $r0, 3
-+ addi $r5, $r0, 4
-+ addi $r5, $r0, 5
-+ addi $r5, $r0, 6
-+ addi $r5, $r0, 7
-+ addi $r5, $r1, 0
-+ addi $r5, $r1, 1
-+ addi $r5, $r1, 2
-+ addi $r5, $r1, 3
-+ addi $r5, $r1, 4
-+ addi $r5, $r1, 5
-+ addi $r5, $r1, 6
-+ addi $r5, $r1, 7
-+ addi $r5, $r2, 0
-+ addi $r5, $r2, 1
-+ addi $r5, $r2, 2
-+ addi $r5, $r2, 3
-+ addi $r5, $r2, 4
-+ addi $r5, $r2, 5
-+ addi $r5, $r2, 6
-+ addi $r5, $r2, 7
-+ addi $r5, $r3, 0
-+ addi $r5, $r3, 1
-+ addi $r5, $r3, 2
-+ addi $r5, $r3, 3
-+ addi $r5, $r3, 4
-+ addi $r5, $r3, 5
-+ addi $r5, $r3, 6
-+ addi $r5, $r3, 7
-+ addi $r5, $r4, 0
-+ addi $r5, $r4, 1
-+ addi $r5, $r4, 2
-+ addi $r5, $r4, 3
-+ addi $r5, $r4, 4
-+ addi $r5, $r4, 5
-+ addi $r5, $r4, 6
-+ addi $r5, $r4, 7
-+ addi $r5, $r5, 0
-+ addi $r5, $r5, 1
-+ addi $r5, $r5, 2
-+ addi $r5, $r5, 3
-+ addi $r5, $r5, 4
-+ addi $r5, $r5, 5
-+ addi $r5, $r5, 6
-+ addi $r5, $r5, 7
-+ addi $r5, $r6, 0
-+ addi $r5, $r6, 1
-+ addi $r5, $r6, 2
-+ addi $r5, $r6, 3
-+ addi $r5, $r6, 4
-+ addi $r5, $r6, 5
-+ addi $r5, $r6, 6
-+ addi $r5, $r6, 7
-+ addi $r5, $r7, 0
-+ addi $r5, $r7, 1
-+ addi $r5, $r7, 2
-+ addi $r5, $r7, 3
-+ addi $r5, $r7, 4
-+ addi $r5, $r7, 5
-+ addi $r5, $r7, 6
-+ addi $r5, $r7, 7
-+ addi $r6, $r0, 0
-+ addi $r6, $r0, 1
-+ addi $r6, $r0, 2
-+ addi $r6, $r0, 3
-+ addi $r6, $r0, 4
-+ addi $r6, $r0, 5
-+ addi $r6, $r0, 6
-+ addi $r6, $r0, 7
-+ addi $r6, $r1, 0
-+ addi $r6, $r1, 1
-+ addi $r6, $r1, 2
-+ addi $r6, $r1, 3
-+ addi $r6, $r1, 4
-+ addi $r6, $r1, 5
-+ addi $r6, $r1, 6
-+ addi $r6, $r1, 7
-+ addi $r6, $r2, 0
-+ addi $r6, $r2, 1
-+ addi $r6, $r2, 2
-+ addi $r6, $r2, 3
-+ addi $r6, $r2, 4
-+ addi $r6, $r2, 5
-+ addi $r6, $r2, 6
-+ addi $r6, $r2, 7
-+ addi $r6, $r3, 0
-+ addi $r6, $r3, 1
-+ addi $r6, $r3, 2
-+ addi $r6, $r3, 3
-+ addi $r6, $r3, 4
-+ addi $r6, $r3, 5
-+ addi $r6, $r3, 6
-+ addi $r6, $r3, 7
-+ addi $r6, $r4, 0
-+ addi $r6, $r4, 1
-+ addi $r6, $r4, 2
-+ addi $r6, $r4, 3
-+ addi $r6, $r4, 4
-+ addi $r6, $r4, 5
-+ addi $r6, $r4, 6
-+ addi $r6, $r4, 7
-+ addi $r6, $r5, 0
-+ addi $r6, $r5, 1
-+ addi $r6, $r5, 2
-+ addi $r6, $r5, 3
-+ addi $r6, $r5, 4
-+ addi $r6, $r5, 5
-+ addi $r6, $r5, 6
-+ addi $r6, $r5, 7
-+ addi $r6, $r6, 0
-+ addi $r6, $r6, 1
-+ addi $r6, $r6, 2
-+ addi $r6, $r6, 3
-+ addi $r6, $r6, 4
-+ addi $r6, $r6, 5
-+ addi $r6, $r6, 6
-+ addi $r6, $r6, 7
-+ addi $r6, $r7, 0
-+ addi $r6, $r7, 1
-+ addi $r6, $r7, 2
-+ addi $r6, $r7, 3
-+ addi $r6, $r7, 4
-+ addi $r6, $r7, 5
-+ addi $r6, $r7, 6
-+ addi $r6, $r7, 7
-+ addi $r7, $r0, 0
-+ addi $r7, $r0, 1
-+ addi $r7, $r0, 2
-+ addi $r7, $r0, 3
-+ addi $r7, $r0, 4
-+ addi $r7, $r0, 5
-+ addi $r7, $r0, 6
-+ addi $r7, $r0, 7
-+ addi $r7, $r1, 0
-+ addi $r7, $r1, 1
-+ addi $r7, $r1, 2
-+ addi $r7, $r1, 3
-+ addi $r7, $r1, 4
-+ addi $r7, $r1, 5
-+ addi $r7, $r1, 6
-+ addi $r7, $r1, 7
-+ addi $r7, $r2, 0
-+ addi $r7, $r2, 1
-+ addi $r7, $r2, 2
-+ addi $r7, $r2, 3
-+ addi $r7, $r2, 4
-+ addi $r7, $r2, 5
-+ addi $r7, $r2, 6
-+ addi $r7, $r2, 7
-+ addi $r7, $r3, 0
-+ addi $r7, $r3, 1
-+ addi $r7, $r3, 2
-+ addi $r7, $r3, 3
-+ addi $r7, $r3, 4
-+ addi $r7, $r3, 5
-+ addi $r7, $r3, 6
-+ addi $r7, $r3, 7
-+ addi $r7, $r4, 0
-+ addi $r7, $r4, 1
-+ addi $r7, $r4, 2
-+ addi $r7, $r4, 3
-+ addi $r7, $r4, 4
-+ addi $r7, $r4, 5
-+ addi $r7, $r4, 6
-+ addi $r7, $r4, 7
-+ addi $r7, $r5, 0
-+ addi $r7, $r5, 1
-+ addi $r7, $r5, 2
-+ addi $r7, $r5, 3
-+ addi $r7, $r5, 4
-+ addi $r7, $r5, 5
-+ addi $r7, $r5, 6
-+ addi $r7, $r5, 7
-+ addi $r7, $r6, 0
-+ addi $r7, $r6, 1
-+ addi $r7, $r6, 2
-+ addi $r7, $r6, 3
-+ addi $r7, $r6, 4
-+ addi $r7, $r6, 5
-+ addi $r7, $r6, 6
-+ addi $r7, $r6, 7
-+ addi $r7, $r7, 0
-+ addi $r7, $r7, 1
-+ addi $r7, $r7, 2
-+ addi $r7, $r7, 3
-+ addi $r7, $r7, 4
-+ addi $r7, $r7, 5
-+ addi $r7, $r7, 6
-+ addi $r7, $r7, 7
-+ lwi $r0, [$r0 + 0]
-+ lwi $r0, [$r0 + 4]
-+ lwi $r0, [$r0 + 8]
-+ lwi $r0, [$r0 + 12]
-+ lwi $r0, [$r0 + 16]
-+ lwi $r0, [$r0 + 20]
-+ lwi $r0, [$r0 + 24]
-+ lwi $r0, [$r0 + 28]
-+ lwi $r0, [$r1 + 0]
-+ lwi $r0, [$r1 + 4]
-+ lwi $r0, [$r1 + 8]
-+ lwi $r0, [$r1 + 12]
-+ lwi $r0, [$r1 + 16]
-+ lwi $r0, [$r1 + 20]
-+ lwi $r0, [$r1 + 24]
-+ lwi $r0, [$r1 + 28]
-+ lwi $r0, [$r2 + 0]
-+ lwi $r0, [$r2 + 4]
-+ lwi $r0, [$r2 + 8]
-+ lwi $r0, [$r2 + 12]
-+ lwi $r0, [$r2 + 16]
-+ lwi $r0, [$r2 + 20]
-+ lwi $r0, [$r2 + 24]
-+ lwi $r0, [$r2 + 28]
-+ lwi $r0, [$r3 + 0]
-+ lwi $r0, [$r3 + 4]
-+ lwi $r0, [$r3 + 8]
-+ lwi $r0, [$r3 + 12]
-+ lwi $r0, [$r3 + 16]
-+ lwi $r0, [$r3 + 20]
-+ lwi $r0, [$r3 + 24]
-+ lwi $r0, [$r3 + 28]
-+ lwi $r0, [$r4 + 0]
-+ lwi $r0, [$r4 + 4]
-+ lwi $r0, [$r4 + 8]
-+ lwi $r0, [$r4 + 12]
-+ lwi $r0, [$r4 + 16]
-+ lwi $r0, [$r4 + 20]
-+ lwi $r0, [$r4 + 24]
-+ lwi $r0, [$r4 + 28]
-+ lwi $r0, [$r5 + 0]
-+ lwi $r0, [$r5 + 4]
-+ lwi $r0, [$r5 + 8]
-+ lwi $r0, [$r5 + 12]
-+ lwi $r0, [$r5 + 16]
-+ lwi $r0, [$r5 + 20]
-+ lwi $r0, [$r5 + 24]
-+ lwi $r0, [$r5 + 28]
-+ lwi $r0, [$r6 + 0]
-+ lwi $r0, [$r6 + 4]
-+ lwi $r0, [$r6 + 8]
-+ lwi $r0, [$r6 + 12]
-+ lwi $r0, [$r6 + 16]
-+ lwi $r0, [$r6 + 20]
-+ lwi $r0, [$r6 + 24]
-+ lwi $r0, [$r6 + 28]
-+ lwi $r0, [$r7 + 0]
-+ lwi $r0, [$r7 + 4]
-+ lwi $r0, [$r7 + 8]
-+ lwi $r0, [$r7 + 12]
-+ lwi $r0, [$r7 + 16]
-+ lwi $r0, [$r7 + 20]
-+ lwi $r0, [$r7 + 24]
-+ lwi $r0, [$r7 + 28]
-+ lwi $r1, [$r0 + 0]
-+ lwi $r1, [$r0 + 4]
-+ lwi $r1, [$r0 + 8]
-+ lwi $r1, [$r0 + 12]
-+ lwi $r1, [$r0 + 16]
-+ lwi $r1, [$r0 + 20]
-+ lwi $r1, [$r0 + 24]
-+ lwi $r1, [$r0 + 28]
-+ lwi $r1, [$r1 + 0]
-+ lwi $r1, [$r1 + 4]
-+ lwi $r1, [$r1 + 8]
-+ lwi $r1, [$r1 + 12]
-+ lwi $r1, [$r1 + 16]
-+ lwi $r1, [$r1 + 20]
-+ lwi $r1, [$r1 + 24]
-+ lwi $r1, [$r1 + 28]
-+ lwi $r1, [$r2 + 0]
-+ lwi $r1, [$r2 + 4]
-+ lwi $r1, [$r2 + 8]
-+ lwi $r1, [$r2 + 12]
-+ lwi $r1, [$r2 + 16]
-+ lwi $r1, [$r2 + 20]
-+ lwi $r1, [$r2 + 24]
-+ lwi $r1, [$r2 + 28]
-+ lwi $r1, [$r3 + 0]
-+ lwi $r1, [$r3 + 4]
-+ lwi $r1, [$r3 + 8]
-+ lwi $r1, [$r3 + 12]
-+ lwi $r1, [$r3 + 16]
-+ lwi $r1, [$r3 + 20]
-+ lwi $r1, [$r3 + 24]
-+ lwi $r1, [$r3 + 28]
-+ lwi $r1, [$r4 + 0]
-+ lwi $r1, [$r4 + 4]
-+ lwi $r1, [$r4 + 8]
-+ lwi $r1, [$r4 + 12]
-+ lwi $r1, [$r4 + 16]
-+ lwi $r1, [$r4 + 20]
-+ lwi $r1, [$r4 + 24]
-+ lwi $r1, [$r4 + 28]
-+ lwi $r1, [$r5 + 0]
-+ lwi $r1, [$r5 + 4]
-+ lwi $r1, [$r5 + 8]
-+ lwi $r1, [$r5 + 12]
-+ lwi $r1, [$r5 + 16]
-+ lwi $r1, [$r5 + 20]
-+ lwi $r1, [$r5 + 24]
-+ lwi $r1, [$r5 + 28]
-+ lwi $r1, [$r6 + 0]
-+ lwi $r1, [$r6 + 4]
-+ lwi $r1, [$r6 + 8]
-+ lwi $r1, [$r6 + 12]
-+ lwi $r1, [$r6 + 16]
-+ lwi $r1, [$r6 + 20]
-+ lwi $r1, [$r6 + 24]
-+ lwi $r1, [$r6 + 28]
-+ lwi $r1, [$r7 + 0]
-+ lwi $r1, [$r7 + 4]
-+ lwi $r1, [$r7 + 8]
-+ lwi $r1, [$r7 + 12]
-+ lwi $r1, [$r7 + 16]
-+ lwi $r1, [$r7 + 20]
-+ lwi $r1, [$r7 + 24]
-+ lwi $r1, [$r7 + 28]
-+ lwi $r2, [$r0 + 0]
-+ lwi $r2, [$r0 + 4]
-+ lwi $r2, [$r0 + 8]
-+ lwi $r2, [$r0 + 12]
-+ lwi $r2, [$r0 + 16]
-+ lwi $r2, [$r0 + 20]
-+ lwi $r2, [$r0 + 24]
-+ lwi $r2, [$r0 + 28]
-+ lwi $r2, [$r1 + 0]
-+ lwi $r2, [$r1 + 4]
-+ lwi $r2, [$r1 + 8]
-+ lwi $r2, [$r1 + 12]
-+ lwi $r2, [$r1 + 16]
-+ lwi $r2, [$r1 + 20]
-+ lwi $r2, [$r1 + 24]
-+ lwi $r2, [$r1 + 28]
-+ lwi $r2, [$r2 + 0]
-+ lwi $r2, [$r2 + 4]
-+ lwi $r2, [$r2 + 8]
-+ lwi $r2, [$r2 + 12]
-+ lwi $r2, [$r2 + 16]
-+ lwi $r2, [$r2 + 20]
-+ lwi $r2, [$r2 + 24]
-+ lwi $r2, [$r2 + 28]
-+ lwi $r2, [$r3 + 0]
-+ lwi $r2, [$r3 + 4]
-+ lwi $r2, [$r3 + 8]
-+ lwi $r2, [$r3 + 12]
-+ lwi $r2, [$r3 + 16]
-+ lwi $r2, [$r3 + 20]
-+ lwi $r2, [$r3 + 24]
-+ lwi $r2, [$r3 + 28]
-+ lwi $r2, [$r4 + 0]
-+ lwi $r2, [$r4 + 4]
-+ lwi $r2, [$r4 + 8]
-+ lwi $r2, [$r4 + 12]
-+ lwi $r2, [$r4 + 16]
-+ lwi $r2, [$r4 + 20]
-+ lwi $r2, [$r4 + 24]
-+ lwi $r2, [$r4 + 28]
-+ lwi $r2, [$r5 + 0]
-+ lwi $r2, [$r5 + 4]
-+ lwi $r2, [$r5 + 8]
-+ lwi $r2, [$r5 + 12]
-+ lwi $r2, [$r5 + 16]
-+ lwi $r2, [$r5 + 20]
-+ lwi $r2, [$r5 + 24]
-+ lwi $r2, [$r5 + 28]
-+ lwi $r2, [$r6 + 0]
-+ lwi $r2, [$r6 + 4]
-+ lwi $r2, [$r6 + 8]
-+ lwi $r2, [$r6 + 12]
-+ lwi $r2, [$r6 + 16]
-+ lwi $r2, [$r6 + 20]
-+ lwi $r2, [$r6 + 24]
-+ lwi $r2, [$r6 + 28]
-+ lwi $r2, [$r7 + 0]
-+ lwi $r2, [$r7 + 4]
-+ lwi $r2, [$r7 + 8]
-+ lwi $r2, [$r7 + 12]
-+ lwi $r2, [$r7 + 16]
-+ lwi $r2, [$r7 + 20]
-+ lwi $r2, [$r7 + 24]
-+ lwi $r2, [$r7 + 28]
-+ lwi $r3, [$r0 + 0]
-+ lwi $r3, [$r0 + 4]
-+ lwi $r3, [$r0 + 8]
-+ lwi $r3, [$r0 + 12]
-+ lwi $r3, [$r0 + 16]
-+ lwi $r3, [$r0 + 20]
-+ lwi $r3, [$r0 + 24]
-+ lwi $r3, [$r0 + 28]
-+ lwi $r3, [$r1 + 0]
-+ lwi $r3, [$r1 + 4]
-+ lwi $r3, [$r1 + 8]
-+ lwi $r3, [$r1 + 12]
-+ lwi $r3, [$r1 + 16]
-+ lwi $r3, [$r1 + 20]
-+ lwi $r3, [$r1 + 24]
-+ lwi $r3, [$r1 + 28]
-+ lwi $r3, [$r2 + 0]
-+ lwi $r3, [$r2 + 4]
-+ lwi $r3, [$r2 + 8]
-+ lwi $r3, [$r2 + 12]
-+ lwi $r3, [$r2 + 16]
-+ lwi $r3, [$r2 + 20]
-+ lwi $r3, [$r2 + 24]
-+ lwi $r3, [$r2 + 28]
-+ lwi $r3, [$r3 + 0]
-+ lwi $r3, [$r3 + 4]
-+ lwi $r3, [$r3 + 8]
-+ lwi $r3, [$r3 + 12]
-+ lwi $r3, [$r3 + 16]
-+ lwi $r3, [$r3 + 20]
-+ lwi $r3, [$r3 + 24]
-+ lwi $r3, [$r3 + 28]
-+ lwi $r3, [$r4 + 0]
-+ lwi $r3, [$r4 + 4]
-+ lwi $r3, [$r4 + 8]
-+ lwi $r3, [$r4 + 12]
-+ lwi $r3, [$r4 + 16]
-+ lwi $r3, [$r4 + 20]
-+ lwi $r3, [$r4 + 24]
-+ lwi $r3, [$r4 + 28]
-+ lwi $r3, [$r5 + 0]
-+ lwi $r3, [$r5 + 4]
-+ lwi $r3, [$r5 + 8]
-+ lwi $r3, [$r5 + 12]
-+ lwi $r3, [$r5 + 16]
-+ lwi $r3, [$r5 + 20]
-+ lwi $r3, [$r5 + 24]
-+ lwi $r3, [$r5 + 28]
-+ lwi $r3, [$r6 + 0]
-+ lwi $r3, [$r6 + 4]
-+ lwi $r3, [$r6 + 8]
-+ lwi $r3, [$r6 + 12]
-+ lwi $r3, [$r6 + 16]
-+ lwi $r3, [$r6 + 20]
-+ lwi $r3, [$r6 + 24]
-+ lwi $r3, [$r6 + 28]
-+ lwi $r3, [$r7 + 0]
-+ lwi $r3, [$r7 + 4]
-+ lwi $r3, [$r7 + 8]
-+ lwi $r3, [$r7 + 12]
-+ lwi $r3, [$r7 + 16]
-+ lwi $r3, [$r7 + 20]
-+ lwi $r3, [$r7 + 24]
-+ lwi $r3, [$r7 + 28]
-+ lwi $r4, [$r0 + 0]
-+ lwi $r4, [$r0 + 4]
-+ lwi $r4, [$r0 + 8]
-+ lwi $r4, [$r0 + 12]
-+ lwi $r4, [$r0 + 16]
-+ lwi $r4, [$r0 + 20]
-+ lwi $r4, [$r0 + 24]
-+ lwi $r4, [$r0 + 28]
-+ lwi $r4, [$r1 + 0]
-+ lwi $r4, [$r1 + 4]
-+ lwi $r4, [$r1 + 8]
-+ lwi $r4, [$r1 + 12]
-+ lwi $r4, [$r1 + 16]
-+ lwi $r4, [$r1 + 20]
-+ lwi $r4, [$r1 + 24]
-+ lwi $r4, [$r1 + 28]
-+ lwi $r4, [$r2 + 0]
-+ lwi $r4, [$r2 + 4]
-+ lwi $r4, [$r2 + 8]
-+ lwi $r4, [$r2 + 12]
-+ lwi $r4, [$r2 + 16]
-+ lwi $r4, [$r2 + 20]
-+ lwi $r4, [$r2 + 24]
-+ lwi $r4, [$r2 + 28]
-+ lwi $r4, [$r3 + 0]
-+ lwi $r4, [$r3 + 4]
-+ lwi $r4, [$r3 + 8]
-+ lwi $r4, [$r3 + 12]
-+ lwi $r4, [$r3 + 16]
-+ lwi $r4, [$r3 + 20]
-+ lwi $r4, [$r3 + 24]
-+ lwi $r4, [$r3 + 28]
-+ lwi $r4, [$r4 + 0]
-+ lwi $r4, [$r4 + 4]
-+ lwi $r4, [$r4 + 8]
-+ lwi $r4, [$r4 + 12]
-+ lwi $r4, [$r4 + 16]
-+ lwi $r4, [$r4 + 20]
-+ lwi $r4, [$r4 + 24]
-+ lwi $r4, [$r4 + 28]
-+ lwi $r4, [$r5 + 0]
-+ lwi $r4, [$r5 + 4]
-+ lwi $r4, [$r5 + 8]
-+ lwi $r4, [$r5 + 12]
-+ lwi $r4, [$r5 + 16]
-+ lwi $r4, [$r5 + 20]
-+ lwi $r4, [$r5 + 24]
-+ lwi $r4, [$r5 + 28]
-+ lwi $r4, [$r6 + 0]
-+ lwi $r4, [$r6 + 4]
-+ lwi $r4, [$r6 + 8]
-+ lwi $r4, [$r6 + 12]
-+ lwi $r4, [$r6 + 16]
-+ lwi $r4, [$r6 + 20]
-+ lwi $r4, [$r6 + 24]
-+ lwi $r4, [$r6 + 28]
-+ lwi $r4, [$r7 + 0]
-+ lwi $r4, [$r7 + 4]
-+ lwi $r4, [$r7 + 8]
-+ lwi $r4, [$r7 + 12]
-+ lwi $r4, [$r7 + 16]
-+ lwi $r4, [$r7 + 20]
-+ lwi $r4, [$r7 + 24]
-+ lwi $r4, [$r7 + 28]
-+ lwi $r5, [$r0 + 0]
-+ lwi $r5, [$r0 + 4]
-+ lwi $r5, [$r0 + 8]
-+ lwi $r5, [$r0 + 12]
-+ lwi $r5, [$r0 + 16]
-+ lwi $r5, [$r0 + 20]
-+ lwi $r5, [$r0 + 24]
-+ lwi $r5, [$r0 + 28]
-+ lwi $r5, [$r1 + 0]
-+ lwi $r5, [$r1 + 4]
-+ lwi $r5, [$r1 + 8]
-+ lwi $r5, [$r1 + 12]
-+ lwi $r5, [$r1 + 16]
-+ lwi $r5, [$r1 + 20]
-+ lwi $r5, [$r1 + 24]
-+ lwi $r5, [$r1 + 28]
-+ lwi $r5, [$r2 + 0]
-+ lwi $r5, [$r2 + 4]
-+ lwi $r5, [$r2 + 8]
-+ lwi $r5, [$r2 + 12]
-+ lwi $r5, [$r2 + 16]
-+ lwi $r5, [$r2 + 20]
-+ lwi $r5, [$r2 + 24]
-+ lwi $r5, [$r2 + 28]
-+ lwi $r5, [$r3 + 0]
-+ lwi $r5, [$r3 + 4]
-+ lwi $r5, [$r3 + 8]
-+ lwi $r5, [$r3 + 12]
-+ lwi $r5, [$r3 + 16]
-+ lwi $r5, [$r3 + 20]
-+ lwi $r5, [$r3 + 24]
-+ lwi $r5, [$r3 + 28]
-+ lwi $r5, [$r4 + 0]
-+ lwi $r5, [$r4 + 4]
-+ lwi $r5, [$r4 + 8]
-+ lwi $r5, [$r4 + 12]
-+ lwi $r5, [$r4 + 16]
-+ lwi $r5, [$r4 + 20]
-+ lwi $r5, [$r4 + 24]
-+ lwi $r5, [$r4 + 28]
-+ lwi $r5, [$r5 + 0]
-+ lwi $r5, [$r5 + 4]
-+ lwi $r5, [$r5 + 8]
-+ lwi $r5, [$r5 + 12]
-+ lwi $r5, [$r5 + 16]
-+ lwi $r5, [$r5 + 20]
-+ lwi $r5, [$r5 + 24]
-+ lwi $r5, [$r5 + 28]
-+ lwi $r5, [$r6 + 0]
-+ lwi $r5, [$r6 + 4]
-+ lwi $r5, [$r6 + 8]
-+ lwi $r5, [$r6 + 12]
-+ lwi $r5, [$r6 + 16]
-+ lwi $r5, [$r6 + 20]
-+ lwi $r5, [$r6 + 24]
-+ lwi $r5, [$r6 + 28]
-+ lwi $r5, [$r7 + 0]
-+ lwi $r5, [$r7 + 4]
-+ lwi $r5, [$r7 + 8]
-+ lwi $r5, [$r7 + 12]
-+ lwi $r5, [$r7 + 16]
-+ lwi $r5, [$r7 + 20]
-+ lwi $r5, [$r7 + 24]
-+ lwi $r5, [$r7 + 28]
-+ lwi $r6, [$r0 + 0]
-+ lwi $r6, [$r0 + 4]
-+ lwi $r6, [$r0 + 8]
-+ lwi $r6, [$r0 + 12]
-+ lwi $r6, [$r0 + 16]
-+ lwi $r6, [$r0 + 20]
-+ lwi $r6, [$r0 + 24]
-+ lwi $r6, [$r0 + 28]
-+ lwi $r6, [$r1 + 0]
-+ lwi $r6, [$r1 + 4]
-+ lwi $r6, [$r1 + 8]
-+ lwi $r6, [$r1 + 12]
-+ lwi $r6, [$r1 + 16]
-+ lwi $r6, [$r1 + 20]
-+ lwi $r6, [$r1 + 24]
-+ lwi $r6, [$r1 + 28]
-+ lwi $r6, [$r2 + 0]
-+ lwi $r6, [$r2 + 4]
-+ lwi $r6, [$r2 + 8]
-+ lwi $r6, [$r2 + 12]
-+ lwi $r6, [$r2 + 16]
-+ lwi $r6, [$r2 + 20]
-+ lwi $r6, [$r2 + 24]
-+ lwi $r6, [$r2 + 28]
-+ lwi $r6, [$r3 + 0]
-+ lwi $r6, [$r3 + 4]
-+ lwi $r6, [$r3 + 8]
-+ lwi $r6, [$r3 + 12]
-+ lwi $r6, [$r3 + 16]
-+ lwi $r6, [$r3 + 20]
-+ lwi $r6, [$r3 + 24]
-+ lwi $r6, [$r3 + 28]
-+ lwi $r6, [$r4 + 0]
-+ lwi $r6, [$r4 + 4]
-+ lwi $r6, [$r4 + 8]
-+ lwi $r6, [$r4 + 12]
-+ lwi $r6, [$r4 + 16]
-+ lwi $r6, [$r4 + 20]
-+ lwi $r6, [$r4 + 24]
-+ lwi $r6, [$r4 + 28]
-+ lwi $r6, [$r5 + 0]
-+ lwi $r6, [$r5 + 4]
-+ lwi $r6, [$r5 + 8]
-+ lwi $r6, [$r5 + 12]
-+ lwi $r6, [$r5 + 16]
-+ lwi $r6, [$r5 + 20]
-+ lwi $r6, [$r5 + 24]
-+ lwi $r6, [$r5 + 28]
-+ lwi $r6, [$r6 + 0]
-+ lwi $r6, [$r6 + 4]
-+ lwi $r6, [$r6 + 8]
-+ lwi $r6, [$r6 + 12]
-+ lwi $r6, [$r6 + 16]
-+ lwi $r6, [$r6 + 20]
-+ lwi $r6, [$r6 + 24]
-+ lwi $r6, [$r6 + 28]
-+ lwi $r6, [$r7 + 0]
-+ lwi $r6, [$r7 + 4]
-+ lwi $r6, [$r7 + 8]
-+ lwi $r6, [$r7 + 12]
-+ lwi $r6, [$r7 + 16]
-+ lwi $r6, [$r7 + 20]
-+ lwi $r6, [$r7 + 24]
-+ lwi $r6, [$r7 + 28]
-+ lwi $r7, [$r0 + 0]
-+ lwi $r7, [$r0 + 4]
-+ lwi $r7, [$r0 + 8]
-+ lwi $r7, [$r0 + 12]
-+ lwi $r7, [$r0 + 16]
-+ lwi $r7, [$r0 + 20]
-+ lwi $r7, [$r0 + 24]
-+ lwi $r7, [$r0 + 28]
-+ lwi $r7, [$r1 + 0]
-+ lwi $r7, [$r1 + 4]
-+ lwi $r7, [$r1 + 8]
-+ lwi $r7, [$r1 + 12]
-+ lwi $r7, [$r1 + 16]
-+ lwi $r7, [$r1 + 20]
-+ lwi $r7, [$r1 + 24]
-+ lwi $r7, [$r1 + 28]
-+ lwi $r7, [$r2 + 0]
-+ lwi $r7, [$r2 + 4]
-+ lwi $r7, [$r2 + 8]
-+ lwi $r7, [$r2 + 12]
-+ lwi $r7, [$r2 + 16]
-+ lwi $r7, [$r2 + 20]
-+ lwi $r7, [$r2 + 24]
-+ lwi $r7, [$r2 + 28]
-+ lwi $r7, [$r3 + 0]
-+ lwi $r7, [$r3 + 4]
-+ lwi $r7, [$r3 + 8]
-+ lwi $r7, [$r3 + 12]
-+ lwi $r7, [$r3 + 16]
-+ lwi $r7, [$r3 + 20]
-+ lwi $r7, [$r3 + 24]
-+ lwi $r7, [$r3 + 28]
-+ lwi $r7, [$r4 + 0]
-+ lwi $r7, [$r4 + 4]
-+ lwi $r7, [$r4 + 8]
-+ lwi $r7, [$r4 + 12]
-+ lwi $r7, [$r4 + 16]
-+ lwi $r7, [$r4 + 20]
-+ lwi $r7, [$r4 + 24]
-+ lwi $r7, [$r4 + 28]
-+ lwi $r7, [$r5 + 0]
-+ lwi $r7, [$r5 + 4]
-+ lwi $r7, [$r5 + 8]
-+ lwi $r7, [$r5 + 12]
-+ lwi $r7, [$r5 + 16]
-+ lwi $r7, [$r5 + 20]
-+ lwi $r7, [$r5 + 24]
-+ lwi $r7, [$r5 + 28]
-+ lwi $r7, [$r6 + 0]
-+ lwi $r7, [$r6 + 4]
-+ lwi $r7, [$r6 + 8]
-+ lwi $r7, [$r6 + 12]
-+ lwi $r7, [$r6 + 16]
-+ lwi $r7, [$r6 + 20]
-+ lwi $r7, [$r6 + 24]
-+ lwi $r7, [$r6 + 28]
-+ lwi $r7, [$r7 + 0]
-+ lwi $r7, [$r7 + 4]
-+ lwi $r7, [$r7 + 8]
-+ lwi $r7, [$r7 + 12]
-+ lwi $r7, [$r7 + 16]
-+ lwi $r7, [$r7 + 20]
-+ lwi $r7, [$r7 + 24]
-+ lwi $r7, [$r7 + 28]
-+ lwi.bi $r0, [$r0], 0
-+ lwi.bi $r0, [$r0], 4
-+ lwi.bi $r0, [$r0], 8
-+ lwi.bi $r0, [$r0], 12
-+ lwi.bi $r0, [$r0], 16
-+ lwi.bi $r0, [$r0], 20
-+ lwi.bi $r0, [$r0], 24
-+ lwi.bi $r0, [$r0], 28
-+ lwi.bi $r0, [$r1], 0
-+ lwi.bi $r0, [$r1], 4
-+ lwi.bi $r0, [$r1], 8
-+ lwi.bi $r0, [$r1], 12
-+ lwi.bi $r0, [$r1], 16
-+ lwi.bi $r0, [$r1], 20
-+ lwi.bi $r0, [$r1], 24
-+ lwi.bi $r0, [$r1], 28
-+ lwi.bi $r0, [$r2], 0
-+ lwi.bi $r0, [$r2], 4
-+ lwi.bi $r0, [$r2], 8
-+ lwi.bi $r0, [$r2], 12
-+ lwi.bi $r0, [$r2], 16
-+ lwi.bi $r0, [$r2], 20
-+ lwi.bi $r0, [$r2], 24
-+ lwi.bi $r0, [$r2], 28
-+ lwi.bi $r0, [$r3], 0
-+ lwi.bi $r0, [$r3], 4
-+ lwi.bi $r0, [$r3], 8
-+ lwi.bi $r0, [$r3], 12
-+ lwi.bi $r0, [$r3], 16
-+ lwi.bi $r0, [$r3], 20
-+ lwi.bi $r0, [$r3], 24
-+ lwi.bi $r0, [$r3], 28
-+ lwi.bi $r0, [$r4], 0
-+ lwi.bi $r0, [$r4], 4
-+ lwi.bi $r0, [$r4], 8
-+ lwi.bi $r0, [$r4], 12
-+ lwi.bi $r0, [$r4], 16
-+ lwi.bi $r0, [$r4], 20
-+ lwi.bi $r0, [$r4], 24
-+ lwi.bi $r0, [$r4], 28
-+ lwi.bi $r0, [$r5], 0
-+ lwi.bi $r0, [$r5], 4
-+ lwi.bi $r0, [$r5], 8
-+ lwi.bi $r0, [$r5], 12
-+ lwi.bi $r0, [$r5], 16
-+ lwi.bi $r0, [$r5], 20
-+ lwi.bi $r0, [$r5], 24
-+ lwi.bi $r0, [$r5], 28
-+ lwi.bi $r0, [$r6], 0
-+ lwi.bi $r0, [$r6], 4
-+ lwi.bi $r0, [$r6], 8
-+ lwi.bi $r0, [$r6], 12
-+ lwi.bi $r0, [$r6], 16
-+ lwi.bi $r0, [$r6], 20
-+ lwi.bi $r0, [$r6], 24
-+ lwi.bi $r0, [$r6], 28
-+ lwi.bi $r0, [$r7], 0
-+ lwi.bi $r0, [$r7], 4
-+ lwi.bi $r0, [$r7], 8
-+ lwi.bi $r0, [$r7], 12
-+ lwi.bi $r0, [$r7], 16
-+ lwi.bi $r0, [$r7], 20
-+ lwi.bi $r0, [$r7], 24
-+ lwi.bi $r0, [$r7], 28
-+ lwi.bi $r1, [$r0], 0
-+ lwi.bi $r1, [$r0], 4
-+ lwi.bi $r1, [$r0], 8
-+ lwi.bi $r1, [$r0], 12
-+ lwi.bi $r1, [$r0], 16
-+ lwi.bi $r1, [$r0], 20
-+ lwi.bi $r1, [$r0], 24
-+ lwi.bi $r1, [$r0], 28
-+ lwi.bi $r1, [$r1], 0
-+ lwi.bi $r1, [$r1], 4
-+ lwi.bi $r1, [$r1], 8
-+ lwi.bi $r1, [$r1], 12
-+ lwi.bi $r1, [$r1], 16
-+ lwi.bi $r1, [$r1], 20
-+ lwi.bi $r1, [$r1], 24
-+ lwi.bi $r1, [$r1], 28
-+ lwi.bi $r1, [$r2], 0
-+ lwi.bi $r1, [$r2], 4
-+ lwi.bi $r1, [$r2], 8
-+ lwi.bi $r1, [$r2], 12
-+ lwi.bi $r1, [$r2], 16
-+ lwi.bi $r1, [$r2], 20
-+ lwi.bi $r1, [$r2], 24
-+ lwi.bi $r1, [$r2], 28
-+ lwi.bi $r1, [$r3], 0
-+ lwi.bi $r1, [$r3], 4
-+ lwi.bi $r1, [$r3], 8
-+ lwi.bi $r1, [$r3], 12
-+ lwi.bi $r1, [$r3], 16
-+ lwi.bi $r1, [$r3], 20
-+ lwi.bi $r1, [$r3], 24
-+ lwi.bi $r1, [$r3], 28
-+ lwi.bi $r1, [$r4], 0
-+ lwi.bi $r1, [$r4], 4
-+ lwi.bi $r1, [$r4], 8
-+ lwi.bi $r1, [$r4], 12
-+ lwi.bi $r1, [$r4], 16
-+ lwi.bi $r1, [$r4], 20
-+ lwi.bi $r1, [$r4], 24
-+ lwi.bi $r1, [$r4], 28
-+ lwi.bi $r1, [$r5], 0
-+ lwi.bi $r1, [$r5], 4
-+ lwi.bi $r1, [$r5], 8
-+ lwi.bi $r1, [$r5], 12
-+ lwi.bi $r1, [$r5], 16
-+ lwi.bi $r1, [$r5], 20
-+ lwi.bi $r1, [$r5], 24
-+ lwi.bi $r1, [$r5], 28
-+ lwi.bi $r1, [$r6], 0
-+ lwi.bi $r1, [$r6], 4
-+ lwi.bi $r1, [$r6], 8
-+ lwi.bi $r1, [$r6], 12
-+ lwi.bi $r1, [$r6], 16
-+ lwi.bi $r1, [$r6], 20
-+ lwi.bi $r1, [$r6], 24
-+ lwi.bi $r1, [$r6], 28
-+ lwi.bi $r1, [$r7], 0
-+ lwi.bi $r1, [$r7], 4
-+ lwi.bi $r1, [$r7], 8
-+ lwi.bi $r1, [$r7], 12
-+ lwi.bi $r1, [$r7], 16
-+ lwi.bi $r1, [$r7], 20
-+ lwi.bi $r1, [$r7], 24
-+ lwi.bi $r1, [$r7], 28
-+ lwi.bi $r2, [$r0], 0
-+ lwi.bi $r2, [$r0], 4
-+ lwi.bi $r2, [$r0], 8
-+ lwi.bi $r2, [$r0], 12
-+ lwi.bi $r2, [$r0], 16
-+ lwi.bi $r2, [$r0], 20
-+ lwi.bi $r2, [$r0], 24
-+ lwi.bi $r2, [$r0], 28
-+ lwi.bi $r2, [$r1], 0
-+ lwi.bi $r2, [$r1], 4
-+ lwi.bi $r2, [$r1], 8
-+ lwi.bi $r2, [$r1], 12
-+ lwi.bi $r2, [$r1], 16
-+ lwi.bi $r2, [$r1], 20
-+ lwi.bi $r2, [$r1], 24
-+ lwi.bi $r2, [$r1], 28
-+ lwi.bi $r2, [$r2], 0
-+ lwi.bi $r2, [$r2], 4
-+ lwi.bi $r2, [$r2], 8
-+ lwi.bi $r2, [$r2], 12
-+ lwi.bi $r2, [$r2], 16
-+ lwi.bi $r2, [$r2], 20
-+ lwi.bi $r2, [$r2], 24
-+ lwi.bi $r2, [$r2], 28
-+ lwi.bi $r2, [$r3], 0
-+ lwi.bi $r2, [$r3], 4
-+ lwi.bi $r2, [$r3], 8
-+ lwi.bi $r2, [$r3], 12
-+ lwi.bi $r2, [$r3], 16
-+ lwi.bi $r2, [$r3], 20
-+ lwi.bi $r2, [$r3], 24
-+ lwi.bi $r2, [$r3], 28
-+ lwi.bi $r2, [$r4], 0
-+ lwi.bi $r2, [$r4], 4
-+ lwi.bi $r2, [$r4], 8
-+ lwi.bi $r2, [$r4], 12
-+ lwi.bi $r2, [$r4], 16
-+ lwi.bi $r2, [$r4], 20
-+ lwi.bi $r2, [$r4], 24
-+ lwi.bi $r2, [$r4], 28
-+ lwi.bi $r2, [$r5], 0
-+ lwi.bi $r2, [$r5], 4
-+ lwi.bi $r2, [$r5], 8
-+ lwi.bi $r2, [$r5], 12
-+ lwi.bi $r2, [$r5], 16
-+ lwi.bi $r2, [$r5], 20
-+ lwi.bi $r2, [$r5], 24
-+ lwi.bi $r2, [$r5], 28
-+ lwi.bi $r2, [$r6], 0
-+ lwi.bi $r2, [$r6], 4
-+ lwi.bi $r2, [$r6], 8
-+ lwi.bi $r2, [$r6], 12
-+ lwi.bi $r2, [$r6], 16
-+ lwi.bi $r2, [$r6], 20
-+ lwi.bi $r2, [$r6], 24
-+ lwi.bi $r2, [$r6], 28
-+ lwi.bi $r2, [$r7], 0
-+ lwi.bi $r2, [$r7], 4
-+ lwi.bi $r2, [$r7], 8
-+ lwi.bi $r2, [$r7], 12
-+ lwi.bi $r2, [$r7], 16
-+ lwi.bi $r2, [$r7], 20
-+ lwi.bi $r2, [$r7], 24
-+ lwi.bi $r2, [$r7], 28
-+ lwi.bi $r3, [$r0], 0
-+ lwi.bi $r3, [$r0], 4
-+ lwi.bi $r3, [$r0], 8
-+ lwi.bi $r3, [$r0], 12
-+ lwi.bi $r3, [$r0], 16
-+ lwi.bi $r3, [$r0], 20
-+ lwi.bi $r3, [$r0], 24
-+ lwi.bi $r3, [$r0], 28
-+ lwi.bi $r3, [$r1], 0
-+ lwi.bi $r3, [$r1], 4
-+ lwi.bi $r3, [$r1], 8
-+ lwi.bi $r3, [$r1], 12
-+ lwi.bi $r3, [$r1], 16
-+ lwi.bi $r3, [$r1], 20
-+ lwi.bi $r3, [$r1], 24
-+ lwi.bi $r3, [$r1], 28
-+ lwi.bi $r3, [$r2], 0
-+ lwi.bi $r3, [$r2], 4
-+ lwi.bi $r3, [$r2], 8
-+ lwi.bi $r3, [$r2], 12
-+ lwi.bi $r3, [$r2], 16
-+ lwi.bi $r3, [$r2], 20
-+ lwi.bi $r3, [$r2], 24
-+ lwi.bi $r3, [$r2], 28
-+ lwi.bi $r3, [$r3], 0
-+ lwi.bi $r3, [$r3], 4
-+ lwi.bi $r3, [$r3], 8
-+ lwi.bi $r3, [$r3], 12
-+ lwi.bi $r3, [$r3], 16
-+ lwi.bi $r3, [$r3], 20
-+ lwi.bi $r3, [$r3], 24
-+ lwi.bi $r3, [$r3], 28
-+ lwi.bi $r3, [$r4], 0
-+ lwi.bi $r3, [$r4], 4
-+ lwi.bi $r3, [$r4], 8
-+ lwi.bi $r3, [$r4], 12
-+ lwi.bi $r3, [$r4], 16
-+ lwi.bi $r3, [$r4], 20
-+ lwi.bi $r3, [$r4], 24
-+ lwi.bi $r3, [$r4], 28
-+ lwi.bi $r3, [$r5], 0
-+ lwi.bi $r3, [$r5], 4
-+ lwi.bi $r3, [$r5], 8
-+ lwi.bi $r3, [$r5], 12
-+ lwi.bi $r3, [$r5], 16
-+ lwi.bi $r3, [$r5], 20
-+ lwi.bi $r3, [$r5], 24
-+ lwi.bi $r3, [$r5], 28
-+ lwi.bi $r3, [$r6], 0
-+ lwi.bi $r3, [$r6], 4
-+ lwi.bi $r3, [$r6], 8
-+ lwi.bi $r3, [$r6], 12
-+ lwi.bi $r3, [$r6], 16
-+ lwi.bi $r3, [$r6], 20
-+ lwi.bi $r3, [$r6], 24
-+ lwi.bi $r3, [$r6], 28
-+ lwi.bi $r3, [$r7], 0
-+ lwi.bi $r3, [$r7], 4
-+ lwi.bi $r3, [$r7], 8
-+ lwi.bi $r3, [$r7], 12
-+ lwi.bi $r3, [$r7], 16
-+ lwi.bi $r3, [$r7], 20
-+ lwi.bi $r3, [$r7], 24
-+ lwi.bi $r3, [$r7], 28
-+ lwi.bi $r4, [$r0], 0
-+ lwi.bi $r4, [$r0], 4
-+ lwi.bi $r4, [$r0], 8
-+ lwi.bi $r4, [$r0], 12
-+ lwi.bi $r4, [$r0], 16
-+ lwi.bi $r4, [$r0], 20
-+ lwi.bi $r4, [$r0], 24
-+ lwi.bi $r4, [$r0], 28
-+ lwi.bi $r4, [$r1], 0
-+ lwi.bi $r4, [$r1], 4
-+ lwi.bi $r4, [$r1], 8
-+ lwi.bi $r4, [$r1], 12
-+ lwi.bi $r4, [$r1], 16
-+ lwi.bi $r4, [$r1], 20
-+ lwi.bi $r4, [$r1], 24
-+ lwi.bi $r4, [$r1], 28
-+ lwi.bi $r4, [$r2], 0
-+ lwi.bi $r4, [$r2], 4
-+ lwi.bi $r4, [$r2], 8
-+ lwi.bi $r4, [$r2], 12
-+ lwi.bi $r4, [$r2], 16
-+ lwi.bi $r4, [$r2], 20
-+ lwi.bi $r4, [$r2], 24
-+ lwi.bi $r4, [$r2], 28
-+ lwi.bi $r4, [$r3], 0
-+ lwi.bi $r4, [$r3], 4
-+ lwi.bi $r4, [$r3], 8
-+ lwi.bi $r4, [$r3], 12
-+ lwi.bi $r4, [$r3], 16
-+ lwi.bi $r4, [$r3], 20
-+ lwi.bi $r4, [$r3], 24
-+ lwi.bi $r4, [$r3], 28
-+ lwi.bi $r4, [$r4], 0
-+ lwi.bi $r4, [$r4], 4
-+ lwi.bi $r4, [$r4], 8
-+ lwi.bi $r4, [$r4], 12
-+ lwi.bi $r4, [$r4], 16
-+ lwi.bi $r4, [$r4], 20
-+ lwi.bi $r4, [$r4], 24
-+ lwi.bi $r4, [$r4], 28
-+ lwi.bi $r4, [$r5], 0
-+ lwi.bi $r4, [$r5], 4
-+ lwi.bi $r4, [$r5], 8
-+ lwi.bi $r4, [$r5], 12
-+ lwi.bi $r4, [$r5], 16
-+ lwi.bi $r4, [$r5], 20
-+ lwi.bi $r4, [$r5], 24
-+ lwi.bi $r4, [$r5], 28
-+ lwi.bi $r4, [$r6], 0
-+ lwi.bi $r4, [$r6], 4
-+ lwi.bi $r4, [$r6], 8
-+ lwi.bi $r4, [$r6], 12
-+ lwi.bi $r4, [$r6], 16
-+ lwi.bi $r4, [$r6], 20
-+ lwi.bi $r4, [$r6], 24
-+ lwi.bi $r4, [$r6], 28
-+ lwi.bi $r4, [$r7], 0
-+ lwi.bi $r4, [$r7], 4
-+ lwi.bi $r4, [$r7], 8
-+ lwi.bi $r4, [$r7], 12
-+ lwi.bi $r4, [$r7], 16
-+ lwi.bi $r4, [$r7], 20
-+ lwi.bi $r4, [$r7], 24
-+ lwi.bi $r4, [$r7], 28
-+ lwi.bi $r5, [$r0], 0
-+ lwi.bi $r5, [$r0], 4
-+ lwi.bi $r5, [$r0], 8
-+ lwi.bi $r5, [$r0], 12
-+ lwi.bi $r5, [$r0], 16
-+ lwi.bi $r5, [$r0], 20
-+ lwi.bi $r5, [$r0], 24
-+ lwi.bi $r5, [$r0], 28
-+ lwi.bi $r5, [$r1], 0
-+ lwi.bi $r5, [$r1], 4
-+ lwi.bi $r5, [$r1], 8
-+ lwi.bi $r5, [$r1], 12
-+ lwi.bi $r5, [$r1], 16
-+ lwi.bi $r5, [$r1], 20
-+ lwi.bi $r5, [$r1], 24
-+ lwi.bi $r5, [$r1], 28
-+ lwi.bi $r5, [$r2], 0
-+ lwi.bi $r5, [$r2], 4
-+ lwi.bi $r5, [$r2], 8
-+ lwi.bi $r5, [$r2], 12
-+ lwi.bi $r5, [$r2], 16
-+ lwi.bi $r5, [$r2], 20
-+ lwi.bi $r5, [$r2], 24
-+ lwi.bi $r5, [$r2], 28
-+ lwi.bi $r5, [$r3], 0
-+ lwi.bi $r5, [$r3], 4
-+ lwi.bi $r5, [$r3], 8
-+ lwi.bi $r5, [$r3], 12
-+ lwi.bi $r5, [$r3], 16
-+ lwi.bi $r5, [$r3], 20
-+ lwi.bi $r5, [$r3], 24
-+ lwi.bi $r5, [$r3], 28
-+ lwi.bi $r5, [$r4], 0
-+ lwi.bi $r5, [$r4], 4
-+ lwi.bi $r5, [$r4], 8
-+ lwi.bi $r5, [$r4], 12
-+ lwi.bi $r5, [$r4], 16
-+ lwi.bi $r5, [$r4], 20
-+ lwi.bi $r5, [$r4], 24
-+ lwi.bi $r5, [$r4], 28
-+ lwi.bi $r5, [$r5], 0
-+ lwi.bi $r5, [$r5], 4
-+ lwi.bi $r5, [$r5], 8
-+ lwi.bi $r5, [$r5], 12
-+ lwi.bi $r5, [$r5], 16
-+ lwi.bi $r5, [$r5], 20
-+ lwi.bi $r5, [$r5], 24
-+ lwi.bi $r5, [$r5], 28
-+ lwi.bi $r5, [$r6], 0
-+ lwi.bi $r5, [$r6], 4
-+ lwi.bi $r5, [$r6], 8
-+ lwi.bi $r5, [$r6], 12
-+ lwi.bi $r5, [$r6], 16
-+ lwi.bi $r5, [$r6], 20
-+ lwi.bi $r5, [$r6], 24
-+ lwi.bi $r5, [$r6], 28
-+ lwi.bi $r5, [$r7], 0
-+ lwi.bi $r5, [$r7], 4
-+ lwi.bi $r5, [$r7], 8
-+ lwi.bi $r5, [$r7], 12
-+ lwi.bi $r5, [$r7], 16
-+ lwi.bi $r5, [$r7], 20
-+ lwi.bi $r5, [$r7], 24
-+ lwi.bi $r5, [$r7], 28
-+ lwi.bi $r6, [$r0], 0
-+ lwi.bi $r6, [$r0], 4
-+ lwi.bi $r6, [$r0], 8
-+ lwi.bi $r6, [$r0], 12
-+ lwi.bi $r6, [$r0], 16
-+ lwi.bi $r6, [$r0], 20
-+ lwi.bi $r6, [$r0], 24
-+ lwi.bi $r6, [$r0], 28
-+ lwi.bi $r6, [$r1], 0
-+ lwi.bi $r6, [$r1], 4
-+ lwi.bi $r6, [$r1], 8
-+ lwi.bi $r6, [$r1], 12
-+ lwi.bi $r6, [$r1], 16
-+ lwi.bi $r6, [$r1], 20
-+ lwi.bi $r6, [$r1], 24
-+ lwi.bi $r6, [$r1], 28
-+ lwi.bi $r6, [$r2], 0
-+ lwi.bi $r6, [$r2], 4
-+ lwi.bi $r6, [$r2], 8
-+ lwi.bi $r6, [$r2], 12
-+ lwi.bi $r6, [$r2], 16
-+ lwi.bi $r6, [$r2], 20
-+ lwi.bi $r6, [$r2], 24
-+ lwi.bi $r6, [$r2], 28
-+ lwi.bi $r6, [$r3], 0
-+ lwi.bi $r6, [$r3], 4
-+ lwi.bi $r6, [$r3], 8
-+ lwi.bi $r6, [$r3], 12
-+ lwi.bi $r6, [$r3], 16
-+ lwi.bi $r6, [$r3], 20
-+ lwi.bi $r6, [$r3], 24
-+ lwi.bi $r6, [$r3], 28
-+ lwi.bi $r6, [$r4], 0
-+ lwi.bi $r6, [$r4], 4
-+ lwi.bi $r6, [$r4], 8
-+ lwi.bi $r6, [$r4], 12
-+ lwi.bi $r6, [$r4], 16
-+ lwi.bi $r6, [$r4], 20
-+ lwi.bi $r6, [$r4], 24
-+ lwi.bi $r6, [$r4], 28
-+ lwi.bi $r6, [$r5], 0
-+ lwi.bi $r6, [$r5], 4
-+ lwi.bi $r6, [$r5], 8
-+ lwi.bi $r6, [$r5], 12
-+ lwi.bi $r6, [$r5], 16
-+ lwi.bi $r6, [$r5], 20
-+ lwi.bi $r6, [$r5], 24
-+ lwi.bi $r6, [$r5], 28
-+ lwi.bi $r6, [$r6], 0
-+ lwi.bi $r6, [$r6], 4
-+ lwi.bi $r6, [$r6], 8
-+ lwi.bi $r6, [$r6], 12
-+ lwi.bi $r6, [$r6], 16
-+ lwi.bi $r6, [$r6], 20
-+ lwi.bi $r6, [$r6], 24
-+ lwi.bi $r6, [$r6], 28
-+ lwi.bi $r6, [$r7], 0
-+ lwi.bi $r6, [$r7], 4
-+ lwi.bi $r6, [$r7], 8
-+ lwi.bi $r6, [$r7], 12
-+ lwi.bi $r6, [$r7], 16
-+ lwi.bi $r6, [$r7], 20
-+ lwi.bi $r6, [$r7], 24
-+ lwi.bi $r6, [$r7], 28
-+ lwi.bi $r7, [$r0], 0
-+ lwi.bi $r7, [$r0], 4
-+ lwi.bi $r7, [$r0], 8
-+ lwi.bi $r7, [$r0], 12
-+ lwi.bi $r7, [$r0], 16
-+ lwi.bi $r7, [$r0], 20
-+ lwi.bi $r7, [$r0], 24
-+ lwi.bi $r7, [$r0], 28
-+ lwi.bi $r7, [$r1], 0
-+ lwi.bi $r7, [$r1], 4
-+ lwi.bi $r7, [$r1], 8
-+ lwi.bi $r7, [$r1], 12
-+ lwi.bi $r7, [$r1], 16
-+ lwi.bi $r7, [$r1], 20
-+ lwi.bi $r7, [$r1], 24
-+ lwi.bi $r7, [$r1], 28
-+ lwi.bi $r7, [$r2], 0
-+ lwi.bi $r7, [$r2], 4
-+ lwi.bi $r7, [$r2], 8
-+ lwi.bi $r7, [$r2], 12
-+ lwi.bi $r7, [$r2], 16
-+ lwi.bi $r7, [$r2], 20
-+ lwi.bi $r7, [$r2], 24
-+ lwi.bi $r7, [$r2], 28
-+ lwi.bi $r7, [$r3], 0
-+ lwi.bi $r7, [$r3], 4
-+ lwi.bi $r7, [$r3], 8
-+ lwi.bi $r7, [$r3], 12
-+ lwi.bi $r7, [$r3], 16
-+ lwi.bi $r7, [$r3], 20
-+ lwi.bi $r7, [$r3], 24
-+ lwi.bi $r7, [$r3], 28
-+ lwi.bi $r7, [$r4], 0
-+ lwi.bi $r7, [$r4], 4
-+ lwi.bi $r7, [$r4], 8
-+ lwi.bi $r7, [$r4], 12
-+ lwi.bi $r7, [$r4], 16
-+ lwi.bi $r7, [$r4], 20
-+ lwi.bi $r7, [$r4], 24
-+ lwi.bi $r7, [$r4], 28
-+ lwi.bi $r7, [$r5], 0
-+ lwi.bi $r7, [$r5], 4
-+ lwi.bi $r7, [$r5], 8
-+ lwi.bi $r7, [$r5], 12
-+ lwi.bi $r7, [$r5], 16
-+ lwi.bi $r7, [$r5], 20
-+ lwi.bi $r7, [$r5], 24
-+ lwi.bi $r7, [$r5], 28
-+ lwi.bi $r7, [$r6], 0
-+ lwi.bi $r7, [$r6], 4
-+ lwi.bi $r7, [$r6], 8
-+ lwi.bi $r7, [$r6], 12
-+ lwi.bi $r7, [$r6], 16
-+ lwi.bi $r7, [$r6], 20
-+ lwi.bi $r7, [$r6], 24
-+ lwi.bi $r7, [$r6], 28
-+ lwi.bi $r7, [$r7], 0
-+ lwi.bi $r7, [$r7], 4
-+ lwi.bi $r7, [$r7], 8
-+ lwi.bi $r7, [$r7], 12
-+ lwi.bi $r7, [$r7], 16
-+ lwi.bi $r7, [$r7], 20
-+ lwi.bi $r7, [$r7], 24
-+ lwi.bi $r7, [$r7], 28
-+ lhi $r0, [$r0 + 0]
-+ lhi $r0, [$r0 + 2]
-+ lhi $r0, [$r0 + 4]
-+ lhi $r0, [$r0 + 6]
-+ lhi $r0, [$r0 + 8]
-+ lhi $r0, [$r0 + 10]
-+ lhi $r0, [$r0 + 12]
-+ lhi $r0, [$r0 + 14]
-+ lhi $r0, [$r1 + 0]
-+ lhi $r0, [$r1 + 2]
-+ lhi $r0, [$r1 + 4]
-+ lhi $r0, [$r1 + 6]
-+ lhi $r0, [$r1 + 8]
-+ lhi $r0, [$r1 + 10]
-+ lhi $r0, [$r1 + 12]
-+ lhi $r0, [$r1 + 14]
-+ lhi $r0, [$r2 + 0]
-+ lhi $r0, [$r2 + 2]
-+ lhi $r0, [$r2 + 4]
-+ lhi $r0, [$r2 + 6]
-+ lhi $r0, [$r2 + 8]
-+ lhi $r0, [$r2 + 10]
-+ lhi $r0, [$r2 + 12]
-+ lhi $r0, [$r2 + 14]
-+ lhi $r0, [$r3 + 0]
-+ lhi $r0, [$r3 + 2]
-+ lhi $r0, [$r3 + 4]
-+ lhi $r0, [$r3 + 6]
-+ lhi $r0, [$r3 + 8]
-+ lhi $r0, [$r3 + 10]
-+ lhi $r0, [$r3 + 12]
-+ lhi $r0, [$r3 + 14]
-+ lhi $r0, [$r4 + 0]
-+ lhi $r0, [$r4 + 2]
-+ lhi $r0, [$r4 + 4]
-+ lhi $r0, [$r4 + 6]
-+ lhi $r0, [$r4 + 8]
-+ lhi $r0, [$r4 + 10]
-+ lhi $r0, [$r4 + 12]
-+ lhi $r0, [$r4 + 14]
-+ lhi $r0, [$r5 + 0]
-+ lhi $r0, [$r5 + 2]
-+ lhi $r0, [$r5 + 4]
-+ lhi $r0, [$r5 + 6]
-+ lhi $r0, [$r5 + 8]
-+ lhi $r0, [$r5 + 10]
-+ lhi $r0, [$r5 + 12]
-+ lhi $r0, [$r5 + 14]
-+ lhi $r0, [$r6 + 0]
-+ lhi $r0, [$r6 + 2]
-+ lhi $r0, [$r6 + 4]
-+ lhi $r0, [$r6 + 6]
-+ lhi $r0, [$r6 + 8]
-+ lhi $r0, [$r6 + 10]
-+ lhi $r0, [$r6 + 12]
-+ lhi $r0, [$r6 + 14]
-+ lhi $r0, [$r7 + 0]
-+ lhi $r0, [$r7 + 2]
-+ lhi $r0, [$r7 + 4]
-+ lhi $r0, [$r7 + 6]
-+ lhi $r0, [$r7 + 8]
-+ lhi $r0, [$r7 + 10]
-+ lhi $r0, [$r7 + 12]
-+ lhi $r0, [$r7 + 14]
-+ lhi $r1, [$r0 + 0]
-+ lhi $r1, [$r0 + 2]
-+ lhi $r1, [$r0 + 4]
-+ lhi $r1, [$r0 + 6]
-+ lhi $r1, [$r0 + 8]
-+ lhi $r1, [$r0 + 10]
-+ lhi $r1, [$r0 + 12]
-+ lhi $r1, [$r0 + 14]
-+ lhi $r1, [$r1 + 0]
-+ lhi $r1, [$r1 + 2]
-+ lhi $r1, [$r1 + 4]
-+ lhi $r1, [$r1 + 6]
-+ lhi $r1, [$r1 + 8]
-+ lhi $r1, [$r1 + 10]
-+ lhi $r1, [$r1 + 12]
-+ lhi $r1, [$r1 + 14]
-+ lhi $r1, [$r2 + 0]
-+ lhi $r1, [$r2 + 2]
-+ lhi $r1, [$r2 + 4]
-+ lhi $r1, [$r2 + 6]
-+ lhi $r1, [$r2 + 8]
-+ lhi $r1, [$r2 + 10]
-+ lhi $r1, [$r2 + 12]
-+ lhi $r1, [$r2 + 14]
-+ lhi $r1, [$r3 + 0]
-+ lhi $r1, [$r3 + 2]
-+ lhi $r1, [$r3 + 4]
-+ lhi $r1, [$r3 + 6]
-+ lhi $r1, [$r3 + 8]
-+ lhi $r1, [$r3 + 10]
-+ lhi $r1, [$r3 + 12]
-+ lhi $r1, [$r3 + 14]
-+ lhi $r1, [$r4 + 0]
-+ lhi $r1, [$r4 + 2]
-+ lhi $r1, [$r4 + 4]
-+ lhi $r1, [$r4 + 6]
-+ lhi $r1, [$r4 + 8]
-+ lhi $r1, [$r4 + 10]
-+ lhi $r1, [$r4 + 12]
-+ lhi $r1, [$r4 + 14]
-+ lhi $r1, [$r5 + 0]
-+ lhi $r1, [$r5 + 2]
-+ lhi $r1, [$r5 + 4]
-+ lhi $r1, [$r5 + 6]
-+ lhi $r1, [$r5 + 8]
-+ lhi $r1, [$r5 + 10]
-+ lhi $r1, [$r5 + 12]
-+ lhi $r1, [$r5 + 14]
-+ lhi $r1, [$r6 + 0]
-+ lhi $r1, [$r6 + 2]
-+ lhi $r1, [$r6 + 4]
-+ lhi $r1, [$r6 + 6]
-+ lhi $r1, [$r6 + 8]
-+ lhi $r1, [$r6 + 10]
-+ lhi $r1, [$r6 + 12]
-+ lhi $r1, [$r6 + 14]
-+ lhi $r1, [$r7 + 0]
-+ lhi $r1, [$r7 + 2]
-+ lhi $r1, [$r7 + 4]
-+ lhi $r1, [$r7 + 6]
-+ lhi $r1, [$r7 + 8]
-+ lhi $r1, [$r7 + 10]
-+ lhi $r1, [$r7 + 12]
-+ lhi $r1, [$r7 + 14]
-+ lhi $r2, [$r0 + 0]
-+ lhi $r2, [$r0 + 2]
-+ lhi $r2, [$r0 + 4]
-+ lhi $r2, [$r0 + 6]
-+ lhi $r2, [$r0 + 8]
-+ lhi $r2, [$r0 + 10]
-+ lhi $r2, [$r0 + 12]
-+ lhi $r2, [$r0 + 14]
-+ lhi $r2, [$r1 + 0]
-+ lhi $r2, [$r1 + 2]
-+ lhi $r2, [$r1 + 4]
-+ lhi $r2, [$r1 + 6]
-+ lhi $r2, [$r1 + 8]
-+ lhi $r2, [$r1 + 10]
-+ lhi $r2, [$r1 + 12]
-+ lhi $r2, [$r1 + 14]
-+ lhi $r2, [$r2 + 0]
-+ lhi $r2, [$r2 + 2]
-+ lhi $r2, [$r2 + 4]
-+ lhi $r2, [$r2 + 6]
-+ lhi $r2, [$r2 + 8]
-+ lhi $r2, [$r2 + 10]
-+ lhi $r2, [$r2 + 12]
-+ lhi $r2, [$r2 + 14]
-+ lhi $r2, [$r3 + 0]
-+ lhi $r2, [$r3 + 2]
-+ lhi $r2, [$r3 + 4]
-+ lhi $r2, [$r3 + 6]
-+ lhi $r2, [$r3 + 8]
-+ lhi $r2, [$r3 + 10]
-+ lhi $r2, [$r3 + 12]
-+ lhi $r2, [$r3 + 14]
-+ lhi $r2, [$r4 + 0]
-+ lhi $r2, [$r4 + 2]
-+ lhi $r2, [$r4 + 4]
-+ lhi $r2, [$r4 + 6]
-+ lhi $r2, [$r4 + 8]
-+ lhi $r2, [$r4 + 10]
-+ lhi $r2, [$r4 + 12]
-+ lhi $r2, [$r4 + 14]
-+ lhi $r2, [$r5 + 0]
-+ lhi $r2, [$r5 + 2]
-+ lhi $r2, [$r5 + 4]
-+ lhi $r2, [$r5 + 6]
-+ lhi $r2, [$r5 + 8]
-+ lhi $r2, [$r5 + 10]
-+ lhi $r2, [$r5 + 12]
-+ lhi $r2, [$r5 + 14]
-+ lhi $r2, [$r6 + 0]
-+ lhi $r2, [$r6 + 2]
-+ lhi $r2, [$r6 + 4]
-+ lhi $r2, [$r6 + 6]
-+ lhi $r2, [$r6 + 8]
-+ lhi $r2, [$r6 + 10]
-+ lhi $r2, [$r6 + 12]
-+ lhi $r2, [$r6 + 14]
-+ lhi $r2, [$r7 + 0]
-+ lhi $r2, [$r7 + 2]
-+ lhi $r2, [$r7 + 4]
-+ lhi $r2, [$r7 + 6]
-+ lhi $r2, [$r7 + 8]
-+ lhi $r2, [$r7 + 10]
-+ lhi $r2, [$r7 + 12]
-+ lhi $r2, [$r7 + 14]
-+ lhi $r3, [$r0 + 0]
-+ lhi $r3, [$r0 + 2]
-+ lhi $r3, [$r0 + 4]
-+ lhi $r3, [$r0 + 6]
-+ lhi $r3, [$r0 + 8]
-+ lhi $r3, [$r0 + 10]
-+ lhi $r3, [$r0 + 12]
-+ lhi $r3, [$r0 + 14]
-+ lhi $r3, [$r1 + 0]
-+ lhi $r3, [$r1 + 2]
-+ lhi $r3, [$r1 + 4]
-+ lhi $r3, [$r1 + 6]
-+ lhi $r3, [$r1 + 8]
-+ lhi $r3, [$r1 + 10]
-+ lhi $r3, [$r1 + 12]
-+ lhi $r3, [$r1 + 14]
-+ lhi $r3, [$r2 + 0]
-+ lhi $r3, [$r2 + 2]
-+ lhi $r3, [$r2 + 4]
-+ lhi $r3, [$r2 + 6]
-+ lhi $r3, [$r2 + 8]
-+ lhi $r3, [$r2 + 10]
-+ lhi $r3, [$r2 + 12]
-+ lhi $r3, [$r2 + 14]
-+ lhi $r3, [$r3 + 0]
-+ lhi $r3, [$r3 + 2]
-+ lhi $r3, [$r3 + 4]
-+ lhi $r3, [$r3 + 6]
-+ lhi $r3, [$r3 + 8]
-+ lhi $r3, [$r3 + 10]
-+ lhi $r3, [$r3 + 12]
-+ lhi $r3, [$r3 + 14]
-+ lhi $r3, [$r4 + 0]
-+ lhi $r3, [$r4 + 2]
-+ lhi $r3, [$r4 + 4]
-+ lhi $r3, [$r4 + 6]
-+ lhi $r3, [$r4 + 8]
-+ lhi $r3, [$r4 + 10]
-+ lhi $r3, [$r4 + 12]
-+ lhi $r3, [$r4 + 14]
-+ lhi $r3, [$r5 + 0]
-+ lhi $r3, [$r5 + 2]
-+ lhi $r3, [$r5 + 4]
-+ lhi $r3, [$r5 + 6]
-+ lhi $r3, [$r5 + 8]
-+ lhi $r3, [$r5 + 10]
-+ lhi $r3, [$r5 + 12]
-+ lhi $r3, [$r5 + 14]
-+ lhi $r3, [$r6 + 0]
-+ lhi $r3, [$r6 + 2]
-+ lhi $r3, [$r6 + 4]
-+ lhi $r3, [$r6 + 6]
-+ lhi $r3, [$r6 + 8]
-+ lhi $r3, [$r6 + 10]
-+ lhi $r3, [$r6 + 12]
-+ lhi $r3, [$r6 + 14]
-+ lhi $r3, [$r7 + 0]
-+ lhi $r3, [$r7 + 2]
-+ lhi $r3, [$r7 + 4]
-+ lhi $r3, [$r7 + 6]
-+ lhi $r3, [$r7 + 8]
-+ lhi $r3, [$r7 + 10]
-+ lhi $r3, [$r7 + 12]
-+ lhi $r3, [$r7 + 14]
-+ lhi $r4, [$r0 + 0]
-+ lhi $r4, [$r0 + 2]
-+ lhi $r4, [$r0 + 4]
-+ lhi $r4, [$r0 + 6]
-+ lhi $r4, [$r0 + 8]
-+ lhi $r4, [$r0 + 10]
-+ lhi $r4, [$r0 + 12]
-+ lhi $r4, [$r0 + 14]
-+ lhi $r4, [$r1 + 0]
-+ lhi $r4, [$r1 + 2]
-+ lhi $r4, [$r1 + 4]
-+ lhi $r4, [$r1 + 6]
-+ lhi $r4, [$r1 + 8]
-+ lhi $r4, [$r1 + 10]
-+ lhi $r4, [$r1 + 12]
-+ lhi $r4, [$r1 + 14]
-+ lhi $r4, [$r2 + 0]
-+ lhi $r4, [$r2 + 2]
-+ lhi $r4, [$r2 + 4]
-+ lhi $r4, [$r2 + 6]
-+ lhi $r4, [$r2 + 8]
-+ lhi $r4, [$r2 + 10]
-+ lhi $r4, [$r2 + 12]
-+ lhi $r4, [$r2 + 14]
-+ lhi $r4, [$r3 + 0]
-+ lhi $r4, [$r3 + 2]
-+ lhi $r4, [$r3 + 4]
-+ lhi $r4, [$r3 + 6]
-+ lhi $r4, [$r3 + 8]
-+ lhi $r4, [$r3 + 10]
-+ lhi $r4, [$r3 + 12]
-+ lhi $r4, [$r3 + 14]
-+ lhi $r4, [$r4 + 0]
-+ lhi $r4, [$r4 + 2]
-+ lhi $r4, [$r4 + 4]
-+ lhi $r4, [$r4 + 6]
-+ lhi $r4, [$r4 + 8]
-+ lhi $r4, [$r4 + 10]
-+ lhi $r4, [$r4 + 12]
-+ lhi $r4, [$r4 + 14]
-+ lhi $r4, [$r5 + 0]
-+ lhi $r4, [$r5 + 2]
-+ lhi $r4, [$r5 + 4]
-+ lhi $r4, [$r5 + 6]
-+ lhi $r4, [$r5 + 8]
-+ lhi $r4, [$r5 + 10]
-+ lhi $r4, [$r5 + 12]
-+ lhi $r4, [$r5 + 14]
-+ lhi $r4, [$r6 + 0]
-+ lhi $r4, [$r6 + 2]
-+ lhi $r4, [$r6 + 4]
-+ lhi $r4, [$r6 + 6]
-+ lhi $r4, [$r6 + 8]
-+ lhi $r4, [$r6 + 10]
-+ lhi $r4, [$r6 + 12]
-+ lhi $r4, [$r6 + 14]
-+ lhi $r4, [$r7 + 0]
-+ lhi $r4, [$r7 + 2]
-+ lhi $r4, [$r7 + 4]
-+ lhi $r4, [$r7 + 6]
-+ lhi $r4, [$r7 + 8]
-+ lhi $r4, [$r7 + 10]
-+ lhi $r4, [$r7 + 12]
-+ lhi $r4, [$r7 + 14]
-+ lhi $r5, [$r0 + 0]
-+ lhi $r5, [$r0 + 2]
-+ lhi $r5, [$r0 + 4]
-+ lhi $r5, [$r0 + 6]
-+ lhi $r5, [$r0 + 8]
-+ lhi $r5, [$r0 + 10]
-+ lhi $r5, [$r0 + 12]
-+ lhi $r5, [$r0 + 14]
-+ lhi $r5, [$r1 + 0]
-+ lhi $r5, [$r1 + 2]
-+ lhi $r5, [$r1 + 4]
-+ lhi $r5, [$r1 + 6]
-+ lhi $r5, [$r1 + 8]
-+ lhi $r5, [$r1 + 10]
-+ lhi $r5, [$r1 + 12]
-+ lhi $r5, [$r1 + 14]
-+ lhi $r5, [$r2 + 0]
-+ lhi $r5, [$r2 + 2]
-+ lhi $r5, [$r2 + 4]
-+ lhi $r5, [$r2 + 6]
-+ lhi $r5, [$r2 + 8]
-+ lhi $r5, [$r2 + 10]
-+ lhi $r5, [$r2 + 12]
-+ lhi $r5, [$r2 + 14]
-+ lhi $r5, [$r3 + 0]
-+ lhi $r5, [$r3 + 2]
-+ lhi $r5, [$r3 + 4]
-+ lhi $r5, [$r3 + 6]
-+ lhi $r5, [$r3 + 8]
-+ lhi $r5, [$r3 + 10]
-+ lhi $r5, [$r3 + 12]
-+ lhi $r5, [$r3 + 14]
-+ lhi $r5, [$r4 + 0]
-+ lhi $r5, [$r4 + 2]
-+ lhi $r5, [$r4 + 4]
-+ lhi $r5, [$r4 + 6]
-+ lhi $r5, [$r4 + 8]
-+ lhi $r5, [$r4 + 10]
-+ lhi $r5, [$r4 + 12]
-+ lhi $r5, [$r4 + 14]
-+ lhi $r5, [$r5 + 0]
-+ lhi $r5, [$r5 + 2]
-+ lhi $r5, [$r5 + 4]
-+ lhi $r5, [$r5 + 6]
-+ lhi $r5, [$r5 + 8]
-+ lhi $r5, [$r5 + 10]
-+ lhi $r5, [$r5 + 12]
-+ lhi $r5, [$r5 + 14]
-+ lhi $r5, [$r6 + 0]
-+ lhi $r5, [$r6 + 2]
-+ lhi $r5, [$r6 + 4]
-+ lhi $r5, [$r6 + 6]
-+ lhi $r5, [$r6 + 8]
-+ lhi $r5, [$r6 + 10]
-+ lhi $r5, [$r6 + 12]
-+ lhi $r5, [$r6 + 14]
-+ lhi $r5, [$r7 + 0]
-+ lhi $r5, [$r7 + 2]
-+ lhi $r5, [$r7 + 4]
-+ lhi $r5, [$r7 + 6]
-+ lhi $r5, [$r7 + 8]
-+ lhi $r5, [$r7 + 10]
-+ lhi $r5, [$r7 + 12]
-+ lhi $r5, [$r7 + 14]
-+ lhi $r6, [$r0 + 0]
-+ lhi $r6, [$r0 + 2]
-+ lhi $r6, [$r0 + 4]
-+ lhi $r6, [$r0 + 6]
-+ lhi $r6, [$r0 + 8]
-+ lhi $r6, [$r0 + 10]
-+ lhi $r6, [$r0 + 12]
-+ lhi $r6, [$r0 + 14]
-+ lhi $r6, [$r1 + 0]
-+ lhi $r6, [$r1 + 2]
-+ lhi $r6, [$r1 + 4]
-+ lhi $r6, [$r1 + 6]
-+ lhi $r6, [$r1 + 8]
-+ lhi $r6, [$r1 + 10]
-+ lhi $r6, [$r1 + 12]
-+ lhi $r6, [$r1 + 14]
-+ lhi $r6, [$r2 + 0]
-+ lhi $r6, [$r2 + 2]
-+ lhi $r6, [$r2 + 4]
-+ lhi $r6, [$r2 + 6]
-+ lhi $r6, [$r2 + 8]
-+ lhi $r6, [$r2 + 10]
-+ lhi $r6, [$r2 + 12]
-+ lhi $r6, [$r2 + 14]
-+ lhi $r6, [$r3 + 0]
-+ lhi $r6, [$r3 + 2]
-+ lhi $r6, [$r3 + 4]
-+ lhi $r6, [$r3 + 6]
-+ lhi $r6, [$r3 + 8]
-+ lhi $r6, [$r3 + 10]
-+ lhi $r6, [$r3 + 12]
-+ lhi $r6, [$r3 + 14]
-+ lhi $r6, [$r4 + 0]
-+ lhi $r6, [$r4 + 2]
-+ lhi $r6, [$r4 + 4]
-+ lhi $r6, [$r4 + 6]
-+ lhi $r6, [$r4 + 8]
-+ lhi $r6, [$r4 + 10]
-+ lhi $r6, [$r4 + 12]
-+ lhi $r6, [$r4 + 14]
-+ lhi $r6, [$r5 + 0]
-+ lhi $r6, [$r5 + 2]
-+ lhi $r6, [$r5 + 4]
-+ lhi $r6, [$r5 + 6]
-+ lhi $r6, [$r5 + 8]
-+ lhi $r6, [$r5 + 10]
-+ lhi $r6, [$r5 + 12]
-+ lhi $r6, [$r5 + 14]
-+ lhi $r6, [$r6 + 0]
-+ lhi $r6, [$r6 + 2]
-+ lhi $r6, [$r6 + 4]
-+ lhi $r6, [$r6 + 6]
-+ lhi $r6, [$r6 + 8]
-+ lhi $r6, [$r6 + 10]
-+ lhi $r6, [$r6 + 12]
-+ lhi $r6, [$r6 + 14]
-+ lhi $r6, [$r7 + 0]
-+ lhi $r6, [$r7 + 2]
-+ lhi $r6, [$r7 + 4]
-+ lhi $r6, [$r7 + 6]
-+ lhi $r6, [$r7 + 8]
-+ lhi $r6, [$r7 + 10]
-+ lhi $r6, [$r7 + 12]
-+ lhi $r6, [$r7 + 14]
-+ lhi $r7, [$r0 + 0]
-+ lhi $r7, [$r0 + 2]
-+ lhi $r7, [$r0 + 4]
-+ lhi $r7, [$r0 + 6]
-+ lhi $r7, [$r0 + 8]
-+ lhi $r7, [$r0 + 10]
-+ lhi $r7, [$r0 + 12]
-+ lhi $r7, [$r0 + 14]
-+ lhi $r7, [$r1 + 0]
-+ lhi $r7, [$r1 + 2]
-+ lhi $r7, [$r1 + 4]
-+ lhi $r7, [$r1 + 6]
-+ lhi $r7, [$r1 + 8]
-+ lhi $r7, [$r1 + 10]
-+ lhi $r7, [$r1 + 12]
-+ lhi $r7, [$r1 + 14]
-+ lhi $r7, [$r2 + 0]
-+ lhi $r7, [$r2 + 2]
-+ lhi $r7, [$r2 + 4]
-+ lhi $r7, [$r2 + 6]
-+ lhi $r7, [$r2 + 8]
-+ lhi $r7, [$r2 + 10]
-+ lhi $r7, [$r2 + 12]
-+ lhi $r7, [$r2 + 14]
-+ lhi $r7, [$r3 + 0]
-+ lhi $r7, [$r3 + 2]
-+ lhi $r7, [$r3 + 4]
-+ lhi $r7, [$r3 + 6]
-+ lhi $r7, [$r3 + 8]
-+ lhi $r7, [$r3 + 10]
-+ lhi $r7, [$r3 + 12]
-+ lhi $r7, [$r3 + 14]
-+ lhi $r7, [$r4 + 0]
-+ lhi $r7, [$r4 + 2]
-+ lhi $r7, [$r4 + 4]
-+ lhi $r7, [$r4 + 6]
-+ lhi $r7, [$r4 + 8]
-+ lhi $r7, [$r4 + 10]
-+ lhi $r7, [$r4 + 12]
-+ lhi $r7, [$r4 + 14]
-+ lhi $r7, [$r5 + 0]
-+ lhi $r7, [$r5 + 2]
-+ lhi $r7, [$r5 + 4]
-+ lhi $r7, [$r5 + 6]
-+ lhi $r7, [$r5 + 8]
-+ lhi $r7, [$r5 + 10]
-+ lhi $r7, [$r5 + 12]
-+ lhi $r7, [$r5 + 14]
-+ lhi $r7, [$r6 + 0]
-+ lhi $r7, [$r6 + 2]
-+ lhi $r7, [$r6 + 4]
-+ lhi $r7, [$r6 + 6]
-+ lhi $r7, [$r6 + 8]
-+ lhi $r7, [$r6 + 10]
-+ lhi $r7, [$r6 + 12]
-+ lhi $r7, [$r6 + 14]
-+ lhi $r7, [$r7 + 0]
-+ lhi $r7, [$r7 + 2]
-+ lhi $r7, [$r7 + 4]
-+ lhi $r7, [$r7 + 6]
-+ lhi $r7, [$r7 + 8]
-+ lhi $r7, [$r7 + 10]
-+ lhi $r7, [$r7 + 12]
-+ lhi $r7, [$r7 + 14]
-+ lbi $r0, [$r0 + 0]
-+ lbi $r0, [$r0 + 1]
-+ lbi $r0, [$r0 + 2]
-+ lbi $r0, [$r0 + 3]
-+ lbi $r0, [$r0 + 4]
-+ lbi $r0, [$r0 + 5]
-+ lbi $r0, [$r0 + 6]
-+ lbi $r0, [$r0 + 7]
-+ lbi $r0, [$r1 + 0]
-+ lbi $r0, [$r1 + 1]
-+ lbi $r0, [$r1 + 2]
-+ lbi $r0, [$r1 + 3]
-+ lbi $r0, [$r1 + 4]
-+ lbi $r0, [$r1 + 5]
-+ lbi $r0, [$r1 + 6]
-+ lbi $r0, [$r1 + 7]
-+ lbi $r0, [$r2 + 0]
-+ lbi $r0, [$r2 + 1]
-+ lbi $r0, [$r2 + 2]
-+ lbi $r0, [$r2 + 3]
-+ lbi $r0, [$r2 + 4]
-+ lbi $r0, [$r2 + 5]
-+ lbi $r0, [$r2 + 6]
-+ lbi $r0, [$r2 + 7]
-+ lbi $r0, [$r3 + 0]
-+ lbi $r0, [$r3 + 1]
-+ lbi $r0, [$r3 + 2]
-+ lbi $r0, [$r3 + 3]
-+ lbi $r0, [$r3 + 4]
-+ lbi $r0, [$r3 + 5]
-+ lbi $r0, [$r3 + 6]
-+ lbi $r0, [$r3 + 7]
-+ lbi $r0, [$r4 + 0]
-+ lbi $r0, [$r4 + 1]
-+ lbi $r0, [$r4 + 2]
-+ lbi $r0, [$r4 + 3]
-+ lbi $r0, [$r4 + 4]
-+ lbi $r0, [$r4 + 5]
-+ lbi $r0, [$r4 + 6]
-+ lbi $r0, [$r4 + 7]
-+ lbi $r0, [$r5 + 0]
-+ lbi $r0, [$r5 + 1]
-+ lbi $r0, [$r5 + 2]
-+ lbi $r0, [$r5 + 3]
-+ lbi $r0, [$r5 + 4]
-+ lbi $r0, [$r5 + 5]
-+ lbi $r0, [$r5 + 6]
-+ lbi $r0, [$r5 + 7]
-+ lbi $r0, [$r6 + 0]
-+ lbi $r0, [$r6 + 1]
-+ lbi $r0, [$r6 + 2]
-+ lbi $r0, [$r6 + 3]
-+ lbi $r0, [$r6 + 4]
-+ lbi $r0, [$r6 + 5]
-+ lbi $r0, [$r6 + 6]
-+ lbi $r0, [$r6 + 7]
-+ lbi $r0, [$r7 + 0]
-+ lbi $r0, [$r7 + 1]
-+ lbi $r0, [$r7 + 2]
-+ lbi $r0, [$r7 + 3]
-+ lbi $r0, [$r7 + 4]
-+ lbi $r0, [$r7 + 5]
-+ lbi $r0, [$r7 + 6]
-+ lbi $r0, [$r7 + 7]
-+ lbi $r1, [$r0 + 0]
-+ lbi $r1, [$r0 + 1]
-+ lbi $r1, [$r0 + 2]
-+ lbi $r1, [$r0 + 3]
-+ lbi $r1, [$r0 + 4]
-+ lbi $r1, [$r0 + 5]
-+ lbi $r1, [$r0 + 6]
-+ lbi $r1, [$r0 + 7]
-+ lbi $r1, [$r1 + 0]
-+ lbi $r1, [$r1 + 1]
-+ lbi $r1, [$r1 + 2]
-+ lbi $r1, [$r1 + 3]
-+ lbi $r1, [$r1 + 4]
-+ lbi $r1, [$r1 + 5]
-+ lbi $r1, [$r1 + 6]
-+ lbi $r1, [$r1 + 7]
-+ lbi $r1, [$r2 + 0]
-+ lbi $r1, [$r2 + 1]
-+ lbi $r1, [$r2 + 2]
-+ lbi $r1, [$r2 + 3]
-+ lbi $r1, [$r2 + 4]
-+ lbi $r1, [$r2 + 5]
-+ lbi $r1, [$r2 + 6]
-+ lbi $r1, [$r2 + 7]
-+ lbi $r1, [$r3 + 0]
-+ lbi $r1, [$r3 + 1]
-+ lbi $r1, [$r3 + 2]
-+ lbi $r1, [$r3 + 3]
-+ lbi $r1, [$r3 + 4]
-+ lbi $r1, [$r3 + 5]
-+ lbi $r1, [$r3 + 6]
-+ lbi $r1, [$r3 + 7]
-+ lbi $r1, [$r4 + 0]
-+ lbi $r1, [$r4 + 1]
-+ lbi $r1, [$r4 + 2]
-+ lbi $r1, [$r4 + 3]
-+ lbi $r1, [$r4 + 4]
-+ lbi $r1, [$r4 + 5]
-+ lbi $r1, [$r4 + 6]
-+ lbi $r1, [$r4 + 7]
-+ lbi $r1, [$r5 + 0]
-+ lbi $r1, [$r5 + 1]
-+ lbi $r1, [$r5 + 2]
-+ lbi $r1, [$r5 + 3]
-+ lbi $r1, [$r5 + 4]
-+ lbi $r1, [$r5 + 5]
-+ lbi $r1, [$r5 + 6]
-+ lbi $r1, [$r5 + 7]
-+ lbi $r1, [$r6 + 0]
-+ lbi $r1, [$r6 + 1]
-+ lbi $r1, [$r6 + 2]
-+ lbi $r1, [$r6 + 3]
-+ lbi $r1, [$r6 + 4]
-+ lbi $r1, [$r6 + 5]
-+ lbi $r1, [$r6 + 6]
-+ lbi $r1, [$r6 + 7]
-+ lbi $r1, [$r7 + 0]
-+ lbi $r1, [$r7 + 1]
-+ lbi $r1, [$r7 + 2]
-+ lbi $r1, [$r7 + 3]
-+ lbi $r1, [$r7 + 4]
-+ lbi $r1, [$r7 + 5]
-+ lbi $r1, [$r7 + 6]
-+ lbi $r1, [$r7 + 7]
-+ lbi $r2, [$r0 + 0]
-+ lbi $r2, [$r0 + 1]
-+ lbi $r2, [$r0 + 2]
-+ lbi $r2, [$r0 + 3]
-+ lbi $r2, [$r0 + 4]
-+ lbi $r2, [$r0 + 5]
-+ lbi $r2, [$r0 + 6]
-+ lbi $r2, [$r0 + 7]
-+ lbi $r2, [$r1 + 0]
-+ lbi $r2, [$r1 + 1]
-+ lbi $r2, [$r1 + 2]
-+ lbi $r2, [$r1 + 3]
-+ lbi $r2, [$r1 + 4]
-+ lbi $r2, [$r1 + 5]
-+ lbi $r2, [$r1 + 6]
-+ lbi $r2, [$r1 + 7]
-+ lbi $r2, [$r2 + 0]
-+ lbi $r2, [$r2 + 1]
-+ lbi $r2, [$r2 + 2]
-+ lbi $r2, [$r2 + 3]
-+ lbi $r2, [$r2 + 4]
-+ lbi $r2, [$r2 + 5]
-+ lbi $r2, [$r2 + 6]
-+ lbi $r2, [$r2 + 7]
-+ lbi $r2, [$r3 + 0]
-+ lbi $r2, [$r3 + 1]
-+ lbi $r2, [$r3 + 2]
-+ lbi $r2, [$r3 + 3]
-+ lbi $r2, [$r3 + 4]
-+ lbi $r2, [$r3 + 5]
-+ lbi $r2, [$r3 + 6]
-+ lbi $r2, [$r3 + 7]
-+ lbi $r2, [$r4 + 0]
-+ lbi $r2, [$r4 + 1]
-+ lbi $r2, [$r4 + 2]
-+ lbi $r2, [$r4 + 3]
-+ lbi $r2, [$r4 + 4]
-+ lbi $r2, [$r4 + 5]
-+ lbi $r2, [$r4 + 6]
-+ lbi $r2, [$r4 + 7]
-+ lbi $r2, [$r5 + 0]
-+ lbi $r2, [$r5 + 1]
-+ lbi $r2, [$r5 + 2]
-+ lbi $r2, [$r5 + 3]
-+ lbi $r2, [$r5 + 4]
-+ lbi $r2, [$r5 + 5]
-+ lbi $r2, [$r5 + 6]
-+ lbi $r2, [$r5 + 7]
-+ lbi $r2, [$r6 + 0]
-+ lbi $r2, [$r6 + 1]
-+ lbi $r2, [$r6 + 2]
-+ lbi $r2, [$r6 + 3]
-+ lbi $r2, [$r6 + 4]
-+ lbi $r2, [$r6 + 5]
-+ lbi $r2, [$r6 + 6]
-+ lbi $r2, [$r6 + 7]
-+ lbi $r2, [$r7 + 0]
-+ lbi $r2, [$r7 + 1]
-+ lbi $r2, [$r7 + 2]
-+ lbi $r2, [$r7 + 3]
-+ lbi $r2, [$r7 + 4]
-+ lbi $r2, [$r7 + 5]
-+ lbi $r2, [$r7 + 6]
-+ lbi $r2, [$r7 + 7]
-+ lbi $r3, [$r0 + 0]
-+ lbi $r3, [$r0 + 1]
-+ lbi $r3, [$r0 + 2]
-+ lbi $r3, [$r0 + 3]
-+ lbi $r3, [$r0 + 4]
-+ lbi $r3, [$r0 + 5]
-+ lbi $r3, [$r0 + 6]
-+ lbi $r3, [$r0 + 7]
-+ lbi $r3, [$r1 + 0]
-+ lbi $r3, [$r1 + 1]
-+ lbi $r3, [$r1 + 2]
-+ lbi $r3, [$r1 + 3]
-+ lbi $r3, [$r1 + 4]
-+ lbi $r3, [$r1 + 5]
-+ lbi $r3, [$r1 + 6]
-+ lbi $r3, [$r1 + 7]
-+ lbi $r3, [$r2 + 0]
-+ lbi $r3, [$r2 + 1]
-+ lbi $r3, [$r2 + 2]
-+ lbi $r3, [$r2 + 3]
-+ lbi $r3, [$r2 + 4]
-+ lbi $r3, [$r2 + 5]
-+ lbi $r3, [$r2 + 6]
-+ lbi $r3, [$r2 + 7]
-+ lbi $r3, [$r3 + 0]
-+ lbi $r3, [$r3 + 1]
-+ lbi $r3, [$r3 + 2]
-+ lbi $r3, [$r3 + 3]
-+ lbi $r3, [$r3 + 4]
-+ lbi $r3, [$r3 + 5]
-+ lbi $r3, [$r3 + 6]
-+ lbi $r3, [$r3 + 7]
-+ lbi $r3, [$r4 + 0]
-+ lbi $r3, [$r4 + 1]
-+ lbi $r3, [$r4 + 2]
-+ lbi $r3, [$r4 + 3]
-+ lbi $r3, [$r4 + 4]
-+ lbi $r3, [$r4 + 5]
-+ lbi $r3, [$r4 + 6]
-+ lbi $r3, [$r4 + 7]
-+ lbi $r3, [$r5 + 0]
-+ lbi $r3, [$r5 + 1]
-+ lbi $r3, [$r5 + 2]
-+ lbi $r3, [$r5 + 3]
-+ lbi $r3, [$r5 + 4]
-+ lbi $r3, [$r5 + 5]
-+ lbi $r3, [$r5 + 6]
-+ lbi $r3, [$r5 + 7]
-+ lbi $r3, [$r6 + 0]
-+ lbi $r3, [$r6 + 1]
-+ lbi $r3, [$r6 + 2]
-+ lbi $r3, [$r6 + 3]
-+ lbi $r3, [$r6 + 4]
-+ lbi $r3, [$r6 + 5]
-+ lbi $r3, [$r6 + 6]
-+ lbi $r3, [$r6 + 7]
-+ lbi $r3, [$r7 + 0]
-+ lbi $r3, [$r7 + 1]
-+ lbi $r3, [$r7 + 2]
-+ lbi $r3, [$r7 + 3]
-+ lbi $r3, [$r7 + 4]
-+ lbi $r3, [$r7 + 5]
-+ lbi $r3, [$r7 + 6]
-+ lbi $r3, [$r7 + 7]
-+ lbi $r4, [$r0 + 0]
-+ lbi $r4, [$r0 + 1]
-+ lbi $r4, [$r0 + 2]
-+ lbi $r4, [$r0 + 3]
-+ lbi $r4, [$r0 + 4]
-+ lbi $r4, [$r0 + 5]
-+ lbi $r4, [$r0 + 6]
-+ lbi $r4, [$r0 + 7]
-+ lbi $r4, [$r1 + 0]
-+ lbi $r4, [$r1 + 1]
-+ lbi $r4, [$r1 + 2]
-+ lbi $r4, [$r1 + 3]
-+ lbi $r4, [$r1 + 4]
-+ lbi $r4, [$r1 + 5]
-+ lbi $r4, [$r1 + 6]
-+ lbi $r4, [$r1 + 7]
-+ lbi $r4, [$r2 + 0]
-+ lbi $r4, [$r2 + 1]
-+ lbi $r4, [$r2 + 2]
-+ lbi $r4, [$r2 + 3]
-+ lbi $r4, [$r2 + 4]
-+ lbi $r4, [$r2 + 5]
-+ lbi $r4, [$r2 + 6]
-+ lbi $r4, [$r2 + 7]
-+ lbi $r4, [$r3 + 0]
-+ lbi $r4, [$r3 + 1]
-+ lbi $r4, [$r3 + 2]
-+ lbi $r4, [$r3 + 3]
-+ lbi $r4, [$r3 + 4]
-+ lbi $r4, [$r3 + 5]
-+ lbi $r4, [$r3 + 6]
-+ lbi $r4, [$r3 + 7]
-+ lbi $r4, [$r4 + 0]
-+ lbi $r4, [$r4 + 1]
-+ lbi $r4, [$r4 + 2]
-+ lbi $r4, [$r4 + 3]
-+ lbi $r4, [$r4 + 4]
-+ lbi $r4, [$r4 + 5]
-+ lbi $r4, [$r4 + 6]
-+ lbi $r4, [$r4 + 7]
-+ lbi $r4, [$r5 + 0]
-+ lbi $r4, [$r5 + 1]
-+ lbi $r4, [$r5 + 2]
-+ lbi $r4, [$r5 + 3]
-+ lbi $r4, [$r5 + 4]
-+ lbi $r4, [$r5 + 5]
-+ lbi $r4, [$r5 + 6]
-+ lbi $r4, [$r5 + 7]
-+ lbi $r4, [$r6 + 0]
-+ lbi $r4, [$r6 + 1]
-+ lbi $r4, [$r6 + 2]
-+ lbi $r4, [$r6 + 3]
-+ lbi $r4, [$r6 + 4]
-+ lbi $r4, [$r6 + 5]
-+ lbi $r4, [$r6 + 6]
-+ lbi $r4, [$r6 + 7]
-+ lbi $r4, [$r7 + 0]
-+ lbi $r4, [$r7 + 1]
-+ lbi $r4, [$r7 + 2]
-+ lbi $r4, [$r7 + 3]
-+ lbi $r4, [$r7 + 4]
-+ lbi $r4, [$r7 + 5]
-+ lbi $r4, [$r7 + 6]
-+ lbi $r4, [$r7 + 7]
-+ lbi $r5, [$r0 + 0]
-+ lbi $r5, [$r0 + 1]
-+ lbi $r5, [$r0 + 2]
-+ lbi $r5, [$r0 + 3]
-+ lbi $r5, [$r0 + 4]
-+ lbi $r5, [$r0 + 5]
-+ lbi $r5, [$r0 + 6]
-+ lbi $r5, [$r0 + 7]
-+ lbi $r5, [$r1 + 0]
-+ lbi $r5, [$r1 + 1]
-+ lbi $r5, [$r1 + 2]
-+ lbi $r5, [$r1 + 3]
-+ lbi $r5, [$r1 + 4]
-+ lbi $r5, [$r1 + 5]
-+ lbi $r5, [$r1 + 6]
-+ lbi $r5, [$r1 + 7]
-+ lbi $r5, [$r2 + 0]
-+ lbi $r5, [$r2 + 1]
-+ lbi $r5, [$r2 + 2]
-+ lbi $r5, [$r2 + 3]
-+ lbi $r5, [$r2 + 4]
-+ lbi $r5, [$r2 + 5]
-+ lbi $r5, [$r2 + 6]
-+ lbi $r5, [$r2 + 7]
-+ lbi $r5, [$r3 + 0]
-+ lbi $r5, [$r3 + 1]
-+ lbi $r5, [$r3 + 2]
-+ lbi $r5, [$r3 + 3]
-+ lbi $r5, [$r3 + 4]
-+ lbi $r5, [$r3 + 5]
-+ lbi $r5, [$r3 + 6]
-+ lbi $r5, [$r3 + 7]
-+ lbi $r5, [$r4 + 0]
-+ lbi $r5, [$r4 + 1]
-+ lbi $r5, [$r4 + 2]
-+ lbi $r5, [$r4 + 3]
-+ lbi $r5, [$r4 + 4]
-+ lbi $r5, [$r4 + 5]
-+ lbi $r5, [$r4 + 6]
-+ lbi $r5, [$r4 + 7]
-+ lbi $r5, [$r5 + 0]
-+ lbi $r5, [$r5 + 1]
-+ lbi $r5, [$r5 + 2]
-+ lbi $r5, [$r5 + 3]
-+ lbi $r5, [$r5 + 4]
-+ lbi $r5, [$r5 + 5]
-+ lbi $r5, [$r5 + 6]
-+ lbi $r5, [$r5 + 7]
-+ lbi $r5, [$r6 + 0]
-+ lbi $r5, [$r6 + 1]
-+ lbi $r5, [$r6 + 2]
-+ lbi $r5, [$r6 + 3]
-+ lbi $r5, [$r6 + 4]
-+ lbi $r5, [$r6 + 5]
-+ lbi $r5, [$r6 + 6]
-+ lbi $r5, [$r6 + 7]
-+ lbi $r5, [$r7 + 0]
-+ lbi $r5, [$r7 + 1]
-+ lbi $r5, [$r7 + 2]
-+ lbi $r5, [$r7 + 3]
-+ lbi $r5, [$r7 + 4]
-+ lbi $r5, [$r7 + 5]
-+ lbi $r5, [$r7 + 6]
-+ lbi $r5, [$r7 + 7]
-+ lbi $r6, [$r0 + 0]
-+ lbi $r6, [$r0 + 1]
-+ lbi $r6, [$r0 + 2]
-+ lbi $r6, [$r0 + 3]
-+ lbi $r6, [$r0 + 4]
-+ lbi $r6, [$r0 + 5]
-+ lbi $r6, [$r0 + 6]
-+ lbi $r6, [$r0 + 7]
-+ lbi $r6, [$r1 + 0]
-+ lbi $r6, [$r1 + 1]
-+ lbi $r6, [$r1 + 2]
-+ lbi $r6, [$r1 + 3]
-+ lbi $r6, [$r1 + 4]
-+ lbi $r6, [$r1 + 5]
-+ lbi $r6, [$r1 + 6]
-+ lbi $r6, [$r1 + 7]
-+ lbi $r6, [$r2 + 0]
-+ lbi $r6, [$r2 + 1]
-+ lbi $r6, [$r2 + 2]
-+ lbi $r6, [$r2 + 3]
-+ lbi $r6, [$r2 + 4]
-+ lbi $r6, [$r2 + 5]
-+ lbi $r6, [$r2 + 6]
-+ lbi $r6, [$r2 + 7]
-+ lbi $r6, [$r3 + 0]
-+ lbi $r6, [$r3 + 1]
-+ lbi $r6, [$r3 + 2]
-+ lbi $r6, [$r3 + 3]
-+ lbi $r6, [$r3 + 4]
-+ lbi $r6, [$r3 + 5]
-+ lbi $r6, [$r3 + 6]
-+ lbi $r6, [$r3 + 7]
-+ lbi $r6, [$r4 + 0]
-+ lbi $r6, [$r4 + 1]
-+ lbi $r6, [$r4 + 2]
-+ lbi $r6, [$r4 + 3]
-+ lbi $r6, [$r4 + 4]
-+ lbi $r6, [$r4 + 5]
-+ lbi $r6, [$r4 + 6]
-+ lbi $r6, [$r4 + 7]
-+ lbi $r6, [$r5 + 0]
-+ lbi $r6, [$r5 + 1]
-+ lbi $r6, [$r5 + 2]
-+ lbi $r6, [$r5 + 3]
-+ lbi $r6, [$r5 + 4]
-+ lbi $r6, [$r5 + 5]
-+ lbi $r6, [$r5 + 6]
-+ lbi $r6, [$r5 + 7]
-+ lbi $r6, [$r6 + 0]
-+ lbi $r6, [$r6 + 1]
-+ lbi $r6, [$r6 + 2]
-+ lbi $r6, [$r6 + 3]
-+ lbi $r6, [$r6 + 4]
-+ lbi $r6, [$r6 + 5]
-+ lbi $r6, [$r6 + 6]
-+ lbi $r6, [$r6 + 7]
-+ lbi $r6, [$r7 + 0]
-+ lbi $r6, [$r7 + 1]
-+ lbi $r6, [$r7 + 2]
-+ lbi $r6, [$r7 + 3]
-+ lbi $r6, [$r7 + 4]
-+ lbi $r6, [$r7 + 5]
-+ lbi $r6, [$r7 + 6]
-+ lbi $r6, [$r7 + 7]
-+ lbi $r7, [$r0 + 0]
-+ lbi $r7, [$r0 + 1]
-+ lbi $r7, [$r0 + 2]
-+ lbi $r7, [$r0 + 3]
-+ lbi $r7, [$r0 + 4]
-+ lbi $r7, [$r0 + 5]
-+ lbi $r7, [$r0 + 6]
-+ lbi $r7, [$r0 + 7]
-+ lbi $r7, [$r1 + 0]
-+ lbi $r7, [$r1 + 1]
-+ lbi $r7, [$r1 + 2]
-+ lbi $r7, [$r1 + 3]
-+ lbi $r7, [$r1 + 4]
-+ lbi $r7, [$r1 + 5]
-+ lbi $r7, [$r1 + 6]
-+ lbi $r7, [$r1 + 7]
-+ lbi $r7, [$r2 + 0]
-+ lbi $r7, [$r2 + 1]
-+ lbi $r7, [$r2 + 2]
-+ lbi $r7, [$r2 + 3]
-+ lbi $r7, [$r2 + 4]
-+ lbi $r7, [$r2 + 5]
-+ lbi $r7, [$r2 + 6]
-+ lbi $r7, [$r2 + 7]
-+ lbi $r7, [$r3 + 0]
-+ lbi $r7, [$r3 + 1]
-+ lbi $r7, [$r3 + 2]
-+ lbi $r7, [$r3 + 3]
-+ lbi $r7, [$r3 + 4]
-+ lbi $r7, [$r3 + 5]
-+ lbi $r7, [$r3 + 6]
-+ lbi $r7, [$r3 + 7]
-+ lbi $r7, [$r4 + 0]
-+ lbi $r7, [$r4 + 1]
-+ lbi $r7, [$r4 + 2]
-+ lbi $r7, [$r4 + 3]
-+ lbi $r7, [$r4 + 4]
-+ lbi $r7, [$r4 + 5]
-+ lbi $r7, [$r4 + 6]
-+ lbi $r7, [$r4 + 7]
-+ lbi $r7, [$r5 + 0]
-+ lbi $r7, [$r5 + 1]
-+ lbi $r7, [$r5 + 2]
-+ lbi $r7, [$r5 + 3]
-+ lbi $r7, [$r5 + 4]
-+ lbi $r7, [$r5 + 5]
-+ lbi $r7, [$r5 + 6]
-+ lbi $r7, [$r5 + 7]
-+ lbi $r7, [$r6 + 0]
-+ lbi $r7, [$r6 + 1]
-+ lbi $r7, [$r6 + 2]
-+ lbi $r7, [$r6 + 3]
-+ lbi $r7, [$r6 + 4]
-+ lbi $r7, [$r6 + 5]
-+ lbi $r7, [$r6 + 6]
-+ lbi $r7, [$r6 + 7]
-+ lbi $r7, [$r7 + 0]
-+ lbi $r7, [$r7 + 1]
-+ lbi $r7, [$r7 + 2]
-+ lbi $r7, [$r7 + 3]
-+ lbi $r7, [$r7 + 4]
-+ lbi $r7, [$r7 + 5]
-+ lbi $r7, [$r7 + 6]
-+ lbi $r7, [$r7 + 7]
-+ swi $r0, [$r0 + 0]
-+ swi $r0, [$r0 + 4]
-+ swi $r0, [$r0 + 8]
-+ swi $r0, [$r0 + 12]
-+ swi $r0, [$r0 + 16]
-+ swi $r0, [$r0 + 20]
-+ swi $r0, [$r0 + 24]
-+ swi $r0, [$r0 + 28]
-+ swi $r0, [$r1 + 0]
-+ swi $r0, [$r1 + 4]
-+ swi $r0, [$r1 + 8]
-+ swi $r0, [$r1 + 12]
-+ swi $r0, [$r1 + 16]
-+ swi $r0, [$r1 + 20]
-+ swi $r0, [$r1 + 24]
-+ swi $r0, [$r1 + 28]
-+ swi $r0, [$r2 + 0]
-+ swi $r0, [$r2 + 4]
-+ swi $r0, [$r2 + 8]
-+ swi $r0, [$r2 + 12]
-+ swi $r0, [$r2 + 16]
-+ swi $r0, [$r2 + 20]
-+ swi $r0, [$r2 + 24]
-+ swi $r0, [$r2 + 28]
-+ swi $r0, [$r3 + 0]
-+ swi $r0, [$r3 + 4]
-+ swi $r0, [$r3 + 8]
-+ swi $r0, [$r3 + 12]
-+ swi $r0, [$r3 + 16]
-+ swi $r0, [$r3 + 20]
-+ swi $r0, [$r3 + 24]
-+ swi $r0, [$r3 + 28]
-+ swi $r0, [$r4 + 0]
-+ swi $r0, [$r4 + 4]
-+ swi $r0, [$r4 + 8]
-+ swi $r0, [$r4 + 12]
-+ swi $r0, [$r4 + 16]
-+ swi $r0, [$r4 + 20]
-+ swi $r0, [$r4 + 24]
-+ swi $r0, [$r4 + 28]
-+ swi $r0, [$r5 + 0]
-+ swi $r0, [$r5 + 4]
-+ swi $r0, [$r5 + 8]
-+ swi $r0, [$r5 + 12]
-+ swi $r0, [$r5 + 16]
-+ swi $r0, [$r5 + 20]
-+ swi $r0, [$r5 + 24]
-+ swi $r0, [$r5 + 28]
-+ swi $r0, [$r6 + 0]
-+ swi $r0, [$r6 + 4]
-+ swi $r0, [$r6 + 8]
-+ swi $r0, [$r6 + 12]
-+ swi $r0, [$r6 + 16]
-+ swi $r0, [$r6 + 20]
-+ swi $r0, [$r6 + 24]
-+ swi $r0, [$r6 + 28]
-+ swi $r0, [$r7 + 0]
-+ swi $r0, [$r7 + 4]
-+ swi $r0, [$r7 + 8]
-+ swi $r0, [$r7 + 12]
-+ swi $r0, [$r7 + 16]
-+ swi $r0, [$r7 + 20]
-+ swi $r0, [$r7 + 24]
-+ swi $r0, [$r7 + 28]
-+ swi $r1, [$r0 + 0]
-+ swi $r1, [$r0 + 4]
-+ swi $r1, [$r0 + 8]
-+ swi $r1, [$r0 + 12]
-+ swi $r1, [$r0 + 16]
-+ swi $r1, [$r0 + 20]
-+ swi $r1, [$r0 + 24]
-+ swi $r1, [$r0 + 28]
-+ swi $r1, [$r1 + 0]
-+ swi $r1, [$r1 + 4]
-+ swi $r1, [$r1 + 8]
-+ swi $r1, [$r1 + 12]
-+ swi $r1, [$r1 + 16]
-+ swi $r1, [$r1 + 20]
-+ swi $r1, [$r1 + 24]
-+ swi $r1, [$r1 + 28]
-+ swi $r1, [$r2 + 0]
-+ swi $r1, [$r2 + 4]
-+ swi $r1, [$r2 + 8]
-+ swi $r1, [$r2 + 12]
-+ swi $r1, [$r2 + 16]
-+ swi $r1, [$r2 + 20]
-+ swi $r1, [$r2 + 24]
-+ swi $r1, [$r2 + 28]
-+ swi $r1, [$r3 + 0]
-+ swi $r1, [$r3 + 4]
-+ swi $r1, [$r3 + 8]
-+ swi $r1, [$r3 + 12]
-+ swi $r1, [$r3 + 16]
-+ swi $r1, [$r3 + 20]
-+ swi $r1, [$r3 + 24]
-+ swi $r1, [$r3 + 28]
-+ swi $r1, [$r4 + 0]
-+ swi $r1, [$r4 + 4]
-+ swi $r1, [$r4 + 8]
-+ swi $r1, [$r4 + 12]
-+ swi $r1, [$r4 + 16]
-+ swi $r1, [$r4 + 20]
-+ swi $r1, [$r4 + 24]
-+ swi $r1, [$r4 + 28]
-+ swi $r1, [$r5 + 0]
-+ swi $r1, [$r5 + 4]
-+ swi $r1, [$r5 + 8]
-+ swi $r1, [$r5 + 12]
-+ swi $r1, [$r5 + 16]
-+ swi $r1, [$r5 + 20]
-+ swi $r1, [$r5 + 24]
-+ swi $r1, [$r5 + 28]
-+ swi $r1, [$r6 + 0]
-+ swi $r1, [$r6 + 4]
-+ swi $r1, [$r6 + 8]
-+ swi $r1, [$r6 + 12]
-+ swi $r1, [$r6 + 16]
-+ swi $r1, [$r6 + 20]
-+ swi $r1, [$r6 + 24]
-+ swi $r1, [$r6 + 28]
-+ swi $r1, [$r7 + 0]
-+ swi $r1, [$r7 + 4]
-+ swi $r1, [$r7 + 8]
-+ swi $r1, [$r7 + 12]
-+ swi $r1, [$r7 + 16]
-+ swi $r1, [$r7 + 20]
-+ swi $r1, [$r7 + 24]
-+ swi $r1, [$r7 + 28]
-+ swi $r2, [$r0 + 0]
-+ swi $r2, [$r0 + 4]
-+ swi $r2, [$r0 + 8]
-+ swi $r2, [$r0 + 12]
-+ swi $r2, [$r0 + 16]
-+ swi $r2, [$r0 + 20]
-+ swi $r2, [$r0 + 24]
-+ swi $r2, [$r0 + 28]
-+ swi $r2, [$r1 + 0]
-+ swi $r2, [$r1 + 4]
-+ swi $r2, [$r1 + 8]
-+ swi $r2, [$r1 + 12]
-+ swi $r2, [$r1 + 16]
-+ swi $r2, [$r1 + 20]
-+ swi $r2, [$r1 + 24]
-+ swi $r2, [$r1 + 28]
-+ swi $r2, [$r2 + 0]
-+ swi $r2, [$r2 + 4]
-+ swi $r2, [$r2 + 8]
-+ swi $r2, [$r2 + 12]
-+ swi $r2, [$r2 + 16]
-+ swi $r2, [$r2 + 20]
-+ swi $r2, [$r2 + 24]
-+ swi $r2, [$r2 + 28]
-+ swi $r2, [$r3 + 0]
-+ swi $r2, [$r3 + 4]
-+ swi $r2, [$r3 + 8]
-+ swi $r2, [$r3 + 12]
-+ swi $r2, [$r3 + 16]
-+ swi $r2, [$r3 + 20]
-+ swi $r2, [$r3 + 24]
-+ swi $r2, [$r3 + 28]
-+ swi $r2, [$r4 + 0]
-+ swi $r2, [$r4 + 4]
-+ swi $r2, [$r4 + 8]
-+ swi $r2, [$r4 + 12]
-+ swi $r2, [$r4 + 16]
-+ swi $r2, [$r4 + 20]
-+ swi $r2, [$r4 + 24]
-+ swi $r2, [$r4 + 28]
-+ swi $r2, [$r5 + 0]
-+ swi $r2, [$r5 + 4]
-+ swi $r2, [$r5 + 8]
-+ swi $r2, [$r5 + 12]
-+ swi $r2, [$r5 + 16]
-+ swi $r2, [$r5 + 20]
-+ swi $r2, [$r5 + 24]
-+ swi $r2, [$r5 + 28]
-+ swi $r2, [$r6 + 0]
-+ swi $r2, [$r6 + 4]
-+ swi $r2, [$r6 + 8]
-+ swi $r2, [$r6 + 12]
-+ swi $r2, [$r6 + 16]
-+ swi $r2, [$r6 + 20]
-+ swi $r2, [$r6 + 24]
-+ swi $r2, [$r6 + 28]
-+ swi $r2, [$r7 + 0]
-+ swi $r2, [$r7 + 4]
-+ swi $r2, [$r7 + 8]
-+ swi $r2, [$r7 + 12]
-+ swi $r2, [$r7 + 16]
-+ swi $r2, [$r7 + 20]
-+ swi $r2, [$r7 + 24]
-+ swi $r2, [$r7 + 28]
-+ swi $r3, [$r0 + 0]
-+ swi $r3, [$r0 + 4]
-+ swi $r3, [$r0 + 8]
-+ swi $r3, [$r0 + 12]
-+ swi $r3, [$r0 + 16]
-+ swi $r3, [$r0 + 20]
-+ swi $r3, [$r0 + 24]
-+ swi $r3, [$r0 + 28]
-+ swi $r3, [$r1 + 0]
-+ swi $r3, [$r1 + 4]
-+ swi $r3, [$r1 + 8]
-+ swi $r3, [$r1 + 12]
-+ swi $r3, [$r1 + 16]
-+ swi $r3, [$r1 + 20]
-+ swi $r3, [$r1 + 24]
-+ swi $r3, [$r1 + 28]
-+ swi $r3, [$r2 + 0]
-+ swi $r3, [$r2 + 4]
-+ swi $r3, [$r2 + 8]
-+ swi $r3, [$r2 + 12]
-+ swi $r3, [$r2 + 16]
-+ swi $r3, [$r2 + 20]
-+ swi $r3, [$r2 + 24]
-+ swi $r3, [$r2 + 28]
-+ swi $r3, [$r3 + 0]
-+ swi $r3, [$r3 + 4]
-+ swi $r3, [$r3 + 8]
-+ swi $r3, [$r3 + 12]
-+ swi $r3, [$r3 + 16]
-+ swi $r3, [$r3 + 20]
-+ swi $r3, [$r3 + 24]
-+ swi $r3, [$r3 + 28]
-+ swi $r3, [$r4 + 0]
-+ swi $r3, [$r4 + 4]
-+ swi $r3, [$r4 + 8]
-+ swi $r3, [$r4 + 12]
-+ swi $r3, [$r4 + 16]
-+ swi $r3, [$r4 + 20]
-+ swi $r3, [$r4 + 24]
-+ swi $r3, [$r4 + 28]
-+ swi $r3, [$r5 + 0]
-+ swi $r3, [$r5 + 4]
-+ swi $r3, [$r5 + 8]
-+ swi $r3, [$r5 + 12]
-+ swi $r3, [$r5 + 16]
-+ swi $r3, [$r5 + 20]
-+ swi $r3, [$r5 + 24]
-+ swi $r3, [$r5 + 28]
-+ swi $r3, [$r6 + 0]
-+ swi $r3, [$r6 + 4]
-+ swi $r3, [$r6 + 8]
-+ swi $r3, [$r6 + 12]
-+ swi $r3, [$r6 + 16]
-+ swi $r3, [$r6 + 20]
-+ swi $r3, [$r6 + 24]
-+ swi $r3, [$r6 + 28]
-+ swi $r3, [$r7 + 0]
-+ swi $r3, [$r7 + 4]
-+ swi $r3, [$r7 + 8]
-+ swi $r3, [$r7 + 12]
-+ swi $r3, [$r7 + 16]
-+ swi $r3, [$r7 + 20]
-+ swi $r3, [$r7 + 24]
-+ swi $r3, [$r7 + 28]
-+ swi $r4, [$r0 + 0]
-+ swi $r4, [$r0 + 4]
-+ swi $r4, [$r0 + 8]
-+ swi $r4, [$r0 + 12]
-+ swi $r4, [$r0 + 16]
-+ swi $r4, [$r0 + 20]
-+ swi $r4, [$r0 + 24]
-+ swi $r4, [$r0 + 28]
-+ swi $r4, [$r1 + 0]
-+ swi $r4, [$r1 + 4]
-+ swi $r4, [$r1 + 8]
-+ swi $r4, [$r1 + 12]
-+ swi $r4, [$r1 + 16]
-+ swi $r4, [$r1 + 20]
-+ swi $r4, [$r1 + 24]
-+ swi $r4, [$r1 + 28]
-+ swi $r4, [$r2 + 0]
-+ swi $r4, [$r2 + 4]
-+ swi $r4, [$r2 + 8]
-+ swi $r4, [$r2 + 12]
-+ swi $r4, [$r2 + 16]
-+ swi $r4, [$r2 + 20]
-+ swi $r4, [$r2 + 24]
-+ swi $r4, [$r2 + 28]
-+ swi $r4, [$r3 + 0]
-+ swi $r4, [$r3 + 4]
-+ swi $r4, [$r3 + 8]
-+ swi $r4, [$r3 + 12]
-+ swi $r4, [$r3 + 16]
-+ swi $r4, [$r3 + 20]
-+ swi $r4, [$r3 + 24]
-+ swi $r4, [$r3 + 28]
-+ swi $r4, [$r4 + 0]
-+ swi $r4, [$r4 + 4]
-+ swi $r4, [$r4 + 8]
-+ swi $r4, [$r4 + 12]
-+ swi $r4, [$r4 + 16]
-+ swi $r4, [$r4 + 20]
-+ swi $r4, [$r4 + 24]
-+ swi $r4, [$r4 + 28]
-+ swi $r4, [$r5 + 0]
-+ swi $r4, [$r5 + 4]
-+ swi $r4, [$r5 + 8]
-+ swi $r4, [$r5 + 12]
-+ swi $r4, [$r5 + 16]
-+ swi $r4, [$r5 + 20]
-+ swi $r4, [$r5 + 24]
-+ swi $r4, [$r5 + 28]
-+ swi $r4, [$r6 + 0]
-+ swi $r4, [$r6 + 4]
-+ swi $r4, [$r6 + 8]
-+ swi $r4, [$r6 + 12]
-+ swi $r4, [$r6 + 16]
-+ swi $r4, [$r6 + 20]
-+ swi $r4, [$r6 + 24]
-+ swi $r4, [$r6 + 28]
-+ swi $r4, [$r7 + 0]
-+ swi $r4, [$r7 + 4]
-+ swi $r4, [$r7 + 8]
-+ swi $r4, [$r7 + 12]
-+ swi $r4, [$r7 + 16]
-+ swi $r4, [$r7 + 20]
-+ swi $r4, [$r7 + 24]
-+ swi $r4, [$r7 + 28]
-+ swi $r5, [$r0 + 0]
-+ swi $r5, [$r0 + 4]
-+ swi $r5, [$r0 + 8]
-+ swi $r5, [$r0 + 12]
-+ swi $r5, [$r0 + 16]
-+ swi $r5, [$r0 + 20]
-+ swi $r5, [$r0 + 24]
-+ swi $r5, [$r0 + 28]
-+ swi $r5, [$r1 + 0]
-+ swi $r5, [$r1 + 4]
-+ swi $r5, [$r1 + 8]
-+ swi $r5, [$r1 + 12]
-+ swi $r5, [$r1 + 16]
-+ swi $r5, [$r1 + 20]
-+ swi $r5, [$r1 + 24]
-+ swi $r5, [$r1 + 28]
-+ swi $r5, [$r2 + 0]
-+ swi $r5, [$r2 + 4]
-+ swi $r5, [$r2 + 8]
-+ swi $r5, [$r2 + 12]
-+ swi $r5, [$r2 + 16]
-+ swi $r5, [$r2 + 20]
-+ swi $r5, [$r2 + 24]
-+ swi $r5, [$r2 + 28]
-+ swi $r5, [$r3 + 0]
-+ swi $r5, [$r3 + 4]
-+ swi $r5, [$r3 + 8]
-+ swi $r5, [$r3 + 12]
-+ swi $r5, [$r3 + 16]
-+ swi $r5, [$r3 + 20]
-+ swi $r5, [$r3 + 24]
-+ swi $r5, [$r3 + 28]
-+ swi $r5, [$r4 + 0]
-+ swi $r5, [$r4 + 4]
-+ swi $r5, [$r4 + 8]
-+ swi $r5, [$r4 + 12]
-+ swi $r5, [$r4 + 16]
-+ swi $r5, [$r4 + 20]
-+ swi $r5, [$r4 + 24]
-+ swi $r5, [$r4 + 28]
-+ swi $r5, [$r5 + 0]
-+ swi $r5, [$r5 + 4]
-+ swi $r5, [$r5 + 8]
-+ swi $r5, [$r5 + 12]
-+ swi $r5, [$r5 + 16]
-+ swi $r5, [$r5 + 20]
-+ swi $r5, [$r5 + 24]
-+ swi $r5, [$r5 + 28]
-+ swi $r5, [$r6 + 0]
-+ swi $r5, [$r6 + 4]
-+ swi $r5, [$r6 + 8]
-+ swi $r5, [$r6 + 12]
-+ swi $r5, [$r6 + 16]
-+ swi $r5, [$r6 + 20]
-+ swi $r5, [$r6 + 24]
-+ swi $r5, [$r6 + 28]
-+ swi $r5, [$r7 + 0]
-+ swi $r5, [$r7 + 4]
-+ swi $r5, [$r7 + 8]
-+ swi $r5, [$r7 + 12]
-+ swi $r5, [$r7 + 16]
-+ swi $r5, [$r7 + 20]
-+ swi $r5, [$r7 + 24]
-+ swi $r5, [$r7 + 28]
-+ swi $r6, [$r0 + 0]
-+ swi $r6, [$r0 + 4]
-+ swi $r6, [$r0 + 8]
-+ swi $r6, [$r0 + 12]
-+ swi $r6, [$r0 + 16]
-+ swi $r6, [$r0 + 20]
-+ swi $r6, [$r0 + 24]
-+ swi $r6, [$r0 + 28]
-+ swi $r6, [$r1 + 0]
-+ swi $r6, [$r1 + 4]
-+ swi $r6, [$r1 + 8]
-+ swi $r6, [$r1 + 12]
-+ swi $r6, [$r1 + 16]
-+ swi $r6, [$r1 + 20]
-+ swi $r6, [$r1 + 24]
-+ swi $r6, [$r1 + 28]
-+ swi $r6, [$r2 + 0]
-+ swi $r6, [$r2 + 4]
-+ swi $r6, [$r2 + 8]
-+ swi $r6, [$r2 + 12]
-+ swi $r6, [$r2 + 16]
-+ swi $r6, [$r2 + 20]
-+ swi $r6, [$r2 + 24]
-+ swi $r6, [$r2 + 28]
-+ swi $r6, [$r3 + 0]
-+ swi $r6, [$r3 + 4]
-+ swi $r6, [$r3 + 8]
-+ swi $r6, [$r3 + 12]
-+ swi $r6, [$r3 + 16]
-+ swi $r6, [$r3 + 20]
-+ swi $r6, [$r3 + 24]
-+ swi $r6, [$r3 + 28]
-+ swi $r6, [$r4 + 0]
-+ swi $r6, [$r4 + 4]
-+ swi $r6, [$r4 + 8]
-+ swi $r6, [$r4 + 12]
-+ swi $r6, [$r4 + 16]
-+ swi $r6, [$r4 + 20]
-+ swi $r6, [$r4 + 24]
-+ swi $r6, [$r4 + 28]
-+ swi $r6, [$r5 + 0]
-+ swi $r6, [$r5 + 4]
-+ swi $r6, [$r5 + 8]
-+ swi $r6, [$r5 + 12]
-+ swi $r6, [$r5 + 16]
-+ swi $r6, [$r5 + 20]
-+ swi $r6, [$r5 + 24]
-+ swi $r6, [$r5 + 28]
-+ swi $r6, [$r6 + 0]
-+ swi $r6, [$r6 + 4]
-+ swi $r6, [$r6 + 8]
-+ swi $r6, [$r6 + 12]
-+ swi $r6, [$r6 + 16]
-+ swi $r6, [$r6 + 20]
-+ swi $r6, [$r6 + 24]
-+ swi $r6, [$r6 + 28]
-+ swi $r6, [$r7 + 0]
-+ swi $r6, [$r7 + 4]
-+ swi $r6, [$r7 + 8]
-+ swi $r6, [$r7 + 12]
-+ swi $r6, [$r7 + 16]
-+ swi $r6, [$r7 + 20]
-+ swi $r6, [$r7 + 24]
-+ swi $r6, [$r7 + 28]
-+ swi $r7, [$r0 + 0]
-+ swi $r7, [$r0 + 4]
-+ swi $r7, [$r0 + 8]
-+ swi $r7, [$r0 + 12]
-+ swi $r7, [$r0 + 16]
-+ swi $r7, [$r0 + 20]
-+ swi $r7, [$r0 + 24]
-+ swi $r7, [$r0 + 28]
-+ swi $r7, [$r1 + 0]
-+ swi $r7, [$r1 + 4]
-+ swi $r7, [$r1 + 8]
-+ swi $r7, [$r1 + 12]
-+ swi $r7, [$r1 + 16]
-+ swi $r7, [$r1 + 20]
-+ swi $r7, [$r1 + 24]
-+ swi $r7, [$r1 + 28]
-+ swi $r7, [$r2 + 0]
-+ swi $r7, [$r2 + 4]
-+ swi $r7, [$r2 + 8]
-+ swi $r7, [$r2 + 12]
-+ swi $r7, [$r2 + 16]
-+ swi $r7, [$r2 + 20]
-+ swi $r7, [$r2 + 24]
-+ swi $r7, [$r2 + 28]
-+ swi $r7, [$r3 + 0]
-+ swi $r7, [$r3 + 4]
-+ swi $r7, [$r3 + 8]
-+ swi $r7, [$r3 + 12]
-+ swi $r7, [$r3 + 16]
-+ swi $r7, [$r3 + 20]
-+ swi $r7, [$r3 + 24]
-+ swi $r7, [$r3 + 28]
-+ swi $r7, [$r4 + 0]
-+ swi $r7, [$r4 + 4]
-+ swi $r7, [$r4 + 8]
-+ swi $r7, [$r4 + 12]
-+ swi $r7, [$r4 + 16]
-+ swi $r7, [$r4 + 20]
-+ swi $r7, [$r4 + 24]
-+ swi $r7, [$r4 + 28]
-+ swi $r7, [$r5 + 0]
-+ swi $r7, [$r5 + 4]
-+ swi $r7, [$r5 + 8]
-+ swi $r7, [$r5 + 12]
-+ swi $r7, [$r5 + 16]
-+ swi $r7, [$r5 + 20]
-+ swi $r7, [$r5 + 24]
-+ swi $r7, [$r5 + 28]
-+ swi $r7, [$r6 + 0]
-+ swi $r7, [$r6 + 4]
-+ swi $r7, [$r6 + 8]
-+ swi $r7, [$r6 + 12]
-+ swi $r7, [$r6 + 16]
-+ swi $r7, [$r6 + 20]
-+ swi $r7, [$r6 + 24]
-+ swi $r7, [$r6 + 28]
-+ swi $r7, [$r7 + 0]
-+ swi $r7, [$r7 + 4]
-+ swi $r7, [$r7 + 8]
-+ swi $r7, [$r7 + 12]
-+ swi $r7, [$r7 + 16]
-+ swi $r7, [$r7 + 20]
-+ swi $r7, [$r7 + 24]
-+ swi $r7, [$r7 + 28]
-+ swi.bi $r0, [$r0], 0
-+ swi.bi $r0, [$r0], 4
-+ swi.bi $r0, [$r0], 8
-+ swi.bi $r0, [$r0], 12
-+ swi.bi $r0, [$r0], 16
-+ swi.bi $r0, [$r0], 20
-+ swi.bi $r0, [$r0], 24
-+ swi.bi $r0, [$r0], 28
-+ swi.bi $r0, [$r1], 0
-+ swi.bi $r0, [$r1], 4
-+ swi.bi $r0, [$r1], 8
-+ swi.bi $r0, [$r1], 12
-+ swi.bi $r0, [$r1], 16
-+ swi.bi $r0, [$r1], 20
-+ swi.bi $r0, [$r1], 24
-+ swi.bi $r0, [$r1], 28
-+ swi.bi $r0, [$r2], 0
-+ swi.bi $r0, [$r2], 4
-+ swi.bi $r0, [$r2], 8
-+ swi.bi $r0, [$r2], 12
-+ swi.bi $r0, [$r2], 16
-+ swi.bi $r0, [$r2], 20
-+ swi.bi $r0, [$r2], 24
-+ swi.bi $r0, [$r2], 28
-+ swi.bi $r0, [$r3], 0
-+ swi.bi $r0, [$r3], 4
-+ swi.bi $r0, [$r3], 8
-+ swi.bi $r0, [$r3], 12
-+ swi.bi $r0, [$r3], 16
-+ swi.bi $r0, [$r3], 20
-+ swi.bi $r0, [$r3], 24
-+ swi.bi $r0, [$r3], 28
-+ swi.bi $r0, [$r4], 0
-+ swi.bi $r0, [$r4], 4
-+ swi.bi $r0, [$r4], 8
-+ swi.bi $r0, [$r4], 12
-+ swi.bi $r0, [$r4], 16
-+ swi.bi $r0, [$r4], 20
-+ swi.bi $r0, [$r4], 24
-+ swi.bi $r0, [$r4], 28
-+ swi.bi $r0, [$r5], 0
-+ swi.bi $r0, [$r5], 4
-+ swi.bi $r0, [$r5], 8
-+ swi.bi $r0, [$r5], 12
-+ swi.bi $r0, [$r5], 16
-+ swi.bi $r0, [$r5], 20
-+ swi.bi $r0, [$r5], 24
-+ swi.bi $r0, [$r5], 28
-+ swi.bi $r0, [$r6], 0
-+ swi.bi $r0, [$r6], 4
-+ swi.bi $r0, [$r6], 8
-+ swi.bi $r0, [$r6], 12
-+ swi.bi $r0, [$r6], 16
-+ swi.bi $r0, [$r6], 20
-+ swi.bi $r0, [$r6], 24
-+ swi.bi $r0, [$r6], 28
-+ swi.bi $r0, [$r7], 0
-+ swi.bi $r0, [$r7], 4
-+ swi.bi $r0, [$r7], 8
-+ swi.bi $r0, [$r7], 12
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-+ shi $r0, [$r3 + 6]
-+ shi $r0, [$r3 + 8]
-+ shi $r0, [$r3 + 10]
-+ shi $r0, [$r3 + 12]
-+ shi $r0, [$r3 + 14]
-+ shi $r0, [$r4 + 0]
-+ shi $r0, [$r4 + 2]
-+ shi $r0, [$r4 + 4]
-+ shi $r0, [$r4 + 6]
-+ shi $r0, [$r4 + 8]
-+ shi $r0, [$r4 + 10]
-+ shi $r0, [$r4 + 12]
-+ shi $r0, [$r4 + 14]
-+ shi $r0, [$r5 + 0]
-+ shi $r0, [$r5 + 2]
-+ shi $r0, [$r5 + 4]
-+ shi $r0, [$r5 + 6]
-+ shi $r0, [$r5 + 8]
-+ shi $r0, [$r5 + 10]
-+ shi $r0, [$r5 + 12]
-+ shi $r0, [$r5 + 14]
-+ shi $r0, [$r6 + 0]
-+ shi $r0, [$r6 + 2]
-+ shi $r0, [$r6 + 4]
-+ shi $r0, [$r6 + 6]
-+ shi $r0, [$r6 + 8]
-+ shi $r0, [$r6 + 10]
-+ shi $r0, [$r6 + 12]
-+ shi $r0, [$r6 + 14]
-+ shi $r0, [$r7 + 0]
-+ shi $r0, [$r7 + 2]
-+ shi $r0, [$r7 + 4]
-+ shi $r0, [$r7 + 6]
-+ shi $r0, [$r7 + 8]
-+ shi $r0, [$r7 + 10]
-+ shi $r0, [$r7 + 12]
-+ shi $r0, [$r7 + 14]
-+ shi $r1, [$r0 + 0]
-+ shi $r1, [$r0 + 2]
-+ shi $r1, [$r0 + 4]
-+ shi $r1, [$r0 + 6]
-+ shi $r1, [$r0 + 8]
-+ shi $r1, [$r0 + 10]
-+ shi $r1, [$r0 + 12]
-+ shi $r1, [$r0 + 14]
-+ shi $r1, [$r1 + 0]
-+ shi $r1, [$r1 + 2]
-+ shi $r1, [$r1 + 4]
-+ shi $r1, [$r1 + 6]
-+ shi $r1, [$r1 + 8]
-+ shi $r1, [$r1 + 10]
-+ shi $r1, [$r1 + 12]
-+ shi $r1, [$r1 + 14]
-+ shi $r1, [$r2 + 0]
-+ shi $r1, [$r2 + 2]
-+ shi $r1, [$r2 + 4]
-+ shi $r1, [$r2 + 6]
-+ shi $r1, [$r2 + 8]
-+ shi $r1, [$r2 + 10]
-+ shi $r1, [$r2 + 12]
-+ shi $r1, [$r2 + 14]
-+ shi $r1, [$r3 + 0]
-+ shi $r1, [$r3 + 2]
-+ shi $r1, [$r3 + 4]
-+ shi $r1, [$r3 + 6]
-+ shi $r1, [$r3 + 8]
-+ shi $r1, [$r3 + 10]
-+ shi $r1, [$r3 + 12]
-+ shi $r1, [$r3 + 14]
-+ shi $r1, [$r4 + 0]
-+ shi $r1, [$r4 + 2]
-+ shi $r1, [$r4 + 4]
-+ shi $r1, [$r4 + 6]
-+ shi $r1, [$r4 + 8]
-+ shi $r1, [$r4 + 10]
-+ shi $r1, [$r4 + 12]
-+ shi $r1, [$r4 + 14]
-+ shi $r1, [$r5 + 0]
-+ shi $r1, [$r5 + 2]
-+ shi $r1, [$r5 + 4]
-+ shi $r1, [$r5 + 6]
-+ shi $r1, [$r5 + 8]
-+ shi $r1, [$r5 + 10]
-+ shi $r1, [$r5 + 12]
-+ shi $r1, [$r5 + 14]
-+ shi $r1, [$r6 + 0]
-+ shi $r1, [$r6 + 2]
-+ shi $r1, [$r6 + 4]
-+ shi $r1, [$r6 + 6]
-+ shi $r1, [$r6 + 8]
-+ shi $r1, [$r6 + 10]
-+ shi $r1, [$r6 + 12]
-+ shi $r1, [$r6 + 14]
-+ shi $r1, [$r7 + 0]
-+ shi $r1, [$r7 + 2]
-+ shi $r1, [$r7 + 4]
-+ shi $r1, [$r7 + 6]
-+ shi $r1, [$r7 + 8]
-+ shi $r1, [$r7 + 10]
-+ shi $r1, [$r7 + 12]
-+ shi $r1, [$r7 + 14]
-+ shi $r2, [$r0 + 0]
-+ shi $r2, [$r0 + 2]
-+ shi $r2, [$r0 + 4]
-+ shi $r2, [$r0 + 6]
-+ shi $r2, [$r0 + 8]
-+ shi $r2, [$r0 + 10]
-+ shi $r2, [$r0 + 12]
-+ shi $r2, [$r0 + 14]
-+ shi $r2, [$r1 + 0]
-+ shi $r2, [$r1 + 2]
-+ shi $r2, [$r1 + 4]
-+ shi $r2, [$r1 + 6]
-+ shi $r2, [$r1 + 8]
-+ shi $r2, [$r1 + 10]
-+ shi $r2, [$r1 + 12]
-+ shi $r2, [$r1 + 14]
-+ shi $r2, [$r2 + 0]
-+ shi $r2, [$r2 + 2]
-+ shi $r2, [$r2 + 4]
-+ shi $r2, [$r2 + 6]
-+ shi $r2, [$r2 + 8]
-+ shi $r2, [$r2 + 10]
-+ shi $r2, [$r2 + 12]
-+ shi $r2, [$r2 + 14]
-+ shi $r2, [$r3 + 0]
-+ shi $r2, [$r3 + 2]
-+ shi $r2, [$r3 + 4]
-+ shi $r2, [$r3 + 6]
-+ shi $r2, [$r3 + 8]
-+ shi $r2, [$r3 + 10]
-+ shi $r2, [$r3 + 12]
-+ shi $r2, [$r3 + 14]
-+ shi $r2, [$r4 + 0]
-+ shi $r2, [$r4 + 2]
-+ shi $r2, [$r4 + 4]
-+ shi $r2, [$r4 + 6]
-+ shi $r2, [$r4 + 8]
-+ shi $r2, [$r4 + 10]
-+ shi $r2, [$r4 + 12]
-+ shi $r2, [$r4 + 14]
-+ shi $r2, [$r5 + 0]
-+ shi $r2, [$r5 + 2]
-+ shi $r2, [$r5 + 4]
-+ shi $r2, [$r5 + 6]
-+ shi $r2, [$r5 + 8]
-+ shi $r2, [$r5 + 10]
-+ shi $r2, [$r5 + 12]
-+ shi $r2, [$r5 + 14]
-+ shi $r2, [$r6 + 0]
-+ shi $r2, [$r6 + 2]
-+ shi $r2, [$r6 + 4]
-+ shi $r2, [$r6 + 6]
-+ shi $r2, [$r6 + 8]
-+ shi $r2, [$r6 + 10]
-+ shi $r2, [$r6 + 12]
-+ shi $r2, [$r6 + 14]
-+ shi $r2, [$r7 + 0]
-+ shi $r2, [$r7 + 2]
-+ shi $r2, [$r7 + 4]
-+ shi $r2, [$r7 + 6]
-+ shi $r2, [$r7 + 8]
-+ shi $r2, [$r7 + 10]
-+ shi $r2, [$r7 + 12]
-+ shi $r2, [$r7 + 14]
-+ shi $r3, [$r0 + 0]
-+ shi $r3, [$r0 + 2]
-+ shi $r3, [$r0 + 4]
-+ shi $r3, [$r0 + 6]
-+ shi $r3, [$r0 + 8]
-+ shi $r3, [$r0 + 10]
-+ shi $r3, [$r0 + 12]
-+ shi $r3, [$r0 + 14]
-+ shi $r3, [$r1 + 0]
-+ shi $r3, [$r1 + 2]
-+ shi $r3, [$r1 + 4]
-+ shi $r3, [$r1 + 6]
-+ shi $r3, [$r1 + 8]
-+ shi $r3, [$r1 + 10]
-+ shi $r3, [$r1 + 12]
-+ shi $r3, [$r1 + 14]
-+ shi $r3, [$r2 + 0]
-+ shi $r3, [$r2 + 2]
-+ shi $r3, [$r2 + 4]
-+ shi $r3, [$r2 + 6]
-+ shi $r3, [$r2 + 8]
-+ shi $r3, [$r2 + 10]
-+ shi $r3, [$r2 + 12]
-+ shi $r3, [$r2 + 14]
-+ shi $r3, [$r3 + 0]
-+ shi $r3, [$r3 + 2]
-+ shi $r3, [$r3 + 4]
-+ shi $r3, [$r3 + 6]
-+ shi $r3, [$r3 + 8]
-+ shi $r3, [$r3 + 10]
-+ shi $r3, [$r3 + 12]
-+ shi $r3, [$r3 + 14]
-+ shi $r3, [$r4 + 0]
-+ shi $r3, [$r4 + 2]
-+ shi $r3, [$r4 + 4]
-+ shi $r3, [$r4 + 6]
-+ shi $r3, [$r4 + 8]
-+ shi $r3, [$r4 + 10]
-+ shi $r3, [$r4 + 12]
-+ shi $r3, [$r4 + 14]
-+ shi $r3, [$r5 + 0]
-+ shi $r3, [$r5 + 2]
-+ shi $r3, [$r5 + 4]
-+ shi $r3, [$r5 + 6]
-+ shi $r3, [$r5 + 8]
-+ shi $r3, [$r5 + 10]
-+ shi $r3, [$r5 + 12]
-+ shi $r3, [$r5 + 14]
-+ shi $r3, [$r6 + 0]
-+ shi $r3, [$r6 + 2]
-+ shi $r3, [$r6 + 4]
-+ shi $r3, [$r6 + 6]
-+ shi $r3, [$r6 + 8]
-+ shi $r3, [$r6 + 10]
-+ shi $r3, [$r6 + 12]
-+ shi $r3, [$r6 + 14]
-+ shi $r3, [$r7 + 0]
-+ shi $r3, [$r7 + 2]
-+ shi $r3, [$r7 + 4]
-+ shi $r3, [$r7 + 6]
-+ shi $r3, [$r7 + 8]
-+ shi $r3, [$r7 + 10]
-+ shi $r3, [$r7 + 12]
-+ shi $r3, [$r7 + 14]
-+ shi $r4, [$r0 + 0]
-+ shi $r4, [$r0 + 2]
-+ shi $r4, [$r0 + 4]
-+ shi $r4, [$r0 + 6]
-+ shi $r4, [$r0 + 8]
-+ shi $r4, [$r0 + 10]
-+ shi $r4, [$r0 + 12]
-+ shi $r4, [$r0 + 14]
-+ shi $r4, [$r1 + 0]
-+ shi $r4, [$r1 + 2]
-+ shi $r4, [$r1 + 4]
-+ shi $r4, [$r1 + 6]
-+ shi $r4, [$r1 + 8]
-+ shi $r4, [$r1 + 10]
-+ shi $r4, [$r1 + 12]
-+ shi $r4, [$r1 + 14]
-+ shi $r4, [$r2 + 0]
-+ shi $r4, [$r2 + 2]
-+ shi $r4, [$r2 + 4]
-+ shi $r4, [$r2 + 6]
-+ shi $r4, [$r2 + 8]
-+ shi $r4, [$r2 + 10]
-+ shi $r4, [$r2 + 12]
-+ shi $r4, [$r2 + 14]
-+ shi $r4, [$r3 + 0]
-+ shi $r4, [$r3 + 2]
-+ shi $r4, [$r3 + 4]
-+ shi $r4, [$r3 + 6]
-+ shi $r4, [$r3 + 8]
-+ shi $r4, [$r3 + 10]
-+ shi $r4, [$r3 + 12]
-+ shi $r4, [$r3 + 14]
-+ shi $r4, [$r4 + 0]
-+ shi $r4, [$r4 + 2]
-+ shi $r4, [$r4 + 4]
-+ shi $r4, [$r4 + 6]
-+ shi $r4, [$r4 + 8]
-+ shi $r4, [$r4 + 10]
-+ shi $r4, [$r4 + 12]
-+ shi $r4, [$r4 + 14]
-+ shi $r4, [$r5 + 0]
-+ shi $r4, [$r5 + 2]
-+ shi $r4, [$r5 + 4]
-+ shi $r4, [$r5 + 6]
-+ shi $r4, [$r5 + 8]
-+ shi $r4, [$r5 + 10]
-+ shi $r4, [$r5 + 12]
-+ shi $r4, [$r5 + 14]
-+ shi $r4, [$r6 + 0]
-+ shi $r4, [$r6 + 2]
-+ shi $r4, [$r6 + 4]
-+ shi $r4, [$r6 + 6]
-+ shi $r4, [$r6 + 8]
-+ shi $r4, [$r6 + 10]
-+ shi $r4, [$r6 + 12]
-+ shi $r4, [$r6 + 14]
-+ shi $r4, [$r7 + 0]
-+ shi $r4, [$r7 + 2]
-+ shi $r4, [$r7 + 4]
-+ shi $r4, [$r7 + 6]
-+ shi $r4, [$r7 + 8]
-+ shi $r4, [$r7 + 10]
-+ shi $r4, [$r7 + 12]
-+ shi $r4, [$r7 + 14]
-+ shi $r5, [$r0 + 0]
-+ shi $r5, [$r0 + 2]
-+ shi $r5, [$r0 + 4]
-+ shi $r5, [$r0 + 6]
-+ shi $r5, [$r0 + 8]
-+ shi $r5, [$r0 + 10]
-+ shi $r5, [$r0 + 12]
-+ shi $r5, [$r0 + 14]
-+ shi $r5, [$r1 + 0]
-+ shi $r5, [$r1 + 2]
-+ shi $r5, [$r1 + 4]
-+ shi $r5, [$r1 + 6]
-+ shi $r5, [$r1 + 8]
-+ shi $r5, [$r1 + 10]
-+ shi $r5, [$r1 + 12]
-+ shi $r5, [$r1 + 14]
-+ shi $r5, [$r2 + 0]
-+ shi $r5, [$r2 + 2]
-+ shi $r5, [$r2 + 4]
-+ shi $r5, [$r2 + 6]
-+ shi $r5, [$r2 + 8]
-+ shi $r5, [$r2 + 10]
-+ shi $r5, [$r2 + 12]
-+ shi $r5, [$r2 + 14]
-+ shi $r5, [$r3 + 0]
-+ shi $r5, [$r3 + 2]
-+ shi $r5, [$r3 + 4]
-+ shi $r5, [$r3 + 6]
-+ shi $r5, [$r3 + 8]
-+ shi $r5, [$r3 + 10]
-+ shi $r5, [$r3 + 12]
-+ shi $r5, [$r3 + 14]
-+ shi $r5, [$r4 + 0]
-+ shi $r5, [$r4 + 2]
-+ shi $r5, [$r4 + 4]
-+ shi $r5, [$r4 + 6]
-+ shi $r5, [$r4 + 8]
-+ shi $r5, [$r4 + 10]
-+ shi $r5, [$r4 + 12]
-+ shi $r5, [$r4 + 14]
-+ shi $r5, [$r5 + 0]
-+ shi $r5, [$r5 + 2]
-+ shi $r5, [$r5 + 4]
-+ shi $r5, [$r5 + 6]
-+ shi $r5, [$r5 + 8]
-+ shi $r5, [$r5 + 10]
-+ shi $r5, [$r5 + 12]
-+ shi $r5, [$r5 + 14]
-+ shi $r5, [$r6 + 0]
-+ shi $r5, [$r6 + 2]
-+ shi $r5, [$r6 + 4]
-+ shi $r5, [$r6 + 6]
-+ shi $r5, [$r6 + 8]
-+ shi $r5, [$r6 + 10]
-+ shi $r5, [$r6 + 12]
-+ shi $r5, [$r6 + 14]
-+ shi $r5, [$r7 + 0]
-+ shi $r5, [$r7 + 2]
-+ shi $r5, [$r7 + 4]
-+ shi $r5, [$r7 + 6]
-+ shi $r5, [$r7 + 8]
-+ shi $r5, [$r7 + 10]
-+ shi $r5, [$r7 + 12]
-+ shi $r5, [$r7 + 14]
-+ shi $r6, [$r0 + 0]
-+ shi $r6, [$r0 + 2]
-+ shi $r6, [$r0 + 4]
-+ shi $r6, [$r0 + 6]
-+ shi $r6, [$r0 + 8]
-+ shi $r6, [$r0 + 10]
-+ shi $r6, [$r0 + 12]
-+ shi $r6, [$r0 + 14]
-+ shi $r6, [$r1 + 0]
-+ shi $r6, [$r1 + 2]
-+ shi $r6, [$r1 + 4]
-+ shi $r6, [$r1 + 6]
-+ shi $r6, [$r1 + 8]
-+ shi $r6, [$r1 + 10]
-+ shi $r6, [$r1 + 12]
-+ shi $r6, [$r1 + 14]
-+ shi $r6, [$r2 + 0]
-+ shi $r6, [$r2 + 2]
-+ shi $r6, [$r2 + 4]
-+ shi $r6, [$r2 + 6]
-+ shi $r6, [$r2 + 8]
-+ shi $r6, [$r2 + 10]
-+ shi $r6, [$r2 + 12]
-+ shi $r6, [$r2 + 14]
-+ shi $r6, [$r3 + 0]
-+ shi $r6, [$r3 + 2]
-+ shi $r6, [$r3 + 4]
-+ shi $r6, [$r3 + 6]
-+ shi $r6, [$r3 + 8]
-+ shi $r6, [$r3 + 10]
-+ shi $r6, [$r3 + 12]
-+ shi $r6, [$r3 + 14]
-+ shi $r6, [$r4 + 0]
-+ shi $r6, [$r4 + 2]
-+ shi $r6, [$r4 + 4]
-+ shi $r6, [$r4 + 6]
-+ shi $r6, [$r4 + 8]
-+ shi $r6, [$r4 + 10]
-+ shi $r6, [$r4 + 12]
-+ shi $r6, [$r4 + 14]
-+ shi $r6, [$r5 + 0]
-+ shi $r6, [$r5 + 2]
-+ shi $r6, [$r5 + 4]
-+ shi $r6, [$r5 + 6]
-+ shi $r6, [$r5 + 8]
-+ shi $r6, [$r5 + 10]
-+ shi $r6, [$r5 + 12]
-+ shi $r6, [$r5 + 14]
-+ shi $r6, [$r6 + 0]
-+ shi $r6, [$r6 + 2]
-+ shi $r6, [$r6 + 4]
-+ shi $r6, [$r6 + 6]
-+ shi $r6, [$r6 + 8]
-+ shi $r6, [$r6 + 10]
-+ shi $r6, [$r6 + 12]
-+ shi $r6, [$r6 + 14]
-+ shi $r6, [$r7 + 0]
-+ shi $r6, [$r7 + 2]
-+ shi $r6, [$r7 + 4]
-+ shi $r6, [$r7 + 6]
-+ shi $r6, [$r7 + 8]
-+ shi $r6, [$r7 + 10]
-+ shi $r6, [$r7 + 12]
-+ shi $r6, [$r7 + 14]
-+ shi $r7, [$r0 + 0]
-+ shi $r7, [$r0 + 2]
-+ shi $r7, [$r0 + 4]
-+ shi $r7, [$r0 + 6]
-+ shi $r7, [$r0 + 8]
-+ shi $r7, [$r0 + 10]
-+ shi $r7, [$r0 + 12]
-+ shi $r7, [$r0 + 14]
-+ shi $r7, [$r1 + 0]
-+ shi $r7, [$r1 + 2]
-+ shi $r7, [$r1 + 4]
-+ shi $r7, [$r1 + 6]
-+ shi $r7, [$r1 + 8]
-+ shi $r7, [$r1 + 10]
-+ shi $r7, [$r1 + 12]
-+ shi $r7, [$r1 + 14]
-+ shi $r7, [$r2 + 0]
-+ shi $r7, [$r2 + 2]
-+ shi $r7, [$r2 + 4]
-+ shi $r7, [$r2 + 6]
-+ shi $r7, [$r2 + 8]
-+ shi $r7, [$r2 + 10]
-+ shi $r7, [$r2 + 12]
-+ shi $r7, [$r2 + 14]
-+ shi $r7, [$r3 + 0]
-+ shi $r7, [$r3 + 2]
-+ shi $r7, [$r3 + 4]
-+ shi $r7, [$r3 + 6]
-+ shi $r7, [$r3 + 8]
-+ shi $r7, [$r3 + 10]
-+ shi $r7, [$r3 + 12]
-+ shi $r7, [$r3 + 14]
-+ shi $r7, [$r4 + 0]
-+ shi $r7, [$r4 + 2]
-+ shi $r7, [$r4 + 4]
-+ shi $r7, [$r4 + 6]
-+ shi $r7, [$r4 + 8]
-+ shi $r7, [$r4 + 10]
-+ shi $r7, [$r4 + 12]
-+ shi $r7, [$r4 + 14]
-+ shi $r7, [$r5 + 0]
-+ shi $r7, [$r5 + 2]
-+ shi $r7, [$r5 + 4]
-+ shi $r7, [$r5 + 6]
-+ shi $r7, [$r5 + 8]
-+ shi $r7, [$r5 + 10]
-+ shi $r7, [$r5 + 12]
-+ shi $r7, [$r5 + 14]
-+ shi $r7, [$r6 + 0]
-+ shi $r7, [$r6 + 2]
-+ shi $r7, [$r6 + 4]
-+ shi $r7, [$r6 + 6]
-+ shi $r7, [$r6 + 8]
-+ shi $r7, [$r6 + 10]
-+ shi $r7, [$r6 + 12]
-+ shi $r7, [$r6 + 14]
-+ shi $r7, [$r7 + 0]
-+ shi $r7, [$r7 + 2]
-+ shi $r7, [$r7 + 4]
-+ shi $r7, [$r7 + 6]
-+ shi $r7, [$r7 + 8]
-+ shi $r7, [$r7 + 10]
-+ shi $r7, [$r7 + 12]
-+ shi $r7, [$r7 + 14]
-+ sbi $r0, [$r0 + 0]
-+ sbi $r0, [$r0 + 1]
-+ sbi $r0, [$r0 + 2]
-+ sbi $r0, [$r0 + 3]
-+ sbi $r0, [$r0 + 4]
-+ sbi $r0, [$r0 + 5]
-+ sbi $r0, [$r0 + 6]
-+ sbi $r0, [$r0 + 7]
-+ sbi $r0, [$r1 + 0]
-+ sbi $r0, [$r1 + 1]
-+ sbi $r0, [$r1 + 2]
-+ sbi $r0, [$r1 + 3]
-+ sbi $r0, [$r1 + 4]
-+ sbi $r0, [$r1 + 5]
-+ sbi $r0, [$r1 + 6]
-+ sbi $r0, [$r1 + 7]
-+ sbi $r0, [$r2 + 0]
-+ sbi $r0, [$r2 + 1]
-+ sbi $r0, [$r2 + 2]
-+ sbi $r0, [$r2 + 3]
-+ sbi $r0, [$r2 + 4]
-+ sbi $r0, [$r2 + 5]
-+ sbi $r0, [$r2 + 6]
-+ sbi $r0, [$r2 + 7]
-+ sbi $r0, [$r3 + 0]
-+ sbi $r0, [$r3 + 1]
-+ sbi $r0, [$r3 + 2]
-+ sbi $r0, [$r3 + 3]
-+ sbi $r0, [$r3 + 4]
-+ sbi $r0, [$r3 + 5]
-+ sbi $r0, [$r3 + 6]
-+ sbi $r0, [$r3 + 7]
-+ sbi $r0, [$r4 + 0]
-+ sbi $r0, [$r4 + 1]
-+ sbi $r0, [$r4 + 2]
-+ sbi $r0, [$r4 + 3]
-+ sbi $r0, [$r4 + 4]
-+ sbi $r0, [$r4 + 5]
-+ sbi $r0, [$r4 + 6]
-+ sbi $r0, [$r4 + 7]
-+ sbi $r0, [$r5 + 0]
-+ sbi $r0, [$r5 + 1]
-+ sbi $r0, [$r5 + 2]
-+ sbi $r0, [$r5 + 3]
-+ sbi $r0, [$r5 + 4]
-+ sbi $r0, [$r5 + 5]
-+ sbi $r0, [$r5 + 6]
-+ sbi $r0, [$r5 + 7]
-+ sbi $r0, [$r6 + 0]
-+ sbi $r0, [$r6 + 1]
-+ sbi $r0, [$r6 + 2]
-+ sbi $r0, [$r6 + 3]
-+ sbi $r0, [$r6 + 4]
-+ sbi $r0, [$r6 + 5]
-+ sbi $r0, [$r6 + 6]
-+ sbi $r0, [$r6 + 7]
-+ sbi $r0, [$r7 + 0]
-+ sbi $r0, [$r7 + 1]
-+ sbi $r0, [$r7 + 2]
-+ sbi $r0, [$r7 + 3]
-+ sbi $r0, [$r7 + 4]
-+ sbi $r0, [$r7 + 5]
-+ sbi $r0, [$r7 + 6]
-+ sbi $r0, [$r7 + 7]
-+ sbi $r1, [$r0 + 0]
-+ sbi $r1, [$r0 + 1]
-+ sbi $r1, [$r0 + 2]
-+ sbi $r1, [$r0 + 3]
-+ sbi $r1, [$r0 + 4]
-+ sbi $r1, [$r0 + 5]
-+ sbi $r1, [$r0 + 6]
-+ sbi $r1, [$r0 + 7]
-+ sbi $r1, [$r1 + 0]
-+ sbi $r1, [$r1 + 1]
-+ sbi $r1, [$r1 + 2]
-+ sbi $r1, [$r1 + 3]
-+ sbi $r1, [$r1 + 4]
-+ sbi $r1, [$r1 + 5]
-+ sbi $r1, [$r1 + 6]
-+ sbi $r1, [$r1 + 7]
-+ sbi $r1, [$r2 + 0]
-+ sbi $r1, [$r2 + 1]
-+ sbi $r1, [$r2 + 2]
-+ sbi $r1, [$r2 + 3]
-+ sbi $r1, [$r2 + 4]
-+ sbi $r1, [$r2 + 5]
-+ sbi $r1, [$r2 + 6]
-+ sbi $r1, [$r2 + 7]
-+ sbi $r1, [$r3 + 0]
-+ sbi $r1, [$r3 + 1]
-+ sbi $r1, [$r3 + 2]
-+ sbi $r1, [$r3 + 3]
-+ sbi $r1, [$r3 + 4]
-+ sbi $r1, [$r3 + 5]
-+ sbi $r1, [$r3 + 6]
-+ sbi $r1, [$r3 + 7]
-+ sbi $r1, [$r4 + 0]
-+ sbi $r1, [$r4 + 1]
-+ sbi $r1, [$r4 + 2]
-+ sbi $r1, [$r4 + 3]
-+ sbi $r1, [$r4 + 4]
-+ sbi $r1, [$r4 + 5]
-+ sbi $r1, [$r4 + 6]
-+ sbi $r1, [$r4 + 7]
-+ sbi $r1, [$r5 + 0]
-+ sbi $r1, [$r5 + 1]
-+ sbi $r1, [$r5 + 2]
-+ sbi $r1, [$r5 + 3]
-+ sbi $r1, [$r5 + 4]
-+ sbi $r1, [$r5 + 5]
-+ sbi $r1, [$r5 + 6]
-+ sbi $r1, [$r5 + 7]
-+ sbi $r1, [$r6 + 0]
-+ sbi $r1, [$r6 + 1]
-+ sbi $r1, [$r6 + 2]
-+ sbi $r1, [$r6 + 3]
-+ sbi $r1, [$r6 + 4]
-+ sbi $r1, [$r6 + 5]
-+ sbi $r1, [$r6 + 6]
-+ sbi $r1, [$r6 + 7]
-+ sbi $r1, [$r7 + 0]
-+ sbi $r1, [$r7 + 1]
-+ sbi $r1, [$r7 + 2]
-+ sbi $r1, [$r7 + 3]
-+ sbi $r1, [$r7 + 4]
-+ sbi $r1, [$r7 + 5]
-+ sbi $r1, [$r7 + 6]
-+ sbi $r1, [$r7 + 7]
-+ sbi $r2, [$r0 + 0]
-+ sbi $r2, [$r0 + 1]
-+ sbi $r2, [$r0 + 2]
-+ sbi $r2, [$r0 + 3]
-+ sbi $r2, [$r0 + 4]
-+ sbi $r2, [$r0 + 5]
-+ sbi $r2, [$r0 + 6]
-+ sbi $r2, [$r0 + 7]
-+ sbi $r2, [$r1 + 0]
-+ sbi $r2, [$r1 + 1]
-+ sbi $r2, [$r1 + 2]
-+ sbi $r2, [$r1 + 3]
-+ sbi $r2, [$r1 + 4]
-+ sbi $r2, [$r1 + 5]
-+ sbi $r2, [$r1 + 6]
-+ sbi $r2, [$r1 + 7]
-+ sbi $r2, [$r2 + 0]
-+ sbi $r2, [$r2 + 1]
-+ sbi $r2, [$r2 + 2]
-+ sbi $r2, [$r2 + 3]
-+ sbi $r2, [$r2 + 4]
-+ sbi $r2, [$r2 + 5]
-+ sbi $r2, [$r2 + 6]
-+ sbi $r2, [$r2 + 7]
-+ sbi $r2, [$r3 + 0]
-+ sbi $r2, [$r3 + 1]
-+ sbi $r2, [$r3 + 2]
-+ sbi $r2, [$r3 + 3]
-+ sbi $r2, [$r3 + 4]
-+ sbi $r2, [$r3 + 5]
-+ sbi $r2, [$r3 + 6]
-+ sbi $r2, [$r3 + 7]
-+ sbi $r2, [$r4 + 0]
-+ sbi $r2, [$r4 + 1]
-+ sbi $r2, [$r4 + 2]
-+ sbi $r2, [$r4 + 3]
-+ sbi $r2, [$r4 + 4]
-+ sbi $r2, [$r4 + 5]
-+ sbi $r2, [$r4 + 6]
-+ sbi $r2, [$r4 + 7]
-+ sbi $r2, [$r5 + 0]
-+ sbi $r2, [$r5 + 1]
-+ sbi $r2, [$r5 + 2]
-+ sbi $r2, [$r5 + 3]
-+ sbi $r2, [$r5 + 4]
-+ sbi $r2, [$r5 + 5]
-+ sbi $r2, [$r5 + 6]
-+ sbi $r2, [$r5 + 7]
-+ sbi $r2, [$r6 + 0]
-+ sbi $r2, [$r6 + 1]
-+ sbi $r2, [$r6 + 2]
-+ sbi $r2, [$r6 + 3]
-+ sbi $r2, [$r6 + 4]
-+ sbi $r2, [$r6 + 5]
-+ sbi $r2, [$r6 + 6]
-+ sbi $r2, [$r6 + 7]
-+ sbi $r2, [$r7 + 0]
-+ sbi $r2, [$r7 + 1]
-+ sbi $r2, [$r7 + 2]
-+ sbi $r2, [$r7 + 3]
-+ sbi $r2, [$r7 + 4]
-+ sbi $r2, [$r7 + 5]
-+ sbi $r2, [$r7 + 6]
-+ sbi $r2, [$r7 + 7]
-+ sbi $r3, [$r0 + 0]
-+ sbi $r3, [$r0 + 1]
-+ sbi $r3, [$r0 + 2]
-+ sbi $r3, [$r0 + 3]
-+ sbi $r3, [$r0 + 4]
-+ sbi $r3, [$r0 + 5]
-+ sbi $r3, [$r0 + 6]
-+ sbi $r3, [$r0 + 7]
-+ sbi $r3, [$r1 + 0]
-+ sbi $r3, [$r1 + 1]
-+ sbi $r3, [$r1 + 2]
-+ sbi $r3, [$r1 + 3]
-+ sbi $r3, [$r1 + 4]
-+ sbi $r3, [$r1 + 5]
-+ sbi $r3, [$r1 + 6]
-+ sbi $r3, [$r1 + 7]
-+ sbi $r3, [$r2 + 0]
-+ sbi $r3, [$r2 + 1]
-+ sbi $r3, [$r2 + 2]
-+ sbi $r3, [$r2 + 3]
-+ sbi $r3, [$r2 + 4]
-+ sbi $r3, [$r2 + 5]
-+ sbi $r3, [$r2 + 6]
-+ sbi $r3, [$r2 + 7]
-+ sbi $r3, [$r3 + 0]
-+ sbi $r3, [$r3 + 1]
-+ sbi $r3, [$r3 + 2]
-+ sbi $r3, [$r3 + 3]
-+ sbi $r3, [$r3 + 4]
-+ sbi $r3, [$r3 + 5]
-+ sbi $r3, [$r3 + 6]
-+ sbi $r3, [$r3 + 7]
-+ sbi $r3, [$r4 + 0]
-+ sbi $r3, [$r4 + 1]
-+ sbi $r3, [$r4 + 2]
-+ sbi $r3, [$r4 + 3]
-+ sbi $r3, [$r4 + 4]
-+ sbi $r3, [$r4 + 5]
-+ sbi $r3, [$r4 + 6]
-+ sbi $r3, [$r4 + 7]
-+ sbi $r3, [$r5 + 0]
-+ sbi $r3, [$r5 + 1]
-+ sbi $r3, [$r5 + 2]
-+ sbi $r3, [$r5 + 3]
-+ sbi $r3, [$r5 + 4]
-+ sbi $r3, [$r5 + 5]
-+ sbi $r3, [$r5 + 6]
-+ sbi $r3, [$r5 + 7]
-+ sbi $r3, [$r6 + 0]
-+ sbi $r3, [$r6 + 1]
-+ sbi $r3, [$r6 + 2]
-+ sbi $r3, [$r6 + 3]
-+ sbi $r3, [$r6 + 4]
-+ sbi $r3, [$r6 + 5]
-+ sbi $r3, [$r6 + 6]
-+ sbi $r3, [$r6 + 7]
-+ sbi $r3, [$r7 + 0]
-+ sbi $r3, [$r7 + 1]
-+ sbi $r3, [$r7 + 2]
-+ sbi $r3, [$r7 + 3]
-+ sbi $r3, [$r7 + 4]
-+ sbi $r3, [$r7 + 5]
-+ sbi $r3, [$r7 + 6]
-+ sbi $r3, [$r7 + 7]
-+ sbi $r4, [$r0 + 0]
-+ sbi $r4, [$r0 + 1]
-+ sbi $r4, [$r0 + 2]
-+ sbi $r4, [$r0 + 3]
-+ sbi $r4, [$r0 + 4]
-+ sbi $r4, [$r0 + 5]
-+ sbi $r4, [$r0 + 6]
-+ sbi $r4, [$r0 + 7]
-+ sbi $r4, [$r1 + 0]
-+ sbi $r4, [$r1 + 1]
-+ sbi $r4, [$r1 + 2]
-+ sbi $r4, [$r1 + 3]
-+ sbi $r4, [$r1 + 4]
-+ sbi $r4, [$r1 + 5]
-+ sbi $r4, [$r1 + 6]
-+ sbi $r4, [$r1 + 7]
-+ sbi $r4, [$r2 + 0]
-+ sbi $r4, [$r2 + 1]
-+ sbi $r4, [$r2 + 2]
-+ sbi $r4, [$r2 + 3]
-+ sbi $r4, [$r2 + 4]
-+ sbi $r4, [$r2 + 5]
-+ sbi $r4, [$r2 + 6]
-+ sbi $r4, [$r2 + 7]
-+ sbi $r4, [$r3 + 0]
-+ sbi $r4, [$r3 + 1]
-+ sbi $r4, [$r3 + 2]
-+ sbi $r4, [$r3 + 3]
-+ sbi $r4, [$r3 + 4]
-+ sbi $r4, [$r3 + 5]
-+ sbi $r4, [$r3 + 6]
-+ sbi $r4, [$r3 + 7]
-+ sbi $r4, [$r4 + 0]
-+ sbi $r4, [$r4 + 1]
-+ sbi $r4, [$r4 + 2]
-+ sbi $r4, [$r4 + 3]
-+ sbi $r4, [$r4 + 4]
-+ sbi $r4, [$r4 + 5]
-+ sbi $r4, [$r4 + 6]
-+ sbi $r4, [$r4 + 7]
-+ sbi $r4, [$r5 + 0]
-+ sbi $r4, [$r5 + 1]
-+ sbi $r4, [$r5 + 2]
-+ sbi $r4, [$r5 + 3]
-+ sbi $r4, [$r5 + 4]
-+ sbi $r4, [$r5 + 5]
-+ sbi $r4, [$r5 + 6]
-+ sbi $r4, [$r5 + 7]
-+ sbi $r4, [$r6 + 0]
-+ sbi $r4, [$r6 + 1]
-+ sbi $r4, [$r6 + 2]
-+ sbi $r4, [$r6 + 3]
-+ sbi $r4, [$r6 + 4]
-+ sbi $r4, [$r6 + 5]
-+ sbi $r4, [$r6 + 6]
-+ sbi $r4, [$r6 + 7]
-+ sbi $r4, [$r7 + 0]
-+ sbi $r4, [$r7 + 1]
-+ sbi $r4, [$r7 + 2]
-+ sbi $r4, [$r7 + 3]
-+ sbi $r4, [$r7 + 4]
-+ sbi $r4, [$r7 + 5]
-+ sbi $r4, [$r7 + 6]
-+ sbi $r4, [$r7 + 7]
-+ sbi $r5, [$r0 + 0]
-+ sbi $r5, [$r0 + 1]
-+ sbi $r5, [$r0 + 2]
-+ sbi $r5, [$r0 + 3]
-+ sbi $r5, [$r0 + 4]
-+ sbi $r5, [$r0 + 5]
-+ sbi $r5, [$r0 + 6]
-+ sbi $r5, [$r0 + 7]
-+ sbi $r5, [$r1 + 0]
-+ sbi $r5, [$r1 + 1]
-+ sbi $r5, [$r1 + 2]
-+ sbi $r5, [$r1 + 3]
-+ sbi $r5, [$r1 + 4]
-+ sbi $r5, [$r1 + 5]
-+ sbi $r5, [$r1 + 6]
-+ sbi $r5, [$r1 + 7]
-+ sbi $r5, [$r2 + 0]
-+ sbi $r5, [$r2 + 1]
-+ sbi $r5, [$r2 + 2]
-+ sbi $r5, [$r2 + 3]
-+ sbi $r5, [$r2 + 4]
-+ sbi $r5, [$r2 + 5]
-+ sbi $r5, [$r2 + 6]
-+ sbi $r5, [$r2 + 7]
-+ sbi $r5, [$r3 + 0]
-+ sbi $r5, [$r3 + 1]
-+ sbi $r5, [$r3 + 2]
-+ sbi $r5, [$r3 + 3]
-+ sbi $r5, [$r3 + 4]
-+ sbi $r5, [$r3 + 5]
-+ sbi $r5, [$r3 + 6]
-+ sbi $r5, [$r3 + 7]
-+ sbi $r5, [$r4 + 0]
-+ sbi $r5, [$r4 + 1]
-+ sbi $r5, [$r4 + 2]
-+ sbi $r5, [$r4 + 3]
-+ sbi $r5, [$r4 + 4]
-+ sbi $r5, [$r4 + 5]
-+ sbi $r5, [$r4 + 6]
-+ sbi $r5, [$r4 + 7]
-+ sbi $r5, [$r5 + 0]
-+ sbi $r5, [$r5 + 1]
-+ sbi $r5, [$r5 + 2]
-+ sbi $r5, [$r5 + 3]
-+ sbi $r5, [$r5 + 4]
-+ sbi $r5, [$r5 + 5]
-+ sbi $r5, [$r5 + 6]
-+ sbi $r5, [$r5 + 7]
-+ sbi $r5, [$r6 + 0]
-+ sbi $r5, [$r6 + 1]
-+ sbi $r5, [$r6 + 2]
-+ sbi $r5, [$r6 + 3]
-+ sbi $r5, [$r6 + 4]
-+ sbi $r5, [$r6 + 5]
-+ sbi $r5, [$r6 + 6]
-+ sbi $r5, [$r6 + 7]
-+ sbi $r5, [$r7 + 0]
-+ sbi $r5, [$r7 + 1]
-+ sbi $r5, [$r7 + 2]
-+ sbi $r5, [$r7 + 3]
-+ sbi $r5, [$r7 + 4]
-+ sbi $r5, [$r7 + 5]
-+ sbi $r5, [$r7 + 6]
-+ sbi $r5, [$r7 + 7]
-+ sbi $r6, [$r0 + 0]
-+ sbi $r6, [$r0 + 1]
-+ sbi $r6, [$r0 + 2]
-+ sbi $r6, [$r0 + 3]
-+ sbi $r6, [$r0 + 4]
-+ sbi $r6, [$r0 + 5]
-+ sbi $r6, [$r0 + 6]
-+ sbi $r6, [$r0 + 7]
-+ sbi $r6, [$r1 + 0]
-+ sbi $r6, [$r1 + 1]
-+ sbi $r6, [$r1 + 2]
-+ sbi $r6, [$r1 + 3]
-+ sbi $r6, [$r1 + 4]
-+ sbi $r6, [$r1 + 5]
-+ sbi $r6, [$r1 + 6]
-+ sbi $r6, [$r1 + 7]
-+ sbi $r6, [$r2 + 0]
-+ sbi $r6, [$r2 + 1]
-+ sbi $r6, [$r2 + 2]
-+ sbi $r6, [$r2 + 3]
-+ sbi $r6, [$r2 + 4]
-+ sbi $r6, [$r2 + 5]
-+ sbi $r6, [$r2 + 6]
-+ sbi $r6, [$r2 + 7]
-+ sbi $r6, [$r3 + 0]
-+ sbi $r6, [$r3 + 1]
-+ sbi $r6, [$r3 + 2]
-+ sbi $r6, [$r3 + 3]
-+ sbi $r6, [$r3 + 4]
-+ sbi $r6, [$r3 + 5]
-+ sbi $r6, [$r3 + 6]
-+ sbi $r6, [$r3 + 7]
-+ sbi $r6, [$r4 + 0]
-+ sbi $r6, [$r4 + 1]
-+ sbi $r6, [$r4 + 2]
-+ sbi $r6, [$r4 + 3]
-+ sbi $r6, [$r4 + 4]
-+ sbi $r6, [$r4 + 5]
-+ sbi $r6, [$r4 + 6]
-+ sbi $r6, [$r4 + 7]
-+ sbi $r6, [$r5 + 0]
-+ sbi $r6, [$r5 + 1]
-+ sbi $r6, [$r5 + 2]
-+ sbi $r6, [$r5 + 3]
-+ sbi $r6, [$r5 + 4]
-+ sbi $r6, [$r5 + 5]
-+ sbi $r6, [$r5 + 6]
-+ sbi $r6, [$r5 + 7]
-+ sbi $r6, [$r6 + 0]
-+ sbi $r6, [$r6 + 1]
-+ sbi $r6, [$r6 + 2]
-+ sbi $r6, [$r6 + 3]
-+ sbi $r6, [$r6 + 4]
-+ sbi $r6, [$r6 + 5]
-+ sbi $r6, [$r6 + 6]
-+ sbi $r6, [$r6 + 7]
-+ sbi $r6, [$r7 + 0]
-+ sbi $r6, [$r7 + 1]
-+ sbi $r6, [$r7 + 2]
-+ sbi $r6, [$r7 + 3]
-+ sbi $r6, [$r7 + 4]
-+ sbi $r6, [$r7 + 5]
-+ sbi $r6, [$r7 + 6]
-+ sbi $r6, [$r7 + 7]
-+ sbi $r7, [$r0 + 0]
-+ sbi $r7, [$r0 + 1]
-+ sbi $r7, [$r0 + 2]
-+ sbi $r7, [$r0 + 3]
-+ sbi $r7, [$r0 + 4]
-+ sbi $r7, [$r0 + 5]
-+ sbi $r7, [$r0 + 6]
-+ sbi $r7, [$r0 + 7]
-+ sbi $r7, [$r1 + 0]
-+ sbi $r7, [$r1 + 1]
-+ sbi $r7, [$r1 + 2]
-+ sbi $r7, [$r1 + 3]
-+ sbi $r7, [$r1 + 4]
-+ sbi $r7, [$r1 + 5]
-+ sbi $r7, [$r1 + 6]
-+ sbi $r7, [$r1 + 7]
-+ sbi $r7, [$r2 + 0]
-+ sbi $r7, [$r2 + 1]
-+ sbi $r7, [$r2 + 2]
-+ sbi $r7, [$r2 + 3]
-+ sbi $r7, [$r2 + 4]
-+ sbi $r7, [$r2 + 5]
-+ sbi $r7, [$r2 + 6]
-+ sbi $r7, [$r2 + 7]
-+ sbi $r7, [$r3 + 0]
-+ sbi $r7, [$r3 + 1]
-+ sbi $r7, [$r3 + 2]
-+ sbi $r7, [$r3 + 3]
-+ sbi $r7, [$r3 + 4]
-+ sbi $r7, [$r3 + 5]
-+ sbi $r7, [$r3 + 6]
-+ sbi $r7, [$r3 + 7]
-+ sbi $r7, [$r4 + 0]
-+ sbi $r7, [$r4 + 1]
-+ sbi $r7, [$r4 + 2]
-+ sbi $r7, [$r4 + 3]
-+ sbi $r7, [$r4 + 4]
-+ sbi $r7, [$r4 + 5]
-+ sbi $r7, [$r4 + 6]
-+ sbi $r7, [$r4 + 7]
-+ sbi $r7, [$r5 + 0]
-+ sbi $r7, [$r5 + 1]
-+ sbi $r7, [$r5 + 2]
-+ sbi $r7, [$r5 + 3]
-+ sbi $r7, [$r5 + 4]
-+ sbi $r7, [$r5 + 5]
-+ sbi $r7, [$r5 + 6]
-+ sbi $r7, [$r5 + 7]
-+ sbi $r7, [$r6 + 0]
-+ sbi $r7, [$r6 + 1]
-+ sbi $r7, [$r6 + 2]
-+ sbi $r7, [$r6 + 3]
-+ sbi $r7, [$r6 + 4]
-+ sbi $r7, [$r6 + 5]
-+ sbi $r7, [$r6 + 6]
-+ sbi $r7, [$r6 + 7]
-+ sbi $r7, [$r7 + 0]
-+ sbi $r7, [$r7 + 1]
-+ sbi $r7, [$r7 + 2]
-+ sbi $r7, [$r7 + 3]
-+ sbi $r7, [$r7 + 4]
-+ sbi $r7, [$r7 + 5]
-+ sbi $r7, [$r7 + 6]
-+ sbi $r7, [$r7 + 7]
-+ lwi $r0, [$r0 + 0]
-+ lwi $r0, [$r1 + 0]
-+ lwi $r0, [$r2 + 0]
-+ lwi $r0, [$r3 + 0]
-+ lwi $r0, [$r4 + 0]
-+ lwi $r0, [$r5 + 0]
-+ lwi $r0, [$r6 + 0]
-+ lwi $r0, [$r7 + 0]
-+ lwi $r0, [$r8 + 0]
-+ lwi $r0, [$r9 + 0]
-+ lwi $r0, [$r10 + 0]
-+ lwi $r0, [$r11 + 0]
-+ lwi $r0, [$r16 + 0]
-+ lwi $r0, [$r17 + 0]
-+ lwi $r0, [$r18 + 0]
-+ lwi $r0, [$r19 + 0]
-+ lwi $r0, [$r12 + 0]
-+ lwi $r0, [$r13 + 0]
-+ lwi $r0, [$r14 + 0]
-+ lwi $r0, [$r15 + 0]
-+ lwi $r0, [$r20 + 0]
-+ lwi $r0, [$r21 + 0]
-+ lwi $r0, [$r22 + 0]
-+ lwi $r0, [$r23 + 0]
-+ lwi $r0, [$r24 + 0]
-+ lwi $r0, [$r25 + 0]
-+ lwi $r0, [$r26 + 0]
-+ lwi $r0, [$r27 + 0]
-+ lwi $r0, [$fp + 0]
-+ lwi $r0, [$gp + 0]
-+ lwi $r0, [$lp + 0]
-+ lwi $r0, [$sp + 0]
-+ lwi $r1, [$r0 + 0]
-+ lwi $r1, [$r1 + 0]
-+ lwi $r1, [$r2 + 0]
-+ lwi $r1, [$r3 + 0]
-+ lwi $r1, [$r4 + 0]
-+ lwi $r1, [$r5 + 0]
-+ lwi $r1, [$r6 + 0]
-+ lwi $r1, [$r7 + 0]
-+ lwi $r1, [$r8 + 0]
-+ lwi $r1, [$r9 + 0]
-+ lwi $r1, [$r10 + 0]
-+ lwi $r1, [$r11 + 0]
-+ lwi $r1, [$r16 + 0]
-+ lwi $r1, [$r17 + 0]
-+ lwi $r1, [$r18 + 0]
-+ lwi $r1, [$r19 + 0]
-+ lwi $r1, [$r12 + 0]
-+ lwi $r1, [$r13 + 0]
-+ lwi $r1, [$r14 + 0]
-+ lwi $r1, [$r15 + 0]
-+ lwi $r1, [$r20 + 0]
-+ lwi $r1, [$r21 + 0]
-+ lwi $r1, [$r22 + 0]
-+ lwi $r1, [$r23 + 0]
-+ lwi $r1, [$r24 + 0]
-+ lwi $r1, [$r25 + 0]
-+ lwi $r1, [$r26 + 0]
-+ lwi $r1, [$r27 + 0]
-+ lwi $r1, [$fp + 0]
-+ lwi $r1, [$gp + 0]
-+ lwi $r1, [$lp + 0]
-+ lwi $r1, [$sp + 0]
-+ lwi $r2, [$r0 + 0]
-+ lwi $r2, [$r1 + 0]
-+ lwi $r2, [$r2 + 0]
-+ lwi $r2, [$r3 + 0]
-+ lwi $r2, [$r4 + 0]
-+ lwi $r2, [$r5 + 0]
-+ lwi $r2, [$r6 + 0]
-+ lwi $r2, [$r7 + 0]
-+ lwi $r2, [$r8 + 0]
-+ lwi $r2, [$r9 + 0]
-+ lwi $r2, [$r10 + 0]
-+ lwi $r2, [$r11 + 0]
-+ lwi $r2, [$r16 + 0]
-+ lwi $r2, [$r17 + 0]
-+ lwi $r2, [$r18 + 0]
-+ lwi $r2, [$r19 + 0]
-+ lwi $r2, [$r12 + 0]
-+ lwi $r2, [$r13 + 0]
-+ lwi $r2, [$r14 + 0]
-+ lwi $r2, [$r15 + 0]
-+ lwi $r2, [$r20 + 0]
-+ lwi $r2, [$r21 + 0]
-+ lwi $r2, [$r22 + 0]
-+ lwi $r2, [$r23 + 0]
-+ lwi $r2, [$r24 + 0]
-+ lwi $r2, [$r25 + 0]
-+ lwi $r2, [$r26 + 0]
-+ lwi $r2, [$r27 + 0]
-+ lwi $r2, [$fp + 0]
-+ lwi $r2, [$gp + 0]
-+ lwi $r2, [$lp + 0]
-+ lwi $r2, [$sp + 0]
-+ lwi $r3, [$r0 + 0]
-+ lwi $r3, [$r1 + 0]
-+ lwi $r3, [$r2 + 0]
-+ lwi $r3, [$r3 + 0]
-+ lwi $r3, [$r4 + 0]
-+ lwi $r3, [$r5 + 0]
-+ lwi $r3, [$r6 + 0]
-+ lwi $r3, [$r7 + 0]
-+ lwi $r3, [$r8 + 0]
-+ lwi $r3, [$r9 + 0]
-+ lwi $r3, [$r10 + 0]
-+ lwi $r3, [$r11 + 0]
-+ lwi $r3, [$r16 + 0]
-+ lwi $r3, [$r17 + 0]
-+ lwi $r3, [$r18 + 0]
-+ lwi $r3, [$r19 + 0]
-+ lwi $r3, [$r12 + 0]
-+ lwi $r3, [$r13 + 0]
-+ lwi $r3, [$r14 + 0]
-+ lwi $r3, [$r15 + 0]
-+ lwi $r3, [$r20 + 0]
-+ lwi $r3, [$r21 + 0]
-+ lwi $r3, [$r22 + 0]
-+ lwi $r3, [$r23 + 0]
-+ lwi $r3, [$r24 + 0]
-+ lwi $r3, [$r25 + 0]
-+ lwi $r3, [$r26 + 0]
-+ lwi $r3, [$r27 + 0]
-+ lwi $r3, [$fp + 0]
-+ lwi $r3, [$gp + 0]
-+ lwi $r3, [$lp + 0]
-+ lwi $r3, [$sp + 0]
-+ lwi $r4, [$r0 + 0]
-+ lwi $r4, [$r1 + 0]
-+ lwi $r4, [$r2 + 0]
-+ lwi $r4, [$r3 + 0]
-+ lwi $r4, [$r4 + 0]
-+ lwi $r4, [$r5 + 0]
-+ lwi $r4, [$r6 + 0]
-+ lwi $r4, [$r7 + 0]
-+ lwi $r4, [$r8 + 0]
-+ lwi $r4, [$r9 + 0]
-+ lwi $r4, [$r10 + 0]
-+ lwi $r4, [$r11 + 0]
-+ lwi $r4, [$r16 + 0]
-+ lwi $r4, [$r17 + 0]
-+ lwi $r4, [$r18 + 0]
-+ lwi $r4, [$r19 + 0]
-+ lwi $r4, [$r12 + 0]
-+ lwi $r4, [$r13 + 0]
-+ lwi $r4, [$r14 + 0]
-+ lwi $r4, [$r15 + 0]
-+ lwi $r4, [$r20 + 0]
-+ lwi $r4, [$r21 + 0]
-+ lwi $r4, [$r22 + 0]
-+ lwi $r4, [$r23 + 0]
-+ lwi $r4, [$r24 + 0]
-+ lwi $r4, [$r25 + 0]
-+ lwi $r4, [$r26 + 0]
-+ lwi $r4, [$r27 + 0]
-+ lwi $r4, [$fp + 0]
-+ lwi $r4, [$gp + 0]
-+ lwi $r4, [$lp + 0]
-+ lwi $r4, [$sp + 0]
-+ lwi $r5, [$r0 + 0]
-+ lwi $r5, [$r1 + 0]
-+ lwi $r5, [$r2 + 0]
-+ lwi $r5, [$r3 + 0]
-+ lwi $r5, [$r4 + 0]
-+ lwi $r5, [$r5 + 0]
-+ lwi $r5, [$r6 + 0]
-+ lwi $r5, [$r7 + 0]
-+ lwi $r5, [$r8 + 0]
-+ lwi $r5, [$r9 + 0]
-+ lwi $r5, [$r10 + 0]
-+ lwi $r5, [$r11 + 0]
-+ lwi $r5, [$r16 + 0]
-+ lwi $r5, [$r17 + 0]
-+ lwi $r5, [$r18 + 0]
-+ lwi $r5, [$r19 + 0]
-+ lwi $r5, [$r12 + 0]
-+ lwi $r5, [$r13 + 0]
-+ lwi $r5, [$r14 + 0]
-+ lwi $r5, [$r15 + 0]
-+ lwi $r5, [$r20 + 0]
-+ lwi $r5, [$r21 + 0]
-+ lwi $r5, [$r22 + 0]
-+ lwi $r5, [$r23 + 0]
-+ lwi $r5, [$r24 + 0]
-+ lwi $r5, [$r25 + 0]
-+ lwi $r5, [$r26 + 0]
-+ lwi $r5, [$r27 + 0]
-+ lwi $r5, [$fp + 0]
-+ lwi $r5, [$gp + 0]
-+ lwi $r5, [$lp + 0]
-+ lwi $r5, [$sp + 0]
-+ lwi $r6, [$r0 + 0]
-+ lwi $r6, [$r1 + 0]
-+ lwi $r6, [$r2 + 0]
-+ lwi $r6, [$r3 + 0]
-+ lwi $r6, [$r4 + 0]
-+ lwi $r6, [$r5 + 0]
-+ lwi $r6, [$r6 + 0]
-+ lwi $r6, [$r7 + 0]
-+ lwi $r6, [$r8 + 0]
-+ lwi $r6, [$r9 + 0]
-+ lwi $r6, [$r10 + 0]
-+ lwi $r6, [$r11 + 0]
-+ lwi $r6, [$r16 + 0]
-+ lwi $r6, [$r17 + 0]
-+ lwi $r6, [$r18 + 0]
-+ lwi $r6, [$r19 + 0]
-+ lwi $r6, [$r12 + 0]
-+ lwi $r6, [$r13 + 0]
-+ lwi $r6, [$r14 + 0]
-+ lwi $r6, [$r15 + 0]
-+ lwi $r6, [$r20 + 0]
-+ lwi $r6, [$r21 + 0]
-+ lwi $r6, [$r22 + 0]
-+ lwi $r6, [$r23 + 0]
-+ lwi $r6, [$r24 + 0]
-+ lwi $r6, [$r25 + 0]
-+ lwi $r6, [$r26 + 0]
-+ lwi $r6, [$r27 + 0]
-+ lwi $r6, [$fp + 0]
-+ lwi $r6, [$gp + 0]
-+ lwi $r6, [$lp + 0]
-+ lwi $r6, [$sp + 0]
-+ lwi $r7, [$r0 + 0]
-+ lwi $r7, [$r1 + 0]
-+ lwi $r7, [$r2 + 0]
-+ lwi $r7, [$r3 + 0]
-+ lwi $r7, [$r4 + 0]
-+ lwi $r7, [$r5 + 0]
-+ lwi $r7, [$r6 + 0]
-+ lwi $r7, [$r7 + 0]
-+ lwi $r7, [$r8 + 0]
-+ lwi $r7, [$r9 + 0]
-+ lwi $r7, [$r10 + 0]
-+ lwi $r7, [$r11 + 0]
-+ lwi $r7, [$r16 + 0]
-+ lwi $r7, [$r17 + 0]
-+ lwi $r7, [$r18 + 0]
-+ lwi $r7, [$r19 + 0]
-+ lwi $r7, [$r12 + 0]
-+ lwi $r7, [$r13 + 0]
-+ lwi $r7, [$r14 + 0]
-+ lwi $r7, [$r15 + 0]
-+ lwi $r7, [$r20 + 0]
-+ lwi $r7, [$r21 + 0]
-+ lwi $r7, [$r22 + 0]
-+ lwi $r7, [$r23 + 0]
-+ lwi $r7, [$r24 + 0]
-+ lwi $r7, [$r25 + 0]
-+ lwi $r7, [$r26 + 0]
-+ lwi $r7, [$r27 + 0]
-+ lwi $r7, [$fp + 0]
-+ lwi $r7, [$gp + 0]
-+ lwi $r7, [$lp + 0]
-+ lwi $r7, [$sp + 0]
-+ lwi $r8, [$r0 + 0]
-+ lwi $r8, [$r1 + 0]
-+ lwi $r8, [$r2 + 0]
-+ lwi $r8, [$r3 + 0]
-+ lwi $r8, [$r4 + 0]
-+ lwi $r8, [$r5 + 0]
-+ lwi $r8, [$r6 + 0]
-+ lwi $r8, [$r7 + 0]
-+ lwi $r8, [$r8 + 0]
-+ lwi $r8, [$r9 + 0]
-+ lwi $r8, [$r10 + 0]
-+ lwi $r8, [$r11 + 0]
-+ lwi $r8, [$r16 + 0]
-+ lwi $r8, [$r17 + 0]
-+ lwi $r8, [$r18 + 0]
-+ lwi $r8, [$r19 + 0]
-+ lwi $r8, [$r12 + 0]
-+ lwi $r8, [$r13 + 0]
-+ lwi $r8, [$r14 + 0]
-+ lwi $r8, [$r15 + 0]
-+ lwi $r8, [$r20 + 0]
-+ lwi $r8, [$r21 + 0]
-+ lwi $r8, [$r22 + 0]
-+ lwi $r8, [$r23 + 0]
-+ lwi $r8, [$r24 + 0]
-+ lwi $r8, [$r25 + 0]
-+ lwi $r8, [$r26 + 0]
-+ lwi $r8, [$r27 + 0]
-+ lwi $r8, [$fp + 0]
-+ lwi $r8, [$gp + 0]
-+ lwi $r8, [$lp + 0]
-+ lwi $r8, [$sp + 0]
-+ lwi $r9, [$r0 + 0]
-+ lwi $r9, [$r1 + 0]
-+ lwi $r9, [$r2 + 0]
-+ lwi $r9, [$r3 + 0]
-+ lwi $r9, [$r4 + 0]
-+ lwi $r9, [$r5 + 0]
-+ lwi $r9, [$r6 + 0]
-+ lwi $r9, [$r7 + 0]
-+ lwi $r9, [$r8 + 0]
-+ lwi $r9, [$r9 + 0]
-+ lwi $r9, [$r10 + 0]
-+ lwi $r9, [$r11 + 0]
-+ lwi $r9, [$r16 + 0]
-+ lwi $r9, [$r17 + 0]
-+ lwi $r9, [$r18 + 0]
-+ lwi $r9, [$r19 + 0]
-+ lwi $r9, [$r12 + 0]
-+ lwi $r9, [$r13 + 0]
-+ lwi $r9, [$r14 + 0]
-+ lwi $r9, [$r15 + 0]
-+ lwi $r9, [$r20 + 0]
-+ lwi $r9, [$r21 + 0]
-+ lwi $r9, [$r22 + 0]
-+ lwi $r9, [$r23 + 0]
-+ lwi $r9, [$r24 + 0]
-+ lwi $r9, [$r25 + 0]
-+ lwi $r9, [$r26 + 0]
-+ lwi $r9, [$r27 + 0]
-+ lwi $r9, [$fp + 0]
-+ lwi $r9, [$gp + 0]
-+ lwi $r9, [$lp + 0]
-+ lwi $r9, [$sp + 0]
-+ lwi $r10, [$r0 + 0]
-+ lwi $r10, [$r1 + 0]
-+ lwi $r10, [$r2 + 0]
-+ lwi $r10, [$r3 + 0]
-+ lwi $r10, [$r4 + 0]
-+ lwi $r10, [$r5 + 0]
-+ lwi $r10, [$r6 + 0]
-+ lwi $r10, [$r7 + 0]
-+ lwi $r10, [$r8 + 0]
-+ lwi $r10, [$r9 + 0]
-+ lwi $r10, [$r10 + 0]
-+ lwi $r10, [$r11 + 0]
-+ lwi $r10, [$r16 + 0]
-+ lwi $r10, [$r17 + 0]
-+ lwi $r10, [$r18 + 0]
-+ lwi $r10, [$r19 + 0]
-+ lwi $r10, [$r12 + 0]
-+ lwi $r10, [$r13 + 0]
-+ lwi $r10, [$r14 + 0]
-+ lwi $r10, [$r15 + 0]
-+ lwi $r10, [$r20 + 0]
-+ lwi $r10, [$r21 + 0]
-+ lwi $r10, [$r22 + 0]
-+ lwi $r10, [$r23 + 0]
-+ lwi $r10, [$r24 + 0]
-+ lwi $r10, [$r25 + 0]
-+ lwi $r10, [$r26 + 0]
-+ lwi $r10, [$r27 + 0]
-+ lwi $r10, [$fp + 0]
-+ lwi $r10, [$gp + 0]
-+ lwi $r10, [$lp + 0]
-+ lwi $r10, [$sp + 0]
-+ lwi $r11, [$r0 + 0]
-+ lwi $r11, [$r1 + 0]
-+ lwi $r11, [$r2 + 0]
-+ lwi $r11, [$r3 + 0]
-+ lwi $r11, [$r4 + 0]
-+ lwi $r11, [$r5 + 0]
-+ lwi $r11, [$r6 + 0]
-+ lwi $r11, [$r7 + 0]
-+ lwi $r11, [$r8 + 0]
-+ lwi $r11, [$r9 + 0]
-+ lwi $r11, [$r10 + 0]
-+ lwi $r11, [$r11 + 0]
-+ lwi $r11, [$r16 + 0]
-+ lwi $r11, [$r17 + 0]
-+ lwi $r11, [$r18 + 0]
-+ lwi $r11, [$r19 + 0]
-+ lwi $r11, [$r12 + 0]
-+ lwi $r11, [$r13 + 0]
-+ lwi $r11, [$r14 + 0]
-+ lwi $r11, [$r15 + 0]
-+ lwi $r11, [$r20 + 0]
-+ lwi $r11, [$r21 + 0]
-+ lwi $r11, [$r22 + 0]
-+ lwi $r11, [$r23 + 0]
-+ lwi $r11, [$r24 + 0]
-+ lwi $r11, [$r25 + 0]
-+ lwi $r11, [$r26 + 0]
-+ lwi $r11, [$r27 + 0]
-+ lwi $r11, [$fp + 0]
-+ lwi $r11, [$gp + 0]
-+ lwi $r11, [$lp + 0]
-+ lwi $r11, [$sp + 0]
-+ lwi $r16, [$r0 + 0]
-+ lwi $r16, [$r1 + 0]
-+ lwi $r16, [$r2 + 0]
-+ lwi $r16, [$r3 + 0]
-+ lwi $r16, [$r4 + 0]
-+ lwi $r16, [$r5 + 0]
-+ lwi $r16, [$r6 + 0]
-+ lwi $r16, [$r7 + 0]
-+ lwi $r16, [$r8 + 0]
-+ lwi $r16, [$r9 + 0]
-+ lwi $r16, [$r10 + 0]
-+ lwi $r16, [$r11 + 0]
-+ lwi $r16, [$r16 + 0]
-+ lwi $r16, [$r17 + 0]
-+ lwi $r16, [$r18 + 0]
-+ lwi $r16, [$r19 + 0]
-+ lwi $r16, [$r12 + 0]
-+ lwi $r16, [$r13 + 0]
-+ lwi $r16, [$r14 + 0]
-+ lwi $r16, [$r15 + 0]
-+ lwi $r16, [$r20 + 0]
-+ lwi $r16, [$r21 + 0]
-+ lwi $r16, [$r22 + 0]
-+ lwi $r16, [$r23 + 0]
-+ lwi $r16, [$r24 + 0]
-+ lwi $r16, [$r25 + 0]
-+ lwi $r16, [$r26 + 0]
-+ lwi $r16, [$r27 + 0]
-+ lwi $r16, [$fp + 0]
-+ lwi $r16, [$gp + 0]
-+ lwi $r16, [$lp + 0]
-+ lwi $r16, [$sp + 0]
-+ lwi $r17, [$r0 + 0]
-+ lwi $r17, [$r1 + 0]
-+ lwi $r17, [$r2 + 0]
-+ lwi $r17, [$r3 + 0]
-+ lwi $r17, [$r4 + 0]
-+ lwi $r17, [$r5 + 0]
-+ lwi $r17, [$r6 + 0]
-+ lwi $r17, [$r7 + 0]
-+ lwi $r17, [$r8 + 0]
-+ lwi $r17, [$r9 + 0]
-+ lwi $r17, [$r10 + 0]
-+ lwi $r17, [$r11 + 0]
-+ lwi $r17, [$r16 + 0]
-+ lwi $r17, [$r17 + 0]
-+ lwi $r17, [$r18 + 0]
-+ lwi $r17, [$r19 + 0]
-+ lwi $r17, [$r12 + 0]
-+ lwi $r17, [$r13 + 0]
-+ lwi $r17, [$r14 + 0]
-+ lwi $r17, [$r15 + 0]
-+ lwi $r17, [$r20 + 0]
-+ lwi $r17, [$r21 + 0]
-+ lwi $r17, [$r22 + 0]
-+ lwi $r17, [$r23 + 0]
-+ lwi $r17, [$r24 + 0]
-+ lwi $r17, [$r25 + 0]
-+ lwi $r17, [$r26 + 0]
-+ lwi $r17, [$r27 + 0]
-+ lwi $r17, [$fp + 0]
-+ lwi $r17, [$gp + 0]
-+ lwi $r17, [$lp + 0]
-+ lwi $r17, [$sp + 0]
-+ lwi $r18, [$r0 + 0]
-+ lwi $r18, [$r1 + 0]
-+ lwi $r18, [$r2 + 0]
-+ lwi $r18, [$r3 + 0]
-+ lwi $r18, [$r4 + 0]
-+ lwi $r18, [$r5 + 0]
-+ lwi $r18, [$r6 + 0]
-+ lwi $r18, [$r7 + 0]
-+ lwi $r18, [$r8 + 0]
-+ lwi $r18, [$r9 + 0]
-+ lwi $r18, [$r10 + 0]
-+ lwi $r18, [$r11 + 0]
-+ lwi $r18, [$r16 + 0]
-+ lwi $r18, [$r17 + 0]
-+ lwi $r18, [$r18 + 0]
-+ lwi $r18, [$r19 + 0]
-+ lwi $r18, [$r12 + 0]
-+ lwi $r18, [$r13 + 0]
-+ lwi $r18, [$r14 + 0]
-+ lwi $r18, [$r15 + 0]
-+ lwi $r18, [$r20 + 0]
-+ lwi $r18, [$r21 + 0]
-+ lwi $r18, [$r22 + 0]
-+ lwi $r18, [$r23 + 0]
-+ lwi $r18, [$r24 + 0]
-+ lwi $r18, [$r25 + 0]
-+ lwi $r18, [$r26 + 0]
-+ lwi $r18, [$r27 + 0]
-+ lwi $r18, [$fp + 0]
-+ lwi $r18, [$gp + 0]
-+ lwi $r18, [$lp + 0]
-+ lwi $r18, [$sp + 0]
-+ lwi $r19, [$r0 + 0]
-+ lwi $r19, [$r1 + 0]
-+ lwi $r19, [$r2 + 0]
-+ lwi $r19, [$r3 + 0]
-+ lwi $r19, [$r4 + 0]
-+ lwi $r19, [$r5 + 0]
-+ lwi $r19, [$r6 + 0]
-+ lwi $r19, [$r7 + 0]
-+ lwi $r19, [$r8 + 0]
-+ lwi $r19, [$r9 + 0]
-+ lwi $r19, [$r10 + 0]
-+ lwi $r19, [$r11 + 0]
-+ lwi $r19, [$r16 + 0]
-+ lwi $r19, [$r17 + 0]
-+ lwi $r19, [$r18 + 0]
-+ lwi $r19, [$r19 + 0]
-+ lwi $r19, [$r12 + 0]
-+ lwi $r19, [$r13 + 0]
-+ lwi $r19, [$r14 + 0]
-+ lwi $r19, [$r15 + 0]
-+ lwi $r19, [$r20 + 0]
-+ lwi $r19, [$r21 + 0]
-+ lwi $r19, [$r22 + 0]
-+ lwi $r19, [$r23 + 0]
-+ lwi $r19, [$r24 + 0]
-+ lwi $r19, [$r25 + 0]
-+ lwi $r19, [$r26 + 0]
-+ lwi $r19, [$r27 + 0]
-+ lwi $r19, [$fp + 0]
-+ lwi $r19, [$gp + 0]
-+ lwi $r19, [$lp + 0]
-+ lwi $r19, [$sp + 0]
-+ swi $r0, [$r0 + 0]
-+ swi $r0, [$r1 + 0]
-+ swi $r0, [$r2 + 0]
-+ swi $r0, [$r3 + 0]
-+ swi $r0, [$r4 + 0]
-+ swi $r0, [$r5 + 0]
-+ swi $r0, [$r6 + 0]
-+ swi $r0, [$r7 + 0]
-+ swi $r0, [$r8 + 0]
-+ swi $r0, [$r9 + 0]
-+ swi $r0, [$r10 + 0]
-+ swi $r0, [$r11 + 0]
-+ swi $r0, [$r16 + 0]
-+ swi $r0, [$r17 + 0]
-+ swi $r0, [$r18 + 0]
-+ swi $r0, [$r19 + 0]
-+ swi $r0, [$r12 + 0]
-+ swi $r0, [$r13 + 0]
-+ swi $r0, [$r14 + 0]
-+ swi $r0, [$r15 + 0]
-+ swi $r0, [$r20 + 0]
-+ swi $r0, [$r21 + 0]
-+ swi $r0, [$r22 + 0]
-+ swi $r0, [$r23 + 0]
-+ swi $r0, [$r24 + 0]
-+ swi $r0, [$r25 + 0]
-+ swi $r0, [$r26 + 0]
-+ swi $r0, [$r27 + 0]
-+ swi $r0, [$fp + 0]
-+ swi $r0, [$gp + 0]
-+ swi $r0, [$lp + 0]
-+ swi $r0, [$sp + 0]
-+ swi $r1, [$r0 + 0]
-+ swi $r1, [$r1 + 0]
-+ swi $r1, [$r2 + 0]
-+ swi $r1, [$r3 + 0]
-+ swi $r1, [$r4 + 0]
-+ swi $r1, [$r5 + 0]
-+ swi $r1, [$r6 + 0]
-+ swi $r1, [$r7 + 0]
-+ swi $r1, [$r8 + 0]
-+ swi $r1, [$r9 + 0]
-+ swi $r1, [$r10 + 0]
-+ swi $r1, [$r11 + 0]
-+ swi $r1, [$r16 + 0]
-+ swi $r1, [$r17 + 0]
-+ swi $r1, [$r18 + 0]
-+ swi $r1, [$r19 + 0]
-+ swi $r1, [$r12 + 0]
-+ swi $r1, [$r13 + 0]
-+ swi $r1, [$r14 + 0]
-+ swi $r1, [$r15 + 0]
-+ swi $r1, [$r20 + 0]
-+ swi $r1, [$r21 + 0]
-+ swi $r1, [$r22 + 0]
-+ swi $r1, [$r23 + 0]
-+ swi $r1, [$r24 + 0]
-+ swi $r1, [$r25 + 0]
-+ swi $r1, [$r26 + 0]
-+ swi $r1, [$r27 + 0]
-+ swi $r1, [$fp + 0]
-+ swi $r1, [$gp + 0]
-+ swi $r1, [$lp + 0]
-+ swi $r1, [$sp + 0]
-+ swi $r2, [$r0 + 0]
-+ swi $r2, [$r1 + 0]
-+ swi $r2, [$r2 + 0]
-+ swi $r2, [$r3 + 0]
-+ swi $r2, [$r4 + 0]
-+ swi $r2, [$r5 + 0]
-+ swi $r2, [$r6 + 0]
-+ swi $r2, [$r7 + 0]
-+ swi $r2, [$r8 + 0]
-+ swi $r2, [$r9 + 0]
-+ swi $r2, [$r10 + 0]
-+ swi $r2, [$r11 + 0]
-+ swi $r2, [$r16 + 0]
-+ swi $r2, [$r17 + 0]
-+ swi $r2, [$r18 + 0]
-+ swi $r2, [$r19 + 0]
-+ swi $r2, [$r12 + 0]
-+ swi $r2, [$r13 + 0]
-+ swi $r2, [$r14 + 0]
-+ swi $r2, [$r15 + 0]
-+ swi $r2, [$r20 + 0]
-+ swi $r2, [$r21 + 0]
-+ swi $r2, [$r22 + 0]
-+ swi $r2, [$r23 + 0]
-+ swi $r2, [$r24 + 0]
-+ swi $r2, [$r25 + 0]
-+ swi $r2, [$r26 + 0]
-+ swi $r2, [$r27 + 0]
-+ swi $r2, [$fp + 0]
-+ swi $r2, [$gp + 0]
-+ swi $r2, [$lp + 0]
-+ swi $r2, [$sp + 0]
-+ swi $r3, [$r0 + 0]
-+ swi $r3, [$r1 + 0]
-+ swi $r3, [$r2 + 0]
-+ swi $r3, [$r3 + 0]
-+ swi $r3, [$r4 + 0]
-+ swi $r3, [$r5 + 0]
-+ swi $r3, [$r6 + 0]
-+ swi $r3, [$r7 + 0]
-+ swi $r3, [$r8 + 0]
-+ swi $r3, [$r9 + 0]
-+ swi $r3, [$r10 + 0]
-+ swi $r3, [$r11 + 0]
-+ swi $r3, [$r16 + 0]
-+ swi $r3, [$r17 + 0]
-+ swi $r3, [$r18 + 0]
-+ swi $r3, [$r19 + 0]
-+ swi $r3, [$r12 + 0]
-+ swi $r3, [$r13 + 0]
-+ swi $r3, [$r14 + 0]
-+ swi $r3, [$r15 + 0]
-+ swi $r3, [$r20 + 0]
-+ swi $r3, [$r21 + 0]
-+ swi $r3, [$r22 + 0]
-+ swi $r3, [$r23 + 0]
-+ swi $r3, [$r24 + 0]
-+ swi $r3, [$r25 + 0]
-+ swi $r3, [$r26 + 0]
-+ swi $r3, [$r27 + 0]
-+ swi $r3, [$fp + 0]
-+ swi $r3, [$gp + 0]
-+ swi $r3, [$lp + 0]
-+ swi $r3, [$sp + 0]
-+ swi $r4, [$r0 + 0]
-+ swi $r4, [$r1 + 0]
-+ swi $r4, [$r2 + 0]
-+ swi $r4, [$r3 + 0]
-+ swi $r4, [$r4 + 0]
-+ swi $r4, [$r5 + 0]
-+ swi $r4, [$r6 + 0]
-+ swi $r4, [$r7 + 0]
-+ swi $r4, [$r8 + 0]
-+ swi $r4, [$r9 + 0]
-+ swi $r4, [$r10 + 0]
-+ swi $r4, [$r11 + 0]
-+ swi $r4, [$r16 + 0]
-+ swi $r4, [$r17 + 0]
-+ swi $r4, [$r18 + 0]
-+ swi $r4, [$r19 + 0]
-+ swi $r4, [$r12 + 0]
-+ swi $r4, [$r13 + 0]
-+ swi $r4, [$r14 + 0]
-+ swi $r4, [$r15 + 0]
-+ swi $r4, [$r20 + 0]
-+ swi $r4, [$r21 + 0]
-+ swi $r4, [$r22 + 0]
-+ swi $r4, [$r23 + 0]
-+ swi $r4, [$r24 + 0]
-+ swi $r4, [$r25 + 0]
-+ swi $r4, [$r26 + 0]
-+ swi $r4, [$r27 + 0]
-+ swi $r4, [$fp + 0]
-+ swi $r4, [$gp + 0]
-+ swi $r4, [$lp + 0]
-+ swi $r4, [$sp + 0]
-+ swi $r5, [$r0 + 0]
-+ swi $r5, [$r1 + 0]
-+ swi $r5, [$r2 + 0]
-+ swi $r5, [$r3 + 0]
-+ swi $r5, [$r4 + 0]
-+ swi $r5, [$r5 + 0]
-+ swi $r5, [$r6 + 0]
-+ swi $r5, [$r7 + 0]
-+ swi $r5, [$r8 + 0]
-+ swi $r5, [$r9 + 0]
-+ swi $r5, [$r10 + 0]
-+ swi $r5, [$r11 + 0]
-+ swi $r5, [$r16 + 0]
-+ swi $r5, [$r17 + 0]
-+ swi $r5, [$r18 + 0]
-+ swi $r5, [$r19 + 0]
-+ swi $r5, [$r12 + 0]
-+ swi $r5, [$r13 + 0]
-+ swi $r5, [$r14 + 0]
-+ swi $r5, [$r15 + 0]
-+ swi $r5, [$r20 + 0]
-+ swi $r5, [$r21 + 0]
-+ swi $r5, [$r22 + 0]
-+ swi $r5, [$r23 + 0]
-+ swi $r5, [$r24 + 0]
-+ swi $r5, [$r25 + 0]
-+ swi $r5, [$r26 + 0]
-+ swi $r5, [$r27 + 0]
-+ swi $r5, [$fp + 0]
-+ swi $r5, [$gp + 0]
-+ swi $r5, [$lp + 0]
-+ swi $r5, [$sp + 0]
-+ swi $r6, [$r0 + 0]
-+ swi $r6, [$r1 + 0]
-+ swi $r6, [$r2 + 0]
-+ swi $r6, [$r3 + 0]
-+ swi $r6, [$r4 + 0]
-+ swi $r6, [$r5 + 0]
-+ swi $r6, [$r6 + 0]
-+ swi $r6, [$r7 + 0]
-+ swi $r6, [$r8 + 0]
-+ swi $r6, [$r9 + 0]
-+ swi $r6, [$r10 + 0]
-+ swi $r6, [$r11 + 0]
-+ swi $r6, [$r16 + 0]
-+ swi $r6, [$r17 + 0]
-+ swi $r6, [$r18 + 0]
-+ swi $r6, [$r19 + 0]
-+ swi $r6, [$r12 + 0]
-+ swi $r6, [$r13 + 0]
-+ swi $r6, [$r14 + 0]
-+ swi $r6, [$r15 + 0]
-+ swi $r6, [$r20 + 0]
-+ swi $r6, [$r21 + 0]
-+ swi $r6, [$r22 + 0]
-+ swi $r6, [$r23 + 0]
-+ swi $r6, [$r24 + 0]
-+ swi $r6, [$r25 + 0]
-+ swi $r6, [$r26 + 0]
-+ swi $r6, [$r27 + 0]
-+ swi $r6, [$fp + 0]
-+ swi $r6, [$gp + 0]
-+ swi $r6, [$lp + 0]
-+ swi $r6, [$sp + 0]
-+ swi $r7, [$r0 + 0]
-+ swi $r7, [$r1 + 0]
-+ swi $r7, [$r2 + 0]
-+ swi $r7, [$r3 + 0]
-+ swi $r7, [$r4 + 0]
-+ swi $r7, [$r5 + 0]
-+ swi $r7, [$r6 + 0]
-+ swi $r7, [$r7 + 0]
-+ swi $r7, [$r8 + 0]
-+ swi $r7, [$r9 + 0]
-+ swi $r7, [$r10 + 0]
-+ swi $r7, [$r11 + 0]
-+ swi $r7, [$r16 + 0]
-+ swi $r7, [$r17 + 0]
-+ swi $r7, [$r18 + 0]
-+ swi $r7, [$r19 + 0]
-+ swi $r7, [$r12 + 0]
-+ swi $r7, [$r13 + 0]
-+ swi $r7, [$r14 + 0]
-+ swi $r7, [$r15 + 0]
-+ swi $r7, [$r20 + 0]
-+ swi $r7, [$r21 + 0]
-+ swi $r7, [$r22 + 0]
-+ swi $r7, [$r23 + 0]
-+ swi $r7, [$r24 + 0]
-+ swi $r7, [$r25 + 0]
-+ swi $r7, [$r26 + 0]
-+ swi $r7, [$r27 + 0]
-+ swi $r7, [$fp + 0]
-+ swi $r7, [$gp + 0]
-+ swi $r7, [$lp + 0]
-+ swi $r7, [$sp + 0]
-+ swi $r8, [$r0 + 0]
-+ swi $r8, [$r1 + 0]
-+ swi $r8, [$r2 + 0]
-+ swi $r8, [$r3 + 0]
-+ swi $r8, [$r4 + 0]
-+ swi $r8, [$r5 + 0]
-+ swi $r8, [$r6 + 0]
-+ swi $r8, [$r7 + 0]
-+ swi $r8, [$r8 + 0]
-+ swi $r8, [$r9 + 0]
-+ swi $r8, [$r10 + 0]
-+ swi $r8, [$r11 + 0]
-+ swi $r8, [$r16 + 0]
-+ swi $r8, [$r17 + 0]
-+ swi $r8, [$r18 + 0]
-+ swi $r8, [$r19 + 0]
-+ swi $r8, [$r12 + 0]
-+ swi $r8, [$r13 + 0]
-+ swi $r8, [$r14 + 0]
-+ swi $r8, [$r15 + 0]
-+ swi $r8, [$r20 + 0]
-+ swi $r8, [$r21 + 0]
-+ swi $r8, [$r22 + 0]
-+ swi $r8, [$r23 + 0]
-+ swi $r8, [$r24 + 0]
-+ swi $r8, [$r25 + 0]
-+ swi $r8, [$r26 + 0]
-+ swi $r8, [$r27 + 0]
-+ swi $r8, [$fp + 0]
-+ swi $r8, [$gp + 0]
-+ swi $r8, [$lp + 0]
-+ swi $r8, [$sp + 0]
-+ swi $r9, [$r0 + 0]
-+ swi $r9, [$r1 + 0]
-+ swi $r9, [$r2 + 0]
-+ swi $r9, [$r3 + 0]
-+ swi $r9, [$r4 + 0]
-+ swi $r9, [$r5 + 0]
-+ swi $r9, [$r6 + 0]
-+ swi $r9, [$r7 + 0]
-+ swi $r9, [$r8 + 0]
-+ swi $r9, [$r9 + 0]
-+ swi $r9, [$r10 + 0]
-+ swi $r9, [$r11 + 0]
-+ swi $r9, [$r16 + 0]
-+ swi $r9, [$r17 + 0]
-+ swi $r9, [$r18 + 0]
-+ swi $r9, [$r19 + 0]
-+ swi $r9, [$r12 + 0]
-+ swi $r9, [$r13 + 0]
-+ swi $r9, [$r14 + 0]
-+ swi $r9, [$r15 + 0]
-+ swi $r9, [$r20 + 0]
-+ swi $r9, [$r21 + 0]
-+ swi $r9, [$r22 + 0]
-+ swi $r9, [$r23 + 0]
-+ swi $r9, [$r24 + 0]
-+ swi $r9, [$r25 + 0]
-+ swi $r9, [$r26 + 0]
-+ swi $r9, [$r27 + 0]
-+ swi $r9, [$fp + 0]
-+ swi $r9, [$gp + 0]
-+ swi $r9, [$lp + 0]
-+ swi $r9, [$sp + 0]
-+ swi $r10, [$r0 + 0]
-+ swi $r10, [$r1 + 0]
-+ swi $r10, [$r2 + 0]
-+ swi $r10, [$r3 + 0]
-+ swi $r10, [$r4 + 0]
-+ swi $r10, [$r5 + 0]
-+ swi $r10, [$r6 + 0]
-+ swi $r10, [$r7 + 0]
-+ swi $r10, [$r8 + 0]
-+ swi $r10, [$r9 + 0]
-+ swi $r10, [$r10 + 0]
-+ swi $r10, [$r11 + 0]
-+ swi $r10, [$r16 + 0]
-+ swi $r10, [$r17 + 0]
-+ swi $r10, [$r18 + 0]
-+ swi $r10, [$r19 + 0]
-+ swi $r10, [$r12 + 0]
-+ swi $r10, [$r13 + 0]
-+ swi $r10, [$r14 + 0]
-+ swi $r10, [$r15 + 0]
-+ swi $r10, [$r20 + 0]
-+ swi $r10, [$r21 + 0]
-+ swi $r10, [$r22 + 0]
-+ swi $r10, [$r23 + 0]
-+ swi $r10, [$r24 + 0]
-+ swi $r10, [$r25 + 0]
-+ swi $r10, [$r26 + 0]
-+ swi $r10, [$r27 + 0]
-+ swi $r10, [$fp + 0]
-+ swi $r10, [$gp + 0]
-+ swi $r10, [$lp + 0]
-+ swi $r10, [$sp + 0]
-+ swi $r11, [$r0 + 0]
-+ swi $r11, [$r1 + 0]
-+ swi $r11, [$r2 + 0]
-+ swi $r11, [$r3 + 0]
-+ swi $r11, [$r4 + 0]
-+ swi $r11, [$r5 + 0]
-+ swi $r11, [$r6 + 0]
-+ swi $r11, [$r7 + 0]
-+ swi $r11, [$r8 + 0]
-+ swi $r11, [$r9 + 0]
-+ swi $r11, [$r10 + 0]
-+ swi $r11, [$r11 + 0]
-+ swi $r11, [$r16 + 0]
-+ swi $r11, [$r17 + 0]
-+ swi $r11, [$r18 + 0]
-+ swi $r11, [$r19 + 0]
-+ swi $r11, [$r12 + 0]
-+ swi $r11, [$r13 + 0]
-+ swi $r11, [$r14 + 0]
-+ swi $r11, [$r15 + 0]
-+ swi $r11, [$r20 + 0]
-+ swi $r11, [$r21 + 0]
-+ swi $r11, [$r22 + 0]
-+ swi $r11, [$r23 + 0]
-+ swi $r11, [$r24 + 0]
-+ swi $r11, [$r25 + 0]
-+ swi $r11, [$r26 + 0]
-+ swi $r11, [$r27 + 0]
-+ swi $r11, [$fp + 0]
-+ swi $r11, [$gp + 0]
-+ swi $r11, [$lp + 0]
-+ swi $r11, [$sp + 0]
-+ swi $r16, [$r0 + 0]
-+ swi $r16, [$r1 + 0]
-+ swi $r16, [$r2 + 0]
-+ swi $r16, [$r3 + 0]
-+ swi $r16, [$r4 + 0]
-+ swi $r16, [$r5 + 0]
-+ swi $r16, [$r6 + 0]
-+ swi $r16, [$r7 + 0]
-+ swi $r16, [$r8 + 0]
-+ swi $r16, [$r9 + 0]
-+ swi $r16, [$r10 + 0]
-+ swi $r16, [$r11 + 0]
-+ swi $r16, [$r16 + 0]
-+ swi $r16, [$r17 + 0]
-+ swi $r16, [$r18 + 0]
-+ swi $r16, [$r19 + 0]
-+ swi $r16, [$r12 + 0]
-+ swi $r16, [$r13 + 0]
-+ swi $r16, [$r14 + 0]
-+ swi $r16, [$r15 + 0]
-+ swi $r16, [$r20 + 0]
-+ swi $r16, [$r21 + 0]
-+ swi $r16, [$r22 + 0]
-+ swi $r16, [$r23 + 0]
-+ swi $r16, [$r24 + 0]
-+ swi $r16, [$r25 + 0]
-+ swi $r16, [$r26 + 0]
-+ swi $r16, [$r27 + 0]
-+ swi $r16, [$fp + 0]
-+ swi $r16, [$gp + 0]
-+ swi $r16, [$lp + 0]
-+ swi $r16, [$sp + 0]
-+ swi $r17, [$r0 + 0]
-+ swi $r17, [$r1 + 0]
-+ swi $r17, [$r2 + 0]
-+ swi $r17, [$r3 + 0]
-+ swi $r17, [$r4 + 0]
-+ swi $r17, [$r5 + 0]
-+ swi $r17, [$r6 + 0]
-+ swi $r17, [$r7 + 0]
-+ swi $r17, [$r8 + 0]
-+ swi $r17, [$r9 + 0]
-+ swi $r17, [$r10 + 0]
-+ swi $r17, [$r11 + 0]
-+ swi $r17, [$r16 + 0]
-+ swi $r17, [$r17 + 0]
-+ swi $r17, [$r18 + 0]
-+ swi $r17, [$r19 + 0]
-+ swi $r17, [$r12 + 0]
-+ swi $r17, [$r13 + 0]
-+ swi $r17, [$r14 + 0]
-+ swi $r17, [$r15 + 0]
-+ swi $r17, [$r20 + 0]
-+ swi $r17, [$r21 + 0]
-+ swi $r17, [$r22 + 0]
-+ swi $r17, [$r23 + 0]
-+ swi $r17, [$r24 + 0]
-+ swi $r17, [$r25 + 0]
-+ swi $r17, [$r26 + 0]
-+ swi $r17, [$r27 + 0]
-+ swi $r17, [$fp + 0]
-+ swi $r17, [$gp + 0]
-+ swi $r17, [$lp + 0]
-+ swi $r17, [$sp + 0]
-+ swi $r18, [$r0 + 0]
-+ swi $r18, [$r1 + 0]
-+ swi $r18, [$r2 + 0]
-+ swi $r18, [$r3 + 0]
-+ swi $r18, [$r4 + 0]
-+ swi $r18, [$r5 + 0]
-+ swi $r18, [$r6 + 0]
-+ swi $r18, [$r7 + 0]
-+ swi $r18, [$r8 + 0]
-+ swi $r18, [$r9 + 0]
-+ swi $r18, [$r10 + 0]
-+ swi $r18, [$r11 + 0]
-+ swi $r18, [$r16 + 0]
-+ swi $r18, [$r17 + 0]
-+ swi $r18, [$r18 + 0]
-+ swi $r18, [$r19 + 0]
-+ swi $r18, [$r12 + 0]
-+ swi $r18, [$r13 + 0]
-+ swi $r18, [$r14 + 0]
-+ swi $r18, [$r15 + 0]
-+ swi $r18, [$r20 + 0]
-+ swi $r18, [$r21 + 0]
-+ swi $r18, [$r22 + 0]
-+ swi $r18, [$r23 + 0]
-+ swi $r18, [$r24 + 0]
-+ swi $r18, [$r25 + 0]
-+ swi $r18, [$r26 + 0]
-+ swi $r18, [$r27 + 0]
-+ swi $r18, [$fp + 0]
-+ swi $r18, [$gp + 0]
-+ swi $r18, [$lp + 0]
-+ swi $r18, [$sp + 0]
-+ swi $r19, [$r0 + 0]
-+ swi $r19, [$r1 + 0]
-+ swi $r19, [$r2 + 0]
-+ swi $r19, [$r3 + 0]
-+ swi $r19, [$r4 + 0]
-+ swi $r19, [$r5 + 0]
-+ swi $r19, [$r6 + 0]
-+ swi $r19, [$r7 + 0]
-+ swi $r19, [$r8 + 0]
-+ swi $r19, [$r9 + 0]
-+ swi $r19, [$r10 + 0]
-+ swi $r19, [$r11 + 0]
-+ swi $r19, [$r16 + 0]
-+ swi $r19, [$r17 + 0]
-+ swi $r19, [$r18 + 0]
-+ swi $r19, [$r19 + 0]
-+ swi $r19, [$r12 + 0]
-+ swi $r19, [$r13 + 0]
-+ swi $r19, [$r14 + 0]
-+ swi $r19, [$r15 + 0]
-+ swi $r19, [$r20 + 0]
-+ swi $r19, [$r21 + 0]
-+ swi $r19, [$r22 + 0]
-+ swi $r19, [$r23 + 0]
-+ swi $r19, [$r24 + 0]
-+ swi $r19, [$r25 + 0]
-+ swi $r19, [$r26 + 0]
-+ swi $r19, [$r27 + 0]
-+ swi $r19, [$fp + 0]
-+ swi $r19, [$gp + 0]
-+ swi $r19, [$lp + 0]
-+ swi $r19, [$sp + 0]
-+ lwi $r0, [$fp + 0]
-+ lwi $r0, [$fp + 4]
-+ lwi $r0, [$fp + 8]
-+ lwi $r0, [$fp + 12]
-+ lwi $r0, [$fp + 16]
-+ lwi $r0, [$fp + 20]
-+ lwi $r0, [$fp + 24]
-+ lwi $r0, [$fp + 28]
-+ lwi $r0, [$fp + 32]
-+ lwi $r0, [$fp + 36]
-+ lwi $r0, [$fp + 40]
-+ lwi $r0, [$fp + 44]
-+ lwi $r0, [$fp + 48]
-+ lwi $r0, [$fp + 52]
-+ lwi $r0, [$fp + 56]
-+ lwi $r0, [$fp + 60]
-+ lwi $r0, [$fp + 64]
-+ lwi $r0, [$fp + 68]
-+ lwi $r0, [$fp + 72]
-+ lwi $r0, [$fp + 76]
-+ lwi $r0, [$fp + 80]
-+ lwi $r0, [$fp + 84]
-+ lwi $r0, [$fp + 88]
-+ lwi $r0, [$fp + 92]
-+ lwi $r0, [$fp + 96]
-+ lwi $r0, [$fp + 100]
-+ lwi $r0, [$fp + 104]
-+ lwi $r0, [$fp + 108]
-+ lwi $r0, [$fp + 112]
-+ lwi $r0, [$fp + 116]
-+ lwi $r0, [$fp + 120]
-+ lwi $r0, [$fp + 124]
-+ lwi $r0, [$fp + 128]
-+ lwi $r0, [$fp + 132]
-+ lwi $r0, [$fp + 136]
-+ lwi $r0, [$fp + 140]
-+ lwi $r0, [$fp + 144]
-+ lwi $r0, [$fp + 148]
-+ lwi $r0, [$fp + 152]
-+ lwi $r0, [$fp + 156]
-+ lwi $r0, [$fp + 160]
-+ lwi $r0, [$fp + 164]
-+ lwi $r0, [$fp + 168]
-+ lwi $r0, [$fp + 172]
-+ lwi $r0, [$fp + 176]
-+ lwi $r0, [$fp + 180]
-+ lwi $r0, [$fp + 184]
-+ lwi $r0, [$fp + 188]
-+ lwi $r0, [$fp + 192]
-+ lwi $r0, [$fp + 196]
-+ lwi $r0, [$fp + 200]
-+ lwi $r0, [$fp + 204]
-+ lwi $r0, [$fp + 208]
-+ lwi $r0, [$fp + 212]
-+ lwi $r0, [$fp + 216]
-+ lwi $r0, [$fp + 220]
-+ lwi $r0, [$fp + 224]
-+ lwi $r0, [$fp + 228]
-+ lwi $r0, [$fp + 232]
-+ lwi $r0, [$fp + 236]
-+ lwi $r0, [$fp + 240]
-+ lwi $r0, [$fp + 244]
-+ lwi $r0, [$fp + 248]
-+ lwi $r0, [$fp + 252]
-+ lwi $r0, [$fp + 256]
-+ lwi $r0, [$fp + 260]
-+ lwi $r0, [$fp + 264]
-+ lwi $r0, [$fp + 268]
-+ lwi $r0, [$fp + 272]
-+ lwi $r0, [$fp + 276]
-+ lwi $r0, [$fp + 280]
-+ lwi $r0, [$fp + 284]
-+ lwi $r0, [$fp + 288]
-+ lwi $r0, [$fp + 292]
-+ lwi $r0, [$fp + 296]
-+ lwi $r0, [$fp + 300]
-+ lwi $r0, [$fp + 304]
-+ lwi $r0, [$fp + 308]
-+ lwi $r0, [$fp + 312]
-+ lwi $r0, [$fp + 316]
-+ lwi $r0, [$fp + 320]
-+ lwi $r0, [$fp + 324]
-+ lwi $r0, [$fp + 328]
-+ lwi $r0, [$fp + 332]
-+ lwi $r0, [$fp + 336]
-+ lwi $r0, [$fp + 340]
-+ lwi $r0, [$fp + 344]
-+ lwi $r0, [$fp + 348]
-+ lwi $r0, [$fp + 352]
-+ lwi $r0, [$fp + 356]
-+ lwi $r0, [$fp + 360]
-+ lwi $r0, [$fp + 364]
-+ lwi $r0, [$fp + 368]
-+ lwi $r0, [$fp + 372]
-+ lwi $r0, [$fp + 376]
-+ lwi $r0, [$fp + 380]
-+ lwi $r0, [$fp + 384]
-+ lwi $r0, [$fp + 388]
-+ lwi $r0, [$fp + 392]
-+ lwi $r0, [$fp + 396]
-+ lwi $r0, [$fp + 400]
-+ lwi $r0, [$fp + 404]
-+ lwi $r0, [$fp + 408]
-+ lwi $r0, [$fp + 412]
-+ lwi $r0, [$fp + 416]
-+ lwi $r0, [$fp + 420]
-+ lwi $r0, [$fp + 424]
-+ lwi $r0, [$fp + 428]
-+ lwi $r0, [$fp + 432]
-+ lwi $r0, [$fp + 436]
-+ lwi $r0, [$fp + 440]
-+ lwi $r0, [$fp + 444]
-+ lwi $r0, [$fp + 448]
-+ lwi $r0, [$fp + 452]
-+ lwi $r0, [$fp + 456]
-+ lwi $r0, [$fp + 460]
-+ lwi $r0, [$fp + 464]
-+ lwi $r0, [$fp + 468]
-+ lwi $r0, [$fp + 472]
-+ lwi $r0, [$fp + 476]
-+ lwi $r0, [$fp + 480]
-+ lwi $r0, [$fp + 484]
-+ lwi $r0, [$fp + 488]
-+ lwi $r0, [$fp + 492]
-+ lwi $r0, [$fp + 496]
-+ lwi $r0, [$fp + 500]
-+ lwi $r0, [$fp + 504]
-+ lwi $r0, [$fp + 508]
-+ lwi $r1, [$fp + 0]
-+ lwi $r1, [$fp + 4]
-+ lwi $r1, [$fp + 8]
-+ lwi $r1, [$fp + 12]
-+ lwi $r1, [$fp + 16]
-+ lwi $r1, [$fp + 20]
-+ lwi $r1, [$fp + 24]
-+ lwi $r1, [$fp + 28]
-+ lwi $r1, [$fp + 32]
-+ lwi $r1, [$fp + 36]
-+ lwi $r1, [$fp + 40]
-+ lwi $r1, [$fp + 44]
-+ lwi $r1, [$fp + 48]
-+ lwi $r1, [$fp + 52]
-+ lwi $r1, [$fp + 56]
-+ lwi $r1, [$fp + 60]
-+ lwi $r1, [$fp + 64]
-+ lwi $r1, [$fp + 68]
-+ lwi $r1, [$fp + 72]
-+ lwi $r1, [$fp + 76]
-+ lwi $r1, [$fp + 80]
-+ lwi $r1, [$fp + 84]
-+ lwi $r1, [$fp + 88]
-+ lwi $r1, [$fp + 92]
-+ lwi $r1, [$fp + 96]
-+ lwi $r1, [$fp + 100]
-+ lwi $r1, [$fp + 104]
-+ lwi $r1, [$fp + 108]
-+ lwi $r1, [$fp + 112]
-+ lwi $r1, [$fp + 116]
-+ lwi $r1, [$fp + 120]
-+ lwi $r1, [$fp + 124]
-+ lwi $r1, [$fp + 128]
-+ lwi $r1, [$fp + 132]
-+ lwi $r1, [$fp + 136]
-+ lwi $r1, [$fp + 140]
-+ lwi $r1, [$fp + 144]
-+ lwi $r1, [$fp + 148]
-+ lwi $r1, [$fp + 152]
-+ lwi $r1, [$fp + 156]
-+ lwi $r1, [$fp + 160]
-+ lwi $r1, [$fp + 164]
-+ lwi $r1, [$fp + 168]
-+ lwi $r1, [$fp + 172]
-+ lwi $r1, [$fp + 176]
-+ lwi $r1, [$fp + 180]
-+ lwi $r1, [$fp + 184]
-+ lwi $r1, [$fp + 188]
-+ lwi $r1, [$fp + 192]
-+ lwi $r1, [$fp + 196]
-+ lwi $r1, [$fp + 200]
-+ lwi $r1, [$fp + 204]
-+ lwi $r1, [$fp + 208]
-+ lwi $r1, [$fp + 212]
-+ lwi $r1, [$fp + 216]
-+ lwi $r1, [$fp + 220]
-+ lwi $r1, [$fp + 224]
-+ lwi $r1, [$fp + 228]
-+ lwi $r1, [$fp + 232]
-+ lwi $r1, [$fp + 236]
-+ lwi $r1, [$fp + 240]
-+ lwi $r1, [$fp + 244]
-+ lwi $r1, [$fp + 248]
-+ lwi $r1, [$fp + 252]
-+ lwi $r1, [$fp + 256]
-+ lwi $r1, [$fp + 260]
-+ lwi $r1, [$fp + 264]
-+ lwi $r1, [$fp + 268]
-+ lwi $r1, [$fp + 272]
-+ lwi $r1, [$fp + 276]
-+ lwi $r1, [$fp + 280]
-+ lwi $r1, [$fp + 284]
-+ lwi $r1, [$fp + 288]
-+ lwi $r1, [$fp + 292]
-+ lwi $r1, [$fp + 296]
-+ lwi $r1, [$fp + 300]
-+ lwi $r1, [$fp + 304]
-+ lwi $r1, [$fp + 308]
-+ lwi $r1, [$fp + 312]
-+ lwi $r1, [$fp + 316]
-+ lwi $r1, [$fp + 320]
-+ lwi $r1, [$fp + 324]
-+ lwi $r1, [$fp + 328]
-+ lwi $r1, [$fp + 332]
-+ lwi $r1, [$fp + 336]
-+ lwi $r1, [$fp + 340]
-+ lwi $r1, [$fp + 344]
-+ lwi $r1, [$fp + 348]
-+ lwi $r1, [$fp + 352]
-+ lwi $r1, [$fp + 356]
-+ lwi $r1, [$fp + 360]
-+ lwi $r1, [$fp + 364]
-+ lwi $r1, [$fp + 368]
-+ lwi $r1, [$fp + 372]
-+ lwi $r1, [$fp + 376]
-+ lwi $r1, [$fp + 380]
-+ lwi $r1, [$fp + 384]
-+ lwi $r1, [$fp + 388]
-+ lwi $r1, [$fp + 392]
-+ lwi $r1, [$fp + 396]
-+ lwi $r1, [$fp + 400]
-+ lwi $r1, [$fp + 404]
-+ lwi $r1, [$fp + 408]
-+ lwi $r1, [$fp + 412]
-+ lwi $r1, [$fp + 416]
-+ lwi $r1, [$fp + 420]
-+ lwi $r1, [$fp + 424]
-+ lwi $r1, [$fp + 428]
-+ lwi $r1, [$fp + 432]
-+ lwi $r1, [$fp + 436]
-+ lwi $r1, [$fp + 440]
-+ lwi $r1, [$fp + 444]
-+ lwi $r1, [$fp + 448]
-+ lwi $r1, [$fp + 452]
-+ lwi $r1, [$fp + 456]
-+ lwi $r1, [$fp + 460]
-+ lwi $r1, [$fp + 464]
-+ lwi $r1, [$fp + 468]
-+ lwi $r1, [$fp + 472]
-+ lwi $r1, [$fp + 476]
-+ lwi $r1, [$fp + 480]
-+ lwi $r1, [$fp + 484]
-+ lwi $r1, [$fp + 488]
-+ lwi $r1, [$fp + 492]
-+ lwi $r1, [$fp + 496]
-+ lwi $r1, [$fp + 500]
-+ lwi $r1, [$fp + 504]
-+ lwi $r1, [$fp + 508]
-+ lwi $r2, [$fp + 0]
-+ lwi $r2, [$fp + 4]
-+ lwi $r2, [$fp + 8]
-+ lwi $r2, [$fp + 12]
-+ lwi $r2, [$fp + 16]
-+ lwi $r2, [$fp + 20]
-+ lwi $r2, [$fp + 24]
-+ lwi $r2, [$fp + 28]
-+ lwi $r2, [$fp + 32]
-+ lwi $r2, [$fp + 36]
-+ lwi $r2, [$fp + 40]
-+ lwi $r2, [$fp + 44]
-+ lwi $r2, [$fp + 48]
-+ lwi $r2, [$fp + 52]
-+ lwi $r2, [$fp + 56]
-+ lwi $r2, [$fp + 60]
-+ lwi $r2, [$fp + 64]
-+ lwi $r2, [$fp + 68]
-+ lwi $r2, [$fp + 72]
-+ lwi $r2, [$fp + 76]
-+ lwi $r2, [$fp + 80]
-+ lwi $r2, [$fp + 84]
-+ lwi $r2, [$fp + 88]
-+ lwi $r2, [$fp + 92]
-+ lwi $r2, [$fp + 96]
-+ lwi $r2, [$fp + 100]
-+ lwi $r2, [$fp + 104]
-+ lwi $r2, [$fp + 108]
-+ lwi $r2, [$fp + 112]
-+ lwi $r2, [$fp + 116]
-+ lwi $r2, [$fp + 120]
-+ lwi $r2, [$fp + 124]
-+ lwi $r2, [$fp + 128]
-+ lwi $r2, [$fp + 132]
-+ lwi $r2, [$fp + 136]
-+ lwi $r2, [$fp + 140]
-+ lwi $r2, [$fp + 144]
-+ lwi $r2, [$fp + 148]
-+ lwi $r2, [$fp + 152]
-+ lwi $r2, [$fp + 156]
-+ lwi $r2, [$fp + 160]
-+ lwi $r2, [$fp + 164]
-+ lwi $r2, [$fp + 168]
-+ lwi $r2, [$fp + 172]
-+ lwi $r2, [$fp + 176]
-+ lwi $r2, [$fp + 180]
-+ lwi $r2, [$fp + 184]
-+ lwi $r2, [$fp + 188]
-+ lwi $r2, [$fp + 192]
-+ lwi $r2, [$fp + 196]
-+ lwi $r2, [$fp + 200]
-+ lwi $r2, [$fp + 204]
-+ lwi $r2, [$fp + 208]
-+ lwi $r2, [$fp + 212]
-+ lwi $r2, [$fp + 216]
-+ lwi $r2, [$fp + 220]
-+ lwi $r2, [$fp + 224]
-+ lwi $r2, [$fp + 228]
-+ lwi $r2, [$fp + 232]
-+ lwi $r2, [$fp + 236]
-+ lwi $r2, [$fp + 240]
-+ lwi $r2, [$fp + 244]
-+ lwi $r2, [$fp + 248]
-+ lwi $r2, [$fp + 252]
-+ lwi $r2, [$fp + 256]
-+ lwi $r2, [$fp + 260]
-+ lwi $r2, [$fp + 264]
-+ lwi $r2, [$fp + 268]
-+ lwi $r2, [$fp + 272]
-+ lwi $r2, [$fp + 276]
-+ lwi $r2, [$fp + 280]
-+ lwi $r2, [$fp + 284]
-+ lwi $r2, [$fp + 288]
-+ lwi $r2, [$fp + 292]
-+ lwi $r2, [$fp + 296]
-+ lwi $r2, [$fp + 300]
-+ lwi $r2, [$fp + 304]
-+ lwi $r2, [$fp + 308]
-+ lwi $r2, [$fp + 312]
-+ lwi $r2, [$fp + 316]
-+ lwi $r2, [$fp + 320]
-+ lwi $r2, [$fp + 324]
-+ lwi $r2, [$fp + 328]
-+ lwi $r2, [$fp + 332]
-+ lwi $r2, [$fp + 336]
-+ lwi $r2, [$fp + 340]
-+ lwi $r2, [$fp + 344]
-+ lwi $r2, [$fp + 348]
-+ lwi $r2, [$fp + 352]
-+ lwi $r2, [$fp + 356]
-+ lwi $r2, [$fp + 360]
-+ lwi $r2, [$fp + 364]
-+ lwi $r2, [$fp + 368]
-+ lwi $r2, [$fp + 372]
-+ lwi $r2, [$fp + 376]
-+ lwi $r2, [$fp + 380]
-+ lwi $r2, [$fp + 384]
-+ lwi $r2, [$fp + 388]
-+ lwi $r2, [$fp + 392]
-+ lwi $r2, [$fp + 396]
-+ lwi $r2, [$fp + 400]
-+ lwi $r2, [$fp + 404]
-+ lwi $r2, [$fp + 408]
-+ lwi $r2, [$fp + 412]
-+ lwi $r2, [$fp + 416]
-+ lwi $r2, [$fp + 420]
-+ lwi $r2, [$fp + 424]
-+ lwi $r2, [$fp + 428]
-+ lwi $r2, [$fp + 432]
-+ lwi $r2, [$fp + 436]
-+ lwi $r2, [$fp + 440]
-+ lwi $r2, [$fp + 444]
-+ lwi $r2, [$fp + 448]
-+ lwi $r2, [$fp + 452]
-+ lwi $r2, [$fp + 456]
-+ lwi $r2, [$fp + 460]
-+ lwi $r2, [$fp + 464]
-+ lwi $r2, [$fp + 468]
-+ lwi $r2, [$fp + 472]
-+ lwi $r2, [$fp + 476]
-+ lwi $r2, [$fp + 480]
-+ lwi $r2, [$fp + 484]
-+ lwi $r2, [$fp + 488]
-+ lwi $r2, [$fp + 492]
-+ lwi $r2, [$fp + 496]
-+ lwi $r2, [$fp + 500]
-+ lwi $r2, [$fp + 504]
-+ lwi $r2, [$fp + 508]
-+ lwi $r3, [$fp + 0]
-+ lwi $r3, [$fp + 4]
-+ lwi $r3, [$fp + 8]
-+ lwi $r3, [$fp + 12]
-+ lwi $r3, [$fp + 16]
-+ lwi $r3, [$fp + 20]
-+ lwi $r3, [$fp + 24]
-+ lwi $r3, [$fp + 28]
-+ lwi $r3, [$fp + 32]
-+ lwi $r3, [$fp + 36]
-+ lwi $r3, [$fp + 40]
-+ lwi $r3, [$fp + 44]
-+ lwi $r3, [$fp + 48]
-+ lwi $r3, [$fp + 52]
-+ lwi $r3, [$fp + 56]
-+ lwi $r3, [$fp + 60]
-+ lwi $r3, [$fp + 64]
-+ lwi $r3, [$fp + 68]
-+ lwi $r3, [$fp + 72]
-+ lwi $r3, [$fp + 76]
-+ lwi $r3, [$fp + 80]
-+ lwi $r3, [$fp + 84]
-+ lwi $r3, [$fp + 88]
-+ lwi $r3, [$fp + 92]
-+ lwi $r3, [$fp + 96]
-+ lwi $r3, [$fp + 100]
-+ lwi $r3, [$fp + 104]
-+ lwi $r3, [$fp + 108]
-+ lwi $r3, [$fp + 112]
-+ lwi $r3, [$fp + 116]
-+ lwi $r3, [$fp + 120]
-+ lwi $r3, [$fp + 124]
-+ lwi $r3, [$fp + 128]
-+ lwi $r3, [$fp + 132]
-+ lwi $r3, [$fp + 136]
-+ lwi $r3, [$fp + 140]
-+ lwi $r3, [$fp + 144]
-+ lwi $r3, [$fp + 148]
-+ lwi $r3, [$fp + 152]
-+ lwi $r3, [$fp + 156]
-+ lwi $r3, [$fp + 160]
-+ lwi $r3, [$fp + 164]
-+ lwi $r3, [$fp + 168]
-+ lwi $r3, [$fp + 172]
-+ lwi $r3, [$fp + 176]
-+ lwi $r3, [$fp + 180]
-+ lwi $r3, [$fp + 184]
-+ lwi $r3, [$fp + 188]
-+ lwi $r3, [$fp + 192]
-+ lwi $r3, [$fp + 196]
-+ lwi $r3, [$fp + 200]
-+ lwi $r3, [$fp + 204]
-+ lwi $r3, [$fp + 208]
-+ lwi $r3, [$fp + 212]
-+ lwi $r3, [$fp + 216]
-+ lwi $r3, [$fp + 220]
-+ lwi $r3, [$fp + 224]
-+ lwi $r3, [$fp + 228]
-+ lwi $r3, [$fp + 232]
-+ lwi $r3, [$fp + 236]
-+ lwi $r3, [$fp + 240]
-+ lwi $r3, [$fp + 244]
-+ lwi $r3, [$fp + 248]
-+ lwi $r3, [$fp + 252]
-+ lwi $r3, [$fp + 256]
-+ lwi $r3, [$fp + 260]
-+ lwi $r3, [$fp + 264]
-+ lwi $r3, [$fp + 268]
-+ lwi $r3, [$fp + 272]
-+ lwi $r3, [$fp + 276]
-+ lwi $r3, [$fp + 280]
-+ lwi $r3, [$fp + 284]
-+ lwi $r3, [$fp + 288]
-+ lwi $r3, [$fp + 292]
-+ lwi $r3, [$fp + 296]
-+ lwi $r3, [$fp + 300]
-+ lwi $r3, [$fp + 304]
-+ lwi $r3, [$fp + 308]
-+ lwi $r3, [$fp + 312]
-+ lwi $r3, [$fp + 316]
-+ lwi $r3, [$fp + 320]
-+ lwi $r3, [$fp + 324]
-+ lwi $r3, [$fp + 328]
-+ lwi $r3, [$fp + 332]
-+ lwi $r3, [$fp + 336]
-+ lwi $r3, [$fp + 340]
-+ lwi $r3, [$fp + 344]
-+ lwi $r3, [$fp + 348]
-+ lwi $r3, [$fp + 352]
-+ lwi $r3, [$fp + 356]
-+ lwi $r3, [$fp + 360]
-+ lwi $r3, [$fp + 364]
-+ lwi $r3, [$fp + 368]
-+ lwi $r3, [$fp + 372]
-+ lwi $r3, [$fp + 376]
-+ lwi $r3, [$fp + 380]
-+ lwi $r3, [$fp + 384]
-+ lwi $r3, [$fp + 388]
-+ lwi $r3, [$fp + 392]
-+ lwi $r3, [$fp + 396]
-+ lwi $r3, [$fp + 400]
-+ lwi $r3, [$fp + 404]
-+ lwi $r3, [$fp + 408]
-+ lwi $r3, [$fp + 412]
-+ lwi $r3, [$fp + 416]
-+ lwi $r3, [$fp + 420]
-+ lwi $r3, [$fp + 424]
-+ lwi $r3, [$fp + 428]
-+ lwi $r3, [$fp + 432]
-+ lwi $r3, [$fp + 436]
-+ lwi $r3, [$fp + 440]
-+ lwi $r3, [$fp + 444]
-+ lwi $r3, [$fp + 448]
-+ lwi $r3, [$fp + 452]
-+ lwi $r3, [$fp + 456]
-+ lwi $r3, [$fp + 460]
-+ lwi $r3, [$fp + 464]
-+ lwi $r3, [$fp + 468]
-+ lwi $r3, [$fp + 472]
-+ lwi $r3, [$fp + 476]
-+ lwi $r3, [$fp + 480]
-+ lwi $r3, [$fp + 484]
-+ lwi $r3, [$fp + 488]
-+ lwi $r3, [$fp + 492]
-+ lwi $r3, [$fp + 496]
-+ lwi $r3, [$fp + 500]
-+ lwi $r3, [$fp + 504]
-+ lwi $r3, [$fp + 508]
-+ lwi $r4, [$fp + 0]
-+ lwi $r4, [$fp + 4]
-+ lwi $r4, [$fp + 8]
-+ lwi $r4, [$fp + 12]
-+ lwi $r4, [$fp + 16]
-+ lwi $r4, [$fp + 20]
-+ lwi $r4, [$fp + 24]
-+ lwi $r4, [$fp + 28]
-+ lwi $r4, [$fp + 32]
-+ lwi $r4, [$fp + 36]
-+ lwi $r4, [$fp + 40]
-+ lwi $r4, [$fp + 44]
-+ lwi $r4, [$fp + 48]
-+ lwi $r4, [$fp + 52]
-+ lwi $r4, [$fp + 56]
-+ lwi $r4, [$fp + 60]
-+ lwi $r4, [$fp + 64]
-+ lwi $r4, [$fp + 68]
-+ lwi $r4, [$fp + 72]
-+ lwi $r4, [$fp + 76]
-+ lwi $r4, [$fp + 80]
-+ lwi $r4, [$fp + 84]
-+ lwi $r4, [$fp + 88]
-+ lwi $r4, [$fp + 92]
-+ lwi $r4, [$fp + 96]
-+ lwi $r4, [$fp + 100]
-+ lwi $r4, [$fp + 104]
-+ lwi $r4, [$fp + 108]
-+ lwi $r4, [$fp + 112]
-+ lwi $r4, [$fp + 116]
-+ lwi $r4, [$fp + 120]
-+ lwi $r4, [$fp + 124]
-+ lwi $r4, [$fp + 128]
-+ lwi $r4, [$fp + 132]
-+ lwi $r4, [$fp + 136]
-+ lwi $r4, [$fp + 140]
-+ lwi $r4, [$fp + 144]
-+ lwi $r4, [$fp + 148]
-+ lwi $r4, [$fp + 152]
-+ lwi $r4, [$fp + 156]
-+ lwi $r4, [$fp + 160]
-+ lwi $r4, [$fp + 164]
-+ lwi $r4, [$fp + 168]
-+ lwi $r4, [$fp + 172]
-+ lwi $r4, [$fp + 176]
-+ lwi $r4, [$fp + 180]
-+ lwi $r4, [$fp + 184]
-+ lwi $r4, [$fp + 188]
-+ lwi $r4, [$fp + 192]
-+ lwi $r4, [$fp + 196]
-+ lwi $r4, [$fp + 200]
-+ lwi $r4, [$fp + 204]
-+ lwi $r4, [$fp + 208]
-+ lwi $r4, [$fp + 212]
-+ lwi $r4, [$fp + 216]
-+ lwi $r4, [$fp + 220]
-+ lwi $r4, [$fp + 224]
-+ lwi $r4, [$fp + 228]
-+ lwi $r4, [$fp + 232]
-+ lwi $r4, [$fp + 236]
-+ lwi $r4, [$fp + 240]
-+ lwi $r4, [$fp + 244]
-+ lwi $r4, [$fp + 248]
-+ lwi $r4, [$fp + 252]
-+ lwi $r4, [$fp + 256]
-+ lwi $r4, [$fp + 260]
-+ lwi $r4, [$fp + 264]
-+ lwi $r4, [$fp + 268]
-+ lwi $r4, [$fp + 272]
-+ lwi $r4, [$fp + 276]
-+ lwi $r4, [$fp + 280]
-+ lwi $r4, [$fp + 284]
-+ lwi $r4, [$fp + 288]
-+ lwi $r4, [$fp + 292]
-+ lwi $r4, [$fp + 296]
-+ lwi $r4, [$fp + 300]
-+ lwi $r4, [$fp + 304]
-+ lwi $r4, [$fp + 308]
-+ lwi $r4, [$fp + 312]
-+ lwi $r4, [$fp + 316]
-+ lwi $r4, [$fp + 320]
-+ lwi $r4, [$fp + 324]
-+ lwi $r4, [$fp + 328]
-+ lwi $r4, [$fp + 332]
-+ lwi $r4, [$fp + 336]
-+ lwi $r4, [$fp + 340]
-+ lwi $r4, [$fp + 344]
-+ lwi $r4, [$fp + 348]
-+ lwi $r4, [$fp + 352]
-+ lwi $r4, [$fp + 356]
-+ lwi $r4, [$fp + 360]
-+ lwi $r4, [$fp + 364]
-+ lwi $r4, [$fp + 368]
-+ lwi $r4, [$fp + 372]
-+ lwi $r4, [$fp + 376]
-+ lwi $r4, [$fp + 380]
-+ lwi $r4, [$fp + 384]
-+ lwi $r4, [$fp + 388]
-+ lwi $r4, [$fp + 392]
-+ lwi $r4, [$fp + 396]
-+ lwi $r4, [$fp + 400]
-+ lwi $r4, [$fp + 404]
-+ lwi $r4, [$fp + 408]
-+ lwi $r4, [$fp + 412]
-+ lwi $r4, [$fp + 416]
-+ lwi $r4, [$fp + 420]
-+ lwi $r4, [$fp + 424]
-+ lwi $r4, [$fp + 428]
-+ lwi $r4, [$fp + 432]
-+ lwi $r4, [$fp + 436]
-+ lwi $r4, [$fp + 440]
-+ lwi $r4, [$fp + 444]
-+ lwi $r4, [$fp + 448]
-+ lwi $r4, [$fp + 452]
-+ lwi $r4, [$fp + 456]
-+ lwi $r4, [$fp + 460]
-+ lwi $r4, [$fp + 464]
-+ lwi $r4, [$fp + 468]
-+ lwi $r4, [$fp + 472]
-+ lwi $r4, [$fp + 476]
-+ lwi $r4, [$fp + 480]
-+ lwi $r4, [$fp + 484]
-+ lwi $r4, [$fp + 488]
-+ lwi $r4, [$fp + 492]
-+ lwi $r4, [$fp + 496]
-+ lwi $r4, [$fp + 500]
-+ lwi $r4, [$fp + 504]
-+ lwi $r4, [$fp + 508]
-+ lwi $r5, [$fp + 0]
-+ lwi $r5, [$fp + 4]
-+ lwi $r5, [$fp + 8]
-+ lwi $r5, [$fp + 12]
-+ lwi $r5, [$fp + 16]
-+ lwi $r5, [$fp + 20]
-+ lwi $r5, [$fp + 24]
-+ lwi $r5, [$fp + 28]
-+ lwi $r5, [$fp + 32]
-+ lwi $r5, [$fp + 36]
-+ lwi $r5, [$fp + 40]
-+ lwi $r5, [$fp + 44]
-+ lwi $r5, [$fp + 48]
-+ lwi $r5, [$fp + 52]
-+ lwi $r5, [$fp + 56]
-+ lwi $r5, [$fp + 60]
-+ lwi $r5, [$fp + 64]
-+ lwi $r5, [$fp + 68]
-+ lwi $r5, [$fp + 72]
-+ lwi $r5, [$fp + 76]
-+ lwi $r5, [$fp + 80]
-+ lwi $r5, [$fp + 84]
-+ lwi $r5, [$fp + 88]
-+ lwi $r5, [$fp + 92]
-+ lwi $r5, [$fp + 96]
-+ lwi $r5, [$fp + 100]
-+ lwi $r5, [$fp + 104]
-+ lwi $r5, [$fp + 108]
-+ lwi $r5, [$fp + 112]
-+ lwi $r5, [$fp + 116]
-+ lwi $r5, [$fp + 120]
-+ lwi $r5, [$fp + 124]
-+ lwi $r5, [$fp + 128]
-+ lwi $r5, [$fp + 132]
-+ lwi $r5, [$fp + 136]
-+ lwi $r5, [$fp + 140]
-+ lwi $r5, [$fp + 144]
-+ lwi $r5, [$fp + 148]
-+ lwi $r5, [$fp + 152]
-+ lwi $r5, [$fp + 156]
-+ lwi $r5, [$fp + 160]
-+ lwi $r5, [$fp + 164]
-+ lwi $r5, [$fp + 168]
-+ lwi $r5, [$fp + 172]
-+ lwi $r5, [$fp + 176]
-+ lwi $r5, [$fp + 180]
-+ lwi $r5, [$fp + 184]
-+ lwi $r5, [$fp + 188]
-+ lwi $r5, [$fp + 192]
-+ lwi $r5, [$fp + 196]
-+ lwi $r5, [$fp + 200]
-+ lwi $r5, [$fp + 204]
-+ lwi $r5, [$fp + 208]
-+ lwi $r5, [$fp + 212]
-+ lwi $r5, [$fp + 216]
-+ lwi $r5, [$fp + 220]
-+ lwi $r5, [$fp + 224]
-+ lwi $r5, [$fp + 228]
-+ lwi $r5, [$fp + 232]
-+ lwi $r5, [$fp + 236]
-+ lwi $r5, [$fp + 240]
-+ lwi $r5, [$fp + 244]
-+ lwi $r5, [$fp + 248]
-+ lwi $r5, [$fp + 252]
-+ lwi $r5, [$fp + 256]
-+ lwi $r5, [$fp + 260]
-+ lwi $r5, [$fp + 264]
-+ lwi $r5, [$fp + 268]
-+ lwi $r5, [$fp + 272]
-+ lwi $r5, [$fp + 276]
-+ lwi $r5, [$fp + 280]
-+ lwi $r5, [$fp + 284]
-+ lwi $r5, [$fp + 288]
-+ lwi $r5, [$fp + 292]
-+ lwi $r5, [$fp + 296]
-+ lwi $r5, [$fp + 300]
-+ lwi $r5, [$fp + 304]
-+ lwi $r5, [$fp + 308]
-+ lwi $r5, [$fp + 312]
-+ lwi $r5, [$fp + 316]
-+ lwi $r5, [$fp + 320]
-+ lwi $r5, [$fp + 324]
-+ lwi $r5, [$fp + 328]
-+ lwi $r5, [$fp + 332]
-+ lwi $r5, [$fp + 336]
-+ lwi $r5, [$fp + 340]
-+ lwi $r5, [$fp + 344]
-+ lwi $r5, [$fp + 348]
-+ lwi $r5, [$fp + 352]
-+ lwi $r5, [$fp + 356]
-+ lwi $r5, [$fp + 360]
-+ lwi $r5, [$fp + 364]
-+ lwi $r5, [$fp + 368]
-+ lwi $r5, [$fp + 372]
-+ lwi $r5, [$fp + 376]
-+ lwi $r5, [$fp + 380]
-+ lwi $r5, [$fp + 384]
-+ lwi $r5, [$fp + 388]
-+ lwi $r5, [$fp + 392]
-+ lwi $r5, [$fp + 396]
-+ lwi $r5, [$fp + 400]
-+ lwi $r5, [$fp + 404]
-+ lwi $r5, [$fp + 408]
-+ lwi $r5, [$fp + 412]
-+ lwi $r5, [$fp + 416]
-+ lwi $r5, [$fp + 420]
-+ lwi $r5, [$fp + 424]
-+ lwi $r5, [$fp + 428]
-+ lwi $r5, [$fp + 432]
-+ lwi $r5, [$fp + 436]
-+ lwi $r5, [$fp + 440]
-+ lwi $r5, [$fp + 444]
-+ lwi $r5, [$fp + 448]
-+ lwi $r5, [$fp + 452]
-+ lwi $r5, [$fp + 456]
-+ lwi $r5, [$fp + 460]
-+ lwi $r5, [$fp + 464]
-+ lwi $r5, [$fp + 468]
-+ lwi $r5, [$fp + 472]
-+ lwi $r5, [$fp + 476]
-+ lwi $r5, [$fp + 480]
-+ lwi $r5, [$fp + 484]
-+ lwi $r5, [$fp + 488]
-+ lwi $r5, [$fp + 492]
-+ lwi $r5, [$fp + 496]
-+ lwi $r5, [$fp + 500]
-+ lwi $r5, [$fp + 504]
-+ lwi $r5, [$fp + 508]
-+ lwi $r6, [$fp + 0]
-+ lwi $r6, [$fp + 4]
-+ lwi $r6, [$fp + 8]
-+ lwi $r6, [$fp + 12]
-+ lwi $r6, [$fp + 16]
-+ lwi $r6, [$fp + 20]
-+ lwi $r6, [$fp + 24]
-+ lwi $r6, [$fp + 28]
-+ lwi $r6, [$fp + 32]
-+ lwi $r6, [$fp + 36]
-+ lwi $r6, [$fp + 40]
-+ lwi $r6, [$fp + 44]
-+ lwi $r6, [$fp + 48]
-+ lwi $r6, [$fp + 52]
-+ lwi $r6, [$fp + 56]
-+ lwi $r6, [$fp + 60]
-+ lwi $r6, [$fp + 64]
-+ lwi $r6, [$fp + 68]
-+ lwi $r6, [$fp + 72]
-+ lwi $r6, [$fp + 76]
-+ lwi $r6, [$fp + 80]
-+ lwi $r6, [$fp + 84]
-+ lwi $r6, [$fp + 88]
-+ lwi $r6, [$fp + 92]
-+ lwi $r6, [$fp + 96]
-+ lwi $r6, [$fp + 100]
-+ lwi $r6, [$fp + 104]
-+ lwi $r6, [$fp + 108]
-+ lwi $r6, [$fp + 112]
-+ lwi $r6, [$fp + 116]
-+ lwi $r6, [$fp + 120]
-+ lwi $r6, [$fp + 124]
-+ lwi $r6, [$fp + 128]
-+ lwi $r6, [$fp + 132]
-+ lwi $r6, [$fp + 136]
-+ lwi $r6, [$fp + 140]
-+ lwi $r6, [$fp + 144]
-+ lwi $r6, [$fp + 148]
-+ lwi $r6, [$fp + 152]
-+ lwi $r6, [$fp + 156]
-+ lwi $r6, [$fp + 160]
-+ lwi $r6, [$fp + 164]
-+ lwi $r6, [$fp + 168]
-+ lwi $r6, [$fp + 172]
-+ lwi $r6, [$fp + 176]
-+ lwi $r6, [$fp + 180]
-+ lwi $r6, [$fp + 184]
-+ lwi $r6, [$fp + 188]
-+ lwi $r6, [$fp + 192]
-+ lwi $r6, [$fp + 196]
-+ lwi $r6, [$fp + 200]
-+ lwi $r6, [$fp + 204]
-+ lwi $r6, [$fp + 208]
-+ lwi $r6, [$fp + 212]
-+ lwi $r6, [$fp + 216]
-+ lwi $r6, [$fp + 220]
-+ lwi $r6, [$fp + 224]
-+ lwi $r6, [$fp + 228]
-+ lwi $r6, [$fp + 232]
-+ lwi $r6, [$fp + 236]
-+ lwi $r6, [$fp + 240]
-+ lwi $r6, [$fp + 244]
-+ lwi $r6, [$fp + 248]
-+ lwi $r6, [$fp + 252]
-+ lwi $r6, [$fp + 256]
-+ lwi $r6, [$fp + 260]
-+ lwi $r6, [$fp + 264]
-+ lwi $r6, [$fp + 268]
-+ lwi $r6, [$fp + 272]
-+ lwi $r6, [$fp + 276]
-+ lwi $r6, [$fp + 280]
-+ lwi $r6, [$fp + 284]
-+ lwi $r6, [$fp + 288]
-+ lwi $r6, [$fp + 292]
-+ lwi $r6, [$fp + 296]
-+ lwi $r6, [$fp + 300]
-+ lwi $r6, [$fp + 304]
-+ lwi $r6, [$fp + 308]
-+ lwi $r6, [$fp + 312]
-+ lwi $r6, [$fp + 316]
-+ lwi $r6, [$fp + 320]
-+ lwi $r6, [$fp + 324]
-+ lwi $r6, [$fp + 328]
-+ lwi $r6, [$fp + 332]
-+ lwi $r6, [$fp + 336]
-+ lwi $r6, [$fp + 340]
-+ lwi $r6, [$fp + 344]
-+ lwi $r6, [$fp + 348]
-+ lwi $r6, [$fp + 352]
-+ lwi $r6, [$fp + 356]
-+ lwi $r6, [$fp + 360]
-+ lwi $r6, [$fp + 364]
-+ lwi $r6, [$fp + 368]
-+ lwi $r6, [$fp + 372]
-+ lwi $r6, [$fp + 376]
-+ lwi $r6, [$fp + 380]
-+ lwi $r6, [$fp + 384]
-+ lwi $r6, [$fp + 388]
-+ lwi $r6, [$fp + 392]
-+ lwi $r6, [$fp + 396]
-+ lwi $r6, [$fp + 400]
-+ lwi $r6, [$fp + 404]
-+ lwi $r6, [$fp + 408]
-+ lwi $r6, [$fp + 412]
-+ lwi $r6, [$fp + 416]
-+ lwi $r6, [$fp + 420]
-+ lwi $r6, [$fp + 424]
-+ lwi $r6, [$fp + 428]
-+ lwi $r6, [$fp + 432]
-+ lwi $r6, [$fp + 436]
-+ lwi $r6, [$fp + 440]
-+ lwi $r6, [$fp + 444]
-+ lwi $r6, [$fp + 448]
-+ lwi $r6, [$fp + 452]
-+ lwi $r6, [$fp + 456]
-+ lwi $r6, [$fp + 460]
-+ lwi $r6, [$fp + 464]
-+ lwi $r6, [$fp + 468]
-+ lwi $r6, [$fp + 472]
-+ lwi $r6, [$fp + 476]
-+ lwi $r6, [$fp + 480]
-+ lwi $r6, [$fp + 484]
-+ lwi $r6, [$fp + 488]
-+ lwi $r6, [$fp + 492]
-+ lwi $r6, [$fp + 496]
-+ lwi $r6, [$fp + 500]
-+ lwi $r6, [$fp + 504]
-+ lwi $r6, [$fp + 508]
-+ lwi $r7, [$fp + 0]
-+ lwi $r7, [$fp + 4]
-+ lwi $r7, [$fp + 8]
-+ lwi $r7, [$fp + 12]
-+ lwi $r7, [$fp + 16]
-+ lwi $r7, [$fp + 20]
-+ lwi $r7, [$fp + 24]
-+ lwi $r7, [$fp + 28]
-+ lwi $r7, [$fp + 32]
-+ lwi $r7, [$fp + 36]
-+ lwi $r7, [$fp + 40]
-+ lwi $r7, [$fp + 44]
-+ lwi $r7, [$fp + 48]
-+ lwi $r7, [$fp + 52]
-+ lwi $r7, [$fp + 56]
-+ lwi $r7, [$fp + 60]
-+ lwi $r7, [$fp + 64]
-+ lwi $r7, [$fp + 68]
-+ lwi $r7, [$fp + 72]
-+ lwi $r7, [$fp + 76]
-+ lwi $r7, [$fp + 80]
-+ lwi $r7, [$fp + 84]
-+ lwi $r7, [$fp + 88]
-+ lwi $r7, [$fp + 92]
-+ lwi $r7, [$fp + 96]
-+ lwi $r7, [$fp + 100]
-+ lwi $r7, [$fp + 104]
-+ lwi $r7, [$fp + 108]
-+ lwi $r7, [$fp + 112]
-+ lwi $r7, [$fp + 116]
-+ lwi $r7, [$fp + 120]
-+ lwi $r7, [$fp + 124]
-+ lwi $r7, [$fp + 128]
-+ lwi $r7, [$fp + 132]
-+ lwi $r7, [$fp + 136]
-+ lwi $r7, [$fp + 140]
-+ lwi $r7, [$fp + 144]
-+ lwi $r7, [$fp + 148]
-+ lwi $r7, [$fp + 152]
-+ lwi $r7, [$fp + 156]
-+ lwi $r7, [$fp + 160]
-+ lwi $r7, [$fp + 164]
-+ lwi $r7, [$fp + 168]
-+ lwi $r7, [$fp + 172]
-+ lwi $r7, [$fp + 176]
-+ lwi $r7, [$fp + 180]
-+ lwi $r7, [$fp + 184]
-+ lwi $r7, [$fp + 188]
-+ lwi $r7, [$fp + 192]
-+ lwi $r7, [$fp + 196]
-+ lwi $r7, [$fp + 200]
-+ lwi $r7, [$fp + 204]
-+ lwi $r7, [$fp + 208]
-+ lwi $r7, [$fp + 212]
-+ lwi $r7, [$fp + 216]
-+ lwi $r7, [$fp + 220]
-+ lwi $r7, [$fp + 224]
-+ lwi $r7, [$fp + 228]
-+ lwi $r7, [$fp + 232]
-+ lwi $r7, [$fp + 236]
-+ lwi $r7, [$fp + 240]
-+ lwi $r7, [$fp + 244]
-+ lwi $r7, [$fp + 248]
-+ lwi $r7, [$fp + 252]
-+ lwi $r7, [$fp + 256]
-+ lwi $r7, [$fp + 260]
-+ lwi $r7, [$fp + 264]
-+ lwi $r7, [$fp + 268]
-+ lwi $r7, [$fp + 272]
-+ lwi $r7, [$fp + 276]
-+ lwi $r7, [$fp + 280]
-+ lwi $r7, [$fp + 284]
-+ lwi $r7, [$fp + 288]
-+ lwi $r7, [$fp + 292]
-+ lwi $r7, [$fp + 296]
-+ lwi $r7, [$fp + 300]
-+ lwi $r7, [$fp + 304]
-+ lwi $r7, [$fp + 308]
-+ lwi $r7, [$fp + 312]
-+ lwi $r7, [$fp + 316]
-+ lwi $r7, [$fp + 320]
-+ lwi $r7, [$fp + 324]
-+ lwi $r7, [$fp + 328]
-+ lwi $r7, [$fp + 332]
-+ lwi $r7, [$fp + 336]
-+ lwi $r7, [$fp + 340]
-+ lwi $r7, [$fp + 344]
-+ lwi $r7, [$fp + 348]
-+ lwi $r7, [$fp + 352]
-+ lwi $r7, [$fp + 356]
-+ lwi $r7, [$fp + 360]
-+ lwi $r7, [$fp + 364]
-+ lwi $r7, [$fp + 368]
-+ lwi $r7, [$fp + 372]
-+ lwi $r7, [$fp + 376]
-+ lwi $r7, [$fp + 380]
-+ lwi $r7, [$fp + 384]
-+ lwi $r7, [$fp + 388]
-+ lwi $r7, [$fp + 392]
-+ lwi $r7, [$fp + 396]
-+ lwi $r7, [$fp + 400]
-+ lwi $r7, [$fp + 404]
-+ lwi $r7, [$fp + 408]
-+ lwi $r7, [$fp + 412]
-+ lwi $r7, [$fp + 416]
-+ lwi $r7, [$fp + 420]
-+ lwi $r7, [$fp + 424]
-+ lwi $r7, [$fp + 428]
-+ lwi $r7, [$fp + 432]
-+ lwi $r7, [$fp + 436]
-+ lwi $r7, [$fp + 440]
-+ lwi $r7, [$fp + 444]
-+ lwi $r7, [$fp + 448]
-+ lwi $r7, [$fp + 452]
-+ lwi $r7, [$fp + 456]
-+ lwi $r7, [$fp + 460]
-+ lwi $r7, [$fp + 464]
-+ lwi $r7, [$fp + 468]
-+ lwi $r7, [$fp + 472]
-+ lwi $r7, [$fp + 476]
-+ lwi $r7, [$fp + 480]
-+ lwi $r7, [$fp + 484]
-+ lwi $r7, [$fp + 488]
-+ lwi $r7, [$fp + 492]
-+ lwi $r7, [$fp + 496]
-+ lwi $r7, [$fp + 500]
-+ lwi $r7, [$fp + 504]
-+ lwi $r7, [$fp + 508]
-+ swi $r0, [$fp + 0]
-+ swi $r0, [$fp + 4]
-+ swi $r0, [$fp + 8]
-+ swi $r0, [$fp + 12]
-+ swi $r0, [$fp + 16]
-+ swi $r0, [$fp + 20]
-+ swi $r0, [$fp + 24]
-+ swi $r0, [$fp + 28]
-+ swi $r0, [$fp + 32]
-+ swi $r0, [$fp + 36]
-+ swi $r0, [$fp + 40]
-+ swi $r0, [$fp + 44]
-+ swi $r0, [$fp + 48]
-+ swi $r0, [$fp + 52]
-+ swi $r0, [$fp + 56]
-+ swi $r0, [$fp + 60]
-+ swi $r0, [$fp + 64]
-+ swi $r0, [$fp + 68]
-+ swi $r0, [$fp + 72]
-+ swi $r0, [$fp + 76]
-+ swi $r0, [$fp + 80]
-+ swi $r0, [$fp + 84]
-+ swi $r0, [$fp + 88]
-+ swi $r0, [$fp + 92]
-+ swi $r0, [$fp + 96]
-+ swi $r0, [$fp + 100]
-+ swi $r0, [$fp + 104]
-+ swi $r0, [$fp + 108]
-+ swi $r0, [$fp + 112]
-+ swi $r0, [$fp + 116]
-+ swi $r0, [$fp + 120]
-+ swi $r0, [$fp + 124]
-+ swi $r0, [$fp + 128]
-+ swi $r0, [$fp + 132]
-+ swi $r0, [$fp + 136]
-+ swi $r0, [$fp + 140]
-+ swi $r0, [$fp + 144]
-+ swi $r0, [$fp + 148]
-+ swi $r0, [$fp + 152]
-+ swi $r0, [$fp + 156]
-+ swi $r0, [$fp + 160]
-+ swi $r0, [$fp + 164]
-+ swi $r0, [$fp + 168]
-+ swi $r0, [$fp + 172]
-+ swi $r0, [$fp + 176]
-+ swi $r0, [$fp + 180]
-+ swi $r0, [$fp + 184]
-+ swi $r0, [$fp + 188]
-+ swi $r0, [$fp + 192]
-+ swi $r0, [$fp + 196]
-+ swi $r0, [$fp + 200]
-+ swi $r0, [$fp + 204]
-+ swi $r0, [$fp + 208]
-+ swi $r0, [$fp + 212]
-+ swi $r0, [$fp + 216]
-+ swi $r0, [$fp + 220]
-+ swi $r0, [$fp + 224]
-+ swi $r0, [$fp + 228]
-+ swi $r0, [$fp + 232]
-+ swi $r0, [$fp + 236]
-+ swi $r0, [$fp + 240]
-+ swi $r0, [$fp + 244]
-+ swi $r0, [$fp + 248]
-+ swi $r0, [$fp + 252]
-+ swi $r0, [$fp + 256]
-+ swi $r0, [$fp + 260]
-+ swi $r0, [$fp + 264]
-+ swi $r0, [$fp + 268]
-+ swi $r0, [$fp + 272]
-+ swi $r0, [$fp + 276]
-+ swi $r0, [$fp + 280]
-+ swi $r0, [$fp + 284]
-+ swi $r0, [$fp + 288]
-+ swi $r0, [$fp + 292]
-+ swi $r0, [$fp + 296]
-+ swi $r0, [$fp + 300]
-+ swi $r0, [$fp + 304]
-+ swi $r0, [$fp + 308]
-+ swi $r0, [$fp + 312]
-+ swi $r0, [$fp + 316]
-+ swi $r0, [$fp + 320]
-+ swi $r0, [$fp + 324]
-+ swi $r0, [$fp + 328]
-+ swi $r0, [$fp + 332]
-+ swi $r0, [$fp + 336]
-+ swi $r0, [$fp + 340]
-+ swi $r0, [$fp + 344]
-+ swi $r0, [$fp + 348]
-+ swi $r0, [$fp + 352]
-+ swi $r0, [$fp + 356]
-+ swi $r0, [$fp + 360]
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-+ swi $r4, [$fp + 484]
-+ swi $r4, [$fp + 488]
-+ swi $r4, [$fp + 492]
-+ swi $r4, [$fp + 496]
-+ swi $r4, [$fp + 500]
-+ swi $r4, [$fp + 504]
-+ swi $r4, [$fp + 508]
-+ swi $r5, [$fp + 0]
-+ swi $r5, [$fp + 4]
-+ swi $r5, [$fp + 8]
-+ swi $r5, [$fp + 12]
-+ swi $r5, [$fp + 16]
-+ swi $r5, [$fp + 20]
-+ swi $r5, [$fp + 24]
-+ swi $r5, [$fp + 28]
-+ swi $r5, [$fp + 32]
-+ swi $r5, [$fp + 36]
-+ swi $r5, [$fp + 40]
-+ swi $r5, [$fp + 44]
-+ swi $r5, [$fp + 48]
-+ swi $r5, [$fp + 52]
-+ swi $r5, [$fp + 56]
-+ swi $r5, [$fp + 60]
-+ swi $r5, [$fp + 64]
-+ swi $r5, [$fp + 68]
-+ swi $r5, [$fp + 72]
-+ swi $r5, [$fp + 76]
-+ swi $r5, [$fp + 80]
-+ swi $r5, [$fp + 84]
-+ swi $r5, [$fp + 88]
-+ swi $r5, [$fp + 92]
-+ swi $r5, [$fp + 96]
-+ swi $r5, [$fp + 100]
-+ swi $r5, [$fp + 104]
-+ swi $r5, [$fp + 108]
-+ swi $r5, [$fp + 112]
-+ swi $r5, [$fp + 116]
-+ swi $r5, [$fp + 120]
-+ swi $r5, [$fp + 124]
-+ swi $r5, [$fp + 128]
-+ swi $r5, [$fp + 132]
-+ swi $r5, [$fp + 136]
-+ swi $r5, [$fp + 140]
-+ swi $r5, [$fp + 144]
-+ swi $r5, [$fp + 148]
-+ swi $r5, [$fp + 152]
-+ swi $r5, [$fp + 156]
-+ swi $r5, [$fp + 160]
-+ swi $r5, [$fp + 164]
-+ swi $r5, [$fp + 168]
-+ swi $r5, [$fp + 172]
-+ swi $r5, [$fp + 176]
-+ swi $r5, [$fp + 180]
-+ swi $r5, [$fp + 184]
-+ swi $r5, [$fp + 188]
-+ swi $r5, [$fp + 192]
-+ swi $r5, [$fp + 196]
-+ swi $r5, [$fp + 200]
-+ swi $r5, [$fp + 204]
-+ swi $r5, [$fp + 208]
-+ swi $r5, [$fp + 212]
-+ swi $r5, [$fp + 216]
-+ swi $r5, [$fp + 220]
-+ swi $r5, [$fp + 224]
-+ swi $r5, [$fp + 228]
-+ swi $r5, [$fp + 232]
-+ swi $r5, [$fp + 236]
-+ swi $r5, [$fp + 240]
-+ swi $r5, [$fp + 244]
-+ swi $r5, [$fp + 248]
-+ swi $r5, [$fp + 252]
-+ swi $r5, [$fp + 256]
-+ swi $r5, [$fp + 260]
-+ swi $r5, [$fp + 264]
-+ swi $r5, [$fp + 268]
-+ swi $r5, [$fp + 272]
-+ swi $r5, [$fp + 276]
-+ swi $r5, [$fp + 280]
-+ swi $r5, [$fp + 284]
-+ swi $r5, [$fp + 288]
-+ swi $r5, [$fp + 292]
-+ swi $r5, [$fp + 296]
-+ swi $r5, [$fp + 300]
-+ swi $r5, [$fp + 304]
-+ swi $r5, [$fp + 308]
-+ swi $r5, [$fp + 312]
-+ swi $r5, [$fp + 316]
-+ swi $r5, [$fp + 320]
-+ swi $r5, [$fp + 324]
-+ swi $r5, [$fp + 328]
-+ swi $r5, [$fp + 332]
-+ swi $r5, [$fp + 336]
-+ swi $r5, [$fp + 340]
-+ swi $r5, [$fp + 344]
-+ swi $r5, [$fp + 348]
-+ swi $r5, [$fp + 352]
-+ swi $r5, [$fp + 356]
-+ swi $r5, [$fp + 360]
-+ swi $r5, [$fp + 364]
-+ swi $r5, [$fp + 368]
-+ swi $r5, [$fp + 372]
-+ swi $r5, [$fp + 376]
-+ swi $r5, [$fp + 380]
-+ swi $r5, [$fp + 384]
-+ swi $r5, [$fp + 388]
-+ swi $r5, [$fp + 392]
-+ swi $r5, [$fp + 396]
-+ swi $r5, [$fp + 400]
-+ swi $r5, [$fp + 404]
-+ swi $r5, [$fp + 408]
-+ swi $r5, [$fp + 412]
-+ swi $r5, [$fp + 416]
-+ swi $r5, [$fp + 420]
-+ swi $r5, [$fp + 424]
-+ swi $r5, [$fp + 428]
-+ swi $r5, [$fp + 432]
-+ swi $r5, [$fp + 436]
-+ swi $r5, [$fp + 440]
-+ swi $r5, [$fp + 444]
-+ swi $r5, [$fp + 448]
-+ swi $r5, [$fp + 452]
-+ swi $r5, [$fp + 456]
-+ swi $r5, [$fp + 460]
-+ swi $r5, [$fp + 464]
-+ swi $r5, [$fp + 468]
-+ swi $r5, [$fp + 472]
-+ swi $r5, [$fp + 476]
-+ swi $r5, [$fp + 480]
-+ swi $r5, [$fp + 484]
-+ swi $r5, [$fp + 488]
-+ swi $r5, [$fp + 492]
-+ swi $r5, [$fp + 496]
-+ swi $r5, [$fp + 500]
-+ swi $r5, [$fp + 504]
-+ swi $r5, [$fp + 508]
-+ swi $r6, [$fp + 0]
-+ swi $r6, [$fp + 4]
-+ swi $r6, [$fp + 8]
-+ swi $r6, [$fp + 12]
-+ swi $r6, [$fp + 16]
-+ swi $r6, [$fp + 20]
-+ swi $r6, [$fp + 24]
-+ swi $r6, [$fp + 28]
-+ swi $r6, [$fp + 32]
-+ swi $r6, [$fp + 36]
-+ swi $r6, [$fp + 40]
-+ swi $r6, [$fp + 44]
-+ swi $r6, [$fp + 48]
-+ swi $r6, [$fp + 52]
-+ swi $r6, [$fp + 56]
-+ swi $r6, [$fp + 60]
-+ swi $r6, [$fp + 64]
-+ swi $r6, [$fp + 68]
-+ swi $r6, [$fp + 72]
-+ swi $r6, [$fp + 76]
-+ swi $r6, [$fp + 80]
-+ swi $r6, [$fp + 84]
-+ swi $r6, [$fp + 88]
-+ swi $r6, [$fp + 92]
-+ swi $r6, [$fp + 96]
-+ swi $r6, [$fp + 100]
-+ swi $r6, [$fp + 104]
-+ swi $r6, [$fp + 108]
-+ swi $r6, [$fp + 112]
-+ swi $r6, [$fp + 116]
-+ swi $r6, [$fp + 120]
-+ swi $r6, [$fp + 124]
-+ swi $r6, [$fp + 128]
-+ swi $r6, [$fp + 132]
-+ swi $r6, [$fp + 136]
-+ swi $r6, [$fp + 140]
-+ swi $r6, [$fp + 144]
-+ swi $r6, [$fp + 148]
-+ swi $r6, [$fp + 152]
-+ swi $r6, [$fp + 156]
-+ swi $r6, [$fp + 160]
-+ swi $r6, [$fp + 164]
-+ swi $r6, [$fp + 168]
-+ swi $r6, [$fp + 172]
-+ swi $r6, [$fp + 176]
-+ swi $r6, [$fp + 180]
-+ swi $r6, [$fp + 184]
-+ swi $r6, [$fp + 188]
-+ swi $r6, [$fp + 192]
-+ swi $r6, [$fp + 196]
-+ swi $r6, [$fp + 200]
-+ swi $r6, [$fp + 204]
-+ swi $r6, [$fp + 208]
-+ swi $r6, [$fp + 212]
-+ swi $r6, [$fp + 216]
-+ swi $r6, [$fp + 220]
-+ swi $r6, [$fp + 224]
-+ swi $r6, [$fp + 228]
-+ swi $r6, [$fp + 232]
-+ swi $r6, [$fp + 236]
-+ swi $r6, [$fp + 240]
-+ swi $r6, [$fp + 244]
-+ swi $r6, [$fp + 248]
-+ swi $r6, [$fp + 252]
-+ swi $r6, [$fp + 256]
-+ swi $r6, [$fp + 260]
-+ swi $r6, [$fp + 264]
-+ swi $r6, [$fp + 268]
-+ swi $r6, [$fp + 272]
-+ swi $r6, [$fp + 276]
-+ swi $r6, [$fp + 280]
-+ swi $r6, [$fp + 284]
-+ swi $r6, [$fp + 288]
-+ swi $r6, [$fp + 292]
-+ swi $r6, [$fp + 296]
-+ swi $r6, [$fp + 300]
-+ swi $r6, [$fp + 304]
-+ swi $r6, [$fp + 308]
-+ swi $r6, [$fp + 312]
-+ swi $r6, [$fp + 316]
-+ swi $r6, [$fp + 320]
-+ swi $r6, [$fp + 324]
-+ swi $r6, [$fp + 328]
-+ swi $r6, [$fp + 332]
-+ swi $r6, [$fp + 336]
-+ swi $r6, [$fp + 340]
-+ swi $r6, [$fp + 344]
-+ swi $r6, [$fp + 348]
-+ swi $r6, [$fp + 352]
-+ swi $r6, [$fp + 356]
-+ swi $r6, [$fp + 360]
-+ swi $r6, [$fp + 364]
-+ swi $r6, [$fp + 368]
-+ swi $r6, [$fp + 372]
-+ swi $r6, [$fp + 376]
-+ swi $r6, [$fp + 380]
-+ swi $r6, [$fp + 384]
-+ swi $r6, [$fp + 388]
-+ swi $r6, [$fp + 392]
-+ swi $r6, [$fp + 396]
-+ swi $r6, [$fp + 400]
-+ swi $r6, [$fp + 404]
-+ swi $r6, [$fp + 408]
-+ swi $r6, [$fp + 412]
-+ swi $r6, [$fp + 416]
-+ swi $r6, [$fp + 420]
-+ swi $r6, [$fp + 424]
-+ swi $r6, [$fp + 428]
-+ swi $r6, [$fp + 432]
-+ swi $r6, [$fp + 436]
-+ swi $r6, [$fp + 440]
-+ swi $r6, [$fp + 444]
-+ swi $r6, [$fp + 448]
-+ swi $r6, [$fp + 452]
-+ swi $r6, [$fp + 456]
-+ swi $r6, [$fp + 460]
-+ swi $r6, [$fp + 464]
-+ swi $r6, [$fp + 468]
-+ swi $r6, [$fp + 472]
-+ swi $r6, [$fp + 476]
-+ swi $r6, [$fp + 480]
-+ swi $r6, [$fp + 484]
-+ swi $r6, [$fp + 488]
-+ swi $r6, [$fp + 492]
-+ swi $r6, [$fp + 496]
-+ swi $r6, [$fp + 500]
-+ swi $r6, [$fp + 504]
-+ swi $r6, [$fp + 508]
-+ swi $r7, [$fp + 0]
-+ swi $r7, [$fp + 4]
-+ swi $r7, [$fp + 8]
-+ swi $r7, [$fp + 12]
-+ swi $r7, [$fp + 16]
-+ swi $r7, [$fp + 20]
-+ swi $r7, [$fp + 24]
-+ swi $r7, [$fp + 28]
-+ swi $r7, [$fp + 32]
-+ swi $r7, [$fp + 36]
-+ swi $r7, [$fp + 40]
-+ swi $r7, [$fp + 44]
-+ swi $r7, [$fp + 48]
-+ swi $r7, [$fp + 52]
-+ swi $r7, [$fp + 56]
-+ swi $r7, [$fp + 60]
-+ swi $r7, [$fp + 64]
-+ swi $r7, [$fp + 68]
-+ swi $r7, [$fp + 72]
-+ swi $r7, [$fp + 76]
-+ swi $r7, [$fp + 80]
-+ swi $r7, [$fp + 84]
-+ swi $r7, [$fp + 88]
-+ swi $r7, [$fp + 92]
-+ swi $r7, [$fp + 96]
-+ swi $r7, [$fp + 100]
-+ swi $r7, [$fp + 104]
-+ swi $r7, [$fp + 108]
-+ swi $r7, [$fp + 112]
-+ swi $r7, [$fp + 116]
-+ swi $r7, [$fp + 120]
-+ swi $r7, [$fp + 124]
-+ swi $r7, [$fp + 128]
-+ swi $r7, [$fp + 132]
-+ swi $r7, [$fp + 136]
-+ swi $r7, [$fp + 140]
-+ swi $r7, [$fp + 144]
-+ swi $r7, [$fp + 148]
-+ swi $r7, [$fp + 152]
-+ swi $r7, [$fp + 156]
-+ swi $r7, [$fp + 160]
-+ swi $r7, [$fp + 164]
-+ swi $r7, [$fp + 168]
-+ swi $r7, [$fp + 172]
-+ swi $r7, [$fp + 176]
-+ swi $r7, [$fp + 180]
-+ swi $r7, [$fp + 184]
-+ swi $r7, [$fp + 188]
-+ swi $r7, [$fp + 192]
-+ swi $r7, [$fp + 196]
-+ swi $r7, [$fp + 200]
-+ swi $r7, [$fp + 204]
-+ swi $r7, [$fp + 208]
-+ swi $r7, [$fp + 212]
-+ swi $r7, [$fp + 216]
-+ swi $r7, [$fp + 220]
-+ swi $r7, [$fp + 224]
-+ swi $r7, [$fp + 228]
-+ swi $r7, [$fp + 232]
-+ swi $r7, [$fp + 236]
-+ swi $r7, [$fp + 240]
-+ swi $r7, [$fp + 244]
-+ swi $r7, [$fp + 248]
-+ swi $r7, [$fp + 252]
-+ swi $r7, [$fp + 256]
-+ swi $r7, [$fp + 260]
-+ swi $r7, [$fp + 264]
-+ swi $r7, [$fp + 268]
-+ swi $r7, [$fp + 272]
-+ swi $r7, [$fp + 276]
-+ swi $r7, [$fp + 280]
-+ swi $r7, [$fp + 284]
-+ swi $r7, [$fp + 288]
-+ swi $r7, [$fp + 292]
-+ swi $r7, [$fp + 296]
-+ swi $r7, [$fp + 300]
-+ swi $r7, [$fp + 304]
-+ swi $r7, [$fp + 308]
-+ swi $r7, [$fp + 312]
-+ swi $r7, [$fp + 316]
-+ swi $r7, [$fp + 320]
-+ swi $r7, [$fp + 324]
-+ swi $r7, [$fp + 328]
-+ swi $r7, [$fp + 332]
-+ swi $r7, [$fp + 336]
-+ swi $r7, [$fp + 340]
-+ swi $r7, [$fp + 344]
-+ swi $r7, [$fp + 348]
-+ swi $r7, [$fp + 352]
-+ swi $r7, [$fp + 356]
-+ swi $r7, [$fp + 360]
-+ swi $r7, [$fp + 364]
-+ swi $r7, [$fp + 368]
-+ swi $r7, [$fp + 372]
-+ swi $r7, [$fp + 376]
-+ swi $r7, [$fp + 380]
-+ swi $r7, [$fp + 384]
-+ swi $r7, [$fp + 388]
-+ swi $r7, [$fp + 392]
-+ swi $r7, [$fp + 396]
-+ swi $r7, [$fp + 400]
-+ swi $r7, [$fp + 404]
-+ swi $r7, [$fp + 408]
-+ swi $r7, [$fp + 412]
-+ swi $r7, [$fp + 416]
-+ swi $r7, [$fp + 420]
-+ swi $r7, [$fp + 424]
-+ swi $r7, [$fp + 428]
-+ swi $r7, [$fp + 432]
-+ swi $r7, [$fp + 436]
-+ swi $r7, [$fp + 440]
-+ swi $r7, [$fp + 444]
-+ swi $r7, [$fp + 448]
-+ swi $r7, [$fp + 452]
-+ swi $r7, [$fp + 456]
-+ swi $r7, [$fp + 460]
-+ swi $r7, [$fp + 464]
-+ swi $r7, [$fp + 468]
-+ swi $r7, [$fp + 472]
-+ swi $r7, [$fp + 476]
-+ swi $r7, [$fp + 480]
-+ swi $r7, [$fp + 484]
-+ swi $r7, [$fp + 488]
-+ swi $r7, [$fp + 492]
-+ swi $r7, [$fp + 496]
-+ swi $r7, [$fp + 500]
-+ swi $r7, [$fp + 504]
-+ swi $r7, [$fp + 508]
-+ jr $r0
-+ jr $r1
-+ jr $r2
-+ jr $r3
-+ jr $r4
-+ jr $r5
-+ jr $r6
-+ jr $r7
-+ jr $r8
-+ jr $r9
-+ jr $r10
-+ jr $r11
-+ jr $r16
-+ jr $r17
-+ jr $r18
-+ jr $r19
-+ jr $r12
-+ jr $r13
-+ jr $r14
-+ jr $r15
-+ jr $r20
-+ jr $r21
-+ jr $r22
-+ jr $r23
-+ jr $r24
-+ jr $r25
-+ jr $r26
-+ jr $r27
-+ jr $fp
-+ jr $gp
-+ jr $lp
-+ jr $sp
-+ ret $r0
-+ ret $r1
-+ ret $r2
-+ ret $r3
-+ ret $r4
-+ ret $r5
-+ ret $r6
-+ ret $r7
-+ ret $r8
-+ ret $r9
-+ ret $r10
-+ ret $r11
-+ ret $r16
-+ ret $r17
-+ ret $r18
-+ ret $r19
-+ ret $r12
-+ ret $r13
-+ ret $r14
-+ ret $r15
-+ ret $r20
-+ ret $r21
-+ ret $r22
-+ ret $r23
-+ ret $r24
-+ ret $r25
-+ ret $r26
-+ ret $r27
-+ ret $fp
-+ ret $gp
-+ ret $lp
-+ ret $sp
-+ jral $r0
-+ jral $r1
-+ jral $r2
-+ jral $r3
-+ jral $r4
-+ jral $r5
-+ jral $r6
-+ jral $r7
-+ jral $r8
-+ jral $r9
-+ jral $r10
-+ jral $r11
-+ jral $r16
-+ jral $r17
-+ jral $r18
-+ jral $r19
-+ jral $r12
-+ jral $r13
-+ jral $r14
-+ jral $r15
-+ jral $r20
-+ jral $r21
-+ jral $r22
-+ jral $r23
-+ jral $r24
-+ jral $r25
-+ jral $r26
-+ jral $r27
-+ jral $fp
-+ jral $gp
-+ jral $lp
-+ jral $sp
-+ slts $r15, $r0, $r0
-+ slts $r15, $r0, $r1
-+ slts $r15, $r0, $r2
-+ slts $r15, $r0, $r3
-+ slts $r15, $r0, $r4
-+ slts $r15, $r0, $r5
-+ slts $r15, $r0, $r6
-+ slts $r15, $r0, $r7
-+ slts $r15, $r0, $r8
-+ slts $r15, $r0, $r9
-+ slts $r15, $r0, $r10
-+ slts $r15, $r0, $r11
-+ slts $r15, $r0, $r16
-+ slts $r15, $r0, $r17
-+ slts $r15, $r0, $r18
-+ slts $r15, $r0, $r19
-+ slts $r15, $r0, $r12
-+ slts $r15, $r0, $r13
-+ slts $r15, $r0, $r14
-+ slts $r15, $r0, $r15
-+ slts $r15, $r0, $r20
-+ slts $r15, $r0, $r21
-+ slts $r15, $r0, $r22
-+ slts $r15, $r0, $r23
-+ slts $r15, $r0, $r24
-+ slts $r15, $r0, $r25
-+ slts $r15, $r0, $r26
-+ slts $r15, $r0, $r27
-+ slts $r15, $r0, $fp
-+ slts $r15, $r0, $gp
-+ slts $r15, $r0, $lp
-+ slts $r15, $r0, $sp
-+ slts $r15, $r1, $r0
-+ slts $r15, $r1, $r1
-+ slts $r15, $r1, $r2
-+ slts $r15, $r1, $r3
-+ slts $r15, $r1, $r4
-+ slts $r15, $r1, $r5
-+ slts $r15, $r1, $r6
-+ slts $r15, $r1, $r7
-+ slts $r15, $r1, $r8
-+ slts $r15, $r1, $r9
-+ slts $r15, $r1, $r10
-+ slts $r15, $r1, $r11
-+ slts $r15, $r1, $r16
-+ slts $r15, $r1, $r17
-+ slts $r15, $r1, $r18
-+ slts $r15, $r1, $r19
-+ slts $r15, $r1, $r12
-+ slts $r15, $r1, $r13
-+ slts $r15, $r1, $r14
-+ slts $r15, $r1, $r15
-+ slts $r15, $r1, $r20
-+ slts $r15, $r1, $r21
-+ slts $r15, $r1, $r22
-+ slts $r15, $r1, $r23
-+ slts $r15, $r1, $r24
-+ slts $r15, $r1, $r25
-+ slts $r15, $r1, $r26
-+ slts $r15, $r1, $r27
-+ slts $r15, $r1, $fp
-+ slts $r15, $r1, $gp
-+ slts $r15, $r1, $lp
-+ slts $r15, $r1, $sp
-+ slts $r15, $r2, $r0
-+ slts $r15, $r2, $r1
-+ slts $r15, $r2, $r2
-+ slts $r15, $r2, $r3
-+ slts $r15, $r2, $r4
-+ slts $r15, $r2, $r5
-+ slts $r15, $r2, $r6
-+ slts $r15, $r2, $r7
-+ slts $r15, $r2, $r8
-+ slts $r15, $r2, $r9
-+ slts $r15, $r2, $r10
-+ slts $r15, $r2, $r11
-+ slts $r15, $r2, $r16
-+ slts $r15, $r2, $r17
-+ slts $r15, $r2, $r18
-+ slts $r15, $r2, $r19
-+ slts $r15, $r2, $r12
-+ slts $r15, $r2, $r13
-+ slts $r15, $r2, $r14
-+ slts $r15, $r2, $r15
-+ slts $r15, $r2, $r20
-+ slts $r15, $r2, $r21
-+ slts $r15, $r2, $r22
-+ slts $r15, $r2, $r23
-+ slts $r15, $r2, $r24
-+ slts $r15, $r2, $r25
-+ slts $r15, $r2, $r26
-+ slts $r15, $r2, $r27
-+ slts $r15, $r2, $fp
-+ slts $r15, $r2, $gp
-+ slts $r15, $r2, $lp
-+ slts $r15, $r2, $sp
-+ slts $r15, $r3, $r0
-+ slts $r15, $r3, $r1
-+ slts $r15, $r3, $r2
-+ slts $r15, $r3, $r3
-+ slts $r15, $r3, $r4
-+ slts $r15, $r3, $r5
-+ slts $r15, $r3, $r6
-+ slts $r15, $r3, $r7
-+ slts $r15, $r3, $r8
-+ slts $r15, $r3, $r9
-+ slts $r15, $r3, $r10
-+ slts $r15, $r3, $r11
-+ slts $r15, $r3, $r16
-+ slts $r15, $r3, $r17
-+ slts $r15, $r3, $r18
-+ slts $r15, $r3, $r19
-+ slts $r15, $r3, $r12
-+ slts $r15, $r3, $r13
-+ slts $r15, $r3, $r14
-+ slts $r15, $r3, $r15
-+ slts $r15, $r3, $r20
-+ slts $r15, $r3, $r21
-+ slts $r15, $r3, $r22
-+ slts $r15, $r3, $r23
-+ slts $r15, $r3, $r24
-+ slts $r15, $r3, $r25
-+ slts $r15, $r3, $r26
-+ slts $r15, $r3, $r27
-+ slts $r15, $r3, $fp
-+ slts $r15, $r3, $gp
-+ slts $r15, $r3, $lp
-+ slts $r15, $r3, $sp
-+ slts $r15, $r4, $r0
-+ slts $r15, $r4, $r1
-+ slts $r15, $r4, $r2
-+ slts $r15, $r4, $r3
-+ slts $r15, $r4, $r4
-+ slts $r15, $r4, $r5
-+ slts $r15, $r4, $r6
-+ slts $r15, $r4, $r7
-+ slts $r15, $r4, $r8
-+ slts $r15, $r4, $r9
-+ slts $r15, $r4, $r10
-+ slts $r15, $r4, $r11
-+ slts $r15, $r4, $r16
-+ slts $r15, $r4, $r17
-+ slts $r15, $r4, $r18
-+ slts $r15, $r4, $r19
-+ slts $r15, $r4, $r12
-+ slts $r15, $r4, $r13
-+ slts $r15, $r4, $r14
-+ slts $r15, $r4, $r15
-+ slts $r15, $r4, $r20
-+ slts $r15, $r4, $r21
-+ slts $r15, $r4, $r22
-+ slts $r15, $r4, $r23
-+ slts $r15, $r4, $r24
-+ slts $r15, $r4, $r25
-+ slts $r15, $r4, $r26
-+ slts $r15, $r4, $r27
-+ slts $r15, $r4, $fp
-+ slts $r15, $r4, $gp
-+ slts $r15, $r4, $lp
-+ slts $r15, $r4, $sp
-+ slts $r15, $r5, $r0
-+ slts $r15, $r5, $r1
-+ slts $r15, $r5, $r2
-+ slts $r15, $r5, $r3
-+ slts $r15, $r5, $r4
-+ slts $r15, $r5, $r5
-+ slts $r15, $r5, $r6
-+ slts $r15, $r5, $r7
-+ slts $r15, $r5, $r8
-+ slts $r15, $r5, $r9
-+ slts $r15, $r5, $r10
-+ slts $r15, $r5, $r11
-+ slts $r15, $r5, $r16
-+ slts $r15, $r5, $r17
-+ slts $r15, $r5, $r18
-+ slts $r15, $r5, $r19
-+ slts $r15, $r5, $r12
-+ slts $r15, $r5, $r13
-+ slts $r15, $r5, $r14
-+ slts $r15, $r5, $r15
-+ slts $r15, $r5, $r20
-+ slts $r15, $r5, $r21
-+ slts $r15, $r5, $r22
-+ slts $r15, $r5, $r23
-+ slts $r15, $r5, $r24
-+ slts $r15, $r5, $r25
-+ slts $r15, $r5, $r26
-+ slts $r15, $r5, $r27
-+ slts $r15, $r5, $fp
-+ slts $r15, $r5, $gp
-+ slts $r15, $r5, $lp
-+ slts $r15, $r5, $sp
-+ slts $r15, $r6, $r0
-+ slts $r15, $r6, $r1
-+ slts $r15, $r6, $r2
-+ slts $r15, $r6, $r3
-+ slts $r15, $r6, $r4
-+ slts $r15, $r6, $r5
-+ slts $r15, $r6, $r6
-+ slts $r15, $r6, $r7
-+ slts $r15, $r6, $r8
-+ slts $r15, $r6, $r9
-+ slts $r15, $r6, $r10
-+ slts $r15, $r6, $r11
-+ slts $r15, $r6, $r16
-+ slts $r15, $r6, $r17
-+ slts $r15, $r6, $r18
-+ slts $r15, $r6, $r19
-+ slts $r15, $r6, $r12
-+ slts $r15, $r6, $r13
-+ slts $r15, $r6, $r14
-+ slts $r15, $r6, $r15
-+ slts $r15, $r6, $r20
-+ slts $r15, $r6, $r21
-+ slts $r15, $r6, $r22
-+ slts $r15, $r6, $r23
-+ slts $r15, $r6, $r24
-+ slts $r15, $r6, $r25
-+ slts $r15, $r6, $r26
-+ slts $r15, $r6, $r27
-+ slts $r15, $r6, $fp
-+ slts $r15, $r6, $gp
-+ slts $r15, $r6, $lp
-+ slts $r15, $r6, $sp
-+ slts $r15, $r7, $r0
-+ slts $r15, $r7, $r1
-+ slts $r15, $r7, $r2
-+ slts $r15, $r7, $r3
-+ slts $r15, $r7, $r4
-+ slts $r15, $r7, $r5
-+ slts $r15, $r7, $r6
-+ slts $r15, $r7, $r7
-+ slts $r15, $r7, $r8
-+ slts $r15, $r7, $r9
-+ slts $r15, $r7, $r10
-+ slts $r15, $r7, $r11
-+ slts $r15, $r7, $r16
-+ slts $r15, $r7, $r17
-+ slts $r15, $r7, $r18
-+ slts $r15, $r7, $r19
-+ slts $r15, $r7, $r12
-+ slts $r15, $r7, $r13
-+ slts $r15, $r7, $r14
-+ slts $r15, $r7, $r15
-+ slts $r15, $r7, $r20
-+ slts $r15, $r7, $r21
-+ slts $r15, $r7, $r22
-+ slts $r15, $r7, $r23
-+ slts $r15, $r7, $r24
-+ slts $r15, $r7, $r25
-+ slts $r15, $r7, $r26
-+ slts $r15, $r7, $r27
-+ slts $r15, $r7, $fp
-+ slts $r15, $r7, $gp
-+ slts $r15, $r7, $lp
-+ slts $r15, $r7, $sp
-+ slts $r15, $r8, $r0
-+ slts $r15, $r8, $r1
-+ slts $r15, $r8, $r2
-+ slts $r15, $r8, $r3
-+ slts $r15, $r8, $r4
-+ slts $r15, $r8, $r5
-+ slts $r15, $r8, $r6
-+ slts $r15, $r8, $r7
-+ slts $r15, $r8, $r8
-+ slts $r15, $r8, $r9
-+ slts $r15, $r8, $r10
-+ slts $r15, $r8, $r11
-+ slts $r15, $r8, $r16
-+ slts $r15, $r8, $r17
-+ slts $r15, $r8, $r18
-+ slts $r15, $r8, $r19
-+ slts $r15, $r8, $r12
-+ slts $r15, $r8, $r13
-+ slts $r15, $r8, $r14
-+ slts $r15, $r8, $r15
-+ slts $r15, $r8, $r20
-+ slts $r15, $r8, $r21
-+ slts $r15, $r8, $r22
-+ slts $r15, $r8, $r23
-+ slts $r15, $r8, $r24
-+ slts $r15, $r8, $r25
-+ slts $r15, $r8, $r26
-+ slts $r15, $r8, $r27
-+ slts $r15, $r8, $fp
-+ slts $r15, $r8, $gp
-+ slts $r15, $r8, $lp
-+ slts $r15, $r8, $sp
-+ slts $r15, $r9, $r0
-+ slts $r15, $r9, $r1
-+ slts $r15, $r9, $r2
-+ slts $r15, $r9, $r3
-+ slts $r15, $r9, $r4
-+ slts $r15, $r9, $r5
-+ slts $r15, $r9, $r6
-+ slts $r15, $r9, $r7
-+ slts $r15, $r9, $r8
-+ slts $r15, $r9, $r9
-+ slts $r15, $r9, $r10
-+ slts $r15, $r9, $r11
-+ slts $r15, $r9, $r16
-+ slts $r15, $r9, $r17
-+ slts $r15, $r9, $r18
-+ slts $r15, $r9, $r19
-+ slts $r15, $r9, $r12
-+ slts $r15, $r9, $r13
-+ slts $r15, $r9, $r14
-+ slts $r15, $r9, $r15
-+ slts $r15, $r9, $r20
-+ slts $r15, $r9, $r21
-+ slts $r15, $r9, $r22
-+ slts $r15, $r9, $r23
-+ slts $r15, $r9, $r24
-+ slts $r15, $r9, $r25
-+ slts $r15, $r9, $r26
-+ slts $r15, $r9, $r27
-+ slts $r15, $r9, $fp
-+ slts $r15, $r9, $gp
-+ slts $r15, $r9, $lp
-+ slts $r15, $r9, $sp
-+ slts $r15, $r10, $r0
-+ slts $r15, $r10, $r1
-+ slts $r15, $r10, $r2
-+ slts $r15, $r10, $r3
-+ slts $r15, $r10, $r4
-+ slts $r15, $r10, $r5
-+ slts $r15, $r10, $r6
-+ slts $r15, $r10, $r7
-+ slts $r15, $r10, $r8
-+ slts $r15, $r10, $r9
-+ slts $r15, $r10, $r10
-+ slts $r15, $r10, $r11
-+ slts $r15, $r10, $r16
-+ slts $r15, $r10, $r17
-+ slts $r15, $r10, $r18
-+ slts $r15, $r10, $r19
-+ slts $r15, $r10, $r12
-+ slts $r15, $r10, $r13
-+ slts $r15, $r10, $r14
-+ slts $r15, $r10, $r15
-+ slts $r15, $r10, $r20
-+ slts $r15, $r10, $r21
-+ slts $r15, $r10, $r22
-+ slts $r15, $r10, $r23
-+ slts $r15, $r10, $r24
-+ slts $r15, $r10, $r25
-+ slts $r15, $r10, $r26
-+ slts $r15, $r10, $r27
-+ slts $r15, $r10, $fp
-+ slts $r15, $r10, $gp
-+ slts $r15, $r10, $lp
-+ slts $r15, $r10, $sp
-+ slts $r15, $r11, $r0
-+ slts $r15, $r11, $r1
-+ slts $r15, $r11, $r2
-+ slts $r15, $r11, $r3
-+ slts $r15, $r11, $r4
-+ slts $r15, $r11, $r5
-+ slts $r15, $r11, $r6
-+ slts $r15, $r11, $r7
-+ slts $r15, $r11, $r8
-+ slts $r15, $r11, $r9
-+ slts $r15, $r11, $r10
-+ slts $r15, $r11, $r11
-+ slts $r15, $r11, $r16
-+ slts $r15, $r11, $r17
-+ slts $r15, $r11, $r18
-+ slts $r15, $r11, $r19
-+ slts $r15, $r11, $r12
-+ slts $r15, $r11, $r13
-+ slts $r15, $r11, $r14
-+ slts $r15, $r11, $r15
-+ slts $r15, $r11, $r20
-+ slts $r15, $r11, $r21
-+ slts $r15, $r11, $r22
-+ slts $r15, $r11, $r23
-+ slts $r15, $r11, $r24
-+ slts $r15, $r11, $r25
-+ slts $r15, $r11, $r26
-+ slts $r15, $r11, $r27
-+ slts $r15, $r11, $fp
-+ slts $r15, $r11, $gp
-+ slts $r15, $r11, $lp
-+ slts $r15, $r11, $sp
-+ slts $r15, $r16, $r0
-+ slts $r15, $r16, $r1
-+ slts $r15, $r16, $r2
-+ slts $r15, $r16, $r3
-+ slts $r15, $r16, $r4
-+ slts $r15, $r16, $r5
-+ slts $r15, $r16, $r6
-+ slts $r15, $r16, $r7
-+ slts $r15, $r16, $r8
-+ slts $r15, $r16, $r9
-+ slts $r15, $r16, $r10
-+ slts $r15, $r16, $r11
-+ slts $r15, $r16, $r16
-+ slts $r15, $r16, $r17
-+ slts $r15, $r16, $r18
-+ slts $r15, $r16, $r19
-+ slts $r15, $r16, $r12
-+ slts $r15, $r16, $r13
-+ slts $r15, $r16, $r14
-+ slts $r15, $r16, $r15
-+ slts $r15, $r16, $r20
-+ slts $r15, $r16, $r21
-+ slts $r15, $r16, $r22
-+ slts $r15, $r16, $r23
-+ slts $r15, $r16, $r24
-+ slts $r15, $r16, $r25
-+ slts $r15, $r16, $r26
-+ slts $r15, $r16, $r27
-+ slts $r15, $r16, $fp
-+ slts $r15, $r16, $gp
-+ slts $r15, $r16, $lp
-+ slts $r15, $r16, $sp
-+ slts $r15, $r17, $r0
-+ slts $r15, $r17, $r1
-+ slts $r15, $r17, $r2
-+ slts $r15, $r17, $r3
-+ slts $r15, $r17, $r4
-+ slts $r15, $r17, $r5
-+ slts $r15, $r17, $r6
-+ slts $r15, $r17, $r7
-+ slts $r15, $r17, $r8
-+ slts $r15, $r17, $r9
-+ slts $r15, $r17, $r10
-+ slts $r15, $r17, $r11
-+ slts $r15, $r17, $r16
-+ slts $r15, $r17, $r17
-+ slts $r15, $r17, $r18
-+ slts $r15, $r17, $r19
-+ slts $r15, $r17, $r12
-+ slts $r15, $r17, $r13
-+ slts $r15, $r17, $r14
-+ slts $r15, $r17, $r15
-+ slts $r15, $r17, $r20
-+ slts $r15, $r17, $r21
-+ slts $r15, $r17, $r22
-+ slts $r15, $r17, $r23
-+ slts $r15, $r17, $r24
-+ slts $r15, $r17, $r25
-+ slts $r15, $r17, $r26
-+ slts $r15, $r17, $r27
-+ slts $r15, $r17, $fp
-+ slts $r15, $r17, $gp
-+ slts $r15, $r17, $lp
-+ slts $r15, $r17, $sp
-+ slts $r15, $r18, $r0
-+ slts $r15, $r18, $r1
-+ slts $r15, $r18, $r2
-+ slts $r15, $r18, $r3
-+ slts $r15, $r18, $r4
-+ slts $r15, $r18, $r5
-+ slts $r15, $r18, $r6
-+ slts $r15, $r18, $r7
-+ slts $r15, $r18, $r8
-+ slts $r15, $r18, $r9
-+ slts $r15, $r18, $r10
-+ slts $r15, $r18, $r11
-+ slts $r15, $r18, $r16
-+ slts $r15, $r18, $r17
-+ slts $r15, $r18, $r18
-+ slts $r15, $r18, $r19
-+ slts $r15, $r18, $r12
-+ slts $r15, $r18, $r13
-+ slts $r15, $r18, $r14
-+ slts $r15, $r18, $r15
-+ slts $r15, $r18, $r20
-+ slts $r15, $r18, $r21
-+ slts $r15, $r18, $r22
-+ slts $r15, $r18, $r23
-+ slts $r15, $r18, $r24
-+ slts $r15, $r18, $r25
-+ slts $r15, $r18, $r26
-+ slts $r15, $r18, $r27
-+ slts $r15, $r18, $fp
-+ slts $r15, $r18, $gp
-+ slts $r15, $r18, $lp
-+ slts $r15, $r18, $sp
-+ slts $r15, $r19, $r0
-+ slts $r15, $r19, $r1
-+ slts $r15, $r19, $r2
-+ slts $r15, $r19, $r3
-+ slts $r15, $r19, $r4
-+ slts $r15, $r19, $r5
-+ slts $r15, $r19, $r6
-+ slts $r15, $r19, $r7
-+ slts $r15, $r19, $r8
-+ slts $r15, $r19, $r9
-+ slts $r15, $r19, $r10
-+ slts $r15, $r19, $r11
-+ slts $r15, $r19, $r16
-+ slts $r15, $r19, $r17
-+ slts $r15, $r19, $r18
-+ slts $r15, $r19, $r19
-+ slts $r15, $r19, $r12
-+ slts $r15, $r19, $r13
-+ slts $r15, $r19, $r14
-+ slts $r15, $r19, $r15
-+ slts $r15, $r19, $r20
-+ slts $r15, $r19, $r21
-+ slts $r15, $r19, $r22
-+ slts $r15, $r19, $r23
-+ slts $r15, $r19, $r24
-+ slts $r15, $r19, $r25
-+ slts $r15, $r19, $r26
-+ slts $r15, $r19, $r27
-+ slts $r15, $r19, $fp
-+ slts $r15, $r19, $gp
-+ slts $r15, $r19, $lp
-+ slts $r15, $r19, $sp
-+ slt $r15, $r0, $r0
-+ slt $r15, $r0, $r1
-+ slt $r15, $r0, $r2
-+ slt $r15, $r0, $r3
-+ slt $r15, $r0, $r4
-+ slt $r15, $r0, $r5
-+ slt $r15, $r0, $r6
-+ slt $r15, $r0, $r7
-+ slt $r15, $r0, $r8
-+ slt $r15, $r0, $r9
-+ slt $r15, $r0, $r10
-+ slt $r15, $r0, $r11
-+ slt $r15, $r0, $r16
-+ slt $r15, $r0, $r17
-+ slt $r15, $r0, $r18
-+ slt $r15, $r0, $r19
-+ slt $r15, $r0, $r12
-+ slt $r15, $r0, $r13
-+ slt $r15, $r0, $r14
-+ slt $r15, $r0, $r15
-+ slt $r15, $r0, $r20
-+ slt $r15, $r0, $r21
-+ slt $r15, $r0, $r22
-+ slt $r15, $r0, $r23
-+ slt $r15, $r0, $r24
-+ slt $r15, $r0, $r25
-+ slt $r15, $r0, $r26
-+ slt $r15, $r0, $r27
-+ slt $r15, $r0, $fp
-+ slt $r15, $r0, $gp
-+ slt $r15, $r0, $lp
-+ slt $r15, $r0, $sp
-+ slt $r15, $r1, $r0
-+ slt $r15, $r1, $r1
-+ slt $r15, $r1, $r2
-+ slt $r15, $r1, $r3
-+ slt $r15, $r1, $r4
-+ slt $r15, $r1, $r5
-+ slt $r15, $r1, $r6
-+ slt $r15, $r1, $r7
-+ slt $r15, $r1, $r8
-+ slt $r15, $r1, $r9
-+ slt $r15, $r1, $r10
-+ slt $r15, $r1, $r11
-+ slt $r15, $r1, $r16
-+ slt $r15, $r1, $r17
-+ slt $r15, $r1, $r18
-+ slt $r15, $r1, $r19
-+ slt $r15, $r1, $r12
-+ slt $r15, $r1, $r13
-+ slt $r15, $r1, $r14
-+ slt $r15, $r1, $r15
-+ slt $r15, $r1, $r20
-+ slt $r15, $r1, $r21
-+ slt $r15, $r1, $r22
-+ slt $r15, $r1, $r23
-+ slt $r15, $r1, $r24
-+ slt $r15, $r1, $r25
-+ slt $r15, $r1, $r26
-+ slt $r15, $r1, $r27
-+ slt $r15, $r1, $fp
-+ slt $r15, $r1, $gp
-+ slt $r15, $r1, $lp
-+ slt $r15, $r1, $sp
-+ slt $r15, $r2, $r0
-+ slt $r15, $r2, $r1
-+ slt $r15, $r2, $r2
-+ slt $r15, $r2, $r3
-+ slt $r15, $r2, $r4
-+ slt $r15, $r2, $r5
-+ slt $r15, $r2, $r6
-+ slt $r15, $r2, $r7
-+ slt $r15, $r2, $r8
-+ slt $r15, $r2, $r9
-+ slt $r15, $r2, $r10
-+ slt $r15, $r2, $r11
-+ slt $r15, $r2, $r16
-+ slt $r15, $r2, $r17
-+ slt $r15, $r2, $r18
-+ slt $r15, $r2, $r19
-+ slt $r15, $r2, $r12
-+ slt $r15, $r2, $r13
-+ slt $r15, $r2, $r14
-+ slt $r15, $r2, $r15
-+ slt $r15, $r2, $r20
-+ slt $r15, $r2, $r21
-+ slt $r15, $r2, $r22
-+ slt $r15, $r2, $r23
-+ slt $r15, $r2, $r24
-+ slt $r15, $r2, $r25
-+ slt $r15, $r2, $r26
-+ slt $r15, $r2, $r27
-+ slt $r15, $r2, $fp
-+ slt $r15, $r2, $gp
-+ slt $r15, $r2, $lp
-+ slt $r15, $r2, $sp
-+ slt $r15, $r3, $r0
-+ slt $r15, $r3, $r1
-+ slt $r15, $r3, $r2
-+ slt $r15, $r3, $r3
-+ slt $r15, $r3, $r4
-+ slt $r15, $r3, $r5
-+ slt $r15, $r3, $r6
-+ slt $r15, $r3, $r7
-+ slt $r15, $r3, $r8
-+ slt $r15, $r3, $r9
-+ slt $r15, $r3, $r10
-+ slt $r15, $r3, $r11
-+ slt $r15, $r3, $r16
-+ slt $r15, $r3, $r17
-+ slt $r15, $r3, $r18
-+ slt $r15, $r3, $r19
-+ slt $r15, $r3, $r12
-+ slt $r15, $r3, $r13
-+ slt $r15, $r3, $r14
-+ slt $r15, $r3, $r15
-+ slt $r15, $r3, $r20
-+ slt $r15, $r3, $r21
-+ slt $r15, $r3, $r22
-+ slt $r15, $r3, $r23
-+ slt $r15, $r3, $r24
-+ slt $r15, $r3, $r25
-+ slt $r15, $r3, $r26
-+ slt $r15, $r3, $r27
-+ slt $r15, $r3, $fp
-+ slt $r15, $r3, $gp
-+ slt $r15, $r3, $lp
-+ slt $r15, $r3, $sp
-+ slt $r15, $r4, $r0
-+ slt $r15, $r4, $r1
-+ slt $r15, $r4, $r2
-+ slt $r15, $r4, $r3
-+ slt $r15, $r4, $r4
-+ slt $r15, $r4, $r5
-+ slt $r15, $r4, $r6
-+ slt $r15, $r4, $r7
-+ slt $r15, $r4, $r8
-+ slt $r15, $r4, $r9
-+ slt $r15, $r4, $r10
-+ slt $r15, $r4, $r11
-+ slt $r15, $r4, $r16
-+ slt $r15, $r4, $r17
-+ slt $r15, $r4, $r18
-+ slt $r15, $r4, $r19
-+ slt $r15, $r4, $r12
-+ slt $r15, $r4, $r13
-+ slt $r15, $r4, $r14
-+ slt $r15, $r4, $r15
-+ slt $r15, $r4, $r20
-+ slt $r15, $r4, $r21
-+ slt $r15, $r4, $r22
-+ slt $r15, $r4, $r23
-+ slt $r15, $r4, $r24
-+ slt $r15, $r4, $r25
-+ slt $r15, $r4, $r26
-+ slt $r15, $r4, $r27
-+ slt $r15, $r4, $fp
-+ slt $r15, $r4, $gp
-+ slt $r15, $r4, $lp
-+ slt $r15, $r4, $sp
-+ slt $r15, $r5, $r0
-+ slt $r15, $r5, $r1
-+ slt $r15, $r5, $r2
-+ slt $r15, $r5, $r3
-+ slt $r15, $r5, $r4
-+ slt $r15, $r5, $r5
-+ slt $r15, $r5, $r6
-+ slt $r15, $r5, $r7
-+ slt $r15, $r5, $r8
-+ slt $r15, $r5, $r9
-+ slt $r15, $r5, $r10
-+ slt $r15, $r5, $r11
-+ slt $r15, $r5, $r16
-+ slt $r15, $r5, $r17
-+ slt $r15, $r5, $r18
-+ slt $r15, $r5, $r19
-+ slt $r15, $r5, $r12
-+ slt $r15, $r5, $r13
-+ slt $r15, $r5, $r14
-+ slt $r15, $r5, $r15
-+ slt $r15, $r5, $r20
-+ slt $r15, $r5, $r21
-+ slt $r15, $r5, $r22
-+ slt $r15, $r5, $r23
-+ slt $r15, $r5, $r24
-+ slt $r15, $r5, $r25
-+ slt $r15, $r5, $r26
-+ slt $r15, $r5, $r27
-+ slt $r15, $r5, $fp
-+ slt $r15, $r5, $gp
-+ slt $r15, $r5, $lp
-+ slt $r15, $r5, $sp
-+ slt $r15, $r6, $r0
-+ slt $r15, $r6, $r1
-+ slt $r15, $r6, $r2
-+ slt $r15, $r6, $r3
-+ slt $r15, $r6, $r4
-+ slt $r15, $r6, $r5
-+ slt $r15, $r6, $r6
-+ slt $r15, $r6, $r7
-+ slt $r15, $r6, $r8
-+ slt $r15, $r6, $r9
-+ slt $r15, $r6, $r10
-+ slt $r15, $r6, $r11
-+ slt $r15, $r6, $r16
-+ slt $r15, $r6, $r17
-+ slt $r15, $r6, $r18
-+ slt $r15, $r6, $r19
-+ slt $r15, $r6, $r12
-+ slt $r15, $r6, $r13
-+ slt $r15, $r6, $r14
-+ slt $r15, $r6, $r15
-+ slt $r15, $r6, $r20
-+ slt $r15, $r6, $r21
-+ slt $r15, $r6, $r22
-+ slt $r15, $r6, $r23
-+ slt $r15, $r6, $r24
-+ slt $r15, $r6, $r25
-+ slt $r15, $r6, $r26
-+ slt $r15, $r6, $r27
-+ slt $r15, $r6, $fp
-+ slt $r15, $r6, $gp
-+ slt $r15, $r6, $lp
-+ slt $r15, $r6, $sp
-+ slt $r15, $r7, $r0
-+ slt $r15, $r7, $r1
-+ slt $r15, $r7, $r2
-+ slt $r15, $r7, $r3
-+ slt $r15, $r7, $r4
-+ slt $r15, $r7, $r5
-+ slt $r15, $r7, $r6
-+ slt $r15, $r7, $r7
-+ slt $r15, $r7, $r8
-+ slt $r15, $r7, $r9
-+ slt $r15, $r7, $r10
-+ slt $r15, $r7, $r11
-+ slt $r15, $r7, $r16
-+ slt $r15, $r7, $r17
-+ slt $r15, $r7, $r18
-+ slt $r15, $r7, $r19
-+ slt $r15, $r7, $r12
-+ slt $r15, $r7, $r13
-+ slt $r15, $r7, $r14
-+ slt $r15, $r7, $r15
-+ slt $r15, $r7, $r20
-+ slt $r15, $r7, $r21
-+ slt $r15, $r7, $r22
-+ slt $r15, $r7, $r23
-+ slt $r15, $r7, $r24
-+ slt $r15, $r7, $r25
-+ slt $r15, $r7, $r26
-+ slt $r15, $r7, $r27
-+ slt $r15, $r7, $fp
-+ slt $r15, $r7, $gp
-+ slt $r15, $r7, $lp
-+ slt $r15, $r7, $sp
-+ slt $r15, $r8, $r0
-+ slt $r15, $r8, $r1
-+ slt $r15, $r8, $r2
-+ slt $r15, $r8, $r3
-+ slt $r15, $r8, $r4
-+ slt $r15, $r8, $r5
-+ slt $r15, $r8, $r6
-+ slt $r15, $r8, $r7
-+ slt $r15, $r8, $r8
-+ slt $r15, $r8, $r9
-+ slt $r15, $r8, $r10
-+ slt $r15, $r8, $r11
-+ slt $r15, $r8, $r16
-+ slt $r15, $r8, $r17
-+ slt $r15, $r8, $r18
-+ slt $r15, $r8, $r19
-+ slt $r15, $r8, $r12
-+ slt $r15, $r8, $r13
-+ slt $r15, $r8, $r14
-+ slt $r15, $r8, $r15
-+ slt $r15, $r8, $r20
-+ slt $r15, $r8, $r21
-+ slt $r15, $r8, $r22
-+ slt $r15, $r8, $r23
-+ slt $r15, $r8, $r24
-+ slt $r15, $r8, $r25
-+ slt $r15, $r8, $r26
-+ slt $r15, $r8, $r27
-+ slt $r15, $r8, $fp
-+ slt $r15, $r8, $gp
-+ slt $r15, $r8, $lp
-+ slt $r15, $r8, $sp
-+ slt $r15, $r9, $r0
-+ slt $r15, $r9, $r1
-+ slt $r15, $r9, $r2
-+ slt $r15, $r9, $r3
-+ slt $r15, $r9, $r4
-+ slt $r15, $r9, $r5
-+ slt $r15, $r9, $r6
-+ slt $r15, $r9, $r7
-+ slt $r15, $r9, $r8
-+ slt $r15, $r9, $r9
-+ slt $r15, $r9, $r10
-+ slt $r15, $r9, $r11
-+ slt $r15, $r9, $r16
-+ slt $r15, $r9, $r17
-+ slt $r15, $r9, $r18
-+ slt $r15, $r9, $r19
-+ slt $r15, $r9, $r12
-+ slt $r15, $r9, $r13
-+ slt $r15, $r9, $r14
-+ slt $r15, $r9, $r15
-+ slt $r15, $r9, $r20
-+ slt $r15, $r9, $r21
-+ slt $r15, $r9, $r22
-+ slt $r15, $r9, $r23
-+ slt $r15, $r9, $r24
-+ slt $r15, $r9, $r25
-+ slt $r15, $r9, $r26
-+ slt $r15, $r9, $r27
-+ slt $r15, $r9, $fp
-+ slt $r15, $r9, $gp
-+ slt $r15, $r9, $lp
-+ slt $r15, $r9, $sp
-+ slt $r15, $r10, $r0
-+ slt $r15, $r10, $r1
-+ slt $r15, $r10, $r2
-+ slt $r15, $r10, $r3
-+ slt $r15, $r10, $r4
-+ slt $r15, $r10, $r5
-+ slt $r15, $r10, $r6
-+ slt $r15, $r10, $r7
-+ slt $r15, $r10, $r8
-+ slt $r15, $r10, $r9
-+ slt $r15, $r10, $r10
-+ slt $r15, $r10, $r11
-+ slt $r15, $r10, $r16
-+ slt $r15, $r10, $r17
-+ slt $r15, $r10, $r18
-+ slt $r15, $r10, $r19
-+ slt $r15, $r10, $r12
-+ slt $r15, $r10, $r13
-+ slt $r15, $r10, $r14
-+ slt $r15, $r10, $r15
-+ slt $r15, $r10, $r20
-+ slt $r15, $r10, $r21
-+ slt $r15, $r10, $r22
-+ slt $r15, $r10, $r23
-+ slt $r15, $r10, $r24
-+ slt $r15, $r10, $r25
-+ slt $r15, $r10, $r26
-+ slt $r15, $r10, $r27
-+ slt $r15, $r10, $fp
-+ slt $r15, $r10, $gp
-+ slt $r15, $r10, $lp
-+ slt $r15, $r10, $sp
-+ slt $r15, $r11, $r0
-+ slt $r15, $r11, $r1
-+ slt $r15, $r11, $r2
-+ slt $r15, $r11, $r3
-+ slt $r15, $r11, $r4
-+ slt $r15, $r11, $r5
-+ slt $r15, $r11, $r6
-+ slt $r15, $r11, $r7
-+ slt $r15, $r11, $r8
-+ slt $r15, $r11, $r9
-+ slt $r15, $r11, $r10
-+ slt $r15, $r11, $r11
-+ slt $r15, $r11, $r16
-+ slt $r15, $r11, $r17
-+ slt $r15, $r11, $r18
-+ slt $r15, $r11, $r19
-+ slt $r15, $r11, $r12
-+ slt $r15, $r11, $r13
-+ slt $r15, $r11, $r14
-+ slt $r15, $r11, $r15
-+ slt $r15, $r11, $r20
-+ slt $r15, $r11, $r21
-+ slt $r15, $r11, $r22
-+ slt $r15, $r11, $r23
-+ slt $r15, $r11, $r24
-+ slt $r15, $r11, $r25
-+ slt $r15, $r11, $r26
-+ slt $r15, $r11, $r27
-+ slt $r15, $r11, $fp
-+ slt $r15, $r11, $gp
-+ slt $r15, $r11, $lp
-+ slt $r15, $r11, $sp
-+ slt $r15, $r16, $r0
-+ slt $r15, $r16, $r1
-+ slt $r15, $r16, $r2
-+ slt $r15, $r16, $r3
-+ slt $r15, $r16, $r4
-+ slt $r15, $r16, $r5
-+ slt $r15, $r16, $r6
-+ slt $r15, $r16, $r7
-+ slt $r15, $r16, $r8
-+ slt $r15, $r16, $r9
-+ slt $r15, $r16, $r10
-+ slt $r15, $r16, $r11
-+ slt $r15, $r16, $r16
-+ slt $r15, $r16, $r17
-+ slt $r15, $r16, $r18
-+ slt $r15, $r16, $r19
-+ slt $r15, $r16, $r12
-+ slt $r15, $r16, $r13
-+ slt $r15, $r16, $r14
-+ slt $r15, $r16, $r15
-+ slt $r15, $r16, $r20
-+ slt $r15, $r16, $r21
-+ slt $r15, $r16, $r22
-+ slt $r15, $r16, $r23
-+ slt $r15, $r16, $r24
-+ slt $r15, $r16, $r25
-+ slt $r15, $r16, $r26
-+ slt $r15, $r16, $r27
-+ slt $r15, $r16, $fp
-+ slt $r15, $r16, $gp
-+ slt $r15, $r16, $lp
-+ slt $r15, $r16, $sp
-+ slt $r15, $r17, $r0
-+ slt $r15, $r17, $r1
-+ slt $r15, $r17, $r2
-+ slt $r15, $r17, $r3
-+ slt $r15, $r17, $r4
-+ slt $r15, $r17, $r5
-+ slt $r15, $r17, $r6
-+ slt $r15, $r17, $r7
-+ slt $r15, $r17, $r8
-+ slt $r15, $r17, $r9
-+ slt $r15, $r17, $r10
-+ slt $r15, $r17, $r11
-+ slt $r15, $r17, $r16
-+ slt $r15, $r17, $r17
-+ slt $r15, $r17, $r18
-+ slt $r15, $r17, $r19
-+ slt $r15, $r17, $r12
-+ slt $r15, $r17, $r13
-+ slt $r15, $r17, $r14
-+ slt $r15, $r17, $r15
-+ slt $r15, $r17, $r20
-+ slt $r15, $r17, $r21
-+ slt $r15, $r17, $r22
-+ slt $r15, $r17, $r23
-+ slt $r15, $r17, $r24
-+ slt $r15, $r17, $r25
-+ slt $r15, $r17, $r26
-+ slt $r15, $r17, $r27
-+ slt $r15, $r17, $fp
-+ slt $r15, $r17, $gp
-+ slt $r15, $r17, $lp
-+ slt $r15, $r17, $sp
-+ slt $r15, $r18, $r0
-+ slt $r15, $r18, $r1
-+ slt $r15, $r18, $r2
-+ slt $r15, $r18, $r3
-+ slt $r15, $r18, $r4
-+ slt $r15, $r18, $r5
-+ slt $r15, $r18, $r6
-+ slt $r15, $r18, $r7
-+ slt $r15, $r18, $r8
-+ slt $r15, $r18, $r9
-+ slt $r15, $r18, $r10
-+ slt $r15, $r18, $r11
-+ slt $r15, $r18, $r16
-+ slt $r15, $r18, $r17
-+ slt $r15, $r18, $r18
-+ slt $r15, $r18, $r19
-+ slt $r15, $r18, $r12
-+ slt $r15, $r18, $r13
-+ slt $r15, $r18, $r14
-+ slt $r15, $r18, $r15
-+ slt $r15, $r18, $r20
-+ slt $r15, $r18, $r21
-+ slt $r15, $r18, $r22
-+ slt $r15, $r18, $r23
-+ slt $r15, $r18, $r24
-+ slt $r15, $r18, $r25
-+ slt $r15, $r18, $r26
-+ slt $r15, $r18, $r27
-+ slt $r15, $r18, $fp
-+ slt $r15, $r18, $gp
-+ slt $r15, $r18, $lp
-+ slt $r15, $r18, $sp
-+ slt $r15, $r19, $r0
-+ slt $r15, $r19, $r1
-+ slt $r15, $r19, $r2
-+ slt $r15, $r19, $r3
-+ slt $r15, $r19, $r4
-+ slt $r15, $r19, $r5
-+ slt $r15, $r19, $r6
-+ slt $r15, $r19, $r7
-+ slt $r15, $r19, $r8
-+ slt $r15, $r19, $r9
-+ slt $r15, $r19, $r10
-+ slt $r15, $r19, $r11
-+ slt $r15, $r19, $r16
-+ slt $r15, $r19, $r17
-+ slt $r15, $r19, $r18
-+ slt $r15, $r19, $r19
-+ slt $r15, $r19, $r12
-+ slt $r15, $r19, $r13
-+ slt $r15, $r19, $r14
-+ slt $r15, $r19, $r15
-+ slt $r15, $r19, $r20
-+ slt $r15, $r19, $r21
-+ slt $r15, $r19, $r22
-+ slt $r15, $r19, $r23
-+ slt $r15, $r19, $r24
-+ slt $r15, $r19, $r25
-+ slt $r15, $r19, $r26
-+ slt $r15, $r19, $r27
-+ slt $r15, $r19, $fp
-+ slt $r15, $r19, $gp
-+ slt $r15, $r19, $lp
-+ slt $r15, $r19, $sp
-+ sltsi $r15, $r0, 0
-+ sltsi $r15, $r0, 1
-+ sltsi $r15, $r0, 2
-+ sltsi $r15, $r0, 3
-+ sltsi $r15, $r0, 4
-+ sltsi $r15, $r0, 5
-+ sltsi $r15, $r0, 6
-+ sltsi $r15, $r0, 7
-+ sltsi $r15, $r0, 8
-+ sltsi $r15, $r0, 9
-+ sltsi $r15, $r0, 10
-+ sltsi $r15, $r0, 11
-+ sltsi $r15, $r0, 12
-+ sltsi $r15, $r0, 13
-+ sltsi $r15, $r0, 14
-+ sltsi $r15, $r0, 15
-+ sltsi $r15, $r0, 16
-+ sltsi $r15, $r0, 17
-+ sltsi $r15, $r0, 18
-+ sltsi $r15, $r0, 19
-+ sltsi $r15, $r0, 20
-+ sltsi $r15, $r0, 21
-+ sltsi $r15, $r0, 22
-+ sltsi $r15, $r0, 23
-+ sltsi $r15, $r0, 24
-+ sltsi $r15, $r0, 25
-+ sltsi $r15, $r0, 26
-+ sltsi $r15, $r0, 27
-+ sltsi $r15, $r0, 28
-+ sltsi $r15, $r0, 29
-+ sltsi $r15, $r0, 30
-+ sltsi $r15, $r0, 31
-+ sltsi $r15, $r1, 0
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-+ sltsi $r15, $r9, 0
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-+ sltsi $r15, $r9, 3
-+ sltsi $r15, $r9, 4
-+ sltsi $r15, $r9, 5
-+ sltsi $r15, $r9, 6
-+ sltsi $r15, $r9, 7
-+ sltsi $r15, $r9, 8
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-+ sltsi $r15, $r10, 5
-+ sltsi $r15, $r10, 6
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-+ sltsi $r15, $r16, 0
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-+ slti $r15, $r0, 30
-+ slti $r15, $r0, 31
-+ slti $r15, $r1, 0
-+ slti $r15, $r1, 1
-+ slti $r15, $r1, 2
-+ slti $r15, $r1, 3
-+ slti $r15, $r1, 4
-+ slti $r15, $r1, 5
-+ slti $r15, $r1, 6
-+ slti $r15, $r1, 7
-+ slti $r15, $r1, 8
-+ slti $r15, $r1, 9
-+ slti $r15, $r1, 10
-+ slti $r15, $r1, 11
-+ slti $r15, $r1, 12
-+ slti $r15, $r1, 13
-+ slti $r15, $r1, 14
-+ slti $r15, $r1, 15
-+ slti $r15, $r1, 16
-+ slti $r15, $r1, 17
-+ slti $r15, $r1, 18
-+ slti $r15, $r1, 19
-+ slti $r15, $r1, 20
-+ slti $r15, $r1, 21
-+ slti $r15, $r1, 22
-+ slti $r15, $r1, 23
-+ slti $r15, $r1, 24
-+ slti $r15, $r1, 25
-+ slti $r15, $r1, 26
-+ slti $r15, $r1, 27
-+ slti $r15, $r1, 28
-+ slti $r15, $r1, 29
-+ slti $r15, $r1, 30
-+ slti $r15, $r1, 31
-+ slti $r15, $r2, 0
-+ slti $r15, $r2, 1
-+ slti $r15, $r2, 2
-+ slti $r15, $r2, 3
-+ slti $r15, $r2, 4
-+ slti $r15, $r2, 5
-+ slti $r15, $r2, 6
-+ slti $r15, $r2, 7
-+ slti $r15, $r2, 8
-+ slti $r15, $r2, 9
-+ slti $r15, $r2, 10
-+ slti $r15, $r2, 11
-+ slti $r15, $r2, 12
-+ slti $r15, $r2, 13
-+ slti $r15, $r2, 14
-+ slti $r15, $r2, 15
-+ slti $r15, $r2, 16
-+ slti $r15, $r2, 17
-+ slti $r15, $r2, 18
-+ slti $r15, $r2, 19
-+ slti $r15, $r2, 20
-+ slti $r15, $r2, 21
-+ slti $r15, $r2, 22
-+ slti $r15, $r2, 23
-+ slti $r15, $r2, 24
-+ slti $r15, $r2, 25
-+ slti $r15, $r2, 26
-+ slti $r15, $r2, 27
-+ slti $r15, $r2, 28
-+ slti $r15, $r2, 29
-+ slti $r15, $r2, 30
-+ slti $r15, $r2, 31
-+ slti $r15, $r3, 0
-+ slti $r15, $r3, 1
-+ slti $r15, $r3, 2
-+ slti $r15, $r3, 3
-+ slti $r15, $r3, 4
-+ slti $r15, $r3, 5
-+ slti $r15, $r3, 6
-+ slti $r15, $r3, 7
-+ slti $r15, $r3, 8
-+ slti $r15, $r3, 9
-+ slti $r15, $r3, 10
-+ slti $r15, $r3, 11
-+ slti $r15, $r3, 12
-+ slti $r15, $r3, 13
-+ slti $r15, $r3, 14
-+ slti $r15, $r3, 15
-+ slti $r15, $r3, 16
-+ slti $r15, $r3, 17
-+ slti $r15, $r3, 18
-+ slti $r15, $r3, 19
-+ slti $r15, $r3, 20
-+ slti $r15, $r3, 21
-+ slti $r15, $r3, 22
-+ slti $r15, $r3, 23
-+ slti $r15, $r3, 24
-+ slti $r15, $r3, 25
-+ slti $r15, $r3, 26
-+ slti $r15, $r3, 27
-+ slti $r15, $r3, 28
-+ slti $r15, $r3, 29
-+ slti $r15, $r3, 30
-+ slti $r15, $r3, 31
-+ slti $r15, $r4, 0
-+ slti $r15, $r4, 1
-+ slti $r15, $r4, 2
-+ slti $r15, $r4, 3
-+ slti $r15, $r4, 4
-+ slti $r15, $r4, 5
-+ slti $r15, $r4, 6
-+ slti $r15, $r4, 7
-+ slti $r15, $r4, 8
-+ slti $r15, $r4, 9
-+ slti $r15, $r4, 10
-+ slti $r15, $r4, 11
-+ slti $r15, $r4, 12
-+ slti $r15, $r4, 13
-+ slti $r15, $r4, 14
-+ slti $r15, $r4, 15
-+ slti $r15, $r4, 16
-+ slti $r15, $r4, 17
-+ slti $r15, $r4, 18
-+ slti $r15, $r4, 19
-+ slti $r15, $r4, 20
-+ slti $r15, $r4, 21
-+ slti $r15, $r4, 22
-+ slti $r15, $r4, 23
-+ slti $r15, $r4, 24
-+ slti $r15, $r4, 25
-+ slti $r15, $r4, 26
-+ slti $r15, $r4, 27
-+ slti $r15, $r4, 28
-+ slti $r15, $r4, 29
-+ slti $r15, $r4, 30
-+ slti $r15, $r4, 31
-+ slti $r15, $r5, 0
-+ slti $r15, $r5, 1
-+ slti $r15, $r5, 2
-+ slti $r15, $r5, 3
-+ slti $r15, $r5, 4
-+ slti $r15, $r5, 5
-+ slti $r15, $r5, 6
-+ slti $r15, $r5, 7
-+ slti $r15, $r5, 8
-+ slti $r15, $r5, 9
-+ slti $r15, $r5, 10
-+ slti $r15, $r5, 11
-+ slti $r15, $r5, 12
-+ slti $r15, $r5, 13
-+ slti $r15, $r5, 14
-+ slti $r15, $r5, 15
-+ slti $r15, $r5, 16
-+ slti $r15, $r5, 17
-+ slti $r15, $r5, 18
-+ slti $r15, $r5, 19
-+ slti $r15, $r5, 20
-+ slti $r15, $r5, 21
-+ slti $r15, $r5, 22
-+ slti $r15, $r5, 23
-+ slti $r15, $r5, 24
-+ slti $r15, $r5, 25
-+ slti $r15, $r5, 26
-+ slti $r15, $r5, 27
-+ slti $r15, $r5, 28
-+ slti $r15, $r5, 29
-+ slti $r15, $r5, 30
-+ slti $r15, $r5, 31
-+ slti $r15, $r6, 0
-+ slti $r15, $r6, 1
-+ slti $r15, $r6, 2
-+ slti $r15, $r6, 3
-+ slti $r15, $r6, 4
-+ slti $r15, $r6, 5
-+ slti $r15, $r6, 6
-+ slti $r15, $r6, 7
-+ slti $r15, $r6, 8
-+ slti $r15, $r6, 9
-+ slti $r15, $r6, 10
-+ slti $r15, $r6, 11
-+ slti $r15, $r6, 12
-+ slti $r15, $r6, 13
-+ slti $r15, $r6, 14
-+ slti $r15, $r6, 15
-+ slti $r15, $r6, 16
-+ slti $r15, $r6, 17
-+ slti $r15, $r6, 18
-+ slti $r15, $r6, 19
-+ slti $r15, $r6, 20
-+ slti $r15, $r6, 21
-+ slti $r15, $r6, 22
-+ slti $r15, $r6, 23
-+ slti $r15, $r6, 24
-+ slti $r15, $r6, 25
-+ slti $r15, $r6, 26
-+ slti $r15, $r6, 27
-+ slti $r15, $r6, 28
-+ slti $r15, $r6, 29
-+ slti $r15, $r6, 30
-+ slti $r15, $r6, 31
-+ slti $r15, $r7, 0
-+ slti $r15, $r7, 1
-+ slti $r15, $r7, 2
-+ slti $r15, $r7, 3
-+ slti $r15, $r7, 4
-+ slti $r15, $r7, 5
-+ slti $r15, $r7, 6
-+ slti $r15, $r7, 7
-+ slti $r15, $r7, 8
-+ slti $r15, $r7, 9
-+ slti $r15, $r7, 10
-+ slti $r15, $r7, 11
-+ slti $r15, $r7, 12
-+ slti $r15, $r7, 13
-+ slti $r15, $r7, 14
-+ slti $r15, $r7, 15
-+ slti $r15, $r7, 16
-+ slti $r15, $r7, 17
-+ slti $r15, $r7, 18
-+ slti $r15, $r7, 19
-+ slti $r15, $r7, 20
-+ slti $r15, $r7, 21
-+ slti $r15, $r7, 22
-+ slti $r15, $r7, 23
-+ slti $r15, $r7, 24
-+ slti $r15, $r7, 25
-+ slti $r15, $r7, 26
-+ slti $r15, $r7, 27
-+ slti $r15, $r7, 28
-+ slti $r15, $r7, 29
-+ slti $r15, $r7, 30
-+ slti $r15, $r7, 31
-+ slti $r15, $r8, 0
-+ slti $r15, $r8, 1
-+ slti $r15, $r8, 2
-+ slti $r15, $r8, 3
-+ slti $r15, $r8, 4
-+ slti $r15, $r8, 5
-+ slti $r15, $r8, 6
-+ slti $r15, $r8, 7
-+ slti $r15, $r8, 8
-+ slti $r15, $r8, 9
-+ slti $r15, $r8, 10
-+ slti $r15, $r8, 11
-+ slti $r15, $r8, 12
-+ slti $r15, $r8, 13
-+ slti $r15, $r8, 14
-+ slti $r15, $r8, 15
-+ slti $r15, $r8, 16
-+ slti $r15, $r8, 17
-+ slti $r15, $r8, 18
-+ slti $r15, $r8, 19
-+ slti $r15, $r8, 20
-+ slti $r15, $r8, 21
-+ slti $r15, $r8, 22
-+ slti $r15, $r8, 23
-+ slti $r15, $r8, 24
-+ slti $r15, $r8, 25
-+ slti $r15, $r8, 26
-+ slti $r15, $r8, 27
-+ slti $r15, $r8, 28
-+ slti $r15, $r8, 29
-+ slti $r15, $r8, 30
-+ slti $r15, $r8, 31
-+ slti $r15, $r9, 0
-+ slti $r15, $r9, 1
-+ slti $r15, $r9, 2
-+ slti $r15, $r9, 3
-+ slti $r15, $r9, 4
-+ slti $r15, $r9, 5
-+ slti $r15, $r9, 6
-+ slti $r15, $r9, 7
-+ slti $r15, $r9, 8
-+ slti $r15, $r9, 9
-+ slti $r15, $r9, 10
-+ slti $r15, $r9, 11
-+ slti $r15, $r9, 12
-+ slti $r15, $r9, 13
-+ slti $r15, $r9, 14
-+ slti $r15, $r9, 15
-+ slti $r15, $r9, 16
-+ slti $r15, $r9, 17
-+ slti $r15, $r9, 18
-+ slti $r15, $r9, 19
-+ slti $r15, $r9, 20
-+ slti $r15, $r9, 21
-+ slti $r15, $r9, 22
-+ slti $r15, $r9, 23
-+ slti $r15, $r9, 24
-+ slti $r15, $r9, 25
-+ slti $r15, $r9, 26
-+ slti $r15, $r9, 27
-+ slti $r15, $r9, 28
-+ slti $r15, $r9, 29
-+ slti $r15, $r9, 30
-+ slti $r15, $r9, 31
-+ slti $r15, $r10, 0
-+ slti $r15, $r10, 1
-+ slti $r15, $r10, 2
-+ slti $r15, $r10, 3
-+ slti $r15, $r10, 4
-+ slti $r15, $r10, 5
-+ slti $r15, $r10, 6
-+ slti $r15, $r10, 7
-+ slti $r15, $r10, 8
-+ slti $r15, $r10, 9
-+ slti $r15, $r10, 10
-+ slti $r15, $r10, 11
-+ slti $r15, $r10, 12
-+ slti $r15, $r10, 13
-+ slti $r15, $r10, 14
-+ slti $r15, $r10, 15
-+ slti $r15, $r10, 16
-+ slti $r15, $r10, 17
-+ slti $r15, $r10, 18
-+ slti $r15, $r10, 19
-+ slti $r15, $r10, 20
-+ slti $r15, $r10, 21
-+ slti $r15, $r10, 22
-+ slti $r15, $r10, 23
-+ slti $r15, $r10, 24
-+ slti $r15, $r10, 25
-+ slti $r15, $r10, 26
-+ slti $r15, $r10, 27
-+ slti $r15, $r10, 28
-+ slti $r15, $r10, 29
-+ slti $r15, $r10, 30
-+ slti $r15, $r10, 31
-+ slti $r15, $r11, 0
-+ slti $r15, $r11, 1
-+ slti $r15, $r11, 2
-+ slti $r15, $r11, 3
-+ slti $r15, $r11, 4
-+ slti $r15, $r11, 5
-+ slti $r15, $r11, 6
-+ slti $r15, $r11, 7
-+ slti $r15, $r11, 8
-+ slti $r15, $r11, 9
-+ slti $r15, $r11, 10
-+ slti $r15, $r11, 11
-+ slti $r15, $r11, 12
-+ slti $r15, $r11, 13
-+ slti $r15, $r11, 14
-+ slti $r15, $r11, 15
-+ slti $r15, $r11, 16
-+ slti $r15, $r11, 17
-+ slti $r15, $r11, 18
-+ slti $r15, $r11, 19
-+ slti $r15, $r11, 20
-+ slti $r15, $r11, 21
-+ slti $r15, $r11, 22
-+ slti $r15, $r11, 23
-+ slti $r15, $r11, 24
-+ slti $r15, $r11, 25
-+ slti $r15, $r11, 26
-+ slti $r15, $r11, 27
-+ slti $r15, $r11, 28
-+ slti $r15, $r11, 29
-+ slti $r15, $r11, 30
-+ slti $r15, $r11, 31
-+ slti $r15, $r16, 0
-+ slti $r15, $r16, 1
-+ slti $r15, $r16, 2
-+ slti $r15, $r16, 3
-+ slti $r15, $r16, 4
-+ slti $r15, $r16, 5
-+ slti $r15, $r16, 6
-+ slti $r15, $r16, 7
-+ slti $r15, $r16, 8
-+ slti $r15, $r16, 9
-+ slti $r15, $r16, 10
-+ slti $r15, $r16, 11
-+ slti $r15, $r16, 12
-+ slti $r15, $r16, 13
-+ slti $r15, $r16, 14
-+ slti $r15, $r16, 15
-+ slti $r15, $r16, 16
-+ slti $r15, $r16, 17
-+ slti $r15, $r16, 18
-+ slti $r15, $r16, 19
-+ slti $r15, $r16, 20
-+ slti $r15, $r16, 21
-+ slti $r15, $r16, 22
-+ slti $r15, $r16, 23
-+ slti $r15, $r16, 24
-+ slti $r15, $r16, 25
-+ slti $r15, $r16, 26
-+ slti $r15, $r16, 27
-+ slti $r15, $r16, 28
-+ slti $r15, $r16, 29
-+ slti $r15, $r16, 30
-+ slti $r15, $r16, 31
-+ slti $r15, $r17, 0
-+ slti $r15, $r17, 1
-+ slti $r15, $r17, 2
-+ slti $r15, $r17, 3
-+ slti $r15, $r17, 4
-+ slti $r15, $r17, 5
-+ slti $r15, $r17, 6
-+ slti $r15, $r17, 7
-+ slti $r15, $r17, 8
-+ slti $r15, $r17, 9
-+ slti $r15, $r17, 10
-+ slti $r15, $r17, 11
-+ slti $r15, $r17, 12
-+ slti $r15, $r17, 13
-+ slti $r15, $r17, 14
-+ slti $r15, $r17, 15
-+ slti $r15, $r17, 16
-+ slti $r15, $r17, 17
-+ slti $r15, $r17, 18
-+ slti $r15, $r17, 19
-+ slti $r15, $r17, 20
-+ slti $r15, $r17, 21
-+ slti $r15, $r17, 22
-+ slti $r15, $r17, 23
-+ slti $r15, $r17, 24
-+ slti $r15, $r17, 25
-+ slti $r15, $r17, 26
-+ slti $r15, $r17, 27
-+ slti $r15, $r17, 28
-+ slti $r15, $r17, 29
-+ slti $r15, $r17, 30
-+ slti $r15, $r17, 31
-+ slti $r15, $r18, 0
-+ slti $r15, $r18, 1
-+ slti $r15, $r18, 2
-+ slti $r15, $r18, 3
-+ slti $r15, $r18, 4
-+ slti $r15, $r18, 5
-+ slti $r15, $r18, 6
-+ slti $r15, $r18, 7
-+ slti $r15, $r18, 8
-+ slti $r15, $r18, 9
-+ slti $r15, $r18, 10
-+ slti $r15, $r18, 11
-+ slti $r15, $r18, 12
-+ slti $r15, $r18, 13
-+ slti $r15, $r18, 14
-+ slti $r15, $r18, 15
-+ slti $r15, $r18, 16
-+ slti $r15, $r18, 17
-+ slti $r15, $r18, 18
-+ slti $r15, $r18, 19
-+ slti $r15, $r18, 20
-+ slti $r15, $r18, 21
-+ slti $r15, $r18, 22
-+ slti $r15, $r18, 23
-+ slti $r15, $r18, 24
-+ slti $r15, $r18, 25
-+ slti $r15, $r18, 26
-+ slti $r15, $r18, 27
-+ slti $r15, $r18, 28
-+ slti $r15, $r18, 29
-+ slti $r15, $r18, 30
-+ slti $r15, $r18, 31
-+ slti $r15, $r19, 0
-+ slti $r15, $r19, 1
-+ slti $r15, $r19, 2
-+ slti $r15, $r19, 3
-+ slti $r15, $r19, 4
-+ slti $r15, $r19, 5
-+ slti $r15, $r19, 6
-+ slti $r15, $r19, 7
-+ slti $r15, $r19, 8
-+ slti $r15, $r19, 9
-+ slti $r15, $r19, 10
-+ slti $r15, $r19, 11
-+ slti $r15, $r19, 12
-+ slti $r15, $r19, 13
-+ slti $r15, $r19, 14
-+ slti $r15, $r19, 15
-+ slti $r15, $r19, 16
-+ slti $r15, $r19, 17
-+ slti $r15, $r19, 18
-+ slti $r15, $r19, 19
-+ slti $r15, $r19, 20
-+ slti $r15, $r19, 21
-+ slti $r15, $r19, 22
-+ slti $r15, $r19, 23
-+ slti $r15, $r19, 24
-+ slti $r15, $r19, 25
-+ slti $r15, $r19, 26
-+ slti $r15, $r19, 27
-+ slti $r15, $r19, 28
-+ slti $r15, $r19, 29
-+ slti $r15, $r19, 30
-+ slti $r15, $r19, 31
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/16-bit-v2.d binutils-2.24/gas/testsuite/gas/nds32/16-bit-v2.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/16-bit-v2.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/16-bit-v2.d 2016-06-30 21:26:12.745896691 +0200
-@@ -0,0 +1,3081 @@
-+#objdump: -d --prefix-addresses
-+#name: nds32 convert 32 to 16 (v2 instructions)
-+#as: -Os -mno-reduced-regs
-+
-+# Test the convert 32bits to 16bits
-+
-+.*: file format .*
-+
-+
-+Disassembly of section .text:
-+0x00000000 .*
-+0x00000002 .*
-+0x00000004 .*
-+0x00000006 .*
-+0x00000008 .*
-+0x0000000a .*
-+0x0000000c .*
-+0x0000000e .*
-+0x00000010 .*
-+0x00000012 .*
-+0x00000014 .*
-+0x00000016 .*
-+0x00000018 .*
-+0x0000001a .*
-+0x0000001c .*
-+0x0000001e .*
-+0x00000020 .*
-+0x00000022 .*
-+0x00000024 .*
-+0x00000026 .*
-+0x00000028 .*
-+0x0000002a .*
-+0x0000002c .*
-+0x0000002e .*
-+0x00000030 .*
-+0x00000032 .*
-+0x00000034 .*
-+0x00000036 .*
-+0x00000038 .*
-+0x0000003a .*
-+0x0000003c .*
-+0x0000003e .*
-+0x00000040 .*
-+0x00000042 .*
-+0x00000044 .*
-+0x00000046 .*
-+0x00000048 .*
-+0x0000004a .*
-+0x0000004c .*
-+0x0000004e .*
-+0x00000050 .*
-+0x00000052 .*
-+0x00000054 .*
-+0x00000056 .*
-+0x00000058 .*
-+0x0000005a .*
-+0x0000005c .*
-+0x0000005e .*
-+0x00000060 .*
-+0x00000062 .*
-+0x00000064 .*
-+0x00000066 .*
-+0x00000068 .*
-+0x0000006a .*
-+0x0000006c .*
-+0x0000006e .*
-+0x00000070 .*
-+0x00000072 .*
-+0x00000074 .*
-+0x00000076 .*
-+0x00000078 .*
-+0x0000007a .*
-+0x0000007c .*
-+0x0000007e .*
-+0x00000080 .*
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-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/16-bit-v2.s binutils-2.24/gas/testsuite/gas/nds32/16-bit-v2.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/16-bit-v2.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/16-bit-v2.s 2016-06-30 21:26:12.745896691 +0200
-@@ -0,0 +1,3072 @@
-+! v2*
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-+ lwi $r0, [$sp + 0]
-+ lwi $r0, [$sp + 4]
-+ lwi $r0, [$sp + 8]
-+ lwi $r0, [$sp + 12]
-+ lwi $r0, [$sp + 16]
-+ lwi $r0, [$sp + 20]
-+ lwi $r0, [$sp + 24]
-+ lwi $r0, [$sp + 28]
-+ lwi $r0, [$sp + 32]
-+ lwi $r0, [$sp + 36]
-+ lwi $r0, [$sp + 40]
-+ lwi $r0, [$sp + 44]
-+ lwi $r0, [$sp + 48]
-+ lwi $r0, [$sp + 52]
-+ lwi $r0, [$sp + 56]
-+ lwi $r0, [$sp + 60]
-+ lwi $r0, [$sp + 64]
-+ lwi $r0, [$sp + 68]
-+ lwi $r0, [$sp + 72]
-+ lwi $r0, [$sp + 76]
-+ lwi $r0, [$sp + 80]
-+ lwi $r0, [$sp + 84]
-+ lwi $r0, [$sp + 88]
-+ lwi $r0, [$sp + 92]
-+ lwi $r0, [$sp + 96]
-+ lwi $r0, [$sp + 100]
-+ lwi $r0, [$sp + 104]
-+ lwi $r0, [$sp + 108]
-+ lwi $r0, [$sp + 112]
-+ lwi $r0, [$sp + 116]
-+ lwi $r0, [$sp + 120]
-+ lwi $r0, [$sp + 124]
-+ lwi $r0, [$sp + 128]
-+ lwi $r0, [$sp + 132]
-+ lwi $r0, [$sp + 136]
-+ lwi $r0, [$sp + 140]
-+ lwi $r0, [$sp + 144]
-+ lwi $r0, [$sp + 148]
-+ lwi $r0, [$sp + 152]
-+ lwi $r0, [$sp + 156]
-+ lwi $r0, [$sp + 160]
-+ lwi $r0, [$sp + 164]
-+ lwi $r0, [$sp + 168]
-+ lwi $r0, [$sp + 172]
-+ lwi $r0, [$sp + 176]
-+ lwi $r0, [$sp + 180]
-+ lwi $r0, [$sp + 184]
-+ lwi $r0, [$sp + 188]
-+ lwi $r0, [$sp + 192]
-+ lwi $r0, [$sp + 196]
-+ lwi $r0, [$sp + 200]
-+ lwi $r0, [$sp + 204]
-+ lwi $r0, [$sp + 208]
-+ lwi $r0, [$sp + 212]
-+ lwi $r0, [$sp + 216]
-+ lwi $r0, [$sp + 220]
-+ lwi $r0, [$sp + 224]
-+ lwi $r0, [$sp + 228]
-+ lwi $r0, [$sp + 232]
-+ lwi $r0, [$sp + 236]
-+ lwi $r0, [$sp + 240]
-+ lwi $r0, [$sp + 244]
-+ lwi $r0, [$sp + 248]
-+ lwi $r0, [$sp + 252]
-+ lwi $r0, [$sp + 256]
-+ lwi $r0, [$sp + 260]
-+ lwi $r0, [$sp + 264]
-+ lwi $r0, [$sp + 268]
-+ lwi $r0, [$sp + 272]
-+ lwi $r0, [$sp + 276]
-+ lwi $r0, [$sp + 280]
-+ lwi $r0, [$sp + 284]
-+ lwi $r0, [$sp + 288]
-+ lwi $r0, [$sp + 292]
-+ lwi $r0, [$sp + 296]
-+ lwi $r0, [$sp + 300]
-+ lwi $r0, [$sp + 304]
-+ lwi $r0, [$sp + 308]
-+ lwi $r0, [$sp + 312]
-+ lwi $r0, [$sp + 316]
-+ lwi $r0, [$sp + 320]
-+ lwi $r0, [$sp + 324]
-+ lwi $r0, [$sp + 328]
-+ lwi $r0, [$sp + 332]
-+ lwi $r0, [$sp + 336]
-+ lwi $r0, [$sp + 340]
-+ lwi $r0, [$sp + 344]
-+ lwi $r0, [$sp + 348]
-+ lwi $r0, [$sp + 352]
-+ lwi $r0, [$sp + 356]
-+ lwi $r0, [$sp + 360]
-+ lwi $r0, [$sp + 364]
-+ lwi $r0, [$sp + 368]
-+ lwi $r0, [$sp + 372]
-+ lwi $r0, [$sp + 376]
-+ lwi $r0, [$sp + 380]
-+ lwi $r0, [$sp + 384]
-+ lwi $r0, [$sp + 388]
-+ lwi $r0, [$sp + 392]
-+ lwi $r0, [$sp + 396]
-+ lwi $r0, [$sp + 400]
-+ lwi $r0, [$sp + 404]
-+ lwi $r0, [$sp + 408]
-+ lwi $r0, [$sp + 412]
-+ lwi $r0, [$sp + 416]
-+ lwi $r0, [$sp + 420]
-+ lwi $r0, [$sp + 424]
-+ lwi $r0, [$sp + 428]
-+ lwi $r0, [$sp + 432]
-+ lwi $r0, [$sp + 436]
-+ lwi $r0, [$sp + 440]
-+ lwi $r0, [$sp + 444]
-+ lwi $r0, [$sp + 448]
-+ lwi $r0, [$sp + 452]
-+ lwi $r0, [$sp + 456]
-+ lwi $r0, [$sp + 460]
-+ lwi $r0, [$sp + 464]
-+ lwi $r0, [$sp + 468]
-+ lwi $r0, [$sp + 472]
-+ lwi $r0, [$sp + 476]
-+ lwi $r0, [$sp + 480]
-+ lwi $r0, [$sp + 484]
-+ lwi $r0, [$sp + 488]
-+ lwi $r0, [$sp + 492]
-+ lwi $r0, [$sp + 496]
-+ lwi $r0, [$sp + 500]
-+ lwi $r0, [$sp + 504]
-+ lwi $r0, [$sp + 508]
-+ lwi $r1, [$sp + 0]
-+ lwi $r1, [$sp + 4]
-+ lwi $r1, [$sp + 8]
-+ lwi $r1, [$sp + 12]
-+ lwi $r1, [$sp + 16]
-+ lwi $r1, [$sp + 20]
-+ lwi $r1, [$sp + 24]
-+ lwi $r1, [$sp + 28]
-+ lwi $r1, [$sp + 32]
-+ lwi $r1, [$sp + 36]
-+ lwi $r1, [$sp + 40]
-+ lwi $r1, [$sp + 44]
-+ lwi $r1, [$sp + 48]
-+ lwi $r1, [$sp + 52]
-+ lwi $r1, [$sp + 56]
-+ lwi $r1, [$sp + 60]
-+ lwi $r1, [$sp + 64]
-+ lwi $r1, [$sp + 68]
-+ lwi $r1, [$sp + 72]
-+ lwi $r1, [$sp + 76]
-+ lwi $r1, [$sp + 80]
-+ lwi $r1, [$sp + 84]
-+ lwi $r1, [$sp + 88]
-+ lwi $r1, [$sp + 92]
-+ lwi $r1, [$sp + 96]
-+ lwi $r1, [$sp + 100]
-+ lwi $r1, [$sp + 104]
-+ lwi $r1, [$sp + 108]
-+ lwi $r1, [$sp + 112]
-+ lwi $r1, [$sp + 116]
-+ lwi $r1, [$sp + 120]
-+ lwi $r1, [$sp + 124]
-+ lwi $r1, [$sp + 128]
-+ lwi $r1, [$sp + 132]
-+ lwi $r1, [$sp + 136]
-+ lwi $r1, [$sp + 140]
-+ lwi $r1, [$sp + 144]
-+ lwi $r1, [$sp + 148]
-+ lwi $r1, [$sp + 152]
-+ lwi $r1, [$sp + 156]
-+ lwi $r1, [$sp + 160]
-+ lwi $r1, [$sp + 164]
-+ lwi $r1, [$sp + 168]
-+ lwi $r1, [$sp + 172]
-+ lwi $r1, [$sp + 176]
-+ lwi $r1, [$sp + 180]
-+ lwi $r1, [$sp + 184]
-+ lwi $r1, [$sp + 188]
-+ lwi $r1, [$sp + 192]
-+ lwi $r1, [$sp + 196]
-+ lwi $r1, [$sp + 200]
-+ lwi $r1, [$sp + 204]
-+ lwi $r1, [$sp + 208]
-+ lwi $r1, [$sp + 212]
-+ lwi $r1, [$sp + 216]
-+ lwi $r1, [$sp + 220]
-+ lwi $r1, [$sp + 224]
-+ lwi $r1, [$sp + 228]
-+ lwi $r1, [$sp + 232]
-+ lwi $r1, [$sp + 236]
-+ lwi $r1, [$sp + 240]
-+ lwi $r1, [$sp + 244]
-+ lwi $r1, [$sp + 248]
-+ lwi $r1, [$sp + 252]
-+ lwi $r1, [$sp + 256]
-+ lwi $r1, [$sp + 260]
-+ lwi $r1, [$sp + 264]
-+ lwi $r1, [$sp + 268]
-+ lwi $r1, [$sp + 272]
-+ lwi $r1, [$sp + 276]
-+ lwi $r1, [$sp + 280]
-+ lwi $r1, [$sp + 284]
-+ lwi $r1, [$sp + 288]
-+ lwi $r1, [$sp + 292]
-+ lwi $r1, [$sp + 296]
-+ lwi $r1, [$sp + 300]
-+ lwi $r1, [$sp + 304]
-+ lwi $r1, [$sp + 308]
-+ lwi $r1, [$sp + 312]
-+ lwi $r1, [$sp + 316]
-+ lwi $r1, [$sp + 320]
-+ lwi $r1, [$sp + 324]
-+ lwi $r1, [$sp + 328]
-+ lwi $r1, [$sp + 332]
-+ lwi $r1, [$sp + 336]
-+ lwi $r1, [$sp + 340]
-+ lwi $r1, [$sp + 344]
-+ lwi $r1, [$sp + 348]
-+ lwi $r1, [$sp + 352]
-+ lwi $r1, [$sp + 356]
-+ lwi $r1, [$sp + 360]
-+ lwi $r1, [$sp + 364]
-+ lwi $r1, [$sp + 368]
-+ lwi $r1, [$sp + 372]
-+ lwi $r1, [$sp + 376]
-+ lwi $r1, [$sp + 380]
-+ lwi $r1, [$sp + 384]
-+ lwi $r1, [$sp + 388]
-+ lwi $r1, [$sp + 392]
-+ lwi $r1, [$sp + 396]
-+ lwi $r1, [$sp + 400]
-+ lwi $r1, [$sp + 404]
-+ lwi $r1, [$sp + 408]
-+ lwi $r1, [$sp + 412]
-+ lwi $r1, [$sp + 416]
-+ lwi $r1, [$sp + 420]
-+ lwi $r1, [$sp + 424]
-+ lwi $r1, [$sp + 428]
-+ lwi $r1, [$sp + 432]
-+ lwi $r1, [$sp + 436]
-+ lwi $r1, [$sp + 440]
-+ lwi $r1, [$sp + 444]
-+ lwi $r1, [$sp + 448]
-+ lwi $r1, [$sp + 452]
-+ lwi $r1, [$sp + 456]
-+ lwi $r1, [$sp + 460]
-+ lwi $r1, [$sp + 464]
-+ lwi $r1, [$sp + 468]
-+ lwi $r1, [$sp + 472]
-+ lwi $r1, [$sp + 476]
-+ lwi $r1, [$sp + 480]
-+ lwi $r1, [$sp + 484]
-+ lwi $r1, [$sp + 488]
-+ lwi $r1, [$sp + 492]
-+ lwi $r1, [$sp + 496]
-+ lwi $r1, [$sp + 500]
-+ lwi $r1, [$sp + 504]
-+ lwi $r1, [$sp + 508]
-+ lwi $r2, [$sp + 0]
-+ lwi $r2, [$sp + 4]
-+ lwi $r2, [$sp + 8]
-+ lwi $r2, [$sp + 12]
-+ lwi $r2, [$sp + 16]
-+ lwi $r2, [$sp + 20]
-+ lwi $r2, [$sp + 24]
-+ lwi $r2, [$sp + 28]
-+ lwi $r2, [$sp + 32]
-+ lwi $r2, [$sp + 36]
-+ lwi $r2, [$sp + 40]
-+ lwi $r2, [$sp + 44]
-+ lwi $r2, [$sp + 48]
-+ lwi $r2, [$sp + 52]
-+ lwi $r2, [$sp + 56]
-+ lwi $r2, [$sp + 60]
-+ lwi $r2, [$sp + 64]
-+ lwi $r2, [$sp + 68]
-+ lwi $r2, [$sp + 72]
-+ lwi $r2, [$sp + 76]
-+ lwi $r2, [$sp + 80]
-+ lwi $r2, [$sp + 84]
-+ lwi $r2, [$sp + 88]
-+ lwi $r2, [$sp + 92]
-+ lwi $r2, [$sp + 96]
-+ lwi $r2, [$sp + 100]
-+ lwi $r2, [$sp + 104]
-+ lwi $r2, [$sp + 108]
-+ lwi $r2, [$sp + 112]
-+ lwi $r2, [$sp + 116]
-+ lwi $r2, [$sp + 120]
-+ lwi $r2, [$sp + 124]
-+ lwi $r2, [$sp + 128]
-+ lwi $r2, [$sp + 132]
-+ lwi $r2, [$sp + 136]
-+ lwi $r2, [$sp + 140]
-+ lwi $r2, [$sp + 144]
-+ lwi $r2, [$sp + 148]
-+ lwi $r2, [$sp + 152]
-+ lwi $r2, [$sp + 156]
-+ lwi $r2, [$sp + 160]
-+ lwi $r2, [$sp + 164]
-+ lwi $r2, [$sp + 168]
-+ lwi $r2, [$sp + 172]
-+ lwi $r2, [$sp + 176]
-+ lwi $r2, [$sp + 180]
-+ lwi $r2, [$sp + 184]
-+ lwi $r2, [$sp + 188]
-+ lwi $r2, [$sp + 192]
-+ lwi $r2, [$sp + 196]
-+ lwi $r2, [$sp + 200]
-+ lwi $r2, [$sp + 204]
-+ lwi $r2, [$sp + 208]
-+ lwi $r2, [$sp + 212]
-+ lwi $r2, [$sp + 216]
-+ lwi $r2, [$sp + 220]
-+ lwi $r2, [$sp + 224]
-+ lwi $r2, [$sp + 228]
-+ lwi $r2, [$sp + 232]
-+ lwi $r2, [$sp + 236]
-+ lwi $r2, [$sp + 240]
-+ lwi $r2, [$sp + 244]
-+ lwi $r2, [$sp + 248]
-+ lwi $r2, [$sp + 252]
-+ lwi $r2, [$sp + 256]
-+ lwi $r2, [$sp + 260]
-+ lwi $r2, [$sp + 264]
-+ lwi $r2, [$sp + 268]
-+ lwi $r2, [$sp + 272]
-+ lwi $r2, [$sp + 276]
-+ lwi $r2, [$sp + 280]
-+ lwi $r2, [$sp + 284]
-+ lwi $r2, [$sp + 288]
-+ lwi $r2, [$sp + 292]
-+ lwi $r2, [$sp + 296]
-+ lwi $r2, [$sp + 300]
-+ lwi $r2, [$sp + 304]
-+ lwi $r2, [$sp + 308]
-+ lwi $r2, [$sp + 312]
-+ lwi $r2, [$sp + 316]
-+ lwi $r2, [$sp + 320]
-+ lwi $r2, [$sp + 324]
-+ lwi $r2, [$sp + 328]
-+ lwi $r2, [$sp + 332]
-+ lwi $r2, [$sp + 336]
-+ lwi $r2, [$sp + 340]
-+ lwi $r2, [$sp + 344]
-+ lwi $r2, [$sp + 348]
-+ lwi $r2, [$sp + 352]
-+ lwi $r2, [$sp + 356]
-+ lwi $r2, [$sp + 360]
-+ lwi $r2, [$sp + 364]
-+ lwi $r2, [$sp + 368]
-+ lwi $r2, [$sp + 372]
-+ lwi $r2, [$sp + 376]
-+ lwi $r2, [$sp + 380]
-+ lwi $r2, [$sp + 384]
-+ lwi $r2, [$sp + 388]
-+ lwi $r2, [$sp + 392]
-+ lwi $r2, [$sp + 396]
-+ lwi $r2, [$sp + 400]
-+ lwi $r2, [$sp + 404]
-+ lwi $r2, [$sp + 408]
-+ lwi $r2, [$sp + 412]
-+ lwi $r2, [$sp + 416]
-+ lwi $r2, [$sp + 420]
-+ lwi $r2, [$sp + 424]
-+ lwi $r2, [$sp + 428]
-+ lwi $r2, [$sp + 432]
-+ lwi $r2, [$sp + 436]
-+ lwi $r2, [$sp + 440]
-+ lwi $r2, [$sp + 444]
-+ lwi $r2, [$sp + 448]
-+ lwi $r2, [$sp + 452]
-+ lwi $r2, [$sp + 456]
-+ lwi $r2, [$sp + 460]
-+ lwi $r2, [$sp + 464]
-+ lwi $r2, [$sp + 468]
-+ lwi $r2, [$sp + 472]
-+ lwi $r2, [$sp + 476]
-+ lwi $r2, [$sp + 480]
-+ lwi $r2, [$sp + 484]
-+ lwi $r2, [$sp + 488]
-+ lwi $r2, [$sp + 492]
-+ lwi $r2, [$sp + 496]
-+ lwi $r2, [$sp + 500]
-+ lwi $r2, [$sp + 504]
-+ lwi $r2, [$sp + 508]
-+ lwi $r3, [$sp + 0]
-+ lwi $r3, [$sp + 4]
-+ lwi $r3, [$sp + 8]
-+ lwi $r3, [$sp + 12]
-+ lwi $r3, [$sp + 16]
-+ lwi $r3, [$sp + 20]
-+ lwi $r3, [$sp + 24]
-+ lwi $r3, [$sp + 28]
-+ lwi $r3, [$sp + 32]
-+ lwi $r3, [$sp + 36]
-+ lwi $r3, [$sp + 40]
-+ lwi $r3, [$sp + 44]
-+ lwi $r3, [$sp + 48]
-+ lwi $r3, [$sp + 52]
-+ lwi $r3, [$sp + 56]
-+ lwi $r3, [$sp + 60]
-+ lwi $r3, [$sp + 64]
-+ lwi $r3, [$sp + 68]
-+ lwi $r3, [$sp + 72]
-+ lwi $r3, [$sp + 76]
-+ lwi $r3, [$sp + 80]
-+ lwi $r3, [$sp + 84]
-+ lwi $r3, [$sp + 88]
-+ lwi $r3, [$sp + 92]
-+ lwi $r3, [$sp + 96]
-+ lwi $r3, [$sp + 100]
-+ lwi $r3, [$sp + 104]
-+ lwi $r3, [$sp + 108]
-+ lwi $r3, [$sp + 112]
-+ lwi $r3, [$sp + 116]
-+ lwi $r3, [$sp + 120]
-+ lwi $r3, [$sp + 124]
-+ lwi $r3, [$sp + 128]
-+ lwi $r3, [$sp + 132]
-+ lwi $r3, [$sp + 136]
-+ lwi $r3, [$sp + 140]
-+ lwi $r3, [$sp + 144]
-+ lwi $r3, [$sp + 148]
-+ lwi $r3, [$sp + 152]
-+ lwi $r3, [$sp + 156]
-+ lwi $r3, [$sp + 160]
-+ lwi $r3, [$sp + 164]
-+ lwi $r3, [$sp + 168]
-+ lwi $r3, [$sp + 172]
-+ lwi $r3, [$sp + 176]
-+ lwi $r3, [$sp + 180]
-+ lwi $r3, [$sp + 184]
-+ lwi $r3, [$sp + 188]
-+ lwi $r3, [$sp + 192]
-+ lwi $r3, [$sp + 196]
-+ lwi $r3, [$sp + 200]
-+ lwi $r3, [$sp + 204]
-+ lwi $r3, [$sp + 208]
-+ lwi $r3, [$sp + 212]
-+ lwi $r3, [$sp + 216]
-+ lwi $r3, [$sp + 220]
-+ lwi $r3, [$sp + 224]
-+ lwi $r3, [$sp + 228]
-+ lwi $r3, [$sp + 232]
-+ lwi $r3, [$sp + 236]
-+ lwi $r3, [$sp + 240]
-+ lwi $r3, [$sp + 244]
-+ lwi $r3, [$sp + 248]
-+ lwi $r3, [$sp + 252]
-+ lwi $r3, [$sp + 256]
-+ lwi $r3, [$sp + 260]
-+ lwi $r3, [$sp + 264]
-+ lwi $r3, [$sp + 268]
-+ lwi $r3, [$sp + 272]
-+ lwi $r3, [$sp + 276]
-+ lwi $r3, [$sp + 280]
-+ lwi $r3, [$sp + 284]
-+ lwi $r3, [$sp + 288]
-+ lwi $r3, [$sp + 292]
-+ lwi $r3, [$sp + 296]
-+ lwi $r3, [$sp + 300]
-+ lwi $r3, [$sp + 304]
-+ lwi $r3, [$sp + 308]
-+ lwi $r3, [$sp + 312]
-+ lwi $r3, [$sp + 316]
-+ lwi $r3, [$sp + 320]
-+ lwi $r3, [$sp + 324]
-+ lwi $r3, [$sp + 328]
-+ lwi $r3, [$sp + 332]
-+ lwi $r3, [$sp + 336]
-+ lwi $r3, [$sp + 340]
-+ lwi $r3, [$sp + 344]
-+ lwi $r3, [$sp + 348]
-+ lwi $r3, [$sp + 352]
-+ lwi $r3, [$sp + 356]
-+ lwi $r3, [$sp + 360]
-+ lwi $r3, [$sp + 364]
-+ lwi $r3, [$sp + 368]
-+ lwi $r3, [$sp + 372]
-+ lwi $r3, [$sp + 376]
-+ lwi $r3, [$sp + 380]
-+ lwi $r3, [$sp + 384]
-+ lwi $r3, [$sp + 388]
-+ lwi $r3, [$sp + 392]
-+ lwi $r3, [$sp + 396]
-+ lwi $r3, [$sp + 400]
-+ lwi $r3, [$sp + 404]
-+ lwi $r3, [$sp + 408]
-+ lwi $r3, [$sp + 412]
-+ lwi $r3, [$sp + 416]
-+ lwi $r3, [$sp + 420]
-+ lwi $r3, [$sp + 424]
-+ lwi $r3, [$sp + 428]
-+ lwi $r3, [$sp + 432]
-+ lwi $r3, [$sp + 436]
-+ lwi $r3, [$sp + 440]
-+ lwi $r3, [$sp + 444]
-+ lwi $r3, [$sp + 448]
-+ lwi $r3, [$sp + 452]
-+ lwi $r3, [$sp + 456]
-+ lwi $r3, [$sp + 460]
-+ lwi $r3, [$sp + 464]
-+ lwi $r3, [$sp + 468]
-+ lwi $r3, [$sp + 472]
-+ lwi $r3, [$sp + 476]
-+ lwi $r3, [$sp + 480]
-+ lwi $r3, [$sp + 484]
-+ lwi $r3, [$sp + 488]
-+ lwi $r3, [$sp + 492]
-+ lwi $r3, [$sp + 496]
-+ lwi $r3, [$sp + 500]
-+ lwi $r3, [$sp + 504]
-+ lwi $r3, [$sp + 508]
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-+ lwi $r4, [$sp + 4]
-+ lwi $r4, [$sp + 8]
-+ lwi $r4, [$sp + 12]
-+ lwi $r4, [$sp + 16]
-+ lwi $r4, [$sp + 20]
-+ lwi $r4, [$sp + 24]
-+ lwi $r4, [$sp + 28]
-+ lwi $r4, [$sp + 32]
-+ lwi $r4, [$sp + 36]
-+ lwi $r4, [$sp + 40]
-+ lwi $r4, [$sp + 44]
-+ lwi $r4, [$sp + 48]
-+ lwi $r4, [$sp + 52]
-+ lwi $r4, [$sp + 56]
-+ lwi $r4, [$sp + 60]
-+ lwi $r4, [$sp + 64]
-+ lwi $r4, [$sp + 68]
-+ lwi $r4, [$sp + 72]
-+ lwi $r4, [$sp + 76]
-+ lwi $r4, [$sp + 80]
-+ lwi $r4, [$sp + 84]
-+ lwi $r4, [$sp + 88]
-+ lwi $r4, [$sp + 92]
-+ lwi $r4, [$sp + 96]
-+ lwi $r4, [$sp + 100]
-+ lwi $r4, [$sp + 104]
-+ lwi $r4, [$sp + 108]
-+ lwi $r4, [$sp + 112]
-+ lwi $r4, [$sp + 116]
-+ lwi $r4, [$sp + 120]
-+ lwi $r4, [$sp + 124]
-+ lwi $r4, [$sp + 128]
-+ lwi $r4, [$sp + 132]
-+ lwi $r4, [$sp + 136]
-+ lwi $r4, [$sp + 140]
-+ lwi $r4, [$sp + 144]
-+ lwi $r4, [$sp + 148]
-+ lwi $r4, [$sp + 152]
-+ lwi $r4, [$sp + 156]
-+ lwi $r4, [$sp + 160]
-+ lwi $r4, [$sp + 164]
-+ lwi $r4, [$sp + 168]
-+ lwi $r4, [$sp + 172]
-+ lwi $r4, [$sp + 176]
-+ lwi $r4, [$sp + 180]
-+ lwi $r4, [$sp + 184]
-+ lwi $r4, [$sp + 188]
-+ lwi $r4, [$sp + 192]
-+ lwi $r4, [$sp + 196]
-+ lwi $r4, [$sp + 200]
-+ lwi $r4, [$sp + 204]
-+ lwi $r4, [$sp + 208]
-+ lwi $r4, [$sp + 212]
-+ lwi $r4, [$sp + 216]
-+ lwi $r4, [$sp + 220]
-+ lwi $r4, [$sp + 224]
-+ lwi $r4, [$sp + 228]
-+ lwi $r4, [$sp + 232]
-+ lwi $r4, [$sp + 236]
-+ lwi $r4, [$sp + 240]
-+ lwi $r4, [$sp + 244]
-+ lwi $r4, [$sp + 248]
-+ lwi $r4, [$sp + 252]
-+ lwi $r4, [$sp + 256]
-+ lwi $r4, [$sp + 260]
-+ lwi $r4, [$sp + 264]
-+ lwi $r4, [$sp + 268]
-+ lwi $r4, [$sp + 272]
-+ lwi $r4, [$sp + 276]
-+ lwi $r4, [$sp + 280]
-+ lwi $r4, [$sp + 284]
-+ lwi $r4, [$sp + 288]
-+ lwi $r4, [$sp + 292]
-+ lwi $r4, [$sp + 296]
-+ lwi $r4, [$sp + 300]
-+ lwi $r4, [$sp + 304]
-+ lwi $r4, [$sp + 308]
-+ lwi $r4, [$sp + 312]
-+ lwi $r4, [$sp + 316]
-+ lwi $r4, [$sp + 320]
-+ lwi $r4, [$sp + 324]
-+ lwi $r4, [$sp + 328]
-+ lwi $r4, [$sp + 332]
-+ lwi $r4, [$sp + 336]
-+ lwi $r4, [$sp + 340]
-+ lwi $r4, [$sp + 344]
-+ lwi $r4, [$sp + 348]
-+ lwi $r4, [$sp + 352]
-+ lwi $r4, [$sp + 356]
-+ lwi $r4, [$sp + 360]
-+ lwi $r4, [$sp + 364]
-+ lwi $r4, [$sp + 368]
-+ lwi $r4, [$sp + 372]
-+ lwi $r4, [$sp + 376]
-+ lwi $r4, [$sp + 380]
-+ lwi $r4, [$sp + 384]
-+ lwi $r4, [$sp + 388]
-+ lwi $r4, [$sp + 392]
-+ lwi $r4, [$sp + 396]
-+ lwi $r4, [$sp + 400]
-+ lwi $r4, [$sp + 404]
-+ lwi $r4, [$sp + 408]
-+ lwi $r4, [$sp + 412]
-+ lwi $r4, [$sp + 416]
-+ lwi $r4, [$sp + 420]
-+ lwi $r4, [$sp + 424]
-+ lwi $r4, [$sp + 428]
-+ lwi $r4, [$sp + 432]
-+ lwi $r4, [$sp + 436]
-+ lwi $r4, [$sp + 440]
-+ lwi $r4, [$sp + 444]
-+ lwi $r4, [$sp + 448]
-+ lwi $r4, [$sp + 452]
-+ lwi $r4, [$sp + 456]
-+ lwi $r4, [$sp + 460]
-+ lwi $r4, [$sp + 464]
-+ lwi $r4, [$sp + 468]
-+ lwi $r4, [$sp + 472]
-+ lwi $r4, [$sp + 476]
-+ lwi $r4, [$sp + 480]
-+ lwi $r4, [$sp + 484]
-+ lwi $r4, [$sp + 488]
-+ lwi $r4, [$sp + 492]
-+ lwi $r4, [$sp + 496]
-+ lwi $r4, [$sp + 500]
-+ lwi $r4, [$sp + 504]
-+ lwi $r4, [$sp + 508]
-+ lwi $r5, [$sp + 0]
-+ lwi $r5, [$sp + 4]
-+ lwi $r5, [$sp + 8]
-+ lwi $r5, [$sp + 12]
-+ lwi $r5, [$sp + 16]
-+ lwi $r5, [$sp + 20]
-+ lwi $r5, [$sp + 24]
-+ lwi $r5, [$sp + 28]
-+ lwi $r5, [$sp + 32]
-+ lwi $r5, [$sp + 36]
-+ lwi $r5, [$sp + 40]
-+ lwi $r5, [$sp + 44]
-+ lwi $r5, [$sp + 48]
-+ lwi $r5, [$sp + 52]
-+ lwi $r5, [$sp + 56]
-+ lwi $r5, [$sp + 60]
-+ lwi $r5, [$sp + 64]
-+ lwi $r5, [$sp + 68]
-+ lwi $r5, [$sp + 72]
-+ lwi $r5, [$sp + 76]
-+ lwi $r5, [$sp + 80]
-+ lwi $r5, [$sp + 84]
-+ lwi $r5, [$sp + 88]
-+ lwi $r5, [$sp + 92]
-+ lwi $r5, [$sp + 96]
-+ lwi $r5, [$sp + 100]
-+ lwi $r5, [$sp + 104]
-+ lwi $r5, [$sp + 108]
-+ lwi $r5, [$sp + 112]
-+ lwi $r5, [$sp + 116]
-+ lwi $r5, [$sp + 120]
-+ lwi $r5, [$sp + 124]
-+ lwi $r5, [$sp + 128]
-+ lwi $r5, [$sp + 132]
-+ lwi $r5, [$sp + 136]
-+ lwi $r5, [$sp + 140]
-+ lwi $r5, [$sp + 144]
-+ lwi $r5, [$sp + 148]
-+ lwi $r5, [$sp + 152]
-+ lwi $r5, [$sp + 156]
-+ lwi $r5, [$sp + 160]
-+ lwi $r5, [$sp + 164]
-+ lwi $r5, [$sp + 168]
-+ lwi $r5, [$sp + 172]
-+ lwi $r5, [$sp + 176]
-+ lwi $r5, [$sp + 180]
-+ lwi $r5, [$sp + 184]
-+ lwi $r5, [$sp + 188]
-+ lwi $r5, [$sp + 192]
-+ lwi $r5, [$sp + 196]
-+ lwi $r5, [$sp + 200]
-+ lwi $r5, [$sp + 204]
-+ lwi $r5, [$sp + 208]
-+ lwi $r5, [$sp + 212]
-+ lwi $r5, [$sp + 216]
-+ lwi $r5, [$sp + 220]
-+ lwi $r5, [$sp + 224]
-+ lwi $r5, [$sp + 228]
-+ lwi $r5, [$sp + 232]
-+ lwi $r5, [$sp + 236]
-+ lwi $r5, [$sp + 240]
-+ lwi $r5, [$sp + 244]
-+ lwi $r5, [$sp + 248]
-+ lwi $r5, [$sp + 252]
-+ lwi $r5, [$sp + 256]
-+ lwi $r5, [$sp + 260]
-+ lwi $r5, [$sp + 264]
-+ lwi $r5, [$sp + 268]
-+ lwi $r5, [$sp + 272]
-+ lwi $r5, [$sp + 276]
-+ lwi $r5, [$sp + 280]
-+ lwi $r5, [$sp + 284]
-+ lwi $r5, [$sp + 288]
-+ lwi $r5, [$sp + 292]
-+ lwi $r5, [$sp + 296]
-+ lwi $r5, [$sp + 300]
-+ lwi $r5, [$sp + 304]
-+ lwi $r5, [$sp + 308]
-+ lwi $r5, [$sp + 312]
-+ lwi $r5, [$sp + 316]
-+ lwi $r5, [$sp + 320]
-+ lwi $r5, [$sp + 324]
-+ lwi $r5, [$sp + 328]
-+ lwi $r5, [$sp + 332]
-+ lwi $r5, [$sp + 336]
-+ lwi $r5, [$sp + 340]
-+ lwi $r5, [$sp + 344]
-+ lwi $r5, [$sp + 348]
-+ lwi $r5, [$sp + 352]
-+ lwi $r5, [$sp + 356]
-+ lwi $r5, [$sp + 360]
-+ lwi $r5, [$sp + 364]
-+ lwi $r5, [$sp + 368]
-+ lwi $r5, [$sp + 372]
-+ lwi $r5, [$sp + 376]
-+ lwi $r5, [$sp + 380]
-+ lwi $r5, [$sp + 384]
-+ lwi $r5, [$sp + 388]
-+ lwi $r5, [$sp + 392]
-+ lwi $r5, [$sp + 396]
-+ lwi $r5, [$sp + 400]
-+ lwi $r5, [$sp + 404]
-+ lwi $r5, [$sp + 408]
-+ lwi $r5, [$sp + 412]
-+ lwi $r5, [$sp + 416]
-+ lwi $r5, [$sp + 420]
-+ lwi $r5, [$sp + 424]
-+ lwi $r5, [$sp + 428]
-+ lwi $r5, [$sp + 432]
-+ lwi $r5, [$sp + 436]
-+ lwi $r5, [$sp + 440]
-+ lwi $r5, [$sp + 444]
-+ lwi $r5, [$sp + 448]
-+ lwi $r5, [$sp + 452]
-+ lwi $r5, [$sp + 456]
-+ lwi $r5, [$sp + 460]
-+ lwi $r5, [$sp + 464]
-+ lwi $r5, [$sp + 468]
-+ lwi $r5, [$sp + 472]
-+ lwi $r5, [$sp + 476]
-+ lwi $r5, [$sp + 480]
-+ lwi $r5, [$sp + 484]
-+ lwi $r5, [$sp + 488]
-+ lwi $r5, [$sp + 492]
-+ lwi $r5, [$sp + 496]
-+ lwi $r5, [$sp + 500]
-+ lwi $r5, [$sp + 504]
-+ lwi $r5, [$sp + 508]
-+ lwi $r6, [$sp + 0]
-+ lwi $r6, [$sp + 4]
-+ lwi $r6, [$sp + 8]
-+ lwi $r6, [$sp + 12]
-+ lwi $r6, [$sp + 16]
-+ lwi $r6, [$sp + 20]
-+ lwi $r6, [$sp + 24]
-+ lwi $r6, [$sp + 28]
-+ lwi $r6, [$sp + 32]
-+ lwi $r6, [$sp + 36]
-+ lwi $r6, [$sp + 40]
-+ lwi $r6, [$sp + 44]
-+ lwi $r6, [$sp + 48]
-+ lwi $r6, [$sp + 52]
-+ lwi $r6, [$sp + 56]
-+ lwi $r6, [$sp + 60]
-+ lwi $r6, [$sp + 64]
-+ lwi $r6, [$sp + 68]
-+ lwi $r6, [$sp + 72]
-+ lwi $r6, [$sp + 76]
-+ lwi $r6, [$sp + 80]
-+ lwi $r6, [$sp + 84]
-+ lwi $r6, [$sp + 88]
-+ lwi $r6, [$sp + 92]
-+ lwi $r6, [$sp + 96]
-+ lwi $r6, [$sp + 100]
-+ lwi $r6, [$sp + 104]
-+ lwi $r6, [$sp + 108]
-+ lwi $r6, [$sp + 112]
-+ lwi $r6, [$sp + 116]
-+ lwi $r6, [$sp + 120]
-+ lwi $r6, [$sp + 124]
-+ lwi $r6, [$sp + 128]
-+ lwi $r6, [$sp + 132]
-+ lwi $r6, [$sp + 136]
-+ lwi $r6, [$sp + 140]
-+ lwi $r6, [$sp + 144]
-+ lwi $r6, [$sp + 148]
-+ lwi $r6, [$sp + 152]
-+ lwi $r6, [$sp + 156]
-+ lwi $r6, [$sp + 160]
-+ lwi $r6, [$sp + 164]
-+ lwi $r6, [$sp + 168]
-+ lwi $r6, [$sp + 172]
-+ lwi $r6, [$sp + 176]
-+ lwi $r6, [$sp + 180]
-+ lwi $r6, [$sp + 184]
-+ lwi $r6, [$sp + 188]
-+ lwi $r6, [$sp + 192]
-+ lwi $r6, [$sp + 196]
-+ lwi $r6, [$sp + 200]
-+ lwi $r6, [$sp + 204]
-+ lwi $r6, [$sp + 208]
-+ lwi $r6, [$sp + 212]
-+ lwi $r6, [$sp + 216]
-+ lwi $r6, [$sp + 220]
-+ lwi $r6, [$sp + 224]
-+ lwi $r6, [$sp + 228]
-+ lwi $r6, [$sp + 232]
-+ lwi $r6, [$sp + 236]
-+ lwi $r6, [$sp + 240]
-+ lwi $r6, [$sp + 244]
-+ lwi $r6, [$sp + 248]
-+ lwi $r6, [$sp + 252]
-+ lwi $r6, [$sp + 256]
-+ lwi $r6, [$sp + 260]
-+ lwi $r6, [$sp + 264]
-+ lwi $r6, [$sp + 268]
-+ lwi $r6, [$sp + 272]
-+ lwi $r6, [$sp + 276]
-+ lwi $r6, [$sp + 280]
-+ lwi $r6, [$sp + 284]
-+ lwi $r6, [$sp + 288]
-+ lwi $r6, [$sp + 292]
-+ lwi $r6, [$sp + 296]
-+ lwi $r6, [$sp + 300]
-+ lwi $r6, [$sp + 304]
-+ lwi $r6, [$sp + 308]
-+ lwi $r6, [$sp + 312]
-+ lwi $r6, [$sp + 316]
-+ lwi $r6, [$sp + 320]
-+ lwi $r6, [$sp + 324]
-+ lwi $r6, [$sp + 328]
-+ lwi $r6, [$sp + 332]
-+ lwi $r6, [$sp + 336]
-+ lwi $r6, [$sp + 340]
-+ lwi $r6, [$sp + 344]
-+ lwi $r6, [$sp + 348]
-+ lwi $r6, [$sp + 352]
-+ lwi $r6, [$sp + 356]
-+ lwi $r6, [$sp + 360]
-+ lwi $r6, [$sp + 364]
-+ lwi $r6, [$sp + 368]
-+ lwi $r6, [$sp + 372]
-+ lwi $r6, [$sp + 376]
-+ lwi $r6, [$sp + 380]
-+ lwi $r6, [$sp + 384]
-+ lwi $r6, [$sp + 388]
-+ lwi $r6, [$sp + 392]
-+ lwi $r6, [$sp + 396]
-+ lwi $r6, [$sp + 400]
-+ lwi $r6, [$sp + 404]
-+ lwi $r6, [$sp + 408]
-+ lwi $r6, [$sp + 412]
-+ lwi $r6, [$sp + 416]
-+ lwi $r6, [$sp + 420]
-+ lwi $r6, [$sp + 424]
-+ lwi $r6, [$sp + 428]
-+ lwi $r6, [$sp + 432]
-+ lwi $r6, [$sp + 436]
-+ lwi $r6, [$sp + 440]
-+ lwi $r6, [$sp + 444]
-+ lwi $r6, [$sp + 448]
-+ lwi $r6, [$sp + 452]
-+ lwi $r6, [$sp + 456]
-+ lwi $r6, [$sp + 460]
-+ lwi $r6, [$sp + 464]
-+ lwi $r6, [$sp + 468]
-+ lwi $r6, [$sp + 472]
-+ lwi $r6, [$sp + 476]
-+ lwi $r6, [$sp + 480]
-+ lwi $r6, [$sp + 484]
-+ lwi $r6, [$sp + 488]
-+ lwi $r6, [$sp + 492]
-+ lwi $r6, [$sp + 496]
-+ lwi $r6, [$sp + 500]
-+ lwi $r6, [$sp + 504]
-+ lwi $r6, [$sp + 508]
-+ lwi $r7, [$sp + 0]
-+ lwi $r7, [$sp + 4]
-+ lwi $r7, [$sp + 8]
-+ lwi $r7, [$sp + 12]
-+ lwi $r7, [$sp + 16]
-+ lwi $r7, [$sp + 20]
-+ lwi $r7, [$sp + 24]
-+ lwi $r7, [$sp + 28]
-+ lwi $r7, [$sp + 32]
-+ lwi $r7, [$sp + 36]
-+ lwi $r7, [$sp + 40]
-+ lwi $r7, [$sp + 44]
-+ lwi $r7, [$sp + 48]
-+ lwi $r7, [$sp + 52]
-+ lwi $r7, [$sp + 56]
-+ lwi $r7, [$sp + 60]
-+ lwi $r7, [$sp + 64]
-+ lwi $r7, [$sp + 68]
-+ lwi $r7, [$sp + 72]
-+ lwi $r7, [$sp + 76]
-+ lwi $r7, [$sp + 80]
-+ lwi $r7, [$sp + 84]
-+ lwi $r7, [$sp + 88]
-+ lwi $r7, [$sp + 92]
-+ lwi $r7, [$sp + 96]
-+ lwi $r7, [$sp + 100]
-+ lwi $r7, [$sp + 104]
-+ lwi $r7, [$sp + 108]
-+ lwi $r7, [$sp + 112]
-+ lwi $r7, [$sp + 116]
-+ lwi $r7, [$sp + 120]
-+ lwi $r7, [$sp + 124]
-+ lwi $r7, [$sp + 128]
-+ lwi $r7, [$sp + 132]
-+ lwi $r7, [$sp + 136]
-+ lwi $r7, [$sp + 140]
-+ lwi $r7, [$sp + 144]
-+ lwi $r7, [$sp + 148]
-+ lwi $r7, [$sp + 152]
-+ lwi $r7, [$sp + 156]
-+ lwi $r7, [$sp + 160]
-+ lwi $r7, [$sp + 164]
-+ lwi $r7, [$sp + 168]
-+ lwi $r7, [$sp + 172]
-+ lwi $r7, [$sp + 176]
-+ lwi $r7, [$sp + 180]
-+ lwi $r7, [$sp + 184]
-+ lwi $r7, [$sp + 188]
-+ lwi $r7, [$sp + 192]
-+ lwi $r7, [$sp + 196]
-+ lwi $r7, [$sp + 200]
-+ lwi $r7, [$sp + 204]
-+ lwi $r7, [$sp + 208]
-+ lwi $r7, [$sp + 212]
-+ lwi $r7, [$sp + 216]
-+ lwi $r7, [$sp + 220]
-+ lwi $r7, [$sp + 224]
-+ lwi $r7, [$sp + 228]
-+ lwi $r7, [$sp + 232]
-+ lwi $r7, [$sp + 236]
-+ lwi $r7, [$sp + 240]
-+ lwi $r7, [$sp + 244]
-+ lwi $r7, [$sp + 248]
-+ lwi $r7, [$sp + 252]
-+ lwi $r7, [$sp + 256]
-+ lwi $r7, [$sp + 260]
-+ lwi $r7, [$sp + 264]
-+ lwi $r7, [$sp + 268]
-+ lwi $r7, [$sp + 272]
-+ lwi $r7, [$sp + 276]
-+ lwi $r7, [$sp + 280]
-+ lwi $r7, [$sp + 284]
-+ lwi $r7, [$sp + 288]
-+ lwi $r7, [$sp + 292]
-+ lwi $r7, [$sp + 296]
-+ lwi $r7, [$sp + 300]
-+ lwi $r7, [$sp + 304]
-+ lwi $r7, [$sp + 308]
-+ lwi $r7, [$sp + 312]
-+ lwi $r7, [$sp + 316]
-+ lwi $r7, [$sp + 320]
-+ lwi $r7, [$sp + 324]
-+ lwi $r7, [$sp + 328]
-+ lwi $r7, [$sp + 332]
-+ lwi $r7, [$sp + 336]
-+ lwi $r7, [$sp + 340]
-+ lwi $r7, [$sp + 344]
-+ lwi $r7, [$sp + 348]
-+ lwi $r7, [$sp + 352]
-+ lwi $r7, [$sp + 356]
-+ lwi $r7, [$sp + 360]
-+ lwi $r7, [$sp + 364]
-+ lwi $r7, [$sp + 368]
-+ lwi $r7, [$sp + 372]
-+ lwi $r7, [$sp + 376]
-+ lwi $r7, [$sp + 380]
-+ lwi $r7, [$sp + 384]
-+ lwi $r7, [$sp + 388]
-+ lwi $r7, [$sp + 392]
-+ lwi $r7, [$sp + 396]
-+ lwi $r7, [$sp + 400]
-+ lwi $r7, [$sp + 404]
-+ lwi $r7, [$sp + 408]
-+ lwi $r7, [$sp + 412]
-+ lwi $r7, [$sp + 416]
-+ lwi $r7, [$sp + 420]
-+ lwi $r7, [$sp + 424]
-+ lwi $r7, [$sp + 428]
-+ lwi $r7, [$sp + 432]
-+ lwi $r7, [$sp + 436]
-+ lwi $r7, [$sp + 440]
-+ lwi $r7, [$sp + 444]
-+ lwi $r7, [$sp + 448]
-+ lwi $r7, [$sp + 452]
-+ lwi $r7, [$sp + 456]
-+ lwi $r7, [$sp + 460]
-+ lwi $r7, [$sp + 464]
-+ lwi $r7, [$sp + 468]
-+ lwi $r7, [$sp + 472]
-+ lwi $r7, [$sp + 476]
-+ lwi $r7, [$sp + 480]
-+ lwi $r7, [$sp + 484]
-+ lwi $r7, [$sp + 488]
-+ lwi $r7, [$sp + 492]
-+ lwi $r7, [$sp + 496]
-+ lwi $r7, [$sp + 500]
-+ lwi $r7, [$sp + 504]
-+ lwi $r7, [$sp + 508]
-+ swi $r0, [$sp + 0]
-+ swi $r0, [$sp + 4]
-+ swi $r0, [$sp + 8]
-+ swi $r0, [$sp + 12]
-+ swi $r0, [$sp + 16]
-+ swi $r0, [$sp + 20]
-+ swi $r0, [$sp + 24]
-+ swi $r0, [$sp + 28]
-+ swi $r0, [$sp + 32]
-+ swi $r0, [$sp + 36]
-+ swi $r0, [$sp + 40]
-+ swi $r0, [$sp + 44]
-+ swi $r0, [$sp + 48]
-+ swi $r0, [$sp + 52]
-+ swi $r0, [$sp + 56]
-+ swi $r0, [$sp + 60]
-+ swi $r0, [$sp + 64]
-+ swi $r0, [$sp + 68]
-+ swi $r0, [$sp + 72]
-+ swi $r0, [$sp + 76]
-+ swi $r0, [$sp + 80]
-+ swi $r0, [$sp + 84]
-+ swi $r0, [$sp + 88]
-+ swi $r0, [$sp + 92]
-+ swi $r0, [$sp + 96]
-+ swi $r0, [$sp + 100]
-+ swi $r0, [$sp + 104]
-+ swi $r0, [$sp + 108]
-+ swi $r0, [$sp + 112]
-+ swi $r0, [$sp + 116]
-+ swi $r0, [$sp + 120]
-+ swi $r0, [$sp + 124]
-+ swi $r0, [$sp + 128]
-+ swi $r0, [$sp + 132]
-+ swi $r0, [$sp + 136]
-+ swi $r0, [$sp + 140]
-+ swi $r0, [$sp + 144]
-+ swi $r0, [$sp + 148]
-+ swi $r0, [$sp + 152]
-+ swi $r0, [$sp + 156]
-+ swi $r0, [$sp + 160]
-+ swi $r0, [$sp + 164]
-+ swi $r0, [$sp + 168]
-+ swi $r0, [$sp + 172]
-+ swi $r0, [$sp + 176]
-+ swi $r0, [$sp + 180]
-+ swi $r0, [$sp + 184]
-+ swi $r0, [$sp + 188]
-+ swi $r0, [$sp + 192]
-+ swi $r0, [$sp + 196]
-+ swi $r0, [$sp + 200]
-+ swi $r0, [$sp + 204]
-+ swi $r0, [$sp + 208]
-+ swi $r0, [$sp + 212]
-+ swi $r0, [$sp + 216]
-+ swi $r0, [$sp + 220]
-+ swi $r0, [$sp + 224]
-+ swi $r0, [$sp + 228]
-+ swi $r0, [$sp + 232]
-+ swi $r0, [$sp + 236]
-+ swi $r0, [$sp + 240]
-+ swi $r0, [$sp + 244]
-+ swi $r0, [$sp + 248]
-+ swi $r0, [$sp + 252]
-+ swi $r0, [$sp + 256]
-+ swi $r0, [$sp + 260]
-+ swi $r0, [$sp + 264]
-+ swi $r0, [$sp + 268]
-+ swi $r0, [$sp + 272]
-+ swi $r0, [$sp + 276]
-+ swi $r0, [$sp + 280]
-+ swi $r0, [$sp + 284]
-+ swi $r0, [$sp + 288]
-+ swi $r0, [$sp + 292]
-+ swi $r0, [$sp + 296]
-+ swi $r0, [$sp + 300]
-+ swi $r0, [$sp + 304]
-+ swi $r0, [$sp + 308]
-+ swi $r0, [$sp + 312]
-+ swi $r0, [$sp + 316]
-+ swi $r0, [$sp + 320]
-+ swi $r0, [$sp + 324]
-+ swi $r0, [$sp + 328]
-+ swi $r0, [$sp + 332]
-+ swi $r0, [$sp + 336]
-+ swi $r0, [$sp + 340]
-+ swi $r0, [$sp + 344]
-+ swi $r0, [$sp + 348]
-+ swi $r0, [$sp + 352]
-+ swi $r0, [$sp + 356]
-+ swi $r0, [$sp + 360]
-+ swi $r0, [$sp + 364]
-+ swi $r0, [$sp + 368]
-+ swi $r0, [$sp + 372]
-+ swi $r0, [$sp + 376]
-+ swi $r0, [$sp + 380]
-+ swi $r0, [$sp + 384]
-+ swi $r0, [$sp + 388]
-+ swi $r0, [$sp + 392]
-+ swi $r0, [$sp + 396]
-+ swi $r0, [$sp + 400]
-+ swi $r0, [$sp + 404]
-+ swi $r0, [$sp + 408]
-+ swi $r0, [$sp + 412]
-+ swi $r0, [$sp + 416]
-+ swi $r0, [$sp + 420]
-+ swi $r0, [$sp + 424]
-+ swi $r0, [$sp + 428]
-+ swi $r0, [$sp + 432]
-+ swi $r0, [$sp + 436]
-+ swi $r0, [$sp + 440]
-+ swi $r0, [$sp + 444]
-+ swi $r0, [$sp + 448]
-+ swi $r0, [$sp + 452]
-+ swi $r0, [$sp + 456]
-+ swi $r0, [$sp + 460]
-+ swi $r0, [$sp + 464]
-+ swi $r0, [$sp + 468]
-+ swi $r0, [$sp + 472]
-+ swi $r0, [$sp + 476]
-+ swi $r0, [$sp + 480]
-+ swi $r0, [$sp + 484]
-+ swi $r0, [$sp + 488]
-+ swi $r0, [$sp + 492]
-+ swi $r0, [$sp + 496]
-+ swi $r0, [$sp + 500]
-+ swi $r0, [$sp + 504]
-+ swi $r0, [$sp + 508]
-+ swi $r1, [$sp + 0]
-+ swi $r1, [$sp + 4]
-+ swi $r1, [$sp + 8]
-+ swi $r1, [$sp + 12]
-+ swi $r1, [$sp + 16]
-+ swi $r1, [$sp + 20]
-+ swi $r1, [$sp + 24]
-+ swi $r1, [$sp + 28]
-+ swi $r1, [$sp + 32]
-+ swi $r1, [$sp + 36]
-+ swi $r1, [$sp + 40]
-+ swi $r1, [$sp + 44]
-+ swi $r1, [$sp + 48]
-+ swi $r1, [$sp + 52]
-+ swi $r1, [$sp + 56]
-+ swi $r1, [$sp + 60]
-+ swi $r1, [$sp + 64]
-+ swi $r1, [$sp + 68]
-+ swi $r1, [$sp + 72]
-+ swi $r1, [$sp + 76]
-+ swi $r1, [$sp + 80]
-+ swi $r1, [$sp + 84]
-+ swi $r1, [$sp + 88]
-+ swi $r1, [$sp + 92]
-+ swi $r1, [$sp + 96]
-+ swi $r1, [$sp + 100]
-+ swi $r1, [$sp + 104]
-+ swi $r1, [$sp + 108]
-+ swi $r1, [$sp + 112]
-+ swi $r1, [$sp + 116]
-+ swi $r1, [$sp + 120]
-+ swi $r1, [$sp + 124]
-+ swi $r1, [$sp + 128]
-+ swi $r1, [$sp + 132]
-+ swi $r1, [$sp + 136]
-+ swi $r1, [$sp + 140]
-+ swi $r1, [$sp + 144]
-+ swi $r1, [$sp + 148]
-+ swi $r1, [$sp + 152]
-+ swi $r1, [$sp + 156]
-+ swi $r1, [$sp + 160]
-+ swi $r1, [$sp + 164]
-+ swi $r1, [$sp + 168]
-+ swi $r1, [$sp + 172]
-+ swi $r1, [$sp + 176]
-+ swi $r1, [$sp + 180]
-+ swi $r1, [$sp + 184]
-+ swi $r1, [$sp + 188]
-+ swi $r1, [$sp + 192]
-+ swi $r1, [$sp + 196]
-+ swi $r1, [$sp + 200]
-+ swi $r1, [$sp + 204]
-+ swi $r1, [$sp + 208]
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-+ swi $r5, [$sp + 332]
-+ swi $r5, [$sp + 336]
-+ swi $r5, [$sp + 340]
-+ swi $r5, [$sp + 344]
-+ swi $r5, [$sp + 348]
-+ swi $r5, [$sp + 352]
-+ swi $r5, [$sp + 356]
-+ swi $r5, [$sp + 360]
-+ swi $r5, [$sp + 364]
-+ swi $r5, [$sp + 368]
-+ swi $r5, [$sp + 372]
-+ swi $r5, [$sp + 376]
-+ swi $r5, [$sp + 380]
-+ swi $r5, [$sp + 384]
-+ swi $r5, [$sp + 388]
-+ swi $r5, [$sp + 392]
-+ swi $r5, [$sp + 396]
-+ swi $r5, [$sp + 400]
-+ swi $r5, [$sp + 404]
-+ swi $r5, [$sp + 408]
-+ swi $r5, [$sp + 412]
-+ swi $r5, [$sp + 416]
-+ swi $r5, [$sp + 420]
-+ swi $r5, [$sp + 424]
-+ swi $r5, [$sp + 428]
-+ swi $r5, [$sp + 432]
-+ swi $r5, [$sp + 436]
-+ swi $r5, [$sp + 440]
-+ swi $r5, [$sp + 444]
-+ swi $r5, [$sp + 448]
-+ swi $r5, [$sp + 452]
-+ swi $r5, [$sp + 456]
-+ swi $r5, [$sp + 460]
-+ swi $r5, [$sp + 464]
-+ swi $r5, [$sp + 468]
-+ swi $r5, [$sp + 472]
-+ swi $r5, [$sp + 476]
-+ swi $r5, [$sp + 480]
-+ swi $r5, [$sp + 484]
-+ swi $r5, [$sp + 488]
-+ swi $r5, [$sp + 492]
-+ swi $r5, [$sp + 496]
-+ swi $r5, [$sp + 500]
-+ swi $r5, [$sp + 504]
-+ swi $r5, [$sp + 508]
-+ swi $r6, [$sp + 0]
-+ swi $r6, [$sp + 4]
-+ swi $r6, [$sp + 8]
-+ swi $r6, [$sp + 12]
-+ swi $r6, [$sp + 16]
-+ swi $r6, [$sp + 20]
-+ swi $r6, [$sp + 24]
-+ swi $r6, [$sp + 28]
-+ swi $r6, [$sp + 32]
-+ swi $r6, [$sp + 36]
-+ swi $r6, [$sp + 40]
-+ swi $r6, [$sp + 44]
-+ swi $r6, [$sp + 48]
-+ swi $r6, [$sp + 52]
-+ swi $r6, [$sp + 56]
-+ swi $r6, [$sp + 60]
-+ swi $r6, [$sp + 64]
-+ swi $r6, [$sp + 68]
-+ swi $r6, [$sp + 72]
-+ swi $r6, [$sp + 76]
-+ swi $r6, [$sp + 80]
-+ swi $r6, [$sp + 84]
-+ swi $r6, [$sp + 88]
-+ swi $r6, [$sp + 92]
-+ swi $r6, [$sp + 96]
-+ swi $r6, [$sp + 100]
-+ swi $r6, [$sp + 104]
-+ swi $r6, [$sp + 108]
-+ swi $r6, [$sp + 112]
-+ swi $r6, [$sp + 116]
-+ swi $r6, [$sp + 120]
-+ swi $r6, [$sp + 124]
-+ swi $r6, [$sp + 128]
-+ swi $r6, [$sp + 132]
-+ swi $r6, [$sp + 136]
-+ swi $r6, [$sp + 140]
-+ swi $r6, [$sp + 144]
-+ swi $r6, [$sp + 148]
-+ swi $r6, [$sp + 152]
-+ swi $r6, [$sp + 156]
-+ swi $r6, [$sp + 160]
-+ swi $r6, [$sp + 164]
-+ swi $r6, [$sp + 168]
-+ swi $r6, [$sp + 172]
-+ swi $r6, [$sp + 176]
-+ swi $r6, [$sp + 180]
-+ swi $r6, [$sp + 184]
-+ swi $r6, [$sp + 188]
-+ swi $r6, [$sp + 192]
-+ swi $r6, [$sp + 196]
-+ swi $r6, [$sp + 200]
-+ swi $r6, [$sp + 204]
-+ swi $r6, [$sp + 208]
-+ swi $r6, [$sp + 212]
-+ swi $r6, [$sp + 216]
-+ swi $r6, [$sp + 220]
-+ swi $r6, [$sp + 224]
-+ swi $r6, [$sp + 228]
-+ swi $r6, [$sp + 232]
-+ swi $r6, [$sp + 236]
-+ swi $r6, [$sp + 240]
-+ swi $r6, [$sp + 244]
-+ swi $r6, [$sp + 248]
-+ swi $r6, [$sp + 252]
-+ swi $r6, [$sp + 256]
-+ swi $r6, [$sp + 260]
-+ swi $r6, [$sp + 264]
-+ swi $r6, [$sp + 268]
-+ swi $r6, [$sp + 272]
-+ swi $r6, [$sp + 276]
-+ swi $r6, [$sp + 280]
-+ swi $r6, [$sp + 284]
-+ swi $r6, [$sp + 288]
-+ swi $r6, [$sp + 292]
-+ swi $r6, [$sp + 296]
-+ swi $r6, [$sp + 300]
-+ swi $r6, [$sp + 304]
-+ swi $r6, [$sp + 308]
-+ swi $r6, [$sp + 312]
-+ swi $r6, [$sp + 316]
-+ swi $r6, [$sp + 320]
-+ swi $r6, [$sp + 324]
-+ swi $r6, [$sp + 328]
-+ swi $r6, [$sp + 332]
-+ swi $r6, [$sp + 336]
-+ swi $r6, [$sp + 340]
-+ swi $r6, [$sp + 344]
-+ swi $r6, [$sp + 348]
-+ swi $r6, [$sp + 352]
-+ swi $r6, [$sp + 356]
-+ swi $r6, [$sp + 360]
-+ swi $r6, [$sp + 364]
-+ swi $r6, [$sp + 368]
-+ swi $r6, [$sp + 372]
-+ swi $r6, [$sp + 376]
-+ swi $r6, [$sp + 380]
-+ swi $r6, [$sp + 384]
-+ swi $r6, [$sp + 388]
-+ swi $r6, [$sp + 392]
-+ swi $r6, [$sp + 396]
-+ swi $r6, [$sp + 400]
-+ swi $r6, [$sp + 404]
-+ swi $r6, [$sp + 408]
-+ swi $r6, [$sp + 412]
-+ swi $r6, [$sp + 416]
-+ swi $r6, [$sp + 420]
-+ swi $r6, [$sp + 424]
-+ swi $r6, [$sp + 428]
-+ swi $r6, [$sp + 432]
-+ swi $r6, [$sp + 436]
-+ swi $r6, [$sp + 440]
-+ swi $r6, [$sp + 444]
-+ swi $r6, [$sp + 448]
-+ swi $r6, [$sp + 452]
-+ swi $r6, [$sp + 456]
-+ swi $r6, [$sp + 460]
-+ swi $r6, [$sp + 464]
-+ swi $r6, [$sp + 468]
-+ swi $r6, [$sp + 472]
-+ swi $r6, [$sp + 476]
-+ swi $r6, [$sp + 480]
-+ swi $r6, [$sp + 484]
-+ swi $r6, [$sp + 488]
-+ swi $r6, [$sp + 492]
-+ swi $r6, [$sp + 496]
-+ swi $r6, [$sp + 500]
-+ swi $r6, [$sp + 504]
-+ swi $r6, [$sp + 508]
-+ swi $r7, [$sp + 0]
-+ swi $r7, [$sp + 4]
-+ swi $r7, [$sp + 8]
-+ swi $r7, [$sp + 12]
-+ swi $r7, [$sp + 16]
-+ swi $r7, [$sp + 20]
-+ swi $r7, [$sp + 24]
-+ swi $r7, [$sp + 28]
-+ swi $r7, [$sp + 32]
-+ swi $r7, [$sp + 36]
-+ swi $r7, [$sp + 40]
-+ swi $r7, [$sp + 44]
-+ swi $r7, [$sp + 48]
-+ swi $r7, [$sp + 52]
-+ swi $r7, [$sp + 56]
-+ swi $r7, [$sp + 60]
-+ swi $r7, [$sp + 64]
-+ swi $r7, [$sp + 68]
-+ swi $r7, [$sp + 72]
-+ swi $r7, [$sp + 76]
-+ swi $r7, [$sp + 80]
-+ swi $r7, [$sp + 84]
-+ swi $r7, [$sp + 88]
-+ swi $r7, [$sp + 92]
-+ swi $r7, [$sp + 96]
-+ swi $r7, [$sp + 100]
-+ swi $r7, [$sp + 104]
-+ swi $r7, [$sp + 108]
-+ swi $r7, [$sp + 112]
-+ swi $r7, [$sp + 116]
-+ swi $r7, [$sp + 120]
-+ swi $r7, [$sp + 124]
-+ swi $r7, [$sp + 128]
-+ swi $r7, [$sp + 132]
-+ swi $r7, [$sp + 136]
-+ swi $r7, [$sp + 140]
-+ swi $r7, [$sp + 144]
-+ swi $r7, [$sp + 148]
-+ swi $r7, [$sp + 152]
-+ swi $r7, [$sp + 156]
-+ swi $r7, [$sp + 160]
-+ swi $r7, [$sp + 164]
-+ swi $r7, [$sp + 168]
-+ swi $r7, [$sp + 172]
-+ swi $r7, [$sp + 176]
-+ swi $r7, [$sp + 180]
-+ swi $r7, [$sp + 184]
-+ swi $r7, [$sp + 188]
-+ swi $r7, [$sp + 192]
-+ swi $r7, [$sp + 196]
-+ swi $r7, [$sp + 200]
-+ swi $r7, [$sp + 204]
-+ swi $r7, [$sp + 208]
-+ swi $r7, [$sp + 212]
-+ swi $r7, [$sp + 216]
-+ swi $r7, [$sp + 220]
-+ swi $r7, [$sp + 224]
-+ swi $r7, [$sp + 228]
-+ swi $r7, [$sp + 232]
-+ swi $r7, [$sp + 236]
-+ swi $r7, [$sp + 240]
-+ swi $r7, [$sp + 244]
-+ swi $r7, [$sp + 248]
-+ swi $r7, [$sp + 252]
-+ swi $r7, [$sp + 256]
-+ swi $r7, [$sp + 260]
-+ swi $r7, [$sp + 264]
-+ swi $r7, [$sp + 268]
-+ swi $r7, [$sp + 272]
-+ swi $r7, [$sp + 276]
-+ swi $r7, [$sp + 280]
-+ swi $r7, [$sp + 284]
-+ swi $r7, [$sp + 288]
-+ swi $r7, [$sp + 292]
-+ swi $r7, [$sp + 296]
-+ swi $r7, [$sp + 300]
-+ swi $r7, [$sp + 304]
-+ swi $r7, [$sp + 308]
-+ swi $r7, [$sp + 312]
-+ swi $r7, [$sp + 316]
-+ swi $r7, [$sp + 320]
-+ swi $r7, [$sp + 324]
-+ swi $r7, [$sp + 328]
-+ swi $r7, [$sp + 332]
-+ swi $r7, [$sp + 336]
-+ swi $r7, [$sp + 340]
-+ swi $r7, [$sp + 344]
-+ swi $r7, [$sp + 348]
-+ swi $r7, [$sp + 352]
-+ swi $r7, [$sp + 356]
-+ swi $r7, [$sp + 360]
-+ swi $r7, [$sp + 364]
-+ swi $r7, [$sp + 368]
-+ swi $r7, [$sp + 372]
-+ swi $r7, [$sp + 376]
-+ swi $r7, [$sp + 380]
-+ swi $r7, [$sp + 384]
-+ swi $r7, [$sp + 388]
-+ swi $r7, [$sp + 392]
-+ swi $r7, [$sp + 396]
-+ swi $r7, [$sp + 400]
-+ swi $r7, [$sp + 404]
-+ swi $r7, [$sp + 408]
-+ swi $r7, [$sp + 412]
-+ swi $r7, [$sp + 416]
-+ swi $r7, [$sp + 420]
-+ swi $r7, [$sp + 424]
-+ swi $r7, [$sp + 428]
-+ swi $r7, [$sp + 432]
-+ swi $r7, [$sp + 436]
-+ swi $r7, [$sp + 440]
-+ swi $r7, [$sp + 444]
-+ swi $r7, [$sp + 448]
-+ swi $r7, [$sp + 452]
-+ swi $r7, [$sp + 456]
-+ swi $r7, [$sp + 460]
-+ swi $r7, [$sp + 464]
-+ swi $r7, [$sp + 468]
-+ swi $r7, [$sp + 472]
-+ swi $r7, [$sp + 476]
-+ swi $r7, [$sp + 480]
-+ swi $r7, [$sp + 484]
-+ swi $r7, [$sp + 488]
-+ swi $r7, [$sp + 492]
-+ swi $r7, [$sp + 496]
-+ swi $r7, [$sp + 500]
-+ swi $r7, [$sp + 504]
-+ swi $r7, [$sp + 508]
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/16-bit-v3.d binutils-2.24/gas/testsuite/gas/nds32/16-bit-v3.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/16-bit-v3.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/16-bit-v3.d 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,1290 @@
-+#objdump: -d --prefix-addresses
-+#name: nds32 convert 32 to 16 (v3 instructions)
-+#as: -Os -mno-reduced-regs
-+
-+# Test the convert 32bits to 16bits
-+
-+.*: file format .*
-+
-+
-+Disassembly of section .text:
-+0x00000000 .*
-+0x00000002 .*
-+0x00000004 .*
-+0x00000006 .*
-+0x00000008 .*
-+0x0000000a .*
-+0x0000000c .*
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-+0x00000010 .*
-+0x00000012 .*
-+0x00000014 .*
-+0x00000016 .*
-+0x00000018 .*
-+0x0000001a .*
-+0x0000001c .*
-+0x0000001e .*
-+0x00000020 .*
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-+0x0000002a .*
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-+0x00000064 .*
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-+0x00000070 .*
-+0x00000072 .*
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-+0x00000078 .*
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-+0x00000110 .*
-+0x00000112 .*
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-+0x00000116 .*
-+0x00000118 .*
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-+0x00000120 .*
-+0x00000122 .*
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-+0x0000012c .*
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-+0x00000130 .*
-+0x00000132 .*
-+0x00000134 .*
-+0x00000136 .*
-+0x00000138 .*
-+0x0000013a .*
-+0x0000013c .*
-+0x0000013e .*
-+0x00000140 .*
-+0x00000142 .*
-+0x00000144 .*
-+0x00000146 .*
-+0x00000148 .*
-+0x0000014a .*
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-+0x0000014e .*
-+0x00000150 .*
-+0x00000152 .*
-+0x00000154 .*
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-+0x00000158 .*
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-+0x00000162 .*
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-+0x00000166 .*
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-+0x00000170 .*
-+0x00000172 .*
-+0x00000174 .*
-+0x00000176 .*
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-+0x00000182 .*
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-+0x00000212 .*
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-+0x00000220 .*
-+0x00000222 .*
-+0x00000224 .*
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-+0x00000228 .*
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-+0x00000230 .*
-+0x00000232 .*
-+0x00000234 .*
-+0x00000236 .*
-+0x00000238 .*
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-+0x00000240 .*
-+0x00000242 .*
-+0x00000244 .*
-+0x00000246 .*
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-+0x00000250 .*
-+0x00000252 .*
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-+0x00000256 .*
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-+0x00000270 .*
-+0x00000272 .*
-+0x00000274 .*
-+0x00000276 .*
-+0x00000278 .*
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-+0x00000280 .*
-+0x00000282 .*
-+0x00000284 .*
-+0x00000286 .*
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-+0x00000868 .*
-+0x0000086a .*
-+0x0000086c .*
-+0x0000086e .*
-+0x00000870 .*
-+0x00000872 .*
-+0x00000874 .*
-+0x00000876 .*
-+0x00000878 .*
-+0x0000087a .*
-+0x0000087c .*
-+0x0000087e .*
-+0x00000880 .*
-+0x00000882 .*
-+0x00000884 .*
-+0x00000886 .*
-+0x00000888 .*
-+0x0000088a .*
-+0x0000088c .*
-+0x0000088e .*
-+0x00000890 .*
-+0x00000892 .*
-+0x00000894 .*
-+0x00000896 .*
-+0x00000898 .*
-+0x0000089a .*
-+0x0000089c .*
-+0x0000089e .*
-+0x000008a0 .*
-+0x000008a2 .*
-+0x000008a4 .*
-+0x000008a6 .*
-+0x000008a8 .*
-+0x000008aa .*
-+0x000008ac .*
-+0x000008ae .*
-+0x000008b0 .*
-+0x000008b2 .*
-+0x000008b4 .*
-+0x000008b6 .*
-+0x000008b8 .*
-+0x000008ba .*
-+0x000008bc .*
-+0x000008be .*
-+0x000008c0 .*
-+0x000008c2 .*
-+0x000008c4 .*
-+0x000008c6 .*
-+0x000008c8 .*
-+0x000008ca .*
-+0x000008cc .*
-+0x000008ce .*
-+0x000008d0 .*
-+0x000008d2 .*
-+0x000008d4 .*
-+0x000008d6 .*
-+0x000008d8 .*
-+0x000008da .*
-+0x000008dc .*
-+0x000008de .*
-+0x000008e0 .*
-+0x000008e2 .*
-+0x000008e4 .*
-+0x000008e6 .*
-+0x000008e8 .*
-+0x000008ea .*
-+0x000008ec .*
-+0x000008ee .*
-+0x000008f0 .*
-+0x000008f2 .*
-+0x000008f4 .*
-+0x000008f6 .*
-+0x000008f8 .*
-+0x000008fa .*
-+0x000008fc .*
-+0x000008fe .*
-+0x00000900 .*
-+0x00000902 .*
-+0x00000904 .*
-+0x00000906 .*
-+0x00000908 .*
-+0x0000090a .*
-+0x0000090c .*
-+0x0000090e .*
-+0x00000910 .*
-+0x00000912 .*
-+0x00000914 .*
-+0x00000916 .*
-+0x00000918 .*
-+0x0000091a .*
-+0x0000091c .*
-+0x0000091e .*
-+0x00000920 .*
-+0x00000922 .*
-+0x00000924 .*
-+0x00000926 .*
-+0x00000928 .*
-+0x0000092a .*
-+0x0000092c .*
-+0x0000092e .*
-+0x00000930 .*
-+0x00000932 .*
-+0x00000934 .*
-+0x00000936 .*
-+0x00000938 .*
-+0x0000093a .*
-+0x0000093c .*
-+0x0000093e .*
-+0x00000940 .*
-+0x00000942 .*
-+0x00000944 .*
-+0x00000946 .*
-+0x00000948 .*
-+0x0000094a .*
-+0x0000094c .*
-+0x0000094e .*
-+0x00000950 .*
-+0x00000952 .*
-+0x00000954 .*
-+0x00000956 .*
-+0x00000958 .*
-+0x0000095a .*
-+0x0000095c .*
-+0x0000095e .*
-+0x00000960 .*
-+0x00000962 .*
-+0x00000964 .*
-+0x00000966 .*
-+0x00000968 .*
-+0x0000096a .*
-+0x0000096c .*
-+0x0000096e .*
-+0x00000970 .*
-+0x00000972 .*
-+0x00000974 .*
-+0x00000976 .*
-+0x00000978 .*
-+0x0000097a .*
-+0x0000097c .*
-+0x0000097e .*
-+0x00000980 .*
-+0x00000982 .*
-+0x00000984 .*
-+0x00000986 .*
-+0x00000988 .*
-+0x0000098a .*
-+0x0000098c .*
-+0x0000098e .*
-+0x00000990 .*
-+0x00000992 .*
-+0x00000994 .*
-+0x00000996 .*
-+0x00000998 .*
-+0x0000099a .*
-+0x0000099c .*
-+0x0000099e .*
-+0x000009a0 .*
-+0x000009a2 .*
-+0x000009a4 .*
-+0x000009a6 .*
-+0x000009a8 .*
-+0x000009aa .*
-+0x000009ac .*
-+0x000009ae .*
-+0x000009b0 .*
-+0x000009b2 .*
-+0x000009b4 .*
-+0x000009b6 .*
-+0x000009b8 .*
-+0x000009ba .*
-+0x000009bc .*
-+0x000009be .*
-+0x000009c0 .*
-+0x000009c2 .*
-+0x000009c4 .*
-+0x000009c6 .*
-+0x000009c8 .*
-+0x000009ca .*
-+0x000009cc .*
-+0x000009ce .*
-+0x000009d0 .*
-+0x000009d2 .*
-+0x000009d4 .*
-+0x000009d6 .*
-+0x000009d8 .*
-+0x000009da .*
-+0x000009dc .*
-+0x000009de .*
-+0x000009e0 .*
-+0x000009e2 .*
-+0x000009e4 .*
-+0x000009e6 .*
-+0x000009e8 .*
-+0x000009ea .*
-+0x000009ec .*
-+0x000009ee .*
-+0x000009f0 .*
-+0x000009f2 .*
-+0x000009f4 .*
-+0x000009f6 .*
-+0x000009f8 .*
-+0x000009fa .*
-+0x000009fc .*
-+0x000009fe .*
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/16-bit-v3.s binutils-2.24/gas/testsuite/gas/nds32/16-bit-v3.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/16-bit-v3.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/16-bit-v3.s 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,1282 @@
-+! v3*
-+ andi $r0, $r0, 1
-+ andi $r0, $r0, 2
-+ andi $r0, $r0, 4
-+ andi $r0, $r0, 8
-+ andi $r0, $r0, 16
-+ andi $r0, $r0, 32
-+ andi $r0, $r0, 64
-+ andi $r0, $r0, 128
-+ andi $r1, $r1, 1
-+ andi $r1, $r1, 2
-+ andi $r1, $r1, 4
-+ andi $r1, $r1, 8
-+ andi $r1, $r1, 16
-+ andi $r1, $r1, 32
-+ andi $r1, $r1, 64
-+ andi $r1, $r1, 128
-+ andi $r2, $r2, 1
-+ andi $r2, $r2, 2
-+ andi $r2, $r2, 4
-+ andi $r2, $r2, 8
-+ andi $r2, $r2, 16
-+ andi $r2, $r2, 32
-+ andi $r2, $r2, 64
-+ andi $r2, $r2, 128
-+ andi $r3, $r3, 1
-+ andi $r3, $r3, 2
-+ andi $r3, $r3, 4
-+ andi $r3, $r3, 8
-+ andi $r3, $r3, 16
-+ andi $r3, $r3, 32
-+ andi $r3, $r3, 64
-+ andi $r3, $r3, 128
-+ andi $r4, $r4, 1
-+ andi $r4, $r4, 2
-+ andi $r4, $r4, 4
-+ andi $r4, $r4, 8
-+ andi $r4, $r4, 16
-+ andi $r4, $r4, 32
-+ andi $r4, $r4, 64
-+ andi $r4, $r4, 128
-+ andi $r5, $r5, 1
-+ andi $r5, $r5, 2
-+ andi $r5, $r5, 4
-+ andi $r5, $r5, 8
-+ andi $r5, $r5, 16
-+ andi $r5, $r5, 32
-+ andi $r5, $r5, 64
-+ andi $r5, $r5, 128
-+ andi $r6, $r6, 1
-+ andi $r6, $r6, 2
-+ andi $r6, $r6, 4
-+ andi $r6, $r6, 8
-+ andi $r6, $r6, 16
-+ andi $r6, $r6, 32
-+ andi $r6, $r6, 64
-+ andi $r6, $r6, 128
-+ andi $r7, $r7, 1
-+ andi $r7, $r7, 2
-+ andi $r7, $r7, 4
-+ andi $r7, $r7, 8
-+ andi $r7, $r7, 16
-+ andi $r7, $r7, 32
-+ andi $r7, $r7, 64
-+ andi $r7, $r7, 128
-+ andi $r0, $r0, 1
-+ andi $r0, $r0, 3
-+ andi $r0, $r0, 7
-+ andi $r0, $r0, 15
-+ andi $r0, $r0, 31
-+ andi $r0, $r0, 63
-+ andi $r0, $r0, 127
-+ andi $r0, $r0, 255
-+ andi $r1, $r1, 1
-+ andi $r1, $r1, 3
-+ andi $r1, $r1, 7
-+ andi $r1, $r1, 15
-+ andi $r1, $r1, 31
-+ andi $r1, $r1, 63
-+ andi $r1, $r1, 127
-+ andi $r1, $r1, 255
-+ andi $r2, $r2, 1
-+ andi $r2, $r2, 3
-+ andi $r2, $r2, 7
-+ andi $r2, $r2, 15
-+ andi $r2, $r2, 31
-+ andi $r2, $r2, 63
-+ andi $r2, $r2, 127
-+ andi $r2, $r2, 255
-+ andi $r3, $r3, 1
-+ andi $r3, $r3, 3
-+ andi $r3, $r3, 7
-+ andi $r3, $r3, 15
-+ andi $r3, $r3, 31
-+ andi $r3, $r3, 63
-+ andi $r3, $r3, 127
-+ andi $r3, $r3, 255
-+ andi $r4, $r4, 1
-+ andi $r4, $r4, 3
-+ andi $r4, $r4, 7
-+ andi $r4, $r4, 15
-+ andi $r4, $r4, 31
-+ andi $r4, $r4, 63
-+ andi $r4, $r4, 127
-+ andi $r4, $r4, 255
-+ andi $r5, $r5, 1
-+ andi $r5, $r5, 3
-+ andi $r5, $r5, 7
-+ andi $r5, $r5, 15
-+ andi $r5, $r5, 31
-+ andi $r5, $r5, 63
-+ andi $r5, $r5, 127
-+ andi $r5, $r5, 255
-+ andi $r6, $r6, 1
-+ andi $r6, $r6, 3
-+ andi $r6, $r6, 7
-+ andi $r6, $r6, 15
-+ andi $r6, $r6, 31
-+ andi $r6, $r6, 63
-+ andi $r6, $r6, 127
-+ andi $r6, $r6, 255
-+ andi $r7, $r7, 1
-+ andi $r7, $r7, 3
-+ andi $r7, $r7, 7
-+ andi $r7, $r7, 15
-+ andi $r7, $r7, 31
-+ andi $r7, $r7, 63
-+ andi $r7, $r7, 127
-+ andi $r7, $r7, 255
-+ movi $r0, 16
-+ movi $r0, lo20(16)
-+ movi $r0, 17
-+ movi $r0, 18
-+ movi $r0, 19
-+ movi $r0, 20
-+ movi $r0, 21
-+ movi $r0, 22
-+ movi $r0, 23
-+ movi $r0, 24
-+ movi $r0, 25
-+ movi $r0, 26
-+ movi $r0, 27
-+ movi $r0, 28
-+ movi $r0, 29
-+ movi $r0, 30
-+ movi $r0, 31
-+ movi $r0, 32
-+ movi $r0, 33
-+ movi $r0, 34
-+ movi $r0, 35
-+ movi $r0, 36
-+ movi $r0, 37
-+ movi $r0, 38
-+ movi $r0, 39
-+ movi $r0, 40
-+ movi $r0, 41
-+ movi $r0, 42
-+ movi $r0, 43
-+ movi $r0, 44
-+ movi $r0, 45
-+ movi $r0, 46
-+ movi $r0, 47
-+ movi $r1, 16
-+ movi $r1, 17
-+ movi $r1, 18
-+ movi $r1, 19
-+ movi $r1, 20
-+ movi $r1, 21
-+ movi $r1, 22
-+ movi $r1, 23
-+ movi $r1, 24
-+ movi $r1, 25
-+ movi $r1, 26
-+ movi $r1, 27
-+ movi $r1, 28
-+ movi $r1, 29
-+ movi $r1, 30
-+ movi $r1, 31
-+ movi $r1, 32
-+ movi $r1, 33
-+ movi $r1, 34
-+ movi $r1, 35
-+ movi $r1, 36
-+ movi $r1, 37
-+ movi $r1, 38
-+ movi $r1, 39
-+ movi $r1, 40
-+ movi $r1, 41
-+ movi $r1, 42
-+ movi $r1, 43
-+ movi $r1, 44
-+ movi $r1, 45
-+ movi $r1, 46
-+ movi $r1, 47
-+ movi $r2, 16
-+ movi $r2, 17
-+ movi $r2, 18
-+ movi $r2, 19
-+ movi $r2, 20
-+ movi $r2, 21
-+ movi $r2, 22
-+ movi $r2, 23
-+ movi $r2, 24
-+ movi $r2, 25
-+ movi $r2, 26
-+ movi $r2, 27
-+ movi $r2, 28
-+ movi $r2, 29
-+ movi $r2, 30
-+ movi $r2, 31
-+ movi $r2, 32
-+ movi $r2, 33
-+ movi $r2, 34
-+ movi $r2, 35
-+ movi $r2, 36
-+ movi $r2, 37
-+ movi $r2, 38
-+ movi $r2, 39
-+ movi $r2, 40
-+ movi $r2, 41
-+ movi $r2, 42
-+ movi $r2, 43
-+ movi $r2, 44
-+ movi $r2, 45
-+ movi $r2, 46
-+ movi $r2, 47
-+ movi $r3, 16
-+ movi $r3, 17
-+ movi $r3, 18
-+ movi $r3, 19
-+ movi $r3, 20
-+ movi $r3, 21
-+ movi $r3, 22
-+ movi $r3, 23
-+ movi $r3, 24
-+ movi $r3, 25
-+ movi $r3, 26
-+ movi $r3, 27
-+ movi $r3, 28
-+ movi $r3, 29
-+ movi $r3, 30
-+ movi $r3, 31
-+ movi $r3, 32
-+ movi $r3, 33
-+ movi $r3, 34
-+ movi $r3, 35
-+ movi $r3, 36
-+ movi $r3, 37
-+ movi $r3, 38
-+ movi $r3, 39
-+ movi $r3, 40
-+ movi $r3, 41
-+ movi $r3, 42
-+ movi $r3, 43
-+ movi $r3, 44
-+ movi $r3, 45
-+ movi $r3, 46
-+ movi $r3, 47
-+ movi $r4, 16
-+ movi $r4, 17
-+ movi $r4, 18
-+ movi $r4, 19
-+ movi $r4, 20
-+ movi $r4, 21
-+ movi $r4, 22
-+ movi $r4, 23
-+ movi $r4, 24
-+ movi $r4, 25
-+ movi $r4, 26
-+ movi $r4, 27
-+ movi $r4, 28
-+ movi $r4, 29
-+ movi $r4, 30
-+ movi $r4, 31
-+ movi $r4, 32
-+ movi $r4, 33
-+ movi $r4, 34
-+ movi $r4, 35
-+ movi $r4, 36
-+ movi $r4, 37
-+ movi $r4, 38
-+ movi $r4, 39
-+ movi $r4, 40
-+ movi $r4, 41
-+ movi $r4, 42
-+ movi $r4, 43
-+ movi $r4, 44
-+ movi $r4, 45
-+ movi $r4, 46
-+ movi $r4, 47
-+ movi $r5, 16
-+ movi $r5, 17
-+ movi $r5, 18
-+ movi $r5, 19
-+ movi $r5, 20
-+ movi $r5, 21
-+ movi $r5, 22
-+ movi $r5, 23
-+ movi $r5, 24
-+ movi $r5, 25
-+ movi $r5, 26
-+ movi $r5, 27
-+ movi $r5, 28
-+ movi $r5, 29
-+ movi $r5, 30
-+ movi $r5, 31
-+ movi $r5, 32
-+ movi $r5, 33
-+ movi $r5, 34
-+ movi $r5, 35
-+ movi $r5, 36
-+ movi $r5, 37
-+ movi $r5, 38
-+ movi $r5, 39
-+ movi $r5, 40
-+ movi $r5, 41
-+ movi $r5, 42
-+ movi $r5, 43
-+ movi $r5, 44
-+ movi $r5, 45
-+ movi $r5, 46
-+ movi $r5, 47
-+ movi $r6, 16
-+ movi $r6, 17
-+ movi $r6, 18
-+ movi $r6, 19
-+ movi $r6, 20
-+ movi $r6, 21
-+ movi $r6, 22
-+ movi $r6, 23
-+ movi $r6, 24
-+ movi $r6, 25
-+ movi $r6, 26
-+ movi $r6, 27
-+ movi $r6, 28
-+ movi $r6, 29
-+ movi $r6, 30
-+ movi $r6, 31
-+ movi $r6, 32
-+ movi $r6, 33
-+ movi $r6, 34
-+ movi $r6, 35
-+ movi $r6, 36
-+ movi $r6, 37
-+ movi $r6, 38
-+ movi $r6, 39
-+ movi $r6, 40
-+ movi $r6, 41
-+ movi $r6, 42
-+ movi $r6, 43
-+ movi $r6, 44
-+ movi $r6, 45
-+ movi $r6, 46
-+ movi $r6, 47
-+ movi $r7, 16
-+ movi $r7, 17
-+ movi $r7, 18
-+ movi $r7, 19
-+ movi $r7, 20
-+ movi $r7, 21
-+ movi $r7, 22
-+ movi $r7, 23
-+ movi $r7, 24
-+ movi $r7, 25
-+ movi $r7, 26
-+ movi $r7, 27
-+ movi $r7, 28
-+ movi $r7, 29
-+ movi $r7, 30
-+ movi $r7, 31
-+ movi $r7, 32
-+ movi $r7, 33
-+ movi $r7, 34
-+ movi $r7, 35
-+ movi $r7, 36
-+ movi $r7, 37
-+ movi $r7, 38
-+ movi $r7, 39
-+ movi $r7, 40
-+ movi $r7, 41
-+ movi $r7, 42
-+ movi $r7, 43
-+ movi $r7, 44
-+ movi $r7, 45
-+ movi $r7, 46
-+ movi $r7, 47
-+ movi $r8, 16
-+ movi $r8, 17
-+ movi $r8, 18
-+ movi $r8, 19
-+ movi $r8, 20
-+ movi $r8, 21
-+ movi $r8, 22
-+ movi $r8, 23
-+ movi $r8, 24
-+ movi $r8, 25
-+ movi $r8, 26
-+ movi $r8, 27
-+ movi $r8, 28
-+ movi $r8, 29
-+ movi $r8, 30
-+ movi $r8, 31
-+ movi $r8, 32
-+ movi $r8, 33
-+ movi $r8, 34
-+ movi $r8, 35
-+ movi $r8, 36
-+ movi $r8, 37
-+ movi $r8, 38
-+ movi $r8, 39
-+ movi $r8, 40
-+ movi $r8, 41
-+ movi $r8, 42
-+ movi $r8, 43
-+ movi $r8, 44
-+ movi $r8, 45
-+ movi $r8, 46
-+ movi $r8, 47
-+ movi $r9, 16
-+ movi $r9, 17
-+ movi $r9, 18
-+ movi $r9, 19
-+ movi $r9, 20
-+ movi $r9, 21
-+ movi $r9, 22
-+ movi $r9, 23
-+ movi $r9, 24
-+ movi $r9, 25
-+ movi $r9, 26
-+ movi $r9, 27
-+ movi $r9, 28
-+ movi $r9, 29
-+ movi $r9, 30
-+ movi $r9, 31
-+ movi $r9, 32
-+ movi $r9, 33
-+ movi $r9, 34
-+ movi $r9, 35
-+ movi $r9, 36
-+ movi $r9, 37
-+ movi $r9, 38
-+ movi $r9, 39
-+ movi $r9, 40
-+ movi $r9, 41
-+ movi $r9, 42
-+ movi $r9, 43
-+ movi $r9, 44
-+ movi $r9, 45
-+ movi $r9, 46
-+ movi $r9, 47
-+ movi $r10, 16
-+ movi $r10, 17
-+ movi $r10, 18
-+ movi $r10, 19
-+ movi $r10, 20
-+ movi $r10, 21
-+ movi $r10, 22
-+ movi $r10, 23
-+ movi $r10, 24
-+ movi $r10, 25
-+ movi $r10, 26
-+ movi $r10, 27
-+ movi $r10, 28
-+ movi $r10, 29
-+ movi $r10, 30
-+ movi $r10, 31
-+ movi $r10, 32
-+ movi $r10, 33
-+ movi $r10, 34
-+ movi $r10, 35
-+ movi $r10, 36
-+ movi $r10, 37
-+ movi $r10, 38
-+ movi $r10, 39
-+ movi $r10, 40
-+ movi $r10, 41
-+ movi $r10, 42
-+ movi $r10, 43
-+ movi $r10, 44
-+ movi $r10, 45
-+ movi $r10, 46
-+ movi $r10, 47
-+ movi $r11, 16
-+ movi $r11, 17
-+ movi $r11, 18
-+ movi $r11, 19
-+ movi $r11, 20
-+ movi $r11, 21
-+ movi $r11, 22
-+ movi $r11, 23
-+ movi $r11, 24
-+ movi $r11, 25
-+ movi $r11, 26
-+ movi $r11, 27
-+ movi $r11, 28
-+ movi $r11, 29
-+ movi $r11, 30
-+ movi $r11, 31
-+ movi $r11, 32
-+ movi $r11, 33
-+ movi $r11, 34
-+ movi $r11, 35
-+ movi $r11, 36
-+ movi $r11, 37
-+ movi $r11, 38
-+ movi $r11, 39
-+ movi $r11, 40
-+ movi $r11, 41
-+ movi $r11, 42
-+ movi $r11, 43
-+ movi $r11, 44
-+ movi $r11, 45
-+ movi $r11, 46
-+ movi $r11, 47
-+ movi $r16, 16
-+ movi $r16, 17
-+ movi $r16, 18
-+ movi $r16, 19
-+ movi $r16, 20
-+ movi $r16, 21
-+ movi $r16, 22
-+ movi $r16, 23
-+ movi $r16, 24
-+ movi $r16, 25
-+ movi $r16, 26
-+ movi $r16, 27
-+ movi $r16, 28
-+ movi $r16, 29
-+ movi $r16, 30
-+ movi $r16, 31
-+ movi $r16, 32
-+ movi $r16, 33
-+ movi $r16, 34
-+ movi $r16, 35
-+ movi $r16, 36
-+ movi $r16, 37
-+ movi $r16, 38
-+ movi $r16, 39
-+ movi $r16, 40
-+ movi $r16, 41
-+ movi $r16, 42
-+ movi $r16, 43
-+ movi $r16, 44
-+ movi $r16, 45
-+ movi $r16, 46
-+ movi $r16, 47
-+ movi $r17, 16
-+ movi $r17, 17
-+ movi $r17, 18
-+ movi $r17, 19
-+ movi $r17, 20
-+ movi $r17, 21
-+ movi $r17, 22
-+ movi $r17, 23
-+ movi $r17, 24
-+ movi $r17, 25
-+ movi $r17, 26
-+ movi $r17, 27
-+ movi $r17, 28
-+ movi $r17, 29
-+ movi $r17, 30
-+ movi $r17, 31
-+ movi $r17, 32
-+ movi $r17, 33
-+ movi $r17, 34
-+ movi $r17, 35
-+ movi $r17, 36
-+ movi $r17, 37
-+ movi $r17, 38
-+ movi $r17, 39
-+ movi $r17, 40
-+ movi $r17, 41
-+ movi $r17, 42
-+ movi $r17, 43
-+ movi $r17, 44
-+ movi $r17, 45
-+ movi $r17, 46
-+ movi $r17, 47
-+ movi $r18, 16
-+ movi $r18, 17
-+ movi $r18, 18
-+ movi $r18, 19
-+ movi $r18, 20
-+ movi $r18, 21
-+ movi $r18, 22
-+ movi $r18, 23
-+ movi $r18, 24
-+ movi $r18, 25
-+ movi $r18, 26
-+ movi $r18, 27
-+ movi $r18, 28
-+ movi $r18, 29
-+ movi $r18, 30
-+ movi $r18, 31
-+ movi $r18, 32
-+ movi $r18, 33
-+ movi $r18, 34
-+ movi $r18, 35
-+ movi $r18, 36
-+ movi $r18, 37
-+ movi $r18, 38
-+ movi $r18, 39
-+ movi $r18, 40
-+ movi $r18, 41
-+ movi $r18, 42
-+ movi $r18, 43
-+ movi $r18, 44
-+ movi $r18, 45
-+ movi $r18, 46
-+ movi $r18, 47
-+ movi $r19, 16
-+ movi $r19, 17
-+ movi $r19, 18
-+ movi $r19, 19
-+ movi $r19, 20
-+ movi $r19, 21
-+ movi $r19, 22
-+ movi $r19, 23
-+ movi $r19, 24
-+ movi $r19, 25
-+ movi $r19, 26
-+ movi $r19, 27
-+ movi $r19, 28
-+ movi $r19, 29
-+ movi $r19, 30
-+ movi $r19, 31
-+ movi $r19, 32
-+ movi $r19, 33
-+ movi $r19, 34
-+ movi $r19, 35
-+ movi $r19, 36
-+ movi $r19, 37
-+ movi $r19, 38
-+ movi $r19, 39
-+ movi $r19, 40
-+ movi $r19, 41
-+ movi $r19, 42
-+ movi $r19, 43
-+ movi $r19, 44
-+ movi $r19, 45
-+ movi $r19, 46
-+ movi $r19, 47
-+ subri $r0, $r0, 0
-+ subri $r0, $r1, 0
-+ subri $r0, $r2, 0
-+ subri $r0, $r3, 0
-+ subri $r0, $r4, 0
-+ subri $r0, $r5, 0
-+ subri $r0, $r6, 0
-+ subri $r0, $r7, 0
-+ subri $r1, $r0, 0
-+ subri $r1, $r1, 0
-+ subri $r1, $r2, 0
-+ subri $r1, $r3, 0
-+ subri $r1, $r4, 0
-+ subri $r1, $r5, 0
-+ subri $r1, $r6, 0
-+ subri $r1, $r7, 0
-+ subri $r2, $r0, 0
-+ subri $r2, $r1, 0
-+ subri $r2, $r2, 0
-+ subri $r2, $r3, 0
-+ subri $r2, $r4, 0
-+ subri $r2, $r5, 0
-+ subri $r2, $r6, 0
-+ subri $r2, $r7, 0
-+ subri $r3, $r0, 0
-+ subri $r3, $r1, 0
-+ subri $r3, $r2, 0
-+ subri $r3, $r3, 0
-+ subri $r3, $r4, 0
-+ subri $r3, $r5, 0
-+ subri $r3, $r6, 0
-+ subri $r3, $r7, 0
-+ subri $r4, $r0, 0
-+ subri $r4, $r1, 0
-+ subri $r4, $r2, 0
-+ subri $r4, $r3, 0
-+ subri $r4, $r4, 0
-+ subri $r4, $r5, 0
-+ subri $r4, $r6, 0
-+ subri $r4, $r7, 0
-+ subri $r5, $r0, 0
-+ subri $r5, $r1, 0
-+ subri $r5, $r2, 0
-+ subri $r5, $r3, 0
-+ subri $r5, $r4, 0
-+ subri $r5, $r5, 0
-+ subri $r5, $r6, 0
-+ subri $r5, $r7, 0
-+ subri $r6, $r0, 0
-+ subri $r6, $r1, 0
-+ subri $r6, $r2, 0
-+ subri $r6, $r3, 0
-+ subri $r6, $r4, 0
-+ subri $r6, $r5, 0
-+ subri $r6, $r6, 0
-+ subri $r6, $r7, 0
-+ subri $r7, $r0, 0
-+ subri $r7, $r1, 0
-+ subri $r7, $r2, 0
-+ subri $r7, $r3, 0
-+ subri $r7, $r4, 0
-+ subri $r7, $r5, 0
-+ subri $r7, $r6, 0
-+ subri $r7, $r7, 0
-+ nor $r0, $r0, $r0
-+ nor $r0, $r1, $r1
-+ nor $r0, $r2, $r2
-+ nor $r0, $r3, $r3
-+ nor $r0, $r4, $r4
-+ nor $r0, $r5, $r5
-+ nor $r0, $r6, $r6
-+ nor $r0, $r7, $r7
-+ nor $r1, $r0, $r0
-+ nor $r1, $r1, $r1
-+ nor $r1, $r2, $r2
-+ nor $r1, $r3, $r3
-+ nor $r1, $r4, $r4
-+ nor $r1, $r5, $r5
-+ nor $r1, $r6, $r6
-+ nor $r1, $r7, $r7
-+ nor $r2, $r0, $r0
-+ nor $r2, $r1, $r1
-+ nor $r2, $r2, $r2
-+ nor $r2, $r3, $r3
-+ nor $r2, $r4, $r4
-+ nor $r2, $r5, $r5
-+ nor $r2, $r6, $r6
-+ nor $r2, $r7, $r7
-+ nor $r3, $r0, $r0
-+ nor $r3, $r1, $r1
-+ nor $r3, $r2, $r2
-+ nor $r3, $r3, $r3
-+ nor $r3, $r4, $r4
-+ nor $r3, $r5, $r5
-+ nor $r3, $r6, $r6
-+ nor $r3, $r7, $r7
-+ nor $r4, $r0, $r0
-+ nor $r4, $r1, $r1
-+ nor $r4, $r2, $r2
-+ nor $r4, $r3, $r3
-+ nor $r4, $r4, $r4
-+ nor $r4, $r5, $r5
-+ nor $r4, $r6, $r6
-+ nor $r4, $r7, $r7
-+ nor $r5, $r0, $r0
-+ nor $r5, $r1, $r1
-+ nor $r5, $r2, $r2
-+ nor $r5, $r3, $r3
-+ nor $r5, $r4, $r4
-+ nor $r5, $r5, $r5
-+ nor $r5, $r6, $r6
-+ nor $r5, $r7, $r7
-+ nor $r6, $r0, $r0
-+ nor $r6, $r1, $r1
-+ nor $r6, $r2, $r2
-+ nor $r6, $r3, $r3
-+ nor $r6, $r4, $r4
-+ nor $r6, $r5, $r5
-+ nor $r6, $r6, $r6
-+ nor $r6, $r7, $r7
-+ nor $r7, $r0, $r0
-+ nor $r7, $r1, $r1
-+ nor $r7, $r2, $r2
-+ nor $r7, $r3, $r3
-+ nor $r7, $r4, $r4
-+ nor $r7, $r5, $r5
-+ nor $r7, $r6, $r6
-+ nor $r7, $r7, $r7
-+ mul $r0, $r0, $r0
-+ mul $r0, $r0, $r1
-+ mul $r0, $r0, $r2
-+ mul $r0, $r0, $r3
-+ mul $r0, $r0, $r4
-+ mul $r0, $r0, $r5
-+ mul $r0, $r0, $r6
-+ mul $r0, $r0, $r7
-+ mul $r1, $r1, $r0
-+ mul $r1, $r1, $r1
-+ mul $r1, $r1, $r2
-+ mul $r1, $r1, $r3
-+ mul $r1, $r1, $r4
-+ mul $r1, $r1, $r5
-+ mul $r1, $r1, $r6
-+ mul $r1, $r1, $r7
-+ mul $r2, $r2, $r0
-+ mul $r2, $r2, $r1
-+ mul $r2, $r2, $r2
-+ mul $r2, $r2, $r3
-+ mul $r2, $r2, $r4
-+ mul $r2, $r2, $r5
-+ mul $r2, $r2, $r6
-+ mul $r2, $r2, $r7
-+ mul $r3, $r3, $r0
-+ mul $r3, $r3, $r1
-+ mul $r3, $r3, $r2
-+ mul $r3, $r3, $r3
-+ mul $r3, $r3, $r4
-+ mul $r3, $r3, $r5
-+ mul $r3, $r3, $r6
-+ mul $r3, $r3, $r7
-+ mul $r4, $r4, $r0
-+ mul $r4, $r4, $r1
-+ mul $r4, $r4, $r2
-+ mul $r4, $r4, $r3
-+ mul $r4, $r4, $r4
-+ mul $r4, $r4, $r5
-+ mul $r4, $r4, $r6
-+ mul $r4, $r4, $r7
-+ mul $r5, $r5, $r0
-+ mul $r5, $r5, $r1
-+ mul $r5, $r5, $r2
-+ mul $r5, $r5, $r3
-+ mul $r5, $r5, $r4
-+ mul $r5, $r5, $r5
-+ mul $r5, $r5, $r6
-+ mul $r5, $r5, $r7
-+ mul $r6, $r6, $r0
-+ mul $r6, $r6, $r1
-+ mul $r6, $r6, $r2
-+ mul $r6, $r6, $r3
-+ mul $r6, $r6, $r4
-+ mul $r6, $r6, $r5
-+ mul $r6, $r6, $r6
-+ mul $r6, $r6, $r7
-+ mul $r7, $r7, $r0
-+ mul $r7, $r7, $r1
-+ mul $r7, $r7, $r2
-+ mul $r7, $r7, $r3
-+ mul $r7, $r7, $r4
-+ mul $r7, $r7, $r5
-+ mul $r7, $r7, $r6
-+ mul $r7, $r7, $r7
-+ mul $r0, $r0, $r0
-+ mul $r0, $r1, $r0
-+ mul $r0, $r2, $r0
-+ mul $r0, $r3, $r0
-+ mul $r0, $r4, $r0
-+ mul $r0, $r5, $r0
-+ mul $r0, $r6, $r0
-+ mul $r0, $r7, $r0
-+ mul $r1, $r0, $r1
-+ mul $r1, $r1, $r1
-+ mul $r1, $r2, $r1
-+ mul $r1, $r3, $r1
-+ mul $r1, $r4, $r1
-+ mul $r1, $r5, $r1
-+ mul $r1, $r6, $r1
-+ mul $r1, $r7, $r1
-+ mul $r2, $r0, $r2
-+ mul $r2, $r1, $r2
-+ mul $r2, $r2, $r2
-+ mul $r2, $r3, $r2
-+ mul $r2, $r4, $r2
-+ mul $r2, $r5, $r2
-+ mul $r2, $r6, $r2
-+ mul $r2, $r7, $r2
-+ mul $r3, $r0, $r3
-+ mul $r3, $r1, $r3
-+ mul $r3, $r2, $r3
-+ mul $r3, $r3, $r3
-+ mul $r3, $r4, $r3
-+ mul $r3, $r5, $r3
-+ mul $r3, $r6, $r3
-+ mul $r3, $r7, $r3
-+ mul $r4, $r0, $r4
-+ mul $r4, $r1, $r4
-+ mul $r4, $r2, $r4
-+ mul $r4, $r3, $r4
-+ mul $r4, $r4, $r4
-+ mul $r4, $r5, $r4
-+ mul $r4, $r6, $r4
-+ mul $r4, $r7, $r4
-+ mul $r5, $r0, $r5
-+ mul $r5, $r1, $r5
-+ mul $r5, $r2, $r5
-+ mul $r5, $r3, $r5
-+ mul $r5, $r4, $r5
-+ mul $r5, $r5, $r5
-+ mul $r5, $r6, $r5
-+ mul $r5, $r7, $r5
-+ mul $r6, $r0, $r6
-+ mul $r6, $r1, $r6
-+ mul $r6, $r2, $r6
-+ mul $r6, $r3, $r6
-+ mul $r6, $r4, $r6
-+ mul $r6, $r5, $r6
-+ mul $r6, $r6, $r6
-+ mul $r6, $r7, $r6
-+ mul $r7, $r0, $r7
-+ mul $r7, $r1, $r7
-+ mul $r7, $r2, $r7
-+ mul $r7, $r3, $r7
-+ mul $r7, $r4, $r7
-+ mul $r7, $r5, $r7
-+ mul $r7, $r6, $r7
-+ mul $r7, $r7, $r7
-+ xor $r0, $r0, $r0
-+ xor $r0, $r0, $r1
-+ xor $r0, $r0, $r2
-+ xor $r0, $r0, $r3
-+ xor $r0, $r0, $r4
-+ xor $r0, $r0, $r5
-+ xor $r0, $r0, $r6
-+ xor $r0, $r0, $r7
-+ xor $r1, $r1, $r0
-+ xor $r1, $r1, $r1
-+ xor $r1, $r1, $r2
-+ xor $r1, $r1, $r3
-+ xor $r1, $r1, $r4
-+ xor $r1, $r1, $r5
-+ xor $r1, $r1, $r6
-+ xor $r1, $r1, $r7
-+ xor $r2, $r2, $r0
-+ xor $r2, $r2, $r1
-+ xor $r2, $r2, $r2
-+ xor $r2, $r2, $r3
-+ xor $r2, $r2, $r4
-+ xor $r2, $r2, $r5
-+ xor $r2, $r2, $r6
-+ xor $r2, $r2, $r7
-+ xor $r3, $r3, $r0
-+ xor $r3, $r3, $r1
-+ xor $r3, $r3, $r2
-+ xor $r3, $r3, $r3
-+ xor $r3, $r3, $r4
-+ xor $r3, $r3, $r5
-+ xor $r3, $r3, $r6
-+ xor $r3, $r3, $r7
-+ xor $r4, $r4, $r0
-+ xor $r4, $r4, $r1
-+ xor $r4, $r4, $r2
-+ xor $r4, $r4, $r3
-+ xor $r4, $r4, $r4
-+ xor $r4, $r4, $r5
-+ xor $r4, $r4, $r6
-+ xor $r4, $r4, $r7
-+ xor $r5, $r5, $r0
-+ xor $r5, $r5, $r1
-+ xor $r5, $r5, $r2
-+ xor $r5, $r5, $r3
-+ xor $r5, $r5, $r4
-+ xor $r5, $r5, $r5
-+ xor $r5, $r5, $r6
-+ xor $r5, $r5, $r7
-+ xor $r6, $r6, $r0
-+ xor $r6, $r6, $r1
-+ xor $r6, $r6, $r2
-+ xor $r6, $r6, $r3
-+ xor $r6, $r6, $r4
-+ xor $r6, $r6, $r5
-+ xor $r6, $r6, $r6
-+ xor $r6, $r6, $r7
-+ xor $r7, $r7, $r0
-+ xor $r7, $r7, $r1
-+ xor $r7, $r7, $r2
-+ xor $r7, $r7, $r3
-+ xor $r7, $r7, $r4
-+ xor $r7, $r7, $r5
-+ xor $r7, $r7, $r6
-+ xor $r7, $r7, $r7
-+ xor $r0, $r0, $r0
-+ xor $r0, $r1, $r0
-+ xor $r0, $r2, $r0
-+ xor $r0, $r3, $r0
-+ xor $r0, $r4, $r0
-+ xor $r0, $r5, $r0
-+ xor $r0, $r6, $r0
-+ xor $r0, $r7, $r0
-+ xor $r1, $r0, $r1
-+ xor $r1, $r1, $r1
-+ xor $r1, $r2, $r1
-+ xor $r1, $r3, $r1
-+ xor $r1, $r4, $r1
-+ xor $r1, $r5, $r1
-+ xor $r1, $r6, $r1
-+ xor $r1, $r7, $r1
-+ xor $r2, $r0, $r2
-+ xor $r2, $r1, $r2
-+ xor $r2, $r2, $r2
-+ xor $r2, $r3, $r2
-+ xor $r2, $r4, $r2
-+ xor $r2, $r5, $r2
-+ xor $r2, $r6, $r2
-+ xor $r2, $r7, $r2
-+ xor $r3, $r0, $r3
-+ xor $r3, $r1, $r3
-+ xor $r3, $r2, $r3
-+ xor $r3, $r3, $r3
-+ xor $r3, $r4, $r3
-+ xor $r3, $r5, $r3
-+ xor $r3, $r6, $r3
-+ xor $r3, $r7, $r3
-+ xor $r4, $r0, $r4
-+ xor $r4, $r1, $r4
-+ xor $r4, $r2, $r4
-+ xor $r4, $r3, $r4
-+ xor $r4, $r4, $r4
-+ xor $r4, $r5, $r4
-+ xor $r4, $r6, $r4
-+ xor $r4, $r7, $r4
-+ xor $r5, $r0, $r5
-+ xor $r5, $r1, $r5
-+ xor $r5, $r2, $r5
-+ xor $r5, $r3, $r5
-+ xor $r5, $r4, $r5
-+ xor $r5, $r5, $r5
-+ xor $r5, $r6, $r5
-+ xor $r5, $r7, $r5
-+ xor $r6, $r0, $r6
-+ xor $r6, $r1, $r6
-+ xor $r6, $r2, $r6
-+ xor $r6, $r3, $r6
-+ xor $r6, $r4, $r6
-+ xor $r6, $r5, $r6
-+ xor $r6, $r6, $r6
-+ xor $r6, $r7, $r6
-+ xor $r7, $r0, $r7
-+ xor $r7, $r1, $r7
-+ xor $r7, $r2, $r7
-+ xor $r7, $r3, $r7
-+ xor $r7, $r4, $r7
-+ xor $r7, $r5, $r7
-+ xor $r7, $r6, $r7
-+ xor $r7, $r7, $r7
-+ and $r0, $r0, $r0
-+ and $r0, $r0, $r1
-+ and $r0, $r0, $r2
-+ and $r0, $r0, $r3
-+ and $r0, $r0, $r4
-+ and $r0, $r0, $r5
-+ and $r0, $r0, $r6
-+ and $r0, $r0, $r7
-+ and $r1, $r1, $r0
-+ and $r1, $r1, $r1
-+ and $r1, $r1, $r2
-+ and $r1, $r1, $r3
-+ and $r1, $r1, $r4
-+ and $r1, $r1, $r5
-+ and $r1, $r1, $r6
-+ and $r1, $r1, $r7
-+ and $r2, $r2, $r0
-+ and $r2, $r2, $r1
-+ and $r2, $r2, $r2
-+ and $r2, $r2, $r3
-+ and $r2, $r2, $r4
-+ and $r2, $r2, $r5
-+ and $r2, $r2, $r6
-+ and $r2, $r2, $r7
-+ and $r3, $r3, $r0
-+ and $r3, $r3, $r1
-+ and $r3, $r3, $r2
-+ and $r3, $r3, $r3
-+ and $r3, $r3, $r4
-+ and $r3, $r3, $r5
-+ and $r3, $r3, $r6
-+ and $r3, $r3, $r7
-+ and $r4, $r4, $r0
-+ and $r4, $r4, $r1
-+ and $r4, $r4, $r2
-+ and $r4, $r4, $r3
-+ and $r4, $r4, $r4
-+ and $r4, $r4, $r5
-+ and $r4, $r4, $r6
-+ and $r4, $r4, $r7
-+ and $r5, $r5, $r0
-+ and $r5, $r5, $r1
-+ and $r5, $r5, $r2
-+ and $r5, $r5, $r3
-+ and $r5, $r5, $r4
-+ and $r5, $r5, $r5
-+ and $r5, $r5, $r6
-+ and $r5, $r5, $r7
-+ and $r6, $r6, $r0
-+ and $r6, $r6, $r1
-+ and $r6, $r6, $r2
-+ and $r6, $r6, $r3
-+ and $r6, $r6, $r4
-+ and $r6, $r6, $r5
-+ and $r6, $r6, $r6
-+ and $r6, $r6, $r7
-+ and $r7, $r7, $r0
-+ and $r7, $r7, $r1
-+ and $r7, $r7, $r2
-+ and $r7, $r7, $r3
-+ and $r7, $r7, $r4
-+ and $r7, $r7, $r5
-+ and $r7, $r7, $r6
-+ and $r7, $r7, $r7
-+ and $r0, $r0, $r0
-+ and $r0, $r1, $r0
-+ and $r0, $r2, $r0
-+ and $r0, $r3, $r0
-+ and $r0, $r4, $r0
-+ and $r0, $r5, $r0
-+ and $r0, $r6, $r0
-+ and $r0, $r7, $r0
-+ and $r1, $r0, $r1
-+ and $r1, $r1, $r1
-+ and $r1, $r2, $r1
-+ and $r1, $r3, $r1
-+ and $r1, $r4, $r1
-+ and $r1, $r5, $r1
-+ and $r1, $r6, $r1
-+ and $r1, $r7, $r1
-+ and $r2, $r0, $r2
-+ and $r2, $r1, $r2
-+ and $r2, $r2, $r2
-+ and $r2, $r3, $r2
-+ and $r2, $r4, $r2
-+ and $r2, $r5, $r2
-+ and $r2, $r6, $r2
-+ and $r2, $r7, $r2
-+ and $r3, $r0, $r3
-+ and $r3, $r1, $r3
-+ and $r3, $r2, $r3
-+ and $r3, $r3, $r3
-+ and $r3, $r4, $r3
-+ and $r3, $r5, $r3
-+ and $r3, $r6, $r3
-+ and $r3, $r7, $r3
-+ and $r4, $r0, $r4
-+ and $r4, $r1, $r4
-+ and $r4, $r2, $r4
-+ and $r4, $r3, $r4
-+ and $r4, $r4, $r4
-+ and $r4, $r5, $r4
-+ and $r4, $r6, $r4
-+ and $r4, $r7, $r4
-+ and $r5, $r0, $r5
-+ and $r5, $r1, $r5
-+ and $r5, $r2, $r5
-+ and $r5, $r3, $r5
-+ and $r5, $r4, $r5
-+ and $r5, $r5, $r5
-+ and $r5, $r6, $r5
-+ and $r5, $r7, $r5
-+ and $r6, $r0, $r6
-+ and $r6, $r1, $r6
-+ and $r6, $r2, $r6
-+ and $r6, $r3, $r6
-+ and $r6, $r4, $r6
-+ and $r6, $r5, $r6
-+ and $r6, $r6, $r6
-+ and $r6, $r7, $r6
-+ and $r7, $r0, $r7
-+ and $r7, $r1, $r7
-+ and $r7, $r2, $r7
-+ and $r7, $r3, $r7
-+ and $r7, $r4, $r7
-+ and $r7, $r5, $r7
-+ and $r7, $r6, $r7
-+ and $r7, $r7, $r7
-+ or $r0, $r0, $r0
-+ or $r0, $r0, $r1
-+ or $r0, $r0, $r2
-+ or $r0, $r0, $r3
-+ or $r0, $r0, $r4
-+ or $r0, $r0, $r5
-+ or $r0, $r0, $r6
-+ or $r0, $r0, $r7
-+ or $r1, $r1, $r0
-+ or $r1, $r1, $r1
-+ or $r1, $r1, $r2
-+ or $r1, $r1, $r3
-+ or $r1, $r1, $r4
-+ or $r1, $r1, $r5
-+ or $r1, $r1, $r6
-+ or $r1, $r1, $r7
-+ or $r2, $r2, $r0
-+ or $r2, $r2, $r1
-+ or $r2, $r2, $r2
-+ or $r2, $r2, $r3
-+ or $r2, $r2, $r4
-+ or $r2, $r2, $r5
-+ or $r2, $r2, $r6
-+ or $r2, $r2, $r7
-+ or $r3, $r3, $r0
-+ or $r3, $r3, $r1
-+ or $r3, $r3, $r2
-+ or $r3, $r3, $r3
-+ or $r3, $r3, $r4
-+ or $r3, $r3, $r5
-+ or $r3, $r3, $r6
-+ or $r3, $r3, $r7
-+ or $r4, $r4, $r0
-+ or $r4, $r4, $r1
-+ or $r4, $r4, $r2
-+ or $r4, $r4, $r3
-+ or $r4, $r4, $r4
-+ or $r4, $r4, $r5
-+ or $r4, $r4, $r6
-+ or $r4, $r4, $r7
-+ or $r5, $r5, $r0
-+ or $r5, $r5, $r1
-+ or $r5, $r5, $r2
-+ or $r5, $r5, $r3
-+ or $r5, $r5, $r4
-+ or $r5, $r5, $r5
-+ or $r5, $r5, $r6
-+ or $r5, $r5, $r7
-+ or $r6, $r6, $r0
-+ or $r6, $r6, $r1
-+ or $r6, $r6, $r2
-+ or $r6, $r6, $r3
-+ or $r6, $r6, $r4
-+ or $r6, $r6, $r5
-+ or $r6, $r6, $r6
-+ or $r6, $r6, $r7
-+ or $r7, $r7, $r0
-+ or $r7, $r7, $r1
-+ or $r7, $r7, $r2
-+ or $r7, $r7, $r3
-+ or $r7, $r7, $r4
-+ or $r7, $r7, $r5
-+ or $r7, $r7, $r6
-+ or $r7, $r7, $r7
-+ or $r0, $r0, $r0
-+ or $r0, $r1, $r0
-+ or $r0, $r2, $r0
-+ or $r0, $r3, $r0
-+ or $r0, $r4, $r0
-+ or $r0, $r5, $r0
-+ or $r0, $r6, $r0
-+ or $r0, $r7, $r0
-+ or $r1, $r0, $r1
-+ or $r1, $r1, $r1
-+ or $r1, $r2, $r1
-+ or $r1, $r3, $r1
-+ or $r1, $r4, $r1
-+ or $r1, $r5, $r1
-+ or $r1, $r6, $r1
-+ or $r1, $r7, $r1
-+ or $r2, $r0, $r2
-+ or $r2, $r1, $r2
-+ or $r2, $r2, $r2
-+ or $r2, $r3, $r2
-+ or $r2, $r4, $r2
-+ or $r2, $r5, $r2
-+ or $r2, $r6, $r2
-+ or $r2, $r7, $r2
-+ or $r3, $r0, $r3
-+ or $r3, $r1, $r3
-+ or $r3, $r2, $r3
-+ or $r3, $r3, $r3
-+ or $r3, $r4, $r3
-+ or $r3, $r5, $r3
-+ or $r3, $r6, $r3
-+ or $r3, $r7, $r3
-+ or $r4, $r0, $r4
-+ or $r4, $r1, $r4
-+ or $r4, $r2, $r4
-+ or $r4, $r3, $r4
-+ or $r4, $r4, $r4
-+ or $r4, $r5, $r4
-+ or $r4, $r6, $r4
-+ or $r4, $r7, $r4
-+ or $r5, $r0, $r5
-+ or $r5, $r1, $r5
-+ or $r5, $r2, $r5
-+ or $r5, $r3, $r5
-+ or $r5, $r4, $r5
-+ or $r5, $r5, $r5
-+ or $r5, $r6, $r5
-+ or $r5, $r7, $r5
-+ or $r6, $r0, $r6
-+ or $r6, $r1, $r6
-+ or $r6, $r2, $r6
-+ or $r6, $r3, $r6
-+ or $r6, $r4, $r6
-+ or $r6, $r5, $r6
-+ or $r6, $r6, $r6
-+ or $r6, $r7, $r6
-+ or $r7, $r0, $r7
-+ or $r7, $r1, $r7
-+ or $r7, $r2, $r7
-+ or $r7, $r3, $r7
-+ or $r7, $r4, $r7
-+ or $r7, $r5, $r7
-+ or $r7, $r6, $r7
-+ or $r7, $r7, $r7
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/16v1.d binutils-2.24/gas/testsuite/gas/nds32/16v1.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/16v1.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/16v1.d 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,57 @@
-+#objdump: -d
-+#name: nds32 16bit v1 instructions
-+#as: -m16bit-ext -mext-all
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*84.*10.*.*.*.*.*.*.*.*movi55.*\$r0,#-16
-+.*.*.*2:.*80.*01.*.*.*.*.*.*.*.*mov55.*\$r0,\$r1
-+.*.*.*4:.*8c.*00.*.*.*.*.*.*.*.*addi45.*\$r0,#0x0
-+.*.*.*6:.*8d.*7f.*.*.*.*.*.*.*.*addi45.*\$r11,#0x1f
-+.*.*.*8:.*9c.*00.*.*.*.*.*.*.*.*addi333.*\$r0,\$r0,#0x0
-+.*.*.*a:.*9d.*ff.*.*.*.*.*.*.*.*addi333.*\$r7,\$r7,#0x7
-+.*.*.*c:.*8e.*00.*.*.*.*.*.*.*.*subi45.*\$r0,#0x0
-+.*.*.*e:.*9e.*00.*.*.*.*.*.*.*.*subi333.*\$r0,\$r0,#0x0
-+.*.*10:.*88.*01.*.*.*.*.*.*.*.*add45.*\$r0,\$r1
-+.*.*12:.*98.*0a.*.*.*.*.*.*.*.*add333.*\$r0,\$r1,\$r2
-+.*.*14:.*8a.*01.*.*.*.*.*.*.*.*sub45.*\$r0,\$r1
-+.*.*16:.*9a.*0a.*.*.*.*.*.*.*.*sub333.*\$r0,\$r1,\$r2
-+.*.*18:.*90.*21.*.*.*.*.*.*.*.*srai45.*\$r1,#0x1
-+.*.*1a:.*92.*21.*.*.*.*.*.*.*.*srli45.*\$r1,#0x1
-+.*.*1c:.*94.*09.*.*.*.*.*.*.*.*slli333.*\$r0,\$r1,#0x1
-+.*.*1e:.*96.*08.*.*.*.*.*.*.*.*zeb33.*\$r0,\$r1
-+.*.*20:.*96.*09.*.*.*.*.*.*.*.*zeh33.*\$r0,\$r1
-+.*.*22:.*96.*0a.*.*.*.*.*.*.*.*seb33.*\$r0,\$r1
-+.*.*24:.*96.*0b.*.*.*.*.*.*.*.*seh33.*\$r0,\$r1
-+.*.*26:.*96.*0c.*.*.*.*.*.*.*.*xlsb33.*\$r0,\$r1
-+.*.*28:.*96.*0d.*.*.*.*.*.*.*.*x11b33.*\$r0,\$r1
-+.*.*2a:.*b4.*01.*.*.*.*.*.*.*.*lwi450.*\$r0,\[\$r1\]
-+.*.*2c:.*a1.*3b.*.*.*.*.*.*.*.*lwi333.*\$r4,\[\$r7\+#0xc\]
-+.*.*2e:.*a2.*0b.*.*.*.*.*.*.*.*lwi333.bi.*\$r0,\[\$r1\],#0xc
-+.*.*30:.*a4.*0e.*.*.*.*.*.*.*.*lhi333.*\$r0,\[\$r1\+#0xc\]
-+.*.*32:.*a6.*09.*.*.*.*.*.*.*.*lbi333.*\$r0,\[\$r1\+#0x1\]
-+.*.*34:.*b6.*01.*.*.*.*.*.*.*.*swi450.*\$r0,\[\$r1\]
-+.*.*36:.*a8.*0b.*.*.*.*.*.*.*.*swi333.*\$r0,\[\$r1\+#0xc\]
-+.*.*38:.*aa.*0b.*.*.*.*.*.*.*.*swi333.bi.*\$r0,\[\$r1\],#0xc
-+.*.*3a:.*ac.*0e.*.*.*.*.*.*.*.*shi333.*\$r0,\[\$r1\+#0xc\]
-+.*.*3c:.*ae.*09.*.*.*.*.*.*.*.*sbi333.*\$r0,\[\$r1\+#0x1\]
-+.*.*3e:.*b8.*03.*.*.*.*.*.*.*.*lwi37.*\$r0,\[\$fp\+#0xc\]
-+.*.*40:.*b8.*83.*.*.*.*.*.*.*.*swi37.*\$r0,\[\$fp\+#0xc\]
-+.*.*42:.*d0.*06.*.*.*.*.*.*.*.*beqs38.*\$r0,4e.*<foo\+0x4e>
-+.*.*44:.*d8.*06.*.*.*.*.*.*.*.*bnes38.*\$r0,50.*<foo\+0x50>
-+.*.*46:.*c0.*06.*.*.*.*.*.*.*.*beqz38.*\$r0,52.*<foo\+0x52>
-+.*.*48:.*c8.*06.*.*.*.*.*.*.*.*bnez38.*\$r0,54.*<foo\+0x54>
-+.*.*4a:.*d5.*06.*.*.*.*.*.*.*.*j8.*56.*<foo\+0x56>
-+.*.*4c:.*dd.*00.*.*.*.*.*.*.*.*jr5.*\$r0
-+.*.*4e:.*dd.*80.*.*.*.*.*.*.*.*ret5.*\$r0
-+.*.*50:.*dd.*20.*.*.*.*.*.*.*.*jral5.*\$r0
-+.*.*52:.*e6.*0c.*.*.*.*.*.*.*.*slti45.*\$r0,#0xc
-+.*.*54:.*e4.*0c.*.*.*.*.*.*.*.*sltsi45.*\$r0,#0xc
-+.*.*56:.*e2.*0b.*.*.*.*.*.*.*.*slt45.*\$r0,\$r11
-+.*.*58:.*e0.*01.*.*.*.*.*.*.*.*slts45.*\$r0,\$r1
-+.*.*5a:.*e8.*06.*.*.*.*.*.*.*.*beqzs8.*66.*<foo\+0x66>
-+.*.*5c:.*e9.*06.*.*.*.*.*.*.*.*bnezs8.*68.*<foo\+0x68>
-+.*.*5e:.*ea.*0c.*.*.*.*.*.*.*.*break16.*#12
-+.*.*60:.*92.*00.*.*.*.*.*.*.*.*nop16
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/16v1.s binutils-2.24/gas/testsuite/gas/nds32/16v1.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/16v1.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/16v1.s 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,62 @@
-+foo:
-+! Table 33. Move Instruction (16-bit)
-+ movi55 $r0, -16
-+ mov55 $r0, $r1
-+! Table 34. Add/Sub Instruction with Immediate (16-bit)
-+ addi45 $r0, 0
-+ addi45 $r11, 31
-+ addi333 $r0, $r0, 0
-+ addi333 $r7, $r7, 7
-+ subi45 $r0, 0
-+ subi333 $r0, $r0, 0
-+! Table 35. Add/Sub Instruction (16-bit)
-+ add45 $r0, $r1
-+ add333 $r0, $r1, $r2
-+ sub45 $r0, $r1
-+ sub333 $r0, $r1, $r2
-+! Table 36. Shift Instruction with Immediate (16-bit)
-+ srai45 $r1, 1
-+ srli45 $r1, 1
-+ slli333 $r0, $r1, 1
-+! Table 37. Bit Field Mask Instruction with Immediate (16-bit)
-+ !bfmi333 $r0, $r1, 1
-+ zeb33 $r0, $r1
-+ zeh33 $r0, $r1
-+ seb33 $r0, $r1
-+ seh33 $r0, $r1
-+ xlsb33 $r0, $r1
-+ x11b33 $r0, $r1
-+! Table 38. Load / Store Instruction (16-bit)
-+ lwi450 $r0, [$r1]
-+ lwi333 $r4,[$r7+#0xc]
-+ lwi333.bi $r0, [$r1], 0xc
-+ lhi333 $r0, [$r1+#0xc]
-+ lbi333 $r0, [$r1+#0x1]
-+ swi450 $r0, [$r1]
-+ swi333 $r0, [$r1+#0xc]
-+ swi333.bi $r0, [$r1], 0xc
-+ shi333 $r0, [$r1+#0xc]
-+ sbi333 $r0, [$r1+#0x1]
-+! Table 39. Load/Store Instruction with Implied FP (16-bit)
-+ lwi37 $r0, [$fp+#0xc]
-+ swi37 $r0, [$fp+#0xc]
-+! Table 40. Branch and Jump Instruction (16-bit)
-+ beqs38 $r0, 0xc
-+ bnes38 $r0, 0xc
-+ beqz38 $r0, 0xc
-+ bnez38 $r0, 0xc
-+ j8 0xc
-+ jr5 $r0
-+ ret5 $r0
-+ jral5 $r0
-+! Table 41. Compare and Branch Instruction (16-bit)
-+ slti45 $r0, 0xc
-+ sltsi45 $r0, 0xc
-+ slt45 $r0, $r11
-+ slts45 $r0, $r1
-+ beqzs8 0xc
-+ bnezs8 0xc
-+! Table 42. Misc. Instruction (16-bit)
-+ break16 #0xc
-+ nop16
-+
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/16v2.d binutils-2.24/gas/testsuite/gas/nds32/16v2.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/16v2.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/16v2.d 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,11 @@
-+#objdump: -d
-+#name: nds32 16bit v2 instructions
-+#as: -m16bit-ext
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*.*.*ec.*73.*.*.*.*.*.*.*.*.*.*.*addi10.sp.*#0x73
-+.*.*.*2:.*.*.*f1.*56.*.*.*.*.*.*.*.*.*.*.*lwi37.sp.*\$r1,\[\+#0x158\]
-+.*.*.*4:.*.*.*f4.*89.*.*.*.*.*.*.*.*.*.*.*swi37.sp.*\$r4,\[\+#0x24\]
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/16v2.s binutils-2.24/gas/testsuite/gas/nds32/16v2.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/16v2.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/16v2.s 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,7 @@
-+foo:
-+! Table 43. ALU Instructions
-+ addi10.sp #0x73
-+! Table 44. Load/Store Instruction
-+ lwi37.sp $r1,[+#0x158]
-+ swi37.sp $r4,[+#0x24]
-+
-\ No newline at end of file
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/16v3.d binutils-2.24/gas/testsuite/gas/nds32/16v3.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/16v3.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/16v3.d 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,29 @@
-+#objdump: -d
-+#name: nds32 16bit v3 instructions
-+#as: -m16bit-ext -mbaseline=v3 -mall-ext
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*b0.*ac.*.*.*.*.*.*.*.*addri36.sp.*\$r2,#0xb0
-+.*.*.*2:.*dd.*ac.*.*.*.*.*.*.*.*add5.pc.*\$r12
-+.*.*.*4:.*fe.*c6.*.*.*.*.*.*.*.*and33.*\$r3,\$r0
-+.*.*.*6:.*96.*d6.*.*.*.*.*.*.*.*bmski33.*\$r3,#0x2
-+.*.*.*8:.*96.*d7.*.*.*.*.*.*.*.*fexti33.*\$r3,#0x2
-+.*.*.*a:.*b3.*41.*.*.*.*.*.*.*.*lwi45.fe.*\$r10,#-124
-+.*.*.*c:.*fd.*ff.*.*.*.*.*.*.*.*movd44.*\$lp,\$lp
-+.*.*.*e:.*fa.*06.*.*.*.*.*.*.*.*movpi45.*\$r0,#0x16
-+.*.*10:.*fe.*bc.*.*.*.*.*.*.*.*mul33.*\$r2,\$r7
-+.*.*12:.*ff.*da.*.*.*.*.*.*.*.*neg33.*\$r7,\$r3
-+.*.*14:.*fe.*ab.*.*.*.*.*.*.*.*not33.*\$r2,\$r5
-+.*.*16:.*fe.*ef.*.*.*.*.*.*.*.*or33.*\$r3,\$r5
-+.*.*18:.*fc.*e9.*.*.*.*.*.*.*.*pop25.*\$r14,#72.*.*.*.*!.*\{\$r6~\$r14,.*\$fp,.*\$gp,.*\$lp\}
-+.*.*1a:.*fc.*c9.*.*.*.*.*.*.*.*pop25.*\$r10,#72.*.*.*.*!.*\{\$r6~\$r10,.*\$fp,.*\$gp,.*\$lp\}
-+.*.*1c:.*fc.*a9.*.*.*.*.*.*.*.*pop25.*\$r8,#72.*.*.*.*!.*\{\$r6~\$r8,.*\$fp,.*\$gp,.*\$lp\}
-+.*.*1e:.*fc.*89.*.*.*.*.*.*.*.*pop25.*\$r6,#72.*.*.*.*!.*\{\$r6,.*\$fp,.*\$gp,.*\$lp\}
-+.*.*20:.*fc.*6d.*.*.*.*.*.*.*.*push25.*\$r14,#104.*.*.*.*!.*\{\$r6~\$r14,.*\$fp,.*\$gp,.*\$lp\}
-+.*.*22:.*fc.*4d.*.*.*.*.*.*.*.*push25.*\$r10,#104.*.*.*.*!.*\{\$r6~\$r10,.*\$fp,.*\$gp,.*\$lp\}
-+.*.*24:.*fc.*2d.*.*.*.*.*.*.*.*push25.*\$r8,#104.*.*.*.*!.*\{\$r6~\$r8,.*\$fp,.*\$gp,.*\$lp\}
-+.*.*26:.*fc.*0d.*.*.*.*.*.*.*.*push25.*\$r6,#104.*.*.*.*!.*\{\$r6,.*\$fp,.*\$gp,.*\$lp\}
-+.*.*28:.*fe.*15.*.*.*.*.*.*.*.*xor33.*\$r0,\$r2
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/16v3.s binutils-2.24/gas/testsuite/gas/nds32/16v3.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/16v3.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/16v3.s 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,23 @@
-+foo:
-+ addri36.sp $r2,#0xb0
-+ add5.pc $r12
-+ and33 $r3,$r0
-+ BMSKI33 $r3,2
-+ FEXTI33 $r3,2
-+ lwi45.fe $r10,#-124
-+ movd44 $lp,$lp
-+ movpi45 $r0,#0x16
-+ mul33 $r2,$r7
-+ neg33 $r7,$r3
-+ not33 $r2,$r5
-+ or33 $r3,$r5
-+ pop25 $r14,#72
-+ pop25 $r10,#72
-+ pop25 $r8,#72
-+ pop25 $r6,#72
-+ push25 $r14,#104
-+ push25 $r10,#104
-+ push25 $r8,#104
-+ push25 $r6,#104
-+ xor33 $r0,$r2
-+
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/32bit_extension.d binutils-2.24/gas/testsuite/gas/nds32/32bit_extension.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/32bit_extension.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/32bit_extension.d 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,28 @@
-+#objdump: -d
-+#name: nds32 32bit extension instructions
-+#as: -mall-ext
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*42.*11.*00.*03.*.*abs.*\$r1,\$r2
-+.*.*.*4:.*42.*11.*0c.*02.*.*ave.*\$r1,\$r2,\$r3
-+.*.*.*8:.*42.*11.*0c.*00.*.*max.*\$r1,\$r2,\$r3
-+.*.*.*c:.*42.*11.*0c.*01.*.*min.*\$r1,\$r2,\$r3
-+.*.*10:.*42.*11.*04.*08.*.*bset.*\$r1,\$r2,#0x1
-+.*.*14:.*42.*11.*04.*09.*.*bclr.*\$r1,\$r2,#0x1
-+.*.*18:.*42.*11.*04.*0a.*.*btgl.*\$r1,\$r2,#0x1
-+.*.*1c:.*42.*11.*04.*0b.*.*btst.*\$r1,\$r2,#0x1
-+.*.*20:.*42.*11.*04.*04.*.*clips.*\$r1,\$r2,#0x1
-+.*.*24:.*42.*11.*04.*05.*.*clip.*\$r1,\$r2,#0x1
-+.*.*28:.*42.*11.*00.*07.*.*clz.*\$r1,\$r2
-+.*.*2c:.*42.*11.*00.*06.*.*clo.*\$r1,\$r2
-+.*.*30:.*42.*11.*0c.*0c.*.*bse.*\$r1,\$r2,\$r3
-+.*.*34:.*42.*11.*0c.*0d.*.*bsp.*\$r1,\$r2,\$r3
-+.*.*38:.*70.*11.*0c.*00.*.*pbsad.*\$r1,\$r2,\$r3
-+.*.*3c:.*70.*11.*0c.*01.*.*pbsada.*\$r1,\$r2,\$r3
-+.*.*40:.*42.*11.*0c.*0e.*.*ffb.*\$r1,\$r2,\$r3
-+.*.*44:.*42.*11.*00.*ce.*.*ffbi.*\$r1,\$r2,#0x1
-+.*.*48:.*42.*11.*0c.*0f.*.*ffmism.*\$r1,\$r2,\$r3
-+.*.*4c:.*42.*11.*0c.*4f.*.*flmism.*\$r1,\$r2,\$r3
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/32bit_extension.s binutils-2.24/gas/testsuite/gas/nds32/32bit_extension.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/32bit_extension.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/32bit_extension.s 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,24 @@
-+foo:
-+! Table 50. Performance Extension V1 Instructions
-+ abs $r1, $r2
-+ ave $r1, $r2, $r3
-+ max $r1, $r2, $r3
-+ min $r1, $r2, $r3
-+ bset $r1, $r2, #1
-+ bclr $r1, $r2, #1
-+ btgl $r1, $r2, #1
-+ btst $r1, $r2, #1
-+ clips $r1, $r2, #1
-+ clip $r1, $r2, #1
-+ clz $r1, $r2
-+ clo $r1, $r2
-+! Table 51. Performance Extension V2 Instructions
-+ bse $r1, $r2, $r3
-+ bsp $r1, $r2, $r3
-+ pbsad $r1, $r2, $r3
-+ pbsada $r1, $r2, $r3
-+! Table 52. String Extension Instructions
-+ ffb $r1, $r2, $r3
-+ ffbi $r1, $r2, #1
-+ ffmism $r1, $r2, $r3
-+ flmism $r1, $r2, $r3
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/32v2.d binutils-2.24/gas/testsuite/gas/nds32/32v2.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/32v2.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/32v2.d 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,27 @@
-+#objdump: -d
-+#name: nds32 32bit v2 instructions
-+#as: -mbaseline=v3 -mall-ext
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*3f.*9d.*2f.*6a.*.*addi.gp.*\$r25,#-184470
-+.*.*.*4:.*43.*01.*1c.*69.*.*mulr64.*\$r16,\$r2,\$r7
-+.*.*.*8:.*43.*e5.*b4.*68.*.*mulsr64.*\$lp,\$r11,\$r13
-+.*.*.*c:.*43.*e8.*e4.*73.*.*maddr32.*\$lp,\$r17,\$r25
-+.*.*10:.*42.*10.*10.*75.*.*msubr32.*\$r1,\$r0,\$r4
-+.*.*14:.*41.*00.*40.*17.*.*divr.*\$r16,\$r0,\$r0,\$r16
-+.*.*18:.*41.*43.*20.*76.*.*divsr.*\$r20,\$r3,\$r6,\$r8
-+.*.*1c:.*2e.*25.*30.*32.*.*lbi.gp.*\$r2,\[\+#-184270\]
-+.*.*20:.*2f.*ef.*1f.*df.*.*lbsi.gp.*\$lp,\[\+#-57377\]
-+.*.*24:.*3c.*00.*00.*00.*.*lhi.gp.*\$r0,\[\+#0x0\]
-+.*.*28:.*3d.*a7.*f4.*44.*.*lhsi.gp.*\$p0,\[\+#-6008\]
-+.*.*2c:.*3c.*fd.*7d.*f3.*.*lwi.gp.*\$r15,\[\+#-133172\]
-+.*.*30:.*3e.*f3.*e0.*13.*.*sbi.gp.*\$r15,\[\+#0x3e013\]
-+.*.*34:.*3c.*f9.*e1.*f9.*.*shi.gp.*\$r15,\[\+#0x3c3f2\]
-+.*.*38:.*3d.*9f.*6f.*3c.*.*swi.gp.*\$r25,\[\+#-148240\]
-+.*.*3c:.*3b.*5c.*d4.*45.*.*lmwa.bim.*\$r21,\[\$r25\],\$r21,#0x1.*.*.*.*!.*\{\$r21,.*\$sp\}
-+.*.*40:.*3a.*6d.*ac.*71.*.*smwa.ai.*\$r6,\[\$p1\],\$r11,#0x1.*.*.*.*!.*\{\$r6~\$r11,.*\$sp\}
-+.*.*44:.*39.*a4.*5d.*20.*.*lbup.*\$p0,\[\$r8\+\(\$r23<<#0x1\)\]
-+.*.*48:.*39.*3a.*43.*28.*.*sbup.*\$r19,\[\$r20\+\(\$r16<<#0x3\)\]
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/32v2.s binutils-2.24/gas/testsuite/gas/nds32/32v2.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/32v2.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/32v2.s 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,24 @@
-+foo:
-+! Table 45. ALU Instructions
-+ addi.gp $r25,#-184470
-+! Table 46. Multiply and Divide Instructions
-+ mulr64 $r16,$r2,$r7
-+ mulsr64 $lp,$r11,$r13
-+ maddr32 $lp,$r17,$r25
-+ msubr32 $r1,$r0,$r4
-+ divr $r16,$r0,$r0,$r16
-+ divsr $r20,$r3,$r6,$r8
-+! Table 47. Load/Store Instructions
-+ lbi.gp $r2,[+#-184270]
-+ lbsi.gp $lp,[+#-57377]
-+ lhi.gp $r0,[+#0x0]
-+ lhsi.gp $r26,[+#-6008]
-+ lwi.gp $r15,[+#-133172]
-+ sbi.gp $r15,[+#0x3e013]
-+ shi.gp $r15,[+#0x3c3f2]
-+ swi.gp $r25,[+#-148240]
-+ lmwa.bim $r21,[$r25],$r21,#0x1
-+ smwa.ai $r6,[$r27],$r11,#0x1
-+ lbup $r26,[$r8+$r23<<#0x1]
-+ sbup $r19,[$r20+$r16<<#0x3]
-+
-\ No newline at end of file
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/32v3.d binutils-2.24/gas/testsuite/gas/nds32/32v3.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/32v3.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/32v3.d 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,25 @@
-+#objdump: -d
-+#name: nds32 32bit v3 instructions
-+#as: -mbaseline=v3 -mall-ext
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*41.*9a.*16.*20.*.*add_slli.*\$r25,\$r20,\$r5,#0x11
-+.*.*.*4:.*41.*ee.*08.*1c.*.*add_srli.*\$lp,\$fp,\$r2,#0x0
-+.*.*.*8:.*40.*03.*01.*22.*.*and_slli.*\$r0,\$r6,\$r0,#0x9
-+.*.*.*c:.*40.*c3.*a9.*1e.*.*and_srli.*\$r12,\$r7,\$r10,#0x8
-+.*.*10:.*40.*f9.*44.*12.*.*bitc.*\$r15,\$r18,\$r17
-+.*.*14:.*67.*7b.*2b.*cf.*.*bitci.*\$r23,\$r22,#0x2bcf
-+.*.*18:.*5a.*01.*b6.*02.*.*beqc.*\$r0,#0x1b6,1c.*<foo\+0x1c>
-+.*.*1c:.*5a.*ae.*eb.*02.*.*bnec.*\$r10,#-277,20.*<foo\+0x20>
-+.*.*20:.*64.*0e.*82.*01.*.*cctl.*\$gp,l1i_ix_inval
-+.*.*24:.*4b.*a0.*68.*03.*.*jralnez.*\$p0,\$p0
-+.*.*28:.*4a.*00.*18.*02.*.*jrnez.*\$r6
-+.*.*2c:.*41.*f4.*24.*64.*.*or_slli.*\$sp,\$r8,\$r9,#0x3
-+.*.*30:.*40.*bd.*77.*55.*.*or_srli.*\$r11,\$p0,\$gp,#0x1a
-+.*.*34:.*41.*02.*e6.*01.*.*sub_slli.*\$r16,\$r5,\$r25,#0x10
-+.*.*38:.*41.*a3.*3d.*bd.*.*sub_srli.*\$p0,\$r6,\$r15,#0xd
-+.*.*3c:.*41.*3c.*68.*63.*.*xor_slli.*\$r19,\$r24,\$p0,#0x3
-+.*.*40:.*40.*c3.*fc.*7f.*.*xor_srli.*\$r12,\$r7,\$sp,#0x3
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/32v3.s binutils-2.24/gas/testsuite/gas/nds32/32v3.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/32v3.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/32v3.s 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,22 @@
-+foo:
-+! Table 48. Baseline V3 and V3m Instructions
-+ add_slli $r25,$r20,$r5,#0x11
-+ add_srli $lp,$fp,$r2,#0x0
-+ and_slli $r0,$r6,$r0,#0x9
-+ and_srli $r12,$r7,$r10,#0x8
-+ bitc $r15,$r18,$r17
-+ bitci $r23,$r22,#0x2bcf
-+ beqc $r0,#0x1b6,4
-+ bnec $r10,#-277,4
-+ cctl $gp,l1i_ix_inval
-+ jralnez $r26,$r26
-+ jrnez $r6
-+ or_slli $sp,$r8,$r9,#0x3
-+ or_srli $r11,$r26,$gp,#0x1a
-+ sub_slli $r16,$r5,$r25,#0x10
-+ sub_srli $r26,$r6,$r15,#0xd
-+ xor_slli $r19,$r24,$r26,#0x3
-+ xor_srli $r12,$r7,$sp,#0x3
-+
-+
-+
-\ No newline at end of file
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/abi.d binutils-2.24/gas/testsuite/gas/nds32/abi.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/abi.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/abi.d 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,26 @@
-+#readelf: -h
-+#name: nds32 abi
-+#as:
-+
-+# Test abi
-+
-+ELF Header:
-+ Magic:.*
-+ Class:.*
-+ Data:.*
-+ Version:.*
-+ OS/ABI:.*
-+ ABI Version:.*
-+ Type:.*
-+ Machine:.*
-+ Version:.*
-+ Entry point address:.*
-+ Start of program headers:.*
-+ Start of section headers:.*
-+ Flags:.*AABI.*
-+ Size of this header:.*
-+ Size of program headers:.*
-+ Number of program headers:.*
-+ Size of section headers:.*
-+ Number of section headers:.*
-+ Section header string table index:.*
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/abi.s binutils-2.24/gas/testsuite/gas/nds32/abi.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/abi.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/abi.s 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,2 @@
-+foo:
-+ nop
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/alu-1.d binutils-2.24/gas/testsuite/gas/nds32/alu-1.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/alu-1.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/alu-1.d 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,47 @@
-+#objdump: -d --prefix-addresses
-+#name: nds32 alu_1 instructions
-+#as:
-+
-+# Test alu_1 instructions
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+0+0000 <[^>]*> add \$r0, \$r1, \$r2
-+0+0004 <[^>]*> and \$r0, \$r1, \$r2
-+0+0008 <[^>]*> cmovn \$r0, \$r1, \$r2
-+0+000c <[^>]*> cmovz \$r0, \$r1, \$r2
-+0+0010 <[^>]*> nop
-+0+0014 <[^>]*> nor \$r0, \$r1, \$r2
-+0+0018 <[^>]*> or \$r0, \$r1, \$r2
-+0+001c <[^>]*> rotr \$r0, \$r1, \$r2
-+0+0020 <[^>]*> rotri \$r0, \$r1, #1
-+0+0024 <[^>]*> seb \$r0, \$r1
-+0+0028 <[^>]*> seh \$r0, \$r1
-+0+002c <[^>]*> sll \$r0, \$r1, \$r2
-+0+0030 <[^>]*> slli \$r0, \$r1, #1
-+0+0034 <[^>]*> slt \$r0, \$r1, \$r2
-+0+0038 <[^>]*> slts \$r0, \$r1, \$r2
-+0+003c <[^>]*> sra \$r0, \$r1, \$r2
-+0+0040 <[^>]*> srai \$r0, \$r1, #1
-+0+0044 <[^>]*> srl \$r0, \$r1, \$r2
-+0+0048 <[^>]*> srli \$r0, \$r1, #1
-+0+004c <[^>]*> sub \$r0, \$r1, \$r2
-+0+0050 <[^>]*> sva \$r0, \$r1, \$r2
-+0+0054 <[^>]*> svs \$r0, \$r1, \$r2
-+0+0058 <[^>]*> wsbh \$r0, \$r1
-+0+005c <[^>]*> xor \$r0, \$r1, \$r2
-+0+0060 <[^>]*> zeh \$r0, \$r1
-+0+0064 <[^>]*> divr \$r0, \$r1, \$r2, \$r3
-+0+0068 <[^>]*> divsr \$r0, \$r1, \$r2, \$r3
-+0+006c <[^>]*> add_slli \$r0, \$r1, \$r2, #1
-+0+0070 <[^>]*> add_srli \$r0, \$r1, \$r2, #1
-+0+0074 <[^>]*> and_slli \$r0, \$r1, \$r2, #1
-+0+0078 <[^>]*> and_srli \$r0, \$r1, \$r2, #1
-+0+007c <[^>]*> bitc \$r0, \$r1, \$r2
-+0+0080 <[^>]*> or_slli \$r0, \$r1, \$r2, #1
-+0+0084 <[^>]*> or_srli \$r0, \$r1, \$r2, #1
-+0+0088 <[^>]*> sub_slli \$r0, \$r1, \$r2, #1
-+0+008c <[^>]*> sub_srli \$r0, \$r1, \$r2, #1
-+0+0090 <[^>]*> xor_slli \$r0, \$r1, \$r2, #1
-+0+0094 <[^>]*> xor_srli \$r0, \$r1, \$r2, #1
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/alu-1.s binutils-2.24/gas/testsuite/gas/nds32/alu-1.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/alu-1.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/alu-1.s 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,39 @@
-+foo:
-+ add $r0, $r1, $r2
-+ and $r0, $r1, $r2
-+ cmovn $r0, $r1, $r2
-+ cmovz $r0, $r1, $r2
-+ nop
-+ nor $r0, $r1, $r2
-+ or $r0, $r1, $r2
-+ rotr $r0, $r1, $r2
-+ rotri $r0, $r1, 1
-+ seb $r0, $r1
-+ seh $r0, $r1
-+ sll $r0, $r1, $r2
-+ slli $r0, $r1, 1
-+ slt $r0, $r1, $r2
-+ slts $r0, $r1, $r2
-+ sra $r0, $r1, $r2
-+ srai $r0, $r1, 1
-+ srl $r0, $r1, $r2
-+ srli $r0, $r1, 1
-+ sub $r0, $r1, $r2
-+ sva $r0, $r1, $r2
-+ svs $r0, $r1, $r2
-+ wsbh $r0, $r1
-+ xor $r0, $r1, $r2
-+ zeh $r0, $r1
-+ divr $r0, $r1, $r2, $r3
-+ divsr $r0, $r1, $r2, $r3
-+ add_slli $r0, $r1, $r2, 1
-+ add_srli $r0, $r1, $r2, 1
-+ and_slli $r0, $r1, $r2, 1
-+ and_srli $r0, $r1, $r2, 1
-+ bitc $r0, $r1, $r2
-+ or_slli $r0, $r1, $r2, 1
-+ or_srli $r0, $r1, $r2, 1
-+ sub_slli $r0, $r1, $r2, 1
-+ sub_srli $r0, $r1, $r2, 1
-+ xor_slli $r0, $r1, $r2, 1
-+ xor_srli $r0, $r1, $r2, 1
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/alu-2.d binutils-2.24/gas/testsuite/gas/nds32/alu-2.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/alu-2.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/alu-2.d 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,41 @@
-+#objdump: -d --prefix-addresses
-+#name: nds32 alu_2 instructions
-+#as:
-+
-+# Test alu_2 instructions
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+0+0000 <[^>]*> madd64 \$d0, \$r0, \$r1
-+0+0004 <[^>]*> madds64 \$d0, \$r0, \$r1
-+0+0008 <[^>]*> mfusr \$r0, \$pc
-+0+000c <[^>]*> msub64 \$d0, \$r0, \$r1
-+0+0010 <[^>]*> msubs64 \$d0, \$r0, \$r1
-+0+0014 <[^>]*> mtusr \$r0, \$pc
-+0+0018 <[^>]*> mul \$r0, \$r1, \$r2
-+0+001c <[^>]*> mult32 \$d0, \$r1, \$r2
-+0+0020 <[^>]*> mult64 \$d0, \$r1, \$r2
-+0+0024 <[^>]*> mults64 \$d0, \$r1, \$r2
-+0+0028 <[^>]*> abs \$r0, \$r1
-+0+002c <[^>]*> ave \$r0, \$r1, \$r2
-+0+0030 <[^>]*> bclr \$r0, \$r1, #1
-+0+0034 <[^>]*> bset \$r0, \$r1, #1
-+0+0038 <[^>]*> btgl \$r0, \$r1, #1
-+0+003c <[^>]*> btst \$r0, \$r1, #1
-+0+0040 <[^>]*> clip \$r0, \$r1, #1
-+0+0044 <[^>]*> clips \$r0, \$r1, #1
-+0+0048 <[^>]*> clo \$r0, \$r1
-+0+004c <[^>]*> clz \$r0, \$r1
-+0+0050 <[^>]*> max \$r0, \$r1, \$r2
-+0+0054 <[^>]*> min \$r0, \$r1, \$r2
-+0+0058 <[^>]*> bse \$r0, \$r1, \$r2
-+0+005c <[^>]*> bsp \$r0, \$r1, \$r2
-+0+0060 <[^>]*> ffb \$r0, \$r1, \$r2
-+0+0064 <[^>]*> ffbi \$r0, \$r1, #0x8
-+0+0068 <[^>]*> ffmism \$r0, \$r1, \$r2
-+0+006c <[^>]*> flmism \$r0, \$r1, \$r2
-+0+0070 <[^>]*> maddr32 \$r0, \$r0, \$r1
-+0+0074 <[^>]*> msubr32 \$r0, \$r1, \$r2
-+0+0078 <[^>]*> mulr64 \$r0, \$r1, \$r2
-+0+007c <[^>]*> mulsr64 \$r0, \$r1, \$r2
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/alu-2.s binutils-2.24/gas/testsuite/gas/nds32/alu-2.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/alu-2.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/alu-2.s 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,33 @@
-+foo:
-+ madd64 $d0, $r0, $r1
-+ madds64 $d0, $r0, $r1
-+ mfusr $r0, $pc
-+ msub64 $d0, $r0, $r1
-+ msubs64 $d0, $r0, $r1
-+ mtusr $r0, $pc
-+ mul $r0, $r1, $r2
-+ mult32 $d0, $r1, $r2
-+ mult64 $d0, $r1, $r2
-+ mults64 $d0, $r1, $r2
-+ abs $r0, $r1
-+ ave $r0, $r1, $r2
-+ bclr $r0, $r1, 1
-+ bset $r0, $r1, 1
-+ btgl $r0, $r1, 1
-+ btst $r0, $r1, 1
-+ clip $r0, $r1, 1
-+ clips $r0, $r1, 1
-+ clo $r0, $r1
-+ clz $r0, $r1
-+ max $r0, $r1, $r2
-+ min $r0, $r1, $r2
-+ bse $r0, $r1, $r2
-+ bsp $r0, $r1, $r2
-+ ffb $r0, $r1, $r2
-+ ffbi $r0, $r1, 1
-+ ffmism $r0, $r1, $r2
-+ flmism $r0, $r1, $r2
-+ maddr32 $r0, $r0, $r1
-+ msubr32 $r0, $r1, $r2
-+ mulr64 $r0, $r1, $r2
-+ mulsr64 $r0, $r1, $r2
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/alu.d binutils-2.24/gas/testsuite/gas/nds32/alu.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/alu.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/alu.d 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,52 @@
-+#objdump: -d
-+#name: nds32 alu instructions
-+#as: -mdx-regs -mbaseline=v3 -mall-ext
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*.*.*50.*00.*80.*02.*.*.*.*.*addi.*\$r0,\$r1,#0x2
-+.*.*.*4:.*.*.*52.*00.*80.*02.*.*.*.*.*subri.*\$r0,\$r1,#0x2
-+.*.*.*8:.*.*.*54.*00.*80.*02.*.*.*.*.*andi.*\$r0,\$r1,#0x2
-+.*.*.*c:.*.*.*58.*00.*80.*02.*.*.*.*.*ori.*\$r0,\$r1,#0x2
-+.*.*10:.*.*.*56.*00.*80.*02.*.*.*.*.*xori.*\$r0,\$r1,#0x2
-+.*.*14:.*.*.*5c.*00.*80.*02.*.*.*.*.*slti.*\$r0,\$r1,#0x2
-+.*.*18:.*.*.*5e.*00.*80.*02.*.*.*.*.*sltsi.*\$r0,\$r1,#0x2
-+.*.*1c:.*.*.*44.*00.*00.*02.*.*.*.*.*movi.*\$r0,#0x2
-+.*.*20:.*.*.*46.*00.*00.*02.*.*.*.*.*sethi.*\$r0,#0x2
-+.*.*24:.*.*.*40.*00.*88.*00.*.*.*.*.*add.*\$r0,\$r1,\$r2
-+.*.*28:.*.*.*40.*00.*88.*01.*.*.*.*.*sub.*\$r0,\$r1,\$r2
-+.*.*2c:.*.*.*40.*00.*88.*02.*.*.*.*.*and.*\$r0,\$r1,\$r2
-+.*.*30:.*.*.*40.*00.*88.*05.*.*.*.*.*nor.*\$r0,\$r1,\$r2
-+.*.*34:.*.*.*40.*00.*88.*04.*.*.*.*.*or.*\$r0,\$r1,\$r2
-+.*.*38:.*.*.*40.*00.*88.*03.*.*.*.*.*xor.*\$r0,\$r1,\$r2
-+.*.*3c:.*.*.*40.*00.*88.*06.*.*.*.*.*slt.*\$r0,\$r1,\$r2
-+.*.*40:.*.*.*40.*00.*88.*07.*.*.*.*.*slts.*\$r0,\$r1,\$r2
-+.*.*44:.*.*.*40.*00.*88.*18.*.*.*.*.*sva.*\$r0,\$r1,\$r2
-+.*.*48:.*.*.*40.*00.*88.*19.*.*.*.*.*svs.*\$r0,\$r1,\$r2
-+.*.*4c:.*.*.*54.*00.*80.*ff.*.*.*.*.*andi.*\$r0,\$r1,#0xff
-+.*.*50:.*.*.*40.*00.*80.*13.*.*.*.*.*zeh.*\$r0,\$r1
-+.*.*54:.*.*.*40.*00.*80.*14.*.*.*.*.*wsbh.*\$r0,\$r1
-+.*.*58:.*.*.*40.*00.*84.*08.*.*.*.*.*slli.*\$r0,\$r1,#0x1
-+.*.*5c:.*.*.*40.*00.*84.*09.*.*.*.*.*srli.*\$r0,\$r1,#0x1
-+.*.*60:.*.*.*40.*00.*84.*0a.*.*.*.*.*srai.*\$r0,\$r1,#0x1
-+.*.*64:.*.*.*40.*00.*84.*0b.*.*.*.*.*rotri.*\$r0,\$r1,#0x1
-+.*.*68:.*.*.*40.*00.*88.*0c.*.*.*.*.*sll.*\$r0,\$r1,\$r2
-+.*.*6c:.*.*.*40.*00.*88.*0d.*.*.*.*.*srl.*\$r0,\$r1,\$r2
-+.*.*70:.*.*.*40.*00.*88.*0e.*.*.*.*.*sra.*\$r0,\$r1,\$r2
-+.*.*74:.*.*.*40.*00.*88.*0f.*.*.*.*.*rotr.*\$r0,\$r1,\$r2
-+.*.*78:.*.*.*42.*00.*88.*24.*.*.*.*.*mul.*\$r0,\$r1,\$r2
-+.*.*7c:.*.*.*42.*00.*88.*28.*.*.*.*.*mults64.*\$d0,\$r1,\$r2
-+.*.*80:.*.*.*42.*00.*88.*29.*.*.*.*.*mult64.*\$d0,\$r1,\$r2
-+.*.*84:.*.*.*42.*00.*04.*2a.*.*.*.*.*madds64.*\$d0,\$r0,\$r1
-+.*.*88:.*.*.*42.*00.*04.*2b.*.*.*.*.*madd64.*\$d0,\$r0,\$r1
-+.*.*8c:.*.*.*42.*00.*04.*2c.*.*.*.*.*msubs64.*\$d0,\$r0,\$r1
-+.*.*90:.*.*.*42.*00.*04.*2d.*.*.*.*.*msub64.*\$d0,\$r0,\$r1
-+.*.*94:.*.*.*42.*00.*88.*31.*.*.*.*.*mult32.*\$d0,\$r1,\$r2
-+.*.*98:.*.*.*42.*00.*88.*33.*.*.*.*.*madd32.*\$d0,\$r1,\$r2
-+.*.*9c:.*.*.*42.*00.*88.*35.*.*.*.*.*msub32.*\$d0,\$r1,\$r2
-+.*.*a0:.*.*.*42.*0f.*80.*20.*.*.*.*.*mfusr.*\$r0,\$pc
-+.*.*a4:.*.*.*42.*0f.*80.*21.*.*.*.*.*mtusr.*\$r0,\$pc
-+.*.*a8:.*42 01 0c 2f.*div \$d0,\$r2,\$r3
-+.*.*ac:.*42 01 0c 2e .*divs \$d0,\$r2,\$r3
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/alu.s binutils-2.24/gas/testsuite/gas/nds32/alu.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/alu.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/alu.s 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,51 @@
-+foo:
-+! Table 5, ALU immediate, baseline v1
-+ addi $r0, $r1, 2
-+ subri $r0, $r1, 2
-+ andi $r0, $r1, 2
-+ ori $r0, $r1, 2
-+ xori $r0, $r1, 2
-+ slti $r0, $r1, 2
-+ sltsi $r0, $r1, 2
-+ movi $r0, 2
-+ sethi $r0, 2
-+! Table 6, ALU, baseline v1
-+ add $r0, $r1, $r2
-+ sub $r0, $r1, $r2
-+ and $r0, $r1, $r2
-+ nor $r0, $r1, $r2
-+ or $r0, $r1, $r2
-+ xor $r0, $r1, $r2
-+ slt $r0, $r1, $r2
-+ slts $r0, $r1, $r2
-+ sva $r0, $r1, $r2
-+ svs $r0, $r1, $r2
-+ zeb $r0, $r1
-+ zeh $r0, $r1
-+ wsbh $r0, $r1
-+! Table 7, shift instruction, baseline v1
-+ slli $r0, $r1, 1
-+ srli $r0, $r1, 1
-+ srai $r0, $r1, 1
-+ rotri $r0, $r1, 1
-+ sll $r0, $r1, $r2
-+ srl $r0, $r1, $r2
-+ sra $r0, $r1, $r2
-+ rotr $r0, $r1, $r2
-+! Table 8, multiply instruction, baseline v1
-+ mul $r0, $r1, $r2
-+ mults64 $d0, $r1, $r2
-+ mult64 $d0, $r1, $r2
-+ madds64 $d0, $r0, $r1
-+ madd64 $d0, $r0, $r1
-+ msubs64 $d0, $r0, $r1
-+ msub64 $d0, $r0, $r1
-+ mult32 $d0, $r1, $r2
-+ madd32 $d0, $r1, $r2
-+ msub32 $d0, $r1, $r2
-+ mfusr $r0, $pc
-+ mtusr $r0, $pc
-+! Table 9, divide instruction, baseline v1
-+ div $d0, $r2, $r3
-+ divs $d0, $r2, $r3
-+
-\ No newline at end of file
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/br-1.d binutils-2.24/gas/testsuite/gas/nds32/br-1.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/br-1.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/br-1.d 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,14 @@
-+#objdump: -dr --prefix-addresses
-+#name: nds32 branch 1 instructions
-+#as:
-+
-+# Test br-1 instructions
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+0+0000 <[^>]*> beq \$r0, \$r1, 00000000 <foo>
-+ 0: R_NDS32_15_PCREL_RELA .text
-+ 0: R_NDS32_RELAX_ENTRY .text
-+0+0004 <[^>]*> bne \$r0, \$r1, 00000004 <foo\+0x4>
-+ 4: R_NDS32_15_PCREL_RELA .text
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/br-1.s binutils-2.24/gas/testsuite/gas/nds32/br-1.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/br-1.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/br-1.s 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,6 @@
-+foo:
-+ beq $r0, $r1, lo20(foo)
-+ beq $r0, $r1, hi20(100)
-+ beq $r0, $r1, lo12(100)
-+ beq $r0, $r1, lo20(100)
-+ bne $r0, $r1, foo
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/br-2.d binutils-2.24/gas/testsuite/gas/nds32/br-2.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/br-2.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/br-2.d 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,24 @@
-+#objdump: -dr --prefix-addresses
-+#name: nds32 branch 2 instructions
-+#as:
-+
-+# Test br-2 instructions
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+0+0000 <[^>]*> beqz \$r0, 00000000 <foo>
-+ 0: R_NDS32_17_PCREL_RELA .text
-+ 0: R_NDS32_RELAX_ENTRY .text
-+0+0004 <[^>]*> bgez \$r0, 00000004 <foo\+0x4>
-+ 4: R_NDS32_17_PCREL_RELA .text
-+0+0008 <[^>]*> bgezal \$r0, 00000008 <foo\+0x8>
-+ 8: R_NDS32_17_PCREL_RELA .text
-+0+000c <[^>]*> bgtz \$r0, 0000000c <foo\+0xc>
-+ c: R_NDS32_17_PCREL_RELA .text
-+0+0010 <[^>]*> blez \$r0, 00000010 <foo\+0x10>
-+ 10: R_NDS32_17_PCREL_RELA .text
-+0+0014 <[^>]*> bltz \$r0, 00000014 <foo\+0x14>
-+ 14: R_NDS32_17_PCREL_RELA .text
-+0+0018 <[^>]*> bltzal \$r0, 00000018 <foo\+0x18>
-+ 18: R_NDS32_17_PCREL_RELA .text
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/br-2.s binutils-2.24/gas/testsuite/gas/nds32/br-2.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/br-2.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/br-2.s 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,8 @@
-+foo:
-+ beqz $r0, foo
-+ bgez $r0, foo
-+ bgezal $r0, foo
-+ bgtz $r0, foo
-+ blez $r0, foo
-+ bltz $r0, foo
-+ bltzal $r0, foo
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/cc_16bit_pseudo_instruction.d binutils-2.24/gas/testsuite/gas/nds32/cc_16bit_pseudo_instruction.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/cc_16bit_pseudo_instruction.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/cc_16bit_pseudo_instruction.d 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,141 @@
-+#objdump: -d
-+#name: nds32 16bit pseudo instructions
-+#as: -m16bit-ext
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*84.*21.*.*.*.*.*.*.*.*movi55.*\$r1,#0x1
-+.*.*.*2:.*44.*10.*00.*ff.*.*movi.*\$r1,#0xff
-+.*.*.*6:.*46.*10.*00.*80.*.*sethi.*\$r1,#0x80
-+.*.*.*a:.*46.*10.*00.*80.*.*sethi.*\$r1,#0x80
-+.*.*.*e:.*58.*10.*80.*01.*.*ori.*\$r1,\$r1,#0x1
-+.*.*12:.*46.*10.*00.*00.*.*sethi.*\$r1,#0x0
-+.*.*16:.*58.*10.*80.*00.*.*ori.*\$r1,\$r1,#0x0
-+.*.*1a:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*1e:.*00.*17.*80.*00.*.*lbi.*\$r1,\[\$r15\+#0x0\]
-+.*.*22:.*00.*11.*00.*00.*.*lbi.*\$r1,\[\$r2\+#0x0\]
-+.*.*26:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*2a:.*02.*17.*80.*00.*.*lhi.*\$r1,\[\$r15\+#0x0\]
-+.*.*2e:.*02.*11.*00.*00.*.*lhi.*\$r1,\[\$r2\+#0x0\]
-+.*.*32:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*36:.*04.*17.*80.*00.*.*lwi.*\$r1,\[\$r15\+#0x0\]
-+.*.*3a:.*04.*11.*00.*00.*.*lwi.*\$r1,\[\$r2\+#0x0\]
-+.*.*3e:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*42:.*20.*17.*80.*00.*.*lbsi.*\$r1,\[\$r15\+#0x0\]
-+.*.*46:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*4a:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*.*4e:.*08.*17.*80.*01.*.*lbi.bi.*\$r1,\[\$r15\],#0x1
-+.*.*52:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*56:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*.*5a:.*0a.*17.*80.*01.*.*lhi.bi.*\$r1,\[\$r15\],#0x2
-+.*.*5e:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*62:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*.*66:.*0c.*17.*80.*01.*.*lwi.bi.*\$r1,\[\$r15\],#0x4
-+.*.*6a:.*08.*17.*80.*01.*.*lbi.bi.*\$r1,\[\$r15\],#0x1
-+.*.*6e:.*0a.*17.*80.*01.*.*lhi.bi.*\$r1,\[\$r15\],#0x2
-+.*.*72:.*0c.*17.*80.*01.*.*lwi.bi.*\$r1,\[\$r15\],#0x4
-+.*.*76:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*7a:.*10.*17.*80.*00.*.*sbi.*\$r1,\[\$r15\+#0x0\]
-+.*.*7e:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*82:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*.*86:.*18.*17.*80.*01.*.*sbi.bi.*\$r1,\[\$r15\],#0x1
-+.*.*8a:.*40.*11.*08.*05.*.*nor.*\$r1,\$r2,\$r2
-+.*.*8e:.*52.*11.*00.*00.*.*subri.*\$r1,\$r2,#0x0
-+.*.*92:.*4a.*00.*04.*00.*.*jr.*\$r1
-+.*.*96:.*d5.*00.*.*.*.*.*.*.*.*j8.*96.*<foo\+0x96>
-+.*.*98:.*4c.*11.*00.*00.*.*beq.*\$r1,\$r2,98.*<foo\+0x98>
-+.*.*9c:.*4c.*11.*40.*00.*.*bne.*\$r1,\$r2,9c.*<foo\+0x9c>
-+.*.*a0:.*40.*f0.*88.*06.*.*slt.*\$r15,\$r1,\$r2
-+.*.*a4:.*4e.*f2.*00.*00.*.*beqz.*\$r15,a4.*<foo\+0xa4>
-+.*.*a8:.*40.*f0.*88.*07.*.*slts.*\$r15,\$r1,\$r2
-+.*.*ac:.*4e.*f2.*00.*00.*.*beqz.*\$r15,ac.*<foo\+0xac>
-+.*.*b0:.*40.*f1.*04.*06.*.*slt.*\$r15,\$r2,\$r1
-+.*.*b4:.*4e.*f3.*00.*00.*.*bnez.*\$r15,b4.*<foo\+0xb4>
-+.*.*b8:.*40.*f1.*04.*07.*.*slts.*\$r15,\$r2,\$r1
-+.*.*bc:.*4e.*f3.*00.*00.*.*bnez.*\$r15,bc.*<foo\+0xbc>
-+.*.*c0:.*40.*f0.*88.*06.*.*slt.*\$r15,\$r1,\$r2
-+.*.*c4:.*4e.*f3.*00.*00.*.*bnez.*\$r15,c4.*<foo\+0xc4>
-+.*.*c8:.*40.*f0.*88.*07.*.*slts.*\$r15,\$r1,\$r2
-+.*.*cc:.*4e.*f3.*00.*00.*.*bnez.*\$r15,cc.*<foo\+0xcc>
-+.*.*d0:.*40.*f1.*04.*06.*.*slt.*\$r15,\$r2,\$r1
-+.*.*d4:.*4e.*f2.*00.*00.*.*beqz.*\$r15,d4.*<foo\+0xd4>
-+.*.*d8:.*40.*f1.*04.*07.*.*slts.*\$r15,\$r2,\$r1
-+.*.*dc:.*4e.*f2.*00.*00.*.*beqz.*\$r15,dc.*<foo\+0xdc>
-+.*.*e0:.*4b.*e0.*04.*01.*.*jral.*\$lp,\$r1
-+.*.*e4:.*49.*00.*00.*00.*.*jal.*e4.*<foo\+0xe4>
-+.*.*e8:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*ec:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*.*f0:.*4b.*e0.*3c.*01.*.*jral.*\$lp,\$r15
-+.*.*f4:.*4e.*1c.*00.*00.*.*bgezal.*\$r1,f4.*<foo\+0xf4>
-+.*.*f8:.*4e.*1d.*00.*00.*.*bltzal.*\$r1,f8.*<foo\+0xf8>
-+.*.*fc:.*80.*22.*.*.*.*.*.*.*.*mov55.*\$r1,\$r2
-+.*.*fe:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*102:.*04.*17.*80.*00.*.*lwi.*\$r1,\[\$r15\+#0x0\]
-+.*106:.*84.*21.*.*.*.*.*.*.*.*movi55.*\$r1,#0x1
-+.*108:.*3b.*ff.*ff.*3c.*.*smw.adm.*\$sp,\[\$sp\],\$sp,#0xc.*.*.*.*!.*\{\$fp,.*\$gp\}
-+.*10c:.*3a.*1f.*84.*3c.*.*smw.adm.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*110:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*114:.*04.*f7.*80.*00.*.*lwi.*\$r15,\[\$r15\+#0x0\]
-+.*118:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*11c:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*120:.*04.*f7.*80.*00.*.*lwi.*\$r15,\[\$r15\+#0x0\]
-+.*124:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*128:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*12c:.*04.*f7.*80.*00.*.*lwi.*\$r15,\[\$r15\+#0x0\]
-+.*130:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*134:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*138:.*02.*f7.*80.*00.*.*lhi.*\$r15,\[\$r15\+#0x0\]
-+.*13c:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*140:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*144:.*00.*f7.*80.*00.*.*lbi.*\$r15,\[\$r15\+#0x0\]
-+.*148:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*14c:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*150:.*00.*f7.*80.*00.*.*lbi.*\$r15,\[\$r15\+#0x0\]
-+.*154:.*3a.*f0.*bc.*3c.*.*smw.adm.*\$r15,\[\$r1\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*158:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*15c:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*160:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*164:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*168:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*16c:.*3a.*f0.*bc.*3c.*.*smw.adm.*\$r15,\[\$r1\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*170:.*85.*e1.*.*.*.*.*.*.*.*movi55.*\$r15,#0x1
-+.*172:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*176:.*85.*e1.*.*.*.*.*.*.*.*movi55.*\$r15,#0x1
-+.*178:.*3a.*f0.*bc.*3c.*.*smw.adm.*\$r15,\[\$r1\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*17c:.*3a.*1f.*88.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r2,#0x0.*.*.*.*!.*\{\$r1~\$r2\}
-+.*180:.*3a.*1f.*84.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*184:.*3a.*1f.*84.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*188:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*18c:.*14.*17.*80.*00.*.*swi.*\$r1,\[\$r15\+#0x0\]
-+.*190:.*3a.*1f.*84.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*194:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*198:.*14.*17.*80.*00.*.*swi.*\$r1,\[\$r15\+#0x0\]
-+.*19c:.*3a.*1f.*84.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*1a0:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*1a4:.*14.*17.*80.*00.*.*swi.*\$r1,\[\$r15\+#0x0\]
-+.*1a8:.*3a.*1f.*84.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*1ac:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*1b0:.*12.*17.*80.*00.*.*shi.*\$r1,\[\$r15\+#0x0\]
-+.*1b4:.*3a.*1f.*84.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*1b8:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*1bc:.*10.*17.*80.*00.*.*sbi.*\$r1,\[\$r15\+#0x0\]
-+.*1c0:.*3a.*11.*04.*04.*.*lmw.bim.*\$r1,\[\$r2\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*1c4:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*1c8:.*10.*17.*80.*00.*.*sbi.*\$r1,\[\$r15\+#0x0\]
-+.*1cc:.*08.*11.*00.*01.*.*lbi.bi.*\$r1,\[\$r2\],#0x1
-+.*1d0:.*0a.*11.*00.*01.*.*lhi.bi.*\$r1,\[\$r2\],#0x2
-+.*1d4:.*0c.*11.*00.*01.*.*lwi.bi.*\$r1,\[\$r2\],#0x4
-+.*1d8:.*18.*11.*00.*01.*.*sbi.bi.*\$r1,\[\$r2\],#0x1
-+.*1dc:.*1a.*11.*00.*01.*.*shi.bi.*\$r1,\[\$r2\],#0x2
-+.*1e0:.*1c.*11.*00.*01.*.*swi.bi.*\$r1,\[\$r2\],#0x4
-+.*1e4:.*28.*11.*00.*01.*.*lbsi.bi.*\$r1,\[\$r2\],#0x1
-+.*1e8:.*2a.*11.*00.*01.*.*lhsi.bi.*\$r1,\[\$r2\],#0x2
-+.*1ec:.*0c.*11.*00.*01.*.*lwi.bi.*\$r1,\[\$r2\],#0x4
-+.*1f0:.*fc.*00.*.*.*.*.*.*.*.*push25.*\$r6,#0.*.*.*.*!.*\{\$r6,.*\$fp,.*\$gp,.*\$lp\}
-+.*1f2:.*fc.*80.*.*.*.*.*.*.*.*pop25.*\$r6,#0.*.*.*.*!.*\{\$r6,.*\$fp,.*\$gp,.*\$lp\}
-+.*1f4:.*58.*11.*00.*00.*.*ori.*\$r1,\$r2,#0x0
-+.*1f8:.*3a.*1f.*9b.*fc.*.*smw.adm.*\$r1,\[\$sp\],\$r6,#0xf.*.*.*.*!.*\{\$r1~\$r6,.*\$fp,.*\$gp,.*\$lp,.*\$sp\}
-+.*1fc:.*3b.*ff.*ff.*fc.*.*smw.adm.*\$sp,\[\$sp\],\$sp,#0xf.*.*.*.*!.*\{\$fp,.*\$gp,.*\$lp,.*\$sp\}
-+.*200:.*3a.*1f.*9b.*c4.*.*lmw.bim.*\$r1,\[\$sp\],\$r6,#0xf.*.*.*.*!.*\{\$r1~\$r6,.*\$fp,.*\$gp,.*\$lp,.*\$sp\}
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/cc_16bit_pseudo_instruction.s binutils-2.24/gas/testsuite/gas/nds32/cc_16bit_pseudo_instruction.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/cc_16bit_pseudo_instruction.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/cc_16bit_pseudo_instruction.s 2016-06-30 21:26:12.749896847 +0200
-@@ -0,0 +1,93 @@
-+ .data
-+ .size var, 4
-+var:
-+ .word 10
-+ .text
-+foo:
-+! 1. load 32-bit value/address
-+ li $r1, 0x1 ! load immediate
-+ li $r1, 0xFF ! load immediate
-+ li $r1, 0x80000 ! load immediate
-+ li $r1, 0x80001 ! load immediate
-+ la $r1, var ! load address
-+! 2. load/store variables
-+ l.b $r1, var ! load value of variable
-+ l.b $r1, $r2 ! load value of variable
-+ l.h $r1, var ! load value of variable
-+ l.h $r1, $r2 ! load value of variable
-+ l.w $r1, var ! load value of variable
-+ l.w $r1, $r2 ! load value of variable
-+ l.bs $r1, var !
-+ l.bp $r1, var, 1 ! load value of variable, and
-+ l.hp $r1, var, 2 ! load value of variable, and
-+ l.wp $r1, var, 4 ! load value of variable, and
-+ l.bpc $r1, 1
-+ l.hpc $r1, 2
-+ l.wpc $r1, 4
-+ !1.bsp $r1, var, 1 ! FIXME: incorrect syntax, see docs
-+ !l.bspc $r1, var, 1 ! FIXME: incorrect syntax
-+ s.b $r1, var
-+ s.bp $r1, var, 1
-+ !s.bpc $r1, var, 1 ! FIXME: incorrect syntax
-+! 3. negation
-+ not $r1, $r2
-+ neg $r1, $r2
-+! 4. branch to label
-+ br $r1
-+ b foo
-+ beq $r1, $r2, foo
-+ bne $r1, $r2, foo
-+ bge $r1, $r2, foo
-+ bges $r1, $r2, foo
-+ bgt $r1, $r2, foo
-+ bgts $r1, $r2, foo
-+ blt $r1, $r2, foo
-+ blts $r1, $r2, foo
-+ ble $r1, $r2, foo
-+ bles $r1, $r2, foo
-+! 5. branch and link to function name
-+ bral $r1
-+ bal foo
-+ call foob
-+ bgezal $r1, foo
-+ bltzal $r1, foo
-+! 6. move
-+ move $r1, $r2
-+ move $r1, foo
-+ move $r1, 1
-+! 7. push/pop
-+ pushm $r28, $r29
-+ push $r1
-+ push.d var
-+ push.w var
-+ push.h var
-+ push.b var
-+ push.b var, $r1
-+ pusha var
-+ pusha var, $r1
-+ pushi 1
-+ pushi 1, $r1
-+ popm $r1, $r2
-+ pop $r1
-+ pop.d var, $r1
-+ pop.w var, $r1
-+ pop.h var, $r1
-+ pop.b var, $r1
-+ pop.b var, $r1, $r2
-+
-+ lbi.p $r1, [$r2], 1
-+ lhi.p $r1, [$r2], 2
-+ lwi.p $r1, [$r2], 4
-+ sbi.p $r1, [$r2], 1
-+ shi.p $r1, [$r2], 2
-+ swi.p $r1, [$r2], 4
-+ lbsi.p $r1, [$r2], 1
-+ lhsi.p $r1, [$r2], 2
-+ lwsi.p $r1, [$r2], 4
-+ v3push $r6, 0
-+ v3pop $r6, 0
-+.16bit_off
-+ move $r1, $r2
-+ push.s $r1,$r6, { $fp $gp $lp $sp }
-+ push.s { $fp $gp $lp $sp }
-+ pop.s $r1,$r6, { $fp $gp $lp $sp }
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/cc_pseudo_instruction_O1_verbatim.d binutils-2.24/gas/testsuite/gas/nds32/cc_pseudo_instruction_O1_verbatim.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/cc_pseudo_instruction_O1_verbatim.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/cc_pseudo_instruction_O1_verbatim.d 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,144 @@
-+#objdump: -d --prefix-addresses
-+#name: nds32 O1 verbatim instructions
-+#as: -O1
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+0+000 <[^>]*> movi55 \$r1,#0x1
-+0+002 <[^>]*> movi \$r1,#0xff
-+0+006 <[^>]*> sethi \$r1,#0x80
-+0+00a <[^>]*> sethi \$r1,#0x80
-+0+00e <[^>]*> ori \$r1,\$r1,#0x1
-+0+012 <[^>]*> sethi \$r1,#0x0
-+0+016 <[^>]*> ori \$r1,\$r1,#0x0
-+0+01a <[^>]*> sethi \$r15,#0x0
-+0+01e <[^>]*> lbi \$r1,\[\$r15\+#0x0\]
-+0+022 <[^>]*> lbi \$r1,\[\$r2\+#0x0\]
-+0+026 <[^>]*> sethi \$r15,#0x0
-+0+02a <[^>]*> lhi \$r1,\[\$r15\+#0x0\]
-+0+02e <[^>]*> lhi \$r1,\[\$r2\+#0x0\]
-+0+032 <[^>]*> sethi \$r15,#0x0
-+0+036 <[^>]*> lwi \$r1,\[\$r15\+#0x0\]
-+0+03a <[^>]*> lwi \$r1,\[\$r2\+#0x0\]
-+0+03e <[^>]*> sethi \$r15,#0x0
-+0+042 <[^>]*> lbsi \$r1,\[\$r15\+#0x0\]
-+0+046 <[^>]*> sethi \$r15,#0x0
-+0+04a <[^>]*> ori \$r15,\$r15,#0x0
-+0+04e <[^>]*> lbi.bi \$r1,\[\$r15\],#0x1
-+0+052 <[^>]*> sethi \$r15,#0x0
-+0+056 <[^>]*> ori \$r15,\$r15,#0x0
-+0+05a <[^>]*> lhi.bi \$r1,\[\$r15\],#0x2
-+0+05e <[^>]*> sethi \$r15,#0x0
-+0+062 <[^>]*> ori \$r15,\$r15,#0x0
-+0+066 <[^>]*> lwi.bi \$r1,\[\$r15\],#0x4
-+0+06a <[^>]*> lbi.bi \$r1,\[\$r15\],#0x1
-+0+06e <[^>]*> lhi.bi \$r1,\[\$r15\],#0x2
-+0+072 <[^>]*> lwi.bi \$r1,\[\$r15\],#0x4
-+0+076 <[^>]*> sethi \$r15,#0x0
-+0+07a <[^>]*> sbi \$r1,\[\$r15\+#0x0\]
-+0+07e <[^>]*> sethi \$r15,#0x0
-+0+082 <[^>]*> ori \$r15,\$r15,#0x0
-+0+086 <[^>]*> sbi.bi \$r1,\[\$r15\],#0x1
-+0+08a <[^>]*> nor \$r1,\$r2,\$r2
-+0+08e <[^>]*> subri \$r1,\$r2,#0x0
-+0+092 <[^>]*> jr \$r1
-+0+096 <[^>]*> sethi \$r15,#0x0
-+0+09a <[^>]*> ori \$r15,\$r15,#0x0
-+0+09e <[^>]*> jr \$r15
-+0+0a2 <[^>]*> beq \$r1,\$r2,0+a2 <foo\+0xa2>
-+0+0a6 <[^>]*> bne \$r1,\$r2,0+a6 <foo\+0xa6>
-+0+0aa <[^>]*> slt \$r15,\$r1,\$r2
-+0+0ae <[^>]*> beqz \$r15,0+ae <foo\+0xae>
-+0+0b2 <[^>]*> slts \$r15,\$r1,\$r2
-+0+0b6 <[^>]*> beqz \$r15,0+b6 <foo\+0xb6>
-+0+0ba <[^>]*> slt \$r15,\$r2,\$r1
-+0+0be <[^>]*> bnez \$r15,0+be <foo\+0xbe>
-+0+0c2 <[^>]*> slts \$r15,\$r2,\$r1
-+0+0c6 <[^>]*> bnez \$r15,0+c6 <foo\+0xc6>
-+0+0ca <[^>]*> slt \$r15,\$r1,\$r2
-+0+0ce <[^>]*> bnez \$r15,0+ce <foo\+0xce>
-+0+0d2 <[^>]*> slts \$r15,\$r1,\$r2
-+0+0d6 <[^>]*> bnez \$r15,0+d6 <foo\+0xd6>
-+0+0da <[^>]*> slt \$r15,\$r2,\$r1
-+0+0de <[^>]*> beqz \$r15,0+de <foo\+0xde>
-+0+0e2 <[^>]*> slts \$r15,\$r2,\$r1
-+0+0e6 <[^>]*> beqz \$r15,0+e6 <foo\+0xe6>
-+0+0ea <[^>]*> jral \$lp,\$r1
-+0+0ee <[^>]*> sethi \$r15,#0x0
-+0+0f2 <[^>]*> ori \$r15,\$r15,#0x0
-+0+0f6 <[^>]*> jral \$lp,\$r15
-+0+0fa <[^>]*> sethi \$r15,#0x0
-+0+0fe <[^>]*> ori \$r15,\$r15,#0x0
-+0+102 <[^>]*> jral \$lp,\$r15
-+0+106 <[^>]*> bgezal \$r1,0+106 <foo\+0x106>
-+0+10a <[^>]*> bltzal \$r1,0+10a <foo\+0x10a>
-+0+10e <[^>]*> mov55 \$r1,\$r2
-+0+110 <[^>]*> sethi \$r15,#0x0
-+0+114 <[^>]*> lwi \$r1,\[\$r15\+#0x0\]
-+0+118 <[^>]*> movi55 \$r1,#0x1
-+0+11a <[^>]*> smw.adm \$sp,\[\$sp\],\$sp,#0xc ! {\$fp, \$gp}
-+0+11e <[^>]*> smw.adm \$r1,\[\$sp\],\$r1,#0x0 ! {\$r1}
-+0+122 <[^>]*> sethi \$r15,#0x0
-+0+126 <[^>]*> lwi \$r15,\[\$r15\+#0x0\]
-+0+12a <[^>]*> smw.adm \$r15,\[\$sp\],\$r15,#0x0 ! {\$r15}
-+0+12e <[^>]*> sethi \$r15,#0x0
-+0+132 <[^>]*> lwi \$r15,\[\$r15\+#0x0\]
-+0+136 <[^>]*> smw.adm \$r15,\[\$sp\],\$r15,#0x0 ! {\$r15}
-+0+13a <[^>]*> sethi \$r15,#0x0
-+0+13e <[^>]*> lwi \$r15,\[\$r15\+#0x0\]
-+0+142 <[^>]*> smw.adm \$r15,\[\$sp\],\$r15,#0x0 ! {\$r15}
-+0+146 <[^>]*> sethi \$r15,#0x0
-+0+14a <[^>]*> lhi \$r15,\[\$r15\+#0x0\]
-+0+14e <[^>]*> smw.adm \$r15,\[\$sp\],\$r15,#0x0 ! {\$r15}
-+0+152 <[^>]*> sethi \$r15,#0x0
-+0+156 <[^>]*> lbi \$r15,\[\$r15\+#0x0\]
-+0+15a <[^>]*> smw.adm \$r15,\[\$sp\],\$r15,#0x0 ! {\$r15}
-+0+15e <[^>]*> sethi \$r15,#0x0
-+0+162 <[^>]*> lbi \$r15,\[\$r15\+#0x0\]
-+0+166 <[^>]*> smw.adm \$r15,\[\$r1\],\$r15,#0x0 ! {\$r15}
-+0+16a <[^>]*> sethi \$r15,#0x0
-+0+16e <[^>]*> ori \$r15,\$r15,#0x0
-+0+172 <[^>]*> smw.adm \$r15,\[\$sp\],\$r15,#0x0 ! {\$r15}
-+0+176 <[^>]*> sethi \$r15,#0x0
-+0+17a <[^>]*> ori \$r15,\$r15,#0x0
-+0+17e <[^>]*> smw.adm \$r15,\[\$r1\],\$r15,#0x0 ! {\$r15}
-+0+182 <[^>]*> movi55 \$r15,#0x1
-+0+184 <[^>]*> smw.adm \$r15,\[\$sp\],\$r15,#0x0 ! {\$r15}
-+0+188 <[^>]*> movi55 \$r15,#0x1
-+0+18a <[^>]*> smw.adm \$r15,\[\$r1\],\$r15,#0x0 ! {\$r15}
-+0+18e <[^>]*> lmw.bim \$r1,\[\$sp\],\$r2,#0x0 ! {\$r1~\$r2}
-+0+192 <[^>]*> lmw.bim \$r1,\[\$sp\],\$r1,#0x0 ! {\$r1}
-+0+196 <[^>]*> lmw.bim \$r1,\[\$sp\],\$r1,#0x0 ! {\$r1}
-+0+19a <[^>]*> sethi \$r15,#0x0
-+0+19e <[^>]*> swi \$r1,\[\$r15\+#0x0\]
-+0+1a2 <[^>]*> lmw.bim \$r1,\[\$sp\],\$r1,#0x0 ! {\$r1}
-+0+1a6 <[^>]*> sethi \$r15,#0x0
-+0+1aa <[^>]*> swi \$r1,\[\$r15\+#0x0\]
-+0+1ae <[^>]*> lmw.bim \$r1,\[\$sp\],\$r1,#0x0 ! {\$r1}
-+0+1b2 <[^>]*> sethi \$r15,#0x0
-+0+1b6 <[^>]*> swi \$r1,\[\$r15\+#0x0\]
-+0+1ba <[^>]*> lmw.bim \$r1,\[\$sp\],\$r1,#0x0 ! {\$r1}
-+0+1be <[^>]*> sethi \$r15,#0x0
-+0+1c2 <[^>]*> shi \$r1,\[\$r15\+#0x0\]
-+0+1c6 <[^>]*> lmw.bim \$r1,\[\$sp\],\$r1,#0x0 ! {\$r1}
-+0+1ca <[^>]*> sethi \$r15,#0x0
-+0+1ce <[^>]*> sbi \$r1,\[\$r15\+#0x0\]
-+0+1d2 <[^>]*> lmw.bim \$r1,\[\$r2\],\$r1,#0x0 ! {\$r1}
-+0+1d6 <[^>]*> sethi \$r15,#0x0
-+0+1da <[^>]*> sbi \$r1,\[\$r15\+#0x0\]
-+0+1de <[^>]*> lbi.bi \$r1,\[\$r2\],#0x1
-+0+1e2 <[^>]*> lhi.bi \$r1,\[\$r2\],#0x2
-+0+1e6 <[^>]*> lwi.bi \$r1,\[\$r2\],#0x4
-+0+1ea <[^>]*> sbi.bi \$r1,\[\$r2\],#0x1
-+0+1ee <[^>]*> shi.bi \$r1,\[\$r2\],#0x2
-+0+1f2 <[^>]*> swi.bi \$r1,\[\$r2\],#0x4
-+0+1f6 <[^>]*> lbsi.bi \$r1,\[\$r2\],#0x1
-+0+1fa <[^>]*> lhsi.bi \$r1,\[\$r2\],#0x2
-+0+1fe <[^>]*> lwi.bi \$r1,\[\$r2\],#0x4
-+0+202 <[^>]*> push25 \$r6,#0 ! {\$r6, \$fp, \$gp, \$lp}
-+0+204 <[^>]*> pop25 \$r6,#0 ! {\$r6, \$fp, \$gp, \$lp}
-+0+206 <[^>]*> ori \$r1,\$r2,#0x0
-+0+20a <[^>]*> smw.adm \$r1,\[\$sp\],\$r6,#0xf ! {\$r1~\$r6, \$fp, \$gp, \$lp, \$sp}
-+0+20e <[^>]*> smw.adm \$sp,\[\$sp\],\$sp,#0xf ! {\$fp, \$gp, \$lp, \$sp}
-+0+212 <[^>]*> lmw.bim \$r1,\[\$sp\],\$r6,#0xf ! {\$r1~\$r6, \$fp, \$gp, \$lp, \$sp}
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/cc_pseudo_instruction_O1_verbatim.s binutils-2.24/gas/testsuite/gas/nds32/cc_pseudo_instruction_O1_verbatim.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/cc_pseudo_instruction_O1_verbatim.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/cc_pseudo_instruction_O1_verbatim.s 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,94 @@
-+ .data
-+ .size var, 4
-+ .flag verbatim
-+var:
-+ .word 10
-+ .text
-+foo:
-+! 1. load 32-bit value/address
-+ li $r1, 0x1 ! load immediate
-+ li $r1, 0xFF ! load immediate
-+ li $r1, 0x80000 ! load immediate
-+ li $r1, 0x80001 ! load immediate
-+ la $r1, var ! load address
-+! 2. load/store variables
-+ l.b $r1, var ! load value of variable
-+ l.b $r1, $r2 ! load value of variable
-+ l.h $r1, var ! load value of variable
-+ l.h $r1, $r2 ! load value of variable
-+ l.w $r1, var ! load value of variable
-+ l.w $r1, $r2 ! load value of variable
-+ l.bs $r1, var !
-+ l.bp $r1, var, 1 ! load value of variable, and
-+ l.hp $r1, var, 2 ! load value of variable, and
-+ l.wp $r1, var, 4 ! load value of variable, and
-+ l.bpc $r1, 1
-+ l.hpc $r1, 2
-+ l.wpc $r1, 4
-+ !1.bsp $r1, var, 1 ! FIXME: incorrect syntax, see docs
-+ !l.bspc $r1, var, 1 ! FIXME: incorrect syntax
-+ s.b $r1, var
-+ s.bp $r1, var, 1
-+ !s.bpc $r1, var, 1 ! FIXME: incorrect syntax
-+! 3. negation
-+ not $r1, $r2
-+ neg $r1, $r2
-+! 4. branch to label
-+ br $r1
-+ b foo
-+ beq $r1, $r2, foo
-+ bne $r1, $r2, foo
-+ bge $r1, $r2, foo
-+ bges $r1, $r2, foo
-+ bgt $r1, $r2, foo
-+ bgts $r1, $r2, foo
-+ blt $r1, $r2, foo
-+ blts $r1, $r2, foo
-+ ble $r1, $r2, foo
-+ bles $r1, $r2, foo
-+! 5. branch and link to function name
-+ bral $r1
-+ bal foo
-+ call foo
-+ bgezal $r1, foo
-+ bltzal $r1, foo
-+! 6. move
-+ move $r1, $r2
-+ move $r1, foo
-+ move $r1, 1
-+! 7. push/pop
-+ pushm $r28, $r29
-+ push $r1
-+ push.d var
-+ push.w var
-+ push.h var
-+ push.b var
-+ push.b var, $r1
-+ pusha var
-+ pusha var, $r1
-+ pushi 1
-+ pushi 1, $r1
-+ popm $r1, $r2
-+ pop $r1
-+ pop.d var, $r1
-+ pop.w var, $r1
-+ pop.h var, $r1
-+ pop.b var, $r1
-+ pop.b var, $r1, $r2
-+
-+ lbi.p $r1, [$r2], 1
-+ lhi.p $r1, [$r2], 2
-+ lwi.p $r1, [$r2], 4
-+ sbi.p $r1, [$r2], 1
-+ shi.p $r1, [$r2], 2
-+ swi.p $r1, [$r2], 4
-+ lbsi.p $r1, [$r2], 1
-+ lhsi.p $r1, [$r2], 2
-+ lwsi.p $r1, [$r2], 4
-+ v3push $r6, 0
-+ v3pop $r6, 0
-+.16bit_off
-+ move $r1, $r2
-+ push.s $r1,$r6, { $fp $gp $lp $sp }
-+ push.s { $fp $gp $lp $sp }
-+ pop.s $r1,$r6, { $fp $gp $lp $sp }
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/cc_pseudo_instruction_Os.d binutils-2.24/gas/testsuite/gas/nds32/cc_pseudo_instruction_Os.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/cc_pseudo_instruction_Os.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/cc_pseudo_instruction_Os.d 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,141 @@
-+#objdump: -d
-+#name: nds32 Os pseudo instructions
-+#as: -Os
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*84.*21.*.*.*.*.*.*.*.*movi55.*\$r1,#0x1
-+.*.*.*2:.*44.*10.*00.*ff.*.*movi.*\$r1,#0xff
-+.*.*.*6:.*46.*10.*00.*80.*.*sethi.*\$r1,#0x80
-+.*.*.*a:.*46.*10.*00.*80.*.*sethi.*\$r1,#0x80
-+.*.*.*e:.*58.*10.*80.*01.*.*ori.*\$r1,\$r1,#0x1
-+.*.*12:.*46.*10.*00.*00.*.*sethi.*\$r1,#0x0
-+.*.*16:.*58.*10.*80.*00.*.*ori.*\$r1,\$r1,#0x0
-+.*.*1a:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*1e:.*00.*17.*80.*00.*.*lbi.*\$r1,\[\$r15\+#0x0\]
-+.*.*22:.*a6.*50.*.*.*.*.*.*.*.*lbi333.*\$r1,\[\$r2\+#0x0\]
-+.*.*24:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*28:.*02.*17.*80.*00.*.*lhi.*\$r1,\[\$r15\+#0x0\]
-+.*.*2c:.*a4.*50.*.*.*.*.*.*.*.*lhi333.*\$r1,\[\$r2\+#0x0\]
-+.*.*2e:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*32:.*04.*17.*80.*00.*.*lwi.*\$r1,\[\$r15\+#0x0\]
-+.*.*36:.*b4.*22.*.*.*.*.*.*.*.*lwi450.*\$r1,\[\$r2\]
-+.*.*38:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*3c:.*20.*17.*80.*00.*.*lbsi.*\$r1,\[\$r15\+#0x0\]
-+.*.*40:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*44:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*.*48:.*08.*17.*80.*01.*.*lbi.bi.*\$r1,\[\$r15\],#0x1
-+.*.*4c:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*50:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*.*54:.*0a.*17.*80.*01.*.*lhi.bi.*\$r1,\[\$r15\],#0x2
-+.*.*58:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*5c:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*.*60:.*0c.*17.*80.*01.*.*lwi.bi.*\$r1,\[\$r15\],#0x4
-+.*.*64:.*08.*17.*80.*01.*.*lbi.bi.*\$r1,\[\$r15\],#0x1
-+.*.*68:.*0a.*17.*80.*01.*.*lhi.bi.*\$r1,\[\$r15\],#0x2
-+.*.*6c:.*0c.*17.*80.*01.*.*lwi.bi.*\$r1,\[\$r15\],#0x4
-+.*.*70:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*74:.*10.*17.*80.*00.*.*sbi.*\$r1,\[\$r15\+#0x0\]
-+.*.*78:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*7c:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*.*80:.*18.*17.*80.*01.*.*sbi.bi.*\$r1,\[\$r15\],#0x1
-+.*.*84:.*fe.*53.*.*.*.*.*.*.*.*not33.*\$r1,\$r2
-+.*.*86:.*fe.*52.*.*.*.*.*.*.*.*neg33.*\$r1,\$r2
-+.*.*88:.*dd.*01.*.*.*.*.*.*.*.*jr5.*\$r1
-+.*.*8a:.*d5.*00.*.*.*.*.*.*.*.*j8.*8a.*<foo\+0x8a>
-+.*.*8c:.*4c.*11.*00.*00.*.*beq.*\$r1,\$r2,8c.*<foo\+0x8c>
-+.*.*90:.*4c.*11.*40.*00.*.*bne.*\$r1,\$r2,90.*<foo\+0x90>
-+.*.*94:.*e2.*22.*.*.*.*.*.*.*.*slt45.*\$r1,\$r2
-+.*.*96:.*4e.*f2.*00.*00.*.*beqz.*\$r15,96.*<foo\+0x96>
-+.*.*9a:.*e0.*22.*.*.*.*.*.*.*.*slts45.*\$r1,\$r2
-+.*.*9c:.*4e.*f2.*00.*00.*.*beqz.*\$r15,9c.*<foo\+0x9c>
-+.*.*a0:.*e2.*41.*.*.*.*.*.*.*.*slt45.*\$r2,\$r1
-+.*.*a2:.*4e.*f3.*00.*00.*.*bnez.*\$r15,a2.*<foo\+0xa2>
-+.*.*a6:.*e0.*41.*.*.*.*.*.*.*.*slts45.*\$r2,\$r1
-+.*.*a8:.*4e.*f3.*00.*00.*.*bnez.*\$r15,a8.*<foo\+0xa8>
-+.*.*ac:.*e2.*22.*.*.*.*.*.*.*.*slt45.*\$r1,\$r2
-+.*.*ae:.*4e.*f3.*00.*00.*.*bnez.*\$r15,ae.*<foo\+0xae>
-+.*.*b2:.*e0.*22.*.*.*.*.*.*.*.*slts45.*\$r1,\$r2
-+.*.*b4:.*4e.*f3.*00.*00.*.*bnez.*\$r15,b4.*<foo\+0xb4>
-+.*.*b8:.*e2.*41.*.*.*.*.*.*.*.*slt45.*\$r2,\$r1
-+.*.*ba:.*4e.*f2.*00.*00.*.*beqz.*\$r15,ba.*<foo\+0xba>
-+.*.*be:.*e0.*41.*.*.*.*.*.*.*.*slts45.*\$r2,\$r1
-+.*.*c0:.*4e.*f2.*00.*00.*.*beqz.*\$r15,c0.*<foo\+0xc0>
-+.*.*c4:.*dd.*21.*.*.*.*.*.*.*.*jral5.*\$r1
-+.*.*c6:.*49.*00.*00.*00.*.*jal.*c6.*<foo\+0xc6>
-+.*.*ca:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*ce:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*.*d2:.*4b.*e0.*3c.*01.*.*jral.*\$lp,\$r15
-+.*.*d6:.*4e.*1c.*00.*00.*.*bgezal.*\$r1,d6.*<foo\+0xd6>
-+.*.*da:.*4e.*1d.*00.*00.*.*bltzal.*\$r1,da.*<foo\+0xda>
-+.*.*de:.*80.*22.*.*.*.*.*.*.*.*mov55.*\$r1,\$r2
-+.*.*e0:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*e4:.*04.*17.*80.*00.*.*lwi.*\$r1,\[\$r15\+#0x0\]
-+.*.*e8:.*84.*21.*.*.*.*.*.*.*.*movi55.*\$r1,#0x1
-+.*.*ea:.*3b.*ff.*ff.*3c.*.*smw.adm.*\$sp,\[\$sp\],\$sp,#0xc.*.*.*.*!.*\{\$fp,.*\$gp\}
-+.*.*ee:.*3a.*1f.*84.*3c.*.*smw.adm.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*.*f2:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*f6:.*04.*f7.*80.*00.*.*lwi.*\$r15,\[\$r15\+#0x0\]
-+.*.*fa:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*.*fe:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*102:.*04.*f7.*80.*00.*.*lwi.*\$r15,\[\$r15\+#0x0\]
-+.*106:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*10a:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*10e:.*04.*f7.*80.*00.*.*lwi.*\$r15,\[\$r15\+#0x0\]
-+.*112:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*116:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*11a:.*02.*f7.*80.*00.*.*lhi.*\$r15,\[\$r15\+#0x0\]
-+.*11e:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*122:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*126:.*00.*f7.*80.*00.*.*lbi.*\$r15,\[\$r15\+#0x0\]
-+.*12a:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*12e:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*132:.*00.*f7.*80.*00.*.*lbi.*\$r15,\[\$r15\+#0x0\]
-+.*136:.*3a.*f0.*bc.*3c.*.*smw.adm.*\$r15,\[\$r1\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*13a:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*13e:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*142:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*146:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*14a:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*14e:.*3a.*f0.*bc.*3c.*.*smw.adm.*\$r15,\[\$r1\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*152:.*85.*e1.*.*.*.*.*.*.*.*movi55.*\$r15,#0x1
-+.*154:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*158:.*85.*e1.*.*.*.*.*.*.*.*movi55.*\$r15,#0x1
-+.*15a:.*3a.*f0.*bc.*3c.*.*smw.adm.*\$r15,\[\$r1\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*15e:.*3a.*1f.*88.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r2,#0x0.*.*.*.*!.*\{\$r1~\$r2\}
-+.*162:.*3a.*1f.*84.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*166:.*3a.*1f.*84.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*16a:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*16e:.*14.*17.*80.*00.*.*swi.*\$r1,\[\$r15\+#0x0\]
-+.*172:.*3a.*1f.*84.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*176:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*17a:.*14.*17.*80.*00.*.*swi.*\$r1,\[\$r15\+#0x0\]
-+.*17e:.*3a.*1f.*84.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*182:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*186:.*14.*17.*80.*00.*.*swi.*\$r1,\[\$r15\+#0x0\]
-+.*18a:.*3a.*1f.*84.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*18e:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*192:.*12.*17.*80.*00.*.*shi.*\$r1,\[\$r15\+#0x0\]
-+.*196:.*3a.*1f.*84.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*19a:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*19e:.*10.*17.*80.*00.*.*sbi.*\$r1,\[\$r15\+#0x0\]
-+.*1a2:.*3a.*11.*04.*04.*.*lmw.bim.*\$r1,\[\$r2\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*1a6:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*1aa:.*10.*17.*80.*00.*.*sbi.*\$r1,\[\$r15\+#0x0\]
-+.*1ae:.*08.*11.*00.*01.*.*lbi.bi.*\$r1,\[\$r2\],#0x1
-+.*1b2:.*0a.*11.*00.*01.*.*lhi.bi.*\$r1,\[\$r2\],#0x2
-+.*1b6:.*a2.*51.*.*.*.*.*.*.*.*lwi333.bi.*\$r1,\[\$r2\],#0x4
-+.*1b8:.*18.*11.*00.*01.*.*sbi.bi.*\$r1,\[\$r2\],#0x1
-+.*1bc:.*1a.*11.*00.*01.*.*shi.bi.*\$r1,\[\$r2\],#0x2
-+.*1c0:.*aa.*51.*.*.*.*.*.*.*.*swi333.bi.*\$r1,\[\$r2\],#0x4
-+.*1c2:.*28.*11.*00.*01.*.*lbsi.bi.*\$r1,\[\$r2\],#0x1
-+.*1c6:.*2a.*11.*00.*01.*.*lhsi.bi.*\$r1,\[\$r2\],#0x2
-+.*1ca:.*a2.*51.*.*.*.*.*.*.*.*lwi333.bi.*\$r1,\[\$r2\],#0x4
-+.*1cc:.*fc.*00.*.*.*.*.*.*.*.*push25.*\$r6,#0.*.*.*.*!.*\{\$r6,.*\$fp,.*\$gp,.*\$lp\}
-+.*1ce:.*fc.*80.*.*.*.*.*.*.*.*pop25.*\$r6,#0.*.*.*.*!.*\{\$r6,.*\$fp,.*\$gp,.*\$lp\}
-+.*1d0:.*58.*11.*00.*00.*.*ori.*\$r1,\$r2,#0x0
-+.*1d4:.*3a.*1f.*9b.*fc.*.*smw.adm.*\$r1,\[\$sp\],\$r6,#0xf.*.*.*.*!.*\{\$r1~\$r6,.*\$fp,.*\$gp,.*\$lp,.*\$sp\}
-+.*1d8:.*3b.*ff.*ff.*fc.*.*smw.adm.*\$sp,\[\$sp\],\$sp,#0xf.*.*.*.*!.*\{\$fp,.*\$gp,.*\$lp,.*\$sp\}
-+.*1dc:.*3a.*1f.*9b.*c4.*.*lmw.bim.*\$r1,\[\$sp\],\$r6,#0xf.*.*.*.*!.*\{\$r1~\$r6,.*\$fp,.*\$gp,.*\$lp,.*\$sp\}
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/cc_pseudo_instruction_Os.s binutils-2.24/gas/testsuite/gas/nds32/cc_pseudo_instruction_Os.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/cc_pseudo_instruction_Os.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/cc_pseudo_instruction_Os.s 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,93 @@
-+ .data
-+ .size var, 4
-+var:
-+ .word 10
-+ .text
-+foo:
-+! 1. load 32-bit value/address
-+ li $r1, 0x1 ! load immediate
-+ li $r1, 0xFF ! load immediate
-+ li $r1, 0x80000 ! load immediate
-+ li $r1, 0x80001 ! load immediate
-+ la $r1, var ! load address
-+! 2. load/store variables
-+ l.b $r1, var ! load value of variable
-+ l.b $r1, $r2 ! load value of variable
-+ l.h $r1, var ! load value of variable
-+ l.h $r1, $r2 ! load value of variable
-+ l.w $r1, var ! load value of variable
-+ l.w $r1, $r2 ! load value of variable
-+ l.bs $r1, var !
-+ l.bp $r1, var, 1 ! load value of variable, and
-+ l.hp $r1, var, 2 ! load value of variable, and
-+ l.wp $r1, var, 4 ! load value of variable, and
-+ l.bpc $r1, 1
-+ l.hpc $r1, 2
-+ l.wpc $r1, 4
-+ !1.bsp $r1, var, 1 ! FIXME: incorrect syntax, see docs
-+ !l.bspc $r1, var, 1 ! FIXME: incorrect syntax
-+ s.b $r1, var
-+ s.bp $r1, var, 1
-+ !s.bpc $r1, var, 1 ! FIXME: incorrect syntax
-+! 3. negation
-+ not $r1, $r2
-+ neg $r1, $r2
-+! 4. branch to label
-+ br $r1
-+ b foo
-+ beq $r1, $r2, foo
-+ bne $r1, $r2, foo
-+ bge $r1, $r2, foo
-+ bges $r1, $r2, foo
-+ bgt $r1, $r2, foo
-+ bgts $r1, $r2, foo
-+ blt $r1, $r2, foo
-+ blts $r1, $r2, foo
-+ ble $r1, $r2, foo
-+ bles $r1, $r2, foo
-+! 5. branch and link to function name
-+ bral $r1
-+ bal foo
-+ call foob
-+ bgezal $r1, foo
-+ bltzal $r1, foo
-+! 6. move
-+ move $r1, $r2
-+ move $r1, foo
-+ move $r1, 1
-+! 7. push/pop
-+ pushm $r28, $r29
-+ push $r1
-+ push.d var
-+ push.w var
-+ push.h var
-+ push.b var
-+ push.b var, $r1
-+ pusha var
-+ pusha var, $r1
-+ pushi 1
-+ pushi 1, $r1
-+ popm $r1, $r2
-+ pop $r1
-+ pop.d var, $r1
-+ pop.w var, $r1
-+ pop.h var, $r1
-+ pop.b var, $r1
-+ pop.b var, $r1, $r2
-+
-+ lbi.p $r1, [$r2], 1
-+ lhi.p $r1, [$r2], 2
-+ lwi.p $r1, [$r2], 4
-+ sbi.p $r1, [$r2], 1
-+ shi.p $r1, [$r2], 2
-+ swi.p $r1, [$r2], 4
-+ lbsi.p $r1, [$r2], 1
-+ lhsi.p $r1, [$r2], 2
-+ lwsi.p $r1, [$r2], 4
-+ v3push $r6, 0
-+ v3pop $r6, 0
-+.16bit_off
-+ move $r1, $r2
-+ push.s $r1,$r6, { $fp $gp $lp $sp }
-+ push.s { $fp $gp $lp $sp }
-+ pop.s $r1,$r6, { $fp $gp $lp $sp }
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/cc_pseudo_instruction_Os_verbatim.d binutils-2.24/gas/testsuite/gas/nds32/cc_pseudo_instruction_Os_verbatim.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/cc_pseudo_instruction_Os_verbatim.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/cc_pseudo_instruction_Os_verbatim.d 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,144 @@
-+#objdump: -d --prefix-addresses
-+#name: nds32 O1 verbatim instructions
-+#as: -O1
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+0+000 <[^>]*> movi55 \$r1,#0x1
-+0+002 <[^>]*> movi \$r1,#0xff
-+0+006 <[^>]*> sethi \$r1,#0x80
-+0+00a <[^>]*> sethi \$r1,#0x80
-+0+00e <[^>]*> ori \$r1,\$r1,#0x1
-+0+012 <[^>]*> sethi \$r1,#0x0
-+0+016 <[^>]*> ori \$r1,\$r1,#0x0
-+0+01a <[^>]*> sethi \$r15,#0x0
-+0+01e <[^>]*> lbi \$r1,\[\$r15\+#0x0\]
-+0+022 <[^>]*> lbi \$r1,\[\$r2\+#0x0\]
-+0+026 <[^>]*> sethi \$r15,#0x0
-+0+02a <[^>]*> lhi \$r1,\[\$r15\+#0x0\]
-+0+02e <[^>]*> lhi \$r1,\[\$r2\+#0x0\]
-+0+032 <[^>]*> sethi \$r15,#0x0
-+0+036 <[^>]*> lwi \$r1,\[\$r15\+#0x0\]
-+0+03a <[^>]*> lwi \$r1,\[\$r2\+#0x0\]
-+0+03e <[^>]*> sethi \$r15,#0x0
-+0+042 <[^>]*> lbsi \$r1,\[\$r15\+#0x0\]
-+0+046 <[^>]*> sethi \$r15,#0x0
-+0+04a <[^>]*> ori \$r15,\$r15,#0x0
-+0+04e <[^>]*> lbi.bi \$r1,\[\$r15\],#0x1
-+0+052 <[^>]*> sethi \$r15,#0x0
-+0+056 <[^>]*> ori \$r15,\$r15,#0x0
-+0+05a <[^>]*> lhi.bi \$r1,\[\$r15\],#0x2
-+0+05e <[^>]*> sethi \$r15,#0x0
-+0+062 <[^>]*> ori \$r15,\$r15,#0x0
-+0+066 <[^>]*> lwi.bi \$r1,\[\$r15\],#0x4
-+0+06a <[^>]*> lbi.bi \$r1,\[\$r15\],#0x1
-+0+06e <[^>]*> lhi.bi \$r1,\[\$r15\],#0x2
-+0+072 <[^>]*> lwi.bi \$r1,\[\$r15\],#0x4
-+0+076 <[^>]*> sethi \$r15,#0x0
-+0+07a <[^>]*> sbi \$r1,\[\$r15\+#0x0\]
-+0+07e <[^>]*> sethi \$r15,#0x0
-+0+082 <[^>]*> ori \$r15,\$r15,#0x0
-+0+086 <[^>]*> sbi.bi \$r1,\[\$r15\],#0x1
-+0+08a <[^>]*> nor \$r1,\$r2,\$r2
-+0+08e <[^>]*> subri \$r1,\$r2,#0x0
-+0+092 <[^>]*> jr \$r1
-+0+096 <[^>]*> sethi \$r15,#0x0
-+0+09a <[^>]*> ori \$r15,\$r15,#0x0
-+0+09e <[^>]*> jr \$r15
-+0+0a2 <[^>]*> beq \$r1,\$r2,0+a2 <foo\+0xa2>
-+0+0a6 <[^>]*> bne \$r1,\$r2,0+a6 <foo\+0xa6>
-+0+0aa <[^>]*> slt \$r15,\$r1,\$r2
-+0+0ae <[^>]*> beqz \$r15,0+ae <foo\+0xae>
-+0+0b2 <[^>]*> slts \$r15,\$r1,\$r2
-+0+0b6 <[^>]*> beqz \$r15,0+b6 <foo\+0xb6>
-+0+0ba <[^>]*> slt \$r15,\$r2,\$r1
-+0+0be <[^>]*> bnez \$r15,0+be <foo\+0xbe>
-+0+0c2 <[^>]*> slts \$r15,\$r2,\$r1
-+0+0c6 <[^>]*> bnez \$r15,0+c6 <foo\+0xc6>
-+0+0ca <[^>]*> slt \$r15,\$r1,\$r2
-+0+0ce <[^>]*> bnez \$r15,0+ce <foo\+0xce>
-+0+0d2 <[^>]*> slts \$r15,\$r1,\$r2
-+0+0d6 <[^>]*> bnez \$r15,0+d6 <foo\+0xd6>
-+0+0da <[^>]*> slt \$r15,\$r2,\$r1
-+0+0de <[^>]*> beqz \$r15,0+de <foo\+0xde>
-+0+0e2 <[^>]*> slts \$r15,\$r2,\$r1
-+0+0e6 <[^>]*> beqz \$r15,0+e6 <foo\+0xe6>
-+0+0ea <[^>]*> jral \$lp,\$r1
-+0+0ee <[^>]*> sethi \$r15,#0x0
-+0+0f2 <[^>]*> ori \$r15,\$r15,#0x0
-+0+0f6 <[^>]*> jral \$lp,\$r15
-+0+0fa <[^>]*> sethi \$r15,#0x0
-+0+0fe <[^>]*> ori \$r15,\$r15,#0x0
-+0+102 <[^>]*> jral \$lp,\$r15
-+0+106 <[^>]*> bgezal \$r1,0+106 <foo\+0x106>
-+0+10a <[^>]*> bltzal \$r1,0+10a <foo\+0x10a>
-+0+10e <[^>]*> mov55 \$r1,\$r2
-+0+110 <[^>]*> sethi \$r15,#0x0
-+0+114 <[^>]*> lwi \$r1,\[\$r15\+#0x0\]
-+0+118 <[^>]*> movi55 \$r1,#0x1
-+0+11a <[^>]*> smw.adm \$sp,\[\$sp\],\$sp,#0xc ! {\$fp, \$gp}
-+0+11e <[^>]*> smw.adm \$r1,\[\$sp\],\$r1,#0x0 ! {\$r1}
-+0+122 <[^>]*> sethi \$r15,#0x0
-+0+126 <[^>]*> lwi \$r15,\[\$r15\+#0x0\]
-+0+12a <[^>]*> smw.adm \$r15,\[\$sp\],\$r15,#0x0 ! {\$r15}
-+0+12e <[^>]*> sethi \$r15,#0x0
-+0+132 <[^>]*> lwi \$r15,\[\$r15\+#0x0\]
-+0+136 <[^>]*> smw.adm \$r15,\[\$sp\],\$r15,#0x0 ! {\$r15}
-+0+13a <[^>]*> sethi \$r15,#0x0
-+0+13e <[^>]*> lwi \$r15,\[\$r15\+#0x0\]
-+0+142 <[^>]*> smw.adm \$r15,\[\$sp\],\$r15,#0x0 ! {\$r15}
-+0+146 <[^>]*> sethi \$r15,#0x0
-+0+14a <[^>]*> lhi \$r15,\[\$r15\+#0x0\]
-+0+14e <[^>]*> smw.adm \$r15,\[\$sp\],\$r15,#0x0 ! {\$r15}
-+0+152 <[^>]*> sethi \$r15,#0x0
-+0+156 <[^>]*> lbi \$r15,\[\$r15\+#0x0\]
-+0+15a <[^>]*> smw.adm \$r15,\[\$sp\],\$r15,#0x0 ! {\$r15}
-+0+15e <[^>]*> sethi \$r15,#0x0
-+0+162 <[^>]*> lbi \$r15,\[\$r15\+#0x0\]
-+0+166 <[^>]*> smw.adm \$r15,\[\$r1\],\$r15,#0x0 ! {\$r15}
-+0+16a <[^>]*> sethi \$r15,#0x0
-+0+16e <[^>]*> ori \$r15,\$r15,#0x0
-+0+172 <[^>]*> smw.adm \$r15,\[\$sp\],\$r15,#0x0 ! {\$r15}
-+0+176 <[^>]*> sethi \$r15,#0x0
-+0+17a <[^>]*> ori \$r15,\$r15,#0x0
-+0+17e <[^>]*> smw.adm \$r15,\[\$r1\],\$r15,#0x0 ! {\$r15}
-+0+182 <[^>]*> movi55 \$r15,#0x1
-+0+184 <[^>]*> smw.adm \$r15,\[\$sp\],\$r15,#0x0 ! {\$r15}
-+0+188 <[^>]*> movi55 \$r15,#0x1
-+0+18a <[^>]*> smw.adm \$r15,\[\$r1\],\$r15,#0x0 ! {\$r15}
-+0+18e <[^>]*> lmw.bim \$r1,\[\$sp\],\$r2,#0x0 ! {\$r1~\$r2}
-+0+192 <[^>]*> lmw.bim \$r1,\[\$sp\],\$r1,#0x0 ! {\$r1}
-+0+196 <[^>]*> lmw.bim \$r1,\[\$sp\],\$r1,#0x0 ! {\$r1}
-+0+19a <[^>]*> sethi \$r15,#0x0
-+0+19e <[^>]*> swi \$r1,\[\$r15\+#0x0\]
-+0+1a2 <[^>]*> lmw.bim \$r1,\[\$sp\],\$r1,#0x0 ! {\$r1}
-+0+1a6 <[^>]*> sethi \$r15,#0x0
-+0+1aa <[^>]*> swi \$r1,\[\$r15\+#0x0\]
-+0+1ae <[^>]*> lmw.bim \$r1,\[\$sp\],\$r1,#0x0 ! {\$r1}
-+0+1b2 <[^>]*> sethi \$r15,#0x0
-+0+1b6 <[^>]*> swi \$r1,\[\$r15\+#0x0\]
-+0+1ba <[^>]*> lmw.bim \$r1,\[\$sp\],\$r1,#0x0 ! {\$r1}
-+0+1be <[^>]*> sethi \$r15,#0x0
-+0+1c2 <[^>]*> shi \$r1,\[\$r15\+#0x0\]
-+0+1c6 <[^>]*> lmw.bim \$r1,\[\$sp\],\$r1,#0x0 ! {\$r1}
-+0+1ca <[^>]*> sethi \$r15,#0x0
-+0+1ce <[^>]*> sbi \$r1,\[\$r15\+#0x0\]
-+0+1d2 <[^>]*> lmw.bim \$r1,\[\$r2\],\$r1,#0x0 ! {\$r1}
-+0+1d6 <[^>]*> sethi \$r15,#0x0
-+0+1da <[^>]*> sbi \$r1,\[\$r15\+#0x0\]
-+0+1de <[^>]*> lbi.bi \$r1,\[\$r2\],#0x1
-+0+1e2 <[^>]*> lhi.bi \$r1,\[\$r2\],#0x2
-+0+1e6 <[^>]*> lwi.bi \$r1,\[\$r2\],#0x4
-+0+1ea <[^>]*> sbi.bi \$r1,\[\$r2\],#0x1
-+0+1ee <[^>]*> shi.bi \$r1,\[\$r2\],#0x2
-+0+1f2 <[^>]*> swi.bi \$r1,\[\$r2\],#0x4
-+0+1f6 <[^>]*> lbsi.bi \$r1,\[\$r2\],#0x1
-+0+1fa <[^>]*> lhsi.bi \$r1,\[\$r2\],#0x2
-+0+1fe <[^>]*> lwi.bi \$r1,\[\$r2\],#0x4
-+0+202 <[^>]*> push25 \$r6,#0 ! {\$r6, \$fp, \$gp, \$lp}
-+0+204 <[^>]*> pop25 \$r6,#0 ! {\$r6, \$fp, \$gp, \$lp}
-+0+206 <[^>]*> ori \$r1,\$r2,#0x0
-+0+20a <[^>]*> smw.adm \$r1,\[\$sp\],\$r6,#0xf ! {\$r1~\$r6, \$fp, \$gp, \$lp, \$sp}
-+0+20e <[^>]*> smw.adm \$sp,\[\$sp\],\$sp,#0xf ! {\$fp, \$gp, \$lp, \$sp}
-+0+212 <[^>]*> lmw.bim \$r1,\[\$sp\],\$r6,#0xf ! {\$r1~\$r6, \$fp, \$gp, \$lp, \$sp}
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/cc_pseudo_instruction_Os_verbatim.s binutils-2.24/gas/testsuite/gas/nds32/cc_pseudo_instruction_Os_verbatim.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/cc_pseudo_instruction_Os_verbatim.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/cc_pseudo_instruction_Os_verbatim.s 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,94 @@
-+ .data
-+ .size var, 4
-+ .flag verbatim
-+var:
-+ .word 10
-+ .text
-+foo:
-+! 1. load 32-bit value/address
-+ li $r1, 0x1 ! load immediate
-+ li $r1, 0xFF ! load immediate
-+ li $r1, 0x80000 ! load immediate
-+ li $r1, 0x80001 ! load immediate
-+ la $r1, var ! load address
-+! 2. load/store variables
-+ l.b $r1, var ! load value of variable
-+ l.b $r1, $r2 ! load value of variable
-+ l.h $r1, var ! load value of variable
-+ l.h $r1, $r2 ! load value of variable
-+ l.w $r1, var ! load value of variable
-+ l.w $r1, $r2 ! load value of variable
-+ l.bs $r1, var !
-+ l.bp $r1, var, 1 ! load value of variable, and
-+ l.hp $r1, var, 2 ! load value of variable, and
-+ l.wp $r1, var, 4 ! load value of variable, and
-+ l.bpc $r1, 1
-+ l.hpc $r1, 2
-+ l.wpc $r1, 4
-+ !1.bsp $r1, var, 1 ! FIXME: incorrect syntax, see docs
-+ !l.bspc $r1, var, 1 ! FIXME: incorrect syntax
-+ s.b $r1, var
-+ s.bp $r1, var, 1
-+ !s.bpc $r1, var, 1 ! FIXME: incorrect syntax
-+! 3. negation
-+ not $r1, $r2
-+ neg $r1, $r2
-+! 4. branch to label
-+ br $r1
-+ b foo
-+ beq $r1, $r2, foo
-+ bne $r1, $r2, foo
-+ bge $r1, $r2, foo
-+ bges $r1, $r2, foo
-+ bgt $r1, $r2, foo
-+ bgts $r1, $r2, foo
-+ blt $r1, $r2, foo
-+ blts $r1, $r2, foo
-+ ble $r1, $r2, foo
-+ bles $r1, $r2, foo
-+! 5. branch and link to function name
-+ bral $r1
-+ bal foo
-+ call foo
-+ bgezal $r1, foo
-+ bltzal $r1, foo
-+! 6. move
-+ move $r1, $r2
-+ move $r1, foo
-+ move $r1, 1
-+! 7. push/pop
-+ pushm $r28, $r29
-+ push $r1
-+ push.d var
-+ push.w var
-+ push.h var
-+ push.b var
-+ push.b var, $r1
-+ pusha var
-+ pusha var, $r1
-+ pushi 1
-+ pushi 1, $r1
-+ popm $r1, $r2
-+ pop $r1
-+ pop.d var, $r1
-+ pop.w var, $r1
-+ pop.h var, $r1
-+ pop.b var, $r1
-+ pop.b var, $r1, $r2
-+
-+ lbi.p $r1, [$r2], 1
-+ lhi.p $r1, [$r2], 2
-+ lwi.p $r1, [$r2], 4
-+ sbi.p $r1, [$r2], 1
-+ shi.p $r1, [$r2], 2
-+ swi.p $r1, [$r2], 4
-+ lbsi.p $r1, [$r2], 1
-+ lhsi.p $r1, [$r2], 2
-+ lwsi.p $r1, [$r2], 4
-+ v3push $r6, 0
-+ v3pop $r6, 0
-+.16bit_off
-+ move $r1, $r2
-+ push.s $r1,$r6, { $fp $gp $lp $sp }
-+ push.s { $fp $gp $lp $sp }
-+ pop.s $r1,$r6, { $fp $gp $lp $sp }
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/cc_reduce_reg.d binutils-2.24/gas/testsuite/gas/nds32/cc_reduce_reg.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/cc_reduce_reg.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/cc_reduce_reg.d 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,13 @@
-+#objdump: -d
-+#name: nds32 reduce register instructions
-+#as: -mreduced-regs
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*3a.*ff.*bc.*04.*.*lmw.bim.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*.*.*4:.*3a.*5f.*9c.*3c.*.*smw.adm.*\$r5,\[\$sp\],\$r7,#0x0.*.*.*.*!.*\{\$r5~\$r7\}
-+.*.*.*8:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*.*.*c:.*3a.*5f.*9c.*04.*.*lmw.bim.*\$r5,\[\$sp\],\$r7,#0x0.*.*.*.*!.*\{\$r5~\$r7\}
-+.*.*10:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/cc_reduce_reg.s binutils-2.24/gas/testsuite/gas/nds32/cc_reduce_reg.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/cc_reduce_reg.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/cc_reduce_reg.s 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,7 @@
-+foo:
-+ popm $r26, $r27
-+ pushm $r5, $r7
-+ pushm $r15, $r16
-+ popm $r5, $r7
-+ pushm $r26, $r27
-+
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/dsp.d binutils-2.24/gas/testsuite/gas/nds32/dsp.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/dsp.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/dsp.d 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,176 @@
-+#objdump: -d --prefix-addresses
-+#name: nds32 dsp instructions
-+#as: -mall-ext
-+
-+# Test dsp instructions
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+0+0000 <[^>]*> add16 \$r0,\$r1,\$r2
-+0+0004 <[^>]*> radd16 \$r0,\$r1,\$r2
-+0+0008 <[^>]*> uradd16 \$r0,\$r1,\$r2
-+0+000c <[^>]*> kadd16 \$r0,\$r1,\$r2
-+0+0010 <[^>]*> ukadd16 \$r0,\$r1,\$r2
-+0+0014 <[^>]*> sub16 \$r0,\$r1,\$r2
-+0+0018 <[^>]*> rsub16 \$r0,\$r1,\$r2
-+0+001c <[^>]*> ursub16 \$r0,\$r1,\$r2
-+0+0020 <[^>]*> ksub16 \$r0,\$r1,\$r2
-+0+0024 <[^>]*> uksub16 \$r0,\$r1,\$r2
-+0+0028 <[^>]*> cras16 \$r0,\$r1,\$r2
-+0+002c <[^>]*> rcras16 \$r0,\$r1,\$r2
-+0+0030 <[^>]*> urcras16 \$r0,\$r1,\$r2
-+0+0034 <[^>]*> kcras16 \$r0,\$r1,\$r2
-+0+0038 <[^>]*> ukcras16 \$r0,\$r1,\$r2
-+0+003c <[^>]*> crsa16 \$r0,\$r1,\$r2
-+0+0040 <[^>]*> rcrsa16 \$r0,\$r1,\$r2
-+0+0044 <[^>]*> urcrsa16 \$r0,\$r1,\$r2
-+0+0048 <[^>]*> kcrsa16 \$r0,\$r1,\$r2
-+0+004c <[^>]*> ukcrsa16 \$r0,\$r1,\$r2
-+0+0050 <[^>]*> add8 \$r0,\$r1,\$r2
-+0+0054 <[^>]*> radd8 \$r0,\$r1,\$r2
-+0+0058 <[^>]*> uradd8 \$r0,\$r1,\$r2
-+0+005c <[^>]*> kadd8 \$r0,\$r1,\$r2
-+0+0060 <[^>]*> ukadd8 \$r0,\$r1,\$r2
-+0+0064 <[^>]*> sub8 \$r0,\$r1,\$r2
-+0+0068 <[^>]*> rsub8 \$r0,\$r1,\$r2
-+0+006c <[^>]*> ursub8 \$r0,\$r1,\$r2
-+0+0070 <[^>]*> ksub8 \$r0,\$r1,\$r2
-+0+0074 <[^>]*> uksub8 \$r0,\$r1,\$r2
-+0+0078 <[^>]*> sra16 \$r0,\$r1,\$r2
-+0+007c <[^>]*> srai16 \$r0,\$r1,#0x4
-+0+0080 <[^>]*> sra16.u \$r0,\$r1,\$r2
-+0+0084 <[^>]*> srai16.u \$r0,\$r1,#0x4
-+0+0088 <[^>]*> srl16 \$r0,\$r1,\$r2
-+0+008c <[^>]*> srli16 \$r0,\$r1,#0x4
-+0+0090 <[^>]*> srl16.u \$r0,\$r1,\$r2
-+0+0094 <[^>]*> srli16.u \$r0,\$r1,#0x4
-+0+0098 <[^>]*> sll16 \$r0,\$r1,\$r2
-+0+009c <[^>]*> slli16 \$r0,\$r1,#0x4
-+0+00a0 <[^>]*> kslra16 \$r0,\$r1,\$r2
-+0+00a4 <[^>]*> kslli16 \$r0,\$r1,#0x4
-+0+00a8 <[^>]*> kslra16 \$r0,\$r1,\$r2
-+0+00ac <[^>]*> kslra16.u \$r0,\$r1,\$r2
-+0+00b0 <[^>]*> cmpeq16 \$r0,\$r1,\$r2
-+0+00b4 <[^>]*> scmplt16 \$r0,\$r1,\$r2
-+0+00b8 <[^>]*> scmple16 \$r0,\$r1,\$r2
-+0+00bc <[^>]*> ucmplt16 \$r0,\$r1,\$r2
-+0+00c0 <[^>]*> ucmple16 \$r0,\$r1,\$r2
-+0+00c4 <[^>]*> cmpeq8 \$r0,\$r1,\$r2
-+0+00c8 <[^>]*> scmplt8 \$r0,\$r1,\$r2
-+0+00cc <[^>]*> scmple8 \$r0,\$r1,\$r2
-+0+00d0 <[^>]*> ucmplt8 \$r0,\$r1,\$r2
-+0+00d4 <[^>]*> ucmple8 \$r0,\$r1,\$r2
-+0+00d8 <[^>]*> smin16 \$r0,\$r1,\$r2
-+0+00dc <[^>]*> umin16 \$r0,\$r1,\$r2
-+0+00e0 <[^>]*> smax16 \$r0,\$r1,\$r2
-+0+00e4 <[^>]*> umax16 \$r0,\$r1,\$r2
-+0+00e8 <[^>]*> sclip16 \$r0,\$r1,#0x4
-+0+00ec <[^>]*> uclip16 \$r0,\$r1,#0x4
-+0+00f0 <[^>]*> khm16 \$r0,\$r1,\$r2
-+0+00f4 <[^>]*> khmx16 \$r0,\$r1,\$r2
-+0+00f8 <[^>]*> kabs16 \$r0,\$r1
-+0+00fc <[^>]*> smin8 \$r0,\$r1,\$r2
-+0+0100 <[^>]*> umin8 \$r0,\$r1,\$r2
-+0+0104 <[^>]*> smax8 \$r0,\$r1,\$r2
-+0+0108 <[^>]*> umax8 \$r0,\$r1,\$r2
-+0+010c <[^>]*> kabs8 \$r0,\$r1
-+0+0110 <[^>]*> sunpkd810 \$r0,\$r1
-+0+0114 <[^>]*> sunpkd820 \$r0,\$r1
-+0+0118 <[^>]*> sunpkd830 \$r0,\$r1
-+0+011c <[^>]*> sunpkd831 \$r0,\$r1
-+0+0120 <[^>]*> zunpkd810 \$r0,\$r1
-+0+0124 <[^>]*> zunpkd820 \$r0,\$r1
-+0+0128 <[^>]*> zunpkd830 \$r0,\$r1
-+0+012c <[^>]*> zunpkd831 \$r0,\$r1
-+0+0130 <[^>]*> raddw \$r0,\$r1,\$r2
-+0+0134 <[^>]*> uraddw \$r0,\$r1,\$r2
-+0+0138 <[^>]*> rsubw \$r0,\$r1,\$r2
-+0+013c <[^>]*> ursubw \$r0,\$r1,\$r2
-+0+0140 <[^>]*> sra.u \$r0,\$r1,\$r2
-+0+0144 <[^>]*> srai.u \$r0,\$r1,#0x5
-+0+0148 <[^>]*> kslraw \$r0,\$r1,\$r2
-+0+014c <[^>]*> kslli \$r0,\$r1,#0x5
-+0+0150 <[^>]*> kslraw.u \$r0,\$r1,\$r2
-+0+0154 <[^>]*> pkbb16 \$r0,\$r1,\$r2
-+0+0158 <[^>]*> pkbt16 \$r0,\$r1,\$r2
-+0+015c <[^>]*> pktb16 \$r0,\$r1,\$r2
-+0+0160 <[^>]*> pktt16 \$r0,\$r1,\$r2
-+0+0164 <[^>]*> smmul \$r0,\$r1,\$r2
-+0+0168 <[^>]*> smmul.u \$r0,\$r1,\$r2
-+0+016c <[^>]*> kmmac \$r0,\$r1,\$r2
-+0+0170 <[^>]*> kmmac.u \$r0,\$r1,\$r2
-+0+0174 <[^>]*> kmmsb \$r0,\$r1,\$r2
-+0+0178 <[^>]*> kmmsb.u \$r0,\$r1,\$r2
-+0+017c <[^>]*> kwmmul \$r0,\$r1,\$r2
-+0+0180 <[^>]*> kwmmul.u \$r0,\$r1,\$r2
-+0+0184 <[^>]*> smmwb \$r0,\$r1,\$r2
-+0+0188 <[^>]*> smmwb.u \$r0,\$r1,\$r2
-+0+018c <[^>]*> smmwt \$r0,\$r1,\$r2
-+0+0190 <[^>]*> smmwt.u \$r0,\$r1,\$r2
-+0+0194 <[^>]*> kmmawb \$r0,\$r1,\$r2
-+0+0198 <[^>]*> kmmawb.u \$r0,\$r1,\$r2
-+0+019c <[^>]*> kmmawt \$r0,\$r1,\$r2
-+0+01a0 <[^>]*> kmmawt.u \$r0,\$r1,\$r2
-+0+01a4 <[^>]*> smbb \$r0,\$r1,\$r2
-+0+01a8 <[^>]*> smbt \$r0,\$r1,\$r2
-+0+01ac <[^>]*> smtt \$r0,\$r1,\$r2
-+0+01b0 <[^>]*> kmda \$r0,\$r1,\$r2
-+0+01b4 <[^>]*> kmxda \$r0,\$r1,\$r2
-+0+01b8 <[^>]*> smds \$r0,\$r1,\$r2
-+0+01bc <[^>]*> smdrs \$r0,\$r1,\$r2
-+0+01c0 <[^>]*> smxds \$r0,\$r1,\$r2
-+0+01c4 <[^>]*> kmabb \$r0,\$r1,\$r2
-+0+01c8 <[^>]*> kmabt \$r0,\$r1,\$r2
-+0+01cc <[^>]*> kmatt \$r0,\$r1,\$r2
-+0+01d0 <[^>]*> kmada \$r0,\$r1,\$r2
-+0+01d4 <[^>]*> kmaxda \$r0,\$r1,\$r2
-+0+01d8 <[^>]*> kmads \$r0,\$r1,\$r2
-+0+01dc <[^>]*> kmadrs \$r0,\$r1,\$r2
-+0+01e0 <[^>]*> kmaxds \$r0,\$r1,\$r2
-+0+01e4 <[^>]*> kmsda \$r0,\$r1,\$r2
-+0+01e8 <[^>]*> kmsxda \$r0,\$r1,\$r2
-+0+01ec <[^>]*> smal \$r0,\$r1,\$r2
-+0+01f0 <[^>]*> clips \$r0,\$r1,#0x5
-+0+01f4 <[^>]*> clip \$r0,\$r1,#0x5
-+0+01f8 <[^>]*> bitrev \$r0,\$r1,\$r2
-+0+01fc <[^>]*> bitrevi \$r0,\$r1,#0x5
-+0+0200 <[^>]*> wext \$r0,\$r1,\$r2
-+0+0204 <[^>]*> wexti \$r0,\$r2,#0x5
-+0+0208 <[^>]*> bpick \$r0,\$r1,\$r2,\$r3
-+0+020c <[^>]*> insb \$r0,\$r1,#0x2
-+0+0210 <[^>]*> add64 \$r0,\$r1,\$r2
-+0+0214 <[^>]*> radd64 \$r0,\$r1,\$r2
-+0+0218 <[^>]*> uradd64 \$r0,\$r1,\$r2
-+0+021c <[^>]*> kadd64 \$r0,\$r1,\$r2
-+0+0220 <[^>]*> ukadd64 \$r0,\$r1,\$r2
-+0+0224 <[^>]*> sub64 \$r0,\$r1,\$r2
-+0+0228 <[^>]*> rsub64 \$r0,\$r1,\$r2
-+0+022c <[^>]*> ursub64 \$r0,\$r1,\$r2
-+0+0230 <[^>]*> ksub64 \$r0,\$r1,\$r2
-+0+0234 <[^>]*> uksub64 \$r0,\$r1,\$r2
-+0+0238 <[^>]*> smar64 \$r0,\$r1,\$r2
-+0+023c <[^>]*> smsr64 \$r0,\$r1,\$r2
-+0+0240 <[^>]*> umar64 \$r0,\$r1,\$r2
-+0+0244 <[^>]*> umsr64 \$r0,\$r1,\$r2
-+0+0248 <[^>]*> kmar64 \$r0,\$r1,\$r2
-+0+024c <[^>]*> kmsr64 \$r0,\$r1,\$r2
-+0+0250 <[^>]*> ukmar64 \$r0,\$r1,\$r2
-+0+0254 <[^>]*> ukmsr64 \$r0,\$r1,\$r2
-+0+0258 <[^>]*> smalbb \$r0,\$r1,\$r2
-+0+025c <[^>]*> smalbt \$r0,\$r1,\$r2
-+0+0260 <[^>]*> smaltt \$r0,\$r1,\$r2
-+0+0264 <[^>]*> smalda \$r0,\$r1,\$r2
-+0+0268 <[^>]*> smalxda \$r0,\$r1,\$r2
-+0+026c <[^>]*> smalds \$r0,\$r1,\$r2
-+0+0270 <[^>]*> smaldrs \$r0,\$r1,\$r2
-+0+0274 <[^>]*> smalxds \$r0,\$r1,\$r2
-+0+0278 <[^>]*> smslda \$r0,\$r1,\$r2
-+0+027c <[^>]*> smslxda \$r0,\$r1,\$r2
-+0+0280 <[^>]*> kaddw \$r0,\$r1,\$r2
-+0+0284 <[^>]*> ksubw \$r0,\$r1,\$r2
-+0+0288 <[^>]*> kslraw \$r0,\$r1,\$r2
-+0+028c <[^>]*> kaddh \$r0,\$r1,\$r2
-+0+0290 <[^>]*> ksubh \$r0,\$r1,\$r2
-+0+0294 <[^>]*> rdov \$r0
-+0+0298 <[^>]*> clrov
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/dsp.s binutils-2.24/gas/testsuite/gas/nds32/dsp.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/dsp.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/dsp.s 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,168 @@
-+foo:
-+ add16 $r0,$r1,$r2
-+ radd16 $r0,$r1,$r2
-+ uradd16 $r0,$r1,$r2
-+ kadd16 $r0,$r1,$r2
-+ ukadd16 $r0,$r1,$r2
-+ sub16 $r0,$r1,$r2
-+ rsub16 $r0,$r1,$r2
-+ ursub16 $r0,$r1,$r2
-+ ksub16 $r0,$r1,$r2
-+ uksub16 $r0,$r1,$r2
-+ cras16 $r0,$r1,$r2
-+ rcras16 $r0,$r1,$r2
-+ urcras16 $r0,$r1,$r2
-+ kcras16 $r0,$r1,$r2
-+ ukcras16 $r0,$r1,$r2
-+ crsa16 $r0,$r1,$r2
-+ rcrsa16 $r0,$r1,$r2
-+ urcrsa16 $r0,$r1,$r2
-+ kcrsa16 $r0,$r1,$r2
-+ ukcrsa16 $r0,$r1,$r2
-+ add8 $r0,$r1,$r2
-+ radd8 $r0,$r1,$r2
-+ uradd8 $r0,$r1,$r2
-+ kadd8 $r0,$r1,$r2
-+ ukadd8 $r0,$r1,$r2
-+ sub8 $r0,$r1,$r2
-+ rsub8 $r0,$r1,$r2
-+ ursub8 $r0,$r1,$r2
-+ ksub8 $r0,$r1,$r2
-+ uksub8 $r0,$r1,$r2
-+ sra16 $r0,$r1,$r2
-+ srai16 $r0,$r1, 4
-+ sra16.u $r0,$r1,$r2
-+ srai16.u $r0,$r1, 4
-+ srl16 $r0,$r1,$r2
-+ srli16 $r0,$r1, 4
-+ srl16.u $r0,$r1,$r2
-+ srli16.u $r0,$r1, 4
-+ sll16 $r0,$r1,$r2
-+ slli16 $r0,$r1, 4
-+ ksll16 $r0,$r1,$r2
-+ kslli16 $r0,$r1, 4
-+ kslra16 $r0,$r1,$r2
-+ kslra16.u $r0,$r1,$r2
-+ cmpeq16 $r0,$r1,$r2
-+ scmplt16 $r0,$r1,$r2
-+ scmple16 $r0,$r1,$r2
-+ ucmplt16 $r0,$r1,$r2
-+ ucmple16 $r0,$r1,$r2
-+ cmpeq8 $r0,$r1,$r2
-+ scmplt8 $r0,$r1,$r2
-+ scmple8 $r0,$r1,$r2
-+ ucmplt8 $r0,$r1,$r2
-+ ucmple8 $r0,$r1,$r2
-+ smin16 $r0,$r1,$r2
-+ umin16 $r0,$r1,$r2
-+ smax16 $r0,$r1,$r2
-+ umax16 $r0,$r1,$r2
-+ sclip16 $r0,$r1, 4
-+ uclip16 $r0,$r1, 4
-+ khm16 $r0,$r1,$r2
-+ khmx16 $r0,$r1,$r2
-+ kabs16 $r0,$r1
-+ smin8 $r0,$r1,$r2
-+ umin8 $r0,$r1,$r2
-+ smax8 $r0,$r1,$r2
-+ umax8 $r0,$r1,$r2
-+ kabs8 $r0,$r1
-+ sunpkd810 $r0,$r1
-+ sunpkd820 $r0,$r1
-+ sunpkd830 $r0,$r1
-+ sunpkd831 $r0,$r1
-+ zunpkd810 $r0,$r1
-+ zunpkd820 $r0,$r1
-+ zunpkd830 $r0,$r1
-+ zunpkd831 $r0,$r1
-+ raddw $r0,$r1,$r2
-+ uraddw $r0,$r1,$r2
-+ rsubw $r0,$r1,$r2
-+ ursubw $r0,$r1,$r2
-+ sra.u $r0,$r1,$r2
-+ srai.u $r0,$r1, 5
-+ ksll $r0,$r1,$r2
-+ kslli $r0,$r1, 5
-+ kslraw.u $r0,$r1,$r2
-+ pkbb16 $r0,$r1,$r2
-+ pkbt16 $r0,$r1,$r2
-+ pktb16 $r0,$r1,$r2
-+ pktt16 $r0,$r1,$r2
-+ smmul $r0,$r1,$r2
-+ smmul.u $r0,$r1,$r2
-+ kmmac $r0,$r1,$r2
-+ kmmac.u $r0,$r1,$r2
-+ kmmsb $r0,$r1,$r2
-+ kmmsb.u $r0,$r1,$r2
-+ kwmmul $r0,$r1,$r2
-+ kwmmul.u $r0,$r1,$r2
-+ smmwb $r0,$r1,$r2
-+ smmwb.u $r0,$r1,$r2
-+ smmwt $r0,$r1,$r2
-+ smmwt.u $r0,$r1,$r2
-+ kmmawb $r0,$r1,$r2
-+ kmmawb.u $r0,$r1,$r2
-+ kmmawt $r0,$r1,$r2
-+ kmmawt.u $r0,$r1,$r2
-+ smbb $r0,$r1,$r2
-+ smbt $r0,$r1,$r2
-+ smtt $r0,$r1,$r2
-+ kmda $r0,$r1,$r2
-+ kmxda $r0,$r1,$r2
-+ smds $r0,$r1,$r2
-+ smdrs $r0,$r1,$r2
-+ smxds $r0,$r1,$r2
-+ kmabb $r0,$r1,$r2
-+ kmabt $r0,$r1,$r2
-+ kmatt $r0,$r1,$r2
-+ kmada $r0,$r1,$r2
-+ kmaxda $r0,$r1,$r2
-+ kmads $r0,$r1,$r2
-+ kmadrs $r0,$r1,$r2
-+ kmaxds $r0,$r1,$r2
-+ kmsda $r0,$r1,$r2
-+ kmsxda $r0,$r1,$r2
-+ smal $r0,$r1,$r2
-+ sclip32 $r0,$r1, 5
-+ uclip32 $r0,$r1, 5
-+ bitrev $r0,$r1,$r2
-+ bitrevi $r0,$r1, 5
-+ wext $r0,$r1,$r2
-+ wexti $r0,$r2, 5
-+ bpick $r0,$r1,$r2,$r3
-+ insb $r0,$r1, 2
-+ add64 $r0,$r1,$r2
-+ radd64 $r0,$r1,$r2
-+ uradd64 $r0,$r1,$r2
-+ kadd64 $r0,$r1,$r2
-+ ukadd64 $r0,$r1,$r2
-+ sub64 $r0,$r1,$r2
-+ rsub64 $r0,$r1,$r2
-+ ursub64 $r0,$r1,$r2
-+ ksub64 $r0,$r1,$r2
-+ uksub64 $r0,$r1,$r2
-+ smar64 $r0,$r1,$r2
-+ smsr64 $r0,$r1,$r2
-+ umar64 $r0,$r1,$r2
-+ umsr64 $r0,$r1,$r2
-+ kmar64 $r0,$r1,$r2
-+ kmsr64 $r0,$r1,$r2
-+ ukmar64 $r0,$r1,$r2
-+ ukmsr64 $r0,$r1,$r2
-+ smalbb $r0,$r1,$r2
-+ smalbt $r0,$r1,$r2
-+ smaltt $r0,$r1,$r2
-+ smalda $r0,$r1,$r2
-+ smalxda $r0,$r1,$r2
-+ smalds $r0,$r1,$r2
-+ smaldrs $r0,$r1,$r2
-+ smalxds $r0,$r1,$r2
-+ smslda $r0,$r1,$r2
-+ smslxda $r0,$r1,$r2
-+ kaddw $r0,$r1,$r2
-+ ksubw $r0,$r1,$r2
-+ kslraw $r0,$r1,$r2
-+ kaddh $r0,$r1,$r2
-+ ksubh $r0,$r1,$r2
-+ rdov $r0
-+ clrov
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/ill_1_keyword.s binutils-2.24/gas/testsuite/gas/nds32/ill_1_keyword.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/ill_1_keyword.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/ill_1_keyword.s 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,4 @@
-+foo:
-+! illegal keyword
-+ addi $r0, $r32, 2
-+
-\ No newline at end of file
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/ill_2_register_out_of_bound.s binutils-2.24/gas/testsuite/gas/nds32/ill_2_register_out_of_bound.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/ill_2_register_out_of_bound.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/ill_2_register_out_of_bound.s 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,3 @@
-+foo:
-+! register is out of bound
-+ addi333 r0, r5, 1
-\ No newline at end of file
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/ill_3_enable4.s binutils-2.24/gas/testsuite/gas/nds32/ill_3_enable4.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/ill_3_enable4.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/ill_3_enable4.s 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,6 @@
-+foo:
-+ lmw.bim $r0,[$r4],$r3,#16
-+
-+
-+
-+
-\ No newline at end of file
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/ill_5.s binutils-2.24/gas/testsuite/gas/nds32/ill_5.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/ill_5.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/ill_5.s 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,7 @@
-+foo:
-+ push25 $r14, #4
-+
-+
-+
-+
-+
-\ No newline at end of file
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/ill_6.s binutils-2.24/gas/testsuite/gas/nds32/ill_6.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/ill_6.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/ill_6.s 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,7 @@
-+foo:
-+ push25 $r13, #8
-+
-+
-+
-+
-+
-\ No newline at end of file
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/ill_7.s binutils-2.24/gas/testsuite/gas/nds32/ill_7.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/ill_7.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/ill_7.s 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,9 @@
-+foo:
-+ lwi45.fe $r10,#0
-+ lwi45.fe $r10,#-132
-+ lwi45.fe $r10,#-3
-+
-+
-+
-+
-+
-\ No newline at end of file
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/ill_8.s binutils-2.24/gas/testsuite/gas/nds32/ill_8.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/ill_8.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/ill_8.s 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,10 @@
-+foo:
-+ movpi45 $r0,#15
-+ movpi45 $r0,#48
-+
-+
-+
-+
-+
-+
-+
-\ No newline at end of file
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/jal-align.d binutils-2.24/gas/testsuite/gas/nds32/jal-align.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/jal-align.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/jal-align.d 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,10 @@
-+#objdump: -d --prefix-addresses
-+#name: nds32 convert lwi45.fe to lwi
-+#as: -O1
-+
-+# Test lsi instructions
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+0+0000 <[^>]*> lwi \$r0, \[\$r8 \- #4\]
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/jal-align.s binutils-2.24/gas/testsuite/gas/nds32/jal-align.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/jal-align.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/jal-align.s 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,4 @@
-+foo:
-+ lwi333 $r0, [$r2+#4]
-+ .align 2
-+ jal foo
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/ji-jr.d binutils-2.24/gas/testsuite/gas/nds32/ji-jr.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/ji-jr.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/ji-jr.d 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,17 @@
-+#objdump: -dr --prefix-addresses
-+#name: nds32 load-store instructions
-+#as:
-+
-+# Test ls instructions
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+0+0000 <[^>]*> j8 00000000 <foo>
-+ 0: R_NDS32_9_PCREL_RELA .text
-+ 0: R_NDS32_RELAX_ENTRY .text
-+0+0002 <[^>]*> jal 00000002 <foo\+0x2>
-+ 2: R_NDS32_25_PCREL_RELA .text
-+0+0006 <[^>]*> jr \$r0
-+0+000a <[^>]*> jral \$lp, \$r0
-+0+000e <[^>]*> ret \$lp
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/ji-jr.s binutils-2.24/gas/testsuite/gas/nds32/ji-jr.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/ji-jr.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/ji-jr.s 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,6 @@
-+foo:
-+ j foo
-+ jal foo
-+ jr $r0
-+ jral $r0
-+ ret
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/jump_branch.d binutils-2.24/gas/testsuite/gas/nds32/jump_branch.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/jump_branch.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/jump_branch.d 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,24 @@
-+#objdump: -d
-+#name: nds32 jump branch instructions
-+#as:
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*0:.*48 00 00 00.*j.*
-+.*4:.*49 00 00 00.*jal.*
-+.*8:.*4a 00 00 00.*jr.*
-+.*c:.*4a 00 00 20.*ret.*
-+.*10:.*4b e0 00 01.*jral.*
-+.*14:.*4a 00 04 01.*jral.*
-+.*18:.*4c 00 80 00.*beq.*
-+.*1c:.*4c 00 c0 00.*bne.*
-+.*20.*:.*4e 02 00 00.*beqz.*
-+.*24.*:.*4e 03 00 00.*bnez.*
-+.*28.*:.*4e 04 00 00.*bgez.*
-+.*2c.*:.*4e 05 00 00.*bltz.*
-+.*30.*:.*4e 06 00 00.*bgtz.*
-+.*34.*:.*4e 07 00 00.*blez.*
-+.*38.*:.*4e 0c 00 00.*bgezal.*
-+.*3c.*:.*4e 0d 00 00.*bltzal.*
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/jump_branch.s binutils-2.24/gas/testsuite/gas/nds32/jump_branch.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/jump_branch.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/jump_branch.s 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,18 @@
-+foo:
-+ j foo
-+ jal foo
-+ jr $r0
-+ ret $r0
-+ jral $r0
-+ jral $r0, $r1
-+ beq $r0, $r1, foo
-+ bne $r0, $r1, foo
-+ beqz $r0, foo
-+ bnez $r0, foo
-+ bgez $r0, foo
-+ bltz $r0, foo
-+ bgtz $r0, foo
-+ blez $r0, foo
-+ bgezal $r0, foo
-+ bltzal $r0, foo
-+
-\ No newline at end of file
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/load_store.d binutils-2.24/gas/testsuite/gas/nds32/load_store.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/load_store.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/load_store.d 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,54 @@
-+#objdump: -d
-+#name: nds32 load store instructions
-+#as: -mbaseline=v3 -mall-ext
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*.*.*04.*00.*80.*01.*.*.*.*.*lwi.*\$r0,\[\$r1\+#0x4\]
-+.*.*.*4:.*.*.*02.*00.*80.*01.*.*.*.*.*lhi.*\$r0,\[\$r1\+#0x2\]
-+.*.*.*8:.*.*.*22.*00.*ff.*ff.*.*.*.*.*lhsi.*\$r0,\[\$r1\+#-2\]
-+.*.*.*c:.*.*.*00.*00.*80.*01.*.*.*.*.*lbi.*\$r0,\[\$r1\+#0x1\]
-+.*.*10:.*.*.*20.*00.*ff.*ff.*.*.*.*.*lbsi.*\$r0,\[\$r1\+#-1\]
-+.*.*14:.*.*.*14.*00.*80.*01.*.*.*.*.*swi.*\$r0,\[\$r1\+#0x4\]
-+.*.*18:.*.*.*12.*00.*80.*01.*.*.*.*.*shi.*\$r0,\[\$r1\+#0x2\]
-+.*.*1c:.*.*.*10.*00.*80.*01.*.*.*.*.*sbi.*\$r0,\[\$r1\+#0x1\]
-+.*.*20:.*.*.*0c.*00.*80.*01.*.*.*.*.*lwi.bi.*\$r0,\[\$r1\],#0x4
-+.*.*24:.*.*.*0a.*00.*80.*01.*.*.*.*.*lhi.bi.*\$r0,\[\$r1\],#0x2
-+.*.*28:.*.*.*2a.*00.*ff.*ff.*.*.*.*.*lhsi.bi.*\$r0,\[\$r1\],#-2
-+.*.*2c:.*.*.*08.*00.*80.*01.*.*.*.*.*lbi.bi.*\$r0,\[\$r1\],#0x1
-+.*.*30:.*.*.*28.*00.*ff.*ff.*.*.*.*.*lbsi.bi.*\$r0,\[\$r1\],#-1
-+.*.*34:.*.*.*1c.*00.*80.*01.*.*.*.*.*swi.bi.*\$r0,\[\$r1\],#0x4
-+.*.*38:.*.*.*1a.*00.*80.*01.*.*.*.*.*shi.bi.*\$r0,\[\$r1\],#0x2
-+.*.*3c:.*.*.*18.*00.*80.*01.*.*.*.*.*sbi.bi.*\$r0,\[\$r1\],#0x1
-+.*.*40:.*.*.*38.*00.*89.*02.*.*.*.*.*lw.*\$r0,\[\$r1\+\(\$r2<<#0x1\)\]
-+.*.*44:.*.*.*38.*00.*89.*01.*.*.*.*.*lh.*\$r0,\[\$r1\+\(\$r2<<#0x1\)\]
-+.*.*48:.*.*.*38.*00.*89.*11.*.*.*.*.*lhs.*\$r0,\[\$r1\+\(\$r2<<#0x1\)\]
-+.*.*4c:.*.*.*38.*00.*89.*00.*.*.*.*.*lb.*\$r0,\[\$r1\+\(\$r2<<#0x1\)\]
-+.*.*50:.*.*.*38.*00.*89.*10.*.*.*.*.*lbs.*\$r0,\[\$r1\+\(\$r2<<#0x1\)\]
-+.*.*54:.*.*.*38.*00.*89.*0a.*.*.*.*.*sw.*\$r0,\[\$r1\+\(\$r2<<#0x1\)\]
-+.*.*58:.*.*.*38.*00.*89.*09.*.*.*.*.*sh.*\$r0,\[\$r1\+\(\$r2<<#0x1\)\]
-+.*.*5c:.*.*.*38.*00.*89.*08.*.*.*.*.*sb.*\$r0,\[\$r1\+\(\$r2<<#0x1\)\]
-+.*.*60:.*.*.*38.*00.*89.*06.*.*.*.*.*lw.bi.*\$r0,\[\$r1\],\$r2<<#0x1
-+.*.*64:.*.*.*38.*00.*89.*05.*.*.*.*.*lh.bi.*\$r0,\[\$r1\],\$r2<<#0x1
-+.*.*68:.*.*.*38.*00.*89.*15.*.*.*.*.*lhs.bi.*\$r0,\[\$r1\],\$r2<<#0x1
-+.*.*6c:.*.*.*38.*00.*89.*04.*.*.*.*.*lb.bi.*\$r0,\[\$r1\],\$r2<<#0x1
-+.*.*70:.*.*.*38.*00.*89.*14.*.*.*.*.*lbs.bi.*\$r0,\[\$r1\],\$r2<<#0x1
-+.*.*74:.*.*.*38.*00.*89.*0e.*.*.*.*.*sw.bi.*\$r0,\[\$r1\],\$r2<<#0x1
-+.*.*78:.*.*.*38.*00.*89.*0d.*.*.*.*.*sh.bi.*\$r0,\[\$r1\],\$r2<<#0x1
-+.*.*7c:.*.*.*38.*00.*89.*0c.*.*.*.*.*sb.bi.*\$r0,\[\$r1\],\$r2<<#0x1
-+.*.*80:.*.*.*3a.*02.*0c.*84.*.*.*.*.*lmw.bim.*\$r0,\[\$r4\],\$r3,#0x2.*.*.*.*!.*{\$r0~\$r3,.*\$lp}
-+.*.*84:.*.*.*3a.*02.*0c.*94.*.*.*.*.*lmw.aim.*\$r0,\[\$r4\],\$r3,#0x2.*.*.*.*!.*{\$r0~\$r3,.*\$lp}
-+.*.*88:.*.*.*3a.*02.*0c.*8c.*.*.*.*.*lmw.bdm.*\$r0,\[\$r4\],\$r3,#0x2.*.*.*.*!.*{\$r0~\$r3,.*\$lp}
-+.*.*8c:.*.*.*3a.*02.*0c.*9c.*.*.*.*.*lmw.adm.*\$r0,\[\$r4\],\$r3,#0x2.*.*.*.*!.*{\$r0~\$r3,.*\$lp}
-+.*.*90:.*.*.*3a.*02.*0c.*88.*.*.*.*.*lmw.bd.*\$r0,\[\$r4\],\$r3,#0x2.*.*.*.*!.*{\$r0~\$r3,.*\$lp}
-+.*.*94:.*.*.*3a.*02.*0c.*a4.*.*.*.*.*smw.bim.*\$r0,\[\$r4\],\$r3,#0x2.*.*.*.*!.*{\$r0~\$r3,.*\$lp}
-+.*.*98:.*.*.*3a.*02.*0c.*b4.*.*.*.*.*smw.aim.*\$r0,\[\$r4\],\$r3,#0x2.*.*.*.*!.*{\$r0~\$r3,.*\$lp}
-+.*.*9c:.*.*.*3a.*02.*0c.*ac.*.*.*.*.*smw.bdm.*\$r0,\[\$r4\],\$r3,#0x2.*.*.*.*!.*{\$r0~\$r3,.*\$lp}
-+.*.*a0:.*.*.*3a.*02.*0c.*bc.*.*.*.*.*smw.adm.*\$r0,\[\$r4\],\$r3,#0x2.*.*.*.*!.*{\$r0~\$r3,.*\$lp}
-+.*.*a4:.*.*.*3a.*02.*0c.*a8.*.*.*.*.*smw.bd.*\$r0,\[\$r4\],\$r3,#0x2.*.*.*.*!.*{\$r0~\$r3,.*\$lp}
-+.*.*a8:.*.*.*38.*01.*97.*18.*.*.*.*.*llw.*\$r0,\[\$r3\+\(\$r5<<#0x3\)\]
-+.*.*ac:.*.*.*38.*01.*96.*19.*.*.*.*.*scw.*\$r0,\[\$r3\+\(\$r5<<#0x2\)\]
-+.*.*b0:.*.*.*38.*60.*4f.*22.*.*.*.*.*lwup.*\$r6,\[\$r0\+\(\$r19<<#0x3\)\]
-+.*.*b4:.*.*.*38.*fa.*ea.*2a.*.*.*.*.*swup.*\$r15,\[\$r21\+\(\$p0<<#0x2\)\]
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/load_store.s binutils-2.24/gas/testsuite/gas/nds32/load_store.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/load_store.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/load_store.s 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,54 @@
-+foo:
-+! Table 11, load store immediate, baseline
-+ lwi $r0, [$r1 + (1 << 2)]
-+ lhi $r0, [$r1 + (1 << 1)]
-+ lhsi $r0, [$r1 + (-1 << 1)]
-+ lbi $r0, [$r1 + 1]
-+ lbsi $r0, [$r1 + (-1)]
-+ swi $r0, [$r1 + (1 << 2)]
-+ shi $r0, [$r1 + (1 << 1)]
-+ sbi $r0, [$r1 + 1]
-+! Table 12, load store instruction, baseline
-+ lwi.bi $r0, [$r1], (1 << 2)
-+ lhi.bi $r0, [$r1], (1 << 1)
-+ lhsi.bi $r0, [$r1], (-1 << 1)
-+ lbi.bi $r0, [$r1], 1
-+ lbsi.bi $r0, [$r1], -1
-+ swi.bi $r0, [$r1], (1 << 2)
-+ shi.bi $r0, [$r1], (1 << 1)
-+ sbi.bi $r0, [$r1], 1
-+! Table 13, load store instruction, baseline
-+ lw $r0, [$r1 + ($r2 << 1)]
-+ lh $r0, [$r1 + ($r2 << 1)]
-+ lhs $r0, [$r1 + ($r2 << 1)]
-+ lb $r0, [$r1 + ($r2 << 1)]
-+ lbs $r0, [$r1 + ($r2 << 1)]
-+ sw $r0, [$r1 + ($r2 << 1)]
-+ sh $r0, [$r1 + ($r2 << 1)]
-+ sb $r0, [$r1 + ($r2 << 1)]
-+! Table 14, load store instruction, baseline
-+ lw.bi $r0, [$r1], $r2 << 1
-+ lh.bi $r0, [$r1], $r2 << 1
-+ lhs.bi $r0, [$r1], $r2 << 1
-+ lb.bi $r0, [$r1], $r2 << 1
-+ lbs.bi $r0, [$r1], $r2 << 1
-+ sw.bi $r0, [$r1], $r2 << 1
-+ sh.bi $r0, [$r1], $r2 << 1
-+ sb.bi $r0, [$r1], $r2 << 1
-+! Table 15, load store multiple word, baseline
-+ lmw.bim $r0,[$r4],$r3,#0x2
-+ lmw.aim $r0,[$r4],$r3,#0x2
-+ lmw.bdm $r0,[$r4],$r3,#0x2
-+ lmw.adm $r0,[$r4],$r3,#0x2
-+ lmw.bd $r0,[$r4],$r3,#0x2
-+ smw.bim $r0,[$r4],$r3,#0x2
-+ smw.aim $r0,[$r4],$r3,#0x2
-+ smw.bdm $r0,[$r4],$r3,#0x2
-+ smw.adm $r0,[$r4],$r3,#0x2
-+ smw.bd $r0,[$r4],$r3,#0x2
-+! Table 16, load store instruction for atomic update, baseline
-+ llw $r0,[$r3+($r5<<#0x3)]
-+ scw $r0,[$r3+$r5<<#0x2]
-+! Table 17, load store instruction with user-mode priviledge
-+ lwup $r6,[$r0+($r19<<#0x3)]
-+ swup $r15,[$r21+$r26<<#0x2]
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/ls.d binutils-2.24/gas/testsuite/gas/nds32/ls.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/ls.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/ls.d 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,25 @@
-+#objdump: -d --prefix-addresses
-+#name: nds32 load-store instructions
-+#as:
-+
-+# Test ls instructions
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+0+0000 <[^>]*> lw \$r0, \[\$r1 \+ \(\$r2 << 1\)\]
-+0+0004 <[^>]*> lh \$r0, \[\$r1 \+ \(\$r2 << 1\)\]
-+0+0008 <[^>]*> lhs \$r0, \[\$r1 \+ \(\$r2 << 1\)\]
-+0+000c <[^>]*> lb \$r0, \[\$r1 \+ \(\$r2 << 1\)\]
-+0+0010 <[^>]*> lbs \$r0, \[\$r1 \+ \(\$r2 << 1\)\]
-+0+0014 <[^>]*> sw \$r0, \[\$r1 \+ \(\$r2 << 1\)\]
-+0+0018 <[^>]*> sh \$r0, \[\$r1 \+ \(\$r2 << 1\)\]
-+0+001c <[^>]*> sb \$r0, \[\$r1 \+ \(\$r2 << 1\)\]
-+0+0020 <[^>]*> lw.bi \$r0, \[\$r1\], \(\$r2 << 1\)
-+0+0024 <[^>]*> lh.bi \$r0, \[\$r1\], \(\$r2 << 1\)
-+0+0028 <[^>]*> lhs.bi \$r0, \[\$r1\], \(\$r2 << 1\)
-+0+002c <[^>]*> lb.bi \$r0, \[\$r1\], \(\$r2 << 1\)
-+0+0030 <[^>]*> lbs.bi \$r0, \[\$r1\], \(\$r2 << 1\)
-+0+0034 <[^>]*> sw.bi \$r0, \[\$r1\], \(\$r2 << 1\)
-+0+0038 <[^>]*> sh.bi \$r0, \[\$r1\], \(\$r2 << 1\)
-+0+003c <[^>]*> sb.bi \$r0, \[\$r1\], \(\$r2 << 1\)
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/lsi.d binutils-2.24/gas/testsuite/gas/nds32/lsi.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/lsi.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/lsi.d 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,25 @@
-+#objdump: -d --prefix-addresses
-+#name: nds32 load-store immediate instructions
-+#as:
-+
-+# Test lsi instructions
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+0+0000 <[^>]*> lwi \$r0, \[\$r1 \+ #4\]
-+0+0004 <[^>]*> lhi \$r0, \[\$r1 \+ #2\]
-+0+0008 <[^>]*> lhsi \$r0, \[\$r1 \+ #-2\]
-+0+000c <[^>]*> lbi \$r0, \[\$r1 \+ #1\]
-+0+0010 <[^>]*> lbsi \$r0, \[\$r1 \+ #-1\]
-+0+0014 <[^>]*> swi \$r0, \[\$r1 \+ #4\]
-+0+0018 <[^>]*> shi \$r0, \[\$r1 \+ #2\]
-+0+001c <[^>]*> sbi \$r0, \[\$r1 \+ #1\]
-+0+0020 <[^>]*> lwi.bi \$r0, \[\$r1\], #4
-+0+0024 <[^>]*> lhi.bi \$r0, \[\$r1\], #2
-+0+0028 <[^>]*> lhsi.bi \$r0, \[\$r1\], #-2
-+0+002c <[^>]*> lbi.bi \$r0, \[\$r1\], #1
-+0+0030 <[^>]*> lbsi.bi \$r0, \[\$r1\], #-1
-+0+0034 <[^>]*> swi.bi \$r0, \[\$r1\], #4
-+0+0038 <[^>]*> shi.bi \$r0, \[\$r1\], #2
-+0+003c <[^>]*> sbi.bi \$r0, \[\$r1\], #1
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/lsi.s binutils-2.24/gas/testsuite/gas/nds32/lsi.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/lsi.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/lsi.s 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,17 @@
-+foo:
-+ lwi $r0, [$r1 + (1 << 2)]
-+ lhi $r0, [$r1 + (1 << 1)]
-+ lhsi $r0, [$r1 + (-1 << 1)]
-+ lbi $r0, [$r1 + 1]
-+ lbsi $r0, [$r1 + (-1)]
-+ swi $r0, [$r1 + (1 << 2)]
-+ shi $r0, [$r1 + (1 << 1)]
-+ sbi $r0, [$r1 + 1]
-+ lwi.bi $r0, [$r1], (1 << 2)
-+ lhi.bi $r0, [$r1], (1 << 1)
-+ lhsi.bi $r0, [$r1], (-1 << 1)
-+ lbi.bi $r0, [$r1], 1
-+ lbsi.bi $r0, [$r1], -1
-+ swi.bi $r0, [$r1], (1 << 2)
-+ shi.bi $r0, [$r1], (1 << 1)
-+ sbi.bi $r0, [$r1], 1
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/ls.s binutils-2.24/gas/testsuite/gas/nds32/ls.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/ls.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/ls.s 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,17 @@
-+foo:
-+ lw $r0, [$r1 + ($r2 << 1)]
-+ lh $r0, [$r1 + ($r2 << 1)]
-+ lhs $r0, [$r1 + ($r2 << 1)]
-+ lb $r0, [$r1 + ($r2 << 1)]
-+ lbs $r0, [$r1 + ($r2 << 1)]
-+ sw $r0, [$r1 + ($r2 << 1)]
-+ sh $r0, [$r1 + ($r2 << 1)]
-+ sb $r0, [$r1 + ($r2 << 1)]
-+ lw.bi $r0, [$r1], $r2 << 1
-+ lh.bi $r0, [$r1], $r2 << 1
-+ lhs.bi $r0, [$r1], $r2 << 1
-+ lb.bi $r0, [$r1], $r2 << 1
-+ lbs.bi $r0, [$r1], $r2 << 1
-+ sw.bi $r0, [$r1], $r2 << 1
-+ sh.bi $r0, [$r1], $r2 << 1
-+ sb.bi $r0, [$r1], $r2 << 1
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/lwi45.fe.d binutils-2.24/gas/testsuite/gas/nds32/lwi45.fe.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/lwi45.fe.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/lwi45.fe.d 2016-06-30 21:26:12.753897002 +0200
-@@ -0,0 +1,13 @@
-+#objdump: -d --prefix-addresses
-+#name: nds32 convert lwi45.fe to lwi
-+#as: -O1
-+
-+# Test lsi instructions
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+0+0000 <[^>]*> addi \$r8,\$r7,#0x4
-+0+0004 <[^>]*> lwi \$r0,\[\$r8\+\#\-4\]
-+0+0008 <[^>]*> addi333 \$r6,\$r6,#0x4
-+0+000a <[^>]*> nop16
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/lwi45.fe.s binutils-2.24/gas/testsuite/gas/nds32/lwi45.fe.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/lwi45.fe.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/lwi45.fe.s 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,5 @@
-+foo:
-+ addi $r8,$r7,#0x4
-+ lwi45.fe $r0, -4
-+ .align 2
-+ addi $r6,$r6,#0x4
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_1.d binutils-2.24/gas/testsuite/gas/nds32/mapping_test_1.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_1.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/mapping_test_1.d 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,51 @@
-+#objdump: -d
-+#name: nds32 mapping 1
-+#as: -mel
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*40.*00.*00.*09.*.*nop
-+.*.*.*4:.*40.*00.*00.*09.*.*nop
-+.*.*.*8:.*11.*11.*11.*11.*.*.dword.*0x1111111111111111
-+.*.*.*c:.*11.*11.*11.*11.*
-+.*.*10:.*40.*00.*00.*09.*.*nop
-+.*.*14:.*22.*22.*.*.*.*.*.*.*.*.short.*0x2222
-+.*.*16:.*40.*00.*00.*09.*.*nop
-+.*.*1a:.*33.*33.*.*.*.*.*.*.*.*.short.*0x3333
-+.*.*1c:.*40.*00.*00.*09.*.*nop
-+.*.*20:.*44.*44.*44.*44.*.*.word.*0x44444444
-+.*.*24:.*40.*00.*00.*09.*.*nop
-+.*.*28:.*55.*55.*55.*55.*.*.word.*0x55555555
-+.*.*2c:.*40.*00.*00.*09.*.*nop
-+.*.*30:.*66.*66.*66.*66.*.*.qword.*0x66666666666666666666666666666666
-+.*.*34:.*66.*66.*66.*66.*
-+.*.*38:.*66.*66.*66.*66.*
-+.*.*3c:.*66.*66.*66.*66.*
-+.*.*40:.*40.*00.*00.*09.*.*nop
-+.*.*44:.*40.*00.*00.*09.*.*nop
-+.*.*48:.*77.*77.*77.*77.*.*.dword.*0x7777777777777777
-+.*.*4c:.*77.*77.*77.*77.*
-+.*.*50:.*40.*00.*00.*09.*.*nop
-+.*.*54:.*40.*00.*00.*09.*.*nop
-+.*.*58:.*40.*00.*00.*09.*.*nop
-+.*.*5c:.*40.*00.*00.*09.*.*nop
-+.*.*60:.*88.*88.*88.*88.*.*.qword.*0x88888888888888888888888888888888
-+.*.*64:.*88.*88.*88.*88.*
-+.*.*68:.*88.*88.*88.*88.*
-+.*.*6c:.*88.*88.*88.*88.*
-+.*.*70:.*40.*00.*00.*09.*.*nop
-+.*.*74:.*99.*99.*.*.*.*.*.*.*.*.short.*0x9999
-+.*.*76:.*40.*00.*00.*09.*.*nop
-+.*.*7a:.*00.*00.*.*.*.*.*.*.*.*.byte.*0x00
-+.*.*7c:.*40.*00.*00.*09.*.*nop
-+.*.*80:.*11.*11.*11.*11.*.*.word.*0x11111111
-+.*.*84:.*40.*00.*00.*09.*.*nop
-+.*.*88:.*22.*00.*.*.*.*.*.*.*.*.byte.*0x22
-+.*.*8a:.*40.*00.*00.*09.*.*nop
-+.*.*8e:.*40.*00.*00.*09.*.*nop
-+.*.*92:.*40.*00.*00.*09.*.*nop
-+.*.*96:.*92.*00.*.*.*.*.*.*.*.*nop16
-+.*.*98:.*40.*00.*00.*09.*.*nop
-+.*.*9c:.*40.*00.*00.*09.*.*nop
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_1.s binutils-2.24/gas/testsuite/gas/nds32/mapping_test_1.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_1.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/mapping_test_1.s 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,29 @@
-+foo:
-+ nop
-+ nop
-+ .dword 0x1111111111111111
-+ nop
-+ .half 0x2222
-+ nop
-+ .hword 0x3333
-+ nop
-+ .int 0x44444444
-+ nop
-+ .long 0x55555555
-+ nop
-+ .octa 0x66666666666666666666666666666666
-+ nop
-+ .quad 0x7777777777777777
-+ nop
-+ .qword 0x88888888888888888888888888888888
-+ nop
-+ .short 0x9999
-+ nop
-+ .byte 0x00
-+ nop
-+ .word 0x11111111
-+ nop
-+ .byte 0x22
-+ nop
-+ nop
-+ nop
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_2.d binutils-2.24/gas/testsuite/gas/nds32/mapping_test_2.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_2.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/mapping_test_2.d 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,24 @@
-+#objdump: -d
-+#name: nds32 mapping 2
-+#as: -mel
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*40.*00.*00.*09.*.*nop
-+.*.*.*4:.*40.*00.*00.*09.*.*nop
-+.*.*.*8:.*11.*22.*22.*00.*.*.word.*0x00222211
-+.*.*.*c:.*40.*00.*00.*09.*.*nop
-+.*.*10:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*11:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*12:.*92.*00.*.*.*.*.*.*.*.*nop16
-+.*.*14:.*22.*22.*22.*22.*.*.word.*0x22222222
-+.*.*18:.*40.*00.*00.*09.*.*nop
-+.*.*1c:.*11.*00.*22.*22.*.*.word.*0x22220011
-+.*.*20:.*40.*00.*00.*09.*.*nop
-+.*.*24:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*26:.*92.*00.*.*.*.*.*.*.*.*nop16
-+.*.*28:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*2a:.*40.*00.*00.*09.*.*nop
-+.*.*2e:.*92.*00.*.*.*.*.*.*.*.*nop16
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_2.s binutils-2.24/gas/testsuite/gas/nds32/mapping_test_2.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_2.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/mapping_test_2.s 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,18 @@
-+foo:
-+ nop !0
-+ nop !4
-+ .byte 0x11 !8
-+ .2byte 0x2222 !9 a
-+ nop !b c d e
-+ .byte 0x11 !f
-+ .byte 0x11 !10 11 12 13 + 00 + nop16
-+ .word 0x22222222 !14 15 16 17
-+ nop !18 19 1a 1b
-+ .byte 0x11 !1c
-+ .align 1
-+ .2byte 0x2222 !1e 1f
-+ nop !20 21 22 23
-+ .byte 0x11 !24
-+ .align 0x2
-+ .byte 0x11 !28
-+ nop
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_3.d binutils-2.24/gas/testsuite/gas/nds32/mapping_test_3.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_3.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/mapping_test_3.d 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,25 @@
-+#objdump: -d
-+#name: nds32 mapping 3
-+#as: -mel
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*40.*00.*00.*09.*.*nop
-+.*.*.*4:.*40.*00.*00.*09.*.*nop
-+.*.*.*8:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*.*a:.*92.*00.*.*.*.*.*.*.*.*nop16
-+.*.*.*c:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*.*e:.*40.*00.*00.*09.*.*nop
-+.*.*12:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*13:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*14:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*16:.*40.*00.*00.*09.*.*nop
-+.*.*1a:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*1b:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*1c:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*1e:.*92.*00.*.*.*.*.*.*.*.*nop16
-+.*.*20:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*22:.*40.*00.*00.*09.*.*nop
-+.*.*26:.*92.*00.*.*.*.*.*.*.*.*nop16
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_3.s binutils-2.24/gas/testsuite/gas/nds32/mapping_test_3.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_3.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/mapping_test_3.s 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,21 @@
-+foo:
-+ nop
-+ nop
-+ .byte 0x11
-+ .align 0x2
-+ .byte 0x11
-+ nop
-+ .byte 0x11
-+ .byte 0x11
-+ .align 0x2
-+ .byte 0x11
-+ nop
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .align 0x2
-+ .byte 0x11
-+ nop
-+
-+
-+
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_4.d binutils-2.24/gas/testsuite/gas/nds32/mapping_test_4.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_4.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/mapping_test_4.d 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,24 @@
-+#objdump: -d
-+#name: nds32 mapping 4
-+#as: -mel
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*40.*00.*00.*09.*.*nop
-+.*.*.*4:.*40.*00.*00.*09.*.*nop
-+.*.*.*8:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*.*a:.*92.*00.*.*.*.*.*.*.*.*nop16
-+.*.*.*c:.*22.*22.*22.*22.*.*.word.*0x22222222
-+.*.*10:.*40.*00.*00.*09.*.*nop
-+.*.*14:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*15:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*16:.*92.*00.*.*.*.*.*.*.*.*nop16
-+.*.*18:.*22.*22.*22.*22.*.*.word.*0x22222222
-+.*.*1c:.*40.*00.*00.*09.*.*nop
-+.*.*20:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*21:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*22:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*24:.*22.*22.*22.*22.*.*.word.*0x22222222
-+.*.*28:.*40.*00.*00.*09.*.*nop
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_4.s binutils-2.24/gas/testsuite/gas/nds32/mapping_test_4.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_4.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/mapping_test_4.s 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,18 @@
-+foo:
-+ nop
-+ nop
-+ .byte 0x11
-+ .word 0x22222222
-+ nop
-+ .byte 0x11
-+ .byte 0x11
-+ .word 0x22222222
-+ nop
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .word 0x22222222
-+ nop
-+
-+
-+
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_5.d binutils-2.24/gas/testsuite/gas/nds32/mapping_test_5.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_5.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/mapping_test_5.d 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,68 @@
-+#objdump: -d
-+#name: nds32 mapping 5
-+#as: -mel
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*40.*00.*00.*09.*.*nop
-+.*.*.*4:.*40.*00.*00.*09.*.*nop
-+.*.*.*8:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*.*a:.*92.*00.*.*.*.*.*.*.*.*nop16
-+.*.*.*c:.*40.*00.*00.*09.*.*nop
-+.*.*10:.*22.*22.*22.*22.*.*.dword.*0x2222222222222222
-+.*.*14:.*22.*22.*22.*22.*
-+.*.*18:.*40.*00.*00.*09.*.*nop
-+.*.*1c:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*1d:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*1e:.*92.*00.*.*.*.*.*.*.*.*nop16
-+.*.*20:.*22.*22.*22.*22.*.*.dword.*0x2222222222222222
-+.*.*24:.*22.*22.*22.*22.*
-+.*.*28:.*40.*00.*00.*09.*.*nop
-+.*.*2c:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*2d:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*2e:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*30:.*22.*22.*22.*22.*.*.dword.*0x2222222222222222
-+.*.*34:.*22.*22.*22.*22.*
-+.*.*38:.*40.*00.*00.*09.*.*nop
-+.*.*3c:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*3d:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*3e:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*3f:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*40:.*22.*22.*22.*22.*.*.dword.*0x2222222222222222
-+.*.*44:.*22.*22.*22.*22.*
-+.*.*48:.*40.*00.*00.*09.*.*nop
-+.*.*4c:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*4d:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*4e:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*4f:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*50:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*52:.*92.*00.*.*.*.*.*.*.*.*nop16
-+.*.*54:.*40.*00.*00.*09.*.*nop
-+.*.*58:.*22.*22.*22.*22.*.*.dword.*0x2222222222222222
-+.*.*5c:.*22.*22.*22.*22.*
-+.*.*60:.*40.*00.*00.*09.*.*nop
-+.*.*64:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*65:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*66:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*67:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*68:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*69:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*6a:.*92.*00.*.*.*.*.*.*.*.*nop16
-+.*.*6c:.*40.*00.*00.*09.*.*nop
-+.*.*70:.*22.*22.*22.*22.*.*.dword.*0x2222222222222222
-+.*.*74:.*22.*22.*22.*22.*
-+.*.*78:.*40.*00.*00.*09.*.*nop
-+.*.*7c:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*7d:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*7e:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*7f:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*80:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*81:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*82:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*84:.*40.*00.*00.*09.*.*nop
-+.*.*88:.*22.*22.*22.*22.*.*.dword.*0x2222222222222222
-+.*.*8c:.*22.*22.*22.*22.*
-+.*.*90:.*40.*00.*00.*09.*.*nop
-+.*.*94:.*40.*00.*00.*09.*.*nop
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_5.s binutils-2.24/gas/testsuite/gas/nds32/mapping_test_5.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_5.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/mapping_test_5.s 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,47 @@
-+foo:
-+ nop
-+ nop
-+ .byte 0x11
-+ .dword 0x2222222222222222
-+ nop
-+ .byte 0x11
-+ .byte 0x11
-+ .dword 0x2222222222222222
-+ nop
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .dword 0x2222222222222222
-+ nop
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .dword 0x2222222222222222
-+ nop
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .dword 0x2222222222222222
-+ nop
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .dword 0x2222222222222222
-+ nop
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .dword 0x2222222222222222
-+ nop
-+
-+
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_6.d binutils-2.24/gas/testsuite/gas/nds32/mapping_test_6.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_6.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/mapping_test_6.d 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,64 @@
-+#objdump: -d
-+#name: mapping symbol 6
-+#as: -mel
-+
-+# Test ls instructions
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*40.*00.*00.*09.*.*nop
-+.*.*.*4:.*40.*00.*00.*09.*.*nop
-+.*.*.*8:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*.*a:.*92.*00.*.*.*.*.*.*.*.*nop16
-+.*.*.*c:.*40.*00.*00.*09.*.*nop
-+.*.*10:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*12:.*40.*00.*00.*09.*.*nop
-+.*.*16:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*17:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*18:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*1a:.*40.*00.*00.*09.*.*nop
-+.*.*1e:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*1f:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*20:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*22:.*92.*00.*.*.*.*.*.*.*.*nop16
-+.*.*24:.*40.*00.*00.*09.*.*nop
-+.*.*28:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*2a:.*40.*00.*00.*09.*.*nop
-+.*.*2e:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*2f:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*30:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*31:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*32:.*92.*00.*.*.*.*.*.*.*.*nop16
-+.*.*34:.*40.*00.*00.*09.*.*nop
-+.*.*38:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*3a:.*40.*00.*00.*09.*.*nop
-+.*.*3e:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*3f:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*40:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*41:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*42:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*44:.*40.*00.*00.*09.*.*nop
-+.*.*48:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*4a:.*40.*00.*00.*09.*.*nop
-+.*.*4e:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*4f:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*50:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*51:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*52:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*53:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*54:.*40.*00.*00.*09.*.*nop
-+.*.*58:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*5a:.*40.*00.*00.*09.*.*nop
-+.*.*5e:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*5f:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*60:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*61:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*62:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*63:.*11.*.*.*.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*64:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*66:.*92.*00.*.*.*.*.*.*.*.*nop16
-+.*.*68:.*11.*00.*.*.*.*.*.*.*.*.byte.*0x11
-+.*.*6a:.*40.*00.*00.*09.*.*nop
-+.*.*6e:.*92.*00.*.*.*.*.*.*.*.*nop16
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_6.s binutils-2.24/gas/testsuite/gas/nds32/mapping_test_6.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_6.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/mapping_test_6.s 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,53 @@
-+foo:
-+ nop
-+ nop
-+ .byte 0x11
-+ .align 0x3
-+ .byte 0x11
-+ nop
-+ .byte 0x11
-+ .byte 0x11
-+ .align 0x3
-+ .byte 0x11
-+ nop
-+ .byte 0x11
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-+ .align 0x3
-+ .byte 0x11
-+ nop
-+ .byte 0x11
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-+ .align 0x3
-+ .byte 0x11
-+ nop
-+ .byte 0x11
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-+ .byte 0x11
-+ .byte 0x11
-+ .align 0x3
-+ .byte 0x11
-+ nop
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .align 0x3
-+ .byte 0x11
-+ nop
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .byte 0x11
-+ .align 0x3
-+ .byte 0x11
-+ nop
-+
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_7.d binutils-2.24/gas/testsuite/gas/nds32/mapping_test_7.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_7.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/mapping_test_7.d 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,13 @@
-+#objdump: -d
-+#name: nds32 mapping 7
-+#as: -mel
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*40.*00.*00.*09.*.*nop
-+.*.*.*4:.*00.*00.*03.*00.*.*.word.*0x00030000
-+.*.*.*8:.*20.*00.*.*.*.*.*.*.*.*.short.*0x0020
-+.*.*.*a:.*01.*00.*.*.*.*.*.*.*.*.byte.*0x01
-+.*.*.*c:.*40.*00.*00.*09.*.*nop
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_7.s binutils-2.24/gas/testsuite/gas/nds32/mapping_test_7.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/mapping_test_7.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/mapping_test_7.s 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,7 @@
-+foo:
-+ nop
-+ .word 0x30000
-+ .short 0x20
-+ .byte 0x1
-+ nop
-+
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/misc.d binutils-2.24/gas/testsuite/gas/nds32/misc.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/misc.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/misc.d 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,30 @@
-+#objdump: -d
-+#name: nds32 misc instructions
-+#as: -mbaseline=v3 -mall-ext
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*.*.*41.*dc.*c4.*1a.*.*.*.*.*cmovz.*\$gp,\$r25,\$r17
-+.*.*.*4:.*.*.*41.*2d.*34.*1b.*.*.*.*.*cmovn.*\$r18,\$p0,\$r13
-+.*.*.*8:.*.*.*64.*00.*00.*0c.*.*.*.*.*msync.*all
-+.*.*.*c:.*.*.*64.*c0.*00.*0d.*.*.*.*.*isync.*\$r12
-+.*.*10:.*.*.*26.*2a.*8b.*aa.*.*.*.*.*dprefi.w.*swr,\[\$r21\+#0x2ea8\]
-+.*.*14:.*.*.*40.*00.*00.*09.*.*.*.*.*nop
-+.*.*18:.*.*.*64.*00.*00.*08.*.*.*.*.*dsb
-+.*.*1c:.*.*.*64.*00.*00.*09.*.*.*.*.*isb
-+.*.*20:.*.*.*64.*00.*00.*0a.*.*.*.*.*break.*#0x0
-+.*.*24:.*.*.*64.*00.*48.*2b.*.*.*.*.*syscall.*#0x241
-+.*.*28:.*.*.*64.*00.*00.*05.*.*.*.*.*trap.*#0x0
-+.*.*2c:.*.*.*64.*72.*1c.*a6.*.*.*.*.*teqz.*\$r7,#0x10e5
-+.*.*30:.*.*.*65.*5c.*8f.*c7.*.*.*.*.*tnez.*\$r21,#0x647e
-+.*.*34:.*.*.*64.*00.*00.*04.*.*.*.*.*iret
-+.*.*38:.*.*.*4a.*00.*05.*20.*.*.*.*.*ret.itoff.*\$r1
-+.*.*3c:.*.*.*4a.*00.*07.*20.*.*.*.*.*ret.toff.*\$r1
-+.*.*40:.*.*.*64.*04.*00.*01.*.*.*.*.*cctl.*\$r8,l1d_ix_inval
-+.*.*44:.*.*.*64.*12.*00.*23.*.*.*.*.*setend.b
-+.*.*48:.*.*.*64.*02.*00.*23.*.*.*.*.*setend.l
-+.*.*4c:.*.*.*64.*12.*00.*43.*.*.*.*.*setgie.e
-+.*.*50:.*.*.*64.*02.*00.*43.*.*.*.*.*setgie.d
-+.*.*54:.*.*.*64.*00.*00.*00.*.*.*.*.*standby.*no_wake_grant
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/misc.s binutils-2.24/gas/testsuite/gas/nds32/misc.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/misc.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/misc.s 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,33 @@
-+foo:
-+! Table 24. Conditional Move (Baseline)
-+ cmovz $gp,$r25,$r17
-+ cmovn $r18,$r26,$r13
-+! Table 25. Synchronization Instruction (Baseline)
-+ msync
-+ isync $r12
-+! Table 26. Prefetch Instruction (Baseline)
-+ dprefi.w swr,[$r21+#0x2ea8]
-+! Table 27. NOP Instruction (Baseline)
-+ nop
-+! Table 28. Serialization Instruction (Baseline)
-+ dsb
-+ isb
-+! Table 29. Exception Generation Instruction (Baseline)
-+ break
-+ syscall #0x241
-+ trap
-+ teqz $r7,#0x10e5
-+ tnez $r21,#0x647e
-+! Table 30. Special Return Instruction (Baseline)
-+ iret
-+ ret.itoff $r1
-+ ret.toff $r1
-+! Table 31. Cache Control Instruction (Baseline)
-+ cctl $r8,l1d_ix_inval
-+! Table 32. Miscellaneous Instructions (Baseline)
-+ setend.b
-+ setend.l
-+ setgie.e
-+ setgie.d
-+ standby no_wake_grant
-+
-\ No newline at end of file
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/missing_operand.d binutils-2.24/gas/testsuite/gas/nds32/missing_operand.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/missing_operand.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/missing_operand.d 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,41 @@
-+#objdump: -d
-+#name: nds32 missing operand instructions
-+#as: -mbaseline=v3 -mall-ext
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*04.*11.*00.*00.*.*lwi.*\$r1,\[\$r2\+#0x0\]
-+.*.*.*4:.*20.*11.*00.*00.*.*lbsi.*\$r1,\[\$r2\+#0x0\]
-+.*.*.*8:.*14.*11.*00.*00.*.*swi.*\$r1,\[\$r2\+#0x0\]
-+.*.*.*c:.*38.*11.*0c.*02.*.*lw.*\$r1,\[\$r2\+\(\$r3<<#0x0\)\]
-+.*.*10:.*38.*11.*0c.*10.*.*lbs.*\$r1,\[\$r2\+\(\$r3<<#0x0\)\]
-+.*.*14:.*38.*11.*0c.*0a.*.*sw.*\$r1,\[\$r2\+\(\$r3<<#0x0\)\]
-+.*.*18:.*04.*11.*00.*00.*.*lwi.*\$r1,\[\$r2\+#0x0\]
-+.*.*1c:.*20.*11.*00.*00.*.*lbsi.*\$r1,\[\$r2\+#0x0\]
-+.*.*20:.*14.*11.*00.*00.*.*swi.*\$r1,\[\$r2\+#0x0\]
-+.*.*24:.*38.*11.*0c.*06.*.*lw.bi.*\$r1,\[\$r2\],\$r3<<#0x0
-+.*.*28:.*38.*11.*0c.*14.*.*lbs.bi.*\$r1,\[\$r2\],\$r3<<#0x0
-+.*.*2c:.*3a.*11.*0c.*1c.*.*lmw.adm.*\$r1,\[\$r2\],\$r3,#0x0.*.*.*.*!.*\{\$r1~\$r3\}
-+.*.*30:.*3a.*11.*0c.*3c.*.*smw.adm.*\$r1,\[\$r2\],\$r3,#0x0.*.*.*.*!.*\{\$r1~\$r3\}
-+.*.*34:.*38.*11.*0c.*22.*.*lwup.*\$r1,\[\$r2\+\(\$r3<<#0x0\)\]
-+.*.*38:.*38.*11.*0c.*2a.*.*swup.*\$r1,\[\$r2\+\(\$r3<<#0x0\)\]
-+.*.*3c:.*a0.*50.*.*.*.*.*.*.*.*lwi333.*\$r1,\[\$r2\+#0x0\]
-+.*.*3e:.*a8.*50.*.*.*.*.*.*.*.*swi333.*\$r1,\[\$r2\+#0x0\]
-+.*.*40:.*b9.*00.*.*.*.*.*.*.*.*lwi37.*\$r1,\[\$fp\+#0x0\]
-+.*.*42:.*b9.*80.*.*.*.*.*.*.*.*swi37.*\$r1,\[\$fp\+#0x0\]
-+.*.*44:.*4b.*e0.*04.*01.*.*jral.*\$lp,\$r1
-+.*.*48:.*4a.*00.*78.*20.*.*ret.*\$lp
-+.*.*4c:.*dd.*9e.*.*.*.*.*.*.*.*ret5.*\$lp
-+.*.*4e:.*38.*11.*0c.*18.*.*llw.*\$r1,\[\$r2\+\(\$r3<<#0x0\)\]
-+.*.*52:.*38.*11.*0c.*19.*.*scw.*\$r1,\[\$r2\+\(\$r3<<#0x0\)\]
-+.*.*56:.*27.*00.*80.*00.*.*dprefi.d.*srd,\[\$r1\+#0x0\]
-+.*.*5a:.*26.*00.*80.*00.*.*dprefi.w.*srd,\[\$r1\+#0x0\]
-+.*.*5e:.*38.*00.*88.*13.*.*dpref.*srd,\[\$r1\+\(\$r2<<#0x0\)\]
-+.*.*62:.*26.*00.*80.*00.*.*dprefi.w.*srd,\[\$r1\+#0x0\]
-+.*.*66:.*64.*00.*00.*0c.*.*msync.*all
-+.*.*6a:.*64.*00.*00.*05.*.*trap.*#0x0
-+.*.*6e:.*64.*10.*00.*06.*.*teqz.*\$r1,#0x0
-+.*.*72:.*64.*10.*00.*07.*.*tnez.*\$r1,#0x0
-+.*.*76:.*64.*00.*00.*0a.*.*break.*#0x0
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/missing_operand.s binutils-2.24/gas/testsuite/gas/nds32/missing_operand.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/missing_operand.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/missing_operand.s 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,36 @@
-+foo:
-+! APG 3.3.1
-+ lwi $r1, [$r2]
-+ lbsi $r1, [$r2]
-+ swi $r1, [$r2]
-+ lw $r1, [$r2 + $r3]
-+ lbs $r1, [$r2 + $r3]
-+ sw $r1, [$r2 + $r3]
-+ lw $r1, [$r2]
-+ lbs $r1, [$r2]
-+ sw $r1, [$r2]
-+ lw.p $r1, [$r2], $r3
-+ lbs.p $r1, [$r2], $r3
-+ lmw.adm $r1, [$r2], $r3
-+ smw.adm $r1, [$r2], $r3
-+ lwup $r1, [$r2 + $r3]
-+ swup $r1, [$r2 + $r3]
-+ lwi333 $r1, [$r2]
-+ swi333 $r1, [$r2]
-+ lwi37 $r1, [$fp]
-+ swi37 $r1, [$fp]
-+ jral $r1
-+ ret
-+ ret5
-+ llw $r1, [$r2 + $r3]
-+ scw $r1, [$r2 + $r3]
-+ dprefi.d srd, [$r1]
-+ dprefi.w srd, [$r1]
-+ dpref srd, [$r1+$r2]
-+ dpref srd, [$r1]
-+ msync
-+ trap
-+ teqz $r1
-+ tnez $r1
-+ break
-+
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/nds32.exp binutils-2.24/gas/testsuite/gas/nds32/nds32.exp
---- binutils-2.24.orig/gas/testsuite/gas/nds32/nds32.exp 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/nds32.exp 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,66 @@
-+# Copyright (C) 2012-2013 Free Software Foundation, Inc.
-+# Contributed by Andes Technology Corporation.
-+
-+# This program is free software; you can redistribute it and/or modify
-+# it under the terms of the GNU General Public License as published by
-+# the Free Software Foundation; either version 3 of the License, or
-+# (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program; if not, write to the Free Software
-+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-+# MA 02110-1301, USA.
-+
-+
-+
-+if { [istarget nds32*] } {
-+
-+
-+ # the following test cases are written in order of the ISA spec.
-+ run_dump_test "alu"
-+ run_dump_test "load_store"
-+ run_dump_test "jump_branch"
-+ run_dump_test "PRAI"
-+ run_dump_test "misc"
-+ run_dump_test "16v1"
-+ run_dump_test "16v2"
-+ run_dump_test "32v2"
-+ run_dump_test "16v3"
-+ run_dump_test "32v3"
-+ run_dump_test "32bit_extension"
-+ run_dump_test "pseudo_instruction"
-+ run_dump_test "register_alias"
-+ run_dump_test "missing_operand"
-+ run_dump_test "dsp"
-+ # the following test cases ared added to augment code coverage.
-+ run_dump_test "cc_reduce_reg"
-+ run_dump_test "cc_pseudo_instruction_Os"
-+ run_dump_test "cc_pseudo_instruction_Os_verbatim"
-+ run_dump_test "cc_pseudo_instruction_O1_verbatim"
-+ run_dump_test "cc_16bit_pseudo_instruction"
-+
-+ # Test convert short to long instruction
-+ run_dump_test "lwi45.fe"
-+ # test cases for nds32 mapping symbols
-+ run_dump_test "mapping_test_1"
-+ run_dump_test "mapping_test_2"
-+ run_dump_test "mapping_test_3"
-+ run_dump_test "mapping_test_4"
-+ run_dump_test "mapping_test_5"
-+ run_dump_test "mapping_test_6"
-+ run_dump_test "mapping_test_7"
-+
-+ # illegal test cases
-+ gas_test_error "ill_1_keyword.s" "" "illegal keyword test, case 1"
-+ gas_test_error "ill_2_register_out_of_bound.s" "" "illegal register out of bound test, case 2"
-+ gas_test_error "ill_3_enable4.s" "" "illegal enable4 test, case 3"
-+ gas_test_error "ill_5.s" "" "illegal test, case 5"
-+ gas_test_error "ill_6.s" "" "illegal test, case 6"
-+ gas_test_error "ill_7.s" "" "illegal test, case 7"
-+ gas_test_error "ill_8.s" "" "illegal test, case 8"
-+}
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/PRAI.d binutils-2.24/gas/testsuite/gas/nds32/PRAI.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/PRAI.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/PRAI.d 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,17 @@
-+#objdump: -d
-+#name: nds32 jump branch instructions
-+#as: -mbaseline=v3 -mall-ext
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*.*.*65.*20.*04.*02.*.*.*.*.*mfsr.*\$r18,\$core_id
-+.*.*.*4:.*.*.*65.*c6.*50.*03.*.*.*.*.*mtsr.*\$fp,\$bpam4
-+.*.*.*8:.*.*.*4a.*00.*05.*00.*.*.*.*.*jr.itoff.*\$r1
-+.*.*.*c:.*.*.*4a.*00.*07.*00.*.*.*.*.*jr.toff.*\$r1
-+.*.*10:.*.*.*4b.*e0.*05.*01.*.*.*.*.*jral.iton.*\$lp,\$r1
-+.*.*14:.*.*.*4a.*10.*09.*01.*.*.*.*.*jral.iton.*\$r1,\$r2
-+.*.*18:.*.*.*4b.*e0.*07.*01.*.*.*.*.*jral.ton.*\$lp,\$r1
-+.*.*1c:.*.*.*4a.*10.*0b.*01.*.*.*.*.*jral.ton.*\$r1,\$r2
-+.*.*20:.*.*.*64.*03.*00.*6e.*.*.*.*.*tlbop.*\$r6,rwritelock
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/PRAI.s binutils-2.24/gas/testsuite/gas/nds32/PRAI.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/PRAI.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/PRAI.s 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,14 @@
-+foo:
-+! Table 21, Read/Write System Registers, baseline
-+ mfsr $r18, $core_id
-+ mtsr $fp, $bpam4
-+! Table 22, Jump Register with System Register Update (Baseline)
-+ jr.itoff $r1
-+ jr.toff $r1
-+ jral.iton $r1
-+ jral.iton $r1, $r2
-+ jral.ton $r1
-+ jral.ton $r1, $r2
-+! Table 23. MMU Instruction (Baseline)
-+ tlbop $r6, rwlk
-+
-\ No newline at end of file
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/pseudo_instruction.d binutils-2.24/gas/testsuite/gas/nds32/pseudo_instruction.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/pseudo_instruction.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/pseudo_instruction.d 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,141 @@
-+#objdump: -d
-+#name: nds32 pseudo instructions
-+#as:
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*84.*21.*.*.*.*.*.*.*.*movi55.*\$r1,#0x1
-+.*.*.*2:.*44.*10.*00.*ff.*.*movi.*\$r1,#0xff
-+.*.*.*6:.*46.*10.*00.*80.*.*sethi.*\$r1,#0x80
-+.*.*.*a:.*46.*10.*00.*80.*.*sethi.*\$r1,#0x80
-+.*.*.*e:.*58.*10.*80.*01.*.*ori.*\$r1,\$r1,#0x1
-+.*.*12:.*46.*10.*00.*00.*.*sethi.*\$r1,#0x0
-+.*.*16:.*58.*10.*80.*00.*.*ori.*\$r1,\$r1,#0x0
-+.*.*1a:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*1e:.*00.*17.*80.*00.*.*lbi.*\$r1,\[\$r15\+#0x0\]
-+.*.*22:.*00.*11.*00.*00.*.*lbi.*\$r1,\[\$r2\+#0x0\]
-+.*.*26:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*2a:.*02.*17.*80.*00.*.*lhi.*\$r1,\[\$r15\+#0x0\]
-+.*.*2e:.*02.*11.*00.*00.*.*lhi.*\$r1,\[\$r2\+#0x0\]
-+.*.*32:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*36:.*04.*17.*80.*00.*.*lwi.*\$r1,\[\$r15\+#0x0\]
-+.*.*3a:.*04.*11.*00.*00.*.*lwi.*\$r1,\[\$r2\+#0x0\]
-+.*.*3e:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*42:.*20.*17.*80.*00.*.*lbsi.*\$r1,\[\$r15\+#0x0\]
-+.*.*46:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*4a:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*.*4e:.*08.*17.*80.*01.*.*lbi.bi.*\$r1,\[\$r15\],#0x1
-+.*.*52:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*56:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*.*5a:.*0a.*17.*80.*01.*.*lhi.bi.*\$r1,\[\$r15\],#0x2
-+.*.*5e:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*62:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*.*66:.*0c.*17.*80.*01.*.*lwi.bi.*\$r1,\[\$r15\],#0x4
-+.*.*6a:.*08.*17.*80.*01.*.*lbi.bi.*\$r1,\[\$r15\],#0x1
-+.*.*6e:.*0a.*17.*80.*01.*.*lhi.bi.*\$r1,\[\$r15\],#0x2
-+.*.*72:.*0c.*17.*80.*01.*.*lwi.bi.*\$r1,\[\$r15\],#0x4
-+.*.*76:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*7a:.*10.*17.*80.*00.*.*sbi.*\$r1,\[\$r15\+#0x0\]
-+.*.*7e:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*82:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*.*86:.*18.*17.*80.*01.*.*sbi.bi.*\$r1,\[\$r15\],#0x1
-+.*.*8a:.*40.*11.*08.*05.*.*nor.*\$r1,\$r2,\$r2
-+.*.*8e:.*52.*11.*00.*00.*.*subri.*\$r1,\$r2,#0x0
-+.*.*92:.*4a.*00.*04.*00.*.*jr.*\$r1
-+.*.*96:.*d5.*00.*.*.*.*.*.*.*.*j8.*96.*<foo\+0x96>
-+.*.*98:.*4c.*11.*00.*00.*.*beq.*\$r1,\$r2,98.*<foo\+0x98>
-+.*.*9c:.*4c.*11.*40.*00.*.*bne.*\$r1,\$r2,9c.*<foo\+0x9c>
-+.*.*a0:.*40.*f0.*88.*06.*.*slt.*\$r15,\$r1,\$r2
-+.*.*a4:.*4e.*f2.*00.*00.*.*beqz.*\$r15,a4.*<foo\+0xa4>
-+.*.*a8:.*40.*f0.*88.*07.*.*slts.*\$r15,\$r1,\$r2
-+.*.*ac:.*4e.*f2.*00.*00.*.*beqz.*\$r15,ac.*<foo\+0xac>
-+.*.*b0:.*40.*f1.*04.*06.*.*slt.*\$r15,\$r2,\$r1
-+.*.*b4:.*4e.*f3.*00.*00.*.*bnez.*\$r15,b4.*<foo\+0xb4>
-+.*.*b8:.*40.*f1.*04.*07.*.*slts.*\$r15,\$r2,\$r1
-+.*.*bc:.*4e.*f3.*00.*00.*.*bnez.*\$r15,bc.*<foo\+0xbc>
-+.*.*c0:.*40.*f0.*88.*06.*.*slt.*\$r15,\$r1,\$r2
-+.*.*c4:.*4e.*f3.*00.*00.*.*bnez.*\$r15,c4.*<foo\+0xc4>
-+.*.*c8:.*40.*f0.*88.*07.*.*slts.*\$r15,\$r1,\$r2
-+.*.*cc:.*4e.*f3.*00.*00.*.*bnez.*\$r15,cc.*<foo\+0xcc>
-+.*.*d0:.*40.*f1.*04.*06.*.*slt.*\$r15,\$r2,\$r1
-+.*.*d4:.*4e.*f2.*00.*00.*.*beqz.*\$r15,d4.*<foo\+0xd4>
-+.*.*d8:.*40.*f1.*04.*07.*.*slts.*\$r15,\$r2,\$r1
-+.*.*dc:.*4e.*f2.*00.*00.*.*beqz.*\$r15,dc.*<foo\+0xdc>
-+.*.*e0:.*4b.*e0.*04.*01.*.*jral.*\$lp,\$r1
-+.*.*e4:.*49.*00.*00.*00.*.*jal.*e4.*<foo\+0xe4>
-+.*.*e8:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*.*ec:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*.*f0:.*4b.*e0.*3c.*01.*.*jral.*\$lp,\$r15
-+.*.*f4:.*4e.*1c.*00.*00.*.*bgezal.*\$r1,f4.*<foo\+0xf4>
-+.*.*f8:.*4e.*1d.*00.*00.*.*bltzal.*\$r1,f8.*<foo\+0xf8>
-+.*.*fc:.*80.*22.*.*.*.*.*.*.*.*mov55.*\$r1,\$r2
-+.*.*fe:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*102:.*04.*17.*80.*00.*.*lwi.*\$r1,\[\$r15\+#0x0\]
-+.*106:.*84.*21.*.*.*.*.*.*.*.*movi55.*\$r1,#0x1
-+.*108:.*3b.*ff.*ff.*3c.*.*smw.adm.*\$sp,\[\$sp\],\$sp,#0xc.*.*.*.*!.*\{\$fp,.*\$gp\}
-+.*10c:.*3a.*1f.*84.*3c.*.*smw.adm.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*110:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*114:.*04.*f7.*80.*00.*.*lwi.*\$r15,\[\$r15\+#0x0\]
-+.*118:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*11c:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*120:.*04.*f7.*80.*00.*.*lwi.*\$r15,\[\$r15\+#0x0\]
-+.*124:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*128:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*12c:.*04.*f7.*80.*00.*.*lwi.*\$r15,\[\$r15\+#0x0\]
-+.*130:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*134:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*138:.*02.*f7.*80.*00.*.*lhi.*\$r15,\[\$r15\+#0x0\]
-+.*13c:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*140:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*144:.*00.*f7.*80.*00.*.*lbi.*\$r15,\[\$r15\+#0x0\]
-+.*148:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*14c:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*150:.*00.*f7.*80.*00.*.*lbi.*\$r15,\[\$r15\+#0x0\]
-+.*154:.*3a.*f0.*bc.*3c.*.*smw.adm.*\$r15,\[\$r1\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*158:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*15c:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*160:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*164:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*168:.*58.*f7.*80.*00.*.*ori.*\$r15,\$r15,#0x0
-+.*16c:.*3a.*f0.*bc.*3c.*.*smw.adm.*\$r15,\[\$r1\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*170:.*85.*e1.*.*.*.*.*.*.*.*movi55.*\$r15,#0x1
-+.*172:.*3a.*ff.*bc.*3c.*.*smw.adm.*\$r15,\[\$sp\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*176:.*85.*e1.*.*.*.*.*.*.*.*movi55.*\$r15,#0x1
-+.*178:.*3a.*f0.*bc.*3c.*.*smw.adm.*\$r15,\[\$r1\],\$r15,#0x0.*.*.*.*!.*\{\$r15\}
-+.*17c:.*3a.*1f.*88.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r2,#0x0.*.*.*.*!.*\{\$r1~\$r2\}
-+.*180:.*3a.*1f.*84.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*184:.*3a.*1f.*84.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*188:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*18c:.*14.*17.*80.*00.*.*swi.*\$r1,\[\$r15\+#0x0\]
-+.*190:.*3a.*1f.*84.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*194:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*198:.*14.*17.*80.*00.*.*swi.*\$r1,\[\$r15\+#0x0\]
-+.*19c:.*3a.*1f.*84.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*1a0:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*1a4:.*14.*17.*80.*00.*.*swi.*\$r1,\[\$r15\+#0x0\]
-+.*1a8:.*3a.*1f.*84.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*1ac:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*1b0:.*12.*17.*80.*00.*.*shi.*\$r1,\[\$r15\+#0x0\]
-+.*1b4:.*3a.*1f.*84.*04.*.*lmw.bim.*\$r1,\[\$sp\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*1b8:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*1bc:.*10.*17.*80.*00.*.*sbi.*\$r1,\[\$r15\+#0x0\]
-+.*1c0:.*3a.*11.*04.*04.*.*lmw.bim.*\$r1,\[\$r2\],\$r1,#0x0.*.*.*.*!.*\{\$r1\}
-+.*1c4:.*46.*f0.*00.*00.*.*sethi.*\$r15,#0x0
-+.*1c8:.*10.*17.*80.*00.*.*sbi.*\$r1,\[\$r15\+#0x0\]
-+.*1cc:.*08.*11.*00.*01.*.*lbi.bi.*\$r1,\[\$r2\],#0x1
-+.*1d0:.*0a.*11.*00.*01.*.*lhi.bi.*\$r1,\[\$r2\],#0x2
-+.*1d4:.*0c.*11.*00.*01.*.*lwi.bi.*\$r1,\[\$r2\],#0x4
-+.*1d8:.*18.*11.*00.*01.*.*sbi.bi.*\$r1,\[\$r2\],#0x1
-+.*1dc:.*1a.*11.*00.*01.*.*shi.bi.*\$r1,\[\$r2\],#0x2
-+.*1e0:.*1c.*11.*00.*01.*.*swi.bi.*\$r1,\[\$r2\],#0x4
-+.*1e4:.*28.*11.*00.*01.*.*lbsi.bi.*\$r1,\[\$r2\],#0x1
-+.*1e8:.*2a.*11.*00.*01.*.*lhsi.bi.*\$r1,\[\$r2\],#0x2
-+.*1ec:.*0c.*11.*00.*01.*.*lwi.bi.*\$r1,\[\$r2\],#0x4
-+.*1f0:.*fc.*00.*.*.*.*.*.*.*.*push25.*\$r6,#0.*.*.*.*!.*\{\$r6,.*\$fp,.*\$gp,.*\$lp\}
-+.*1f2:.*fc.*80.*.*.*.*.*.*.*.*pop25.*\$r6,#0.*.*.*.*!.*\{\$r6,.*\$fp,.*\$gp,.*\$lp\}
-+.*1f4:.*58.*11.*00.*00.*.*ori.*\$r1,\$r2,#0x0
-+.*1f8:.*3a.*1f.*9b.*fc.*.*smw.adm.*\$r1,\[\$sp\],\$r6,#0xf.*.*.*.*!.*\{\$r1~\$r6,.*\$fp,.*\$gp,.*\$lp,.*\$sp\}
-+.*1fc:.*3b.*ff.*ff.*fc.*.*smw.adm.*\$sp,\[\$sp\],\$sp,#0xf.*.*.*.*!.*\{\$fp,.*\$gp,.*\$lp,.*\$sp\}
-+.*200:.*3a.*1f.*9b.*c4.*.*lmw.bim.*\$r1,\[\$sp\],\$r6,#0xf.*.*.*.*!.*\{\$r1~\$r6,.*\$fp,.*\$gp,.*\$lp,.*\$sp\}
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/pseudo_instruction.s binutils-2.24/gas/testsuite/gas/nds32/pseudo_instruction.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/pseudo_instruction.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/pseudo_instruction.s 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,93 @@
-+ .data
-+ .size var, 4
-+var:
-+ .word 10
-+ .text
-+foo:
-+! 1. load 32-bit value/address
-+ li $r1, 0x1 ! load immediate
-+ li $r1, 0xFF ! load immediate
-+ li $r1, 0x80000 ! load immediate
-+ li $r1, 0x80001 ! load immediate
-+ la $r1, var ! load address
-+! 2. load/store variables
-+ l.b $r1, var ! load value of variable
-+ l.b $r1, $r2 ! load value of variable
-+ l.h $r1, var ! load value of variable
-+ l.h $r1, $r2 ! load value of variable
-+ l.w $r1, var ! load value of variable
-+ l.w $r1, $r2 ! load value of variable
-+ l.bs $r1, var !
-+ l.bp $r1, var, 1 ! load value of variable, and
-+ l.hp $r1, var, 2 ! load value of variable, and
-+ l.wp $r1, var, 4 ! load value of variable, and
-+ l.bpc $r1, 1
-+ l.hpc $r1, 2
-+ l.wpc $r1, 4
-+ !1.bsp $r1, var, 1 ! FIXME: incorrect syntax, see docs
-+ !l.bspc $r1, var, 1 ! FIXME: incorrect syntax
-+ s.b $r1, var
-+ s.bp $r1, var, 1
-+ !s.bpc $r1, var, 1 ! FIXME: incorrect syntax
-+! 3. negation
-+ not $r1, $r2
-+ neg $r1, $r2
-+! 4. branch to label
-+ br $r1
-+ b foo
-+ beq $r1, $r2, foo
-+ bne $r1, $r2, foo
-+ bge $r1, $r2, foo
-+ bges $r1, $r2, foo
-+ bgt $r1, $r2, foo
-+ bgts $r1, $r2, foo
-+ blt $r1, $r2, foo
-+ blts $r1, $r2, foo
-+ ble $r1, $r2, foo
-+ bles $r1, $r2, foo
-+! 5. branch and link to function name
-+ bral $r1
-+ bal foo
-+ call foob
-+ bgezal $r1, foo
-+ bltzal $r1, foo
-+! 6. move
-+ move $r1, $r2
-+ move $r1, foo
-+ move $r1, 1
-+! 7. push/pop
-+ pushm $r28, $r29
-+ push $r1
-+ push.d var
-+ push.w var
-+ push.h var
-+ push.b var
-+ push.b var, $r1
-+ pusha var
-+ pusha var, $r1
-+ pushi 1
-+ pushi 1, $r1
-+ popm $r1, $r2
-+ pop $r1
-+ pop.d var, $r1
-+ pop.w var, $r1
-+ pop.h var, $r1
-+ pop.b var, $r1
-+ pop.b var, $r1, $r2
-+
-+ lbi.p $r1, [$r2], 1
-+ lhi.p $r1, [$r2], 2
-+ lwi.p $r1, [$r2], 4
-+ sbi.p $r1, [$r2], 1
-+ shi.p $r1, [$r2], 2
-+ swi.p $r1, [$r2], 4
-+ lbsi.p $r1, [$r2], 1
-+ lhsi.p $r1, [$r2], 2
-+ lwsi.p $r1, [$r2], 4
-+ v3push $r6, 0
-+ v3pop $r6, 0
-+.16bit_off
-+ move $r1, $r2
-+ push.s $r1,$r6, { $fp $gp $lp $sp }
-+ push.s { $fp $gp $lp $sp }
-+ pop.s $r1,$r6, { $fp $gp $lp $sp }
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/register_alias.d binutils-2.24/gas/testsuite/gas/nds32/register_alias.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/register_alias.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/register_alias.d 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,40 @@
-+#objdump: -d
-+#name: nds32 register alias instructions
-+#as: -mext-all
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+00000000 <foo>:
-+.*.*.*0:.*40.*00.*80.*00.*.*add.*\$r0,\$r1,\$r0
-+.*.*.*4:.*40.*00.*84.*00.*.*add.*\$r0,\$r1,\$r1
-+.*.*.*8:.*40.*00.*88.*00.*.*add.*\$r0,\$r1,\$r2
-+.*.*.*c:.*40.*00.*8c.*00.*.*add.*\$r0,\$r1,\$r3
-+.*.*10:.*40.*00.*90.*00.*.*add.*\$r0,\$r1,\$r4
-+.*.*14:.*40.*00.*94.*00.*.*add.*\$r0,\$r1,\$r5
-+.*.*18:.*40.*00.*98.*00.*.*add.*\$r0,\$r1,\$r6
-+.*.*1c:.*40.*00.*9c.*00.*.*add.*\$r0,\$r1,\$r7
-+.*.*20:.*40.*00.*a0.*00.*.*add.*\$r0,\$r1,\$r8
-+.*.*24:.*40.*00.*a4.*00.*.*add.*\$r0,\$r1,\$r9
-+.*.*28:.*40.*00.*a8.*00.*.*add.*\$r0,\$r1,\$r10
-+.*.*2c:.*40.*00.*ac.*00.*.*add.*\$r0,\$r1,\$r11
-+.*.*30:.*40.*00.*b0.*00.*.*add.*\$r0,\$r1,\$r12
-+.*.*34:.*40.*00.*b4.*00.*.*add.*\$r0,\$r1,\$r13
-+.*.*38:.*40.*00.*b8.*00.*.*add.*\$r0,\$r1,\$r14
-+.*.*3c:.*40.*00.*bc.*00.*.*add.*\$r0,\$r1,\$r15
-+.*.*40:.*40.*00.*c0.*00.*.*add.*\$r0,\$r1,\$r16
-+.*.*44:.*40.*00.*c4.*00.*.*add.*\$r0,\$r1,\$r17
-+.*.*48:.*40.*00.*c8.*00.*.*add.*\$r0,\$r1,\$r18
-+.*.*4c:.*40.*00.*cc.*00.*.*add.*\$r0,\$r1,\$r19
-+.*.*50:.*40.*00.*d0.*00.*.*add.*\$r0,\$r1,\$r20
-+.*.*54:.*40.*00.*d4.*00.*.*add.*\$r0,\$r1,\$r21
-+.*.*58:.*40.*00.*d8.*00.*.*add.*\$r0,\$r1,\$r22
-+.*.*5c:.*40.*00.*dc.*00.*.*add.*\$r0,\$r1,\$r23
-+.*.*60:.*40.*00.*e0.*00.*.*add.*\$r0,\$r1,\$r24
-+.*.*64:.*40.*00.*e4.*00.*.*add.*\$r0,\$r1,\$r25
-+.*.*68:.*40.*00.*e8.*00.*.*add.*\$r0,\$r1,\$p0
-+.*.*6c:.*40.*00.*ec.*00.*.*add.*\$r0,\$r1,\$p1
-+.*.*70:.*40.*00.*f0.*00.*.*add.*\$r0,\$r1,\$fp
-+.*.*74:.*40.*00.*f4.*00.*.*add.*\$r0,\$r1,\$gp
-+.*.*78:.*40.*00.*f8.*00.*.*add.*\$r0,\$r1,\$lp
-+.*.*7c:.*40.*00.*fc.*00.*.*add.*\$r0,\$r1,\$sp
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/register_alias.s binutils-2.24/gas/testsuite/gas/nds32/register_alias.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/register_alias.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/register_alias.s 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,37 @@
-+foo:
-+ !Table 5. Andes GPRs with the ABI Usage Convention
-+ add $r0, $r1, $a0
-+ add $r0, $r1, $a1
-+ add $r0, $r1, $a2
-+ add $r0, $r1, $a3
-+ add $r0, $r1, $a4
-+ add $r0, $r1, $a5
-+ add $r0, $r1, $s0
-+ add $r0, $r1, $s1
-+ add $r0, $r1, $s2
-+ add $r0, $r1, $s3
-+ add $r0, $r1, $s4
-+ add $r0, $r1, $s5
-+ add $r0, $r1, $s6
-+ add $r0, $r1, $s7
-+ add $r0, $r1, $s8
-+ add $r0, $r1, $ta
-+ add $r0, $r1, $t0
-+ add $r0, $r1, $t1
-+ add $r0, $r1, $t2
-+ add $r0, $r1, $t3
-+ add $r0, $r1, $t4
-+ add $r0, $r1, $t5
-+ add $r0, $r1, $t6
-+ add $r0, $r1, $t7
-+ add $r0, $r1, $t8
-+ add $r0, $r1, $t9
-+ add $r0, $r1, $p0
-+ add $r0, $r1, $p1
-+ add $r0, $r1, $fp
-+ add $r0, $r1, $gp
-+ add $r0, $r1, $lp
-+ add $r0, $r1, $sp
-+
-+
-+
-\ No newline at end of file
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/sys-reg.d binutils-2.24/gas/testsuite/gas/nds32/sys-reg.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/sys-reg.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/sys-reg.d 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,118 @@
-+#objdump: -d --prefix-addresses
-+#name: nds32 sys-reg instructions
-+#as:
-+
-+# Test system register instructions
-+
-+.*: file format .*
-+
-+
-+Disassembly of section .text:
-+0+0000 <[^>]*> mfsr \$r0,\$cpu_ver
-+0+0004 <[^>]*> mfsr \$r0,\$core_id
-+0+0008 <[^>]*> mfsr \$r0,\$icm_cfg
-+0+000c <[^>]*> mfsr \$r0,\$dcm_cfg
-+0+0010 <[^>]*> mfsr \$r0,\$mmu_cfg
-+0+0014 <[^>]*> mfsr \$r0,\$msc_cfg
-+0+0018 <[^>]*> mfsr \$r0,\$psw
-+0+001c <[^>]*> mfsr \$r0,\$ipsw
-+0+0020 <[^>]*> mfsr \$r0,\$p_ipsw
-+0+0024 <[^>]*> mfsr \$r0,\$ivb
-+0+0028 <[^>]*> mfsr \$r0,\$int_ctrl
-+0+002c <[^>]*> mfsr \$r0,\$eva
-+0+0030 <[^>]*> mfsr \$r0,\$p_eva
-+0+0034 <[^>]*> mfsr \$r0,\$itype
-+0+0038 <[^>]*> mfsr \$r0,\$p_itype
-+0+003c <[^>]*> mfsr \$r0,\$merr
-+0+0040 <[^>]*> mfsr \$r0,\$ipc
-+0+0044 <[^>]*> mfsr \$r0,\$p_ipc
-+0+0048 <[^>]*> mfsr \$r0,\$oipc
-+0+004c <[^>]*> mfsr \$r0,\$p_p0
-+0+0050 <[^>]*> mfsr \$r0,\$p_p1
-+0+0054 <[^>]*> mfsr \$r0,\$int_mask
-+0+0058 <[^>]*> mfsr \$r0,\$int_mask2
-+0+005c <[^>]*> mfsr \$r0,\$int_pend
-+0+0060 <[^>]*> mfsr \$r0,\$int_pend2
-+0+0064 <[^>]*> mfsr \$r0,\$int_trigger
-+0+0068 <[^>]*> mfsr \$r0,\$sp_usr
-+0+006c <[^>]*> mfsr \$r0,\$sp_priv
-+0+0070 <[^>]*> mfsr \$r0,\$int_pri
-+0+0074 <[^>]*> mfsr \$r0,\$int_pri2
-+0+0078 <[^>]*> mfsr \$r0,\$mmu_ctl
-+0+007c <[^>]*> mfsr \$r0,\$l1_pptb
-+0+0080 <[^>]*> mfsr \$r0,\$tlb_vpn
-+0+0084 <[^>]*> mfsr \$r0,\$tlb_data
-+0+0088 <[^>]*> mfsr \$r0,\$tlb_misc
-+0+008c <[^>]*> mfsr \$r0,\$vlpt_idx
-+0+0090 <[^>]*> mfsr \$r0,\$ilmb
-+0+0094 <[^>]*> mfsr \$r0,\$dlmb
-+0+0098 <[^>]*> mfsr \$r0,\$cache_ctl
-+0+009c <[^>]*> mfsr \$r0,\$hsmp_saddr
-+0+00a0 <[^>]*> mfsr \$r0,\$hsmp_eaddr
-+0+00a4 <[^>]*> mfsr \$r0,\$sdz_ctl
-+0+00a8 <[^>]*> mfsr \$r0,\$misc_ctl
-+0+00ac <[^>]*> mfsr \$r0,\$bpc0
-+0+00b0 <[^>]*> mfsr \$r0,\$bpc1
-+0+00b4 <[^>]*> mfsr \$r0,\$bpc2
-+0+00b8 <[^>]*> mfsr \$r0,\$bpc3
-+0+00bc <[^>]*> mfsr \$r0,\$bpc4
-+0+00c0 <[^>]*> mfsr \$r0,\$bpc5
-+0+00c4 <[^>]*> mfsr \$r0,\$bpc6
-+0+00c8 <[^>]*> mfsr \$r0,\$bpc7
-+0+00cc <[^>]*> mfsr \$r0,\$bpa0
-+0+00d0 <[^>]*> mfsr \$r0,\$bpa1
-+0+00d4 <[^>]*> mfsr \$r0,\$bpa2
-+0+00d8 <[^>]*> mfsr \$r0,\$bpa3
-+0+00dc <[^>]*> mfsr \$r0,\$bpa4
-+0+00e0 <[^>]*> mfsr \$r0,\$bpa5
-+0+00e4 <[^>]*> mfsr \$r0,\$bpa6
-+0+00e8 <[^>]*> mfsr \$r0,\$bpa7
-+0+00ec <[^>]*> mfsr \$r0,\$bpam0
-+0+00f0 <[^>]*> mfsr \$r0,\$bpam1
-+0+00f4 <[^>]*> mfsr \$r0,\$bpam2
-+0+00f8 <[^>]*> mfsr \$r0,\$bpam3
-+0+00fc <[^>]*> mfsr \$r0,\$bpam4
-+0+0100 <[^>]*> mfsr \$r0,\$bpam5
-+0+0104 <[^>]*> mfsr \$r0,\$bpam6
-+0+0108 <[^>]*> mfsr \$r0,\$bpam7
-+0+010c <[^>]*> mfsr \$r0,\$bpv0
-+0+0110 <[^>]*> mfsr \$r0,\$bpv1
-+0+0114 <[^>]*> mfsr \$r0,\$bpv2
-+0+0118 <[^>]*> mfsr \$r0,\$bpv3
-+0+011c <[^>]*> mfsr \$r0,\$bpv4
-+0+0120 <[^>]*> mfsr \$r0,\$bpv5
-+0+0124 <[^>]*> mfsr \$r0,\$bpv6
-+0+0128 <[^>]*> mfsr \$r0,\$bpv7
-+0+012c <[^>]*> mfsr \$r0,\$bpcid0
-+0+0130 <[^>]*> mfsr \$r0,\$bpcid1
-+0+0134 <[^>]*> mfsr \$r0,\$bpcid2
-+0+0138 <[^>]*> mfsr \$r0,\$bpcid3
-+0+013c <[^>]*> mfsr \$r0,\$bpcid4
-+0+0140 <[^>]*> mfsr \$r0,\$bpcid5
-+0+0144 <[^>]*> mfsr \$r0,\$bpcid6
-+0+0148 <[^>]*> mfsr \$r0,\$bpcid7
-+0+014c <[^>]*> mfsr \$r0,\$edm_cfg
-+0+0150 <[^>]*> mfsr \$r0,\$edmsw
-+0+0154 <[^>]*> mfsr \$r0,\$edm_ctl
-+0+0158 <[^>]*> mfsr \$r0,\$edm_dtr
-+0+015c <[^>]*> mfsr \$r0,\$bpmtc
-+0+0160 <[^>]*> mfsr \$r0,\$dimbr
-+0+0164 <[^>]*> mfsr \$r0,\$tecr0
-+0+0168 <[^>]*> mfsr \$r0,\$tecr1
-+0+016c <[^>]*> mfsr \$r0,\$pfmc0
-+0+0170 <[^>]*> mfsr \$r0,\$pfmc1
-+0+0174 <[^>]*> mfsr \$r0,\$pfmc2
-+0+0178 <[^>]*> mfsr \$r0,\$pfm_ctl
-+0+017c <[^>]*> mfsr \$r0,\$prusr_acc_ctl
-+0+0180 <[^>]*> mfsr \$r0,\$fucpr
-+0+0184 <[^>]*> mfsr \$r0,\$dma_cfg
-+0+0188 <[^>]*> mfsr \$r0,\$dma_gcsw
-+0+018c <[^>]*> mfsr \$r0,\$dma_chnsel
-+0+0190 <[^>]*> mfsr \$r0,\$dma_act
-+0+0194 <[^>]*> mfsr \$r0,\$dma_setup
-+0+0198 <[^>]*> mfsr \$r0,\$dma_isaddr
-+0+019c <[^>]*> mfsr \$r0,\$dma_esaddr
-+0+01a0 <[^>]*> mfsr \$r0,\$dma_tcnt
-+0+01a4 <[^>]*> mfsr \$r0,\$dma_status
-+0+01a8 <[^>]*> mfsr \$r0,\$dma_2dset
-+0+01ac <[^>]*> mfsr \$r0,\$dma_2dsctl
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/sys-reg.s binutils-2.24/gas/testsuite/gas/nds32/sys-reg.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/sys-reg.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/sys-reg.s 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,114 @@
-+foo:
-+ mfsr $r0 ,$CPU_VER
-+ mfsr $r0 ,$CORE_ID
-+ mfsr $r0 ,$ICM_CFG
-+ mfsr $r0 ,$DCM_CFG
-+ mfsr $r0 ,$MMU_CFG
-+ mfsr $r0 ,$MSC_CFG
-+
-+ mfsr $r0 ,$PSW
-+ mfsr $r0 ,$IPSW
-+ mfsr $r0 ,$P_IPSW
-+ mfsr $r0 ,$IVB
-+ mfsr $r0 ,$INT_CTRL
-+ mfsr $r0 ,$EVA
-+ mfsr $r0 ,$P_EVA
-+ mfsr $r0 ,$ITYPE
-+ mfsr $r0 ,$P_ITYPE
-+ mfsr $r0 ,$MERR
-+ mfsr $r0 ,$IPC
-+ mfsr $r0 ,$P_IPC
-+ mfsr $r0 ,$OIPC
-+ mfsr $r0 ,$P_P0
-+ mfsr $r0 ,$P_P1
-+ mfsr $r0 ,$INT_MASK
-+ mfsr $r0 ,$INT_MASK2
-+ mfsr $r0 ,$INT_PEND
-+ mfsr $r0 ,$INT_PEND2
-+ mfsr $r0 ,$INT_TRIGGER
-+ mfsr $r0 ,$SP_USR
-+ mfsr $r0 ,$SP_PRIV
-+ mfsr $r0 ,$INT_PRI
-+ mfsr $r0 ,$INT_PRI2
-+
-+ mfsr $r0 ,$MMU_CTL
-+ mfsr $r0 ,$L1_PPTB
-+ mfsr $r0 ,$TLB_VPN
-+ mfsr $r0 ,$TLB_DATA
-+ mfsr $r0 ,$TLB_MISC
-+ mfsr $r0 ,$VLPT_IDX
-+ mfsr $r0 ,$ILMB
-+ mfsr $r0 ,$DLMB
-+ mfsr $r0 ,$CACHE_CTL
-+ mfsr $r0 ,$HSMP_SADDR
-+ mfsr $r0 ,$HSMP_EADDR
-+ mfsr $r0 ,$SDZ_CTL
-+ mfsr $r0 ,$MISC_CTL
-+
-+ mfsr $r0 ,$BPC0
-+ mfsr $r0 ,$BPC1
-+ mfsr $r0 ,$BPC2
-+ mfsr $r0 ,$BPC3
-+ mfsr $r0 ,$BPC4
-+ mfsr $r0 ,$BPC5
-+ mfsr $r0 ,$BPC6
-+ mfsr $r0 ,$BPC7
-+ mfsr $r0 ,$BPA0
-+ mfsr $r0 ,$BPA1
-+ mfsr $r0 ,$BPA2
-+ mfsr $r0 ,$BPA3
-+ mfsr $r0 ,$BPA4
-+ mfsr $r0 ,$BPA5
-+ mfsr $r0 ,$BPA6
-+ mfsr $r0 ,$BPA7
-+ mfsr $r0 ,$BPAM0
-+ mfsr $r0 ,$BPAM1
-+ mfsr $r0 ,$BPAM2
-+ mfsr $r0 ,$BPAM3
-+ mfsr $r0 ,$BPAM4
-+ mfsr $r0 ,$BPAM5
-+ mfsr $r0 ,$BPAM6
-+ mfsr $r0 ,$BPAM7
-+ mfsr $r0 ,$BPV0
-+ mfsr $r0 ,$BPV1
-+ mfsr $r0 ,$BPV2
-+ mfsr $r0 ,$BPV3
-+ mfsr $r0 ,$BPV4
-+ mfsr $r0 ,$BPV5
-+ mfsr $r0 ,$BPV6
-+ mfsr $r0 ,$BPV7
-+ mfsr $r0 ,$BPCID0
-+ mfsr $r0 ,$BPCID1
-+ mfsr $r0 ,$BPCID2
-+ mfsr $r0 ,$BPCID3
-+ mfsr $r0 ,$BPCID4
-+ mfsr $r0 ,$BPCID5
-+ mfsr $r0 ,$BPCID6
-+ mfsr $r0 ,$BPCID7
-+ mfsr $r0 ,$EDM_CFG
-+ mfsr $r0 ,$EDMSW
-+ mfsr $r0 ,$EDM_CTL
-+ mfsr $r0 ,$EDM_DTR
-+ mfsr $r0 ,$BPMTC
-+ mfsr $r0 ,$DIMBR
-+ mfsr $r0 ,$TECR0
-+ mfsr $r0 ,$TECR1
-+
-+ mfsr $r0 ,$PFMC0
-+ mfsr $r0 ,$PFMC1
-+ mfsr $r0 ,$PFMC2
-+ mfsr $r0 ,$PFM_CTL
-+ mfsr $r0 ,$PRUSR_ACC_CTL
-+ mfsr $r0 ,$FUCOP_CTL
-+
-+ mfsr $r0 ,$DMA_CFG
-+ mfsr $r0 ,$DMA_GCSW
-+ mfsr $r0 ,$DMA_CHNSEL
-+ mfsr $r0 ,$DMA_ACT
-+ mfsr $r0 ,$DMA_SETUP
-+ mfsr $r0 ,$DMA_ISADDR
-+ mfsr $r0 ,$DMA_ESADDR
-+ mfsr $r0 ,$DMA_TCNT
-+ mfsr $r0 ,$DMA_STATUS
-+ mfsr $r0 ,$DMA_2DSET
-+ mfsr $r0 ,$DMA_2DSCTL
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/test-audio-ext.s binutils-2.24/gas/testsuite/gas/nds32/test-audio-ext.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/test-audio-ext.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/test-audio-ext.s 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,153 @@
-+foo:
-+ aaddl $r22,$gp,$r9,$r23,[$i7],$m7
-+ asubl $r8,$r25,$sp,$r9,[$i4],$m5
-+ amtari $m7,#0x53fc
-+
-+ amadd $d0,$r0,$r0
-+ amabbs $d1,$r2,$r22
-+ alr $lp,[$i3],$m3
-+ alr2 $lp,$r11,[$i3],[$i7],$m3,$m5
-+ amaddl.s $d0,$r0,$r13,[$i7],$m7
-+ amaddl.l $d0,$r12,$r7,$r3,[$i5],$m5
-+ amaddl2.s $d1,$r9,$r14,[$i2],[$i6],$m0,$m4
-+ amaddl2.l $d1,$r15,$r14,$r12,$r13,[$i1],[$i5],$m0,$m5
-+ amaddsa $d1,$r11,$r14,$d0.lo,[$i5],$m4
-+
-+ amsub $d0,$r4,$r0
-+ amabts $d0,$r0,$r0
-+ asr $r0,[$i4],$m7
-+ amsubl.s $d0,$r3,$r14,[$i4],$m7
-+ amsubl.l $d0,$r12,$r7,$r3,[$i5],$m5
-+ amsubl2.s $d1,$fp,$r11,[$i0],[$i4],$m1,$m4
-+ amsubl2.l $d1,$r14,$r14,$r10,$r11,[$i1],[$i5],$m2,$m5
-+ amsubsa $d0,$r10,$r3,$d0.lo,[$i0],$m0
-+
-+ amult $d0,$r4,$r0
-+ amatbs $d0,$r21,$fp
-+ ala $d0.hi,[$i7],$m7
-+ asats48 $d0
-+ awext $r4,$d0,#0x7
-+ amultl.s $d0,$r10,$r19,[$i3],$m1
-+ amultl.l $d0,$r6,$r11,$r8,[$i5],$m7
-+ amultl2.s $d0,$r21,$r17,[$i2],[$i6],$m3,$m4
-+ amultl2.l $d0,$r6,$r3,$r6,$r7,[$i2],[$i6],$m1,$m4
-+ amultsa $d1,$r5,$lp,$d1.lo,[$i3],$m1
-+
-+ amatts $d0,$r4,$r0
-+ asa $d0.hi,[$i7],$m7
-+ amtar $r0,$i5
-+ amfar $r0,$i5
-+ amtar2 $r0,$i5
-+ amfar2 $r0,$i5
-+
-+ amadds $d0,$r4,$r0
-+ ambbs $d0,$r4,$r0
-+ amawbs $d0,$r4,$r0
-+ aupi $i7,$m7
-+ amaddsl.s $d1,$r22,$r9,[$i4],$m6
-+ amaddsl.l $d0,$r4,$r0,$r0,[$i1],$m2
-+ amaddsl2.s $d1,$r15,$r20,[$i0],[$i4],$m3,$m5
-+ amaddsl2.l $d0,$r10,$r14,$r14,$r15,[$i0],[$i4],$m3,$m6
-+ amaddssa $d0,$lp,$r24,$d0.lo,[$i7],$m7
-+
-+ amsubs $d0,$r4,$r0
-+ ambts $d0,$r4,$r0
-+ amawts $d0,$r4,$r0
-+ amsubsl.s $d1,$r6,$r7,[$i4],$m6
-+ amsubsl.l $d1,$r9,$r10,$r15,[$i1],$m1
-+ amsubsl2.s $d0,$r4,$r1,[$i0],[$i4],$m0,$m4
-+ amsubsl2.l $d1,$r7,$r9,$r14,$r15,[$i0],[$i4],$m3,$m4
-+ amsubssa $d0,$r9,$r7,$d1.lo,[$i3],$m3
-+
-+ amults $d0,$r4,$r0
-+ amtbs $d0,$r4,$r0
-+ amwbs $d0,$r4,$r0
-+ amultsl.s $d0,$r13,$r5,[$i7],$m7
-+ amultsl.l $d1,$r4,$r9,$r14,[$i4],$m7
-+ amultsl2.s $d0,$r20,$r20,[$i0],[$i4],$m0,$m4
-+ amultsl2.l $d1,$r7,$r11,$r10,$r11,[$i3],[$i7],$m3,$m4
-+ amultssa $d0,$r5,$r4,$d0.lo,[$i1],$m0
-+
-+ amnegs $d0,$r4,$r0
-+ amtts $d0,$r4,$r0
-+ amwts $d0,$r4,$r0
-+ amnegsl.s $d1,$r4,$sp,[$i1],$m0
-+ amnegsl.l $d0,$r14,$r5,$r7,[$i0],$m1
-+ amnegsl2.s $d1,$r2,$fp,[$i2],[$i6],$m1,$m5
-+ amnegsl2.l $d0,$r7,$r10,$r10,$r11,[$i0],[$i4],$m0,$m6
-+ amnegssa $d0,$r14,$r7,$d0.hi,[$i4],$m5
-+
-+
-+ amtari $m7,#0x53fc
-+
-+ amawbsl.s $d1,$r21,$sp,[$i4],$m5
-+ amawbsl.l $d0,$r4,$r0,$r1,[$i7],$m7
-+ amawbsl2.s $d1,$r20,$r16,[$i2],[$i6],$m1,$m7
-+ amawbsl2.l $d1,$r0,$r2,$r0,$r1,[$i0],[$i4],$m1,$m4
-+ amawbssa $d1,$r12,$r14,$d1.hi,[$i0],$m1
-+
-+ amawtsl.s $d1,$r21,$sp,[$i4],$m5
-+ amawtsl.l $d1,$r5,$r5,$r1,[$i0],$m3
-+ amawtsl2.s $d0,$r12,$r5,[$i1],[$i5],$m3,$m7
-+ amawtsl2.l $d1,$r0,$r2,$r0,$r1,[$i0],[$i4],$m1,$m4
-+ amawtssa $d0,$r8,$p1,$d0.hi,[$i0],$m1
-+
-+ amwbsl.s $d1,$r22,$r10,[$i6],$m6
-+ amwbsl.l $d1,$r7,$r15,$r8,[$i1],$m3
-+ amwbsl2.s $d1,$r7,$r21,[$i1],[$i5],$m1,$m7
-+ amwbsl2.l $d0,$r3,$r2,$r2,$r3,[$i3],[$i7],$m1,$m4
-+ amwbssa $d1,$r10,$r18,$d0.hi,[$i2],$m3
-+
-+ amwtsl.s $d0,$lp,$r0,[$i7],$m7
-+ amwtsl.l $d0,$r2,$r4,$r4,[$i3],$m1
-+ amwtsl2.s $d0,$r2,$r5,[$i0],[$i4],$m1,$m4
-+ amwtsl2.l $d1,$r7,$r3,$r0,$r1,[$i0],[$i4],$m3,$m6
-+ amwtssa $d1,$p0,$r10,$d1.lo,[$i6],$m4
-+
-+ amabbsl.s $d0,$r3,$r5,[$i5],$m4
-+ amabbsl.l $d0,$r2,$r4,$r4,[$i3],$m1
-+ amabbsl2.s $d0,$r17,$r23,[$i0],[$i4],$m3,$m5
-+ amabbsl2.l $d0,$r8,$r12,$r14,$r15,[$i1],[$i5],$m1,$m5
-+ amabbssa $d1,$r2,$r8,$d1.hi,[$i3],$m0
-+
-+ amabtsl.s $d0,$r3,$r5,[$i5],$m4
-+ amabtsl.l $d0,$r2,$r4,$r4,[$i3],$m1
-+ amabtsl2.s $d1,$r4,$r0,[$i0],[$i4],$m0,$m4
-+ amabtsl2.l $d1,$r10,$r13,$r12,$r13,[$i2],[$i6],$m3,$m5
-+ amabtssa $d0,$r19,$r16,$d1.lo,[$i3],$m3
-+
-+ amatbsl.s $d0,$r3,$r5,[$i5],$m4
-+ amatbsl.l $d0,$r12,$r3,$r1,[$i6],$m4
-+ amatbsl2.s $d1,$r17,$r4,[$i0],[$i4],$m3,$m4
-+ amatbsl2.l $d0,$r4,$r7,$r4,$r5,[$i0],[$i4],$m3,$m7
-+ amatbssa $d0,$r17,$r4,$d1.lo,[$i0],$m2
-+
-+ amattsl.s $d1,$r13,$lp,[$i4],$m7
-+ amattsl.l $d0,$r12,$r3,$r1,[$i6],$m4
-+ amattsl2.s $d1,$r12,$r17,[$i3],[$i7],$m1,$m4
-+ amattsl2.l $d0,$r4,$r7,$r4,$r5,[$i0],[$i4],$m3,$m7
-+ amattssa $d0,$r17,$r4,$d1.lo,[$i0],$m2
-+
-+ ambbsl.s $d1,$r23,$r24,[$i5],$m5
-+ ambbsl.l $d0,$r12,$r3,$r1,[$i6],$m4
-+ ambbsl2.s $d0,$r15,$r5,[$i2],[$i6],$m0,$m5
-+ ambbsl2.l $d1,$r9,$r1,$r4,$r5,[$i3],[$i7],$m2,$m4
-+ ambbssa $d0,$r18,$r25,$d0.lo,[$i5],$m5
-+
-+ ambtsl.s $d1,$p1,$r1,[$i7],$m6
-+ ambtsl.l $d0,$r0,$r14,$r15,[$i7],$m4
-+ ambtsl2.s $d0,$r5,$r12,[$i0],[$i4],$m1,$m7
-+ ambtsl2.l $d1,$r9,$r1,$r4,$r5,[$i3],[$i7],$m2,$m4
-+ ambtssa $d0,$r18,$r6,$d1.hi,[$i1],$m0
-+
-+ amtbsl.s $d1,$r8,$r23,[$i3],$m1
-+ amtbsl.l $d1,$r12,$r8,$r14,[$i0],$m0
-+ amtbsl2.s $d1,$r6,$p0,[$i1],[$i5],$m3,$m6
-+ amtbsl2.l $d1,$r3,$r6,$r4,$r5,[$i1],[$i5],$m0,$m6
-+ amtbssa $d1,$r22,$r4,$d1.lo,[$i2],$m2
-+
-+ amttsl.s $d1,$r22,$r9,[$i5],$m6
-+ amttsl.l $d0,$r1,$r10,$r12,[$i3],$m3
-+ amttsl2.s $d1,$r6,$p0,[$i1],[$i5],$m3,$m6
-+ amttsl2.l $d1,$r3,$r6,$r4,$r5,[$i1],[$i5],$m0,$m6
-+ amttssa $d1,$r22,$r4,$d1.lo,[$i2],$m2
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/to-16bit-v1.d binutils-2.24/gas/testsuite/gas/nds32/to-16bit-v1.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/to-16bit-v1.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/to-16bit-v1.d 2016-06-30 21:26:12.757897157 +0200
-@@ -0,0 +1,79 @@
-+#objdump: -d --prefix-addresses
-+#name: nds32 convert 32 to 16 (v1 instructions)
-+#as: -Os -mno-reduced-regs
-+
-+# Test the convert 32bits to 16bits
-+
-+.*: file format .*
-+
-+
-+Disassembly of section .text:
-+0+0000 .*
-+0+0002 .*
-+0+0004 .*
-+0+0006 .*
-+0+0008 .*
-+0+000a .*
-+0+000c .*
-+0+000e .*
-+0+0010 .*
-+0+0012 .*
-+0+0014 .*
-+0+0016 .*
-+0+0018 .*
-+0+001a .*
-+0+001c .*
-+0+001e .*
-+0+0020 .*
-+0+0022 .*
-+0+0024 .*
-+0+0026 .*
-+0+0028 .*
-+0+002a .*
-+0+002c .*
-+0+002e .*
-+0+0030 .*
-+0+0032 .*
-+0+0034 .*
-+0+0036 .*
-+0+0038 .*
-+0+003a .*
-+0+003c .*
-+0+003e .*
-+0+0040 .*
-+0+0042 .*
-+0+0044 .*
-+0+0046 .*
-+0+0048 .*
-+0+004a .*
-+0+004c .*
-+0+004e .*
-+0+0050 .*
-+0+0052 .*
-+0+0054 .*
-+0+0056 .*
-+0+0058 .*
-+0+005a .*
-+0+005c .*
-+0+005e .*
-+0+0060 .*
-+0+0062 .*
-+0+0064 .*
-+0+0066 .*
-+0+0068 .*
-+0+006a .*
-+0+006c .*
-+0+006e .*
-+0+0070 .*
-+0+0072 .*
-+0+0074 .*
-+0+0076 .*
-+0+0078 .*
-+0+007a .*
-+0+007c .*
-+0+007e .*
-+0+0080 .*
-+0+0082 .*
-+0+0084 .*
-+0+0086 .*
-+0+0088 .*
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/to-16bit-v1.s binutils-2.24/gas/testsuite/gas/nds32/to-16bit-v1.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/to-16bit-v1.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/to-16bit-v1.s 2016-06-30 21:26:12.761897313 +0200
-@@ -0,0 +1,70 @@
-+foo:
-+ move $r0, $r0
-+ move $sp, $sp
-+ movi $r0, -16
-+ movi $sp, 15
-+ add $r0, $r0, $r0
-+ add $r19, $sp, $r19
-+ sub $r0, $r0, $r0
-+ sub $r19, $r19, $sp
-+ addi $r0, $r0, 0
-+ addi $r19, $r19, 31
-+ srai $r0, $r0, 0
-+ srai $r19, $r19, 31
-+ srli $r0, $r0, 0
-+ srli $r19, $r19, 31
-+ slli $r0, $r0, 0
-+ slli $r7, $r7, 7
-+ zeb $r0, $r0
-+ zeb $r7, $r7
-+ zeh $r0, $r0
-+ zeh $r7, $r7
-+ seb $r0, $r0
-+ seb $r7, $r7
-+ seh $r0, $r0
-+ seh $r7, $r7
-+ andi $r0, $r0, 1
-+ andi $r7, $r7, 0x7ff
-+ add $r0, $r0, $r0
-+ add $r7, $r7, $r7
-+ sub $r0, $r0, $r0
-+ sub $r7, $r7, $r7
-+ addi $r0, $r0, 0
-+ addi $r7, $r7, 7
-+ lwi $r0, [$r0 + 0]
-+ lwi $r7, [$r7 + 28]
-+ lwi.bi $r0, [$r0], 0
-+ lwi.bi $r7, [$r7], 28
-+ lhi $r0, [$r0 + 0]
-+ lhi $r7, [$r7 + 14]
-+ lbi $r0, [$r0 + 0]
-+ lbi $r7, [$r7 + 7]
-+ swi $r0, [$r0 + 0]
-+ swi $r7, [$r7 + 28]
-+ swi.bi $r0, [$r0], 0
-+ swi.bi $r7, [$r7], 28
-+ shi $r0, [$r0 + 0]
-+ shi $r7, [$r7 + 14]
-+ sbi $r0, [$r0 + 0]
-+ sbi $r7, [$r7 + 7]
-+ lwi $r0, [$r0 + 0]
-+ lwi $r19, [$sp + 0]
-+ swi $r0, [$r0 + 0]
-+ swi $r19, [$sp + 0]
-+ lwi $r0, [$fp + 0]
-+ lwi $r7, [$fp + 508]
-+ swi $r0, [$fp + 0]
-+ swi $r7, [$fp + 508]
-+ jr $r0
-+ jr $sp
-+ ret $r0
-+ ret $sp
-+ jral $r0
-+ jral $sp
-+ slts $r15, $r0, $r0
-+ slts $r15, $r19, $sp
-+ slt $r15, $r0, $r0
-+ slt $r15, $r19, $sp
-+ sltsi $r15, $r0, 0
-+ sltsi $r15, $r19, 31
-+ slti $r15, $r0, 0
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/to-16bit-v2.d binutils-2.24/gas/testsuite/gas/nds32/to-16bit-v2.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/to-16bit-v2.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/to-16bit-v2.d 2016-06-30 21:26:12.761897313 +0200
-@@ -0,0 +1,15 @@
-+#objdump: -d --prefix-addresses
-+#name: nds32 convert 32 to 16 (v2 instructions)
-+#as: -Os -mno-reduced-regs
-+
-+# Test the convert 32bits to 16bits
-+
-+.*: file format .*
-+
-+
-+Disassembly of section .text:
-+0+0000 .*
-+0+0002 .*
-+0+0004 .*
-+0+0006 .*
-+0+0008 .*
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/to-16bit-v2.s binutils-2.24/gas/testsuite/gas/nds32/to-16bit-v2.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/to-16bit-v2.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/to-16bit-v2.s 2016-06-30 21:26:12.761897313 +0200
-@@ -0,0 +1,6 @@
-+foo:
-+addi $sp, $sp, -512
-+addi $sp, $sp, 511
-+lwi $r0, [$sp + 0]
-+lwi $r7, [$sp + 508]
-+swi $r0, [$sp + 0]
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/to-16bit-v3.d binutils-2.24/gas/testsuite/gas/nds32/to-16bit-v3.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/to-16bit-v3.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/to-16bit-v3.d 2016-06-30 21:26:12.761897313 +0200
-@@ -0,0 +1,25 @@
-+#objdump: -d --prefix-addresses
-+#name: nds32 convert 32 to 16 (v3 instructions)
-+#as: -Os -mno-reduced-regs
-+
-+# Test the convert 32bits to 16bits
-+
-+.*: file format .*
-+
-+
-+Disassembly of section .text:
-+0+0000 .*
-+0+0002 .*
-+0+0004 .*
-+0+0006 .*
-+0+0008 .*
-+0+000a .*
-+0+000c .*
-+0+000e .*
-+0+0010 .*
-+0+0012 .*
-+0+0014 .*
-+0+0016 .*
-+0+0018 .*
-+0+001a .*
-+0+001c .*
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/to-16bit-v3.s binutils-2.24/gas/testsuite/gas/nds32/to-16bit-v3.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/to-16bit-v3.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/to-16bit-v3.s 2016-06-30 21:26:12.761897313 +0200
-@@ -0,0 +1,16 @@
-+foo:
-+andi $r0, $r0, 1
-+andi $r7, $r7, 255
-+movi $r0, 16
-+movi $r19, 47
-+subri $r0, $r0, 0
-+subri $r7, $r7, 0
-+nor $r0, $r0, $r0
-+nor $r7, $r7, $r7
-+mul $r0, $r0, $r0
-+mul $r7, $r7, $r7
-+xor $r0, $r0, $r0
-+xor $r7, $r7, $r7
-+and $r0, $r0, $r0
-+and $r7, $r7, $r7
-+or $r0, $r0, $r0
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/usr-spe-reg.d binutils-2.24/gas/testsuite/gas/nds32/usr-spe-reg.d
---- binutils-2.24.orig/gas/testsuite/gas/nds32/usr-spe-reg.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/usr-spe-reg.d 2016-06-30 21:26:12.761897313 +0200
-@@ -0,0 +1,29 @@
-+#objdump: -d --prefix-addresses
-+#name: nds32 usr-spe-reg instructions
-+#as:
-+
-+# Test user specail register instructions
-+
-+.*: file format .*
-+
-+Disassembly of section .text:
-+0+0000 <[^>]*> mfusr \$r0,\$d0.lo
-+0+0004 <[^>]*> mfusr \$r0,\$d0.hi
-+0+0008 <[^>]*> mfusr \$r0,\$d1.lo
-+0+000c <[^>]*> mfusr \$r0,\$d1.hi
-+0+0010 <[^>]*> mfusr \$r0,\$pc
-+0+0014 <[^>]*> mfusr \$r0,\$dma_cfg
-+0+0018 <[^>]*> mfusr \$r0,\$dma_gcsw
-+0+001c <[^>]*> mfusr \$r0,\$dma_chnsel
-+0+0020 <[^>]*> mfusr \$r0,\$dma_act
-+0+0024 <[^>]*> mfusr \$r0,\$dma_setup
-+0+0028 <[^>]*> mfusr \$r0,\$dma_isaddr
-+0+002c <[^>]*> mfusr \$r0,\$dma_esaddr
-+0+0030 <[^>]*> mfusr \$r0,\$dma_tcnt
-+0+0034 <[^>]*> mfusr \$r0,\$dma_status
-+0+0038 <[^>]*> mfusr \$r0,\$dma_2dset
-+0+003c <[^>]*> mfusr \$r0,\$dma_2dsctl
-+0+0040 <[^>]*> mfusr \$r0,\$pfmc0
-+0+0044 <[^>]*> mfusr \$r0,\$pfmc1
-+0+0048 <[^>]*> mfusr \$r0,\$pfmc2
-+0+004c <[^>]*> mfusr \$r0,\$pfm_ctl
-diff -Nur binutils-2.24.orig/gas/testsuite/gas/nds32/usr-spe-reg.s binutils-2.24/gas/testsuite/gas/nds32/usr-spe-reg.s
---- binutils-2.24.orig/gas/testsuite/gas/nds32/usr-spe-reg.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gas/testsuite/gas/nds32/usr-spe-reg.s 2016-06-30 21:26:12.761897313 +0200
-@@ -0,0 +1,21 @@
-+foo:
-+ mfusr $r0, d0.lo
-+ mfusr $r0, d0.hi
-+ mfusr $r0, d1.lo
-+ mfusr $r0, d1.hi
-+ mfusr $r0, $pc
-+ mfusr $r0, $DMA_CFG
-+ mfusr $r0, $DMA_GCSW
-+ mfusr $r0, $DMA_CHNSEL
-+ mfusr $r0, $DMA_ACT
-+ mfusr $r0, $DMA_SETUP
-+ mfusr $r0, $DMA_ISADDR
-+ mfusr $r0, $DMA_ESADDR
-+ mfusr $r0, $DMA_TCNT
-+ mfusr $r0, $DMA_STATUS
-+ mfusr $r0, $DMA_2DSET
-+ mfusr $r0, $DMA_2DSCTL
-+ mfusr $r0, $PFMC0
-+ mfusr $r0, $PFMC1
-+ mfusr $r0, $PFMC2
-+ mfusr $r0, $PFM_CTL
-diff -Nur binutils-2.24.orig/gas/write.c binutils-2.24/gas/write.c
---- binutils-2.24.orig/gas/write.c 2013-11-04 16:33:38.000000000 +0100
-+++ binutils-2.24/gas/write.c 2016-06-30 21:26:12.761897313 +0200
-@@ -2292,7 +2292,7 @@
- relax_addressT mask;
- relax_addressT new_address;
-
-- mask = ~((~0) << alignment);
-+ mask = ~((relax_addressT) ~0 << alignment);
- new_address = (address + mask) & (~mask);
- #ifdef LINKER_RELAXING_SHRINKS_ONLY
- if (linkrelax)
-diff -Nur binutils-2.24.orig/gprof/bsd_callg_bl.c binutils-2.24/gprof/bsd_callg_bl.c
---- binutils-2.24.orig/gprof/bsd_callg_bl.c 2013-11-18 09:49:29.000000000 +0100
-+++ binutils-2.24/gprof/bsd_callg_bl.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,125 +0,0 @@
--/* ==> Do not modify this file!! It is created automatically
-- from bsd_callg_bl.m using the gen-c-prog.awk script. <== */
--
--#include <stdio.h>
--#include "ansidecl.h"
--
--void bsd_callg_blurb (FILE *);
--void
--bsd_callg_blurb (file)
-- FILE *file;
--{
-- fputs ("\n", file);
-- fputs ("\n", file);
-- fputs ("\n", file);
-- fputs ("call graph profile:\n", file);
-- fputs (" The sum of self and descendents is the major sort\n", file);
-- fputs (" for this listing.\n", file);
-- fputs ("\n", file);
-- fputs (" function entries:\n", file);
-- fputs ("\n", file);
-- fputs ("index the index of the function in the call graph\n", file);
-- fputs (" listing, as an aid to locating it (see below).\n", file);
-- fputs ("\n", file);
-- fputs ("%time the percentage of the total time of the program\n", file);
-- fputs (" accounted for by this function and its\n", file);
-- fputs (" descendents.\n", file);
-- fputs ("\n", file);
-- fputs ("self the number of seconds spent in this function\n", file);
-- fputs (" itself.\n", file);
-- fputs ("\n", file);
-- fputs ("descendents\n", file);
-- fputs (" the number of seconds spent in the descendents of\n", file);
-- fputs (" this function on behalf of this function.\n", file);
-- fputs ("\n", file);
-- fputs ("called the number of times this function is called (other\n", file);
-- fputs (" than recursive calls).\n", file);
-- fputs ("\n", file);
-- fputs ("self the number of times this function calls itself\n", file);
-- fputs (" recursively.\n", file);
-- fputs ("\n", file);
-- fputs ("name the name of the function, with an indication of\n", file);
-- fputs (" its membership in a cycle, if any.\n", file);
-- fputs ("\n", file);
-- fputs ("index the index of the function in the call graph\n", file);
-- fputs (" listing, as an aid to locating it.\n", file);
-- fputs ("\n", file);
-- fputs ("\n", file);
-- fputs ("\n", file);
-- fputs (" parent listings:\n", file);
-- fputs ("\n", file);
-- fputs ("self* the number of seconds of this function's self time\n", file);
-- fputs (" which is due to calls from this parent.\n", file);
-- fputs ("\n", file);
-- fputs ("descendents*\n", file);
-- fputs (" the number of seconds of this function's\n", file);
-- fputs (" descendent time which is due to calls from this\n", file);
-- fputs (" parent.\n", file);
-- fputs ("\n", file);
-- fputs ("called** the number of times this function is called by\n", file);
-- fputs (" this parent. This is the numerator of the\n", file);
-- fputs (" fraction which divides up the function's time to\n", file);
-- fputs (" its parents.\n", file);
-- fputs ("\n", file);
-- fputs ("total* the number of times this function was called by\n", file);
-- fputs (" all of its parents. This is the denominator of\n", file);
-- fputs (" the propagation fraction.\n", file);
-- fputs ("\n", file);
-- fputs ("parents the name of this parent, with an indication of the\n", file);
-- fputs (" parent's membership in a cycle, if any.\n", file);
-- fputs ("\n", file);
-- fputs ("index the index of this parent in the call graph\n", file);
-- fputs (" listing, as an aid in locating it.\n", file);
-- fputs ("\n", file);
-- fputs ("\n", file);
-- fputs ("\n", file);
-- fputs (" children listings:\n", file);
-- fputs ("\n", file);
-- fputs ("self* the number of seconds of this child's self time\n", file);
-- fputs (" which is due to being called by this function.\n", file);
-- fputs ("\n", file);
-- fputs ("descendent*\n", file);
-- fputs (" the number of seconds of this child's descendent's\n", file);
-- fputs (" time which is due to being called by this\n", file);
-- fputs (" function.\n", file);
-- fputs ("\n", file);
-- fputs ("called** the number of times this child is called by this\n", file);
-- fputs (" function. This is the numerator of the\n", file);
-- fputs (" propagation fraction for this child.\n", file);
-- fputs ("\n", file);
-- fputs ("total* the number of times this child is called by all\n", file);
-- fputs (" functions. This is the denominator of the\n", file);
-- fputs (" propagation fraction.\n", file);
-- fputs ("\n", file);
-- fputs ("children the name of this child, and an indication of its\n", file);
-- fputs (" membership in a cycle, if any.\n", file);
-- fputs ("\n", file);
-- fputs ("index the index of this child in the call graph listing,\n", file);
-- fputs (" as an aid to locating it.\n", file);
-- fputs ("\n", file);
-- fputs ("\n", file);
-- fputs ("\n", file);
-- fputs (" * these fields are omitted for parents (or\n", file);
-- fputs (" children) in the same cycle as the function. If\n", file);
-- fputs (" the function (or child) is a member of a cycle,\n", file);
-- fputs (" the propagated times and propagation denominator\n", file);
-- fputs (" represent the self time and descendent time of the\n", file);
-- fputs (" cycle as a whole.\n", file);
-- fputs ("\n", file);
-- fputs (" ** static-only parents and children are indicated\n", file);
-- fputs (" by a call count of 0.\n", file);
-- fputs ("\n", file);
-- fputs ("\n", file);
-- fputs ("\n", file);
-- fputs (" cycle listings:\n", file);
-- fputs (" the cycle as a whole is listed with the same\n", file);
-- fputs (" fields as a function entry. Below it are listed\n", file);
-- fputs (" the members of the cycle, and their contributions\n", file);
-- fputs (" to the time and call counts of the cycle.\n", file);
-- fputs (" \n", file);
-- fputs ("Copyright (C) 2012 Free Software Foundation, Inc.\n", file);
-- fputs ("\n", file);
-- fputs ("Copying and distribution of this file, with or without modification,\n", file);
-- fputs ("are permitted in any medium without royalty provided the copyright\n", file);
-- fputs ("notice and this notice are preserved.\n", file);
--}
-diff -Nur binutils-2.24.orig/gprof/call_graph.c binutils-2.24/gprof/call_graph.c
---- binutils-2.24.orig/gprof/call_graph.c 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/gprof/call_graph.c 2016-06-30 21:26:12.765897469 +0200
-@@ -30,6 +30,56 @@
- #include "gmon_out.h"
- #include "sym_ids.h"
-
-+// ============================================================================
-+// tl_cg_tally
-+//
-+// This function increments arc call count when call and updates arc time
-+// counts when return.
-+// ============================================================================
-+void
-+tl_cg_tally (bfd_vma from_pc,
-+ bfd_vma self_pc,
-+ unsigned int count, // 0 when return and 1 when call
-+ unsigned int icnt, // 0 when call
-+ unsigned int ccnt) // 0 when call
-+{ Sym *parent;
-+ Sym *child;
-+
-+ parent = sym_lookup (&symtab, from_pc);
-+ child = sym_lookup (&symtab, self_pc);
-+
-+ if (child == NULL || parent == NULL)
-+ return;
-+
-+ // If we're doing line-by-line profiling, both the parent and the
-+ // child will probably point to line symbols instead of function
-+ // symbols. For the parent this is fine, since this identifies the
-+ // line number in the calling routing, but the child should always
-+ // point to a function entry point, so we back up in the symbol
-+ // table until we find it.
-+ // For normal profiling, is_func will be set on all symbols, so this
-+ // code will do nothing.
-+ while (child >= symtab.base && ! child->is_func)
-+ --child;
-+
-+ if (child < symtab.base)
-+ return;
-+
-+ // Keep arc if it is on INCL_ARCS table or if the INCL_ARCS table
-+ // is empty and it is not in the EXCL_ARCS table.
-+ if (sym_id_arc_is_present (&syms[INCL_ARCS], parent, child)
-+ ||(syms[INCL_ARCS].len == 0
-+ &&!sym_id_arc_is_present (&syms[EXCL_ARCS], parent, child)))
-+ { // do it once when count==1 (when call)
-+ // but not when count==0 (when return)
-+ child->ncalls+=count;
-+ DBG (TALLYDEBUG,
-+ printf (_("[tl_cg_tally] arc from %s to %s traversed instruction count=%u and cycle count=%u\n"),
-+ parent->name, child->name, icnt, ccnt));
-+ tl_arc_add (parent, child, count, icnt, ccnt);
-+ }
-+} // tl_cg_tally
-+
- void
- cg_tally (bfd_vma from_pc, bfd_vma self_pc, unsigned long count)
- {
-diff -Nur binutils-2.24.orig/gprof/call_graph.h binutils-2.24/gprof/call_graph.h
---- binutils-2.24.orig/gprof/call_graph.h 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/gprof/call_graph.h 2016-06-30 21:26:12.765897469 +0200
-@@ -22,6 +22,12 @@
- #ifndef call_graph_h
- #define call_graph_h
-
-+void
-+tl_cg_tally (bfd_vma from_pc,
-+ bfd_vma self_pc,
-+ unsigned int count, // 0 when return and 1 when call
-+ unsigned int icnt, // 0 when call
-+ unsigned int ccnt); // 0 when call
- extern void cg_tally (bfd_vma, bfd_vma, unsigned long);
- extern void cg_read_rec (FILE *, const char *);
- extern void cg_write_arcs (FILE *, const char *);
-diff -Nur binutils-2.24.orig/gprof/cg_arcs.c binutils-2.24/gprof/cg_arcs.c
---- binutils-2.24.orig/gprof/cg_arcs.c 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/gprof/cg_arcs.c 2016-06-30 21:26:12.765897469 +0200
-@@ -51,6 +51,260 @@
- Arc **arcs;
- unsigned int numarcs;
-
-+
-+// ----------------------------------------------------------------------------
-+// tl_propagate_time
-+// ----------------------------------------------------------------------------
-+static void
-+tl_propagate_time (Sym *parent)
-+{ Arc *arc;
-+ Sym *child;
-+ long long share_insn, prop_share_insn;
-+ long long share_cycle, prop_share_cycle;
-+
-+ if (parent->cg.prop.fract == 0.0)
-+ return;
-+
-+ // gather time from children of this parent:
-+ for (arc = parent->cg.children; arc; arc = arc->next_child)
-+ { child = arc->child;
-+ if (arc->count == 0 || child == parent || child->cg.prop.fract == 0)
-+ continue;
-+
-+ if (child->cg.cyc.head != child)
-+ { if (parent->cg.cyc.num == child->cg.cyc.num)
-+ continue;
-+
-+ if (parent->cg.top_order <= child->cg.top_order)
-+ fprintf (stderr, "[tl_propagate_time] toporder botches\n");
-+ child = child->cg.cyc.head;
-+ } else
-+ { if (parent->cg.top_order <= child->cg.top_order)
-+ { fprintf (stderr, "[tl_propagate_time] toporder botches\n");
-+ continue;
-+ }
-+ }
-+
-+ if (child->ncalls == 0)
-+ continue;
-+
-+ // distribute time for this arc:
-+ arc->total_insn_cnt = child->hist.total_insn_cnt * (((double) arc->count)
-+ / ((double) child->ncalls));
-+ arc->total_cycle_cnt = child->hist.total_cycle_cnt * (((double) arc->count)
-+ / ((double) child->ncalls));
-+ arc->child_insn_cnt = child->cg.child_insn_cnt
-+ * (((double) arc->count) / ((double) child->ncalls));
-+ arc->child_cycle_cnt = child->cg.child_cycle_cnt
-+ * (((double) arc->count) / ((double) child->ncalls));
-+ share_insn = arc->total_insn_cnt + arc->child_insn_cnt;
-+ share_cycle = arc->total_cycle_cnt + arc->child_cycle_cnt;
-+ parent->cg.child_insn_cnt += share_insn;
-+ parent->cg.child_cycle_cnt += share_cycle;
-+
-+ // (1 - cg.prop.fract) gets lost along the way:
-+ prop_share_insn = parent->cg.prop.fract * share_insn;
-+ prop_share_cycle = parent->cg.prop.fract * share_cycle;
-+
-+ // fix things for printing:
-+ parent->cg.prop.child_insn_cnt += prop_share_insn;
-+ parent->cg.prop.child_cycle_cnt += prop_share_cycle;
-+ arc->total_insn_cnt *= parent->cg.prop.fract;
-+ arc->total_cycle_cnt *= parent->cg.prop.fract;
-+ arc->child_insn_cnt *= parent->cg.prop.fract;
-+ arc->child_cycle_cnt *= parent->cg.prop.fract;
-+
-+ // add this share to the parent's cycle header, if any:
-+ if (parent->cg.cyc.head != parent)
-+ { parent->cg.cyc.head->cg.child_insn_cnt += share_insn;
-+ parent->cg.cyc.head->cg.child_cycle_cnt += share_cycle;
-+ parent->cg.cyc.head->cg.prop.child_insn_cnt += prop_share_insn;
-+ parent->cg.cyc.head->cg.prop.child_cycle_cnt += prop_share_cycle;
-+ }
-+ DBG (PROPDEBUG,
-+ printf ("[tl_propagate_time] child \t");
-+ print_name (child);
-+ printf (" with %llu/%llu/%llu %llu %lu/%lu\n",
-+ child->hist.total_insn_cnt, child->hist.total_cycle_cnt,
-+ child->cg.child_insn_cnt, child->cg.child_cycle_cnt,
-+ arc->count, child->ncalls);
-+ printf ("[tl_propagate_time] parent\t");
-+ print_name (parent);
-+ printf ("\n[tl_propagate_time] share %llu/%llu\n",
-+ share_insn, share_cycle));
-+ }
-+} // tl_propagate_time
-+
-+// ----------------------------------------------------------------------------
-+// tl_cycle_time
-+//
-+// Compute the time of a cycle as the sum of the times of all its members.
-+// ----------------------------------------------------------------------------
-+static void
-+tl_cycle_time (void)
-+{ Sym *member, *cyc;
-+
-+ for (cyc = &cycle_header[1]; cyc <= &cycle_header[num_cycles]; ++cyc)
-+ { for (member = cyc->cg.cyc.next; member; member = member->cg.cyc.next)
-+ { if (member->cg.prop.fract == 0.0)
-+ { // All members have the same propfraction except those
-+ // that were excluded with -E.
-+ continue;
-+ }
-+ cyc->hist.total_insn_cnt += member->hist.total_insn_cnt;
-+ cyc->hist.total_cycle_cnt += member->hist.total_cycle_cnt;
-+ }
-+ cyc->cg.prop.self_insn_cnt = cyc->cg.prop.fract * cyc->hist.total_insn_cnt;
-+ cyc->cg.prop.self_cycle_cnt = cyc->cg.prop.fract * cyc->hist.total_cycle_cnt;
-+ }
-+} // tl_cycle_time
-+// ----------------------------------------------------------------------------
-+// In one top-to-bottom pass over the topologically sorted symbols
-+// propagate:
-+// cg.print_flag as the union of parents' print_flags
-+// propfraction as the sum of fractional parents' propfractions
-+// and while we're here, sum time for functions.
-+// ----------------------------------------------------------------------------
-+static void
-+tl_propagate_flags (Sym **symbols)
-+{ int index;
-+ Sym *old_head, *child;
-+
-+ old_head = 0;
-+ for (index = symtab.len - 1; index >= 0; --index)
-+ {
-+ child = symbols[index];
-+ // If we haven't done this function or cycle, inherit things
-+ // from parent. This way, we are linear in the number of arcs
-+ // since we do all members of a cycle (and the cycle itself)
-+ // as we hit the first member of the cycle.
-+ if (child->cg.cyc.head != old_head)
-+ {
-+ old_head = child->cg.cyc.head;
-+ inherit_flags (child);
-+ }
-+ DBG (PROPDEBUG,
-+ printf ("[tl_prop_flags] ");
-+ print_name (child);
-+ printf ("inherits print-flag %d and prop-fract %f\n",
-+ child->cg.print_flag, child->cg.prop.fract));
-+ if (!child->cg.print_flag)
-+ {
-+ // Printflag is off. It gets turned on by being in the
-+ // INCL_GRAPH table, or there being an empty INCL_GRAPH
-+ // table and not being in the EXCL_GRAPH table.
-+ if (sym_lookup (&syms[INCL_GRAPH], child->addr)
-+ ||(syms[INCL_GRAPH].len == 0
-+ &&!sym_lookup (&syms[EXCL_GRAPH], child->addr)))
-+ {
-+ child->cg.print_flag = TRUE;
-+ }
-+ } else
-+ { // This function has printing parents: maybe someone wants
-+ // to shut it up by putting it in the EXCL_GRAPH table.
-+ // (But favor INCL_GRAPH over EXCL_GRAPH.)
-+ if (!sym_lookup (&syms[INCL_GRAPH], child->addr)
-+ &&sym_lookup (&syms[EXCL_GRAPH], child->addr))
-+ {
-+ child->cg.print_flag = FALSE;
-+ }
-+ }
-+ if (child->cg.prop.fract == 0.0)
-+ { // No parents to pass time to. Collect time from children
-+ // if its in the INCL_TIME table, or there is an empty
-+ // INCL_TIME table and its not in the EXCL_TIME table.
-+ if (sym_lookup (&syms[INCL_TIME], child->addr)
-+ ||(syms[INCL_TIME].len == 0
-+ &&!sym_lookup (&syms[EXCL_TIME], child->addr)))
-+ {
-+ child->cg.prop.fract = 1.0;
-+ }
-+ } else
-+ { // It has parents to pass time to, but maybe someone wants
-+ // to shut it up by puttting it in the EXCL_TIME table.
-+ // (But favor being in INCL_TIME tabe over being in
-+ // EXCL_TIME table.)
-+ if (!sym_lookup (&syms[INCL_TIME], child->addr)
-+ &&sym_lookup (&syms[EXCL_TIME], child->addr))
-+ {
-+ child->cg.prop.fract = 0.0;
-+ }
-+ }
-+ child->cg.prop.self_insn_cnt = child->hist.total_insn_cnt * child->cg.prop.fract;
-+ child->cg.prop.self_cycle_cnt = child->hist.total_cycle_cnt * child->cg.prop.fract;
-+ print_insn_cnt += child->cg.prop.self_insn_cnt;
-+ print_cycle_cnt += child->cg.prop.self_cycle_cnt;
-+ DBG (PROPDEBUG,
-+ printf ("[tl_prop_flags] ");
-+ print_name (child);
-+ printf (" ends up with printflag %d and prop-fract %f\n",
-+ child->cg.print_flag, child->cg.prop.fract);
-+ printf ("[tl_prop_flags] instruction count %llu propself %llu print %llu\n",
-+ child->hist.total_insn_cnt, child->cg.prop.self_insn_cnt, print_insn_cnt);
-+ printf ("[tl_prop_flags] cycle count %llu propself %llu print %llu\n",
-+ child->hist.total_cycle_cnt, child->cg.prop.self_cycle_cnt, print_cycle_cnt));
-+ }
-+} // tl_propagate_time
-+// ----------------------------------------------------------------------------
-+// tl_comp_total
-+//
-+// Compare by decreasing propagated time. If times are equal, but one
-+// is a cycle header, say that's first (e.g. less, i.e. -1). If one's
-+// name doesn't have an underscore and the other does, say that one is
-+// first. All else being equal, compare by names.
-+// ----------------------------------------------------------------------------
-+static int
-+tl_cmp_total (const PTR lp, const PTR rp)
-+{ const Sym *left = *(const Sym **) lp;
-+ const Sym *right = *(const Sym **) rp;
-+ long long diff;
-+
-+ diff = (left->cg.prop.self_insn_cnt + left->cg.prop.child_insn_cnt)
-+ - (right->cg.prop.self_insn_cnt + right->cg.prop.child_insn_cnt);
-+ if (diff < 0)
-+ {
-+ return 1;
-+ }
-+ if (diff > 0)
-+ {
-+ return -1;
-+ }
-+ if (!left->name && left->cg.cyc.num != 0)
-+ {
-+ return -1;
-+ }
-+ if (!right->name && right->cg.cyc.num != 0)
-+ {
-+ return 1;
-+ }
-+ if (!left->name)
-+ {
-+ return -1;
-+ }
-+ if (!right->name)
-+ {
-+ return 1;
-+ }
-+ if (left->name[0] != '_' && right->name[0] == '_')
-+ {
-+ return -1;
-+ }
-+ if (left->name[0] == '_' && right->name[0] != '_')
-+ {
-+ return 1;
-+ }
-+ if (left->ncalls > right->ncalls)
-+ {
-+ return -1;
-+ }
-+ if (left->ncalls < right->ncalls)
-+ {
-+ return 1;
-+ }
-+
-+ return strcmp (left->name, right->name);
-+} // tl_cmp_total
-+
- /*
- * Return TRUE iff PARENT has an arc to covers the address
- * range covered by CHILD.
-@@ -81,6 +335,54 @@
- }
-
-
-+
-+// ----------------------------------------------------------------------------
-+// arc_add_shared
-+//
-+// Shared logic for arc_add and tl_arc_add.
-+// ----------------------------------------------------------------------------
-+static void
-+arc_add_shared (Arc *arc)
-+{ static unsigned int maxarcs = 0;
-+ Arc **newarcs;
-+
-+ // If this isn't an arc for a recursive call to parent, then add it
-+ // to the array of arcs.
-+ if (arc->parent != arc->child)
-+ { // If we've exhausted space in our current array, get a new one
-+ // and copy the contents. We might want to throttle the doubling
-+ // factor one day.
-+ if (numarcs == maxarcs)
-+ { // Determine how much space we want to allocate.
-+ if (maxarcs == 0)
-+ maxarcs = 1;
-+ maxarcs *= 2;
-+
-+ // Allocate the new array.
-+ newarcs = (Arc **)xmalloc(sizeof (Arc *) * maxarcs);
-+
-+ // Copy the old array's contents into the new array.
-+ memcpy (newarcs, arcs, numarcs * sizeof (Arc *));
-+
-+ // Free up the old array.
-+ free (arcs);
-+
-+ // And make the new array be the current array.
-+ arcs = newarcs;
-+ }
-+
-+ // Place this arc in the arc array.
-+ arcs[numarcs++] = arc;
-+ }
-+
-+ // prepend this child to the children of this parent:
-+ arc->next_child = arc->parent->cg.children;
-+ arc->parent->cg.children = arc;
-+
-+ // prepend this parent to the parents of this child:
-+ arc->next_parent = arc->child->cg.parents;
-+ arc->child->cg.parents = arc;
-+} // arc_add_shared
- /*
- * Add (or just increment) an arc:
- */
-@@ -149,6 +451,51 @@
- child->cg.parents = arc;
- }
-
-+// ============================================================================
-+// tl_arc_add
-+//
-+// Add (or just increment) an arc. This is done during a "call" action.
-+// ============================================================================
-+void
-+tl_arc_add (Sym *parent,
-+ Sym *child,
-+ unsigned int count, // 1 when call or 0 when return
-+ unsigned int icnt, // 0 when call
-+ unsigned int ccnt) // 0 when call
-+{ Arc *arc;
-+
-+ DBG (TALLYDEBUG, printf ("[tl_arc_add] arc from %s to %s\n",
-+ parent->name, child->name));
-+ arc = arc_lookup (parent, child);
-+ if (arc)
-+ { // when call, increment the call count
-+ // when return, update the time counts
-+ DBG (TALLYDEBUG, printf ("[tally] hit %lu ++\n",
-+ arc->count));
-+ if (count==0)
-+ { // update the time counts (count==0 must be true)
-+ arc->total_insn_cnt += icnt;
-+ arc->total_cycle_cnt += ccnt;
-+ } else
-+ arc->count ++; // increment call count (count==1, icnt==0,
-+ // and ccnt==0 must all be true)
-+ } else
-+ { // when happens when very first call
-+ arc = (Arc *) xmalloc (sizeof (*arc));
-+ memset (arc, 0, sizeof (*arc));
-+ arc->parent = parent;
-+ arc->child = child;
-+// arc->count = count;
-+ arc->count = 1; // count==1 must be true
-+// arc->total_insn_cnt = icnt;
-+ arc->total_insn_cnt = 0; // icnt==0 must be true
-+// arc->total_cycle_cnt = ccnt;
-+ arc->total_cycle_cnt = 0; // ccnt==0 must be true
-+
-+ arc_add_shared(arc);
-+ }
-+} // tl_arc_add
-+
-
- static int
- cmp_topo (const PTR lp, const PTR rp)
-@@ -685,3 +1032,116 @@
-
- return time_sorted_syms;
- }
-+
-+// ============================================================================
-+// tl_cg_assemble
-+//
-+// Topologically sort the graph (collapsing cycles), and propagates
-+// time bottom up and flags top down.
-+// ============================================================================
-+Sym **
-+tl_cg_assemble (void)
-+{ Sym *parent, **time_sorted_syms, **top_sorted_syms;
-+ unsigned int index;
-+ Arc *arc;
-+
-+#ifdef TRACE_ARCS
-+ trace_arcs();
-+#endif // TRACE_ARCS
-+#ifdef TRACE_SYMS
-+ trace_syms();
-+#endif // TRACE_SYMS
-+
-+ // initialize various things:
-+ // zero out child times.
-+ // count self-recursive calls.
-+ // indicate that nothing is on cycles.
-+ for (parent = symtab.base; parent < symtab.limit; parent++)
-+ { parent->cg.child_insn_cnt = 0;
-+ parent->cg.child_cycle_cnt = 0;
-+ arc = arc_lookup (parent, parent);
-+ if (arc && parent == arc->child)
-+ { parent->ncalls -= arc->count;
-+ parent->cg.self_calls = arc->count;
-+ } else
-+ { parent->cg.self_calls = 0;
-+ }
-+ parent->cg.prop.fract = 0.0;
-+ parent->cg.prop.self_insn_cnt = 0;
-+ parent->cg.prop.self_cycle_cnt = 0;
-+ parent->cg.prop.child_insn_cnt = 0;
-+ parent->cg.prop.child_cycle_cnt = 0;
-+ parent->cg.print_flag = FALSE;
-+ parent->cg.top_order = DFN_NAN;
-+ parent->cg.cyc.num = 0;
-+ parent->cg.cyc.head = parent;
-+ parent->cg.cyc.next = 0;
-+ if (ignore_direct_calls)
-+ find_call (parent, parent->addr, (parent + 1)->addr);
-+ }
-+
-+ // Topologically order things. If any node is unnumbered, number
-+ // it and any of its descendents.
-+ for (parent = symtab.base; parent < symtab.limit; parent++)
-+ { if (parent->cg.top_order == DFN_NAN)
-+ cg_dfn (parent);
-+ }
-+
-+ // link together nodes on the same cycle:
-+ cycle_link ();
-+
-+ // sort the symbol table in reverse topological order:
-+ top_sorted_syms = (Sym **) xmalloc (symtab.len * sizeof (Sym *));
-+ for (index = 0; index < symtab.len; ++index)
-+ { top_sorted_syms[index] = &symtab.base[index];
-+ }
-+ qsort (top_sorted_syms, symtab.len, sizeof (Sym *), cmp_topo);
-+ DBG (DFNDEBUG,
-+ printf ("[tl_cg_assemble] topological sort listing\n");
-+ for (index = 0; index < symtab.len; ++index)
-+ { printf ("[tl_cg_assemble] ");
-+ printf ("%d:", top_sorted_syms[index]->cg.top_order);
-+ print_name (top_sorted_syms[index]);
-+ printf ("\n");
-+ }
-+ );
-+
-+ // Starting from the topological top, propagate print flags to
-+ // children. also, calculate propagation fractions. this happens
-+ // before time propagation since time propagation uses the
-+ // fractions.
-+ tl_propagate_flags (top_sorted_syms);
-+
-+ // Starting from the topological bottom, propogate children times
-+ // up to parents.
-+ tl_cycle_time ();
-+ for (index = 0; index < symtab.len; ++index)
-+ { tl_propagate_time (top_sorted_syms[index]);
-+ }
-+ free (top_sorted_syms);
-+
-+ // Now, sort by CG.PROP.SELF + CG.PROP.CHILD. Sorting both the regular
-+ // function names and cycle headers.
-+ time_sorted_syms = (Sym **) xmalloc ((symtab.len + num_cycles) * sizeof (Sym *));
-+ for (index = 0; index < symtab.len; index++)
-+ { time_sorted_syms[index] = &symtab.base[index];
-+ }
-+ for (index = 1; index <= num_cycles; index++)
-+ { time_sorted_syms[symtab.len + index - 1] = &cycle_header[index];
-+ }
-+ qsort (time_sorted_syms, symtab.len + num_cycles, sizeof (Sym *),
-+ tl_cmp_total);
-+ for (index = 0; index < symtab.len + num_cycles; index++)
-+ { time_sorted_syms[index]->cg.index = index + 1;
-+ }
-+
-+#ifdef TRACE_ARCS
-+ trace_arcs();
-+#endif // TRACE_ARCS
-+#ifdef TRACE_SYMS
-+ trace_syms();
-+#endif // TRACE_SYMS
-+
-+ return time_sorted_syms;
-+} // tl_cg_assemble
-+
-diff -Nur binutils-2.24.orig/gprof/cg_arcs.h binutils-2.24/gprof/cg_arcs.h
---- binutils-2.24.orig/gprof/cg_arcs.h 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/gprof/cg_arcs.h 2016-06-30 21:26:12.765897469 +0200
-@@ -37,6 +37,12 @@
- struct arc *next_parent; /* next parent of CHILD */
- struct arc *next_child; /* next child of PARENT */
- int has_been_placed; /* have this arc's functions been placed? */
-+
-+ // for timeline - time/child-time inherited along arc
-+ unsigned long long total_insn_cnt;
-+ unsigned long long total_cycle_cnt;
-+ unsigned long long child_insn_cnt;
-+ unsigned long long child_cycle_cnt;
- }
- Arc;
-
-@@ -44,8 +50,14 @@
- extern Sym *cycle_header; /* cycle headers */
-
- extern void arc_add (Sym * parent, Sym * child, unsigned long count);
-+extern void tl_arc_add (Sym *parent,
-+ Sym *child,
-+ unsigned int count, // 1 when call or 0 when return
-+ unsigned int icnt, // 0 when call
-+ unsigned int ccnt); // 0 when call
- extern Arc *arc_lookup (Sym * parent, Sym * child);
- extern Sym **cg_assemble (void);
-+extern Sym **tl_cg_assemble (void);
- extern Arc **arcs;
- extern unsigned int numarcs;
-
-diff -Nur binutils-2.24.orig/gprof/cg_print.c binutils-2.24/gprof/cg_print.c
---- binutils-2.24.orig/gprof/cg_print.c 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/gprof/cg_print.c 2016-06-30 21:26:12.765897469 +0200
-@@ -36,16 +36,18 @@
- #define LESSTHAN -1
- #define EQUALTO 0
- #define GREATERTHAN 1
-+typedef int (*symcmpfunc)(Sym*,Sym*);
-+typedef int (*arccmpfunc)(Arc*,Arc*);
-
- static void print_header (void);
- static void print_cycle (Sym *);
- static int cmp_member (Sym *, Sym *);
--static void sort_members (Sym *);
-+static void sort_members (Sym *,symcmpfunc);
- static void print_members (Sym *);
- static int cmp_arc (Arc *, Arc *);
--static void sort_parents (Sym *);
-+static void sort_parents (Sym *,arccmpfunc);
- static void print_parents (Sym *);
--static void sort_children (Sym *);
-+static void sort_children (Sym *,arccmpfunc);
- static void print_children (Sym *);
- static void print_line (Sym *);
- static int cmp_name (const PTR, const PTR);
-@@ -59,7 +61,8 @@
- extern void fsf_callg_blurb (FILE * fp);
-
- double print_time = 0.0;
--
-+unsigned long long print_insn_cnt=0;
-+unsigned long long print_cycle_cnt=0;
-
- static void
- print_header ()
-@@ -110,7 +113,34 @@
- printf (_("index %% time self children called name\n"));
- }
- }
-+// ----------------------------------------------------------------------------
-+// tl_print_header
-+// ----------------------------------------------------------------------------
-+static void
-+tl_print_header(void)
-+{ if (first_output)
-+ first_output = FALSE;
-+ else
-+ printf ("\f\n");
-+
-+ if (print_descriptions)
-+ printf (_("\t\t Call graph (explanation follows)\n\n"));
-+ else
-+ printf (_("\t\t\tCall graph\n\n"));
-+
-+ if (print_insn_cnt > 0)
-+ printf (_("for %llu instructions and %llu cycles\n\n"),
-+ print_insn_cnt, print_cycle_cnt);
-+ else
-+ {
-+ printf (_(" no time propagated\n\n"));
-+
-+ // This doesn't hurt, since all the numerators will be 0.
-+ print_insn_cnt = 1;
-+ }
-
-+ printf (_("index %% instr/cycle self instr/cycle children instr/cycle called name\n"));
-+} // tl_print_header
- /* Print a cycle header. */
-
- static void
-@@ -133,6 +163,31 @@
- printf (_(" <cycle %d as a whole> [%d]\n"), cyc->cg.cyc.num, cyc->cg.index);
- }
-
-+// ----------------------------------------------------------------------------
-+// tl_print_cycle
-+//
-+// This function prints a cycle header.
-+// ----------------------------------------------------------------------------
-+static void
-+tl_print_cycle (Sym *cyc)
-+{ char buf[BUFSIZ];
-+
-+ sprintf (buf, "[%d]", cyc->cg.index);
-+ printf ("%-6.6s %5.1f %5.1f %10llu %10llu %10llu %10llu %7lu", buf,
-+ 100.0 * (cyc->cg.prop.self_insn_cnt + cyc->cg.prop.child_insn_cnt) / print_insn_cnt,
-+ 100.0 * (cyc->cg.prop.self_cycle_cnt + cyc->cg.prop.child_cycle_cnt) / print_cycle_cnt,
-+ cyc->cg.prop.self_insn_cnt, cyc->cg.prop.self_cycle_cnt,
-+ cyc->cg.prop.child_cycle_cnt, cyc->cg.prop.child_cycle_cnt,
-+ cyc->ncalls);
-+
-+ if (cyc->cg.self_calls != 0)
-+ printf ("+%-7lu", cyc->cg.self_calls);
-+ else
-+ printf (" %7.7s","");
-+
-+ printf (_(" <cycle %d as a whole> [%d]\n"), cyc->cg.cyc.num, cyc->cg.index);
-+} // tl_print_cycle
-+
- /* Compare LEFT and RIGHT membmer. Major comparison key is
- CG.PROP.SELF+CG.PROP.CHILD, secondary key is NCALLS+CG.SELF_CALLS. */
-
-@@ -159,10 +214,40 @@
- return EQUALTO;
- }
-
-+// ----------------------------------------------------------------------------
-+// tl_cmp_member
-+//
-+// This function compares LEFT and RIGHT membmer. Major comparison key is
-+// CG.PROP.SELF_INSN_CNT+CG.PROP.CHILD_INSN_CNT, secondary key is
-+// NCALLS+CG.SELF_CALLS.
-+// ----------------------------------------------------------------------------
-+static int
-+tl_cmp_member(Sym *left,
-+ Sym *right)
-+{ unsigned long long left_icnt = left->cg.prop.self_insn_cnt + left->cg.prop.child_insn_cnt;
-+ unsigned long long right_icnt = right->cg.prop.self_insn_cnt + right->cg.prop.child_insn_cnt;
-+ unsigned long left_calls = left->ncalls + left->cg.self_calls;
-+ unsigned long right_calls = right->ncalls + right->cg.self_calls;
-+
-+ if (left_icnt > right_icnt)
-+ return GREATERTHAN;
-+
-+ if (left_icnt < right_icnt)
-+ return LESSTHAN;
-+
-+ if (left_calls > right_calls)
-+ return GREATERTHAN;
-+
-+ if (left_calls < right_calls)
-+ return LESSTHAN;
-+
-+ return EQUALTO;
-+} // tl_cmp_member
- /* Sort members of a cycle. */
-
- static void
--sort_members (Sym *cyc)
-+sort_members (Sym *cyc,
-+ symcmpfunc cmpf)
- {
- Sym *todo, *doing, *prev;
-
-@@ -177,7 +262,7 @@
-
- for (prev = cyc; prev->cg.cyc.next; prev = prev->cg.cyc.next)
- {
-- if (cmp_member (doing, prev->cg.cyc.next) == GREATERTHAN)
-+ if ((*cmpf)(doing, prev->cg.cyc.next) == GREATERTHAN)
- break;
- }
-
-@@ -193,7 +278,7 @@
- {
- Sym *member;
-
-- sort_members (cyc);
-+ sort_members (cyc,&cmp_member);
-
- for (member = cyc->cg.cyc.next; member; member = member->cg.cyc.next)
- {
-@@ -213,6 +298,34 @@
- printf ("\n");
- }
- }
-+// ----------------------------------------------------------------------------
-+// tl_print_members
-+//
-+// This function prints the members of a cycle.
-+// ----------------------------------------------------------------------------
-+static void
-+tl_print_members(Sym *cyc)
-+{ Sym *member;
-+
-+ sort_members (cyc,&tl_cmp_member);
-+
-+ for (member = cyc->cg.cyc.next; member; member = member->cg.cyc.next)
-+ {
-+ printf ("%6.6s %5.5s %10llu %10llu %10llu %10llu %7lu",
-+ "", "", member->cg.prop.self_insn_cnt,
-+ member->cg.prop.self_cycle_cnt, member->cg.prop.child_insn_cnt,
-+ member->cg.prop.child_cycle_cnt, member->ncalls);
-+
-+ if (member->cg.self_calls != 0)
-+ printf ("+%-7lu", member->cg.self_calls);
-+ else
-+ printf (" %7.7s", "");
-+
-+ printf (" ");
-+ print_name (member);
-+ printf ("\n");
-+ }
-+} // tl_print_member
-
- /* Compare two arcs to/from the same child/parent.
- - if one arc is a self arc, it's least.
-@@ -308,8 +421,96 @@
- }
-
-
-+
-+// ----------------------------------------------------------------------------
-+// tl_cmp_arc
-+//
-+// This function compares two arcs to/from the same child/parent.
-+// - if one arc is a self arc, it's least.
-+// - if one arc is within a cycle, it's less than.
-+// - if both arcs are within a cycle, compare arc counts.
-+// - if neither arc is within a cycle, compare with
-+// time + child_time as major key
-+// arc count as minor key.
-+// ----------------------------------------------------------------------------
-+static int
-+tl_cmp_arc(Arc *left,
-+ Arc *right)
-+{ Sym *left_parent = left->parent;
-+ Sym *left_child = left->child;
-+ Sym *right_parent = right->parent;
-+ Sym *right_child = right->child;
-+ double left_time, right_time;
-+
-+ DBG (TIMEDEBUG,
-+ printf ("[cmp_arc] ");
-+ print_name (left_parent);
-+ printf (" calls ");
-+ print_name (left_child);
-+ printf (" %f + %f %lu/%lu\n", left->time, left->child_time,
-+ left->count, left_child->ncalls);
-+ printf ("[cmp_arc] ");
-+ print_name (right_parent);
-+ printf (" calls ");
-+ print_name (right_child);
-+ printf (" %f + %f %lu/%lu\n", right->time, right->child_time,
-+ right->count, right_child->ncalls);
-+ printf ("\n");
-+ );
-+
-+ if (left_parent == left_child)
-+ return LESSTHAN; // Left is a self call.
-+
-+ if (right_parent == right_child)
-+ return GREATERTHAN; // Right is a self call.
-+
-+ if (left_parent->cg.cyc.num != 0 && left_child->cg.cyc.num != 0
-+ && left_parent->cg.cyc.num == left_child->cg.cyc.num)
-+ { // Left is a call within a cycle.
-+ if (right_parent->cg.cyc.num != 0 && right_child->cg.cyc.num != 0
-+ && right_parent->cg.cyc.num == right_child->cg.cyc.num)
-+ { // Right is a call within the cycle, too.
-+ if (left->count < right->count)
-+ return LESSTHAN;
-+
-+ if (left->count > right->count)
-+ return GREATERTHAN;
-+
-+ return EQUALTO;
-+ } else
-+ { // Right isn't a call within the cycle.
-+ return LESSTHAN;
-+ }
-+ } else
-+ { // Left isn't a call within a cycle.
-+ if (right_parent->cg.cyc.num != 0 && right_child->cg.cyc.num != 0
-+ && right_parent->cg.cyc.num == right_child->cg.cyc.num)
-+ { // Right is a call within a cycle.
-+ return GREATERTHAN;
-+ } else
-+ { // Neither is a call within a cycle.
-+ left_time = left->time + left->child_time;
-+ right_time = right->time + right->child_time;
-+
-+ if (left_time < right_time)
-+ return LESSTHAN;
-+
-+ if (left_time > right_time)
-+ return GREATERTHAN;
-+
-+ if (left->count < right->count)
-+ return LESSTHAN;
-+
-+ if (left->count > right->count)
-+ return GREATERTHAN;
-+
-+ return EQUALTO;
-+ }
-+ }
-+} // tl_cmp_arc
- static void
--sort_parents (Sym * child)
-+sort_parents (Sym * child,
-+ __attribute__((unused))arccmpfunc cmpf)
- {
- Arc *arc, *detached, sorted, *prev;
-
-@@ -362,7 +563,7 @@
- return;
- }
-
-- sort_parents (child);
-+ sort_parents (child,&cmp_arc);
-
- for (arc = child->cg.parents; arc; arc = arc->next_parent)
- {
-@@ -395,8 +596,54 @@
- }
-
-
-+
-+// ----------------------------------------------------------------------------
-+// tl_print_parents
-+// ----------------------------------------------------------------------------
- static void
--sort_children (Sym *parent)
-+tl_print_parents (Sym *child)
-+{ Sym *parent;
-+ Arc *arc;
-+ Sym *cycle_head;
-+
-+ if (child->cg.cyc.head != 0)
-+ cycle_head = child->cg.cyc.head;
-+ else
-+ cycle_head = child;
-+
-+ if (!child->cg.parents)
-+ {
-+ printf (_("%6.6s %5.5s %10.10s %10.10s %10.10s %10.10s <spontaneous>\n"),
-+ "", "", "", "", "", "");
-+ return;
-+ }
-+
-+ sort_parents (child,&tl_cmp_arc);
-+
-+ for (arc = child->cg.parents; arc; arc = arc->next_parent)
-+ {
-+ parent = arc->parent;
-+ if (child == parent || (child->cg.cyc.num != 0
-+ && parent->cg.cyc.num == child->cg.cyc.num))
-+ { // Selfcall or call among siblings.
-+ printf ("%6.6s %5.5s %10.10s %10.10s %10lu %10.10s ",
-+ "", "", "", "", arc->count, "");
-+ print_name (parent);
-+ printf ("\n");
-+ } else
-+ { // Regular parent of child.
-+ printf ("%6.6s %5.5s %10llu %10llu %10llu %10llu %7lu/%-7lu ",
-+ "", "", arc->total_insn_cnt, arc->total_cycle_cnt,
-+ arc->child_insn_cnt, arc->child_cycle_cnt,
-+ arc->count, cycle_head->ncalls);
-+ print_name (parent);
-+ printf ("\n");
-+ }
-+ }
-+} // tl_print_parents
-+static void
-+sort_children (Sym *parent,
-+ arccmpfunc cmpf)
- {
- Arc *arc, *detached, sorted, *prev;
-
-@@ -415,7 +662,7 @@
- /* Consider *arc as disconnected; insert it into sorted. */
- for (prev = &sorted; prev->next_child; prev = prev->next_child)
- {
-- if (cmp_arc (arc, prev->next_child) != LESSTHAN)
-+ if ((*cmpf)(arc, prev->next_child) != LESSTHAN)
- break;
- }
-
-@@ -434,7 +681,7 @@
- Sym *child;
- Arc *arc;
-
-- sort_children (parent);
-+ sort_children (parent,&cmp_arc);
- arc = parent->cg.children;
-
- for (arc = parent->cg.children; arc; arc = arc->next_child)
-@@ -465,6 +712,38 @@
- }
- }
- }
-+// ----------------------------------------------------------------------------
-+// tl_print_children
-+// ----------------------------------------------------------------------------
-+static void
-+tl_print_children(Sym *parent)
-+{ Sym *child;
-+ Arc *arc;
-+
-+ sort_children (parent,&tl_cmp_arc);
-+ arc = parent->cg.children;
-+
-+ for (arc = parent->cg.children; arc; arc = arc->next_child)
-+ {
-+ child = arc->child;
-+ if (child == parent || (child->cg.cyc.num != 0
-+ && child->cg.cyc.num == parent->cg.cyc.num))
-+ { // Self call or call to sibling.
-+ printf ("%6.6s %5.5s %10.10s %10.10s %10lu %10.10s ",
-+ "", "", "", "", arc->count, "");
-+ print_name (child);
-+ printf ("\n");
-+ } else
-+ { // Regular child of parent.
-+ printf ("%6.6s %5.5s %10llu %10llu %10llu %10llu %7lu/%-7lu ",
-+ "", "", arc->total_insn_cnt, arc->total_cycle_cnt,
-+ arc->child_insn_cnt, arc->child_cycle_cnt,
-+ arc->count, child->cg.cyc.head->ncalls);
-+ print_name (child);
-+ printf ("\n");
-+ }
-+ }
-+} // tl_print_child
-
-
- static void
-@@ -498,6 +777,36 @@
- }
-
-
-+// ----------------------------------------------------------------------------
-+// tl_print_line
-+// ----------------------------------------------------------------------------
-+static void
-+tl_print_line(Sym *np)
-+{ char buf[BUFSIZ];
-+
-+ sprintf (buf, "[%d]", np->cg.index);
-+ printf ("%-6.6s %5.1f %5.1f %10llu %10llu %10llu %10llu", buf,
-+ 100.0 * (np->cg.prop.self_insn_cnt + np->cg.prop.child_insn_cnt) / print_insn_cnt,
-+ 100.0 * (np->cg.prop.self_cycle_cnt + np->cg.prop.child_cycle_cnt) / print_cycle_cnt,
-+ np->cg.prop.self_insn_cnt, np->cg.prop.self_cycle_cnt,
-+ np->cg.prop.child_insn_cnt, np->cg.prop.child_cycle_cnt);
-+
-+ if ((np->ncalls + np->cg.self_calls) != 0)
-+ {
-+ printf (" %7lu", np->ncalls);
-+
-+ if (np->cg.self_calls != 0)
-+ printf ("+%-7lu ", np->cg.self_calls);
-+ else
-+ printf (" %7.7s ", "");
-+ } else
-+ {
-+ printf (" %7.7s %7.7s ", "", "");
-+ }
-+
-+ print_name (np);
-+ printf ("\n");
-+} // tl_print_line
- /* Print dynamic call graph. */
-
- void
-@@ -551,6 +860,50 @@
- }
-
-
-+
-+// ============================================================================
-+// tl_cg_print
-+//
-+// This function prints timeline based dynamic call graph.
-+// ============================================================================
-+void
-+tl_cg_print (Sym ** timesortsym)
-+{ unsigned int index;
-+ Sym *parent;
-+
-+ tl_print_header ();
-+
-+ for (index = 0; index < symtab.len + num_cycles; ++index)
-+ {
-+ parent = timesortsym[index];
-+
-+ if ((ignore_zeros && parent->ncalls == 0
-+ &&parent->cg.self_calls == 0
-+ &&parent->cg.prop.self_insn_cnt == 0
-+ &&parent->cg.prop.child_insn_cnt == 0)
-+ ||!parent->cg.print_flag
-+ ||(line_granularity && ! parent->is_func))
-+ continue;
-+
-+ if (!parent->name && parent->cg.cyc.num != 0)
-+ { // Cycle header.
-+ tl_print_cycle (parent);
-+ tl_print_members (parent);
-+ } else
-+ {
-+ tl_print_parents (parent);
-+ tl_print_line (parent);
-+ tl_print_children (parent);
-+ }
-+
-+ printf ("-----------------------------------------------\n");
-+ }
-+
-+ free (timesortsym);
-+
-+ if (print_descriptions)
-+ fsf_callg_blurb (stdout);
-+} // tl_cg_print
- static int
- cmp_name (const PTR left, const PTR right)
- {
-@@ -672,6 +1025,66 @@
- free (name_sorted_syms);
- }
-
-+
-+// ============================================================================
-+// tl_cg_print_index
-+//
-+// This function prints the functions together with file name and line number
-+// sorted by name.
-+// ============================================================================
-+void
-+tl_cg_print_index(void)
-+{ unsigned int index;
-+ unsigned int nnames, todo, j;
-+ Sym **name_sorted_syms, *sym;
-+ char buf[20];
-+
-+ // Now, sort regular function name alphabetically to create an index.
-+ name_sorted_syms = (Sym **) xmalloc ((symtab.len + num_cycles) * sizeof (Sym *));
-+
-+ for (index = 0, nnames = 0; index < symtab.len; index++)
-+ {
-+ if (ignore_zeros && symtab.base[index].ncalls == 0
-+ &&symtab.base[index].hist.total_insn_cnt == 0)
-+ continue;
-+
-+ name_sorted_syms[nnames++] = &symtab.base[index];
-+ }
-+
-+ qsort (name_sorted_syms, nnames, sizeof (Sym *), cmp_name);
-+
-+ for (index = 1, todo = nnames; index <= num_cycles; index++)
-+ name_sorted_syms[todo++] = &cycle_header[index];
-+
-+ printf ("\f\n");
-+ printf (_("Index by function name\n\n"));
-+
-+ for (j = 0; j < todo; j++)
-+ {
-+ sym = name_sorted_syms[j];
-+
-+ if (sym->cg.print_flag)
-+ sprintf (buf, "[%d]", sym->cg.index);
-+ else
-+ sprintf (buf, "(%d)", sym->cg.index);
-+ printf (" %s ", buf);
-+ print_name_only (sym);
-+ if (j < nnames)
-+ {
-+ if (!line_granularity && sym->file)
-+ {
-+ printf (" \x03%s:%d\x03\n", sym->file->name,sym->line_num);
-+ } else
-+ printf ("\n");
-+ } else
-+ {
-+ sprintf (buf, _("<cycle %d>"), sym->cg.cyc.num);
-+ printf ("%s\n", buf);
-+ }
-+ }
-+
-+ free (name_sorted_syms);
-+} // tl_cg_print_index
- /* Compare two arcs based on their usage counts.
- We want to sort in descending order. */
-
-diff -Nur binutils-2.24.orig/gprof/cg_print.h binutils-2.24/gprof/cg_print.h
---- binutils-2.24.orig/gprof/cg_print.h 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/gprof/cg_print.h 2016-06-30 21:26:12.765897469 +0200
-@@ -23,9 +23,13 @@
- #define cg_print_h
-
- extern double print_time; /* Total of time being printed. */
-+extern unsigned long long print_insn_cnt;
-+extern unsigned long long print_cycle_cnt;
-
- extern void cg_print (Sym **);
-+extern void tl_cg_print (Sym **);
- extern void cg_print_index (void);
-+extern void tl_cg_print_index (void);
- extern void cg_print_file_ordering (void);
- extern void cg_print_function_ordering (void);
-
-diff -Nur binutils-2.24.orig/gprof/config.texi binutils-2.24/gprof/config.texi
---- binutils-2.24.orig/gprof/config.texi 2013-11-18 09:49:29.000000000 +0100
-+++ binutils-2.24/gprof/config.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1 +0,0 @@
--@set top_srcdir .
-diff -Nur binutils-2.24.orig/gprof/flat_bl.c binutils-2.24/gprof/flat_bl.c
---- binutils-2.24.orig/gprof/flat_bl.c 2013-11-18 09:49:29.000000000 +0100
-+++ binutils-2.24/gprof/flat_bl.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,45 +0,0 @@
--/* ==> Do not modify this file!! It is created automatically
-- from flat_bl.m using the gen-c-prog.awk script. <== */
--
--#include <stdio.h>
--#include "ansidecl.h"
--
--void flat_blurb (FILE *);
--void
--flat_blurb (file)
-- FILE *file;
--{
-- fputs ("\n", file);
-- fputs (" % the percentage of the total running time of the\n", file);
-- fputs ("time program used by this function.\n", file);
-- fputs ("\n", file);
-- fputs ("cumulative a running sum of the number of seconds accounted\n", file);
-- fputs (" seconds for by this function and those listed above it.\n", file);
-- fputs ("\n", file);
-- fputs (" self the number of seconds accounted for by this\n", file);
-- fputs ("seconds function alone. This is the major sort for this\n", file);
-- fputs (" listing.\n", file);
-- fputs ("\n", file);
-- fputs ("calls the number of times this function was invoked, if\n", file);
-- fputs (" this function is profiled, else blank.\n", file);
-- fputs (" \n", file);
-- fputs (" self the average number of milliseconds spent in this\n", file);
-- fputs ("ms/call function per call, if this function is profiled,\n", file);
-- fputs (" else blank.\n", file);
-- fputs ("\n", file);
-- fputs (" total the average number of milliseconds spent in this\n", file);
-- fputs ("ms/call function and its descendents per call, if this \n", file);
-- fputs (" function is profiled, else blank.\n", file);
-- fputs ("\n", file);
-- fputs ("name the name of the function. This is the minor sort\n", file);
-- fputs (" for this listing. The index shows the location of\n", file);
-- fputs (" the function in the gprof listing. If the index is\n", file);
-- fputs (" in parenthesis it shows where it would appear in\n", file);
-- fputs (" the gprof listing if it were to be printed.\n", file);
-- fputs (" \n", file);
-- fputs ("Copyright (C) 2012 Free Software Foundation, Inc.\n", file);
-- fputs ("\n", file);
-- fputs ("Copying and distribution of this file, with or without modification,\n", file);
-- fputs ("are permitted in any medium without royalty provided the copyright\n", file);
-- fputs ("notice and this notice are preserved.\n", file);
--}
-diff -Nur binutils-2.24.orig/gprof/fsf_callg_bl.c binutils-2.24/gprof/fsf_callg_bl.c
---- binutils-2.24.orig/gprof/fsf_callg_bl.c 2013-11-18 09:49:29.000000000 +0100
-+++ binutils-2.24/gprof/fsf_callg_bl.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,100 +0,0 @@
--/* ==> Do not modify this file!! It is created automatically
-- from fsf_callg_bl.m using the gen-c-prog.awk script. <== */
--
--#include <stdio.h>
--#include "ansidecl.h"
--
--void fsf_callg_blurb (FILE *);
--void
--fsf_callg_blurb (file)
-- FILE *file;
--{
-- fputs ("\n", file);
-- fputs (" This table describes the call tree of the program, and was sorted by\n", file);
-- fputs (" the total amount of time spent in each function and its children.\n", file);
-- fputs ("\n", file);
-- fputs (" Each entry in this table consists of several lines. The line with the\n", file);
-- fputs (" index number at the left hand margin lists the current function.\n", file);
-- fputs (" The lines above it list the functions that called this function,\n", file);
-- fputs (" and the lines below it list the functions this one called.\n", file);
-- fputs (" This line lists:\n", file);
-- fputs (" index A unique number given to each element of the table.\n", file);
-- fputs (" Index numbers are sorted numerically.\n", file);
-- fputs (" The index number is printed next to every function name so\n", file);
-- fputs (" it is easier to look up where the function is in the table.\n", file);
-- fputs ("\n", file);
-- fputs (" % time This is the percentage of the `total' time that was spent\n", file);
-- fputs (" in this function and its children. Note that due to\n", file);
-- fputs (" different viewpoints, functions excluded by options, etc,\n", file);
-- fputs (" these numbers will NOT add up to 100%.\n", file);
-- fputs ("\n", file);
-- fputs (" self This is the total amount of time spent in this function.\n", file);
-- fputs ("\n", file);
-- fputs (" children This is the total amount of time propagated into this\n", file);
-- fputs (" function by its children.\n", file);
-- fputs ("\n", file);
-- fputs (" called This is the number of times the function was called.\n", file);
-- fputs (" If the function called itself recursively, the number\n", file);
-- fputs (" only includes non-recursive calls, and is followed by\n", file);
-- fputs (" a `+' and the number of recursive calls.\n", file);
-- fputs ("\n", file);
-- fputs (" name The name of the current function. The index number is\n", file);
-- fputs (" printed after it. If the function is a member of a\n", file);
-- fputs (" cycle, the cycle number is printed between the\n", file);
-- fputs (" function's name and the index number.\n", file);
-- fputs ("\n", file);
-- fputs ("\n", file);
-- fputs (" For the function's parents, the fields have the following meanings:\n", file);
-- fputs ("\n", file);
-- fputs (" self This is the amount of time that was propagated directly\n", file);
-- fputs (" from the function into this parent.\n", file);
-- fputs ("\n", file);
-- fputs (" children This is the amount of time that was propagated from\n", file);
-- fputs (" the function's children into this parent.\n", file);
-- fputs ("\n", file);
-- fputs (" called This is the number of times this parent called the\n", file);
-- fputs (" function `/' the total number of times the function\n", file);
-- fputs (" was called. Recursive calls to the function are not\n", file);
-- fputs (" included in the number after the `/'.\n", file);
-- fputs ("\n", file);
-- fputs (" name This is the name of the parent. The parent's index\n", file);
-- fputs (" number is printed after it. If the parent is a\n", file);
-- fputs (" member of a cycle, the cycle number is printed between\n", file);
-- fputs (" the name and the index number.\n", file);
-- fputs ("\n", file);
-- fputs (" If the parents of the function cannot be determined, the word\n", file);
-- fputs (" `<spontaneous>' is printed in the `name' field, and all the other\n", file);
-- fputs (" fields are blank.\n", file);
-- fputs ("\n", file);
-- fputs (" For the function's children, the fields have the following meanings:\n", file);
-- fputs ("\n", file);
-- fputs (" self This is the amount of time that was propagated directly\n", file);
-- fputs (" from the child into the function.\n", file);
-- fputs ("\n", file);
-- fputs (" children This is the amount of time that was propagated from the\n", file);
-- fputs (" child's children to the function.\n", file);
-- fputs ("\n", file);
-- fputs (" called This is the number of times the function called\n", file);
-- fputs (" this child `/' the total number of times the child\n", file);
-- fputs (" was called. Recursive calls by the child are not\n", file);
-- fputs (" listed in the number after the `/'.\n", file);
-- fputs ("\n", file);
-- fputs (" name This is the name of the child. The child's index\n", file);
-- fputs (" number is printed after it. If the child is a\n", file);
-- fputs (" member of a cycle, the cycle number is printed\n", file);
-- fputs (" between the name and the index number.\n", file);
-- fputs ("\n", file);
-- fputs (" If there are any cycles (circles) in the call graph, there is an\n", file);
-- fputs (" entry for the cycle-as-a-whole. This entry shows who called the\n", file);
-- fputs (" cycle (as parents) and the members of the cycle (as children.)\n", file);
-- fputs (" The `+' recursive calls entry shows the number of function calls that\n", file);
-- fputs (" were internal to the cycle, and the calls entry for each member shows,\n", file);
-- fputs (" for that member, how many times it was called from other members of\n", file);
-- fputs (" the cycle.\n", file);
-- fputs (" \n", file);
-- fputs ("Copyright (C) 2012 Free Software Foundation, Inc.\n", file);
-- fputs ("\n", file);
-- fputs ("Copying and distribution of this file, with or without modification,\n", file);
-- fputs ("are permitted in any medium without royalty provided the copyright\n", file);
-- fputs ("notice and this notice are preserved.\n", file);
--}
-diff -Nur binutils-2.24.orig/gprof/gmon_io.h binutils-2.24/gprof/gmon_io.h
---- binutils-2.24.orig/gprof/gmon_io.h 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/gprof/gmon_io.h 2016-06-30 21:26:12.765897469 +0200
-@@ -26,6 +26,15 @@
- #define INPUT_HISTOGRAM (1 << 0)
- #define INPUT_CALL_GRAPH (1 << 1)
- #define INPUT_BB_COUNTS (1 << 2)
-+#define INPUT_TIMELINE1 (1 << 3) // function level
-+#define INPUT_TIMELINE2 (1 << 4) // branch level
-+#define INPUT_TIMELINE3 (1 << 5) // instruction level
-+#define INPUT_TIMELINE4 (1 << 6) // pipeline level
-+#define INPUT_TIMELINE5 (1 << 7) // process/thread level
-+#define INPUT_TIMELINE6 (1 << 8) // function level + branch summary
-+#define INPUT_TIMELINE7 (1 << 9) // function level + cache summary
-+#define INPUT_TIMELINE8 (1 << 10) // function level + branch & cache summary
-+#define INPUT_TIMELINE9 (1 << 11) // branch level + cache summary
-
- extern int gmon_input; /* What input did we see? */
- extern int gmon_file_version; /* File version are we dealing with. */
-@@ -41,4 +50,6 @@
- extern void gmon_out_read (const char *);
- extern void gmon_out_write (const char *);
-
-+extern int prof_out_read (const char *);
-+
- #endif /* gmon_io_h */
-diff -Nur binutils-2.24.orig/gprof/gmon_out.h binutils-2.24/gprof/gmon_out.h
---- binutils-2.24.orig/gprof/gmon_out.h 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/gprof/gmon_out.h 2016-06-30 21:26:12.769897625 +0200
-@@ -26,20 +26,27 @@
- #define gmon_out_h
-
- #define GMON_MAGIC "gmon" /* magic cookie */
--#define GMON_VERSION 1 /* version number */
-+#define GMON_VERSION 2 /* version number */
-
- /* Raw header as it appears on file (without padding). */
- struct gmon_hdr
- {
- char cookie[4];
-- char version[4];
-+ union {
-+ char version[4];
-+ int version_i;
-+ };
- char spare[3 * 4];
- };
-
- /* Types of records in this file. */
- typedef enum
- {
-- GMON_TAG_TIME_HIST = 0, GMON_TAG_CG_ARC = 1, GMON_TAG_BB_COUNT = 2
-+ GMON_TAG_TIME_HIST = 0, GMON_TAG_CG_ARC = 1, GMON_TAG_BB_COUNT = 2,
-+// the following 3 entries are defined for timeline based monitor data
-+ GMON_TAG_TL_1 = 3, GMON_TAG_TL_2 = 4, GMON_TAG_TL_3 = 5,
-+ GMON_TAG_TL_4 = 6, GMON_TAG_TL_5 = 7, GMON_TAG_TL_6 = 8,
-+ GMON_TAG_TL_7 = 9, GMON_TAG_TL_8 = 10, GMON_TAG_TL_9 = 11
- }
- GMON_Record_Tag;
-
-diff -Nur binutils-2.24.orig/gprof/gprof.1 binutils-2.24/gprof/gprof.1
---- binutils-2.24.orig/gprof/gprof.1 2013-11-18 09:49:29.000000000 +0100
-+++ binutils-2.24/gprof/gprof.1 1970-01-01 01:00:00.000000000 +0100
-@@ -1,757 +0,0 @@
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--.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
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--.if \n(.H>23 .if \n(.V>19 \
--\{\
--. ds : e
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--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "GPROF 1"
--.TH GPROF 1 "2013-11-18" "binutils-2.23.91" "GNU"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--gprof \- display call graph profile data
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--gprof [ \-[abcDhilLrsTvwxyz] ] [ \-[ACeEfFJnNOpPqQZ][\fIname\fR] ]
-- [ \-I \fIdirs\fR ] [ \-d[\fInum\fR] ] [ \-k \fIfrom/to\fR ]
-- [ \-m \fImin-count\fR ] [ \-R \fImap_file\fR ] [ \-t \fItable-length\fR ]
-- [ \-\-[no\-]annotated\-source[=\fIname\fR] ]
-- [ \-\-[no\-]exec\-counts[=\fIname\fR] ]
-- [ \-\-[no\-]flat\-profile[=\fIname\fR] ] [ \-\-[no\-]graph[=\fIname\fR] ]
-- [ \-\-[no\-]time=\fIname\fR] [ \-\-all\-lines ] [ \-\-brief ]
-- [ \-\-debug[=\fIlevel\fR] ] [ \-\-function\-ordering ]
-- [ \-\-file\-ordering \fImap_file\fR ] [ \-\-directory\-path=\fIdirs\fR ]
-- [ \-\-display\-unused\-functions ] [ \-\-file\-format=\fIname\fR ]
-- [ \-\-file\-info ] [ \-\-help ] [ \-\-line ] [ \-\-min\-count=\fIn\fR ]
-- [ \-\-no\-static ] [ \-\-print\-path ] [ \-\-separate\-files ]
-- [ \-\-static\-call\-graph ] [ \-\-sum ] [ \-\-table\-length=\fIlen\fR ]
-- [ \-\-traditional ] [ \-\-version ] [ \-\-width=\fIn\fR ]
-- [ \-\-ignore\-non\-functions ] [ \-\-demangle[=\fI\s-1STYLE\s0\fR] ]
-- [ \-\-no\-demangle ] [\-\-external\-symbol\-table=name]
-- [ \fIimage-file\fR ] [ \fIprofile-file\fR ... ]
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--\&\f(CW\*(C`gprof\*(C'\fR produces an execution profile of C, Pascal, or Fortran77
--programs. The effect of called routines is incorporated in the profile
--of each caller. The profile data is taken from the call graph profile file
--(\fIgmon.out\fR default) which is created by programs
--that are compiled with the \fB\-pg\fR option of
--\&\f(CW\*(C`cc\*(C'\fR, \f(CW\*(C`pc\*(C'\fR, and \f(CW\*(C`f77\*(C'\fR.
--The \fB\-pg\fR option also links in versions of the library routines
--that are compiled for profiling. \f(CW\*(C`Gprof\*(C'\fR reads the given object
--file (the default is \f(CW\*(C`a.out\*(C'\fR) and establishes the relation between
--its symbol table and the call graph profile from \fIgmon.out\fR.
--If more than one profile file is specified, the \f(CW\*(C`gprof\*(C'\fR
--output shows the sum of the profile information in the given profile files.
--.PP
--\&\f(CW\*(C`Gprof\*(C'\fR calculates the amount of time spent in each routine.
--Next, these times are propagated along the edges of the call graph.
--Cycles are discovered, and calls into a cycle are made to share the time
--of the cycle.
--.PP
--Several forms of output are available from the analysis.
--.PP
--The \fIflat profile\fR shows how much time your program spent in each function,
--and how many times that function was called. If you simply want to know
--which functions burn most of the cycles, it is stated concisely here.
--.PP
--The \fIcall graph\fR shows, for each function, which functions called it, which
--other functions it called, and how many times. There is also an estimate
--of how much time was spent in the subroutines of each function. This can
--suggest places where you might try to eliminate function calls that use a
--lot of time.
--.PP
--The \fIannotated source\fR listing is a copy of the program's
--source code, labeled with the number of times each line of the
--program was executed.
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--These options specify which of several output formats
--\&\f(CW\*(C`gprof\*(C'\fR should produce.
--.PP
--Many of these options take an optional \fIsymspec\fR to specify
--functions to be included or excluded. These options can be
--specified multiple times, with different symspecs, to include
--or exclude sets of symbols.
--.PP
--Specifying any of these options overrides the default (\fB\-p \-q\fR),
--which prints a flat profile and call graph analysis
--for all functions.
--.ie n .IP """\-A[\f(CIsymspec\f(CW]""" 4
--.el .IP "\f(CW\-A[\f(CIsymspec\f(CW]\fR" 4
--.IX Item "-A[symspec]"
--.PD 0
--.ie n .IP """\-\-annotated\-source[=\f(CIsymspec\f(CW]""" 4
--.el .IP "\f(CW\-\-annotated\-source[=\f(CIsymspec\f(CW]\fR" 4
--.IX Item "--annotated-source[=symspec]"
--.PD
--The \fB\-A\fR option causes \f(CW\*(C`gprof\*(C'\fR to print annotated source code.
--If \fIsymspec\fR is specified, print output only for matching symbols.
--.ie n .IP """\-b""" 4
--.el .IP "\f(CW\-b\fR" 4
--.IX Item "-b"
--.PD 0
--.ie n .IP """\-\-brief""" 4
--.el .IP "\f(CW\-\-brief\fR" 4
--.IX Item "--brief"
--.PD
--If the \fB\-b\fR option is given, \f(CW\*(C`gprof\*(C'\fR doesn't print the
--verbose blurbs that try to explain the meaning of all of the fields in
--the tables. This is useful if you intend to print out the output, or
--are tired of seeing the blurbs.
--.ie n .IP """\-C[\f(CIsymspec\f(CW]""" 4
--.el .IP "\f(CW\-C[\f(CIsymspec\f(CW]\fR" 4
--.IX Item "-C[symspec]"
--.PD 0
--.ie n .IP """\-\-exec\-counts[=\f(CIsymspec\f(CW]""" 4
--.el .IP "\f(CW\-\-exec\-counts[=\f(CIsymspec\f(CW]\fR" 4
--.IX Item "--exec-counts[=symspec]"
--.PD
--The \fB\-C\fR option causes \f(CW\*(C`gprof\*(C'\fR to
--print a tally of functions and the number of times each was called.
--If \fIsymspec\fR is specified, print tally only for matching symbols.
--.Sp
--If the profile data file contains basic-block count records, specifying
--the \fB\-l\fR option, along with \fB\-C\fR, will cause basic-block
--execution counts to be tallied and displayed.
--.ie n .IP """\-i""" 4
--.el .IP "\f(CW\-i\fR" 4
--.IX Item "-i"
--.PD 0
--.ie n .IP """\-\-file\-info""" 4
--.el .IP "\f(CW\-\-file\-info\fR" 4
--.IX Item "--file-info"
--.PD
--The \fB\-i\fR option causes \f(CW\*(C`gprof\*(C'\fR to display summary information
--about the profile data file(s) and then exit. The number of histogram,
--call graph, and basic-block count records is displayed.
--.ie n .IP """\-I \f(CIdirs\f(CW""" 4
--.el .IP "\f(CW\-I \f(CIdirs\f(CW\fR" 4
--.IX Item "-I dirs"
--.PD 0
--.ie n .IP """\-\-directory\-path=\f(CIdirs\f(CW""" 4
--.el .IP "\f(CW\-\-directory\-path=\f(CIdirs\f(CW\fR" 4
--.IX Item "--directory-path=dirs"
--.PD
--The \fB\-I\fR option specifies a list of search directories in
--which to find source files. Environment variable \fI\s-1GPROF_PATH\s0\fR
--can also be used to convey this information.
--Used mostly for annotated source output.
--.ie n .IP """\-J[\f(CIsymspec\f(CW]""" 4
--.el .IP "\f(CW\-J[\f(CIsymspec\f(CW]\fR" 4
--.IX Item "-J[symspec]"
--.PD 0
--.ie n .IP """\-\-no\-annotated\-source[=\f(CIsymspec\f(CW]""" 4
--.el .IP "\f(CW\-\-no\-annotated\-source[=\f(CIsymspec\f(CW]\fR" 4
--.IX Item "--no-annotated-source[=symspec]"
--.PD
--The \fB\-J\fR option causes \f(CW\*(C`gprof\*(C'\fR not to
--print annotated source code.
--If \fIsymspec\fR is specified, \f(CW\*(C`gprof\*(C'\fR prints annotated source,
--but excludes matching symbols.
--.ie n .IP """\-L""" 4
--.el .IP "\f(CW\-L\fR" 4
--.IX Item "-L"
--.PD 0
--.ie n .IP """\-\-print\-path""" 4
--.el .IP "\f(CW\-\-print\-path\fR" 4
--.IX Item "--print-path"
--.PD
--Normally, source filenames are printed with the path
--component suppressed. The \fB\-L\fR option causes \f(CW\*(C`gprof\*(C'\fR
--to print the full pathname of
--source filenames, which is determined
--from symbolic debugging information in the image file
--and is relative to the directory in which the compiler
--was invoked.
--.ie n .IP """\-p[\f(CIsymspec\f(CW]""" 4
--.el .IP "\f(CW\-p[\f(CIsymspec\f(CW]\fR" 4
--.IX Item "-p[symspec]"
--.PD 0
--.ie n .IP """\-\-flat\-profile[=\f(CIsymspec\f(CW]""" 4
--.el .IP "\f(CW\-\-flat\-profile[=\f(CIsymspec\f(CW]\fR" 4
--.IX Item "--flat-profile[=symspec]"
--.PD
--The \fB\-p\fR option causes \f(CW\*(C`gprof\*(C'\fR to print a flat profile.
--If \fIsymspec\fR is specified, print flat profile only for matching symbols.
--.ie n .IP """\-P[\f(CIsymspec\f(CW]""" 4
--.el .IP "\f(CW\-P[\f(CIsymspec\f(CW]\fR" 4
--.IX Item "-P[symspec]"
--.PD 0
--.ie n .IP """\-\-no\-flat\-profile[=\f(CIsymspec\f(CW]""" 4
--.el .IP "\f(CW\-\-no\-flat\-profile[=\f(CIsymspec\f(CW]\fR" 4
--.IX Item "--no-flat-profile[=symspec]"
--.PD
--The \fB\-P\fR option causes \f(CW\*(C`gprof\*(C'\fR to suppress printing a flat profile.
--If \fIsymspec\fR is specified, \f(CW\*(C`gprof\*(C'\fR prints a flat profile,
--but excludes matching symbols.
--.ie n .IP """\-q[\f(CIsymspec\f(CW]""" 4
--.el .IP "\f(CW\-q[\f(CIsymspec\f(CW]\fR" 4
--.IX Item "-q[symspec]"
--.PD 0
--.ie n .IP """\-\-graph[=\f(CIsymspec\f(CW]""" 4
--.el .IP "\f(CW\-\-graph[=\f(CIsymspec\f(CW]\fR" 4
--.IX Item "--graph[=symspec]"
--.PD
--The \fB\-q\fR option causes \f(CW\*(C`gprof\*(C'\fR to print the call graph analysis.
--If \fIsymspec\fR is specified, print call graph only for matching symbols
--and their children.
--.ie n .IP """\-Q[\f(CIsymspec\f(CW]""" 4
--.el .IP "\f(CW\-Q[\f(CIsymspec\f(CW]\fR" 4
--.IX Item "-Q[symspec]"
--.PD 0
--.ie n .IP """\-\-no\-graph[=\f(CIsymspec\f(CW]""" 4
--.el .IP "\f(CW\-\-no\-graph[=\f(CIsymspec\f(CW]\fR" 4
--.IX Item "--no-graph[=symspec]"
--.PD
--The \fB\-Q\fR option causes \f(CW\*(C`gprof\*(C'\fR to suppress printing the
--call graph.
--If \fIsymspec\fR is specified, \f(CW\*(C`gprof\*(C'\fR prints a call graph,
--but excludes matching symbols.
--.ie n .IP """\-t""" 4
--.el .IP "\f(CW\-t\fR" 4
--.IX Item "-t"
--.PD 0
--.ie n .IP """\-\-table\-length=\f(CInum\f(CW""" 4
--.el .IP "\f(CW\-\-table\-length=\f(CInum\f(CW\fR" 4
--.IX Item "--table-length=num"
--.PD
--The \fB\-t\fR option causes the \fInum\fR most active source lines in
--each source file to be listed when source annotation is enabled. The
--default is 10.
--.ie n .IP """\-y""" 4
--.el .IP "\f(CW\-y\fR" 4
--.IX Item "-y"
--.PD 0
--.ie n .IP """\-\-separate\-files""" 4
--.el .IP "\f(CW\-\-separate\-files\fR" 4
--.IX Item "--separate-files"
--.PD
--This option affects annotated source output only.
--Normally, \f(CW\*(C`gprof\*(C'\fR prints annotated source files
--to standard-output. If this option is specified,
--annotated source for a file named \fIpath/\fIfilename\fI\fR
--is generated in the file \fI\fIfilename\fI\-ann\fR. If the underlying
--file system would truncate \fI\fIfilename\fI\-ann\fR so that it
--overwrites the original \fI\fIfilename\fI\fR, \f(CW\*(C`gprof\*(C'\fR generates
--annotated source in the file \fI\fIfilename\fI.ann\fR instead (if the
--original file name has an extension, that extension is \fIreplaced\fR
--with \fI.ann\fR).
--.ie n .IP """\-Z[\f(CIsymspec\f(CW]""" 4
--.el .IP "\f(CW\-Z[\f(CIsymspec\f(CW]\fR" 4
--.IX Item "-Z[symspec]"
--.PD 0
--.ie n .IP """\-\-no\-exec\-counts[=\f(CIsymspec\f(CW]""" 4
--.el .IP "\f(CW\-\-no\-exec\-counts[=\f(CIsymspec\f(CW]\fR" 4
--.IX Item "--no-exec-counts[=symspec]"
--.PD
--The \fB\-Z\fR option causes \f(CW\*(C`gprof\*(C'\fR not to
--print a tally of functions and the number of times each was called.
--If \fIsymspec\fR is specified, print tally, but exclude matching symbols.
--.ie n .IP """\-r""" 4
--.el .IP "\f(CW\-r\fR" 4
--.IX Item "-r"
--.PD 0
--.ie n .IP """\-\-function\-ordering""" 4
--.el .IP "\f(CW\-\-function\-ordering\fR" 4
--.IX Item "--function-ordering"
--.PD
--The \fB\-\-function\-ordering\fR option causes \f(CW\*(C`gprof\*(C'\fR to print a
--suggested function ordering for the program based on profiling data.
--This option suggests an ordering which may improve paging, tlb and
--cache behavior for the program on systems which support arbitrary
--ordering of functions in an executable.
--.Sp
--The exact details of how to force the linker to place functions
--in a particular order is system dependent and out of the scope of this
--manual.
--.ie n .IP """\-R \f(CImap_file\f(CW""" 4
--.el .IP "\f(CW\-R \f(CImap_file\f(CW\fR" 4
--.IX Item "-R map_file"
--.PD 0
--.ie n .IP """\-\-file\-ordering \f(CImap_file\f(CW""" 4
--.el .IP "\f(CW\-\-file\-ordering \f(CImap_file\f(CW\fR" 4
--.IX Item "--file-ordering map_file"
--.PD
--The \fB\-\-file\-ordering\fR option causes \f(CW\*(C`gprof\*(C'\fR to print a
--suggested .o link line ordering for the program based on profiling data.
--This option suggests an ordering which may improve paging, tlb and
--cache behavior for the program on systems which do not support arbitrary
--ordering of functions in an executable.
--.Sp
--Use of the \fB\-a\fR argument is highly recommended with this option.
--.Sp
--The \fImap_file\fR argument is a pathname to a file which provides
--function name to object file mappings. The format of the file is similar to
--the output of the program \f(CW\*(C`nm\*(C'\fR.
--.Sp
--.Vb 8
--\& c\-parse.o:00000000 T yyparse
--\& c\-parse.o:00000004 C yyerrflag
--\& c\-lang.o:00000000 T maybe_objc_method_name
--\& c\-lang.o:00000000 T print_lang_statistics
--\& c\-lang.o:00000000 T recognize_objc_keyword
--\& c\-decl.o:00000000 T print_lang_identifier
--\& c\-decl.o:00000000 T print_lang_type
--\& ...
--.Ve
--.Sp
--To create a \fImap_file\fR with \s-1GNU\s0 \f(CW\*(C`nm\*(C'\fR, type a command like
--\&\f(CW\*(C`nm \-\-extern\-only \-\-defined\-only \-v \-\-print\-file\-name program\-name\*(C'\fR.
--.ie n .IP """\-T""" 4
--.el .IP "\f(CW\-T\fR" 4
--.IX Item "-T"
--.PD 0
--.ie n .IP """\-\-traditional""" 4
--.el .IP "\f(CW\-\-traditional\fR" 4
--.IX Item "--traditional"
--.PD
--The \fB\-T\fR option causes \f(CW\*(C`gprof\*(C'\fR to print its output in
--\&\*(L"traditional\*(R" \s-1BSD\s0 style.
--.ie n .IP """\-w \f(CIwidth\f(CW""" 4
--.el .IP "\f(CW\-w \f(CIwidth\f(CW\fR" 4
--.IX Item "-w width"
--.PD 0
--.ie n .IP """\-\-width=\f(CIwidth\f(CW""" 4
--.el .IP "\f(CW\-\-width=\f(CIwidth\f(CW\fR" 4
--.IX Item "--width=width"
--.PD
--Sets width of output lines to \fIwidth\fR.
--Currently only used when printing the function index at the bottom
--of the call graph.
--.ie n .IP """\-x""" 4
--.el .IP "\f(CW\-x\fR" 4
--.IX Item "-x"
--.PD 0
--.ie n .IP """\-\-all\-lines""" 4
--.el .IP "\f(CW\-\-all\-lines\fR" 4
--.IX Item "--all-lines"
--.PD
--This option affects annotated source output only.
--By default, only the lines at the beginning of a basic-block
--are annotated. If this option is specified, every line in
--a basic-block is annotated by repeating the annotation for the
--first line. This behavior is similar to \f(CW\*(C`tcov\*(C'\fR's \fB\-a\fR.
--.ie n .IP """\-\-demangle[=\f(CIstyle\f(CW]""" 4
--.el .IP "\f(CW\-\-demangle[=\f(CIstyle\f(CW]\fR" 4
--.IX Item "--demangle[=style]"
--.PD 0
--.ie n .IP """\-\-no\-demangle""" 4
--.el .IP "\f(CW\-\-no\-demangle\fR" 4
--.IX Item "--no-demangle"
--.PD
--These options control whether \*(C+ symbol names should be demangled when
--printing output. The default is to demangle symbols. The
--\&\f(CW\*(C`\-\-no\-demangle\*(C'\fR option may be used to turn off demangling. Different
--compilers have different mangling styles. The optional demangling style
--argument can be used to choose an appropriate demangling style for your
--compiler.
--.SS "Analysis Options"
--.IX Subsection "Analysis Options"
--.ie n .IP """\-a""" 4
--.el .IP "\f(CW\-a\fR" 4
--.IX Item "-a"
--.PD 0
--.ie n .IP """\-\-no\-static""" 4
--.el .IP "\f(CW\-\-no\-static\fR" 4
--.IX Item "--no-static"
--.PD
--The \fB\-a\fR option causes \f(CW\*(C`gprof\*(C'\fR to suppress the printing of
--statically declared (private) functions. (These are functions whose
--names are not listed as global, and which are not visible outside the
--file/function/block where they were defined.) Time spent in these
--functions, calls to/from them, etc., will all be attributed to the
--function that was loaded directly before it in the executable file.
--This option affects both the flat profile and the call graph.
--.ie n .IP """\-c""" 4
--.el .IP "\f(CW\-c\fR" 4
--.IX Item "-c"
--.PD 0
--.ie n .IP """\-\-static\-call\-graph""" 4
--.el .IP "\f(CW\-\-static\-call\-graph\fR" 4
--.IX Item "--static-call-graph"
--.PD
--The \fB\-c\fR option causes the call graph of the program to be
--augmented by a heuristic which examines the text space of the object
--file and identifies function calls in the binary machine code.
--Since normal call graph records are only generated when functions are
--entered, this option identifies children that could have been called,
--but never were. Calls to functions that were not compiled with
--profiling enabled are also identified, but only if symbol table
--entries are present for them.
--Calls to dynamic library routines are typically \fInot\fR found
--by this option.
--Parents or children identified via this heuristic
--are indicated in the call graph with call counts of \fB0\fR.
--.ie n .IP """\-D""" 4
--.el .IP "\f(CW\-D\fR" 4
--.IX Item "-D"
--.PD 0
--.ie n .IP """\-\-ignore\-non\-functions""" 4
--.el .IP "\f(CW\-\-ignore\-non\-functions\fR" 4
--.IX Item "--ignore-non-functions"
--.PD
--The \fB\-D\fR option causes \f(CW\*(C`gprof\*(C'\fR to ignore symbols which
--are not known to be functions. This option will give more accurate
--profile data on systems where it is supported (Solaris and \s-1HPUX\s0 for
--example).
--.ie n .IP """\-k \f(CIfrom\f(CW/\f(CIto\f(CW""" 4
--.el .IP "\f(CW\-k \f(CIfrom\f(CW/\f(CIto\f(CW\fR" 4
--.IX Item "-k from/to"
--The \fB\-k\fR option allows you to delete from the call graph any arcs from
--symbols matching symspec \fIfrom\fR to those matching symspec \fIto\fR.
--.ie n .IP """\-l""" 4
--.el .IP "\f(CW\-l\fR" 4
--.IX Item "-l"
--.PD 0
--.ie n .IP """\-\-line""" 4
--.el .IP "\f(CW\-\-line\fR" 4
--.IX Item "--line"
--.PD
--The \fB\-l\fR option enables line-by-line profiling, which causes
--histogram hits to be charged to individual source code lines,
--instead of functions. This feature only works with programs compiled
--by older versions of the \f(CW\*(C`gcc\*(C'\fR compiler. Newer versions of
--\&\f(CW\*(C`gcc\*(C'\fR are designed to work with the \f(CW\*(C`gcov\*(C'\fR tool instead.
--.Sp
--If the program was compiled with basic-block counting enabled,
--this option will also identify how many times each line of
--code was executed.
--While line-by-line profiling can help isolate where in a large function
--a program is spending its time, it also significantly increases
--the running time of \f(CW\*(C`gprof\*(C'\fR, and magnifies statistical
--inaccuracies.
--.ie n .IP """\-m \f(CInum\f(CW""" 4
--.el .IP "\f(CW\-m \f(CInum\f(CW\fR" 4
--.IX Item "-m num"
--.PD 0
--.ie n .IP """\-\-min\-count=\f(CInum\f(CW""" 4
--.el .IP "\f(CW\-\-min\-count=\f(CInum\f(CW\fR" 4
--.IX Item "--min-count=num"
--.PD
--This option affects execution count output only.
--Symbols that are executed less than \fInum\fR times are suppressed.
--.ie n .IP """\-n\f(CIsymspec\f(CW""" 4
--.el .IP "\f(CW\-n\f(CIsymspec\f(CW\fR" 4
--.IX Item "-nsymspec"
--.PD 0
--.ie n .IP """\-\-time=\f(CIsymspec\f(CW""" 4
--.el .IP "\f(CW\-\-time=\f(CIsymspec\f(CW\fR" 4
--.IX Item "--time=symspec"
--.PD
--The \fB\-n\fR option causes \f(CW\*(C`gprof\*(C'\fR, in its call graph analysis,
--to only propagate times for symbols matching \fIsymspec\fR.
--.ie n .IP """\-N\f(CIsymspec\f(CW""" 4
--.el .IP "\f(CW\-N\f(CIsymspec\f(CW\fR" 4
--.IX Item "-Nsymspec"
--.PD 0
--.ie n .IP """\-\-no\-time=\f(CIsymspec\f(CW""" 4
--.el .IP "\f(CW\-\-no\-time=\f(CIsymspec\f(CW\fR" 4
--.IX Item "--no-time=symspec"
--.PD
--The \fB\-n\fR option causes \f(CW\*(C`gprof\*(C'\fR, in its call graph analysis,
--not to propagate times for symbols matching \fIsymspec\fR.
--.ie n .IP """\-S\f(CIfilename\f(CW""" 4
--.el .IP "\f(CW\-S\f(CIfilename\f(CW\fR" 4
--.IX Item "-Sfilename"
--.PD 0
--.ie n .IP """\-\-external\-symbol\-table=\f(CIfilename\f(CW""" 4
--.el .IP "\f(CW\-\-external\-symbol\-table=\f(CIfilename\f(CW\fR" 4
--.IX Item "--external-symbol-table=filename"
--.PD
--The \fB\-S\fR option causes \f(CW\*(C`gprof\*(C'\fR to read an external symbol table
--file, such as \fI/proc/kallsyms\fR, rather than read the symbol table
--from the given object file (the default is \f(CW\*(C`a.out\*(C'\fR). This is useful
--for profiling kernel modules.
--.ie n .IP """\-z""" 4
--.el .IP "\f(CW\-z\fR" 4
--.IX Item "-z"
--.PD 0
--.ie n .IP """\-\-display\-unused\-functions""" 4
--.el .IP "\f(CW\-\-display\-unused\-functions\fR" 4
--.IX Item "--display-unused-functions"
--.PD
--If you give the \fB\-z\fR option, \f(CW\*(C`gprof\*(C'\fR will mention all
--functions in the flat profile, even those that were never called, and
--that had no time spent in them. This is useful in conjunction with the
--\&\fB\-c\fR option for discovering which routines were never called.
--.SS "Miscellaneous Options"
--.IX Subsection "Miscellaneous Options"
--.ie n .IP """\-d[\f(CInum\f(CW]""" 4
--.el .IP "\f(CW\-d[\f(CInum\f(CW]\fR" 4
--.IX Item "-d[num]"
--.PD 0
--.ie n .IP """\-\-debug[=\f(CInum\f(CW]""" 4
--.el .IP "\f(CW\-\-debug[=\f(CInum\f(CW]\fR" 4
--.IX Item "--debug[=num]"
--.PD
--The \fB\-d\fR \fInum\fR option specifies debugging options.
--If \fInum\fR is not specified, enable all debugging.
--.ie n .IP """\-h""" 4
--.el .IP "\f(CW\-h\fR" 4
--.IX Item "-h"
--.PD 0
--.ie n .IP """\-\-help""" 4
--.el .IP "\f(CW\-\-help\fR" 4
--.IX Item "--help"
--.PD
--The \fB\-h\fR option prints command line usage.
--.ie n .IP """\-O\f(CIname\f(CW""" 4
--.el .IP "\f(CW\-O\f(CIname\f(CW\fR" 4
--.IX Item "-Oname"
--.PD 0
--.ie n .IP """\-\-file\-format=\f(CIname\f(CW""" 4
--.el .IP "\f(CW\-\-file\-format=\f(CIname\f(CW\fR" 4
--.IX Item "--file-format=name"
--.PD
--Selects the format of the profile data files. Recognized formats are
--\&\fBauto\fR (the default), \fBbsd\fR, \fB4.4bsd\fR, \fBmagic\fR, and
--\&\fBprof\fR (not yet supported).
--.ie n .IP """\-s""" 4
--.el .IP "\f(CW\-s\fR" 4
--.IX Item "-s"
--.PD 0
--.ie n .IP """\-\-sum""" 4
--.el .IP "\f(CW\-\-sum\fR" 4
--.IX Item "--sum"
--.PD
--The \fB\-s\fR option causes \f(CW\*(C`gprof\*(C'\fR to summarize the information
--in the profile data files it read in, and write out a profile data
--file called \fIgmon.sum\fR, which contains all the information from
--the profile data files that \f(CW\*(C`gprof\*(C'\fR read in. The file \fIgmon.sum\fR
--may be one of the specified input files; the effect of this is to
--merge the data in the other input files into \fIgmon.sum\fR.
--.Sp
--Eventually you can run \f(CW\*(C`gprof\*(C'\fR again without \fB\-s\fR to analyze the
--cumulative data in the file \fIgmon.sum\fR.
--.ie n .IP """\-v""" 4
--.el .IP "\f(CW\-v\fR" 4
--.IX Item "-v"
--.PD 0
--.ie n .IP """\-\-version""" 4
--.el .IP "\f(CW\-\-version\fR" 4
--.IX Item "--version"
--.PD
--The \fB\-v\fR flag causes \f(CW\*(C`gprof\*(C'\fR to print the current version
--number, and then exit.
--.SS "Deprecated Options"
--.IX Subsection "Deprecated Options"
--These options have been replaced with newer versions that use symspecs.
--.ie n .IP """\-e \f(CIfunction_name\f(CW""" 4
--.el .IP "\f(CW\-e \f(CIfunction_name\f(CW\fR" 4
--.IX Item "-e function_name"
--The \fB\-e\fR \fIfunction\fR option tells \f(CW\*(C`gprof\*(C'\fR to not print
--information about the function \fIfunction_name\fR (and its
--children...) in the call graph. The function will still be listed
--as a child of any functions that call it, but its index number will be
--shown as \fB[not printed]\fR. More than one \fB\-e\fR option may be
--given; only one \fIfunction_name\fR may be indicated with each \fB\-e\fR
--option.
--.ie n .IP """\-E \f(CIfunction_name\f(CW""" 4
--.el .IP "\f(CW\-E \f(CIfunction_name\f(CW\fR" 4
--.IX Item "-E function_name"
--The \f(CW\*(C`\-E \f(CIfunction\f(CW\*(C'\fR option works like the \f(CW\*(C`\-e\*(C'\fR option, but
--time spent in the function (and children who were not called from
--anywhere else), will not be used to compute the percentages-of-time for
--the call graph. More than one \fB\-E\fR option may be given; only one
--\&\fIfunction_name\fR may be indicated with each \fB\-E\fR option.
--.ie n .IP """\-f \f(CIfunction_name\f(CW""" 4
--.el .IP "\f(CW\-f \f(CIfunction_name\f(CW\fR" 4
--.IX Item "-f function_name"
--The \fB\-f\fR \fIfunction\fR option causes \f(CW\*(C`gprof\*(C'\fR to limit the
--call graph to the function \fIfunction_name\fR and its children (and
--their children...). More than one \fB\-f\fR option may be given;
--only one \fIfunction_name\fR may be indicated with each \fB\-f\fR
--option.
--.ie n .IP """\-F \f(CIfunction_name\f(CW""" 4
--.el .IP "\f(CW\-F \f(CIfunction_name\f(CW\fR" 4
--.IX Item "-F function_name"
--The \fB\-F\fR \fIfunction\fR option works like the \f(CW\*(C`\-f\*(C'\fR option, but
--only time spent in the function and its children (and their
--children...) will be used to determine total-time and
--percentages-of-time for the call graph. More than one \fB\-F\fR option
--may be given; only one \fIfunction_name\fR may be indicated with each
--\&\fB\-F\fR option. The \fB\-F\fR option overrides the \fB\-E\fR option.
--.SH "FILES"
--.IX Header "FILES"
--.ie n .IP """\f(CIa.out\f(CW""" 4
--.el .IP "\f(CW\f(CIa.out\f(CW\fR" 4
--.IX Item "a.out"
--the namelist and text space.
--.ie n .IP """\f(CIgmon.out\f(CW""" 4
--.el .IP "\f(CW\f(CIgmon.out\f(CW\fR" 4
--.IX Item "gmon.out"
--dynamic call graph and profile.
--.ie n .IP """\f(CIgmon.sum\f(CW""" 4
--.el .IP "\f(CW\f(CIgmon.sum\f(CW\fR" 4
--.IX Item "gmon.sum"
--summarized dynamic call graph and profile.
--.SH "BUGS"
--.IX Header "BUGS"
--The granularity of the sampling is shown, but remains
--statistical at best.
--We assume that the time for each execution of a function
--can be expressed by the total time for the function divided
--by the number of times the function is called.
--Thus the time propagated along the call graph arcs to the function's
--parents is directly proportional to the number of times that
--arc is traversed.
--.PP
--Parents that are not themselves profiled will have the time of
--their profiled children propagated to them, but they will appear
--to be spontaneously invoked in the call graph listing, and will
--not have their time propagated further.
--Similarly, signal catchers, even though profiled, will appear
--to be spontaneous (although for more obscure reasons).
--Any profiled children of signal catchers should have their times
--propagated properly, unless the signal catcher was invoked during
--the execution of the profiling routine, in which case all is lost.
--.PP
--The profiled program must call \f(CW\*(C`exit\*(C'\fR(2)
--or return normally for the profiling information to be saved
--in the \fIgmon.out\fR file.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--\&\fImonitor\fR\|(3), \fIprofil\fR\|(2), \fIcc\fR\|(1), \fIprof\fR\|(1), and the Info entry for \fIgprof\fR.
--.PP
--\&\*(L"An Execution Profiler for Modular Programs\*(R",
--by S. Graham, P. Kessler, M. McKusick;
--Software \- Practice and Experience,
--Vol. 13, pp. 671\-685, 1983.
--.PP
--\&\*(L"gprof: A Call Graph Execution Profiler\*(R",
--by S. Graham, P. Kessler, M. McKusick;
--Proceedings of the \s-1SIGPLAN\s0 '82 Symposium on Compiler Construction,
--\&\s-1SIGPLAN\s0 Notices, Vol. 17, No 6, pp. 120\-126, June 1982.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1988, 1992, 1997, 1998, 1999, 2000, 2001, 2003,
--2007, 2008, 2009 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/gprof/gprof.c binutils-2.24/gprof/gprof.c
---- binutils-2.24.orig/gprof/gprof.c 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/gprof/gprof.c 2016-06-30 21:26:12.769897625 +0200
-@@ -44,6 +44,10 @@
- #include "sym_ids.h"
- #include "demangle.h"
- #include "getopt.h"
-+#include "timeline.h"
-+#include "prof_io.h"
-+#include <sys/time.h>
-+#include <time.h>
-
- static void usage (FILE *, int) ATTRIBUTE_NORETURN;
-
-@@ -60,7 +64,9 @@
- int output_style = 0;
- int output_width = 80;
- bfd_boolean bsd_style_output = FALSE;
-+bfd_boolean do_timeline = FALSE;
- bfd_boolean demangle = TRUE;
-+bfd_boolean discard_underscores = TRUE;
- bfd_boolean ignore_direct_calls = FALSE;
- bfd_boolean ignore_static_funcs = FALSE;
- bfd_boolean ignore_zeros = TRUE;
-@@ -72,6 +78,9 @@
-
- bfd_boolean first_output = TRUE;
-
-+FILE *log_fd = NULL;
-+struct timeval TotalProfileTime, ReadProfOutDataTime, ParsingProfileDataTime, WriteTemplateFileTime, ReadTemplateFileTime, ProcessDataTime, WriteTimelineBinFileTime, StartTime, EndTime;
-+int gErrorCode = 0;
- char copyright[] =
- "@(#) Copyright (c) 1983 Regents of the University of California.\n\
- All rights reserved.\n";
-@@ -115,9 +124,11 @@
- {"file-ordering", required_argument, 0, 'R'},
- {"file-info", no_argument, 0, 'i'},
- {"sum", no_argument, 0, 's'},
-+ {"cache-usage", no_argument, 0, 'Y'},
-
- /* various options to affect output: */
-
-+ {"timeline", no_argument, 0, 'X'},
- {"all-lines", no_argument, 0, 'x'},
- {"demangle", optional_argument, 0, OPTION_DEMANGLE},
- {"no-demangle", no_argument, 0, OPTION_NO_DEMANGLE},
-@@ -157,7 +168,7 @@
- usage (FILE *stream, int status)
- {
- fprintf (stream, _("\
--Usage: %s [-[abcDhilLsTvwxyz]] [-[ACeEfFJnNOpPqSQZ][name]] [-I dirs]\n\
-+Usage: %s [-[abcDhilLsTvwxXyYz]] [-[ACeEfFJnNOpPqQZ][name]] [-I dirs]\n\
- [-d[num]] [-k from/to] [-m min-count] [-t table-length]\n\
- [--[no-]annotated-source[=name]] [--[no-]exec-counts[=name]]\n\
- [--[no-]flat-profile[=name]] [--[no-]graph[=name]]\n\
-@@ -176,7 +187,120 @@
- done (status);
- }
-
-+int update_TotalProfileTime(void);
-+int update_TotalProfileTime(void){
-+ TotalProfileTime.tv_sec += (EndTime.tv_sec - StartTime.tv_sec);
-+ if(EndTime.tv_sec == StartTime.tv_sec){
-+ TotalProfileTime.tv_usec += (EndTime.tv_usec - StartTime.tv_usec);
-+ }else{
-+ TotalProfileTime.tv_sec--;
-+ TotalProfileTime.tv_usec += (EndTime.tv_usec + 1000000 - StartTime.tv_usec);
-+ }
-+ if(TotalProfileTime.tv_usec >= 1000000){
-+ TotalProfileTime.tv_usec -= 1000000;
-+ TotalProfileTime.tv_sec++;
-+ }
-+
-+ return 0;
-+}
-+
-+int update_ReadProfOutDataTime(void);
-+int update_ReadProfOutDataTime(void){
-+ ReadProfOutDataTime.tv_sec += (EndTime.tv_sec - StartTime.tv_sec);
-+ if(EndTime.tv_sec == StartTime.tv_sec){
-+ ReadProfOutDataTime.tv_usec += (EndTime.tv_usec - StartTime.tv_usec);
-+ }else{
-+ ReadProfOutDataTime.tv_sec--;
-+ ReadProfOutDataTime.tv_usec += (EndTime.tv_usec + 1000000 - StartTime.tv_usec);
-+ }
-+ if(ReadProfOutDataTime.tv_usec >= 1000000){
-+ ReadProfOutDataTime.tv_usec -= 1000000;
-+ ReadProfOutDataTime.tv_sec++;
-+ }
-+ return 0;
-+}
-+
-+int update_ParsingProfileDataTime(void);
-+int update_ParsingProfileDataTime(void){
-+ ParsingProfileDataTime.tv_sec += (EndTime.tv_sec - StartTime.tv_sec);
-+ if(EndTime.tv_sec == StartTime.tv_sec){
-+ ParsingProfileDataTime.tv_usec += (EndTime.tv_usec - StartTime.tv_usec);
-+ }else{
-+ ParsingProfileDataTime.tv_sec--;
-+ ParsingProfileDataTime.tv_usec += (EndTime.tv_usec + 1000000 - StartTime.tv_usec);
-+ }
-+ if(ParsingProfileDataTime.tv_usec >= 1000000){
-+ ParsingProfileDataTime.tv_usec -= 1000000;
-+ ParsingProfileDataTime.tv_sec++;
-+ }
-+ return 0;
-+}
-+
-+int update_WriteTemplateFileTime(void);
-+int update_WriteTemplateFileTime(void){
-+ WriteTemplateFileTime.tv_sec += (EndTime.tv_sec - StartTime.tv_sec);
-+ if(EndTime.tv_sec == StartTime.tv_sec){
-+ WriteTemplateFileTime.tv_usec += (EndTime.tv_usec - StartTime.tv_usec);
-+ }else{
-+ WriteTemplateFileTime.tv_sec--;
-+ WriteTemplateFileTime.tv_usec += (EndTime.tv_usec + 1000000 - StartTime.tv_usec);
-+ }
-+ if(WriteTemplateFileTime.tv_usec >= 1000000){
-+ WriteTemplateFileTime.tv_usec -= 1000000;
-+ WriteTemplateFileTime.tv_sec++;
-+ }
-+ return 0;
-+}
-+
-+int update_ReadTemplateFileTime(void);
-+int update_ReadTemplateFileTime(void){
-+ ReadTemplateFileTime.tv_sec += (EndTime.tv_sec - StartTime.tv_sec);
-+ if(EndTime.tv_sec == StartTime.tv_sec){
-+ ReadTemplateFileTime.tv_usec += (EndTime.tv_usec - StartTime.tv_usec);
-+ }else{
-+ ReadTemplateFileTime.tv_sec--;
-+ ReadTemplateFileTime.tv_usec += (EndTime.tv_usec + 1000000 - StartTime.tv_usec);
-+ }
-+ if(ReadTemplateFileTime.tv_usec >= 1000000){
-+ ReadTemplateFileTime.tv_usec -= 1000000;
-+ ReadTemplateFileTime.tv_sec++;
-+ }
-+ return 0;
-+}
-+
-+int update_ProcessDataTime(void);
-+int update_ProcessDataTime(void){
-+ ProcessDataTime.tv_sec += (EndTime.tv_sec - StartTime.tv_sec);
-+ if(EndTime.tv_sec == StartTime.tv_sec){
-+ ProcessDataTime.tv_usec += (EndTime.tv_usec - StartTime.tv_usec);
-+ }else{
-+ ProcessDataTime.tv_sec--;
-+ ProcessDataTime.tv_usec += (EndTime.tv_usec + 1000000 - StartTime.tv_usec);
-+ }
-+ if(ProcessDataTime.tv_usec >= 1000000){
-+ ProcessDataTime.tv_usec -= 1000000;
-+ ProcessDataTime.tv_sec++;
-+ }
-+ return 0;
-+}
-
-+int update_WriteTimelineBinFileTime(void);
-+int update_WriteTimelineBinFileTime(void){
-+ WriteTimelineBinFileTime.tv_sec += (EndTime.tv_sec - StartTime.tv_sec);
-+ if(EndTime.tv_sec == StartTime.tv_sec){
-+ WriteTimelineBinFileTime.tv_usec += (EndTime.tv_usec - StartTime.tv_usec);
-+ }else{
-+ WriteTimelineBinFileTime.tv_sec--;
-+ WriteTimelineBinFileTime.tv_usec += (EndTime.tv_usec + 1000000 - StartTime.tv_usec);
-+ }
-+ if(WriteTimelineBinFileTime.tv_usec >= 1000000){
-+ WriteTimelineBinFileTime.tv_usec -= 1000000;
-+ WriteTimelineBinFileTime.tv_sec++;
-+ }
-+ return 0;
-+}
-+void tl_hist_assign_samples(void);
-+void tl_hist_print(void);
- int
- main (int argc, char **argv)
- {
-@@ -184,6 +308,12 @@
- Sym **cg = 0;
- int ch, user_specified = 0;
-
-+ // Analysis profile time
-+ log_fd = fopen("timelog","w+");
-+
-+ // Analysis profile time
-+ gettimeofday(&StartTime, NULL);
-+
- #if defined (HAVE_SETLOCALE) && defined (HAVE_LC_MESSAGES)
- setlocale (LC_MESSAGES, "");
- #endif
-@@ -201,7 +331,7 @@
- expandargv (&argc, &argv);
-
- while ((ch = getopt_long (argc, argv,
-- "aA::bBcC::d::De:E:f:F:hiI:J::k:lLm:n:N:O:p::P::q::Q::rR:sS:t:Tvw:xyzZ::",
-+ "aA::bBcC::d::De:E:f:F:hiI:J::k:lLm:n:N:O:p::P::q::Q::rR:sS:t:Tvw:xXyYzZ::",
- long_options, 0))
- != EOF)
- {
-@@ -431,9 +561,16 @@
- case 'x':
- bb_annotate_all_lines = TRUE;
- break;
-+ case 'X':
-+ do_timeline = TRUE;
-+ break;
- case 'y':
- create_annotation_files = TRUE;
- break;
-+ case 'Y':
-+ output_style |= STYLE_CACHE_USAGE;
-+ user_specified |= STYLE_CACHE_USAGE;
-+ break;
- case 'z':
- ignore_zeros = FALSE;
- break;
-@@ -500,6 +637,10 @@
-
- if (optind < argc)
- gmon_name = argv[optind++];
-+ else if (file_format == FF_PROF)
-+ gmon_name = PROFNAME;
-+ else
-+ gmon_name = GMONNAME;
-
- /* Turn off default functions. */
- for (sp = &default_excluded_list[0]; *sp; sp++)
-@@ -530,10 +671,19 @@
-
- if (file_format == FF_PROF)
- {
-- fprintf (stderr,
-- _("%s: sorry, file format `prof' is not yet supported\n"),
-- whoami);
-- done (1);
-+ if (output_style == 0)
-+ {
-+ output_style = STYLE_FLAT_PROFILE | STYLE_CALL_GRAPH;
-+ output_style &= ~user_specified;
-+ }
-+ if (prof_out_read (gmon_name))
-+ {
-+ fprintf (stderr,
-+ _("%s: %s failed, exam the error code\n"), whoami, "prof_out_read()" );
-+ return (gErrorCode);
-+ }
-+ tl_hist_assign_samples(); // no need if only for call-graph report?
-+ cg=tl_cg_assemble(); // no need if only for flat report?
- }
- else
- {
-@@ -583,13 +733,14 @@
-
- /* Do some simple sanity checks. */
- if ((output_style & STYLE_FLAT_PROFILE)
-- && !(gmon_input & INPUT_HISTOGRAM))
-+ &&!(gmon_input & (INPUT_HISTOGRAM | INPUT_TIMELINE1 | INPUT_TIMELINE2 | INPUT_TIMELINE3 | INPUT_TIMELINE4 | INPUT_TIMELINE5 | INPUT_TIMELINE6 | INPUT_TIMELINE7 | INPUT_TIMELINE8 | INPUT_TIMELINE9)))
- {
- fprintf (stderr, _("%s: gmon.out file is missing histogram\n"), whoami);
- done (1);
- }
-
-- if ((output_style & STYLE_CALL_GRAPH) && !(gmon_input & INPUT_CALL_GRAPH))
-+ if ((output_style & STYLE_CALL_GRAPH)
-+ &&!(gmon_input & (INPUT_CALL_GRAPH | INPUT_TIMELINE1 | INPUT_TIMELINE2 | INPUT_TIMELINE3 | INPUT_TIMELINE4 | INPUT_TIMELINE5 | INPUT_TIMELINE6 | INPUT_TIMELINE7 | INPUT_TIMELINE8 | INPUT_TIMELINE9)))
- {
- fprintf (stderr,
- _("%s: gmon.out file is missing call-graph data\n"), whoami);
-@@ -606,24 +757,55 @@
- if (output_style & STYLE_FLAT_PROFILE)
- {
- /* Print the flat profile. */
-- hist_print ();
-+ if (file_format == FF_PROF)
-+ {
-+ tl_hist_print ();
-+
-+ if (!(output_style & STYLE_CALL_GRAPH))
-+ tl_cg_print_index ();
-+ }
-+ else
-+ hist_print ();
- }
-
- if (cg && (output_style & STYLE_CALL_GRAPH))
- {
-- if (!bsd_style_output)
-- {
-- /* Print the dynamic profile. */
-- cg_print (cg);
-- }
-- cg_print_index ();
-+ if (do_timeline){
-+
-+ if (print_cgtimeline ())
-+ {
-+ fprintf (stderr,
-+ _("%s: %s failed, exam the error code\n"), whoami, "print_cgtimeline()" );
-+ return (gErrorCode);
-+ }
-+ }else if (cg)
-+ {
-+ if (!bsd_style_output)
-+ {
-+ /* Print the dynamic profile. */
-+ if (file_format == FF_PROF)
-+ tl_cg_print (cg);
-+ else
-+ cg_print (cg);
-+ }
-+
-+ if (file_format == FF_PROF)
-+ tl_cg_print_index ();
-+ else
-+ cg_print_index ();
-+ }
- }
-
- if (output_style & STYLE_EXEC_COUNTS)
- print_exec_counts ();
-
- if (output_style & STYLE_ANNOTATED_SOURCE)
-- print_annotated_source ();
-+ {
-+ if (do_timeline)
-+ print_bbtimeline ();
-+ else
-+ print_annotated_source ();
-+ }
-
- if (output_style & STYLE_FUNCTION_ORDER)
- cg_print_function_ordering ();
-@@ -631,6 +813,24 @@
- if (output_style & STYLE_FILE_ORDER)
- cg_print_file_ordering ();
-
-+ if (output_style & STYLE_CACHE_USAGE)
-+ print_cacheusage ();
-+
-+ if (do_timeline)
-+ unlink(prof_temp_file);
-+
-+// Analysis profile time
-+gettimeofday(&EndTime, NULL);
-+update_TotalProfileTime();
-+fprintf(log_fd, _("TotalProfileTime = %lld sec %lld usec\n"), (long long)TotalProfileTime.tv_sec, (long long)TotalProfileTime.tv_usec);
-+fprintf(log_fd, _("ReadProfOutDataTime = %lld sec %lld usec\n"), (long long)ReadProfOutDataTime.tv_sec, (long long)ReadProfOutDataTime.tv_usec);
-+fprintf(log_fd, _("ParsingProfileDataTime = %lld sec %lld usec\n"), (long long)ParsingProfileDataTime.tv_sec, (long long)ParsingProfileDataTime.tv_usec);
-+fprintf(log_fd, _("WriteTemplateFileTime = %lld sec %lld usec\n"), (long long)WriteTemplateFileTime.tv_sec, (long long)WriteTemplateFileTime.tv_usec);
-+fprintf(log_fd, _("ReadTemplateFileTime = %lld sec %lld usec\n"), (long long)ReadTemplateFileTime.tv_sec, (long long)ReadTemplateFileTime.tv_usec);
-+fprintf(log_fd, _("ProcessDataTime = %lld sec %lld usec\n"), (long long)ProcessDataTime.tv_sec, (long long)ProcessDataTime.tv_usec);
-+fprintf(log_fd, _("WriteTimelineBinFileTime = %lld sec %lld usec\n"), (long long)WriteTimelineBinFileTime.tv_sec, (long long)WriteTimelineBinFileTime.tv_usec);
-+fflush(log_fd);
-+
- return 0;
- }
-
-diff -Nur binutils-2.24.orig/gprof/gprof.h binutils-2.24/gprof/gprof.h
---- binutils-2.24.orig/gprof/gprof.h 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/gprof/gprof.h 2016-06-30 21:26:12.769897625 +0200
-@@ -57,6 +57,7 @@
- #define A_OUTNAME "a.out" /* default core filename */
- #define GMONNAME "gmon.out" /* default profile filename */
- #define GMONSUM "gmon.sum" /* profile summary filename */
-+#define PROFNAME "prof.out" /* extended profile filename */
-
- #ifdef HAVE_LOCALE_H
- # include <locale.h>
-@@ -76,6 +77,8 @@
- #define STYLE_GMON_INFO (1<<5)
- #define STYLE_FUNCTION_ORDER (1<<6)
- #define STYLE_FILE_ORDER (1<<7)
-+#define STYLE_BRANCH_PREDICT (1<<8)
-+#define STYLE_CACHE_USAGE (1<<9)
-
- #define ANYDEBUG (1<<0) /* 1 */
- #define DFNDEBUG (1<<1) /* 2 */
-@@ -117,8 +120,10 @@
- extern int debug_level; /* debug level */
- extern int output_style;
- extern int output_width; /* controls column width in index */
-+extern bfd_boolean do_timeline; /* timeline-based profiling data */
- extern bfd_boolean bsd_style_output; /* as opposed to FSF style output */
- extern bfd_boolean demangle; /* demangle symbol names? */
-+extern bfd_boolean discard_underscores; /* discard leading underscores? */
- extern bfd_boolean ignore_direct_calls; /* don't count direct calls */
- extern bfd_boolean ignore_static_funcs; /* suppress static functions */
- extern bfd_boolean ignore_zeros; /* ignore unused symbols/files */
-diff -Nur binutils-2.24.orig/gprof/gprof.info binutils-2.24/gprof/gprof.info
---- binutils-2.24.orig/gprof/gprof.info 2013-11-18 09:49:29.000000000 +0100
-+++ binutils-2.24/gprof/gprof.info 1970-01-01 01:00:00.000000000 +0100
-@@ -1,2474 +0,0 @@
--This is gprof.info, produced by makeinfo version 4.8 from gprof.texi.
--
--INFO-DIR-SECTION Software development
--START-INFO-DIR-ENTRY
--* gprof: (gprof). Profiling your program's execution
--END-INFO-DIR-ENTRY
--
-- This file documents the gprof profiler of the GNU system.
--
-- Copyright (C) 1988, 1992, 1997, 1998, 1999, 2000, 2001, 2003, 2007,
--2008, 2009 Free Software Foundation, Inc.
--
-- Permission is granted to copy, distribute and/or modify this document
--under the terms of the GNU Free Documentation License, Version 1.3 or
--any later version published by the Free Software Foundation; with no
--Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
--Texts. A copy of the license is included in the section entitled "GNU
--Free Documentation License".
--
--
--File: gprof.info, Node: Top, Next: Introduction, Up: (dir)
--
--Profiling a Program: Where Does It Spend Its Time?
--**************************************************
--
--This manual describes the GNU profiler, `gprof', and how you can use it
--to determine which parts of a program are taking most of the execution
--time. We assume that you know how to write, compile, and execute
--programs. GNU `gprof' was written by Jay Fenlason.
--
-- This manual is for `gprof' (GNU Binutils) version 2.23.91.
--
-- This document is distributed under the terms of the GNU Free
--Documentation License version 1.3. A copy of the license is included
--in the section entitled "GNU Free Documentation License".
--
--* Menu:
--
--* Introduction:: What profiling means, and why it is useful.
--
--* Compiling:: How to compile your program for profiling.
--* Executing:: Executing your program to generate profile data
--* Invoking:: How to run `gprof', and its options
--
--* Output:: Interpreting `gprof''s output
--
--* Inaccuracy:: Potential problems you should be aware of
--* How do I?:: Answers to common questions
--* Incompatibilities:: (between GNU `gprof' and Unix `gprof'.)
--* Details:: Details of how profiling is done
--* GNU Free Documentation License:: GNU Free Documentation License
--
--
--File: gprof.info, Node: Introduction, Next: Compiling, Prev: Top, Up: Top
--
--1 Introduction to Profiling
--***************************
--
--Profiling allows you to learn where your program spent its time and
--which functions called which other functions while it was executing.
--This information can show you which pieces of your program are slower
--than you expected, and might be candidates for rewriting to make your
--program execute faster. It can also tell you which functions are being
--called more or less often than you expected. This may help you spot
--bugs that had otherwise been unnoticed.
--
-- Since the profiler uses information collected during the actual
--execution of your program, it can be used on programs that are too
--large or too complex to analyze by reading the source. However, how
--your program is run will affect the information that shows up in the
--profile data. If you don't use some feature of your program while it
--is being profiled, no profile information will be generated for that
--feature.
--
-- Profiling has several steps:
--
-- * You must compile and link your program with profiling enabled.
-- *Note Compiling a Program for Profiling: Compiling.
--
-- * You must execute your program to generate a profile data file.
-- *Note Executing the Program: Executing.
--
-- * You must run `gprof' to analyze the profile data. *Note `gprof'
-- Command Summary: Invoking.
--
-- The next three chapters explain these steps in greater detail.
--
-- Several forms of output are available from the analysis.
--
-- The "flat profile" shows how much time your program spent in each
--function, and how many times that function was called. If you simply
--want to know which functions burn most of the cycles, it is stated
--concisely here. *Note The Flat Profile: Flat Profile.
--
-- The "call graph" shows, for each function, which functions called
--it, which other functions it called, and how many times. There is also
--an estimate of how much time was spent in the subroutines of each
--function. This can suggest places where you might try to eliminate
--function calls that use a lot of time. *Note The Call Graph: Call
--Graph.
--
-- The "annotated source" listing is a copy of the program's source
--code, labeled with the number of times each line of the program was
--executed. *Note The Annotated Source Listing: Annotated Source.
--
-- To better understand how profiling works, you may wish to read a
--description of its implementation. *Note Implementation of Profiling:
--Implementation.
--
--
--File: gprof.info, Node: Compiling, Next: Executing, Prev: Introduction, Up: Top
--
--2 Compiling a Program for Profiling
--***********************************
--
--The first step in generating profile information for your program is to
--compile and link it with profiling enabled.
--
-- To compile a source file for profiling, specify the `-pg' option when
--you run the compiler. (This is in addition to the options you normally
--use.)
--
-- To link the program for profiling, if you use a compiler such as `cc'
--to do the linking, simply specify `-pg' in addition to your usual
--options. The same option, `-pg', alters either compilation or linking
--to do what is necessary for profiling. Here are examples:
--
-- cc -g -c myprog.c utils.c -pg
-- cc -o myprog myprog.o utils.o -pg
--
-- The `-pg' option also works with a command that both compiles and
--links:
--
-- cc -o myprog myprog.c utils.c -g -pg
--
-- Note: The `-pg' option must be part of your compilation options as
--well as your link options. If it is not then no call-graph data will
--be gathered and when you run `gprof' you will get an error message like
--this:
--
-- gprof: gmon.out file is missing call-graph data
--
-- If you add the `-Q' switch to suppress the printing of the call
--graph data you will still be able to see the time samples:
--
-- Flat profile:
--
-- Each sample counts as 0.01 seconds.
-- % cumulative self self total
-- time seconds seconds calls Ts/call Ts/call name
-- 44.12 0.07 0.07 zazLoop
-- 35.29 0.14 0.06 main
-- 20.59 0.17 0.04 bazMillion
--
-- If you run the linker `ld' directly instead of through a compiler
--such as `cc', you may have to specify a profiling startup file
--`gcrt0.o' as the first input file instead of the usual startup file
--`crt0.o'. In addition, you would probably want to specify the
--profiling C library, `libc_p.a', by writing `-lc_p' instead of the
--usual `-lc'. This is not absolutely necessary, but doing this gives
--you number-of-calls information for standard library functions such as
--`read' and `open'. For example:
--
-- ld -o myprog /lib/gcrt0.o myprog.o utils.o -lc_p
--
-- If you are running the program on a system which supports shared
--libraries you may run into problems with the profiling support code in
--a shared library being called before that library has been fully
--initialised. This is usually detected by the program encountering a
--segmentation fault as soon as it is run. The solution is to link
--against a static version of the library containing the profiling
--support code, which for `gcc' users can be done via the `-static' or
--`-static-libgcc' command line option. For example:
--
-- gcc -g -pg -static-libgcc myprog.c utils.c -o myprog
--
-- If you compile only some of the modules of the program with `-pg',
--you can still profile the program, but you won't get complete
--information about the modules that were compiled without `-pg'. The
--only information you get for the functions in those modules is the
--total time spent in them; there is no record of how many times they
--were called, or from where. This will not affect the flat profile
--(except that the `calls' field for the functions will be blank), but
--will greatly reduce the usefulness of the call graph.
--
-- If you wish to perform line-by-line profiling you should use the
--`gcov' tool instead of `gprof'. See that tool's manual or info pages
--for more details of how to do this.
--
-- Note, older versions of `gcc' produce line-by-line profiling
--information that works with `gprof' rather than `gcov' so there is
--still support for displaying this kind of information in `gprof'. *Note
--Line-by-line Profiling: Line-by-line.
--
-- It also worth noting that `gcc' implements a
--`-finstrument-functions' command line option which will insert calls to
--special user supplied instrumentation routines at the entry and exit of
--every function in their program. This can be used to implement an
--alternative profiling scheme.
--
--
--File: gprof.info, Node: Executing, Next: Invoking, Prev: Compiling, Up: Top
--
--3 Executing the Program
--***********************
--
--Once the program is compiled for profiling, you must run it in order to
--generate the information that `gprof' needs. Simply run the program as
--usual, using the normal arguments, file names, etc. The program should
--run normally, producing the same output as usual. It will, however, run
--somewhat slower than normal because of the time spent collecting and
--writing the profile data.
--
-- The way you run the program--the arguments and input that you give
--it--may have a dramatic effect on what the profile information shows.
--The profile data will describe the parts of the program that were
--activated for the particular input you use. For example, if the first
--command you give to your program is to quit, the profile data will show
--the time used in initialization and in cleanup, but not much else.
--
-- Your program will write the profile data into a file called
--`gmon.out' just before exiting. If there is already a file called
--`gmon.out', its contents are overwritten. There is currently no way to
--tell the program to write the profile data under a different name, but
--you can rename the file afterwards if you are concerned that it may be
--overwritten.
--
-- In order to write the `gmon.out' file properly, your program must
--exit normally: by returning from `main' or by calling `exit'. Calling
--the low-level function `_exit' does not write the profile data, and
--neither does abnormal termination due to an unhandled signal.
--
-- The `gmon.out' file is written in the program's _current working
--directory_ at the time it exits. This means that if your program calls
--`chdir', the `gmon.out' file will be left in the last directory your
--program `chdir''d to. If you don't have permission to write in this
--directory, the file is not written, and you will get an error message.
--
-- Older versions of the GNU profiling library may also write a file
--called `bb.out'. This file, if present, contains an human-readable
--listing of the basic-block execution counts. Unfortunately, the
--appearance of a human-readable `bb.out' means the basic-block counts
--didn't get written into `gmon.out'. The Perl script `bbconv.pl',
--included with the `gprof' source distribution, will convert a `bb.out'
--file into a format readable by `gprof'. Invoke it like this:
--
-- bbconv.pl < bb.out > BH-DATA
--
-- This translates the information in `bb.out' into a form that `gprof'
--can understand. But you still need to tell `gprof' about the existence
--of this translated information. To do that, include BB-DATA on the
--`gprof' command line, _along with `gmon.out'_, like this:
--
-- gprof OPTIONS EXECUTABLE-FILE gmon.out BB-DATA [YET-MORE-PROFILE-DATA-FILES...] [> OUTFILE]
--
--
--File: gprof.info, Node: Invoking, Next: Output, Prev: Executing, Up: Top
--
--4 `gprof' Command Summary
--*************************
--
--After you have a profile data file `gmon.out', you can run `gprof' to
--interpret the information in it. The `gprof' program prints a flat
--profile and a call graph on standard output. Typically you would
--redirect the output of `gprof' into a file with `>'.
--
-- You run `gprof' like this:
--
-- gprof OPTIONS [EXECUTABLE-FILE [PROFILE-DATA-FILES...]] [> OUTFILE]
--
--Here square-brackets indicate optional arguments.
--
-- If you omit the executable file name, the file `a.out' is used. If
--you give no profile data file name, the file `gmon.out' is used. If
--any file is not in the proper format, or if the profile data file does
--not appear to belong to the executable file, an error message is
--printed.
--
-- You can give more than one profile data file by entering all their
--names after the executable file name; then the statistics in all the
--data files are summed together.
--
-- The order of these options does not matter.
--
--* Menu:
--
--* Output Options:: Controlling `gprof''s output style
--* Analysis Options:: Controlling how `gprof' analyzes its data
--* Miscellaneous Options::
--* Deprecated Options:: Options you no longer need to use, but which
-- have been retained for compatibility
--* Symspecs:: Specifying functions to include or exclude
--
--
--File: gprof.info, Node: Output Options, Next: Analysis Options, Up: Invoking
--
--4.1 Output Options
--==================
--
--These options specify which of several output formats `gprof' should
--produce.
--
-- Many of these options take an optional "symspec" to specify
--functions to be included or excluded. These options can be specified
--multiple times, with different symspecs, to include or exclude sets of
--symbols. *Note Symspecs: Symspecs.
--
-- Specifying any of these options overrides the default (`-p -q'),
--which prints a flat profile and call graph analysis for all functions.
--
--`-A[SYMSPEC]'
--`--annotated-source[=SYMSPEC]'
-- The `-A' option causes `gprof' to print annotated source code. If
-- SYMSPEC is specified, print output only for matching symbols.
-- *Note The Annotated Source Listing: Annotated Source.
--
--`-b'
--`--brief'
-- If the `-b' option is given, `gprof' doesn't print the verbose
-- blurbs that try to explain the meaning of all of the fields in the
-- tables. This is useful if you intend to print out the output, or
-- are tired of seeing the blurbs.
--
--`-C[SYMSPEC]'
--`--exec-counts[=SYMSPEC]'
-- The `-C' option causes `gprof' to print a tally of functions and
-- the number of times each was called. If SYMSPEC is specified,
-- print tally only for matching symbols.
--
-- If the profile data file contains basic-block count records,
-- specifying the `-l' option, along with `-C', will cause basic-block
-- execution counts to be tallied and displayed.
--
--`-i'
--`--file-info'
-- The `-i' option causes `gprof' to display summary information
-- about the profile data file(s) and then exit. The number of
-- histogram, call graph, and basic-block count records is displayed.
--
--`-I DIRS'
--`--directory-path=DIRS'
-- The `-I' option specifies a list of search directories in which to
-- find source files. Environment variable GPROF_PATH can also be
-- used to convey this information. Used mostly for annotated source
-- output.
--
--`-J[SYMSPEC]'
--`--no-annotated-source[=SYMSPEC]'
-- The `-J' option causes `gprof' not to print annotated source code.
-- If SYMSPEC is specified, `gprof' prints annotated source, but
-- excludes matching symbols.
--
--`-L'
--`--print-path'
-- Normally, source filenames are printed with the path component
-- suppressed. The `-L' option causes `gprof' to print the full
-- pathname of source filenames, which is determined from symbolic
-- debugging information in the image file and is relative to the
-- directory in which the compiler was invoked.
--
--`-p[SYMSPEC]'
--`--flat-profile[=SYMSPEC]'
-- The `-p' option causes `gprof' to print a flat profile. If
-- SYMSPEC is specified, print flat profile only for matching symbols.
-- *Note The Flat Profile: Flat Profile.
--
--`-P[SYMSPEC]'
--`--no-flat-profile[=SYMSPEC]'
-- The `-P' option causes `gprof' to suppress printing a flat profile.
-- If SYMSPEC is specified, `gprof' prints a flat profile, but
-- excludes matching symbols.
--
--`-q[SYMSPEC]'
--`--graph[=SYMSPEC]'
-- The `-q' option causes `gprof' to print the call graph analysis.
-- If SYMSPEC is specified, print call graph only for matching symbols
-- and their children. *Note The Call Graph: Call Graph.
--
--`-Q[SYMSPEC]'
--`--no-graph[=SYMSPEC]'
-- The `-Q' option causes `gprof' to suppress printing the call graph.
-- If SYMSPEC is specified, `gprof' prints a call graph, but excludes
-- matching symbols.
--
--`-t'
--`--table-length=NUM'
-- The `-t' option causes the NUM most active source lines in each
-- source file to be listed when source annotation is enabled. The
-- default is 10.
--
--`-y'
--`--separate-files'
-- This option affects annotated source output only. Normally,
-- `gprof' prints annotated source files to standard-output. If this
-- option is specified, annotated source for a file named
-- `path/FILENAME' is generated in the file `FILENAME-ann'. If the
-- underlying file system would truncate `FILENAME-ann' so that it
-- overwrites the original `FILENAME', `gprof' generates annotated
-- source in the file `FILENAME.ann' instead (if the original file
-- name has an extension, that extension is _replaced_ with `.ann').
--
--`-Z[SYMSPEC]'
--`--no-exec-counts[=SYMSPEC]'
-- The `-Z' option causes `gprof' not to print a tally of functions
-- and the number of times each was called. If SYMSPEC is specified,
-- print tally, but exclude matching symbols.
--
--`-r'
--`--function-ordering'
-- The `--function-ordering' option causes `gprof' to print a
-- suggested function ordering for the program based on profiling
-- data. This option suggests an ordering which may improve paging,
-- tlb and cache behavior for the program on systems which support
-- arbitrary ordering of functions in an executable.
--
-- The exact details of how to force the linker to place functions in
-- a particular order is system dependent and out of the scope of this
-- manual.
--
--`-R MAP_FILE'
--`--file-ordering MAP_FILE'
-- The `--file-ordering' option causes `gprof' to print a suggested
-- .o link line ordering for the program based on profiling data.
-- This option suggests an ordering which may improve paging, tlb and
-- cache behavior for the program on systems which do not support
-- arbitrary ordering of functions in an executable.
--
-- Use of the `-a' argument is highly recommended with this option.
--
-- The MAP_FILE argument is a pathname to a file which provides
-- function name to object file mappings. The format of the file is
-- similar to the output of the program `nm'.
--
-- c-parse.o:00000000 T yyparse
-- c-parse.o:00000004 C yyerrflag
-- c-lang.o:00000000 T maybe_objc_method_name
-- c-lang.o:00000000 T print_lang_statistics
-- c-lang.o:00000000 T recognize_objc_keyword
-- c-decl.o:00000000 T print_lang_identifier
-- c-decl.o:00000000 T print_lang_type
-- ...
--
-- To create a MAP_FILE with GNU `nm', type a command like `nm
-- --extern-only --defined-only -v --print-file-name program-name'.
--
--`-T'
--`--traditional'
-- The `-T' option causes `gprof' to print its output in
-- "traditional" BSD style.
--
--`-w WIDTH'
--`--width=WIDTH'
-- Sets width of output lines to WIDTH. Currently only used when
-- printing the function index at the bottom of the call graph.
--
--`-x'
--`--all-lines'
-- This option affects annotated source output only. By default,
-- only the lines at the beginning of a basic-block are annotated.
-- If this option is specified, every line in a basic-block is
-- annotated by repeating the annotation for the first line. This
-- behavior is similar to `tcov''s `-a'.
--
--`--demangle[=STYLE]'
--`--no-demangle'
-- These options control whether C++ symbol names should be demangled
-- when printing output. The default is to demangle symbols. The
-- `--no-demangle' option may be used to turn off demangling.
-- Different compilers have different mangling styles. The optional
-- demangling style argument can be used to choose an appropriate
-- demangling style for your compiler.
--
--
--File: gprof.info, Node: Analysis Options, Next: Miscellaneous Options, Prev: Output Options, Up: Invoking
--
--4.2 Analysis Options
--====================
--
--`-a'
--`--no-static'
-- The `-a' option causes `gprof' to suppress the printing of
-- statically declared (private) functions. (These are functions
-- whose names are not listed as global, and which are not visible
-- outside the file/function/block where they were defined.) Time
-- spent in these functions, calls to/from them, etc., will all be
-- attributed to the function that was loaded directly before it in
-- the executable file. This option affects both the flat profile
-- and the call graph.
--
--`-c'
--`--static-call-graph'
-- The `-c' option causes the call graph of the program to be
-- augmented by a heuristic which examines the text space of the
-- object file and identifies function calls in the binary machine
-- code. Since normal call graph records are only generated when
-- functions are entered, this option identifies children that could
-- have been called, but never were. Calls to functions that were
-- not compiled with profiling enabled are also identified, but only
-- if symbol table entries are present for them. Calls to dynamic
-- library routines are typically _not_ found by this option.
-- Parents or children identified via this heuristic are indicated in
-- the call graph with call counts of `0'.
--
--`-D'
--`--ignore-non-functions'
-- The `-D' option causes `gprof' to ignore symbols which are not
-- known to be functions. This option will give more accurate
-- profile data on systems where it is supported (Solaris and HPUX for
-- example).
--
--`-k FROM/TO'
-- The `-k' option allows you to delete from the call graph any arcs
-- from symbols matching symspec FROM to those matching symspec TO.
--
--`-l'
--`--line'
-- The `-l' option enables line-by-line profiling, which causes
-- histogram hits to be charged to individual source code lines,
-- instead of functions. This feature only works with programs
-- compiled by older versions of the `gcc' compiler. Newer versions
-- of `gcc' are designed to work with the `gcov' tool instead.
--
-- If the program was compiled with basic-block counting enabled,
-- this option will also identify how many times each line of code
-- was executed. While line-by-line profiling can help isolate where
-- in a large function a program is spending its time, it also
-- significantly increases the running time of `gprof', and magnifies
-- statistical inaccuracies. *Note Statistical Sampling Error:
-- Sampling Error.
--
--`-m NUM'
--`--min-count=NUM'
-- This option affects execution count output only. Symbols that are
-- executed less than NUM times are suppressed.
--
--`-nSYMSPEC'
--`--time=SYMSPEC'
-- The `-n' option causes `gprof', in its call graph analysis, to
-- only propagate times for symbols matching SYMSPEC.
--
--`-NSYMSPEC'
--`--no-time=SYMSPEC'
-- The `-n' option causes `gprof', in its call graph analysis, not to
-- propagate times for symbols matching SYMSPEC.
--
--`-SFILENAME'
--`--external-symbol-table=FILENAME'
-- The `-S' option causes `gprof' to read an external symbol table
-- file, such as `/proc/kallsyms', rather than read the symbol table
-- from the given object file (the default is `a.out'). This is useful
-- for profiling kernel modules.
--
--`-z'
--`--display-unused-functions'
-- If you give the `-z' option, `gprof' will mention all functions in
-- the flat profile, even those that were never called, and that had
-- no time spent in them. This is useful in conjunction with the
-- `-c' option for discovering which routines were never called.
--
--
--
--File: gprof.info, Node: Miscellaneous Options, Next: Deprecated Options, Prev: Analysis Options, Up: Invoking
--
--4.3 Miscellaneous Options
--=========================
--
--`-d[NUM]'
--`--debug[=NUM]'
-- The `-d NUM' option specifies debugging options. If NUM is not
-- specified, enable all debugging. *Note Debugging `gprof':
-- Debugging.
--
--`-h'
--`--help'
-- The `-h' option prints command line usage.
--
--`-ONAME'
--`--file-format=NAME'
-- Selects the format of the profile data files. Recognized formats
-- are `auto' (the default), `bsd', `4.4bsd', `magic', and `prof'
-- (not yet supported).
--
--`-s'
--`--sum'
-- The `-s' option causes `gprof' to summarize the information in the
-- profile data files it read in, and write out a profile data file
-- called `gmon.sum', which contains all the information from the
-- profile data files that `gprof' read in. The file `gmon.sum' may
-- be one of the specified input files; the effect of this is to
-- merge the data in the other input files into `gmon.sum'.
--
-- Eventually you can run `gprof' again without `-s' to analyze the
-- cumulative data in the file `gmon.sum'.
--
--`-v'
--`--version'
-- The `-v' flag causes `gprof' to print the current version number,
-- and then exit.
--
--
--
--File: gprof.info, Node: Deprecated Options, Next: Symspecs, Prev: Miscellaneous Options, Up: Invoking
--
--4.4 Deprecated Options
--======================
--
--These options have been replaced with newer versions that use symspecs.
--
--`-e FUNCTION_NAME'
-- The `-e FUNCTION' option tells `gprof' to not print information
-- about the function FUNCTION_NAME (and its children...) in the call
-- graph. The function will still be listed as a child of any
-- functions that call it, but its index number will be shown as
-- `[not printed]'. More than one `-e' option may be given; only one
-- FUNCTION_NAME may be indicated with each `-e' option.
--
--`-E FUNCTION_NAME'
-- The `-E FUNCTION' option works like the `-e' option, but time
-- spent in the function (and children who were not called from
-- anywhere else), will not be used to compute the
-- percentages-of-time for the call graph. More than one `-E' option
-- may be given; only one FUNCTION_NAME may be indicated with each
-- `-E' option.
--
--`-f FUNCTION_NAME'
-- The `-f FUNCTION' option causes `gprof' to limit the call graph to
-- the function FUNCTION_NAME and its children (and their
-- children...). More than one `-f' option may be given; only one
-- FUNCTION_NAME may be indicated with each `-f' option.
--
--`-F FUNCTION_NAME'
-- The `-F FUNCTION' option works like the `-f' option, but only time
-- spent in the function and its children (and their children...)
-- will be used to determine total-time and percentages-of-time for
-- the call graph. More than one `-F' option may be given; only one
-- FUNCTION_NAME may be indicated with each `-F' option. The `-F'
-- option overrides the `-E' option.
--
--
-- Note that only one function can be specified with each `-e', `-E',
--`-f' or `-F' option. To specify more than one function, use multiple
--options. For example, this command:
--
-- gprof -e boring -f foo -f bar myprogram > gprof.output
--
--lists in the call graph all functions that were reached from either
--`foo' or `bar' and were not reachable from `boring'.
--
--
--File: gprof.info, Node: Symspecs, Prev: Deprecated Options, Up: Invoking
--
--4.5 Symspecs
--============
--
--Many of the output options allow functions to be included or excluded
--using "symspecs" (symbol specifications), which observe the following
--syntax:
--
-- filename_containing_a_dot
-- | funcname_not_containing_a_dot
-- | linenumber
-- | ( [ any_filename ] `:' ( any_funcname | linenumber ) )
--
-- Here are some sample symspecs:
--
--`main.c'
-- Selects everything in file `main.c'--the dot in the string tells
-- `gprof' to interpret the string as a filename, rather than as a
-- function name. To select a file whose name does not contain a
-- dot, a trailing colon should be specified. For example, `odd:' is
-- interpreted as the file named `odd'.
--
--`main'
-- Selects all functions named `main'.
--
-- Note that there may be multiple instances of the same function name
-- because some of the definitions may be local (i.e., static).
-- Unless a function name is unique in a program, you must use the
-- colon notation explained below to specify a function from a
-- specific source file.
--
-- Sometimes, function names contain dots. In such cases, it is
-- necessary to add a leading colon to the name. For example,
-- `:.mul' selects function `.mul'.
--
-- In some object file formats, symbols have a leading underscore.
-- `gprof' will normally not print these underscores. When you name a
-- symbol in a symspec, you should type it exactly as `gprof' prints
-- it in its output. For example, if the compiler produces a symbol
-- `_main' from your `main' function, `gprof' still prints it as
-- `main' in its output, so you should use `main' in symspecs.
--
--`main.c:main'
-- Selects function `main' in file `main.c'.
--
--`main.c:134'
-- Selects line 134 in file `main.c'.
--
--
--File: gprof.info, Node: Output, Next: Inaccuracy, Prev: Invoking, Up: Top
--
--5 Interpreting `gprof''s Output
--*******************************
--
--`gprof' can produce several different output styles, the most important
--of which are described below. The simplest output styles (file
--information, execution count, and function and file ordering) are not
--described here, but are documented with the respective options that
--trigger them. *Note Output Options: Output Options.
--
--* Menu:
--
--* Flat Profile:: The flat profile shows how much time was spent
-- executing directly in each function.
--* Call Graph:: The call graph shows which functions called which
-- others, and how much time each function used
-- when its subroutine calls are included.
--* Line-by-line:: `gprof' can analyze individual source code lines
--* Annotated Source:: The annotated source listing displays source code
-- labeled with execution counts
--
--
--File: gprof.info, Node: Flat Profile, Next: Call Graph, Up: Output
--
--5.1 The Flat Profile
--====================
--
--The "flat profile" shows the total amount of time your program spent
--executing each function. Unless the `-z' option is given, functions
--with no apparent time spent in them, and no apparent calls to them, are
--not mentioned. Note that if a function was not compiled for profiling,
--and didn't run long enough to show up on the program counter histogram,
--it will be indistinguishable from a function that was never called.
--
-- This is part of a flat profile for a small program:
--
-- Flat profile:
--
-- Each sample counts as 0.01 seconds.
-- % cumulative self self total
-- time seconds seconds calls ms/call ms/call name
-- 33.34 0.02 0.02 7208 0.00 0.00 open
-- 16.67 0.03 0.01 244 0.04 0.12 offtime
-- 16.67 0.04 0.01 8 1.25 1.25 memccpy
-- 16.67 0.05 0.01 7 1.43 1.43 write
-- 16.67 0.06 0.01 mcount
-- 0.00 0.06 0.00 236 0.00 0.00 tzset
-- 0.00 0.06 0.00 192 0.00 0.00 tolower
-- 0.00 0.06 0.00 47 0.00 0.00 strlen
-- 0.00 0.06 0.00 45 0.00 0.00 strchr
-- 0.00 0.06 0.00 1 0.00 50.00 main
-- 0.00 0.06 0.00 1 0.00 0.00 memcpy
-- 0.00 0.06 0.00 1 0.00 10.11 print
-- 0.00 0.06 0.00 1 0.00 0.00 profil
-- 0.00 0.06 0.00 1 0.00 50.00 report
-- ...
--
--The functions are sorted first by decreasing run-time spent in them,
--then by decreasing number of calls, then alphabetically by name. The
--functions `mcount' and `profil' are part of the profiling apparatus and
--appear in every flat profile; their time gives a measure of the amount
--of overhead due to profiling.
--
-- Just before the column headers, a statement appears indicating how
--much time each sample counted as. This "sampling period" estimates the
--margin of error in each of the time figures. A time figure that is not
--much larger than this is not reliable. In this example, each sample
--counted as 0.01 seconds, suggesting a 100 Hz sampling rate. The
--program's total execution time was 0.06 seconds, as indicated by the
--`cumulative seconds' field. Since each sample counted for 0.01
--seconds, this means only six samples were taken during the run. Two of
--the samples occurred while the program was in the `open' function, as
--indicated by the `self seconds' field. Each of the other four samples
--occurred one each in `offtime', `memccpy', `write', and `mcount'.
--Since only six samples were taken, none of these values can be regarded
--as particularly reliable. In another run, the `self seconds' field for
--`mcount' might well be `0.00' or `0.02'. *Note Statistical Sampling
--Error: Sampling Error, for a complete discussion.
--
-- The remaining functions in the listing (those whose `self seconds'
--field is `0.00') didn't appear in the histogram samples at all.
--However, the call graph indicated that they were called, so therefore
--they are listed, sorted in decreasing order by the `calls' field.
--Clearly some time was spent executing these functions, but the paucity
--of histogram samples prevents any determination of how much time each
--took.
--
-- Here is what the fields in each line mean:
--
--`% time'
-- This is the percentage of the total execution time your program
-- spent in this function. These should all add up to 100%.
--
--`cumulative seconds'
-- This is the cumulative total number of seconds the computer spent
-- executing this functions, plus the time spent in all the functions
-- above this one in this table.
--
--`self seconds'
-- This is the number of seconds accounted for by this function alone.
-- The flat profile listing is sorted first by this number.
--
--`calls'
-- This is the total number of times the function was called. If the
-- function was never called, or the number of times it was called
-- cannot be determined (probably because the function was not
-- compiled with profiling enabled), the "calls" field is blank.
--
--`self ms/call'
-- This represents the average number of milliseconds spent in this
-- function per call, if this function is profiled. Otherwise, this
-- field is blank for this function.
--
--`total ms/call'
-- This represents the average number of milliseconds spent in this
-- function and its descendants per call, if this function is
-- profiled. Otherwise, this field is blank for this function. This
-- is the only field in the flat profile that uses call graph
-- analysis.
--
--`name'
-- This is the name of the function. The flat profile is sorted by
-- this field alphabetically after the "self seconds" and "calls"
-- fields are sorted.
--
--
--File: gprof.info, Node: Call Graph, Next: Line-by-line, Prev: Flat Profile, Up: Output
--
--5.2 The Call Graph
--==================
--
--The "call graph" shows how much time was spent in each function and its
--children. From this information, you can find functions that, while
--they themselves may not have used much time, called other functions
--that did use unusual amounts of time.
--
-- Here is a sample call from a small program. This call came from the
--same `gprof' run as the flat profile example in the previous section.
--
-- granularity: each sample hit covers 2 byte(s) for 20.00% of 0.05 seconds
--
-- index % time self children called name
-- <spontaneous>
-- [1] 100.0 0.00 0.05 start [1]
-- 0.00 0.05 1/1 main [2]
-- 0.00 0.00 1/2 on_exit [28]
-- 0.00 0.00 1/1 exit [59]
-- -----------------------------------------------
-- 0.00 0.05 1/1 start [1]
-- [2] 100.0 0.00 0.05 1 main [2]
-- 0.00 0.05 1/1 report [3]
-- -----------------------------------------------
-- 0.00 0.05 1/1 main [2]
-- [3] 100.0 0.00 0.05 1 report [3]
-- 0.00 0.03 8/8 timelocal [6]
-- 0.00 0.01 1/1 print [9]
-- 0.00 0.01 9/9 fgets [12]
-- 0.00 0.00 12/34 strncmp <cycle 1> [40]
-- 0.00 0.00 8/8 lookup [20]
-- 0.00 0.00 1/1 fopen [21]
-- 0.00 0.00 8/8 chewtime [24]
-- 0.00 0.00 8/16 skipspace [44]
-- -----------------------------------------------
-- [4] 59.8 0.01 0.02 8+472 <cycle 2 as a whole> [4]
-- 0.01 0.02 244+260 offtime <cycle 2> [7]
-- 0.00 0.00 236+1 tzset <cycle 2> [26]
-- -----------------------------------------------
--
-- The lines full of dashes divide this table into "entries", one for
--each function. Each entry has one or more lines.
--
-- In each entry, the primary line is the one that starts with an index
--number in square brackets. The end of this line says which function
--the entry is for. The preceding lines in the entry describe the
--callers of this function and the following lines describe its
--subroutines (also called "children" when we speak of the call graph).
--
-- The entries are sorted by time spent in the function and its
--subroutines.
--
-- The internal profiling function `mcount' (*note The Flat Profile:
--Flat Profile.) is never mentioned in the call graph.
--
--* Menu:
--
--* Primary:: Details of the primary line's contents.
--* Callers:: Details of caller-lines' contents.
--* Subroutines:: Details of subroutine-lines' contents.
--* Cycles:: When there are cycles of recursion,
-- such as `a' calls `b' calls `a'...
--
--
--File: gprof.info, Node: Primary, Next: Callers, Up: Call Graph
--
--5.2.1 The Primary Line
------------------------
--
--The "primary line" in a call graph entry is the line that describes the
--function which the entry is about and gives the overall statistics for
--this function.
--
-- For reference, we repeat the primary line from the entry for function
--`report' in our main example, together with the heading line that shows
--the names of the fields:
--
-- index % time self children called name
-- ...
-- [3] 100.0 0.00 0.05 1 report [3]
--
-- Here is what the fields in the primary line mean:
--
--`index'
-- Entries are numbered with consecutive integers. Each function
-- therefore has an index number, which appears at the beginning of
-- its primary line.
--
-- Each cross-reference to a function, as a caller or subroutine of
-- another, gives its index number as well as its name. The index
-- number guides you if you wish to look for the entry for that
-- function.
--
--`% time'
-- This is the percentage of the total time that was spent in this
-- function, including time spent in subroutines called from this
-- function.
--
-- The time spent in this function is counted again for the callers of
-- this function. Therefore, adding up these percentages is
-- meaningless.
--
--`self'
-- This is the total amount of time spent in this function. This
-- should be identical to the number printed in the `seconds' field
-- for this function in the flat profile.
--
--`children'
-- This is the total amount of time spent in the subroutine calls
-- made by this function. This should be equal to the sum of all the
-- `self' and `children' entries of the children listed directly
-- below this function.
--
--`called'
-- This is the number of times the function was called.
--
-- If the function called itself recursively, there are two numbers,
-- separated by a `+'. The first number counts non-recursive calls,
-- and the second counts recursive calls.
--
-- In the example above, the function `report' was called once from
-- `main'.
--
--`name'
-- This is the name of the current function. The index number is
-- repeated after it.
--
-- If the function is part of a cycle of recursion, the cycle number
-- is printed between the function's name and the index number (*note
-- How Mutually Recursive Functions Are Described: Cycles.). For
-- example, if function `gnurr' is part of cycle number one, and has
-- index number twelve, its primary line would be end like this:
--
-- gnurr <cycle 1> [12]
--
--
--File: gprof.info, Node: Callers, Next: Subroutines, Prev: Primary, Up: Call Graph
--
--5.2.2 Lines for a Function's Callers
--------------------------------------
--
--A function's entry has a line for each function it was called by.
--These lines' fields correspond to the fields of the primary line, but
--their meanings are different because of the difference in context.
--
-- For reference, we repeat two lines from the entry for the function
--`report', the primary line and one caller-line preceding it, together
--with the heading line that shows the names of the fields:
--
-- index % time self children called name
-- ...
-- 0.00 0.05 1/1 main [2]
-- [3] 100.0 0.00 0.05 1 report [3]
--
-- Here are the meanings of the fields in the caller-line for `report'
--called from `main':
--
--`self'
-- An estimate of the amount of time spent in `report' itself when it
-- was called from `main'.
--
--`children'
-- An estimate of the amount of time spent in subroutines of `report'
-- when `report' was called from `main'.
--
-- The sum of the `self' and `children' fields is an estimate of the
-- amount of time spent within calls to `report' from `main'.
--
--`called'
-- Two numbers: the number of times `report' was called from `main',
-- followed by the total number of non-recursive calls to `report'
-- from all its callers.
--
--`name and index number'
-- The name of the caller of `report' to which this line applies,
-- followed by the caller's index number.
--
-- Not all functions have entries in the call graph; some options to
-- `gprof' request the omission of certain functions. When a caller
-- has no entry of its own, it still has caller-lines in the entries
-- of the functions it calls.
--
-- If the caller is part of a recursion cycle, the cycle number is
-- printed between the name and the index number.
--
-- If the identity of the callers of a function cannot be determined, a
--dummy caller-line is printed which has `<spontaneous>' as the "caller's
--name" and all other fields blank. This can happen for signal handlers.
--
--
--File: gprof.info, Node: Subroutines, Next: Cycles, Prev: Callers, Up: Call Graph
--
--5.2.3 Lines for a Function's Subroutines
------------------------------------------
--
--A function's entry has a line for each of its subroutines--in other
--words, a line for each other function that it called. These lines'
--fields correspond to the fields of the primary line, but their meanings
--are different because of the difference in context.
--
-- For reference, we repeat two lines from the entry for the function
--`main', the primary line and a line for a subroutine, together with the
--heading line that shows the names of the fields:
--
-- index % time self children called name
-- ...
-- [2] 100.0 0.00 0.05 1 main [2]
-- 0.00 0.05 1/1 report [3]
--
-- Here are the meanings of the fields in the subroutine-line for `main'
--calling `report':
--
--`self'
-- An estimate of the amount of time spent directly within `report'
-- when `report' was called from `main'.
--
--`children'
-- An estimate of the amount of time spent in subroutines of `report'
-- when `report' was called from `main'.
--
-- The sum of the `self' and `children' fields is an estimate of the
-- total time spent in calls to `report' from `main'.
--
--`called'
-- Two numbers, the number of calls to `report' from `main' followed
-- by the total number of non-recursive calls to `report'. This
-- ratio is used to determine how much of `report''s `self' and
-- `children' time gets credited to `main'. *Note Estimating
-- `children' Times: Assumptions.
--
--`name'
-- The name of the subroutine of `main' to which this line applies,
-- followed by the subroutine's index number.
--
-- If the caller is part of a recursion cycle, the cycle number is
-- printed between the name and the index number.
--
--
--File: gprof.info, Node: Cycles, Prev: Subroutines, Up: Call Graph
--
--5.2.4 How Mutually Recursive Functions Are Described
------------------------------------------------------
--
--The graph may be complicated by the presence of "cycles of recursion"
--in the call graph. A cycle exists if a function calls another function
--that (directly or indirectly) calls (or appears to call) the original
--function. For example: if `a' calls `b', and `b' calls `a', then `a'
--and `b' form a cycle.
--
-- Whenever there are call paths both ways between a pair of functions,
--they belong to the same cycle. If `a' and `b' call each other and `b'
--and `c' call each other, all three make one cycle. Note that even if
--`b' only calls `a' if it was not called from `a', `gprof' cannot
--determine this, so `a' and `b' are still considered a cycle.
--
-- The cycles are numbered with consecutive integers. When a function
--belongs to a cycle, each time the function name appears in the call
--graph it is followed by `<cycle NUMBER>'.
--
-- The reason cycles matter is that they make the time values in the
--call graph paradoxical. The "time spent in children" of `a' should
--include the time spent in its subroutine `b' and in `b''s
--subroutines--but one of `b''s subroutines is `a'! How much of `a''s
--time should be included in the children of `a', when `a' is indirectly
--recursive?
--
-- The way `gprof' resolves this paradox is by creating a single entry
--for the cycle as a whole. The primary line of this entry describes the
--total time spent directly in the functions of the cycle. The
--"subroutines" of the cycle are the individual functions of the cycle,
--and all other functions that were called directly by them. The
--"callers" of the cycle are the functions, outside the cycle, that
--called functions in the cycle.
--
-- Here is an example portion of a call graph which shows a cycle
--containing functions `a' and `b'. The cycle was entered by a call to
--`a' from `main'; both `a' and `b' called `c'.
--
-- index % time self children called name
-- ----------------------------------------
-- 1.77 0 1/1 main [2]
-- [3] 91.71 1.77 0 1+5 <cycle 1 as a whole> [3]
-- 1.02 0 3 b <cycle 1> [4]
-- 0.75 0 2 a <cycle 1> [5]
-- ----------------------------------------
-- 3 a <cycle 1> [5]
-- [4] 52.85 1.02 0 0 b <cycle 1> [4]
-- 2 a <cycle 1> [5]
-- 0 0 3/6 c [6]
-- ----------------------------------------
-- 1.77 0 1/1 main [2]
-- 2 b <cycle 1> [4]
-- [5] 38.86 0.75 0 1 a <cycle 1> [5]
-- 3 b <cycle 1> [4]
-- 0 0 3/6 c [6]
-- ----------------------------------------
--
--(The entire call graph for this program contains in addition an entry
--for `main', which calls `a', and an entry for `c', with callers `a' and
--`b'.)
--
-- index % time self children called name
-- <spontaneous>
-- [1] 100.00 0 1.93 0 start [1]
-- 0.16 1.77 1/1 main [2]
-- ----------------------------------------
-- 0.16 1.77 1/1 start [1]
-- [2] 100.00 0.16 1.77 1 main [2]
-- 1.77 0 1/1 a <cycle 1> [5]
-- ----------------------------------------
-- 1.77 0 1/1 main [2]
-- [3] 91.71 1.77 0 1+5 <cycle 1 as a whole> [3]
-- 1.02 0 3 b <cycle 1> [4]
-- 0.75 0 2 a <cycle 1> [5]
-- 0 0 6/6 c [6]
-- ----------------------------------------
-- 3 a <cycle 1> [5]
-- [4] 52.85 1.02 0 0 b <cycle 1> [4]
-- 2 a <cycle 1> [5]
-- 0 0 3/6 c [6]
-- ----------------------------------------
-- 1.77 0 1/1 main [2]
-- 2 b <cycle 1> [4]
-- [5] 38.86 0.75 0 1 a <cycle 1> [5]
-- 3 b <cycle 1> [4]
-- 0 0 3/6 c [6]
-- ----------------------------------------
-- 0 0 3/6 b <cycle 1> [4]
-- 0 0 3/6 a <cycle 1> [5]
-- [6] 0.00 0 0 6 c [6]
-- ----------------------------------------
--
-- The `self' field of the cycle's primary line is the total time spent
--in all the functions of the cycle. It equals the sum of the `self'
--fields for the individual functions in the cycle, found in the entry in
--the subroutine lines for these functions.
--
-- The `children' fields of the cycle's primary line and subroutine
--lines count only subroutines outside the cycle. Even though `a' calls
--`b', the time spent in those calls to `b' is not counted in `a''s
--`children' time. Thus, we do not encounter the problem of what to do
--when the time in those calls to `b' includes indirect recursive calls
--back to `a'.
--
-- The `children' field of a caller-line in the cycle's entry estimates
--the amount of time spent _in the whole cycle_, and its other
--subroutines, on the times when that caller called a function in the
--cycle.
--
-- The `called' field in the primary line for the cycle has two numbers:
--first, the number of times functions in the cycle were called by
--functions outside the cycle; second, the number of times they were
--called by functions in the cycle (including times when a function in
--the cycle calls itself). This is a generalization of the usual split
--into non-recursive and recursive calls.
--
-- The `called' field of a subroutine-line for a cycle member in the
--cycle's entry says how many time that function was called from
--functions in the cycle. The total of all these is the second number in
--the primary line's `called' field.
--
-- In the individual entry for a function in a cycle, the other
--functions in the same cycle can appear as subroutines and as callers.
--These lines show how many times each function in the cycle called or
--was called from each other function in the cycle. The `self' and
--`children' fields in these lines are blank because of the difficulty of
--defining meanings for them when recursion is going on.
--
--
--File: gprof.info, Node: Line-by-line, Next: Annotated Source, Prev: Call Graph, Up: Output
--
--5.3 Line-by-line Profiling
--==========================
--
--`gprof''s `-l' option causes the program to perform "line-by-line"
--profiling. In this mode, histogram samples are assigned not to
--functions, but to individual lines of source code. This only works
--with programs compiled with older versions of the `gcc' compiler.
--Newer versions of `gcc' use a different program - `gcov' - to display
--line-by-line profiling information.
--
-- With the older versions of `gcc' the program usually has to be
--compiled with a `-g' option, in addition to `-pg', in order to generate
--debugging symbols for tracking source code lines. Note, in much older
--versions of `gcc' the program had to be compiled with the `-a' command
--line option as well.
--
-- The flat profile is the most useful output table in line-by-line
--mode. The call graph isn't as useful as normal, since the current
--version of `gprof' does not propagate call graph arcs from source code
--lines to the enclosing function. The call graph does, however, show
--each line of code that called each function, along with a count.
--
-- Here is a section of `gprof''s output, without line-by-line
--profiling. Note that `ct_init' accounted for four histogram hits, and
--13327 calls to `init_block'.
--
-- Flat profile:
--
-- Each sample counts as 0.01 seconds.
-- % cumulative self self total
-- time seconds seconds calls us/call us/call name
-- 30.77 0.13 0.04 6335 6.31 6.31 ct_init
--
--
-- Call graph (explanation follows)
--
--
-- granularity: each sample hit covers 4 byte(s) for 7.69% of 0.13 seconds
--
-- index % time self children called name
--
-- 0.00 0.00 1/13496 name_too_long
-- 0.00 0.00 40/13496 deflate
-- 0.00 0.00 128/13496 deflate_fast
-- 0.00 0.00 13327/13496 ct_init
-- [7] 0.0 0.00 0.00 13496 init_block
--
-- Now let's look at some of `gprof''s output from the same program run,
--this time with line-by-line profiling enabled. Note that `ct_init''s
--four histogram hits are broken down into four lines of source code--one
--hit occurred on each of lines 349, 351, 382 and 385. In the call graph,
--note how `ct_init''s 13327 calls to `init_block' are broken down into
--one call from line 396, 3071 calls from line 384, 3730 calls from line
--385, and 6525 calls from 387.
--
-- Flat profile:
--
-- Each sample counts as 0.01 seconds.
-- % cumulative self
-- time seconds seconds calls name
-- 7.69 0.10 0.01 ct_init (trees.c:349)
-- 7.69 0.11 0.01 ct_init (trees.c:351)
-- 7.69 0.12 0.01 ct_init (trees.c:382)
-- 7.69 0.13 0.01 ct_init (trees.c:385)
--
--
-- Call graph (explanation follows)
--
--
-- granularity: each sample hit covers 4 byte(s) for 7.69% of 0.13 seconds
--
-- % time self children called name
--
-- 0.00 0.00 1/13496 name_too_long (gzip.c:1440)
-- 0.00 0.00 1/13496 deflate (deflate.c:763)
-- 0.00 0.00 1/13496 ct_init (trees.c:396)
-- 0.00 0.00 2/13496 deflate (deflate.c:727)
-- 0.00 0.00 4/13496 deflate (deflate.c:686)
-- 0.00 0.00 5/13496 deflate (deflate.c:675)
-- 0.00 0.00 12/13496 deflate (deflate.c:679)
-- 0.00 0.00 16/13496 deflate (deflate.c:730)
-- 0.00 0.00 128/13496 deflate_fast (deflate.c:654)
-- 0.00 0.00 3071/13496 ct_init (trees.c:384)
-- 0.00 0.00 3730/13496 ct_init (trees.c:385)
-- 0.00 0.00 6525/13496 ct_init (trees.c:387)
-- [6] 0.0 0.00 0.00 13496 init_block (trees.c:408)
--
--
--File: gprof.info, Node: Annotated Source, Prev: Line-by-line, Up: Output
--
--5.4 The Annotated Source Listing
--================================
--
--`gprof''s `-A' option triggers an annotated source listing, which lists
--the program's source code, each function labeled with the number of
--times it was called. You may also need to specify the `-I' option, if
--`gprof' can't find the source code files.
--
-- With older versions of `gcc' compiling with `gcc ... -g -pg -a'
--augments your program with basic-block counting code, in addition to
--function counting code. This enables `gprof' to determine how many
--times each line of code was executed. With newer versions of `gcc'
--support for displaying basic-block counts is provided by the `gcov'
--program.
--
-- For example, consider the following function, taken from gzip, with
--line numbers added:
--
-- 1 ulg updcrc(s, n)
-- 2 uch *s;
-- 3 unsigned n;
-- 4 {
-- 5 register ulg c;
-- 6
-- 7 static ulg crc = (ulg)0xffffffffL;
-- 8
-- 9 if (s == NULL) {
-- 10 c = 0xffffffffL;
-- 11 } else {
-- 12 c = crc;
-- 13 if (n) do {
-- 14 c = crc_32_tab[...];
-- 15 } while (--n);
-- 16 }
-- 17 crc = c;
-- 18 return c ^ 0xffffffffL;
-- 19 }
--
-- `updcrc' has at least five basic-blocks. One is the function
--itself. The `if' statement on line 9 generates two more basic-blocks,
--one for each branch of the `if'. A fourth basic-block results from the
--`if' on line 13, and the contents of the `do' loop form the fifth
--basic-block. The compiler may also generate additional basic-blocks to
--handle various special cases.
--
-- A program augmented for basic-block counting can be analyzed with
--`gprof -l -A'. The `-x' option is also helpful, to ensure that each
--line of code is labeled at least once. Here is `updcrc''s annotated
--source listing for a sample `gzip' run:
--
-- ulg updcrc(s, n)
-- uch *s;
-- unsigned n;
-- 2 ->{
-- register ulg c;
--
-- static ulg crc = (ulg)0xffffffffL;
--
-- 2 -> if (s == NULL) {
-- 1 -> c = 0xffffffffL;
-- 1 -> } else {
-- 1 -> c = crc;
-- 1 -> if (n) do {
-- 26312 -> c = crc_32_tab[...];
-- 26312,1,26311 -> } while (--n);
-- }
-- 2 -> crc = c;
-- 2 -> return c ^ 0xffffffffL;
-- 2 ->}
--
-- In this example, the function was called twice, passing once through
--each branch of the `if' statement. The body of the `do' loop was
--executed a total of 26312 times. Note how the `while' statement is
--annotated. It began execution 26312 times, once for each iteration
--through the loop. One of those times (the last time) it exited, while
--it branched back to the beginning of the loop 26311 times.
--
--
--File: gprof.info, Node: Inaccuracy, Next: How do I?, Prev: Output, Up: Top
--
--6 Inaccuracy of `gprof' Output
--******************************
--
--* Menu:
--
--* Sampling Error:: Statistical margins of error
--* Assumptions:: Estimating children times
--
--
--File: gprof.info, Node: Sampling Error, Next: Assumptions, Up: Inaccuracy
--
--6.1 Statistical Sampling Error
--==============================
--
--The run-time figures that `gprof' gives you are based on a sampling
--process, so they are subject to statistical inaccuracy. If a function
--runs only a small amount of time, so that on the average the sampling
--process ought to catch that function in the act only once, there is a
--pretty good chance it will actually find that function zero times, or
--twice.
--
-- By contrast, the number-of-calls and basic-block figures are derived
--by counting, not sampling. They are completely accurate and will not
--vary from run to run if your program is deterministic and single
--threaded. In multi-threaded applications, or single threaded
--applications that link with multi-threaded libraries, the counts are
--only deterministic if the counting function is thread-safe. (Note:
--beware that the mcount counting function in glibc is _not_
--thread-safe). *Note Implementation of Profiling: Implementation.
--
-- The "sampling period" that is printed at the beginning of the flat
--profile says how often samples are taken. The rule of thumb is that a
--run-time figure is accurate if it is considerably bigger than the
--sampling period.
--
-- The actual amount of error can be predicted. For N samples, the
--_expected_ error is the square-root of N. For example, if the sampling
--period is 0.01 seconds and `foo''s run-time is 1 second, N is 100
--samples (1 second/0.01 seconds), sqrt(N) is 10 samples, so the expected
--error in `foo''s run-time is 0.1 seconds (10*0.01 seconds), or ten
--percent of the observed value. Again, if the sampling period is 0.01
--seconds and `bar''s run-time is 100 seconds, N is 10000 samples,
--sqrt(N) is 100 samples, so the expected error in `bar''s run-time is 1
--second, or one percent of the observed value. It is likely to vary
--this much _on the average_ from one profiling run to the next.
--(_Sometimes_ it will vary more.)
--
-- This does not mean that a small run-time figure is devoid of
--information. If the program's _total_ run-time is large, a small
--run-time for one function does tell you that that function used an
--insignificant fraction of the whole program's time. Usually this means
--it is not worth optimizing.
--
-- One way to get more accuracy is to give your program more (but
--similar) input data so it will take longer. Another way is to combine
--the data from several runs, using the `-s' option of `gprof'. Here is
--how:
--
-- 1. Run your program once.
--
-- 2. Issue the command `mv gmon.out gmon.sum'.
--
-- 3. Run your program again, the same as before.
--
-- 4. Merge the new data in `gmon.out' into `gmon.sum' with this command:
--
-- gprof -s EXECUTABLE-FILE gmon.out gmon.sum
--
-- 5. Repeat the last two steps as often as you wish.
--
-- 6. Analyze the cumulative data using this command:
--
-- gprof EXECUTABLE-FILE gmon.sum > OUTPUT-FILE
--
--
--File: gprof.info, Node: Assumptions, Prev: Sampling Error, Up: Inaccuracy
--
--6.2 Estimating `children' Times
--===============================
--
--Some of the figures in the call graph are estimates--for example, the
--`children' time values and all the time figures in caller and
--subroutine lines.
--
-- There is no direct information about these measurements in the
--profile data itself. Instead, `gprof' estimates them by making an
--assumption about your program that might or might not be true.
--
-- The assumption made is that the average time spent in each call to
--any function `foo' is not correlated with who called `foo'. If `foo'
--used 5 seconds in all, and 2/5 of the calls to `foo' came from `a',
--then `foo' contributes 2 seconds to `a''s `children' time, by
--assumption.
--
-- This assumption is usually true enough, but for some programs it is
--far from true. Suppose that `foo' returns very quickly when its
--argument is zero; suppose that `a' always passes zero as an argument,
--while other callers of `foo' pass other arguments. In this program,
--all the time spent in `foo' is in the calls from callers other than `a'.
--But `gprof' has no way of knowing this; it will blindly and incorrectly
--charge 2 seconds of time in `foo' to the children of `a'.
--
-- We hope some day to put more complete data into `gmon.out', so that
--this assumption is no longer needed, if we can figure out how. For the
--novice, the estimated figures are usually more useful than misleading.
--
--
--File: gprof.info, Node: How do I?, Next: Incompatibilities, Prev: Inaccuracy, Up: Top
--
--7 Answers to Common Questions
--*****************************
--
--How can I get more exact information about hot spots in my program?
-- Looking at the per-line call counts only tells part of the story.
-- Because `gprof' can only report call times and counts by function,
-- the best way to get finer-grained information on where the program
-- is spending its time is to re-factor large functions into sequences
-- of calls to smaller ones. Beware however that this can introduce
-- artificial hot spots since compiling with `-pg' adds a significant
-- overhead to function calls. An alternative solution is to use a
-- non-intrusive profiler, e.g. oprofile.
--
--How do I find which lines in my program were executed the most times?
-- Use the `gcov' program.
--
--How do I find which lines in my program called a particular function?
-- Use `gprof -l' and lookup the function in the call graph. The
-- callers will be broken down by function and line number.
--
--How do I analyze a program that runs for less than a second?
-- Try using a shell script like this one:
--
-- for i in `seq 1 100`; do
-- fastprog
-- mv gmon.out gmon.out.$i
-- done
--
-- gprof -s fastprog gmon.out.*
--
-- gprof fastprog gmon.sum
--
-- If your program is completely deterministic, all the call counts
-- will be simple multiples of 100 (i.e., a function called once in
-- each run will appear with a call count of 100).
--
--
--
--File: gprof.info, Node: Incompatibilities, Next: Details, Prev: How do I?, Up: Top
--
--8 Incompatibilities with Unix `gprof'
--*************************************
--
--GNU `gprof' and Berkeley Unix `gprof' use the same data file
--`gmon.out', and provide essentially the same information. But there
--are a few differences.
--
-- * GNU `gprof' uses a new, generalized file format with support for
-- basic-block execution counts and non-realtime histograms. A magic
-- cookie and version number allows `gprof' to easily identify new
-- style files. Old BSD-style files can still be read. *Note
-- Profiling Data File Format: File Format.
--
-- * For a recursive function, Unix `gprof' lists the function as a
-- parent and as a child, with a `calls' field that lists the number
-- of recursive calls. GNU `gprof' omits these lines and puts the
-- number of recursive calls in the primary line.
--
-- * When a function is suppressed from the call graph with `-e', GNU
-- `gprof' still lists it as a subroutine of functions that call it.
--
-- * GNU `gprof' accepts the `-k' with its argument in the form
-- `from/to', instead of `from to'.
--
-- * In the annotated source listing, if there are multiple basic
-- blocks on the same line, GNU `gprof' prints all of their counts,
-- separated by commas.
--
-- * The blurbs, field widths, and output formats are different. GNU
-- `gprof' prints blurbs after the tables, so that you can see the
-- tables without skipping the blurbs.
--
--
--File: gprof.info, Node: Details, Next: GNU Free Documentation License, Prev: Incompatibilities, Up: Top
--
--9 Details of Profiling
--**********************
--
--* Menu:
--
--* Implementation:: How a program collects profiling information
--* File Format:: Format of `gmon.out' files
--* Internals:: `gprof''s internal operation
--* Debugging:: Using `gprof''s `-d' option
--
--
--File: gprof.info, Node: Implementation, Next: File Format, Up: Details
--
--9.1 Implementation of Profiling
--===============================
--
--Profiling works by changing how every function in your program is
--compiled so that when it is called, it will stash away some information
--about where it was called from. From this, the profiler can figure out
--what function called it, and can count how many times it was called.
--This change is made by the compiler when your program is compiled with
--the `-pg' option, which causes every function to call `mcount' (or
--`_mcount', or `__mcount', depending on the OS and compiler) as one of
--its first operations.
--
-- The `mcount' routine, included in the profiling library, is
--responsible for recording in an in-memory call graph table both its
--parent routine (the child) and its parent's parent. This is typically
--done by examining the stack frame to find both the address of the
--child, and the return address in the original parent. Since this is a
--very machine-dependent operation, `mcount' itself is typically a short
--assembly-language stub routine that extracts the required information,
--and then calls `__mcount_internal' (a normal C function) with two
--arguments--`frompc' and `selfpc'. `__mcount_internal' is responsible
--for maintaining the in-memory call graph, which records `frompc',
--`selfpc', and the number of times each of these call arcs was traversed.
--
-- GCC Version 2 provides a magical function
--(`__builtin_return_address'), which allows a generic `mcount' function
--to extract the required information from the stack frame. However, on
--some architectures, most notably the SPARC, using this builtin can be
--very computationally expensive, and an assembly language version of
--`mcount' is used for performance reasons.
--
-- Number-of-calls information for library routines is collected by
--using a special version of the C library. The programs in it are the
--same as in the usual C library, but they were compiled with `-pg'. If
--you link your program with `gcc ... -pg', it automatically uses the
--profiling version of the library.
--
-- Profiling also involves watching your program as it runs, and
--keeping a histogram of where the program counter happens to be every
--now and then. Typically the program counter is looked at around 100
--times per second of run time, but the exact frequency may vary from
--system to system.
--
-- This is done is one of two ways. Most UNIX-like operating systems
--provide a `profil()' system call, which registers a memory array with
--the kernel, along with a scale factor that determines how the program's
--address space maps into the array. Typical scaling values cause every
--2 to 8 bytes of address space to map into a single array slot. On
--every tick of the system clock (assuming the profiled program is
--running), the value of the program counter is examined and the
--corresponding slot in the memory array is incremented. Since this is
--done in the kernel, which had to interrupt the process anyway to handle
--the clock interrupt, very little additional system overhead is required.
--
-- However, some operating systems, most notably Linux 2.0 (and
--earlier), do not provide a `profil()' system call. On such a system,
--arrangements are made for the kernel to periodically deliver a signal
--to the process (typically via `setitimer()'), which then performs the
--same operation of examining the program counter and incrementing a slot
--in the memory array. Since this method requires a signal to be
--delivered to user space every time a sample is taken, it uses
--considerably more overhead than kernel-based profiling. Also, due to
--the added delay required to deliver the signal, this method is less
--accurate as well.
--
-- A special startup routine allocates memory for the histogram and
--either calls `profil()' or sets up a clock signal handler. This
--routine (`monstartup') can be invoked in several ways. On Linux
--systems, a special profiling startup file `gcrt0.o', which invokes
--`monstartup' before `main', is used instead of the default `crt0.o'.
--Use of this special startup file is one of the effects of using `gcc
--... -pg' to link. On SPARC systems, no special startup files are used.
--Rather, the `mcount' routine, when it is invoked for the first time
--(typically when `main' is called), calls `monstartup'.
--
-- If the compiler's `-a' option was used, basic-block counting is also
--enabled. Each object file is then compiled with a static array of
--counts, initially zero. In the executable code, every time a new
--basic-block begins (i.e., when an `if' statement appears), an extra
--instruction is inserted to increment the corresponding count in the
--array. At compile time, a paired array was constructed that recorded
--the starting address of each basic-block. Taken together, the two
--arrays record the starting address of every basic-block, along with the
--number of times it was executed.
--
-- The profiling library also includes a function (`mcleanup') which is
--typically registered using `atexit()' to be called as the program
--exits, and is responsible for writing the file `gmon.out'. Profiling
--is turned off, various headers are output, and the histogram is
--written, followed by the call-graph arcs and the basic-block counts.
--
-- The output from `gprof' gives no indication of parts of your program
--that are limited by I/O or swapping bandwidth. This is because samples
--of the program counter are taken at fixed intervals of the program's
--run time. Therefore, the time measurements in `gprof' output say
--nothing about time that your program was not running. For example, a
--part of the program that creates so much data that it cannot all fit in
--physical memory at once may run very slowly due to thrashing, but
--`gprof' will say it uses little time. On the other hand, sampling by
--run time has the advantage that the amount of load due to other users
--won't directly affect the output you get.
--
--
--File: gprof.info, Node: File Format, Next: Internals, Prev: Implementation, Up: Details
--
--9.2 Profiling Data File Format
--==============================
--
--The old BSD-derived file format used for profile data does not contain a
--magic cookie that allows to check whether a data file really is a
--`gprof' file. Furthermore, it does not provide a version number, thus
--rendering changes to the file format almost impossible. GNU `gprof'
--uses a new file format that provides these features. For backward
--compatibility, GNU `gprof' continues to support the old BSD-derived
--format, but not all features are supported with it. For example,
--basic-block execution counts cannot be accommodated by the old file
--format.
--
-- The new file format is defined in header file `gmon_out.h'. It
--consists of a header containing the magic cookie and a version number,
--as well as some spare bytes available for future extensions. All data
--in a profile data file is in the native format of the target for which
--the profile was collected. GNU `gprof' adapts automatically to the
--byte-order in use.
--
-- In the new file format, the header is followed by a sequence of
--records. Currently, there are three different record types: histogram
--records, call-graph arc records, and basic-block execution count
--records. Each file can contain any number of each record type. When
--reading a file, GNU `gprof' will ensure records of the same type are
--compatible with each other and compute the union of all records. For
--example, for basic-block execution counts, the union is simply the sum
--of all execution counts for each basic-block.
--
--9.2.1 Histogram Records
-------------------------
--
--Histogram records consist of a header that is followed by an array of
--bins. The header contains the text-segment range that the histogram
--spans, the size of the histogram in bytes (unlike in the old BSD
--format, this does not include the size of the header), the rate of the
--profiling clock, and the physical dimension that the bin counts
--represent after being scaled by the profiling clock rate. The physical
--dimension is specified in two parts: a long name of up to 15 characters
--and a single character abbreviation. For example, a histogram
--representing real-time would specify the long name as "seconds" and the
--abbreviation as "s". This feature is useful for architectures that
--support performance monitor hardware (which, fortunately, is becoming
--increasingly common). For example, under DEC OSF/1, the "uprofile"
--command can be used to produce a histogram of, say, instruction cache
--misses. In this case, the dimension in the histogram header could be
--set to "i-cache misses" and the abbreviation could be set to "1"
--(because it is simply a count, not a physical dimension). Also, the
--profiling rate would have to be set to 1 in this case.
--
-- Histogram bins are 16-bit numbers and each bin represent an equal
--amount of text-space. For example, if the text-segment is one thousand
--bytes long and if there are ten bins in the histogram, each bin
--represents one hundred bytes.
--
--9.2.2 Call-Graph Records
--------------------------
--
--Call-graph records have a format that is identical to the one used in
--the BSD-derived file format. It consists of an arc in the call graph
--and a count indicating the number of times the arc was traversed during
--program execution. Arcs are specified by a pair of addresses: the
--first must be within caller's function and the second must be within
--the callee's function. When performing profiling at the function
--level, these addresses can point anywhere within the respective
--function. However, when profiling at the line-level, it is better if
--the addresses are as close to the call-site/entry-point as possible.
--This will ensure that the line-level call-graph is able to identify
--exactly which line of source code performed calls to a function.
--
--9.2.3 Basic-Block Execution Count Records
-------------------------------------------
--
--Basic-block execution count records consist of a header followed by a
--sequence of address/count pairs. The header simply specifies the
--length of the sequence. In an address/count pair, the address
--identifies a basic-block and the count specifies the number of times
--that basic-block was executed. Any address within the basic-address can
--be used.
--
--
--File: gprof.info, Node: Internals, Next: Debugging, Prev: File Format, Up: Details
--
--9.3 `gprof''s Internal Operation
--================================
--
--Like most programs, `gprof' begins by processing its options. During
--this stage, it may building its symspec list (`sym_ids.c:sym_id_add'),
--if options are specified which use symspecs. `gprof' maintains a
--single linked list of symspecs, which will eventually get turned into
--12 symbol tables, organized into six include/exclude pairs--one pair
--each for the flat profile (INCL_FLAT/EXCL_FLAT), the call graph arcs
--(INCL_ARCS/EXCL_ARCS), printing in the call graph
--(INCL_GRAPH/EXCL_GRAPH), timing propagation in the call graph
--(INCL_TIME/EXCL_TIME), the annotated source listing
--(INCL_ANNO/EXCL_ANNO), and the execution count listing
--(INCL_EXEC/EXCL_EXEC).
--
-- After option processing, `gprof' finishes building the symspec list
--by adding all the symspecs in `default_excluded_list' to the exclude
--lists EXCL_TIME and EXCL_GRAPH, and if line-by-line profiling is
--specified, EXCL_FLAT as well. These default excludes are not added to
--EXCL_ANNO, EXCL_ARCS, and EXCL_EXEC.
--
-- Next, the BFD library is called to open the object file, verify that
--it is an object file, and read its symbol table (`core.c:core_init'),
--using `bfd_canonicalize_symtab' after mallocing an appropriately sized
--array of symbols. At this point, function mappings are read (if the
--`--file-ordering' option has been specified), and the core text space
--is read into memory (if the `-c' option was given).
--
-- `gprof''s own symbol table, an array of Sym structures, is now built.
--This is done in one of two ways, by one of two routines, depending on
--whether line-by-line profiling (`-l' option) has been enabled. For
--normal profiling, the BFD canonical symbol table is scanned. For
--line-by-line profiling, every text space address is examined, and a new
--symbol table entry gets created every time the line number changes. In
--either case, two passes are made through the symbol table--one to count
--the size of the symbol table required, and the other to actually read
--the symbols. In between the two passes, a single array of type `Sym'
--is created of the appropriate length. Finally,
--`symtab.c:symtab_finalize' is called to sort the symbol table and
--remove duplicate entries (entries with the same memory address).
--
-- The symbol table must be a contiguous array for two reasons. First,
--the `qsort' library function (which sorts an array) will be used to
--sort the symbol table. Also, the symbol lookup routine
--(`symtab.c:sym_lookup'), which finds symbols based on memory address,
--uses a binary search algorithm which requires the symbol table to be a
--sorted array. Function symbols are indicated with an `is_func' flag.
--Line number symbols have no special flags set. Additionally, a symbol
--can have an `is_static' flag to indicate that it is a local symbol.
--
-- With the symbol table read, the symspecs can now be translated into
--Syms (`sym_ids.c:sym_id_parse'). Remember that a single symspec can
--match multiple symbols. An array of symbol tables (`syms') is created,
--each entry of which is a symbol table of Syms to be included or
--excluded from a particular listing. The master symbol table and the
--symspecs are examined by nested loops, and every symbol that matches a
--symspec is inserted into the appropriate syms table. This is done
--twice, once to count the size of each required symbol table, and again
--to build the tables, which have been malloced between passes. From now
--on, to determine whether a symbol is on an include or exclude symspec
--list, `gprof' simply uses its standard symbol lookup routine on the
--appropriate table in the `syms' array.
--
-- Now the profile data file(s) themselves are read
--(`gmon_io.c:gmon_out_read'), first by checking for a new-style
--`gmon.out' header, then assuming this is an old-style BSD `gmon.out' if
--the magic number test failed.
--
-- New-style histogram records are read by `hist.c:hist_read_rec'. For
--the first histogram record, allocate a memory array to hold all the
--bins, and read them in. When multiple profile data files (or files
--with multiple histogram records) are read, the memory ranges of each
--pair of histogram records must be either equal, or non-overlapping.
--For each pair of histogram records, the resolution (memory region size
--divided by the number of bins) must be the same. The time unit must be
--the same for all histogram records. If the above containts are met, all
--histograms for the same memory range are merged.
--
-- As each call graph record is read (`call_graph.c:cg_read_rec'), the
--parent and child addresses are matched to symbol table entries, and a
--call graph arc is created by `cg_arcs.c:arc_add', unless the arc fails
--a symspec check against INCL_ARCS/EXCL_ARCS. As each arc is added, a
--linked list is maintained of the parent's child arcs, and of the child's
--parent arcs. Both the child's call count and the arc's call count are
--incremented by the record's call count.
--
-- Basic-block records are read (`basic_blocks.c:bb_read_rec'), but
--only if line-by-line profiling has been selected. Each basic-block
--address is matched to a corresponding line symbol in the symbol table,
--and an entry made in the symbol's bb_addr and bb_calls arrays. Again,
--if multiple basic-block records are present for the same address, the
--call counts are cumulative.
--
-- A gmon.sum file is dumped, if requested (`gmon_io.c:gmon_out_write').
--
-- If histograms were present in the data files, assign them to symbols
--(`hist.c:hist_assign_samples') by iterating over all the sample bins
--and assigning them to symbols. Since the symbol table is sorted in
--order of ascending memory addresses, we can simple follow along in the
--symbol table as we make our pass over the sample bins. This step
--includes a symspec check against INCL_FLAT/EXCL_FLAT. Depending on the
--histogram scale factor, a sample bin may span multiple symbols, in
--which case a fraction of the sample count is allocated to each symbol,
--proportional to the degree of overlap. This effect is rare for normal
--profiling, but overlaps are more common during line-by-line profiling,
--and can cause each of two adjacent lines to be credited with half a
--hit, for example.
--
-- If call graph data is present, `cg_arcs.c:cg_assemble' is called.
--First, if `-c' was specified, a machine-dependent routine (`find_call')
--scans through each symbol's machine code, looking for subroutine call
--instructions, and adding them to the call graph with a zero call count.
--A topological sort is performed by depth-first numbering all the
--symbols (`cg_dfn.c:cg_dfn'), so that children are always numbered less
--than their parents, then making a array of pointers into the symbol
--table and sorting it into numerical order, which is reverse topological
--order (children appear before parents). Cycles are also detected at
--this point, all members of which are assigned the same topological
--number. Two passes are now made through this sorted array of symbol
--pointers. The first pass, from end to beginning (parents to children),
--computes the fraction of child time to propagate to each parent and a
--print flag. The print flag reflects symspec handling of
--INCL_GRAPH/EXCL_GRAPH, with a parent's include or exclude (print or no
--print) property being propagated to its children, unless they
--themselves explicitly appear in INCL_GRAPH or EXCL_GRAPH. A second
--pass, from beginning to end (children to parents) actually propagates
--the timings along the call graph, subject to a check against
--INCL_TIME/EXCL_TIME. With the print flag, fractions, and timings now
--stored in the symbol structures, the topological sort array is now
--discarded, and a new array of pointers is assembled, this time sorted
--by propagated time.
--
-- Finally, print the various outputs the user requested, which is now
--fairly straightforward. The call graph (`cg_print.c:cg_print') and
--flat profile (`hist.c:hist_print') are regurgitations of values already
--computed. The annotated source listing
--(`basic_blocks.c:print_annotated_source') uses basic-block information,
--if present, to label each line of code with call counts, otherwise only
--the function call counts are presented.
--
-- The function ordering code is marginally well documented in the
--source code itself (`cg_print.c'). Basically, the functions with the
--most use and the most parents are placed first, followed by other
--functions with the most use, followed by lower use functions, followed
--by unused functions at the end.
--
--
--File: gprof.info, Node: Debugging, Prev: Internals, Up: Details
--
--9.4 Debugging `gprof'
--=====================
--
--If `gprof' was compiled with debugging enabled, the `-d' option
--triggers debugging output (to stdout) which can be helpful in
--understanding its operation. The debugging number specified is
--interpreted as a sum of the following options:
--
--2 - Topological sort
-- Monitor depth-first numbering of symbols during call graph analysis
--
--4 - Cycles
-- Shows symbols as they are identified as cycle heads
--
--16 - Tallying
-- As the call graph arcs are read, show each arc and how the total
-- calls to each function are tallied
--
--32 - Call graph arc sorting
-- Details sorting individual parents/children within each call graph
-- entry
--
--64 - Reading histogram and call graph records
-- Shows address ranges of histograms as they are read, and each call
-- graph arc
--
--128 - Symbol table
-- Reading, classifying, and sorting the symbol table from the object
-- file. For line-by-line profiling (`-l' option), also shows line
-- numbers being assigned to memory addresses.
--
--256 - Static call graph
-- Trace operation of `-c' option
--
--512 - Symbol table and arc table lookups
-- Detail operation of lookup routines
--
--1024 - Call graph propagation
-- Shows how function times are propagated along the call graph
--
--2048 - Basic-blocks
-- Shows basic-block records as they are read from profile data (only
-- meaningful with `-l' option)
--
--4096 - Symspecs
-- Shows symspec-to-symbol pattern matching operation
--
--8192 - Annotate source
-- Tracks operation of `-A' option
--
--
--File: gprof.info, Node: GNU Free Documentation License, Prev: Details, Up: Top
--
--Appendix A GNU Free Documentation License
--*****************************************
--
-- Version 1.3, 3 November 2008
--
-- Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
-- `http://fsf.org/'
--
-- Everyone is permitted to copy and distribute verbatim copies
-- of this license document, but changing it is not allowed.
--
-- 0. PREAMBLE
--
-- The purpose of this License is to make a manual, textbook, or other
-- functional and useful document "free" in the sense of freedom: to
-- assure everyone the effective freedom to copy and redistribute it,
-- with or without modifying it, either commercially or
-- noncommercially. Secondarily, this License preserves for the
-- author and publisher a way to get credit for their work, while not
-- being considered responsible for modifications made by others.
--
-- This License is a kind of "copyleft", which means that derivative
-- works of the document must themselves be free in the same sense.
-- It complements the GNU General Public License, which is a copyleft
-- license designed for free software.
--
-- We have designed this License in order to use it for manuals for
-- free software, because free software needs free documentation: a
-- free program should come with manuals providing the same freedoms
-- that the software does. But this License is not limited to
-- software manuals; it can be used for any textual work, regardless
-- of subject matter or whether it is published as a printed book.
-- We recommend this License principally for works whose purpose is
-- instruction or reference.
--
-- 1. APPLICABILITY AND DEFINITIONS
--
-- This License applies to any manual or other work, in any medium,
-- that contains a notice placed by the copyright holder saying it
-- can be distributed under the terms of this License. Such a notice
-- grants a world-wide, royalty-free license, unlimited in duration,
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-- "Document", below, refers to any such manual or work. Any member
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-- A "Modified Version" of the Document means any work containing the
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-- 3. COPYING IN QUANTITY
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-- 5. COMBINING DOCUMENTS
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-- You may combine the Document with other documents released under
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-- Permission is granted to copy, distribute and/or modify this document
-- under the terms of the GNU Free Documentation License, Version 1.3
-- or any later version published by the Free Software Foundation;
-- with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
-- Texts. A copy of the license is included in the section entitled ``GNU
-- Free Documentation License''.
--
-- If you have Invariant Sections, Front-Cover Texts and Back-Cover
--Texts, replace the "with...Texts." line with this:
--
-- with the Invariant Sections being LIST THEIR TITLES, with
-- the Front-Cover Texts being LIST, and with the Back-Cover Texts
-- being LIST.
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-- If you have Invariant Sections without Cover Texts, or some other
--combination of the three, merge those two alternatives to suit the
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--Tag Table:
--Node: Top777
--Node: Introduction2103
--Node: Compiling4595
--Node: Executing8651
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--End Tag Table
-diff -Nur binutils-2.24.orig/gprof/hist.c binutils-2.24/gprof/hist.c
---- binutils-2.24.orig/gprof/hist.c 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/gprof/hist.c 2016-06-30 21:26:12.769897625 +0200
-@@ -56,6 +56,10 @@
-
- static double accum_time; /* Accumulated time so far for print_line(). */
- static double total_time; /* Total time for all routines. */
-+static unsigned long long accum_insn_cnt;
-+static unsigned long long accum_cycle_cnt;
-+static unsigned long long total_insn_cnt=0;
-+static unsigned long long total_cycle_cnt=0;
-
- /* Table of SI prefixes for powers of 10 (used to automatically
- scale some of the values in the flat profile). */
-@@ -496,7 +500,29 @@
- _("time"), hist_dimension, hist_dimension, _("calls"), unit, unit,
- _("name"));
- }
-+// ----------------------------------------------------------------------------
-+// tl_print_header
-+//
-+// This function prints header for flag histogram profile.
-+// ----------------------------------------------------------------------------
-+static void
-+tl_print_header(int prefix ATTRIBUTE_UNUSED)
-+{
-+ if (total_insn_cnt == 0)
-+ {
-+ printf (_(" no time accumulated\n\n"));
-
-+ // This doesn't hurt since all the numerators will be zero.
-+ total_insn_cnt = 1;
-+ }
-+
-+ printf ("%11.11s %16.16s %19.19s %19.19s %8.8s %14.14s %14.14s %-8.8s\n",
-+ "% ", _("cumulative "), _("self "), _("child "), "", _("self "), _("total "),
-+ "");
-+ printf ("%11.11s %16.16s %19.19s %19.19s %9.9s %14.14s %14.14s %-8.8s\n",
-+ _("instr/cycle"), _("instr/cycle"), _("instr/cycle"), _("instr/cycle"),
-+ _("calls"), _("i/c per call"), _("i/c per call"), _("name"));
-+} // tl_print_header
-
- static void
- print_line (Sym *sym, double scale)
-@@ -531,6 +557,37 @@
- }
-
-
-+// ----------------------------------------------------------------------------
-+// tl_print_line
-+// ----------------------------------------------------------------------------
-+static void
-+tl_print_line (Sym *sym)
-+{
-+ if (ignore_zeros && sym->ncalls == 0 && sym->hist.total_insn_cnt == 0)
-+ return;
-+
-+ accum_insn_cnt += sym->hist.total_insn_cnt;
-+ accum_cycle_cnt += sym->hist.total_cycle_cnt;
-+
-+ printf ("%5.2f %5.2f %10llu %10llu %10llu %10llu %10llu %10llu",
-+ total_insn_cnt > 0 ? 100 * (double)sym->hist.total_insn_cnt / (double)total_insn_cnt : 0.0,
-+ total_cycle_cnt > 0 ? 100 * (double)sym->hist.total_cycle_cnt / (double)total_cycle_cnt : 0.0,
-+ accum_insn_cnt, accum_cycle_cnt,
-+ sym->hist.total_insn_cnt, sym->hist.total_cycle_cnt,
-+ sym->cg.child_insn_cnt, sym->cg.child_cycle_cnt);
-+
-+ if (sym->ncalls != 0)
-+ printf (" %8lu %8.2f %8.2f %8.2f %8.2f ", (sym->ncalls + sym->cg.self_calls),
-+ sym->hist.total_insn_cnt / (double)(sym->ncalls + sym->cg.self_calls),
-+ sym->hist.total_cycle_cnt / (double)(sym->ncalls + sym->cg.self_calls),
-+ (sym->hist.total_insn_cnt + sym->cg.child_insn_cnt) / (double)(sym->ncalls + sym->cg.self_calls),
-+ (sym->hist.total_cycle_cnt + sym->cg.child_cycle_cnt) / (double)(sym->ncalls + sym->cg.self_calls));
-+ else
-+ printf (" %8.8s %8.8s %8.8s %8.8s %8.8s ", "", "", "", "", "");
-+
-+ print_name_only (sym);
-+ printf (" [%d]\n", sym->cg.index);
-+} // tl_print_line
- /* Compare LP and RP. The primary comparison key is execution time,
- the secondary is number of invocation, and the tertiary is the
- lexicographic order of the function names. */
-@@ -560,6 +617,36 @@
- }
-
-
-+// ----------------------------------------------------------------------------
-+// tl_cmp_time
-+//
-+// This function compares LP and RP. The primary comparison key is execution
-+// instruction count, the secondary is number of invocation, and the tertiary
-+// is the lexicographic order of the function names.
-+// ----------------------------------------------------------------------------
-+static int
-+tl_cmp_time(const PTR lp,
-+ const PTR rp)
-+{ const Sym *left = *(const Sym **) lp;
-+ const Sym *right = *(const Sym **) rp;
-+ long long time_diff;
-+
-+ time_diff = right->hist.total_insn_cnt - left->hist.total_insn_cnt;
-+
-+ if (time_diff > 0)
-+ return 1;
-+
-+ if (time_diff < 0)
-+ return -1;
-+
-+ if (right->ncalls > left->ncalls)
-+ return 1;
-+
-+ if (right->ncalls < left->ncalls)
-+ return -1;
-+
-+ return strcmp (left->name, right->name);
-+} // tl_cmp_time
- /* Print the flat histogram profile. */
-
- void
-@@ -753,3 +840,105 @@
- }
- return 0;
- }
-+
-+void
-+tl_hist_print(void);
-+void
-+tl_hist_print(void)
-+{ Sym **time_sorted_syms, *sym; //top_dog, *sym;
-+ unsigned int index;
-+ unsigned log_scale;
-+ double top_time, time;
-+ bfd_vma addr;
-+
-+ if (first_output)
-+ first_output = FALSE;
-+ else
-+ printf ("\f\n");
-+
-+ accum_insn_cnt = 0;
-+ accum_cycle_cnt = 0;
-+
-+ printf (_("Flat profile:\n"));
-+
-+ // Sort the symbol table by time (call-count and name as secondary
-+ // and tertiary keys).
-+ time_sorted_syms = (Sym **) xmalloc (symtab.len * sizeof (Sym *));
-+
-+ for (index = 0; index < symtab.len; ++index)
-+ time_sorted_syms[index] = &symtab.base[index];
-+
-+ qsort (time_sorted_syms, symtab.len, sizeof (Sym *), tl_cmp_time);
-+
-+ // Search for symbol with highest per-call
-+ // execution time and scale accordingly.
-+ log_scale = 0;
-+// top_dog = 0;
-+ top_time = 0.0;
-+
-+ for (index = 0; index < symtab.len; ++index)
-+ {
-+ sym = time_sorted_syms[index];
-+
-+ if (sym->ncalls != 0)
-+ {
-+ time = (sym->hist.total_insn_cnt + sym->cg.child_insn_cnt) / (double)sym->ncalls;
-+
-+ if (time > top_time)
-+ {
-+ // top_dog = sym;
-+ top_time = time;
-+ }
-+ }
-+ }
-+
-+ // For now, the dimension is always instruction/cycle counts.
-+ tl_print_header (SItab[log_scale].prefix);
-+
-+ for (index = 0; index < symtab.len; ++index)
-+ {
-+ addr = time_sorted_syms[index]->addr;
-+
-+ // Print symbol if its in INCL_FLAT table or that table
-+ //is empty and the symbol is not in EXCL_FLAT.
-+ if (sym_lookup (&syms[INCL_FLAT], addr)
-+ ||(syms[INCL_FLAT].len == 0
-+ &&!sym_lookup (&syms[EXCL_FLAT], addr)))
-+ tl_print_line(time_sorted_syms[index]);
-+ }
-+
-+ free (time_sorted_syms);
-+
-+ if (print_descriptions)
-+ flat_blurb (stdout);
-+} // tl_hist_print
-+
-+
-+
-+
-+// ============================================================================
-+// tl_hist_assign_samples
-+//
-+// This function assign samples to the symbol to which they belong for timeline
-+// based profiling.
-+// ============================================================================
-+void
-+tl_hist_assign_samples(void);
-+void
-+tl_hist_assign_samples(void)
-+{ unsigned int i;
-+
-+ // Iterate over all functions.
-+ for (i=0;i<symtab.len;i++)
-+ { // ignore non-function symbols
-+ if (!symtab.base[i].is_func)
-+ continue;
-+
-+ total_insn_cnt += symtab.base[i].hist.total_insn_cnt;
-+ total_cycle_cnt += symtab.base[i].hist.total_cycle_cnt;
-+ }
-+
-+ DBG(SAMPLEDEBUG,
-+ printf("[tl_hist_assign_samples] total instructions %llu cycles %llu\n",
-+ total_insn_cnt, total_cycle_cnt));
-+} // tl_hist_assign_samples
-diff -Nur binutils-2.24.orig/gprof/Makefile.am binutils-2.24/gprof/Makefile.am
---- binutils-2.24.orig/gprof/Makefile.am 2013-11-08 11:13:48.000000000 +0100
-+++ binutils-2.24/gprof/Makefile.am 2016-06-30 21:26:12.769897625 +0200
-@@ -43,6 +43,7 @@
- sources = basic_blocks.c call_graph.c cg_arcs.c cg_dfn.c \
- cg_print.c corefile.c gmon_io.c gprof.c hertz.c hist.c source.c \
- search_list.c symtab.c sym_ids.c utils.c \
-+ prof_io.c timeline.c \
- i386.c alpha.c vax.c tahoe.c sparc.c mips.c aarch64.c
- gprof_SOURCES = $(sources) flat_bl.c bsd_callg_bl.c fsf_callg_bl.c
- gprof_DEPENDENCIES = ../bfd/libbfd.la ../libiberty/libiberty.a $(LIBINTL_DEP)
-@@ -51,7 +52,8 @@
- noinst_HEADERS = \
- basic_blocks.h call_graph.h cg_arcs.h cg_dfn.h cg_print.h \
- corefile.h gmon.h gmon_io.h gmon_out.h gprof.h hertz.h hist.h \
-- search_list.h source.h sym_ids.h symtab.h utils.h
-+ search_list.h source.h sym_ids.h symtab.h utils.h \
-+ prof_io.h timeline.h
-
- BUILT_SOURCES = flat_bl.c bsd_callg_bl.c fsf_callg_bl.c
- EXTRA_DIST = $(BUILT_SOURCES) bbconv.pl $(man_MANS)
-diff -Nur binutils-2.24.orig/gprof/Makefile.in binutils-2.24/gprof/Makefile.in
---- binutils-2.24.orig/gprof/Makefile.in 2013-11-08 11:13:48.000000000 +0100
-+++ binutils-2.24/gprof/Makefile.in 2016-06-30 21:26:12.769897625 +0200
-@@ -91,7 +91,7 @@
- corefile.$(OBJEXT) gmon_io.$(OBJEXT) gprof.$(OBJEXT) \
- hertz.$(OBJEXT) hist.$(OBJEXT) source.$(OBJEXT) \
- search_list.$(OBJEXT) symtab.$(OBJEXT) sym_ids.$(OBJEXT) \
-- utils.$(OBJEXT) i386.$(OBJEXT) alpha.$(OBJEXT) vax.$(OBJEXT) \
-+ utils.$(OBJEXT) prof_io.$(OBJEXT) timeline.$(OBJEXT) i386.$(OBJEXT) alpha.$(OBJEXT) vax.$(OBJEXT) \
- tahoe.$(OBJEXT) sparc.$(OBJEXT) mips.$(OBJEXT) \
- aarch64.$(OBJEXT)
- am_gprof_OBJECTS = $(am__objects_1) flat_bl.$(OBJEXT) \
-@@ -310,6 +310,7 @@
- sources = basic_blocks.c call_graph.c cg_arcs.c cg_dfn.c \
- cg_print.c corefile.c gmon_io.c gprof.c hertz.c hist.c source.c \
- search_list.c symtab.c sym_ids.c utils.c \
-+ prof_io.c timeline.c \
- i386.c alpha.c vax.c tahoe.c sparc.c mips.c aarch64.c
-
- gprof_SOURCES = $(sources) flat_bl.c bsd_callg_bl.c fsf_callg_bl.c
-@@ -318,7 +319,8 @@
- noinst_HEADERS = \
- basic_blocks.h call_graph.h cg_arcs.h cg_dfn.h cg_print.h \
- corefile.h gmon.h gmon_io.h gmon_out.h gprof.h hertz.h hist.h \
-- search_list.h source.h sym_ids.h symtab.h utils.h
-+ search_list.h source.h sym_ids.h symtab.h utils.h \
-+ prof_io.h timeline.h
-
- BUILT_SOURCES = flat_bl.c bsd_callg_bl.c fsf_callg_bl.c
- EXTRA_DIST = $(BUILT_SOURCES) bbconv.pl $(man_MANS)
-diff -Nur binutils-2.24.orig/gprof/prof_io.c binutils-2.24/gprof/prof_io.c
---- binutils-2.24.orig/gprof/prof_io.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gprof/prof_io.c 2016-06-30 21:26:12.773897780 +0200
-@@ -0,0 +1,3712 @@
-+// ============================================================================
-+// prof_io.c - Input and output from/to prof.out files.
-+// Copyright 2006 Andes Technology Corporation
-+//
-+// This file is part of GNU Binutils.
-+//
-+// This program is free software; you can redistribute it and/or modify
-+// it under the terms of the GNU General Public License as published by
-+// the Free Software Foundation; either version 2 of the License, or
-+// (at your option) any later version.
-+//
-+// This program is distributed in the hope that it will be useful,
-+// but WITHOUT ANY WARRANTY; without even the implied warranty of
-+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+// GNU General Public License for more details.
-+//
-+// You should have received a copy of the GNU General Public License
-+// along with this program; if not, write to the Free Software
-+// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
-+// 02111-1307, USA.
-+// ============================================================================
-+#define _LARGEFILE_SOURCE
-+#define _FILE_OFFSET_BITS 64
-+#include "gprof.h"
-+#include "search_list.h"
-+#include "source.h"
-+#include "symtab.h"
-+#include "corefile.h"
-+#include "call_graph.h"
-+#include "gmon_io.h"
-+#include "gmon_out.h"
-+#include "prof_io.h"
-+#include "gmon.h" // Fetch header for old format.
-+#include "hertz.h"
-+#include "libiberty.h"
-+#include "timeline.h"
-+#include "utils.h"
-+#include <string.h>
-+
-+extern time_t TotalProfileTime, ReadProfOutDataTime, ParsingProfileDataTime, WriteTemplateFileTime, ReadTemplateFileTime, ProcessDataTime, WriteTimelineBinFileTime, StartTime, EndTime;
-+enum{
-+ LOW_NIBBLE,
-+ HIGH_NIBBLE
-+}NIBBLE;
-+
-+SymListNode *exec_stack=NULL;
-+
-+static FILE *temp_fd=NULL;
-+char prof_temp_file[32]="prof-xxxxx.tmp";
-+bfd_vma CurrentPC = 0;
-+
-+int function_level = 0, min_function_level = 0, max_function_level = 1; // Due to function level of profile on is offset to 1
-+static unsigned long long temp_file_pos=0;
-+static unsigned long long current_insn_cnt=0;
-+static unsigned long long current_cycle_cnt=0;
-+static unsigned long long total_BTB_branch_count=0;
-+static unsigned long long total_branch_taken_count=0;
-+static unsigned long long total_branch_mispred_count=0;
-+static unsigned long long total_return_mispred_count=0;
-+unsigned int calculate_data_size(unsigned char size_info, int nibble);
-+
-+typedef struct prof1dataT
-+{ bfd_vma pc;
-+ unsigned int icnt;
-+ unsigned int ccnt;
-+} prof1data;
-+
-+typedef struct prof1data2T
-+{ prof1data data;
-+ bfd_vma tpc;
-+} prof1data2;
-+
-+typedef struct prof2dataT
-+{ prof1data2 data;
-+ unsigned char br;
-+} prof2data;
-+/*
-+typedef struct prof3dataT
-+{ bfd_vma pc;
-+ unsigned short ccnt;
-+} prof3data;
-+
-+typedef struct prof3data2T
-+{ prof3data data;
-+ bfd_vma tpc;
-+ unsigned char flags[3];
-+} prof3data2;
-+*/
-+typedef struct prof3data1T{
-+ unsigned short ccnt;
-+ bfd_vma tpc;
-+ unsigned char br;
-+ unsigned short ifetch;
-+}prof3data1;
-+
-+typedef struct prof3data2T{
-+ unsigned short ccnt;
-+ unsigned char dfetch1;
-+ unsigned int dfetch2;
-+ unsigned int dfetch3;
-+}prof3data2;
-+
-+typedef struct prof3data3T{
-+ unsigned short ccnt;
-+ unsigned short ifetch;
-+}prof3data3;
-+
-+typedef struct profmdataT
-+{ prof1data data;
-+ unsigned char mode;
-+} profmdata;
-+
-+typedef struct prof6dataT{
-+ bfd_vma pc;
-+ unsigned int icnt;
-+ unsigned int ccnt;
-+ bfd_vma tpc;
-+ unsigned char length[2];
-+}prof6data;
-+
-+typedef struct prof7dataT{
-+ bfd_vma pc;
-+ unsigned int icnt;
-+ unsigned int ccnt;
-+ bfd_vma tpc;
-+ unsigned char length[3];
-+}prof7data;
-+
-+typedef struct prof8dataT{
-+ bfd_vma pc;
-+ unsigned int icnt;
-+ unsigned int ccnt;
-+ bfd_vma tpc;
-+ unsigned char length[5];
-+}prof8data;
-+
-+typedef struct prof9dataT{
-+ bfd_vma pc;
-+ unsigned int icnt;
-+ unsigned int ccnt;
-+ bfd_vma tpc;
-+ unsigned char br;
-+ unsigned char length[3];
-+}prof9data;
-+
-+// uncomment to debug
-+//#define TRACE_STACK
-+
-+#ifdef TRACE_STACK
-+// ----------------------------------------------------------------------------
-+// trace_stack
-+//
-+// This function displays the instruction and cycle counts of the caller and
-+// callee pair.
-+// ----------------------------------------------------------------------------
-+static void
-+trace_stack(SymListNode* callee,
-+ SymListNode* caller)
-+{ // dump timeline and stack node information first
-+ fprintf(stderr,"%llu\t%llu\t%s [%s:%u]\t%llu\t%llu\t%llu\t%llu\t",
-+ current_insn_cnt,current_cycle_cnt,get_name(callee->sym->name),
-+ (callee->sym->file==NULL)?"":callee->sym->file->name,
-+ callee->sym->line_num,
-+ callee->self_insn_cnt,callee->self_cycle_cnt,
-+ callee->child_insn_cnt,callee->child_cycle_cnt);
-+ if (caller!=NULL)
-+ fprintf(stderr,"X%08X@%s [%s:%u]\t%llu\t%llu\t%llu\t%llu\t",
-+ callee->caller_addr,get_name(caller->sym->name),
-+ (caller->sym->file==NULL)?"":caller->sym->file->name,
-+ caller->sym->line_num,
-+ caller->self_insn_cnt,caller->self_cycle_cnt,
-+ caller->child_insn_cnt,caller->child_cycle_cnt);
-+ else
-+ fprintf(stderr,"\t\t\t\t\t\t\t");
-+
-+ // dump symbol information next
-+ fprintf(stderr,"%llu\t%llu\t%llu\t%llu\t",
-+ callee->sym->hist.total_insn_cnt,callee->sym->hist.total_cycle_cnt,
-+ callee->sym->cg.child_insn_cnt,callee->sym->cg.child_cycle_cnt);
-+ if (caller!=NULL)
-+ fprintf(stderr,"%llu\t%llu\t%llu\t%llu\n",
-+ caller->sym->hist.total_insn_cnt,caller->sym->hist.total_cycle_cnt,
-+ caller->sym->cg.child_insn_cnt,caller->sym->cg.child_cycle_cnt);
-+ else
-+ fprintf(stderr,"\t\t\t\n");
-+} // trace_stack
-+#endif // TRACE_STACK
-+
-+#define u8 unsigned char
-+#define u16 unsigned short
-+#define u32 unsigned long
-+#define u64 unsigned long long
-+
-+
-+int PlaceData2Buf(u64 data, unsigned char * buf, int sz_idx, int da_idx, int nibble);
-+int PlaceData2Buf(u64 data, unsigned char * buf, int sz_idx, int da_idx, int nibble)
-+{
-+ unsigned int cnt;
-+
-+ if((data >> 32)){
-+ for(cnt = 0; cnt < sizeof(u64); cnt++)
-+ buf[da_idx++] = (u8)((data & ((u64)0xFF << (cnt * 8))) >> (cnt * 8));
-+ }else if((data >> 16)){
-+ for(cnt = 0; cnt < sizeof(u32); cnt++)
-+ buf[da_idx++] = (u8)((data & ((u64)0xFF << (cnt * 8))) >> (cnt * 8));
-+ }else if((data >> 8)){
-+ for(cnt = 0; cnt < sizeof(u16); cnt++)
-+ buf[da_idx++] = (u8)((data & ((u64)0xFF << (cnt * 8))) >> (cnt * 8));
-+ }else{
-+ for(cnt = 0; cnt < sizeof(u8); cnt++)
-+ buf[da_idx++] = (u8)((data & ((u64)0xFF << (cnt * 8))) >> (cnt * 8));
-+ }
-+
-+ if (nibble == HIGH_NIBBLE) {
-+ buf[sz_idx] = ((buf[sz_idx] & 0x0F) | (u8)0x10);
-+ while((cnt >>= 1))
-+ buf[sz_idx] = ((buf[sz_idx] & 0x0F) | ((buf[sz_idx] & 0xF0) << 1));
-+ }
-+ else {
-+ buf[sz_idx] = ((buf[sz_idx] & 0xF0) | (u8)0x01);
-+ while((cnt >>= 1))
-+ buf[sz_idx] = ((buf[sz_idx] & 0xF0) | ((buf[sz_idx] & 0x0F) << 1));
-+ }
-+
-+ return da_idx;
-+
-+}
-+
-+int lenof(unsigned long long p);
-+int
-+lenof(unsigned long long p)
-+{
-+ int i;
-+ for ( i = 2; i >=0; i--)
-+ {
-+ if (p >> (1<<i)*8)
-+ break;
-+ }
-+ return (i >= 0)? 1<<(i+1): 1;
-+}
-+
-+//place data from cnt/2.... : "pbuf"
-+//place size|size combo from 0 to cnt/2 : "abuf"
-+
-+int PackData(unsigned char *buf, unsigned long long data[], int cnt);
-+int
-+PackData(unsigned char *buf, unsigned long long data[], int cnt)
-+{
-+ int i;
-+ unsigned char a, b;
-+ int t = (cnt+1) >> 1;
-+ unsigned char * abuf = buf;
-+ unsigned char * pbuf = buf + t;
-+
-+ for (i = 0; i < cnt; i++)
-+ {
-+ a = 0;
-+ b = 0;
-+// if (data[i] != -1) {
-+ a = lenof(data[i]);
-+ memcpy(pbuf, &data[i], a);
-+ pbuf += a;
-+// }
-+ i++;
-+ if ( i < cnt) {
-+// if (data[i] != -1) {
-+ b = lenof(data[i]);
-+ memcpy(pbuf, &data[i], b);
-+ pbuf += b;
-+// }
-+ }
-+ *abuf = (a <<4)|b;
-+ abuf++;
-+ }
-+
-+ return pbuf - buf;
-+}
-+
-+
-+
-+// ----------------------------------------------------------------------------
-+// prof_errmsg
-+//
-+// This function displays the cause of error and terminates the execution.
-+// 1 - read error
-+// 2 - write error
-+// 3 - memory error
-+// 4 - bad tag
-+// ----------------------------------------------------------------------------
-+static int
-+prof_errmsg(int errnum,
-+ const char *filename)
-+{ if (errnum==1)
-+ fprintf(stderr, _("%s: corrupted gmon data in file %s?\n"),
-+ whoami, filename);
-+ else if (errnum==2)
-+ fprintf(stderr, _("%s: failed to write temporary data to file %s?\n"),
-+ whoami, prof_temp_file);
-+ else if (errnum==3)
-+ fprintf(stderr, _("%s: memory allocation failed!\n"),whoami);
-+ else if (errnum==4)
-+ fprintf(stderr, _("%s: read bad tage from file %s?\n"),
-+ whoami, filename);
-+
-+ // no return
-+ return -1;
-+} // prof_errmsg
-+
-+// -----------------------------------------------------------------------------
-+// update_data_length
-+//
-+// This function writes position of summary profile data into function node.
-+// return code:
-+// 0 - success
-+// -----------------------------------------------------------------------------
-+static int
-+update_data_length(unsigned long long pos, unsigned int len)
-+{
-+ long original_offset = 0;
-+ unsigned int i = 0;
-+ unsigned char write_buffer[1] = {0};
-+// int result = 0;
-+
-+ original_offset = ftell(temp_fd);
-+// result = fseek(temp_fd, (long)(-pos), SEEK_CUR);
-+ fseek(temp_fd, (long)(-pos), SEEK_CUR);
-+ for(i = 0; i < sizeof(unsigned int); i++){
-+ write_buffer[0] = (unsigned char)((len & ((unsigned int)0xFF << (i * 8))) >> (i * 8));
-+ fwrite(write_buffer, 1, 1, temp_fd);
-+ }
-+ fflush(temp_fd);
-+//result = fseek(temp_fd, original_offset, SEEK_SET);
-+ fseek(temp_fd, original_offset, SEEK_SET);
-+
-+ return 0;
-+}
-+
-+// ----------------------------------------------------------------------------
-+// write_tl9_temp
-+//
-+// This function writes temporary record for level 9 timeline analysis.
-+// return code:
-+// 0 - success
-+// 1 - write error
-+// ----------------------------------------------------------------------------
-+static int
-+write_tl9_temp(bfd_vma child_pc,
-+ bfd_vma parent_pc,
-+ unsigned char tag,
-+ short func_level,
-+ unsigned int func_length,
-+ unsigned long long to_insn_cnt,
-+ unsigned long long to_cycle_cnt,
-+ unsigned long long self_insn_cnt,
-+ unsigned long long self_cycle_cnt,
-+ unsigned long long child_insn_cnt,
-+ unsigned long long child_cycle_cnt,
-+ unsigned long long call_cnt,
-+ unsigned char branch_data,
-+ unsigned long long bb_cnt,
-+ unsigned long long br_taken_cnt,
-+ unsigned long long br_mis_cnt,
-+ unsigned long long BTB_br_cnt,
-+ unsigned long long icache_replace_cnt,
-+ unsigned long long icache_miss_cnt,
-+ unsigned long long icache_access_cnt,
-+ unsigned long long dcache_replace_cnt,
-+ unsigned long long dcache_miss_cnt,
-+ unsigned long long dcache_access_cnt,
-+ unsigned long long to_icache_replace_cnt,
-+ unsigned long long to_icache_miss_cnt,
-+ unsigned long long to_icache_access_cnt,
-+ unsigned long long to_dcache_replace_cnt,
-+ unsigned long long to_dcache_miss_cnt,
-+ unsigned long long to_dcache_access_cnt,
-+ unsigned int *len)
-+{
-+// int result = 0;
-+ Header_t H;
-+ unsigned char packbuf1[64];
-+ unsigned char packbuf2[128];
-+ unsigned char packbuf3[128];
-+ unsigned long long pMsg[32];
-+ char wbuf[512];
-+ char * wp;
-+ int plen1 = 0, plen2 = 0, plen3 = 0;
-+ char bytes4[4];
-+
-+ wp = wbuf;
-+
-+ H.tag = tag;
-+ H.level = func_level;
-+ H.func_id = child_pc;
-+
-+ switch (tag){
-+ case PROFTYPE_FC9:
-+ case PROFTYPE_ON9:
-+ H.parent_id = (exec_stack == NULL)? VEP_INIT_PC: exec_stack->sym->addr;
-+
-+ pMsg[0] = to_insn_cnt;
-+ pMsg[1] = to_cycle_cnt;
-+ plen1 = PackData(packbuf1, pMsg, 2);
-+ bytes4[0] = packbuf1[0];
-+
-+ pMsg[0] = icache_replace_cnt;
-+ pMsg[1] = icache_miss_cnt;
-+
-+ pMsg[2] = icache_access_cnt;
-+ pMsg[3] = dcache_replace_cnt;
-+
-+ pMsg[4] = dcache_miss_cnt;
-+ pMsg[5] = dcache_access_cnt;
-+
-+ plen2 = PackData(packbuf2, pMsg, 6);
-+ memcpy(&bytes4[1], packbuf2, 3);
-+
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, &func_length, sizeof(long));
-+ wp = mempcpy(wp, bytes4, 4);
-+ wp = mempcpy(wp, packbuf1+1, plen1-1);
-+ wp = mempcpy(wp, &branch_data, 1);
-+ wp = mempcpy(wp, packbuf2+3, plen2 - 3);
-+ break;
-+
-+ case PROFTYPE_FR9:
-+ case PROFTYPE_DUMMY_FR9:
-+ case PROFTYPE_OFF:
-+ if(exec_stack != NULL){
-+ H.parent_id = (exec_stack->next == NULL)? VEP_INIT_PC : exec_stack->next->sym->addr;
-+ }
-+ else {
-+ H.parent_id = parent_pc;
-+ }
-+
-+ pMsg[0] = to_insn_cnt;
-+ pMsg[1] = to_cycle_cnt;
-+ plen1 = PackData(packbuf1, pMsg, 2);
-+ bytes4[0] = packbuf1[0];
-+
-+ pMsg[0] = icache_replace_cnt;
-+ pMsg[1] = icache_miss_cnt;
-+
-+ pMsg[2] = icache_access_cnt;
-+ pMsg[3] = dcache_replace_cnt;
-+
-+ pMsg[4] = dcache_miss_cnt;
-+ pMsg[5] = dcache_access_cnt;
-+
-+ plen2 = PackData(packbuf2, pMsg, 6);
-+ memcpy(&bytes4[1], packbuf2, 3);
-+
-+
-+ pMsg[0] = self_insn_cnt;
-+ pMsg[1] = self_cycle_cnt;
-+
-+ pMsg[2] = child_insn_cnt;
-+ pMsg[3] = child_cycle_cnt;
-+
-+ pMsg[4] = call_cnt;
-+ pMsg[5] = br_taken_cnt;
-+
-+ pMsg[6] = br_mis_cnt;
-+ pMsg[7] = BTB_br_cnt;
-+
-+ pMsg[8] = bb_cnt;
-+ pMsg[9] = -1;
-+
-+ pMsg[10] = to_icache_replace_cnt;
-+ pMsg[11] = to_icache_miss_cnt;
-+
-+ pMsg[12] = to_icache_access_cnt;
-+ pMsg[13] = to_dcache_replace_cnt;
-+
-+ pMsg[14] = to_dcache_miss_cnt;
-+ pMsg[15] = to_dcache_access_cnt;
-+
-+ plen3 = PackData(packbuf3, pMsg, 16);
-+
-+ if(exec_stack != NULL){
-+ // update_data_length((temp_file_pos - exec_stack->pos - sizeof(Header_t)),
-+ // (temp_file_pos + (sizeof(rec) + plen1) - exec_stack->pos));
-+ // update_data_length((temp_file_pos - exec_stack->pos - sizeof(Header_t)),
-+ // (temp_file_pos + (sizeof(Header_t) + plen1 + 1 + plen2)) );
-+ update_data_length((temp_file_pos - exec_stack->pos - sizeof(Header_t)),
-+ temp_file_pos);
-+ }
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, bytes4, 4);
-+ wp = mempcpy(wp, packbuf1+1, plen1-1);
-+ wp = mempcpy(wp, &branch_data, 1);
-+ wp = mempcpy(wp, packbuf2+3, plen2-3);
-+ wp = mempcpy(wp, packbuf3, plen3);
-+ break;
-+
-+ case PROFTYPE_BR9:
-+ H.parent_id = parent_pc;
-+ pMsg[0] = to_insn_cnt;
-+ pMsg[1] = to_cycle_cnt;
-+ plen1 = PackData(packbuf1, pMsg, 2);
-+ bytes4[0] = packbuf1[0];
-+
-+ pMsg[0] = icache_replace_cnt;
-+ pMsg[1] = icache_miss_cnt;
-+
-+ pMsg[2] = icache_access_cnt;
-+ pMsg[3] = dcache_replace_cnt;
-+
-+ pMsg[4] = dcache_miss_cnt;
-+ pMsg[5] = dcache_access_cnt;
-+
-+ plen2 = PackData(packbuf2, pMsg, 6);
-+ memcpy(&bytes4[1], packbuf2, 3);
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, bytes4, 4);
-+ wp = mempcpy(wp, packbuf1+1, plen1-1);
-+ wp = mempcpy(wp, &branch_data, 1);
-+ wp = mempcpy(wp, &parent_pc, 4); // reserve 4 bytes
-+ wp = mempcpy(wp, packbuf2+3, plen2-3);
-+ break;
-+ }
-+ if (!fwrite(wbuf, wp - wbuf, 1, temp_fd))
-+ {
-+ gErrorCode = errno;
-+ return -1;
-+ }
-+ else
-+ *len = wp - wbuf;
-+
-+ return 0;
-+
-+
-+}
-+
-+ // write_tl9_temp
-+
-+// ----------------------------------------------------------------------------
-+// write_tl8_temp
-+//
-+// This function writes temporary record for level 8 timeline analysis.
-+// return code:
-+// 0 - success
-+// 1 - write error
-+// ----------------------------------------------------------------------------
-+static int
-+write_tl8_temp(bfd_vma child_pc,
-+ bfd_vma parent_pc,
-+ unsigned char tag,
-+ short func_level,
-+ unsigned int func_length,
-+ unsigned long long to_insn_cnt,
-+ unsigned long long to_cycle_cnt,
-+ unsigned long long self_insn_cnt,
-+ unsigned long long self_cycle_cnt,
-+ unsigned long long child_insn_cnt,
-+ unsigned long long child_cycle_cnt,
-+ unsigned long long call_cnt,
-+ unsigned long long br_taken_cnt,
-+ unsigned long long br_mis_cnt,
-+ unsigned long long BTB_br_cnt,
-+ unsigned long long icache_replace_cnt,
-+ unsigned long long icache_miss_cnt,
-+ unsigned long long icache_access_cnt,
-+ unsigned long long dcache_replace_cnt,
-+ unsigned long long dcache_miss_cnt,
-+ unsigned long long dcache_access_cnt,
-+ unsigned int *len)
-+{
-+// int result = 0;
-+ Header_t H;
-+ unsigned char packbuf1[64];
-+ unsigned char packbuf2[256];
-+ unsigned long long pMsg[32];
-+ char wbuf[512];
-+ char * wp;
-+ int plen1 = 0, plen2 = 0;
-+
-+ wp = wbuf;
-+
-+ H.tag = tag;
-+ H.level = func_level;
-+ H.func_id = child_pc;
-+
-+ switch (tag){
-+ case PROFTYPE_FC8:
-+ case PROFTYPE_ON8:
-+ H.parent_id = (exec_stack == NULL)? VEP_INIT_PC: exec_stack->sym->addr;
-+
-+ pMsg[0] = to_insn_cnt;
-+ pMsg[1] = to_cycle_cnt;
-+ plen1 = PackData(packbuf1, pMsg, 2);
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, &func_length, sizeof(long));
-+ wp = mempcpy(wp, packbuf1, plen1);
-+ break;
-+
-+ case PROFTYPE_FR8:
-+ case PROFTYPE_DUMMY_FR8:
-+ case PROFTYPE_OFF:
-+ if(exec_stack != NULL){
-+ H.parent_id = (exec_stack->next == NULL)? VEP_INIT_PC : exec_stack->next->sym->addr;
-+ }
-+ else {
-+ H.parent_id = parent_pc;
-+ }
-+
-+ pMsg[0] = to_insn_cnt;
-+ pMsg[1] = to_cycle_cnt;
-+ plen1 = PackData(packbuf1, pMsg, 2);
-+
-+ pMsg[0] = self_insn_cnt;
-+ pMsg[1] = self_cycle_cnt;
-+
-+ pMsg[2] = child_insn_cnt;
-+ pMsg[3] = child_cycle_cnt;
-+
-+ pMsg[4] = call_cnt;
-+ pMsg[5] = br_taken_cnt;
-+
-+ pMsg[6] = br_mis_cnt;
-+ pMsg[7] = BTB_br_cnt;
-+
-+ pMsg[8] = icache_replace_cnt;
-+ pMsg[9] = icache_miss_cnt;
-+
-+ pMsg[10] = icache_access_cnt;
-+ pMsg[11] = dcache_replace_cnt;
-+
-+ pMsg[12] = dcache_miss_cnt;
-+ pMsg[13] = dcache_access_cnt;
-+
-+ plen2 = PackData(packbuf2, pMsg, 14);
-+
-+
-+ if(exec_stack != NULL){
-+ // update_data_length((temp_file_pos - exec_stack->pos - sizeof(Header_t)),
-+ // (temp_file_pos + (sizeof(rec) + plen1) - exec_stack->pos));
-+ update_data_length((temp_file_pos - exec_stack->pos - sizeof(Header_t)),
-+ (temp_file_pos + (sizeof(Header_t) + plen1)) );
-+ }
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, packbuf1, plen1);
-+ wp = mempcpy(wp, packbuf2, plen2);
-+ break;
-+ }
-+ if (!fwrite(wbuf, wp - wbuf, 1, temp_fd))
-+ {
-+ gErrorCode = errno;
-+ return -1;
-+ }
-+ else
-+ *len = wp - wbuf;
-+
-+ return 0;
-+
-+
-+} // write_tl8_temp
-+
-+
-+// ----------------------------------------------------------------------------
-+// write_tl7_temp
-+//
-+// This function writes temporary record for level 7 timeline analysis.
-+// return code:
-+// 0 - success
-+// 1 - write error
-+// ----------------------------------------------------------------------------
-+static int
-+write_tl7_temp(bfd_vma child_pc,
-+ bfd_vma parent_pc,
-+ unsigned char tag,
-+ short func_level,
-+ unsigned int func_length,
-+ unsigned long long to_insn_cnt,
-+ unsigned long long to_cycle_cnt,
-+ unsigned long long self_insn_cnt,
-+ unsigned long long self_cycle_cnt,
-+ unsigned long long child_insn_cnt,
-+ unsigned long long child_cycle_cnt,
-+ unsigned long long call_cnt,
-+ unsigned long long icache_replace_cnt,
-+ unsigned long long icache_miss_cnt,
-+ unsigned long long icache_access_cnt,
-+ unsigned long long dcache_replace_cnt,
-+ unsigned long long dcache_miss_cnt,
-+ unsigned long long dcache_access_cnt,
-+ unsigned int *len)
-+{
-+// int result = 0;
-+ Header_t H;
-+ unsigned char packbuf1[64];
-+ unsigned char packbuf2[256];
-+ unsigned long long pMsg[32];
-+ char wbuf[512];
-+ char * wp;
-+ int plen1 = 0, plen2 = 0;
-+
-+ wp = wbuf;
-+
-+ H.tag = tag;
-+ H.level = func_level;
-+ H.func_id = child_pc;
-+
-+ switch (tag){
-+ case PROFTYPE_FC7:
-+ case PROFTYPE_ON7:
-+ H.parent_id = (exec_stack == NULL)? VEP_INIT_PC: exec_stack->sym->addr;
-+
-+ pMsg[0] = to_insn_cnt;
-+ pMsg[1] = to_cycle_cnt;
-+ plen1 = PackData(packbuf1, pMsg, 2);
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, &func_length, sizeof(long));
-+ wp = mempcpy(wp, packbuf1, plen1);
-+ break;
-+
-+ case PROFTYPE_FR7:
-+ case PROFTYPE_DUMMY_FR7:
-+ case PROFTYPE_OFF:
-+ if(exec_stack != NULL){
-+ H.parent_id = (exec_stack->next == NULL)? VEP_INIT_PC : exec_stack->next->sym->addr;
-+ }
-+ else {
-+ H.parent_id = parent_pc;
-+ }
-+
-+ pMsg[0] = to_insn_cnt;
-+ pMsg[1] = to_cycle_cnt;
-+ plen1 = PackData(packbuf1, pMsg, 2);
-+
-+ pMsg[0] = self_insn_cnt;
-+ pMsg[1] = self_cycle_cnt;
-+
-+ pMsg[2] = child_insn_cnt;
-+ pMsg[3] = child_cycle_cnt;
-+
-+ pMsg[4] = call_cnt;
-+ pMsg[5] = -1;
-+
-+ pMsg[6] = icache_replace_cnt;
-+ pMsg[7] = icache_miss_cnt;
-+
-+ pMsg[8] = icache_access_cnt;
-+ pMsg[9] = dcache_replace_cnt;
-+
-+ pMsg[10] = dcache_miss_cnt;
-+ pMsg[11] = dcache_access_cnt;
-+
-+ plen2 = PackData(packbuf2, pMsg, 12);
-+
-+
-+ if(exec_stack != NULL){
-+ // update_data_length((temp_file_pos - exec_stack->pos - sizeof(Header_t)),
-+ // (temp_file_pos + (sizeof(rec) + plen1) - exec_stack->pos));
-+ update_data_length((temp_file_pos - exec_stack->pos - sizeof(Header_t)),
-+ (temp_file_pos + (sizeof(Header_t) + plen1)) );
-+ }
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, packbuf1, plen1);
-+ wp = mempcpy(wp, packbuf2, plen2);
-+ break;
-+ }
-+ if (!fwrite(wbuf, wp - wbuf, 1, temp_fd))
-+ {
-+ gErrorCode = errno;
-+ return -1;
-+ }
-+ else
-+ *len = wp - wbuf;
-+
-+ return 0;
-+
-+} // write_tl7_temp
-+
-+
-+
-+// ----------------------------------------------------------------------------
-+// write_tl6_temp
-+//
-+// This function writes temporary record for level 6 timeline analysis.
-+// return code:
-+// 0 - success
-+// 1 - write error
-+// ----------------------------------------------------------------------------
-+static int
-+write_tl6_temp(bfd_vma child_pc,
-+ bfd_vma parent_pc,
-+ unsigned char tag,
-+ short func_level,
-+ unsigned int func_length,
-+ unsigned long long to_insn_cnt,
-+ unsigned long long to_cycle_cnt,
-+ unsigned long long self_insn_cnt,
-+ unsigned long long self_cycle_cnt,
-+ unsigned long long child_insn_cnt,
-+ unsigned long long child_cycle_cnt,
-+ unsigned long long call_cnt,
-+ unsigned long long br_taken_cnt,
-+ unsigned long long br_mis_cnt,
-+ unsigned long long BTB_br_cnt,
-+ unsigned int *len)
-+{
-+// int result = 0;
-+ Header_t H;
-+ unsigned char packbuf1[64];
-+ unsigned char packbuf2[256];
-+ unsigned long long pMsg[32];
-+ char wbuf[512];
-+ char * wp;
-+ int plen1 = 0, plen2 = 0;
-+
-+ wp = wbuf;
-+
-+ H.tag = tag;
-+ H.level = func_level;
-+ H.func_id = child_pc;
-+
-+ switch (tag){
-+ case PROFTYPE_FC6:
-+ case PROFTYPE_ON6:
-+ H.parent_id = (exec_stack == NULL)? VEP_INIT_PC: exec_stack->sym->addr;
-+
-+ pMsg[0] = to_insn_cnt;
-+ pMsg[1] = to_cycle_cnt;
-+ plen1 = PackData(packbuf1, pMsg, 2);
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, &func_length, sizeof(long));
-+ wp = mempcpy(wp, packbuf1, plen1);
-+ break;
-+
-+ case PROFTYPE_FR6:
-+ case PROFTYPE_DUMMY_FR6:
-+ case PROFTYPE_OFF:
-+ if(exec_stack != NULL){
-+ H.parent_id = (exec_stack->next == NULL)? VEP_INIT_PC : exec_stack->next->sym->addr;
-+ }
-+ else {
-+ H.parent_id = parent_pc;
-+ }
-+
-+ pMsg[0] = to_insn_cnt;
-+ pMsg[1] = to_cycle_cnt;
-+ plen1 = PackData(packbuf1, pMsg, 2);
-+
-+ pMsg[0] = self_insn_cnt;
-+ pMsg[1] = self_cycle_cnt;
-+
-+ pMsg[2] = child_insn_cnt;
-+ pMsg[3] = child_cycle_cnt;
-+
-+ pMsg[4] = call_cnt;
-+ pMsg[5] = br_taken_cnt;
-+
-+ pMsg[6] = br_mis_cnt;
-+ pMsg[7] = BTB_br_cnt;
-+ plen2 = PackData(packbuf2, pMsg, 8);
-+
-+ if(exec_stack != NULL){
-+ // update_data_length((temp_file_pos - exec_stack->pos - sizeof(Header_t)),
-+ // (temp_file_pos + (sizeof(rec) + plen1) - exec_stack->pos));
-+ update_data_length((temp_file_pos - exec_stack->pos - sizeof(Header_t)),
-+ (temp_file_pos + (sizeof(Header_t) + plen1)) );
-+ }
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, packbuf1, plen1);
-+ wp = mempcpy(wp, packbuf2, plen2);
-+ break;
-+ }
-+ if (!fwrite(wbuf, wp - wbuf, 1, temp_fd))
-+ {
-+ gErrorCode = errno;
-+ return -1;
-+ }
-+ else
-+ *len = wp - wbuf;
-+
-+ return 0;
-+
-+} // write_tl6_temp
-+
-+
-+// ----------------------------------------------------------------------------
-+// write_tl3_temp
-+//
-+// This function writes temporary record for level 1 timeline analysis.
-+// return code:
-+// 0 - success
-+// 1 - write error
-+// ----------------------------------------------------------------------------
-+static int
-+write_tl3_temp(bfd_vma child_pc,
-+ bfd_vma parent_pc,
-+ unsigned char tag,
-+ short func_level,
-+ unsigned int func_length,
-+ unsigned long long to_insn_cnt,
-+ unsigned long long to_cycle_cnt,
-+ unsigned long long self_insn_cnt,
-+ unsigned long long self_cycle_cnt,
-+ unsigned long long child_insn_cnt,
-+ unsigned long long child_cycle_cnt,
-+ unsigned long long call_cnt,
-+ unsigned char branch_data,
-+ unsigned short ifetch_data,
-+ unsigned char dfetch_data1,
-+ unsigned int dfetch_data2,
-+ unsigned int dfetch_data3,
-+ unsigned int *len)
-+{
-+ unsigned char outrec[100] = {0};
-+ int buf_index = 0, self_cnt_index = 0, child_cnt_index = 0, call_cnt_index = 0;
-+ unsigned int cnt = 0;
-+ int result = 0;
-+
-+ // tag
-+ outrec[0] = tag;
-+ // func_level
-+ outrec[1] = (unsigned char)(func_level & 0x00FF);
-+ outrec[2] = (unsigned char)((func_level & 0xFF00) >> 8);
-+ // func_id
-+ outrec[3] = (unsigned char)(child_pc & 0x000000FF);
-+ outrec[4] = (unsigned char)((child_pc & 0x0000FF00) >> 8);
-+ outrec[5] = (unsigned char)((child_pc & 0x00FF0000) >> 16);
-+ outrec[6] = (unsigned char)((child_pc & 0xFF000000) >> 24);
-+
-+ if((tag == PROFTYPE_FC3) || (tag == PROFTYPE_ON3)){
-+ // parent_id
-+ if(exec_stack == NULL){
-+ outrec[7] = (unsigned char)(VEP_INIT_PC & 0x000000FF);
-+ outrec[8] = (unsigned char)((VEP_INIT_PC & 0x0000FF00) >> 8);
-+ outrec[9] = (unsigned char)((VEP_INIT_PC & 0x00FF0000) >> 16);
-+ outrec[10] = (unsigned char)((VEP_INIT_PC & 0xFF000000) >> 24);
-+ }else{
-+ outrec[7] = (unsigned char)(exec_stack->sym->addr & 0x000000FF);
-+ outrec[8] = (unsigned char)((exec_stack->sym->addr & 0x0000FF00) >> 8);
-+ outrec[9] = (unsigned char)((exec_stack->sym->addr & 0x00FF0000) >> 16);
-+ outrec[10] = (unsigned char)((exec_stack->sym->addr & 0xFF000000) >> 24);
-+ }
-+ // length
-+ outrec[11] = (unsigned char)(func_length & 0x000000FF);
-+ outrec[12] = (unsigned char)((func_length & 0x0000FF00) >> 8);
-+ outrec[13] = (unsigned char)((func_length & 0x00FF0000) >> 16);
-+ outrec[14] = (unsigned char)((func_length & 0xFF000000) >> 24);
-+ buf_index = 16;
-+
-+ buf_index = PlaceData2Buf(to_insn_cnt, outrec, 15, buf_index, HIGH_NIBBLE); // to_insn_cnt
-+ buf_index = PlaceData2Buf(to_cycle_cnt, outrec, 15, buf_index, LOW_NIBBLE); // to_cycle_cnt
-+
-+ // PC
-+ for(cnt = 0; cnt < 4; cnt++)
-+ outrec[buf_index++] = (unsigned char)((((unsigned int)child_pc) & ((unsigned int)0xFF << (cnt * 8))) >> (cnt * 8));
-+ // branch_data
-+ outrec[buf_index++] = branch_data;
-+ // ifetch_data
-+ for(cnt = 0; cnt < 2; cnt++)
-+ outrec[buf_index++] = (unsigned char)((ifetch_data & ((unsigned short)0xFF << (cnt * 8))) >> (cnt * 8));
-+ }else if((tag == PROFTYPE_FR3) || (tag == PROFTYPE_OFF) || (tag == PROFTYPE_DUMMY_FR3)){
-+ // parent_id
-+ if(exec_stack != NULL){
-+ if(exec_stack->next == NULL){
-+ outrec[7] = (unsigned char)(VEP_INIT_PC & 0x000000FF);
-+ outrec[8] = (unsigned char)((VEP_INIT_PC & 0x0000FF00) >> 8);
-+ outrec[9] = (unsigned char)((VEP_INIT_PC & 0x00FF0000) >> 16);
-+ outrec[10] = (unsigned char)((VEP_INIT_PC & 0xFF000000) >> 24);
-+ }else{
-+ outrec[7] = (unsigned char)(exec_stack->next->sym->addr & 0x000000FF);
-+ outrec[8] = (unsigned char)((exec_stack->next->sym->addr & 0x0000FF00) >> 8);
-+ outrec[9] = (unsigned char)((exec_stack->next->sym->addr & 0x00FF0000) >> 16);
-+ outrec[10] = (unsigned char)((exec_stack->next->sym->addr & 0xFF000000) >> 24);
-+ }
-+ }else{
-+ outrec[7] = (unsigned char)(parent_pc & 0x000000FF);
-+ outrec[8] = (unsigned char)((parent_pc & 0x0000FF00) >> 8);
-+ outrec[9] = (unsigned char)((parent_pc & 0x00FF0000) >> 16);
-+ outrec[10] = (unsigned char)((parent_pc & 0xFF000000) >> 24);
-+ }
-+ buf_index = 12;
-+ buf_index = PlaceData2Buf(to_insn_cnt, outrec, 11, buf_index, HIGH_NIBBLE); // to_insn_cnt
-+ buf_index = PlaceData2Buf(to_cycle_cnt, outrec, 11, buf_index, LOW_NIBBLE); // to_cycle_cnt
-+ // PC
-+ for(cnt = 0; cnt < 4; cnt++)
-+ outrec[buf_index++] = (unsigned char)((((unsigned int)child_pc) & ((unsigned int)0xFF << (cnt * 8))) >> (cnt * 8));
-+ // branch_data
-+ outrec[buf_index++] = branch_data;
-+ // ifetch_data
-+ for(cnt = 0; cnt < 2; cnt++)
-+ outrec[buf_index++] = (unsigned char)((ifetch_data & ((unsigned short)0xFF << (cnt * 8))) >> (cnt * 8));
-+
-+ // push position of summary data into length field
-+ if(exec_stack != NULL){
-+ update_data_length((temp_file_pos - exec_stack->pos - 11), (temp_file_pos + buf_index - exec_stack->pos));
-+ }
-+
-+ self_cnt_index = buf_index++;
-+ child_cnt_index = buf_index++;
-+ call_cnt_index = buf_index++;
-+ // self_insn_cnt
-+ buf_index = PlaceData2Buf(self_insn_cnt, outrec, self_cnt_index, buf_index, HIGH_NIBBLE);
-+ // self_cycle_cnt
-+ buf_index = PlaceData2Buf(self_cycle_cnt, outrec, self_cnt_index, buf_index, LOW_NIBBLE);
-+ // child_insn_cnt
-+ buf_index = PlaceData2Buf(child_insn_cnt, outrec, child_cnt_index, buf_index, HIGH_NIBBLE);
-+ // child_cycle_cnt
-+ buf_index = PlaceData2Buf(child_cycle_cnt, outrec, child_cnt_index, buf_index, LOW_NIBBLE);
-+ // child_call
-+ buf_index = PlaceData2Buf(call_cnt, outrec, call_cnt_index, buf_index, HIGH_NIBBLE);
-+ }else if(tag == PROFTYPE_BR3){
-+ // parent_id
-+ outrec[7] = (unsigned char)(parent_pc & 0x000000FF);
-+ outrec[8] = (unsigned char)((parent_pc & 0x0000FF00) >> 8);
-+ outrec[9] = (unsigned char)((parent_pc & 0x00FF0000) >> 16);
-+ outrec[10] = (unsigned char)((parent_pc & 0xFF000000) >> 24);
-+ buf_index = 12;
-+ buf_index = PlaceData2Buf(to_insn_cnt, outrec, 11, buf_index, HIGH_NIBBLE); // to_insn_cnt
-+ buf_index = PlaceData2Buf(to_cycle_cnt, outrec, 11, buf_index, LOW_NIBBLE); // to_cycle_cnt
-+
-+ // PC
-+ for(cnt = 0; cnt < 4; cnt++)
-+ outrec[buf_index++] = (unsigned char)((((unsigned int)child_pc) & ((unsigned int)0xFF << (cnt * 8))) >> (cnt * 8));
-+ // branch_data
-+ outrec[buf_index++] = branch_data;
-+ // ifetch_data
-+ for(cnt = 0; cnt < 2; cnt++)
-+ outrec[buf_index++] = (unsigned char)((ifetch_data & ((unsigned short)0xFF << (cnt * 8))) >> (cnt * 8));
-+ }else if(tag == PROFTYPE_MA3){
-+ // parent_id
-+ outrec[7] = (unsigned char)(parent_pc & 0x000000FF);
-+ outrec[8] = (unsigned char)((parent_pc & 0x0000FF00) >> 8);
-+ outrec[9] = (unsigned char)((parent_pc & 0x00FF0000) >> 16);
-+ outrec[10] = (unsigned char)((parent_pc & 0xFF000000) >> 24);
-+ buf_index = 12;
-+
-+ buf_index = PlaceData2Buf(to_insn_cnt, outrec, 11, buf_index, HIGH_NIBBLE); // to_insn_cnt
-+ buf_index = PlaceData2Buf(to_cycle_cnt, outrec, 11, buf_index, LOW_NIBBLE); // to_cycle_cnt
-+
-+ // data fetch data 1
-+ outrec[buf_index++] = dfetch_data1;
-+ // data fetch data 2
-+ for(cnt = 0; cnt < 4; cnt++)
-+ outrec[buf_index++] = (unsigned char)((dfetch_data2 & ((unsigned int)0xFF << (cnt * 8))) >> (cnt * 8));
-+ // data fetch data 3
-+ for(cnt = 0; cnt < 4; cnt++)
-+ outrec[buf_index++] = (unsigned char)((dfetch_data3 & ((unsigned int)0xFF << (cnt * 8))) >> (cnt * 8));
-+ // PC
-+ for(cnt = 0; cnt < 4; cnt++)
-+ outrec[buf_index++] = (unsigned char)((((unsigned int)child_pc) & ((unsigned int)0xFF << (cnt * 8))) >> (cnt * 8));
-+ }else if(tag == PROFTYPE_OT3){
-+ // parent_id
-+ outrec[7] = (unsigned char)(parent_pc & 0x000000FF);
-+ outrec[8] = (unsigned char)((parent_pc & 0x0000FF00) >> 8);
-+ outrec[9] = (unsigned char)((parent_pc & 0x00FF0000) >> 16);
-+ outrec[10] = (unsigned char)((parent_pc & 0xFF000000) >> 24);
-+ buf_index = 12;
-+ // to_insn_cnt
-+ buf_index = PlaceData2Buf(to_insn_cnt, outrec, 11, buf_index, HIGH_NIBBLE); // to_insn_cnt
-+ buf_index = PlaceData2Buf(to_cycle_cnt, outrec, 11, buf_index, LOW_NIBBLE); // to_cycle_cnt
-+ // PC
-+ for(cnt = 0; cnt < 4; cnt++)
-+ outrec[buf_index++] = (unsigned char)((((unsigned int)child_pc) & ((unsigned int)0xFF << (cnt * 8))) >> (cnt * 8));
-+ // ifetch_data
-+ for(cnt = 0; cnt < 2; cnt++)
-+ outrec[buf_index++] = (unsigned char)((ifetch_data & ((unsigned short)0xFF << (cnt * 8))) >> (cnt * 8));
-+ }
-+
-+ *len = buf_index;
-+ if((tag == PROFTYPE_ON3) || (tag == PROFTYPE_FC3) || (tag == PROFTYPE_FR3) || (tag == PROFTYPE_OFF) || (tag == PROFTYPE_DUMMY_FR3) || (tag == PROFTYPE_BR3) || (tag == PROFTYPE_MA3) || (tag == PROFTYPE_OT3)){
-+
-+ result = fwrite(outrec, buf_index, 1, temp_fd);
-+
-+ if(result == 1)
-+ return 0;
-+ else
-+ return 1;
-+ }else{
-+ return 0;
-+ }
-+} // write_tl3_temp
-+
-+
-+// ----------------------------------------------------------------------------
-+// write_tl2_temp
-+//
-+// This function writes temporary record for level 1 timeline analysis.
-+// return code:
-+// 0 - success
-+// 1 - write error
-+// ----------------------------------------------------------------------------
-+
-+
-+static int
-+write_tl2_temp(bfd_vma child_pc,
-+ bfd_vma parent_pc,
-+ unsigned char tag,
-+ short func_level,
-+ unsigned int func_length,
-+ unsigned long long to_insn_cnt,
-+ unsigned long long to_cycle_cnt,
-+ unsigned long long self_insn_cnt,
-+ unsigned long long self_cycle_cnt,
-+ unsigned long long child_insn_cnt,
-+ unsigned long long child_cycle_cnt,
-+ unsigned long long call_cnt,
-+ unsigned char branch_data,
-+ unsigned long long br_taken_cnt,
-+ unsigned long long br_mis_cnt,
-+ unsigned long long BTB_br_cnt,
-+ unsigned long long bb_cnt,
-+ unsigned int *len)
-+{
-+// int result = 0;
-+ Header_t H;
-+ unsigned char packbuf1[64];
-+ unsigned char packbuf2[256];
-+ unsigned long long pMsg[32];
-+ char wbuf[512];
-+ char * wp;
-+ int plen1 = 0, plen2 = 0;
-+
-+ wp = wbuf;
-+
-+ H.tag = tag;
-+ H.level = func_level;
-+ H.func_id = child_pc;
-+
-+ switch (tag){
-+ case PROFTYPE_FC2:
-+ case PROFTYPE_ON2:
-+ H.parent_id = (exec_stack == NULL)? VEP_INIT_PC: exec_stack->sym->addr;
-+
-+ pMsg[0] = to_insn_cnt;
-+ pMsg[1] = to_cycle_cnt;
-+ plen1 = PackData(packbuf1, pMsg, 2);
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, &func_length, sizeof(long));
-+ wp = mempcpy(wp, packbuf1, plen1);
-+ wp = mempcpy(wp, &branch_data, 1);
-+ break;
-+
-+ case PROFTYPE_FR2:
-+ case PROFTYPE_DUMMY_FR2:
-+ case PROFTYPE_OFF:
-+ if(exec_stack != NULL){
-+ H.parent_id = (exec_stack->next == NULL)? VEP_INIT_PC : exec_stack->next->sym->addr;
-+ }
-+ else {
-+ H.parent_id = parent_pc;
-+ }
-+
-+ pMsg[0] = to_insn_cnt;
-+ pMsg[1] = to_cycle_cnt;
-+ plen1 = PackData(packbuf1, pMsg, 2);
-+
-+ pMsg[0] = self_insn_cnt;
-+ pMsg[1] = self_cycle_cnt;
-+
-+ pMsg[2] = child_insn_cnt;
-+ pMsg[3] = child_cycle_cnt;
-+
-+ pMsg[4] = call_cnt;
-+ pMsg[5] = br_taken_cnt;
-+
-+ pMsg[6] = br_mis_cnt;
-+ pMsg[7] = BTB_br_cnt;
-+
-+ pMsg[8] = bb_cnt;
-+ pMsg[9] = -1;
-+ plen2 = PackData(packbuf2, pMsg, 10);
-+
-+ if(exec_stack != NULL){
-+// update_data_length((temp_file_pos - exec_stack->pos - sizeof(Header_t)),
-+// (temp_file_pos + (sizeof(rec) + plen1) - exec_stack->pos));
-+// update_data_length((temp_file_pos - exec_stack->pos - sizeof(Header_t)),
-+// (temp_file_pos + (sizeof(Header_t) + plen1 + 1)) );
-+
-+ update_data_length((temp_file_pos - exec_stack->pos - sizeof(Header_t)),
-+ temp_file_pos);
-+ }
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, packbuf1, plen1);
-+ wp = mempcpy(wp, &branch_data, 1);
-+ wp = mempcpy(wp, packbuf2, plen2);
-+ break;
-+
-+ case PROFTYPE_BR2:
-+ H.parent_id = parent_pc;
-+ pMsg[0] = to_insn_cnt;
-+ pMsg[1] = to_cycle_cnt;
-+ plen1 = PackData(packbuf1, pMsg, 2);
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, packbuf1, plen1);
-+ wp = mempcpy(wp, &branch_data, 1);
-+ wp = mempcpy(wp, &parent_pc, 4); // reserve 4 bytes
-+ break;
-+ }
-+ if (!fwrite(wbuf, wp - wbuf, 1, temp_fd))
-+ {
-+ gErrorCode = errno;
-+ return -1;
-+ }
-+ else
-+ *len = wp - wbuf;
-+
-+ return 0;
-+
-+} // write_tl2_temp
-+// ----------------------------------------------------------------------------
-+// write_tl1_temp
-+//
-+// This function writes temporary record for level 1 timeline analysis.
-+// return code:
-+// 0 - success
-+// 1 - write error
-+// ----------------------------------------------------------------------------
-+static int
-+write_tl1_temp(bfd_vma child_pc,
-+ bfd_vma parent_pc,
-+ unsigned char tag,
-+ short func_level,
-+ unsigned int func_length,
-+ unsigned long long to_insn_cnt,
-+ unsigned long long to_cycle_cnt,
-+ unsigned long long self_insn_cnt,
-+ unsigned long long self_cycle_cnt,
-+ unsigned long long child_insn_cnt,
-+ unsigned long long child_cycle_cnt,
-+ unsigned long long call_cnt,
-+ unsigned int *len)
-+{
-+// int result = 0;
-+ Header_t H;
-+ unsigned char packbuf1[64];
-+ unsigned char packbuf2[256];
-+ unsigned long long pMsg[32];
-+ char wbuf[512];
-+ char * wp;
-+ int plen1 = 0, plen2 = 0;
-+
-+ wp = wbuf;
-+
-+ H.tag = tag;
-+ H.level = func_level;
-+ H.func_id = child_pc;
-+
-+ switch (tag){
-+ case PROFTYPE_FC1:
-+ case PROFTYPE_ON1:
-+ H.parent_id = (exec_stack == NULL)? VEP_INIT_PC: exec_stack->sym->addr;
-+
-+ pMsg[0] = to_insn_cnt;
-+ pMsg[1] = to_cycle_cnt;
-+ plen1 = PackData(packbuf1, pMsg, 2);
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, &func_length, sizeof(long));
-+ wp = mempcpy(wp, packbuf1, plen1);
-+ break;
-+
-+ case PROFTYPE_FR1:
-+ case PROFTYPE_DUMMY_FR1:
-+ case PROFTYPE_OFF:
-+ if(exec_stack != NULL){
-+ H.parent_id = (exec_stack->next == NULL)? VEP_INIT_PC : exec_stack->next->sym->addr;
-+ }
-+ else {
-+ H.parent_id = parent_pc;
-+ }
-+
-+ pMsg[0] = to_insn_cnt;
-+ pMsg[1] = to_cycle_cnt;
-+ plen1 = PackData(packbuf1, pMsg, 2);
-+
-+ pMsg[0] = self_insn_cnt;
-+ pMsg[1] = self_cycle_cnt;
-+ pMsg[2] = child_insn_cnt;
-+ pMsg[3] = child_cycle_cnt;
-+ pMsg[4] = call_cnt;
-+ plen2 = PackData(packbuf2, pMsg, 5);
-+
-+ if(exec_stack != NULL){
-+// update_data_length((temp_file_pos - exec_stack->pos - sizeof(Header_t)),
-+// (temp_file_pos + (sizeof(rec) + plen1) - exec_stack->pos));
-+ update_data_length((temp_file_pos - exec_stack->pos - sizeof(Header_t)),
-+ (temp_file_pos + (sizeof(Header_t) + plen1)) );
-+ }
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, packbuf1, plen1);
-+ wp = mempcpy(wp, packbuf2, plen2);
-+ break;
-+ }
-+ if (!fwrite(wbuf, wp - wbuf, 1, temp_fd))
-+ {
-+ gErrorCode = errno;
-+ return -1;
-+ }
-+ else
-+ *len = wp - wbuf;
-+
-+ return 0;
-+
-+} // write_tl1_temp
-+
-+
-+// ----------------------------------------------------------------------------
-+// push_callee2
-+//
-+// This function handles callee entry.
-+// return code:
-+// 0 - success
-+// 2 - write error
-+// 3 - memory error
-+// ----------------------------------------------------------------------------
-+static int
-+push_callee2(bfd_vma self,
-+ bfd_vma parent,
-+ __attribute__((unused))unsigned int icnt,
-+ __attribute__((unused))unsigned int ccnt,
-+ unsigned long long pos/*,
-+ unsigned long long branch_taken_cnt,
-+ unsigned long long branch_misprediction_cnt,
-+ unsigned long long BTB_branch_cnt*/)
-+{
-+ Sym *func;
-+ SymListNode *funcnode;
-+
-+ // is this function monitored?
-+ func=sym_lookup(&symtab,self);
-+ if (func==NULL)
-+ {
-+ func=symht_lookup(self);
-+ if (func==NULL)
-+ { // new unresolved symbol
-+ func=(Sym*)malloc(sizeof(Sym));
-+ if (func==NULL)
-+ return 3;
-+ sym_init(func);
-+ func->is_func=1;
-+ func->addr=self;
-+
-+ // add into unresolved list
-+ if (symht_add(func)!=0)
-+ { free(func);
-+ return 3;
-+ }
-+ }
-+ }
-+
-+// // generate a temporary timeline record
-+// if (do_timeline&&write_tl_temp(self,icnt,ccnt)!=0)
-+// return 2;
-+
-+ // push callee into execution stack
-+ funcnode=(SymListNode*)malloc(sizeof(SymListNode));
-+ if (funcnode==NULL)
-+ return 3;
-+ funcnode->sym=func;
-+ funcnode->caller_addr=parent;
-+ funcnode->self_insn_cnt=0;
-+ funcnode->self_cycle_cnt=0;
-+ funcnode->child_insn_cnt=0;
-+ funcnode->child_cycle_cnt=0;
-+ funcnode->calls=0;
-+ funcnode->branch_taken_cnt = 0;
-+ funcnode->branch_misprediction_cnt = 0;
-+ funcnode->BTB_branch_cnt = 0;
-+ funcnode->icache_replace_cnt = 0;
-+ funcnode->icache_miss_cnt = 0;
-+ funcnode->icache_access_cnt = 0;
-+ funcnode->dcache_replace_cnt = 0;
-+ funcnode->dcache_miss_cnt = 0;
-+ funcnode->dcache_access_cnt = 0;
-+ funcnode->bb_cnt = 0;
-+ funcnode->pos=pos;
-+ funcnode->next=exec_stack;
-+ // add this arc
-+ tl_cg_tally(parent,self,1,0,0);
-+ exec_stack=funcnode;
-+#ifdef TRACE_STACK
-+ fprintf(stderr,"call\t");
-+ trace_stack(exec_stack,exec_stack->next);
-+#endif // TRACE_STACK
-+
-+ return 0;
-+} // push_callee2
-+
-+// ----------------------------------------------------------------------------
-+// push_callee
-+//
-+// This function handles callee entry.
-+// return code:
-+// 0 - success
-+// 2 - write error
-+// 3 - memory error
-+// ----------------------------------------------------------------------------
-+static int
-+push_callee(bfd_vma self,
-+ bfd_vma parent,
-+ unsigned int icnt,
-+ unsigned int ccnt,
-+ unsigned long long pos,
-+ unsigned long long br_taken_cnt,
-+ unsigned long long br_mis_cnt,
-+ unsigned long long BTB_br_cnt,
-+ unsigned long long icache_replace_cnt,
-+ unsigned long long icache_miss_cnt,
-+ unsigned long long icache_access_cnt,
-+ unsigned long long dcache_replace_cnt,
-+ unsigned long long dcache_miss_cnt,
-+ unsigned long long dcache_access_cnt)
-+{ // if profiling on not started from beginning
-+ // exec_stack could be NULL
-+ if (exec_stack!=NULL)
-+ {
-+ Sym * caller=exec_stack->sym;
-+
-+ // update execution time to caller which must exist
-+ exec_stack->self_insn_cnt += icnt;
-+ exec_stack->self_cycle_cnt += ccnt;
-+ exec_stack->calls++;
-+ exec_stack->bb_cnt++;
-+ exec_stack->branch_taken_cnt += br_taken_cnt;
-+ exec_stack->branch_misprediction_cnt += br_mis_cnt;
-+ exec_stack->BTB_branch_cnt += BTB_br_cnt;
-+
-+ exec_stack->icache_replace_cnt += icache_replace_cnt;
-+ exec_stack->icache_miss_cnt += icache_miss_cnt;
-+ exec_stack->icache_access_cnt += icache_access_cnt;
-+
-+ exec_stack->dcache_replace_cnt += dcache_replace_cnt;
-+ exec_stack->dcache_miss_cnt += dcache_miss_cnt;
-+ exec_stack->dcache_access_cnt += dcache_access_cnt;
-+
-+ caller->hist.total_insn_cnt += icnt;
-+ caller->hist.total_cycle_cnt += ccnt;
-+ }
-+
-+ return push_callee2(self,parent,icnt,ccnt,pos);
-+} // push_callee
-+
-+// ----------------------------------------------------------------------------
-+// pop_callee2
-+//
-+// This function handles callee exit.
-+// return code:
-+// 0 - success
-+// 2 - write error
-+// ----------------------------------------------------------------------------
-+static int
-+pop_callee2(unsigned int icnt,
-+ unsigned int ccnt,
-+ unsigned char tag,
-+ bfd_vma tpc,
-+ unsigned char branch_data,
-+ unsigned short ifetch,
-+ unsigned char dfetch1,
-+ unsigned int dfetch2,
-+ unsigned int dfetch3,
-+ unsigned long long br_taken_cnt,
-+ unsigned long long br_mis_cnt,
-+ unsigned long long BTB_br_cnt,
-+ unsigned long long icache_replace_cnt,
-+ unsigned long long icache_miss_cnt,
-+ unsigned long long icache_access_cnt,
-+ unsigned long long dcache_replace_cnt,
-+ unsigned long long dcache_miss_cnt,
-+ unsigned long long dcache_access_cnt)
-+{ SymListNode *cexec=exec_stack;
-+ Sym *callee=cexec->sym;
-+ int result = 0;
-+ unsigned int len = 0;
-+
-+ // update execution time to callee
-+ cexec->self_insn_cnt+=icnt;
-+ cexec->self_cycle_cnt+=ccnt;
-+ cexec->bb_cnt++;
-+ cexec->branch_taken_cnt += br_taken_cnt;
-+ cexec->branch_misprediction_cnt += br_mis_cnt;
-+ cexec->BTB_branch_cnt += BTB_br_cnt;
-+ cexec->icache_replace_cnt += icache_replace_cnt;
-+ cexec->icache_miss_cnt += icache_miss_cnt;
-+ cexec->icache_access_cnt += icache_access_cnt;
-+ cexec->dcache_replace_cnt += dcache_replace_cnt;
-+ cexec->dcache_miss_cnt += dcache_miss_cnt;
-+ cexec->dcache_access_cnt += dcache_access_cnt;
-+ callee->hist.total_insn_cnt+=icnt;
-+ callee->hist.total_cycle_cnt+=ccnt;
-+
-+ // generate a temporary timeline record
-+ if (do_timeline){
-+ if(tcghdr.timeline_level == 1){
-+ result = write_tl1_temp(callee->addr, tpc, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, cexec->self_insn_cnt, cexec->self_cycle_cnt, cexec->child_insn_cnt, cexec->child_cycle_cnt, cexec->calls, &len);
-+ }else if(tcghdr.timeline_level == 2){
-+ result = write_tl2_temp(callee->addr, tpc, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, cexec->self_insn_cnt, cexec->self_cycle_cnt, cexec->child_insn_cnt, cexec->child_cycle_cnt, cexec->calls, branch_data, cexec->branch_taken_cnt, cexec->branch_misprediction_cnt, cexec->BTB_branch_cnt, cexec->bb_cnt, &len);
-+ }else if(tcghdr.timeline_level == 3){
-+ result = write_tl3_temp(callee->addr, tpc, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, cexec->self_insn_cnt, cexec->self_cycle_cnt, cexec->child_insn_cnt, cexec->child_cycle_cnt, cexec->calls, branch_data, ifetch, dfetch1, dfetch2, dfetch3, &len);
-+ }else if(tcghdr.timeline_level == 6){
-+ result = write_tl6_temp(callee->addr, tpc, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, cexec->self_insn_cnt, cexec->self_cycle_cnt, cexec->child_insn_cnt, cexec->child_cycle_cnt, cexec->calls, cexec->branch_taken_cnt, cexec->branch_misprediction_cnt, cexec->BTB_branch_cnt, &len);
-+ }else if(tcghdr.timeline_level == 7){
-+ result = write_tl7_temp(callee->addr, tpc, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, cexec->self_insn_cnt, cexec->self_cycle_cnt, cexec->child_insn_cnt, cexec->child_cycle_cnt, cexec->calls, cexec->icache_replace_cnt, cexec->icache_miss_cnt, cexec->icache_access_cnt, cexec->dcache_replace_cnt, cexec->dcache_miss_cnt, cexec->dcache_access_cnt, &len);
-+ }else if(tcghdr.timeline_level == 8){
-+ result = write_tl8_temp(callee->addr, tpc, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, cexec->self_insn_cnt, cexec->self_cycle_cnt, cexec->child_insn_cnt, cexec->child_cycle_cnt, cexec->calls, cexec->branch_taken_cnt, cexec->branch_misprediction_cnt, cexec->BTB_branch_cnt, cexec->icache_replace_cnt, cexec->icache_miss_cnt, cexec->icache_access_cnt, cexec->dcache_replace_cnt, cexec->dcache_miss_cnt, cexec->dcache_access_cnt, &len);
-+ }else if(tcghdr.timeline_level == 9){
-+ result = write_tl9_temp(callee->addr, tpc, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, cexec->self_insn_cnt, cexec->self_cycle_cnt, cexec->child_insn_cnt, cexec->child_cycle_cnt, cexec->calls, branch_data, cexec->bb_cnt, cexec->branch_taken_cnt, cexec->branch_misprediction_cnt, cexec->BTB_branch_cnt, icache_replace_cnt, icache_miss_cnt, icache_access_cnt, dcache_replace_cnt, dcache_miss_cnt, dcache_access_cnt, cexec->icache_replace_cnt, cexec->icache_miss_cnt, cexec->icache_access_cnt, cexec->dcache_replace_cnt, cexec->dcache_miss_cnt, cexec->dcache_access_cnt, &len);
-+ }
-+ if(result != 0)
-+ return 2;
-+ temp_file_pos += len;
-+ }
-+
-+ // pop out callee
-+ exec_stack=cexec->next;
-+
-+ // update execution time to caller
-+ tl_cg_tally(cexec->caller_addr,callee->addr,0,cexec->self_insn_cnt,cexec->self_cycle_cnt);
-+ if (exec_stack!=NULL)
-+ { Sym *caller=exec_stack->sym;
-+
-+ exec_stack->child_insn_cnt+=cexec->self_insn_cnt+cexec->child_insn_cnt;
-+ exec_stack->child_cycle_cnt+=cexec->self_cycle_cnt+cexec->child_cycle_cnt;
-+ caller->cg.child_insn_cnt+=cexec->self_insn_cnt;
-+ caller->cg.child_cycle_cnt+=cexec->self_cycle_cnt;
-+ }
-+#ifdef TRACE_STACK
-+ fprintf(stderr,"ret\t");
-+ trace_stack(cexec,exec_stack);
-+#endif // TRACE_STACK
-+ free(cexec);
-+
-+ return 0;
-+} // pop_callee2
-+
-+// ----------------------------------------------------------------------------
-+// pop_callee
-+//
-+// This function handles callee exit.
-+// return code:
-+// 0 - success
-+// 2 - write error
-+// ----------------------------------------------------------------------------
-+static int
-+pop_callee(bfd_vma self,
-+ bfd_vma parent,
-+ unsigned int icnt,
-+ unsigned int ccnt,
-+ unsigned char tag,
-+ unsigned char branch_data,
-+ unsigned short ifetch,
-+ unsigned char dfetch1,
-+ unsigned int dfetch2,
-+ unsigned int dfetch3,
-+ unsigned long long br_taken_cnt,
-+ unsigned long long br_mis_cnt,
-+ unsigned long long BTB_br_cnt,
-+ unsigned long long icache_replace_cnt,
-+ unsigned long long icache_miss_cnt,
-+ unsigned long long icache_access_cnt,
-+ unsigned long long dcache_replace_cnt,
-+ unsigned long long dcache_miss_cnt,
-+ unsigned long long dcache_access_cnt)
-+{
-+ int result = 0;
-+ unsigned int len = 0;
-+
-+ if (exec_stack!=NULL)
-+ return pop_callee2(icnt,ccnt,tag,parent,branch_data,ifetch,dfetch1,dfetch2,dfetch3,br_taken_cnt,br_mis_cnt,BTB_br_cnt, icache_replace_cnt, icache_miss_cnt, icache_access_cnt, dcache_replace_cnt, dcache_miss_cnt, dcache_access_cnt);
-+ else
-+ { Sym *caller=sym_lookup(&symtab,parent);
-+ Sym *callee=sym_lookup(&symtab,self);
-+
-+ // off balanced profiling on/off setting
-+ // update execution time to callee
-+ callee->hist.total_insn_cnt+=icnt;
-+ callee->hist.total_cycle_cnt+=ccnt;
-+
-+// // generate a temporary timeline record
-+// if (do_timeline&&write_tl_temp(callee->addr,icnt,ccnt)!=0)
-+// return 2;
-+ // generate a temporary timeline record
-+ if (do_timeline){
-+ if(tcghdr.timeline_level == 1){
-+ result = write_tl1_temp(callee->addr, caller->addr, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, icnt, ccnt, 0, 0, 0, &len);
-+ }else if(tcghdr.timeline_level == 2){
-+ result = write_tl2_temp(callee->addr, caller->addr, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, icnt, ccnt, 0, 0, 0, branch_data, 0, 0, 0, 0, &len);
-+ }else if(tcghdr.timeline_level == 3){
-+ result = write_tl3_temp(callee->addr, caller->addr, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, icnt, ccnt, 0, 0, 0, branch_data, ifetch, dfetch1, dfetch2, dfetch3, &len);
-+ }else if(tcghdr.timeline_level == 6){
-+ result = write_tl6_temp(callee->addr, caller->addr, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, icnt, ccnt, 0, 0, 0, 0, 0, 0, &len);
-+ }else if(tcghdr.timeline_level == 7){
-+ result = write_tl7_temp(callee->addr, caller->addr, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, icnt, ccnt, 0, 0, 0, 0, 0, 0, 0, 0, 0, &len);
-+ }else if(tcghdr.timeline_level == 8){
-+ result = write_tl8_temp(callee->addr, caller->addr, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, icnt, ccnt, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, &len);
-+ }else if(tcghdr.timeline_level == 9){
-+ result = write_tl9_temp(callee->addr, caller->addr, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, icnt, ccnt, 0, 0, 0, branch_data, 0, 0, 0, 0, icache_replace_cnt, icache_miss_cnt, icache_access_cnt, dcache_replace_cnt, dcache_miss_cnt, dcache_access_cnt, 0, 0, 0, 0, 0, 0, &len);
-+ }
-+ if(result != 0)
-+ return 2;
-+ temp_file_pos += len;
-+ }
-+
-+ // add this arc
-+ tl_cg_tally(parent,callee->addr,1,0,0);
-+ // update execution time to caller
-+ tl_cg_tally(parent,callee->addr,0,icnt,ccnt);
-+
-+ caller->cg.child_insn_cnt+=icnt;
-+ caller->cg.child_cycle_cnt+=ccnt;
-+#ifdef TRACE_STACK
-+ fprintf(stderr,"ret\t\t\t%s\t\t\t\t\t\t\tX%08X@%s\t\t\t\t\t",
-+ get_name(callee->name),parent,get_name(caller->name));
-+ fprintf(stderr,"%llu\t%llu\t%llu\t%llu\t",
-+ callee->hist.total_insn_cnt,callee->hist.total_cycle_cnt,
-+ callee->cg.child_insn_cnt,callee->cg.child_cycle_cnt);
-+ if (caller!=NULL)
-+ fprintf(stderr,"%llu\t%llu\t%llu\t%llu\n",
-+ caller->hist.total_insn_cnt,caller->hist.total_cycle_cnt,
-+ caller->cg.child_insn_cnt,caller->cg.child_cycle_cnt);
-+ else
-+ fprintf(stderr,"\t\t\t\n");
-+#endif // TRACE_STACK
-+
-+ return 0;
-+ }
-+} // pop_callee
-+
-+// ----------------------------------------------------------------------------
-+// read_prof_on
-+//
-+// This function reads the profiling on record from prof.out. Currently, we
-+// only support single on/off block in single prof.out file. We may support
-+// multiple blocks in future and also possibly different profiling levels in
-+// single prof.out file.
-+// return code:
-+// 0 - success
-+// 1 - read error
-+// 2 - write error
-+// 3 - memory error
-+// 4 - bad tag
-+// ----------------------------------------------------------------------------
-+static int
-+read_prof_on(FILE *fd,
-+ unsigned char proftag)
-+{ int result;
-+ unsigned char tag;
-+
-+
-+ // read the tag
-+ result=(fread(&tag,sizeof(unsigned char),1,fd)!=1);
-+
-+ if (result==0)
-+ { // must be expected tag
-+ if (tag!=proftag)
-+ return 4;
-+ else
-+ { profmdata mydata;
-+ result=(fread(&mydata,PROFDLEN_ON-1,1,fd)!=1);
-+ if (result==0)
-+ {
-+ unsigned int len = 0;
-+ // generate a temporary timeline record
-+ if (do_timeline){
-+ int result_in = 0;
-+
-+ CurrentPC = mydata.data.pc;
-+ current_insn_cnt += mydata.data.icnt;
-+ current_cycle_cnt += mydata.data.ccnt;
-+ function_level++;
-+
-+ if(proftag == PROFTYPE_ON1){
-+ result_in = write_tl1_temp(mydata.data.pc, 0, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0, &len);
-+// fflush(temp_fd);
-+ }else if(proftag == PROFTYPE_ON2){
-+ result_in = write_tl2_temp(mydata.data.pc, 0, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0, 0,0,0,0,0, &len);
-+// fflush(temp_fd);
-+ }else if(proftag == PROFTYPE_ON3){
-+ result_in = write_tl3_temp(mydata.data.pc, 0, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, &len);
-+// fflush(temp_fd);
-+ }else if(proftag == PROFTYPE_ON6){
-+ result_in = write_tl6_temp(mydata.data.pc, 0, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0, 0, 0, 0, &len);
-+// fflush(temp_fd);
-+ }else if(proftag == PROFTYPE_ON7){
-+ result_in = write_tl7_temp(mydata.data.pc, 0, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0,0,0,0,0,0,0, &len);
-+// fflush(temp_fd);
-+ }else if(proftag == PROFTYPE_ON8){
-+ result_in = write_tl8_temp(mydata.data.pc, 0, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0,0,0,0, &len);
-+// fflush(temp_fd);
-+ }else if(proftag == PROFTYPE_ON9){
-+ result_in = write_tl9_temp(mydata.data.pc, 0, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, &len);
-+// fflush(temp_fd);
-+ }
-+ if(result_in != 0)
-+ return 2;
-+ }
-+
-+ result=push_callee2(mydata.data.pc,VEP_INIT_PC,mydata.data.icnt,mydata.data.ccnt,temp_file_pos);
-+ if (result==0)
-+ current_unmapped=((mydata.mode&IT_MASK)==0);
-+
-+ temp_file_pos += len;
-+ }
-+ }
-+ }
-+
-+ return result;
-+} // read_prof_on
-+
-+// ----------------------------------------------------------------------------
-+// read_profm _data
-+//
-+// This function reads the pc address, instruction count, cycle count, and
-+// process mode/endian/IT/DT flag data for all profiling levels from prof.out.
-+// return code:
-+// 0 - success
-+// 1 - read error
-+// ----------------------------------------------------------------------------
-+static int
-+read_profm_data(FILE *fd,
-+ profmdata *mydata)
-+{ int result;
-+
-+ result=fread(&mydata->data,sizeof(prof1data),1,fd);
-+ if (result)
-+ result=fread(&mydata->mode,sizeof(unsigned char),1,fd);
-+
-+ return !result;
-+} // read_profm_data
-+
-+// ----------------------------------------------------------------------------
-+// read_prof1_data
-+//
-+// This function reads the function coverage profiling records from prof.out.
-+// return code:
-+// 0 - success
-+// 1 - read error
-+// 2 - write error
-+// 3 - memory error
-+// 4 - bad tag
-+// ----------------------------------------------------------------------------
-+static int
-+read_prof1_data(FILE *fd)
-+{
-+ int result;
-+ unsigned char tag;
-+ prof1data2 mydata;
-+ profmdata mydata2;
-+
-+
-+ while (fread(&tag,sizeof(unsigned char),1,fd)==1)
-+ {
-+ if (temp_file_pos > TIMELINE_LIMIT)
-+ {
-+ // We have a timeline too big, change the tag to PROF_OFF to finish
-+ tag = PROFTYPE_OFF;
-+ }
-+
-+ switch (tag) {
-+ case PROFTYPE_FC1:
-+ tcghdr.to_fn_call_tag++;
-+ // we have a call here
-+ result=(fread(&mydata,sizeof(prof1data2),1,fd)!=1);
-+
-+ if (result==0){
-+ unsigned int len = 0;
-+ function_level++;
-+ if(function_level > max_function_level)
-+ max_function_level = function_level;
-+
-+ current_insn_cnt += mydata.data.icnt;
-+ current_cycle_cnt += mydata.data.ccnt;
-+ // generate a temporary timeline record
-+ if (do_timeline){
-+ result = write_tl1_temp(mydata.tpc, mydata.data.pc, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0, &len);
-+ if(result != 0)
-+ return 2;
-+ }
-+ result=push_callee(mydata.tpc,mydata.data.pc,mydata.data.icnt,mydata.data.ccnt, temp_file_pos, 0, 0, 0, 0,0,0,0,0,0);
-+ temp_file_pos += len;
-+ }
-+ break;
-+
-+ case PROFTYPE_FR1:
-+ tcghdr.to_fn_rt_tag++;
-+ // we have a return here
-+ result=(fread(&mydata,sizeof(prof1data2),1,fd)!=1);
-+
-+ if (result==0){
-+ function_level--;
-+ if(min_function_level > function_level)
-+ min_function_level = function_level;
-+ current_insn_cnt += mydata.data.icnt;
-+ current_cycle_cnt += mydata.data.ccnt;
-+ result=pop_callee(mydata.data.pc,mydata.tpc,mydata.data.icnt,mydata.data.ccnt,tag,0,0,0,0,0,0,0,0,0,0,0,0,0,0);
-+ }
-+ break;
-+ case PROFTYPE_MOD:
-+ // mode changed
-+ result=read_profm_data(fd,&mydata2);
-+
-+ if (result==0)
-+ { // update current time point
-+ current_insn_cnt+=mydata2.data.icnt;
-+ current_cycle_cnt+=mydata2.data.ccnt;
-+ if (exec_stack != NULL) {
-+ exec_stack->self_insn_cnt+=mydata2.data.icnt;
-+ exec_stack->self_cycle_cnt+=mydata2.data.ccnt;
-+ exec_stack->sym->hist.total_insn_cnt+=mydata2.data.icnt;
-+ exec_stack->sym->hist.total_cycle_cnt+=mydata2.data.ccnt;
-+ }
-+
-+ // need to address all possible cause
-+ // do we need target pc address? for instructions like
-+ // jral.xton we do not need it again
-+ current_unmapped=((mydata2.mode&IT_MASK)==0);
-+ }
-+ break;
-+ case PROFTYPE_OFF:
-+ // done reading profiling data
-+ result=(fread(&mydata.data,sizeof(prof1data),1,fd)!=1);
-+ result=fread(&mydata.tpc, 1, 1, fd);
-+
-+ if (result==0)
-+ {
-+ unsigned int delta_icnt = 0, delta_ccnt = 0;
-+
-+ function_level--;
-+ if(min_function_level > function_level)
-+ min_function_level = function_level;
-+ current_insn_cnt += mydata.data.icnt;
-+ current_cycle_cnt += mydata.data.ccnt;
-+ delta_icnt = mydata.data.icnt;
-+ delta_ccnt = mydata.data.ccnt;
-+ if (exec_stack != NULL)
-+ {
-+ while(exec_stack->next != NULL){
-+ tag = PROFTYPE_DUMMY_FR1;
-+ tcghdr.to_du_rt_tag++;
-+ pop_callee(exec_stack->sym->addr, exec_stack->next->sym->addr, delta_icnt, delta_ccnt, tag, 0,0,0,0,0,0,0,0,0,0,0,0,0,0);
-+ function_level--;
-+ if(min_function_level > function_level)
-+ min_function_level = function_level;
-+ delta_icnt = 0;
-+ delta_ccnt = 0;
-+ }
-+ tag = PROFTYPE_OFF;
-+ // profiling turned off, so clean up the execution stack
-+ pop_callee2(delta_icnt, delta_ccnt, tag, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0,0,0,0);
-+ }
-+ else
-+ pop_callee(mydata.data.pc,mydata.tpc,mydata.data.icnt,mydata.data.ccnt,tag,0,0,0,0,0,0,0,0,0,0,0,0,0,0);
-+ }
-+ return result;
-+ default:
-+ return 4;
-+ }
-+ if (result!=0)
-+ return result;
-+ }
-+ // read error - only successful exit is from PROFTYPE_OFF record
-+ return 1;
-+} // read_prof1_data
-+
-+// ----------------------------------------------------------------------------
-+// tl1_read_rec
-+//
-+// This function reads the timeline based profiling data for function coverage.
-+// The expected sequences are 0xc1, {0x11,0x12,0xcf}*, 0xc0.
-+// return code: (execution terminated if any error encountered.)
-+// 0x00 - end-of-file
-+// tag - next tag
-+// ----------------------------------------------------------------------------
-+static unsigned char
-+tl1_read_rec(FILE *fd,
-+ const char *filename)
-+{ unsigned char tag;
-+ int result;
-+
-+ result=read_prof_on(fd,PROFTYPE_ON1);
-+ if (result==0)
-+ result=read_prof1_data(fd);
-+ if (result!=0)
-+ return prof_errmsg(result,filename); // no return
-+
-+ if (temp_file_pos > TIMELINE_LIMIT)
-+ return 0x00;
-+
-+ if (fread(&tag,sizeof(unsigned char),1,fd)!=1)
-+ tag=0x00; // can only be end-of-file
-+
-+ return tag;
-+} // tl1_read_rec
-+
-+// ----------------------------------------------------------------------------
-+// read_prof2_data2
-+//
-+// This function reads the pc address, instruction count, cycle count, target
-+// pc, and branch prediction data for profiling level 2 from prof.out.
-+// return code:
-+// 0 - success
-+// 1 - read error
-+// ----------------------------------------------------------------------------
-+static int
-+read_prof2_data2(FILE *fd,
-+ prof2data *mydata)
-+{ int result;
-+
-+ result=(fread(&mydata->data,sizeof(prof1data2),1,fd)!=1);
-+ if (result==0)
-+ result=(fread(&mydata->br,sizeof(unsigned char),1,fd)!=1);
-+
-+ return result;
-+} // read_prof2_data2
-+
-+
-+// ---------------------------------------------------------------------------
-+// add_branch_count_to_sym
-+//
-+// This function adds count of basic block to sym.
-+// return code:
-+// 0 - success
-+// 1 - error
-+// ----------------------------------------------------------------------------
-+static int
-+add_branch_count_to_sym(bfd_vma parent, int count)
-+{
-+ Sym *sym;
-+
-+ if (line_granularity){
-+ sym = sym_lookup (&symtab, parent);
-+ if (sym){
-+ int i;
-+
-+ for (i = 0; i < NBBS; i++)
-+ {
-+ if (! sym->bb_addr[i] || sym->bb_addr[i] == parent)
-+ {
-+ sym->bb_addr[i] = parent;
-+ sym->bb_calls[i] += count;
-+ break;
-+ }
-+ }
-+ }
-+ }
-+ return 0;
-+}
-+
-+// ----------------------------------------------------------------------------
-+// read_prof2_data
-+//
-+// This function reads the branch coverage profiling records from prof.out.
-+// return code:
-+// 0 - success
-+// 1 - read error
-+// 2 - write error
-+// 3 - memory error
-+// 4 - bad tag
-+// ----------------------------------------------------------------------------
-+static int
-+read_prof2_data(FILE *fd)
-+{ int result;
-+ unsigned char tag;
-+ prof2data mydata;
-+ profmdata mydata2;
-+
-+ while (fread(&tag,sizeof(unsigned char),1,fd)==1)
-+ {
-+ if (temp_file_pos > TIMELINE_LIMIT)
-+ {
-+ // We have a timeline too big, change the tag to PROF_OFF to finish
-+ tag = PROFTYPE_OFF;
-+ }
-+
-+ switch (tag)
-+ {
-+ case PROFTYPE_FC2:
-+ tcghdr.to_fn_call_tag++;
-+ result=read_prof2_data2(fd,&mydata);
-+ if (result==0){
-+ unsigned int len = 0;
-+
-+ function_level++;
-+ if(function_level > max_function_level)
-+ max_function_level = function_level;
-+ current_insn_cnt += mydata.data.data.icnt;
-+ current_cycle_cnt += mydata.data.data.ccnt;
-+ // generate a temporary timeline record
-+ if (do_timeline){
-+ result = write_tl2_temp(mydata.data.tpc, mydata.data.data.pc, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0, mydata.br,0,0,0,0, &len);
-+ if(result != 0)
-+ return 2;
-+ }
-+ result=push_callee(mydata.data.tpc,mydata.data.data.pc,mydata.data.data.icnt,mydata.data.data.ccnt, temp_file_pos, ((mydata.br & 0x02) >> 1), (mydata.br & 0x01), ((mydata.br & 0xFC) >> 2),0,0,0,0,0,0);
-+ temp_file_pos += len;
-+ }
-+
-+ // branch prediction
-+ total_BTB_branch_count = (unsigned long long)((mydata.br & 0xFC)>>2);
-+ total_branch_taken_count = (unsigned long long)((mydata.br & 0x02)>>1);
-+ total_branch_mispred_count = (unsigned long long)(mydata.br & 0x01);
-+ tcghdr.to_bb_cnt++;
-+ break;
-+ case PROFTYPE_FR2:
-+ tcghdr.to_fn_rt_tag++;
-+ result=read_prof2_data2(fd,&mydata);
-+ if (result==0){
-+ function_level--;
-+ if(min_function_level > function_level)
-+ min_function_level = function_level;
-+ current_insn_cnt += mydata.data.data.icnt;
-+ current_cycle_cnt += mydata.data.data.ccnt;
-+ result=pop_callee(mydata.data.data.pc,mydata.data.tpc,mydata.data.data.icnt,mydata.data.data.ccnt,tag,mydata.br,0,0,0,0,0,(mydata.br & 0x01), ((mydata.br & 0xFC) >> 2),0,0,0,0,0,0);
-+ }
-+ // branch prediction
-+ total_BTB_branch_count = (unsigned long long)((mydata.br & 0xFC)>>2);
-+ total_return_mispred_count = (unsigned long long)(mydata.br & 0x03);
-+ tcghdr.to_bb_cnt++;
-+ break;
-+ case PROFTYPE_BR2:
-+ tcghdr.to_br_tag++;
-+ result=read_prof2_data2(fd,&mydata);
-+ if (result==0){
-+ unsigned int len = 0;
-+
-+ current_insn_cnt += mydata.data.data.icnt;
-+ current_cycle_cnt += mydata.data.data.ccnt;
-+ if (exec_stack != NULL) {
-+ exec_stack->self_insn_cnt+=mydata.data.data.icnt;
-+ exec_stack->self_cycle_cnt+=mydata.data.data.ccnt;
-+ exec_stack->bb_cnt++;
-+ exec_stack->branch_taken_cnt += ((mydata.br & 0x02) >> 1);
-+ exec_stack->branch_misprediction_cnt += (mydata.br & 0x01);
-+ exec_stack->BTB_branch_cnt += ((mydata.br & 0xFC) >> 2);
-+ exec_stack->sym->hist.total_insn_cnt+=mydata.data.data.icnt;
-+ exec_stack->sym->hist.total_cycle_cnt+=mydata.data.data.ccnt;
-+ }
-+ // generate a temporary timeline record
-+ if (do_timeline){
-+ result = write_tl2_temp(mydata.data.tpc, mydata.data.data.pc, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0, mydata.br,0,0,0,0, &len);
-+ if(result != 0)
-+ return 2;
-+ }
-+ temp_file_pos += len;
-+ }
-+ // branch prediction
-+ add_branch_count_to_sym(mydata.data.data.pc, 1);
-+ total_BTB_branch_count = (unsigned long long)((mydata.br & 0xFC)>>2);
-+ total_branch_taken_count = (unsigned long long)((mydata.br & 0x02)>>1);
-+ total_branch_mispred_count = (unsigned long long)(mydata.br & 0x01);
-+ tcghdr.to_bb_cnt++;
-+ break;
-+ case PROFTYPE_MOD:
-+ // mode changed
-+ result=read_profm_data(fd,&mydata2);
-+ if (result==0){
-+ // update current time point
-+ current_insn_cnt+=mydata2.data.icnt;
-+ current_cycle_cnt+=mydata2.data.ccnt;
-+ if (exec_stack != NULL ) {
-+ exec_stack->self_insn_cnt+=mydata2.data.icnt;
-+ exec_stack->self_cycle_cnt+=mydata2.data.ccnt;
-+ exec_stack->sym->hist.total_insn_cnt+=mydata2.data.icnt;
-+ exec_stack->sym->hist.total_cycle_cnt+=mydata2.data.ccnt;
-+ }
-+ current_unmapped=((mydata2.mode&IT_MASK)==0);
-+ }
-+ break;
-+ case PROFTYPE_OFF:
-+ // done reading profiling data
-+ result=(fread(&mydata.data.data,sizeof(prof1data),1,fd)!=1);
-+ if (result==0){
-+ unsigned int delta_icnt = 0, delta_ccnt = 0;
-+
-+ function_level--;
-+ if(min_function_level > function_level)
-+ min_function_level = function_level;
-+ current_insn_cnt += mydata.data.data.icnt;
-+ current_cycle_cnt += mydata.data.data.ccnt;
-+ delta_icnt = mydata.data.data.icnt;
-+ delta_ccnt = mydata.data.data.ccnt;
-+ if (exec_stack != NULL)
-+ {
-+ while(exec_stack->next != NULL){
-+ tag = PROFTYPE_DUMMY_FR2;
-+ tcghdr.to_du_rt_tag++;
-+ pop_callee(exec_stack->sym->addr, exec_stack->next->sym->addr, delta_icnt, delta_ccnt, tag, 0,0,0,0,0,0,0,0,0,0,0,0,0,0);
-+ function_level--;
-+ if(min_function_level > function_level)
-+ min_function_level = function_level;
-+ delta_icnt = 0;
-+ delta_ccnt = 0;
-+ }
-+ tag = PROFTYPE_OFF;
-+ // profiling turned off, so clean up the execution stack
-+ pop_callee2(mydata.data.data.icnt,mydata.data.data.ccnt, tag, mydata.data.tpc, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0,0,0,0);
-+ }
-+ else
-+ pop_callee(mydata.data.data.pc,mydata.data.tpc,mydata.data.data.icnt,mydata.data.data.ccnt,tag,mydata.br,0,0,0,0,0,0, 0,0,0,0,0,0,0);
-+ }
-+ tcghdr.to_bb_cnt++;
-+ return result;
-+ default:
-+ return 4;
-+ }
-+ if (result!=0)
-+ return result;
-+ }
-+
-+ // read error - only successful exit is from PROFTYPE_OFF record
-+ return 1;
-+} // read_prof2_data
-+
-+// ----------------------------------------------------------------------------
-+// tl2_read_rec
-+//
-+// This function reads the timeline based profiling data for branch coverage.
-+// The expected sequences are 0xc2, {0x21,0x22,0x23,0xcf}*, 0xc0.
-+// return code: (execution terminated if any error encountered.)
-+// 0x00 - end-of-file
-+// tag - next tag
-+// ----------------------------------------------------------------------------
-+static unsigned char
-+tl2_read_rec(FILE *fd,
-+ const char *filename)
-+{ unsigned char tag;
-+ int result;
-+
-+ result=read_prof_on(fd,PROFTYPE_ON2);
-+ if (result==0)
-+ result=read_prof2_data(fd);
-+ if (result!=0)
-+ return prof_errmsg(result,filename); // no return
-+ if (temp_file_pos > TIMELINE_LIMIT)
-+ return 0x00;
-+ if (fread(&tag,sizeof(unsigned char),1,fd)!=1)
-+ tag=0x00; // can only be end-of-file
-+
-+ return tag;
-+} // tl2_read_rec
-+
-+// ----------------------------------------------------------------------------
-+// read_prof3_data2
-+//
-+// This function reads the cycle count and data fetch data for profiling level
-+// 3 from prof.out.
-+// return code:
-+// 0 - success
-+// 1 - read error
-+// ----------------------------------------------------------------------------
-+static int
-+read_prof3_data2(FILE *fd,
-+ prof3data2 *mydata2)
-+{
-+ int result;
-+
-+ result = (fread(&mydata2->ccnt, sizeof(unsigned short), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&mydata2->dfetch1, sizeof(unsigned char), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&mydata2->dfetch2, sizeof(unsigned int), 1, fd) != 1);
-+ if(result == 0)
-+ result = (fread(&mydata2->dfetch3, sizeof(unsigned int), 1, fd) != 1);
-+ }
-+ }
-+
-+ return result;
-+} // read_prof3_data2
-+
-+// ----------------------------------------------------------------------------
-+// read_prof3_data3
-+//
-+// This function reads the cycle count and instruction fetch data for profiling
-+// level 3 from prof.out.
-+// return code:
-+// 0 - success
-+// 1 - read error
-+// ----------------------------------------------------------------------------
-+static int
-+read_prof3_data3(FILE *fd,
-+ prof3data3 *mydata3)
-+{
-+ int result;
-+
-+ result = (fread(&mydata3->ccnt, sizeof(unsigned short), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&mydata3->ifetch, sizeof(unsigned short), 1, fd) != 1);
-+ }
-+
-+ return result;
-+} // read_prof3_data3
-+
-+// ----------------------------------------------------------------------------
-+// read_prof3_data1
-+//
-+// This function reads the cycle count, target pc, branch data and instruction
-+// fetch data for profiling level 3 from prof.out.
-+// return code:
-+// 0 - success
-+// 1 - read error
-+// ----------------------------------------------------------------------------
-+static int
-+read_prof3_data1(FILE *fd,
-+ prof3data1 *mydata1)
-+{
-+ int result;
-+ result = (fread(&mydata1->ccnt, sizeof(unsigned short), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&mydata1->tpc, sizeof(bfd_vma), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&mydata1->br, sizeof(unsigned char), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&mydata1->ifetch, sizeof(unsigned short), 1, fd) != 1);
-+ }
-+ }
-+ }
-+
-+ return result;
-+}// read_prof3_data1
-+
-+
-+// ----------------------------------------------------------------------------
-+// read_prof3_data
-+//
-+// This function reads the instruction coverage profiling records from
-+// prof.out.
-+// return code:
-+// 0 - success
-+// 1 - read error
-+// 2 - write error
-+// 3 - memory error
-+// 4 - bad tag
-+// ----------------------------------------------------------------------------
-+static int
-+read_prof3_data(FILE *fd)
-+{
-+ int result;
-+ unsigned char tag;
-+ prof3data1 mydata1;
-+ prof3data2 mydata2;
-+ prof3data3 mydata3;
-+ profmdata mydatam;
-+ prof1data mydataoff;
-+
-+ while (fread(&tag,sizeof(unsigned char),1,fd)==1)
-+ {
-+
-+ if (temp_file_pos > TIMELINE_LIMIT)
-+ {
-+ // We have a timeline too big, change the tag to PROF_OFF to finish
-+ tag = PROFTYPE_OFF;
-+ }
-+
-+ switch (tag){
-+ case PROFTYPE_FC3:
-+ tcghdr.to_fn_call_tag++;
-+ result = read_prof3_data1(fd, &mydata1);
-+ if (result == 0){
-+ unsigned int len = 0;
-+
-+ CurrentPC += sizeof(bfd_vma);
-+ function_level++;
-+ if(function_level > max_function_level)
-+ max_function_level = function_level;
-+ current_insn_cnt++;
-+ current_cycle_cnt += mydata1.ccnt;
-+ if(do_timeline){
-+ result = write_tl3_temp(mydata1.tpc, CurrentPC, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0, mydata1.br, mydata1.ifetch, 0, 0, 0, &len);
-+ if(result != 0)
-+ return 2;
-+ }
-+ result=push_callee(mydata1.tpc,CurrentPC,1,mydata1.ccnt, temp_file_pos, 0, 0, 0,0,0,0,0,0,0);
-+ temp_file_pos += len;
-+ CurrentPC = mydata1.tpc;
-+ total_BTB_branch_count = (unsigned long long)((mydata1.br & 0xFC) >> 2);
-+ total_branch_taken_count = (unsigned long long)((mydata1.br & 0x02) >> 1);
-+ total_branch_mispred_count = (unsigned long long)(mydata1.br & 0x01);
-+ }
-+ tcghdr.to_bb_cnt++;
-+ break;
-+ case PROFTYPE_FR3:
-+ tcghdr.to_fn_rt_tag++;
-+ result = read_prof3_data1(fd, &mydata1);
-+ if (result == 0){
-+ CurrentPC += sizeof(bfd_vma);
-+ function_level--;
-+ if(min_function_level > function_level)
-+ min_function_level = function_level;
-+ current_insn_cnt++;
-+ current_cycle_cnt += mydata1.ccnt;
-+ result=pop_callee(CurrentPC, mydata1.tpc, 1, mydata1.ccnt, tag, mydata1.br, mydata1.ifetch, 0, 0, 0,0,0,0,0,0,0,0,0,0);
-+ CurrentPC = mydata1.tpc;
-+ total_BTB_branch_count = (unsigned long long)((mydata1.br & 0xFC) >> 2);
-+ total_return_mispred_count = (unsigned long long)(mydata1.br & 0x03);
-+ }
-+ tcghdr.to_bb_cnt++;
-+ break;
-+ case PROFTYPE_BR3:
-+ tcghdr.to_br_tag++;
-+ result = read_prof3_data1(fd, &mydata1);
-+ if(result == 0){
-+ unsigned int len = 0;
-+
-+ CurrentPC += sizeof(bfd_vma);
-+ current_insn_cnt++;
-+ current_cycle_cnt += mydata1.ccnt;
-+ if (exec_stack != NULL ){
-+ exec_stack->self_insn_cnt++;
-+ exec_stack->self_cycle_cnt += mydata1.ccnt;
-+ exec_stack->sym->hist.total_insn_cnt++;
-+ exec_stack->sym->hist.total_cycle_cnt += mydata1.ccnt;
-+ }
-+ if(do_timeline){
-+ result = write_tl3_temp(mydata1.tpc, CurrentPC, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0, mydata1.br, mydata1.ifetch, 0, 0, 0, &len);
-+ fflush(temp_fd);
-+ if(result != 0)
-+ return 2;
-+ temp_file_pos += len;
-+ }
-+ add_branch_count_to_sym(CurrentPC, 1);
-+ total_BTB_branch_count = (unsigned long long)((mydata1.br & 0xFC) >> 2);
-+ total_branch_taken_count = (unsigned long long)((mydata1.br & 0x02) >> 1);
-+ total_branch_mispred_count = (unsigned long long)(mydata1.br & 0x01);
-+ tcghdr.to_bb_cnt++;
-+ CurrentPC = mydata1.tpc;
-+ }
-+ break;
-+ case PROFTYPE_MA3:
-+ result = read_prof3_data2(fd, &mydata2);
-+ if(result == 0){
-+ unsigned int len = 0;
-+
-+ CurrentPC += sizeof(bfd_vma);
-+ current_insn_cnt++;
-+ current_cycle_cnt += mydata2.ccnt;
-+ if (exec_stack != NULL ){
-+ exec_stack->self_insn_cnt++;
-+ exec_stack->self_cycle_cnt += mydata2.ccnt;
-+ exec_stack->sym->hist.total_insn_cnt++;
-+ exec_stack->sym->hist.total_cycle_cnt += mydata2.ccnt;
-+ }
-+ if(do_timeline){
-+ result = write_tl3_temp((CurrentPC + sizeof(bfd_vma)), CurrentPC, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0, 0, 0, mydata2.dfetch1, mydata2.dfetch2, mydata2.dfetch3, &len);
-+ fflush(temp_fd);
-+ if(result != 0)
-+ return 2;
-+ temp_file_pos += len;
-+ }
-+ }
-+ break;
-+ case PROFTYPE_OT3:
-+ result = read_prof3_data3(fd, &mydata3);
-+ if(result == 0){
-+ unsigned int len = 0;
-+
-+ CurrentPC += sizeof(bfd_vma);
-+ current_insn_cnt++;
-+ current_cycle_cnt += mydata3.ccnt;
-+ if (exec_stack != NULL ) {
-+ exec_stack->self_insn_cnt++;
-+ exec_stack->self_cycle_cnt += mydata3.ccnt;
-+ exec_stack->sym->hist.total_insn_cnt++;
-+ exec_stack->sym->hist.total_cycle_cnt += mydata3.ccnt;
-+ }
-+ if(do_timeline){
-+ result = write_tl3_temp((CurrentPC + sizeof(bfd_vma)), CurrentPC, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0, 0, mydata3.ifetch, 0, 0, 0, &len);
-+ if(result != 0)
-+ return 2;
-+ temp_file_pos += len;
-+ }
-+ }
-+ break;
-+ case PROFTYPE_MOD:
-+ result = read_profm_data(fd, &mydatam);
-+ if(result == 0){
-+ unsigned int len = 0;
-+
-+ CurrentPC += sizeof(bfd_vma);
-+ current_insn_cnt += mydatam.data.icnt;
-+ current_cycle_cnt += mydatam.data.ccnt;
-+ if (exec_stack != NULL ) {
-+ exec_stack->self_insn_cnt += mydatam.data.icnt;
-+ exec_stack->self_cycle_cnt += mydatam.data.ccnt;
-+ exec_stack->sym->hist.total_insn_cnt += mydatam.data.icnt;
-+ exec_stack->sym->hist.total_cycle_cnt += mydatam.data.ccnt;
-+ }
-+ if(do_timeline){
-+ result = write_tl3_temp((CurrentPC + sizeof(bfd_vma)), CurrentPC, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, &len);
-+ if(result != 0)
-+ return 2;
-+ temp_file_pos += len;
-+ }
-+ current_unmapped = ((mydatam.mode & IT_MASK) == 0);
-+ }
-+ break;
-+ case PROFTYPE_OFF:
-+ result = (fread(&mydataoff, sizeof(prof1data), 1, fd) != 1);
-+ if(result == 0){
-+ unsigned int delta_icnt = 0, delta_ccnt = 0;
-+
-+ CurrentPC = mydataoff.pc;
-+ function_level--;
-+ if(min_function_level > function_level)
-+ min_function_level = function_level;
-+ current_insn_cnt += mydataoff.icnt;
-+ current_cycle_cnt += mydataoff.ccnt;
-+ delta_icnt = mydataoff.icnt;
-+ delta_ccnt = mydataoff.ccnt;
-+ if (exec_stack != NULL )
-+ {
-+ while(exec_stack->next != NULL){
-+ tag = PROFTYPE_DUMMY_FR3;
-+ tcghdr.to_du_rt_tag++;
-+ result = pop_callee(exec_stack->sym->addr, exec_stack->next->sym->addr, delta_icnt, delta_ccnt, tag, 0, 0, 0, 0, 0,0,0,0,0,0,0,0,0,0);
-+ function_level--;
-+ if(min_function_level > function_level)
-+ min_function_level = function_level;
-+ delta_icnt = 0;
-+ delta_ccnt = 0;
-+ }
-+ tag = PROFTYPE_OFF;
-+ result = pop_callee2(mydataoff.icnt, mydataoff.ccnt, tag, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0,0,0,0);
-+ }
-+ else
-+ result = pop_callee(CurrentPC, mydata1.tpc, 1, mydata1.ccnt, tag, mydata1.br, mydata1.ifetch, 0, 0, 0,0,0,0,0,0,0,0,0,0);
-+ }
-+ tcghdr.to_bb_cnt++;
-+ return result;
-+ default:
-+ return 4;
-+ } // End of switch
-+ if (result!=0)
-+ return result;
-+ }
-+
-+ // read error - only successful exit is from PROFTYPE_OFF record
-+ return 1;
-+} // read_prof3_data
-+
-+// ----------------------------------------------------------------------------
-+// tl3_read_rec
-+//
-+// This function reads the timeline based profiling data for instruction
-+// coverage. The expected sequences are 0xc3, {0x31,0x32,0x33,0x34,0x35,0xcf}*,
-+// 0xc0.
-+// return code: (execution terminated if any error encountered.)
-+// 0x00 - end-of-file
-+// tag - next tag
-+// ----------------------------------------------------------------------------
-+static unsigned char
-+tl3_read_rec(FILE *fd,
-+ const char *filename)
-+{ unsigned char tag;
-+ int result;
-+
-+ result=read_prof_on(fd,PROFTYPE_ON3);
-+ if (result==0)
-+ result=read_prof3_data(fd);
-+ if (result!=0)
-+ return prof_errmsg(result,filename); // no return
-+ if (temp_file_pos > TIMELINE_LIMIT)
-+ return 0x00;
-+ if (fread(&tag,sizeof(unsigned char),1,fd)!=1)
-+ tag=0x00; // can only be end-of-file
-+
-+ return tag;
-+} // tl3_read_rec
-+
-+// ----------------------------------------------------------------------------
-+// read_prof6_data
-+//
-+// This function reads the function level and branch summary profiling records
-+// from prof.out.
-+// return code:
-+// 0 - success
-+// 1 - read error
-+// 2 - write error
-+// 3 - memory error
-+// 4 - bad tag
-+// ----------------------------------------------------------------------------
-+static int
-+read_prof6_data(FILE *fd)
-+{ int result;
-+ unsigned char tag;
-+ prof6data mydata;
-+ profmdata mydata2;
-+
-+
-+
-+ while (fread(&tag,sizeof(unsigned char),1,fd)==1)
-+ {
-+ if (temp_file_pos > TIMELINE_LIMIT)
-+ {
-+ // We have a timeline too big, change the tag to PROF_OFF to finish
-+ tag = PROFTYPE_OFF;
-+ }
-+
-+ switch (tag)
-+ { case PROFTYPE_FC6:
-+ tcghdr.to_fn_call_tag++;
-+ // we have a call here
-+ result = (fread(&mydata, 18, 1, fd)!=1);
-+ // Analysis profile time
-+ if (result==0){
-+ unsigned int len = 0;
-+ unsigned long long br_taken_cnt = 0;
-+ unsigned long long br_mis_cnt = 0;
-+ unsigned long long BTB_br_cnt = 0;
-+
-+ function_level++;
-+ if(function_level > max_function_level)
-+ max_function_level = function_level;
-+ current_insn_cnt += mydata.icnt;
-+ current_cycle_cnt += mydata.ccnt;
-+ // generate a temporary timeline record
-+ if (do_timeline){
-+ result = write_tl6_temp(mydata.tpc, mydata.pc, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0, 0, 0, 0, &len);
-+ if(result != 0)
-+ return 2;
-+ }
-+ result = (fread(&br_taken_cnt, calculate_data_size(mydata.length[0], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&br_mis_cnt, calculate_data_size(mydata.length[0], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0)
-+ result = (fread(&BTB_br_cnt, calculate_data_size(mydata.length[1], HIGH_NIBBLE), 1, fd) != 1);
-+ }
-+ if(result != 0){
-+ // Error
-+ }
-+ result=push_callee(mydata.tpc,mydata.pc,mydata.icnt,mydata.ccnt, temp_file_pos, br_taken_cnt, br_mis_cnt, BTB_br_cnt,0,0,0,0,0,0);
-+ temp_file_pos += len;
-+ }
-+ break;
-+ case PROFTYPE_FR6:
-+ tcghdr.to_fn_rt_tag++;
-+
-+ // we have a return here
-+ result=(fread(&mydata, 18, 1, fd)!=1);
-+
-+ if (result==0){
-+ unsigned long long br_taken_cnt = 0;
-+ unsigned long long br_mis_cnt = 0;
-+ unsigned long long BTB_br_cnt = 0;
-+ function_level--;
-+ if(function_level > max_function_level)
-+ min_function_level = function_level;
-+ current_insn_cnt += mydata.icnt;
-+ current_cycle_cnt += mydata.ccnt;
-+ result = (fread(&br_taken_cnt, calculate_data_size(mydata.length[0], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&br_mis_cnt, calculate_data_size(mydata.length[0], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0)
-+ result = (fread(&BTB_br_cnt, calculate_data_size(mydata.length[1], HIGH_NIBBLE), 1, fd) != 1);
-+ }
-+ if(result != 0){
-+ // Error
-+ }
-+ result=pop_callee(mydata.pc,mydata.tpc,mydata.icnt,mydata.ccnt,tag,0,0,0,0,0, br_taken_cnt, br_mis_cnt, BTB_br_cnt,0,0,0,0,0,0);
-+ }
-+ break;
-+ case PROFTYPE_MOD:
-+ // mode changed
-+ result=read_profm_data(fd,&mydata2);
-+
-+ if (result==0)
-+ { // update current time point
-+ current_insn_cnt+=mydata2.data.icnt;
-+ current_cycle_cnt+=mydata2.data.ccnt;
-+ if (exec_stack != NULL ){
-+ exec_stack->self_insn_cnt+=mydata2.data.icnt;
-+ exec_stack->self_cycle_cnt+=mydata2.data.ccnt;
-+ exec_stack->sym->hist.total_insn_cnt+=mydata2.data.icnt;
-+ exec_stack->sym->hist.total_cycle_cnt+=mydata2.data.ccnt;
-+ }
-+ // need to address all possible cause
-+ // do we need target pc address? for instructions like
-+ // jral.xton we do not need it again
-+ current_unmapped=((mydata2.mode&IT_MASK)==0);
-+ }
-+ break;
-+ case PROFTYPE_OFF:
-+
-+ // done reading profiling data
-+ result=(fread(&mydata, 12, 1, fd)!=1);
-+
-+ if (result==0)
-+ {
-+ unsigned int delta_icnt = 0, delta_ccnt = 0;
-+
-+ function_level--;
-+ if(min_function_level > function_level)
-+ min_function_level = function_level;
-+ current_insn_cnt += mydata.icnt;
-+ current_cycle_cnt += mydata.ccnt;
-+ delta_icnt = mydata.icnt;
-+ delta_ccnt = mydata.ccnt;
-+ if (exec_stack != NULL )
-+ {
-+ while(exec_stack->next != NULL){
-+ tag = PROFTYPE_DUMMY_FR6;
-+ tcghdr.to_du_rt_tag++;
-+ pop_callee(exec_stack->sym->addr, exec_stack->next->sym->addr, delta_icnt, delta_ccnt, tag, 0,0,0,0,0,0,0,0,0,0,0,0,0,0);
-+ function_level--;
-+ if(min_function_level > function_level)
-+ min_function_level = function_level;
-+ delta_icnt = 0;
-+ delta_ccnt = 0;
-+ }
-+ tag = PROFTYPE_OFF;
-+ // profiling turned off, so clean up the execution stack
-+ pop_callee2(delta_icnt, delta_ccnt, tag, 0, 0, 0, 0, 0, 0,0,0,0,0,0,0,0,0,0);
-+ }
-+ else
-+ pop_callee(mydata.pc,mydata.tpc,mydata.icnt,mydata.ccnt,tag,0,0,0,0,0, 0,0,0,0,0,0,0,0,0);
-+ }
-+ return result;
-+ default:
-+ return 4;
-+ }
-+ if (result!=0)
-+ return result;
-+
-+ }
-+
-+ // read error - only successful exit is from PROFTYPE_OFF record
-+ return 1;
-+} // read_prof6_data
-+
-+// ----------------------------------------------------------------------------
-+// tl6_read_rec
-+//
-+// This function reads the timeline based profiling data for function level
-+// and branch summary. The exceptd sequences are 0xc6, (0x61, 0x62)*, 0xc0.
-+// return code: (execution terminated if any error encountered.)
-+// 0x00 - end-of-file
-+// tag - next tag
-+// ----------------------------------------------------------------------------
-+static unsigned char
-+tl6_read_rec(FILE *fd,
-+ const char *filename)
-+{ unsigned char tag = 0;
-+ int result = 0;
-+
-+ result = read_prof_on(fd, PROFTYPE_ON6);
-+ if(result == 0)
-+ result = read_prof6_data(fd);
-+ if(result != 0)
-+ return prof_errmsg(result, filename);
-+
-+ if (temp_file_pos > TIMELINE_LIMIT)
-+ return 0x00;
-+
-+ if(fread(&tag, sizeof(unsigned char), 1, fd) != 1)
-+ tag = 0x00;
-+
-+ return tag;
-+} // tl6_read_rec
-+
-+// ----------------------------------------------------------------------------
-+// read_prof7_data
-+//
-+// This function reads the function level and branch summary profiling records
-+// from prof.out.
-+// return code:
-+// 0 - success
-+// 1 - read error
-+// 2 - write error
-+// 3 - memory error
-+// 4 - bad tag
-+// ----------------------------------------------------------------------------
-+static int
-+read_prof7_data(FILE *fd)
-+{ int result;
-+ unsigned char tag;
-+ prof7data mydata;
-+ profmdata mydata2;
-+
-+ while (fread(&tag,sizeof(unsigned char),1,fd)==1)
-+ {
-+ if (temp_file_pos > TIMELINE_LIMIT)
-+ {
-+ // We have a timeline too big, change the tag to PROF_OFF to finish
-+ tag = PROFTYPE_OFF;
-+ }
-+
-+
-+ switch (tag)
-+ {
-+ case PROFTYPE_FC7:
-+ tcghdr.to_fn_call_tag++;
-+
-+ // we have a call here
-+ result = (fread(&mydata, 19, 1, fd)!=1);
-+
-+ if (result==0){
-+ unsigned int len = 0;
-+ unsigned long long icache_replace_cnt = 0;
-+ unsigned long long icache_miss_cnt = 0;
-+ unsigned long long icache_access_cnt = 0;
-+ unsigned long long dcache_replace_cnt = 0;
-+ unsigned long long dcache_miss_cnt = 0;
-+ unsigned long long dcache_access_cnt = 0;
-+
-+ function_level++;
-+ if(function_level > max_function_level)
-+ max_function_level = function_level;
-+ current_insn_cnt += mydata.icnt;
-+ current_cycle_cnt += mydata.ccnt;
-+ // generate a temporary timeline record
-+ if (do_timeline){
-+ result = write_tl7_temp(mydata.tpc, mydata.pc, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0,0,0,0,0,0,0, &len);
-+ if(result != 0)
-+ return 2;
-+ }
-+
-+ result = (fread(&icache_replace_cnt, calculate_data_size(mydata.length[0], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&icache_miss_cnt, calculate_data_size(mydata.length[0], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&icache_access_cnt, calculate_data_size(mydata.length[1], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&dcache_replace_cnt, calculate_data_size(mydata.length[1], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&dcache_miss_cnt, calculate_data_size(mydata.length[2], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0)
-+ result = (fread(&dcache_access_cnt, calculate_data_size(mydata.length[2], LOW_NIBBLE), 1, fd) != 1);
-+ }
-+ }
-+ }
-+ }
-+
-+ result=push_callee(mydata.tpc,mydata.pc,mydata.icnt,mydata.ccnt, temp_file_pos, 0,0,0, icache_replace_cnt, icache_miss_cnt, icache_access_cnt, dcache_replace_cnt, dcache_miss_cnt, dcache_access_cnt);
-+ temp_file_pos += len;
-+ }
-+ break;
-+ case PROFTYPE_FR7:
-+ tcghdr.to_fn_rt_tag++;
-+
-+ // we have a return here
-+ result=(fread(&mydata, 19, 1, fd)!=1);
-+
-+ if (result==0){
-+ unsigned long long icache_replace_cnt = 0;
-+ unsigned long long icache_miss_cnt = 0;
-+ unsigned long long icache_access_cnt = 0;
-+ unsigned long long dcache_replace_cnt = 0;
-+ unsigned long long dcache_miss_cnt = 0;
-+ unsigned long long dcache_access_cnt = 0;
-+ function_level--;
-+ if(function_level > max_function_level)
-+ min_function_level = function_level;
-+ current_insn_cnt += mydata.icnt;
-+ current_cycle_cnt += mydata.ccnt;
-+
-+ result = (fread(&icache_replace_cnt, calculate_data_size(mydata.length[0], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&icache_miss_cnt, calculate_data_size(mydata.length[0], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&icache_access_cnt, calculate_data_size(mydata.length[1], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&dcache_replace_cnt, calculate_data_size(mydata.length[1], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&dcache_miss_cnt, calculate_data_size(mydata.length[2], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0)
-+ result = (fread(&dcache_access_cnt, calculate_data_size(mydata.length[2], LOW_NIBBLE), 1, fd) != 1);
-+ }
-+ }
-+ }
-+ }
-+
-+ result=pop_callee(mydata.pc,mydata.tpc,mydata.icnt,mydata.ccnt,tag,0,0,0,0,0, 0,0,0, icache_replace_cnt, icache_miss_cnt, icache_access_cnt, dcache_replace_cnt, dcache_miss_cnt, dcache_access_cnt);
-+ }
-+ break;
-+ case PROFTYPE_MOD:
-+
-+ // mode changed
-+ result=read_profm_data(fd,&mydata2);
-+
-+ if (result==0)
-+ { // update current time point
-+ current_insn_cnt+=mydata2.data.icnt;
-+ current_cycle_cnt+=mydata2.data.ccnt;
-+ if (exec_stack != NULL ){
-+ exec_stack->self_insn_cnt+=mydata2.data.icnt;
-+ exec_stack->self_cycle_cnt+=mydata2.data.ccnt;
-+ exec_stack->sym->hist.total_insn_cnt+=mydata2.data.icnt;
-+ exec_stack->sym->hist.total_cycle_cnt+=mydata2.data.ccnt;
-+ }
-+
-+ // need to address all possible cause
-+ // do we need target pc address? for instructions like
-+ // jral.xton we do not need it again
-+ current_unmapped=((mydata2.mode&IT_MASK)==0);
-+ }
-+ break;
-+ case PROFTYPE_OFF:
-+
-+ // done reading profiling data
-+ result=(fread(&mydata, 12, 1, fd)!=1);
-+
-+ if (result==0)
-+ {
-+ unsigned int delta_icnt = 0, delta_ccnt = 0;
-+
-+ function_level--;
-+ if(min_function_level > function_level)
-+ min_function_level = function_level;
-+ current_insn_cnt += mydata.icnt;
-+ current_cycle_cnt += mydata.ccnt;
-+ delta_icnt = mydata.icnt;
-+ delta_ccnt = mydata.ccnt;
-+ if (exec_stack != NULL )
-+ {
-+ while(exec_stack->next != NULL){
-+ tag = PROFTYPE_DUMMY_FR7;
-+ tcghdr.to_du_rt_tag++;
-+ pop_callee(exec_stack->sym->addr, exec_stack->next->sym->addr, delta_icnt, delta_ccnt, tag, 0,0,0,0,0,0,0,0,0,0,0,0,0,0);
-+ function_level--;
-+ if(min_function_level > function_level)
-+ min_function_level = function_level;
-+ delta_icnt = 0;
-+ delta_ccnt = 0;
-+ }
-+ tag = PROFTYPE_OFF;
-+ // profiling turned off, so clean up the execution stack
-+ pop_callee2(delta_icnt, delta_ccnt, tag, 0, 0, 0, 0, 0, 0,0,0,0,0,0,0,0,0,0);
-+ }
-+ else
-+ pop_callee(mydata.pc,mydata.tpc,mydata.icnt,mydata.ccnt,tag,0,0,0,0,0, 0,0,0, 0, 0, 0, 0, 0, 0);
-+ }
-+ return result;
-+ default:
-+ return 4;
-+ }
-+ if (result!=0)
-+ return result;
-+
-+
-+ }
-+
-+ // read error - only successful exit is from PROFTYPE_OFF record
-+ return 1;
-+} // read_prof7_data
-+
-+// ----------------------------------------------------------------------------
-+// tl7_read_rec
-+//
-+// This function reads the timeline based profiling data for function level
-+// and cache summary. The exceptd sequences are 0xc7, (0x71, 0x72)*, 0xc0.
-+// return code: (execution terminated if any error encountered.)
-+// 0x00 - end-of-file
-+// tag - next tag
-+// ----------------------------------------------------------------------------
-+static unsigned char
-+tl7_read_rec(FILE *fd,
-+ const char *filename)
-+{ unsigned char tag = 0;
-+ int result = 0;
-+
-+ result = read_prof_on(fd, PROFTYPE_ON7);
-+ if(result == 0)
-+ result = read_prof7_data(fd);
-+ if(result != 0)
-+ return prof_errmsg(result, filename);
-+
-+ if (temp_file_pos > TIMELINE_LIMIT)
-+ return 0x00;
-+
-+ if(fread(&tag, sizeof(unsigned char), 1, fd) != 1)
-+ tag = 0x00;
-+
-+ return tag;
-+} // tl7_read_rec
-+
-+// ----------------------------------------------------------------------------
-+// read_prof8_data
-+//
-+// This function reads the function level and branch & cache summary profiling
-+// records from prof.out.
-+// return code:
-+// 0 - success
-+// 1 - read error
-+// 2 - write error
-+// 3 - memory error
-+// 4 - bad tag
-+// ----------------------------------------------------------------------------
-+static int
-+read_prof8_data(FILE *fd)
-+{
-+ int result;
-+ unsigned char tag;
-+ prof8data mydata;
-+ profmdata mydata2;
-+
-+ while (fread(&tag,sizeof(unsigned char),1,fd)==1)
-+ {
-+ if (temp_file_pos > TIMELINE_LIMIT)
-+ {
-+ // We have a timeline too big, change the tag to PROF_OFF to finish
-+ tag = PROFTYPE_OFF;
-+ }
-+
-+ switch (tag)
-+ {
-+ case PROFTYPE_FC8:
-+ tcghdr.to_fn_call_tag++;
-+
-+
-+ // we have a call here
-+ result = (fread(&mydata, 21, 1, fd)!=1);
-+
-+ if (result==0){
-+ unsigned int len = 0;
-+ unsigned long long br_taken_cnt = 0;
-+ unsigned long long br_mis_cnt = 0;
-+ unsigned long long BTB_br_cnt = 0;
-+ unsigned long long icache_replace_cnt = 0;
-+ unsigned long long icache_miss_cnt = 0;
-+ unsigned long long icache_access_cnt = 0;
-+ unsigned long long dcache_replace_cnt = 0;
-+ unsigned long long dcache_miss_cnt = 0;
-+ unsigned long long dcache_access_cnt = 0;
-+
-+ function_level++;
-+ if(function_level > max_function_level)
-+ max_function_level = function_level;
-+ current_insn_cnt += mydata.icnt;
-+ current_cycle_cnt += mydata.ccnt;
-+ // generate a temporary timeline record
-+ if (do_timeline){
-+ result = write_tl8_temp(mydata.tpc, mydata.pc, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0,0,0,0, &len);
-+ if(result != 0)
-+ return 2;
-+ }
-+ result = (fread(&br_taken_cnt, calculate_data_size(mydata.length[0], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&br_mis_cnt, calculate_data_size(mydata.length[0], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&BTB_br_cnt, calculate_data_size(mydata.length[1], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&icache_replace_cnt, calculate_data_size(mydata.length[1], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&icache_miss_cnt, calculate_data_size(mydata.length[2], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&icache_access_cnt, calculate_data_size(mydata.length[2], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&dcache_replace_cnt, calculate_data_size(mydata.length[3], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&dcache_miss_cnt, calculate_data_size(mydata.length[3], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&dcache_access_cnt, calculate_data_size(mydata.length[4], HIGH_NIBBLE), 1, fd) != 1);
-+ }
-+ }
-+ }
-+ }
-+ }
-+ }
-+ }
-+ }
-+ if(result != 0){
-+ // Error
-+ }
-+ result=push_callee(mydata.tpc,mydata.pc,mydata.icnt,mydata.ccnt, temp_file_pos, br_taken_cnt, br_mis_cnt, BTB_br_cnt, icache_replace_cnt, icache_miss_cnt, icache_access_cnt, dcache_replace_cnt, dcache_miss_cnt, dcache_access_cnt);
-+ temp_file_pos += len;
-+ }
-+ break;
-+
-+
-+ case PROFTYPE_FR8:
-+ tcghdr.to_fn_rt_tag++;
-+
-+ // we have a return here
-+ result=(fread(&mydata, 21, 1, fd)!=1);
-+
-+ if (result==0){
-+ unsigned long long br_taken_cnt = 0;
-+ unsigned long long br_mis_cnt = 0;
-+ unsigned long long BTB_br_cnt = 0;
-+ unsigned long long icache_replace_cnt = 0;
-+ unsigned long long icache_miss_cnt = 0;
-+ unsigned long long icache_access_cnt = 0;
-+ unsigned long long dcache_replace_cnt = 0;
-+ unsigned long long dcache_miss_cnt = 0;
-+ unsigned long long dcache_access_cnt = 0;
-+ function_level--;
-+ if(function_level > max_function_level)
-+ min_function_level = function_level;
-+ current_insn_cnt += mydata.icnt;
-+ current_cycle_cnt += mydata.ccnt;
-+ result = (fread(&br_taken_cnt, calculate_data_size(mydata.length[0], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&br_mis_cnt, calculate_data_size(mydata.length[0], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&BTB_br_cnt, calculate_data_size(mydata.length[1], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&icache_replace_cnt, calculate_data_size(mydata.length[1], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&icache_miss_cnt, calculate_data_size(mydata.length[2], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&icache_access_cnt, calculate_data_size(mydata.length[2], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&dcache_replace_cnt, calculate_data_size(mydata.length[3], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&dcache_miss_cnt, calculate_data_size(mydata.length[3], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&dcache_access_cnt, calculate_data_size(mydata.length[4], HIGH_NIBBLE), 1, fd) != 1);
-+ }
-+ }
-+ }
-+ }
-+ }
-+ }
-+ }
-+ }
-+ if(result != 0){
-+ // Error
-+ }
-+ result=pop_callee(mydata.pc,mydata.tpc,mydata.icnt,mydata.ccnt,tag,0,0,0,0,0, br_taken_cnt, br_mis_cnt, BTB_br_cnt, icache_replace_cnt, icache_miss_cnt, icache_access_cnt, dcache_replace_cnt, dcache_miss_cnt, dcache_access_cnt);
-+ }
-+ break;
-+
-+ case PROFTYPE_MOD:
-+
-+ // mode changed
-+ result=read_profm_data(fd,&mydata2);
-+
-+ if (result==0)
-+ { // update current time point
-+ current_insn_cnt+=mydata2.data.icnt;
-+ current_cycle_cnt+=mydata2.data.ccnt;
-+ if (exec_stack != NULL ) {
-+ exec_stack->self_insn_cnt+=mydata2.data.icnt;
-+ exec_stack->self_cycle_cnt+=mydata2.data.ccnt;
-+ exec_stack->sym->hist.total_insn_cnt+=mydata2.data.icnt;
-+ exec_stack->sym->hist.total_cycle_cnt+=mydata2.data.ccnt;
-+ }
-+
-+ // need to address all possible cause
-+ // do we need target pc address? for instructions like
-+ // jral.xton we do not need it again
-+ current_unmapped=((mydata2.mode&IT_MASK)==0);
-+ }
-+ break;
-+
-+ case PROFTYPE_OFF:
-+ // done reading profiling data
-+ result=(fread(&mydata, 12, 1, fd)!=1);
-+
-+ if (result==0)
-+ {
-+ unsigned int delta_icnt = 0, delta_ccnt = 0;
-+
-+ function_level--;
-+ if(min_function_level > function_level)
-+ min_function_level = function_level;
-+ current_insn_cnt += mydata.icnt;
-+ current_cycle_cnt += mydata.ccnt;
-+ delta_icnt = mydata.icnt;
-+ delta_ccnt = mydata.ccnt;
-+ if (exec_stack != NULL )
-+ {
-+ while(exec_stack->next != NULL){
-+ tag = PROFTYPE_DUMMY_FR8;
-+ tcghdr.to_du_rt_tag++;
-+ pop_callee(exec_stack->sym->addr, exec_stack->next->sym->addr, delta_icnt, delta_ccnt, tag, 0,0,0,0,0,0,0,0,0,0,0,0,0,0);
-+ function_level--;
-+ if(min_function_level > function_level)
-+ min_function_level = function_level;
-+ delta_icnt = 0;
-+ delta_ccnt = 0;
-+ }
-+ tag = PROFTYPE_OFF;
-+ // profiling turned off, so clean up the execution stack
-+ pop_callee2(delta_icnt, delta_ccnt, tag, 0, 0, 0, 0, 0, 0,0,0,0,0,0,0,0,0,0);
-+ }
-+ else
-+ pop_callee(mydata.pc,mydata.tpc,mydata.icnt,mydata.ccnt,tag,0,0,0,0,0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
-+ }
-+ return result;
-+ default:
-+ return 4;
-+ }
-+ if (result!=0)
-+ return result;
-+
-+ }
-+
-+ // read error - only successful exit is from PROFTYPE_OFF record
-+ return 1;
-+} // read_prof8_data
-+
-+// ----------------------------------------------------------------------------
-+// tl8_read_rec
-+//
-+// This function reads the timeline based profiling data for function level
-+// and branch & cache summary. The exceptd sequences are 0xc8, (0x81, 0x82)*,
-+// 0xc0.
-+// return code: (execution terminated if any error encountered.)
-+// 0x00 - end-of-file
-+// tag - next tag
-+// ----------------------------------------------------------------------------
-+static unsigned char
-+tl8_read_rec(FILE *fd,
-+ const char *filename)
-+{ unsigned char tag = 0;
-+ int result = 0;
-+
-+ result = read_prof_on(fd, PROFTYPE_ON8);
-+ if(result == 0)
-+ result = read_prof8_data(fd);
-+ if(result != 0)
-+ return prof_errmsg(result, filename);
-+
-+ if (temp_file_pos > TIMELINE_LIMIT)
-+ return 0x00;
-+
-+ if(fread(&tag, sizeof(unsigned char), 1, fd) != 1)
-+ tag = 0x00;
-+
-+ return tag;
-+} // tl8_read_rec
-+
-+// ----------------------------------------------------------------------------
-+// read_prof9_data
-+//
-+// This function reads the branch level and cache summary profiling records from
-+// prof.out.
-+// return code:
-+// 0 - success
-+// 1 - read error
-+// 2 - write error
-+// 3 - memory error
-+// 4 - bad tag
-+// ----------------------------------------------------------------------------
-+static int
-+read_prof9_data(FILE *fd)
-+{ int result;
-+ unsigned char tag;
-+ prof9data mydata;
-+ profmdata mydata2;
-+
-+ while (fread(&tag,sizeof(unsigned char),1,fd)==1)
-+ {
-+ if (temp_file_pos > TIMELINE_LIMIT)
-+ {
-+ // We have a timeline too big, change the tag to PROF_OFF to finish
-+ tag = PROFTYPE_OFF;
-+ }
-+
-+ switch (tag)
-+ {
-+ case PROFTYPE_FC9:
-+ tcghdr.to_fn_call_tag++;
-+ result = (fread(&mydata, 20, 1, fd)!=1);
-+ if (result==0){
-+ unsigned int len = 0;
-+ unsigned long long icache_replace_cnt = 0;
-+ unsigned long long icache_miss_cnt = 0;
-+ unsigned long long icache_access_cnt = 0;
-+ unsigned long long dcache_replace_cnt = 0;
-+ unsigned long long dcache_miss_cnt = 0;
-+ unsigned long long dcache_access_cnt = 0;
-+
-+ function_level++;
-+ if(function_level > max_function_level)
-+ max_function_level = function_level;
-+ current_insn_cnt += mydata.icnt;
-+ current_cycle_cnt += mydata.ccnt;
-+
-+ result = (fread(&icache_replace_cnt, calculate_data_size(mydata.length[0], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&icache_miss_cnt, calculate_data_size(mydata.length[0], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&icache_access_cnt, calculate_data_size(mydata.length[1], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&dcache_replace_cnt, calculate_data_size(mydata.length[1], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&dcache_miss_cnt, calculate_data_size(mydata.length[2], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0)
-+ result = (fread(&dcache_access_cnt, calculate_data_size(mydata.length[2], LOW_NIBBLE), 1, fd) != 1);
-+ }
-+ }
-+ }
-+ }
-+
-+ // generate a temporary timeline record
-+ if (do_timeline){
-+ result = write_tl9_temp(mydata.tpc, mydata.pc, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0, mydata.br,0,0,0,0, icache_replace_cnt, icache_miss_cnt, icache_access_cnt, dcache_replace_cnt, dcache_miss_cnt, dcache_access_cnt,0,0,0,0,0,0, &len);
-+ if(result != 0)
-+ return 2;
-+ }
-+ result=push_callee(mydata.tpc,mydata.pc,mydata.icnt,mydata.ccnt, temp_file_pos, ((mydata.br & 0x02) >> 1), (mydata.br & 0x01), ((mydata.br & 0xFC) >> 2), icache_replace_cnt, icache_miss_cnt, icache_access_cnt, dcache_replace_cnt, dcache_miss_cnt, dcache_access_cnt);
-+ temp_file_pos += len;
-+ }
-+
-+ // branch prediction
-+ total_BTB_branch_count = (unsigned long long)((mydata.br & 0xFC)>>2);
-+ total_branch_taken_count = (unsigned long long)((mydata.br & 0x02)>>1);
-+ total_branch_mispred_count = (unsigned long long)(mydata.br & 0x01);
-+ tcghdr.to_bb_cnt++;
-+
-+ break;
-+
-+ case PROFTYPE_FR9:
-+ tcghdr.to_fn_rt_tag++;
-+ result = (fread(&mydata, 20, 1, fd)!=1);
-+ if (result==0){
-+ unsigned long long icache_replace_cnt = 0;
-+ unsigned long long icache_miss_cnt = 0;
-+ unsigned long long icache_access_cnt = 0;
-+ unsigned long long dcache_replace_cnt = 0;
-+ unsigned long long dcache_miss_cnt = 0;
-+ unsigned long long dcache_access_cnt = 0;
-+ function_level--;
-+ if(min_function_level > function_level)
-+ min_function_level = function_level;
-+ current_insn_cnt += mydata.icnt;
-+ current_cycle_cnt += mydata.ccnt;
-+
-+ result = (fread(&icache_replace_cnt, calculate_data_size(mydata.length[0], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&icache_miss_cnt, calculate_data_size(mydata.length[0], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&icache_access_cnt, calculate_data_size(mydata.length[1], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&dcache_replace_cnt, calculate_data_size(mydata.length[1], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&dcache_miss_cnt, calculate_data_size(mydata.length[2], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0)
-+ result = (fread(&dcache_access_cnt, calculate_data_size(mydata.length[2], LOW_NIBBLE), 1, fd) != 1);
-+ }
-+ }
-+ }
-+ }
-+ if(result != 0){
-+ // Error
-+ }
-+
-+ result=pop_callee(mydata.pc,mydata.tpc,mydata.icnt,mydata.ccnt,tag,mydata.br,0,0,0,0, ((mydata.br & 0x02) >> 1), (mydata.br & 0x01), ((mydata.br & 0xFC) >> 2), icache_replace_cnt, icache_miss_cnt, icache_access_cnt, dcache_replace_cnt, dcache_miss_cnt, dcache_access_cnt);
-+ }
-+ // branch prediction
-+ total_BTB_branch_count = (unsigned long long)((mydata.br & 0xFC)>>2);
-+ total_return_mispred_count = (unsigned long long)(mydata.br & 0x03);
-+ tcghdr.to_bb_cnt++;
-+
-+ break;
-+
-+ case PROFTYPE_BR9:
-+ tcghdr.to_br_tag++;
-+ result = (fread(&mydata, 20, 1, fd)!=1);
-+ if (result==0){
-+ unsigned int len = 0;
-+ unsigned long long icache_replace_cnt = 0;
-+ unsigned long long icache_miss_cnt = 0;
-+ unsigned long long icache_access_cnt = 0;
-+ unsigned long long dcache_replace_cnt = 0;
-+ unsigned long long dcache_miss_cnt = 0;
-+ unsigned long long dcache_access_cnt = 0;
-+
-+ current_insn_cnt += mydata.icnt;
-+ current_cycle_cnt += mydata.ccnt;
-+ if (exec_stack != NULL ) {
-+ exec_stack->self_insn_cnt += mydata.icnt;
-+ exec_stack->self_cycle_cnt += mydata.ccnt;
-+ exec_stack->sym->hist.total_insn_cnt += mydata.icnt;
-+ exec_stack->sym->hist.total_cycle_cnt += mydata.ccnt;
-+ }
-+
-+ result = (fread(&icache_replace_cnt, calculate_data_size(mydata.length[0], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&icache_miss_cnt, calculate_data_size(mydata.length[0], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&icache_access_cnt, calculate_data_size(mydata.length[1], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&dcache_replace_cnt, calculate_data_size(mydata.length[1], LOW_NIBBLE), 1, fd) != 1);
-+ if(result == 0){
-+ result = (fread(&dcache_miss_cnt, calculate_data_size(mydata.length[2], HIGH_NIBBLE), 1, fd) != 1);
-+ if(result == 0)
-+ result = (fread(&dcache_access_cnt, calculate_data_size(mydata.length[2], LOW_NIBBLE), 1, fd) != 1);
-+ }
-+ }
-+ }
-+ }
-+
-+ if (exec_stack != NULL ) {
-+ exec_stack->bb_cnt++;
-+ exec_stack->branch_taken_cnt += ((mydata.br & 0x02) >> 1);
-+ exec_stack->branch_misprediction_cnt += (mydata.br & 0x01);
-+ exec_stack->BTB_branch_cnt += ((mydata.br & 0xFC) >> 2);
-+ exec_stack->icache_replace_cnt += icache_replace_cnt;
-+ exec_stack->icache_miss_cnt += icache_miss_cnt;
-+ exec_stack->icache_access_cnt += icache_access_cnt;
-+ exec_stack->dcache_replace_cnt += dcache_replace_cnt;
-+ exec_stack->dcache_miss_cnt += dcache_miss_cnt;
-+ exec_stack->dcache_access_cnt += dcache_access_cnt;
-+ }
-+ // generate a temporary timeline record
-+ if (do_timeline){
-+ result = write_tl9_temp(mydata.tpc, mydata.pc, tag, function_level, 0, current_insn_cnt, current_cycle_cnt, 0, 0, 0, 0, 0, mydata.br,0,0,0,0, icache_replace_cnt, icache_miss_cnt, icache_access_cnt, dcache_replace_cnt, dcache_miss_cnt, dcache_access_cnt,0,0,0,0,0,0, &len);
-+ if(result != 0)
-+ return 2;
-+ }
-+ temp_file_pos += len;
-+ }
-+
-+ // branch prediction
-+ add_branch_count_to_sym(mydata.pc, 1);
-+ total_BTB_branch_count = (unsigned long long)((mydata.br & 0xFC)>>2);
-+ total_branch_taken_count = (unsigned long long)((mydata.br & 0x02)>>1);
-+ total_branch_mispred_count = (unsigned long long)(mydata.br & 0x01);
-+ tcghdr.to_bb_cnt++;
-+ break;
-+
-+ case PROFTYPE_MOD:
-+ // mode changed
-+ result=read_profm_data(fd,&mydata2);
-+ if (result==0){
-+ // update current time point
-+ current_insn_cnt+=mydata2.data.icnt;
-+ current_cycle_cnt+=mydata2.data.ccnt;
-+ if (exec_stack != NULL ) {
-+ exec_stack->self_insn_cnt+=mydata2.data.icnt;
-+ exec_stack->self_cycle_cnt+=mydata2.data.ccnt;
-+ exec_stack->sym->hist.total_insn_cnt+=mydata2.data.icnt;
-+ exec_stack->sym->hist.total_cycle_cnt+=mydata2.data.ccnt;
-+ }
-+ current_unmapped=((mydata2.mode&IT_MASK)==0);
-+ }
-+ break;
-+ case PROFTYPE_OFF:
-+ // done reading profiling data
-+ result = (fread(&mydata, 12, 1, fd) != 1);
-+ if (result==0){
-+ unsigned int delta_icnt = 0, delta_ccnt = 0;
-+
-+ function_level--;
-+ if(min_function_level > function_level)
-+ min_function_level = function_level;
-+ current_insn_cnt += mydata.icnt;
-+ current_cycle_cnt += mydata.ccnt;
-+ delta_icnt = mydata.icnt;
-+ delta_ccnt = mydata.ccnt;
-+ if (exec_stack != NULL )
-+ {
-+ while(exec_stack->next != NULL){
-+ tag = PROFTYPE_DUMMY_FR9;
-+ tcghdr.to_du_rt_tag++;
-+ pop_callee(exec_stack->sym->addr, exec_stack->next->sym->addr, delta_icnt, delta_ccnt, tag, 0,0,0,0,0,0,0,0,0,0,0,0,0,0);
-+ function_level--;
-+ if(min_function_level > function_level)
-+ min_function_level = function_level;
-+ delta_icnt = 0;
-+ delta_ccnt = 0;
-+ }
-+ tag = PROFTYPE_OFF;
-+ // profiling turned off, so clean up the execution stack
-+ pop_callee2(delta_icnt, delta_ccnt, tag, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0,0,0,0);
-+ }
-+ else
-+ pop_callee(mydata.pc,mydata.tpc,mydata.icnt,mydata.ccnt,tag,mydata.br,0,0,0,0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
-+ }
-+ tcghdr.to_bb_cnt++;
-+ return result;
-+ default:
-+ return 4;
-+ }
-+ if (result!=0)
-+ return result;
-+ }
-+
-+ // read error - only successful exit is from PROFTYPE_OFF record
-+ return 1;
-+} // read_prof9_data
-+
-+// ----------------------------------------------------------------------------
-+// tl9_read_rec
-+//
-+// This function reads the timeline based profiling data for branch level and
-+// cache summary. The exceptd sequences are 0xc9, (0x91, 0x92, 0x93)*, 0xc0.
-+// return code: (execution terminated if any error encountered.)
-+// 0x00 - end-of-file
-+// tag - next tag
-+// ----------------------------------------------------------------------------
-+static unsigned char
-+tl9_read_rec(FILE *fd,
-+ const char *filename)
-+{ unsigned char tag = 0;
-+ int result = 0;
-+
-+ result = read_prof_on(fd, PROFTYPE_ON9);
-+ if(result == 0)
-+ result = read_prof9_data(fd);
-+ if(result != 0)
-+ return prof_errmsg(result, filename);
-+
-+ if (temp_file_pos > TIMELINE_LIMIT)
-+ return 0x00;
-+
-+ if(fread(&tag, sizeof(unsigned char), 1, fd) != 1)
-+ tag = 0x00;
-+
-+ return tag;
-+} // tl9_read_rec
-+
-+#define SIZE_SF_HASH 64
-+#define MASK_SF_HASH 0x1f8
-+static struct sf_hashT
-+{ const char *name;
-+ unsigned int offset;
-+ struct sf_hashT *next;
-+} *sf_hash[SIZE_SF_HASH]={NULL};
-+
-+// ----------------------------------------------------------------------------
-+// get_src_file
-+// ----------------------------------------------------------------------------
-+static unsigned int get_src_file(Sym *sym,
-+ tcgfname *fptr,
-+ unsigned int len)
-+{ int slot=(((unsigned long)sym->file)&MASK_SF_HASH)>>3;
-+ struct sf_hashT *ptr;
-+
-+ for (ptr=sf_hash[slot];ptr!=NULL;ptr=ptr->next)
-+ { if (ptr->name==sym->file->name)
-+ { // already taken cared of
-+ fptr->sfoffset=ptr->offset;
-+ return 0;
-+ }
-+ }
-+ fptr->sfoffset=len;
-+
-+ // create this node
-+ ptr=(struct sf_hashT*)malloc(sizeof(struct sf_hashT));
-+ if (ptr==NULL)
-+ return 0;
-+ else
-+ { // create the hash table entry
-+ ptr->name=sym->file->name;
-+ ptr->offset=len;
-+ ptr->next=sf_hash[slot];
-+ sf_hash[slot]=ptr;
-+
-+ return strlen(sym->file->name)+1;
-+ }
-+} // get_src_file
-+
-+// ----------------------------------------------------------------------------
-+// collect_names
-+//
-+// This function gathers function information from symbol tables.
-+// ----------------------------------------------------------------------------
-+static void collect_names(void)
-+{ unsigned int len=0;
-+ unsigned int indx;
-+
-+ // first generate function name table
-+ tcgfni=(tcgfname*)malloc(sizeof(tcgfname)*tcghdr.func_cnt);
-+ memset(tcgfni, 0x00, (sizeof(tcgfname)*tcghdr.func_cnt));
-+ if (tcgfni!=NULL)
-+ { // resolved names
-+ for (indx=0;indx<symtab.len;indx++)
-+ { tcgfni[indx].faddr=symtab.base[indx].addr;
-+ tcgfni[indx].fnoffset=len;
-+// len+=strlen(symtab.base[indx].name)+1;
-+ len+=strlen(get_name(symtab.base[indx].name))+1;
-+ if (symtab.base[indx].file==NULL)
-+ tcgfni[indx].sfoffset=len-1;
-+ else
-+ len+=get_src_file(&symtab.base[indx],&tcgfni[indx],len);
-+ tcgfni[indx].lineno=symtab.base[indx].line_num;
-+
-+ }
-+
-+ // unresolved names
-+ }
-+
-+ // then generate function name pool
-+ tcgfnp=(char*)malloc(len);
-+ memset(tcgfnp, 0x00, len);
-+ if (tcgfnp==NULL)
-+ { // too bad
-+ free(tcgfni);
-+ len=0;
-+ } else
-+ { unsigned int offset=0;
-+
-+ // copy names
-+ for (indx=0;indx<symtab.len;indx++)
-+ { strcpy(&tcgfnp[offset],get_name(symtab.base[indx].name));
-+// offset+=strlen(symtab.base[indx].name)+1;
-+ offset+=strlen(get_name(symtab.base[indx].name))+1;
-+ if (offset==tcgfni[indx].sfoffset)
-+ { strcpy(&tcgfnp[offset],symtab.base[indx].file->name);
-+ offset+=strlen(symtab.base[indx].file->name)+1;
-+ }
-+ }
-+ }
-+ tcghdr.pool_size=len;
-+} // collect_names
-+
-+// ============================================================================
-+// prof_out_read
-+//
-+// This function reads the timeline based profiling data file.
-+// ============================================================================
-+int
-+prof_out_read(const char *filename)
-+{ FILE *ifp;
-+ struct gmon_hdr ghdr;
-+ unsigned char tag;
-+ int tl1 = 0, tl2 = 0, tl3 = 0, /*tl4 = 0, tl5 = 0*/ tl6 = 0, tl7 = 0, tl8 = 0, tl9 = 0;
-+
-+ // file_format must be FF_PROF
-+ if (file_format != FF_PROF)
-+ { fprintf(stderr, _("%s: don't know how to deal with file format %d\n"),
-+ whoami, file_format);
-+ done(1);
-+ }
-+
-+ // open prof.out file
-+ if (strcmp(filename, "-") == 0)
-+ { // it is from stdin
-+ ifp = stdin;
-+#ifdef SET_BINARY
-+ SET_BINARY(fileno(stdin));
-+#endif // SET_BINARY
-+ } else
-+ { // use the specified file name
-+ ifp = fopen(filename, FOPEN_RB);
-+ if (!ifp)
-+ { // failed to open it - nothing can be done
-+ perror(filename);
-+ done(1);
-+ }
-+ }
-+
-+ // read the header which must exist
-+ if (fread(&ghdr, sizeof (struct gmon_hdr), 1, ifp) != 1)
-+ { fprintf(stderr, _("%s: file too short to be a gmon file\n"),
-+ filename);
-+ done(1);
-+ }
-+
-+
-+ // file must contain valid magic
-+ if (strncmp(&ghdr.cookie[0], GMON_MAGIC, 4))
-+ { fprintf(stderr, _("%s: file `%s' has bad magic cookie\n"),
-+ whoami, filename);
-+ done(1);
-+ }
-+
-+ // right magic, so it's probably really a new prof.out file.
-+ // make sure it is for this version
-+ gmon_file_version = ghdr.version_i;
-+
-+
-+
-+ if (gmon_file_version != GMON_VERSION && gmon_file_version != 0)
-+ { fprintf(stderr,_("%s: file `%s' has unsupported version %d\n"),
-+ whoami, filename, gmon_file_version);
-+ done(1);
-+ }else{
-+// tcghdr.version = gmon_file_version;
-+ tcghdr.version = 1; // 2007,12,12, For AndeSight check, Jerry suggestion.
-+ }
-+
-+
-+ // read in total counts to intialize header record
-+ if (fread(&tcghdr.insn_cnt, sizeof(unsigned long long), 3, ifp) != 3)
-+ { fprintf(stderr, _("%s: file too short to be a gmon file\n"),
-+ filename);
-+ done(1);
-+ }
-+
-+
-+ if (do_timeline)
-+ { // timeline also needs a temporary file
-+ sprintf(&prof_temp_file[5],"%05d",getpid());
-+ if ((temp_fd=fopen(prof_temp_file,"wb+"))==NULL)
-+ { // cannot create temporary file
-+ fprintf(stderr, _("%s: failed to create temporary file %s?\n"),
-+ whoami, prof_temp_file);
-+ done(1);
-+ }
-+ // Initialize tcghdr
-+ tcghdr.to_bb_cnt = 0;
-+ tcghdr.max_func_level = 0;
-+ tcghdr.min_func_level = 0;
-+ tcghdr.to_fn_call_tag = 0;
-+ tcghdr.to_fn_rt_tag = 0;
-+ tcghdr.to_br_tag = 0;
-+ tcghdr.to_du_call_tag = 0;
-+ tcghdr.to_du_rt_tag = 0;
-+ }
-+ symht_init(); // in case of unresolved
-+
-+
-+ // read in all the records
-+ if (fread(&tag, sizeof(tag), 1, ifp) == 1)
-+ {
-+
-+ // first one must be valid
-+ do
-+ { switch (tag)
-+ { case GMON_TAG_TL_1:
-+ ++tl1;
-+ tcghdr.timeline_level = (unsigned int)(tag - 2);
-+ gmon_input |= INPUT_TIMELINE1;
-+ tag=tl1_read_rec(ifp, filename);
-+ break;
-+ case GMON_TAG_TL_2:
-+ ++tl2;
-+ tcghdr.timeline_level = (unsigned int)(tag - 2);
-+ gmon_input |= INPUT_TIMELINE2;
-+ tag=tl2_read_rec(ifp, filename);
-+ break;
-+ case GMON_TAG_TL_3:
-+ ++tl3;
-+ tcghdr.timeline_level = (unsigned int)(tag - 2);
-+ gmon_input |= INPUT_TIMELINE3;
-+ tag=tl3_read_rec(ifp, filename);
-+ break;
-+ case GMON_TAG_TL_4:
-+ fprintf(stderr,_("%s: %s: found unsupport level %d\n"),
-+ whoami, filename, (GMON_TAG_TL_4 - 2));
-+ break;
-+ case GMON_TAG_TL_5:
-+ fprintf(stderr,_("%s: %s: found unsupport level %d\n"),
-+ whoami, filename, (GMON_TAG_TL_5 - 2));
-+ break;
-+ case GMON_TAG_TL_6:
-+ ++tl6;
-+ tcghdr.timeline_level = (unsigned int)(tag - 2);
-+ gmon_input |= INPUT_TIMELINE6;
-+ tag = tl6_read_rec(ifp, filename);
-+ break;
-+ case GMON_TAG_TL_7:
-+ ++tl7;
-+ tcghdr.timeline_level = (unsigned int)(tag - 2);
-+ gmon_input |= INPUT_TIMELINE7;
-+ tag = tl7_read_rec(ifp, filename);
-+ break;
-+ case GMON_TAG_TL_8:
-+ ++tl8;
-+ tcghdr.timeline_level = (unsigned int)(tag - 2);
-+ gmon_input |= INPUT_TIMELINE8;
-+ tag = tl8_read_rec(ifp, filename);
-+ break;
-+ case GMON_TAG_TL_9:
-+ ++tl9;
-+ tcghdr.timeline_level = (unsigned int)(tag - 2);
-+ gmon_input |= INPUT_TIMELINE9;
-+ tag = tl9_read_rec(ifp, filename);
-+ break;
-+ case 0xff:
-+ return -1;
-+ break;
-+ default:
-+ fprintf(stderr,_("%s: %s: found bad tag %d (file corrupted?)\n"),
-+ whoami, filename, tag);
-+ done(1);
-+ }
-+ } while (tag>0); // we borrow 0x00 to singal end-of-file
-+ }
-+
-+ // timeline also needs a temporary file
-+ if (do_timeline)
-+ { fclose(temp_fd);
-+
-+// tcghdr.to_func_level = ((max_function_level - min_function_level) + 1);
-+ tcghdr.max_func_level = max_function_level;
-+ tcghdr.min_func_level = min_function_level;
-+ tcghdr.func_cnt=Sym_HTCount+symtab.len;
-+ collect_names();
-+ }
-+
-+ if (output_style & STYLE_GMON_INFO)
-+ { printf(_("File `%s' (version %d) contains:\n"),
-+ filename, gmon_file_version);
-+ printf(tl1 > 1 ?
-+ _("\t%d function coverage records\n") :
-+ _("\t%d function coverage records\n"), tl1);
-+ printf(tl2 > 1 ?
-+ _("\t%d branch coverage records\n") :
-+ _("\t%d branch coverage record\n"), tl2);
-+ printf(tl3 > 1 ?
-+ _("\t%d instruction coverage records\n") :
-+ _("\t%d instruction coverage record\n"), tl3);
-+ printf(tl6 > 1 ?
-+ _("\t%d function level + branch summary records\n") :
-+ _("\t%d function level + branch summary record\n"), tl6);
-+ printf(tl7 > 1 ?
-+ _("\t%d function level + cache summary records\n") :
-+ _("\t%d function level + cache summary record\n"), tl7);
-+ printf(tl8 > 1 ?
-+ _("\t%d function level + branch & cache summary records\n") :
-+ _("\t%d function level + branch & cache summary record\n"), tl8);
-+ printf(tl9 > 1 ?
-+ _("\t%d branch level + cache summary records\n") :
-+ _("\t%d branch level + cache summary record\n"), tl9);
-+ first_output = FALSE;
-+ }
-+ return 0;
-+} // prof_out_read
-+
-+
-diff -Nur binutils-2.24.orig/gprof/prof_io.h binutils-2.24/gprof/prof_io.h
---- binutils-2.24.orig/gprof/prof_io.h 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gprof/prof_io.h 2016-06-30 21:26:12.773897780 +0200
-@@ -0,0 +1,159 @@
-+#ifndef prof_io_h
-+#define prof_io_h
-+// ============================================================================
-+// prof_io.h
-+// Copyright 2006 Andes Technology Corporation
-+//
-+// This file is part of GNU Binutils.
-+//
-+// This program is free software; you can redistribute it and/or modify
-+// it under the terms of the GNU General Public License as published by
-+// the Free Software Foundation; either version 2 of the License, or
-+// (at your option) any later version.
-+//
-+// This program is distributed in the hope that it will be useful,
-+// but WITHOUT ANY WARRANTY; without even the implied warranty of
-+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+// GNU General Public License for more details.
-+//
-+// You should have received a copy of the GNU General Public License
-+// along with this program; if not, write to the Free Software
-+// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-+// ============================================================================
-+
-+#define VEP_INIT_PC 0x0
-+#define IT_MASK 0x40
-+#define TIMELINE_LIMIT 0x60000000
-+
-+extern char prof_temp_file[32];
-+
-+// blocks to be dumped for timeline based call-graph
-+typedef struct tcgheaderT
-+{ unsigned long long insn_cnt;
-+ unsigned long long cycle_cnt;
-+ unsigned long long call_cnt;
-+ unsigned long long to_bb_cnt;
-+ unsigned long long to_fn_call_tag; // total function call tag count
-+ unsigned long long to_fn_rt_tag; // total function return tag count
-+ unsigned long long to_br_tag; // total branch tag count
-+ unsigned long long to_du_call_tag; // total dummy function call tag count
-+ unsigned long long to_du_rt_tag; // total dummy function return tag count
-+ unsigned int max_func_level;
-+ unsigned int min_func_level;
-+ unsigned int func_cnt;
-+ unsigned int pool_size;
-+ unsigned char timeline_level;
-+ unsigned char version;
-+ unsigned char fill[6]; // for 32/64 compatibility
-+} tcgheader;
-+
-+typedef struct tcgfnameT
-+{ unsigned long long faddr;
-+ unsigned int fnoffset;
-+ unsigned int sfoffset;
-+ unsigned int lineno;
-+ unsigned int filler;
-+} tcgfname;
-+
-+typedef struct tcgpageT
-+{ unsigned long long to_insn_cnt;
-+ unsigned long long to_cycle_cnt;
-+ unsigned long long rec_start;
-+ unsigned long long rec_end;
-+} tcgpage;
-+
-+// used by timeline temporary file
-+typedef struct ttcgnodeT1
-+{ unsigned long long func_addr;
-+ unsigned long long parent_addr;
-+ unsigned long long to_insn_cnt;
-+ unsigned long long to_cycle_cnt;
-+ unsigned char direction;
-+ unsigned char fill[7]; // for 32/64 compatibility
-+} ttcgnode1;
-+
-+typedef struct ttcgnodeT2
-+{ unsigned long long func_addr;
-+ unsigned long long parent_addr;
-+ unsigned long long to_insn_cnt;
-+ unsigned long long to_cycle_cnt;
-+ unsigned char branch_data;
-+ unsigned char return_data;
-+ unsigned char direction;
-+ unsigned char fill[5]; // for 32/64 compatibility
-+} ttcgnode2;
-+
-+typedef struct tcgnodeT1
-+{ unsigned int func_id;
-+ unsigned int parent_id;
-+ unsigned long long to_insn_cnt;
-+ unsigned long long to_cycle_cnt;
-+ unsigned char direction;
-+ unsigned char fill[7]; // for 32/64 compatibility
-+} tcgnode1;
-+
-+typedef struct tcgnodeT2
-+{ unsigned int func_id;
-+ unsigned int parent_id;
-+ unsigned long long to_insn_cnt;
-+ unsigned long long to_cycle_cnt;
-+ unsigned char branch_data;
-+ unsigned char return_data;
-+ unsigned char direction;
-+ unsigned char fill[5]; // for 32/64 compatibility
-+} tcgnode2;
-+
-+extern tcgheader tcghdr; // report header
-+extern tcgfname *tcgfni; // report function name index
-+extern char *tcgfnp; // report function name pool
-+extern tcgpage *tcgpages; // report pages
-+extern tcgnode1 *tcgnodes1; // report call-graph arcs
-+
-+typedef struct SymListNodeT
-+{ Sym *sym;
-+ bfd_vma caller_addr;
-+ struct SymListNodeT *next;
-+ unsigned long long self_insn_cnt;
-+ unsigned long long self_cycle_cnt;
-+ unsigned long long child_insn_cnt;
-+ unsigned long long child_cycle_cnt;
-+ unsigned long long branch_taken_cnt;
-+ unsigned long long branch_misprediction_cnt;
-+ unsigned long long BTB_branch_cnt;
-+ unsigned long long icache_replace_cnt;
-+ unsigned long long icache_miss_cnt;
-+ unsigned long long icache_access_cnt;
-+ unsigned long long dcache_replace_cnt;
-+ unsigned long long dcache_miss_cnt;
-+ unsigned long long dcache_access_cnt;
-+ unsigned long long bb_cnt;
-+ unsigned long long pos;
-+ unsigned int calls;
-+} SymListNode;
-+
-+extern SymListNode *exec_stack; // program execution stack
-+
-+
-+extern int gErrorCode;
-+
-+#define u8 unsigned char
-+#define u16 unsigned short
-+#define u32 unsigned long
-+#define u64 unsigned long long
-+
-+
-+typedef struct __attribute__ ((packed))_header{
-+ u8 tag ;
-+ u16 level;
-+ u32 func_id;
-+ u32 parent_id;
-+}Header_t;
-+
-+typedef struct {
-+ int low:4,
-+ high:4;
-+}BYTE;
-+
-+
-+#endif // prof_io_h
-+
-diff -Nur binutils-2.24.orig/gprof/symtab.c binutils-2.24/gprof/symtab.c
---- binutils-2.24.orig/gprof/symtab.c 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/gprof/symtab.c 2016-06-30 21:26:12.773897780 +0200
-@@ -31,6 +31,10 @@
-
- Sym_Table symtab;
-
-+Sym_HTEntry *Sym_HT[SYM_HTSIZE];
-+int Sym_HTCount;
-+
-+int current_unmapped=1;
-
- /* Initialize a symbol (so it's empty). */
-
-@@ -75,6 +79,26 @@
- return left->is_static - right->is_static;
- }
-
-+static int
-+cmp_addr2 (const PTR lp, const PTR rp)
-+{
-+ const Sym *left = (const Sym *) lp;
-+ const Sym *right = (const Sym *) rp;
-+
-+ if (left->is_unmapped != right->is_unmapped)
-+ return left->is_unmapped - right->is_unmapped;
-+
-+ if (left->addr > right->addr)
-+ return 1;
-+ else if (left->addr < right->addr)
-+ return -1;
-+
-+ if (left->is_func != right->is_func)
-+ return right->is_func - left->is_func;
-+
-+ return left->is_static - right->is_static;
-+}
-+
-
- void
- symtab_finalize (Sym_Table *tab)
-@@ -86,7 +110,10 @@
- return;
-
- /* Sort symbol table in order of increasing function addresses. */
-- qsort (tab->base, tab->len, sizeof (Sym), cmp_addr);
-+ if (do_timeline)
-+ qsort (tab->base, tab->len, sizeof (Sym), cmp_addr2);
-+ else
-+ qsort (tab->base, tab->len, sizeof (Sym), cmp_addr);
-
- /* Remove duplicate entries to speed-up later processing and
- set end_addr if its not set yet. */
-@@ -273,3 +300,57 @@
-
- return 0;
- }
-+
-+// ============================================================================
-+// symht_init
-+//
-+// This function initializes the unresolved symbol hash table.
-+// ============================================================================
-+void
-+symht_init (void)
-+{
-+ memset (Sym_HT, 0, sizeof(Sym_HTEntry*)*SYM_HTSIZE);
-+ Sym_HTCount=0;
-+} // symht_init
-+
-+// ============================================================================
-+// symht_lookup
-+//
-+// This function searches address from the unresolved symbol hash table.
-+// ============================================================================
-+Sym *
-+symht_lookup(bfd_vma address)
-+{ Sym_HTEntry *htnode;
-+
-+ for (htnode=Sym_HT[SYM_HTFUNC(address)];htnode!=NULL;htnode=htnode->next)
-+ { Sym *sym=htnode->sym;
-+
-+ if (sym->addr==address&&sym->is_unmapped==current_unmapped)
-+ return sym;
-+ }
-+
-+ return NULL;
-+} // symht_lookup
-+
-+// ============================================================================
-+// symht_add
-+//
-+// This function inserts address into the unresolved symbol hash table.
-+// ============================================================================
-+int
-+symht_add(Sym *func)
-+{ Sym_HTEntry *htnode=(Sym_HTEntry*)malloc(sizeof(Sym_HTEntry));
-+
-+ if (htnode==NULL)
-+ return 1;
-+ else
-+ { int slot=SYM_HTFUNC(func->addr);
-+
-+ htnode->sym=func;
-+ htnode->next=Sym_HT[slot];
-+ Sym_HT[slot]=htnode;
-+ Sym_HTCount++;
-+ return 0;
-+ }
-+} // symht_add
-+
-diff -Nur binutils-2.24.orig/gprof/symtab.h binutils-2.24/gprof/symtab.h
---- binutils-2.24.orig/gprof/symtab.h 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/gprof/symtab.h 2016-06-30 21:26:12.773897780 +0200
-@@ -52,7 +52,8 @@
- is_static:1, /* Is this a local (static) symbol? */
- is_bb_head:1, /* Is this the head of a basic-blk? */
- mapped:1, /* This symbol was mapped to another name. */
-- has_been_placed:1; /* Have we placed this symbol? */
-+ has_been_placed:1, /* Have we placed this symbol? */
-+ is_unmapped:1; // IT toggle? 1 - off or 0 - on
- unsigned long ncalls; /* How many times executed */
- int nuses; /* How many times this symbol appears in
- a particular context. */
-@@ -67,6 +68,8 @@
- struct
- {
- double time; /* (Weighted) ticks in this routine. */
-+ unsigned long long total_insn_cnt;
-+ unsigned long long total_cycle_cnt;
- bfd_vma scaled_addr; /* Scaled entry point. */
- }
- hist;
-@@ -76,6 +79,8 @@
- {
- unsigned long self_calls; /* How many calls to self. */
- double child_time; /* Cumulative ticks in children. */
-+ unsigned long long child_insn_cnt;
-+ unsigned long long child_cycle_cnt;
- int index; /* Index in the graph list. */
- int top_order; /* Graph call chain top-sort order. */
- bfd_boolean print_flag; /* Should this be printed? */
-@@ -83,7 +88,11 @@
- {
- double fract; /* What % of time propagates. */
- double self; /* How much self time propagates. */
-+ unsigned long long self_insn_cnt;
-+ unsigned long long self_cycle_cnt;
- double child; /* How much child time propagates. */
-+ unsigned long long child_insn_cnt;
-+ unsigned long long child_cycle_cnt;
- }
- prop;
- struct
-@@ -120,4 +129,21 @@
- extern Sym *sym_lookup (Sym_Table *, bfd_vma);
- extern void find_call (Sym *, bfd_vma, bfd_vma);
-
-+#define SYM_HTSIZE 64
-+#define SYM_HTFUNC(a) ((a>>2)%SYM_HTSIZE)
-+
-+typedef struct Sym_HTEntryT
-+{ Sym *sym;
-+ struct Sym_HTEntryT *next;
-+} Sym_HTEntry;
-+
-+extern Sym_HTEntry *Sym_HT[SYM_HTSIZE];
-+extern int Sym_HTCount;
-+
-+extern int current_unmapped;
-+
-+extern void symht_init(void);
-+extern Sym *symht_lookup(bfd_vma);
-+extern int symht_add(Sym*);
-+
- #endif /* symtab_h */
-diff -Nur binutils-2.24.orig/gprof/timeline.c binutils-2.24/gprof/timeline.c
---- binutils-2.24.orig/gprof/timeline.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gprof/timeline.c 2016-06-30 21:26:12.773897780 +0200
-@@ -0,0 +1,936 @@
-+// ============================================================================
-+// timeline.c - Create timeline based profiling.
-+// Copyright 2006 Andes Technology Corporation
-+//
-+// This file is part of GNU Binutils. It is an extension to support timeline
-+// based profiling from data generated by Andes ISS.
-+//
-+// This program is free software; you can redistribute it and/or modify
-+// it under the terms of the GNU General Public License as published by
-+// the Free Software Foundation; either version 2 of the License, or
-+// (at your option) any later version.
-+//
-+// This program is distributed in the hope that it will be useful,
-+// but WITHOUT ANY WARRANTY; without even the implied warranty of
-+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+// GNU General Public License for more details.
-+//
-+// You should have received a copy of the GNU General Public License
-+// along with this program; if not, write to the Free Software
-+// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
-+// 02111-1307, USA.
-+// ============================================================================
-+#define _LARGEFILE64_SOURCE
-+#include "gprof.h"
-+#include "search_list.h"
-+#include "source.h"
-+#include "symtab.h"
-+#include "cg_arcs.h"
-+#include "call_graph.h"
-+#include "corefile.h"
-+#include "gmon_io.h"
-+#include "prof_io.h"
-+#include "gmon_out.h"
-+#include "sym_ids.h"
-+#include "timeline.h"
-+#include <sys/types.h>
-+#include <unistd.h>
-+#include <stdio.h>
-+extern unsigned short min_function_level;
-+extern time_t TotalProfileTime, ReadProfOutDataTime, ParsingProfileDataTime, WriteTemplateFileTime, ReadTemplateFileTime, ProcessDataTime, WriteTimelineBinFileTime, StartTime, EndTime;
-+
-+// Due to SID has the same symbol definition, so I change this definition from timeline.h into timeline.c and prof_io.c file.
-+enum{
-+ LOW_NIBBLE,
-+ HIGH_NIBBLE
-+}NIBBLE;
-+
-+tcgheader tcghdr; // report header
-+tcgfname *tcgfni=NULL; // report function name index
-+char *tcgfnp=NULL; // report function name pool
-+tcgpage *tcgpages=NULL; // report pages
-+tcgnode1 *tcgnodes1=NULL; // report call-graph arcs
-+
-+#define u8 unsigned char
-+
-+FILE * fop = NULL;
-+
-+#ifdef TL_DEBUG
-+#define TimeLine2Text(data, len) \
-+ {\
-+ int i;\
-+ if (fop == NULL) { \
-+ fop = fopen("tv", "wb+"); \
-+ \
-+ for (i = 0; i <= 40; i++) \
-+ fprintf(fop, "%02d ", i); \
-+ fprintf(fop, "\n"); \
-+ \
-+ for (i = 0; i <= 40; i++) \
-+ fprintf(fop, "---"); \
-+ fprintf(fop, "\n"); \
-+ } \
-+ \
-+ for (i = 0; i < len; i++) \
-+ { \
-+ fprintf(fop, "%02x ", data[i]&0xff); \
-+ } \
-+ fprintf(fop, "\n"); \
-+ }
-+#else
-+ #define TimeLine2Text(data, len)
-+#endif
-+
-+
-+// =============================================================================
-+// calculate_data_size
-+//
-+// This function calculates length of data
-+// return:
-+// positive value: data length
-+// -1: parameter error
-+// =============================================================================
-+unsigned int calculate_data_size(unsigned char size_info, int nibble);
-+unsigned int
-+calculate_data_size(unsigned char size_info, int nibble)
-+{
-+ if(nibble == HIGH_NIBBLE){
-+ if((size_info & 0x80)){
-+ return 8;
-+ }else if((size_info & 0x40)){
-+ return 4;
-+ }else if((size_info & 0x20)){
-+ return 2;
-+ }else{
-+ return 1;
-+ }
-+ }else if(nibble == LOW_NIBBLE){
-+ if((size_info & 0x08)){
-+ return 8;
-+ }else if((size_info & 0x04)){
-+ return 4;
-+ }else if((size_info & 0x02)){
-+ return 2;
-+ }else{
-+ return 1;
-+ }
-+ }
-+
-+ return -1;
-+}
-+
-+
-+int
-+getMsgLen(char *buf, int len)
-+{
-+ int ret = 0;
-+ int i;
-+
-+ for (i = 0; i < len; i++)
-+ {
-+ ret += buf[i]&0xf;
-+ ret += (buf[i]>>4)&0xf;
-+
-+ }
-+ return ret;
-+}
-+
-+int TimeLine_L1(FILE *fd);
-+int
-+TimeLine_L1(FILE *fd)
-+{
-+ Sym *sym;
-+ Header_t H;
-+ unsigned long length;
-+ char buf[256];
-+ char wbuf[512];
-+ char * wp;
-+ long pos, start_pos;
-+ int len1, len2;
-+ char onebyte[1];
-+ char threebyte[3];
-+ int ret __attribute__((unused))= 0;
-+
-+ while (!feof(fd))
-+ {
-+ start_pos = ftell(fd);
-+ ret =fread(&H, sizeof(Header_t), 1, fd);
-+ wp = wbuf;
-+
-+ switch(H.tag) {
-+ case PROFTYPE_ON1:
-+ case PROFTYPE_FC1:
-+ ret = fread(&length, 4, 1, fd);
-+ ret = fread(onebyte, 1, 1, fd);
-+ len1 = getMsgLen(onebyte, 1);
-+ ret = fread(buf, len1, 1, fd);
-+
-+ pos = ftell(fd);
-+ fseek(fd, length, SEEK_SET);
-+// fseek(fd, length - sizeof(Header_t) - 5 - len1, SEEK_CUR);
-+
-+ ret =fread(threebyte, 3, 1, fd);
-+ len2 = getMsgLen(threebyte, 3);
-+ ret =fread(buf + len1, len2, 1, fd);
-+ fseek(fd, pos, SEEK_SET);
-+
-+ length = length + 3 + len2 - start_pos;
-+// length = length + 3 + len2;
-+
-+ sym = sym_lookup(&symtab, H.func_id);
-+ H.func_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ sym = sym_lookup(&symtab, H.parent_id);
-+ H.parent_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, &length, sizeof(length));
-+ wp = mempcpy(wp, onebyte, 1);
-+ wp = mempcpy(wp, threebyte, 3);
-+ wp = mempcpy(wp, buf, len1+len2);
-+ break;
-+
-+ case PROFTYPE_FR1:
-+ case PROFTYPE_OFF:
-+ case PROFTYPE_DUMMY_FR1:
-+ ret = fread(onebyte, 1, 1, fd);
-+ len1 = getMsgLen(onebyte, 1);
-+ ret =fread(buf, len1, 1, fd);
-+ ret =fread(threebyte, 3, 1, fd);
-+ len2 = getMsgLen(threebyte, 3);
-+ // skip the summary data
-+ fseek (fd, len2, SEEK_CUR);
-+
-+ sym = sym_lookup(&symtab, H.func_id);
-+ H.func_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ sym = sym_lookup(&symtab, H.parent_id);
-+ H.parent_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, onebyte, 1);
-+ wp = mempcpy(wp, buf, len1);
-+ break;
-+ default:
-+ break;
-+ }
-+
-+ if (!fwrite(wbuf, wp-wbuf, 1, stdout))
-+ {
-+ gErrorCode = errno;
-+ return -1;
-+ }
-+ TimeLine2Text(wbuf, wp-wbuf);
-+ if (H.tag == PROFTYPE_OFF)
-+ break;
-+ }
-+ return 0;
-+}
-+
-+int
-+TimeLine_L2(FILE *fd);
-+int
-+TimeLine_L2(FILE *fd)
-+{
-+ Sym *sym;
-+ Header_t H;
-+ unsigned long length;
-+ char buf[256];
-+ char wbuf[512];
-+ char * wp;
-+ long pos, start_pos;
-+ int len1, len2;
-+ char onebyte[1];
-+ char fivebytes[5];
-+ char branch;
-+ long reserved;
-+ int ret __attribute__((unused)) = 0;
-+
-+ while (!feof(fd))
-+ {
-+ start_pos = ftell(fd);
-+ ret = fread(&H, sizeof(Header_t), 1, fd);
-+ wp = wbuf;
-+
-+ switch(H.tag) {
-+ case PROFTYPE_ON2:
-+ case PROFTYPE_FC2:
-+ ret = fread(&length, 4, 1, fd);
-+ ret = fread(onebyte, 1, 1, fd);
-+ len1 = getMsgLen(onebyte, 1);
-+ ret = fread(buf, len1, 1, fd);
-+ ret = fread(&branch, 1, 1, fd); // branch
-+
-+ pos = ftell(fd);
-+ fseek(fd, length, SEEK_SET);
-+
-+ {
-+ // skipping block..... to summary data
-+ Header_t tmp_H;
-+ char tmp_onebyte[1];
-+ int tmp_len;
-+ char tmp_buf[20];
-+
-+
-+ ret = fread(&tmp_H, sizeof(Header_t), 1, fd);
-+ ret = fread(tmp_onebyte, 1, 1, fd);
-+ tmp_len = getMsgLen(tmp_onebyte, 1);
-+ ret = fread(tmp_buf, tmp_len+1, 1, fd);
-+ }
-+
-+ ret = fread(fivebytes, 5, 1, fd);
-+ len2 = getMsgLen(fivebytes, 5);
-+
-+ ret = fread(buf + len1, len2, 1, fd);
-+ fseek(fd, pos, SEEK_SET);
-+
-+ length = length + 5 + len2 - start_pos;
-+
-+ sym = sym_lookup(&symtab, H.func_id);
-+ H.func_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ sym = sym_lookup(&symtab, H.parent_id);
-+ H.parent_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, &length, sizeof(length));
-+ wp = mempcpy(wp, onebyte, 1);
-+ wp = mempcpy(wp, fivebytes, 5);
-+ wp = mempcpy(wp, buf, len1+len2);
-+ wp = mempcpy(wp, &branch, 1);
-+ break;
-+
-+ case PROFTYPE_FR2:
-+ case PROFTYPE_OFF:
-+ case PROFTYPE_DUMMY_FR2:
-+ ret = fread(onebyte, 1, 1, fd);
-+ len1 = getMsgLen(onebyte, 1);
-+ ret = fread(buf, len1, 1, fd);
-+ ret = fread(&branch, 1, 1, fd); // branch
-+
-+ ret = fread(fivebytes, 5, 1, fd);
-+ len2 = getMsgLen(fivebytes, 5);
-+ // skip the summary data
-+ fseek (fd, len2, SEEK_CUR);
-+
-+ sym = sym_lookup(&symtab, H.func_id);
-+ H.func_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ sym = sym_lookup(&symtab, H.parent_id);
-+ H.parent_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, onebyte, 1);
-+ wp = mempcpy(wp, buf, len1);
-+ wp = mempcpy(wp, &branch, 1);
-+ break;
-+
-+ case PROFTYPE_BR2:
-+ ret = fread(onebyte, 1, 1, fd);
-+ len1 = getMsgLen(onebyte, 1);
-+ ret = fread(buf, len1, 1, fd);
-+ ret = fread(&branch, 1, 1, fd); // branch
-+ ret = fread(&reserved, 4, 1, fd);
-+
-+ sym = sym_lookup(&symtab, H.func_id);
-+ H.func_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ sym = sym_lookup(&symtab, H.parent_id);
-+ H.parent_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, onebyte, 1);
-+ wp = mempcpy(wp, buf, len1);
-+ wp = mempcpy(wp, &branch, 1);
-+ wp = mempcpy(wp, &reserved, 4);
-+
-+ break;
-+ default:
-+ break;
-+ }
-+
-+ if (!fwrite(wbuf, wp-wbuf, 1, stdout))
-+ {
-+ gErrorCode = errno;
-+ return -1;
-+ }
-+ TimeLine2Text(wbuf, wp-wbuf);
-+ if (H.tag == PROFTYPE_OFF)
-+ break;
-+ }
-+ return 0;
-+}
-+
-+
-+int TimeLine_L6(FILE *fd);
-+int
-+TimeLine_L6(FILE *fd)
-+{
-+ Sym *sym;
-+ Header_t H;
-+ unsigned long length;
-+ char buf[256];
-+ char wbuf[512];
-+ char * wp;
-+ long pos, start_pos;
-+ int len1, len2;
-+ char onebyte[1];
-+ int ret __attribute__((unused)) = 0;
-+ char fourbytes[4];
-+
-+ while (!feof(fd))
-+ {
-+ start_pos = ftell(fd);
-+ ret = fread(&H, sizeof(Header_t), 1, fd);
-+ wp = wbuf;
-+
-+ switch(H.tag) {
-+ case PROFTYPE_ON6:
-+ case PROFTYPE_FC6:
-+ ret = fread(&length, 4, 1, fd);
-+ ret = fread(onebyte, 1, 1, fd);
-+ len1 = getMsgLen(onebyte, 1);
-+ ret = fread(buf, len1, 1, fd);
-+
-+ pos = ftell(fd);
-+ fseek(fd, length, SEEK_SET);
-+// fseek(fd, length - sizeof(Header_t) - 5 - len1, SEEK_CUR);
-+
-+ ret = fread(fourbytes, 4, 1, fd);
-+ len2 = getMsgLen(fourbytes, 4);
-+ ret = fread(buf + len1, len2, 1, fd);
-+ fseek(fd, pos, SEEK_SET);
-+
-+ length = length + 4 + len2 - start_pos;
-+// length = length + 3 + len2;
-+
-+ sym = sym_lookup(&symtab, H.func_id);
-+ H.func_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ sym = sym_lookup(&symtab, H.parent_id);
-+ H.parent_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, &length, sizeof(length));
-+ wp = mempcpy(wp, onebyte, 1);
-+ wp = mempcpy(wp, fourbytes, 4);
-+ wp = mempcpy(wp, buf, len1+len2);
-+ break;
-+
-+ case PROFTYPE_FR6:
-+ case PROFTYPE_OFF:
-+ case PROFTYPE_DUMMY_FR6:
-+ ret = fread(onebyte, 1, 1, fd);
-+ len1 = getMsgLen(onebyte, 1);
-+ ret = fread(buf, len1, 1, fd);
-+ ret = fread(fourbytes, 4, 1, fd);
-+ len2 = getMsgLen(fourbytes, 4);
-+ // skip the summary data
-+ fseek (fd, len2, SEEK_CUR);
-+
-+ sym = sym_lookup(&symtab, H.func_id);
-+ H.func_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ sym = sym_lookup(&symtab, H.parent_id);
-+ H.parent_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, onebyte, 1);
-+ wp = mempcpy(wp, buf, len1);
-+ break;
-+ default:
-+ break;
-+ }
-+
-+ if (!fwrite(wbuf, wp-wbuf, 1, stdout))
-+ {
-+ gErrorCode = errno;
-+ return -1;
-+ }
-+ TimeLine2Text(wbuf, wp-wbuf);
-+ if (H.tag == PROFTYPE_OFF)
-+ break;
-+ }
-+ return 0;
-+}
-+
-+
-+
-+int TimeLine_L7(FILE *fd);
-+int
-+TimeLine_L7(FILE *fd)
-+{
-+ Sym *sym;
-+ Header_t H;
-+ unsigned long length;
-+ char buf[256];
-+ char wbuf[512];
-+ char * wp;
-+ long pos, start_pos;
-+ int len1, len2;
-+ char onebyte[1];
-+ char sixbytes[6];
-+ int ret __attribute__((unused)) = 0;
-+
-+ while (!feof(fd))
-+ {
-+ start_pos = ftell(fd);
-+ ret = fread(&H, sizeof(Header_t), 1, fd);
-+ wp = wbuf;
-+
-+ switch(H.tag) {
-+ case PROFTYPE_ON7:
-+ case PROFTYPE_FC7:
-+ ret = fread(&length, 4, 1, fd);
-+ ret = fread(onebyte, 1, 1, fd);
-+ len1 = getMsgLen(onebyte, 1);
-+ ret = fread(buf, len1, 1, fd);
-+
-+ pos = ftell(fd);
-+ fseek(fd, length, SEEK_SET);
-+// fseek(fd, length - sizeof(Header_t) - 5 - len1, SEEK_CUR);
-+
-+ ret = fread(sixbytes, 6, 1, fd);
-+ len2 = getMsgLen(sixbytes, 6);
-+ ret = fread(buf + len1, len2, 1, fd);
-+ fseek(fd, pos, SEEK_SET);
-+
-+ length = length + 6 + len2 - start_pos;
-+// length = length + 3 + len2;
-+
-+ sym = sym_lookup(&symtab, H.func_id);
-+ H.func_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ sym = sym_lookup(&symtab, H.parent_id);
-+ H.parent_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, &length, sizeof(length));
-+ wp = mempcpy(wp, onebyte, 1);
-+ wp = mempcpy(wp, sixbytes, 6);
-+ wp = mempcpy(wp, buf, len1+len2);
-+ break;
-+
-+ case PROFTYPE_FR7:
-+ case PROFTYPE_OFF:
-+ case PROFTYPE_DUMMY_FR7:
-+ ret = fread(onebyte, 1, 1, fd);
-+ len1 = getMsgLen(onebyte, 1);
-+ ret = fread(buf, len1, 1, fd);
-+ ret = fread(sixbytes, 6, 1, fd);
-+ len2 = getMsgLen(sixbytes, 6);
-+ // skip the summary data
-+ fseek (fd, len2, SEEK_CUR);
-+
-+ sym = sym_lookup(&symtab, H.func_id);
-+ H.func_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ sym = sym_lookup(&symtab, H.parent_id);
-+ H.parent_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, onebyte, 1);
-+ wp = mempcpy(wp, buf, len1);
-+ break;
-+ default:
-+ break;
-+ }
-+
-+ if (!fwrite(wbuf, wp-wbuf, 1, stdout))
-+ {
-+ gErrorCode = errno;
-+ return -1;
-+ }
-+ TimeLine2Text(wbuf, wp-wbuf);
-+ if (H.tag == PROFTYPE_OFF)
-+ break;
-+ }
-+ return 0;
-+}
-+
-+int TimeLine_L8(FILE *fd);
-+int
-+TimeLine_L8(FILE *fd)
-+{
-+ Sym *sym;
-+ Header_t H;
-+ unsigned long length;
-+ char buf[256];
-+ char wbuf[512];
-+ char * wp;
-+ long pos, start_pos;
-+ int len1, len2;
-+ char onebyte[1];
-+ char sevenbytes[7];
-+ int ret __attribute__((unused)) = 0;
-+
-+ while (!feof(fd))
-+ {
-+ start_pos = ftell(fd);
-+ ret = fread(&H, sizeof(Header_t), 1, fd);
-+ wp = wbuf;
-+
-+ switch(H.tag) {
-+ case PROFTYPE_ON8:
-+ case PROFTYPE_FC8:
-+ ret = fread(&length, 4, 1, fd);
-+ ret = fread(onebyte, 1, 1, fd);
-+ len1 = getMsgLen(onebyte, 1);
-+ ret = fread(buf, len1, 1, fd);
-+
-+ pos = ftell(fd);
-+ fseek(fd, length, SEEK_SET);
-+// fseek(fd, length - sizeof(Header_t) - 5 - len1, SEEK_CUR);
-+
-+ ret = fread(sevenbytes, 7, 1, fd);
-+ len2 = getMsgLen(sevenbytes, 7);
-+ ret = fread(buf + len1, len2, 1, fd);
-+ fseek(fd, pos, SEEK_SET);
-+
-+ length = length + 7 + len2 - start_pos;
-+// length = length + 3 + len2;
-+
-+ sym = sym_lookup(&symtab, H.func_id);
-+ H.func_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ sym = sym_lookup(&symtab, H.parent_id);
-+ H.parent_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, &length, sizeof(length));
-+ wp = mempcpy(wp, onebyte, 1);
-+ wp = mempcpy(wp, sevenbytes, 7);
-+ wp = mempcpy(wp, buf, len1+len2);
-+ break;
-+
-+ case PROFTYPE_FR8:
-+ case PROFTYPE_OFF:
-+ case PROFTYPE_DUMMY_FR8:
-+ ret = fread(onebyte, 1, 1, fd);
-+ len1 = getMsgLen(onebyte, 1);
-+ ret = fread(buf, len1, 1, fd);
-+ ret = fread(sevenbytes, 7, 1, fd);
-+ len2 = getMsgLen(sevenbytes, 7);
-+ // skip the summary data
-+ fseek (fd, len2, SEEK_CUR);
-+
-+ sym = sym_lookup(&symtab, H.func_id);
-+ H.func_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ sym = sym_lookup(&symtab, H.parent_id);
-+ H.parent_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, onebyte, 1);
-+ wp = mempcpy(wp, buf, len1);
-+ break;
-+ default:
-+ break;
-+ }
-+
-+ if (!fwrite(wbuf, wp-wbuf, 1, stdout))
-+ {
-+ gErrorCode = errno;
-+ return -1;
-+ }
-+ TimeLine2Text(wbuf, wp-wbuf);
-+ if (H.tag == PROFTYPE_OFF)
-+ break;
-+ }
-+ return 0;
-+}
-+typedef struct{
-+ char * ptr;
-+ int len;
-+}Segment;
-+
-+int TimeLine_L9(FILE *fd);
-+int
-+TimeLine_L9(FILE *fd)
-+{
-+ Sym *sym;
-+ Header_t H;
-+ unsigned long length;
-+ char buf[256];
-+ char buf2[256];
-+// char temp[512];
-+ char wbuf[512];
-+ char * wp;
-+ long pos, start_pos;
-+ int len1, len2;
-+ char fourbytes[4];
-+ char eightbytes[8];
-+ char bytes_12[12];
-+// char branch;
-+// long reserved;
-+ Segment seg[4];
-+ int ret __attribute__((unused)) = 0;
-+
-+ while (!feof(fd))
-+ {
-+ start_pos = ftell(fd);
-+ ret = fread(&H, sizeof(Header_t), 1, fd);
-+ wp = wbuf;
-+
-+ switch(H.tag) {
-+ case PROFTYPE_ON9:
-+ case PROFTYPE_FC9:
-+ ret = fread(&length, 4, 1, fd);
-+ ret = fread(fourbytes, 1, 4, fd);
-+ len1 = getMsgLen(fourbytes, 4);
-+ len1++; // and one more byte for BR
-+ ret = fread(buf, len1, 1, fd);
-+
-+ pos = ftell(fd);
-+ fseek(fd, length, SEEK_SET);
-+
-+ {
-+ // skipping block..... to summary data
-+ Header_t tmp_H;
-+ char tmp_fourbytes[4];
-+ int tmp_len;
-+ char tmp_buf[256];
-+
-+ ret = fread(&tmp_H, sizeof(Header_t), 1, fd);
-+ ret = fread(tmp_fourbytes, 4, 1, fd);
-+ tmp_len = getMsgLen(tmp_fourbytes, 4);
-+ ret = fread(tmp_buf, tmp_len+1, 1, fd);
-+ }
-+
-+ ret = fread(eightbytes, 8, 1, fd);
-+ len2 = getMsgLen(eightbytes, 8);
-+ ret = fread(buf2, len2, 1, fd);
-+ fseek(fd, pos, SEEK_SET);
-+
-+ length = length + 8 + len2 - start_pos;
-+
-+ sym = sym_lookup(&symtab, H.func_id);
-+ H.func_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ sym = sym_lookup(&symtab, H.parent_id);
-+ H.parent_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ memcpy(&bytes_12[0], &fourbytes[0], 1);
-+ memcpy(&bytes_12[1], &eightbytes[0], 5);
-+ memcpy(&bytes_12[6], &fourbytes[1], 3);
-+ memcpy(&bytes_12[9], &eightbytes[5], 3);
-+
-+ seg[0].ptr = buf;
-+ seg[0].len = getMsgLen(fourbytes, 1);
-+
-+ seg[1].ptr = buf2;
-+ seg[1].len = getMsgLen(eightbytes, 5);
-+
-+ seg[2].ptr = seg[0].ptr + seg[0].len;
-+ seg[2].len = len1 - seg[0].len;
-+
-+ seg[3].ptr = buf2 + seg[1].len;
-+ seg[3].len = len2 - seg[1].len;
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, &length, sizeof(length));
-+ wp = mempcpy(wp, bytes_12, 12);
-+ wp = mempcpy(wp, seg[0].ptr, seg[0].len);
-+ wp = mempcpy(wp, seg[1].ptr, seg[1].len);
-+ wp = mempcpy(wp, seg[2].ptr, seg[2].len);
-+ wp = mempcpy(wp, seg[3].ptr, seg[3].len);
-+ break;
-+
-+ case PROFTYPE_FR9:
-+ case PROFTYPE_OFF:
-+ case PROFTYPE_DUMMY_FR9:
-+ ret = fread(fourbytes, 4, 1, fd);
-+ len1 = getMsgLen(fourbytes, 4);
-+ len1++; // and one more byte for BR
-+ ret = fread(buf, len1, 1, fd);
-+
-+ ret = fread(eightbytes, 8, 1, fd);
-+ len2 = getMsgLen(eightbytes, 8);
-+ // skip the summary data
-+ fseek (fd, len2, SEEK_CUR);
-+
-+ sym = sym_lookup(&symtab, H.func_id);
-+ H.func_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ sym = sym_lookup(&symtab, H.parent_id);
-+ H.parent_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, fourbytes, 4);
-+ wp = mempcpy(wp, buf, len1);
-+ break;
-+
-+ case PROFTYPE_BR9:
-+ ret = fread(fourbytes, 4, 1, fd);
-+ len1 = getMsgLen(fourbytes, 4);
-+ len1 += 5; // branch + reserved
-+ ret = fread(buf, len1, 1, fd);
-+// fread(&branch, 1, 1, fd); // branch
-+// fread(&reserved, 4, 1, fd); // reserved
-+
-+ sym = sym_lookup(&symtab, H.func_id);
-+ H.func_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ sym = sym_lookup(&symtab, H.parent_id);
-+ H.parent_id = (sym == NULL) ? 0 : sym - symtab.base;
-+
-+ wp = mempcpy(wp, &H, sizeof(Header_t));
-+ wp = mempcpy(wp, fourbytes, 4);
-+ wp = mempcpy(wp, buf, len1);
-+ break;
-+ default:
-+ break;
-+ }
-+
-+ if (!fwrite(wbuf, wp-wbuf, 1, stdout))
-+ {
-+ gErrorCode = errno;
-+ return -1;
-+ }
-+ TimeLine2Text(wbuf, wp-wbuf);
-+ if (H.tag == PROFTYPE_OFF)
-+ break;
-+ }
-+ return 0;
-+}
-+
-+
-+
-+// ============================================================================
-+// print_cgtimeline
-+//
-+// This function prints the timeline based call graph. This requires raw data
-+// with tag GMON_TAG_TL_1, GMON_TAG_TL_2, or GMON_TAG_TL_3, GMON_TAG_TL_4,
-+// GMON_TAG_TL_5, GMON_TAG_TL_6, GMON_TAG_TL_7, GMON_TAG_TL_8, or GMON_TAG_TL_9.
-+// ============================================================================
-+int
-+print_cgtimeline (void)
-+{
-+ FILE *fd;
-+ int result = 0;
-+#ifdef SET_BINARY
-+ SET_BINARY(fileno(stdout));
-+#endif // SET_BINARY
-+
-+ // write out control information
-+ if(!fwrite(&tcghdr,sizeof(tcgheader),1,stdout))
-+ {
-+ gErrorCode = errno;
-+ return -1;
-+ }
-+
-+ if (tcghdr.func_cnt>0)
-+ {
-+ if(!fwrite(tcgfni,sizeof(tcgfname),tcghdr.func_cnt,stdout))
-+ {
-+ gErrorCode = errno;
-+ return -1;
-+ }
-+ }
-+ if (tcghdr.pool_size>0)
-+ {
-+ if(!fwrite(tcgfnp,sizeof(char),tcghdr.pool_size,stdout))
-+ {
-+ gErrorCode = errno;
-+ return -1;
-+ }
-+ }
-+
-+ // write out timeline entries
-+ fd=fopen(prof_temp_file,"rb+");
-+
-+ switch(tcghdr.timeline_level)
-+ {
-+ case 1:
-+ result = TimeLine_L1(fd);
-+ break;
-+
-+ case 2:
-+ result = TimeLine_L2(fd);
-+ break;
-+
-+ case 6:
-+ result = TimeLine_L6(fd);
-+ break;
-+
-+ case 7:
-+ result = TimeLine_L7(fd);
-+ break;
-+
-+ case 8:
-+ result = TimeLine_L8(fd);
-+ break;
-+
-+ case 9:
-+ result = TimeLine_L9(fd);
-+ break;
-+ default:
-+ break;
-+ }
-+ fclose(fd);
-+
-+ if (fop != NULL)
-+ fclose(fop);
-+
-+ return result;
-+
-+} // print_cgtimeline
-+
-+// ============================================================================
-+// print_bbtimeline
-+//
-+// This function prints the timeline based branch coverage. This requires raw
-+// data with tag GMON_TAG_TL_2 or GMON_TAG_TL3.
-+// ============================================================================
-+void
-+print_bbtimeline (void)
-+{/*
-+ bfd_vma from_pc, self_pc;
-+ unsigned int count;
-+
-+ if (gmon_io_read_vma (ifp, &from_pc)
-+ || gmon_io_read_vma (ifp, &self_pc)
-+ || gmon_io_read_32 (ifp, &count))
-+ {
-+ fprintf (stderr, _("%s: %s: unexpected end of file\n"),
-+ whoami, filename);
-+ done (1);
-+ }
-+
-+ DBG (SAMPLEDEBUG,
-+ printf ("[cg_read_rec] frompc 0x%lx selfpc 0x%lx count %lu\n",
-+ (unsigned long) from_pc, (unsigned long) self_pc,
-+ (unsigned long) count));
-+ // Add this arc:
-+ cg_tally (from_pc, self_pc, count);
-+*/} // print_bbtimeline
-+
-+// ============================================================================
-+// print_cacheusage
-+//
-+// This function prints the timeline based instruction coverage. This requires
-+// raw data with tag GMON_TAG_TL3.
-+// ============================================================================
-+void
-+print_cacheusage (void)
-+{/*
-+ bfd_vma from_pc, self_pc;
-+ unsigned int count;
-+
-+ if (gmon_io_read_vma (ifp, &from_pc)
-+ || gmon_io_read_vma (ifp, &self_pc)
-+ || gmon_io_read_32 (ifp, &count))
-+ {
-+ fprintf (stderr, _("%s: %s: unexpected end of file\n"),
-+ whoami, filename);
-+ done (1);
-+ }
-+
-+ DBG (SAMPLEDEBUG,
-+ printf ("[cg_read_rec] frompc 0x%lx selfpc 0x%lx count %lu\n",
-+ (unsigned long) from_pc, (unsigned long) self_pc,
-+ (unsigned long) count));
-+ // Add this arc
-+ cg_tally (from_pc, self_pc, count);
-+*/} // print_cacheusage
-+
-diff -Nur binutils-2.24.orig/gprof/timeline.h binutils-2.24/gprof/timeline.h
---- binutils-2.24.orig/gprof/timeline.h 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/gprof/timeline.h 2016-06-30 21:26:12.773897780 +0200
-@@ -0,0 +1,113 @@
-+#ifndef timeline_h
-+#define timeline_h
-+// ============================================================================
-+// timeline.h
-+// Copyright 2006 Andes Technology Corporation
-+//
-+// This file is part of GNU Binutils.
-+//
-+// This program is free software; you can redistribute it and/or modify
-+// it under the terms of the GNU General Public License as published by
-+// the Free Software Foundation; either version 2 of the License, or
-+// (at your option) any later version.
-+//
-+// This program is distributed in the hope that it will be useful,
-+// but WITHOUT ANY WARRANTY; without even the implied warranty of
-+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+// GNU General Public License for more details.
-+//
-+// You should have received a copy of the GNU General Public License
-+// along with this program; if not, write to the Free Software
-+// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-+// ============================================================================
-+
-+// data record types
-+#define PROFTYPE_FC1 0x11 // level 1: function coverage
-+#define PROFDLEN_FC1 17
-+#define PROFTYPE_FR1 0x12
-+#define PROFDLEN_FR1 17
-+#define PROFTYPE_FC2 0x21 // level 2: branch coverage
-+#define PROFDLEN_FC2 18
-+#define PROFTYPE_FR2 0x22
-+#define PROFDLEN_FR2 18
-+#define PROFTYPE_BR2 0x23
-+#define PROFDLEN_BR2 18
-+#define PROFTYPE_FC3 0x31 // level 3: instruction coversage
-+#define PROFDLEN_FC3 10//14
-+#define PROFTYPE_FR3 0x32
-+#define PROFDLEN_FR3 10//14
-+#define PROFTYPE_BR3 0x33
-+#define PROFDLEN_BR3 10//14
-+#define PROFTYPE_MA3 0x34
-+#define PROFDLEN_MA3 12//16
-+#define PROFTYPE_OT3 0x35
-+#define PROFDLEN_OT3 5//9
-+#define PROFTYPE_FC6 0x61 // level 6: Function Level + Branch Summary
-+#define PROFDLEN_FC6 43
-+#define PROFTYPE_FR6 0x62
-+#define PROFDLEN_FR6 43
-+#define PROFTYPE_FC7 0x71 // level 7: Function Level + Cache Summary
-+#define PROFDLEN_FC7 68
-+#define PROFTYPE_FR7 0x72
-+#define PROFDLEN_FR7 68
-+#define PROFTYPE_FC8 0x81 // level 8: Function Level + Branch & Cache Summary
-+#define PROFDLEN_FC8 94
-+#define PROFTYPE_FR8 0x82
-+#define PROFDLEN_FR8 94
-+#define PROFTYPE_FC9 0x91 // level 9: Branch Level + Cache Summary
-+#define PROFDLEN_FC9 72
-+#define PROFTYPE_FR9 0x92
-+#define PROFDLEN_FR9 72
-+#define PROFTYPE_BR9 0x93
-+#define PROFDLEN_BR9 72
-+#define PROFTYPE_DUMMY_FC1 0x1A
-+#define PROFTYPE_DUMMY_FR1 0x1B
-+#define PROFTYPE_DUMMY_FC2 0x2A
-+#define PROFTYPE_DUMMY_FR2 0x2B
-+#define PROFTYPE_DUMMY_FC3 0x3A
-+#define PROFTYPE_DUMMY_FR3 0x3B
-+#define PROFTYPE_DUMMY_FC6 0x6A
-+#define PROFTYPE_DUMMY_FR6 0x6B
-+#define PROFTYPE_DUMMY_FC7 0x7A
-+#define PROFTYPE_DUMMY_FR7 0x7B
-+#define PROFTYPE_DUMMY_FC8 0x8A
-+#define PROFTYPE_DUMMY_FR8 0x8B
-+#define PROFTYPE_DUMMY_FC9 0x9A
-+#define PROFTYPE_DUMMY_FR9 0x9B
-+
-+// control record types: type is written out
-+#define PROFTYPE_OFF 0xC0 // profiling off
-+#define PROFDLEN_OFF 13
-+#define PROFTYPE_ON 0xC0 // profiling on
-+#define PROFDLEN_ON 14
-+#define PROFTYPE_ON1 0xC1 // function coverage profiling on
-+#define PROFTYPE_ON2 0xC2 // branch coverage profiling on
-+#define PROFTYPE_ON3 0xC3 // instruction coverage profiling on
-+#define PROFTYPE_ON4 0xC4 // pipeline coverage profiling on
-+#define PROFTYPE_ON5 0xC5 // memory usage coverage profiling on
-+#define PROFTYPE_ON6 0xC6 // function coverage + branch summary profiling on
-+#define PROFTYPE_ON7 0xC7 // function coverage + cache summary profiling on
-+#define PROFTYPE_ON8 0xC8 // function coverage + branch & cache summary profiling on
-+#define PROFTYPE_ON9 0xC9 // branch coverage + cache summary profiling on
-+#define PROFTYPE_MOD 0xCF // mode changed (mode/endian/IT/DT)
-+#define PROFDLEN_MOD 14
-+// control record types: type is dropped
-+#define PROFTYPE_NEW 0xF0 // open file to write header
-+#define PROFDLEN_NEW 21
-+#define PROFTYPE_TCI 0xF1 // intialize total counts
-+#define PROFDLEN_TCI 25
-+#define PROFTYPE_TCU 0xFE // update total counts
-+#define PROFDLEN_TCU 25
-+#define PROFTYPE_EOF 0xFF // close file
-+#define PROFDLEN_EOF 1
-+
-+extern int print_cgtimeline (void);
-+extern void print_bbtimeline (void);
-+extern void print_cacheusage (void);
-+extern int getMsgLen(char *, int);
-+//enum{
-+// LOW_NIBBLE,
-+// HIGH_NIBBLE
-+//}NIBBLE;
-+#endif // timeline_h
-+
-diff -Nur binutils-2.24.orig/gprof/utils.c binutils-2.24/gprof/utils.c
---- binutils-2.24.orig/gprof/utils.c 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/gprof/utils.c 2016-06-30 21:26:12.773897780 +0200
-@@ -34,6 +34,37 @@
- #include "cg_arcs.h"
- #include "utils.h"
- #include "corefile.h"
-+#include <string.h>
-+// ============================================================================
-+// get_name
-+//
-+// This function returns the proper name of the symbol.
-+// ============================================================================
-+const char *
-+get_name (const char *name)
-+{ char *demangled = 0;
-+
-+ if (name)
-+ {
-+ if (!bsd_style_output)
-+ {
-+ if (name[0] == '_' && name[1] && discard_underscores)
-+ {
-+ name++;
-+ }
-+ if (demangle)
-+ {
-+ demangled = cplus_demangle (name, DMGL_ANSI | DMGL_PARAMS);
-+ if (demangled)
-+ {
-+ name = demangled;
-+ }
-+ }
-+ }
-+ }
-+
-+ return name;
-+} // get_name
-
-
- /*
-diff -Nur binutils-2.24.orig/gprof/utils.h binutils-2.24/gprof/utils.h
---- binutils-2.24.orig/gprof/utils.h 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/gprof/utils.h 2016-06-30 21:26:12.773897780 +0200
-@@ -20,6 +20,7 @@
- #ifndef utils_h
- #define utils_h
-
-+extern const char *get_name (const char *name);
- extern int print_name_only (Sym * self);
- extern void print_name (Sym * self);
-
-diff -Nur binutils-2.24.orig/include/dis-asm.h binutils-2.24/include/dis-asm.h
---- binutils-2.24.orig/include/dis-asm.h 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/include/dis-asm.h 2016-06-30 21:26:12.773897780 +0200
-@@ -277,6 +277,7 @@
- extern int print_insn_moxie (bfd_vma, disassemble_info *);
- extern int print_insn_msp430 (bfd_vma, disassemble_info *);
- extern int print_insn_mt (bfd_vma, disassemble_info *);
-+extern int print_insn_nds32 (bfd_vma, disassemble_info *);
- extern int print_insn_ns32k (bfd_vma, disassemble_info *);
- extern int print_insn_openrisc (bfd_vma, disassemble_info *);
- extern int print_insn_pdp11 (bfd_vma, disassemble_info *);
-@@ -314,6 +315,7 @@
- extern void print_aarch64_disassembler_options (FILE *);
- extern void print_i386_disassembler_options (FILE *);
- extern void print_mips_disassembler_options (FILE *);
-+extern void print_nds32_disassembler_options (FILE *);
- extern void print_ppc_disassembler_options (FILE *);
- extern void print_arm_disassembler_options (FILE *);
- extern void parse_arm_disassembler_option (char *);
-@@ -323,6 +325,9 @@
- extern int get_arm_regnames (int, const char **, const char **, const char *const **);
- extern bfd_boolean aarch64_symbol_is_valid (asymbol *, struct disassemble_info *);
- extern bfd_boolean arm_symbol_is_valid (asymbol *, struct disassemble_info *);
-+extern bfd_boolean nds32_symbol_is_valid (asymbol *, struct disassemble_info *);
-+extern void nds32_add_opcode_hash_table (unsigned indx);
-+extern void disassemble_init_for_nds32 (struct disassemble_info *);
- extern void disassemble_init_powerpc (struct disassemble_info *);
-
- /* Fetch the disassembler for a given BFD, if that support is available. */
-diff -Nur binutils-2.24.orig/include/elf/nds32.h binutils-2.24/include/elf/nds32.h
---- binutils-2.24.orig/include/elf/nds32.h 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/include/elf/nds32.h 2016-06-30 21:26:12.777897935 +0200
-@@ -0,0 +1,332 @@
-+/* NDS32 ELF support for BFD.
-+ Copyright (C) 2012-2013 Free Software Foundation, Inc.
-+ Contributed by Andes Technology Corporation.
-+
-+ This file is part of BFD, the Binary File Descriptor library.
-+
-+ This program is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 3 of the License, or
-+ (at your option) any later version.
-+
-+ This program is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ You should have received a copy of the GNU General Public License
-+ along with this program; if not, write to the Free Software
-+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-+ 02110-1301, USA. */
-+
-+#ifndef _ELF_NDS32_H
-+#define _ELF_NDS32_H
-+
-+#include "elf/reloc-macros.h"
-+
-+/* Relocations. */
-+START_RELOC_NUMBERS (elf_nds32_reloc_type)
-+ RELOC_NUMBER (R_NDS32_NONE, 0)
-+ /* REL relocations. */
-+ RELOC_NUMBER (R_NDS32_16, 1)
-+ RELOC_NUMBER (R_NDS32_32, 2)
-+ RELOC_NUMBER (R_NDS32_20, 3)
-+ RELOC_NUMBER (R_NDS32_9_PCREL, 4)
-+ RELOC_NUMBER (R_NDS32_15_PCREL, 5)
-+ RELOC_NUMBER (R_NDS32_17_PCREL, 6)
-+ RELOC_NUMBER (R_NDS32_25_PCREL, 7)
-+ RELOC_NUMBER (R_NDS32_HI20, 8)
-+ RELOC_NUMBER (R_NDS32_LO12S3, 9)
-+ RELOC_NUMBER (R_NDS32_LO12S2, 10)
-+ RELOC_NUMBER (R_NDS32_LO12S1, 11)
-+ RELOC_NUMBER (R_NDS32_LO12S0, 12)
-+ RELOC_NUMBER (R_NDS32_SDA15S3, 13)
-+ RELOC_NUMBER (R_NDS32_SDA15S2, 14)
-+ RELOC_NUMBER (R_NDS32_SDA15S1, 15)
-+ RELOC_NUMBER (R_NDS32_SDA15S0, 16)
-+ RELOC_NUMBER (R_NDS32_GNU_VTINHERIT, 17)
-+ RELOC_NUMBER (R_NDS32_GNU_VTENTRY, 18)
-+
-+ /* RELA relocations. */
-+ RELOC_NUMBER (R_NDS32_16_RELA, 19)
-+ RELOC_NUMBER (R_NDS32_32_RELA, 20)
-+ RELOC_NUMBER (R_NDS32_20_RELA, 21)
-+ RELOC_NUMBER (R_NDS32_9_PCREL_RELA, 22)
-+ RELOC_NUMBER (R_NDS32_15_PCREL_RELA, 23)
-+ RELOC_NUMBER (R_NDS32_17_PCREL_RELA, 24)
-+ RELOC_NUMBER (R_NDS32_25_PCREL_RELA, 25)
-+ RELOC_NUMBER (R_NDS32_HI20_RELA, 26)
-+ RELOC_NUMBER (R_NDS32_LO12S3_RELA, 27)
-+ RELOC_NUMBER (R_NDS32_LO12S2_RELA, 28)
-+ RELOC_NUMBER (R_NDS32_LO12S1_RELA, 29)
-+ RELOC_NUMBER (R_NDS32_LO12S0_RELA, 30)
-+ RELOC_NUMBER (R_NDS32_SDA15S3_RELA, 31)
-+ RELOC_NUMBER (R_NDS32_SDA15S2_RELA, 32)
-+ RELOC_NUMBER (R_NDS32_SDA15S1_RELA, 33)
-+ RELOC_NUMBER (R_NDS32_SDA15S0_RELA, 34)
-+ RELOC_NUMBER (R_NDS32_RELA_GNU_VTINHERIT, 35)
-+ RELOC_NUMBER (R_NDS32_RELA_GNU_VTENTRY, 36)
-+
-+ RELOC_NUMBER (R_NDS32_GOT20, 37)
-+ RELOC_NUMBER (R_NDS32_25_PLTREL, 38)
-+ RELOC_NUMBER (R_NDS32_COPY, 39)
-+ RELOC_NUMBER (R_NDS32_GLOB_DAT, 40)
-+ RELOC_NUMBER (R_NDS32_JMP_SLOT, 41)
-+ RELOC_NUMBER (R_NDS32_RELATIVE, 42)
-+ RELOC_NUMBER (R_NDS32_GOTOFF, 43)
-+ RELOC_NUMBER (R_NDS32_GOTPC20, 44)
-+ RELOC_NUMBER (R_NDS32_GOT_HI20, 45)
-+ RELOC_NUMBER (R_NDS32_GOT_LO12, 46)
-+ RELOC_NUMBER (R_NDS32_GOTPC_HI20, 47)
-+ RELOC_NUMBER (R_NDS32_GOTPC_LO12, 48)
-+ RELOC_NUMBER (R_NDS32_GOTOFF_HI20, 49)
-+ RELOC_NUMBER (R_NDS32_GOTOFF_LO12, 50)
-+ RELOC_NUMBER (R_NDS32_INSN16, 51)
-+ RELOC_NUMBER (R_NDS32_LABEL, 52)
-+ RELOC_NUMBER (R_NDS32_LONGCALL1, 53)
-+ RELOC_NUMBER (R_NDS32_LONGCALL2, 54)
-+ RELOC_NUMBER (R_NDS32_LONGCALL3, 55)
-+ RELOC_NUMBER (R_NDS32_LONGJUMP1, 56)
-+ RELOC_NUMBER (R_NDS32_LONGJUMP2, 57)
-+ RELOC_NUMBER (R_NDS32_LONGJUMP3, 58)
-+ RELOC_NUMBER (R_NDS32_LOADSTORE, 59)
-+ RELOC_NUMBER (R_NDS32_9_FIXED_RELA, 60)
-+ RELOC_NUMBER (R_NDS32_15_FIXED_RELA, 61)
-+ RELOC_NUMBER (R_NDS32_17_FIXED_RELA, 62)
-+ RELOC_NUMBER (R_NDS32_25_FIXED_RELA, 63)
-+ RELOC_NUMBER (R_NDS32_PLTREL_HI20, 64) /* This is obsoleted. */
-+ RELOC_NUMBER (R_NDS32_PLTREL_LO12, 65) /* This is obsoleted. */
-+ RELOC_NUMBER (R_NDS32_PLT_GOTREL_HI20, 66)
-+ RELOC_NUMBER (R_NDS32_PLT_GOTREL_LO12, 67)
-+ RELOC_NUMBER (R_NDS32_SDA12S2_DP_RELA, 68)
-+ RELOC_NUMBER (R_NDS32_SDA12S2_SP_RELA, 69)
-+ RELOC_NUMBER (R_NDS32_LO12S2_DP_RELA, 70)
-+ RELOC_NUMBER (R_NDS32_LO12S2_SP_RELA, 71)
-+ RELOC_NUMBER (R_NDS32_LO12S0_ORI_RELA, 72)
-+ RELOC_NUMBER (R_NDS32_SDA16S3_RELA, 73)
-+ RELOC_NUMBER (R_NDS32_SDA17S2_RELA, 74)
-+ RELOC_NUMBER (R_NDS32_SDA18S1_RELA, 75)
-+ RELOC_NUMBER (R_NDS32_SDA19S0_RELA, 76)
-+ RELOC_NUMBER (R_NDS32_DWARF2_OP1_RELA, 77)
-+ RELOC_NUMBER (R_NDS32_DWARF2_OP2_RELA, 78)
-+ RELOC_NUMBER (R_NDS32_DWARF2_LEB_RELA, 79)
-+ RELOC_NUMBER (R_NDS32_UPDATE_TA_RELA, 80) /* This is obsoleted. */
-+ RELOC_NUMBER (R_NDS32_9_PLTREL, 81)
-+ RELOC_NUMBER (R_NDS32_PLT_GOTREL_LO20, 82)
-+ RELOC_NUMBER (R_NDS32_PLT_GOTREL_LO15, 83)
-+ RELOC_NUMBER (R_NDS32_PLT_GOTREL_LO19, 84)
-+ RELOC_NUMBER (R_NDS32_GOT_LO15, 85)
-+ RELOC_NUMBER (R_NDS32_GOT_LO19, 86)
-+ RELOC_NUMBER (R_NDS32_GOTOFF_LO15, 87)
-+ RELOC_NUMBER (R_NDS32_GOTOFF_LO19, 88)
-+ RELOC_NUMBER (R_NDS32_GOT15S2_RELA, 89)
-+ RELOC_NUMBER (R_NDS32_GOT17S2_RELA, 90)
-+ RELOC_NUMBER (R_NDS32_5_RELA, 91)
-+ RELOC_NUMBER (R_NDS32_10_UPCREL_RELA, 92) /* This is obsoleted. */
-+ RELOC_NUMBER (R_NDS32_SDA_FP7U2_RELA, 93)
-+ RELOC_NUMBER (R_NDS32_WORD_9_PCREL_RELA, 94)
-+ RELOC_NUMBER (R_NDS32_25_ABS_RELA, 95)
-+ RELOC_NUMBER (R_NDS32_17IFC_PCREL_RELA, 96)
-+ RELOC_NUMBER (R_NDS32_10IFCU_PCREL_RELA, 97)
-+ RELOC_NUMBER (R_NDS32_LONGCALL4, 107)
-+ RELOC_NUMBER (R_NDS32_LONGCALL5, 108)
-+ RELOC_NUMBER (R_NDS32_LONGCALL6, 109)
-+ RELOC_NUMBER (R_NDS32_LONGJUMP4, 110)
-+ RELOC_NUMBER (R_NDS32_LONGJUMP5, 111)
-+ RELOC_NUMBER (R_NDS32_LONGJUMP6, 112)
-+ RELOC_NUMBER (R_NDS32_LONGJUMP7, 113)
-+ RELOC_NUMBER (R_NDS32_SECURITY_16, 114)
-+ /* TLS support { */
-+ RELOC_NUMBER (R_NDS32_TLS_TPOFF, 102)
-+ RELOC_NUMBER (R_NDS32_TLS_LE_HI20, 98)
-+ RELOC_NUMBER (R_NDS32_TLS_LE_LO12, 99)
-+ RELOC_NUMBER (R_NDS32_TLS_LE_20, 103)
-+ RELOC_NUMBER (R_NDS32_TLS_LE_15S0, 104)
-+ RELOC_NUMBER (R_NDS32_TLS_LE_15S1, 105)
-+ RELOC_NUMBER (R_NDS32_TLS_LE_15S2, 106)
-+ RELOC_NUMBER (R_NDS32_TLS_IE_HI20, 100)
-+ RELOC_NUMBER (R_NDS32_TLS_IE_LO12, 115)
-+ RELOC_NUMBER (R_NDS32_TLS_IE_LO12S2, 101)
-+ RELOC_NUMBER (R_NDS32_TLS_IEGP_HI20, 116)
-+ RELOC_NUMBER (R_NDS32_TLS_IEGP_LO12, 117)
-+ RELOC_NUMBER (R_NDS32_TLS_IEGP_LO12S2, 118)
-+ RELOC_NUMBER (R_NDS32_TLS_DESC, 119)
-+ RELOC_NUMBER (R_NDS32_TLS_DESC_HI20, 120)
-+ RELOC_NUMBER (R_NDS32_TLS_DESC_LO12, 121)
-+ RELOC_NUMBER (R_NDS32_TLS_DESC_20, 122)
-+ RELOC_NUMBER (R_NDS32_TLS_DESC_SDA17S2, 123)
-+ /* TLS support } */
-+ /* new relocation type add here. */
-+ RELOC_NUMBER (R_NDS32_RELOC_NEXT, 124)
-+
-+ /* Jump-patch table relocations. */
-+ RELOC_NUMBER (R_NDS32_ICT_HI20, 125)
-+ RELOC_NUMBER (R_NDS32_ICT_LO12, 126)
-+ RELOC_NUMBER (R_NDS32_ICT_25PC, 127)
-+
-+ /* relax only following */
-+ RELOC_NUMBER (R_NDS32_RELAX_ENTRY, 192)
-+ RELOC_NUMBER (R_NDS32_GOT_SUFF, 193)
-+ RELOC_NUMBER (R_NDS32_GOTOFF_SUFF, 194)
-+ RELOC_NUMBER (R_NDS32_PLT_GOT_SUFF, 195)
-+ RELOC_NUMBER (R_NDS32_MULCALL_SUFF, 196) /* This is obsoleted. */
-+ RELOC_NUMBER (R_NDS32_PTR, 197)
-+ RELOC_NUMBER (R_NDS32_PTR_COUNT, 198)
-+ RELOC_NUMBER (R_NDS32_PTR_RESOLVED, 199)
-+ RELOC_NUMBER (R_NDS32_PLTBLOCK, 200) /* This is obsoleted. */
-+ RELOC_NUMBER (R_NDS32_RELAX_REGION_BEGIN, 201)
-+ RELOC_NUMBER (R_NDS32_RELAX_REGION_END, 202)
-+ RELOC_NUMBER (R_NDS32_MINUEND, 203)
-+ RELOC_NUMBER (R_NDS32_SUBTRAHEND, 204)
-+ RELOC_NUMBER (R_NDS32_DIFF8, 205)
-+ RELOC_NUMBER (R_NDS32_DIFF16, 206)
-+ RELOC_NUMBER (R_NDS32_DIFF32, 207)
-+ RELOC_NUMBER (R_NDS32_DIFF_ULEB128, 208)
-+ RELOC_NUMBER (R_NDS32_DATA, 209)
-+ RELOC_NUMBER (R_NDS32_TRAN, 210)
-+ RELOC_NUMBER (R_NDS32_EMPTY, 213)
-+ /* TLS support { */
-+ RELOC_NUMBER (R_NDS32_TLS_LE_ADD, 211)
-+ RELOC_NUMBER (R_NDS32_TLS_LE_LS, 212)
-+ RELOC_NUMBER (R_NDS32_TLS_IEGP_LW, 220)
-+ RELOC_NUMBER (R_NDS32_TLS_DESC_ADD, 214)
-+ RELOC_NUMBER (R_NDS32_TLS_DESC_FUNC, 215)
-+ RELOC_NUMBER (R_NDS32_TLS_DESC_CALL, 216)
-+ RELOC_NUMBER (R_NDS32_TLS_DESC_MEM, 217)
-+ RELOC_NUMBER (R_NDS32_RELAX_REMOVE, 218)
-+ RELOC_NUMBER (R_NDS32_RELAX_GROUP, 219)
-+ /* TLS support } */
-+ /* new relaxation type add here. */
-+ RELOC_NUMBER (R_NDS32_RELAX_NEXT, 221)
-+
-+END_RELOC_NUMBERS (R_NDS32_max)
-+
-+/* Processor specific section indices. These sections do not actually
-+ exist. Symbols with a st_shndx field corresponding to one of these
-+ values have a special meaning. */
-+
-+/* Processor specific flags for the ELF header e_flags field.
-+
-+ 31 28 27 8 7 4 3 0
-+ ---------------------------------------------
-+ | ARCH | CONFUGURAION FIELD | ABI | ELF_VER |
-+ --------------------------------------------- */
-+
-+/* Architechure definition. */
-+
-+/* 4-bit (b31-b28) nds32 architecture field.
-+ We can have up to 15 architectures; 0000 is for unknown. */
-+#define EF_NDS_ARCH 0xF0000000
-+#define EF_NDS_ARCH_SHIFT 28
-+/* There could be more architectures. For now, only n1 and n1h. */
-+#define E_NDS_ARCH_STAR_RESERVED 0x00000000
-+#define E_NDS_ARCH_STAR_V1_0 0x10000000
-+#define E_NDS_ARCH_STAR_V2_0 0x20000000
-+#define E_NDS_ARCH_STAR_V3_0 0x30000000
-+#define E_NDS_ARCH_STAR_V3_M 0x40000000
-+#define E_NDS_ARCH_STAR_V0_9 0x90000000 /* Obsoleted. */
-+/* n1 code. */
-+#define E_N1_ARCH E_NDS_ARCH_STAR_V0_9
-+/* n1h code. */
-+#define E_N1H_ARCH E_NDS_ARCH_STAR_V1_0
-+
-+
-+/* Configuration field definitioans. */
-+#define EF_NDS_INST 0x0FFFFF00
-+
-+/* E_NDS_ARCH_STAR_V1_0 configuration fields.
-+
-+ E_NDS_ARCH_STAR_V2_0 configuration fields.
-+ These are discarded in v2.
-+ * E_NDS32_HAS_MFUSR_PC_INST 0x00000100
-+ * E_NDS32_HAS_DIV_INST 0x00002000
-+ * E_NDS32_HAS_NO_MAC_INST 0x00100000
-+ These are added in v2.
-+ * E_NDS32_HAS_DIV_DX_INST 0x00002000
-+ * E_NDS32_HAS_MAC_DX_INST 0x00100000
-+
-+ */
-+
-+/* MFUSR rt, PC and correct ISYNC, MSYNC instructions.
-+ Old N1213HC has no such instructions. */
-+#define E_NDS32_HAS_MFUSR_PC_INST 0x00000100 /* Reclaimed. */
-+#define E_NDS32_HAS_EX9_INST 0x00000100 /* v3, ELF 1.4. */
-+/* C/C++ performance extension instructions. */
-+#define E_NDS32_HAS_EXT_INST 0x00000200
-+/* Performance extension set II instructions. */
-+#define E_NDS32_HAS_EXT2_INST 0x00000400
-+/* Single precision Floating point processor instructions. */
-+#define E_NDS32_HAS_FPU_INST 0x00000800
-+/* Audio instructions with 32-bit audio dx.lo register. */
-+#define E_NDS32_HAS_AUDIO_INST 0x00001000
-+/* DIV instructions. */
-+#define E_NDS32_HAS_DIV_INST 0x00002000 /* Reclaimed. */
-+/* DIV instructions using d0/d1. */
-+#define E_NDS32_HAS_DIV_DX_INST 0x00002000 /* v2. */
-+/* 16-bit instructions. */
-+#define E_NDS32_HAS_16BIT_INST 0x00004000 /* Reclaimed. */
-+#define E_NDS32_HAS_IFC_INST 0x00004000 /* v3, ELF 1.4. */
-+/* String operation instructions. */
-+#define E_NDS32_HAS_STRING_INST 0x00008000
-+/* Reduced register file. */
-+#define E_NDS32_HAS_REDUCED_REGS 0x00010000
-+/* Video instructions. */
-+#define E_NDS32_HAS_VIDEO_INST 0x00020000 /* Reclaimed. */
-+#define E_NDS32_HAS_SATURATION_INST 0x00020000 /* v3, ELF 1.4. */
-+/* Encription instructions. */
-+#define E_NDS32_HAS_ENCRIPT_INST 0x00040000
-+/* Doulbe Precision Floating point processor instructions. */
-+#define E_NDS32_HAS_FPU_DP_INST 0x00080000
-+/* No MAC instruction used. */
-+#define E_NDS32_HAS_NO_MAC_INST 0x00100000 /* Reclaimed when V2/V3. */
-+/* MAC instruction using d0/d1. */
-+#define E_NDS32_HAS_MAC_DX_INST 0x00100000 /* v2. */
-+/* L2 cache instruction. */
-+#define E_NDS32_HAS_L2C_INST 0x00200000
-+/* FPU registers configuration when FPU SP/DP presents; 0x00c00000. */
-+#define E_NDS32_FPU_REG_CONF_SHIFT 22
-+#define E_NDS32_FPU_REG_CONF (0x3 << E_NDS32_FPU_REG_CONF_SHIFT)
-+#define E_NDS32_FPU_REG_8SP_4DP 0x0
-+#define E_NDS32_FPU_REG_16SP_8DP 0x1
-+#define E_NDS32_FPU_REG_32SP_16DP 0x2
-+#define E_NDS32_FPU_REG_32SP_32DP 0x3
-+/* FPU MAC instruction used. */
-+#define E_NDS32_HAS_FPU_MAC_INST 0x01000000
-+/* DSP extension. */
-+#define E_NDS32_HAS_DSP_INST 0x02000000
-+/* Hardware zero-overhead loop enabled. */
-+#define E_NDS32_HAS_ZOL (1 << 26)
-+/* Use custom section. */
-+#define E_NDS32_HAS_CUSTOM_SEC 0x08000000
-+
-+/* 4-bit for ABI signature, allow up to 16 ABIs
-+ 0: for OLD ABI V0, phase out
-+ 1: for V1 , starting with V0 toolchain
-+ 2: for V2
-+ 3: for V2FP (fs0, fs1 as function parameter)
-+ 4: for AABI */
-+/* Only old N1213HC use V0.
-+ New ABI is used due to return register is changed to r0 from r5. */
-+#define EF_NDS_ABI 0x000000F0
-+#define EF_NDS_ABI_SHIFT 4
-+#define E_NDS_ABI_V0 0x00000000
-+#define E_NDS_ABI_V1 0x00000010
-+#define E_NDS_ABI_V2 0x00000020
-+#define E_NDS_ABI_V2FP 0x00000030
-+#define E_NDS_ABI_AABI 0x00000040
-+#define E_NDS_ABI_V2FP_PLUS 0x00000050
-+
-+/* This flag signifies the version of Andes ELF.
-+ Some more information may exist somewhere which is TBD. */
-+#define EF_NDS32_ELF_VERSION 0x0000000F
-+#define EF_NDS32_ELF_VERSION_SHIFT 0
-+
-+/* Andes ELF Version 1.3 and before. */
-+#define E_NDS32_ELF_VER_1_2 0x0
-+/* Andes ELF Version 1.31. */
-+#define E_NDS32_ELF_VER_1_3 0x1
-+/* Andes ELF Version 1.4. Change the way we fix .debug_* and .gcc_except_table.
-+ Change three bit for EX9, IFC and SAT. */
-+#define E_NDS32_ELF_VER_1_4 0x2
-+
-+#endif
-diff -Nur binutils-2.24.orig/include/opcode/nds32.h binutils-2.24/include/opcode/nds32.h
---- binutils-2.24.orig/include/opcode/nds32.h 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/include/opcode/nds32.h 2016-06-30 21:26:12.777897935 +0200
-@@ -0,0 +1,989 @@
-+/* nds32.h -- Header file for nds32 opcode table
-+ Copyright (C) 2012-2013 Free Software Foundation, Inc.
-+ Contributed by Andes Technology Corporation.
-+
-+ This program is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 3, or (at your option)
-+ any later version.
-+
-+ This program is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ You should have received a copy of the GNU General Public License
-+ along with this program; if not, write to the Free Software
-+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-+ 02110-1301, USA. */
-+
-+#ifndef OPCODE_NDS32_H
-+#define OPCODE_NDS32_H
-+
-+/* Registers. */
-+#define REG_R0 (0)
-+#define REG_R5 (5)
-+#define REG_R8 (8)
-+#define REG_R10 (10)
-+#define REG_R12 (12)
-+#define REG_R15 (15)
-+#define REG_R16 (16)
-+#define REG_R20 (20)
-+#define REG_TA (15)
-+#define REG_TP (25)
-+#define REG_FP (28)
-+#define REG_GP (29)
-+#define REG_LP (30)
-+#define REG_SP (31)
-+
-+/*
-+ * Macros for extracting fields or making an instruction.
-+ */
-+static const int nds32_r45map[] ATTRIBUTE_UNUSED = {
-+ 0, 1, 2, 3, 4, 5, 6, 7,
-+ 8, 9, 10, 11, 16, 17, 18, 19
-+};
-+
-+static const int nds32_r54map[] ATTRIBUTE_UNUSED = {
-+ 0, 1, 2, 3, 4, 5, 6, 7,
-+ 8, 9, 10, 11, -1, -1, -1, -1,
-+ 12, 13, 14, 15, -1, -1, -1, -1,
-+ -1, -1, -1, -1, -1, -1, -1, -1
-+};
-+
-+#define __BIT(n) (1 << (n))
-+#define __MASK(n) (__BIT (n) - 1)
-+#define __MF(v, off, bs) (((v) & __MASK (bs)) << (off))
-+#define __GF(v, off, bs) (((v) >> off) & __MASK (bs))
-+#define __SEXT(v, bs) ((((v) & ((1 << (bs)) - 1)) ^ (1 << ((bs) - 1))) - (1 << ((bs) - 1)))
-+
-+/* Make nds32 instructions. */
-+
-+#define N32_TYPE4(op6, rt5, ra5, rb5, rd5, sub5) \
-+ (__MF (N32_OP6_##op6, 25, 6) | __MF (rt5, 20, 5) \
-+ | __MF (ra5, 15, 5) | __MF (rb5, 10, 5) \
-+ | __MF (rd5, 5, 5) | __MF (sub5, 0, 5))
-+#define N32_TYPE3(op6, rt5, ra5, rb5, sub10) \
-+ (N32_TYPE4 (op6, rt5, ra5, rb5, 0, 0) \
-+ | __MF (sub10, 0, 10))
-+#define N32_TYPE2(op6, rt5, ra5, imm15) \
-+ (N32_TYPE3 (op6, rt5, ra5, 0, 0) | __MF (imm15, 0, 15))
-+#define N32_TYPE1(op6, rt5, imm20) \
-+ (N32_TYPE2 (op6, rt5, 0, 0) | __MF (imm20, 0, 20))
-+#define N32_TYPE0(op6, imm25) \
-+ (N32_TYPE1 (op6, 0, 0) | __MF (imm25, 0, 25))
-+#define N32_ALU1(sub, rt, ra, rb) \
-+ N32_TYPE4 (ALU1, rt, ra, rb, 0, N32_ALU1_##sub)
-+#define N32_ALU1_SH(sub, rt, ra, rb, rd) \
-+ N32_TYPE4 (ALU1, rt, ra, rb, rd, N32_ALU1_##sub)
-+#define N32_ALU2(sub, rt, ra, rb) \
-+ N32_TYPE3 (ALU2, rt, ra, rb, N32_ALU2_##sub)
-+#define N32_BR1(sub, rt, ra, imm14s) \
-+ N32_TYPE2 (BR1, rt, ra, (N32_BR1_##sub << 14) | (imm14s & __MASK (14)))
-+#define N32_BR2(sub, rt, imm16s) \
-+ N32_TYPE1 (BR2, rt, (N32_BR2_##sub << 16) | (imm16s & __MASK (16)))
-+#define N32_BR3(sub, rt, imm11s, imm8s) \
-+ N32_TYPE1 (BR3, rt, (N32_BR3_##sub << 19) \
-+ | ((imm11s & __MASK (11)) << 8) \
-+ | (imm8s & __MASK (8)))
-+#define N32_JI(sub, imm24s) \
-+ N32_TYPE0 (JI, (N32_JI_##sub << 24) | (imm24s & __MASK (24)))
-+#define N32_JREG(sub, rt, rb, dtit, hint) \
-+ N32_TYPE4(JREG, rt, 0, rb, (dtit << 3) | (hint & 7), N32_JREG_##sub)
-+#define N32_MEM(sub, rt, ra, rb, sv) \
-+ N32_TYPE3 (MEM, rt, ra, rb, (sv << 8) | N32_MEM_##sub)
-+
-+#define N16_TYPE55(op5, rt5, ra5) \
-+ (0x8000 | __MF (N16_T55_##op5, 10, 5) | __MF (rt5, 5, 5) \
-+ | __MF (ra5, 0, 5))
-+#define N16_TYPE45(op6, rt4, ra5) \
-+ (0x8000 | __MF (N16_T45_##op6, 9, 6) | __MF (rt4, 5, 4) \
-+ | __MF (ra5, 0, 5))
-+#define N16_TYPE333(op6, rt3, ra3, rb3) \
-+ (0x8000 | __MF (N16_T333_##op6, 9, 6) | __MF (rt3, 6, 3) \
-+ | __MF (ra3, 3, 3) | __MF (rb3, 0, 3))
-+#define N16_TYPE36(op6, rt3, imm6) \
-+ (0x8000 | __MF (N16_T36_##op6, 9, 6) | __MF (rt3, 6, 3) \
-+ | __MF (imm6, 0, 6))
-+#define N16_TYPE38(op4, rt3, imm8) \
-+ (0x8000 | __MF (N16_T38_##op4, 11, 4) | __MF (rt3, 8, 3) \
-+ | __MF (imm8, 0, 8))
-+#define N16_TYPE37(op4, rt3, ls, imm7) \
-+ (0x8000 | __MF (N16_T37_##op4, 11, 4) | __MF (rt3, 8, 3) \
-+ | __MF (imm7, 0, 7) | __MF (ls, 7, 1))
-+#define N16_TYPE5(op10, imm5) \
-+ (0x8000 | __MF (N16_T5_##op10, 5, 10) | __MF (imm5, 0, 5))
-+#define N16_TYPE8(op7, imm8) \
-+ (0x8000 | __MF (N16_T8_##op7, 8, 7) | __MF (imm8, 0, 8))
-+#define N16_TYPE9(op6, imm9) \
-+ (0x8000 | __MF (N16_T9_##op6, 9, 6) | __MF (imm9, 0, 9))
-+#define N16_TYPE10(op5, imm10) \
-+ (0x8000 | __MF (N16_T10_##op5, 10, 5) | __MF (imm10, 0, 10))
-+#define N16_TYPE25(op8, re, imm5) \
-+ (0x8000 | __MF (N16_T25_##op8, 7, 8) | __MF (re, 5, 2) \
-+ | __MF (imm5, 0, 5))
-+
-+#define N16_MISC33(sub, rt, ra) \
-+ N16_TYPE333 (MISC33, rt, ra, N16_MISC33_##sub)
-+#define N16_BFMI333(sub, rt, ra) \
-+ N16_TYPE333 (BFMI333, rt, ra, N16_BFMI333_##sub)
-+
-+/* Get instruction fields.
-+
-+ Macros used for handling 32-bit and 16-bit instructions are
-+ prefixed with N32_ and N16_ respectively. */
-+
-+#define N32_OP6(insn) (((insn) >> 25) & 0x3f)
-+#define N32_RT5(insn) (((insn) >> 20) & 0x1f)
-+#define N32_RT53(insn) (N32_RT5 (insn) & 0x7)
-+#define N32_RT54(insn) nds32_r54map[N32_RT5 (insn)]
-+#define N32_RA5(insn) (((insn) >> 15) & 0x1f)
-+#define N32_RA53(insn) (N32_RA5 (insn) & 0x7)
-+#define N32_RA54(insn) nds32_r54map[N32_RA5 (insn)]
-+#define N32_RB5(insn) (((insn) >> 10) & 0x1f)
-+#define N32_UB5(insn) (((insn) >> 10) & 0x1f)
-+#define N32_RB53(insn) (N32_RB5 (insn) & 0x7)
-+#define N32_RB54(insn) nds32_r54map[N32_RB5 (insn)]
-+#define N32_RD5(insn) (((insn) >> 5) & 0x1f)
-+#define N32_SH5(insn) (((insn) >> 5) & 0x1f)
-+#define N32_SUB5(insn) (((insn) >> 0) & 0x1f)
-+#define N32_SUB6(insn) (((insn) >> 0) & 0x3f)
-+#define N32_SWID(insn) (((insn) >> 5) & 0x3ff)
-+#define N32_IMMU(insn, bs) ((insn) & __MASK (bs))
-+#define N32_IMMS(insn, bs) ((signed) __SEXT (((insn) & __MASK (bs)), bs))
-+#define N32_IMM5U(insn) N32_IMMU (insn, 5)
-+#define N32_IMM12S(insn) N32_IMMS (insn, 12)
-+#define N32_IMM14S(insn) N32_IMMS (insn, 14)
-+#define N32_IMM15U(insn) N32_IMMU (insn, 15)
-+#define N32_IMM15S(insn) N32_IMMS (insn, 15)
-+#define N32_IMM16S(insn) N32_IMMS (insn, 16)
-+#define N32_IMM17S(insn) N32_IMMS (insn, 17)
-+#define N32_IMM20S(insn) N32_IMMS (insn, 20)
-+#define N32_IMM20U(insn) N32_IMMU (insn, 20)
-+#define N32_IMM24S(insn) N32_IMMS (insn, 24)
-+
-+#define N16_RT5(insn) (((insn) >> 5) & 0x1f)
-+#define N16_RT4(insn) nds32_r45map[(((insn) >> 5) & 0xf)]
-+#define N16_RT3(insn) (((insn) >> 6) & 0x7)
-+#define N16_RT38(insn) (((insn) >> 8) & 0x7)
-+#define N16_RT8(insn) (((insn) >> 8) & 0x7)
-+#define N16_RA5(insn) ((insn) & 0x1f)
-+#define N16_RA3(insn) (((insn) >> 3) & 0x7)
-+#define N16_RB3(insn) ((insn) & 0x7)
-+#define N16_IMM3U(insn) N32_IMMU (insn, 3)
-+#define N16_IMM5U(insn) N32_IMMU (insn, 5)
-+#define N16_IMM5S(insn) N32_IMMS (insn, 5)
-+#define N16_IMM6U(insn) N32_IMMU (insn, 6)
-+#define N16_IMM7U(insn) N32_IMMU (insn, 7)
-+#define N16_IMM8S(insn) N32_IMMS (insn, 8)
-+#define N16_IMM9U(insn) N32_IMMU (insn, 9)
-+#define N16_IMM10S(insn) N32_IMMS (insn, 10)
-+
-+#define IS_WITHIN_U(v, n) (((v) >> n) == 0)
-+#define IS_WITHIN_S(v, n) IS_WITHIN_U ((v) + (1 << ((n) - 1)), n)
-+
-+/* Get fields for specific instruction. */
-+#define N32_JREG_T(insn) (((insn) >> 8) & 0x3)
-+#define N32_JREG_HINT(insn) (((insn) >> 5) & 0x7)
-+#define N32_BR2_SUB(insn) (((insn) >> 16) & 0xf)
-+#define N32_COP_SUB(insn) ((insn) & 0xf)
-+#define N32_COP_CP(insn) (((insn) >> 4) & 0x3)
-+
-+/* Check fields. */
-+#define N32_IS_RT3(insn) (N32_RT5 (insn) < 8)
-+#define N32_IS_RA3(insn) (N32_RA5 (insn) < 8)
-+#define N32_IS_RB3(insn) (N32_RB5 (insn) < 8)
-+#define N32_IS_RT4(insn) (nds32_r54map[N32_RT5 (insn)] != -1)
-+#define N32_IS_RA4(insn) (nds32_r54map[N32_RA5 (insn)] != -1)
-+#define N32_IS_RB4(insn) (nds32_r54map[N32_RB5 (insn)] != -1)
-+
-+
-+/* These are opcodes for Nxx_TYPE macros.
-+ They are prefixed by corresponding TYPE to avoid misusing.*/
-+
-+enum n32_opcodes
-+{
-+ /* Main opcodes (OP6). */
-+
-+ N32_OP6_LBI = 0x0,
-+ N32_OP6_LHI,
-+ N32_OP6_LWI,
-+ N32_OP6_LDI,
-+ N32_OP6_LBI_BI,
-+ N32_OP6_LHI_BI,
-+ N32_OP6_LWI_BI,
-+ N32_OP6_LDI_BI,
-+
-+ N32_OP6_SBI = 0x8,
-+ N32_OP6_SHI,
-+ N32_OP6_SWI,
-+ N32_OP6_SDI,
-+ N32_OP6_SBI_BI,
-+ N32_OP6_SHI_BI,
-+ N32_OP6_SWI_BI,
-+ N32_OP6_SDI_BI,
-+
-+ N32_OP6_LBSI = 0x10,
-+ N32_OP6_LHSI,
-+ N32_OP6_LWSI,
-+ N32_OP6_DPREFI,
-+ N32_OP6_LBSI_BI,
-+ N32_OP6_LHSI_BI,
-+ N32_OP6_LWSI_BI,
-+ N32_OP6_LBGP,
-+
-+ N32_OP6_LWC = 0x18,
-+ N32_OP6_SWC,
-+ N32_OP6_LDC,
-+ N32_OP6_SDC,
-+ N32_OP6_MEM,
-+ N32_OP6_LSMW,
-+ N32_OP6_HWGP,
-+ N32_OP6_SBGP,
-+
-+ N32_OP6_ALU1 = 0x20,
-+ N32_OP6_ALU2,
-+ N32_OP6_MOVI,
-+ N32_OP6_SETHI,
-+ N32_OP6_JI,
-+ N32_OP6_JREG,
-+ N32_OP6_BR1,
-+ N32_OP6_BR2,
-+
-+ N32_OP6_ADDI = 0x28,
-+ N32_OP6_SUBRI,
-+ N32_OP6_ANDI,
-+ N32_OP6_XORI,
-+ N32_OP6_ORI,
-+ N32_OP6_BR3,
-+ N32_OP6_SLTI,
-+ N32_OP6_SLTSI,
-+
-+ N32_OP6_AEXT = 0x30,
-+ N32_OP6_CEXT,
-+ N32_OP6_MISC,
-+ N32_OP6_BITCI,
-+ N32_OP6_0x34,
-+ N32_OP6_COP,
-+ N32_OP6_0x36,
-+ N32_OP6_0x37,
-+
-+ N32_OP6_SIMD = 0x38,
-+
-+ /* Sub-opcodes of specific opcode. */
-+
-+ /* bit-24 */
-+ N32_BR1_BEQ = 0,
-+ N32_BR1_BNE = 1,
-+
-+ /* bit[16:19] */
-+ N32_BR2_SOP0 = 0,
-+ N32_BR2_BEQZ = 2,
-+ N32_BR2_BNEZ = 3,
-+ N32_BR2_BGEZ = 4,
-+ N32_BR2_BLTZ = 5,
-+ N32_BR2_BGTZ = 6,
-+ N32_BR2_BLEZ = 7,
-+ N32_BR2_BGEZAL = 0xc,
-+ N32_BR2_BLTZAL = 0xd,
-+
-+ /* bit-19 */
-+ N32_BR3_BEQC = 0,
-+ N32_BR3_BNEC = 1,
-+
-+ /* bit-24 */
-+ N32_JI_J = 0,
-+ N32_JI_JAL = 1,
-+
-+ /* bit[0:4] */
-+ N32_JREG_JR = 0,
-+ N32_JREG_JRAL = 1,
-+ N32_JREG_JRNEZ = 2,
-+ N32_JREG_JRALNEZ = 3,
-+
-+ /* bit[0:4] */
-+ N32_ALU1_ADD_SLLI = 0x0,
-+ N32_ALU1_SUB_SLLI,
-+ N32_ALU1_AND_SLLI,
-+ N32_ALU1_XOR_SLLI,
-+ N32_ALU1_OR_SLLI,
-+ N32_ALU1_ADD = 0x0,
-+ N32_ALU1_SUB,
-+ N32_ALU1_AND,
-+ N32_ALU1_XOR,
-+ N32_ALU1_OR,
-+ N32_ALU1_NOR,
-+ N32_ALU1_SLT,
-+ N32_ALU1_SLTS,
-+ N32_ALU1_SLLI = 0x8,
-+ N32_ALU1_SRLI,
-+ N32_ALU1_SRAI,
-+ N32_ALU1_ROTRI,
-+ N32_ALU1_SLL,
-+ N32_ALU1_SRL,
-+ N32_ALU1_SRA,
-+ N32_ALU1_ROTR,
-+ N32_ALU1_SEB = 0x10,
-+ N32_ALU1_SEH,
-+ N32_ALU1_BITC,
-+ N32_ALU1_ZEH,
-+ N32_ALU1_WSBH,
-+ N32_ALU1_OR_SRLI,
-+ N32_ALU1_DIVSR,
-+ N32_ALU1_DIVR,
-+ N32_ALU1_SVA = 0x18,
-+ N32_ALU1_SVS,
-+ N32_ALU1_CMOVZ,
-+ N32_ALU1_CMOVN,
-+ N32_ALU1_ADD_SRLI,
-+ N32_ALU1_SUB_SRLI,
-+ N32_ALU1_AND_SRLI,
-+ N32_ALU1_XOR_SRLI,
-+
-+ /* bit[0:5], where bit[6:9] == 0 */
-+ N32_ALU2_MAX = 0,
-+ N32_ALU2_MIN,
-+ N32_ALU2_AVE,
-+ N32_ALU2_ABS,
-+ N32_ALU2_CLIPS,
-+ N32_ALU2_CLIP,
-+ N32_ALU2_CLO,
-+ N32_ALU2_CLZ,
-+ N32_ALU2_BSET = 0x8,
-+ N32_ALU2_BCLR,
-+ N32_ALU2_BTGL,
-+ N32_ALU2_BTST,
-+ N32_ALU2_BSE,
-+ N32_ALU2_BSP,
-+ N32_ALU2_FFB,
-+ N32_ALU2_FFMISM,
-+ N32_ALU2_ADD_SC = 0x10,
-+ N32_ALU2_SUB_SC,
-+ N32_ALU2_ADD_WC,
-+ N32_ALU2_SUB_WC,
-+ N32_ALU2_KMxy,
-+ N32_ALU2_0x15,
-+ N32_ALU2_0x16,
-+ N32_ALU2_FFZMISM,
-+ N32_ALU2_KADD = 0x18,
-+ N32_ALU2_KSUB,
-+ N32_ALU2_KSLRAW,
-+ N32_ALU2_KSLRAWu,
-+ N32_ALU2_MFUSR = 0x20,
-+ N32_ALU2_MTUSR,
-+ N32_ALU2_0x22,
-+ N32_ALU2_0x23,
-+ N32_ALU2_MUL,
-+ N32_ALU2_0x25,
-+ N32_ALU2_0x26,
-+ N32_ALU2_MULTS64 = 0x28,
-+ N32_ALU2_MULT64,
-+ N32_ALU2_MADDS64,
-+ N32_ALU2_MADD64,
-+ N32_ALU2_MSUBS64,
-+ N32_ALU2_MSUB64,
-+ N32_ALU2_DIVS,
-+ N32_ALU2_DIV,
-+ N32_ALU2_ADD64 = 0x30,
-+ N32_ALU2_MULT32,
-+ N32_ALU2_SMAL,
-+ N32_ALU2_MADD32,
-+ N32_ALU2_SUB64,
-+ N32_ALU2_MSUB32,
-+ N32_ALU2_0x36,
-+ N32_ALU2_0x37,
-+ N32_ALU2_RADD64 = 0x38,
-+ N32_ALU2_URADD64,
-+ N32_ALU2_KADD64,
-+ N32_ALU2_UKADD64,
-+ N32_ALU2_RSUB64,
-+ N32_ALU2_URSUB64,
-+ N32_ALU2_KSUB64,
-+ N32_ALU2_UKSUB64,
-+
-+ /* bit[0:5], where bit[6:9] = 0001 */
-+ N32_ALU2_SMAR64 = 0x0,
-+ N32_ALU2_UMAR64,
-+ N32_ALU2_SMSR64,
-+ N32_ALU2_UMSR64,
-+ N32_ALU2_KMAR64,
-+ N32_ALU2_UKMAR64,
-+ N32_ALU2_KMSR64,
-+ N32_ALU2_UKMSR64,
-+ N32_ALU2_SMALDA = 0x8,
-+ N32_ALU2_SMSLDA,
-+ N32_ALU2_SMALDS,
-+ N32_ALU2_SMALBB,
-+ N32_ALU2_FFBI = 0xe,
-+ N32_ALU2_FLMISM = 0xf,
-+ N32_ALU2_SMALXDA = 0x10,
-+ N32_ALU2_SMSLXDA,
-+ N32_ALU2_SMALXDS,
-+ N32_ALU2_SMALBT,
-+ N32_ALU2_SMALDRS = 0x1a,
-+ N32_ALU2_SMALTT,
-+ N32_ALU2_RDOV = 0x20,
-+ N32_ALU2_CLROV,
-+ N32_ALU2_MULSR64 = 0x28,
-+ N32_ALU2_MULR64 = 0x29,
-+ N32_ALU2_SMDS = 0x30,
-+ N32_ALU2_SMXDS,
-+ N32_ALU2_SMDRS,
-+ N32_ALU2_MADDR32,
-+ N32_ALU2_KMADRS,
-+ N32_ALU2_MSUBR32,
-+ N32_ALU2_KMADS,
-+ N32_ALU2_KMAXDS,
-+
-+ /* bit[0:5], where bit[6:9] = 0010 */
-+ N32_ALU2_KADD16 = 0x0,
-+ N32_ALU2_KSUB16,
-+ N32_ALU2_KCRAS16,
-+ N32_ALU2_KCRSA16,
-+ N32_ALU2_KADD8,
-+ N32_ALU2_KSUB8,
-+ N32_ALU2_WEXT,
-+ N32_ALU2_WEXTI,
-+ N32_ALU2_UKADD16 = 0x8,
-+ N32_ALU2_UKSUB16,
-+ N32_ALU2_UKCRAS16,
-+ N32_ALU2_UKCRSA16,
-+ N32_ALU2_UKADD8,
-+ N32_ALU2_UKSUB8,
-+ N32_ALU2_ONEOP = 0xf,
-+ N32_ALU2_SMBB = 0x10,
-+ N32_ALU2_SMBT,
-+ N32_ALU2_SMTT,
-+ N32_ALU2_KMABB = 0x15,
-+ N32_ALU2_KMABT,
-+ N32_ALU2_KMATT,
-+ N32_ALU2_KMDA = 0x18,
-+ N32_ALU2_KMXDA,
-+ N32_ALU2_KMADA,
-+ N32_ALU2_KMAXDA,
-+ N32_ALU2_KMSDA,
-+ N32_ALU2_KMSXDA,
-+ N32_ALU2_RADD16 = 0x20,
-+ N32_ALU2_RSUB16,
-+ N32_ALU2_RCRAS16,
-+ N32_ALU2_RCRSA16,
-+ N32_ALU2_RADD8,
-+ N32_ALU2_RSUB8,
-+ N32_ALU2_RADDW,
-+ N32_ALU2_RSUBW,
-+ N32_ALU2_URADD16 = 0x28,
-+ N32_ALU2_URSUB16,
-+ N32_ALU2_URCRAS16,
-+ N32_ALU2_URCRSA16,
-+ N32_ALU2_URADD8,
-+ N32_ALU2_URSUB8,
-+ N32_ALU2_URADDW,
-+ N32_ALU2_URSUBW,
-+ N32_ALU2_ADD16 = 0x30,
-+ N32_ALU2_SUB16,
-+ N32_ALU2_CRAS16,
-+ N32_ALU2_CRSA16,
-+ N32_ALU2_ADD8,
-+ N32_ALU2_SUB8,
-+ N32_ALU2_BITREV,
-+ N32_ALU2_BITREVI,
-+ N32_ALU2_SMMUL = 0x38,
-+ N32_ALU2_SMMULu,
-+ N32_ALU2_KMMAC,
-+ N32_ALU2_KMMACu,
-+ N32_ALU2_KMMSB,
-+ N32_ALU2_KMMSBu,
-+ N32_ALU2_KWMMUL,
-+ N32_ALU2_KWMMULu,
-+
-+ /* bit[0:5], where bit[6:9] = 0011 */
-+ N32_ALU2_SMMWB = 0x0,
-+ N32_ALU2_SMMWBu,
-+ N32_ALU2_SMMWT,
-+ N32_ALU2_SMMWTu,
-+ N32_ALU2_KMMAWB,
-+ N32_ALU2_KMMAWBu,
-+ N32_ALU2_KMMAWT,
-+ N32_ALU2_KMMAWTu,
-+ N32_ALU2_PKTT16 = 0x8,
-+ N32_ALU2_PKTB16,
-+ N32_ALU2_PKBT16,
-+ N32_ALU2_PKBB16,
-+ N32_ALU2_0x10 = 0x10,
-+ N32_ALU2_SCLIP16,
-+ N32_ALU2_0x12,
-+ N32_ALU2_SMAX16,
-+ N32_ALU2_SMAX8 = 0x17,
-+ N32_ALU2_0x18 = 0x18,
-+ N32_ALU2_UCLIP16,
-+ N32_ALU2_0x1a,
-+ N32_ALU2_UMAX16,
-+ N32_ALU2_UMAX8 = 0x1f,
-+ N32_ALU2_SRA16 = 0x20,
-+ N32_ALU2_SRA16u,
-+ N32_ALU2_SRL16,
-+ N32_ALU2_SRL16u,
-+ N32_ALU2_SLL16,
-+ N32_ALU2_KSLRA16,
-+ N32_ALU2_KSLRA16u,
-+ N32_ALU2_SRAu,
-+ N32_ALU2_SRAI16 = 0x28,
-+ N32_ALU2_SRAI16u,
-+ N32_ALU2_SRLI16,
-+ N32_ALU2_SRLI16u,
-+ N32_ALU2_SLLI16,
-+ N32_ALU2_KSLLI16,
-+ N32_ALU2_KSLLI,
-+ N32_ALU2_SRAIu,
-+ N32_ALU2_CMPEQ16 = 0x30,
-+ N32_ALU2_SCMPLT16,
-+ N32_ALU2_SCMPLE16,
-+ N32_ALU2_SMIN16,
-+ N32_ALU2_CMPEQ8,
-+ N32_ALU2_SCMPLT8,
-+ N32_ALU2_SCMPLE8,
-+ N32_ALU2_SMIN8,
-+ N32_ALU2_0x38,
-+ N32_ALU2_UCMPLT16 = 0x39,
-+ N32_ALU2_UCMPLE16,
-+ N32_ALU2_UMIN16,
-+ N32_ALU2_0x3c,
-+ N32_ALU2_UCMPLT8,
-+ N32_ALU2_UCMPLE8,
-+ N32_ALU2_UMIN8,
-+
-+ /* bit[0:5] */
-+ N32_MEM_LB = 0,
-+ N32_MEM_LH,
-+ N32_MEM_LW,
-+ N32_MEM_LD,
-+ N32_MEM_LB_BI,
-+ N32_MEM_LH_BI,
-+ N32_MEM_LW_BI,
-+ N32_MEM_LD_BI,
-+ N32_MEM_SB,
-+ N32_MEM_SH,
-+ N32_MEM_SW,
-+ N32_MEM_SD,
-+ N32_MEM_SB_BI,
-+ N32_MEM_SH_BI,
-+ N32_MEM_SW_BI,
-+ N32_MEM_SD_BI,
-+ N32_MEM_LBS,
-+ N32_MEM_LHS,
-+ N32_MEM_LWS, /* Not used. */
-+ N32_MEM_DPREF,
-+ N32_MEM_LBS_BI,
-+ N32_MEM_LHS_BI,
-+ N32_MEM_LWS_BI, /* Not used. */
-+ N32_MEM_0x17, /* Not used. */
-+ N32_MEM_LLW,
-+ N32_MEM_SCW,
-+ N32_MEM_LBUP = 0x20,
-+ N32_MEM_LWUP = 0x22,
-+ N32_MEM_SBUP = 0x28,
-+ N32_MEM_SWUP = 0x2a,
-+
-+ /* bit[0:1] */
-+ N32_LSMW_LSMW = 0,
-+ N32_LSMW_LSMWA,
-+ N32_LSMW_LSMWZB,
-+
-+ /* bit[2:4] */
-+ N32_LSMW_BI = 0,
-+ N32_LSMW_BIM,
-+ N32_LSMW_BD,
-+ N32_LSMW_BDM,
-+ N32_LSMW_AI,
-+ N32_LSMW_AIM,
-+ N32_LSMW_AD,
-+ N32_LSMW_ADM,
-+
-+ /* bit[0:4] */
-+ N32_MISC_STANDBY = 0,
-+ N32_MISC_CCTL,
-+ N32_MISC_MFSR,
-+ N32_MISC_MTSR,
-+ N32_MISC_IRET,
-+ N32_MISC_TRAP,
-+ N32_MISC_TEQZ,
-+ N32_MISC_TNEZ,
-+ N32_MISC_DSB = 0x8,
-+ N32_MISC_ISB,
-+ N32_MISC_BREAK,
-+ N32_MISC_SYSCALL,
-+ N32_MISC_MSYNC,
-+ N32_MISC_ISYNC,
-+ N32_MISC_TLBOP,
-+ N32_MISC_SPECL,
-+ N32_MISC_BPICK = 0x10,
-+
-+ /* bit[0:4] */
-+ N32_SIMD_PBSAD = 0,
-+ N32_SIMD_PBSADA = 1,
-+
-+ /* bit[0:3] */
-+ N32_COP_CPE1 = 0,
-+ N32_COP_MFCP,
-+ N32_COP_CPLW,
-+ N32_COP_CPLD,
-+ N32_COP_CPE2,
-+ N32_COP_CPE3 = 8,
-+ N32_COP_MTCP,
-+ N32_COP_CPSW,
-+ N32_COP_CPSD,
-+ N32_COP_CPE4,
-+
-+ /* cop/0 b[3:0] */
-+ N32_FPU_FS1 = 0,
-+ N32_FPU_MFCP,
-+ N32_FPU_FLS,
-+ N32_FPU_FLD,
-+ N32_FPU_FS2,
-+ N32_FPU_FD1 = 8,
-+ N32_FPU_MTCP,
-+ N32_FPU_FSS,
-+ N32_FPU_FSD,
-+ N32_FPU_FD2,
-+
-+ /* FS1 b[9:6] */
-+ N32_FPU_FS1_FADDS = 0,
-+ N32_FPU_FS1_FSUBS,
-+ N32_FPU_FS1_FCPYNSS,
-+ N32_FPU_FS1_FCPYSS,
-+ N32_FPU_FS1_FMADDS,
-+ N32_FPU_FS1_FMSUBS,
-+ N32_FPU_FS1_FCMOVNS,
-+ N32_FPU_FS1_FCMOVZS,
-+ N32_FPU_FS1_FNMADDS,
-+ N32_FPU_FS1_FNMSUBS,
-+ N32_FPU_FS1_10,
-+ N32_FPU_FS1_11,
-+ N32_FPU_FS1_FMULS = 12,
-+ N32_FPU_FS1_FDIVS,
-+ N32_FPU_FS1_14,
-+ N32_FPU_FS1_F2OP = 15,
-+
-+ /* FS1/F2OP b[14:10] */
-+ N32_FPU_FS1_F2OP_FS2D = 0x00,
-+ N32_FPU_FS1_F2OP_FSQRTS = 0x01,
-+ N32_FPU_FS1_F2OP_FABSS = 0x05,
-+ N32_FPU_FS1_F2OP_FUI2S = 0x08,
-+ N32_FPU_FS1_F2OP_FSI2S = 0x0c,
-+ N32_FPU_FS1_F2OP_FS2UI = 0x10,
-+ N32_FPU_FS1_F2OP_FS2UI_Z = 0x14,
-+ N32_FPU_FS1_F2OP_FS2SI = 0x18,
-+ N32_FPU_FS1_F2OP_FS2SI_Z = 0x1c,
-+
-+ /* FS2 b[9:6] */
-+ N32_FPU_FS2_FCMPEQS = 0x0,
-+ N32_FPU_FS2_FCMPLTS = 0x2,
-+ N32_FPU_FS2_FCMPLES = 0x4,
-+ N32_FPU_FS2_FCMPUNS = 0x6,
-+ N32_FPU_FS2_FCMPEQS_E = 0x1,
-+ N32_FPU_FS2_FCMPLTS_E = 0x3,
-+ N32_FPU_FS2_FCMPLES_E = 0x5,
-+ N32_FPU_FS2_FCMPUNS_E = 0x7,
-+
-+ /* FD1 b[9:6] */
-+ N32_FPU_FD1_FADDD = 0,
-+ N32_FPU_FD1_FSUBD,
-+ N32_FPU_FD1_FCPYNSD,
-+ N32_FPU_FD1_FCPYSD,
-+ N32_FPU_FD1_FMADDD,
-+ N32_FPU_FD1_FMSUBD,
-+ N32_FPU_FD1_FCMOVND,
-+ N32_FPU_FD1_FCMOVZD,
-+ N32_FPU_FD1_FNMADDD,
-+ N32_FPU_FD1_FNMSUBD,
-+ N32_FPU_FD1_10,
-+ N32_FPU_FD1_11,
-+ N32_FPU_FD1_FMULD = 12,
-+ N32_FPU_FD1_FDIVD,
-+ N32_FPU_FD1_14,
-+ N32_FPU_FD1_F2OP = 15,
-+
-+ /* FD1/F2OP b[14:10] */
-+ N32_FPU_FD1_F2OP_FD2S = 0x00,
-+ N32_FPU_FD1_F2OP_FSQRTD = 0x01,
-+ N32_FPU_FD1_F2OP_FABSD = 0x05,
-+ N32_FPU_FD1_F2OP_FUI2D = 0x08,
-+ N32_FPU_FD1_F2OP_FSI2D = 0x0c,
-+ N32_FPU_FD1_F2OP_FD2UI = 0x10,
-+ N32_FPU_FD1_F2OP_FD2UI_Z = 0x14,
-+ N32_FPU_FD1_F2OP_FD2SI = 0x18,
-+ N32_FPU_FD1_F2OP_FD2SI_Z = 0x1c,
-+
-+ /* FD2 b[9:6] */
-+ N32_FPU_FD2_FCMPEQD = 0x0,
-+ N32_FPU_FD2_FCMPLTD = 0x2,
-+ N32_FPU_FD2_FCMPLED = 0x4,
-+ N32_FPU_FD2_FCMPUND = 0x6,
-+ N32_FPU_FD2_FCMPEQD_E = 0x1,
-+ N32_FPU_FD2_FCMPLTD_E = 0x3,
-+ N32_FPU_FD2_FCMPLED_E = 0x5,
-+ N32_FPU_FD2_FCMPUND_E = 0x7,
-+
-+ /* MFCP b[9:6] */
-+ N32_FPU_MFCP_FMFSR = 0x0,
-+ N32_FPU_MFCP_FMFDR = 0x1,
-+ N32_FPU_MFCP_XR = 0xc,
-+
-+ /* MFCP/XR b[14:10] */
-+ N32_FPU_MFCP_XR_FMFCFG = 0x0,
-+ N32_FPU_MFCP_XR_FMFCSR = 0x1,
-+
-+ /* MTCP b[9:6] */
-+ N32_FPU_MTCP_FMTSR = 0x0,
-+ N32_FPU_MTCP_FMTDR = 0x1,
-+ N32_FPU_MTCP_XR = 0xc,
-+
-+ /* MTCP/XR b[14:10] */
-+ N32_FPU_MTCP_XR_FMTCSR = 0x1,
-+};
-+
-+enum n16_opcodes
-+{
-+ N16_T55_MOV55 = 0x0,
-+ N16_T55_MOVI55 = 0x1,
-+
-+ N16_T45_0 = 0,
-+ N16_T45_ADD45 = 0x4,
-+ N16_T45_SUB45 = 0x5,
-+ N16_T45_ADDI45 = 0x6,
-+ N16_T45_SUBI45 = 0x7,
-+ N16_T45_SRAI45 = 0x8,
-+ N16_T45_SRLI45 = 0x9,
-+ N16_T45_LWI45_FE = 0x19,
-+ N16_T45_LWI450 = 0x1a,
-+ N16_T45_SWI450 = 0x1b,
-+ N16_T45_SLTS45 = 0x30,
-+ N16_T45_SLT45 = 0x31,
-+ N16_T45_SLTSI45 = 0x32,
-+ N16_T45_SLTI45 = 0x33,
-+ N16_T45_MOVPI45 = 0x3d,
-+
-+ N15_T44_MOVD44 = 0x7d,
-+
-+ N16_T333_0 = 0,
-+ N16_T333_SLLI333 = 0xa,
-+ N16_T333_BFMI333 = 0xb,
-+ N16_T333_ADD333 = 0xc,
-+ N16_T333_SUB333 = 0xd,
-+ N16_T333_ADDI333 = 0xe,
-+ N16_T333_SUBI333 = 0xf,
-+ N16_T333_LWI333 = 0x10,
-+ N16_T333_LWI333_BI = 0x11,
-+ N16_T333_LHI333 = 0x12,
-+ N16_T333_LBI333 = 0x13,
-+ N16_T333_SWI333 = 0x14,
-+ N16_T333_SWI333_BI = 0x15,
-+ N16_T333_SHI333 = 0x16,
-+ N16_T333_SBI333 = 0x17,
-+ N16_T333_MISC33 = 0x3f,
-+
-+ N16_T36_ADDRI36_SP = 0x18,
-+
-+ N16_T37_XWI37 = 0x7,
-+ N16_T37_XWI37SP = 0xe,
-+
-+ N16_T38_BEQZ38 = 0x8,
-+ N16_T38_BNEZ38 = 0x9,
-+ N16_T38_BEQS38 = 0xa,
-+ N16_T38_BNES38 = 0xb,
-+
-+ N16_T5_JR5 = 0x2e8,
-+ N16_T5_JRAL5 = 0x2e9,
-+ N16_T5_EX9IT = 0x2ea,
-+ /* 0x2eb reserved. */
-+ N16_T5_RET5 = 0x2ec,
-+ N16_T5_ADD5PC = 0x2ed,
-+ /* 0x2e[ef] reserved. */
-+ N16_T5_BREAK16 = 0x350,
-+
-+ N16_T8_J8 = 0x55,
-+ N16_T8_BEQZS8 = 0x68,
-+ N16_T8_BNEZS8 = 0x69,
-+
-+ /* N16_T9_BREAK16 = 0x35
-+ Since v3, SWID of BREAK16 above 32 are used for encoding EX9.IT. */
-+ N16_T9_EX9IT = 0x35,
-+ N16_T9_IFCALL9 = 0x3c,
-+
-+ N16_T10_ADDI10S = 0x1b,
-+
-+ N16_T25_PUSH25 = 0xf8,
-+ N16_T25_POP25 = 0xf9,
-+
-+ /* Sub-opcodes. */
-+ N16_MISC33_0 = 0,
-+ N16_MISC33_1 = 1,
-+ N16_MISC33_NEG33 = 2,
-+ N16_MISC33_NOT33 = 3,
-+ N16_MISC33_MUL33 = 4,
-+ N16_MISC33_XOR33 = 5,
-+ N16_MISC33_AND33 = 6,
-+ N16_MISC33_OR33 = 7,
-+
-+ N16_BFMI333_ZEB33 = 0,
-+ N16_BFMI333_ZEH33 = 1,
-+ N16_BFMI333_SEB33 = 2,
-+ N16_BFMI333_SEH33 = 3,
-+ N16_BFMI333_XLSB33 = 4,
-+ N16_BFMI333_X11B33 = 5,
-+ N16_BFMI333_BMSKI33 = 6,
-+ N16_BFMI333_FEXTI33 = 7,
-+};
-+
-+/* These macros a deprecated. DO NOT use them anymore.
-+ And please help rewrite code used them. */
-+
-+/* 32-bit instructions without operands. */
-+#define INSN_SETHI 0x46000000
-+#define INSN_ORI 0x58000000
-+#define INSN_JR 0x4a000000
-+#define INSN_RET 0x4a000020
-+#define INSN_JAL 0x49000000
-+#define INSN_J 0x48000000
-+#define INSN_JRAL 0x4a000001
-+#define INSN_BGEZAL 0x4e0c0000
-+#define INSN_BLTZAL 0x4e0d0000
-+#define INSN_BEQ 0x4c000000
-+#define INSN_BNE 0x4c004000
-+#define INSN_BEQZ 0x4e020000
-+#define INSN_BNEZ 0x4e030000
-+#define INSN_BGEZ 0x4e040000
-+#define INSN_BLTZ 0x4e050000
-+#define INSN_BGTZ 0x4e060000
-+#define INSN_BLEZ 0x4e070000
-+#define INSN_MOVI 0x44000000
-+#define INSN_ADDI 0x50000000
-+#define INSN_ANDI 0x54000000
-+#define INSN_LDI 0x06000000
-+#define INSN_SDI 0x16000000
-+#define INSN_LW 0x38000002
-+#define INSN_LWI 0x04000000
-+#define INSN_LWSI 0x24000000
-+#define INSN_LWIP 0x0c000000
-+#define INSN_LHI 0x02000000
-+#define INSN_LHSI 0x22000000
-+#define INSN_LBI 0x00000000
-+#define INSN_LBSI 0x20000000
-+#define INSN_SWI 0x14000000
-+#define INSN_SWIP 0x1c000000
-+#define INSN_SHI 0x12000000
-+#define INSN_SBI 0x10000000
-+#define INSN_SLTI 0x5c000000
-+#define INSN_SLTSI 0x5e000000
-+#define INSN_ADD 0x40000000
-+#define INSN_SUB 0x40000001
-+#define INSN_SLT 0x40000006
-+#define INSN_SLTS 0x40000007
-+#define INSN_SLLI 0x40000008
-+#define INSN_SRLI 0x40000009
-+#define INSN_SRAI 0x4000000a
-+#define INSN_SEB 0x40000010
-+#define INSN_SEH 0x40000011
-+#define INSN_ZEB INSN_ANDI + 0xFF
-+#define INSN_ZEH 0x40000013
-+#define INSN_BREAK 0x6400000a
-+#define INSN_NOP 0x40000009
-+#define INSN_FLSI 0x30000000
-+#define INSN_FSSI 0x32000000
-+#define INSN_FLDI 0x34000000
-+#define INSN_FSDI 0x36000000
-+#define INSN_BEQC 0x5a000000
-+#define INSN_BNEC 0x5a080000
-+#define INSN_DSB 0x64000008
-+#define INSN_IFCALL 0x4e000000
-+#define INSN_IFRET 0x4a000060
-+#define INSN_BR1 0x4c000000
-+#define INSN_BR2 0x4e000000
-+
-+/* 16-bit instructions without operand. */
-+#define INSN_MOV55 0x8000
-+#define INSN_MOVI55 0x8400
-+#define INSN_ADD45 0x8800
-+#define INSN_SUB45 0x8a00
-+#define INSN_ADDI45 0x8c00
-+#define INSN_SUBI45 0x8e00
-+#define INSN_SRAI45 0x9000
-+#define INSN_SRLI45 0x9200
-+#define INSN_SLLI333 0x9400
-+#define INSN_BFMI333 0x9600
-+#define INSN_ADD333 0x9800
-+#define INSN_SUB333 0x9a00
-+#define INSN_ADDI333 0x9c00
-+#define INSN_SUBI333 0x9e00
-+#define INSN_LWI333 0xa000
-+#define INSN_LWI333P 0xa200
-+#define INSN_LHI333 0xa400
-+#define INSN_LBI333 0xa600
-+#define INSN_SWI333 0xa800
-+#define INSN_SWI333P 0xaa00
-+#define INSN_SHI333 0xac00
-+#define INSN_SBI333 0xae00
-+#define INSN_RSV01 0xb000
-+#define INSN_RSV02 0xb200
-+#define INSN_LWI450 0xb400
-+#define INSN_SWI450 0xb600
-+#define INSN_LWI37 0xb800
-+#define INSN_SWI37 0xb880
-+#define INSN_BEQZ38 0xc000
-+#define INSN_BNEZ38 0xc800
-+#define INSN_BEQS38 0xd000
-+#define INSN_J8 0xd500
-+#define INSN_BNES38 0xd800
-+#define INSN_JR5 0xdd00
-+#define INSN_RET5 0xdd80
-+#define INSN_JRAL5 0xdd20
-+#define INSN_EX9_IT_2 0xdd40
-+#define INSN_SLTS45 0xe000
-+#define INSN_SLT45 0xe200
-+#define INSN_SLTSI45 0xe400
-+#define INSN_SLTI45 0xe600
-+#define INSN_BEQZS8 0xe800
-+#define INSN_BNEZS8 0xe900
-+#define INSN_BREAK16 0xea00
-+#define INSN_EX9_IT_1 0xea00
-+#define INSN_NOP16 0x9200
-+/* 16-bit version 2. */
-+#define INSN_ADDI10_SP 0xec00
-+#define INSN_LWI37SP 0xf000
-+#define INSN_SWI37SP 0xf080
-+/* 16-bit version 3. */
-+#define INSN_IFRET16 0x83ff
-+#define INSN_ADDRI36_SP 0xb000
-+#define INSN_LWI45_FE 0xb200
-+#define INSN_IFCALL9 0xf800
-+#define INSN_MISC33 0xfe00
-+
-+/* Instruction with specific operands. */
-+#define INSN_ADDI_GP_TO_FP 0x51cd8000 /* BASELINE_V1. */
-+#define INSN_ADDIGP_TO_FP 0x3fc80000 /* BASELINE_V2. */
-+#define INSN_MOVI_TO_FP 0x45c00000
-+#define INSN_MFUSR_PC 0x420F8020
-+#define INSN_MFUSR_PC_MASK 0xFE0FFFFF
-+
-+/* Instructions use $ta register as operand. */
-+#define INSN_SETHI_TA (INSN_SETHI | (REG_TA << 20))
-+#define INSN_ORI_TA (INSN_ORI | (REG_TA << 20) | (REG_TA << 15))
-+#define INSN_ADD_TA (INSN_ADD | (REG_TA << 20))
-+#define INSN_ADD45_TA (INSN_ADD45 | (REG_TA << 5))
-+#define INSN_JR5_TA (INSN_JR5 | (REG_TA << 0))
-+#define INSN_RET5_TA (INSN_RET5 | (REG_TA << 0))
-+#define INSN_JR_TA (INSN_JR | (REG_TA << 10))
-+#define INSN_RET_TA (INSN_RET | (REG_TA << 10))
-+#define INSN_JRAL_TA (INSN_JRAL | (REG_LP << 20) | (REG_TA << 10))
-+#define INSN_JRAL5_TA (INSN_JRAL5 | (REG_TA << 0))
-+#define INSN_BEQZ_TA (INSN_BEQZ | (REG_TA << 20))
-+#define INSN_BNEZ_TA (INSN_BNEZ | (REG_TA << 20))
-+#define INSN_MOVI_TA (INSN_MOVI | (REG_TA << 20))
-+#define INSN_BEQ_TA (INSN_BEQ | (REG_TA << 15))
-+#define INSN_BNE_TA (INSN_BNE | (REG_TA << 15))
-+
-+/* Instructions use $r5 register as operand. */
-+#define INSN_BNE_R5 (INSN_BNE | (REG_R5 << 15))
-+#define INSN_BEQ_R5 (INSN_BEQ | (REG_R5 << 15))
-+
-+#endif
-diff -Nur binutils-2.24.orig/ld/aclocal.m4 binutils-2.24/ld/aclocal.m4
---- binutils-2.24.orig/ld/aclocal.m4 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/ld/aclocal.m4 2016-06-30 21:26:12.777897935 +0200
-@@ -1,7 +1,8 @@
--# generated automatically by aclocal 1.11.1 -*- Autoconf -*-
-+# generated automatically by aclocal 1.11.6 -*- Autoconf -*-
-
- # Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
--# 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
-+# 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation,
-+# Inc.
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-@@ -19,12 +20,40 @@
- If you have problems, you may need to regenerate the build system entirely.
- To do so, use the procedure documented by the package, typically `autoreconf'.])])
-
--# Copyright (C) 2002, 2003, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
-+# isc-posix.m4 serial 2 (gettext-0.11.2)
-+dnl Copyright (C) 1995-2002 Free Software Foundation, Inc.
-+dnl This file is free software; the Free Software Foundation
-+dnl gives unlimited permission to copy and/or distribute it,
-+dnl with or without modifications, as long as this notice is preserved.
-+
-+# This file is not needed with autoconf-2.53 and newer. Remove it in 2005.
-+
-+# This test replaces the one in autoconf.
-+# Currently this macro should have the same name as the autoconf macro
-+# because gettext's gettext.m4 (distributed in the automake package)
-+# still uses it. Otherwise, the use in gettext.m4 makes autoheader
-+# give these diagnostics:
-+# configure.in:556: AC_TRY_COMPILE was called before AC_ISC_POSIX
-+# configure.in:556: AC_TRY_RUN was called before AC_ISC_POSIX
-+
-+undefine([AC_ISC_POSIX])
-+
-+AC_DEFUN([AC_ISC_POSIX],
-+ [
-+ dnl This test replaces the obsolescent AC_ISC_POSIX kludge.
-+ AC_CHECK_LIB(cposix, strerror, [LIBS="$LIBS -lcposix"])
-+ ]
-+)
-+
-+# Copyright (C) 2002, 2003, 2005, 2006, 2007, 2008, 2011 Free Software
-+# Foundation, Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-
-+# serial 1
-+
- # AM_AUTOMAKE_VERSION(VERSION)
- # ----------------------------
- # Automake X.Y traces this macro to ensure aclocal.m4 has been
-@@ -34,7 +63,7 @@
- [am__api_version='1.11'
- dnl Some users find AM_AUTOMAKE_VERSION and mistake it for a way to
- dnl require some minimum version. Point them to the right macro.
--m4_if([$1], [1.11.1], [],
-+m4_if([$1], [1.11.6], [],
- [AC_FATAL([Do not call $0, use AM_INIT_AUTOMAKE([$1]).])])dnl
- ])
-
-@@ -50,19 +79,21 @@
- # Call AM_AUTOMAKE_VERSION and AM_AUTOMAKE_VERSION so they can be traced.
- # This function is AC_REQUIREd by AM_INIT_AUTOMAKE.
- AC_DEFUN([AM_SET_CURRENT_AUTOMAKE_VERSION],
--[AM_AUTOMAKE_VERSION([1.11.1])dnl
-+[AM_AUTOMAKE_VERSION([1.11.6])dnl
- m4_ifndef([AC_AUTOCONF_VERSION],
- [m4_copy([m4_PACKAGE_VERSION], [AC_AUTOCONF_VERSION])])dnl
- _AM_AUTOCONF_VERSION(m4_defn([AC_AUTOCONF_VERSION]))])
-
- # AM_AUX_DIR_EXPAND -*- Autoconf -*-
-
--# Copyright (C) 2001, 2003, 2005 Free Software Foundation, Inc.
-+# Copyright (C) 2001, 2003, 2005, 2011 Free Software Foundation, Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-
-+# serial 1
-+
- # For projects using AC_CONFIG_AUX_DIR([foo]), Autoconf sets
- # $ac_aux_dir to `$srcdir/foo'. In other projects, it is set to
- # `$srcdir', `$srcdir/..', or `$srcdir/../..'.
-@@ -144,14 +175,14 @@
- Usually this means the macro was only invoked conditionally.]])
- fi])])
-
--# Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2009
--# Free Software Foundation, Inc.
-+# Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2009,
-+# 2010, 2011 Free Software Foundation, Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-
--# serial 10
-+# serial 12
-
- # There are a few dirty hacks below to avoid letting `AC_PROG_CC' be
- # written in clear, in which case automake, when reading aclocal.m4,
-@@ -191,6 +222,7 @@
- # instance it was reported that on HP-UX the gcc test will end up
- # making a dummy file named `D' -- because `-MD' means `put the output
- # in D'.
-+ rm -rf conftest.dir
- mkdir conftest.dir
- # Copy depcomp to subdir because otherwise we won't find it if we're
- # using a relative directory.
-@@ -255,7 +287,7 @@
- break
- fi
- ;;
-- msvisualcpp | msvcmsys)
-+ msvc7 | msvc7msys | msvisualcpp | msvcmsys)
- # This compiler won't grok `-c -o', but also, the minuso test has
- # not run yet. These depmodes are late enough in the game, and
- # so weak that their functioning should not be impacted.
-@@ -320,10 +352,13 @@
- if test "x$enable_dependency_tracking" != xno; then
- am_depcomp="$ac_aux_dir/depcomp"
- AMDEPBACKSLASH='\'
-+ am__nodep='_no'
- fi
- AM_CONDITIONAL([AMDEP], [test "x$enable_dependency_tracking" != xno])
- AC_SUBST([AMDEPBACKSLASH])dnl
- _AM_SUBST_NOTMAKE([AMDEPBACKSLASH])dnl
-+AC_SUBST([am__nodep])dnl
-+_AM_SUBST_NOTMAKE([am__nodep])dnl
- ])
-
- # Generate code to set up dependency tracking. -*- Autoconf -*-
-@@ -545,12 +580,15 @@
- done
- echo "timestamp for $_am_arg" >`AS_DIRNAME(["$_am_arg"])`/stamp-h[]$_am_stamp_count])
-
--# Copyright (C) 2001, 2003, 2005, 2008 Free Software Foundation, Inc.
-+# Copyright (C) 2001, 2003, 2005, 2008, 2011 Free Software Foundation,
-+# Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-
-+# serial 1
-+
- # AM_PROG_INSTALL_SH
- # ------------------
- # Define $install_sh.
-@@ -590,8 +628,8 @@
- # Add --enable-maintainer-mode option to configure. -*- Autoconf -*-
- # From Jim Meyering
-
--# Copyright (C) 1996, 1998, 2000, 2001, 2002, 2003, 2004, 2005, 2008
--# Free Software Foundation, Inc.
-+# Copyright (C) 1996, 1998, 2000, 2001, 2002, 2003, 2004, 2005, 2008,
-+# 2011 Free Software Foundation, Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
-@@ -611,7 +649,7 @@
- [disable], [m4_define([am_maintainer_other], [enable])],
- [m4_define([am_maintainer_other], [enable])
- m4_warn([syntax], [unexpected argument to AM@&t@_MAINTAINER_MODE: $1])])
--AC_MSG_CHECKING([whether to am_maintainer_other maintainer-specific portions of Makefiles])
-+AC_MSG_CHECKING([whether to enable maintainer-specific portions of Makefiles])
- dnl maintainer-mode's default is 'disable' unless 'enable' is passed
- AC_ARG_ENABLE([maintainer-mode],
- [ --][am_maintainer_other][-maintainer-mode am_maintainer_other make rules and dependencies not useful
-@@ -722,12 +760,15 @@
- fi
- ])
-
--# Copyright (C) 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
-+# Copyright (C) 2003, 2004, 2005, 2006, 2011 Free Software Foundation,
-+# Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-
-+# serial 1
-+
- # AM_PROG_MKDIR_P
- # ---------------
- # Check for `mkdir -p'.
-@@ -750,13 +791,14 @@
-
- # Helper functions for option handling. -*- Autoconf -*-
-
--# Copyright (C) 2001, 2002, 2003, 2005, 2008 Free Software Foundation, Inc.
-+# Copyright (C) 2001, 2002, 2003, 2005, 2008, 2010 Free Software
-+# Foundation, Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-
--# serial 4
-+# serial 5
-
- # _AM_MANGLE_OPTION(NAME)
- # -----------------------
-@@ -764,13 +806,13 @@
- [[_AM_OPTION_]m4_bpatsubst($1, [[^a-zA-Z0-9_]], [_])])
-
- # _AM_SET_OPTION(NAME)
--# ------------------------------
-+# --------------------
- # Set option NAME. Presently that only means defining a flag for this option.
- AC_DEFUN([_AM_SET_OPTION],
- [m4_define(_AM_MANGLE_OPTION([$1]), 1)])
-
- # _AM_SET_OPTIONS(OPTIONS)
--# ----------------------------------
-+# ------------------------
- # OPTIONS is a space-separated list of Automake options.
- AC_DEFUN([_AM_SET_OPTIONS],
- [m4_foreach_w([_AM_Option], [$1], [_AM_SET_OPTION(_AM_Option)])])
-@@ -846,12 +888,14 @@
- fi
- AC_MSG_RESULT(yes)])
-
--# Copyright (C) 2001, 2003, 2005 Free Software Foundation, Inc.
-+# Copyright (C) 2001, 2003, 2005, 2011 Free Software Foundation, Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-
-+# serial 1
-+
- # AM_PROG_INSTALL_STRIP
- # ---------------------
- # One issue with vendor `install' (even GNU) is that you can't
-@@ -874,13 +918,13 @@
- INSTALL_STRIP_PROGRAM="\$(install_sh) -c -s"
- AC_SUBST([INSTALL_STRIP_PROGRAM])])
-
--# Copyright (C) 2006, 2008 Free Software Foundation, Inc.
-+# Copyright (C) 2006, 2008, 2010 Free Software Foundation, Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-
--# serial 2
-+# serial 3
-
- # _AM_SUBST_NOTMAKE(VARIABLE)
- # ---------------------------
-@@ -889,13 +933,13 @@
- AC_DEFUN([_AM_SUBST_NOTMAKE])
-
- # AM_SUBST_NOTMAKE(VARIABLE)
--# ---------------------------
-+# --------------------------
- # Public sister of _AM_SUBST_NOTMAKE.
- AC_DEFUN([AM_SUBST_NOTMAKE], [_AM_SUBST_NOTMAKE($@)])
-
- # Check how to create a tarball. -*- Autoconf -*-
-
--# Copyright (C) 2004, 2005 Free Software Foundation, Inc.
-+# Copyright (C) 2004, 2005, 2012 Free Software Foundation, Inc.
- #
- # This file is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
-@@ -917,10 +961,11 @@
- # a tarball read from stdin.
- # $(am__untar) < result.tar
- AC_DEFUN([_AM_PROG_TAR],
--[# Always define AMTAR for backward compatibility.
--AM_MISSING_PROG([AMTAR], [tar])
-+[# Always define AMTAR for backward compatibility. Yes, it's still used
-+# in the wild :-( We should find a proper way to deprecate it ...
-+AC_SUBST([AMTAR], ['$${TAR-tar}'])
- m4_if([$1], [v7],
-- [am__tar='${AMTAR} chof - "$$tardir"'; am__untar='${AMTAR} xf -'],
-+ [am__tar='$${TAR-tar} chof - "$$tardir"' am__untar='$${TAR-tar} xf -'],
- [m4_case([$1], [ustar],, [pax],,
- [m4_fatal([Unknown tar format])])
- AC_MSG_CHECKING([how to create a $1 tar archive])
-diff -Nur binutils-2.24.orig/ld/configdoc.texi binutils-2.24/ld/configdoc.texi
---- binutils-2.24.orig/ld/configdoc.texi 2013-11-18 09:49:29.000000000 +0100
-+++ binutils-2.24/ld/configdoc.texi 1970-01-01 01:00:00.000000000 +0100
-@@ -1,32 +0,0 @@
--@c Copyright 2012
--@c Free Software Foundation, Inc.
--@c For copying conditions, see the file ld.texinfo.
--
--@c ------------------------------ CONFIGURATION VARS:
--@c 1. Inclusiveness of this manual
--@set GENERIC
--
--@c 2. Specific target machines
--@set ARM
--@set C6X
--@set H8300
--@set HPPA
--@set I960
--@set M68HC11
--@set M68K
--@set MIPS
--@set MMIX
--@set MSP430
--@set POWERPC
--@set POWERPC64
--@set Renesas
--@set SPU
--@set TICOFF
--@set WIN32
--@set XTENSA
--
--@c 3. Properties of this configuration
--@clear SingleFormat
--@set UsesEnvVars
--@c ------------------------------ end CONFIGURATION VARS
--
-diff -Nur binutils-2.24.orig/ld/config.in binutils-2.24/ld/config.in
---- binutils-2.24.orig/ld/config.in 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/ld/config.in 2016-06-30 21:26:12.781898091 +0200
-@@ -158,6 +158,15 @@
- */
- #undef LT_OBJDIR
-
-+/* Define if ex9-ext of nds32 target is supported. */
-+#undef NDS32_EX9_EXT
-+
-+/* Define if ifc-ext of nds32 target is supported. */
-+#undef NDS32_IFC_EXT
-+
-+/* Define if linux toolchain is to be built. */
-+#undef NDS32_LINUX_TOOLCHAIN
-+
- /* Name of package */
- #undef PACKAGE
-
-diff -Nur binutils-2.24.orig/ld/configure binutils-2.24/ld/configure
---- binutils-2.24.orig/ld/configure 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/ld/configure 2016-06-30 21:26:12.781898091 +0200
-@@ -679,6 +679,7 @@
- am__fastdepCC_FALSE
- am__fastdepCC_TRUE
- CCDEPMODE
-+am__nodep
- AMDEPBACKSLASH
- AMDEP_FALSE
- AMDEP_TRUE
-@@ -3499,12 +3500,14 @@
- ac_compiler_gnu=$ac_cv_c_compiler_gnu
-
-
--{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for library containing strerror" >&5
--$as_echo_n "checking for library containing strerror... " >&6; }
--if test "${ac_cv_search_strerror+set}" = set; then :
-+
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for strerror in -lcposix" >&5
-+$as_echo_n "checking for strerror in -lcposix... " >&6; }
-+if test "${ac_cv_lib_cposix_strerror+set}" = set; then :
- $as_echo_n "(cached) " >&6
- else
-- ac_func_search_save_LIBS=$LIBS
-+ ac_check_lib_save_LIBS=$LIBS
-+LIBS="-lcposix $LIBS"
- cat confdefs.h - <<_ACEOF >conftest.$ac_ext
- /* end confdefs.h. */
-
-@@ -3523,37 +3526,22 @@
- return 0;
- }
- _ACEOF
--for ac_lib in '' cposix; do
-- if test -z "$ac_lib"; then
-- ac_res="none required"
-- else
-- ac_res=-l$ac_lib
-- LIBS="-l$ac_lib $ac_func_search_save_LIBS"
-- fi
-- if ac_fn_c_try_link "$LINENO"; then :
-- ac_cv_search_strerror=$ac_res
-+if ac_fn_c_try_link "$LINENO"; then :
-+ ac_cv_lib_cposix_strerror=yes
-+else
-+ ac_cv_lib_cposix_strerror=no
- fi
- rm -f core conftest.err conftest.$ac_objext \
-- conftest$ac_exeext
-- if test "${ac_cv_search_strerror+set}" = set; then :
-- break
--fi
--done
--if test "${ac_cv_search_strerror+set}" = set; then :
--
--else
-- ac_cv_search_strerror=no
-+ conftest$ac_exeext conftest.$ac_ext
-+LIBS=$ac_check_lib_save_LIBS
- fi
--rm conftest.$ac_ext
--LIBS=$ac_func_search_save_LIBS
-+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_cposix_strerror" >&5
-+$as_echo "$ac_cv_lib_cposix_strerror" >&6; }
-+if test "x$ac_cv_lib_cposix_strerror" = x""yes; then :
-+ LIBS="$LIBS -lcposix"
- fi
--{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_search_strerror" >&5
--$as_echo "$ac_cv_search_strerror" >&6; }
--ac_res=$ac_cv_search_strerror
--if test "$ac_res" != no; then :
-- test "$ac_res" = "none required" || LIBS="$ac_res $LIBS"
-
--fi
-+
-
-
- BFD_VERSION=`${srcdir}/../bfd/configure --version | sed -n -e '1s,.* ,,p'`
-@@ -4025,6 +4013,7 @@
- if test "x$enable_dependency_tracking" != xno; then
- am_depcomp="$ac_aux_dir/depcomp"
- AMDEPBACKSLASH='\'
-+ am__nodep='_no'
- fi
- if test "x$enable_dependency_tracking" != xno; then
- AMDEP_TRUE=
-@@ -4087,11 +4076,11 @@
-
- # We need awk for the "check" target. The system "awk" is bad on
- # some platforms.
--# Always define AMTAR for backward compatibility.
--
--AMTAR=${AMTAR-"${am_missing_run}tar"}
-+# Always define AMTAR for backward compatibility. Yes, it's still used
-+# in the wild :-( We should find a proper way to deprecate it ...
-+AMTAR='$${TAR-tar}'
-
--am__tar='${AMTAR} chof - "$$tardir"'; am__untar='${AMTAR} xf -'
-+am__tar='$${TAR-tar} chof - "$$tardir"' am__untar='$${TAR-tar} xf -'
-
-
-
-@@ -4109,6 +4098,7 @@
- # instance it was reported that on HP-UX the gcc test will end up
- # making a dummy file named `D' -- because `-MD' means `put the output
- # in D'.
-+ rm -rf conftest.dir
- mkdir conftest.dir
- # Copy depcomp to subdir because otherwise we won't find it if we're
- # using a relative directory.
-@@ -4168,7 +4158,7 @@
- break
- fi
- ;;
-- msvisualcpp | msvcmsys)
-+ msvc7 | msvc7msys | msvisualcpp | msvcmsys)
- # This compiler won't grok `-c -o', but also, the minuso test has
- # not run yet. These depmodes are late enough in the game, and
- # so weak that their functioning should not be impacted.
-@@ -5573,6 +5563,7 @@
- # instance it was reported that on HP-UX the gcc test will end up
- # making a dummy file named `D' -- because `-MD' means `put the output
- # in D'.
-+ rm -rf conftest.dir
- mkdir conftest.dir
- # Copy depcomp to subdir because otherwise we won't find it if we're
- # using a relative directory.
-@@ -5632,7 +5623,7 @@
- break
- fi
- ;;
-- msvisualcpp | msvcmsys)
-+ msvc7 | msvc7msys | msvisualcpp | msvcmsys)
- # This compiler won't grok `-c -o', but also, the minuso test has
- # not run yet. These depmodes are late enough in the game, and
- # so weak that their functioning should not be impacted.
-@@ -12192,7 +12183,7 @@
- lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
- lt_status=$lt_dlunknown
- cat > conftest.$ac_ext <<_LT_EOF
--#line 12195 "configure"
-+#line 12186 "configure"
- #include "confdefs.h"
-
- #if HAVE_DLFCN_H
-@@ -12298,7 +12289,7 @@
- lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
- lt_status=$lt_dlunknown
- cat > conftest.$ac_ext <<_LT_EOF
--#line 12301 "configure"
-+#line 12292 "configure"
- #include "confdefs.h"
-
- #if HAVE_DLFCN_H
-@@ -16896,6 +16887,53 @@
-
- . ${srcdir}/configure.tgt
-
-+ case ${target_cpu} in
-+ nds32*)
-+ case ${targ} in
-+ *-*-linux*)
-+
-+$as_echo "#define NDS32_LINUX_TOOLCHAIN 1" >>confdefs.h
-+
-+ ;;
-+ esac
-+
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --enable-ifc-ext" >&5
-+$as_echo_n "checking for default configuration of --enable-ifc-ext... " >&6; }
-+ if test "x${enable_ifc_ext}" == xyes; then
-+
-+$as_echo "#define NDS32_IFC_EXT 1" >>confdefs.h
-+
-+ fi
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $enable_ifc_ext" >&5
-+$as_echo "$enable_ifc_ext" >&6; }
-+
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --enable-ex9-ext" >&5
-+$as_echo_n "checking for default configuration of --enable-ex9-ext... " >&6; }
-+ if test "x${enable_ex9_ext}" == xyes; then
-+
-+$as_echo "#define NDS32_EX9_EXT 1" >>confdefs.h
-+
-+ fi
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $enable_ex9_ext" >&5
-+$as_echo "$enable_ex9_ext" >&6; }
-+
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --enable-16m-addr" >&5
-+$as_echo_n "checking for default configuration of --enable-16m-addr... " >&6; }
-+ if test "x${enable_16m_addr}" == xyes; then
-+ case ${targ} in
-+ nds32*le-*-elf*)
-+ targ_emul=nds32elf16m
-+ ;;
-+ nds32*be-*-elf*)
-+ targ_emul=nds32belf16m
-+ ;;
-+ esac
-+ fi
-+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $enable_16m-addr" >&5
-+$as_echo "$enable_16m-addr" >&6; }
-+ ;;
-+ esac
-+
- if test "$targ" = "$target"; then
- EMUL=$targ_emul
- fi
-diff -Nur binutils-2.24.orig/ld/configure.in binutils-2.24/ld/configure.in
---- binutils-2.24.orig/ld/configure.in 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/ld/configure.in 2016-06-30 21:26:12.781898091 +0200
-@@ -306,6 +306,44 @@
-
- . ${srcdir}/configure.tgt
-
-+ case ${target_cpu} in
-+ nds32*)
-+ case ${targ} in
-+ *-*-linux*)
-+ AC_DEFINE(NDS32_LINUX_TOOLCHAIN, 1,
-+ [Define if linux toolchain is to be built.])
-+ ;;
-+ esac
-+
-+ AC_MSG_CHECKING(for default configuration of --enable-ifc-ext)
-+ if test "x${enable_ifc_ext}" == xyes; then
-+ AC_DEFINE(NDS32_IFC_EXT, 1,
-+ [Define if ifc-ext of nds32 target is supported.])
-+ fi
-+ AC_MSG_RESULT($enable_ifc_ext)
-+
-+ AC_MSG_CHECKING(for default configuration of --enable-ex9-ext)
-+ if test "x${enable_ex9_ext}" == xyes; then
-+ AC_DEFINE(NDS32_EX9_EXT, 1,
-+ [Define if ex9-ext of nds32 target is supported.])
-+ fi
-+ AC_MSG_RESULT($enable_ex9_ext)
-+
-+ AC_MSG_CHECKING(for default configuration of --enable-16m-addr)
-+ if test "x${enable_16m_addr}" == xyes; then
-+ case ${targ} in
-+ nds32*le-*-elf*)
-+ targ_emul=nds32elf16m
-+ ;;
-+ nds32*be-*-elf*)
-+ targ_emul=nds32belf16m
-+ ;;
-+ esac
-+ fi
-+ AC_MSG_RESULT($enable_16m-addr)
-+ ;;
-+ esac
-+
- if test "$targ" = "$target"; then
- EMUL=$targ_emul
- fi
-diff -Nur binutils-2.24.orig/ld/configure.tgt binutils-2.24/ld/configure.tgt
---- binutils-2.24.orig/ld/configure.tgt 2013-11-26 12:37:33.000000000 +0100
-+++ binutils-2.24/ld/configure.tgt 2016-06-30 21:26:12.781898091 +0200
-@@ -514,6 +514,14 @@
- msp430-*-*) targ_emul=msp430x110
- targ_extra_emuls="msp430x112 msp430x1101 msp430x1111 msp430x1121 msp430x1122 msp430x1132 msp430x122 msp430x123 msp430x1222 msp430x1232 msp430x133 msp430x135 msp430x1331 msp430x1351 msp430x147 msp430x148 msp430x149 msp430x155 msp430x156 msp430x157 msp430x167 msp430x168 msp430x169 msp430x1610 msp430x1611 msp430x1612 msp430x2101 msp430x2111 msp430x2121 msp430x2131 msp430x311 msp430x312 msp430x313 msp430x314 msp430x315 msp430x323 msp430x325 msp430x336 msp430x337 msp430x412 msp430x413 msp430x415 msp430x417 msp430xE423 msp430xE425 msp430xE427 msp430xW423 msp430xW425 msp430xW427 msp430xG437 msp430xG438 msp430xG439 msp430x435 msp430x436 msp430x437 msp430x447 msp430x448 msp430x449 msp430X"
- ;;
-+nds32*le-*-elf*) targ_emul=nds32elf
-+ targ_extra_emuls="nds32elf16m"
-+ ;;
-+nds32*be-*-elf*) targ_emul=nds32belf
-+ targ_extra_emuls="nds32belf16m"
-+ ;;
-+nds32*le-*-linux*) targ_emul=nds32elf_linux ;;
-+nds32*be-*-linux*) targ_emul=nds32belf_linux ;;
- nios2*-*-linux*) targ_emul=nios2linux ;;
- nios2*-*-*) targ_emul=nios2elf ;;
- ns32k-pc532-mach* | ns32k-pc532-ux*) targ_emul=pc532macha ;;
-diff -Nur binutils-2.24.orig/ld/deffilep.c binutils-2.24/ld/deffilep.c
---- binutils-2.24.orig/ld/deffilep.c 2013-11-18 09:49:29.000000000 +0100
-+++ binutils-2.24/ld/deffilep.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,3425 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton implementation for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* C LALR(1) parser skeleton written by Richard Stallman, by
-- simplifying the original so-called "semantic" parser. */
--
--/* All symbols defined below should begin with yy or YY, to avoid
-- infringing on user name space. This should be done even for local
-- variables, as they might otherwise be expanded by user macros.
-- There are some unavoidable exceptions within include files to
-- define necessary library symbols; they are noted "INFRINGES ON
-- USER NAME SPACE" below. */
--
--/* Identify Bison output. */
--#define YYBISON 1
--
--/* Bison version. */
--#define YYBISON_VERSION "2.3"
--
--/* Skeleton name. */
--#define YYSKELETON_NAME "yacc.c"
--
--/* Pure parsers. */
--#define YYPURE 0
--
--/* Using locations. */
--#define YYLSP_NEEDED 0
--
--
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- NAME = 258,
-- LIBRARY = 259,
-- DESCRIPTION = 260,
-- STACKSIZE_K = 261,
-- HEAPSIZE = 262,
-- CODE = 263,
-- DATAU = 264,
-- DATAL = 265,
-- SECTIONS = 266,
-- EXPORTS = 267,
-- IMPORTS = 268,
-- VERSIONK = 269,
-- BASE = 270,
-- CONSTANTU = 271,
-- CONSTANTL = 272,
-- PRIVATEU = 273,
-- PRIVATEL = 274,
-- ALIGNCOMM = 275,
-- READ = 276,
-- WRITE = 277,
-- EXECUTE = 278,
-- SHARED = 279,
-- NONAMEU = 280,
-- NONAMEL = 281,
-- DIRECTIVE = 282,
-- EQUAL = 283,
-- ID = 284,
-- DIGITS = 285
-- };
--#endif
--/* Tokens. */
--#define NAME 258
--#define LIBRARY 259
--#define DESCRIPTION 260
--#define STACKSIZE_K 261
--#define HEAPSIZE 262
--#define CODE 263
--#define DATAU 264
--#define DATAL 265
--#define SECTIONS 266
--#define EXPORTS 267
--#define IMPORTS 268
--#define VERSIONK 269
--#define BASE 270
--#define CONSTANTU 271
--#define CONSTANTL 272
--#define PRIVATEU 273
--#define PRIVATEL 274
--#define ALIGNCOMM 275
--#define READ 276
--#define WRITE 277
--#define EXECUTE 278
--#define SHARED 279
--#define NONAMEU 280
--#define NONAMEL 281
--#define DIRECTIVE 282
--#define EQUAL 283
--#define ID 284
--#define DIGITS 285
--
--
--
--
--/* Copy the first part of user declarations. */
--#line 1 "deffilep.y"
-- /* deffilep.y - parser for .def files */
--
--/* Copyright 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2006,
-- 2007, 2009 Free Software Foundation, Inc.
--
-- This file is part of GNU Binutils.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-- MA 02110-1301, USA. */
--
--#include "sysdep.h"
--#include "libiberty.h"
--#include "safe-ctype.h"
--#include "bfd.h"
--#include "ld.h"
--#include "ldmisc.h"
--#include "deffile.h"
--
--#define TRACE 0
--
--#define ROUND_UP(a, b) (((a)+((b)-1))&~((b)-1))
--
--/* Remap normal yacc parser interface names (yyparse, yylex, yyerror, etc),
-- as well as gratuitiously global symbol names, so we can have multiple
-- yacc generated parsers in ld. Note that these are only the variables
-- produced by yacc. If other parser generators (bison, byacc, etc) produce
-- additional global names that conflict at link time, then those parser
-- generators need to be fixed instead of adding those names to this list. */
--
--#define yymaxdepth def_maxdepth
--#define yyparse def_parse
--#define yylex def_lex
--#define yyerror def_error
--#define yylval def_lval
--#define yychar def_char
--#define yydebug def_debug
--#define yypact def_pact
--#define yyr1 def_r1
--#define yyr2 def_r2
--#define yydef def_def
--#define yychk def_chk
--#define yypgo def_pgo
--#define yyact def_act
--#define yyexca def_exca
--#define yyerrflag def_errflag
--#define yynerrs def_nerrs
--#define yyps def_ps
--#define yypv def_pv
--#define yys def_s
--#define yy_yys def_yys
--#define yystate def_state
--#define yytmp def_tmp
--#define yyv def_v
--#define yy_yyv def_yyv
--#define yyval def_val
--#define yylloc def_lloc
--#define yyreds def_reds /* With YYDEBUG defined. */
--#define yytoks def_toks /* With YYDEBUG defined. */
--#define yylhs def_yylhs
--#define yylen def_yylen
--#define yydefred def_yydefred
--#define yydgoto def_yydgoto
--#define yysindex def_yysindex
--#define yyrindex def_yyrindex
--#define yygindex def_yygindex
--#define yytable def_yytable
--#define yycheck def_yycheck
--
--typedef struct def_pool_str {
-- struct def_pool_str *next;
-- char data[1];
--} def_pool_str;
--
--static def_pool_str *pool_strs = NULL;
--
--static char *def_pool_alloc (size_t sz);
--static char *def_pool_strdup (const char *str);
--static void def_pool_free (void);
--
--static void def_description (const char *);
--static void def_exports (const char *, const char *, int, int, const char *);
--static void def_heapsize (int, int);
--static void def_import (const char *, const char *, const char *, const char *,
-- int, const char *);
--static void def_image_name (const char *, bfd_vma, int);
--static void def_section (const char *, int);
--static void def_section_alt (const char *, const char *);
--static void def_stacksize (int, int);
--static void def_version (int, int);
--static void def_directive (char *);
--static void def_aligncomm (char *str, int align);
--static int def_parse (void);
--static int def_error (const char *);
--static int def_lex (void);
--
--static int lex_forced_token = 0;
--static const char *lex_parse_string = 0;
--static const char *lex_parse_string_end = 0;
--
--
--
--/* Enabling traces. */
--#ifndef YYDEBUG
--# define YYDEBUG 0
--#endif
--
--/* Enabling verbose error messages. */
--#ifdef YYERROR_VERBOSE
--# undef YYERROR_VERBOSE
--# define YYERROR_VERBOSE 1
--#else
--# define YYERROR_VERBOSE 0
--#endif
--
--/* Enabling the token table. */
--#ifndef YYTOKEN_TABLE
--# define YYTOKEN_TABLE 0
--#endif
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 114 "deffilep.y"
--{
-- char *id;
-- const char *id_const;
-- int number;
-- bfd_vma vma;
-- char *digits;
--}
--/* Line 193 of yacc.c. */
--#line 277 "deffilep.c"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--
--
--/* Copy the second part of user declarations. */
--
--
--/* Line 216 of yacc.c. */
--#line 290 "deffilep.c"
--
--#ifdef short
--# undef short
--#endif
--
--#ifdef YYTYPE_UINT8
--typedef YYTYPE_UINT8 yytype_uint8;
--#else
--typedef unsigned char yytype_uint8;
--#endif
--
--#ifdef YYTYPE_INT8
--typedef YYTYPE_INT8 yytype_int8;
--#elif (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--typedef signed char yytype_int8;
--#else
--typedef short int yytype_int8;
--#endif
--
--#ifdef YYTYPE_UINT16
--typedef YYTYPE_UINT16 yytype_uint16;
--#else
--typedef unsigned short int yytype_uint16;
--#endif
--
--#ifdef YYTYPE_INT16
--typedef YYTYPE_INT16 yytype_int16;
--#else
--typedef short int yytype_int16;
--#endif
--
--#ifndef YYSIZE_T
--# ifdef __SIZE_TYPE__
--# define YYSIZE_T __SIZE_TYPE__
--# elif defined size_t
--# define YYSIZE_T size_t
--# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stddef.h> /* INFRINGES ON USER NAME SPACE */
--# define YYSIZE_T size_t
--# else
--# define YYSIZE_T unsigned int
--# endif
--#endif
--
--#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
--
--#ifndef YY_
--# if defined YYENABLE_NLS && YYENABLE_NLS
--# if ENABLE_NLS
--# include <libintl.h> /* INFRINGES ON USER NAME SPACE */
--# define YY_(msgid) dgettext ("bison-runtime", msgid)
--# endif
--# endif
--# ifndef YY_
--# define YY_(msgid) msgid
--# endif
--#endif
--
--/* Suppress unused-variable warnings by "using" E. */
--#if ! defined lint || defined __GNUC__
--# define YYUSE(e) ((void) (e))
--#else
--# define YYUSE(e) /* empty */
--#endif
--
--/* Identity function, used to suppress warnings about constant conditions. */
--#ifndef lint
--# define YYID(n) (n)
--#else
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static int
--YYID (int i)
--#else
--static int
--YYID (i)
-- int i;
--#endif
--{
-- return i;
--}
--#endif
--
--#if ! defined yyoverflow || YYERROR_VERBOSE
--
--/* The parser invokes alloca or malloc; define the necessary symbols. */
--
--# ifdef YYSTACK_USE_ALLOCA
--# if YYSTACK_USE_ALLOCA
--# ifdef __GNUC__
--# define YYSTACK_ALLOC __builtin_alloca
--# elif defined __BUILTIN_VA_ARG_INCR
--# include <alloca.h> /* INFRINGES ON USER NAME SPACE */
--# elif defined _AIX
--# define YYSTACK_ALLOC __alloca
--# elif defined _MSC_VER
--# include <malloc.h> /* INFRINGES ON USER NAME SPACE */
--# define alloca _alloca
--# else
--# define YYSTACK_ALLOC alloca
--# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# endif
--# endif
--# endif
--
--# ifdef YYSTACK_ALLOC
-- /* Pacify GCC's `empty if-body' warning. */
--# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0))
--# ifndef YYSTACK_ALLOC_MAXIMUM
-- /* The OS might guarantee only one guard page at the bottom of the stack,
-- and a page size can be as small as 4096 bytes. So we cannot safely
-- invoke alloca (N) if N exceeds 4096. Use a slightly smaller number
-- to allow for a few compiler-allocated temporary stack slots. */
--# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
--# endif
--# else
--# define YYSTACK_ALLOC YYMALLOC
--# define YYSTACK_FREE YYFREE
--# ifndef YYSTACK_ALLOC_MAXIMUM
--# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
--# endif
--# if (defined __cplusplus && ! defined _STDLIB_H \
-- && ! ((defined YYMALLOC || defined malloc) \
-- && (defined YYFREE || defined free)))
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# ifndef YYMALLOC
--# define YYMALLOC malloc
--# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# ifndef YYFREE
--# define YYFREE free
--# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void free (void *); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# endif
--#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
--
--
--#if (! defined yyoverflow \
-- && (! defined __cplusplus \
-- || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
--
--/* A type that is properly aligned for any stack member. */
--union yyalloc
--{
-- yytype_int16 yyss;
-- YYSTYPE yyvs;
-- };
--
--/* The size of the maximum gap between one aligned stack and the next. */
--# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
--
--/* The size of an array large to enough to hold all stacks, each with
-- N elements. */
--# define YYSTACK_BYTES(N) \
-- ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \
-- + YYSTACK_GAP_MAXIMUM)
--
--/* Copy COUNT objects from FROM to TO. The source and destination do
-- not overlap. */
--# ifndef YYCOPY
--# if defined __GNUC__ && 1 < __GNUC__
--# define YYCOPY(To, From, Count) \
-- __builtin_memcpy (To, From, (Count) * sizeof (*(From)))
--# else
--# define YYCOPY(To, From, Count) \
-- do \
-- { \
-- YYSIZE_T yyi; \
-- for (yyi = 0; yyi < (Count); yyi++) \
-- (To)[yyi] = (From)[yyi]; \
-- } \
-- while (YYID (0))
--# endif
--# endif
--
--/* Relocate STACK from its old location to the new one. The
-- local variables YYSIZE and YYSTACKSIZE give the old and new number of
-- elements in the stack, and YYPTR gives the new location of the
-- stack. Advance YYPTR to a properly aligned location for the next
-- stack. */
--# define YYSTACK_RELOCATE(Stack) \
-- do \
-- { \
-- YYSIZE_T yynewbytes; \
-- YYCOPY (&yyptr->Stack, Stack, yysize); \
-- Stack = &yyptr->Stack; \
-- yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
-- yyptr += yynewbytes / sizeof (*yyptr); \
-- } \
-- while (YYID (0))
--
--#endif
--
--/* YYFINAL -- State number of the termination state. */
--#define YYFINAL 69
--/* YYLAST -- Last index in YYTABLE. */
--#define YYLAST 149
--
--/* YYNTOKENS -- Number of terminals. */
--#define YYNTOKENS 35
--/* YYNNTS -- Number of nonterminals. */
--#define YYNNTS 27
--/* YYNRULES -- Number of rules. */
--#define YYNRULES 99
--/* YYNRULES -- Number of states. */
--#define YYNSTATES 146
--
--/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */
--#define YYUNDEFTOK 2
--#define YYMAXUTOK 285
--
--#define YYTRANSLATE(YYX) \
-- ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
--
--/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */
--static const yytype_uint8 yytranslate[] =
--{
-- 0, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 32, 2, 31, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 33, 2, 2, 34, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 1, 2, 3, 4,
-- 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
-- 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30
--};
--
--#if YYDEBUG
--/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
-- YYRHS. */
--static const yytype_uint16 yyprhs[] =
--{
-- 0, 0, 3, 6, 8, 12, 16, 19, 23, 27,
-- 30, 33, 36, 39, 42, 45, 50, 53, 58, 59,
-- 61, 64, 72, 76, 77, 79, 81, 83, 85, 87,
-- 89, 91, 93, 96, 98, 107, 116, 123, 130, 137,
-- 142, 145, 147, 150, 153, 157, 159, 161, 162, 165,
-- 166, 168, 170, 172, 174, 176, 178, 180, 182, 184,
-- 186, 188, 190, 192, 194, 196, 198, 200, 202, 204,
-- 206, 208, 210, 212, 214, 216, 218, 220, 223, 226,
-- 230, 234, 236, 237, 240, 241, 244, 245, 248, 249,
-- 253, 254, 256, 259, 264, 266, 267, 269, 270, 272
--};
--
--/* YYRHS -- A `-1'-separated list of the rules' RHS. */
--static const yytype_int8 yyrhs[] =
--{
-- 36, 0, -1, 36, 37, -1, 37, -1, 3, 52,
-- 56, -1, 4, 52, 56, -1, 5, 29, -1, 6,
-- 60, 48, -1, 7, 60, 48, -1, 8, 46, -1,
-- 9, 46, -1, 11, 44, -1, 12, 38, -1, 13,
-- 42, -1, 14, 60, -1, 14, 60, 31, 60, -1,
-- 27, 29, -1, 20, 57, 32, 60, -1, -1, 39,
-- -1, 38, 39, -1, 51, 55, 54, 47, 40, 47,
-- 53, -1, 41, 47, 40, -1, -1, 25, -1, 26,
-- -1, 16, -1, 17, -1, 9, -1, 10, -1, 18,
-- -1, 19, -1, 42, 43, -1, 43, -1, 29, 33,
-- 29, 31, 29, 31, 29, 53, -1, 29, 33, 29,
-- 31, 29, 31, 60, 53, -1, 29, 33, 29, 31,
-- 29, 53, -1, 29, 33, 29, 31, 60, 53, -1,
-- 29, 31, 29, 31, 29, 53, -1, 29, 31, 29,
-- 53, -1, 44, 45, -1, 45, -1, 29, 46, -1,
-- 29, 29, -1, 46, 47, 49, -1, 49, -1, 32,
-- -1, -1, 32, 60, -1, -1, 21, -1, 22, -1,
-- 23, -1, 24, -1, 15, -1, 8, -1, 16, -1,
-- 17, -1, 9, -1, 10, -1, 5, -1, 27, -1,
-- 23, -1, 12, -1, 7, -1, 13, -1, 3, -1,
-- 25, -1, 26, -1, 18, -1, 19, -1, 21, -1,
-- 24, -1, 6, -1, 14, -1, 22, -1, 29, -1,
-- 31, 50, -1, 31, 51, -1, 50, 31, 51, -1,
-- 29, 31, 51, -1, 51, -1, -1, 28, 29, -1,
-- -1, 34, 60, -1, -1, 33, 51, -1, -1, 15,
-- 33, 61, -1, -1, 29, -1, 31, 29, -1, 57,
-- 31, 58, 59, -1, 30, -1, -1, 29, -1, -1,
-- 30, -1, 30, -1
--};
--
--/* YYRLINE[YYN] -- source line where rule number YYN was defined. */
--static const yytype_uint16 yyrline[] =
--{
-- 0, 139, 139, 140, 144, 145, 146, 147, 148, 149,
-- 150, 151, 152, 153, 154, 155, 156, 157, 161, 163,
-- 164, 171, 178, 179, 182, 183, 184, 185, 186, 187,
-- 188, 189, 192, 193, 197, 199, 201, 203, 205, 207,
-- 212, 213, 217, 218, 222, 223, 227, 228, 230, 231,
-- 235, 236, 237, 238, 242, 243, 244, 245, 246, 247,
-- 248, 249, 250, 251, 252, 253, 260, 261, 262, 263,
-- 264, 265, 266, 267, 268, 269, 272, 273, 279, 285,
-- 291, 299, 300, 303, 304, 308, 309, 313, 314, 317,
-- 318, 321, 322, 328, 336, 337, 340, 341, 344, 346
--};
--#endif
--
--#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE
--/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
-- First, the terminals, then, starting at YYNTOKENS, nonterminals. */
--static const char *const yytname[] =
--{
-- "$end", "error", "$undefined", "NAME", "LIBRARY", "DESCRIPTION",
-- "STACKSIZE_K", "HEAPSIZE", "CODE", "DATAU", "DATAL", "SECTIONS",
-- "EXPORTS", "IMPORTS", "VERSIONK", "BASE", "CONSTANTU", "CONSTANTL",
-- "PRIVATEU", "PRIVATEL", "ALIGNCOMM", "READ", "WRITE", "EXECUTE",
-- "SHARED", "NONAMEU", "NONAMEL", "DIRECTIVE", "EQUAL", "ID", "DIGITS",
-- "'.'", "','", "'='", "'@'", "$accept", "start", "command", "explist",
-- "expline", "exp_opt_list", "exp_opt", "implist", "impline", "seclist",
-- "secline", "attr_list", "opt_comma", "opt_number", "attr",
-- "keyword_as_name", "opt_name2", "opt_name", "opt_equalequal_name",
-- "opt_ordinal", "opt_equal_name", "opt_base", "anylang_id", "opt_digits",
-- "opt_id", "NUMBER", "VMA", 0
--};
--#endif
--
--# ifdef YYPRINT
--/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to
-- token YYLEX-NUM. */
--static const yytype_uint16 yytoknum[] =
--{
-- 0, 256, 257, 258, 259, 260, 261, 262, 263, 264,
-- 265, 266, 267, 268, 269, 270, 271, 272, 273, 274,
-- 275, 276, 277, 278, 279, 280, 281, 282, 283, 284,
-- 285, 46, 44, 61, 64
--};
--# endif
--
--/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */
--static const yytype_uint8 yyr1[] =
--{
-- 0, 35, 36, 36, 37, 37, 37, 37, 37, 37,
-- 37, 37, 37, 37, 37, 37, 37, 37, 38, 38,
-- 38, 39, 40, 40, 41, 41, 41, 41, 41, 41,
-- 41, 41, 42, 42, 43, 43, 43, 43, 43, 43,
-- 44, 44, 45, 45, 46, 46, 47, 47, 48, 48,
-- 49, 49, 49, 49, 50, 50, 50, 50, 50, 50,
-- 50, 50, 50, 50, 50, 50, 50, 50, 50, 50,
-- 50, 50, 50, 50, 50, 50, 51, 51, 51, 51,
-- 51, 52, 52, 53, 53, 54, 54, 55, 55, 56,
-- 56, 57, 57, 57, 58, 58, 59, 59, 60, 61
--};
--
--/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */
--static const yytype_uint8 yyr2[] =
--{
-- 0, 2, 2, 1, 3, 3, 2, 3, 3, 2,
-- 2, 2, 2, 2, 2, 4, 2, 4, 0, 1,
-- 2, 7, 3, 0, 1, 1, 1, 1, 1, 1,
-- 1, 1, 2, 1, 8, 8, 6, 6, 6, 4,
-- 2, 1, 2, 2, 3, 1, 1, 0, 2, 0,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 2, 2, 3,
-- 3, 1, 0, 2, 0, 2, 0, 2, 0, 3,
-- 0, 1, 2, 4, 1, 0, 1, 0, 1, 1
--};
--
--/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
-- STATE-NUM when YYTABLE doesn't specify something else to do. Zero
-- means the default is an error. */
--static const yytype_uint8 yydefact[] =
--{
-- 0, 82, 82, 0, 0, 0, 0, 0, 0, 18,
-- 0, 0, 0, 0, 0, 3, 66, 60, 73, 64,
-- 55, 58, 59, 63, 65, 74, 54, 56, 57, 69,
-- 70, 71, 75, 62, 72, 67, 68, 61, 76, 0,
-- 0, 81, 90, 90, 6, 98, 49, 49, 50, 51,
-- 52, 53, 9, 45, 10, 0, 11, 41, 12, 19,
-- 88, 0, 13, 33, 14, 91, 0, 0, 16, 1,
-- 2, 0, 77, 78, 0, 0, 4, 5, 0, 7,
-- 8, 46, 0, 43, 42, 40, 20, 0, 86, 0,
-- 0, 32, 0, 92, 95, 0, 80, 79, 0, 48,
-- 44, 87, 0, 47, 84, 0, 15, 94, 97, 17,
-- 99, 89, 85, 23, 0, 0, 39, 0, 96, 93,
-- 28, 29, 26, 27, 30, 31, 24, 25, 47, 47,
-- 83, 84, 84, 84, 84, 23, 38, 0, 36, 37,
-- 21, 22, 84, 84, 34, 35
--};
--
--/* YYDEFGOTO[NTERM-NUM]. */
--static const yytype_int16 yydefgoto[] =
--{
-- -1, 14, 15, 58, 59, 128, 129, 62, 63, 56,
-- 57, 52, 82, 79, 53, 40, 41, 42, 116, 103,
-- 88, 76, 67, 108, 119, 46, 111
--};
--
--/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
-- STATE-NUM. */
--#define YYPACT_NINF -82
--static const yytype_int8 yypact[] =
--{
-- 122, 11, 11, -25, 9, 9, 53, 53, -17, 11,
-- 14, 9, -18, 20, 95, -82, -82, -82, -82, -82,
-- -82, -82, -82, -82, -82, -82, -82, -82, -82, -82,
-- -82, -82, -82, -82, -82, -82, -82, -82, 29, 11,
-- 47, -82, 67, 67, -82, -82, 54, 54, -82, -82,
-- -82, -82, 48, -82, 48, -14, -17, -82, 11, -82,
-- 58, 50, 14, -82, 61, -82, 64, 33, -82, -82,
-- -82, 11, 47, -82, 11, 63, -82, -82, 9, -82,
-- -82, -82, 53, -82, 48, -82, -82, 11, 60, 76,
-- 81, -82, 9, -82, 83, 9, -82, -82, 84, -82,
-- -82, -82, 9, 79, -26, 85, -82, -82, 88, -82,
-- -82, -82, -82, 36, 89, 90, -82, 55, -82, -82,
-- -82, -82, -82, -82, -82, -82, -82, -82, 79, 79,
-- -82, 92, 13, 92, 92, 36, -82, 59, -82, -82,
-- -82, -82, 92, 92, -82, -82
--};
--
--/* YYPGOTO[NTERM-NUM]. */
--static const yytype_int16 yypgoto[] =
--{
-- -82, -82, 107, -82, 65, -11, -82, -82, 75, -82,
-- 82, -4, -81, 93, 57, 102, -8, 141, -75, -82,
-- -82, 101, -82, -82, -82, -5, -82
--};
--
--/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If
-- positive, shift that token. If negative, reduce the rule which
-- number is the opposite. If zero, do what YYDEFACT says.
-- If YYTABLE_NINF, syntax error. */
--#define YYTABLE_NINF -48
--static const yytype_int16 yytable[] =
--{
-- 47, 60, 114, 54, 44, 115, 64, 48, 49, 50,
-- 51, 65, 55, 66, 16, 83, 17, 18, 19, 20,
-- 21, 22, 113, 23, 24, 25, 26, 27, 28, 29,
-- 30, 73, 31, 32, 33, 34, 35, 36, 37, 45,
-- 38, 114, 39, 61, 137, 120, 121, 134, 135, 68,
-- 60, 84, 122, 123, 124, 125, 136, 138, 139, 140,
-- 71, 126, 127, 96, 94, 95, 97, 144, 145, -47,
-- -47, -47, -47, 99, 48, 49, 50, 51, 74, 101,
-- 81, 89, 75, 90, 132, 45, 78, 106, 142, 45,
-- 109, 87, 92, 93, 102, 69, 98, 112, 1, 2,
-- 3, 4, 5, 6, 7, 104, 8, 9, 10, 11,
-- 105, 81, 133, 107, 110, 12, 117, 118, 130, 131,
-- 114, 70, 13, 86, 141, 1, 2, 3, 4, 5,
-- 6, 7, 143, 8, 9, 10, 11, 91, 85, 100,
-- 80, 72, 12, 43, 77, 0, 0, 0, 0, 13
--};
--
--static const yytype_int16 yycheck[] =
--{
-- 5, 9, 28, 7, 29, 31, 11, 21, 22, 23,
-- 24, 29, 29, 31, 3, 29, 5, 6, 7, 8,
-- 9, 10, 103, 12, 13, 14, 15, 16, 17, 18,
-- 19, 39, 21, 22, 23, 24, 25, 26, 27, 30,
-- 29, 28, 31, 29, 31, 9, 10, 128, 129, 29,
-- 58, 55, 16, 17, 18, 19, 131, 132, 133, 134,
-- 31, 25, 26, 71, 31, 32, 74, 142, 143, 21,
-- 22, 23, 24, 78, 21, 22, 23, 24, 31, 87,
-- 32, 31, 15, 33, 29, 30, 32, 92, 29, 30,
-- 95, 33, 31, 29, 34, 0, 33, 102, 3, 4,
-- 5, 6, 7, 8, 9, 29, 11, 12, 13, 14,
-- 29, 32, 117, 30, 30, 20, 31, 29, 29, 29,
-- 28, 14, 27, 58, 135, 3, 4, 5, 6, 7,
-- 8, 9, 137, 11, 12, 13, 14, 62, 56, 82,
-- 47, 39, 20, 2, 43, -1, -1, -1, -1, 27
--};
--
--/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
-- symbol of state STATE-NUM. */
--static const yytype_uint8 yystos[] =
--{
-- 0, 3, 4, 5, 6, 7, 8, 9, 11, 12,
-- 13, 14, 20, 27, 36, 37, 3, 5, 6, 7,
-- 8, 9, 10, 12, 13, 14, 15, 16, 17, 18,
-- 19, 21, 22, 23, 24, 25, 26, 27, 29, 31,
-- 50, 51, 52, 52, 29, 30, 60, 60, 21, 22,
-- 23, 24, 46, 49, 46, 29, 44, 45, 38, 39,
-- 51, 29, 42, 43, 60, 29, 31, 57, 29, 0,
-- 37, 31, 50, 51, 31, 15, 56, 56, 32, 48,
-- 48, 32, 47, 29, 46, 45, 39, 33, 55, 31,
-- 33, 43, 31, 29, 31, 32, 51, 51, 33, 60,
-- 49, 51, 34, 54, 29, 29, 60, 30, 58, 60,
-- 30, 61, 60, 47, 28, 31, 53, 31, 29, 59,
-- 9, 10, 16, 17, 18, 19, 25, 26, 40, 41,
-- 29, 29, 29, 60, 47, 47, 53, 31, 53, 53,
-- 53, 40, 29, 60, 53, 53
--};
--
--#define yyerrok (yyerrstatus = 0)
--#define yyclearin (yychar = YYEMPTY)
--#define YYEMPTY (-2)
--#define YYEOF 0
--
--#define YYACCEPT goto yyacceptlab
--#define YYABORT goto yyabortlab
--#define YYERROR goto yyerrorlab
--
--
--/* Like YYERROR except do call yyerror. This remains here temporarily
-- to ease the transition to the new meaning of YYERROR, for GCC.
-- Once GCC version 2 has supplanted version 1, this can go. */
--
--#define YYFAIL goto yyerrlab
--
--#define YYRECOVERING() (!!yyerrstatus)
--
--#define YYBACKUP(Token, Value) \
--do \
-- if (yychar == YYEMPTY && yylen == 1) \
-- { \
-- yychar = (Token); \
-- yylval = (Value); \
-- yytoken = YYTRANSLATE (yychar); \
-- YYPOPSTACK (1); \
-- goto yybackup; \
-- } \
-- else \
-- { \
-- yyerror (YY_("syntax error: cannot back up")); \
-- YYERROR; \
-- } \
--while (YYID (0))
--
--
--#define YYTERROR 1
--#define YYERRCODE 256
--
--
--/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
-- If N is 0, then set CURRENT to the empty location which ends
-- the previous symbol: RHS[0] (always defined). */
--
--#define YYRHSLOC(Rhs, K) ((Rhs)[K])
--#ifndef YYLLOC_DEFAULT
--# define YYLLOC_DEFAULT(Current, Rhs, N) \
-- do \
-- if (YYID (N)) \
-- { \
-- (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \
-- (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \
-- (Current).last_line = YYRHSLOC (Rhs, N).last_line; \
-- (Current).last_column = YYRHSLOC (Rhs, N).last_column; \
-- } \
-- else \
-- { \
-- (Current).first_line = (Current).last_line = \
-- YYRHSLOC (Rhs, 0).last_line; \
-- (Current).first_column = (Current).last_column = \
-- YYRHSLOC (Rhs, 0).last_column; \
-- } \
-- while (YYID (0))
--#endif
--
--
--/* YY_LOCATION_PRINT -- Print the location on the stream.
-- This macro was not mandated originally: define only if we know
-- we won't break user code: when these are the locations we know. */
--
--#ifndef YY_LOCATION_PRINT
--# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL
--# define YY_LOCATION_PRINT(File, Loc) \
-- fprintf (File, "%d.%d-%d.%d", \
-- (Loc).first_line, (Loc).first_column, \
-- (Loc).last_line, (Loc).last_column)
--# else
--# define YY_LOCATION_PRINT(File, Loc) ((void) 0)
--# endif
--#endif
--
--
--/* YYLEX -- calling `yylex' with the right arguments. */
--
--#ifdef YYLEX_PARAM
--# define YYLEX yylex (YYLEX_PARAM)
--#else
--# define YYLEX yylex ()
--#endif
--
--/* Enable debugging if requested. */
--#if YYDEBUG
--
--# ifndef YYFPRINTF
--# include <stdio.h> /* INFRINGES ON USER NAME SPACE */
--# define YYFPRINTF fprintf
--# endif
--
--# define YYDPRINTF(Args) \
--do { \
-- if (yydebug) \
-- YYFPRINTF Args; \
--} while (YYID (0))
--
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \
--do { \
-- if (yydebug) \
-- { \
-- YYFPRINTF (stderr, "%s ", Title); \
-- yy_symbol_print (stderr, \
-- Type, Value); \
-- YYFPRINTF (stderr, "\n"); \
-- } \
--} while (YYID (0))
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_value_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (!yyvaluep)
-- return;
--# ifdef YYPRINT
-- if (yytype < YYNTOKENS)
-- YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
--# else
-- YYUSE (yyoutput);
--# endif
-- switch (yytype)
-- {
-- default:
-- break;
-- }
--}
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (yytype < YYNTOKENS)
-- YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
-- else
-- YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
--
-- yy_symbol_value_print (yyoutput, yytype, yyvaluep);
-- YYFPRINTF (yyoutput, ")");
--}
--
--/*------------------------------------------------------------------.
--| yy_stack_print -- Print the state stack from its BOTTOM up to its |
--| TOP (included). |
--`------------------------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_stack_print (yytype_int16 *bottom, yytype_int16 *top)
--#else
--static void
--yy_stack_print (bottom, top)
-- yytype_int16 *bottom;
-- yytype_int16 *top;
--#endif
--{
-- YYFPRINTF (stderr, "Stack now");
-- for (; bottom <= top; ++bottom)
-- YYFPRINTF (stderr, " %d", *bottom);
-- YYFPRINTF (stderr, "\n");
--}
--
--# define YY_STACK_PRINT(Bottom, Top) \
--do { \
-- if (yydebug) \
-- yy_stack_print ((Bottom), (Top)); \
--} while (YYID (0))
--
--
--/*------------------------------------------------.
--| Report that the YYRULE is going to be reduced. |
--`------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_reduce_print (YYSTYPE *yyvsp, int yyrule)
--#else
--static void
--yy_reduce_print (yyvsp, yyrule)
-- YYSTYPE *yyvsp;
-- int yyrule;
--#endif
--{
-- int yynrhs = yyr2[yyrule];
-- int yyi;
-- unsigned long int yylno = yyrline[yyrule];
-- YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
-- yyrule - 1, yylno);
-- /* The symbols being reduced. */
-- for (yyi = 0; yyi < yynrhs; yyi++)
-- {
-- fprintf (stderr, " $%d = ", yyi + 1);
-- yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi],
-- &(yyvsp[(yyi + 1) - (yynrhs)])
-- );
-- fprintf (stderr, "\n");
-- }
--}
--
--# define YY_REDUCE_PRINT(Rule) \
--do { \
-- if (yydebug) \
-- yy_reduce_print (yyvsp, Rule); \
--} while (YYID (0))
--
--/* Nonzero means print parse trace. It is left uninitialized so that
-- multiple parsers can coexist. */
--int yydebug;
--#else /* !YYDEBUG */
--# define YYDPRINTF(Args)
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
--# define YY_STACK_PRINT(Bottom, Top)
--# define YY_REDUCE_PRINT(Rule)
--#endif /* !YYDEBUG */
--
--
--/* YYINITDEPTH -- initial size of the parser's stacks. */
--#ifndef YYINITDEPTH
--# define YYINITDEPTH 200
--#endif
--
--/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
-- if the built-in stack extension method is used).
--
-- Do not make this value too large; the results are undefined if
-- YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
-- evaluated with infinite-precision integer arithmetic. */
--
--#ifndef YYMAXDEPTH
--# define YYMAXDEPTH 10000
--#endif
--
--
--
--#if YYERROR_VERBOSE
--
--# ifndef yystrlen
--# if defined __GLIBC__ && defined _STRING_H
--# define yystrlen strlen
--# else
--/* Return the length of YYSTR. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static YYSIZE_T
--yystrlen (const char *yystr)
--#else
--static YYSIZE_T
--yystrlen (yystr)
-- const char *yystr;
--#endif
--{
-- YYSIZE_T yylen;
-- for (yylen = 0; yystr[yylen]; yylen++)
-- continue;
-- return yylen;
--}
--# endif
--# endif
--
--# ifndef yystpcpy
--# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
--# define yystpcpy stpcpy
--# else
--/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
-- YYDEST. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static char *
--yystpcpy (char *yydest, const char *yysrc)
--#else
--static char *
--yystpcpy (yydest, yysrc)
-- char *yydest;
-- const char *yysrc;
--#endif
--{
-- char *yyd = yydest;
-- const char *yys = yysrc;
--
-- while ((*yyd++ = *yys++) != '\0')
-- continue;
--
-- return yyd - 1;
--}
--# endif
--# endif
--
--# ifndef yytnamerr
--/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
-- quotes and backslashes, so that it's suitable for yyerror. The
-- heuristic is that double-quoting is unnecessary unless the string
-- contains an apostrophe, a comma, or backslash (other than
-- backslash-backslash). YYSTR is taken from yytname. If YYRES is
-- null, do not copy; instead, return the length of what the result
-- would have been. */
--static YYSIZE_T
--yytnamerr (char *yyres, const char *yystr)
--{
-- if (*yystr == '"')
-- {
-- YYSIZE_T yyn = 0;
-- char const *yyp = yystr;
--
-- for (;;)
-- switch (*++yyp)
-- {
-- case '\'':
-- case ',':
-- goto do_not_strip_quotes;
--
-- case '\\':
-- if (*++yyp != '\\')
-- goto do_not_strip_quotes;
-- /* Fall through. */
-- default:
-- if (yyres)
-- yyres[yyn] = *yyp;
-- yyn++;
-- break;
--
-- case '"':
-- if (yyres)
-- yyres[yyn] = '\0';
-- return yyn;
-- }
-- do_not_strip_quotes: ;
-- }
--
-- if (! yyres)
-- return yystrlen (yystr);
--
-- return yystpcpy (yyres, yystr) - yyres;
--}
--# endif
--
--/* Copy into YYRESULT an error message about the unexpected token
-- YYCHAR while in state YYSTATE. Return the number of bytes copied,
-- including the terminating null byte. If YYRESULT is null, do not
-- copy anything; just return the number of bytes that would be
-- copied. As a special case, return 0 if an ordinary "syntax error"
-- message will do. Return YYSIZE_MAXIMUM if overflow occurs during
-- size calculation. */
--static YYSIZE_T
--yysyntax_error (char *yyresult, int yystate, int yychar)
--{
-- int yyn = yypact[yystate];
--
-- if (! (YYPACT_NINF < yyn && yyn <= YYLAST))
-- return 0;
-- else
-- {
-- int yytype = YYTRANSLATE (yychar);
-- YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]);
-- YYSIZE_T yysize = yysize0;
-- YYSIZE_T yysize1;
-- int yysize_overflow = 0;
-- enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
-- char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
-- int yyx;
--
--# if 0
-- /* This is so xgettext sees the translatable formats that are
-- constructed on the fly. */
-- YY_("syntax error, unexpected %s");
-- YY_("syntax error, unexpected %s, expecting %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s");
--# endif
-- char *yyfmt;
-- char const *yyf;
-- static char const yyunexpected[] = "syntax error, unexpected %s";
-- static char const yyexpecting[] = ", expecting %s";
-- static char const yyor[] = " or %s";
-- char yyformat[sizeof yyunexpected
-- + sizeof yyexpecting - 1
-- + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2)
-- * (sizeof yyor - 1))];
-- char const *yyprefix = yyexpecting;
--
-- /* Start YYX at -YYN if negative to avoid negative indexes in
-- YYCHECK. */
-- int yyxbegin = yyn < 0 ? -yyn : 0;
--
-- /* Stay within bounds of both yycheck and yytname. */
-- int yychecklim = YYLAST - yyn + 1;
-- int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
-- int yycount = 1;
--
-- yyarg[0] = yytname[yytype];
-- yyfmt = yystpcpy (yyformat, yyunexpected);
--
-- for (yyx = yyxbegin; yyx < yyxend; ++yyx)
-- if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
-- {
-- if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
-- {
-- yycount = 1;
-- yysize = yysize0;
-- yyformat[sizeof yyunexpected - 1] = '\0';
-- break;
-- }
-- yyarg[yycount++] = yytname[yyx];
-- yysize1 = yysize + yytnamerr (0, yytname[yyx]);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
-- yyfmt = yystpcpy (yyfmt, yyprefix);
-- yyprefix = yyor;
-- }
--
-- yyf = YY_(yyformat);
-- yysize1 = yysize + yystrlen (yyf);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
--
-- if (yysize_overflow)
-- return YYSIZE_MAXIMUM;
--
-- if (yyresult)
-- {
-- /* Avoid sprintf, as that infringes on the user's name space.
-- Don't have undefined behavior even if the translation
-- produced a string with the wrong number of "%s"s. */
-- char *yyp = yyresult;
-- int yyi = 0;
-- while ((*yyp = *yyf) != '\0')
-- {
-- if (*yyp == '%' && yyf[1] == 's' && yyi < yycount)
-- {
-- yyp += yytnamerr (yyp, yyarg[yyi++]);
-- yyf += 2;
-- }
-- else
-- {
-- yyp++;
-- yyf++;
-- }
-- }
-- }
-- return yysize;
-- }
--}
--#endif /* YYERROR_VERBOSE */
--
--
--/*-----------------------------------------------.
--| Release the memory associated to this symbol. |
--`-----------------------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep)
--#else
--static void
--yydestruct (yymsg, yytype, yyvaluep)
-- const char *yymsg;
-- int yytype;
-- YYSTYPE *yyvaluep;
--#endif
--{
-- YYUSE (yyvaluep);
--
-- if (!yymsg)
-- yymsg = "Deleting";
-- YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
--
-- switch (yytype)
-- {
--
-- default:
-- break;
-- }
--}
--
--
--/* Prevent warnings from -Wmissing-prototypes. */
--
--#ifdef YYPARSE_PARAM
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void *YYPARSE_PARAM);
--#else
--int yyparse ();
--#endif
--#else /* ! YYPARSE_PARAM */
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void);
--#else
--int yyparse ();
--#endif
--#endif /* ! YYPARSE_PARAM */
--
--
--
--/* The look-ahead symbol. */
--int yychar;
--
--/* The semantic value of the look-ahead symbol. */
--YYSTYPE yylval;
--
--/* Number of syntax errors so far. */
--int yynerrs;
--
--
--
--/*----------.
--| yyparse. |
--`----------*/
--
--#ifdef YYPARSE_PARAM
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void *YYPARSE_PARAM)
--#else
--int
--yyparse (YYPARSE_PARAM)
-- void *YYPARSE_PARAM;
--#endif
--#else /* ! YYPARSE_PARAM */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void)
--#else
--int
--yyparse ()
--
--#endif
--#endif
--{
--
-- int yystate;
-- int yyn;
-- int yyresult;
-- /* Number of tokens to shift before error messages enabled. */
-- int yyerrstatus;
-- /* Look-ahead token as an internal (translated) token number. */
-- int yytoken = 0;
--#if YYERROR_VERBOSE
-- /* Buffer for error messages, and its allocated size. */
-- char yymsgbuf[128];
-- char *yymsg = yymsgbuf;
-- YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
--#endif
--
-- /* Three stacks and their tools:
-- `yyss': related to states,
-- `yyvs': related to semantic values,
-- `yyls': related to locations.
--
-- Refer to the stacks thru separate pointers, to allow yyoverflow
-- to reallocate them elsewhere. */
--
-- /* The state stack. */
-- yytype_int16 yyssa[YYINITDEPTH];
-- yytype_int16 *yyss = yyssa;
-- yytype_int16 *yyssp;
--
-- /* The semantic value stack. */
-- YYSTYPE yyvsa[YYINITDEPTH];
-- YYSTYPE *yyvs = yyvsa;
-- YYSTYPE *yyvsp;
--
--
--
--#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N))
--
-- YYSIZE_T yystacksize = YYINITDEPTH;
--
-- /* The variables used to return semantic value and location from the
-- action routines. */
-- YYSTYPE yyval;
--
--
-- /* The number of symbols on the RHS of the reduced rule.
-- Keep to zero when no symbol should be popped. */
-- int yylen = 0;
--
-- YYDPRINTF ((stderr, "Starting parse\n"));
--
-- yystate = 0;
-- yyerrstatus = 0;
-- yynerrs = 0;
-- yychar = YYEMPTY; /* Cause a token to be read. */
--
-- /* Initialize stack pointers.
-- Waste one element of value and location stack
-- so that they stay on the same level as the state stack.
-- The wasted elements are never initialized. */
--
-- yyssp = yyss;
-- yyvsp = yyvs;
--
-- goto yysetstate;
--
--/*------------------------------------------------------------.
--| yynewstate -- Push a new state, which is found in yystate. |
--`------------------------------------------------------------*/
-- yynewstate:
-- /* In all cases, when you get here, the value and location stacks
-- have just been pushed. So pushing a state here evens the stacks. */
-- yyssp++;
--
-- yysetstate:
-- *yyssp = yystate;
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- {
-- /* Get the current used size of the three stacks, in elements. */
-- YYSIZE_T yysize = yyssp - yyss + 1;
--
--#ifdef yyoverflow
-- {
-- /* Give user a chance to reallocate the stack. Use copies of
-- these so that the &'s don't force the real ones into
-- memory. */
-- YYSTYPE *yyvs1 = yyvs;
-- yytype_int16 *yyss1 = yyss;
--
--
-- /* Each stack pointer address is followed by the size of the
-- data in use in that stack, in bytes. This used to be a
-- conditional around just the two extra args, but that might
-- be undefined if yyoverflow is a macro. */
-- yyoverflow (YY_("memory exhausted"),
-- &yyss1, yysize * sizeof (*yyssp),
-- &yyvs1, yysize * sizeof (*yyvsp),
--
-- &yystacksize);
--
-- yyss = yyss1;
-- yyvs = yyvs1;
-- }
--#else /* no yyoverflow */
--# ifndef YYSTACK_RELOCATE
-- goto yyexhaustedlab;
--# else
-- /* Extend the stack our own way. */
-- if (YYMAXDEPTH <= yystacksize)
-- goto yyexhaustedlab;
-- yystacksize *= 2;
-- if (YYMAXDEPTH < yystacksize)
-- yystacksize = YYMAXDEPTH;
--
-- {
-- yytype_int16 *yyss1 = yyss;
-- union yyalloc *yyptr =
-- (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
-- if (! yyptr)
-- goto yyexhaustedlab;
-- YYSTACK_RELOCATE (yyss);
-- YYSTACK_RELOCATE (yyvs);
--
--# undef YYSTACK_RELOCATE
-- if (yyss1 != yyssa)
-- YYSTACK_FREE (yyss1);
-- }
--# endif
--#endif /* no yyoverflow */
--
-- yyssp = yyss + yysize - 1;
-- yyvsp = yyvs + yysize - 1;
--
--
-- YYDPRINTF ((stderr, "Stack size increased to %lu\n",
-- (unsigned long int) yystacksize));
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- YYABORT;
-- }
--
-- YYDPRINTF ((stderr, "Entering state %d\n", yystate));
--
-- goto yybackup;
--
--/*-----------.
--| yybackup. |
--`-----------*/
--yybackup:
--
-- /* Do appropriate processing given the current state. Read a
-- look-ahead token if we need one and don't already have one. */
--
-- /* First try to decide what to do without reference to look-ahead token. */
-- yyn = yypact[yystate];
-- if (yyn == YYPACT_NINF)
-- goto yydefault;
--
-- /* Not known => get a look-ahead token if don't already have one. */
--
-- /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */
-- if (yychar == YYEMPTY)
-- {
-- YYDPRINTF ((stderr, "Reading a token: "));
-- yychar = YYLEX;
-- }
--
-- if (yychar <= YYEOF)
-- {
-- yychar = yytoken = YYEOF;
-- YYDPRINTF ((stderr, "Now at end of input.\n"));
-- }
-- else
-- {
-- yytoken = YYTRANSLATE (yychar);
-- YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
-- }
--
-- /* If the proper action on seeing token YYTOKEN is to reduce or to
-- detect an error, take that action. */
-- yyn += yytoken;
-- if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
-- goto yydefault;
-- yyn = yytable[yyn];
-- if (yyn <= 0)
-- {
-- if (yyn == 0 || yyn == YYTABLE_NINF)
-- goto yyerrlab;
-- yyn = -yyn;
-- goto yyreduce;
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- /* Count tokens shifted since error; after three, turn off error
-- status. */
-- if (yyerrstatus)
-- yyerrstatus--;
--
-- /* Shift the look-ahead token. */
-- YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
--
-- /* Discard the shifted token unless it is eof. */
-- if (yychar != YYEOF)
-- yychar = YYEMPTY;
--
-- yystate = yyn;
-- *++yyvsp = yylval;
--
-- goto yynewstate;
--
--
--/*-----------------------------------------------------------.
--| yydefault -- do the default action for the current state. |
--`-----------------------------------------------------------*/
--yydefault:
-- yyn = yydefact[yystate];
-- if (yyn == 0)
-- goto yyerrlab;
-- goto yyreduce;
--
--
--/*-----------------------------.
--| yyreduce -- Do a reduction. |
--`-----------------------------*/
--yyreduce:
-- /* yyn is the number of a rule to reduce with. */
-- yylen = yyr2[yyn];
--
-- /* If YYLEN is nonzero, implement the default value of the action:
-- `$$ = $1'.
--
-- Otherwise, the following line sets YYVAL to garbage.
-- This behavior is undocumented and Bison
-- users should not rely upon it. Assigning to YYVAL
-- unconditionally makes the parser a bit smaller, and it avoids a
-- GCC warning that YYVAL may be used uninitialized. */
-- yyval = yyvsp[1-yylen];
--
--
-- YY_REDUCE_PRINT (yyn);
-- switch (yyn)
-- {
-- case 4:
--#line 144 "deffilep.y"
-- { def_image_name ((yyvsp[(2) - (3)].id), (yyvsp[(3) - (3)].vma), 0); }
-- break;
--
-- case 5:
--#line 145 "deffilep.y"
-- { def_image_name ((yyvsp[(2) - (3)].id), (yyvsp[(3) - (3)].vma), 1); }
-- break;
--
-- case 6:
--#line 146 "deffilep.y"
-- { def_description ((yyvsp[(2) - (2)].id));}
-- break;
--
-- case 7:
--#line 147 "deffilep.y"
-- { def_stacksize ((yyvsp[(2) - (3)].number), (yyvsp[(3) - (3)].number));}
-- break;
--
-- case 8:
--#line 148 "deffilep.y"
-- { def_heapsize ((yyvsp[(2) - (3)].number), (yyvsp[(3) - (3)].number));}
-- break;
--
-- case 9:
--#line 149 "deffilep.y"
-- { def_section ("CODE", (yyvsp[(2) - (2)].number));}
-- break;
--
-- case 10:
--#line 150 "deffilep.y"
-- { def_section ("DATA", (yyvsp[(2) - (2)].number));}
-- break;
--
-- case 14:
--#line 154 "deffilep.y"
-- { def_version ((yyvsp[(2) - (2)].number), 0);}
-- break;
--
-- case 15:
--#line 155 "deffilep.y"
-- { def_version ((yyvsp[(2) - (4)].number), (yyvsp[(4) - (4)].number));}
-- break;
--
-- case 16:
--#line 156 "deffilep.y"
-- { def_directive ((yyvsp[(2) - (2)].id));}
-- break;
--
-- case 17:
--#line 157 "deffilep.y"
-- { def_aligncomm ((yyvsp[(2) - (4)].id), (yyvsp[(4) - (4)].number));}
-- break;
--
-- case 21:
--#line 172 "deffilep.y"
-- { def_exports ((yyvsp[(1) - (7)].id), (yyvsp[(2) - (7)].id), (yyvsp[(3) - (7)].number), (yyvsp[(5) - (7)].number), (yyvsp[(7) - (7)].id)); }
-- break;
--
-- case 22:
--#line 178 "deffilep.y"
-- { (yyval.number) = (yyvsp[(1) - (3)].number) | (yyvsp[(3) - (3)].number); }
-- break;
--
-- case 23:
--#line 179 "deffilep.y"
-- { (yyval.number) = 0; }
-- break;
--
-- case 24:
--#line 182 "deffilep.y"
-- { (yyval.number) = 1; }
-- break;
--
-- case 25:
--#line 183 "deffilep.y"
-- { (yyval.number) = 1; }
-- break;
--
-- case 26:
--#line 184 "deffilep.y"
-- { (yyval.number) = 2; }
-- break;
--
-- case 27:
--#line 185 "deffilep.y"
-- { (yyval.number) = 2; }
-- break;
--
-- case 28:
--#line 186 "deffilep.y"
-- { (yyval.number) = 4; }
-- break;
--
-- case 29:
--#line 187 "deffilep.y"
-- { (yyval.number) = 4; }
-- break;
--
-- case 30:
--#line 188 "deffilep.y"
-- { (yyval.number) = 8; }
-- break;
--
-- case 31:
--#line 189 "deffilep.y"
-- { (yyval.number) = 8; }
-- break;
--
-- case 34:
--#line 198 "deffilep.y"
-- { def_import ((yyvsp[(1) - (8)].id), (yyvsp[(3) - (8)].id), (yyvsp[(5) - (8)].id), (yyvsp[(7) - (8)].id), -1, (yyvsp[(8) - (8)].id)); }
-- break;
--
-- case 35:
--#line 200 "deffilep.y"
-- { def_import ((yyvsp[(1) - (8)].id), (yyvsp[(3) - (8)].id), (yyvsp[(5) - (8)].id), 0, (yyvsp[(7) - (8)].number), (yyvsp[(8) - (8)].id)); }
-- break;
--
-- case 36:
--#line 202 "deffilep.y"
-- { def_import ((yyvsp[(1) - (6)].id), (yyvsp[(3) - (6)].id), 0, (yyvsp[(5) - (6)].id), -1, (yyvsp[(6) - (6)].id)); }
-- break;
--
-- case 37:
--#line 204 "deffilep.y"
-- { def_import ((yyvsp[(1) - (6)].id), (yyvsp[(3) - (6)].id), 0, 0, (yyvsp[(5) - (6)].number), (yyvsp[(6) - (6)].id)); }
-- break;
--
-- case 38:
--#line 206 "deffilep.y"
-- { def_import( 0, (yyvsp[(1) - (6)].id), (yyvsp[(3) - (6)].id), (yyvsp[(5) - (6)].id), -1, (yyvsp[(6) - (6)].id)); }
-- break;
--
-- case 39:
--#line 208 "deffilep.y"
-- { def_import ( 0, (yyvsp[(1) - (4)].id), 0, (yyvsp[(3) - (4)].id), -1, (yyvsp[(4) - (4)].id)); }
-- break;
--
-- case 42:
--#line 217 "deffilep.y"
-- { def_section ((yyvsp[(1) - (2)].id), (yyvsp[(2) - (2)].number));}
-- break;
--
-- case 43:
--#line 218 "deffilep.y"
-- { def_section_alt ((yyvsp[(1) - (2)].id), (yyvsp[(2) - (2)].id));}
-- break;
--
-- case 44:
--#line 222 "deffilep.y"
-- { (yyval.number) = (yyvsp[(1) - (3)].number) | (yyvsp[(3) - (3)].number); }
-- break;
--
-- case 45:
--#line 223 "deffilep.y"
-- { (yyval.number) = (yyvsp[(1) - (1)].number); }
-- break;
--
-- case 48:
--#line 230 "deffilep.y"
-- { (yyval.number)=(yyvsp[(2) - (2)].number);}
-- break;
--
-- case 49:
--#line 231 "deffilep.y"
-- { (yyval.number)=-1;}
-- break;
--
-- case 50:
--#line 235 "deffilep.y"
-- { (yyval.number) = 1;}
-- break;
--
-- case 51:
--#line 236 "deffilep.y"
-- { (yyval.number) = 2;}
-- break;
--
-- case 52:
--#line 237 "deffilep.y"
-- { (yyval.number)=4;}
-- break;
--
-- case 53:
--#line 238 "deffilep.y"
-- { (yyval.number)=8;}
-- break;
--
-- case 54:
--#line 242 "deffilep.y"
-- { (yyval.id_const) = "BASE"; }
-- break;
--
-- case 55:
--#line 243 "deffilep.y"
-- { (yyval.id_const) = "CODE"; }
-- break;
--
-- case 56:
--#line 244 "deffilep.y"
-- { (yyval.id_const) = "CONSTANT"; }
-- break;
--
-- case 57:
--#line 245 "deffilep.y"
-- { (yyval.id_const) = "constant"; }
-- break;
--
-- case 58:
--#line 246 "deffilep.y"
-- { (yyval.id_const) = "DATA"; }
-- break;
--
-- case 59:
--#line 247 "deffilep.y"
-- { (yyval.id_const) = "data"; }
-- break;
--
-- case 60:
--#line 248 "deffilep.y"
-- { (yyval.id_const) = "DESCRIPTION"; }
-- break;
--
-- case 61:
--#line 249 "deffilep.y"
-- { (yyval.id_const) = "DIRECTIVE"; }
-- break;
--
-- case 62:
--#line 250 "deffilep.y"
-- { (yyval.id_const) = "EXECUTE"; }
-- break;
--
-- case 63:
--#line 251 "deffilep.y"
-- { (yyval.id_const) = "EXPORTS"; }
-- break;
--
-- case 64:
--#line 252 "deffilep.y"
-- { (yyval.id_const) = "HEAPSIZE"; }
-- break;
--
-- case 65:
--#line 253 "deffilep.y"
-- { (yyval.id_const) = "IMPORTS"; }
-- break;
--
-- case 66:
--#line 260 "deffilep.y"
-- { (yyval.id_const) = "NAME"; }
-- break;
--
-- case 67:
--#line 261 "deffilep.y"
-- { (yyval.id_const) = "NONAME"; }
-- break;
--
-- case 68:
--#line 262 "deffilep.y"
-- { (yyval.id_const) = "noname"; }
-- break;
--
-- case 69:
--#line 263 "deffilep.y"
-- { (yyval.id_const) = "PRIVATE"; }
-- break;
--
-- case 70:
--#line 264 "deffilep.y"
-- { (yyval.id_const) = "private"; }
-- break;
--
-- case 71:
--#line 265 "deffilep.y"
-- { (yyval.id_const) = "READ"; }
-- break;
--
-- case 72:
--#line 266 "deffilep.y"
-- { (yyval.id_const) = "SHARED"; }
-- break;
--
-- case 73:
--#line 267 "deffilep.y"
-- { (yyval.id_const) = "STACKSIZE"; }
-- break;
--
-- case 74:
--#line 268 "deffilep.y"
-- { (yyval.id_const) = "VERSION"; }
-- break;
--
-- case 75:
--#line 269 "deffilep.y"
-- { (yyval.id_const) = "WRITE"; }
-- break;
--
-- case 76:
--#line 272 "deffilep.y"
-- { (yyval.id) = (yyvsp[(1) - (1)].id); }
-- break;
--
-- case 77:
--#line 274 "deffilep.y"
-- {
-- char *name = xmalloc (strlen ((yyvsp[(2) - (2)].id_const)) + 2);
-- sprintf (name, ".%s", (yyvsp[(2) - (2)].id_const));
-- (yyval.id) = name;
-- }
-- break;
--
-- case 78:
--#line 280 "deffilep.y"
-- {
-- char *name = def_pool_alloc (strlen ((yyvsp[(2) - (2)].id)) + 2);
-- sprintf (name, ".%s", (yyvsp[(2) - (2)].id));
-- (yyval.id) = name;
-- }
-- break;
--
-- case 79:
--#line 286 "deffilep.y"
-- {
-- char *name = def_pool_alloc (strlen ((yyvsp[(1) - (3)].id_const)) + 1 + strlen ((yyvsp[(3) - (3)].id)) + 1);
-- sprintf (name, "%s.%s", (yyvsp[(1) - (3)].id_const), (yyvsp[(3) - (3)].id));
-- (yyval.id) = name;
-- }
-- break;
--
-- case 80:
--#line 292 "deffilep.y"
-- {
-- char *name = def_pool_alloc (strlen ((yyvsp[(1) - (3)].id)) + 1 + strlen ((yyvsp[(3) - (3)].id)) + 1);
-- sprintf (name, "%s.%s", (yyvsp[(1) - (3)].id), (yyvsp[(3) - (3)].id));
-- (yyval.id) = name;
-- }
-- break;
--
-- case 81:
--#line 299 "deffilep.y"
-- { (yyval.id) = (yyvsp[(1) - (1)].id); }
-- break;
--
-- case 82:
--#line 300 "deffilep.y"
-- { (yyval.id) = ""; }
-- break;
--
-- case 83:
--#line 303 "deffilep.y"
-- { (yyval.id) = (yyvsp[(2) - (2)].id); }
-- break;
--
-- case 84:
--#line 304 "deffilep.y"
-- { (yyval.id) = 0; }
-- break;
--
-- case 85:
--#line 308 "deffilep.y"
-- { (yyval.number) = (yyvsp[(2) - (2)].number);}
-- break;
--
-- case 86:
--#line 309 "deffilep.y"
-- { (yyval.number) = -1;}
-- break;
--
-- case 87:
--#line 313 "deffilep.y"
-- { (yyval.id) = (yyvsp[(2) - (2)].id); }
-- break;
--
-- case 88:
--#line 314 "deffilep.y"
-- { (yyval.id) = 0; }
-- break;
--
-- case 89:
--#line 317 "deffilep.y"
-- { (yyval.vma) = (yyvsp[(3) - (3)].vma);}
-- break;
--
-- case 90:
--#line 318 "deffilep.y"
-- { (yyval.vma) = (bfd_vma) -1;}
-- break;
--
-- case 91:
--#line 321 "deffilep.y"
-- { (yyval.id) = (yyvsp[(1) - (1)].id); }
-- break;
--
-- case 92:
--#line 323 "deffilep.y"
-- {
-- char *id = def_pool_alloc (strlen ((yyvsp[(2) - (2)].id)) + 2);
-- sprintf (id, ".%s", (yyvsp[(2) - (2)].id));
-- (yyval.id) = id;
-- }
-- break;
--
-- case 93:
--#line 329 "deffilep.y"
-- {
-- char *id = def_pool_alloc (strlen ((yyvsp[(1) - (4)].id)) + 1 + strlen ((yyvsp[(3) - (4)].digits)) + strlen ((yyvsp[(4) - (4)].id)) + 1);
-- sprintf (id, "%s.%s%s", (yyvsp[(1) - (4)].id), (yyvsp[(3) - (4)].digits), (yyvsp[(4) - (4)].id));
-- (yyval.id) = id;
-- }
-- break;
--
-- case 94:
--#line 336 "deffilep.y"
-- { (yyval.digits) = (yyvsp[(1) - (1)].digits); }
-- break;
--
-- case 95:
--#line 337 "deffilep.y"
-- { (yyval.digits) = ""; }
-- break;
--
-- case 96:
--#line 340 "deffilep.y"
-- { (yyval.id) = (yyvsp[(1) - (1)].id); }
-- break;
--
-- case 97:
--#line 341 "deffilep.y"
-- { (yyval.id) = ""; }
-- break;
--
-- case 98:
--#line 344 "deffilep.y"
-- { (yyval.number) = strtoul ((yyvsp[(1) - (1)].digits), 0, 0); }
-- break;
--
-- case 99:
--#line 346 "deffilep.y"
-- { (yyval.vma) = (bfd_vma) strtoull ((yyvsp[(1) - (1)].digits), 0, 0); }
-- break;
--
--
--/* Line 1267 of yacc.c. */
--#line 2065 "deffilep.c"
-- default: break;
-- }
-- YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
--
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
--
-- *++yyvsp = yyval;
--
--
-- /* Now `shift' the result of the reduction. Determine what state
-- that goes to, based on the state we popped back to and the rule
-- number reduced by. */
--
-- yyn = yyr1[yyn];
--
-- yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
-- if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
-- yystate = yytable[yystate];
-- else
-- yystate = yydefgoto[yyn - YYNTOKENS];
--
-- goto yynewstate;
--
--
--/*------------------------------------.
--| yyerrlab -- here on detecting error |
--`------------------------------------*/
--yyerrlab:
-- /* If not already recovering from an error, report this error. */
-- if (!yyerrstatus)
-- {
-- ++yynerrs;
--#if ! YYERROR_VERBOSE
-- yyerror (YY_("syntax error"));
--#else
-- {
-- YYSIZE_T yysize = yysyntax_error (0, yystate, yychar);
-- if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM)
-- {
-- YYSIZE_T yyalloc = 2 * yysize;
-- if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM))
-- yyalloc = YYSTACK_ALLOC_MAXIMUM;
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
-- yymsg = (char *) YYSTACK_ALLOC (yyalloc);
-- if (yymsg)
-- yymsg_alloc = yyalloc;
-- else
-- {
-- yymsg = yymsgbuf;
-- yymsg_alloc = sizeof yymsgbuf;
-- }
-- }
--
-- if (0 < yysize && yysize <= yymsg_alloc)
-- {
-- (void) yysyntax_error (yymsg, yystate, yychar);
-- yyerror (yymsg);
-- }
-- else
-- {
-- yyerror (YY_("syntax error"));
-- if (yysize != 0)
-- goto yyexhaustedlab;
-- }
-- }
--#endif
-- }
--
--
--
-- if (yyerrstatus == 3)
-- {
-- /* If just tried and failed to reuse look-ahead token after an
-- error, discard it. */
--
-- if (yychar <= YYEOF)
-- {
-- /* Return failure if at end of input. */
-- if (yychar == YYEOF)
-- YYABORT;
-- }
-- else
-- {
-- yydestruct ("Error: discarding",
-- yytoken, &yylval);
-- yychar = YYEMPTY;
-- }
-- }
--
-- /* Else will try to reuse look-ahead token after shifting the error
-- token. */
-- goto yyerrlab1;
--
--
--/*---------------------------------------------------.
--| yyerrorlab -- error raised explicitly by YYERROR. |
--`---------------------------------------------------*/
--yyerrorlab:
--
-- /* Pacify compilers like GCC when the user code never invokes
-- YYERROR and the label yyerrorlab therefore never appears in user
-- code. */
-- if (/*CONSTCOND*/ 0)
-- goto yyerrorlab;
--
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYERROR. */
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
-- yystate = *yyssp;
-- goto yyerrlab1;
--
--
--/*-------------------------------------------------------------.
--| yyerrlab1 -- common code for both syntax error and YYERROR. |
--`-------------------------------------------------------------*/
--yyerrlab1:
-- yyerrstatus = 3; /* Each real token shifted decrements this. */
--
-- for (;;)
-- {
-- yyn = yypact[yystate];
-- if (yyn != YYPACT_NINF)
-- {
-- yyn += YYTERROR;
-- if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
-- {
-- yyn = yytable[yyn];
-- if (0 < yyn)
-- break;
-- }
-- }
--
-- /* Pop the current state because it cannot handle the error token. */
-- if (yyssp == yyss)
-- YYABORT;
--
--
-- yydestruct ("Error: popping",
-- yystos[yystate], yyvsp);
-- YYPOPSTACK (1);
-- yystate = *yyssp;
-- YY_STACK_PRINT (yyss, yyssp);
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- *++yyvsp = yylval;
--
--
-- /* Shift the error token. */
-- YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
--
-- yystate = yyn;
-- goto yynewstate;
--
--
--/*-------------------------------------.
--| yyacceptlab -- YYACCEPT comes here. |
--`-------------------------------------*/
--yyacceptlab:
-- yyresult = 0;
-- goto yyreturn;
--
--/*-----------------------------------.
--| yyabortlab -- YYABORT comes here. |
--`-----------------------------------*/
--yyabortlab:
-- yyresult = 1;
-- goto yyreturn;
--
--#ifndef yyoverflow
--/*-------------------------------------------------.
--| yyexhaustedlab -- memory exhaustion comes here. |
--`-------------------------------------------------*/
--yyexhaustedlab:
-- yyerror (YY_("memory exhausted"));
-- yyresult = 2;
-- /* Fall through. */
--#endif
--
--yyreturn:
-- if (yychar != YYEOF && yychar != YYEMPTY)
-- yydestruct ("Cleanup: discarding lookahead",
-- yytoken, &yylval);
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYABORT or YYACCEPT. */
-- YYPOPSTACK (yylen);
-- YY_STACK_PRINT (yyss, yyssp);
-- while (yyssp != yyss)
-- {
-- yydestruct ("Cleanup: popping",
-- yystos[*yyssp], yyvsp);
-- YYPOPSTACK (1);
-- }
--#ifndef yyoverflow
-- if (yyss != yyssa)
-- YYSTACK_FREE (yyss);
--#endif
--#if YYERROR_VERBOSE
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
--#endif
-- /* Make sure YYID is used. */
-- return YYID (yyresult);
--}
--
--
--#line 348 "deffilep.y"
--
--
--/*****************************************************************************
-- API
-- *****************************************************************************/
--
--static FILE *the_file;
--static const char *def_filename;
--static int linenumber;
--static def_file *def;
--static int saw_newline;
--
--struct directive
-- {
-- struct directive *next;
-- char *name;
-- int len;
-- };
--
--static struct directive *directives = 0;
--
--def_file *
--def_file_empty (void)
--{
-- def_file *rv = xmalloc (sizeof (def_file));
-- memset (rv, 0, sizeof (def_file));
-- rv->is_dll = -1;
-- rv->base_address = (bfd_vma) -1;
-- rv->stack_reserve = rv->stack_commit = -1;
-- rv->heap_reserve = rv->heap_commit = -1;
-- rv->version_major = rv->version_minor = -1;
-- return rv;
--}
--
--def_file *
--def_file_parse (const char *filename, def_file *add_to)
--{
-- struct directive *d;
--
-- the_file = fopen (filename, "r");
-- def_filename = filename;
-- linenumber = 1;
-- if (!the_file)
-- {
-- perror (filename);
-- return 0;
-- }
-- if (add_to)
-- {
-- def = add_to;
-- }
-- else
-- {
-- def = def_file_empty ();
-- }
--
-- saw_newline = 1;
-- if (def_parse ())
-- {
-- def_file_free (def);
-- fclose (the_file);
-- def_pool_free ();
-- return 0;
-- }
--
-- fclose (the_file);
--
-- while ((d = directives) != NULL)
-- {
--#if TRACE
-- printf ("Adding directive %08x `%s'\n", d->name, d->name);
--#endif
-- def_file_add_directive (def, d->name, d->len);
-- directives = d->next;
-- free (d->name);
-- free (d);
-- }
-- def_pool_free ();
--
-- return def;
--}
--
--void
--def_file_free (def_file *fdef)
--{
-- int i;
--
-- if (!fdef)
-- return;
-- if (fdef->name)
-- free (fdef->name);
-- if (fdef->description)
-- free (fdef->description);
--
-- if (fdef->section_defs)
-- {
-- for (i = 0; i < fdef->num_section_defs; i++)
-- {
-- if (fdef->section_defs[i].name)
-- free (fdef->section_defs[i].name);
-- if (fdef->section_defs[i].class)
-- free (fdef->section_defs[i].class);
-- }
-- free (fdef->section_defs);
-- }
--
-- if (fdef->exports)
-- {
-- for (i = 0; i < fdef->num_exports; i++)
-- {
-- if (fdef->exports[i].internal_name
-- && fdef->exports[i].internal_name != fdef->exports[i].name)
-- free (fdef->exports[i].internal_name);
-- if (fdef->exports[i].name)
-- free (fdef->exports[i].name);
-- if (fdef->exports[i].its_name)
-- free (fdef->exports[i].its_name);
-- }
-- free (fdef->exports);
-- }
--
-- if (fdef->imports)
-- {
-- for (i = 0; i < fdef->num_imports; i++)
-- {
-- if (fdef->imports[i].internal_name
-- && fdef->imports[i].internal_name != fdef->imports[i].name)
-- free (fdef->imports[i].internal_name);
-- if (fdef->imports[i].name)
-- free (fdef->imports[i].name);
-- if (fdef->imports[i].its_name)
-- free (fdef->imports[i].its_name);
-- }
-- free (fdef->imports);
-- }
--
-- while (fdef->modules)
-- {
-- def_file_module *m = fdef->modules;
--
-- fdef->modules = fdef->modules->next;
-- free (m);
-- }
--
-- while (fdef->aligncomms)
-- {
-- def_file_aligncomm *c = fdef->aligncomms;
--
-- fdef->aligncomms = fdef->aligncomms->next;
-- free (c->symbol_name);
-- free (c);
-- }
--
-- free (fdef);
--}
--
--#ifdef DEF_FILE_PRINT
--void
--def_file_print (FILE *file, def_file *fdef)
--{
-- int i;
--
-- fprintf (file, ">>>> def_file at 0x%08x\n", fdef);
-- if (fdef->name)
-- fprintf (file, " name: %s\n", fdef->name ? fdef->name : "(unspecified)");
-- if (fdef->is_dll != -1)
-- fprintf (file, " is dll: %s\n", fdef->is_dll ? "yes" : "no");
-- if (fdef->base_address != (bfd_vma) -1)
-- {
-- fprintf (file, " base address: 0x");
-- fprintf_vma (file, fdef->base_address);
-- fprintf (file, "\n");
-- }
-- if (fdef->description)
-- fprintf (file, " description: `%s'\n", fdef->description);
-- if (fdef->stack_reserve != -1)
-- fprintf (file, " stack reserve: 0x%08x\n", fdef->stack_reserve);
-- if (fdef->stack_commit != -1)
-- fprintf (file, " stack commit: 0x%08x\n", fdef->stack_commit);
-- if (fdef->heap_reserve != -1)
-- fprintf (file, " heap reserve: 0x%08x\n", fdef->heap_reserve);
-- if (fdef->heap_commit != -1)
-- fprintf (file, " heap commit: 0x%08x\n", fdef->heap_commit);
--
-- if (fdef->num_section_defs > 0)
-- {
-- fprintf (file, " section defs:\n");
--
-- for (i = 0; i < fdef->num_section_defs; i++)
-- {
-- fprintf (file, " name: `%s', class: `%s', flags:",
-- fdef->section_defs[i].name, fdef->section_defs[i].class);
-- if (fdef->section_defs[i].flag_read)
-- fprintf (file, " R");
-- if (fdef->section_defs[i].flag_write)
-- fprintf (file, " W");
-- if (fdef->section_defs[i].flag_execute)
-- fprintf (file, " X");
-- if (fdef->section_defs[i].flag_shared)
-- fprintf (file, " S");
-- fprintf (file, "\n");
-- }
-- }
--
-- if (fdef->num_exports > 0)
-- {
-- fprintf (file, " exports:\n");
--
-- for (i = 0; i < fdef->num_exports; i++)
-- {
-- fprintf (file, " name: `%s', int: `%s', ordinal: %d, flags:",
-- fdef->exports[i].name, fdef->exports[i].internal_name,
-- fdef->exports[i].ordinal);
-- if (fdef->exports[i].flag_private)
-- fprintf (file, " P");
-- if (fdef->exports[i].flag_constant)
-- fprintf (file, " C");
-- if (fdef->exports[i].flag_noname)
-- fprintf (file, " N");
-- if (fdef->exports[i].flag_data)
-- fprintf (file, " D");
-- fprintf (file, "\n");
-- }
-- }
--
-- if (fdef->num_imports > 0)
-- {
-- fprintf (file, " imports:\n");
--
-- for (i = 0; i < fdef->num_imports; i++)
-- {
-- fprintf (file, " int: %s, from: `%s', name: `%s', ordinal: %d\n",
-- fdef->imports[i].internal_name,
-- fdef->imports[i].module,
-- fdef->imports[i].name,
-- fdef->imports[i].ordinal);
-- }
-- }
--
-- if (fdef->version_major != -1)
-- fprintf (file, " version: %d.%d\n", fdef->version_major, fdef->version_minor);
--
-- fprintf (file, "<<<< def_file at 0x%08x\n", fdef);
--}
--#endif
--
--/* Helper routine to check for identity of string pointers,
-- which might be NULL. */
--
--static int
--are_names_equal (const char *s1, const char *s2)
--{
-- if (!s1 && !s2)
-- return 0;
-- if (!s1 || !s2)
-- return (!s1 ? -1 : 1);
-- return strcmp (s1, s2);
--}
--
--static int
--cmp_export_elem (const def_file_export *e, const char *ex_name,
-- const char *in_name, const char *its_name,
-- int ord)
--{
-- int r;
--
-- if ((r = are_names_equal (ex_name, e->name)) != 0)
-- return r;
-- if ((r = are_names_equal (in_name, e->internal_name)) != 0)
-- return r;
-- if ((r = are_names_equal (its_name, e->its_name)) != 0)
-- return r;
-- return (ord - e->ordinal);
--}
--
--/* Search the position of the identical element, or returns the position
-- of the next higher element. If last valid element is smaller, then MAX
-- is returned. */
--
--static int
--find_export_in_list (def_file_export *b, int max,
-- const char *ex_name, const char *in_name,
-- const char *its_name, int ord, int *is_ident)
--{
-- int e, l, r, p;
--
-- *is_ident = 0;
-- if (!max)
-- return 0;
-- if ((e = cmp_export_elem (b, ex_name, in_name, its_name, ord)) <= 0)
-- {
-- if (!e)
-- *is_ident = 1;
-- return 0;
-- }
-- if (max == 1)
-- return 1;
-- if ((e = cmp_export_elem (b + (max - 1), ex_name, in_name, its_name, ord)) > 0)
-- return max;
-- else if (!e || max == 2)
-- {
-- if (!e)
-- *is_ident = 1;
-- return max - 1;
-- }
-- l = 0; r = max - 1;
-- while (l < r)
-- {
-- p = (l + r) / 2;
-- e = cmp_export_elem (b + p, ex_name, in_name, its_name, ord);
-- if (!e)
-- {
-- *is_ident = 1;
-- return p;
-- }
-- else if (e < 0)
-- r = p - 1;
-- else if (e > 0)
-- l = p + 1;
-- }
-- if ((e = cmp_export_elem (b + l, ex_name, in_name, its_name, ord)) > 0)
-- ++l;
-- else if (!e)
-- *is_ident = 1;
-- return l;
--}
--
--def_file_export *
--def_file_add_export (def_file *fdef,
-- const char *external_name,
-- const char *internal_name,
-- int ordinal,
-- const char *its_name,
-- int *is_dup)
--{
-- def_file_export *e;
-- int pos;
-- int max_exports = ROUND_UP(fdef->num_exports, 32);
--
-- if (internal_name && !external_name)
-- external_name = internal_name;
-- if (external_name && !internal_name)
-- internal_name = external_name;
--
-- /* We need to avoid duplicates. */
-- *is_dup = 0;
-- pos = find_export_in_list (fdef->exports, fdef->num_exports,
-- external_name, internal_name,
-- its_name, ordinal, is_dup);
--
-- if (*is_dup != 0)
-- return (fdef->exports + pos);
--
-- if (fdef->num_exports >= max_exports)
-- {
-- max_exports = ROUND_UP(fdef->num_exports + 1, 32);
-- if (fdef->exports)
-- fdef->exports = xrealloc (fdef->exports,
-- max_exports * sizeof (def_file_export));
-- else
-- fdef->exports = xmalloc (max_exports * sizeof (def_file_export));
-- }
--
-- e = fdef->exports + pos;
-- if (pos != fdef->num_exports)
-- memmove (&e[1], e, (sizeof (def_file_export) * (fdef->num_exports - pos)));
-- memset (e, 0, sizeof (def_file_export));
-- e->name = xstrdup (external_name);
-- e->internal_name = xstrdup (internal_name);
-- e->its_name = (its_name ? xstrdup (its_name) : NULL);
-- e->ordinal = ordinal;
-- fdef->num_exports++;
-- return e;
--}
--
--def_file_module *
--def_get_module (def_file *fdef, const char *name)
--{
-- def_file_module *s;
--
-- for (s = fdef->modules; s; s = s->next)
-- if (strcmp (s->name, name) == 0)
-- return s;
--
-- return NULL;
--}
--
--static def_file_module *
--def_stash_module (def_file *fdef, const char *name)
--{
-- def_file_module *s;
--
-- if ((s = def_get_module (fdef, name)) != NULL)
-- return s;
-- s = xmalloc (sizeof (def_file_module) + strlen (name));
-- s->next = fdef->modules;
-- fdef->modules = s;
-- s->user_data = 0;
-- strcpy (s->name, name);
-- return s;
--}
--
--static int
--cmp_import_elem (const def_file_import *e, const char *ex_name,
-- const char *in_name, const char *module,
-- int ord)
--{
-- int r;
--
-- if ((r = are_names_equal (module, (e->module ? e->module->name : NULL))))
-- return r;
-- if ((r = are_names_equal (ex_name, e->name)) != 0)
-- return r;
-- if ((r = are_names_equal (in_name, e->internal_name)) != 0)
-- return r;
-- if (ord != e->ordinal)
-- return (ord < e->ordinal ? -1 : 1);
-- return 0;
--}
--
--/* Search the position of the identical element, or returns the position
-- of the next higher element. If last valid element is smaller, then MAX
-- is returned. */
--
--static int
--find_import_in_list (def_file_import *b, int max,
-- const char *ex_name, const char *in_name,
-- const char *module, int ord, int *is_ident)
--{
-- int e, l, r, p;
--
-- *is_ident = 0;
-- if (!max)
-- return 0;
-- if ((e = cmp_import_elem (b, ex_name, in_name, module, ord)) <= 0)
-- {
-- if (!e)
-- *is_ident = 1;
-- return 0;
-- }
-- if (max == 1)
-- return 1;
-- if ((e = cmp_import_elem (b + (max - 1), ex_name, in_name, module, ord)) > 0)
-- return max;
-- else if (!e || max == 2)
-- {
-- if (!e)
-- *is_ident = 1;
-- return max - 1;
-- }
-- l = 0; r = max - 1;
-- while (l < r)
-- {
-- p = (l + r) / 2;
-- e = cmp_import_elem (b + p, ex_name, in_name, module, ord);
-- if (!e)
-- {
-- *is_ident = 1;
-- return p;
-- }
-- else if (e < 0)
-- r = p - 1;
-- else if (e > 0)
-- l = p + 1;
-- }
-- if ((e = cmp_import_elem (b + l, ex_name, in_name, module, ord)) > 0)
-- ++l;
-- else if (!e)
-- *is_ident = 1;
-- return l;
--}
--
--def_file_import *
--def_file_add_import (def_file *fdef,
-- const char *name,
-- const char *module,
-- int ordinal,
-- const char *internal_name,
-- const char *its_name,
-- int *is_dup)
--{
-- def_file_import *i;
-- int pos;
-- int max_imports = ROUND_UP (fdef->num_imports, 16);
--
-- /* We need to avoid here duplicates. */
-- *is_dup = 0;
-- pos = find_import_in_list (fdef->imports, fdef->num_imports,
-- name,
-- (!internal_name ? name : internal_name),
-- module, ordinal, is_dup);
-- if (*is_dup != 0)
-- return fdef->imports + pos;
--
-- if (fdef->num_imports >= max_imports)
-- {
-- max_imports = ROUND_UP (fdef->num_imports+1, 16);
--
-- if (fdef->imports)
-- fdef->imports = xrealloc (fdef->imports,
-- max_imports * sizeof (def_file_import));
-- else
-- fdef->imports = xmalloc (max_imports * sizeof (def_file_import));
-- }
-- i = fdef->imports + pos;
-- if (pos != fdef->num_imports)
-- memmove (&i[1], i, (sizeof (def_file_import) * (fdef->num_imports - pos)));
-- memset (i, 0, sizeof (def_file_import));
-- if (name)
-- i->name = xstrdup (name);
-- if (module)
-- i->module = def_stash_module (fdef, module);
-- i->ordinal = ordinal;
-- if (internal_name)
-- i->internal_name = xstrdup (internal_name);
-- else
-- i->internal_name = i->name;
-- i->its_name = (its_name ? xstrdup (its_name) : NULL);
-- fdef->num_imports++;
--
-- return i;
--}
--
--struct
--{
-- char *param;
-- int token;
--}
--diropts[] =
--{
-- { "-heap", HEAPSIZE },
-- { "-stack", STACKSIZE_K },
-- { "-attr", SECTIONS },
-- { "-export", EXPORTS },
-- { "-aligncomm", ALIGNCOMM },
-- { 0, 0 }
--};
--
--void
--def_file_add_directive (def_file *my_def, const char *param, int len)
--{
-- def_file *save_def = def;
-- const char *pend = param + len;
-- char * tend = (char *) param;
-- int i;
--
-- def = my_def;
--
-- while (param < pend)
-- {
-- while (param < pend
-- && (ISSPACE (*param) || *param == '\n' || *param == 0))
-- param++;
--
-- if (param == pend)
-- break;
--
-- /* Scan forward until we encounter any of:
-- - the end of the buffer
-- - the start of a new option
-- - a newline seperating options
-- - a NUL seperating options. */
-- for (tend = (char *) (param + 1);
-- (tend < pend
-- && !(ISSPACE (tend[-1]) && *tend == '-')
-- && *tend != '\n' && *tend != 0);
-- tend++)
-- ;
--
-- for (i = 0; diropts[i].param; i++)
-- {
-- len = strlen (diropts[i].param);
--
-- if (tend - param >= len
-- && strncmp (param, diropts[i].param, len) == 0
-- && (param[len] == ':' || param[len] == ' '))
-- {
-- lex_parse_string_end = tend;
-- lex_parse_string = param + len + 1;
-- lex_forced_token = diropts[i].token;
-- saw_newline = 0;
-- if (def_parse ())
-- continue;
-- break;
-- }
-- }
--
-- if (!diropts[i].param)
-- {
-- if (tend < pend)
-- {
-- char saved;
--
-- saved = * tend;
-- * tend = 0;
-- /* xgettext:c-format */
-- einfo (_("Warning: .drectve `%s' unrecognized\n"), param);
-- * tend = saved;
-- }
-- else
-- {
-- einfo (_("Warning: corrupt .drectve at end of def file\n"));
-- }
-- }
--
-- lex_parse_string = 0;
-- param = tend;
-- }
--
-- def = save_def;
-- def_pool_free ();
--}
--
--/* Parser Callbacks. */
--
--static void
--def_image_name (const char *name, bfd_vma base, int is_dll)
--{
-- /* If a LIBRARY or NAME statement is specified without a name, there is nothing
-- to do here. We retain the output filename specified on command line. */
-- if (*name)
-- {
-- const char* image_name = lbasename (name);
--
-- if (image_name != name)
-- einfo ("%s:%d: Warning: path components stripped from %s, '%s'\n",
-- def_filename, linenumber, is_dll ? "LIBRARY" : "NAME",
-- name);
-- if (def->name)
-- free (def->name);
-- /* Append the default suffix, if none specified. */
-- if (strchr (image_name, '.') == 0)
-- {
-- const char * suffix = is_dll ? ".dll" : ".exe";
--
-- def->name = xmalloc (strlen (image_name) + strlen (suffix) + 1);
-- sprintf (def->name, "%s%s", image_name, suffix);
-- }
-- else
-- def->name = xstrdup (image_name);
-- }
--
-- /* Honor a BASE address statement, even if LIBRARY string is empty. */
-- def->base_address = base;
-- def->is_dll = is_dll;
--}
--
--static void
--def_description (const char *text)
--{
-- int len = def->description ? strlen (def->description) : 0;
--
-- len += strlen (text) + 1;
-- if (def->description)
-- {
-- def->description = xrealloc (def->description, len);
-- strcat (def->description, text);
-- }
-- else
-- {
-- def->description = xmalloc (len);
-- strcpy (def->description, text);
-- }
--}
--
--static void
--def_stacksize (int reserve, int commit)
--{
-- def->stack_reserve = reserve;
-- def->stack_commit = commit;
--}
--
--static void
--def_heapsize (int reserve, int commit)
--{
-- def->heap_reserve = reserve;
-- def->heap_commit = commit;
--}
--
--static void
--def_section (const char *name, int attr)
--{
-- def_file_section *s;
-- int max_sections = ROUND_UP (def->num_section_defs, 4);
--
-- if (def->num_section_defs >= max_sections)
-- {
-- max_sections = ROUND_UP (def->num_section_defs+1, 4);
--
-- if (def->section_defs)
-- def->section_defs = xrealloc (def->section_defs,
-- max_sections * sizeof (def_file_import));
-- else
-- def->section_defs = xmalloc (max_sections * sizeof (def_file_import));
-- }
-- s = def->section_defs + def->num_section_defs;
-- memset (s, 0, sizeof (def_file_section));
-- s->name = xstrdup (name);
-- if (attr & 1)
-- s->flag_read = 1;
-- if (attr & 2)
-- s->flag_write = 1;
-- if (attr & 4)
-- s->flag_execute = 1;
-- if (attr & 8)
-- s->flag_shared = 1;
--
-- def->num_section_defs++;
--}
--
--static void
--def_section_alt (const char *name, const char *attr)
--{
-- int aval = 0;
--
-- for (; *attr; attr++)
-- {
-- switch (*attr)
-- {
-- case 'R':
-- case 'r':
-- aval |= 1;
-- break;
-- case 'W':
-- case 'w':
-- aval |= 2;
-- break;
-- case 'X':
-- case 'x':
-- aval |= 4;
-- break;
-- case 'S':
-- case 's':
-- aval |= 8;
-- break;
-- }
-- }
-- def_section (name, aval);
--}
--
--static void
--def_exports (const char *external_name,
-- const char *internal_name,
-- int ordinal,
-- int flags,
-- const char *its_name)
--{
-- def_file_export *dfe;
-- int is_dup = 0;
--
-- if (!internal_name && external_name)
-- internal_name = external_name;
--#if TRACE
-- printf ("def_exports, ext=%s int=%s\n", external_name, internal_name);
--#endif
--
-- dfe = def_file_add_export (def, external_name, internal_name, ordinal,
-- its_name, &is_dup);
--
-- /* We might check here for flag redefinition and warn. For now we
-- ignore duplicates silently. */
-- if (is_dup)
-- return;
--
-- if (flags & 1)
-- dfe->flag_noname = 1;
-- if (flags & 2)
-- dfe->flag_constant = 1;
-- if (flags & 4)
-- dfe->flag_data = 1;
-- if (flags & 8)
-- dfe->flag_private = 1;
--}
--
--static void
--def_import (const char *internal_name,
-- const char *module,
-- const char *dllext,
-- const char *name,
-- int ordinal,
-- const char *its_name)
--{
-- char *buf = 0;
-- const char *ext = dllext ? dllext : "dll";
-- int is_dup = 0;
--
-- buf = xmalloc (strlen (module) + strlen (ext) + 2);
-- sprintf (buf, "%s.%s", module, ext);
-- module = buf;
--
-- def_file_add_import (def, name, module, ordinal, internal_name, its_name,
-- &is_dup);
-- free (buf);
--}
--
--static void
--def_version (int major, int minor)
--{
-- def->version_major = major;
-- def->version_minor = minor;
--}
--
--static void
--def_directive (char *str)
--{
-- struct directive *d = xmalloc (sizeof (struct directive));
--
-- d->next = directives;
-- directives = d;
-- d->name = xstrdup (str);
-- d->len = strlen (str);
--}
--
--static void
--def_aligncomm (char *str, int align)
--{
-- def_file_aligncomm *c, *p;
--
-- p = NULL;
-- c = def->aligncomms;
-- while (c != NULL)
-- {
-- int e = strcmp (c->symbol_name, str);
-- if (!e)
-- {
-- /* Not sure if we want to allow here duplicates with
-- different alignments, but for now we keep them. */
-- e = (int) c->alignment - align;
-- if (!e)
-- return;
-- }
-- if (e > 0)
-- break;
-- c = (p = c)->next;
-- }
--
-- c = xmalloc (sizeof (def_file_aligncomm));
-- c->symbol_name = xstrdup (str);
-- c->alignment = (unsigned int) align;
-- if (!p)
-- {
-- c->next = def->aligncomms;
-- def->aligncomms = c;
-- }
-- else
-- {
-- c->next = p->next;
-- p->next = c;
-- }
--}
--
--static int
--def_error (const char *err)
--{
-- einfo ("%P: %s:%d: %s\n",
-- def_filename ? def_filename : "<unknown-file>", linenumber, err);
-- return 0;
--}
--
--
--/* Lexical Scanner. */
--
--#undef TRACE
--#define TRACE 0
--
--/* Never freed, but always reused as needed, so no real leak. */
--static char *buffer = 0;
--static int buflen = 0;
--static int bufptr = 0;
--
--static void
--put_buf (char c)
--{
-- if (bufptr == buflen)
-- {
-- buflen += 50; /* overly reasonable, eh? */
-- if (buffer)
-- buffer = xrealloc (buffer, buflen + 1);
-- else
-- buffer = xmalloc (buflen + 1);
-- }
-- buffer[bufptr++] = c;
-- buffer[bufptr] = 0; /* not optimal, but very convenient. */
--}
--
--static struct
--{
-- char *name;
-- int token;
--}
--tokens[] =
--{
-- { "BASE", BASE },
-- { "CODE", CODE },
-- { "CONSTANT", CONSTANTU },
-- { "constant", CONSTANTL },
-- { "DATA", DATAU },
-- { "data", DATAL },
-- { "DESCRIPTION", DESCRIPTION },
-- { "DIRECTIVE", DIRECTIVE },
-- { "EXECUTE", EXECUTE },
-- { "EXPORTS", EXPORTS },
-- { "HEAPSIZE", HEAPSIZE },
-- { "IMPORTS", IMPORTS },
-- { "LIBRARY", LIBRARY },
-- { "NAME", NAME },
-- { "NONAME", NONAMEU },
-- { "noname", NONAMEL },
-- { "PRIVATE", PRIVATEU },
-- { "private", PRIVATEL },
-- { "READ", READ },
-- { "SECTIONS", SECTIONS },
-- { "SEGMENTS", SECTIONS },
-- { "SHARED", SHARED },
-- { "STACKSIZE", STACKSIZE_K },
-- { "VERSION", VERSIONK },
-- { "WRITE", WRITE },
-- { 0, 0 }
--};
--
--static int
--def_getc (void)
--{
-- int rv;
--
-- if (lex_parse_string)
-- {
-- if (lex_parse_string >= lex_parse_string_end)
-- rv = EOF;
-- else
-- rv = *lex_parse_string++;
-- }
-- else
-- {
-- rv = fgetc (the_file);
-- }
-- if (rv == '\n')
-- saw_newline = 1;
-- return rv;
--}
--
--static int
--def_ungetc (int c)
--{
-- if (lex_parse_string)
-- {
-- lex_parse_string--;
-- return c;
-- }
-- else
-- return ungetc (c, the_file);
--}
--
--static int
--def_lex (void)
--{
-- int c, i, q;
--
-- if (lex_forced_token)
-- {
-- i = lex_forced_token;
-- lex_forced_token = 0;
--#if TRACE
-- printf ("lex: forcing token %d\n", i);
--#endif
-- return i;
-- }
--
-- c = def_getc ();
--
-- /* Trim leading whitespace. */
-- while (c != EOF && (c == ' ' || c == '\t') && saw_newline)
-- c = def_getc ();
--
-- if (c == EOF)
-- {
--#if TRACE
-- printf ("lex: EOF\n");
--#endif
-- return 0;
-- }
--
-- if (saw_newline && c == ';')
-- {
-- do
-- {
-- c = def_getc ();
-- }
-- while (c != EOF && c != '\n');
-- if (c == '\n')
-- return def_lex ();
-- return 0;
-- }
--
-- /* Must be something else. */
-- saw_newline = 0;
--
-- if (ISDIGIT (c))
-- {
-- bufptr = 0;
-- while (c != EOF && (ISXDIGIT (c) || (c == 'x')))
-- {
-- put_buf (c);
-- c = def_getc ();
-- }
-- if (c != EOF)
-- def_ungetc (c);
-- yylval.digits = def_pool_strdup (buffer);
--#if TRACE
-- printf ("lex: `%s' returns DIGITS\n", buffer);
--#endif
-- return DIGITS;
-- }
--
-- if (ISALPHA (c) || strchr ("$:-_?@", c))
-- {
-- bufptr = 0;
-- q = c;
-- put_buf (c);
-- c = def_getc ();
--
-- if (q == '@')
-- {
-- if (ISBLANK (c) ) /* '@' followed by whitespace. */
-- return (q);
-- else if (ISDIGIT (c)) /* '@' followed by digit. */
-- {
-- def_ungetc (c);
-- return (q);
-- }
--#if TRACE
-- printf ("lex: @ returns itself\n");
--#endif
-- }
--
-- while (c != EOF && (ISALNUM (c) || strchr ("$:-_?/@<>", c)))
-- {
-- put_buf (c);
-- c = def_getc ();
-- }
-- if (c != EOF)
-- def_ungetc (c);
-- if (ISALPHA (q)) /* Check for tokens. */
-- {
-- for (i = 0; tokens[i].name; i++)
-- if (strcmp (tokens[i].name, buffer) == 0)
-- {
--#if TRACE
-- printf ("lex: `%s' is a string token\n", buffer);
--#endif
-- return tokens[i].token;
-- }
-- }
--#if TRACE
-- printf ("lex: `%s' returns ID\n", buffer);
--#endif
-- yylval.id = def_pool_strdup (buffer);
-- return ID;
-- }
--
-- if (c == '\'' || c == '"')
-- {
-- q = c;
-- c = def_getc ();
-- bufptr = 0;
--
-- while (c != EOF && c != q)
-- {
-- put_buf (c);
-- c = def_getc ();
-- }
-- yylval.id = def_pool_strdup (buffer);
--#if TRACE
-- printf ("lex: `%s' returns ID\n", buffer);
--#endif
-- return ID;
-- }
--
-- if ( c == '=')
-- {
-- c = def_getc ();
-- if (c == '=')
-- {
--#if TRACE
-- printf ("lex: `==' returns EQUAL\n");
--#endif
-- return EQUAL;
-- }
-- def_ungetc (c);
--#if TRACE
-- printf ("lex: `=' returns itself\n");
--#endif
-- return '=';
-- }
-- if (c == '.' || c == ',')
-- {
--#if TRACE
-- printf ("lex: `%c' returns itself\n", c);
--#endif
-- return c;
-- }
--
-- if (c == '\n')
-- {
-- linenumber++;
-- saw_newline = 1;
-- }
--
-- /*printf ("lex: 0x%02x ignored\n", c); */
-- return def_lex ();
--}
--
--static char *
--def_pool_alloc (size_t sz)
--{
-- def_pool_str *e;
--
-- e = (def_pool_str *) xmalloc (sizeof (def_pool_str) + sz);
-- e->next = pool_strs;
-- pool_strs = e;
-- return e->data;
--}
--
--static char *
--def_pool_strdup (const char *str)
--{
-- char *s;
-- size_t len;
-- if (!str)
-- return NULL;
-- len = strlen (str) + 1;
-- s = def_pool_alloc (len);
-- memcpy (s, str, len);
-- return s;
--}
--
--static void
--def_pool_free (void)
--{
-- def_pool_str *p;
-- while ((p = pool_strs) != NULL)
-- {
-- pool_strs = p->next;
-- free (p);
-- }
--}
--
-diff -Nur binutils-2.24.orig/ld/deffilep.h binutils-2.24/ld/deffilep.h
---- binutils-2.24.orig/ld/deffilep.h 2013-11-18 09:49:29.000000000 +0100
-+++ binutils-2.24/ld/deffilep.h 1970-01-01 01:00:00.000000000 +0100
-@@ -1,124 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton interface for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- NAME = 258,
-- LIBRARY = 259,
-- DESCRIPTION = 260,
-- STACKSIZE_K = 261,
-- HEAPSIZE = 262,
-- CODE = 263,
-- DATAU = 264,
-- DATAL = 265,
-- SECTIONS = 266,
-- EXPORTS = 267,
-- IMPORTS = 268,
-- VERSIONK = 269,
-- BASE = 270,
-- CONSTANTU = 271,
-- CONSTANTL = 272,
-- PRIVATEU = 273,
-- PRIVATEL = 274,
-- ALIGNCOMM = 275,
-- READ = 276,
-- WRITE = 277,
-- EXECUTE = 278,
-- SHARED = 279,
-- NONAMEU = 280,
-- NONAMEL = 281,
-- DIRECTIVE = 282,
-- EQUAL = 283,
-- ID = 284,
-- DIGITS = 285
-- };
--#endif
--/* Tokens. */
--#define NAME 258
--#define LIBRARY 259
--#define DESCRIPTION 260
--#define STACKSIZE_K 261
--#define HEAPSIZE 262
--#define CODE 263
--#define DATAU 264
--#define DATAL 265
--#define SECTIONS 266
--#define EXPORTS 267
--#define IMPORTS 268
--#define VERSIONK 269
--#define BASE 270
--#define CONSTANTU 271
--#define CONSTANTL 272
--#define PRIVATEU 273
--#define PRIVATEL 274
--#define ALIGNCOMM 275
--#define READ 276
--#define WRITE 277
--#define EXECUTE 278
--#define SHARED 279
--#define NONAMEU 280
--#define NONAMEL 281
--#define DIRECTIVE 282
--#define EQUAL 283
--#define ID 284
--#define DIGITS 285
--
--
--
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 114 "deffilep.y"
--{
-- char *id;
-- const char *id_const;
-- int number;
-- bfd_vma vma;
-- char *digits;
--}
--/* Line 1529 of yacc.c. */
--#line 117 "deffilep.h"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--extern YYSTYPE yylval;
--
-diff -Nur binutils-2.24.orig/ld/emulparams/nds32belf16m.sh binutils-2.24/ld/emulparams/nds32belf16m.sh
---- binutils-2.24.orig/ld/emulparams/nds32belf16m.sh 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/emulparams/nds32belf16m.sh 2016-06-30 21:26:12.785898247 +0200
-@@ -0,0 +1,2 @@
-+. ${srcdir}/emulparams/nds32elf16m.sh
-+OUTPUT_FORMAT="$BIG_OUTPUT_FORMAT"
-diff -Nur binutils-2.24.orig/ld/emulparams/nds32belf_linux.sh binutils-2.24/ld/emulparams/nds32belf_linux.sh
---- binutils-2.24.orig/ld/emulparams/nds32belf_linux.sh 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/emulparams/nds32belf_linux.sh 2016-06-30 21:26:12.785898247 +0200
-@@ -0,0 +1,2 @@
-+. ${srcdir}/emulparams/nds32elf_linux.sh
-+OUTPUT_FORMAT="$BIG_OUTPUT_FORMAT"
-diff -Nur binutils-2.24.orig/ld/emulparams/nds32belf.sh binutils-2.24/ld/emulparams/nds32belf.sh
---- binutils-2.24.orig/ld/emulparams/nds32belf.sh 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/emulparams/nds32belf.sh 2016-06-30 21:26:12.785898247 +0200
-@@ -0,0 +1,2 @@
-+. ${srcdir}/emulparams/nds32elf.sh
-+OUTPUT_FORMAT="$BIG_OUTPUT_FORMAT"
-diff -Nur binutils-2.24.orig/ld/emulparams/nds32elf16m.sh binutils-2.24/ld/emulparams/nds32elf16m.sh
---- binutils-2.24.orig/ld/emulparams/nds32elf16m.sh 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/emulparams/nds32elf16m.sh 2016-06-30 21:26:12.785898247 +0200
-@@ -0,0 +1,19 @@
-+TEXT_START_ADDR=0x300000
-+# This sets the stack to the top of simulator memory (48MB).
-+OTHER_END_SYMBOLS='PROVIDE (_stack = 0x780000);'
-+
-+SCRIPT_NAME=nds32elf
-+TEMPLATE_NAME=elf32
-+EXTRA_EM_FILE=nds32elf
-+BIG_OUTPUT_FORMAT="elf32-nds32be"
-+LITTLE_OUTPUT_FORMAT="elf32-nds32le"
-+OUTPUT_FORMAT="$LITTLE_OUTPUT_FORMAT"
-+ARCH=nds32
-+MACHINE=
-+MAXPAGESIZE=0x20
-+EMBEDDED=yes
-+COMMONPAGESIZE=0x20
-+
-+# Instruct genscripts.sh not to compile scripts in by COMPILE_IN
-+# in order to use external linker scripts files.
-+EMULATION_LIBPATH=
-diff -Nur binutils-2.24.orig/ld/emulparams/nds32elf_linux.sh binutils-2.24/ld/emulparams/nds32elf_linux.sh
---- binutils-2.24.orig/ld/emulparams/nds32elf_linux.sh 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/emulparams/nds32elf_linux.sh 2016-06-30 21:26:12.785898247 +0200
-@@ -0,0 +1,36 @@
-+DEFAULT_TEXT_START_ADDR=0
-+DEFAULT_STACK_START_ADDR=0
-+MACHINE=
-+SCRIPT_NAME=nds32elf
-+TEMPLATE_NAME=elf32
-+EXTRA_EM_FILE=nds32elf
-+BIG_OUTPUT_FORMAT="elf32-nds32be-linux"
-+LITTLE_OUTPUT_FORMAT="elf32-nds32le-linux"
-+OUTPUT_FORMAT="$LITTLE_OUTPUT_FORMAT"
-+LIB_PATH="=/usr/local/lib:=/lib:=/usr/lib/"
-+
-+if [ "${DEFAULT_TEXT_START_ADDR}" = "0" ]; then
-+ TEXT_START_ADDR=0x8000
-+else
-+ TEXT_START_ADDR=${DEFAULT_TEXT_START_ADDR}
-+fi
-+
-+ARCH=nds32
-+MACHINE=
-+MAXPAGESIZE="CONSTANT (MAXPAGESIZE)"
-+COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)"
-+
-+# Hmmm, there's got to be a better way. This sets the stack to the
-+# top of simulator memory (32MB).
-+if [ "${DEFAULT_STACK_START_ADDR}" = "0" ]; then
-+ OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = 0x2000000);'
-+else
-+ OTHER_RELOCATING_SECTIONS="PROVIDE (_stack = ${DEFAULT_STACK_START_ADDR});"
-+fi
-+
-+GENERATE_SHLIB_SCRIPT=yes
-+GENERATE_PIE_SCRIPT=yes
-+
-+# Instruct genscripts.sh not to compile scripts in by COMPILE_IN
-+# in order to use external linker scripts files.
-+EMULATION_LIBPATH=
-diff -Nur binutils-2.24.orig/ld/emulparams/nds32elf.sh binutils-2.24/ld/emulparams/nds32elf.sh
---- binutils-2.24.orig/ld/emulparams/nds32elf.sh 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/emulparams/nds32elf.sh 2016-06-30 21:26:12.785898247 +0200
-@@ -0,0 +1,19 @@
-+TEXT_START_ADDR=0x500000
-+# This sets the stack to the top of simulator memory (48MB).
-+OTHER_END_SYMBOLS='PROVIDE (_stack = 0x3000000);'
-+
-+SCRIPT_NAME=nds32elf
-+TEMPLATE_NAME=elf32
-+EXTRA_EM_FILE=nds32elf
-+BIG_OUTPUT_FORMAT="elf32-nds32be"
-+LITTLE_OUTPUT_FORMAT="elf32-nds32le"
-+OUTPUT_FORMAT="$LITTLE_OUTPUT_FORMAT"
-+ARCH=nds32
-+MACHINE=
-+MAXPAGESIZE=0x20
-+EMBEDDED=yes
-+COMMONPAGESIZE=0x20
-+
-+# Instruct genscripts.sh not to compile scripts in by COMPILE_IN
-+# in order to use external linker scripts files.
-+EMULATION_LIBPATH=
-diff -Nur binutils-2.24.orig/ld/emultempl/nds32elf.em binutils-2.24/ld/emultempl/nds32elf.em
---- binutils-2.24.orig/ld/emultempl/nds32elf.em 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/emultempl/nds32elf.em 2016-06-30 21:26:12.785898247 +0200
-@@ -0,0 +1,379 @@
-+# This shell script emits a C file. -*- C -*-
-+# Copyright (C) 2012-2013 Free Software Foundation, Inc.
-+# Contributed by Andes Technology Corporation.
-+#
-+# This file is part of the GNU Binutils.
-+#
-+# This program is free software; you can redistribute it and/or modify
-+# it under the terms of the GNU General Public License as published by
-+# the Free Software Foundation; either version 3 of the License, or
-+# (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program; if not, write to the Free Software
-+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-+# MA 02110-1301, USA.
-+#
-+
-+fragment <<EOF
-+
-+#include "libbfd.h"
-+#include "elf-bfd.h"
-+#include "elf/nds32.h"
-+#include "elf32-nds32.h"
-+
-+static int relax_fp_as_gp = 1; /* --mrelax-omit-fp */
-+static int eliminate_gc_relocs = 0; /* --meliminate-gc-relocs */
-+static FILE *sym_ld_script = NULL; /* --mgen-symbol-ld-script=<file> */
-+static int hyper_relax = 1; /* --mhyper-relax */
-+/* Disable if linking a dynamically linked executable. */
-+static int load_store_relax = 1;
-+static int target_optimize = 0; /* Switch optimization. */
-+static int relax_status = 0; /* Finished optimization. */
-+static int relax_round = 0; /* Going optimization. */
-+static FILE *ex9_export_file = NULL; /* --mexport-ex9=<file> */
-+static FILE *ex9_import_file = NULL; /* --mimport-ex9=<file> */
-+static int update_ex9_table = 0; /* --mupdate-ex9. */
-+static int ex9_limit = 512;
-+static bfd_boolean ex9_loop_aware = FALSE; /* Ignore ex9 if inside a loop. */
-+static bfd_boolean ifc_loop_aware = FALSE; /* Ignore ifc if inside a loop. */
-+
-+/* Save the target options into output bfd to avoid using to many global
-+ variables. Do this after the output has been created, but before
-+ inputs are read. */
-+static void
-+nds32_elf_create_output_section_statements (void)
-+{
-+ if (strstr (bfd_get_target (link_info.output_bfd), "nds32") == NULL)
-+ {
-+ /* Check the output target is nds32. */
-+ einfo ("%F%X%P: error: Cannot change output format whilst linking NDS32 binaries.\n");
-+ return;
-+ }
-+
-+ bfd_elf32_nds32_set_target_option (&link_info, relax_fp_as_gp,
-+ eliminate_gc_relocs,
-+ sym_ld_script,
-+ load_store_relax,
-+ target_optimize, relax_status, relax_round,
-+ ex9_export_file, ex9_import_file,
-+ update_ex9_table, ex9_limit,
-+ ex9_loop_aware, ifc_loop_aware,
-+ hyper_relax);
-+}
-+
-+static void
-+nds32_elf_after_parse (void)
-+{
-+#ifdef NDS32_LINUX_TOOLCHAIN
-+ if (RELAXATION_ENABLED)
-+ {
-+ einfo ("%P: warning: The relaxation isn't supported yet.\n");
-+ DISABLE_RELAXATION;
-+ }
-+#endif
-+
-+ if (link_info.relocatable)
-+ DISABLE_RELAXATION;
-+
-+ if (!RELAXATION_ENABLED)
-+ {
-+ target_optimize &= ~(NDS32_RELAX_IFC_ON | NDS32_RELAX_EX9_ON);
-+ relax_fp_as_gp = 0;
-+ }
-+
-+ if (ex9_import_file)
-+ {
-+ ex9_export_file = NULL;
-+ target_optimize &= ~NDS32_RELAX_EX9_ON;
-+ }
-+ else
-+ update_ex9_table = 0;
-+
-+ if (link_info.shared)
-+ {
-+ target_optimize &= ~(NDS32_RELAX_IFC_ON | NDS32_RELAX_EX9_ON);
-+ }
-+
-+ after_parse_default ();
-+
-+ /* Backward compatible for linker script output_format. */
-+ if (output_target && strcmp (output_target, "elf32-nds32") == 0)
-+ output_target = default_target;
-+}
-+
-+static void
-+nds32_elf_after_open (void)
-+{
-+ unsigned int arch_ver = (unsigned int)-1;
-+ unsigned int abi_ver = (unsigned int)-1;
-+ bfd *abfd;
-+
-+ /* For now, make sure all object files are of the same architecture.
-+ We may try to merge object files with different architecture together. */
-+ for (abfd = link_info.input_bfds; abfd != NULL; abfd = abfd->link_next)
-+ {
-+ if (arch_ver == (unsigned int)-1
-+ && E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
-+ arch_ver = elf_elfheader (abfd)->e_flags & EF_NDS_ARCH ;
-+
-+ if (abi_ver == (unsigned int)-1)
-+ {
-+ /* Initialize ABI version, if not ABI0.
-+ (OS uses empty file to create empty ELF with ABI0). */
-+ if ((elf_elfheader (abfd)->e_flags & EF_NDS_ABI) != 0)
-+ abi_ver = elf_elfheader (abfd)->e_flags & EF_NDS_ABI ;
-+ }
-+ else if ((elf_elfheader (abfd)->e_flags & EF_NDS_ABI) != 0
-+ && abi_ver != (elf_elfheader (abfd)->e_flags & EF_NDS_ABI))
-+ {
-+ /* Incompatible objects. */
-+ einfo (_("%F%B: ABI version of object files mismatched\n"), abfd);
-+ }
-+
-+ /* Append target needed section in the last input object file. */
-+ if (abfd->link_next == NULL)
-+ bfd_elf32_nds32_append_section (&link_info, abfd, target_optimize);
-+ }
-+
-+ /* Check object files if the target is dynamic linked executable
-+ or shared object. */
-+ if (elf_hash_table (&link_info)->dynamic_sections_created
-+ || link_info.shared || link_info.pie)
-+ {
-+ /* Dynamic linked executable with SDA and non-PIC.
-+ Turn off load/store relaxtion. */
-+ /* TODO: This may support in the future. */
-+ load_store_relax = 0 ;
-+ relax_fp_as_gp = 0;
-+ }
-+
-+ /* Call the standard elf routine. */
-+ gld${EMULATION_NAME}_after_open ();
-+}
-+
-+static void
-+nds32_elf_after_allocation (void)
-+{
-+ struct bfd_link_hash_entry *h;
-+
-+ /* Call default after allocation callback.
-+ 1. This is where relaxation is done.
-+ 2. It calls gld${EMULATION_NAME}_map_segments to build ELF segment table.
-+ 3. Any relaxation requires relax being done must be called after it. */
-+ gld${EMULATION_NAME}_after_allocation ();
-+
-+ /* Add a symbol for linker script check the max size. */
-+ if (link_info.output_bfd->sections)
-+ {
-+ h = bfd_link_hash_lookup (link_info.hash, "_RELAX_END_",
-+ FALSE, FALSE, FALSE);
-+ if (!h)
-+ _bfd_generic_link_add_one_symbol
-+ (&link_info, link_info.output_bfd, "_RELAX_END_",
-+ BSF_GLOBAL | BSF_WEAK, link_info.output_bfd->sections,
-+ 0, (const char *) NULL, FALSE,
-+ get_elf_backend_data (link_info.output_bfd)->collect, &h);
-+ }
-+}
-+
-+EOF
-+# Define some shell vars to insert bits of code into the standard elf
-+# parse_args and list_options functions.
-+#
-+PARSE_AND_LIST_PROLOGUE='
-+#define OPTION_BASELINE 301
-+#define OPTION_ELIM_GC_RELOCS (OPTION_BASELINE + 1)
-+#define OPTION_FP_AS_GP (OPTION_BASELINE + 2)
-+#define OPTION_NO_FP_AS_GP (OPTION_BASELINE + 3)
-+#define OPTION_REDUCE_FP_UPDATE (OPTION_BASELINE + 4)
-+#define OPTION_NO_REDUCE_FP_UPDATE (OPTION_BASELINE + 5)
-+#define OPTION_EXPORT_SYMBOLS (OPTION_BASELINE + 6)
-+#define OPTION_HYPER_RELAX (OPTION_BASELINE + 7)
-+
-+/* These are only available to ex9. */
-+#if defined NDS32_EX9_EXT
-+#define OPTION_EX9_BASELINE 320
-+#define OPTION_EX9_TABLE (OPTION_EX9_BASELINE + 1)
-+#define OPTION_NO_EX9_TABLE (OPTION_EX9_BASELINE + 2)
-+#define OPTION_EXPORT_EX9 (OPTION_EX9_BASELINE + 3)
-+#define OPTION_IMPORT_EX9 (OPTION_EX9_BASELINE + 4)
-+#define OPTION_UPDATE_EX9 (OPTION_EX9_BASELINE + 5)
-+#define OPTION_EX9_LIMIT (OPTION_EX9_BASELINE + 6)
-+#define OPTION_EX9_LOOP (OPTION_EX9_BASELINE + 7)
-+#endif
-+
-+/* These are only available to link-time ifc. */
-+#if defined NDS32_IFC_EXT
-+#define OPTION_IFC_BASELINE 340
-+#define OPTION_IFC (OPTION_IFC_BASELINE + 1)
-+#define OPTION_NO_IFC (OPTION_IFC_BASELINE + 2)
-+#define OPTION_IFC_LOOP (OPTION_IFC_BASELINE + 3)
-+#endif
-+'
-+PARSE_AND_LIST_LONGOPTS='
-+ { "mfp-as-gp", no_argument, NULL, OPTION_FP_AS_GP},
-+ { "mno-fp-as-gp", no_argument, NULL, OPTION_NO_FP_AS_GP},
-+ { "mexport-symbols", required_argument, NULL, OPTION_EXPORT_SYMBOLS},
-+ { "mhyper-relax", required_argument, NULL, OPTION_HYPER_RELAX},
-+ /* These are deprecated options. Remove them in the future. */
-+ { "mrelax-reduce-fp-update", no_argument, NULL, OPTION_REDUCE_FP_UPDATE},
-+ { "mrelax-no-reduce-fp-update", no_argument, NULL, OPTION_NO_REDUCE_FP_UPDATE},
-+ { "mbaseline", required_argument, NULL, OPTION_BASELINE},
-+ { "meliminate-gc-relocs", no_argument, NULL, OPTION_ELIM_GC_RELOCS},
-+ { "mrelax-omit-fp", no_argument, NULL, OPTION_FP_AS_GP},
-+ { "mrelax-no-omit-fp", no_argument, NULL, OPTION_NO_FP_AS_GP},
-+ { "mgen-symbol-ld-script", required_argument, NULL, OPTION_EXPORT_SYMBOLS},
-+ /* These are specific optioins for ex9-ext support. */
-+#if defined NDS32_EX9_EXT
-+ { "mex9", no_argument, NULL, OPTION_EX9_TABLE},
-+ { "mno-ex9", no_argument, NULL, OPTION_NO_EX9_TABLE},
-+ { "mexport-ex9", required_argument, NULL, OPTION_EXPORT_EX9},
-+ { "mimport-ex9", required_argument, NULL, OPTION_IMPORT_EX9},
-+ { "mupdate-ex9", no_argument, NULL, OPTION_UPDATE_EX9},
-+ { "mex9-limit", required_argument, NULL, OPTION_EX9_LIMIT},
-+ { "mex9-loop-aware", no_argument, NULL, OPTION_EX9_LOOP},
-+#endif
-+ /* These are specific optioins for ifc-ext support. */
-+#if defined NDS32_IFC_EXT
-+ { "mifc", no_argument, NULL, OPTION_IFC},
-+ { "mno-ifc", no_argument, NULL, OPTION_NO_IFC},
-+ { "mifc-loop-aware", no_argument, NULL, OPTION_IFC_LOOP},
-+#endif
-+'
-+PARSE_AND_LIST_OPTIONS='
-+ fprintf (file, _("\
-+ --m[no-]fp-as-gp Disable/enable fp-as-gp relaxation\n\
-+ --mexport-symbols=FILE Exporting symbols in linker script\n\
-+ --mhyper-relax=level Adjust relax level (low|medium|high). default: medium\n\
-+"));
-+
-+#if defined NDS32_EX9_EXT
-+ fprintf (file, _("\
-+ --m[no-]ex9 Disable/enable link-time EX9 relaxation\n\
-+ --mexport-ex9=FILE Export EX9 table after linking\n\
-+ --mimport-ex9=FILE Import Ex9 table for EX9 relaxation\n\
-+ --mupdate-ex9 Update existing EX9 table\n\
-+ --mex9-limit=NUM Maximum number of entries in ex9 table\n\
-+ --mex9-loop-aware Avoid generate EX9 instruction inside loop\n\
-+"));
-+#endif
-+
-+#if defined NDS32_IFC_EXT
-+ fprintf (file, _("\
-+ --m[no-]ifc Disable/enable link-time IFC optimization\n\
-+ --mifc-loop-aware Avoid generate IFC instruction inside loop\n\
-+"));
-+#endif
-+'
-+PARSE_AND_LIST_ARGS_CASES='
-+ case OPTION_BASELINE:
-+ einfo ("%P: --mbaseline is not used anymore.\n");
-+ break;
-+ case OPTION_ELIM_GC_RELOCS:
-+ eliminate_gc_relocs = 1;
-+ break;
-+ case OPTION_FP_AS_GP:
-+ case OPTION_NO_FP_AS_GP:
-+ relax_fp_as_gp = (optc == OPTION_FP_AS_GP);
-+ break;
-+ case OPTION_REDUCE_FP_UPDATE:
-+ case OPTION_NO_REDUCE_FP_UPDATE:
-+ einfo ("%P: --relax-[no-]reduce-fp-updat is not used anymore.\n");
-+ break;
-+ case OPTION_EXPORT_SYMBOLS:
-+ if (!optarg)
-+ einfo (_("Missing file for --mexport-symbols.\n"), optarg);
-+
-+ if(strcmp (optarg, "-") == 0)
-+ sym_ld_script = stdout;
-+ else
-+ {
-+ sym_ld_script = fopen (optarg, FOPEN_WT);
-+ if(sym_ld_script == NULL)
-+ einfo (_("%P%F: cannot open map file %s: %E.\n"), optarg);
-+ }
-+ break;
-+ case OPTION_HYPER_RELAX:
-+ if (!optarg)
-+ einfo (_("Valid arguments to --mhyper-relax=(low|medium|high).\n"));
-+
-+ if (strcmp (optarg, "low") == 0)
-+ hyper_relax = 0;
-+ else if (strcmp (optarg, "medium") == 0)
-+ hyper_relax = 1;
-+ else if (strcmp (optarg, "high") == 0)
-+ hyper_relax = 2;
-+ else
-+ einfo (_("Valid arguments to --mhyper-relax=(low|medium|high).\n"));
-+
-+ break;
-+#if defined NDS32_EX9_EXT
-+ case OPTION_EX9_TABLE:
-+ target_optimize |= NDS32_RELAX_EX9_ON;
-+ break;
-+ case OPTION_NO_EX9_TABLE:
-+ target_optimize &= ~NDS32_RELAX_EX9_ON;
-+ break;
-+ case OPTION_EXPORT_EX9:
-+ if (!optarg)
-+ einfo (_("Missing file for --mexport-ex9=<file>.\n"));
-+
-+ if(strcmp (optarg, "-") == 0)
-+ ex9_export_file = stdout;
-+ else
-+ {
-+ ex9_export_file = fopen (optarg, "wb");
-+ if(ex9_export_file == NULL)
-+ einfo (_("ERROR %P%F: cannot open ex9 export file %s.\n"), optarg);
-+ }
-+ break;
-+ case OPTION_IMPORT_EX9:
-+ if (!optarg)
-+ einfo (_("Missing file for --mimport-ex9=<file>.\n"));
-+
-+ ex9_import_file = fopen (optarg, "rb+");
-+ if(ex9_import_file == NULL)
-+ einfo (_("ERROR %P%F: cannot open ex9 import file %s.\n"), optarg);
-+ break;
-+ case OPTION_UPDATE_EX9:
-+ update_ex9_table = 1;
-+ break;
-+ case OPTION_EX9_LIMIT:
-+ if (optarg)
-+ {
-+ ex9_limit = atoi (optarg);
-+ if (ex9_limit > 511 || ex9_limit < 1)
-+ {
-+ einfo (_("ERROR: the range of ex9_limit must between 1 and 511\n"));
-+ exit (1);
-+ }
-+ }
-+ break;
-+ case OPTION_EX9_LOOP:
-+ target_optimize |= NDS32_RELAX_EX9_ON;
-+ ex9_loop_aware = 1;
-+ break;
-+#endif
-+#if defined NDS32_IFC_EXT
-+ case OPTION_IFC:
-+ target_optimize |= NDS32_RELAX_IFC_ON;
-+ break;
-+ case OPTION_NO_IFC:
-+ target_optimize &= ~NDS32_RELAX_IFC_ON;
-+ break;
-+ case OPTION_IFC_LOOP:
-+ target_optimize |= NDS32_RELAX_IFC_ON;
-+ ifc_loop_aware = 1;
-+ break;
-+#endif
-+'
-+LDEMUL_AFTER_OPEN=nds32_elf_after_open
-+LDEMUL_AFTER_PARSE=nds32_elf_after_parse
-+LDEMUL_AFTER_ALLOCATION=nds32_elf_after_allocation
-+LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=nds32_elf_create_output_section_statements
-diff -Nur binutils-2.24.orig/ld/gen-doc.texi binutils-2.24/ld/gen-doc.texi
---- binutils-2.24.orig/ld/gen-doc.texi 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/ld/gen-doc.texi 2016-06-30 21:26:12.785898247 +0200
-@@ -17,6 +17,7 @@
- @set MIPS
- @set MMIX
- @set MSP430
-+@set NDS32
- @set POWERPC
- @set POWERPC64
- @set Renesas
-diff -Nur binutils-2.24.orig/ld/ld.1 binutils-2.24/ld/ld.1
---- binutils-2.24.orig/ld/ld.1 2013-11-26 12:41:44.000000000 +0100
-+++ binutils-2.24/ld/ld.1 1970-01-01 01:00:00.000000000 +0100
-@@ -1,2491 +0,0 @@
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--\{\
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--.rm #[ #] #H #V #F C
--.\" ========================================================================
--.\"
--.IX Title "LD 1"
--.TH LD 1 "2013-11-26" "binutils-2.23.92" "GNU Development Tools"
--.\" For nroff, turn off justification. Always turn off hyphenation; it makes
--.\" way too many mistakes in technical documents.
--.if n .ad l
--.nh
--.SH "NAME"
--ld \- The GNU linker
--.SH "SYNOPSIS"
--.IX Header "SYNOPSIS"
--ld [\fBoptions\fR] \fIobjfile\fR ...
--.SH "DESCRIPTION"
--.IX Header "DESCRIPTION"
--\&\fBld\fR combines a number of object and archive files, relocates
--their data and ties up symbol references. Usually the last step in
--compiling a program is to run \fBld\fR.
--.PP
--\&\fBld\fR accepts Linker Command Language files written in
--a superset of \s-1AT&T\s0's Link Editor Command Language syntax,
--to provide explicit and total control over the linking process.
--.PP
--This man page does not describe the command language; see the
--\&\fBld\fR entry in \f(CW\*(C`info\*(C'\fR for full details on the command
--language and on other aspects of the \s-1GNU\s0 linker.
--.PP
--This version of \fBld\fR uses the general purpose \s-1BFD\s0 libraries
--to operate on object files. This allows \fBld\fR to read, combine, and
--write object files in many different formats\-\-\-for example, \s-1COFF\s0 or
--\&\f(CW\*(C`a.out\*(C'\fR. Different formats may be linked together to produce any
--available kind of object file.
--.PP
--Aside from its flexibility, the \s-1GNU\s0 linker is more helpful than other
--linkers in providing diagnostic information. Many linkers abandon
--execution immediately upon encountering an error; whenever possible,
--\&\fBld\fR continues executing, allowing you to identify other errors
--(or, in some cases, to get an output file in spite of the error).
--.PP
--The \s-1GNU\s0 linker \fBld\fR is meant to cover a broad range of situations,
--and to be as compatible as possible with other linkers. As a result,
--you have many choices to control its behavior.
--.SH "OPTIONS"
--.IX Header "OPTIONS"
--The linker supports a plethora of command-line options, but in actual
--practice few of them are used in any particular context.
--For instance, a frequent use of \fBld\fR is to link standard Unix
--object files on a standard, supported Unix system. On such a system, to
--link a file \f(CW\*(C`hello.o\*(C'\fR:
--.PP
--.Vb 1
--\& ld \-o <output> /lib/crt0.o hello.o \-lc
--.Ve
--.PP
--This tells \fBld\fR to produce a file called \fIoutput\fR as the
--result of linking the file \f(CW\*(C`/lib/crt0.o\*(C'\fR with \f(CW\*(C`hello.o\*(C'\fR and
--the library \f(CW\*(C`libc.a\*(C'\fR, which will come from the standard search
--directories. (See the discussion of the \fB\-l\fR option below.)
--.PP
--Some of the command-line options to \fBld\fR may be specified at any
--point in the command line. However, options which refer to files, such
--as \fB\-l\fR or \fB\-T\fR, cause the file to be read at the point at
--which the option appears in the command line, relative to the object
--files and other file options. Repeating non-file options with a
--different argument will either have no further effect, or override prior
--occurrences (those further to the left on the command line) of that
--option. Options which may be meaningfully specified more than once are
--noted in the descriptions below.
--.PP
--Non-option arguments are object files or archives which are to be linked
--together. They may follow, precede, or be mixed in with command-line
--options, except that an object file argument may not be placed between
--an option and its argument.
--.PP
--Usually the linker is invoked with at least one object file, but you can
--specify other forms of binary input files using \fB\-l\fR, \fB\-R\fR,
--and the script command language. If \fIno\fR binary input files at all
--are specified, the linker does not produce any output, and issues the
--message \fBNo input files\fR.
--.PP
--If the linker cannot recognize the format of an object file, it will
--assume that it is a linker script. A script specified in this way
--augments the main linker script used for the link (either the default
--linker script or the one specified by using \fB\-T\fR). This feature
--permits the linker to link against a file which appears to be an object
--or an archive, but actually merely defines some symbol values, or uses
--\&\f(CW\*(C`INPUT\*(C'\fR or \f(CW\*(C`GROUP\*(C'\fR to load other objects. Specifying a
--script in this way merely augments the main linker script, with the
--extra commands placed after the main script; use the \fB\-T\fR option
--to replace the default linker script entirely, but note the effect of
--the \f(CW\*(C`INSERT\*(C'\fR command.
--.PP
--For options whose names are a single letter,
--option arguments must either follow the option letter without intervening
--whitespace, or be given as separate arguments immediately following the
--option that requires them.
--.PP
--For options whose names are multiple letters, either one dash or two can
--precede the option name; for example, \fB\-trace\-symbol\fR and
--\&\fB\-\-trace\-symbol\fR are equivalent. Note\-\-\-there is one exception to
--this rule. Multiple letter options that start with a lower case 'o' can
--only be preceded by two dashes. This is to reduce confusion with the
--\&\fB\-o\fR option. So for example \fB\-omagic\fR sets the output file
--name to \fBmagic\fR whereas \fB\-\-omagic\fR sets the \s-1NMAGIC\s0 flag on the
--output.
--.PP
--Arguments to multiple-letter options must either be separated from the
--option name by an equals sign, or be given as separate arguments
--immediately following the option that requires them. For example,
--\&\fB\-\-trace\-symbol foo\fR and \fB\-\-trace\-symbol=foo\fR are equivalent.
--Unique abbreviations of the names of multiple-letter options are
--accepted.
--.PP
--Note\-\-\-if the linker is being invoked indirectly, via a compiler driver
--(e.g. \fBgcc\fR) then all the linker command line options should be
--prefixed by \fB\-Wl,\fR (or whatever is appropriate for the particular
--compiler driver) like this:
--.PP
--.Vb 1
--\& gcc \-Wl,\-\-start\-group foo.o bar.o \-Wl,\-\-end\-group
--.Ve
--.PP
--This is important, because otherwise the compiler driver program may
--silently drop the linker options, resulting in a bad link. Confusion
--may also arise when passing options that require values through a
--driver, as the use of a space between option and argument acts as
--a separator, and causes the driver to pass only the option to the linker
--and the argument to the compiler. In this case, it is simplest to use
--the joined forms of both single\- and multiple-letter options, such as:
--.PP
--.Vb 1
--\& gcc foo.o bar.o \-Wl,\-eENTRY \-Wl,\-Map=a.map
--.Ve
--.PP
--Here is a table of the generic command line switches accepted by the \s-1GNU\s0
--linker:
--.IP "\fB@\fR\fIfile\fR" 4
--.IX Item "@file"
--Read command-line options from \fIfile\fR. The options read are
--inserted in place of the original @\fIfile\fR option. If \fIfile\fR
--does not exist, or cannot be read, then the option will be treated
--literally, and not removed.
--.Sp
--Options in \fIfile\fR are separated by whitespace. A whitespace
--character may be included in an option by surrounding the entire
--option in either single or double quotes. Any character (including a
--backslash) may be included by prefixing the character to be included
--with a backslash. The \fIfile\fR may itself contain additional
--@\fIfile\fR options; any such options will be processed recursively.
--.IP "\fB\-a\fR \fIkeyword\fR" 4
--.IX Item "-a keyword"
--This option is supported for \s-1HP/UX\s0 compatibility. The \fIkeyword\fR
--argument must be one of the strings \fBarchive\fR, \fBshared\fR, or
--\&\fBdefault\fR. \fB\-aarchive\fR is functionally equivalent to
--\&\fB\-Bstatic\fR, and the other two keywords are functionally equivalent
--to \fB\-Bdynamic\fR. This option may be used any number of times.
--.IP "\fB\-\-audit\fR \fI\s-1AUDITLIB\s0\fR" 4
--.IX Item "--audit AUDITLIB"
--Adds \fI\s-1AUDITLIB\s0\fR to the \f(CW\*(C`DT_AUDIT\*(C'\fR entry of the dynamic section.
--\&\fI\s-1AUDITLIB\s0\fR is not checked for existence, nor will it use the \s-1DT_SONAME\s0
--specified in the library. If specified multiple times \f(CW\*(C`DT_AUDIT\*(C'\fR
--will contain a colon separated list of audit interfaces to use. If the linker
--finds an object with an audit entry while searching for shared libraries,
--it will add a corresponding \f(CW\*(C`DT_DEPAUDIT\*(C'\fR entry in the output file.
--This option is only meaningful on \s-1ELF\s0 platforms supporting the rtld-audit
--interface.
--.IP "\fB\-A\fR \fIarchitecture\fR" 4
--.IX Item "-A architecture"
--.PD 0
--.IP "\fB\-\-architecture=\fR\fIarchitecture\fR" 4
--.IX Item "--architecture=architecture"
--.PD
--In the current release of \fBld\fR, this option is useful only for the
--Intel 960 family of architectures. In that \fBld\fR configuration, the
--\&\fIarchitecture\fR argument identifies the particular architecture in
--the 960 family, enabling some safeguards and modifying the
--archive-library search path.
--.Sp
--Future releases of \fBld\fR may support similar functionality for
--other architecture families.
--.IP "\fB\-b\fR \fIinput-format\fR" 4
--.IX Item "-b input-format"
--.PD 0
--.IP "\fB\-\-format=\fR\fIinput-format\fR" 4
--.IX Item "--format=input-format"
--.PD
--\&\fBld\fR may be configured to support more than one kind of object
--file. If your \fBld\fR is configured this way, you can use the
--\&\fB\-b\fR option to specify the binary format for input object files
--that follow this option on the command line. Even when \fBld\fR is
--configured to support alternative object formats, you don't usually need
--to specify this, as \fBld\fR should be configured to expect as a
--default input format the most usual format on each machine.
--\&\fIinput-format\fR is a text string, the name of a particular format
--supported by the \s-1BFD\s0 libraries. (You can list the available binary
--formats with \fBobjdump \-i\fR.)
--.Sp
--You may want to use this option if you are linking files with an unusual
--binary format. You can also use \fB\-b\fR to switch formats explicitly (when
--linking object files of different formats), by including
--\&\fB\-b\fR \fIinput-format\fR before each group of object files in a
--particular format.
--.Sp
--The default format is taken from the environment variable
--\&\f(CW\*(C`GNUTARGET\*(C'\fR.
--.Sp
--You can also define the input format from a script, using the command
--\&\f(CW\*(C`TARGET\*(C'\fR;
--.IP "\fB\-c\fR \fIMRI-commandfile\fR" 4
--.IX Item "-c MRI-commandfile"
--.PD 0
--.IP "\fB\-\-mri\-script=\fR\fIMRI-commandfile\fR" 4
--.IX Item "--mri-script=MRI-commandfile"
--.PD
--For compatibility with linkers produced by \s-1MRI\s0, \fBld\fR accepts script
--files written in an alternate, restricted command language, described in
--the \s-1MRI\s0 Compatible Script Files section of \s-1GNU\s0 ld documentation.
--Introduce \s-1MRI\s0 script files with
--the option \fB\-c\fR; use the \fB\-T\fR option to run linker
--scripts written in the general-purpose \fBld\fR scripting language.
--If \fIMRI-cmdfile\fR does not exist, \fBld\fR looks for it in the directories
--specified by any \fB\-L\fR options.
--.IP "\fB\-d\fR" 4
--.IX Item "-d"
--.PD 0
--.IP "\fB\-dc\fR" 4
--.IX Item "-dc"
--.IP "\fB\-dp\fR" 4
--.IX Item "-dp"
--.PD
--These three options are equivalent; multiple forms are supported for
--compatibility with other linkers. They assign space to common symbols
--even if a relocatable output file is specified (with \fB\-r\fR). The
--script command \f(CW\*(C`FORCE_COMMON_ALLOCATION\*(C'\fR has the same effect.
--.IP "\fB\-\-depaudit\fR \fI\s-1AUDITLIB\s0\fR" 4
--.IX Item "--depaudit AUDITLIB"
--.PD 0
--.IP "\fB\-P\fR \fI\s-1AUDITLIB\s0\fR" 4
--.IX Item "-P AUDITLIB"
--.PD
--Adds \fI\s-1AUDITLIB\s0\fR to the \f(CW\*(C`DT_DEPAUDIT\*(C'\fR entry of the dynamic section.
--\&\fI\s-1AUDITLIB\s0\fR is not checked for existence, nor will it use the \s-1DT_SONAME\s0
--specified in the library. If specified multiple times \f(CW\*(C`DT_DEPAUDIT\*(C'\fR
--will contain a colon separated list of audit interfaces to use. This
--option is only meaningful on \s-1ELF\s0 platforms supporting the rtld-audit interface.
--The \-P option is provided for Solaris compatibility.
--.IP "\fB\-e\fR \fIentry\fR" 4
--.IX Item "-e entry"
--.PD 0
--.IP "\fB\-\-entry=\fR\fIentry\fR" 4
--.IX Item "--entry=entry"
--.PD
--Use \fIentry\fR as the explicit symbol for beginning execution of your
--program, rather than the default entry point. If there is no symbol
--named \fIentry\fR, the linker will try to parse \fIentry\fR as a number,
--and use that as the entry address (the number will be interpreted in
--base 10; you may use a leading \fB0x\fR for base 16, or a leading
--\&\fB0\fR for base 8).
--.IP "\fB\-\-exclude\-libs\fR \fIlib\fR\fB,\fR\fIlib\fR\fB,...\fR" 4
--.IX Item "--exclude-libs lib,lib,..."
--Specifies a list of archive libraries from which symbols should not be automatically
--exported. The library names may be delimited by commas or colons. Specifying
--\&\f(CW\*(C`\-\-exclude\-libs ALL\*(C'\fR excludes symbols in all archive libraries from
--automatic export. This option is available only for the i386 \s-1PE\s0 targeted
--port of the linker and for \s-1ELF\s0 targeted ports. For i386 \s-1PE\s0, symbols
--explicitly listed in a .def file are still exported, regardless of this
--option. For \s-1ELF\s0 targeted ports, symbols affected by this option will
--be treated as hidden.
--.IP "\fB\-\-exclude\-modules\-for\-implib\fR \fImodule\fR\fB,\fR\fImodule\fR\fB,...\fR" 4
--.IX Item "--exclude-modules-for-implib module,module,..."
--Specifies a list of object files or archive members, from which symbols
--should not be automatically exported, but which should be copied wholesale
--into the import library being generated during the link. The module names
--may be delimited by commas or colons, and must match exactly the filenames
--used by \fBld\fR to open the files; for archive members, this is simply
--the member name, but for object files the name listed must include and
--match precisely any path used to specify the input file on the linker's
--command-line. This option is available only for the i386 \s-1PE\s0 targeted port
--of the linker. Symbols explicitly listed in a .def file are still exported,
--regardless of this option.
--.IP "\fB\-E\fR" 4
--.IX Item "-E"
--.PD 0
--.IP "\fB\-\-export\-dynamic\fR" 4
--.IX Item "--export-dynamic"
--.IP "\fB\-\-no\-export\-dynamic\fR" 4
--.IX Item "--no-export-dynamic"
--.PD
--When creating a dynamically linked executable, using the \fB\-E\fR
--option or the \fB\-\-export\-dynamic\fR option causes the linker to add
--all symbols to the dynamic symbol table. The dynamic symbol table is the
--set of symbols which are visible from dynamic objects at run time.
--.Sp
--If you do not use either of these options (or use the
--\&\fB\-\-no\-export\-dynamic\fR option to restore the default behavior), the
--dynamic symbol table will normally contain only those symbols which are
--referenced by some dynamic object mentioned in the link.
--.Sp
--If you use \f(CW\*(C`dlopen\*(C'\fR to load a dynamic object which needs to refer
--back to the symbols defined by the program, rather than some other
--dynamic object, then you will probably need to use this option when
--linking the program itself.
--.Sp
--You can also use the dynamic list to control what symbols should
--be added to the dynamic symbol table if the output format supports it.
--See the description of \fB\-\-dynamic\-list\fR.
--.Sp
--Note that this option is specific to \s-1ELF\s0 targeted ports. \s-1PE\s0 targets
--support a similar function to export all symbols from a \s-1DLL\s0 or \s-1EXE\s0; see
--the description of \fB\-\-export\-all\-symbols\fR below.
--.IP "\fB\-EB\fR" 4
--.IX Item "-EB"
--Link big-endian objects. This affects the default output format.
--.IP "\fB\-EL\fR" 4
--.IX Item "-EL"
--Link little-endian objects. This affects the default output format.
--.IP "\fB\-f\fR \fIname\fR" 4
--.IX Item "-f name"
--.PD 0
--.IP "\fB\-\-auxiliary=\fR\fIname\fR" 4
--.IX Item "--auxiliary=name"
--.PD
--When creating an \s-1ELF\s0 shared object, set the internal \s-1DT_AUXILIARY\s0 field
--to the specified name. This tells the dynamic linker that the symbol
--table of the shared object should be used as an auxiliary filter on the
--symbol table of the shared object \fIname\fR.
--.Sp
--If you later link a program against this filter object, then, when you
--run the program, the dynamic linker will see the \s-1DT_AUXILIARY\s0 field. If
--the dynamic linker resolves any symbols from the filter object, it will
--first check whether there is a definition in the shared object
--\&\fIname\fR. If there is one, it will be used instead of the definition
--in the filter object. The shared object \fIname\fR need not exist.
--Thus the shared object \fIname\fR may be used to provide an alternative
--implementation of certain functions, perhaps for debugging or for
--machine specific performance.
--.Sp
--This option may be specified more than once. The \s-1DT_AUXILIARY\s0 entries
--will be created in the order in which they appear on the command line.
--.IP "\fB\-F\fR \fIname\fR" 4
--.IX Item "-F name"
--.PD 0
--.IP "\fB\-\-filter=\fR\fIname\fR" 4
--.IX Item "--filter=name"
--.PD
--When creating an \s-1ELF\s0 shared object, set the internal \s-1DT_FILTER\s0 field to
--the specified name. This tells the dynamic linker that the symbol table
--of the shared object which is being created should be used as a filter
--on the symbol table of the shared object \fIname\fR.
--.Sp
--If you later link a program against this filter object, then, when you
--run the program, the dynamic linker will see the \s-1DT_FILTER\s0 field. The
--dynamic linker will resolve symbols according to the symbol table of the
--filter object as usual, but it will actually link to the definitions
--found in the shared object \fIname\fR. Thus the filter object can be
--used to select a subset of the symbols provided by the object
--\&\fIname\fR.
--.Sp
--Some older linkers used the \fB\-F\fR option throughout a compilation
--toolchain for specifying object-file format for both input and output
--object files.
--The \s-1GNU\s0 linker uses other mechanisms for this purpose: the
--\&\fB\-b\fR, \fB\-\-format\fR, \fB\-\-oformat\fR options, the
--\&\f(CW\*(C`TARGET\*(C'\fR command in linker scripts, and the \f(CW\*(C`GNUTARGET\*(C'\fR
--environment variable.
--The \s-1GNU\s0 linker will ignore the \fB\-F\fR option when not
--creating an \s-1ELF\s0 shared object.
--.IP "\fB\-fini=\fR\fIname\fR" 4
--.IX Item "-fini=name"
--When creating an \s-1ELF\s0 executable or shared object, call \s-1NAME\s0 when the
--executable or shared object is unloaded, by setting \s-1DT_FINI\s0 to the
--address of the function. By default, the linker uses \f(CW\*(C`_fini\*(C'\fR as
--the function to call.
--.IP "\fB\-g\fR" 4
--.IX Item "-g"
--Ignored. Provided for compatibility with other tools.
--.IP "\fB\-G\fR \fIvalue\fR" 4
--.IX Item "-G value"
--.PD 0
--.IP "\fB\-\-gpsize=\fR\fIvalue\fR" 4
--.IX Item "--gpsize=value"
--.PD
--Set the maximum size of objects to be optimized using the \s-1GP\s0 register to
--\&\fIsize\fR. This is only meaningful for object file formats such as
--\&\s-1MIPS\s0 \s-1ELF\s0 that support putting large and small objects into different
--sections. This is ignored for other object file formats.
--.IP "\fB\-h\fR \fIname\fR" 4
--.IX Item "-h name"
--.PD 0
--.IP "\fB\-soname=\fR\fIname\fR" 4
--.IX Item "-soname=name"
--.PD
--When creating an \s-1ELF\s0 shared object, set the internal \s-1DT_SONAME\s0 field to
--the specified name. When an executable is linked with a shared object
--which has a \s-1DT_SONAME\s0 field, then when the executable is run the dynamic
--linker will attempt to load the shared object specified by the \s-1DT_SONAME\s0
--field rather than the using the file name given to the linker.
--.IP "\fB\-i\fR" 4
--.IX Item "-i"
--Perform an incremental link (same as option \fB\-r\fR).
--.IP "\fB\-init=\fR\fIname\fR" 4
--.IX Item "-init=name"
--When creating an \s-1ELF\s0 executable or shared object, call \s-1NAME\s0 when the
--executable or shared object is loaded, by setting \s-1DT_INIT\s0 to the address
--of the function. By default, the linker uses \f(CW\*(C`_init\*(C'\fR as the
--function to call.
--.IP "\fB\-l\fR \fInamespec\fR" 4
--.IX Item "-l namespec"
--.PD 0
--.IP "\fB\-\-library=\fR\fInamespec\fR" 4
--.IX Item "--library=namespec"
--.PD
--Add the archive or object file specified by \fInamespec\fR to the
--list of files to link. This option may be used any number of times.
--If \fInamespec\fR is of the form \fI:\fIfilename\fI\fR, \fBld\fR
--will search the library path for a file called \fIfilename\fR, otherwise it
--will search the library path for a file called \fIlib\fInamespec\fI.a\fR.
--.Sp
--On systems which support shared libraries, \fBld\fR may also search for
--files other than \fIlib\fInamespec\fI.a\fR. Specifically, on \s-1ELF\s0
--and SunOS systems, \fBld\fR will search a directory for a library
--called \fIlib\fInamespec\fI.so\fR before searching for one called
--\&\fIlib\fInamespec\fI.a\fR. (By convention, a \f(CW\*(C`.so\*(C'\fR extension
--indicates a shared library.) Note that this behavior does not apply
--to \fI:\fIfilename\fI\fR, which always specifies a file called
--\&\fIfilename\fR.
--.Sp
--The linker will search an archive only once, at the location where it is
--specified on the command line. If the archive defines a symbol which
--was undefined in some object which appeared before the archive on the
--command line, the linker will include the appropriate file(s) from the
--archive. However, an undefined symbol in an object appearing later on
--the command line will not cause the linker to search the archive again.
--.Sp
--See the \fB\-(\fR option for a way to force the linker to search
--archives multiple times.
--.Sp
--You may list the same archive multiple times on the command line.
--.Sp
--This type of archive searching is standard for Unix linkers. However,
--if you are using \fBld\fR on \s-1AIX\s0, note that it is different from the
--behaviour of the \s-1AIX\s0 linker.
--.IP "\fB\-L\fR \fIsearchdir\fR" 4
--.IX Item "-L searchdir"
--.PD 0
--.IP "\fB\-\-library\-path=\fR\fIsearchdir\fR" 4
--.IX Item "--library-path=searchdir"
--.PD
--Add path \fIsearchdir\fR to the list of paths that \fBld\fR will search
--for archive libraries and \fBld\fR control scripts. You may use this
--option any number of times. The directories are searched in the order
--in which they are specified on the command line. Directories specified
--on the command line are searched before the default directories. All
--\&\fB\-L\fR options apply to all \fB\-l\fR options, regardless of the
--order in which the options appear. \fB\-L\fR options do not affect
--how \fBld\fR searches for a linker script unless \fB\-T\fR
--option is specified.
--.Sp
--If \fIsearchdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
--by the \fIsysroot prefix\fR, a path specified when the linker is configured.
--.Sp
--The default set of paths searched (without being specified with
--\&\fB\-L\fR) depends on which emulation mode \fBld\fR is using, and in
--some cases also on how it was configured.
--.Sp
--The paths can also be specified in a link script with the
--\&\f(CW\*(C`SEARCH_DIR\*(C'\fR command. Directories specified this way are searched
--at the point in which the linker script appears in the command line.
--.IP "\fB\-m\fR \fIemulation\fR" 4
--.IX Item "-m emulation"
--Emulate the \fIemulation\fR linker. You can list the available
--emulations with the \fB\-\-verbose\fR or \fB\-V\fR options.
--.Sp
--If the \fB\-m\fR option is not used, the emulation is taken from the
--\&\f(CW\*(C`LDEMULATION\*(C'\fR environment variable, if that is defined.
--.Sp
--Otherwise, the default emulation depends upon how the linker was
--configured.
--.IP "\fB\-M\fR" 4
--.IX Item "-M"
--.PD 0
--.IP "\fB\-\-print\-map\fR" 4
--.IX Item "--print-map"
--.PD
--Print a link map to the standard output. A link map provides
--information about the link, including the following:
--.RS 4
--.IP "\(bu" 4
--Where object files are mapped into memory.
--.IP "\(bu" 4
--How common symbols are allocated.
--.IP "\(bu" 4
--All archive members included in the link, with a mention of the symbol
--which caused the archive member to be brought in.
--.IP "\(bu" 4
--The values assigned to symbols.
--.Sp
--Note \- symbols whose values are computed by an expression which
--involves a reference to a previous value of the same symbol may not
--have correct result displayed in the link map. This is because the
--linker discards intermediate results and only retains the final value
--of an expression. Under such circumstances the linker will display
--the final value enclosed by square brackets. Thus for example a
--linker script containing:
--.Sp
--.Vb 3
--\& foo = 1
--\& foo = foo * 4
--\& foo = foo + 8
--.Ve
--.Sp
--will produce the following output in the link map if the \fB\-M\fR
--option is used:
--.Sp
--.Vb 3
--\& 0x00000001 foo = 0x1
--\& [0x0000000c] foo = (foo * 0x4)
--\& [0x0000000c] foo = (foo + 0x8)
--.Ve
--.Sp
--See \fBExpressions\fR for more information about expressions in linker
--scripts.
--.RE
--.RS 4
--.RE
--.IP "\fB\-n\fR" 4
--.IX Item "-n"
--.PD 0
--.IP "\fB\-\-nmagic\fR" 4
--.IX Item "--nmagic"
--.PD
--Turn off page alignment of sections, and disable linking against shared
--libraries. If the output format supports Unix style magic numbers,
--mark the output as \f(CW\*(C`NMAGIC\*(C'\fR.
--.IP "\fB\-N\fR" 4
--.IX Item "-N"
--.PD 0
--.IP "\fB\-\-omagic\fR" 4
--.IX Item "--omagic"
--.PD
--Set the text and data sections to be readable and writable. Also, do
--not page-align the data segment, and disable linking against shared
--libraries. If the output format supports Unix style magic numbers,
--mark the output as \f(CW\*(C`OMAGIC\*(C'\fR. Note: Although a writable text section
--is allowed for PE-COFF targets, it does not conform to the format
--specification published by Microsoft.
--.IP "\fB\-\-no\-omagic\fR" 4
--.IX Item "--no-omagic"
--This option negates most of the effects of the \fB\-N\fR option. It
--sets the text section to be read-only, and forces the data segment to
--be page-aligned. Note \- this option does not enable linking against
--shared libraries. Use \fB\-Bdynamic\fR for this.
--.IP "\fB\-o\fR \fIoutput\fR" 4
--.IX Item "-o output"
--.PD 0
--.IP "\fB\-\-output=\fR\fIoutput\fR" 4
--.IX Item "--output=output"
--.PD
--Use \fIoutput\fR as the name for the program produced by \fBld\fR; if this
--option is not specified, the name \fIa.out\fR is used by default. The
--script command \f(CW\*(C`OUTPUT\*(C'\fR can also specify the output file name.
--.IP "\fB\-O\fR \fIlevel\fR" 4
--.IX Item "-O level"
--If \fIlevel\fR is a numeric values greater than zero \fBld\fR optimizes
--the output. This might take significantly longer and therefore probably
--should only be enabled for the final binary. At the moment this
--option only affects \s-1ELF\s0 shared library generation. Future releases of
--the linker may make more use of this option. Also currently there is
--no difference in the linker's behaviour for different non-zero values
--of this option. Again this may change with future releases.
--.IP "\fB\-q\fR" 4
--.IX Item "-q"
--.PD 0
--.IP "\fB\-\-emit\-relocs\fR" 4
--.IX Item "--emit-relocs"
--.PD
--Leave relocation sections and contents in fully linked executables.
--Post link analysis and optimization tools may need this information in
--order to perform correct modifications of executables. This results
--in larger executables.
--.Sp
--This option is currently only supported on \s-1ELF\s0 platforms.
--.IP "\fB\-\-force\-dynamic\fR" 4
--.IX Item "--force-dynamic"
--Force the output file to have dynamic sections. This option is specific
--to VxWorks targets.
--.IP "\fB\-r\fR" 4
--.IX Item "-r"
--.PD 0
--.IP "\fB\-\-relocatable\fR" 4
--.IX Item "--relocatable"
--.PD
--Generate relocatable output\-\-\-i.e., generate an output file that can in
--turn serve as input to \fBld\fR. This is often called \fIpartial
--linking\fR. As a side effect, in environments that support standard Unix
--magic numbers, this option also sets the output file's magic number to
--\&\f(CW\*(C`OMAGIC\*(C'\fR.
--If this option is not specified, an absolute file is produced. When
--linking \*(C+ programs, this option \fIwill not\fR resolve references to
--constructors; to do that, use \fB\-Ur\fR.
--.Sp
--When an input file does not have the same format as the output file,
--partial linking is only supported if that input file does not contain any
--relocations. Different output formats can have further restrictions; for
--example some \f(CW\*(C`a.out\*(C'\fR\-based formats do not support partial linking
--with input files in other formats at all.
--.Sp
--This option does the same thing as \fB\-i\fR.
--.IP "\fB\-R\fR \fIfilename\fR" 4
--.IX Item "-R filename"
--.PD 0
--.IP "\fB\-\-just\-symbols=\fR\fIfilename\fR" 4
--.IX Item "--just-symbols=filename"
--.PD
--Read symbol names and their addresses from \fIfilename\fR, but do not
--relocate it or include it in the output. This allows your output file
--to refer symbolically to absolute locations of memory defined in other
--programs. You may use this option more than once.
--.Sp
--For compatibility with other \s-1ELF\s0 linkers, if the \fB\-R\fR option is
--followed by a directory name, rather than a file name, it is treated as
--the \fB\-rpath\fR option.
--.IP "\fB\-s\fR" 4
--.IX Item "-s"
--.PD 0
--.IP "\fB\-\-strip\-all\fR" 4
--.IX Item "--strip-all"
--.PD
--Omit all symbol information from the output file.
--.IP "\fB\-S\fR" 4
--.IX Item "-S"
--.PD 0
--.IP "\fB\-\-strip\-debug\fR" 4
--.IX Item "--strip-debug"
--.PD
--Omit debugger symbol information (but not all symbols) from the output file.
--.IP "\fB\-t\fR" 4
--.IX Item "-t"
--.PD 0
--.IP "\fB\-\-trace\fR" 4
--.IX Item "--trace"
--.PD
--Print the names of the input files as \fBld\fR processes them.
--.IP "\fB\-T\fR \fIscriptfile\fR" 4
--.IX Item "-T scriptfile"
--.PD 0
--.IP "\fB\-\-script=\fR\fIscriptfile\fR" 4
--.IX Item "--script=scriptfile"
--.PD
--Use \fIscriptfile\fR as the linker script. This script replaces
--\&\fBld\fR's default linker script (rather than adding to it), so
--\&\fIcommandfile\fR must specify everything necessary to describe the
--output file. If \fIscriptfile\fR does not exist in
--the current directory, \f(CW\*(C`ld\*(C'\fR looks for it in the directories
--specified by any preceding \fB\-L\fR options. Multiple \fB\-T\fR
--options accumulate.
--.IP "\fB\-dT\fR \fIscriptfile\fR" 4
--.IX Item "-dT scriptfile"
--.PD 0
--.IP "\fB\-\-default\-script=\fR\fIscriptfile\fR" 4
--.IX Item "--default-script=scriptfile"
--.PD
--Use \fIscriptfile\fR as the default linker script.
--.Sp
--This option is similar to the \fB\-\-script\fR option except that
--processing of the script is delayed until after the rest of the
--command line has been processed. This allows options placed after the
--\&\fB\-\-default\-script\fR option on the command line to affect the
--behaviour of the linker script, which can be important when the linker
--command line cannot be directly controlled by the user. (eg because
--the command line is being constructed by another tool, such as
--\&\fBgcc\fR).
--.IP "\fB\-u\fR \fIsymbol\fR" 4
--.IX Item "-u symbol"
--.PD 0
--.IP "\fB\-\-undefined=\fR\fIsymbol\fR" 4
--.IX Item "--undefined=symbol"
--.PD
--Force \fIsymbol\fR to be entered in the output file as an undefined
--symbol. Doing this may, for example, trigger linking of additional
--modules from standard libraries. \fB\-u\fR may be repeated with
--different option arguments to enter additional undefined symbols. This
--option is equivalent to the \f(CW\*(C`EXTERN\*(C'\fR linker script command.
--.IP "\fB\-Ur\fR" 4
--.IX Item "-Ur"
--For anything other than \*(C+ programs, this option is equivalent to
--\&\fB\-r\fR: it generates relocatable output\-\-\-i.e., an output file that can in
--turn serve as input to \fBld\fR. When linking \*(C+ programs, \fB\-Ur\fR
--\&\fIdoes\fR resolve references to constructors, unlike \fB\-r\fR.
--It does not work to use \fB\-Ur\fR on files that were themselves linked
--with \fB\-Ur\fR; once the constructor table has been built, it cannot
--be added to. Use \fB\-Ur\fR only for the last partial link, and
--\&\fB\-r\fR for the others.
--.IP "\fB\-\-unique[=\fR\fI\s-1SECTION\s0\fR\fB]\fR" 4
--.IX Item "--unique[=SECTION]"
--Creates a separate output section for every input section matching
--\&\fI\s-1SECTION\s0\fR, or if the optional wildcard \fI\s-1SECTION\s0\fR argument is
--missing, for every orphan input section. An orphan section is one not
--specifically mentioned in a linker script. You may use this option
--multiple times on the command line; It prevents the normal merging of
--input sections with the same name, overriding output section assignments
--in a linker script.
--.IP "\fB\-v\fR" 4
--.IX Item "-v"
--.PD 0
--.IP "\fB\-\-version\fR" 4
--.IX Item "--version"
--.IP "\fB\-V\fR" 4
--.IX Item "-V"
--.PD
--Display the version number for \fBld\fR. The \fB\-V\fR option also
--lists the supported emulations.
--.IP "\fB\-x\fR" 4
--.IX Item "-x"
--.PD 0
--.IP "\fB\-\-discard\-all\fR" 4
--.IX Item "--discard-all"
--.PD
--Delete all local symbols.
--.IP "\fB\-X\fR" 4
--.IX Item "-X"
--.PD 0
--.IP "\fB\-\-discard\-locals\fR" 4
--.IX Item "--discard-locals"
--.PD
--Delete all temporary local symbols. (These symbols start with
--system-specific local label prefixes, typically \fB.L\fR for \s-1ELF\s0 systems
--or \fBL\fR for traditional a.out systems.)
--.IP "\fB\-y\fR \fIsymbol\fR" 4
--.IX Item "-y symbol"
--.PD 0
--.IP "\fB\-\-trace\-symbol=\fR\fIsymbol\fR" 4
--.IX Item "--trace-symbol=symbol"
--.PD
--Print the name of each linked file in which \fIsymbol\fR appears. This
--option may be given any number of times. On many systems it is necessary
--to prepend an underscore.
--.Sp
--This option is useful when you have an undefined symbol in your link but
--don't know where the reference is coming from.
--.IP "\fB\-Y\fR \fIpath\fR" 4
--.IX Item "-Y path"
--Add \fIpath\fR to the default library search path. This option exists
--for Solaris compatibility.
--.IP "\fB\-z\fR \fIkeyword\fR" 4
--.IX Item "-z keyword"
--The recognized keywords are:
--.RS 4
--.IP "\fBcombreloc\fR" 4
--.IX Item "combreloc"
--Combines multiple reloc sections and sorts them to make dynamic symbol
--lookup caching possible.
--.IP "\fBdefs\fR" 4
--.IX Item "defs"
--Disallows undefined symbols in object files. Undefined symbols in
--shared libraries are still allowed.
--.IP "\fBexecstack\fR" 4
--.IX Item "execstack"
--Marks the object as requiring executable stack.
--.IP "\fBglobal\fR" 4
--.IX Item "global"
--This option is only meaningful when building a shared object. It makes
--the symbols defined by this shared object available for symbol resolution
--of subsequently loaded libraries.
--.IP "\fBinitfirst\fR" 4
--.IX Item "initfirst"
--This option is only meaningful when building a shared object.
--It marks the object so that its runtime initialization will occur
--before the runtime initialization of any other objects brought into
--the process at the same time. Similarly the runtime finalization of
--the object will occur after the runtime finalization of any other
--objects.
--.IP "\fBinterpose\fR" 4
--.IX Item "interpose"
--Marks the object that its symbol table interposes before all symbols
--but the primary executable.
--.IP "\fBlazy\fR" 4
--.IX Item "lazy"
--When generating an executable or shared library, mark it to tell the
--dynamic linker to defer function call resolution to the point when
--the function is called (lazy binding), rather than at load time.
--Lazy binding is the default.
--.IP "\fBloadfltr\fR" 4
--.IX Item "loadfltr"
--Marks the object that its filters be processed immediately at
--runtime.
--.IP "\fBmuldefs\fR" 4
--.IX Item "muldefs"
--Allows multiple definitions.
--.IP "\fBnocombreloc\fR" 4
--.IX Item "nocombreloc"
--Disables multiple reloc sections combining.
--.IP "\fBnocopyreloc\fR" 4
--.IX Item "nocopyreloc"
--Disables production of copy relocs.
--.IP "\fBnodefaultlib\fR" 4
--.IX Item "nodefaultlib"
--Marks the object that the search for dependencies of this object will
--ignore any default library search paths.
--.IP "\fBnodelete\fR" 4
--.IX Item "nodelete"
--Marks the object shouldn't be unloaded at runtime.
--.IP "\fBnodlopen\fR" 4
--.IX Item "nodlopen"
--Marks the object not available to \f(CW\*(C`dlopen\*(C'\fR.
--.IP "\fBnodump\fR" 4
--.IX Item "nodump"
--Marks the object can not be dumped by \f(CW\*(C`dldump\*(C'\fR.
--.IP "\fBnoexecstack\fR" 4
--.IX Item "noexecstack"
--Marks the object as not requiring executable stack.
--.IP "\fBnorelro\fR" 4
--.IX Item "norelro"
--Don't create an \s-1ELF\s0 \f(CW\*(C`PT_GNU_RELRO\*(C'\fR segment header in the object.
--.IP "\fBnow\fR" 4
--.IX Item "now"
--When generating an executable or shared library, mark it to tell the
--dynamic linker to resolve all symbols when the program is started, or
--when the shared library is linked to using dlopen, instead of
--deferring function call resolution to the point when the function is
--first called.
--.IP "\fBorigin\fR" 4
--.IX Item "origin"
--Marks the object may contain \f(CW$ORIGIN\fR.
--.IP "\fBrelro\fR" 4
--.IX Item "relro"
--Create an \s-1ELF\s0 \f(CW\*(C`PT_GNU_RELRO\*(C'\fR segment header in the object.
--.IP "\fBmax\-page\-size=\fR\fIvalue\fR" 4
--.IX Item "max-page-size=value"
--Set the emulation maximum page size to \fIvalue\fR.
--.IP "\fBcommon\-page\-size=\fR\fIvalue\fR" 4
--.IX Item "common-page-size=value"
--Set the emulation common page size to \fIvalue\fR.
--.IP "\fBstack\-size=\fR\fIvalue\fR" 4
--.IX Item "stack-size=value"
--Specify a stack size for in an \s-1ELF\s0 \f(CW\*(C`PT_GNU_STACK\*(C'\fR segment.
--Specifying zero will override any default non-zero sized
--\&\f(CW\*(C`PT_GNU_STACK\*(C'\fR segment creation.
--.RE
--.RS 4
--.Sp
--Other keywords are ignored for Solaris compatibility.
--.RE
--.IP "\fB\-(\fR \fIarchives\fR \fB\-)\fR" 4
--.IX Item "-( archives -)"
--.PD 0
--.IP "\fB\-\-start\-group\fR \fIarchives\fR \fB\-\-end\-group\fR" 4
--.IX Item "--start-group archives --end-group"
--.PD
--The \fIarchives\fR should be a list of archive files. They may be
--either explicit file names, or \fB\-l\fR options.
--.Sp
--The specified archives are searched repeatedly until no new undefined
--references are created. Normally, an archive is searched only once in
--the order that it is specified on the command line. If a symbol in that
--archive is needed to resolve an undefined symbol referred to by an
--object in an archive that appears later on the command line, the linker
--would not be able to resolve that reference. By grouping the archives,
--they all be searched repeatedly until all possible references are
--resolved.
--.Sp
--Using this option has a significant performance cost. It is best to use
--it only when there are unavoidable circular references between two or
--more archives.
--.IP "\fB\-\-accept\-unknown\-input\-arch\fR" 4
--.IX Item "--accept-unknown-input-arch"
--.PD 0
--.IP "\fB\-\-no\-accept\-unknown\-input\-arch\fR" 4
--.IX Item "--no-accept-unknown-input-arch"
--.PD
--Tells the linker to accept input files whose architecture cannot be
--recognised. The assumption is that the user knows what they are doing
--and deliberately wants to link in these unknown input files. This was
--the default behaviour of the linker, before release 2.14. The default
--behaviour from release 2.14 onwards is to reject such input files, and
--so the \fB\-\-accept\-unknown\-input\-arch\fR option has been added to
--restore the old behaviour.
--.IP "\fB\-\-as\-needed\fR" 4
--.IX Item "--as-needed"
--.PD 0
--.IP "\fB\-\-no\-as\-needed\fR" 4
--.IX Item "--no-as-needed"
--.PD
--This option affects \s-1ELF\s0 \s-1DT_NEEDED\s0 tags for dynamic libraries mentioned
--on the command line after the \fB\-\-as\-needed\fR option. Normally
--the linker will add a \s-1DT_NEEDED\s0 tag for each dynamic library mentioned
--on the command line, regardless of whether the library is actually
--needed or not. \fB\-\-as\-needed\fR causes a \s-1DT_NEEDED\s0 tag to only be
--emitted for a library that \fIat that point in the link\fR satisfies a
--non-weak undefined symbol reference from a regular object file or, if
--the library is not found in the \s-1DT_NEEDED\s0 lists of other libraries, a
--non-weak undefined symbol reference from another dynamic library.
--Object files or libraries appearing on the command line \fIafter\fR
--the library in question do not affect whether the library is seen as
--needed. This is similar to the rules for extraction of object files
--from archives. \fB\-\-no\-as\-needed\fR restores the default behaviour.
--.IP "\fB\-\-add\-needed\fR" 4
--.IX Item "--add-needed"
--.PD 0
--.IP "\fB\-\-no\-add\-needed\fR" 4
--.IX Item "--no-add-needed"
--.PD
--These two options have been deprecated because of the similarity of
--their names to the \fB\-\-as\-needed\fR and \fB\-\-no\-as\-needed\fR
--options. They have been replaced by \fB\-\-copy\-dt\-needed\-entries\fR
--and \fB\-\-no\-copy\-dt\-needed\-entries\fR.
--.IP "\fB\-assert\fR \fIkeyword\fR" 4
--.IX Item "-assert keyword"
--This option is ignored for SunOS compatibility.
--.IP "\fB\-Bdynamic\fR" 4
--.IX Item "-Bdynamic"
--.PD 0
--.IP "\fB\-dy\fR" 4
--.IX Item "-dy"
--.IP "\fB\-call_shared\fR" 4
--.IX Item "-call_shared"
--.PD
--Link against dynamic libraries. This is only meaningful on platforms
--for which shared libraries are supported. This option is normally the
--default on such platforms. The different variants of this option are
--for compatibility with various systems. You may use this option
--multiple times on the command line: it affects library searching for
--\&\fB\-l\fR options which follow it.
--.IP "\fB\-Bgroup\fR" 4
--.IX Item "-Bgroup"
--Set the \f(CW\*(C`DF_1_GROUP\*(C'\fR flag in the \f(CW\*(C`DT_FLAGS_1\*(C'\fR entry in the dynamic
--section. This causes the runtime linker to handle lookups in this
--object and its dependencies to be performed only inside the group.
--\&\fB\-\-unresolved\-symbols=report\-all\fR is implied. This option is
--only meaningful on \s-1ELF\s0 platforms which support shared libraries.
--.IP "\fB\-Bstatic\fR" 4
--.IX Item "-Bstatic"
--.PD 0
--.IP "\fB\-dn\fR" 4
--.IX Item "-dn"
--.IP "\fB\-non_shared\fR" 4
--.IX Item "-non_shared"
--.IP "\fB\-static\fR" 4
--.IX Item "-static"
--.PD
--Do not link against shared libraries. This is only meaningful on
--platforms for which shared libraries are supported. The different
--variants of this option are for compatibility with various systems. You
--may use this option multiple times on the command line: it affects
--library searching for \fB\-l\fR options which follow it. This
--option also implies \fB\-\-unresolved\-symbols=report\-all\fR. This
--option can be used with \fB\-shared\fR. Doing so means that a
--shared library is being created but that all of the library's external
--references must be resolved by pulling in entries from static
--libraries.
--.IP "\fB\-Bsymbolic\fR" 4
--.IX Item "-Bsymbolic"
--When creating a shared library, bind references to global symbols to the
--definition within the shared library, if any. Normally, it is possible
--for a program linked against a shared library to override the definition
--within the shared library. This option is only meaningful on \s-1ELF\s0
--platforms which support shared libraries.
--.IP "\fB\-Bsymbolic\-functions\fR" 4
--.IX Item "-Bsymbolic-functions"
--When creating a shared library, bind references to global function
--symbols to the definition within the shared library, if any.
--This option is only meaningful on \s-1ELF\s0 platforms which support shared
--libraries.
--.IP "\fB\-\-dynamic\-list=\fR\fIdynamic-list-file\fR" 4
--.IX Item "--dynamic-list=dynamic-list-file"
--Specify the name of a dynamic list file to the linker. This is
--typically used when creating shared libraries to specify a list of
--global symbols whose references shouldn't be bound to the definition
--within the shared library, or creating dynamically linked executables
--to specify a list of symbols which should be added to the symbol table
--in the executable. This option is only meaningful on \s-1ELF\s0 platforms
--which support shared libraries.
--.Sp
--The format of the dynamic list is the same as the version node without
--scope and node name. See \fB\s-1VERSION\s0\fR for more information.
--.IP "\fB\-\-dynamic\-list\-data\fR" 4
--.IX Item "--dynamic-list-data"
--Include all global data symbols to the dynamic list.
--.IP "\fB\-\-dynamic\-list\-cpp\-new\fR" 4
--.IX Item "--dynamic-list-cpp-new"
--Provide the builtin dynamic list for \*(C+ operator new and delete. It
--is mainly useful for building shared libstdc++.
--.IP "\fB\-\-dynamic\-list\-cpp\-typeinfo\fR" 4
--.IX Item "--dynamic-list-cpp-typeinfo"
--Provide the builtin dynamic list for \*(C+ runtime type identification.
--.IP "\fB\-\-check\-sections\fR" 4
--.IX Item "--check-sections"
--.PD 0
--.IP "\fB\-\-no\-check\-sections\fR" 4
--.IX Item "--no-check-sections"
--.PD
--Asks the linker \fInot\fR to check section addresses after they have
--been assigned to see if there are any overlaps. Normally the linker will
--perform this check, and if it finds any overlaps it will produce
--suitable error messages. The linker does know about, and does make
--allowances for sections in overlays. The default behaviour can be
--restored by using the command line switch \fB\-\-check\-sections\fR.
--Section overlap is not usually checked for relocatable links. You can
--force checking in that case by using the \fB\-\-check\-sections\fR
--option.
--.IP "\fB\-\-copy\-dt\-needed\-entries\fR" 4
--.IX Item "--copy-dt-needed-entries"
--.PD 0
--.IP "\fB\-\-no\-copy\-dt\-needed\-entries\fR" 4
--.IX Item "--no-copy-dt-needed-entries"
--.PD
--This option affects the treatment of dynamic libraries referred to
--by \s-1DT_NEEDED\s0 tags \fIinside\fR \s-1ELF\s0 dynamic libraries mentioned on the
--command line. Normally the linker won't add a \s-1DT_NEEDED\s0 tag to the
--output binary for each library mentioned in a \s-1DT_NEEDED\s0 tag in an
--input dynamic library. With \fB\-\-copy\-dt\-needed\-entries\fR
--specified on the command line however any dynamic libraries that
--follow it will have their \s-1DT_NEEDED\s0 entries added. The default
--behaviour can be restored with \fB\-\-no\-copy\-dt\-needed\-entries\fR.
--.Sp
--This option also has an effect on the resolution of symbols in dynamic
--libraries. With \fB\-\-copy\-dt\-needed\-entries\fR dynamic libraries
--mentioned on the command line will be recursively searched, following
--their \s-1DT_NEEDED\s0 tags to other libraries, in order to resolve symbols
--required by the output binary. With the default setting however
--the searching of dynamic libraries that follow it will stop with the
--dynamic library itself. No \s-1DT_NEEDED\s0 links will be traversed to resolve
--symbols.
--.IP "\fB\-\-cref\fR" 4
--.IX Item "--cref"
--Output a cross reference table. If a linker map file is being
--generated, the cross reference table is printed to the map file.
--Otherwise, it is printed on the standard output.
--.Sp
--The format of the table is intentionally simple, so that it may be
--easily processed by a script if necessary. The symbols are printed out,
--sorted by name. For each symbol, a list of file names is given. If the
--symbol is defined, the first file listed is the location of the
--definition. If the symbol is defined as a common value then any files
--where this happens appear next. Finally any files that reference the
--symbol are listed.
--.IP "\fB\-\-no\-define\-common\fR" 4
--.IX Item "--no-define-common"
--This option inhibits the assignment of addresses to common symbols.
--The script command \f(CW\*(C`INHIBIT_COMMON_ALLOCATION\*(C'\fR has the same effect.
--.Sp
--The \fB\-\-no\-define\-common\fR option allows decoupling
--the decision to assign addresses to Common symbols from the choice
--of the output file type; otherwise a non-Relocatable output type
--forces assigning addresses to Common symbols.
--Using \fB\-\-no\-define\-common\fR allows Common symbols that are referenced
--from a shared library to be assigned addresses only in the main program.
--This eliminates the unused duplicate space in the shared library,
--and also prevents any possible confusion over resolving to the wrong
--duplicate when there are many dynamic modules with specialized search
--paths for runtime symbol resolution.
--.IP "\fB\-\-defsym=\fR\fIsymbol\fR\fB=\fR\fIexpression\fR" 4
--.IX Item "--defsym=symbol=expression"
--Create a global symbol in the output file, containing the absolute
--address given by \fIexpression\fR. You may use this option as many
--times as necessary to define multiple symbols in the command line. A
--limited form of arithmetic is supported for the \fIexpression\fR in this
--context: you may give a hexadecimal constant or the name of an existing
--symbol, or use \f(CW\*(C`+\*(C'\fR and \f(CW\*(C`\-\*(C'\fR to add or subtract hexadecimal
--constants or symbols. If you need more elaborate expressions, consider
--using the linker command language from a script. \fINote:\fR there should be no white
--space between \fIsymbol\fR, the equals sign ("\fB=\fR"), and
--\&\fIexpression\fR.
--.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4
--.IX Item "--demangle[=style]"
--.PD 0
--.IP "\fB\-\-no\-demangle\fR" 4
--.IX Item "--no-demangle"
--.PD
--These options control whether to demangle symbol names in error messages
--and other output. When the linker is told to demangle, it tries to
--present symbol names in a readable fashion: it strips leading
--underscores if they are used by the object file format, and converts \*(C+
--mangled symbol names into user readable names. Different compilers have
--different mangling styles. The optional demangling style argument can be used
--to choose an appropriate demangling style for your compiler. The linker will
--demangle by default unless the environment variable \fB\s-1COLLECT_NO_DEMANGLE\s0\fR
--is set. These options may be used to override the default.
--.IP "\fB\-I\fR\fIfile\fR" 4
--.IX Item "-Ifile"
--.PD 0
--.IP "\fB\-\-dynamic\-linker=\fR\fIfile\fR" 4
--.IX Item "--dynamic-linker=file"
--.PD
--Set the name of the dynamic linker. This is only meaningful when
--generating dynamically linked \s-1ELF\s0 executables. The default dynamic
--linker is normally correct; don't use this unless you know what you are
--doing.
--.IP "\fB\-\-fatal\-warnings\fR" 4
--.IX Item "--fatal-warnings"
--.PD 0
--.IP "\fB\-\-no\-fatal\-warnings\fR" 4
--.IX Item "--no-fatal-warnings"
--.PD
--Treat all warnings as errors. The default behaviour can be restored
--with the option \fB\-\-no\-fatal\-warnings\fR.
--.IP "\fB\-\-force\-exe\-suffix\fR" 4
--.IX Item "--force-exe-suffix"
--Make sure that an output file has a .exe suffix.
--.Sp
--If a successfully built fully linked output file does not have a
--\&\f(CW\*(C`.exe\*(C'\fR or \f(CW\*(C`.dll\*(C'\fR suffix, this option forces the linker to copy
--the output file to one of the same name with a \f(CW\*(C`.exe\*(C'\fR suffix. This
--option is useful when using unmodified Unix makefiles on a Microsoft
--Windows host, since some versions of Windows won't run an image unless
--it ends in a \f(CW\*(C`.exe\*(C'\fR suffix.
--.IP "\fB\-\-gc\-sections\fR" 4
--.IX Item "--gc-sections"
--.PD 0
--.IP "\fB\-\-no\-gc\-sections\fR" 4
--.IX Item "--no-gc-sections"
--.PD
--Enable garbage collection of unused input sections. It is ignored on
--targets that do not support this option. The default behaviour (of not
--performing this garbage collection) can be restored by specifying
--\&\fB\-\-no\-gc\-sections\fR on the command line.
--.Sp
--\&\fB\-\-gc\-sections\fR decides which input sections are used by
--examining symbols and relocations. The section containing the entry
--symbol and all sections containing symbols undefined on the
--command-line will be kept, as will sections containing symbols
--referenced by dynamic objects. Note that when building shared
--libraries, the linker must assume that any visible symbol is
--referenced. Once this initial set of sections has been determined,
--the linker recursively marks as used any section referenced by their
--relocations. See \fB\-\-entry\fR and \fB\-\-undefined\fR.
--.Sp
--This option can be set when doing a partial link (enabled with option
--\&\fB\-r\fR). In this case the root of symbols kept must be explicitly
--specified either by an \fB\-\-entry\fR or \fB\-\-undefined\fR option or by
--a \f(CW\*(C`ENTRY\*(C'\fR command in the linker script.
--.IP "\fB\-\-print\-gc\-sections\fR" 4
--.IX Item "--print-gc-sections"
--.PD 0
--.IP "\fB\-\-no\-print\-gc\-sections\fR" 4
--.IX Item "--no-print-gc-sections"
--.PD
--List all sections removed by garbage collection. The listing is
--printed on stderr. This option is only effective if garbage
--collection has been enabled via the \fB\-\-gc\-sections\fR) option. The
--default behaviour (of not listing the sections that are removed) can
--be restored by specifying \fB\-\-no\-print\-gc\-sections\fR on the command
--line.
--.IP "\fB\-\-print\-output\-format\fR" 4
--.IX Item "--print-output-format"
--Print the name of the default output format (perhaps influenced by
--other command-line options). This is the string that would appear
--in an \f(CW\*(C`OUTPUT_FORMAT\*(C'\fR linker script command.
--.IP "\fB\-\-help\fR" 4
--.IX Item "--help"
--Print a summary of the command-line options on the standard output and exit.
--.IP "\fB\-\-target\-help\fR" 4
--.IX Item "--target-help"
--Print a summary of all target specific options on the standard output and exit.
--.IP "\fB\-Map=\fR\fImapfile\fR" 4
--.IX Item "-Map=mapfile"
--Print a link map to the file \fImapfile\fR. See the description of the
--\&\fB\-M\fR option, above.
--.IP "\fB\-\-no\-keep\-memory\fR" 4
--.IX Item "--no-keep-memory"
--\&\fBld\fR normally optimizes for speed over memory usage by caching the
--symbol tables of input files in memory. This option tells \fBld\fR to
--instead optimize for memory usage, by rereading the symbol tables as
--necessary. This may be required if \fBld\fR runs out of memory space
--while linking a large executable.
--.IP "\fB\-\-no\-undefined\fR" 4
--.IX Item "--no-undefined"
--.PD 0
--.IP "\fB\-z defs\fR" 4
--.IX Item "-z defs"
--.PD
--Report unresolved symbol references from regular object files. This
--is done even if the linker is creating a non-symbolic shared library.
--The switch \fB\-\-[no\-]allow\-shlib\-undefined\fR controls the
--behaviour for reporting unresolved references found in shared
--libraries being linked in.
--.IP "\fB\-\-allow\-multiple\-definition\fR" 4
--.IX Item "--allow-multiple-definition"
--.PD 0
--.IP "\fB\-z muldefs\fR" 4
--.IX Item "-z muldefs"
--.PD
--Normally when a symbol is defined multiple times, the linker will
--report a fatal error. These options allow multiple definitions and the
--first definition will be used.
--.IP "\fB\-\-allow\-shlib\-undefined\fR" 4
--.IX Item "--allow-shlib-undefined"
--.PD 0
--.IP "\fB\-\-no\-allow\-shlib\-undefined\fR" 4
--.IX Item "--no-allow-shlib-undefined"
--.PD
--Allows or disallows undefined symbols in shared libraries.
--This switch is similar to \fB\-\-no\-undefined\fR except that it
--determines the behaviour when the undefined symbols are in a
--shared library rather than a regular object file. It does not affect
--how undefined symbols in regular object files are handled.
--.Sp
--The default behaviour is to report errors for any undefined symbols
--referenced in shared libraries if the linker is being used to create
--an executable, but to allow them if the linker is being used to create
--a shared library.
--.Sp
--The reasons for allowing undefined symbol references in shared
--libraries specified at link time are that:
--.RS 4
--.IP "\(bu" 4
--A shared library specified at link time may not be the same as the one
--that is available at load time, so the symbol might actually be
--resolvable at load time.
--.IP "\(bu" 4
--There are some operating systems, eg BeOS and \s-1HPPA\s0, where undefined
--symbols in shared libraries are normal.
--.Sp
--The BeOS kernel for example patches shared libraries at load time to
--select whichever function is most appropriate for the current
--architecture. This is used, for example, to dynamically select an
--appropriate memset function.
--.RE
--.RS 4
--.RE
--.IP "\fB\-\-no\-undefined\-version\fR" 4
--.IX Item "--no-undefined-version"
--Normally when a symbol has an undefined version, the linker will ignore
--it. This option disallows symbols with undefined version and a fatal error
--will be issued instead.
--.IP "\fB\-\-default\-symver\fR" 4
--.IX Item "--default-symver"
--Create and use a default symbol version (the soname) for unversioned
--exported symbols.
--.IP "\fB\-\-default\-imported\-symver\fR" 4
--.IX Item "--default-imported-symver"
--Create and use a default symbol version (the soname) for unversioned
--imported symbols.
--.IP "\fB\-\-no\-warn\-mismatch\fR" 4
--.IX Item "--no-warn-mismatch"
--Normally \fBld\fR will give an error if you try to link together input
--files that are mismatched for some reason, perhaps because they have
--been compiled for different processors or for different endiannesses.
--This option tells \fBld\fR that it should silently permit such possible
--errors. This option should only be used with care, in cases when you
--have taken some special action that ensures that the linker errors are
--inappropriate.
--.IP "\fB\-\-no\-warn\-search\-mismatch\fR" 4
--.IX Item "--no-warn-search-mismatch"
--Normally \fBld\fR will give a warning if it finds an incompatible
--library during a library search. This option silences the warning.
--.IP "\fB\-\-no\-whole\-archive\fR" 4
--.IX Item "--no-whole-archive"
--Turn off the effect of the \fB\-\-whole\-archive\fR option for subsequent
--archive files.
--.IP "\fB\-\-noinhibit\-exec\fR" 4
--.IX Item "--noinhibit-exec"
--Retain the executable output file whenever it is still usable.
--Normally, the linker will not produce an output file if it encounters
--errors during the link process; it exits without writing an output file
--when it issues any error whatsoever.
--.IP "\fB\-nostdlib\fR" 4
--.IX Item "-nostdlib"
--Only search library directories explicitly specified on the
--command line. Library directories specified in linker scripts
--(including linker scripts specified on the command line) are ignored.
--.IP "\fB\-\-oformat=\fR\fIoutput-format\fR" 4
--.IX Item "--oformat=output-format"
--\&\fBld\fR may be configured to support more than one kind of object
--file. If your \fBld\fR is configured this way, you can use the
--\&\fB\-\-oformat\fR option to specify the binary format for the output
--object file. Even when \fBld\fR is configured to support alternative
--object formats, you don't usually need to specify this, as \fBld\fR
--should be configured to produce as a default output format the most
--usual format on each machine. \fIoutput-format\fR is a text string, the
--name of a particular format supported by the \s-1BFD\s0 libraries. (You can
--list the available binary formats with \fBobjdump \-i\fR.) The script
--command \f(CW\*(C`OUTPUT_FORMAT\*(C'\fR can also specify the output format, but
--this option overrides it.
--.IP "\fB\-pie\fR" 4
--.IX Item "-pie"
--.PD 0
--.IP "\fB\-\-pic\-executable\fR" 4
--.IX Item "--pic-executable"
--.PD
--Create a position independent executable. This is currently only supported on
--\&\s-1ELF\s0 platforms. Position independent executables are similar to shared
--libraries in that they are relocated by the dynamic linker to the virtual
--address the \s-1OS\s0 chooses for them (which can vary between invocations). Like
--normal dynamically linked executables they can be executed and symbols
--defined in the executable cannot be overridden by shared libraries.
--.IP "\fB\-qmagic\fR" 4
--.IX Item "-qmagic"
--This option is ignored for Linux compatibility.
--.IP "\fB\-Qy\fR" 4
--.IX Item "-Qy"
--This option is ignored for \s-1SVR4\s0 compatibility.
--.IP "\fB\-\-relax\fR" 4
--.IX Item "--relax"
--.PD 0
--.IP "\fB\-\-no\-relax\fR" 4
--.IX Item "--no-relax"
--.PD
--An option with machine dependent effects.
--This option is only supported on a few targets.
--.Sp
--On some platforms the \fB\-\-relax\fR option performs target specific,
--global optimizations that become possible when the linker resolves
--addressing in the program, such as relaxing address modes,
--synthesizing new instructions, selecting shorter version of current
--instructions, and combining constant values.
--.Sp
--On some platforms these link time global optimizations may make symbolic
--debugging of the resulting executable impossible.
--This is known to be the case for the Matsushita \s-1MN10200\s0 and \s-1MN10300\s0
--family of processors.
--.Sp
--On platforms where this is not supported, \fB\-\-relax\fR is accepted,
--but ignored.
--.Sp
--On platforms where \fB\-\-relax\fR is accepted the option
--\&\fB\-\-no\-relax\fR can be used to disable the feature.
--.IP "\fB\-\-retain\-symbols\-file=\fR\fIfilename\fR" 4
--.IX Item "--retain-symbols-file=filename"
--Retain \fIonly\fR the symbols listed in the file \fIfilename\fR,
--discarding all others. \fIfilename\fR is simply a flat file, with one
--symbol name per line. This option is especially useful in environments
--(such as VxWorks)
--where a large global symbol table is accumulated gradually, to conserve
--run-time memory.
--.Sp
--\&\fB\-\-retain\-symbols\-file\fR does \fInot\fR discard undefined symbols,
--or symbols needed for relocations.
--.Sp
--You may only specify \fB\-\-retain\-symbols\-file\fR once in the command
--line. It overrides \fB\-s\fR and \fB\-S\fR.
--.IP "\fB\-rpath=\fR\fIdir\fR" 4
--.IX Item "-rpath=dir"
--Add a directory to the runtime library search path. This is used when
--linking an \s-1ELF\s0 executable with shared objects. All \fB\-rpath\fR
--arguments are concatenated and passed to the runtime linker, which uses
--them to locate shared objects at runtime. The \fB\-rpath\fR option is
--also used when locating shared objects which are needed by shared
--objects explicitly included in the link; see the description of the
--\&\fB\-rpath\-link\fR option. If \fB\-rpath\fR is not used when linking an
--\&\s-1ELF\s0 executable, the contents of the environment variable
--\&\f(CW\*(C`LD_RUN_PATH\*(C'\fR will be used if it is defined.
--.Sp
--The \fB\-rpath\fR option may also be used on SunOS. By default, on
--SunOS, the linker will form a runtime search patch out of all the
--\&\fB\-L\fR options it is given. If a \fB\-rpath\fR option is used, the
--runtime search path will be formed exclusively using the \fB\-rpath\fR
--options, ignoring the \fB\-L\fR options. This can be useful when using
--gcc, which adds many \fB\-L\fR options which may be on \s-1NFS\s0 mounted
--file systems.
--.Sp
--For compatibility with other \s-1ELF\s0 linkers, if the \fB\-R\fR option is
--followed by a directory name, rather than a file name, it is treated as
--the \fB\-rpath\fR option.
--.IP "\fB\-rpath\-link=\fR\fIdir\fR" 4
--.IX Item "-rpath-link=dir"
--When using \s-1ELF\s0 or SunOS, one shared library may require another. This
--happens when an \f(CW\*(C`ld \-shared\*(C'\fR link includes a shared library as one
--of the input files.
--.Sp
--When the linker encounters such a dependency when doing a non-shared,
--non-relocatable link, it will automatically try to locate the required
--shared library and include it in the link, if it is not included
--explicitly. In such a case, the \fB\-rpath\-link\fR option
--specifies the first set of directories to search. The
--\&\fB\-rpath\-link\fR option may specify a sequence of directory names
--either by specifying a list of names separated by colons, or by
--appearing multiple times.
--.Sp
--This option should be used with caution as it overrides the search path
--that may have been hard compiled into a shared library. In such a case it
--is possible to use unintentionally a different search path than the
--runtime linker would do.
--.Sp
--The linker uses the following search paths to locate required shared
--libraries:
--.RS 4
--.IP "1." 4
--Any directories specified by \fB\-rpath\-link\fR options.
--.IP "2." 4
--Any directories specified by \fB\-rpath\fR options. The difference
--between \fB\-rpath\fR and \fB\-rpath\-link\fR is that directories
--specified by \fB\-rpath\fR options are included in the executable and
--used at runtime, whereas the \fB\-rpath\-link\fR option is only effective
--at link time. Searching \fB\-rpath\fR in this way is only supported
--by native linkers and cross linkers which have been configured with
--the \fB\-\-with\-sysroot\fR option.
--.IP "3." 4
--On an \s-1ELF\s0 system, for native linkers, if the \fB\-rpath\fR and
--\&\fB\-rpath\-link\fR options were not used, search the contents of the
--environment variable \f(CW\*(C`LD_RUN_PATH\*(C'\fR.
--.IP "4." 4
--On SunOS, if the \fB\-rpath\fR option was not used, search any
--directories specified using \fB\-L\fR options.
--.IP "5." 4
--For a native linker, search the contents of the environment
--variable \f(CW\*(C`LD_LIBRARY_PATH\*(C'\fR.
--.IP "6." 4
--For a native \s-1ELF\s0 linker, the directories in \f(CW\*(C`DT_RUNPATH\*(C'\fR or
--\&\f(CW\*(C`DT_RPATH\*(C'\fR of a shared library are searched for shared
--libraries needed by it. The \f(CW\*(C`DT_RPATH\*(C'\fR entries are ignored if
--\&\f(CW\*(C`DT_RUNPATH\*(C'\fR entries exist.
--.IP "7." 4
--The default directories, normally \fI/lib\fR and \fI/usr/lib\fR.
--.IP "8." 4
--For a native linker on an \s-1ELF\s0 system, if the file \fI/etc/ld.so.conf\fR
--exists, the list of directories found in that file.
--.RE
--.RS 4
--.Sp
--If the required shared library is not found, the linker will issue a
--warning and continue with the link.
--.RE
--.IP "\fB\-shared\fR" 4
--.IX Item "-shared"
--.PD 0
--.IP "\fB\-Bshareable\fR" 4
--.IX Item "-Bshareable"
--.PD
--Create a shared library. This is currently only supported on \s-1ELF\s0, \s-1XCOFF\s0
--and SunOS platforms. On SunOS, the linker will automatically create a
--shared library if the \fB\-e\fR option is not used and there are
--undefined symbols in the link.
--.IP "\fB\-\-sort\-common\fR" 4
--.IX Item "--sort-common"
--.PD 0
--.IP "\fB\-\-sort\-common=ascending\fR" 4
--.IX Item "--sort-common=ascending"
--.IP "\fB\-\-sort\-common=descending\fR" 4
--.IX Item "--sort-common=descending"
--.PD
--This option tells \fBld\fR to sort the common symbols by alignment in
--ascending or descending order when it places them in the appropriate output
--sections. The symbol alignments considered are sixteen-byte or larger,
--eight-byte, four-byte, two-byte, and one-byte. This is to prevent gaps
--between symbols due to alignment constraints. If no sorting order is
--specified, then descending order is assumed.
--.IP "\fB\-\-sort\-section=name\fR" 4
--.IX Item "--sort-section=name"
--This option will apply \f(CW\*(C`SORT_BY_NAME\*(C'\fR to all wildcard section
--patterns in the linker script.
--.IP "\fB\-\-sort\-section=alignment\fR" 4
--.IX Item "--sort-section=alignment"
--This option will apply \f(CW\*(C`SORT_BY_ALIGNMENT\*(C'\fR to all wildcard section
--patterns in the linker script.
--.IP "\fB\-\-split\-by\-file[=\fR\fIsize\fR\fB]\fR" 4
--.IX Item "--split-by-file[=size]"
--Similar to \fB\-\-split\-by\-reloc\fR but creates a new output section for
--each input file when \fIsize\fR is reached. \fIsize\fR defaults to a
--size of 1 if not given.
--.IP "\fB\-\-split\-by\-reloc[=\fR\fIcount\fR\fB]\fR" 4
--.IX Item "--split-by-reloc[=count]"
--Tries to creates extra sections in the output file so that no single
--output section in the file contains more than \fIcount\fR relocations.
--This is useful when generating huge relocatable files for downloading into
--certain real time kernels with the \s-1COFF\s0 object file format; since \s-1COFF\s0
--cannot represent more than 65535 relocations in a single section. Note
--that this will fail to work with object file formats which do not
--support arbitrary sections. The linker will not split up individual
--input sections for redistribution, so if a single input section contains
--more than \fIcount\fR relocations one output section will contain that
--many relocations. \fIcount\fR defaults to a value of 32768.
--.IP "\fB\-\-stats\fR" 4
--.IX Item "--stats"
--Compute and display statistics about the operation of the linker, such
--as execution time and memory usage.
--.IP "\fB\-\-sysroot=\fR\fIdirectory\fR" 4
--.IX Item "--sysroot=directory"
--Use \fIdirectory\fR as the location of the sysroot, overriding the
--configure-time default. This option is only supported by linkers
--that were configured using \fB\-\-with\-sysroot\fR.
--.IP "\fB\-\-traditional\-format\fR" 4
--.IX Item "--traditional-format"
--For some targets, the output of \fBld\fR is different in some ways from
--the output of some existing linker. This switch requests \fBld\fR to
--use the traditional format instead.
--.Sp
--For example, on SunOS, \fBld\fR combines duplicate entries in the
--symbol string table. This can reduce the size of an output file with
--full debugging information by over 30 percent. Unfortunately, the SunOS
--\&\f(CW\*(C`dbx\*(C'\fR program can not read the resulting program (\f(CW\*(C`gdb\*(C'\fR has no
--trouble). The \fB\-\-traditional\-format\fR switch tells \fBld\fR to not
--combine duplicate entries.
--.IP "\fB\-\-section\-start=\fR\fIsectionname\fR\fB=\fR\fIorg\fR" 4
--.IX Item "--section-start=sectionname=org"
--Locate a section in the output file at the absolute
--address given by \fIorg\fR. You may use this option as many
--times as necessary to locate multiple sections in the command
--line.
--\&\fIorg\fR must be a single hexadecimal integer;
--for compatibility with other linkers, you may omit the leading
--\&\fB0x\fR usually associated with hexadecimal values. \fINote:\fR there
--should be no white space between \fIsectionname\fR, the equals
--sign ("\fB=\fR"), and \fIorg\fR.
--.IP "\fB\-Tbss=\fR\fIorg\fR" 4
--.IX Item "-Tbss=org"
--.PD 0
--.IP "\fB\-Tdata=\fR\fIorg\fR" 4
--.IX Item "-Tdata=org"
--.IP "\fB\-Ttext=\fR\fIorg\fR" 4
--.IX Item "-Ttext=org"
--.PD
--Same as \fB\-\-section\-start\fR, with \f(CW\*(C`.bss\*(C'\fR, \f(CW\*(C`.data\*(C'\fR or
--\&\f(CW\*(C`.text\*(C'\fR as the \fIsectionname\fR.
--.IP "\fB\-Ttext\-segment=\fR\fIorg\fR" 4
--.IX Item "-Ttext-segment=org"
--When creating an \s-1ELF\s0 executable or shared object, it will set the address
--of the first byte of the text segment.
--.IP "\fB\-Trodata\-segment=\fR\fIorg\fR" 4
--.IX Item "-Trodata-segment=org"
--When creating an \s-1ELF\s0 executable or shared object for a target where
--the read-only data is in its own segment separate from the executable
--text, it will set the address of the first byte of the read-only data segment.
--.IP "\fB\-Tldata\-segment=\fR\fIorg\fR" 4
--.IX Item "-Tldata-segment=org"
--When creating an \s-1ELF\s0 executable or shared object for x86\-64 medium memory
--model, it will set the address of the first byte of the ldata segment.
--.IP "\fB\-\-unresolved\-symbols=\fR\fImethod\fR" 4
--.IX Item "--unresolved-symbols=method"
--Determine how to handle unresolved symbols. There are four possible
--values for \fBmethod\fR:
--.RS 4
--.IP "\fBignore-all\fR" 4
--.IX Item "ignore-all"
--Do not report any unresolved symbols.
--.IP "\fBreport-all\fR" 4
--.IX Item "report-all"
--Report all unresolved symbols. This is the default.
--.IP "\fBignore-in-object-files\fR" 4
--.IX Item "ignore-in-object-files"
--Report unresolved symbols that are contained in shared libraries, but
--ignore them if they come from regular object files.
--.IP "\fBignore-in-shared-libs\fR" 4
--.IX Item "ignore-in-shared-libs"
--Report unresolved symbols that come from regular object files, but
--ignore them if they come from shared libraries. This can be useful
--when creating a dynamic binary and it is known that all the shared
--libraries that it should be referencing are included on the linker's
--command line.
--.RE
--.RS 4
--.Sp
--The behaviour for shared libraries on their own can also be controlled
--by the \fB\-\-[no\-]allow\-shlib\-undefined\fR option.
--.Sp
--Normally the linker will generate an error message for each reported
--unresolved symbol but the option \fB\-\-warn\-unresolved\-symbols\fR
--can change this to a warning.
--.RE
--.IP "\fB\-\-dll\-verbose\fR" 4
--.IX Item "--dll-verbose"
--.PD 0
--.IP "\fB\-\-verbose[=\fR\fI\s-1NUMBER\s0\fR\fB]\fR" 4
--.IX Item "--verbose[=NUMBER]"
--.PD
--Display the version number for \fBld\fR and list the linker emulations
--supported. Display which input files can and cannot be opened. Display
--the linker script being used by the linker. If the optional \fI\s-1NUMBER\s0\fR
--argument > 1, plugin symbol status will also be displayed.
--.IP "\fB\-\-version\-script=\fR\fIversion-scriptfile\fR" 4
--.IX Item "--version-script=version-scriptfile"
--Specify the name of a version script to the linker. This is typically
--used when creating shared libraries to specify additional information
--about the version hierarchy for the library being created. This option
--is only fully supported on \s-1ELF\s0 platforms which support shared libraries;
--see \fB\s-1VERSION\s0\fR. It is partially supported on \s-1PE\s0 platforms, which can
--use version scripts to filter symbol visibility in auto-export mode: any
--symbols marked \fBlocal\fR in the version script will not be exported.
--.IP "\fB\-\-warn\-common\fR" 4
--.IX Item "--warn-common"
--Warn when a common symbol is combined with another common symbol or with
--a symbol definition. Unix linkers allow this somewhat sloppy practice,
--but linkers on some other operating systems do not. This option allows
--you to find potential problems from combining global symbols.
--Unfortunately, some C libraries use this practice, so you may get some
--warnings about symbols in the libraries as well as in your programs.
--.Sp
--There are three kinds of global symbols, illustrated here by C examples:
--.RS 4
--.IP "\fBint i = 1;\fR" 4
--.IX Item "int i = 1;"
--A definition, which goes in the initialized data section of the output
--file.
--.IP "\fBextern int i;\fR" 4
--.IX Item "extern int i;"
--An undefined reference, which does not allocate space.
--There must be either a definition or a common symbol for the
--variable somewhere.
--.IP "\fBint i;\fR" 4
--.IX Item "int i;"
--A common symbol. If there are only (one or more) common symbols for a
--variable, it goes in the uninitialized data area of the output file.
--The linker merges multiple common symbols for the same variable into a
--single symbol. If they are of different sizes, it picks the largest
--size. The linker turns a common symbol into a declaration, if there is
--a definition of the same variable.
--.RE
--.RS 4
--.Sp
--The \fB\-\-warn\-common\fR option can produce five kinds of warnings.
--Each warning consists of a pair of lines: the first describes the symbol
--just encountered, and the second describes the previous symbol
--encountered with the same name. One or both of the two symbols will be
--a common symbol.
--.IP "1." 4
--Turning a common symbol into a reference, because there is already a
--definition for the symbol.
--.Sp
--.Vb 3
--\& <file>(<section>): warning: common of \`<symbol>\*(Aq
--\& overridden by definition
--\& <file>(<section>): warning: defined here
--.Ve
--.IP "2." 4
--Turning a common symbol into a reference, because a later definition for
--the symbol is encountered. This is the same as the previous case,
--except that the symbols are encountered in a different order.
--.Sp
--.Vb 3
--\& <file>(<section>): warning: definition of \`<symbol>\*(Aq
--\& overriding common
--\& <file>(<section>): warning: common is here
--.Ve
--.IP "3." 4
--Merging a common symbol with a previous same-sized common symbol.
--.Sp
--.Vb 3
--\& <file>(<section>): warning: multiple common
--\& of \`<symbol>\*(Aq
--\& <file>(<section>): warning: previous common is here
--.Ve
--.IP "4." 4
--Merging a common symbol with a previous larger common symbol.
--.Sp
--.Vb 3
--\& <file>(<section>): warning: common of \`<symbol>\*(Aq
--\& overridden by larger common
--\& <file>(<section>): warning: larger common is here
--.Ve
--.IP "5." 4
--Merging a common symbol with a previous smaller common symbol. This is
--the same as the previous case, except that the symbols are
--encountered in a different order.
--.Sp
--.Vb 3
--\& <file>(<section>): warning: common of \`<symbol>\*(Aq
--\& overriding smaller common
--\& <file>(<section>): warning: smaller common is here
--.Ve
--.RE
--.RS 4
--.RE
--.IP "\fB\-\-warn\-constructors\fR" 4
--.IX Item "--warn-constructors"
--Warn if any global constructors are used. This is only useful for a few
--object file formats. For formats like \s-1COFF\s0 or \s-1ELF\s0, the linker can not
--detect the use of global constructors.
--.IP "\fB\-\-warn\-multiple\-gp\fR" 4
--.IX Item "--warn-multiple-gp"
--Warn if multiple global pointer values are required in the output file.
--This is only meaningful for certain processors, such as the Alpha.
--Specifically, some processors put large-valued constants in a special
--section. A special register (the global pointer) points into the middle
--of this section, so that constants can be loaded efficiently via a
--base-register relative addressing mode. Since the offset in
--base-register relative mode is fixed and relatively small (e.g., 16
--bits), this limits the maximum size of the constant pool. Thus, in
--large programs, it is often necessary to use multiple global pointer
--values in order to be able to address all possible constants. This
--option causes a warning to be issued whenever this case occurs.
--.IP "\fB\-\-warn\-once\fR" 4
--.IX Item "--warn-once"
--Only warn once for each undefined symbol, rather than once per module
--which refers to it.
--.IP "\fB\-\-warn\-section\-align\fR" 4
--.IX Item "--warn-section-align"
--Warn if the address of an output section is changed because of
--alignment. Typically, the alignment will be set by an input section.
--The address will only be changed if it not explicitly specified; that
--is, if the \f(CW\*(C`SECTIONS\*(C'\fR command does not specify a start address for
--the section.
--.IP "\fB\-\-warn\-shared\-textrel\fR" 4
--.IX Item "--warn-shared-textrel"
--Warn if the linker adds a \s-1DT_TEXTREL\s0 to a shared object.
--.IP "\fB\-\-warn\-alternate\-em\fR" 4
--.IX Item "--warn-alternate-em"
--Warn if an object has alternate \s-1ELF\s0 machine code.
--.IP "\fB\-\-warn\-unresolved\-symbols\fR" 4
--.IX Item "--warn-unresolved-symbols"
--If the linker is going to report an unresolved symbol (see the option
--\&\fB\-\-unresolved\-symbols\fR) it will normally generate an error.
--This option makes it generate a warning instead.
--.IP "\fB\-\-error\-unresolved\-symbols\fR" 4
--.IX Item "--error-unresolved-symbols"
--This restores the linker's default behaviour of generating errors when
--it is reporting unresolved symbols.
--.IP "\fB\-\-whole\-archive\fR" 4
--.IX Item "--whole-archive"
--For each archive mentioned on the command line after the
--\&\fB\-\-whole\-archive\fR option, include every object file in the archive
--in the link, rather than searching the archive for the required object
--files. This is normally used to turn an archive file into a shared
--library, forcing every object to be included in the resulting shared
--library. This option may be used more than once.
--.Sp
--Two notes when using this option from gcc: First, gcc doesn't know
--about this option, so you have to use \fB\-Wl,\-whole\-archive\fR.
--Second, don't forget to use \fB\-Wl,\-no\-whole\-archive\fR after your
--list of archives, because gcc will add its own list of archives to
--your link and you may not want this flag to affect those as well.
--.IP "\fB\-\-wrap=\fR\fIsymbol\fR" 4
--.IX Item "--wrap=symbol"
--Use a wrapper function for \fIsymbol\fR. Any undefined reference to
--\&\fIsymbol\fR will be resolved to \f(CW\*(C`_\|_wrap_\f(CIsymbol\f(CW\*(C'\fR. Any
--undefined reference to \f(CW\*(C`_\|_real_\f(CIsymbol\f(CW\*(C'\fR will be resolved to
--\&\fIsymbol\fR.
--.Sp
--This can be used to provide a wrapper for a system function. The
--wrapper function should be called \f(CW\*(C`_\|_wrap_\f(CIsymbol\f(CW\*(C'\fR. If it
--wishes to call the system function, it should call
--\&\f(CW\*(C`_\|_real_\f(CIsymbol\f(CW\*(C'\fR.
--.Sp
--Here is a trivial example:
--.Sp
--.Vb 6
--\& void *
--\& _\|_wrap_malloc (size_t c)
--\& {
--\& printf ("malloc called with %zu\en", c);
--\& return _\|_real_malloc (c);
--\& }
--.Ve
--.Sp
--If you link other code with this file using \fB\-\-wrap malloc\fR, then
--all calls to \f(CW\*(C`malloc\*(C'\fR will call the function \f(CW\*(C`_\|_wrap_malloc\*(C'\fR
--instead. The call to \f(CW\*(C`_\|_real_malloc\*(C'\fR in \f(CW\*(C`_\|_wrap_malloc\*(C'\fR will
--call the real \f(CW\*(C`malloc\*(C'\fR function.
--.Sp
--You may wish to provide a \f(CW\*(C`_\|_real_malloc\*(C'\fR function as well, so that
--links without the \fB\-\-wrap\fR option will succeed. If you do this,
--you should not put the definition of \f(CW\*(C`_\|_real_malloc\*(C'\fR in the same
--file as \f(CW\*(C`_\|_wrap_malloc\*(C'\fR; if you do, the assembler may resolve the
--call before the linker has a chance to wrap it to \f(CW\*(C`malloc\*(C'\fR.
--.IP "\fB\-\-eh\-frame\-hdr\fR" 4
--.IX Item "--eh-frame-hdr"
--Request creation of \f(CW\*(C`.eh_frame_hdr\*(C'\fR section and \s-1ELF\s0
--\&\f(CW\*(C`PT_GNU_EH_FRAME\*(C'\fR segment header.
--.IP "\fB\-\-no\-ld\-generated\-unwind\-info\fR" 4
--.IX Item "--no-ld-generated-unwind-info"
--Request creation of \f(CW\*(C`.eh_frame\*(C'\fR unwind info for linker
--generated code sections like \s-1PLT\s0. This option is on by default
--if linker generated unwind info is supported.
--.IP "\fB\-\-enable\-new\-dtags\fR" 4
--.IX Item "--enable-new-dtags"
--.PD 0
--.IP "\fB\-\-disable\-new\-dtags\fR" 4
--.IX Item "--disable-new-dtags"
--.PD
--This linker can create the new dynamic tags in \s-1ELF\s0. But the older \s-1ELF\s0
--systems may not understand them. If you specify
--\&\fB\-\-enable\-new\-dtags\fR, the new dynamic tags will be created as needed
--and older dynamic tags will be omitted.
--If you specify \fB\-\-disable\-new\-dtags\fR, no new dynamic tags will be
--created. By default, the new dynamic tags are not created. Note that
--those options are only available for \s-1ELF\s0 systems.
--.IP "\fB\-\-hash\-size=\fR\fInumber\fR" 4
--.IX Item "--hash-size=number"
--Set the default size of the linker's hash tables to a prime number
--close to \fInumber\fR. Increasing this value can reduce the length of
--time it takes the linker to perform its tasks, at the expense of
--increasing the linker's memory requirements. Similarly reducing this
--value can reduce the memory requirements at the expense of speed.
--.IP "\fB\-\-hash\-style=\fR\fIstyle\fR" 4
--.IX Item "--hash-style=style"
--Set the type of linker's hash table(s). \fIstyle\fR can be either
--\&\f(CW\*(C`sysv\*(C'\fR for classic \s-1ELF\s0 \f(CW\*(C`.hash\*(C'\fR section, \f(CW\*(C`gnu\*(C'\fR for
--new style \s-1GNU\s0 \f(CW\*(C`.gnu.hash\*(C'\fR section or \f(CW\*(C`both\*(C'\fR for both
--the classic \s-1ELF\s0 \f(CW\*(C`.hash\*(C'\fR and new style \s-1GNU\s0 \f(CW\*(C`.gnu.hash\*(C'\fR
--hash tables. The default is \f(CW\*(C`sysv\*(C'\fR.
--.IP "\fB\-\-reduce\-memory\-overheads\fR" 4
--.IX Item "--reduce-memory-overheads"
--This option reduces memory requirements at ld runtime, at the expense of
--linking speed. This was introduced to select the old O(n^2) algorithm
--for link map file generation, rather than the new O(n) algorithm which uses
--about 40% more memory for symbol storage.
--.Sp
--Another effect of the switch is to set the default hash table size to
--1021, which again saves memory at the cost of lengthening the linker's
--run time. This is not done however if the \fB\-\-hash\-size\fR switch
--has been used.
--.Sp
--The \fB\-\-reduce\-memory\-overheads\fR switch may be also be used to
--enable other tradeoffs in future versions of the linker.
--.IP "\fB\-\-build\-id\fR" 4
--.IX Item "--build-id"
--.PD 0
--.IP "\fB\-\-build\-id=\fR\fIstyle\fR" 4
--.IX Item "--build-id=style"
--.PD
--Request creation of \f(CW\*(C`.note.gnu.build\-id\*(C'\fR \s-1ELF\s0 note section.
--The contents of the note are unique bits identifying this linked
--file. \fIstyle\fR can be \f(CW\*(C`uuid\*(C'\fR to use 128 random bits,
--\&\f(CW\*(C`sha1\*(C'\fR to use a 160\-bit \s-1SHA1\s0 hash on the normative
--parts of the output contents, \f(CW\*(C`md5\*(C'\fR to use a 128\-bit
--\&\s-1MD5\s0 hash on the normative parts of the output contents, or
--\&\f(CW\*(C`0x\f(CIhexstring\f(CW\*(C'\fR to use a chosen bit string specified as
--an even number of hexadecimal digits (\f(CW\*(C`\-\*(C'\fR and \f(CW\*(C`:\*(C'\fR
--characters between digit pairs are ignored). If \fIstyle\fR is
--omitted, \f(CW\*(C`sha1\*(C'\fR is used.
--.Sp
--The \f(CW\*(C`md5\*(C'\fR and \f(CW\*(C`sha1\*(C'\fR styles produces an identifier
--that is always the same in an identical output file, but will be
--unique among all nonidentical output files. It is not intended
--to be compared as a checksum for the file's contents. A linked
--file may be changed later by other tools, but the build \s-1ID\s0 bit
--string identifying the original linked file does not change.
--.Sp
--Passing \f(CW\*(C`none\*(C'\fR for \fIstyle\fR disables the setting from any
--\&\f(CW\*(C`\-\-build\-id\*(C'\fR options earlier on the command line.
--.PP
--The i386 \s-1PE\s0 linker supports the \fB\-shared\fR option, which causes
--the output to be a dynamically linked library (\s-1DLL\s0) instead of a
--normal executable. You should name the output \f(CW\*(C`*.dll\*(C'\fR when you
--use this option. In addition, the linker fully supports the standard
--\&\f(CW\*(C`*.def\*(C'\fR files, which may be specified on the linker command line
--like an object file (in fact, it should precede archives it exports
--symbols from, to ensure that they get linked in, just like a normal
--object file).
--.PP
--In addition to the options common to all targets, the i386 \s-1PE\s0 linker
--support additional command line options that are specific to the i386
--\&\s-1PE\s0 target. Options that take values may be separated from their
--values by either a space or an equals sign.
--.IP "\fB\-\-add\-stdcall\-alias\fR" 4
--.IX Item "--add-stdcall-alias"
--If given, symbols with a stdcall suffix (@\fInn\fR) will be exported
--as-is and also with the suffix stripped.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-base\-file\fR \fIfile\fR" 4
--.IX Item "--base-file file"
--Use \fIfile\fR as the name of a file in which to save the base
--addresses of all the relocations needed for generating DLLs with
--\&\fIdlltool\fR.
--[This is an i386 \s-1PE\s0 specific option]
--.IP "\fB\-\-dll\fR" 4
--.IX Item "--dll"
--Create a \s-1DLL\s0 instead of a regular executable. You may also use
--\&\fB\-shared\fR or specify a \f(CW\*(C`LIBRARY\*(C'\fR in a given \f(CW\*(C`.def\*(C'\fR
--file.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-enable\-long\-section\-names\fR" 4
--.IX Item "--enable-long-section-names"
--.PD 0
--.IP "\fB\-\-disable\-long\-section\-names\fR" 4
--.IX Item "--disable-long-section-names"
--.PD
--The \s-1PE\s0 variants of the Coff object format add an extension that permits
--the use of section names longer than eight characters, the normal limit
--for Coff. By default, these names are only allowed in object files, as
--fully-linked executable images do not carry the Coff string table required
--to support the longer names. As a \s-1GNU\s0 extension, it is possible to
--allow their use in executable images as well, or to (probably pointlessly!)
--disallow it in object files, by using these two options. Executable images
--generated with these long section names are slightly non-standard, carrying
--as they do a string table, and may generate confusing output when examined
--with non-GNU PE-aware tools, such as file viewers and dumpers. However,
--\&\s-1GDB\s0 relies on the use of \s-1PE\s0 long section names to find Dwarf\-2 debug
--information sections in an executable image at runtime, and so if neither
--option is specified on the command-line, \fBld\fR will enable long
--section names, overriding the default and technically correct behaviour,
--when it finds the presence of debug information while linking an executable
--image and not stripping symbols.
--[This option is valid for all \s-1PE\s0 targeted ports of the linker]
--.IP "\fB\-\-enable\-stdcall\-fixup\fR" 4
--.IX Item "--enable-stdcall-fixup"
--.PD 0
--.IP "\fB\-\-disable\-stdcall\-fixup\fR" 4
--.IX Item "--disable-stdcall-fixup"
--.PD
--If the link finds a symbol that it cannot resolve, it will attempt to
--do \*(L"fuzzy linking\*(R" by looking for another defined symbol that differs
--only in the format of the symbol name (cdecl vs stdcall) and will
--resolve that symbol by linking to the match. For example, the
--undefined symbol \f(CW\*(C`_foo\*(C'\fR might be linked to the function
--\&\f(CW\*(C`_foo@12\*(C'\fR, or the undefined symbol \f(CW\*(C`_bar@16\*(C'\fR might be linked
--to the function \f(CW\*(C`_bar\*(C'\fR. When the linker does this, it prints a
--warning, since it normally should have failed to link, but sometimes
--import libraries generated from third-party dlls may need this feature
--to be usable. If you specify \fB\-\-enable\-stdcall\-fixup\fR, this
--feature is fully enabled and warnings are not printed. If you specify
--\&\fB\-\-disable\-stdcall\-fixup\fR, this feature is disabled and such
--mismatches are considered to be errors.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-leading\-underscore\fR" 4
--.IX Item "--leading-underscore"
--.PD 0
--.IP "\fB\-\-no\-leading\-underscore\fR" 4
--.IX Item "--no-leading-underscore"
--.PD
--For most targets default symbol-prefix is an underscore and is defined
--in target's description. By this option it is possible to
--disable/enable the default underscore symbol-prefix.
--.IP "\fB\-\-export\-all\-symbols\fR" 4
--.IX Item "--export-all-symbols"
--If given, all global symbols in the objects used to build a \s-1DLL\s0 will
--be exported by the \s-1DLL\s0. Note that this is the default if there
--otherwise wouldn't be any exported symbols. When symbols are
--explicitly exported via \s-1DEF\s0 files or implicitly exported via function
--attributes, the default is to not export anything else unless this
--option is given. Note that the symbols \f(CW\*(C`DllMain@12\*(C'\fR,
--\&\f(CW\*(C`DllEntryPoint@0\*(C'\fR, \f(CW\*(C`DllMainCRTStartup@12\*(C'\fR, and
--\&\f(CW\*(C`impure_ptr\*(C'\fR will not be automatically
--exported. Also, symbols imported from other DLLs will not be
--re-exported, nor will symbols specifying the \s-1DLL\s0's internal layout
--such as those beginning with \f(CW\*(C`_head_\*(C'\fR or ending with
--\&\f(CW\*(C`_iname\*(C'\fR. In addition, no symbols from \f(CW\*(C`libgcc\*(C'\fR,
--\&\f(CW\*(C`libstd++\*(C'\fR, \f(CW\*(C`libmingw32\*(C'\fR, or \f(CW\*(C`crtX.o\*(C'\fR will be exported.
--Symbols whose names begin with \f(CW\*(C`_\|_rtti_\*(C'\fR or \f(CW\*(C`_\|_builtin_\*(C'\fR will
--not be exported, to help with \*(C+ DLLs. Finally, there is an
--extensive list of cygwin-private symbols that are not exported
--(obviously, this applies on when building DLLs for cygwin targets).
--These cygwin-excludes are: \f(CW\*(C`_cygwin_dll_entry@12\*(C'\fR,
--\&\f(CW\*(C`_cygwin_crt0_common@8\*(C'\fR, \f(CW\*(C`_cygwin_noncygwin_dll_entry@12\*(C'\fR,
--\&\f(CW\*(C`_fmode\*(C'\fR, \f(CW\*(C`_impure_ptr\*(C'\fR, \f(CW\*(C`cygwin_attach_dll\*(C'\fR,
--\&\f(CW\*(C`cygwin_premain0\*(C'\fR, \f(CW\*(C`cygwin_premain1\*(C'\fR, \f(CW\*(C`cygwin_premain2\*(C'\fR,
--\&\f(CW\*(C`cygwin_premain3\*(C'\fR, and \f(CW\*(C`environ\*(C'\fR.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-exclude\-symbols\fR \fIsymbol\fR\fB,\fR\fIsymbol\fR\fB,...\fR" 4
--.IX Item "--exclude-symbols symbol,symbol,..."
--Specifies a list of symbols which should not be automatically
--exported. The symbol names may be delimited by commas or colons.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-exclude\-all\-symbols\fR" 4
--.IX Item "--exclude-all-symbols"
--Specifies no symbols should be automatically exported.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-file\-alignment\fR" 4
--.IX Item "--file-alignment"
--Specify the file alignment. Sections in the file will always begin at
--file offsets which are multiples of this number. This defaults to
--512.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-heap\fR \fIreserve\fR" 4
--.IX Item "--heap reserve"
--.PD 0
--.IP "\fB\-\-heap\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4
--.IX Item "--heap reserve,commit"
--.PD
--Specify the number of bytes of memory to reserve (and optionally commit)
--to be used as heap for this program. The default is 1MB reserved, 4K
--committed.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-image\-base\fR \fIvalue\fR" 4
--.IX Item "--image-base value"
--Use \fIvalue\fR as the base address of your program or dll. This is
--the lowest memory location that will be used when your program or dll
--is loaded. To reduce the need to relocate and improve performance of
--your dlls, each should have a unique base address and not overlap any
--other dlls. The default is 0x400000 for executables, and 0x10000000
--for dlls.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-kill\-at\fR" 4
--.IX Item "--kill-at"
--If given, the stdcall suffixes (@\fInn\fR) will be stripped from
--symbols before they are exported.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-large\-address\-aware\fR" 4
--.IX Item "--large-address-aware"
--If given, the appropriate bit in the \*(L"Characteristics\*(R" field of the \s-1COFF\s0
--header is set to indicate that this executable supports virtual addresses
--greater than 2 gigabytes. This should be used in conjunction with the /3GB
--or /USERVA=\fIvalue\fR megabytes switch in the \*(L"[operating systems]\*(R"
--section of the \s-1BOOT\s0.INI. Otherwise, this bit has no effect.
--[This option is specific to \s-1PE\s0 targeted ports of the linker]
--.IP "\fB\-\-disable\-large\-address\-aware\fR" 4
--.IX Item "--disable-large-address-aware"
--Reverts the effect of a previous \fB\-\-large\-address\-aware\fR option.
--This is useful if \fB\-\-large\-address\-aware\fR is always set by the compiler
--driver (e.g. Cygwin gcc) and the executable does not support virtual
--addresses greater than 2 gigabytes.
--[This option is specific to \s-1PE\s0 targeted ports of the linker]
--.IP "\fB\-\-major\-image\-version\fR \fIvalue\fR" 4
--.IX Item "--major-image-version value"
--Sets the major number of the \*(L"image version\*(R". Defaults to 1.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-major\-os\-version\fR \fIvalue\fR" 4
--.IX Item "--major-os-version value"
--Sets the major number of the \*(L"os version\*(R". Defaults to 4.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-major\-subsystem\-version\fR \fIvalue\fR" 4
--.IX Item "--major-subsystem-version value"
--Sets the major number of the \*(L"subsystem version\*(R". Defaults to 4.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-minor\-image\-version\fR \fIvalue\fR" 4
--.IX Item "--minor-image-version value"
--Sets the minor number of the \*(L"image version\*(R". Defaults to 0.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-minor\-os\-version\fR \fIvalue\fR" 4
--.IX Item "--minor-os-version value"
--Sets the minor number of the \*(L"os version\*(R". Defaults to 0.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-minor\-subsystem\-version\fR \fIvalue\fR" 4
--.IX Item "--minor-subsystem-version value"
--Sets the minor number of the \*(L"subsystem version\*(R". Defaults to 0.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-output\-def\fR \fIfile\fR" 4
--.IX Item "--output-def file"
--The linker will create the file \fIfile\fR which will contain a \s-1DEF\s0
--file corresponding to the \s-1DLL\s0 the linker is generating. This \s-1DEF\s0 file
--(which should be called \f(CW\*(C`*.def\*(C'\fR) may be used to create an import
--library with \f(CW\*(C`dlltool\*(C'\fR or may be used as a reference to
--automatically or implicitly exported symbols.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-out\-implib\fR \fIfile\fR" 4
--.IX Item "--out-implib file"
--The linker will create the file \fIfile\fR which will contain an
--import lib corresponding to the \s-1DLL\s0 the linker is generating. This
--import lib (which should be called \f(CW\*(C`*.dll.a\*(C'\fR or \f(CW\*(C`*.a\*(C'\fR
--may be used to link clients against the generated \s-1DLL\s0; this behaviour
--makes it possible to skip a separate \f(CW\*(C`dlltool\*(C'\fR import library
--creation step.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-enable\-auto\-image\-base\fR" 4
--.IX Item "--enable-auto-image-base"
--Automatically choose the image base for DLLs, unless one is specified
--using the \f(CW\*(C`\-\-image\-base\*(C'\fR argument. By using a hash generated
--from the dllname to create unique image bases for each \s-1DLL\s0, in-memory
--collisions and relocations which can delay program execution are
--avoided.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-disable\-auto\-image\-base\fR" 4
--.IX Item "--disable-auto-image-base"
--Do not automatically generate a unique image base. If there is no
--user-specified image base (\f(CW\*(C`\-\-image\-base\*(C'\fR) then use the platform
--default.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-dll\-search\-prefix\fR \fIstring\fR" 4
--.IX Item "--dll-search-prefix string"
--When linking dynamically to a dll without an import library,
--search for \f(CW\*(C`<string><basename>.dll\*(C'\fR in preference to
--\&\f(CW\*(C`lib<basename>.dll\*(C'\fR. This behaviour allows easy distinction
--between DLLs built for the various \*(L"subplatforms\*(R": native, cygwin,
--uwin, pw, etc. For instance, cygwin DLLs typically use
--\&\f(CW\*(C`\-\-dll\-search\-prefix=cyg\*(C'\fR.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-enable\-auto\-import\fR" 4
--.IX Item "--enable-auto-import"
--Do sophisticated linking of \f(CW\*(C`_symbol\*(C'\fR to \f(CW\*(C`_\|_imp_\|_symbol\*(C'\fR for
--\&\s-1DATA\s0 imports from DLLs, and create the necessary thunking symbols when
--building the import libraries with those \s-1DATA\s0 exports. Note: Use of the
--\&'auto\-import' extension will cause the text section of the image file
--to be made writable. This does not conform to the PE-COFF format
--specification published by Microsoft.
--.Sp
--Note \- use of the 'auto\-import' extension will also cause read only
--data which would normally be placed into the .rdata section to be
--placed into the .data section instead. This is in order to work
--around a problem with consts that is described here:
--http://www.cygwin.com/ml/cygwin/2004\-09/msg01101.html
--.Sp
--Using 'auto\-import' generally will 'just work' \*(-- but sometimes you may
--see this message:
--.Sp
--"variable '<var>' can't be auto-imported. Please read the
--documentation for ld's \f(CW\*(C`\-\-enable\-auto\-import\*(C'\fR for details."
--.Sp
--This message occurs when some (sub)expression accesses an address
--ultimately given by the sum of two constants (Win32 import tables only
--allow one). Instances where this may occur include accesses to member
--fields of struct variables imported from a \s-1DLL\s0, as well as using a
--constant index into an array variable imported from a \s-1DLL\s0. Any
--multiword variable (arrays, structs, long long, etc) may trigger
--this error condition. However, regardless of the exact data type
--of the offending exported variable, ld will always detect it, issue
--the warning, and exit.
--.Sp
--There are several ways to address this difficulty, regardless of the
--data type of the exported variable:
--.Sp
--One way is to use \-\-enable\-runtime\-pseudo\-reloc switch. This leaves the task
--of adjusting references in your client code for runtime environment, so
--this method works only when runtime environment supports this feature.
--.Sp
--A second solution is to force one of the 'constants' to be a variable \*(--
--that is, unknown and un-optimizable at compile time. For arrays,
--there are two possibilities: a) make the indexee (the array's address)
--a variable, or b) make the 'constant' index a variable. Thus:
--.Sp
--.Vb 3
--\& extern type extern_array[];
--\& extern_array[1] \-\->
--\& { volatile type *t=extern_array; t[1] }
--.Ve
--.Sp
--or
--.Sp
--.Vb 3
--\& extern type extern_array[];
--\& extern_array[1] \-\->
--\& { volatile int t=1; extern_array[t] }
--.Ve
--.Sp
--For structs (and most other multiword data types) the only option
--is to make the struct itself (or the long long, or the ...) variable:
--.Sp
--.Vb 3
--\& extern struct s extern_struct;
--\& extern_struct.field \-\->
--\& { volatile struct s *t=&extern_struct; t\->field }
--.Ve
--.Sp
--or
--.Sp
--.Vb 3
--\& extern long long extern_ll;
--\& extern_ll \-\->
--\& { volatile long long * local_ll=&extern_ll; *local_ll }
--.Ve
--.Sp
--A third method of dealing with this difficulty is to abandon
--\&'auto\-import' for the offending symbol and mark it with
--\&\f(CW\*(C`_\|_declspec(dllimport)\*(C'\fR. However, in practice that
--requires using compile-time #defines to indicate whether you are
--building a \s-1DLL\s0, building client code that will link to the \s-1DLL\s0, or
--merely building/linking to a static library. In making the choice
--between the various methods of resolving the 'direct address with
--constant offset' problem, you should consider typical real-world usage:
--.Sp
--Original:
--.Sp
--.Vb 7
--\& \-\-foo.h
--\& extern int arr[];
--\& \-\-foo.c
--\& #include "foo.h"
--\& void main(int argc, char **argv){
--\& printf("%d\en",arr[1]);
--\& }
--.Ve
--.Sp
--Solution 1:
--.Sp
--.Vb 9
--\& \-\-foo.h
--\& extern int arr[];
--\& \-\-foo.c
--\& #include "foo.h"
--\& void main(int argc, char **argv){
--\& /* This workaround is for win32 and cygwin; do not "optimize" */
--\& volatile int *parr = arr;
--\& printf("%d\en",parr[1]);
--\& }
--.Ve
--.Sp
--Solution 2:
--.Sp
--.Vb 10
--\& \-\-foo.h
--\& /* Note: auto\-export is assumed (no _\|_declspec(dllexport)) */
--\& #if (defined(_WIN32) || defined(_\|_CYGWIN_\|_)) && \e
--\& !(defined(FOO_BUILD_DLL) || defined(FOO_STATIC))
--\& #define FOO_IMPORT _\|_declspec(dllimport)
--\& #else
--\& #define FOO_IMPORT
--\& #endif
--\& extern FOO_IMPORT int arr[];
--\& \-\-foo.c
--\& #include "foo.h"
--\& void main(int argc, char **argv){
--\& printf("%d\en",arr[1]);
--\& }
--.Ve
--.Sp
--A fourth way to avoid this problem is to re-code your
--library to use a functional interface rather than a data interface
--for the offending variables (e.g. \fIset_foo()\fR and \fIget_foo()\fR accessor
--functions).
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-disable\-auto\-import\fR" 4
--.IX Item "--disable-auto-import"
--Do not attempt to do sophisticated linking of \f(CW\*(C`_symbol\*(C'\fR to
--\&\f(CW\*(C`_\|_imp_\|_symbol\*(C'\fR for \s-1DATA\s0 imports from DLLs.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-enable\-runtime\-pseudo\-reloc\fR" 4
--.IX Item "--enable-runtime-pseudo-reloc"
--If your code contains expressions described in \-\-enable\-auto\-import section,
--that is, \s-1DATA\s0 imports from \s-1DLL\s0 with non-zero offset, this switch will create
--a vector of 'runtime pseudo relocations' which can be used by runtime
--environment to adjust references to such data in your client code.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-disable\-runtime\-pseudo\-reloc\fR" 4
--.IX Item "--disable-runtime-pseudo-reloc"
--Do not create pseudo relocations for non-zero offset \s-1DATA\s0 imports from
--DLLs.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-enable\-extra\-pe\-debug\fR" 4
--.IX Item "--enable-extra-pe-debug"
--Show additional debug info related to auto-import symbol thunking.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-section\-alignment\fR" 4
--.IX Item "--section-alignment"
--Sets the section alignment. Sections in memory will always begin at
--addresses which are a multiple of this number. Defaults to 0x1000.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-stack\fR \fIreserve\fR" 4
--.IX Item "--stack reserve"
--.PD 0
--.IP "\fB\-\-stack\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4
--.IX Item "--stack reserve,commit"
--.PD
--Specify the number of bytes of memory to reserve (and optionally commit)
--to be used as stack for this program. The default is 2MB reserved, 4K
--committed.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.IP "\fB\-\-subsystem\fR \fIwhich\fR" 4
--.IX Item "--subsystem which"
--.PD 0
--.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR" 4
--.IX Item "--subsystem which:major"
--.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR\fB.\fR\fIminor\fR" 4
--.IX Item "--subsystem which:major.minor"
--.PD
--Specifies the subsystem under which your program will execute. The
--legal values for \fIwhich\fR are \f(CW\*(C`native\*(C'\fR, \f(CW\*(C`windows\*(C'\fR,
--\&\f(CW\*(C`console\*(C'\fR, \f(CW\*(C`posix\*(C'\fR, and \f(CW\*(C`xbox\*(C'\fR. You may optionally set
--the subsystem version also. Numeric values are also accepted for
--\&\fIwhich\fR.
--[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
--.Sp
--The following options set flags in the \f(CW\*(C`DllCharacteristics\*(C'\fR field
--of the \s-1PE\s0 file header:
--[These options are specific to \s-1PE\s0 targeted ports of the linker]
--.IP "\fB\-\-dynamicbase\fR" 4
--.IX Item "--dynamicbase"
--The image base address may be relocated using address space layout
--randomization (\s-1ASLR\s0). This feature was introduced with \s-1MS\s0 Windows
--Vista for i386 \s-1PE\s0 targets.
--.IP "\fB\-\-forceinteg\fR" 4
--.IX Item "--forceinteg"
--Code integrity checks are enforced.
--.IP "\fB\-\-nxcompat\fR" 4
--.IX Item "--nxcompat"
--The image is compatible with the Data Execution Prevention.
--This feature was introduced with \s-1MS\s0 Windows \s-1XP\s0 \s-1SP2\s0 for i386 \s-1PE\s0 targets.
--.IP "\fB\-\-no\-isolation\fR" 4
--.IX Item "--no-isolation"
--Although the image understands isolation, do not isolate the image.
--.IP "\fB\-\-no\-seh\fR" 4
--.IX Item "--no-seh"
--The image does not use \s-1SEH\s0. No \s-1SE\s0 handler may be called from
--this image.
--.IP "\fB\-\-no\-bind\fR" 4
--.IX Item "--no-bind"
--Do not bind this image.
--.IP "\fB\-\-wdmdriver\fR" 4
--.IX Item "--wdmdriver"
--The driver uses the \s-1MS\s0 Windows Driver Model.
--.IP "\fB\-\-tsaware\fR" 4
--.IX Item "--tsaware"
--The image is Terminal Server aware.
--.IP "\fB\-\-insert\-timestamp\fR" 4
--.IX Item "--insert-timestamp"
--Insert a real timestamp into the image, rather than the default value
--of zero. This will result in a slightly different results with each
--invocation, which could be helpful for distributing unique images.
--.PP
--The C6X uClinux target uses a binary format called \s-1DSBT\s0 to support shared
--libraries. Each shared library in the system needs to have a unique index;
--all executables use an index of 0.
--.IP "\fB\-\-dsbt\-size\fR \fIsize\fR" 4
--.IX Item "--dsbt-size size"
--This option sets the number of entires in the \s-1DSBT\s0 of the current executable
--or shared library to \fIsize\fR. The default is to create a table with 64
--entries.
--.IP "\fB\-\-dsbt\-index\fR \fIindex\fR" 4
--.IX Item "--dsbt-index index"
--This option sets the \s-1DSBT\s0 index of the current executable or shared library
--to \fIindex\fR. The default is 0, which is appropriate for generating
--executables. If a shared library is generated with a \s-1DSBT\s0 index of 0, the
--\&\f(CW\*(C`R_C6000_DSBT_INDEX\*(C'\fR relocs are copied into the output file.
--.Sp
--The \fB\-\-no\-merge\-exidx\-entries\fR switch disables the merging of adjacent
--exidx entries in frame unwind info.
--.PP
--The 68HC11 and 68HC12 linkers support specific options to control the
--memory bank switching mapping and trampoline code generation.
--.IP "\fB\-\-no\-trampoline\fR" 4
--.IX Item "--no-trampoline"
--This option disables the generation of trampoline. By default a trampoline
--is generated for each far function which is called using a \f(CW\*(C`jsr\*(C'\fR
--instruction (this happens when a pointer to a far function is taken).
--.IP "\fB\-\-bank\-window\fR \fIname\fR" 4
--.IX Item "--bank-window name"
--This option indicates to the linker the name of the memory region in
--the \fB\s-1MEMORY\s0\fR specification that describes the memory bank window.
--The definition of such region is then used by the linker to compute
--paging and addresses within the memory window.
--.PP
--The following options are supported to control handling of \s-1GOT\s0 generation
--when linking for 68K targets.
--.IP "\fB\-\-got=\fR\fItype\fR" 4
--.IX Item "--got=type"
--This option tells the linker which \s-1GOT\s0 generation scheme to use.
--\&\fItype\fR should be one of \fBsingle\fR, \fBnegative\fR,
--\&\fBmultigot\fR or \fBtarget\fR. For more information refer to the
--Info entry for \fIld\fR.
--.PP
--The following options are supported to control microMIPS instruction
--generation when linking for \s-1MIPS\s0 targets.
--.IP "\fB\-\-insn32\fR" 4
--.IX Item "--insn32"
--.PD 0
--.IP "\fB\-\-no\-insn32\fR" 4
--.IX Item "--no-insn32"
--.PD
--These options control the choice of microMIPS instructions used in code
--generated by the linker, such as that in the \s-1PLT\s0 or lazy binding stubs,
--or in relaxation. If \fB\-\-insn32\fR is used, then the linker only uses
--32\-bit instruction encodings. By default or if \fB\-\-no\-insn32\fR is
--used, all instruction encodings are used, including 16\-bit ones where
--possible.
--.SH "ENVIRONMENT"
--.IX Header "ENVIRONMENT"
--You can change the behaviour of \fBld\fR with the environment variables
--\&\f(CW\*(C`GNUTARGET\*(C'\fR,
--\&\f(CW\*(C`LDEMULATION\*(C'\fR and \f(CW\*(C`COLLECT_NO_DEMANGLE\*(C'\fR.
--.PP
--\&\f(CW\*(C`GNUTARGET\*(C'\fR determines the input-file object format if you don't
--use \fB\-b\fR (or its synonym \fB\-\-format\fR). Its value should be one
--of the \s-1BFD\s0 names for an input format. If there is no
--\&\f(CW\*(C`GNUTARGET\*(C'\fR in the environment, \fBld\fR uses the natural format
--of the target. If \f(CW\*(C`GNUTARGET\*(C'\fR is set to \f(CW\*(C`default\*(C'\fR then \s-1BFD\s0
--attempts to discover the input format by examining binary input files;
--this method often succeeds, but there are potential ambiguities, since
--there is no method of ensuring that the magic number used to specify
--object-file formats is unique. However, the configuration procedure for
--\&\s-1BFD\s0 on each system places the conventional format for that system first
--in the search-list, so ambiguities are resolved in favor of convention.
--.PP
--\&\f(CW\*(C`LDEMULATION\*(C'\fR determines the default emulation if you don't use the
--\&\fB\-m\fR option. The emulation can affect various aspects of linker
--behaviour, particularly the default linker script. You can list the
--available emulations with the \fB\-\-verbose\fR or \fB\-V\fR options. If
--the \fB\-m\fR option is not used, and the \f(CW\*(C`LDEMULATION\*(C'\fR environment
--variable is not defined, the default emulation depends upon how the
--linker was configured.
--.PP
--Normally, the linker will default to demangling symbols. However, if
--\&\f(CW\*(C`COLLECT_NO_DEMANGLE\*(C'\fR is set in the environment, then it will
--default to not demangling symbols. This environment variable is used in
--a similar fashion by the \f(CW\*(C`gcc\*(C'\fR linker wrapper program. The default
--may be overridden by the \fB\-\-demangle\fR and \fB\-\-no\-demangle\fR
--options.
--.SH "SEE ALSO"
--.IX Header "SEE ALSO"
--\&\fIar\fR\|(1), \fInm\fR\|(1), \fIobjcopy\fR\|(1), \fIobjdump\fR\|(1), \fIreadelf\fR\|(1) and
--the Info entries for \fIbinutils\fR and
--\&\fIld\fR.
--.SH "COPYRIGHT"
--.IX Header "COPYRIGHT"
--Copyright (c) 1991\-2013 Free Software Foundation, Inc.
--.PP
--Permission is granted to copy, distribute and/or modify this document
--under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
--or any later version published by the Free Software Foundation;
--with no Invariant Sections, with no Front-Cover Texts, and with no
--Back-Cover Texts. A copy of the license is included in the
--section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
-diff -Nur binutils-2.24.orig/ld/ldgram.c binutils-2.24/ld/ldgram.c
---- binutils-2.24.orig/ld/ldgram.c 2013-11-18 09:49:29.000000000 +0100
-+++ binutils-2.24/ld/ldgram.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,4717 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton implementation for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* C LALR(1) parser skeleton written by Richard Stallman, by
-- simplifying the original so-called "semantic" parser. */
--
--/* All symbols defined below should begin with yy or YY, to avoid
-- infringing on user name space. This should be done even for local
-- variables, as they might otherwise be expanded by user macros.
-- There are some unavoidable exceptions within include files to
-- define necessary library symbols; they are noted "INFRINGES ON
-- USER NAME SPACE" below. */
--
--/* Identify Bison output. */
--#define YYBISON 1
--
--/* Bison version. */
--#define YYBISON_VERSION "2.3"
--
--/* Skeleton name. */
--#define YYSKELETON_NAME "yacc.c"
--
--/* Pure parsers. */
--#define YYPURE 0
--
--/* Using locations. */
--#define YYLSP_NEEDED 0
--
--
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- INT = 258,
-- NAME = 259,
-- LNAME = 260,
-- OREQ = 261,
-- ANDEQ = 262,
-- RSHIFTEQ = 263,
-- LSHIFTEQ = 264,
-- DIVEQ = 265,
-- MULTEQ = 266,
-- MINUSEQ = 267,
-- PLUSEQ = 268,
-- OROR = 269,
-- ANDAND = 270,
-- NE = 271,
-- EQ = 272,
-- GE = 273,
-- LE = 274,
-- RSHIFT = 275,
-- LSHIFT = 276,
-- UNARY = 277,
-- END = 278,
-- ALIGN_K = 279,
-- BLOCK = 280,
-- BIND = 281,
-- QUAD = 282,
-- SQUAD = 283,
-- LONG = 284,
-- SHORT = 285,
-- BYTE = 286,
-- SECTIONS = 287,
-- PHDRS = 288,
-- INSERT_K = 289,
-- AFTER = 290,
-- BEFORE = 291,
-- DATA_SEGMENT_ALIGN = 292,
-- DATA_SEGMENT_RELRO_END = 293,
-- DATA_SEGMENT_END = 294,
-- SORT_BY_NAME = 295,
-- SORT_BY_ALIGNMENT = 296,
-- SORT_NONE = 297,
-- SORT_BY_INIT_PRIORITY = 298,
-- SIZEOF_HEADERS = 299,
-- OUTPUT_FORMAT = 300,
-- FORCE_COMMON_ALLOCATION = 301,
-- OUTPUT_ARCH = 302,
-- INHIBIT_COMMON_ALLOCATION = 303,
-- SEGMENT_START = 304,
-- INCLUDE = 305,
-- MEMORY = 306,
-- REGION_ALIAS = 307,
-- LD_FEATURE = 308,
-- NOLOAD = 309,
-- DSECT = 310,
-- COPY = 311,
-- INFO = 312,
-- OVERLAY = 313,
-- DEFINED = 314,
-- TARGET_K = 315,
-- SEARCH_DIR = 316,
-- MAP = 317,
-- ENTRY = 318,
-- NEXT = 319,
-- SIZEOF = 320,
-- ALIGNOF = 321,
-- ADDR = 322,
-- LOADADDR = 323,
-- MAX_K = 324,
-- MIN_K = 325,
-- STARTUP = 326,
-- HLL = 327,
-- SYSLIB = 328,
-- FLOAT = 329,
-- NOFLOAT = 330,
-- NOCROSSREFS = 331,
-- ORIGIN = 332,
-- FILL = 333,
-- LENGTH = 334,
-- CREATE_OBJECT_SYMBOLS = 335,
-- INPUT = 336,
-- GROUP = 337,
-- OUTPUT = 338,
-- CONSTRUCTORS = 339,
-- ALIGNMOD = 340,
-- AT = 341,
-- SUBALIGN = 342,
-- HIDDEN = 343,
-- PROVIDE = 344,
-- PROVIDE_HIDDEN = 345,
-- AS_NEEDED = 346,
-- CHIP = 347,
-- LIST = 348,
-- SECT = 349,
-- ABSOLUTE = 350,
-- LOAD = 351,
-- NEWLINE = 352,
-- ENDWORD = 353,
-- ORDER = 354,
-- NAMEWORD = 355,
-- ASSERT_K = 356,
-- LOG2CEIL = 357,
-- FORMAT = 358,
-- PUBLIC = 359,
-- DEFSYMEND = 360,
-- BASE = 361,
-- ALIAS = 362,
-- TRUNCATE = 363,
-- REL = 364,
-- INPUT_SCRIPT = 365,
-- INPUT_MRI_SCRIPT = 366,
-- INPUT_DEFSYM = 367,
-- CASE = 368,
-- EXTERN = 369,
-- START = 370,
-- VERS_TAG = 371,
-- VERS_IDENTIFIER = 372,
-- GLOBAL = 373,
-- LOCAL = 374,
-- VERSIONK = 375,
-- INPUT_VERSION_SCRIPT = 376,
-- KEEP = 377,
-- ONLY_IF_RO = 378,
-- ONLY_IF_RW = 379,
-- SPECIAL = 380,
-- INPUT_SECTION_FLAGS = 381,
-- ALIGN_WITH_INPUT = 382,
-- EXCLUDE_FILE = 383,
-- CONSTANT = 384,
-- INPUT_DYNAMIC_LIST = 385
-- };
--#endif
--/* Tokens. */
--#define INT 258
--#define NAME 259
--#define LNAME 260
--#define OREQ 261
--#define ANDEQ 262
--#define RSHIFTEQ 263
--#define LSHIFTEQ 264
--#define DIVEQ 265
--#define MULTEQ 266
--#define MINUSEQ 267
--#define PLUSEQ 268
--#define OROR 269
--#define ANDAND 270
--#define NE 271
--#define EQ 272
--#define GE 273
--#define LE 274
--#define RSHIFT 275
--#define LSHIFT 276
--#define UNARY 277
--#define END 278
--#define ALIGN_K 279
--#define BLOCK 280
--#define BIND 281
--#define QUAD 282
--#define SQUAD 283
--#define LONG 284
--#define SHORT 285
--#define BYTE 286
--#define SECTIONS 287
--#define PHDRS 288
--#define INSERT_K 289
--#define AFTER 290
--#define BEFORE 291
--#define DATA_SEGMENT_ALIGN 292
--#define DATA_SEGMENT_RELRO_END 293
--#define DATA_SEGMENT_END 294
--#define SORT_BY_NAME 295
--#define SORT_BY_ALIGNMENT 296
--#define SORT_NONE 297
--#define SORT_BY_INIT_PRIORITY 298
--#define SIZEOF_HEADERS 299
--#define OUTPUT_FORMAT 300
--#define FORCE_COMMON_ALLOCATION 301
--#define OUTPUT_ARCH 302
--#define INHIBIT_COMMON_ALLOCATION 303
--#define SEGMENT_START 304
--#define INCLUDE 305
--#define MEMORY 306
--#define REGION_ALIAS 307
--#define LD_FEATURE 308
--#define NOLOAD 309
--#define DSECT 310
--#define COPY 311
--#define INFO 312
--#define OVERLAY 313
--#define DEFINED 314
--#define TARGET_K 315
--#define SEARCH_DIR 316
--#define MAP 317
--#define ENTRY 318
--#define NEXT 319
--#define SIZEOF 320
--#define ALIGNOF 321
--#define ADDR 322
--#define LOADADDR 323
--#define MAX_K 324
--#define MIN_K 325
--#define STARTUP 326
--#define HLL 327
--#define SYSLIB 328
--#define FLOAT 329
--#define NOFLOAT 330
--#define NOCROSSREFS 331
--#define ORIGIN 332
--#define FILL 333
--#define LENGTH 334
--#define CREATE_OBJECT_SYMBOLS 335
--#define INPUT 336
--#define GROUP 337
--#define OUTPUT 338
--#define CONSTRUCTORS 339
--#define ALIGNMOD 340
--#define AT 341
--#define SUBALIGN 342
--#define HIDDEN 343
--#define PROVIDE 344
--#define PROVIDE_HIDDEN 345
--#define AS_NEEDED 346
--#define CHIP 347
--#define LIST 348
--#define SECT 349
--#define ABSOLUTE 350
--#define LOAD 351
--#define NEWLINE 352
--#define ENDWORD 353
--#define ORDER 354
--#define NAMEWORD 355
--#define ASSERT_K 356
--#define LOG2CEIL 357
--#define FORMAT 358
--#define PUBLIC 359
--#define DEFSYMEND 360
--#define BASE 361
--#define ALIAS 362
--#define TRUNCATE 363
--#define REL 364
--#define INPUT_SCRIPT 365
--#define INPUT_MRI_SCRIPT 366
--#define INPUT_DEFSYM 367
--#define CASE 368
--#define EXTERN 369
--#define START 370
--#define VERS_TAG 371
--#define VERS_IDENTIFIER 372
--#define GLOBAL 373
--#define LOCAL 374
--#define VERSIONK 375
--#define INPUT_VERSION_SCRIPT 376
--#define KEEP 377
--#define ONLY_IF_RO 378
--#define ONLY_IF_RW 379
--#define SPECIAL 380
--#define INPUT_SECTION_FLAGS 381
--#define ALIGN_WITH_INPUT 382
--#define EXCLUDE_FILE 383
--#define CONSTANT 384
--#define INPUT_DYNAMIC_LIST 385
--
--
--
--
--/* Copy the first part of user declarations. */
--#line 22 "ldgram.y"
--
--/*
--
-- */
--
--#define DONTDECLARE_MALLOC
--
--#include "sysdep.h"
--#include "bfd.h"
--#include "bfdlink.h"
--#include "ld.h"
--#include "ldexp.h"
--#include "ldver.h"
--#include "ldlang.h"
--#include "ldfile.h"
--#include "ldemul.h"
--#include "ldmisc.h"
--#include "ldmain.h"
--#include "mri.h"
--#include "ldctor.h"
--#include "ldlex.h"
--
--#ifndef YYDEBUG
--#define YYDEBUG 1
--#endif
--
--static enum section_type sectype;
--static lang_memory_region_type *region;
--
--bfd_boolean ldgram_had_keep = FALSE;
--char *ldgram_vers_current_lang = NULL;
--
--#define ERROR_NAME_MAX 20
--static char *error_names[ERROR_NAME_MAX];
--static int error_index;
--#define PUSH_ERROR(x) if (error_index < ERROR_NAME_MAX) error_names[error_index] = x; error_index++;
--#define POP_ERROR() error_index--;
--
--
--/* Enabling traces. */
--#ifndef YYDEBUG
--# define YYDEBUG 0
--#endif
--
--/* Enabling verbose error messages. */
--#ifdef YYERROR_VERBOSE
--# undef YYERROR_VERBOSE
--# define YYERROR_VERBOSE 1
--#else
--# define YYERROR_VERBOSE 0
--#endif
--
--/* Enabling the token table. */
--#ifndef YYTOKEN_TABLE
--# define YYTOKEN_TABLE 0
--#endif
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 60 "ldgram.y"
--{
-- bfd_vma integer;
-- struct big_int
-- {
-- bfd_vma integer;
-- char *str;
-- } bigint;
-- fill_type *fill;
-- char *name;
-- const char *cname;
-- struct wildcard_spec wildcard;
-- struct wildcard_list *wildcard_list;
-- struct name_list *name_list;
-- struct flag_info_list *flag_info_list;
-- struct flag_info *flag_info;
-- int token;
-- union etree_union *etree;
-- struct phdr_info
-- {
-- bfd_boolean filehdr;
-- bfd_boolean phdrs;
-- union etree_union *at;
-- union etree_union *flags;
-- } phdr;
-- struct lang_nocrossref *nocrossref;
-- struct lang_output_section_phdr_list *section_phdr;
-- struct bfd_elf_version_deps *deflist;
-- struct bfd_elf_version_expr *versyms;
-- struct bfd_elf_version_tree *versnode;
--}
--/* Line 193 of yacc.c. */
--#line 426 "ldgram.c"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--
--
--/* Copy the second part of user declarations. */
--
--
--/* Line 216 of yacc.c. */
--#line 439 "ldgram.c"
--
--#ifdef short
--# undef short
--#endif
--
--#ifdef YYTYPE_UINT8
--typedef YYTYPE_UINT8 yytype_uint8;
--#else
--typedef unsigned char yytype_uint8;
--#endif
--
--#ifdef YYTYPE_INT8
--typedef YYTYPE_INT8 yytype_int8;
--#elif (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--typedef signed char yytype_int8;
--#else
--typedef short int yytype_int8;
--#endif
--
--#ifdef YYTYPE_UINT16
--typedef YYTYPE_UINT16 yytype_uint16;
--#else
--typedef unsigned short int yytype_uint16;
--#endif
--
--#ifdef YYTYPE_INT16
--typedef YYTYPE_INT16 yytype_int16;
--#else
--typedef short int yytype_int16;
--#endif
--
--#ifndef YYSIZE_T
--# ifdef __SIZE_TYPE__
--# define YYSIZE_T __SIZE_TYPE__
--# elif defined size_t
--# define YYSIZE_T size_t
--# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stddef.h> /* INFRINGES ON USER NAME SPACE */
--# define YYSIZE_T size_t
--# else
--# define YYSIZE_T unsigned int
--# endif
--#endif
--
--#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
--
--#ifndef YY_
--# if defined YYENABLE_NLS && YYENABLE_NLS
--# if ENABLE_NLS
--# include <libintl.h> /* INFRINGES ON USER NAME SPACE */
--# define YY_(msgid) dgettext ("bison-runtime", msgid)
--# endif
--# endif
--# ifndef YY_
--# define YY_(msgid) msgid
--# endif
--#endif
--
--/* Suppress unused-variable warnings by "using" E. */
--#if ! defined lint || defined __GNUC__
--# define YYUSE(e) ((void) (e))
--#else
--# define YYUSE(e) /* empty */
--#endif
--
--/* Identity function, used to suppress warnings about constant conditions. */
--#ifndef lint
--# define YYID(n) (n)
--#else
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static int
--YYID (int i)
--#else
--static int
--YYID (i)
-- int i;
--#endif
--{
-- return i;
--}
--#endif
--
--#if ! defined yyoverflow || YYERROR_VERBOSE
--
--/* The parser invokes alloca or malloc; define the necessary symbols. */
--
--# ifdef YYSTACK_USE_ALLOCA
--# if YYSTACK_USE_ALLOCA
--# ifdef __GNUC__
--# define YYSTACK_ALLOC __builtin_alloca
--# elif defined __BUILTIN_VA_ARG_INCR
--# include <alloca.h> /* INFRINGES ON USER NAME SPACE */
--# elif defined _AIX
--# define YYSTACK_ALLOC __alloca
--# elif defined _MSC_VER
--# include <malloc.h> /* INFRINGES ON USER NAME SPACE */
--# define alloca _alloca
--# else
--# define YYSTACK_ALLOC alloca
--# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# endif
--# endif
--# endif
--
--# ifdef YYSTACK_ALLOC
-- /* Pacify GCC's `empty if-body' warning. */
--# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0))
--# ifndef YYSTACK_ALLOC_MAXIMUM
-- /* The OS might guarantee only one guard page at the bottom of the stack,
-- and a page size can be as small as 4096 bytes. So we cannot safely
-- invoke alloca (N) if N exceeds 4096. Use a slightly smaller number
-- to allow for a few compiler-allocated temporary stack slots. */
--# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
--# endif
--# else
--# define YYSTACK_ALLOC YYMALLOC
--# define YYSTACK_FREE YYFREE
--# ifndef YYSTACK_ALLOC_MAXIMUM
--# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
--# endif
--# if (defined __cplusplus && ! defined _STDLIB_H \
-- && ! ((defined YYMALLOC || defined malloc) \
-- && (defined YYFREE || defined free)))
--# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
--# ifndef _STDLIB_H
--# define _STDLIB_H 1
--# endif
--# endif
--# ifndef YYMALLOC
--# define YYMALLOC malloc
--# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# ifndef YYFREE
--# define YYFREE free
--# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--void free (void *); /* INFRINGES ON USER NAME SPACE */
--# endif
--# endif
--# endif
--#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
--
--
--#if (! defined yyoverflow \
-- && (! defined __cplusplus \
-- || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
--
--/* A type that is properly aligned for any stack member. */
--union yyalloc
--{
-- yytype_int16 yyss;
-- YYSTYPE yyvs;
-- };
--
--/* The size of the maximum gap between one aligned stack and the next. */
--# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
--
--/* The size of an array large to enough to hold all stacks, each with
-- N elements. */
--# define YYSTACK_BYTES(N) \
-- ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \
-- + YYSTACK_GAP_MAXIMUM)
--
--/* Copy COUNT objects from FROM to TO. The source and destination do
-- not overlap. */
--# ifndef YYCOPY
--# if defined __GNUC__ && 1 < __GNUC__
--# define YYCOPY(To, From, Count) \
-- __builtin_memcpy (To, From, (Count) * sizeof (*(From)))
--# else
--# define YYCOPY(To, From, Count) \
-- do \
-- { \
-- YYSIZE_T yyi; \
-- for (yyi = 0; yyi < (Count); yyi++) \
-- (To)[yyi] = (From)[yyi]; \
-- } \
-- while (YYID (0))
--# endif
--# endif
--
--/* Relocate STACK from its old location to the new one. The
-- local variables YYSIZE and YYSTACKSIZE give the old and new number of
-- elements in the stack, and YYPTR gives the new location of the
-- stack. Advance YYPTR to a properly aligned location for the next
-- stack. */
--# define YYSTACK_RELOCATE(Stack) \
-- do \
-- { \
-- YYSIZE_T yynewbytes; \
-- YYCOPY (&yyptr->Stack, Stack, yysize); \
-- Stack = &yyptr->Stack; \
-- yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
-- yyptr += yynewbytes / sizeof (*yyptr); \
-- } \
-- while (YYID (0))
--
--#endif
--
--/* YYFINAL -- State number of the termination state. */
--#define YYFINAL 17
--/* YYLAST -- Last index in YYTABLE. */
--#define YYLAST 1999
--
--/* YYNTOKENS -- Number of terminals. */
--#define YYNTOKENS 154
--/* YYNNTS -- Number of nonterminals. */
--#define YYNNTS 129
--/* YYNRULES -- Number of rules. */
--#define YYNRULES 369
--/* YYNRULES -- Number of states. */
--#define YYNSTATES 803
--
--/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */
--#define YYUNDEFTOK 2
--#define YYMAXUTOK 385
--
--#define YYTRANSLATE(YYX) \
-- ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
--
--/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */
--static const yytype_uint8 yytranslate[] =
--{
-- 0, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 152, 2, 2, 2, 34, 21, 2,
-- 37, 149, 32, 30, 147, 31, 2, 33, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 16, 148,
-- 24, 6, 25, 15, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 150, 2, 151, 20, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 58, 19, 59, 153, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
-- 2, 2, 2, 2, 2, 2, 1, 2, 3, 4,
-- 5, 7, 8, 9, 10, 11, 12, 13, 14, 17,
-- 18, 22, 23, 26, 27, 28, 29, 35, 36, 38,
-- 39, 40, 41, 42, 43, 44, 45, 46, 47, 48,
-- 49, 50, 51, 52, 53, 54, 55, 56, 57, 60,
-- 61, 62, 63, 64, 65, 66, 67, 68, 69, 70,
-- 71, 72, 73, 74, 75, 76, 77, 78, 79, 80,
-- 81, 82, 83, 84, 85, 86, 87, 88, 89, 90,
-- 91, 92, 93, 94, 95, 96, 97, 98, 99, 100,
-- 101, 102, 103, 104, 105, 106, 107, 108, 109, 110,
-- 111, 112, 113, 114, 115, 116, 117, 118, 119, 120,
-- 121, 122, 123, 124, 125, 126, 127, 128, 129, 130,
-- 131, 132, 133, 134, 135, 136, 137, 138, 139, 140,
-- 141, 142, 143, 144, 145, 146
--};
--
--#if YYDEBUG
--/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
-- YYRHS. */
--static const yytype_uint16 yyprhs[] =
--{
-- 0, 0, 3, 6, 9, 12, 15, 18, 20, 21,
-- 26, 27, 30, 34, 35, 38, 43, 45, 47, 50,
-- 52, 57, 62, 66, 69, 74, 78, 83, 88, 93,
-- 98, 103, 106, 109, 112, 117, 122, 125, 128, 131,
-- 134, 135, 141, 144, 145, 149, 152, 153, 155, 159,
-- 161, 165, 166, 168, 172, 173, 176, 178, 181, 185,
-- 186, 189, 192, 193, 195, 197, 199, 201, 203, 205,
-- 207, 209, 211, 213, 218, 223, 228, 233, 242, 247,
-- 249, 251, 256, 257, 263, 268, 269, 275, 280, 285,
-- 289, 293, 300, 305, 307, 311, 314, 316, 320, 323,
-- 324, 330, 331, 339, 340, 347, 352, 355, 358, 359,
-- 364, 367, 368, 376, 378, 380, 382, 384, 390, 395,
-- 400, 405, 413, 421, 429, 437, 446, 451, 453, 457,
-- 462, 465, 467, 471, 473, 475, 478, 482, 487, 492,
-- 498, 500, 501, 507, 510, 512, 514, 516, 521, 523,
-- 528, 533, 534, 543, 544, 550, 553, 555, 556, 558,
-- 560, 562, 564, 566, 568, 570, 573, 574, 576, 578,
-- 580, 582, 584, 586, 588, 590, 592, 594, 598, 602,
-- 609, 616, 623, 625, 626, 631, 633, 634, 638, 640,
-- 641, 649, 650, 656, 660, 664, 665, 669, 671, 674,
-- 676, 679, 684, 689, 693, 697, 699, 704, 708, 709,
-- 711, 713, 714, 717, 721, 722, 725, 728, 732, 737,
-- 740, 743, 746, 750, 754, 758, 762, 766, 770, 774,
-- 778, 782, 786, 790, 794, 798, 802, 806, 810, 816,
-- 820, 824, 829, 831, 833, 838, 843, 848, 853, 858,
-- 863, 868, 875, 882, 889, 894, 901, 906, 908, 915,
-- 922, 929, 934, 939, 944, 948, 949, 954, 955, 960,
-- 961, 963, 964, 969, 970, 972, 974, 976, 977, 978,
-- 979, 980, 981, 982, 1003, 1004, 1005, 1006, 1007, 1008,
-- 1027, 1028, 1029, 1037, 1038, 1044, 1046, 1048, 1050, 1052,
-- 1054, 1058, 1059, 1062, 1066, 1069, 1076, 1087, 1090, 1092,
-- 1093, 1095, 1098, 1099, 1100, 1104, 1105, 1106, 1107, 1108,
-- 1120, 1125, 1126, 1129, 1130, 1131, 1138, 1140, 1141, 1145,
-- 1151, 1152, 1156, 1157, 1160, 1162, 1165, 1170, 1173, 1174,
-- 1177, 1178, 1184, 1186, 1189, 1194, 1200, 1207, 1209, 1212,
-- 1213, 1216, 1221, 1226, 1235, 1237, 1239, 1243, 1247, 1248,
-- 1258, 1259, 1267, 1269, 1273, 1275, 1279, 1281, 1285, 1286
--};
--
--/* YYRHS -- A `-1'-separated list of the rules' RHS. */
--static const yytype_int16 yyrhs[] =
--{
-- 155, 0, -1, 126, 171, -1, 127, 159, -1, 137,
-- 271, -1, 146, 266, -1, 128, 157, -1, 4, -1,
-- -1, 158, 4, 6, 226, -1, -1, 160, 161, -1,
-- 161, 162, 113, -1, -1, 108, 226, -1, 108, 226,
-- 147, 226, -1, 4, -1, 109, -1, 115, 164, -1,
-- 114, -1, 120, 4, 6, 226, -1, 120, 4, 147,
-- 226, -1, 120, 4, 226, -1, 119, 4, -1, 110,
-- 4, 147, 226, -1, 110, 4, 226, -1, 110, 4,
-- 6, 226, -1, 38, 4, 6, 226, -1, 38, 4,
-- 147, 226, -1, 101, 4, 6, 226, -1, 101, 4,
-- 147, 226, -1, 111, 166, -1, 112, 165, -1, 116,
-- 4, -1, 123, 4, 147, 4, -1, 123, 4, 147,
-- 3, -1, 122, 226, -1, 124, 3, -1, 129, 167,
-- -1, 130, 168, -1, -1, 66, 156, 163, 161, 36,
-- -1, 131, 4, -1, -1, 164, 147, 4, -1, 164,
-- 4, -1, -1, 4, -1, 165, 147, 4, -1, 4,
-- -1, 166, 147, 4, -1, -1, 4, -1, 167, 147,
-- 4, -1, -1, 169, 170, -1, 4, -1, 170, 4,
-- -1, 170, 147, 4, -1, -1, 172, 173, -1, 173,
-- 174, -1, -1, 206, -1, 181, -1, 258, -1, 217,
-- -1, 218, -1, 220, -1, 222, -1, 183, -1, 273,
-- -1, 148, -1, 76, 37, 4, 149, -1, 77, 37,
-- 156, 149, -1, 99, 37, 156, 149, -1, 61, 37,
-- 4, 149, -1, 61, 37, 4, 147, 4, 147, 4,
-- 149, -1, 63, 37, 4, 149, -1, 62, -1, 64,
-- -1, 97, 37, 177, 149, -1, -1, 98, 175, 37,
-- 177, 149, -1, 78, 37, 156, 149, -1, -1, 66,
-- 156, 176, 173, 36, -1, 92, 37, 223, 149, -1,
-- 130, 37, 168, 149, -1, 48, 49, 4, -1, 48,
-- 50, 4, -1, 68, 37, 4, 147, 4, 149, -1,
-- 69, 37, 4, 149, -1, 4, -1, 177, 147, 4,
-- -1, 177, 4, -1, 5, -1, 177, 147, 5, -1,
-- 177, 5, -1, -1, 107, 37, 178, 177, 149, -1,
-- -1, 177, 147, 107, 37, 179, 177, 149, -1, -1,
-- 177, 107, 37, 180, 177, 149, -1, 46, 58, 182,
-- 59, -1, 182, 233, -1, 182, 183, -1, -1, 79,
-- 37, 4, 149, -1, 204, 203, -1, -1, 117, 184,
-- 37, 226, 147, 4, 149, -1, 4, -1, 32, -1,
-- 15, -1, 185, -1, 144, 37, 189, 149, 185, -1,
-- 54, 37, 185, 149, -1, 55, 37, 185, 149, -1,
-- 56, 37, 185, 149, -1, 54, 37, 55, 37, 185,
-- 149, 149, -1, 54, 37, 54, 37, 185, 149, 149,
-- -1, 55, 37, 54, 37, 185, 149, 149, -1, 55,
-- 37, 55, 37, 185, 149, 149, -1, 54, 37, 144,
-- 37, 189, 149, 185, 149, -1, 57, 37, 185, 149,
-- -1, 4, -1, 187, 21, 4, -1, 142, 37, 187,
-- 149, -1, 189, 185, -1, 185, -1, 190, 205, 186,
-- -1, 186, -1, 4, -1, 188, 4, -1, 150, 190,
-- 151, -1, 188, 150, 190, 151, -1, 186, 37, 190,
-- 149, -1, 188, 186, 37, 190, 149, -1, 191, -1,
-- -1, 138, 37, 193, 191, 149, -1, 204, 203, -1,
-- 96, -1, 148, -1, 100, -1, 54, 37, 100, 149,
-- -1, 192, -1, 199, 37, 224, 149, -1, 94, 37,
-- 200, 149, -1, -1, 117, 195, 37, 226, 147, 4,
-- 149, 203, -1, -1, 66, 156, 196, 198, 36, -1,
-- 197, 194, -1, 194, -1, -1, 197, -1, 41, -1,
-- 42, -1, 43, -1, 44, -1, 45, -1, 224, -1,
-- 6, 200, -1, -1, 14, -1, 13, -1, 12, -1,
-- 11, -1, 10, -1, 9, -1, 8, -1, 7, -1,
-- 148, -1, 147, -1, 4, 6, 224, -1, 4, 202,
-- 224, -1, 104, 37, 4, 6, 224, 149, -1, 105,
-- 37, 4, 6, 224, 149, -1, 106, 37, 4, 6,
-- 224, 149, -1, 147, -1, -1, 67, 58, 207, 59,
-- -1, 208, -1, -1, 208, 205, 209, -1, 209, -1,
-- -1, 4, 210, 214, 16, 212, 205, 213, -1, -1,
-- 66, 156, 211, 207, 36, -1, 93, 6, 224, -1,
-- 95, 6, 224, -1, -1, 37, 215, 149, -1, 216,
-- -1, 215, 216, -1, 4, -1, 152, 4, -1, 87,
-- 37, 156, 149, -1, 88, 37, 219, 149, -1, 88,
-- 37, 149, -1, 219, 205, 156, -1, 156, -1, 89,
-- 37, 221, 149, -1, 221, 205, 156, -1, -1, 90,
-- -1, 91, -1, -1, 4, 223, -1, 4, 147, 223,
-- -1, -1, 225, 226, -1, 31, 226, -1, 37, 226,
-- 149, -1, 80, 37, 226, 149, -1, 152, 226, -1,
-- 30, 226, -1, 153, 226, -1, 226, 32, 226, -1,
-- 226, 33, 226, -1, 226, 34, 226, -1, 226, 30,
-- 226, -1, 226, 31, 226, -1, 226, 29, 226, -1,
-- 226, 28, 226, -1, 226, 23, 226, -1, 226, 22,
-- 226, -1, 226, 27, 226, -1, 226, 26, 226, -1,
-- 226, 24, 226, -1, 226, 25, 226, -1, 226, 21,
-- 226, -1, 226, 20, 226, -1, 226, 19, 226, -1,
-- 226, 15, 226, 16, 226, -1, 226, 18, 226, -1,
-- 226, 17, 226, -1, 75, 37, 4, 149, -1, 3,
-- -1, 60, -1, 82, 37, 4, 149, -1, 81, 37,
-- 4, 149, -1, 83, 37, 4, 149, -1, 84, 37,
-- 4, 149, -1, 145, 37, 4, 149, -1, 111, 37,
-- 226, 149, -1, 38, 37, 226, 149, -1, 38, 37,
-- 226, 147, 226, 149, -1, 51, 37, 226, 147, 226,
-- 149, -1, 52, 37, 226, 147, 226, 149, -1, 53,
-- 37, 226, 149, -1, 65, 37, 4, 147, 226, 149,
-- -1, 39, 37, 226, 149, -1, 4, -1, 85, 37,
-- 226, 147, 226, 149, -1, 86, 37, 226, 147, 226,
-- 149, -1, 117, 37, 226, 147, 4, 149, -1, 93,
-- 37, 4, 149, -1, 95, 37, 4, 149, -1, 118,
-- 37, 226, 149, -1, 102, 25, 4, -1, -1, 102,
-- 37, 226, 149, -1, -1, 38, 37, 226, 149, -1,
-- -1, 143, -1, -1, 103, 37, 226, 149, -1, -1,
-- 139, -1, 140, -1, 141, -1, -1, -1, -1, -1,
-- -1, -1, 4, 234, 249, 228, 229, 230, 231, 235,
-- 232, 58, 236, 198, 59, 237, 252, 227, 253, 201,
-- 238, 205, -1, -1, -1, -1, -1, -1, 74, 239,
-- 250, 251, 228, 231, 240, 58, 241, 254, 59, 242,
-- 252, 227, 253, 201, 243, 205, -1, -1, -1, 98,
-- 244, 249, 245, 58, 182, 59, -1, -1, 66, 156,
-- 246, 182, 36, -1, 70, -1, 71, -1, 72, -1,
-- 73, -1, 74, -1, 37, 247, 149, -1, -1, 37,
-- 149, -1, 226, 248, 16, -1, 248, 16, -1, 40,
-- 37, 226, 149, 248, 16, -1, 40, 37, 226, 149,
-- 39, 37, 226, 149, 248, 16, -1, 226, 16, -1,
-- 16, -1, -1, 92, -1, 25, 4, -1, -1, -1,
-- 253, 16, 4, -1, -1, -1, -1, -1, 254, 4,
-- 255, 58, 198, 59, 256, 253, 201, 257, 205, -1,
-- 47, 58, 259, 59, -1, -1, 259, 260, -1, -1,
-- -1, 4, 261, 263, 264, 262, 148, -1, 226, -1,
-- -1, 4, 265, 264, -1, 102, 37, 226, 149, 264,
-- -1, -1, 37, 226, 149, -1, -1, 267, 268, -1,
-- 269, -1, 268, 269, -1, 58, 270, 59, 148, -1,
-- 279, 148, -1, -1, 272, 275, -1, -1, 274, 136,
-- 58, 275, 59, -1, 276, -1, 275, 276, -1, 58,
-- 278, 59, 148, -1, 132, 58, 278, 59, 148, -1,
-- 132, 58, 278, 59, 277, 148, -1, 132, -1, 277,
-- 132, -1, -1, 279, 148, -1, 134, 16, 279, 148,
-- -1, 135, 16, 279, 148, -1, 134, 16, 279, 148,
-- 135, 16, 279, 148, -1, 133, -1, 4, -1, 279,
-- 148, 133, -1, 279, 148, 4, -1, -1, 279, 148,
-- 130, 4, 58, 280, 279, 282, 59, -1, -1, 130,
-- 4, 58, 281, 279, 282, 59, -1, 134, -1, 279,
-- 148, 134, -1, 135, -1, 279, 148, 135, -1, 130,
-- -1, 279, 148, 130, -1, -1, 148, -1
--};
--
--/* YYRLINE[YYN] -- source line where rule number YYN was defined. */
--static const yytype_uint16 yyrline[] =
--{
-- 0, 166, 166, 167, 168, 169, 170, 174, 178, 178,
-- 188, 188, 201, 202, 206, 207, 208, 211, 214, 215,
-- 216, 218, 220, 222, 224, 226, 228, 230, 232, 234,
-- 236, 238, 239, 240, 242, 244, 246, 248, 250, 251,
-- 253, 252, 256, 258, 262, 263, 264, 268, 270, 274,
-- 276, 281, 282, 283, 288, 288, 293, 295, 297, 302,
-- 302, 308, 309, 314, 315, 316, 317, 318, 319, 320,
-- 321, 322, 323, 324, 326, 328, 330, 333, 335, 337,
-- 339, 341, 343, 342, 346, 349, 348, 352, 356, 357,
-- 359, 361, 363, 368, 371, 374, 377, 380, 383, 387,
-- 386, 392, 391, 397, 396, 404, 408, 409, 410, 414,
-- 416, 417, 417, 425, 429, 433, 440, 447, 454, 461,
-- 468, 475, 482, 489, 496, 503, 510, 519, 537, 558,
-- 571, 580, 591, 600, 611, 620, 629, 633, 642, 646,
-- 654, 656, 655, 662, 663, 667, 668, 673, 678, 679,
-- 684, 688, 688, 692, 691, 698, 699, 702, 704, 708,
-- 710, 712, 714, 716, 721, 728, 730, 734, 736, 738,
-- 740, 742, 744, 746, 748, 753, 753, 758, 762, 770,
-- 774, 778, 786, 786, 790, 793, 793, 796, 797, 802,
-- 801, 807, 806, 813, 821, 829, 830, 834, 835, 839,
-- 841, 846, 851, 852, 857, 859, 865, 867, 869, 873,
-- 875, 881, 884, 893, 904, 904, 910, 912, 914, 916,
-- 918, 920, 923, 925, 927, 929, 931, 933, 935, 937,
-- 939, 941, 943, 945, 947, 949, 951, 953, 955, 957,
-- 959, 961, 963, 965, 968, 970, 972, 974, 976, 978,
-- 980, 982, 984, 986, 988, 990, 999, 1001, 1003, 1005,
-- 1007, 1009, 1011, 1013, 1019, 1020, 1024, 1025, 1029, 1030,
-- 1034, 1035, 1039, 1040, 1044, 1045, 1046, 1047, 1050, 1055,
-- 1058, 1064, 1066, 1050, 1073, 1075, 1077, 1082, 1084, 1072,
-- 1094, 1096, 1094, 1102, 1101, 1108, 1109, 1110, 1111, 1112,
-- 1116, 1117, 1118, 1122, 1123, 1128, 1129, 1134, 1135, 1140,
-- 1141, 1146, 1148, 1153, 1156, 1169, 1173, 1178, 1180, 1171,
-- 1188, 1191, 1193, 1197, 1198, 1197, 1207, 1252, 1255, 1268,
-- 1277, 1280, 1287, 1287, 1299, 1300, 1304, 1308, 1317, 1317,
-- 1331, 1331, 1341, 1342, 1346, 1350, 1354, 1361, 1365, 1373,
-- 1376, 1380, 1384, 1388, 1395, 1399, 1403, 1407, 1412, 1411,
-- 1425, 1424, 1434, 1438, 1442, 1446, 1450, 1454, 1460, 1462
--};
--#endif
--
--#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE
--/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
-- First, the terminals, then, starting at YYNTOKENS, nonterminals. */
--static const char *const yytname[] =
--{
-- "$end", "error", "$undefined", "INT", "NAME", "LNAME", "'='", "OREQ",
-- "ANDEQ", "RSHIFTEQ", "LSHIFTEQ", "DIVEQ", "MULTEQ", "MINUSEQ", "PLUSEQ",
-- "'?'", "':'", "OROR", "ANDAND", "'|'", "'^'", "'&'", "NE", "EQ", "'<'",
-- "'>'", "GE", "LE", "RSHIFT", "LSHIFT", "'+'", "'-'", "'*'", "'/'", "'%'",
-- "UNARY", "END", "'('", "ALIGN_K", "BLOCK", "BIND", "QUAD", "SQUAD",
-- "LONG", "SHORT", "BYTE", "SECTIONS", "PHDRS", "INSERT_K", "AFTER",
-- "BEFORE", "DATA_SEGMENT_ALIGN", "DATA_SEGMENT_RELRO_END",
-- "DATA_SEGMENT_END", "SORT_BY_NAME", "SORT_BY_ALIGNMENT", "SORT_NONE",
-- "SORT_BY_INIT_PRIORITY", "'{'", "'}'", "SIZEOF_HEADERS", "OUTPUT_FORMAT",
-- "FORCE_COMMON_ALLOCATION", "OUTPUT_ARCH", "INHIBIT_COMMON_ALLOCATION",
-- "SEGMENT_START", "INCLUDE", "MEMORY", "REGION_ALIAS", "LD_FEATURE",
-- "NOLOAD", "DSECT", "COPY", "INFO", "OVERLAY", "DEFINED", "TARGET_K",
-- "SEARCH_DIR", "MAP", "ENTRY", "NEXT", "SIZEOF", "ALIGNOF", "ADDR",
-- "LOADADDR", "MAX_K", "MIN_K", "STARTUP", "HLL", "SYSLIB", "FLOAT",
-- "NOFLOAT", "NOCROSSREFS", "ORIGIN", "FILL", "LENGTH",
-- "CREATE_OBJECT_SYMBOLS", "INPUT", "GROUP", "OUTPUT", "CONSTRUCTORS",
-- "ALIGNMOD", "AT", "SUBALIGN", "HIDDEN", "PROVIDE", "PROVIDE_HIDDEN",
-- "AS_NEEDED", "CHIP", "LIST", "SECT", "ABSOLUTE", "LOAD", "NEWLINE",
-- "ENDWORD", "ORDER", "NAMEWORD", "ASSERT_K", "LOG2CEIL", "FORMAT",
-- "PUBLIC", "DEFSYMEND", "BASE", "ALIAS", "TRUNCATE", "REL",
-- "INPUT_SCRIPT", "INPUT_MRI_SCRIPT", "INPUT_DEFSYM", "CASE", "EXTERN",
-- "START", "VERS_TAG", "VERS_IDENTIFIER", "GLOBAL", "LOCAL", "VERSIONK",
-- "INPUT_VERSION_SCRIPT", "KEEP", "ONLY_IF_RO", "ONLY_IF_RW", "SPECIAL",
-- "INPUT_SECTION_FLAGS", "ALIGN_WITH_INPUT", "EXCLUDE_FILE", "CONSTANT",
-- "INPUT_DYNAMIC_LIST", "','", "';'", "')'", "'['", "']'", "'!'", "'~'",
-- "$accept", "file", "filename", "defsym_expr", "@1", "mri_script_file",
-- "@2", "mri_script_lines", "mri_script_command", "@3", "ordernamelist",
-- "mri_load_name_list", "mri_abs_name_list", "casesymlist",
-- "extern_name_list", "@4", "extern_name_list_body", "script_file", "@5",
-- "ifile_list", "ifile_p1", "@6", "@7", "input_list", "@8", "@9", "@10",
-- "sections", "sec_or_group_p1", "statement_anywhere", "@11",
-- "wildcard_name", "wildcard_spec", "sect_flag_list", "sect_flags",
-- "exclude_name_list", "file_NAME_list", "input_section_spec_no_keep",
-- "input_section_spec", "@12", "statement", "@13", "@14", "statement_list",
-- "statement_list_opt", "length", "fill_exp", "fill_opt", "assign_op",
-- "end", "assignment", "opt_comma", "memory", "memory_spec_list_opt",
-- "memory_spec_list", "memory_spec", "@15", "@16", "origin_spec",
-- "length_spec", "attributes_opt", "attributes_list", "attributes_string",
-- "startup", "high_level_library", "high_level_library_NAME_list",
-- "low_level_library", "low_level_library_NAME_list",
-- "floating_point_support", "nocrossref_list", "mustbe_exp", "@17", "exp",
-- "memspec_at_opt", "opt_at", "opt_align", "opt_align_with_input",
-- "opt_subalign", "sect_constraint", "section", "@18", "@19", "@20", "@21",
-- "@22", "@23", "@24", "@25", "@26", "@27", "@28", "@29", "@30", "type",
-- "atype", "opt_exp_with_type", "opt_exp_without_type", "opt_nocrossrefs",
-- "memspec_opt", "phdr_opt", "overlay_section", "@31", "@32", "@33",
-- "phdrs", "phdr_list", "phdr", "@34", "@35", "phdr_type",
-- "phdr_qualifiers", "phdr_val", "dynamic_list_file", "@36",
-- "dynamic_list_nodes", "dynamic_list_node", "dynamic_list_tag",
-- "version_script_file", "@37", "version", "@38", "vers_nodes",
-- "vers_node", "verdep", "vers_tag", "vers_defns", "@39", "@40",
-- "opt_semicolon", 0
--};
--#endif
--
--# ifdef YYPRINT
--/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to
-- token YYLEX-NUM. */
--static const yytype_uint16 yytoknum[] =
--{
-- 0, 256, 257, 258, 259, 260, 61, 261, 262, 263,
-- 264, 265, 266, 267, 268, 63, 58, 269, 270, 124,
-- 94, 38, 271, 272, 60, 62, 273, 274, 275, 276,
-- 43, 45, 42, 47, 37, 277, 278, 40, 279, 280,
-- 281, 282, 283, 284, 285, 286, 287, 288, 289, 290,
-- 291, 292, 293, 294, 295, 296, 297, 298, 123, 125,
-- 299, 300, 301, 302, 303, 304, 305, 306, 307, 308,
-- 309, 310, 311, 312, 313, 314, 315, 316, 317, 318,
-- 319, 320, 321, 322, 323, 324, 325, 326, 327, 328,
-- 329, 330, 331, 332, 333, 334, 335, 336, 337, 338,
-- 339, 340, 341, 342, 343, 344, 345, 346, 347, 348,
-- 349, 350, 351, 352, 353, 354, 355, 356, 357, 358,
-- 359, 360, 361, 362, 363, 364, 365, 366, 367, 368,
-- 369, 370, 371, 372, 373, 374, 375, 376, 377, 378,
-- 379, 380, 381, 382, 383, 384, 385, 44, 59, 41,
-- 91, 93, 33, 126
--};
--# endif
--
--/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */
--static const yytype_uint16 yyr1[] =
--{
-- 0, 154, 155, 155, 155, 155, 155, 156, 158, 157,
-- 160, 159, 161, 161, 162, 162, 162, 162, 162, 162,
-- 162, 162, 162, 162, 162, 162, 162, 162, 162, 162,
-- 162, 162, 162, 162, 162, 162, 162, 162, 162, 162,
-- 163, 162, 162, 162, 164, 164, 164, 165, 165, 166,
-- 166, 167, 167, 167, 169, 168, 170, 170, 170, 172,
-- 171, 173, 173, 174, 174, 174, 174, 174, 174, 174,
-- 174, 174, 174, 174, 174, 174, 174, 174, 174, 174,
-- 174, 174, 175, 174, 174, 176, 174, 174, 174, 174,
-- 174, 174, 174, 177, 177, 177, 177, 177, 177, 178,
-- 177, 179, 177, 180, 177, 181, 182, 182, 182, 183,
-- 183, 184, 183, 185, 185, 185, 186, 186, 186, 186,
-- 186, 186, 186, 186, 186, 186, 186, 187, 187, 188,
-- 189, 189, 190, 190, 191, 191, 191, 191, 191, 191,
-- 192, 193, 192, 194, 194, 194, 194, 194, 194, 194,
-- 194, 195, 194, 196, 194, 197, 197, 198, 198, 199,
-- 199, 199, 199, 199, 200, 201, 201, 202, 202, 202,
-- 202, 202, 202, 202, 202, 203, 203, 204, 204, 204,
-- 204, 204, 205, 205, 206, 207, 207, 208, 208, 210,
-- 209, 211, 209, 212, 213, 214, 214, 215, 215, 216,
-- 216, 217, 218, 218, 219, 219, 220, 221, 221, 222,
-- 222, 223, 223, 223, 225, 224, 226, 226, 226, 226,
-- 226, 226, 226, 226, 226, 226, 226, 226, 226, 226,
-- 226, 226, 226, 226, 226, 226, 226, 226, 226, 226,
-- 226, 226, 226, 226, 226, 226, 226, 226, 226, 226,
-- 226, 226, 226, 226, 226, 226, 226, 226, 226, 226,
-- 226, 226, 226, 226, 227, 227, 228, 228, 229, 229,
-- 230, 230, 231, 231, 232, 232, 232, 232, 234, 235,
-- 236, 237, 238, 233, 239, 240, 241, 242, 243, 233,
-- 244, 245, 233, 246, 233, 247, 247, 247, 247, 247,
-- 248, 248, 248, 249, 249, 249, 249, 250, 250, 251,
-- 251, 252, 252, 253, 253, 254, 255, 256, 257, 254,
-- 258, 259, 259, 261, 262, 260, 263, 264, 264, 264,
-- 265, 265, 267, 266, 268, 268, 269, 270, 272, 271,
-- 274, 273, 275, 275, 276, 276, 276, 277, 277, 278,
-- 278, 278, 278, 278, 279, 279, 279, 279, 280, 279,
-- 281, 279, 279, 279, 279, 279, 279, 279, 282, 282
--};
--
--/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */
--static const yytype_uint8 yyr2[] =
--{
-- 0, 2, 2, 2, 2, 2, 2, 1, 0, 4,
-- 0, 2, 3, 0, 2, 4, 1, 1, 2, 1,
-- 4, 4, 3, 2, 4, 3, 4, 4, 4, 4,
-- 4, 2, 2, 2, 4, 4, 2, 2, 2, 2,
-- 0, 5, 2, 0, 3, 2, 0, 1, 3, 1,
-- 3, 0, 1, 3, 0, 2, 1, 2, 3, 0,
-- 2, 2, 0, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 4, 4, 4, 4, 8, 4, 1,
-- 1, 4, 0, 5, 4, 0, 5, 4, 4, 3,
-- 3, 6, 4, 1, 3, 2, 1, 3, 2, 0,
-- 5, 0, 7, 0, 6, 4, 2, 2, 0, 4,
-- 2, 0, 7, 1, 1, 1, 1, 5, 4, 4,
-- 4, 7, 7, 7, 7, 8, 4, 1, 3, 4,
-- 2, 1, 3, 1, 1, 2, 3, 4, 4, 5,
-- 1, 0, 5, 2, 1, 1, 1, 4, 1, 4,
-- 4, 0, 8, 0, 5, 2, 1, 0, 1, 1,
-- 1, 1, 1, 1, 1, 2, 0, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 3, 3, 6,
-- 6, 6, 1, 0, 4, 1, 0, 3, 1, 0,
-- 7, 0, 5, 3, 3, 0, 3, 1, 2, 1,
-- 2, 4, 4, 3, 3, 1, 4, 3, 0, 1,
-- 1, 0, 2, 3, 0, 2, 2, 3, 4, 2,
-- 2, 2, 3, 3, 3, 3, 3, 3, 3, 3,
-- 3, 3, 3, 3, 3, 3, 3, 3, 5, 3,
-- 3, 4, 1, 1, 4, 4, 4, 4, 4, 4,
-- 4, 6, 6, 6, 4, 6, 4, 1, 6, 6,
-- 6, 4, 4, 4, 3, 0, 4, 0, 4, 0,
-- 1, 0, 4, 0, 1, 1, 1, 0, 0, 0,
-- 0, 0, 0, 20, 0, 0, 0, 0, 0, 18,
-- 0, 0, 7, 0, 5, 1, 1, 1, 1, 1,
-- 3, 0, 2, 3, 2, 6, 10, 2, 1, 0,
-- 1, 2, 0, 0, 3, 0, 0, 0, 0, 11,
-- 4, 0, 2, 0, 0, 6, 1, 0, 3, 5,
-- 0, 3, 0, 2, 1, 2, 4, 2, 0, 2,
-- 0, 5, 1, 2, 4, 5, 6, 1, 2, 0,
-- 2, 4, 4, 8, 1, 1, 3, 3, 0, 9,
-- 0, 7, 1, 3, 1, 3, 1, 3, 0, 1
--};
--
--/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
-- STATE-NUM when YYTABLE doesn't specify something else to do. Zero
-- means the default is an error. */
--static const yytype_uint16 yydefact[] =
--{
-- 0, 59, 10, 8, 338, 332, 0, 2, 62, 3,
-- 13, 6, 0, 4, 0, 5, 0, 1, 60, 11,
-- 0, 349, 0, 339, 342, 0, 333, 334, 0, 0,
-- 0, 0, 0, 79, 0, 80, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 209, 210, 0,
-- 0, 82, 0, 0, 0, 0, 111, 0, 72, 61,
-- 64, 70, 0, 63, 66, 67, 68, 69, 65, 71,
-- 0, 16, 0, 0, 0, 0, 17, 0, 0, 0,
-- 19, 46, 0, 0, 0, 0, 0, 0, 51, 54,
-- 0, 0, 0, 355, 366, 354, 362, 364, 0, 0,
-- 349, 343, 362, 364, 0, 0, 335, 214, 174, 173,
-- 172, 171, 170, 169, 168, 167, 214, 108, 321, 0,
-- 0, 0, 0, 7, 85, 186, 0, 0, 0, 0,
-- 0, 0, 0, 0, 208, 211, 0, 0, 0, 0,
-- 0, 0, 0, 54, 176, 175, 110, 0, 0, 40,
-- 0, 242, 257, 0, 0, 0, 0, 0, 0, 0,
-- 0, 243, 0, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 14,
-- 0, 49, 31, 47, 32, 18, 33, 23, 0, 36,
-- 0, 37, 52, 38, 39, 0, 42, 12, 9, 0,
-- 0, 0, 0, 350, 0, 0, 337, 177, 0, 178,
-- 0, 0, 89, 90, 0, 0, 62, 189, 0, 0,
-- 183, 188, 0, 0, 0, 0, 0, 0, 0, 203,
-- 205, 183, 183, 211, 0, 93, 96, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 13,
-- 0, 0, 220, 216, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 219, 221, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 25,
-- 0, 0, 45, 0, 0, 0, 22, 0, 0, 56,
-- 55, 360, 0, 0, 344, 357, 367, 356, 363, 365,
-- 0, 336, 215, 278, 105, 0, 284, 290, 107, 106,
-- 323, 320, 322, 0, 76, 78, 340, 195, 191, 184,
-- 182, 0, 0, 92, 73, 74, 84, 109, 201, 202,
-- 0, 206, 0, 211, 212, 87, 99, 95, 98, 0,
-- 0, 81, 0, 75, 214, 214, 214, 0, 88, 0,
-- 27, 28, 43, 29, 30, 217, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 240, 239, 237,
-- 236, 235, 230, 229, 233, 234, 232, 231, 228, 227,
-- 225, 226, 222, 223, 224, 15, 26, 24, 50, 48,
-- 44, 20, 21, 35, 34, 53, 57, 0, 0, 351,
-- 352, 0, 347, 345, 0, 301, 293, 0, 301, 0,
-- 0, 86, 0, 0, 186, 187, 0, 204, 207, 213,
-- 0, 103, 94, 97, 0, 83, 0, 0, 0, 0,
-- 341, 41, 0, 250, 256, 0, 0, 254, 0, 241,
-- 218, 245, 244, 246, 247, 0, 0, 261, 262, 249,
-- 0, 263, 248, 0, 58, 368, 365, 358, 348, 346,
-- 0, 0, 301, 0, 267, 108, 308, 0, 309, 291,
-- 326, 327, 0, 199, 0, 0, 197, 0, 0, 91,
-- 0, 0, 101, 179, 180, 181, 0, 0, 0, 0,
-- 0, 0, 0, 0, 238, 369, 0, 0, 0, 295,
-- 296, 297, 298, 299, 302, 0, 0, 0, 0, 304,
-- 0, 269, 0, 307, 310, 267, 0, 330, 0, 324,
-- 0, 200, 196, 198, 0, 183, 192, 100, 0, 0,
-- 112, 251, 252, 253, 255, 258, 259, 260, 361, 0,
-- 368, 300, 0, 303, 0, 0, 271, 294, 273, 108,
-- 0, 327, 0, 0, 77, 214, 0, 104, 0, 353,
-- 0, 301, 0, 0, 270, 273, 0, 285, 0, 0,
-- 328, 0, 325, 193, 0, 190, 102, 359, 0, 0,
-- 266, 0, 279, 0, 0, 292, 331, 327, 214, 0,
-- 305, 268, 277, 0, 286, 329, 194, 0, 274, 275,
-- 276, 0, 272, 315, 301, 280, 0, 0, 157, 316,
-- 287, 306, 134, 115, 114, 159, 160, 161, 162, 163,
-- 0, 0, 0, 0, 0, 0, 144, 146, 151, 0,
-- 0, 0, 145, 0, 116, 0, 0, 140, 148, 156,
-- 158, 0, 0, 0, 0, 312, 0, 0, 0, 0,
-- 153, 214, 0, 141, 0, 0, 113, 0, 133, 183,
-- 0, 135, 0, 0, 155, 281, 214, 143, 157, 0,
-- 265, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 0, 157, 0, 164, 0, 0, 127, 0, 131, 0,
-- 0, 136, 0, 183, 183, 0, 312, 0, 0, 311,
-- 0, 313, 0, 0, 147, 0, 118, 0, 0, 119,
-- 120, 126, 0, 150, 0, 113, 0, 0, 129, 0,
-- 130, 132, 138, 137, 183, 265, 149, 317, 0, 166,
-- 0, 0, 0, 0, 0, 154, 0, 142, 128, 117,
-- 139, 313, 313, 264, 214, 0, 288, 0, 0, 0,
-- 0, 0, 0, 166, 166, 165, 314, 183, 122, 121,
-- 0, 123, 124, 0, 282, 318, 289, 125, 152, 183,
-- 183, 283, 319
--};
--
--/* YYDEFGOTO[NTERM-NUM]. */
--static const yytype_int16 yydefgoto[] =
--{
-- -1, 6, 124, 11, 12, 9, 10, 19, 91, 249,
-- 185, 184, 182, 193, 194, 195, 310, 7, 8, 18,
-- 59, 137, 216, 238, 450, 559, 511, 60, 210, 328,
-- 142, 664, 665, 717, 666, 719, 689, 667, 668, 715,
-- 669, 682, 711, 670, 671, 672, 712, 776, 116, 146,
-- 62, 722, 63, 219, 220, 221, 337, 444, 555, 605,
-- 443, 505, 506, 64, 65, 231, 66, 232, 67, 234,
-- 713, 208, 254, 731, 541, 576, 595, 597, 631, 329,
-- 435, 622, 638, 726, 799, 437, 614, 633, 675, 787,
-- 438, 546, 495, 535, 493, 494, 498, 545, 700, 759,
-- 636, 674, 772, 800, 68, 211, 332, 439, 583, 501,
-- 549, 581, 15, 16, 26, 27, 104, 13, 14, 69,
-- 70, 23, 24, 434, 98, 99, 528, 428, 526
--};
--
--/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
-- STATE-NUM. */
--#define YYPACT_NINF -647
--static const yytype_int16 yypact[] =
--{
-- -46, -647, -647, -647, -647, -647, 74, -647, -647, -647,
-- -647, -647, 64, -647, -3, -647, 65, -647, 957, 1755,
-- 124, 5, 166, -3, -647, 114, 65, -647, 682, 169,
-- 179, 192, 105, -647, 213, -647, 259, 221, 246, 248,
-- 256, 258, 262, 263, 265, 266, 267, -647, -647, 268,
-- 276, -647, 291, 293, 295, 296, -647, 298, -647, -647,
-- -647, -647, 110, -647, -647, -647, -647, -647, -647, -647,
-- 178, -647, 332, 259, 334, 781, -647, 336, 337, 338,
-- -647, -647, 341, 342, 344, 781, 346, 348, 351, -647,
-- 352, 245, 781, -647, 355, -647, 345, 353, 313, 226,
-- 5, -647, -647, -647, 318, 230, -647, -647, -647, -647,
-- -647, -647, -647, -647, -647, -647, -647, -647, -647, 375,
-- 376, 388, 390, -647, -647, 49, 395, 398, 405, 259,
-- 259, 409, 259, 4, -647, 410, 34, 378, 259, 413,
-- 417, 418, 386, -647, -647, -647, -647, 366, 31, -647,
-- 38, -647, -647, 781, 781, 781, 393, 394, 404, 407,
-- 408, -647, 419, 420, 422, 426, 427, 428, 430, 431,
-- 432, 433, 440, 444, 445, 446, 449, 781, 781, 1564,
-- 367, -647, 282, -647, 299, 20, -647, -647, 525, 1936,
-- 307, -647, -647, 340, -647, 439, -647, -647, 1936, 421,
-- 114, 114, 343, 121, 434, 354, 121, -647, 781, -647,
-- 278, 55, -647, -647, -53, 357, -647, -647, 259, 435,
-- 85, -647, 363, 362, 368, 372, 373, 374, 377, -647,
-- -647, -4, 96, 24, 381, -647, -647, 452, 17, 34,
-- 383, 486, 494, 495, 781, 387, -3, 781, 781, -647,
-- 781, 781, -647, -647, 965, 781, 781, 781, 781, 781,
-- 500, 520, 781, 521, 533, 535, 536, 781, 781, 537,
-- 538, 781, 781, 781, 539, -647, -647, 781, 781, 781,
-- 781, 781, 781, 781, 781, 781, 781, 781, 781, 781,
-- 781, 781, 781, 781, 781, 781, 781, 781, 781, 1936,
-- 541, 543, -647, 544, 781, 781, 1936, 273, 545, -647,
-- 27, -647, 402, 403, -647, -647, 548, -647, -647, -647,
-- -47, -647, 1936, 682, -647, 259, -647, -647, -647, -647,
-- -647, -647, -647, 549, -647, -647, 1033, 517, -647, -647,
-- -647, 49, 553, -647, -647, -647, -647, -647, -647, -647,
-- 259, -647, 259, 410, -647, -647, -647, -647, -647, 522,
-- 88, -647, 21, -647, -647, -647, -647, 1584, -647, -16,
-- 1936, 1936, 1779, 1936, 1936, -647, 921, 1165, 1604, 1624,
-- 1185, 411, 412, 1205, 416, 423, 424, 425, 1644, 1664,
-- 437, 438, 1225, 1695, 1245, 443, 1896, 1776, 1145, 1951,
-- 1965, 1278, 856, 856, 406, 406, 406, 406, 442, 442,
-- 167, 167, -647, -647, -647, 1936, 1936, 1936, -647, -647,
-- -647, 1936, 1936, -647, -647, -647, -647, 556, 114, 277,
-- 121, 508, -647, -647, -37, 622, -647, 697, 622, 781,
-- 441, -647, 3, 551, 49, -647, 447, -647, -647, -647,
-- 34, -647, -647, -647, 531, -647, 448, 450, 453, 565,
-- -647, -647, 781, -647, -647, 781, 781, -647, 781, -647,
-- -647, -647, -647, -647, -647, 781, 781, -647, -647, -647,
-- 566, -647, -647, 781, -647, 455, 559, -647, -647, -647,
-- 236, 542, 1807, 564, 479, -647, -647, 1916, 497, -647,
-- 1936, 29, 589, -647, 590, 2, -647, 502, 562, -647,
-- 30, 34, -647, -647, -647, -647, 463, 1265, 1298, 1318,
-- 1338, 1358, 1378, 464, 1936, 121, 555, 114, 114, -647,
-- -647, -647, -647, -647, -647, 466, 781, -22, 585, -647,
-- 567, 578, 392, -647, -647, 479, 561, 580, 584, -647,
-- 473, -647, -647, -647, 617, 477, -647, -647, 79, 34,
-- -647, -647, -647, -647, -647, -647, -647, -647, -647, 489,
-- 455, -647, 1398, -647, 781, 601, 498, -647, 546, -647,
-- 781, 29, 781, 492, -647, -647, 550, -647, 84, 121,
-- 587, 225, 1431, 781, -647, 546, 607, -647, 429, 1451,
-- -647, 1471, -647, -647, 641, -647, -647, -647, 611, 634,
-- -647, 1491, -647, 781, 593, -647, -647, 29, -647, 781,
-- -647, -647, 95, 1511, -647, -647, -647, 1531, -647, -647,
-- -647, 596, -647, -647, 618, -647, 63, 640, 864, -647,
-- -647, -647, 621, -647, -647, -647, -647, -647, -647, -647,
-- 620, 626, 627, 628, 259, 629, -647, -647, -647, 630,
-- 631, 632, -647, 311, -647, 639, 15, -647, -647, -647,
-- 864, 612, 642, 110, 623, 655, 94, 371, 72, 72,
-- -647, -647, 646, -647, 680, 72, -647, 648, -647, -39,
-- 311, 649, 311, 661, -647, -647, -647, -647, 864, 695,
-- 608, 672, 674, 563, 677, 569, 679, 683, 570, 572,
-- 573, 864, 574, -647, 781, 8, -647, 11, -647, 14,
-- 102, -647, 311, 122, -15, 311, 655, 575, 666, -647,
-- 701, -647, 72, 72, -647, 72, -647, 72, 72, -647,
-- -647, -647, 693, -647, 1715, 581, 582, 728, -647, 72,
-- -647, -647, -647, -647, 123, 608, -647, -647, 733, 91,
-- 592, 594, 41, 602, 603, -647, 734, -647, -647, -647,
-- -647, -647, -647, -647, -647, 738, -647, 605, 606, 72,
-- 609, 610, 614, 91, 91, -647, -647, 477, -647, -647,
-- 615, -647, -647, 110, -647, -647, -647, -647, -647, 477,
-- 477, -647, -647
--};
--
--/* YYPGOTO[NTERM-NUM]. */
--static const yytype_int16 yypgoto[] =
--{
-- -647, -647, -72, -647, -647, -647, -647, 507, -647, -647,
-- -647, -647, -647, -647, 625, -647, -647, -647, -647, 554,
-- -647, -647, -647, -225, -647, -647, -647, -647, -459, -13,
-- -647, 68, -398, -647, -647, 25, -615, 46, -647, -647,
-- 99, -647, -647, -647, -612, -647, -9, -493, -647, -646,
-- -386, -216, -647, 322, -647, 454, -647, -647, -647, -647,
-- -647, -647, 271, -647, -647, -647, -647, -647, -647, -192,
-- -105, -647, -75, 16, 228, -647, -647, 191, -647, -647,
-- -647, -647, -647, -647, -647, -647, -647, -647, -647, -647,
-- -647, -647, -647, -647, -472, 356, -647, -647, 67, -474,
-- -647, -647, -647, -647, -647, -647, -647, -647, -647, -647,
-- -527, -647, -647, -647, -647, 763, -647, -647, -647, -647,
-- -647, 552, -20, -647, 691, -12, -647, -647, 227
--};
--
--/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If
-- positive, shift that token. If negative, reduce the rule which
-- number is the opposite. If zero, do what YYDEFACT says.
-- If YYTABLE_NINF, syntax error. */
--#define YYTABLE_NINF -341
--static const yytype_int16 yytable[] =
--{
-- 179, 149, 207, 101, 341, 61, 503, 503, 123, 93,
-- 189, 209, 745, 105, 362, 350, 352, 198, 686, 691,
-- 538, 357, 358, 643, 302, 357, 358, 697, 233, 643,
-- 643, 426, 747, 547, 357, 358, 542, 247, 235, 236,
-- 644, 354, 21, 460, 250, 686, 644, 644, 529, 530,
-- 531, 532, 533, 217, 600, 21, 643, 225, 226, 330,
-- 228, 230, 687, 651, 652, 653, 240, 639, 20, 687,
-- 651, 652, 653, 644, 17, 723, 686, 724, 252, 253,
-- 1, 2, 3, 357, 358, 432, 728, 643, 357, 358,
-- 625, 4, 452, 453, 333, 488, 334, 774, 686, 742,
-- 5, 433, 275, 276, 644, 299, 686, 775, 340, 643,
-- 754, 489, 721, 306, 331, 218, 22, 643, 93, 609,
-- 598, -185, 640, 25, 359, 315, 644, 534, 359, 22,
-- 92, 548, 340, 322, 644, 94, 753, 359, 95, 96,
-- 97, 237, 121, 340, -185, 349, 338, 798, 701, 702,
-- 660, 552, 661, 229, 504, 504, 701, 702, 663, 661,
-- 748, 449, 637, 749, 360, 692, 361, 303, 360, 367,
-- 455, 353, 370, 371, 427, 373, 374, 360, 248, 557,
-- 376, 377, 378, 379, 380, 251, 359, 383, 312, 313,
-- 779, 359, 388, 389, 703, 454, 392, 393, 394, 293,
-- 294, 295, 396, 397, 398, 399, 400, 401, 402, 403,
-- 404, 405, 406, 407, 408, 409, 410, 411, 412, 413,
-- 414, 415, 416, 417, 100, 510, 360, 117, 587, 421,
-- 422, 360, 340, 606, 628, 629, 630, 118, 704, 151,
-- 152, 119, 120, 340, 94, 351, 704, 95, 102, 103,
-- 122, 316, 673, 436, 317, 318, 319, 144, 145, 456,
-- 457, 458, 537, 123, 608, 688, 153, 154, 693, 340,
-- 340, 752, 770, 155, 156, 157, 423, 424, 447, 125,
-- 448, 315, 323, 126, 673, 127, 558, 158, 159, 160,
-- 794, 795, 688, 128, 688, 129, 161, 783, 784, 130,
-- 131, 162, 132, 133, 134, 135, 529, 530, 531, 532,
-- 533, 163, 673, 136, 147, 686, 164, 165, 166, 167,
-- 168, 169, 170, 61, 751, 673, 643, 688, 138, 171,
-- 139, 172, 140, 141, 588, 143, 148, 324, 150, 586,
-- 180, 181, 183, 644, 325, 186, 187, 173, 188, 101,
-- 190, 191, 326, 174, 175, 192, 196, 43, 197, 199,
-- 492, 200, 497, 492, 500, 687, 651, 652, 653, 201,
-- 151, 152, 202, 297, 203, 686, 327, 205, 206, 212,
-- 213, 176, 53, 54, 55, 534, 643, 517, 177, 178,
-- 518, 519, 214, 520, 215, 56, 323, 153, 154, 222,
-- 521, 522, 223, 644, 155, 156, 157, 316, 524, 224,
-- 317, 318, 486, 227, 233, 239, 485, 241, 158, 159,
-- 160, 242, 243, 244, 246, 706, 707, 161, 577, 300,
-- 255, 256, 162, 323, 289, 290, 291, 292, 293, 294,
-- 295, 257, 163, 309, 258, 259, 301, 164, 165, 166,
-- 167, 168, 169, 170, 307, 661, 260, 261, 325, 262,
-- 171, 572, 172, 263, 264, 265, 326, 266, 267, 268,
-- 269, 43, 291, 292, 293, 294, 295, 270, 173, 311,
-- 603, 271, 272, 273, 174, 175, 274, 308, 615, 356,
-- 327, 314, 364, 320, 339, 325, 53, 54, 55, 592,
-- 365, 366, 321, 326, 381, 599, 335, 601, 43, 56,
-- 342, 343, 176, 626, 298, 569, 570, 344, 611, 177,
-- 178, 345, 346, 347, 382, 384, 348, 327, 151, 152,
-- 355, 304, 363, 53, 54, 55, 368, 385, 623, 386,
-- 387, 390, 391, 395, 627, 418, 56, 419, 420, 425,
-- 429, 430, 431, 440, 442, 153, 154, 446, 468, 451,
-- 484, 469, 155, 156, 157, 471, 487, 507, 512, 516,
-- 523, 796, 472, 473, 474, 527, 158, 159, 160, 536,
-- 539, 540, 680, 801, 802, 161, 477, 478, 502, 544,
-- 162, 727, 482, 550, 551, 554, 509, 513, 556, 514,
-- 163, 573, 515, 525, 574, 164, 165, 166, 167, 168,
-- 169, 170, 560, 567, 568, 571, 575, 580, 171, 579,
-- 172, 582, 584, 585, 340, 151, 152, 107, 108, 109,
-- 110, 111, 112, 113, 114, 115, 173, 589, 593, 744,
-- 602, 594, 174, 175, 613, 604, 607, 618, 619, 596,
-- 620, 624, 153, 154, 635, 537, 641, 676, -113, 490,
-- 156, 157, 491, 677, 678, 679, 681, 683, 684, 685,
-- 176, 695, 305, 158, 159, 160, 690, 177, 178, 696,
-- 699, 698, 161, 714, 716, 720, -113, 162, 107, 108,
-- 109, 110, 111, 112, 113, 114, 115, 163, 725, 729,
-- 151, 152, 164, 165, 166, 167, 168, 169, 170, 732,
-- 730, 733, 734, 496, 735, 171, 737, 172, 736, 739,
-- 738, 740, 741, 743, 756, 757, 758, 153, 154, 765,
-- -134, 767, 768, 173, 155, 156, 157, 773, 782, 174,
-- 175, 777, 786, 778, 705, 708, 709, 710, 158, 159,
-- 160, 780, 781, 718, 788, 789, 372, 161, 791, 792,
-- 762, 746, 162, 793, 797, 785, 508, 176, 245, 694,
-- 336, 771, 163, 578, 177, 178, 553, 164, 165, 166,
-- 167, 168, 169, 170, 151, 152, 612, 750, 705, 106,
-- 171, 204, 172, 755, 499, 445, 0, 590, 369, 0,
-- 760, 761, 0, 718, 0, 763, 764, 0, 173, 0,
-- 0, 153, 154, 0, 174, 175, 0, 769, 155, 156,
-- 157, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 750, 0, 158, 159, 160, 0, 0, 0, 0, 0,
-- 0, 161, 176, 0, 0, 0, 162, 790, 0, 177,
-- 178, 0, 0, 0, 0, 0, 163, 0, 0, 0,
-- 0, 164, 165, 166, 167, 168, 169, 170, 642, 0,
-- 0, 0, 0, 0, 171, 0, 172, 0, 0, 643,
-- 285, 286, 287, 288, 289, 290, 291, 292, 293, 294,
-- 295, 0, 173, 0, 0, 0, 644, 0, 174, 175,
-- 0, 0, 0, 0, 0, 645, 646, 647, 648, 649,
-- 0, 0, 0, 0, 0, 0, 0, 0, 650, 651,
-- 652, 653, 0, 0, 0, 0, 176, 0, 0, 0,
-- 654, 0, 0, 177, 178, 0, 277, 0, 278, 279,
-- 280, 281, 282, 283, 284, 285, 286, 287, 288, 289,
-- 290, 291, 292, 293, 294, 295, 0, 0, 655, 0,
-- 656, 28, 0, 0, 657, 0, 0, 0, 53, 54,
-- 55, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 277, 658, 278, 279, 280, 281, 282, 283, 284, 285,
-- 286, 287, 288, 289, 290, 291, 292, 293, 294, 295,
-- 0, 0, 659, 29, 30, 31, 660, 0, 661, 0,
-- 0, 0, 662, 0, 663, 0, 0, 0, 32, 33,
-- 34, 35, 0, 36, 37, 38, 39, 0, 0, 0,
-- 0, 0, 0, 40, 41, 42, 43, 28, 0, 0,
-- 0, 0, 0, 0, 44, 45, 46, 47, 48, 49,
-- 0, 0, 0, 0, 50, 51, 52, 0, 0, 0,
-- 0, 53, 54, 55, 0, 0, 0, 0, 462, 441,
-- 463, 0, 0, 0, 56, 0, 0, 0, 0, 29,
-- 30, 31, 0, 0, 0, 0, 0, 57, 0, 0,
-- 0, 0, 0, -340, 32, 33, 34, 35, 0, 36,
-- 37, 38, 39, 0, 0, 58, 0, 0, 0, 40,
-- 41, 42, 43, 0, 375, 0, 0, 0, 0, 0,
-- 44, 45, 46, 47, 48, 49, 0, 0, 0, 0,
-- 50, 51, 52, 0, 0, 0, 0, 53, 54, 55,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 56, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 57, 280, 281, 282, 283, 284, 285,
-- 286, 287, 288, 289, 290, 291, 292, 293, 294, 295,
-- 277, 58, 278, 279, 280, 281, 282, 283, 284, 285,
-- 286, 287, 288, 289, 290, 291, 292, 293, 294, 295,
-- 277, 0, 278, 279, 280, 281, 282, 283, 284, 285,
-- 286, 287, 288, 289, 290, 291, 292, 293, 294, 295,
-- 277, 0, 278, 279, 280, 281, 282, 283, 284, 285,
-- 286, 287, 288, 289, 290, 291, 292, 293, 294, 295,
-- 277, 0, 278, 279, 280, 281, 282, 283, 284, 285,
-- 286, 287, 288, 289, 290, 291, 292, 293, 294, 295,
-- 277, 0, 278, 279, 280, 281, 282, 283, 284, 285,
-- 286, 287, 288, 289, 290, 291, 292, 293, 294, 295,
-- 277, 0, 278, 279, 280, 281, 282, 283, 284, 285,
-- 286, 287, 288, 289, 290, 291, 292, 293, 294, 295,
-- 283, 284, 285, 286, 287, 288, 289, 290, 291, 292,
-- 293, 294, 295, 277, 464, 278, 279, 280, 281, 282,
-- 283, 284, 285, 286, 287, 288, 289, 290, 291, 292,
-- 293, 294, 295, 277, 467, 278, 279, 280, 281, 282,
-- 283, 284, 285, 286, 287, 288, 289, 290, 291, 292,
-- 293, 294, 295, 277, 470, 278, 279, 280, 281, 282,
-- 283, 284, 285, 286, 287, 288, 289, 290, 291, 292,
-- 293, 294, 295, 277, 479, 278, 279, 280, 281, 282,
-- 283, 284, 285, 286, 287, 288, 289, 290, 291, 292,
-- 293, 294, 295, 277, 481, 278, 279, 280, 281, 282,
-- 283, 284, 285, 286, 287, 288, 289, 290, 291, 292,
-- 293, 294, 295, 277, 561, 278, 279, 280, 281, 282,
-- 283, 284, 285, 286, 287, 288, 289, 290, 291, 292,
-- 293, 294, 295, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 277, 562, 278, 279,
-- 280, 281, 282, 283, 284, 285, 286, 287, 288, 289,
-- 290, 291, 292, 293, 294, 295, 277, 563, 278, 279,
-- 280, 281, 282, 283, 284, 285, 286, 287, 288, 289,
-- 290, 291, 292, 293, 294, 295, 277, 564, 278, 279,
-- 280, 281, 282, 283, 284, 285, 286, 287, 288, 289,
-- 290, 291, 292, 293, 294, 295, 277, 565, 278, 279,
-- 280, 281, 282, 283, 284, 285, 286, 287, 288, 289,
-- 290, 291, 292, 293, 294, 295, 277, 566, 278, 279,
-- 280, 281, 282, 283, 284, 285, 286, 287, 288, 289,
-- 290, 291, 292, 293, 294, 295, 277, 591, 278, 279,
-- 280, 281, 282, 283, 284, 285, 286, 287, 288, 289,
-- 290, 291, 292, 293, 294, 295, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 277,
-- 610, 278, 279, 280, 281, 282, 283, 284, 285, 286,
-- 287, 288, 289, 290, 291, 292, 293, 294, 295, 277,
-- 616, 278, 279, 280, 281, 282, 283, 284, 285, 286,
-- 287, 288, 289, 290, 291, 292, 293, 294, 295, 277,
-- 617, 278, 279, 280, 281, 282, 283, 284, 285, 286,
-- 287, 288, 289, 290, 291, 292, 293, 294, 295, 277,
-- 621, 278, 279, 280, 281, 282, 283, 284, 285, 286,
-- 287, 288, 289, 290, 291, 292, 293, 294, 295, 277,
-- 632, 278, 279, 280, 281, 282, 283, 284, 285, 286,
-- 287, 288, 289, 290, 291, 292, 293, 294, 295, 277,
-- 634, 278, 279, 280, 281, 282, 283, 284, 285, 286,
-- 287, 288, 289, 290, 291, 292, 293, 294, 295, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 277, 296, 278, 279, 280, 281, 282, 283, 284, 285,
-- 286, 287, 288, 289, 290, 291, 292, 293, 294, 295,
-- 277, 459, 278, 279, 280, 281, 282, 283, 284, 285,
-- 286, 287, 288, 289, 290, 291, 292, 293, 294, 295,
-- 0, 465, 0, 0, 0, 0, 0, 0, 0, 71,
-- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-- 0, 466, 0, 0, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 71, 0, 0, 0, 0, 0, 0,
-- 0, 475, 0, 72, 279, 280, 281, 282, 283, 284,
-- 285, 286, 287, 288, 289, 290, 291, 292, 293, 294,
-- 295, 476, 0, 0, 0, 461, 0, 72, 0, 0,
-- 0, 73, 277, 0, 278, 279, 280, 281, 282, 283,
-- 284, 285, 286, 287, 288, 289, 290, 291, 292, 293,
-- 294, 295, 480, 0, 537, 73, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 74, 0, 0, 0,
-- 0, 0, 766, 75, 76, 77, 78, 79, -43, 80,
-- 81, 82, 0, 0, 83, 84, 0, 85, 86, 87,
-- 74, 0, 0, 0, 88, 89, 90, 75, 76, 77,
-- 78, 79, 0, 80, 81, 82, 0, 0, 83, 84,
-- 0, 85, 86, 87, 0, 0, 0, 0, 88, 89,
-- 90, 277, 483, 278, 279, 280, 281, 282, 283, 284,
-- 285, 286, 287, 288, 289, 290, 291, 292, 293, 294,
-- 295, 277, 543, 278, 279, 280, 281, 282, 283, 284,
-- 285, 286, 287, 288, 289, 290, 291, 292, 293, 294,
-- 295, 277, 0, 278, 279, 280, 281, 282, 283, 284,
-- 285, 286, 287, 288, 289, 290, 291, 292, 293, 294,
-- 295, 281, 282, 283, 284, 285, 286, 287, 288, 289,
-- 290, 291, 292, 293, 294, 295, 282, 283, 284, 285,
-- 286, 287, 288, 289, 290, 291, 292, 293, 294, 295
--};
--
--static const yytype_int16 yycheck[] =
--{
-- 75, 73, 107, 23, 220, 18, 4, 4, 4, 4,
-- 85, 116, 4, 25, 239, 231, 232, 92, 4, 4,
-- 492, 4, 5, 15, 4, 4, 5, 673, 4, 15,
-- 15, 4, 21, 4, 4, 5, 495, 6, 4, 5,
-- 32, 233, 58, 59, 6, 4, 32, 32, 70, 71,
-- 72, 73, 74, 4, 581, 58, 15, 129, 130, 4,
-- 132, 133, 54, 55, 56, 57, 138, 4, 4, 54,
-- 55, 56, 57, 32, 0, 690, 4, 692, 153, 154,
-- 126, 127, 128, 4, 5, 132, 698, 15, 4, 5,
-- 617, 137, 4, 5, 147, 132, 149, 6, 4, 711,
-- 146, 148, 177, 178, 32, 180, 4, 16, 147, 15,
-- 725, 148, 151, 188, 59, 66, 132, 15, 4, 591,
-- 579, 36, 59, 58, 107, 4, 32, 149, 107, 132,
-- 6, 102, 147, 208, 32, 130, 151, 107, 133, 134,
-- 135, 107, 37, 147, 59, 149, 218, 793, 54, 55,
-- 142, 149, 144, 149, 152, 152, 54, 55, 150, 144,
-- 149, 353, 634, 149, 147, 150, 149, 147, 147, 244,
-- 149, 147, 247, 248, 147, 250, 251, 147, 147, 149,
-- 255, 256, 257, 258, 259, 147, 107, 262, 200, 201,
-- 149, 107, 267, 268, 100, 107, 271, 272, 273, 32,
-- 33, 34, 277, 278, 279, 280, 281, 282, 283, 284,
-- 285, 286, 287, 288, 289, 290, 291, 292, 293, 294,
-- 295, 296, 297, 298, 58, 450, 147, 58, 149, 304,
-- 305, 147, 147, 149, 139, 140, 141, 58, 144, 3,
-- 4, 49, 50, 147, 130, 149, 144, 133, 134, 135,
-- 37, 130, 638, 325, 133, 134, 135, 147, 148, 364,
-- 365, 366, 37, 4, 39, 663, 30, 31, 666, 147,
-- 147, 149, 149, 37, 38, 39, 3, 4, 350, 58,
-- 352, 4, 4, 37, 670, 37, 511, 51, 52, 53,
-- 783, 784, 690, 37, 692, 37, 60, 771, 772, 37,
-- 37, 65, 37, 37, 37, 37, 70, 71, 72, 73,
-- 74, 75, 698, 37, 136, 4, 80, 81, 82, 83,
-- 84, 85, 86, 336, 722, 711, 15, 725, 37, 93,
-- 37, 95, 37, 37, 559, 37, 4, 59, 4, 555,
-- 4, 4, 4, 32, 66, 4, 4, 111, 4, 369,
-- 4, 3, 74, 117, 118, 4, 4, 79, 113, 4,
-- 435, 16, 437, 438, 439, 54, 55, 56, 57, 16,
-- 3, 4, 59, 6, 148, 4, 98, 59, 148, 4,
-- 4, 145, 104, 105, 106, 149, 15, 462, 152, 153,
-- 465, 466, 4, 468, 4, 117, 4, 30, 31, 4,
-- 475, 476, 4, 32, 37, 38, 39, 130, 483, 4,
-- 133, 134, 135, 4, 4, 37, 428, 4, 51, 52,
-- 53, 4, 4, 37, 58, 54, 55, 60, 36, 147,
-- 37, 37, 65, 4, 28, 29, 30, 31, 32, 33,
-- 34, 37, 75, 4, 37, 37, 147, 80, 81, 82,
-- 83, 84, 85, 86, 147, 144, 37, 37, 66, 37,
-- 93, 536, 95, 37, 37, 37, 74, 37, 37, 37,
-- 37, 79, 30, 31, 32, 33, 34, 37, 111, 58,
-- 585, 37, 37, 37, 117, 118, 37, 147, 59, 37,
-- 98, 148, 6, 59, 59, 66, 104, 105, 106, 574,
-- 6, 6, 148, 74, 4, 580, 149, 582, 79, 117,
-- 147, 149, 145, 618, 147, 527, 528, 149, 593, 152,
-- 153, 149, 149, 149, 4, 4, 149, 98, 3, 4,
-- 149, 6, 149, 104, 105, 106, 149, 4, 613, 4,
-- 4, 4, 4, 4, 619, 4, 117, 4, 4, 4,
-- 148, 148, 4, 4, 37, 30, 31, 4, 147, 37,
-- 4, 149, 37, 38, 39, 149, 58, 16, 37, 4,
-- 4, 787, 149, 149, 149, 16, 51, 52, 53, 37,
-- 16, 102, 654, 799, 800, 60, 149, 149, 147, 92,
-- 65, 696, 149, 4, 4, 93, 149, 149, 36, 149,
-- 75, 16, 149, 148, 37, 80, 81, 82, 83, 84,
-- 85, 86, 149, 149, 59, 149, 38, 37, 93, 58,
-- 95, 37, 149, 6, 147, 3, 4, 6, 7, 8,
-- 9, 10, 11, 12, 13, 14, 111, 148, 37, 714,
-- 148, 143, 117, 118, 37, 95, 59, 6, 37, 103,
-- 16, 58, 30, 31, 58, 37, 16, 37, 37, 37,
-- 38, 39, 40, 37, 37, 37, 37, 37, 37, 37,
-- 145, 59, 147, 51, 52, 53, 37, 152, 153, 37,
-- 25, 58, 60, 37, 4, 37, 37, 65, 6, 7,
-- 8, 9, 10, 11, 12, 13, 14, 75, 37, 4,
-- 3, 4, 80, 81, 82, 83, 84, 85, 86, 37,
-- 102, 37, 149, 16, 37, 93, 37, 95, 149, 149,
-- 37, 149, 149, 149, 149, 59, 25, 30, 31, 36,
-- 149, 149, 4, 111, 37, 38, 39, 4, 4, 117,
-- 118, 149, 4, 149, 676, 677, 678, 679, 51, 52,
-- 53, 149, 149, 685, 149, 149, 249, 60, 149, 149,
-- 735, 715, 65, 149, 149, 774, 444, 145, 143, 670,
-- 216, 755, 75, 545, 152, 153, 505, 80, 81, 82,
-- 83, 84, 85, 86, 3, 4, 595, 719, 720, 26,
-- 93, 100, 95, 726, 438, 341, -1, 570, 246, -1,
-- 732, 733, -1, 735, -1, 737, 738, -1, 111, -1,
-- -1, 30, 31, -1, 117, 118, -1, 749, 37, 38,
-- 39, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-- 762, -1, 51, 52, 53, -1, -1, -1, -1, -1,
-- -1, 60, 145, -1, -1, -1, 65, 779, -1, 152,
-- 153, -1, -1, -1, -1, -1, 75, -1, -1, -1,
-- -1, 80, 81, 82, 83, 84, 85, 86, 4, -1,
-- -1, -1, -1, -1, 93, -1, 95, -1, -1, 15,
-- 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
-- 34, -1, 111, -1, -1, -1, 32, -1, 117, 118,
-- -1, -1, -1, -1, -1, 41, 42, 43, 44, 45,
-- -1, -1, -1, -1, -1, -1, -1, -1, 54, 55,
-- 56, 57, -1, -1, -1, -1, 145, -1, -1, -1,
-- 66, -1, -1, 152, 153, -1, 15, -1, 17, 18,
-- 19, 20, 21, 22, 23, 24, 25, 26, 27, 28,
-- 29, 30, 31, 32, 33, 34, -1, -1, 94, -1,
-- 96, 4, -1, -1, 100, -1, -1, -1, 104, 105,
-- 106, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-- 15, 117, 17, 18, 19, 20, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
-- -1, -1, 138, 46, 47, 48, 142, -1, 144, -1,
-- -1, -1, 148, -1, 150, -1, -1, -1, 61, 62,
-- 63, 64, -1, 66, 67, 68, 69, -1, -1, -1,
-- -1, -1, -1, 76, 77, 78, 79, 4, -1, -1,
-- -1, -1, -1, -1, 87, 88, 89, 90, 91, 92,
-- -1, -1, -1, -1, 97, 98, 99, -1, -1, -1,
-- -1, 104, 105, 106, -1, -1, -1, -1, 147, 36,
-- 149, -1, -1, -1, 117, -1, -1, -1, -1, 46,
-- 47, 48, -1, -1, -1, -1, -1, 130, -1, -1,
-- -1, -1, -1, 136, 61, 62, 63, 64, -1, 66,
-- 67, 68, 69, -1, -1, 148, -1, -1, -1, 76,
-- 77, 78, 79, -1, 149, -1, -1, -1, -1, -1,
-- 87, 88, 89, 90, 91, 92, -1, -1, -1, -1,
-- 97, 98, 99, -1, -1, -1, -1, 104, 105, 106,
-- -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-- 117, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-- -1, -1, -1, 130, 19, 20, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
-- 15, 148, 17, 18, 19, 20, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
-- 15, -1, 17, 18, 19, 20, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
-- 15, -1, 17, 18, 19, 20, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
-- 15, -1, 17, 18, 19, 20, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
-- 15, -1, 17, 18, 19, 20, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
-- 15, -1, 17, 18, 19, 20, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
-- 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-- 32, 33, 34, 15, 149, 17, 18, 19, 20, 21,
-- 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-- 32, 33, 34, 15, 149, 17, 18, 19, 20, 21,
-- 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-- 32, 33, 34, 15, 149, 17, 18, 19, 20, 21,
-- 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-- 32, 33, 34, 15, 149, 17, 18, 19, 20, 21,
-- 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-- 32, 33, 34, 15, 149, 17, 18, 19, 20, 21,
-- 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-- 32, 33, 34, 15, 149, 17, 18, 19, 20, 21,
-- 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-- 32, 33, 34, -1, -1, -1, -1, -1, -1, -1,
-- -1, -1, -1, -1, -1, -1, 15, 149, 17, 18,
-- 19, 20, 21, 22, 23, 24, 25, 26, 27, 28,
-- 29, 30, 31, 32, 33, 34, 15, 149, 17, 18,
-- 19, 20, 21, 22, 23, 24, 25, 26, 27, 28,
-- 29, 30, 31, 32, 33, 34, 15, 149, 17, 18,
-- 19, 20, 21, 22, 23, 24, 25, 26, 27, 28,
-- 29, 30, 31, 32, 33, 34, 15, 149, 17, 18,
-- 19, 20, 21, 22, 23, 24, 25, 26, 27, 28,
-- 29, 30, 31, 32, 33, 34, 15, 149, 17, 18,
-- 19, 20, 21, 22, 23, 24, 25, 26, 27, 28,
-- 29, 30, 31, 32, 33, 34, 15, 149, 17, 18,
-- 19, 20, 21, 22, 23, 24, 25, 26, 27, 28,
-- 29, 30, 31, 32, 33, 34, -1, -1, -1, -1,
-- -1, -1, -1, -1, -1, -1, -1, -1, -1, 15,
-- 149, 17, 18, 19, 20, 21, 22, 23, 24, 25,
-- 26, 27, 28, 29, 30, 31, 32, 33, 34, 15,
-- 149, 17, 18, 19, 20, 21, 22, 23, 24, 25,
-- 26, 27, 28, 29, 30, 31, 32, 33, 34, 15,
-- 149, 17, 18, 19, 20, 21, 22, 23, 24, 25,
-- 26, 27, 28, 29, 30, 31, 32, 33, 34, 15,
-- 149, 17, 18, 19, 20, 21, 22, 23, 24, 25,
-- 26, 27, 28, 29, 30, 31, 32, 33, 34, 15,
-- 149, 17, 18, 19, 20, 21, 22, 23, 24, 25,
-- 26, 27, 28, 29, 30, 31, 32, 33, 34, 15,
-- 149, 17, 18, 19, 20, 21, 22, 23, 24, 25,
-- 26, 27, 28, 29, 30, 31, 32, 33, 34, -1,
-- -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-- 15, 147, 17, 18, 19, 20, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
-- 15, 147, 17, 18, 19, 20, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
-- -1, 147, -1, -1, -1, -1, -1, -1, -1, 4,
-- -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-- -1, 147, -1, -1, -1, -1, -1, -1, -1, -1,
-- -1, -1, -1, 4, -1, -1, -1, -1, -1, -1,
-- -1, 147, -1, 38, 18, 19, 20, 21, 22, 23,
-- 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
-- 34, 147, -1, -1, -1, 36, -1, 38, -1, -1,
-- -1, 66, 15, -1, 17, 18, 19, 20, 21, 22,
-- 23, 24, 25, 26, 27, 28, 29, 30, 31, 32,
-- 33, 34, 147, -1, 37, 66, -1, -1, -1, -1,
-- -1, -1, -1, -1, -1, -1, 101, -1, -1, -1,
-- -1, -1, 147, 108, 109, 110, 111, 112, 113, 114,
-- 115, 116, -1, -1, 119, 120, -1, 122, 123, 124,
-- 101, -1, -1, -1, 129, 130, 131, 108, 109, 110,
-- 111, 112, -1, 114, 115, 116, -1, -1, 119, 120,
-- -1, 122, 123, 124, -1, -1, -1, -1, 129, 130,
-- 131, 15, 16, 17, 18, 19, 20, 21, 22, 23,
-- 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
-- 34, 15, 16, 17, 18, 19, 20, 21, 22, 23,
-- 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
-- 34, 15, -1, 17, 18, 19, 20, 21, 22, 23,
-- 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
-- 34, 20, 21, 22, 23, 24, 25, 26, 27, 28,
-- 29, 30, 31, 32, 33, 34, 21, 22, 23, 24,
-- 25, 26, 27, 28, 29, 30, 31, 32, 33, 34
--};
--
--/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
-- symbol of state STATE-NUM. */
--static const yytype_uint16 yystos[] =
--{
-- 0, 126, 127, 128, 137, 146, 155, 171, 172, 159,
-- 160, 157, 158, 271, 272, 266, 267, 0, 173, 161,
-- 4, 58, 132, 275, 276, 58, 268, 269, 4, 46,
-- 47, 48, 61, 62, 63, 64, 66, 67, 68, 69,
-- 76, 77, 78, 79, 87, 88, 89, 90, 91, 92,
-- 97, 98, 99, 104, 105, 106, 117, 130, 148, 174,
-- 181, 183, 204, 206, 217, 218, 220, 222, 258, 273,
-- 274, 4, 38, 66, 101, 108, 109, 110, 111, 112,
-- 114, 115, 116, 119, 120, 122, 123, 124, 129, 130,
-- 131, 162, 6, 4, 130, 133, 134, 135, 278, 279,
-- 58, 276, 134, 135, 270, 279, 269, 6, 7, 8,
-- 9, 10, 11, 12, 13, 14, 202, 58, 58, 49,
-- 50, 37, 37, 4, 156, 58, 37, 37, 37, 37,
-- 37, 37, 37, 37, 37, 37, 37, 175, 37, 37,
-- 37, 37, 184, 37, 147, 148, 203, 136, 4, 156,
-- 4, 3, 4, 30, 31, 37, 38, 39, 51, 52,
-- 53, 60, 65, 75, 80, 81, 82, 83, 84, 85,
-- 86, 93, 95, 111, 117, 118, 145, 152, 153, 226,
-- 4, 4, 166, 4, 165, 164, 4, 4, 4, 226,
-- 4, 3, 4, 167, 168, 169, 4, 113, 226, 4,
-- 16, 16, 59, 148, 278, 59, 148, 224, 225, 224,
-- 182, 259, 4, 4, 4, 4, 176, 4, 66, 207,
-- 208, 209, 4, 4, 4, 156, 156, 4, 156, 149,
-- 156, 219, 221, 4, 223, 4, 5, 107, 177, 37,
-- 156, 4, 4, 4, 37, 168, 58, 6, 147, 163,
-- 6, 147, 226, 226, 226, 37, 37, 37, 37, 37,
-- 37, 37, 37, 37, 37, 37, 37, 37, 37, 37,
-- 37, 37, 37, 37, 37, 226, 226, 15, 17, 18,
-- 19, 20, 21, 22, 23, 24, 25, 26, 27, 28,
-- 29, 30, 31, 32, 33, 34, 147, 6, 147, 226,
-- 147, 147, 4, 147, 6, 147, 226, 147, 147, 4,
-- 170, 58, 279, 279, 148, 4, 130, 133, 134, 135,
-- 59, 148, 226, 4, 59, 66, 74, 98, 183, 233,
-- 4, 59, 260, 147, 149, 149, 173, 210, 156, 59,
-- 147, 205, 147, 149, 149, 149, 149, 149, 149, 149,
-- 205, 149, 205, 147, 223, 149, 37, 4, 5, 107,
-- 147, 149, 177, 149, 6, 6, 6, 226, 149, 275,
-- 226, 226, 161, 226, 226, 149, 226, 226, 226, 226,
-- 226, 4, 4, 226, 4, 4, 4, 4, 226, 226,
-- 4, 4, 226, 226, 226, 4, 226, 226, 226, 226,
-- 226, 226, 226, 226, 226, 226, 226, 226, 226, 226,
-- 226, 226, 226, 226, 226, 226, 226, 226, 4, 4,
-- 4, 226, 226, 3, 4, 4, 4, 147, 281, 148,
-- 148, 4, 132, 148, 277, 234, 156, 239, 244, 261,
-- 4, 36, 37, 214, 211, 209, 4, 156, 156, 223,
-- 178, 37, 4, 5, 107, 149, 224, 224, 224, 147,
-- 59, 36, 147, 149, 149, 147, 147, 149, 147, 149,
-- 149, 149, 149, 149, 149, 147, 147, 149, 149, 149,
-- 147, 149, 149, 16, 4, 279, 135, 58, 132, 148,
-- 37, 40, 226, 248, 249, 246, 16, 226, 250, 249,
-- 226, 263, 147, 4, 152, 215, 216, 16, 207, 149,
-- 177, 180, 37, 149, 149, 149, 4, 226, 226, 226,
-- 226, 226, 226, 4, 226, 148, 282, 16, 280, 70,
-- 71, 72, 73, 74, 149, 247, 37, 37, 248, 16,
-- 102, 228, 182, 16, 92, 251, 245, 4, 102, 264,
-- 4, 4, 149, 216, 93, 212, 36, 149, 177, 179,
-- 149, 149, 149, 149, 149, 149, 149, 149, 59, 279,
-- 279, 149, 226, 16, 37, 38, 229, 36, 228, 58,
-- 37, 265, 37, 262, 149, 6, 205, 149, 177, 148,
-- 282, 149, 226, 37, 143, 230, 103, 231, 182, 226,
-- 264, 226, 148, 224, 95, 213, 149, 59, 39, 248,
-- 149, 226, 231, 37, 240, 59, 149, 149, 6, 37,
-- 16, 149, 235, 226, 58, 264, 224, 226, 139, 140,
-- 141, 232, 149, 241, 149, 58, 254, 248, 236, 4,
-- 59, 16, 4, 15, 32, 41, 42, 43, 44, 45,
-- 54, 55, 56, 57, 66, 94, 96, 100, 117, 138,
-- 142, 144, 148, 150, 185, 186, 188, 191, 192, 194,
-- 197, 198, 199, 204, 255, 242, 37, 37, 37, 37,
-- 156, 37, 195, 37, 37, 37, 4, 54, 186, 190,
-- 37, 4, 150, 186, 194, 59, 37, 203, 58, 25,
-- 252, 54, 55, 100, 144, 185, 54, 55, 185, 185,
-- 185, 196, 200, 224, 37, 193, 4, 187, 185, 189,
-- 37, 151, 205, 190, 190, 37, 237, 224, 198, 4,
-- 102, 227, 37, 37, 149, 37, 149, 37, 37, 149,
-- 149, 149, 198, 149, 226, 4, 191, 21, 149, 149,
-- 185, 186, 149, 151, 190, 252, 149, 59, 25, 253,
-- 185, 185, 189, 185, 185, 36, 147, 149, 4, 185,
-- 149, 227, 256, 4, 6, 16, 201, 149, 149, 149,
-- 149, 149, 4, 253, 253, 200, 4, 243, 149, 149,
-- 185, 149, 149, 149, 201, 201, 205, 149, 203, 238,
-- 257, 205, 205
--};
--
--#define yyerrok (yyerrstatus = 0)
--#define yyclearin (yychar = YYEMPTY)
--#define YYEMPTY (-2)
--#define YYEOF 0
--
--#define YYACCEPT goto yyacceptlab
--#define YYABORT goto yyabortlab
--#define YYERROR goto yyerrorlab
--
--
--/* Like YYERROR except do call yyerror. This remains here temporarily
-- to ease the transition to the new meaning of YYERROR, for GCC.
-- Once GCC version 2 has supplanted version 1, this can go. */
--
--#define YYFAIL goto yyerrlab
--
--#define YYRECOVERING() (!!yyerrstatus)
--
--#define YYBACKUP(Token, Value) \
--do \
-- if (yychar == YYEMPTY && yylen == 1) \
-- { \
-- yychar = (Token); \
-- yylval = (Value); \
-- yytoken = YYTRANSLATE (yychar); \
-- YYPOPSTACK (1); \
-- goto yybackup; \
-- } \
-- else \
-- { \
-- yyerror (YY_("syntax error: cannot back up")); \
-- YYERROR; \
-- } \
--while (YYID (0))
--
--
--#define YYTERROR 1
--#define YYERRCODE 256
--
--
--/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
-- If N is 0, then set CURRENT to the empty location which ends
-- the previous symbol: RHS[0] (always defined). */
--
--#define YYRHSLOC(Rhs, K) ((Rhs)[K])
--#ifndef YYLLOC_DEFAULT
--# define YYLLOC_DEFAULT(Current, Rhs, N) \
-- do \
-- if (YYID (N)) \
-- { \
-- (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \
-- (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \
-- (Current).last_line = YYRHSLOC (Rhs, N).last_line; \
-- (Current).last_column = YYRHSLOC (Rhs, N).last_column; \
-- } \
-- else \
-- { \
-- (Current).first_line = (Current).last_line = \
-- YYRHSLOC (Rhs, 0).last_line; \
-- (Current).first_column = (Current).last_column = \
-- YYRHSLOC (Rhs, 0).last_column; \
-- } \
-- while (YYID (0))
--#endif
--
--
--/* YY_LOCATION_PRINT -- Print the location on the stream.
-- This macro was not mandated originally: define only if we know
-- we won't break user code: when these are the locations we know. */
--
--#ifndef YY_LOCATION_PRINT
--# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL
--# define YY_LOCATION_PRINT(File, Loc) \
-- fprintf (File, "%d.%d-%d.%d", \
-- (Loc).first_line, (Loc).first_column, \
-- (Loc).last_line, (Loc).last_column)
--# else
--# define YY_LOCATION_PRINT(File, Loc) ((void) 0)
--# endif
--#endif
--
--
--/* YYLEX -- calling `yylex' with the right arguments. */
--
--#ifdef YYLEX_PARAM
--# define YYLEX yylex (YYLEX_PARAM)
--#else
--# define YYLEX yylex ()
--#endif
--
--/* Enable debugging if requested. */
--#if YYDEBUG
--
--# ifndef YYFPRINTF
--# include <stdio.h> /* INFRINGES ON USER NAME SPACE */
--# define YYFPRINTF fprintf
--# endif
--
--# define YYDPRINTF(Args) \
--do { \
-- if (yydebug) \
-- YYFPRINTF Args; \
--} while (YYID (0))
--
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \
--do { \
-- if (yydebug) \
-- { \
-- YYFPRINTF (stderr, "%s ", Title); \
-- yy_symbol_print (stderr, \
-- Type, Value); \
-- YYFPRINTF (stderr, "\n"); \
-- } \
--} while (YYID (0))
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_value_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (!yyvaluep)
-- return;
--# ifdef YYPRINT
-- if (yytype < YYNTOKENS)
-- YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
--# else
-- YYUSE (yyoutput);
--# endif
-- switch (yytype)
-- {
-- default:
-- break;
-- }
--}
--
--
--/*--------------------------------.
--| Print this symbol on YYOUTPUT. |
--`--------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
--#else
--static void
--yy_symbol_print (yyoutput, yytype, yyvaluep)
-- FILE *yyoutput;
-- int yytype;
-- YYSTYPE const * const yyvaluep;
--#endif
--{
-- if (yytype < YYNTOKENS)
-- YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
-- else
-- YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
--
-- yy_symbol_value_print (yyoutput, yytype, yyvaluep);
-- YYFPRINTF (yyoutput, ")");
--}
--
--/*------------------------------------------------------------------.
--| yy_stack_print -- Print the state stack from its BOTTOM up to its |
--| TOP (included). |
--`------------------------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_stack_print (yytype_int16 *bottom, yytype_int16 *top)
--#else
--static void
--yy_stack_print (bottom, top)
-- yytype_int16 *bottom;
-- yytype_int16 *top;
--#endif
--{
-- YYFPRINTF (stderr, "Stack now");
-- for (; bottom <= top; ++bottom)
-- YYFPRINTF (stderr, " %d", *bottom);
-- YYFPRINTF (stderr, "\n");
--}
--
--# define YY_STACK_PRINT(Bottom, Top) \
--do { \
-- if (yydebug) \
-- yy_stack_print ((Bottom), (Top)); \
--} while (YYID (0))
--
--
--/*------------------------------------------------.
--| Report that the YYRULE is going to be reduced. |
--`------------------------------------------------*/
--
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yy_reduce_print (YYSTYPE *yyvsp, int yyrule)
--#else
--static void
--yy_reduce_print (yyvsp, yyrule)
-- YYSTYPE *yyvsp;
-- int yyrule;
--#endif
--{
-- int yynrhs = yyr2[yyrule];
-- int yyi;
-- unsigned long int yylno = yyrline[yyrule];
-- YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
-- yyrule - 1, yylno);
-- /* The symbols being reduced. */
-- for (yyi = 0; yyi < yynrhs; yyi++)
-- {
-- fprintf (stderr, " $%d = ", yyi + 1);
-- yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi],
-- &(yyvsp[(yyi + 1) - (yynrhs)])
-- );
-- fprintf (stderr, "\n");
-- }
--}
--
--# define YY_REDUCE_PRINT(Rule) \
--do { \
-- if (yydebug) \
-- yy_reduce_print (yyvsp, Rule); \
--} while (YYID (0))
--
--/* Nonzero means print parse trace. It is left uninitialized so that
-- multiple parsers can coexist. */
--int yydebug;
--#else /* !YYDEBUG */
--# define YYDPRINTF(Args)
--# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
--# define YY_STACK_PRINT(Bottom, Top)
--# define YY_REDUCE_PRINT(Rule)
--#endif /* !YYDEBUG */
--
--
--/* YYINITDEPTH -- initial size of the parser's stacks. */
--#ifndef YYINITDEPTH
--# define YYINITDEPTH 200
--#endif
--
--/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
-- if the built-in stack extension method is used).
--
-- Do not make this value too large; the results are undefined if
-- YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
-- evaluated with infinite-precision integer arithmetic. */
--
--#ifndef YYMAXDEPTH
--# define YYMAXDEPTH 10000
--#endif
--
--
--
--#if YYERROR_VERBOSE
--
--# ifndef yystrlen
--# if defined __GLIBC__ && defined _STRING_H
--# define yystrlen strlen
--# else
--/* Return the length of YYSTR. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static YYSIZE_T
--yystrlen (const char *yystr)
--#else
--static YYSIZE_T
--yystrlen (yystr)
-- const char *yystr;
--#endif
--{
-- YYSIZE_T yylen;
-- for (yylen = 0; yystr[yylen]; yylen++)
-- continue;
-- return yylen;
--}
--# endif
--# endif
--
--# ifndef yystpcpy
--# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
--# define yystpcpy stpcpy
--# else
--/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
-- YYDEST. */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static char *
--yystpcpy (char *yydest, const char *yysrc)
--#else
--static char *
--yystpcpy (yydest, yysrc)
-- char *yydest;
-- const char *yysrc;
--#endif
--{
-- char *yyd = yydest;
-- const char *yys = yysrc;
--
-- while ((*yyd++ = *yys++) != '\0')
-- continue;
--
-- return yyd - 1;
--}
--# endif
--# endif
--
--# ifndef yytnamerr
--/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
-- quotes and backslashes, so that it's suitable for yyerror. The
-- heuristic is that double-quoting is unnecessary unless the string
-- contains an apostrophe, a comma, or backslash (other than
-- backslash-backslash). YYSTR is taken from yytname. If YYRES is
-- null, do not copy; instead, return the length of what the result
-- would have been. */
--static YYSIZE_T
--yytnamerr (char *yyres, const char *yystr)
--{
-- if (*yystr == '"')
-- {
-- YYSIZE_T yyn = 0;
-- char const *yyp = yystr;
--
-- for (;;)
-- switch (*++yyp)
-- {
-- case '\'':
-- case ',':
-- goto do_not_strip_quotes;
--
-- case '\\':
-- if (*++yyp != '\\')
-- goto do_not_strip_quotes;
-- /* Fall through. */
-- default:
-- if (yyres)
-- yyres[yyn] = *yyp;
-- yyn++;
-- break;
--
-- case '"':
-- if (yyres)
-- yyres[yyn] = '\0';
-- return yyn;
-- }
-- do_not_strip_quotes: ;
-- }
--
-- if (! yyres)
-- return yystrlen (yystr);
--
-- return yystpcpy (yyres, yystr) - yyres;
--}
--# endif
--
--/* Copy into YYRESULT an error message about the unexpected token
-- YYCHAR while in state YYSTATE. Return the number of bytes copied,
-- including the terminating null byte. If YYRESULT is null, do not
-- copy anything; just return the number of bytes that would be
-- copied. As a special case, return 0 if an ordinary "syntax error"
-- message will do. Return YYSIZE_MAXIMUM if overflow occurs during
-- size calculation. */
--static YYSIZE_T
--yysyntax_error (char *yyresult, int yystate, int yychar)
--{
-- int yyn = yypact[yystate];
--
-- if (! (YYPACT_NINF < yyn && yyn <= YYLAST))
-- return 0;
-- else
-- {
-- int yytype = YYTRANSLATE (yychar);
-- YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]);
-- YYSIZE_T yysize = yysize0;
-- YYSIZE_T yysize1;
-- int yysize_overflow = 0;
-- enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
-- char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
-- int yyx;
--
--# if 0
-- /* This is so xgettext sees the translatable formats that are
-- constructed on the fly. */
-- YY_("syntax error, unexpected %s");
-- YY_("syntax error, unexpected %s, expecting %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s");
-- YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s");
--# endif
-- char *yyfmt;
-- char const *yyf;
-- static char const yyunexpected[] = "syntax error, unexpected %s";
-- static char const yyexpecting[] = ", expecting %s";
-- static char const yyor[] = " or %s";
-- char yyformat[sizeof yyunexpected
-- + sizeof yyexpecting - 1
-- + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2)
-- * (sizeof yyor - 1))];
-- char const *yyprefix = yyexpecting;
--
-- /* Start YYX at -YYN if negative to avoid negative indexes in
-- YYCHECK. */
-- int yyxbegin = yyn < 0 ? -yyn : 0;
--
-- /* Stay within bounds of both yycheck and yytname. */
-- int yychecklim = YYLAST - yyn + 1;
-- int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
-- int yycount = 1;
--
-- yyarg[0] = yytname[yytype];
-- yyfmt = yystpcpy (yyformat, yyunexpected);
--
-- for (yyx = yyxbegin; yyx < yyxend; ++yyx)
-- if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
-- {
-- if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
-- {
-- yycount = 1;
-- yysize = yysize0;
-- yyformat[sizeof yyunexpected - 1] = '\0';
-- break;
-- }
-- yyarg[yycount++] = yytname[yyx];
-- yysize1 = yysize + yytnamerr (0, yytname[yyx]);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
-- yyfmt = yystpcpy (yyfmt, yyprefix);
-- yyprefix = yyor;
-- }
--
-- yyf = YY_(yyformat);
-- yysize1 = yysize + yystrlen (yyf);
-- yysize_overflow |= (yysize1 < yysize);
-- yysize = yysize1;
--
-- if (yysize_overflow)
-- return YYSIZE_MAXIMUM;
--
-- if (yyresult)
-- {
-- /* Avoid sprintf, as that infringes on the user's name space.
-- Don't have undefined behavior even if the translation
-- produced a string with the wrong number of "%s"s. */
-- char *yyp = yyresult;
-- int yyi = 0;
-- while ((*yyp = *yyf) != '\0')
-- {
-- if (*yyp == '%' && yyf[1] == 's' && yyi < yycount)
-- {
-- yyp += yytnamerr (yyp, yyarg[yyi++]);
-- yyf += 2;
-- }
-- else
-- {
-- yyp++;
-- yyf++;
-- }
-- }
-- }
-- return yysize;
-- }
--}
--#endif /* YYERROR_VERBOSE */
--
--
--/*-----------------------------------------------.
--| Release the memory associated to this symbol. |
--`-----------------------------------------------*/
--
--/*ARGSUSED*/
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--static void
--yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep)
--#else
--static void
--yydestruct (yymsg, yytype, yyvaluep)
-- const char *yymsg;
-- int yytype;
-- YYSTYPE *yyvaluep;
--#endif
--{
-- YYUSE (yyvaluep);
--
-- if (!yymsg)
-- yymsg = "Deleting";
-- YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
--
-- switch (yytype)
-- {
--
-- default:
-- break;
-- }
--}
--
--
--/* Prevent warnings from -Wmissing-prototypes. */
--
--#ifdef YYPARSE_PARAM
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void *YYPARSE_PARAM);
--#else
--int yyparse ();
--#endif
--#else /* ! YYPARSE_PARAM */
--#if defined __STDC__ || defined __cplusplus
--int yyparse (void);
--#else
--int yyparse ();
--#endif
--#endif /* ! YYPARSE_PARAM */
--
--
--
--/* The look-ahead symbol. */
--int yychar;
--
--/* The semantic value of the look-ahead symbol. */
--YYSTYPE yylval;
--
--/* Number of syntax errors so far. */
--int yynerrs;
--
--
--
--/*----------.
--| yyparse. |
--`----------*/
--
--#ifdef YYPARSE_PARAM
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void *YYPARSE_PARAM)
--#else
--int
--yyparse (YYPARSE_PARAM)
-- void *YYPARSE_PARAM;
--#endif
--#else /* ! YYPARSE_PARAM */
--#if (defined __STDC__ || defined __C99__FUNC__ \
-- || defined __cplusplus || defined _MSC_VER)
--int
--yyparse (void)
--#else
--int
--yyparse ()
--
--#endif
--#endif
--{
--
-- int yystate;
-- int yyn;
-- int yyresult;
-- /* Number of tokens to shift before error messages enabled. */
-- int yyerrstatus;
-- /* Look-ahead token as an internal (translated) token number. */
-- int yytoken = 0;
--#if YYERROR_VERBOSE
-- /* Buffer for error messages, and its allocated size. */
-- char yymsgbuf[128];
-- char *yymsg = yymsgbuf;
-- YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
--#endif
--
-- /* Three stacks and their tools:
-- `yyss': related to states,
-- `yyvs': related to semantic values,
-- `yyls': related to locations.
--
-- Refer to the stacks thru separate pointers, to allow yyoverflow
-- to reallocate them elsewhere. */
--
-- /* The state stack. */
-- yytype_int16 yyssa[YYINITDEPTH];
-- yytype_int16 *yyss = yyssa;
-- yytype_int16 *yyssp;
--
-- /* The semantic value stack. */
-- YYSTYPE yyvsa[YYINITDEPTH];
-- YYSTYPE *yyvs = yyvsa;
-- YYSTYPE *yyvsp;
--
--
--
--#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N))
--
-- YYSIZE_T yystacksize = YYINITDEPTH;
--
-- /* The variables used to return semantic value and location from the
-- action routines. */
-- YYSTYPE yyval;
--
--
-- /* The number of symbols on the RHS of the reduced rule.
-- Keep to zero when no symbol should be popped. */
-- int yylen = 0;
--
-- YYDPRINTF ((stderr, "Starting parse\n"));
--
-- yystate = 0;
-- yyerrstatus = 0;
-- yynerrs = 0;
-- yychar = YYEMPTY; /* Cause a token to be read. */
--
-- /* Initialize stack pointers.
-- Waste one element of value and location stack
-- so that they stay on the same level as the state stack.
-- The wasted elements are never initialized. */
--
-- yyssp = yyss;
-- yyvsp = yyvs;
--
-- goto yysetstate;
--
--/*------------------------------------------------------------.
--| yynewstate -- Push a new state, which is found in yystate. |
--`------------------------------------------------------------*/
-- yynewstate:
-- /* In all cases, when you get here, the value and location stacks
-- have just been pushed. So pushing a state here evens the stacks. */
-- yyssp++;
--
-- yysetstate:
-- *yyssp = yystate;
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- {
-- /* Get the current used size of the three stacks, in elements. */
-- YYSIZE_T yysize = yyssp - yyss + 1;
--
--#ifdef yyoverflow
-- {
-- /* Give user a chance to reallocate the stack. Use copies of
-- these so that the &'s don't force the real ones into
-- memory. */
-- YYSTYPE *yyvs1 = yyvs;
-- yytype_int16 *yyss1 = yyss;
--
--
-- /* Each stack pointer address is followed by the size of the
-- data in use in that stack, in bytes. This used to be a
-- conditional around just the two extra args, but that might
-- be undefined if yyoverflow is a macro. */
-- yyoverflow (YY_("memory exhausted"),
-- &yyss1, yysize * sizeof (*yyssp),
-- &yyvs1, yysize * sizeof (*yyvsp),
--
-- &yystacksize);
--
-- yyss = yyss1;
-- yyvs = yyvs1;
-- }
--#else /* no yyoverflow */
--# ifndef YYSTACK_RELOCATE
-- goto yyexhaustedlab;
--# else
-- /* Extend the stack our own way. */
-- if (YYMAXDEPTH <= yystacksize)
-- goto yyexhaustedlab;
-- yystacksize *= 2;
-- if (YYMAXDEPTH < yystacksize)
-- yystacksize = YYMAXDEPTH;
--
-- {
-- yytype_int16 *yyss1 = yyss;
-- union yyalloc *yyptr =
-- (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
-- if (! yyptr)
-- goto yyexhaustedlab;
-- YYSTACK_RELOCATE (yyss);
-- YYSTACK_RELOCATE (yyvs);
--
--# undef YYSTACK_RELOCATE
-- if (yyss1 != yyssa)
-- YYSTACK_FREE (yyss1);
-- }
--# endif
--#endif /* no yyoverflow */
--
-- yyssp = yyss + yysize - 1;
-- yyvsp = yyvs + yysize - 1;
--
--
-- YYDPRINTF ((stderr, "Stack size increased to %lu\n",
-- (unsigned long int) yystacksize));
--
-- if (yyss + yystacksize - 1 <= yyssp)
-- YYABORT;
-- }
--
-- YYDPRINTF ((stderr, "Entering state %d\n", yystate));
--
-- goto yybackup;
--
--/*-----------.
--| yybackup. |
--`-----------*/
--yybackup:
--
-- /* Do appropriate processing given the current state. Read a
-- look-ahead token if we need one and don't already have one. */
--
-- /* First try to decide what to do without reference to look-ahead token. */
-- yyn = yypact[yystate];
-- if (yyn == YYPACT_NINF)
-- goto yydefault;
--
-- /* Not known => get a look-ahead token if don't already have one. */
--
-- /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */
-- if (yychar == YYEMPTY)
-- {
-- YYDPRINTF ((stderr, "Reading a token: "));
-- yychar = YYLEX;
-- }
--
-- if (yychar <= YYEOF)
-- {
-- yychar = yytoken = YYEOF;
-- YYDPRINTF ((stderr, "Now at end of input.\n"));
-- }
-- else
-- {
-- yytoken = YYTRANSLATE (yychar);
-- YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
-- }
--
-- /* If the proper action on seeing token YYTOKEN is to reduce or to
-- detect an error, take that action. */
-- yyn += yytoken;
-- if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
-- goto yydefault;
-- yyn = yytable[yyn];
-- if (yyn <= 0)
-- {
-- if (yyn == 0 || yyn == YYTABLE_NINF)
-- goto yyerrlab;
-- yyn = -yyn;
-- goto yyreduce;
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- /* Count tokens shifted since error; after three, turn off error
-- status. */
-- if (yyerrstatus)
-- yyerrstatus--;
--
-- /* Shift the look-ahead token. */
-- YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
--
-- /* Discard the shifted token unless it is eof. */
-- if (yychar != YYEOF)
-- yychar = YYEMPTY;
--
-- yystate = yyn;
-- *++yyvsp = yylval;
--
-- goto yynewstate;
--
--
--/*-----------------------------------------------------------.
--| yydefault -- do the default action for the current state. |
--`-----------------------------------------------------------*/
--yydefault:
-- yyn = yydefact[yystate];
-- if (yyn == 0)
-- goto yyerrlab;
-- goto yyreduce;
--
--
--/*-----------------------------.
--| yyreduce -- Do a reduction. |
--`-----------------------------*/
--yyreduce:
-- /* yyn is the number of a rule to reduce with. */
-- yylen = yyr2[yyn];
--
-- /* If YYLEN is nonzero, implement the default value of the action:
-- `$$ = $1'.
--
-- Otherwise, the following line sets YYVAL to garbage.
-- This behavior is undocumented and Bison
-- users should not rely upon it. Assigning to YYVAL
-- unconditionally makes the parser a bit smaller, and it avoids a
-- GCC warning that YYVAL may be used uninitialized. */
-- yyval = yyvsp[1-yylen];
--
--
-- YY_REDUCE_PRINT (yyn);
-- switch (yyn)
-- {
-- case 8:
--#line 178 "ldgram.y"
-- { ldlex_defsym(); }
-- break;
--
-- case 9:
--#line 180 "ldgram.y"
-- {
-- ldlex_popstate();
-- lang_add_assignment (exp_defsym ((yyvsp[(2) - (4)].name), (yyvsp[(4) - (4)].etree)));
-- }
-- break;
--
-- case 10:
--#line 188 "ldgram.y"
-- {
-- ldlex_mri_script ();
-- PUSH_ERROR (_("MRI style script"));
-- }
-- break;
--
-- case 11:
--#line 193 "ldgram.y"
-- {
-- ldlex_popstate ();
-- mri_draw_tree ();
-- POP_ERROR ();
-- }
-- break;
--
-- case 16:
--#line 208 "ldgram.y"
-- {
-- einfo(_("%P%F: unrecognised keyword in MRI style script '%s'\n"),(yyvsp[(1) - (1)].name));
-- }
-- break;
--
-- case 17:
--#line 211 "ldgram.y"
-- {
-- config.map_filename = "-";
-- }
-- break;
--
-- case 20:
--#line 217 "ldgram.y"
-- { mri_public((yyvsp[(2) - (4)].name), (yyvsp[(4) - (4)].etree)); }
-- break;
--
-- case 21:
--#line 219 "ldgram.y"
-- { mri_public((yyvsp[(2) - (4)].name), (yyvsp[(4) - (4)].etree)); }
-- break;
--
-- case 22:
--#line 221 "ldgram.y"
-- { mri_public((yyvsp[(2) - (3)].name), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 23:
--#line 223 "ldgram.y"
-- { mri_format((yyvsp[(2) - (2)].name)); }
-- break;
--
-- case 24:
--#line 225 "ldgram.y"
-- { mri_output_section((yyvsp[(2) - (4)].name), (yyvsp[(4) - (4)].etree));}
-- break;
--
-- case 25:
--#line 227 "ldgram.y"
-- { mri_output_section((yyvsp[(2) - (3)].name), (yyvsp[(3) - (3)].etree));}
-- break;
--
-- case 26:
--#line 229 "ldgram.y"
-- { mri_output_section((yyvsp[(2) - (4)].name), (yyvsp[(4) - (4)].etree));}
-- break;
--
-- case 27:
--#line 231 "ldgram.y"
-- { mri_align((yyvsp[(2) - (4)].name),(yyvsp[(4) - (4)].etree)); }
-- break;
--
-- case 28:
--#line 233 "ldgram.y"
-- { mri_align((yyvsp[(2) - (4)].name),(yyvsp[(4) - (4)].etree)); }
-- break;
--
-- case 29:
--#line 235 "ldgram.y"
-- { mri_alignmod((yyvsp[(2) - (4)].name),(yyvsp[(4) - (4)].etree)); }
-- break;
--
-- case 30:
--#line 237 "ldgram.y"
-- { mri_alignmod((yyvsp[(2) - (4)].name),(yyvsp[(4) - (4)].etree)); }
-- break;
--
-- case 33:
--#line 241 "ldgram.y"
-- { mri_name((yyvsp[(2) - (2)].name)); }
-- break;
--
-- case 34:
--#line 243 "ldgram.y"
-- { mri_alias((yyvsp[(2) - (4)].name),(yyvsp[(4) - (4)].name),0);}
-- break;
--
-- case 35:
--#line 245 "ldgram.y"
-- { mri_alias ((yyvsp[(2) - (4)].name), 0, (int) (yyvsp[(4) - (4)].bigint).integer); }
-- break;
--
-- case 36:
--#line 247 "ldgram.y"
-- { mri_base((yyvsp[(2) - (2)].etree)); }
-- break;
--
-- case 37:
--#line 249 "ldgram.y"
-- { mri_truncate ((unsigned int) (yyvsp[(2) - (2)].bigint).integer); }
-- break;
--
-- case 40:
--#line 253 "ldgram.y"
-- { ldlex_script (); ldfile_open_command_file((yyvsp[(2) - (2)].name)); }
-- break;
--
-- case 41:
--#line 255 "ldgram.y"
-- { ldlex_popstate (); }
-- break;
--
-- case 42:
--#line 257 "ldgram.y"
-- { lang_add_entry ((yyvsp[(2) - (2)].name), FALSE); }
-- break;
--
-- case 44:
--#line 262 "ldgram.y"
-- { mri_order((yyvsp[(3) - (3)].name)); }
-- break;
--
-- case 45:
--#line 263 "ldgram.y"
-- { mri_order((yyvsp[(2) - (2)].name)); }
-- break;
--
-- case 47:
--#line 269 "ldgram.y"
-- { mri_load((yyvsp[(1) - (1)].name)); }
-- break;
--
-- case 48:
--#line 270 "ldgram.y"
-- { mri_load((yyvsp[(3) - (3)].name)); }
-- break;
--
-- case 49:
--#line 275 "ldgram.y"
-- { mri_only_load((yyvsp[(1) - (1)].name)); }
-- break;
--
-- case 50:
--#line 277 "ldgram.y"
-- { mri_only_load((yyvsp[(3) - (3)].name)); }
-- break;
--
-- case 51:
--#line 281 "ldgram.y"
-- { (yyval.name) = NULL; }
-- break;
--
-- case 54:
--#line 288 "ldgram.y"
-- { ldlex_expression (); }
-- break;
--
-- case 55:
--#line 290 "ldgram.y"
-- { ldlex_popstate (); }
-- break;
--
-- case 56:
--#line 294 "ldgram.y"
-- { ldlang_add_undef ((yyvsp[(1) - (1)].name), FALSE); }
-- break;
--
-- case 57:
--#line 296 "ldgram.y"
-- { ldlang_add_undef ((yyvsp[(2) - (2)].name), FALSE); }
-- break;
--
-- case 58:
--#line 298 "ldgram.y"
-- { ldlang_add_undef ((yyvsp[(3) - (3)].name), FALSE); }
-- break;
--
-- case 59:
--#line 302 "ldgram.y"
-- { ldlex_both(); }
-- break;
--
-- case 60:
--#line 304 "ldgram.y"
-- { ldlex_popstate(); }
-- break;
--
-- case 73:
--#line 325 "ldgram.y"
-- { lang_add_target((yyvsp[(3) - (4)].name)); }
-- break;
--
-- case 74:
--#line 327 "ldgram.y"
-- { ldfile_add_library_path ((yyvsp[(3) - (4)].name), FALSE); }
-- break;
--
-- case 75:
--#line 329 "ldgram.y"
-- { lang_add_output((yyvsp[(3) - (4)].name), 1); }
-- break;
--
-- case 76:
--#line 331 "ldgram.y"
-- { lang_add_output_format ((yyvsp[(3) - (4)].name), (char *) NULL,
-- (char *) NULL, 1); }
-- break;
--
-- case 77:
--#line 334 "ldgram.y"
-- { lang_add_output_format ((yyvsp[(3) - (8)].name), (yyvsp[(5) - (8)].name), (yyvsp[(7) - (8)].name), 1); }
-- break;
--
-- case 78:
--#line 336 "ldgram.y"
-- { ldfile_set_output_arch ((yyvsp[(3) - (4)].name), bfd_arch_unknown); }
-- break;
--
-- case 79:
--#line 338 "ldgram.y"
-- { command_line.force_common_definition = TRUE ; }
-- break;
--
-- case 80:
--#line 340 "ldgram.y"
-- { command_line.inhibit_common_definition = TRUE ; }
-- break;
--
-- case 82:
--#line 343 "ldgram.y"
-- { lang_enter_group (); }
-- break;
--
-- case 83:
--#line 345 "ldgram.y"
-- { lang_leave_group (); }
-- break;
--
-- case 84:
--#line 347 "ldgram.y"
-- { lang_add_map((yyvsp[(3) - (4)].name)); }
-- break;
--
-- case 85:
--#line 349 "ldgram.y"
-- { ldlex_script (); ldfile_open_command_file((yyvsp[(2) - (2)].name)); }
-- break;
--
-- case 86:
--#line 351 "ldgram.y"
-- { ldlex_popstate (); }
-- break;
--
-- case 87:
--#line 353 "ldgram.y"
-- {
-- lang_add_nocrossref ((yyvsp[(3) - (4)].nocrossref));
-- }
-- break;
--
-- case 89:
--#line 358 "ldgram.y"
-- { lang_add_insert ((yyvsp[(3) - (3)].name), 0); }
-- break;
--
-- case 90:
--#line 360 "ldgram.y"
-- { lang_add_insert ((yyvsp[(3) - (3)].name), 1); }
-- break;
--
-- case 91:
--#line 362 "ldgram.y"
-- { lang_memory_region_alias ((yyvsp[(3) - (6)].name), (yyvsp[(5) - (6)].name)); }
-- break;
--
-- case 92:
--#line 364 "ldgram.y"
-- { lang_ld_feature ((yyvsp[(3) - (4)].name)); }
-- break;
--
-- case 93:
--#line 369 "ldgram.y"
-- { lang_add_input_file((yyvsp[(1) - (1)].name),lang_input_file_is_search_file_enum,
-- (char *)NULL); }
-- break;
--
-- case 94:
--#line 372 "ldgram.y"
-- { lang_add_input_file((yyvsp[(3) - (3)].name),lang_input_file_is_search_file_enum,
-- (char *)NULL); }
-- break;
--
-- case 95:
--#line 375 "ldgram.y"
-- { lang_add_input_file((yyvsp[(2) - (2)].name),lang_input_file_is_search_file_enum,
-- (char *)NULL); }
-- break;
--
-- case 96:
--#line 378 "ldgram.y"
-- { lang_add_input_file((yyvsp[(1) - (1)].name),lang_input_file_is_l_enum,
-- (char *)NULL); }
-- break;
--
-- case 97:
--#line 381 "ldgram.y"
-- { lang_add_input_file((yyvsp[(3) - (3)].name),lang_input_file_is_l_enum,
-- (char *)NULL); }
-- break;
--
-- case 98:
--#line 384 "ldgram.y"
-- { lang_add_input_file((yyvsp[(2) - (2)].name),lang_input_file_is_l_enum,
-- (char *)NULL); }
-- break;
--
-- case 99:
--#line 387 "ldgram.y"
-- { (yyval.integer) = input_flags.add_DT_NEEDED_for_regular;
-- input_flags.add_DT_NEEDED_for_regular = TRUE; }
-- break;
--
-- case 100:
--#line 390 "ldgram.y"
-- { input_flags.add_DT_NEEDED_for_regular = (yyvsp[(3) - (5)].integer); }
-- break;
--
-- case 101:
--#line 392 "ldgram.y"
-- { (yyval.integer) = input_flags.add_DT_NEEDED_for_regular;
-- input_flags.add_DT_NEEDED_for_regular = TRUE; }
-- break;
--
-- case 102:
--#line 395 "ldgram.y"
-- { input_flags.add_DT_NEEDED_for_regular = (yyvsp[(5) - (7)].integer); }
-- break;
--
-- case 103:
--#line 397 "ldgram.y"
-- { (yyval.integer) = input_flags.add_DT_NEEDED_for_regular;
-- input_flags.add_DT_NEEDED_for_regular = TRUE; }
-- break;
--
-- case 104:
--#line 400 "ldgram.y"
-- { input_flags.add_DT_NEEDED_for_regular = (yyvsp[(4) - (6)].integer); }
-- break;
--
-- case 109:
--#line 415 "ldgram.y"
-- { lang_add_entry ((yyvsp[(3) - (4)].name), FALSE); }
-- break;
--
-- case 111:
--#line 417 "ldgram.y"
-- {ldlex_expression ();}
-- break;
--
-- case 112:
--#line 418 "ldgram.y"
-- { ldlex_popstate ();
-- lang_add_assignment (exp_assert ((yyvsp[(4) - (7)].etree), (yyvsp[(6) - (7)].name))); }
-- break;
--
-- case 113:
--#line 426 "ldgram.y"
-- {
-- (yyval.cname) = (yyvsp[(1) - (1)].name);
-- }
-- break;
--
-- case 114:
--#line 430 "ldgram.y"
-- {
-- (yyval.cname) = "*";
-- }
-- break;
--
-- case 115:
--#line 434 "ldgram.y"
-- {
-- (yyval.cname) = "?";
-- }
-- break;
--
-- case 116:
--#line 441 "ldgram.y"
-- {
-- (yyval.wildcard).name = (yyvsp[(1) - (1)].cname);
-- (yyval.wildcard).sorted = none;
-- (yyval.wildcard).exclude_name_list = NULL;
-- (yyval.wildcard).section_flag_list = NULL;
-- }
-- break;
--
-- case 117:
--#line 448 "ldgram.y"
-- {
-- (yyval.wildcard).name = (yyvsp[(5) - (5)].cname);
-- (yyval.wildcard).sorted = none;
-- (yyval.wildcard).exclude_name_list = (yyvsp[(3) - (5)].name_list);
-- (yyval.wildcard).section_flag_list = NULL;
-- }
-- break;
--
-- case 118:
--#line 455 "ldgram.y"
-- {
-- (yyval.wildcard).name = (yyvsp[(3) - (4)].cname);
-- (yyval.wildcard).sorted = by_name;
-- (yyval.wildcard).exclude_name_list = NULL;
-- (yyval.wildcard).section_flag_list = NULL;
-- }
-- break;
--
-- case 119:
--#line 462 "ldgram.y"
-- {
-- (yyval.wildcard).name = (yyvsp[(3) - (4)].cname);
-- (yyval.wildcard).sorted = by_alignment;
-- (yyval.wildcard).exclude_name_list = NULL;
-- (yyval.wildcard).section_flag_list = NULL;
-- }
-- break;
--
-- case 120:
--#line 469 "ldgram.y"
-- {
-- (yyval.wildcard).name = (yyvsp[(3) - (4)].cname);
-- (yyval.wildcard).sorted = by_none;
-- (yyval.wildcard).exclude_name_list = NULL;
-- (yyval.wildcard).section_flag_list = NULL;
-- }
-- break;
--
-- case 121:
--#line 476 "ldgram.y"
-- {
-- (yyval.wildcard).name = (yyvsp[(5) - (7)].cname);
-- (yyval.wildcard).sorted = by_name_alignment;
-- (yyval.wildcard).exclude_name_list = NULL;
-- (yyval.wildcard).section_flag_list = NULL;
-- }
-- break;
--
-- case 122:
--#line 483 "ldgram.y"
-- {
-- (yyval.wildcard).name = (yyvsp[(5) - (7)].cname);
-- (yyval.wildcard).sorted = by_name;
-- (yyval.wildcard).exclude_name_list = NULL;
-- (yyval.wildcard).section_flag_list = NULL;
-- }
-- break;
--
-- case 123:
--#line 490 "ldgram.y"
-- {
-- (yyval.wildcard).name = (yyvsp[(5) - (7)].cname);
-- (yyval.wildcard).sorted = by_alignment_name;
-- (yyval.wildcard).exclude_name_list = NULL;
-- (yyval.wildcard).section_flag_list = NULL;
-- }
-- break;
--
-- case 124:
--#line 497 "ldgram.y"
-- {
-- (yyval.wildcard).name = (yyvsp[(5) - (7)].cname);
-- (yyval.wildcard).sorted = by_alignment;
-- (yyval.wildcard).exclude_name_list = NULL;
-- (yyval.wildcard).section_flag_list = NULL;
-- }
-- break;
--
-- case 125:
--#line 504 "ldgram.y"
-- {
-- (yyval.wildcard).name = (yyvsp[(7) - (8)].cname);
-- (yyval.wildcard).sorted = by_name;
-- (yyval.wildcard).exclude_name_list = (yyvsp[(5) - (8)].name_list);
-- (yyval.wildcard).section_flag_list = NULL;
-- }
-- break;
--
-- case 126:
--#line 511 "ldgram.y"
-- {
-- (yyval.wildcard).name = (yyvsp[(3) - (4)].cname);
-- (yyval.wildcard).sorted = by_init_priority;
-- (yyval.wildcard).exclude_name_list = NULL;
-- (yyval.wildcard).section_flag_list = NULL;
-- }
-- break;
--
-- case 127:
--#line 520 "ldgram.y"
-- {
-- struct flag_info_list *n;
-- n = ((struct flag_info_list *) xmalloc (sizeof *n));
-- if ((yyvsp[(1) - (1)].name)[0] == '!')
-- {
-- n->with = without_flags;
-- n->name = &(yyvsp[(1) - (1)].name)[1];
-- }
-- else
-- {
-- n->with = with_flags;
-- n->name = (yyvsp[(1) - (1)].name);
-- }
-- n->valid = FALSE;
-- n->next = NULL;
-- (yyval.flag_info_list) = n;
-- }
-- break;
--
-- case 128:
--#line 538 "ldgram.y"
-- {
-- struct flag_info_list *n;
-- n = ((struct flag_info_list *) xmalloc (sizeof *n));
-- if ((yyvsp[(3) - (3)].name)[0] == '!')
-- {
-- n->with = without_flags;
-- n->name = &(yyvsp[(3) - (3)].name)[1];
-- }
-- else
-- {
-- n->with = with_flags;
-- n->name = (yyvsp[(3) - (3)].name);
-- }
-- n->valid = FALSE;
-- n->next = (yyvsp[(1) - (3)].flag_info_list);
-- (yyval.flag_info_list) = n;
-- }
-- break;
--
-- case 129:
--#line 559 "ldgram.y"
-- {
-- struct flag_info *n;
-- n = ((struct flag_info *) xmalloc (sizeof *n));
-- n->flag_list = (yyvsp[(3) - (4)].flag_info_list);
-- n->flags_initialized = FALSE;
-- n->not_with_flags = 0;
-- n->only_with_flags = 0;
-- (yyval.flag_info) = n;
-- }
-- break;
--
-- case 130:
--#line 572 "ldgram.y"
-- {
-- struct name_list *tmp;
-- tmp = (struct name_list *) xmalloc (sizeof *tmp);
-- tmp->name = (yyvsp[(2) - (2)].cname);
-- tmp->next = (yyvsp[(1) - (2)].name_list);
-- (yyval.name_list) = tmp;
-- }
-- break;
--
-- case 131:
--#line 581 "ldgram.y"
-- {
-- struct name_list *tmp;
-- tmp = (struct name_list *) xmalloc (sizeof *tmp);
-- tmp->name = (yyvsp[(1) - (1)].cname);
-- tmp->next = NULL;
-- (yyval.name_list) = tmp;
-- }
-- break;
--
-- case 132:
--#line 592 "ldgram.y"
-- {
-- struct wildcard_list *tmp;
-- tmp = (struct wildcard_list *) xmalloc (sizeof *tmp);
-- tmp->next = (yyvsp[(1) - (3)].wildcard_list);
-- tmp->spec = (yyvsp[(3) - (3)].wildcard);
-- (yyval.wildcard_list) = tmp;
-- }
-- break;
--
-- case 133:
--#line 601 "ldgram.y"
-- {
-- struct wildcard_list *tmp;
-- tmp = (struct wildcard_list *) xmalloc (sizeof *tmp);
-- tmp->next = NULL;
-- tmp->spec = (yyvsp[(1) - (1)].wildcard);
-- (yyval.wildcard_list) = tmp;
-- }
-- break;
--
-- case 134:
--#line 612 "ldgram.y"
-- {
-- struct wildcard_spec tmp;
-- tmp.name = (yyvsp[(1) - (1)].name);
-- tmp.exclude_name_list = NULL;
-- tmp.sorted = none;
-- tmp.section_flag_list = NULL;
-- lang_add_wild (&tmp, NULL, ldgram_had_keep);
-- }
-- break;
--
-- case 135:
--#line 621 "ldgram.y"
-- {
-- struct wildcard_spec tmp;
-- tmp.name = (yyvsp[(2) - (2)].name);
-- tmp.exclude_name_list = NULL;
-- tmp.sorted = none;
-- tmp.section_flag_list = (yyvsp[(1) - (2)].flag_info);
-- lang_add_wild (&tmp, NULL, ldgram_had_keep);
-- }
-- break;
--
-- case 136:
--#line 630 "ldgram.y"
-- {
-- lang_add_wild (NULL, (yyvsp[(2) - (3)].wildcard_list), ldgram_had_keep);
-- }
-- break;
--
-- case 137:
--#line 634 "ldgram.y"
-- {
-- struct wildcard_spec tmp;
-- tmp.name = NULL;
-- tmp.exclude_name_list = NULL;
-- tmp.sorted = none;
-- tmp.section_flag_list = (yyvsp[(1) - (4)].flag_info);
-- lang_add_wild (&tmp, (yyvsp[(3) - (4)].wildcard_list), ldgram_had_keep);
-- }
-- break;
--
-- case 138:
--#line 643 "ldgram.y"
-- {
-- lang_add_wild (&(yyvsp[(1) - (4)].wildcard), (yyvsp[(3) - (4)].wildcard_list), ldgram_had_keep);
-- }
-- break;
--
-- case 139:
--#line 647 "ldgram.y"
-- {
-- (yyvsp[(2) - (5)].wildcard).section_flag_list = (yyvsp[(1) - (5)].flag_info);
-- lang_add_wild (&(yyvsp[(2) - (5)].wildcard), (yyvsp[(4) - (5)].wildcard_list), ldgram_had_keep);
-- }
-- break;
--
-- case 141:
--#line 656 "ldgram.y"
-- { ldgram_had_keep = TRUE; }
-- break;
--
-- case 142:
--#line 658 "ldgram.y"
-- { ldgram_had_keep = FALSE; }
-- break;
--
-- case 144:
--#line 664 "ldgram.y"
-- {
-- lang_add_attribute(lang_object_symbols_statement_enum);
-- }
-- break;
--
-- case 146:
--#line 669 "ldgram.y"
-- {
--
-- lang_add_attribute(lang_constructors_statement_enum);
-- }
-- break;
--
-- case 147:
--#line 674 "ldgram.y"
-- {
-- constructors_sorted = TRUE;
-- lang_add_attribute (lang_constructors_statement_enum);
-- }
-- break;
--
-- case 149:
--#line 680 "ldgram.y"
-- {
-- lang_add_data ((int) (yyvsp[(1) - (4)].integer), (yyvsp[(3) - (4)].etree));
-- }
-- break;
--
-- case 150:
--#line 685 "ldgram.y"
-- {
-- lang_add_fill ((yyvsp[(3) - (4)].fill));
-- }
-- break;
--
-- case 151:
--#line 688 "ldgram.y"
-- {ldlex_expression ();}
-- break;
--
-- case 152:
--#line 689 "ldgram.y"
-- { ldlex_popstate ();
-- lang_add_assignment (exp_assert ((yyvsp[(4) - (8)].etree), (yyvsp[(6) - (8)].name))); }
-- break;
--
-- case 153:
--#line 692 "ldgram.y"
-- { ldlex_script (); ldfile_open_command_file((yyvsp[(2) - (2)].name)); }
-- break;
--
-- case 154:
--#line 694 "ldgram.y"
-- { ldlex_popstate (); }
-- break;
--
-- case 159:
--#line 709 "ldgram.y"
-- { (yyval.integer) = (yyvsp[(1) - (1)].token); }
-- break;
--
-- case 160:
--#line 711 "ldgram.y"
-- { (yyval.integer) = (yyvsp[(1) - (1)].token); }
-- break;
--
-- case 161:
--#line 713 "ldgram.y"
-- { (yyval.integer) = (yyvsp[(1) - (1)].token); }
-- break;
--
-- case 162:
--#line 715 "ldgram.y"
-- { (yyval.integer) = (yyvsp[(1) - (1)].token); }
-- break;
--
-- case 163:
--#line 717 "ldgram.y"
-- { (yyval.integer) = (yyvsp[(1) - (1)].token); }
-- break;
--
-- case 164:
--#line 722 "ldgram.y"
-- {
-- (yyval.fill) = exp_get_fill ((yyvsp[(1) - (1)].etree), 0, "fill value");
-- }
-- break;
--
-- case 165:
--#line 729 "ldgram.y"
-- { (yyval.fill) = (yyvsp[(2) - (2)].fill); }
-- break;
--
-- case 166:
--#line 730 "ldgram.y"
-- { (yyval.fill) = (fill_type *) 0; }
-- break;
--
-- case 167:
--#line 735 "ldgram.y"
-- { (yyval.token) = '+'; }
-- break;
--
-- case 168:
--#line 737 "ldgram.y"
-- { (yyval.token) = '-'; }
-- break;
--
-- case 169:
--#line 739 "ldgram.y"
-- { (yyval.token) = '*'; }
-- break;
--
-- case 170:
--#line 741 "ldgram.y"
-- { (yyval.token) = '/'; }
-- break;
--
-- case 171:
--#line 743 "ldgram.y"
-- { (yyval.token) = LSHIFT; }
-- break;
--
-- case 172:
--#line 745 "ldgram.y"
-- { (yyval.token) = RSHIFT; }
-- break;
--
-- case 173:
--#line 747 "ldgram.y"
-- { (yyval.token) = '&'; }
-- break;
--
-- case 174:
--#line 749 "ldgram.y"
-- { (yyval.token) = '|'; }
-- break;
--
-- case 177:
--#line 759 "ldgram.y"
-- {
-- lang_add_assignment (exp_assign ((yyvsp[(1) - (3)].name), (yyvsp[(3) - (3)].etree), FALSE));
-- }
-- break;
--
-- case 178:
--#line 763 "ldgram.y"
-- {
-- lang_add_assignment (exp_assign ((yyvsp[(1) - (3)].name),
-- exp_binop ((yyvsp[(2) - (3)].token),
-- exp_nameop (NAME,
-- (yyvsp[(1) - (3)].name)),
-- (yyvsp[(3) - (3)].etree)), FALSE));
-- }
-- break;
--
-- case 179:
--#line 771 "ldgram.y"
-- {
-- lang_add_assignment (exp_assign ((yyvsp[(3) - (6)].name), (yyvsp[(5) - (6)].etree), TRUE));
-- }
-- break;
--
-- case 180:
--#line 775 "ldgram.y"
-- {
-- lang_add_assignment (exp_provide ((yyvsp[(3) - (6)].name), (yyvsp[(5) - (6)].etree), FALSE));
-- }
-- break;
--
-- case 181:
--#line 779 "ldgram.y"
-- {
-- lang_add_assignment (exp_provide ((yyvsp[(3) - (6)].name), (yyvsp[(5) - (6)].etree), TRUE));
-- }
-- break;
--
-- case 189:
--#line 802 "ldgram.y"
-- { region = lang_memory_region_lookup ((yyvsp[(1) - (1)].name), TRUE); }
-- break;
--
-- case 190:
--#line 805 "ldgram.y"
-- {}
-- break;
--
-- case 191:
--#line 807 "ldgram.y"
-- { ldlex_script (); ldfile_open_command_file((yyvsp[(2) - (2)].name)); }
-- break;
--
-- case 192:
--#line 809 "ldgram.y"
-- { ldlex_popstate (); }
-- break;
--
-- case 193:
--#line 814 "ldgram.y"
-- {
-- region->origin = exp_get_vma ((yyvsp[(3) - (3)].etree), 0, "origin");
-- region->current = region->origin;
-- }
-- break;
--
-- case 194:
--#line 822 "ldgram.y"
-- {
-- region->length = exp_get_vma ((yyvsp[(3) - (3)].etree), -1, "length");
-- }
-- break;
--
-- case 195:
--#line 829 "ldgram.y"
-- { /* dummy action to avoid bison 1.25 error message */ }
-- break;
--
-- case 199:
--#line 840 "ldgram.y"
-- { lang_set_flags (region, (yyvsp[(1) - (1)].name), 0); }
-- break;
--
-- case 200:
--#line 842 "ldgram.y"
-- { lang_set_flags (region, (yyvsp[(2) - (2)].name), 1); }
-- break;
--
-- case 201:
--#line 847 "ldgram.y"
-- { lang_startup((yyvsp[(3) - (4)].name)); }
-- break;
--
-- case 203:
--#line 853 "ldgram.y"
-- { ldemul_hll((char *)NULL); }
-- break;
--
-- case 204:
--#line 858 "ldgram.y"
-- { ldemul_hll((yyvsp[(3) - (3)].name)); }
-- break;
--
-- case 205:
--#line 860 "ldgram.y"
-- { ldemul_hll((yyvsp[(1) - (1)].name)); }
-- break;
--
-- case 207:
--#line 868 "ldgram.y"
-- { ldemul_syslib((yyvsp[(3) - (3)].name)); }
-- break;
--
-- case 209:
--#line 874 "ldgram.y"
-- { lang_float(TRUE); }
-- break;
--
-- case 210:
--#line 876 "ldgram.y"
-- { lang_float(FALSE); }
-- break;
--
-- case 211:
--#line 881 "ldgram.y"
-- {
-- (yyval.nocrossref) = NULL;
-- }
-- break;
--
-- case 212:
--#line 885 "ldgram.y"
-- {
-- struct lang_nocrossref *n;
--
-- n = (struct lang_nocrossref *) xmalloc (sizeof *n);
-- n->name = (yyvsp[(1) - (2)].name);
-- n->next = (yyvsp[(2) - (2)].nocrossref);
-- (yyval.nocrossref) = n;
-- }
-- break;
--
-- case 213:
--#line 894 "ldgram.y"
-- {
-- struct lang_nocrossref *n;
--
-- n = (struct lang_nocrossref *) xmalloc (sizeof *n);
-- n->name = (yyvsp[(1) - (3)].name);
-- n->next = (yyvsp[(3) - (3)].nocrossref);
-- (yyval.nocrossref) = n;
-- }
-- break;
--
-- case 214:
--#line 904 "ldgram.y"
-- { ldlex_expression (); }
-- break;
--
-- case 215:
--#line 906 "ldgram.y"
-- { ldlex_popstate (); (yyval.etree)=(yyvsp[(2) - (2)].etree);}
-- break;
--
-- case 216:
--#line 911 "ldgram.y"
-- { (yyval.etree) = exp_unop ('-', (yyvsp[(2) - (2)].etree)); }
-- break;
--
-- case 217:
--#line 913 "ldgram.y"
-- { (yyval.etree) = (yyvsp[(2) - (3)].etree); }
-- break;
--
-- case 218:
--#line 915 "ldgram.y"
-- { (yyval.etree) = exp_unop ((int) (yyvsp[(1) - (4)].integer),(yyvsp[(3) - (4)].etree)); }
-- break;
--
-- case 219:
--#line 917 "ldgram.y"
-- { (yyval.etree) = exp_unop ('!', (yyvsp[(2) - (2)].etree)); }
-- break;
--
-- case 220:
--#line 919 "ldgram.y"
-- { (yyval.etree) = (yyvsp[(2) - (2)].etree); }
-- break;
--
-- case 221:
--#line 921 "ldgram.y"
-- { (yyval.etree) = exp_unop ('~', (yyvsp[(2) - (2)].etree));}
-- break;
--
-- case 222:
--#line 924 "ldgram.y"
-- { (yyval.etree) = exp_binop ('*', (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 223:
--#line 926 "ldgram.y"
-- { (yyval.etree) = exp_binop ('/', (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 224:
--#line 928 "ldgram.y"
-- { (yyval.etree) = exp_binop ('%', (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 225:
--#line 930 "ldgram.y"
-- { (yyval.etree) = exp_binop ('+', (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 226:
--#line 932 "ldgram.y"
-- { (yyval.etree) = exp_binop ('-' , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 227:
--#line 934 "ldgram.y"
-- { (yyval.etree) = exp_binop (LSHIFT , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 228:
--#line 936 "ldgram.y"
-- { (yyval.etree) = exp_binop (RSHIFT , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 229:
--#line 938 "ldgram.y"
-- { (yyval.etree) = exp_binop (EQ , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 230:
--#line 940 "ldgram.y"
-- { (yyval.etree) = exp_binop (NE , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 231:
--#line 942 "ldgram.y"
-- { (yyval.etree) = exp_binop (LE , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 232:
--#line 944 "ldgram.y"
-- { (yyval.etree) = exp_binop (GE , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 233:
--#line 946 "ldgram.y"
-- { (yyval.etree) = exp_binop ('<' , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 234:
--#line 948 "ldgram.y"
-- { (yyval.etree) = exp_binop ('>' , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 235:
--#line 950 "ldgram.y"
-- { (yyval.etree) = exp_binop ('&' , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 236:
--#line 952 "ldgram.y"
-- { (yyval.etree) = exp_binop ('^' , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 237:
--#line 954 "ldgram.y"
-- { (yyval.etree) = exp_binop ('|' , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 238:
--#line 956 "ldgram.y"
-- { (yyval.etree) = exp_trinop ('?' , (yyvsp[(1) - (5)].etree), (yyvsp[(3) - (5)].etree), (yyvsp[(5) - (5)].etree)); }
-- break;
--
-- case 239:
--#line 958 "ldgram.y"
-- { (yyval.etree) = exp_binop (ANDAND , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 240:
--#line 960 "ldgram.y"
-- { (yyval.etree) = exp_binop (OROR , (yyvsp[(1) - (3)].etree), (yyvsp[(3) - (3)].etree)); }
-- break;
--
-- case 241:
--#line 962 "ldgram.y"
-- { (yyval.etree) = exp_nameop (DEFINED, (yyvsp[(3) - (4)].name)); }
-- break;
--
-- case 242:
--#line 964 "ldgram.y"
-- { (yyval.etree) = exp_bigintop ((yyvsp[(1) - (1)].bigint).integer, (yyvsp[(1) - (1)].bigint).str); }
-- break;
--
-- case 243:
--#line 966 "ldgram.y"
-- { (yyval.etree) = exp_nameop (SIZEOF_HEADERS,0); }
-- break;
--
-- case 244:
--#line 969 "ldgram.y"
-- { (yyval.etree) = exp_nameop (ALIGNOF,(yyvsp[(3) - (4)].name)); }
-- break;
--
-- case 245:
--#line 971 "ldgram.y"
-- { (yyval.etree) = exp_nameop (SIZEOF,(yyvsp[(3) - (4)].name)); }
-- break;
--
-- case 246:
--#line 973 "ldgram.y"
-- { (yyval.etree) = exp_nameop (ADDR,(yyvsp[(3) - (4)].name)); }
-- break;
--
-- case 247:
--#line 975 "ldgram.y"
-- { (yyval.etree) = exp_nameop (LOADADDR,(yyvsp[(3) - (4)].name)); }
-- break;
--
-- case 248:
--#line 977 "ldgram.y"
-- { (yyval.etree) = exp_nameop (CONSTANT,(yyvsp[(3) - (4)].name)); }
-- break;
--
-- case 249:
--#line 979 "ldgram.y"
-- { (yyval.etree) = exp_unop (ABSOLUTE, (yyvsp[(3) - (4)].etree)); }
-- break;
--
-- case 250:
--#line 981 "ldgram.y"
-- { (yyval.etree) = exp_unop (ALIGN_K,(yyvsp[(3) - (4)].etree)); }
-- break;
--
-- case 251:
--#line 983 "ldgram.y"
-- { (yyval.etree) = exp_binop (ALIGN_K,(yyvsp[(3) - (6)].etree),(yyvsp[(5) - (6)].etree)); }
-- break;
--
-- case 252:
--#line 985 "ldgram.y"
-- { (yyval.etree) = exp_binop (DATA_SEGMENT_ALIGN, (yyvsp[(3) - (6)].etree), (yyvsp[(5) - (6)].etree)); }
-- break;
--
-- case 253:
--#line 987 "ldgram.y"
-- { (yyval.etree) = exp_binop (DATA_SEGMENT_RELRO_END, (yyvsp[(5) - (6)].etree), (yyvsp[(3) - (6)].etree)); }
-- break;
--
-- case 254:
--#line 989 "ldgram.y"
-- { (yyval.etree) = exp_unop (DATA_SEGMENT_END, (yyvsp[(3) - (4)].etree)); }
-- break;
--
-- case 255:
--#line 991 "ldgram.y"
-- { /* The operands to the expression node are
-- placed in the opposite order from the way
-- in which they appear in the script as
-- that allows us to reuse more code in
-- fold_binary. */
-- (yyval.etree) = exp_binop (SEGMENT_START,
-- (yyvsp[(5) - (6)].etree),
-- exp_nameop (NAME, (yyvsp[(3) - (6)].name))); }
-- break;
--
-- case 256:
--#line 1000 "ldgram.y"
-- { (yyval.etree) = exp_unop (ALIGN_K,(yyvsp[(3) - (4)].etree)); }
-- break;
--
-- case 257:
--#line 1002 "ldgram.y"
-- { (yyval.etree) = exp_nameop (NAME,(yyvsp[(1) - (1)].name)); }
-- break;
--
-- case 258:
--#line 1004 "ldgram.y"
-- { (yyval.etree) = exp_binop (MAX_K, (yyvsp[(3) - (6)].etree), (yyvsp[(5) - (6)].etree) ); }
-- break;
--
-- case 259:
--#line 1006 "ldgram.y"
-- { (yyval.etree) = exp_binop (MIN_K, (yyvsp[(3) - (6)].etree), (yyvsp[(5) - (6)].etree) ); }
-- break;
--
-- case 260:
--#line 1008 "ldgram.y"
-- { (yyval.etree) = exp_assert ((yyvsp[(3) - (6)].etree), (yyvsp[(5) - (6)].name)); }
-- break;
--
-- case 261:
--#line 1010 "ldgram.y"
-- { (yyval.etree) = exp_nameop (ORIGIN, (yyvsp[(3) - (4)].name)); }
-- break;
--
-- case 262:
--#line 1012 "ldgram.y"
-- { (yyval.etree) = exp_nameop (LENGTH, (yyvsp[(3) - (4)].name)); }
-- break;
--
-- case 263:
--#line 1014 "ldgram.y"
-- { (yyval.etree) = exp_unop (LOG2CEIL, (yyvsp[(3) - (4)].etree)); }
-- break;
--
-- case 264:
--#line 1019 "ldgram.y"
-- { (yyval.name) = (yyvsp[(3) - (3)].name); }
-- break;
--
-- case 265:
--#line 1020 "ldgram.y"
-- { (yyval.name) = 0; }
-- break;
--
-- case 266:
--#line 1024 "ldgram.y"
-- { (yyval.etree) = (yyvsp[(3) - (4)].etree); }
-- break;
--
-- case 267:
--#line 1025 "ldgram.y"
-- { (yyval.etree) = 0; }
-- break;
--
-- case 268:
--#line 1029 "ldgram.y"
-- { (yyval.etree) = (yyvsp[(3) - (4)].etree); }
-- break;
--
-- case 269:
--#line 1030 "ldgram.y"
-- { (yyval.etree) = 0; }
-- break;
--
-- case 270:
--#line 1034 "ldgram.y"
-- { (yyval.token) = ALIGN_WITH_INPUT; }
-- break;
--
-- case 271:
--#line 1035 "ldgram.y"
-- { (yyval.token) = 0; }
-- break;
--
-- case 272:
--#line 1039 "ldgram.y"
-- { (yyval.etree) = (yyvsp[(3) - (4)].etree); }
-- break;
--
-- case 273:
--#line 1040 "ldgram.y"
-- { (yyval.etree) = 0; }
-- break;
--
-- case 274:
--#line 1044 "ldgram.y"
-- { (yyval.token) = ONLY_IF_RO; }
-- break;
--
-- case 275:
--#line 1045 "ldgram.y"
-- { (yyval.token) = ONLY_IF_RW; }
-- break;
--
-- case 276:
--#line 1046 "ldgram.y"
-- { (yyval.token) = SPECIAL; }
-- break;
--
-- case 277:
--#line 1047 "ldgram.y"
-- { (yyval.token) = 0; }
-- break;
--
-- case 278:
--#line 1050 "ldgram.y"
-- { ldlex_expression(); }
-- break;
--
-- case 279:
--#line 1055 "ldgram.y"
-- { ldlex_popstate (); ldlex_script (); }
-- break;
--
-- case 280:
--#line 1058 "ldgram.y"
-- {
-- lang_enter_output_section_statement((yyvsp[(1) - (10)].name), (yyvsp[(3) - (10)].etree),
-- sectype,
-- (yyvsp[(5) - (10)].etree), (yyvsp[(7) - (10)].etree), (yyvsp[(4) - (10)].etree), (yyvsp[(9) - (10)].token), (yyvsp[(6) - (10)].token));
-- }
-- break;
--
-- case 281:
--#line 1064 "ldgram.y"
-- { ldlex_popstate (); ldlex_expression (); }
-- break;
--
-- case 282:
--#line 1066 "ldgram.y"
-- {
-- ldlex_popstate ();
-- lang_leave_output_section_statement ((yyvsp[(18) - (18)].fill), (yyvsp[(15) - (18)].name), (yyvsp[(17) - (18)].section_phdr), (yyvsp[(16) - (18)].name));
-- }
-- break;
--
-- case 283:
--#line 1071 "ldgram.y"
-- {}
-- break;
--
-- case 284:
--#line 1073 "ldgram.y"
-- { ldlex_expression (); }
-- break;
--
-- case 285:
--#line 1075 "ldgram.y"
-- { ldlex_popstate (); ldlex_script (); }
-- break;
--
-- case 286:
--#line 1077 "ldgram.y"
-- {
-- lang_enter_overlay ((yyvsp[(3) - (8)].etree), (yyvsp[(6) - (8)].etree));
-- }
-- break;
--
-- case 287:
--#line 1082 "ldgram.y"
-- { ldlex_popstate (); ldlex_expression (); }
-- break;
--
-- case 288:
--#line 1084 "ldgram.y"
-- {
-- ldlex_popstate ();
-- lang_leave_overlay ((yyvsp[(5) - (16)].etree), (int) (yyvsp[(4) - (16)].integer),
-- (yyvsp[(16) - (16)].fill), (yyvsp[(13) - (16)].name), (yyvsp[(15) - (16)].section_phdr), (yyvsp[(14) - (16)].name));
-- }
-- break;
--
-- case 290:
--#line 1094 "ldgram.y"
-- { ldlex_expression (); }
-- break;
--
-- case 291:
--#line 1096 "ldgram.y"
-- {
-- ldlex_popstate ();
-- lang_add_assignment (exp_assign (".", (yyvsp[(3) - (3)].etree), FALSE));
-- }
-- break;
--
-- case 293:
--#line 1102 "ldgram.y"
-- { ldlex_script (); ldfile_open_command_file((yyvsp[(2) - (2)].name)); }
-- break;
--
-- case 294:
--#line 1104 "ldgram.y"
-- { ldlex_popstate (); }
-- break;
--
-- case 295:
--#line 1108 "ldgram.y"
-- { sectype = noload_section; }
-- break;
--
-- case 296:
--#line 1109 "ldgram.y"
-- { sectype = noalloc_section; }
-- break;
--
-- case 297:
--#line 1110 "ldgram.y"
-- { sectype = noalloc_section; }
-- break;
--
-- case 298:
--#line 1111 "ldgram.y"
-- { sectype = noalloc_section; }
-- break;
--
-- case 299:
--#line 1112 "ldgram.y"
-- { sectype = noalloc_section; }
-- break;
--
-- case 301:
--#line 1117 "ldgram.y"
-- { sectype = normal_section; }
-- break;
--
-- case 302:
--#line 1118 "ldgram.y"
-- { sectype = normal_section; }
-- break;
--
-- case 303:
--#line 1122 "ldgram.y"
-- { (yyval.etree) = (yyvsp[(1) - (3)].etree); }
-- break;
--
-- case 304:
--#line 1123 "ldgram.y"
-- { (yyval.etree) = (etree_type *)NULL; }
-- break;
--
-- case 305:
--#line 1128 "ldgram.y"
-- { (yyval.etree) = (yyvsp[(3) - (6)].etree); }
-- break;
--
-- case 306:
--#line 1130 "ldgram.y"
-- { (yyval.etree) = (yyvsp[(3) - (10)].etree); }
-- break;
--
-- case 307:
--#line 1134 "ldgram.y"
-- { (yyval.etree) = (yyvsp[(1) - (2)].etree); }
-- break;
--
-- case 308:
--#line 1135 "ldgram.y"
-- { (yyval.etree) = (etree_type *) NULL; }
-- break;
--
-- case 309:
--#line 1140 "ldgram.y"
-- { (yyval.integer) = 0; }
-- break;
--
-- case 310:
--#line 1142 "ldgram.y"
-- { (yyval.integer) = 1; }
-- break;
--
-- case 311:
--#line 1147 "ldgram.y"
-- { (yyval.name) = (yyvsp[(2) - (2)].name); }
-- break;
--
-- case 312:
--#line 1148 "ldgram.y"
-- { (yyval.name) = DEFAULT_MEMORY_REGION; }
-- break;
--
-- case 313:
--#line 1153 "ldgram.y"
-- {
-- (yyval.section_phdr) = NULL;
-- }
-- break;
--
-- case 314:
--#line 1157 "ldgram.y"
-- {
-- struct lang_output_section_phdr_list *n;
--
-- n = ((struct lang_output_section_phdr_list *)
-- xmalloc (sizeof *n));
-- n->name = (yyvsp[(3) - (3)].name);
-- n->used = FALSE;
-- n->next = (yyvsp[(1) - (3)].section_phdr);
-- (yyval.section_phdr) = n;
-- }
-- break;
--
-- case 316:
--#line 1173 "ldgram.y"
-- {
-- ldlex_script ();
-- lang_enter_overlay_section ((yyvsp[(2) - (2)].name));
-- }
-- break;
--
-- case 317:
--#line 1178 "ldgram.y"
-- { ldlex_popstate (); ldlex_expression (); }
-- break;
--
-- case 318:
--#line 1180 "ldgram.y"
-- {
-- ldlex_popstate ();
-- lang_leave_overlay_section ((yyvsp[(9) - (9)].fill), (yyvsp[(8) - (9)].section_phdr));
-- }
-- break;
--
-- case 323:
--#line 1197 "ldgram.y"
-- { ldlex_expression (); }
-- break;
--
-- case 324:
--#line 1198 "ldgram.y"
-- { ldlex_popstate (); }
-- break;
--
-- case 325:
--#line 1200 "ldgram.y"
-- {
-- lang_new_phdr ((yyvsp[(1) - (6)].name), (yyvsp[(3) - (6)].etree), (yyvsp[(4) - (6)].phdr).filehdr, (yyvsp[(4) - (6)].phdr).phdrs, (yyvsp[(4) - (6)].phdr).at,
-- (yyvsp[(4) - (6)].phdr).flags);
-- }
-- break;
--
-- case 326:
--#line 1208 "ldgram.y"
-- {
-- (yyval.etree) = (yyvsp[(1) - (1)].etree);
--
-- if ((yyvsp[(1) - (1)].etree)->type.node_class == etree_name
-- && (yyvsp[(1) - (1)].etree)->type.node_code == NAME)
-- {
-- const char *s;
-- unsigned int i;
-- static const char * const phdr_types[] =
-- {
-- "PT_NULL", "PT_LOAD", "PT_DYNAMIC",
-- "PT_INTERP", "PT_NOTE", "PT_SHLIB",
-- "PT_PHDR", "PT_TLS"
-- };
--
-- s = (yyvsp[(1) - (1)].etree)->name.name;
-- for (i = 0;
-- i < sizeof phdr_types / sizeof phdr_types[0];
-- i++)
-- if (strcmp (s, phdr_types[i]) == 0)
-- {
-- (yyval.etree) = exp_intop (i);
-- break;
-- }
-- if (i == sizeof phdr_types / sizeof phdr_types[0])
-- {
-- if (strcmp (s, "PT_GNU_EH_FRAME") == 0)
-- (yyval.etree) = exp_intop (0x6474e550);
-- else if (strcmp (s, "PT_GNU_STACK") == 0)
-- (yyval.etree) = exp_intop (0x6474e551);
-- else
-- {
-- einfo (_("\
--%X%P:%S: unknown phdr type `%s' (try integer literal)\n"),
-- NULL, s);
-- (yyval.etree) = exp_intop (0);
-- }
-- }
-- }
-- }
-- break;
--
-- case 327:
--#line 1252 "ldgram.y"
-- {
-- memset (&(yyval.phdr), 0, sizeof (struct phdr_info));
-- }
-- break;
--
-- case 328:
--#line 1256 "ldgram.y"
-- {
-- (yyval.phdr) = (yyvsp[(3) - (3)].phdr);
-- if (strcmp ((yyvsp[(1) - (3)].name), "FILEHDR") == 0 && (yyvsp[(2) - (3)].etree) == NULL)
-- (yyval.phdr).filehdr = TRUE;
-- else if (strcmp ((yyvsp[(1) - (3)].name), "PHDRS") == 0 && (yyvsp[(2) - (3)].etree) == NULL)
-- (yyval.phdr).phdrs = TRUE;
-- else if (strcmp ((yyvsp[(1) - (3)].name), "FLAGS") == 0 && (yyvsp[(2) - (3)].etree) != NULL)
-- (yyval.phdr).flags = (yyvsp[(2) - (3)].etree);
-- else
-- einfo (_("%X%P:%S: PHDRS syntax error at `%s'\n"),
-- NULL, (yyvsp[(1) - (3)].name));
-- }
-- break;
--
-- case 329:
--#line 1269 "ldgram.y"
-- {
-- (yyval.phdr) = (yyvsp[(5) - (5)].phdr);
-- (yyval.phdr).at = (yyvsp[(3) - (5)].etree);
-- }
-- break;
--
-- case 330:
--#line 1277 "ldgram.y"
-- {
-- (yyval.etree) = NULL;
-- }
-- break;
--
-- case 331:
--#line 1281 "ldgram.y"
-- {
-- (yyval.etree) = (yyvsp[(2) - (3)].etree);
-- }
-- break;
--
-- case 332:
--#line 1287 "ldgram.y"
-- {
-- ldlex_version_file ();
-- PUSH_ERROR (_("dynamic list"));
-- }
-- break;
--
-- case 333:
--#line 1292 "ldgram.y"
-- {
-- ldlex_popstate ();
-- POP_ERROR ();
-- }
-- break;
--
-- case 337:
--#line 1309 "ldgram.y"
-- {
-- lang_append_dynamic_list ((yyvsp[(1) - (2)].versyms));
-- }
-- break;
--
-- case 338:
--#line 1317 "ldgram.y"
-- {
-- ldlex_version_file ();
-- PUSH_ERROR (_("VERSION script"));
-- }
-- break;
--
-- case 339:
--#line 1322 "ldgram.y"
-- {
-- ldlex_popstate ();
-- POP_ERROR ();
-- }
-- break;
--
-- case 340:
--#line 1331 "ldgram.y"
-- {
-- ldlex_version_script ();
-- }
-- break;
--
-- case 341:
--#line 1335 "ldgram.y"
-- {
-- ldlex_popstate ();
-- }
-- break;
--
-- case 344:
--#line 1347 "ldgram.y"
-- {
-- lang_register_vers_node (NULL, (yyvsp[(2) - (4)].versnode), NULL);
-- }
-- break;
--
-- case 345:
--#line 1351 "ldgram.y"
-- {
-- lang_register_vers_node ((yyvsp[(1) - (5)].name), (yyvsp[(3) - (5)].versnode), NULL);
-- }
-- break;
--
-- case 346:
--#line 1355 "ldgram.y"
-- {
-- lang_register_vers_node ((yyvsp[(1) - (6)].name), (yyvsp[(3) - (6)].versnode), (yyvsp[(5) - (6)].deflist));
-- }
-- break;
--
-- case 347:
--#line 1362 "ldgram.y"
-- {
-- (yyval.deflist) = lang_add_vers_depend (NULL, (yyvsp[(1) - (1)].name));
-- }
-- break;
--
-- case 348:
--#line 1366 "ldgram.y"
-- {
-- (yyval.deflist) = lang_add_vers_depend ((yyvsp[(1) - (2)].deflist), (yyvsp[(2) - (2)].name));
-- }
-- break;
--
-- case 349:
--#line 1373 "ldgram.y"
-- {
-- (yyval.versnode) = lang_new_vers_node (NULL, NULL);
-- }
-- break;
--
-- case 350:
--#line 1377 "ldgram.y"
-- {
-- (yyval.versnode) = lang_new_vers_node ((yyvsp[(1) - (2)].versyms), NULL);
-- }
-- break;
--
-- case 351:
--#line 1381 "ldgram.y"
-- {
-- (yyval.versnode) = lang_new_vers_node ((yyvsp[(3) - (4)].versyms), NULL);
-- }
-- break;
--
-- case 352:
--#line 1385 "ldgram.y"
-- {
-- (yyval.versnode) = lang_new_vers_node (NULL, (yyvsp[(3) - (4)].versyms));
-- }
-- break;
--
-- case 353:
--#line 1389 "ldgram.y"
-- {
-- (yyval.versnode) = lang_new_vers_node ((yyvsp[(3) - (8)].versyms), (yyvsp[(7) - (8)].versyms));
-- }
-- break;
--
-- case 354:
--#line 1396 "ldgram.y"
-- {
-- (yyval.versyms) = lang_new_vers_pattern (NULL, (yyvsp[(1) - (1)].name), ldgram_vers_current_lang, FALSE);
-- }
-- break;
--
-- case 355:
--#line 1400 "ldgram.y"
-- {
-- (yyval.versyms) = lang_new_vers_pattern (NULL, (yyvsp[(1) - (1)].name), ldgram_vers_current_lang, TRUE);
-- }
-- break;
--
-- case 356:
--#line 1404 "ldgram.y"
-- {
-- (yyval.versyms) = lang_new_vers_pattern ((yyvsp[(1) - (3)].versyms), (yyvsp[(3) - (3)].name), ldgram_vers_current_lang, FALSE);
-- }
-- break;
--
-- case 357:
--#line 1408 "ldgram.y"
-- {
-- (yyval.versyms) = lang_new_vers_pattern ((yyvsp[(1) - (3)].versyms), (yyvsp[(3) - (3)].name), ldgram_vers_current_lang, TRUE);
-- }
-- break;
--
-- case 358:
--#line 1412 "ldgram.y"
-- {
-- (yyval.name) = ldgram_vers_current_lang;
-- ldgram_vers_current_lang = (yyvsp[(4) - (5)].name);
-- }
-- break;
--
-- case 359:
--#line 1417 "ldgram.y"
-- {
-- struct bfd_elf_version_expr *pat;
-- for (pat = (yyvsp[(7) - (9)].versyms); pat->next != NULL; pat = pat->next);
-- pat->next = (yyvsp[(1) - (9)].versyms);
-- (yyval.versyms) = (yyvsp[(7) - (9)].versyms);
-- ldgram_vers_current_lang = (yyvsp[(6) - (9)].name);
-- }
-- break;
--
-- case 360:
--#line 1425 "ldgram.y"
-- {
-- (yyval.name) = ldgram_vers_current_lang;
-- ldgram_vers_current_lang = (yyvsp[(2) - (3)].name);
-- }
-- break;
--
-- case 361:
--#line 1430 "ldgram.y"
-- {
-- (yyval.versyms) = (yyvsp[(5) - (7)].versyms);
-- ldgram_vers_current_lang = (yyvsp[(4) - (7)].name);
-- }
-- break;
--
-- case 362:
--#line 1435 "ldgram.y"
-- {
-- (yyval.versyms) = lang_new_vers_pattern (NULL, "global", ldgram_vers_current_lang, FALSE);
-- }
-- break;
--
-- case 363:
--#line 1439 "ldgram.y"
-- {
-- (yyval.versyms) = lang_new_vers_pattern ((yyvsp[(1) - (3)].versyms), "global", ldgram_vers_current_lang, FALSE);
-- }
-- break;
--
-- case 364:
--#line 1443 "ldgram.y"
-- {
-- (yyval.versyms) = lang_new_vers_pattern (NULL, "local", ldgram_vers_current_lang, FALSE);
-- }
-- break;
--
-- case 365:
--#line 1447 "ldgram.y"
-- {
-- (yyval.versyms) = lang_new_vers_pattern ((yyvsp[(1) - (3)].versyms), "local", ldgram_vers_current_lang, FALSE);
-- }
-- break;
--
-- case 366:
--#line 1451 "ldgram.y"
-- {
-- (yyval.versyms) = lang_new_vers_pattern (NULL, "extern", ldgram_vers_current_lang, FALSE);
-- }
-- break;
--
-- case 367:
--#line 1455 "ldgram.y"
-- {
-- (yyval.versyms) = lang_new_vers_pattern ((yyvsp[(1) - (3)].versyms), "extern", ldgram_vers_current_lang, FALSE);
-- }
-- break;
--
--
--/* Line 1267 of yacc.c. */
--#line 4490 "ldgram.c"
-- default: break;
-- }
-- YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
--
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
--
-- *++yyvsp = yyval;
--
--
-- /* Now `shift' the result of the reduction. Determine what state
-- that goes to, based on the state we popped back to and the rule
-- number reduced by. */
--
-- yyn = yyr1[yyn];
--
-- yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
-- if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
-- yystate = yytable[yystate];
-- else
-- yystate = yydefgoto[yyn - YYNTOKENS];
--
-- goto yynewstate;
--
--
--/*------------------------------------.
--| yyerrlab -- here on detecting error |
--`------------------------------------*/
--yyerrlab:
-- /* If not already recovering from an error, report this error. */
-- if (!yyerrstatus)
-- {
-- ++yynerrs;
--#if ! YYERROR_VERBOSE
-- yyerror (YY_("syntax error"));
--#else
-- {
-- YYSIZE_T yysize = yysyntax_error (0, yystate, yychar);
-- if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM)
-- {
-- YYSIZE_T yyalloc = 2 * yysize;
-- if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM))
-- yyalloc = YYSTACK_ALLOC_MAXIMUM;
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
-- yymsg = (char *) YYSTACK_ALLOC (yyalloc);
-- if (yymsg)
-- yymsg_alloc = yyalloc;
-- else
-- {
-- yymsg = yymsgbuf;
-- yymsg_alloc = sizeof yymsgbuf;
-- }
-- }
--
-- if (0 < yysize && yysize <= yymsg_alloc)
-- {
-- (void) yysyntax_error (yymsg, yystate, yychar);
-- yyerror (yymsg);
-- }
-- else
-- {
-- yyerror (YY_("syntax error"));
-- if (yysize != 0)
-- goto yyexhaustedlab;
-- }
-- }
--#endif
-- }
--
--
--
-- if (yyerrstatus == 3)
-- {
-- /* If just tried and failed to reuse look-ahead token after an
-- error, discard it. */
--
-- if (yychar <= YYEOF)
-- {
-- /* Return failure if at end of input. */
-- if (yychar == YYEOF)
-- YYABORT;
-- }
-- else
-- {
-- yydestruct ("Error: discarding",
-- yytoken, &yylval);
-- yychar = YYEMPTY;
-- }
-- }
--
-- /* Else will try to reuse look-ahead token after shifting the error
-- token. */
-- goto yyerrlab1;
--
--
--/*---------------------------------------------------.
--| yyerrorlab -- error raised explicitly by YYERROR. |
--`---------------------------------------------------*/
--yyerrorlab:
--
-- /* Pacify compilers like GCC when the user code never invokes
-- YYERROR and the label yyerrorlab therefore never appears in user
-- code. */
-- if (/*CONSTCOND*/ 0)
-- goto yyerrorlab;
--
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYERROR. */
-- YYPOPSTACK (yylen);
-- yylen = 0;
-- YY_STACK_PRINT (yyss, yyssp);
-- yystate = *yyssp;
-- goto yyerrlab1;
--
--
--/*-------------------------------------------------------------.
--| yyerrlab1 -- common code for both syntax error and YYERROR. |
--`-------------------------------------------------------------*/
--yyerrlab1:
-- yyerrstatus = 3; /* Each real token shifted decrements this. */
--
-- for (;;)
-- {
-- yyn = yypact[yystate];
-- if (yyn != YYPACT_NINF)
-- {
-- yyn += YYTERROR;
-- if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
-- {
-- yyn = yytable[yyn];
-- if (0 < yyn)
-- break;
-- }
-- }
--
-- /* Pop the current state because it cannot handle the error token. */
-- if (yyssp == yyss)
-- YYABORT;
--
--
-- yydestruct ("Error: popping",
-- yystos[yystate], yyvsp);
-- YYPOPSTACK (1);
-- yystate = *yyssp;
-- YY_STACK_PRINT (yyss, yyssp);
-- }
--
-- if (yyn == YYFINAL)
-- YYACCEPT;
--
-- *++yyvsp = yylval;
--
--
-- /* Shift the error token. */
-- YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
--
-- yystate = yyn;
-- goto yynewstate;
--
--
--/*-------------------------------------.
--| yyacceptlab -- YYACCEPT comes here. |
--`-------------------------------------*/
--yyacceptlab:
-- yyresult = 0;
-- goto yyreturn;
--
--/*-----------------------------------.
--| yyabortlab -- YYABORT comes here. |
--`-----------------------------------*/
--yyabortlab:
-- yyresult = 1;
-- goto yyreturn;
--
--#ifndef yyoverflow
--/*-------------------------------------------------.
--| yyexhaustedlab -- memory exhaustion comes here. |
--`-------------------------------------------------*/
--yyexhaustedlab:
-- yyerror (YY_("memory exhausted"));
-- yyresult = 2;
-- /* Fall through. */
--#endif
--
--yyreturn:
-- if (yychar != YYEOF && yychar != YYEMPTY)
-- yydestruct ("Cleanup: discarding lookahead",
-- yytoken, &yylval);
-- /* Do not reclaim the symbols of the rule which action triggered
-- this YYABORT or YYACCEPT. */
-- YYPOPSTACK (yylen);
-- YY_STACK_PRINT (yyss, yyssp);
-- while (yyssp != yyss)
-- {
-- yydestruct ("Cleanup: popping",
-- yystos[*yyssp], yyvsp);
-- YYPOPSTACK (1);
-- }
--#ifndef yyoverflow
-- if (yyss != yyssa)
-- YYSTACK_FREE (yyss);
--#endif
--#if YYERROR_VERBOSE
-- if (yymsg != yymsgbuf)
-- YYSTACK_FREE (yymsg);
--#endif
-- /* Make sure YYID is used. */
-- return YYID (yyresult);
--}
--
--
--#line 1465 "ldgram.y"
--
--void
--yyerror(arg)
-- const char *arg;
--{
-- if (ldfile_assumed_script)
-- einfo (_("%P:%s: file format not recognized; treating as linker script\n"),
-- ldlex_filename ());
-- if (error_index > 0 && error_index < ERROR_NAME_MAX)
-- einfo ("%P%F:%S: %s in %s\n", NULL, arg, error_names[error_index - 1]);
-- else
-- einfo ("%P%F:%S: %s\n", NULL, arg);
--}
--
-diff -Nur binutils-2.24.orig/ld/ldgram.h binutils-2.24/ld/ldgram.h
---- binutils-2.24.orig/ld/ldgram.h 2013-11-18 09:49:29.000000000 +0100
-+++ binutils-2.24/ld/ldgram.h 1970-01-01 01:00:00.000000000 +0100
-@@ -1,347 +0,0 @@
--/* A Bison parser, made by GNU Bison 2.3. */
--
--/* Skeleton interface for Bison's Yacc-like parsers in C
--
-- Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
-- Free Software Foundation, Inc.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 2, or (at your option)
-- any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street, Fifth Floor,
-- Boston, MA 02110-1301, USA. */
--
--/* As a special exception, you may create a larger work that contains
-- part or all of the Bison parser skeleton and distribute that work
-- under terms of your choice, so long as that work isn't itself a
-- parser generator using the skeleton or a modified version thereof
-- as a parser skeleton. Alternatively, if you modify or redistribute
-- the parser skeleton itself, you may (at your option) remove this
-- special exception, which will cause the skeleton and the resulting
-- Bison output files to be licensed under the GNU General Public
-- License without this special exception.
--
-- This special exception was added by the Free Software Foundation in
-- version 2.2 of Bison. */
--
--/* Tokens. */
--#ifndef YYTOKENTYPE
--# define YYTOKENTYPE
-- /* Put the tokens into the symbol table, so that GDB and other debuggers
-- know about them. */
-- enum yytokentype {
-- INT = 258,
-- NAME = 259,
-- LNAME = 260,
-- OREQ = 261,
-- ANDEQ = 262,
-- RSHIFTEQ = 263,
-- LSHIFTEQ = 264,
-- DIVEQ = 265,
-- MULTEQ = 266,
-- MINUSEQ = 267,
-- PLUSEQ = 268,
-- OROR = 269,
-- ANDAND = 270,
-- NE = 271,
-- EQ = 272,
-- GE = 273,
-- LE = 274,
-- RSHIFT = 275,
-- LSHIFT = 276,
-- UNARY = 277,
-- END = 278,
-- ALIGN_K = 279,
-- BLOCK = 280,
-- BIND = 281,
-- QUAD = 282,
-- SQUAD = 283,
-- LONG = 284,
-- SHORT = 285,
-- BYTE = 286,
-- SECTIONS = 287,
-- PHDRS = 288,
-- INSERT_K = 289,
-- AFTER = 290,
-- BEFORE = 291,
-- DATA_SEGMENT_ALIGN = 292,
-- DATA_SEGMENT_RELRO_END = 293,
-- DATA_SEGMENT_END = 294,
-- SORT_BY_NAME = 295,
-- SORT_BY_ALIGNMENT = 296,
-- SORT_NONE = 297,
-- SORT_BY_INIT_PRIORITY = 298,
-- SIZEOF_HEADERS = 299,
-- OUTPUT_FORMAT = 300,
-- FORCE_COMMON_ALLOCATION = 301,
-- OUTPUT_ARCH = 302,
-- INHIBIT_COMMON_ALLOCATION = 303,
-- SEGMENT_START = 304,
-- INCLUDE = 305,
-- MEMORY = 306,
-- REGION_ALIAS = 307,
-- LD_FEATURE = 308,
-- NOLOAD = 309,
-- DSECT = 310,
-- COPY = 311,
-- INFO = 312,
-- OVERLAY = 313,
-- DEFINED = 314,
-- TARGET_K = 315,
-- SEARCH_DIR = 316,
-- MAP = 317,
-- ENTRY = 318,
-- NEXT = 319,
-- SIZEOF = 320,
-- ALIGNOF = 321,
-- ADDR = 322,
-- LOADADDR = 323,
-- MAX_K = 324,
-- MIN_K = 325,
-- STARTUP = 326,
-- HLL = 327,
-- SYSLIB = 328,
-- FLOAT = 329,
-- NOFLOAT = 330,
-- NOCROSSREFS = 331,
-- ORIGIN = 332,
-- FILL = 333,
-- LENGTH = 334,
-- CREATE_OBJECT_SYMBOLS = 335,
-- INPUT = 336,
-- GROUP = 337,
-- OUTPUT = 338,
-- CONSTRUCTORS = 339,
-- ALIGNMOD = 340,
-- AT = 341,
-- SUBALIGN = 342,
-- HIDDEN = 343,
-- PROVIDE = 344,
-- PROVIDE_HIDDEN = 345,
-- AS_NEEDED = 346,
-- CHIP = 347,
-- LIST = 348,
-- SECT = 349,
-- ABSOLUTE = 350,
-- LOAD = 351,
-- NEWLINE = 352,
-- ENDWORD = 353,
-- ORDER = 354,
-- NAMEWORD = 355,
-- ASSERT_K = 356,
-- LOG2CEIL = 357,
-- FORMAT = 358,
-- PUBLIC = 359,
-- DEFSYMEND = 360,
-- BASE = 361,
-- ALIAS = 362,
-- TRUNCATE = 363,
-- REL = 364,
-- INPUT_SCRIPT = 365,
-- INPUT_MRI_SCRIPT = 366,
-- INPUT_DEFSYM = 367,
-- CASE = 368,
-- EXTERN = 369,
-- START = 370,
-- VERS_TAG = 371,
-- VERS_IDENTIFIER = 372,
-- GLOBAL = 373,
-- LOCAL = 374,
-- VERSIONK = 375,
-- INPUT_VERSION_SCRIPT = 376,
-- KEEP = 377,
-- ONLY_IF_RO = 378,
-- ONLY_IF_RW = 379,
-- SPECIAL = 380,
-- INPUT_SECTION_FLAGS = 381,
-- ALIGN_WITH_INPUT = 382,
-- EXCLUDE_FILE = 383,
-- CONSTANT = 384,
-- INPUT_DYNAMIC_LIST = 385
-- };
--#endif
--/* Tokens. */
--#define INT 258
--#define NAME 259
--#define LNAME 260
--#define OREQ 261
--#define ANDEQ 262
--#define RSHIFTEQ 263
--#define LSHIFTEQ 264
--#define DIVEQ 265
--#define MULTEQ 266
--#define MINUSEQ 267
--#define PLUSEQ 268
--#define OROR 269
--#define ANDAND 270
--#define NE 271
--#define EQ 272
--#define GE 273
--#define LE 274
--#define RSHIFT 275
--#define LSHIFT 276
--#define UNARY 277
--#define END 278
--#define ALIGN_K 279
--#define BLOCK 280
--#define BIND 281
--#define QUAD 282
--#define SQUAD 283
--#define LONG 284
--#define SHORT 285
--#define BYTE 286
--#define SECTIONS 287
--#define PHDRS 288
--#define INSERT_K 289
--#define AFTER 290
--#define BEFORE 291
--#define DATA_SEGMENT_ALIGN 292
--#define DATA_SEGMENT_RELRO_END 293
--#define DATA_SEGMENT_END 294
--#define SORT_BY_NAME 295
--#define SORT_BY_ALIGNMENT 296
--#define SORT_NONE 297
--#define SORT_BY_INIT_PRIORITY 298
--#define SIZEOF_HEADERS 299
--#define OUTPUT_FORMAT 300
--#define FORCE_COMMON_ALLOCATION 301
--#define OUTPUT_ARCH 302
--#define INHIBIT_COMMON_ALLOCATION 303
--#define SEGMENT_START 304
--#define INCLUDE 305
--#define MEMORY 306
--#define REGION_ALIAS 307
--#define LD_FEATURE 308
--#define NOLOAD 309
--#define DSECT 310
--#define COPY 311
--#define INFO 312
--#define OVERLAY 313
--#define DEFINED 314
--#define TARGET_K 315
--#define SEARCH_DIR 316
--#define MAP 317
--#define ENTRY 318
--#define NEXT 319
--#define SIZEOF 320
--#define ALIGNOF 321
--#define ADDR 322
--#define LOADADDR 323
--#define MAX_K 324
--#define MIN_K 325
--#define STARTUP 326
--#define HLL 327
--#define SYSLIB 328
--#define FLOAT 329
--#define NOFLOAT 330
--#define NOCROSSREFS 331
--#define ORIGIN 332
--#define FILL 333
--#define LENGTH 334
--#define CREATE_OBJECT_SYMBOLS 335
--#define INPUT 336
--#define GROUP 337
--#define OUTPUT 338
--#define CONSTRUCTORS 339
--#define ALIGNMOD 340
--#define AT 341
--#define SUBALIGN 342
--#define HIDDEN 343
--#define PROVIDE 344
--#define PROVIDE_HIDDEN 345
--#define AS_NEEDED 346
--#define CHIP 347
--#define LIST 348
--#define SECT 349
--#define ABSOLUTE 350
--#define LOAD 351
--#define NEWLINE 352
--#define ENDWORD 353
--#define ORDER 354
--#define NAMEWORD 355
--#define ASSERT_K 356
--#define LOG2CEIL 357
--#define FORMAT 358
--#define PUBLIC 359
--#define DEFSYMEND 360
--#define BASE 361
--#define ALIAS 362
--#define TRUNCATE 363
--#define REL 364
--#define INPUT_SCRIPT 365
--#define INPUT_MRI_SCRIPT 366
--#define INPUT_DEFSYM 367
--#define CASE 368
--#define EXTERN 369
--#define START 370
--#define VERS_TAG 371
--#define VERS_IDENTIFIER 372
--#define GLOBAL 373
--#define LOCAL 374
--#define VERSIONK 375
--#define INPUT_VERSION_SCRIPT 376
--#define KEEP 377
--#define ONLY_IF_RO 378
--#define ONLY_IF_RW 379
--#define SPECIAL 380
--#define INPUT_SECTION_FLAGS 381
--#define ALIGN_WITH_INPUT 382
--#define EXCLUDE_FILE 383
--#define CONSTANT 384
--#define INPUT_DYNAMIC_LIST 385
--
--
--
--
--#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
--typedef union YYSTYPE
--#line 60 "ldgram.y"
--{
-- bfd_vma integer;
-- struct big_int
-- {
-- bfd_vma integer;
-- char *str;
-- } bigint;
-- fill_type *fill;
-- char *name;
-- const char *cname;
-- struct wildcard_spec wildcard;
-- struct wildcard_list *wildcard_list;
-- struct name_list *name_list;
-- struct flag_info_list *flag_info_list;
-- struct flag_info *flag_info;
-- int token;
-- union etree_union *etree;
-- struct phdr_info
-- {
-- bfd_boolean filehdr;
-- bfd_boolean phdrs;
-- union etree_union *at;
-- union etree_union *flags;
-- } phdr;
-- struct lang_nocrossref *nocrossref;
-- struct lang_output_section_phdr_list *section_phdr;
-- struct bfd_elf_version_deps *deflist;
-- struct bfd_elf_version_expr *versyms;
-- struct bfd_elf_version_tree *versnode;
--}
--/* Line 1529 of yacc.c. */
--#line 340 "ldgram.h"
-- YYSTYPE;
--# define yystype YYSTYPE /* obsolescent; will be withdrawn */
--# define YYSTYPE_IS_DECLARED 1
--# define YYSTYPE_IS_TRIVIAL 1
--#endif
--
--extern YYSTYPE yylval;
--
-diff -Nur binutils-2.24.orig/ld/ld.info binutils-2.24/ld/ld.info
---- binutils-2.24.orig/ld/ld.info 2013-11-26 12:41:44.000000000 +0100
-+++ binutils-2.24/ld/ld.info 1970-01-01 01:00:00.000000000 +0100
-@@ -1,8148 +0,0 @@
--This is ld.info, produced by makeinfo version 4.8 from ld.texinfo.
--
--INFO-DIR-SECTION Software development
--START-INFO-DIR-ENTRY
--* Ld: (ld). The GNU linker.
--END-INFO-DIR-ENTRY
--
-- This file documents the GNU linker LD (GNU Binutils) version 2.23.91.
--
-- Copyright (C) 1991-2013 Free Software Foundation, Inc.
--
-- Permission is granted to copy, distribute and/or modify this document
--under the terms of the GNU Free Documentation License, Version 1.3 or
--any later version published by the Free Software Foundation; with no
--Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
--Texts. A copy of the license is included in the section entitled "GNU
--Free Documentation License".
--
--
--File: ld.info, Node: Top, Next: Overview, Up: (dir)
--
--LD
--**
--
--This file documents the GNU linker ld (GNU Binutils) version 2.23.91.
--
-- This document is distributed under the terms of the GNU Free
--Documentation License version 1.3. A copy of the license is included
--in the section entitled "GNU Free Documentation License".
--
--* Menu:
--
--* Overview:: Overview
--* Invocation:: Invocation
--* Scripts:: Linker Scripts
--
--* Machine Dependent:: Machine Dependent Features
--
--* BFD:: BFD
--
--* Reporting Bugs:: Reporting Bugs
--* MRI:: MRI Compatible Script Files
--* GNU Free Documentation License:: GNU Free Documentation License
--* LD Index:: LD Index
--
--
--File: ld.info, Node: Overview, Next: Invocation, Prev: Top, Up: Top
--
--1 Overview
--**********
--
--`ld' combines a number of object and archive files, relocates their
--data and ties up symbol references. Usually the last step in compiling
--a program is to run `ld'.
--
-- `ld' accepts Linker Command Language files written in a superset of
--AT&T's Link Editor Command Language syntax, to provide explicit and
--total control over the linking process.
--
-- This version of `ld' uses the general purpose BFD libraries to
--operate on object files. This allows `ld' to read, combine, and write
--object files in many different formats--for example, COFF or `a.out'.
--Different formats may be linked together to produce any available kind
--of object file. *Note BFD::, for more information.
--
-- Aside from its flexibility, the GNU linker is more helpful than other
--linkers in providing diagnostic information. Many linkers abandon
--execution immediately upon encountering an error; whenever possible,
--`ld' continues executing, allowing you to identify other errors (or, in
--some cases, to get an output file in spite of the error).
--
--
--File: ld.info, Node: Invocation, Next: Scripts, Prev: Overview, Up: Top
--
--2 Invocation
--************
--
--The GNU linker `ld' is meant to cover a broad range of situations, and
--to be as compatible as possible with other linkers. As a result, you
--have many choices to control its behavior.
--
--* Menu:
--
--* Options:: Command Line Options
--* Environment:: Environment Variables
--
--
--File: ld.info, Node: Options, Next: Environment, Up: Invocation
--
--2.1 Command Line Options
--========================
--
-- The linker supports a plethora of command-line options, but in actual
--practice few of them are used in any particular context. For instance,
--a frequent use of `ld' is to link standard Unix object files on a
--standard, supported Unix system. On such a system, to link a file
--`hello.o':
--
-- ld -o OUTPUT /lib/crt0.o hello.o -lc
--
-- This tells `ld' to produce a file called OUTPUT as the result of
--linking the file `/lib/crt0.o' with `hello.o' and the library `libc.a',
--which will come from the standard search directories. (See the
--discussion of the `-l' option below.)
--
-- Some of the command-line options to `ld' may be specified at any
--point in the command line. However, options which refer to files, such
--as `-l' or `-T', cause the file to be read at the point at which the
--option appears in the command line, relative to the object files and
--other file options. Repeating non-file options with a different
--argument will either have no further effect, or override prior
--occurrences (those further to the left on the command line) of that
--option. Options which may be meaningfully specified more than once are
--noted in the descriptions below.
--
-- Non-option arguments are object files or archives which are to be
--linked together. They may follow, precede, or be mixed in with
--command-line options, except that an object file argument may not be
--placed between an option and its argument.
--
-- Usually the linker is invoked with at least one object file, but you
--can specify other forms of binary input files using `-l', `-R', and the
--script command language. If _no_ binary input files at all are
--specified, the linker does not produce any output, and issues the
--message `No input files'.
--
-- If the linker cannot recognize the format of an object file, it will
--assume that it is a linker script. A script specified in this way
--augments the main linker script used for the link (either the default
--linker script or the one specified by using `-T'). This feature
--permits the linker to link against a file which appears to be an object
--or an archive, but actually merely defines some symbol values, or uses
--`INPUT' or `GROUP' to load other objects. Specifying a script in this
--way merely augments the main linker script, with the extra commands
--placed after the main script; use the `-T' option to replace the
--default linker script entirely, but note the effect of the `INSERT'
--command. *Note Scripts::.
--
-- For options whose names are a single letter, option arguments must
--either follow the option letter without intervening whitespace, or be
--given as separate arguments immediately following the option that
--requires them.
--
-- For options whose names are multiple letters, either one dash or two
--can precede the option name; for example, `-trace-symbol' and
--`--trace-symbol' are equivalent. Note--there is one exception to this
--rule. Multiple letter options that start with a lower case 'o' can
--only be preceded by two dashes. This is to reduce confusion with the
--`-o' option. So for example `-omagic' sets the output file name to
--`magic' whereas `--omagic' sets the NMAGIC flag on the output.
--
-- Arguments to multiple-letter options must either be separated from
--the option name by an equals sign, or be given as separate arguments
--immediately following the option that requires them. For example,
--`--trace-symbol foo' and `--trace-symbol=foo' are equivalent. Unique
--abbreviations of the names of multiple-letter options are accepted.
--
-- Note--if the linker is being invoked indirectly, via a compiler
--driver (e.g. `gcc') then all the linker command line options should be
--prefixed by `-Wl,' (or whatever is appropriate for the particular
--compiler driver) like this:
--
-- gcc -Wl,--start-group foo.o bar.o -Wl,--end-group
--
-- This is important, because otherwise the compiler driver program may
--silently drop the linker options, resulting in a bad link. Confusion
--may also arise when passing options that require values through a
--driver, as the use of a space between option and argument acts as a
--separator, and causes the driver to pass only the option to the linker
--and the argument to the compiler. In this case, it is simplest to use
--the joined forms of both single- and multiple-letter options, such as:
--
-- gcc foo.o bar.o -Wl,-eENTRY -Wl,-Map=a.map
--
-- Here is a table of the generic command line switches accepted by the
--GNU linker:
--
--`@FILE'
-- Read command-line options from FILE. The options read are
-- inserted in place of the original @FILE option. If FILE does not
-- exist, or cannot be read, then the option will be treated
-- literally, and not removed.
--
-- Options in FILE are separated by whitespace. A whitespace
-- character may be included in an option by surrounding the entire
-- option in either single or double quotes. Any character
-- (including a backslash) may be included by prefixing the character
-- to be included with a backslash. The FILE may itself contain
-- additional @FILE options; any such options will be processed
-- recursively.
--
--`-a KEYWORD'
-- This option is supported for HP/UX compatibility. The KEYWORD
-- argument must be one of the strings `archive', `shared', or
-- `default'. `-aarchive' is functionally equivalent to `-Bstatic',
-- and the other two keywords are functionally equivalent to
-- `-Bdynamic'. This option may be used any number of times.
--
--`--audit AUDITLIB'
-- Adds AUDITLIB to the `DT_AUDIT' entry of the dynamic section.
-- AUDITLIB is not checked for existence, nor will it use the
-- DT_SONAME specified in the library. If specified multiple times
-- `DT_AUDIT' will contain a colon separated list of audit interfaces
-- to use. If the linker finds an object with an audit entry while
-- searching for shared libraries, it will add a corresponding
-- `DT_DEPAUDIT' entry in the output file. This option is only
-- meaningful on ELF platforms supporting the rtld-audit interface.
--
--`-A ARCHITECTURE'
--`--architecture=ARCHITECTURE'
-- In the current release of `ld', this option is useful only for the
-- Intel 960 family of architectures. In that `ld' configuration, the
-- ARCHITECTURE argument identifies the particular architecture in
-- the 960 family, enabling some safeguards and modifying the
-- archive-library search path. *Note `ld' and the Intel 960 family:
-- i960, for details.
--
-- Future releases of `ld' may support similar functionality for
-- other architecture families.
--
--`-b INPUT-FORMAT'
--`--format=INPUT-FORMAT'
-- `ld' may be configured to support more than one kind of object
-- file. If your `ld' is configured this way, you can use the `-b'
-- option to specify the binary format for input object files that
-- follow this option on the command line. Even when `ld' is
-- configured to support alternative object formats, you don't
-- usually need to specify this, as `ld' should be configured to
-- expect as a default input format the most usual format on each
-- machine. INPUT-FORMAT is a text string, the name of a particular
-- format supported by the BFD libraries. (You can list the
-- available binary formats with `objdump -i'.) *Note BFD::.
--
-- You may want to use this option if you are linking files with an
-- unusual binary format. You can also use `-b' to switch formats
-- explicitly (when linking object files of different formats), by
-- including `-b INPUT-FORMAT' before each group of object files in a
-- particular format.
--
-- The default format is taken from the environment variable
-- `GNUTARGET'. *Note Environment::. You can also define the input
-- format from a script, using the command `TARGET'; see *Note Format
-- Commands::.
--
--`-c MRI-COMMANDFILE'
--`--mri-script=MRI-COMMANDFILE'
-- For compatibility with linkers produced by MRI, `ld' accepts script
-- files written in an alternate, restricted command language,
-- described in *Note MRI Compatible Script Files: MRI. Introduce
-- MRI script files with the option `-c'; use the `-T' option to run
-- linker scripts written in the general-purpose `ld' scripting
-- language. If MRI-CMDFILE does not exist, `ld' looks for it in the
-- directories specified by any `-L' options.
--
--`-d'
--`-dc'
--`-dp'
-- These three options are equivalent; multiple forms are supported
-- for compatibility with other linkers. They assign space to common
-- symbols even if a relocatable output file is specified (with
-- `-r'). The script command `FORCE_COMMON_ALLOCATION' has the same
-- effect. *Note Miscellaneous Commands::.
--
--`--depaudit AUDITLIB'
--`-P AUDITLIB'
-- Adds AUDITLIB to the `DT_DEPAUDIT' entry of the dynamic section.
-- AUDITLIB is not checked for existence, nor will it use the
-- DT_SONAME specified in the library. If specified multiple times
-- `DT_DEPAUDIT' will contain a colon separated list of audit
-- interfaces to use. This option is only meaningful on ELF
-- platforms supporting the rtld-audit interface. The -P option is
-- provided for Solaris compatibility.
--
--`-e ENTRY'
--`--entry=ENTRY'
-- Use ENTRY as the explicit symbol for beginning execution of your
-- program, rather than the default entry point. If there is no
-- symbol named ENTRY, the linker will try to parse ENTRY as a number,
-- and use that as the entry address (the number will be interpreted
-- in base 10; you may use a leading `0x' for base 16, or a leading
-- `0' for base 8). *Note Entry Point::, for a discussion of defaults
-- and other ways of specifying the entry point.
--
--`--exclude-libs LIB,LIB,...'
-- Specifies a list of archive libraries from which symbols should
-- not be automatically exported. The library names may be delimited
-- by commas or colons. Specifying `--exclude-libs ALL' excludes
-- symbols in all archive libraries from automatic export. This
-- option is available only for the i386 PE targeted port of the
-- linker and for ELF targeted ports. For i386 PE, symbols
-- explicitly listed in a .def file are still exported, regardless of
-- this option. For ELF targeted ports, symbols affected by this
-- option will be treated as hidden.
--
--`--exclude-modules-for-implib MODULE,MODULE,...'
-- Specifies a list of object files or archive members, from which
-- symbols should not be automatically exported, but which should be
-- copied wholesale into the import library being generated during
-- the link. The module names may be delimited by commas or colons,
-- and must match exactly the filenames used by `ld' to open the
-- files; for archive members, this is simply the member name, but
-- for object files the name listed must include and match precisely
-- any path used to specify the input file on the linker's
-- command-line. This option is available only for the i386 PE
-- targeted port of the linker. Symbols explicitly listed in a .def
-- file are still exported, regardless of this option.
--
--`-E'
--`--export-dynamic'
--`--no-export-dynamic'
-- When creating a dynamically linked executable, using the `-E'
-- option or the `--export-dynamic' option causes the linker to add
-- all symbols to the dynamic symbol table. The dynamic symbol table
-- is the set of symbols which are visible from dynamic objects at
-- run time.
--
-- If you do not use either of these options (or use the
-- `--no-export-dynamic' option to restore the default behavior), the
-- dynamic symbol table will normally contain only those symbols
-- which are referenced by some dynamic object mentioned in the link.
--
-- If you use `dlopen' to load a dynamic object which needs to refer
-- back to the symbols defined by the program, rather than some other
-- dynamic object, then you will probably need to use this option when
-- linking the program itself.
--
-- You can also use the dynamic list to control what symbols should
-- be added to the dynamic symbol table if the output format supports
-- it. See the description of `--dynamic-list'.
--
-- Note that this option is specific to ELF targeted ports. PE
-- targets support a similar function to export all symbols from a
-- DLL or EXE; see the description of `--export-all-symbols' below.
--
--`-EB'
-- Link big-endian objects. This affects the default output format.
--
--`-EL'
-- Link little-endian objects. This affects the default output
-- format.
--
--`-f NAME'
--`--auxiliary=NAME'
-- When creating an ELF shared object, set the internal DT_AUXILIARY
-- field to the specified name. This tells the dynamic linker that
-- the symbol table of the shared object should be used as an
-- auxiliary filter on the symbol table of the shared object NAME.
--
-- If you later link a program against this filter object, then, when
-- you run the program, the dynamic linker will see the DT_AUXILIARY
-- field. If the dynamic linker resolves any symbols from the filter
-- object, it will first check whether there is a definition in the
-- shared object NAME. If there is one, it will be used instead of
-- the definition in the filter object. The shared object NAME need
-- not exist. Thus the shared object NAME may be used to provide an
-- alternative implementation of certain functions, perhaps for
-- debugging or for machine specific performance.
--
-- This option may be specified more than once. The DT_AUXILIARY
-- entries will be created in the order in which they appear on the
-- command line.
--
--`-F NAME'
--`--filter=NAME'
-- When creating an ELF shared object, set the internal DT_FILTER
-- field to the specified name. This tells the dynamic linker that
-- the symbol table of the shared object which is being created
-- should be used as a filter on the symbol table of the shared
-- object NAME.
--
-- If you later link a program against this filter object, then, when
-- you run the program, the dynamic linker will see the DT_FILTER
-- field. The dynamic linker will resolve symbols according to the
-- symbol table of the filter object as usual, but it will actually
-- link to the definitions found in the shared object NAME. Thus the
-- filter object can be used to select a subset of the symbols
-- provided by the object NAME.
--
-- Some older linkers used the `-F' option throughout a compilation
-- toolchain for specifying object-file format for both input and
-- output object files. The GNU linker uses other mechanisms for
-- this purpose: the `-b', `--format', `--oformat' options, the
-- `TARGET' command in linker scripts, and the `GNUTARGET'
-- environment variable. The GNU linker will ignore the `-F' option
-- when not creating an ELF shared object.
--
--`-fini=NAME'
-- When creating an ELF executable or shared object, call NAME when
-- the executable or shared object is unloaded, by setting DT_FINI to
-- the address of the function. By default, the linker uses `_fini'
-- as the function to call.
--
--`-g'
-- Ignored. Provided for compatibility with other tools.
--
--`-G VALUE'
--`--gpsize=VALUE'
-- Set the maximum size of objects to be optimized using the GP
-- register to SIZE. This is only meaningful for object file formats
-- such as MIPS ELF that support putting large and small objects into
-- different sections. This is ignored for other object file formats.
--
--`-h NAME'
--`-soname=NAME'
-- When creating an ELF shared object, set the internal DT_SONAME
-- field to the specified name. When an executable is linked with a
-- shared object which has a DT_SONAME field, then when the
-- executable is run the dynamic linker will attempt to load the
-- shared object specified by the DT_SONAME field rather than the
-- using the file name given to the linker.
--
--`-i'
-- Perform an incremental link (same as option `-r').
--
--`-init=NAME'
-- When creating an ELF executable or shared object, call NAME when
-- the executable or shared object is loaded, by setting DT_INIT to
-- the address of the function. By default, the linker uses `_init'
-- as the function to call.
--
--`-l NAMESPEC'
--`--library=NAMESPEC'
-- Add the archive or object file specified by NAMESPEC to the list
-- of files to link. This option may be used any number of times.
-- If NAMESPEC is of the form `:FILENAME', `ld' will search the
-- library path for a file called FILENAME, otherwise it will search
-- the library path for a file called `libNAMESPEC.a'.
--
-- On systems which support shared libraries, `ld' may also search for
-- files other than `libNAMESPEC.a'. Specifically, on ELF and SunOS
-- systems, `ld' will search a directory for a library called
-- `libNAMESPEC.so' before searching for one called `libNAMESPEC.a'.
-- (By convention, a `.so' extension indicates a shared library.)
-- Note that this behavior does not apply to `:FILENAME', which
-- always specifies a file called FILENAME.
--
-- The linker will search an archive only once, at the location where
-- it is specified on the command line. If the archive defines a
-- symbol which was undefined in some object which appeared before
-- the archive on the command line, the linker will include the
-- appropriate file(s) from the archive. However, an undefined
-- symbol in an object appearing later on the command line will not
-- cause the linker to search the archive again.
--
-- See the `-(' option for a way to force the linker to search
-- archives multiple times.
--
-- You may list the same archive multiple times on the command line.
--
-- This type of archive searching is standard for Unix linkers.
-- However, if you are using `ld' on AIX, note that it is different
-- from the behaviour of the AIX linker.
--
--`-L SEARCHDIR'
--`--library-path=SEARCHDIR'
-- Add path SEARCHDIR to the list of paths that `ld' will search for
-- archive libraries and `ld' control scripts. You may use this
-- option any number of times. The directories are searched in the
-- order in which they are specified on the command line.
-- Directories specified on the command line are searched before the
-- default directories. All `-L' options apply to all `-l' options,
-- regardless of the order in which the options appear. `-L' options
-- do not affect how `ld' searches for a linker script unless `-T'
-- option is specified.
--
-- If SEARCHDIR begins with `=', then the `=' will be replaced by the
-- "sysroot prefix", a path specified when the linker is configured.
--
-- The default set of paths searched (without being specified with
-- `-L') depends on which emulation mode `ld' is using, and in some
-- cases also on how it was configured. *Note Environment::.
--
-- The paths can also be specified in a link script with the
-- `SEARCH_DIR' command. Directories specified this way are searched
-- at the point in which the linker script appears in the command
-- line.
--
--`-m EMULATION'
-- Emulate the EMULATION linker. You can list the available
-- emulations with the `--verbose' or `-V' options.
--
-- If the `-m' option is not used, the emulation is taken from the
-- `LDEMULATION' environment variable, if that is defined.
--
-- Otherwise, the default emulation depends upon how the linker was
-- configured.
--
--`-M'
--`--print-map'
-- Print a link map to the standard output. A link map provides
-- information about the link, including the following:
--
-- * Where object files are mapped into memory.
--
-- * How common symbols are allocated.
--
-- * All archive members included in the link, with a mention of
-- the symbol which caused the archive member to be brought in.
--
-- * The values assigned to symbols.
--
-- Note - symbols whose values are computed by an expression
-- which involves a reference to a previous value of the same
-- symbol may not have correct result displayed in the link map.
-- This is because the linker discards intermediate results and
-- only retains the final value of an expression. Under such
-- circumstances the linker will display the final value
-- enclosed by square brackets. Thus for example a linker
-- script containing:
--
-- foo = 1
-- foo = foo * 4
-- foo = foo + 8
--
-- will produce the following output in the link map if the `-M'
-- option is used:
--
-- 0x00000001 foo = 0x1
-- [0x0000000c] foo = (foo * 0x4)
-- [0x0000000c] foo = (foo + 0x8)
--
-- See *Note Expressions:: for more information about
-- expressions in linker scripts.
--
--`-n'
--`--nmagic'
-- Turn off page alignment of sections, and disable linking against
-- shared libraries. If the output format supports Unix style magic
-- numbers, mark the output as `NMAGIC'.
--
--`-N'
--`--omagic'
-- Set the text and data sections to be readable and writable. Also,
-- do not page-align the data segment, and disable linking against
-- shared libraries. If the output format supports Unix style magic
-- numbers, mark the output as `OMAGIC'. Note: Although a writable
-- text section is allowed for PE-COFF targets, it does not conform
-- to the format specification published by Microsoft.
--
--`--no-omagic'
-- This option negates most of the effects of the `-N' option. It
-- sets the text section to be read-only, and forces the data segment
-- to be page-aligned. Note - this option does not enable linking
-- against shared libraries. Use `-Bdynamic' for this.
--
--`-o OUTPUT'
--`--output=OUTPUT'
-- Use OUTPUT as the name for the program produced by `ld'; if this
-- option is not specified, the name `a.out' is used by default. The
-- script command `OUTPUT' can also specify the output file name.
--
--`-O LEVEL'
-- If LEVEL is a numeric values greater than zero `ld' optimizes the
-- output. This might take significantly longer and therefore
-- probably should only be enabled for the final binary. At the
-- moment this option only affects ELF shared library generation.
-- Future releases of the linker may make more use of this option.
-- Also currently there is no difference in the linker's behaviour
-- for different non-zero values of this option. Again this may
-- change with future releases.
--
--`-q'
--`--emit-relocs'
-- Leave relocation sections and contents in fully linked executables.
-- Post link analysis and optimization tools may need this
-- information in order to perform correct modifications of
-- executables. This results in larger executables.
--
-- This option is currently only supported on ELF platforms.
--
--`--force-dynamic'
-- Force the output file to have dynamic sections. This option is
-- specific to VxWorks targets.
--
--`-r'
--`--relocatable'
-- Generate relocatable output--i.e., generate an output file that
-- can in turn serve as input to `ld'. This is often called "partial
-- linking". As a side effect, in environments that support standard
-- Unix magic numbers, this option also sets the output file's magic
-- number to `OMAGIC'. If this option is not specified, an absolute
-- file is produced. When linking C++ programs, this option _will
-- not_ resolve references to constructors; to do that, use `-Ur'.
--
-- When an input file does not have the same format as the output
-- file, partial linking is only supported if that input file does
-- not contain any relocations. Different output formats can have
-- further restrictions; for example some `a.out'-based formats do
-- not support partial linking with input files in other formats at
-- all.
--
-- This option does the same thing as `-i'.
--
--`-R FILENAME'
--`--just-symbols=FILENAME'
-- Read symbol names and their addresses from FILENAME, but do not
-- relocate it or include it in the output. This allows your output
-- file to refer symbolically to absolute locations of memory defined
-- in other programs. You may use this option more than once.
--
-- For compatibility with other ELF linkers, if the `-R' option is
-- followed by a directory name, rather than a file name, it is
-- treated as the `-rpath' option.
--
--`-s'
--`--strip-all'
-- Omit all symbol information from the output file.
--
--`-S'
--`--strip-debug'
-- Omit debugger symbol information (but not all symbols) from the
-- output file.
--
--`-t'
--`--trace'
-- Print the names of the input files as `ld' processes them.
--
--`-T SCRIPTFILE'
--`--script=SCRIPTFILE'
-- Use SCRIPTFILE as the linker script. This script replaces `ld''s
-- default linker script (rather than adding to it), so COMMANDFILE
-- must specify everything necessary to describe the output file.
-- *Note Scripts::. If SCRIPTFILE does not exist in the current
-- directory, `ld' looks for it in the directories specified by any
-- preceding `-L' options. Multiple `-T' options accumulate.
--
--`-dT SCRIPTFILE'
--`--default-script=SCRIPTFILE'
-- Use SCRIPTFILE as the default linker script. *Note Scripts::.
--
-- This option is similar to the `--script' option except that
-- processing of the script is delayed until after the rest of the
-- command line has been processed. This allows options placed after
-- the `--default-script' option on the command line to affect the
-- behaviour of the linker script, which can be important when the
-- linker command line cannot be directly controlled by the user.
-- (eg because the command line is being constructed by another tool,
-- such as `gcc').
--
--`-u SYMBOL'
--`--undefined=SYMBOL'
-- Force SYMBOL to be entered in the output file as an undefined
-- symbol. Doing this may, for example, trigger linking of additional
-- modules from standard libraries. `-u' may be repeated with
-- different option arguments to enter additional undefined symbols.
-- This option is equivalent to the `EXTERN' linker script command.
--
--`-Ur'
-- For anything other than C++ programs, this option is equivalent to
-- `-r': it generates relocatable output--i.e., an output file that
-- can in turn serve as input to `ld'. When linking C++ programs,
-- `-Ur' _does_ resolve references to constructors, unlike `-r'. It
-- does not work to use `-Ur' on files that were themselves linked
-- with `-Ur'; once the constructor table has been built, it cannot
-- be added to. Use `-Ur' only for the last partial link, and `-r'
-- for the others.
--
--`--unique[=SECTION]'
-- Creates a separate output section for every input section matching
-- SECTION, or if the optional wildcard SECTION argument is missing,
-- for every orphan input section. An orphan section is one not
-- specifically mentioned in a linker script. You may use this option
-- multiple times on the command line; It prevents the normal
-- merging of input sections with the same name, overriding output
-- section assignments in a linker script.
--
--`-v'
--`--version'
--`-V'
-- Display the version number for `ld'. The `-V' option also lists
-- the supported emulations.
--
--`-x'
--`--discard-all'
-- Delete all local symbols.
--
--`-X'
--`--discard-locals'
-- Delete all temporary local symbols. (These symbols start with
-- system-specific local label prefixes, typically `.L' for ELF
-- systems or `L' for traditional a.out systems.)
--
--`-y SYMBOL'
--`--trace-symbol=SYMBOL'
-- Print the name of each linked file in which SYMBOL appears. This
-- option may be given any number of times. On many systems it is
-- necessary to prepend an underscore.
--
-- This option is useful when you have an undefined symbol in your
-- link but don't know where the reference is coming from.
--
--`-Y PATH'
-- Add PATH to the default library search path. This option exists
-- for Solaris compatibility.
--
--`-z KEYWORD'
-- The recognized keywords are:
-- `combreloc'
-- Combines multiple reloc sections and sorts them to make
-- dynamic symbol lookup caching possible.
--
-- `defs'
-- Disallows undefined symbols in object files. Undefined
-- symbols in shared libraries are still allowed.
--
-- `execstack'
-- Marks the object as requiring executable stack.
--
-- `global'
-- This option is only meaningful when building a shared object.
-- It makes the symbols defined by this shared object available
-- for symbol resolution of subsequently loaded libraries.
--
-- `initfirst'
-- This option is only meaningful when building a shared object.
-- It marks the object so that its runtime initialization will
-- occur before the runtime initialization of any other objects
-- brought into the process at the same time. Similarly the
-- runtime finalization of the object will occur after the
-- runtime finalization of any other objects.
--
-- `interpose'
-- Marks the object that its symbol table interposes before all
-- symbols but the primary executable.
--
-- `lazy'
-- When generating an executable or shared library, mark it to
-- tell the dynamic linker to defer function call resolution to
-- the point when the function is called (lazy binding), rather
-- than at load time. Lazy binding is the default.
--
-- `loadfltr'
-- Marks the object that its filters be processed immediately at
-- runtime.
--
-- `muldefs'
-- Allows multiple definitions.
--
-- `nocombreloc'
-- Disables multiple reloc sections combining.
--
-- `nocopyreloc'
-- Disables production of copy relocs.
--
-- `nodefaultlib'
-- Marks the object that the search for dependencies of this
-- object will ignore any default library search paths.
--
-- `nodelete'
-- Marks the object shouldn't be unloaded at runtime.
--
-- `nodlopen'
-- Marks the object not available to `dlopen'.
--
-- `nodump'
-- Marks the object can not be dumped by `dldump'.
--
-- `noexecstack'
-- Marks the object as not requiring executable stack.
--
-- `norelro'
-- Don't create an ELF `PT_GNU_RELRO' segment header in the
-- object.
--
-- `now'
-- When generating an executable or shared library, mark it to
-- tell the dynamic linker to resolve all symbols when the
-- program is started, or when the shared library is linked to
-- using dlopen, instead of deferring function call resolution
-- to the point when the function is first called.
--
-- `origin'
-- Marks the object may contain $ORIGIN.
--
-- `relro'
-- Create an ELF `PT_GNU_RELRO' segment header in the object.
--
-- `max-page-size=VALUE'
-- Set the emulation maximum page size to VALUE.
--
-- `common-page-size=VALUE'
-- Set the emulation common page size to VALUE.
--
-- `stack-size=VALUE'
-- Specify a stack size for in an ELF `PT_GNU_STACK' segment.
-- Specifying zero will override any default non-zero sized
-- `PT_GNU_STACK' segment creation.
--
--
-- Other keywords are ignored for Solaris compatibility.
--
--`-( ARCHIVES -)'
--`--start-group ARCHIVES --end-group'
-- The ARCHIVES should be a list of archive files. They may be
-- either explicit file names, or `-l' options.
--
-- The specified archives are searched repeatedly until no new
-- undefined references are created. Normally, an archive is
-- searched only once in the order that it is specified on the
-- command line. If a symbol in that archive is needed to resolve an
-- undefined symbol referred to by an object in an archive that
-- appears later on the command line, the linker would not be able to
-- resolve that reference. By grouping the archives, they all be
-- searched repeatedly until all possible references are resolved.
--
-- Using this option has a significant performance cost. It is best
-- to use it only when there are unavoidable circular references
-- between two or more archives.
--
--`--accept-unknown-input-arch'
--`--no-accept-unknown-input-arch'
-- Tells the linker to accept input files whose architecture cannot be
-- recognised. The assumption is that the user knows what they are
-- doing and deliberately wants to link in these unknown input files.
-- This was the default behaviour of the linker, before release
-- 2.14. The default behaviour from release 2.14 onwards is to
-- reject such input files, and so the `--accept-unknown-input-arch'
-- option has been added to restore the old behaviour.
--
--`--as-needed'
--`--no-as-needed'
-- This option affects ELF DT_NEEDED tags for dynamic libraries
-- mentioned on the command line after the `--as-needed' option.
-- Normally the linker will add a DT_NEEDED tag for each dynamic
-- library mentioned on the command line, regardless of whether the
-- library is actually needed or not. `--as-needed' causes a
-- DT_NEEDED tag to only be emitted for a library that _at that point
-- in the link_ satisfies a non-weak undefined symbol reference from
-- a regular object file or, if the library is not found in the
-- DT_NEEDED lists of other libraries, a non-weak undefined symbol
-- reference from another dynamic library. Object files or libraries
-- appearing on the command line _after_ the library in question do
-- not affect whether the library is seen as needed. This is similar
-- to the rules for extraction of object files from archives.
-- `--no-as-needed' restores the default behaviour.
--
--`--add-needed'
--`--no-add-needed'
-- These two options have been deprecated because of the similarity of
-- their names to the `--as-needed' and `--no-as-needed' options.
-- They have been replaced by `--copy-dt-needed-entries' and
-- `--no-copy-dt-needed-entries'.
--
--`-assert KEYWORD'
-- This option is ignored for SunOS compatibility.
--
--`-Bdynamic'
--`-dy'
--`-call_shared'
-- Link against dynamic libraries. This is only meaningful on
-- platforms for which shared libraries are supported. This option
-- is normally the default on such platforms. The different variants
-- of this option are for compatibility with various systems. You
-- may use this option multiple times on the command line: it affects
-- library searching for `-l' options which follow it.
--
--`-Bgroup'
-- Set the `DF_1_GROUP' flag in the `DT_FLAGS_1' entry in the dynamic
-- section. This causes the runtime linker to handle lookups in this
-- object and its dependencies to be performed only inside the group.
-- `--unresolved-symbols=report-all' is implied. This option is only
-- meaningful on ELF platforms which support shared libraries.
--
--`-Bstatic'
--`-dn'
--`-non_shared'
--`-static'
-- Do not link against shared libraries. This is only meaningful on
-- platforms for which shared libraries are supported. The different
-- variants of this option are for compatibility with various
-- systems. You may use this option multiple times on the command
-- line: it affects library searching for `-l' options which follow
-- it. This option also implies `--unresolved-symbols=report-all'.
-- This option can be used with `-shared'. Doing so means that a
-- shared library is being created but that all of the library's
-- external references must be resolved by pulling in entries from
-- static libraries.
--
--`-Bsymbolic'
-- When creating a shared library, bind references to global symbols
-- to the definition within the shared library, if any. Normally, it
-- is possible for a program linked against a shared library to
-- override the definition within the shared library. This option is
-- only meaningful on ELF platforms which support shared libraries.
--
--`-Bsymbolic-functions'
-- When creating a shared library, bind references to global function
-- symbols to the definition within the shared library, if any. This
-- option is only meaningful on ELF platforms which support shared
-- libraries.
--
--`--dynamic-list=DYNAMIC-LIST-FILE'
-- Specify the name of a dynamic list file to the linker. This is
-- typically used when creating shared libraries to specify a list of
-- global symbols whose references shouldn't be bound to the
-- definition within the shared library, or creating dynamically
-- linked executables to specify a list of symbols which should be
-- added to the symbol table in the executable. This option is only
-- meaningful on ELF platforms which support shared libraries.
--
-- The format of the dynamic list is the same as the version node
-- without scope and node name. See *Note VERSION:: for more
-- information.
--
--`--dynamic-list-data'
-- Include all global data symbols to the dynamic list.
--
--`--dynamic-list-cpp-new'
-- Provide the builtin dynamic list for C++ operator new and delete.
-- It is mainly useful for building shared libstdc++.
--
--`--dynamic-list-cpp-typeinfo'
-- Provide the builtin dynamic list for C++ runtime type
-- identification.
--
--`--check-sections'
--`--no-check-sections'
-- Asks the linker _not_ to check section addresses after they have
-- been assigned to see if there are any overlaps. Normally the
-- linker will perform this check, and if it finds any overlaps it
-- will produce suitable error messages. The linker does know about,
-- and does make allowances for sections in overlays. The default
-- behaviour can be restored by using the command line switch
-- `--check-sections'. Section overlap is not usually checked for
-- relocatable links. You can force checking in that case by using
-- the `--check-sections' option.
--
--`--copy-dt-needed-entries'
--`--no-copy-dt-needed-entries'
-- This option affects the treatment of dynamic libraries referred to
-- by DT_NEEDED tags _inside_ ELF dynamic libraries mentioned on the
-- command line. Normally the linker won't add a DT_NEEDED tag to the
-- output binary for each library mentioned in a DT_NEEDED tag in an
-- input dynamic library. With `--copy-dt-needed-entries' specified
-- on the command line however any dynamic libraries that follow it
-- will have their DT_NEEDED entries added. The default behaviour
-- can be restored with `--no-copy-dt-needed-entries'.
--
-- This option also has an effect on the resolution of symbols in
-- dynamic libraries. With `--copy-dt-needed-entries' dynamic
-- libraries mentioned on the command line will be recursively
-- searched, following their DT_NEEDED tags to other libraries, in
-- order to resolve symbols required by the output binary. With the
-- default setting however the searching of dynamic libraries that
-- follow it will stop with the dynamic library itself. No DT_NEEDED
-- links will be traversed to resolve symbols.
--
--`--cref'
-- Output a cross reference table. If a linker map file is being
-- generated, the cross reference table is printed to the map file.
-- Otherwise, it is printed on the standard output.
--
-- The format of the table is intentionally simple, so that it may be
-- easily processed by a script if necessary. The symbols are
-- printed out, sorted by name. For each symbol, a list of file
-- names is given. If the symbol is defined, the first file listed
-- is the location of the definition. If the symbol is defined as a
-- common value then any files where this happens appear next.
-- Finally any files that reference the symbol are listed.
--
--`--no-define-common'
-- This option inhibits the assignment of addresses to common symbols.
-- The script command `INHIBIT_COMMON_ALLOCATION' has the same effect.
-- *Note Miscellaneous Commands::.
--
-- The `--no-define-common' option allows decoupling the decision to
-- assign addresses to Common symbols from the choice of the output
-- file type; otherwise a non-Relocatable output type forces
-- assigning addresses to Common symbols. Using `--no-define-common'
-- allows Common symbols that are referenced from a shared library to
-- be assigned addresses only in the main program. This eliminates
-- the unused duplicate space in the shared library, and also
-- prevents any possible confusion over resolving to the wrong
-- duplicate when there are many dynamic modules with specialized
-- search paths for runtime symbol resolution.
--
--`--defsym=SYMBOL=EXPRESSION'
-- Create a global symbol in the output file, containing the absolute
-- address given by EXPRESSION. You may use this option as many
-- times as necessary to define multiple symbols in the command line.
-- A limited form of arithmetic is supported for the EXPRESSION in
-- this context: you may give a hexadecimal constant or the name of
-- an existing symbol, or use `+' and `-' to add or subtract
-- hexadecimal constants or symbols. If you need more elaborate
-- expressions, consider using the linker command language from a
-- script (*note Assignment: Symbol Definitions: Assignments.).
-- _Note:_ there should be no white space between SYMBOL, the equals
-- sign ("<=>"), and EXPRESSION.
--
--`--demangle[=STYLE]'
--`--no-demangle'
-- These options control whether to demangle symbol names in error
-- messages and other output. When the linker is told to demangle,
-- it tries to present symbol names in a readable fashion: it strips
-- leading underscores if they are used by the object file format,
-- and converts C++ mangled symbol names into user readable names.
-- Different compilers have different mangling styles. The optional
-- demangling style argument can be used to choose an appropriate
-- demangling style for your compiler. The linker will demangle by
-- default unless the environment variable `COLLECT_NO_DEMANGLE' is
-- set. These options may be used to override the default.
--
--`-IFILE'
--`--dynamic-linker=FILE'
-- Set the name of the dynamic linker. This is only meaningful when
-- generating dynamically linked ELF executables. The default dynamic
-- linker is normally correct; don't use this unless you know what
-- you are doing.
--
--`--fatal-warnings'
--`--no-fatal-warnings'
-- Treat all warnings as errors. The default behaviour can be
-- restored with the option `--no-fatal-warnings'.
--
--`--force-exe-suffix'
-- Make sure that an output file has a .exe suffix.
--
-- If a successfully built fully linked output file does not have a
-- `.exe' or `.dll' suffix, this option forces the linker to copy the
-- output file to one of the same name with a `.exe' suffix. This
-- option is useful when using unmodified Unix makefiles on a
-- Microsoft Windows host, since some versions of Windows won't run
-- an image unless it ends in a `.exe' suffix.
--
--`--gc-sections'
--`--no-gc-sections'
-- Enable garbage collection of unused input sections. It is ignored
-- on targets that do not support this option. The default behaviour
-- (of not performing this garbage collection) can be restored by
-- specifying `--no-gc-sections' on the command line.
--
-- `--gc-sections' decides which input sections are used by examining
-- symbols and relocations. The section containing the entry symbol
-- and all sections containing symbols undefined on the command-line
-- will be kept, as will sections containing symbols referenced by
-- dynamic objects. Note that when building shared libraries, the
-- linker must assume that any visible symbol is referenced. Once
-- this initial set of sections has been determined, the linker
-- recursively marks as used any section referenced by their
-- relocations. See `--entry' and `--undefined'.
--
-- This option can be set when doing a partial link (enabled with
-- option `-r'). In this case the root of symbols kept must be
-- explicitly specified either by an `--entry' or `--undefined'
-- option or by a `ENTRY' command in the linker script.
--
--`--print-gc-sections'
--`--no-print-gc-sections'
-- List all sections removed by garbage collection. The listing is
-- printed on stderr. This option is only effective if garbage
-- collection has been enabled via the `--gc-sections') option. The
-- default behaviour (of not listing the sections that are removed)
-- can be restored by specifying `--no-print-gc-sections' on the
-- command line.
--
--`--print-output-format'
-- Print the name of the default output format (perhaps influenced by
-- other command-line options). This is the string that would appear
-- in an `OUTPUT_FORMAT' linker script command (*note File
-- Commands::).
--
--`--help'
-- Print a summary of the command-line options on the standard output
-- and exit.
--
--`--target-help'
-- Print a summary of all target specific options on the standard
-- output and exit.
--
--`-Map=MAPFILE'
-- Print a link map to the file MAPFILE. See the description of the
-- `-M' option, above.
--
--`--no-keep-memory'
-- `ld' normally optimizes for speed over memory usage by caching the
-- symbol tables of input files in memory. This option tells `ld' to
-- instead optimize for memory usage, by rereading the symbol tables
-- as necessary. This may be required if `ld' runs out of memory
-- space while linking a large executable.
--
--`--no-undefined'
--`-z defs'
-- Report unresolved symbol references from regular object files.
-- This is done even if the linker is creating a non-symbolic shared
-- library. The switch `--[no-]allow-shlib-undefined' controls the
-- behaviour for reporting unresolved references found in shared
-- libraries being linked in.
--
--`--allow-multiple-definition'
--`-z muldefs'
-- Normally when a symbol is defined multiple times, the linker will
-- report a fatal error. These options allow multiple definitions and
-- the first definition will be used.
--
--`--allow-shlib-undefined'
--`--no-allow-shlib-undefined'
-- Allows or disallows undefined symbols in shared libraries. This
-- switch is similar to `--no-undefined' except that it determines
-- the behaviour when the undefined symbols are in a shared library
-- rather than a regular object file. It does not affect how
-- undefined symbols in regular object files are handled.
--
-- The default behaviour is to report errors for any undefined symbols
-- referenced in shared libraries if the linker is being used to
-- create an executable, but to allow them if the linker is being
-- used to create a shared library.
--
-- The reasons for allowing undefined symbol references in shared
-- libraries specified at link time are that:
--
-- * A shared library specified at link time may not be the same
-- as the one that is available at load time, so the symbol
-- might actually be resolvable at load time.
--
-- * There are some operating systems, eg BeOS and HPPA, where
-- undefined symbols in shared libraries are normal.
--
-- The BeOS kernel for example patches shared libraries at load
-- time to select whichever function is most appropriate for the
-- current architecture. This is used, for example, to
-- dynamically select an appropriate memset function.
--
--`--no-undefined-version'
-- Normally when a symbol has an undefined version, the linker will
-- ignore it. This option disallows symbols with undefined version
-- and a fatal error will be issued instead.
--
--`--default-symver'
-- Create and use a default symbol version (the soname) for
-- unversioned exported symbols.
--
--`--default-imported-symver'
-- Create and use a default symbol version (the soname) for
-- unversioned imported symbols.
--
--`--no-warn-mismatch'
-- Normally `ld' will give an error if you try to link together input
-- files that are mismatched for some reason, perhaps because they
-- have been compiled for different processors or for different
-- endiannesses. This option tells `ld' that it should silently
-- permit such possible errors. This option should only be used with
-- care, in cases when you have taken some special action that
-- ensures that the linker errors are inappropriate.
--
--`--no-warn-search-mismatch'
-- Normally `ld' will give a warning if it finds an incompatible
-- library during a library search. This option silences the warning.
--
--`--no-whole-archive'
-- Turn off the effect of the `--whole-archive' option for subsequent
-- archive files.
--
--`--noinhibit-exec'
-- Retain the executable output file whenever it is still usable.
-- Normally, the linker will not produce an output file if it
-- encounters errors during the link process; it exits without
-- writing an output file when it issues any error whatsoever.
--
--`-nostdlib'
-- Only search library directories explicitly specified on the
-- command line. Library directories specified in linker scripts
-- (including linker scripts specified on the command line) are
-- ignored.
--
--`--oformat=OUTPUT-FORMAT'
-- `ld' may be configured to support more than one kind of object
-- file. If your `ld' is configured this way, you can use the
-- `--oformat' option to specify the binary format for the output
-- object file. Even when `ld' is configured to support alternative
-- object formats, you don't usually need to specify this, as `ld'
-- should be configured to produce as a default output format the most
-- usual format on each machine. OUTPUT-FORMAT is a text string, the
-- name of a particular format supported by the BFD libraries. (You
-- can list the available binary formats with `objdump -i'.) The
-- script command `OUTPUT_FORMAT' can also specify the output format,
-- but this option overrides it. *Note BFD::.
--
--`-pie'
--`--pic-executable'
-- Create a position independent executable. This is currently only
-- supported on ELF platforms. Position independent executables are
-- similar to shared libraries in that they are relocated by the
-- dynamic linker to the virtual address the OS chooses for them
-- (which can vary between invocations). Like normal dynamically
-- linked executables they can be executed and symbols defined in the
-- executable cannot be overridden by shared libraries.
--
--`-qmagic'
-- This option is ignored for Linux compatibility.
--
--`-Qy'
-- This option is ignored for SVR4 compatibility.
--
--`--relax'
--`--no-relax'
-- An option with machine dependent effects. This option is only
-- supported on a few targets. *Note `ld' and the H8/300: H8/300.
-- *Note `ld' and the Intel 960 family: i960. *Note `ld' and Xtensa
-- Processors: Xtensa. *Note `ld' and the 68HC11 and 68HC12:
-- M68HC11/68HC12. *Note `ld' and PowerPC 32-bit ELF Support:
-- PowerPC ELF32.
--
-- On some platforms the `--relax' option performs target specific,
-- global optimizations that become possible when the linker resolves
-- addressing in the program, such as relaxing address modes,
-- synthesizing new instructions, selecting shorter version of current
-- instructions, and combining constant values.
--
-- On some platforms these link time global optimizations may make
-- symbolic debugging of the resulting executable impossible. This
-- is known to be the case for the Matsushita MN10200 and MN10300
-- family of processors.
--
-- On platforms where this is not supported, `--relax' is accepted,
-- but ignored.
--
-- On platforms where `--relax' is accepted the option `--no-relax'
-- can be used to disable the feature.
--
--`--retain-symbols-file=FILENAME'
-- Retain _only_ the symbols listed in the file FILENAME, discarding
-- all others. FILENAME is simply a flat file, with one symbol name
-- per line. This option is especially useful in environments (such
-- as VxWorks) where a large global symbol table is accumulated
-- gradually, to conserve run-time memory.
--
-- `--retain-symbols-file' does _not_ discard undefined symbols, or
-- symbols needed for relocations.
--
-- You may only specify `--retain-symbols-file' once in the command
-- line. It overrides `-s' and `-S'.
--
--`-rpath=DIR'
-- Add a directory to the runtime library search path. This is used
-- when linking an ELF executable with shared objects. All `-rpath'
-- arguments are concatenated and passed to the runtime linker, which
-- uses them to locate shared objects at runtime. The `-rpath'
-- option is also used when locating shared objects which are needed
-- by shared objects explicitly included in the link; see the
-- description of the `-rpath-link' option. If `-rpath' is not used
-- when linking an ELF executable, the contents of the environment
-- variable `LD_RUN_PATH' will be used if it is defined.
--
-- The `-rpath' option may also be used on SunOS. By default, on
-- SunOS, the linker will form a runtime search patch out of all the
-- `-L' options it is given. If a `-rpath' option is used, the
-- runtime search path will be formed exclusively using the `-rpath'
-- options, ignoring the `-L' options. This can be useful when using
-- gcc, which adds many `-L' options which may be on NFS mounted file
-- systems.
--
-- For compatibility with other ELF linkers, if the `-R' option is
-- followed by a directory name, rather than a file name, it is
-- treated as the `-rpath' option.
--
--`-rpath-link=DIR'
-- When using ELF or SunOS, one shared library may require another.
-- This happens when an `ld -shared' link includes a shared library
-- as one of the input files.
--
-- When the linker encounters such a dependency when doing a
-- non-shared, non-relocatable link, it will automatically try to
-- locate the required shared library and include it in the link, if
-- it is not included explicitly. In such a case, the `-rpath-link'
-- option specifies the first set of directories to search. The
-- `-rpath-link' option may specify a sequence of directory names
-- either by specifying a list of names separated by colons, or by
-- appearing multiple times.
--
-- This option should be used with caution as it overrides the search
-- path that may have been hard compiled into a shared library. In
-- such a case it is possible to use unintentionally a different
-- search path than the runtime linker would do.
--
-- The linker uses the following search paths to locate required
-- shared libraries:
-- 1. Any directories specified by `-rpath-link' options.
--
-- 2. Any directories specified by `-rpath' options. The difference
-- between `-rpath' and `-rpath-link' is that directories
-- specified by `-rpath' options are included in the executable
-- and used at runtime, whereas the `-rpath-link' option is only
-- effective at link time. Searching `-rpath' in this way is
-- only supported by native linkers and cross linkers which have
-- been configured with the `--with-sysroot' option.
--
-- 3. On an ELF system, for native linkers, if the `-rpath' and
-- `-rpath-link' options were not used, search the contents of
-- the environment variable `LD_RUN_PATH'.
--
-- 4. On SunOS, if the `-rpath' option was not used, search any
-- directories specified using `-L' options.
--
-- 5. For a native linker, search the contents of the environment
-- variable `LD_LIBRARY_PATH'.
--
-- 6. For a native ELF linker, the directories in `DT_RUNPATH' or
-- `DT_RPATH' of a shared library are searched for shared
-- libraries needed by it. The `DT_RPATH' entries are ignored if
-- `DT_RUNPATH' entries exist.
--
-- 7. The default directories, normally `/lib' and `/usr/lib'.
--
-- 8. For a native linker on an ELF system, if the file
-- `/etc/ld.so.conf' exists, the list of directories found in
-- that file.
--
-- If the required shared library is not found, the linker will issue
-- a warning and continue with the link.
--
--`-shared'
--`-Bshareable'
-- Create a shared library. This is currently only supported on ELF,
-- XCOFF and SunOS platforms. On SunOS, the linker will
-- automatically create a shared library if the `-e' option is not
-- used and there are undefined symbols in the link.
--
--`--sort-common'
--`--sort-common=ascending'
--`--sort-common=descending'
-- This option tells `ld' to sort the common symbols by alignment in
-- ascending or descending order when it places them in the
-- appropriate output sections. The symbol alignments considered are
-- sixteen-byte or larger, eight-byte, four-byte, two-byte, and
-- one-byte. This is to prevent gaps between symbols due to alignment
-- constraints. If no sorting order is specified, then descending
-- order is assumed.
--
--`--sort-section=name'
-- This option will apply `SORT_BY_NAME' to all wildcard section
-- patterns in the linker script.
--
--`--sort-section=alignment'
-- This option will apply `SORT_BY_ALIGNMENT' to all wildcard section
-- patterns in the linker script.
--
--`--split-by-file[=SIZE]'
-- Similar to `--split-by-reloc' but creates a new output section for
-- each input file when SIZE is reached. SIZE defaults to a size of
-- 1 if not given.
--
--`--split-by-reloc[=COUNT]'
-- Tries to creates extra sections in the output file so that no
-- single output section in the file contains more than COUNT
-- relocations. This is useful when generating huge relocatable
-- files for downloading into certain real time kernels with the COFF
-- object file format; since COFF cannot represent more than 65535
-- relocations in a single section. Note that this will fail to work
-- with object file formats which do not support arbitrary sections.
-- The linker will not split up individual input sections for
-- redistribution, so if a single input section contains more than
-- COUNT relocations one output section will contain that many
-- relocations. COUNT defaults to a value of 32768.
--
--`--stats'
-- Compute and display statistics about the operation of the linker,
-- such as execution time and memory usage.
--
--`--sysroot=DIRECTORY'
-- Use DIRECTORY as the location of the sysroot, overriding the
-- configure-time default. This option is only supported by linkers
-- that were configured using `--with-sysroot'.
--
--`--traditional-format'
-- For some targets, the output of `ld' is different in some ways from
-- the output of some existing linker. This switch requests `ld' to
-- use the traditional format instead.
--
-- For example, on SunOS, `ld' combines duplicate entries in the
-- symbol string table. This can reduce the size of an output file
-- with full debugging information by over 30 percent.
-- Unfortunately, the SunOS `dbx' program can not read the resulting
-- program (`gdb' has no trouble). The `--traditional-format' switch
-- tells `ld' to not combine duplicate entries.
--
--`--section-start=SECTIONNAME=ORG'
-- Locate a section in the output file at the absolute address given
-- by ORG. You may use this option as many times as necessary to
-- locate multiple sections in the command line. ORG must be a
-- single hexadecimal integer; for compatibility with other linkers,
-- you may omit the leading `0x' usually associated with hexadecimal
-- values. _Note:_ there should be no white space between
-- SECTIONNAME, the equals sign ("<=>"), and ORG.
--
--`-Tbss=ORG'
--`-Tdata=ORG'
--`-Ttext=ORG'
-- Same as `--section-start', with `.bss', `.data' or `.text' as the
-- SECTIONNAME.
--
--`-Ttext-segment=ORG'
-- When creating an ELF executable or shared object, it will set the
-- address of the first byte of the text segment.
--
--`-Trodata-segment=ORG'
-- When creating an ELF executable or shared object for a target where
-- the read-only data is in its own segment separate from the
-- executable text, it will set the address of the first byte of the
-- read-only data segment.
--
--`-Tldata-segment=ORG'
-- When creating an ELF executable or shared object for x86-64 medium
-- memory model, it will set the address of the first byte of the
-- ldata segment.
--
--`--unresolved-symbols=METHOD'
-- Determine how to handle unresolved symbols. There are four
-- possible values for `method':
--
-- `ignore-all'
-- Do not report any unresolved symbols.
--
-- `report-all'
-- Report all unresolved symbols. This is the default.
--
-- `ignore-in-object-files'
-- Report unresolved symbols that are contained in shared
-- libraries, but ignore them if they come from regular object
-- files.
--
-- `ignore-in-shared-libs'
-- Report unresolved symbols that come from regular object
-- files, but ignore them if they come from shared libraries.
-- This can be useful when creating a dynamic binary and it is
-- known that all the shared libraries that it should be
-- referencing are included on the linker's command line.
--
-- The behaviour for shared libraries on their own can also be
-- controlled by the `--[no-]allow-shlib-undefined' option.
--
-- Normally the linker will generate an error message for each
-- reported unresolved symbol but the option
-- `--warn-unresolved-symbols' can change this to a warning.
--
--`--dll-verbose'
--`--verbose[=NUMBER]'
-- Display the version number for `ld' and list the linker emulations
-- supported. Display which input files can and cannot be opened.
-- Display the linker script being used by the linker. If the
-- optional NUMBER argument > 1, plugin symbol status will also be
-- displayed.
--
--`--version-script=VERSION-SCRIPTFILE'
-- Specify the name of a version script to the linker. This is
-- typically used when creating shared libraries to specify
-- additional information about the version hierarchy for the library
-- being created. This option is only fully supported on ELF
-- platforms which support shared libraries; see *Note VERSION::. It
-- is partially supported on PE platforms, which can use version
-- scripts to filter symbol visibility in auto-export mode: any
-- symbols marked `local' in the version script will not be exported.
-- *Note WIN32::.
--
--`--warn-common'
-- Warn when a common symbol is combined with another common symbol
-- or with a symbol definition. Unix linkers allow this somewhat
-- sloppy practice, but linkers on some other operating systems do
-- not. This option allows you to find potential problems from
-- combining global symbols. Unfortunately, some C libraries use
-- this practice, so you may get some warnings about symbols in the
-- libraries as well as in your programs.
--
-- There are three kinds of global symbols, illustrated here by C
-- examples:
--
-- `int i = 1;'
-- A definition, which goes in the initialized data section of
-- the output file.
--
-- `extern int i;'
-- An undefined reference, which does not allocate space. There
-- must be either a definition or a common symbol for the
-- variable somewhere.
--
-- `int i;'
-- A common symbol. If there are only (one or more) common
-- symbols for a variable, it goes in the uninitialized data
-- area of the output file. The linker merges multiple common
-- symbols for the same variable into a single symbol. If they
-- are of different sizes, it picks the largest size. The
-- linker turns a common symbol into a declaration, if there is
-- a definition of the same variable.
--
-- The `--warn-common' option can produce five kinds of warnings.
-- Each warning consists of a pair of lines: the first describes the
-- symbol just encountered, and the second describes the previous
-- symbol encountered with the same name. One or both of the two
-- symbols will be a common symbol.
--
-- 1. Turning a common symbol into a reference, because there is
-- already a definition for the symbol.
-- FILE(SECTION): warning: common of `SYMBOL'
-- overridden by definition
-- FILE(SECTION): warning: defined here
--
-- 2. Turning a common symbol into a reference, because a later
-- definition for the symbol is encountered. This is the same
-- as the previous case, except that the symbols are encountered
-- in a different order.
-- FILE(SECTION): warning: definition of `SYMBOL'
-- overriding common
-- FILE(SECTION): warning: common is here
--
-- 3. Merging a common symbol with a previous same-sized common
-- symbol.
-- FILE(SECTION): warning: multiple common
-- of `SYMBOL'
-- FILE(SECTION): warning: previous common is here
--
-- 4. Merging a common symbol with a previous larger common symbol.
-- FILE(SECTION): warning: common of `SYMBOL'
-- overridden by larger common
-- FILE(SECTION): warning: larger common is here
--
-- 5. Merging a common symbol with a previous smaller common
-- symbol. This is the same as the previous case, except that
-- the symbols are encountered in a different order.
-- FILE(SECTION): warning: common of `SYMBOL'
-- overriding smaller common
-- FILE(SECTION): warning: smaller common is here
--
--`--warn-constructors'
-- Warn if any global constructors are used. This is only useful for
-- a few object file formats. For formats like COFF or ELF, the
-- linker can not detect the use of global constructors.
--
--`--warn-multiple-gp'
-- Warn if multiple global pointer values are required in the output
-- file. This is only meaningful for certain processors, such as the
-- Alpha. Specifically, some processors put large-valued constants
-- in a special section. A special register (the global pointer)
-- points into the middle of this section, so that constants can be
-- loaded efficiently via a base-register relative addressing mode.
-- Since the offset in base-register relative mode is fixed and
-- relatively small (e.g., 16 bits), this limits the maximum size of
-- the constant pool. Thus, in large programs, it is often necessary
-- to use multiple global pointer values in order to be able to
-- address all possible constants. This option causes a warning to
-- be issued whenever this case occurs.
--
--`--warn-once'
-- Only warn once for each undefined symbol, rather than once per
-- module which refers to it.
--
--`--warn-section-align'
-- Warn if the address of an output section is changed because of
-- alignment. Typically, the alignment will be set by an input
-- section. The address will only be changed if it not explicitly
-- specified; that is, if the `SECTIONS' command does not specify a
-- start address for the section (*note SECTIONS::).
--
--`--warn-shared-textrel'
-- Warn if the linker adds a DT_TEXTREL to a shared object.
--
--`--warn-alternate-em'
-- Warn if an object has alternate ELF machine code.
--
--`--warn-unresolved-symbols'
-- If the linker is going to report an unresolved symbol (see the
-- option `--unresolved-symbols') it will normally generate an error.
-- This option makes it generate a warning instead.
--
--`--error-unresolved-symbols'
-- This restores the linker's default behaviour of generating errors
-- when it is reporting unresolved symbols.
--
--`--whole-archive'
-- For each archive mentioned on the command line after the
-- `--whole-archive' option, include every object file in the archive
-- in the link, rather than searching the archive for the required
-- object files. This is normally used to turn an archive file into
-- a shared library, forcing every object to be included in the
-- resulting shared library. This option may be used more than once.
--
-- Two notes when using this option from gcc: First, gcc doesn't know
-- about this option, so you have to use `-Wl,-whole-archive'.
-- Second, don't forget to use `-Wl,-no-whole-archive' after your
-- list of archives, because gcc will add its own list of archives to
-- your link and you may not want this flag to affect those as well.
--
--`--wrap=SYMBOL'
-- Use a wrapper function for SYMBOL. Any undefined reference to
-- SYMBOL will be resolved to `__wrap_SYMBOL'. Any undefined
-- reference to `__real_SYMBOL' will be resolved to SYMBOL.
--
-- This can be used to provide a wrapper for a system function. The
-- wrapper function should be called `__wrap_SYMBOL'. If it wishes
-- to call the system function, it should call `__real_SYMBOL'.
--
-- Here is a trivial example:
--
-- void *
-- __wrap_malloc (size_t c)
-- {
-- printf ("malloc called with %zu\n", c);
-- return __real_malloc (c);
-- }
--
-- If you link other code with this file using `--wrap malloc', then
-- all calls to `malloc' will call the function `__wrap_malloc'
-- instead. The call to `__real_malloc' in `__wrap_malloc' will call
-- the real `malloc' function.
--
-- You may wish to provide a `__real_malloc' function as well, so that
-- links without the `--wrap' option will succeed. If you do this,
-- you should not put the definition of `__real_malloc' in the same
-- file as `__wrap_malloc'; if you do, the assembler may resolve the
-- call before the linker has a chance to wrap it to `malloc'.
--
--`--eh-frame-hdr'
-- Request creation of `.eh_frame_hdr' section and ELF
-- `PT_GNU_EH_FRAME' segment header.
--
--`--no-ld-generated-unwind-info'
-- Request creation of `.eh_frame' unwind info for linker generated
-- code sections like PLT. This option is on by default if linker
-- generated unwind info is supported.
--
--`--enable-new-dtags'
--`--disable-new-dtags'
-- This linker can create the new dynamic tags in ELF. But the older
-- ELF systems may not understand them. If you specify
-- `--enable-new-dtags', the new dynamic tags will be created as
-- needed and older dynamic tags will be omitted. If you specify
-- `--disable-new-dtags', no new dynamic tags will be created. By
-- default, the new dynamic tags are not created. Note that those
-- options are only available for ELF systems.
--
--`--hash-size=NUMBER'
-- Set the default size of the linker's hash tables to a prime number
-- close to NUMBER. Increasing this value can reduce the length of
-- time it takes the linker to perform its tasks, at the expense of
-- increasing the linker's memory requirements. Similarly reducing
-- this value can reduce the memory requirements at the expense of
-- speed.
--
--`--hash-style=STYLE'
-- Set the type of linker's hash table(s). STYLE can be either
-- `sysv' for classic ELF `.hash' section, `gnu' for new style GNU
-- `.gnu.hash' section or `both' for both the classic ELF `.hash' and
-- new style GNU `.gnu.hash' hash tables. The default is `sysv'.
--
--`--reduce-memory-overheads'
-- This option reduces memory requirements at ld runtime, at the
-- expense of linking speed. This was introduced to select the old
-- O(n^2) algorithm for link map file generation, rather than the new
-- O(n) algorithm which uses about 40% more memory for symbol storage.
--
-- Another effect of the switch is to set the default hash table size
-- to 1021, which again saves memory at the cost of lengthening the
-- linker's run time. This is not done however if the `--hash-size'
-- switch has been used.
--
-- The `--reduce-memory-overheads' switch may be also be used to
-- enable other tradeoffs in future versions of the linker.
--
--`--build-id'
--`--build-id=STYLE'
-- Request creation of `.note.gnu.build-id' ELF note section. The
-- contents of the note are unique bits identifying this linked file.
-- STYLE can be `uuid' to use 128 random bits, `sha1' to use a
-- 160-bit SHA1 hash on the normative parts of the output contents,
-- `md5' to use a 128-bit MD5 hash on the normative parts of the
-- output contents, or `0xHEXSTRING' to use a chosen bit string
-- specified as an even number of hexadecimal digits (`-' and `:'
-- characters between digit pairs are ignored). If STYLE is omitted,
-- `sha1' is used.
--
-- The `md5' and `sha1' styles produces an identifier that is always
-- the same in an identical output file, but will be unique among all
-- nonidentical output files. It is not intended to be compared as a
-- checksum for the file's contents. A linked file may be changed
-- later by other tools, but the build ID bit string identifying the
-- original linked file does not change.
--
-- Passing `none' for STYLE disables the setting from any
-- `--build-id' options earlier on the command line.
--
--2.1.1 Options Specific to i386 PE Targets
-------------------------------------------
--
--The i386 PE linker supports the `-shared' option, which causes the
--output to be a dynamically linked library (DLL) instead of a normal
--executable. You should name the output `*.dll' when you use this
--option. In addition, the linker fully supports the standard `*.def'
--files, which may be specified on the linker command line like an object
--file (in fact, it should precede archives it exports symbols from, to
--ensure that they get linked in, just like a normal object file).
--
-- In addition to the options common to all targets, the i386 PE linker
--support additional command line options that are specific to the i386
--PE target. Options that take values may be separated from their values
--by either a space or an equals sign.
--
--`--add-stdcall-alias'
-- If given, symbols with a stdcall suffix (@NN) will be exported
-- as-is and also with the suffix stripped. [This option is specific
-- to the i386 PE targeted port of the linker]
--
--`--base-file FILE'
-- Use FILE as the name of a file in which to save the base addresses
-- of all the relocations needed for generating DLLs with `dlltool'.
-- [This is an i386 PE specific option]
--
--`--dll'
-- Create a DLL instead of a regular executable. You may also use
-- `-shared' or specify a `LIBRARY' in a given `.def' file. [This
-- option is specific to the i386 PE targeted port of the linker]
--
--`--enable-long-section-names'
--`--disable-long-section-names'
-- The PE variants of the Coff object format add an extension that
-- permits the use of section names longer than eight characters, the
-- normal limit for Coff. By default, these names are only allowed
-- in object files, as fully-linked executable images do not carry
-- the Coff string table required to support the longer names. As a
-- GNU extension, it is possible to allow their use in executable
-- images as well, or to (probably pointlessly!) disallow it in
-- object files, by using these two options. Executable images
-- generated with these long section names are slightly non-standard,
-- carrying as they do a string table, and may generate confusing
-- output when examined with non-GNU PE-aware tools, such as file
-- viewers and dumpers. However, GDB relies on the use of PE long
-- section names to find Dwarf-2 debug information sections in an
-- executable image at runtime, and so if neither option is specified
-- on the command-line, `ld' will enable long section names,
-- overriding the default and technically correct behaviour, when it
-- finds the presence of debug information while linking an executable
-- image and not stripping symbols. [This option is valid for all PE
-- targeted ports of the linker]
--
--`--enable-stdcall-fixup'
--`--disable-stdcall-fixup'
-- If the link finds a symbol that it cannot resolve, it will attempt
-- to do "fuzzy linking" by looking for another defined symbol that
-- differs only in the format of the symbol name (cdecl vs stdcall)
-- and will resolve that symbol by linking to the match. For
-- example, the undefined symbol `_foo' might be linked to the
-- function `_foo@12', or the undefined symbol `_bar@16' might be
-- linked to the function `_bar'. When the linker does this, it
-- prints a warning, since it normally should have failed to link,
-- but sometimes import libraries generated from third-party dlls may
-- need this feature to be usable. If you specify
-- `--enable-stdcall-fixup', this feature is fully enabled and
-- warnings are not printed. If you specify
-- `--disable-stdcall-fixup', this feature is disabled and such
-- mismatches are considered to be errors. [This option is specific
-- to the i386 PE targeted port of the linker]
--
--`--leading-underscore'
--`--no-leading-underscore'
-- For most targets default symbol-prefix is an underscore and is
-- defined in target's description. By this option it is possible to
-- disable/enable the default underscore symbol-prefix.
--
--`--export-all-symbols'
-- If given, all global symbols in the objects used to build a DLL
-- will be exported by the DLL. Note that this is the default if
-- there otherwise wouldn't be any exported symbols. When symbols are
-- explicitly exported via DEF files or implicitly exported via
-- function attributes, the default is to not export anything else
-- unless this option is given. Note that the symbols `DllMain@12',
-- `DllEntryPoint@0', `DllMainCRTStartup@12', and `impure_ptr' will
-- not be automatically exported. Also, symbols imported from other
-- DLLs will not be re-exported, nor will symbols specifying the
-- DLL's internal layout such as those beginning with `_head_' or
-- ending with `_iname'. In addition, no symbols from `libgcc',
-- `libstd++', `libmingw32', or `crtX.o' will be exported. Symbols
-- whose names begin with `__rtti_' or `__builtin_' will not be
-- exported, to help with C++ DLLs. Finally, there is an extensive
-- list of cygwin-private symbols that are not exported (obviously,
-- this applies on when building DLLs for cygwin targets). These
-- cygwin-excludes are: `_cygwin_dll_entry@12',
-- `_cygwin_crt0_common@8', `_cygwin_noncygwin_dll_entry@12',
-- `_fmode', `_impure_ptr', `cygwin_attach_dll', `cygwin_premain0',
-- `cygwin_premain1', `cygwin_premain2', `cygwin_premain3', and
-- `environ'. [This option is specific to the i386 PE targeted port
-- of the linker]
--
--`--exclude-symbols SYMBOL,SYMBOL,...'
-- Specifies a list of symbols which should not be automatically
-- exported. The symbol names may be delimited by commas or colons.
-- [This option is specific to the i386 PE targeted port of the
-- linker]
--
--`--exclude-all-symbols'
-- Specifies no symbols should be automatically exported. [This
-- option is specific to the i386 PE targeted port of the linker]
--
--`--file-alignment'
-- Specify the file alignment. Sections in the file will always
-- begin at file offsets which are multiples of this number. This
-- defaults to 512. [This option is specific to the i386 PE targeted
-- port of the linker]
--
--`--heap RESERVE'
--`--heap RESERVE,COMMIT'
-- Specify the number of bytes of memory to reserve (and optionally
-- commit) to be used as heap for this program. The default is 1MB
-- reserved, 4K committed. [This option is specific to the i386 PE
-- targeted port of the linker]
--
--`--image-base VALUE'
-- Use VALUE as the base address of your program or dll. This is the
-- lowest memory location that will be used when your program or dll
-- is loaded. To reduce the need to relocate and improve performance
-- of your dlls, each should have a unique base address and not
-- overlap any other dlls. The default is 0x400000 for executables,
-- and 0x10000000 for dlls. [This option is specific to the i386 PE
-- targeted port of the linker]
--
--`--kill-at'
-- If given, the stdcall suffixes (@NN) will be stripped from symbols
-- before they are exported. [This option is specific to the i386 PE
-- targeted port of the linker]
--
--`--large-address-aware'
-- If given, the appropriate bit in the "Characteristics" field of
-- the COFF header is set to indicate that this executable supports
-- virtual addresses greater than 2 gigabytes. This should be used
-- in conjunction with the /3GB or /USERVA=VALUE megabytes switch in
-- the "[operating systems]" section of the BOOT.INI. Otherwise,
-- this bit has no effect. [This option is specific to PE targeted
-- ports of the linker]
--
--`--disable-large-address-aware'
-- Reverts the effect of a previous `--large-address-aware' option.
-- This is useful if `--large-address-aware' is always set by the
-- compiler driver (e.g. Cygwin gcc) and the executable does not
-- support virtual addresses greater than 2 gigabytes. [This option
-- is specific to PE targeted ports of the linker]
--
--`--major-image-version VALUE'
-- Sets the major number of the "image version". Defaults to 1.
-- [This option is specific to the i386 PE targeted port of the
-- linker]
--
--`--major-os-version VALUE'
-- Sets the major number of the "os version". Defaults to 4. [This
-- option is specific to the i386 PE targeted port of the linker]
--
--`--major-subsystem-version VALUE'
-- Sets the major number of the "subsystem version". Defaults to 4.
-- [This option is specific to the i386 PE targeted port of the
-- linker]
--
--`--minor-image-version VALUE'
-- Sets the minor number of the "image version". Defaults to 0.
-- [This option is specific to the i386 PE targeted port of the
-- linker]
--
--`--minor-os-version VALUE'
-- Sets the minor number of the "os version". Defaults to 0. [This
-- option is specific to the i386 PE targeted port of the linker]
--
--`--minor-subsystem-version VALUE'
-- Sets the minor number of the "subsystem version". Defaults to 0.
-- [This option is specific to the i386 PE targeted port of the
-- linker]
--
--`--output-def FILE'
-- The linker will create the file FILE which will contain a DEF file
-- corresponding to the DLL the linker is generating. This DEF file
-- (which should be called `*.def') may be used to create an import
-- library with `dlltool' or may be used as a reference to
-- automatically or implicitly exported symbols. [This option is
-- specific to the i386 PE targeted port of the linker]
--
--`--out-implib FILE'
-- The linker will create the file FILE which will contain an import
-- lib corresponding to the DLL the linker is generating. This import
-- lib (which should be called `*.dll.a' or `*.a' may be used to link
-- clients against the generated DLL; this behaviour makes it
-- possible to skip a separate `dlltool' import library creation step.
-- [This option is specific to the i386 PE targeted port of the
-- linker]
--
--`--enable-auto-image-base'
-- Automatically choose the image base for DLLs, unless one is
-- specified using the `--image-base' argument. By using a hash
-- generated from the dllname to create unique image bases for each
-- DLL, in-memory collisions and relocations which can delay program
-- execution are avoided. [This option is specific to the i386 PE
-- targeted port of the linker]
--
--`--disable-auto-image-base'
-- Do not automatically generate a unique image base. If there is no
-- user-specified image base (`--image-base') then use the platform
-- default. [This option is specific to the i386 PE targeted port of
-- the linker]
--
--`--dll-search-prefix STRING'
-- When linking dynamically to a dll without an import library,
-- search for `<string><basename>.dll' in preference to
-- `lib<basename>.dll'. This behaviour allows easy distinction
-- between DLLs built for the various "subplatforms": native, cygwin,
-- uwin, pw, etc. For instance, cygwin DLLs typically use
-- `--dll-search-prefix=cyg'. [This option is specific to the i386
-- PE targeted port of the linker]
--
--`--enable-auto-import'
-- Do sophisticated linking of `_symbol' to `__imp__symbol' for DATA
-- imports from DLLs, and create the necessary thunking symbols when
-- building the import libraries with those DATA exports. Note: Use
-- of the 'auto-import' extension will cause the text section of the
-- image file to be made writable. This does not conform to the
-- PE-COFF format specification published by Microsoft.
--
-- Note - use of the 'auto-import' extension will also cause read only
-- data which would normally be placed into the .rdata section to be
-- placed into the .data section instead. This is in order to work
-- around a problem with consts that is described here:
-- http://www.cygwin.com/ml/cygwin/2004-09/msg01101.html
--
-- Using 'auto-import' generally will 'just work' - but sometimes you
-- may see this message:
--
-- "variable '<var>' can't be auto-imported. Please read the
-- documentation for ld's `--enable-auto-import' for details."
--
-- This message occurs when some (sub)expression accesses an address
-- ultimately given by the sum of two constants (Win32 import tables
-- only allow one). Instances where this may occur include accesses
-- to member fields of struct variables imported from a DLL, as well
-- as using a constant index into an array variable imported from a
-- DLL. Any multiword variable (arrays, structs, long long, etc) may
-- trigger this error condition. However, regardless of the exact
-- data type of the offending exported variable, ld will always
-- detect it, issue the warning, and exit.
--
-- There are several ways to address this difficulty, regardless of
-- the data type of the exported variable:
--
-- One way is to use -enable-runtime-pseudo-reloc switch. This leaves
-- the task of adjusting references in your client code for runtime
-- environment, so this method works only when runtime environment
-- supports this feature.
--
-- A second solution is to force one of the 'constants' to be a
-- variable - that is, unknown and un-optimizable at compile time.
-- For arrays, there are two possibilities: a) make the indexee (the
-- array's address) a variable, or b) make the 'constant' index a
-- variable. Thus:
--
-- extern type extern_array[];
-- extern_array[1] -->
-- { volatile type *t=extern_array; t[1] }
--
-- or
--
-- extern type extern_array[];
-- extern_array[1] -->
-- { volatile int t=1; extern_array[t] }
--
-- For structs (and most other multiword data types) the only option
-- is to make the struct itself (or the long long, or the ...)
-- variable:
--
-- extern struct s extern_struct;
-- extern_struct.field -->
-- { volatile struct s *t=&extern_struct; t->field }
--
-- or
--
-- extern long long extern_ll;
-- extern_ll -->
-- { volatile long long * local_ll=&extern_ll; *local_ll }
--
-- A third method of dealing with this difficulty is to abandon
-- 'auto-import' for the offending symbol and mark it with
-- `__declspec(dllimport)'. However, in practice that requires using
-- compile-time #defines to indicate whether you are building a DLL,
-- building client code that will link to the DLL, or merely
-- building/linking to a static library. In making the choice
-- between the various methods of resolving the 'direct address with
-- constant offset' problem, you should consider typical real-world
-- usage:
--
-- Original:
-- --foo.h
-- extern int arr[];
-- --foo.c
-- #include "foo.h"
-- void main(int argc, char **argv){
-- printf("%d\n",arr[1]);
-- }
--
-- Solution 1:
-- --foo.h
-- extern int arr[];
-- --foo.c
-- #include "foo.h"
-- void main(int argc, char **argv){
-- /* This workaround is for win32 and cygwin; do not "optimize" */
-- volatile int *parr = arr;
-- printf("%d\n",parr[1]);
-- }
--
-- Solution 2:
-- --foo.h
-- /* Note: auto-export is assumed (no __declspec(dllexport)) */
-- #if (defined(_WIN32) || defined(__CYGWIN__)) && \
-- !(defined(FOO_BUILD_DLL) || defined(FOO_STATIC))
-- #define FOO_IMPORT __declspec(dllimport)
-- #else
-- #define FOO_IMPORT
-- #endif
-- extern FOO_IMPORT int arr[];
-- --foo.c
-- #include "foo.h"
-- void main(int argc, char **argv){
-- printf("%d\n",arr[1]);
-- }
--
-- A fourth way to avoid this problem is to re-code your library to
-- use a functional interface rather than a data interface for the
-- offending variables (e.g. set_foo() and get_foo() accessor
-- functions). [This option is specific to the i386 PE targeted port
-- of the linker]
--
--`--disable-auto-import'
-- Do not attempt to do sophisticated linking of `_symbol' to
-- `__imp__symbol' for DATA imports from DLLs. [This option is
-- specific to the i386 PE targeted port of the linker]
--
--`--enable-runtime-pseudo-reloc'
-- If your code contains expressions described in -enable-auto-import
-- section, that is, DATA imports from DLL with non-zero offset, this
-- switch will create a vector of 'runtime pseudo relocations' which
-- can be used by runtime environment to adjust references to such
-- data in your client code. [This option is specific to the i386 PE
-- targeted port of the linker]
--
--`--disable-runtime-pseudo-reloc'
-- Do not create pseudo relocations for non-zero offset DATA imports
-- from DLLs. [This option is specific to the i386 PE targeted port
-- of the linker]
--
--`--enable-extra-pe-debug'
-- Show additional debug info related to auto-import symbol thunking.
-- [This option is specific to the i386 PE targeted port of the
-- linker]
--
--`--section-alignment'
-- Sets the section alignment. Sections in memory will always begin
-- at addresses which are a multiple of this number. Defaults to
-- 0x1000. [This option is specific to the i386 PE targeted port of
-- the linker]
--
--`--stack RESERVE'
--`--stack RESERVE,COMMIT'
-- Specify the number of bytes of memory to reserve (and optionally
-- commit) to be used as stack for this program. The default is 2MB
-- reserved, 4K committed. [This option is specific to the i386 PE
-- targeted port of the linker]
--
--`--subsystem WHICH'
--`--subsystem WHICH:MAJOR'
--`--subsystem WHICH:MAJOR.MINOR'
-- Specifies the subsystem under which your program will execute. The
-- legal values for WHICH are `native', `windows', `console',
-- `posix', and `xbox'. You may optionally set the subsystem version
-- also. Numeric values are also accepted for WHICH. [This option
-- is specific to the i386 PE targeted port of the linker]
--
-- The following options set flags in the `DllCharacteristics' field
-- of the PE file header: [These options are specific to PE targeted
-- ports of the linker]
--
--`--dynamicbase'
-- The image base address may be relocated using address space layout
-- randomization (ASLR). This feature was introduced with MS Windows
-- Vista for i386 PE targets.
--
--`--forceinteg'
-- Code integrity checks are enforced.
--
--`--nxcompat'
-- The image is compatible with the Data Execution Prevention. This
-- feature was introduced with MS Windows XP SP2 for i386 PE targets.
--
--`--no-isolation'
-- Although the image understands isolation, do not isolate the image.
--
--`--no-seh'
-- The image does not use SEH. No SE handler may be called from this
-- image.
--
--`--no-bind'
-- Do not bind this image.
--
--`--wdmdriver'
-- The driver uses the MS Windows Driver Model.
--
--`--tsaware'
-- The image is Terminal Server aware.
--
--`--insert-timestamp'
-- Insert a real timestamp into the image, rather than the default
-- value of zero. This will result in a slightly different results
-- with each invocation, which could be helpful for distributing
-- unique images.
--
--2.1.2 Options specific to C6X uClinux targets
-----------------------------------------------
--
--The C6X uClinux target uses a binary format called DSBT to support
--shared libraries. Each shared library in the system needs to have a
--unique index; all executables use an index of 0.
--
--`--dsbt-size SIZE'
-- This option sets the number of entires in the DSBT of the current
-- executable or shared library to SIZE. The default is to create a
-- table with 64 entries.
--
--`--dsbt-index INDEX'
-- This option sets the DSBT index of the current executable or
-- shared library to INDEX. The default is 0, which is appropriate
-- for generating executables. If a shared library is generated with
-- a DSBT index of 0, the `R_C6000_DSBT_INDEX' relocs are copied into
-- the output file.
--
-- The `--no-merge-exidx-entries' switch disables the merging of
-- adjacent exidx entries in frame unwind info.
--
--
--2.1.3 Options specific to Motorola 68HC11 and 68HC12 targets
--------------------------------------------------------------
--
--The 68HC11 and 68HC12 linkers support specific options to control the
--memory bank switching mapping and trampoline code generation.
--
--`--no-trampoline'
-- This option disables the generation of trampoline. By default a
-- trampoline is generated for each far function which is called
-- using a `jsr' instruction (this happens when a pointer to a far
-- function is taken).
--
--`--bank-window NAME'
-- This option indicates to the linker the name of the memory region
-- in the `MEMORY' specification that describes the memory bank
-- window. The definition of such region is then used by the linker
-- to compute paging and addresses within the memory window.
--
--
--2.1.4 Options specific to Motorola 68K target
-----------------------------------------------
--
--The following options are supported to control handling of GOT
--generation when linking for 68K targets.
--
--`--got=TYPE'
-- This option tells the linker which GOT generation scheme to use.
-- TYPE should be one of `single', `negative', `multigot' or
-- `target'. For more information refer to the Info entry for `ld'.
--
--
--2.1.5 Options specific to MIPS targets
----------------------------------------
--
--The following options are supported to control microMIPS instruction
--generation when linking for MIPS targets.
--
--`--insn32'
--`--no-insn32'
-- These options control the choice of microMIPS instructions used in
-- code generated by the linker, such as that in the PLT or lazy
-- binding stubs, or in relaxation. If `--insn32' is used, then the
-- linker only uses 32-bit instruction encodings. By default or if
-- `--no-insn32' is used, all instruction encodings are used,
-- including 16-bit ones where possible.
--
--
--
--File: ld.info, Node: Environment, Prev: Options, Up: Invocation
--
--2.2 Environment Variables
--=========================
--
--You can change the behaviour of `ld' with the environment variables
--`GNUTARGET', `LDEMULATION' and `COLLECT_NO_DEMANGLE'.
--
-- `GNUTARGET' determines the input-file object format if you don't use
--`-b' (or its synonym `--format'). Its value should be one of the BFD
--names for an input format (*note BFD::). If there is no `GNUTARGET' in
--the environment, `ld' uses the natural format of the target. If
--`GNUTARGET' is set to `default' then BFD attempts to discover the input
--format by examining binary input files; this method often succeeds, but
--there are potential ambiguities, since there is no method of ensuring
--that the magic number used to specify object-file formats is unique.
--However, the configuration procedure for BFD on each system places the
--conventional format for that system first in the search-list, so
--ambiguities are resolved in favor of convention.
--
-- `LDEMULATION' determines the default emulation if you don't use the
--`-m' option. The emulation can affect various aspects of linker
--behaviour, particularly the default linker script. You can list the
--available emulations with the `--verbose' or `-V' options. If the `-m'
--option is not used, and the `LDEMULATION' environment variable is not
--defined, the default emulation depends upon how the linker was
--configured.
--
-- Normally, the linker will default to demangling symbols. However, if
--`COLLECT_NO_DEMANGLE' is set in the environment, then it will default
--to not demangling symbols. This environment variable is used in a
--similar fashion by the `gcc' linker wrapper program. The default may
--be overridden by the `--demangle' and `--no-demangle' options.
--
--
--File: ld.info, Node: Scripts, Next: Machine Dependent, Prev: Invocation, Up: Top
--
--3 Linker Scripts
--****************
--
--Every link is controlled by a "linker script". This script is written
--in the linker command language.
--
-- The main purpose of the linker script is to describe how the
--sections in the input files should be mapped into the output file, and
--to control the memory layout of the output file. Most linker scripts
--do nothing more than this. However, when necessary, the linker script
--can also direct the linker to perform many other operations, using the
--commands described below.
--
-- The linker always uses a linker script. If you do not supply one
--yourself, the linker will use a default script that is compiled into the
--linker executable. You can use the `--verbose' command line option to
--display the default linker script. Certain command line options, such
--as `-r' or `-N', will affect the default linker script.
--
-- You may supply your own linker script by using the `-T' command line
--option. When you do this, your linker script will replace the default
--linker script.
--
-- You may also use linker scripts implicitly by naming them as input
--files to the linker, as though they were files to be linked. *Note
--Implicit Linker Scripts::.
--
--* Menu:
--
--* Basic Script Concepts:: Basic Linker Script Concepts
--* Script Format:: Linker Script Format
--* Simple Example:: Simple Linker Script Example
--* Simple Commands:: Simple Linker Script Commands
--* Assignments:: Assigning Values to Symbols
--* SECTIONS:: SECTIONS Command
--* MEMORY:: MEMORY Command
--* PHDRS:: PHDRS Command
--* VERSION:: VERSION Command
--* Expressions:: Expressions in Linker Scripts
--* Implicit Linker Scripts:: Implicit Linker Scripts
--
--
--File: ld.info, Node: Basic Script Concepts, Next: Script Format, Up: Scripts
--
--3.1 Basic Linker Script Concepts
--================================
--
--We need to define some basic concepts and vocabulary in order to
--describe the linker script language.
--
-- The linker combines input files into a single output file. The
--output file and each input file are in a special data format known as an
--"object file format". Each file is called an "object file". The
--output file is often called an "executable", but for our purposes we
--will also call it an object file. Each object file has, among other
--things, a list of "sections". We sometimes refer to a section in an
--input file as an "input section"; similarly, a section in the output
--file is an "output section".
--
-- Each section in an object file has a name and a size. Most sections
--also have an associated block of data, known as the "section contents".
--A section may be marked as "loadable", which means that the contents
--should be loaded into memory when the output file is run. A section
--with no contents may be "allocatable", which means that an area in
--memory should be set aside, but nothing in particular should be loaded
--there (in some cases this memory must be zeroed out). A section which
--is neither loadable nor allocatable typically contains some sort of
--debugging information.
--
-- Every loadable or allocatable output section has two addresses. The
--first is the "VMA", or virtual memory address. This is the address the
--section will have when the output file is run. The second is the
--"LMA", or load memory address. This is the address at which the
--section will be loaded. In most cases the two addresses will be the
--same. An example of when they might be different is when a data section
--is loaded into ROM, and then copied into RAM when the program starts up
--(this technique is often used to initialize global variables in a ROM
--based system). In this case the ROM address would be the LMA, and the
--RAM address would be the VMA.
--
-- You can see the sections in an object file by using the `objdump'
--program with the `-h' option.
--
-- Every object file also has a list of "symbols", known as the "symbol
--table". A symbol may be defined or undefined. Each symbol has a name,
--and each defined symbol has an address, among other information. If
--you compile a C or C++ program into an object file, you will get a
--defined symbol for every defined function and global or static
--variable. Every undefined function or global variable which is
--referenced in the input file will become an undefined symbol.
--
-- You can see the symbols in an object file by using the `nm' program,
--or by using the `objdump' program with the `-t' option.
--
--
--File: ld.info, Node: Script Format, Next: Simple Example, Prev: Basic Script Concepts, Up: Scripts
--
--3.2 Linker Script Format
--========================
--
--Linker scripts are text files.
--
-- You write a linker script as a series of commands. Each command is
--either a keyword, possibly followed by arguments, or an assignment to a
--symbol. You may separate commands using semicolons. Whitespace is
--generally ignored.
--
-- Strings such as file or format names can normally be entered
--directly. If the file name contains a character such as a comma which
--would otherwise serve to separate file names, you may put the file name
--in double quotes. There is no way to use a double quote character in a
--file name.
--
-- You may include comments in linker scripts just as in C, delimited by
--`/*' and `*/'. As in C, comments are syntactically equivalent to
--whitespace.
--
--
--File: ld.info, Node: Simple Example, Next: Simple Commands, Prev: Script Format, Up: Scripts
--
--3.3 Simple Linker Script Example
--================================
--
--Many linker scripts are fairly simple.
--
-- The simplest possible linker script has just one command:
--`SECTIONS'. You use the `SECTIONS' command to describe the memory
--layout of the output file.
--
-- The `SECTIONS' command is a powerful command. Here we will describe
--a simple use of it. Let's assume your program consists only of code,
--initialized data, and uninitialized data. These will be in the
--`.text', `.data', and `.bss' sections, respectively. Let's assume
--further that these are the only sections which appear in your input
--files.
--
-- For this example, let's say that the code should be loaded at address
--0x10000, and that the data should start at address 0x8000000. Here is a
--linker script which will do that:
-- SECTIONS
-- {
-- . = 0x10000;
-- .text : { *(.text) }
-- . = 0x8000000;
-- .data : { *(.data) }
-- .bss : { *(.bss) }
-- }
--
-- You write the `SECTIONS' command as the keyword `SECTIONS', followed
--by a series of symbol assignments and output section descriptions
--enclosed in curly braces.
--
-- The first line inside the `SECTIONS' command of the above example
--sets the value of the special symbol `.', which is the location
--counter. If you do not specify the address of an output section in some
--other way (other ways are described later), the address is set from the
--current value of the location counter. The location counter is then
--incremented by the size of the output section. At the start of the
--`SECTIONS' command, the location counter has the value `0'.
--
-- The second line defines an output section, `.text'. The colon is
--required syntax which may be ignored for now. Within the curly braces
--after the output section name, you list the names of the input sections
--which should be placed into this output section. The `*' is a wildcard
--which matches any file name. The expression `*(.text)' means all
--`.text' input sections in all input files.
--
-- Since the location counter is `0x10000' when the output section
--`.text' is defined, the linker will set the address of the `.text'
--section in the output file to be `0x10000'.
--
-- The remaining lines define the `.data' and `.bss' sections in the
--output file. The linker will place the `.data' output section at
--address `0x8000000'. After the linker places the `.data' output
--section, the value of the location counter will be `0x8000000' plus the
--size of the `.data' output section. The effect is that the linker will
--place the `.bss' output section immediately after the `.data' output
--section in memory.
--
-- The linker will ensure that each output section has the required
--alignment, by increasing the location counter if necessary. In this
--example, the specified addresses for the `.text' and `.data' sections
--will probably satisfy any alignment constraints, but the linker may
--have to create a small gap between the `.data' and `.bss' sections.
--
-- That's it! That's a simple and complete linker script.
--
--
--File: ld.info, Node: Simple Commands, Next: Assignments, Prev: Simple Example, Up: Scripts
--
--3.4 Simple Linker Script Commands
--=================================
--
--In this section we describe the simple linker script commands.
--
--* Menu:
--
--* Entry Point:: Setting the entry point
--* File Commands:: Commands dealing with files
--
--* Format Commands:: Commands dealing with object file formats
--
--* REGION_ALIAS:: Assign alias names to memory regions
--* Miscellaneous Commands:: Other linker script commands
--
--
--File: ld.info, Node: Entry Point, Next: File Commands, Up: Simple Commands
--
--3.4.1 Setting the Entry Point
-------------------------------
--
--The first instruction to execute in a program is called the "entry
--point". You can use the `ENTRY' linker script command to set the entry
--point. The argument is a symbol name:
-- ENTRY(SYMBOL)
--
-- There are several ways to set the entry point. The linker will set
--the entry point by trying each of the following methods in order, and
--stopping when one of them succeeds:
-- * the `-e' ENTRY command-line option;
--
-- * the `ENTRY(SYMBOL)' command in a linker script;
--
-- * the value of a target specific symbol, if it is defined; For many
-- targets this is `start', but PE and BeOS based systems for example
-- check a list of possible entry symbols, matching the first one
-- found.
--
-- * the address of the first byte of the `.text' section, if present;
--
-- * The address `0'.
--
--
--File: ld.info, Node: File Commands, Next: Format Commands, Prev: Entry Point, Up: Simple Commands
--
--3.4.2 Commands Dealing with Files
-----------------------------------
--
--Several linker script commands deal with files.
--
--`INCLUDE FILENAME'
-- Include the linker script FILENAME at this point. The file will
-- be searched for in the current directory, and in any directory
-- specified with the `-L' option. You can nest calls to `INCLUDE'
-- up to 10 levels deep.
--
-- You can place `INCLUDE' directives at the top level, in `MEMORY' or
-- `SECTIONS' commands, or in output section descriptions.
--
--`INPUT(FILE, FILE, ...)'
--`INPUT(FILE FILE ...)'
-- The `INPUT' command directs the linker to include the named files
-- in the link, as though they were named on the command line.
--
-- For example, if you always want to include `subr.o' any time you do
-- a link, but you can't be bothered to put it on every link command
-- line, then you can put `INPUT (subr.o)' in your linker script.
--
-- In fact, if you like, you can list all of your input files in the
-- linker script, and then invoke the linker with nothing but a `-T'
-- option.
--
-- In case a "sysroot prefix" is configured, and the filename starts
-- with the `/' character, and the script being processed was located
-- inside the "sysroot prefix", the filename will be looked for in
-- the "sysroot prefix". Otherwise, the linker will try to open the
-- file in the current directory. If it is not found, the linker
-- will search through the archive library search path. See the
-- description of `-L' in *Note Command Line Options: Options.
--
-- If you use `INPUT (-lFILE)', `ld' will transform the name to
-- `libFILE.a', as with the command line argument `-l'.
--
-- When you use the `INPUT' command in an implicit linker script, the
-- files will be included in the link at the point at which the linker
-- script file is included. This can affect archive searching.
--
--`GROUP(FILE, FILE, ...)'
--`GROUP(FILE FILE ...)'
-- The `GROUP' command is like `INPUT', except that the named files
-- should all be archives, and they are searched repeatedly until no
-- new undefined references are created. See the description of `-('
-- in *Note Command Line Options: Options.
--
--`AS_NEEDED(FILE, FILE, ...)'
--`AS_NEEDED(FILE FILE ...)'
-- This construct can appear only inside of the `INPUT' or `GROUP'
-- commands, among other filenames. The files listed will be handled
-- as if they appear directly in the `INPUT' or `GROUP' commands,
-- with the exception of ELF shared libraries, that will be added only
-- when they are actually needed. This construct essentially enables
-- `--as-needed' option for all the files listed inside of it and
-- restores previous `--as-needed' resp. `--no-as-needed' setting
-- afterwards.
--
--`OUTPUT(FILENAME)'
-- The `OUTPUT' command names the output file. Using
-- `OUTPUT(FILENAME)' in the linker script is exactly like using `-o
-- FILENAME' on the command line (*note Command Line Options:
-- Options.). If both are used, the command line option takes
-- precedence.
--
-- You can use the `OUTPUT' command to define a default name for the
-- output file other than the usual default of `a.out'.
--
--`SEARCH_DIR(PATH)'
-- The `SEARCH_DIR' command adds PATH to the list of paths where `ld'
-- looks for archive libraries. Using `SEARCH_DIR(PATH)' is exactly
-- like using `-L PATH' on the command line (*note Command Line
-- Options: Options.). If both are used, then the linker will search
-- both paths. Paths specified using the command line option are
-- searched first.
--
--`STARTUP(FILENAME)'
-- The `STARTUP' command is just like the `INPUT' command, except
-- that FILENAME will become the first input file to be linked, as
-- though it were specified first on the command line. This may be
-- useful when using a system in which the entry point is always the
-- start of the first file.
--
--
--File: ld.info, Node: Format Commands, Next: REGION_ALIAS, Prev: File Commands, Up: Simple Commands
--
--3.4.3 Commands Dealing with Object File Formats
-------------------------------------------------
--
--A couple of linker script commands deal with object file formats.
--
--`OUTPUT_FORMAT(BFDNAME)'
--`OUTPUT_FORMAT(DEFAULT, BIG, LITTLE)'
-- The `OUTPUT_FORMAT' command names the BFD format to use for the
-- output file (*note BFD::). Using `OUTPUT_FORMAT(BFDNAME)' is
-- exactly like using `--oformat BFDNAME' on the command line (*note
-- Command Line Options: Options.). If both are used, the command
-- line option takes precedence.
--
-- You can use `OUTPUT_FORMAT' with three arguments to use different
-- formats based on the `-EB' and `-EL' command line options. This
-- permits the linker script to set the output format based on the
-- desired endianness.
--
-- If neither `-EB' nor `-EL' are used, then the output format will
-- be the first argument, DEFAULT. If `-EB' is used, the output
-- format will be the second argument, BIG. If `-EL' is used, the
-- output format will be the third argument, LITTLE.
--
-- For example, the default linker script for the MIPS ELF target
-- uses this command:
-- OUTPUT_FORMAT(elf32-bigmips, elf32-bigmips, elf32-littlemips)
-- This says that the default format for the output file is
-- `elf32-bigmips', but if the user uses the `-EL' command line
-- option, the output file will be created in the `elf32-littlemips'
-- format.
--
--`TARGET(BFDNAME)'
-- The `TARGET' command names the BFD format to use when reading input
-- files. It affects subsequent `INPUT' and `GROUP' commands. This
-- command is like using `-b BFDNAME' on the command line (*note
-- Command Line Options: Options.). If the `TARGET' command is used
-- but `OUTPUT_FORMAT' is not, then the last `TARGET' command is also
-- used to set the format for the output file. *Note BFD::.
--
--
--File: ld.info, Node: REGION_ALIAS, Next: Miscellaneous Commands, Prev: Format Commands, Up: Simple Commands
--
--3.4.4 Assign alias names to memory regions
--------------------------------------------
--
--Alias names can be added to existing memory regions created with the
--*Note MEMORY:: command. Each name corresponds to at most one memory
--region.
--
-- REGION_ALIAS(ALIAS, REGION)
--
-- The `REGION_ALIAS' function creates an alias name ALIAS for the
--memory region REGION. This allows a flexible mapping of output sections
--to memory regions. An example follows.
--
-- Suppose we have an application for embedded systems which come with
--various memory storage devices. All have a general purpose, volatile
--memory `RAM' that allows code execution or data storage. Some may have
--a read-only, non-volatile memory `ROM' that allows code execution and
--read-only data access. The last variant is a read-only, non-volatile
--memory `ROM2' with read-only data access and no code execution
--capability. We have four output sections:
--
-- * `.text' program code;
--
-- * `.rodata' read-only data;
--
-- * `.data' read-write initialized data;
--
-- * `.bss' read-write zero initialized data.
--
-- The goal is to provide a linker command file that contains a system
--independent part defining the output sections and a system dependent
--part mapping the output sections to the memory regions available on the
--system. Our embedded systems come with three different memory setups
--`A', `B' and `C':
--Section Variant A Variant B Variant C
--.text RAM ROM ROM
--.rodata RAM ROM ROM2
--.data RAM RAM/ROM RAM/ROM2
--.bss RAM RAM RAM
-- The notation `RAM/ROM' or `RAM/ROM2' means that this section is
--loaded into region `ROM' or `ROM2' respectively. Please note that the
--load address of the `.data' section starts in all three variants at the
--end of the `.rodata' section.
--
-- The base linker script that deals with the output sections follows.
--It includes the system dependent `linkcmds.memory' file that describes
--the memory layout:
-- INCLUDE linkcmds.memory
--
-- SECTIONS
-- {
-- .text :
-- {
-- *(.text)
-- } > REGION_TEXT
-- .rodata :
-- {
-- *(.rodata)
-- rodata_end = .;
-- } > REGION_RODATA
-- .data : AT (rodata_end)
-- {
-- data_start = .;
-- *(.data)
-- } > REGION_DATA
-- data_size = SIZEOF(.data);
-- data_load_start = LOADADDR(.data);
-- .bss :
-- {
-- *(.bss)
-- } > REGION_BSS
-- }
--
-- Now we need three different `linkcmds.memory' files to define memory
--regions and alias names. The content of `linkcmds.memory' for the three
--variants `A', `B' and `C':
--`A'
-- Here everything goes into the `RAM'.
-- MEMORY
-- {
-- RAM : ORIGIN = 0, LENGTH = 4M
-- }
--
-- REGION_ALIAS("REGION_TEXT", RAM);
-- REGION_ALIAS("REGION_RODATA", RAM);
-- REGION_ALIAS("REGION_DATA", RAM);
-- REGION_ALIAS("REGION_BSS", RAM);
--
--`B'
-- Program code and read-only data go into the `ROM'. Read-write
-- data goes into the `RAM'. An image of the initialized data is
-- loaded into the `ROM' and will be copied during system start into
-- the `RAM'.
-- MEMORY
-- {
-- ROM : ORIGIN = 0, LENGTH = 3M
-- RAM : ORIGIN = 0x10000000, LENGTH = 1M
-- }
--
-- REGION_ALIAS("REGION_TEXT", ROM);
-- REGION_ALIAS("REGION_RODATA", ROM);
-- REGION_ALIAS("REGION_DATA", RAM);
-- REGION_ALIAS("REGION_BSS", RAM);
--
--`C'
-- Program code goes into the `ROM'. Read-only data goes into the
-- `ROM2'. Read-write data goes into the `RAM'. An image of the
-- initialized data is loaded into the `ROM2' and will be copied
-- during system start into the `RAM'.
-- MEMORY
-- {
-- ROM : ORIGIN = 0, LENGTH = 2M
-- ROM2 : ORIGIN = 0x10000000, LENGTH = 1M
-- RAM : ORIGIN = 0x20000000, LENGTH = 1M
-- }
--
-- REGION_ALIAS("REGION_TEXT", ROM);
-- REGION_ALIAS("REGION_RODATA", ROM2);
-- REGION_ALIAS("REGION_DATA", RAM);
-- REGION_ALIAS("REGION_BSS", RAM);
--
-- It is possible to write a common system initialization routine to
--copy the `.data' section from `ROM' or `ROM2' into the `RAM' if
--necessary:
-- #include <string.h>
--
-- extern char data_start [];
-- extern char data_size [];
-- extern char data_load_start [];
--
-- void copy_data(void)
-- {
-- if (data_start != data_load_start)
-- {
-- memcpy(data_start, data_load_start, (size_t) data_size);
-- }
-- }
--
--
--File: ld.info, Node: Miscellaneous Commands, Prev: REGION_ALIAS, Up: Simple Commands
--
--3.4.5 Other Linker Script Commands
------------------------------------
--
--There are a few other linker scripts commands.
--
--`ASSERT(EXP, MESSAGE)'
-- Ensure that EXP is non-zero. If it is zero, then exit the linker
-- with an error code, and print MESSAGE.
--
--`EXTERN(SYMBOL SYMBOL ...)'
-- Force SYMBOL to be entered in the output file as an undefined
-- symbol. Doing this may, for example, trigger linking of additional
-- modules from standard libraries. You may list several SYMBOLs for
-- each `EXTERN', and you may use `EXTERN' multiple times. This
-- command has the same effect as the `-u' command-line option.
--
--`FORCE_COMMON_ALLOCATION'
-- This command has the same effect as the `-d' command-line option:
-- to make `ld' assign space to common symbols even if a relocatable
-- output file is specified (`-r').
--
--`INHIBIT_COMMON_ALLOCATION'
-- This command has the same effect as the `--no-define-common'
-- command-line option: to make `ld' omit the assignment of addresses
-- to common symbols even for a non-relocatable output file.
--
--`INSERT [ AFTER | BEFORE ] OUTPUT_SECTION'
-- This command is typically used in a script specified by `-T' to
-- augment the default `SECTIONS' with, for example, overlays. It
-- inserts all prior linker script statements after (or before)
-- OUTPUT_SECTION, and also causes `-T' to not override the default
-- linker script. The exact insertion point is as for orphan
-- sections. *Note Location Counter::. The insertion happens after
-- the linker has mapped input sections to output sections. Prior to
-- the insertion, since `-T' scripts are parsed before the default
-- linker script, statements in the `-T' script occur before the
-- default linker script statements in the internal linker
-- representation of the script. In particular, input section
-- assignments will be made to `-T' output sections before those in
-- the default script. Here is an example of how a `-T' script using
-- `INSERT' might look:
--
-- SECTIONS
-- {
-- OVERLAY :
-- {
-- .ov1 { ov1*(.text) }
-- .ov2 { ov2*(.text) }
-- }
-- }
-- INSERT AFTER .text;
--
--`NOCROSSREFS(SECTION SECTION ...)'
-- This command may be used to tell `ld' to issue an error about any
-- references among certain output sections.
--
-- In certain types of programs, particularly on embedded systems when
-- using overlays, when one section is loaded into memory, another
-- section will not be. Any direct references between the two
-- sections would be errors. For example, it would be an error if
-- code in one section called a function defined in the other section.
--
-- The `NOCROSSREFS' command takes a list of output section names. If
-- `ld' detects any cross references between the sections, it reports
-- an error and returns a non-zero exit status. Note that the
-- `NOCROSSREFS' command uses output section names, not input section
-- names.
--
--`OUTPUT_ARCH(BFDARCH)'
-- Specify a particular output machine architecture. The argument is
-- one of the names used by the BFD library (*note BFD::). You can
-- see the architecture of an object file by using the `objdump'
-- program with the `-f' option.
--
--`LD_FEATURE(STRING)'
-- This command may be used to modify `ld' behavior. If STRING is
-- `"SANE_EXPR"' then absolute symbols and numbers in a script are
-- simply treated as numbers everywhere. *Note Expression Section::.
--
--
--File: ld.info, Node: Assignments, Next: SECTIONS, Prev: Simple Commands, Up: Scripts
--
--3.5 Assigning Values to Symbols
--===============================
--
--You may assign a value to a symbol in a linker script. This will define
--the symbol and place it into the symbol table with a global scope.
--
--* Menu:
--
--* Simple Assignments:: Simple Assignments
--* HIDDEN:: HIDDEN
--* PROVIDE:: PROVIDE
--* PROVIDE_HIDDEN:: PROVIDE_HIDDEN
--* Source Code Reference:: How to use a linker script defined symbol in source code
--
--
--File: ld.info, Node: Simple Assignments, Next: HIDDEN, Up: Assignments
--
--3.5.1 Simple Assignments
--------------------------
--
--You may assign to a symbol using any of the C assignment operators:
--
--`SYMBOL = EXPRESSION ;'
--`SYMBOL += EXPRESSION ;'
--`SYMBOL -= EXPRESSION ;'
--`SYMBOL *= EXPRESSION ;'
--`SYMBOL /= EXPRESSION ;'
--`SYMBOL <<= EXPRESSION ;'
--`SYMBOL >>= EXPRESSION ;'
--`SYMBOL &= EXPRESSION ;'
--`SYMBOL |= EXPRESSION ;'
--
-- The first case will define SYMBOL to the value of EXPRESSION. In
--the other cases, SYMBOL must already be defined, and the value will be
--adjusted accordingly.
--
-- The special symbol name `.' indicates the location counter. You may
--only use this within a `SECTIONS' command. *Note Location Counter::.
--
-- The semicolon after EXPRESSION is required.
--
-- Expressions are defined below; see *Note Expressions::.
--
-- You may write symbol assignments as commands in their own right, or
--as statements within a `SECTIONS' command, or as part of an output
--section description in a `SECTIONS' command.
--
-- The section of the symbol will be set from the section of the
--expression; for more information, see *Note Expression Section::.
--
-- Here is an example showing the three different places that symbol
--assignments may be used:
--
-- floating_point = 0;
-- SECTIONS
-- {
-- .text :
-- {
-- *(.text)
-- _etext = .;
-- }
-- _bdata = (. + 3) & ~ 3;
-- .data : { *(.data) }
-- }
-- In this example, the symbol `floating_point' will be defined as
--zero. The symbol `_etext' will be defined as the address following the
--last `.text' input section. The symbol `_bdata' will be defined as the
--address following the `.text' output section aligned upward to a 4 byte
--boundary.
--
--
--File: ld.info, Node: HIDDEN, Next: PROVIDE, Prev: Simple Assignments, Up: Assignments
--
--3.5.2 HIDDEN
--------------
--
--For ELF targeted ports, define a symbol that will be hidden and won't be
--exported. The syntax is `HIDDEN(SYMBOL = EXPRESSION)'.
--
-- Here is the example from *Note Simple Assignments::, rewritten to use
--`HIDDEN':
--
-- HIDDEN(floating_point = 0);
-- SECTIONS
-- {
-- .text :
-- {
-- *(.text)
-- HIDDEN(_etext = .);
-- }
-- HIDDEN(_bdata = (. + 3) & ~ 3);
-- .data : { *(.data) }
-- }
-- In this case none of the three symbols will be visible outside this
--module.
--
--
--File: ld.info, Node: PROVIDE, Next: PROVIDE_HIDDEN, Prev: HIDDEN, Up: Assignments
--
--3.5.3 PROVIDE
---------------
--
--In some cases, it is desirable for a linker script to define a symbol
--only if it is referenced and is not defined by any object included in
--the link. For example, traditional linkers defined the symbol `etext'.
--However, ANSI C requires that the user be able to use `etext' as a
--function name without encountering an error. The `PROVIDE' keyword may
--be used to define a symbol, such as `etext', only if it is referenced
--but not defined. The syntax is `PROVIDE(SYMBOL = EXPRESSION)'.
--
-- Here is an example of using `PROVIDE' to define `etext':
-- SECTIONS
-- {
-- .text :
-- {
-- *(.text)
-- _etext = .;
-- PROVIDE(etext = .);
-- }
-- }
--
-- In this example, if the program defines `_etext' (with a leading
--underscore), the linker will give a multiple definition error. If, on
--the other hand, the program defines `etext' (with no leading
--underscore), the linker will silently use the definition in the program.
--If the program references `etext' but does not define it, the linker
--will use the definition in the linker script.
--
--
--File: ld.info, Node: PROVIDE_HIDDEN, Next: Source Code Reference, Prev: PROVIDE, Up: Assignments
--
--3.5.4 PROVIDE_HIDDEN
----------------------
--
--Similar to `PROVIDE'. For ELF targeted ports, the symbol will be
--hidden and won't be exported.
--
--
--File: ld.info, Node: Source Code Reference, Prev: PROVIDE_HIDDEN, Up: Assignments
--
--3.5.5 Source Code Reference
-----------------------------
--
--Accessing a linker script defined variable from source code is not
--intuitive. In particular a linker script symbol is not equivalent to a
--variable declaration in a high level language, it is instead a symbol
--that does not have a value.
--
-- Before going further, it is important to note that compilers often
--transform names in the source code into different names when they are
--stored in the symbol table. For example, Fortran compilers commonly
--prepend or append an underscore, and C++ performs extensive `name
--mangling'. Therefore there might be a discrepancy between the name of
--a variable as it is used in source code and the name of the same
--variable as it is defined in a linker script. For example in C a
--linker script variable might be referred to as:
--
-- extern int foo;
--
-- But in the linker script it might be defined as:
--
-- _foo = 1000;
--
-- In the remaining examples however it is assumed that no name
--transformation has taken place.
--
-- When a symbol is declared in a high level language such as C, two
--things happen. The first is that the compiler reserves enough space in
--the program's memory to hold the _value_ of the symbol. The second is
--that the compiler creates an entry in the program's symbol table which
--holds the symbol's _address_. ie the symbol table contains the address
--of the block of memory holding the symbol's value. So for example the
--following C declaration, at file scope:
--
-- int foo = 1000;
--
-- creates an entry called `foo' in the symbol table. This entry holds
--the address of an `int' sized block of memory where the number 1000 is
--initially stored.
--
-- When a program references a symbol the compiler generates code that
--first accesses the symbol table to find the address of the symbol's
--memory block and then code to read the value from that memory block.
--So:
--
-- foo = 1;
--
-- looks up the symbol `foo' in the symbol table, gets the address
--associated with this symbol and then writes the value 1 into that
--address. Whereas:
--
-- int * a = & foo;
--
-- looks up the symbol `foo' in the symbol table, gets its address and
--then copies this address into the block of memory associated with the
--variable `a'.
--
-- Linker scripts symbol declarations, by contrast, create an entry in
--the symbol table but do not assign any memory to them. Thus they are
--an address without a value. So for example the linker script
--definition:
--
-- foo = 1000;
--
-- creates an entry in the symbol table called `foo' which holds the
--address of memory location 1000, but nothing special is stored at
--address 1000. This means that you cannot access the _value_ of a
--linker script defined symbol - it has no value - all you can do is
--access the _address_ of a linker script defined symbol.
--
-- Hence when you are using a linker script defined symbol in source
--code you should always take the address of the symbol, and never
--attempt to use its value. For example suppose you want to copy the
--contents of a section of memory called .ROM into a section called
--.FLASH and the linker script contains these declarations:
--
-- start_of_ROM = .ROM;
-- end_of_ROM = .ROM + sizeof (.ROM) - 1;
-- start_of_FLASH = .FLASH;
--
-- Then the C source code to perform the copy would be:
--
-- extern char start_of_ROM, end_of_ROM, start_of_FLASH;
--
-- memcpy (& start_of_FLASH, & start_of_ROM, & end_of_ROM - & start_of_ROM);
--
-- Note the use of the `&' operators. These are correct.
--
--
--File: ld.info, Node: SECTIONS, Next: MEMORY, Prev: Assignments, Up: Scripts
--
--3.6 SECTIONS Command
--====================
--
--The `SECTIONS' command tells the linker how to map input sections into
--output sections, and how to place the output sections in memory.
--
-- The format of the `SECTIONS' command is:
-- SECTIONS
-- {
-- SECTIONS-COMMAND
-- SECTIONS-COMMAND
-- ...
-- }
--
-- Each SECTIONS-COMMAND may of be one of the following:
--
-- * an `ENTRY' command (*note Entry command: Entry Point.)
--
-- * a symbol assignment (*note Assignments::)
--
-- * an output section description
--
-- * an overlay description
--
-- The `ENTRY' command and symbol assignments are permitted inside the
--`SECTIONS' command for convenience in using the location counter in
--those commands. This can also make the linker script easier to
--understand because you can use those commands at meaningful points in
--the layout of the output file.
--
-- Output section descriptions and overlay descriptions are described
--below.
--
-- If you do not use a `SECTIONS' command in your linker script, the
--linker will place each input section into an identically named output
--section in the order that the sections are first encountered in the
--input files. If all input sections are present in the first file, for
--example, the order of sections in the output file will match the order
--in the first input file. The first section will be at address zero.
--
--* Menu:
--
--* Output Section Description:: Output section description
--* Output Section Name:: Output section name
--* Output Section Address:: Output section address
--* Input Section:: Input section description
--* Output Section Data:: Output section data
--* Output Section Keywords:: Output section keywords
--* Output Section Discarding:: Output section discarding
--* Output Section Attributes:: Output section attributes
--* Overlay Description:: Overlay description
--
--
--File: ld.info, Node: Output Section Description, Next: Output Section Name, Up: SECTIONS
--
--3.6.1 Output Section Description
----------------------------------
--
--The full description of an output section looks like this:
-- SECTION [ADDRESS] [(TYPE)] :
-- [AT(LMA)]
-- [ALIGN(SECTION_ALIGN) | ALIGN_WITH_INPUT]
-- [SUBALIGN(SUBSECTION_ALIGN)]
-- [CONSTRAINT]
-- {
-- OUTPUT-SECTION-COMMAND
-- OUTPUT-SECTION-COMMAND
-- ...
-- } [>REGION] [AT>LMA_REGION] [:PHDR :PHDR ...] [=FILLEXP]
--
-- Most output sections do not use most of the optional section
--attributes.
--
-- The whitespace around SECTION is required, so that the section name
--is unambiguous. The colon and the curly braces are also required. The
--line breaks and other white space are optional.
--
-- Each OUTPUT-SECTION-COMMAND may be one of the following:
--
-- * a symbol assignment (*note Assignments::)
--
-- * an input section description (*note Input Section::)
--
-- * data values to include directly (*note Output Section Data::)
--
-- * a special output section keyword (*note Output Section Keywords::)
--
--
--File: ld.info, Node: Output Section Name, Next: Output Section Address, Prev: Output Section Description, Up: SECTIONS
--
--3.6.2 Output Section Name
---------------------------
--
--The name of the output section is SECTION. SECTION must meet the
--constraints of your output format. In formats which only support a
--limited number of sections, such as `a.out', the name must be one of
--the names supported by the format (`a.out', for example, allows only
--`.text', `.data' or `.bss'). If the output format supports any number
--of sections, but with numbers and not names (as is the case for Oasys),
--the name should be supplied as a quoted numeric string. A section name
--may consist of any sequence of characters, but a name which contains
--any unusual characters such as commas must be quoted.
--
-- The output section name `/DISCARD/' is special; *Note Output Section
--Discarding::.
--
--
--File: ld.info, Node: Output Section Address, Next: Input Section, Prev: Output Section Name, Up: SECTIONS
--
--3.6.3 Output Section Address
------------------------------
--
--The ADDRESS is an expression for the VMA (the virtual memory address)
--of the output section. This address is optional, but if it is provided
--then the output address will be set exactly as specified.
--
-- If the output address is not specified then one will be chosen for
--the section, based on the heuristic below. This address will be
--adjusted to fit the alignment requirement of the output section. The
--alignment requirement is the strictest alignment of any input section
--contained within the output section.
--
-- The output section address heuristic is as follows:
--
-- * If an output memory REGION is set for the section then it is added
-- to this region and its address will be the next free address in
-- that region.
--
-- * If the MEMORY command has been used to create a list of memory
-- regions then the first region which has attributes compatible with
-- the section is selected to contain it. The section's output
-- address will be the next free address in that region; *Note
-- MEMORY::.
--
-- * If no memory regions were specified, or none match the section then
-- the output address will be based on the current value of the
-- location counter.
--
--For example:
--
-- .text . : { *(.text) }
--
--and
--
-- .text : { *(.text) }
--
--are subtly different. The first will set the address of the `.text'
--output section to the current value of the location counter. The
--second will set it to the current value of the location counter aligned
--to the strictest alignment of any of the `.text' input sections.
--
-- The ADDRESS may be an arbitrary expression; *Note Expressions::.
--For example, if you want to align the section on a 0x10 byte boundary,
--so that the lowest four bits of the section address are zero, you could
--do something like this:
-- .text ALIGN(0x10) : { *(.text) }
-- This works because `ALIGN' returns the current location counter
--aligned upward to the specified value.
--
-- Specifying ADDRESS for a section will change the value of the
--location counter, provided that the section is non-empty. (Empty
--sections are ignored).
--
--
--File: ld.info, Node: Input Section, Next: Output Section Data, Prev: Output Section Address, Up: SECTIONS
--
--3.6.4 Input Section Description
---------------------------------
--
--The most common output section command is an input section description.
--
-- The input section description is the most basic linker script
--operation. You use output sections to tell the linker how to lay out
--your program in memory. You use input section descriptions to tell the
--linker how to map the input files into your memory layout.
--
--* Menu:
--
--* Input Section Basics:: Input section basics
--* Input Section Wildcards:: Input section wildcard patterns
--* Input Section Common:: Input section for common symbols
--* Input Section Keep:: Input section and garbage collection
--* Input Section Example:: Input section example
--
--
--File: ld.info, Node: Input Section Basics, Next: Input Section Wildcards, Up: Input Section
--
--3.6.4.1 Input Section Basics
--............................
--
--An input section description consists of a file name optionally followed
--by a list of section names in parentheses.
--
-- The file name and the section name may be wildcard patterns, which we
--describe further below (*note Input Section Wildcards::).
--
-- The most common input section description is to include all input
--sections with a particular name in the output section. For example, to
--include all input `.text' sections, you would write:
-- *(.text)
-- Here the `*' is a wildcard which matches any file name. To exclude
--a list of files from matching the file name wildcard, EXCLUDE_FILE may
--be used to match all files except the ones specified in the
--EXCLUDE_FILE list. For example:
-- *(EXCLUDE_FILE (*crtend.o *otherfile.o) .ctors)
-- will cause all .ctors sections from all files except `crtend.o' and
--`otherfile.o' to be included.
--
-- There are two ways to include more than one section:
-- *(.text .rdata)
-- *(.text) *(.rdata)
-- The difference between these is the order in which the `.text' and
--`.rdata' input sections will appear in the output section. In the
--first example, they will be intermingled, appearing in the same order as
--they are found in the linker input. In the second example, all `.text'
--input sections will appear first, followed by all `.rdata' input
--sections.
--
-- You can specify a file name to include sections from a particular
--file. You would do this if one or more of your files contain special
--data that needs to be at a particular location in memory. For example:
-- data.o(.data)
--
-- To refine the sections that are included based on the section flags
--of an input section, INPUT_SECTION_FLAGS may be used.
--
-- Here is a simple example for using Section header flags for ELF
--sections:
--
-- SECTIONS {
-- .text : { INPUT_SECTION_FLAGS (SHF_MERGE & SHF_STRINGS) *(.text) }
-- .text2 : { INPUT_SECTION_FLAGS (!SHF_WRITE) *(.text) }
-- }
--
-- In this example, the output section `.text' will be comprised of any
--input section matching the name *(.text) whose section header flags
--`SHF_MERGE' and `SHF_STRINGS' are set. The output section `.text2'
--will be comprised of any input section matching the name *(.text) whose
--section header flag `SHF_WRITE' is clear.
--
-- You can also specify files within archives by writing a pattern
--matching the archive, a colon, then the pattern matching the file, with
--no whitespace around the colon.
--
--`archive:file'
-- matches file within archive
--
--`archive:'
-- matches the whole archive
--
--`:file'
-- matches file but not one in an archive
--
-- Either one or both of `archive' and `file' can contain shell
--wildcards. On DOS based file systems, the linker will assume that a
--single letter followed by a colon is a drive specifier, so `c:myfile.o'
--is a simple file specification, not `myfile.o' within an archive called
--`c'. `archive:file' filespecs may also be used within an
--`EXCLUDE_FILE' list, but may not appear in other linker script
--contexts. For instance, you cannot extract a file from an archive by
--using `archive:file' in an `INPUT' command.
--
-- If you use a file name without a list of sections, then all sections
--in the input file will be included in the output section. This is not
--commonly done, but it may by useful on occasion. For example:
-- data.o
--
-- When you use a file name which is not an `archive:file' specifier
--and does not contain any wild card characters, the linker will first
--see if you also specified the file name on the linker command line or
--in an `INPUT' command. If you did not, the linker will attempt to open
--the file as an input file, as though it appeared on the command line.
--Note that this differs from an `INPUT' command, because the linker will
--not search for the file in the archive search path.
--
--
--File: ld.info, Node: Input Section Wildcards, Next: Input Section Common, Prev: Input Section Basics, Up: Input Section
--
--3.6.4.2 Input Section Wildcard Patterns
--.......................................
--
--In an input section description, either the file name or the section
--name or both may be wildcard patterns.
--
-- The file name of `*' seen in many examples is a simple wildcard
--pattern for the file name.
--
-- The wildcard patterns are like those used by the Unix shell.
--
--`*'
-- matches any number of characters
--
--`?'
-- matches any single character
--
--`[CHARS]'
-- matches a single instance of any of the CHARS; the `-' character
-- may be used to specify a range of characters, as in `[a-z]' to
-- match any lower case letter
--
--`\'
-- quotes the following character
--
-- When a file name is matched with a wildcard, the wildcard characters
--will not match a `/' character (used to separate directory names on
--Unix). A pattern consisting of a single `*' character is an exception;
--it will always match any file name, whether it contains a `/' or not.
--In a section name, the wildcard characters will match a `/' character.
--
-- File name wildcard patterns only match files which are explicitly
--specified on the command line or in an `INPUT' command. The linker
--does not search directories to expand wildcards.
--
-- If a file name matches more than one wildcard pattern, or if a file
--name appears explicitly and is also matched by a wildcard pattern, the
--linker will use the first match in the linker script. For example, this
--sequence of input section descriptions is probably in error, because the
--`data.o' rule will not be used:
-- .data : { *(.data) }
-- .data1 : { data.o(.data) }
--
-- Normally, the linker will place files and sections matched by
--wildcards in the order in which they are seen during the link. You can
--change this by using the `SORT_BY_NAME' keyword, which appears before a
--wildcard pattern in parentheses (e.g., `SORT_BY_NAME(.text*)'). When
--the `SORT_BY_NAME' keyword is used, the linker will sort the files or
--sections into ascending order by name before placing them in the output
--file.
--
-- `SORT_BY_ALIGNMENT' is very similar to `SORT_BY_NAME'. The
--difference is `SORT_BY_ALIGNMENT' will sort sections into descending
--order by alignment before placing them in the output file. Larger
--alignments are placed before smaller alignments in order to reduce the
--amount of padding necessary.
--
-- `SORT_BY_INIT_PRIORITY' is very similar to `SORT_BY_NAME'. The
--difference is `SORT_BY_INIT_PRIORITY' will sort sections into ascending
--order by numerical value of the GCC init_priority attribute encoded in
--the section name before placing them in the output file.
--
-- `SORT' is an alias for `SORT_BY_NAME'.
--
-- When there are nested section sorting commands in linker script,
--there can be at most 1 level of nesting for section sorting commands.
--
-- 1. `SORT_BY_NAME' (`SORT_BY_ALIGNMENT' (wildcard section pattern)).
-- It will sort the input sections by name first, then by alignment
-- if two sections have the same name.
--
-- 2. `SORT_BY_ALIGNMENT' (`SORT_BY_NAME' (wildcard section pattern)).
-- It will sort the input sections by alignment first, then by name
-- if two sections have the same alignment.
--
-- 3. `SORT_BY_NAME' (`SORT_BY_NAME' (wildcard section pattern)) is
-- treated the same as `SORT_BY_NAME' (wildcard section pattern).
--
-- 4. `SORT_BY_ALIGNMENT' (`SORT_BY_ALIGNMENT' (wildcard section
-- pattern)) is treated the same as `SORT_BY_ALIGNMENT' (wildcard
-- section pattern).
--
-- 5. All other nested section sorting commands are invalid.
--
-- When both command line section sorting option and linker script
--section sorting command are used, section sorting command always takes
--precedence over the command line option.
--
-- If the section sorting command in linker script isn't nested, the
--command line option will make the section sorting command to be treated
--as nested sorting command.
--
-- 1. `SORT_BY_NAME' (wildcard section pattern ) with `--sort-sections
-- alignment' is equivalent to `SORT_BY_NAME' (`SORT_BY_ALIGNMENT'
-- (wildcard section pattern)).
--
-- 2. `SORT_BY_ALIGNMENT' (wildcard section pattern) with
-- `--sort-section name' is equivalent to `SORT_BY_ALIGNMENT'
-- (`SORT_BY_NAME' (wildcard section pattern)).
--
-- If the section sorting command in linker script is nested, the
--command line option will be ignored.
--
-- `SORT_NONE' disables section sorting by ignoring the command line
--section sorting option.
--
-- If you ever get confused about where input sections are going, use
--the `-M' linker option to generate a map file. The map file shows
--precisely how input sections are mapped to output sections.
--
-- This example shows how wildcard patterns might be used to partition
--files. This linker script directs the linker to place all `.text'
--sections in `.text' and all `.bss' sections in `.bss'. The linker will
--place the `.data' section from all files beginning with an upper case
--character in `.DATA'; for all other files, the linker will place the
--`.data' section in `.data'.
-- SECTIONS {
-- .text : { *(.text) }
-- .DATA : { [A-Z]*(.data) }
-- .data : { *(.data) }
-- .bss : { *(.bss) }
-- }
--
--
--File: ld.info, Node: Input Section Common, Next: Input Section Keep, Prev: Input Section Wildcards, Up: Input Section
--
--3.6.4.3 Input Section for Common Symbols
--........................................
--
--A special notation is needed for common symbols, because in many object
--file formats common symbols do not have a particular input section. The
--linker treats common symbols as though they are in an input section
--named `COMMON'.
--
-- You may use file names with the `COMMON' section just as with any
--other input sections. You can use this to place common symbols from a
--particular input file in one section while common symbols from other
--input files are placed in another section.
--
-- In most cases, common symbols in input files will be placed in the
--`.bss' section in the output file. For example:
-- .bss { *(.bss) *(COMMON) }
--
-- Some object file formats have more than one type of common symbol.
--For example, the MIPS ELF object file format distinguishes standard
--common symbols and small common symbols. In this case, the linker will
--use a different special section name for other types of common symbols.
--In the case of MIPS ELF, the linker uses `COMMON' for standard common
--symbols and `.scommon' for small common symbols. This permits you to
--map the different types of common symbols into memory at different
--locations.
--
-- You will sometimes see `[COMMON]' in old linker scripts. This
--notation is now considered obsolete. It is equivalent to `*(COMMON)'.
--
--
--File: ld.info, Node: Input Section Keep, Next: Input Section Example, Prev: Input Section Common, Up: Input Section
--
--3.6.4.4 Input Section and Garbage Collection
--............................................
--
--When link-time garbage collection is in use (`--gc-sections'), it is
--often useful to mark sections that should not be eliminated. This is
--accomplished by surrounding an input section's wildcard entry with
--`KEEP()', as in `KEEP(*(.init))' or `KEEP(SORT_BY_NAME(*)(.ctors))'.
--
--
--File: ld.info, Node: Input Section Example, Prev: Input Section Keep, Up: Input Section
--
--3.6.4.5 Input Section Example
--.............................
--
--The following example is a complete linker script. It tells the linker
--to read all of the sections from file `all.o' and place them at the
--start of output section `outputa' which starts at location `0x10000'.
--All of section `.input1' from file `foo.o' follows immediately, in the
--same output section. All of section `.input2' from `foo.o' goes into
--output section `outputb', followed by section `.input1' from `foo1.o'.
--All of the remaining `.input1' and `.input2' sections from any files
--are written to output section `outputc'.
--
-- SECTIONS {
-- outputa 0x10000 :
-- {
-- all.o
-- foo.o (.input1)
-- }
-- outputb :
-- {
-- foo.o (.input2)
-- foo1.o (.input1)
-- }
-- outputc :
-- {
-- *(.input1)
-- *(.input2)
-- }
-- }
--
--
--File: ld.info, Node: Output Section Data, Next: Output Section Keywords, Prev: Input Section, Up: SECTIONS
--
--3.6.5 Output Section Data
---------------------------
--
--You can include explicit bytes of data in an output section by using
--`BYTE', `SHORT', `LONG', `QUAD', or `SQUAD' as an output section
--command. Each keyword is followed by an expression in parentheses
--providing the value to store (*note Expressions::). The value of the
--expression is stored at the current value of the location counter.
--
-- The `BYTE', `SHORT', `LONG', and `QUAD' commands store one, two,
--four, and eight bytes (respectively). After storing the bytes, the
--location counter is incremented by the number of bytes stored.
--
-- For example, this will store the byte 1 followed by the four byte
--value of the symbol `addr':
-- BYTE(1)
-- LONG(addr)
--
-- When using a 64 bit host or target, `QUAD' and `SQUAD' are the same;
--they both store an 8 byte, or 64 bit, value. When both host and target
--are 32 bits, an expression is computed as 32 bits. In this case `QUAD'
--stores a 32 bit value zero extended to 64 bits, and `SQUAD' stores a 32
--bit value sign extended to 64 bits.
--
-- If the object file format of the output file has an explicit
--endianness, which is the normal case, the value will be stored in that
--endianness. When the object file format does not have an explicit
--endianness, as is true of, for example, S-records, the value will be
--stored in the endianness of the first input object file.
--
-- Note--these commands only work inside a section description and not
--between them, so the following will produce an error from the linker:
-- SECTIONS { .text : { *(.text) } LONG(1) .data : { *(.data) } }
-- whereas this will work:
-- SECTIONS { .text : { *(.text) ; LONG(1) } .data : { *(.data) } }
--
-- You may use the `FILL' command to set the fill pattern for the
--current section. It is followed by an expression in parentheses. Any
--otherwise unspecified regions of memory within the section (for example,
--gaps left due to the required alignment of input sections) are filled
--with the value of the expression, repeated as necessary. A `FILL'
--statement covers memory locations after the point at which it occurs in
--the section definition; by including more than one `FILL' statement,
--you can have different fill patterns in different parts of an output
--section.
--
-- This example shows how to fill unspecified regions of memory with the
--value `0x90':
-- FILL(0x90909090)
--
-- The `FILL' command is similar to the `=FILLEXP' output section
--attribute, but it only affects the part of the section following the
--`FILL' command, rather than the entire section. If both are used, the
--`FILL' command takes precedence. *Note Output Section Fill::, for
--details on the fill expression.
--
--
--File: ld.info, Node: Output Section Keywords, Next: Output Section Discarding, Prev: Output Section Data, Up: SECTIONS
--
--3.6.6 Output Section Keywords
-------------------------------
--
--There are a couple of keywords which can appear as output section
--commands.
--
--`CREATE_OBJECT_SYMBOLS'
-- The command tells the linker to create a symbol for each input
-- file. The name of each symbol will be the name of the
-- corresponding input file. The section of each symbol will be the
-- output section in which the `CREATE_OBJECT_SYMBOLS' command
-- appears.
--
-- This is conventional for the a.out object file format. It is not
-- normally used for any other object file format.
--
--`CONSTRUCTORS'
-- When linking using the a.out object file format, the linker uses an
-- unusual set construct to support C++ global constructors and
-- destructors. When linking object file formats which do not support
-- arbitrary sections, such as ECOFF and XCOFF, the linker will
-- automatically recognize C++ global constructors and destructors by
-- name. For these object file formats, the `CONSTRUCTORS' command
-- tells the linker to place constructor information in the output
-- section where the `CONSTRUCTORS' command appears. The
-- `CONSTRUCTORS' command is ignored for other object file formats.
--
-- The symbol `__CTOR_LIST__' marks the start of the global
-- constructors, and the symbol `__CTOR_END__' marks the end.
-- Similarly, `__DTOR_LIST__' and `__DTOR_END__' mark the start and
-- end of the global destructors. The first word in the list is the
-- number of entries, followed by the address of each constructor or
-- destructor, followed by a zero word. The compiler must arrange to
-- actually run the code. For these object file formats GNU C++
-- normally calls constructors from a subroutine `__main'; a call to
-- `__main' is automatically inserted into the startup code for
-- `main'. GNU C++ normally runs destructors either by using
-- `atexit', or directly from the function `exit'.
--
-- For object file formats such as `COFF' or `ELF' which support
-- arbitrary section names, GNU C++ will normally arrange to put the
-- addresses of global constructors and destructors into the `.ctors'
-- and `.dtors' sections. Placing the following sequence into your
-- linker script will build the sort of table which the GNU C++
-- runtime code expects to see.
--
-- __CTOR_LIST__ = .;
-- LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
-- *(.ctors)
-- LONG(0)
-- __CTOR_END__ = .;
-- __DTOR_LIST__ = .;
-- LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
-- *(.dtors)
-- LONG(0)
-- __DTOR_END__ = .;
--
-- If you are using the GNU C++ support for initialization priority,
-- which provides some control over the order in which global
-- constructors are run, you must sort the constructors at link time
-- to ensure that they are executed in the correct order. When using
-- the `CONSTRUCTORS' command, use `SORT_BY_NAME(CONSTRUCTORS)'
-- instead. When using the `.ctors' and `.dtors' sections, use
-- `*(SORT_BY_NAME(.ctors))' and `*(SORT_BY_NAME(.dtors))' instead of
-- just `*(.ctors)' and `*(.dtors)'.
--
-- Normally the compiler and linker will handle these issues
-- automatically, and you will not need to concern yourself with
-- them. However, you may need to consider this if you are using C++
-- and writing your own linker scripts.
--
--
--
--File: ld.info, Node: Output Section Discarding, Next: Output Section Attributes, Prev: Output Section Keywords, Up: SECTIONS
--
--3.6.7 Output Section Discarding
---------------------------------
--
--The linker will not create output sections with no contents. This is
--for convenience when referring to input sections that may or may not be
--present in any of the input files. For example:
-- .foo : { *(.foo) }
-- will only create a `.foo' section in the output file if there is a
--`.foo' section in at least one input file, and if the input sections
--are not all empty. Other link script directives that allocate space in
--an output section will also create the output section.
--
-- The linker will ignore address assignments (*note Output Section
--Address::) on discarded output sections, except when the linker script
--defines symbols in the output section. In that case the linker will
--obey the address assignments, possibly advancing dot even though the
--section is discarded.
--
-- The special output section name `/DISCARD/' may be used to discard
--input sections. Any input sections which are assigned to an output
--section named `/DISCARD/' are not included in the output file.
--
--
--File: ld.info, Node: Output Section Attributes, Next: Overlay Description, Prev: Output Section Discarding, Up: SECTIONS
--
--3.6.8 Output Section Attributes
---------------------------------
--
--We showed above that the full description of an output section looked
--like this:
--
-- SECTION [ADDRESS] [(TYPE)] :
-- [AT(LMA)]
-- [ALIGN(SECTION_ALIGN)]
-- [SUBALIGN(SUBSECTION_ALIGN)]
-- [CONSTRAINT]
-- {
-- OUTPUT-SECTION-COMMAND
-- OUTPUT-SECTION-COMMAND
-- ...
-- } [>REGION] [AT>LMA_REGION] [:PHDR :PHDR ...] [=FILLEXP]
--
-- We've already described SECTION, ADDRESS, and
--OUTPUT-SECTION-COMMAND. In this section we will describe the remaining
--section attributes.
--
--* Menu:
--
--* Output Section Type:: Output section type
--* Output Section LMA:: Output section LMA
--* Forced Output Alignment:: Forced Output Alignment
--* Forced Input Alignment:: Forced Input Alignment
--* Output Section Constraint:: Output section constraint
--* Output Section Region:: Output section region
--* Output Section Phdr:: Output section phdr
--* Output Section Fill:: Output section fill
--
--
--File: ld.info, Node: Output Section Type, Next: Output Section LMA, Up: Output Section Attributes
--
--3.6.8.1 Output Section Type
--...........................
--
--Each output section may have a type. The type is a keyword in
--parentheses. The following types are defined:
--
--`NOLOAD'
-- The section should be marked as not loadable, so that it will not
-- be loaded into memory when the program is run.
--
--`DSECT'
--`COPY'
--`INFO'
--`OVERLAY'
-- These type names are supported for backward compatibility, and are
-- rarely used. They all have the same effect: the section should be
-- marked as not allocatable, so that no memory is allocated for the
-- section when the program is run.
--
-- The linker normally sets the attributes of an output section based on
--the input sections which map into it. You can override this by using
--the section type. For example, in the script sample below, the `ROM'
--section is addressed at memory location `0' and does not need to be
--loaded when the program is run.
-- SECTIONS {
-- ROM 0 (NOLOAD) : { ... }
-- ...
-- }
--
--
--File: ld.info, Node: Output Section LMA, Next: Forced Output Alignment, Prev: Output Section Type, Up: Output Section Attributes
--
--3.6.8.2 Output Section LMA
--..........................
--
--Every section has a virtual address (VMA) and a load address (LMA); see
--*Note Basic Script Concepts::. The virtual address is specified by the
--*note Output Section Address:: described earlier. The load address is
--specified by the `AT' or `AT>' keywords. Specifying a load address is
--optional.
--
-- The `AT' keyword takes an expression as an argument. This specifies
--the exact load address of the section. The `AT>' keyword takes the
--name of a memory region as an argument. *Note MEMORY::. The load
--address of the section is set to the next free address in the region,
--aligned to the section's alignment requirements.
--
-- If neither `AT' nor `AT>' is specified for an allocatable section,
--the linker will use the following heuristic to determine the load
--address:
--
-- * If the section has a specific VMA address, then this is used as
-- the LMA address as well.
--
-- * If the section is not allocatable then its LMA is set to its VMA.
--
-- * Otherwise if a memory region can be found that is compatible with
-- the current section, and this region contains at least one
-- section, then the LMA is set so the difference between the VMA and
-- LMA is the same as the difference between the VMA and LMA of the
-- last section in the located region.
--
-- * If no memory regions have been declared then a default region that
-- covers the entire address space is used in the previous step.
--
-- * If no suitable region could be found, or there was no previous
-- section then the LMA is set equal to the VMA.
--
-- This feature is designed to make it easy to build a ROM image. For
--example, the following linker script creates three output sections: one
--called `.text', which starts at `0x1000', one called `.mdata', which is
--loaded at the end of the `.text' section even though its VMA is
--`0x2000', and one called `.bss' to hold uninitialized data at address
--`0x3000'. The symbol `_data' is defined with the value `0x2000', which
--shows that the location counter holds the VMA value, not the LMA value.
--
-- SECTIONS
-- {
-- .text 0x1000 : { *(.text) _etext = . ; }
-- .mdata 0x2000 :
-- AT ( ADDR (.text) + SIZEOF (.text) )
-- { _data = . ; *(.data); _edata = . ; }
-- .bss 0x3000 :
-- { _bstart = . ; *(.bss) *(COMMON) ; _bend = . ;}
-- }
--
-- The run-time initialization code for use with a program generated
--with this linker script would include something like the following, to
--copy the initialized data from the ROM image to its runtime address.
--Notice how this code takes advantage of the symbols defined by the
--linker script.
--
-- extern char _etext, _data, _edata, _bstart, _bend;
-- char *src = &_etext;
-- char *dst = &_data;
--
-- /* ROM has data at end of text; copy it. */
-- while (dst < &_edata)
-- *dst++ = *src++;
--
-- /* Zero bss. */
-- for (dst = &_bstart; dst< &_bend; dst++)
-- *dst = 0;
--
--
--File: ld.info, Node: Forced Output Alignment, Next: Forced Input Alignment, Prev: Output Section LMA, Up: Output Section Attributes
--
--3.6.8.3 Forced Output Alignment
--...............................
--
--You can increase an output section's alignment by using ALIGN. As an
--alternative you can force the output section alignment to the maximum
--alignment of all its input sections with ALIGN_WITH_INPUT. The
--alignment forced by ALIGN_WITH_INPUT is used even in case the load and
--virtual memory regions are different.
--
--
--File: ld.info, Node: Forced Input Alignment, Next: Output Section Constraint, Prev: Forced Output Alignment, Up: Output Section Attributes
--
--3.6.8.4 Forced Input Alignment
--..............................
--
--You can force input section alignment within an output section by using
--SUBALIGN. The value specified overrides any alignment given by input
--sections, whether larger or smaller.
--
--
--File: ld.info, Node: Output Section Constraint, Next: Output Section Region, Prev: Forced Input Alignment, Up: Output Section Attributes
--
--3.6.8.5 Output Section Constraint
--.................................
--
--You can specify that an output section should only be created if all of
--its input sections are read-only or all of its input sections are
--read-write by using the keyword `ONLY_IF_RO' and `ONLY_IF_RW'
--respectively.
--
--
--File: ld.info, Node: Output Section Region, Next: Output Section Phdr, Prev: Output Section Constraint, Up: Output Section Attributes
--
--3.6.8.6 Output Section Region
--.............................
--
--You can assign a section to a previously defined region of memory by
--using `>REGION'. *Note MEMORY::.
--
-- Here is a simple example:
-- MEMORY { rom : ORIGIN = 0x1000, LENGTH = 0x1000 }
-- SECTIONS { ROM : { *(.text) } >rom }
--
--
--File: ld.info, Node: Output Section Phdr, Next: Output Section Fill, Prev: Output Section Region, Up: Output Section Attributes
--
--3.6.8.7 Output Section Phdr
--...........................
--
--You can assign a section to a previously defined program segment by
--using `:PHDR'. *Note PHDRS::. If a section is assigned to one or more
--segments, then all subsequent allocated sections will be assigned to
--those segments as well, unless they use an explicitly `:PHDR' modifier.
--You can use `:NONE' to tell the linker to not put the section in any
--segment at all.
--
-- Here is a simple example:
-- PHDRS { text PT_LOAD ; }
-- SECTIONS { .text : { *(.text) } :text }
--
--
--File: ld.info, Node: Output Section Fill, Prev: Output Section Phdr, Up: Output Section Attributes
--
--3.6.8.8 Output Section Fill
--...........................
--
--You can set the fill pattern for an entire section by using `=FILLEXP'.
--FILLEXP is an expression (*note Expressions::). Any otherwise
--unspecified regions of memory within the output section (for example,
--gaps left due to the required alignment of input sections) will be
--filled with the value, repeated as necessary. If the fill expression
--is a simple hex number, ie. a string of hex digit starting with `0x'
--and without a trailing `k' or `M', then an arbitrarily long sequence of
--hex digits can be used to specify the fill pattern; Leading zeros
--become part of the pattern too. For all other cases, including extra
--parentheses or a unary `+', the fill pattern is the four least
--significant bytes of the value of the expression. In all cases, the
--number is big-endian.
--
-- You can also change the fill value with a `FILL' command in the
--output section commands; (*note Output Section Data::).
--
-- Here is a simple example:
-- SECTIONS { .text : { *(.text) } =0x90909090 }
--
--
--File: ld.info, Node: Overlay Description, Prev: Output Section Attributes, Up: SECTIONS
--
--3.6.9 Overlay Description
---------------------------
--
--An overlay description provides an easy way to describe sections which
--are to be loaded as part of a single memory image but are to be run at
--the same memory address. At run time, some sort of overlay manager will
--copy the overlaid sections in and out of the runtime memory address as
--required, perhaps by simply manipulating addressing bits. This approach
--can be useful, for example, when a certain region of memory is faster
--than another.
--
-- Overlays are described using the `OVERLAY' command. The `OVERLAY'
--command is used within a `SECTIONS' command, like an output section
--description. The full syntax of the `OVERLAY' command is as follows:
-- OVERLAY [START] : [NOCROSSREFS] [AT ( LDADDR )]
-- {
-- SECNAME1
-- {
-- OUTPUT-SECTION-COMMAND
-- OUTPUT-SECTION-COMMAND
-- ...
-- } [:PHDR...] [=FILL]
-- SECNAME2
-- {
-- OUTPUT-SECTION-COMMAND
-- OUTPUT-SECTION-COMMAND
-- ...
-- } [:PHDR...] [=FILL]
-- ...
-- } [>REGION] [:PHDR...] [=FILL]
--
-- Everything is optional except `OVERLAY' (a keyword), and each
--section must have a name (SECNAME1 and SECNAME2 above). The section
--definitions within the `OVERLAY' construct are identical to those
--within the general `SECTIONS' construct (*note SECTIONS::), except that
--no addresses and no memory regions may be defined for sections within
--an `OVERLAY'.
--
-- The sections are all defined with the same starting address. The
--load addresses of the sections are arranged such that they are
--consecutive in memory starting at the load address used for the
--`OVERLAY' as a whole (as with normal section definitions, the load
--address is optional, and defaults to the start address; the start
--address is also optional, and defaults to the current value of the
--location counter).
--
-- If the `NOCROSSREFS' keyword is used, and there are any references
--among the sections, the linker will report an error. Since the
--sections all run at the same address, it normally does not make sense
--for one section to refer directly to another. *Note NOCROSSREFS:
--Miscellaneous Commands.
--
-- For each section within the `OVERLAY', the linker automatically
--provides two symbols. The symbol `__load_start_SECNAME' is defined as
--the starting load address of the section. The symbol
--`__load_stop_SECNAME' is defined as the final load address of the
--section. Any characters within SECNAME which are not legal within C
--identifiers are removed. C (or assembler) code may use these symbols
--to move the overlaid sections around as necessary.
--
-- At the end of the overlay, the value of the location counter is set
--to the start address of the overlay plus the size of the largest
--section.
--
-- Here is an example. Remember that this would appear inside a
--`SECTIONS' construct.
-- OVERLAY 0x1000 : AT (0x4000)
-- {
-- .text0 { o1/*.o(.text) }
-- .text1 { o2/*.o(.text) }
-- }
--This will define both `.text0' and `.text1' to start at address
--0x1000. `.text0' will be loaded at address 0x4000, and `.text1' will
--be loaded immediately after `.text0'. The following symbols will be
--defined if referenced: `__load_start_text0', `__load_stop_text0',
--`__load_start_text1', `__load_stop_text1'.
--
-- C code to copy overlay `.text1' into the overlay area might look
--like the following.
--
-- extern char __load_start_text1, __load_stop_text1;
-- memcpy ((char *) 0x1000, &__load_start_text1,
-- &__load_stop_text1 - &__load_start_text1);
--
-- Note that the `OVERLAY' command is just syntactic sugar, since
--everything it does can be done using the more basic commands. The above
--example could have been written identically as follows.
--
-- .text0 0x1000 : AT (0x4000) { o1/*.o(.text) }
-- PROVIDE (__load_start_text0 = LOADADDR (.text0));
-- PROVIDE (__load_stop_text0 = LOADADDR (.text0) + SIZEOF (.text0));
-- .text1 0x1000 : AT (0x4000 + SIZEOF (.text0)) { o2/*.o(.text) }
-- PROVIDE (__load_start_text1 = LOADADDR (.text1));
-- PROVIDE (__load_stop_text1 = LOADADDR (.text1) + SIZEOF (.text1));
-- . = 0x1000 + MAX (SIZEOF (.text0), SIZEOF (.text1));
--
--
--File: ld.info, Node: MEMORY, Next: PHDRS, Prev: SECTIONS, Up: Scripts
--
--3.7 MEMORY Command
--==================
--
--The linker's default configuration permits allocation of all available
--memory. You can override this by using the `MEMORY' command.
--
-- The `MEMORY' command describes the location and size of blocks of
--memory in the target. You can use it to describe which memory regions
--may be used by the linker, and which memory regions it must avoid. You
--can then assign sections to particular memory regions. The linker will
--set section addresses based on the memory regions, and will warn about
--regions that become too full. The linker will not shuffle sections
--around to fit into the available regions.
--
-- A linker script may contain at most one use of the `MEMORY' command.
--However, you can define as many blocks of memory within it as you
--wish. The syntax is:
-- MEMORY
-- {
-- NAME [(ATTR)] : ORIGIN = ORIGIN, LENGTH = LEN
-- ...
-- }
--
-- The NAME is a name used in the linker script to refer to the region.
--The region name has no meaning outside of the linker script. Region
--names are stored in a separate name space, and will not conflict with
--symbol names, file names, or section names. Each memory region must
--have a distinct name within the `MEMORY' command. However you can add
--later alias names to existing memory regions with the *Note
--REGION_ALIAS:: command.
--
-- The ATTR string is an optional list of attributes that specify
--whether to use a particular memory region for an input section which is
--not explicitly mapped in the linker script. As described in *Note
--SECTIONS::, if you do not specify an output section for some input
--section, the linker will create an output section with the same name as
--the input section. If you define region attributes, the linker will use
--them to select the memory region for the output section that it creates.
--
-- The ATTR string must consist only of the following characters:
--`R'
-- Read-only section
--
--`W'
-- Read/write section
--
--`X'
-- Executable section
--
--`A'
-- Allocatable section
--
--`I'
-- Initialized section
--
--`L'
-- Same as `I'
--
--`!'
-- Invert the sense of any of the attributes that follow
--
-- If a unmapped section matches any of the listed attributes other than
--`!', it will be placed in the memory region. The `!' attribute
--reverses this test, so that an unmapped section will be placed in the
--memory region only if it does not match any of the listed attributes.
--
-- The ORIGIN is an numerical expression for the start address of the
--memory region. The expression must evaluate to a constant and it
--cannot involve any symbols. The keyword `ORIGIN' may be abbreviated to
--`org' or `o' (but not, for example, `ORG').
--
-- The LEN is an expression for the size in bytes of the memory region.
--As with the ORIGIN expression, the expression must be numerical only
--and must evaluate to a constant. The keyword `LENGTH' may be
--abbreviated to `len' or `l'.
--
-- In the following example, we specify that there are two memory
--regions available for allocation: one starting at `0' for 256 kilobytes,
--and the other starting at `0x40000000' for four megabytes. The linker
--will place into the `rom' memory region every section which is not
--explicitly mapped into a memory region, and is either read-only or
--executable. The linker will place other sections which are not
--explicitly mapped into a memory region into the `ram' memory region.
--
-- MEMORY
-- {
-- rom (rx) : ORIGIN = 0, LENGTH = 256K
-- ram (!rx) : org = 0x40000000, l = 4M
-- }
--
-- Once you define a memory region, you can direct the linker to place
--specific output sections into that memory region by using the `>REGION'
--output section attribute. For example, if you have a memory region
--named `mem', you would use `>mem' in the output section definition.
--*Note Output Section Region::. If no address was specified for the
--output section, the linker will set the address to the next available
--address within the memory region. If the combined output sections
--directed to a memory region are too large for the region, the linker
--will issue an error message.
--
-- It is possible to access the origin and length of a memory in an
--expression via the `ORIGIN(MEMORY)' and `LENGTH(MEMORY)' functions:
--
-- _fstack = ORIGIN(ram) + LENGTH(ram) - 4;
--
--
--File: ld.info, Node: PHDRS, Next: VERSION, Prev: MEMORY, Up: Scripts
--
--3.8 PHDRS Command
--=================
--
--The ELF object file format uses "program headers", also knows as
--"segments". The program headers describe how the program should be
--loaded into memory. You can print them out by using the `objdump'
--program with the `-p' option.
--
-- When you run an ELF program on a native ELF system, the system loader
--reads the program headers in order to figure out how to load the
--program. This will only work if the program headers are set correctly.
--This manual does not describe the details of how the system loader
--interprets program headers; for more information, see the ELF ABI.
--
-- The linker will create reasonable program headers by default.
--However, in some cases, you may need to specify the program headers more
--precisely. You may use the `PHDRS' command for this purpose. When the
--linker sees the `PHDRS' command in the linker script, it will not
--create any program headers other than the ones specified.
--
-- The linker only pays attention to the `PHDRS' command when
--generating an ELF output file. In other cases, the linker will simply
--ignore `PHDRS'.
--
-- This is the syntax of the `PHDRS' command. The words `PHDRS',
--`FILEHDR', `AT', and `FLAGS' are keywords.
--
-- PHDRS
-- {
-- NAME TYPE [ FILEHDR ] [ PHDRS ] [ AT ( ADDRESS ) ]
-- [ FLAGS ( FLAGS ) ] ;
-- }
--
-- The NAME is used only for reference in the `SECTIONS' command of the
--linker script. It is not put into the output file. Program header
--names are stored in a separate name space, and will not conflict with
--symbol names, file names, or section names. Each program header must
--have a distinct name. The headers are processed in order and it is
--usual for them to map to sections in ascending load address order.
--
-- Certain program header types describe segments of memory which the
--system loader will load from the file. In the linker script, you
--specify the contents of these segments by placing allocatable output
--sections in the segments. You use the `:PHDR' output section attribute
--to place a section in a particular segment. *Note Output Section
--Phdr::.
--
-- It is normal to put certain sections in more than one segment. This
--merely implies that one segment of memory contains another. You may
--repeat `:PHDR', using it once for each segment which should contain the
--section.
--
-- If you place a section in one or more segments using `:PHDR', then
--the linker will place all subsequent allocatable sections which do not
--specify `:PHDR' in the same segments. This is for convenience, since
--generally a whole set of contiguous sections will be placed in a single
--segment. You can use `:NONE' to override the default segment and tell
--the linker to not put the section in any segment at all.
--
-- You may use the `FILEHDR' and `PHDRS' keywords after the program
--header type to further describe the contents of the segment. The
--`FILEHDR' keyword means that the segment should include the ELF file
--header. The `PHDRS' keyword means that the segment should include the
--ELF program headers themselves. If applied to a loadable segment
--(`PT_LOAD'), all prior loadable segments must have one of these
--keywords.
--
-- The TYPE may be one of the following. The numbers indicate the
--value of the keyword.
--
--`PT_NULL' (0)
-- Indicates an unused program header.
--
--`PT_LOAD' (1)
-- Indicates that this program header describes a segment to be
-- loaded from the file.
--
--`PT_DYNAMIC' (2)
-- Indicates a segment where dynamic linking information can be found.
--
--`PT_INTERP' (3)
-- Indicates a segment where the name of the program interpreter may
-- be found.
--
--`PT_NOTE' (4)
-- Indicates a segment holding note information.
--
--`PT_SHLIB' (5)
-- A reserved program header type, defined but not specified by the
-- ELF ABI.
--
--`PT_PHDR' (6)
-- Indicates a segment where the program headers may be found.
--
--EXPRESSION
-- An expression giving the numeric type of the program header. This
-- may be used for types not defined above.
--
-- You can specify that a segment should be loaded at a particular
--address in memory by using an `AT' expression. This is identical to the
--`AT' command used as an output section attribute (*note Output Section
--LMA::). The `AT' command for a program header overrides the output
--section attribute.
--
-- The linker will normally set the segment flags based on the sections
--which comprise the segment. You may use the `FLAGS' keyword to
--explicitly specify the segment flags. The value of FLAGS must be an
--integer. It is used to set the `p_flags' field of the program header.
--
-- Here is an example of `PHDRS'. This shows a typical set of program
--headers used on a native ELF system.
--
-- PHDRS
-- {
-- headers PT_PHDR PHDRS ;
-- interp PT_INTERP ;
-- text PT_LOAD FILEHDR PHDRS ;
-- data PT_LOAD ;
-- dynamic PT_DYNAMIC ;
-- }
--
-- SECTIONS
-- {
-- . = SIZEOF_HEADERS;
-- .interp : { *(.interp) } :text :interp
-- .text : { *(.text) } :text
-- .rodata : { *(.rodata) } /* defaults to :text */
-- ...
-- . = . + 0x1000; /* move to a new page in memory */
-- .data : { *(.data) } :data
-- .dynamic : { *(.dynamic) } :data :dynamic
-- ...
-- }
--
--
--File: ld.info, Node: VERSION, Next: Expressions, Prev: PHDRS, Up: Scripts
--
--3.9 VERSION Command
--===================
--
--The linker supports symbol versions when using ELF. Symbol versions are
--only useful when using shared libraries. The dynamic linker can use
--symbol versions to select a specific version of a function when it runs
--a program that may have been linked against an earlier version of the
--shared library.
--
-- You can include a version script directly in the main linker script,
--or you can supply the version script as an implicit linker script. You
--can also use the `--version-script' linker option.
--
-- The syntax of the `VERSION' command is simply
-- VERSION { version-script-commands }
--
-- The format of the version script commands is identical to that used
--by Sun's linker in Solaris 2.5. The version script defines a tree of
--version nodes. You specify the node names and interdependencies in the
--version script. You can specify which symbols are bound to which
--version nodes, and you can reduce a specified set of symbols to local
--scope so that they are not globally visible outside of the shared
--library.
--
-- The easiest way to demonstrate the version script language is with a
--few examples.
--
-- VERS_1.1 {
-- global:
-- foo1;
-- local:
-- old*;
-- original*;
-- new*;
-- };
--
-- VERS_1.2 {
-- foo2;
-- } VERS_1.1;
--
-- VERS_2.0 {
-- bar1; bar2;
-- extern "C++" {
-- ns::*;
-- "f(int, double)";
-- };
-- } VERS_1.2;
--
-- This example version script defines three version nodes. The first
--version node defined is `VERS_1.1'; it has no other dependencies. The
--script binds the symbol `foo1' to `VERS_1.1'. It reduces a number of
--symbols to local scope so that they are not visible outside of the
--shared library; this is done using wildcard patterns, so that any
--symbol whose name begins with `old', `original', or `new' is matched.
--The wildcard patterns available are the same as those used in the shell
--when matching filenames (also known as "globbing"). However, if you
--specify the symbol name inside double quotes, then the name is treated
--as literal, rather than as a glob pattern.
--
-- Next, the version script defines node `VERS_1.2'. This node depends
--upon `VERS_1.1'. The script binds the symbol `foo2' to the version
--node `VERS_1.2'.
--
-- Finally, the version script defines node `VERS_2.0'. This node
--depends upon `VERS_1.2'. The scripts binds the symbols `bar1' and
--`bar2' are bound to the version node `VERS_2.0'.
--
-- When the linker finds a symbol defined in a library which is not
--specifically bound to a version node, it will effectively bind it to an
--unspecified base version of the library. You can bind all otherwise
--unspecified symbols to a given version node by using `global: *;'
--somewhere in the version script. Note that it's slightly crazy to use
--wildcards in a global spec except on the last version node. Global
--wildcards elsewhere run the risk of accidentally adding symbols to the
--set exported for an old version. That's wrong since older versions
--ought to have a fixed set of symbols.
--
-- The names of the version nodes have no specific meaning other than
--what they might suggest to the person reading them. The `2.0' version
--could just as well have appeared in between `1.1' and `1.2'. However,
--this would be a confusing way to write a version script.
--
-- Node name can be omitted, provided it is the only version node in
--the version script. Such version script doesn't assign any versions to
--symbols, only selects which symbols will be globally visible out and
--which won't.
--
-- { global: foo; bar; local: *; };
--
-- When you link an application against a shared library that has
--versioned symbols, the application itself knows which version of each
--symbol it requires, and it also knows which version nodes it needs from
--each shared library it is linked against. Thus at runtime, the dynamic
--loader can make a quick check to make sure that the libraries you have
--linked against do in fact supply all of the version nodes that the
--application will need to resolve all of the dynamic symbols. In this
--way it is possible for the dynamic linker to know with certainty that
--all external symbols that it needs will be resolvable without having to
--search for each symbol reference.
--
-- The symbol versioning is in effect a much more sophisticated way of
--doing minor version checking that SunOS does. The fundamental problem
--that is being addressed here is that typically references to external
--functions are bound on an as-needed basis, and are not all bound when
--the application starts up. If a shared library is out of date, a
--required interface may be missing; when the application tries to use
--that interface, it may suddenly and unexpectedly fail. With symbol
--versioning, the user will get a warning when they start their program if
--the libraries being used with the application are too old.
--
-- There are several GNU extensions to Sun's versioning approach. The
--first of these is the ability to bind a symbol to a version node in the
--source file where the symbol is defined instead of in the versioning
--script. This was done mainly to reduce the burden on the library
--maintainer. You can do this by putting something like:
-- __asm__(".symver original_foo,foo@VERS_1.1");
-- in the C source file. This renames the function `original_foo' to
--be an alias for `foo' bound to the version node `VERS_1.1'. The
--`local:' directive can be used to prevent the symbol `original_foo'
--from being exported. A `.symver' directive takes precedence over a
--version script.
--
-- The second GNU extension is to allow multiple versions of the same
--function to appear in a given shared library. In this way you can make
--an incompatible change to an interface without increasing the major
--version number of the shared library, while still allowing applications
--linked against the old interface to continue to function.
--
-- To do this, you must use multiple `.symver' directives in the source
--file. Here is an example:
--
-- __asm__(".symver original_foo,foo@");
-- __asm__(".symver old_foo,foo@VERS_1.1");
-- __asm__(".symver old_foo1,foo@VERS_1.2");
-- __asm__(".symver new_foo,foo@@VERS_2.0");
--
-- In this example, `foo@' represents the symbol `foo' bound to the
--unspecified base version of the symbol. The source file that contains
--this example would define 4 C functions: `original_foo', `old_foo',
--`old_foo1', and `new_foo'.
--
-- When you have multiple definitions of a given symbol, there needs to
--be some way to specify a default version to which external references to
--this symbol will be bound. You can do this with the `foo@@VERS_2.0'
--type of `.symver' directive. You can only declare one version of a
--symbol as the default in this manner; otherwise you would effectively
--have multiple definitions of the same symbol.
--
-- If you wish to bind a reference to a specific version of the symbol
--within the shared library, you can use the aliases of convenience
--(i.e., `old_foo'), or you can use the `.symver' directive to
--specifically bind to an external version of the function in question.
--
-- You can also specify the language in the version script:
--
-- VERSION extern "lang" { version-script-commands }
--
-- The supported `lang's are `C', `C++', and `Java'. The linker will
--iterate over the list of symbols at the link time and demangle them
--according to `lang' before matching them to the patterns specified in
--`version-script-commands'. The default `lang' is `C'.
--
-- Demangled names may contains spaces and other special characters. As
--described above, you can use a glob pattern to match demangled names,
--or you can use a double-quoted string to match the string exactly. In
--the latter case, be aware that minor differences (such as differing
--whitespace) between the version script and the demangler output will
--cause a mismatch. As the exact string generated by the demangler might
--change in the future, even if the mangled name does not, you should
--check that all of your version directives are behaving as you expect
--when you upgrade.
--
--
--File: ld.info, Node: Expressions, Next: Implicit Linker Scripts, Prev: VERSION, Up: Scripts
--
--3.10 Expressions in Linker Scripts
--==================================
--
--The syntax for expressions in the linker script language is identical to
--that of C expressions. All expressions are evaluated as integers. All
--expressions are evaluated in the same size, which is 32 bits if both the
--host and target are 32 bits, and is otherwise 64 bits.
--
-- You can use and set symbol values in expressions.
--
-- The linker defines several special purpose builtin functions for use
--in expressions.
--
--* Menu:
--
--* Constants:: Constants
--* Symbolic Constants:: Symbolic constants
--* Symbols:: Symbol Names
--* Orphan Sections:: Orphan Sections
--* Location Counter:: The Location Counter
--* Operators:: Operators
--* Evaluation:: Evaluation
--* Expression Section:: The Section of an Expression
--* Builtin Functions:: Builtin Functions
--
--
--File: ld.info, Node: Constants, Next: Symbolic Constants, Up: Expressions
--
--3.10.1 Constants
------------------
--
--All constants are integers.
--
-- As in C, the linker considers an integer beginning with `0' to be
--octal, and an integer beginning with `0x' or `0X' to be hexadecimal.
--Alternatively the linker accepts suffixes of `h' or `H' for
--hexadecimal, `o' or `O' for octal, `b' or `B' for binary and `d' or `D'
--for decimal. Any integer value without a prefix or a suffix is
--considered to be decimal.
--
-- In addition, you can use the suffixes `K' and `M' to scale a
--constant by `1024' or `1024*1024' respectively. For example, the
--following all refer to the same quantity:
--
-- _fourk_1 = 4K;
-- _fourk_2 = 4096;
-- _fourk_3 = 0x1000;
-- _fourk_4 = 10000o;
--
-- Note - the `K' and `M' suffixes cannot be used in conjunction with
--the base suffixes mentioned above.
--
--
--File: ld.info, Node: Symbolic Constants, Next: Symbols, Prev: Constants, Up: Expressions
--
--3.10.2 Symbolic Constants
---------------------------
--
--It is possible to refer to target specific constants via the use of the
--`CONSTANT(NAME)' operator, where NAME is one of:
--
--`MAXPAGESIZE'
-- The target's maximum page size.
--
--`COMMONPAGESIZE'
-- The target's default page size.
--
-- So for example:
--
-- .text ALIGN (CONSTANT (MAXPAGESIZE)) : { *(.text) }
--
-- will create a text section aligned to the largest page boundary
--supported by the target.
--
--
--File: ld.info, Node: Symbols, Next: Orphan Sections, Prev: Symbolic Constants, Up: Expressions
--
--3.10.3 Symbol Names
---------------------
--
--Unless quoted, symbol names start with a letter, underscore, or period
--and may include letters, digits, underscores, periods, and hyphens.
--Unquoted symbol names must not conflict with any keywords. You can
--specify a symbol which contains odd characters or has the same name as a
--keyword by surrounding the symbol name in double quotes:
-- "SECTION" = 9;
-- "with a space" = "also with a space" + 10;
--
-- Since symbols can contain many non-alphabetic characters, it is
--safest to delimit symbols with spaces. For example, `A-B' is one
--symbol, whereas `A - B' is an expression involving subtraction.
--
--
--File: ld.info, Node: Orphan Sections, Next: Location Counter, Prev: Symbols, Up: Expressions
--
--3.10.4 Orphan Sections
------------------------
--
--Orphan sections are sections present in the input files which are not
--explicitly placed into the output file by the linker script. The
--linker will still copy these sections into the output file, but it has
--to guess as to where they should be placed. The linker uses a simple
--heuristic to do this. It attempts to place orphan sections after
--non-orphan sections of the same attribute, such as code vs data,
--loadable vs non-loadable, etc. If there is not enough room to do this
--then it places at the end of the file.
--
-- For ELF targets, the attribute of the section includes section type
--as well as section flag.
--
-- If an orphaned section's name is representable as a C identifier then
--the linker will automatically *note PROVIDE:: two symbols:
--__start_SECNAME and __stop_SECNAME, where SECNAME is the name of the
--section. These indicate the start address and end address of the
--orphaned section respectively. Note: most section names are not
--representable as C identifiers because they contain a `.' character.
--
--
--File: ld.info, Node: Location Counter, Next: Operators, Prev: Orphan Sections, Up: Expressions
--
--3.10.5 The Location Counter
-----------------------------
--
--The special linker variable "dot" `.' always contains the current
--output location counter. Since the `.' always refers to a location in
--an output section, it may only appear in an expression within a
--`SECTIONS' command. The `.' symbol may appear anywhere that an
--ordinary symbol is allowed in an expression.
--
-- Assigning a value to `.' will cause the location counter to be
--moved. This may be used to create holes in the output section. The
--location counter may not be moved backwards inside an output section,
--and may not be moved backwards outside of an output section if so doing
--creates areas with overlapping LMAs.
--
-- SECTIONS
-- {
-- output :
-- {
-- file1(.text)
-- . = . + 1000;
-- file2(.text)
-- . += 1000;
-- file3(.text)
-- } = 0x12345678;
-- }
-- In the previous example, the `.text' section from `file1' is located
--at the beginning of the output section `output'. It is followed by a
--1000 byte gap. Then the `.text' section from `file2' appears, also
--with a 1000 byte gap following before the `.text' section from `file3'.
--The notation `= 0x12345678' specifies what data to write in the gaps
--(*note Output Section Fill::).
--
-- Note: `.' actually refers to the byte offset from the start of the
--current containing object. Normally this is the `SECTIONS' statement,
--whose start address is 0, hence `.' can be used as an absolute address.
--If `.' is used inside a section description however, it refers to the
--byte offset from the start of that section, not an absolute address.
--Thus in a script like this:
--
-- SECTIONS
-- {
-- . = 0x100
-- .text: {
-- *(.text)
-- . = 0x200
-- }
-- . = 0x500
-- .data: {
-- *(.data)
-- . += 0x600
-- }
-- }
--
-- The `.text' section will be assigned a starting address of 0x100 and
--a size of exactly 0x200 bytes, even if there is not enough data in the
--`.text' input sections to fill this area. (If there is too much data,
--an error will be produced because this would be an attempt to move `.'
--backwards). The `.data' section will start at 0x500 and it will have
--an extra 0x600 bytes worth of space after the end of the values from
--the `.data' input sections and before the end of the `.data' output
--section itself.
--
-- Setting symbols to the value of the location counter outside of an
--output section statement can result in unexpected values if the linker
--needs to place orphan sections. For example, given the following:
--
-- SECTIONS
-- {
-- start_of_text = . ;
-- .text: { *(.text) }
-- end_of_text = . ;
--
-- start_of_data = . ;
-- .data: { *(.data) }
-- end_of_data = . ;
-- }
--
-- If the linker needs to place some input section, e.g. `.rodata', not
--mentioned in the script, it might choose to place that section between
--`.text' and `.data'. You might think the linker should place `.rodata'
--on the blank line in the above script, but blank lines are of no
--particular significance to the linker. As well, the linker doesn't
--associate the above symbol names with their sections. Instead, it
--assumes that all assignments or other statements belong to the previous
--output section, except for the special case of an assignment to `.'.
--I.e., the linker will place the orphan `.rodata' section as if the
--script was written as follows:
--
-- SECTIONS
-- {
-- start_of_text = . ;
-- .text: { *(.text) }
-- end_of_text = . ;
--
-- start_of_data = . ;
-- .rodata: { *(.rodata) }
-- .data: { *(.data) }
-- end_of_data = . ;
-- }
--
-- This may or may not be the script author's intention for the value of
--`start_of_data'. One way to influence the orphan section placement is
--to assign the location counter to itself, as the linker assumes that an
--assignment to `.' is setting the start address of a following output
--section and thus should be grouped with that section. So you could
--write:
--
-- SECTIONS
-- {
-- start_of_text = . ;
-- .text: { *(.text) }
-- end_of_text = . ;
--
-- . = . ;
-- start_of_data = . ;
-- .data: { *(.data) }
-- end_of_data = . ;
-- }
--
-- Now, the orphan `.rodata' section will be placed between
--`end_of_text' and `start_of_data'.
--
--
--File: ld.info, Node: Operators, Next: Evaluation, Prev: Location Counter, Up: Expressions
--
--3.10.6 Operators
------------------
--
--The linker recognizes the standard C set of arithmetic operators, with
--the standard bindings and precedence levels:
-- precedence associativity Operators Notes
-- (highest)
-- 1 left ! - ~ (1)
-- 2 left * / %
-- 3 left + -
-- 4 left >> <<
-- 5 left == != > < <= >=
-- 6 left &
-- 7 left |
-- 8 left &&
-- 9 left ||
-- 10 right ? :
-- 11 right &= += -= *= /= (2)
-- (lowest)
-- Notes: (1) Prefix operators (2) *Note Assignments::.
--
--
--File: ld.info, Node: Evaluation, Next: Expression Section, Prev: Operators, Up: Expressions
--
--3.10.7 Evaluation
-------------------
--
--The linker evaluates expressions lazily. It only computes the value of
--an expression when absolutely necessary.
--
-- The linker needs some information, such as the value of the start
--address of the first section, and the origins and lengths of memory
--regions, in order to do any linking at all. These values are computed
--as soon as possible when the linker reads in the linker script.
--
-- However, other values (such as symbol values) are not known or needed
--until after storage allocation. Such values are evaluated later, when
--other information (such as the sizes of output sections) is available
--for use in the symbol assignment expression.
--
-- The sizes of sections cannot be known until after allocation, so
--assignments dependent upon these are not performed until after
--allocation.
--
-- Some expressions, such as those depending upon the location counter
--`.', must be evaluated during section allocation.
--
-- If the result of an expression is required, but the value is not
--available, then an error results. For example, a script like the
--following
-- SECTIONS
-- {
-- .text 9+this_isnt_constant :
-- { *(.text) }
-- }
--will cause the error message `non constant expression for initial
--address'.
--
--
--File: ld.info, Node: Expression Section, Next: Builtin Functions, Prev: Evaluation, Up: Expressions
--
--3.10.8 The Section of an Expression
-------------------------------------
--
--Addresses and symbols may be section relative, or absolute. A section
--relative symbol is relocatable. If you request relocatable output
--using the `-r' option, a further link operation may change the value of
--a section relative symbol. On the other hand, an absolute symbol will
--retain the same value throughout any further link operations.
--
-- Some terms in linker expressions are addresses. This is true of
--section relative symbols and for builtin functions that return an
--address, such as `ADDR', `LOADADDR', `ORIGIN' and `SEGMENT_START'.
--Other terms are simply numbers, or are builtin functions that return a
--non-address value, such as `LENGTH'. One complication is that unless
--you set `LD_FEATURE ("SANE_EXPR")' (*note Miscellaneous Commands::),
--numbers and absolute symbols are treated differently depending on their
--location, for compatibility with older versions of `ld'. Expressions
--appearing outside an output section definition treat all numbers as
--absolute addresses. Expressions appearing inside an output section
--definition treat absolute symbols as numbers. If `LD_FEATURE
--("SANE_EXPR")' is given, then absolute symbols and numbers are simply
--treated as numbers everywhere.
--
-- In the following simple example,
--
-- SECTIONS
-- {
-- . = 0x100;
-- __executable_start = 0x100;
-- .data :
-- {
-- . = 0x10;
-- __data_start = 0x10;
-- *(.data)
-- }
-- ...
-- }
--
-- both `.' and `__executable_start' are set to the absolute address
--0x100 in the first two assignments, then both `.' and `__data_start'
--are set to 0x10 relative to the `.data' section in the second two
--assignments.
--
-- For expressions involving numbers, relative addresses and absolute
--addresses, ld follows these rules to evaluate terms:
--
-- * Unary operations on an absolute address or number, and binary
-- operations on two absolute addresses or two numbers, or between one
-- absolute address and a number, apply the operator to the value(s).
--
-- * Unary operations on a relative address, and binary operations on
-- two relative addresses in the same section or between one relative
-- address and a number, apply the operator to the offset part of the
-- address(es).
--
-- * Other binary operations, that is, between two relative addresses
-- not in the same section, or between a relative address and an
-- absolute address, first convert any non-absolute term to an
-- absolute address before applying the operator.
--
-- The result section of each sub-expression is as follows:
--
-- * An operation involving only numbers results in a number.
--
-- * The result of comparisons, `&&' and `||' is also a number.
--
-- * The result of other binary arithmetic and logical operations on two
-- relative addresses in the same section or two absolute addresses
-- (after above conversions) is also a number.
--
-- * The result of other operations on relative addresses or one
-- relative address and a number, is a relative address in the same
-- section as the relative operand(s).
--
-- * The result of other operations on absolute addresses (after above
-- conversions) is an absolute address.
--
-- You can use the builtin function `ABSOLUTE' to force an expression
--to be absolute when it would otherwise be relative. For example, to
--create an absolute symbol set to the address of the end of the output
--section `.data':
-- SECTIONS
-- {
-- .data : { *(.data) _edata = ABSOLUTE(.); }
-- }
-- If `ABSOLUTE' were not used, `_edata' would be relative to the
--`.data' section.
--
-- Using `LOADADDR' also forces an expression absolute, since this
--particular builtin function returns an absolute address.
--
--
--File: ld.info, Node: Builtin Functions, Prev: Expression Section, Up: Expressions
--
--3.10.9 Builtin Functions
--------------------------
--
--The linker script language includes a number of builtin functions for
--use in linker script expressions.
--
--`ABSOLUTE(EXP)'
-- Return the absolute (non-relocatable, as opposed to non-negative)
-- value of the expression EXP. Primarily useful to assign an
-- absolute value to a symbol within a section definition, where
-- symbol values are normally section relative. *Note Expression
-- Section::.
--
--`ADDR(SECTION)'
-- Return the address (VMA) of the named SECTION. Your script must
-- previously have defined the location of that section. In the
-- following example, `start_of_output_1', `symbol_1' and `symbol_2'
-- are assigned equivalent values, except that `symbol_1' will be
-- relative to the `.output1' section while the other two will be
-- absolute:
-- SECTIONS { ...
-- .output1 :
-- {
-- start_of_output_1 = ABSOLUTE(.);
-- ...
-- }
-- .output :
-- {
-- symbol_1 = ADDR(.output1);
-- symbol_2 = start_of_output_1;
-- }
-- ... }
--
--`ALIGN(ALIGN)'
--`ALIGN(EXP,ALIGN)'
-- Return the location counter (`.') or arbitrary expression aligned
-- to the next ALIGN boundary. The single operand `ALIGN' doesn't
-- change the value of the location counter--it just does arithmetic
-- on it. The two operand `ALIGN' allows an arbitrary expression to
-- be aligned upwards (`ALIGN(ALIGN)' is equivalent to `ALIGN(.,
-- ALIGN)').
--
-- Here is an example which aligns the output `.data' section to the
-- next `0x2000' byte boundary after the preceding section and sets a
-- variable within the section to the next `0x8000' boundary after the
-- input sections:
-- SECTIONS { ...
-- .data ALIGN(0x2000): {
-- *(.data)
-- variable = ALIGN(0x8000);
-- }
-- ... }
-- The first use of `ALIGN' in this example specifies the
-- location of a section because it is used as the optional ADDRESS
-- attribute of a section definition (*note Output Section
-- Address::). The second use of `ALIGN' is used to defines the
-- value of a symbol.
--
-- The builtin function `NEXT' is closely related to `ALIGN'.
--
--`ALIGNOF(SECTION)'
-- Return the alignment in bytes of the named SECTION, if that
-- section has been allocated. If the section has not been allocated
-- when this is evaluated, the linker will report an error. In the
-- following example, the alignment of the `.output' section is
-- stored as the first value in that section.
-- SECTIONS{ ...
-- .output {
-- LONG (ALIGNOF (.output))
-- ...
-- }
-- ... }
--
--`BLOCK(EXP)'
-- This is a synonym for `ALIGN', for compatibility with older linker
-- scripts. It is most often seen when setting the address of an
-- output section.
--
--`DATA_SEGMENT_ALIGN(MAXPAGESIZE, COMMONPAGESIZE)'
-- This is equivalent to either
-- (ALIGN(MAXPAGESIZE) + (. & (MAXPAGESIZE - 1)))
-- or
-- (ALIGN(MAXPAGESIZE) + (. & (MAXPAGESIZE - COMMONPAGESIZE)))
-- depending on whether the latter uses fewer COMMONPAGESIZE sized
-- pages for the data segment (area between the result of this
-- expression and `DATA_SEGMENT_END') than the former or not. If the
-- latter form is used, it means COMMONPAGESIZE bytes of runtime
-- memory will be saved at the expense of up to COMMONPAGESIZE wasted
-- bytes in the on-disk file.
--
-- This expression can only be used directly in `SECTIONS' commands,
-- not in any output section descriptions and only once in the linker
-- script. COMMONPAGESIZE should be less or equal to MAXPAGESIZE and
-- should be the system page size the object wants to be optimized
-- for (while still working on system page sizes up to MAXPAGESIZE).
--
-- Example:
-- . = DATA_SEGMENT_ALIGN(0x10000, 0x2000);
--
--`DATA_SEGMENT_END(EXP)'
-- This defines the end of data segment for `DATA_SEGMENT_ALIGN'
-- evaluation purposes.
--
-- . = DATA_SEGMENT_END(.);
--
--`DATA_SEGMENT_RELRO_END(OFFSET, EXP)'
-- This defines the end of the `PT_GNU_RELRO' segment when `-z relro'
-- option is used. Second argument is returned. When `-z relro'
-- option is not present, `DATA_SEGMENT_RELRO_END' does nothing,
-- otherwise `DATA_SEGMENT_ALIGN' is padded so that EXP + OFFSET is
-- aligned to the most commonly used page boundary for particular
-- target. If present in the linker script, it must always come in
-- between `DATA_SEGMENT_ALIGN' and `DATA_SEGMENT_END'.
--
-- . = DATA_SEGMENT_RELRO_END(24, .);
--
--`DEFINED(SYMBOL)'
-- Return 1 if SYMBOL is in the linker global symbol table and is
-- defined before the statement using DEFINED in the script, otherwise
-- return 0. You can use this function to provide default values for
-- symbols. For example, the following script fragment shows how to
-- set a global symbol `begin' to the first location in the `.text'
-- section--but if a symbol called `begin' already existed, its value
-- is preserved:
--
-- SECTIONS { ...
-- .text : {
-- begin = DEFINED(begin) ? begin : . ;
-- ...
-- }
-- ...
-- }
--
--`LENGTH(MEMORY)'
-- Return the length of the memory region named MEMORY.
--
--`LOADADDR(SECTION)'
-- Return the absolute LMA of the named SECTION. (*note Output
-- Section LMA::).
--
--`LOG2CEIL(EXP)'
-- Return the binary logarithm of EXP rounded towards infinity.
-- `LOG2CEIL(0)' returns 0.
--
--`MAX(EXP1, EXP2)'
-- Returns the maximum of EXP1 and EXP2.
--
--`MIN(EXP1, EXP2)'
-- Returns the minimum of EXP1 and EXP2.
--
--`NEXT(EXP)'
-- Return the next unallocated address that is a multiple of EXP.
-- This function is closely related to `ALIGN(EXP)'; unless you use
-- the `MEMORY' command to define discontinuous memory for the output
-- file, the two functions are equivalent.
--
--`ORIGIN(MEMORY)'
-- Return the origin of the memory region named MEMORY.
--
--`SEGMENT_START(SEGMENT, DEFAULT)'
-- Return the base address of the named SEGMENT. If an explicit
-- value has already been given for this segment (with a command-line
-- `-T' option) then that value will be returned otherwise the value
-- will be DEFAULT. At present, the `-T' command-line option can
-- only be used to set the base address for the "text", "data", and
-- "bss" sections, but you can use `SEGMENT_START' with any segment
-- name.
--
--`SIZEOF(SECTION)'
-- Return the size in bytes of the named SECTION, if that section has
-- been allocated. If the section has not been allocated when this is
-- evaluated, the linker will report an error. In the following
-- example, `symbol_1' and `symbol_2' are assigned identical values:
-- SECTIONS{ ...
-- .output {
-- .start = . ;
-- ...
-- .end = . ;
-- }
-- symbol_1 = .end - .start ;
-- symbol_2 = SIZEOF(.output);
-- ... }
--
--`SIZEOF_HEADERS'
--`sizeof_headers'
-- Return the size in bytes of the output file's headers. This is
-- information which appears at the start of the output file. You
-- can use this number when setting the start address of the first
-- section, if you choose, to facilitate paging.
--
-- When producing an ELF output file, if the linker script uses the
-- `SIZEOF_HEADERS' builtin function, the linker must compute the
-- number of program headers before it has determined all the section
-- addresses and sizes. If the linker later discovers that it needs
-- additional program headers, it will report an error `not enough
-- room for program headers'. To avoid this error, you must avoid
-- using the `SIZEOF_HEADERS' function, or you must rework your linker
-- script to avoid forcing the linker to use additional program
-- headers, or you must define the program headers yourself using the
-- `PHDRS' command (*note PHDRS::).
--
--
--File: ld.info, Node: Implicit Linker Scripts, Prev: Expressions, Up: Scripts
--
--3.11 Implicit Linker Scripts
--============================
--
--If you specify a linker input file which the linker can not recognize as
--an object file or an archive file, it will try to read the file as a
--linker script. If the file can not be parsed as a linker script, the
--linker will report an error.
--
-- An implicit linker script will not replace the default linker script.
--
-- Typically an implicit linker script would contain only symbol
--assignments, or the `INPUT', `GROUP', or `VERSION' commands.
--
-- Any input files read because of an implicit linker script will be
--read at the position in the command line where the implicit linker
--script was read. This can affect archive searching.
--
--
--File: ld.info, Node: Machine Dependent, Next: BFD, Prev: Scripts, Up: Top
--
--4 Machine Dependent Features
--****************************
--
--`ld' has additional features on some platforms; the following sections
--describe them. Machines where `ld' has no additional functionality are
--not listed.
--
--* Menu:
--
--
--* H8/300:: `ld' and the H8/300
--
--* i960:: `ld' and the Intel 960 family
--
--* M68HC11/68HC12:: `ld' and the Motorola 68HC11 and 68HC12 families
--
--* ARM:: `ld' and the ARM family
--
--* HPPA ELF32:: `ld' and HPPA 32-bit ELF
--
--* M68K:: `ld' and the Motorola 68K family
--
--* MIPS:: `ld' and the MIPS family
--
--* MMIX:: `ld' and MMIX
--
--* MSP430:: `ld' and MSP430
--
--* PowerPC ELF32:: `ld' and PowerPC 32-bit ELF Support
--
--* PowerPC64 ELF64:: `ld' and PowerPC64 64-bit ELF Support
--
--* SPU ELF:: `ld' and SPU ELF Support
--
--* TI COFF:: `ld' and TI COFF
--
--* WIN32:: `ld' and WIN32 (cygwin/mingw)
--
--* Xtensa:: `ld' and Xtensa Processors
--
--
--File: ld.info, Node: H8/300, Next: i960, Up: Machine Dependent
--
--4.1 `ld' and the H8/300
--=======================
--
--For the H8/300, `ld' can perform these global optimizations when you
--specify the `--relax' command-line option.
--
--_relaxing address modes_
-- `ld' finds all `jsr' and `jmp' instructions whose targets are
-- within eight bits, and turns them into eight-bit program-counter
-- relative `bsr' and `bra' instructions, respectively.
--
--_synthesizing instructions_
-- `ld' finds all `mov.b' instructions which use the sixteen-bit
-- absolute address form, but refer to the top page of memory, and
-- changes them to use the eight-bit address form. (That is: the
-- linker turns `mov.b `@'AA:16' into `mov.b `@'AA:8' whenever the
-- address AA is in the top page of memory).
--
-- `ld' finds all `mov' instructions which use the register indirect
-- with 32-bit displacement addressing mode, but use a small
-- displacement inside 16-bit displacement range, and changes them to
-- use the 16-bit displacement form. (That is: the linker turns
-- `mov.b `@'D:32,ERx' into `mov.b `@'D:16,ERx' whenever the
-- displacement D is in the 16 bit signed integer range. Only
-- implemented in ELF-format ld).
--
--_bit manipulation instructions_
-- `ld' finds all bit manipulation instructions like `band, bclr,
-- biand, bild, bior, bist, bixor, bld, bnot, bor, bset, bst, btst,
-- bxor' which use 32 bit and 16 bit absolute address form, but refer
-- to the top page of memory, and changes them to use the 8 bit
-- address form. (That is: the linker turns `bset #xx:3,`@'AA:32'
-- into `bset #xx:3,`@'AA:8' whenever the address AA is in the top
-- page of memory).
--
--_system control instructions_
-- `ld' finds all `ldc.w, stc.w' instructions which use the 32 bit
-- absolute address form, but refer to the top page of memory, and
-- changes them to use 16 bit address form. (That is: the linker
-- turns `ldc.w `@'AA:32,ccr' into `ldc.w `@'AA:16,ccr' whenever the
-- address AA is in the top page of memory).
--
--
--File: ld.info, Node: i960, Next: M68HC11/68HC12, Prev: H8/300, Up: Machine Dependent
--
--4.2 `ld' and the Intel 960 Family
--=================================
--
--You can use the `-AARCHITECTURE' command line option to specify one of
--the two-letter names identifying members of the 960 family; the option
--specifies the desired output target, and warns of any incompatible
--instructions in the input files. It also modifies the linker's search
--strategy for archive libraries, to support the use of libraries
--specific to each particular architecture, by including in the search
--loop names suffixed with the string identifying the architecture.
--
-- For example, if your `ld' command line included `-ACA' as well as
--`-ltry', the linker would look (in its built-in search paths, and in
--any paths you specify with `-L') for a library with the names
--
-- try
-- libtry.a
-- tryca
-- libtryca.a
--
--The first two possibilities would be considered in any event; the last
--two are due to the use of `-ACA'.
--
-- You can meaningfully use `-A' more than once on a command line, since
--the 960 architecture family allows combination of target architectures;
--each use will add another pair of name variants to search for when `-l'
--specifies a library.
--
-- `ld' supports the `--relax' option for the i960 family. If you
--specify `--relax', `ld' finds all `balx' and `calx' instructions whose
--targets are within 24 bits, and turns them into 24-bit program-counter
--relative `bal' and `cal' instructions, respectively. `ld' also turns
--`cal' instructions into `bal' instructions when it determines that the
--target subroutine is a leaf routine (that is, the target subroutine does
--not itself call any subroutines).
--
-- The `--fix-cortex-a8' switch enables a link-time workaround for an
--erratum in certain Cortex-A8 processors. The workaround is enabled by
--default if you are targeting the ARM v7-A architecture profile. It can
--be enabled otherwise by specifying `--fix-cortex-a8', or disabled
--unconditionally by specifying `--no-fix-cortex-a8'.
--
-- The erratum only affects Thumb-2 code. Please contact ARM for
--further details.
--
-- The `--no-merge-exidx-entries' switch disables the merging of
--adjacent exidx entries in debuginfo.
--
--
--File: ld.info, Node: M68HC11/68HC12, Next: ARM, Prev: i960, Up: Machine Dependent
--
--4.3 `ld' and the Motorola 68HC11 and 68HC12 families
--====================================================
--
--4.3.1 Linker Relaxation
-------------------------
--
--For the Motorola 68HC11, `ld' can perform these global optimizations
--when you specify the `--relax' command-line option.
--
--_relaxing address modes_
-- `ld' finds all `jsr' and `jmp' instructions whose targets are
-- within eight bits, and turns them into eight-bit program-counter
-- relative `bsr' and `bra' instructions, respectively.
--
-- `ld' also looks at all 16-bit extended addressing modes and
-- transforms them in a direct addressing mode when the address is in
-- page 0 (between 0 and 0x0ff).
--
--_relaxing gcc instruction group_
-- When `gcc' is called with `-mrelax', it can emit group of
-- instructions that the linker can optimize to use a 68HC11 direct
-- addressing mode. These instructions consists of `bclr' or `bset'
-- instructions.
--
--
--4.3.2 Trampoline Generation
-----------------------------
--
--For 68HC11 and 68HC12, `ld' can generate trampoline code to call a far
--function using a normal `jsr' instruction. The linker will also change
--the relocation to some far function to use the trampoline address
--instead of the function address. This is typically the case when a
--pointer to a function is taken. The pointer will in fact point to the
--function trampoline.
--
--
--File: ld.info, Node: ARM, Next: HPPA ELF32, Prev: M68HC11/68HC12, Up: Machine Dependent
--
--4.4 `ld' and the ARM family
--===========================
--
--For the ARM, `ld' will generate code stubs to allow functions calls
--between ARM and Thumb code. These stubs only work with code that has
--been compiled and assembled with the `-mthumb-interwork' command line
--option. If it is necessary to link with old ARM object files or
--libraries, which have not been compiled with the -mthumb-interwork
--option then the `--support-old-code' command line switch should be
--given to the linker. This will make it generate larger stub functions
--which will work with non-interworking aware ARM code. Note, however,
--the linker does not support generating stubs for function calls to
--non-interworking aware Thumb code.
--
-- The `--thumb-entry' switch is a duplicate of the generic `--entry'
--switch, in that it sets the program's starting address. But it also
--sets the bottom bit of the address, so that it can be branched to using
--a BX instruction, and the program will start executing in Thumb mode
--straight away.
--
-- The `--use-nul-prefixed-import-tables' switch is specifying, that
--the import tables idata4 and idata5 have to be generated with a zero
--element prefix for import libraries. This is the old style to generate
--import tables. By default this option is turned off.
--
-- The `--be8' switch instructs `ld' to generate BE8 format
--executables. This option is only valid when linking big-endian objects.
--The resulting image will contain big-endian data and little-endian code.
--
-- The `R_ARM_TARGET1' relocation is typically used for entries in the
--`.init_array' section. It is interpreted as either `R_ARM_REL32' or
--`R_ARM_ABS32', depending on the target. The `--target1-rel' and
--`--target1-abs' switches override the default.
--
-- The `--target2=type' switch overrides the default definition of the
--`R_ARM_TARGET2' relocation. Valid values for `type', their meanings,
--and target defaults are as follows:
--`rel'
-- `R_ARM_REL32' (arm*-*-elf, arm*-*-eabi)
--
--`abs'
-- `R_ARM_ABS32' (arm*-*-symbianelf)
--
--`got-rel'
-- `R_ARM_GOT_PREL' (arm*-*-linux, arm*-*-*bsd)
--
-- The `R_ARM_V4BX' relocation (defined by the ARM AAELF specification)
--enables objects compiled for the ARMv4 architecture to be
--interworking-safe when linked with other objects compiled for ARMv4t,
--but also allows pure ARMv4 binaries to be built from the same ARMv4
--objects.
--
-- In the latter case, the switch `--fix-v4bx' must be passed to the
--linker, which causes v4t `BX rM' instructions to be rewritten as `MOV
--PC,rM', since v4 processors do not have a `BX' instruction.
--
-- In the former case, the switch should not be used, and `R_ARM_V4BX'
--relocations are ignored.
--
-- Replace `BX rM' instructions identified by `R_ARM_V4BX' relocations
--with a branch to the following veneer:
--
-- TST rM, #1
-- MOVEQ PC, rM
-- BX Rn
--
-- This allows generation of libraries/applications that work on ARMv4
--cores and are still interworking safe. Note that the above veneer
--clobbers the condition flags, so may cause incorrect program behavior
--in rare cases.
--
-- The `--use-blx' switch enables the linker to use ARM/Thumb BLX
--instructions (available on ARMv5t and above) in various situations.
--Currently it is used to perform calls via the PLT from Thumb code using
--BLX rather than using BX and a mode-switching stub before each PLT
--entry. This should lead to such calls executing slightly faster.
--
-- This option is enabled implicitly for SymbianOS, so there is no need
--to specify it if you are using that target.
--
-- The `--vfp11-denorm-fix' switch enables a link-time workaround for a
--bug in certain VFP11 coprocessor hardware, which sometimes allows
--instructions with denorm operands (which must be handled by support
--code) to have those operands overwritten by subsequent instructions
--before the support code can read the intended values.
--
-- The bug may be avoided in scalar mode if you allow at least one
--intervening instruction between a VFP11 instruction which uses a
--register and another instruction which writes to the same register, or
--at least two intervening instructions if vector mode is in use. The bug
--only affects full-compliance floating-point mode: you do not need this
--workaround if you are using "runfast" mode. Please contact ARM for
--further details.
--
-- If you know you are using buggy VFP11 hardware, you can enable this
--workaround by specifying the linker option `--vfp-denorm-fix=scalar' if
--you are using the VFP11 scalar mode only, or `--vfp-denorm-fix=vector'
--if you are using vector mode (the latter also works for scalar code).
--The default is `--vfp-denorm-fix=none'.
--
-- If the workaround is enabled, instructions are scanned for
--potentially-troublesome sequences, and a veneer is created for each
--such sequence which may trigger the erratum. The veneer consists of the
--first instruction of the sequence and a branch back to the subsequent
--instruction. The original instruction is then replaced with a branch to
--the veneer. The extra cycles required to call and return from the veneer
--are sufficient to avoid the erratum in both the scalar and vector cases.
--
-- The `--fix-arm1176' switch enables a link-time workaround for an
--erratum in certain ARM1176 processors. The workaround is enabled by
--default if you are targeting ARM v6 (excluding ARM v6T2) or earlier.
--It can be disabled unconditionally by specifying `--no-fix-arm1176'.
--
-- Further information is available in the "ARM1176JZ-S and ARM1176JZF-S
--Programmer Advice Notice" available on the ARM documentation website at:
--http://infocenter.arm.com/.
--
-- The `--no-enum-size-warning' switch prevents the linker from warning
--when linking object files that specify incompatible EABI enumeration
--size attributes. For example, with this switch enabled, linking of an
--object file using 32-bit enumeration values with another using
--enumeration values fitted into the smallest possible space will not be
--diagnosed.
--
-- The `--no-wchar-size-warning' switch prevents the linker from
--warning when linking object files that specify incompatible EABI
--`wchar_t' size attributes. For example, with this switch enabled,
--linking of an object file using 32-bit `wchar_t' values with another
--using 16-bit `wchar_t' values will not be diagnosed.
--
-- The `--pic-veneer' switch makes the linker use PIC sequences for
--ARM/Thumb interworking veneers, even if the rest of the binary is not
--PIC. This avoids problems on uClinux targets where `--emit-relocs' is
--used to generate relocatable binaries.
--
-- The linker will automatically generate and insert small sequences of
--code into a linked ARM ELF executable whenever an attempt is made to
--perform a function call to a symbol that is too far away. The
--placement of these sequences of instructions - called stubs - is
--controlled by the command line option `--stub-group-size=N'. The
--placement is important because a poor choice can create a need for
--duplicate stubs, increasing the code size. The linker will try to
--group stubs together in order to reduce interruptions to the flow of
--code, but it needs guidance as to how big these groups should be and
--where they should be placed.
--
-- The value of `N', the parameter to the `--stub-group-size=' option
--controls where the stub groups are placed. If it is negative then all
--stubs are placed after the first branch that needs them. If it is
--positive then the stubs can be placed either before or after the
--branches that need them. If the value of `N' is 1 (either +1 or -1)
--then the linker will choose exactly where to place groups of stubs,
--using its built in heuristics. A value of `N' greater than 1 (or
--smaller than -1) tells the linker that a single group of stubs can
--service at most `N' bytes from the input sections.
--
-- The default, if `--stub-group-size=' is not specified, is `N = +1'.
--
-- Farcalls stubs insertion is fully supported for the ARM-EABI target
--only, because it relies on object files properties not present
--otherwise.
--
--
--File: ld.info, Node: HPPA ELF32, Next: M68K, Prev: ARM, Up: Machine Dependent
--
--4.5 `ld' and HPPA 32-bit ELF Support
--====================================
--
--When generating a shared library, `ld' will by default generate import
--stubs suitable for use with a single sub-space application. The
--`--multi-subspace' switch causes `ld' to generate export stubs, and
--different (larger) import stubs suitable for use with multiple
--sub-spaces.
--
-- Long branch stubs and import/export stubs are placed by `ld' in stub
--sections located between groups of input sections. `--stub-group-size'
--specifies the maximum size of a group of input sections handled by one
--stub section. Since branch offsets are signed, a stub section may
--serve two groups of input sections, one group before the stub section,
--and one group after it. However, when using conditional branches that
--require stubs, it may be better (for branch prediction) that stub
--sections only serve one group of input sections. A negative value for
--`N' chooses this scheme, ensuring that branches to stubs always use a
--negative offset. Two special values of `N' are recognized, `1' and
--`-1'. These both instruct `ld' to automatically size input section
--groups for the branch types detected, with the same behaviour regarding
--stub placement as other positive or negative values of `N' respectively.
--
-- Note that `--stub-group-size' does not split input sections. A
--single input section larger than the group size specified will of course
--create a larger group (of one section). If input sections are too
--large, it may not be possible for a branch to reach its stub.
--
--
--File: ld.info, Node: M68K, Next: MIPS, Prev: HPPA ELF32, Up: Machine Dependent
--
--4.6 `ld' and the Motorola 68K family
--====================================
--
--The `--got=TYPE' option lets you choose the GOT generation scheme. The
--choices are `single', `negative', `multigot' and `target'. When
--`target' is selected the linker chooses the default GOT generation
--scheme for the current target. `single' tells the linker to generate a
--single GOT with entries only at non-negative offsets. `negative'
--instructs the linker to generate a single GOT with entries at both
--negative and positive offsets. Not all environments support such GOTs.
--`multigot' allows the linker to generate several GOTs in the output
--file. All GOT references from a single input object file access the
--same GOT, but references from different input object files might access
--different GOTs. Not all environments support such GOTs.
--
--
--File: ld.info, Node: MIPS, Next: MMIX, Prev: M68K, Up: Machine Dependent
--
--4.7 `ld' and the MIPS family
--============================
--
--The `--insn32' and `--no-insn32' options control the choice of
--microMIPS instructions used in code generated by the linker, such as
--that in the PLT or lazy binding stubs, or in relaxation. If `--insn32'
--is used, then the linker only uses 32-bit instruction encodings. By
--default or if `--no-insn32' is used, all instruction encodings are used,
--including 16-bit ones where possible.
--
--
--File: ld.info, Node: MMIX, Next: MSP430, Prev: MIPS, Up: Machine Dependent
--
--4.8 `ld' and MMIX
--=================
--
--For MMIX, there is a choice of generating `ELF' object files or `mmo'
--object files when linking. The simulator `mmix' understands the `mmo'
--format. The binutils `objcopy' utility can translate between the two
--formats.
--
-- There is one special section, the `.MMIX.reg_contents' section.
--Contents in this section is assumed to correspond to that of global
--registers, and symbols referring to it are translated to special
--symbols, equal to registers. In a final link, the start address of the
--`.MMIX.reg_contents' section corresponds to the first allocated global
--register multiplied by 8. Register `$255' is not included in this
--section; it is always set to the program entry, which is at the symbol
--`Main' for `mmo' files.
--
-- Global symbols with the prefix `__.MMIX.start.', for example
--`__.MMIX.start..text' and `__.MMIX.start..data' are special. The
--default linker script uses these to set the default start address of a
--section.
--
-- Initial and trailing multiples of zero-valued 32-bit words in a
--section, are left out from an mmo file.
--
--
--File: ld.info, Node: MSP430, Next: PowerPC ELF32, Prev: MMIX, Up: Machine Dependent
--
--4.9 `ld' and MSP430
--===================
--
--For the MSP430 it is possible to select the MPU architecture. The flag
--`-m [mpu type]' will select an appropriate linker script for selected
--MPU type. (To get a list of known MPUs just pass `-m help' option to
--the linker).
--
-- The linker will recognize some extra sections which are MSP430
--specific:
--
--``.vectors''
-- Defines a portion of ROM where interrupt vectors located.
--
--``.bootloader''
-- Defines the bootloader portion of the ROM (if applicable). Any
-- code in this section will be uploaded to the MPU.
--
--``.infomem''
-- Defines an information memory section (if applicable). Any code in
-- this section will be uploaded to the MPU.
--
--``.infomemnobits''
-- This is the same as the `.infomem' section except that any code in
-- this section will not be uploaded to the MPU.
--
--``.noinit''
-- Denotes a portion of RAM located above `.bss' section.
--
-- The last two sections are used by gcc.
--
--
--File: ld.info, Node: PowerPC ELF32, Next: PowerPC64 ELF64, Prev: MSP430, Up: Machine Dependent
--
--4.10 `ld' and PowerPC 32-bit ELF Support
--========================================
--
--Branches on PowerPC processors are limited to a signed 26-bit
--displacement, which may result in `ld' giving `relocation truncated to
--fit' errors with very large programs. `--relax' enables the generation
--of trampolines that can access the entire 32-bit address space. These
--trampolines are inserted at section boundaries, so may not themselves
--be reachable if an input section exceeds 33M in size. You may combine
--`-r' and `--relax' to add trampolines in a partial link. In that case
--both branches to undefined symbols and inter-section branches are also
--considered potentially out of range, and trampolines inserted.
--
--`--bss-plt'
-- Current PowerPC GCC accepts a `-msecure-plt' option that generates
-- code capable of using a newer PLT and GOT layout that has the
-- security advantage of no executable section ever needing to be
-- writable and no writable section ever being executable. PowerPC
-- `ld' will generate this layout, including stubs to access the PLT,
-- if all input files (including startup and static libraries) were
-- compiled with `-msecure-plt'. `--bss-plt' forces the old BSS PLT
-- (and GOT layout) which can give slightly better performance.
--
--`--secure-plt'
-- `ld' will use the new PLT and GOT layout if it is linking new
-- `-fpic' or `-fPIC' code, but does not do so automatically when
-- linking non-PIC code. This option requests the new PLT and GOT
-- layout. A warning will be given if some object file requires the
-- old style BSS PLT.
--
--`--sdata-got'
-- The new secure PLT and GOT are placed differently relative to other
-- sections compared to older BSS PLT and GOT placement. The
-- location of `.plt' must change because the new secure PLT is an
-- initialized section while the old PLT is uninitialized. The
-- reason for the `.got' change is more subtle: The new placement
-- allows `.got' to be read-only in applications linked with `-z
-- relro -z now'. However, this placement means that `.sdata' cannot
-- always be used in shared libraries, because the PowerPC ABI
-- accesses `.sdata' in shared libraries from the GOT pointer.
-- `--sdata-got' forces the old GOT placement. PowerPC GCC doesn't
-- use `.sdata' in shared libraries, so this option is really only
-- useful for other compilers that may do so.
--
--`--emit-stub-syms'
-- This option causes `ld' to label linker stubs with a local symbol
-- that encodes the stub type and destination.
--
--`--no-tls-optimize'
-- PowerPC `ld' normally performs some optimization of code sequences
-- used to access Thread-Local Storage. Use this option to disable
-- the optimization.
--
--
--File: ld.info, Node: PowerPC64 ELF64, Next: SPU ELF, Prev: PowerPC ELF32, Up: Machine Dependent
--
--4.11 `ld' and PowerPC64 64-bit ELF Support
--==========================================
--
--`--stub-group-size'
-- Long branch stubs, PLT call stubs and TOC adjusting stubs are
-- placed by `ld' in stub sections located between groups of input
-- sections. `--stub-group-size' specifies the maximum size of a
-- group of input sections handled by one stub section. Since branch
-- offsets are signed, a stub section may serve two groups of input
-- sections, one group before the stub section, and one group after
-- it. However, when using conditional branches that require stubs,
-- it may be better (for branch prediction) that stub sections only
-- serve one group of input sections. A negative value for `N'
-- chooses this scheme, ensuring that branches to stubs always use a
-- negative offset. Two special values of `N' are recognized, `1'
-- and `-1'. These both instruct `ld' to automatically size input
-- section groups for the branch types detected, with the same
-- behaviour regarding stub placement as other positive or negative
-- values of `N' respectively.
--
-- Note that `--stub-group-size' does not split input sections. A
-- single input section larger than the group size specified will of
-- course create a larger group (of one section). If input sections
-- are too large, it may not be possible for a branch to reach its
-- stub.
--
--`--emit-stub-syms'
-- This option causes `ld' to label linker stubs with a local symbol
-- that encodes the stub type and destination.
--
--`--dotsyms, --no-dotsyms'
-- These two options control how `ld' interprets version patterns in
-- a version script. Older PowerPC64 compilers emitted both a
-- function descriptor symbol with the same name as the function, and
-- a code entry symbol with the name prefixed by a dot (`.'). To
-- properly version a function `foo', the version script thus needs
-- to control both `foo' and `.foo'. The option `--dotsyms', on by
-- default, automatically adds the required dot-prefixed patterns.
-- Use `--no-dotsyms' to disable this feature.
--
--`--no-tls-optimize'
-- PowerPC64 `ld' normally performs some optimization of code
-- sequences used to access Thread-Local Storage. Use this option to
-- disable the optimization.
--
--`--no-opd-optimize'
-- PowerPC64 `ld' normally removes `.opd' section entries
-- corresponding to deleted link-once functions, or functions removed
-- by the action of `--gc-sections' or linker script `/DISCARD/'.
-- Use this option to disable `.opd' optimization.
--
--`--non-overlapping-opd'
-- Some PowerPC64 compilers have an option to generate compressed
-- `.opd' entries spaced 16 bytes apart, overlapping the third word,
-- the static chain pointer (unused in C) with the first word of the
-- next entry. This option expands such entries to the full 24 bytes.
--
--`--no-toc-optimize'
-- PowerPC64 `ld' normally removes unused `.toc' section entries.
-- Such entries are detected by examining relocations that reference
-- the TOC in code sections. A reloc in a deleted code section marks
-- a TOC word as unneeded, while a reloc in a kept code section marks
-- a TOC word as needed. Since the TOC may reference itself, TOC
-- relocs are also examined. TOC words marked as both needed and
-- unneeded will of course be kept. TOC words without any referencing
-- reloc are assumed to be part of a multi-word entry, and are kept or
-- discarded as per the nearest marked preceding word. This works
-- reliably for compiler generated code, but may be incorrect if
-- assembly code is used to insert TOC entries. Use this option to
-- disable the optimization.
--
--`--no-multi-toc'
-- If given any toc option besides `-mcmodel=medium' or
-- `-mcmodel=large', PowerPC64 GCC generates code for a TOC model
-- where TOC entries are accessed with a 16-bit offset from r2. This
-- limits the total TOC size to 64K. PowerPC64 `ld' extends this
-- limit by grouping code sections such that each group uses less
-- than 64K for its TOC entries, then inserts r2 adjusting stubs
-- between inter-group calls. `ld' does not split apart input
-- sections, so cannot help if a single input file has a `.toc'
-- section that exceeds 64K, most likely from linking multiple files
-- with `ld -r'. Use this option to turn off this feature.
--
--`--no-toc-sort'
-- By default, `ld' sorts TOC sections so that those whose file
-- happens to have a section called `.init' or `.fini' are placed
-- first, followed by TOC sections referenced by code generated with
-- PowerPC64 gcc's `-mcmodel=small', and lastly TOC sections
-- referenced only by code generated with PowerPC64 gcc's
-- `-mcmodel=medium' or `-mcmodel=large' options. Doing this results
-- in better TOC grouping for multi-TOC. Use this option to turn off
-- this feature.
--
--`--plt-align'
--`--no-plt-align'
-- Use these options to control whether individual PLT call stubs are
-- aligned to a 32-byte boundary, or to the specified power of two
-- boundary when using `--plt-align='. By default PLT call stubs are
-- packed tightly.
--
--`--plt-static-chain'
--`--no-plt-static-chain'
-- Use these options to control whether PLT call stubs load the static
-- chain pointer (r11). `ld' defaults to not loading the static
-- chain since there is never any need to do so on a PLT call.
--
--`--plt-thread-safe'
--`--no-thread-safe'
-- With power7's weakly ordered memory model, it is possible when
-- using lazy binding for ld.so to update a plt entry in one thread
-- and have another thread see the individual plt entry words update
-- in the wrong order, despite ld.so carefully writing in the correct
-- order and using memory write barriers. To avoid this we need some
-- sort of read barrier in the call stub, or use LD_BIND_NOW=1. By
-- default, `ld' looks for calls to commonly used functions that
-- create threads, and if seen, adds the necessary barriers. Use
-- these options to change the default behaviour.
--
--
--File: ld.info, Node: SPU ELF, Next: TI COFF, Prev: PowerPC64 ELF64, Up: Machine Dependent
--
--4.12 `ld' and SPU ELF Support
--=============================
--
--`--plugin'
-- This option marks an executable as a PIC plugin module.
--
--`--no-overlays'
-- Normally, `ld' recognizes calls to functions within overlay
-- regions, and redirects such calls to an overlay manager via a stub.
-- `ld' also provides a built-in overlay manager. This option turns
-- off all this special overlay handling.
--
--`--emit-stub-syms'
-- This option causes `ld' to label overlay stubs with a local symbol
-- that encodes the stub type and destination.
--
--`--extra-overlay-stubs'
-- This option causes `ld' to add overlay call stubs on all function
-- calls out of overlay regions. Normally stubs are not added on
-- calls to non-overlay regions.
--
--`--local-store=lo:hi'
-- `ld' usually checks that a final executable for SPU fits in the
-- address range 0 to 256k. This option may be used to change the
-- range. Disable the check entirely with `--local-store=0:0'.
--
--`--stack-analysis'
-- SPU local store space is limited. Over-allocation of stack space
-- unnecessarily limits space available for code and data, while
-- under-allocation results in runtime failures. If given this
-- option, `ld' will provide an estimate of maximum stack usage.
-- `ld' does this by examining symbols in code sections to determine
-- the extents of functions, and looking at function prologues for
-- stack adjusting instructions. A call-graph is created by looking
-- for relocations on branch instructions. The graph is then searched
-- for the maximum stack usage path. Note that this analysis does not
-- find calls made via function pointers, and does not handle
-- recursion and other cycles in the call graph. Stack usage may be
-- under-estimated if your code makes such calls. Also, stack usage
-- for dynamic allocation, e.g. alloca, will not be detected. If a
-- link map is requested, detailed information about each function's
-- stack usage and calls will be given.
--
--`--emit-stack-syms'
-- This option, if given along with `--stack-analysis' will result in
-- `ld' emitting stack sizing symbols for each function. These take
-- the form `__stack_<function_name>' for global functions, and
-- `__stack_<number>_<function_name>' for static functions.
-- `<number>' is the section id in hex. The value of such symbols is
-- the stack requirement for the corresponding function. The symbol
-- size will be zero, type `STT_NOTYPE', binding `STB_LOCAL', and
-- section `SHN_ABS'.
--
--
--File: ld.info, Node: TI COFF, Next: WIN32, Prev: SPU ELF, Up: Machine Dependent
--
--4.13 `ld''s Support for Various TI COFF Versions
--================================================
--
--The `--format' switch allows selection of one of the various TI COFF
--versions. The latest of this writing is 2; versions 0 and 1 are also
--supported. The TI COFF versions also vary in header byte-order format;
--`ld' will read any version or byte order, but the output header format
--depends on the default specified by the specific target.
--
--
--File: ld.info, Node: WIN32, Next: Xtensa, Prev: TI COFF, Up: Machine Dependent
--
--4.14 `ld' and WIN32 (cygwin/mingw)
--==================================
--
--This section describes some of the win32 specific `ld' issues. See
--*Note Command Line Options: Options. for detailed description of the
--command line options mentioned here.
--
--_import libraries_
-- The standard Windows linker creates and uses so-called import
-- libraries, which contains information for linking to dll's. They
-- are regular static archives and are handled as any other static
-- archive. The cygwin and mingw ports of `ld' have specific support
-- for creating such libraries provided with the `--out-implib'
-- command line option.
--
--_exporting DLL symbols_
-- The cygwin/mingw `ld' has several ways to export symbols for dll's.
--
-- _using auto-export functionality_
-- By default `ld' exports symbols with the auto-export
-- functionality, which is controlled by the following command
-- line options:
--
-- * -export-all-symbols [This is the default]
--
-- * -exclude-symbols
--
-- * -exclude-libs
--
-- * -exclude-modules-for-implib
--
-- * -version-script
--
-- When auto-export is in operation, `ld' will export all the
-- non-local (global and common) symbols it finds in a DLL, with
-- the exception of a few symbols known to belong to the
-- system's runtime and libraries. As it will often not be
-- desirable to export all of a DLL's symbols, which may include
-- private functions that are not part of any public interface,
-- the command-line options listed above may be used to filter
-- symbols out from the list for exporting. The `--output-def'
-- option can be used in order to see the final list of exported
-- symbols with all exclusions taken into effect.
--
-- If `--export-all-symbols' is not given explicitly on the
-- command line, then the default auto-export behavior will be
-- _disabled_ if either of the following are true:
--
-- * A DEF file is used.
--
-- * Any symbol in any object file was marked with the
-- __declspec(dllexport) attribute.
--
-- _using a DEF file_
-- Another way of exporting symbols is using a DEF file. A DEF
-- file is an ASCII file containing definitions of symbols which
-- should be exported when a dll is created. Usually it is
-- named `<dll name>.def' and is added as any other object file
-- to the linker's command line. The file's name must end in
-- `.def' or `.DEF'.
--
-- gcc -o <output> <objectfiles> <dll name>.def
--
-- Using a DEF file turns off the normal auto-export behavior,
-- unless the `--export-all-symbols' option is also used.
--
-- Here is an example of a DEF file for a shared library called
-- `xyz.dll':
--
-- LIBRARY "xyz.dll" BASE=0x20000000
--
-- EXPORTS
-- foo
-- bar
-- _bar = bar
-- another_foo = abc.dll.afoo
-- var1 DATA
-- doo = foo == foo2
-- eoo DATA == var1
--
-- This example defines a DLL with a non-default base address
-- and seven symbols in the export table. The third exported
-- symbol `_bar' is an alias for the second. The fourth symbol,
-- `another_foo' is resolved by "forwarding" to another module
-- and treating it as an alias for `afoo' exported from the DLL
-- `abc.dll'. The final symbol `var1' is declared to be a data
-- object. The `doo' symbol in export library is an alias of
-- `foo', which gets the string name in export table `foo2'. The
-- `eoo' symbol is an data export symbol, which gets in export
-- table the name `var1'.
--
-- The optional `LIBRARY <name>' command indicates the _internal_
-- name of the output DLL. If `<name>' does not include a suffix,
-- the default library suffix, `.DLL' is appended.
--
-- When the .DEF file is used to build an application, rather
-- than a library, the `NAME <name>' command should be used
-- instead of `LIBRARY'. If `<name>' does not include a suffix,
-- the default executable suffix, `.EXE' is appended.
--
-- With either `LIBRARY <name>' or `NAME <name>' the optional
-- specification `BASE = <number>' may be used to specify a
-- non-default base address for the image.
--
-- If neither `LIBRARY <name>' nor `NAME <name>' is specified,
-- or they specify an empty string, the internal name is the
-- same as the filename specified on the command line.
--
-- The complete specification of an export symbol is:
--
-- EXPORTS
-- ( ( ( <name1> [ = <name2> ] )
-- | ( <name1> = <module-name> . <external-name>))
-- [ @ <integer> ] [NONAME] [DATA] [CONSTANT] [PRIVATE] [== <name3>] ) *
--
-- Declares `<name1>' as an exported symbol from the DLL, or
-- declares `<name1>' as an exported alias for `<name2>'; or
-- declares `<name1>' as a "forward" alias for the symbol
-- `<external-name>' in the DLL `<module-name>'. Optionally,
-- the symbol may be exported by the specified ordinal
-- `<integer>' alias. The optional `<name3>' is the to be used
-- string in import/export table for the symbol.
--
-- The optional keywords that follow the declaration indicate:
--
-- `NONAME': Do not put the symbol name in the DLL's export
-- table. It will still be exported by its ordinal alias
-- (either the value specified by the .def specification or,
-- otherwise, the value assigned by the linker). The symbol
-- name, however, does remain visible in the import library (if
-- any), unless `PRIVATE' is also specified.
--
-- `DATA': The symbol is a variable or object, rather than a
-- function. The import lib will export only an indirect
-- reference to `foo' as the symbol `_imp__foo' (ie, `foo' must
-- be resolved as `*_imp__foo').
--
-- `CONSTANT': Like `DATA', but put the undecorated `foo' as
-- well as `_imp__foo' into the import library. Both refer to the
-- read-only import address table's pointer to the variable, not
-- to the variable itself. This can be dangerous. If the user
-- code fails to add the `dllimport' attribute and also fails to
-- explicitly add the extra indirection that the use of the
-- attribute enforces, the application will behave unexpectedly.
--
-- `PRIVATE': Put the symbol in the DLL's export table, but do
-- not put it into the static import library used to resolve
-- imports at link time. The symbol can still be imported using
-- the `LoadLibrary/GetProcAddress' API at runtime or by by
-- using the GNU ld extension of linking directly to the DLL
-- without an import library.
--
-- See ld/deffilep.y in the binutils sources for the full
-- specification of other DEF file statements
--
-- While linking a shared dll, `ld' is able to create a DEF file
-- with the `--output-def <file>' command line option.
--
-- _Using decorations_
-- Another way of marking symbols for export is to modify the
-- source code itself, so that when building the DLL each symbol
-- to be exported is declared as:
--
-- __declspec(dllexport) int a_variable
-- __declspec(dllexport) void a_function(int with_args)
--
-- All such symbols will be exported from the DLL. If, however,
-- any of the object files in the DLL contain symbols decorated
-- in this way, then the normal auto-export behavior is
-- disabled, unless the `--export-all-symbols' option is also
-- used.
--
-- Note that object files that wish to access these symbols must
-- _not_ decorate them with dllexport. Instead, they should use
-- dllimport, instead:
--
-- __declspec(dllimport) int a_variable
-- __declspec(dllimport) void a_function(int with_args)
--
-- This complicates the structure of library header files,
-- because when included by the library itself the header must
-- declare the variables and functions as dllexport, but when
-- included by client code the header must declare them as
-- dllimport. There are a number of idioms that are typically
-- used to do this; often client code can omit the __declspec()
-- declaration completely. See `--enable-auto-import' and
-- `automatic data imports' for more information.
--
--_automatic data imports_
-- The standard Windows dll format supports data imports from dlls
-- only by adding special decorations (dllimport/dllexport), which
-- let the compiler produce specific assembler instructions to deal
-- with this issue. This increases the effort necessary to port
-- existing Un*x code to these platforms, especially for large c++
-- libraries and applications. The auto-import feature, which was
-- initially provided by Paul Sokolovsky, allows one to omit the
-- decorations to achieve a behavior that conforms to that on
-- POSIX/Un*x platforms. This feature is enabled with the
-- `--enable-auto-import' command-line option, although it is enabled
-- by default on cygwin/mingw. The `--enable-auto-import' option
-- itself now serves mainly to suppress any warnings that are
-- ordinarily emitted when linked objects trigger the feature's use.
--
-- auto-import of variables does not always work flawlessly without
-- additional assistance. Sometimes, you will see this message
--
-- "variable '<var>' can't be auto-imported. Please read the
-- documentation for ld's `--enable-auto-import' for details."
--
-- The `--enable-auto-import' documentation explains why this error
-- occurs, and several methods that can be used to overcome this
-- difficulty. One of these methods is the _runtime pseudo-relocs_
-- feature, described below.
--
-- For complex variables imported from DLLs (such as structs or
-- classes), object files typically contain a base address for the
-- variable and an offset (_addend_) within the variable-to specify a
-- particular field or public member, for instance. Unfortunately,
-- the runtime loader used in win32 environments is incapable of
-- fixing these references at runtime without the additional
-- information supplied by dllimport/dllexport decorations. The
-- standard auto-import feature described above is unable to resolve
-- these references.
--
-- The `--enable-runtime-pseudo-relocs' switch allows these
-- references to be resolved without error, while leaving the task of
-- adjusting the references themselves (with their non-zero addends)
-- to specialized code provided by the runtime environment. Recent
-- versions of the cygwin and mingw environments and compilers
-- provide this runtime support; older versions do not. However, the
-- support is only necessary on the developer's platform; the
-- compiled result will run without error on an older system.
--
-- `--enable-runtime-pseudo-relocs' is not the default; it must be
-- explicitly enabled as needed.
--
--_direct linking to a dll_
-- The cygwin/mingw ports of `ld' support the direct linking,
-- including data symbols, to a dll without the usage of any import
-- libraries. This is much faster and uses much less memory than
-- does the traditional import library method, especially when
-- linking large libraries or applications. When `ld' creates an
-- import lib, each function or variable exported from the dll is
-- stored in its own bfd, even though a single bfd could contain many
-- exports. The overhead involved in storing, loading, and
-- processing so many bfd's is quite large, and explains the
-- tremendous time, memory, and storage needed to link against
-- particularly large or complex libraries when using import libs.
--
-- Linking directly to a dll uses no extra command-line switches
-- other than `-L' and `-l', because `ld' already searches for a
-- number of names to match each library. All that is needed from
-- the developer's perspective is an understanding of this search, in
-- order to force ld to select the dll instead of an import library.
--
-- For instance, when ld is called with the argument `-lxxx' it will
-- attempt to find, in the first directory of its search path,
--
-- libxxx.dll.a
-- xxx.dll.a
-- libxxx.a
-- xxx.lib
-- cygxxx.dll (*)
-- libxxx.dll
-- xxx.dll
--
-- before moving on to the next directory in the search path.
--
-- (*) Actually, this is not `cygxxx.dll' but in fact is
-- `<prefix>xxx.dll', where `<prefix>' is set by the `ld' option
-- `--dll-search-prefix=<prefix>'. In the case of cygwin, the
-- standard gcc spec file includes `--dll-search-prefix=cyg', so in
-- effect we actually search for `cygxxx.dll'.
--
-- Other win32-based unix environments, such as mingw or pw32, may
-- use other `<prefix>'es, although at present only cygwin makes use
-- of this feature. It was originally intended to help avoid name
-- conflicts among dll's built for the various win32/un*x
-- environments, so that (for example) two versions of a zlib dll
-- could coexist on the same machine.
--
-- The generic cygwin/mingw path layout uses a `bin' directory for
-- applications and dll's and a `lib' directory for the import
-- libraries (using cygwin nomenclature):
--
-- bin/
-- cygxxx.dll
-- lib/
-- libxxx.dll.a (in case of dll's)
-- libxxx.a (in case of static archive)
--
-- Linking directly to a dll without using the import library can be
-- done two ways:
--
-- 1. Use the dll directly by adding the `bin' path to the link line
-- gcc -Wl,-verbose -o a.exe -L../bin/ -lxxx
--
-- However, as the dll's often have version numbers appended to their
-- names (`cygncurses-5.dll') this will often fail, unless one
-- specifies `-L../bin -lncurses-5' to include the version. Import
-- libs are generally not versioned, and do not have this difficulty.
--
-- 2. Create a symbolic link from the dll to a file in the `lib'
-- directory according to the above mentioned search pattern. This
-- should be used to avoid unwanted changes in the tools needed for
-- making the app/dll.
--
-- ln -s bin/cygxxx.dll lib/[cyg|lib|]xxx.dll[.a]
--
-- Then you can link without any make environment changes.
--
-- gcc -Wl,-verbose -o a.exe -L../lib/ -lxxx
--
-- This technique also avoids the version number problems, because
-- the following is perfectly legal
--
-- bin/
-- cygxxx-5.dll
-- lib/
-- libxxx.dll.a -> ../bin/cygxxx-5.dll
--
-- Linking directly to a dll without using an import lib will work
-- even when auto-import features are exercised, and even when
-- `--enable-runtime-pseudo-relocs' is used.
--
-- Given the improvements in speed and memory usage, one might
-- justifiably wonder why import libraries are used at all. There
-- are three reasons:
--
-- 1. Until recently, the link-directly-to-dll functionality did _not_
-- work with auto-imported data.
--
-- 2. Sometimes it is necessary to include pure static objects within
-- the import library (which otherwise contains only bfd's for
-- indirection symbols that point to the exports of a dll). Again,
-- the import lib for the cygwin kernel makes use of this ability,
-- and it is not possible to do this without an import lib.
--
-- 3. Symbol aliases can only be resolved using an import lib. This
-- is critical when linking against OS-supplied dll's (eg, the win32
-- API) in which symbols are usually exported as undecorated aliases
-- of their stdcall-decorated assembly names.
--
-- So, import libs are not going away. But the ability to replace
-- true import libs with a simple symbolic link to (or a copy of) a
-- dll, in many cases, is a useful addition to the suite of tools
-- binutils makes available to the win32 developer. Given the
-- massive improvements in memory requirements during linking, storage
-- requirements, and linking speed, we expect that many developers
-- will soon begin to use this feature whenever possible.
--
--_symbol aliasing_
--
-- _adding additional names_
-- Sometimes, it is useful to export symbols with additional
-- names. A symbol `foo' will be exported as `foo', but it can
-- also be exported as `_foo' by using special directives in the
-- DEF file when creating the dll. This will affect also the
-- optional created import library. Consider the following DEF
-- file:
--
-- LIBRARY "xyz.dll" BASE=0x61000000
--
-- EXPORTS
-- foo
-- _foo = foo
--
-- The line `_foo = foo' maps the symbol `foo' to `_foo'.
--
-- Another method for creating a symbol alias is to create it in
-- the source code using the "weak" attribute:
--
-- void foo () { /* Do something. */; }
-- void _foo () __attribute__ ((weak, alias ("foo")));
--
-- See the gcc manual for more information about attributes and
-- weak symbols.
--
-- _renaming symbols_
-- Sometimes it is useful to rename exports. For instance, the
-- cygwin kernel does this regularly. A symbol `_foo' can be
-- exported as `foo' but not as `_foo' by using special
-- directives in the DEF file. (This will also affect the import
-- library, if it is created). In the following example:
--
-- LIBRARY "xyz.dll" BASE=0x61000000
--
-- EXPORTS
-- _foo = foo
--
-- The line `_foo = foo' maps the exported symbol `foo' to
-- `_foo'.
--
-- Note: using a DEF file disables the default auto-export behavior,
-- unless the `--export-all-symbols' command line option is used.
-- If, however, you are trying to rename symbols, then you should list
-- _all_ desired exports in the DEF file, including the symbols that
-- are not being renamed, and do _not_ use the `--export-all-symbols'
-- option. If you list only the renamed symbols in the DEF file, and
-- use `--export-all-symbols' to handle the other symbols, then the
-- both the new names _and_ the original names for the renamed
-- symbols will be exported. In effect, you'd be aliasing those
-- symbols, not renaming them, which is probably not what you wanted.
--
--_weak externals_
-- The Windows object format, PE, specifies a form of weak symbols
-- called weak externals. When a weak symbol is linked and the
-- symbol is not defined, the weak symbol becomes an alias for some
-- other symbol. There are three variants of weak externals:
-- * Definition is searched for in objects and libraries,
-- historically called lazy externals.
--
-- * Definition is searched for only in other objects, not in
-- libraries. This form is not presently implemented.
--
-- * No search; the symbol is an alias. This form is not presently
-- implemented.
-- As a GNU extension, weak symbols that do not specify an alternate
-- symbol are supported. If the symbol is undefined when linking,
-- the symbol uses a default value.
--
--_aligned common symbols_
-- As a GNU extension to the PE file format, it is possible to
-- specify the desired alignment for a common symbol. This
-- information is conveyed from the assembler or compiler to the
-- linker by means of GNU-specific commands carried in the object
-- file's `.drectve' section, which are recognized by `ld' and
-- respected when laying out the common symbols. Native tools will
-- be able to process object files employing this GNU extension, but
-- will fail to respect the alignment instructions, and may issue
-- noisy warnings about unknown linker directives.
--
--
--File: ld.info, Node: Xtensa, Prev: WIN32, Up: Machine Dependent
--
--4.15 `ld' and Xtensa Processors
--===============================
--
--The default `ld' behavior for Xtensa processors is to interpret
--`SECTIONS' commands so that lists of explicitly named sections in a
--specification with a wildcard file will be interleaved when necessary to
--keep literal pools within the range of PC-relative load offsets. For
--example, with the command:
--
-- SECTIONS
-- {
-- .text : {
-- *(.literal .text)
-- }
-- }
--
--`ld' may interleave some of the `.literal' and `.text' sections from
--different object files to ensure that the literal pools are within the
--range of PC-relative load offsets. A valid interleaving might place
--the `.literal' sections from an initial group of files followed by the
--`.text' sections of that group of files. Then, the `.literal' sections
--from the rest of the files and the `.text' sections from the rest of
--the files would follow.
--
-- Relaxation is enabled by default for the Xtensa version of `ld' and
--provides two important link-time optimizations. The first optimization
--is to combine identical literal values to reduce code size. A redundant
--literal will be removed and all the `L32R' instructions that use it
--will be changed to reference an identical literal, as long as the
--location of the replacement literal is within the offset range of all
--the `L32R' instructions. The second optimization is to remove
--unnecessary overhead from assembler-generated "longcall" sequences of
--`L32R'/`CALLXN' when the target functions are within range of direct
--`CALLN' instructions.
--
-- For each of these cases where an indirect call sequence can be
--optimized to a direct call, the linker will change the `CALLXN'
--instruction to a `CALLN' instruction, remove the `L32R' instruction,
--and remove the literal referenced by the `L32R' instruction if it is
--not used for anything else. Removing the `L32R' instruction always
--reduces code size but can potentially hurt performance by changing the
--alignment of subsequent branch targets. By default, the linker will
--always preserve alignments, either by switching some instructions
--between 24-bit encodings and the equivalent density instructions or by
--inserting a no-op in place of the `L32R' instruction that was removed.
--If code size is more important than performance, the `--size-opt'
--option can be used to prevent the linker from widening density
--instructions or inserting no-ops, except in a few cases where no-ops
--are required for correctness.
--
-- The following Xtensa-specific command-line options can be used to
--control the linker:
--
--`--size-opt'
-- When optimizing indirect calls to direct calls, optimize for code
-- size more than performance. With this option, the linker will not
-- insert no-ops or widen density instructions to preserve branch
-- target alignment. There may still be some cases where no-ops are
-- required to preserve the correctness of the code.
--
--
--File: ld.info, Node: BFD, Next: Reporting Bugs, Prev: Machine Dependent, Up: Top
--
--5 BFD
--*****
--
--The linker accesses object and archive files using the BFD libraries.
--These libraries allow the linker to use the same routines to operate on
--object files whatever the object file format. A different object file
--format can be supported simply by creating a new BFD back end and adding
--it to the library. To conserve runtime memory, however, the linker and
--associated tools are usually configured to support only a subset of the
--object file formats available. You can use `objdump -i' (*note
--objdump: (binutils.info)objdump.) to list all the formats available for
--your configuration.
--
-- As with most implementations, BFD is a compromise between several
--conflicting requirements. The major factor influencing BFD design was
--efficiency: any time used converting between formats is time which
--would not have been spent had BFD not been involved. This is partly
--offset by abstraction payback; since BFD simplifies applications and
--back ends, more time and care may be spent optimizing algorithms for a
--greater speed.
--
-- One minor artifact of the BFD solution which you should bear in mind
--is the potential for information loss. There are two places where
--useful information can be lost using the BFD mechanism: during
--conversion and during output. *Note BFD information loss::.
--
--* Menu:
--
--* BFD outline:: How it works: an outline of BFD
--
--
--File: ld.info, Node: BFD outline, Up: BFD
--
--5.1 How It Works: An Outline of BFD
--===================================
--
--When an object file is opened, BFD subroutines automatically determine
--the format of the input object file. They then build a descriptor in
--memory with pointers to routines that will be used to access elements of
--the object file's data structures.
--
-- As different information from the object files is required, BFD
--reads from different sections of the file and processes them. For
--example, a very common operation for the linker is processing symbol
--tables. Each BFD back end provides a routine for converting between
--the object file's representation of symbols and an internal canonical
--format. When the linker asks for the symbol table of an object file, it
--calls through a memory pointer to the routine from the relevant BFD
--back end which reads and converts the table into a canonical form. The
--linker then operates upon the canonical form. When the link is finished
--and the linker writes the output file's symbol table, another BFD back
--end routine is called to take the newly created symbol table and
--convert it into the chosen output format.
--
--* Menu:
--
--* BFD information loss:: Information Loss
--* Canonical format:: The BFD canonical object-file format
--
--
--File: ld.info, Node: BFD information loss, Next: Canonical format, Up: BFD outline
--
--5.1.1 Information Loss
------------------------
--
--_Information can be lost during output._ The output formats supported
--by BFD do not provide identical facilities, and information which can
--be described in one form has nowhere to go in another format. One
--example of this is alignment information in `b.out'. There is nowhere
--in an `a.out' format file to store alignment information on the
--contained data, so when a file is linked from `b.out' and an `a.out'
--image is produced, alignment information will not propagate to the
--output file. (The linker will still use the alignment information
--internally, so the link is performed correctly).
--
-- Another example is COFF section names. COFF files may contain an
--unlimited number of sections, each one with a textual section name. If
--the target of the link is a format which does not have many sections
--(e.g., `a.out') or has sections without names (e.g., the Oasys format),
--the link cannot be done simply. You can circumvent this problem by
--describing the desired input-to-output section mapping with the linker
--command language.
--
-- _Information can be lost during canonicalization._ The BFD internal
--canonical form of the external formats is not exhaustive; there are
--structures in input formats for which there is no direct representation
--internally. This means that the BFD back ends cannot maintain all
--possible data richness through the transformation between external to
--internal and back to external formats.
--
-- This limitation is only a problem when an application reads one
--format and writes another. Each BFD back end is responsible for
--maintaining as much data as possible, and the internal BFD canonical
--form has structures which are opaque to the BFD core, and exported only
--to the back ends. When a file is read in one format, the canonical form
--is generated for BFD and the application. At the same time, the back
--end saves away any information which may otherwise be lost. If the data
--is then written back in the same format, the back end routine will be
--able to use the canonical form provided by the BFD core as well as the
--information it prepared earlier. Since there is a great deal of
--commonality between back ends, there is no information lost when
--linking or copying big endian COFF to little endian COFF, or `a.out' to
--`b.out'. When a mixture of formats is linked, the information is only
--lost from the files whose format differs from the destination.
--
--
--File: ld.info, Node: Canonical format, Prev: BFD information loss, Up: BFD outline
--
--5.1.2 The BFD canonical object-file format
--------------------------------------------
--
--The greatest potential for loss of information occurs when there is the
--least overlap between the information provided by the source format,
--that stored by the canonical format, and that needed by the destination
--format. A brief description of the canonical form may help you
--understand which kinds of data you can count on preserving across
--conversions.
--
--_files_
-- Information stored on a per-file basis includes target machine
-- architecture, particular implementation format type, a demand
-- pageable bit, and a write protected bit. Information like Unix
-- magic numbers is not stored here--only the magic numbers' meaning,
-- so a `ZMAGIC' file would have both the demand pageable bit and the
-- write protected text bit set. The byte order of the target is
-- stored on a per-file basis, so that big- and little-endian object
-- files may be used with one another.
--
--_sections_
-- Each section in the input file contains the name of the section,
-- the section's original address in the object file, size and
-- alignment information, various flags, and pointers into other BFD
-- data structures.
--
--_symbols_
-- Each symbol contains a pointer to the information for the object
-- file which originally defined it, its name, its value, and various
-- flag bits. When a BFD back end reads in a symbol table, it
-- relocates all symbols to make them relative to the base of the
-- section where they were defined. Doing this ensures that each
-- symbol points to its containing section. Each symbol also has a
-- varying amount of hidden private data for the BFD back end. Since
-- the symbol points to the original file, the private data format
-- for that symbol is accessible. `ld' can operate on a collection
-- of symbols of wildly different formats without problems.
--
-- Normal global and simple local symbols are maintained on output,
-- so an output file (no matter its format) will retain symbols
-- pointing to functions and to global, static, and common variables.
-- Some symbol information is not worth retaining; in `a.out', type
-- information is stored in the symbol table as long symbol names.
-- This information would be useless to most COFF debuggers; the
-- linker has command line switches to allow users to throw it away.
--
-- There is one word of type information within the symbol, so if the
-- format supports symbol type information within symbols (for
-- example, COFF, IEEE, Oasys) and the type is simple enough to fit
-- within one word (nearly everything but aggregates), the
-- information will be preserved.
--
--_relocation level_
-- Each canonical BFD relocation record contains a pointer to the
-- symbol to relocate to, the offset of the data to relocate, the
-- section the data is in, and a pointer to a relocation type
-- descriptor. Relocation is performed by passing messages through
-- the relocation type descriptor and the symbol pointer. Therefore,
-- relocations can be performed on output data using a relocation
-- method that is only available in one of the input formats. For
-- instance, Oasys provides a byte relocation format. A relocation
-- record requesting this relocation type would point indirectly to a
-- routine to perform this, so the relocation may be performed on a
-- byte being written to a 68k COFF file, even though 68k COFF has no
-- such relocation type.
--
--_line numbers_
-- Object formats can contain, for debugging purposes, some form of
-- mapping between symbols, source line numbers, and addresses in the
-- output file. These addresses have to be relocated along with the
-- symbol information. Each symbol with an associated list of line
-- number records points to the first record of the list. The head
-- of a line number list consists of a pointer to the symbol, which
-- allows finding out the address of the function whose line number
-- is being described. The rest of the list is made up of pairs:
-- offsets into the section and line numbers. Any format which can
-- simply derive this information can pass it successfully between
-- formats (COFF, IEEE and Oasys).
--
--
--File: ld.info, Node: Reporting Bugs, Next: MRI, Prev: BFD, Up: Top
--
--6 Reporting Bugs
--****************
--
--Your bug reports play an essential role in making `ld' reliable.
--
-- Reporting a bug may help you by bringing a solution to your problem,
--or it may not. But in any case the principal function of a bug report
--is to help the entire community by making the next version of `ld' work
--better. Bug reports are your contribution to the maintenance of `ld'.
--
-- In order for a bug report to serve its purpose, you must include the
--information that enables us to fix the bug.
--
--* Menu:
--
--* Bug Criteria:: Have you found a bug?
--* Bug Reporting:: How to report bugs
--
--
--File: ld.info, Node: Bug Criteria, Next: Bug Reporting, Up: Reporting Bugs
--
--6.1 Have You Found a Bug?
--=========================
--
--If you are not sure whether you have found a bug, here are some
--guidelines:
--
-- * If the linker gets a fatal signal, for any input whatever, that is
-- a `ld' bug. Reliable linkers never crash.
--
-- * If `ld' produces an error message for valid input, that is a bug.
--
-- * If `ld' does not produce an error message for invalid input, that
-- may be a bug. In the general case, the linker can not verify that
-- object files are correct.
--
-- * If you are an experienced user of linkers, your suggestions for
-- improvement of `ld' are welcome in any case.
--
--
--File: ld.info, Node: Bug Reporting, Prev: Bug Criteria, Up: Reporting Bugs
--
--6.2 How to Report Bugs
--======================
--
--A number of companies and individuals offer support for GNU products.
--If you obtained `ld' from a support organization, we recommend you
--contact that organization first.
--
-- You can find contact information for many support companies and
--individuals in the file `etc/SERVICE' in the GNU Emacs distribution.
--
-- Otherwise, send bug reports for `ld' to
--`http://www.sourceware.org/bugzilla/'.
--
-- The fundamental principle of reporting bugs usefully is this:
--*report all the facts*. If you are not sure whether to state a fact or
--leave it out, state it!
--
-- Often people omit facts because they think they know what causes the
--problem and assume that some details do not matter. Thus, you might
--assume that the name of a symbol you use in an example does not matter.
--Well, probably it does not, but one cannot be sure. Perhaps the bug
--is a stray memory reference which happens to fetch from the location
--where that name is stored in memory; perhaps, if the name were
--different, the contents of that location would fool the linker into
--doing the right thing despite the bug. Play it safe and give a
--specific, complete example. That is the easiest thing for you to do,
--and the most helpful.
--
-- Keep in mind that the purpose of a bug report is to enable us to fix
--the bug if it is new to us. Therefore, always write your bug reports
--on the assumption that the bug has not been reported previously.
--
-- Sometimes people give a few sketchy facts and ask, "Does this ring a
--bell?" This cannot help us fix a bug, so it is basically useless. We
--respond by asking for enough details to enable us to investigate. You
--might as well expedite matters by sending them to begin with.
--
-- To enable us to fix the bug, you should include all these things:
--
-- * The version of `ld'. `ld' announces it if you start it with the
-- `--version' argument.
--
-- Without this, we will not know whether there is any point in
-- looking for the bug in the current version of `ld'.
--
-- * Any patches you may have applied to the `ld' source, including any
-- patches made to the `BFD' library.
--
-- * The type of machine you are using, and the operating system name
-- and version number.
--
-- * What compiler (and its version) was used to compile `ld'--e.g.
-- "`gcc-2.7'".
--
-- * The command arguments you gave the linker to link your example and
-- observe the bug. To guarantee you will not omit something
-- important, list them all. A copy of the Makefile (or the output
-- from make) is sufficient.
--
-- If we were to try to guess the arguments, we would probably guess
-- wrong and then we might not encounter the bug.
--
-- * A complete input file, or set of input files, that will reproduce
-- the bug. It is generally most helpful to send the actual object
-- files provided that they are reasonably small. Say no more than
-- 10K. For bigger files you can either make them available by FTP
-- or HTTP or else state that you are willing to send the object
-- file(s) to whomever requests them. (Note - your email will be
-- going to a mailing list, so we do not want to clog it up with
-- large attachments). But small attachments are best.
--
-- If the source files were assembled using `gas' or compiled using
-- `gcc', then it may be OK to send the source files rather than the
-- object files. In this case, be sure to say exactly what version of
-- `gas' or `gcc' was used to produce the object files. Also say how
-- `gas' or `gcc' were configured.
--
-- * A description of what behavior you observe that you believe is
-- incorrect. For example, "It gets a fatal signal."
--
-- Of course, if the bug is that `ld' gets a fatal signal, then we
-- will certainly notice it. But if the bug is incorrect output, we
-- might not notice unless it is glaringly wrong. You might as well
-- not give us a chance to make a mistake.
--
-- Even if the problem you experience is a fatal signal, you should
-- still say so explicitly. Suppose something strange is going on,
-- such as, your copy of `ld' is out of sync, or you have encountered
-- a bug in the C library on your system. (This has happened!) Your
-- copy might crash and ours would not. If you told us to expect a
-- crash, then when ours fails to crash, we would know that the bug
-- was not happening for us. If you had not told us to expect a
-- crash, then we would not be able to draw any conclusion from our
-- observations.
--
-- * If you wish to suggest changes to the `ld' source, send us context
-- diffs, as generated by `diff' with the `-u', `-c', or `-p' option.
-- Always send diffs from the old file to the new file. If you even
-- discuss something in the `ld' source, refer to it by context, not
-- by line number.
--
-- The line numbers in our development sources will not match those
-- in your sources. Your line numbers would convey no useful
-- information to us.
--
-- Here are some things that are not necessary:
--
-- * A description of the envelope of the bug.
--
-- Often people who encounter a bug spend a lot of time investigating
-- which changes to the input file will make the bug go away and which
-- changes will not affect it.
--
-- This is often time consuming and not very useful, because the way
-- we will find the bug is by running a single example under the
-- debugger with breakpoints, not by pure deduction from a series of
-- examples. We recommend that you save your time for something else.
--
-- Of course, if you can find a simpler example to report _instead_
-- of the original one, that is a convenience for us. Errors in the
-- output will be easier to spot, running under the debugger will take
-- less time, and so on.
--
-- However, simplification is not vital; if you do not want to do
-- this, report the bug anyway and send us the entire test case you
-- used.
--
-- * A patch for the bug.
--
-- A patch for the bug does help us if it is a good one. But do not
-- omit the necessary information, such as the test case, on the
-- assumption that a patch is all we need. We might see problems
-- with your patch and decide to fix the problem another way, or we
-- might not understand it at all.
--
-- Sometimes with a program as complicated as `ld' it is very hard to
-- construct an example that will make the program follow a certain
-- path through the code. If you do not send us the example, we will
-- not be able to construct one, so we will not be able to verify
-- that the bug is fixed.
--
-- And if we cannot understand what bug you are trying to fix, or why
-- your patch should be an improvement, we will not install it. A
-- test case will help us to understand.
--
-- * A guess about what the bug is or what it depends on.
--
-- Such guesses are usually wrong. Even we cannot guess right about
-- such things without first using the debugger to find the facts.
--
--
--File: ld.info, Node: MRI, Next: GNU Free Documentation License, Prev: Reporting Bugs, Up: Top
--
--Appendix A MRI Compatible Script Files
--**************************************
--
--To aid users making the transition to GNU `ld' from the MRI linker,
--`ld' can use MRI compatible linker scripts as an alternative to the
--more general-purpose linker scripting language described in *Note
--Scripts::. MRI compatible linker scripts have a much simpler command
--set than the scripting language otherwise used with `ld'. GNU `ld'
--supports the most commonly used MRI linker commands; these commands are
--described here.
--
-- In general, MRI scripts aren't of much use with the `a.out' object
--file format, since it only has three sections and MRI scripts lack some
--features to make use of them.
--
-- You can specify a file containing an MRI-compatible script using the
--`-c' command-line option.
--
-- Each command in an MRI-compatible script occupies its own line; each
--command line starts with the keyword that identifies the command (though
--blank lines are also allowed for punctuation). If a line of an
--MRI-compatible script begins with an unrecognized keyword, `ld' issues
--a warning message, but continues processing the script.
--
-- Lines beginning with `*' are comments.
--
-- You can write these commands using all upper-case letters, or all
--lower case; for example, `chip' is the same as `CHIP'. The following
--list shows only the upper-case form of each command.
--
--`ABSOLUTE SECNAME'
--`ABSOLUTE SECNAME, SECNAME, ... SECNAME'
-- Normally, `ld' includes in the output file all sections from all
-- the input files. However, in an MRI-compatible script, you can
-- use the `ABSOLUTE' command to restrict the sections that will be
-- present in your output program. If the `ABSOLUTE' command is used
-- at all in a script, then only the sections named explicitly in
-- `ABSOLUTE' commands will appear in the linker output. You can
-- still use other input sections (whatever you select on the command
-- line, or using `LOAD') to resolve addresses in the output file.
--
--`ALIAS OUT-SECNAME, IN-SECNAME'
-- Use this command to place the data from input section IN-SECNAME
-- in a section called OUT-SECNAME in the linker output file.
--
-- IN-SECNAME may be an integer.
--
--`ALIGN SECNAME = EXPRESSION'
-- Align the section called SECNAME to EXPRESSION. The EXPRESSION
-- should be a power of two.
--
--`BASE EXPRESSION'
-- Use the value of EXPRESSION as the lowest address (other than
-- absolute addresses) in the output file.
--
--`CHIP EXPRESSION'
--`CHIP EXPRESSION, EXPRESSION'
-- This command does nothing; it is accepted only for compatibility.
--
--`END'
-- This command does nothing whatever; it's only accepted for
-- compatibility.
--
--`FORMAT OUTPUT-FORMAT'
-- Similar to the `OUTPUT_FORMAT' command in the more general linker
-- language, but restricted to one of these output formats:
--
-- 1. S-records, if OUTPUT-FORMAT is `S'
--
-- 2. IEEE, if OUTPUT-FORMAT is `IEEE'
--
-- 3. COFF (the `coff-m68k' variant in BFD), if OUTPUT-FORMAT is
-- `COFF'
--
--`LIST ANYTHING...'
-- Print (to the standard output file) a link map, as produced by the
-- `ld' command-line option `-M'.
--
-- The keyword `LIST' may be followed by anything on the same line,
-- with no change in its effect.
--
--`LOAD FILENAME'
--`LOAD FILENAME, FILENAME, ... FILENAME'
-- Include one or more object file FILENAME in the link; this has the
-- same effect as specifying FILENAME directly on the `ld' command
-- line.
--
--`NAME OUTPUT-NAME'
-- OUTPUT-NAME is the name for the program produced by `ld'; the
-- MRI-compatible command `NAME' is equivalent to the command-line
-- option `-o' or the general script language command `OUTPUT'.
--
--`ORDER SECNAME, SECNAME, ... SECNAME'
--`ORDER SECNAME SECNAME SECNAME'
-- Normally, `ld' orders the sections in its output file in the order
-- in which they first appear in the input files. In an
-- MRI-compatible script, you can override this ordering with the
-- `ORDER' command. The sections you list with `ORDER' will appear
-- first in your output file, in the order specified.
--
--`PUBLIC NAME=EXPRESSION'
--`PUBLIC NAME,EXPRESSION'
--`PUBLIC NAME EXPRESSION'
-- Supply a value (EXPRESSION) for external symbol NAME used in the
-- linker input files.
--
--`SECT SECNAME, EXPRESSION'
--`SECT SECNAME=EXPRESSION'
--`SECT SECNAME EXPRESSION'
-- You can use any of these three forms of the `SECT' command to
-- specify the start address (EXPRESSION) for section SECNAME. If
-- you have more than one `SECT' statement for the same SECNAME, only
-- the _first_ sets the start address.
--
--
--File: ld.info, Node: GNU Free Documentation License, Next: LD Index, Prev: MRI, Up: Top
--
--Appendix B GNU Free Documentation License
--*****************************************
--
-- Version 1.3, 3 November 2008
--
-- Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
-- `http://fsf.org/'
--
-- Everyone is permitted to copy and distribute verbatim copies
-- of this license document, but changing it is not allowed.
--
-- 0. PREAMBLE
--
-- The purpose of this License is to make a manual, textbook, or other
-- functional and useful document "free" in the sense of freedom: to
-- assure everyone the effective freedom to copy and redistribute it,
-- with or without modifying it, either commercially or
-- noncommercially. Secondarily, this License preserves for the
-- author and publisher a way to get credit for their work, while not
-- being considered responsible for modifications made by others.
--
-- This License is a kind of "copyleft", which means that derivative
-- works of the document must themselves be free in the same sense.
-- It complements the GNU General Public License, which is a copyleft
-- license designed for free software.
--
-- We have designed this License in order to use it for manuals for
-- free software, because free software needs free documentation: a
-- free program should come with manuals providing the same freedoms
-- that the software does. But this License is not limited to
-- software manuals; it can be used for any textual work, regardless
-- of subject matter or whether it is published as a printed book.
-- We recommend this License principally for works whose purpose is
-- instruction or reference.
--
-- 1. APPLICABILITY AND DEFINITIONS
--
-- This License applies to any manual or other work, in any medium,
-- that contains a notice placed by the copyright holder saying it
-- can be distributed under the terms of this License. Such a notice
-- grants a world-wide, royalty-free license, unlimited in duration,
-- to use that work under the conditions stated herein. The
-- "Document", below, refers to any such manual or work. Any member
-- of the public is a licensee, and is addressed as "you". You
-- accept the license if you copy, modify or distribute the work in a
-- way requiring permission under copyright law.
--
-- A "Modified Version" of the Document means any work containing the
-- Document or a portion of it, either copied verbatim, or with
-- modifications and/or translated into another language.
--
-- A "Secondary Section" is a named appendix or a front-matter section
-- of the Document that deals exclusively with the relationship of the
-- publishers or authors of the Document to the Document's overall
-- subject (or to related matters) and contains nothing that could
-- fall directly within that overall subject. (Thus, if the Document
-- is in part a textbook of mathematics, a Secondary Section may not
-- explain any mathematics.) The relationship could be a matter of
-- historical connection with the subject or with related matters, or
-- of legal, commercial, philosophical, ethical or political position
-- regarding them.
--
-- The "Invariant Sections" are certain Secondary Sections whose
-- titles are designated, as being those of Invariant Sections, in
-- the notice that says that the Document is released under this
-- License. If a section does not fit the above definition of
-- Secondary then it is not allowed to be designated as Invariant.
-- The Document may contain zero Invariant Sections. If the Document
-- does not identify any Invariant Sections then there are none.
--
-- The "Cover Texts" are certain short passages of text that are
-- listed, as Front-Cover Texts or Back-Cover Texts, in the notice
-- that says that the Document is released under this License. A
-- Front-Cover Text may be at most 5 words, and a Back-Cover Text may
-- be at most 25 words.
--
-- A "Transparent" copy of the Document means a machine-readable copy,
-- represented in a format whose specification is available to the
-- general public, that is suitable for revising the document
-- straightforwardly with generic text editors or (for images
-- composed of pixels) generic paint programs or (for drawings) some
-- widely available drawing editor, and that is suitable for input to
-- text formatters or for automatic translation to a variety of
-- formats suitable for input to text formatters. A copy made in an
-- otherwise Transparent file format whose markup, or absence of
-- markup, has been arranged to thwart or discourage subsequent
-- modification by readers is not Transparent. An image format is
-- not Transparent if used for any substantial amount of text. A
-- copy that is not "Transparent" is called "Opaque".
--
-- Examples of suitable formats for Transparent copies include plain
-- ASCII without markup, Texinfo input format, LaTeX input format,
-- SGML or XML using a publicly available DTD, and
-- standard-conforming simple HTML, PostScript or PDF designed for
-- human modification. Examples of transparent image formats include
-- PNG, XCF and JPG. Opaque formats include proprietary formats that
-- can be read and edited only by proprietary word processors, SGML or
-- XML for which the DTD and/or processing tools are not generally
-- available, and the machine-generated HTML, PostScript or PDF
-- produced by some word processors for output purposes only.
--
-- The "Title Page" means, for a printed book, the title page itself,
-- plus such following pages as are needed to hold, legibly, the
-- material this License requires to appear in the title page. For
-- works in formats which do not have any title page as such, "Title
-- Page" means the text near the most prominent appearance of the
-- work's title, preceding the beginning of the body of the text.
--
-- The "publisher" means any person or entity that distributes copies
-- of the Document to the public.
--
-- A section "Entitled XYZ" means a named subunit of the Document
-- whose title either is precisely XYZ or contains XYZ in parentheses
-- following text that translates XYZ in another language. (Here XYZ
-- stands for a specific section name mentioned below, such as
-- "Acknowledgements", "Dedications", "Endorsements", or "History".)
-- To "Preserve the Title" of such a section when you modify the
-- Document means that it remains a section "Entitled XYZ" according
-- to this definition.
--
-- The Document may include Warranty Disclaimers next to the notice
-- which states that this License applies to the Document. These
-- Warranty Disclaimers are considered to be included by reference in
-- this License, but only as regards disclaiming warranties: any other
-- implication that these Warranty Disclaimers may have is void and
-- has no effect on the meaning of this License.
--
-- 2. VERBATIM COPYING
--
-- You may copy and distribute the Document in any medium, either
-- commercially or noncommercially, provided that this License, the
-- copyright notices, and the license notice saying this License
-- applies to the Document are reproduced in all copies, and that you
-- add no other conditions whatsoever to those of this License. You
-- may not use technical measures to obstruct or control the reading
-- or further copying of the copies you make or distribute. However,
-- you may accept compensation in exchange for copies. If you
-- distribute a large enough number of copies you must also follow
-- the conditions in section 3.
--
-- You may also lend copies, under the same conditions stated above,
-- and you may publicly display copies.
--
-- 3. COPYING IN QUANTITY
--
-- If you publish printed copies (or copies in media that commonly
-- have printed covers) of the Document, numbering more than 100, and
-- the Document's license notice requires Cover Texts, you must
-- enclose the copies in covers that carry, clearly and legibly, all
-- these Cover Texts: Front-Cover Texts on the front cover, and
-- Back-Cover Texts on the back cover. Both covers must also clearly
-- and legibly identify you as the publisher of these copies. The
-- front cover must present the full title with all words of the
-- title equally prominent and visible. You may add other material
-- on the covers in addition. Copying with changes limited to the
-- covers, as long as they preserve the title of the Document and
-- satisfy these conditions, can be treated as verbatim copying in
-- other respects.
--
-- If the required texts for either cover are too voluminous to fit
-- legibly, you should put the first ones listed (as many as fit
-- reasonably) on the actual cover, and continue the rest onto
-- adjacent pages.
--
-- If you publish or distribute Opaque copies of the Document
-- numbering more than 100, you must either include a
-- machine-readable Transparent copy along with each Opaque copy, or
-- state in or with each Opaque copy a computer-network location from
-- which the general network-using public has access to download
-- using public-standard network protocols a complete Transparent
-- copy of the Document, free of added material. If you use the
-- latter option, you must take reasonably prudent steps, when you
-- begin distribution of Opaque copies in quantity, to ensure that
-- this Transparent copy will remain thus accessible at the stated
-- location until at least one year after the last time you
-- distribute an Opaque copy (directly or through your agents or
-- retailers) of that edition to the public.
--
-- It is requested, but not required, that you contact the authors of
-- the Document well before redistributing any large number of
-- copies, to give them a chance to provide you with an updated
-- version of the Document.
--
-- 4. MODIFICATIONS
--
-- You may copy and distribute a Modified Version of the Document
-- under the conditions of sections 2 and 3 above, provided that you
-- release the Modified Version under precisely this License, with
-- the Modified Version filling the role of the Document, thus
-- licensing distribution and modification of the Modified Version to
-- whoever possesses a copy of it. In addition, you must do these
-- things in the Modified Version:
--
-- A. Use in the Title Page (and on the covers, if any) a title
-- distinct from that of the Document, and from those of
-- previous versions (which should, if there were any, be listed
-- in the History section of the Document). You may use the
-- same title as a previous version if the original publisher of
-- that version gives permission.
--
-- B. List on the Title Page, as authors, one or more persons or
-- entities responsible for authorship of the modifications in
-- the Modified Version, together with at least five of the
-- principal authors of the Document (all of its principal
-- authors, if it has fewer than five), unless they release you
-- from this requirement.
--
-- C. State on the Title page the name of the publisher of the
-- Modified Version, as the publisher.
--
-- D. Preserve all the copyright notices of the Document.
--
-- E. Add an appropriate copyright notice for your modifications
-- adjacent to the other copyright notices.
--
-- F. Include, immediately after the copyright notices, a license
-- notice giving the public permission to use the Modified
-- Version under the terms of this License, in the form shown in
-- the Addendum below.
--
-- G. Preserve in that license notice the full lists of Invariant
-- Sections and required Cover Texts given in the Document's
-- license notice.
--
-- H. Include an unaltered copy of this License.
--
-- I. Preserve the section Entitled "History", Preserve its Title,
-- and add to it an item stating at least the title, year, new
-- authors, and publisher of the Modified Version as given on
-- the Title Page. If there is no section Entitled "History" in
-- the Document, create one stating the title, year, authors,
-- and publisher of the Document as given on its Title Page,
-- then add an item describing the Modified Version as stated in
-- the previous sentence.
--
-- J. Preserve the network location, if any, given in the Document
-- for public access to a Transparent copy of the Document, and
-- likewise the network locations given in the Document for
-- previous versions it was based on. These may be placed in
-- the "History" section. You may omit a network location for a
-- work that was published at least four years before the
-- Document itself, or if the original publisher of the version
-- it refers to gives permission.
--
-- K. For any section Entitled "Acknowledgements" or "Dedications",
-- Preserve the Title of the section, and preserve in the
-- section all the substance and tone of each of the contributor
-- acknowledgements and/or dedications given therein.
--
-- L. Preserve all the Invariant Sections of the Document,
-- unaltered in their text and in their titles. Section numbers
-- or the equivalent are not considered part of the section
-- titles.
--
-- M. Delete any section Entitled "Endorsements". Such a section
-- may not be included in the Modified Version.
--
-- N. Do not retitle any existing section to be Entitled
-- "Endorsements" or to conflict in title with any Invariant
-- Section.
--
-- O. Preserve any Warranty Disclaimers.
--
-- If the Modified Version includes new front-matter sections or
-- appendices that qualify as Secondary Sections and contain no
-- material copied from the Document, you may at your option
-- designate some or all of these sections as invariant. To do this,
-- add their titles to the list of Invariant Sections in the Modified
-- Version's license notice. These titles must be distinct from any
-- other section titles.
--
-- You may add a section Entitled "Endorsements", provided it contains
-- nothing but endorsements of your Modified Version by various
-- parties--for example, statements of peer review or that the text
-- has been approved by an organization as the authoritative
-- definition of a standard.
--
-- You may add a passage of up to five words as a Front-Cover Text,
-- and a passage of up to 25 words as a Back-Cover Text, to the end
-- of the list of Cover Texts in the Modified Version. Only one
-- passage of Front-Cover Text and one of Back-Cover Text may be
-- added by (or through arrangements made by) any one entity. If the
-- Document already includes a cover text for the same cover,
-- previously added by you or by arrangement made by the same entity
-- you are acting on behalf of, you may not add another; but you may
-- replace the old one, on explicit permission from the previous
-- publisher that added the old one.
--
-- The author(s) and publisher(s) of the Document do not by this
-- License give permission to use their names for publicity for or to
-- assert or imply endorsement of any Modified Version.
--
-- 5. COMBINING DOCUMENTS
--
-- You may combine the Document with other documents released under
-- this License, under the terms defined in section 4 above for
-- modified versions, provided that you include in the combination
-- all of the Invariant Sections of all of the original documents,
-- unmodified, and list them all as Invariant Sections of your
-- combined work in its license notice, and that you preserve all
-- their Warranty Disclaimers.
--
-- The combined work need only contain one copy of this License, and
-- multiple identical Invariant Sections may be replaced with a single
-- copy. If there are multiple Invariant Sections with the same name
-- but different contents, make the title of each such section unique
-- by adding at the end of it, in parentheses, the name of the
-- original author or publisher of that section if known, or else a
-- unique number. Make the same adjustment to the section titles in
-- the list of Invariant Sections in the license notice of the
-- combined work.
--
-- In the combination, you must combine any sections Entitled
-- "History" in the various original documents, forming one section
-- Entitled "History"; likewise combine any sections Entitled
-- "Acknowledgements", and any sections Entitled "Dedications". You
-- must delete all sections Entitled "Endorsements."
--
-- 6. COLLECTIONS OF DOCUMENTS
--
-- You may make a collection consisting of the Document and other
-- documents released under this License, and replace the individual
-- copies of this License in the various documents with a single copy
-- that is included in the collection, provided that you follow the
-- rules of this License for verbatim copying of each of the
-- documents in all other respects.
--
-- You may extract a single document from such a collection, and
-- distribute it individually under this License, provided you insert
-- a copy of this License into the extracted document, and follow
-- this License in all other respects regarding verbatim copying of
-- that document.
--
-- 7. AGGREGATION WITH INDEPENDENT WORKS
--
-- A compilation of the Document or its derivatives with other
-- separate and independent documents or works, in or on a volume of
-- a storage or distribution medium, is called an "aggregate" if the
-- copyright resulting from the compilation is not used to limit the
-- legal rights of the compilation's users beyond what the individual
-- works permit. When the Document is included in an aggregate, this
-- License does not apply to the other works in the aggregate which
-- are not themselves derivative works of the Document.
--
-- If the Cover Text requirement of section 3 is applicable to these
-- copies of the Document, then if the Document is less than one half
-- of the entire aggregate, the Document's Cover Texts may be placed
-- on covers that bracket the Document within the aggregate, or the
-- electronic equivalent of covers if the Document is in electronic
-- form. Otherwise they must appear on printed covers that bracket
-- the whole aggregate.
--
-- 8. TRANSLATION
--
-- Translation is considered a kind of modification, so you may
-- distribute translations of the Document under the terms of section
-- 4. Replacing Invariant Sections with translations requires special
-- permission from their copyright holders, but you may include
-- translations of some or all Invariant Sections in addition to the
-- original versions of these Invariant Sections. You may include a
-- translation of this License, and all the license notices in the
-- Document, and any Warranty Disclaimers, provided that you also
-- include the original English version of this License and the
-- original versions of those notices and disclaimers. In case of a
-- disagreement between the translation and the original version of
-- this License or a notice or disclaimer, the original version will
-- prevail.
--
-- If a section in the Document is Entitled "Acknowledgements",
-- "Dedications", or "History", the requirement (section 4) to
-- Preserve its Title (section 1) will typically require changing the
-- actual title.
--
-- 9. TERMINATION
--
-- You may not copy, modify, sublicense, or distribute the Document
-- except as expressly provided under this License. Any attempt
-- otherwise to copy, modify, sublicense, or distribute it is void,
-- and will automatically terminate your rights under this License.
--
-- However, if you cease all violation of this License, then your
-- license from a particular copyright holder is reinstated (a)
-- provisionally, unless and until the copyright holder explicitly
-- and finally terminates your license, and (b) permanently, if the
-- copyright holder fails to notify you of the violation by some
-- reasonable means prior to 60 days after the cessation.
--
-- Moreover, your license from a particular copyright holder is
-- reinstated permanently if the copyright holder notifies you of the
-- violation by some reasonable means, this is the first time you have
-- received notice of violation of this License (for any work) from
-- that copyright holder, and you cure the violation prior to 30 days
-- after your receipt of the notice.
--
-- Termination of your rights under this section does not terminate
-- the licenses of parties who have received copies or rights from
-- you under this License. If your rights have been terminated and
-- not permanently reinstated, receipt of a copy of some or all of
-- the same material does not give you any rights to use it.
--
-- 10. FUTURE REVISIONS OF THIS LICENSE
--
-- The Free Software Foundation may publish new, revised versions of
-- the GNU Free Documentation License from time to time. Such new
-- versions will be similar in spirit to the present version, but may
-- differ in detail to address new problems or concerns. See
-- `http://www.gnu.org/copyleft/'.
--
-- Each version of the License is given a distinguishing version
-- number. If the Document specifies that a particular numbered
-- version of this License "or any later version" applies to it, you
-- have the option of following the terms and conditions either of
-- that specified version or of any later version that has been
-- published (not as a draft) by the Free Software Foundation. If
-- the Document does not specify a version number of this License,
-- you may choose any version ever published (not as a draft) by the
-- Free Software Foundation. If the Document specifies that a proxy
-- can decide which future versions of this License can be used, that
-- proxy's public statement of acceptance of a version permanently
-- authorizes you to choose that version for the Document.
--
-- 11. RELICENSING
--
-- "Massive Multiauthor Collaboration Site" (or "MMC Site") means any
-- World Wide Web server that publishes copyrightable works and also
-- provides prominent facilities for anybody to edit those works. A
-- public wiki that anybody can edit is an example of such a server.
-- A "Massive Multiauthor Collaboration" (or "MMC") contained in the
-- site means any set of copyrightable works thus published on the MMC
-- site.
--
-- "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0
-- license published by Creative Commons Corporation, a not-for-profit
-- corporation with a principal place of business in San Francisco,
-- California, as well as future copyleft versions of that license
-- published by that same organization.
--
-- "Incorporate" means to publish or republish a Document, in whole or
-- in part, as part of another Document.
--
-- An MMC is "eligible for relicensing" if it is licensed under this
-- License, and if all works that were first published under this
-- License somewhere other than this MMC, and subsequently
-- incorporated in whole or in part into the MMC, (1) had no cover
-- texts or invariant sections, and (2) were thus incorporated prior
-- to November 1, 2008.
--
-- The operator of an MMC Site may republish an MMC contained in the
-- site under CC-BY-SA on the same site at any time before August 1,
-- 2009, provided the MMC is eligible for relicensing.
--
--
--ADDENDUM: How to use this License for your documents
--====================================================
--
--To use this License in a document you have written, include a copy of
--the License in the document and put the following copyright and license
--notices just after the title page:
--
-- Copyright (C) YEAR YOUR NAME.
-- Permission is granted to copy, distribute and/or modify this document
-- under the terms of the GNU Free Documentation License, Version 1.3
-- or any later version published by the Free Software Foundation;
-- with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
-- Texts. A copy of the license is included in the section entitled ``GNU
-- Free Documentation License''.
--
-- If you have Invariant Sections, Front-Cover Texts and Back-Cover
--Texts, replace the "with...Texts." line with this:
--
-- with the Invariant Sections being LIST THEIR TITLES, with
-- the Front-Cover Texts being LIST, and with the Back-Cover Texts
-- being LIST.
--
-- If you have Invariant Sections without Cover Texts, or some other
--combination of the three, merge those two alternatives to suit the
--situation.
--
-- If your document contains nontrivial examples of program code, we
--recommend releasing these examples in parallel under your choice of
--free software license, such as the GNU General Public License, to
--permit their use in free software.
--
--
--File: ld.info, Node: LD Index, Prev: GNU Free Documentation License, Up: Top
--
--LD Index
--********
--
--
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--
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--* --leading-underscore: Options. (line 1663)
--* --library-path=DIR: Options. (line 367)
--* --library=NAMESPEC: Options. (line 334)
--* --local-store=lo:hi: SPU ELF. (line 24)
--* --major-image-version: Options. (line 1746)
--* --major-os-version: Options. (line 1751)
--* --major-subsystem-version: Options. (line 1755)
--* --merge-exidx-entries: i960. (line 48)
--* --minor-image-version: Options. (line 1760)
--* --minor-os-version: Options. (line 1765)
--* --minor-subsystem-version: Options. (line 1769)
--* --mri-script=MRI-CMDFILE: Options. (line 158)
--* --multi-subspace: HPPA ELF32. (line 6)
--* --nmagic: Options. (line 438)
--* --no-accept-unknown-input-arch: Options. (line 723)
--* --no-add-needed: Options. (line 750)
--* --no-allow-shlib-undefined: Options. (line 1008)
--* --no-as-needed: Options. (line 733)
--* --no-bind: Options. (line 2002)
--* --no-check-sections: Options. (line 829)
--* --no-copy-dt-needed-entries: Options. (line 841)
--* --no-define-common: Options. (line 874)
--* --no-demangle: Options. (line 903)
--* --no-dotsyms: PowerPC64 ELF64. (line 33)
--* --no-enum-size-warning: ARM. (line 120)
--* --no-export-dynamic: Options. (line 221)
--* --no-fatal-warnings: Options. (line 923)
--* --no-fix-arm1176: ARM. (line 111)
--* --no-fix-cortex-a8: i960. (line 39)
--* --no-gc-sections: Options. (line 938)
--* --no-insn32 <1>: MIPS. (line 6)
--* --no-insn32: Options. (line 2078)
--* --no-isolation: Options. (line 1995)
--* --no-keep-memory: Options. (line 987)
--* --no-leading-underscore: Options. (line 1663)
--* --no-merge-exidx-entries <1>: Options. (line 2036)
--* --no-merge-exidx-entries: i960. (line 48)
--* --no-multi-toc: PowerPC64 ELF64. (line 74)
--* --no-omagic: Options. (line 453)
--* --no-opd-optimize: PowerPC64 ELF64. (line 48)
--* --no-overlays: SPU ELF. (line 9)
--* --no-plt-align: PowerPC64 ELF64. (line 96)
--* --no-plt-static-chain: PowerPC64 ELF64. (line 103)
--* --no-plt-thread-safe: PowerPC64 ELF64. (line 109)
--* --no-print-gc-sections: Options. (line 960)
--* --no-seh: Options. (line 1998)
--* --no-tls-optimize <1>: PowerPC ELF32. (line 51)
--* --no-tls-optimize: PowerPC64 ELF64. (line 43)
--* --no-toc-optimize: PowerPC64 ELF64. (line 60)
--* --no-toc-sort: PowerPC64 ELF64. (line 86)
--* --no-trampoline: Options. (line 2046)
--* --no-undefined: Options. (line 994)
--* --no-undefined-version: Options. (line 1036)
--* --no-warn-mismatch: Options. (line 1049)
--* --no-warn-search-mismatch: Options. (line 1058)
--* --no-wchar-size-warning: ARM. (line 127)
--* --no-whole-archive: Options. (line 1062)
--* --noinhibit-exec: Options. (line 1066)
--* --non-overlapping-opd: PowerPC64 ELF64. (line 54)
--* --nxcompat: Options. (line 1991)
--* --oformat=OUTPUT-FORMAT: Options. (line 1078)
--* --omagic: Options. (line 444)
--* --out-implib: Options. (line 1782)
--* --output-def: Options. (line 1774)
--* --output=OUTPUT: Options. (line 459)
--* --pic-executable: Options. (line 1091)
--* --pic-veneer: ARM. (line 133)
--* --plt-align: PowerPC64 ELF64. (line 96)
--* --plt-static-chain: PowerPC64 ELF64. (line 103)
--* --plt-thread-safe: PowerPC64 ELF64. (line 109)
--* --plugin: SPU ELF. (line 6)
--* --print-gc-sections: Options. (line 960)
--* --print-map: Options. (line 401)
--* --print-output-format: Options. (line 969)
--* --reduce-memory-overheads: Options. (line 1556)
--* --relax: Options. (line 1107)
--* --relax on i960: i960. (line 31)
--* --relax on PowerPC: PowerPC ELF32. (line 6)
--* --relax on Xtensa: Xtensa. (line 27)
--* --relocatable: Options. (line 488)
--* --retain-symbols-file=FILENAME: Options. (line 1133)
--* --script=SCRIPT: Options. (line 531)
--* --sdata-got: PowerPC ELF32. (line 33)
--* --section-alignment: Options. (line 1957)
--* --section-start=SECTIONNAME=ORG: Options. (line 1289)
--* --secure-plt: PowerPC ELF32. (line 26)
--* --sort-common: Options. (line 1231)
--* --sort-section=alignment: Options. (line 1246)
--* --sort-section=name: Options. (line 1242)
--* --split-by-file: Options. (line 1250)
--* --split-by-reloc: Options. (line 1255)
--* --stack: Options. (line 1963)
--* --stack-analysis: SPU ELF. (line 29)
--* --stats: Options. (line 1268)
--* --strip-all: Options. (line 518)
--* --strip-debug: Options. (line 522)
--* --stub-group-size: PowerPC64 ELF64. (line 6)
--* --stub-group-size=N <1>: HPPA ELF32. (line 12)
--* --stub-group-size=N: ARM. (line 138)
--* --subsystem: Options. (line 1970)
--* --support-old-code: ARM. (line 6)
--* --sysroot=DIRECTORY: Options. (line 1272)
--* --target-help: Options. (line 979)
--* --target1-abs: ARM. (line 32)
--* --target1-rel: ARM. (line 32)
--* --target2=TYPE: ARM. (line 37)
--* --thumb-entry=ENTRY: ARM. (line 17)
--* --trace: Options. (line 527)
--* --trace-symbol=SYMBOL: Options. (line 596)
--* --traditional-format: Options. (line 1277)
--* --tsaware: Options. (line 2008)
--* --undefined=SYMBOL: Options. (line 553)
--* --unique[=SECTION]: Options. (line 571)
--* --unresolved-symbols: Options. (line 1319)
--* --use-blx: ARM. (line 74)
--* --use-nul-prefixed-import-tables: ARM. (line 23)
--* --verbose[=NUMBER]: Options. (line 1348)
--* --version: Options. (line 580)
--* --version-script=VERSION-SCRIPTFILE: Options. (line 1356)
--* --vfp11-denorm-fix: ARM. (line 83)
--* --warn-alternate-em: Options. (line 1468)
--* --warn-common: Options. (line 1367)
--* --warn-constructors: Options. (line 1435)
--* --warn-multiple-gp: Options. (line 1440)
--* --warn-once: Options. (line 1454)
--* --warn-section-align: Options. (line 1458)
--* --warn-shared-textrel: Options. (line 1465)
--* --warn-unresolved-symbols: Options. (line 1471)
--* --wdmdriver: Options. (line 2005)
--* --whole-archive: Options. (line 1480)
--* --wrap=SYMBOL: Options. (line 1494)
--* -A ARCH: Options. (line 122)
--* -a KEYWORD: Options. (line 105)
--* -assert KEYWORD: Options. (line 757)
--* -b FORMAT: Options. (line 134)
--* -Bdynamic: Options. (line 760)
--* -Bgroup: Options. (line 770)
--* -Bshareable: Options. (line 1224)
--* -Bstatic: Options. (line 777)
--* -Bsymbolic: Options. (line 792)
--* -Bsymbolic-functions: Options. (line 799)
--* -c MRI-CMDFILE: Options. (line 158)
--* -call_shared: Options. (line 760)
--* -d: Options. (line 168)
--* -dc: Options. (line 168)
--* -dn: Options. (line 777)
--* -dp: Options. (line 168)
--* -dT SCRIPT: Options. (line 540)
--* -dy: Options. (line 760)
--* -E: Options. (line 221)
--* -e ENTRY: Options. (line 187)
--* -EB: Options. (line 248)
--* -EL: Options. (line 251)
--* -F NAME: Options. (line 276)
--* -f NAME: Options. (line 255)
--* -fini=NAME: Options. (line 300)
--* -g: Options. (line 306)
--* -G VALUE: Options. (line 309)
--* -h NAME: Options. (line 316)
--* -i: Options. (line 325)
--* -IFILE: Options. (line 916)
--* -init=NAME: Options. (line 328)
--* -L DIR: Options. (line 367)
--* -l NAMESPEC: Options. (line 334)
--* -M: Options. (line 401)
--* -m EMULATION: Options. (line 391)
--* -Map=MAPFILE: Options. (line 983)
--* -N: Options. (line 444)
--* -n: Options. (line 438)
--* -no-relax: Options. (line 1107)
--* -non_shared: Options. (line 777)
--* -nostdlib: Options. (line 1072)
--* -O LEVEL: Options. (line 465)
--* -o OUTPUT: Options. (line 459)
--* -P AUDITLIB: Options. (line 177)
--* -pie: Options. (line 1091)
--* -q: Options. (line 475)
--* -qmagic: Options. (line 1101)
--* -Qy: Options. (line 1104)
--* -r: Options. (line 488)
--* -R FILE: Options. (line 507)
--* -rpath-link=DIR: Options. (line 1169)
--* -rpath=DIR: Options. (line 1147)
--* -S: Options. (line 522)
--* -s: Options. (line 518)
--* -shared: Options. (line 1224)
--* -soname=NAME: Options. (line 316)
--* -static: Options. (line 777)
--* -t: Options. (line 527)
--* -T SCRIPT: Options. (line 531)
--* -Tbss=ORG: Options. (line 1298)
--* -Tdata=ORG: Options. (line 1298)
--* -Tldata-segment=ORG: Options. (line 1314)
--* -Trodata-segment=ORG: Options. (line 1308)
--* -Ttext-segment=ORG: Options. (line 1304)
--* -Ttext=ORG: Options. (line 1298)
--* -u SYMBOL: Options. (line 553)
--* -Ur: Options. (line 561)
--* -V: Options. (line 580)
--* -v: Options. (line 580)
--* -x: Options. (line 586)
--* -X: Options. (line 590)
--* -Y PATH: Options. (line 605)
--* -y SYMBOL: Options. (line 596)
--* -z defs: Options. (line 994)
--* -z KEYWORD: Options. (line 609)
--* -z muldefs: Options. (line 1002)
--* .: Location Counter. (line 6)
--* /DISCARD/: Output Section Discarding.
-- (line 21)
--* :PHDR: Output Section Phdr.
-- (line 6)
--* =FILLEXP: Output Section Fill.
-- (line 6)
--* >REGION: Output Section Region.
-- (line 6)
--* [COMMON]: Input Section Common.
-- (line 29)
--* ABSOLUTE (MRI): MRI. (line 33)
--* absolute and relocatable symbols: Expression Section. (line 6)
--* absolute expressions: Expression Section. (line 6)
--* ABSOLUTE(EXP): Builtin Functions. (line 10)
--* ADDR(SECTION): Builtin Functions. (line 17)
--* address, section: Output Section Address.
-- (line 6)
--* ALIAS (MRI): MRI. (line 44)
--* ALIGN (MRI): MRI. (line 50)
--* align expression: Builtin Functions. (line 38)
--* align location counter: Builtin Functions. (line 38)
--* ALIGN(ALIGN): Builtin Functions. (line 38)
--* ALIGN(EXP,ALIGN): Builtin Functions. (line 38)
--* ALIGN(SECTION_ALIGN): Forced Output Alignment.
-- (line 6)
--* aligned common symbols: WIN32. (line 424)
--* ALIGNOF(SECTION): Builtin Functions. (line 64)
--* allocating memory: MEMORY. (line 6)
--* architecture: Miscellaneous Commands.
-- (line 72)
--* architectures: Options. (line 122)
--* archive files, from cmd line: Options. (line 334)
--* archive search path in linker script: File Commands. (line 74)
--* arithmetic: Expressions. (line 6)
--* arithmetic operators: Operators. (line 6)
--* ARM interworking support: ARM. (line 6)
--* ARM1176 erratum workaround: ARM. (line 111)
--* AS_NEEDED(FILES): File Commands. (line 54)
--* ASSERT: Miscellaneous Commands.
-- (line 9)
--* assertion in linker script: Miscellaneous Commands.
-- (line 9)
--* assignment in scripts: Assignments. (line 6)
--* AT(LMA): Output Section LMA. (line 6)
--* AT>LMA_REGION: Output Section LMA. (line 6)
--* automatic data imports: WIN32. (line 191)
--* back end: BFD. (line 6)
--* BASE (MRI): MRI. (line 54)
--* BE8: ARM. (line 28)
--* BFD canonical format: Canonical format. (line 11)
--* BFD requirements: BFD. (line 16)
--* big-endian objects: Options. (line 248)
--* binary input format: Options. (line 134)
--* BLOCK(EXP): Builtin Functions. (line 77)
--* bug criteria: Bug Criteria. (line 6)
--* bug reports: Bug Reporting. (line 6)
--* bugs in ld: Reporting Bugs. (line 6)
--* BYTE(EXPRESSION): Output Section Data.
-- (line 6)
--* C++ constructors, arranging in link: Output Section Keywords.
-- (line 19)
--* CHIP (MRI): MRI. (line 58)
--* COLLECT_NO_DEMANGLE: Environment. (line 29)
--* combining symbols, warnings on: Options. (line 1367)
--* command files: Scripts. (line 6)
--* command line: Options. (line 6)
--* common allocation: Options. (line 168)
--* common allocation in linker script: Miscellaneous Commands.
-- (line 20)
--* common symbol placement: Input Section Common.
-- (line 6)
--* COMMONPAGESIZE: Symbolic Constants. (line 13)
--* compatibility, MRI: Options. (line 158)
--* CONSTANT: Symbolic Constants. (line 6)
--* constants in linker scripts: Constants. (line 6)
--* constraints on output sections: Output Section Constraint.
-- (line 6)
--* constructors: Options. (line 561)
--* CONSTRUCTORS: Output Section Keywords.
-- (line 19)
--* constructors, arranging in link: Output Section Keywords.
-- (line 19)
--* Cortex-A8 erratum workaround: i960. (line 39)
--* crash of linker: Bug Criteria. (line 9)
--* CREATE_OBJECT_SYMBOLS: Output Section Keywords.
-- (line 9)
--* creating a DEF file: WIN32. (line 158)
--* cross reference table: Options. (line 861)
--* cross references: Miscellaneous Commands.
-- (line 56)
--* current output location: Location Counter. (line 6)
--* data: Output Section Data.
-- (line 6)
--* DATA_SEGMENT_ALIGN(MAXPAGESIZE, COMMONPAGESIZE): Builtin Functions.
-- (line 82)
--* DATA_SEGMENT_END(EXP): Builtin Functions. (line 103)
--* DATA_SEGMENT_RELRO_END(OFFSET, EXP): Builtin Functions. (line 109)
--* dbx: Options. (line 1282)
--* DEF files, creating: Options. (line 1774)
--* default emulation: Environment. (line 21)
--* default input format: Environment. (line 9)
--* DEFINED(SYMBOL): Builtin Functions. (line 120)
--* deleting local symbols: Options. (line 586)
--* demangling, default: Environment. (line 29)
--* demangling, from command line: Options. (line 903)
--* direct linking to a dll: WIN32. (line 239)
--* discarding sections: Output Section Discarding.
-- (line 6)
--* discontinuous memory: MEMORY. (line 6)
--* DLLs, creating: Options. (line 1774)
--* DLLs, linking to: Options. (line 1805)
--* dot: Location Counter. (line 6)
--* dot inside sections: Location Counter. (line 36)
--* dot outside sections: Location Counter. (line 66)
--* dynamic linker, from command line: Options. (line 916)
--* dynamic symbol table: Options. (line 221)
--* ELF program headers: PHDRS. (line 6)
--* emulation: Options. (line 391)
--* emulation, default: Environment. (line 21)
--* END (MRI): MRI. (line 62)
--* endianness: Options. (line 248)
--* entry point: Entry Point. (line 6)
--* entry point, from command line: Options. (line 187)
--* entry point, thumb: ARM. (line 17)
--* ENTRY(SYMBOL): Entry Point. (line 6)
--* error on valid input: Bug Criteria. (line 12)
--* example of linker script: Simple Example. (line 6)
--* exporting DLL symbols: WIN32. (line 19)
--* expression evaluation order: Evaluation. (line 6)
--* expression sections: Expression Section. (line 6)
--* expression, absolute: Builtin Functions. (line 10)
--* expressions: Expressions. (line 6)
--* EXTERN: Miscellaneous Commands.
-- (line 13)
--* fatal signal: Bug Criteria. (line 9)
--* file name wildcard patterns: Input Section Wildcards.
-- (line 6)
--* FILEHDR: PHDRS. (line 62)
--* filename symbols: Output Section Keywords.
-- (line 9)
--* fill pattern, entire section: Output Section Fill.
-- (line 6)
--* FILL(EXPRESSION): Output Section Data.
-- (line 39)
--* finalization function: Options. (line 300)
--* first input file: File Commands. (line 82)
--* first instruction: Entry Point. (line 6)
--* FIX_V4BX: ARM. (line 49)
--* FIX_V4BX_INTERWORKING: ARM. (line 62)
--* FORCE_COMMON_ALLOCATION: Miscellaneous Commands.
-- (line 20)
--* forcing input section alignment: Forced Input Alignment.
-- (line 6)
--* forcing output section alignment: Forced Output Alignment.
-- (line 6)
--* forcing the creation of dynamic sections: Options. (line 484)
--* FORMAT (MRI): MRI. (line 66)
--* functions in expressions: Builtin Functions. (line 6)
--* garbage collection <1>: Options. (line 938)
--* garbage collection <2>: Input Section Keep. (line 6)
--* garbage collection: Options. (line 960)
--* generating optimized output: Options. (line 465)
--* GNU linker: Overview. (line 6)
--* GNUTARGET: Environment. (line 9)
--* GROUP(FILES): File Commands. (line 47)
--* grouping input files: File Commands. (line 47)
--* groups of archives: Options. (line 705)
--* H8/300 support: H8/300. (line 6)
--* header size: Builtin Functions. (line 188)
--* heap size: Options. (line 1709)
--* help: Options. (line 975)
--* HIDDEN: HIDDEN. (line 6)
--* holes: Location Counter. (line 12)
--* holes, filling: Output Section Data.
-- (line 39)
--* HPPA multiple sub-space stubs: HPPA ELF32. (line 6)
--* HPPA stub grouping: HPPA ELF32. (line 12)
--* i960 support: i960. (line 6)
--* image base: Options. (line 1716)
--* implicit linker scripts: Implicit Linker Scripts.
-- (line 6)
--* import libraries: WIN32. (line 10)
--* INCLUDE FILENAME: File Commands. (line 9)
--* including a linker script: File Commands. (line 9)
--* including an entire archive: Options. (line 1480)
--* incremental link: Options. (line 325)
--* INHIBIT_COMMON_ALLOCATION: Miscellaneous Commands.
-- (line 25)
--* initialization function: Options. (line 328)
--* initialized data in ROM: Output Section LMA. (line 39)
--* input file format in linker script: Format Commands. (line 35)
--* input filename symbols: Output Section Keywords.
-- (line 9)
--* input files in linker scripts: File Commands. (line 19)
--* input files, displaying: Options. (line 527)
--* input format: Options. (line 134)
--* input object files in linker scripts: File Commands. (line 19)
--* input section alignment: Forced Input Alignment.
-- (line 6)
--* input section basics: Input Section Basics.
-- (line 6)
--* input section wildcards: Input Section Wildcards.
-- (line 6)
--* input sections: Input Section. (line 6)
--* INPUT(FILES): File Commands. (line 19)
--* INSERT: Miscellaneous Commands.
-- (line 30)
--* insert user script into default script: Miscellaneous Commands.
-- (line 30)
--* integer notation: Constants. (line 6)
--* integer suffixes: Constants. (line 15)
--* internal object-file format: Canonical format. (line 11)
--* invalid input: Bug Criteria. (line 14)
--* K and M integer suffixes: Constants. (line 15)
--* KEEP: Input Section Keep. (line 6)
--* l =: MEMORY. (line 74)
--* lazy evaluation: Evaluation. (line 6)
--* ld bugs, reporting: Bug Reporting. (line 6)
--* LD_FEATURE(STRING): Miscellaneous Commands.
-- (line 78)
--* ldata segment origin, cmd line: Options. (line 1315)
--* LDEMULATION: Environment. (line 21)
--* len =: MEMORY. (line 74)
--* LENGTH =: MEMORY. (line 74)
--* LENGTH(MEMORY): Builtin Functions. (line 137)
--* library search path in linker script: File Commands. (line 74)
--* link map: Options. (line 401)
--* link-time runtime library search path: Options. (line 1169)
--* linker crash: Bug Criteria. (line 9)
--* linker script concepts: Basic Script Concepts.
-- (line 6)
--* linker script example: Simple Example. (line 6)
--* linker script file commands: File Commands. (line 6)
--* linker script format: Script Format. (line 6)
--* linker script input object files: File Commands. (line 19)
--* linker script simple commands: Simple Commands. (line 6)
--* linker scripts: Scripts. (line 6)
--* LIST (MRI): MRI. (line 77)
--* little-endian objects: Options. (line 251)
--* LOAD (MRI): MRI. (line 84)
--* load address: Output Section LMA. (line 6)
--* LOADADDR(SECTION): Builtin Functions. (line 140)
--* loading, preventing: Output Section Type.
-- (line 22)
--* local symbols, deleting: Options. (line 590)
--* location counter: Location Counter. (line 6)
--* LOG2CEIL(EXP): Builtin Functions. (line 144)
--* LONG(EXPRESSION): Output Section Data.
-- (line 6)
--* M and K integer suffixes: Constants. (line 15)
--* M68HC11 and 68HC12 support: M68HC11/68HC12. (line 6)
--* machine architecture: Miscellaneous Commands.
-- (line 72)
--* machine dependencies: Machine Dependent. (line 6)
--* mapping input sections to output sections: Input Section. (line 6)
--* MAX: Builtin Functions. (line 147)
--* MAXPAGESIZE: Symbolic Constants. (line 10)
--* MEMORY: MEMORY. (line 6)
--* memory region attributes: MEMORY. (line 34)
--* memory regions: MEMORY. (line 6)
--* memory regions and sections: Output Section Region.
-- (line 6)
--* memory usage: Options. (line 987)
--* MIN: Builtin Functions. (line 150)
--* MIPS microMIPS instruction choice selection: MIPS. (line 6)
--* Motorola 68K GOT generation: M68K. (line 6)
--* MRI compatibility: MRI. (line 6)
--* MSP430 extra sections: MSP430. (line 11)
--* NAME (MRI): MRI. (line 90)
--* name, section: Output Section Name.
-- (line 6)
--* names: Symbols. (line 6)
--* naming the output file: Options. (line 459)
--* NEXT(EXP): Builtin Functions. (line 154)
--* NMAGIC: Options. (line 438)
--* NO_ENUM_SIZE_WARNING: ARM. (line 120)
--* NO_WCHAR_SIZE_WARNING: ARM. (line 127)
--* NOCROSSREFS(SECTIONS): Miscellaneous Commands.
-- (line 56)
--* NOLOAD: Output Section Type.
-- (line 22)
--* not enough room for program headers: Builtin Functions. (line 193)
--* o =: MEMORY. (line 69)
--* objdump -i: BFD. (line 6)
--* object file management: BFD. (line 6)
--* object files: Options. (line 29)
--* object formats available: BFD. (line 6)
--* object size: Options. (line 309)
--* OMAGIC: Options. (line 453)
--* ONLY_IF_RO: Output Section Constraint.
-- (line 6)
--* ONLY_IF_RW: Output Section Constraint.
-- (line 6)
--* opening object files: BFD outline. (line 6)
--* operators for arithmetic: Operators. (line 6)
--* options: Options. (line 6)
--* ORDER (MRI): MRI. (line 95)
--* org =: MEMORY. (line 69)
--* ORIGIN =: MEMORY. (line 69)
--* ORIGIN(MEMORY): Builtin Functions. (line 160)
--* orphan: Orphan Sections. (line 6)
--* output file after errors: Options. (line 1066)
--* output file format in linker script: Format Commands. (line 10)
--* output file name in linker script: File Commands. (line 64)
--* output format: Options. (line 969)
--* output section alignment: Forced Output Alignment.
-- (line 6)
--* output section attributes: Output Section Attributes.
-- (line 6)
--* output section data: Output Section Data.
-- (line 6)
--* OUTPUT(FILENAME): File Commands. (line 64)
--* OUTPUT_ARCH(BFDARCH): Miscellaneous Commands.
-- (line 72)
--* OUTPUT_FORMAT(BFDNAME): Format Commands. (line 10)
--* OVERLAY: Overlay Description.
-- (line 6)
--* overlays: Overlay Description.
-- (line 6)
--* partial link: Options. (line 488)
--* PE import table prefixing: ARM. (line 23)
--* PHDRS: PHDRS. (line 62)
--* PIC_VENEER: ARM. (line 133)
--* position independent executables: Options. (line 1093)
--* PowerPC ELF32 options: PowerPC ELF32. (line 16)
--* PowerPC GOT: PowerPC ELF32. (line 33)
--* PowerPC long branches: PowerPC ELF32. (line 6)
--* PowerPC PLT: PowerPC ELF32. (line 16)
--* PowerPC stub symbols: PowerPC ELF32. (line 47)
--* PowerPC TLS optimization: PowerPC ELF32. (line 51)
--* PowerPC64 dot symbols: PowerPC64 ELF64. (line 33)
--* PowerPC64 ELF64 options: PowerPC64 ELF64. (line 6)
--* PowerPC64 multi-TOC: PowerPC64 ELF64. (line 74)
--* PowerPC64 OPD optimization: PowerPC64 ELF64. (line 48)
--* PowerPC64 OPD spacing: PowerPC64 ELF64. (line 54)
--* PowerPC64 PLT call stub static chain: PowerPC64 ELF64. (line 103)
--* PowerPC64 PLT call stub thread safety: PowerPC64 ELF64. (line 109)
--* PowerPC64 PLT stub alignment: PowerPC64 ELF64. (line 96)
--* PowerPC64 stub grouping: PowerPC64 ELF64. (line 6)
--* PowerPC64 stub symbols: PowerPC64 ELF64. (line 29)
--* PowerPC64 TLS optimization: PowerPC64 ELF64. (line 43)
--* PowerPC64 TOC optimization: PowerPC64 ELF64. (line 60)
--* PowerPC64 TOC sorting: PowerPC64 ELF64. (line 86)
--* precedence in expressions: Operators. (line 6)
--* prevent unnecessary loading: Output Section Type.
-- (line 22)
--* program headers: PHDRS. (line 6)
--* program headers and sections: Output Section Phdr.
-- (line 6)
--* program headers, not enough room: Builtin Functions. (line 193)
--* program segments: PHDRS. (line 6)
--* PROVIDE: PROVIDE. (line 6)
--* PROVIDE_HIDDEN: PROVIDE_HIDDEN. (line 6)
--* PUBLIC (MRI): MRI. (line 103)
--* QUAD(EXPRESSION): Output Section Data.
-- (line 6)
--* quoted symbol names: Symbols. (line 6)
--* read-only text: Options. (line 438)
--* read/write from cmd line: Options. (line 444)
--* region alias: REGION_ALIAS. (line 6)
--* region names: REGION_ALIAS. (line 6)
--* REGION_ALIAS(ALIAS, REGION): REGION_ALIAS. (line 6)
--* regions of memory: MEMORY. (line 6)
--* relative expressions: Expression Section. (line 6)
--* relaxing addressing modes: Options. (line 1107)
--* relaxing on H8/300: H8/300. (line 9)
--* relaxing on i960: i960. (line 31)
--* relaxing on M68HC11: M68HC11/68HC12. (line 12)
--* relaxing on Xtensa: Xtensa. (line 27)
--* relocatable and absolute symbols: Expression Section. (line 6)
--* relocatable output: Options. (line 488)
--* removing sections: Output Section Discarding.
-- (line 6)
--* reporting bugs in ld: Reporting Bugs. (line 6)
--* requirements for BFD: BFD. (line 16)
--* retain relocations in final executable: Options. (line 475)
--* retaining specified symbols: Options. (line 1133)
--* rodata segment origin, cmd line: Options. (line 1309)
--* ROM initialized data: Output Section LMA. (line 39)
--* round up expression: Builtin Functions. (line 38)
--* round up location counter: Builtin Functions. (line 38)
--* runtime library name: Options. (line 316)
--* runtime library search path: Options. (line 1147)
--* runtime pseudo-relocation: WIN32. (line 217)
--* scaled integers: Constants. (line 15)
--* scommon section: Input Section Common.
-- (line 20)
--* script files: Options. (line 540)
--* scripts: Scripts. (line 6)
--* search directory, from cmd line: Options. (line 367)
--* search path in linker script: File Commands. (line 74)
--* SEARCH_DIR(PATH): File Commands. (line 74)
--* SECT (MRI): MRI. (line 109)
--* section address: Output Section Address.
-- (line 6)
--* section address in expression: Builtin Functions. (line 17)
--* section alignment: Builtin Functions. (line 64)
--* section alignment, warnings on: Options. (line 1458)
--* section data: Output Section Data.
-- (line 6)
--* section fill pattern: Output Section Fill.
-- (line 6)
--* section load address: Output Section LMA. (line 6)
--* section load address in expression: Builtin Functions. (line 140)
--* section name: Output Section Name.
-- (line 6)
--* section name wildcard patterns: Input Section Wildcards.
-- (line 6)
--* section size: Builtin Functions. (line 172)
--* section, assigning to memory region: Output Section Region.
-- (line 6)
--* section, assigning to program header: Output Section Phdr.
-- (line 6)
--* SECTIONS: SECTIONS. (line 6)
--* sections, discarding: Output Section Discarding.
-- (line 6)
--* segment origins, cmd line: Options. (line 1298)
--* SEGMENT_START(SEGMENT, DEFAULT): Builtin Functions. (line 163)
--* segments, ELF: PHDRS. (line 6)
--* shared libraries: Options. (line 1226)
--* SHORT(EXPRESSION): Output Section Data.
-- (line 6)
--* SIZEOF(SECTION): Builtin Functions. (line 172)
--* SIZEOF_HEADERS: Builtin Functions. (line 188)
--* small common symbols: Input Section Common.
-- (line 20)
--* SORT: Input Section Wildcards.
-- (line 65)
--* SORT_BY_ALIGNMENT: Input Section Wildcards.
-- (line 54)
--* SORT_BY_INIT_PRIORITY: Input Section Wildcards.
-- (line 60)
--* SORT_BY_NAME: Input Section Wildcards.
-- (line 46)
--* SORT_NONE: Input Section Wildcards.
-- (line 106)
--* SPU: SPU ELF. (line 46)
--* SPU ELF options: SPU ELF. (line 6)
--* SPU extra overlay stubs: SPU ELF. (line 19)
--* SPU local store size: SPU ELF. (line 24)
--* SPU overlay stub symbols: SPU ELF. (line 15)
--* SPU overlays: SPU ELF. (line 9)
--* SPU plugins: SPU ELF. (line 6)
--* SQUAD(EXPRESSION): Output Section Data.
-- (line 6)
--* stack size: Options. (line 1963)
--* standard Unix system: Options. (line 7)
--* start of execution: Entry Point. (line 6)
--* STARTUP(FILENAME): File Commands. (line 82)
--* strip all symbols: Options. (line 518)
--* strip debugger symbols: Options. (line 522)
--* stripping all but some symbols: Options. (line 1133)
--* STUB_GROUP_SIZE: ARM. (line 138)
--* SUBALIGN(SUBSECTION_ALIGN): Forced Input Alignment.
-- (line 6)
--* suffixes for integers: Constants. (line 15)
--* symbol defaults: Builtin Functions. (line 120)
--* symbol definition, scripts: Assignments. (line 6)
--* symbol names: Symbols. (line 6)
--* symbol tracing: Options. (line 596)
--* symbol versions: VERSION. (line 6)
--* symbol-only input: Options. (line 507)
--* symbolic constants: Symbolic Constants. (line 6)
--* symbols, from command line: Options. (line 890)
--* symbols, relocatable and absolute: Expression Section. (line 6)
--* symbols, retaining selectively: Options. (line 1133)
--* synthesizing linker: Options. (line 1107)
--* synthesizing on H8/300: H8/300. (line 14)
--* TARGET(BFDNAME): Format Commands. (line 35)
--* TARGET1: ARM. (line 32)
--* TARGET2: ARM. (line 37)
--* text segment origin, cmd line: Options. (line 1305)
--* thumb entry point: ARM. (line 17)
--* TI COFF versions: TI COFF. (line 6)
--* traditional format: Options. (line 1277)
--* trampoline generation on M68HC11: M68HC11/68HC12. (line 31)
--* trampoline generation on M68HC12: M68HC11/68HC12. (line 31)
--* unallocated address, next: Builtin Functions. (line 154)
--* undefined symbol: Options. (line 553)
--* undefined symbol in linker script: Miscellaneous Commands.
-- (line 13)
--* undefined symbols, warnings on: Options. (line 1454)
--* uninitialized data placement: Input Section Common.
-- (line 6)
--* unspecified memory: Output Section Data.
-- (line 39)
--* usage: Options. (line 975)
--* USE_BLX: ARM. (line 74)
--* using a DEF file: WIN32. (line 57)
--* using auto-export functionality: WIN32. (line 22)
--* Using decorations: WIN32. (line 162)
--* variables, defining: Assignments. (line 6)
--* verbose[=NUMBER]: Options. (line 1348)
--* version: Options. (line 580)
--* version script: VERSION. (line 6)
--* version script, symbol versions: Options. (line 1356)
--* VERSION {script text}: VERSION. (line 6)
--* versions of symbols: VERSION. (line 6)
--* VFP11_DENORM_FIX: ARM. (line 83)
--* warnings, on combining symbols: Options. (line 1367)
--* warnings, on section alignment: Options. (line 1458)
--* warnings, on undefined symbols: Options. (line 1454)
--* weak externals: WIN32. (line 407)
--* what is this?: Overview. (line 6)
--* wildcard file name patterns: Input Section Wildcards.
-- (line 6)
--* Xtensa options: Xtensa. (line 56)
--* Xtensa processors: Xtensa. (line 6)
--
--
--
--Tag Table:
--Node: Top713
--Node: Overview1499
--Node: Invocation2613
--Node: Options3021
--Node: Environment97141
--Node: Scripts98901
--Node: Basic Script Concepts100635
--Node: Script Format103343
--Node: Simple Example104206
--Node: Simple Commands107302
--Node: Entry Point107808
--Node: File Commands108741
--Node: Format Commands112742
--Node: REGION_ALIAS114698
--Node: Miscellaneous Commands119530
--Node: Assignments123138
--Node: Simple Assignments123649
--Node: HIDDEN125384
--Node: PROVIDE126014
--Node: PROVIDE_HIDDEN127207
--Node: Source Code Reference127451
--Node: SECTIONS131033
--Node: Output Section Description132924
--Node: Output Section Name134030
--Node: Output Section Address134906
--Node: Input Section137141
--Node: Input Section Basics137942
--Node: Input Section Wildcards141848
--Node: Input Section Common147055
--Node: Input Section Keep148537
--Node: Input Section Example149027
--Node: Output Section Data149995
--Node: Output Section Keywords152772
--Node: Output Section Discarding156341
--Node: Output Section Attributes157522
--Node: Output Section Type158623
--Node: Output Section LMA159694
--Node: Forced Output Alignment162765
--Node: Forced Input Alignment163283
--Node: Output Section Constraint163672
--Node: Output Section Region164100
--Node: Output Section Phdr164533
--Node: Output Section Fill165197
--Node: Overlay Description166339
--Node: MEMORY170647
--Node: PHDRS174982
--Node: VERSION180236
--Node: Expressions188329
--Node: Constants189258
--Node: Symbolic Constants190133
--Node: Symbols190684
--Node: Orphan Sections191431
--Node: Location Counter192596
--Node: Operators197032
--Node: Evaluation197954
--Node: Expression Section199318
--Node: Builtin Functions203182
--Node: Implicit Linker Scripts211273
--Node: Machine Dependent212048
--Node: H8/300213101
--Node: i960215163
--Node: M68HC11/68HC12217378
--Node: ARM218820
--Node: HPPA ELF32226794
--Node: M68K228417
--Node: MIPS229326
--Node: MMIX229850
--Node: MSP430231015
--Node: PowerPC ELF32232063
--Node: PowerPC64 ELF64234893
--Node: SPU ELF241049
--Node: TI COFF243681
--Node: WIN32244207
--Node: Xtensa264332
--Node: BFD267297
--Node: BFD outline268752
--Node: BFD information loss270038
--Node: Canonical format272555
--Node: Reporting Bugs276912
--Node: Bug Criteria277606
--Node: Bug Reporting278305
--Node: MRI285344
--Node: GNU Free Documentation License289987
--Node: LD Index315143
--
--End Tag Table
-diff -Nur binutils-2.24.orig/ld/ldlex.c binutils-2.24/ld/ldlex.c
---- binutils-2.24.orig/ld/ldlex.c 2013-11-18 09:49:29.000000000 +0100
-+++ binutils-2.24/ld/ldlex.c 1970-01-01 01:00:00.000000000 +0100
-@@ -1,4348 +0,0 @@
--
--#line 3 "ldlex.c"
--
--#define YY_INT_ALIGNED short int
--
--/* A lexical scanner generated by flex */
--
--#define FLEX_SCANNER
--#define YY_FLEX_MAJOR_VERSION 2
--#define YY_FLEX_MINOR_VERSION 5
--#define YY_FLEX_SUBMINOR_VERSION 35
--#if YY_FLEX_SUBMINOR_VERSION > 0
--#define FLEX_BETA
--#endif
--
--/* First, we deal with platform-specific or compiler-specific issues. */
--
--/* begin standard C headers. */
--#include <stdio.h>
--#include <string.h>
--#include <errno.h>
--#include <stdlib.h>
--
--/* end standard C headers. */
--
--/* flex integer type definitions */
--
--#ifndef FLEXINT_H
--#define FLEXINT_H
--
--/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */
--
--#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
--
--/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
-- * if you want the limit (max/min) macros for int types.
-- */
--#ifndef __STDC_LIMIT_MACROS
--#define __STDC_LIMIT_MACROS 1
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--
--#include <inttypes.h>
--typedef int8_t flex_int8_t;
--typedef uint8_t flex_uint8_t;
--typedef int16_t flex_int16_t;
--typedef uint16_t flex_uint16_t;
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--typedef uint32_t flex_uint32_t;
--typedef uint64_t flex_uint64_t;
--#else
--typedef signed char flex_int8_t;
--typedef short int flex_int16_t;
--typedef int flex_int32_t;
--typedef unsigned char flex_uint8_t;
--typedef unsigned short int flex_uint16_t;
--typedef unsigned int flex_uint32_t;
--#endif /* ! C99 */
--
--/* Limits of integral types. */
--#ifndef INT8_MIN
--#define INT8_MIN (-128)
--#endif
--#ifndef INT16_MIN
--#define INT16_MIN (-32767-1)
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--#ifndef INT32_MIN
--#define INT32_MIN (-2147483647-1)
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--#define INT8_MAX (127)
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--#define UINT8_MAX (255U)
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-- int yy_bs_lineno; /**< The line count. */
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--
-- /* Whether to try to fill the input buffer when we reach the
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--
-- int yy_buffer_status;
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-- * then we mark the buffer as YY_EOF_PENDING, to indicate that we
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-- };
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--
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--static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */
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-- ? (yy_buffer_stack)[(yy_buffer_stack_top)] \
-- : NULL)
--
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--#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)]
--
--/* yy_hold_char holds the character lost when yytext is formed. */
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--static int yy_init = 0; /* whether we need to initialize */
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--/* Flag which is used to allow yywrap()'s to do buffer switches
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--static int yy_did_buffer_switch_on_eof;
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--YY_BUFFER_STATE yy_create_buffer (FILE *file,int size );
--void yy_delete_buffer (YY_BUFFER_STATE b );
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--void yypop_buffer_state (void );
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--#define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER )
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--void *yyalloc (yy_size_t );
--void *yyrealloc (void *,yy_size_t );
--void yyfree (void * );
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--#define yy_new_buffer yy_create_buffer
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--#define yy_set_interactive(is_interactive) \
-- { \
-- if ( ! YY_CURRENT_BUFFER ){ \
-- yyensure_buffer_stack (); \
-- YY_CURRENT_BUFFER_LVALUE = \
-- yy_create_buffer(yyin,YY_BUF_SIZE ); \
-- } \
-- YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \
-- }
--
--#define yy_set_bol(at_bol) \
-- { \
-- if ( ! YY_CURRENT_BUFFER ){\
-- yyensure_buffer_stack (); \
-- YY_CURRENT_BUFFER_LVALUE = \
-- yy_create_buffer(yyin,YY_BUF_SIZE ); \
-- } \
-- YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \
-- }
--
--#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol)
--
--/* Begin user sect3 */
--
--typedef unsigned char YY_CHAR;
--
--FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0;
--
--typedef int yy_state_type;
--
--extern int yylineno;
--
--int yylineno = 1;
--
--extern char *yytext;
--#define yytext_ptr yytext
--
--static yy_state_type yy_get_previous_state (void );
--static yy_state_type yy_try_NUL_trans (yy_state_type current_state );
--static int yy_get_next_buffer (void );
--static void yy_fatal_error (yyconst char msg[] );
--
--/* Done after the current pattern has been matched and before the
-- * corresponding action - sets up yytext.
-- */
--#define YY_DO_BEFORE_ACTION \
-- (yytext_ptr) = yy_bp; \
-- yyleng = (yy_size_t) (yy_cp - yy_bp); \
-- (yy_hold_char) = *yy_cp; \
-- *yy_cp = '\0'; \
-- (yy_c_buf_p) = yy_cp;
--
--#define YY_NUM_RULES 197
--#define YY_END_OF_BUFFER 198
--/* This struct is not used in this scanner,
-- but its presence is necessary. */
--struct yy_trans_info
-- {
-- flex_int32_t yy_verify;
-- flex_int32_t yy_nxt;
-- };
--static yyconst flex_int16_t yy_accept[1751] =
-- { 0,
-- 0, 0, 177, 177, 0, 0, 0, 0, 0, 0,
-- 0, 0, 0, 0, 0, 0, 0, 0, 198, 197,
-- 195, 180, 179, 32, 195, 177, 38, 29, 44, 43,
-- 34, 35, 28, 36, 177, 37, 8, 8, 45, 46,
-- 39, 40, 27, 33, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 10, 9, 177, 119, 117, 177,
-- 42, 30, 41, 31, 196, 180, 32, 196, 175, 38,
-- 29, 44, 43, 34, 35, 28, 36, 175, 37, 8,
-- 8, 45, 46, 39, 40, 27, 33, 175, 175, 175,
--
-- 175, 175, 175, 175, 175, 175, 175, 175, 175, 175,
-- 175, 175, 175, 10, 9, 175, 175, 42, 30, 41,
-- 31, 173, 36, 173, 37, 8, 8, 173, 173, 173,
-- 173, 173, 173, 173, 173, 173, 173, 173, 173, 173,
-- 173, 173, 173, 173, 173, 173, 173, 173, 119, 117,
-- 173, 31, 4, 3, 2, 4, 5, 134, 32, 133,
-- 172, 34, 35, 28, 36, 172, 37, 8, 8, 45,
-- 46, 40, 33, 172, 172, 172, 172, 172, 172, 172,
-- 172, 172, 172, 172, 172, 10, 9, 172, 172, 172,
-- 172, 172, 172, 172, 172, 172, 172, 172, 31, 194,
--
-- 192, 193, 195, 187, 186, 181, 188, 189, 185, 185,
-- 185, 185, 190, 191, 180, 177, 15, 0, 178, 8,
-- 26, 24, 22, 20, 21, 1, 23, 8, 8, 177,
-- 18, 17, 14, 16, 19, 177, 177, 177, 177, 177,
-- 124, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 25, 13, 15, 175, 6, 22, 20, 21, 0, 1,
--
-- 23, 8, 0, 7, 7, 8, 7, 14, 175, 7,
-- 7, 7, 175, 175, 124, 7, 175, 175, 7, 175,
-- 175, 175, 7, 175, 175, 175, 175, 175, 175, 175,
-- 175, 175, 175, 175, 175, 175, 175, 175, 175, 175,
-- 175, 7, 175, 173, 8, 0, 23, 8, 0, 173,
-- 173, 173, 173, 173, 124, 173, 173, 173, 173, 173,
-- 173, 173, 173, 173, 173, 173, 173, 173, 173, 173,
-- 173, 173, 173, 173, 173, 173, 173, 173, 173, 173,
-- 173, 173, 173, 173, 173, 173, 173, 173, 173, 173,
-- 173, 173, 173, 173, 173, 173, 173, 173, 173, 173,
--
-- 173, 173, 173, 173, 173, 4, 4, 133, 133, 172,
-- 6, 135, 22, 136, 172, 7, 7, 7, 172, 172,
-- 172, 7, 172, 7, 7, 172, 172, 172, 172, 172,
-- 172, 172, 172, 7, 172, 172, 172, 7, 172, 7,
-- 7, 172, 172, 172, 172, 172, 172, 172, 172, 194,
-- 193, 186, 185, 0, 185, 185, 185, 11, 12, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 93, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 72, 177, 177, 177, 177, 177,
--
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 120, 118, 177, 8, 176, 8, 175, 7,
-- 175, 175, 175, 175, 175, 175, 175, 175, 175, 175,
-- 175, 175, 175, 175, 175, 175, 175, 175, 175, 175,
-- 62, 63, 175, 175, 175, 175, 175, 175, 175, 175,
-- 175, 175, 175, 175, 175, 8, 174, 173, 173, 173,
-- 173, 173, 173, 173, 173, 173, 173, 173, 173, 173,
-- 173, 173, 173, 173, 173, 173, 173, 173, 173, 173,
-- 173, 93, 173, 173, 173, 173, 173, 173, 173, 173,
--
-- 173, 173, 173, 72, 62, 173, 63, 173, 173, 173,
-- 173, 173, 173, 173, 173, 173, 173, 173, 173, 173,
-- 173, 173, 173, 173, 173, 173, 173, 173, 173, 173,
-- 173, 173, 173, 120, 118, 173, 4, 8, 172, 172,
-- 172, 172, 172, 137, 172, 172, 172, 172, 172, 172,
-- 172, 172, 172, 172, 172, 172, 172, 172, 172, 154,
-- 172, 172, 172, 172, 172, 172, 172, 172, 172, 172,
-- 185, 185, 185, 177, 59, 177, 177, 177, 177, 177,
-- 53, 177, 100, 177, 111, 177, 177, 177, 177, 177,
-- 177, 177, 89, 177, 177, 177, 177, 177, 112, 177,
--
-- 177, 177, 130, 177, 177, 177, 98, 177, 68, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 96, 177,
-- 177, 177, 177, 177, 177, 106, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 175, 59, 175, 175, 175,
-- 53, 175, 175, 111, 175, 175, 175, 175, 175, 175,
-- 175, 112, 175, 130, 175, 175, 175, 68, 175, 175,
-- 175, 175, 175, 175, 175, 175, 175, 175, 175, 175,
-- 173, 59, 173, 173, 173, 173, 173, 53, 173, 100,
-- 173, 111, 173, 173, 173, 173, 173, 173, 173, 89,
-- 173, 173, 173, 173, 173, 112, 173, 173, 173, 130,
--
-- 173, 173, 173, 173, 98, 173, 68, 173, 173, 173,
-- 173, 173, 173, 173, 173, 173, 96, 173, 173, 173,
-- 173, 173, 173, 106, 173, 173, 173, 173, 173, 173,
-- 173, 173, 173, 172, 172, 172, 141, 149, 140, 172,
-- 172, 151, 144, 147, 172, 172, 152, 172, 172, 172,
-- 172, 172, 158, 166, 157, 172, 172, 169, 161, 164,
-- 172, 172, 170, 172, 172, 185, 185, 185, 177, 87,
-- 55, 177, 177, 177, 52, 177, 177, 177, 177, 110,
-- 66, 177, 177, 95, 177, 78, 177, 177, 177, 77,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
--
-- 177, 177, 123, 177, 177, 177, 177, 177, 99, 177,
-- 177, 177, 97, 177, 177, 177, 177, 177, 177, 177,
-- 175, 55, 175, 175, 52, 175, 175, 175, 110, 175,
-- 78, 175, 175, 175, 175, 175, 175, 175, 175, 175,
-- 175, 175, 175, 175, 175, 175, 175, 175, 175, 173,
-- 87, 55, 173, 173, 173, 52, 173, 173, 173, 173,
-- 110, 66, 173, 173, 95, 173, 78, 173, 173, 173,
-- 77, 173, 173, 173, 173, 173, 173, 173, 173, 173,
-- 173, 173, 173, 173, 123, 173, 173, 173, 173, 173,
-- 99, 173, 173, 173, 97, 173, 173, 173, 173, 173,
--
-- 173, 173, 172, 142, 139, 172, 172, 151, 151, 146,
-- 172, 150, 172, 172, 159, 156, 172, 172, 169, 169,
-- 163, 172, 168, 172, 185, 185, 183, 177, 177, 177,
-- 65, 177, 88, 177, 177, 177, 177, 177, 177, 67,
-- 177, 127, 177, 177, 177, 86, 177, 54, 177, 47,
-- 177, 177, 109, 177, 50, 76, 177, 177, 177, 177,
-- 177, 177, 73, 177, 177, 177, 177, 177, 94, 74,
-- 177, 177, 177, 175, 175, 175, 65, 175, 175, 175,
-- 175, 175, 127, 175, 175, 54, 175, 175, 175, 109,
-- 175, 50, 175, 175, 175, 73, 175, 175, 175, 175,
--
-- 173, 173, 173, 65, 173, 88, 173, 173, 173, 173,
-- 173, 173, 67, 173, 127, 173, 173, 173, 86, 173,
-- 54, 173, 173, 47, 173, 173, 109, 173, 50, 76,
-- 173, 173, 173, 173, 173, 173, 73, 173, 173, 173,
-- 173, 173, 94, 74, 173, 173, 173, 172, 172, 67,
-- 148, 145, 172, 172, 172, 167, 165, 162, 172, 184,
-- 182, 177, 61, 177, 177, 177, 177, 177, 177, 80,
-- 177, 177, 122, 177, 177, 177, 177, 177, 101, 177,
-- 177, 103, 128, 177, 177, 177, 177, 177, 177, 177,
-- 116, 90, 177, 51, 177, 177, 175, 61, 175, 175,
--
-- 175, 175, 80, 175, 122, 175, 175, 175, 175, 175,
-- 113, 128, 175, 175, 116, 175, 175, 175, 173, 61,
-- 173, 173, 173, 173, 173, 173, 80, 173, 173, 122,
-- 173, 173, 173, 173, 173, 173, 101, 173, 173, 103,
-- 128, 173, 173, 173, 173, 173, 173, 173, 116, 90,
-- 173, 51, 173, 173, 172, 172, 172, 172, 172, 172,
-- 153, 177, 177, 132, 177, 177, 177, 177, 177, 177,
-- 177, 177, 60, 177, 177, 177, 177, 177, 177, 177,
-- 85, 177, 177, 177, 177, 126, 171, 177, 153, 175,
-- 175, 132, 175, 175, 175, 60, 64, 175, 175, 175,
--
-- 175, 175, 126, 171, 175, 153, 173, 173, 132, 173,
-- 173, 173, 173, 173, 173, 173, 173, 60, 64, 173,
-- 173, 173, 173, 173, 173, 173, 85, 173, 173, 173,
-- 173, 126, 171, 173, 153, 138, 143, 171, 155, 160,
-- 177, 79, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 108, 177, 175, 79, 175, 175, 175, 175,
-- 175, 175, 175, 175, 175, 173, 79, 173, 173, 173,
-- 173, 173, 173, 173, 173, 173, 173, 173, 173, 173,
-- 173, 173, 173, 173, 173, 173, 173, 108, 173, 177,
--
-- 177, 177, 177, 177, 177, 177, 177, 49, 177, 114,
-- 115, 177, 177, 177, 177, 75, 177, 177, 177, 177,
-- 177, 177, 175, 175, 175, 175, 175, 114, 115, 175,
-- 175, 175, 175, 173, 173, 173, 173, 173, 173, 173,
-- 173, 49, 173, 114, 115, 173, 173, 173, 173, 75,
-- 173, 173, 173, 173, 173, 173, 177, 177, 177, 177,
-- 177, 177, 177, 177, 102, 92, 177, 177, 177, 177,
-- 177, 177, 177, 177, 177, 175, 175, 175, 175, 102,
-- 175, 175, 175, 175, 173, 173, 173, 173, 173, 173,
-- 173, 173, 102, 92, 173, 173, 173, 173, 173, 173,
--
-- 173, 173, 173, 177, 82, 177, 177, 131, 177, 177,
-- 177, 177, 177, 48, 177, 177, 177, 177, 104, 177,
-- 175, 175, 131, 175, 175, 175, 175, 175, 173, 82,
-- 173, 173, 131, 173, 173, 173, 173, 173, 48, 173,
-- 173, 173, 173, 104, 173, 177, 177, 177, 177, 177,
-- 177, 91, 177, 71, 177, 177, 177, 177, 175, 175,
-- 175, 175, 71, 175, 175, 173, 173, 173, 173, 173,
-- 173, 91, 173, 71, 173, 173, 173, 173, 177, 177,
-- 177, 177, 177, 177, 177, 177, 129, 70, 177, 177,
-- 69, 175, 175, 175, 175, 175, 129, 70, 69, 173,
--
-- 173, 173, 173, 173, 173, 173, 173, 129, 70, 173,
-- 173, 69, 177, 177, 177, 177, 177, 177, 177, 177,
-- 177, 177, 175, 175, 175, 175, 175, 173, 173, 173,
-- 173, 173, 173, 173, 173, 173, 173, 125, 177, 177,
-- 58, 177, 177, 177, 177, 177, 177, 125, 175, 58,
-- 175, 175, 125, 173, 173, 58, 173, 173, 173, 173,
-- 173, 173, 177, 177, 177, 177, 177, 177, 105, 177,
-- 175, 175, 175, 173, 173, 173, 173, 173, 173, 105,
-- 173, 177, 56, 177, 177, 177, 177, 177, 56, 175,
-- 175, 173, 56, 173, 173, 173, 173, 173, 177, 177,
--
-- 177, 177, 121, 177, 175, 121, 173, 173, 173, 173,
-- 121, 173, 177, 177, 177, 177, 177, 175, 173, 173,
-- 173, 173, 173, 81, 177, 177, 177, 107, 175, 81,
-- 173, 173, 173, 107, 57, 177, 177, 57, 57, 173,
-- 173, 83, 177, 83, 173, 177, 173, 84, 84, 0
-- } ;
--
--static yyconst flex_int32_t yy_ec[256] =
-- { 0,
-- 1, 1, 1, 1, 1, 1, 1, 1, 2, 3,
-- 1, 1, 2, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 2, 4, 5, 6, 7, 8, 9, 1, 10,
-- 11, 12, 13, 14, 15, 16, 17, 18, 19, 20,
-- 19, 19, 19, 19, 19, 19, 19, 21, 22, 23,
-- 24, 25, 26, 1, 27, 28, 29, 30, 31, 32,
-- 33, 34, 35, 36, 37, 38, 39, 40, 41, 42,
-- 43, 44, 45, 46, 47, 48, 49, 50, 51, 52,
-- 53, 54, 55, 56, 57, 1, 58, 59, 60, 61,
--
-- 62, 63, 64, 65, 66, 16, 67, 68, 69, 70,
-- 71, 72, 16, 73, 74, 75, 76, 16, 16, 77,
-- 16, 78, 79, 80, 81, 82, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
--
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-- 1, 1, 1, 1, 1
-- } ;
--
--static yyconst flex_int32_t yy_meta[83] =
-- { 0,
-- 1, 1, 2, 3, 1, 1, 4, 1, 1, 1,
-- 1, 3, 5, 6, 7, 8, 9, 10, 10, 10,
-- 7, 1, 1, 6, 1, 3, 10, 10, 10, 10,
-- 10, 10, 8, 8, 8, 8, 8, 8, 8, 8,
-- 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
-- 8, 8, 7, 4, 7, 3, 8, 10, 10, 10,
-- 10, 10, 10, 8, 8, 8, 8, 8, 8, 8,
-- 8, 8, 8, 8, 8, 8, 8, 8, 1, 1,
-- 1, 9
-- } ;
--
--static yyconst flex_int16_t yy_base[1775] =
-- { 0,
-- 0, 0, 0, 0, 82, 0, 164, 0, 246, 327,
-- 408, 0, 275, 277, 490, 572, 654, 736, 2703, 2704,
-- 2704, 2700, 2704, 2677, 2695, 801, 2704, 264, 2704, 2704,
-- 2675, 2674, 0, 2673, 0, 250, 581, 499, 0, 2704,
-- 252, 2672, 260, 0, 259, 255, 254, 269, 263, 274,
-- 2651, 272, 2654, 2662, 327, 289, 277, 315, 277, 2645,
-- 2660, 330, 2663, 2658, 0, 0, 2629, 2625, 2613, 2619,
-- 2704, 239, 2704, 0, 2704, 2682, 2659, 2677, 847, 2704,
-- 351, 2704, 2704, 2657, 2656, 2704, 298, 0, 355, 893,
-- 267, 2704, 2704, 300, 2655, 345, 2704, 953, 356, 359,
--
-- 494, 503, 576, 2634, 2642, 2636, 2644, 347, 358, 489,
-- 355, 2630, 516, 2704, 2704, 652, 2607, 2704, 482, 2704,
-- 0, 1013, 499, 0, 530, 745, 757, 655, 572, 485,
-- 534, 487, 567, 2628, 517, 2631, 2639, 599, 529, 578,
-- 594, 599, 2622, 2637, 661, 2640, 2635, 2606, 2602, 2590,
-- 2596, 0, 1059, 2704, 2704, 0, 2704, 2704, 2637, 2657,
-- 1105, 2635, 2634, 2704, 2633, 0, 2632, 0, 538, 2704,
-- 0, 2631, 2704, 1151, 608, 686, 609, 677, 653, 355,
-- 2627, 2609, 2605, 504, 2607, 2704, 2704, 724, 611, 661,
-- 702, 740, 545, 2592, 2576, 2572, 570, 2574, 0, 2644,
--
-- 2704, 0, 2633, 2704, 0, 2704, 2704, 2704, 2623, 536,
-- 663, 700, 2704, 2704, 2641, 0, 0, 2637, 2704, 730,
-- 2704, 2704, 0, 0, 0, 0, 0, 768, 0, 0,
-- 2617, 2704, 0, 2704, 2616, 2594, 2608, 2591, 2601, 567,
-- 0, 2603, 2594, 2592, 2586, 646, 2600, 2584, 2597, 2597,
-- 2581, 615, 2588, 2584, 2580, 2582, 2592, 2583, 807, 2589,
-- 2562, 2578, 683, 2575, 2577, 2565, 813, 2576, 2578, 2566,
-- 2580, 2580, 2568, 2581, 2574, 811, 2565, 2553, 2560, 2572,
-- 2555, 2574, 2572, 2554, 2554, 2553, 2522, 2525, 2530, 2515,
-- 2704, 2704, 2704, 0, 1211, 2704, 2704, 2704, 0, 2704,
--
-- 2704, 693, 864, 0, 2704, 2704, 0, 2704, 763, 842,
-- 929, 0, 2557, 728, 0, 962, 2551, 2549, 783, 989,
-- 1018, 2558, 2559, 2546, 2556, 814, 2554, 2544, 365, 2533,
-- 2542, 2531, 751, 2542, 2544, 2547, 2536, 2543, 2523, 2543,
-- 2545, 1009, 2494, 0, 1263, 0, 0, 878, 0, 2526,
-- 2540, 2523, 2533, 745, 0, 2535, 2526, 2524, 2518, 808,
-- 2532, 2516, 2529, 2529, 2513, 781, 2520, 2516, 2512, 2514,
-- 2524, 2515, 857, 2521, 2494, 2510, 902, 724, 2510, 2508,
-- 2497, 908, 2508, 2510, 2498, 2512, 2512, 2500, 2513, 2506,
-- 936, 2497, 2485, 2492, 2504, 2487, 2506, 2504, 2486, 2486,
--
-- 2485, 2454, 2457, 2462, 2447, 0, 1315, 2521, 2704, 0,
-- 1367, 0, 0, 0, 775, 948, 819, 0, 2488, 950,
-- 951, 2487, 2491, 2474, 2475, 2473, 2490, 2477, 2485, 2486,
-- 2484, 2485, 2464, 830, 2444, 862, 1021, 2443, 2447, 2432,
-- 2433, 2431, 2446, 2434, 2441, 2442, 2440, 2441, 2422, 2495,
-- 0, 0, 2475, 2474, 864, 848, 649, 2704, 2704, 2453,
-- 2449, 2461, 2458, 2459, 2449, 2447, 2457, 2457, 2454, 2439,
-- 2432, 2455, 2454, 2445, 2450, 2434, 2439, 2445, 2437, 2447,
-- 2444, 2425, 2441, 0, 2432, 2428, 2433, 2420, 2435, 2423,
-- 2432, 2430, 2432, 2428, 0, 2419, 2413, 2414, 2419, 2415,
--
-- 2404, 2421, 2411, 2408, 2407, 2402, 2419, 2413, 2403, 2400,
-- 2406, 2400, 2412, 2396, 2412, 2413, 2395, 2411, 2399, 2403,
-- 2390, 2363, 0, 0, 2371, 0, 0, 984, 2391, 1054,
-- 2398, 2399, 2389, 2398, 2398, 2381, 2374, 2397, 1066, 2394,
-- 2384, 2374, 2390, 2381, 2377, 2370, 2374, 2382, 2384, 2393,
-- 0, 0, 2366, 2367, 2369, 2358, 2375, 2363, 2358, 2366,
-- 2373, 2374, 2375, 2330, 2338, 0, 0, 2358, 2354, 2366,
-- 2363, 2364, 2354, 2352, 2362, 2362, 2359, 2344, 2337, 2360,
-- 2359, 2350, 2355, 2339, 2344, 2350, 2342, 2352, 2349, 2330,
-- 2346, 0, 2337, 2333, 2338, 2325, 2340, 2328, 2337, 2335,
--
-- 2337, 2346, 2332, 0, 0, 2323, 0, 2317, 2318, 2323,
-- 2319, 2308, 2325, 2315, 2312, 2311, 2306, 2323, 2317, 2307,
-- 2304, 2310, 2304, 2316, 2300, 2316, 2317, 2299, 2315, 2303,
-- 2307, 2294, 2267, 0, 0, 2275, 0, 0, 2295, 501,
-- 2304, 2303, 2291, 0, 2301, 2292, 2284, 2299, 2297, 2296,
-- 2288, 2279, 2280, 2283, 2251, 880, 2259, 2258, 2247, 0,
-- 2256, 2248, 2241, 2254, 2252, 2251, 2244, 2236, 2237, 2239,
-- 832, 833, 813, 2270, 0, 2263, 2266, 2261, 2273, 2259,
-- 0, 2265, 0, 2255, 0, 2254, 2242, 2258, 2251, 2245,
-- 2248, 2250, 0, 2247, 2261, 2249, 2259, 2242, 0, 2260,
--
-- 2241, 2242, 0, 2254, 2238, 2256, 0, 2238, 0, 2240,
-- 2239, 2252, 2221, 2242, 2229, 2237, 2229, 2238, 0, 2231,
-- 2242, 2235, 2238, 2222, 2226, 2209, 2230, 2234, 2217, 2224,
-- 2226, 2229, 2224, 2190, 2186, 2218, 0, 2215, 2210, 2222,
-- 0, 2215, 2205, 0, 2193, 2209, 2202, 2200, 2204, 2214,
-- 2197, 0, 2197, 0, 2196, 2214, 2211, 0, 2198, 2211,
-- 2180, 2201, 2197, 2199, 2202, 2191, 2196, 2192, 2161, 2157,
-- 2189, 0, 2182, 2185, 2180, 2192, 2178, 0, 2184, 0,
-- 2166, 0, 2156, 2135, 2142, 2123, 2114, 2115, 2117, 0,
-- 2111, 2116, 2095, 2096, 2074, 0, 2077, 2058, 2059, 0,
--
-- 251, 297, 347, 468, 0, 515, 0, 576, 625, 679,
-- 668, 693, 682, 694, 703, 716, 0, 740, 777, 820,
-- 842, 835, 852, 838, 881, 888, 880, 890, 913, 918,
-- 915, 893, 895, 930, 932, 957, 0, 0, 0, 957,
-- 975, 1436, 0, 0, 960, 970, 0, 960, 980, 942,
-- 946, 952, 0, 0, 0, 952, 968, 1517, 0, 0,
-- 955, 963, 0, 961, 978, 1036, 1039, 1037, 1005, 0,
-- 1024, 1015, 1031, 1035, 0, 1041, 1036, 1024, 1039, 0,
-- 0, 1050, 1053, 0, 1045, 0, 1063, 1076, 1072, 1051,
-- 1064, 1086, 1080, 1085, 1065, 1081, 1100, 1098, 1094, 1090,
--
-- 1085, 1111, 0, 1109, 1100, 1107, 1101, 1103, 0, 1112,
-- 1117, 1119, 0, 1100, 1113, 1121, 1104, 1110, 1076, 1090,
-- 1107, 1115, 1109, 1127, 0, 1132, 1115, 1130, 0, 1132,
-- 0, 1133, 1144, 1118, 1142, 1147, 1153, 1141, 1157, 1153,
-- 1150, 1164, 1163, 1154, 1163, 1169, 1162, 1122, 1136, 1153,
-- 0, 1161, 1157, 1173, 1174, 0, 1179, 1176, 1163, 1184,
-- 0, 0, 1187, 1179, 0, 1163, 0, 1181, 1194, 1190,
-- 1169, 1181, 1205, 1199, 1204, 1204, 1185, 1192, 1217, 1215,
-- 1211, 1207, 1203, 1224, 0, 1222, 1213, 1220, 1214, 1216,
-- 0, 1225, 1235, 1231, 0, 1212, 1225, 1233, 1216, 1223,
--
-- 1189, 1203, 1220, 0, 1229, 1236, 1231, 0, 1598, 0,
-- 1250, 0, 1257, 1209, 0, 1217, 1217, 1213, 0, 1679,
-- 0, 1229, 0, 1238, 1278, 1282, 1276, 1252, 1269, 1255,
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-- } ;
--
--static yyconst flex_int16_t yy_nxt[2787] =
-- { 0,
-- 21, 22, 23, 24, 25, 21, 26, 27, 28, 29,
-- 30, 31, 32, 33, 34, 35, 36, 37, 38, 38,
-- 39, 40, 41, 42, 43, 44, 45, 46, 47, 48,
-- 49, 50, 51, 52, 53, 35, 54, 55, 56, 57,
-- 58, 59, 60, 61, 62, 63, 35, 64, 35, 35,
-- 35, 35, 65, 35, 66, 35, 35, 67, 35, 35,
-- 35, 35, 35, 35, 35, 35, 35, 68, 35, 35,
-- 69, 35, 35, 70, 35, 35, 35, 35, 71, 72,
-- 73, 74, 75, 76, 23, 77, 78, 75, 79, 80,
-- 81, 82, 83, 84, 85, 86, 87, 88, 89, 90,
--
-- 91, 91, 92, 93, 94, 95, 96, 97, 98, 99,
-- 100, 101, 102, 103, 104, 105, 106, 88, 107, 108,
-- 109, 110, 111, 112, 88, 88, 113, 88, 88, 88,
-- 88, 88, 88, 88, 114, 88, 115, 75, 88, 116,
-- 103, 103, 103, 103, 103, 88, 88, 88, 88, 88,
-- 88, 88, 88, 88, 88, 117, 88, 88, 88, 88,
-- 118, 119, 120, 121, 75, 76, 23, 77, 78, 75,
-- 122, 80, 81, 82, 83, 84, 85, 86, 123, 124,
-- 125, 126, 127, 127, 92, 93, 94, 95, 96, 97,
-- 128, 129, 130, 131, 132, 133, 134, 135, 136, 124,
--
-- 137, 138, 139, 140, 141, 142, 143, 144, 145, 146,
-- 124, 147, 124, 124, 124, 124, 114, 124, 115, 75,
-- 124, 148, 124, 124, 124, 124, 124, 124, 124, 124,
-- 124, 149, 124, 124, 150, 124, 124, 151, 124, 124,
-- 124, 124, 118, 119, 120, 152, 75, 75, 20, 75,
-- 75, 75, 153, 75, 75, 75, 75, 75, 154, 75,
-- 155, 226, 291, 126, 127, 127, 75, 75, 75, 157,
-- 75, 75, 221, 227, 231, 232, 200, 201, 200, 201,
-- 202, 973, 202, 234, 235, 242, 236, 222, 237, 243,
-- 238, 203, 244, 203, 246, 248, 239, 247, 75, 249,
--
-- 75, 75, 251, 240, 241, 245, 257, 266, 253, 258,
-- 272, 254, 252, 250, 255, 264, 305, 267, 292, 265,
-- 273, 298, 231, 232, 75, 75, 75, 75, 75, 20,
-- 75, 75, 75, 153, 75, 75, 75, 75, 75, 154,
-- 75, 155, 974, 305, 126, 127, 127, 75, 75, 75,
-- 157, 75, 75, 204, 268, 204, 261, 262, 269, 221,
-- 276, 270, 271, 277, 278, 299, 300, 263, 234, 235,
-- 279, 280, 281, 975, 222, 282, 283, 328, 301, 75,
-- 284, 75, 75, 316, 330, 316, 316, 329, 316, 426,
-- 317, 549, 331, 318, 334, 427, 294, 550, 335, 319,
--
-- 294, 294, 336, 294, 294, 75, 75, 75, 21, 22,
-- 158, 159, 21, 160, 161, 27, 28, 29, 30, 162,
-- 163, 164, 165, 166, 167, 168, 169, 169, 170, 171,
-- 41, 172, 43, 173, 174, 175, 176, 177, 178, 179,
-- 166, 166, 166, 166, 166, 180, 166, 181, 182, 183,
-- 166, 166, 184, 185, 166, 166, 166, 166, 166, 166,
-- 186, 166, 187, 21, 166, 188, 189, 190, 177, 191,
-- 192, 166, 166, 166, 166, 193, 166, 194, 195, 196,
-- 166, 197, 198, 166, 166, 166, 71, 72, 73, 199,
-- 21, 200, 201, 21, 21, 202, 976, 21, 21, 21,
--
-- 21, 21, 21, 206, 21, 291, 203, 21, 21, 21,
-- 206, 206, 21, 21, 21, 21, 228, 228, 228, 332,
-- 320, 316, 298, 316, 321, 360, 365, 835, 361, 333,
-- 316, 294, 316, 836, 431, 229, 366, 229, 322, 294,
-- 294, 300, 21, 21, 21, 21, 338, 294, 294, 432,
-- 339, 371, 323, 347, 372, 378, 454, 340, 977, 379,
-- 362, 292, 341, 380, 363, 229, 346, 229, 207, 21,
-- 208, 21, 21, 200, 201, 21, 21, 202, 364, 21,
-- 21, 21, 21, 21, 21, 206, 21, 305, 203, 21,
-- 21, 21, 206, 206, 21, 21, 21, 21, 228, 228,
--
-- 228, 367, 356, 316, 368, 316, 357, 369, 381, 358,
-- 442, 464, 455, 294, 305, 443, 978, 229, 382, 229,
-- 294, 294, 359, 465, 21, 21, 21, 21, 375, 376,
-- 230, 447, 387, 383, 420, 417, 417, 384, 417, 377,
-- 385, 386, 388, 477, 448, 410, 410, 229, 410, 229,
-- 207, 21, 208, 21, 21, 200, 201, 230, 25, 202,
-- 478, 21, 21, 21, 21, 979, 21, 206, 436, 454,
-- 203, 21, 21, 21, 206, 206, 21, 21, 21, 316,
-- 417, 316, 350, 454, 351, 470, 352, 471, 417, 294,
-- 410, 391, 353, 425, 392, 393, 294, 294, 410, 354,
--
-- 355, 394, 395, 396, 417, 980, 397, 398, 673, 493,
-- 342, 399, 421, 417, 410, 210, 423, 211, 437, 422,
-- 454, 212, 494, 410, 981, 438, 424, 982, 983, 417,
-- 456, 984, 213, 21, 214, 21, 21, 200, 201, 410,
-- 25, 202, 305, 21, 21, 21, 21, 985, 21, 206,
-- 986, 417, 203, 21, 21, 21, 206, 206, 21, 21,
-- 21, 410, 348, 348, 348, 604, 229, 417, 229, 305,
-- 457, 439, 532, 605, 348, 348, 348, 410, 440, 554,
-- 987, 306, 434, 306, 533, 228, 228, 228, 555, 572,
-- 316, 435, 316, 306, 349, 306, 229, 210, 229, 211,
--
-- 294, 573, 417, 212, 229, 988, 229, 294, 294, 585,
-- 441, 306, 410, 306, 213, 21, 214, 21, 220, 220,
-- 220, 349, 536, 306, 537, 306, 586, 220, 220, 220,
-- 220, 220, 220, 454, 229, 485, 229, 509, 486, 510,
-- 487, 498, 544, 511, 499, 545, 417, 578, 488, 579,
-- 500, 489, 454, 454, 989, 546, 410, 417, 220, 220,
-- 220, 220, 220, 220, 295, 295, 295, 410, 454, 316,
-- 868, 316, 990, 295, 295, 295, 295, 295, 295, 294,
-- 991, 303, 303, 303, 454, 593, 529, 294, 594, 417,
-- 595, 867, 992, 866, 993, 348, 348, 348, 596, 410,
--
-- 1750, 597, 1750, 655, 295, 295, 295, 295, 295, 295,
-- 302, 302, 302, 305, 306, 994, 306, 995, 672, 303,
-- 304, 303, 304, 303, 303, 996, 305, 997, 601, 306,
-- 1750, 306, 1750, 305, 602, 657, 609, 851, 671, 610,
-- 305, 603, 307, 852, 306, 611, 306, 998, 999, 1000,
-- 303, 304, 303, 304, 303, 303, 316, 305, 530, 306,
-- 1001, 306, 620, 305, 621, 1002, 294, 1003, 622, 307,
-- 309, 309, 309, 294, 294, 417, 1004, 417, 417, 309,
-- 310, 309, 311, 309, 309, 410, 312, 410, 410, 316,
-- 313, 316, 639, 312, 641, 642, 1005, 314, 315, 294,
--
-- 1006, 1007, 312, 1010, 1011, 1012, 294, 294, 1013, 1014,
-- 309, 316, 309, 316, 309, 309, 316, 312, 316, 1015,
-- 306, 1016, 306, 312, 1017, 1018, 294, 1021, 1022, 312,
-- 345, 345, 345, 294, 538, 1023, 316, 1024, 316, 345,
-- 345, 345, 345, 345, 345, 316, 294, 316, 417, 539,
-- 306, 1028, 306, 294, 294, 294, 454, 454, 410, 454,
-- 1031, 1032, 294, 294, 1029, 1033, 1036, 1034, 1037, 1038,
-- 345, 345, 345, 345, 345, 345, 407, 407, 407, 1039,
-- 1030, 316, 564, 316, 1035, 407, 407, 407, 407, 407,
-- 407, 294, 1040, 316, 658, 316, 1026, 737, 294, 294,
--
-- 746, 1041, 1042, 294, 1027, 1043, 1044, 1045, 1025, 1046,
-- 294, 294, 1047, 1048, 1049, 1050, 407, 407, 407, 407,
-- 407, 407, 411, 411, 411, 1051, 1052, 1053, 1054, 1055,
-- 1056, 411, 411, 411, 411, 411, 411, 1057, 1058, 1059,
-- 1060, 1061, 1062, 1063, 1064, 1066, 1067, 1068, 1069, 1070,
-- 1071, 1072, 1073, 1074, 1077, 1075, 1065, 1078, 1079, 1080,
-- 1081, 1082, 411, 411, 411, 411, 411, 411, 415, 415,
-- 415, 1076, 1083, 1084, 1085, 1086, 1087, 415, 416, 415,
-- 417, 415, 415, 1088, 418, 1089, 1090, 1091, 419, 1092,
-- 1093, 418, 1094, 1095, 1096, 1097, 1098, 1099, 1100, 1101,
--
-- 418, 1102, 1104, 1105, 1106, 1107, 1109, 1110, 415, 417,
-- 415, 417, 415, 415, 1111, 418, 1112, 1103, 1113, 1114,
-- 1115, 418, 1108, 1116, 1117, 1118, 1119, 418, 295, 295,
-- 295, 1120, 1121, 1122, 1123, 1124, 1125, 295, 295, 295,
-- 295, 295, 295, 1126, 1127, 1128, 1129, 526, 1130, 526,
-- 1131, 1132, 1133, 1134, 1135, 1136, 1137, 1140, 1141, 1142,
-- 1143, 1144, 1138, 1145, 1146, 1147, 1148, 1149, 295, 295,
-- 295, 295, 295, 295, 1139, 1150, 1151, 526, 1152, 526,
-- 345, 345, 345, 1153, 1154, 1155, 1156, 1157, 1158, 345,
-- 345, 345, 345, 345, 345, 1159, 454, 1162, 454, 566,
--
-- 1163, 566, 454, 1164, 1165, 1166, 1167, 1168, 1169, 1170,
-- 1171, 1172, 1173, 1174, 1175, 1176, 1177, 1178, 1179, 1180,
-- 345, 345, 345, 345, 345, 345, 1181, 1182, 1183, 566,
-- 1184, 566, 407, 407, 407, 1185, 1186, 1187, 1188, 1189,
-- 1190, 407, 407, 407, 407, 407, 407, 1160, 1191, 1161,
-- 1192, 637, 1193, 637, 1194, 1195, 1196, 1197, 1198, 1199,
-- 1200, 1201, 1202, 1203, 1204, 1205, 1206, 1207, 1208, 1209,
-- 1210, 1211, 407, 407, 407, 407, 407, 407, 1212, 1213,
-- 1214, 637, 1215, 637, 411, 411, 411, 1216, 1217, 1218,
-- 1219, 1220, 1221, 411, 411, 411, 411, 411, 411, 1222,
--
-- 1223, 1224, 1225, 638, 1226, 638, 1227, 1228, 1229, 1230,
-- 1231, 1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239, 1240,
-- 1241, 1242, 1243, 1244, 411, 411, 411, 411, 411, 411,
-- 1245, 1246, 1247, 638, 1248, 638, 1008, 1008, 1249, 1008,
-- 1008, 1008, 1250, 1008, 1008, 1008, 1008, 1008, 1251, 1008,
-- 1252, 1253, 1254, 1255, 1256, 1257, 1258, 1008, 1008, 1008,
-- 1008, 1008, 1259, 1260, 454, 454, 1261, 1262, 1263, 1264,
-- 1265, 1266, 1267, 1268, 1269, 1270, 1271, 1272, 1273, 1274,
-- 1275, 1276, 1278, 1279, 1280, 1281, 1277, 1282, 1283, 1284,
-- 1285, 1008, 1286, 1287, 1288, 1289, 1290, 1291, 1292, 1293,
--
-- 1294, 1295, 1296, 1297, 1298, 1299, 1300, 1301, 1302, 1303,
-- 1304, 1305, 1306, 1307, 1008, 1008, 1008, 1019, 1019, 1308,
-- 1019, 1019, 1019, 1309, 1019, 1019, 1019, 1019, 1019, 1310,
-- 1019, 1311, 1312, 1313, 1314, 1315, 1316, 1317, 1019, 1019,
-- 1019, 1019, 1019, 1318, 1319, 1320, 1321, 1322, 1324, 1325,
-- 1326, 1327, 1323, 1328, 1329, 1330, 1331, 1332, 1333, 1334,
-- 1335, 1336, 1337, 1338, 1339, 1340, 1341, 1342, 1343, 1344,
-- 1345, 1346, 1019, 1347, 1348, 1349, 1350, 1351, 1352, 1353,
-- 1354, 1355, 1356, 1357, 1358, 1359, 1363, 1364, 1365, 1366,
-- 1367, 1368, 1369, 1370, 1371, 1019, 1019, 1019, 1008, 1008,
--
-- 1372, 1008, 1008, 1008, 1360, 1008, 1008, 1008, 1008, 1008,
-- 1373, 1008, 1361, 1374, 1375, 1376, 1377, 1362, 1378, 1008,
-- 1008, 1008, 1008, 1008, 1379, 1380, 1381, 1382, 1383, 1384,
-- 1385, 1386, 1387, 1388, 1389, 1390, 1391, 1392, 1393, 1394,
-- 1398, 1395, 1399, 1400, 1401, 1402, 1403, 1404, 1405, 1396,
-- 1406, 1407, 1408, 1008, 1397, 1409, 1410, 1412, 1413, 1414,
-- 1415, 1416, 1417, 1418, 1411, 1419, 1420, 1421, 1422, 1423,
-- 1424, 1425, 1426, 1427, 1430, 1431, 1008, 1008, 1008, 1019,
-- 1019, 1432, 1019, 1019, 1019, 1428, 1019, 1019, 1019, 1019,
-- 1019, 1433, 1019, 1429, 1434, 1435, 1436, 1437, 1438, 1439,
--
-- 1019, 1019, 1019, 1019, 1019, 1440, 1441, 1442, 1443, 1444,
-- 1446, 1447, 1448, 1449, 1450, 1451, 1452, 1445, 1453, 1454,
-- 1455, 1456, 1457, 1458, 1459, 1460, 1461, 1462, 1463, 1464,
-- 1465, 1466, 1467, 1468, 1019, 1469, 1470, 1471, 1472, 1473,
-- 1474, 1475, 1476, 1477, 1478, 1479, 1480, 1481, 1482, 1483,
-- 1484, 1485, 1486, 1487, 1488, 1489, 1490, 1019, 1019, 1019,
-- 1491, 1492, 1493, 1494, 1495, 1496, 1497, 1498, 1499, 1500,
-- 1501, 1502, 1503, 1504, 1505, 1506, 1507, 1508, 1509, 1510,
-- 1511, 1512, 1513, 1514, 1515, 1516, 1517, 1518, 1519, 1520,
-- 1521, 1522, 1523, 1524, 1525, 1526, 1527, 1528, 1529, 1530,
--
-- 1531, 1532, 1533, 1534, 1535, 1536, 1537, 1538, 1539, 1540,
-- 1541, 1542, 1543, 1544, 1545, 1546, 1547, 1548, 1549, 1550,
-- 1551, 1552, 1553, 1554, 1555, 1556, 1557, 1558, 1559, 1560,
-- 1561, 1562, 1563, 1564, 1565, 1566, 1567, 1568, 1569, 1570,
-- 1571, 1572, 1573, 1574, 1575, 1576, 1577, 1578, 1579, 1580,
-- 1581, 1584, 1585, 1586, 1582, 1587, 1588, 1589, 1590, 1591,
-- 1592, 1593, 1596, 1597, 1598, 1594, 1599, 1583, 1600, 1601,
-- 1602, 1605, 1606, 1607, 1603, 1608, 1609, 1610, 1595, 1611,
-- 1612, 1613, 1614, 1615, 1616, 1617, 1618, 1604, 1619, 1620,
-- 1621, 1622, 1623, 1624, 1625, 1626, 1627, 1628, 1629, 1630,
--
-- 1631, 1632, 1633, 1634, 1635, 1636, 1637, 1638, 1639, 1640,
-- 1641, 1642, 1643, 1644, 1645, 1646, 1647, 1648, 1649, 1650,
-- 1651, 1652, 1653, 1654, 1655, 1656, 1657, 1658, 1659, 1660,
-- 1661, 1662, 1663, 1664, 1665, 1666, 1667, 1668, 1669, 1670,
-- 1671, 1672, 1673, 1674, 1675, 1676, 1677, 1678, 1679, 1680,
-- 1681, 1682, 1683, 1684, 1685, 1686, 1687, 1688, 1689, 1690,
-- 1691, 1692, 1693, 1694, 1695, 1696, 1697, 1698, 1699, 1700,
-- 1701, 1702, 1703, 1704, 1705, 1706, 1707, 1708, 1709, 1710,
-- 1711, 1712, 1713, 1714, 1715, 1716, 1717, 1718, 1719, 1720,
-- 1721, 1722, 1723, 1724, 1725, 1726, 1727, 1728, 1729, 1730,
--
-- 1731, 1732, 1733, 1734, 1735, 1736, 1737, 1738, 1739, 1740,
-- 1741, 1742, 1743, 1744, 1745, 1746, 1747, 1748, 1749, 20,
-- 20, 20, 20, 20, 20, 20, 20, 20, 20, 156,
-- 156, 156, 156, 156, 156, 156, 156, 156, 156, 21,
-- 21, 21, 21, 21, 21, 21, 21, 21, 21, 205,
-- 205, 205, 205, 205, 205, 205, 205, 205, 205, 209,
-- 209, 209, 209, 209, 209, 209, 209, 209, 209, 216,
-- 216, 216, 216, 216, 216, 216, 216, 218, 218, 218,
-- 218, 218, 218, 218, 218, 218, 218, 294, 294, 528,
-- 294, 294, 294, 294, 344, 344, 344, 344, 344, 344,
--
-- 344, 406, 972, 971, 970, 406, 406, 406, 408, 408,
-- 408, 408, 408, 408, 408, 408, 408, 408, 410, 410,
-- 969, 410, 410, 410, 410, 412, 968, 412, 412, 412,
-- 412, 412, 412, 412, 412, 414, 967, 414, 414, 414,
-- 414, 414, 414, 414, 414, 451, 966, 451, 451, 451,
-- 451, 451, 451, 451, 451, 452, 965, 452, 453, 453,
-- 964, 963, 453, 453, 962, 453, 527, 527, 961, 527,
-- 527, 527, 527, 567, 567, 567, 567, 567, 567, 567,
-- 1009, 960, 1009, 1009, 1009, 1009, 1009, 1009, 1009, 1009,
-- 1020, 959, 1020, 1020, 1020, 1020, 1020, 1020, 1020, 1020,
--
-- 1008, 958, 1008, 1008, 1008, 1008, 1008, 1008, 1008, 1008,
-- 1019, 957, 1019, 1019, 1019, 1019, 1019, 1019, 1019, 1019,
-- 956, 955, 954, 953, 952, 951, 950, 949, 948, 947,
-- 946, 945, 944, 943, 942, 941, 940, 939, 938, 937,
-- 936, 935, 934, 933, 932, 931, 930, 929, 928, 927,
-- 926, 925, 924, 923, 922, 921, 920, 919, 918, 917,
-- 916, 915, 914, 913, 912, 911, 910, 909, 908, 907,
-- 906, 905, 904, 903, 902, 901, 900, 899, 898, 897,
-- 896, 895, 894, 893, 892, 891, 890, 889, 888, 887,
-- 886, 885, 884, 883, 882, 881, 880, 879, 878, 877,
--
-- 876, 875, 874, 873, 872, 871, 870, 869, 865, 864,
-- 863, 862, 861, 860, 859, 858, 857, 856, 855, 854,
-- 853, 850, 849, 848, 847, 846, 845, 844, 843, 842,
-- 841, 840, 839, 838, 837, 834, 833, 832, 831, 830,
-- 829, 828, 827, 826, 825, 824, 823, 822, 821, 820,
-- 819, 818, 817, 816, 815, 814, 813, 812, 811, 810,
-- 809, 808, 807, 806, 805, 804, 803, 802, 801, 800,
-- 799, 798, 797, 796, 795, 794, 793, 792, 791, 790,
-- 789, 788, 787, 786, 785, 784, 783, 782, 781, 780,
-- 779, 778, 777, 776, 775, 774, 773, 772, 771, 770,
--
-- 769, 768, 767, 766, 765, 764, 763, 762, 761, 760,
-- 759, 758, 757, 756, 755, 754, 753, 752, 751, 750,
-- 749, 748, 747, 745, 744, 743, 742, 741, 740, 739,
-- 738, 736, 735, 734, 733, 732, 731, 730, 729, 728,
-- 727, 726, 725, 724, 723, 722, 721, 720, 719, 718,
-- 717, 716, 715, 714, 713, 712, 711, 710, 709, 708,
-- 707, 706, 705, 704, 703, 702, 701, 700, 699, 698,
-- 697, 696, 695, 694, 693, 692, 691, 690, 689, 688,
-- 687, 686, 685, 684, 683, 682, 681, 680, 679, 678,
-- 677, 676, 675, 674, 453, 454, 450, 670, 669, 668,
--
-- 667, 666, 665, 664, 663, 662, 661, 660, 659, 656,
-- 654, 653, 652, 651, 650, 649, 648, 647, 646, 645,
-- 644, 643, 640, 409, 636, 635, 634, 633, 632, 631,
-- 630, 629, 628, 627, 626, 625, 624, 623, 619, 618,
-- 617, 616, 615, 614, 613, 612, 608, 607, 606, 600,
-- 599, 598, 592, 591, 590, 589, 588, 587, 584, 583,
-- 582, 581, 580, 577, 576, 575, 574, 571, 570, 569,
-- 568, 565, 563, 562, 561, 560, 559, 558, 557, 556,
-- 553, 552, 551, 548, 547, 543, 542, 541, 540, 535,
-- 534, 531, 525, 524, 523, 522, 521, 520, 519, 518,
--
-- 517, 516, 515, 514, 513, 512, 508, 507, 506, 505,
-- 504, 503, 502, 501, 497, 496, 495, 492, 491, 490,
-- 484, 483, 482, 481, 480, 479, 476, 475, 474, 473,
-- 472, 469, 468, 467, 466, 463, 462, 461, 460, 459,
-- 458, 219, 215, 454, 300, 450, 449, 446, 445, 444,
-- 433, 430, 429, 428, 308, 301, 298, 297, 413, 409,
-- 293, 405, 404, 403, 402, 401, 400, 390, 389, 374,
-- 373, 370, 343, 337, 327, 326, 325, 324, 308, 297,
-- 296, 219, 293, 215, 290, 289, 288, 287, 286, 285,
-- 275, 274, 260, 259, 256, 233, 225, 224, 223, 219,
--
-- 217, 215, 1750, 19, 1750, 1750, 1750, 1750, 1750, 1750,
-- 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750,
-- 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750,
-- 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750,
-- 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750,
-- 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750,
-- 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750,
-- 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750,
-- 1750, 1750, 1750, 1750, 1750, 1750
-- } ;
--
--static yyconst flex_int16_t yy_chk[2787] =
-- { 0,
-- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
-- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
-- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
-- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
-- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
-- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
-- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
-- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
-- 3, 3, 5, 5, 5, 5, 5, 5, 5, 5,
-- 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
--
-- 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
-- 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
-- 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
-- 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
-- 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
-- 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
-- 5, 5, 5, 5, 7, 7, 7, 7, 7, 7,
-- 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-- 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-- 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
--
-- 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-- 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-- 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-- 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
-- 7, 7, 7, 7, 7, 7, 9, 9, 9, 9,
-- 9, 9, 9, 9, 9, 9, 9, 9, 9, 9,
-- 9, 36, 72, 9, 9, 9, 9, 9, 9, 9,
-- 9, 9, 28, 36, 41, 41, 13, 13, 14, 14,
-- 13, 801, 14, 43, 43, 46, 45, 28, 45, 46,
-- 45, 13, 46, 14, 47, 48, 45, 47, 9, 48,
--
-- 9, 9, 49, 45, 45, 46, 52, 57, 50, 52,
-- 59, 50, 49, 48, 50, 56, 91, 57, 72, 56,
-- 59, 87, 94, 94, 9, 9, 9, 10, 10, 10,
-- 10, 10, 10, 10, 10, 10, 10, 10, 10, 10,
-- 10, 10, 802, 91, 10, 10, 10, 10, 10, 10,
-- 10, 10, 10, 13, 58, 14, 55, 55, 58, 81,
-- 62, 58, 58, 62, 62, 87, 89, 55, 96, 96,
-- 62, 62, 62, 803, 81, 62, 62, 108, 89, 10,
-- 62, 10, 10, 99, 109, 99, 100, 108, 100, 180,
-- 99, 329, 109, 99, 111, 180, 100, 329, 111, 100,
--
-- 99, 99, 111, 100, 100, 10, 10, 10, 11, 11,
-- 11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
-- 11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
-- 11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
-- 11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
-- 11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
-- 11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
-- 11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
-- 11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
-- 15, 15, 15, 15, 15, 15, 804, 15, 15, 15,
--
-- 15, 15, 15, 15, 15, 119, 15, 15, 15, 15,
-- 15, 15, 15, 15, 15, 15, 38, 38, 38, 110,
-- 101, 101, 123, 101, 101, 130, 132, 640, 130, 110,
-- 102, 101, 102, 640, 184, 38, 132, 38, 101, 101,
-- 102, 125, 15, 15, 15, 15, 113, 102, 102, 184,
-- 113, 135, 102, 125, 135, 139, 210, 113, 806, 139,
-- 131, 119, 113, 139, 131, 38, 123, 38, 15, 15,
-- 15, 15, 16, 16, 16, 16, 16, 16, 131, 16,
-- 16, 16, 16, 16, 16, 16, 16, 169, 16, 16,
-- 16, 16, 16, 16, 16, 16, 16, 16, 37, 37,
--
-- 37, 133, 129, 103, 133, 103, 129, 133, 140, 129,
-- 193, 240, 210, 103, 169, 193, 808, 37, 140, 37,
-- 103, 103, 129, 240, 16, 16, 16, 16, 138, 138,
-- 37, 197, 142, 141, 175, 175, 177, 141, 189, 138,
-- 141, 141, 142, 252, 197, 175, 177, 37, 189, 37,
-- 16, 16, 16, 16, 17, 17, 17, 37, 17, 17,
-- 252, 17, 17, 17, 17, 809, 17, 17, 189, 457,
-- 17, 17, 17, 17, 17, 17, 17, 17, 17, 116,
-- 179, 116, 128, 211, 128, 246, 128, 246, 190, 116,
-- 179, 145, 128, 179, 145, 145, 116, 116, 190, 128,
--
-- 128, 145, 145, 145, 178, 810, 145, 145, 457, 263,
-- 116, 145, 176, 176, 178, 17, 178, 17, 190, 176,
-- 212, 17, 263, 176, 811, 190, 178, 812, 813, 191,
-- 211, 814, 17, 17, 17, 17, 18, 18, 18, 191,
-- 18, 18, 302, 18, 18, 18, 18, 815, 18, 18,
-- 816, 188, 18, 18, 18, 18, 18, 18, 18, 18,
-- 18, 188, 126, 126, 126, 378, 220, 192, 220, 302,
-- 212, 191, 314, 378, 127, 127, 127, 192, 191, 333,
-- 818, 126, 188, 126, 314, 228, 228, 228, 333, 354,
-- 309, 188, 309, 127, 126, 127, 220, 18, 220, 18,
--
-- 309, 354, 415, 18, 228, 819, 228, 309, 309, 366,
-- 192, 126, 415, 126, 18, 18, 18, 18, 26, 26,
-- 26, 126, 319, 127, 319, 127, 366, 26, 26, 26,
-- 26, 26, 26, 673, 228, 259, 228, 276, 259, 276,
-- 259, 267, 326, 276, 267, 326, 417, 360, 259, 360,
-- 267, 259, 671, 672, 820, 326, 417, 434, 26, 26,
-- 26, 26, 26, 26, 79, 79, 79, 434, 456, 310,
-- 673, 310, 821, 79, 79, 79, 79, 79, 79, 310,
-- 822, 303, 303, 303, 455, 373, 310, 310, 373, 436,
-- 373, 672, 823, 671, 824, 348, 348, 348, 373, 436,
--
-- 303, 373, 303, 434, 79, 79, 79, 79, 79, 79,
-- 90, 90, 90, 303, 348, 825, 348, 826, 456, 90,
-- 90, 90, 90, 90, 90, 827, 90, 828, 377, 90,
-- 303, 90, 303, 90, 377, 436, 382, 656, 455, 382,
-- 303, 377, 90, 656, 348, 382, 348, 829, 830, 831,
-- 90, 90, 90, 90, 90, 90, 311, 90, 311, 90,
-- 832, 90, 391, 90, 391, 833, 311, 834, 391, 90,
-- 98, 98, 98, 311, 311, 416, 835, 420, 421, 98,
-- 98, 98, 98, 98, 98, 416, 98, 420, 421, 316,
-- 98, 316, 416, 98, 420, 421, 836, 98, 98, 316,
--
-- 840, 841, 98, 845, 846, 848, 316, 316, 849, 850,
-- 98, 98, 98, 98, 98, 98, 320, 98, 320, 851,
-- 528, 852, 528, 98, 856, 857, 320, 861, 862, 98,
-- 122, 122, 122, 320, 320, 864, 342, 865, 342, 122,
-- 122, 122, 122, 122, 122, 321, 342, 321, 437, 321,
-- 528, 869, 528, 342, 342, 321, 866, 868, 437, 867,
-- 872, 873, 321, 321, 871, 874, 877, 876, 878, 879,
-- 122, 122, 122, 122, 122, 122, 153, 153, 153, 882,
-- 871, 530, 342, 530, 876, 153, 153, 153, 153, 153,
-- 153, 530, 883, 539, 437, 539, 867, 530, 530, 530,
--
-- 539, 885, 887, 539, 868, 888, 889, 890, 866, 891,
-- 539, 539, 892, 893, 894, 895, 153, 153, 153, 153,
-- 153, 153, 161, 161, 161, 896, 897, 898, 899, 900,
-- 901, 161, 161, 161, 161, 161, 161, 902, 904, 905,
-- 906, 907, 908, 910, 911, 912, 914, 915, 916, 917,
-- 918, 919, 920, 921, 923, 922, 911, 924, 926, 927,
-- 928, 930, 161, 161, 161, 161, 161, 161, 174, 174,
-- 174, 922, 932, 933, 934, 935, 936, 174, 174, 174,
-- 174, 174, 174, 937, 174, 938, 939, 940, 174, 941,
-- 942, 174, 943, 944, 945, 946, 947, 948, 949, 950,
--
-- 174, 952, 953, 954, 955, 957, 958, 959, 174, 174,
-- 174, 174, 174, 174, 960, 174, 963, 952, 964, 966,
-- 968, 174, 957, 969, 970, 971, 972, 174, 295, 295,
-- 295, 973, 974, 975, 976, 977, 978, 295, 295, 295,
-- 295, 295, 295, 979, 980, 981, 982, 295, 983, 295,
-- 984, 986, 987, 988, 989, 990, 992, 994, 996, 997,
-- 998, 999, 993, 1000, 1001, 1002, 1003, 1005, 295, 295,
-- 295, 295, 295, 295, 993, 1006, 1007, 295, 1011, 295,
-- 345, 345, 345, 1013, 1014, 1016, 1017, 1018, 1022, 345,
-- 345, 345, 345, 345, 345, 1024, 1027, 1028, 1025, 345,
--
-- 1029, 345, 1026, 1030, 1032, 1034, 1035, 1036, 1037, 1038,
-- 1039, 1041, 1043, 1044, 1045, 1047, 1049, 1051, 1052, 1054,
-- 345, 345, 345, 345, 345, 345, 1056, 1057, 1058, 345,
-- 1059, 345, 407, 407, 407, 1060, 1061, 1062, 1063, 1064,
-- 1065, 407, 407, 407, 407, 407, 407, 1025, 1066, 1026,
-- 1067, 407, 1068, 407, 1071, 1072, 1073, 1074, 1075, 1076,
-- 1078, 1079, 1080, 1081, 1082, 1084, 1085, 1087, 1088, 1089,
-- 1091, 1093, 407, 407, 407, 407, 407, 407, 1094, 1095,
-- 1096, 407, 1097, 407, 411, 411, 411, 1098, 1099, 1100,
-- 1101, 1102, 1103, 411, 411, 411, 411, 411, 411, 1105,
--
-- 1107, 1108, 1109, 411, 1110, 411, 1111, 1112, 1114, 1116,
-- 1117, 1118, 1120, 1122, 1123, 1125, 1126, 1128, 1130, 1131,
-- 1132, 1133, 1134, 1135, 411, 411, 411, 411, 411, 411,
-- 1136, 1137, 1138, 411, 1139, 411, 842, 842, 1140, 842,
-- 842, 842, 1141, 842, 842, 842, 842, 842, 1142, 842,
-- 1145, 1146, 1147, 1148, 1149, 1153, 1154, 842, 842, 842,
-- 842, 842, 1155, 1159, 1160, 1161, 1162, 1164, 1165, 1166,
-- 1167, 1168, 1169, 1171, 1172, 1174, 1175, 1176, 1177, 1178,
-- 1180, 1181, 1183, 1184, 1185, 1186, 1181, 1187, 1188, 1189,
-- 1190, 842, 1193, 1195, 1196, 1197, 1199, 1200, 1201, 1202,
--
-- 1204, 1206, 1207, 1208, 1209, 1210, 1212, 1213, 1214, 1216,
-- 1217, 1218, 1219, 1221, 842, 842, 842, 858, 858, 1222,
-- 858, 858, 858, 1223, 858, 858, 858, 858, 858, 1224,
-- 858, 1225, 1226, 1228, 1229, 1231, 1232, 1233, 858, 858,
-- 858, 858, 858, 1234, 1235, 1236, 1238, 1239, 1241, 1242,
-- 1243, 1244, 1239, 1245, 1246, 1247, 1248, 1251, 1253, 1254,
-- 1255, 1256, 1257, 1258, 1259, 1260, 1262, 1263, 1265, 1266,
-- 1267, 1268, 858, 1269, 1270, 1271, 1272, 1274, 1275, 1276,
-- 1277, 1278, 1279, 1280, 1282, 1283, 1285, 1288, 1290, 1291,
-- 1293, 1294, 1295, 1298, 1299, 858, 858, 858, 1009, 1009,
--
-- 1300, 1009, 1009, 1009, 1284, 1009, 1009, 1009, 1009, 1009,
-- 1301, 1009, 1284, 1302, 1305, 1307, 1308, 1284, 1310, 1009,
-- 1009, 1009, 1009, 1009, 1311, 1312, 1313, 1314, 1315, 1316,
-- 1317, 1320, 1321, 1322, 1323, 1324, 1325, 1326, 1328, 1329,
-- 1331, 1330, 1334, 1341, 1343, 1344, 1345, 1346, 1347, 1330,
-- 1348, 1349, 1350, 1009, 1330, 1351, 1352, 1353, 1354, 1355,
-- 1356, 1357, 1358, 1359, 1352, 1360, 1361, 1362, 1364, 1365,
-- 1367, 1368, 1369, 1370, 1372, 1373, 1009, 1009, 1009, 1020,
-- 1020, 1374, 1020, 1020, 1020, 1371, 1020, 1020, 1020, 1020,
-- 1020, 1375, 1020, 1371, 1376, 1378, 1379, 1380, 1381, 1382,
--
-- 1020, 1020, 1020, 1020, 1020, 1383, 1384, 1385, 1386, 1387,
-- 1388, 1389, 1390, 1391, 1392, 1393, 1394, 1387, 1395, 1396,
-- 1397, 1399, 1400, 1401, 1402, 1403, 1404, 1405, 1406, 1407,
-- 1409, 1412, 1413, 1414, 1020, 1415, 1417, 1418, 1419, 1420,
-- 1421, 1422, 1423, 1424, 1425, 1426, 1427, 1430, 1431, 1432,
-- 1433, 1434, 1435, 1436, 1437, 1438, 1439, 1020, 1020, 1020,
-- 1440, 1441, 1443, 1446, 1447, 1448, 1449, 1451, 1452, 1453,
-- 1454, 1455, 1456, 1457, 1458, 1459, 1460, 1461, 1462, 1463,
-- 1464, 1467, 1468, 1469, 1470, 1471, 1472, 1473, 1474, 1475,
-- 1476, 1477, 1478, 1479, 1481, 1482, 1483, 1484, 1485, 1486,
--
-- 1487, 1488, 1489, 1490, 1491, 1492, 1495, 1496, 1497, 1498,
-- 1499, 1500, 1501, 1502, 1503, 1504, 1506, 1507, 1509, 1510,
-- 1511, 1512, 1513, 1515, 1516, 1517, 1518, 1520, 1521, 1522,
-- 1524, 1525, 1526, 1527, 1528, 1529, 1531, 1532, 1534, 1535,
-- 1536, 1537, 1538, 1540, 1541, 1542, 1543, 1545, 1546, 1547,
-- 1548, 1549, 1550, 1551, 1548, 1553, 1555, 1556, 1557, 1558,
-- 1559, 1560, 1561, 1562, 1564, 1560, 1565, 1548, 1566, 1567,
-- 1568, 1569, 1570, 1571, 1568, 1573, 1575, 1576, 1560, 1577,
-- 1578, 1579, 1580, 1581, 1582, 1583, 1584, 1568, 1585, 1586,
-- 1589, 1590, 1592, 1593, 1594, 1595, 1596, 1600, 1601, 1602,
--
-- 1603, 1604, 1605, 1606, 1607, 1610, 1611, 1613, 1614, 1615,
-- 1616, 1617, 1618, 1619, 1620, 1621, 1622, 1623, 1624, 1625,
-- 1626, 1627, 1628, 1629, 1630, 1631, 1632, 1633, 1634, 1635,
-- 1636, 1637, 1639, 1640, 1642, 1643, 1644, 1645, 1646, 1647,
-- 1649, 1651, 1652, 1654, 1655, 1657, 1658, 1659, 1660, 1661,
-- 1662, 1663, 1664, 1665, 1666, 1667, 1668, 1670, 1671, 1672,
-- 1673, 1674, 1675, 1676, 1677, 1678, 1679, 1681, 1682, 1684,
-- 1685, 1686, 1687, 1688, 1690, 1691, 1692, 1694, 1695, 1696,
-- 1697, 1698, 1699, 1700, 1701, 1702, 1704, 1705, 1707, 1708,
-- 1709, 1710, 1712, 1713, 1714, 1715, 1716, 1717, 1718, 1719,
--
-- 1720, 1721, 1722, 1723, 1725, 1726, 1727, 1729, 1731, 1732,
-- 1733, 1736, 1737, 1740, 1741, 1743, 1745, 1746, 1747, 1751,
-- 1751, 1751, 1751, 1751, 1751, 1751, 1751, 1751, 1751, 1752,
-- 1752, 1752, 1752, 1752, 1752, 1752, 1752, 1752, 1752, 1753,
-- 1753, 1753, 1753, 1753, 1753, 1753, 1753, 1753, 1753, 1754,
-- 1754, 1754, 1754, 1754, 1754, 1754, 1754, 1754, 1754, 1755,
-- 1755, 1755, 1755, 1755, 1755, 1755, 1755, 1755, 1755, 1756,
-- 1756, 1756, 1756, 1756, 1756, 1756, 1756, 1757, 1757, 1757,
-- 1757, 1757, 1757, 1757, 1757, 1757, 1757, 1758, 1758, 1769,
-- 1758, 1758, 1758, 1758, 1759, 1759, 1759, 1759, 1759, 1759,
--
-- 1759, 1760, 799, 798, 797, 1760, 1760, 1760, 1761, 1761,
-- 1761, 1761, 1761, 1761, 1761, 1761, 1761, 1761, 1762, 1762,
-- 795, 1762, 1762, 1762, 1762, 1763, 794, 1763, 1763, 1763,
-- 1763, 1763, 1763, 1763, 1763, 1764, 793, 1764, 1764, 1764,
-- 1764, 1764, 1764, 1764, 1764, 1765, 792, 1765, 1765, 1765,
-- 1765, 1765, 1765, 1765, 1765, 1766, 791, 1766, 1767, 1767,
-- 789, 788, 1767, 1767, 787, 1767, 1768, 1768, 786, 1768,
-- 1768, 1768, 1768, 1770, 1770, 1770, 1770, 1770, 1770, 1770,
-- 1771, 785, 1771, 1771, 1771, 1771, 1771, 1771, 1771, 1771,
-- 1772, 784, 1772, 1772, 1772, 1772, 1772, 1772, 1772, 1772,
--
-- 1773, 783, 1773, 1773, 1773, 1773, 1773, 1773, 1773, 1773,
-- 1774, 781, 1774, 1774, 1774, 1774, 1774, 1774, 1774, 1774,
-- 779, 777, 776, 775, 774, 773, 771, 770, 769, 768,
-- 767, 766, 765, 764, 763, 762, 761, 760, 759, 757,
-- 756, 755, 753, 751, 750, 749, 748, 747, 746, 745,
-- 743, 742, 740, 739, 738, 736, 735, 734, 733, 732,
-- 731, 730, 729, 728, 727, 726, 725, 724, 723, 722,
-- 721, 720, 718, 717, 716, 715, 714, 713, 712, 711,
-- 710, 708, 706, 705, 704, 702, 701, 700, 698, 697,
-- 696, 695, 694, 692, 691, 690, 689, 688, 687, 686,
--
-- 684, 682, 680, 679, 678, 677, 676, 674, 670, 669,
-- 668, 667, 666, 665, 664, 663, 662, 661, 659, 658,
-- 657, 655, 654, 653, 652, 651, 650, 649, 648, 647,
-- 646, 645, 643, 642, 641, 639, 636, 633, 632, 631,
-- 630, 629, 628, 627, 626, 625, 624, 623, 622, 621,
-- 620, 619, 618, 617, 616, 615, 614, 613, 612, 611,
-- 610, 609, 608, 606, 603, 602, 601, 600, 599, 598,
-- 597, 596, 595, 594, 593, 591, 590, 589, 588, 587,
-- 586, 585, 584, 583, 582, 581, 580, 579, 578, 577,
-- 576, 575, 574, 573, 572, 571, 570, 569, 568, 565,
--
-- 564, 563, 562, 561, 560, 559, 558, 557, 556, 555,
-- 554, 553, 550, 549, 548, 547, 546, 545, 544, 543,
-- 542, 541, 540, 538, 537, 536, 535, 534, 533, 532,
-- 531, 529, 525, 522, 521, 520, 519, 518, 517, 516,
-- 515, 514, 513, 512, 511, 510, 509, 508, 507, 506,
-- 505, 504, 503, 502, 501, 500, 499, 498, 497, 496,
-- 494, 493, 492, 491, 490, 489, 488, 487, 486, 485,
-- 483, 482, 481, 480, 479, 478, 477, 476, 475, 474,
-- 473, 472, 471, 470, 469, 468, 467, 466, 465, 464,
-- 463, 462, 461, 460, 454, 453, 450, 449, 448, 447,
--
-- 446, 445, 444, 443, 442, 441, 440, 439, 438, 435,
-- 433, 432, 431, 430, 429, 428, 427, 426, 425, 424,
-- 423, 422, 419, 408, 405, 404, 403, 402, 401, 400,
-- 399, 398, 397, 396, 395, 394, 393, 392, 390, 389,
-- 388, 387, 386, 385, 384, 383, 381, 380, 379, 376,
-- 375, 374, 372, 371, 370, 369, 368, 367, 365, 364,
-- 363, 362, 361, 359, 358, 357, 356, 353, 352, 351,
-- 350, 343, 341, 340, 339, 338, 337, 336, 335, 334,
-- 332, 331, 330, 328, 327, 325, 324, 323, 322, 318,
-- 317, 313, 290, 289, 288, 287, 286, 285, 284, 283,
--
-- 282, 281, 280, 279, 278, 277, 275, 274, 273, 272,
-- 271, 270, 269, 268, 266, 265, 264, 262, 261, 260,
-- 258, 257, 256, 255, 254, 253, 251, 250, 249, 248,
-- 247, 245, 244, 243, 242, 239, 238, 237, 236, 235,
-- 231, 218, 215, 209, 203, 200, 198, 196, 195, 194,
-- 185, 183, 182, 181, 172, 167, 165, 163, 162, 160,
-- 159, 151, 150, 149, 148, 147, 146, 144, 143, 137,
-- 136, 134, 117, 112, 107, 106, 105, 104, 95, 85,
-- 84, 78, 77, 76, 70, 69, 68, 67, 64, 63,
-- 61, 60, 54, 53, 51, 42, 34, 32, 31, 25,
--
-- 24, 22, 19, 1750, 1750, 1750, 1750, 1750, 1750, 1750,
-- 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750,
-- 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750,
-- 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750,
-- 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750,
-- 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750,
-- 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750,
-- 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750, 1750,
-- 1750, 1750, 1750, 1750, 1750, 1750
-- } ;
--
--static yy_state_type yy_last_accepting_state;
--static char *yy_last_accepting_cpos;
--
--extern int yy_flex_debug;
--int yy_flex_debug = 0;
--
--/* The intent behind this definition is that it'll catch
-- * any uses of REJECT which flex missed.
-- */
--#define REJECT reject_used_but_not_detected
--#define yymore() yymore_used_but_not_detected
--#define YY_MORE_ADJ 0
--#define YY_RESTORE_YY_MORE_OFFSET
--char *yytext;
--#line 1 "ldlex.l"
--#line 4 "ldlex.l"
--
--/* Copyright 1991-2013 Free Software Foundation, Inc.
-- Written by Steve Chamberlain of Cygnus Support.
--
-- This file is part of the GNU Binutils.
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-- MA 02110-1301, USA. */
--
--#include "bfd.h"
--#include "safe-ctype.h"
--#include "bfdlink.h"
--#include "ld.h"
--#include "ldmisc.h"
--#include "ldexp.h"
--#include "ldlang.h"
--#include <ldgram.h>
--#include "ldfile.h"
--#include "ldlex.h"
--#include "ldmain.h"
--#include "libiberty.h"
--
--/* The type of top-level parser input.
-- yylex and yyparse (indirectly) both check this. */
--input_type parser_input;
--
--/* Line number in the current input file.
-- (FIXME Actually, it doesn't appear to get reset for each file?) */
--unsigned int lineno = 1;
--
--/* The string we are currently lexing, or NULL if we are reading a
-- file. */
--const char *lex_string = NULL;
--
--/* Support for flex reading from more than one input file (stream).
-- `include_stack' is flex's input state for each open file;
-- `file_name_stack' is the file names. `lineno_stack' is the current
-- line numbers.
--
-- If `include_stack_ptr' is 0, we haven't started reading anything yet.
-- Otherwise, stack elements 0 through `include_stack_ptr - 1' are valid. */
--
--#undef YY_INPUT
--#define YY_INPUT(buf,result,max_size) result = yy_input (buf, max_size)
--
--#ifndef YY_NO_UNPUT
--#define YY_NO_UNPUT
--#endif
--
--#define MAX_INCLUDE_DEPTH 10
--static YY_BUFFER_STATE include_stack[MAX_INCLUDE_DEPTH];
--static const char *file_name_stack[MAX_INCLUDE_DEPTH];
--static unsigned int lineno_stack[MAX_INCLUDE_DEPTH];
--static unsigned int sysrooted_stack[MAX_INCLUDE_DEPTH];
--static unsigned int include_stack_ptr = 0;
--static int vers_node_nesting = 0;
--
--static int yy_input (char *, int);
--static void comment (void);
--static void lex_warn_invalid (char *where, char *what);
--
--/* STATES
-- EXPRESSION definitely in an expression
-- SCRIPT definitely in a script
-- BOTH either EXPRESSION or SCRIPT
-- DEFSYMEXP in an argument to -defsym
-- MRI in an MRI script
-- VERS_START starting a Sun style mapfile
-- VERS_SCRIPT a Sun style mapfile
-- VERS_NODE a node within a Sun style mapfile
--*/
--#define RTOKEN(x) { yylval.token = x; return x; }
--
--/* Some versions of flex want this. */
--#ifndef yywrap
--int yywrap (void) { return 1; }
--#endif
--
--
--
--
--
--
--
--
--#line 1745 "ldlex.c"
--
--#define INITIAL 0
--#define SCRIPT 1
--#define EXPRESSION 2
--#define BOTH 3
--#define DEFSYMEXP 4
--#define MRI 5
--#define VERS_START 6
--#define VERS_SCRIPT 7
--#define VERS_NODE 8
--
--#ifndef YY_NO_UNISTD_H
--/* Special case for "unistd.h", since it is non-ANSI. We include it way
-- * down here because we want the user's section 1 to have been scanned first.
-- * The user has a chance to override it with an option.
-- */
--#include <unistd.h>
--#endif
--
--#ifndef YY_EXTRA_TYPE
--#define YY_EXTRA_TYPE void *
--#endif
--
--static int yy_init_globals (void );
--
--/* Accessor methods to globals.
-- These are made visible to non-reentrant scanners for convenience. */
--
--int yylex_destroy (void );
--
--int yyget_debug (void );
--
--void yyset_debug (int debug_flag );
--
--YY_EXTRA_TYPE yyget_extra (void );
--
--void yyset_extra (YY_EXTRA_TYPE user_defined );
--
--FILE *yyget_in (void );
--
--void yyset_in (FILE * in_str );
--
--FILE *yyget_out (void );
--
--void yyset_out (FILE * out_str );
--
--yy_size_t yyget_leng (void );
--
--char *yyget_text (void );
--
--int yyget_lineno (void );
--
--void yyset_lineno (int line_number );
--
--/* Macros after this point can all be overridden by user definitions in
-- * section 1.
-- */
--
--#ifndef YY_SKIP_YYWRAP
--#ifdef __cplusplus
--extern "C" int yywrap (void );
--#else
--extern int yywrap (void );
--#endif
--#endif
--
--#ifndef yytext_ptr
--static void yy_flex_strncpy (char *,yyconst char *,int );
--#endif
--
--#ifdef YY_NEED_STRLEN
--static int yy_flex_strlen (yyconst char * );
--#endif
--
--#ifndef YY_NO_INPUT
--
--#ifdef __cplusplus
--static int yyinput (void );
--#else
--static int input (void );
--#endif
--
--#endif
--
--/* Amount of stuff to slurp up with each read. */
--#ifndef YY_READ_BUF_SIZE
--#define YY_READ_BUF_SIZE 8192
--#endif
--
--/* Copy whatever the last rule matched to the standard output. */
--#ifndef ECHO
--/* This used to be an fputs(), but since the string might contain NUL's,
-- * we now use fwrite().
-- */
--#define ECHO fwrite( yytext, yyleng, 1, yyout )
--#endif
--
--/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL,
-- * is returned in "result".
-- */
--#ifndef YY_INPUT
--#define YY_INPUT(buf,result,max_size) \
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \
-- { \
-- int c = '*'; \
-- yy_size_t n; \
-- for ( n = 0; n < max_size && \
-- (c = getc( yyin )) != EOF && c != '\n'; ++n ) \
-- buf[n] = (char) c; \
-- if ( c == '\n' ) \
-- buf[n++] = (char) c; \
-- if ( c == EOF && ferror( yyin ) ) \
-- YY_FATAL_ERROR( "input in flex scanner failed" ); \
-- result = n; \
-- } \
-- else \
-- { \
-- errno=0; \
-- while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \
-- { \
-- if( errno != EINTR) \
-- { \
-- YY_FATAL_ERROR( "input in flex scanner failed" ); \
-- break; \
-- } \
-- errno=0; \
-- clearerr(yyin); \
-- } \
-- }\
--\
--
--#endif
--
--/* No semi-colon after return; correct usage is to write "yyterminate();" -
-- * we don't want an extra ';' after the "return" because that will cause
-- * some compilers to complain about unreachable statements.
-- */
--#ifndef yyterminate
--#define yyterminate() return YY_NULL
--#endif
--
--/* Number of entries by which start-condition stack grows. */
--#ifndef YY_START_STACK_INCR
--#define YY_START_STACK_INCR 25
--#endif
--
--/* Report a fatal error. */
--#ifndef YY_FATAL_ERROR
--#define YY_FATAL_ERROR(msg) yy_fatal_error( msg )
--#endif
--
--/* end tables serialization structures and prototypes */
--
--/* Default declaration of generated scanner - a define so the user can
-- * easily add parameters.
-- */
--#ifndef YY_DECL
--#define YY_DECL_IS_OURS 1
--
--extern int yylex (void);
--
--#define YY_DECL int yylex (void)
--#endif /* !YY_DECL */
--
--/* Code executed at the beginning of each rule, after yytext and yyleng
-- * have been set up.
-- */
--#ifndef YY_USER_ACTION
--#define YY_USER_ACTION
--#endif
--
--/* Code executed at the end of each rule. */
--#ifndef YY_BREAK
--#define YY_BREAK break;
--#endif
--
--#define YY_RULE_SETUP \
-- YY_USER_ACTION
--
--/** The main scanner function which does all the work.
-- */
--YY_DECL
--{
-- register yy_state_type yy_current_state;
-- register char *yy_cp, *yy_bp;
-- register int yy_act;
--
--#line 119 "ldlex.l"
--
--
-- if (parser_input != input_selected)
-- {
-- /* The first token of the input determines the initial parser state. */
-- input_type t = parser_input;
-- parser_input = input_selected;
-- switch (t)
-- {
-- case input_script: return INPUT_SCRIPT; break;
-- case input_mri_script: return INPUT_MRI_SCRIPT; break;
-- case input_version_script: return INPUT_VERSION_SCRIPT; break;
-- case input_dynamic_list: return INPUT_DYNAMIC_LIST; break;
-- case input_defsym: return INPUT_DEFSYM; break;
-- default: abort ();
-- }
-- }
--
--#line 1952 "ldlex.c"
--
-- if ( !(yy_init) )
-- {
-- (yy_init) = 1;
--
--#ifdef YY_USER_INIT
-- YY_USER_INIT;
--#endif
--
-- if ( ! (yy_start) )
-- (yy_start) = 1; /* first start state */
--
-- if ( ! yyin )
-- yyin = stdin;
--
-- if ( ! yyout )
-- yyout = stdout;
--
-- if ( ! YY_CURRENT_BUFFER ) {
-- yyensure_buffer_stack ();
-- YY_CURRENT_BUFFER_LVALUE =
-- yy_create_buffer(yyin,YY_BUF_SIZE );
-- }
--
-- yy_load_buffer_state( );
-- }
--
-- while ( 1 ) /* loops until end-of-file is reached */
-- {
-- yy_cp = (yy_c_buf_p);
--
-- /* Support of yytext. */
-- *yy_cp = (yy_hold_char);
--
-- /* yy_bp points to the position in yy_ch_buf of the start of
-- * the current run.
-- */
-- yy_bp = yy_cp;
--
-- yy_current_state = (yy_start);
--yy_match:
-- do
-- {
-- register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)];
-- if ( yy_accept[yy_current_state] )
-- {
-- (yy_last_accepting_state) = yy_current_state;
-- (yy_last_accepting_cpos) = yy_cp;
-- }
-- while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
-- {
-- yy_current_state = (int) yy_def[yy_current_state];
-- if ( yy_current_state >= 1751 )
-- yy_c = yy_meta[(unsigned int) yy_c];
-- }
-- yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-- ++yy_cp;
-- }
-- while ( yy_base[yy_current_state] != 2704 );
--
--yy_find_action:
-- yy_act = yy_accept[yy_current_state];
-- if ( yy_act == 0 )
-- { /* have to back up */
-- yy_cp = (yy_last_accepting_cpos);
-- yy_current_state = (yy_last_accepting_state);
-- yy_act = yy_accept[yy_current_state];
-- }
--
-- YY_DO_BEFORE_ACTION;
--
--do_action: /* This label is used only to access EOF actions. */
--
-- switch ( yy_act )
-- { /* beginning of action switch */
-- case 0: /* must back up */
-- /* undo the effects of YY_DO_BEFORE_ACTION */
-- *yy_cp = (yy_hold_char);
-- yy_cp = (yy_last_accepting_cpos);
-- yy_current_state = (yy_last_accepting_state);
-- goto yy_find_action;
--
--case 1:
--YY_RULE_SETUP
--#line 137 "ldlex.l"
--{ comment (); }
-- YY_BREAK
--case 2:
--YY_RULE_SETUP
--#line 140 "ldlex.l"
--{ RTOKEN('-');}
-- YY_BREAK
--case 3:
--YY_RULE_SETUP
--#line 141 "ldlex.l"
--{ RTOKEN('+');}
-- YY_BREAK
--case 4:
--YY_RULE_SETUP
--#line 142 "ldlex.l"
--{ yylval.name = xstrdup (yytext); return NAME; }
-- YY_BREAK
--case 5:
--YY_RULE_SETUP
--#line 143 "ldlex.l"
--{ RTOKEN('='); }
-- YY_BREAK
--case 6:
--YY_RULE_SETUP
--#line 145 "ldlex.l"
--{
-- yylval.integer = bfd_scan_vma (yytext + 1, 0, 16);
-- yylval.bigint.str = NULL;
-- return INT;
-- }
-- YY_BREAK
--case 7:
--YY_RULE_SETUP
--#line 151 "ldlex.l"
--{
-- int ibase ;
-- switch (yytext[yyleng - 1]) {
-- case 'X':
-- case 'x':
-- case 'H':
-- case 'h':
-- ibase = 16;
-- break;
-- case 'O':
-- case 'o':
-- ibase = 8;
-- break;
-- case 'B':
-- case 'b':
-- ibase = 2;
-- break;
-- default:
-- ibase = 10;
-- }
-- yylval.integer = bfd_scan_vma (yytext, 0,
-- ibase);
-- yylval.bigint.str = NULL;
-- return INT;
-- }
-- YY_BREAK
--case 8:
--YY_RULE_SETUP
--#line 176 "ldlex.l"
--{
-- char *s = yytext;
-- int ibase = 0;
--
-- if (*s == '$')
-- {
-- ++s;
-- ibase = 16;
-- }
-- yylval.integer = bfd_scan_vma (s, 0, ibase);
-- yylval.bigint.str = NULL;
-- if (yytext[yyleng - 1] == 'M'
-- || yytext[yyleng - 1] == 'm')
-- {
-- yylval.integer *= 1024 * 1024;
-- }
-- else if (yytext[yyleng - 1] == 'K'
-- || yytext[yyleng - 1]=='k')
-- {
-- yylval.integer *= 1024;
-- }
-- else if (yytext[0] == '0'
-- && (yytext[1] == 'x'
-- || yytext[1] == 'X'))
-- {
-- yylval.bigint.str = xstrdup (yytext + 2);
-- }
-- return INT;
-- }
-- YY_BREAK
--case 9:
--YY_RULE_SETUP
--#line 205 "ldlex.l"
--{ RTOKEN(']');}
-- YY_BREAK
--case 10:
--YY_RULE_SETUP
--#line 206 "ldlex.l"
--{ RTOKEN('[');}
-- YY_BREAK
--case 11:
--YY_RULE_SETUP
--#line 207 "ldlex.l"
--{ RTOKEN(LSHIFTEQ);}
-- YY_BREAK
--case 12:
--YY_RULE_SETUP
--#line 208 "ldlex.l"
--{ RTOKEN(RSHIFTEQ);}
-- YY_BREAK
--case 13:
--YY_RULE_SETUP
--#line 209 "ldlex.l"
--{ RTOKEN(OROR);}
-- YY_BREAK
--case 14:
--YY_RULE_SETUP
--#line 210 "ldlex.l"
--{ RTOKEN(EQ);}
-- YY_BREAK
--case 15:
--YY_RULE_SETUP
--#line 211 "ldlex.l"
--{ RTOKEN(NE);}
-- YY_BREAK
--case 16:
--YY_RULE_SETUP
--#line 212 "ldlex.l"
--{ RTOKEN(GE);}
-- YY_BREAK
--case 17:
--YY_RULE_SETUP
--#line 213 "ldlex.l"
--{ RTOKEN(LE);}
-- YY_BREAK
--case 18:
--YY_RULE_SETUP
--#line 214 "ldlex.l"
--{ RTOKEN(LSHIFT);}
-- YY_BREAK
--case 19:
--YY_RULE_SETUP
--#line 215 "ldlex.l"
--{ RTOKEN(RSHIFT);}
-- YY_BREAK
--case 20:
--YY_RULE_SETUP
--#line 216 "ldlex.l"
--{ RTOKEN(PLUSEQ);}
-- YY_BREAK
--case 21:
--YY_RULE_SETUP
--#line 217 "ldlex.l"
--{ RTOKEN(MINUSEQ);}
-- YY_BREAK
--case 22:
--YY_RULE_SETUP
--#line 218 "ldlex.l"
--{ RTOKEN(MULTEQ);}
-- YY_BREAK
--case 23:
--YY_RULE_SETUP
--#line 219 "ldlex.l"
--{ RTOKEN(DIVEQ);}
-- YY_BREAK
--case 24:
--YY_RULE_SETUP
--#line 220 "ldlex.l"
--{ RTOKEN(ANDEQ);}
-- YY_BREAK
--case 25:
--YY_RULE_SETUP
--#line 221 "ldlex.l"
--{ RTOKEN(OREQ);}
-- YY_BREAK
--case 26:
--YY_RULE_SETUP
--#line 222 "ldlex.l"
--{ RTOKEN(ANDAND);}
-- YY_BREAK
--case 27:
--YY_RULE_SETUP
--#line 223 "ldlex.l"
--{ RTOKEN('>');}
-- YY_BREAK
--case 28:
--YY_RULE_SETUP
--#line 224 "ldlex.l"
--{ RTOKEN(',');}
-- YY_BREAK
--case 29:
--YY_RULE_SETUP
--#line 225 "ldlex.l"
--{ RTOKEN('&');}
-- YY_BREAK
--case 30:
--YY_RULE_SETUP
--#line 226 "ldlex.l"
--{ RTOKEN('|');}
-- YY_BREAK
--case 31:
--YY_RULE_SETUP
--#line 227 "ldlex.l"
--{ RTOKEN('~');}
-- YY_BREAK
--case 32:
--YY_RULE_SETUP
--#line 228 "ldlex.l"
--{ RTOKEN('!');}
-- YY_BREAK
--case 33:
--YY_RULE_SETUP
--#line 229 "ldlex.l"
--{ RTOKEN('?');}
-- YY_BREAK
--case 34:
--YY_RULE_SETUP
--#line 230 "ldlex.l"
--{ RTOKEN('*');}
-- YY_BREAK
--case 35:
--YY_RULE_SETUP
--#line 231 "ldlex.l"
--{ RTOKEN('+');}
-- YY_BREAK
--case 36:
--YY_RULE_SETUP
--#line 232 "ldlex.l"
--{ RTOKEN('-');}
-- YY_BREAK
--case 37:
--YY_RULE_SETUP
--#line 233 "ldlex.l"
--{ RTOKEN('/');}
-- YY_BREAK
--case 38:
--YY_RULE_SETUP
--#line 234 "ldlex.l"
--{ RTOKEN('%');}
-- YY_BREAK
--case 39:
--YY_RULE_SETUP
--#line 235 "ldlex.l"
--{ RTOKEN('<');}
-- YY_BREAK
--case 40:
--YY_RULE_SETUP
--#line 236 "ldlex.l"
--{ RTOKEN('=');}
-- YY_BREAK
--case 41:
--YY_RULE_SETUP
--#line 237 "ldlex.l"
--{ RTOKEN('}') ; }
-- YY_BREAK
--case 42:
--YY_RULE_SETUP
--#line 238 "ldlex.l"
--{ RTOKEN('{'); }
-- YY_BREAK
--case 43:
--YY_RULE_SETUP
--#line 239 "ldlex.l"
--{ RTOKEN(')');}
-- YY_BREAK
--case 44:
--YY_RULE_SETUP
--#line 240 "ldlex.l"
--{ RTOKEN('(');}
-- YY_BREAK
--case 45:
--YY_RULE_SETUP
--#line 241 "ldlex.l"
--{ RTOKEN(':'); }
-- YY_BREAK
--case 46:
--YY_RULE_SETUP
--#line 242 "ldlex.l"
--{ RTOKEN(';');}
-- YY_BREAK
--case 47:
--YY_RULE_SETUP
--#line 243 "ldlex.l"
--{ RTOKEN(MEMORY);}
-- YY_BREAK
--case 48:
--YY_RULE_SETUP
--#line 244 "ldlex.l"
--{ RTOKEN(REGION_ALIAS);}
-- YY_BREAK
--case 49:
--YY_RULE_SETUP
--#line 245 "ldlex.l"
--{ RTOKEN(LD_FEATURE);}
-- YY_BREAK
--case 50:
--YY_RULE_SETUP
--#line 246 "ldlex.l"
--{ RTOKEN(ORIGIN);}
-- YY_BREAK
--case 51:
--YY_RULE_SETUP
--#line 247 "ldlex.l"
--{ RTOKEN(VERSIONK);}
-- YY_BREAK
--case 52:
--YY_RULE_SETUP
--#line 248 "ldlex.l"
--{ RTOKEN(BLOCK);}
-- YY_BREAK
--case 53:
--YY_RULE_SETUP
--#line 249 "ldlex.l"
--{ RTOKEN(BIND);}
-- YY_BREAK
--case 54:
--YY_RULE_SETUP
--#line 250 "ldlex.l"
--{ RTOKEN(LENGTH);}
-- YY_BREAK
--case 55:
--YY_RULE_SETUP
--#line 251 "ldlex.l"
--{ RTOKEN(ALIGN_K);}
-- YY_BREAK
--case 56:
--YY_RULE_SETUP
--#line 252 "ldlex.l"
--{ RTOKEN(DATA_SEGMENT_ALIGN);}
-- YY_BREAK
--case 57:
--YY_RULE_SETUP
--#line 253 "ldlex.l"
--{ RTOKEN(DATA_SEGMENT_RELRO_END);}
-- YY_BREAK
--case 58:
--YY_RULE_SETUP
--#line 254 "ldlex.l"
--{ RTOKEN(DATA_SEGMENT_END);}
-- YY_BREAK
--case 59:
--YY_RULE_SETUP
--#line 255 "ldlex.l"
--{ RTOKEN(ADDR);}
-- YY_BREAK
--case 60:
--YY_RULE_SETUP
--#line 256 "ldlex.l"
--{ RTOKEN(LOADADDR);}
-- YY_BREAK
--case 61:
--YY_RULE_SETUP
--#line 257 "ldlex.l"
--{ RTOKEN(ALIGNOF); }
-- YY_BREAK
--case 62:
--YY_RULE_SETUP
--#line 258 "ldlex.l"
--{ RTOKEN(MAX_K); }
-- YY_BREAK
--case 63:
--YY_RULE_SETUP
--#line 259 "ldlex.l"
--{ RTOKEN(MIN_K); }
-- YY_BREAK
--case 64:
--YY_RULE_SETUP
--#line 260 "ldlex.l"
--{ RTOKEN(LOG2CEIL); }
-- YY_BREAK
--case 65:
--YY_RULE_SETUP
--#line 261 "ldlex.l"
--{ RTOKEN(ASSERT_K); }
-- YY_BREAK
--case 66:
--YY_RULE_SETUP
--#line 262 "ldlex.l"
--{ RTOKEN(ENTRY);}
-- YY_BREAK
--case 67:
--YY_RULE_SETUP
--#line 263 "ldlex.l"
--{ RTOKEN(EXTERN);}
-- YY_BREAK
--case 68:
--YY_RULE_SETUP
--#line 264 "ldlex.l"
--{ RTOKEN(NEXT);}
-- YY_BREAK
--case 69:
--YY_RULE_SETUP
--#line 265 "ldlex.l"
--{ RTOKEN(SIZEOF_HEADERS);}
-- YY_BREAK
--case 70:
--YY_RULE_SETUP
--#line 266 "ldlex.l"
--{ RTOKEN(SIZEOF_HEADERS);}
-- YY_BREAK
--case 71:
--YY_RULE_SETUP
--#line 267 "ldlex.l"
--{ RTOKEN(SEGMENT_START);}
-- YY_BREAK
--case 72:
--YY_RULE_SETUP
--#line 268 "ldlex.l"
--{ RTOKEN(MAP);}
-- YY_BREAK
--case 73:
--YY_RULE_SETUP
--#line 269 "ldlex.l"
--{ RTOKEN(SIZEOF);}
-- YY_BREAK
--case 74:
--YY_RULE_SETUP
--#line 270 "ldlex.l"
--{ RTOKEN(TARGET_K);}
-- YY_BREAK
--case 75:
--YY_RULE_SETUP
--#line 271 "ldlex.l"
--{ RTOKEN(SEARCH_DIR);}
-- YY_BREAK
--case 76:
--YY_RULE_SETUP
--#line 272 "ldlex.l"
--{ RTOKEN(OUTPUT);}
-- YY_BREAK
--case 77:
--YY_RULE_SETUP
--#line 273 "ldlex.l"
--{ RTOKEN(INPUT);}
-- YY_BREAK
--case 78:
--YY_RULE_SETUP
--#line 274 "ldlex.l"
--{ RTOKEN(GROUP);}
-- YY_BREAK
--case 79:
--YY_RULE_SETUP
--#line 275 "ldlex.l"
--{ RTOKEN(AS_NEEDED);}
-- YY_BREAK
--case 80:
--YY_RULE_SETUP
--#line 276 "ldlex.l"
--{ RTOKEN(DEFINED);}
-- YY_BREAK
--case 81:
--YY_RULE_SETUP
--#line 277 "ldlex.l"
--{ RTOKEN(CREATE_OBJECT_SYMBOLS);}
-- YY_BREAK
--case 82:
--YY_RULE_SETUP
--#line 278 "ldlex.l"
--{ RTOKEN( CONSTRUCTORS);}
-- YY_BREAK
--case 83:
--YY_RULE_SETUP
--#line 279 "ldlex.l"
--{ RTOKEN(FORCE_COMMON_ALLOCATION);}
-- YY_BREAK
--case 84:
--YY_RULE_SETUP
--#line 280 "ldlex.l"
--{ RTOKEN(INHIBIT_COMMON_ALLOCATION);}
-- YY_BREAK
--case 85:
--YY_RULE_SETUP
--#line 281 "ldlex.l"
--{ RTOKEN(SECTIONS);}
-- YY_BREAK
--case 86:
--YY_RULE_SETUP
--#line 282 "ldlex.l"
--{ RTOKEN(INSERT_K);}
-- YY_BREAK
--case 87:
--YY_RULE_SETUP
--#line 283 "ldlex.l"
--{ RTOKEN(AFTER);}
-- YY_BREAK
--case 88:
--YY_RULE_SETUP
--#line 284 "ldlex.l"
--{ RTOKEN(BEFORE);}
-- YY_BREAK
--case 89:
--YY_RULE_SETUP
--#line 285 "ldlex.l"
--{ RTOKEN(FILL);}
-- YY_BREAK
--case 90:
--YY_RULE_SETUP
--#line 286 "ldlex.l"
--{ RTOKEN(STARTUP);}
-- YY_BREAK
--case 91:
--YY_RULE_SETUP
--#line 287 "ldlex.l"
--{ RTOKEN(OUTPUT_FORMAT);}
-- YY_BREAK
--case 92:
--YY_RULE_SETUP
--#line 288 "ldlex.l"
--{ RTOKEN( OUTPUT_ARCH);}
-- YY_BREAK
--case 93:
--YY_RULE_SETUP
--#line 289 "ldlex.l"
--{ RTOKEN(HLL);}
-- YY_BREAK
--case 94:
--YY_RULE_SETUP
--#line 290 "ldlex.l"
--{ RTOKEN(SYSLIB);}
-- YY_BREAK
--case 95:
--YY_RULE_SETUP
--#line 291 "ldlex.l"
--{ RTOKEN(FLOAT);}
-- YY_BREAK
--case 96:
--YY_RULE_SETUP
--#line 292 "ldlex.l"
--{ RTOKEN( QUAD);}
-- YY_BREAK
--case 97:
--YY_RULE_SETUP
--#line 293 "ldlex.l"
--{ RTOKEN( SQUAD);}
-- YY_BREAK
--case 98:
--YY_RULE_SETUP
--#line 294 "ldlex.l"
--{ RTOKEN( LONG);}
-- YY_BREAK
--case 99:
--YY_RULE_SETUP
--#line 295 "ldlex.l"
--{ RTOKEN( SHORT);}
-- YY_BREAK
--case 100:
--YY_RULE_SETUP
--#line 296 "ldlex.l"
--{ RTOKEN( BYTE);}
-- YY_BREAK
--case 101:
--YY_RULE_SETUP
--#line 297 "ldlex.l"
--{ RTOKEN(NOFLOAT);}
-- YY_BREAK
--case 102:
--YY_RULE_SETUP
--#line 298 "ldlex.l"
--{ RTOKEN(NOCROSSREFS);}
-- YY_BREAK
--case 103:
--YY_RULE_SETUP
--#line 299 "ldlex.l"
--{ RTOKEN(OVERLAY); }
-- YY_BREAK
--case 104:
--YY_RULE_SETUP
--#line 300 "ldlex.l"
--{ RTOKEN(SORT_BY_NAME); }
-- YY_BREAK
--case 105:
--YY_RULE_SETUP
--#line 301 "ldlex.l"
--{ RTOKEN(SORT_BY_ALIGNMENT); }
-- YY_BREAK
--case 106:
--YY_RULE_SETUP
--#line 302 "ldlex.l"
--{ RTOKEN(SORT_BY_NAME); }
-- YY_BREAK
--case 107:
--YY_RULE_SETUP
--#line 303 "ldlex.l"
--{ RTOKEN(SORT_BY_INIT_PRIORITY); }
-- YY_BREAK
--case 108:
--YY_RULE_SETUP
--#line 304 "ldlex.l"
--{ RTOKEN(SORT_NONE); }
-- YY_BREAK
--case 109:
--YY_RULE_SETUP
--#line 305 "ldlex.l"
--{ RTOKEN(NOLOAD);}
-- YY_BREAK
--case 110:
--YY_RULE_SETUP
--#line 306 "ldlex.l"
--{ RTOKEN(DSECT);}
-- YY_BREAK
--case 111:
--YY_RULE_SETUP
--#line 307 "ldlex.l"
--{ RTOKEN(COPY);}
-- YY_BREAK
--case 112:
--YY_RULE_SETUP
--#line 308 "ldlex.l"
--{ RTOKEN(INFO);}
-- YY_BREAK
--case 113:
--YY_RULE_SETUP
--#line 309 "ldlex.l"
--{ RTOKEN(OVERLAY);}
-- YY_BREAK
--case 114:
--YY_RULE_SETUP
--#line 310 "ldlex.l"
--{ RTOKEN(ONLY_IF_RO); }
-- YY_BREAK
--case 115:
--YY_RULE_SETUP
--#line 311 "ldlex.l"
--{ RTOKEN(ONLY_IF_RW); }
-- YY_BREAK
--case 116:
--YY_RULE_SETUP
--#line 312 "ldlex.l"
--{ RTOKEN(SPECIAL); }
-- YY_BREAK
--case 117:
--YY_RULE_SETUP
--#line 313 "ldlex.l"
--{ RTOKEN(ORIGIN);}
-- YY_BREAK
--case 118:
--YY_RULE_SETUP
--#line 314 "ldlex.l"
--{ RTOKEN(ORIGIN);}
-- YY_BREAK
--case 119:
--YY_RULE_SETUP
--#line 315 "ldlex.l"
--{ RTOKEN( LENGTH);}
-- YY_BREAK
--case 120:
--YY_RULE_SETUP
--#line 316 "ldlex.l"
--{ RTOKEN( LENGTH);}
-- YY_BREAK
--case 121:
--YY_RULE_SETUP
--#line 317 "ldlex.l"
--{ RTOKEN(INPUT_SECTION_FLAGS); }
-- YY_BREAK
--case 122:
--YY_RULE_SETUP
--#line 318 "ldlex.l"
--{ RTOKEN(INCLUDE);}
-- YY_BREAK
--case 123:
--YY_RULE_SETUP
--#line 319 "ldlex.l"
--{ RTOKEN (PHDRS); }
-- YY_BREAK
--case 124:
--YY_RULE_SETUP
--#line 320 "ldlex.l"
--{ RTOKEN(AT);}
-- YY_BREAK
--case 125:
--YY_RULE_SETUP
--#line 321 "ldlex.l"
--{ RTOKEN(ALIGN_WITH_INPUT);}
-- YY_BREAK
--case 126:
--YY_RULE_SETUP
--#line 322 "ldlex.l"
--{ RTOKEN(SUBALIGN);}
-- YY_BREAK
--case 127:
--YY_RULE_SETUP
--#line 323 "ldlex.l"
--{ RTOKEN(HIDDEN); }
-- YY_BREAK
--case 128:
--YY_RULE_SETUP
--#line 324 "ldlex.l"
--{ RTOKEN(PROVIDE); }
-- YY_BREAK
--case 129:
--YY_RULE_SETUP
--#line 325 "ldlex.l"
--{ RTOKEN(PROVIDE_HIDDEN); }
-- YY_BREAK
--case 130:
--YY_RULE_SETUP
--#line 326 "ldlex.l"
--{ RTOKEN(KEEP); }
-- YY_BREAK
--case 131:
--YY_RULE_SETUP
--#line 327 "ldlex.l"
--{ RTOKEN(EXCLUDE_FILE); }
-- YY_BREAK
--case 132:
--YY_RULE_SETUP
--#line 328 "ldlex.l"
--{ RTOKEN(CONSTANT);}
-- YY_BREAK
--case 133:
--/* rule 133 can match eol */
--YY_RULE_SETUP
--#line 329 "ldlex.l"
--{ ++ lineno; }
-- YY_BREAK
--case 134:
--/* rule 134 can match eol */
--YY_RULE_SETUP
--#line 330 "ldlex.l"
--{ ++ lineno; RTOKEN(NEWLINE); }
-- YY_BREAK
--case 135:
--YY_RULE_SETUP
--#line 331 "ldlex.l"
--{ /* Mri comment line */ }
-- YY_BREAK
--case 136:
--YY_RULE_SETUP
--#line 332 "ldlex.l"
--{ /* Mri comment line */ }
-- YY_BREAK
--case 137:
--YY_RULE_SETUP
--#line 333 "ldlex.l"
--{ RTOKEN(ENDWORD); }
-- YY_BREAK
--case 138:
--YY_RULE_SETUP
--#line 334 "ldlex.l"
--{ RTOKEN(ALIGNMOD);}
-- YY_BREAK
--case 139:
--YY_RULE_SETUP
--#line 335 "ldlex.l"
--{ RTOKEN(ALIGN_K);}
-- YY_BREAK
--case 140:
--YY_RULE_SETUP
--#line 336 "ldlex.l"
--{ RTOKEN(CHIP); }
-- YY_BREAK
--case 141:
--YY_RULE_SETUP
--#line 337 "ldlex.l"
--{ RTOKEN(BASE); }
-- YY_BREAK
--case 142:
--YY_RULE_SETUP
--#line 338 "ldlex.l"
--{ RTOKEN(ALIAS); }
-- YY_BREAK
--case 143:
--YY_RULE_SETUP
--#line 339 "ldlex.l"
--{ RTOKEN(TRUNCATE); }
-- YY_BREAK
--case 144:
--YY_RULE_SETUP
--#line 340 "ldlex.l"
--{ RTOKEN(LOAD); }
-- YY_BREAK
--case 145:
--YY_RULE_SETUP
--#line 341 "ldlex.l"
--{ RTOKEN(PUBLIC); }
-- YY_BREAK
--case 146:
--YY_RULE_SETUP
--#line 342 "ldlex.l"
--{ RTOKEN(ORDER); }
-- YY_BREAK
--case 147:
--YY_RULE_SETUP
--#line 343 "ldlex.l"
--{ RTOKEN(NAMEWORD); }
-- YY_BREAK
--case 148:
--YY_RULE_SETUP
--#line 344 "ldlex.l"
--{ RTOKEN(FORMAT); }
-- YY_BREAK
--case 149:
--YY_RULE_SETUP
--#line 345 "ldlex.l"
--{ RTOKEN(CASE); }
-- YY_BREAK
--case 150:
--YY_RULE_SETUP
--#line 346 "ldlex.l"
--{ RTOKEN(START); }
-- YY_BREAK
--case 151:
--YY_RULE_SETUP
--#line 347 "ldlex.l"
--{ RTOKEN(LIST); /* LIST and ignore to end of line */ }
-- YY_BREAK
--case 152:
--YY_RULE_SETUP
--#line 348 "ldlex.l"
--{ RTOKEN(SECT); }
-- YY_BREAK
--case 153:
--YY_RULE_SETUP
--#line 349 "ldlex.l"
--{ RTOKEN(ABSOLUTE); }
-- YY_BREAK
--case 154:
--YY_RULE_SETUP
--#line 350 "ldlex.l"
--{ RTOKEN(ENDWORD); }
-- YY_BREAK
--case 155:
--YY_RULE_SETUP
--#line 351 "ldlex.l"
--{ RTOKEN(ALIGNMOD);}
-- YY_BREAK
--case 156:
--YY_RULE_SETUP
--#line 352 "ldlex.l"
--{ RTOKEN(ALIGN_K);}
-- YY_BREAK
--case 157:
--YY_RULE_SETUP
--#line 353 "ldlex.l"
--{ RTOKEN(CHIP); }
-- YY_BREAK
--case 158:
--YY_RULE_SETUP
--#line 354 "ldlex.l"
--{ RTOKEN(BASE); }
-- YY_BREAK
--case 159:
--YY_RULE_SETUP
--#line 355 "ldlex.l"
--{ RTOKEN(ALIAS); }
-- YY_BREAK
--case 160:
--YY_RULE_SETUP
--#line 356 "ldlex.l"
--{ RTOKEN(TRUNCATE); }
-- YY_BREAK
--case 161:
--YY_RULE_SETUP
--#line 357 "ldlex.l"
--{ RTOKEN(LOAD); }
-- YY_BREAK
--case 162:
--YY_RULE_SETUP
--#line 358 "ldlex.l"
--{ RTOKEN(PUBLIC); }
-- YY_BREAK
--case 163:
--YY_RULE_SETUP
--#line 359 "ldlex.l"
--{ RTOKEN(ORDER); }
-- YY_BREAK
--case 164:
--YY_RULE_SETUP
--#line 360 "ldlex.l"
--{ RTOKEN(NAMEWORD); }
-- YY_BREAK
--case 165:
--YY_RULE_SETUP
--#line 361 "ldlex.l"
--{ RTOKEN(FORMAT); }
-- YY_BREAK
--case 166:
--YY_RULE_SETUP
--#line 362 "ldlex.l"
--{ RTOKEN(CASE); }
-- YY_BREAK
--case 167:
--YY_RULE_SETUP
--#line 363 "ldlex.l"
--{ RTOKEN(EXTERN); }
-- YY_BREAK
--case 168:
--YY_RULE_SETUP
--#line 364 "ldlex.l"
--{ RTOKEN(START); }
-- YY_BREAK
--case 169:
--YY_RULE_SETUP
--#line 365 "ldlex.l"
--{ RTOKEN(LIST); /* LIST and ignore to end of line */ }
-- YY_BREAK
--case 170:
--YY_RULE_SETUP
--#line 366 "ldlex.l"
--{ RTOKEN(SECT); }
-- YY_BREAK
--case 171:
--YY_RULE_SETUP
--#line 367 "ldlex.l"
--{ RTOKEN(ABSOLUTE); }
-- YY_BREAK
--case 172:
--YY_RULE_SETUP
--#line 369 "ldlex.l"
--{
--/* Filename without commas, needed to parse mri stuff */
-- yylval.name = xstrdup (yytext);
-- return NAME;
-- }
-- YY_BREAK
--case 173:
--YY_RULE_SETUP
--#line 376 "ldlex.l"
--{
-- yylval.name = xstrdup (yytext);
-- return NAME;
-- }
-- YY_BREAK
--case 174:
--YY_RULE_SETUP
--#line 380 "ldlex.l"
--{
-- yylval.name = xstrdup (yytext + 2);
-- return LNAME;
-- }
-- YY_BREAK
--case 175:
--YY_RULE_SETUP
--#line 384 "ldlex.l"
--{
-- yylval.name = xstrdup (yytext);
-- return NAME;
-- }
-- YY_BREAK
--case 176:
--YY_RULE_SETUP
--#line 388 "ldlex.l"
--{
-- yylval.name = xstrdup (yytext + 2);
-- return LNAME;
-- }
-- YY_BREAK
--case 177:
--YY_RULE_SETUP
--#line 392 "ldlex.l"
--{
-- /* Annoyingly, this pattern can match comments, and we have
-- longest match issues to consider. So if the first two
-- characters are a comment opening, put the input back and
-- try again. */
-- if (yytext[0] == '/' && yytext[1] == '*')
-- {
-- yyless (2);
-- comment ();
-- }
-- else
-- {
-- yylval.name = xstrdup (yytext);
-- return NAME;
-- }
-- }
-- YY_BREAK
--case 178:
--/* rule 178 can match eol */
--YY_RULE_SETUP
--#line 409 "ldlex.l"
--{
-- /* No matter the state, quotes
-- give what's inside */
-- yylval.name = xstrdup (yytext + 1);
-- yylval.name[yyleng - 2] = 0;
-- return NAME;
-- }
-- YY_BREAK
--case 179:
--/* rule 179 can match eol */
--YY_RULE_SETUP
--#line 416 "ldlex.l"
--{ lineno++;}
-- YY_BREAK
--case 180:
--YY_RULE_SETUP
--#line 417 "ldlex.l"
--{ }
-- YY_BREAK
--case 181:
--YY_RULE_SETUP
--#line 419 "ldlex.l"
--{ return *yytext; }
-- YY_BREAK
--case 182:
--YY_RULE_SETUP
--#line 421 "ldlex.l"
--{ RTOKEN(GLOBAL); }
-- YY_BREAK
--case 183:
--YY_RULE_SETUP
--#line 423 "ldlex.l"
--{ RTOKEN(LOCAL); }
-- YY_BREAK
--case 184:
--YY_RULE_SETUP
--#line 425 "ldlex.l"
--{ RTOKEN(EXTERN); }
-- YY_BREAK
--case 185:
--YY_RULE_SETUP
--#line 427 "ldlex.l"
--{ yylval.name = xstrdup (yytext);
-- return VERS_IDENTIFIER; }
-- YY_BREAK
--case 186:
--YY_RULE_SETUP
--#line 430 "ldlex.l"
--{ yylval.name = xstrdup (yytext);
-- return VERS_TAG; }
-- YY_BREAK
--case 187:
--YY_RULE_SETUP
--#line 433 "ldlex.l"
--{ BEGIN(VERS_SCRIPT); return *yytext; }
-- YY_BREAK
--case 188:
--YY_RULE_SETUP
--#line 435 "ldlex.l"
--{ BEGIN(VERS_NODE);
-- vers_node_nesting = 0;
-- return *yytext;
-- }
-- YY_BREAK
--case 189:
--YY_RULE_SETUP
--#line 439 "ldlex.l"
--{ return *yytext; }
-- YY_BREAK
--case 190:
--YY_RULE_SETUP
--#line 440 "ldlex.l"
--{ vers_node_nesting++; return *yytext; }
-- YY_BREAK
--case 191:
--YY_RULE_SETUP
--#line 441 "ldlex.l"
--{ if (--vers_node_nesting < 0)
-- BEGIN(VERS_SCRIPT);
-- return *yytext;
-- }
-- YY_BREAK
--case 192:
--/* rule 192 can match eol */
--YY_RULE_SETUP
--#line 446 "ldlex.l"
--{ lineno++; }
-- YY_BREAK
--case 193:
--YY_RULE_SETUP
--#line 448 "ldlex.l"
--{ /* Eat up comments */ }
-- YY_BREAK
--case 194:
--YY_RULE_SETUP
--#line 450 "ldlex.l"
--{ /* Eat up whitespace */ }
-- YY_BREAK
--case YY_STATE_EOF(INITIAL):
--case YY_STATE_EOF(SCRIPT):
--case YY_STATE_EOF(EXPRESSION):
--case YY_STATE_EOF(BOTH):
--case YY_STATE_EOF(DEFSYMEXP):
--case YY_STATE_EOF(MRI):
--case YY_STATE_EOF(VERS_START):
--case YY_STATE_EOF(VERS_SCRIPT):
--case YY_STATE_EOF(VERS_NODE):
--#line 452 "ldlex.l"
--{
-- include_stack_ptr--;
-- if (include_stack_ptr == 0)
-- yyterminate ();
-- else
-- yy_switch_to_buffer (include_stack[include_stack_ptr]);
--
-- lineno = lineno_stack[include_stack_ptr];
-- input_flags.sysrooted = sysrooted_stack[include_stack_ptr];
--
-- return END;
--}
-- YY_BREAK
--case 195:
--YY_RULE_SETUP
--#line 465 "ldlex.l"
--lex_warn_invalid (" in script", yytext);
-- YY_BREAK
--case 196:
--YY_RULE_SETUP
--#line 466 "ldlex.l"
--lex_warn_invalid (" in expression", yytext);
-- YY_BREAK
--case 197:
--YY_RULE_SETUP
--#line 468 "ldlex.l"
--ECHO;
-- YY_BREAK
--#line 3149 "ldlex.c"
--
-- case YY_END_OF_BUFFER:
-- {
-- /* Amount of text matched not including the EOB char. */
-- int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1;
--
-- /* Undo the effects of YY_DO_BEFORE_ACTION. */
-- *yy_cp = (yy_hold_char);
-- YY_RESTORE_YY_MORE_OFFSET
--
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW )
-- {
-- /* We're scanning a new file or input source. It's
-- * possible that this happened because the user
-- * just pointed yyin at a new source and called
-- * yylex(). If so, then we have to assure
-- * consistency between YY_CURRENT_BUFFER and our
-- * globals. Here is the right place to do so, because
-- * this is the first action (other than possibly a
-- * back-up) that will match for the new input source.
-- */
-- (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
-- YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin;
-- YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL;
-- }
--
-- /* Note that here we test for yy_c_buf_p "<=" to the position
-- * of the first EOB in the buffer, since yy_c_buf_p will
-- * already have been incremented past the NUL character
-- * (since all states make transitions on EOB to the
-- * end-of-buffer state). Contrast this with the test
-- * in input().
-- */
-- if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
-- { /* This was really a NUL. */
-- yy_state_type yy_next_state;
--
-- (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text;
--
-- yy_current_state = yy_get_previous_state( );
--
-- /* Okay, we're now positioned to make the NUL
-- * transition. We couldn't have
-- * yy_get_previous_state() go ahead and do it
-- * for us because it doesn't know how to deal
-- * with the possibility of jamming (and we don't
-- * want to build jamming into it because then it
-- * will run more slowly).
-- */
--
-- yy_next_state = yy_try_NUL_trans( yy_current_state );
--
-- yy_bp = (yytext_ptr) + YY_MORE_ADJ;
--
-- if ( yy_next_state )
-- {
-- /* Consume the NUL. */
-- yy_cp = ++(yy_c_buf_p);
-- yy_current_state = yy_next_state;
-- goto yy_match;
-- }
--
-- else
-- {
-- yy_cp = (yy_c_buf_p);
-- goto yy_find_action;
-- }
-- }
--
-- else switch ( yy_get_next_buffer( ) )
-- {
-- case EOB_ACT_END_OF_FILE:
-- {
-- (yy_did_buffer_switch_on_eof) = 0;
--
-- if ( yywrap( ) )
-- {
-- /* Note: because we've taken care in
-- * yy_get_next_buffer() to have set up
-- * yytext, we can now set up
-- * yy_c_buf_p so that if some total
-- * hoser (like flex itself) wants to
-- * call the scanner after we return the
-- * YY_NULL, it'll still work - another
-- * YY_NULL will get returned.
-- */
-- (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ;
--
-- yy_act = YY_STATE_EOF(YY_START);
-- goto do_action;
-- }
--
-- else
-- {
-- if ( ! (yy_did_buffer_switch_on_eof) )
-- YY_NEW_FILE;
-- }
-- break;
-- }
--
-- case EOB_ACT_CONTINUE_SCAN:
-- (yy_c_buf_p) =
-- (yytext_ptr) + yy_amount_of_matched_text;
--
-- yy_current_state = yy_get_previous_state( );
--
-- yy_cp = (yy_c_buf_p);
-- yy_bp = (yytext_ptr) + YY_MORE_ADJ;
-- goto yy_match;
--
-- case EOB_ACT_LAST_MATCH:
-- (yy_c_buf_p) =
-- &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)];
--
-- yy_current_state = yy_get_previous_state( );
--
-- yy_cp = (yy_c_buf_p);
-- yy_bp = (yytext_ptr) + YY_MORE_ADJ;
-- goto yy_find_action;
-- }
-- break;
-- }
--
-- default:
-- YY_FATAL_ERROR(
-- "fatal flex scanner internal error--no action found" );
-- } /* end of action switch */
-- } /* end of scanning one token */
--} /* end of yylex */
--
--/* yy_get_next_buffer - try to read in a new buffer
-- *
-- * Returns a code representing an action:
-- * EOB_ACT_LAST_MATCH -
-- * EOB_ACT_CONTINUE_SCAN - continue scanning from current position
-- * EOB_ACT_END_OF_FILE - end of file
-- */
--static int yy_get_next_buffer (void)
--{
-- register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf;
-- register char *source = (yytext_ptr);
-- register int number_to_move, i;
-- int ret_val;
--
-- if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] )
-- YY_FATAL_ERROR(
-- "fatal flex scanner internal error--end of buffer missed" );
--
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 )
-- { /* Don't try to fill the buffer, so this is an EOF. */
-- if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 )
-- {
-- /* We matched a single character, the EOB, so
-- * treat this as a final EOF.
-- */
-- return EOB_ACT_END_OF_FILE;
-- }
--
-- else
-- {
-- /* We matched some text prior to the EOB, first
-- * process it.
-- */
-- return EOB_ACT_LAST_MATCH;
-- }
-- }
--
-- /* Try to read more data. */
--
-- /* First move last chars to start of buffer. */
-- number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1;
--
-- for ( i = 0; i < number_to_move; ++i )
-- *(dest++) = *(source++);
--
-- if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING )
-- /* don't do the read, it's not guaranteed to return an EOF,
-- * just force an EOF
-- */
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0;
--
-- else
-- {
-- yy_size_t num_to_read =
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1;
--
-- while ( num_to_read <= 0 )
-- { /* Not enough room in the buffer - grow it. */
--
-- /* just a shorter name for the current buffer */
-- YY_BUFFER_STATE b = YY_CURRENT_BUFFER;
--
-- int yy_c_buf_p_offset =
-- (int) ((yy_c_buf_p) - b->yy_ch_buf);
--
-- if ( b->yy_is_our_buffer )
-- {
-- yy_size_t new_size = b->yy_buf_size * 2;
--
-- if ( new_size <= 0 )
-- b->yy_buf_size += b->yy_buf_size / 8;
-- else
-- b->yy_buf_size *= 2;
--
-- b->yy_ch_buf = (char *)
-- /* Include room in for 2 EOB chars. */
-- yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 );
-- }
-- else
-- /* Can't grow it, we don't own it. */
-- b->yy_ch_buf = 0;
--
-- if ( ! b->yy_ch_buf )
-- YY_FATAL_ERROR(
-- "fatal error - scanner input buffer overflow" );
--
-- (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset];
--
-- num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size -
-- number_to_move - 1;
--
-- }
--
-- if ( num_to_read > YY_READ_BUF_SIZE )
-- num_to_read = YY_READ_BUF_SIZE;
--
-- /* Read in more data. */
-- YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]),
-- (yy_n_chars), num_to_read );
--
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
-- }
--
-- if ( (yy_n_chars) == 0 )
-- {
-- if ( number_to_move == YY_MORE_ADJ )
-- {
-- ret_val = EOB_ACT_END_OF_FILE;
-- yyrestart(yyin );
-- }
--
-- else
-- {
-- ret_val = EOB_ACT_LAST_MATCH;
-- YY_CURRENT_BUFFER_LVALUE->yy_buffer_status =
-- YY_BUFFER_EOF_PENDING;
-- }
-- }
--
-- else
-- ret_val = EOB_ACT_CONTINUE_SCAN;
--
-- if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) {
-- /* Extend the array by 50%, plus the number we really need. */
-- yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1);
-- YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size );
-- if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" );
-- }
--
-- (yy_n_chars) += number_to_move;
-- YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR;
-- YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR;
--
-- (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0];
--
-- return ret_val;
--}
--
--/* yy_get_previous_state - get the state just before the EOB char was reached */
--
-- static yy_state_type yy_get_previous_state (void)
--{
-- register yy_state_type yy_current_state;
-- register char *yy_cp;
--
-- yy_current_state = (yy_start);
--
-- for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
-- {
-- register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1);
-- if ( yy_accept[yy_current_state] )
-- {
-- (yy_last_accepting_state) = yy_current_state;
-- (yy_last_accepting_cpos) = yy_cp;
-- }
-- while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
-- {
-- yy_current_state = (int) yy_def[yy_current_state];
-- if ( yy_current_state >= 1751 )
-- yy_c = yy_meta[(unsigned int) yy_c];
-- }
-- yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-- }
--
-- return yy_current_state;
--}
--
--/* yy_try_NUL_trans - try to make a transition on the NUL character
-- *
-- * synopsis
-- * next_state = yy_try_NUL_trans( current_state );
-- */
-- static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state )
--{
-- register int yy_is_jam;
-- register char *yy_cp = (yy_c_buf_p);
--
-- register YY_CHAR yy_c = 1;
-- if ( yy_accept[yy_current_state] )
-- {
-- (yy_last_accepting_state) = yy_current_state;
-- (yy_last_accepting_cpos) = yy_cp;
-- }
-- while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
-- {
-- yy_current_state = (int) yy_def[yy_current_state];
-- if ( yy_current_state >= 1751 )
-- yy_c = yy_meta[(unsigned int) yy_c];
-- }
-- yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
-- yy_is_jam = (yy_current_state == 1750);
--
-- return yy_is_jam ? 0 : yy_current_state;
--}
--
--#ifndef YY_NO_INPUT
--#ifdef __cplusplus
-- static int yyinput (void)
--#else
-- static int input (void)
--#endif
--
--{
-- int c;
--
-- *(yy_c_buf_p) = (yy_hold_char);
--
-- if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
-- {
-- /* yy_c_buf_p now points to the character we want to return.
-- * If this occurs *before* the EOB characters, then it's a
-- * valid NUL; if not, then we've hit the end of the buffer.
-- */
-- if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
-- /* This was really a NUL. */
-- *(yy_c_buf_p) = '\0';
--
-- else
-- { /* need more input */
-- yy_size_t offset = (yy_c_buf_p) - (yytext_ptr);
-- ++(yy_c_buf_p);
--
-- switch ( yy_get_next_buffer( ) )
-- {
-- case EOB_ACT_LAST_MATCH:
-- /* This happens because yy_g_n_b()
-- * sees that we've accumulated a
-- * token and flags that we need to
-- * try matching the token before
-- * proceeding. But for input(),
-- * there's no matching to consider.
-- * So convert the EOB_ACT_LAST_MATCH
-- * to EOB_ACT_END_OF_FILE.
-- */
--
-- /* Reset buffer status. */
-- yyrestart(yyin );
--
-- /*FALLTHROUGH*/
--
-- case EOB_ACT_END_OF_FILE:
-- {
-- if ( yywrap( ) )
-- return 0;
--
-- if ( ! (yy_did_buffer_switch_on_eof) )
-- YY_NEW_FILE;
--#ifdef __cplusplus
-- return yyinput();
--#else
-- return input();
--#endif
-- }
--
-- case EOB_ACT_CONTINUE_SCAN:
-- (yy_c_buf_p) = (yytext_ptr) + offset;
-- break;
-- }
-- }
-- }
--
-- c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */
-- *(yy_c_buf_p) = '\0'; /* preserve yytext */
-- (yy_hold_char) = *++(yy_c_buf_p);
--
-- return c;
--}
--#endif /* ifndef YY_NO_INPUT */
--
--/** Immediately switch to a different input stream.
-- * @param input_file A readable stream.
-- *
-- * @note This function does not reset the start condition to @c INITIAL .
-- */
-- void yyrestart (FILE * input_file )
--{
--
-- if ( ! YY_CURRENT_BUFFER ){
-- yyensure_buffer_stack ();
-- YY_CURRENT_BUFFER_LVALUE =
-- yy_create_buffer(yyin,YY_BUF_SIZE );
-- }
--
-- yy_init_buffer(YY_CURRENT_BUFFER,input_file );
-- yy_load_buffer_state( );
--}
--
--/** Switch to a different input buffer.
-- * @param new_buffer The new input buffer.
-- *
-- */
-- void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer )
--{
--
-- /* TODO. We should be able to replace this entire function body
-- * with
-- * yypop_buffer_state();
-- * yypush_buffer_state(new_buffer);
-- */
-- yyensure_buffer_stack ();
-- if ( YY_CURRENT_BUFFER == new_buffer )
-- return;
--
-- if ( YY_CURRENT_BUFFER )
-- {
-- /* Flush out information for old buffer. */
-- *(yy_c_buf_p) = (yy_hold_char);
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
-- }
--
-- YY_CURRENT_BUFFER_LVALUE = new_buffer;
-- yy_load_buffer_state( );
--
-- /* We don't actually know whether we did this switch during
-- * EOF (yywrap()) processing, but the only time this flag
-- * is looked at is after yywrap() is called, so it's safe
-- * to go ahead and always set it.
-- */
-- (yy_did_buffer_switch_on_eof) = 1;
--}
--
--static void yy_load_buffer_state (void)
--{
-- (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
-- (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos;
-- yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file;
-- (yy_hold_char) = *(yy_c_buf_p);
--}
--
--/** Allocate and initialize an input buffer state.
-- * @param file A readable stream.
-- * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
-- *
-- * @return the allocated buffer state.
-- */
-- YY_BUFFER_STATE yy_create_buffer (FILE * file, int size )
--{
-- YY_BUFFER_STATE b;
--
-- b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) );
-- if ( ! b )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
--
-- b->yy_buf_size = size;
--
-- /* yy_ch_buf has to be 2 characters longer than the size given because
-- * we need to put in 2 end-of-buffer characters.
-- */
-- b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2 );
-- if ( ! b->yy_ch_buf )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
--
-- b->yy_is_our_buffer = 1;
--
-- yy_init_buffer(b,file );
--
-- return b;
--}
--
--/** Destroy the buffer.
-- * @param b a buffer created with yy_create_buffer()
-- *
-- */
-- void yy_delete_buffer (YY_BUFFER_STATE b )
--{
--
-- if ( ! b )
-- return;
--
-- if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */
-- YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0;
--
-- if ( b->yy_is_our_buffer )
-- yyfree((void *) b->yy_ch_buf );
--
-- yyfree((void *) b );
--}
--
--#ifndef __cplusplus
--extern int isatty (int );
--#endif /* __cplusplus */
--
--/* Initializes or reinitializes a buffer.
-- * This function is sometimes called more than once on the same buffer,
-- * such as during a yyrestart() or at EOF.
-- */
-- static void yy_init_buffer (YY_BUFFER_STATE b, FILE * file )
--
--{
-- int oerrno = errno;
--
-- yy_flush_buffer(b );
--
-- b->yy_input_file = file;
-- b->yy_fill_buffer = 1;
--
-- /* If b is the current buffer, then yy_init_buffer was _probably_
-- * called from yyrestart() or through yy_get_next_buffer.
-- * In that case, we don't want to reset the lineno or column.
-- */
-- if (b != YY_CURRENT_BUFFER){
-- b->yy_bs_lineno = 1;
-- b->yy_bs_column = 0;
-- }
--
-- b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0;
--
-- errno = oerrno;
--}
--
--/** Discard all buffered characters. On the next scan, YY_INPUT will be called.
-- * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
-- *
-- */
-- void yy_flush_buffer (YY_BUFFER_STATE b )
--{
-- if ( ! b )
-- return;
--
-- b->yy_n_chars = 0;
--
-- /* We always need two end-of-buffer characters. The first causes
-- * a transition to the end-of-buffer state. The second causes
-- * a jam in that state.
-- */
-- b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR;
-- b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR;
--
-- b->yy_buf_pos = &b->yy_ch_buf[0];
--
-- b->yy_at_bol = 1;
-- b->yy_buffer_status = YY_BUFFER_NEW;
--
-- if ( b == YY_CURRENT_BUFFER )
-- yy_load_buffer_state( );
--}
--
--/** Pushes the new state onto the stack. The new state becomes
-- * the current state. This function will allocate the stack
-- * if necessary.
-- * @param new_buffer The new state.
-- *
-- */
--void yypush_buffer_state (YY_BUFFER_STATE new_buffer )
--{
-- if (new_buffer == NULL)
-- return;
--
-- yyensure_buffer_stack();
--
-- /* This block is copied from yy_switch_to_buffer. */
-- if ( YY_CURRENT_BUFFER )
-- {
-- /* Flush out information for old buffer. */
-- *(yy_c_buf_p) = (yy_hold_char);
-- YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
-- YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
-- }
--
-- /* Only push if top exists. Otherwise, replace top. */
-- if (YY_CURRENT_BUFFER)
-- (yy_buffer_stack_top)++;
-- YY_CURRENT_BUFFER_LVALUE = new_buffer;
--
-- /* copied from yy_switch_to_buffer. */
-- yy_load_buffer_state( );
-- (yy_did_buffer_switch_on_eof) = 1;
--}
--
--/** Removes and deletes the top of the stack, if present.
-- * The next element becomes the new top.
-- *
-- */
--void yypop_buffer_state (void)
--{
-- if (!YY_CURRENT_BUFFER)
-- return;
--
-- yy_delete_buffer(YY_CURRENT_BUFFER );
-- YY_CURRENT_BUFFER_LVALUE = NULL;
-- if ((yy_buffer_stack_top) > 0)
-- --(yy_buffer_stack_top);
--
-- if (YY_CURRENT_BUFFER) {
-- yy_load_buffer_state( );
-- (yy_did_buffer_switch_on_eof) = 1;
-- }
--}
--
--/* Allocates the stack if it does not exist.
-- * Guarantees space for at least one push.
-- */
--static void yyensure_buffer_stack (void)
--{
-- yy_size_t num_to_alloc;
--
-- if (!(yy_buffer_stack)) {
--
-- /* First allocation is just for 2 elements, since we don't know if this
-- * scanner will even need a stack. We use 2 instead of 1 to avoid an
-- * immediate realloc on the next call.
-- */
-- num_to_alloc = 1;
-- (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc
-- (num_to_alloc * sizeof(struct yy_buffer_state*)
-- );
-- if ( ! (yy_buffer_stack) )
-- YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
--
-- memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
--
-- (yy_buffer_stack_max) = num_to_alloc;
-- (yy_buffer_stack_top) = 0;
-- return;
-- }
--
-- if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){
--
-- /* Increase the buffer to prepare for a possible push. */
-- int grow_size = 8 /* arbitrary grow size */;
--
-- num_to_alloc = (yy_buffer_stack_max) + grow_size;
-- (yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc
-- ((yy_buffer_stack),
-- num_to_alloc * sizeof(struct yy_buffer_state*)
-- );
-- if ( ! (yy_buffer_stack) )
-- YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
--
-- /* zero only the new slots.*/
-- memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*));
-- (yy_buffer_stack_max) = num_to_alloc;
-- }
--}
--
--/** Setup the input buffer state to scan directly from a user-specified character buffer.
-- * @param base the character buffer
-- * @param size the size in bytes of the character buffer
-- *
-- * @return the newly allocated buffer state object.
-- */
--YY_BUFFER_STATE yy_scan_buffer (char * base, yy_size_t size )
--{
-- YY_BUFFER_STATE b;
--
-- if ( size < 2 ||
-- base[size-2] != YY_END_OF_BUFFER_CHAR ||
-- base[size-1] != YY_END_OF_BUFFER_CHAR )
-- /* They forgot to leave room for the EOB's. */
-- return 0;
--
-- b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) );
-- if ( ! b )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" );
--
-- b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */
-- b->yy_buf_pos = b->yy_ch_buf = base;
-- b->yy_is_our_buffer = 0;
-- b->yy_input_file = 0;
-- b->yy_n_chars = b->yy_buf_size;
-- b->yy_is_interactive = 0;
-- b->yy_at_bol = 1;
-- b->yy_fill_buffer = 0;
-- b->yy_buffer_status = YY_BUFFER_NEW;
--
-- yy_switch_to_buffer(b );
--
-- return b;
--}
--
--/** Setup the input buffer state to scan a string. The next call to yylex() will
-- * scan from a @e copy of @a str.
-- * @param yystr a NUL-terminated string to scan
-- *
-- * @return the newly allocated buffer state object.
-- * @note If you want to scan bytes that may contain NUL values, then use
-- * yy_scan_bytes() instead.
-- */
--YY_BUFFER_STATE yy_scan_string (yyconst char * yystr )
--{
--
-- return yy_scan_bytes(yystr,strlen(yystr) );
--}
--
--/** Setup the input buffer state to scan the given bytes. The next call to yylex() will
-- * scan from a @e copy of @a bytes.
-- * @param bytes the byte buffer to scan
-- * @param len the number of bytes in the buffer pointed to by @a bytes.
-- *
-- * @return the newly allocated buffer state object.
-- */
--YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, yy_size_t _yybytes_len )
--{
-- YY_BUFFER_STATE b;
-- char *buf;
-- yy_size_t n, i;
--
-- /* Get memory for full buffer, including space for trailing EOB's. */
-- n = _yybytes_len + 2;
-- buf = (char *) yyalloc(n );
-- if ( ! buf )
-- YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" );
--
-- for ( i = 0; i < _yybytes_len; ++i )
-- buf[i] = yybytes[i];
--
-- buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR;
--
-- b = yy_scan_buffer(buf,n );
-- if ( ! b )
-- YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" );
--
-- /* It's okay to grow etc. this buffer, and we should throw it
-- * away when we're done.
-- */
-- b->yy_is_our_buffer = 1;
--
-- return b;
--}
--
--#ifndef YY_EXIT_FAILURE
--#define YY_EXIT_FAILURE 2
--#endif
--
--static void yy_fatal_error (yyconst char* msg )
--{
-- (void) fprintf( stderr, "%s\n", msg );
-- exit( YY_EXIT_FAILURE );
--}
--
--/* Redefine yyless() so it works in section 3 code. */
--
--#undef yyless
--#define yyless(n) \
-- do \
-- { \
-- /* Undo effects of setting up yytext. */ \
-- int yyless_macro_arg = (n); \
-- YY_LESS_LINENO(yyless_macro_arg);\
-- yytext[yyleng] = (yy_hold_char); \
-- (yy_c_buf_p) = yytext + yyless_macro_arg; \
-- (yy_hold_char) = *(yy_c_buf_p); \
-- *(yy_c_buf_p) = '\0'; \
-- yyleng = yyless_macro_arg; \
-- } \
-- while ( 0 )
--
--/* Accessor methods (get/set functions) to struct members. */
--
--/** Get the current line number.
-- *
-- */
--int yyget_lineno (void)
--{
--
-- return yylineno;
--}
--
--/** Get the input stream.
-- *
-- */
--FILE *yyget_in (void)
--{
-- return yyin;
--}
--
--/** Get the output stream.
-- *
-- */
--FILE *yyget_out (void)
--{
-- return yyout;
--}
--
--/** Get the length of the current token.
-- *
-- */
--yy_size_t yyget_leng (void)
--{
-- return yyleng;
--}
--
--/** Get the current token.
-- *
-- */
--
--char *yyget_text (void)
--{
-- return yytext;
--}
--
--/** Set the current line number.
-- * @param line_number
-- *
-- */
--void yyset_lineno (int line_number )
--{
--
-- yylineno = line_number;
--}
--
--/** Set the input stream. This does not discard the current
-- * input buffer.
-- * @param in_str A readable stream.
-- *
-- * @see yy_switch_to_buffer
-- */
--void yyset_in (FILE * in_str )
--{
-- yyin = in_str ;
--}
--
--void yyset_out (FILE * out_str )
--{
-- yyout = out_str ;
--}
--
--int yyget_debug (void)
--{
-- return yy_flex_debug;
--}
--
--void yyset_debug (int bdebug )
--{
-- yy_flex_debug = bdebug ;
--}
--
--static int yy_init_globals (void)
--{
-- /* Initialization is the same as for the non-reentrant scanner.
-- * This function is called from yylex_destroy(), so don't allocate here.
-- */
--
-- (yy_buffer_stack) = 0;
-- (yy_buffer_stack_top) = 0;
-- (yy_buffer_stack_max) = 0;
-- (yy_c_buf_p) = (char *) 0;
-- (yy_init) = 0;
-- (yy_start) = 0;
--
--/* Defined in main.c */
--#ifdef YY_STDINIT
-- yyin = stdin;
-- yyout = stdout;
--#else
-- yyin = (FILE *) 0;
-- yyout = (FILE *) 0;
--#endif
--
-- /* For future reference: Set errno on error, since we are called by
-- * yylex_init()
-- */
-- return 0;
--}
--
--/* yylex_destroy is for both reentrant and non-reentrant scanners. */
--int yylex_destroy (void)
--{
--
-- /* Pop the buffer stack, destroying each element. */
-- while(YY_CURRENT_BUFFER){
-- yy_delete_buffer(YY_CURRENT_BUFFER );
-- YY_CURRENT_BUFFER_LVALUE = NULL;
-- yypop_buffer_state();
-- }
--
-- /* Destroy the stack itself. */
-- yyfree((yy_buffer_stack) );
-- (yy_buffer_stack) = NULL;
--
-- /* Reset the globals. This is important in a non-reentrant scanner so the next time
-- * yylex() is called, initialization will occur. */
-- yy_init_globals( );
--
-- return 0;
--}
--
--/*
-- * Internal utility routines.
-- */
--
--#ifndef yytext_ptr
--static void yy_flex_strncpy (char* s1, yyconst char * s2, int n )
--{
-- register int i;
-- for ( i = 0; i < n; ++i )
-- s1[i] = s2[i];
--}
--#endif
--
--#ifdef YY_NEED_STRLEN
--static int yy_flex_strlen (yyconst char * s )
--{
-- register int n;
-- for ( n = 0; s[n]; ++n )
-- ;
--
-- return n;
--}
--#endif
--
--void *yyalloc (yy_size_t size )
--{
-- return (void *) malloc( size );
--}
--
--void *yyrealloc (void * ptr, yy_size_t size )
--{
-- /* The cast to (char *) in the following accommodates both
-- * implementations that use char* generic pointers, and those
-- * that use void* generic pointers. It works with the latter
-- * because both ANSI C and C++ allow castless assignment from
-- * any pointer type to void*, and deal with argument conversions
-- * as though doing an assignment.
-- */
-- return (void *) realloc( (char *) ptr, size );
--}
--
--void yyfree (void * ptr )
--{
-- free( (char *) ptr ); /* see yyrealloc() for (char *) cast */
--}
--
--#define YYTABLES_NAME "yytables"
--
--#line 468 "ldlex.l"
--
--
--
--
--/* Switch flex to reading script file NAME, open on FILE,
-- saving the current input info on the include stack. */
--
--void
--lex_push_file (FILE *file, const char *name, unsigned int sysrooted)
--{
-- if (include_stack_ptr >= MAX_INCLUDE_DEPTH)
-- {
-- einfo ("%F:includes nested too deeply\n");
-- }
-- file_name_stack[include_stack_ptr] = name;
-- lineno_stack[include_stack_ptr] = lineno;
-- sysrooted_stack[include_stack_ptr] = input_flags.sysrooted;
-- include_stack[include_stack_ptr] = YY_CURRENT_BUFFER;
--
-- include_stack_ptr++;
-- lineno = 1;
-- input_flags.sysrooted = sysrooted;
-- yyin = file;
-- yy_switch_to_buffer (yy_create_buffer (yyin, YY_BUF_SIZE));
--}
--
--/* Return a newly created flex input buffer containing STRING,
-- which is SIZE bytes long. */
--
--static YY_BUFFER_STATE
--yy_create_string_buffer (const char *string, size_t size)
--{
-- YY_BUFFER_STATE b;
--
-- /* Calls to m-alloc get turned by sed into xm-alloc. */
-- b = malloc (sizeof (struct yy_buffer_state));
-- b->yy_input_file = 0;
-- b->yy_buf_size = size;
--
-- /* yy_ch_buf has to be 2 characters longer than the size given because
-- we need to put in 2 end-of-buffer characters. */
-- b->yy_ch_buf = malloc ((unsigned) (b->yy_buf_size + 3));
--
-- b->yy_ch_buf[0] = '\n';
-- strcpy (b->yy_ch_buf+1, string);
-- b->yy_ch_buf[size+1] = YY_END_OF_BUFFER_CHAR;
-- b->yy_ch_buf[size+2] = YY_END_OF_BUFFER_CHAR;
-- b->yy_n_chars = size+1;
-- b->yy_buf_pos = &b->yy_ch_buf[1];
--
-- b->yy_is_our_buffer = 1;
-- b->yy_is_interactive = 0;
-- b->yy_at_bol = 1;
-- b->yy_fill_buffer = 0;
--
-- /* flex 2.4.7 changed the interface. FIXME: We should not be using
-- a flex internal interface in the first place! */
--#ifdef YY_BUFFER_NEW
-- b->yy_buffer_status = YY_BUFFER_NEW;
--#else
-- b->yy_eof_status = EOF_NOT_SEEN;
--#endif
--
-- return b;
--}
--
--/* Switch flex to reading from STRING, saving the current input info
-- on the include stack. */
--
--void
--lex_redirect (const char *string, const char *fake_filename, unsigned int count)
--{
-- YY_BUFFER_STATE tmp;
--
-- yy_init = 0;
-- if (include_stack_ptr >= MAX_INCLUDE_DEPTH)
-- {
-- einfo("%F: macros nested too deeply\n");
-- }
-- file_name_stack[include_stack_ptr] = fake_filename;
-- lineno_stack[include_stack_ptr] = lineno;
-- include_stack[include_stack_ptr] = YY_CURRENT_BUFFER;
-- include_stack_ptr++;
-- lineno = count;
-- tmp = yy_create_string_buffer (string, strlen (string));
-- yy_switch_to_buffer (tmp);
--}
--
--/* Functions to switch to a different flex start condition,
-- saving the current start condition on `state_stack'. */
--
--static int state_stack[MAX_INCLUDE_DEPTH * 2];
--static int *state_stack_p = state_stack;
--
--void
--ldlex_script (void)
--{
-- *(state_stack_p)++ = yy_start;
-- BEGIN (SCRIPT);
--}
--
--void
--ldlex_mri_script (void)
--{
-- *(state_stack_p)++ = yy_start;
-- BEGIN (MRI);
--}
--
--void
--ldlex_version_script (void)
--{
-- *(state_stack_p)++ = yy_start;
-- BEGIN (VERS_START);
--}
--
--void
--ldlex_version_file (void)
--{
-- *(state_stack_p)++ = yy_start;
-- BEGIN (VERS_SCRIPT);
--}
--
--void
--ldlex_defsym (void)
--{
-- *(state_stack_p)++ = yy_start;
-- BEGIN (DEFSYMEXP);
--}
--
--void
--ldlex_expression (void)
--{
-- *(state_stack_p)++ = yy_start;
-- BEGIN (EXPRESSION);
--}
--
--void
--ldlex_both (void)
--{
-- *(state_stack_p)++ = yy_start;
-- BEGIN (BOTH);
--}
--
--void
--ldlex_popstate (void)
--{
-- yy_start = *(--state_stack_p);
--}
--
--/* Return the current file name, or the previous file if no file is
-- current. */
--
--const char*
--ldlex_filename (void)
--{
-- return file_name_stack[include_stack_ptr - (include_stack_ptr != 0)];
--}
--
--
--/* Place up to MAX_SIZE characters in BUF and return
-- either the number of characters read, or 0 to indicate EOF. */
--
--static int
--yy_input (char *buf, int max_size)
--{
-- int result = 0;
-- if (YY_CURRENT_BUFFER->yy_input_file)
-- {
-- if (yyin)
-- {
-- result = fread (buf, 1, max_size, yyin);
-- if (result < max_size && ferror (yyin))
-- einfo ("%F%P: read in flex scanner failed\n");
-- }
-- }
-- return result;
--}
--
--/* Eat the rest of a C-style comment. */
--
--static void
--comment (void)
--{
-- int c;
--
-- while (1)
-- {
-- c = input();
-- while (c != '*' && c != EOF)
-- {
-- if (c == '\n')
-- lineno++;
-- c = input();
-- }
--
-- if (c == '*')
-- {
-- c = input();
-- while (c == '*')
-- c = input();
-- if (c == '/')
-- break; /* found the end */
-- }
--
-- if (c == '\n')
-- lineno++;
--
-- if (c == EOF)
-- {
-- einfo( "%F%P: EOF in comment\n");
-- break;
-- }
-- }
--}
--
--/* Warn the user about a garbage character WHAT in the input
-- in context WHERE. */
--
--static void
--lex_warn_invalid (char *where, char *what)
--{
-- char buf[5];
--
-- /* If we have found an input file whose format we do not recognize,
-- and we are therefore treating it as a linker script, and we find
-- an invalid character, then most likely this is a real object file
-- of some different format. Treat it as such. */
-- if (ldfile_assumed_script)
-- {
-- bfd_set_error (bfd_error_file_not_recognized);
-- einfo ("%F%s: file not recognized: %E\n", ldlex_filename ());
-- }
--
-- if (! ISPRINT (*what))
-- {
-- sprintf (buf, "\\%03o", *(unsigned char *) what);
-- what = buf;
-- }
--
-- einfo ("%P:%S: ignoring invalid character `%s'%s\n", NULL, what, where);
--}
--
-diff -Nur binutils-2.24.orig/ld/ld.texinfo binutils-2.24/ld/ld.texinfo
---- binutils-2.24.orig/ld/ld.texinfo 2013-11-26 12:37:33.000000000 +0100
-+++ binutils-2.24/ld/ld.texinfo 2016-06-30 21:26:12.797898714 +0200
-@@ -29,6 +29,7 @@
- @set MIPS
- @set MMIX
- @set MSP430
-+@set NDS32
- @set POWERPC
- @set POWERPC64
- @set Renesas
-@@ -6094,6 +6095,9 @@
- @ifset MSP430
- * MSP430:: @command{ld} and MSP430
- @end ifset
-+@ifset NDS32
-+* NDS32:: @command{ld} and NDS32
-+@end ifset
- @ifset POWERPC
- * PowerPC ELF32:: @command{ld} and PowerPC 32-bit ELF Support
- @end ifset
-@@ -6680,6 +6684,54 @@
- @end table
-
- @ifclear GENERIC
-+@lowersections
-+@end ifclear
-+@end ifset
-+
-+@ifset NDS32
-+@ifclear GENERIC
-+@raisesections
-+@end ifclear
-+
-+@node NDS32
-+@section @code{ld} and NDS32
-+@kindex relaxing on NDS32
-+For NDS32, there are some options to select relaxation behavior. The linker
-+relaxes objects according to these options.
-+
-+@table @code
-+@item @samp{--m[no-]fp-as-gp}
-+Disable/enable fp-as-gp relaxation.
-+
-+@item @samp{--mexport-symbols=FILE}
-+Exporting symbols and their address into FILE as linker script.
-+
-+@item @samp{--m[no-]ex9}
-+Disable/enable link-time EX9 relaxation.
-+
-+@item @samp{--mexport-ex9=FILE}
-+Export the EX9 table after linking.
-+
-+@item @samp{--mimport-ex9=FILE}
-+Import the Ex9 table for EX9 relaxation.
-+
-+@item @samp{--mupdate-ex9}
-+Update the existing EX9 table.
-+
-+@item @samp{--mex9-limit=NUM}
-+Maximum number of entries in the ex9 table.
-+
-+@item @samp{--mex9-loop-aware}
-+Avoid generating the EX9 instruction inside the loop.
-+
-+@item @samp{--m[no-]ifc}
-+Disable/enable the link-time IFC optimization.
-+
-+@item @samp{--mifc-loop-aware}
-+Avoid generating the IFC instruction inside the loop.
-+@end table
-+
-+@ifclear GENERIC
- @lowersections
- @end ifclear
- @end ifset
-diff -Nur binutils-2.24.orig/ld/Makefile.am binutils-2.24/ld/Makefile.am
---- binutils-2.24.orig/ld/Makefile.am 2013-11-26 12:37:33.000000000 +0100
-+++ binutils-2.24/ld/Makefile.am 2016-06-30 21:26:12.797898714 +0200
-@@ -396,6 +396,12 @@
- emsp430xW425.c \
- emsp430xW427.c \
- emsp430X.c \
-+ ends32elf.c \
-+ ends32elf16m.c \
-+ ends32elf_linux.c \
-+ ends32belf.c \
-+ ends32belf16m.c \
-+ ends32belf_linux.c \
- enews.c \
- ens32knbsd.c \
- eor32.c \
-@@ -1752,6 +1758,30 @@
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
- ${GENSCRIPTS} msp430X "$(tdir_msp430X)" msp430all
-+ends32elf.c: $(srcdir)/emulparams/nds32elf.sh \
-+ $(ELF_DEPS) $(srcdir)/emultempl/nds32elf.em \
-+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
-+ ${GENSCRIPTS} nds32elf "$(tdir_nds32)"
-+ends32elf16m.c: $(srcdir)/emulparams/nds32elf16m.sh \
-+ $(ELF_DEPS) $(srcdir)/emultempl/nds32elf.em \
-+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
-+ ${GENSCRIPTS} nds32elf16m "$(tdir_nds32)"
-+ends32belf.c: $(srcdir)/emulparams/nds32belf.sh \
-+ $(ELF_DEPS) $(srcdir)/emultempl/nds32elf.em \
-+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
-+ ${GENSCRIPTS} nds32belf "$(tdir_nds32belf)"
-+ends32belf16m.c: $(srcdir)/emulparams/nds32belf16m.sh \
-+ $(ELF_DEPS) $(srcdir)/emultempl/nds32elf.em \
-+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
-+ ${GENSCRIPTS} nds32belf16m "$(tdir_nds32belf)"
-+ends32elf_linux.c: $(srcdir)/emulparams/nds32elf_linux.sh \
-+ $(ELF_DEPS) $(srcdir)/emultempl/nds32elf.em \
-+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
-+ ${GENSCRIPTS} nds32elf_linux "$(tdir_nds32elf_linux)"
-+ends32belf_linux.c: $(srcdir)/emulparams/nds32belf_linux.sh \
-+ $(ELF_DEPS) $(srcdir)/emultempl/nds32elf.em \
-+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
-+ ${GENSCRIPTS} nds32belf_linux "$(tdir_nds32belf_linux)"
- enews.c: $(srcdir)/emulparams/news.sh \
- $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/aout.sc ${GEN_DEPENDS}
- ${GENSCRIPTS} news "$(tdir_news)"
-diff -Nur binutils-2.24.orig/ld/Makefile.in binutils-2.24/ld/Makefile.in
---- binutils-2.24.orig/ld/Makefile.in 2013-11-26 12:37:33.000000000 +0100
-+++ binutils-2.24/ld/Makefile.in 2016-06-30 21:26:12.801898869 +0200
-@@ -1,9 +1,9 @@
--# Makefile.in generated by automake 1.11.1 from Makefile.am.
-+# Makefile.in generated by automake 1.11.6 from Makefile.am.
- # @configure_input@
-
- # Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
--# 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation,
--# Inc.
-+# 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software
-+# Foundation, Inc.
- # This Makefile.in is free software; the Free Software Foundation
- # gives unlimited permission to copy and/or distribute it,
- # with or without modifications, as long as this notice is preserved.
-@@ -35,6 +35,23 @@
-
-
- VPATH = @srcdir@
-+am__make_dryrun = \
-+ { \
-+ am__dry=no; \
-+ case $$MAKEFLAGS in \
-+ *\\[\ \ ]*) \
-+ echo 'am--echo: ; @echo "AM" OK' | $(MAKE) -f - 2>/dev/null \
-+ | grep '^AM OK$$' >/dev/null || am__dry=yes;; \
-+ *) \
-+ for am__flg in $$MAKEFLAGS; do \
-+ case $$am__flg in \
-+ *=*|--*) ;; \
-+ *n*) am__dry=yes; break;; \
-+ esac; \
-+ done;; \
-+ esac; \
-+ test $$am__dry = yes; \
-+ }
- pkgdatadir = $(datadir)/@PACKAGE@
- pkgincludedir = $(includedir)/@PACKAGE@
- pkglibdir = $(libdir)/@PACKAGE@
-@@ -126,14 +143,14 @@
- --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \
- $(LDFLAGS) -o $@
- @MAINTAINER_MODE_FALSE@am__skiplex = test -f $@ ||
--LEXCOMPILE = $(LEX) $(LFLAGS) $(AM_LFLAGS)
-+LEXCOMPILE = $(LEX) $(AM_LFLAGS) $(LFLAGS)
- LTLEXCOMPILE = $(LIBTOOL) $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \
-- --mode=compile $(LEX) $(LFLAGS) $(AM_LFLAGS)
-+ --mode=compile $(LEX) $(AM_LFLAGS) $(LFLAGS)
- YLWRAP = $(top_srcdir)/../ylwrap
- @MAINTAINER_MODE_FALSE@am__skipyacc = test -f $@ ||
--YACCCOMPILE = $(YACC) $(YFLAGS) $(AM_YFLAGS)
-+YACCCOMPILE = $(YACC) $(AM_YFLAGS) $(YFLAGS)
- LTYACCCOMPILE = $(LIBTOOL) $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \
-- --mode=compile $(YACC) $(YFLAGS) $(AM_YFLAGS)
-+ --mode=compile $(YACC) $(AM_YFLAGS) $(YFLAGS)
- SOURCES = $(libldtestplug_la_SOURCES) $(ld_new_SOURCES) \
- $(EXTRA_ld_new_SOURCES)
- INFO_DEPS = ld.info
-@@ -154,6 +171,11 @@
- install-pdf-recursive install-ps-recursive install-recursive \
- installcheck-recursive installdirs-recursive pdf-recursive \
- ps-recursive uninstall-recursive
-+am__can_run_installinfo = \
-+ case $$AM_UPDATE_INFO_DIR in \
-+ n|no|NO) false;; \
-+ *) (install-info --version) >/dev/null 2>&1;; \
-+ esac
- am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`;
- am__vpath_adj = case $$p in \
- $(srcdir)/*) f=`echo "$$p" | sed "s|^$$srcdirstrip/||"`;; \
-@@ -175,6 +197,12 @@
- am__base_list = \
- sed '$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;s/\n/ /g' | \
- sed '$$!N;$$!N;$$!N;$$!N;s/\n/ /g'
-+am__uninstall_files_from_dir = { \
-+ test -z "$$files" \
-+ || { test ! -d "$$dir" && test ! -f "$$dir" && test ! -r "$$dir"; } \
-+ || { echo " ( cd '$$dir' && rm -f" $$files ")"; \
-+ $(am__cd) "$$dir" && rm -f $$files; }; \
-+ }
- man1dir = $(mandir)/man1
- NROFF = nroff
- MANS = $(man_MANS)
-@@ -704,6 +732,12 @@
- emsp430xW425.c \
- emsp430xW427.c \
- emsp430X.c \
-+ ends32elf.c \
-+ ends32elf16m.c \
-+ ends32elf_linux.c \
-+ ends32belf.c \
-+ ends32belf16m.c \
-+ ends32belf_linux.c \
- enews.c \
- ens32knbsd.c \
- eor32.c \
-@@ -953,7 +987,7 @@
-
- .SUFFIXES:
- .SUFFIXES: .c .dvi .l .lo .o .obj .ps .y
--am--refresh:
-+am--refresh: Makefile
- @:
- $(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(am__configure_deps)
- @for dep in $?; do \
-@@ -989,10 +1023,8 @@
- $(am__aclocal_m4_deps):
-
- config.h: stamp-h1
-- @if test ! -f $@; then \
-- rm -f stamp-h1; \
-- $(MAKE) $(AM_MAKEFLAGS) stamp-h1; \
-- else :; fi
-+ @if test ! -f $@; then rm -f stamp-h1; else :; fi
-+ @if test ! -f $@; then $(MAKE) $(AM_MAKEFLAGS) stamp-h1; else :; fi
-
- stamp-h1: $(srcdir)/config.in $(top_builddir)/config.status
- @rm -f stamp-h1
-@@ -1015,12 +1047,15 @@
- echo "rm -f \"$${dir}/so_locations\""; \
- rm -f "$${dir}/so_locations"; \
- done
--libldtestplug.la: $(libldtestplug_la_OBJECTS) $(libldtestplug_la_DEPENDENCIES)
-+libldtestplug.la: $(libldtestplug_la_OBJECTS) $(libldtestplug_la_DEPENDENCIES) $(EXTRA_libldtestplug_la_DEPENDENCIES)
- $(libldtestplug_la_LINK) $(am_libldtestplug_la_rpath) $(libldtestplug_la_OBJECTS) $(libldtestplug_la_LIBADD) $(LIBS)
- install-binPROGRAMS: $(bin_PROGRAMS)
- @$(NORMAL_INSTALL)
-- test -z "$(bindir)" || $(MKDIR_P) "$(DESTDIR)$(bindir)"
- @list='$(bin_PROGRAMS)'; test -n "$(bindir)" || list=; \
-+ if test -n "$$list"; then \
-+ echo " $(MKDIR_P) '$(DESTDIR)$(bindir)'"; \
-+ $(MKDIR_P) "$(DESTDIR)$(bindir)" || exit 1; \
-+ fi; \
- for p in $$list; do echo "$$p $$p"; done | \
- sed 's/$(EXEEXT)$$//' | \
- while read p p1; do if test -f $$p || test -f $$p1; \
-@@ -1061,16 +1096,12 @@
- echo " rm -f" $$list; \
- rm -f $$list
- ldgram.h: ldgram.c
-- @if test ! -f $@; then \
-- rm -f ldgram.c; \
-- $(MAKE) $(AM_MAKEFLAGS) ldgram.c; \
-- else :; fi
-+ @if test ! -f $@; then rm -f ldgram.c; else :; fi
-+ @if test ! -f $@; then $(MAKE) $(AM_MAKEFLAGS) ldgram.c; else :; fi
- deffilep.h: deffilep.c
-- @if test ! -f $@; then \
-- rm -f deffilep.c; \
-- $(MAKE) $(AM_MAKEFLAGS) deffilep.c; \
-- else :; fi
--ld-new$(EXEEXT): $(ld_new_OBJECTS) $(ld_new_DEPENDENCIES)
-+ @if test ! -f $@; then rm -f deffilep.c; else :; fi
-+ @if test ! -f $@; then $(MAKE) $(AM_MAKEFLAGS) deffilep.c; else :; fi
-+ld-new$(EXEEXT): $(ld_new_OBJECTS) $(ld_new_DEPENDENCIES) $(EXTRA_ld_new_DEPENDENCIES)
- @rm -f ld-new$(EXEEXT)
- $(LINK) $(ld_new_OBJECTS) $(ld_new_LDADD) $(LIBS)
-
-@@ -1398,6 +1429,12 @@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/emsp430xW423.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/emsp430xW425.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/emsp430xW427.Po@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ends32belf.Po@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ends32belf16m.Po@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ends32belf_linux.Po@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ends32elf.Po@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ends32elf16m.Po@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ends32elf_linux.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/enews.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ens32knbsd.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eor32.Po@am__quote@
-@@ -1592,9 +1629,7 @@
-
- uninstall-info-am:
- @$(PRE_UNINSTALL)
-- @if test -d '$(DESTDIR)$(infodir)' && \
-- (install-info --version && \
-- install-info --version 2>&1 | sed 1q | grep -i -v debian) >/dev/null 2>&1; then \
-+ @if test -d '$(DESTDIR)$(infodir)' && $(am__can_run_installinfo); then \
- list='$(INFO_DEPS)'; \
- for file in $$list; do \
- relfile=`echo "$$file" | sed 's|^.*/||'`; \
-@@ -1666,11 +1701,18 @@
- done
- install-man1: $(man_MANS)
- @$(NORMAL_INSTALL)
-- test -z "$(man1dir)" || $(MKDIR_P) "$(DESTDIR)$(man1dir)"
-- @list=''; test -n "$(man1dir)" || exit 0; \
-- { for i in $$list; do echo "$$i"; done; \
-- l2='$(man_MANS)'; for i in $$l2; do echo "$$i"; done | \
-- sed -n '/\.1[a-z]*$$/p'; \
-+ @list1=''; \
-+ list2='$(man_MANS)'; \
-+ test -n "$(man1dir)" \
-+ && test -n "`echo $$list1$$list2`" \
-+ || exit 0; \
-+ echo " $(MKDIR_P) '$(DESTDIR)$(man1dir)'"; \
-+ $(MKDIR_P) "$(DESTDIR)$(man1dir)" || exit 1; \
-+ { for i in $$list1; do echo "$$i"; done; \
-+ if test -n "$$list2"; then \
-+ for i in $$list2; do echo "$$i"; done \
-+ | sed -n '/\.1[a-z]*$$/p'; \
-+ fi; \
- } | while read p; do \
- if test -f $$p; then d=; else d="$(srcdir)/"; fi; \
- echo "$$d$$p"; echo "$$p"; \
-@@ -1699,9 +1741,7 @@
- sed -n '/\.1[a-z]*$$/p'; \
- } | sed -e 's,.*/,,;h;s,.*\.,,;s,^[^1][0-9a-z]*$$,1,;x' \
- -e 's,\.[0-9a-z]*$$,,;$(transform);G;s,\n,.,'`; \
-- test -z "$$files" || { \
-- echo " ( cd '$(DESTDIR)$(man1dir)' && rm -f" $$files ")"; \
-- cd "$(DESTDIR)$(man1dir)" && rm -f $$files; }
-+ dir='$(DESTDIR)$(man1dir)'; $(am__uninstall_files_from_dir)
-
- # This directory's subdirectories are mostly independent; you can cd
- # into them and run `make' without going through this Makefile.
-@@ -1837,12 +1877,12 @@
-
- distclean-tags:
- -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
--site.exp: Makefile
-+site.exp: Makefile $(EXTRA_DEJAGNU_SITE_CONFIG)
- @echo 'Making a new site.exp file...'
- @echo '## these variables are automatically generated by make ##' >site.tmp
- @echo '# Do not edit here. If you wish to override these values' >>site.tmp
- @echo '# edit the last section' >>site.tmp
-- @echo 'set srcdir $(srcdir)' >>site.tmp
-+ @echo 'set srcdir "$(srcdir)"' >>site.tmp
- @echo "set objdir `pwd`" >>site.tmp
- @echo 'set build_alias "$(build_alias)"' >>site.tmp
- @echo 'set build_triplet $(build_triplet)' >>site.tmp
-@@ -1850,9 +1890,16 @@
- @echo 'set host_triplet $(host_triplet)' >>site.tmp
- @echo 'set target_alias "$(target_alias)"' >>site.tmp
- @echo 'set target_triplet $(target_triplet)' >>site.tmp
-- @echo '## All variables above are generated by configure. Do Not Edit ##' >>site.tmp
-- @test ! -f site.exp || \
-- sed '1,/^## All variables above are.*##/ d' site.exp >> site.tmp
-+ @list='$(EXTRA_DEJAGNU_SITE_CONFIG)'; for f in $$list; do \
-+ echo "## Begin content included from file $$f. Do not modify. ##" \
-+ && cat `test -f "$$f" || echo '$(srcdir)/'`$$f \
-+ && echo "## End content included from file $$f. ##" \
-+ || exit 1; \
-+ done >> site.tmp
-+ @echo "## End of auto-generated content; you can edit from here. ##" >> site.tmp
-+ @if test -f site.exp; then \
-+ sed -e '1,/^## End of auto-generated content.*##/d' site.exp >> site.tmp; \
-+ fi
- @-rm -f site.bak
- @test ! -f site.exp || mv site.exp site.bak
- @mv site.tmp site.exp
-@@ -1884,10 +1931,15 @@
-
- installcheck: installcheck-recursive
- install-strip:
-- $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
-- install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
-- `test -z '$(STRIP)' || \
-- echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
-+ if test -z '$(STRIP)'; then \
-+ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
-+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
-+ install; \
-+ else \
-+ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
-+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
-+ "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \
-+ fi
- mostlyclean-generic:
- -test -z "$(MOSTLYCLEANFILES)" || rm -f $(MOSTLYCLEANFILES)
-
-@@ -1940,8 +1992,11 @@
-
- install-dvi-am: $(DVIS)
- @$(NORMAL_INSTALL)
-- test -z "$(dvidir)" || $(MKDIR_P) "$(DESTDIR)$(dvidir)"
- @list='$(DVIS)'; test -n "$(dvidir)" || list=; \
-+ if test -n "$$list"; then \
-+ echo " $(MKDIR_P) '$(DESTDIR)$(dvidir)'"; \
-+ $(MKDIR_P) "$(DESTDIR)$(dvidir)" || exit 1; \
-+ fi; \
- for p in $$list; do \
- if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
- echo "$$d$$p"; \
-@@ -1956,18 +2011,22 @@
-
- install-html-am: $(HTMLS)
- @$(NORMAL_INSTALL)
-- test -z "$(htmldir)" || $(MKDIR_P) "$(DESTDIR)$(htmldir)"
- @list='$(HTMLS)'; list2=; test -n "$(htmldir)" || list=; \
-+ if test -n "$$list"; then \
-+ echo " $(MKDIR_P) '$(DESTDIR)$(htmldir)'"; \
-+ $(MKDIR_P) "$(DESTDIR)$(htmldir)" || exit 1; \
-+ fi; \
- for p in $$list; do \
- if test -f "$$p" || test -d "$$p"; then d=; else d="$(srcdir)/"; fi; \
- $(am__strip_dir) \
-- if test -d "$$d$$p"; then \
-+ d2=$$d$$p; \
-+ if test -d "$$d2"; then \
- echo " $(MKDIR_P) '$(DESTDIR)$(htmldir)/$$f'"; \
- $(MKDIR_P) "$(DESTDIR)$(htmldir)/$$f" || exit 1; \
-- echo " $(INSTALL_DATA) '$$d$$p'/* '$(DESTDIR)$(htmldir)/$$f'"; \
-- $(INSTALL_DATA) "$$d$$p"/* "$(DESTDIR)$(htmldir)/$$f" || exit $$?; \
-+ echo " $(INSTALL_DATA) '$$d2'/* '$(DESTDIR)$(htmldir)/$$f'"; \
-+ $(INSTALL_DATA) "$$d2"/* "$(DESTDIR)$(htmldir)/$$f" || exit $$?; \
- else \
-- list2="$$list2 $$d$$p"; \
-+ list2="$$list2 $$d2"; \
- fi; \
- done; \
- test -z "$$list2" || { echo "$$list2" | $(am__base_list) | \
-@@ -1979,9 +2038,12 @@
-
- install-info-am: $(INFO_DEPS)
- @$(NORMAL_INSTALL)
-- test -z "$(infodir)" || $(MKDIR_P) "$(DESTDIR)$(infodir)"
- @srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`; \
- list='$(INFO_DEPS)'; test -n "$(infodir)" || list=; \
-+ if test -n "$$list"; then \
-+ echo " $(MKDIR_P) '$(DESTDIR)$(infodir)'"; \
-+ $(MKDIR_P) "$(DESTDIR)$(infodir)" || exit 1; \
-+ fi; \
- for file in $$list; do \
- case $$file in \
- $(srcdir)/*) file=`echo "$$file" | sed "s|^$$srcdirstrip/||"`;; \
-@@ -1999,8 +2061,7 @@
- echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(infodir)'"; \
- $(INSTALL_DATA) $$files "$(DESTDIR)$(infodir)" || exit $$?; done
- @$(POST_INSTALL)
-- @if (install-info --version && \
-- install-info --version 2>&1 | sed 1q | grep -i -v debian) >/dev/null 2>&1; then \
-+ @if $(am__can_run_installinfo); then \
- list='$(INFO_DEPS)'; test -n "$(infodir)" || list=; \
- for file in $$list; do \
- relfile=`echo "$$file" | sed 's|^.*/||'`; \
-@@ -2014,8 +2075,11 @@
-
- install-pdf-am: $(PDFS)
- @$(NORMAL_INSTALL)
-- test -z "$(pdfdir)" || $(MKDIR_P) "$(DESTDIR)$(pdfdir)"
- @list='$(PDFS)'; test -n "$(pdfdir)" || list=; \
-+ if test -n "$$list"; then \
-+ echo " $(MKDIR_P) '$(DESTDIR)$(pdfdir)'"; \
-+ $(MKDIR_P) "$(DESTDIR)$(pdfdir)" || exit 1; \
-+ fi; \
- for p in $$list; do \
- if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
- echo "$$d$$p"; \
-@@ -2027,8 +2091,11 @@
-
- install-ps-am: $(PSS)
- @$(NORMAL_INSTALL)
-- test -z "$(psdir)" || $(MKDIR_P) "$(DESTDIR)$(psdir)"
- @list='$(PSS)'; test -n "$(psdir)" || list=; \
-+ if test -n "$$list"; then \
-+ echo " $(MKDIR_P) '$(DESTDIR)$(psdir)'"; \
-+ $(MKDIR_P) "$(DESTDIR)$(psdir)" || exit 1; \
-+ fi; \
- for p in $$list; do \
- if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
- echo "$$d$$p"; \
-@@ -3236,6 +3303,30 @@
- $(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf32msp430.sc \
- ${GEN_DEPENDS}
- ${GENSCRIPTS} msp430X "$(tdir_msp430X)" msp430all
-+ends32elf.c: $(srcdir)/emulparams/nds32elf.sh \
-+ $(ELF_DEPS) $(srcdir)/emultempl/nds32elf.em \
-+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
-+ ${GENSCRIPTS} nds32elf "$(tdir_nds32)"
-+ends32elf16m.c: $(srcdir)/emulparams/nds32elf16m.sh \
-+ $(ELF_DEPS) $(srcdir)/emultempl/nds32elf.em \
-+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
-+ ${GENSCRIPTS} nds32elf16m "$(tdir_nds32)"
-+ends32belf.c: $(srcdir)/emulparams/nds32belf.sh \
-+ $(ELF_DEPS) $(srcdir)/emultempl/nds32elf.em \
-+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
-+ ${GENSCRIPTS} nds32belf "$(tdir_nds32belf)"
-+ends32belf16m.c: $(srcdir)/emulparams/nds32belf16m.sh \
-+ $(ELF_DEPS) $(srcdir)/emultempl/nds32elf.em \
-+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
-+ ${GENSCRIPTS} nds32belf16m "$(tdir_nds32belf)"
-+ends32elf_linux.c: $(srcdir)/emulparams/nds32elf_linux.sh \
-+ $(ELF_DEPS) $(srcdir)/emultempl/nds32elf.em \
-+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
-+ ${GENSCRIPTS} nds32elf_linux "$(tdir_nds32elf_linux)"
-+ends32belf_linux.c: $(srcdir)/emulparams/nds32belf_linux.sh \
-+ $(ELF_DEPS) $(srcdir)/emultempl/nds32elf.em \
-+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
-+ ${GENSCRIPTS} nds32belf_linux "$(tdir_nds32belf_linux)"
- enews.c: $(srcdir)/emulparams/news.sh \
- $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/aout.sc ${GEN_DEPENDS}
- ${GENSCRIPTS} news "$(tdir_news)"
-diff -Nur binutils-2.24.orig/ld/NEWS binutils-2.24/ld/NEWS
---- binutils-2.24.orig/ld/NEWS 2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.24/ld/NEWS 2016-06-30 21:26:12.801898869 +0200
-@@ -1,5 +1,7 @@
- -*- text -*-
-
-+* Add support for the Andes NDS32.
-+
- Changes in 2.24:
-
- * Add LOG2CEIL() builtin function to the linker script language
-diff -Nur binutils-2.24.orig/ld/scripttempl/nds32elf.sc binutils-2.24/ld/scripttempl/nds32elf.sc
---- binutils-2.24.orig/ld/scripttempl/nds32elf.sc 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/scripttempl/nds32elf.sc 2016-06-30 21:26:12.801898869 +0200
-@@ -0,0 +1,614 @@
-+# This file is variant of elf.sc. For nds32, because the data will be
-+# classified into different sections according to their size, this script
-+# describe these sections map. The order is ".sdata_d, .sdata_w, .sdata_h,
-+# .sdata_b, , sdata_f, .sbss_f, .sbss_b, .sbss_h, .sbss_w, .sbss_d". In
-+# this order we do not have to consider the alignment issue between these
-+# sections.
-+
-+if test -n "$NOP"; then
-+ FILL="=$NOP"
-+else
-+ FILL=
-+fi
-+
-+test -z "$RODATA_NAME" && RODATA_NAME=rodata
-+test -z "$SDATA_NAME" && SDATA_NAME=sdata
-+test -z "$SBSS_NAME" && SBSS_NAME=sbss
-+test -z "$BSS_NAME" && BSS_NAME=bss
-+test -z "$ENTRY" && ENTRY=${USER_LABEL_PREFIX}_start
-+test -z "${BIG_OUTPUT_FORMAT}" && BIG_OUTPUT_FORMAT=${OUTPUT_FORMAT}
-+test -z "${LITTLE_OUTPUT_FORMAT}" && LITTLE_OUTPUT_FORMAT=${OUTPUT_FORMAT}
-+if [ -z "$MACHINE" ]; then OUTPUT_ARCH=${ARCH}; else OUTPUT_ARCH=${ARCH}:${MACHINE}; fi
-+test -z "${ELFSIZE}" && ELFSIZE=32
-+test -z "${ALIGNMENT}" && ALIGNMENT="${ELFSIZE} / 8"
-+test "$LD_FLAG" = "N" && DATA_ADDR=.
-+test -z "${ETEXT_NAME}" && ETEXT_NAME=${USER_LABEL_PREFIX}etext
-+test -n "$CREATE_SHLIB$CREATE_PIE" && test -n "$SHLIB_DATA_ADDR" && COMMONPAGESIZE=""
-+test -z "$CREATE_SHLIB$CREATE_PIE" && test -n "$DATA_ADDR" && COMMONPAGESIZE=""
-+test -n "$RELRO_NOW" && unset SEPARATE_GOTPLT
-+test -z "$ATTRS_SECTIONS" && ATTRS_SECTIONS=".gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }"
-+DATA_SEGMENT_ALIGN="ALIGN(${SEGMENT_SIZE}) + (. & (${MAXPAGESIZE} - 1))"
-+DATA_SEGMENT_RELRO_END=""
-+DATA_SEGMENT_END=""
-+if test -n "${COMMONPAGESIZE}"; then
-+ DATA_SEGMENT_ALIGN="ALIGN (${SEGMENT_SIZE}) - ((${MAXPAGESIZE} - .) & (${MAXPAGESIZE} - 1)); . = DATA_SEGMENT_ALIGN (${MAXPAGESIZE}, ${COMMONPAGESIZE})"
-+ DATA_SEGMENT_END=". = DATA_SEGMENT_END (.);"
-+ DATA_SEGMENT_RELRO_END=". = DATA_SEGMENT_RELRO_END (${SEPARATE_GOTPLT-0}, .);"
-+fi
-+if test -z "${INITIAL_READONLY_SECTIONS}${CREATE_SHLIB}"; then
-+ INITIAL_READONLY_SECTIONS=".interp ${RELOCATING-0} : { *(.interp) }"
-+fi
-+if test -z "$PLT"; then
-+ IPLT=".iplt ${RELOCATING-0} : { *(.iplt) }"
-+ PLT=".plt ${RELOCATING-0} : { *(.plt)${IREL_IN_PLT+ *(.iplt)} }
-+ ${IREL_IN_PLT-$IPLT}"
-+fi
-+test -n "${DATA_PLT-${BSS_PLT-text}}" && TEXT_PLT=
-+if test -z "$GOT"; then
-+ if test -z "$SEPARATE_GOTPLT"; then
-+ GOT=".got ${RELOCATING-0} : { *(.got.plt) *(.igot.plt) *(.got) *(.igot) }"
-+ else
-+ GOT=".got ${RELOCATING-0} : { *(.got) *(.igot) }"
-+ GOTPLT=".got.plt ${RELOCATING-0} : { *(.got.plt) *(.igot.plt) }"
-+ fi
-+fi
-+REL_IFUNC=".rel.ifunc ${RELOCATING-0} : { *(.rel.ifunc) }"
-+RELA_IFUNC=".rela.ifunc ${RELOCATING-0} : { *(.rela.ifunc) }"
-+REL_IPLT=".rel.iplt ${RELOCATING-0} :
-+ {
-+ ${RELOCATING+${CREATE_SHLIB-PROVIDE_HIDDEN (${USER_LABEL_PREFIX}__rel_iplt_start = .);}}
-+ *(.rel.iplt)
-+ ${RELOCATING+${CREATE_SHLIB-PROVIDE_HIDDEN (${USER_LABEL_PREFIX}__rel_iplt_end = .);}}
-+ }"
-+RELA_IPLT=".rela.iplt ${RELOCATING-0} :
-+ {
-+ ${RELOCATING+${CREATE_SHLIB-PROVIDE_HIDDEN (${USER_LABEL_PREFIX}__rela_iplt_start = .);}}
-+ *(.rela.iplt)
-+ ${RELOCATING+${CREATE_SHLIB-PROVIDE_HIDDEN (${USER_LABEL_PREFIX}__rela_iplt_end = .);}}
-+ }"
-+DYNAMIC=".dynamic ${RELOCATING-0} : { *(.dynamic) }"
-+RODATA=".${RODATA_NAME} ${RELOCATING-0} : { *(.${RODATA_NAME}${RELOCATING+ .${RODATA_NAME}.* .gnu.linkonce.r.*}) }"
-+DATARELRO=".data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro .data.rel.ro.* .gnu.linkonce.d.rel.ro.*) }"
-+DISCARDED="/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }"
-+if test -z "${NO_SMALL_DATA}"; then
-+ SBSS=".sbss_b ${RELOCATING-0} :
-+ {
-+ *(.sbss_b${RELOCATING+ .sbss_b.*})
-+ *(.scommon_b${RELOCATING+ .scommon_b.*})
-+ ${RELOCATING+. = ALIGN(2);}
-+ }
-+ .sbss_h ${RELOCATING-0} :
-+ {
-+ *(.sbss_h${RELOCATING+ .sbss_h.*})
-+ *(.scommon_h${RELOCATING+ .scommon_h.*})
-+ ${RELOCATING+. = ALIGN(4);}
-+ }
-+ .sbss_w ${RELOCATING-0} :
-+ {
-+ *(.sbss_w${RELOCATING+ .sbss_w.*})
-+ *(.scommon_w${RELOCATING+ .scommon_w.*})
-+ *(.dynsbss)
-+ *(.scommon)
-+ ${RELOCATING+. = ALIGN(8);}
-+ }
-+ .sbss_d ${RELOCATING-0} :
-+ {
-+ *(.sbss_d${RELOCATING+ .sbss_d.*})
-+ *(.scommon_d${RELOCATING+ .scommon_d.*})
-+ ${RELOCATING+PROVIDE (__sbss_end = .);}
-+ ${RELOCATING+PROVIDE (___sbss_end = .);}
-+ }"
-+ SBSS2=".${SBSS_NAME}2 ${RELOCATING-0} : { *(.${SBSS_NAME}2${RELOCATING+ .${SBSS_NAME}2.* .gnu.linkonce.sb2.*}) }"
-+ SDATA="/* We want the small data sections together, so single-instruction offsets
-+ can access them all, and initialized data all before uninitialized, so
-+ we can shorten the on-disk segment size. */
-+ .${SDATA_NAME} ${RELOCATING-0} :
-+ {
-+ ${RELOCATING+${SDATA_START_SYMBOLS}}
-+ ${CREATE_SHLIB+*(.${SDATA_NAME}2 .${SDATA_NAME}2.* .gnu.linkonce.s2.*)}
-+ *(.${SDATA_NAME}${RELOCATING+ .${SDATA_NAME}.* .gnu.linkonce.s.*})
-+ }
-+ .sdata_d ${RELOCATING-0} :
-+ {
-+ *(.sdata_d${RELOCATING+ .sdata_d.*})
-+ }
-+ .sdata_w ${RELOCATING-0} :
-+ {
-+ *(.sdata_w${RELOCATING+ .sdata_w.*})
-+ }
-+ .sdata_h ${RELOCATING-0} :
-+ {
-+ *(.sdata_h${RELOCATING+ .sdata_h.*})
-+ }
-+ .sdata_b ${RELOCATING-0} :
-+ {
-+ *(.sdata_b${RELOCATING+ .sdata_b.*})
-+ }
-+ .sdata_f ${RELOCATING-0} :
-+ {
-+ *(.sdata_f${RELOCATING+ .sdata_f.*})
-+ }"
-+ SDATA2=".${SDATA_NAME}2 ${RELOCATING-0} :
-+ {
-+ ${RELOCATING+${SDATA2_START_SYMBOLS}}
-+ *(.${SDATA_NAME}2${RELOCATING+ .${SDATA_NAME}2.* .gnu.linkonce.s2.*})
-+ }"
-+ REL_SDATA=".rel.${SDATA_NAME} ${RELOCATING-0} : { *(.rel.${SDATA_NAME}${RELOCATING+ .rel.${SDATA_NAME}.* .rel.gnu.linkonce.s.*}) }
-+ .rela.${SDATA_NAME} ${RELOCATING-0} : { *(.rela.${SDATA_NAME}${RELOCATING+ .rela.${SDATA_NAME}.* .rela.gnu.linkonce.s.*}) }"
-+ REL_SBSS=".rel.${SBSS_NAME} ${RELOCATING-0} : { *(.rel.${SBSS_NAME}${RELOCATING+ .rel.${SBSS_NAME}.* .rel.gnu.linkonce.sb.*}) }
-+ .rela.${SBSS_NAME} ${RELOCATING-0} : { *(.rela.${SBSS_NAME}${RELOCATING+ .rela.${SBSS_NAME}.* .rela.gnu.linkonce.sb.*}) }"
-+ REL_SDATA2=".rel.${SDATA_NAME}2 ${RELOCATING-0} : { *(.rel.${SDATA_NAME}2${RELOCATING+ .rel.${SDATA_NAME}2.* .rel.gnu.linkonce.s2.*}) }
-+ .rela.${SDATA_NAME}2 ${RELOCATING-0} : { *(.rela.${SDATA_NAME}2${RELOCATING+ .rela.${SDATA_NAME}2.* .rela.gnu.linkonce.s2.*}) }"
-+ REL_SBSS2=".rel.${SBSS_NAME}2 ${RELOCATING-0} : { *(.rel.${SBSS_NAME}2${RELOCATING+ .rel.${SBSS_NAME}2.* .rel.gnu.linkonce.sb2.*}) }
-+ .rela.${SBSS_NAME}2 ${RELOCATING-0} : { *(.rela.${SBSS_NAME}2${RELOCATING+ .rela.${SBSS_NAME}2.* .rela.gnu.linkonce.sb2.*}) }"
-+else
-+ NO_SMALL_DATA=" "
-+fi
-+if test -z "${DATA_GOT}"; then
-+ if test -n "${NO_SMALL_DATA}"; then
-+ DATA_GOT=" "
-+ fi
-+fi
-+if test -z "${SDATA_GOT}"; then
-+ if test -z "${NO_SMALL_DATA}"; then
-+ SDATA_GOT=" "
-+ fi
-+fi
-+test -n "$SEPARATE_GOTPLT" && SEPARATE_GOTPLT=" "
-+test "${LARGE_SECTIONS}" = "yes" && REL_LARGE="
-+ .rel.ldata ${RELOCATING-0} : { *(.rel.ldata${RELOCATING+ .rel.ldata.* .rel.gnu.linkonce.l.*}) }
-+ .rela.ldata ${RELOCATING-0} : { *(.rela.ldata${RELOCATING+ .rela.ldata.* .rela.gnu.linkonce.l.*}) }
-+ .rel.lbss ${RELOCATING-0} : { *(.rel.lbss${RELOCATING+ .rel.lbss.* .rel.gnu.linkonce.lb.*}) }
-+ .rela.lbss ${RELOCATING-0} : { *(.rela.lbss${RELOCATING+ .rela.lbss.* .rela.gnu.linkonce.lb.*}) }
-+ .rel.lrodata ${RELOCATING-0} : { *(.rel.lrodata${RELOCATING+ .rel.lrodata.* .rel.gnu.linkonce.lr.*}) }
-+ .rela.lrodata ${RELOCATING-0} : { *(.rela.lrodata${RELOCATING+ .rela.lrodata.* .rela.gnu.linkonce.lr.*}) }"
-+test "${LARGE_SECTIONS}" = "yes" && LARGE_BSS="
-+ .lbss ${RELOCATING-0} :
-+ {
-+ *(.dynlbss)
-+ *(.lbss${RELOCATING+ .lbss.* .gnu.linkonce.lb.*})
-+ *(LARGE_COMMON)
-+ }"
-+test "${LARGE_SECTIONS}" = "yes" && LARGE_SECTIONS="
-+ .lrodata ${RELOCATING-0} ${RELOCATING+ALIGN(${MAXPAGESIZE}) + (. & (${MAXPAGESIZE} - 1))} :
-+ {
-+ *(.lrodata${RELOCATING+ .lrodata.* .gnu.linkonce.lr.*})
-+ }
-+ .ldata ${RELOCATING-0} ${RELOCATING+ALIGN(${MAXPAGESIZE}) + (. & (${MAXPAGESIZE} - 1))} :
-+ {
-+ *(.ldata${RELOCATING+ .ldata.* .gnu.linkonce.l.*})
-+ ${RELOCATING+. = ALIGN(. != 0 ? ${ALIGNMENT} : 1);}
-+ }"
-+if test "${ENABLE_INITFINI_ARRAY}" = "yes"; then
-+ SORT_INIT_ARRAY="KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))"
-+ SORT_FINI_ARRAY="KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))"
-+ CTORS_IN_INIT_ARRAY="EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o $OTHER_EXCLUDE_FILES) .ctors"
-+ DTORS_IN_FINI_ARRAY="EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o $OTHER_EXCLUDE_FILES) .dtors"
-+else
-+ SORT_INIT_ARRAY="KEEP (*(SORT(.init_array.*)))"
-+ SORT_FINI_ARRAY="KEEP (*(SORT(.fini_array.*)))"
-+ CTORS_IN_INIT_ARRAY=
-+ DTORS_IN_FINI_ARRAY=
-+fi
-+INIT_ARRAY=".init_array ${RELOCATING-0} :
-+ {
-+ ${RELOCATING+${CREATE_SHLIB-PROVIDE_HIDDEN (${USER_LABEL_PREFIX}__init_array_start = .);}}
-+ ${SORT_INIT_ARRAY}
-+ KEEP (*(.init_array ${CTORS_IN_INIT_ARRAY}))
-+ ${RELOCATING+${CREATE_SHLIB-PROVIDE_HIDDEN (${USER_LABEL_PREFIX}__init_array_end = .);}}
-+ }"
-+FINI_ARRAY=".fini_array ${RELOCATING-0} :
-+ {
-+ ${RELOCATING+${CREATE_SHLIB-PROVIDE_HIDDEN (${USER_LABEL_PREFIX}__fini_array_start = .);}}
-+ ${SORT_FINI_ARRAY}
-+ KEEP (*(.fini_array ${DTORS_IN_FINI_ARRAY}))
-+ ${RELOCATING+${CREATE_SHLIB-PROVIDE_HIDDEN (${USER_LABEL_PREFIX}__fini_array_end = .);}}
-+ }"
-+CTOR=".ctors ${CONSTRUCTING-0} :
-+ {
-+ ${CONSTRUCTING+${CTOR_START}}
-+ /* gcc uses crtbegin.o to find the start of
-+ the constructors, so we make sure it is
-+ first. Because this is a wildcard, it
-+ doesn't matter if the user does not
-+ actually link against crtbegin.o; the
-+ linker won't look for a file to match a
-+ wildcard. The wildcard also means that it
-+ doesn't matter which directory crtbegin.o
-+ is in. */
-+
-+ KEEP (*crtbegin.o(.ctors))
-+ KEEP (*crtbegin?.o(.ctors))
-+
-+ /* We don't want to include the .ctor section from
-+ the crtend.o file until after the sorted ctors.
-+ The .ctor section from the crtend file contains the
-+ end of ctors marker and it must be last */
-+
-+ KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o $OTHER_EXCLUDE_FILES) .ctors))
-+ KEEP (*(SORT(.ctors.*)))
-+ KEEP (*(.ctors))
-+ ${CONSTRUCTING+${CTOR_END}}
-+ }"
-+DTOR=".dtors ${CONSTRUCTING-0} :
-+ {
-+ ${CONSTRUCTING+${DTOR_START}}
-+ KEEP (*crtbegin.o(.dtors))
-+ KEEP (*crtbegin?.o(.dtors))
-+ KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o $OTHER_EXCLUDE_FILES) .dtors))
-+ KEEP (*(SORT(.dtors.*)))
-+ KEEP (*(.dtors))
-+ ${CONSTRUCTING+${DTOR_END}}
-+ }"
-+STACK=" .stack ${RELOCATING-0}${RELOCATING+${STACK_ADDR}} :
-+ {
-+ ${RELOCATING+${USER_LABEL_PREFIX}_stack = .;}
-+ *(.stack)
-+ }"
-+
-+SHLIB_TEXT_START_ADDR="SEGMENT_START(\"text-segment\", ${SHLIB_TEXT_START_ADDR:-0})"
-+
-+if [ -z "$SEPARATE_CODE" ]; then
-+ SIZEOF_HEADERS_CODE=" + SIZEOF_HEADERS"
-+else
-+ SIZEOF_HEADERS_CODE=
-+fi
-+
-+# if this is for an embedded system, don't add SIZEOF_HEADERS.
-+if [ -z "$EMBEDDED" ]; then
-+ test -z "${TEXT_BASE_ADDRESS}" && TEXT_BASE_ADDRESS="${TEXT_START_ADDR}${SIZEOF_HEADERS_CODE}"
-+ NDS32_INIT=""
-+else
-+ test -z "${TEXT_BASE_ADDRESS}" && TEXT_BASE_ADDRESS="${TEXT_START_ADDR}"
-+ NDS32_INIT=".nds32_init : { KEEP(*(.nds32_init)) }"
-+fi
-+
-+cat <<EOF
-+OUTPUT_FORMAT("${OUTPUT_FORMAT}", "${BIG_OUTPUT_FORMAT}",
-+ "${LITTLE_OUTPUT_FORMAT}")
-+OUTPUT_ARCH(${OUTPUT_ARCH})
-+${RELOCATING+ENTRY(${ENTRY})}
-+
-+${RELOCATING+${LIB_SEARCH_DIRS}}
-+${RELOCATING+${EXECUTABLE_SYMBOLS}}
-+${RELOCATING+${INPUT_FILES}}
-+${RELOCATING- /* For some reason, the Solaris linker makes bad executables
-+ if gld -r is used and the intermediate file has sections starting
-+ at non-zero addresses. Could be a Solaris ld bug, could be a GNU ld
-+ bug. But for now assigning the zero vmas works. */}
-+
-+SECTIONS
-+{
-+ /* Read-only sections, merged into text segment: */
-+ ${CREATE_SHLIB-${CREATE_PIE-${RELOCATING+PROVIDE (__executable_start = ${TEXT_START_ADDR}); . = ${TEXT_BASE_ADDRESS};}}}
-+ /* Sections saved crt0 and crt1. */
-+ ${NDS32_INIT}
-+ ${CREATE_SHLIB+${RELOCATING+. = ${SHLIB_TEXT_START_ADDR}${SIZEOF_HEADERS_CODE};}}
-+ ${CREATE_PIE+${RELOCATING+PROVIDE (__executable_start = ${SHLIB_TEXT_START_ADDR}); . = ${SHLIB_TEXT_START_ADDR}${SIZEOF_HEADERS_CODE};}}
-+EOF
-+
-+emit_early_ro()
-+{
-+ cat <<EOF
-+ ${INITIAL_READONLY_SECTIONS}
-+ .note.gnu.build-id : { *(.note.gnu.build-id) }
-+EOF
-+}
-+
-+test -n "${SEPARATE_CODE}" || emit_early_ro
-+
-+test -n "${RELOCATING+0}" || unset NON_ALLOC_DYN
-+test -z "${NON_ALLOC_DYN}" || TEXT_DYNAMIC=
-+cat > ldscripts/dyntmp.$$ <<EOF
-+ ${TEXT_DYNAMIC+${DYNAMIC}}
-+ .hash ${RELOCATING-0} : { *(.hash) }
-+ .gnu.hash ${RELOCATING-0} : { *(.gnu.hash) }
-+ .dynsym ${RELOCATING-0} : { *(.dynsym) }
-+ .dynstr ${RELOCATING-0} : { *(.dynstr) }
-+ .gnu.version ${RELOCATING-0} : { *(.gnu.version) }
-+ .gnu.version_d ${RELOCATING-0}: { *(.gnu.version_d) }
-+ .gnu.version_r ${RELOCATING-0}: { *(.gnu.version_r) }
-+EOF
-+
-+if [ "x$COMBRELOC" = x ]; then
-+ COMBRELOCCAT="cat >> ldscripts/dyntmp.$$"
-+else
-+ COMBRELOCCAT="cat > $COMBRELOC"
-+fi
-+eval $COMBRELOCCAT <<EOF
-+ ${INITIAL_RELOC_SECTIONS}
-+ .rel.init ${RELOCATING-0} : { *(.rel.init) }
-+ .rela.init ${RELOCATING-0} : { *(.rela.init) }
-+ .rel.text ${RELOCATING-0} : { *(.rel.text${RELOCATING+ .rel.text.* .rel.gnu.linkonce.t.*}) }
-+ .rela.text ${RELOCATING-0} : { *(.rela.text${RELOCATING+ .rela.text.* .rela.gnu.linkonce.t.*}) }
-+ .rel.fini ${RELOCATING-0} : { *(.rel.fini) }
-+ .rela.fini ${RELOCATING-0} : { *(.rela.fini) }
-+ .rel.${RODATA_NAME} ${RELOCATING-0} : { *(.rel.${RODATA_NAME}${RELOCATING+ .rel.${RODATA_NAME}.* .rel.gnu.linkonce.r.*}) }
-+ .rela.${RODATA_NAME} ${RELOCATING-0} : { *(.rela.${RODATA_NAME}${RELOCATING+ .rela.${RODATA_NAME}.* .rela.gnu.linkonce.r.*}) }
-+ ${OTHER_READONLY_RELOC_SECTIONS}
-+ .rel.data.rel.ro ${RELOCATING-0} : { *(.rel.data.rel.ro${RELOCATING+ .rel.data.rel.ro.* .rel.gnu.linkonce.d.rel.ro.*}) }
-+ .rela.data.rel.ro ${RELOCATING-0} : { *(.rela.data.rel.ro${RELOCATING+ .rela.data.rel.ro.* .rela.gnu.linkonce.d.rel.ro.*}) }
-+ .rel.data ${RELOCATING-0} : { *(.rel.data${RELOCATING+ .rel.data.* .rel.gnu.linkonce.d.*}) }
-+ .rela.data ${RELOCATING-0} : { *(.rela.data${RELOCATING+ .rela.data.* .rela.gnu.linkonce.d.*}) }
-+ ${OTHER_READWRITE_RELOC_SECTIONS}
-+ .rel.tdata ${RELOCATING-0} : { *(.rel.tdata${RELOCATING+ .rel.tdata.* .rel.gnu.linkonce.td.*}) }
-+ .rela.tdata ${RELOCATING-0} : { *(.rela.tdata${RELOCATING+ .rela.tdata.* .rela.gnu.linkonce.td.*}) }
-+ .rel.tbss ${RELOCATING-0} : { *(.rel.tbss${RELOCATING+ .rel.tbss.* .rel.gnu.linkonce.tb.*}) }
-+ .rela.tbss ${RELOCATING-0} : { *(.rela.tbss${RELOCATING+ .rela.tbss.* .rela.gnu.linkonce.tb.*}) }
-+ .rel.ctors ${RELOCATING-0} : { *(.rel.ctors) }
-+ .rela.ctors ${RELOCATING-0} : { *(.rela.ctors) }
-+ .rel.dtors ${RELOCATING-0} : { *(.rel.dtors) }
-+ .rela.dtors ${RELOCATING-0} : { *(.rela.dtors) }
-+ .rel.got ${RELOCATING-0} : { *(.rel.got) }
-+ .rela.got ${RELOCATING-0} : { *(.rela.got) }
-+ ${OTHER_GOT_RELOC_SECTIONS}
-+ ${REL_SDATA}
-+ ${REL_SBSS}
-+ ${REL_SDATA2}
-+ ${REL_SBSS2}
-+ .rel.${BSS_NAME} ${RELOCATING-0} : { *(.rel.${BSS_NAME}${RELOCATING+ .rel.${BSS_NAME}.* .rel.gnu.linkonce.b.*}) }
-+ .rela.${BSS_NAME} ${RELOCATING-0} : { *(.rela.${BSS_NAME}${RELOCATING+ .rela.${BSS_NAME}.* .rela.gnu.linkonce.b.*}) }
-+ ${REL_LARGE}
-+ ${IREL_IN_PLT+$REL_IFUNC}
-+ ${IREL_IN_PLT+$RELA_IFUNC}
-+ ${IREL_IN_PLT-$REL_IPLT}
-+ ${IREL_IN_PLT-$RELA_IPLT}
-+EOF
-+
-+if [ -n "$COMBRELOC" ]; then
-+cat >> ldscripts/dyntmp.$$ <<EOF
-+ .rel.dyn ${RELOCATING-0} :
-+ {
-+EOF
-+sed -e '/^[ ]*[{}][ ]*$/d;/:[ ]*$/d;/\.rela\./d;s/^.*: { *\(.*\)}$/ \1/' $COMBRELOC >> ldscripts/dyntmp.$$
-+cat >> ldscripts/dyntmp.$$ <<EOF
-+ }
-+ .rela.dyn ${RELOCATING-0} :
-+ {
-+EOF
-+sed -e '/^[ ]*[{}][ ]*$/d;/:[ ]*$/d;/\.rel\./d;s/^.*: { *\(.*\)}/ \1/' $COMBRELOC >> ldscripts/dyntmp.$$
-+cat >> ldscripts/dyntmp.$$ <<EOF
-+ }
-+EOF
-+fi
-+
-+cat >> ldscripts/dyntmp.$$ <<EOF
-+ .rel.plt ${RELOCATING-0} :
-+ {
-+ *(.rel.plt)
-+ ${IREL_IN_PLT+${RELOCATING+${CREATE_SHLIB-PROVIDE_HIDDEN (${USER_LABEL_PREFIX}__rel_iplt_start = .);}}}
-+ ${IREL_IN_PLT+${RELOCATING+*(.rel.iplt)}}
-+ ${IREL_IN_PLT+${RELOCATING+${CREATE_SHLIB-PROVIDE_HIDDEN (${USER_LABEL_PREFIX}__rel_iplt_end = .);}}}
-+ }
-+ .rela.plt ${RELOCATING-0} :
-+ {
-+ *(.rela.plt)
-+ ${IREL_IN_PLT+${RELOCATING+${CREATE_SHLIB-PROVIDE_HIDDEN (${USER_LABEL_PREFIX}__rela_iplt_start = .);}}}
-+ ${IREL_IN_PLT+${RELOCATING+*(.rela.iplt)}}
-+ ${IREL_IN_PLT+${RELOCATING+${CREATE_SHLIB-PROVIDE_HIDDEN (${USER_LABEL_PREFIX}__rela_iplt_end = .);}}}
-+ }
-+ ${OTHER_PLT_RELOC_SECTIONS}
-+EOF
-+
-+emit_dyn()
-+{
-+ if test -z "${NO_REL_RELOCS}${NO_RELA_RELOCS}"; then
-+ cat ldscripts/dyntmp.$$
-+ else
-+ if test -z "${NO_REL_RELOCS}"; then
-+ sed -e '/^[ ]*\.rela\.[^}]*$/,/}/d' -e '/^[ ]*\.rela\./d' ldscripts/dyntmp.$$
-+ fi
-+ if test -z "${NO_RELA_RELOCS}"; then
-+ sed -e '/^[ ]*\.rel\.[^}]*$/,/}/d' -e '/^[ ]*\.rel\./d' ldscripts/dyntmp.$$
-+ fi
-+ fi
-+ rm -f ldscripts/dyntmp.$$
-+}
-+
-+test -n "${NON_ALLOC_DYN}${SEPARATE_CODE}" || emit_dyn
-+
-+cat <<EOF
-+ .init ${RELOCATING-0} :
-+ {
-+ ${RELOCATING+${INIT_START}}
-+ KEEP (*(SORT_NONE(.init)))
-+ ${RELOCATING+${INIT_END}}
-+ } ${FILL}
-+
-+ ${TEXT_PLT+${PLT_NEXT_DATA-${PLT}}}
-+ ${TINY_READONLY_SECTION}
-+ .text ${RELOCATING-0} :
-+ {
-+ ${RELOCATING+${TEXT_START_SYMBOLS}}
-+ ${RELOCATING+*(.text.unlikely .text.*_unlikely)}
-+ ${RELOCATING+*(.text.exit .text.exit.*)}
-+ ${RELOCATING+*(.text.startup .text.startup.*)}
-+ ${RELOCATING+*(.text.hot .text.hot.*)}
-+ *(.text .stub${RELOCATING+ .text.* .gnu.linkonce.t.*})
-+ /* .gnu.warning sections are handled specially by elf32.em. */
-+ *(.gnu.warning)
-+ ${RELOCATING+${OTHER_TEXT_SECTIONS}}
-+ } ${FILL}
-+ .fini ${RELOCATING-0} :
-+ {
-+ ${RELOCATING+${FINI_START}}
-+ KEEP (*(SORT_NONE(.fini)))
-+ ${RELOCATING+${FINI_END}}
-+ } ${FILL}
-+ ${RELOCATING+PROVIDE (__${ETEXT_NAME} = .);}
-+ ${RELOCATING+PROVIDE (_${ETEXT_NAME} = .);}
-+ ${RELOCATING+PROVIDE (${ETEXT_NAME} = .);}
-+EOF
-+
-+if test -n "${SEPARATE_CODE}"; then
-+ if test -n "${RODATA_ADDR}"; then
-+ RODATA_ADDR="\
-+SEGMENT_START(\"rodata-segment\", ${RODATA_ADDR}) + SIZEOF_HEADERS"
-+ else
-+ RODATA_ADDR="ALIGN(${SEGMENT_SIZE}) + (. & (${MAXPAGESIZE} - 1))"
-+ RODATA_ADDR="SEGMENT_START(\"rodata-segment\", ${RODATA_ADDR})"
-+ fi
-+ if test -n "${SHLIB_RODATA_ADDR}"; then
-+ SHLIB_RODATA_ADDR="\
-+SEGMENT_START(\"rodata-segment\", ${SHLIB_RODATA_ADDR}) + SIZEOF_HEADERS"
-+ else
-+ SHLIB_RODATA_ADDR="SEGMENT_START(\"rodata-segment\", ${SHLIB_RODATA_ADDR})"
-+ SHLIB_RODATA_ADDR="ALIGN(${SEGMENT_SIZE}) + (. & (${MAXPAGESIZE} - 1))"
-+ fi
-+ cat <<EOF
-+ /* Adjust the address for the rodata segment. We want to adjust up to
-+ the same address within the page on the next page up. */
-+ ${CREATE_SHLIB-${CREATE_PIE-${RELOCATING+. = ${RODATA_ADDR};}}}
-+ ${CREATE_SHLIB+${RELOCATING+. = ${SHLIB_RODATA_ADDR};}}
-+ ${CREATE_PIE+${RELOCATING+. = ${SHLIB_RODATA_ADDR};}}
-+EOF
-+ emit_early_ro
-+ emit_dyn
-+fi
-+
-+cat <<EOF
-+ ${WRITABLE_RODATA-${RODATA}}
-+ .${RODATA_NAME}1 ${RELOCATING-0} : { *(.${RODATA_NAME}1) }
-+ ${CREATE_SHLIB-${SDATA2}}
-+ ${CREATE_SHLIB-${SBSS2}}
-+ ${OTHER_READONLY_SECTIONS}
-+ .eh_frame_hdr : { *(.eh_frame_hdr) }
-+ .eh_frame ${RELOCATING-0} : ONLY_IF_RO { KEEP (*(.eh_frame)) }
-+ .gcc_except_table ${RELOCATING-0} : ONLY_IF_RO { *(.gcc_except_table
-+ .gcc_except_table.*) }
-+ /* These sections are generated by the Sun/Oracle C++ compiler. */
-+ .exception_ranges ${RELOCATING-0} : ONLY_IF_RO { *(.exception_ranges
-+ .exception_ranges*) }
-+ ${TEXT_PLT+${PLT_NEXT_DATA+${PLT}}}
-+
-+ /* Adjust the address for the data segment. We want to adjust up to
-+ the same address within the page on the next page up. */
-+ ${CREATE_SHLIB-${CREATE_PIE-${RELOCATING+. = ${DATA_ADDR-${DATA_SEGMENT_ALIGN}};}}}
-+ ${CREATE_SHLIB+${RELOCATING+. = ${SHLIB_DATA_ADDR-${DATA_SEGMENT_ALIGN}};}}
-+ ${CREATE_PIE+${RELOCATING+. = ${SHLIB_DATA_ADDR-${DATA_SEGMENT_ALIGN}};}}
-+
-+ /* Exception handling */
-+ .eh_frame ${RELOCATING-0} : ONLY_IF_RW { KEEP (*(.eh_frame)) }
-+ .gcc_except_table ${RELOCATING-0} : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) }
-+ .exception_ranges ${RELOCATING-0} : ONLY_IF_RW { *(.exception_ranges .exception_ranges*) }
-+
-+ /* Thread Local Storage sections */
-+ .tdata ${RELOCATING-0} : { *(.tdata${RELOCATING+ .tdata.* .gnu.linkonce.td.*}) }
-+ .tbss ${RELOCATING-0} : { *(.tbss${RELOCATING+ .tbss.* .gnu.linkonce.tb.*})${RELOCATING+ *(.tcommon)} }
-+
-+ .preinit_array ${RELOCATING-0} :
-+ {
-+ ${RELOCATING+${CREATE_SHLIB-PROVIDE_HIDDEN (${USER_LABEL_PREFIX}__preinit_array_start = .);}}
-+ KEEP (*(.preinit_array))
-+ ${RELOCATING+${CREATE_SHLIB-PROVIDE_HIDDEN (${USER_LABEL_PREFIX}__preinit_array_end = .);}}
-+ }
-+ ${RELOCATING+${INIT_ARRAY}}
-+ ${RELOCATING+${FINI_ARRAY}}
-+ ${SMALL_DATA_CTOR-${RELOCATING+${CTOR}}}
-+ ${SMALL_DATA_DTOR-${RELOCATING+${DTOR}}}
-+ .jcr ${RELOCATING-0} : { KEEP (*(.jcr)) }
-+
-+ ${RELOCATING+${DATARELRO}}
-+ ${OTHER_RELRO_SECTIONS}
-+ ${TEXT_DYNAMIC-${DYNAMIC}}
-+ ${DATA_GOT+${RELRO_NOW+${GOT}}}
-+ ${DATA_GOT+${RELRO_NOW+${GOTPLT}}}
-+ ${DATA_GOT+${RELRO_NOW-${SEPARATE_GOTPLT+${GOT}}}}
-+ ${RELOCATING+${DATA_SEGMENT_RELRO_END}}
-+ ${INITIAL_READWRITE_SECTIONS}
-+ ${DATA_GOT+${RELRO_NOW-${SEPARATE_GOTPLT-${GOT}}}}
-+ ${DATA_GOT+${RELRO_NOW-${GOTPLT}}}
-+
-+ ${DATA_PLT+${PLT_BEFORE_GOT-${PLT}}}
-+
-+ /* For _SDA_BASE_ aligment. */
-+ ${RELOCATING+. = ALIGN(4);}
-+
-+ .data ${RELOCATING-0} :
-+ {
-+ ${RELOCATING+${DATA_START_SYMBOLS}}
-+ *(.data${RELOCATING+ .data.* .gnu.linkonce.d.*})
-+ ${CONSTRUCTING+SORT(CONSTRUCTORS)}
-+ }
-+ .data1 ${RELOCATING-0} : { *(.data1) }
-+ ${WRITABLE_RODATA+${RODATA}}
-+ ${OTHER_READWRITE_SECTIONS}
-+ ${SMALL_DATA_CTOR+${RELOCATING+${CTOR}}}
-+ ${SMALL_DATA_DTOR+${RELOCATING+${DTOR}}}
-+ ${RELOCATING+. = ALIGN(4);}
-+ ${DATA_PLT+${PLT_BEFORE_GOT+${PLT}}}
-+ ${SDATA_GOT+${RELOCATING+${OTHER_GOT_SYMBOLS+. = .; ${OTHER_GOT_SYMBOLS}}}}
-+ ${SDATA_GOT+${GOT}}
-+ ${SDATA_GOT+${OTHER_GOT_SECTIONS}}
-+ ${SDATA}
-+ ${OTHER_SDATA_SECTIONS}
-+ ${RELOCATING+. = ALIGN(4);}
-+ ${RELOCATING+${DATA_END_SYMBOLS-${USER_LABEL_PREFIX}_edata = .; PROVIDE (${USER_LABEL_PREFIX}edata = .);}}
-+ ${RELOCATING+. = .;}
-+ ${RELOCATING+${USER_LABEL_PREFIX}__bss_start = .;}
-+ ${RELOCATING+${OTHER_BSS_SYMBOLS}}
-+ ${SBSS}
-+ ${BSS_PLT+${PLT}}
-+ .${BSS_NAME} ${RELOCATING-0} :
-+ {
-+ *(.dyn${BSS_NAME})
-+ *(.${BSS_NAME}${RELOCATING+ .${BSS_NAME}.* .gnu.linkonce.b.*})
-+ *(COMMON)
-+ /* Align here to ensure that the .bss section occupies space up to
-+ _end. Align after .bss to ensure correct alignment even if the
-+ .bss section disappears because there are no input sections.
-+ FIXME: Why do we need it? When there is no .bss section, we don't
-+ pad the .data section. */
-+ ${RELOCATING+. = ALIGN(. != 0 ? ${ALIGNMENT} : 1);}
-+ }
-+ ${OTHER_BSS_SECTIONS}
-+ ${LARGE_BSS_AFTER_BSS+${LARGE_BSS}}
-+ ${RELOCATING+_end = .;}
-+ ${RELOCATING+${OTHER_BSS_END_SYMBOLS}}
-+ ${RELOCATING+. = ALIGN(${ALIGNMENT});}
-+EOF
-+
-+LARGE_DATA_ADDR=". = SEGMENT_START(\"ldata-segment\", ${LARGE_DATA_ADDR-.});"
-+SHLIB_LARGE_DATA_ADDR=". = SEGMENT_START(\"ldata-segment\", ${SHLIB_LARGE_DATA_ADDR-.});"
-+
-+ cat <<EOF
-+ ${RELOCATING+${CREATE_SHLIB-${CREATE_PIE-${LARGE_DATA_ADDR}}}}
-+ ${RELOCATING+${CREATE_SHLIB+${SHLIB_LARGE_DATA_ADDR}}}
-+ ${RELOCATING+${CREATE_PIE+${SHLIB_LARGE_DATA_ADDR}}}
-+ ${LARGE_SECTIONS}
-+ ${LARGE_BSS_AFTER_BSS-${LARGE_BSS}}
-+ ${RELOCATING+. = ALIGN(${ALIGNMENT});}
-+ ${RELOCATING+${OTHER_END_SYMBOLS}}
-+ ${RELOCATING+${END_SYMBOLS-${USER_LABEL_PREFIX}_end = .; PROVIDE (${USER_LABEL_PREFIX}end = .);}}
-+ ${RELOCATING+${DATA_SEGMENT_END}}
-+EOF
-+
-+test -z "${NON_ALLOC_DYN}" || emit_dyn
-+
-+cat <<EOF
-+ /* Stabs debugging sections. */
-+ .stab 0 : { *(.stab) }
-+ .stabstr 0 : { *(.stabstr) }
-+ .stab.excl 0 : { *(.stab.excl) }
-+ .stab.exclstr 0 : { *(.stab.exclstr) }
-+ .stab.index 0 : { *(.stab.index) }
-+ .stab.indexstr 0 : { *(.stab.indexstr) }
-+
-+ .comment 0 : { *(.comment) }
-+
-+EOF
-+
-+. $srcdir/scripttempl/DWARF.sc
-+
-+cat <<EOF
-+
-+ ${TINY_DATA_SECTION}
-+ ${TINY_BSS_SECTION}
-+
-+ ${STACK_ADDR+${STACK}}
-+ ${ATTRS_SECTIONS}
-+ ${OTHER_SECTIONS}
-+ ${RELOCATING+${OTHER_SYMBOLS}}
-+ ${RELOCATING+${DISCARDED}}
-+}
-+EOF
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/branch.d binutils-2.24/ld/testsuite/ld-nds32/branch.d
---- binutils-2.24.orig/ld/testsuite/ld-nds32/branch.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/branch.d 2016-06-30 21:26:12.801898869 +0200
-@@ -0,0 +1,23 @@
-+#as: -Os
-+#ld: -static --relax -T $srcdir/$subdir/branch.ld
-+#objdump: -d --prefix-addresses -j .text
-+
-+.*: file format .*nds32.*
-+
-+
-+Disassembly of section .text:
-+0+0000 <[^>]*> beq \$r0, \$r1, 0000002c <main>
-+0+0004 <[^>]*> bne \$r0, \$r1, 0000002c <main>
-+0+0008 <[^>]*> bnez38 \$r0, 0000002c <main>
-+0+000a <[^>]*> beqz38 \$r0, 0000002c <main>
-+0+000c <[^>]*> bgez \$r0, 0000002c <main>
-+.*
-+0+0012 <[^>]*> bgezal \$r0, 0000002c <main>
-+0+0016 <[^>]*> bgtz \$r0, 0000002c <main>
-+.*
-+0+001c <[^>]*> blez \$r0, 0000002c <main>
-+.*
-+0+0022 <[^>]*> bltz \$r0, 0000002c <main>
-+0+0026 <[^>]*> srli45 \$r0, 0
-+0+0028 <[^>]*> bltzal \$r0, 0000002c <main>
-+0+002c <main>.*
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/branch.ld binutils-2.24/ld/testsuite/ld-nds32/branch.ld
---- binutils-2.24.orig/ld/testsuite/ld-nds32/branch.ld 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/branch.ld 2016-06-30 21:26:12.801898869 +0200
-@@ -0,0 +1,6 @@
-+SECTIONS
-+{
-+ .text 0x0 : {
-+ * (.text .text.*);
-+ }
-+}
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/branch.s binutils-2.24/ld/testsuite/ld-nds32/branch.s
---- binutils-2.24.orig/ld/testsuite/ld-nds32/branch.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/branch.s 2016-06-30 21:26:12.801898869 +0200
-@@ -0,0 +1,18 @@
-+.text
-+.global _start
-+_start:
-+ beq $r0, $r1, main
-+ bne $r0, $r1, main
-+ beqz $r0, main
-+ bnez $r0, main
-+ bgez $r0, main
-+ bgezal $r0, main
-+ bgtz $r0, main
-+ blez $r0, main
-+ bltz $r0, main
-+ bltzal $r0, main
-+.section .text.2, "ax"
-+.globl main
-+main:
-+ nop
-+
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/diff.d binutils-2.24/ld/testsuite/ld-nds32/diff.d
---- binutils-2.24.orig/ld/testsuite/ld-nds32/diff.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/diff.d 2016-06-30 21:26:12.801898869 +0200
-@@ -0,0 +1,16 @@
-+#as: -Os
-+#ld: -static --relax -T $srcdir/$subdir/diff.ld
-+#objdump: -D --prefix-addresses -j .data --show-raw-insn
-+
-+.*: file format .*nds32.*
-+
-+
-+Disassembly of section .data:
-+00008000 <WORD> (7e 00 00 00|00 00 00 7e).*
-+00008004 <HALF> (7e 00 7e fe|00 7e 7e fe).*
-+00008006 <BYTE> 7e fe 00 fe.*
-+00008007 <ULEB128> fe 00.*
-+ ...
-+00008009 <ULEB128_2> fe 00.*
-+.*
-+.*
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/diff.ld binutils-2.24/ld/testsuite/ld-nds32/diff.ld
---- binutils-2.24.orig/ld/testsuite/ld-nds32/diff.ld 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/diff.ld 2016-06-30 21:26:12.801898869 +0200
-@@ -0,0 +1,10 @@
-+SECTIONS
-+{
-+ .text 0x4000 : {
-+ * (.text .text.*);
-+ }
-+
-+ .data 0x8000 : {
-+ * (.data .data.*);
-+ }
-+}
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/diff.s binutils-2.24/ld/testsuite/ld-nds32/diff.s
---- binutils-2.24.orig/ld/testsuite/ld-nds32/diff.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/diff.s 2016-06-30 21:26:12.801898869 +0200
-@@ -0,0 +1,32 @@
-+ .global _start
-+ .global WORD
-+ .global HALF
-+ .global BYTE
-+ .global ULEB128
-+.text
-+_start:
-+ nop
-+.L0:
-+ l.w $r0, WORD
-+ .zero 122
-+.L1:
-+ nop
-+
-+.section code, "ax"
-+FOO:
-+ ret
-+
-+.data
-+WORD:
-+ .word .L1-.L0
-+HALF:
-+ .half .L1-.L0
-+BYTE:
-+ .byte .L1-.L0
-+ULEB128:
-+ .uleb128 .L1-.L0
-+ULEB128_2:
-+ .uleb128 .L1-.L0
-+ .align 2
-+PAD:
-+ .long 0
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/gp.d binutils-2.24/ld/testsuite/ld-nds32/gp.d
---- binutils-2.24.orig/ld/testsuite/ld-nds32/gp.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/gp.d 2016-06-30 21:26:12.801898869 +0200
-@@ -0,0 +1,17 @@
-+#as: -Os
-+#ld: -static -T \$srcdir/\$subdir/gp.ld
-+#objdump: -d --prefix-addresses -j .text
-+
-+.*: file format .*nds32.*
-+
-+
-+Disassembly of section .text:
-+0+0000 <[^>]*> addi.gp \$r0, 8192
-+0+0004 <[^>]*> lbi.gp \$r0, \[\+ 8192\]
-+0+0008 <[^>]*> lbsi.gp \$r0, \[\+ 8192\]
-+0+000c <[^>]*> lhi.gp \$r0, \[\+ 8192\]
-+0+0010 <[^>]*> lhsi.gp \$r0, \[\+ 8192\]
-+0+0014 <[^>]*> lwi.gp \$r0, \[\+ 8192\]
-+0+0018 <[^>]*> sbi.gp \$r0, \[\+ 8192\]
-+0+001c <[^>]*> shi.gp \$r0, \[\+ 8192\]
-+0+0020 <[^>]*> swi.gp \$r0, \[\+ 8192\]
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/gp.ld binutils-2.24/ld/testsuite/ld-nds32/gp.ld
---- binutils-2.24.orig/ld/testsuite/ld-nds32/gp.ld 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/gp.ld 2016-06-30 21:26:12.801898869 +0200
-@@ -0,0 +1,11 @@
-+SECTIONS
-+{
-+ .text 0x0 : {
-+ * (.text .text.*);
-+ }
-+
-+ .data 0x3000 : {
-+ * (.data .data.*);
-+ }
-+ _SDA_BASE_ = 0x1000;
-+}
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/gp.s binutils-2.24/ld/testsuite/ld-nds32/gp.s
---- binutils-2.24.orig/ld/testsuite/ld-nds32/gp.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/gp.s 2016-06-30 21:26:12.801898869 +0200
-@@ -0,0 +1,18 @@
-+.data
-+.global mydata
-+mydata:
-+ .word 0x11
-+
-+.text
-+.global _start
-+_start:
-+ addi.gp $r0, mydata
-+ lbi.gp $r0, [+mydata]
-+ lbsi.gp $r0, [+mydata]
-+ lhi.gp $r0, [+mydata]
-+ lhsi.gp $r0, [+mydata]
-+ lwi.gp $r0, [+mydata]
-+ sbi.gp $r0, [+mydata]
-+ shi.gp $r0, [+mydata]
-+ swi.gp $r0, [+mydata]
-+
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/imm.d binutils-2.24/ld/testsuite/ld-nds32/imm.d
---- binutils-2.24.orig/ld/testsuite/ld-nds32/imm.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/imm.d 2016-06-30 21:26:12.801898869 +0200
-@@ -0,0 +1,14 @@
-+#source: imm.s
-+#source: imm_symbol.s
-+#as: -Os
-+#ld: -static -T $srcdir/$subdir/imm.ld --relax
-+#objdump: -d --prefix-addresses -j .text
-+
-+.*: file format .*nds32.*
-+
-+
-+Disassembly of section .text:
-+0+1000 <[^>]*> sethi \$r0, 0x11223
-+0+1004 <[^>]*> ori \$r0, \$r0, 836
-+0+1008 <[^>]*> movi \$r0, 70179
-+0+100c <[^>]*> movi55 \$r0, 15
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/imm.ld binutils-2.24/ld/testsuite/ld-nds32/imm.ld
---- binutils-2.24.orig/ld/testsuite/ld-nds32/imm.ld 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/imm.ld 2016-06-30 21:26:12.801898869 +0200
-@@ -0,0 +1,6 @@
-+SECTIONS
-+{
-+ .text 0x1000 : {
-+ * (.text .text.*);
-+ }
-+}
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/imm.s binutils-2.24/ld/testsuite/ld-nds32/imm.s
---- binutils-2.24.orig/ld/testsuite/ld-nds32/imm.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/imm.s 2016-06-30 21:26:12.801898869 +0200
-@@ -0,0 +1,7 @@
-+.text
-+.global _start
-+_start:
-+ la $r0, imm32
-+ la $r0, imm20
-+ la $r0, imm5
-+
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/imm_symbol.s binutils-2.24/ld/testsuite/ld-nds32/imm_symbol.s
---- binutils-2.24.orig/ld/testsuite/ld-nds32/imm_symbol.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/imm_symbol.s 2016-06-30 21:26:12.801898869 +0200
-@@ -0,0 +1,7 @@
-+.globl imm32
-+.globl imm20
-+.globl imm5
-+
-+.set imm32, 0x11223344
-+.set imm20, 0x11223
-+.set imm5, 0xf
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/nds32.exp binutils-2.24/ld/testsuite/ld-nds32/nds32.exp
---- binutils-2.24.orig/ld/testsuite/ld-nds32/nds32.exp 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/nds32.exp 2016-06-30 21:26:12.801898869 +0200
-@@ -0,0 +1,26 @@
-+# Copyright (C) 2012-2013 Free Software Foundation, Inc.
-+# Contributed by Andes Technology Corporation.
-+
-+# This program is free software; you can redistribute it and/or modify
-+# it under the terms of the GNU General Public License as published by
-+# the Free Software Foundation; either version 3 of the License, or
-+# (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program; if not, write to the Free Software
-+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-+# MA 02110-1301, USA.
-+
-+if {[istarget "nds32*-*"]} {
-+ run_dump_test "diff"
-+ run_dump_test "gp"
-+ run_dump_test "relax_jmp"
-+ run_dump_test "imm"
-+ run_dump_test "branch"
-+ run_dump_test "relax_load_store"
-+}
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/relax_jmp.d binutils-2.24/ld/testsuite/ld-nds32/relax_jmp.d
---- binutils-2.24.orig/ld/testsuite/ld-nds32/relax_jmp.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/relax_jmp.d 2016-06-30 21:26:12.801898869 +0200
-@@ -0,0 +1,11 @@
-+#as: -Os
-+#ld: -static --relax -T $srcdir/$subdir/relax_jmp.ld
-+#objdump: -d --prefix-addresses -j .text
-+
-+.*: file format .*nds32.*
-+
-+
-+Disassembly of section .text:
-+0+0000 <[^>]*> j8 00000006 <main>
-+0+0002 <[^>]*> jal 00000006 <main>
-+0+0006 <[^>]*> srli45 \$r0, 0
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/relax_jmp.ld binutils-2.24/ld/testsuite/ld-nds32/relax_jmp.ld
---- binutils-2.24.orig/ld/testsuite/ld-nds32/relax_jmp.ld 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/relax_jmp.ld 2016-06-30 21:26:12.801898869 +0200
-@@ -0,0 +1,6 @@
-+SECTIONS
-+{
-+ .text 0x0 : {
-+ * (.text .text.*);
-+ }
-+}
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/relax_jmp.s binutils-2.24/ld/testsuite/ld-nds32/relax_jmp.s
---- binutils-2.24.orig/ld/testsuite/ld-nds32/relax_jmp.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/relax_jmp.s 2016-06-30 21:26:12.801898869 +0200
-@@ -0,0 +1,10 @@
-+.text
-+.global _start
-+_start:
-+ j main
-+ jal main
-+.section .text.2, "ax"
-+.globl main
-+main:
-+ nop
-+
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/relax_load_store.d binutils-2.24/ld/testsuite/ld-nds32/relax_load_store.d
---- binutils-2.24.orig/ld/testsuite/ld-nds32/relax_load_store.d 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/relax_load_store.d 2016-06-30 21:26:12.805899024 +0200
-@@ -0,0 +1,11 @@
-+#as: -Os
-+#ld: -static --relax -T \$srcdir/\$subdir/relax_load_store.ld
-+#objdump: -d --prefix-addresses -j .text
-+
-+.*: file format .*nds32.*
-+
-+
-+Disassembly of section .text:
-+0+0000 <[^>]*> lwi.gp \$r0, \[\+ 0\]
-+0+0004 <[^>]*> lhi.gp \$r0, \[\+ 4\]
-+0+0008 <[^>]*> lbi.gp \$r0, \[\+ 6\]
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/relax_load_store.ld binutils-2.24/ld/testsuite/ld-nds32/relax_load_store.ld
---- binutils-2.24.orig/ld/testsuite/ld-nds32/relax_load_store.ld 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/relax_load_store.ld 2016-06-30 21:26:12.805899024 +0200
-@@ -0,0 +1,10 @@
-+SECTIONS
-+{
-+ .text 0x0 : {
-+ * (.text .text.*);
-+ }
-+
-+ .data 0x3000 : {
-+ * (.data .data.*);
-+ }
-+}
-diff -Nur binutils-2.24.orig/ld/testsuite/ld-nds32/relax_load_store.s binutils-2.24/ld/testsuite/ld-nds32/relax_load_store.s
---- binutils-2.24.orig/ld/testsuite/ld-nds32/relax_load_store.s 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/ld/testsuite/ld-nds32/relax_load_store.s 2016-06-30 21:26:12.805899024 +0200
-@@ -0,0 +1,17 @@
-+.data
-+.global myword
-+myword:
-+ .word 0x11
-+.globl myshort
-+myshort:
-+ .short 0x11
-+.globl mybyte
-+mybyte:
-+ .byte 0x11
-+
-+.text
-+.global _start
-+_start:
-+ l.w $r0, myword
-+ l.h $r0, myshort
-+ l.b $r0, mybyte
-diff -Nur binutils-2.24.orig/md5.sum binutils-2.24/md5.sum
---- binutils-2.24.orig/md5.sum 2013-12-02 10:32:30.000000000 +0100
-+++ binutils-2.24/md5.sum 1970-01-01 01:00:00.000000000 +0100
-@@ -1,15006 +0,0 @@
--59530bdf33659b29e73d4adb9f9f6552 COPYING
--9f604d8a4f8e74f4f5140845a21b6674 COPYING.LIB
--d32239bcb673463ab874e80d47fae504 COPYING3
--6a6a8e020838b23406c81b19c1d46df6 COPYING3.LIB
--fce7cfc25547bc7f2c464511ca8e1eb9 ChangeLog
--2ce60858b3eab0a88195c43f23b1a094 MAINTAINERS
--fc659f8fa82c5976016ca07e03fdab9b Makefile.def
--a2da1243daad612042137f70528b4337 Makefile.in
--6b571c1e8f90bb088989c4350d479485 Makefile.tpl
--07c33a285703b40cd6f93a478e97e03b README
--72b7803505f14cf31e291a59f538c6c8 README-maintainer-mode
--408ef1462276b75d3708877103c85eb8 bfd/.gitignore
--f81f20eceb14ec71b0a065f2d51ad028 bfd/acinclude.m4
--3381b54a88e28dc216f5a2c7f4d30c32 bfd/aclocal.m4
--a9966d40b6f9a5469bbd752177db63f1 bfd/aix386-core.c
--b3575c73467ebc45473c2ea0875c1b4e bfd/aix5ppc-core.c
--c9ec7d24e6be9796656156d1c44d295c bfd/aout-adobe.c
--d9f978749e35f836c66403497694b831 bfd/aout-arm.c
--c552fd4edbac068d0780ef556247177a bfd/aout-cris.c
--8bd53d16402d058cbbe4ce4284cc1d86 bfd/aout-ns32k.c
--50d3f1577ee0ba388baa9b63b8e1db9c bfd/aout-sparcle.c
--ea01dce96afa052c76fd823efca3f370 bfd/aout-target.h
--74a028376cc593ad0d53de378c3aa17a bfd/aout-tic30.c
--58f2e574e5dc489f1c52672e973d658d bfd/aout0.c
--c13beca7dc743efbb13bd2c0091a2d41 bfd/aout32.c
--e028cead3cc51cc3eb131e35b66c8813 bfd/aout64.c
--1aec204d64d5b321d35def886f46e078 bfd/aoutf1.h
--0f6ed663a22aac0cf80781ffc5bbdcf5 bfd/aoutx.h
--1981e18657b346ff22196158686fc37e bfd/archive.c
--47a931d7362f109c68ba998e8e80bb75 bfd/archive64.c
--e0db4a75d3c8f6bd5499be4fdcdefd5d bfd/archures.c
--5ed657bb294400d6c36a8c00ee83ad48 bfd/armnetbsd.c
--0a020ae85f45619e7be78a32f07f13ff bfd/bfd-in.h
--d6cc8d7b4ae170e0d11c1a0aedb2a990 bfd/bfd-in2.h
--10804ec8277e65abd79022a18068f84a bfd/bfd.c
--ff72befb74ae11d48c8508019d1a656f bfd/bfd.m4
--f10689b5b3a6159a2713b01d11473020 bfd/bfdio.c
--da4c12f9e0f77a2d235b154c536a439a bfd/bfdwin.c
--91164da037fb2dd5a84678adde4ac3cb bfd/binary.c
--cea32a666a0713e7835609a9bcc6d907 bfd/bout.c
--bb3d6835e31501e321cd2d8bff767f6b bfd/cache.c
--c97717d51efe6661f46119e4e1ea4db4 bfd/cf-i386lynx.c
--18f09a3a9b17fa7bff19b95588827a37 bfd/cf-sparclynx.c
--58398c31b9548aaa2850723167aef2a9 bfd/ChangeLog
--6474afde93f8e964e3d6dddffde3c41e bfd/ChangeLog-0001
--44767bc0de7881b601da2278ef3df1a3 bfd/ChangeLog-0203
--7d710529ca3fafb2bb57132df24957e3 bfd/ChangeLog-2004
--58a3fb1e054b540ef5c1329799b824bb bfd/ChangeLog-2005
--92f9810a8a34c1e8680f660423898362 bfd/ChangeLog-2006
--15cdfd7b5500a342bb89992c1638f683 bfd/ChangeLog-2007
--1616089974633cf0fb24b7e9152a7f47 bfd/ChangeLog-2008
--86f496cd17d52d96424d40874acd6ae4 bfd/ChangeLog-2009
--bbf88fdf4e23c9cba924526076284b78 bfd/ChangeLog-2010
--5ddd7325e4cba21950fe2d391072cf87 bfd/ChangeLog-2011
--f5ad372cf681a57b9a43f6975c05e33c bfd/ChangeLog-2012
--f0081a1eb7e7392ae4ec3531bf8bb7a2 bfd/ChangeLog-9193
--e13a9255dc104fb7fba997bf6b0530a8 bfd/ChangeLog-9495
--6a000234636991fcf18fb96501838001 bfd/ChangeLog-9697
--9943067c7bd7ec749ddc4313136cc541 bfd/ChangeLog-9899
--075c433f85588e3e84a94e5c37f35484 bfd/cisco-core.c
--fe59ad4af0c11ea46860d3776d9116fd bfd/coff-alpha.c
--a9c5cd8e9c43829ec43055139e9684ed bfd/coff-apollo.c
--939bf09f26199a237e93b8270b66bff8 bfd/coff-arm.c
--6a450251ed7583fffcdd4fc593f8723b bfd/coff-aux.c
--f5b2082a5a1a29c38e706e3d9c0a8af7 bfd/coff-go32.c
--0756d050e9b8032fa21c7cdbde03bb24 bfd/coff-h8300.c
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--f1dd265eb61abcd9887f645d33a22134 ld/testsuite/ld-mips-elf/reloc-5.d
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--819a1ac49e774ccc8b68332aed02026e ld/testsuite/ld-mips-elf/reloc-estimate-1.d
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--fe43c43eeb34373d98ece156d04df94b ld/testsuite/ld-mips-elf/stub-dynsym-1-7fff.d
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--035703168846c4945f24c02e5711ae08 ld/testsuite/ld-mips-elf/stub-dynsym-1.ld
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--82bc233897ef8651545c08a78fc4199a ld/testsuite/ld-mips-elf/vxworks1.s
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--f410482e950d36d3493dbde6ac0fa801 ld/testsuite/ld-mmix/bspec807.s
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--27f3762fa59df67c0890e5450cd4e2d5 ld/testsuite/ld-mmix/bza-2b.d
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--bacb69bdb70ce627aa3b9616c163501d ld/testsuite/ld-mmix/bza-7f.d
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--8321e848de7b3c800d5c611874615427 opcodes/tilepro-dis.c
--b4c5541eecd4cc6d60b85efa8fa65746 opcodes/tilepro-opc.c
--c638f87ba41bbe2a581873c5cdfc1a88 opcodes/v850-dis.c
--1a96e56e43ee86d07c51f755c0b9a698 opcodes/v850-opc.c
--31995accf3e7ef8e0eedd6392afeb4d8 opcodes/vax-dis.c
--d6bbf65881c44492b08cab6c6cad51b8 opcodes/w65-dis.c
--072127e2c22b9ea5599f349c097ebbc1 opcodes/w65-opc.h
--9760faa524bc333d3d8ea4cbff08e2aa opcodes/xc16x-asm.c
--61ee16ff3ea71974250aa3f3b6fbddc1 opcodes/xc16x-desc.c
--d2d8d28ec86ecb0ad1138e8bbc71a99e opcodes/xc16x-desc.h
--7d4951c78448cb3d3f7d85842a619153 opcodes/xc16x-dis.c
--f1a8c5a5233adec0f43885f0967f5c5c opcodes/xc16x-ibld.c
--886733cd9cd944bd6b70785e53b0f69b opcodes/xc16x-opc.c
--0483c849ed60ff25db78f503bd8a84e0 opcodes/xc16x-opc.h
--5eb9f302f3f52f611d0c1961e5fdcd10 opcodes/xgate-dis.c
--7b6ceb55b3a85537ec321cca00cf3abc opcodes/xgate-opc.c
--3a6f9d4b824578571fcd952ffbfe589b opcodes/xstormy16-asm.c
--41ee4e0a4f42e0d396adfce5d0ca7d5f opcodes/xstormy16-desc.c
--10713cd53a68ad189219343ae17bb441 opcodes/xstormy16-desc.h
--2156873e893b64e765646887bb056324 opcodes/xstormy16-dis.c
--18d5a80d2b4910d879a88197eb1627ad opcodes/xstormy16-ibld.c
--953957d3d7b43d96528448b2044227c4 opcodes/xstormy16-opc.c
--099f445cf3df0fb0724aaf81ab3a3ff9 opcodes/xstormy16-opc.h
--f172ffa9789365f41acd6af7334e98d4 opcodes/xtensa-dis.c
--48a1de2a08d81135c59cce49900c06bd opcodes/z80-dis.c
--b73735f570dac4f2ad37d5e3848d01a0 opcodes/z8k-dis.c
--3e35419b8e8af65b6028c31a570679da opcodes/z8k-opc.h
--008fe25af51f207c571015e436a2be45 opcodes/z8kgen.c
--9ded84c8fb1840e68c467da08880fe07 setup.com
--d7358e3586489c971936757ae6daa536 src-release
--cf2baa0854f564a7785307e79f155efc symlink-tree
--6ffd0f415aea2960cac41434e6d904bb texinfo/texinfo.tex
--69678e72941d681665c3731bfb3044ab ylwrap
-diff -Nur binutils-2.24.orig/opcodes/configure binutils-2.24/opcodes/configure
---- binutils-2.24.orig/opcodes/configure 2013-11-04 16:33:40.000000000 +0100
-+++ binutils-2.24/opcodes/configure 2016-06-30 21:26:12.817899492 +0200
-@@ -12546,6 +12546,7 @@
- bfd_mn10300_arch) ta="$ta m10300-dis.lo m10300-opc.lo" ;;
- bfd_mt_arch) ta="$ta mt-asm.lo mt-desc.lo mt-dis.lo mt-ibld.lo mt-opc.lo" using_cgen=yes ;;
- bfd_msp430_arch) ta="$ta msp430-dis.lo msp430-decode.lo" ;;
-+ bfd_nds32_arch) ta="$ta nds32-asm.lo nds32-dis.lo" ;;
- bfd_nios2_arch) ta="$ta nios2-dis.lo nios2-opc.lo" ;;
- bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;;
- bfd_openrisc_arch) ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;;
-diff -Nur binutils-2.24.orig/opcodes/configure.in binutils-2.24/opcodes/configure.in
---- binutils-2.24.orig/opcodes/configure.in 2013-11-04 16:33:40.000000000 +0100
-+++ binutils-2.24/opcodes/configure.in 2016-06-30 21:26:12.821899647 +0200
-@@ -293,6 +293,7 @@
- bfd_mn10300_arch) ta="$ta m10300-dis.lo m10300-opc.lo" ;;
- bfd_mt_arch) ta="$ta mt-asm.lo mt-desc.lo mt-dis.lo mt-ibld.lo mt-opc.lo" using_cgen=yes ;;
- bfd_msp430_arch) ta="$ta msp430-dis.lo msp430-decode.lo" ;;
-+ bfd_nds32_arch) ta="$ta nds32-asm.lo nds32-dis.lo" ;;
- bfd_nios2_arch) ta="$ta nios2-dis.lo nios2-opc.lo" ;;
- bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;;
- bfd_openrisc_arch) ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;;
-diff -Nur binutils-2.24.orig/opcodes/disassemble.c binutils-2.24/opcodes/disassemble.c
---- binutils-2.24.orig/opcodes/disassemble.c 2013-11-04 16:33:40.000000000 +0100
-+++ binutils-2.24/opcodes/disassemble.c 2016-06-30 21:26:12.821899647 +0200
-@@ -67,6 +67,7 @@
- #define ARCH_moxie
- #define ARCH_mt
- #define ARCH_msp430
-+#define ARCH_nds32
- #define ARCH_nios2
- #define ARCH_ns32k
- #define ARCH_openrisc
-@@ -296,6 +297,11 @@
- disassemble = print_insn_msp430;
- break;
- #endif
-+#ifdef ARCH_nds32
-+ case bfd_arch_nds32:
-+ disassemble = print_insn_nds32;
-+ break;
-+#endif
- #ifdef ARCH_ns32k
- case bfd_arch_ns32k:
- disassemble = print_insn_ns32k;
-@@ -547,6 +553,9 @@
- #ifdef ARCH_mips
- print_mips_disassembler_options (stream);
- #endif
-+#ifdef ARCH_nds32
-+ print_nds32_disassembler_options (stream);
-+#endif
- #ifdef ARCH_powerpc
- print_ppc_disassembler_options (stream);
- #endif
-@@ -616,6 +625,11 @@
- }
- break;
- #endif
-+#ifdef ARCH_nds32
-+ case bfd_arch_nds32:
-+ disassemble_init_for_nds32 (info);
-+ break;
-+#endif
- #ifdef ARCH_powerpc
- case bfd_arch_powerpc:
- #endif
-diff -Nur binutils-2.24.orig/opcodes/Makefile.am binutils-2.24/opcodes/Makefile.am
---- binutils-2.24.orig/opcodes/Makefile.am 2013-11-04 16:33:40.000000000 +0100
-+++ binutils-2.24/opcodes/Makefile.am 2016-06-30 21:26:12.821899647 +0200
-@@ -206,6 +206,8 @@
- mt-dis.c \
- mt-ibld.c \
- mt-opc.c \
-+ nds32-asm.c \
-+ nds32-dis.c \
- nios2-dis.c \
- nios2-opc.c \
- ns32k-dis.c \
-diff -Nur binutils-2.24.orig/opcodes/Makefile.in binutils-2.24/opcodes/Makefile.in
---- binutils-2.24.orig/opcodes/Makefile.in 2013-11-04 16:33:40.000000000 +0100
-+++ binutils-2.24/opcodes/Makefile.in 2016-06-30 21:26:12.821899647 +0200
-@@ -478,6 +478,8 @@
- mt-dis.c \
- mt-ibld.c \
- mt-opc.c \
-+ nds32-asm.c \
-+ nds32-dis.c \
- nios2-dis.c \
- nios2-opc.c \
- ns32k-dis.c \
-@@ -879,6 +881,8 @@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mt-dis.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mt-ibld.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mt-opc.Plo@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nds32-asm.Plo@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nds32-dis.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nios2-dis.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nios2-opc.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ns32k-dis.Plo@am__quote@
-diff -Nur binutils-2.24.orig/opcodes/nds32-asm.c binutils-2.24/opcodes/nds32-asm.c
---- binutils-2.24.orig/opcodes/nds32-asm.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/opcodes/nds32-asm.c 2016-06-30 21:26:12.821899647 +0200
-@@ -0,0 +1,2677 @@
-+/* NDS32-specific support for 32-bit ELF.
-+ Copyright (C) 2012-2013 Free Software Foundation, Inc.
-+ Contributed by Andes Technology Corporation.
-+
-+ This file is part of BFD, the Binary File Descriptor library.
-+
-+ This program is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 3 of the License, or
-+ (at your option) any later version.
-+
-+ This program is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ You should have received a copy of the GNU General Public License
-+ along with this program; if not, write to the Free Software
-+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-+ 02110-1301, USA. */
-+
-+
-+#include <config.h>
-+
-+#include <stdlib.h>
-+#include <stdint.h>
-+#include <string.h>
-+#include <assert.h>
-+#include <dlfcn.h>
-+
-+#include "safe-ctype.h"
-+#include "libiberty.h"
-+#include "hashtab.h"
-+#include "bfd.h"
-+
-+#include "opcode/nds32.h"
-+#include "nds32-asm.h"
-+
-+/* There at at most MAX_LEX_NUM lexical elements in a syntax. */
-+#define MAX_LEX_NUM 32
-+/* A operand in syntax string should be at most this long. */
-+#define MAX_LEX_LEN 64//32
-+/* The max length of a keyword can be. */
-+#define MAX_KEYWORD_LEN 32
-+/* This LEX is a plain char or operand. */
-+#define IS_LEX_CHAR(c) (((c) >> 7) == 0)
-+#define LEX_SET_FIELD(k,c) ((c) | (((k) + 1) << 8))
-+#define LEX_GET_FIELD(k,c) (nds32_field_table[k])[((c) & 0xff)]
-+/* Get the char in this lexical element. */
-+#define LEX_CHAR(c) ((c) & 0xff)
-+
-+#define USRIDX(group, usr) ((group) | ((usr) << 5))
-+#define SRIDX(major, minor, ext) \
-+ (((major) << 7) | ((minor) << 3) | (ext))
-+
-+static int parse_re (struct nds32_asm_desc *desc, struct nds32_asm_insn *insn,
-+ char **str, int64_t *value);
-+static int parse_re2 (struct nds32_asm_desc *desc, struct nds32_asm_insn *insn,
-+ char **str, int64_t *value);
-+static int parse_fe5 (struct nds32_asm_desc *desc, struct nds32_asm_insn *insn,
-+ char **str, int64_t *value);
-+static int parse_pi5 (struct nds32_asm_desc *desc, struct nds32_asm_insn *insn,
-+ char **str, int64_t *value);
-+static int parse_aext_reg (char **pstr, int *value, int hw_res);
-+static int parse_a30b20 (struct nds32_asm_desc *desc, struct nds32_asm_insn *insn,
-+ char **str, int64_t *value);
-+static int parse_rt21 (struct nds32_asm_desc *desc, struct nds32_asm_insn *insn,
-+ char **str, int64_t *value);
-+static int parse_rte_start (struct nds32_asm_desc *desc, struct nds32_asm_insn *insn,
-+ char **str, int64_t *value);
-+static int parse_rte_end (struct nds32_asm_desc *desc, struct nds32_asm_insn *insn,
-+ char **str, int64_t *value);
-+static int parse_rte69_start (struct nds32_asm_desc *desc, struct nds32_asm_insn *insn,
-+ char **str, int64_t *value);
-+static int parse_rte69_end (struct nds32_asm_desc *desc, struct nds32_asm_insn *insn,
-+ char **str, int64_t *value);
-+static int parse_im5_ip (struct nds32_asm_desc *desc, struct nds32_asm_insn *insn,
-+ char **str, int64_t *value);
-+static int parse_im5_mr (struct nds32_asm_desc *desc, struct nds32_asm_insn *insn,
-+ char **str, int64_t *value);
-+static int parse_im6_ip (struct nds32_asm_desc *desc, struct nds32_asm_insn *insn,
-+ char **str, int64_t *value);
-+static int parse_im6_iq (struct nds32_asm_desc *desc, struct nds32_asm_insn *insn,
-+ char **str, int64_t *value);
-+static int parse_im6_mr (struct nds32_asm_desc *desc, struct nds32_asm_insn *insn,
-+ char **str, int64_t *value);
-+static int parse_im6_ms (struct nds32_asm_desc *desc, struct nds32_asm_insn *insn,
-+ char **str, int64_t *value);
-+
-+/* These are operand prefixes for input/output semantic.
-+
-+ % input
-+ = output
-+ & both
-+ {} optional operand
-+
-+ Field table for operands and bit-fields. */
-+
-+const field_t operand_fields[] =
-+{
-+ {"rt", 20, 5, 0, HW_GPR, NULL},
-+ {"ra", 15, 5, 0, HW_GPR, NULL},
-+ {"rb", 10, 5, 0, HW_GPR, NULL},
-+ {"rd", 5, 5, 0, HW_GPR, NULL},
-+ {"re", 10, 5, 0, HW_GPR, parse_re}, /* lmw smw lmwa smwa. */
-+ {"fst", 20, 5, 0, HW_FSR, NULL},
-+ {"fsa", 15, 5, 0, HW_FSR, NULL},
-+ {"fsb", 10, 5, 0, HW_FSR, NULL},
-+ {"fdt", 20, 5, 0, HW_FDR, NULL},
-+ {"fda", 15, 5, 0, HW_FDR, NULL},
-+ {"fdb", 10, 5, 0, HW_FDR, NULL},
-+ {"cprt", 20, 5, 0, HW_CPR, NULL},
-+ {"cp", 13, 2, 0, HW_CP, NULL},
-+ {"sh", 5, 5, 0, HW_UINT, NULL}, /* sh in ALU instructions. */
-+ {"sv", 8, 2, 0, HW_UINT, NULL}, /* sv in MEM instructions. */
-+ {"dt", 21, 1, 0, HW_DXR, NULL},
-+ {"usr", 10, 10, 0, HW_USR, NULL}, /* User Special Registers. */
-+ {"sr", 10, 10, 0, HW_SR, NULL}, /* System Registers. */
-+ {"ridx", 10, 10, 0, HW_UINT, NULL}, /* Raw value for mfusr/mfsr. */
-+ {"enb4", 6, 4, 0, HW_UINT, NULL}, /* Enable4 for LSMW. */
-+ {"swid", 5, 15, 0, HW_UINT, NULL},
-+ {"stdby_st", 5, 2, 0, HW_STANDBY_ST, NULL},
-+ {"tlbop_st", 5, 5, 0, HW_TLBOP_ST, NULL},
-+ {"tlbop_stx", 5, 5, 0, HW_UINT, NULL},
-+ {"cctl_st0", 5, 5, 0, HW_CCTL_ST0, NULL},
-+ {"cctl_st1", 5, 5, 0, HW_CCTL_ST1, NULL},
-+ {"cctl_st2", 5, 5, 0, HW_CCTL_ST2, NULL},
-+ {"cctl_st3", 5, 5, 0, HW_CCTL_ST3, NULL},
-+ {"cctl_st4", 5, 5, 0, HW_CCTL_ST4, NULL},
-+ {"cctl_st5", 5, 5, 0, HW_CCTL_ST5, NULL},
-+ {"cctl_stx", 5, 5, 0, HW_UINT, NULL},
-+ {"cctl_lv", 10, 1, 0, HW_CCTL_LV, NULL},
-+ {"msync_st", 5, 3, 0, HW_MSYNC_ST, NULL},
-+ {"msync_stx", 5, 3, 0, HW_UINT, NULL},
-+ {"dpref_st", 20, 4, 0, HW_DPREF_ST, NULL},
-+ {"rt5", 5, 5, 0, HW_GPR, NULL},
-+ {"ra5", 0, 5, 0, HW_GPR, NULL},
-+ {"rt4", 5, 4, 0, HW_GPR, NULL},
-+ {"rt3", 6, 3, 0, HW_GPR, NULL},
-+ {"rt38", 8, 3, 0, HW_GPR, NULL}, /* rt3 used in 38 form. */
-+ {"ra3", 3, 3, 0, HW_GPR, NULL},
-+ {"rb3", 0, 3, 0, HW_GPR, NULL},
-+ {"rt5e", 4, 4, 1, HW_GPR, NULL}, /* for movd44. */
-+ {"ra5e", 0, 4, 1, HW_GPR, NULL}, /* for movd44. */
-+ {"re2", 5, 2, 0, HW_GPR, parse_re2}, /* re in push25/pop25. */
-+ {"fe5", 0, 5, 2, HW_UINT, parse_fe5}, /* imm5u in lwi45.fe. */
-+ {"pi5", 0, 5, 0, HW_UINT, parse_pi5}, /* imm5u in movpi45. */
-+ {"abdim", 2, 3, 0, HW_ABDIM, NULL}, /* Flags for LSMW. */
-+ {"abm", 2, 3, 0, HW_ABM, NULL}, /* Flags for LSMWZB. */
-+ {"dtiton", 8, 2, 0, HW_DTITON, NULL},
-+ {"dtitoff", 8, 2, 0, HW_DTITOFF, NULL},
-+
-+ {"i5s", 0, 5, 0, HW_INT, NULL},
-+ {"i10s", 0, 10, 0, HW_INT, NULL},
-+ {"i15s", 0, 15, 0, HW_INT, NULL},
-+ {"i19s", 0, 19, 0, HW_INT, NULL},
-+ {"i20s", 0, 20, 0, HW_INT, NULL},
-+ {"i8s1", 0, 8, 1, HW_INT, NULL},
-+ {"i11br3", 8, 11, 0, HW_INT, NULL},
-+ {"i14s1", 0, 14, 1, HW_INT, NULL},
-+ {"i15s1", 0, 15, 1, HW_INT, NULL},
-+ {"i16s1", 0, 16, 1, HW_INT, NULL},
-+ {"i16u5", 5, 16, 0, HW_UINT, NULL},
-+ {"i18s1", 0, 18, 1, HW_INT, NULL},
-+ {"i24s1", 0, 24, 1, HW_INT, NULL},
-+ {"i8s2", 0, 8, 2, HW_INT, NULL},
-+ {"i12s2", 0, 12, 2, HW_INT, NULL},
-+ {"i15s2", 0, 15, 2, HW_INT, NULL},
-+ {"i17s2", 0, 17, 2, HW_INT, NULL},
-+ {"i19s2", 0, 19, 2, HW_INT, NULL},
-+ {"i3u", 0, 3, 0, HW_UINT, NULL},
-+ {"i5u", 0, 5, 0, HW_UINT, NULL},
-+ {"ib5u", 10, 5, 0, HW_UINT, NULL}, /* imm5 field in ALU. */
-+ {"ib5s", 10, 5, 0, HW_INT, NULL}, /* imm5 field in ALU. */
-+ {"i9u", 0, 9, 0, HW_UINT, NULL}, /* for ex9.it. */
-+ {"ia3u", 3, 3, 0, HW_UINT, NULL}, /* for bmski33, fexti33. */
-+ {"i8u", 0, 8, 0, HW_UINT, NULL},
-+ {"ib8u", 7, 8, 0, HW_UINT, NULL}, /* for ffbi. */
-+ {"i15u", 0, 15, 0, HW_UINT, NULL},
-+ {"i20u", 0, 20, 0, HW_UINT, NULL},
-+ {"i3u1", 0, 3, 1, HW_UINT, NULL},
-+ {"i9u1", 0, 9, 1, HW_UINT, NULL},
-+ {"i3u2", 0, 3, 2, HW_UINT, NULL},
-+ {"i6u2", 0, 6, 2, HW_UINT, NULL},
-+ {"i7u2", 0, 7, 2, HW_UINT, NULL},
-+ {"i5u3", 0, 5, 3, HW_UINT, NULL}, /* for pop25/pop25. */
-+ {"i15s3", 0, 15, 3, HW_INT, NULL}, /* for dprefi.d. */
-+ {"ib4u", 10, 4, 0, HW_UINT, NULL}, /* imm5 field in ALU. */
-+ {"ib2u", 10, 2, 0, HW_UINT, NULL}, /* imm5 field in ALU. */
-+
-+ {"a_rt", 15, 5, 0, HW_GPR, NULL}, /* for audio-extension. */
-+ {"a_ru", 10, 5, 0, HW_GPR, NULL}, /* for audio-extension. */
-+ {"a_dx", 9, 1, 0, HW_DXR, NULL}, /* for audio-extension. */
-+ {"a_a30", 16, 4, 0, HW_GPR, parse_a30b20}, /* for audio-extension. */
-+ {"a_b20", 12, 4, 0, HW_GPR, parse_a30b20}, /* for audio-extension. */
-+ {"a_rt21", 5, 7, 0, HW_GPR, parse_rt21}, /* for audio-extension. */
-+ {"a_rte", 5, 7, 0, HW_GPR, parse_rte_start}, /* for audio-extension. */
-+ {"a_rte1", 5, 7, 0, HW_GPR, parse_rte_end}, /* for audio-extension. */
-+ {"a_rte69", 6, 4, 0, HW_GPR, parse_rte69_start}, /* for audio-extension. */
-+ {"a_rte69_1", 6, 4, 0, HW_GPR, parse_rte69_end}, /* for audio-extension. */
-+ {"dhy", 5, 2, 0, HW_AEXT_ACC, NULL}, /* for audio-extension. */
-+ {"dxh", 15, 2, 0, HW_AEXT_ACC, NULL}, /* for audio-extension. */
-+ {"aridx", 0, 5, 0, HW_AEXT_ARIDX, NULL}, /* for audio-extension. */
-+ {"aridx2", 0, 5, 0, HW_AEXT_ARIDX2, NULL}, /* for audio-extension. */
-+ {"aridxi", 16, 4, 0, HW_AEXT_ARIDXI, NULL}, /* for audio-extension. */
-+ {"aridxi_mx", 16, 4, 0, HW_AEXT_ARIDXI_MX, NULL}, /* for audio-extension. */
-+ {"imm16s", 0, 16, 0, HW_INT, NULL}, /* for audio-extension. */
-+ {"imm16u", 0, 16, 0, HW_UINT, NULL}, /* for audio-extension. */
-+ {"im5_i", 0, 5, 0, HW_AEXT_IM_I, parse_im5_ip}, /* for audio-extension. */
-+ {"im5_m", 0, 5, 0, HW_AEXT_IM_M, parse_im5_mr}, /* for audio-extension. */
-+ {"im6_ip", 0, 2, 0, HW_AEXT_IM_I, parse_im6_ip}, /* for audio-extension. */
-+ {"im6_iq", 0, 2, 0, HW_AEXT_IM_I, parse_im6_iq}, /* for audio-extension. */
-+ {"im6_mr", 2, 2, 0, HW_AEXT_IM_M, parse_im6_mr}, /* for audio-extension. */
-+ {"im6_ms", 4, 2, 0, HW_AEXT_IM_M, parse_im6_ms}, /* for audio-extension. */
-+ {"cp45", 4, 2, 0, HW_CP, NULL}, /* for cop-extension. */
-+ {"i12u", 8, 12, 0, HW_UINT, NULL}, /* for cop-extension. */
-+ {"cpi19", 6, 19, 0, HW_UINT, NULL}, /* for cop-extension. */
-+
-+ {NULL, 0, 0, 0, 0, NULL}
-+};
-+
-+#define DEF_REG(r) (__BIT (r))
-+#define USE_REG(r) (__BIT (r))
-+#define RT(r) (r << 20)
-+#define RA(r) (r << 15)
-+#define RB(r) (r << 10)
-+#define RA5(r) (r)
-+
-+struct nds32_opcode nds32_opcodes[] =
-+{
-+ /* opc6_encoding table OPC_6. */
-+ {"lbi", "=rt,[%ra{+%i15s}]", OP6 (LBI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lhi", "=rt,[%ra{+%i15s1}]", OP6 (LHI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lwi", "=rt,[%ra{+%i15s2}]", OP6 (LWI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lbi.bi", "=rt,[%ra],%i15s", OP6 (LBI_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lhi.bi", "=rt,[%ra],%i15s1", OP6 (LHI_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lwi.bi", "=rt,[%ra],%i15s2", OP6 (LWI_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sbi", "%rt,[%ra{+%i15s}]", OP6 (SBI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"shi", "%rt,[%ra{+%i15s1}]", OP6 (SHI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"swi", "%rt,[%ra{+%i15s2}]", OP6 (SWI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sbi.bi", "%rt,[%ra],%i15s", OP6 (SBI_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"shi.bi", "%rt,[%ra],%i15s1", OP6 (SHI_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"swi.bi", "%rt,[%ra],%i15s2", OP6 (SWI_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+
-+ {"lbsi", "=rt,[%ra{+%i15s}]", OP6 (LBSI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lhsi", "=rt,[%ra{+%i15s1}]", OP6 (LHSI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lbsi.bi", "=rt,[%ra],%i15s", OP6 (LBSI_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lhsi.bi", "=rt,[%ra],%i15s1", OP6 (LHSI_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"movi", "=rt,%i20s", OP6 (MOVI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sethi", "=rt,%i20u", OP6 (SETHI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"addi", "=rt,%ra,%i15s", OP6 (ADDI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"subri", "=rt,%ra,%i15s", OP6 (SUBRI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"andi", "=rt,%ra,%i15u", OP6 (ANDI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"xori", "=rt,%ra,%i15u", OP6 (XORI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"ori", "=rt,%ra,%i15u", OP6 (ORI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"slti", "=rt,%ra,%i15s", OP6 (SLTI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sltsi", "=rt,%ra,%i15s", OP6 (SLTSI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"bitci", "=rt,%ra,%i15u", OP6 (BITCI), 4, ATTR_V3, 0, NULL, 0, NULL},
-+
-+ /* seg-DPREFI. */
-+ {"dprefi.w", "%dpref_st,[%ra{+%i15s2}]", OP6 (DPREFI), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"dprefi.d", "%dpref_st,[%ra{+%i15s3}]", OP6 (DPREFI) | __BIT (24), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ /* seg-LBGP. */
-+ {"lbi.gp", "=rt,[+%i19s]", OP6 (LBGP), 4, ATTR (GPREL) | ATTR_V2UP, USE_REG (29), NULL, 0, NULL},
-+ {"lbsi.gp", "=rt,[+%i19s]", OP6 (LBGP) | __BIT (19), 4, ATTR (GPREL) | ATTR_V2UP, USE_REG (29), NULL, 0, NULL},
-+ /* seg-LWC/0. */
-+ {"cplwi", "%cp,=cprt,[%ra{+%i12s2}]", OP6 (LWC), 4, 0, 0, NULL, 0, NULL},
-+ {"cplwi.bi", "%cp,=cprt,[%ra],%i12s2", OP6 (LWC) | __BIT (12), 4, 0, 0, NULL, 0, NULL},
-+ /* seg-SWC/0. */
-+ {"cpswi", "%cp,=cprt,[%ra{+%i12s2}]", OP6 (SWC), 4, 0, 0, NULL, 0, NULL},
-+ {"cpswi.bi", "%cp,=cprt,[%ra],%i12s2", OP6 (SWC) | __BIT (12), 4, 0, 0, NULL, 0, NULL},
-+ /* seg-LDC/0. */
-+ {"cpldi", "%cp,%cprt,[%ra{+%i12s2}]", OP6 (LDC), 4, 0, 0, NULL, 0, NULL},
-+ {"cpldi.bi", "%cp,%cprt,[%ra],%i12s2", OP6 (LDC) | __BIT (12), 4, 0, 0, NULL, 0, NULL},
-+ /* seg-SDC/0. */
-+ {"cpsdi", "%cp,%cprt,[%ra{+%i12s2}]", OP6 (SDC), 4, 0, 0, NULL, 0, NULL},
-+ {"cpsdi.bi", "%cp,%cprt,[%ra],%i12s2", OP6 (SDC) | __BIT (12), 4, 0, 0, NULL, 0, NULL},
-+ /* seg-LSMW. */
-+ {"lmw", "%abdim %rt,[%ra],%re{,%enb4}", LSMW (LSMW), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lmwa", "%abdim %rt,[%ra],%re{,%enb4}", LSMW (LSMWA), 4, ATTR_V3MEX_V2, 0, NULL, 0, NULL},
-+ {"lmwzb", "%abm %rt,[%ra],%re{,%enb4}", LSMW (LSMWZB), 4, ATTR (STR_EXT), 0, NULL, 0, NULL},
-+ {"smw", "%abdim %rt,[%ra],%re{,%enb4}", LSMW (LSMW) | __BIT (5), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"smwa", "%abdim %rt,[%ra],%re{,%enb4}", LSMW (LSMWA) | __BIT (5), 4, ATTR_V3MEX_V2, 0, NULL, 0, NULL},
-+ {"smwzb", "%abm %rt,[%ra],%re{,%enb4}", LSMW (LSMWZB) | __BIT (5), 4, ATTR (STR_EXT), 0, NULL, 0, NULL},
-+ /* seg-HWGP. */
-+ {"lhi.gp", "=rt,[+%i18s1]", OP6 (HWGP), 4, ATTR (GPREL) | ATTR_V2UP, USE_REG (29), NULL, 0, NULL},
-+ {"lhsi.gp", "=rt,[+%i18s1]", OP6 (HWGP) | (2 << 17), 4, ATTR (GPREL) | ATTR_V2UP, USE_REG (29), NULL, 0, NULL},
-+ {"shi.gp", "%rt,[+%i18s1]", OP6 (HWGP) | (4 << 17), 4, ATTR (GPREL) | ATTR_V2UP, USE_REG (29), NULL, 0, NULL},
-+ {"lwi.gp", "=rt,[+%i17s2]", OP6 (HWGP) | (6 << 17), 4, ATTR (GPREL) | ATTR_V2UP, USE_REG (29), NULL, 0, NULL},
-+ {"swi.gp", "%rt,[+%i17s2]", OP6 (HWGP) | (7 << 17), 4, ATTR (GPREL) | ATTR_V2UP, USE_REG (29), NULL, 0, NULL},
-+ /* seg-SBGP. */
-+ {"sbi.gp", "%rt,[+%i19s]", OP6 (SBGP), 4, ATTR (GPREL) | ATTR_V2UP, USE_REG (29), NULL, 0, NULL},
-+ {"addi.gp", "=rt,%i19s", OP6 (SBGP) | __BIT (19), 4, ATTR (GPREL) | ATTR_V2UP, USE_REG (29), NULL, 0, NULL},
-+ /* seg-JI. */
-+ {"j", "%i24s1", OP6 (JI), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"jal", "%i24s1", OP6 (JI) | __BIT (24), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
-+ /* seg-JREG. */
-+ {"jr", "%rb", JREG (JR), 4, ATTR (BRANCH) | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"jral", "%rt,%rb", JREG (JRAL), 4, ATTR (BRANCH) | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"jrnez", "%rb", JREG (JRNEZ), 4, ATTR (BRANCH) | ATTR_V3, 0, NULL, 0, NULL},
-+ {"jralnez", "%rt,%rb", JREG (JRALNEZ), 4, ATTR (BRANCH) | ATTR_V3, 0, NULL, 0, NULL},
-+ {"ret", "%rb", JREG (JR) | JREG_RET, 4, ATTR (BRANCH) | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"ifret", "", JREG (JR) | JREG_IFC | JREG_RET, 4, ATTR (BRANCH) | ATTR (IFC_EXT), 0, NULL, 0, NULL},
-+ {"jral", "%rb", JREG (JRAL) | RT (30), 4, ATTR (BRANCH) | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"jralnez", "%rb", JREG (JRALNEZ) | RT (30), 4, ATTR (BRANCH) | ATTR_V3, 0, NULL, 0, NULL},
-+ {"ret", "", JREG (JR) | JREG_RET | RB (30), 4, ATTR (BRANCH) | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"jr", "%dtitoff %rb", JREG (JR), 4, ATTR (BRANCH) | ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"ret", "%dtitoff %rb", JREG (JR) | JREG_RET, 4, ATTR (BRANCH) | ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"jral", "%dtiton %rt,%rb", JREG (JRAL), 4, ATTR (BRANCH) | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"jral", "%dtiton %rb", JREG (JRAL) | RT (30), 4, ATTR (BRANCH) | ATTR_ALL, 0, NULL, 0, NULL},
-+ /* seg-BR1. */
-+ {"beq", "%rt,%ra,%i14s1", OP6 (BR1), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"bne", "%rt,%ra,%i14s1", OP6 (BR1) | __BIT (14), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
-+ /* seg-BR2. */
-+ {"ifcall", "%i16s1", BR2 (SOP0), 4, ATTR (IFC_EXT), 0, NULL, 0, NULL},
-+ {"beqz", "%rt,%i16s1", BR2 (BEQZ), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"bnez", "%rt,%i16s1", BR2 (BNEZ), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"bgez", "%rt,%i16s1", BR2 (BGEZ), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"bltz", "%rt,%i16s1", BR2 (BLTZ), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"bgtz", "%rt,%i16s1", BR2 (BGTZ), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"blez", "%rt,%i16s1", BR2 (BLEZ), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"bgezal", "%rt,%i16s1", BR2 (BGEZAL), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"bltzal", "%rt,%i16s1", BR2 (BLTZAL), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
-+ /* seg-BR3. */
-+ {"beqc", "%rt,%i11br3,%i8s1", OP6 (BR3), 4, ATTR_PCREL | ATTR_V3MUP, 0, NULL, 0, NULL},
-+ {"bnec", "%rt,%i11br3,%i8s1", OP6 (BR3) | __BIT (19), 4, ATTR_PCREL | ATTR_V3MUP, 0, NULL, 0, NULL},
-+ /* seg-SIMD. */
-+ {"pbsad", "%rt,%ra,%rb", SIMD (PBSAD), 4, ATTR (PERF2_EXT), 0, NULL, 0, NULL},
-+ {"pbsada", "%rt,%ra,%rb", SIMD (PBSADA), 4, ATTR (PERF2_EXT), 0, NULL, 0, NULL},
-+ /* seg-ALU1. */
-+ {"add", "=rt,%ra,%rb", ALU1 (ADD), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sub", "=rt,%ra,%rb", ALU1 (SUB), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"and", "=rt,%ra,%rb", ALU1 (AND), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"xor", "=rt,%ra,%rb", ALU1 (XOR), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"or", "=rt,%ra,%rb", ALU1 (OR), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"nor", "=rt,%ra,%rb", ALU1 (NOR), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"slt", "=rt,%ra,%rb", ALU1 (SLT), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"slts", "=rt,%ra,%rb", ALU1 (SLTS), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"slli", "=rt,%ra,%ib5u", ALU1 (SLLI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"srli", "=rt,%ra,%ib5u", ALU1 (SRLI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"srai", "=rt,%ra,%ib5u", ALU1 (SRAI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"rotri", "=rt,%ra,%ib5u", ALU1 (ROTRI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sll", "=rt,%ra,%rb", ALU1 (SLL), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"srl", "=rt,%ra,%rb", ALU1 (SRL), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sra", "=rt,%ra,%rb", ALU1 (SRA), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"rotr", "=rt,%ra,%rb", ALU1 (ROTR), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"seb", "=rt,%ra", ALU1 (SEB), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"seh", "=rt,%ra", ALU1 (SEH), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"bitc", "=rt,%ra,%rb", ALU1 (BITC), 4, ATTR_V3, 0, NULL, 0, NULL},
-+ {"zeh", "=rt,%ra", ALU1 (ZEH), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"wsbh", "=rt,%ra", ALU1 (WSBH), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"divsr", "=rt,=rd,%ra,%rb", ALU1 (DIVSR), 4, ATTR (DIV) | ATTR_V2UP, 0, NULL, 0, NULL},
-+ {"divr", "=rt,=rd,%ra,%rb", ALU1 (DIVR), 4, ATTR (DIV) | ATTR_V2UP, 0, NULL, 0, NULL},
-+ {"sva", "=rt,%ra,%rb", ALU1 (SVA), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"svs", "=rt,%ra,%rb", ALU1 (SVS), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"cmovz", "=rt,%ra,%rb", ALU1 (CMOVZ), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"cmovn", "=rt,%ra,%rb", ALU1 (CMOVN), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"or_srli", "=rt,%ra,%rb,%sh", ALU1 (OR_SRLI), 4, ATTR_V3, 0, NULL, 0, NULL},
-+ {"add_srli", "=rt,%ra,%rb,%sh", ALU1 (ADD_SRLI), 4, ATTR_V3, 0, NULL, 0, NULL},
-+ {"sub_srli", "=rt,%ra,%rb,%sh", ALU1 (SUB_SRLI), 4, ATTR_V3, 0, NULL, 0, NULL},
-+ {"and_srli", "=rt,%ra,%rb,%sh", ALU1 (AND_SRLI), 4, ATTR_V3, 0, NULL, 0, NULL},
-+ {"xor_srli", "=rt,%ra,%rb,%sh", ALU1 (XOR_SRLI), 4, ATTR_V3, 0, NULL, 0, NULL},
-+ {"add_slli", "=rt,%ra,%rb,%sh", ALU1 (ADD), 4, ATTR_V3, 0, NULL, 0, NULL},
-+ {"sub_slli", "=rt,%ra,%rb,%sh", ALU1 (SUB), 4, ATTR_V3, 0, NULL, 0, NULL},
-+ {"and_slli", "=rt,%ra,%rb,%sh", ALU1 (AND), 4, ATTR_V3, 0, NULL, 0, NULL},
-+ {"xor_slli", "=rt,%ra,%rb,%sh", ALU1 (XOR), 4, ATTR_V3, 0, NULL, 0, NULL},
-+ {"or_slli", "=rt,%ra,%rb,%sh", ALU1 (OR), 4, ATTR_V3, 0, NULL, 0, NULL},
-+ {"nop", "", ALU1 (SRLI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* seg-ALU2. */
-+ {"max", "=rt,%ra,%rb", ALU2 (MAX), 4, ATTR (PERF_EXT), 0, NULL, 0, NULL},
-+ {"min", "=rt,%ra,%rb", ALU2 (MIN), 4, ATTR (PERF_EXT), 0, NULL, 0, NULL},
-+ {"ave", "=rt,%ra,%rb", ALU2 (AVE), 4, ATTR (PERF_EXT), 0, NULL, 0, NULL},
-+ {"abs", "=rt,%ra", ALU2 (ABS), 4, ATTR (PERF_EXT), 0, NULL, 0, NULL},
-+ {"clips", "=rt,%ra,%ib5u", ALU2 (CLIPS), 4, ATTR (PERF_EXT), 0, NULL, 0, NULL},
-+ {"clip", "=rt,%ra,%ib5u", ALU2 (CLIP), 4, ATTR (PERF_EXT), 0, NULL, 0, NULL},
-+ {"clo", "=rt,%ra", ALU2 (CLO), 4, ATTR (PERF_EXT), 0, NULL, 0, NULL},
-+ {"clz", "=rt,%ra", ALU2 (CLZ), 4, ATTR (PERF_EXT), 0, NULL, 0, NULL},
-+ {"bset", "=rt,%ra,%ib5u", ALU2 (BSET), 4, ATTR (PERF_EXT), 0, NULL, 0, NULL},
-+ {"bclr", "=rt,%ra,%ib5u", ALU2 (BCLR), 4, ATTR (PERF_EXT), 0, NULL, 0, NULL},
-+ {"btgl", "=rt,%ra,%ib5u", ALU2 (BTGL), 4, ATTR (PERF_EXT), 0, NULL, 0, NULL},
-+ {"btst", "=rt,%ra,%ib5u", ALU2 (BTST), 4, ATTR (PERF_EXT), 0, NULL, 0, NULL},
-+ {"bse", "=rt,%ra,=rb", ALU2 (BSE), 4, ATTR (PERF2_EXT), 0, NULL, 0, NULL},
-+ {"bsp", "=rt,%ra,=rb", ALU2 (BSP), 4, ATTR (PERF2_EXT), 0, NULL, 0, NULL},
-+ {"ffzmism", "=rt,%ra,%rb", ALU2 (FFZMISM), 4, ATTR (STR_EXT), 0, NULL, 0, NULL},
-+ {"mfusr", "=rt,%usr", ALU2 (MFUSR), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"mtusr", "%rt,%usr", ALU2 (MTUSR), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"mfusr", "=rt,%ridx", ALU2 (MFUSR), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"mtusr", "%rt,%ridx", ALU2 (MTUSR), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"mul", "=rt,%ra,%rb", ALU2 (MUL), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"madds64", "=dt,%ra,%rb", ALU2 (MADDS64), 4, ATTR (MAC) | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"madd64", "=dt,%ra,%rb", ALU2 (MADD64), 4, ATTR (MAC) | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"msubs64", "=dt,%ra,%rb", ALU2 (MSUBS64), 4, ATTR (MAC) | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"msub64", "=dt,%ra,%rb", ALU2 (MSUB64), 4, ATTR (MAC) | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"divs", "=dt,%ra,%rb", ALU2 (DIVS), 4, ATTR (DIV) | ATTR (DXREG), 0, NULL, 0, NULL},
-+ {"div", "=dt,%ra,%rb", ALU2 (DIV), 4, ATTR (DIV) | ATTR (DXREG), 0, NULL, 0, NULL},
-+ {"mult32", "=dt,%ra,%rb", ALU2 (MULT32), 4, ATTR (DXREG) | ATTR_ALL, 0, NULL, 0, NULL},
-+
-+ /* seg-ALU2_FFBI. */
-+ {"ffb", "=rt,%ra,%rb", ALU2 (FFB), 4, ATTR (STR_EXT), 0, NULL, 0, NULL},
-+ {"ffbi", "=rt,%ra,%ib8u", ALU2_1 (FFBI), 4, ATTR (STR_EXT), 0, NULL, 0, NULL},
-+ /* seg-ALU2_FLMISM. */
-+ {"ffmism", "=rt,%ra,%rb", ALU2 (FFMISM), 4, ATTR (STR_EXT), 0, NULL, 0, NULL},
-+ {"flmism", "=rt,%ra,%rb", ALU2_1 (FLMISM), 4, ATTR (STR_EXT), 0, NULL, 0, NULL},
-+ /* seg-ALU2_MULSR64. */
-+ {"mults64", "=dt,%ra,%rb", ALU2 (MULTS64), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"mulsr64", "=rt,%ra,%rb", ALU2_1 (MULSR64), 4, ATTR_V3MEX_V2, 0, NULL, 0, NULL},
-+ /* seg-ALU2_MULR64. */
-+ {"mult64", "=dt,%ra,%rb", ALU2 (MULT64), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"mulr64", "=rt,%ra,%rb", ALU2_1 (MULR64), 4, ATTR_V3MEX_V2, 0, NULL, 0, NULL},
-+ /* seg-ALU2_MADDR32. */
-+ {"madd32", "=dt,%ra,%rb", ALU2 (MADD32), 4, ATTR (MAC) | ATTR (DXREG) | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"maddr32", "=rt,%ra,%rb", ALU2_1 (MADDR32), 4, ATTR (MAC) | ATTR_V2UP, 0, NULL, 0, NULL},
-+ /* seg-ALU2_MSUBR32. */
-+ {"msub32", "=dt,%ra,%rb", ALU2 (MSUB32), 4, ATTR (MAC) | ATTR (DXREG) | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"msubr32", "=rt,%ra,%rb", ALU2_1 (MSUBR32), 4, ATTR (MAC) | ATTR_V2UP, 0, NULL, 0, NULL},
-+
-+ /* seg-MISC. */
-+ {"standby", "%stdby_st", MISC (STANDBY), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"mfsr", "=rt,%sr", MISC (MFSR), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"iret", "", MISC (IRET), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"trap", "%swid", MISC (TRAP), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"teqz", "%rt{,%swid}", MISC (TEQZ), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"tnez", "%rt{,%swid}", MISC (TNEZ), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"dsb", "", MISC (DSB), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"isb", "", MISC (ISB), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"break", "%swid", MISC (BREAK), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"syscall", "%swid", MISC (SYSCALL), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"msync", "%msync_st", MISC (MSYNC), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"isync", "%rt", MISC (ISYNC), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* seg-MISC_MTSR. */
-+ {"mtsr", "%rt,%sr", MISC (MTSR), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* seg-MISC_SETEND. */
-+ {"setend.l", "", MISC (MTSR) | (SRIDX (1, 0, 0) << 10) | __BIT (5), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"setend.b", "", MISC (MTSR) | (SRIDX (1, 0, 0) << 10) | __BIT (5) | __BIT (20), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* seg-MISC_SETGIE. */
-+ {"setgie.d", "", MISC (MTSR) | (SRIDX (1, 0, 0) << 10) | __BIT (6), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"setgie.e", "", MISC (MTSR) | (SRIDX (1, 0, 0) << 10) | __BIT (6) | __BIT (20), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"mfsr", "=rt,%ridx", MISC (MFSR), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"mtsr", "%rt,%ridx", MISC (MTSR), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"trap", "", MISC (TRAP), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"break", "", MISC (BREAK), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"msync", "", MISC (MSYNC), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* seg-MISC_TLBOP. */
-+ {"tlbop", "%ra,%tlbop_st", MISC (TLBOP), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"tlbop", "%ra,%tlbop_stx", MISC (TLBOP), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"tlbop", "%rt,%ra,pb", MISC (TLBOP) | (5 << 5), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"tlbop", "%rt,%ra,probe", MISC (TLBOP) | (5 << 5), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"tlbop", "flua", MISC (TLBOP) | (7 << 5), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"tlbop", "flushall", MISC (TLBOP) | (7 << 5), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* seg-MISC_SPECL. */
-+ {"isps", "%i16u5", MISC (SPECL), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"isps", "", MISC (SPECL), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+
-+ /* seg-MEM. */
-+ {"lb", "=rt,[%ra+(%rb<<%sv)]", MEM (LB), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lb", "=rt,[%ra+%rb{<<%sv}]", MEM (LB), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lh", "=rt,[%ra+(%rb<<%sv)]", MEM (LH), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lh", "=rt,[%ra+%rb{<<%sv}]", MEM (LH), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lw", "=rt,[%ra+(%rb<<%sv)]", MEM (LW), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lw", "=rt,[%ra+%rb{<<%sv}]", MEM (LW), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"ld", "=rt,[%ra+(%rb<<%sv)]", MEM (LD), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lb.bi", "=rt,[%ra],%rb{<<%sv}", MEM (LB_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lb.bi", "=rt,[%ra],(%rb<<%sv)", MEM (LB_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lb.p", "=rt,[%ra],%rb{<<%sv}", MEM (LB_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lh.bi", "=rt,[%ra],%rb{<<%sv}", MEM (LH_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lh.bi", "=rt,[%ra],(%rb<<%sv)", MEM (LH_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lh.p", "=rt,[%ra],%rb{<<%sv}", MEM (LH_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lw.bi", "=rt,[%ra],%rb{<<%sv}", MEM (LW_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lw.bi", "=rt,[%ra],(%rb<<%sv)", MEM (LW_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lw.p", "=rt,[%ra],%rb{<<%sv}", MEM (LW_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"ld.bi", "=rt,[%ra],(%rb<<%sv)", MEM (LD_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sb", "=rt,[%ra+(%rb<<%sv)]", MEM (SB), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sb", "%rt,[%ra+%rb{<<%sv}]", MEM (SB), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sh", "=rt,[%ra+(%rb<<%sv)]", MEM (SH), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sh", "%rt,[%ra+%rb{<<%sv}]", MEM (SH), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sw", "=rt,[%ra+(%rb<<%sv)]", MEM (SW), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sw", "%rt,[%ra+%rb{<<%sv}]", MEM (SW), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sd", "=rt,[%ra+(%rb<<%sv)]", MEM (SD), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sb.bi", "%rt,[%ra],%rb{<<%sv}", MEM (SB_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sb.bi", "=rt,[%ra],(%rb<<%sv)", MEM (SB_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sb.p", "%rt,[%ra],%rb{<<%sv}", MEM (SB_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sh.bi", "%rt,[%ra],%rb{<<%sv}", MEM (SH_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sh.bi", "=rt,[%ra],(%rb<<%sv)", MEM (SH_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sh.p", "%rt,[%ra],%rb{<<%sv}", MEM (SH_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sw.bi", "%rt,[%ra],%rb{<<%sv}", MEM (SW_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sw.bi", "=rt,[%ra],(%rb<<%sv)", MEM (SW_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sw.p", "%rt,[%ra],%rb{<<%sv}", MEM (SW_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sd.bi", "=rt,[%ra],(%rb<<%sv)", MEM (SD_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+
-+ {"lbs", "=rt,[%ra+(%rb<<%sv)]", MEM (LBS), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lbs", "=rt,[%ra+%rb{<<%sv}]", MEM (LBS), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lhs", "=rt,[%ra+(%rb<<%sv)]", MEM (LHS), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lhs", "=rt,[%ra+%rb{<<%sv}]", MEM (LHS), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lbs.bi", "=rt,[%ra],%rb{<<%sv}", MEM (LBS_BI),4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lbs.bi", "=rt,[%ra],(%rb<<%sv)", MEM (LBS_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lbs.p", "=rt,[%ra],%rb{<<%sv}", MEM (LBS_BI),4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lhs.bi", "=rt,[%ra],%rb{<<%sv}", MEM (LHS_BI),4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lhs.bi", "=rt,[%ra],(%rb<<%sv)", MEM (LHS_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lhs.p", "=rt,[%ra],%rb{<<%sv}", MEM (LHS_BI),4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"llw", "=rt,[%ra+(%rb<<%sv)]", MEM (LLW), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"llw", "=rt,[%ra+%rb{<<%sv}]", MEM (LLW), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"scw", "%rt,[%ra+(%rb<<%sv)]", MEM (SCW), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"scw", "%rt,[%ra+%rb{<<%sv}]", MEM (SCW), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+
-+ {"lbup", "=rt,[%ra+(%rb<<%sv)]", MEM (LBUP), 4, ATTR_V3MEX_V2, 0, NULL, 0, NULL},
-+ {"lbup", "=rt,[%ra+%rb{<<%sv}]", MEM (LBUP), 4, ATTR_V3MEX_V2, 0, NULL, 0, NULL},
-+ {"lwup", "=rt,[%ra+(%rb<<%sv)]", MEM (LWUP), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"lwup", "=rt,[%ra+%rb{<<%sv}]", MEM (LWUP), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"sbup", "%rt,[%ra+(%rb<<%sv)]", MEM (SBUP), 4, ATTR_V3MEX_V2, 0, NULL, 0, NULL},
-+ {"sbup", "%rt,[%ra+%rb{<<%sv}]", MEM (SBUP), 4, ATTR_V3MEX_V2, 0, NULL, 0, NULL},
-+ {"swup", "%rt,[%ra+(%rb<<%sv)]", MEM (SWUP), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"swup", "%rt,[%ra+%rb{<<%sv}]", MEM (SWUP), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+
-+ {"dpref", "%dpref_st,[%ra]", OP6 (DPREFI), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"dpref", "%dpref_st,[%ra+(%rb<<%sv)]", MEM (DPREF), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"dpref", "%dpref_st,[%ra+%rb{<<%sv}]", MEM (DPREF), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+
-+ /* for Missing-Operand-load/store instructions. */
-+ {"lb", "=rt,[%ra]", OP6 (LBI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lh", "=rt,[%ra]", OP6 (LHI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lw", "=rt,[%ra]", OP6 (LWI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lbs", "=rt,[%ra]", OP6 (LBSI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lhs", "=rt,[%ra]", OP6 (LHSI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sb", "%rt,[%ra]", OP6 (SBI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sh", "%rt,[%ra]", OP6 (SHI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sw", "%rt,[%ra]", OP6 (SWI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+
-+ /* seg-LWC0. */
-+ {"flsi", "=fst,[%ra{+%i12s2}]", OP6 (LWC), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"flsi.bi", "=fst,[%ra],%i12s2", FPU_RA_IMMBI (LWC), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ /* seg-SWC0. */
-+ {"fssi", "=fst,[%ra{+%i12s2}]", OP6 (SWC), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fssi.bi", "=fst,[%ra],%i12s2", FPU_RA_IMMBI (SWC), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ /* seg-LDC0. */
-+ {"fldi", "=fdt,[%ra{+%i12s2}]", OP6 (LDC), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fldi.bi", "=fdt,[%ra],%i12s2", FPU_RA_IMMBI (LDC), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ /* seg-SDC0. */
-+ {"fsdi", "=fdt,[%ra{+%i12s2}]", OP6 (SDC), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fsdi.bi", "=fdt,[%ra],%i12s2", FPU_RA_IMMBI (SDC), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+
-+ /* seg-FPU_FS1. */
-+ {"fadds", "=fst,%fsa,%fsb", FS1 (FADDS), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fsubs", "=fst,%fsa,%fsb", FS1 (FSUBS), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fcpynss", "=fst,%fsa,%fsb", FS1 (FCPYNSS), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fcpyss", "=fst,%fsa,%fsb", FS1 (FCPYSS), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fmadds", "=fst,%fsa,%fsb", FS1 (FMADDS), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fmsubs", "=fst,%fsa,%fsb", FS1 (FMSUBS), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fcmovns", "=fst,%fsa,%fsb", FS1 (FCMOVNS), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fcmovzs", "=fst,%fsa,%fsb", FS1 (FCMOVZS), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fnmadds", "=fst,%fsa,%fsb", FS1 (FNMADDS), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fnmsubs", "=fst,%fsa,%fsb", FS1 (FNMSUBS), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fmuls", "=fst,%fsa,%fsb", FS1 (FMULS), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fdivs", "=fst,%fsa,%fsb", FS1 (FDIVS), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ /* seg-FPU_FS1_F2OP. */
-+ {"fs2d", "=fdt,%fsa", FS1_F2OP (FS2D), 4, ATTR (FPU) | ATTR (FPU_SP_EXT) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fsqrts", "=fst,%fsa", FS1_F2OP (FSQRTS), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fabss", "=fst,%fsa", FS1_F2OP (FABSS), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fui2s", "=fst,%fsa", FS1_F2OP (FUI2S), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fsi2s", "=fst,%fsa", FS1_F2OP (FSI2S), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fs2ui", "=fst,%fsa", FS1_F2OP (FS2UI), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fs2ui.z", "=fst,%fsa", FS1_F2OP (FS2UI_Z), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fs2si", "=fst,%fsa", FS1_F2OP (FS2SI), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fs2si.z", "=fst,%fsa", FS1_F2OP (FS2SI_Z), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ /* seg-FPU_FS2. */
-+ {"fcmpeqs", "=fst,%fsa,%fsb", FS2 (FCMPEQS), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fcmpeqs.e", "=fst,%fsa,%fsb", FS2 (FCMPEQS_E), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fcmplts", "=fst,%fsa,%fsb", FS2 (FCMPLTS), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fcmplts.e", "=fst,%fsa,%fsb", FS2 (FCMPLTS_E), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fcmples", "=fst,%fsa,%fsb", FS2 (FCMPLES), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fcmples.e", "=fst,%fsa,%fsb", FS2 (FCMPLES_E), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fcmpuns", "=fst,%fsa,%fsb", FS2 (FCMPUNS), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ {"fcmpuns.e", "=fst,%fsa,%fsb", FS2 (FCMPUNS_E), 4, ATTR (FPU) | ATTR (FPU_SP_EXT), 0, NULL, 0, NULL},
-+ /* seg-FPU_FD1. */
-+ {"faddd", "=fdt,%fda,%fdb", FD1 (FADDD), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fsubd", "=fdt,%fda,%fdb", FD1 (FSUBD), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fcpynsd", "=fdt,%fda,%fdb", FD1 (FCPYNSD), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fcpysd", "=fdt,%fda,%fdb", FD1 (FCPYSD), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fmaddd", "=fdt,%fda,%fdb", FD1 (FMADDD), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fmsubd", "=fdt,%fda,%fdb", FD1 (FMSUBD), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fcmovnd", "=fdt,%fda,%fsb", FD1 (FCMOVND), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fcmovzd", "=fdt,%fda,%fsb", FD1 (FCMOVZD), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fnmaddd", "=fdt,%fda,%fdb", FD1 (FNMADDD), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fnmsubd", "=fdt,%fda,%fdb", FD1 (FNMSUBD), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fmuld", "=fdt,%fda,%fdb", FD1 (FMULD), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fdivd", "=fdt,%fda,%fdb", FD1 (FDIVD), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ /* seg-FPU_FD1_F2OP. */
-+ {"fd2s", "=fst,%fda", FD1_F2OP (FD2S), 4, ATTR (FPU) | ATTR (FPU_SP_EXT) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fsqrtd", "=fdt,%fda", FD1_F2OP (FSQRTD), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fabsd", "=fdt,%fda", FD1_F2OP (FABSD), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fui2d", "=fdt,%fsa", FD1_F2OP (FUI2D), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fsi2d", "=fdt,%fsa", FD1_F2OP (FSI2D), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fd2ui", "=fst,%fda", FD1_F2OP (FD2UI), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fd2ui.z", "=fst,%fda", FD1_F2OP (FD2UI_Z), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fd2si", "=fst,%fda", FD1_F2OP (FD2SI), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fd2si.z", "=fst,%fda", FD1_F2OP (FD2SI_Z), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ /* seg-FPU_FD2. */
-+ {"fcmpeqd", "=fst,%fda,%fdb", FD2 (FCMPEQD), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fcmpeqd.e", "=fst,%fda,%fdb", FD2 (FCMPEQD_E), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fcmpltd", "=fst,%fda,%fdb", FD2 (FCMPLTD), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fcmpltd.e", "=fst,%fda,%fdb", FD2 (FCMPLTD_E), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fcmpled", "=fst,%fda,%fdb", FD2 (FCMPLED), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fcmpled.e", "=fst,%fda,%fdb", FD2 (FCMPLED_E), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fcmpund", "=fst,%fda,%fdb", FD2 (FCMPUND), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ {"fcmpund.e", "=fst,%fda,%fdb", FD2 (FCMPUND_E), 4, ATTR (FPU) | ATTR (FPU_DP_EXT), 0, NULL, 0, NULL},
-+ /* seg-FPU_MFCP. */
-+ {"fmfsr", "=rt,%fsa", MFCP (FMFSR), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fmfdr", "=rt,%fda", MFCP (FMFDR), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ /* seg-FPU_MFCP_XR. */
-+ {"fmfcfg", "=rt", MFCP_XR(FMFCFG), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fmfcsr", "=rt", MFCP_XR(FMFCSR), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ /* seg-FPU_MTCP. */
-+ {"fmtsr", "%rt,=fsa", MTCP (FMTSR), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fmtdr", "%rt,=fda", MTCP (FMTDR), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ /* seg-FPU_MTCP_XR. */
-+ {"fmtcsr", "%rt", MTCP_XR(FMTCSR), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ /* seg-FPU_FLS. */
-+ {"fls", "=fst,[%ra+(%rb<<%sv)]", FPU_MEM(FLS), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fls.bi", "=fst,[%ra],(%rb<<%sv)", FPU_MEMBI(FLS), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ /* seg-FPU_FLD. */
-+ {"fld", "=fdt,[%ra+(%rb<<%sv)]", FPU_MEM(FLD), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fld.bi", "=fdt,[%ra],(%rb<<%sv)", FPU_MEMBI(FLD), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ /* seg-FPU_FSS. */
-+ {"fss", "=fst,[%ra+(%rb<<%sv)]", FPU_MEM(FSS), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fss.bi", "=fst,[%ra],(%rb<<%sv)", FPU_MEMBI(FSS), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ /* seg-FPU_FSD. */
-+ {"fsd", "=fdt,[%ra+(%rb<<%sv)]", FPU_MEM(FSD), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fsd.bi", "=fdt,[%ra],(%rb<<%sv)", FPU_MEMBI(FSD), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fls", "=fst,[%ra+%rb{<<%sv}]", FPU_MEM(FLS), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fls.bi", "=fst,[%ra],%rb{<<%sv}", FPU_MEMBI(FLS), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fld", "=fdt,[%ra+%rb{<<%sv}]", FPU_MEM(FLD), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fld.bi", "=fdt,[%ra],%rb{<<%sv}", FPU_MEMBI(FLD), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fss", "=fst,[%ra+%rb{<<%sv}]", FPU_MEM(FSS), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fss.bi", "=fst,[%ra],%rb{<<%sv}", FPU_MEMBI(FSS), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fsd", "=fdt,[%ra+%rb{<<%sv}]", FPU_MEM(FSD), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"fsd.bi", "=fdt,[%ra],%rb{<<%sv}", FPU_MEMBI(FSD), 4, ATTR (FPU), 0, NULL, 0, NULL},
-+ {"cctl", "%ra,%cctl_st0", MISC (CCTL), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"cctl", "%ra,%cctl_st1{,%cctl_lv}", MISC (CCTL), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"cctl", "=rt,%ra,%cctl_st2", MISC (CCTL), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"cctl", "%rt,%ra,%cctl_st3", MISC (CCTL), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"cctl", "%cctl_st4", MISC (CCTL), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ {"cctl", "%cctl_st5{,%cctl_lv}", MISC (CCTL), 4, ATTR_V3, 0, NULL, 0, NULL},
-+ {"cctl", "=rt,%ra,%cctl_stx,%cctl_lv", MISC (CCTL), 4, ATTR_V3MEX_V1, 0, NULL, 0, NULL},
-+ /* seg-Alias instructions. */
-+ {"neg", "=rt,%ra", OP6 (SUBRI), 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"zeb", "=rt,%ra", OP6 (ANDI) | 0xff, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+
-+ /* seg-COP. */
-+ {"cpe1", "%cp45,%cpi19", OP6 (COP) | 0x00, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"cpe2", "%cp45,%cpi19", OP6 (COP) | 0x04, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"cpe3", "%cp45,%cpi19", OP6 (COP) | 0x08, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"cpe4", "%cp45,%cpi19", OP6 (COP) | 0x0C, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* seg-COP-MFCPX. */
-+ {"mfcpw", "%cp45,=rt,%i12u", OP6 (COP) | 0x01, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"mfcpd", "%cp45,=rt,%i12u", OP6 (COP) | 0x41, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"mfcppw", "%cp45,=rt,%i12u", OP6 (COP) | 0xc1, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* seg-COP-CPLW. */
-+ {"cplw", "%cp45,%cprt,[%ra+%rb<<%sv]", OP6 (COP) | 0x02, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"cplw.bi", "%cp45,%cprt,[%ra],%rb<<%sv", OP6 (COP) | 0x82, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* seg-COP-CPLD. */
-+ {"cpld", "%cp45,%cprt,[%ra+%rb<<%sv]", OP6 (COP) | 0x03, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"cpld.bi", "%cp45,%cprt,[%ra],%rb<<%sv", OP6 (COP) | 0x83, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* seg-COP-MTCPX. */
-+ {"mtcpw", "%cp45,%rt,%i12u", OP6 (COP) | 0x09, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"mtcpd", "%cp45,%rt,%i12u", OP6 (COP) | 0x49, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"mtcppw", "%cp45,%rt,%i12u", OP6 (COP) | 0xc9, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* seg-COP-CPSW. */
-+ {"cpsw", "%cp45,%cprt,[%ra+%rb<<%sv]", OP6 (COP) | 0x0a, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"cpsw.bi", "%cp45,%cprt,[%ra],%rb<<%sv", OP6 (COP) | 0x8a, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* seg-COP-CPSD. */
-+ {"cpsd", "%cp45,%cprt,[%ra+%rb<<%sv]", OP6 (COP) | 0x0b, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"cpsd.bi", "%cp45,%cprt,[%ra],%rb<<%sv", OP6 (COP) | 0x8b, 4, ATTR_ALL, 0, NULL, 0, NULL},
-+
-+ /* 16-bit instructions. */
-+ /* get bit14~bit11 of 16-bit instruction. */
-+ {"beqz38", "%rt38,%i8s1", 0xc000, 2, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"bnez38", "%rt38,%i8s1", 0xc800, 2, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
-+ {"beqs38", "%rt38,%i8s1", 0xd000, 2, ATTR_PCREL | ATTR_ALL, USE_REG (5), NULL, 0, NULL},
-+ {"bnes38", "%rt38,%i8s1", 0xd800, 2, ATTR_PCREL | ATTR_ALL, USE_REG (5), NULL, 0, NULL},
-+
-+ /* SEG00, get bit10. */
-+ {"mov55", "=rt5,%ra5", 0x8000, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"movi55", "=rt5,%i5s", 0x8400, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* SEG01 bit10~bit9. */
-+ {"add45", "=rt4,%ra5", 0x8800, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sub45", "=rt4,%ra5", 0x8a00, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"addi45", "=rt4,%i5u", 0x8c00, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"subi45", "=rt4,%i5u", 0x8e00, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* SEG02 bit10~bit9. */
-+ {"srai45", "=rt4,%i5u", 0x9000, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"srli45", "=rt4,%i5u", 0x9200, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"slli333", "=rt3,%ra3,%i3u", 0x9400, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* SEG03 bit10~bit9. */
-+ {"add333", "=rt3,%ra3,%rb3", 0x9800, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sub333", "=rt3,%ra3,%rb3", 0x9a00, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"addi333", "=rt3,%ra3,%i3u", 0x9c00, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"subi333", "=rt3,%ra3,%i3u", 0x9e00, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* SEG04 bit10~bit9. */
-+ {"lwi333", "=rt3,[%ra3{+%i3u2}]", 0xa000, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lwi333.bi", "=rt3,[%ra3],%i3u2", 0xa200, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lhi333", "=rt3,[%ra3{+%i3u1}]", 0xa400, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"lbi333", "=rt3,[%ra3{+%i3u}]", 0xa600, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* SEG05 bit10~bit9. */
-+ {"swi333", "%rt3,[%ra3{+%i3u2}]", 0xa800, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"swi333.bi", "%rt3,[%ra3],%i3u2", 0xaa00, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"shi333", "%rt3,[%ra3{+%i3u1}]", 0xac00, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"sbi333", "%rt3,[%ra3{+%i3u}]", 0xae00, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* SEG06 bit10~bit9. */
-+ {"addri36.sp", "%rt3,%i6u2", 0xb000, 2, ATTR_V3MUP, USE_REG (31), NULL, 0, NULL},
-+ {"lwi45.fe", "=rt4,%fe5", 0xb200, 2, ATTR_V3MUP, USE_REG (8), NULL, 0, NULL},
-+ {"lwi450", "=rt4,[%ra5]", 0xb400, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"swi450", "%rt4,[%ra5]", 0xb600, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ /* SEG07 bit7. */
-+ {"lwi37", "=rt38,[$fp{+%i7u2}]", 0xb800, 2, ATTR_ALL, USE_REG (28), NULL, 0, NULL},
-+ {"swi37", "%rt38,[$fp{+%i7u2}]", 0xb880, 2, ATTR_ALL, USE_REG (28), NULL, 0, NULL},
-+ /* SEG10_1 if Rt3=5. */
-+ {"j8", "%i8s1", 0xd500, 2, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
-+ /* SEG11_1 if Rt3=5. */
-+ /* SEG11_2 bit7~bit5. */
-+ {"jr5", "%ra5", 0xdd00, 2, ATTR_ALL | ATTR (BRANCH), 0, NULL, 0, NULL},
-+ {"jral5", "%ra5", 0xdd20, 2, ATTR_ALL | ATTR (BRANCH), 0, NULL, 0, NULL},
-+ {"ex9.it", "%i5u", 0xdd40, 2, ATTR (EX9_EXT), 0, NULL, 0, NULL},
-+ {"ret5", "%ra5", 0xdd80, 2, ATTR_ALL | ATTR (BRANCH), 0, NULL, 0, NULL},
-+ {"add5.pc", "%ra5", 0xdda0, 2, ATTR_V3, 0, NULL, 0, NULL},
-+ /* SEG11_3 if Ra5=30. */
-+ {"ret5", "", 0xdd80 | RA5 (30), 2, ATTR_ALL | ATTR (BRANCH), 0, NULL, 0, NULL},
-+ /* SEG12 bit10~bit9. */
-+ {"slts45", "%rt4,%ra5", 0xe000, 2, ATTR_ALL, DEF_REG (15), NULL, 0, NULL},
-+ {"slt45", "%rt4,%ra5", 0xe200, 2, ATTR_ALL, DEF_REG (15), NULL, 0, NULL},
-+ {"sltsi45", "%rt4,%i5u", 0xe400, 2, ATTR_ALL, DEF_REG (15), NULL, 0, NULL},
-+ {"slti45", "%rt4,%i5u", 0xe600, 2, ATTR_ALL, DEF_REG (15), NULL, 0, NULL},
-+ /* SEG13 bit10~bit9. */
-+ {"break16", "%i5u", 0xea00, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"addi10.sp", "%i10s", 0xec00, 2, ATTR_V2UP, USE_REG (31) | DEF_REG (31), NULL, 0, NULL},
-+ {"addi10.sp", "%i10s", 0xec00, 2, ATTR_V2UP, USE_REG (31) | DEF_REG (31), NULL, 0, NULL},
-+ /* SEG13_1 bit8. */
-+ {"beqzs8", "%i8s1", 0xe800, 2, ATTR_PCREL | ATTR_ALL, USE_REG (15), NULL, 0, NULL},
-+ {"bnezs8", "%i8s1", 0xe900, 2, ATTR_PCREL | ATTR_ALL, USE_REG (15), NULL, 0, NULL},
-+ /* SEG13_2 bit8~bit5. */
-+ {"ex9.it", "%i9u", 0xea00, 2, ATTR (EX9_EXT), 0, NULL, 0, NULL},
-+ /* SEG14 bit7. */
-+ {"lwi37.sp", "=rt38,[+%i7u2]", 0xf000, 2, ATTR_V2UP, USE_REG (31), NULL, 0, NULL},
-+ {"swi37.sp", "%rt38,[+%i7u2]", 0xf080, 2, ATTR_V2UP, USE_REG (31), NULL, 0, NULL},
-+ /* SEG15 bit10~bit9. */
-+ {"ifcall9", "%i9u1", 0xf800, 2, ATTR (IFC_EXT), 0, NULL, 0, NULL},
-+ {"movpi45", "=rt4,%pi5", 0xfa00, 2, ATTR_V3MUP, 0, NULL, 0, NULL},
-+ /* SEG15_1 bit8. */
-+ {"movd44", "=rt5e,%ra5e", 0xfd00, 2, ATTR_V3MUP, 0, NULL, 0, NULL},
-+
-+ /* SEG-BFMI333 bit2~bit0. */
-+ {"zeb33", "=rt3,%ra3", 0x9600, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"zeh33", "=rt3,%ra3", 0x9601, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"seb33", "=rt3,%ra3", 0x9602, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"seh33", "=rt3,%ra3", 0x9603, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"xlsb33", "=rt3,%ra3", 0x9604, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"x11b33", "=rt3,%ra3", 0x9605, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"bmski33", "=rt3,%ia3u", 0x9606, 2, ATTR_V3MUP, 0, NULL, 0, NULL},
-+ {"fexti33", "=rt3,%ia3u", 0x9607, 2, ATTR_V3MUP, 0, NULL, 0, NULL},
-+ /* SEG-PUSHPOP25 bit8~bit7. */
-+ {"push25", "%re2,%i5u3", 0xfc00, 2, ATTR_V3MUP, USE_REG (31) | DEF_REG (31), NULL, 0, NULL},
-+ {"pop25", "%re2,%i5u3", 0xfc80, 2, ATTR_V3MUP | ATTR (BRANCH), USE_REG (31) | DEF_REG (31), NULL, 0, NULL},
-+ /* SEG-MISC33 bit2~bit0. */
-+ {"neg33", "=rt3,%ra3", 0xfe02, 2, ATTR_V3MUP, 0, NULL, 0, NULL},
-+ {"not33", "=rt3,%ra3", 0xfe03, 2, ATTR_V3MUP, 0, NULL, 0, NULL},
-+ {"mul33", "=rt3,%ra3", 0xfe04, 2, ATTR_V3MUP, 0, NULL, 0, NULL},
-+ {"xor33", "=rt3,%ra3", 0xfe05, 2, ATTR_V3MUP, 0, NULL, 0, NULL},
-+ {"and33", "=rt3,%ra3", 0xfe06, 2, ATTR_V3MUP, 0, NULL, 0, NULL},
-+ {"or33", "=rt3,%ra3", 0xfe07, 2, ATTR_V3MUP, 0, NULL, 0, NULL},
-+ /* SEG-Alias instructions. */
-+ {"nop16", "", 0x9200, 2, ATTR_ALL, 0, NULL, 0, NULL},
-+ {"ifret16", "", 0x83ff, 2, ATTR (IFC_EXT), 0, NULL, 0, NULL},
-+
-+ /* Saturation ext ISA. */
-+ {"kaddw", "=rt,%ra,%rb", ALU2 (KADD), 4, ATTR (SATURATION_EXT), 0, NULL, 0, NULL},
-+ {"ksubw", "=rt,%ra,%rb", ALU2 (KSUB), 4, ATTR (SATURATION_EXT), 0, NULL, 0, NULL},
-+ {"kaddh", "=rt,%ra,%rb", ALU2_1 (KADD), 4, ATTR (SATURATION_EXT), 0, NULL, 0, NULL},
-+ {"ksubh", "=rt,%ra,%rb", ALU2_1 (KSUB), 4, ATTR (SATURATION_EXT), 0, NULL, 0, NULL},
-+ {"kdmbb", "=rt,%ra,%rb", ALU2 (KMxy), 4, ATTR (SATURATION_EXT), 0, NULL, 0, NULL},
-+ {"kdmbt", "=rt,%ra,%rb", ALU2 (KMxy) | __BIT (6), 4, ATTR (SATURATION_EXT), 0, NULL, 0, NULL},
-+ {"kdmtb", "=rt,%ra,%rb", ALU2 (KMxy) | __BIT (7), 4, ATTR (SATURATION_EXT), 0, NULL, 0, NULL},
-+ {"kdmtt", "=rt,%ra,%rb", ALU2 (KMxy) | __BIT (6) | __BIT (7), 4, ATTR (SATURATION_EXT), 0, NULL, 0, NULL},
-+ {"khmbb", "=rt,%ra,%rb", ALU2 (KMxy) | __BIT (8), 4, ATTR (SATURATION_EXT), 0, NULL, 0, NULL},
-+ {"khmbt", "=rt,%ra,%rb", ALU2 (KMxy) | __BIT (6) | __BIT (8), 4, ATTR (SATURATION_EXT), 0, NULL, 0, NULL},
-+ {"khmtb", "=rt,%ra,%rb", ALU2 (KMxy) | __BIT (7) | __BIT (8), 4, ATTR (SATURATION_EXT), 0, NULL, 0, NULL},
-+ {"khmtt", "=rt,%ra,%rb", ALU2 (KMxy) | __BIT (6) | __BIT (7) | __BIT (8), 4, ATTR (SATURATION_EXT), 0, NULL, 0, NULL},
-+ {"kslraw", "=rt,%ra,%rb", ALU2 (KSLRAW), 4, ATTR (SATURATION_EXT), 0, NULL, 0, NULL},
-+ {"ksll", "=rt,%ra,%rb", ALU2 (KSLRAW), 4, ATTR (SATURATION_EXT), 0, NULL, 0, NULL},
-+ {"kslraw.u", "=rt,%ra,%rb", ALU2 (KSLRAWu), 4, ATTR (SATURATION_EXT), 0, NULL, 0, NULL},
-+ {"rdov", "=rt", ALU2_1 (RDOV) | ( 0x1e << 15), 4, ATTR (SATURATION_EXT), 0, NULL, 0, NULL},
-+ {"clrov", "", ALU2_1 (CLROV) | ( 0x1e << 15), 4, ATTR (SATURATION_EXT), 0, NULL, 0, NULL},
-+
-+ /* Audio ext. instructions. */
-+
-+ {"amtari", "%aridxi,%imm16u", AUDIO (AMTARI), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amtari", "%aridxi_mx,%imm16s", AUDIO (AMTARI), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMADD. */
-+ {"alr2", "=a_rt,=a_ru,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMADD) | (0x1 << 6), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amaddl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMADD) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amaddl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMADD) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amaddl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMADD) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amaddl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMADD) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amaddsa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMADD) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"alr", "=a_rt,[%im5_i],%im5_m", AUDIO (AMADD) | (0x01 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amadd", "=a_dx,%ra,%rb", AUDIO (AMADD), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amabbs", "=a_dx,%ra,%rb", AUDIO (AMADD) | 0x01, 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMSUB. */
-+ {"amsubl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMSUB) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amsubl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMSUB) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amsubl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMSUB) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amsubl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMSUB) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amsubsa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMSUB) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"asr", "%ra,[%im5_i],%im5_m", AUDIO (AMSUB) | (0x01 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amsub", "=a_dx,%ra,%rb", AUDIO (AMSUB), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amabts", "=a_dx,%ra,%rb", AUDIO (AMSUB) |0x01, 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMULT. */
-+ {"amultl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMULT) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amultl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMULT) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amultl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMULT) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amultl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMULT) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amultsa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMULT) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"ala", "=dxh,[%im5_i],%im5_m", AUDIO (AMULT) | (0x01 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amult", "=a_dx,%ra,%rb", AUDIO (AMULT), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amatbs", "=a_dx,%ra,%rb", AUDIO (AMULT) |0x01, 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"asats48", "=a_dx", AUDIO (AMULT) | (0x02 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"awext", "%ra,%a_dx,%i5u", AUDIO (AMULT) | (0x03 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMFAR. */
-+ {"amatts", "=a_dx,%ra,%rb", AUDIO (AMFAR) | 0x01, 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"asa", "=dxh,[%im5_i],%im5_m", AUDIO (AMFAR) | (0x01 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amtar", "%ra,%aridx", AUDIO (AMFAR) | (0x02 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amtar2", "%ra,%aridx2", AUDIO (AMFAR) | (0x12 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amfar", "=ra,%aridx", AUDIO (AMFAR) | (0x03 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amfar2", "=ra,%aridx2", AUDIO (AMFAR) | (0x13 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMADDS. */
-+ {"amaddsl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMADDS) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amaddsl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMADDS) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amaddsl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMADDS) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amaddsl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMADDS) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amaddssa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMADDS) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"aupi", "%im5_i,%im5_m", AUDIO (AMADDS) | (0x01 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amadds", "=a_dx,%ra,%rb", AUDIO (AMADDS), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"ambbs", "=a_dx,%ra,%rb", AUDIO (AMADDS) |0x01, 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amawbs", "=a_dx,%ra,%rb", AUDIO (AMADDS) |0x02, 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMSUBS. */
-+ {"amsubsl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMSUBS) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amsubsl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMSUBS) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amsubsl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMSUBS) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amsubsl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMSUBS) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amsubssa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMSUBS) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amsubs", "=a_dx,%ra,%rb", AUDIO (AMSUBS), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"ambts", "=a_dx,%ra,%rb", AUDIO (AMSUBS) |0x01, 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amawts", "=a_dx,%ra,%rb", AUDIO (AMSUBS) |0x02, 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMULTS. */
-+ {"amultsl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMULTS) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amultsl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMULTS) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amultsl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMULTS) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amultsl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMULTS) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amultssa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMULTS) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amults", "=a_dx,%ra,%rb", AUDIO (AMULTS), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amtbs", "=a_dx,%ra,%rb", AUDIO (AMULTS) |0x01, 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amwbs", "=a_dx,%ra,%rb", AUDIO (AMULTS) |0x02, 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMNEGS. */
-+ {"amnegsl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMNEGS) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amnegsl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMNEGS) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amnegsl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMNEGS) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amnegsl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMNEGS) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amnegssa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMNEGS) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amnegs", "=a_dx,%ra,%rb", AUDIO (AMNEGS), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amtts", "=a_dx,%ra,%rb", AUDIO (AMNEGS) |0x01, 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amwts", "=a_dx,%ra,%rb", AUDIO (AMNEGS) |0x02, 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AADDL. */
-+ {"aaddl", "=a_rte69,%ra,%rb,%a_rte69_1,[%im5_i],%im5_m", AUDIO (AADDL), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"asubl", "=a_rte69,%ra,%rb,%a_rte69_1,[%im5_i],%im5_m", AUDIO (AADDL) | (0x01 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMAWBS. */
-+ {"amawbsl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMAWBS) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amawbsl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMAWBS) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amawbsl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMAWBS) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amawbsl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMAWBS) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amawbssa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMAWBS) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMAWTS. */
-+ {"amawtsl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMAWTS) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amawtsl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMAWTS) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amawtsl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMAWTS) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amawtsl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMAWTS) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amawtssa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMAWTS) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMWBS. */
-+ {"amwbsl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMWBS) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amwbsl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMWBS) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amwbsl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMWBS) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amwbsl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMWBS) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amwbssa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMWBS) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amwbssa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMWBS) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMWTS. */
-+ {"amwtsl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMWTS) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amwtsl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMWTS) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amwtsl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMWTS) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amwtsl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMWTS) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amwtssa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMWTS) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMABBS. */
-+ {"amabbsl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMABBS) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amabbsl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMABBS) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amabbsl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMABBS) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amabbsl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMABBS) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amabbssa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMABBS) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMABTS. */
-+ {"amabtsl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMABTS) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amabtsl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMABTS) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amabtsl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMABTS) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amabtsl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMABTS) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amabtssa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMABTS) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMATBS. */
-+ {"amatbsl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMATBS) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amatbsl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMATBS) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amatbsl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMATBS) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amatbsl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMATBS) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amatbssa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMATBS) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMATTS. */
-+ {"amattsl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMATTS) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amattsl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMATTS) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amattsl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMATTS) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amattsl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMATTS) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amattssa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMATTS) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMBBS. */
-+ {"ambbsl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMBBS) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"ambbsl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMBBS) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"ambbsl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMBBS) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"ambbsl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMBBS) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"ambbssa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMBBS) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMBTS. */
-+ {"ambtsl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMBTS) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"ambtsl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMBTS) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"ambtsl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMBTS) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"ambtsl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMBTS) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"ambtssa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMBTS) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMTBS. */
-+ {"amtbsl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMTBS) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amtbsl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMTBS) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amtbsl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMTBS) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amtbsl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMTBS) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amtbssa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMTBS) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ /* N32_AEXT_AMTTS. */
-+ {"amttsl.s", "=a_dx,%ra,%rb,[%im5_i],%im5_m", AUDIO (AMTTS) | (0x04 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amttsl.l", "=a_dx,%a_a30,%a_b20,%a_rt21,[%im5_i],%im5_m", AUDIO (AMTTS) | (0x06 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amttsl2.s", "=a_dx,%ra,%rb,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMTTS) | (0x08 << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amttsl2.l", "=a_dx,%a_a30,%a_b20,%a_rte,%a_rte1,[%im6_ip],[%im6_iq],%im6_mr,%im6_ms", AUDIO (AMTTS) | (0x0A << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+ {"amttssa", "=a_dx,%ra,%rb,%dhy,[%im5_i],%im5_m", AUDIO (AMTTS) | (0x0C << 5), 4, ATTR (AUDIO_ISAEXT), 0, NULL, 0, NULL},
-+
-+ /* DSP ISA. */
-+ /* ALU2 Bit 9-6 = 0000. */
-+ {"add64", "=rt,%ra,%rb", ALU2 (ADD64), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"sub64", "=rt,%ra,%rb", ALU2 (SUB64), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smal", "=rt,%ra,%rb", ALU2 (SMAL), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"radd64", "=rt,%ra,%rb", ALU2 (RADD64), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"rsub64", "=rt,%ra,%rb", ALU2 (RSUB64), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"uradd64", "=rt,%ra,%rb", ALU2 (URADD64), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ursub64", "=rt,%ra,%rb", ALU2 (URSUB64), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kadd64", "=rt,%ra,%rb", ALU2 (KADD64), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ksub64", "=rt,%ra,%rb", ALU2 (KSUB64), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ukadd64", "=rt,%ra,%rb", ALU2 (UKADD64), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"uksub64", "=rt,%ra,%rb", ALU2 (UKSUB64), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ /* ALU2 Bit 9-6 = 0001. */
-+ {"smar64", "=rt,%ra,%rb", ALU2_1 (SMAR64), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"umar64", "=rt,%ra,%rb", ALU2_1 (UMAR64), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smsr64", "=rt,%ra,%rb", ALU2_1 (SMSR64), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"umsr64", "=rt,%ra,%rb", ALU2_1 (UMSR64), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmar64", "=rt,%ra,%rb", ALU2_1 (KMAR64), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ukmar64", "=rt,%ra,%rb", ALU2_1 (UKMAR64), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmsr64", "=rt,%ra,%rb", ALU2_1 (KMSR64), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ukmsr64", "=rt,%ra,%rb", ALU2_1 (UKMSR64), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smalda", "=rt,%ra,%rb", ALU2_1 (SMALDA), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smslda", "=rt,%ra,%rb", ALU2_1 (SMSLDA), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smalds", "=rt,%ra,%rb", ALU2_1 (SMALDS), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smalbb", "=rt,%ra,%rb", ALU2_1 (SMALBB), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smalxda", "=rt,%ra,%rb", ALU2_1 (SMALXDA), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smslxda", "=rt,%ra,%rb", ALU2_1 (SMSLXDA), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smalxds", "=rt,%ra,%rb", ALU2_1 (SMALXDS), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smalbt", "=rt,%ra,%rb", ALU2_1 (SMALBT), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smalbt", "=rt,%ra,%rb", ALU2_1 (SMALBT), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smaldrs", "=rt,%ra,%rb", ALU2_1 (SMALDRS), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smaltt", "=rt,%ra,%rb", ALU2_1 (SMALTT), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smds", "=rt,%ra,%rb", ALU2_1 (SMDS), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smxds", "=rt,%ra,%rb", ALU2_1 (SMXDS), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smdrs", "=rt,%ra,%rb", ALU2_1 (SMDRS), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmadrs", "=rt,%ra,%rb", ALU2_1 (KMADRS), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmads", "=rt,%ra,%rb", ALU2_1 (KMADS), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmaxds", "=rt,%ra,%rb", ALU2_1 (KMAXDS), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ /* DSP MISC. */
-+ {"bpick", "=rt,%ra,%rb,%rd", MISC (BPICK), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ /* ALU_2 KMxy. */
-+ {"khm16", "=rt,%ra,%rb", ALU2 (KMxy) | __BIT (9) | __BIT (8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"khmx16", "=rt,%ra,%rb", ALU2 (KMxy) | __BIT (9) | __BIT (8) | __BIT (6), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smul16", "=rt,%ra,%rb", ALU2 (KMxy) | __BIT (9), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smulx16", "=rt,%ra,%rb", ALU2 (KMxy) | __BIT (9) | __BIT (6), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"umul16", "=rt,%ra,%rb", ALU2 (KMxy) | __BIT (9) | __BIT (7), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"umulx16", "=rt,%ra,%rb", ALU2 (KMxy) | __BIT (9) | __BIT (7) | __BIT (6), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ /* ALU2 Bit 9-6 = 0010. */
-+ {"kadd16", "=rt,%ra,%rb", ALU2_2 (KADD16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ksub16", "=rt,%ra,%rb", ALU2_2 (KSUB16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kcras16", "=rt,%ra,%rb", ALU2_2 (KCRAS16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kcrsa16", "=rt,%ra,%rb", ALU2_2 (KCRSA16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kadd8", "=rt,%ra,%rb", ALU2_2 (KADD8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ksub8", "=rt,%ra,%rb", ALU2_2 (KSUB8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"wext", "=rt,%ra,%rb", ALU2_2 (WEXT), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"wexti", "=rt,%ra,%ib5u", ALU2_2 (WEXTI), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ukadd16", "=rt,%ra,%rb", ALU2_2 (UKADD16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"uksub16", "=rt,%ra,%rb", ALU2_2 (UKSUB16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ukcras16", "=rt,%ra,%rb", ALU2_2 (UKCRAS16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ukcrsa16", "=rt,%ra,%rb", ALU2_2 (UKCRSA16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ukadd8", "=rt,%ra,%rb", ALU2_2 (UKADD8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"uksub8", "=rt,%ra,%rb", ALU2_2 (UKSUB8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ /* ONEOP. */
-+#define DSP_ONEOP(n) ((n) << 10)
-+ {"sunpkd810", "=rt,%ra", ALU2_2 (ONEOP) | DSP_ONEOP (0x0), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"sunpkd820", "=rt,%ra", ALU2_2 (ONEOP) | DSP_ONEOP (0x1), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"sunpkd830", "=rt,%ra", ALU2_2 (ONEOP) | DSP_ONEOP (0x2), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"sunpkd831", "=rt,%ra", ALU2_2 (ONEOP) | DSP_ONEOP (0x3), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"zunpkd810", "=rt,%ra", ALU2_2 (ONEOP) | DSP_ONEOP (0x4), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"zunpkd820", "=rt,%ra", ALU2_2 (ONEOP) | DSP_ONEOP (0x5), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"zunpkd830", "=rt,%ra", ALU2_2 (ONEOP) | DSP_ONEOP (0x6), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"zunpkd831", "=rt,%ra", ALU2_2 (ONEOP) | DSP_ONEOP (0x7), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kabs", "=rt,%ra", ALU2 (ABS), 4, ATTR (PERF_EXT), 0, NULL, 0, NULL},
-+ {"kabs16", "=rt,%ra", ALU2_2 (ONEOP) | DSP_ONEOP (0x8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kabs8", "=rt,%ra", ALU2_2 (ONEOP) | DSP_ONEOP (0xc), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"insb", "=rt,%ra,%ib2u", ALU2_2 (ONEOP) | DSP_ONEOP (0x10), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smbb", "=rt,%ra,%rb", ALU2_2 (SMBB), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smbt", "=rt,%ra,%rb", ALU2_2 (SMBT), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smtt", "=rt,%ra,%rb", ALU2_2 (SMTT), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmabb", "=rt,%ra,%rb", ALU2_2 (KMABB), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmabt", "=rt,%ra,%rb", ALU2_2 (KMABT), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmatt", "=rt,%ra,%rb", ALU2_2 (KMATT), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmda", "=rt,%ra,%rb", ALU2_2 (KMDA), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmxda", "=rt,%ra,%rb", ALU2_2 (KMXDA), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmada", "=rt,%ra,%rb", ALU2_2 (KMADA), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmaxda", "=rt,%ra,%rb", ALU2_2 (KMAXDA), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmsda", "=rt,%ra,%rb", ALU2_2 (KMSDA), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmsxda", "=rt,%ra,%rb", ALU2_2 (KMSXDA), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"radd16", "=rt,%ra,%rb", ALU2_2 (RADD16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"rsub16", "=rt,%ra,%rb", ALU2_2 (RSUB16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"rcras16", "=rt,%ra,%rb", ALU2_2 (RCRAS16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"rcrsa16", "=rt,%ra,%rb", ALU2_2 (RCRSA16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"radd8", "=rt,%ra,%rb", ALU2_2 (RADD8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"rsub8", "=rt,%ra,%rb", ALU2_2 (RSUB8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"raddw", "=rt,%ra,%rb", ALU2_2 (RADDW), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"rsubw", "=rt,%ra,%rb", ALU2_2 (RSUBW), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"uradd16", "=rt,%ra,%rb", ALU2_2 (URADD16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ursub16", "=rt,%ra,%rb", ALU2_2 (URSUB16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"urcras16", "=rt,%ra,%rb", ALU2_2 (URCRAS16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"urcrsa16", "=rt,%ra,%rb", ALU2_2 (URCRSA16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"uradd8", "=rt,%ra,%rb", ALU2_2 (URADD8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ursub8", "=rt,%ra,%rb", ALU2_2 (URSUB8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"uraddw", "=rt,%ra,%rb", ALU2_2 (URADDW), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ursubw", "=rt,%ra,%rb", ALU2_2 (URSUBW), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"add16", "=rt,%ra,%rb", ALU2_2 (ADD16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"sub16", "=rt,%ra,%rb", ALU2_2 (SUB16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"cras16", "=rt,%ra,%rb", ALU2_2 (CRAS16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"crsa16", "=rt,%ra,%rb", ALU2_2 (CRSA16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"add8", "=rt,%ra,%rb", ALU2_2 (ADD8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"sub8", "=rt,%ra,%rb", ALU2_2 (SUB8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"bitrev", "=rt,%ra,%rb", ALU2_2 (BITREV), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"bitrevi", "=rt,%ra,%ib5u", ALU2_2 (BITREVI), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smmul", "=rt,%ra,%rb", ALU2_2 (SMMUL), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smmul.u", "=rt,%ra,%rb", ALU2_2 (SMMULu), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmmac", "=rt,%ra,%rb", ALU2_2 (KMMAC), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmmac.u", "=rt,%ra,%rb", ALU2_2 (KMMACu), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmmsb", "=rt,%ra,%rb", ALU2_2 (KMMSB), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmmsb.u", "=rt,%ra,%rb", ALU2_2 (KMMSBu), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kwmmul", "=rt,%ra,%rb", ALU2_2 (KWMMUL), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kwmmul.u", "=rt,%ra,%rb", ALU2_2 (KWMMULu), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ /* ALU2 Bit 9-6 = 0010. */
-+ {"smmwb", "=rt,%ra,%rb", ALU2_3 (SMMWB), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smmwb.u", "=rt,%ra,%rb", ALU2_3 (SMMWBu), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smmwt", "=rt,%ra,%rb", ALU2_3 (SMMWT), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smmwt.u", "=rt,%ra,%rb", ALU2_3 (SMMWTu), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmmawb", "=rt,%ra,%rb", ALU2_3 (KMMAWB), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmmawb.u", "=rt,%ra,%rb", ALU2_3 (KMMAWBu), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmmawt", "=rt,%ra,%rb", ALU2_3 (KMMAWT), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kmmawt.u", "=rt,%ra,%rb", ALU2_3 (KMMAWTu), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"pktt16", "=rt,%ra,%rb", ALU2_3 (PKTT16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"pktb16", "=rt,%ra,%rb", ALU2_3 (PKTB16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"pkbt16", "=rt,%ra,%rb", ALU2_3 (PKBT16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"pkbb16", "=rt,%ra,%rb", ALU2_3 (PKBB16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"sclip32", "=rt,%ra,%ib5u", ALU2 (CLIPS), 4, ATTR (PERF_EXT), 0, NULL, 0, NULL},
-+ {"sclip16", "=rt,%ra,%ib4u", ALU2_3 (SCLIP16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smax16", "=rt,%ra,%rb", ALU2_3 (SMAX16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smax8", "=rt,%ra,%rb", ALU2_3 (SMAX8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"uclip32", "=rt,%ra,%ib5u", ALU2 (CLIP), 4, ATTR (PERF_EXT), 0, NULL, 0, NULL},
-+ {"uclip16", "=rt,%ra,%ib4u", ALU2_3 (UCLIP16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"umax16", "=rt,%ra,%rb", ALU2_3 (UMAX16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"umax8", "=rt,%ra,%rb", ALU2_3 (UMAX8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"sra16", "=rt,%ra,%rb", ALU2_3 (SRA16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"sra16.u", "=rt,%ra,%rb", ALU2_3 (SRA16u), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"srl16", "=rt,%ra,%rb", ALU2_3 (SRL16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"srl16.u", "=rt,%ra,%rb", ALU2_3 (SRL16u), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"sll16", "=rt,%ra,%rb", ALU2_3 (SLL16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kslra16", "=rt,%ra,%rb", ALU2_3 (KSLRA16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ksll16", "=rt,%ra,%rb", ALU2_3 (KSLRA16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kslra16.u", "=rt,%ra,%rb", ALU2_3 (KSLRA16u), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"sra.u", "=rt,%ra,%rb", ALU2_3 (SRAu), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"srai16", "=rt,%ra,%ib4u", ALU2_3 (SRAI16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"srai16.u", "=rt,%ra,%ib4u", ALU2_3 (SRAI16u), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"srli16", "=rt,%ra,%ib4u", ALU2_3 (SRLI16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"srli16.u", "=rt,%ra,%ib4u", ALU2_3 (SRLI16u), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"slli16", "=rt,%ra,%ib4u", ALU2_3 (SLLI16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kslli16", "=rt,%ra,%ib4u", ALU2_3 (KSLLI16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"kslli", "=rt,%ra,%ib5u", ALU2_3 (KSLLI), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"srai.u", "=rt,%ra,%ib5u", ALU2_3 (SRAIu), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"cmpeq16", "=rt,%ra,%rb", ALU2_3 (CMPEQ16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"scmplt16", "=rt,%ra,%rb", ALU2_3 (SCMPLT16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"scmple16", "=rt,%ra,%rb", ALU2_3 (SCMPLE16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smin16", "=rt,%ra,%rb", ALU2_3 (SMIN16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"cmpeq8", "=rt,%ra,%rb", ALU2_3 (CMPEQ8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"scmplt8", "=rt,%ra,%rb", ALU2_3 (SCMPLT8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"scmple8", "=rt,%ra,%rb", ALU2_3 (SCMPLE8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"smin8", "=rt,%ra,%rb", ALU2_3 (SMIN8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ucmplt16", "=rt,%ra,%rb", ALU2_3 (UCMPLT16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ucmple16", "=rt,%ra,%rb", ALU2_3 (UCMPLE16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"umin16", "=rt,%ra,%rb", ALU2_3 (UMIN16), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ucmplt8", "=rt,%ra,%rb", ALU2_3 (UCMPLT8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"ucmple8", "=rt,%ra,%rb", ALU2_3 (UCMPLE8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"umin8", "=rt,%ra,%rb", ALU2_3 (UMIN8), 4, ATTR (DSP_ISAEXT), 0, NULL, 0, NULL},
-+ {"mtlbi", "%i16s1", BR2 (SOP0) | __BIT (20), 4, ATTR (ZOL) | ATTR (DSP_ISAEXT) | ATTR (PCREL), 0, NULL, 0, NULL},
-+ {"mtlei", "%i16s1", BR2 (SOP0) | __BIT (21), 4, ATTR (ZOL) | ATTR (DSP_ISAEXT) | ATTR (PCREL), 0, NULL, 0, NULL},
-+ {NULL, NULL, 0, 0, 0, 0, NULL, 0, NULL},
-+};
-+
-+const keyword_t keyword_gpr[] =
-+{
-+ /* Standard names. */
-+ {"r0", 0, ATTR (RDREG)}, {"r1", 1, ATTR (RDREG)}, {"r2", 2, ATTR (RDREG)},
-+ {"r3", 3, ATTR (RDREG)}, {"r4", 4, ATTR (RDREG)}, {"r5", 5, ATTR (RDREG)},
-+ {"r6", 6, ATTR (RDREG)}, {"r7", 7, ATTR (RDREG)}, {"r8", 8, ATTR (RDREG)},
-+ {"r9", 9, ATTR (RDREG)}, {"r10", 10, ATTR (RDREG)}, {"r11", 11, 0},
-+ {"r12", 12, 0}, {"r13", 13, 0}, {"r14", 14, 0}, {"r15", 15, ATTR (RDREG)},
-+ {"r16", 16, 0}, {"r17", 17, 0}, {"r18", 18, 0}, {"r19", 19, 0},
-+ {"r20", 20, 0}, {"r21", 21, 0}, {"r22", 22, 0}, {"r23", 23, 0},
-+ {"r24", 24, 0}, {"r25", 25, 0},
-+ {"p0", 26, 0}, {"p1", 27, 0},
-+ {"fp", 28, ATTR (RDREG)}, {"gp", 29, ATTR (RDREG)},
-+ {"lp", 30, ATTR (RDREG)}, {"sp", 31, ATTR (RDREG)},
-+ {"r26", 26, 0}, {"r27", 27, 0},
-+ {"r28", 28, ATTR (RDREG)}, {"r29", 29, ATTR (RDREG)},
-+ {"r30", 30, ATTR (RDREG)}, {"r31", 31, ATTR (RDREG)},
-+ /* Names for parameter passing. */
-+ {"a0", 0, ATTR (RDREG)}, {"a1", 1, ATTR (RDREG)},
-+ {"a2", 2, ATTR (RDREG)}, {"a3", 3, ATTR (RDREG)},
-+ {"a4", 4, ATTR (RDREG)}, {"a5", 5, ATTR (RDREG)},
-+ /* Names reserved for 5-bit addressing only. */
-+ {"s0", 6, ATTR (RDREG)}, {"s1", 7, ATTR (RDREG)},
-+ {"s2", 8, ATTR (RDREG)}, {"s3", 9, ATTR (RDREG)},
-+ {"s4", 10, ATTR (RDREG)}, {"s5", 11, 0}, {"s6", 12, 0}, {"s7", 13, 0},
-+ {"s8", 14, 0}, {"s9", 28, ATTR (RDREG)},
-+ {"ta", 15, ATTR (RDREG)},
-+ {"t0", 16, 0}, {"t1", 17, 0}, {"t2", 18, 0}, {"t3", 19, 0},
-+ {"t4", 20, 0}, {"t5", 21, 0}, {"t6", 22, 0}, {"t7", 23, 0},
-+ {"t8", 24, 0}, {"t9", 25, 0},
-+ /* Names reserved for 4-bit addressing only. */
-+ {"h0", 0, ATTR (RDREG)}, {"h1", 1, ATTR (RDREG)},
-+ {"h2", 2, ATTR (RDREG)}, {"h3", 3, ATTR (RDREG)},
-+ {"h4", 4, ATTR (RDREG)}, {"h5", 5, ATTR (RDREG)},
-+ {"h6", 6, ATTR (RDREG)}, {"h7", 7, ATTR (RDREG)},
-+ {"h8", 8, ATTR (RDREG)}, {"h9", 9, ATTR (RDREG)},
-+ {"h10", 10, ATTR (RDREG)}, {"h11", 11, 0},
-+ {"h12", 16, 0}, {"h13", 17, 0}, {"h14", 18, 0}, {"h15", 19, 0},
-+ /* Names reserved for 3-bit addressing only. */
-+ {"o0", 0, ATTR (RDREG)}, {"o1", 1, ATTR (RDREG)},
-+ {"o2", 2, ATTR (RDREG)}, {"o3", 3, ATTR (RDREG)},
-+ {"o4", 4, ATTR (RDREG)}, {"o5", 5, ATTR (RDREG)},
-+ {"o6", 6, ATTR (RDREG)}, {"o7", 7, ATTR (RDREG)},
-+ {NULL, 0, 0}
-+};
-+
-+const keyword_t keyword_usr[] =
-+{
-+ {"d0.lo", USRIDX (0, 0), 0},
-+ {"d0.hi", USRIDX (0, 1), 0},
-+ {"d1.lo", USRIDX (0, 2), 0},
-+ {"d1.hi", USRIDX (0, 3), 0},
-+ {"lb", USRIDX (0, 25), 0},
-+ {"le", USRIDX (0, 26), 0},
-+ {"lc", USRIDX (0, 27), 0},
-+ {"itb", USRIDX (0, 28), 0},
-+ {"ifc_lp", USRIDX (0, 29), 0},
-+ {"pc", USRIDX (0, 31), 0},
-+
-+ {"dma_cfg", USRIDX (1, 0), 0},
-+ {"dma_gcsw", USRIDX (1, 1), 0},
-+ {"dma_chnsel", USRIDX (1, 2), 0},
-+ {"dma_act", USRIDX (1, 3), 0},
-+ {"dma_setup", USRIDX (1, 4), 0},
-+ {"dma_isaddr", USRIDX (1, 5), 0},
-+ {"dma_esaddr", USRIDX (1, 6), 0},
-+ {"dma_tcnt", USRIDX (1, 7), 0},
-+ {"dma_status", USRIDX (1, 8), 0},
-+ {"dma_2dset", USRIDX (1, 9), 0},
-+ {"dma_rcnt", USRIDX (1, 23), 0},
-+ {"dma_hstatus", USRIDX (1, 24), 0},
-+ {"dma_2dsctl", USRIDX (1, 25), 0},
-+
-+ {"pfmc0", USRIDX (2, 0), 0},
-+ {"pfmc1", USRIDX (2, 1), 0},
-+ {"pfmc2", USRIDX (2, 2), 0},
-+ {"pfm_ctl", USRIDX (2, 4), 0},
-+
-+ {NULL, 0, 0}
-+};
-+
-+const keyword_t keyword_dxr[] =
-+{
-+ {"d0", 0, 0}, {"d1", 1, 0}, {NULL, 0, 0}
-+};
-+
-+const keyword_t keyword_sr[] =
-+{
-+ {"cpu_ver", SRIDX (0, 0, 0), 0}, {"cr0", SRIDX (0, 0, 0), 0},
-+ {"icm_cfg", SRIDX (0, 1, 0), 0}, {"cr1", SRIDX (0, 1, 0), 0},
-+ {"dcm_cfg", SRIDX (0, 2, 0), 0}, {"cr2", SRIDX (0, 2, 0), 0},
-+ {"mmu_cfg", SRIDX (0, 3, 0), 0}, {"cr3", SRIDX (0, 3, 0), 0},
-+ {"msc_cfg", SRIDX (0, 4, 0), 0}, {"cr4", SRIDX (0, 4, 0), 0},
-+ {"msc_cfg2", SRIDX (0, 4, 1), 0}, {"cr7", SRIDX (0, 4, 1), 0},
-+ {"core_id", SRIDX (0, 0, 1), 0}, {"cr5", SRIDX (0, 0, 1), 0},
-+ {"fucop_exist", SRIDX (0, 5, 0), 0}, {"cr6", SRIDX (0, 5, 0), 0},
-+
-+ {"psw", SRIDX (1, 0, 0), 0}, {"ir0", SRIDX (1, 0, 0), 0},
-+ {"ipsw", SRIDX (1, 0, 1), 0}, {"ir1", SRIDX (1, 0, 1), 0},
-+ {"p_ipsw", SRIDX (1, 0, 2), 0}, {"ir2", SRIDX (1, 0, 2), 0},
-+ {"ivb", SRIDX (1, 1, 1), 0}, {"ir3", SRIDX (1, 1, 1), 0},
-+ {"eva", SRIDX (1, 2, 1), 0}, {"ir4", SRIDX (1, 2, 1), 0},
-+ {"p_eva", SRIDX (1, 2, 2), 0}, {"ir5", SRIDX (1, 2, 2), 0},
-+ {"itype", SRIDX (1, 3, 1), 0}, {"ir6", SRIDX (1, 3, 1), 0},
-+ {"p_itype", SRIDX (1, 3, 2), 0}, {"ir7", SRIDX (1, 3, 2), 0},
-+ {"merr", SRIDX (1, 4, 1), 0}, {"ir8", SRIDX (1, 4, 1), 0},
-+ {"ipc", SRIDX (1, 5, 1), 0}, {"ir9", SRIDX (1, 5, 1), 0},
-+ {"p_ipc", SRIDX (1, 5, 2), 0}, {"ir10", SRIDX (1, 5, 2), 0},
-+ {"oipc", SRIDX (1, 5, 3), 0}, {"ir11", SRIDX (1, 5, 3), 0},
-+ {"dipc", SRIDX (1, 5, 3), 0},
-+ {"p_p0", SRIDX (1, 6, 2), 0}, {"ir12", SRIDX (1, 6, 2), 0},
-+ {"p_p1", SRIDX (1, 7, 2), 0}, {"ir13", SRIDX (1, 7, 2), 0},
-+ {"int_mask", SRIDX (1, 8, 0), 0}, {"ir14", SRIDX (1, 8, 0), 0},
-+ {"int_pend", SRIDX (1, 9, 0), 0}, {"ir15", SRIDX (1, 9, 0), 0},
-+ {"sp_usr", SRIDX (1, 10, 0), 0}, {"ir16", SRIDX (1, 10, 0), 0},
-+ {"sp_priv", SRIDX (1, 10, 1), 0}, {"ir17", SRIDX (1, 10, 1), 0},
-+ {"int_pri", SRIDX (1, 11, 0), 0}, {"ir18", SRIDX (1, 11, 0), 0},
-+ {"int_ctrl", SRIDX (1, 1, 2), 0}, {"ir19", SRIDX (1, 1, 2), 0},
-+ {"sp_usr1", SRIDX (1, 10, 2), 0}, {"ir20", SRIDX (1, 10, 2), 0},
-+ {"sp_priv1", SRIDX (1, 10, 3), 0}, {"ir21", SRIDX (1, 10, 3), 0},
-+ {"sp_usr2", SRIDX (1, 10, 4), 0}, {"ir22", SRIDX (1, 10, 4), 0},
-+ {"sp_priv2", SRIDX (1, 10, 5), 0}, {"ir23", SRIDX (1, 10, 5), 0},
-+ {"sp_usr3", SRIDX (1, 10, 6), 0}, {"ir24", SRIDX (1, 10, 6), 0},
-+ {"sp_priv3", SRIDX (1, 10, 7), 0}, {"ir25", SRIDX (1, 10, 7), 0},
-+ {"int_mask2", SRIDX (1, 8, 1), 0}, {"ir26", SRIDX (1, 8, 1), 0},
-+ {"int_pend2", SRIDX (1, 9, 1), 0}, {"ir27", SRIDX (1, 9, 1), 0},
-+ {"int_pri2", SRIDX (1, 11, 1), 0}, {"ir28", SRIDX (1, 11, 1), 0},
-+ {"int_trigger", SRIDX (1, 9, 4), 0}, {"ir29", SRIDX (1, 9, 4), 0},
-+ {"int_gpr_push_dis", SRIDX(1, 1, 3), 0}, {"ir30", SRIDX (1, 1, 3), 0},
-+
-+ {"mmu_ctl", SRIDX (2, 0, 0), 0}, {"mr0", SRIDX (2, 0, 0), 0},
-+ {"l1_pptb", SRIDX (2, 1, 0), 0}, {"mr1", SRIDX (2, 1, 0), 0},
-+ {"tlb_vpn", SRIDX (2, 2, 0), 0}, {"mr2", SRIDX (2, 2, 0), 0},
-+ {"tlb_data", SRIDX (2, 3, 0), 0}, {"mr3", SRIDX (2, 3, 0), 0},
-+ {"tlb_misc", SRIDX (2, 4, 0), 0}, {"mr4", SRIDX (2, 4, 0), 0},
-+ {"vlpt_idx", SRIDX (2, 5, 0), 0}, {"mr5", SRIDX (2, 5, 0), 0},
-+ {"ilmb", SRIDX (2, 6, 0), 0}, {"mr6", SRIDX (2, 6, 0), 0},
-+ {"dlmb", SRIDX (2, 7, 0), 0}, {"mr7", SRIDX (2, 7, 0), 0},
-+ {"cache_ctl", SRIDX (2, 8, 0), 0}, {"mr8", SRIDX (2, 8, 0), 0},
-+ {"hsmp_saddr", SRIDX (2, 9, 0), 0}, {"mr9", SRIDX (2, 9, 0), 0},
-+ {"hsmp_eaddr", SRIDX (2, 9, 1), 0}, {"mr10", SRIDX (2, 9, 1), 0},
-+ {"bg_region", SRIDX (2, 0, 1), 0}, {"mr11", SRIDX (2, 0, 1), 0},
-+
-+ {"pfmc0", SRIDX (4, 0, 0), 0}, {"pfr0", SRIDX (4, 0, 0), 0},
-+ {"pfmc1", SRIDX (4, 0, 1), 0}, {"pfr1", SRIDX (4, 0, 1), 0},
-+ {"pfmc2", SRIDX (4, 0, 2), 0}, {"pfr2", SRIDX (4, 0, 2), 0},
-+ {"pfm_ctl", SRIDX (4, 1, 0), 0}, {"pfr3", SRIDX (4, 1, 0), 0},
-+ {"pft_ctl", SRIDX (4, 2, 0), 0}, {"pfr4", SRIDX (4, 2, 0), 0},
-+ {"hsp_ctl", SRIDX (4, 6, 0), 0}, {"hspr0", SRIDX (4, 6, 0), 0},
-+ {"sp_bound", SRIDX (4, 6, 1), 0}, {"hspr1", SRIDX (4, 6, 1), 0},
-+ {"sp_bound_priv", SRIDX (4, 6, 2), 0},{"hspr2", SRIDX (4, 6, 2), 0},
-+
-+ {"dma_cfg", SRIDX (5, 0, 0), 0}, {"dmar0", SRIDX (5, 0, 0), 0},
-+ {"dma_gcsw", SRIDX (5, 1, 0), 0}, {"dmar1", SRIDX (5, 1, 0), 0},
-+ {"dma_chnsel", SRIDX (5, 2, 0), 0}, {"dmar2", SRIDX (5, 2, 0), 0},
-+ {"dma_act", SRIDX (5, 3, 0), 0}, {"dmar3", SRIDX (5, 3, 0), 0},
-+ {"dma_setup", SRIDX (5, 4, 0), 0}, {"dmar4", SRIDX (5, 4, 0), 0},
-+ {"dma_isaddr", SRIDX (5, 5, 0), 0}, {"dmar5", SRIDX (5, 5, 0), 0},
-+ {"dma_esaddr", SRIDX (5, 6, 0), 0}, {"dmar6", SRIDX (5, 6, 0), 0},
-+ {"dma_tcnt", SRIDX (5, 7, 0), 0}, {"dmar7", SRIDX (5, 7, 0), 0},
-+ {"dma_status", SRIDX (5, 8, 0), 0}, {"dmar8", SRIDX (5, 8, 0), 0},
-+ {"dma_2dset", SRIDX (5, 9, 0), 0}, {"dmar9", SRIDX (5, 9, 0), 0},
-+ {"dma_2dsctl", SRIDX (5, 9, 1), 0}, {"dmar10", SRIDX (5, 9, 1), 0},
-+ {"dma_rcnt", SRIDX (5, 7, 1), 0}, {"dmar11", SRIDX (5, 7, 1), 0},
-+ {"dma_hstatus", SRIDX (5, 8, 1), 0}, {"dmar12", SRIDX (5, 8, 1), 0},
-+
-+ {"sdz_ctl", SRIDX (2, 15, 0), 0}, {"idr0", SRIDX (2, 15, 0), 0},
-+ {"misc_ctl", SRIDX (2, 15, 1), 0}, {"n12misc_ctl", SRIDX (2, 15, 1), 0},
-+ {"idr1", SRIDX (2, 15, 1), 0},
-+ {"ecc_misc", SRIDX (2, 15, 2), 0}, {"idr2", SRIDX (2, 15, 2), 0},
-+
-+ {"secur0", SRIDX (6, 0, 0), 0}, {"sfcr", SRIDX (6, 0, 0), 0},
-+ {"secur1", SRIDX (6, 1, 0), 0}, {"sign", SRIDX (6, 1, 0), 0},
-+ {"secur2", SRIDX (6, 1, 1), 0}, {"isign", SRIDX (6, 1, 1), 0},
-+ {"secur3", SRIDX (6, 1, 2), 0}, {"p_isign", SRIDX (6, 1, 2), 0},
-+
-+ {"prusr_acc_ctl", SRIDX (4, 4, 0), 0},
-+ {"fucpr", SRIDX (4, 5, 0), 0}, {"fucop_ctl", SRIDX (4, 5, 0), 0},
-+
-+ {"bpc0", SRIDX (3, 0, 0), 0}, {"dr0", SRIDX (3, 0, 0), 0},
-+ {"bpc1", SRIDX (3, 0, 1), 0}, {"dr1", SRIDX (3, 0, 1), 0},
-+ {"bpc2", SRIDX (3, 0, 2), 0}, {"dr2", SRIDX (3, 0, 2), 0},
-+ {"bpc3", SRIDX (3, 0, 3), 0}, {"dr3", SRIDX (3, 0, 3), 0},
-+ {"bpc4", SRIDX (3, 0, 4), 0}, {"dr4", SRIDX (3, 0, 4), 0},
-+ {"bpc5", SRIDX (3, 0, 5), 0}, {"dr5", SRIDX (3, 0, 5), 0},
-+ {"bpc6", SRIDX (3, 0, 6), 0}, {"dr6", SRIDX (3, 0, 6), 0},
-+ {"bpc7", SRIDX (3, 0, 7), 0}, {"dr7", SRIDX (3, 0, 7), 0},
-+ {"bpa0", SRIDX (3, 1, 0), 0}, {"dr8", SRIDX (3, 1, 0), 0},
-+ {"bpa1", SRIDX (3, 1, 1), 0}, {"dr9", SRIDX (3, 1, 1), 0},
-+ {"bpa2", SRIDX (3, 1, 2), 0}, {"dr10", SRIDX (3, 1, 2), 0},
-+ {"bpa3", SRIDX (3, 1, 3), 0}, {"dr11", SRIDX (3, 1, 3), 0},
-+ {"bpa4", SRIDX (3, 1, 4), 0}, {"dr12", SRIDX (3, 1, 4), 0},
-+ {"bpa5", SRIDX (3, 1, 5), 0}, {"dr13", SRIDX (3, 1, 5), 0},
-+ {"bpa6", SRIDX (3, 1, 6), 0}, {"dr14", SRIDX (3, 1, 6), 0},
-+ {"bpa7", SRIDX (3, 1, 7), 0}, {"dr15", SRIDX (3, 1, 7), 0},
-+ {"bpam0", SRIDX (3, 2, 0), 0}, {"dr16", SRIDX (3, 2, 0), 0},
-+ {"bpam1", SRIDX (3, 2, 1), 0}, {"dr17", SRIDX (3, 2, 1), 0},
-+ {"bpam2", SRIDX (3, 2, 2), 0}, {"dr18", SRIDX (3, 2, 2), 0},
-+ {"bpam3", SRIDX (3, 2, 3), 0}, {"dr19", SRIDX (3, 2, 3), 0},
-+ {"bpam4", SRIDX (3, 2, 4), 0}, {"dr20", SRIDX (3, 2, 4), 0},
-+ {"bpam5", SRIDX (3, 2, 5), 0}, {"dr21", SRIDX (3, 2, 5), 0},
-+ {"bpam6", SRIDX (3, 2, 6), 0}, {"dr22", SRIDX (3, 2, 6), 0},
-+ {"bpam7", SRIDX (3, 2, 7), 0}, {"dr23", SRIDX (3, 2, 7), 0},
-+ {"bpv0", SRIDX (3, 3, 0), 0}, {"dr24", SRIDX (3, 3, 0), 0},
-+ {"bpv1", SRIDX (3, 3, 1), 0}, {"dr25", SRIDX (3, 3, 1), 0},
-+ {"bpv2", SRIDX (3, 3, 2), 0}, {"dr26", SRIDX (3, 3, 2), 0},
-+ {"bpv3", SRIDX (3, 3, 3), 0}, {"dr27", SRIDX (3, 3, 3), 0},
-+ {"bpv4", SRIDX (3, 3, 4), 0}, {"dr28", SRIDX (3, 3, 4), 0},
-+ {"bpv5", SRIDX (3, 3, 5), 0}, {"dr29", SRIDX (3, 3, 5), 0},
-+ {"bpv6", SRIDX (3, 3, 6), 0}, {"dr30", SRIDX (3, 3, 6), 0},
-+ {"bpv7", SRIDX (3, 3, 7), 0}, {"dr31", SRIDX (3, 3, 7), 0},
-+ {"bpcid0", SRIDX (3, 4, 0), 0}, {"dr32", SRIDX (3, 4, 0), 0},
-+ {"bpcid1", SRIDX (3, 4, 1), 0}, {"dr33", SRIDX (3, 4, 1), 0},
-+ {"bpcid2", SRIDX (3, 4, 2), 0}, {"dr34", SRIDX (3, 4, 2), 0},
-+ {"bpcid3", SRIDX (3, 4, 3), 0}, {"dr35", SRIDX (3, 4, 3), 0},
-+ {"bpcid4", SRIDX (3, 4, 4), 0}, {"dr36", SRIDX (3, 4, 4), 0},
-+ {"bpcid5", SRIDX (3, 4, 5), 0}, {"dr37", SRIDX (3, 4, 5), 0},
-+ {"bpcid6", SRIDX (3, 4, 6), 0}, {"dr38", SRIDX (3, 4, 6), 0},
-+ {"bpcid7", SRIDX (3, 4, 7), 0}, {"dr39", SRIDX (3, 4, 7), 0},
-+ {"edm_cfg", SRIDX (3, 5, 0), 0}, {"dr40", SRIDX (3, 5, 0), 0},
-+ {"edmsw", SRIDX (3, 6, 0), 0}, {"dr41", SRIDX (3, 6, 0), 0},
-+ {"edm_ctl", SRIDX (3, 7, 0), 0}, {"dr42", SRIDX (3, 7, 0), 0},
-+ {"edm_dtr", SRIDX (3, 8, 0), 0}, {"dr43", SRIDX (3, 8, 0), 0},
-+ {"bpmtc", SRIDX (3, 9, 0), 0}, {"dr44", SRIDX (3, 9, 0), 0},
-+ {"dimbr", SRIDX (3, 10, 0), 0}, {"dr45", SRIDX (3, 10, 0), 0},
-+ {"tecr0", SRIDX (3, 14, 0), 0}, {"dr46", SRIDX (3, 14, 0), 0},
-+ {"tecr1", SRIDX (3, 14, 1), 0}, {"dr47", SRIDX (3, 14, 1), 0},
-+ {NULL,0 ,0}
-+};
-+
-+const keyword_t keyword_cp[] =
-+{
-+ {"cp0", 0, 0}, {"cp1", 1, 0}, {"cp2", 2, 0}, {"cp3", 3, 0}, {NULL, 0, 0}
-+};
-+
-+const keyword_t keyword_cpr[] =
-+{
-+ {"cpr0", 0, 0}, {"cpr1", 1, 0}, {"cpr2", 2, 0}, {"cpr3", 3, 0},
-+ {"cpr4", 4, 0}, {"cpr5", 5, 0}, {"cpr6", 6, 0}, {"cpr7", 7, 0},
-+ {"cpr8", 8, 0}, {"cpr9", 9, 0}, {"cpr10", 10, 0}, {"cpr11", 11, 0},
-+ {"cpr12", 12, 0}, {"cpr13", 13, 0}, {"cpr14", 14, 0}, {"cpr15", 15, 0},
-+ {"cpr16", 16, 0}, {"cpr17", 17, 0}, {"cpr18", 18, 0}, {"cpr19", 19, 0},
-+ {"cpr20", 20, 0}, {"cpr21", 21, 0}, {"cpr22", 22, 0}, {"cpr23", 23, 0},
-+ {"cpr24", 24, 0}, {"cpr25", 25, 0}, {"cpr26", 26, 0}, {"cpr27", 27, 0},
-+ {"cpr28", 28, 0}, {"cpr29", 29, 0}, {"cpr30", 30, 0}, {"cpr31", 31, 0},
-+ {NULL, 0, 0}
-+};
-+
-+const keyword_t keyword_fsr[] =
-+{
-+ {"fs0", 0, 0}, {"fs1", 1, 0}, {"fs2", 2, 0}, {"fs3", 3, 0}, {"fs4", 4, 0},
-+ {"fs5", 5, 0}, {"fs6", 6, 0}, {"fs7", 7, 0}, {"fs8", 8, 0}, {"fs9", 9, 0},
-+ {"fs10", 10, 0}, {"fs11", 11, 0}, {"fs12", 12, 0}, {"fs13", 13, 0},
-+ {"fs14", 14, 0}, {"fs15", 15, 0}, {"fs16", 16, 0}, {"fs17", 17, 0},
-+ {"fs18", 18, 0}, {"fs19", 19, 0}, {"fs20", 20, 0}, {"fs21", 21, 0},
-+ {"fs22", 22, 0}, {"fs23", 23, 0}, {"fs24", 24, 0}, {"fs25", 25, 0},
-+ {"fs26", 26, 0}, {"fs27", 27, 0}, {"fs28", 28, 0}, {"fs29", 29, 0},
-+ {"fs30", 30, 0}, {"fs31", 31, 0}, {NULL, 0 ,0}
-+};
-+
-+const keyword_t keyword_fdr[] =
-+{
-+ {"fd0", 0, 0}, {"fd1", 1, 0}, {"fd2", 2, 0}, {"fd3", 3, 0}, {"fd4", 4, 0},
-+ {"fd5", 5, 0}, {"fd6", 6, 0}, {"fd7", 7, 0}, {"fd8", 8, 0}, {"fd9", 9, 0},
-+ {"fd10", 10, 0}, {"fd11", 11, 0}, {"fd12", 12, 0}, {"fd13", 13, 0},
-+ {"fd14", 14, 0}, {"fd15", 15, 0}, {"fd16", 16, 0}, {"fd17", 17, 0},
-+ {"fd18", 18, 0}, {"fd19", 19, 0}, {"fd20", 20, 0}, {"fd21", 21, 0},
-+ {"fd22", 22, 0}, {"fd23", 23, 0}, {"fd24", 24, 0}, {"fd25", 25, 0},
-+ {"fd26", 26, 0}, {"fd27", 27, 0}, {"fd28", 28, 0}, {"fd29", 29, 0},
-+ {"fd30", 30, 0}, {"fd31", 31, 0}, {NULL, 0, 0}
-+};
-+
-+const keyword_t keyword_abdim[] =
-+{
-+ {"bi", 0, 0}, {"bim", 1, 0}, {"bd", 2, 0}, {"bdm", 3, 0},
-+ {"ai", 4, 0}, {"aim", 5, 0}, {"ad", 6, 0}, {"adm", 7, 0},
-+ {NULL, 0, 0}
-+};
-+
-+const keyword_t keyword_abm[] =
-+{
-+ {"b", 0, 0}, {"bm", 1, 0}, {"bx", 2, 0}, {"bmx", 3, 0},
-+ {"a", 4, 0}, {"am", 5, 0}, {"ax", 6, 0}, {"amx", 7, 0},
-+ {NULL, 0, 0}
-+};
-+
-+static const keyword_t keyword_dtiton[] =
-+{
-+ {"iton", 1, 0}, {"ton", 3, 0}, {NULL, 0, 0}
-+};
-+
-+static const keyword_t keyword_dtitoff[] =
-+{
-+ {"itoff", 1, 0}, {"toff", 3, 0}, {NULL, 0, 0}
-+};
-+
-+const keyword_t keyword_dpref_st[] =
-+{
-+ {"srd", 0, 0}, {"mrd", 1, 0}, {"swr", 2, 0}, {"mwr", 3, 0},
-+ {"pte", 4, 0}, {"clwr", 5, 0}, {NULL, 0, 0}
-+};
-+
-+/* CCTL Ra, SubType. */
-+static const keyword_t keyword_cctl_st0[] =
-+{
-+ {"l1d_ix_inval", 0X0, 0}, {"l1d_ix_wb", 0X1, 0}, {"l1d_ix_wbinval", 0X2, 0},
-+ {"l1d_va_fillck", 0XB, 0}, {"l1d_va_ulck", 0XC, 0}, {"l1i_ix_inval", 0X10, 0},
-+ {"l1i_va_fillck", 0X1B, 0}, {"l1i_va_ulck", 0X1C, 0},
-+ {NULL, 0, 0}
-+};
-+
-+/* CCTL Ra, SubType, level. */
-+static const keyword_t keyword_cctl_st1[] =
-+{
-+ {"l1d_va_inval", 0X8, 0}, {"l1d_va_wb", 0X9, 0},
-+ {"l1d_va_wbinval", 0XA, 0}, {"l1i_va_inval", 0X18, 0},
-+ {NULL, 0, 0}
-+};
-+
-+/* CCTL Rt, Ra, SubType. */
-+static const keyword_t keyword_cctl_st2[] =
-+{
-+ {"l1d_ix_rtag", 0X3, 0}, {"l1d_ix_rwd", 0X4, 0},
-+ {"l1i_ix_rtag", 0X13, 0}, {"l1i_ix_rwd", 0X14, 0},
-+ {NULL, 0, 0}
-+};
-+
-+/* CCTL Rb, Ra, SubType. */
-+static const keyword_t keyword_cctl_st3[] =
-+{
-+ {"l1d_ix_wtag", 0X5, 0}, {"l1d_ix_wwd", 0X6, 0},
-+ {"l1i_ix_wtag", 0X15, 0}, {"l1i_ix_wwd", 0X16, 0},
-+ {NULL, 0, 0}
-+};
-+
-+/* CCTL L1D_INVALALL. */
-+static const keyword_t keyword_cctl_st4[] =
-+{
-+ {"l1d_invalall", 0x7, 0}, {NULL, 0, 0}
-+};
-+
-+/* CCTL L1D_WBALL, level. */
-+static const keyword_t keyword_cctl_st5[] =
-+{
-+ {"l1d_wball", 0xf, 0}, {NULL, 0, 0}
-+};
-+
-+const keyword_t keyword_cctl_lv[] =
-+{
-+ {"1level", 0, 0}, {"alevel", 1, 0}, {"0", 0, 0}, {"1", 1, 0},
-+ {NULL, 0, 0},
-+};
-+
-+static const keyword_t keyword_tlbop_st[] =
-+{
-+ {"targetread", 0, 0}, {"trd", 0, 0},
-+ {"targetwrite", 1, 0}, {"twr", 1, 0},
-+ {"rwrite", 2, 0}, {"rwr", 2, 0},
-+ {"rwritelock", 3, 0}, {"rwlk", 3, 0},
-+ {"unlock", 4, 0}, {"unlk", 4, 0},
-+ {"invalidate", 6, 0}, {"inv", 6, 0},
-+ {NULL, 0, 0},
-+};
-+
-+const keyword_t keyword_standby_st[] =
-+{
-+ {"no_wake_grant", 0, 0},
-+ {"wake_grant", 1, 0},
-+ {"wait_done", 2, 0},
-+ {"0", 0, 0},
-+ {"1", 1, 0},
-+ {"2", 2, 0},
-+ {"3", 3, 0},
-+ {NULL, 0, 0},
-+};
-+
-+const keyword_t keyword_msync_st[] =
-+{
-+ {"all", 0, 0}, {"store", 1, 0},
-+ {NULL, 0, 0}
-+};
-+
-+const keyword_t keyword_im5_i[] =
-+{
-+ {"i0", 0, 0}, {"i1", 1, 0}, {"i2", 2, 0}, {"i3", 3, 0},
-+ {"i4", 4, 0}, {"i5", 5, 0}, {"i6", 6, 0}, {"i7", 7, 0},
-+ {NULL, 0, 0}
-+};
-+
-+const keyword_t keyword_im5_m[] =
-+{
-+ {"m0", 0, 0}, {"m1", 1, 0}, {"m2", 2, 0}, {"m3", 3, 0},
-+ {"m4", 4, 0}, {"m5", 5, 0}, {"m6", 6, 0}, {"m7", 7, 0},
-+ {NULL, 0, 0}
-+};
-+
-+const keyword_t keyword_accumulator[] =
-+{
-+ {"d0.lo", 0, 0}, {"d0.hi", 1, 0}, {"d1.lo", 2, 0}, {"d1.hi", 3, 0},
-+ {NULL, 0, 0}
-+};
-+
-+const keyword_t keyword_aridx[] =
-+{
-+ {"i0", 0, 0}, {"i1", 1, 0}, {"i2", 2, 0}, {"i3", 3, 0},
-+ {"i4", 4, 0}, {"i5", 5, 0}, {"i6", 6, 0}, {"i7", 7, 0},
-+ {"mod", 8, 0}, {"m1", 9, 0}, {"m2", 10, 0}, {"m3",11, 0},
-+ {"m5",13, 0}, {"m6",14, 0}, {"m7",15, 0},
-+ {"d0.l24", 16, 0}, {"d1.l24", 17, 0},
-+ {"shft_ctl0", 18, 0}, {"shft_ctl1", 19, 0},
-+ {"lb", 24, 0}, {"le", 25, 0}, {"lc", 26, 0}, {"adm_vbase", 27, 0},
-+ {NULL, 0, 0}
-+};
-+
-+const keyword_t keyword_aridx2[] =
-+{
-+ {"cbb0", 0, 0}, {"cbb1", 1, 0}, {"cbb2", 2, 0}, {"cbb3", 3, 0},
-+ {"cbe0", 4, 0}, {"cbe1", 5, 0}, {"cbe2", 6, 0}, {"cbe3", 7, 0},
-+ {"cb_ctl", 31, 0},
-+ {NULL, 0, 0}
-+};
-+
-+const keyword_t keyword_aridxi[] =
-+{
-+ {"i0", 0, 0}, {"i1", 1, 0}, {"i2", 2, 0}, {"i3", 3, 0},
-+ {"i4", 4, 0}, {"i5", 5, 0}, {"i6", 6, 0}, {"i7", 7, 0},
-+ {"mod", 8, 0}, {"m1", 9, 0}, {"m2", 10, 0}, {"m3",11, 0},
-+ {"m5",13, 0}, {"m6",14, 0}, {"m7",15, 0},
-+ {NULL, 0, 0}
-+};
-+
-+const keyword_t keyword_aridxi_mx[] =
-+{
-+ {"m1", 9, 0}, {"m2", 10, 0}, {"m3",11, 0},
-+ {"m5",13, 0}, {"m6",14, 0}, {"m7",15, 0},
-+ {NULL, 0, 0}
-+};
-+
-+
-+const keyword_t *keywords[_HW_LAST] =
-+{
-+ keyword_gpr, keyword_usr, keyword_dxr, keyword_sr, keyword_fsr,
-+ keyword_fdr, keyword_cp, keyword_cpr, keyword_abdim, keyword_abm,
-+ keyword_dtiton, keyword_dtitoff, keyword_dpref_st,
-+ keyword_cctl_st0, keyword_cctl_st1, keyword_cctl_st2,
-+ keyword_cctl_st3, keyword_cctl_st4, keyword_cctl_st5,
-+ keyword_cctl_lv, keyword_tlbop_st, keyword_standby_st,
-+ keyword_msync_st,
-+ keyword_im5_i, keyword_im5_m,
-+ keyword_accumulator, keyword_aridx, keyword_aridx2,
-+ keyword_aridxi, keyword_aridxi_mx
-+};
-+
-+const keyword_t **nds32_keyword_table[NDS32_CORE_COUNT];
-+static unsigned int nds32_keyword_count_table[NDS32_CORE_COUNT];
-+const field_t *nds32_field_table[NDS32_CORE_COUNT];
-+opcode_t *nds32_opcode_table[NDS32_CORE_COUNT];
-+
-+/* Hash table for syntax lex. */
-+static htab_t field_htab;
-+/* Hash table for opcodes. */
-+static htab_t opcode_htab;
-+/* Hash table for hardware resources. */
-+static htab_t *hw_ktabs;
-+
-+static hashval_t
-+htab_hash_hash (const void *p)
-+{
-+ struct nds32_hash_entry *h = (struct nds32_hash_entry *) p;
-+
-+ return htab_hash_string (h->name);
-+}
-+
-+static int
-+htab_hash_eq (const void *p, const void *q)
-+{
-+ struct nds32_hash_entry *h = (struct nds32_hash_entry *) p;
-+ const char *name = (const char *) q;
-+
-+ return strcmp (name, h->name) == 0;
-+}
-+
-+
-+/* These functions parse "share library file name" specified for ACE. */
-+
-+static int
-+nds32_parse_ace (char *str, unsigned id)
-+{
-+ void *obj, *dlc = dlopen (str, RTLD_NOW | RTLD_LOCAL);
-+ char *err;
-+
-+ if (dlc == NULL)
-+ err = (char*) dlerror ();
-+ else
-+ {
-+ obj = dlsym (dlc, "keyword_count");
-+ err = (char*) dlerror ();
-+ if (err == NULL)
-+ {
-+ nds32_keyword_count_table[id] = *(unsigned int*) obj;
-+ if (nds32_keyword_count_table[id] != 0)
-+ {
-+ nds32_keyword_table[id] =
-+ (const keyword_t**) dlsym (dlc, "keywords");
-+ err = (char*) dlerror ();
-+ }
-+ if (err == NULL)
-+ {
-+ nds32_field_table[id] =
-+ (const field_t*) dlsym (dlc, "nds32_ace_field");
-+ err = (char*) dlerror ();
-+ }
-+ if (err == NULL)
-+ {
-+ nds32_opcode_table[id] =
-+ (opcode_t*) dlsym (dlc, "nds32_ace_opcode");
-+ err = (char*) dlerror ();
-+ }
-+
-+ if (err == NULL)
-+ {
-+ if (id != NDS32_ACE)
-+ {
-+ opcode_t *opc = nds32_opcode_table[id];
-+ unsigned cpid = id - NDS32_COP0;
-+ unsigned matched = 0;
-+
-+ /* Check whether the coprocessor ID encoded matches. */
-+ /* If not, coprocessor ID is fixed for flexibitlity. */
-+ if (N32_OP6 (opc->value) == N32_OP6_COP)
-+ {
-+ if (__GF (opc->value, 4, 2) == cpid)
-+ matched = 1;
-+ }
-+ else
-+ {
-+ if (__GF (opc->value, 13, 2) == cpid)
-+ matched = 1;
-+ }
-+ if (!matched)
-+ {
-+ for (; opc->opcode != NULL; opc++)
-+ {
-+ if (N32_OP6 (opc->value) == N32_OP6_COP)
-+ opc->value = (opc->value >> 6) | __MF(cpid, 4, 2)
-+ | (opc->value & 0xf);
-+ else
-+ opc->value = (opc->value >> 15) | __MF(cpid, 13, 2)
-+ | (opc->value & 0x1fff);
-+ }
-+ }
-+ }
-+
-+ return 1;
-+ }
-+ }
-+ }
-+
-+ printf("%s\n", err);
-+ return 0;
-+}
-+
-+int
-+nds32_parse_udi (char *str)
-+{
-+ return nds32_parse_ace (str, NDS32_ACE);
-+}
-+
-+int
-+nds32_parse_cop0 (char *str)
-+{
-+ return nds32_parse_ace (str, NDS32_COP0);
-+}
-+
-+int
-+nds32_parse_cop1 (char *str)
-+{
-+ return nds32_parse_ace (str, NDS32_COP1);
-+}
-+
-+int
-+nds32_parse_cop2 (char *str)
-+{
-+ return nds32_parse_ace (str, NDS32_COP2);
-+}
-+
-+int
-+nds32_parse_cop3 (char *str)
-+{
-+ return nds32_parse_ace (str, NDS32_COP3);
-+}
-+
-+static void
-+build_operand_hash_table (void)
-+{
-+ unsigned k;
-+
-+ field_htab = htab_create_alloc (128, htab_hash_hash, htab_hash_eq,
-+ NULL, xcalloc, free);
-+
-+ for (k = 0; k < NDS32_CORE_COUNT; k++)
-+ {
-+ const field_t *fld;
-+
-+ fld = nds32_field_table[k];
-+ if (fld == NULL)
-+ continue;
-+
-+ /* Add op-codes. */
-+ while (fld->name != NULL)
-+ {
-+ hashval_t hash;
-+ const field_t **slot;
-+
-+ hash = htab_hash_string (fld->name);
-+ slot = (const field_t **)
-+ htab_find_slot_with_hash (field_htab, fld->name, hash, INSERT);
-+
-+ assert (slot != NULL && *slot == NULL);
-+ *slot = fld++;
-+ }
-+ }
-+}
-+
-+static void
-+build_keyword_hash_table (void)
-+{
-+ unsigned int i, j, k, n;
-+
-+ /* Count total keyword tables. */
-+ for (n = 0, i = 0; i < NDS32_CORE_COUNT; i++)
-+ {
-+ n += nds32_keyword_count_table[i];
-+ }
-+
-+ /* Allocate space. */
-+ hw_ktabs = (htab_t *) malloc (n * sizeof (struct htab));
-+ for (i = 0; i < n; i++)
-+ {
-+ hw_ktabs[i] = htab_create_alloc (128, htab_hash_hash, htab_hash_eq,
-+ NULL, xcalloc, free);
-+ }
-+
-+ for (n = 0, k = 0; k < NDS32_CORE_COUNT; k++, n += j)
-+ {
-+ const keyword_t **kwd;
-+
-+ if ((j = nds32_keyword_count_table[k]) == 0)
-+ continue;
-+
-+ /* Add keywords. */
-+ kwd = nds32_keyword_table[k];
-+ for (i = 0; i < j; i++)
-+ {
-+ htab_t htab;
-+ const keyword_t *kw;
-+
-+ kw = kwd[i];
-+ htab = hw_ktabs[n + i];
-+ while (kw->name != NULL)
-+ {
-+ hashval_t hash;
-+ const keyword_t **slot;
-+
-+ hash = htab_hash_string (kw->name);
-+ slot = (const keyword_t **)
-+ htab_find_slot_with_hash (htab, kw->name, hash, INSERT);
-+
-+ assert (slot != NULL && *slot == NULL);
-+ *slot = kw++;
-+ }
-+ }
-+ }
-+}
-+
-+/* Build the syntax for a given opcode OPC. It parses the string
-+ pointed by INSTRUCTION and store the result on SYNTAX, so
-+ when we assemble an instruction, we don't have to parse the syntax
-+ again. */
-+
-+static void
-+build_opcode_syntax (struct nds32_opcode *opc)
-+{
-+ char odstr[MAX_LEX_LEN];
-+ const char *str;
-+ const char *end;
-+ lex_t *plex;
-+ int len;
-+ hashval_t hash;
-+ field_t *fd;
-+ int opt = 0;
-+
-+ /* Check whether it has been initialized. */
-+ if (opc->syntax)
-+ return;
-+
-+ opc->syntax = xmalloc (MAX_LEX_NUM * sizeof (lex_t));
-+
-+ str = opc->instruction;
-+ plex = opc->syntax;
-+ while (*str)
-+ {
-+ int i, k, fidx;
-+
-+ switch (*str)
-+ {
-+ case '%': *plex = SYN_INPUT; break;
-+ case '=': *plex = SYN_OUTPUT; break;
-+ case '&': *plex = SYN_INPUT | SYN_OUTPUT; break;
-+ case '{':
-+ *plex++ = SYN_LOPT;
-+ opt++;
-+ str++;
-+ continue;
-+ case '}':
-+ *plex++ = SYN_ROPT;
-+ str++;
-+ continue;
-+ default:
-+ *plex++ = *str++;
-+ continue;
-+ }
-+ str++;
-+
-+ /* Extract operand. */
-+ end = str;
-+ while (ISALNUM (*end) || *end == '_')
-+ end++;
-+ len = end - str;
-+ memcpy (odstr, str, len);
-+ odstr[len] = '\0';
-+
-+ hash = htab_hash_string (odstr);
-+ fd = (field_t *) htab_find_with_hash (field_htab, odstr, hash);
-+ if (fd == NULL)
-+ {
-+ fprintf (stderr, "Internal error: Unknown operand, %s\n", str);
-+ }
-+
-+ /* We are not sure how these tables are organized. */
-+ /* Thus, the minimal index should be the right one. */
-+ for (fidx = 256, k = 0, i = 0; i < NDS32_CORE_COUNT; i++)
-+ {
-+ int tmp;
-+
-+ tmp = fd - nds32_field_table[i];
-+ if (tmp >= 0 && tmp < fidx)
-+ {
-+ fidx = tmp;
-+ k = i;
-+ }
-+ }
-+ *plex |= LEX_SET_FIELD (k, fidx);
-+
-+ str += len;
-+ plex++;
-+ }
-+
-+ *plex = 0;
-+ opc->variant = opt;
-+ return;
-+}
-+
-+static void
-+build_opcode_hash_table (void)
-+{
-+ unsigned k;
-+
-+ opcode_htab = htab_create_alloc (512, htab_hash_hash, htab_hash_eq,
-+ NULL, xcalloc, free);
-+
-+ for (k = 0; k < NDS32_CORE_COUNT; k++)
-+ {
-+ opcode_t *opc;
-+
-+ opc = nds32_opcode_table[k];
-+ if (opc == NULL)
-+ continue;
-+
-+ /* Add op-codes. */
-+ while ((opc->opcode != NULL) && (opc->instruction != NULL))
-+ {
-+ hashval_t hash;
-+ opcode_t **slot;
-+
-+ hash = htab_hash_string (opc->opcode);
-+ slot = (opcode_t **)
-+ htab_find_slot_with_hash (opcode_htab, opc->opcode, hash,
-+ INSERT);
-+
-+#define NDS32_PREINIT_SYNTAX
-+#if defined (NDS32_PREINIT_SYNTAX)
-+ /* Initial SYNTAX when build opcode table, so bug in syntax
-+ can be found when initialized rather than used. */
-+ build_opcode_syntax (opc);
-+#endif
-+
-+ if (*slot == NULL)
-+ {
-+ /* This is the new one. */
-+ *slot = opc;
-+ }
-+ else
-+ {
-+ opcode_t *ptr;
-+
-+ /* Already exists. Append to the list. */
-+ ptr = *slot;
-+ while (ptr->next)
-+ ptr = ptr->next;
-+ ptr->next = opc;
-+ opc->next = NULL;
-+ }
-+ opc++;
-+ }
-+ }
-+}
-+
-+/* Initialize the assembler. It must be called before assembling. */
-+
-+void
-+nds32_asm_init (nds32_asm_desc_t *pdesc, int flags)
-+{
-+ pdesc->flags = flags;
-+ pdesc->mach = flags & NASM_OPEN_ARCH_MASK;
-+
-+ /* Setup main core. */
-+ nds32_keyword_table[NDS32_MAIN_CORE] = &keywords[0];
-+ nds32_keyword_count_table[NDS32_MAIN_CORE] = _HW_LAST;
-+ nds32_opcode_table[NDS32_MAIN_CORE] = &nds32_opcodes[0];
-+ nds32_field_table[NDS32_MAIN_CORE] = &operand_fields[0];
-+
-+ /* Build operand hash table. */
-+ build_operand_hash_table ();
-+
-+ /* Build keyword hash tables. */
-+ build_keyword_hash_table ();
-+
-+ /* Build op-code hash table. */
-+ build_opcode_hash_table ();
-+}
-+
-+/* Parse the input and store operand keyword string in ODSTR.
-+ This function is only used for parsing keywords,
-+ HW_INT/HW_UINT are parsed parse_operand callback handler. */
-+
-+static char *
-+parse_to_delimiter (char *str, char odstr[MAX_KEYWORD_LEN])
-+{
-+ char *outp = odstr;
-+
-+ while (ISALNUM (*str) || *str == '.' || *str == '_')
-+ *outp++ = TOLOWER (*str++);
-+
-+ *outp = '\0';
-+ return str;
-+}
-+
-+/* Parse the operand of lmw/smw/lmwa/smwa. */
-+
-+static int
-+parse_re (struct nds32_asm_desc *pdesc ATTRIBUTE_UNUSED,
-+ struct nds32_asm_insn *pinsn, char **pstr, int64_t *value)
-+{
-+ char *end = *pstr;
-+ char odstr[MAX_KEYWORD_LEN];
-+ keyword_t *k;
-+ hashval_t hash;
-+
-+ if (*end == '$')
-+ end++;
-+ end = parse_to_delimiter (end, odstr);
-+
-+ hash = htab_hash_string (odstr);
-+ k = htab_find_with_hash (hw_ktabs[HW_GPR], odstr, hash);
-+
-+ if (k == NULL)
-+ return NASM_ERR_OPERAND;
-+
-+ if (__GF (pinsn->insn, 20, 5) > (unsigned int) k->value)
-+ return NASM_ERR_OPERAND;
-+
-+ *value = k->value;
-+ *pstr = end;
-+ return NASM_R_CONST;
-+}
-+
-+/* Parse the operand of push25/pop25. */
-+
-+static int
-+parse_re2 (struct nds32_asm_desc *pdesc ATTRIBUTE_UNUSED,
-+ struct nds32_asm_insn *pinsn ATTRIBUTE_UNUSED,
-+ char **pstr, int64_t *value)
-+{
-+ char *end = *pstr;
-+ char odstr[MAX_KEYWORD_LEN];
-+ keyword_t *k;
-+ hashval_t hash;
-+
-+ if (*end == '$')
-+ end++;
-+ end = parse_to_delimiter (end, odstr);
-+
-+ hash = htab_hash_string (odstr);
-+ k = htab_find_with_hash (hw_ktabs[HW_GPR], odstr, hash);
-+
-+ if (k == NULL)
-+ return NASM_ERR_OPERAND;
-+
-+ if (k->value == 6)
-+ *value = 0;
-+ else if (k->value == 8)
-+ *value = 1;
-+ else if (k->value == 10)
-+ *value = 2;
-+ else if (k->value == 14)
-+ *value = 3;
-+ else
-+ return NASM_ERR_OPERAND;
-+
-+ *pstr = end;
-+ return NASM_R_CONST;
-+}
-+
-+/* Parse the operand of lwi45.fe. */
-+
-+static int
-+parse_fe5 (struct nds32_asm_desc *pdesc, struct nds32_asm_insn *pinsn,
-+ char **pstr, int64_t *value)
-+{
-+ int r;
-+
-+ r = pdesc->parse_operand (pdesc, pinsn, pstr, value);
-+ if (r != NASM_R_CONST)
-+ return NASM_ERR_OPERAND;
-+
-+ /* 128 == 32 << 2. Leave the shift to parse_opreand,
-+ so it can check whether it is a multiple of 4. */
-+ *value = 128 + *value;
-+ return r;
-+}
-+
-+/* Parse the operand of movpi45. */
-+
-+static int
-+parse_pi5 (struct nds32_asm_desc *pdesc, struct nds32_asm_insn *pinsn,
-+ char **pstr, int64_t *value)
-+{
-+ int r;
-+
-+ r = pdesc->parse_operand (pdesc, pinsn, pstr, value);
-+ if (r != NASM_R_CONST)
-+ return NASM_ERR_OPERAND;
-+
-+ *value -= 16;
-+ return r;
-+}
-+
-+static int aext_a30b20 = 0;
-+static int aext_rte = 0;
-+static int aext_im5_ip = 0;
-+static int aext_im6_ip = 0;
-+/* Parse the operand of audio ext. */
-+static int
-+parse_aext_reg (char **pstr, int *value, int hw_res)
-+{
-+ char *end = *pstr;
-+ char odstr[MAX_KEYWORD_LEN];
-+ keyword_t *k;
-+ hashval_t hash;
-+
-+ if (*end == '$')
-+ end++;
-+ end = parse_to_delimiter (end, odstr);
-+
-+ hash = htab_hash_string (odstr);
-+ k = htab_find_with_hash (hw_ktabs[hw_res], odstr, hash);
-+
-+ if (k == NULL)
-+ return NASM_ERR_OPERAND;
-+
-+ *value = k->value;
-+ *pstr = end;
-+ return NASM_R_CONST;
-+}
-+
-+static int
-+parse_a30b20 (struct nds32_asm_desc *pdesc ATTRIBUTE_UNUSED,
-+ struct nds32_asm_insn *pinsn ATTRIBUTE_UNUSED,
-+ char **pstr, int64_t *value)
-+{
-+ int rt_value, ret;
-+
-+ ret = parse_aext_reg (pstr, &rt_value, HW_GPR);
-+
-+ if ((ret == NASM_ERR_OPERAND) || (rt_value > 15))
-+ return NASM_ERR_OPERAND;
-+
-+ *value = rt_value;
-+ aext_a30b20 = rt_value;
-+ return NASM_R_CONST;
-+}
-+
-+static int
-+parse_rt21 (struct nds32_asm_desc *pdesc ATTRIBUTE_UNUSED,
-+ struct nds32_asm_insn *pinsn ATTRIBUTE_UNUSED,
-+ char **pstr, int64_t *value)
-+{
-+ int rt_value, ret, tmp_value, tmp1, tmp2;
-+
-+ ret = parse_aext_reg (pstr, &rt_value, HW_GPR);
-+
-+ if ((ret == NASM_ERR_OPERAND) || (rt_value > 15))
-+ return NASM_ERR_OPERAND;
-+ tmp1 = (aext_a30b20 & 0x08);
-+ tmp2 = (rt_value & 0x08);
-+ if (tmp1 != tmp2)
-+ return NASM_ERR_OPERAND;
-+
-+ /* Rt=CONCAT(c, t21, t0), t21:bit11-10, t0:bit5. */
-+ tmp_value = (rt_value & 0x06) << 4;
-+ tmp_value |= (rt_value & 0x01);
-+ *value = tmp_value;
-+ return NASM_R_CONST;
-+}
-+
-+static int
-+parse_rte_start (struct nds32_asm_desc *pdesc ATTRIBUTE_UNUSED,
-+ struct nds32_asm_insn *pinsn ATTRIBUTE_UNUSED,
-+ char **pstr, int64_t *value)
-+{
-+ int rt_value, ret, tmp1, tmp2;
-+
-+ ret = parse_aext_reg (pstr, &rt_value, HW_GPR);
-+
-+ if ((ret == NASM_ERR_OPERAND) || (rt_value > 15)
-+ || (rt_value & 0x01))
-+ return NASM_ERR_OPERAND;
-+ tmp1 = (aext_a30b20 & 0x08);
-+ tmp2 = (rt_value & 0x08);
-+ if (tmp1 != tmp2)
-+ return NASM_ERR_OPERAND;
-+
-+ aext_rte = rt_value;
-+ /* Rt=CONCAT(c, t21, 0), t21:bit11-10. */
-+ rt_value = (rt_value & 0x06) << 4;
-+ *value = rt_value;
-+ return NASM_R_CONST;
-+}
-+
-+static int
-+parse_rte_end (struct nds32_asm_desc *pdesc ATTRIBUTE_UNUSED,
-+ struct nds32_asm_insn *pinsn ATTRIBUTE_UNUSED,
-+ char **pstr, int64_t *value)
-+{
-+ int rt_value, ret, tmp1, tmp2;
-+
-+ ret = parse_aext_reg (pstr, &rt_value, HW_GPR);
-+ if ((ret == NASM_ERR_OPERAND) || (rt_value > 15)
-+ || ((rt_value & 0x01) == 0)
-+ || (rt_value != (aext_rte + 1)))
-+ return NASM_ERR_OPERAND;
-+ tmp1 = (aext_a30b20 & 0x08);
-+ tmp2 = (rt_value & 0x08);
-+ if (tmp1 != tmp2)
-+ return NASM_ERR_OPERAND;
-+ /* Rt=CONCAT(c, t21, 0), t21:bit11-10. */
-+ rt_value = (rt_value & 0x06) << 4;
-+ *value = rt_value;
-+ return NASM_R_CONST;
-+}
-+
-+static int
-+parse_rte69_start (struct nds32_asm_desc *pdesc ATTRIBUTE_UNUSED,
-+ struct nds32_asm_insn *pinsn ATTRIBUTE_UNUSED,
-+ char **pstr, int64_t *value)
-+{
-+ int rt_value, ret;
-+
-+ ret = parse_aext_reg (pstr, &rt_value, HW_GPR);
-+ if ((ret == NASM_ERR_OPERAND)
-+ || (rt_value & 0x01))
-+ return NASM_ERR_OPERAND;
-+ aext_rte = rt_value;
-+ rt_value = (rt_value >> 1);
-+ *value = rt_value;
-+ return NASM_R_CONST;
-+}
-+
-+static int
-+parse_rte69_end (struct nds32_asm_desc *pdesc ATTRIBUTE_UNUSED,
-+ struct nds32_asm_insn *pinsn ATTRIBUTE_UNUSED,
-+ char **pstr, int64_t *value)
-+{
-+ int rt_value, ret;
-+
-+ ret = parse_aext_reg (pstr, &rt_value, HW_GPR);
-+ if ((ret == NASM_ERR_OPERAND)
-+ || ((rt_value & 0x01) == 0)
-+ || (rt_value != (aext_rte + 1)))
-+ return NASM_ERR_OPERAND;
-+ aext_rte = rt_value;
-+ rt_value = (rt_value >> 1);
-+ *value = rt_value;
-+ return NASM_R_CONST;
-+}
-+
-+static int
-+parse_im5_ip (struct nds32_asm_desc *pdesc ATTRIBUTE_UNUSED,
-+ struct nds32_asm_insn *pinsn ATTRIBUTE_UNUSED,
-+ char **pstr, int64_t *value)
-+{
-+ int rt_value, ret, new_value;
-+
-+ ret = parse_aext_reg (pstr, &rt_value, HW_AEXT_IM_I);
-+ if (ret == NASM_ERR_OPERAND)
-+ return NASM_ERR_OPERAND;
-+ /* p = bit[4].bit[1:0], r = bit[4].bit[3:2]. */
-+ new_value = (rt_value & 0x04) << 2;
-+ new_value |= (rt_value & 0x03);
-+ *value = new_value;
-+ aext_im5_ip = new_value;
-+ return NASM_R_CONST;
-+}
-+
-+static int
-+parse_im5_mr (struct nds32_asm_desc *pdesc ATTRIBUTE_UNUSED,
-+ struct nds32_asm_insn *pinsn ATTRIBUTE_UNUSED,
-+ char **pstr, int64_t *value)
-+{
-+ int rt_value, ret, new_value, tmp1, tmp2;
-+
-+ ret = parse_aext_reg (pstr, &rt_value, HW_AEXT_IM_M);
-+ if (ret == NASM_ERR_OPERAND)
-+ return NASM_ERR_OPERAND;
-+ /* p = bit[4].bit[1:0], r = bit[4].bit[3:2]. */
-+ new_value = (rt_value & 0x07) << 2;
-+ tmp1 = (aext_im5_ip & 0x10);
-+ tmp2 = (new_value & 0x10);
-+ if (tmp1 != tmp2)
-+ return NASM_ERR_OPERAND;
-+ *value = new_value;
-+ return NASM_R_CONST;
-+}
-+
-+static int
-+parse_im6_ip (struct nds32_asm_desc *pdesc ATTRIBUTE_UNUSED,
-+ struct nds32_asm_insn *pinsn ATTRIBUTE_UNUSED,
-+ char **pstr, int64_t *value)
-+{
-+ int rt_value, ret;
-+
-+ ret = parse_aext_reg (pstr, &rt_value, HW_AEXT_IM_I);
-+ if ((ret == NASM_ERR_OPERAND) || (rt_value > 3))
-+ return NASM_ERR_OPERAND;
-+ /* p = 0.bit[1:0]. */
-+ aext_im6_ip = rt_value;
-+ *value = aext_im6_ip;
-+ return NASM_R_CONST;
-+}
-+
-+static int
-+parse_im6_iq (struct nds32_asm_desc *pdesc ATTRIBUTE_UNUSED,
-+ struct nds32_asm_insn *pinsn ATTRIBUTE_UNUSED,
-+ char **pstr, int64_t *value)
-+{
-+ int rt_value, ret;
-+
-+ ret = parse_aext_reg (pstr, &rt_value, HW_AEXT_IM_I);
-+ if ((ret == NASM_ERR_OPERAND) || (rt_value < 4))
-+ return NASM_ERR_OPERAND;
-+ /* q = 1.bit[1:0]. */
-+ if ((rt_value & 0x03) != aext_im6_ip)
-+ return NASM_ERR_OPERAND;
-+ *value = aext_im6_ip;
-+ return NASM_R_CONST;
-+}
-+
-+static int
-+parse_im6_mr (struct nds32_asm_desc *pdesc ATTRIBUTE_UNUSED,
-+ struct nds32_asm_insn *pinsn ATTRIBUTE_UNUSED,
-+ char **pstr, int64_t *value)
-+{
-+ int rt_value, ret;
-+
-+ ret = parse_aext_reg (pstr, &rt_value, HW_AEXT_IM_M);
-+ if ((ret == NASM_ERR_OPERAND) || (rt_value > 3))
-+ return NASM_ERR_OPERAND;
-+ /* r = 0.bit[3:2]. */
-+ *value = (rt_value & 0x03);
-+ return NASM_R_CONST;
-+}
-+
-+static int
-+parse_im6_ms (struct nds32_asm_desc *pdesc ATTRIBUTE_UNUSED,
-+ struct nds32_asm_insn *pinsn ATTRIBUTE_UNUSED,
-+ char **pstr, int64_t *value)
-+{
-+ int rt_value, ret;
-+
-+ ret = parse_aext_reg (pstr, &rt_value, HW_AEXT_IM_M);
-+ if ((ret == NASM_ERR_OPERAND) || (rt_value < 4))
-+ return NASM_ERR_OPERAND;
-+ /* s = 1.bit[5:4]. */
-+ *value = (rt_value & 0x03);
-+ return NASM_R_CONST;
-+}
-+
-+/* Generic operand parse base on the information provided by the field. */
-+
-+static int
-+parse_operand (nds32_asm_desc_t *pdesc, nds32_asm_insn_t *pinsn,
-+ char **str, int syn)
-+{
-+ char odstr[MAX_KEYWORD_LEN];
-+ char *end;
-+ hashval_t hash;
-+ const field_t *fld = &LEX_GET_FIELD (((syn >> 8) & 0xff) - 1, syn);
-+ keyword_t *k;
-+ int64_t value = 0; /* 0x100000000; Big enough to overflow. */
-+ int r;
-+ uint64_t modifier = 0;
-+
-+ end = *str;
-+
-+ if (fld->parse)
-+ {
-+ r = fld->parse (pdesc, pinsn, &end, &value);
-+ if (r == NASM_ERR_OPERAND)
-+ {
-+ pdesc->result = NASM_ERR_OPERAND;
-+ return 0;
-+ }
-+ goto done;
-+ }
-+
-+ /* Check valid keyword group. */
-+ if (fld->hw_res < HW_INT)
-+ {
-+ int n = 0, i;
-+
-+ /* Calculate index of keyword hash table. */
-+ for (i = 0; i < (fld->hw_res >> 8); i++)
-+ n += nds32_keyword_count_table[i];
-+
-+ /* Parse the operand in assembly code. */
-+ if (*end == '$')
-+ end++;
-+ end = parse_to_delimiter (end, odstr);
-+
-+ hash = htab_hash_string (odstr);
-+ k = htab_find_with_hash (hw_ktabs[n + (fld->hw_res & 0xff)], odstr,
-+ hash);
-+
-+ if (k == NULL)
-+ {
-+ pdesc->result = NASM_ERR_OPERAND;
-+ return 0;
-+ }
-+
-+ if (fld->hw_res == HW_GPR && (pdesc->flags & NASM_OPEN_REDUCED_REG)
-+ && (k->attr & ATTR (RDREG)) == 0)
-+ {
-+ /* Register not allowed in reduced register. */
-+ pdesc->result = NASM_ERR_REG_REDUCED;
-+ return 0;
-+ }
-+
-+ if (fld->hw_res == HW_GPR)
-+ {
-+ if (syn & SYN_INPUT)
-+ pinsn->defuse |= USE_REG (k->value);
-+ if (syn & SYN_OUTPUT)
-+ pinsn->defuse |= DEF_REG (k->value);
-+ }
-+
-+ value = k->value;
-+ if (fld->hw_res == HW_GPR && (fld->bitsize + fld->shift) == 4)
-+ value = nds32_r54map[value];
-+ }
-+ else if (fld->hw_res == HW_INT || fld->hw_res == HW_UINT)
-+ {
-+ if (*end == '#')
-+ end++;
-+
-+ /* Handle modifiers. Do we need to make a table for modifiers?
-+ Do we need to check unknown modifier? */
-+ if (strncasecmp (end, "hi20(", 5) == 0)
-+ {
-+ modifier |= NASM_ATTR_HI20;
-+ end += 5;
-+ }
-+ else if (strncasecmp (end, "lo12(", 5) == 0)
-+ {
-+ modifier |= NASM_ATTR_LO12;
-+ end += 5;
-+ }
-+ else if (strncasecmp (end, "lo20(", 5) == 0)
-+ {
-+ /* e.g., movi. */
-+ modifier |= NASM_ATTR_LO20;
-+ end += 5;
-+ }
-+
-+ r = pdesc->parse_operand (pdesc, pinsn, &end, &value);
-+ if (modifier)
-+ {
-+ /* Consume the ')' of modifier. */
-+ end++;
-+ pinsn->attr |= modifier;
-+ }
-+
-+ switch (r)
-+ {
-+ case NASM_R_ILLEGAL:
-+ pdesc->result = NASM_ERR_OPERAND;
-+ return 0;
-+ case NASM_R_SYMBOL:
-+ /* This field needs special fix-up. */
-+ pinsn->field = fld;
-+ break;
-+ case NASM_R_CONST:
-+ if (modifier & NASM_ATTR_HI20)
-+ value = (value >> 12) & 0xfffff;
-+ else if (modifier & NASM_ATTR_LO12)
-+ value = value & 0xfff;
-+ else if (modifier & NASM_ATTR_LO20)
-+ value = value & 0xfffff;
-+ break;
-+ default:
-+ fprintf (stderr, "Internal error: Don't know how to handle "
-+ "parsing results.\n");
-+ abort ();
-+ }
-+ }
-+ else
-+ {
-+ fprintf (stderr, "Internal error: Unknown hardware resource.\n");
-+ abort ();
-+ }
-+
-+done:
-+ /* Don't silently discarding bits. */
-+ if (value & __MASK (fld->shift))
-+ {
-+ pdesc->result = NASM_ERR_OUT_OF_RANGE;
-+ return 0;
-+ }
-+
-+ /* Check the range of signed or unsigned result. */
-+ if (fld->hw_res != HW_INT && ((int32_t) value >> (fld->bitsize + fld->shift)))
-+ {
-+ pdesc->result = NASM_ERR_OUT_OF_RANGE;
-+ return 0;
-+ }
-+ else if (fld->hw_res == HW_INT)
-+ {
-+ /* Sign-ext the value. */
-+ if (((value >> 32) == 0) && (value & 0x80000000))
-+ value |= (int64_t)((uint64_t) -1 << 31);
-+
-+
-+ /* Shift the value to positive domain. */
-+ if ((value + (1 << (fld->bitsize + fld->shift - 1)))
-+ >> (fld->bitsize + fld->shift))
-+ {
-+ pdesc->result = NASM_ERR_OUT_OF_RANGE;
-+ return 0;
-+ }
-+ }
-+
-+ pinsn->insn |=
-+ (((value >> fld->shift) & __MASK (fld->bitsize)) << fld->bitpos);
-+ *str = end;
-+ return 1;
-+}
-+
-+/* Try to parse an instruction string based on opcode syntax. */
-+
-+static int
-+parse_insn (nds32_asm_desc_t *pdesc, nds32_asm_insn_t *pinsn,
-+ char *str, struct nds32_opcode *opc)
-+{
-+ int variant = 0;
-+ char *p = NULL;
-+
-+ /* A syntax may has optional operands, so we have to try each possible
-+ combination to see if the input is accepted. In order to do so,
-+ bit-N represent whether optional-operand-N is used in this combination.
-+ That is, if bit-N is set, optional-operand-N is not used.
-+
-+ For example, there are 2 optional operands in this syntax,
-+
-+ "a{,b}{,c}"
-+
-+ we can try it 4 times (i.e., 1 << 2)
-+
-+ 0 (b00): "a,b,c"
-+ 1 (b01): "a,c"
-+ 2 (b10): "a,b"
-+ 3 (b11): "a"
-+ */
-+
-+ /* The outer do-while loop is used to try each possible optional
-+ operand combination, and VARIANT is the bit mask. The inner loop
-+ iterates each lexeme in the syntax. */
-+
-+ do
-+ {
-+ /* OPT is the number of optional operands we've seen. */
-+ int opt = 0;
-+ lex_t *plex;
-+
-+ /* PLEX is the syntax iterator and P is the iterator for input
-+ string. */
-+ plex = opc->syntax;
-+ p = str;
-+ /* Initial the base value. */
-+ pinsn->insn = opc->value;
-+
-+ while (*plex)
-+ {
-+ if (IS_LEX_CHAR (*plex))
-+ {
-+ /* If it's a plain char, just compare it. */
-+ if (LEX_CHAR (*plex) != TOLOWER (*p))
-+ {
-+ if (LEX_CHAR (*plex) == '+' && TOLOWER (*p) == '-')
-+ {
-+ /* We don't define minus format for some signed
-+ immediate case, so ignoring '+' here to parse
-+ negative value eazily. Besides, the minus format
-+ can not support for instruction with relocation.
-+ Ex: lwi $r0, [$r0 + imm] */
-+ plex++;
-+ continue;
-+ }
-+ pdesc->result = NASM_ERR_SYNTAX;
-+ goto reject;
-+ }
-+ p++;
-+ }
-+ else if (*plex & SYN_LOPT)
-+ {
-+ /* If it's '{' and it's not used in this iteration,
-+ just skip the whole optional operand. */
-+ if ((1 << (opt++)) & variant)
-+ {
-+ while ((*plex & SYN_ROPT) == 0)
-+ plex++;
-+ }
-+ }
-+ else if (*plex & SYN_ROPT)
-+ {
-+ /* ignore. */
-+ }
-+ else
-+ {
-+ /* If it's a operand, parse the input operand from input. */
-+ if (!parse_operand (pdesc, pinsn, &p, *plex))
-+ goto reject;
-+ }
-+ plex++;
-+ }
-+
-+ /* Check whether this syntax is accepted. */
-+ if (*plex == 0 && (*p == '\0' || *p == '!' || *p == '#'))
-+ return 1;
-+
-+reject:
-+ /* If not accepted, try another combination. */
-+ variant++;
-+ }
-+ while (variant < (1 << opc->variant));
-+
-+ return 0;
-+}
-+
-+void
-+nds32_assemble (nds32_asm_desc_t *pdesc, nds32_asm_insn_t *pinsn,
-+ char *str)
-+{
-+ struct nds32_opcode *opc;
-+ char *s;
-+ char *mnemoic;
-+ char *dot;
-+ hashval_t hash;
-+
-+ /* Duplicate the string, so we can modify it for convenience. */
-+ s = strdup (str);
-+ mnemoic = s;
-+ str = s;
-+
-+ /* Find opcode mnemoic. */
-+ while (*s != ' ' && *s != '\t' && *s != '\0')
-+ s++;
-+ if (*s != '\0')
-+ *s++ = '\0';
-+ dot = strchr (mnemoic, '.');
-+
-+retry_dot:
-+ /* Lookup the opcode syntax. */
-+ hash = htab_hash_string (mnemoic);
-+ opc = (struct nds32_opcode *)
-+ htab_find_with_hash (opcode_htab, mnemoic, hash);
-+
-+ /* If we cannot find a match syntax, try it again without `.'.
-+ For example, try "lmw.adm" first and then try "lmw" again. */
-+ if (opc == NULL && dot != NULL)
-+ {
-+ *dot = '\0';
-+ s[-1] = ' ';
-+ s = dot + 1;
-+ dot = NULL;
-+ goto retry_dot;
-+ }
-+ else if (opc == NULL)
-+ {
-+ pdesc->result = NASM_ERR_UNKNOWN_OP;
-+ goto out;
-+ }
-+
-+ /* There may be multiple syntaxes for a given opcode.
-+ Try each one until a match is found. */
-+ for (; opc; opc = opc->next)
-+ {
-+ /* Build opcode syntax, if it's not been initialized yet. */
-+ if (opc->syntax == NULL)
-+ build_opcode_syntax (opc);
-+
-+ /* Reset status before assemble. */
-+ pinsn->defuse = opc->defuse;
-+ pinsn->insn = 0;
-+ pinsn->field = NULL;
-+ /* Use opcode attributes to initial instruction attributes. */
-+ pinsn->attr = opc->attr;
-+ if (parse_insn (pdesc, pinsn, s, opc))
-+ break;
-+ }
-+
-+ pinsn->opcode = opc;
-+ if (opc == NULL)
-+ {
-+ if (pdesc->result == NASM_OK)
-+ pdesc->result = NASM_ERR_SYNTAX;
-+ goto out;
-+ }
-+
-+ /* A matched opcode is found. Write the result to instruction buffer. */
-+ pdesc->result = NASM_OK;
-+
-+out:
-+ free (str);
-+}
-diff -Nur binutils-2.24.orig/opcodes/nds32-asm.h binutils-2.24/opcodes/nds32-asm.h
---- binutils-2.24.orig/opcodes/nds32-asm.h 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/opcodes/nds32-asm.h 2016-06-30 21:26:12.825899802 +0200
-@@ -0,0 +1,322 @@
-+/* NDS32-specific support for 32-bit ELF.
-+ Copyright (C) 2012-2013 Free Software Foundation, Inc.
-+ Contributed by Andes Technology Corporation.
-+
-+ This file is part of BFD, the Binary File Descriptor library.
-+
-+ This program is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 3 of the License, or
-+ (at your option) any later version.
-+
-+ This program is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ You should have received a copy of the GNU General Public License
-+ along with this program; if not, write to the Free Software
-+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-+ 02110-1301, USA. */
-+
-+
-+#ifndef NDS32_ASM_H
-+#define NDS32_ASM_H
-+
-+/* Constant values for assembler. */
-+enum
-+{
-+ /* Error code for assembling an instruction. */
-+ NASM_OK = 0,
-+ NASM_ERR_UNKNOWN_OP,
-+ NASM_ERR_SYNTAX,
-+ NASM_ERR_OPERAND,
-+ NASM_ERR_OUT_OF_RANGE,
-+ NASM_ERR_REG_REDUCED,
-+ NASM_ERR_JUNK_EOL,
-+
-+ /* Results of parse_operand. */
-+ NASM_R_CONST,
-+ NASM_R_SYMBOL,
-+ NASM_R_ILLEGAL,
-+
-+ /* Flags for open description. */
-+ NASM_OPEN_ARCH_V1 = 0x0,
-+ NASM_OPEN_ARCH_V2 = 0x1,
-+ NASM_OPEN_ARCH_V3 = 0x2,
-+ NASM_OPEN_ARCH_V3M = 0x3,
-+ NASM_OPEN_ARCH_MASK = 0xf,
-+ NASM_OPEN_REDUCED_REG = 0x10,
-+
-+ /* Common attributes. */
-+ NASM_ATTR_ISA_V1 = 0x01,
-+ NASM_ATTR_ISA_V2 = 0x02,
-+ NASM_ATTR_ISA_V3 = 0x04,
-+ NASM_ATTR_ISA_V3M = 0x08,
-+ NASM_ATTR_ISA_ALL = 0x0f,
-+
-+ /* Attributes for instructions. */
-+ NASM_ATTR_MAC = 0x0000100,
-+ NASM_ATTR_DIV = 0x0000200,
-+ NASM_ATTR_FPU = 0x0000400,
-+ NASM_ATTR_FPU_SP_EXT = 0x0000800,
-+ NASM_ATTR_FPU_DP_EXT = 0x0001000,
-+ NASM_ATTR_STR_EXT = 0x0002000,
-+ NASM_ATTR_PERF_EXT = 0x0004000,
-+ NASM_ATTR_PERF2_EXT = 0x0008000,
-+ NASM_ATTR_AUDIO_ISAEXT = 0x0010000,
-+ NASM_ATTR_IFC_EXT = 0x0020000,
-+ NASM_ATTR_EX9_EXT = 0x0040000,
-+ NASM_ATTR_FPU_FMA = 0x0080000,
-+ NASM_ATTR_DXREG = 0x0100000,
-+ NASM_ATTR_BRANCH = 0x0200000,
-+ NASM_ATTR_SATURATION_EXT = 0x0400000,
-+ NASM_ATTR_PCREL = 0x0800000,
-+ NASM_ATTR_GPREL = 0x1000000,
-+ NASM_ATTR_DSP_ISAEXT = 0x2000000,
-+ NASM_ATTR_ZOL = (1 << 26),
-+
-+ /* Attributes for relocations. */
-+ NASM_ATTR_HI20 = 0x10000000,
-+ NASM_ATTR_LO12 = 0x20000000,
-+ NASM_ATTR_LO20 = 0x40000000,
-+
-+ /* Attributes for registers. */
-+ NASM_ATTR_RDREG = 0x000100,
-+
-+};
-+
-+#define NDS32_CORE_COUNT 6
-+#define NDS32_MAIN_CORE 0
-+#define NDS32_ACE 1
-+#define NDS32_COP0 2
-+#define NDS32_COP1 3
-+#define NDS32_COP2 4
-+#define NDS32_COP3 5
-+
-+enum
-+{
-+ /* This operand is used for input or output. (define or use) */
-+ SYN_INPUT = 0x10000,
-+ SYN_OUTPUT = 0x20000,
-+ SYN_LOPT = 0x40000,
-+ SYN_ROPT = 0x80000,
-+
-+ /* Hardware resources: */
-+ /* Current set up allows up to 256 resources for each class */
-+ /* defined above. */
-+ HW_GPR = NDS32_MAIN_CORE << 8,
-+ HW_USR,
-+ HW_DXR,
-+ HW_SR,
-+ HW_FSR,
-+ HW_FDR,
-+ HW_CP, /* Co-processor ID. */
-+ HW_CPR, /* Co-processor registers. */
-+ HW_ABDIM, /* [ab][di]m? flag for LSMWA?. */
-+ HW_ABM, /* [ab]m? flag for LSMWZB. */
-+ HW_DTITON,
-+ HW_DTITOFF,
-+ HW_DPREF_ST,
-+ HW_CCTL_ST0,
-+ HW_CCTL_ST1,
-+ HW_CCTL_ST2,
-+ HW_CCTL_ST3,
-+ HW_CCTL_ST4,
-+ HW_CCTL_ST5,
-+ HW_CCTL_LV,
-+ HW_TLBOP_ST,
-+ HW_STANDBY_ST,
-+ HW_MSYNC_ST,
-+ HW_AEXT_IM_I,
-+ HW_AEXT_IM_M,
-+ HW_AEXT_ACC,
-+ HW_AEXT_ARIDX,
-+ HW_AEXT_ARIDX2,
-+ HW_AEXT_ARIDXI,
-+ HW_AEXT_ARIDXI_MX,
-+ _HW_LAST,
-+ /* TODO: Maybe we should add a new type to distinguish address and
-+ const int. Only the former allows symbols and relocations. */
-+ HW_ACE_BASE = NDS32_ACE << 8,
-+ HW_COP0_BASE = NDS32_COP0 << 8,
-+ HW_COP1_BASE = NDS32_COP1 << 8,
-+ HW_COP2_BASE = NDS32_COP2 << 8,
-+ HW_COP3_BASE = NDS32_COP3 << 8,
-+ HW_INT = 0x1000,
-+ HW_UINT
-+};
-+
-+/* for audio-extension. */
-+enum
-+{
-+ N32_AEXT_AMADD = 0,
-+ N32_AEXT_AMSUB,
-+ N32_AEXT_AMULT,
-+ N32_AEXT_AMFAR,
-+ N32_AEXT_AMADDS,
-+ N32_AEXT_AMSUBS,
-+ N32_AEXT_AMULTS,
-+ N32_AEXT_AMNEGS,
-+ N32_AEXT_AADDL,
-+ N32_AEXT_AMTARI,
-+ N32_AEXT_AMAWBS = 0x0c,
-+ N32_AEXT_AMAWTS,
-+ N32_AEXT_AMWBS,
-+ N32_AEXT_AMWTS,
-+ N32_AEXT_AMABBS,
-+ N32_AEXT_AMABTS,
-+ N32_AEXT_AMATBS,
-+ N32_AEXT_AMATTS,
-+ N32_AEXT_AMBBS,
-+ N32_AEXT_AMBTS,
-+ N32_AEXT_AMTBS,
-+ N32_AEXT_AMTTS,
-+};
-+
-+/* Macro for instruction attribute. */
-+#define ATTR(attr) NASM_ATTR_ ## attr
-+#define ATTR_NONE 0
-+#define ATTR_PCREL (ATTR (PCREL) | ATTR (BRANCH))
-+
-+#define ATTR_ALL (ATTR (ISA_ALL))
-+#define ATTR_V2UP (ATTR_ALL & ~(ATTR (ISA_V1)))
-+#define ATTR_V3MUP (ATTR (ISA_V3) | ATTR (ISA_V3M))
-+#define ATTR_V3 (ATTR (ISA_V3))
-+#define ATTR_V3MEX_V1 (ATTR_ALL & ~(ATTR (ISA_V3M)))
-+#define ATTR_V3MEX_V2 (ATTR_V2UP & ~(ATTR (ISA_V3M)))
-+
-+/* Lexical element in parsed syntax. */
-+typedef int lex_t;
-+
-+/* Common header for hash entries. */
-+struct nds32_hash_entry
-+{
-+ const char *name;
-+};
-+
-+typedef struct nds32_keyword
-+{
-+ const char *name;
-+ int value;
-+ uint64_t attr;
-+} keyword_t;
-+
-+typedef struct nds32_opcode
-+{
-+ /* Opcode for the instruction. */
-+ const char *opcode;
-+ /* Human readable string of this instruction. */
-+ const char *instruction;
-+ /* Base value of this instruction. */
-+ uint32_t value;
-+ /* The byte-size of the instruction. */
-+ int isize;
-+ /* Attributes of this instruction. */
-+ uint64_t attr;
-+ /* Implicit define/use. */
-+ uint64_t defuse;
-+ /* Parsed string for assembling. */
-+ lex_t *syntax;
-+ /* Number of variant. */
-+ int variant;
-+ /* Next form of the same mnemonic. */
-+ struct nds32_opcode *next;
-+
-+ /* TODO: Extra constrains and verification.
-+ For example, `mov55 $sp, $sp' is not allowed in v3. */
-+} opcode_t;
-+
-+typedef struct nds32_asm_insn
-+{
-+ /* Assembled instruction bytes. */
-+ uint32_t insn;
-+ /* The opcode structure for this instruction. */
-+ struct nds32_opcode *opcode;
-+ /* The field need special fix-up, used for relocation. */
-+ const struct nds32_field *field;
-+ /* Attributes for relocation. */
-+ uint64_t attr;
-+ /* Application-dependent data, e.g., expression. */
-+ void *info;
-+ /* Input/output registers. */
-+ uint64_t defuse;
-+} nds32_asm_insn_t;
-+
-+typedef struct nds32_asm_desc
-+{
-+ /* The callback provided by assembler user for parse an operand,
-+ e.g., parse integer. */
-+ int (*parse_operand) (struct nds32_asm_desc *desc,
-+ struct nds32_asm_insn *insn,
-+ char **str, int64_t *value);
-+
-+ /* Result of assembling. */
-+ int result;
-+
-+ /* The mach for this assembling. */
-+ int mach;
-+
-+ int flags;
-+} nds32_asm_desc_t;
-+
-+/* The field information for an operand. */
-+typedef struct nds32_field
-+{
-+ /* Name of the field. */
-+ const char *name;
-+
-+ int bitpos;
-+ int bitsize;
-+ int shift;
-+ int hw_res;
-+
-+ int (*parse) (struct nds32_asm_desc *desc,
-+ struct nds32_asm_insn *insn,
-+ char **str, int64_t *value);
-+} field_t;
-+
-+void nds32_assemble (nds32_asm_desc_t *pdesc, nds32_asm_insn_t *pinsn,
-+ char *str);
-+void nds32_asm_init (nds32_asm_desc_t *pdesc, int flags);
-+int nds32_parse_udi (char *str);
-+int nds32_parse_cop0 (char *str);
-+int nds32_parse_cop1 (char *str);
-+int nds32_parse_cop2 (char *str);
-+int nds32_parse_cop3 (char *str);
-+
-+#define OP6(op6) (N32_OP6_ ## op6 << 25)
-+
-+#define LSMW(sub) (OP6 (LSMW) | N32_LSMW_ ## sub)
-+#define JREG(sub) (OP6 (JREG) | N32_JREG_ ## sub)
-+#define JREG_RET (1 << 5)
-+#define JREG_IFC (1 << 6)
-+#define BR2(sub) (OP6 (BR2) | (N32_BR2_ ## sub << 16))
-+#define SIMD(sub) (OP6 (SIMD) | N32_SIMD_ ## sub)
-+#define ALU1(sub) (OP6 (ALU1) | N32_ALU1_ ## sub)
-+#define ALU2(sub) (OP6 (ALU2) | N32_ALU2_ ## sub)
-+#define ALU2_1(sub) (OP6 (ALU2) | __BIT (6) | N32_ALU2_ ## sub)
-+#define ALU2_2(sub) (OP6 (ALU2) | __BIT (7) | N32_ALU2_ ## sub)
-+#define ALU2_3(sub) (OP6 (ALU2) | __BIT (6) | __BIT (7) | N32_ALU2_ ## sub)
-+#define MISC(sub) (OP6 (MISC) | N32_MISC_ ## sub)
-+#define MEM(sub) (OP6 (MEM) | N32_MEM_ ## sub)
-+#define FPU_RA_IMMBI(sub) (OP6 (sub) | __BIT (12))
-+#define FS1(sub) (OP6 (COP) | N32_FPU_FS1 | (N32_FPU_FS1_ ## sub << 6))
-+#define FS1_F2OP(sub) (OP6 (COP) | N32_FPU_FS1 | (N32_FPU_FS1_F2OP << 6) \
-+ | (N32_FPU_FS1_F2OP_ ## sub << 10))
-+#define FS2(sub) (OP6 (COP) | N32_FPU_FS2 | (N32_FPU_FS2_ ## sub << 6))
-+#define FD1(sub) (OP6 (COP) | N32_FPU_FD1 | (N32_FPU_FD1_ ## sub << 6))
-+#define FD1_F2OP(sub) (OP6 (COP) | N32_FPU_FD1 | (N32_FPU_FD1_F2OP << 6) \
-+ | (N32_FPU_FD1_F2OP_ ## sub << 10))
-+#define FD2(sub) (OP6 (COP) | N32_FPU_FD2 | (N32_FPU_FD2_ ## sub << 6))
-+#define MFCP(sub) (OP6 (COP) | N32_FPU_MFCP | (N32_FPU_MFCP_ ## sub << 6))
-+#define MFCP_XR(sub) (OP6 (COP) | N32_FPU_MFCP | (N32_FPU_MFCP_XR << 6) \
-+ | (N32_FPU_MFCP_XR_ ## sub << 10))
-+#define MTCP(sub) (OP6 (COP) | N32_FPU_MTCP | (N32_FPU_MTCP_ ## sub << 6))
-+#define MTCP_XR(sub) (OP6 (COP) | N32_FPU_MTCP | (N32_FPU_MTCP_XR << 6) \
-+ | (N32_FPU_MTCP_XR_ ## sub << 10))
-+#define FPU_MEM(sub) (OP6 (COP) | N32_FPU_ ## sub)
-+#define FPU_MEMBI(sub) (OP6 (COP) | N32_FPU_ ## sub | 0x1 << 7)
-+#define AUDIO(sub) (OP6 (AEXT) | (N32_AEXT_ ## sub << 20))
-+
-+#endif
-diff -Nur binutils-2.24.orig/opcodes/nds32-dis.c binutils-2.24/opcodes/nds32-dis.c
---- binutils-2.24.orig/opcodes/nds32-dis.c 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/opcodes/nds32-dis.c 2016-06-30 21:26:12.825899802 +0200
-@@ -0,0 +1,1468 @@
-+/* NDS32-specific support for 32-bit ELF.
-+ Copyright (C) 2012-2013 Free Software Foundation, Inc.
-+ Contributed by Andes Technology Corporation.
-+
-+ This file is part of BFD, the Binary File Descriptor library.
-+
-+ This program is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 3 of the License, or
-+ (at your option) any later version.
-+
-+ This program is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ You should have received a copy of the GNU General Public License
-+ along with this program; if not, write to the Free Software
-+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-+ 02110-1301, USA. */
-+
-+#include "sysdep.h"
-+#include <stdio.h>
-+#include "ansidecl.h"
-+#include "dis-asm.h"
-+#include "bfd.h"
-+#include "symcat.h"
-+#include "libiberty.h"
-+#include "opintl.h"
-+#include "bfd_stdint.h"
-+#include "hashtab.h"
-+#include "nds32-asm.h"
-+#include "opcode/nds32.h"
-+
-+/* Get fields macro define. */
-+#define MASK_OP(insn, mask) ((insn) & (0x3f << 25 | (mask)))
-+
-+enum map_type
-+{
-+ MAP_DATA0,
-+ MAP_DATA1,
-+ MAP_DATA2,
-+ MAP_DATA3,
-+ MAP_DATA4,
-+ MAP_CODE,
-+};
-+
-+struct nds32_private_data
-+{
-+ /* Whether any mapping symbols are present in the provided symbol
-+ table. -1 if we do not know yet, otherwise 0 or 1. */
-+ int has_mapping_symbols;
-+
-+ /* Track the last type (although this doesn't seem to be useful). */
-+ enum map_type last_mapping_type;
-+
-+ /* Tracking symbol table information. */
-+ int last_symbol_index;
-+ bfd_vma last_addr;
-+};
-+/* Default text to print if an instruction isn't recognized. */
-+#define UNKNOWN_INSN_MSG _("*unknown*")
-+
-+#define NDS32_PARSE_INSN16 0x01
-+#define NDS32_PARSE_INSN32 0x02
-+#define NDS32_PARSE_EX9IT 0x04
-+#define NDS32_PARSE_EX9TAB 0x08
-+
-+static void print_insn16 (bfd_vma pc, disassemble_info *info,
-+ uint32_t insn, uint32_t parse_mode);
-+static void print_insn32 (bfd_vma pc, disassemble_info *info, uint32_t insn,
-+ uint32_t parse_mode);
-+static uint32_t nds32_mask_opcode (uint32_t);
-+static void nds32_special_opcode (uint32_t, struct nds32_opcode **);
-+static int get_mapping_symbol_type (struct disassemble_info *info, int n,
-+ enum map_type *map_type);
-+static int is_mapping_symbol (struct disassemble_info *info, int n,
-+ enum map_type *map_type);
-+
-+extern const field_t *nds32_field_table[NDS32_CORE_COUNT];
-+extern opcode_t *nds32_opcode_table[NDS32_CORE_COUNT];
-+extern keyword_t **nds32_keyword_table[NDS32_CORE_COUNT];
-+extern struct nds32_opcode nds32_opcodes[];
-+extern const field_t operand_fields[];
-+extern keyword_t *keywords[];
-+extern const keyword_t keyword_gpr[];
-+
-+/* Define in objdump.c. */
-+struct objdump_disasm_info
-+{
-+ bfd * abfd;
-+ asection * sec;
-+ bfd_boolean require_sec;
-+ arelent ** dynrelbuf;
-+ long dynrelcount;
-+ disassembler_ftype disassemble_fn;
-+ arelent * reloc;
-+};
-+
-+bfd_byte *ex9_data = NULL;
-+int ex9_ready = 0, ex9_base_offset = 0;
-+
-+/* Hash function for disassemble. */
-+
-+static htab_t opcode_htab;
-+
-+static void
-+nds32_ex9_info (bfd_vma pc ATTRIBUTE_UNUSED,
-+ disassemble_info *info, uint32_t ex9_index)
-+{
-+ uint32_t insn;
-+ static asymbol *itb = NULL;
-+ bfd_byte buffer[4];
-+ long unsigned int isec_vma;
-+
-+ /* Lookup itb symbol. */
-+ if (!itb)
-+ {
-+ int i;
-+
-+ for (i = 0; i < info->symtab_size; i++)
-+ if (bfd_asymbol_name (info->symtab[i])
-+ && (strcmp (bfd_asymbol_name (info->symtab[i]), "$_ITB_BASE_") == 0
-+ || strcmp (bfd_asymbol_name (info->symtab[i]),
-+ "_ITB_BASE_") == 0))
-+ {
-+ itb = info->symtab[i];
-+ break;
-+ }
-+
-+ /* Lookup it only once, in case _ITB_BASE_ doesn't exist at all. */
-+ if (itb == NULL)
-+ itb = (void *) -1;
-+ }
-+
-+ if (itb == (void *) -1)
-+ return;
-+
-+ isec_vma = itb->section->vma;
-+ isec_vma = itb->section->vma - bfd_asymbol_value (itb);
-+ if (!itb->section || !itb->section->owner)
-+ return;
-+ bfd_get_section_contents (itb->section->owner, itb->section, buffer,
-+ ex9_index * 4 - isec_vma, 4);
-+ insn = bfd_getb32 (buffer);
-+ /* 16-bit instructions in ex9 table. */
-+ if (insn & 0x80000000)
-+ print_insn16 (pc, info, (insn & 0x0000FFFF),
-+ NDS32_PARSE_INSN16 | NDS32_PARSE_EX9IT);
-+ /* 32-bit instructions in ex9 table. */
-+ else
-+ print_insn32 (pc, info, insn, NDS32_PARSE_INSN32 | NDS32_PARSE_EX9IT);
-+}
-+
-+/* Find the value map register name. */
-+
-+static keyword_t *
-+nds32_find_reg_keyword (keyword_t *reg, int value)
-+{
-+ if (!reg)
-+ return NULL;
-+
-+ while (reg->name != NULL && reg->value != value)
-+ {
-+ reg++;
-+ }
-+ if (reg->name == NULL)
-+ return NULL;
-+ return reg;
-+}
-+
-+static void
-+nds32_parse_audio_ext (const field_t *pfd,
-+ disassemble_info *info, uint32_t insn)
-+{
-+ fprintf_ftype func = info->fprintf_func;
-+ void *stream = info->stream;
-+ keyword_t *psys_reg;
-+ int int_value, new_value;
-+
-+ if (pfd->hw_res == HW_INT || pfd->hw_res == HW_UINT)
-+ {
-+ if (pfd->hw_res == HW_INT)
-+ int_value =
-+ N32_IMMS ((insn >> pfd->bitpos), pfd->bitsize) << pfd->shift;
-+ else
-+ int_value = __GF (insn, pfd->bitpos, pfd->bitsize) << pfd->shift;
-+
-+ if (int_value < 0)
-+ func (stream, "#%d", int_value);
-+ else
-+ func (stream, "#0x%x", int_value);
-+ return;
-+ }
-+ int_value =
-+ __GF (insn, pfd->bitpos, pfd->bitsize) << pfd->shift;
-+ new_value = int_value;
-+ psys_reg = (keyword_t*) keywords[pfd->hw_res];
-+
-+ /* p = bit[4].bit[1:0], r = bit[4].bit[3:2]. */
-+ if (strcmp (pfd->name, "im5_i") == 0)
-+ {
-+ new_value = int_value & 0x03;
-+ new_value |= ((int_value & 0x10) >> 2);
-+ }
-+ else if (strcmp (pfd->name, "im5_m") == 0)
-+ {
-+ new_value = ((int_value & 0x1C) >> 2);
-+ }
-+ /* p = 0.bit[1:0], r = 0.bit[3:2]. */
-+ /* q = 1.bit[1:0], s = 1.bit[5:4]. */
-+ else if (strcmp (pfd->name, "im6_iq") == 0)
-+ {
-+ new_value |= 0x04;
-+ }
-+ else if (strcmp (pfd->name, "im6_ms") == 0)
-+ {
-+ new_value |= 0x04;
-+ }
-+ /* Rt CONCAT(c, t21, t0). */
-+ else if (strcmp (pfd->name, "a_rt21") == 0)
-+ {
-+ new_value = (insn & 0x00000020) >> 5;
-+ new_value |= (insn & 0x00000C00) >> 9;
-+ new_value |= (insn & 0x00008000) >> 12;
-+ }
-+ else if (strcmp (pfd->name, "a_rte") == 0)
-+ {
-+ new_value = (insn & 0x00000C00) >> 9;
-+ new_value |= (insn & 0x00008000) >> 12;
-+ }
-+ else if (strcmp (pfd->name, "a_rte1") == 0)
-+ {
-+ new_value = (insn & 0x00000C00) >> 9;
-+ new_value |= (insn & 0x00008000) >> 12;
-+ new_value |= 0x01;
-+ }
-+ else if (strcmp (pfd->name, "a_rte69") == 0)
-+ {
-+ new_value = int_value << 1;
-+ }
-+ else if (strcmp (pfd->name, "a_rte69_1") == 0)
-+ {
-+ new_value = int_value << 1;
-+ new_value |= 0x01;
-+ }
-+
-+ psys_reg = nds32_find_reg_keyword (psys_reg, new_value);
-+ if (!psys_reg)
-+ func (stream, "???");
-+ else
-+ func (stream, "$%s", psys_reg->name);
-+}
-+
-+/* Match instruction opcode with keyword table. */
-+
-+static field_t *
-+match_field (char *name)
-+{
-+ field_t *pfd;
-+ int k;
-+
-+ for (k = 0; k < NDS32_CORE_COUNT; k++)
-+ {
-+ pfd = (field_t *) nds32_field_table[k];
-+ while (1)
-+ {
-+ if (pfd->name == NULL)
-+ break;
-+ if (strcmp (name, pfd->name) == 0)
-+ return pfd;
-+ pfd++;
-+ }
-+ }
-+
-+ return NULL;
-+}
-+
-+static void
-+nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED,
-+ disassemble_info *info, uint32_t insn, uint32_t parse_mode)
-+{
-+ int op = 0;
-+ fprintf_ftype func = info->fprintf_func;
-+ void *stream = info->stream;
-+ const char *pstr_src;
-+ char *pstr_tmp;
-+ char tmp_string[16];
-+ unsigned int push25gpr = 0, lsmwRb, lsmwRe, lsmwEnb4, checkbit, i;
-+ int int_value, ifthe1st = 1;
-+ const field_t *pfd;
-+ keyword_t *psys_reg;
-+
-+ if (opc == NULL)
-+ {
-+ func (stream, UNKNOWN_INSN_MSG);
-+ return;
-+ }
-+
-+ if (parse_mode & NDS32_PARSE_EX9IT)
-+ func (stream, " !");
-+
-+ pstr_src = opc->instruction;
-+ if (*pstr_src == 0)
-+ {
-+ func (stream, "%s", opc->opcode);
-+ return;
-+ }
-+ /* NDS32_PARSE_INSN16. */
-+ if (parse_mode & NDS32_PARSE_INSN16)
-+ {
-+ func (stream, "%s ", opc->opcode);
-+ }
-+ /* NDS32_PARSE_INSN32. */
-+ else
-+ {
-+ op = N32_OP6 (insn);
-+ if (op == N32_OP6_LSMW)
-+ func (stream, "%s.", opc->opcode);
-+ else if (strstr (opc->instruction, "tito"))
-+ func (stream, "%s", opc->opcode);
-+ else
-+ func (stream, "%s ", opc->opcode);
-+ }
-+
-+ while (*pstr_src)
-+ {
-+ switch (*pstr_src)
-+ {
-+ case '%':
-+ case '=':
-+ case '&':
-+ pstr_src++;
-+ /* Compare name with operand table entries. */
-+ pstr_tmp = &tmp_string[0];
-+ while (*pstr_src)
-+ {
-+ if ((*pstr_src == ',') || (*pstr_src == ' ')
-+ || (*pstr_src == '{') || (*pstr_src == '}')
-+ || (*pstr_src == '[') || (*pstr_src == ']')
-+ || (*pstr_src == '(') || (*pstr_src == ')')
-+ || (*pstr_src == '+') || (*pstr_src == '<'))
-+ break;
-+ *pstr_tmp++ = *pstr_src++;
-+ }
-+ *pstr_tmp = 0;
-+ if ((pfd = match_field (&tmp_string[0])) == NULL)
-+ return;
-+
-+ if (parse_mode & NDS32_PARSE_INSN16)
-+ {
-+ if (pfd->hw_res == HW_GPR)
-+ {
-+ int_value =
-+ __GF (insn, pfd->bitpos, pfd->bitsize) << pfd->shift;
-+ /* push25/pop25. */
-+ if ((opc->value == 0xfc00) || (opc->value == 0xfc80))
-+ {
-+ if (int_value == 0)
-+ int_value = 6;
-+ else
-+ int_value = (6 + (0x01 << int_value));
-+ push25gpr = int_value;
-+ }
-+ else if (strcmp (pfd->name, "rt4") == 0)
-+ {
-+ int_value = nds32_r45map[int_value];
-+ }
-+ func (stream, "$%s", keyword_gpr[int_value].name);
-+ }
-+ else if ((pfd->hw_res == HW_INT) || (pfd->hw_res == HW_UINT))
-+ {
-+ if (pfd->hw_res == HW_INT)
-+ int_value =
-+ N32_IMMS ((insn >> pfd->bitpos),
-+ pfd->bitsize) << pfd->shift;
-+ else
-+ int_value =
-+ __GF (insn, pfd->bitpos, pfd->bitsize) << pfd->shift;
-+
-+ /* movpi45. */
-+ if (opc->value == 0xfa00)
-+ {
-+ int_value += 16;
-+ func (stream, "#0x%x", int_value);
-+ }
-+ /* lwi45.fe. */
-+ else if (opc->value == 0xb200)
-+ {
-+ int_value = 0 - (128 - int_value);
-+ func (stream, "#%d", int_value);
-+ }
-+ /* beqz38/bnez38/beqs38/bnes38/j8/beqzs8/bnezs8/ifcall9. */
-+ else if ((opc->value == 0xc000) || (opc->value == 0xc800)
-+ || (opc->value == 0xd000) || (opc->value == 0xd800)
-+ || (opc->value == 0xd500) || (opc->value == 0xe800)
-+ || (opc->value == 0xe900)
-+ || (opc->value == 0xf800))
-+ {
-+ info->print_address_func (int_value + pc, info);
-+ }
-+ /* push25/pop25. */
-+ else if ((opc->value == 0xfc00) || (opc->value == 0xfc80))
-+ {
-+ func (stream, "#%d ! {$r6", int_value);
-+ if (push25gpr != 6)
-+ func (stream, "~$%s", keyword_gpr[push25gpr].name);
-+ func (stream, ", $fp, $gp, $lp}");
-+ }
-+ /* ex9.it. */
-+ else if ((opc->value == 0xdd40) || (opc->value == 0xea00))
-+ {
-+ func (stream, "#%d", int_value);
-+ nds32_ex9_info (pc, info, int_value);
-+ }
-+ else if (pfd->hw_res == HW_INT)
-+ {
-+ if (int_value < 0)
-+ func (stream, "#%d", int_value);
-+ else
-+ func (stream, "#0x%x", int_value);
-+ }
-+ else /* if(pfd->hw_res == HW_UINT). */
-+ func (stream, "#0x%x", int_value);
-+ }
-+ }
-+ /* for audio-ext. */
-+ else if (op == N32_OP6_AEXT)
-+ {
-+ nds32_parse_audio_ext (pfd, info, insn);
-+ }
-+ /* for insn-32. */
-+ else if (pfd->hw_res < HW_INT)
-+ {
-+ int_value =
-+ __GF (insn, pfd->bitpos, pfd->bitsize) << pfd->shift;
-+
-+ psys_reg = *(nds32_keyword_table[pfd->hw_res >> 8]
-+ + (pfd->hw_res & 0xff));
-+
-+ psys_reg = nds32_find_reg_keyword (psys_reg, int_value);
-+ /* For HW_SR, dump the index when it can't
-+ map the register name. */
-+ if (!psys_reg && pfd->hw_res == HW_SR)
-+ func (stream, "%d", int_value);
-+ else if (!psys_reg)
-+ func (stream, "???");
-+ else
-+ {
-+ if (pfd->hw_res == HW_GPR || pfd->hw_res == HW_CPR
-+ || pfd->hw_res == HW_FDR || pfd->hw_res == HW_FSR
-+ || pfd->hw_res == HW_DXR || pfd->hw_res == HW_SR
-+ || pfd->hw_res == HW_USR)
-+ func (stream, "$%s", psys_reg->name);
-+ else if (pfd->hw_res == HW_DTITON
-+ || pfd->hw_res == HW_DTITOFF)
-+ func (stream, ".%s", psys_reg->name);
-+ else
-+ func (stream, "%s", psys_reg->name);
-+ }
-+ }
-+ else if ((pfd->hw_res == HW_INT) || (pfd->hw_res == HW_UINT))
-+ {
-+ if (pfd->hw_res == HW_INT)
-+ int_value =
-+ N32_IMMS ((insn >> pfd->bitpos), pfd->bitsize) << pfd->shift;
-+ else
-+ int_value =
-+ __GF (insn, pfd->bitpos, pfd->bitsize) << pfd->shift;
-+
-+ if ((op == N32_OP6_BR1) || (op == N32_OP6_BR2))
-+ {
-+ info->print_address_func (int_value + pc, info);
-+ }
-+ else if ((op == N32_OP6_BR3) && (pfd->bitpos == 0))
-+ {
-+ info->print_address_func (int_value + pc, info);
-+ }
-+ else if (op == N32_OP6_JI)
-+ {
-+ /* FIXME: Handle relocation. */
-+ if (info->flags & INSN_HAS_RELOC)
-+ pc = 0;
-+ /* Check if insn32 in ex9 table. */
-+ if (parse_mode & NDS32_PARSE_EX9IT)
-+ info->print_address_func ((pc & 0xFE000000) | int_value,
-+ info);
-+ /* Check if decode ex9 table, PC(31,25)|Inst(23,0)<<1. */
-+ else if (parse_mode & NDS32_PARSE_EX9TAB)
-+ func (stream, "PC(31,25)|#0x%x", int_value);
-+ else
-+ info->print_address_func (int_value + pc, info);
-+ }
-+ else if (op == N32_OP6_LSMW)
-+ {
-+ /* lmw.adm/smw.adm. */
-+ func (stream, "#0x%x ! {", int_value);
-+ lsmwEnb4 = int_value;
-+ lsmwRb = ((insn >> 20) & 0x1F);
-+ lsmwRe = ((insn >> 10) & 0x1F);
-+
-+ /* If [Rb, Re] specifies at least one register,
-+ Rb(4,0) <= Re(4,0) and 0 <= Rb(4,0), Re(4,0) < 28.
-+ Disassembling does not consider this currently because of
-+ the convience comparing with bsp320. */
-+ if (lsmwRb != 31 || lsmwRe != 31)
-+ {
-+ func (stream, "$%s", keyword_gpr[lsmwRb].name);
-+ if (lsmwRb != lsmwRe)
-+ func (stream, "~$%s", keyword_gpr[lsmwRe].name);
-+ ifthe1st = 0;
-+ }
-+ if (lsmwEnb4 != 0)
-+ {
-+ /* $fp, $gp, $lp, $sp. */
-+ checkbit = 0x08;
-+ for (i = 0; i < 4; i++)
-+ {
-+ if (lsmwEnb4 & checkbit)
-+ {
-+ if (ifthe1st == 1)
-+ {
-+ ifthe1st = 0;
-+ func (stream, "$%s", keyword_gpr[28 + i].name);
-+ }
-+ else
-+ func (stream, ", $%s", keyword_gpr[28 + i].name);
-+ }
-+ checkbit >>= 1;
-+ }
-+ }
-+ func (stream, "}");
-+ }
-+ else if (pfd->hw_res == HW_INT)
-+ {
-+ if (int_value < 0)
-+ func (stream, "#%d", int_value);
-+ else
-+ func (stream, "#0x%x", int_value);
-+ }
-+ else /* if(pfd->hw_res == HW_UINT). */
-+ {
-+ func (stream, "#0x%x", int_value);
-+ }
-+ }
-+ break;
-+
-+ case '{':
-+ case '}':
-+ pstr_src++;
-+ break;
-+
-+ default:
-+ func (stream, "%c", *pstr_src++);
-+ break;
-+ } /* switch (*pstr_src). */
-+
-+ } /* while (*pstr_src). */
-+ return;
-+}
-+
-+/* Filter instructions with some bits must be fixed. */
-+
-+static void
-+nds32_filter_unknown_insn (uint32_t insn, struct nds32_opcode **opc)
-+{
-+ if (!(*opc))
-+ return;
-+
-+ switch ((*opc)->value)
-+ {
-+ case JREG (JR):
-+ case JREG (JRNEZ):
-+ /* jr jr.xtoff */
-+ if (__GF (insn, 6, 2) != 0 || __GF (insn, 15, 10) != 0)
-+ *opc = NULL;
-+ break;
-+ case MISC (STANDBY):
-+ if (__GF (insn, 7, 18) != 0)
-+ *opc = NULL;
-+ break;
-+ case SIMD (PBSAD):
-+ case SIMD (PBSADA):
-+ if (__GF (insn, 5, 5) != 0)
-+ *opc = NULL;
-+ break;
-+ case BR2 (SOP0):
-+ if (__GF (insn, 20, 5) != 0)
-+ *opc = NULL;
-+ break;
-+ case JREG (JRAL):
-+ if (__GF (insn, 5, 3) != 0 || __GF (insn, 15, 5) != 0)
-+ *opc = NULL;
-+ break;
-+ case ALU1 (NOR):
-+ case ALU1 (SLT):
-+ case ALU1 (SLTS):
-+ case ALU1 (SLLI):
-+ case ALU1 (SRLI):
-+ case ALU1 (SRAI):
-+ case ALU1 (ROTRI):
-+ case ALU1 (SLL):
-+ case ALU1 (SRL):
-+ case ALU1 (SRA):
-+ case ALU1 (ROTR):
-+ case ALU1 (SEB):
-+ case ALU1 (SEH):
-+ case ALU1 (ZEH):
-+ case ALU1 (WSBH):
-+ case ALU1 (SVA):
-+ case ALU1 (SVS):
-+ case ALU1 (CMOVZ):
-+ case ALU1 (CMOVN):
-+ if (__GF (insn, 5, 5) != 0)
-+ *opc = NULL;
-+ break;
-+ case MISC (IRET):
-+ case MISC (ISB):
-+ case MISC (DSB):
-+ if (__GF (insn, 5, 20) != 0)
-+ *opc = NULL;
-+ break;
-+ }
-+}
-+
-+static void
-+print_insn32 (bfd_vma pc, disassemble_info *info, uint32_t insn,
-+ uint32_t parse_mode)
-+{
-+ /* Get the final correct opcode and parse. */
-+ struct nds32_opcode *opc;
-+ uint32_t opcode = nds32_mask_opcode (insn);
-+ opc = (struct nds32_opcode *) htab_find (opcode_htab, &opcode);
-+
-+ nds32_special_opcode (insn, &opc);
-+ nds32_filter_unknown_insn (insn, &opc);
-+ nds32_parse_opcode (opc, pc, info, insn, parse_mode);
-+}
-+
-+static void
-+print_insn16 (bfd_vma pc, disassemble_info *info,
-+ uint32_t insn, uint32_t parse_mode)
-+{
-+ struct nds32_opcode *opc;
-+ uint32_t opcode;
-+
-+ /* Get highest 7 bit in default. */
-+ unsigned int mask = 0xfe00;
-+
-+ /* Classify 16-bit instruction to 4 sets by bit 13 and 14. */
-+ switch (__GF (insn, 13, 2))
-+ {
-+ case 0x0:
-+ /* mov55 movi55 */
-+ if (__GF (insn, 11, 2) == 0)
-+ {
-+ mask = 0xfc00;
-+ /* ifret16 = mov55 $sp, $sp*/
-+ if (__GF (insn, 0, 11) == 0x3ff)
-+ mask = 0xffff;
-+ }
-+ else if (__GF (insn, 9, 4) == 0xb)
-+ mask = 0xfe07;
-+ break;
-+ case 0x1:
-+ /* lwi37 swi37 */
-+ if (__GF (insn, 11, 2) == 0x3)
-+ mask = 0xf880;
-+ break;
-+ case 0x2:
-+ mask = 0xf800;
-+ /* Exclude beqz38, bnez38, beqs38, and bnes38. */
-+ if (__GF (insn, 12, 1) == 0x1
-+ && __GF (insn, 8, 3) == 0x5)
-+ {
-+ if (__GF (insn, 11, 1) == 0x0)
-+ mask = 0xff00;
-+ else
-+ mask = 0xffe0;
-+ }
-+ break;
-+ case 0x3:
-+ switch (__GF (insn, 11, 2))
-+ {
-+ case 0x1:
-+ /* beqzs8 bnezs8 */
-+ if (__GF (insn, 9, 2) == 0x0)
-+ mask = 0xff00;
-+ /* addi10s */
-+ else if (__GF(insn, 10, 1) == 0x1)
-+ mask = 0xfc00;
-+ break;
-+ case 0x2:
-+ /* lwi37.sp swi37.sp */
-+ mask = 0xf880;
-+ break;
-+ case 0x3:
-+ if (__GF (insn, 8, 3) == 0x5)
-+ mask = 0xff00;
-+ else if (__GF (insn, 8, 3) == 0x4)
-+ mask = 0xff80;
-+ else if (__GF (insn, 9 , 2) == 0x3)
-+ mask = 0xfe07;
-+ break;
-+ }
-+ break;
-+ }
-+
-+ opcode = insn & mask;
-+ opc = (struct nds32_opcode *) htab_find (opcode_htab, &opcode);
-+
-+ nds32_special_opcode (insn, &opc);
-+ /* Get the final correct opcode and parse it. */
-+ nds32_parse_opcode (opc, pc, info, insn, parse_mode);
-+}
-+
-+static hashval_t
-+htab_hash_hash (const void *p)
-+{
-+ return (*(unsigned int *) p) % 49;
-+}
-+
-+static int
-+htab_hash_eq (const void *p, const void *q)
-+{
-+ uint32_t pinsn = ((struct nds32_opcode *) p)->value;
-+ uint32_t qinsn = *((uint32_t *) q);
-+
-+ return (pinsn == qinsn);
-+}
-+
-+static uint32_t
-+mask_CEXT (uint32_t insn)
-+{
-+ opcode_t *opc = nds32_opcode_table[NDS32_ACE], *max_opc = NULL;
-+
-+ for (; opc != NULL && opc->opcode != NULL; opc++)
-+ {
-+ if ((insn & opc->value) == opc->value
-+ && (max_opc == NULL || opc->value > max_opc->value))
-+ max_opc = opc;
-+ }
-+
-+ return max_opc ? max_opc->value : insn;
-+}
-+
-+/* Get the format of instruction. */
-+
-+static uint32_t
-+nds32_mask_opcode (uint32_t insn)
-+{
-+ uint32_t opcode = N32_OP6 (insn);
-+ switch (opcode)
-+ {
-+ case N32_OP6_LBI:
-+ case N32_OP6_LHI:
-+ case N32_OP6_LWI:
-+ case N32_OP6_LDI:
-+ case N32_OP6_LBI_BI:
-+ case N32_OP6_LHI_BI:
-+ case N32_OP6_LWI_BI:
-+ case N32_OP6_LDI_BI:
-+ case N32_OP6_SBI:
-+ case N32_OP6_SHI:
-+ case N32_OP6_SWI:
-+ case N32_OP6_SDI:
-+ case N32_OP6_SBI_BI:
-+ case N32_OP6_SHI_BI:
-+ case N32_OP6_SWI_BI:
-+ case N32_OP6_SDI_BI:
-+ case N32_OP6_LBSI:
-+ case N32_OP6_LHSI:
-+ case N32_OP6_LWSI:
-+ case N32_OP6_LBSI_BI:
-+ case N32_OP6_LHSI_BI:
-+ case N32_OP6_LWSI_BI:
-+ case N32_OP6_MOVI:
-+ case N32_OP6_SETHI:
-+ case N32_OP6_ADDI:
-+ case N32_OP6_SUBRI:
-+ case N32_OP6_ANDI:
-+ case N32_OP6_XORI:
-+ case N32_OP6_ORI:
-+ case N32_OP6_SLTI:
-+ case N32_OP6_SLTSI:
-+ case N32_OP6_BITCI:
-+ return MASK_OP (insn, 0);
-+ case N32_OP6_CEXT:
-+ return mask_CEXT (insn);
-+ case N32_OP6_ALU2:
-+ /* FFBI */
-+ if (__GF (insn, 0, 7) == (N32_ALU2_FFBI | __BIT (6)))
-+ return MASK_OP (insn, 0x7f);
-+ else if (__GF (insn, 0, 10) == (N32_ALU2_MFUSR | __BIT (6))
-+ || __GF (insn, 0, 10) == (N32_ALU2_MTUSR | __BIT (6)))
-+ /* RDOV CLROV */
-+ return MASK_OP (insn, 0xf81ff);
-+ else if (__GF (insn, 0, 10) == (N32_ALU2_ONEOP | __BIT (7)))
-+ {
-+ /* INSB */
-+ if (__GF (insn, 12, 3) == 4)
-+ return MASK_OP (insn, 0x73ff);
-+ return MASK_OP (insn, 0x7fff);
-+ }
-+ return MASK_OP (insn, 0x3ff);
-+ case N32_OP6_ALU1:
-+ case N32_OP6_SIMD:
-+ return MASK_OP (insn, 0x1f);
-+ case N32_OP6_MEM:
-+ return MASK_OP (insn, 0xff);
-+ case N32_OP6_JREG:
-+ return MASK_OP (insn, 0x7f);
-+ case N32_OP6_LSMW:
-+ return MASK_OP (insn, 0x23);
-+ case N32_OP6_SBGP:
-+ case N32_OP6_LBGP:
-+ return MASK_OP (insn, 0x1 << 19);
-+ case N32_OP6_HWGP:
-+ if (__GF (insn, 18, 2) == 0x3)
-+ return MASK_OP (insn, 0x7 << 17);
-+ return MASK_OP (insn, 0x3 << 18);
-+ case N32_OP6_DPREFI:
-+ return MASK_OP (insn, 0x1 << 24);
-+ case N32_OP6_LWC:
-+ case N32_OP6_SWC:
-+ case N32_OP6_LDC:
-+ case N32_OP6_SDC:
-+ return MASK_OP (insn, 0x1 << 12);
-+ case N32_OP6_JI:
-+ return MASK_OP (insn, 0x1 << 24);
-+ case N32_OP6_BR1:
-+ return MASK_OP (insn, 0x1 << 14);
-+ case N32_OP6_BR2:
-+ if (__GF (insn, 16, 4) == 0)
-+ return MASK_OP (insn, 0x1ff << 16);
-+ else
-+ return MASK_OP (insn, 0xf << 16);
-+ case N32_OP6_BR3:
-+ return MASK_OP (insn, 0x1 << 19);
-+ case N32_OP6_MISC:
-+ switch (__GF (insn, 0, 5))
-+ {
-+ case N32_MISC_MTSR:
-+ /* SETGIE and SETEND */
-+ if (__GF (insn, 5, 5) == 0x1 || __GF (insn, 5, 5) == 0x2)
-+ return MASK_OP (insn, 0x1fffff);
-+ return MASK_OP (insn, 0x1f);
-+ case N32_MISC_TLBOP:
-+ if (__GF (insn, 5, 5) == 5 || __GF (insn, 5, 5) == 7)
-+ /* PB FLUA */
-+ return MASK_OP (insn, 0x3ff);
-+ return MASK_OP (insn, 0x1f);
-+ default:
-+ return MASK_OP (insn, 0x1f);
-+ }
-+ case N32_OP6_COP:
-+ if (__GF (insn, 4, 2) == 0)
-+ {
-+ /* FPU */
-+ switch (__GF (insn, 0, 4))
-+ {
-+ case 0x0:
-+ case 0x8:
-+ /* FS1/F2OP FD1/F2OP */
-+ if (__GF (insn, 6, 4) == 0xf)
-+ return MASK_OP (insn, 0x7fff);
-+ /* FS1 FD1 */
-+ return MASK_OP (insn, 0x3ff);
-+ case 0x4:
-+ case 0xc:
-+ /* FS2 */
-+ return MASK_OP (insn, 0x3ff);
-+ case 0x1:
-+ case 0x9:
-+ /* XR */
-+ if (__GF (insn, 6, 4) == 0xc)
-+ return MASK_OP (insn, 0x7fff);
-+ /* MFCP MTCP */
-+ return MASK_OP (insn, 0x3ff);
-+ default:
-+ return MASK_OP (insn, 0xff);
-+ }
-+ }
-+ else if (__GF (insn, 0, 2) == 0)
-+ return MASK_OP (insn, 0xf);
-+ return MASK_OP (insn, 0xcf);
-+ case N32_OP6_AEXT:
-+ /* AUDIO */
-+ switch (__GF (insn, 23, 2))
-+ {
-+ case 0x0:
-+ if (__GF (insn, 5, 4) == 0)
-+ /* AMxxx AMAyyS AMyyS AMAWzS AMWzS */
-+ return MASK_OP (insn, (0x1f << 20) | 0x1ff);
-+ else if (__GF (insn, 5, 4) == 1)
-+ /* ALR ASR ALA ASA AUPI */
-+ return MASK_OP (insn, (0x1f << 20) | (0xf << 5));
-+ else if (__GF (insn, 20, 3) == 0 && __GF (insn, 6, 3) == 1)
-+ /* ALR2 */
-+ return MASK_OP (insn, (0x1f << 20) | (0x7 << 6));
-+ else if (__GF (insn, 20 ,3) == 2 && __GF (insn, 6, 3) == 1)
-+ /* AWEXT ASATS48 */
-+ return MASK_OP (insn, (0x1f << 20) | (0xf << 5));
-+ else if (__GF (insn, 20 ,3) == 3 && __GF (insn, 6, 3) == 1)
-+ /* AMTAR AMTAR2 AMFAR AMFAR2 */
-+ return MASK_OP (insn, (0x1f << 20) | (0x1f << 5));
-+ else if (__GF (insn, 7, 2) == 3)
-+ /* AMxxxSA */
-+ return MASK_OP (insn, (0x1f << 20) | (0x3 << 7));
-+ else if (__GF (insn, 6, 3) == 2)
-+ /* AMxxxL.S */
-+ return MASK_OP (insn, (0x1f << 20) | (0xf << 5));
-+ else
-+ /* AmxxxL.l AmxxxL2.S AMxxxL2.L */
-+ return MASK_OP (insn, (0x1f << 20) | (0x7 << 6));
-+ case 0x1:
-+ if (__GF (insn, 20, 3) == 0)
-+ /* AADDL ASUBL */
-+ return MASK_OP (insn, (0x1f << 20) | (0x1 << 5));
-+ else if (__GF (insn, 20, 3) == 1)
-+ /* AMTARI Ix AMTARI Mx */
-+ return MASK_OP (insn, (0x1f << 20));
-+ else if (__GF (insn, 6, 3) == 2)
-+ /* AMAWzSl.S AMWzSl.S */
-+ return MASK_OP (insn, (0x1f << 20) | (0xf << 5));
-+ else if (__GF (insn, 7, 2) == 3)
-+ /* AMAWzSSA AMWzSSA */
-+ return MASK_OP (insn, (0x1f << 20) | (0x3 << 7));
-+ else
-+ /* AMAWzSL.L AMAWzSL2.S AMAWzSL2.L AMWzSL.L AMWzSL.L AMWzSL2.S */
-+ return MASK_OP (insn, (0x1f << 20) | (0x7 << 6));
-+ case 0x2:
-+ if (__GF (insn, 6, 3) == 2)
-+ /* AMAyySl.S AMWyySl.S */
-+ return MASK_OP (insn, (0x1f << 20) | (0xf << 5));
-+ else if (__GF (insn, 7, 2) == 3)
-+ /* AMAWyySSA AMWyySSA */
-+ return MASK_OP (insn, (0x1f << 20) | (0x3 << 7));
-+ else
-+ /* AMAWyySL.L AMAWyySL2.S AMAWyySL2.L AMWyySL.L AMWyySL.L AMWyySL2.S */
-+ return MASK_OP (insn, (0x1f << 20) | (0x7 << 6));
-+ }
-+ return MASK_OP (insn, 0x1f << 20);
-+ default:
-+ return (1 << 31);
-+ }
-+}
-+
-+/* Define cctl subtype. */
-+static char *cctl_subtype [] =
-+{
-+ /* 0x0 */
-+ "st0", "st0", "st0", "st2", "st2", "st3", "st3", "st4",
-+ "st1", "st1", "st1", "st0", "st0", NULL, NULL, "st5",
-+ /* 0x10 */
-+ "st0", NULL, NULL, "st2", "st2", "st3", "st3", NULL,
-+ "st1", NULL, NULL, "st0", "st0", NULL, NULL, NULL
-+};
-+
-+/* Check the subset of opcode. */
-+
-+static void
-+nds32_special_opcode (uint32_t insn, struct nds32_opcode **opc)
-+{
-+ char *string = NULL;
-+ uint32_t op;
-+
-+ if (!(*opc))
-+ return;
-+
-+ /* Check if special case. */
-+ switch ((*opc)->value)
-+ {
-+ case OP6 (LWC):
-+ case OP6 (SWC):
-+ case OP6 (LDC):
-+ case OP6 (SDC):
-+ case FPU_RA_IMMBI (LWC):
-+ case FPU_RA_IMMBI (SWC):
-+ case FPU_RA_IMMBI (LDC):
-+ case FPU_RA_IMMBI (SDC):
-+ /* Check if cp0 => FPU. */
-+ if (__GF (insn, 13, 2) == 0)
-+ {
-+ while (!((*opc)->attr & ATTR (FPU)) && (*opc)->next)
-+ *opc = (*opc)->next;
-+ }
-+ break;
-+ case ALU1 (ADD):
-+ case ALU1 (SUB):
-+ case ALU1 (AND):
-+ case ALU1 (XOR):
-+ case ALU1 (OR):
-+ /* Check if (add/add_slli) (sub/sub_slli) (and/and_slli). */
-+ if (N32_SH5(insn) != 0)
-+ string = "sh";
-+ break;
-+ case ALU1 (SRLI):
-+ /* Check if nop. */
-+ if (__GF (insn, 10, 15) == 0)
-+ string = "nop";
-+ break;
-+ case MISC (CCTL):
-+ string = cctl_subtype [__GF (insn, 5, 5)];
-+ break;
-+ case JREG (JR):
-+ case JREG (JRAL):
-+ case JREG (JR) | JREG_RET:
-+ if (__GF (insn, 8, 2) != 0)
-+ string = "tit";
-+ break;
-+ case N32_OP6_COP:
-+ break;
-+ case 0xea00:
-+ /* break16 ex9 */
-+ if (__GF (insn, 5, 4) != 0)
-+ string = "ex9";
-+ break;
-+ case 0x9200:
-+ /* nop16 */
-+ if (__GF (insn, 0, 9) == 0)
-+ string = "nop16";
-+ break;
-+ }
-+
-+ if (string)
-+ {
-+ while (strstr ((*opc)->opcode, string) == NULL
-+ && strstr ((*opc)->instruction, string) == NULL && (*opc)->next)
-+ *opc = (*opc)->next;
-+ return;
-+ }
-+
-+ /* Classify instruction is COP or FPU. */
-+ op = N32_OP6 (insn);
-+ if (op == N32_OP6_COP && __GF (insn, 4, 2) != 0)
-+ {
-+ while (((*opc)->attr & ATTR (FPU)) != 0 && (*opc)->next)
-+ *opc = (*opc)->next;
-+ }
-+}
-+
-+int
-+print_insn_nds32 (bfd_vma pc, disassemble_info * info)
-+{
-+ int status;
-+ bfd_byte buf[4];
-+ bfd_byte buf_data[16];
-+ long long given;
-+ long long given1;
-+ uint32_t insn;
-+ int n;
-+ int last_symbol_index = -1;
-+ bfd_vma addr;
-+ int is_data = FALSE;
-+ bfd_boolean found = FALSE;
-+ struct nds32_private_data *private_data;
-+ unsigned int size = 16;
-+ enum map_type mapping_type = MAP_CODE;
-+
-+ if (info->private_data == NULL)
-+ {
-+ /* Note: remain lifecycle throughout whole execution. */
-+ static struct nds32_private_data private;
-+ private.has_mapping_symbols = -1; /* unknown yet. */
-+ private.last_symbol_index = -1;
-+ private.last_addr = 0;
-+ info->private_data = &private;
-+ }
-+ private_data = info->private_data;
-+
-+ if (info->symtab_size != 0)
-+ {
-+ int start;
-+ if (pc == 0)
-+ start = 0;
-+ else
-+ {
-+ start = info->symtab_pos;
-+ if (start < private_data->last_symbol_index)
-+ start = private_data->last_symbol_index;
-+ }
-+
-+ if (0 > start)
-+ start = 0;
-+
-+ if (private_data->has_mapping_symbols != 0
-+ && ((strncmp (".text", info->section->name, 5) == 0)))
-+ {
-+ for (n = start; n < info->symtab_size; n++)
-+ {
-+ addr = bfd_asymbol_value (info->symtab[n]);
-+ if (addr > pc)
-+ break;
-+ if (get_mapping_symbol_type (info, n, &mapping_type))
-+ {
-+ last_symbol_index = n;
-+ found = TRUE;
-+ }
-+ }
-+
-+ if (found)
-+ private_data->has_mapping_symbols = 1;
-+ else if (!found && private_data->has_mapping_symbols == -1)
-+ {
-+ /* Make sure there are no any mapping symbol. */
-+ for (n = 0; n < info->symtab_size; n++)
-+ {
-+ if (is_mapping_symbol (info, n, &mapping_type))
-+ {
-+ private_data->has_mapping_symbols = -1;
-+ break;
-+ }
-+ }
-+ if (private_data->has_mapping_symbols == -1)
-+ private_data->has_mapping_symbols = 0;
-+
-+ }
-+
-+ private_data->last_symbol_index = last_symbol_index;
-+ private_data->last_mapping_type = mapping_type;
-+ is_data = (private_data->last_mapping_type == MAP_DATA0
-+ || private_data->last_mapping_type == MAP_DATA1
-+ || private_data->last_mapping_type == MAP_DATA2
-+ || private_data->last_mapping_type == MAP_DATA3
-+ || private_data->last_mapping_type == MAP_DATA4);
-+ }
-+ }
-+
-+ /* Wonder data or instruction. */
-+ if (is_data)
-+ {
-+ unsigned int i1;
-+
-+ /* fix corner case: there is no next mapping symbol,
-+ * let mapping type decides size */
-+ if (last_symbol_index + 1 >= info->symtab_size)
-+ {
-+ if (mapping_type == MAP_DATA0)
-+ size = 1;
-+ if (mapping_type == MAP_DATA1)
-+ size = 2;
-+ if (mapping_type == MAP_DATA2)
-+ size = 4;
-+ if (mapping_type == MAP_DATA3)
-+ size = 8;
-+ if (mapping_type == MAP_DATA4)
-+ size = 16;
-+ }
-+ for (n = last_symbol_index + 1; n < info->symtab_size; n++)
-+ {
-+ addr = bfd_asymbol_value (info->symtab[n]);
-+
-+ enum map_type fake_mapping_type;
-+ if (get_mapping_symbol_type (info, n, &fake_mapping_type))
-+ {
-+ if (addr > pc
-+ && ((info->section == NULL)
-+ || (info->section == info->symtab[n]->section)))
-+ {
-+ if (addr - pc < size)
-+ {
-+ size = addr - pc;
-+ break;
-+ }
-+ }
-+ }
-+ }
-+
-+
-+ if (size == 3)
-+ size = (pc & 1) ? 1 : 2;
-+
-+
-+ /* Read bytes from BFD. */
-+ info->read_memory_func (pc, (bfd_byte *) buf_data, size, info);
-+ given = 0;
-+ given1 = 0;
-+ /* Start assembling data. */
-+ /* Little endian of data. */
-+ if (info->endian == BFD_ENDIAN_LITTLE)
-+ {
-+ for (i1 = size - 1;; i1--)
-+ {
-+ if (i1 >= 8)
-+ given1 = buf_data[i1] | (given1 << 8);
-+ else
-+ given = buf_data[i1] | (given << 8);
-+ if (i1 == 0)
-+ break;
-+ }
-+ }
-+ else
-+ {
-+ /* Big endian of data. */
-+ for (i1 = 0; i1 < size; i1++) {
-+ if (i1 <= 7)
-+ given = buf_data[i1] | (given << 8);
-+ else
-+ given1 = buf_data[i1] | (given1 << 8);
-+ }
-+ }
-+
-+ info->bytes_per_line = 4;
-+
-+ if (size == 16)
-+ {
-+ info->fprintf_func (info->stream, ".qword\t0x%016llx%016llx",
-+ given, given1);
-+ }
-+ else if (size == 8)
-+ {
-+ info->fprintf_func (info->stream, ".dword\t0x%016llx", given);
-+ }
-+ else if (size == 4)
-+ {
-+ info->fprintf_func (info->stream, ".word\t0x%08llx", given);
-+ }
-+ else if (size == 2) /* short */
-+ {
-+ if (mapping_type == MAP_DATA0)
-+ info->fprintf_func (info->stream, ".byte\t0x%02llx", given & 0xFF);
-+ else
-+ info->fprintf_func (info->stream, ".short\t0x%04llx", given);
-+ }
-+ else
-+ { /* byte */
-+ info->fprintf_func (info->stream, ".byte\t0x%02llx", given);
-+ }
-+ return size;
-+ }
-+
-+ status = info->read_memory_func (pc, (bfd_byte *) buf, 4, info);
-+ if (status)
-+ {
-+ /* For the last 16-bit instruction. */
-+ status = info->read_memory_func (pc, (bfd_byte *) buf, 2, info);
-+ if (status)
-+ {
-+ (*info->memory_error_func)(status, pc, info);
-+ return -1;
-+ }
-+ }
-+ insn = bfd_getb32 (buf);
-+ /* 16-bit instruction. */
-+ if (insn & 0x80000000)
-+ {
-+ if (info->section
-+ && strstr (info->section->name, ".ex9.itable") != NULL)
-+ {
-+ print_insn16 (pc, info, (insn & 0x0000FFFF),
-+ NDS32_PARSE_INSN16 | NDS32_PARSE_EX9TAB);
-+ return 4;
-+ }
-+ print_insn16 (pc, info, (insn >> 16), NDS32_PARSE_INSN16);
-+ return 2;
-+ }
-+
-+ /* 32-bit instructions. */
-+ else
-+ {
-+ if (info->section
-+ && strstr (info->section->name, ".ex9.itable") != NULL)
-+ print_insn32 (pc, info, insn, NDS32_PARSE_INSN32 | NDS32_PARSE_EX9TAB);
-+ else
-+ print_insn32 (pc, info, insn, NDS32_PARSE_INSN32);
-+ return 4;
-+ }
-+}
-+
-+/* Ignore disassembling ifc common block name. */
-+
-+bfd_boolean
-+nds32_symbol_is_valid (asymbol *sym,
-+ struct disassemble_info *info ATTRIBUTE_UNUSED)
-+{
-+ const char *name;
-+
-+ if (sym == NULL)
-+ return FALSE;
-+
-+ name = bfd_asymbol_name (sym);
-+
-+ /* Mapping symbol is invalid. */
-+ if (name[0] == '$' || (strstr (name, "$nds32ifc_") != NULL))
-+ return FALSE;
-+ return TRUE;
-+}
-+
-+void
-+nds32_add_opcode_hash_table (unsigned indx)
-+{
-+ opcode_t *opc;
-+
-+ opc = nds32_opcode_table[indx];
-+ if (opc == NULL)
-+ return;
-+
-+ while (opc->opcode != NULL)
-+ {
-+ opcode_t **slot;
-+
-+ slot = (opcode_t **) htab_find_slot (opcode_htab, &opc->value, INSERT);
-+ if (*slot == NULL)
-+ {
-+ /* This is the new one. */
-+ *slot = opc;
-+ }
-+ else
-+ {
-+ opcode_t *tmp;
-+
-+ /* Already exists. Append to the list. */
-+ tmp = *slot;
-+ while (tmp->next)
-+ tmp = tmp->next;
-+ tmp->next = opc;
-+ opc->next = NULL;
-+ }
-+ opc++;
-+ }
-+}
-+
-+void
-+disassemble_init_for_nds32 (struct disassemble_info *info)
-+{
-+ static unsigned init_done = 0;
-+ const char *ptr;
-+ unsigned k;
-+
-+ /* Set up symbol checking function. */
-+ info->symbol_is_valid = nds32_symbol_is_valid;
-+
-+ /* Only need to initialize once: */
-+ /* High level will call this function for every object file. */
-+ /* For example, when disassemble all members of a library. */
-+ if (init_done)
-+ return;
-+
-+ /* Setup main core. */
-+ nds32_keyword_table[NDS32_MAIN_CORE] = &keywords[0];
-+ nds32_opcode_table[NDS32_MAIN_CORE] = &nds32_opcodes[0];
-+ nds32_field_table[NDS32_MAIN_CORE] = &operand_fields[0];
-+
-+ /* Process command line options. */
-+ ptr = info->disassembler_options;
-+ if (ptr != NULL)
-+ {
-+ const char *start, *end;
-+ do
-+ {
-+ char name[256];
-+
-+ /* Get one option. */
-+ start = strchr(ptr, '=');
-+ end = strchr(ptr, ',');
-+ if (start == NULL)
-+ fprintf (stderr, "Unknown nds32 disassembler option: %s\n", ptr);
-+ else
-+ {
-+ start++;
-+ if (end == NULL)
-+ strcpy (name, start);
-+ else
-+ strncpy (name, start, end - start);
-+
-+ /* Parse and process the option. */
-+ if (strncmp (ptr, "ace=", 4) == 0)
-+ nds32_parse_udi (name);
-+ else if (strncmp (ptr, "cop0=", 5) == 0)
-+ nds32_parse_cop0 (name);
-+ else if (strncmp (ptr, "cop1=", 5) == 0)
-+ nds32_parse_cop1 (name);
-+ else if (strncmp (ptr, "cop2=", 5) == 0)
-+ nds32_parse_cop2 (name);
-+ else if (strncmp (ptr, "cop3=", 5) == 0)
-+ nds32_parse_cop3 (name);
-+ else
-+ fprintf (stderr, "Unknown nds32 disassembler option: %s\n",
-+ ptr);
-+
-+ if (end == NULL)
-+ break;
-+ ptr = end + 1;
-+ }
-+ } while (1);
-+ }
-+
-+ /* Build opcode table. */
-+ opcode_htab = htab_create_alloc (1024, htab_hash_hash, htab_hash_eq, NULL,
-+ xcalloc, free);
-+
-+ for (k = 0; k < NDS32_CORE_COUNT; k++)
-+ {
-+ /* Add op-codes. */
-+ nds32_add_opcode_hash_table (k);
-+ }
-+
-+ init_done = 1;
-+}
-+
-+static int
-+is_mapping_symbol (struct disassemble_info *info, int n,
-+ enum map_type *map_type)
-+{
-+ const char *name = NULL;
-+
-+ /* Get symbol name. */
-+ name = bfd_asymbol_name (info->symtab[n]);
-+
-+ if (name[1] == 'c')
-+ {
-+ *map_type = MAP_CODE;
-+ return TRUE;
-+ }
-+ else if (name[1] == 'd' && name[2] == '0')
-+ {
-+ *map_type = MAP_DATA0;
-+ return TRUE;
-+ }
-+ else if (name[1] == 'd' && name[2] == '1')
-+ {
-+ *map_type = MAP_DATA1;
-+ return TRUE;
-+ }
-+ else if (name[1] == 'd' && name[2] == '2')
-+ {
-+ *map_type = MAP_DATA2;
-+ return TRUE;
-+ }
-+ else if (name[1] == 'd' && name[2] == '3')
-+ {
-+ *map_type = MAP_DATA3;
-+ return TRUE;
-+ }
-+ else if (name[1] == 'd' && name[2] == '4')
-+ {
-+ *map_type = MAP_DATA4;
-+ return TRUE;
-+ }
-+
-+ return FALSE;
-+}
-+
-+static int
-+get_mapping_symbol_type (struct disassemble_info *info, int n,
-+ enum map_type *map_type)
-+{
-+ /* If the symbol is in a different section, ignore it. */
-+ if (info->section != NULL && info->section != info->symtab[n]->section)
-+ return FALSE;
-+
-+ return is_mapping_symbol (info, n, map_type);
-+}
-+
-+void
-+print_nds32_disassembler_options (FILE *stream)
-+{
-+ fprintf (stream, _("\n\
-+The following Andes specific disassembler options are supported for use with\n\
-+the -M switch:\n"));
-+
-+ fprintf (stream, " ace=<shrlibfile> Support user defined instruction extension\n");
-+ fprintf (stream, " cop0=<shrlibfile> Support coprocessor 0 extension\n");
-+ fprintf (stream, " cop1=<shrlibfile> Support coprocessor 1 extension\n");
-+ fprintf (stream, " cop2=<shrlibfile> Support coprocessor 2 extension\n");
-+ fprintf (stream, " cop3=<shrlibfile> Support coprocessor 3 extension\n\n");
-+}
-diff -Nur binutils-2.24.orig/opcodes/nds32-opc.h binutils-2.24/opcodes/nds32-opc.h
---- binutils-2.24.orig/opcodes/nds32-opc.h 1970-01-01 01:00:00.000000000 +0100
-+++ binutils-2.24/opcodes/nds32-opc.h 2016-06-30 21:26:12.825899802 +0200
-@@ -0,0 +1,209 @@
-+/* NDS32-specific support for 32-bit ELF.
-+ Copyright (C) 2012-2013 Free Software Foundation, Inc.
-+ Contributed by Andes Technology Corporation.
-+
-+ This file is part of BFD, the Binary File Descriptor library.
-+
-+ This program is free software; you can redistribute it and/or modify
-+ it under the terms of the GNU General Public License as published by
-+ the Free Software Foundation; either version 3 of the License, or
-+ (at your option) any later version.
-+
-+ This program is distributed in the hope that it will be useful,
-+ but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ GNU General Public License for more details.
-+
-+ You should have received a copy of the GNU General Public License
-+ along with this program; if not, write to the Free Software
-+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
-+ 02110-1301, USA.*/
-+
-+
-+#ifndef NDS32_OPC_H
-+#define NDS32_OPC_H
-+
-+/* This was the enum used for 32/16 conversion. */
-+
-+enum
-+{
-+ NDS32_INSN_INVALID, NDS32_INSN_MOVI, NDS32_INSN_SETHI, NDS32_INSN_ADDI,
-+ NDS32_INSN_ADD, NDS32_INSN_SLTSI, NDS32_INSN_SLTS, NDS32_INSN_SLTI,
-+ NDS32_INSN_SLT, NDS32_INSN_SUBRI, NDS32_INSN_SUB, NDS32_INSN_ANDI,
-+ NDS32_INSN_AND, NDS32_INSN_XORI, NDS32_INSN_XOR, NDS32_INSN_ORI,
-+ NDS32_INSN_OR, NDS32_INSN_NOR, NDS32_INSN_SVA, NDS32_INSN_SVS,
-+ NDS32_INSN_SEB, NDS32_INSN_SEH, NDS32_INSN_ZEH, NDS32_INSN_WSBH,
-+ NDS32_INSN_SLLI, NDS32_INSN_SLL, NDS32_INSN_SRAI, NDS32_INSN_SRA,
-+ NDS32_INSN_ROTRI, NDS32_INSN_ROTR, NDS32_INSN_SRLI, NDS32_INSN_SRL,
-+ NDS32_INSN_MUL, NDS32_INSN_MULTS64, NDS32_INSN_MULT64, NDS32_INSN_MADDS64,
-+ NDS32_INSN_MADD64, NDS32_INSN_MSUBS64, NDS32_INSN_MSUB64,
-+ NDS32_INSN_MULT32, NDS32_INSN_MADD32, NDS32_INSN_MSUB32, NDS32_INSN_MFUSR,
-+ NDS32_INSN_MTUSR, NDS32_INSN_LBI, NDS32_INSN_LBI_BI, NDS32_INSN_LB,
-+ NDS32_INSN_LB_BI, NDS32_INSN_LHI, NDS32_INSN_LHI_BI, NDS32_INSN_LH,
-+ NDS32_INSN_LH_BI, NDS32_INSN_LWI, NDS32_INSN_LWI_BI, NDS32_INSN_LW,
-+ NDS32_INSN_LW_BI, NDS32_INSN_LWUP, NDS32_INSN_SWUP, NDS32_INSN_LBSI,
-+ NDS32_INSN_LBSI_BI, NDS32_INSN_LBS, NDS32_INSN_LBS_BI, NDS32_INSN_LHSI,
-+ NDS32_INSN_LHSI_BI, NDS32_INSN_LHS, NDS32_INSN_LHS_BI, NDS32_INSN_SBI,
-+ NDS32_INSN_SBI_BI, NDS32_INSN_SB, NDS32_INSN_SB_BI, NDS32_INSN_SHI,
-+ NDS32_INSN_SHI_BI, NDS32_INSN_SH, NDS32_INSN_SH_BI, NDS32_INSN_SWI,
-+ NDS32_INSN_SWI_BI, NDS32_INSN_SW, NDS32_INSN_SW_BI, NDS32_INSN_LMW_BI,
-+ NDS32_INSN_LMW_BIM, NDS32_INSN_LMW_BD, NDS32_INSN_LMW_BDM,
-+ NDS32_INSN_LMW_AI, NDS32_INSN_LMW_AIM, NDS32_INSN_LMW_AD,
-+ NDS32_INSN_LMW_ADM, NDS32_INSN_SMW_BI, NDS32_INSN_SMW_BIM,
-+ NDS32_INSN_SMW_BD, NDS32_INSN_SMW_BDM, NDS32_INSN_SMW_AI,
-+ NDS32_INSN_SMW_AIM, NDS32_INSN_SMW_AD, NDS32_INSN_SMW_ADM, NDS32_INSN_LLW,
-+ NDS32_INSN_SCW, NDS32_INSN_J, NDS32_INSN_JAL, NDS32_INSN_JR,
-+ NDS32_INSN_RET, NDS32_INSN_JR_ITOFF, NDS32_INSN_JR_TOFF,
-+ NDS32_INSN_RET_ITOFF, NDS32_INSN_RET_TOFF, NDS32_INSN_JRAL,
-+ NDS32_INSN_JRAL_ITON, NDS32_INSN_JRAL_TON, NDS32_INSN_BEQ, NDS32_INSN_BNE,
-+ NDS32_INSN_BEQZ, NDS32_INSN_BNEZ, NDS32_INSN_BGEZ, NDS32_INSN_BLTZ,
-+ NDS32_INSN_BGTZ, NDS32_INSN_BLEZ, NDS32_INSN_BGEZAL, NDS32_INSN_BLTZAL,
-+ NDS32_INSN_MFSR, NDS32_INSN_MTSR, NDS32_INSN_SETEND_L,
-+ NDS32_INSN_SETEND_B, NDS32_INSN_SETGIE_D, NDS32_INSN_SETGIE_E,
-+ NDS32_INSN_CMOVZ, NDS32_INSN_CMOVN, NDS32_INSN_DPREFI_D,
-+ NDS32_INSN_DPREFI_W, NDS32_INSN_DPREF, NDS32_INSN_ISYNC, NDS32_INSN_MSYNC,
-+ NDS32_INSN_ISB, NDS32_INSN_DSB, NDS32_INSN_STANDBY, NDS32_INSN_TRAP,
-+ NDS32_INSN_TEQZ, NDS32_INSN_TNEZ, NDS32_INSN_BREAK, NDS32_INSN_SYSCALL,
-+ NDS32_INSN_IRET, NDS32_INSN_TLBOP, NDS32_INSN_CCTL, NDS32_INSN_DIVS,
-+ NDS32_INSN_DIV, NDS32_INSN_ABS, NDS32_INSN_AVE, NDS32_INSN_MIN,
-+ NDS32_INSN_MAX, NDS32_INSN_BSET, NDS32_INSN_BTGL, NDS32_INSN_BCLR,
-+ NDS32_INSN_BTST, NDS32_INSN_CLIPS, NDS32_INSN_CLIP, NDS32_INSN_CLZ,
-+ NDS32_INSN_CLO, NDS32_INSN_BSE, NDS32_INSN_BSP, NDS32_INSN_PBSAD,
-+ NDS32_INSN_PBSADA, NDS32_INSN_MOV55, NDS32_INSN_MOVI55, NDS32_INSN_ADDI45,
-+ NDS32_INSN_ADD45, NDS32_INSN_SUBI45, NDS32_INSN_SUB45, NDS32_INSN_SRAI45,
-+ NDS32_INSN_SRLI45, NDS32_INSN_SLLI333, NDS32_INSN_SEB33, NDS32_INSN_SEH33,
-+ NDS32_INSN_ZEB33, NDS32_INSN_ZEH33, NDS32_INSN_XLSB33, NDS32_INSN_X11B33,
-+ NDS32_INSN_ADDI333, NDS32_INSN_ADD333, NDS32_INSN_SUBI333,
-+ NDS32_INSN_SUB333, NDS32_INSN_LWI333, NDS32_INSN_LWI333_BI,
-+ NDS32_INSN_LHI333, NDS32_INSN_LBI333, NDS32_INSN_SWI333,
-+ NDS32_INSN_SWI333_BI, NDS32_INSN_SHI333, NDS32_INSN_SBI333,
-+ NDS32_INSN_LWI450, NDS32_INSN_SWI450, NDS32_INSN_LWI37, NDS32_INSN_SWI37,
-+ NDS32_INSN_BEQZ38, NDS32_INSN_BNEZ38, NDS32_INSN_BEQS38,
-+ NDS32_INSN_BNES38, NDS32_INSN_J8, NDS32_INSN_JR5, NDS32_INSN_RET5,
-+ NDS32_INSN_JRAL5, NDS32_INSN_SLTI45, NDS32_INSN_SLTSI45, NDS32_INSN_SLT45,
-+ NDS32_INSN_SLTS45, NDS32_INSN_BEQZS8, NDS32_INSN_BNEZS8,
-+ NDS32_INSN_BREAK16, NDS32_INSN_ADDI10_SP, NDS32_INSN_LWI37_SP,
-+ NDS32_INSN_SWI37_SP, NDS32_INSN_BMSKI33, NDS32_INSN_FEXTI33,
-+ NDS32_INSN_ADDRI36_SP, NDS32_INSN_LWI45_FE, NDS32_INSN_NEG33,
-+ NDS32_INSN_NOT33, NDS32_INSN_MUL33, NDS32_INSN_XOR33, NDS32_INSN_AND33,
-+ NDS32_INSN_OR33, NDS32_INSN_MOVPI45, NDS32_INSN_PUSH25, NDS32_INSN_POP25,
-+ NDS32_INSN_MOVD44, NDS32_INSN_ADD5_PC, NDS32_INSN_BREAK16V3,
-+ NDS32_INSN_ADDI_GP, NDS32_INSN_MADDR32, NDS32_INSN_MSUBR32,
-+ NDS32_INSN_MULR64, NDS32_INSN_MULSR64, NDS32_INSN_SBI_GP,
-+ NDS32_INSN_SHI_GP, NDS32_INSN_SWI_GP, NDS32_INSN_LBI_GP,
-+ NDS32_INSN_LBSI_GP, NDS32_INSN_LHI_GP, NDS32_INSN_LHSI_GP,
-+ NDS32_INSN_LWI_GP, NDS32_INSN_DIVR, NDS32_INSN_DIVSR, NDS32_INSN_LMWA_BI,
-+ NDS32_INSN_LMWA_BIM, NDS32_INSN_LMWA_BD, NDS32_INSN_LMWA_BDM,
-+ NDS32_INSN_LMWA_AI, NDS32_INSN_LMWA_AIM, NDS32_INSN_LMWA_AD,
-+ NDS32_INSN_LMWA_ADM, NDS32_INSN_SMWA_BI, NDS32_INSN_SMWA_BIM,
-+ NDS32_INSN_SMWA_BD, NDS32_INSN_SMWA_BDM, NDS32_INSN_SMWA_AI,
-+ NDS32_INSN_SMWA_AIM, NDS32_INSN_SMWA_AD, NDS32_INSN_SMWA_ADM,
-+ NDS32_INSN_LBUP, NDS32_INSN_SBUP, NDS32_INSN_LMWZB_B, NDS32_INSN_LMWZB_BM,
-+ NDS32_INSN_LMWZB_A, NDS32_INSN_LMWZB_AM, NDS32_INSN_SMWZB_B,
-+ NDS32_INSN_SMWZB_BM, NDS32_INSN_SMWZB_A, NDS32_INSN_SMWZB_AM,
-+ NDS32_INSN_BEQC, NDS32_INSN_BNEC, NDS32_INSN_JRALNEZ, NDS32_INSN_JRNEZ,
-+ NDS32_INSN_ADD_SLLI, NDS32_INSN_ADD_SRLI, NDS32_INSN_SUB_SLLI,
-+ NDS32_INSN_SUB_SRLI, NDS32_INSN_AND_SLLI, NDS32_INSN_AND_SRLI,
-+ NDS32_INSN_OR_SLLI, NDS32_INSN_OR_SRLI, NDS32_INSN_XOR_SLLI,
-+ NDS32_INSN_XOR_SRLI, NDS32_INSN_BITC, NDS32_INSN_BITCI, NDS32_INSN_AADDL,
-+ NDS32_INSN_ASUBL, NDS32_INSN_ALA, NDS32_INSN_ALR, NDS32_INSN_ALR2,
-+ NDS32_INSN_ASA, NDS32_INSN_ASR, NDS32_INSN_AUPI, NDS32_INSN_AMFAR,
-+ NDS32_INSN_AMTAR, NDS32_INSN_AMTARI, NDS32_INSN_ASATS48, NDS32_INSN_AWEXT,
-+ NDS32_INSN_AMADD, NDS32_INSN_AMADDL_S, NDS32_INSN_AMADDL2_S,
-+ NDS32_INSN_AMADDL_L, NDS32_INSN_AMADDL2_L, NDS32_INSN_AMADDSA,
-+ NDS32_INSN_AMSUB, NDS32_INSN_AMSUBL_S, NDS32_INSN_AMSUBL2_S,
-+ NDS32_INSN_AMSUBL_L, NDS32_INSN_AMSUBL2_L, NDS32_INSN_AMSUBSA,
-+ NDS32_INSN_AMADDS, NDS32_INSN_AMADDSL_S, NDS32_INSN_AMADDSL2_S,
-+ NDS32_INSN_AMADDSL_L, NDS32_INSN_AMADDSL2_L, NDS32_INSN_AMADDSSA,
-+ NDS32_INSN_AMSUBS, NDS32_INSN_AMSUBSL_S, NDS32_INSN_AMSUBSL2_S,
-+ NDS32_INSN_AMSUBSL_L, NDS32_INSN_AMSUBSL2_L, NDS32_INSN_AMSUBSSA,
-+ NDS32_INSN_AMNEGS, NDS32_INSN_AMNEGSL_S, NDS32_INSN_AMNEGSL2_S,
-+ NDS32_INSN_AMNEGSL_L, NDS32_INSN_AMNEGSL2_L, NDS32_INSN_AMNEGSSA,
-+ NDS32_INSN_AMULTS, NDS32_INSN_AMULTSL_S, NDS32_INSN_AMULTSL2_S,
-+ NDS32_INSN_AMULTSL_L, NDS32_INSN_AMULTSL2_L, NDS32_INSN_AMULTSSA,
-+ NDS32_INSN_AMULT, NDS32_INSN_AMULTL_S, NDS32_INSN_AMULTL2_S,
-+ NDS32_INSN_AMULTL_L, NDS32_INSN_AMULTL2_L, NDS32_INSN_AMULTSA,
-+ NDS32_INSN_AZOL, NDS32_INSN_AMABBS, NDS32_INSN_AMABTS, NDS32_INSN_AMATBS,
-+ NDS32_INSN_AMATTS, NDS32_INSN_AMBBS, NDS32_INSN_AMBTS, NDS32_INSN_AMTBS,
-+ NDS32_INSN_AMTTS, NDS32_INSN_AMABBSL_S, NDS32_INSN_AMABBSL_L,
-+ NDS32_INSN_AMABBSL2_S, NDS32_INSN_AMABBSL2_L, NDS32_INSN_AMABBSSA,
-+ NDS32_INSN_AMABTSL_S, NDS32_INSN_AMABTSL_L, NDS32_INSN_AMABTSL2_S,
-+ NDS32_INSN_AMABTSL2_L, NDS32_INSN_AMABTSSA, NDS32_INSN_AMATBSL_S,
-+ NDS32_INSN_AMATBSL_L, NDS32_INSN_AMATBSL2_S, NDS32_INSN_AMATBSL2_L,
-+ NDS32_INSN_AMATBSSA, NDS32_INSN_AMATTSL_S, NDS32_INSN_AMATTSL_L,
-+ NDS32_INSN_AMATTSL2_S, NDS32_INSN_AMATTSL2_L, NDS32_INSN_AMATTSSA,
-+ NDS32_INSN_AMBBSL_S, NDS32_INSN_AMBBSL_L, NDS32_INSN_AMBBSL2_S,
-+ NDS32_INSN_AMBBSL2_L, NDS32_INSN_AMBBSSA, NDS32_INSN_AMBTSL_S,
-+ NDS32_INSN_AMBTSL_L, NDS32_INSN_AMBTSL2_S, NDS32_INSN_AMBTSL2_L,
-+ NDS32_INSN_AMBTSSA, NDS32_INSN_AMTBSL_S, NDS32_INSN_AMTBSL_L,
-+ NDS32_INSN_AMTBSL2_S, NDS32_INSN_AMTBSL2_L, NDS32_INSN_AMTBSSA,
-+ NDS32_INSN_AMTTSL_S, NDS32_INSN_AMTTSL_L, NDS32_INSN_AMTTSL2_S,
-+ NDS32_INSN_AMTTSL2_L, NDS32_INSN_AMTTSSA, NDS32_INSN_AMAWBS,
-+ NDS32_INSN_AMAWTS, NDS32_INSN_AMWBS, NDS32_INSN_AMWTS,
-+ NDS32_INSN_AMAWBSL_S, NDS32_INSN_AMAWBSL_L, NDS32_INSN_AMAWBSL2_S,
-+ NDS32_INSN_AMAWBSL2_L, NDS32_INSN_AMAWBSSA, NDS32_INSN_AMAWTSL_S,
-+ NDS32_INSN_AMAWTSL_L, NDS32_INSN_AMAWTSL2_S, NDS32_INSN_AMAWTSL2_L,
-+ NDS32_INSN_AMAWTSSA, NDS32_INSN_AMWBSL_S, NDS32_INSN_AMWBSL_L,
-+ NDS32_INSN_AMWBSL2_S, NDS32_INSN_AMWBSL2_L, NDS32_INSN_AMWBSSA,
-+ NDS32_INSN_AMWTSL_S, NDS32_INSN_AMWTSL_L, NDS32_INSN_AMWTSL2_S,
-+ NDS32_INSN_AMWTSL2_L, NDS32_INSN_AMWTSSA, NDS32_INSN_AMFAR2,
-+ NDS32_INSN_AMTAR2, NDS32_INSN_FLS, NDS32_INSN_FLS_BI, NDS32_INSN_FLSI,
-+ NDS32_INSN_FLSI_BI, NDS32_INSN_FMFCFG, NDS32_INSN_FMFCSR,
-+ NDS32_INSN_FMTCSR, NDS32_INSN_FMFSR, NDS32_INSN_FMTSR, NDS32_INSN_FSS,
-+ NDS32_INSN_FSS_BI, NDS32_INSN_FSSI, NDS32_INSN_FSSI_BI, NDS32_INSN_FS2D,
-+ NDS32_INSN_FABSS, NDS32_INSN_FADDS, NDS32_INSN_FCMOVNS,
-+ NDS32_INSN_FCMOVZS, NDS32_INSN_FCMPEQS, NDS32_INSN_FCMPEQS_E,
-+ NDS32_INSN_FCMPLTS, NDS32_INSN_FCMPLTS_E, NDS32_INSN_FCMPLES,
-+ NDS32_INSN_FCMPLES_E, NDS32_INSN_FCMPUNS, NDS32_INSN_FCMPUNS_E,
-+ NDS32_INSN_FCPYNSS, NDS32_INSN_FCPYSS, NDS32_INSN_FDIVS,
-+ NDS32_INSN_FMADDS, NDS32_INSN_FMULS, NDS32_INSN_FMSUBS,
-+ NDS32_INSN_FNMADDS, NDS32_INSN_FNMSUBS, NDS32_INSN_FS2SI,
-+ NDS32_INSN_FS2SI_Z, NDS32_INSN_FS2UI, NDS32_INSN_FS2UI_Z,
-+ NDS32_INSN_FSI2S, NDS32_INSN_FSQRTS, NDS32_INSN_FSUBS, NDS32_INSN_FUI2S,
-+ NDS32_INSN_FABSD, NDS32_INSN_FADDD, NDS32_INSN_FCMOVND,
-+ NDS32_INSN_FCMOVZD, NDS32_INSN_FCMPEQD, NDS32_INSN_FCMPEQD_E,
-+ NDS32_INSN_FCMPLTD, NDS32_INSN_FCMPLTD_E, NDS32_INSN_FCMPLED,
-+ NDS32_INSN_FCMPLED_E, NDS32_INSN_FCMPUND, NDS32_INSN_FCMPUND_E,
-+ NDS32_INSN_FCPYNSD, NDS32_INSN_FCPYSD, NDS32_INSN_FD2S, NDS32_INSN_FD2SI,
-+ NDS32_INSN_FD2SI_Z, NDS32_INSN_FD2UI, NDS32_INSN_FD2UI_Z,
-+ NDS32_INSN_FDIVD, NDS32_INSN_FLD, NDS32_INSN_FLD_BI, NDS32_INSN_FLDI,
-+ NDS32_INSN_FLDI_BI, NDS32_INSN_FMADDD, NDS32_INSN_FMFDR,
-+ NDS32_INSN_FMSUBD, NDS32_INSN_FMTDR, NDS32_INSN_FMULD, NDS32_INSN_FNMADDD,
-+ NDS32_INSN_FNMSUBD, NDS32_INSN_FSD, NDS32_INSN_FSD_BI, NDS32_INSN_FSDI,
-+ NDS32_INSN_FSDI_BI, NDS32_INSN_FSI2D, NDS32_INSN_FSQRTD, NDS32_INSN_FSUBD,
-+ NDS32_INSN_FUI2D, NDS32_INSN_CPE1_CP1, NDS32_INSN_CPE1_CP2,
-+ NDS32_INSN_CPE1_CP3, NDS32_INSN_CPE2_CP1, NDS32_INSN_CPE2_CP2,
-+ NDS32_INSN_CPE2_CP3, NDS32_INSN_CPE3_CP1, NDS32_INSN_CPE3_CP2,
-+ NDS32_INSN_CPE3_CP3, NDS32_INSN_CPE4_CP1, NDS32_INSN_CPE4_CP2,
-+ NDS32_INSN_CPE4_CP3, NDS32_INSN_CPLD_CP1, NDS32_INSN_CPLD_BI_CP1,
-+ NDS32_INSN_CPLDI_CP1, NDS32_INSN_CPLDI_BI_CP1, NDS32_INSN_CPLD_CP2,
-+ NDS32_INSN_CPLD_BI_CP2, NDS32_INSN_CPLDI_CP2, NDS32_INSN_CPLDI_BI_CP2,
-+ NDS32_INSN_CPLD_CP3, NDS32_INSN_CPLD_BI_CP3, NDS32_INSN_CPLDI_CP3,
-+ NDS32_INSN_CPLDI_BI_CP3, NDS32_INSN_CPLW_CP1, NDS32_INSN_CPLW_BI_CP1,
-+ NDS32_INSN_CPLWI_CP1, NDS32_INSN_CPLWI_BI_CP1, NDS32_INSN_CPLW_CP2,
-+ NDS32_INSN_CPLW_BI_CP2, NDS32_INSN_CPLWI_CP2, NDS32_INSN_CPLWI_BI_CP2,
-+ NDS32_INSN_CPLW_CP3, NDS32_INSN_CPLW_BI_CP3, NDS32_INSN_CPLWI_CP3,
-+ NDS32_INSN_CPLWI_BI_CP3, NDS32_INSN_CPSD_CP1, NDS32_INSN_CPSD_BI_CP1,
-+ NDS32_INSN_CPSDI_CP1, NDS32_INSN_CPSDI_BI_CP1, NDS32_INSN_CPSD_CP2,
-+ NDS32_INSN_CPSD_BI_CP2, NDS32_INSN_CPSDI_CP2, NDS32_INSN_CPSDI_BI_CP2,
-+ NDS32_INSN_CPSD_CP3, NDS32_INSN_CPSD_BI_CP3, NDS32_INSN_CPSDI_CP3,
-+ NDS32_INSN_CPSDI_BI_CP3, NDS32_INSN_CPSW_CP1, NDS32_INSN_CPSW_BI_CP1,
-+ NDS32_INSN_CPSWI_CP1, NDS32_INSN_CPSWI_BI_CP1, NDS32_INSN_CPSW_CP2,
-+ NDS32_INSN_CPSW_BI_CP2, NDS32_INSN_CPSWI_CP2, NDS32_INSN_CPSWI_BI_CP2,
-+ NDS32_INSN_CPSW_CP3, NDS32_INSN_CPSW_BI_CP3, NDS32_INSN_CPSWI_CP3,
-+ NDS32_INSN_CPSWI_BI_CP3, NDS32_INSN_MFCPD_CP1, NDS32_INSN_MTCPD_CP1,
-+ NDS32_INSN_MFCPD_CP2, NDS32_INSN_MTCPD_CP2, NDS32_INSN_MFCPD_CP3,
-+ NDS32_INSN_MTCPD_CP3, NDS32_INSN_MFCPW_CP1, NDS32_INSN_MTCPW_CP1,
-+ NDS32_INSN_MFCPW_CP2, NDS32_INSN_MTCPW_CP2, NDS32_INSN_MFCPW_CP3,
-+ NDS32_INSN_MTCPW_CP3, NDS32_INSN_MFCPPW_CP1, NDS32_INSN_MTCPPW_CP1,
-+ NDS32_INSN_MFCPPW_CP2, NDS32_INSN_MTCPPW_CP2, NDS32_INSN_MFCPPW_CP3,
-+ NDS32_INSN_MTCPPW_CP3, NDS32_INSN_FFB, NDS32_INSN_FFBI, NDS32_INSN_FFMISM,
-+ NDS32_INSN_FLMISM, NDS32_INSN_FFZMISM, NDS32_INSN_KADDW, NDS32_INSN_KSUBW,
-+ NDS32_INSN_KSLRAW, NDS32_INSN_KADDH, NDS32_INSN_KSUBH, NDS32_INSN_KDMBB,
-+ NDS32_INSN_KDMBT, NDS32_INSN_KDMTB, NDS32_INSN_KDMTT, NDS32_INSN_KHMBB,
-+ NDS32_INSN_KHMBT, NDS32_INSN_KHMTB, NDS32_INSN_KHMTT, NDS32_INSN_RDOV,
-+ NDS32_INSN_CLROV, NDS32_INSN_IFCALL9, NDS32_INSN_IFCALL, NDS32_INSN_IFRET,
-+ NDS32_INSN_EX5_IT, NDS32_INSN_EX9_IT
-+};
-+
-+#endif
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-14 13:45:20 +0000